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a/riscv-tests/rv32-Zbkb-andn-00.elf.objdump b/riscv-tests/rv32-Zbkb-andn-00.elf.objdump new file mode 100644 index 0000000..aa7b2e1 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-andn-00.elf.objdump @@ -0,0 +1,13194 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-andn-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-andn-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000186b0 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020700 80020700 00021700 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002664 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 00000000 00000000 00024cdf 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d59 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d7c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024d90 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 00000000 00000000 00024db8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e40 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020700 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc3VD0Fl.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_andn_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b1 +80009021 l .data 00000000 Zbkb_andn_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b2 +80009052 l .data 00000000 Zbkb_andn_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b3 +80009083 l .data 00000000 Zbkb_andn_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090b4 l .data 00000000 Zbkb_andn_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b5 +800090e5 l .data 00000000 Zbkb_andn_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b6 +80009116 l .data 00000000 Zbkb_andn_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b7 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +80009147 l .data 00000000 Zbkb_andn_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b8 +80009178 l .data 00000000 Zbkb_andn_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b9 +800091a9 l .data 00000000 Zbkb_andn_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b10 +800091db l .data 00000000 Zbkb_andn_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b11 +8000920e l .data 00000000 Zbkb_andn_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b12 +80009241 l .data 00000000 Zbkb_andn_cg_cp_rs1_b12_str +800002ac l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b13 +80009274 l .data 00000000 Zbkb_andn_cg_cp_rs1_b13_str +800002d8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b14 +800092a7 l .data 00000000 Zbkb_andn_cg_cp_rs1_b14_str +80000308 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b15 +800092da l .data 00000000 Zbkb_andn_cg_cp_rs1_b15_str +80000334 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b16 +8000930d l .data 00000000 Zbkb_andn_cg_cp_rs1_b16_str +80000360 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b17 +80009340 l .data 00000000 Zbkb_andn_cg_cp_rs1_b17_str +8000038c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b18 +80009373 l .data 00000000 Zbkb_andn_cg_cp_rs1_b18_str +800003b8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b19 +800093a6 l .data 00000000 Zbkb_andn_cg_cp_rs1_b19_str +800003e4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b20 +800093d9 l .data 00000000 Zbkb_andn_cg_cp_rs1_b20_str +80000414 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b21 +8000940c l .data 00000000 Zbkb_andn_cg_cp_rs1_b21_str +80000440 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b22 +8000943f l .data 00000000 Zbkb_andn_cg_cp_rs1_b22_str +8000046c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b23 +80009472 l .data 00000000 Zbkb_andn_cg_cp_rs1_b23_str +80000498 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b24 +800094a5 l .data 00000000 Zbkb_andn_cg_cp_rs1_b24_str +800004c4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b25 +800094d8 l .data 00000000 Zbkb_andn_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b26 +8000950b l .data 00000000 Zbkb_andn_cg_cp_rs1_b26_str +8000051c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b27 +8000953e l .data 00000000 Zbkb_andn_cg_cp_rs1_b27_str +80000548 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b28 +80009571 l .data 00000000 Zbkb_andn_cg_cp_rs1_b28_str +80000574 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b29 +800095a4 l .data 00000000 Zbkb_andn_cg_cp_rs1_b29_str +800005a0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b30 +800095d7 l .data 00000000 Zbkb_andn_cg_cp_rs1_b30_str +800005cc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_b31 +8000960a l .data 00000000 Zbkb_andn_cg_cp_rs1_b31_str +800005f8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b0 +8000963d l .data 00000000 Zbkb_andn_cg_cp_rs2_b0_str +80000624 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b1 +8000966f l .data 00000000 Zbkb_andn_cg_cp_rs2_b1_str +80000650 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b2 +800096a1 l .data 00000000 Zbkb_andn_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b3 +800096d3 l .data 00000000 Zbkb_andn_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b4 +80009705 l .data 00000000 Zbkb_andn_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b5 +80009737 l .data 00000000 Zbkb_andn_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b6 +80009769 l .data 00000000 Zbkb_andn_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b7 +8000979b l .data 00000000 Zbkb_andn_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b8 +800097cd l .data 00000000 Zbkb_andn_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b9 +800097ff l .data 00000000 Zbkb_andn_cg_cp_rs2_b9_str +800007bc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b10 +80009831 l .data 00000000 Zbkb_andn_cg_cp_rs2_b10_str +800007e8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b11 +80009864 l .data 00000000 Zbkb_andn_cg_cp_rs2_b11_str +80000814 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b12 +80009897 l .data 00000000 Zbkb_andn_cg_cp_rs2_b12_str +80000840 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b13 +800098ca l .data 00000000 Zbkb_andn_cg_cp_rs2_b13_str +8000086c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b14 +800098fd l .data 00000000 Zbkb_andn_cg_cp_rs2_b14_str +80000898 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b15 +80009930 l .data 00000000 Zbkb_andn_cg_cp_rs2_b15_str +800008c4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b16 +80009963 l .data 00000000 Zbkb_andn_cg_cp_rs2_b16_str +800008f0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b17 +80009996 l .data 00000000 Zbkb_andn_cg_cp_rs2_b17_str +8000091c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b18 +800099c9 l .data 00000000 Zbkb_andn_cg_cp_rs2_b18_str +8000094c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b19 +800099fc l .data 00000000 Zbkb_andn_cg_cp_rs2_b19_str +80000978 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b20 +80009a2f l .data 00000000 Zbkb_andn_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b21 +80009a62 l .data 00000000 Zbkb_andn_cg_cp_rs2_b21_str +800009d0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b22 +80009a95 l .data 00000000 Zbkb_andn_cg_cp_rs2_b22_str +800009fc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b23 +80009ac8 l .data 00000000 Zbkb_andn_cg_cp_rs2_b23_str +80000a28 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b24 +80009afb l .data 00000000 Zbkb_andn_cg_cp_rs2_b24_str +80000a58 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b25 +80009b2e l .data 00000000 Zbkb_andn_cg_cp_rs2_b25_str +80000a84 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b26 +80009b61 l .data 00000000 Zbkb_andn_cg_cp_rs2_b26_str +80000ab0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b27 +80009b94 l .data 00000000 Zbkb_andn_cg_cp_rs2_b27_str +80000adc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b28 +80009bc7 l .data 00000000 Zbkb_andn_cg_cp_rs2_b28_str +80000b08 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b29 +80009bfa l .data 00000000 Zbkb_andn_cg_cp_rs2_b29_str +80000b34 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b30 +80009c2d l .data 00000000 Zbkb_andn_cg_cp_rs2_b30_str +80000b60 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_b31 +80009c60 l .data 00000000 Zbkb_andn_cg_cp_rs2_b31_str +80000b8c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b0 +80009c93 l .data 00000000 Zbkb_andn_cg_cp_rd_b0_str +80000bb8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b1 +80009cc4 l .data 00000000 Zbkb_andn_cg_cp_rd_b1_str +80000be8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b2 +80009cf5 l .data 00000000 Zbkb_andn_cg_cp_rd_b2_str +80000c14 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b3 +80009d26 l .data 00000000 Zbkb_andn_cg_cp_rd_b3_str +80000c48 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b4 +80009d57 l .data 00000000 Zbkb_andn_cg_cp_rd_b4_str +80000c74 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b5 +80009d88 l .data 00000000 Zbkb_andn_cg_cp_rd_b5_str +80000ca0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b6 +80009db9 l .data 00000000 Zbkb_andn_cg_cp_rd_b6_str +80000ccc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b7 +80009dea l .data 00000000 Zbkb_andn_cg_cp_rd_b7_str +80000cf8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b8 +80009e1b l .data 00000000 Zbkb_andn_cg_cp_rd_b8_str +80000d28 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b9 +80009e4c l .data 00000000 Zbkb_andn_cg_cp_rd_b9_str +80000d54 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b10 +80009e7d l .data 00000000 Zbkb_andn_cg_cp_rd_b10_str +80000d80 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b11 +80009eaf l .data 00000000 Zbkb_andn_cg_cp_rd_b11_str +80000dac l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b12 +80009ee1 l .data 00000000 Zbkb_andn_cg_cp_rd_b12_str +80000de0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b13 +80009f13 l .data 00000000 Zbkb_andn_cg_cp_rd_b13_str +80000e0c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b14 +80009f45 l .data 00000000 Zbkb_andn_cg_cp_rd_b14_str +80000e38 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b15 +80009f77 l .data 00000000 Zbkb_andn_cg_cp_rd_b15_str +80000e64 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b16 +80009fa9 l .data 00000000 Zbkb_andn_cg_cp_rd_b16_str +80000e90 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b17 +80009fdb l .data 00000000 Zbkb_andn_cg_cp_rd_b17_str +80000ebc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b18 +8000a00d l .data 00000000 Zbkb_andn_cg_cp_rd_b18_str +80000ee8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b19 +8000a03f l .data 00000000 Zbkb_andn_cg_cp_rd_b19_str +80000f14 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b20 +8000a071 l .data 00000000 Zbkb_andn_cg_cp_rd_b20_str +80000f40 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b21 +8000a0a3 l .data 00000000 Zbkb_andn_cg_cp_rd_b21_str +80000f6c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b22 +8000a0d5 l .data 00000000 Zbkb_andn_cg_cp_rd_b22_str +80000f98 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b23 +8000a107 l .data 00000000 Zbkb_andn_cg_cp_rd_b23_str +80000fc4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b24 +8000a139 l .data 00000000 Zbkb_andn_cg_cp_rd_b24_str +80000ff4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b25 +8000a16b l .data 00000000 Zbkb_andn_cg_cp_rd_b25_str +80001020 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b26 +8000a19d l .data 00000000 Zbkb_andn_cg_cp_rd_b26_str +80001050 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b27 +8000a1cf l .data 00000000 Zbkb_andn_cg_cp_rd_b27_str +8000107c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b28 +8000a201 l .data 00000000 Zbkb_andn_cg_cp_rd_b28_str +800010a8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b29 +8000a233 l .data 00000000 Zbkb_andn_cg_cp_rd_b29_str +800010d4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b30 +8000a265 l .data 00000000 Zbkb_andn_cg_cp_rd_b30_str +80001100 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rd_b31 +8000a297 l .data 00000000 Zbkb_andn_cg_cp_rd_b31_str +8000112c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x0 +8000a2c9 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x0_str +80001158 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x1 +8000a302 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x1_str +80001184 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x2 +8000a33b l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x2_str +800011b0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x80000000 +8000a374 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x80000000_str +800011dc l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x80000001 +8000a3b5 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x80000001_str +80001208 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x7fffffff +8000a3f6 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x7fffffff_str +80001234 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x7ffffffe +8000a437 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x7ffffffe_str +80001260 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0xffffffff +8000a478 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0xffffffff_str +8000128c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0xfffffffe +8000a4b9 l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0xfffffffe_str +800012b8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x5bbc8872 +8000a4fa l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x5bbc8872_str +800012e4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaa +8000a53b l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaa_str +80001310 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs1_edges_0x55555555 +8000a57c l .data 00000000 Zbkb_andn_cg_cp_rs1_edges_0x55555555_str +8000133c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x0 +8000a5bd l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x0_str +80001368 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x1 +8000a5f7 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x1_str +80001394 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x2 +8000a631 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x2_str +800013c0 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x80000000 +8000a66b l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x80000000_str +800013ec l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x80000001 +8000a6ac l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x80000001_str +80001418 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x7fffffff +8000a6ed l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x7fffffff_str +80001444 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x7ffffffe +8000a72e l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x7ffffffe_str +80001470 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0xffffffff +8000a76f l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0xffffffff_str +8000149c l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0xfffffffe +8000a7b0 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0xfffffffe_str +800014c8 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x5bbc8872 +8000a7f1 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x5bbc8872_str +800014f4 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaa +8000a832 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaa_str +80001520 l .text.rvtest 00000000 Zbkb_andn_cg_cp_rs2_edges_0x55555555 +8000a873 l .data 00000000 Zbkb_andn_cg_cp_rs2_edges_0x55555555_str +8000154c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a8b4 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001578 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a905 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015a4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a956 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015d0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a9a7 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +800015fc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a9ff l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001628 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000aa57 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001654 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000aaaf l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001680 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ab07 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016ac l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000ab5f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016d8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000abb7 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001704 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ac0f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001730 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ac67 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000175c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000acbf l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001788 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ad10 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017b4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ad61 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017e0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000adb2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000180c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ae0a l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001838 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000ae62 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001864 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000aeba l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001890 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000af12 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018bc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000af6a l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018e8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000afc2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001914 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b01a l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001940 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b072 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000196c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b0ca l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +80001998 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b11b l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019c4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b16c l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019f0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b1bd l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a1c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b215 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a48 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b26d l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a74 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b2c5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aa0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b31d l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001acc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b375 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001af8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b3cd l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b24 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b425 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b50 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b47d l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b7c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b4d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001ba8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b52d l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bd4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b585 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c00 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b5dd l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c2c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b63c l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c58 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b69b l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c84 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b6fa l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cb0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b759 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cdc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b7b8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d08 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b817 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d34 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b876 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d60 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b8d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d8c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b934 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001db8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b98c l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001de4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b9e4 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e10 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000ba3c l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e3c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000ba9b l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e68 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bafa l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e94 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bb59 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ec0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bbb8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001eec l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bc17 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f18 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bc76 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f44 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bcd5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f70 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bd34 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001f9c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bd93 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fc8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bdeb l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ff4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000be43 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002020 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000be9b l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000204c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000befa l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002078 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000bf59 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020a4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000bfb8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020d0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c017 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +800020fc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c076 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002128 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c0d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002154 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c134 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002180 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c193 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021ac l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c1f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021d8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c24a l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002204 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c2a2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002230 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c2fa l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000225c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c359 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002288 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c3b8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022b4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c417 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022e0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c476 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000230c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c4d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002338 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c534 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002364 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c593 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002390 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c5f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023bc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c651 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023e8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c6a9 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002414 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c701 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002440 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c759 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000246c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c7b8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +80002498 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c817 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024c4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c876 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024f0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c8d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000251c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c934 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002548 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c993 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002574 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c9f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025a0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000ca51 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025cc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cab0 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025f8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000cb08 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002624 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cb60 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002650 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cbb8 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000267c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cc17 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026a8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cc76 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026d4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000ccd5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002700 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cd34 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000272c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000cd93 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002758 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cdf2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002784 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000ce51 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027b0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000ceb0 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027dc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000cf0f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002808 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000cf67 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002834 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000cfbf l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002860 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d017 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +8000288c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d076 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028b8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d0d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028e4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d134 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002910 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d193 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000293c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d1f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002968 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d251 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +80002994 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d2b0 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029c0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d30f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029ec l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d36e l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a18 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d3c6 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a44 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d41e l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a70 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d476 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002a9c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d4d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ac8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d534 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002af4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d593 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b20 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d5f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b4c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d651 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b78 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d6b0 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002ba4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d70f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bd0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d76e l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002bfc l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d7cd l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c28 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d825 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c54 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d87d l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c80 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d8d5 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cac l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d934 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cd8 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d993 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d04 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d9f2 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d30 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000da51 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d5c l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dab0 l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d88 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000db0f l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002db4 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000db6e l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002de0 l .text.rvtest 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dbcd l .data 00000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e0c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b0 +8000dc2c l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b0_str +80002e38 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b1 +8000dc64 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b1_str +80002e64 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b2 +8000dc9c l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b2_str +80002e90 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b3 +8000dcd4 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b3_str +80002ebc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b4 +8000dd0c l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b4_str +80002ee8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b5 +8000dd44 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b5_str +80002f14 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b6 +8000dd7c l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b6_str +80002f48 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b7 +8000ddb4 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b7_str +80002f74 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b8 +8000ddec l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b8_str +80002fa4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b9 +8000de24 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b9_str +80002fd0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b10 +8000de5c l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b10_str +80002ffc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b11 +8000de95 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b11_str +80003028 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b12 +8000dece l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b12_str +80003054 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b13 +8000df07 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b13_str +80003080 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b14 +8000df40 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b14_str +800030ac l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b15 +8000df79 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b15_str +800030d8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b16 +8000dfb2 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b16_str +80003104 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b17 +8000dfeb l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b17_str +80003130 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b18 +8000e024 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b18_str +8000315c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b19 +8000e05d l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b19_str +80003188 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b20 +8000e096 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b20_str +800031b4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b21 +8000e0cf l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b21_str +800031e0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b22 +8000e108 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b22_str +80003210 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b23 +8000e141 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b23_str +8000323c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b24 +8000e17a l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b24_str +80003268 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b25 +8000e1b3 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b25_str +80003294 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b26 +8000e1ec l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b26_str +800032c0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b27 +8000e225 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b27_str +800032ec l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b28 +8000e25e l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b28_str +8000331c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b29 +8000e297 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b29_str +8000334c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b30 +8000e2d0 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b30_str +80003378 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b31 +8000e309 l .data 00000000 Zbkb_andn_cg_cmp_rs1_rs2_b31_str +800033a4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b0 +8000e342 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b0_str +800033d0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b1 +8000e379 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b1_str +800033fc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b2 +8000e3b0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b2_str +80003428 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b3 +8000e3e7 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b3_str +8000345c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b4 +8000e41e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b4_str +80003488 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b5 +8000e455 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b5_str +800034b4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b6 +8000e48c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b6_str +800034e0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b7 +8000e4c3 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b7_str +8000350c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b8 +8000e4fa l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b8_str +8000353c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b9 +8000e531 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b9_str +80003568 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b10 +8000e568 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b10_str +80003594 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b11 +8000e5a0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b11_str +800035c0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b12 +8000e5d8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b12_str +800035f4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b13 +8000e610 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b13_str +80003620 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b14 +8000e648 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b14_str +80003650 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b15 +8000e680 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b15_str +8000367c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b16 +8000e6b8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b16_str +800036a8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b17 +8000e6f0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b17_str +800036d4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b18 +8000e728 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b18_str +80003700 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b19 +8000e760 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b19_str +8000372c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b20 +8000e798 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b20_str +8000375c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b21 +8000e7d0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b21_str +80003788 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b22 +8000e808 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b22_str +800037b4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b23 +8000e840 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b23_str +800037e0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b24 +8000e878 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b24_str +8000380c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b25 +8000e8b0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b25_str +80003838 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b26 +8000e8e8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b26_str +80003864 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b27 +8000e920 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b27_str +80003894 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b28 +8000e958 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b28_str +800038c0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b29 +8000e990 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b29_str +800038ec l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b30 +8000e9c8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b30_str +80003918 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_b31 +8000ea00 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_b31_str +80003944 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b0 +8000ea38 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b0_str +80003970 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b1 +8000ea6f l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b1_str +8000399c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b2 +8000eaa6 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b2_str +800039cc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b3 +8000eadd l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b3_str +800039f8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b4 +8000eb14 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b4_str +80003a24 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b5 +8000eb4b l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b5_str +80003a50 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b6 +8000eb82 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b6_str +80003a84 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b7 +8000ebb9 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b7_str +80003ab0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b8 +8000ebf0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b8_str +80003adc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b9 +8000ec27 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b9_str +80003b08 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b10 +8000ec5e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b10_str +80003b34 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b11 +8000ec96 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b11_str +80003b60 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b12 +8000ecce l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b12_str +80003b94 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b13 +8000ed06 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b13_str +80003bc0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b14 +8000ed3e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b14_str +80003bec l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b15 +8000ed76 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b15_str +80003c18 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b16 +8000edae l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b16_str +80003c48 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b17 +8000ede6 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b17_str +80003c74 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b18 +8000ee1e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b18_str +80003ca4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b19 +8000ee56 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b19_str +80003cd0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b20 +8000ee8e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b20_str +80003cfc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b21 +8000eec6 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b21_str +80003d2c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b22 +8000eefe l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b22_str +80003d58 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b23 +8000ef36 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b23_str +80003d84 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b24 +8000ef6e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b24_str +80003db0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b25 +8000efa6 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b25_str +80003ddc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b26 +8000efde l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b26_str +80003e08 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b27 +8000f016 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b27_str +80003e34 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b28 +8000f04e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b28_str +80003e60 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b29 +8000f086 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b29_str +80003e90 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b30 +8000f0be l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b30_str +80003ebc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs2_b31 +8000f0f6 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs2_b31_str +80003ee8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b0 +8000f12e l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b0_str +80003f18 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b1 +8000f169 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b1_str +80003f44 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b2 +8000f1a4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b2_str +80003f70 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b3 +8000f1df l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b3_str +80003f9c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b4 +8000f21a l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b4_str +80003fc8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b5 +8000f255 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b5_str +80003ff4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b6 +8000f290 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b6_str +80004028 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b7 +8000f2cb l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b7_str +80004054 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b8 +8000f306 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b8_str +80004084 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b9 +8000f341 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b9_str +800040b4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b10 +8000f37c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b10_str +800040e0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b11 +8000f3b8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b11_str +80004110 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b12 +8000f3f4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b12_str +8000413c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b13 +8000f430 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b13_str +80004168 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b14 +8000f46c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b14_str +80004194 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b15 +8000f4a8 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b15_str +800041c4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b16 +8000f4e4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b16_str +800041f0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b17 +8000f520 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b17_str +8000421c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b18 +8000f55c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b18_str +8000424c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b19 +8000f598 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b19_str +80004278 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b20 +8000f5d4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b20_str +800042a4 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b21 +8000f610 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b21_str +800042d0 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b22 +8000f64c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b22_str +800042fc l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b23 +8000f688 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b23_str +80004328 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b24 +8000f6c4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b24_str +80004354 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b25 +8000f700 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b25_str +80004380 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b26 +8000f73c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b26_str +800043ac l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b27 +8000f778 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b27_str +800043d8 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b28 +8000f7b4 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b28_str +80004404 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b29 +8000f7f0 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b29_str +80004430 l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b30 +8000f82c l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b30_str +8000445c l .text.rvtest 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b31 +8000f868 l .data 00000000 Zbkb_andn_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +8000448c l .text.rvtest 00000000 exit_Mcleanup +80004490 l .text.rvtest 00000000 resto_Medeleg +80004498 l .text.rvtest 00000000 resto_Msatp +8000449c l .text.rvtest 00000000 resto_Mscratch +800044a4 l .text.rvtest 00000000 resto_Mxtvec +800044b8 l .text.rvtest 00000000 resto_Mtramp +800044bc l .text.rvtest 00000000 resto_Mloop +800044d4 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +8000ff2e l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000ff67 l .data 00000000 begin_debugstr +8000ffc7 l .data 00000000 trap_sig_overflowstr +80010b72 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011c48 l .data 00000000 trap_sigptr +80011c40 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001011b l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8000ff89 l .data 00000000 abortstr +8000fef4 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +800115a9 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000fa18 l .data 00000000 ascii_buffer +80010030 l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f9f8 l .data 00000000 saved_xepc +800206ac l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010132 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010234 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +8001032f l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010422 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80010595 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000f8b0 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000f8b0 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000f9d8 l .data 00000000 failure_diag_type +8000f9e8 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000f9e0 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010519 l .data 00000000 sv_Mtval2_str +80010557 l .data 00000000 sv_Mtinst_str +80010172 l .data 00000000 sv_Svect_str +80010272 l .data 00000000 sv_Scause_str +8001036b l .data 00000000 sv_Sepc_str +8001045f l .data 00000000 sv_Stval_str +800105d0 l .data 00000000 sv_Sip_str +800101b2 l .data 00000000 sv_Hvect_str +800102b0 l .data 00000000 sv_Hcause_str +800103a7 l .data 00000000 sv_Hepc_str +8001049c l .data 00000000 sv_Htval_str +8001060b l .data 00000000 sv_Hip_str +800101f3 l .data 00000000 sv_Vvect_str +800102ef l .data 00000000 sv_Vcause_str +800103e4 l .data 00000000 sv_Vepc_str +800104da l .data 00000000 sv_Vtval_str +80010647 l .data 00000000 sv_Vip_str +80010684 l .data 00000000 Mclr_Mext_int_str +800106d3 l .data 00000000 Mclr_Sext_int_str +800107ce l .data 00000000 Sclr_Sext_int_str +800108ca l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000f9e4 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +8001001e l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000f9d0 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010032 l .data 00000000 inststr +8000f9b0 l .data 00000000 failing_instruction +80010046 l .data 00000000 addrstr +8000f9b8 l .data 00000000 failing_addr +80010a7d l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000f9b4 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010b93 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80010a76 l .data 00000000 vxsatstr +80010a8e l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000f9c0 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010aa5 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000f9c8 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010abc l .data 00000000 failure_diag_bad_instr_str +80010b1a l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010bbf l .data 00000000 trap_diag_header_str +80010beb l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010bfb l .data 00000000 trap_diag_expected_offset_str +80010c26 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010c55 l .data 00000000 trap_diag_extra_traps_str +80010cbd l .data 00000000 trap_diag_diff_bytes_str +80010ce4 l .data 00000000 trap_diag_extra_next_step_str +80010c81 l .data 00000000 trap_diag_missing_traps_str +80010dcc l .data 00000000 trap_diag_missing_next_step_str +80010eb3 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80010eef l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +80010ecd l .data 00000000 trap_diag_mode_m_str +80010ed5 l .data 00000000 trap_diag_mode_s_str +80010edd l .data 00000000 trap_diag_mode_hs_str +80010ee6 l .data 00000000 trap_diag_mode_vs_str +80010ef8 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +8001104f l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +80010f12 l .data 00000000 trap_diag_field_vect_str +80010f43 l .data 00000000 trap_diag_field_cause_str +80010f63 l .data 00000000 trap_diag_field_epc_str +80010f81 l .data 00000000 trap_diag_field_tval_str +80010fa0 l .data 00000000 trap_diag_field_ip_str +80010fc8 l .data 00000000 trap_diag_field_tval2_str +80010ff4 l .data 00000000 trap_diag_field_tinst_str +80011020 l .data 00000000 trap_diag_field_intid_str +8001105e l .data 00000000 trap_diag_expected_str +80011075 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +8001108c l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +800110a3 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80011119 l .data 00000000 trap_diag_hint_vect_str +800111ef l .data 00000000 trap_diag_hint_cause_str +800112e2 l .data 00000000 trap_diag_hint_epc_str +800113dd l .data 00000000 trap_diag_hint_tval_str +800114c4 l .data 00000000 trap_diag_hint_ip_str +800110d1 l .data 00000000 trap_diag_generic_str +800100ba l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000fa40 l .data 00000000 trap_excpt_name_tbl +8000faa0 l .data 00000000 trap_int_name_tbl +8000fede l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000f9f0 l .data 00000000 csr_context_ret_addr +800100db l .data 00000000 mepcstr +800100eb l .data 00000000 mcausestr +8000fa00 l .data 00000000 saved_xcause +800100fb l .data 00000000 mtvalstr +8000fa08 l .data 00000000 saved_xtval +8001010b l .data 00000000 mstatusstr +8000fa10 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +800115f0 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010b9b l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fa40 l .data 00000000 end_failure_scratch +8000fae0 l .data 00000000 trap_excpt_name_0 +8000fb00 l .data 00000000 trap_excpt_name_1 +8000fb1a l .data 00000000 trap_excpt_name_2 +8000fb2f l .data 00000000 trap_excpt_name_3 +8000fb3b l .data 00000000 trap_excpt_name_4 +8000fb54 l .data 00000000 trap_excpt_name_5 +8000fb67 l .data 00000000 trap_excpt_name_6 +8000fb85 l .data 00000000 trap_excpt_name_7 +8000fb9d l .data 00000000 trap_excpt_name_8 +8000fbbb l .data 00000000 trap_excpt_name_9 +8000fbd9 l .data 00000000 trap_excpt_name_10 +8000fbf8 l .data 00000000 trap_excpt_name_11 +8000fc16 l .data 00000000 trap_excpt_name_12 +8000fc2e l .data 00000000 trap_excpt_name_13 +8000fc3f l .data 00000000 trap_excpt_name_14 +8000fc4e l .data 00000000 trap_excpt_name_15 +8000fc64 l .data 00000000 trap_excpt_name_16 +8000fc71 l .data 00000000 trap_excpt_name_17 +8000fc80 l .data 00000000 trap_excpt_name_18 +8000fc90 l .data 00000000 trap_excpt_name_19 +8000fca0 l .data 00000000 trap_excpt_name_20 +8000fcbe l .data 00000000 trap_excpt_name_21 +8000fcd5 l .data 00000000 trap_excpt_name_22 +8000fcea l .data 00000000 trap_excpt_name_23 +8000fd06 l .data 00000000 trap_int_name_0 +8000fd1e l .data 00000000 trap_int_name_1 +8000fd3d l .data 00000000 trap_int_name_2 +8000fd64 l .data 00000000 trap_int_name_3 +8000fd80 l .data 00000000 trap_int_name_4 +8000fd98 l .data 00000000 trap_int_name_5 +8000fdb4 l .data 00000000 trap_int_name_6 +8000fdd8 l .data 00000000 trap_int_name_7 +8000fdf1 l .data 00000000 trap_int_name_8 +8000fe09 l .data 00000000 trap_int_name_9 +8000fe28 l .data 00000000 trap_int_name_10 +8000fe4f l .data 00000000 trap_int_name_11 +8000fe6b l .data 00000000 trap_int_name_12 +8000fe90 l .data 00000000 trap_int_name_13 +8000feac l .data 00000000 trap_int_name_14 +8000fec5 l .data 00000000 trap_int_name_15 +80010087 l .data 00000000 xepcstr +80010725 l .data 00000000 Mclr_Vext_int_str +8001077f l .data 00000000 Sclr_Mext_int_str +80010820 l .data 00000000 Sclr_Vext_int_str +8001087a l .data 00000000 Hclr_Mext_int_str +8001091d l .data 00000000 Hclr_Vext_int_str +80010978 l .data 00000000 Vclr_Mext_int_str +800109c8 l .data 00000000 Vclr_Sext_int_str +80010a1b l .data 00000000 Vclr_Vext_int_str +800110ba l .data 00000000 trap_diag_curr_xepc_str +800206b0 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800206b0 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044d4 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800115f0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +8000447c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800115f0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800115ed g .data 00000000 rvtest_data_end +8000447c g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020800 g .tohost 00000000 fromhost +80020700 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x172908c2 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x48470438 +80000048: 0001ac03 lw x24,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_andn_cg_cp_rs1_b0: + andn x29, x0, x24 # perform operation +80000050: 41807eb3 andn x29,x0,x24 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_andn_cg_cp_rs1_b0, Zbkb_andn_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01d20863 beq x4,x29,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x4c6a54ac +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x08e3466d +80000074: 0001a403 lw x8,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_andn_cg_cp_rs1_b1: + andn x27, x1, x8 # perform operation +8000007c: 4080fdb3 andn x27,x1,x8 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkb_andn_cg_cp_rs1_b1, Zbkb_andn_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01b20863 beq x4,x27,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009021 .word 0x80009021 +80000094: 00410113 addi x2,x2,4 + + mv x15, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010793 addi x15,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x4cda3396 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x188ab33b +800000a4: 0001a083 lw x1,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_andn_cg_cp_rs1_b2: + andn x28, x2, x1 # perform operation +800000ac: 40117e33 andn x28,x2,x1 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zbkb_andn_cg_cp_rs1_b2, Zbkb_andn_cg_cp_rs1_b2_str) +800000b0: 0007a203 lw x4,0(x15) +800000b4: 01c20863 beq x4,x28,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009052 .word 0x80009052 +800000c4: 00478793 addi x15,x15,4 + + mv x21, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018a93 addi x21,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x4b27593e +800000cc: 000aa183 lw x3,0(x21) +800000d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x0332efca +800000d4: 000aad03 lw x26,0(x21) +800000d8: 004a8a93 addi x21,x21,4 + +800000dc : +Zbkb_andn_cg_cp_rs1_b3: + andn x6, x3, x26 # perform operation +800000dc: 41a1f333 andn x6,x3,x26 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_andn_cg_cp_rs1_b3, Zbkb_andn_cg_cp_rs1_b3_str) +800000e0: 0007a203 lw x4,0(x15) +800000e4: 00620863 beq x4,x6,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009083 .word 0x80009083 +800000f4: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x681c4ea5 +80000100: 000aa203 lw x4,0(x21) +80000104: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xa59c640e +80000108: 000aa603 lw x12,0(x21) +8000010c: 004a8a93 addi x21,x21,4 + +80000110 : +Zbkb_andn_cg_cp_rs1_b4: + andn x26, x4, x12 # perform operation +80000110: 40c27d33 andn x26,x4,x12 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_andn_cg_cp_rs1_b4, Zbkb_andn_cg_cp_rs1_b4_str) +80000114: 0007a383 lw x7,0(x15) +80000118: 01a38863 beq x7,x26,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090b4 .word 0x800090b4 +80000128: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x1cb5a19d +8000012c: 000aa283 lw x5,0(x21) +80000130: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0xb5216405 +80000134: 000aab03 lw x22,0(x21) +80000138: 004a8a93 addi x21,x21,4 + +8000013c : +Zbkb_andn_cg_cp_rs1_b5: + andn x26, x5, x22 # perform operation +8000013c: 4162fd33 andn x26,x5,x22 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_andn_cg_cp_rs1_b5, Zbkb_andn_cg_cp_rs1_b5_str) +80000140: 0007a383 lw x7,0(x15) +80000144: 01a38863 beq x7,x26,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 800090e5 .word 0x800090e5 +80000154: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xef0913e2 +80000158: 000aa303 lw x6,0(x21) +8000015c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x4bed17d3 +80000160: 000aaf03 lw x30,0(x21) +80000164: 004a8a93 addi x21,x21,4 + +80000168 : +Zbkb_andn_cg_cp_rs1_b6: + andn x14, x6, x30 # perform operation +80000168: 41e37733 andn x14,x6,x30 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_andn_cg_cp_rs1_b6, Zbkb_andn_cg_cp_rs1_b6_str) +8000016c: 0007a383 lw x7,0(x15) +80000170: 00e38863 beq x7,x14,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009116 .word 0x80009116 +80000180: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xf0d52c60 +8000018c: 000aa383 lw x7,0(x21) +80000190: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x20d8db53 +80000194: 000aad03 lw x26,0(x21) +80000198: 004a8a93 addi x21,x21,4 + +8000019c : +Zbkb_andn_cg_cp_rs1_b7: + andn x8, x7, x26 # perform operation +8000019c: 41a3f433 andn x8,x7,x26 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_andn_cg_cp_rs1_b7, Zbkb_andn_cg_cp_rs1_b7_str) +800001a0: 0007a683 lw x13,0(x15) +800001a4: 00868863 beq x13,x8,800001b4 +800001a8: 3980576f jal x14,80005540 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009147 .word 0x80009147 +800001b4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xc99968a6 +800001b8: 000aa403 lw x8,0(x21) +800001bc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xe1cc201c +800001c0: 000aa603 lw x12,0(x21) +800001c4: 004a8a93 addi x21,x21,4 + +800001c8 : +Zbkb_andn_cg_cp_rs1_b8: + andn x0, x8, x12 # perform operation +800001c8: 40c47033 andn x0,x8,x12 + # Check if x0 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x0, Zbkb_andn_cg_cp_rs1_b8, Zbkb_andn_cg_cp_rs1_b8_str) +800001cc: 0007a683 lw x13,0(x15) +800001d0: 00068863 beq x13,x0,800001e0 +800001d4: 36c0576f jal x14,80005540 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009178 .word 0x80009178 +800001e0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xa454172b +800001e4: 000aa483 lw x9,0(x21) +800001e8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xed652f84 +800001ec: 000aad03 lw x26,0(x21) +800001f0: 004a8a93 addi x21,x21,4 + +800001f4 : +Zbkb_andn_cg_cp_rs1_b9: + andn x28, x9, x26 # perform operation +800001f4: 41a4fe33 andn x28,x9,x26 + # Check if x28 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x28, Zbkb_andn_cg_cp_rs1_b9, Zbkb_andn_cg_cp_rs1_b9_str) +800001f8: 0007a683 lw x13,0(x15) +800001fc: 01c68863 beq x13,x28,8000020c +80000200: 3400576f jal x14,80005540 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091a9 .word 0x800091a9 +8000020c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x2da486f8 +80000210: 000aa503 lw x10,0(x21) +80000214: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xffcc1628 +80000218: 000aaf03 lw x30,0(x21) +8000021c: 004a8a93 addi x21,x21,4 + +80000220 : +Zbkb_andn_cg_cp_rs1_b10: + andn x19, x10, x30 # perform operation +80000220: 41e579b3 andn x19,x10,x30 + # Check if x19 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x19, Zbkb_andn_cg_cp_rs1_b10, Zbkb_andn_cg_cp_rs1_b10_str) +80000224: 0007a683 lw x13,0(x15) +80000228: 01368863 beq x13,x19,80000238 +8000022c: 3140576f jal x14,80005540 +80000230: 80000220 .word 0x80000220 +80000234: 800091db .word 0x800091db +80000238: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x754145ad +8000023c: 000aa583 lw x11,0(x21) +80000240: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xe27f2722 +80000244: 000aa103 lw x2,0(x21) +80000248: 004a8a93 addi x21,x21,4 + +8000024c : +Zbkb_andn_cg_cp_rs1_b11: + andn x18, x11, x2 # perform operation +8000024c: 4025f933 andn x18,x11,x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x18, Zbkb_andn_cg_cp_rs1_b11, Zbkb_andn_cg_cp_rs1_b11_str) +80000250: 0007a683 lw x13,0(x15) +80000254: 01268863 beq x13,x18,80000264 +80000258: 2e80576f jal x14,80005540 +8000025c: 8000024c .word 0x8000024c +80000260: 8000920e .word 0x8000920e +80000264: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xa9549b75 +80000268: 000aa603 lw x12,0(x21) +8000026c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x8edea332 +80000270: 000aae03 lw x28,0(x21) +80000274: 004a8a93 addi x21,x21,4 + +80000278 : +Zbkb_andn_cg_cp_rs1_b12: + andn x25, x12, x28 # perform operation +80000278: 41c67cb3 andn x25,x12,x28 + # Check if x25 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x25, Zbkb_andn_cg_cp_rs1_b12, Zbkb_andn_cg_cp_rs1_b12_str) +8000027c: 0007a683 lw x13,0(x15) +80000280: 01968863 beq x13,x25,80000290 +80000284: 2bc0576f jal x14,80005540 +80000288: 80000278 .word 0x80000278 +8000028c: 80009241 .word 0x80009241 +80000290: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000294: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000298: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x4cf254eb +8000029c: 000aa683 lw x13,0(x21) +800002a0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xf32458c4 +800002a4: 000aaf03 lw x30,0(x21) +800002a8: 004a8a93 addi x21,x21,4 + +800002ac : +Zbkb_andn_cg_cp_rs1_b13: + andn x24, x13, x30 # perform operation +800002ac: 41e6fc33 andn x24,x13,x30 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_andn_cg_cp_rs1_b13, Zbkb_andn_cg_cp_rs1_b13_str) +800002b0: 0007a383 lw x7,0(x15) +800002b4: 01838863 beq x7,x24,800002c4 +800002b8: 2600546f jal x8,80005518 +800002bc: 800002ac .word 0x800002ac +800002c0: 80009274 .word 0x80009274 +800002c4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xea82f9b6 +800002c8: 000aa703 lw x14,0(x21) +800002cc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xaedd795c +800002d0: 000aa203 lw x4,0(x21) +800002d4: 004a8a93 addi x21,x21,4 + +800002d8 : +Zbkb_andn_cg_cp_rs1_b14: + andn x12, x14, x4 # perform operation +800002d8: 40477633 andn x12,x14,x4 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_andn_cg_cp_rs1_b14, Zbkb_andn_cg_cp_rs1_b14_str) +800002dc: 0007a383 lw x7,0(x15) +800002e0: 00c38863 beq x7,x12,800002f0 +800002e4: 2340546f jal x8,80005518 +800002e8: 800002d8 .word 0x800002d8 +800002ec: 800092a7 .word 0x800092a7 +800002f0: 00478793 addi x15,x15,4 + + mv x3, x15 # switch signature pointer register to avoid conflict with test +800002f4: 00078193 addi x3,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xf6cbf169 +800002f8: 000aa783 lw x15,0(x21) +800002fc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xa4a38357 +80000300: 000aa803 lw x16,0(x21) +80000304: 004a8a93 addi x21,x21,4 + +80000308 : +Zbkb_andn_cg_cp_rs1_b15: + andn x9, x15, x16 # perform operation +80000308: 4107f4b3 andn x9,x15,x16 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cp_rs1_b15, Zbkb_andn_cg_cp_rs1_b15_str) +8000030c: 0001a383 lw x7,0(x3) +80000310: 00938863 beq x7,x9,80000320 +80000314: 2040546f jal x8,80005518 +80000318: 80000308 .word 0x80000308 +8000031c: 800092da .word 0x800092da +80000320: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x001d7a86 +80000324: 000aa803 lw x16,0(x21) +80000328: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x2d8aed7b +8000032c: 000aa283 lw x5,0(x21) +80000330: 004a8a93 addi x21,x21,4 + +80000334 : +Zbkb_andn_cg_cp_rs1_b16: + andn x4, x16, x5 # perform operation +80000334: 40587233 andn x4,x16,x5 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cp_rs1_b16, Zbkb_andn_cg_cp_rs1_b16_str) +80000338: 0001a383 lw x7,0(x3) +8000033c: 00438863 beq x7,x4,8000034c +80000340: 1d80546f jal x8,80005518 +80000344: 80000334 .word 0x80000334 +80000348: 8000930d .word 0x8000930d +8000034c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x77daf72c +80000350: 000aa883 lw x17,0(x21) +80000354: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x5d816f22 +80000358: 000aa103 lw x2,0(x21) +8000035c: 004a8a93 addi x21,x21,4 + +80000360 : +Zbkb_andn_cg_cp_rs1_b17: + andn x28, x17, x2 # perform operation +80000360: 4028fe33 andn x28,x17,x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cp_rs1_b17, Zbkb_andn_cg_cp_rs1_b17_str) +80000364: 0001a383 lw x7,0(x3) +80000368: 01c38863 beq x7,x28,80000378 +8000036c: 1ac0546f jal x8,80005518 +80000370: 80000360 .word 0x80000360 +80000374: 80009340 .word 0x80009340 +80000378: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xa1b2c765 +8000037c: 000aa903 lw x18,0(x21) +80000380: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x8c3ad72d +80000384: 000aa803 lw x16,0(x21) +80000388: 004a8a93 addi x21,x21,4 + +8000038c : +Zbkb_andn_cg_cp_rs1_b18: + andn x26, x18, x16 # perform operation +8000038c: 41097d33 andn x26,x18,x16 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cp_rs1_b18, Zbkb_andn_cg_cp_rs1_b18_str) +80000390: 0001a383 lw x7,0(x3) +80000394: 01a38863 beq x7,x26,800003a4 +80000398: 1800546f jal x8,80005518 +8000039c: 8000038c .word 0x8000038c +800003a0: 80009373 .word 0x80009373 +800003a4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xbcd2569a +800003a8: 000aa983 lw x19,0(x21) +800003ac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x81c7f0a3 +800003b0: 000aa483 lw x9,0(x21) +800003b4: 004a8a93 addi x21,x21,4 + +800003b8 : +Zbkb_andn_cg_cp_rs1_b19: + andn x0, x19, x9 # perform operation +800003b8: 4099f033 andn x0,x19,x9 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_andn_cg_cp_rs1_b19, Zbkb_andn_cg_cp_rs1_b19_str) +800003bc: 0001a383 lw x7,0(x3) +800003c0: 00038863 beq x7,x0,800003d0 +800003c4: 1540546f jal x8,80005518 +800003c8: 800003b8 .word 0x800003b8 +800003cc: 800093a6 .word 0x800093a6 +800003d0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x5580f0f2 +800003d4: 000aaa03 lw x20,0(x21) +800003d8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x78037dab +800003dc: 000aa983 lw x19,0(x21) +800003e0: 004a8a93 addi x21,x21,4 + +800003e4 : +Zbkb_andn_cg_cp_rs1_b20: + andn x26, x20, x19 # perform operation +800003e4: 413a7d33 andn x26,x20,x19 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cp_rs1_b20, Zbkb_andn_cg_cp_rs1_b20_str) +800003e8: 0001a383 lw x7,0(x3) +800003ec: 01a38863 beq x7,x26,800003fc +800003f0: 1280546f jal x8,80005518 +800003f4: 800003e4 .word 0x800003e4 +800003f8: 800093d9 .word 0x800093d9 +800003fc: 00418193 addi x3,x3,4 + + mv x19, x21 # switch data pointer register to avoid conflict with test +80000400: 000a8993 addi x19,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0xdfc8e94e +80000404: 0009aa83 lw x21,0(x19) +80000408: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x72d4b8c8 +8000040c: 0009ad83 lw x27,0(x19) +80000410: 00498993 addi x19,x19,4 + +80000414 : +Zbkb_andn_cg_cp_rs1_b21: + andn x6, x21, x27 # perform operation +80000414: 41baf333 andn x6,x21,x27 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cp_rs1_b21, Zbkb_andn_cg_cp_rs1_b21_str) +80000418: 0001a383 lw x7,0(x3) +8000041c: 00638863 beq x7,x6,8000042c +80000420: 0f80546f jal x8,80005518 +80000424: 80000414 .word 0x80000414 +80000428: 8000940c .word 0x8000940c +8000042c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0xe0f165a6 +80000430: 0009ab03 lw x22,0(x19) +80000434: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0xc61e2ebd +80000438: 0009ae03 lw x28,0(x19) +8000043c: 00498993 addi x19,x19,4 + +80000440 : +Zbkb_andn_cg_cp_rs1_b22: + andn x5, x22, x28 # perform operation +80000440: 41cb72b3 andn x5,x22,x28 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cp_rs1_b22, Zbkb_andn_cg_cp_rs1_b22_str) +80000444: 0001a383 lw x7,0(x3) +80000448: 00538863 beq x7,x5,80000458 +8000044c: 0cc0546f jal x8,80005518 +80000450: 80000440 .word 0x80000440 +80000454: 8000943f .word 0x8000943f +80000458: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x243a3ec4 +8000045c: 0009ab83 lw x23,0(x19) +80000460: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x7ddf1792 +80000464: 0009a603 lw x12,0(x19) +80000468: 00498993 addi x19,x19,4 + +8000046c : +Zbkb_andn_cg_cp_rs1_b23: + andn x29, x23, x12 # perform operation +8000046c: 40cbfeb3 andn x29,x23,x12 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cp_rs1_b23, Zbkb_andn_cg_cp_rs1_b23_str) +80000470: 0001a383 lw x7,0(x3) +80000474: 01d38863 beq x7,x29,80000484 +80000478: 0a00546f jal x8,80005518 +8000047c: 8000046c .word 0x8000046c +80000480: 80009472 .word 0x80009472 +80000484: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x5d487171 +80000488: 0009ac03 lw x24,0(x19) +8000048c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x7d482d70 +80000490: 0009ae03 lw x28,0(x19) +80000494: 00498993 addi x19,x19,4 + +80000498 : +Zbkb_andn_cg_cp_rs1_b24: + andn x16, x24, x28 # perform operation +80000498: 41cc7833 andn x16,x24,x28 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cp_rs1_b24, Zbkb_andn_cg_cp_rs1_b24_str) +8000049c: 0001a383 lw x7,0(x3) +800004a0: 01038863 beq x7,x16,800004b0 +800004a4: 0740546f jal x8,80005518 +800004a8: 80000498 .word 0x80000498 +800004ac: 800094a5 .word 0x800094a5 +800004b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x9705e389 +800004b4: 0009ac83 lw x25,0(x19) +800004b8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x4a046bb9 +800004bc: 0009ad03 lw x26,0(x19) +800004c0: 00498993 addi x19,x19,4 + +800004c4 : +Zbkb_andn_cg_cp_rs1_b25: + andn x13, x25, x26 # perform operation +800004c4: 41acf6b3 andn x13,x25,x26 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cp_rs1_b25, Zbkb_andn_cg_cp_rs1_b25_str) +800004c8: 0001a383 lw x7,0(x3) +800004cc: 00d38863 beq x7,x13,800004dc +800004d0: 0480546f jal x8,80005518 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 800094d8 .word 0x800094d8 +800004dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x11765e8e +800004e0: 0009ad03 lw x26,0(x19) +800004e4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xb1b8af65 +800004e8: 0009a683 lw x13,0(x19) +800004ec: 00498993 addi x19,x19,4 + +800004f0 : +Zbkb_andn_cg_cp_rs1_b26: + andn x9, x26, x13 # perform operation +800004f0: 40dd74b3 andn x9,x26,x13 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cp_rs1_b26, Zbkb_andn_cg_cp_rs1_b26_str) +800004f4: 0001a383 lw x7,0(x3) +800004f8: 00938863 beq x7,x9,80000508 +800004fc: 01c0546f jal x8,80005518 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000950b .word 0x8000950b +80000508: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0xfff4ca2f +8000050c: 0009ad83 lw x27,0(x19) +80000510: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x99419512 +80000514: 0009a483 lw x9,0(x19) +80000518: 00498993 addi x19,x19,4 + +8000051c : +Zbkb_andn_cg_cp_rs1_b27: + andn x21, x27, x9 # perform operation +8000051c: 409dfab3 andn x21,x27,x9 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cp_rs1_b27, Zbkb_andn_cg_cp_rs1_b27_str) +80000520: 0001a383 lw x7,0(x3) +80000524: 01538863 beq x7,x21,80000534 +80000528: 7f10446f jal x8,80005518 +8000052c: 8000051c .word 0x8000051c +80000530: 8000953e .word 0x8000953e +80000534: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xd393b5df +80000538: 0009ae03 lw x28,0(x19) +8000053c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0xdffaf1ca +80000540: 0009aa03 lw x20,0(x19) +80000544: 00498993 addi x19,x19,4 + +80000548 : +Zbkb_andn_cg_cp_rs1_b28: + andn x6, x28, x20 # perform operation +80000548: 414e7333 andn x6,x28,x20 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cp_rs1_b28, Zbkb_andn_cg_cp_rs1_b28_str) +8000054c: 0001a383 lw x7,0(x3) +80000550: 00638863 beq x7,x6,80000560 +80000554: 7c50446f jal x8,80005518 +80000558: 80000548 .word 0x80000548 +8000055c: 80009571 .word 0x80009571 +80000560: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x486b200e +80000564: 0009ae83 lw x29,0(x19) +80000568: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x3c3a571c +8000056c: 0009a583 lw x11,0(x19) +80000570: 00498993 addi x19,x19,4 + +80000574 : +Zbkb_andn_cg_cp_rs1_b29: + andn x0, x29, x11 # perform operation +80000574: 40bef033 andn x0,x29,x11 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_andn_cg_cp_rs1_b29, Zbkb_andn_cg_cp_rs1_b29_str) +80000578: 0001a383 lw x7,0(x3) +8000057c: 00038863 beq x7,x0,8000058c +80000580: 7990446f jal x8,80005518 +80000584: 80000574 .word 0x80000574 +80000588: 800095a4 .word 0x800095a4 +8000058c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xca4cd147 +80000590: 0009af03 lw x30,0(x19) +80000594: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xedb04a20 +80000598: 0009a703 lw x14,0(x19) +8000059c: 00498993 addi x19,x19,4 + +800005a0 : +Zbkb_andn_cg_cp_rs1_b30: + andn x20, x30, x14 # perform operation +800005a0: 40ef7a33 andn x20,x30,x14 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cp_rs1_b30, Zbkb_andn_cg_cp_rs1_b30_str) +800005a4: 0001a383 lw x7,0(x3) +800005a8: 01438863 beq x7,x20,800005b8 +800005ac: 76d0446f jal x8,80005518 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 800095d7 .word 0x800095d7 +800005b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x9e725c4f +800005bc: 0009af83 lw x31,0(x19) +800005c0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x156efa09 +800005c4: 0009aa03 lw x20,0(x19) +800005c8: 00498993 addi x19,x19,4 + +800005cc : +Zbkb_andn_cg_cp_rs1_b31: + andn x0, x31, x20 # perform operation +800005cc: 414ff033 andn x0,x31,x20 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_andn_cg_cp_rs1_b31, Zbkb_andn_cg_cp_rs1_b31_str) +800005d0: 0001a383 lw x7,0(x3) +800005d4: 00038863 beq x7,x0,800005e4 +800005d8: 7410446f jal x8,80005518 +800005dc: 800005cc .word 0x800005cc +800005e0: 8000960a .word 0x8000960a +800005e4: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xe6135d02 +800005e8: 0009aa03 lw x20,0(x19) +800005ec: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xfbc8c0b0 +800005f0: 0009a003 lw x0,0(x19) +800005f4: 00498993 addi x19,x19,4 + +800005f8 : +Zbkb_andn_cg_cp_rs2_b0: + andn x25, x20, x0 # perform operation +800005f8: 400a7cb3 andn x25,x20,x0 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cp_rs2_b0, Zbkb_andn_cg_cp_rs2_b0_str) +800005fc: 0001a383 lw x7,0(x3) +80000600: 01938863 beq x7,x25,80000610 +80000604: 7150446f jal x8,80005518 +80000608: 800005f8 .word 0x800005f8 +8000060c: 8000963d .word 0x8000963d +80000610: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x0995c3b2 +80000614: 0009ac03 lw x24,0(x19) +80000618: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xa1f362b8 +8000061c: 0009a083 lw x1,0(x19) +80000620: 00498993 addi x19,x19,4 + +80000624 : +Zbkb_andn_cg_cp_rs2_b1: + andn x6, x24, x1 # perform operation +80000624: 401c7333 andn x6,x24,x1 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cp_rs2_b1, Zbkb_andn_cg_cp_rs2_b1_str) +80000628: 0001a383 lw x7,0(x3) +8000062c: 00638863 beq x7,x6,8000063c +80000630: 6e90446f jal x8,80005518 +80000634: 80000624 .word 0x80000624 +80000638: 8000966f .word 0x8000966f +8000063c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x76558190 +80000640: 0009a903 lw x18,0(x19) +80000644: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x6d7a109f +80000648: 0009a103 lw x2,0(x19) +8000064c: 00498993 addi x19,x19,4 + +80000650 : +Zbkb_andn_cg_cp_rs2_b2: + andn x15, x18, x2 # perform operation +80000650: 402977b3 andn x15,x18,x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cp_rs2_b2, Zbkb_andn_cg_cp_rs2_b2_str) +80000654: 0001a383 lw x7,0(x3) +80000658: 00f38863 beq x7,x15,80000668 +8000065c: 6bd0446f jal x8,80005518 +80000660: 80000650 .word 0x80000650 +80000664: 800096a1 .word 0x800096a1 +80000668: 00418193 addi x3,x3,4 + + mv x2, x3 # switch signature pointer register to avoid conflict with test +8000066c: 00018113 addi x2,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xfe6458d6 +80000670: 0009ae03 lw x28,0(x19) +80000674: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x1877716a +80000678: 0009a183 lw x3,0(x19) +8000067c: 00498993 addi x19,x19,4 + +80000680 : +Zbkb_andn_cg_cp_rs2_b3: + andn x16, x28, x3 # perform operation +80000680: 403e7833 andn x16,x28,x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkb_andn_cg_cp_rs2_b3, Zbkb_andn_cg_cp_rs2_b3_str) +80000684: 00012383 lw x7,0(x2) +80000688: 01038863 beq x7,x16,80000698 +8000068c: 68d0446f jal x8,80005518 +80000690: 80000680 .word 0x80000680 +80000694: 800096d3 .word 0x800096d3 +80000698: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x9ce4f645 +8000069c: 0009a003 lw x0,0(x19) +800006a0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x68676199 +800006a4: 0009a203 lw x4,0(x19) +800006a8: 00498993 addi x19,x19,4 + +800006ac : +Zbkb_andn_cg_cp_rs2_b4: + andn x20, x0, x4 # perform operation +800006ac: 40407a33 andn x20,x0,x4 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkb_andn_cg_cp_rs2_b4, Zbkb_andn_cg_cp_rs2_b4_str) +800006b0: 00012383 lw x7,0(x2) +800006b4: 01438863 beq x7,x20,800006c4 +800006b8: 6610446f jal x8,80005518 +800006bc: 800006ac .word 0x800006ac +800006c0: 80009705 .word 0x80009705 +800006c4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xacc7b4b0 +800006c8: 0009a883 lw x17,0(x19) +800006cc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x26033362 +800006d0: 0009a283 lw x5,0(x19) +800006d4: 00498993 addi x19,x19,4 + +800006d8 : +Zbkb_andn_cg_cp_rs2_b5: + andn x12, x17, x5 # perform operation +800006d8: 4058f633 andn x12,x17,x5 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkb_andn_cg_cp_rs2_b5, Zbkb_andn_cg_cp_rs2_b5_str) +800006dc: 00012383 lw x7,0(x2) +800006e0: 00c38863 beq x7,x12,800006f0 +800006e4: 6350446f jal x8,80005518 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80009737 .word 0x80009737 +800006f0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x65992dd5 +800006f4: 0009a883 lw x17,0(x19) +800006f8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0xb0c7304b +800006fc: 0009a303 lw x6,0(x19) +80000700: 00498993 addi x19,x19,4 + +80000704 : +Zbkb_andn_cg_cp_rs2_b6: + andn x14, x17, x6 # perform operation +80000704: 4068f733 andn x14,x17,x6 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkb_andn_cg_cp_rs2_b6, Zbkb_andn_cg_cp_rs2_b6_str) +80000708: 00012383 lw x7,0(x2) +8000070c: 00e38863 beq x7,x14,8000071c +80000710: 6090446f jal x8,80005518 +80000714: 80000704 .word 0x80000704 +80000718: 80009769 .word 0x80009769 +8000071c: 00410113 addi x2,x2,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000724: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0xc20950ab +80000728: 0009a803 lw x16,0(x19) +8000072c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xdc3abb56 +80000730: 0009a383 lw x7,0(x19) +80000734: 00498993 addi x19,x19,4 + +80000738 : +Zbkb_andn_cg_cp_rs2_b7: + andn x31, x16, x7 # perform operation +80000738: 40787fb3 andn x31,x16,x7 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_andn_cg_cp_rs2_b7, Zbkb_andn_cg_cp_rs2_b7_str) +8000073c: 00012203 lw x4,0(x2) +80000740: 01f20863 beq x4,x31,80000750 +80000744: 5bd042ef jal x5,80005500 +80000748: 80000738 .word 0x80000738 +8000074c: 8000979b .word 0x8000979b +80000750: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xf821e772 +80000754: 0009ae83 lw x29,0(x19) +80000758: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x184a026a +8000075c: 0009a403 lw x8,0(x19) +80000760: 00498993 addi x19,x19,4 + +80000764 : +Zbkb_andn_cg_cp_rs2_b8: + andn x24, x29, x8 # perform operation +80000764: 408efc33 andn x24,x29,x8 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_andn_cg_cp_rs2_b8, Zbkb_andn_cg_cp_rs2_b8_str) +80000768: 00012203 lw x4,0(x2) +8000076c: 01820863 beq x4,x24,8000077c +80000770: 591042ef jal x5,80005500 +80000774: 80000764 .word 0x80000764 +80000778: 800097cd .word 0x800097cd +8000077c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x7fd5c682 +80000780: 0009a603 lw x12,0(x19) +80000784: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x5337beb1 +80000788: 0009a483 lw x9,0(x19) +8000078c: 00498993 addi x19,x19,4 + +80000790 : +Zbkb_andn_cg_cp_rs2_b9: + andn x8, x12, x9 # perform operation +80000790: 40967433 andn x8,x12,x9 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zbkb_andn_cg_cp_rs2_b9, Zbkb_andn_cg_cp_rs2_b9_str) +80000794: 00012203 lw x4,0(x2) +80000798: 00820863 beq x4,x8,800007a8 +8000079c: 565042ef jal x5,80005500 +800007a0: 80000790 .word 0x80000790 +800007a4: 800097ff .word 0x800097ff +800007a8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x96b7c3cf +800007ac: 0009a003 lw x0,0(x19) +800007b0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x7038bcb6 +800007b4: 0009a503 lw x10,0(x19) +800007b8: 00498993 addi x19,x19,4 + +800007bc : +Zbkb_andn_cg_cp_rs2_b10: + andn x22, x0, x10 # perform operation +800007bc: 40a07b33 andn x22,x0,x10 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkb_andn_cg_cp_rs2_b10, Zbkb_andn_cg_cp_rs2_b10_str) +800007c0: 00012203 lw x4,0(x2) +800007c4: 01620863 beq x4,x22,800007d4 +800007c8: 539042ef jal x5,80005500 +800007cc: 800007bc .word 0x800007bc +800007d0: 80009831 .word 0x80009831 +800007d4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x2e33e084 +800007d8: 0009a783 lw x15,0(x19) +800007dc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xcbbc155b +800007e0: 0009a583 lw x11,0(x19) +800007e4: 00498993 addi x19,x19,4 + +800007e8 : +Zbkb_andn_cg_cp_rs2_b11: + andn x7, x15, x11 # perform operation +800007e8: 40b7f3b3 andn x7,x15,x11 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkb_andn_cg_cp_rs2_b11, Zbkb_andn_cg_cp_rs2_b11_str) +800007ec: 00012203 lw x4,0(x2) +800007f0: 00720863 beq x4,x7,80000800 +800007f4: 50d042ef jal x5,80005500 +800007f8: 800007e8 .word 0x800007e8 +800007fc: 80009864 .word 0x80009864 +80000800: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0xb66b2184 +80000804: 0009aa83 lw x21,0(x19) +80000808: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xbe06cc33 +8000080c: 0009a603 lw x12,0(x19) +80000810: 00498993 addi x19,x19,4 + +80000814 : +Zbkb_andn_cg_cp_rs2_b12: + andn x20, x21, x12 # perform operation +80000814: 40cafa33 andn x20,x21,x12 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkb_andn_cg_cp_rs2_b12, Zbkb_andn_cg_cp_rs2_b12_str) +80000818: 00012203 lw x4,0(x2) +8000081c: 01420863 beq x4,x20,8000082c +80000820: 4e1042ef jal x5,80005500 +80000824: 80000814 .word 0x80000814 +80000828: 80009897 .word 0x80009897 +8000082c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xfa5fc6f0 +80000830: 0009a303 lw x6,0(x19) +80000834: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x3e079296 +80000838: 0009a683 lw x13,0(x19) +8000083c: 00498993 addi x19,x19,4 + +80000840 : +Zbkb_andn_cg_cp_rs2_b13: + andn x1, x6, x13 # perform operation +80000840: 40d370b3 andn x1,x6,x13 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_andn_cg_cp_rs2_b13, Zbkb_andn_cg_cp_rs2_b13_str) +80000844: 00012203 lw x4,0(x2) +80000848: 00120863 beq x4,x1,80000858 +8000084c: 4b5042ef jal x5,80005500 +80000850: 80000840 .word 0x80000840 +80000854: 800098ca .word 0x800098ca +80000858: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xddcf0494 +8000085c: 0009a883 lw x17,0(x19) +80000860: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x19d249ad +80000864: 0009a703 lw x14,0(x19) +80000868: 00498993 addi x19,x19,4 + +8000086c : +Zbkb_andn_cg_cp_rs2_b14: + andn x28, x17, x14 # perform operation +8000086c: 40e8fe33 andn x28,x17,x14 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_andn_cg_cp_rs2_b14, Zbkb_andn_cg_cp_rs2_b14_str) +80000870: 00012203 lw x4,0(x2) +80000874: 01c20863 beq x4,x28,80000884 +80000878: 489042ef jal x5,80005500 +8000087c: 8000086c .word 0x8000086c +80000880: 800098fd .word 0x800098fd +80000884: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x322aca13 +80000888: 0009a083 lw x1,0(x19) +8000088c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x78068744 +80000890: 0009a783 lw x15,0(x19) +80000894: 00498993 addi x19,x19,4 + +80000898 : +Zbkb_andn_cg_cp_rs2_b15: + andn x29, x1, x15 # perform operation +80000898: 40f0feb3 andn x29,x1,x15 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_andn_cg_cp_rs2_b15, Zbkb_andn_cg_cp_rs2_b15_str) +8000089c: 00012203 lw x4,0(x2) +800008a0: 01d20863 beq x4,x29,800008b0 +800008a4: 45d042ef jal x5,80005500 +800008a8: 80000898 .word 0x80000898 +800008ac: 80009930 .word 0x80009930 +800008b0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xae0ffe8f +800008b4: 0009a183 lw x3,0(x19) +800008b8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x61ec2824 +800008bc: 0009a803 lw x16,0(x19) +800008c0: 00498993 addi x19,x19,4 + +800008c4 : +Zbkb_andn_cg_cp_rs2_b16: + andn x9, x3, x16 # perform operation +800008c4: 4101f4b3 andn x9,x3,x16 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkb_andn_cg_cp_rs2_b16, Zbkb_andn_cg_cp_rs2_b16_str) +800008c8: 00012203 lw x4,0(x2) +800008cc: 00920863 beq x4,x9,800008dc +800008d0: 431042ef jal x5,80005500 +800008d4: 800008c4 .word 0x800008c4 +800008d8: 80009963 .word 0x80009963 +800008dc: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x6f4e3fea +800008e0: 0009af03 lw x30,0(x19) +800008e4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xfd8cb48b +800008e8: 0009a883 lw x17,0(x19) +800008ec: 00498993 addi x19,x19,4 + +800008f0 : +Zbkb_andn_cg_cp_rs2_b17: + andn x31, x30, x17 # perform operation +800008f0: 411f7fb3 andn x31,x30,x17 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_andn_cg_cp_rs2_b17, Zbkb_andn_cg_cp_rs2_b17_str) +800008f4: 00012203 lw x4,0(x2) +800008f8: 01f20863 beq x4,x31,80000908 +800008fc: 405042ef jal x5,80005500 +80000900: 800008f0 .word 0x800008f0 +80000904: 80009996 .word 0x80009996 +80000908: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0xa95ddebf +8000090c: 0009ac83 lw x25,0(x19) +80000910: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x21cf90b0 +80000914: 0009a903 lw x18,0(x19) +80000918: 00498993 addi x19,x19,4 + +8000091c : +Zbkb_andn_cg_cp_rs2_b18: + andn x26, x25, x18 # perform operation +8000091c: 412cfd33 andn x26,x25,x18 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_andn_cg_cp_rs2_b18, Zbkb_andn_cg_cp_rs2_b18_str) +80000920: 00012203 lw x4,0(x2) +80000924: 01a20863 beq x4,x26,80000934 +80000928: 3d9042ef jal x5,80005500 +8000092c: 8000091c .word 0x8000091c +80000930: 800099c9 .word 0x800099c9 +80000934: 00410113 addi x2,x2,4 + + mv x25, x19 # switch data pointer register to avoid conflict with test +80000938: 00098c93 addi x25,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xe7414d6f +8000093c: 000ca583 lw x11,0(x25) +80000940: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xabe0c385 +80000944: 000ca983 lw x19,0(x25) +80000948: 004c8c93 addi x25,x25,4 + +8000094c : +Zbkb_andn_cg_cp_rs2_b19: + andn x31, x11, x19 # perform operation +8000094c: 4135ffb3 andn x31,x11,x19 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_andn_cg_cp_rs2_b19, Zbkb_andn_cg_cp_rs2_b19_str) +80000950: 00012203 lw x4,0(x2) +80000954: 01f20863 beq x4,x31,80000964 +80000958: 3a9042ef jal x5,80005500 +8000095c: 8000094c .word 0x8000094c +80000960: 800099fc .word 0x800099fc +80000964: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0xcbaf8b8c +80000968: 000ca483 lw x9,0(x25) +8000096c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x45d0f966 +80000970: 000caa03 lw x20,0(x25) +80000974: 004c8c93 addi x25,x25,4 + +80000978 : +Zbkb_andn_cg_cp_rs2_b20: + andn x24, x9, x20 # perform operation +80000978: 4144fc33 andn x24,x9,x20 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_andn_cg_cp_rs2_b20, Zbkb_andn_cg_cp_rs2_b20_str) +8000097c: 00012203 lw x4,0(x2) +80000980: 01820863 beq x4,x24,80000990 +80000984: 37d042ef jal x5,80005500 +80000988: 80000978 .word 0x80000978 +8000098c: 80009a2f .word 0x80009a2f +80000990: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x9f738137 +80000994: 000ca583 lw x11,0(x25) +80000998: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x7e8050d3 +8000099c: 000caa83 lw x21,0(x25) +800009a0: 004c8c93 addi x25,x25,4 + +800009a4 : +Zbkb_andn_cg_cp_rs2_b21: + andn x16, x11, x21 # perform operation +800009a4: 4155f833 andn x16,x11,x21 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkb_andn_cg_cp_rs2_b21, Zbkb_andn_cg_cp_rs2_b21_str) +800009a8: 00012203 lw x4,0(x2) +800009ac: 01020863 beq x4,x16,800009bc +800009b0: 351042ef jal x5,80005500 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 80009a62 .word 0x80009a62 +800009bc: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x8a7cc794 +800009c0: 000ca983 lw x19,0(x25) +800009c4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x7381700a +800009c8: 000cab03 lw x22,0(x25) +800009cc: 004c8c93 addi x25,x25,4 + +800009d0 : +Zbkb_andn_cg_cp_rs2_b22: + andn x28, x19, x22 # perform operation +800009d0: 4169fe33 andn x28,x19,x22 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_andn_cg_cp_rs2_b22, Zbkb_andn_cg_cp_rs2_b22_str) +800009d4: 00012203 lw x4,0(x2) +800009d8: 01c20863 beq x4,x28,800009e8 +800009dc: 325042ef jal x5,80005500 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 80009a95 .word 0x80009a95 +800009e8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x2d606cb4 +800009ec: 000ca083 lw x1,0(x25) +800009f0: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xb8a5571b +800009f4: 000cab83 lw x23,0(x25) +800009f8: 004c8c93 addi x25,x25,4 + +800009fc : +Zbkb_andn_cg_cp_rs2_b23: + andn x14, x1, x23 # perform operation +800009fc: 4170f733 andn x14,x1,x23 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zbkb_andn_cg_cp_rs2_b23, Zbkb_andn_cg_cp_rs2_b23_str) +80000a00: 00012203 lw x4,0(x2) +80000a04: 00e20863 beq x4,x14,80000a14 +80000a08: 2f9042ef jal x5,80005500 +80000a0c: 800009fc .word 0x800009fc +80000a10: 80009ac8 .word 0x80009ac8 +80000a14: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0xc12edd91 +80000a18: 000caf03 lw x30,0(x25) +80000a1c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x872e5853 +80000a20: 000cac03 lw x24,0(x25) +80000a24: 004c8c93 addi x25,x25,4 + +80000a28 : +Zbkb_andn_cg_cp_rs2_b24: + andn x22, x30, x24 # perform operation +80000a28: 418f7b33 andn x22,x30,x24 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkb_andn_cg_cp_rs2_b24, Zbkb_andn_cg_cp_rs2_b24_str) +80000a2c: 00012203 lw x4,0(x2) +80000a30: 01620863 beq x4,x22,80000a40 +80000a34: 2cd042ef jal x5,80005500 +80000a38: 80000a28 .word 0x80000a28 +80000a3c: 80009afb .word 0x80009afb +80000a40: 00410113 addi x2,x2,4 + + mv x9, x25 # switch data pointer register to avoid conflict with test +80000a44: 000c8493 addi x9,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x9ba73a4e +80000a48: 0004aa83 lw x21,0(x9) +80000a4c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x8ad84438 +80000a50: 0004ac83 lw x25,0(x9) +80000a54: 00448493 addi x9,x9,4 + +80000a58 : +Zbkb_andn_cg_cp_rs2_b25: + andn x10, x21, x25 # perform operation +80000a58: 419af533 andn x10,x21,x25 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zbkb_andn_cg_cp_rs2_b25, Zbkb_andn_cg_cp_rs2_b25_str) +80000a5c: 00012203 lw x4,0(x2) +80000a60: 00a20863 beq x4,x10,80000a70 +80000a64: 29d042ef jal x5,80005500 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 80009b2e .word 0x80009b2e +80000a70: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x1d70f1c6 +80000a74: 0004a903 lw x18,0(x9) +80000a78: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xa63f5689 +80000a7c: 0004ad03 lw x26,0(x9) +80000a80: 00448493 addi x9,x9,4 + +80000a84 : +Zbkb_andn_cg_cp_rs2_b26: + andn x3, x18, x26 # perform operation +80000a84: 41a971b3 andn x3,x18,x26 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zbkb_andn_cg_cp_rs2_b26, Zbkb_andn_cg_cp_rs2_b26_str) +80000a88: 00012203 lw x4,0(x2) +80000a8c: 00320863 beq x4,x3,80000a9c +80000a90: 271042ef jal x5,80005500 +80000a94: 80000a84 .word 0x80000a84 +80000a98: 80009b61 .word 0x80009b61 +80000a9c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xf0453e5d +80000aa0: 0004a583 lw x11,0(x9) +80000aa4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x6218660a +80000aa8: 0004ad83 lw x27,0(x9) +80000aac: 00448493 addi x9,x9,4 + +80000ab0 : +Zbkb_andn_cg_cp_rs2_b27: + andn x13, x11, x27 # perform operation +80000ab0: 41b5f6b3 andn x13,x11,x27 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_andn_cg_cp_rs2_b27, Zbkb_andn_cg_cp_rs2_b27_str) +80000ab4: 00012203 lw x4,0(x2) +80000ab8: 00d20863 beq x4,x13,80000ac8 +80000abc: 245042ef jal x5,80005500 +80000ac0: 80000ab0 .word 0x80000ab0 +80000ac4: 80009b94 .word 0x80009b94 +80000ac8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xafee37b7 +80000acc: 0004a403 lw x8,0(x9) +80000ad0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x7a881319 +80000ad4: 0004ae03 lw x28,0(x9) +80000ad8: 00448493 addi x9,x9,4 + +80000adc : +Zbkb_andn_cg_cp_rs2_b28: + andn x1, x8, x28 # perform operation +80000adc: 41c470b3 andn x1,x8,x28 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_andn_cg_cp_rs2_b28, Zbkb_andn_cg_cp_rs2_b28_str) +80000ae0: 00012203 lw x4,0(x2) +80000ae4: 00120863 beq x4,x1,80000af4 +80000ae8: 219042ef jal x5,80005500 +80000aec: 80000adc .word 0x80000adc +80000af0: 80009bc7 .word 0x80009bc7 +80000af4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x78a5cac7 +80000af8: 0004a783 lw x15,0(x9) +80000afc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x01090ae2 +80000b00: 0004ae83 lw x29,0(x9) +80000b04: 00448493 addi x9,x9,4 + +80000b08 : +Zbkb_andn_cg_cp_rs2_b29: + andn x23, x15, x29 # perform operation +80000b08: 41d7fbb3 andn x23,x15,x29 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkb_andn_cg_cp_rs2_b29, Zbkb_andn_cg_cp_rs2_b29_str) +80000b0c: 00012203 lw x4,0(x2) +80000b10: 01720863 beq x4,x23,80000b20 +80000b14: 1ed042ef jal x5,80005500 +80000b18: 80000b08 .word 0x80000b08 +80000b1c: 80009bfa .word 0x80009bfa +80000b20: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x582d2fdd +80000b24: 0004ac03 lw x24,0(x9) +80000b28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7ee60759 +80000b2c: 0004af03 lw x30,0(x9) +80000b30: 00448493 addi x9,x9,4 + +80000b34 : +Zbkb_andn_cg_cp_rs2_b30: + andn x0, x24, x30 # perform operation +80000b34: 41ec7033 andn x0,x24,x30 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_andn_cg_cp_rs2_b30, Zbkb_andn_cg_cp_rs2_b30_str) +80000b38: 00012203 lw x4,0(x2) +80000b3c: 00020863 beq x4,x0,80000b4c +80000b40: 1c1042ef jal x5,80005500 +80000b44: 80000b34 .word 0x80000b34 +80000b48: 80009c2d .word 0x80009c2d +80000b4c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x14734328 +80000b50: 0004a703 lw x14,0(x9) +80000b54: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xd9973719 +80000b58: 0004af83 lw x31,0(x9) +80000b5c: 00448493 addi x9,x9,4 + +80000b60 : +Zbkb_andn_cg_cp_rs2_b31: + andn x15, x14, x31 # perform operation +80000b60: 41f777b3 andn x15,x14,x31 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zbkb_andn_cg_cp_rs2_b31, Zbkb_andn_cg_cp_rs2_b31_str) +80000b64: 00012203 lw x4,0(x2) +80000b68: 00f20863 beq x4,x15,80000b78 +80000b6c: 195042ef jal x5,80005500 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 80009c60 .word 0x80009c60 +80000b78: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x674a9bbe +80000b7c: 0004a903 lw x18,0(x9) +80000b80: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x65fd2295 +80000b84: 0004ac03 lw x24,0(x9) +80000b88: 00448493 addi x9,x9,4 + +80000b8c : +Zbkb_andn_cg_cp_rd_b0: + andn x0, x18, x24 # perform operation +80000b8c: 41897033 andn x0,x18,x24 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_andn_cg_cp_rd_b0, Zbkb_andn_cg_cp_rd_b0_str) +80000b90: 00012203 lw x4,0(x2) +80000b94: 00020863 beq x4,x0,80000ba4 +80000b98: 169042ef jal x5,80005500 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80009c93 .word 0x80009c93 +80000ba4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xf9b8adf4 +80000ba8: 0004a583 lw x11,0(x9) +80000bac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5f0185d7 +80000bb0: 0004a183 lw x3,0(x9) +80000bb4: 00448493 addi x9,x9,4 + +80000bb8 : +Zbkb_andn_cg_cp_rd_b1: + andn x1, x11, x3 # perform operation +80000bb8: 4035f0b3 andn x1,x11,x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_andn_cg_cp_rd_b1, Zbkb_andn_cg_cp_rd_b1_str) +80000bbc: 00012203 lw x4,0(x2) +80000bc0: 00120863 beq x4,x1,80000bd0 +80000bc4: 13d042ef jal x5,80005500 +80000bc8: 80000bb8 .word 0x80000bb8 +80000bcc: 80009cc4 .word 0x80009cc4 +80000bd0: 00410113 addi x2,x2,4 + + mv x25, x2 # switch signature pointer register to avoid conflict with test +80000bd4: 00010c93 addi x25,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xb66d4067 +80000bd8: 0004a083 lw x1,0(x9) +80000bdc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x47b0a3ed +80000be0: 0004a403 lw x8,0(x9) +80000be4: 00448493 addi x9,x9,4 + +80000be8 : +Zbkb_andn_cg_cp_rd_b2: + andn x2, x1, x8 # perform operation +80000be8: 4080f133 andn x2,x1,x8 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_andn_cg_cp_rd_b2, Zbkb_andn_cg_cp_rd_b2_str) +80000bec: 000ca203 lw x4,0(x25) +80000bf0: 00220863 beq x4,x2,80000c00 +80000bf4: 10d042ef jal x5,80005500 +80000bf8: 80000be8 .word 0x80000be8 +80000bfc: 80009cf5 .word 0x80009cf5 +80000c00: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xfdc525b4 +80000c04: 0004a003 lw x0,0(x9) +80000c08: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xd36ba05a +80000c0c: 0004a583 lw x11,0(x9) +80000c10: 00448493 addi x9,x9,4 + +80000c14 : +Zbkb_andn_cg_cp_rd_b3: + andn x3, x0, x11 # perform operation +80000c14: 40b071b3 andn x3,x0,x11 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_andn_cg_cp_rd_b3, Zbkb_andn_cg_cp_rd_b3_str) +80000c18: 000ca203 lw x4,0(x25) +80000c1c: 00320863 beq x4,x3,80000c2c +80000c20: 0e1042ef jal x5,80005500 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 80009d26 .word 0x80009d26 +80000c2c: 004c8c93 addi x25,x25,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c30: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c34: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xf417ba5d +80000c38: 0004ab83 lw x23,0(x9) +80000c3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x62a75e8f +80000c40: 0004ae83 lw x29,0(x9) +80000c44: 00448493 addi x9,x9,4 + +80000c48 : +Zbkb_andn_cg_cp_rd_b4: + andn x4, x23, x29 # perform operation +80000c48: 41dbf233 andn x4,x23,x29 + # Check if x4 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x4, Zbkb_andn_cg_cp_rd_b4, Zbkb_andn_cg_cp_rd_b4_str) +80000c4c: 000ca683 lw x13,0(x25) +80000c50: 00468863 beq x13,x4,80000c60 +80000c54: 0ed0476f jal x14,80005540 +80000c58: 80000c48 .word 0x80000c48 +80000c5c: 80009d57 .word 0x80009d57 +80000c60: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xb9d0309b +80000c64: 0004a583 lw x11,0(x9) +80000c68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x1efd002d +80000c6c: 0004af03 lw x30,0(x9) +80000c70: 00448493 addi x9,x9,4 + +80000c74 : +Zbkb_andn_cg_cp_rd_b5: + andn x5, x11, x30 # perform operation +80000c74: 41e5f2b3 andn x5,x11,x30 + # Check if x5 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x5, Zbkb_andn_cg_cp_rd_b5, Zbkb_andn_cg_cp_rd_b5_str) +80000c78: 000ca683 lw x13,0(x25) +80000c7c: 00568863 beq x13,x5,80000c8c +80000c80: 0c10476f jal x14,80005540 +80000c84: 80000c74 .word 0x80000c74 +80000c88: 80009d88 .word 0x80009d88 +80000c8c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x4715cb1c +80000c90: 0004af83 lw x31,0(x9) +80000c94: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x9eeea22b +80000c98: 0004a183 lw x3,0(x9) +80000c9c: 00448493 addi x9,x9,4 + +80000ca0 : +Zbkb_andn_cg_cp_rd_b6: + andn x6, x31, x3 # perform operation +80000ca0: 403ff333 andn x6,x31,x3 + # Check if x6 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x6, Zbkb_andn_cg_cp_rd_b6, Zbkb_andn_cg_cp_rd_b6_str) +80000ca4: 000ca683 lw x13,0(x25) +80000ca8: 00668863 beq x13,x6,80000cb8 +80000cac: 0950476f jal x14,80005540 +80000cb0: 80000ca0 .word 0x80000ca0 +80000cb4: 80009db9 .word 0x80009db9 +80000cb8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xd65210ca +80000cbc: 0004a803 lw x16,0(x9) +80000cc0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x631092c7 +80000cc4: 0004ab03 lw x22,0(x9) +80000cc8: 00448493 addi x9,x9,4 + +80000ccc : +Zbkb_andn_cg_cp_rd_b7: + andn x7, x16, x22 # perform operation +80000ccc: 416873b3 andn x7,x16,x22 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zbkb_andn_cg_cp_rd_b7, Zbkb_andn_cg_cp_rd_b7_str) +80000cd0: 000ca683 lw x13,0(x25) +80000cd4: 00768863 beq x13,x7,80000ce4 +80000cd8: 0690476f jal x14,80005540 +80000cdc: 80000ccc .word 0x80000ccc +80000ce0: 80009dea .word 0x80009dea +80000ce4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x44c6654f +80000ce8: 0004a903 lw x18,0(x9) +80000cec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xe44d0455 +80000cf0: 0004a103 lw x2,0(x9) +80000cf4: 00448493 addi x9,x9,4 + +80000cf8 : +Zbkb_andn_cg_cp_rd_b8: + andn x8, x18, x2 # perform operation +80000cf8: 40297433 andn x8,x18,x2 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zbkb_andn_cg_cp_rd_b8, Zbkb_andn_cg_cp_rd_b8_str) +80000cfc: 000ca683 lw x13,0(x25) +80000d00: 00868863 beq x13,x8,80000d10 +80000d04: 03d0476f jal x14,80005540 +80000d08: 80000cf8 .word 0x80000cf8 +80000d0c: 80009e1b .word 0x80009e1b +80000d10: 004c8c93 addi x25,x25,4 + + mv x27, x9 # switch data pointer register to avoid conflict with test +80000d14: 00048d93 addi x27,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0x7b27294d +80000d18: 000da283 lw x5,0(x27) +80000d1c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x34eef9d7 +80000d20: 000daa83 lw x21,0(x27) +80000d24: 004d8d93 addi x27,x27,4 + +80000d28 : +Zbkb_andn_cg_cp_rd_b9: + andn x9, x5, x21 # perform operation +80000d28: 4152f4b3 andn x9,x5,x21 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zbkb_andn_cg_cp_rd_b9, Zbkb_andn_cg_cp_rd_b9_str) +80000d2c: 000ca683 lw x13,0(x25) +80000d30: 00968863 beq x13,x9,80000d40 +80000d34: 00d0476f jal x14,80005540 +80000d38: 80000d28 .word 0x80000d28 +80000d3c: 80009e4c .word 0x80009e4c +80000d40: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0xd9bb2686 +80000d44: 000daf83 lw x31,0(x27) +80000d48: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0x22195047 +80000d4c: 000da103 lw x2,0(x27) +80000d50: 004d8d93 addi x27,x27,4 + +80000d54 : +Zbkb_andn_cg_cp_rd_b10: + andn x10, x31, x2 # perform operation +80000d54: 402ff533 andn x10,x31,x2 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zbkb_andn_cg_cp_rd_b10, Zbkb_andn_cg_cp_rd_b10_str) +80000d58: 000ca683 lw x13,0(x25) +80000d5c: 00a68863 beq x13,x10,80000d6c +80000d60: 7e00476f jal x14,80005540 +80000d64: 80000d54 .word 0x80000d54 +80000d68: 80009e7d .word 0x80009e7d +80000d6c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x1076507e +80000d70: 000dab83 lw x23,0(x27) +80000d74: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x03aea0ad +80000d78: 000dab03 lw x22,0(x27) +80000d7c: 004d8d93 addi x27,x27,4 + +80000d80 : +Zbkb_andn_cg_cp_rd_b11: + andn x11, x23, x22 # perform operation +80000d80: 416bf5b3 andn x11,x23,x22 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zbkb_andn_cg_cp_rd_b11, Zbkb_andn_cg_cp_rd_b11_str) +80000d84: 000ca683 lw x13,0(x25) +80000d88: 00b68863 beq x13,x11,80000d98 +80000d8c: 7b40476f jal x14,80005540 +80000d90: 80000d80 .word 0x80000d80 +80000d94: 80009eaf .word 0x80009eaf +80000d98: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0xd18370ab +80000d9c: 000da003 lw x0,0(x27) +80000da0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x0e8d01af +80000da4: 000da783 lw x15,0(x27) +80000da8: 004d8d93 addi x27,x27,4 + +80000dac : +Zbkb_andn_cg_cp_rd_b12: + andn x12, x0, x15 # perform operation +80000dac: 40f07633 andn x12,x0,x15 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zbkb_andn_cg_cp_rd_b12, Zbkb_andn_cg_cp_rd_b12_str) +80000db0: 000ca683 lw x13,0(x25) +80000db4: 00c68863 beq x13,x12,80000dc4 +80000db8: 7880476f jal x14,80005540 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 80009ee1 .word 0x80009ee1 +80000dc4: 004c8c93 addi x25,x25,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dc8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dcc: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0xea1caa97 +80000dd0: 000daf03 lw x30,0(x27) +80000dd4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x37f78c7a +80000dd8: 000da583 lw x11,0(x27) +80000ddc: 004d8d93 addi x27,x27,4 + +80000de0 : +Zbkb_andn_cg_cp_rd_b13: + andn x13, x30, x11 # perform operation +80000de0: 40bf76b3 andn x13,x30,x11 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zbkb_andn_cg_cp_rd_b13, Zbkb_andn_cg_cp_rd_b13_str) +80000de4: 000ca383 lw x7,0(x25) +80000de8: 00d38863 beq x7,x13,80000df8 +80000dec: 72c0446f jal x8,80005518 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 80009f13 .word 0x80009f13 +80000df8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0x03ed5f8f +80000dfc: 000da003 lw x0,0(x27) +80000e00: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xc1f9155a +80000e04: 000da483 lw x9,0(x27) +80000e08: 004d8d93 addi x27,x27,4 + +80000e0c : +Zbkb_andn_cg_cp_rd_b14: + andn x14, x0, x9 # perform operation +80000e0c: 40907733 andn x14,x0,x9 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zbkb_andn_cg_cp_rd_b14, Zbkb_andn_cg_cp_rd_b14_str) +80000e10: 000ca383 lw x7,0(x25) +80000e14: 00e38863 beq x7,x14,80000e24 +80000e18: 7000446f jal x8,80005518 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 80009f45 .word 0x80009f45 +80000e24: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x7b08eaa9 +80000e28: 000da703 lw x14,0(x27) +80000e2c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0x25595ba0 +80000e30: 000da003 lw x0,0(x27) +80000e34: 004d8d93 addi x27,x27,4 + +80000e38 : +Zbkb_andn_cg_cp_rd_b15: + andn x15, x14, x0 # perform operation +80000e38: 400777b3 andn x15,x14,x0 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zbkb_andn_cg_cp_rd_b15, Zbkb_andn_cg_cp_rd_b15_str) +80000e3c: 000ca383 lw x7,0(x25) +80000e40: 00f38863 beq x7,x15,80000e50 +80000e44: 6d40446f jal x8,80005518 +80000e48: 80000e38 .word 0x80000e38 +80000e4c: 80009f77 .word 0x80009f77 +80000e50: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xaa1a904f +80000e54: 000dab03 lw x22,0(x27) +80000e58: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0xad746b49 +80000e5c: 000da903 lw x18,0(x27) +80000e60: 004d8d93 addi x27,x27,4 + +80000e64 : +Zbkb_andn_cg_cp_rd_b16: + andn x16, x22, x18 # perform operation +80000e64: 412b7833 andn x16,x22,x18 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zbkb_andn_cg_cp_rd_b16, Zbkb_andn_cg_cp_rd_b16_str) +80000e68: 000ca383 lw x7,0(x25) +80000e6c: 01038863 beq x7,x16,80000e7c +80000e70: 6a80446f jal x8,80005518 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 80009fa9 .word 0x80009fa9 +80000e7c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x1ee198e1 +80000e80: 000daf03 lw x30,0(x27) +80000e84: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xad4f968d +80000e88: 000dab03 lw x22,0(x27) +80000e8c: 004d8d93 addi x27,x27,4 + +80000e90 : +Zbkb_andn_cg_cp_rd_b17: + andn x17, x30, x22 # perform operation +80000e90: 416f78b3 andn x17,x30,x22 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zbkb_andn_cg_cp_rd_b17, Zbkb_andn_cg_cp_rd_b17_str) +80000e94: 000ca383 lw x7,0(x25) +80000e98: 01138863 beq x7,x17,80000ea8 +80000e9c: 67c0446f jal x8,80005518 +80000ea0: 80000e90 .word 0x80000e90 +80000ea4: 80009fdb .word 0x80009fdb +80000ea8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x5e8ab736 +80000eac: 000da503 lw x10,0(x27) +80000eb0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0x6814abd3 +80000eb4: 000da483 lw x9,0(x27) +80000eb8: 004d8d93 addi x27,x27,4 + +80000ebc : +Zbkb_andn_cg_cp_rd_b18: + andn x18, x10, x9 # perform operation +80000ebc: 40957933 andn x18,x10,x9 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zbkb_andn_cg_cp_rd_b18, Zbkb_andn_cg_cp_rd_b18_str) +80000ec0: 000ca383 lw x7,0(x25) +80000ec4: 01238863 beq x7,x18,80000ed4 +80000ec8: 6500446f jal x8,80005518 +80000ecc: 80000ebc .word 0x80000ebc +80000ed0: 8000a00d .word 0x8000a00d +80000ed4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0x6c83faff +80000ed8: 000daf83 lw x31,0(x27) +80000edc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x9aa5c0d6 +80000ee0: 000da083 lw x1,0(x27) +80000ee4: 004d8d93 addi x27,x27,4 + +80000ee8 : +Zbkb_andn_cg_cp_rd_b19: + andn x19, x31, x1 # perform operation +80000ee8: 401ff9b3 andn x19,x31,x1 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zbkb_andn_cg_cp_rd_b19, Zbkb_andn_cg_cp_rd_b19_str) +80000eec: 000ca383 lw x7,0(x25) +80000ef0: 01338863 beq x7,x19,80000f00 +80000ef4: 6240446f jal x8,80005518 +80000ef8: 80000ee8 .word 0x80000ee8 +80000efc: 8000a03f .word 0x8000a03f +80000f00: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x916c3a2f +80000f04: 000da103 lw x2,0(x27) +80000f08: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x00d3e7c3 +80000f0c: 000dab03 lw x22,0(x27) +80000f10: 004d8d93 addi x27,x27,4 + +80000f14 : +Zbkb_andn_cg_cp_rd_b20: + andn x20, x2, x22 # perform operation +80000f14: 41617a33 andn x20,x2,x22 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zbkb_andn_cg_cp_rd_b20, Zbkb_andn_cg_cp_rd_b20_str) +80000f18: 000ca383 lw x7,0(x25) +80000f1c: 01438863 beq x7,x20,80000f2c +80000f20: 5f80446f jal x8,80005518 +80000f24: 80000f14 .word 0x80000f14 +80000f28: 8000a071 .word 0x8000a071 +80000f2c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x5f02caf6 +80000f30: 000daf03 lw x30,0(x27) +80000f34: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0xe644224b +80000f38: 000da283 lw x5,0(x27) +80000f3c: 004d8d93 addi x27,x27,4 + +80000f40 : +Zbkb_andn_cg_cp_rd_b21: + andn x21, x30, x5 # perform operation +80000f40: 405f7ab3 andn x21,x30,x5 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zbkb_andn_cg_cp_rd_b21, Zbkb_andn_cg_cp_rd_b21_str) +80000f44: 000ca383 lw x7,0(x25) +80000f48: 01538863 beq x7,x21,80000f58 +80000f4c: 5cc0446f jal x8,80005518 +80000f50: 80000f40 .word 0x80000f40 +80000f54: 8000a0a3 .word 0x8000a0a3 +80000f58: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0x9bada8b0 +80000f5c: 000dae03 lw x28,0(x27) +80000f60: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0xf05f1dc9 +80000f64: 000da503 lw x10,0(x27) +80000f68: 004d8d93 addi x27,x27,4 + +80000f6c : +Zbkb_andn_cg_cp_rd_b22: + andn x22, x28, x10 # perform operation +80000f6c: 40ae7b33 andn x22,x28,x10 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_andn_cg_cp_rd_b22, Zbkb_andn_cg_cp_rd_b22_str) +80000f70: 000ca383 lw x7,0(x25) +80000f74: 01638863 beq x7,x22,80000f84 +80000f78: 5a00446f jal x8,80005518 +80000f7c: 80000f6c .word 0x80000f6c +80000f80: 8000a0d5 .word 0x8000a0d5 +80000f84: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0x629af5f6 +80000f88: 000da283 lw x5,0(x27) +80000f8c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x6c5170c0 +80000f90: 000da603 lw x12,0(x27) +80000f94: 004d8d93 addi x27,x27,4 + +80000f98 : +Zbkb_andn_cg_cp_rd_b23: + andn x23, x5, x12 # perform operation +80000f98: 40c2fbb3 andn x23,x5,x12 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zbkb_andn_cg_cp_rd_b23, Zbkb_andn_cg_cp_rd_b23_str) +80000f9c: 000ca383 lw x7,0(x25) +80000fa0: 01738863 beq x7,x23,80000fb0 +80000fa4: 5740446f jal x8,80005518 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 8000a107 .word 0x8000a107 +80000fb0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x4919d06b +80000fb4: 000da983 lw x19,0(x27) +80000fb8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0x09e216a6 +80000fbc: 000da003 lw x0,0(x27) +80000fc0: 004d8d93 addi x27,x27,4 + +80000fc4 : +Zbkb_andn_cg_cp_rd_b24: + andn x24, x19, x0 # perform operation +80000fc4: 4009fc33 andn x24,x19,x0 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkb_andn_cg_cp_rd_b24, Zbkb_andn_cg_cp_rd_b24_str) +80000fc8: 000ca383 lw x7,0(x25) +80000fcc: 01838863 beq x7,x24,80000fdc +80000fd0: 5480446f jal x8,80005518 +80000fd4: 80000fc4 .word 0x80000fc4 +80000fd8: 8000a139 .word 0x8000a139 +80000fdc: 004c8c93 addi x25,x25,4 + + mv x23, x25 # switch signature pointer register to avoid conflict with test +80000fe0: 000c8b93 addi x23,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x2c353131 +80000fe4: 000da183 lw x3,0(x27) +80000fe8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0x3f9fc544 +80000fec: 000da103 lw x2,0(x27) +80000ff0: 004d8d93 addi x27,x27,4 + +80000ff4 : +Zbkb_andn_cg_cp_rd_b25: + andn x25, x3, x2 # perform operation +80000ff4: 4021fcb3 andn x25,x3,x2 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cp_rd_b25, Zbkb_andn_cg_cp_rd_b25_str) +80000ff8: 000ba383 lw x7,0(x23) +80000ffc: 01938863 beq x7,x25,8000100c +80001000: 5180446f jal x8,80005518 +80001004: 80000ff4 .word 0x80000ff4 +80001008: 8000a16b .word 0x8000a16b +8000100c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x4eadfd7e +80001010: 000da503 lw x10,0(x27) +80001014: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x771a9cdd +80001018: 000da883 lw x17,0(x27) +8000101c: 004d8d93 addi x27,x27,4 + +80001020 : +Zbkb_andn_cg_cp_rd_b26: + andn x26, x10, x17 # perform operation +80001020: 41157d33 andn x26,x10,x17 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cp_rd_b26, Zbkb_andn_cg_cp_rd_b26_str) +80001024: 000ba383 lw x7,0(x23) +80001028: 01a38863 beq x7,x26,80001038 +8000102c: 4ec0446f jal x8,80005518 +80001030: 80001020 .word 0x80001020 +80001034: 8000a19d .word 0x8000a19d +80001038: 004b8b93 addi x23,x23,4 + + mv x9, x27 # switch data pointer register to avoid conflict with test +8000103c: 000d8493 addi x9,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x043f2247 +80001040: 0004ab03 lw x22,0(x9) +80001044: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x8e3f1cb5 +80001048: 0004a003 lw x0,0(x9) +8000104c: 00448493 addi x9,x9,4 + +80001050 : +Zbkb_andn_cg_cp_rd_b27: + andn x27, x22, x0 # perform operation +80001050: 400b7db3 andn x27,x22,x0 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cp_rd_b27, Zbkb_andn_cg_cp_rd_b27_str) +80001054: 000ba383 lw x7,0(x23) +80001058: 01b38863 beq x7,x27,80001068 +8000105c: 4bc0446f jal x8,80005518 +80001060: 80001050 .word 0x80001050 +80001064: 8000a1cf .word 0x8000a1cf +80001068: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0bb57af4 +8000106c: 0004a503 lw x10,0(x9) +80001070: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x8a406d88 +80001074: 0004a583 lw x11,0(x9) +80001078: 00448493 addi x9,x9,4 + +8000107c : +Zbkb_andn_cg_cp_rd_b28: + andn x28, x10, x11 # perform operation +8000107c: 40b57e33 andn x28,x10,x11 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkb_andn_cg_cp_rd_b28, Zbkb_andn_cg_cp_rd_b28_str) +80001080: 000ba383 lw x7,0(x23) +80001084: 01c38863 beq x7,x28,80001094 +80001088: 4900446f jal x8,80005518 +8000108c: 8000107c .word 0x8000107c +80001090: 8000a201 .word 0x8000a201 +80001094: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x4495a0b1 +80001098: 0004ad83 lw x27,0(x9) +8000109c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xff0b19df +800010a0: 0004ad03 lw x26,0(x9) +800010a4: 00448493 addi x9,x9,4 + +800010a8 : +Zbkb_andn_cg_cp_rd_b29: + andn x29, x27, x26 # perform operation +800010a8: 41adfeb3 andn x29,x27,x26 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cp_rd_b29, Zbkb_andn_cg_cp_rd_b29_str) +800010ac: 000ba383 lw x7,0(x23) +800010b0: 01d38863 beq x7,x29,800010c0 +800010b4: 4640446f jal x8,80005518 +800010b8: 800010a8 .word 0x800010a8 +800010bc: 8000a233 .word 0x8000a233 +800010c0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x613bf6ec +800010c4: 0004a103 lw x2,0(x9) +800010c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x1e530c1e +800010cc: 0004aa03 lw x20,0(x9) +800010d0: 00448493 addi x9,x9,4 + +800010d4 : +Zbkb_andn_cg_cp_rd_b30: + andn x30, x2, x20 # perform operation +800010d4: 41417f33 andn x30,x2,x20 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cp_rd_b30, Zbkb_andn_cg_cp_rd_b30_str) +800010d8: 000ba383 lw x7,0(x23) +800010dc: 01e38863 beq x7,x30,800010ec +800010e0: 4380446f jal x8,80005518 +800010e4: 800010d4 .word 0x800010d4 +800010e8: 8000a265 .word 0x8000a265 +800010ec: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x931d446d +800010f0: 0004ad03 lw x26,0(x9) +800010f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x66be9170 +800010f8: 0004a703 lw x14,0(x9) +800010fc: 00448493 addi x9,x9,4 + +80001100 : +Zbkb_andn_cg_cp_rd_b31: + andn x31, x26, x14 # perform operation +80001100: 40ed7fb3 andn x31,x26,x14 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cp_rd_b31, Zbkb_andn_cg_cp_rd_b31_str) +80001104: 000ba383 lw x7,0(x23) +80001108: 01f38863 beq x7,x31,80001118 +8000110c: 40c0446f jal x8,80005518 +80001110: 80001100 .word 0x80001100 +80001114: 8000a297 .word 0x8000a297 +80001118: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000 +8000111c: 0004a183 lw x3,0(x9) +80001120: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x9e9c9e0d +80001124: 0004a703 lw x14,0(x9) +80001128: 00448493 addi x9,x9,4 + +8000112c : +Zbkb_andn_cg_cp_rs1_edges_0x0: + andn x5, x3, x14 # perform operation +8000112c: 40e1f2b3 andn x5,x3,x14 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cp_rs1_edges_0x0, Zbkb_andn_cg_cp_rs1_edges_0x0_str) +80001130: 000ba383 lw x7,0(x23) +80001134: 00538863 beq x7,x5,80001144 +80001138: 3e00446f jal x8,80005518 +8000113c: 8000112c .word 0x8000112c +80001140: 8000a2c9 .word 0x8000a2c9 +80001144: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x00000001 +80001148: 0004a203 lw x4,0(x9) +8000114c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xb773f6a8 +80001150: 0004ad03 lw x26,0(x9) +80001154: 00448493 addi x9,x9,4 + +80001158 : +Zbkb_andn_cg_cp_rs1_edges_0x1: + andn x31, x4, x26 # perform operation +80001158: 41a27fb3 andn x31,x4,x26 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cp_rs1_edges_0x1, Zbkb_andn_cg_cp_rs1_edges_0x1_str) +8000115c: 000ba383 lw x7,0(x23) +80001160: 01f38863 beq x7,x31,80001170 +80001164: 3b40446f jal x8,80005518 +80001168: 80001158 .word 0x80001158 +8000116c: 8000a302 .word 0x8000a302 +80001170: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000002 +80001174: 0004ac03 lw x24,0(x9) +80001178: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x85612674 +8000117c: 0004ad83 lw x27,0(x9) +80001180: 00448493 addi x9,x9,4 + +80001184 : +Zbkb_andn_cg_cp_rs1_edges_0x2: + andn x2, x24, x27 # perform operation +80001184: 41bc7133 andn x2,x24,x27 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cp_rs1_edges_0x2, Zbkb_andn_cg_cp_rs1_edges_0x2_str) +80001188: 000ba383 lw x7,0(x23) +8000118c: 00238863 beq x7,x2,8000119c +80001190: 3880446f jal x8,80005518 +80001194: 80001184 .word 0x80001184 +80001198: 8000a33b .word 0x8000a33b +8000119c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x80000000 +800011a0: 0004ab03 lw x22,0(x9) +800011a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x04f82464 +800011a8: 0004af83 lw x31,0(x9) +800011ac: 00448493 addi x9,x9,4 + +800011b0 : +Zbkb_andn_cg_cp_rs1_edges_0x80000000: + andn x12, x22, x31 # perform operation +800011b0: 41fb7633 andn x12,x22,x31 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cp_rs1_edges_0x80000000, Zbkb_andn_cg_cp_rs1_edges_0x80000000_str) +800011b4: 000ba383 lw x7,0(x23) +800011b8: 00c38863 beq x7,x12,800011c8 +800011bc: 35c0446f jal x8,80005518 +800011c0: 800011b0 .word 0x800011b0 +800011c4: 8000a374 .word 0x8000a374 +800011c8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x80000001 +800011cc: 0004a903 lw x18,0(x9) +800011d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x6e35c90a +800011d4: 0004a683 lw x13,0(x9) +800011d8: 00448493 addi x9,x9,4 + +800011dc : +Zbkb_andn_cg_cp_rs1_edges_0x80000001: + andn x5, x18, x13 # perform operation +800011dc: 40d972b3 andn x5,x18,x13 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cp_rs1_edges_0x80000001, Zbkb_andn_cg_cp_rs1_edges_0x80000001_str) +800011e0: 000ba383 lw x7,0(x23) +800011e4: 00538863 beq x7,x5,800011f4 +800011e8: 3300446f jal x8,80005518 +800011ec: 800011dc .word 0x800011dc +800011f0: 8000a3b5 .word 0x8000a3b5 +800011f4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x7fffffff +800011f8: 0004a083 lw x1,0(x9) +800011fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x51be8b9b +80001200: 0004a803 lw x16,0(x9) +80001204: 00448493 addi x9,x9,4 + +80001208 : +Zbkb_andn_cg_cp_rs1_edges_0x7fffffff: + andn x17, x1, x16 # perform operation +80001208: 4100f8b3 andn x17,x1,x16 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cp_rs1_edges_0x7fffffff, Zbkb_andn_cg_cp_rs1_edges_0x7fffffff_str) +8000120c: 000ba383 lw x7,0(x23) +80001210: 01138863 beq x7,x17,80001220 +80001214: 3040446f jal x8,80005518 +80001218: 80001208 .word 0x80001208 +8000121c: 8000a3f6 .word 0x8000a3f6 +80001220: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7ffffffe +80001224: 0004ab03 lw x22,0(x9) +80001228: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xfdf0821c +8000122c: 0004a683 lw x13,0(x9) +80001230: 00448493 addi x9,x9,4 + +80001234 : +Zbkb_andn_cg_cp_rs1_edges_0x7ffffffe: + andn x25, x22, x13 # perform operation +80001234: 40db7cb3 andn x25,x22,x13 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cp_rs1_edges_0x7ffffffe, Zbkb_andn_cg_cp_rs1_edges_0x7ffffffe_str) +80001238: 000ba383 lw x7,0(x23) +8000123c: 01938863 beq x7,x25,8000124c +80001240: 2d80446f jal x8,80005518 +80001244: 80001234 .word 0x80001234 +80001248: 8000a437 .word 0x8000a437 +8000124c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xffffffff +80001250: 0004a503 lw x10,0(x9) +80001254: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x90ac045b +80001258: 0004a283 lw x5,0(x9) +8000125c: 00448493 addi x9,x9,4 + +80001260 : +Zbkb_andn_cg_cp_rs1_edges_0xffffffff: + andn x30, x10, x5 # perform operation +80001260: 40557f33 andn x30,x10,x5 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cp_rs1_edges_0xffffffff, Zbkb_andn_cg_cp_rs1_edges_0xffffffff_str) +80001264: 000ba383 lw x7,0(x23) +80001268: 01e38863 beq x7,x30,80001278 +8000126c: 2ac0446f jal x8,80005518 +80001270: 80001260 .word 0x80001260 +80001274: 8000a478 .word 0x8000a478 +80001278: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xfffffffe +8000127c: 0004a203 lw x4,0(x9) +80001280: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x3ab1c154 +80001284: 0004a683 lw x13,0(x9) +80001288: 00448493 addi x9,x9,4 + +8000128c : +Zbkb_andn_cg_cp_rs1_edges_0xfffffffe: + andn x18, x4, x13 # perform operation +8000128c: 40d27933 andn x18,x4,x13 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cp_rs1_edges_0xfffffffe, Zbkb_andn_cg_cp_rs1_edges_0xfffffffe_str) +80001290: 000ba383 lw x7,0(x23) +80001294: 01238863 beq x7,x18,800012a4 +80001298: 2800446f jal x8,80005518 +8000129c: 8000128c .word 0x8000128c +800012a0: 8000a4b9 .word 0x8000a4b9 +800012a4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x5bbc8872 +800012a8: 0004aa03 lw x20,0(x9) +800012ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x724ed4cf +800012b0: 0004a503 lw x10,0(x9) +800012b4: 00448493 addi x9,x9,4 + +800012b8 : +Zbkb_andn_cg_cp_rs1_edges_0x5bbc8872: + andn x5, x20, x10 # perform operation +800012b8: 40aa72b3 andn x5,x20,x10 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cp_rs1_edges_0x5bbc8872, Zbkb_andn_cg_cp_rs1_edges_0x5bbc8872_str) +800012bc: 000ba383 lw x7,0(x23) +800012c0: 00538863 beq x7,x5,800012d0 +800012c4: 2540446f jal x8,80005518 +800012c8: 800012b8 .word 0x800012b8 +800012cc: 8000a4fa .word 0x8000a4fa +800012d0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaa +800012d4: 0004a703 lw x14,0(x9) +800012d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x9201029f +800012dc: 0004ad03 lw x26,0(x9) +800012e0: 00448493 addi x9,x9,4 + +800012e4 : +Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaa: + andn x19, x14, x26 # perform operation +800012e4: 41a779b3 andn x19,x14,x26 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012e8: 000ba383 lw x7,0(x23) +800012ec: 01338863 beq x7,x19,800012fc +800012f0: 2280446f jal x8,80005518 +800012f4: 800012e4 .word 0x800012e4 +800012f8: 8000a53b .word 0x8000a53b +800012fc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x55555555 +80001300: 0004a683 lw x13,0(x9) +80001304: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xc181e225 +80001308: 0004ae03 lw x28,0(x9) +8000130c: 00448493 addi x9,x9,4 + +80001310 : +Zbkb_andn_cg_cp_rs1_edges_0x55555555: + andn x29, x13, x28 # perform operation +80001310: 41c6feb3 andn x29,x13,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cp_rs1_edges_0x55555555, Zbkb_andn_cg_cp_rs1_edges_0x55555555_str) +80001314: 000ba383 lw x7,0(x23) +80001318: 01d38863 beq x7,x29,80001328 +8000131c: 1fc0446f jal x8,80005518 +80001320: 80001310 .word 0x80001310 +80001324: 8000a57c .word 0x8000a57c +80001328: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x8a39ca1f +8000132c: 0004ad03 lw x26,0(x9) +80001330: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000 +80001334: 0004aa03 lw x20,0(x9) +80001338: 00448493 addi x9,x9,4 + +8000133c : +Zbkb_andn_cg_cp_rs2_edges_0x0: + andn x15, x26, x20 # perform operation +8000133c: 414d77b3 andn x15,x26,x20 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_andn_cg_cp_rs2_edges_0x0, Zbkb_andn_cg_cp_rs2_edges_0x0_str) +80001340: 000ba383 lw x7,0(x23) +80001344: 00f38863 beq x7,x15,80001354 +80001348: 1d00446f jal x8,80005518 +8000134c: 8000133c .word 0x8000133c +80001350: 8000a5bd .word 0x8000a5bd +80001354: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xd33262a1 +80001358: 0004a303 lw x6,0(x9) +8000135c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000001 +80001360: 0004ab03 lw x22,0(x9) +80001364: 00448493 addi x9,x9,4 + +80001368 : +Zbkb_andn_cg_cp_rs2_edges_0x1: + andn x16, x6, x22 # perform operation +80001368: 41637833 andn x16,x6,x22 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cp_rs2_edges_0x1, Zbkb_andn_cg_cp_rs2_edges_0x1_str) +8000136c: 000ba383 lw x7,0(x23) +80001370: 01038863 beq x7,x16,80001380 +80001374: 1a40446f jal x8,80005518 +80001378: 80001368 .word 0x80001368 +8000137c: 8000a5f7 .word 0x8000a5f7 +80001380: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x2d525dee +80001384: 0004a583 lw x11,0(x9) +80001388: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000002 +8000138c: 0004a983 lw x19,0(x9) +80001390: 00448493 addi x9,x9,4 + +80001394 : +Zbkb_andn_cg_cp_rs2_edges_0x2: + andn x15, x11, x19 # perform operation +80001394: 4135f7b3 andn x15,x11,x19 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_andn_cg_cp_rs2_edges_0x2, Zbkb_andn_cg_cp_rs2_edges_0x2_str) +80001398: 000ba383 lw x7,0(x23) +8000139c: 00f38863 beq x7,x15,800013ac +800013a0: 1780446f jal x8,80005518 +800013a4: 80001394 .word 0x80001394 +800013a8: 8000a631 .word 0x8000a631 +800013ac: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xd639a198 +800013b0: 0004a103 lw x2,0(x9) +800013b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x80000000 +800013b8: 0004ad03 lw x26,0(x9) +800013bc: 00448493 addi x9,x9,4 + +800013c0 : +Zbkb_andn_cg_cp_rs2_edges_0x80000000: + andn x16, x2, x26 # perform operation +800013c0: 41a17833 andn x16,x2,x26 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cp_rs2_edges_0x80000000, Zbkb_andn_cg_cp_rs2_edges_0x80000000_str) +800013c4: 000ba383 lw x7,0(x23) +800013c8: 01038863 beq x7,x16,800013d8 +800013cc: 14c0446f jal x8,80005518 +800013d0: 800013c0 .word 0x800013c0 +800013d4: 8000a66b .word 0x8000a66b +800013d8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x282be174 +800013dc: 0004ae03 lw x28,0(x9) +800013e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x80000001 +800013e4: 0004a803 lw x16,0(x9) +800013e8: 00448493 addi x9,x9,4 + +800013ec : +Zbkb_andn_cg_cp_rs2_edges_0x80000001: + andn x5, x28, x16 # perform operation +800013ec: 410e72b3 andn x5,x28,x16 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cp_rs2_edges_0x80000001, Zbkb_andn_cg_cp_rs2_edges_0x80000001_str) +800013f0: 000ba383 lw x7,0(x23) +800013f4: 00538863 beq x7,x5,80001404 +800013f8: 1200446f jal x8,80005518 +800013fc: 800013ec .word 0x800013ec +80001400: 8000a6ac .word 0x8000a6ac +80001404: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x403da7d8 +80001408: 0004aa83 lw x21,0(x9) +8000140c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x7fffffff +80001410: 0004a503 lw x10,0(x9) +80001414: 00448493 addi x9,x9,4 + +80001418 : +Zbkb_andn_cg_cp_rs2_edges_0x7fffffff: + andn x3, x21, x10 # perform operation +80001418: 40aaf1b3 andn x3,x21,x10 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cp_rs2_edges_0x7fffffff, Zbkb_andn_cg_cp_rs2_edges_0x7fffffff_str) +8000141c: 000ba383 lw x7,0(x23) +80001420: 00338863 beq x7,x3,80001430 +80001424: 0f40446f jal x8,80005518 +80001428: 80001418 .word 0x80001418 +8000142c: 8000a6ed .word 0x8000a6ed +80001430: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x9a99d901 +80001434: 0004ac03 lw x24,0(x9) +80001438: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffe +8000143c: 0004a083 lw x1,0(x9) +80001440: 00448493 addi x9,x9,4 + +80001444 : +Zbkb_andn_cg_cp_rs2_edges_0x7ffffffe: + andn x25, x24, x1 # perform operation +80001444: 401c7cb3 andn x25,x24,x1 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cp_rs2_edges_0x7ffffffe, Zbkb_andn_cg_cp_rs2_edges_0x7ffffffe_str) +80001448: 000ba383 lw x7,0(x23) +8000144c: 01938863 beq x7,x25,8000145c +80001450: 0c80446f jal x8,80005518 +80001454: 80001444 .word 0x80001444 +80001458: 8000a72e .word 0x8000a72e +8000145c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x921fedbf +80001460: 0004aa83 lw x21,0(x9) +80001464: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xffffffff +80001468: 0004a703 lw x14,0(x9) +8000146c: 00448493 addi x9,x9,4 + +80001470 : +Zbkb_andn_cg_cp_rs2_edges_0xffffffff: + andn x3, x21, x14 # perform operation +80001470: 40eaf1b3 andn x3,x21,x14 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cp_rs2_edges_0xffffffff, Zbkb_andn_cg_cp_rs2_edges_0xffffffff_str) +80001474: 000ba383 lw x7,0(x23) +80001478: 00338863 beq x7,x3,80001488 +8000147c: 09c0446f jal x8,80005518 +80001480: 80001470 .word 0x80001470 +80001484: 8000a76f .word 0x8000a76f +80001488: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfbd25a9e +8000148c: 0004a703 lw x14,0(x9) +80001490: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfffffffe +80001494: 0004ad03 lw x26,0(x9) +80001498: 00448493 addi x9,x9,4 + +8000149c : +Zbkb_andn_cg_cp_rs2_edges_0xfffffffe: + andn x3, x14, x26 # perform operation +8000149c: 41a771b3 andn x3,x14,x26 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cp_rs2_edges_0xfffffffe, Zbkb_andn_cg_cp_rs2_edges_0xfffffffe_str) +800014a0: 000ba383 lw x7,0(x23) +800014a4: 00338863 beq x7,x3,800014b4 +800014a8: 0700446f jal x8,80005518 +800014ac: 8000149c .word 0x8000149c +800014b0: 8000a7b0 .word 0x8000a7b0 +800014b4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x5820a0f6 +800014b8: 0004a683 lw x13,0(x9) +800014bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x5bbc8872 +800014c0: 0004a503 lw x10,0(x9) +800014c4: 00448493 addi x9,x9,4 + +800014c8 : +Zbkb_andn_cg_cp_rs2_edges_0x5bbc8872: + andn x12, x13, x10 # perform operation +800014c8: 40a6f633 andn x12,x13,x10 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cp_rs2_edges_0x5bbc8872, Zbkb_andn_cg_cp_rs2_edges_0x5bbc8872_str) +800014cc: 000ba383 lw x7,0(x23) +800014d0: 00c38863 beq x7,x12,800014e0 +800014d4: 0440446f jal x8,80005518 +800014d8: 800014c8 .word 0x800014c8 +800014dc: 8000a7f1 .word 0x8000a7f1 +800014e0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x3720a52c +800014e4: 0004af83 lw x31,0(x9) +800014e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xaaaaaaaa +800014ec: 0004a183 lw x3,0(x9) +800014f0: 00448493 addi x9,x9,4 + +800014f4 : +Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaa: + andn x16, x31, x3 # perform operation +800014f4: 403ff833 andn x16,x31,x3 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014f8: 000ba383 lw x7,0(x23) +800014fc: 01038863 beq x7,x16,8000150c +80001500: 0180446f jal x8,80005518 +80001504: 800014f4 .word 0x800014f4 +80001508: 8000a832 .word 0x8000a832 +8000150c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0578510a +80001510: 0004ac03 lw x24,0(x9) +80001514: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x55555555 +80001518: 0004ac83 lw x25,0(x9) +8000151c: 00448493 addi x9,x9,4 + +80001520 : +Zbkb_andn_cg_cp_rs2_edges_0x55555555: + andn x22, x24, x25 # perform operation +80001520: 419c7b33 andn x22,x24,x25 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zbkb_andn_cg_cp_rs2_edges_0x55555555, Zbkb_andn_cg_cp_rs2_edges_0x55555555_str) +80001524: 000ba383 lw x7,0(x23) +80001528: 01638863 beq x7,x22,80001538 +8000152c: 7ed0346f jal x8,80005518 +80001530: 80001520 .word 0x80001520 +80001534: 8000a873 .word 0x8000a873 +80001538: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000 +8000153c: 0004a183 lw x3,0(x9) +80001540: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000000 +80001544: 0004a883 lw x17,0(x9) +80001548: 00448493 addi x9,x9,4 + +8000154c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + andn x2, x3, x17 # perform operation +8000154c: 4111f133 andn x2,x3,x17 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001550: 000ba383 lw x7,0(x23) +80001554: 00238863 beq x7,x2,80001564 +80001558: 7c10346f jal x8,80005518 +8000155c: 8000154c .word 0x8000154c +80001560: 8000a8b4 .word 0x8000a8b4 +80001564: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x00000000 +80001568: 0004af03 lw x30,0(x9) +8000156c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000001 +80001570: 0004a503 lw x10,0(x9) +80001574: 00448493 addi x9,x9,4 + +80001578 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + andn x18, x30, x10 # perform operation +80001578: 40af7933 andn x18,x30,x10 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000157c: 000ba383 lw x7,0(x23) +80001580: 01238863 beq x7,x18,80001590 +80001584: 7950346f jal x8,80005518 +80001588: 80001578 .word 0x80001578 +8000158c: 8000a905 .word 0x8000a905 +80001590: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000000 +80001594: 0004a883 lw x17,0(x9) +80001598: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000002 +8000159c: 0004a783 lw x15,0(x9) +800015a0: 00448493 addi x9,x9,4 + +800015a4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + andn x4, x17, x15 # perform operation +800015a4: 40f8f233 andn x4,x17,x15 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015a8: 000ba383 lw x7,0(x23) +800015ac: 00438863 beq x7,x4,800015bc +800015b0: 7690346f jal x8,80005518 +800015b4: 800015a4 .word 0x800015a4 +800015b8: 8000a956 .word 0x8000a956 +800015bc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000 +800015c0: 0004af83 lw x31,0(x9) +800015c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x80000000 +800015c8: 0004a503 lw x10,0(x9) +800015cc: 00448493 addi x9,x9,4 + +800015d0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + andn x5, x31, x10 # perform operation +800015d0: 40aff2b3 andn x5,x31,x10 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015d4: 000ba383 lw x7,0(x23) +800015d8: 00538863 beq x7,x5,800015e8 +800015dc: 73d0346f jal x8,80005518 +800015e0: 800015d0 .word 0x800015d0 +800015e4: 8000a9a7 .word 0x8000a9a7 +800015e8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x00000000 +800015ec: 0004a203 lw x4,0(x9) +800015f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x80000001 +800015f4: 0004a703 lw x14,0(x9) +800015f8: 00448493 addi x9,x9,4 + +800015fc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + andn x2, x4, x14 # perform operation +800015fc: 40e27133 andn x2,x4,x14 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001600: 000ba383 lw x7,0(x23) +80001604: 00238863 beq x7,x2,80001614 +80001608: 7110346f jal x8,80005518 +8000160c: 800015fc .word 0x800015fc +80001610: 8000a9ff .word 0x8000a9ff +80001614: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000 +80001618: 0004a803 lw x16,0(x9) +8000161c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x7fffffff +80001620: 0004ad83 lw x27,0(x9) +80001624: 00448493 addi x9,x9,4 + +80001628 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + andn x29, x16, x27 # perform operation +80001628: 41b87eb3 andn x29,x16,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000162c: 000ba383 lw x7,0(x23) +80001630: 01d38863 beq x7,x29,80001640 +80001634: 6e50346f jal x8,80005518 +80001638: 80001628 .word 0x80001628 +8000163c: 8000aa57 .word 0x8000aa57 +80001640: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x00000000 +80001644: 0004a603 lw x12,0(x9) +80001648: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7ffffffe +8000164c: 0004a983 lw x19,0(x9) +80001650: 00448493 addi x9,x9,4 + +80001654 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + andn x11, x12, x19 # perform operation +80001654: 413675b3 andn x11,x12,x19 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001658: 000ba383 lw x7,0(x23) +8000165c: 00b38863 beq x7,x11,8000166c +80001660: 6b90346f jal x8,80005518 +80001664: 80001654 .word 0x80001654 +80001668: 8000aaaf .word 0x8000aaaf +8000166c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000 +80001670: 0004af83 lw x31,0(x9) +80001674: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xffffffff +80001678: 0004a103 lw x2,0(x9) +8000167c: 00448493 addi x9,x9,4 + +80001680 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + andn x16, x31, x2 # perform operation +80001680: 402ff833 andn x16,x31,x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001684: 000ba383 lw x7,0(x23) +80001688: 01038863 beq x7,x16,80001698 +8000168c: 68d0346f jal x8,80005518 +80001690: 80001680 .word 0x80001680 +80001694: 8000ab07 .word 0x8000ab07 +80001698: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x00000000 +8000169c: 0004a283 lw x5,0(x9) +800016a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfffffffe +800016a4: 0004ac03 lw x24,0(x9) +800016a8: 00448493 addi x9,x9,4 + +800016ac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + andn x27, x5, x24 # perform operation +800016ac: 4182fdb3 andn x27,x5,x24 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016b0: 000ba383 lw x7,0(x23) +800016b4: 01b38863 beq x7,x27,800016c4 +800016b8: 6610346f jal x8,80005518 +800016bc: 800016ac .word 0x800016ac +800016c0: 8000ab5f .word 0x8000ab5f +800016c4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000 +800016c8: 0004a183 lw x3,0(x9) +800016cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x5bbc8872 +800016d0: 0004a283 lw x5,0(x9) +800016d4: 00448493 addi x9,x9,4 + +800016d8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + andn x20, x3, x5 # perform operation +800016d8: 4051fa33 andn x20,x3,x5 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016dc: 000ba383 lw x7,0(x23) +800016e0: 01438863 beq x7,x20,800016f0 +800016e4: 6350346f jal x8,80005518 +800016e8: 800016d8 .word 0x800016d8 +800016ec: 8000abb7 .word 0x8000abb7 +800016f0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000 +800016f4: 0004a803 lw x16,0(x9) +800016f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xaaaaaaaa +800016fc: 0004a583 lw x11,0(x9) +80001700: 00448493 addi x9,x9,4 + +80001704 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + andn x14, x16, x11 # perform operation +80001704: 40b87733 andn x14,x16,x11 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001708: 000ba383 lw x7,0(x23) +8000170c: 00e38863 beq x7,x14,8000171c +80001710: 6090346f jal x8,80005518 +80001714: 80001704 .word 0x80001704 +80001718: 8000ac0f .word 0x8000ac0f +8000171c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000000 +80001720: 0004a583 lw x11,0(x9) +80001724: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x55555555 +80001728: 0004ad83 lw x27,0(x9) +8000172c: 00448493 addi x9,x9,4 + +80001730 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + andn x6, x11, x27 # perform operation +80001730: 41b5f333 andn x6,x11,x27 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001734: 000ba383 lw x7,0(x23) +80001738: 00638863 beq x7,x6,80001748 +8000173c: 5dd0346f jal x8,80005518 +80001740: 80001730 .word 0x80001730 +80001744: 8000ac67 .word 0x8000ac67 +80001748: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000001 +8000174c: 0004a783 lw x15,0(x9) +80001750: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000000 +80001754: 0004a803 lw x16,0(x9) +80001758: 00448493 addi x9,x9,4 + +8000175c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + andn x18, x15, x16 # perform operation +8000175c: 4107f933 andn x18,x15,x16 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001760: 000ba383 lw x7,0(x23) +80001764: 01238863 beq x7,x18,80001774 +80001768: 5b10346f jal x8,80005518 +8000176c: 8000175c .word 0x8000175c +80001770: 8000acbf .word 0x8000acbf +80001774: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000001 +80001778: 0004a703 lw x14,0(x9) +8000177c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000001 +80001780: 0004a803 lw x16,0(x9) +80001784: 00448493 addi x9,x9,4 + +80001788 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + andn x26, x14, x16 # perform operation +80001788: 41077d33 andn x26,x14,x16 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +8000178c: 000ba383 lw x7,0(x23) +80001790: 01a38863 beq x7,x26,800017a0 +80001794: 5850346f jal x8,80005518 +80001798: 80001788 .word 0x80001788 +8000179c: 8000ad10 .word 0x8000ad10 +800017a0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000001 +800017a4: 0004a903 lw x18,0(x9) +800017a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x00000002 +800017ac: 0004a203 lw x4,0(x9) +800017b0: 00448493 addi x9,x9,4 + +800017b4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + andn x10, x18, x4 # perform operation +800017b4: 40497533 andn x10,x18,x4 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017b8: 000ba383 lw x7,0(x23) +800017bc: 00a38863 beq x7,x10,800017cc +800017c0: 5590346f jal x8,80005518 +800017c4: 800017b4 .word 0x800017b4 +800017c8: 8000ad61 .word 0x8000ad61 +800017cc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000001 +800017d0: 0004a783 lw x15,0(x9) +800017d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +800017d8: 0004ab03 lw x22,0(x9) +800017dc: 00448493 addi x9,x9,4 + +800017e0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + andn x2, x15, x22 # perform operation +800017e0: 4167f133 andn x2,x15,x22 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017e4: 000ba383 lw x7,0(x23) +800017e8: 00238863 beq x7,x2,800017f8 +800017ec: 52d0346f jal x8,80005518 +800017f0: 800017e0 .word 0x800017e0 +800017f4: 8000adb2 .word 0x8000adb2 +800017f8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000001 +800017fc: 0004a803 lw x16,0(x9) +80001800: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000001 +80001804: 0004ac03 lw x24,0(x9) +80001808: 00448493 addi x9,x9,4 + +8000180c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + andn x21, x16, x24 # perform operation +8000180c: 41887ab3 andn x21,x16,x24 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001810: 000ba383 lw x7,0(x23) +80001814: 01538863 beq x7,x21,80001824 +80001818: 5010346f jal x8,80005518 +8000181c: 8000180c .word 0x8000180c +80001820: 8000ae0a .word 0x8000ae0a +80001824: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000001 +80001828: 0004a703 lw x14,0(x9) +8000182c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x7fffffff +80001830: 0004ac03 lw x24,0(x9) +80001834: 00448493 addi x9,x9,4 + +80001838 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + andn x1, x14, x24 # perform operation +80001838: 418770b3 andn x1,x14,x24 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000183c: 000ba383 lw x7,0(x23) +80001840: 00138863 beq x7,x1,80001850 +80001844: 4d50346f jal x8,80005518 +80001848: 80001838 .word 0x80001838 +8000184c: 8000ae62 .word 0x8000ae62 +80001850: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000001 +80001854: 0004a783 lw x15,0(x9) +80001858: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x7ffffffe +8000185c: 0004a683 lw x13,0(x9) +80001860: 00448493 addi x9,x9,4 + +80001864 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + andn x30, x15, x13 # perform operation +80001864: 40d7ff33 andn x30,x15,x13 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001868: 000ba383 lw x7,0(x23) +8000186c: 01e38863 beq x7,x30,8000187c +80001870: 4a90346f jal x8,80005518 +80001874: 80001864 .word 0x80001864 +80001878: 8000aeba .word 0x8000aeba +8000187c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000001 +80001880: 0004aa83 lw x21,0(x9) +80001884: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xffffffff +80001888: 0004a283 lw x5,0(x9) +8000188c: 00448493 addi x9,x9,4 + +80001890 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + andn x6, x21, x5 # perform operation +80001890: 405af333 andn x6,x21,x5 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +80001894: 000ba383 lw x7,0(x23) +80001898: 00638863 beq x7,x6,800018a8 +8000189c: 47d0346f jal x8,80005518 +800018a0: 80001890 .word 0x80001890 +800018a4: 8000af12 .word 0x8000af12 +800018a8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x00000001 +800018ac: 0004a303 lw x6,0(x9) +800018b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xfffffffe +800018b4: 0004a283 lw x5,0(x9) +800018b8: 00448493 addi x9,x9,4 + +800018bc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + andn x25, x6, x5 # perform operation +800018bc: 40537cb3 andn x25,x6,x5 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018c0: 000ba383 lw x7,0(x23) +800018c4: 01938863 beq x7,x25,800018d4 +800018c8: 4510346f jal x8,80005518 +800018cc: 800018bc .word 0x800018bc +800018d0: 8000af6a .word 0x8000af6a +800018d4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x00000001 +800018d8: 0004a503 lw x10,0(x9) +800018dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x5bbc8872 +800018e0: 0004aa83 lw x21,0(x9) +800018e4: 00448493 addi x9,x9,4 + +800018e8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + andn x28, x10, x21 # perform operation +800018e8: 41557e33 andn x28,x10,x21 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018ec: 000ba383 lw x7,0(x23) +800018f0: 01c38863 beq x7,x28,80001900 +800018f4: 4250346f jal x8,80005518 +800018f8: 800018e8 .word 0x800018e8 +800018fc: 8000afc2 .word 0x8000afc2 +80001900: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000001 +80001904: 0004a183 lw x3,0(x9) +80001908: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xaaaaaaaa +8000190c: 0004ae03 lw x28,0(x9) +80001910: 00448493 addi x9,x9,4 + +80001914 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + andn x15, x3, x28 # perform operation +80001914: 41c1f7b3 andn x15,x3,x28 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001918: 000ba383 lw x7,0(x23) +8000191c: 00f38863 beq x7,x15,8000192c +80001920: 3f90346f jal x8,80005518 +80001924: 80001914 .word 0x80001914 +80001928: 8000b01a .word 0x8000b01a +8000192c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000001 +80001930: 0004a803 lw x16,0(x9) +80001934: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x55555555 +80001938: 0004aa03 lw x20,0(x9) +8000193c: 00448493 addi x9,x9,4 + +80001940 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + andn x4, x16, x20 # perform operation +80001940: 41487233 andn x4,x16,x20 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001944: 000ba383 lw x7,0(x23) +80001948: 00438863 beq x7,x4,80001958 +8000194c: 3cd0346f jal x8,80005518 +80001950: 80001940 .word 0x80001940 +80001954: 8000b072 .word 0x8000b072 +80001958: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000002 +8000195c: 0004a983 lw x19,0(x9) +80001960: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000000 +80001964: 0004a503 lw x10,0(x9) +80001968: 00448493 addi x9,x9,4 + +8000196c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + andn x6, x19, x10 # perform operation +8000196c: 40a9f333 andn x6,x19,x10 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001970: 000ba383 lw x7,0(x23) +80001974: 00638863 beq x7,x6,80001984 +80001978: 3a10346f jal x8,80005518 +8000197c: 8000196c .word 0x8000196c +80001980: 8000b0ca .word 0x8000b0ca +80001984: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000002 +80001988: 0004a783 lw x15,0(x9) +8000198c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000001 +80001990: 0004a683 lw x13,0(x9) +80001994: 00448493 addi x9,x9,4 + +80001998 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + andn x14, x15, x13 # perform operation +80001998: 40d7f733 andn x14,x15,x13 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +8000199c: 000ba383 lw x7,0(x23) +800019a0: 00e38863 beq x7,x14,800019b0 +800019a4: 3750346f jal x8,80005518 +800019a8: 80001998 .word 0x80001998 +800019ac: 8000b11b .word 0x8000b11b +800019b0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000002 +800019b4: 0004a783 lw x15,0(x9) +800019b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000002 +800019bc: 0004a503 lw x10,0(x9) +800019c0: 00448493 addi x9,x9,4 + +800019c4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + andn x27, x15, x10 # perform operation +800019c4: 40a7fdb3 andn x27,x15,x10 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019c8: 000ba383 lw x7,0(x23) +800019cc: 01b38863 beq x7,x27,800019dc +800019d0: 3490346f jal x8,80005518 +800019d4: 800019c4 .word 0x800019c4 +800019d8: 8000b16c .word 0x8000b16c +800019dc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000002 +800019e0: 0004ae83 lw x29,0(x9) +800019e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +800019e8: 0004ab03 lw x22,0(x9) +800019ec: 00448493 addi x9,x9,4 + +800019f0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + andn x26, x29, x22 # perform operation +800019f0: 416efd33 andn x26,x29,x22 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019f4: 000ba383 lw x7,0(x23) +800019f8: 01a38863 beq x7,x26,80001a08 +800019fc: 31d0346f jal x8,80005518 +80001a00: 800019f0 .word 0x800019f0 +80001a04: 8000b1bd .word 0x8000b1bd +80001a08: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000002 +80001a0c: 0004a183 lw x3,0(x9) +80001a10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x80000001 +80001a14: 0004a603 lw x12,0(x9) +80001a18: 00448493 addi x9,x9,4 + +80001a1c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + andn x29, x3, x12 # perform operation +80001a1c: 40c1feb3 andn x29,x3,x12 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a20: 000ba383 lw x7,0(x23) +80001a24: 01d38863 beq x7,x29,80001a34 +80001a28: 2f10346f jal x8,80005518 +80001a2c: 80001a1c .word 0x80001a1c +80001a30: 8000b215 .word 0x8000b215 +80001a34: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000002 +80001a38: 0004a183 lw x3,0(x9) +80001a3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffff +80001a40: 0004a703 lw x14,0(x9) +80001a44: 00448493 addi x9,x9,4 + +80001a48 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + andn x12, x3, x14 # perform operation +80001a48: 40e1f633 andn x12,x3,x14 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a4c: 000ba383 lw x7,0(x23) +80001a50: 00c38863 beq x7,x12,80001a60 +80001a54: 2c50346f jal x8,80005518 +80001a58: 80001a48 .word 0x80001a48 +80001a5c: 8000b26d .word 0x8000b26d +80001a60: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000002 +80001a64: 0004ac83 lw x25,0(x9) +80001a68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x7ffffffe +80001a6c: 0004a683 lw x13,0(x9) +80001a70: 00448493 addi x9,x9,4 + +80001a74 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + andn x6, x25, x13 # perform operation +80001a74: 40dcf333 andn x6,x25,x13 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a78: 000ba383 lw x7,0(x23) +80001a7c: 00638863 beq x7,x6,80001a8c +80001a80: 2990346f jal x8,80005518 +80001a84: 80001a74 .word 0x80001a74 +80001a88: 8000b2c5 .word 0x8000b2c5 +80001a8c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000002 +80001a90: 0004a583 lw x11,0(x9) +80001a94: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xffffffff +80001a98: 0004af83 lw x31,0(x9) +80001a9c: 00448493 addi x9,x9,4 + +80001aa0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + andn x1, x11, x31 # perform operation +80001aa0: 41f5f0b3 andn x1,x11,x31 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aa4: 000ba383 lw x7,0(x23) +80001aa8: 00138863 beq x7,x1,80001ab8 +80001aac: 26d0346f jal x8,80005518 +80001ab0: 80001aa0 .word 0x80001aa0 +80001ab4: 8000b31d .word 0x8000b31d +80001ab8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000002 +80001abc: 0004a703 lw x14,0(x9) +80001ac0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfffffffe +80001ac4: 0004ad03 lw x26,0(x9) +80001ac8: 00448493 addi x9,x9,4 + +80001acc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + andn x19, x14, x26 # perform operation +80001acc: 41a779b3 andn x19,x14,x26 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ad0: 000ba383 lw x7,0(x23) +80001ad4: 01338863 beq x7,x19,80001ae4 +80001ad8: 2410346f jal x8,80005518 +80001adc: 80001acc .word 0x80001acc +80001ae0: 8000b375 .word 0x8000b375 +80001ae4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +80001ae8: 0004a903 lw x18,0(x9) +80001aec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x5bbc8872 +80001af0: 0004aa03 lw x20,0(x9) +80001af4: 00448493 addi x9,x9,4 + +80001af8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + andn x29, x18, x20 # perform operation +80001af8: 41497eb3 andn x29,x18,x20 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001afc: 000ba383 lw x7,0(x23) +80001b00: 01d38863 beq x7,x29,80001b10 +80001b04: 2150346f jal x8,80005518 +80001b08: 80001af8 .word 0x80001af8 +80001b0c: 8000b3cd .word 0x8000b3cd +80001b10: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000002 +80001b14: 0004ac83 lw x25,0(x9) +80001b18: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xaaaaaaaa +80001b1c: 0004a703 lw x14,0(x9) +80001b20: 00448493 addi x9,x9,4 + +80001b24 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + andn x10, x25, x14 # perform operation +80001b24: 40ecf533 andn x10,x25,x14 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b28: 000ba383 lw x7,0(x23) +80001b2c: 00a38863 beq x7,x10,80001b3c +80001b30: 1e90346f jal x8,80005518 +80001b34: 80001b24 .word 0x80001b24 +80001b38: 8000b425 .word 0x8000b425 +80001b3c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000002 +80001b40: 0004a803 lw x16,0(x9) +80001b44: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x55555555 +80001b48: 0004a083 lw x1,0(x9) +80001b4c: 00448493 addi x9,x9,4 + +80001b50 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + andn x10, x16, x1 # perform operation +80001b50: 40187533 andn x10,x16,x1 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b54: 000ba383 lw x7,0(x23) +80001b58: 00a38863 beq x7,x10,80001b68 +80001b5c: 1bd0346f jal x8,80005518 +80001b60: 80001b50 .word 0x80001b50 +80001b64: 8000b47d .word 0x8000b47d +80001b68: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x80000000 +80001b6c: 0004a683 lw x13,0(x9) +80001b70: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000 +80001b74: 0004ad03 lw x26,0(x9) +80001b78: 00448493 addi x9,x9,4 + +80001b7c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + andn x2, x13, x26 # perform operation +80001b7c: 41a6f133 andn x2,x13,x26 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b80: 000ba383 lw x7,0(x23) +80001b84: 00238863 beq x7,x2,80001b94 +80001b88: 1910346f jal x8,80005518 +80001b8c: 80001b7c .word 0x80001b7c +80001b90: 8000b4d5 .word 0x8000b4d5 +80001b94: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x80000000 +80001b98: 0004ac83 lw x25,0(x9) +80001b9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000001 +80001ba0: 0004a683 lw x13,0(x9) +80001ba4: 00448493 addi x9,x9,4 + +80001ba8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + andn x16, x25, x13 # perform operation +80001ba8: 40dcf833 andn x16,x25,x13 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bac: 000ba383 lw x7,0(x23) +80001bb0: 01038863 beq x7,x16,80001bc0 +80001bb4: 1650346f jal x8,80005518 +80001bb8: 80001ba8 .word 0x80001ba8 +80001bbc: 8000b52d .word 0x8000b52d +80001bc0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x80000000 +80001bc4: 0004a703 lw x14,0(x9) +80001bc8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x00000002 +80001bcc: 0004a603 lw x12,0(x9) +80001bd0: 00448493 addi x9,x9,4 + +80001bd4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + andn x24, x14, x12 # perform operation +80001bd4: 40c77c33 andn x24,x14,x12 + # Check if x24 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bd8: 000ba383 lw x7,0(x23) +80001bdc: 01838863 beq x7,x24,80001bec +80001be0: 1390346f jal x8,80005518 +80001be4: 80001bd4 .word 0x80001bd4 +80001be8: 8000b585 .word 0x8000b585 +80001bec: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x80000000 +80001bf0: 0004a503 lw x10,0(x9) +80001bf4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x80000000 +80001bf8: 0004af83 lw x31,0(x9) +80001bfc: 00448493 addi x9,x9,4 + +80001c00 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + andn x25, x10, x31 # perform operation +80001c00: 41f57cb3 andn x25,x10,x31 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c04: 000ba383 lw x7,0(x23) +80001c08: 01938863 beq x7,x25,80001c18 +80001c0c: 10d0346f jal x8,80005518 +80001c10: 80001c00 .word 0x80001c00 +80001c14: 8000b5dd .word 0x8000b5dd +80001c18: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x80000000 +80001c1c: 0004ab03 lw x22,0(x9) +80001c20: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x80000001 +80001c24: 0004a103 lw x2,0(x9) +80001c28: 00448493 addi x9,x9,4 + +80001c2c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + andn x12, x22, x2 # perform operation +80001c2c: 402b7633 andn x12,x22,x2 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c30: 000ba383 lw x7,0(x23) +80001c34: 00c38863 beq x7,x12,80001c44 +80001c38: 0e10346f jal x8,80005518 +80001c3c: 80001c2c .word 0x80001c2c +80001c40: 8000b63c .word 0x8000b63c +80001c44: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x80000000 +80001c48: 0004ad83 lw x27,0(x9) +80001c4c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffff +80001c50: 0004aa03 lw x20,0(x9) +80001c54: 00448493 addi x9,x9,4 + +80001c58 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + andn x14, x27, x20 # perform operation +80001c58: 414df733 andn x14,x27,x20 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c5c: 000ba383 lw x7,0(x23) +80001c60: 00e38863 beq x7,x14,80001c70 +80001c64: 0b50346f jal x8,80005518 +80001c68: 80001c58 .word 0x80001c58 +80001c6c: 8000b69b .word 0x8000b69b +80001c70: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000000 +80001c74: 0004a603 lw x12,0(x9) +80001c78: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffe +80001c7c: 0004a083 lw x1,0(x9) +80001c80: 00448493 addi x9,x9,4 + +80001c84 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + andn x2, x12, x1 # perform operation +80001c84: 40167133 andn x2,x12,x1 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c88: 000ba383 lw x7,0(x23) +80001c8c: 00238863 beq x7,x2,80001c9c +80001c90: 0890346f jal x8,80005518 +80001c94: 80001c84 .word 0x80001c84 +80001c98: 8000b6fa .word 0x8000b6fa +80001c9c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000000 +80001ca0: 0004aa03 lw x20,0(x9) +80001ca4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xffffffff +80001ca8: 0004a283 lw x5,0(x9) +80001cac: 00448493 addi x9,x9,4 + +80001cb0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + andn x14, x20, x5 # perform operation +80001cb0: 405a7733 andn x14,x20,x5 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cb4: 000ba383 lw x7,0(x23) +80001cb8: 00e38863 beq x7,x14,80001cc8 +80001cbc: 05d0346f jal x8,80005518 +80001cc0: 80001cb0 .word 0x80001cb0 +80001cc4: 8000b759 .word 0x8000b759 +80001cc8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000000 +80001ccc: 0004aa03 lw x20,0(x9) +80001cd0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfffffffe +80001cd4: 0004ad03 lw x26,0(x9) +80001cd8: 00448493 addi x9,x9,4 + +80001cdc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + andn x17, x20, x26 # perform operation +80001cdc: 41aa78b3 andn x17,x20,x26 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001ce0: 000ba383 lw x7,0(x23) +80001ce4: 01138863 beq x7,x17,80001cf4 +80001ce8: 0310346f jal x8,80005518 +80001cec: 80001cdc .word 0x80001cdc +80001cf0: 8000b7b8 .word 0x8000b7b8 +80001cf4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x80000000 +80001cf8: 0004a903 lw x18,0(x9) +80001cfc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc8872 +80001d00: 0004a703 lw x14,0(x9) +80001d04: 00448493 addi x9,x9,4 + +80001d08 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + andn x17, x18, x14 # perform operation +80001d08: 40e978b3 andn x17,x18,x14 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d0c: 000ba383 lw x7,0(x23) +80001d10: 01138863 beq x7,x17,80001d20 +80001d14: 0050346f jal x8,80005518 +80001d18: 80001d08 .word 0x80001d08 +80001d1c: 8000b817 .word 0x8000b817 +80001d20: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x80000000 +80001d24: 0004ab03 lw x22,0(x9) +80001d28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xaaaaaaaa +80001d2c: 0004a083 lw x1,0(x9) +80001d30: 00448493 addi x9,x9,4 + +80001d34 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + andn x3, x22, x1 # perform operation +80001d34: 401b71b3 andn x3,x22,x1 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d38: 000ba383 lw x7,0(x23) +80001d3c: 00338863 beq x7,x3,80001d4c +80001d40: 7d80346f jal x8,80005518 +80001d44: 80001d34 .word 0x80001d34 +80001d48: 8000b876 .word 0x8000b876 +80001d4c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000000 +80001d50: 0004aa03 lw x20,0(x9) +80001d54: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x55555555 +80001d58: 0004ad83 lw x27,0(x9) +80001d5c: 00448493 addi x9,x9,4 + +80001d60 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + andn x29, x20, x27 # perform operation +80001d60: 41ba7eb3 andn x29,x20,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d64: 000ba383 lw x7,0(x23) +80001d68: 01d38863 beq x7,x29,80001d78 +80001d6c: 7ac0346f jal x8,80005518 +80001d70: 80001d60 .word 0x80001d60 +80001d74: 8000b8d5 .word 0x8000b8d5 +80001d78: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x80000001 +80001d7c: 0004a083 lw x1,0(x9) +80001d80: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000 +80001d84: 0004a103 lw x2,0(x9) +80001d88: 00448493 addi x9,x9,4 + +80001d8c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + andn x26, x1, x2 # perform operation +80001d8c: 4020fd33 andn x26,x1,x2 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d90: 000ba383 lw x7,0(x23) +80001d94: 01a38863 beq x7,x26,80001da4 +80001d98: 7800346f jal x8,80005518 +80001d9c: 80001d8c .word 0x80001d8c +80001da0: 8000b934 .word 0x8000b934 +80001da4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x80000001 +80001da8: 0004a583 lw x11,0(x9) +80001dac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000001 +80001db0: 0004ad83 lw x27,0(x9) +80001db4: 00448493 addi x9,x9,4 + +80001db8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + andn x29, x11, x27 # perform operation +80001db8: 41b5feb3 andn x29,x11,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dbc: 000ba383 lw x7,0(x23) +80001dc0: 01d38863 beq x7,x29,80001dd0 +80001dc4: 7540346f jal x8,80005518 +80001dc8: 80001db8 .word 0x80001db8 +80001dcc: 8000b98c .word 0x8000b98c +80001dd0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x80000001 +80001dd4: 0004a503 lw x10,0(x9) +80001dd8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000002 +80001ddc: 0004ab03 lw x22,0(x9) +80001de0: 00448493 addi x9,x9,4 + +80001de4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + andn x19, x10, x22 # perform operation +80001de4: 416579b3 andn x19,x10,x22 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001de8: 000ba383 lw x7,0(x23) +80001dec: 01338863 beq x7,x19,80001dfc +80001df0: 7280346f jal x8,80005518 +80001df4: 80001de4 .word 0x80001de4 +80001df8: 8000b9e4 .word 0x8000b9e4 +80001dfc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000001 +80001e00: 0004a603 lw x12,0(x9) +80001e04: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x80000000 +80001e08: 0004a303 lw x6,0(x9) +80001e0c: 00448493 addi x9,x9,4 + +80001e10 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + andn x19, x12, x6 # perform operation +80001e10: 406679b3 andn x19,x12,x6 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e14: 000ba383 lw x7,0(x23) +80001e18: 01338863 beq x7,x19,80001e28 +80001e1c: 6fc0346f jal x8,80005518 +80001e20: 80001e10 .word 0x80001e10 +80001e24: 8000ba3c .word 0x8000ba3c +80001e28: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x80000001 +80001e2c: 0004a203 lw x4,0(x9) +80001e30: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x80000001 +80001e34: 0004ad03 lw x26,0(x9) +80001e38: 00448493 addi x9,x9,4 + +80001e3c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + andn x3, x4, x26 # perform operation +80001e3c: 41a271b3 andn x3,x4,x26 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e40: 000ba383 lw x7,0(x23) +80001e44: 00338863 beq x7,x3,80001e54 +80001e48: 6d00346f jal x8,80005518 +80001e4c: 80001e3c .word 0x80001e3c +80001e50: 8000ba9b .word 0x8000ba9b +80001e54: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x80000001 +80001e58: 0004af83 lw x31,0(x9) +80001e5c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x7fffffff +80001e60: 0004aa83 lw x21,0(x9) +80001e64: 00448493 addi x9,x9,4 + +80001e68 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + andn x6, x31, x21 # perform operation +80001e68: 415ff333 andn x6,x31,x21 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e6c: 000ba383 lw x7,0(x23) +80001e70: 00638863 beq x7,x6,80001e80 +80001e74: 6a40346f jal x8,80005518 +80001e78: 80001e68 .word 0x80001e68 +80001e7c: 8000bafa .word 0x8000bafa +80001e80: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000001 +80001e84: 0004aa03 lw x20,0(x9) +80001e88: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7ffffffe +80001e8c: 0004a703 lw x14,0(x9) +80001e90: 00448493 addi x9,x9,4 + +80001e94 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + andn x18, x20, x14 # perform operation +80001e94: 40ea7933 andn x18,x20,x14 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e98: 000ba383 lw x7,0(x23) +80001e9c: 01238863 beq x7,x18,80001eac +80001ea0: 6780346f jal x8,80005518 +80001ea4: 80001e94 .word 0x80001e94 +80001ea8: 8000bb59 .word 0x8000bb59 +80001eac: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x80000001 +80001eb0: 0004a183 lw x3,0(x9) +80001eb4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xffffffff +80001eb8: 0004a983 lw x19,0(x9) +80001ebc: 00448493 addi x9,x9,4 + +80001ec0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + andn x25, x3, x19 # perform operation +80001ec0: 4131fcb3 andn x25,x3,x19 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ec4: 000ba383 lw x7,0(x23) +80001ec8: 01938863 beq x7,x25,80001ed8 +80001ecc: 64c0346f jal x8,80005518 +80001ed0: 80001ec0 .word 0x80001ec0 +80001ed4: 8000bbb8 .word 0x8000bbb8 +80001ed8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x80000001 +80001edc: 0004ae83 lw x29,0(x9) +80001ee0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xfffffffe +80001ee4: 0004aa83 lw x21,0(x9) +80001ee8: 00448493 addi x9,x9,4 + +80001eec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + andn x14, x29, x21 # perform operation +80001eec: 415ef733 andn x14,x29,x21 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ef0: 000ba383 lw x7,0(x23) +80001ef4: 00e38863 beq x7,x14,80001f04 +80001ef8: 6200346f jal x8,80005518 +80001efc: 80001eec .word 0x80001eec +80001f00: 8000bc17 .word 0x8000bc17 +80001f04: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x80000001 +80001f08: 0004a703 lw x14,0(x9) +80001f0c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x5bbc8872 +80001f10: 0004a283 lw x5,0(x9) +80001f14: 00448493 addi x9,x9,4 + +80001f18 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + andn x27, x14, x5 # perform operation +80001f18: 40577db3 andn x27,x14,x5 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f1c: 000ba383 lw x7,0(x23) +80001f20: 01b38863 beq x7,x27,80001f30 +80001f24: 5f40346f jal x8,80005518 +80001f28: 80001f18 .word 0x80001f18 +80001f2c: 8000bc76 .word 0x8000bc76 +80001f30: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x80000001 +80001f34: 0004a983 lw x19,0(x9) +80001f38: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xaaaaaaaa +80001f3c: 0004af03 lw x30,0(x9) +80001f40: 00448493 addi x9,x9,4 + +80001f44 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + andn x16, x19, x30 # perform operation +80001f44: 41e9f833 andn x16,x19,x30 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f48: 000ba383 lw x7,0(x23) +80001f4c: 01038863 beq x7,x16,80001f5c +80001f50: 5c80346f jal x8,80005518 +80001f54: 80001f44 .word 0x80001f44 +80001f58: 8000bcd5 .word 0x8000bcd5 +80001f5c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x80000001 +80001f60: 0004a683 lw x13,0(x9) +80001f64: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x55555555 +80001f68: 0004a583 lw x11,0(x9) +80001f6c: 00448493 addi x9,x9,4 + +80001f70 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + andn x12, x13, x11 # perform operation +80001f70: 40b6f633 andn x12,x13,x11 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f74: 000ba383 lw x7,0(x23) +80001f78: 00c38863 beq x7,x12,80001f88 +80001f7c: 59c0346f jal x8,80005518 +80001f80: 80001f70 .word 0x80001f70 +80001f84: 8000bd34 .word 0x8000bd34 +80001f88: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffff +80001f8c: 0004a803 lw x16,0(x9) +80001f90: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000 +80001f94: 0004ad83 lw x27,0(x9) +80001f98: 00448493 addi x9,x9,4 + +80001f9c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + andn x2, x16, x27 # perform operation +80001f9c: 41b87133 andn x2,x16,x27 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fa0: 000ba383 lw x7,0(x23) +80001fa4: 00238863 beq x7,x2,80001fb4 +80001fa8: 5700346f jal x8,80005518 +80001fac: 80001f9c .word 0x80001f9c +80001fb0: 8000bd93 .word 0x8000bd93 +80001fb4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7fffffff +80001fb8: 0004aa83 lw x21,0(x9) +80001fbc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000001 +80001fc0: 0004a983 lw x19,0(x9) +80001fc4: 00448493 addi x9,x9,4 + +80001fc8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + andn x26, x21, x19 # perform operation +80001fc8: 413afd33 andn x26,x21,x19 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fcc: 000ba383 lw x7,0(x23) +80001fd0: 01a38863 beq x7,x26,80001fe0 +80001fd4: 5440346f jal x8,80005518 +80001fd8: 80001fc8 .word 0x80001fc8 +80001fdc: 8000bdeb .word 0x8000bdeb +80001fe0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7fffffff +80001fe4: 0004a503 lw x10,0(x9) +80001fe8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000002 +80001fec: 0004ab03 lw x22,0(x9) +80001ff0: 00448493 addi x9,x9,4 + +80001ff4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + andn x19, x10, x22 # perform operation +80001ff4: 416579b3 andn x19,x10,x22 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ff8: 000ba383 lw x7,0(x23) +80001ffc: 01338863 beq x7,x19,8000200c +80002000: 5180346f jal x8,80005518 +80002004: 80001ff4 .word 0x80001ff4 +80002008: 8000be43 .word 0x8000be43 +8000200c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffff +80002010: 0004af83 lw x31,0(x9) +80002014: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x80000000 +80002018: 0004ac83 lw x25,0(x9) +8000201c: 00448493 addi x9,x9,4 + +80002020 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + andn x30, x31, x25 # perform operation +80002020: 419fff33 andn x30,x31,x25 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002024: 000ba383 lw x7,0(x23) +80002028: 01e38863 beq x7,x30,80002038 +8000202c: 4ec0346f jal x8,80005518 +80002030: 80002020 .word 0x80002020 +80002034: 8000be9b .word 0x8000be9b +80002038: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7fffffff +8000203c: 0004a883 lw x17,0(x9) +80002040: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000001 +80002044: 0004ac03 lw x24,0(x9) +80002048: 00448493 addi x9,x9,4 + +8000204c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + andn x19, x17, x24 # perform operation +8000204c: 4188f9b3 andn x19,x17,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002050: 000ba383 lw x7,0(x23) +80002054: 01338863 beq x7,x19,80002064 +80002058: 4c00346f jal x8,80005518 +8000205c: 8000204c .word 0x8000204c +80002060: 8000befa .word 0x8000befa +80002064: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7fffffff +80002068: 0004a983 lw x19,0(x9) +8000206c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x7fffffff +80002070: 0004a683 lw x13,0(x9) +80002074: 00448493 addi x9,x9,4 + +80002078 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + andn x30, x19, x13 # perform operation +80002078: 40d9ff33 andn x30,x19,x13 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000207c: 000ba383 lw x7,0(x23) +80002080: 01e38863 beq x7,x30,80002090 +80002084: 4940346f jal x8,80005518 +80002088: 80002078 .word 0x80002078 +8000208c: 8000bf59 .word 0x8000bf59 +80002090: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x7fffffff +80002094: 0004a283 lw x5,0(x9) +80002098: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffe +8000209c: 0004a783 lw x15,0(x9) +800020a0: 00448493 addi x9,x9,4 + +800020a4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + andn x30, x5, x15 # perform operation +800020a4: 40f2ff33 andn x30,x5,x15 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020a8: 000ba383 lw x7,0(x23) +800020ac: 01e38863 beq x7,x30,800020bc +800020b0: 4680346f jal x8,80005518 +800020b4: 800020a4 .word 0x800020a4 +800020b8: 8000bfb8 .word 0x8000bfb8 +800020bc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffff +800020c0: 0004a803 lw x16,0(x9) +800020c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xffffffff +800020c8: 0004ac83 lw x25,0(x9) +800020cc: 00448493 addi x9,x9,4 + +800020d0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + andn x30, x16, x25 # perform operation +800020d0: 41987f33 andn x30,x16,x25 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020d4: 000ba383 lw x7,0(x23) +800020d8: 01e38863 beq x7,x30,800020e8 +800020dc: 43c0346f jal x8,80005518 +800020e0: 800020d0 .word 0x800020d0 +800020e4: 8000c017 .word 0x8000c017 +800020e8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x7fffffff +800020ec: 0004a203 lw x4,0(x9) +800020f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xfffffffe +800020f4: 0004aa83 lw x21,0(x9) +800020f8: 00448493 addi x9,x9,4 + +800020fc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + andn x24, x4, x21 # perform operation +800020fc: 41527c33 andn x24,x4,x21 + # Check if x24 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002100: 000ba383 lw x7,0(x23) +80002104: 01838863 beq x7,x24,80002114 +80002108: 4100346f jal x8,80005518 +8000210c: 800020fc .word 0x800020fc +80002110: 8000c076 .word 0x8000c076 +80002114: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x7fffffff +80002118: 0004a283 lw x5,0(x9) +8000211c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x5bbc8872 +80002120: 0004ae03 lw x28,0(x9) +80002124: 00448493 addi x9,x9,4 + +80002128 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + andn x19, x5, x28 # perform operation +80002128: 41c2f9b3 andn x19,x5,x28 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000212c: 000ba383 lw x7,0(x23) +80002130: 01338863 beq x7,x19,80002140 +80002134: 3e40346f jal x8,80005518 +80002138: 80002128 .word 0x80002128 +8000213c: 8000c0d5 .word 0x8000c0d5 +80002140: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7fffffff +80002144: 0004a983 lw x19,0(x9) +80002148: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xaaaaaaaa +8000214c: 0004af83 lw x31,0(x9) +80002150: 00448493 addi x9,x9,4 + +80002154 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + andn x27, x19, x31 # perform operation +80002154: 41f9fdb3 andn x27,x19,x31 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002158: 000ba383 lw x7,0(x23) +8000215c: 01b38863 beq x7,x27,8000216c +80002160: 3b80346f jal x8,80005518 +80002164: 80002154 .word 0x80002154 +80002168: 8000c134 .word 0x8000c134 +8000216c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7fffffff +80002170: 0004ab03 lw x22,0(x9) +80002174: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x55555555 +80002178: 0004a503 lw x10,0(x9) +8000217c: 00448493 addi x9,x9,4 + +80002180 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + andn x2, x22, x10 # perform operation +80002180: 40ab7133 andn x2,x22,x10 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002184: 000ba383 lw x7,0(x23) +80002188: 00238863 beq x7,x2,80002198 +8000218c: 38c0346f jal x8,80005518 +80002190: 80002180 .word 0x80002180 +80002194: 8000c193 .word 0x8000c193 +80002198: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x7ffffffe +8000219c: 0004af03 lw x30,0(x9) +800021a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000 +800021a4: 0004ad83 lw x27,0(x9) +800021a8: 00448493 addi x9,x9,4 + +800021ac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + andn x29, x30, x27 # perform operation +800021ac: 41bf7eb3 andn x29,x30,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021b0: 000ba383 lw x7,0(x23) +800021b4: 01d38863 beq x7,x29,800021c4 +800021b8: 3600346f jal x8,80005518 +800021bc: 800021ac .word 0x800021ac +800021c0: 8000c1f2 .word 0x8000c1f2 +800021c4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x7ffffffe +800021c8: 0004a283 lw x5,0(x9) +800021cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x00000001 +800021d0: 0004ac03 lw x24,0(x9) +800021d4: 00448493 addi x9,x9,4 + +800021d8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + andn x11, x5, x24 # perform operation +800021d8: 4182f5b3 andn x11,x5,x24 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021dc: 000ba383 lw x7,0(x23) +800021e0: 00b38863 beq x7,x11,800021f0 +800021e4: 3340346f jal x8,80005518 +800021e8: 800021d8 .word 0x800021d8 +800021ec: 8000c24a .word 0x8000c24a +800021f0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7ffffffe +800021f4: 0004ac83 lw x25,0(x9) +800021f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x00000002 +800021fc: 0004ac03 lw x24,0(x9) +80002200: 00448493 addi x9,x9,4 + +80002204 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + andn x13, x25, x24 # perform operation +80002204: 418cf6b3 andn x13,x25,x24 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002208: 000ba383 lw x7,0(x23) +8000220c: 00d38863 beq x7,x13,8000221c +80002210: 3080346f jal x8,80005518 +80002214: 80002204 .word 0x80002204 +80002218: 8000c2a2 .word 0x8000c2a2 +8000221c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x7ffffffe +80002220: 0004a283 lw x5,0(x9) +80002224: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000000 +80002228: 0004ac03 lw x24,0(x9) +8000222c: 00448493 addi x9,x9,4 + +80002230 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + andn x6, x5, x24 # perform operation +80002230: 4182f333 andn x6,x5,x24 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002234: 000ba383 lw x7,0(x23) +80002238: 00638863 beq x7,x6,80002248 +8000223c: 2dc0346f jal x8,80005518 +80002240: 80002230 .word 0x80002230 +80002244: 8000c2fa .word 0x8000c2fa +80002248: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +8000224c: 0004ae83 lw x29,0(x9) +80002250: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x80000001 +80002254: 0004a783 lw x15,0(x9) +80002258: 00448493 addi x9,x9,4 + +8000225c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + andn x11, x29, x15 # perform operation +8000225c: 40fef5b3 andn x11,x29,x15 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002260: 000ba383 lw x7,0(x23) +80002264: 00b38863 beq x7,x11,80002274 +80002268: 2b00346f jal x8,80005518 +8000226c: 8000225c .word 0x8000225c +80002270: 8000c359 .word 0x8000c359 +80002274: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x7ffffffe +80002278: 0004a083 lw x1,0(x9) +8000227c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffff +80002280: 0004aa03 lw x20,0(x9) +80002284: 00448493 addi x9,x9,4 + +80002288 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + andn x31, x1, x20 # perform operation +80002288: 4140ffb3 andn x31,x1,x20 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +8000228c: 000ba383 lw x7,0(x23) +80002290: 01f38863 beq x7,x31,800022a0 +80002294: 2840346f jal x8,80005518 +80002298: 80002288 .word 0x80002288 +8000229c: 8000c3b8 .word 0x8000c3b8 +800022a0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x7ffffffe +800022a4: 0004ae03 lw x28,0(x9) +800022a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7ffffffe +800022ac: 0004a803 lw x16,0(x9) +800022b0: 00448493 addi x9,x9,4 + +800022b4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + andn x20, x28, x16 # perform operation +800022b4: 410e7a33 andn x20,x28,x16 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022b8: 000ba383 lw x7,0(x23) +800022bc: 01438863 beq x7,x20,800022cc +800022c0: 2580346f jal x8,80005518 +800022c4: 800022b4 .word 0x800022b4 +800022c8: 8000c417 .word 0x8000c417 +800022cc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x7ffffffe +800022d0: 0004a083 lw x1,0(x9) +800022d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xffffffff +800022d8: 0004ae03 lw x28,0(x9) +800022dc: 00448493 addi x9,x9,4 + +800022e0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + andn x17, x1, x28 # perform operation +800022e0: 41c0f8b3 andn x17,x1,x28 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022e4: 000ba383 lw x7,0(x23) +800022e8: 01138863 beq x7,x17,800022f8 +800022ec: 22c0346f jal x8,80005518 +800022f0: 800022e0 .word 0x800022e0 +800022f4: 8000c476 .word 0x8000c476 +800022f8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7ffffffe +800022fc: 0004a183 lw x3,0(x9) +80002300: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xfffffffe +80002304: 0004a783 lw x15,0(x9) +80002308: 00448493 addi x9,x9,4 + +8000230c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + andn x31, x3, x15 # perform operation +8000230c: 40f1ffb3 andn x31,x3,x15 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002310: 000ba383 lw x7,0(x23) +80002314: 01f38863 beq x7,x31,80002324 +80002318: 2000346f jal x8,80005518 +8000231c: 8000230c .word 0x8000230c +80002320: 8000c4d5 .word 0x8000c4d5 +80002324: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x7ffffffe +80002328: 0004ac03 lw x24,0(x9) +8000232c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x5bbc8872 +80002330: 0004aa03 lw x20,0(x9) +80002334: 00448493 addi x9,x9,4 + +80002338 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + andn x30, x24, x20 # perform operation +80002338: 414c7f33 andn x30,x24,x20 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000233c: 000ba383 lw x7,0(x23) +80002340: 01e38863 beq x7,x30,80002350 +80002344: 1d40346f jal x8,80005518 +80002348: 80002338 .word 0x80002338 +8000234c: 8000c534 .word 0x8000c534 +80002350: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7ffffffe +80002354: 0004a803 lw x16,0(x9) +80002358: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xaaaaaaaa +8000235c: 0004a983 lw x19,0(x9) +80002360: 00448493 addi x9,x9,4 + +80002364 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + andn x6, x16, x19 # perform operation +80002364: 41387333 andn x6,x16,x19 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002368: 000ba383 lw x7,0(x23) +8000236c: 00638863 beq x7,x6,8000237c +80002370: 1a80346f jal x8,80005518 +80002374: 80002364 .word 0x80002364 +80002378: 8000c593 .word 0x8000c593 +8000237c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x7ffffffe +80002380: 0004a683 lw x13,0(x9) +80002384: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x55555555 +80002388: 0004ac83 lw x25,0(x9) +8000238c: 00448493 addi x9,x9,4 + +80002390 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + andn x20, x13, x25 # perform operation +80002390: 4196fa33 andn x20,x13,x25 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +80002394: 000ba383 lw x7,0(x23) +80002398: 01438863 beq x7,x20,800023a8 +8000239c: 17c0346f jal x8,80005518 +800023a0: 80002390 .word 0x80002390 +800023a4: 8000c5f2 .word 0x8000c5f2 +800023a8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xffffffff +800023ac: 0004a603 lw x12,0(x9) +800023b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000 +800023b4: 0004a103 lw x2,0(x9) +800023b8: 00448493 addi x9,x9,4 + +800023bc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + andn x20, x12, x2 # perform operation +800023bc: 40267a33 andn x20,x12,x2 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023c0: 000ba383 lw x7,0(x23) +800023c4: 01438863 beq x7,x20,800023d4 +800023c8: 1500346f jal x8,80005518 +800023cc: 800023bc .word 0x800023bc +800023d0: 8000c651 .word 0x8000c651 +800023d4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xffffffff +800023d8: 0004af03 lw x30,0(x9) +800023dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000001 +800023e0: 0004a683 lw x13,0(x9) +800023e4: 00448493 addi x9,x9,4 + +800023e8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + andn x11, x30, x13 # perform operation +800023e8: 40df75b3 andn x11,x30,x13 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023ec: 000ba383 lw x7,0(x23) +800023f0: 00b38863 beq x7,x11,80002400 +800023f4: 1240346f jal x8,80005518 +800023f8: 800023e8 .word 0x800023e8 +800023fc: 8000c6a9 .word 0x8000c6a9 +80002400: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xffffffff +80002404: 0004a603 lw x12,0(x9) +80002408: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000002 +8000240c: 0004a983 lw x19,0(x9) +80002410: 00448493 addi x9,x9,4 + +80002414 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + andn x3, x12, x19 # perform operation +80002414: 413671b3 andn x3,x12,x19 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002418: 000ba383 lw x7,0(x23) +8000241c: 00338863 beq x7,x3,8000242c +80002420: 0f80346f jal x8,80005518 +80002424: 80002414 .word 0x80002414 +80002428: 8000c701 .word 0x8000c701 +8000242c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xffffffff +80002430: 0004a983 lw x19,0(x9) +80002434: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x80000000 +80002438: 0004a703 lw x14,0(x9) +8000243c: 00448493 addi x9,x9,4 + +80002440 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + andn x5, x19, x14 # perform operation +80002440: 40e9f2b3 andn x5,x19,x14 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002444: 000ba383 lw x7,0(x23) +80002448: 00538863 beq x7,x5,80002458 +8000244c: 0cc0346f jal x8,80005518 +80002450: 80002440 .word 0x80002440 +80002454: 8000c759 .word 0x8000c759 +80002458: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xffffffff +8000245c: 0004ac03 lw x24,0(x9) +80002460: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x80000001 +80002464: 0004a783 lw x15,0(x9) +80002468: 00448493 addi x9,x9,4 + +8000246c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + andn x12, x24, x15 # perform operation +8000246c: 40fc7633 andn x12,x24,x15 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002470: 000ba383 lw x7,0(x23) +80002474: 00c38863 beq x7,x12,80002484 +80002478: 0a00346f jal x8,80005518 +8000247c: 8000246c .word 0x8000246c +80002480: 8000c7b8 .word 0x8000c7b8 +80002484: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xffffffff +80002488: 0004a183 lw x3,0(x9) +8000248c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7fffffff +80002490: 0004a583 lw x11,0(x9) +80002494: 00448493 addi x9,x9,4 + +80002498 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + andn x18, x3, x11 # perform operation +80002498: 40b1f933 andn x18,x3,x11 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +8000249c: 000ba383 lw x7,0(x23) +800024a0: 01238863 beq x7,x18,800024b0 +800024a4: 0740346f jal x8,80005518 +800024a8: 80002498 .word 0x80002498 +800024ac: 8000c817 .word 0x8000c817 +800024b0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xffffffff +800024b4: 0004a603 lw x12,0(x9) +800024b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x7ffffffe +800024bc: 0004ae03 lw x28,0(x9) +800024c0: 00448493 addi x9,x9,4 + +800024c4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + andn x1, x12, x28 # perform operation +800024c4: 41c670b3 andn x1,x12,x28 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024c8: 000ba383 lw x7,0(x23) +800024cc: 00138863 beq x7,x1,800024dc +800024d0: 0480346f jal x8,80005518 +800024d4: 800024c4 .word 0x800024c4 +800024d8: 8000c876 .word 0x8000c876 +800024dc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xffffffff +800024e0: 0004ad03 lw x26,0(x9) +800024e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xffffffff +800024e8: 0004ab03 lw x22,0(x9) +800024ec: 00448493 addi x9,x9,4 + +800024f0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + andn x6, x26, x22 # perform operation +800024f0: 416d7333 andn x6,x26,x22 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024f4: 000ba383 lw x7,0(x23) +800024f8: 00638863 beq x7,x6,80002508 +800024fc: 01c0346f jal x8,80005518 +80002500: 800024f0 .word 0x800024f0 +80002504: 8000c8d5 .word 0x8000c8d5 +80002508: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffff +8000250c: 0004a103 lw x2,0(x9) +80002510: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xfffffffe +80002514: 0004a983 lw x19,0(x9) +80002518: 00448493 addi x9,x9,4 + +8000251c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + andn x4, x2, x19 # perform operation +8000251c: 41317233 andn x4,x2,x19 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002520: 000ba383 lw x7,0(x23) +80002524: 00438863 beq x7,x4,80002534 +80002528: 7f10246f jal x8,80005518 +8000252c: 8000251c .word 0x8000251c +80002530: 8000c934 .word 0x8000c934 +80002534: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xffffffff +80002538: 0004a883 lw x17,0(x9) +8000253c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x5bbc8872 +80002540: 0004af83 lw x31,0(x9) +80002544: 00448493 addi x9,x9,4 + +80002548 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + andn x4, x17, x31 # perform operation +80002548: 41f8f233 andn x4,x17,x31 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000254c: 000ba383 lw x7,0(x23) +80002550: 00438863 beq x7,x4,80002560 +80002554: 7c50246f jal x8,80005518 +80002558: 80002548 .word 0x80002548 +8000255c: 8000c993 .word 0x8000c993 +80002560: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xffffffff +80002564: 0004a883 lw x17,0(x9) +80002568: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xaaaaaaaa +8000256c: 0004af83 lw x31,0(x9) +80002570: 00448493 addi x9,x9,4 + +80002574 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + andn x16, x17, x31 # perform operation +80002574: 41f8f833 andn x16,x17,x31 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002578: 000ba383 lw x7,0(x23) +8000257c: 01038863 beq x7,x16,8000258c +80002580: 7990246f jal x8,80005518 +80002584: 80002574 .word 0x80002574 +80002588: 8000c9f2 .word 0x8000c9f2 +8000258c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffff +80002590: 0004a083 lw x1,0(x9) +80002594: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x55555555 +80002598: 0004a883 lw x17,0(x9) +8000259c: 00448493 addi x9,x9,4 + +800025a0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + andn x5, x1, x17 # perform operation +800025a0: 4110f2b3 andn x5,x1,x17 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025a4: 000ba383 lw x7,0(x23) +800025a8: 00538863 beq x7,x5,800025b8 +800025ac: 76d0246f jal x8,80005518 +800025b0: 800025a0 .word 0x800025a0 +800025b4: 8000ca51 .word 0x8000ca51 +800025b8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xfffffffe +800025bc: 0004a783 lw x15,0(x9) +800025c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000000 +800025c4: 0004a683 lw x13,0(x9) +800025c8: 00448493 addi x9,x9,4 + +800025cc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + andn x26, x15, x13 # perform operation +800025cc: 40d7fd33 andn x26,x15,x13 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025d0: 000ba383 lw x7,0(x23) +800025d4: 01a38863 beq x7,x26,800025e4 +800025d8: 7410246f jal x8,80005518 +800025dc: 800025cc .word 0x800025cc +800025e0: 8000cab0 .word 0x8000cab0 +800025e4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffe +800025e8: 0004a903 lw x18,0(x9) +800025ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000001 +800025f0: 0004a303 lw x6,0(x9) +800025f4: 00448493 addi x9,x9,4 + +800025f8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + andn x26, x18, x6 # perform operation +800025f8: 40697d33 andn x26,x18,x6 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +800025fc: 000ba383 lw x7,0(x23) +80002600: 01a38863 beq x7,x26,80002610 +80002604: 7150246f jal x8,80005518 +80002608: 800025f8 .word 0x800025f8 +8000260c: 8000cb08 .word 0x8000cb08 +80002610: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xfffffffe +80002614: 0004a303 lw x6,0(x9) +80002618: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x00000002 +8000261c: 0004a583 lw x11,0(x9) +80002620: 00448493 addi x9,x9,4 + +80002624 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + andn x14, x6, x11 # perform operation +80002624: 40b37733 andn x14,x6,x11 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002628: 000ba383 lw x7,0(x23) +8000262c: 00e38863 beq x7,x14,8000263c +80002630: 6e90246f jal x8,80005518 +80002634: 80002624 .word 0x80002624 +80002638: 8000cb60 .word 0x8000cb60 +8000263c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xfffffffe +80002640: 0004a203 lw x4,0(x9) +80002644: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x80000000 +80002648: 0004a603 lw x12,0(x9) +8000264c: 00448493 addi x9,x9,4 + +80002650 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + andn x30, x4, x12 # perform operation +80002650: 40c27f33 andn x30,x4,x12 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002654: 000ba383 lw x7,0(x23) +80002658: 01e38863 beq x7,x30,80002668 +8000265c: 6bd0246f jal x8,80005518 +80002660: 80002650 .word 0x80002650 +80002664: 8000cbb8 .word 0x8000cbb8 +80002668: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffe +8000266c: 0004a083 lw x1,0(x9) +80002670: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x80000001 +80002674: 0004a703 lw x14,0(x9) +80002678: 00448493 addi x9,x9,4 + +8000267c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + andn x10, x1, x14 # perform operation +8000267c: 40e0f533 andn x10,x1,x14 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002680: 000ba383 lw x7,0(x23) +80002684: 00a38863 beq x7,x10,80002694 +80002688: 6910246f jal x8,80005518 +8000268c: 8000267c .word 0x8000267c +80002690: 8000cc17 .word 0x8000cc17 +80002694: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xfffffffe +80002698: 0004a983 lw x19,0(x9) +8000269c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7fffffff +800026a0: 0004a083 lw x1,0(x9) +800026a4: 00448493 addi x9,x9,4 + +800026a8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + andn x29, x19, x1 # perform operation +800026a8: 4019feb3 andn x29,x19,x1 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026ac: 000ba383 lw x7,0(x23) +800026b0: 01d38863 beq x7,x29,800026c0 +800026b4: 6650246f jal x8,80005518 +800026b8: 800026a8 .word 0x800026a8 +800026bc: 8000cc76 .word 0x8000cc76 +800026c0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xfffffffe +800026c4: 0004a883 lw x17,0(x9) +800026c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7ffffffe +800026cc: 0004af03 lw x30,0(x9) +800026d0: 00448493 addi x9,x9,4 + +800026d4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + andn x31, x17, x30 # perform operation +800026d4: 41e8ffb3 andn x31,x17,x30 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026d8: 000ba383 lw x7,0(x23) +800026dc: 01f38863 beq x7,x31,800026ec +800026e0: 6390246f jal x8,80005518 +800026e4: 800026d4 .word 0x800026d4 +800026e8: 8000ccd5 .word 0x8000ccd5 +800026ec: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xfffffffe +800026f0: 0004ad83 lw x27,0(x9) +800026f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xffffffff +800026f8: 0004a203 lw x4,0(x9) +800026fc: 00448493 addi x9,x9,4 + +80002700 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + andn x10, x27, x4 # perform operation +80002700: 404df533 andn x10,x27,x4 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002704: 000ba383 lw x7,0(x23) +80002708: 00a38863 beq x7,x10,80002718 +8000270c: 60d0246f jal x8,80005518 +80002710: 80002700 .word 0x80002700 +80002714: 8000cd34 .word 0x8000cd34 +80002718: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffe +8000271c: 0004a083 lw x1,0(x9) +80002720: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfffffffe +80002724: 0004ac03 lw x24,0(x9) +80002728: 00448493 addi x9,x9,4 + +8000272c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + andn x21, x1, x24 # perform operation +8000272c: 4180fab3 andn x21,x1,x24 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002730: 000ba383 lw x7,0(x23) +80002734: 01538863 beq x7,x21,80002744 +80002738: 5e10246f jal x8,80005518 +8000273c: 8000272c .word 0x8000272c +80002740: 8000cd93 .word 0x8000cd93 +80002744: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xfffffffe +80002748: 0004ad03 lw x26,0(x9) +8000274c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x5bbc8872 +80002750: 0004ac03 lw x24,0(x9) +80002754: 00448493 addi x9,x9,4 + +80002758 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + andn x5, x26, x24 # perform operation +80002758: 418d72b3 andn x5,x26,x24 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000275c: 000ba383 lw x7,0(x23) +80002760: 00538863 beq x7,x5,80002770 +80002764: 5b50246f jal x8,80005518 +80002768: 80002758 .word 0x80002758 +8000276c: 8000cdf2 .word 0x8000cdf2 +80002770: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xfffffffe +80002774: 0004a103 lw x2,0(x9) +80002778: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xaaaaaaaa +8000277c: 0004ad03 lw x26,0(x9) +80002780: 00448493 addi x9,x9,4 + +80002784 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + andn x29, x2, x26 # perform operation +80002784: 41a17eb3 andn x29,x2,x26 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002788: 000ba383 lw x7,0(x23) +8000278c: 01d38863 beq x7,x29,8000279c +80002790: 5890246f jal x8,80005518 +80002794: 80002784 .word 0x80002784 +80002798: 8000ce51 .word 0x8000ce51 +8000279c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xfffffffe +800027a0: 0004aa83 lw x21,0(x9) +800027a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x55555555 +800027a8: 0004a703 lw x14,0(x9) +800027ac: 00448493 addi x9,x9,4 + +800027b0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + andn x17, x21, x14 # perform operation +800027b0: 40eaf8b3 andn x17,x21,x14 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027b4: 000ba383 lw x7,0(x23) +800027b8: 01138863 beq x7,x17,800027c8 +800027bc: 55d0246f jal x8,80005518 +800027c0: 800027b0 .word 0x800027b0 +800027c4: 8000ceb0 .word 0x8000ceb0 +800027c8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x5bbc8872 +800027cc: 0004a683 lw x13,0(x9) +800027d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000 +800027d4: 0004ad83 lw x27,0(x9) +800027d8: 00448493 addi x9,x9,4 + +800027dc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + andn x11, x13, x27 # perform operation +800027dc: 41b6f5b3 andn x11,x13,x27 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027e0: 000ba383 lw x7,0(x23) +800027e4: 00b38863 beq x7,x11,800027f4 +800027e8: 5310246f jal x8,80005518 +800027ec: 800027dc .word 0x800027dc +800027f0: 8000cf0f .word 0x8000cf0f +800027f4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5bbc8872 +800027f8: 0004a703 lw x14,0(x9) +800027fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000001 +80002800: 0004a303 lw x6,0(x9) +80002804: 00448493 addi x9,x9,4 + +80002808 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + andn x31, x14, x6 # perform operation +80002808: 40677fb3 andn x31,x14,x6 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000280c: 000ba383 lw x7,0(x23) +80002810: 01f38863 beq x7,x31,80002820 +80002814: 5050246f jal x8,80005518 +80002818: 80002808 .word 0x80002808 +8000281c: 8000cf67 .word 0x8000cf67 +80002820: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x5bbc8872 +80002824: 0004a183 lw x3,0(x9) +80002828: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000002 +8000282c: 0004a783 lw x15,0(x9) +80002830: 00448493 addi x9,x9,4 + +80002834 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + andn x16, x3, x15 # perform operation +80002834: 40f1f833 andn x16,x3,x15 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002838: 000ba383 lw x7,0(x23) +8000283c: 01038863 beq x7,x16,8000284c +80002840: 4d90246f jal x8,80005518 +80002844: 80002834 .word 0x80002834 +80002848: 8000cfbf .word 0x8000cfbf +8000284c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5bbc8872 +80002850: 0004ae03 lw x28,0(x9) +80002854: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x80000000 +80002858: 0004aa83 lw x21,0(x9) +8000285c: 00448493 addi x9,x9,4 + +80002860 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + andn x18, x28, x21 # perform operation +80002860: 415e7933 andn x18,x28,x21 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002864: 000ba383 lw x7,0(x23) +80002868: 01238863 beq x7,x18,80002878 +8000286c: 4ad0246f jal x8,80005518 +80002870: 80002860 .word 0x80002860 +80002874: 8000d017 .word 0x8000d017 +80002878: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5bbc8872 +8000287c: 0004a703 lw x14,0(x9) +80002880: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x80000001 +80002884: 0004a903 lw x18,0(x9) +80002888: 00448493 addi x9,x9,4 + +8000288c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + andn x12, x14, x18 # perform operation +8000288c: 41277633 andn x12,x14,x18 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002890: 000ba383 lw x7,0(x23) +80002894: 00c38863 beq x7,x12,800028a4 +80002898: 4810246f jal x8,80005518 +8000289c: 8000288c .word 0x8000288c +800028a0: 8000d076 .word 0x8000d076 +800028a4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x5bbc8872 +800028a8: 0004a183 lw x3,0(x9) +800028ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fffffff +800028b0: 0004a803 lw x16,0(x9) +800028b4: 00448493 addi x9,x9,4 + +800028b8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + andn x13, x3, x16 # perform operation +800028b8: 4101f6b3 andn x13,x3,x16 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028bc: 000ba383 lw x7,0(x23) +800028c0: 00d38863 beq x7,x13,800028d0 +800028c4: 4550246f jal x8,80005518 +800028c8: 800028b8 .word 0x800028b8 +800028cc: 8000d0d5 .word 0x8000d0d5 +800028d0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x5bbc8872 +800028d4: 0004a783 lw x15,0(x9) +800028d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x7ffffffe +800028dc: 0004ae03 lw x28,0(x9) +800028e0: 00448493 addi x9,x9,4 + +800028e4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + andn x27, x15, x28 # perform operation +800028e4: 41c7fdb3 andn x27,x15,x28 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028e8: 000ba383 lw x7,0(x23) +800028ec: 01b38863 beq x7,x27,800028fc +800028f0: 4290246f jal x8,80005518 +800028f4: 800028e4 .word 0x800028e4 +800028f8: 8000d134 .word 0x8000d134 +800028fc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5bbc8872 +80002900: 0004ae03 lw x28,0(x9) +80002904: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xffffffff +80002908: 0004a583 lw x11,0(x9) +8000290c: 00448493 addi x9,x9,4 + +80002910 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + andn x18, x28, x11 # perform operation +80002910: 40be7933 andn x18,x28,x11 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002914: 000ba383 lw x7,0(x23) +80002918: 01238863 beq x7,x18,80002928 +8000291c: 3fd0246f jal x8,80005518 +80002920: 80002910 .word 0x80002910 +80002924: 8000d193 .word 0x8000d193 +80002928: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5bbc8872 +8000292c: 0004a583 lw x11,0(x9) +80002930: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xfffffffe +80002934: 0004a683 lw x13,0(x9) +80002938: 00448493 addi x9,x9,4 + +8000293c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + andn x29, x11, x13 # perform operation +8000293c: 40d5feb3 andn x29,x11,x13 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002940: 000ba383 lw x7,0(x23) +80002944: 01d38863 beq x7,x29,80002954 +80002948: 3d10246f jal x8,80005518 +8000294c: 8000293c .word 0x8000293c +80002950: 8000d1f2 .word 0x8000d1f2 +80002954: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x5bbc8872 +80002958: 0004a683 lw x13,0(x9) +8000295c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x5bbc8872 +80002960: 0004ae83 lw x29,0(x9) +80002964: 00448493 addi x9,x9,4 + +80002968 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + andn x2, x13, x29 # perform operation +80002968: 41d6f133 andn x2,x13,x29 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000296c: 000ba383 lw x7,0(x23) +80002970: 00238863 beq x7,x2,80002980 +80002974: 3a50246f jal x8,80005518 +80002978: 80002968 .word 0x80002968 +8000297c: 8000d251 .word 0x8000d251 +80002980: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x5bbc8872 +80002984: 0004af03 lw x30,0(x9) +80002988: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xaaaaaaaa +8000298c: 0004a603 lw x12,0(x9) +80002990: 00448493 addi x9,x9,4 + +80002994 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + andn x25, x30, x12 # perform operation +80002994: 40cf7cb3 andn x25,x30,x12 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +80002998: 000ba383 lw x7,0(x23) +8000299c: 01938863 beq x7,x25,800029ac +800029a0: 3790246f jal x8,80005518 +800029a4: 80002994 .word 0x80002994 +800029a8: 8000d2b0 .word 0x8000d2b0 +800029ac: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x5bbc8872 +800029b0: 0004a803 lw x16,0(x9) +800029b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x55555555 +800029b8: 0004a083 lw x1,0(x9) +800029bc: 00448493 addi x9,x9,4 + +800029c0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + andn x24, x16, x1 # perform operation +800029c0: 40187c33 andn x24,x16,x1 + # Check if x24 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029c4: 000ba383 lw x7,0(x23) +800029c8: 01838863 beq x7,x24,800029d8 +800029cc: 34d0246f jal x8,80005518 +800029d0: 800029c0 .word 0x800029c0 +800029d4: 8000d30f .word 0x8000d30f +800029d8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaa +800029dc: 0004a703 lw x14,0(x9) +800029e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000 +800029e4: 0004ad03 lw x26,0(x9) +800029e8: 00448493 addi x9,x9,4 + +800029ec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + andn x28, x14, x26 # perform operation +800029ec: 41a77e33 andn x28,x14,x26 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029f0: 000ba383 lw x7,0(x23) +800029f4: 01c38863 beq x7,x28,80002a04 +800029f8: 3210246f jal x8,80005518 +800029fc: 800029ec .word 0x800029ec +80002a00: 8000d36e .word 0x8000d36e +80002a04: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xaaaaaaaa +80002a08: 0004af83 lw x31,0(x9) +80002a0c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000001 +80002a10: 0004ac83 lw x25,0(x9) +80002a14: 00448493 addi x9,x9,4 + +80002a18 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + andn x28, x31, x25 # perform operation +80002a18: 419ffe33 andn x28,x31,x25 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a1c: 000ba383 lw x7,0(x23) +80002a20: 01c38863 beq x7,x28,80002a30 +80002a24: 2f50246f jal x8,80005518 +80002a28: 80002a18 .word 0x80002a18 +80002a2c: 8000d3c6 .word 0x8000d3c6 +80002a30: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xaaaaaaaa +80002a34: 0004a103 lw x2,0(x9) +80002a38: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000002 +80002a3c: 0004ae03 lw x28,0(x9) +80002a40: 00448493 addi x9,x9,4 + +80002a44 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + andn x12, x2, x28 # perform operation +80002a44: 41c17633 andn x12,x2,x28 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a48: 000ba383 lw x7,0(x23) +80002a4c: 00c38863 beq x7,x12,80002a5c +80002a50: 2c90246f jal x8,80005518 +80002a54: 80002a44 .word 0x80002a44 +80002a58: 8000d41e .word 0x8000d41e +80002a5c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xaaaaaaaa +80002a60: 0004ad83 lw x27,0(x9) +80002a64: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x80000000 +80002a68: 0004a603 lw x12,0(x9) +80002a6c: 00448493 addi x9,x9,4 + +80002a70 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + andn x19, x27, x12 # perform operation +80002a70: 40cdf9b3 andn x19,x27,x12 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a74: 000ba383 lw x7,0(x23) +80002a78: 01338863 beq x7,x19,80002a88 +80002a7c: 29d0246f jal x8,80005518 +80002a80: 80002a70 .word 0x80002a70 +80002a84: 8000d476 .word 0x8000d476 +80002a88: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xaaaaaaaa +80002a8c: 0004a303 lw x6,0(x9) +80002a90: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x80000001 +80002a94: 0004a903 lw x18,0(x9) +80002a98: 00448493 addi x9,x9,4 + +80002a9c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + andn x11, x6, x18 # perform operation +80002a9c: 412375b3 andn x11,x6,x18 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aa0: 000ba383 lw x7,0(x23) +80002aa4: 00b38863 beq x7,x11,80002ab4 +80002aa8: 2710246f jal x8,80005518 +80002aac: 80002a9c .word 0x80002a9c +80002ab0: 8000d4d5 .word 0x8000d4d5 +80002ab4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xaaaaaaaa +80002ab8: 0004a883 lw x17,0(x9) +80002abc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x7fffffff +80002ac0: 0004a603 lw x12,0(x9) +80002ac4: 00448493 addi x9,x9,4 + +80002ac8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + andn x30, x17, x12 # perform operation +80002ac8: 40c8ff33 andn x30,x17,x12 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002acc: 000ba383 lw x7,0(x23) +80002ad0: 01e38863 beq x7,x30,80002ae0 +80002ad4: 2450246f jal x8,80005518 +80002ad8: 80002ac8 .word 0x80002ac8 +80002adc: 8000d534 .word 0x8000d534 +80002ae0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaa +80002ae4: 0004ab03 lw x22,0(x9) +80002ae8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffe +80002aec: 0004a783 lw x15,0(x9) +80002af0: 00448493 addi x9,x9,4 + +80002af4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + andn x20, x22, x15 # perform operation +80002af4: 40fb7a33 andn x20,x22,x15 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002af8: 000ba383 lw x7,0(x23) +80002afc: 01438863 beq x7,x20,80002b0c +80002b00: 2190246f jal x8,80005518 +80002b04: 80002af4 .word 0x80002af4 +80002b08: 8000d593 .word 0x8000d593 +80002b0c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xaaaaaaaa +80002b10: 0004a583 lw x11,0(x9) +80002b14: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffff +80002b18: 0004a303 lw x6,0(x9) +80002b1c: 00448493 addi x9,x9,4 + +80002b20 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + andn x26, x11, x6 # perform operation +80002b20: 4065fd33 andn x26,x11,x6 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b24: 000ba383 lw x7,0(x23) +80002b28: 01a38863 beq x7,x26,80002b38 +80002b2c: 1ed0246f jal x8,80005518 +80002b30: 80002b20 .word 0x80002b20 +80002b34: 8000d5f2 .word 0x8000d5f2 +80002b38: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xaaaaaaaa +80002b3c: 0004a303 lw x6,0(x9) +80002b40: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xfffffffe +80002b44: 0004a883 lw x17,0(x9) +80002b48: 00448493 addi x9,x9,4 + +80002b4c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + andn x26, x6, x17 # perform operation +80002b4c: 41137d33 andn x26,x6,x17 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b50: 000ba383 lw x7,0(x23) +80002b54: 01a38863 beq x7,x26,80002b64 +80002b58: 1c10246f jal x8,80005518 +80002b5c: 80002b4c .word 0x80002b4c +80002b60: 8000d651 .word 0x8000d651 +80002b64: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xaaaaaaaa +80002b68: 0004af83 lw x31,0(x9) +80002b6c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x5bbc8872 +80002b70: 0004a583 lw x11,0(x9) +80002b74: 00448493 addi x9,x9,4 + +80002b78 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + andn x6, x31, x11 # perform operation +80002b78: 40bff333 andn x6,x31,x11 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b7c: 000ba383 lw x7,0(x23) +80002b80: 00638863 beq x7,x6,80002b90 +80002b84: 1950246f jal x8,80005518 +80002b88: 80002b78 .word 0x80002b78 +80002b8c: 8000d6b0 .word 0x8000d6b0 +80002b90: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xaaaaaaaa +80002b94: 0004ad83 lw x27,0(x9) +80002b98: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xaaaaaaaa +80002b9c: 0004ab03 lw x22,0(x9) +80002ba0: 00448493 addi x9,x9,4 + +80002ba4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + andn x5, x27, x22 # perform operation +80002ba4: 416df2b3 andn x5,x27,x22 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002ba8: 000ba383 lw x7,0(x23) +80002bac: 00538863 beq x7,x5,80002bbc +80002bb0: 1690246f jal x8,80005518 +80002bb4: 80002ba4 .word 0x80002ba4 +80002bb8: 8000d70f .word 0x8000d70f +80002bbc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xaaaaaaaa +80002bc0: 0004ae83 lw x29,0(x9) +80002bc4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x55555555 +80002bc8: 0004a683 lw x13,0(x9) +80002bcc: 00448493 addi x9,x9,4 + +80002bd0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + andn x27, x29, x13 # perform operation +80002bd0: 40defdb3 andn x27,x29,x13 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bd4: 000ba383 lw x7,0(x23) +80002bd8: 01b38863 beq x7,x27,80002be8 +80002bdc: 13d0246f jal x8,80005518 +80002be0: 80002bd0 .word 0x80002bd0 +80002be4: 8000d76e .word 0x8000d76e +80002be8: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x55555555 +80002bec: 0004a183 lw x3,0(x9) +80002bf0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x00000000 +80002bf4: 0004a203 lw x4,0(x9) +80002bf8: 00448493 addi x9,x9,4 + +80002bfc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + andn x29, x3, x4 # perform operation +80002bfc: 4041feb3 andn x29,x3,x4 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c00: 000ba383 lw x7,0(x23) +80002c04: 01d38863 beq x7,x29,80002c14 +80002c08: 1110246f jal x8,80005518 +80002c0c: 80002bfc .word 0x80002bfc +80002c10: 8000d7cd .word 0x8000d7cd +80002c14: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x55555555 +80002c18: 0004a903 lw x18,0(x9) +80002c1c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000001 +80002c20: 0004a783 lw x15,0(x9) +80002c24: 00448493 addi x9,x9,4 + +80002c28 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + andn x30, x18, x15 # perform operation +80002c28: 40f97f33 andn x30,x18,x15 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c2c: 000ba383 lw x7,0(x23) +80002c30: 01e38863 beq x7,x30,80002c40 +80002c34: 0e50246f jal x8,80005518 +80002c38: 80002c28 .word 0x80002c28 +80002c3c: 8000d825 .word 0x8000d825 +80002c40: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x55555555 +80002c44: 0004ac03 lw x24,0(x9) +80002c48: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000002 +80002c4c: 0004aa03 lw x20,0(x9) +80002c50: 00448493 addi x9,x9,4 + +80002c54 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + andn x11, x24, x20 # perform operation +80002c54: 414c75b3 andn x11,x24,x20 + # Check if x11 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c58: 000ba383 lw x7,0(x23) +80002c5c: 00b38863 beq x7,x11,80002c6c +80002c60: 0b90246f jal x8,80005518 +80002c64: 80002c54 .word 0x80002c54 +80002c68: 8000d87d .word 0x8000d87d +80002c6c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x55555555 +80002c70: 0004ab03 lw x22,0(x9) +80002c74: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x80000000 +80002c78: 0004a183 lw x3,0(x9) +80002c7c: 00448493 addi x9,x9,4 + +80002c80 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + andn x10, x22, x3 # perform operation +80002c80: 403b7533 andn x10,x22,x3 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c84: 000ba383 lw x7,0(x23) +80002c88: 00a38863 beq x7,x10,80002c98 +80002c8c: 08d0246f jal x8,80005518 +80002c90: 80002c80 .word 0x80002c80 +80002c94: 8000d8d5 .word 0x8000d8d5 +80002c98: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x55555555 +80002c9c: 0004a683 lw x13,0(x9) +80002ca0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x80000001 +80002ca4: 0004a903 lw x18,0(x9) +80002ca8: 00448493 addi x9,x9,4 + +80002cac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + andn x2, x13, x18 # perform operation +80002cac: 4126f133 andn x2,x13,x18 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cb0: 000ba383 lw x7,0(x23) +80002cb4: 00238863 beq x7,x2,80002cc4 +80002cb8: 0610246f jal x8,80005518 +80002cbc: 80002cac .word 0x80002cac +80002cc0: 8000d934 .word 0x8000d934 +80002cc4: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x55555555 +80002cc8: 0004aa03 lw x20,0(x9) +80002ccc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffff +80002cd0: 0004a703 lw x14,0(x9) +80002cd4: 00448493 addi x9,x9,4 + +80002cd8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + andn x2, x20, x14 # perform operation +80002cd8: 40ea7133 andn x2,x20,x14 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cdc: 000ba383 lw x7,0(x23) +80002ce0: 00238863 beq x7,x2,80002cf0 +80002ce4: 0350246f jal x8,80005518 +80002ce8: 80002cd8 .word 0x80002cd8 +80002cec: 8000d993 .word 0x8000d993 +80002cf0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x55555555 +80002cf4: 0004ac83 lw x25,0(x9) +80002cf8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x7ffffffe +80002cfc: 0004ac03 lw x24,0(x9) +80002d00: 00448493 addi x9,x9,4 + +80002d04 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + andn x16, x25, x24 # perform operation +80002d04: 418cf833 andn x16,x25,x24 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d08: 000ba383 lw x7,0(x23) +80002d0c: 01038863 beq x7,x16,80002d1c +80002d10: 0090246f jal x8,80005518 +80002d14: 80002d04 .word 0x80002d04 +80002d18: 8000d9f2 .word 0x8000d9f2 +80002d1c: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x55555555 +80002d20: 0004aa03 lw x20,0(x9) +80002d24: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffff +80002d28: 0004af03 lw x30,0(x9) +80002d2c: 00448493 addi x9,x9,4 + +80002d30 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + andn x17, x20, x30 # perform operation +80002d30: 41ea78b3 andn x17,x20,x30 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d34: 000ba383 lw x7,0(x23) +80002d38: 01138863 beq x7,x17,80002d48 +80002d3c: 7dc0246f jal x8,80005518 +80002d40: 80002d30 .word 0x80002d30 +80002d44: 8000da51 .word 0x8000da51 +80002d48: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x55555555 +80002d4c: 0004a783 lw x15,0(x9) +80002d50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xfffffffe +80002d54: 0004af03 lw x30,0(x9) +80002d58: 00448493 addi x9,x9,4 + +80002d5c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + andn x5, x15, x30 # perform operation +80002d5c: 41e7f2b3 andn x5,x15,x30 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d60: 000ba383 lw x7,0(x23) +80002d64: 00538863 beq x7,x5,80002d74 +80002d68: 7b00246f jal x8,80005518 +80002d6c: 80002d5c .word 0x80002d5c +80002d70: 8000dab0 .word 0x8000dab0 +80002d74: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x55555555 +80002d78: 0004ad83 lw x27,0(x9) +80002d7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x5bbc8872 +80002d80: 0004ae03 lw x28,0(x9) +80002d84: 00448493 addi x9,x9,4 + +80002d88 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + andn x13, x27, x28 # perform operation +80002d88: 41cdf6b3 andn x13,x27,x28 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d8c: 000ba383 lw x7,0(x23) +80002d90: 00d38863 beq x7,x13,80002da0 +80002d94: 7840246f jal x8,80005518 +80002d98: 80002d88 .word 0x80002d88 +80002d9c: 8000db0f .word 0x8000db0f +80002da0: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x55555555 +80002da4: 0004a283 lw x5,0(x9) +80002da8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xaaaaaaaa +80002dac: 0004ac83 lw x25,0(x9) +80002db0: 00448493 addi x9,x9,4 + +80002db4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + andn x24, x5, x25 # perform operation +80002db4: 4192fc33 andn x24,x5,x25 + # Check if x24 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002db8: 000ba383 lw x7,0(x23) +80002dbc: 01838863 beq x7,x24,80002dcc +80002dc0: 7580246f jal x8,80005518 +80002dc4: 80002db4 .word 0x80002db4 +80002dc8: 8000db6e .word 0x8000db6e +80002dcc: 004b8b93 addi x23,x23,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x55555555 +80002dd0: 0004a883 lw x17,0(x9) +80002dd4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x55555555 +80002dd8: 0004a583 lw x11,0(x9) +80002ddc: 00448493 addi x9,x9,4 + +80002de0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + andn x16, x17, x11 # perform operation +80002de0: 40b8f833 andn x16,x17,x11 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002de4: 000ba383 lw x7,0(x23) +80002de8: 01038863 beq x7,x16,80002df8 +80002dec: 72c0246f jal x8,80005518 +80002df0: 80002de0 .word 0x80002de0 +80002df4: 8000dbcd .word 0x8000dbcd +80002df8: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x82fea0a1 +80002dfc: 0004a003 lw x0,0(x9) +80002e00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x396a597d +80002e04: 0004a003 lw x0,0(x9) +80002e08: 00448493 addi x9,x9,4 + +80002e0c : +Zbkb_andn_cg_cmp_rs1_rs2_b0: + andn x19, x0, x0 # perform operation +80002e0c: 400079b3 andn x19,x0,x0 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cmp_rs1_rs2_b0, Zbkb_andn_cg_cmp_rs1_rs2_b0_str) +80002e10: 000ba383 lw x7,0(x23) +80002e14: 01338863 beq x7,x19,80002e24 +80002e18: 7000246f jal x8,80005518 +80002e1c: 80002e0c .word 0x80002e0c +80002e20: 8000dc2c .word 0x8000dc2c +80002e24: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x45c0e044 +80002e28: 0004a083 lw x1,0(x9) +80002e2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xaab07515 +80002e30: 0004a083 lw x1,0(x9) +80002e34: 00448493 addi x9,x9,4 + +80002e38 : +Zbkb_andn_cg_cmp_rs1_rs2_b1: + andn x15, x1, x1 # perform operation +80002e38: 4010f7b3 andn x15,x1,x1 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_andn_cg_cmp_rs1_rs2_b1, Zbkb_andn_cg_cmp_rs1_rs2_b1_str) +80002e3c: 000ba383 lw x7,0(x23) +80002e40: 00f38863 beq x7,x15,80002e50 +80002e44: 6d40246f jal x8,80005518 +80002e48: 80002e38 .word 0x80002e38 +80002e4c: 8000dc64 .word 0x8000dc64 +80002e50: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x2caba5be +80002e54: 0004a103 lw x2,0(x9) +80002e58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xc5145a6d +80002e5c: 0004a103 lw x2,0(x9) +80002e60: 00448493 addi x9,x9,4 + +80002e64 : +Zbkb_andn_cg_cmp_rs1_rs2_b2: + andn x13, x2, x2 # perform operation +80002e64: 402176b3 andn x13,x2,x2 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_andn_cg_cmp_rs1_rs2_b2, Zbkb_andn_cg_cmp_rs1_rs2_b2_str) +80002e68: 000ba383 lw x7,0(x23) +80002e6c: 00d38863 beq x7,x13,80002e7c +80002e70: 6a80246f jal x8,80005518 +80002e74: 80002e64 .word 0x80002e64 +80002e78: 8000dc9c .word 0x8000dc9c +80002e7c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x758cc116 +80002e80: 0004a183 lw x3,0(x9) +80002e84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xce0d278f +80002e88: 0004a183 lw x3,0(x9) +80002e8c: 00448493 addi x9,x9,4 + +80002e90 : +Zbkb_andn_cg_cmp_rs1_rs2_b3: + andn x19, x3, x3 # perform operation +80002e90: 4031f9b3 andn x19,x3,x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_andn_cg_cmp_rs1_rs2_b3, Zbkb_andn_cg_cmp_rs1_rs2_b3_str) +80002e94: 000ba383 lw x7,0(x23) +80002e98: 01338863 beq x7,x19,80002ea8 +80002e9c: 67c0246f jal x8,80005518 +80002ea0: 80002e90 .word 0x80002e90 +80002ea4: 8000dcd4 .word 0x8000dcd4 +80002ea8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x66a95c41 +80002eac: 0004a203 lw x4,0(x9) +80002eb0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xb8d02571 +80002eb4: 0004a203 lw x4,0(x9) +80002eb8: 00448493 addi x9,x9,4 + +80002ebc : +Zbkb_andn_cg_cmp_rs1_rs2_b4: + andn x21, x4, x4 # perform operation +80002ebc: 40427ab3 andn x21,x4,x4 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_andn_cg_cmp_rs1_rs2_b4, Zbkb_andn_cg_cmp_rs1_rs2_b4_str) +80002ec0: 000ba383 lw x7,0(x23) +80002ec4: 01538863 beq x7,x21,80002ed4 +80002ec8: 6500246f jal x8,80005518 +80002ecc: 80002ebc .word 0x80002ebc +80002ed0: 8000dd0c .word 0x8000dd0c +80002ed4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x141008d0 +80002ed8: 0004a283 lw x5,0(x9) +80002edc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xb33cba16 +80002ee0: 0004a283 lw x5,0(x9) +80002ee4: 00448493 addi x9,x9,4 + +80002ee8 : +Zbkb_andn_cg_cmp_rs1_rs2_b5: + andn x21, x5, x5 # perform operation +80002ee8: 4052fab3 andn x21,x5,x5 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_andn_cg_cmp_rs1_rs2_b5, Zbkb_andn_cg_cmp_rs1_rs2_b5_str) +80002eec: 000ba383 lw x7,0(x23) +80002ef0: 01538863 beq x7,x21,80002f00 +80002ef4: 6240246f jal x8,80005518 +80002ef8: 80002ee8 .word 0x80002ee8 +80002efc: 8000dd44 .word 0x8000dd44 +80002f00: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xa316e74c +80002f04: 0004a303 lw x6,0(x9) +80002f08: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x9bd36066 +80002f0c: 0004a303 lw x6,0(x9) +80002f10: 00448493 addi x9,x9,4 + +80002f14 : +Zbkb_andn_cg_cmp_rs1_rs2_b6: + andn x16, x6, x6 # perform operation +80002f14: 40637833 andn x16,x6,x6 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_andn_cg_cmp_rs1_rs2_b6, Zbkb_andn_cg_cmp_rs1_rs2_b6_str) +80002f18: 000ba383 lw x7,0(x23) +80002f1c: 01038863 beq x7,x16,80002f2c +80002f20: 5f80246f jal x8,80005518 +80002f24: 80002f14 .word 0x80002f14 +80002f28: 8000dd7c .word 0x8000dd7c +80002f2c: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f30: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f34: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x2b493246 +80002f38: 0004a383 lw x7,0(x9) +80002f3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xb9648951 +80002f40: 0004a383 lw x7,0(x9) +80002f44: 00448493 addi x9,x9,4 + +80002f48 : +Zbkb_andn_cg_cmp_rs1_rs2_b7: + andn x24, x7, x7 # perform operation +80002f48: 4073fc33 andn x24,x7,x7 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_andn_cg_cmp_rs1_rs2_b7, Zbkb_andn_cg_cmp_rs1_rs2_b7_str) +80002f4c: 000ba203 lw x4,0(x23) +80002f50: 01820863 beq x4,x24,80002f60 +80002f54: 5ac022ef jal x5,80005500 +80002f58: 80002f48 .word 0x80002f48 +80002f5c: 8000ddb4 .word 0x8000ddb4 +80002f60: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xaa1646c7 +80002f64: 0004a403 lw x8,0(x9) +80002f68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x55bcb93b +80002f6c: 0004a403 lw x8,0(x9) +80002f70: 00448493 addi x9,x9,4 + +80002f74 : +Zbkb_andn_cg_cmp_rs1_rs2_b8: + andn x22, x8, x8 # perform operation +80002f74: 40847b33 andn x22,x8,x8 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_andn_cg_cmp_rs1_rs2_b8, Zbkb_andn_cg_cmp_rs1_rs2_b8_str) +80002f78: 000ba203 lw x4,0(x23) +80002f7c: 01620863 beq x4,x22,80002f8c +80002f80: 580022ef jal x5,80005500 +80002f84: 80002f74 .word 0x80002f74 +80002f88: 8000ddec .word 0x8000ddec +80002f8c: 004b8b93 addi x23,x23,4 + + mv x29, x9 # switch data pointer register to avoid conflict with test +80002f90: 00048e93 addi x29,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x3e0aee26 +80002f94: 000ea483 lw x9,0(x29) +80002f98: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs2: x9 = 0xfbd68833 +80002f9c: 000ea483 lw x9,0(x29) +80002fa0: 004e8e93 addi x29,x29,4 + +80002fa4 : +Zbkb_andn_cg_cmp_rs1_rs2_b9: + andn x0, x9, x9 # perform operation +80002fa4: 4094f033 andn x0,x9,x9 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zbkb_andn_cg_cmp_rs1_rs2_b9, Zbkb_andn_cg_cmp_rs1_rs2_b9_str) +80002fa8: 000ba203 lw x4,0(x23) +80002fac: 00020863 beq x4,x0,80002fbc +80002fb0: 550022ef jal x5,80005500 +80002fb4: 80002fa4 .word 0x80002fa4 +80002fb8: 8000de24 .word 0x8000de24 +80002fbc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xf4dcc866 +80002fc0: 000ea503 lw x10,0(x29) +80002fc4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x1aa1d9bf +80002fc8: 000ea503 lw x10,0(x29) +80002fcc: 004e8e93 addi x29,x29,4 + +80002fd0 : +Zbkb_andn_cg_cmp_rs1_rs2_b10: + andn x20, x10, x10 # perform operation +80002fd0: 40a57a33 andn x20,x10,x10 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_andn_cg_cmp_rs1_rs2_b10, Zbkb_andn_cg_cmp_rs1_rs2_b10_str) +80002fd4: 000ba203 lw x4,0(x23) +80002fd8: 01420863 beq x4,x20,80002fe8 +80002fdc: 524022ef jal x5,80005500 +80002fe0: 80002fd0 .word 0x80002fd0 +80002fe4: 8000de5c .word 0x8000de5c +80002fe8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0x2e4cef60 +80002fec: 000ea583 lw x11,0(x29) +80002ff0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x0373952d +80002ff4: 000ea583 lw x11,0(x29) +80002ff8: 004e8e93 addi x29,x29,4 + +80002ffc : +Zbkb_andn_cg_cmp_rs1_rs2_b11: + andn x16, x11, x11 # perform operation +80002ffc: 40b5f833 andn x16,x11,x11 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_andn_cg_cmp_rs1_rs2_b11, Zbkb_andn_cg_cmp_rs1_rs2_b11_str) +80003000: 000ba203 lw x4,0(x23) +80003004: 01020863 beq x4,x16,80003014 +80003008: 4f8022ef jal x5,80005500 +8000300c: 80002ffc .word 0x80002ffc +80003010: 8000de95 .word 0x8000de95 +80003014: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xfe59b847 +80003018: 000ea603 lw x12,0(x29) +8000301c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0xd7ea8e6f +80003020: 000ea603 lw x12,0(x29) +80003024: 004e8e93 addi x29,x29,4 + +80003028 : +Zbkb_andn_cg_cmp_rs1_rs2_b12: + andn x27, x12, x12 # perform operation +80003028: 40c67db3 andn x27,x12,x12 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_andn_cg_cmp_rs1_rs2_b12, Zbkb_andn_cg_cmp_rs1_rs2_b12_str) +8000302c: 000ba203 lw x4,0(x23) +80003030: 01b20863 beq x4,x27,80003040 +80003034: 4cc022ef jal x5,80005500 +80003038: 80003028 .word 0x80003028 +8000303c: 8000dece .word 0x8000dece +80003040: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x75cb607d +80003044: 000ea683 lw x13,0(x29) +80003048: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0x1d210f9d +8000304c: 000ea683 lw x13,0(x29) +80003050: 004e8e93 addi x29,x29,4 + +80003054 : +Zbkb_andn_cg_cmp_rs1_rs2_b13: + andn x18, x13, x13 # perform operation +80003054: 40d6f933 andn x18,x13,x13 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_andn_cg_cmp_rs1_rs2_b13, Zbkb_andn_cg_cmp_rs1_rs2_b13_str) +80003058: 000ba203 lw x4,0(x23) +8000305c: 01220863 beq x4,x18,8000306c +80003060: 4a0022ef jal x5,80005500 +80003064: 80003054 .word 0x80003054 +80003068: 8000df07 .word 0x8000df07 +8000306c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0xfa74ccf1 +80003070: 000ea703 lw x14,0(x29) +80003074: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x9df9c8b4 +80003078: 000ea703 lw x14,0(x29) +8000307c: 004e8e93 addi x29,x29,4 + +80003080 : +Zbkb_andn_cg_cmp_rs1_rs2_b14: + andn x8, x14, x14 # perform operation +80003080: 40e77433 andn x8,x14,x14 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_andn_cg_cmp_rs1_rs2_b14, Zbkb_andn_cg_cmp_rs1_rs2_b14_str) +80003084: 000ba203 lw x4,0(x23) +80003088: 00820863 beq x4,x8,80003098 +8000308c: 474022ef jal x5,80005500 +80003090: 80003080 .word 0x80003080 +80003094: 8000df40 .word 0x8000df40 +80003098: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x72406d50 +8000309c: 000ea783 lw x15,0(x29) +800030a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xecac760b +800030a4: 000ea783 lw x15,0(x29) +800030a8: 004e8e93 addi x29,x29,4 + +800030ac : +Zbkb_andn_cg_cmp_rs1_rs2_b15: + andn x9, x15, x15 # perform operation +800030ac: 40f7f4b3 andn x9,x15,x15 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_andn_cg_cmp_rs1_rs2_b15, Zbkb_andn_cg_cmp_rs1_rs2_b15_str) +800030b0: 000ba203 lw x4,0(x23) +800030b4: 00920863 beq x4,x9,800030c4 +800030b8: 448022ef jal x5,80005500 +800030bc: 800030ac .word 0x800030ac +800030c0: 8000df79 .word 0x8000df79 +800030c4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x11e7c958 +800030c8: 000ea803 lw x16,0(x29) +800030cc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x4900db5f +800030d0: 000ea803 lw x16,0(x29) +800030d4: 004e8e93 addi x29,x29,4 + +800030d8 : +Zbkb_andn_cg_cmp_rs1_rs2_b16: + andn x0, x16, x16 # perform operation +800030d8: 41087033 andn x0,x16,x16 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zbkb_andn_cg_cmp_rs1_rs2_b16, Zbkb_andn_cg_cmp_rs1_rs2_b16_str) +800030dc: 000ba203 lw x4,0(x23) +800030e0: 00020863 beq x4,x0,800030f0 +800030e4: 41c022ef jal x5,80005500 +800030e8: 800030d8 .word 0x800030d8 +800030ec: 8000dfb2 .word 0x8000dfb2 +800030f0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xfb15e1dc +800030f4: 000ea883 lw x17,0(x29) +800030f8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x234968aa +800030fc: 000ea883 lw x17,0(x29) +80003100: 004e8e93 addi x29,x29,4 + +80003104 : +Zbkb_andn_cg_cmp_rs1_rs2_b17: + andn x13, x17, x17 # perform operation +80003104: 4118f6b3 andn x13,x17,x17 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_andn_cg_cmp_rs1_rs2_b17, Zbkb_andn_cg_cmp_rs1_rs2_b17_str) +80003108: 000ba203 lw x4,0(x23) +8000310c: 00d20863 beq x4,x13,8000311c +80003110: 3f0022ef jal x5,80005500 +80003114: 80003104 .word 0x80003104 +80003118: 8000dfeb .word 0x8000dfeb +8000311c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x81aa561b +80003120: 000ea903 lw x18,0(x29) +80003124: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xf5600d73 +80003128: 000ea903 lw x18,0(x29) +8000312c: 004e8e93 addi x29,x29,4 + +80003130 : +Zbkb_andn_cg_cmp_rs1_rs2_b18: + andn x20, x18, x18 # perform operation +80003130: 41297a33 andn x20,x18,x18 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_andn_cg_cmp_rs1_rs2_b18, Zbkb_andn_cg_cmp_rs1_rs2_b18_str) +80003134: 000ba203 lw x4,0(x23) +80003138: 01420863 beq x4,x20,80003148 +8000313c: 3c4022ef jal x5,80005500 +80003140: 80003130 .word 0x80003130 +80003144: 8000e024 .word 0x8000e024 +80003148: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xc0fc4cd5 +8000314c: 000ea983 lw x19,0(x29) +80003150: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x899d77bb +80003154: 000ea983 lw x19,0(x29) +80003158: 004e8e93 addi x29,x29,4 + +8000315c : +Zbkb_andn_cg_cmp_rs1_rs2_b19: + andn x1, x19, x19 # perform operation +8000315c: 4139f0b3 andn x1,x19,x19 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkb_andn_cg_cmp_rs1_rs2_b19, Zbkb_andn_cg_cmp_rs1_rs2_b19_str) +80003160: 000ba203 lw x4,0(x23) +80003164: 00120863 beq x4,x1,80003174 +80003168: 398022ef jal x5,80005500 +8000316c: 8000315c .word 0x8000315c +80003170: 8000e05d .word 0x8000e05d +80003174: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xfe3fa3d5 +80003178: 000eaa03 lw x20,0(x29) +8000317c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs2: x20 = 0x883f16ef +80003180: 000eaa03 lw x20,0(x29) +80003184: 004e8e93 addi x29,x29,4 + +80003188 : +Zbkb_andn_cg_cmp_rs1_rs2_b20: + andn x16, x20, x20 # perform operation +80003188: 414a7833 andn x16,x20,x20 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_andn_cg_cmp_rs1_rs2_b20, Zbkb_andn_cg_cmp_rs1_rs2_b20_str) +8000318c: 000ba203 lw x4,0(x23) +80003190: 01020863 beq x4,x16,800031a0 +80003194: 36c022ef jal x5,80005500 +80003198: 80003188 .word 0x80003188 +8000319c: 8000e096 .word 0x8000e096 +800031a0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x4c0e13ad +800031a4: 000eaa83 lw x21,0(x29) +800031a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0xa542107c +800031ac: 000eaa83 lw x21,0(x29) +800031b0: 004e8e93 addi x29,x29,4 + +800031b4 : +Zbkb_andn_cg_cmp_rs1_rs2_b21: + andn x26, x21, x21 # perform operation +800031b4: 415afd33 andn x26,x21,x21 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_andn_cg_cmp_rs1_rs2_b21, Zbkb_andn_cg_cmp_rs1_rs2_b21_str) +800031b8: 000ba203 lw x4,0(x23) +800031bc: 01a20863 beq x4,x26,800031cc +800031c0: 340022ef jal x5,80005500 +800031c4: 800031b4 .word 0x800031b4 +800031c8: 8000e0cf .word 0x8000e0cf +800031cc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0xad31ab38 +800031d0: 000eab03 lw x22,0(x29) +800031d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xacd7b1aa +800031d8: 000eab03 lw x22,0(x29) +800031dc: 004e8e93 addi x29,x29,4 + +800031e0 : +Zbkb_andn_cg_cmp_rs1_rs2_b22: + andn x3, x22, x22 # perform operation +800031e0: 416b71b3 andn x3,x22,x22 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_andn_cg_cmp_rs1_rs2_b22, Zbkb_andn_cg_cmp_rs1_rs2_b22_str) +800031e4: 000ba203 lw x4,0(x23) +800031e8: 00320863 beq x4,x3,800031f8 +800031ec: 314022ef jal x5,80005500 +800031f0: 800031e0 .word 0x800031e0 +800031f4: 8000e108 .word 0x8000e108 +800031f8: 004b8b93 addi x23,x23,4 + + mv x15, x23 # switch signature pointer register to avoid conflict with test +800031fc: 000b8793 addi x15,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x9dcc5512 +80003200: 000eab83 lw x23,0(x29) +80003204: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x7ef91564 +80003208: 000eab83 lw x23,0(x29) +8000320c: 004e8e93 addi x29,x29,4 + +80003210 : +Zbkb_andn_cg_cmp_rs1_rs2_b23: + andn x17, x23, x23 # perform operation +80003210: 417bf8b3 andn x17,x23,x23 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_andn_cg_cmp_rs1_rs2_b23, Zbkb_andn_cg_cmp_rs1_rs2_b23_str) +80003214: 0007a203 lw x4,0(x15) +80003218: 01120863 beq x4,x17,80003228 +8000321c: 2e4022ef jal x5,80005500 +80003220: 80003210 .word 0x80003210 +80003224: 8000e141 .word 0x8000e141 +80003228: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xb7b16cc3 +8000322c: 000eac03 lw x24,0(x29) +80003230: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x5896b1f7 +80003234: 000eac03 lw x24,0(x29) +80003238: 004e8e93 addi x29,x29,4 + +8000323c : +Zbkb_andn_cg_cmp_rs1_rs2_b24: + andn x27, x24, x24 # perform operation +8000323c: 418c7db3 andn x27,x24,x24 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_andn_cg_cmp_rs1_rs2_b24, Zbkb_andn_cg_cmp_rs1_rs2_b24_str) +80003240: 0007a203 lw x4,0(x15) +80003244: 01b20863 beq x4,x27,80003254 +80003248: 2b8022ef jal x5,80005500 +8000324c: 8000323c .word 0x8000323c +80003250: 8000e17a .word 0x8000e17a +80003254: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x4c630a34 +80003258: 000eac83 lw x25,0(x29) +8000325c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0xecfef371 +80003260: 000eac83 lw x25,0(x29) +80003264: 004e8e93 addi x29,x29,4 + +80003268 : +Zbkb_andn_cg_cmp_rs1_rs2_b25: + andn x14, x25, x25 # perform operation +80003268: 419cf733 andn x14,x25,x25 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_andn_cg_cmp_rs1_rs2_b25, Zbkb_andn_cg_cmp_rs1_rs2_b25_str) +8000326c: 0007a203 lw x4,0(x15) +80003270: 00e20863 beq x4,x14,80003280 +80003274: 28c022ef jal x5,80005500 +80003278: 80003268 .word 0x80003268 +8000327c: 8000e1b3 .word 0x8000e1b3 +80003280: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x34f1f7a9 +80003284: 000ead03 lw x26,0(x29) +80003288: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xc480f5b9 +8000328c: 000ead03 lw x26,0(x29) +80003290: 004e8e93 addi x29,x29,4 + +80003294 : +Zbkb_andn_cg_cmp_rs1_rs2_b26: + andn x9, x26, x26 # perform operation +80003294: 41ad74b3 andn x9,x26,x26 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zbkb_andn_cg_cmp_rs1_rs2_b26, Zbkb_andn_cg_cmp_rs1_rs2_b26_str) +80003298: 0007a203 lw x4,0(x15) +8000329c: 00920863 beq x4,x9,800032ac +800032a0: 260022ef jal x5,80005500 +800032a4: 80003294 .word 0x80003294 +800032a8: 8000e1ec .word 0x8000e1ec +800032ac: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x9b78e451 +800032b0: 000ead83 lw x27,0(x29) +800032b4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x70f97556 +800032b8: 000ead83 lw x27,0(x29) +800032bc: 004e8e93 addi x29,x29,4 + +800032c0 : +Zbkb_andn_cg_cmp_rs1_rs2_b27: + andn x0, x27, x27 # perform operation +800032c0: 41bdf033 andn x0,x27,x27 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_andn_cg_cmp_rs1_rs2_b27, Zbkb_andn_cg_cmp_rs1_rs2_b27_str) +800032c4: 0007a203 lw x4,0(x15) +800032c8: 00020863 beq x4,x0,800032d8 +800032cc: 234022ef jal x5,80005500 +800032d0: 800032c0 .word 0x800032c0 +800032d4: 8000e225 .word 0x8000e225 +800032d8: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xdcd35023 +800032dc: 000eae03 lw x28,0(x29) +800032e0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0xccfc2ced +800032e4: 000eae03 lw x28,0(x29) +800032e8: 004e8e93 addi x29,x29,4 + +800032ec : +Zbkb_andn_cg_cmp_rs1_rs2_b28: + andn x20, x28, x28 # perform operation +800032ec: 41ce7a33 andn x20,x28,x28 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zbkb_andn_cg_cmp_rs1_rs2_b28, Zbkb_andn_cg_cmp_rs1_rs2_b28_str) +800032f0: 0007a203 lw x4,0(x15) +800032f4: 01420863 beq x4,x20,80003304 +800032f8: 208022ef jal x5,80005500 +800032fc: 800032ec .word 0x800032ec +80003300: 8000e25e .word 0x8000e25e +80003304: 00478793 addi x15,x15,4 + + mv x30, x29 # switch data pointer register to avoid conflict with test +80003308: 000e8f13 addi x30,x29,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xb2814ae4 +8000330c: 000f2e83 lw x29,0(x30) +80003310: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x2667fe46 +80003314: 000f2e83 lw x29,0(x30) +80003318: 004f0f13 addi x30,x30,4 + +8000331c : +Zbkb_andn_cg_cmp_rs1_rs2_b29: + andn x31, x29, x29 # perform operation +8000331c: 41deffb3 andn x31,x29,x29 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_andn_cg_cmp_rs1_rs2_b29, Zbkb_andn_cg_cmp_rs1_rs2_b29_str) +80003320: 0007a203 lw x4,0(x15) +80003324: 01f20863 beq x4,x31,80003334 +80003328: 1d8022ef jal x5,80005500 +8000332c: 8000331c .word 0x8000331c +80003330: 8000e297 .word 0x8000e297 +80003334: 00478793 addi x15,x15,4 + + mv x9, x30 # switch data pointer register to avoid conflict with test +80003338: 000f0493 addi x9,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x9575f280 +8000333c: 0004af03 lw x30,0(x9) +80003340: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x62af22a6 +80003344: 0004af03 lw x30,0(x9) +80003348: 00448493 addi x9,x9,4 + +8000334c : +Zbkb_andn_cg_cmp_rs1_rs2_b30: + andn x12, x30, x30 # perform operation +8000334c: 41ef7633 andn x12,x30,x30 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zbkb_andn_cg_cmp_rs1_rs2_b30, Zbkb_andn_cg_cmp_rs1_rs2_b30_str) +80003350: 0007a203 lw x4,0(x15) +80003354: 00c20863 beq x4,x12,80003364 +80003358: 1a8022ef jal x5,80005500 +8000335c: 8000334c .word 0x8000334c +80003360: 8000e2d0 .word 0x8000e2d0 +80003364: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x23e8383a +80003368: 0004af83 lw x31,0(x9) +8000336c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x4c7220a1 +80003370: 0004af83 lw x31,0(x9) +80003374: 00448493 addi x9,x9,4 + +80003378 : +Zbkb_andn_cg_cmp_rs1_rs2_b31: + andn x28, x31, x31 # perform operation +80003378: 41fffe33 andn x28,x31,x31 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zbkb_andn_cg_cmp_rs1_rs2_b31, Zbkb_andn_cg_cmp_rs1_rs2_b31_str) +8000337c: 0007a203 lw x4,0(x15) +80003380: 01c20863 beq x4,x28,80003390 +80003384: 17c022ef jal x5,80005500 +80003388: 80003378 .word 0x80003378 +8000338c: 8000e309 .word 0x8000e309 +80003390: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x9e181571 +80003394: 0004a003 lw x0,0(x9) +80003398: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x2f7b190e +8000339c: 0004a503 lw x10,0(x9) +800033a0: 00448493 addi x9,x9,4 + +800033a4 : +Zbkb_andn_cg_cmp_rd_rs1_b0: + andn x0, x0, x10 # perform operation +800033a4: 40a07033 andn x0,x0,x10 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_andn_cg_cmp_rd_rs1_b0, Zbkb_andn_cg_cmp_rd_rs1_b0_str) +800033a8: 0007a203 lw x4,0(x15) +800033ac: 00020863 beq x4,x0,800033bc +800033b0: 150022ef jal x5,80005500 +800033b4: 800033a4 .word 0x800033a4 +800033b8: 8000e342 .word 0x8000e342 +800033bc: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x2b4bece9 +800033c0: 0004a083 lw x1,0(x9) +800033c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0xb044bd31 +800033c8: 0004ab83 lw x23,0(x9) +800033cc: 00448493 addi x9,x9,4 + +800033d0 : +Zbkb_andn_cg_cmp_rd_rs1_b1: + andn x1, x1, x23 # perform operation +800033d0: 4170f0b3 andn x1,x1,x23 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_andn_cg_cmp_rd_rs1_b1, Zbkb_andn_cg_cmp_rd_rs1_b1_str) +800033d4: 0007a203 lw x4,0(x15) +800033d8: 00120863 beq x4,x1,800033e8 +800033dc: 124022ef jal x5,80005500 +800033e0: 800033d0 .word 0x800033d0 +800033e4: 8000e379 .word 0x8000e379 +800033e8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x7373978c +800033ec: 0004a103 lw x2,0(x9) +800033f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x4e712952 +800033f4: 0004a683 lw x13,0(x9) +800033f8: 00448493 addi x9,x9,4 + +800033fc : +Zbkb_andn_cg_cmp_rd_rs1_b2: + andn x2, x2, x13 # perform operation +800033fc: 40d17133 andn x2,x2,x13 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_andn_cg_cmp_rd_rs1_b2, Zbkb_andn_cg_cmp_rd_rs1_b2_str) +80003400: 0007a203 lw x4,0(x15) +80003404: 00220863 beq x4,x2,80003414 +80003408: 0f8022ef jal x5,80005500 +8000340c: 800033fc .word 0x800033fc +80003410: 8000e3b0 .word 0x8000e3b0 +80003414: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x198b5f53 +80003418: 0004a183 lw x3,0(x9) +8000341c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xeafd44c9 +80003420: 0004af83 lw x31,0(x9) +80003424: 00448493 addi x9,x9,4 + +80003428 : +Zbkb_andn_cg_cmp_rd_rs1_b3: + andn x3, x3, x31 # perform operation +80003428: 41f1f1b3 andn x3,x3,x31 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_andn_cg_cmp_rd_rs1_b3, Zbkb_andn_cg_cmp_rd_rs1_b3_str) +8000342c: 0007a203 lw x4,0(x15) +80003430: 00320863 beq x4,x3,80003440 +80003434: 0cc022ef jal x5,80005500 +80003438: 80003428 .word 0x80003428 +8000343c: 8000e3e7 .word 0x8000e3e7 +80003440: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003444: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003448: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x56fe05d4 +8000344c: 0004a203 lw x4,0(x9) +80003450: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x74ecaa56 +80003454: 0004ac03 lw x24,0(x9) +80003458: 00448493 addi x9,x9,4 + +8000345c : +Zbkb_andn_cg_cmp_rd_rs1_b4: + andn x4, x4, x24 # perform operation +8000345c: 41827233 andn x4,x4,x24 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zbkb_andn_cg_cmp_rd_rs1_b4, Zbkb_andn_cg_cmp_rd_rs1_b4_str) +80003460: 0007a683 lw x13,0(x15) +80003464: 00468863 beq x13,x4,80003474 +80003468: 0d80276f jal x14,80005540 +8000346c: 8000345c .word 0x8000345c +80003470: 8000e41e .word 0x8000e41e +80003474: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x2632c80f +80003478: 0004a283 lw x5,0(x9) +8000347c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x2c4d8588 +80003480: 0004ae83 lw x29,0(x9) +80003484: 00448493 addi x9,x9,4 + +80003488 : +Zbkb_andn_cg_cmp_rd_rs1_b5: + andn x5, x5, x29 # perform operation +80003488: 41d2f2b3 andn x5,x5,x29 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zbkb_andn_cg_cmp_rd_rs1_b5, Zbkb_andn_cg_cmp_rd_rs1_b5_str) +8000348c: 0007a683 lw x13,0(x15) +80003490: 00568863 beq x13,x5,800034a0 +80003494: 0ac0276f jal x14,80005540 +80003498: 80003488 .word 0x80003488 +8000349c: 8000e455 .word 0x8000e455 +800034a0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xdfd239c6 +800034a4: 0004a303 lw x6,0(x9) +800034a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x34d60859 +800034ac: 0004a283 lw x5,0(x9) +800034b0: 00448493 addi x9,x9,4 + +800034b4 : +Zbkb_andn_cg_cmp_rd_rs1_b6: + andn x6, x6, x5 # perform operation +800034b4: 40537333 andn x6,x6,x5 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zbkb_andn_cg_cmp_rd_rs1_b6, Zbkb_andn_cg_cmp_rd_rs1_b6_str) +800034b8: 0007a683 lw x13,0(x15) +800034bc: 00668863 beq x13,x6,800034cc +800034c0: 0800276f jal x14,80005540 +800034c4: 800034b4 .word 0x800034b4 +800034c8: 8000e48c .word 0x8000e48c +800034cc: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x9c93dd44 +800034d0: 0004a383 lw x7,0(x9) +800034d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x04c454a2 +800034d8: 0004ad83 lw x27,0(x9) +800034dc: 00448493 addi x9,x9,4 + +800034e0 : +Zbkb_andn_cg_cmp_rd_rs1_b7: + andn x7, x7, x27 # perform operation +800034e0: 41b3f3b3 andn x7,x7,x27 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_andn_cg_cmp_rd_rs1_b7, Zbkb_andn_cg_cmp_rd_rs1_b7_str) +800034e4: 0007a683 lw x13,0(x15) +800034e8: 00768863 beq x13,x7,800034f8 +800034ec: 0540276f jal x14,80005540 +800034f0: 800034e0 .word 0x800034e0 +800034f4: 8000e4c3 .word 0x8000e4c3 +800034f8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x708c4407 +800034fc: 0004a403 lw x8,0(x9) +80003500: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x6643136a +80003504: 0004ae83 lw x29,0(x9) +80003508: 00448493 addi x9,x9,4 + +8000350c : +Zbkb_andn_cg_cmp_rd_rs1_b8: + andn x8, x8, x29 # perform operation +8000350c: 41d47433 andn x8,x8,x29 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_andn_cg_cmp_rd_rs1_b8, Zbkb_andn_cg_cmp_rd_rs1_b8_str) +80003510: 0007a683 lw x13,0(x15) +80003514: 00868863 beq x13,x8,80003524 +80003518: 0280276f jal x14,80005540 +8000351c: 8000350c .word 0x8000350c +80003520: 8000e4fa .word 0x8000e4fa +80003524: 00478793 addi x15,x15,4 + + mv x28, x9 # switch data pointer register to avoid conflict with test +80003528: 00048e13 addi x28,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x2159f0a6 +8000352c: 000e2483 lw x9,0(x28) +80003530: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x718d228f +80003534: 000e2a03 lw x20,0(x28) +80003538: 004e0e13 addi x28,x28,4 + +8000353c : +Zbkb_andn_cg_cmp_rd_rs1_b9: + andn x9, x9, x20 # perform operation +8000353c: 4144f4b3 andn x9,x9,x20 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_andn_cg_cmp_rd_rs1_b9, Zbkb_andn_cg_cmp_rd_rs1_b9_str) +80003540: 0007a683 lw x13,0(x15) +80003544: 00968863 beq x13,x9,80003554 +80003548: 7f90176f jal x14,80005540 +8000354c: 8000353c .word 0x8000353c +80003550: 8000e531 .word 0x8000e531 +80003554: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0x88b2314e +80003558: 000e2503 lw x10,0(x28) +8000355c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x82572817 +80003560: 000e2d83 lw x27,0(x28) +80003564: 004e0e13 addi x28,x28,4 + +80003568 : +Zbkb_andn_cg_cmp_rd_rs1_b10: + andn x10, x10, x27 # perform operation +80003568: 41b57533 andn x10,x10,x27 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_andn_cg_cmp_rd_rs1_b10, Zbkb_andn_cg_cmp_rd_rs1_b10_str) +8000356c: 0007a683 lw x13,0(x15) +80003570: 00a68863 beq x13,x10,80003580 +80003574: 7cd0176f jal x14,80005540 +80003578: 80003568 .word 0x80003568 +8000357c: 8000e568 .word 0x8000e568 +80003580: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xb7c63866 +80003584: 000e2583 lw x11,0(x28) +80003588: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x11ca4cee +8000358c: 000e2a83 lw x21,0(x28) +80003590: 004e0e13 addi x28,x28,4 + +80003594 : +Zbkb_andn_cg_cmp_rd_rs1_b11: + andn x11, x11, x21 # perform operation +80003594: 4155f5b3 andn x11,x11,x21 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_andn_cg_cmp_rd_rs1_b11, Zbkb_andn_cg_cmp_rd_rs1_b11_str) +80003598: 0007a683 lw x13,0(x15) +8000359c: 00b68863 beq x13,x11,800035ac +800035a0: 7a10176f jal x14,80005540 +800035a4: 80003594 .word 0x80003594 +800035a8: 8000e5a0 .word 0x8000e5a0 +800035ac: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x6f7397e6 +800035b0: 000e2603 lw x12,0(x28) +800035b4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0xd6218018 +800035b8: 000e2503 lw x10,0(x28) +800035bc: 004e0e13 addi x28,x28,4 + +800035c0 : +Zbkb_andn_cg_cmp_rd_rs1_b12: + andn x12, x12, x10 # perform operation +800035c0: 40a67633 andn x12,x12,x10 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_andn_cg_cmp_rd_rs1_b12, Zbkb_andn_cg_cmp_rd_rs1_b12_str) +800035c4: 0007a683 lw x13,0(x15) +800035c8: 00c68863 beq x13,x12,800035d8 +800035cc: 7750176f jal x14,80005540 +800035d0: 800035c0 .word 0x800035c0 +800035d4: 8000e5d8 .word 0x8000e5d8 +800035d8: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035dc: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035e0: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0x9bdedb8d +800035e4: 000e2683 lw x13,0(x28) +800035e8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x2833b866 +800035ec: 000e2703 lw x14,0(x28) +800035f0: 004e0e13 addi x28,x28,4 + +800035f4 : +Zbkb_andn_cg_cmp_rd_rs1_b13: + andn x13, x13, x14 # perform operation +800035f4: 40e6f6b3 andn x13,x13,x14 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_andn_cg_cmp_rd_rs1_b13, Zbkb_andn_cg_cmp_rd_rs1_b13_str) +800035f8: 0007a383 lw x7,0(x15) +800035fc: 00d38863 beq x7,x13,8000360c +80003600: 7190146f jal x8,80005518 +80003604: 800035f4 .word 0x800035f4 +80003608: 8000e610 .word 0x8000e610 +8000360c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x69a346ac +80003610: 000e2703 lw x14,0(x28) +80003614: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x85f1f324 +80003618: 000e2903 lw x18,0(x28) +8000361c: 004e0e13 addi x28,x28,4 + +80003620 : +Zbkb_andn_cg_cmp_rd_rs1_b14: + andn x14, x14, x18 # perform operation +80003620: 41277733 andn x14,x14,x18 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_andn_cg_cmp_rd_rs1_b14, Zbkb_andn_cg_cmp_rd_rs1_b14_str) +80003624: 0007a383 lw x7,0(x15) +80003628: 00e38863 beq x7,x14,80003638 +8000362c: 6ed0146f jal x8,80005518 +80003630: 80003620 .word 0x80003620 +80003634: 8000e648 .word 0x8000e648 +80003638: 00478793 addi x15,x15,4 + + mv x21, x15 # switch signature pointer register to avoid conflict with test +8000363c: 00078a93 addi x21,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0x756c5263 +80003640: 000e2783 lw x15,0(x28) +80003644: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x498a5902 +80003648: 000e2d03 lw x26,0(x28) +8000364c: 004e0e13 addi x28,x28,4 + +80003650 : +Zbkb_andn_cg_cmp_rd_rs1_b15: + andn x15, x15, x26 # perform operation +80003650: 41a7f7b3 andn x15,x15,x26 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zbkb_andn_cg_cmp_rd_rs1_b15, Zbkb_andn_cg_cmp_rd_rs1_b15_str) +80003654: 000aa383 lw x7,0(x21) +80003658: 00f38863 beq x7,x15,80003668 +8000365c: 6bd0146f jal x8,80005518 +80003660: 80003650 .word 0x80003650 +80003664: 8000e680 .word 0x8000e680 +80003668: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0x8202a2b1 +8000366c: 000e2803 lw x16,0(x28) +80003670: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x5e6c35fe +80003674: 000e2c83 lw x25,0(x28) +80003678: 004e0e13 addi x28,x28,4 + +8000367c : +Zbkb_andn_cg_cmp_rd_rs1_b16: + andn x16, x16, x25 # perform operation +8000367c: 41987833 andn x16,x16,x25 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zbkb_andn_cg_cmp_rd_rs1_b16, Zbkb_andn_cg_cmp_rd_rs1_b16_str) +80003680: 000aa383 lw x7,0(x21) +80003684: 01038863 beq x7,x16,80003694 +80003688: 6910146f jal x8,80005518 +8000368c: 8000367c .word 0x8000367c +80003690: 8000e6b8 .word 0x8000e6b8 +80003694: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x3e772583 +80003698: 000e2883 lw x17,0(x28) +8000369c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x4e0a8b5e +800036a0: 000e2a03 lw x20,0(x28) +800036a4: 004e0e13 addi x28,x28,4 + +800036a8 : +Zbkb_andn_cg_cmp_rd_rs1_b17: + andn x17, x17, x20 # perform operation +800036a8: 4148f8b3 andn x17,x17,x20 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zbkb_andn_cg_cmp_rd_rs1_b17, Zbkb_andn_cg_cmp_rd_rs1_b17_str) +800036ac: 000aa383 lw x7,0(x21) +800036b0: 01138863 beq x7,x17,800036c0 +800036b4: 6650146f jal x8,80005518 +800036b8: 800036a8 .word 0x800036a8 +800036bc: 8000e6f0 .word 0x8000e6f0 +800036c0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x06866787 +800036c4: 000e2903 lw x18,0(x28) +800036c8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x992fe980 +800036cc: 000e2603 lw x12,0(x28) +800036d0: 004e0e13 addi x28,x28,4 + +800036d4 : +Zbkb_andn_cg_cmp_rd_rs1_b18: + andn x18, x18, x12 # perform operation +800036d4: 40c97933 andn x18,x18,x12 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zbkb_andn_cg_cmp_rd_rs1_b18, Zbkb_andn_cg_cmp_rd_rs1_b18_str) +800036d8: 000aa383 lw x7,0(x21) +800036dc: 01238863 beq x7,x18,800036ec +800036e0: 6390146f jal x8,80005518 +800036e4: 800036d4 .word 0x800036d4 +800036e8: 8000e728 .word 0x8000e728 +800036ec: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x4c6e94b7 +800036f0: 000e2983 lw x19,0(x28) +800036f4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x1f3e6115 +800036f8: 000e2703 lw x14,0(x28) +800036fc: 004e0e13 addi x28,x28,4 + +80003700 : +Zbkb_andn_cg_cmp_rd_rs1_b19: + andn x19, x19, x14 # perform operation +80003700: 40e9f9b3 andn x19,x19,x14 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkb_andn_cg_cmp_rd_rs1_b19, Zbkb_andn_cg_cmp_rd_rs1_b19_str) +80003704: 000aa383 lw x7,0(x21) +80003708: 01338863 beq x7,x19,80003718 +8000370c: 60d0146f jal x8,80005518 +80003710: 80003700 .word 0x80003700 +80003714: 8000e760 .word 0x8000e760 +80003718: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x924a335f +8000371c: 000e2a03 lw x20,0(x28) +80003720: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x07e7d366 +80003724: 000e2d03 lw x26,0(x28) +80003728: 004e0e13 addi x28,x28,4 + +8000372c : +Zbkb_andn_cg_cmp_rd_rs1_b20: + andn x20, x20, x26 # perform operation +8000372c: 41aa7a33 andn x20,x20,x26 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zbkb_andn_cg_cmp_rd_rs1_b20, Zbkb_andn_cg_cmp_rd_rs1_b20_str) +80003730: 000aa383 lw x7,0(x21) +80003734: 01438863 beq x7,x20,80003744 +80003738: 5e10146f jal x8,80005518 +8000373c: 8000372c .word 0x8000372c +80003740: 8000e798 .word 0x8000e798 +80003744: 004a8a93 addi x21,x21,4 + + mv x19, x21 # switch signature pointer register to avoid conflict with test +80003748: 000a8993 addi x19,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x23966bae +8000374c: 000e2a83 lw x21,0(x28) +80003750: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0x9332cf0c +80003754: 000e2583 lw x11,0(x28) +80003758: 004e0e13 addi x28,x28,4 + +8000375c : +Zbkb_andn_cg_cmp_rd_rs1_b21: + andn x21, x21, x11 # perform operation +8000375c: 40bafab3 andn x21,x21,x11 + # Check if x21 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x21, Zbkb_andn_cg_cmp_rd_rs1_b21, Zbkb_andn_cg_cmp_rd_rs1_b21_str) +80003760: 0009a383 lw x7,0(x19) +80003764: 01538863 beq x7,x21,80003774 +80003768: 5b10146f jal x8,80005518 +8000376c: 8000375c .word 0x8000375c +80003770: 8000e7d0 .word 0x8000e7d0 +80003774: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x463f654f +80003778: 000e2b03 lw x22,0(x28) +8000377c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0xc4594c10 +80003780: 000e2583 lw x11,0(x28) +80003784: 004e0e13 addi x28,x28,4 + +80003788 : +Zbkb_andn_cg_cmp_rd_rs1_b22: + andn x22, x22, x11 # perform operation +80003788: 40bb7b33 andn x22,x22,x11 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkb_andn_cg_cmp_rd_rs1_b22, Zbkb_andn_cg_cmp_rd_rs1_b22_str) +8000378c: 0009a383 lw x7,0(x19) +80003790: 01638863 beq x7,x22,800037a0 +80003794: 5850146f jal x8,80005518 +80003798: 80003788 .word 0x80003788 +8000379c: 8000e808 .word 0x8000e808 +800037a0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x23000c76 +800037a4: 000e2b83 lw x23,0(x28) +800037a8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x20539077 +800037ac: 000e2d83 lw x27,0(x28) +800037b0: 004e0e13 addi x28,x28,4 + +800037b4 : +Zbkb_andn_cg_cmp_rd_rs1_b23: + andn x23, x23, x27 # perform operation +800037b4: 41bbfbb3 andn x23,x23,x27 + # Check if x23 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x23, Zbkb_andn_cg_cmp_rd_rs1_b23, Zbkb_andn_cg_cmp_rd_rs1_b23_str) +800037b8: 0009a383 lw x7,0(x19) +800037bc: 01738863 beq x7,x23,800037cc +800037c0: 5590146f jal x8,80005518 +800037c4: 800037b4 .word 0x800037b4 +800037c8: 8000e840 .word 0x8000e840 +800037cc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x5ce9afde +800037d0: 000e2c03 lw x24,0(x28) +800037d4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0xf536ccd6 +800037d8: 000e2f83 lw x31,0(x28) +800037dc: 004e0e13 addi x28,x28,4 + +800037e0 : +Zbkb_andn_cg_cmp_rd_rs1_b24: + andn x24, x24, x31 # perform operation +800037e0: 41fc7c33 andn x24,x24,x31 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkb_andn_cg_cmp_rd_rs1_b24, Zbkb_andn_cg_cmp_rd_rs1_b24_str) +800037e4: 0009a383 lw x7,0(x19) +800037e8: 01838863 beq x7,x24,800037f8 +800037ec: 52d0146f jal x8,80005518 +800037f0: 800037e0 .word 0x800037e0 +800037f4: 8000e878 .word 0x8000e878 +800037f8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xaae09ac0 +800037fc: 000e2c83 lw x25,0(x28) +80003800: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs2: x6 = 0xdbe68ab6 +80003804: 000e2303 lw x6,0(x28) +80003808: 004e0e13 addi x28,x28,4 + +8000380c : +Zbkb_andn_cg_cmp_rd_rs1_b25: + andn x25, x25, x6 # perform operation +8000380c: 406cfcb3 andn x25,x25,x6 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkb_andn_cg_cmp_rd_rs1_b25, Zbkb_andn_cg_cmp_rd_rs1_b25_str) +80003810: 0009a383 lw x7,0(x19) +80003814: 01938863 beq x7,x25,80003824 +80003818: 5010146f jal x8,80005518 +8000381c: 8000380c .word 0x8000380c +80003820: 8000e8b0 .word 0x8000e8b0 +80003824: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x621b5b2f +80003828: 000e2d03 lw x26,0(x28) +8000382c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs2: x1 = 0xdee1d529 +80003830: 000e2083 lw x1,0(x28) +80003834: 004e0e13 addi x28,x28,4 + +80003838 : +Zbkb_andn_cg_cmp_rd_rs1_b26: + andn x26, x26, x1 # perform operation +80003838: 401d7d33 andn x26,x26,x1 + # Check if x26 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x26, Zbkb_andn_cg_cmp_rd_rs1_b26, Zbkb_andn_cg_cmp_rd_rs1_b26_str) +8000383c: 0009a383 lw x7,0(x19) +80003840: 01a38863 beq x7,x26,80003850 +80003844: 4d50146f jal x8,80005518 +80003848: 80003838 .word 0x80003838 +8000384c: 8000e8e8 .word 0x8000e8e8 +80003850: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0xab28e0ce +80003854: 000e2d83 lw x27,0(x28) +80003858: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x61e903b8 +8000385c: 000e2c03 lw x24,0(x28) +80003860: 004e0e13 addi x28,x28,4 + +80003864 : +Zbkb_andn_cg_cmp_rd_rs1_b27: + andn x27, x27, x24 # perform operation +80003864: 418dfdb3 andn x27,x27,x24 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkb_andn_cg_cmp_rd_rs1_b27, Zbkb_andn_cg_cmp_rd_rs1_b27_str) +80003868: 0009a383 lw x7,0(x19) +8000386c: 01b38863 beq x7,x27,8000387c +80003870: 4a90146f jal x8,80005518 +80003874: 80003864 .word 0x80003864 +80003878: 8000e920 .word 0x8000e920 +8000387c: 00498993 addi x19,x19,4 + + mv x3, x28 # switch data pointer register to avoid conflict with test +80003880: 000e0193 addi x3,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x089f396c +80003884: 0001ae03 lw x28,0(x3) +80003888: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xd0e134ce +8000388c: 0001ac83 lw x25,0(x3) +80003890: 00418193 addi x3,x3,4 + +80003894 : +Zbkb_andn_cg_cmp_rd_rs1_b28: + andn x28, x28, x25 # perform operation +80003894: 419e7e33 andn x28,x28,x25 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkb_andn_cg_cmp_rd_rs1_b28, Zbkb_andn_cg_cmp_rd_rs1_b28_str) +80003898: 0009a383 lw x7,0(x19) +8000389c: 01c38863 beq x7,x28,800038ac +800038a0: 4790146f jal x8,80005518 +800038a4: 80003894 .word 0x80003894 +800038a8: 8000e958 .word 0x8000e958 +800038ac: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x9f581c79 +800038b0: 0001ae83 lw x29,0(x3) +800038b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x071cba19 +800038b8: 0001ac83 lw x25,0(x3) +800038bc: 00418193 addi x3,x3,4 + +800038c0 : +Zbkb_andn_cg_cmp_rd_rs1_b29: + andn x29, x29, x25 # perform operation +800038c0: 419efeb3 andn x29,x29,x25 + # Check if x29 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x29, Zbkb_andn_cg_cmp_rd_rs1_b29, Zbkb_andn_cg_cmp_rd_rs1_b29_str) +800038c4: 0009a383 lw x7,0(x19) +800038c8: 01d38863 beq x7,x29,800038d8 +800038cc: 44d0146f jal x8,80005518 +800038d0: 800038c0 .word 0x800038c0 +800038d4: 8000e990 .word 0x8000e990 +800038d8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xb90cf9bc +800038dc: 0001af03 lw x30,0(x3) +800038e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x7111075b +800038e4: 0001ab03 lw x22,0(x3) +800038e8: 00418193 addi x3,x3,4 + +800038ec : +Zbkb_andn_cg_cmp_rd_rs1_b30: + andn x30, x30, x22 # perform operation +800038ec: 416f7f33 andn x30,x30,x22 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkb_andn_cg_cmp_rd_rs1_b30, Zbkb_andn_cg_cmp_rd_rs1_b30_str) +800038f0: 0009a383 lw x7,0(x19) +800038f4: 01e38863 beq x7,x30,80003904 +800038f8: 4210146f jal x8,80005518 +800038fc: 800038ec .word 0x800038ec +80003900: 8000e9c8 .word 0x8000e9c8 +80003904: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x6494920f +80003908: 0001af83 lw x31,0(x3) +8000390c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x772547e2 +80003910: 0001a603 lw x12,0(x3) +80003914: 00418193 addi x3,x3,4 + +80003918 : +Zbkb_andn_cg_cmp_rd_rs1_b31: + andn x31, x31, x12 # perform operation +80003918: 40cfffb3 andn x31,x31,x12 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkb_andn_cg_cmp_rd_rs1_b31, Zbkb_andn_cg_cmp_rd_rs1_b31_str) +8000391c: 0009a383 lw x7,0(x19) +80003920: 01f38863 beq x7,x31,80003930 +80003924: 3f50146f jal x8,80005518 +80003928: 80003918 .word 0x80003918 +8000392c: 8000ea00 .word 0x8000ea00 +80003930: 00498993 addi x19,x19,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x2b91246c +80003934: 0001a483 lw x9,0(x3) +80003938: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0xbbd70899 +8000393c: 0001a003 lw x0,0(x3) +80003940: 00418193 addi x3,x3,4 + +80003944 : +Zbkb_andn_cg_cmp_rd_rs2_b0: + andn x0, x9, x0 # perform operation +80003944: 4004f033 andn x0,x9,x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zbkb_andn_cg_cmp_rd_rs2_b0, Zbkb_andn_cg_cmp_rd_rs2_b0_str) +80003948: 0009a383 lw x7,0(x19) +8000394c: 00038863 beq x7,x0,8000395c +80003950: 3c90146f jal x8,80005518 +80003954: 80003944 .word 0x80003944 +80003958: 8000ea38 .word 0x8000ea38 +8000395c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x25ca7ab2 +80003960: 0001a703 lw x14,0(x3) +80003964: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xcf91e13d +80003968: 0001a083 lw x1,0(x3) +8000396c: 00418193 addi x3,x3,4 + +80003970 : +Zbkb_andn_cg_cmp_rd_rs2_b1: + andn x1, x14, x1 # perform operation +80003970: 401770b3 andn x1,x14,x1 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkb_andn_cg_cmp_rd_rs2_b1, Zbkb_andn_cg_cmp_rd_rs2_b1_str) +80003974: 0009a383 lw x7,0(x19) +80003978: 00138863 beq x7,x1,80003988 +8000397c: 39d0146f jal x8,80005518 +80003980: 80003970 .word 0x80003970 +80003984: 8000ea6f .word 0x8000ea6f +80003988: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7b345d5e +8000398c: 0001ac03 lw x24,0(x3) +80003990: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x12aeb163 +80003994: 0001a103 lw x2,0(x3) +80003998: 00418193 addi x3,x3,4 + +8000399c : +Zbkb_andn_cg_cmp_rd_rs2_b2: + andn x2, x24, x2 # perform operation +8000399c: 402c7133 andn x2,x24,x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkb_andn_cg_cmp_rd_rs2_b2, Zbkb_andn_cg_cmp_rd_rs2_b2_str) +800039a0: 0009a383 lw x7,0(x19) +800039a4: 00238863 beq x7,x2,800039b4 +800039a8: 3710146f jal x8,80005518 +800039ac: 8000399c .word 0x8000399c +800039b0: 8000eaa6 .word 0x8000eaa6 +800039b4: 00498993 addi x19,x19,4 + + mv x17, x3 # switch data pointer register to avoid conflict with test +800039b8: 00018893 addi x17,x3,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xb85b5e26 +800039bc: 0008a003 lw x0,0(x17) +800039c0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x9e65a492 +800039c4: 0008a183 lw x3,0(x17) +800039c8: 00488893 addi x17,x17,4 + +800039cc : +Zbkb_andn_cg_cmp_rd_rs2_b3: + andn x3, x0, x3 # perform operation +800039cc: 403071b3 andn x3,x0,x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkb_andn_cg_cmp_rd_rs2_b3, Zbkb_andn_cg_cmp_rd_rs2_b3_str) +800039d0: 0009a383 lw x7,0(x19) +800039d4: 00338863 beq x7,x3,800039e4 +800039d8: 3410146f jal x8,80005518 +800039dc: 800039cc .word 0x800039cc +800039e0: 8000eadd .word 0x8000eadd +800039e4: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xd764c27c +800039e8: 0008ad03 lw x26,0(x17) +800039ec: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x4c0f6dc6 +800039f0: 0008a203 lw x4,0(x17) +800039f4: 00488893 addi x17,x17,4 + +800039f8 : +Zbkb_andn_cg_cmp_rd_rs2_b4: + andn x4, x26, x4 # perform operation +800039f8: 404d7233 andn x4,x26,x4 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkb_andn_cg_cmp_rd_rs2_b4, Zbkb_andn_cg_cmp_rd_rs2_b4_str) +800039fc: 0009a383 lw x7,0(x19) +80003a00: 00438863 beq x7,x4,80003a10 +80003a04: 3150146f jal x8,80005518 +80003a08: 800039f8 .word 0x800039f8 +80003a0c: 8000eb14 .word 0x8000eb14 +80003a10: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xc8c071a3 +80003a14: 0008a703 lw x14,0(x17) +80003a18: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x31d27069 +80003a1c: 0008a283 lw x5,0(x17) +80003a20: 00488893 addi x17,x17,4 + +80003a24 : +Zbkb_andn_cg_cmp_rd_rs2_b5: + andn x5, x14, x5 # perform operation +80003a24: 405772b3 andn x5,x14,x5 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_andn_cg_cmp_rd_rs2_b5, Zbkb_andn_cg_cmp_rd_rs2_b5_str) +80003a28: 0009a383 lw x7,0(x19) +80003a2c: 00538863 beq x7,x5,80003a3c +80003a30: 2e90146f jal x8,80005518 +80003a34: 80003a24 .word 0x80003a24 +80003a38: 8000eb4b .word 0x8000eb4b +80003a3c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xf3fe4d3d +80003a40: 0008af03 lw x30,0(x17) +80003a44: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x2bf68a87 +80003a48: 0008a303 lw x6,0(x17) +80003a4c: 00488893 addi x17,x17,4 + +80003a50 : +Zbkb_andn_cg_cmp_rd_rs2_b6: + andn x6, x30, x6 # perform operation +80003a50: 406f7333 andn x6,x30,x6 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkb_andn_cg_cmp_rd_rs2_b6, Zbkb_andn_cg_cmp_rd_rs2_b6_str) +80003a54: 0009a383 lw x7,0(x19) +80003a58: 00638863 beq x7,x6,80003a68 +80003a5c: 2bd0146f jal x8,80005518 +80003a60: 80003a50 .word 0x80003a50 +80003a64: 8000eb82 .word 0x8000eb82 +80003a68: 00498993 addi x19,x19,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a6c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a70: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x31a78462 +80003a74: 0008a503 lw x10,0(x17) +80003a78: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xe048e3b2 +80003a7c: 0008a383 lw x7,0(x17) +80003a80: 00488893 addi x17,x17,4 + +80003a84 : +Zbkb_andn_cg_cmp_rd_rs2_b7: + andn x7, x10, x7 # perform operation +80003a84: 407573b3 andn x7,x10,x7 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_andn_cg_cmp_rd_rs2_b7, Zbkb_andn_cg_cmp_rd_rs2_b7_str) +80003a88: 0009a683 lw x13,0(x19) +80003a8c: 00768863 beq x13,x7,80003a9c +80003a90: 2b10176f jal x14,80005540 +80003a94: 80003a84 .word 0x80003a84 +80003a98: 8000ebb9 .word 0x8000ebb9 +80003a9c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xb7a0673c +80003aa0: 0008a003 lw x0,0(x17) +80003aa4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xd8f0d23a +80003aa8: 0008a403 lw x8,0(x17) +80003aac: 00488893 addi x17,x17,4 + +80003ab0 : +Zbkb_andn_cg_cmp_rd_rs2_b8: + andn x8, x0, x8 # perform operation +80003ab0: 40807433 andn x8,x0,x8 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_andn_cg_cmp_rd_rs2_b8, Zbkb_andn_cg_cmp_rd_rs2_b8_str) +80003ab4: 0009a683 lw x13,0(x19) +80003ab8: 00868863 beq x13,x8,80003ac8 +80003abc: 2850176f jal x14,80005540 +80003ac0: 80003ab0 .word 0x80003ab0 +80003ac4: 8000ebf0 .word 0x8000ebf0 +80003ac8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x36305bc3 +80003acc: 0008a283 lw x5,0(x17) +80003ad0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xe0ab214b +80003ad4: 0008a483 lw x9,0(x17) +80003ad8: 00488893 addi x17,x17,4 + +80003adc : +Zbkb_andn_cg_cmp_rd_rs2_b9: + andn x9, x5, x9 # perform operation +80003adc: 4092f4b3 andn x9,x5,x9 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_andn_cg_cmp_rd_rs2_b9, Zbkb_andn_cg_cmp_rd_rs2_b9_str) +80003ae0: 0009a683 lw x13,0(x19) +80003ae4: 00968863 beq x13,x9,80003af4 +80003ae8: 2590176f jal x14,80005540 +80003aec: 80003adc .word 0x80003adc +80003af0: 8000ec27 .word 0x8000ec27 +80003af4: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xb8ec6e86 +80003af8: 0008a183 lw x3,0(x17) +80003afc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xb888ffbe +80003b00: 0008a503 lw x10,0(x17) +80003b04: 00488893 addi x17,x17,4 + +80003b08 : +Zbkb_andn_cg_cmp_rd_rs2_b10: + andn x10, x3, x10 # perform operation +80003b08: 40a1f533 andn x10,x3,x10 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_andn_cg_cmp_rd_rs2_b10, Zbkb_andn_cg_cmp_rd_rs2_b10_str) +80003b0c: 0009a683 lw x13,0(x19) +80003b10: 00a68863 beq x13,x10,80003b20 +80003b14: 22d0176f jal x14,80005540 +80003b18: 80003b08 .word 0x80003b08 +80003b1c: 8000ec5e .word 0x8000ec5e +80003b20: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x02356a46 +80003b24: 0008af03 lw x30,0(x17) +80003b28: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xaccf154a +80003b2c: 0008a583 lw x11,0(x17) +80003b30: 00488893 addi x17,x17,4 + +80003b34 : +Zbkb_andn_cg_cmp_rd_rs2_b11: + andn x11, x30, x11 # perform operation +80003b34: 40bf75b3 andn x11,x30,x11 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_andn_cg_cmp_rd_rs2_b11, Zbkb_andn_cg_cmp_rd_rs2_b11_str) +80003b38: 0009a683 lw x13,0(x19) +80003b3c: 00b68863 beq x13,x11,80003b4c +80003b40: 2010176f jal x14,80005540 +80003b44: 80003b34 .word 0x80003b34 +80003b48: 8000ec96 .word 0x8000ec96 +80003b4c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x0c0352da +80003b50: 0008a003 lw x0,0(x17) +80003b54: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0bf7ec5c +80003b58: 0008a603 lw x12,0(x17) +80003b5c: 00488893 addi x17,x17,4 + +80003b60 : +Zbkb_andn_cg_cmp_rd_rs2_b12: + andn x12, x0, x12 # perform operation +80003b60: 40c07633 andn x12,x0,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_andn_cg_cmp_rd_rs2_b12, Zbkb_andn_cg_cmp_rd_rs2_b12_str) +80003b64: 0009a683 lw x13,0(x19) +80003b68: 00c68863 beq x13,x12,80003b78 +80003b6c: 1d50176f jal x14,80005540 +80003b70: 80003b60 .word 0x80003b60 +80003b74: 8000ecce .word 0x8000ecce +80003b78: 00498993 addi x19,x19,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b7c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003b80: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x66485b82 +80003b84: 0008a583 lw x11,0(x17) +80003b88: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x3a3da920 +80003b8c: 0008a683 lw x13,0(x17) +80003b90: 00488893 addi x17,x17,4 + +80003b94 : +Zbkb_andn_cg_cmp_rd_rs2_b13: + andn x13, x11, x13 # perform operation +80003b94: 40d5f6b3 andn x13,x11,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_andn_cg_cmp_rd_rs2_b13, Zbkb_andn_cg_cmp_rd_rs2_b13_str) +80003b98: 0009a383 lw x7,0(x19) +80003b9c: 00d38863 beq x7,x13,80003bac +80003ba0: 1790146f jal x8,80005518 +80003ba4: 80003b94 .word 0x80003b94 +80003ba8: 8000ed06 .word 0x8000ed06 +80003bac: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x68d6d191 +80003bb0: 0008ae03 lw x28,0(x17) +80003bb4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x503ae1e6 +80003bb8: 0008a703 lw x14,0(x17) +80003bbc: 00488893 addi x17,x17,4 + +80003bc0 : +Zbkb_andn_cg_cmp_rd_rs2_b14: + andn x14, x28, x14 # perform operation +80003bc0: 40ee7733 andn x14,x28,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkb_andn_cg_cmp_rd_rs2_b14, Zbkb_andn_cg_cmp_rd_rs2_b14_str) +80003bc4: 0009a383 lw x7,0(x19) +80003bc8: 00e38863 beq x7,x14,80003bd8 +80003bcc: 14d0146f jal x8,80005518 +80003bd0: 80003bc0 .word 0x80003bc0 +80003bd4: 8000ed3e .word 0x8000ed3e +80003bd8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xcfc24eba +80003bdc: 0008a703 lw x14,0(x17) +80003be0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x3f67859d +80003be4: 0008a783 lw x15,0(x17) +80003be8: 00488893 addi x17,x17,4 + +80003bec : +Zbkb_andn_cg_cmp_rd_rs2_b15: + andn x15, x14, x15 # perform operation +80003bec: 40f777b3 andn x15,x14,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkb_andn_cg_cmp_rd_rs2_b15, Zbkb_andn_cg_cmp_rd_rs2_b15_str) +80003bf0: 0009a383 lw x7,0(x19) +80003bf4: 00f38863 beq x7,x15,80003c04 +80003bf8: 1210146f jal x8,80005518 +80003bfc: 80003bec .word 0x80003bec +80003c00: 8000ed76 .word 0x8000ed76 +80003c04: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xfec591b7 +80003c08: 0008ac83 lw x25,0(x17) +80003c0c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x49c03f5b +80003c10: 0008a803 lw x16,0(x17) +80003c14: 00488893 addi x17,x17,4 + +80003c18 : +Zbkb_andn_cg_cmp_rd_rs2_b16: + andn x16, x25, x16 # perform operation +80003c18: 410cf833 andn x16,x25,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkb_andn_cg_cmp_rd_rs2_b16, Zbkb_andn_cg_cmp_rd_rs2_b16_str) +80003c1c: 0009a383 lw x7,0(x19) +80003c20: 01038863 beq x7,x16,80003c30 +80003c24: 0f50146f jal x8,80005518 +80003c28: 80003c18 .word 0x80003c18 +80003c2c: 8000edae .word 0x8000edae +80003c30: 00498993 addi x19,x19,4 + + mv x22, x17 # switch data pointer register to avoid conflict with test +80003c34: 00088b13 addi x22,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x8e7bde41 +80003c38: 000b2583 lw x11,0(x22) +80003c3c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x78ef3c43 +80003c40: 000b2883 lw x17,0(x22) +80003c44: 004b0b13 addi x22,x22,4 + +80003c48 : +Zbkb_andn_cg_cmp_rd_rs2_b17: + andn x17, x11, x17 # perform operation +80003c48: 4115f8b3 andn x17,x11,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkb_andn_cg_cmp_rd_rs2_b17, Zbkb_andn_cg_cmp_rd_rs2_b17_str) +80003c4c: 0009a383 lw x7,0(x19) +80003c50: 01138863 beq x7,x17,80003c60 +80003c54: 0c50146f jal x8,80005518 +80003c58: 80003c48 .word 0x80003c48 +80003c5c: 8000ede6 .word 0x8000ede6 +80003c60: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x72111ab7 +80003c64: 000b2b83 lw x23,0(x22) +80003c68: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xb4992582 +80003c6c: 000b2903 lw x18,0(x22) +80003c70: 004b0b13 addi x22,x22,4 + +80003c74 : +Zbkb_andn_cg_cmp_rd_rs2_b18: + andn x18, x23, x18 # perform operation +80003c74: 412bf933 andn x18,x23,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkb_andn_cg_cmp_rd_rs2_b18, Zbkb_andn_cg_cmp_rd_rs2_b18_str) +80003c78: 0009a383 lw x7,0(x19) +80003c7c: 01238863 beq x7,x18,80003c8c +80003c80: 0990146f jal x8,80005518 +80003c84: 80003c74 .word 0x80003c74 +80003c88: 8000ee1e .word 0x8000ee1e +80003c8c: 00498993 addi x19,x19,4 + + mv x10, x19 # switch signature pointer register to avoid conflict with test +80003c90: 00098513 addi x10,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x7b16027a +80003c94: 000b2803 lw x16,0(x22) +80003c98: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x26b8df59 +80003c9c: 000b2983 lw x19,0(x22) +80003ca0: 004b0b13 addi x22,x22,4 + +80003ca4 : +Zbkb_andn_cg_cmp_rd_rs2_b19: + andn x19, x16, x19 # perform operation +80003ca4: 413879b3 andn x19,x16,x19 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkb_andn_cg_cmp_rd_rs2_b19, Zbkb_andn_cg_cmp_rd_rs2_b19_str) +80003ca8: 00052383 lw x7,0(x10) +80003cac: 01338863 beq x7,x19,80003cbc +80003cb0: 0690146f jal x8,80005518 +80003cb4: 80003ca4 .word 0x80003ca4 +80003cb8: 8000ee56 .word 0x8000ee56 +80003cbc: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xc397d61d +80003cc0: 000b2a83 lw x21,0(x22) +80003cc4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x014dcb8b +80003cc8: 000b2a03 lw x20,0(x22) +80003ccc: 004b0b13 addi x22,x22,4 + +80003cd0 : +Zbkb_andn_cg_cmp_rd_rs2_b20: + andn x20, x21, x20 # perform operation +80003cd0: 414afa33 andn x20,x21,x20 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zbkb_andn_cg_cmp_rd_rs2_b20, Zbkb_andn_cg_cmp_rd_rs2_b20_str) +80003cd4: 00052383 lw x7,0(x10) +80003cd8: 01438863 beq x7,x20,80003ce8 +80003cdc: 03d0146f jal x8,80005518 +80003ce0: 80003cd0 .word 0x80003cd0 +80003ce4: 8000ee8e .word 0x8000ee8e +80003ce8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x59354356 +80003cec: 000b2d03 lw x26,0(x22) +80003cf0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xcf305ff2 +80003cf4: 000b2a83 lw x21,0(x22) +80003cf8: 004b0b13 addi x22,x22,4 + +80003cfc : +Zbkb_andn_cg_cmp_rd_rs2_b21: + andn x21, x26, x21 # perform operation +80003cfc: 415d7ab3 andn x21,x26,x21 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zbkb_andn_cg_cmp_rd_rs2_b21, Zbkb_andn_cg_cmp_rd_rs2_b21_str) +80003d00: 00052383 lw x7,0(x10) +80003d04: 01538863 beq x7,x21,80003d14 +80003d08: 0110146f jal x8,80005518 +80003d0c: 80003cfc .word 0x80003cfc +80003d10: 8000eec6 .word 0x8000eec6 +80003d14: 00450513 addi x10,x10,4 + + mv x30, x22 # switch data pointer register to avoid conflict with test +80003d18: 000b0f13 addi x30,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0xe2bc816a +80003d1c: 000f2283 lw x5,0(x30) +80003d20: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0xe67e630d +80003d24: 000f2b03 lw x22,0(x30) +80003d28: 004f0f13 addi x30,x30,4 + +80003d2c : +Zbkb_andn_cg_cmp_rd_rs2_b22: + andn x22, x5, x22 # perform operation +80003d2c: 4162fb33 andn x22,x5,x22 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_andn_cg_cmp_rd_rs2_b22, Zbkb_andn_cg_cmp_rd_rs2_b22_str) +80003d30: 00052383 lw x7,0(x10) +80003d34: 01638863 beq x7,x22,80003d44 +80003d38: 7e00146f jal x8,80005518 +80003d3c: 80003d2c .word 0x80003d2c +80003d40: 8000eefe .word 0x8000eefe +80003d44: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0xdc30d6bc +80003d48: 000f2203 lw x4,0(x30) +80003d4c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x05cc1b8b +80003d50: 000f2b83 lw x23,0(x30) +80003d54: 004f0f13 addi x30,x30,4 + +80003d58 : +Zbkb_andn_cg_cmp_rd_rs2_b23: + andn x23, x4, x23 # perform operation +80003d58: 41727bb3 andn x23,x4,x23 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zbkb_andn_cg_cmp_rd_rs2_b23, Zbkb_andn_cg_cmp_rd_rs2_b23_str) +80003d5c: 00052383 lw x7,0(x10) +80003d60: 01738863 beq x7,x23,80003d70 +80003d64: 7b40146f jal x8,80005518 +80003d68: 80003d58 .word 0x80003d58 +80003d6c: 8000ef36 .word 0x8000ef36 +80003d70: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x8c4af816 +80003d74: 000f2683 lw x13,0(x30) +80003d78: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xa3e2174a +80003d7c: 000f2c03 lw x24,0(x30) +80003d80: 004f0f13 addi x30,x30,4 + +80003d84 : +Zbkb_andn_cg_cmp_rd_rs2_b24: + andn x24, x13, x24 # perform operation +80003d84: 4186fc33 andn x24,x13,x24 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zbkb_andn_cg_cmp_rd_rs2_b24, Zbkb_andn_cg_cmp_rd_rs2_b24_str) +80003d88: 00052383 lw x7,0(x10) +80003d8c: 01838863 beq x7,x24,80003d9c +80003d90: 7880146f jal x8,80005518 +80003d94: 80003d84 .word 0x80003d84 +80003d98: 8000ef6e .word 0x8000ef6e +80003d9c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x4862da7e +80003da0: 000f2e83 lw x29,0(x30) +80003da4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x236dd079 +80003da8: 000f2c83 lw x25,0(x30) +80003dac: 004f0f13 addi x30,x30,4 + +80003db0 : +Zbkb_andn_cg_cmp_rd_rs2_b25: + andn x25, x29, x25 # perform operation +80003db0: 419efcb3 andn x25,x29,x25 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkb_andn_cg_cmp_rd_rs2_b25, Zbkb_andn_cg_cmp_rd_rs2_b25_str) +80003db4: 00052383 lw x7,0(x10) +80003db8: 01938863 beq x7,x25,80003dc8 +80003dbc: 75c0146f jal x8,80005518 +80003dc0: 80003db0 .word 0x80003db0 +80003dc4: 8000efa6 .word 0x8000efa6 +80003dc8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xf3fe91e7 +80003dcc: 000f2803 lw x16,0(x30) +80003dd0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xbcf4e149 +80003dd4: 000f2d03 lw x26,0(x30) +80003dd8: 004f0f13 addi x30,x30,4 + +80003ddc : +Zbkb_andn_cg_cmp_rd_rs2_b26: + andn x26, x16, x26 # perform operation +80003ddc: 41a87d33 andn x26,x16,x26 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zbkb_andn_cg_cmp_rd_rs2_b26, Zbkb_andn_cg_cmp_rd_rs2_b26_str) +80003de0: 00052383 lw x7,0(x10) +80003de4: 01a38863 beq x7,x26,80003df4 +80003de8: 7300146f jal x8,80005518 +80003dec: 80003ddc .word 0x80003ddc +80003df0: 8000efde .word 0x8000efde +80003df4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x026bca67 +80003df8: 000f2803 lw x16,0(x30) +80003dfc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x52438d09 +80003e00: 000f2d83 lw x27,0(x30) +80003e04: 004f0f13 addi x30,x30,4 + +80003e08 : +Zbkb_andn_cg_cmp_rd_rs2_b27: + andn x27, x16, x27 # perform operation +80003e08: 41b87db3 andn x27,x16,x27 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zbkb_andn_cg_cmp_rd_rs2_b27, Zbkb_andn_cg_cmp_rd_rs2_b27_str) +80003e0c: 00052383 lw x7,0(x10) +80003e10: 01b38863 beq x7,x27,80003e20 +80003e14: 7040146f jal x8,80005518 +80003e18: 80003e08 .word 0x80003e08 +80003e1c: 8000f016 .word 0x8000f016 +80003e20: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xd20fb6e8 +80003e24: 000f2c83 lw x25,0(x30) +80003e28: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x09a91809 +80003e2c: 000f2e03 lw x28,0(x30) +80003e30: 004f0f13 addi x30,x30,4 + +80003e34 : +Zbkb_andn_cg_cmp_rd_rs2_b28: + andn x28, x25, x28 # perform operation +80003e34: 41ccfe33 andn x28,x25,x28 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zbkb_andn_cg_cmp_rd_rs2_b28, Zbkb_andn_cg_cmp_rd_rs2_b28_str) +80003e38: 00052383 lw x7,0(x10) +80003e3c: 01c38863 beq x7,x28,80003e4c +80003e40: 6d80146f jal x8,80005518 +80003e44: 80003e34 .word 0x80003e34 +80003e48: 8000f04e .word 0x8000f04e +80003e4c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x400a6bff +80003e50: 000f2703 lw x14,0(x30) +80003e54: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x6e452a95 +80003e58: 000f2e83 lw x29,0(x30) +80003e5c: 004f0f13 addi x30,x30,4 + +80003e60 : +Zbkb_andn_cg_cmp_rd_rs2_b29: + andn x29, x14, x29 # perform operation +80003e60: 41d77eb3 andn x29,x14,x29 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_andn_cg_cmp_rd_rs2_b29, Zbkb_andn_cg_cmp_rd_rs2_b29_str) +80003e64: 00052383 lw x7,0(x10) +80003e68: 01d38863 beq x7,x29,80003e78 +80003e6c: 6ac0146f jal x8,80005518 +80003e70: 80003e60 .word 0x80003e60 +80003e74: 8000f086 .word 0x8000f086 +80003e78: 00450513 addi x10,x10,4 + + mv x1, x30 # switch data pointer register to avoid conflict with test +80003e7c: 000f0093 addi x1,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xdcea8658 +80003e80: 0000a703 lw x14,0(x1) +80003e84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x896108f4 +80003e88: 0000af03 lw x30,0(x1) +80003e8c: 00408093 addi x1,x1,4 + +80003e90 : +Zbkb_andn_cg_cmp_rd_rs2_b30: + andn x30, x14, x30 # perform operation +80003e90: 41e77f33 andn x30,x14,x30 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zbkb_andn_cg_cmp_rd_rs2_b30, Zbkb_andn_cg_cmp_rd_rs2_b30_str) +80003e94: 00052383 lw x7,0(x10) +80003e98: 01e38863 beq x7,x30,80003ea8 +80003e9c: 67c0146f jal x8,80005518 +80003ea0: 80003e90 .word 0x80003e90 +80003ea4: 8000f0be .word 0x8000f0be +80003ea8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x13169dc9 +80003eac: 0000a003 lw x0,0(x1) +80003eb0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x42781176 +80003eb4: 0000af83 lw x31,0(x1) +80003eb8: 00408093 addi x1,x1,4 + +80003ebc : +Zbkb_andn_cg_cmp_rd_rs2_b31: + andn x31, x0, x31 # perform operation +80003ebc: 41f07fb3 andn x31,x0,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zbkb_andn_cg_cmp_rd_rs2_b31, Zbkb_andn_cg_cmp_rd_rs2_b31_str) +80003ec0: 00052383 lw x7,0(x10) +80003ec4: 01f38863 beq x7,x31,80003ed4 +80003ec8: 6500146f jal x8,80005518 +80003ecc: 80003ebc .word 0x80003ebc +80003ed0: 8000f0f6 .word 0x8000f0f6 +80003ed4: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0xc8c3f701 +80003ed8: 0000a003 lw x0,0(x1) +80003edc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xa450bdb0 +80003ee0: 0000a003 lw x0,0(x1) +80003ee4: 00408093 addi x1,x1,4 + +80003ee8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b0: + andn x0, x0, x0 # perform operation +80003ee8: 40007033 andn x0,x0,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkb_andn_cg_cmp_rd_rs1_rs2_b0, Zbkb_andn_cg_cmp_rd_rs1_rs2_b0_str) +80003eec: 00052383 lw x7,0(x10) +80003ef0: 00038863 beq x7,x0,80003f00 +80003ef4: 6240146f jal x8,80005518 +80003ef8: 80003ee8 .word 0x80003ee8 +80003efc: 8000f12e .word 0x8000f12e +80003f00: 00450513 addi x10,x10,4 + + mv x9, x1 # switch data pointer register to avoid conflict with test +80003f04: 00008493 addi x9,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x340e1bea +80003f08: 0004a083 lw x1,0(x9) +80003f0c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x3b4fd76c +80003f10: 0004a083 lw x1,0(x9) +80003f14: 00448493 addi x9,x9,4 + +80003f18 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b1: + andn x1, x1, x1 # perform operation +80003f18: 4010f0b3 andn x1,x1,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_andn_cg_cmp_rd_rs1_rs2_b1, Zbkb_andn_cg_cmp_rd_rs1_rs2_b1_str) +80003f1c: 00052383 lw x7,0(x10) +80003f20: 00138863 beq x7,x1,80003f30 +80003f24: 5f40146f jal x8,80005518 +80003f28: 80003f18 .word 0x80003f18 +80003f2c: 8000f169 .word 0x8000f169 +80003f30: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x0e635ab8 +80003f34: 0004a103 lw x2,0(x9) +80003f38: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xe19ee096 +80003f3c: 0004a103 lw x2,0(x9) +80003f40: 00448493 addi x9,x9,4 + +80003f44 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b2: + andn x2, x2, x2 # perform operation +80003f44: 40217133 andn x2,x2,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkb_andn_cg_cmp_rd_rs1_rs2_b2, Zbkb_andn_cg_cmp_rd_rs1_rs2_b2_str) +80003f48: 00052383 lw x7,0(x10) +80003f4c: 00238863 beq x7,x2,80003f5c +80003f50: 5c80146f jal x8,80005518 +80003f54: 80003f44 .word 0x80003f44 +80003f58: 8000f1a4 .word 0x8000f1a4 +80003f5c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xcb5d9f35 +80003f60: 0004a183 lw x3,0(x9) +80003f64: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x16cf9b91 +80003f68: 0004a183 lw x3,0(x9) +80003f6c: 00448493 addi x9,x9,4 + +80003f70 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b3: + andn x3, x3, x3 # perform operation +80003f70: 4031f1b3 andn x3,x3,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_andn_cg_cmp_rd_rs1_rs2_b3, Zbkb_andn_cg_cmp_rd_rs1_rs2_b3_str) +80003f74: 00052383 lw x7,0(x10) +80003f78: 00338863 beq x7,x3,80003f88 +80003f7c: 59c0146f jal x8,80005518 +80003f80: 80003f70 .word 0x80003f70 +80003f84: 8000f1df .word 0x8000f1df +80003f88: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x10a3a3e3 +80003f8c: 0004a203 lw x4,0(x9) +80003f90: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xadbae1b7 +80003f94: 0004a203 lw x4,0(x9) +80003f98: 00448493 addi x9,x9,4 + +80003f9c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b4: + andn x4, x4, x4 # perform operation +80003f9c: 40427233 andn x4,x4,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_andn_cg_cmp_rd_rs1_rs2_b4, Zbkb_andn_cg_cmp_rd_rs1_rs2_b4_str) +80003fa0: 00052383 lw x7,0(x10) +80003fa4: 00438863 beq x7,x4,80003fb4 +80003fa8: 5700146f jal x8,80005518 +80003fac: 80003f9c .word 0x80003f9c +80003fb0: 8000f21a .word 0x8000f21a +80003fb4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x44765aa4 +80003fb8: 0004a283 lw x5,0(x9) +80003fbc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xd67d55c3 +80003fc0: 0004a283 lw x5,0(x9) +80003fc4: 00448493 addi x9,x9,4 + +80003fc8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b5: + andn x5, x5, x5 # perform operation +80003fc8: 4052f2b3 andn x5,x5,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_andn_cg_cmp_rd_rs1_rs2_b5, Zbkb_andn_cg_cmp_rd_rs1_rs2_b5_str) +80003fcc: 00052383 lw x7,0(x10) +80003fd0: 00538863 beq x7,x5,80003fe0 +80003fd4: 5440146f jal x8,80005518 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 8000f255 .word 0x8000f255 +80003fe0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x14c07dce +80003fe4: 0004a303 lw x6,0(x9) +80003fe8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x66c17a95 +80003fec: 0004a303 lw x6,0(x9) +80003ff0: 00448493 addi x9,x9,4 + +80003ff4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b6: + andn x6, x6, x6 # perform operation +80003ff4: 40637333 andn x6,x6,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_andn_cg_cmp_rd_rs1_rs2_b6, Zbkb_andn_cg_cmp_rd_rs1_rs2_b6_str) +80003ff8: 00052383 lw x7,0(x10) +80003ffc: 00638863 beq x7,x6,8000400c +80004000: 5180146f jal x8,80005518 +80004004: 80003ff4 .word 0x80003ff4 +80004008: 8000f290 .word 0x8000f290 +8000400c: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004010: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80004014: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xe4f61a8f +80004018: 0004a383 lw x7,0(x9) +8000401c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xb3da8b53 +80004020: 0004a383 lw x7,0(x9) +80004024: 00448493 addi x9,x9,4 + +80004028 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b7: + andn x7, x7, x7 # perform operation +80004028: 4073f3b3 andn x7,x7,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkb_andn_cg_cmp_rd_rs1_rs2_b7, Zbkb_andn_cg_cmp_rd_rs1_rs2_b7_str) +8000402c: 00052203 lw x4,0(x10) +80004030: 00720863 beq x4,x7,80004040 +80004034: 4cc012ef jal x5,80005500 +80004038: 80004028 .word 0x80004028 +8000403c: 8000f2cb .word 0x8000f2cb +80004040: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x9d85cce7 +80004044: 0004a403 lw x8,0(x9) +80004048: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x586ea7fd +8000404c: 0004a403 lw x8,0(x9) +80004050: 00448493 addi x9,x9,4 + +80004054 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b8: + andn x8, x8, x8 # perform operation +80004054: 40847433 andn x8,x8,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkb_andn_cg_cmp_rd_rs1_rs2_b8, Zbkb_andn_cg_cmp_rd_rs1_rs2_b8_str) +80004058: 00052203 lw x4,0(x10) +8000405c: 00820863 beq x4,x8,8000406c +80004060: 4a0012ef jal x5,80005500 +80004064: 80004054 .word 0x80004054 +80004068: 8000f306 .word 0x8000f306 +8000406c: 00450513 addi x10,x10,4 + + mv x12, x9 # switch data pointer register to avoid conflict with test +80004070: 00048613 addi x12,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xc14d97ad +80004074: 00062483 lw x9,0(x12) +80004078: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xe96ab165 +8000407c: 00062483 lw x9,0(x12) +80004080: 00460613 addi x12,x12,4 + +80004084 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b9: + andn x9, x9, x9 # perform operation +80004084: 4094f4b3 andn x9,x9,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zbkb_andn_cg_cmp_rd_rs1_rs2_b9, Zbkb_andn_cg_cmp_rd_rs1_rs2_b9_str) +80004088: 00052203 lw x4,0(x10) +8000408c: 00920863 beq x4,x9,8000409c +80004090: 470012ef jal x5,80005500 +80004094: 80004084 .word 0x80004084 +80004098: 8000f341 .word 0x8000f341 +8000409c: 00450513 addi x10,x10,4 + + mv x16, x10 # switch signature pointer register to avoid conflict with test +800040a0: 00050813 addi x16,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xae4d3304 +800040a4: 00062503 lw x10,0(x12) +800040a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xf7334197 +800040ac: 00062503 lw x10,0(x12) +800040b0: 00460613 addi x12,x12,4 + +800040b4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b10: + andn x10, x10, x10 # perform operation +800040b4: 40a57533 andn x10,x10,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_andn_cg_cmp_rd_rs1_rs2_b10, Zbkb_andn_cg_cmp_rd_rs1_rs2_b10_str) +800040b8: 00082203 lw x4,0(x16) +800040bc: 00a20863 beq x4,x10,800040cc +800040c0: 440012ef jal x5,80005500 +800040c4: 800040b4 .word 0x800040b4 +800040c8: 8000f37c .word 0x8000f37c +800040cc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xc250acfe +800040d0: 00062583 lw x11,0(x12) +800040d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xcb7fa637 +800040d8: 00062583 lw x11,0(x12) +800040dc: 00460613 addi x12,x12,4 + +800040e0 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b11: + andn x11, x11, x11 # perform operation +800040e0: 40b5f5b3 andn x11,x11,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_andn_cg_cmp_rd_rs1_rs2_b11, Zbkb_andn_cg_cmp_rd_rs1_rs2_b11_str) +800040e4: 00082203 lw x4,0(x16) +800040e8: 00b20863 beq x4,x11,800040f8 +800040ec: 414012ef jal x5,80005500 +800040f0: 800040e0 .word 0x800040e0 +800040f4: 8000f3b8 .word 0x8000f3b8 +800040f8: 00480813 addi x16,x16,4 + + mv x19, x12 # switch data pointer register to avoid conflict with test +800040fc: 00060993 addi x19,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x09085c44 +80004100: 0009a603 lw x12,0(x19) +80004104: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xb76009d4 +80004108: 0009a603 lw x12,0(x19) +8000410c: 00498993 addi x19,x19,4 + +80004110 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b12: + andn x12, x12, x12 # perform operation +80004110: 40c67633 andn x12,x12,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zbkb_andn_cg_cmp_rd_rs1_rs2_b12, Zbkb_andn_cg_cmp_rd_rs1_rs2_b12_str) +80004114: 00082203 lw x4,0(x16) +80004118: 00c20863 beq x4,x12,80004128 +8000411c: 3e4012ef jal x5,80005500 +80004120: 80004110 .word 0x80004110 +80004124: 8000f3f4 .word 0x8000f3f4 +80004128: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x775b0f45 +8000412c: 0009a683 lw x13,0(x19) +80004130: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x0eecf588 +80004134: 0009a683 lw x13,0(x19) +80004138: 00498993 addi x19,x19,4 + +8000413c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b13: + andn x13, x13, x13 # perform operation +8000413c: 40d6f6b3 andn x13,x13,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_andn_cg_cmp_rd_rs1_rs2_b13, Zbkb_andn_cg_cmp_rd_rs1_rs2_b13_str) +80004140: 00082203 lw x4,0(x16) +80004144: 00d20863 beq x4,x13,80004154 +80004148: 3b8012ef jal x5,80005500 +8000414c: 8000413c .word 0x8000413c +80004150: 8000f430 .word 0x8000f430 +80004154: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x7382618d +80004158: 0009a703 lw x14,0(x19) +8000415c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x2bf878fd +80004160: 0009a703 lw x14,0(x19) +80004164: 00498993 addi x19,x19,4 + +80004168 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b14: + andn x14, x14, x14 # perform operation +80004168: 40e77733 andn x14,x14,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_andn_cg_cmp_rd_rs1_rs2_b14, Zbkb_andn_cg_cmp_rd_rs1_rs2_b14_str) +8000416c: 00082203 lw x4,0(x16) +80004170: 00e20863 beq x4,x14,80004180 +80004174: 38c012ef jal x5,80005500 +80004178: 80004168 .word 0x80004168 +8000417c: 8000f46c .word 0x8000f46c +80004180: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xeecaa097 +80004184: 0009a783 lw x15,0(x19) +80004188: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x1ddb86e3 +8000418c: 0009a783 lw x15,0(x19) +80004190: 00498993 addi x19,x19,4 + +80004194 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b15: + andn x15, x15, x15 # perform operation +80004194: 40f7f7b3 andn x15,x15,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_andn_cg_cmp_rd_rs1_rs2_b15, Zbkb_andn_cg_cmp_rd_rs1_rs2_b15_str) +80004198: 00082203 lw x4,0(x16) +8000419c: 00f20863 beq x4,x15,800041ac +800041a0: 360012ef jal x5,80005500 +800041a4: 80004194 .word 0x80004194 +800041a8: 8000f4a8 .word 0x8000f4a8 +800041ac: 00480813 addi x16,x16,4 + + mv x9, x16 # switch signature pointer register to avoid conflict with test +800041b0: 00080493 addi x9,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x6219179e +800041b4: 0009a803 lw x16,0(x19) +800041b8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x681d596d +800041bc: 0009a803 lw x16,0(x19) +800041c0: 00498993 addi x19,x19,4 + +800041c4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b16: + andn x16, x16, x16 # perform operation +800041c4: 41087833 andn x16,x16,x16 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_andn_cg_cmp_rd_rs1_rs2_b16, Zbkb_andn_cg_cmp_rd_rs1_rs2_b16_str) +800041c8: 0004a203 lw x4,0(x9) +800041cc: 01020863 beq x4,x16,800041dc +800041d0: 330012ef jal x5,80005500 +800041d4: 800041c4 .word 0x800041c4 +800041d8: 8000f4e4 .word 0x8000f4e4 +800041dc: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xe217ae16 +800041e0: 0009a883 lw x17,0(x19) +800041e4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x7c4b07a1 +800041e8: 0009a883 lw x17,0(x19) +800041ec: 00498993 addi x19,x19,4 + +800041f0 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b17: + andn x17, x17, x17 # perform operation +800041f0: 4118f8b3 andn x17,x17,x17 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_andn_cg_cmp_rd_rs1_rs2_b17, Zbkb_andn_cg_cmp_rd_rs1_rs2_b17_str) +800041f4: 0004a203 lw x4,0(x9) +800041f8: 01120863 beq x4,x17,80004208 +800041fc: 304012ef jal x5,80005500 +80004200: 800041f0 .word 0x800041f0 +80004204: 8000f520 .word 0x8000f520 +80004208: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xacb0372e +8000420c: 0009a903 lw x18,0(x19) +80004210: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xd6150482 +80004214: 0009a903 lw x18,0(x19) +80004218: 00498993 addi x19,x19,4 + +8000421c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b18: + andn x18, x18, x18 # perform operation +8000421c: 41297933 andn x18,x18,x18 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_andn_cg_cmp_rd_rs1_rs2_b18, Zbkb_andn_cg_cmp_rd_rs1_rs2_b18_str) +80004220: 0004a203 lw x4,0(x9) +80004224: 01220863 beq x4,x18,80004234 +80004228: 2d8012ef jal x5,80005500 +8000422c: 8000421c .word 0x8000421c +80004230: 8000f55c .word 0x8000f55c +80004234: 00448493 addi x9,x9,4 + + mv x17, x19 # switch data pointer register to avoid conflict with test +80004238: 00098893 addi x17,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xd255fa3d +8000423c: 0008a983 lw x19,0(x17) +80004240: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xdfb6c747 +80004244: 0008a983 lw x19,0(x17) +80004248: 00488893 addi x17,x17,4 + +8000424c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b19: + andn x19, x19, x19 # perform operation +8000424c: 4139f9b3 andn x19,x19,x19 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_andn_cg_cmp_rd_rs1_rs2_b19, Zbkb_andn_cg_cmp_rd_rs1_rs2_b19_str) +80004250: 0004a203 lw x4,0(x9) +80004254: 01320863 beq x4,x19,80004264 +80004258: 2a8012ef jal x5,80005500 +8000425c: 8000424c .word 0x8000424c +80004260: 8000f598 .word 0x8000f598 +80004264: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xeb098da8 +80004268: 0008aa03 lw x20,0(x17) +8000426c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x6155cfb6 +80004270: 0008aa03 lw x20,0(x17) +80004274: 00488893 addi x17,x17,4 + +80004278 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b20: + andn x20, x20, x20 # perform operation +80004278: 414a7a33 andn x20,x20,x20 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_andn_cg_cmp_rd_rs1_rs2_b20, Zbkb_andn_cg_cmp_rd_rs1_rs2_b20_str) +8000427c: 0004a203 lw x4,0(x9) +80004280: 01420863 beq x4,x20,80004290 +80004284: 27c012ef jal x5,80005500 +80004288: 80004278 .word 0x80004278 +8000428c: 8000f5d4 .word 0x8000f5d4 +80004290: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x8aaae54f +80004294: 0008aa83 lw x21,0(x17) +80004298: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x3d497913 +8000429c: 0008aa83 lw x21,0(x17) +800042a0: 00488893 addi x17,x17,4 + +800042a4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b21: + andn x21, x21, x21 # perform operation +800042a4: 415afab3 andn x21,x21,x21 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_andn_cg_cmp_rd_rs1_rs2_b21, Zbkb_andn_cg_cmp_rd_rs1_rs2_b21_str) +800042a8: 0004a203 lw x4,0(x9) +800042ac: 01520863 beq x4,x21,800042bc +800042b0: 250012ef jal x5,80005500 +800042b4: 800042a4 .word 0x800042a4 +800042b8: 8000f610 .word 0x8000f610 +800042bc: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xd7b94615 +800042c0: 0008ab03 lw x22,0(x17) +800042c4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x75a3f4f9 +800042c8: 0008ab03 lw x22,0(x17) +800042cc: 00488893 addi x17,x17,4 + +800042d0 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b22: + andn x22, x22, x22 # perform operation +800042d0: 416b7b33 andn x22,x22,x22 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_andn_cg_cmp_rd_rs1_rs2_b22, Zbkb_andn_cg_cmp_rd_rs1_rs2_b22_str) +800042d4: 0004a203 lw x4,0(x9) +800042d8: 01620863 beq x4,x22,800042e8 +800042dc: 224012ef jal x5,80005500 +800042e0: 800042d0 .word 0x800042d0 +800042e4: 8000f64c .word 0x8000f64c +800042e8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x1d4491be +800042ec: 0008ab83 lw x23,0(x17) +800042f0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x20574d62 +800042f4: 0008ab83 lw x23,0(x17) +800042f8: 00488893 addi x17,x17,4 + +800042fc : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b23: + andn x23, x23, x23 # perform operation +800042fc: 417bfbb3 andn x23,x23,x23 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_andn_cg_cmp_rd_rs1_rs2_b23, Zbkb_andn_cg_cmp_rd_rs1_rs2_b23_str) +80004300: 0004a203 lw x4,0(x9) +80004304: 01720863 beq x4,x23,80004314 +80004308: 1f8012ef jal x5,80005500 +8000430c: 800042fc .word 0x800042fc +80004310: 8000f688 .word 0x8000f688 +80004314: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x9ff9dd84 +80004318: 0008ac03 lw x24,0(x17) +8000431c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x5f78629e +80004320: 0008ac03 lw x24,0(x17) +80004324: 00488893 addi x17,x17,4 + +80004328 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b24: + andn x24, x24, x24 # perform operation +80004328: 418c7c33 andn x24,x24,x24 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_andn_cg_cmp_rd_rs1_rs2_b24, Zbkb_andn_cg_cmp_rd_rs1_rs2_b24_str) +8000432c: 0004a203 lw x4,0(x9) +80004330: 01820863 beq x4,x24,80004340 +80004334: 1cc012ef jal x5,80005500 +80004338: 80004328 .word 0x80004328 +8000433c: 8000f6c4 .word 0x8000f6c4 +80004340: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x1bac7ae3 +80004344: 0008ac83 lw x25,0(x17) +80004348: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x7c953c8f +8000434c: 0008ac83 lw x25,0(x17) +80004350: 00488893 addi x17,x17,4 + +80004354 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b25: + andn x25, x25, x25 # perform operation +80004354: 419cfcb3 andn x25,x25,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_andn_cg_cmp_rd_rs1_rs2_b25, Zbkb_andn_cg_cmp_rd_rs1_rs2_b25_str) +80004358: 0004a203 lw x4,0(x9) +8000435c: 01920863 beq x4,x25,8000436c +80004360: 1a0012ef jal x5,80005500 +80004364: 80004354 .word 0x80004354 +80004368: 8000f700 .word 0x8000f700 +8000436c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xd6bd9bf6 +80004370: 0008ad03 lw x26,0(x17) +80004374: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x109f9256 +80004378: 0008ad03 lw x26,0(x17) +8000437c: 00488893 addi x17,x17,4 + +80004380 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b26: + andn x26, x26, x26 # perform operation +80004380: 41ad7d33 andn x26,x26,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_andn_cg_cmp_rd_rs1_rs2_b26, Zbkb_andn_cg_cmp_rd_rs1_rs2_b26_str) +80004384: 0004a203 lw x4,0(x9) +80004388: 01a20863 beq x4,x26,80004398 +8000438c: 174012ef jal x5,80005500 +80004390: 80004380 .word 0x80004380 +80004394: 8000f73c .word 0x8000f73c +80004398: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x18217d32 +8000439c: 0008ad83 lw x27,0(x17) +800043a0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x9997baa9 +800043a4: 0008ad83 lw x27,0(x17) +800043a8: 00488893 addi x17,x17,4 + +800043ac : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b27: + andn x27, x27, x27 # perform operation +800043ac: 41bdfdb3 andn x27,x27,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_andn_cg_cmp_rd_rs1_rs2_b27, Zbkb_andn_cg_cmp_rd_rs1_rs2_b27_str) +800043b0: 0004a203 lw x4,0(x9) +800043b4: 01b20863 beq x4,x27,800043c4 +800043b8: 148012ef jal x5,80005500 +800043bc: 800043ac .word 0x800043ac +800043c0: 8000f778 .word 0x8000f778 +800043c4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8461c221 +800043c8: 0008ae03 lw x28,0(x17) +800043cc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xaac5b115 +800043d0: 0008ae03 lw x28,0(x17) +800043d4: 00488893 addi x17,x17,4 + +800043d8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b28: + andn x28, x28, x28 # perform operation +800043d8: 41ce7e33 andn x28,x28,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_andn_cg_cmp_rd_rs1_rs2_b28, Zbkb_andn_cg_cmp_rd_rs1_rs2_b28_str) +800043dc: 0004a203 lw x4,0(x9) +800043e0: 01c20863 beq x4,x28,800043f0 +800043e4: 11c012ef jal x5,80005500 +800043e8: 800043d8 .word 0x800043d8 +800043ec: 8000f7b4 .word 0x8000f7b4 +800043f0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xb60dd1a6 +800043f4: 0008ae83 lw x29,0(x17) +800043f8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xefab7f97 +800043fc: 0008ae83 lw x29,0(x17) +80004400: 00488893 addi x17,x17,4 + +80004404 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b29: + andn x29, x29, x29 # perform operation +80004404: 41defeb3 andn x29,x29,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_andn_cg_cmp_rd_rs1_rs2_b29, Zbkb_andn_cg_cmp_rd_rs1_rs2_b29_str) +80004408: 0004a203 lw x4,0(x9) +8000440c: 01d20863 beq x4,x29,8000441c +80004410: 0f0012ef jal x5,80005500 +80004414: 80004404 .word 0x80004404 +80004418: 8000f7f0 .word 0x8000f7f0 +8000441c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x0ef3d43c +80004420: 0008af03 lw x30,0(x17) +80004424: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x2632faad +80004428: 0008af03 lw x30,0(x17) +8000442c: 00488893 addi x17,x17,4 + +80004430 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b30: + andn x30, x30, x30 # perform operation +80004430: 41ef7f33 andn x30,x30,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_andn_cg_cmp_rd_rs1_rs2_b30, Zbkb_andn_cg_cmp_rd_rs1_rs2_b30_str) +80004434: 0004a203 lw x4,0(x9) +80004438: 01e20863 beq x4,x30,80004448 +8000443c: 0c4012ef jal x5,80005500 +80004440: 80004430 .word 0x80004430 +80004444: 8000f82c .word 0x8000f82c +80004448: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x8af56085 +8000444c: 0008af83 lw x31,0(x17) +80004450: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0818e975 +80004454: 0008af83 lw x31,0(x17) +80004458: 00488893 addi x17,x17,4 + +8000445c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b31: + andn x31, x31, x31 # perform operation +8000445c: 41ffffb3 andn x31,x31,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_andn_cg_cmp_rd_rs1_rs2_b31, Zbkb_andn_cg_cmp_rd_rs1_rs2_b31_str) +80004460: 0004a203 lw x4,0(x9) +80004464: 01f20863 beq x4,x31,80004474 +80004468: 098012ef jal x5,80005500 +8000446c: 8000445c .word 0x8000445c +80004470: 8000f868 .word 0x8000f868 +80004474: 00448493 addi x9,x9,4 + + mv x2, x9 # restore signature pointer to default register for teardown +80004478: 00048113 addi x2,x9,0 + +8000447c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000447c: 00000513 addi x10,x0,0 +80004480: 00000073 ecall +80004484: fff00513 addi x10,x0,-1 +80004488: 1d800413 addi x8,x0,472 + +8000448c : +8000448c: 34002373 csrrs x6,mscratch,x0 + +80004490 : +80004490: 23832383 lw x7,568(x6) +80004494: 23c32483 lw x9,572(x6) + +80004498 : +80004498: 22032383 lw x7,544(x6) + +8000449c : +8000449c: 25032483 lw x9,592(x6) +800044a0: 34049073 csrrw x0,mscratch,x9 + +800044a4 : +800044a4: 24832483 lw x9,584(x6) +800044a8: 305493f3 csrrw x7,mtvec,x9 +800044ac: ffc4f493 andi x9,x9,-4 +800044b0: ffc3f393 andi x7,x7,-4 +800044b4: 00749e63 bne x9,x7,800044d0 + +800044b8 : +800044b8: 00030493 addi x9,x6,0 + +800044bc : +800044bc: 0004a783 lw x15,0(x9) +800044c0: 00f3a023 sw x15,0(x7) +800044c4: 00438393 addi x7,x7,4 +800044c8: 00448493 addi x9,x9,4 +800044cc: fe83c8e3 blt x7,x8,800044bc +800044d0: 0000100f fence.i + +800044d4 : +800044d4: 00000013 addi x0,x0,0 +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: a0e50513 addi x10,x10,-1522 # 8000ff2e +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: a0750513 addi x10,x10,-1529 # 8000ff67 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: a2750513 addi x10,x10,-1497 # 8000ffc7 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000c517 auipc x10,0xc +800045e4: 59250513 addi x10,x10,1426 # 80010b72 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000d397 auipc x7,0xd +80004664: 5e838393 addi x7,x7,1512 # 80011c48 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000d417 auipc x8,0xd +800046a4: 5a040413 addi x8,x8,1440 # 80011c40 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8001011b .word 0x8001011b + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8000ff89 .word 0x8000ff89 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000b517 auipc x10,0xb +80004704: 7f450513 addi x10,x10,2036 # 8000fef4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000b517 auipc x10,0xb +80004744: 7ee50513 addi x10,x10,2030 # 8000ff2e +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: cddff06f jal x0,8000447c + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: cd1ff06f jal x0,8000447c +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7430313 addi x6,x6,-1164 # 800044d4 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: a6950513 addi x10,x10,-1431 # 800115a9 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: e9850513 addi x10,x10,-360 # 8000fa18 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 47050513 addi x10,x10,1136 # 80010030 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 32e50513 addi x10,x10,814 # 8000ff2e +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: a1848493 addi x9,x9,-1512 # 8000f9f8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001b417 auipc x8,0x1b +80005024: 68c40413 addi x8,x8,1676 # 800206ac +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010132 .word 0x80010132 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010234 .word 0x80010234 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 8001032f .word 0x8001032f +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010422 .word 0x80010422 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80010595 .word 0x80010595 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 3b020213 addi x4,x4,944 # 8000f8b0 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 39838393 addi x7,x7,920 # 8000f8b0 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 37068693 addi x13,x13,880 # 8000f8b0 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 34848493 addi x9,x9,840 # 8000f8b0 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 2a44a483 lw x9,676(x9) # 8000f8b0 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: f3040413 addi x8,x8,-208 # 800115f0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: fb040413 addi x8,x8,-80 # 800206b0 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 29848493 addi x9,x9,664 # 8000f9d8 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 25848493 addi x9,x9,600 # 8000f9d8 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 23880813 addi x16,x16,568 # 8000f9e8 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 22480813 addi x16,x16,548 # 8000f9e8 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 94b38393 addi x7,x7,-1717 # 8001011b +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 20080813 addi x16,x16,512 # 8000f9e0 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 94638393 addi x7,x7,-1722 # 80010132 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: a3038393 addi x7,x7,-1488 # 80010234 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: b1338393 addi x7,x7,-1261 # 8001032f +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: bee38393 addi x7,x7,-1042 # 80010422 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: d4938393 addi x7,x7,-695 # 80010595 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: cb538393 addi x7,x7,-843 # 80010519 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: cdb38393 addi x7,x7,-805 # 80010557 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 8de38393 addi x7,x7,-1826 # 80010172 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 9c638393 addi x7,x7,-1594 # 80010272 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: aa738393 addi x7,x7,-1369 # 8001036b +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: b8338393 addi x7,x7,-1149 # 8001045f +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: cdc38393 addi x7,x7,-804 # 800105d0 +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 8a638393 addi x7,x7,-1882 # 800101b2 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 98c38393 addi x7,x7,-1652 # 800102b0 +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: a6b38393 addi x7,x7,-1429 # 800103a7 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: b4838393 addi x7,x7,-1208 # 8001049c +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: c9f38393 addi x7,x7,-865 # 8001060b +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 86f38393 addi x7,x7,-1937 # 800101f3 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 95338393 addi x7,x7,-1709 # 800102ef +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: a3038393 addi x7,x7,-1488 # 800103e4 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: b0e38393 addi x7,x7,-1266 # 800104da +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: c6338393 addi x7,x7,-925 # 80010647 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: c8838393 addi x7,x7,-888 # 80010684 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: cbf38393 addi x7,x7,-833 # 800106d3 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: da238393 addi x7,x7,-606 # 800107ce +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: e8638393 addi x7,x7,-378 # 800108ca +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: f7c80813 addi x16,x16,-132 # 8000f9e0 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: f6c80813 addi x16,x16,-148 # 8000f9e0 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: f6480813 addi x16,x16,-156 # 8000f9e4 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: f5080813 addi x16,x16,-176 # 8000f9e0 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 44e50513 addi x10,x10,1102 # 8000ff2e +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 44750513 addi x10,x10,1095 # 8000ff67 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 4be50513 addi x10,x10,1214 # 8001001e +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: e4852503 lw x10,-440(x10) # 8000f9d0 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 49050513 addi x10,x10,1168 # 80010030 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: ce852503 lw x10,-792(x10) # 8000f8b0 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 45250513 addi x10,x10,1106 # 80010032 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: da852503 lw x10,-600(x10) # 8000f9b0 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: dd850513 addi x10,x10,-552 # 8000fa18 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 3c650513 addi x10,x10,966 # 80010046 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: d1052503 lw x10,-752(x10) # 8000f9b8 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: d5850513 addi x10,x10,-680 # 8000fa18 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: d7d50513 addi x10,x10,-643 # 80010a7d +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: b8852503 lw x10,-1144(x10) # 8000f8b0 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: cd860613 addi x12,x12,-808 # 8000fa18 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: c4c52503 lw x10,-948(x10) # 8000f9b4 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: df350513 addi x10,x10,-525 # 80010b93 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: c3860613 addi x12,x12,-968 # 8000fa18 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: bac52503 lw x10,-1108(x10) # 8000f9b4 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: bf860613 addi x12,x12,-1032 # 8000fa18 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: b6c52503 lw x10,-1172(x10) # 8000f9b4 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: c1650513 addi x10,x10,-1002 # 80010a76 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: b7850513 addi x10,x10,-1160 # 8000fa18 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: bae50513 addi x10,x10,-1106 # 80010a8e +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 9a852503 lw x10,-1624(x10) # 8000f8b0 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: aa852503 lw x10,-1368(x10) # 8000f9c0 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: a9452503 lw x10,-1388(x10) # 8000f9c0 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: ad850513 addi x10,x10,-1320 # 8000fa18 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: a7052503 lw x10,-1424(x10) # 8000f9d8 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: b2550513 addi x10,x10,-1243 # 80010aa5 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 90852503 lw x10,-1784(x10) # 8000f8b0 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: a1052503 lw x10,-1520(x10) # 8000f9c8 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 9fc52503 lw x10,-1540(x10) # 8000f9c8 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: a3850513 addi x10,x10,-1480 # 8000fa18 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: a9c50513 addi x10,x10,-1380 # 80010abc +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 0000a517 auipc x10,0xa +8000604c: 98052503 lw x10,-1664(x10) # 8000f9c8 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 9b850513 addi x10,x10,-1608 # 8000fa18 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: a7a50513 addi x10,x10,-1414 # 80010b1a +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 90052503 lw x10,-1792(x10) # 8000f9c8 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 93850513 addi x10,x10,-1736 # 8000fa18 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 8d442403 lw x8,-1836(x8) # 8000f9e0 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: a9f50513 addi x10,x10,-1377 # 80010bbf +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: a8b50513 addi x10,x10,-1397 # 80010beb +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 0000a817 auipc x16,0xa +8000618c: 86080813 addi x16,x16,-1952 # 8000f9e8 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: e9050513 addi x10,x10,-368 # 80010030 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: a1b50513 addi x10,x10,-1509 # 80010bfb +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 00009517 auipc x10,0x9 +8000620c: 7c052503 lw x10,1984(x10) # 8000f9c8 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 00009517 auipc x10,0x9 +80006224: 7f850513 addi x10,x10,2040 # 8000fa18 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 9c650513 addi x10,x10,-1594 # 80010c26 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00009517 auipc x10,0x9 +8000628c: 73852503 lw x10,1848(x10) # 8000f9c0 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 00009517 auipc x10,0x9 +800062a4: 77850513 addi x10,x10,1912 # 8000fa18 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 00009317 auipc x6,0x9 +800062cc: 6f832303 lw x6,1784(x6) # 8000f9c0 +800062d0: 00009397 auipc x7,0x9 +800062d4: 6f83a383 lw x7,1784(x7) # 8000f9c8 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 97550513 addi x10,x10,-1675 # 80010c55 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 99d50513 addi x10,x10,-1635 # 80010cbd +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00009317 auipc x6,0x9 +8000634c: 67832303 lw x6,1656(x6) # 8000f9c0 +80006350: 00009397 auipc x7,0x9 +80006354: 6783a383 lw x7,1656(x7) # 8000f9c8 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 00009517 auipc x10,0x9 +80006384: 69850513 addi x10,x10,1688 # 8000fa18 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 92450513 addi x10,x10,-1756 # 80010ce4 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 88150513 addi x10,x10,-1919 # 80010c81 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 87d50513 addi x10,x10,-1923 # 80010cbd +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00009317 auipc x6,0x9 +8000646c: 56032303 lw x6,1376(x6) # 8000f9c8 +80006470: 00009397 auipc x7,0x9 +80006474: 5503a383 lw x7,1360(x7) # 8000f9c0 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 00009517 auipc x10,0x9 +800064a4: 57850513 addi x10,x10,1400 # 8000fa18 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 8ec50513 addi x10,x10,-1812 # 80010dcc +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 99350513 addi x10,x10,-1645 # 80010eb3 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 49c52503 lw x10,1180(x10) # 8000f9e4 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 96f50513 addi x10,x10,-1681 # 80010eef +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 90d50513 addi x10,x10,-1779 # 80010ecd +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 8d550513 addi x10,x10,-1835 # 80010ed5 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 89d50513 addi x10,x10,-1891 # 80010edd +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 86650513 addi x10,x10,-1946 # 80010ee6 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 83850513 addi x10,x10,-1992 # 80010ef8 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 2f852503 lw x10,760(x10) # 8000f9e0 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 90f50513 addi x10,x10,-1777 # 8001104f +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000a517 auipc x10,0xa +80006784: 79250513 addi x10,x10,1938 # 80010f12 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000a517 auipc x10,0xa +800067c4: 78350513 addi x10,x10,1923 # 80010f43 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000a517 auipc x10,0xa +80006804: 76350513 addi x10,x10,1891 # 80010f63 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000a517 auipc x10,0xa +80006844: 74150513 addi x10,x10,1857 # 80010f81 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000a517 auipc x10,0xa +80006884: 72050513 addi x10,x10,1824 # 80010fa0 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000a517 auipc x10,0xa +800068c4: 70850513 addi x10,x10,1800 # 80010fc8 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000a517 auipc x10,0xa +80006904: 6f450513 addi x10,x10,1780 # 80010ff4 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000a517 auipc x10,0xa +80006944: 6e050513 addi x10,x10,1760 # 80011020 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000a517 auipc x10,0xa +80006984: 6de50513 addi x10,x10,1758 # 8001105e +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: 02052503 lw x10,32(x10) # 8000f9c8 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: 05850513 addi x10,x10,88 # 8000fa18 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000a517 auipc x10,0xa +80006a04: 67550513 addi x10,x10,1653 # 80011075 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: f9852503 lw x10,-104(x10) # 8000f9c0 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: fd850513 addi x10,x10,-40 # 8000fa18 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: f7852503 lw x10,-136(x10) # 8000f9e0 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000a517 auipc x10,0xa +80006a84: 60c50513 addi x10,x10,1548 # 8001108c +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: f2052503 lw x10,-224(x10) # 8000f9c8 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 5e350513 addi x10,x10,1507 # 800110a3 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: ed852503 lw x10,-296(x10) # 8000f9c0 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: edc52503 lw x10,-292(x10) # 8000f9e0 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000a517 auipc x10,0xa +80006b24: 5f950513 addi x10,x10,1529 # 80011119 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 68f50513 addi x10,x10,1679 # 800111ef +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 74250513 addi x10,x10,1858 # 800112e2 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000a517 auipc x10,0xa +80006be4: 7fd50513 addi x10,x10,2045 # 800113dd +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 8a450513 addi x10,x10,-1884 # 800114c4 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 47150513 addi x10,x10,1137 # 800110d1 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: d7062603 lw x12,-656(x12) # 8000f9f8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 41a50513 addi x10,x10,1050 # 800100ba +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: d1850513 addi x10,x10,-744 # 8000fa18 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: d0058593 addi x11,x11,-768 # 8000fa40 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: d3458593 addi x11,x11,-716 # 8000faa0 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: 13e50513 addi x10,x10,318 # 8000fede +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: d9250513 addi x10,x10,-622 # 80010b72 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: be060613 addi x12,x12,-1056 # 8000f9f0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 2bb50513 addi x10,x10,699 # 800100db +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: bb052503 lw x10,-1104(x10) # 8000f9f8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: bb850513 addi x10,x10,-1096 # 8000fa18 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 24b50513 addi x10,x10,587 # 800100eb +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: b3852503 lw x10,-1224(x10) # 8000fa00 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: b3850513 addi x10,x10,-1224 # 8000fa18 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 1db50513 addi x10,x10,475 # 800100fb +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: ac052503 lw x10,-1344(x10) # 8000fa08 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: ab850513 addi x10,x10,-1352 # 8000fa18 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 16b50513 addi x10,x10,363 # 8001010b +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: a4852503 lw x10,-1464(x10) # 8000fa10 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: a3850513 addi x10,x10,-1480 # 8000fa18 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: 9e860613 addi x12,x12,-1560 # 8000f9f0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 9f860613 addi x12,x12,-1544 # 8000fa18 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3e030313 addi x6,x6,992 # 8000447c +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3c830313 addi x6,x6,968 # 8000447c +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3b030313 addi x6,x6,944 # 8000447c +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 24c78793 addi x15,x15,588 # 8000448c +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 15010113 addi x2,x2,336 # 800115f0 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010b9b .word 0x80010b9b +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 15828293 addi x5,x5,344 # 80020700 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 13828293 addi x5,x5,312 # 80020700 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-brev8-00.elf.objdump b/riscv-tests/rv32-Zbkb-brev8-00.elf.objdump new file mode 100644 index 0000000..4c36d95 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-brev8-00.elf.objdump @@ -0,0 +1,6272 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-brev8-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-brev8-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000125b0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016600 80016600 00017600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 00000894 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00018f0f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f8a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fad 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fc0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00018fe8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019071 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016600 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccNQ21e0.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b1 +80004592 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b2 +800045c4 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b3 +800045f6 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b4 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004628 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b5 +8000465a l .data 00000000 Zbkb_brev8_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b6 +8000468c l .data 00000000 Zbkb_brev8_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b7 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +800046be l .data 00000000 Zbkb_brev8_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b8 +800046f0 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b8_str +800001a8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b9 +80004722 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b9_str +800001cc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b10 +80004755 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b10_str +800001f0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b11 +80004789 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b11_str +80000214 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b12 +800047bd l .data 00000000 Zbkb_brev8_cg_cp_rs1_b12_str +80000240 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b13 +800047f1 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b13_str +80000264 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b14 +80004825 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b14_str +80000288 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b15 +80004859 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b15_str +800002ac l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b16 +8000488d l .data 00000000 Zbkb_brev8_cg_cp_rs1_b16_str +800002d0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b17 +800048c1 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b17_str +800002f4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b18 +800048f5 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b18_str +80000318 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b19 +80004929 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b19_str +8000033c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b20 +8000495d l .data 00000000 Zbkb_brev8_cg_cp_rs1_b20_str +80000360 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b21 +80004991 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b21_str +80000384 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b22 +800049c5 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b22_str +800003a8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b23 +800049f9 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b23_str +800003cc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b24 +80004a2d l .data 00000000 Zbkb_brev8_cg_cp_rs1_b24_str +800003f0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b25 +80004a61 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b25_str +80000414 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b26 +80004a95 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b26_str +80000438 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b27 +80004ac9 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b27_str +8000045c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b28 +80004afd l .data 00000000 Zbkb_brev8_cg_cp_rs1_b28_str +80000480 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b29 +80004b31 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b29_str +800004a8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b30 +80004b65 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_b31 +80004b99 l .data 00000000 Zbkb_brev8_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b0 +80004bcd l .data 00000000 Zbkb_brev8_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b1 +80004bff l .data 00000000 Zbkb_brev8_cg_cp_rd_b1_str +8000053c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b2 +80004c31 l .data 00000000 Zbkb_brev8_cg_cp_rd_b2_str +80000560 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b3 +80004c63 l .data 00000000 Zbkb_brev8_cg_cp_rd_b3_str +8000058c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b4 +80004c95 l .data 00000000 Zbkb_brev8_cg_cp_rd_b4_str +800005b0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b5 +80004cc7 l .data 00000000 Zbkb_brev8_cg_cp_rd_b5_str +800005d4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b6 +80004cf9 l .data 00000000 Zbkb_brev8_cg_cp_rd_b6_str +80000600 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b7 +80004d2b l .data 00000000 Zbkb_brev8_cg_cp_rd_b7_str +80000624 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b8 +80004d5d l .data 00000000 Zbkb_brev8_cg_cp_rd_b8_str +80000648 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b9 +80004d8f l .data 00000000 Zbkb_brev8_cg_cp_rd_b9_str +8000066c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b10 +80004dc1 l .data 00000000 Zbkb_brev8_cg_cp_rd_b10_str +80000690 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b11 +80004df4 l .data 00000000 Zbkb_brev8_cg_cp_rd_b11_str +800006b4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b12 +80004e27 l .data 00000000 Zbkb_brev8_cg_cp_rd_b12_str +800006d8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b13 +80004e5a l .data 00000000 Zbkb_brev8_cg_cp_rd_b13_str +800006fc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b14 +80004e8d l .data 00000000 Zbkb_brev8_cg_cp_rd_b14_str +80000720 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b15 +80004ec0 l .data 00000000 Zbkb_brev8_cg_cp_rd_b15_str +80000744 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b16 +80004ef3 l .data 00000000 Zbkb_brev8_cg_cp_rd_b16_str +8000076c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b17 +80004f26 l .data 00000000 Zbkb_brev8_cg_cp_rd_b17_str +80000790 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b18 +80004f59 l .data 00000000 Zbkb_brev8_cg_cp_rd_b18_str +800007b4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b19 +80004f8c l .data 00000000 Zbkb_brev8_cg_cp_rd_b19_str +800007d8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b20 +80004fbf l .data 00000000 Zbkb_brev8_cg_cp_rd_b20_str +80000800 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b21 +80004ff2 l .data 00000000 Zbkb_brev8_cg_cp_rd_b21_str +80000824 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b22 +80005025 l .data 00000000 Zbkb_brev8_cg_cp_rd_b22_str +80000848 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b23 +80005058 l .data 00000000 Zbkb_brev8_cg_cp_rd_b23_str +8000086c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b24 +8000508b l .data 00000000 Zbkb_brev8_cg_cp_rd_b24_str +80000890 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b25 +800050be l .data 00000000 Zbkb_brev8_cg_cp_rd_b25_str +800008b4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b26 +800050f1 l .data 00000000 Zbkb_brev8_cg_cp_rd_b26_str +800008d8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b27 +80005124 l .data 00000000 Zbkb_brev8_cg_cp_rd_b27_str +800008fc l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b28 +80005157 l .data 00000000 Zbkb_brev8_cg_cp_rd_b28_str +80000920 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b29 +8000518a l .data 00000000 Zbkb_brev8_cg_cp_rd_b29_str +80000944 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b30 +800051bd l .data 00000000 Zbkb_brev8_cg_cp_rd_b30_str +80000968 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rd_b31 +800051f0 l .data 00000000 Zbkb_brev8_cg_cp_rd_b31_str +8000098c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x0 +80005223 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x0_str +800009b0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x1 +8000525d l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x1_str +800009d4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x2 +80005297 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x2_str +800009f8 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x80000000 +800052d1 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x80000000_str +80000a1c l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x80000001 +80005312 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x80000001_str +80000a40 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x7fffffff +80005353 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x7fffffff_str +80000a64 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffe +80005394 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffe_str +80000a88 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xffffffff +800053d5 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xffffffff_str +80000aac l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe +80005416 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe_str +80000ad0 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x5bbc8872 +80005457 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x5bbc8872_str +80000af4 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaa +80005498 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b18 l .text.rvtest 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x55555555 +800054d9 l .data 00000000 Zbkb_brev8_cg_cp_rs1_edges_0x55555555_str +80000b3c l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b0 +8000551a l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b0_str +80000b64 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b1 +80005551 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b1_str +80000b88 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b2 +80005588 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b2_str +80000bac l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b3 +800055bf l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b3_str +80000bd8 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b4 +800055f6 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b4_str +80000bfc l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b5 +8000562d l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b5_str +80000c20 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b6 +80005664 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b6_str +80000c44 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b7 +8000569b l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b7_str +80000c68 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b8 +800056d2 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b8_str +80000c8c l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b9 +80005709 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b9_str +80000cb0 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b10 +80005740 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b10_str +80000cd4 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b11 +80005778 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b11_str +80000cfc l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b12 +800057b0 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b12_str +80000d28 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b13 +800057e8 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b13_str +80000d4c l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b14 +80005820 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b14_str +80000d70 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b15 +80005858 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b15_str +80000d94 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b16 +80005890 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b16_str +80000db8 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b17 +800058c8 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b17_str +80000de0 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b18 +80005900 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b18_str +80000e04 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b19 +80005938 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b19_str +80000e28 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b20 +80005970 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b20_str +80000e4c l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b21 +800059a8 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b21_str +80000e70 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b22 +800059e0 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b22_str +80000e94 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b23 +80005a18 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b23_str +80000ebc l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b24 +80005a51 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b24_str +80000ee0 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b25 +80005a8a l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b25_str +80000f04 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b26 +80005ac3 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b26_str +80000f28 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b27 +80005afc l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b27_str +80000f4c l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b28 +80005b35 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b28_str +80000f74 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b29 +80005b6e l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b29_str +80000f98 l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b30 +80005ba7 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b30_str +80000fbc l .text.rvtest 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b31 +80005be0 l .data 00000000 Zbkb_brev8_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fec l .text.rvtest 00000000 exit_Mcleanup +80000ff0 l .text.rvtest 00000000 resto_Medeleg +80000ff8 l .text.rvtest 00000000 resto_Msatp +80000ffc l .text.rvtest 00000000 resto_Mscratch +80001004 l .text.rvtest 00000000 resto_Mxtvec +80001018 l .text.rvtest 00000000 resto_Mtramp +8000101c l .text.rvtest 00000000 resto_Mloop +80001034 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +8000629f l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +800062d9 l .data 00000000 begin_debugstr +80006339 l .data 00000000 trap_sig_overflowstr +80006ee4 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007b48 l .data 00000000 trap_sigptr +80007b40 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000648d l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +800062fb l .data 00000000 abortstr +80006264 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +8000791b l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005d88 l .data 00000000 ascii_buffer +800063a2 l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005d68 l .data 00000000 saved_xepc +800165ac l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800064a4 l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800065a6 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800066a1 l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +80006794 l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006907 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005c20 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005c20 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005d48 l .data 00000000 failure_diag_type +80005d58 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005d50 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +8000688b l .data 00000000 sv_Mtval2_str +800068c9 l .data 00000000 sv_Mtinst_str +800064e4 l .data 00000000 sv_Svect_str +800065e4 l .data 00000000 sv_Scause_str +800066dd l .data 00000000 sv_Sepc_str +800067d1 l .data 00000000 sv_Stval_str +80006942 l .data 00000000 sv_Sip_str +80006524 l .data 00000000 sv_Hvect_str +80006622 l .data 00000000 sv_Hcause_str +80006719 l .data 00000000 sv_Hepc_str +8000680e l .data 00000000 sv_Htval_str +8000697d l .data 00000000 sv_Hip_str +80006565 l .data 00000000 sv_Vvect_str +80006661 l .data 00000000 sv_Vcause_str +80006756 l .data 00000000 sv_Vepc_str +8000684c l .data 00000000 sv_Vtval_str +800069b9 l .data 00000000 sv_Vip_str +800069f6 l .data 00000000 Mclr_Mext_int_str +80006a45 l .data 00000000 Mclr_Sext_int_str +80006b40 l .data 00000000 Sclr_Sext_int_str +80006c3c l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005d54 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +80006390 l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005d40 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800063a4 l .data 00000000 inststr +80005d20 l .data 00000000 failing_instruction +800063b8 l .data 00000000 addrstr +80005d28 l .data 00000000 failing_addr +80006def l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005d24 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +80006f05 l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80006de8 l .data 00000000 vxsatstr +80006e00 l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005d30 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80006e17 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005d38 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006e2e l .data 00000000 failure_diag_bad_instr_str +80006e8c l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +80006f31 l .data 00000000 trap_diag_header_str +80006f5d l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80006f6d l .data 00000000 trap_diag_expected_offset_str +80006f98 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +80006fc7 l .data 00000000 trap_diag_extra_traps_str +8000702f l .data 00000000 trap_diag_diff_bytes_str +80007056 l .data 00000000 trap_diag_extra_next_step_str +80006ff3 l .data 00000000 trap_diag_missing_traps_str +8000713e l .data 00000000 trap_diag_missing_next_step_str +80007225 l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +80007261 l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +8000723f l .data 00000000 trap_diag_mode_m_str +80007247 l .data 00000000 trap_diag_mode_s_str +8000724f l .data 00000000 trap_diag_mode_hs_str +80007258 l .data 00000000 trap_diag_mode_vs_str +8000726a l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800073c1 l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +80007284 l .data 00000000 trap_diag_field_vect_str +800072b5 l .data 00000000 trap_diag_field_cause_str +800072d5 l .data 00000000 trap_diag_field_epc_str +800072f3 l .data 00000000 trap_diag_field_tval_str +80007312 l .data 00000000 trap_diag_field_ip_str +8000733a l .data 00000000 trap_diag_field_tval2_str +80007366 l .data 00000000 trap_diag_field_tinst_str +80007392 l .data 00000000 trap_diag_field_intid_str +800073d0 l .data 00000000 trap_diag_expected_str +800073e7 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +800073fe l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +80007415 l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +8000748b l .data 00000000 trap_diag_hint_vect_str +80007561 l .data 00000000 trap_diag_hint_cause_str +80007654 l .data 00000000 trap_diag_hint_epc_str +8000774f l .data 00000000 trap_diag_hint_tval_str +80007836 l .data 00000000 trap_diag_hint_ip_str +80007443 l .data 00000000 trap_diag_generic_str +8000642c l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005db0 l .data 00000000 trap_excpt_name_tbl +80005e10 l .data 00000000 trap_int_name_tbl +8000624e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005d60 l .data 00000000 csr_context_ret_addr +8000644d l .data 00000000 mepcstr +8000645d l .data 00000000 mcausestr +80005d70 l .data 00000000 saved_xcause +8000646d l .data 00000000 mtvalstr +80005d78 l .data 00000000 saved_xtval +8000647d l .data 00000000 mstatusstr +80005d80 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007960 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006f0d l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005db0 l .data 00000000 end_failure_scratch +80005e50 l .data 00000000 trap_excpt_name_0 +80005e70 l .data 00000000 trap_excpt_name_1 +80005e8a l .data 00000000 trap_excpt_name_2 +80005e9f l .data 00000000 trap_excpt_name_3 +80005eab l .data 00000000 trap_excpt_name_4 +80005ec4 l .data 00000000 trap_excpt_name_5 +80005ed7 l .data 00000000 trap_excpt_name_6 +80005ef5 l .data 00000000 trap_excpt_name_7 +80005f0d l .data 00000000 trap_excpt_name_8 +80005f2b l .data 00000000 trap_excpt_name_9 +80005f49 l .data 00000000 trap_excpt_name_10 +80005f68 l .data 00000000 trap_excpt_name_11 +80005f86 l .data 00000000 trap_excpt_name_12 +80005f9e l .data 00000000 trap_excpt_name_13 +80005faf l .data 00000000 trap_excpt_name_14 +80005fbe l .data 00000000 trap_excpt_name_15 +80005fd4 l .data 00000000 trap_excpt_name_16 +80005fe1 l .data 00000000 trap_excpt_name_17 +80005ff0 l .data 00000000 trap_excpt_name_18 +80006000 l .data 00000000 trap_excpt_name_19 +80006010 l .data 00000000 trap_excpt_name_20 +8000602e l .data 00000000 trap_excpt_name_21 +80006045 l .data 00000000 trap_excpt_name_22 +8000605a l .data 00000000 trap_excpt_name_23 +80006076 l .data 00000000 trap_int_name_0 +8000608e l .data 00000000 trap_int_name_1 +800060ad l .data 00000000 trap_int_name_2 +800060d4 l .data 00000000 trap_int_name_3 +800060f0 l .data 00000000 trap_int_name_4 +80006108 l .data 00000000 trap_int_name_5 +80006124 l .data 00000000 trap_int_name_6 +80006148 l .data 00000000 trap_int_name_7 +80006161 l .data 00000000 trap_int_name_8 +80006179 l .data 00000000 trap_int_name_9 +80006198 l .data 00000000 trap_int_name_10 +800061bf l .data 00000000 trap_int_name_11 +800061db l .data 00000000 trap_int_name_12 +80006200 l .data 00000000 trap_int_name_13 +8000621c l .data 00000000 trap_int_name_14 +80006235 l .data 00000000 trap_int_name_15 +800063f9 l .data 00000000 xepcstr +80006a97 l .data 00000000 Mclr_Vext_int_str +80006af1 l .data 00000000 Sclr_Mext_int_str +80006b92 l .data 00000000 Sclr_Vext_int_str +80006bec l .data 00000000 Hclr_Mext_int_str +80006c8f l .data 00000000 Hclr_Vext_int_str +80006cea l .data 00000000 Vclr_Mext_int_str +80006d3a l .data 00000000 Vclr_Sext_int_str +80006d8d l .data 00000000 Vclr_Vext_int_str +8000742c l .data 00000000 trap_diag_curr_xepc_str +800165b0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800165b0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001034 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007960 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fdc g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007960 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +8000795f g .data 00000000 rvtest_data_end +80000fdc g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016700 g .tohost 00000000 fromhost +80016600 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd89413fe +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zbkb_brev8_cg_cp_rs1_b0: + brev8 x26, x0 # perform operation +80000048: 68705d13 brev8 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_brev8_cg_cp_rs1_b0, Zbkb_brev8_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01a20863 beq x4,x26,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xa66c5817 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zbkb_brev8_cg_cp_rs1_b1: + brev8 x9, x1 # perform operation +8000006c: 6870d493 brev8 x9,x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkb_brev8_cg_cp_rs1_b1, Zbkb_brev8_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 00920863 beq x4,x9,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004592 .word 0x80004592 +80000084: 00410113 addi x2,x2,4 + + mv x9, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010493 addi x9,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3da7b1f4 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zbkb_brev8_cg_cp_rs1_b2: + brev8 x19, x2 # perform operation +80000094: 68715993 brev8 x19,x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_brev8_cg_cp_rs1_b2, Zbkb_brev8_cg_cp_rs1_b2_str) +80000098: 0004a203 lw x4,0(x9) +8000009c: 01320863 beq x4,x19,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c4 .word 0x800045c4 +800000ac: 00448493 addi x9,x9,4 + + mv x30, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018f13 addi x30,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x18ee54c9 +800000b4: 000f2183 lw x3,0(x30) +800000b8: 004f0f13 addi x30,x30,4 + +800000bc : +Zbkb_brev8_cg_cp_rs1_b3: + brev8 x1, x3 # perform operation +800000bc: 6871d093 brev8 x1,x3 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_brev8_cg_cp_rs1_b3, Zbkb_brev8_cg_cp_rs1_b3_str) +800000c0: 0004a203 lw x4,0(x9) +800000c4: 00120863 beq x4,x1,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f6 .word 0x800045f6 +800000d4: 00448493 addi x9,x9,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0x9420627b +800000e0: 000f2203 lw x4,0(x30) +800000e4: 004f0f13 addi x30,x30,4 + +800000e8 : +Zbkb_brev8_cg_cp_rs1_b4: + brev8 x28, x4 # perform operation +800000e8: 68725e13 brev8 x28,x4 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_brev8_cg_cp_rs1_b4, Zbkb_brev8_cg_cp_rs1_b4_str) +800000ec: 0004a383 lw x7,0(x9) +800000f0: 01c38863 beq x7,x28,80000100 +800000f4: 7a50146f jal x8,80002098 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004628 .word 0x80004628 +80000100: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0xb03f501a +80000104: 000f2283 lw x5,0(x30) +80000108: 004f0f13 addi x30,x30,4 + +8000010c : +Zbkb_brev8_cg_cp_rs1_b5: + brev8 x25, x5 # perform operation +8000010c: 6872dc93 brev8 x25,x5 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_brev8_cg_cp_rs1_b5, Zbkb_brev8_cg_cp_rs1_b5_str) +80000110: 0004a383 lw x7,0(x9) +80000114: 01938863 beq x7,x25,80000124 +80000118: 7810146f jal x8,80002098 +8000011c: 8000010c .word 0x8000010c +80000120: 8000465a .word 0x8000465a +80000124: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0xf1f7c599 +80000128: 000f2303 lw x6,0(x30) +8000012c: 004f0f13 addi x30,x30,4 + +80000130 : +Zbkb_brev8_cg_cp_rs1_b6: + brev8 x2, x6 # perform operation +80000130: 68735113 brev8 x2,x6 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_brev8_cg_cp_rs1_b6, Zbkb_brev8_cg_cp_rs1_b6_str) +80000134: 0004a383 lw x7,0(x9) +80000138: 00238863 beq x7,x2,80000148 +8000013c: 75d0146f jal x8,80002098 +80000140: 80000130 .word 0x80000130 +80000144: 8000468c .word 0x8000468c +80000148: 00448493 addi x9,x9,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000014c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000150: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x30fa2080 +80000154: 000f2383 lw x7,0(x30) +80000158: 004f0f13 addi x30,x30,4 + +8000015c : +Zbkb_brev8_cg_cp_rs1_b7: + brev8 x28, x7 # perform operation +8000015c: 6873de13 brev8 x28,x7 + # Check if x28 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x28, Zbkb_brev8_cg_cp_rs1_b7, Zbkb_brev8_cg_cp_rs1_b7_str) +80000160: 0004a683 lw x13,0(x9) +80000164: 01c68863 beq x13,x28,80000174 +80000168: 7590176f jal x14,800020c0 +8000016c: 8000015c .word 0x8000015c +80000170: 800046be .word 0x800046be +80000174: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x461f30f9 +80000178: 000f2403 lw x8,0(x30) +8000017c: 004f0f13 addi x30,x30,4 + +80000180 : +Zbkb_brev8_cg_cp_rs1_b8: + brev8 x6, x8 # perform operation +80000180: 68745313 brev8 x6,x8 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zbkb_brev8_cg_cp_rs1_b8, Zbkb_brev8_cg_cp_rs1_b8_str) +80000184: 0004a683 lw x13,0(x9) +80000188: 00668863 beq x13,x6,80000198 +8000018c: 7350176f jal x14,800020c0 +80000190: 80000180 .word 0x80000180 +80000194: 800046f0 .word 0x800046f0 +80000198: 00448493 addi x9,x9,4 + + mv x2, x9 # switch signature pointer register to avoid conflict with test +8000019c: 00048113 addi x2,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x1827b1b0 +800001a0: 000f2483 lw x9,0(x30) +800001a4: 004f0f13 addi x30,x30,4 + +800001a8 : +Zbkb_brev8_cg_cp_rs1_b9: + brev8 x21, x9 # perform operation +800001a8: 6874da93 brev8 x21,x9 + # Check if x21 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x21, Zbkb_brev8_cg_cp_rs1_b9, Zbkb_brev8_cg_cp_rs1_b9_str) +800001ac: 00012683 lw x13,0(x2) +800001b0: 01568863 beq x13,x21,800001c0 +800001b4: 70d0176f jal x14,800020c0 +800001b8: 800001a8 .word 0x800001a8 +800001bc: 80004722 .word 0x80004722 +800001c0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x71ae498f +800001c4: 000f2503 lw x10,0(x30) +800001c8: 004f0f13 addi x30,x30,4 + +800001cc : +Zbkb_brev8_cg_cp_rs1_b10: + brev8 x8, x10 # perform operation +800001cc: 68755413 brev8 x8,x10 + # Check if x8 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x8, Zbkb_brev8_cg_cp_rs1_b10, Zbkb_brev8_cg_cp_rs1_b10_str) +800001d0: 00012683 lw x13,0(x2) +800001d4: 00868863 beq x13,x8,800001e4 +800001d8: 6e90176f jal x14,800020c0 +800001dc: 800001cc .word 0x800001cc +800001e0: 80004755 .word 0x80004755 +800001e4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x53418846 +800001e8: 000f2583 lw x11,0(x30) +800001ec: 004f0f13 addi x30,x30,4 + +800001f0 : +Zbkb_brev8_cg_cp_rs1_b11: + brev8 x27, x11 # perform operation +800001f0: 6875dd93 brev8 x27,x11 + # Check if x27 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x27, Zbkb_brev8_cg_cp_rs1_b11, Zbkb_brev8_cg_cp_rs1_b11_str) +800001f4: 00012683 lw x13,0(x2) +800001f8: 01b68863 beq x13,x27,80000208 +800001fc: 6c50176f jal x14,800020c0 +80000200: 800001f0 .word 0x800001f0 +80000204: 80004789 .word 0x80004789 +80000208: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x2792d21f +8000020c: 000f2603 lw x12,0(x30) +80000210: 004f0f13 addi x30,x30,4 + +80000214 : +Zbkb_brev8_cg_cp_rs1_b12: + brev8 x24, x12 # perform operation +80000214: 68765c13 brev8 x24,x12 + # Check if x24 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x24, Zbkb_brev8_cg_cp_rs1_b12, Zbkb_brev8_cg_cp_rs1_b12_str) +80000218: 00012683 lw x13,0(x2) +8000021c: 01868863 beq x13,x24,8000022c +80000220: 6a10176f jal x14,800020c0 +80000224: 80000214 .word 0x80000214 +80000228: 800047bd .word 0x800047bd +8000022c: 00410113 addi x2,x2,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000230: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000234: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x4def614c +80000238: 000f2683 lw x13,0(x30) +8000023c: 004f0f13 addi x30,x30,4 + +80000240 : +Zbkb_brev8_cg_cp_rs1_b13: + brev8 x23, x13 # perform operation +80000240: 6876db93 brev8 x23,x13 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkb_brev8_cg_cp_rs1_b13, Zbkb_brev8_cg_cp_rs1_b13_str) +80000244: 00012203 lw x4,0(x2) +80000248: 01720863 beq x4,x23,80000258 +8000024c: 635012ef jal x5,80002080 +80000250: 80000240 .word 0x80000240 +80000254: 800047f1 .word 0x800047f1 +80000258: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x9b4771f8 +8000025c: 000f2703 lw x14,0(x30) +80000260: 004f0f13 addi x30,x30,4 + +80000264 : +Zbkb_brev8_cg_cp_rs1_b14: + brev8 x0, x14 # perform operation +80000264: 68775013 brev8 x0,x14 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_brev8_cg_cp_rs1_b14, Zbkb_brev8_cg_cp_rs1_b14_str) +80000268: 00012203 lw x4,0(x2) +8000026c: 00020863 beq x4,x0,8000027c +80000270: 611012ef jal x5,80002080 +80000274: 80000264 .word 0x80000264 +80000278: 80004825 .word 0x80004825 +8000027c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x3dbd3277 +80000280: 000f2783 lw x15,0(x30) +80000284: 004f0f13 addi x30,x30,4 + +80000288 : +Zbkb_brev8_cg_cp_rs1_b15: + brev8 x25, x15 # perform operation +80000288: 6877dc93 brev8 x25,x15 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_b15, Zbkb_brev8_cg_cp_rs1_b15_str) +8000028c: 00012203 lw x4,0(x2) +80000290: 01920863 beq x4,x25,800002a0 +80000294: 5ed012ef jal x5,80002080 +80000298: 80000288 .word 0x80000288 +8000029c: 80004859 .word 0x80004859 +800002a0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x9b40bd42 +800002a4: 000f2803 lw x16,0(x30) +800002a8: 004f0f13 addi x30,x30,4 + +800002ac : +Zbkb_brev8_cg_cp_rs1_b16: + brev8 x18, x16 # perform operation +800002ac: 68785913 brev8 x18,x16 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zbkb_brev8_cg_cp_rs1_b16, Zbkb_brev8_cg_cp_rs1_b16_str) +800002b0: 00012203 lw x4,0(x2) +800002b4: 01220863 beq x4,x18,800002c4 +800002b8: 5c9012ef jal x5,80002080 +800002bc: 800002ac .word 0x800002ac +800002c0: 8000488d .word 0x8000488d +800002c4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xce64c80c +800002c8: 000f2883 lw x17,0(x30) +800002cc: 004f0f13 addi x30,x30,4 + +800002d0 : +Zbkb_brev8_cg_cp_rs1_b17: + brev8 x1, x17 # perform operation +800002d0: 6878d093 brev8 x1,x17 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_brev8_cg_cp_rs1_b17, Zbkb_brev8_cg_cp_rs1_b17_str) +800002d4: 00012203 lw x4,0(x2) +800002d8: 00120863 beq x4,x1,800002e8 +800002dc: 5a5012ef jal x5,80002080 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 800048c1 .word 0x800048c1 +800002e8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x56b98dd5 +800002ec: 000f2903 lw x18,0(x30) +800002f0: 004f0f13 addi x30,x30,4 + +800002f4 : +Zbkb_brev8_cg_cp_rs1_b18: + brev8 x13, x18 # perform operation +800002f4: 68795693 brev8 x13,x18 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_brev8_cg_cp_rs1_b18, Zbkb_brev8_cg_cp_rs1_b18_str) +800002f8: 00012203 lw x4,0(x2) +800002fc: 00d20863 beq x4,x13,8000030c +80000300: 581012ef jal x5,80002080 +80000304: 800002f4 .word 0x800002f4 +80000308: 800048f5 .word 0x800048f5 +8000030c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x8975f649 +80000310: 000f2983 lw x19,0(x30) +80000314: 004f0f13 addi x30,x30,4 + +80000318 : +Zbkb_brev8_cg_cp_rs1_b19: + brev8 x7, x19 # perform operation +80000318: 6879d393 brev8 x7,x19 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkb_brev8_cg_cp_rs1_b19, Zbkb_brev8_cg_cp_rs1_b19_str) +8000031c: 00012203 lw x4,0(x2) +80000320: 00720863 beq x4,x7,80000330 +80000324: 55d012ef jal x5,80002080 +80000328: 80000318 .word 0x80000318 +8000032c: 80004929 .word 0x80004929 +80000330: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0xad509f1e +80000334: 000f2a03 lw x20,0(x30) +80000338: 004f0f13 addi x30,x30,4 + +8000033c : +Zbkb_brev8_cg_cp_rs1_b20: + brev8 x12, x20 # perform operation +8000033c: 687a5613 brev8 x12,x20 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkb_brev8_cg_cp_rs1_b20, Zbkb_brev8_cg_cp_rs1_b20_str) +80000340: 00012203 lw x4,0(x2) +80000344: 00c20863 beq x4,x12,80000354 +80000348: 539012ef jal x5,80002080 +8000034c: 8000033c .word 0x8000033c +80000350: 8000495d .word 0x8000495d +80000354: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x2b4ead8a +80000358: 000f2a83 lw x21,0(x30) +8000035c: 004f0f13 addi x30,x30,4 + +80000360 : +Zbkb_brev8_cg_cp_rs1_b21: + brev8 x22, x21 # perform operation +80000360: 687adb13 brev8 x22,x21 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkb_brev8_cg_cp_rs1_b21, Zbkb_brev8_cg_cp_rs1_b21_str) +80000364: 00012203 lw x4,0(x2) +80000368: 01620863 beq x4,x22,80000378 +8000036c: 515012ef jal x5,80002080 +80000370: 80000360 .word 0x80000360 +80000374: 80004991 .word 0x80004991 +80000378: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xbaba30b1 +8000037c: 000f2b03 lw x22,0(x30) +80000380: 004f0f13 addi x30,x30,4 + +80000384 : +Zbkb_brev8_cg_cp_rs1_b22: + brev8 x16, x22 # perform operation +80000384: 687b5813 brev8 x16,x22 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkb_brev8_cg_cp_rs1_b22, Zbkb_brev8_cg_cp_rs1_b22_str) +80000388: 00012203 lw x4,0(x2) +8000038c: 01020863 beq x4,x16,8000039c +80000390: 4f1012ef jal x5,80002080 +80000394: 80000384 .word 0x80000384 +80000398: 800049c5 .word 0x800049c5 +8000039c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x0339a49c +800003a0: 000f2b83 lw x23,0(x30) +800003a4: 004f0f13 addi x30,x30,4 + +800003a8 : +Zbkb_brev8_cg_cp_rs1_b23: + brev8 x3, x23 # perform operation +800003a8: 687bd193 brev8 x3,x23 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zbkb_brev8_cg_cp_rs1_b23, Zbkb_brev8_cg_cp_rs1_b23_str) +800003ac: 00012203 lw x4,0(x2) +800003b0: 00320863 beq x4,x3,800003c0 +800003b4: 4cd012ef jal x5,80002080 +800003b8: 800003a8 .word 0x800003a8 +800003bc: 800049f9 .word 0x800049f9 +800003c0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0xff5b83d3 +800003c4: 000f2c03 lw x24,0(x30) +800003c8: 004f0f13 addi x30,x30,4 + +800003cc : +Zbkb_brev8_cg_cp_rs1_b24: + brev8 x17, x24 # perform operation +800003cc: 687c5893 brev8 x17,x24 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkb_brev8_cg_cp_rs1_b24, Zbkb_brev8_cg_cp_rs1_b24_str) +800003d0: 00012203 lw x4,0(x2) +800003d4: 01120863 beq x4,x17,800003e4 +800003d8: 4a9012ef jal x5,80002080 +800003dc: 800003cc .word 0x800003cc +800003e0: 80004a2d .word 0x80004a2d +800003e4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xd475664c +800003e8: 000f2c83 lw x25,0(x30) +800003ec: 004f0f13 addi x30,x30,4 + +800003f0 : +Zbkb_brev8_cg_cp_rs1_b25: + brev8 x27, x25 # perform operation +800003f0: 687cdd93 brev8 x27,x25 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_b25, Zbkb_brev8_cg_cp_rs1_b25_str) +800003f4: 00012203 lw x4,0(x2) +800003f8: 01b20863 beq x4,x27,80000408 +800003fc: 485012ef jal x5,80002080 +80000400: 800003f0 .word 0x800003f0 +80000404: 80004a61 .word 0x80004a61 +80000408: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x1bfa8e3f +8000040c: 000f2d03 lw x26,0(x30) +80000410: 004f0f13 addi x30,x30,4 + +80000414 : +Zbkb_brev8_cg_cp_rs1_b26: + brev8 x28, x26 # perform operation +80000414: 687d5e13 brev8 x28,x26 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_brev8_cg_cp_rs1_b26, Zbkb_brev8_cg_cp_rs1_b26_str) +80000418: 00012203 lw x4,0(x2) +8000041c: 01c20863 beq x4,x28,8000042c +80000420: 461012ef jal x5,80002080 +80000424: 80000414 .word 0x80000414 +80000428: 80004a95 .word 0x80004a95 +8000042c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x4bfa624b +80000430: 000f2d83 lw x27,0(x30) +80000434: 004f0f13 addi x30,x30,4 + +80000438 : +Zbkb_brev8_cg_cp_rs1_b27: + brev8 x29, x27 # perform operation +80000438: 687dde93 brev8 x29,x27 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_brev8_cg_cp_rs1_b27, Zbkb_brev8_cg_cp_rs1_b27_str) +8000043c: 00012203 lw x4,0(x2) +80000440: 01d20863 beq x4,x29,80000450 +80000444: 43d012ef jal x5,80002080 +80000448: 80000438 .word 0x80000438 +8000044c: 80004ac9 .word 0x80004ac9 +80000450: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x73a602cd +80000454: 000f2e03 lw x28,0(x30) +80000458: 004f0f13 addi x30,x30,4 + +8000045c : +Zbkb_brev8_cg_cp_rs1_b28: + brev8 x27, x28 # perform operation +8000045c: 687e5d93 brev8 x27,x28 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_b28, Zbkb_brev8_cg_cp_rs1_b28_str) +80000460: 00012203 lw x4,0(x2) +80000464: 01b20863 beq x4,x27,80000474 +80000468: 419012ef jal x5,80002080 +8000046c: 8000045c .word 0x8000045c +80000470: 80004afd .word 0x80004afd +80000474: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xf8d39593 +80000478: 000f2e83 lw x29,0(x30) +8000047c: 004f0f13 addi x30,x30,4 + +80000480 : +Zbkb_brev8_cg_cp_rs1_b29: + brev8 x6, x29 # perform operation +80000480: 687ed313 brev8 x6,x29 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zbkb_brev8_cg_cp_rs1_b29, Zbkb_brev8_cg_cp_rs1_b29_str) +80000484: 00012203 lw x4,0(x2) +80000488: 00620863 beq x4,x6,80000498 +8000048c: 3f5012ef jal x5,80002080 +80000490: 80000480 .word 0x80000480 +80000494: 80004b31 .word 0x80004b31 +80000498: 00410113 addi x2,x2,4 + + mv x17, x30 # switch data pointer register to avoid conflict with test +8000049c: 000f0893 addi x17,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xff2b2478 +800004a0: 0008af03 lw x30,0(x17) +800004a4: 00488893 addi x17,x17,4 + +800004a8 : +Zbkb_brev8_cg_cp_rs1_b30: + brev8 x13, x30 # perform operation +800004a8: 687f5693 brev8 x13,x30 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_brev8_cg_cp_rs1_b30, Zbkb_brev8_cg_cp_rs1_b30_str) +800004ac: 00012203 lw x4,0(x2) +800004b0: 00d20863 beq x4,x13,800004c0 +800004b4: 3cd012ef jal x5,80002080 +800004b8: 800004a8 .word 0x800004a8 +800004bc: 80004b65 .word 0x80004b65 +800004c0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xc0053a1f +800004c4: 0008af83 lw x31,0(x17) +800004c8: 00488893 addi x17,x17,4 + +800004cc : +Zbkb_brev8_cg_cp_rs1_b31: + brev8 x11, x31 # perform operation +800004cc: 687fd593 brev8 x11,x31 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_brev8_cg_cp_rs1_b31, Zbkb_brev8_cg_cp_rs1_b31_str) +800004d0: 00012203 lw x4,0(x2) +800004d4: 00b20863 beq x4,x11,800004e4 +800004d8: 3a9012ef jal x5,80002080 +800004dc: 800004cc .word 0x800004cc +800004e0: 80004b99 .word 0x80004b99 +800004e4: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x74177a81 +800004e8: 0008a603 lw x12,0(x17) +800004ec: 00488893 addi x17,x17,4 + +800004f0 : +Zbkb_brev8_cg_cp_rd_b0: + brev8 x0, x12 # perform operation +800004f0: 68765013 brev8 x0,x12 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_brev8_cg_cp_rd_b0, Zbkb_brev8_cg_cp_rd_b0_str) +800004f4: 00012203 lw x4,0(x2) +800004f8: 00020863 beq x4,x0,80000508 +800004fc: 385012ef jal x5,80002080 +80000500: 800004f0 .word 0x800004f0 +80000504: 80004bcd .word 0x80004bcd +80000508: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xfc68f9fc +8000050c: 0008af03 lw x30,0(x17) +80000510: 00488893 addi x17,x17,4 + +80000514 : +Zbkb_brev8_cg_cp_rd_b1: + brev8 x1, x30 # perform operation +80000514: 687f5093 brev8 x1,x30 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_brev8_cg_cp_rd_b1, Zbkb_brev8_cg_cp_rd_b1_str) +80000518: 00012203 lw x4,0(x2) +8000051c: 00120863 beq x4,x1,8000052c +80000520: 361012ef jal x5,80002080 +80000524: 80000514 .word 0x80000514 +80000528: 80004bff .word 0x80004bff +8000052c: 00410113 addi x2,x2,4 + + mv x1, x2 # switch signature pointer register to avoid conflict with test +80000530: 00010093 addi x1,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xa5c0a9f9 +80000534: 0008a483 lw x9,0(x17) +80000538: 00488893 addi x17,x17,4 + +8000053c : +Zbkb_brev8_cg_cp_rd_b2: + brev8 x2, x9 # perform operation +8000053c: 6874d113 brev8 x2,x9 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_brev8_cg_cp_rd_b2, Zbkb_brev8_cg_cp_rd_b2_str) +80000540: 0000a203 lw x4,0(x1) +80000544: 00220863 beq x4,x2,80000554 +80000548: 339012ef jal x5,80002080 +8000054c: 8000053c .word 0x8000053c +80000550: 80004c31 .word 0x80004c31 +80000554: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xe1b1f4d8 +80000558: 0008a603 lw x12,0(x17) +8000055c: 00488893 addi x17,x17,4 + +80000560 : +Zbkb_brev8_cg_cp_rd_b3: + brev8 x3, x12 # perform operation +80000560: 68765193 brev8 x3,x12 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_brev8_cg_cp_rd_b3, Zbkb_brev8_cg_cp_rd_b3_str) +80000564: 0000a203 lw x4,0(x1) +80000568: 00320863 beq x4,x3,80000578 +8000056c: 315012ef jal x5,80002080 +80000570: 80000560 .word 0x80000560 +80000574: 80004c63 .word 0x80004c63 +80000578: 00408093 addi x1,x1,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000057c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000580: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x9a2a690f +80000584: 0008a703 lw x14,0(x17) +80000588: 00488893 addi x17,x17,4 + +8000058c : +Zbkb_brev8_cg_cp_rd_b4: + brev8 x4, x14 # perform operation +8000058c: 68775213 brev8 x4,x14 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zbkb_brev8_cg_cp_rd_b4, Zbkb_brev8_cg_cp_rd_b4_str) +80000590: 0000a383 lw x7,0(x1) +80000594: 00438863 beq x7,x4,800005a4 +80000598: 3010146f jal x8,80002098 +8000059c: 8000058c .word 0x8000058c +800005a0: 80004c95 .word 0x80004c95 +800005a4: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xaa26bffb +800005a8: 0008ab03 lw x22,0(x17) +800005ac: 00488893 addi x17,x17,4 + +800005b0 : +Zbkb_brev8_cg_cp_rd_b5: + brev8 x5, x22 # perform operation +800005b0: 687b5293 brev8 x5,x22 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zbkb_brev8_cg_cp_rd_b5, Zbkb_brev8_cg_cp_rd_b5_str) +800005b4: 0000a383 lw x7,0(x1) +800005b8: 00538863 beq x7,x5,800005c8 +800005bc: 2dd0146f jal x8,80002098 +800005c0: 800005b0 .word 0x800005b0 +800005c4: 80004cc7 .word 0x80004cc7 +800005c8: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x07c1f497 +800005cc: 0008a283 lw x5,0(x17) +800005d0: 00488893 addi x17,x17,4 + +800005d4 : +Zbkb_brev8_cg_cp_rd_b6: + brev8 x6, x5 # perform operation +800005d4: 6872d313 brev8 x6,x5 + # Check if x6 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x6, Zbkb_brev8_cg_cp_rd_b6, Zbkb_brev8_cg_cp_rd_b6_str) +800005d8: 0000a383 lw x7,0(x1) +800005dc: 00638863 beq x7,x6,800005ec +800005e0: 2b90146f jal x8,80002098 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 80004cf9 .word 0x80004cf9 +800005ec: 00408093 addi x1,x1,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005f0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005f4: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x79a1081c +800005f8: 0008a583 lw x11,0(x17) +800005fc: 00488893 addi x17,x17,4 + +80000600 : +Zbkb_brev8_cg_cp_rd_b7: + brev8 x7, x11 # perform operation +80000600: 6875d393 brev8 x7,x11 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_brev8_cg_cp_rd_b7, Zbkb_brev8_cg_cp_rd_b7_str) +80000604: 0000a203 lw x4,0(x1) +80000608: 00720863 beq x4,x7,80000618 +8000060c: 275012ef jal x5,80002080 +80000610: 80000600 .word 0x80000600 +80000614: 80004d2b .word 0x80004d2b +80000618: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x82d22fba +8000061c: 0008af83 lw x31,0(x17) +80000620: 00488893 addi x17,x17,4 + +80000624 : +Zbkb_brev8_cg_cp_rd_b8: + brev8 x8, x31 # perform operation +80000624: 687fd413 brev8 x8,x31 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_brev8_cg_cp_rd_b8, Zbkb_brev8_cg_cp_rd_b8_str) +80000628: 0000a203 lw x4,0(x1) +8000062c: 00820863 beq x4,x8,8000063c +80000630: 251012ef jal x5,80002080 +80000634: 80000624 .word 0x80000624 +80000638: 80004d5d .word 0x80004d5d +8000063c: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x6ebcb2b6 +80000640: 0008a383 lw x7,0(x17) +80000644: 00488893 addi x17,x17,4 + +80000648 : +Zbkb_brev8_cg_cp_rd_b9: + brev8 x9, x7 # perform operation +80000648: 6873d493 brev8 x9,x7 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_brev8_cg_cp_rd_b9, Zbkb_brev8_cg_cp_rd_b9_str) +8000064c: 0000a203 lw x4,0(x1) +80000650: 00920863 beq x4,x9,80000660 +80000654: 22d012ef jal x5,80002080 +80000658: 80000648 .word 0x80000648 +8000065c: 80004d8f .word 0x80004d8f +80000660: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x9642d315 +80000664: 0008ac03 lw x24,0(x17) +80000668: 00488893 addi x17,x17,4 + +8000066c : +Zbkb_brev8_cg_cp_rd_b10: + brev8 x10, x24 # perform operation +8000066c: 687c5513 brev8 x10,x24 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zbkb_brev8_cg_cp_rd_b10, Zbkb_brev8_cg_cp_rd_b10_str) +80000670: 0000a203 lw x4,0(x1) +80000674: 00a20863 beq x4,x10,80000684 +80000678: 209012ef jal x5,80002080 +8000067c: 8000066c .word 0x8000066c +80000680: 80004dc1 .word 0x80004dc1 +80000684: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x45c601ae +80000688: 0008a603 lw x12,0(x17) +8000068c: 00488893 addi x17,x17,4 + +80000690 : +Zbkb_brev8_cg_cp_rd_b11: + brev8 x11, x12 # perform operation +80000690: 68765593 brev8 x11,x12 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_brev8_cg_cp_rd_b11, Zbkb_brev8_cg_cp_rd_b11_str) +80000694: 0000a203 lw x4,0(x1) +80000698: 00b20863 beq x4,x11,800006a8 +8000069c: 1e5012ef jal x5,80002080 +800006a0: 80000690 .word 0x80000690 +800006a4: 80004df4 .word 0x80004df4 +800006a8: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x3d672c38 +800006ac: 0008ab03 lw x22,0(x17) +800006b0: 00488893 addi x17,x17,4 + +800006b4 : +Zbkb_brev8_cg_cp_rd_b12: + brev8 x12, x22 # perform operation +800006b4: 687b5613 brev8 x12,x22 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_brev8_cg_cp_rd_b12, Zbkb_brev8_cg_cp_rd_b12_str) +800006b8: 0000a203 lw x4,0(x1) +800006bc: 00c20863 beq x4,x12,800006cc +800006c0: 1c1012ef jal x5,80002080 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 80004e27 .word 0x80004e27 +800006cc: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xada99516 +800006d0: 0008ad03 lw x26,0(x17) +800006d4: 00488893 addi x17,x17,4 + +800006d8 : +Zbkb_brev8_cg_cp_rd_b13: + brev8 x13, x26 # perform operation +800006d8: 687d5693 brev8 x13,x26 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_brev8_cg_cp_rd_b13, Zbkb_brev8_cg_cp_rd_b13_str) +800006dc: 0000a203 lw x4,0(x1) +800006e0: 00d20863 beq x4,x13,800006f0 +800006e4: 19d012ef jal x5,80002080 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80004e5a .word 0x80004e5a +800006f0: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xe381ec31 +800006f4: 0008ab03 lw x22,0(x17) +800006f8: 00488893 addi x17,x17,4 + +800006fc : +Zbkb_brev8_cg_cp_rd_b14: + brev8 x14, x22 # perform operation +800006fc: 687b5713 brev8 x14,x22 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_brev8_cg_cp_rd_b14, Zbkb_brev8_cg_cp_rd_b14_str) +80000700: 0000a203 lw x4,0(x1) +80000704: 00e20863 beq x4,x14,80000714 +80000708: 179012ef jal x5,80002080 +8000070c: 800006fc .word 0x800006fc +80000710: 80004e8d .word 0x80004e8d +80000714: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x034c7a14 +80000718: 0008ad03 lw x26,0(x17) +8000071c: 00488893 addi x17,x17,4 + +80000720 : +Zbkb_brev8_cg_cp_rd_b15: + brev8 x15, x26 # perform operation +80000720: 687d5793 brev8 x15,x26 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_brev8_cg_cp_rd_b15, Zbkb_brev8_cg_cp_rd_b15_str) +80000724: 0000a203 lw x4,0(x1) +80000728: 00f20863 beq x4,x15,80000738 +8000072c: 155012ef jal x5,80002080 +80000730: 80000720 .word 0x80000720 +80000734: 80004ec0 .word 0x80004ec0 +80000738: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x08754fb0 +8000073c: 0008a683 lw x13,0(x17) +80000740: 00488893 addi x17,x17,4 + +80000744 : +Zbkb_brev8_cg_cp_rd_b16: + brev8 x16, x13 # perform operation +80000744: 6876d813 brev8 x16,x13 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_brev8_cg_cp_rd_b16, Zbkb_brev8_cg_cp_rd_b16_str) +80000748: 0000a203 lw x4,0(x1) +8000074c: 01020863 beq x4,x16,8000075c +80000750: 131012ef jal x5,80002080 +80000754: 80000744 .word 0x80000744 +80000758: 80004ef3 .word 0x80004ef3 +8000075c: 00408093 addi x1,x1,4 + + mv x21, x17 # switch data pointer register to avoid conflict with test +80000760: 00088a93 addi x21,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x7679a772 +80000764: 000aab03 lw x22,0(x21) +80000768: 004a8a93 addi x21,x21,4 + +8000076c : +Zbkb_brev8_cg_cp_rd_b17: + brev8 x17, x22 # perform operation +8000076c: 687b5893 brev8 x17,x22 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_brev8_cg_cp_rd_b17, Zbkb_brev8_cg_cp_rd_b17_str) +80000770: 0000a203 lw x4,0(x1) +80000774: 01120863 beq x4,x17,80000784 +80000778: 109012ef jal x5,80002080 +8000077c: 8000076c .word 0x8000076c +80000780: 80004f26 .word 0x80004f26 +80000784: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x55976b04 +80000788: 000aa303 lw x6,0(x21) +8000078c: 004a8a93 addi x21,x21,4 + +80000790 : +Zbkb_brev8_cg_cp_rd_b18: + brev8 x18, x6 # perform operation +80000790: 68735913 brev8 x18,x6 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_brev8_cg_cp_rd_b18, Zbkb_brev8_cg_cp_rd_b18_str) +80000794: 0000a203 lw x4,0(x1) +80000798: 01220863 beq x4,x18,800007a8 +8000079c: 0e5012ef jal x5,80002080 +800007a0: 80000790 .word 0x80000790 +800007a4: 80004f59 .word 0x80004f59 +800007a8: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xf3987e7a +800007ac: 000aae83 lw x29,0(x21) +800007b0: 004a8a93 addi x21,x21,4 + +800007b4 : +Zbkb_brev8_cg_cp_rd_b19: + brev8 x19, x29 # perform operation +800007b4: 687ed993 brev8 x19,x29 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_brev8_cg_cp_rd_b19, Zbkb_brev8_cg_cp_rd_b19_str) +800007b8: 0000a203 lw x4,0(x1) +800007bc: 01320863 beq x4,x19,800007cc +800007c0: 0c1012ef jal x5,80002080 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80004f8c .word 0x80004f8c +800007cc: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x0df1b062 +800007d0: 000aa803 lw x16,0(x21) +800007d4: 004a8a93 addi x21,x21,4 + +800007d8 : +Zbkb_brev8_cg_cp_rd_b20: + brev8 x20, x16 # perform operation +800007d8: 68785a13 brev8 x20,x16 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_brev8_cg_cp_rd_b20, Zbkb_brev8_cg_cp_rd_b20_str) +800007dc: 0000a203 lw x4,0(x1) +800007e0: 01420863 beq x4,x20,800007f0 +800007e4: 09d012ef jal x5,80002080 +800007e8: 800007d8 .word 0x800007d8 +800007ec: 80004fbf .word 0x80004fbf +800007f0: 00408093 addi x1,x1,4 + + mv x12, x21 # switch data pointer register to avoid conflict with test +800007f4: 000a8613 addi x12,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x135e215a +800007f8: 00062a03 lw x20,0(x12) +800007fc: 00460613 addi x12,x12,4 + +80000800 : +Zbkb_brev8_cg_cp_rd_b21: + brev8 x21, x20 # perform operation +80000800: 687a5a93 brev8 x21,x20 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_brev8_cg_cp_rd_b21, Zbkb_brev8_cg_cp_rd_b21_str) +80000804: 0000a203 lw x4,0(x1) +80000808: 01520863 beq x4,x21,80000818 +8000080c: 075012ef jal x5,80002080 +80000810: 80000800 .word 0x80000800 +80000814: 80004ff2 .word 0x80004ff2 +80000818: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xf6e8cef1 +8000081c: 00062783 lw x15,0(x12) +80000820: 00460613 addi x12,x12,4 + +80000824 : +Zbkb_brev8_cg_cp_rd_b22: + brev8 x22, x15 # perform operation +80000824: 6877db13 brev8 x22,x15 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_brev8_cg_cp_rd_b22, Zbkb_brev8_cg_cp_rd_b22_str) +80000828: 0000a203 lw x4,0(x1) +8000082c: 01620863 beq x4,x22,8000083c +80000830: 051012ef jal x5,80002080 +80000834: 80000824 .word 0x80000824 +80000838: 80005025 .word 0x80005025 +8000083c: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x94cde507 +80000840: 00062983 lw x19,0(x12) +80000844: 00460613 addi x12,x12,4 + +80000848 : +Zbkb_brev8_cg_cp_rd_b23: + brev8 x23, x19 # perform operation +80000848: 6879db93 brev8 x23,x19 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_brev8_cg_cp_rd_b23, Zbkb_brev8_cg_cp_rd_b23_str) +8000084c: 0000a203 lw x4,0(x1) +80000850: 01720863 beq x4,x23,80000860 +80000854: 02d012ef jal x5,80002080 +80000858: 80000848 .word 0x80000848 +8000085c: 80005058 .word 0x80005058 +80000860: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xc796f7ac +80000864: 00062383 lw x7,0(x12) +80000868: 00460613 addi x12,x12,4 + +8000086c : +Zbkb_brev8_cg_cp_rd_b24: + brev8 x24, x7 # perform operation +8000086c: 6873dc13 brev8 x24,x7 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_brev8_cg_cp_rd_b24, Zbkb_brev8_cg_cp_rd_b24_str) +80000870: 0000a203 lw x4,0(x1) +80000874: 01820863 beq x4,x24,80000884 +80000878: 009012ef jal x5,80002080 +8000087c: 8000086c .word 0x8000086c +80000880: 8000508b .word 0x8000508b +80000884: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x4ffe8903 +80000888: 00062e83 lw x29,0(x12) +8000088c: 00460613 addi x12,x12,4 + +80000890 : +Zbkb_brev8_cg_cp_rd_b25: + brev8 x25, x29 # perform operation +80000890: 687edc93 brev8 x25,x29 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_brev8_cg_cp_rd_b25, Zbkb_brev8_cg_cp_rd_b25_str) +80000894: 0000a203 lw x4,0(x1) +80000898: 01920863 beq x4,x25,800008a8 +8000089c: 7e4012ef jal x5,80002080 +800008a0: 80000890 .word 0x80000890 +800008a4: 800050be .word 0x800050be +800008a8: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x6cfe9858 +800008ac: 00062383 lw x7,0(x12) +800008b0: 00460613 addi x12,x12,4 + +800008b4 : +Zbkb_brev8_cg_cp_rd_b26: + brev8 x26, x7 # perform operation +800008b4: 6873dd13 brev8 x26,x7 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_brev8_cg_cp_rd_b26, Zbkb_brev8_cg_cp_rd_b26_str) +800008b8: 0000a203 lw x4,0(x1) +800008bc: 01a20863 beq x4,x26,800008cc +800008c0: 7c0012ef jal x5,80002080 +800008c4: 800008b4 .word 0x800008b4 +800008c8: 800050f1 .word 0x800050f1 +800008cc: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xc42b5a10 +800008d0: 00062b03 lw x22,0(x12) +800008d4: 00460613 addi x12,x12,4 + +800008d8 : +Zbkb_brev8_cg_cp_rd_b27: + brev8 x27, x22 # perform operation +800008d8: 687b5d93 brev8 x27,x22 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_brev8_cg_cp_rd_b27, Zbkb_brev8_cg_cp_rd_b27_str) +800008dc: 0000a203 lw x4,0(x1) +800008e0: 01b20863 beq x4,x27,800008f0 +800008e4: 79c012ef jal x5,80002080 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 80005124 .word 0x80005124 +800008f0: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x72b96555 +800008f4: 00062b83 lw x23,0(x12) +800008f8: 00460613 addi x12,x12,4 + +800008fc : +Zbkb_brev8_cg_cp_rd_b28: + brev8 x28, x23 # perform operation +800008fc: 687bde13 brev8 x28,x23 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_brev8_cg_cp_rd_b28, Zbkb_brev8_cg_cp_rd_b28_str) +80000900: 0000a203 lw x4,0(x1) +80000904: 01c20863 beq x4,x28,80000914 +80000908: 778012ef jal x5,80002080 +8000090c: 800008fc .word 0x800008fc +80000910: 80005157 .word 0x80005157 +80000914: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x2144141a +80000918: 00062103 lw x2,0(x12) +8000091c: 00460613 addi x12,x12,4 + +80000920 : +Zbkb_brev8_cg_cp_rd_b29: + brev8 x29, x2 # perform operation +80000920: 68715e93 brev8 x29,x2 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_brev8_cg_cp_rd_b29, Zbkb_brev8_cg_cp_rd_b29_str) +80000924: 0000a203 lw x4,0(x1) +80000928: 01d20863 beq x4,x29,80000938 +8000092c: 754012ef jal x5,80002080 +80000930: 80000920 .word 0x80000920 +80000934: 8000518a .word 0x8000518a +80000938: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x654e4851 +8000093c: 00062c83 lw x25,0(x12) +80000940: 00460613 addi x12,x12,4 + +80000944 : +Zbkb_brev8_cg_cp_rd_b30: + brev8 x30, x25 # perform operation +80000944: 687cdf13 brev8 x30,x25 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_brev8_cg_cp_rd_b30, Zbkb_brev8_cg_cp_rd_b30_str) +80000948: 0000a203 lw x4,0(x1) +8000094c: 01e20863 beq x4,x30,8000095c +80000950: 730012ef jal x5,80002080 +80000954: 80000944 .word 0x80000944 +80000958: 800051bd .word 0x800051bd +8000095c: 00408093 addi x1,x1,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x7cf380af +80000960: 00062e03 lw x28,0(x12) +80000964: 00460613 addi x12,x12,4 + +80000968 : +Zbkb_brev8_cg_cp_rd_b31: + brev8 x31, x28 # perform operation +80000968: 687e5f93 brev8 x31,x28 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_brev8_cg_cp_rd_b31, Zbkb_brev8_cg_cp_rd_b31_str) +8000096c: 0000a203 lw x4,0(x1) +80000970: 01f20863 beq x4,x31,80000980 +80000974: 70c012ef jal x5,80002080 +80000978: 80000968 .word 0x80000968 +8000097c: 800051f0 .word 0x800051f0 +80000980: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x00000000 +80000984: 00062403 lw x8,0(x12) +80000988: 00460613 addi x12,x12,4 + +8000098c : +Zbkb_brev8_cg_cp_rs1_edges_0x0: + brev8 x27, x8 # perform operation +8000098c: 68745d93 brev8 x27,x8 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_edges_0x0, Zbkb_brev8_cg_cp_rs1_edges_0x0_str) +80000990: 0000a203 lw x4,0(x1) +80000994: 01b20863 beq x4,x27,800009a4 +80000998: 6e8012ef jal x5,80002080 +8000099c: 8000098c .word 0x8000098c +800009a0: 80005223 .word 0x80005223 +800009a4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x00000001 +800009a8: 00062683 lw x13,0(x12) +800009ac: 00460613 addi x12,x12,4 + +800009b0 : +Zbkb_brev8_cg_cp_rs1_edges_0x1: + brev8 x7, x13 # perform operation +800009b0: 6876d393 brev8 x7,x13 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_brev8_cg_cp_rs1_edges_0x1, Zbkb_brev8_cg_cp_rs1_edges_0x1_str) +800009b4: 0000a203 lw x4,0(x1) +800009b8: 00720863 beq x4,x7,800009c8 +800009bc: 6c4012ef jal x5,80002080 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 8000525d .word 0x8000525d +800009c8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x00000002 +800009cc: 00062503 lw x10,0(x12) +800009d0: 00460613 addi x12,x12,4 + +800009d4 : +Zbkb_brev8_cg_cp_rs1_edges_0x2: + brev8 x6, x10 # perform operation +800009d4: 68755313 brev8 x6,x10 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_brev8_cg_cp_rs1_edges_0x2, Zbkb_brev8_cg_cp_rs1_edges_0x2_str) +800009d8: 0000a203 lw x4,0(x1) +800009dc: 00620863 beq x4,x6,800009ec +800009e0: 6a0012ef jal x5,80002080 +800009e4: 800009d4 .word 0x800009d4 +800009e8: 80005297 .word 0x80005297 +800009ec: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x80000000 +800009f0: 00062483 lw x9,0(x12) +800009f4: 00460613 addi x12,x12,4 + +800009f8 : +Zbkb_brev8_cg_cp_rs1_edges_0x80000000: + brev8 x13, x9 # perform operation +800009f8: 6874d693 brev8 x13,x9 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_brev8_cg_cp_rs1_edges_0x80000000, Zbkb_brev8_cg_cp_rs1_edges_0x80000000_str) +800009fc: 0000a203 lw x4,0(x1) +80000a00: 00d20863 beq x4,x13,80000a10 +80000a04: 67c012ef jal x5,80002080 +80000a08: 800009f8 .word 0x800009f8 +80000a0c: 800052d1 .word 0x800052d1 +80000a10: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x80000001 +80000a14: 00062583 lw x11,0(x12) +80000a18: 00460613 addi x12,x12,4 + +80000a1c : +Zbkb_brev8_cg_cp_rs1_edges_0x80000001: + brev8 x13, x11 # perform operation +80000a1c: 6875d693 brev8 x13,x11 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_brev8_cg_cp_rs1_edges_0x80000001, Zbkb_brev8_cg_cp_rs1_edges_0x80000001_str) +80000a20: 0000a203 lw x4,0(x1) +80000a24: 00d20863 beq x4,x13,80000a34 +80000a28: 658012ef jal x5,80002080 +80000a2c: 80000a1c .word 0x80000a1c +80000a30: 80005312 .word 0x80005312 +80000a34: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x7fffffff +80000a38: 00062883 lw x17,0(x12) +80000a3c: 00460613 addi x12,x12,4 + +80000a40 : +Zbkb_brev8_cg_cp_rs1_edges_0x7fffffff: + brev8 x25, x17 # perform operation +80000a40: 6878dc93 brev8 x25,x17 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0x7fffffff, Zbkb_brev8_cg_cp_rs1_edges_0x7fffffff_str) +80000a44: 0000a203 lw x4,0(x1) +80000a48: 01920863 beq x4,x25,80000a58 +80000a4c: 634012ef jal x5,80002080 +80000a50: 80000a40 .word 0x80000a40 +80000a54: 80005353 .word 0x80005353 +80000a58: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x7ffffffe +80000a5c: 00062303 lw x6,0(x12) +80000a60: 00460613 addi x12,x12,4 + +80000a64 : +Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffe: + brev8 x9, x6 # perform operation +80000a64: 68735493 brev8 x9,x6 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffe, Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffe_str) +80000a68: 0000a203 lw x4,0(x1) +80000a6c: 00920863 beq x4,x9,80000a7c +80000a70: 610012ef jal x5,80002080 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 80005394 .word 0x80005394 +80000a7c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xffffffff +80000a80: 00062803 lw x16,0(x12) +80000a84: 00460613 addi x12,x12,4 + +80000a88 : +Zbkb_brev8_cg_cp_rs1_edges_0xffffffff: + brev8 x27, x16 # perform operation +80000a88: 68785d93 brev8 x27,x16 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_edges_0xffffffff, Zbkb_brev8_cg_cp_rs1_edges_0xffffffff_str) +80000a8c: 0000a203 lw x4,0(x1) +80000a90: 01b20863 beq x4,x27,80000aa0 +80000a94: 5ec012ef jal x5,80002080 +80000a98: 80000a88 .word 0x80000a88 +80000a9c: 800053d5 .word 0x800053d5 +80000aa0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xfffffffe +80000aa4: 00062e83 lw x29,0(x12) +80000aa8: 00460613 addi x12,x12,4 + +80000aac : +Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe: + brev8 x9, x29 # perform operation +80000aac: 687ed493 brev8 x9,x29 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe_str) +80000ab0: 0000a203 lw x4,0(x1) +80000ab4: 00920863 beq x4,x9,80000ac4 +80000ab8: 5c8012ef jal x5,80002080 +80000abc: 80000aac .word 0x80000aac +80000ac0: 80005416 .word 0x80005416 +80000ac4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5bbc8872 +80000ac8: 00062883 lw x17,0(x12) +80000acc: 00460613 addi x12,x12,4 + +80000ad0 : +Zbkb_brev8_cg_cp_rs1_edges_0x5bbc8872: + brev8 x25, x17 # perform operation +80000ad0: 6878dc93 brev8 x25,x17 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0x5bbc8872, Zbkb_brev8_cg_cp_rs1_edges_0x5bbc8872_str) +80000ad4: 0000a203 lw x4,0(x1) +80000ad8: 01920863 beq x4,x25,80000ae8 +80000adc: 5a4012ef jal x5,80002080 +80000ae0: 80000ad0 .word 0x80000ad0 +80000ae4: 80005457 .word 0x80005457 +80000ae8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xaaaaaaaa +80000aec: 00062303 lw x6,0(x12) +80000af0: 00460613 addi x12,x12,4 + +80000af4 : +Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaa: + brev8 x13, x6 # perform operation +80000af4: 68735693 brev8 x13,x6 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000af8: 0000a203 lw x4,0(x1) +80000afc: 00d20863 beq x4,x13,80000b0c +80000b00: 580012ef jal x5,80002080 +80000b04: 80000af4 .word 0x80000af4 +80000b08: 80005498 .word 0x80005498 +80000b0c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x55555555 +80000b10: 00062183 lw x3,0(x12) +80000b14: 00460613 addi x12,x12,4 + +80000b18 : +Zbkb_brev8_cg_cp_rs1_edges_0x55555555: + brev8 x22, x3 # perform operation +80000b18: 6871db13 brev8 x22,x3 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_brev8_cg_cp_rs1_edges_0x55555555, Zbkb_brev8_cg_cp_rs1_edges_0x55555555_str) +80000b1c: 0000a203 lw x4,0(x1) +80000b20: 01620863 beq x4,x22,80000b30 +80000b24: 55c012ef jal x5,80002080 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 800054d9 .word 0x800054d9 +80000b30: 00408093 addi x1,x1,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x7cc77b9a +80000b34: 00062003 lw x0,0(x12) +80000b38: 00460613 addi x12,x12,4 + +80000b3c : +Zbkb_brev8_cg_cmp_rd_rs1_b0: + brev8 x0, x0 # perform operation +80000b3c: 68705013 brev8 x0,x0 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zbkb_brev8_cg_cmp_rd_rs1_b0, Zbkb_brev8_cg_cmp_rd_rs1_b0_str) +80000b40: 0000a203 lw x4,0(x1) +80000b44: 00020863 beq x4,x0,80000b54 +80000b48: 538012ef jal x5,80002080 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 8000551a .word 0x8000551a +80000b54: 00408093 addi x1,x1,4 + + mv x29, x1 # switch signature pointer register to avoid conflict with test +80000b58: 00008e93 addi x29,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x60ddb743 +80000b5c: 00062083 lw x1,0(x12) +80000b60: 00460613 addi x12,x12,4 + +80000b64 : +Zbkb_brev8_cg_cmp_rd_rs1_b1: + brev8 x1, x1 # perform operation +80000b64: 6870d093 brev8 x1,x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zbkb_brev8_cg_cmp_rd_rs1_b1, Zbkb_brev8_cg_cmp_rd_rs1_b1_str) +80000b68: 000ea203 lw x4,0(x29) +80000b6c: 00120863 beq x4,x1,80000b7c +80000b70: 510012ef jal x5,80002080 +80000b74: 80000b64 .word 0x80000b64 +80000b78: 80005551 .word 0x80005551 +80000b7c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x3aa97be4 +80000b80: 00062103 lw x2,0(x12) +80000b84: 00460613 addi x12,x12,4 + +80000b88 : +Zbkb_brev8_cg_cmp_rd_rs1_b2: + brev8 x2, x2 # perform operation +80000b88: 68715113 brev8 x2,x2 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zbkb_brev8_cg_cmp_rd_rs1_b2, Zbkb_brev8_cg_cmp_rd_rs1_b2_str) +80000b8c: 000ea203 lw x4,0(x29) +80000b90: 00220863 beq x4,x2,80000ba0 +80000b94: 4ec012ef jal x5,80002080 +80000b98: 80000b88 .word 0x80000b88 +80000b9c: 80005588 .word 0x80005588 +80000ba0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x75045e63 +80000ba4: 00062183 lw x3,0(x12) +80000ba8: 00460613 addi x12,x12,4 + +80000bac : +Zbkb_brev8_cg_cmp_rd_rs1_b3: + brev8 x3, x3 # perform operation +80000bac: 6871d193 brev8 x3,x3 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zbkb_brev8_cg_cmp_rd_rs1_b3, Zbkb_brev8_cg_cmp_rd_rs1_b3_str) +80000bb0: 000ea203 lw x4,0(x29) +80000bb4: 00320863 beq x4,x3,80000bc4 +80000bb8: 4c8012ef jal x5,80002080 +80000bbc: 80000bac .word 0x80000bac +80000bc0: 800055bf .word 0x800055bf +80000bc4: 004e8e93 addi x29,x29,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000bc8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000bcc: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x16255128 +80000bd0: 00062203 lw x4,0(x12) +80000bd4: 00460613 addi x12,x12,4 + +80000bd8 : +Zbkb_brev8_cg_cmp_rd_rs1_b4: + brev8 x4, x4 # perform operation +80000bd8: 68725213 brev8 x4,x4 + # Check if x4 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x4, Zbkb_brev8_cg_cmp_rd_rs1_b4, Zbkb_brev8_cg_cmp_rd_rs1_b4_str) +80000bdc: 000ea683 lw x13,0(x29) +80000be0: 00468863 beq x13,x4,80000bf0 +80000be4: 4dc0176f jal x14,800020c0 +80000be8: 80000bd8 .word 0x80000bd8 +80000bec: 800055f6 .word 0x800055f6 +80000bf0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x61dcf016 +80000bf4: 00062283 lw x5,0(x12) +80000bf8: 00460613 addi x12,x12,4 + +80000bfc : +Zbkb_brev8_cg_cmp_rd_rs1_b5: + brev8 x5, x5 # perform operation +80000bfc: 6872d293 brev8 x5,x5 + # Check if x5 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x5, Zbkb_brev8_cg_cmp_rd_rs1_b5, Zbkb_brev8_cg_cmp_rd_rs1_b5_str) +80000c00: 000ea683 lw x13,0(x29) +80000c04: 00568863 beq x13,x5,80000c14 +80000c08: 4b80176f jal x14,800020c0 +80000c0c: 80000bfc .word 0x80000bfc +80000c10: 8000562d .word 0x8000562d +80000c14: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x6390fbbc +80000c18: 00062303 lw x6,0(x12) +80000c1c: 00460613 addi x12,x12,4 + +80000c20 : +Zbkb_brev8_cg_cmp_rd_rs1_b6: + brev8 x6, x6 # perform operation +80000c20: 68735313 brev8 x6,x6 + # Check if x6 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x6, Zbkb_brev8_cg_cmp_rd_rs1_b6, Zbkb_brev8_cg_cmp_rd_rs1_b6_str) +80000c24: 000ea683 lw x13,0(x29) +80000c28: 00668863 beq x13,x6,80000c38 +80000c2c: 4940176f jal x14,800020c0 +80000c30: 80000c20 .word 0x80000c20 +80000c34: 80005664 .word 0x80005664 +80000c38: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x76ac7c87 +80000c3c: 00062383 lw x7,0(x12) +80000c40: 00460613 addi x12,x12,4 + +80000c44 : +Zbkb_brev8_cg_cmp_rd_rs1_b7: + brev8 x7, x7 # perform operation +80000c44: 6873d393 brev8 x7,x7 + # Check if x7 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x7, Zbkb_brev8_cg_cmp_rd_rs1_b7, Zbkb_brev8_cg_cmp_rd_rs1_b7_str) +80000c48: 000ea683 lw x13,0(x29) +80000c4c: 00768863 beq x13,x7,80000c5c +80000c50: 4700176f jal x14,800020c0 +80000c54: 80000c44 .word 0x80000c44 +80000c58: 8000569b .word 0x8000569b +80000c5c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x17163084 +80000c60: 00062403 lw x8,0(x12) +80000c64: 00460613 addi x12,x12,4 + +80000c68 : +Zbkb_brev8_cg_cmp_rd_rs1_b8: + brev8 x8, x8 # perform operation +80000c68: 68745413 brev8 x8,x8 + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zbkb_brev8_cg_cmp_rd_rs1_b8, Zbkb_brev8_cg_cmp_rd_rs1_b8_str) +80000c6c: 000ea683 lw x13,0(x29) +80000c70: 00868863 beq x13,x8,80000c80 +80000c74: 44c0176f jal x14,800020c0 +80000c78: 80000c68 .word 0x80000c68 +80000c7c: 800056d2 .word 0x800056d2 +80000c80: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xa8565edb +80000c84: 00062483 lw x9,0(x12) +80000c88: 00460613 addi x12,x12,4 + +80000c8c : +Zbkb_brev8_cg_cmp_rd_rs1_b9: + brev8 x9, x9 # perform operation +80000c8c: 6874d493 brev8 x9,x9 + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zbkb_brev8_cg_cmp_rd_rs1_b9, Zbkb_brev8_cg_cmp_rd_rs1_b9_str) +80000c90: 000ea683 lw x13,0(x29) +80000c94: 00968863 beq x13,x9,80000ca4 +80000c98: 4280176f jal x14,800020c0 +80000c9c: 80000c8c .word 0x80000c8c +80000ca0: 80005709 .word 0x80005709 +80000ca4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xfc1e164b +80000ca8: 00062503 lw x10,0(x12) +80000cac: 00460613 addi x12,x12,4 + +80000cb0 : +Zbkb_brev8_cg_cmp_rd_rs1_b10: + brev8 x10, x10 # perform operation +80000cb0: 68755513 brev8 x10,x10 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zbkb_brev8_cg_cmp_rd_rs1_b10, Zbkb_brev8_cg_cmp_rd_rs1_b10_str) +80000cb4: 000ea683 lw x13,0(x29) +80000cb8: 00a68863 beq x13,x10,80000cc8 +80000cbc: 4040176f jal x14,800020c0 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 80005740 .word 0x80005740 +80000cc8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x9029d20c +80000ccc: 00062583 lw x11,0(x12) +80000cd0: 00460613 addi x12,x12,4 + +80000cd4 : +Zbkb_brev8_cg_cmp_rd_rs1_b11: + brev8 x11, x11 # perform operation +80000cd4: 6875d593 brev8 x11,x11 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zbkb_brev8_cg_cmp_rd_rs1_b11, Zbkb_brev8_cg_cmp_rd_rs1_b11_str) +80000cd8: 000ea683 lw x13,0(x29) +80000cdc: 00b68863 beq x13,x11,80000cec +80000ce0: 3e00176f jal x14,800020c0 +80000ce4: 80000cd4 .word 0x80000cd4 +80000ce8: 80005778 .word 0x80005778 +80000cec: 004e8e93 addi x29,x29,4 + + mv x18, x12 # switch data pointer register to avoid conflict with test +80000cf0: 00060913 addi x18,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x2c749864 +80000cf4: 00092603 lw x12,0(x18) +80000cf8: 00490913 addi x18,x18,4 + +80000cfc : +Zbkb_brev8_cg_cmp_rd_rs1_b12: + brev8 x12, x12 # perform operation +80000cfc: 68765613 brev8 x12,x12 + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zbkb_brev8_cg_cmp_rd_rs1_b12, Zbkb_brev8_cg_cmp_rd_rs1_b12_str) +80000d00: 000ea683 lw x13,0(x29) +80000d04: 00c68863 beq x13,x12,80000d14 +80000d08: 3b80176f jal x14,800020c0 +80000d0c: 80000cfc .word 0x80000cfc +80000d10: 800057b0 .word 0x800057b0 +80000d14: 004e8e93 addi x29,x29,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d18: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d1c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x9a8dc38f +80000d20: 00092683 lw x13,0(x18) +80000d24: 00490913 addi x18,x18,4 + +80000d28 : +Zbkb_brev8_cg_cmp_rd_rs1_b13: + brev8 x13, x13 # perform operation +80000d28: 6876d693 brev8 x13,x13 + # Check if x13 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x13, Zbkb_brev8_cg_cmp_rd_rs1_b13, Zbkb_brev8_cg_cmp_rd_rs1_b13_str) +80000d2c: 000ea383 lw x7,0(x29) +80000d30: 00d38863 beq x7,x13,80000d40 +80000d34: 3640146f jal x8,80002098 +80000d38: 80000d28 .word 0x80000d28 +80000d3c: 800057e8 .word 0x800057e8 +80000d40: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x6b3530ad +80000d44: 00092703 lw x14,0(x18) +80000d48: 00490913 addi x18,x18,4 + +80000d4c : +Zbkb_brev8_cg_cmp_rd_rs1_b14: + brev8 x14, x14 # perform operation +80000d4c: 68775713 brev8 x14,x14 + # Check if x14 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x14, Zbkb_brev8_cg_cmp_rd_rs1_b14, Zbkb_brev8_cg_cmp_rd_rs1_b14_str) +80000d50: 000ea383 lw x7,0(x29) +80000d54: 00e38863 beq x7,x14,80000d64 +80000d58: 3400146f jal x8,80002098 +80000d5c: 80000d4c .word 0x80000d4c +80000d60: 80005820 .word 0x80005820 +80000d64: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x54d5eae2 +80000d68: 00092783 lw x15,0(x18) +80000d6c: 00490913 addi x18,x18,4 + +80000d70 : +Zbkb_brev8_cg_cmp_rd_rs1_b15: + brev8 x15, x15 # perform operation +80000d70: 6877d793 brev8 x15,x15 + # Check if x15 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x15, Zbkb_brev8_cg_cmp_rd_rs1_b15, Zbkb_brev8_cg_cmp_rd_rs1_b15_str) +80000d74: 000ea383 lw x7,0(x29) +80000d78: 00f38863 beq x7,x15,80000d88 +80000d7c: 31c0146f jal x8,80002098 +80000d80: 80000d70 .word 0x80000d70 +80000d84: 80005858 .word 0x80005858 +80000d88: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x382aa6b2 +80000d8c: 00092803 lw x16,0(x18) +80000d90: 00490913 addi x18,x18,4 + +80000d94 : +Zbkb_brev8_cg_cmp_rd_rs1_b16: + brev8 x16, x16 # perform operation +80000d94: 68785813 brev8 x16,x16 + # Check if x16 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x16, Zbkb_brev8_cg_cmp_rd_rs1_b16, Zbkb_brev8_cg_cmp_rd_rs1_b16_str) +80000d98: 000ea383 lw x7,0(x29) +80000d9c: 01038863 beq x7,x16,80000dac +80000da0: 2f80146f jal x8,80002098 +80000da4: 80000d94 .word 0x80000d94 +80000da8: 80005890 .word 0x80005890 +80000dac: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x76309dce +80000db0: 00092883 lw x17,0(x18) +80000db4: 00490913 addi x18,x18,4 + +80000db8 : +Zbkb_brev8_cg_cmp_rd_rs1_b17: + brev8 x17, x17 # perform operation +80000db8: 6878d893 brev8 x17,x17 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zbkb_brev8_cg_cmp_rd_rs1_b17, Zbkb_brev8_cg_cmp_rd_rs1_b17_str) +80000dbc: 000ea383 lw x7,0(x29) +80000dc0: 01138863 beq x7,x17,80000dd0 +80000dc4: 2d40146f jal x8,80002098 +80000dc8: 80000db8 .word 0x80000db8 +80000dcc: 800058c8 .word 0x800058c8 +80000dd0: 004e8e93 addi x29,x29,4 + + mv x24, x18 # switch data pointer register to avoid conflict with test +80000dd4: 00090c13 addi x24,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x4d46cf47 +80000dd8: 000c2903 lw x18,0(x24) +80000ddc: 004c0c13 addi x24,x24,4 + +80000de0 : +Zbkb_brev8_cg_cmp_rd_rs1_b18: + brev8 x18, x18 # perform operation +80000de0: 68795913 brev8 x18,x18 + # Check if x18 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x18, Zbkb_brev8_cg_cmp_rd_rs1_b18, Zbkb_brev8_cg_cmp_rd_rs1_b18_str) +80000de4: 000ea383 lw x7,0(x29) +80000de8: 01238863 beq x7,x18,80000df8 +80000dec: 2ac0146f jal x8,80002098 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 80005900 .word 0x80005900 +80000df8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xa3253cdf +80000dfc: 000c2983 lw x19,0(x24) +80000e00: 004c0c13 addi x24,x24,4 + +80000e04 : +Zbkb_brev8_cg_cmp_rd_rs1_b19: + brev8 x19, x19 # perform operation +80000e04: 6879d993 brev8 x19,x19 + # Check if x19 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x19, Zbkb_brev8_cg_cmp_rd_rs1_b19, Zbkb_brev8_cg_cmp_rd_rs1_b19_str) +80000e08: 000ea383 lw x7,0(x29) +80000e0c: 01338863 beq x7,x19,80000e1c +80000e10: 2880146f jal x8,80002098 +80000e14: 80000e04 .word 0x80000e04 +80000e18: 80005938 .word 0x80005938 +80000e1c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xc80ede0d +80000e20: 000c2a03 lw x20,0(x24) +80000e24: 004c0c13 addi x24,x24,4 + +80000e28 : +Zbkb_brev8_cg_cmp_rd_rs1_b20: + brev8 x20, x20 # perform operation +80000e28: 687a5a13 brev8 x20,x20 + # Check if x20 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x20, Zbkb_brev8_cg_cmp_rd_rs1_b20, Zbkb_brev8_cg_cmp_rd_rs1_b20_str) +80000e2c: 000ea383 lw x7,0(x29) +80000e30: 01438863 beq x7,x20,80000e40 +80000e34: 2640146f jal x8,80002098 +80000e38: 80000e28 .word 0x80000e28 +80000e3c: 80005970 .word 0x80005970 +80000e40: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x0e52f2d0 +80000e44: 000c2a83 lw x21,0(x24) +80000e48: 004c0c13 addi x24,x24,4 + +80000e4c : +Zbkb_brev8_cg_cmp_rd_rs1_b21: + brev8 x21, x21 # perform operation +80000e4c: 687ada93 brev8 x21,x21 + # Check if x21 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x21, Zbkb_brev8_cg_cmp_rd_rs1_b21, Zbkb_brev8_cg_cmp_rd_rs1_b21_str) +80000e50: 000ea383 lw x7,0(x29) +80000e54: 01538863 beq x7,x21,80000e64 +80000e58: 2400146f jal x8,80002098 +80000e5c: 80000e4c .word 0x80000e4c +80000e60: 800059a8 .word 0x800059a8 +80000e64: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xd3fd4690 +80000e68: 000c2b03 lw x22,0(x24) +80000e6c: 004c0c13 addi x24,x24,4 + +80000e70 : +Zbkb_brev8_cg_cmp_rd_rs1_b22: + brev8 x22, x22 # perform operation +80000e70: 687b5b13 brev8 x22,x22 + # Check if x22 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x22, Zbkb_brev8_cg_cmp_rd_rs1_b22, Zbkb_brev8_cg_cmp_rd_rs1_b22_str) +80000e74: 000ea383 lw x7,0(x29) +80000e78: 01638863 beq x7,x22,80000e88 +80000e7c: 21c0146f jal x8,80002098 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 800059e0 .word 0x800059e0 +80000e88: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xcf2237b1 +80000e8c: 000c2b83 lw x23,0(x24) +80000e90: 004c0c13 addi x24,x24,4 + +80000e94 : +Zbkb_brev8_cg_cmp_rd_rs1_b23: + brev8 x23, x23 # perform operation +80000e94: 687bdb93 brev8 x23,x23 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zbkb_brev8_cg_cmp_rd_rs1_b23, Zbkb_brev8_cg_cmp_rd_rs1_b23_str) +80000e98: 000ea383 lw x7,0(x29) +80000e9c: 01738863 beq x7,x23,80000eac +80000ea0: 1f80146f jal x8,80002098 +80000ea4: 80000e94 .word 0x80000e94 +80000ea8: 80005a18 .word 0x80005a18 +80000eac: 004e8e93 addi x29,x29,4 + + mv x22, x24 # switch data pointer register to avoid conflict with test +80000eb0: 000c0b13 addi x22,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0xae523cd5 +80000eb4: 000b2c03 lw x24,0(x22) +80000eb8: 004b0b13 addi x22,x22,4 + +80000ebc : +Zbkb_brev8_cg_cmp_rd_rs1_b24: + brev8 x24, x24 # perform operation +80000ebc: 687c5c13 brev8 x24,x24 + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zbkb_brev8_cg_cmp_rd_rs1_b24, Zbkb_brev8_cg_cmp_rd_rs1_b24_str) +80000ec0: 000ea383 lw x7,0(x29) +80000ec4: 01838863 beq x7,x24,80000ed4 +80000ec8: 1d00146f jal x8,80002098 +80000ecc: 80000ebc .word 0x80000ebc +80000ed0: 80005a51 .word 0x80005a51 +80000ed4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x15394f73 +80000ed8: 000b2c83 lw x25,0(x22) +80000edc: 004b0b13 addi x22,x22,4 + +80000ee0 : +Zbkb_brev8_cg_cmp_rd_rs1_b25: + brev8 x25, x25 # perform operation +80000ee0: 687cdc93 brev8 x25,x25 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zbkb_brev8_cg_cmp_rd_rs1_b25, Zbkb_brev8_cg_cmp_rd_rs1_b25_str) +80000ee4: 000ea383 lw x7,0(x29) +80000ee8: 01938863 beq x7,x25,80000ef8 +80000eec: 1ac0146f jal x8,80002098 +80000ef0: 80000ee0 .word 0x80000ee0 +80000ef4: 80005a8a .word 0x80005a8a +80000ef8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x3a2fe64c +80000efc: 000b2d03 lw x26,0(x22) +80000f00: 004b0b13 addi x22,x22,4 + +80000f04 : +Zbkb_brev8_cg_cmp_rd_rs1_b26: + brev8 x26, x26 # perform operation +80000f04: 687d5d13 brev8 x26,x26 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkb_brev8_cg_cmp_rd_rs1_b26, Zbkb_brev8_cg_cmp_rd_rs1_b26_str) +80000f08: 000ea383 lw x7,0(x29) +80000f0c: 01a38863 beq x7,x26,80000f1c +80000f10: 1880146f jal x8,80002098 +80000f14: 80000f04 .word 0x80000f04 +80000f18: 80005ac3 .word 0x80005ac3 +80000f1c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x6114fb17 +80000f20: 000b2d83 lw x27,0(x22) +80000f24: 004b0b13 addi x22,x22,4 + +80000f28 : +Zbkb_brev8_cg_cmp_rd_rs1_b27: + brev8 x27, x27 # perform operation +80000f28: 687ddd93 brev8 x27,x27 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zbkb_brev8_cg_cmp_rd_rs1_b27, Zbkb_brev8_cg_cmp_rd_rs1_b27_str) +80000f2c: 000ea383 lw x7,0(x29) +80000f30: 01b38863 beq x7,x27,80000f40 +80000f34: 1640146f jal x8,80002098 +80000f38: 80000f28 .word 0x80000f28 +80000f3c: 80005afc .word 0x80005afc +80000f40: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x574c5c14 +80000f44: 000b2e03 lw x28,0(x22) +80000f48: 004b0b13 addi x22,x22,4 + +80000f4c : +Zbkb_brev8_cg_cmp_rd_rs1_b28: + brev8 x28, x28 # perform operation +80000f4c: 687e5e13 brev8 x28,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_brev8_cg_cmp_rd_rs1_b28, Zbkb_brev8_cg_cmp_rd_rs1_b28_str) +80000f50: 000ea383 lw x7,0(x29) +80000f54: 01c38863 beq x7,x28,80000f64 +80000f58: 1400146f jal x8,80002098 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 80005b35 .word 0x80005b35 +80000f64: 004e8e93 addi x29,x29,4 + + mv x19, x29 # switch signature pointer register to avoid conflict with test +80000f68: 000e8993 addi x19,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x90c035c9 +80000f6c: 000b2e83 lw x29,0(x22) +80000f70: 004b0b13 addi x22,x22,4 + +80000f74 : +Zbkb_brev8_cg_cmp_rd_rs1_b29: + brev8 x29, x29 # perform operation +80000f74: 687ede93 brev8 x29,x29 + # Check if x29 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x29, Zbkb_brev8_cg_cmp_rd_rs1_b29, Zbkb_brev8_cg_cmp_rd_rs1_b29_str) +80000f78: 0009a383 lw x7,0(x19) +80000f7c: 01d38863 beq x7,x29,80000f8c +80000f80: 1180146f jal x8,80002098 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 80005b6e .word 0x80005b6e +80000f8c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xc41d0cd6 +80000f90: 000b2f03 lw x30,0(x22) +80000f94: 004b0b13 addi x22,x22,4 + +80000f98 : +Zbkb_brev8_cg_cmp_rd_rs1_b30: + brev8 x30, x30 # perform operation +80000f98: 687f5f13 brev8 x30,x30 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkb_brev8_cg_cmp_rd_rs1_b30, Zbkb_brev8_cg_cmp_rd_rs1_b30_str) +80000f9c: 0009a383 lw x7,0(x19) +80000fa0: 01e38863 beq x7,x30,80000fb0 +80000fa4: 0f40146f jal x8,80002098 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 80005ba7 .word 0x80005ba7 +80000fb0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x9fe6d046 +80000fb4: 000b2f83 lw x31,0(x22) +80000fb8: 004b0b13 addi x22,x22,4 + +80000fbc : +Zbkb_brev8_cg_cmp_rd_rs1_b31: + brev8 x31, x31 # perform operation +80000fbc: 687fdf93 brev8 x31,x31 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkb_brev8_cg_cmp_rd_rs1_b31, Zbkb_brev8_cg_cmp_rd_rs1_b31_str) +80000fc0: 0009a383 lw x7,0(x19) +80000fc4: 01f38863 beq x7,x31,80000fd4 +80000fc8: 0d00146f jal x8,80002098 +80000fcc: 80000fbc .word 0x80000fbc +80000fd0: 80005be0 .word 0x80005be0 +80000fd4: 00498993 addi x19,x19,4 + + mv x2, x19 # restore signature pointer to default register for teardown +80000fd8: 00098113 addi x2,x19,0 + +80000fdc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fdc: 00000513 addi x10,x0,0 +80000fe0: 00000073 ecall +80000fe4: fff00513 addi x10,x0,-1 +80000fe8: 1d800413 addi x8,x0,472 + +80000fec : +80000fec: 34002373 csrrs x6,mscratch,x0 + +80000ff0 : +80000ff0: 23832383 lw x7,568(x6) +80000ff4: 23c32483 lw x9,572(x6) + +80000ff8 : +80000ff8: 22032383 lw x7,544(x6) + +80000ffc : +80000ffc: 25032483 lw x9,592(x6) +80001000: 34049073 csrrw x0,mscratch,x9 + +80001004 : +80001004: 24832483 lw x9,584(x6) +80001008: 305493f3 csrrw x7,mtvec,x9 +8000100c: ffc4f493 andi x9,x9,-4 +80001010: ffc3f393 andi x7,x7,-4 +80001014: 00749e63 bne x9,x7,80001030 + +80001018 : +80001018: 00030493 addi x9,x6,0 + +8000101c : +8000101c: 0004a783 lw x15,0(x9) +80001020: 00f3a023 sw x15,0(x7) +80001024: 00438393 addi x7,x7,4 +80001028: 00448493 addi x9,x9,4 +8000102c: fe83c8e3 blt x7,x8,8000101c +80001030: 0000100f fence.i + +80001034 : +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 21f50513 addi x10,x10,543 # 8000629f +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 21950513 addi x10,x10,537 # 800062d9 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 23950513 addi x10,x10,569 # 80006339 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: da450513 addi x10,x10,-604 # 80006ee4 +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: 98838393 addi x7,x7,-1656 # 80007b48 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: 94040413 addi x8,x8,-1728 # 80007b40 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 8000648d .word 0x8000648d + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 800062fb .word 0x800062fb +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 00450513 addi x10,x10,4 # 80006264 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: fff50513 addi x10,x10,-1 # 8000629f +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: cddff06f jal x0,80000fdc + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cd1ff06f jal x0,80000fdc +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b5430313 addi x6,x6,-1196 # 80001034 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 25b50513 addi x10,x10,603 # 8000791b +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00004517 auipc x10,0x4 +80001704: 68850513 addi x10,x10,1672 # 80005d88 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: c6250513 addi x10,x10,-926 # 800063a2 +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: b1f50513 addi x10,x10,-1249 # 8000629f +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 20848493 addi x9,x9,520 # 80005d68 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: a0c40413 addi x8,x8,-1524 # 800165ac +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800064a4 .word 0x800064a4 +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800065a6 .word 0x800065a6 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800066a1 .word 0x800066a1 +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 80006794 .word 0x80006794 +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006907 .word 0x80006907 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: ba020213 addi x4,x4,-1120 # 80005c20 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: b8838393 addi x7,x7,-1144 # 80005c20 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: b6068693 addi x13,x13,-1184 # 80005c20 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: b3848493 addi x9,x9,-1224 # 80005c20 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: a944a483 lw x9,-1388(x9) # 80005c20 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00005417 auipc x8,0x5 +80002244: 72040413 addi x8,x8,1824 # 80007960 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 33040413 addi x8,x8,816 # 800165b0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: a8848493 addi x9,x9,-1400 # 80005d48 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: a4848493 addi x9,x9,-1464 # 80005d48 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: a2880813 addi x16,x16,-1496 # 80005d58 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: a1480813 addi x16,x16,-1516 # 80005d58 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 13d38393 addi x7,x7,317 # 8000648d +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: 9f080813 addi x16,x16,-1552 # 80005d50 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 13838393 addi x7,x7,312 # 800064a4 +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 22238393 addi x7,x7,546 # 800065a6 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 30538393 addi x7,x7,773 # 800066a1 +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 3e038393 addi x7,x7,992 # 80006794 +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 53b38393 addi x7,x7,1339 # 80006907 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 4a738393 addi x7,x7,1191 # 8000688b +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 4cd38393 addi x7,x7,1229 # 800068c9 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 0d038393 addi x7,x7,208 # 800064e4 +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 1b838393 addi x7,x7,440 # 800065e4 +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 29938393 addi x7,x7,665 # 800066dd +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 37538393 addi x7,x7,885 # 800067d1 +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 4ce38393 addi x7,x7,1230 # 80006942 +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 09838393 addi x7,x7,152 # 80006524 +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 17e38393 addi x7,x7,382 # 80006622 +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 25d38393 addi x7,x7,605 # 80006719 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 33a38393 addi x7,x7,826 # 8000680e +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 49138393 addi x7,x7,1169 # 8000697d +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 06138393 addi x7,x7,97 # 80006565 +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 14538393 addi x7,x7,325 # 80006661 +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 22238393 addi x7,x7,546 # 80006756 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 30038393 addi x7,x7,768 # 8000684c +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 45538393 addi x7,x7,1109 # 800069b9 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 47a38393 addi x7,x7,1146 # 800069f6 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 4b138393 addi x7,x7,1201 # 80006a45 +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 59438393 addi x7,x7,1428 # 80006b40 +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00004397 auipc x7,0x4 +800025c8: 67838393 addi x7,x7,1656 # 80006c3c +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00003817 auipc x16,0x3 +800025e8: 76c80813 addi x16,x16,1900 # 80005d50 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00003817 auipc x16,0x3 +800025f8: 75c80813 addi x16,x16,1884 # 80005d50 +800025fc: 00882023 sw x8,0(x16) +80002600: 00003817 auipc x16,0x3 +80002604: 75480813 addi x16,x16,1876 # 80005d54 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00003817 auipc x16,0x3 +80002614: 74080813 addi x16,x16,1856 # 80005d50 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: c3f50513 addi x10,x10,-961 # 8000629f +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: c3950513 addi x10,x10,-967 # 800062d9 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: cb050513 addi x10,x10,-848 # 80006390 +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00003517 auipc x10,0x3 +8000270c: 63852503 lw x10,1592(x10) # 80005d40 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: c8250513 addi x10,x10,-894 # 800063a2 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 4d852503 lw x10,1240(x10) # 80005c20 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: c4450513 addi x10,x10,-956 # 800063a4 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 59852503 lw x10,1432(x10) # 80005d20 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 5c850513 addi x10,x10,1480 # 80005d88 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: bb850513 addi x10,x10,-1096 # 800063b8 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 50052503 lw x10,1280(x10) # 80005d28 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 54850513 addi x10,x10,1352 # 80005d88 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 56f50513 addi x10,x10,1391 # 80006def +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 37852503 lw x10,888(x10) # 80005c20 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 4c860613 addi x12,x12,1224 # 80005d88 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 43c52503 lw x10,1084(x10) # 80005d24 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00004517 auipc x10,0x4 +80002924: 5e550513 addi x10,x10,1509 # 80006f05 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 42860613 addi x12,x12,1064 # 80005d88 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 39c52503 lw x10,924(x10) # 80005d24 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 3e860613 addi x12,x12,1000 # 80005d88 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 35c52503 lw x10,860(x10) # 80005d24 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 40850513 addi x10,x10,1032 # 80006de8 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 36850513 addi x10,x10,872 # 80005d88 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 3a050513 addi x10,x10,928 # 80006e00 +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 19852503 lw x10,408(x10) # 80005c20 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 29852503 lw x10,664(x10) # 80005d30 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 28452503 lw x10,644(x10) # 80005d30 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 2c850513 addi x10,x10,712 # 80005d88 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 26052503 lw x10,608(x10) # 80005d48 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 31750513 addi x10,x10,791 # 80006e17 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 0f852503 lw x10,248(x10) # 80005c20 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 20052503 lw x10,512(x10) # 80005d38 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 1ec52503 lw x10,492(x10) # 80005d38 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 22850513 addi x10,x10,552 # 80005d88 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 28e50513 addi x10,x10,654 # 80006e2e +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 17052503 lw x10,368(x10) # 80005d38 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 1a850513 addi x10,x10,424 # 80005d88 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 26c50513 addi x10,x10,620 # 80006e8c +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 0f052503 lw x10,240(x10) # 80005d38 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 12850513 addi x10,x10,296 # 80005d88 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 0c442403 lw x8,196(x8) # 80005d50 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 29150513 addi x10,x10,657 # 80006f31 +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 27d50513 addi x10,x10,637 # 80006f5d +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 05080813 addi x16,x16,80 # 80005d58 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00003517 auipc x10,0x3 +80002d24: 68250513 addi x10,x10,1666 # 800063a2 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 20d50513 addi x10,x10,525 # 80006f6d +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: fb052503 lw x10,-80(x10) # 80005d38 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: fe850513 addi x10,x10,-24 # 80005d88 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 1b850513 addi x10,x10,440 # 80006f98 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: f2852503 lw x10,-216(x10) # 80005d30 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: f6850513 addi x10,x10,-152 # 80005d88 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: ee832303 lw x6,-280(x6) # 80005d30 +80002e50: 00003397 auipc x7,0x3 +80002e54: ee83a383 lw x7,-280(x7) # 80005d38 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 16750513 addi x10,x10,359 # 80006fc7 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 18f50513 addi x10,x10,399 # 8000702f +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: e6832303 lw x6,-408(x6) # 80005d30 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: e683a383 lw x7,-408(x7) # 80005d38 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: e8850513 addi x10,x10,-376 # 80005d88 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 11650513 addi x10,x10,278 # 80007056 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 07350513 addi x10,x10,115 # 80006ff3 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 06f50513 addi x10,x10,111 # 8000702f +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: d5032303 lw x6,-688(x6) # 80005d38 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: d403a383 lw x7,-704(x7) # 80005d30 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: d6850513 addi x10,x10,-664 # 80005d88 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 0de50513 addi x10,x10,222 # 8000713e +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 18550513 addi x10,x10,389 # 80007225 +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: c8c52503 lw x10,-884(x10) # 80005d54 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 16150513 addi x10,x10,353 # 80007261 +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 0ff50513 addi x10,x10,255 # 8000723f +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 0c750513 addi x10,x10,199 # 80007247 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 08f50513 addi x10,x10,143 # 8000724f +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 05850513 addi x10,x10,88 # 80007258 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 02a50513 addi x10,x10,42 # 8000726a +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: ae852503 lw x10,-1304(x10) # 80005d50 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 10150513 addi x10,x10,257 # 800073c1 +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: f8450513 addi x10,x10,-124 # 80007284 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: f7550513 addi x10,x10,-139 # 800072b5 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: f5550513 addi x10,x10,-171 # 800072d5 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: f3350513 addi x10,x10,-205 # 800072f3 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: f1250513 addi x10,x10,-238 # 80007312 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: efa50513 addi x10,x10,-262 # 8000733a +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: ee650513 addi x10,x10,-282 # 80007366 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: ed250513 addi x10,x10,-302 # 80007392 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: ed050513 addi x10,x10,-304 # 800073d0 +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: 81052503 lw x10,-2032(x10) # 80005d38 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: 84850513 addi x10,x10,-1976 # 80005d88 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: e6750513 addi x10,x10,-409 # 800073e7 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 78852503 lw x10,1928(x10) # 80005d30 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00002517 auipc x10,0x2 +800035c4: 7c850513 addi x10,x10,1992 # 80005d88 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 76852503 lw x10,1896(x10) # 80005d50 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: dfe50513 addi x10,x10,-514 # 800073fe +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 71052503 lw x10,1808(x10) # 80005d38 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: dd550513 addi x10,x10,-555 # 80007415 +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00002517 auipc x10,0x2 +8000366c: 6c852503 lw x10,1736(x10) # 80005d30 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00002517 auipc x10,0x2 +80003688: 6cc52503 lw x10,1740(x10) # 80005d50 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: deb50513 addi x10,x10,-533 # 8000748b +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: e8150513 addi x10,x10,-383 # 80007561 +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: f3450513 addi x10,x10,-204 # 80007654 +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: fef50513 addi x10,x10,-17 # 8000774f +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 09650513 addi x10,x10,150 # 80007836 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: c6350513 addi x10,x10,-925 # 80007443 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 56062603 lw x12,1376(x12) # 80005d68 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: c0c50513 addi x10,x10,-1012 # 8000642c +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 50850513 addi x10,x10,1288 # 80005d88 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 4f058593 addi x11,x11,1264 # 80005db0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 52458593 addi x11,x11,1316 # 80005e10 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 92e50513 addi x10,x10,-1746 # 8000624e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 58450513 addi x10,x10,1412 # 80006ee4 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 3d060613 addi x12,x12,976 # 80005d60 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: aad50513 addi x10,x10,-1363 # 8000644d +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 3a052503 lw x10,928(x10) # 80005d68 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 3a850513 addi x10,x10,936 # 80005d88 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: a3d50513 addi x10,x10,-1475 # 8000645d +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 32852503 lw x10,808(x10) # 80005d70 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 32850513 addi x10,x10,808 # 80005d88 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: 9cd50513 addi x10,x10,-1587 # 8000646d +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 2b052503 lw x10,688(x10) # 80005d78 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 2a850513 addi x10,x10,680 # 80005d88 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: 95d50513 addi x10,x10,-1699 # 8000647d +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 23852503 lw x10,568(x10) # 80005d80 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 22850513 addi x10,x10,552 # 80005d88 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 1d860613 addi x12,x12,472 # 80005d60 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 1e860613 addi x12,x12,488 # 80005d88 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f4030313 addi x6,x6,-192 # 80000fdc +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f2830313 addi x6,x6,-216 # 80000fdc +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f1030313 addi x6,x6,-240 # 80000fdc +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: dac78793 addi x15,x15,-596 # 80000fec +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 4c010113 addi x2,x2,1216 # 80007960 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006f0d .word 0x80006f0d +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 05828293 addi x5,x5,88 # 80016600 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 03828293 addi x5,x5,56 # 80016600 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-orn-00.elf.objdump b/riscv-tests/rv32-Zbkb-orn-00.elf.objdump new file mode 100644 index 0000000..c317e81 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-orn-00.elf.objdump @@ -0,0 +1,13197 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-orn-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-orn-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00018520 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020600 80020600 00021600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002676 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000079 00000000 00000000 00024cf1 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d6a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d8d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024da0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000087 00000000 00000000 00024dc8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e4f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020600 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccN65J2a.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_orn_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b1 +80009020 l .data 00000000 Zbkb_orn_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b2 +80009050 l .data 00000000 Zbkb_orn_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b3 +80009080 l .data 00000000 Zbkb_orn_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090b0 l .data 00000000 Zbkb_orn_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b5 +800090e0 l .data 00000000 Zbkb_orn_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b6 +80009110 l .data 00000000 Zbkb_orn_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b7 +80009140 l .data 00000000 Zbkb_orn_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b8 +80009170 l .data 00000000 Zbkb_orn_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b9 +800091a0 l .data 00000000 Zbkb_orn_cg_cp_rs1_b9_str +80000224 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b10 +800091d1 l .data 00000000 Zbkb_orn_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b11 +80009203 l .data 00000000 Zbkb_orn_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b12 +80009235 l .data 00000000 Zbkb_orn_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b13 +80009267 l .data 00000000 Zbkb_orn_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b14 +80009299 l .data 00000000 Zbkb_orn_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b15 +800092cb l .data 00000000 Zbkb_orn_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b16 +800092fd l .data 00000000 Zbkb_orn_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b17 +8000932f l .data 00000000 Zbkb_orn_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b18 +80009361 l .data 00000000 Zbkb_orn_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b19 +80009393 l .data 00000000 Zbkb_orn_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b20 +800093c5 l .data 00000000 Zbkb_orn_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b21 +800093f7 l .data 00000000 Zbkb_orn_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b22 +80009429 l .data 00000000 Zbkb_orn_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b23 +8000945b l .data 00000000 Zbkb_orn_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b24 +8000948d l .data 00000000 Zbkb_orn_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b25 +800094bf l .data 00000000 Zbkb_orn_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b26 +800094f1 l .data 00000000 Zbkb_orn_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b27 +80009523 l .data 00000000 Zbkb_orn_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b28 +80009555 l .data 00000000 Zbkb_orn_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b29 +80009587 l .data 00000000 Zbkb_orn_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b30 +800095b9 l .data 00000000 Zbkb_orn_cg_cp_rs1_b30_str +800005c4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_b31 +800095eb l .data 00000000 Zbkb_orn_cg_cp_rs1_b31_str +800005f0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b0 +8000961d l .data 00000000 Zbkb_orn_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b1 +8000964e l .data 00000000 Zbkb_orn_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b2 +8000967f l .data 00000000 Zbkb_orn_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b3 +800096b0 l .data 00000000 Zbkb_orn_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +800096e1 l .data 00000000 Zbkb_orn_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b5 +80009712 l .data 00000000 Zbkb_orn_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b6 +80009743 l .data 00000000 Zbkb_orn_cg_cp_rs2_b6_str +80000730 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b7 +80009774 l .data 00000000 Zbkb_orn_cg_cp_rs2_b7_str +8000075c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b8 +800097a5 l .data 00000000 Zbkb_orn_cg_cp_rs2_b8_str +80000788 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b9 +800097d6 l .data 00000000 Zbkb_orn_cg_cp_rs2_b9_str +800007b4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b10 +80009807 l .data 00000000 Zbkb_orn_cg_cp_rs2_b10_str +800007e0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b11 +80009839 l .data 00000000 Zbkb_orn_cg_cp_rs2_b11_str +8000080c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b12 +8000986b l .data 00000000 Zbkb_orn_cg_cp_rs2_b12_str +80000840 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b13 +8000989d l .data 00000000 Zbkb_orn_cg_cp_rs2_b13_str +8000086c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b14 +800098cf l .data 00000000 Zbkb_orn_cg_cp_rs2_b14_str +80000898 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b15 +80009901 l .data 00000000 Zbkb_orn_cg_cp_rs2_b15_str +800008c4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b16 +80009933 l .data 00000000 Zbkb_orn_cg_cp_rs2_b16_str +800008f4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b17 +80009965 l .data 00000000 Zbkb_orn_cg_cp_rs2_b17_str +80000920 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b18 +80009997 l .data 00000000 Zbkb_orn_cg_cp_rs2_b18_str +8000094c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b19 +800099c9 l .data 00000000 Zbkb_orn_cg_cp_rs2_b19_str +80000978 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b20 +800099fb l .data 00000000 Zbkb_orn_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b21 +80009a2d l .data 00000000 Zbkb_orn_cg_cp_rs2_b21_str +800009d0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b22 +80009a5f l .data 00000000 Zbkb_orn_cg_cp_rs2_b22_str +800009fc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b23 +80009a91 l .data 00000000 Zbkb_orn_cg_cp_rs2_b23_str +80000a28 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b24 +80009ac3 l .data 00000000 Zbkb_orn_cg_cp_rs2_b24_str +80000a54 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b25 +80009af5 l .data 00000000 Zbkb_orn_cg_cp_rs2_b25_str +80000a80 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b26 +80009b27 l .data 00000000 Zbkb_orn_cg_cp_rs2_b26_str +80000aac l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b27 +80009b59 l .data 00000000 Zbkb_orn_cg_cp_rs2_b27_str +80000adc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b28 +80009b8b l .data 00000000 Zbkb_orn_cg_cp_rs2_b28_str +80000b08 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b29 +80009bbd l .data 00000000 Zbkb_orn_cg_cp_rs2_b29_str +80000b34 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b30 +80009bef l .data 00000000 Zbkb_orn_cg_cp_rs2_b30_str +80000b60 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_b31 +80009c21 l .data 00000000 Zbkb_orn_cg_cp_rs2_b31_str +80000b8c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b0 +80009c53 l .data 00000000 Zbkb_orn_cg_cp_rd_b0_str +80000bb8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b1 +80009c83 l .data 00000000 Zbkb_orn_cg_cp_rd_b1_str +80000be8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b2 +80009cb3 l .data 00000000 Zbkb_orn_cg_cp_rd_b2_str +80000c14 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b3 +80009ce3 l .data 00000000 Zbkb_orn_cg_cp_rd_b3_str +80000c48 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b4 +80009d13 l .data 00000000 Zbkb_orn_cg_cp_rd_b4_str +80000c74 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b5 +80009d43 l .data 00000000 Zbkb_orn_cg_cp_rd_b5_str +80000ca0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b6 +80009d73 l .data 00000000 Zbkb_orn_cg_cp_rd_b6_str +80000ccc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b7 +80009da3 l .data 00000000 Zbkb_orn_cg_cp_rd_b7_str +80000cf8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b8 +80009dd3 l .data 00000000 Zbkb_orn_cg_cp_rd_b8_str +80000d24 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b9 +80009e03 l .data 00000000 Zbkb_orn_cg_cp_rd_b9_str +80000d54 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b10 +80009e33 l .data 00000000 Zbkb_orn_cg_cp_rd_b10_str +80000d80 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b11 +80009e64 l .data 00000000 Zbkb_orn_cg_cp_rd_b11_str +80000dac l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b12 +80009e95 l .data 00000000 Zbkb_orn_cg_cp_rd_b12_str +80000de0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b13 +80009ec6 l .data 00000000 Zbkb_orn_cg_cp_rd_b13_str +80000e0c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b14 +80009ef7 l .data 00000000 Zbkb_orn_cg_cp_rd_b14_str +80000e38 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b15 +80009f28 l .data 00000000 Zbkb_orn_cg_cp_rd_b15_str +80000e64 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b16 +80009f59 l .data 00000000 Zbkb_orn_cg_cp_rd_b16_str +80000e90 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b17 +80009f8a l .data 00000000 Zbkb_orn_cg_cp_rd_b17_str +80000ebc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b18 +80009fbb l .data 00000000 Zbkb_orn_cg_cp_rd_b18_str +80000ee8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b19 +80009fec l .data 00000000 Zbkb_orn_cg_cp_rd_b19_str +80000f14 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b20 +8000a01d l .data 00000000 Zbkb_orn_cg_cp_rd_b20_str +80000f40 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b21 +8000a04e l .data 00000000 Zbkb_orn_cg_cp_rd_b21_str +80000f6c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b22 +8000a07f l .data 00000000 Zbkb_orn_cg_cp_rd_b22_str +80000f9c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b23 +8000a0b0 l .data 00000000 Zbkb_orn_cg_cp_rd_b23_str +80000fc8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b24 +8000a0e1 l .data 00000000 Zbkb_orn_cg_cp_rd_b24_str +80000ff4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b25 +8000a112 l .data 00000000 Zbkb_orn_cg_cp_rd_b25_str +80001020 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b26 +8000a143 l .data 00000000 Zbkb_orn_cg_cp_rd_b26_str +8000104c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b27 +8000a174 l .data 00000000 Zbkb_orn_cg_cp_rd_b27_str +80001078 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b28 +8000a1a5 l .data 00000000 Zbkb_orn_cg_cp_rd_b28_str +800010a4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b29 +8000a1d6 l .data 00000000 Zbkb_orn_cg_cp_rd_b29_str +800010d4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b30 +8000a207 l .data 00000000 Zbkb_orn_cg_cp_rd_b30_str +80001100 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rd_b31 +8000a238 l .data 00000000 Zbkb_orn_cg_cp_rd_b31_str +8000112c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x0 +8000a269 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x0_str +80001158 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x1 +8000a2a1 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x1_str +80001184 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x2 +8000a2d9 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x2_str +800011b0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x80000000 +8000a311 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x80000000_str +800011dc l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x80000001 +8000a351 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x80000001_str +80001208 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x7fffffff +8000a391 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x7fffffff_str +80001234 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x7ffffffe +8000a3d1 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x7ffffffe_str +80001260 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0xffffffff +8000a411 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0xffffffff_str +8000128c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0xfffffffe +8000a451 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0xfffffffe_str +800012b8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x5bbc8872 +8000a491 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x5bbc8872_str +800012e4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaa +8000a4d1 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaa_str +80001310 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs1_edges_0x55555555 +8000a511 l .data 00000000 Zbkb_orn_cg_cp_rs1_edges_0x55555555_str +8000133c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x0 +8000a551 l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x0_str +80001368 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x1 +8000a58a l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x1_str +80001394 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x2 +8000a5c3 l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x2_str +800013c0 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x80000000 +8000a5fc l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x80000000_str +800013ec l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x80000001 +8000a63c l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x80000001_str +80001418 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x7fffffff +8000a67c l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x7fffffff_str +80001444 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x7ffffffe +8000a6bc l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x7ffffffe_str +80001470 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0xffffffff +8000a6fc l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0xffffffff_str +8000149c l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0xfffffffe +8000a73c l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0xfffffffe_str +800014c8 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x5bbc8872 +8000a77c l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x5bbc8872_str +800014f4 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaa +8000a7bc l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaa_str +80001520 l .text.rvtest 00000000 Zbkb_orn_cg_cp_rs2_edges_0x55555555 +8000a7fc l .data 00000000 Zbkb_orn_cg_cp_rs2_edges_0x55555555_str +8000154c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a83c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001578 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a88c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015a4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a8dc l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015d0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a92c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +800015fc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a983 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001628 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000a9da l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001654 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000aa31 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001680 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000aa88 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016ac l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aadf l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016d8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000ab36 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001704 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ab8d l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001730 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000abe4 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000175c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000ac3b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001788 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ac8b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017b4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000acdb l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017e0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000ad2b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000180c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ad82 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001838 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000add9 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001864 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000ae30 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001890 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000ae87 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018bc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000aede l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018e8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000af35 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001914 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000af8c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001940 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000afe3 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000196c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b03a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +80001998 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b08a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019c4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b0da l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019f0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b12a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a1c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b181 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a48 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b1d8 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a74 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b22f l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aa0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b286 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001acc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b2dd l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001af8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b334 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b24 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b38b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b50 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b3e2 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b7c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b439 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001ba8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b490 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bd4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b4e7 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c00 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b53e l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c2c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b59c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c58 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b5fa l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c84 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b658 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cb0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b6b6 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cdc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b714 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d08 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b772 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d34 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b7d0 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d60 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b82e l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d8c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b88c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001db8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b8e3 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001de4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b93a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e10 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000b991 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e3c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000b9ef l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e68 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000ba4d l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e94 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000baab l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ec0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bb09 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001eec l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bb67 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f18 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bbc5 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f44 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bc23 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f70 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bc81 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001f9c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bcdf l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fc8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bd36 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ff4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bd8d l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002020 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bde4 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000204c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000be42 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002078 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000bea0 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020a4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000befe l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020d0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000bf5c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +800020fc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000bfba l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002128 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c018 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002154 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c076 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002180 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c0d4 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021ac l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c132 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021d8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c189 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002204 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c1e0 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002230 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c237 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000225c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c295 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002288 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c2f3 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022b4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c351 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022e0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c3af l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000230c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c40d l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002338 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c46b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002364 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c4c9 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002390 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c527 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023bc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c585 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023e8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c5dc l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002414 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c633 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002440 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c68a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000246c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c6e8 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +80002498 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c746 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024c4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c7a4 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024f0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c802 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000251c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c860 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002548 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c8be l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002574 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c91c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025a0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000c97a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025cc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000c9d8 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025f8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ca2f l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002624 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000ca86 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002650 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cadd l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000267c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cb3b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026a8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cb99 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026d4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cbf7 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002700 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cc55 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000272c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ccb3 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002758 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cd11 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002784 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cd6f l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027b0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cdcd l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027dc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000ce2b l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002808 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000ce82 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002834 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000ced9 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002860 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000cf30 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +8000288c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000cf8e l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028b8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000cfec l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028e4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d04a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002910 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d0a8 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000293c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d106 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002968 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d164 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +80002994 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d1c2 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029c0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d220 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029ec l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d27e l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a18 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d2d5 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a44 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d32c l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a70 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d383 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002a9c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d3e1 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ac8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d43f l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002af4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d49d l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b20 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d4fb l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b4c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d559 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b78 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d5b7 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002ba4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d615 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bd0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d673 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002bfc l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d6d1 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c28 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d728 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c54 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d77f l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c80 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d7d6 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cac l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d834 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cd8 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d892 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d04 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d8f0 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d30 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000d94e l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d5c l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000d9ac l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d88 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000da0a l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002db4 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000da68 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002de0 l .text.rvtest 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dac6 l .data 00000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e0c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b0 +8000db24 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b0_str +80002e38 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b1 +8000db5b l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b1_str +80002e64 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b2 +8000db92 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b2_str +80002e90 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b3 +8000dbc9 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b3_str +80002ec4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b4 +8000dc00 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b4_str +80002ef0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b5 +8000dc37 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b5_str +80002f1c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b6 +8000dc6e l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b6_str +80002f50 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b7 +8000dca5 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b7_str +80002f7c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b8 +8000dcdc l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b8_str +80002fa8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b9 +8000dd13 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b9_str +80002fd4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b10 +8000dd4a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b10_str +80003000 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b11 +8000dd82 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b11_str +80003030 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b12 +8000ddba l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b12_str +80003064 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b13 +8000ddf2 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b13_str +80003090 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b14 +8000de2a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b14_str +800030c0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b15 +8000de62 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b15_str +800030ec l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b16 +8000de9a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b17 +8000ded2 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b18 +8000df0a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b18_str +80003170 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b19 +8000df42 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b19_str +8000319c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b20 +8000df7a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b20_str +800031c8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b21 +8000dfb2 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b21_str +800031f4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b22 +8000dfea l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b22_str +80003220 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b23 +8000e022 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b23_str +8000324c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b24 +8000e05a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b24_str +80003278 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b25 +8000e092 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b25_str +800032a4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b26 +8000e0ca l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b26_str +800032d0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b27 +8000e102 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b27_str +800032fc l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b28 +8000e13a l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b28_str +80003328 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b29 +8000e172 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b29_str +80003354 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b30 +8000e1aa l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b30_str +80003384 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b31 +8000e1e2 l .data 00000000 Zbkb_orn_cg_cmp_rs1_rs2_b31_str +800033b0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b0 +8000e21a l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b0_str +800033e0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b1 +8000e250 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b1_str +8000340c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b2 +8000e286 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b2_str +8000343c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b3 +8000e2bc l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b3_str +80003468 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b4 +8000e2f2 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b4_str +80003494 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b5 +8000e328 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b5_str +800034c0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b6 +8000e35e l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b6_str +800034f4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b7 +8000e394 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b7_str +80003520 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b8 +8000e3ca l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b8_str +8000354c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b9 +8000e400 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b9_str +80003578 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b10 +8000e436 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b10_str +800035a4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b11 +8000e46d l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b11_str +800035d0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b12 +8000e4a4 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b12_str +80003604 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b13 +8000e4db l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b13_str +80003630 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b14 +8000e512 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b14_str +80003660 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b15 +8000e549 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b16 +8000e580 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b17 +8000e5b7 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b17_str +800036e4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b18 +8000e5ee l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b18_str +80003710 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b19 +8000e625 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b19_str +8000373c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b20 +8000e65c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b20_str +80003768 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b21 +8000e693 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b21_str +80003794 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b22 +8000e6ca l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b23 +8000e701 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b24 +8000e738 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b25 +8000e76f l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b26 +8000e7a6 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b27 +8000e7dd l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b27_str +800038a8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b28 +8000e814 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b28_str +800038d4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b29 +8000e84b l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b29_str +80003900 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b30 +8000e882 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b30_str +80003930 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_b31 +8000e8b9 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_b31_str +8000395c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b0 +8000e8f0 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b0_str +80003988 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b1 +8000e926 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b1_str +800039b4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b2 +8000e95c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b2_str +800039e0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b3 +8000e992 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b3_str +80003a0c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b4 +8000e9c8 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b4_str +80003a38 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b5 +8000e9fe l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b5_str +80003a68 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b6 +8000ea34 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b6_str +80003a9c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b7 +8000ea6a l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b7_str +80003ac8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b8 +8000eaa0 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b8_str +80003af4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b9 +8000ead6 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b9_str +80003b20 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b10 +8000eb0c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b10_str +80003b4c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b11 +8000eb43 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b11_str +80003b78 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b12 +8000eb7a l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b12_str +80003bac l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b13 +8000ebb1 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b13_str +80003bd8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b14 +8000ebe8 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b14_str +80003c04 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b15 +8000ec1f l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b15_str +80003c30 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b16 +8000ec56 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b16_str +80003c5c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b17 +8000ec8d l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b17_str +80003c88 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b18 +8000ecc4 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b18_str +80003cb8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b19 +8000ecfb l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b19_str +80003ce8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b20 +8000ed32 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b20_str +80003d14 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b21 +8000ed69 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b21_str +80003d40 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b22 +8000eda0 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b22_str +80003d6c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b23 +8000edd7 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b23_str +80003d98 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b24 +8000ee0e l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b24_str +80003dc4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b25 +8000ee45 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b25_str +80003df0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b26 +8000ee7c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b26_str +80003e1c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b27 +8000eeb3 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b27_str +80003e48 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b28 +8000eeea l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b28_str +80003e74 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b29 +8000ef21 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b29_str +80003ea0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b30 +8000ef58 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b30_str +80003ecc l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs2_b31 +8000ef8f l .data 00000000 Zbkb_orn_cg_cmp_rd_rs2_b31_str +80003ef8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b0 +8000efc6 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b0_str +80003f24 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b1 +8000f000 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b1_str +80003f50 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b2 +8000f03a l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b2_str +80003f7c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b3 +8000f074 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b3_str +80003fb0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b4 +8000f0ae l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b4_str +80003fdc l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b5 +8000f0e8 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b5_str +80004008 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b6 +8000f122 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b6_str +80004034 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b7 +8000f15c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b7_str +80004060 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b8 +8000f196 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b8_str +8000408c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b9 +8000f1d0 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b9_str +800040b8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b10 +8000f20a l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b10_str +800040e4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b11 +8000f245 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b11_str +80004110 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b12 +8000f280 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b12_str +80004144 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b13 +8000f2bb l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b13_str +80004170 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b14 +8000f2f6 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b15 +8000f331 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b15_str +800041cc l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b16 +8000f36c l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b16_str +800041f8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b17 +8000f3a7 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b17_str +80004228 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b18 +8000f3e2 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b18_str +80004254 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b19 +8000f41d l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b19_str +80004280 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b20 +8000f458 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b20_str +800042ac l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b21 +8000f493 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b21_str +800042d8 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b22 +8000f4ce l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b23 +8000f509 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b24 +8000f544 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b25 +8000f57f l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b26 +8000f5ba l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b26_str +800043b4 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b27 +8000f5f5 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b27_str +800043e0 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b28 +8000f630 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b28_str +80004410 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b29 +8000f66b l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b29_str +8000443c l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b30 +8000f6a6 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b30_str +80004468 l .text.rvtest 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b31 +8000f6e1 l .data 00000000 Zbkb_orn_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004498 l .text.rvtest 00000000 exit_Mcleanup +8000449c l .text.rvtest 00000000 resto_Medeleg +800044a4 l .text.rvtest 00000000 resto_Msatp +800044a8 l .text.rvtest 00000000 resto_Mscratch +800044b0 l .text.rvtest 00000000 resto_Mxtvec +800044c4 l .text.rvtest 00000000 resto_Mtramp +800044c8 l .text.rvtest 00000000 resto_Mloop +800044e0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +8000fd9d l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000fdd5 l .data 00000000 begin_debugstr +8000fe35 l .data 00000000 trap_sig_overflowstr +800109e0 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011ab8 l .data 00000000 trap_sigptr +80011ab0 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000ff89 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8000fdf7 l .data 00000000 abortstr +8000fd64 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80011417 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000f888 l .data 00000000 ascii_buffer +8000fe9e l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f868 l .data 00000000 saved_xepc +8002051c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +8000ffa0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +800100a2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +8001019d l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010290 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80010403 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000f720 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000f720 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000f848 l .data 00000000 failure_diag_type +8000f858 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000f850 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010387 l .data 00000000 sv_Mtval2_str +800103c5 l .data 00000000 sv_Mtinst_str +8000ffe0 l .data 00000000 sv_Svect_str +800100e0 l .data 00000000 sv_Scause_str +800101d9 l .data 00000000 sv_Sepc_str +800102cd l .data 00000000 sv_Stval_str +8001043e l .data 00000000 sv_Sip_str +80010020 l .data 00000000 sv_Hvect_str +8001011e l .data 00000000 sv_Hcause_str +80010215 l .data 00000000 sv_Hepc_str +8001030a l .data 00000000 sv_Htval_str +80010479 l .data 00000000 sv_Hip_str +80010061 l .data 00000000 sv_Vvect_str +8001015d l .data 00000000 sv_Vcause_str +80010252 l .data 00000000 sv_Vepc_str +80010348 l .data 00000000 sv_Vtval_str +800104b5 l .data 00000000 sv_Vip_str +800104f2 l .data 00000000 Mclr_Mext_int_str +80010541 l .data 00000000 Mclr_Sext_int_str +8001063c l .data 00000000 Sclr_Sext_int_str +80010738 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000f854 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +8000fe8c l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000f840 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +8000fea0 l .data 00000000 inststr +8000f820 l .data 00000000 failing_instruction +8000feb4 l .data 00000000 addrstr +8000f828 l .data 00000000 failing_addr +800108eb l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000f824 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010a01 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +800108e4 l .data 00000000 vxsatstr +800108fc l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000f830 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010913 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000f838 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001092a l .data 00000000 failure_diag_bad_instr_str +80010988 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010a2d l .data 00000000 trap_diag_header_str +80010a59 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010a69 l .data 00000000 trap_diag_expected_offset_str +80010a94 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010ac3 l .data 00000000 trap_diag_extra_traps_str +80010b2b l .data 00000000 trap_diag_diff_bytes_str +80010b52 l .data 00000000 trap_diag_extra_next_step_str +80010aef l .data 00000000 trap_diag_missing_traps_str +80010c3a l .data 00000000 trap_diag_missing_next_step_str +80010d21 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80010d5d l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +80010d3b l .data 00000000 trap_diag_mode_m_str +80010d43 l .data 00000000 trap_diag_mode_s_str +80010d4b l .data 00000000 trap_diag_mode_hs_str +80010d54 l .data 00000000 trap_diag_mode_vs_str +80010d66 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80010ebd l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +80010d80 l .data 00000000 trap_diag_field_vect_str +80010db1 l .data 00000000 trap_diag_field_cause_str +80010dd1 l .data 00000000 trap_diag_field_epc_str +80010def l .data 00000000 trap_diag_field_tval_str +80010e0e l .data 00000000 trap_diag_field_ip_str +80010e36 l .data 00000000 trap_diag_field_tval2_str +80010e62 l .data 00000000 trap_diag_field_tinst_str +80010e8e l .data 00000000 trap_diag_field_intid_str +80010ecc l .data 00000000 trap_diag_expected_str +80010ee3 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +80010efa l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80010f11 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80010f87 l .data 00000000 trap_diag_hint_vect_str +8001105d l .data 00000000 trap_diag_hint_cause_str +80011150 l .data 00000000 trap_diag_hint_epc_str +8001124b l .data 00000000 trap_diag_hint_tval_str +80011332 l .data 00000000 trap_diag_hint_ip_str +80010f3f l .data 00000000 trap_diag_generic_str +8000ff28 l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000f8b0 l .data 00000000 trap_excpt_name_tbl +8000f910 l .data 00000000 trap_int_name_tbl +8000fd4e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000f860 l .data 00000000 csr_context_ret_addr +8000ff49 l .data 00000000 mepcstr +8000ff59 l .data 00000000 mcausestr +8000f870 l .data 00000000 saved_xcause +8000ff69 l .data 00000000 mtvalstr +8000f878 l .data 00000000 saved_xtval +8000ff79 l .data 00000000 mstatusstr +8000f880 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011460 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010a09 l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000f8b0 l .data 00000000 end_failure_scratch +8000f950 l .data 00000000 trap_excpt_name_0 +8000f970 l .data 00000000 trap_excpt_name_1 +8000f98a l .data 00000000 trap_excpt_name_2 +8000f99f l .data 00000000 trap_excpt_name_3 +8000f9ab l .data 00000000 trap_excpt_name_4 +8000f9c4 l .data 00000000 trap_excpt_name_5 +8000f9d7 l .data 00000000 trap_excpt_name_6 +8000f9f5 l .data 00000000 trap_excpt_name_7 +8000fa0d l .data 00000000 trap_excpt_name_8 +8000fa2b l .data 00000000 trap_excpt_name_9 +8000fa49 l .data 00000000 trap_excpt_name_10 +8000fa68 l .data 00000000 trap_excpt_name_11 +8000fa86 l .data 00000000 trap_excpt_name_12 +8000fa9e l .data 00000000 trap_excpt_name_13 +8000faaf l .data 00000000 trap_excpt_name_14 +8000fabe l .data 00000000 trap_excpt_name_15 +8000fad4 l .data 00000000 trap_excpt_name_16 +8000fae1 l .data 00000000 trap_excpt_name_17 +8000faf0 l .data 00000000 trap_excpt_name_18 +8000fb00 l .data 00000000 trap_excpt_name_19 +8000fb10 l .data 00000000 trap_excpt_name_20 +8000fb2e l .data 00000000 trap_excpt_name_21 +8000fb45 l .data 00000000 trap_excpt_name_22 +8000fb5a l .data 00000000 trap_excpt_name_23 +8000fb76 l .data 00000000 trap_int_name_0 +8000fb8e l .data 00000000 trap_int_name_1 +8000fbad l .data 00000000 trap_int_name_2 +8000fbd4 l .data 00000000 trap_int_name_3 +8000fbf0 l .data 00000000 trap_int_name_4 +8000fc08 l .data 00000000 trap_int_name_5 +8000fc24 l .data 00000000 trap_int_name_6 +8000fc48 l .data 00000000 trap_int_name_7 +8000fc61 l .data 00000000 trap_int_name_8 +8000fc79 l .data 00000000 trap_int_name_9 +8000fc98 l .data 00000000 trap_int_name_10 +8000fcbf l .data 00000000 trap_int_name_11 +8000fcdb l .data 00000000 trap_int_name_12 +8000fd00 l .data 00000000 trap_int_name_13 +8000fd1c l .data 00000000 trap_int_name_14 +8000fd35 l .data 00000000 trap_int_name_15 +8000fef5 l .data 00000000 xepcstr +80010593 l .data 00000000 Mclr_Vext_int_str +800105ed l .data 00000000 Sclr_Mext_int_str +8001068e l .data 00000000 Sclr_Vext_int_str +800106e8 l .data 00000000 Hclr_Mext_int_str +8001078b l .data 00000000 Hclr_Vext_int_str +800107e6 l .data 00000000 Vclr_Mext_int_str +80010836 l .data 00000000 Vclr_Sext_int_str +80010889 l .data 00000000 Vclr_Vext_int_str +80010f28 l .data 00000000 trap_diag_curr_xepc_str +80020520 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80020520 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044e0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011460 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004488 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011460 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8001145b g .data 00000000 rvtest_data_end +80004488 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020700 g .tohost 00000000 fromhost +80020600 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x87d742f3 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x1fbd3b8f +80000048: 0001a303 lw x6,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_orn_cg_cp_rs1_b0: + orn x19, x0, x6 # perform operation +80000050: 406069b3 orn x19,x0,x6 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_orn_cg_cp_rs1_b0, Zbkb_orn_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01320863 beq x4,x19,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x68a65367 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xd940ea44 +80000074: 0001a703 lw x14,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_orn_cg_cp_rs1_b1: + orn x17, x1, x14 # perform operation +8000007c: 40e0e8b3 orn x17,x1,x14 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkb_orn_cg_cp_rs1_b1, Zbkb_orn_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01120863 beq x4,x17,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009020 .word 0x80009020 +80000094: 00410113 addi x2,x2,4 + + mv x23, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010b93 addi x23,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xe2b0cbd8 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x8d54f08b +800000a4: 0001a403 lw x8,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_orn_cg_cp_rs1_b2: + orn x26, x2, x8 # perform operation +800000ac: 40816d33 orn x26,x2,x8 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_orn_cg_cp_rs1_b2, Zbkb_orn_cg_cp_rs1_b2_str) +800000b0: 000ba203 lw x4,0(x23) +800000b4: 01a20863 beq x4,x26,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009050 .word 0x80009050 +800000c4: 004b8b93 addi x23,x23,4 + + mv x10, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xf08cc69d +800000cc: 00052183 lw x3,0(x10) +800000d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x76854403 +800000d4: 00052683 lw x13,0(x10) +800000d8: 00450513 addi x10,x10,4 + +800000dc : +Zbkb_orn_cg_cp_rs1_b3: + orn x8, x3, x13 # perform operation +800000dc: 40d1e433 orn x8,x3,x13 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_orn_cg_cp_rs1_b3, Zbkb_orn_cg_cp_rs1_b3_str) +800000e0: 000ba203 lw x4,0(x23) +800000e4: 00820863 beq x4,x8,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009080 .word 0x80009080 +800000f4: 004b8b93 addi x23,x23,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x68b4daae +80000100: 00052203 lw x4,0(x10) +80000104: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xe0af5a04 +80000108: 00052c83 lw x25,0(x10) +8000010c: 00450513 addi x10,x10,4 + +80000110 : +Zbkb_orn_cg_cp_rs1_b4: + orn x21, x4, x25 # perform operation +80000110: 41926ab3 orn x21,x4,x25 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_orn_cg_cp_rs1_b4, Zbkb_orn_cg_cp_rs1_b4_str) +80000114: 000ba383 lw x7,0(x23) +80000118: 01538863 beq x7,x21,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090b0 .word 0x800090b0 +80000128: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x4289a6a7 +8000012c: 00052283 lw x5,0(x10) +80000130: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0f892144 +80000134: 00052d03 lw x26,0(x10) +80000138: 00450513 addi x10,x10,4 + +8000013c : +Zbkb_orn_cg_cp_rs1_b5: + orn x15, x5, x26 # perform operation +8000013c: 41a2e7b3 orn x15,x5,x26 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_orn_cg_cp_rs1_b5, Zbkb_orn_cg_cp_rs1_b5_str) +80000140: 000ba383 lw x7,0(x23) +80000144: 00f38863 beq x7,x15,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 800090e0 .word 0x800090e0 +80000154: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xd3ad0d69 +80000158: 00052303 lw x6,0(x10) +8000015c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x1c723fa7 +80000160: 00052283 lw x5,0(x10) +80000164: 00450513 addi x10,x10,4 + +80000168 : +Zbkb_orn_cg_cp_rs1_b6: + orn x25, x6, x5 # perform operation +80000168: 40536cb3 orn x25,x6,x5 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_orn_cg_cp_rs1_b6, Zbkb_orn_cg_cp_rs1_b6_str) +8000016c: 000ba383 lw x7,0(x23) +80000170: 01938863 beq x7,x25,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009110 .word 0x80009110 +80000180: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x1fc91fcb +8000018c: 00052383 lw x7,0(x10) +80000190: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xb58d3f3a +80000194: 00052a83 lw x21,0(x10) +80000198: 00450513 addi x10,x10,4 + +8000019c : +Zbkb_orn_cg_cp_rs1_b7: + orn x9, x7, x21 # perform operation +8000019c: 4153e4b3 orn x9,x7,x21 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_orn_cg_cp_rs1_b7, Zbkb_orn_cg_cp_rs1_b7_str) +800001a0: 000ba203 lw x4,0(x23) +800001a4: 00920863 beq x4,x9,800001b4 +800001a8: 358052ef jal x5,80005500 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009140 .word 0x80009140 +800001b4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x4cfed39c +800001b8: 00052403 lw x8,0(x10) +800001bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x24da99c1 +800001c0: 00052683 lw x13,0(x10) +800001c4: 00450513 addi x10,x10,4 + +800001c8 : +Zbkb_orn_cg_cp_rs1_b8: + orn x27, x8, x13 # perform operation +800001c8: 40d46db3 orn x27,x8,x13 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_orn_cg_cp_rs1_b8, Zbkb_orn_cg_cp_rs1_b8_str) +800001cc: 000ba203 lw x4,0(x23) +800001d0: 01b20863 beq x4,x27,800001e0 +800001d4: 32c052ef jal x5,80005500 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009170 .word 0x80009170 +800001e0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8f3e07d6 +800001e4: 00052483 lw x9,0(x10) +800001e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x01877e5a +800001ec: 00052f83 lw x31,0(x10) +800001f0: 00450513 addi x10,x10,4 + +800001f4 : +Zbkb_orn_cg_cp_rs1_b9: + orn x11, x9, x31 # perform operation +800001f4: 41f4e5b3 orn x11,x9,x31 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_orn_cg_cp_rs1_b9, Zbkb_orn_cg_cp_rs1_b9_str) +800001f8: 000ba203 lw x4,0(x23) +800001fc: 00b20863 beq x4,x11,8000020c +80000200: 300052ef jal x5,80005500 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091a0 .word 0x800091a0 +8000020c: 004b8b93 addi x23,x23,4 + + mv x1, x10 # switch data pointer register to avoid conflict with test +80000210: 00050093 addi x1,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x2371ce2b +80000214: 0000a503 lw x10,0(x1) +80000218: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x5b3b6444 +8000021c: 0000a183 lw x3,0(x1) +80000220: 00408093 addi x1,x1,4 + +80000224 : +Zbkb_orn_cg_cp_rs1_b10: + orn x21, x10, x3 # perform operation +80000224: 40356ab3 orn x21,x10,x3 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_orn_cg_cp_rs1_b10, Zbkb_orn_cg_cp_rs1_b10_str) +80000228: 000ba203 lw x4,0(x23) +8000022c: 01520863 beq x4,x21,8000023c +80000230: 2d0052ef jal x5,80005500 +80000234: 80000224 .word 0x80000224 +80000238: 800091d1 .word 0x800091d1 +8000023c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x88ef0f05 +80000240: 0000a583 lw x11,0(x1) +80000244: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x196fcaa8 +80000248: 0000aa83 lw x21,0(x1) +8000024c: 00408093 addi x1,x1,4 + +80000250 : +Zbkb_orn_cg_cp_rs1_b11: + orn x12, x11, x21 # perform operation +80000250: 4155e633 orn x12,x11,x21 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_orn_cg_cp_rs1_b11, Zbkb_orn_cg_cp_rs1_b11_str) +80000254: 000ba203 lw x4,0(x23) +80000258: 00c20863 beq x4,x12,80000268 +8000025c: 2a4052ef jal x5,80005500 +80000260: 80000250 .word 0x80000250 +80000264: 80009203 .word 0x80009203 +80000268: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xc67c3c81 +8000026c: 0000a603 lw x12,0(x1) +80000270: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x87dcd558 +80000274: 0000aa83 lw x21,0(x1) +80000278: 00408093 addi x1,x1,4 + +8000027c : +Zbkb_orn_cg_cp_rs1_b12: + orn x29, x12, x21 # perform operation +8000027c: 41566eb3 orn x29,x12,x21 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_orn_cg_cp_rs1_b12, Zbkb_orn_cg_cp_rs1_b12_str) +80000280: 000ba203 lw x4,0(x23) +80000284: 01d20863 beq x4,x29,80000294 +80000288: 278052ef jal x5,80005500 +8000028c: 8000027c .word 0x8000027c +80000290: 80009235 .word 0x80009235 +80000294: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x2c7d176e +80000298: 0000a683 lw x13,0(x1) +8000029c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x718b0cb9 +800002a0: 0000af03 lw x30,0(x1) +800002a4: 00408093 addi x1,x1,4 + +800002a8 : +Zbkb_orn_cg_cp_rs1_b13: + orn x17, x13, x30 # perform operation +800002a8: 41e6e8b3 orn x17,x13,x30 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_orn_cg_cp_rs1_b13, Zbkb_orn_cg_cp_rs1_b13_str) +800002ac: 000ba203 lw x4,0(x23) +800002b0: 01120863 beq x4,x17,800002c0 +800002b4: 24c052ef jal x5,80005500 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 80009267 .word 0x80009267 +800002c0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x361939e0 +800002c4: 0000a703 lw x14,0(x1) +800002c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xa437b632 +800002cc: 0000a303 lw x6,0(x1) +800002d0: 00408093 addi x1,x1,4 + +800002d4 : +Zbkb_orn_cg_cp_rs1_b14: + orn x26, x14, x6 # perform operation +800002d4: 40676d33 orn x26,x14,x6 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_orn_cg_cp_rs1_b14, Zbkb_orn_cg_cp_rs1_b14_str) +800002d8: 000ba203 lw x4,0(x23) +800002dc: 01a20863 beq x4,x26,800002ec +800002e0: 220052ef jal x5,80005500 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 80009299 .word 0x80009299 +800002ec: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x15d2f387 +800002f0: 0000a783 lw x15,0(x1) +800002f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xbfeb5519 +800002f8: 0000a483 lw x9,0(x1) +800002fc: 00408093 addi x1,x1,4 + +80000300 : +Zbkb_orn_cg_cp_rs1_b15: + orn x10, x15, x9 # perform operation +80000300: 4097e533 orn x10,x15,x9 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_orn_cg_cp_rs1_b15, Zbkb_orn_cg_cp_rs1_b15_str) +80000304: 000ba203 lw x4,0(x23) +80000308: 00a20863 beq x4,x10,80000318 +8000030c: 1f4052ef jal x5,80005500 +80000310: 80000300 .word 0x80000300 +80000314: 800092cb .word 0x800092cb +80000318: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0aa50d47 +8000031c: 0000a803 lw x16,0(x1) +80000320: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x2c4fe684 +80000324: 0000a983 lw x19,0(x1) +80000328: 00408093 addi x1,x1,4 + +8000032c : +Zbkb_orn_cg_cp_rs1_b16: + orn x12, x16, x19 # perform operation +8000032c: 41386633 orn x12,x16,x19 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_orn_cg_cp_rs1_b16, Zbkb_orn_cg_cp_rs1_b16_str) +80000330: 000ba203 lw x4,0(x23) +80000334: 00c20863 beq x4,x12,80000344 +80000338: 1c8052ef jal x5,80005500 +8000033c: 8000032c .word 0x8000032c +80000340: 800092fd .word 0x800092fd +80000344: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xfeee6538 +80000348: 0000a883 lw x17,0(x1) +8000034c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xd775bcec +80000350: 0000a803 lw x16,0(x1) +80000354: 00408093 addi x1,x1,4 + +80000358 : +Zbkb_orn_cg_cp_rs1_b17: + orn x31, x17, x16 # perform operation +80000358: 4108efb3 orn x31,x17,x16 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_orn_cg_cp_rs1_b17, Zbkb_orn_cg_cp_rs1_b17_str) +8000035c: 000ba203 lw x4,0(x23) +80000360: 01f20863 beq x4,x31,80000370 +80000364: 19c052ef jal x5,80005500 +80000368: 80000358 .word 0x80000358 +8000036c: 8000932f .word 0x8000932f +80000370: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xb0d72c51 +80000374: 0000a903 lw x18,0(x1) +80000378: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x66ddfdc2 +8000037c: 0000a403 lw x8,0(x1) +80000380: 00408093 addi x1,x1,4 + +80000384 : +Zbkb_orn_cg_cp_rs1_b18: + orn x14, x18, x8 # perform operation +80000384: 40896733 orn x14,x18,x8 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_orn_cg_cp_rs1_b18, Zbkb_orn_cg_cp_rs1_b18_str) +80000388: 000ba203 lw x4,0(x23) +8000038c: 00e20863 beq x4,x14,8000039c +80000390: 170052ef jal x5,80005500 +80000394: 80000384 .word 0x80000384 +80000398: 80009361 .word 0x80009361 +8000039c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xad30c603 +800003a0: 0000a983 lw x19,0(x1) +800003a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xbe9ca9a2 +800003a8: 0000ad03 lw x26,0(x1) +800003ac: 00408093 addi x1,x1,4 + +800003b0 : +Zbkb_orn_cg_cp_rs1_b19: + orn x25, x19, x26 # perform operation +800003b0: 41a9ecb3 orn x25,x19,x26 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_orn_cg_cp_rs1_b19, Zbkb_orn_cg_cp_rs1_b19_str) +800003b4: 000ba203 lw x4,0(x23) +800003b8: 01920863 beq x4,x25,800003c8 +800003bc: 144052ef jal x5,80005500 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 80009393 .word 0x80009393 +800003c8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x68f110bb +800003cc: 0000aa03 lw x20,0(x1) +800003d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x59414dc8 +800003d4: 0000ae03 lw x28,0(x1) +800003d8: 00408093 addi x1,x1,4 + +800003dc : +Zbkb_orn_cg_cp_rs1_b20: + orn x7, x20, x28 # perform operation +800003dc: 41ca63b3 orn x7,x20,x28 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_orn_cg_cp_rs1_b20, Zbkb_orn_cg_cp_rs1_b20_str) +800003e0: 000ba203 lw x4,0(x23) +800003e4: 00720863 beq x4,x7,800003f4 +800003e8: 118052ef jal x5,80005500 +800003ec: 800003dc .word 0x800003dc +800003f0: 800093c5 .word 0x800093c5 +800003f4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x399d8188 +800003f8: 0000aa83 lw x21,0(x1) +800003fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0710edb9 +80000400: 0000ae03 lw x28,0(x1) +80000404: 00408093 addi x1,x1,4 + +80000408 : +Zbkb_orn_cg_cp_rs1_b21: + orn x26, x21, x28 # perform operation +80000408: 41caed33 orn x26,x21,x28 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_orn_cg_cp_rs1_b21, Zbkb_orn_cg_cp_rs1_b21_str) +8000040c: 000ba203 lw x4,0(x23) +80000410: 01a20863 beq x4,x26,80000420 +80000414: 0ec052ef jal x5,80005500 +80000418: 80000408 .word 0x80000408 +8000041c: 800093f7 .word 0x800093f7 +80000420: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x5a1f6277 +80000424: 0000ab03 lw x22,0(x1) +80000428: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xda053807 +8000042c: 0000a103 lw x2,0(x1) +80000430: 00408093 addi x1,x1,4 + +80000434 : +Zbkb_orn_cg_cp_rs1_b22: + orn x16, x22, x2 # perform operation +80000434: 402b6833 orn x16,x22,x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_orn_cg_cp_rs1_b22, Zbkb_orn_cg_cp_rs1_b22_str) +80000438: 000ba203 lw x4,0(x23) +8000043c: 01020863 beq x4,x16,8000044c +80000440: 0c0052ef jal x5,80005500 +80000444: 80000434 .word 0x80000434 +80000448: 80009429 .word 0x80009429 +8000044c: 004b8b93 addi x23,x23,4 + + mv x17, x23 # switch signature pointer register to avoid conflict with test +80000450: 000b8893 addi x17,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xcc569622 +80000454: 0000ab83 lw x23,0(x1) +80000458: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x38b6314d +8000045c: 0000ad83 lw x27,0(x1) +80000460: 00408093 addi x1,x1,4 + +80000464 : +Zbkb_orn_cg_cp_rs1_b23: + orn x24, x23, x27 # perform operation +80000464: 41bbec33 orn x24,x23,x27 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkb_orn_cg_cp_rs1_b23, Zbkb_orn_cg_cp_rs1_b23_str) +80000468: 0008a203 lw x4,0(x17) +8000046c: 01820863 beq x4,x24,8000047c +80000470: 090052ef jal x5,80005500 +80000474: 80000464 .word 0x80000464 +80000478: 8000945b .word 0x8000945b +8000047c: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x25859068 +80000480: 0000ac03 lw x24,0(x1) +80000484: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xda08be51 +80000488: 0000a403 lw x8,0(x1) +8000048c: 00408093 addi x1,x1,4 + +80000490 : +Zbkb_orn_cg_cp_rs1_b24: + orn x29, x24, x8 # perform operation +80000490: 408c6eb3 orn x29,x24,x8 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkb_orn_cg_cp_rs1_b24, Zbkb_orn_cg_cp_rs1_b24_str) +80000494: 0008a203 lw x4,0(x17) +80000498: 01d20863 beq x4,x29,800004a8 +8000049c: 064052ef jal x5,80005500 +800004a0: 80000490 .word 0x80000490 +800004a4: 8000948d .word 0x8000948d +800004a8: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xa8c5d27c +800004ac: 0000ac83 lw x25,0(x1) +800004b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xc50ea0e0 +800004b4: 0000a783 lw x15,0(x1) +800004b8: 00408093 addi x1,x1,4 + +800004bc : +Zbkb_orn_cg_cp_rs1_b25: + orn x27, x25, x15 # perform operation +800004bc: 40fcedb3 orn x27,x25,x15 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkb_orn_cg_cp_rs1_b25, Zbkb_orn_cg_cp_rs1_b25_str) +800004c0: 0008a203 lw x4,0(x17) +800004c4: 01b20863 beq x4,x27,800004d4 +800004c8: 038052ef jal x5,80005500 +800004cc: 800004bc .word 0x800004bc +800004d0: 800094bf .word 0x800094bf +800004d4: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x11d43d38 +800004d8: 0000ad03 lw x26,0(x1) +800004dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xb868af1c +800004e0: 0000a503 lw x10,0(x1) +800004e4: 00408093 addi x1,x1,4 + +800004e8 : +Zbkb_orn_cg_cp_rs1_b26: + orn x30, x26, x10 # perform operation +800004e8: 40ad6f33 orn x30,x26,x10 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkb_orn_cg_cp_rs1_b26, Zbkb_orn_cg_cp_rs1_b26_str) +800004ec: 0008a203 lw x4,0(x17) +800004f0: 01e20863 beq x4,x30,80000500 +800004f4: 00c052ef jal x5,80005500 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800094f1 .word 0x800094f1 +80000500: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xfa352743 +80000504: 0000ad83 lw x27,0(x1) +80000508: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x917d9fac +8000050c: 0000a003 lw x0,0(x1) +80000510: 00408093 addi x1,x1,4 + +80000514 : +Zbkb_orn_cg_cp_rs1_b27: + orn x8, x27, x0 # perform operation +80000514: 400de433 orn x8,x27,x0 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_orn_cg_cp_rs1_b27, Zbkb_orn_cg_cp_rs1_b27_str) +80000518: 0008a203 lw x4,0(x17) +8000051c: 00820863 beq x4,x8,8000052c +80000520: 7e1042ef jal x5,80005500 +80000524: 80000514 .word 0x80000514 +80000528: 80009523 .word 0x80009523 +8000052c: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xe0233f45 +80000530: 0000ae03 lw x28,0(x1) +80000534: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x278dc297 +80000538: 0000aa03 lw x20,0(x1) +8000053c: 00408093 addi x1,x1,4 + +80000540 : +Zbkb_orn_cg_cp_rs1_b28: + orn x24, x28, x20 # perform operation +80000540: 414e6c33 orn x24,x28,x20 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkb_orn_cg_cp_rs1_b28, Zbkb_orn_cg_cp_rs1_b28_str) +80000544: 0008a203 lw x4,0(x17) +80000548: 01820863 beq x4,x24,80000558 +8000054c: 7b5042ef jal x5,80005500 +80000550: 80000540 .word 0x80000540 +80000554: 80009555 .word 0x80009555 +80000558: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x2960b4b5 +8000055c: 0000ae83 lw x29,0(x1) +80000560: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x14125be9 +80000564: 0000a603 lw x12,0(x1) +80000568: 00408093 addi x1,x1,4 + +8000056c : +Zbkb_orn_cg_cp_rs1_b29: + orn x23, x29, x12 # perform operation +8000056c: 40ceebb3 orn x23,x29,x12 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkb_orn_cg_cp_rs1_b29, Zbkb_orn_cg_cp_rs1_b29_str) +80000570: 0008a203 lw x4,0(x17) +80000574: 01720863 beq x4,x23,80000584 +80000578: 789042ef jal x5,80005500 +8000057c: 8000056c .word 0x8000056c +80000580: 80009587 .word 0x80009587 +80000584: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xbeeff672 +80000588: 0000af03 lw x30,0(x1) +8000058c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x9a49f9db +80000590: 0000a483 lw x9,0(x1) +80000594: 00408093 addi x1,x1,4 + +80000598 : +Zbkb_orn_cg_cp_rs1_b30: + orn x8, x30, x9 # perform operation +80000598: 409f6433 orn x8,x30,x9 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_orn_cg_cp_rs1_b30, Zbkb_orn_cg_cp_rs1_b30_str) +8000059c: 0008a203 lw x4,0(x17) +800005a0: 00820863 beq x4,x8,800005b0 +800005a4: 75d042ef jal x5,80005500 +800005a8: 80000598 .word 0x80000598 +800005ac: 800095b9 .word 0x800095b9 +800005b0: 00488893 addi x17,x17,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xcd1c7108 +800005b4: 0000af83 lw x31,0(x1) +800005b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x56c10643 +800005bc: 0000a303 lw x6,0(x1) +800005c0: 00408093 addi x1,x1,4 + +800005c4 : +Zbkb_orn_cg_cp_rs1_b31: + orn x9, x31, x6 # perform operation +800005c4: 406fe4b3 orn x9,x31,x6 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkb_orn_cg_cp_rs1_b31, Zbkb_orn_cg_cp_rs1_b31_str) +800005c8: 0008a203 lw x4,0(x17) +800005cc: 00920863 beq x4,x9,800005dc +800005d0: 731042ef jal x5,80005500 +800005d4: 800005c4 .word 0x800005c4 +800005d8: 800095eb .word 0x800095eb +800005dc: 00488893 addi x17,x17,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xd8d5da2d +800005e0: 0000a703 lw x14,0(x1) +800005e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x307e918b +800005e8: 0000a003 lw x0,0(x1) +800005ec: 00408093 addi x1,x1,4 + +800005f0 : +Zbkb_orn_cg_cp_rs2_b0: + orn x24, x14, x0 # perform operation +800005f0: 40076c33 orn x24,x14,x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkb_orn_cg_cp_rs2_b0, Zbkb_orn_cg_cp_rs2_b0_str) +800005f4: 0008a203 lw x4,0(x17) +800005f8: 01820863 beq x4,x24,80000608 +800005fc: 705042ef jal x5,80005500 +80000600: 800005f0 .word 0x800005f0 +80000604: 8000961d .word 0x8000961d +80000608: 00488893 addi x17,x17,4 + + mv x28, x1 # switch data pointer register to avoid conflict with test +8000060c: 00008e13 addi x28,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xe38b042b +80000610: 000e2c03 lw x24,0(x28) +80000614: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs2: x1 = 0x2b746f54 +80000618: 000e2083 lw x1,0(x28) +8000061c: 004e0e13 addi x28,x28,4 + +80000620 : +Zbkb_orn_cg_cp_rs2_b1: + orn x8, x24, x1 # perform operation +80000620: 401c6433 orn x8,x24,x1 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_orn_cg_cp_rs2_b1, Zbkb_orn_cg_cp_rs2_b1_str) +80000624: 0008a203 lw x4,0(x17) +80000628: 00820863 beq x4,x8,80000638 +8000062c: 6d5042ef jal x5,80005500 +80000630: 80000620 .word 0x80000620 +80000634: 8000964e .word 0x8000964e +80000638: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x9241b75d +8000063c: 000e2c03 lw x24,0(x28) +80000640: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0x74437810 +80000644: 000e2103 lw x2,0(x28) +80000648: 004e0e13 addi x28,x28,4 + +8000064c : +Zbkb_orn_cg_cp_rs2_b2: + orn x31, x24, x2 # perform operation +8000064c: 402c6fb3 orn x31,x24,x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkb_orn_cg_cp_rs2_b2, Zbkb_orn_cg_cp_rs2_b2_str) +80000650: 0008a203 lw x4,0(x17) +80000654: 01f20863 beq x4,x31,80000664 +80000658: 6a9042ef jal x5,80005500 +8000065c: 8000064c .word 0x8000064c +80000660: 8000967f .word 0x8000967f +80000664: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x772c283f +80000668: 000e2b03 lw x22,0(x28) +8000066c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x6ad5da84 +80000670: 000e2183 lw x3,0(x28) +80000674: 004e0e13 addi x28,x28,4 + +80000678 : +Zbkb_orn_cg_cp_rs2_b3: + orn x10, x22, x3 # perform operation +80000678: 403b6533 orn x10,x22,x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkb_orn_cg_cp_rs2_b3, Zbkb_orn_cg_cp_rs2_b3_str) +8000067c: 0008a203 lw x4,0(x17) +80000680: 00a20863 beq x4,x10,80000690 +80000684: 67d042ef jal x5,80005500 +80000688: 80000678 .word 0x80000678 +8000068c: 800096b0 .word 0x800096b0 +80000690: 00488893 addi x17,x17,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000694: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000698: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0xc98a8b4f +8000069c: 000e2983 lw x19,0(x28) +800006a0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x4) # load rs2: x4 = 0x3ba13549 +800006a4: 000e2203 lw x4,0(x28) +800006a8: 004e0e13 addi x28,x28,4 + +800006ac : +Zbkb_orn_cg_cp_rs2_b4: + orn x31, x19, x4 # perform operation +800006ac: 4049efb3 orn x31,x19,x4 + # Check if x31 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x31, Zbkb_orn_cg_cp_rs2_b4, Zbkb_orn_cg_cp_rs2_b4_str) +800006b0: 0008a683 lw x13,0(x17) +800006b4: 01f68863 beq x13,x31,800006c4 +800006b8: 6890476f jal x14,80005540 +800006bc: 800006ac .word 0x800006ac +800006c0: 800096e1 .word 0x800096e1 +800006c4: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xa658fac6 +800006c8: 000e2b03 lw x22,0(x28) +800006cc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs2: x5 = 0xc36246ec +800006d0: 000e2283 lw x5,0(x28) +800006d4: 004e0e13 addi x28,x28,4 + +800006d8 : +Zbkb_orn_cg_cp_rs2_b5: + orn x25, x22, x5 # perform operation +800006d8: 405b6cb3 orn x25,x22,x5 + # Check if x25 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x25, Zbkb_orn_cg_cp_rs2_b5, Zbkb_orn_cg_cp_rs2_b5_str) +800006dc: 0008a683 lw x13,0(x17) +800006e0: 01968863 beq x13,x25,800006f0 +800006e4: 65d0476f jal x14,80005540 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80009712 .word 0x80009712 +800006f0: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x8e98fbdc +800006f4: 000e2183 lw x3,0(x28) +800006f8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs2: x6 = 0xec1398e5 +800006fc: 000e2303 lw x6,0(x28) +80000700: 004e0e13 addi x28,x28,4 + +80000704 : +Zbkb_orn_cg_cp_rs2_b6: + orn x0, x3, x6 # perform operation +80000704: 4061e033 orn x0,x3,x6 + # Check if x0 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x0, Zbkb_orn_cg_cp_rs2_b6, Zbkb_orn_cg_cp_rs2_b6_str) +80000708: 0008a683 lw x13,0(x17) +8000070c: 00068863 beq x13,x0,8000071c +80000710: 6310476f jal x14,80005540 +80000714: 80000704 .word 0x80000704 +80000718: 80009743 .word 0x80009743 +8000071c: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xbd4a0b44 +80000720: 000e2c03 lw x24,0(x28) +80000724: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs2: x7 = 0x63de2d9c +80000728: 000e2383 lw x7,0(x28) +8000072c: 004e0e13 addi x28,x28,4 + +80000730 : +Zbkb_orn_cg_cp_rs2_b7: + orn x18, x24, x7 # perform operation +80000730: 407c6933 orn x18,x24,x7 + # Check if x18 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x18, Zbkb_orn_cg_cp_rs2_b7, Zbkb_orn_cg_cp_rs2_b7_str) +80000734: 0008a683 lw x13,0(x17) +80000738: 01268863 beq x13,x18,80000748 +8000073c: 6050476f jal x14,80005540 +80000740: 80000730 .word 0x80000730 +80000744: 80009774 .word 0x80009774 +80000748: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0xe1111057 +8000074c: 000e2003 lw x0,0(x28) +80000750: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs2: x8 = 0x3888b7c6 +80000754: 000e2403 lw x8,0(x28) +80000758: 004e0e13 addi x28,x28,4 + +8000075c : +Zbkb_orn_cg_cp_rs2_b8: + orn x25, x0, x8 # perform operation +8000075c: 40806cb3 orn x25,x0,x8 + # Check if x25 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x25, Zbkb_orn_cg_cp_rs2_b8, Zbkb_orn_cg_cp_rs2_b8_str) +80000760: 0008a683 lw x13,0(x17) +80000764: 01968863 beq x13,x25,80000774 +80000768: 5d90476f jal x14,80005540 +8000076c: 8000075c .word 0x8000075c +80000770: 800097a5 .word 0x800097a5 +80000774: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs1: x6 = 0xce07c282 +80000778: 000e2303 lw x6,0(x28) +8000077c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xabee52e7 +80000780: 000e2483 lw x9,0(x28) +80000784: 004e0e13 addi x28,x28,4 + +80000788 : +Zbkb_orn_cg_cp_rs2_b9: + orn x16, x6, x9 # perform operation +80000788: 40936833 orn x16,x6,x9 + # Check if x16 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x16, Zbkb_orn_cg_cp_rs2_b9, Zbkb_orn_cg_cp_rs2_b9_str) +8000078c: 0008a683 lw x13,0(x17) +80000790: 01068863 beq x13,x16,800007a0 +80000794: 5ad0476f jal x14,80005540 +80000798: 80000788 .word 0x80000788 +8000079c: 800097d6 .word 0x800097d6 +800007a0: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x2b6d3eb5 +800007a4: 000e2d03 lw x26,0(x28) +800007a8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x2c8c5715 +800007ac: 000e2503 lw x10,0(x28) +800007b0: 004e0e13 addi x28,x28,4 + +800007b4 : +Zbkb_orn_cg_cp_rs2_b10: + orn x3, x26, x10 # perform operation +800007b4: 40ad61b3 orn x3,x26,x10 + # Check if x3 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x3, Zbkb_orn_cg_cp_rs2_b10, Zbkb_orn_cg_cp_rs2_b10_str) +800007b8: 0008a683 lw x13,0(x17) +800007bc: 00368863 beq x13,x3,800007cc +800007c0: 5810476f jal x14,80005540 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80009807 .word 0x80009807 +800007cc: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x7ff0ae3d +800007d0: 000e2e83 lw x29,0(x28) +800007d4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0xb62f9c8b +800007d8: 000e2583 lw x11,0(x28) +800007dc: 004e0e13 addi x28,x28,4 + +800007e0 : +Zbkb_orn_cg_cp_rs2_b11: + orn x16, x29, x11 # perform operation +800007e0: 40bee833 orn x16,x29,x11 + # Check if x16 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x16, Zbkb_orn_cg_cp_rs2_b11, Zbkb_orn_cg_cp_rs2_b11_str) +800007e4: 0008a683 lw x13,0(x17) +800007e8: 01068863 beq x13,x16,800007f8 +800007ec: 5550476f jal x14,80005540 +800007f0: 800007e0 .word 0x800007e0 +800007f4: 80009839 .word 0x80009839 +800007f8: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0xbaa38a00 +800007fc: 000e2f83 lw x31,0(x28) +80000800: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x24f6cf2d +80000804: 000e2603 lw x12,0(x28) +80000808: 004e0e13 addi x28,x28,4 + +8000080c : +Zbkb_orn_cg_cp_rs2_b12: + orn x18, x31, x12 # perform operation +8000080c: 40cfe933 orn x18,x31,x12 + # Check if x18 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x18, Zbkb_orn_cg_cp_rs2_b12, Zbkb_orn_cg_cp_rs2_b12_str) +80000810: 0008a683 lw x13,0(x17) +80000814: 01268863 beq x13,x18,80000824 +80000818: 5290476f jal x14,80005540 +8000081c: 8000080c .word 0x8000080c +80000820: 8000986b .word 0x8000986b +80000824: 00488893 addi x17,x17,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000828: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000082c: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0xefef5201 +80000830: 000e2a83 lw x21,0(x28) +80000834: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0x23bc46dd +80000838: 000e2683 lw x13,0(x28) +8000083c: 004e0e13 addi x28,x28,4 + +80000840 : +Zbkb_orn_cg_cp_rs2_b13: + orn x14, x21, x13 # perform operation +80000840: 40dae733 orn x14,x21,x13 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkb_orn_cg_cp_rs2_b13, Zbkb_orn_cg_cp_rs2_b13_str) +80000844: 0008a203 lw x4,0(x17) +80000848: 00e20863 beq x4,x14,80000858 +8000084c: 4b5042ef jal x5,80005500 +80000850: 80000840 .word 0x80000840 +80000854: 8000989d .word 0x8000989d +80000858: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0xac73a4b2 +8000085c: 000e2983 lw x19,0(x28) +80000860: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x8237cc40 +80000864: 000e2703 lw x14,0(x28) +80000868: 004e0e13 addi x28,x28,4 + +8000086c : +Zbkb_orn_cg_cp_rs2_b14: + orn x2, x19, x14 # perform operation +8000086c: 40e9e133 orn x2,x19,x14 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkb_orn_cg_cp_rs2_b14, Zbkb_orn_cg_cp_rs2_b14_str) +80000870: 0008a203 lw x4,0(x17) +80000874: 00220863 beq x4,x2,80000884 +80000878: 489042ef jal x5,80005500 +8000087c: 8000086c .word 0x8000086c +80000880: 800098cf .word 0x800098cf +80000884: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x61d03e40 +80000888: 000e2483 lw x9,0(x28) +8000088c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0x78f19746 +80000890: 000e2783 lw x15,0(x28) +80000894: 004e0e13 addi x28,x28,4 + +80000898 : +Zbkb_orn_cg_cp_rs2_b15: + orn x22, x9, x15 # perform operation +80000898: 40f4eb33 orn x22,x9,x15 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkb_orn_cg_cp_rs2_b15, Zbkb_orn_cg_cp_rs2_b15_str) +8000089c: 0008a203 lw x4,0(x17) +800008a0: 01620863 beq x4,x22,800008b0 +800008a4: 45d042ef jal x5,80005500 +800008a8: 80000898 .word 0x80000898 +800008ac: 80009901 .word 0x80009901 +800008b0: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs1: x6 = 0xf6096798 +800008b4: 000e2303 lw x6,0(x28) +800008b8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xcf5a4b14 +800008bc: 000e2803 lw x16,0(x28) +800008c0: 004e0e13 addi x28,x28,4 + +800008c4 : +Zbkb_orn_cg_cp_rs2_b16: + orn x12, x6, x16 # perform operation +800008c4: 41036633 orn x12,x6,x16 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkb_orn_cg_cp_rs2_b16, Zbkb_orn_cg_cp_rs2_b16_str) +800008c8: 0008a203 lw x4,0(x17) +800008cc: 00c20863 beq x4,x12,800008dc +800008d0: 431042ef jal x5,80005500 +800008d4: 800008c4 .word 0x800008c4 +800008d8: 80009933 .word 0x80009933 +800008dc: 00488893 addi x17,x17,4 + + mv x2, x17 # switch signature pointer register to avoid conflict with test +800008e0: 00088113 addi x2,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x0e878193 +800008e4: 000e2583 lw x11,0(x28) +800008e8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x573a8d87 +800008ec: 000e2883 lw x17,0(x28) +800008f0: 004e0e13 addi x28,x28,4 + +800008f4 : +Zbkb_orn_cg_cp_rs2_b17: + orn x3, x11, x17 # perform operation +800008f4: 4115e1b3 orn x3,x11,x17 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zbkb_orn_cg_cp_rs2_b17, Zbkb_orn_cg_cp_rs2_b17_str) +800008f8: 00012203 lw x4,0(x2) +800008fc: 00320863 beq x4,x3,8000090c +80000900: 401042ef jal x5,80005500 +80000904: 800008f4 .word 0x800008f4 +80000908: 80009965 .word 0x80009965 +8000090c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x624dd9ed +80000910: 000e2d03 lw x26,0(x28) +80000914: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x393389d0 +80000918: 000e2903 lw x18,0(x28) +8000091c: 004e0e13 addi x28,x28,4 + +80000920 : +Zbkb_orn_cg_cp_rs2_b18: + orn x15, x26, x18 # perform operation +80000920: 412d67b3 orn x15,x26,x18 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zbkb_orn_cg_cp_rs2_b18, Zbkb_orn_cg_cp_rs2_b18_str) +80000924: 00012203 lw x4,0(x2) +80000928: 00f20863 beq x4,x15,80000938 +8000092c: 3d5042ef jal x5,80005500 +80000930: 80000920 .word 0x80000920 +80000934: 80009997 .word 0x80009997 +80000938: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0xfe61ca95 +8000093c: 000e2803 lw x16,0(x28) +80000940: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xb0e1c1fa +80000944: 000e2983 lw x19,0(x28) +80000948: 004e0e13 addi x28,x28,4 + +8000094c : +Zbkb_orn_cg_cp_rs2_b19: + orn x6, x16, x19 # perform operation +8000094c: 41386333 orn x6,x16,x19 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zbkb_orn_cg_cp_rs2_b19, Zbkb_orn_cg_cp_rs2_b19_str) +80000950: 00012203 lw x4,0(x2) +80000954: 00620863 beq x4,x6,80000964 +80000958: 3a9042ef jal x5,80005500 +8000095c: 8000094c .word 0x8000094c +80000960: 800099c9 .word 0x800099c9 +80000964: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0x1757ca59 +80000968: 000e2003 lw x0,0(x28) +8000096c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xea0af178 +80000970: 000e2a03 lw x20,0(x28) +80000974: 004e0e13 addi x28,x28,4 + +80000978 : +Zbkb_orn_cg_cp_rs2_b20: + orn x6, x0, x20 # perform operation +80000978: 41406333 orn x6,x0,x20 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zbkb_orn_cg_cp_rs2_b20, Zbkb_orn_cg_cp_rs2_b20_str) +8000097c: 00012203 lw x4,0(x2) +80000980: 00620863 beq x4,x6,80000990 +80000984: 37d042ef jal x5,80005500 +80000988: 80000978 .word 0x80000978 +8000098c: 800099fb .word 0x800099fb +80000990: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xc00082d0 +80000994: 000e2883 lw x17,0(x28) +80000998: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x791e00e8 +8000099c: 000e2a83 lw x21,0(x28) +800009a0: 004e0e13 addi x28,x28,4 + +800009a4 : +Zbkb_orn_cg_cp_rs2_b21: + orn x25, x17, x21 # perform operation +800009a4: 4158ecb3 orn x25,x17,x21 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_orn_cg_cp_rs2_b21, Zbkb_orn_cg_cp_rs2_b21_str) +800009a8: 00012203 lw x4,0(x2) +800009ac: 01920863 beq x4,x25,800009bc +800009b0: 351042ef jal x5,80005500 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 80009a2d .word 0x80009a2d +800009bc: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xf84f3b4b +800009c0: 000e2583 lw x11,0(x28) +800009c4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xcc12cadb +800009c8: 000e2b03 lw x22,0(x28) +800009cc: 004e0e13 addi x28,x28,4 + +800009d0 : +Zbkb_orn_cg_cp_rs2_b22: + orn x13, x11, x22 # perform operation +800009d0: 4165e6b3 orn x13,x11,x22 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_orn_cg_cp_rs2_b22, Zbkb_orn_cg_cp_rs2_b22_str) +800009d4: 00012203 lw x4,0(x2) +800009d8: 00d20863 beq x4,x13,800009e8 +800009dc: 325042ef jal x5,80005500 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 80009a5f .word 0x80009a5f +800009e8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x9bc95154 +800009ec: 000e2d03 lw x26,0(x28) +800009f0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x5b01ebe6 +800009f4: 000e2b83 lw x23,0(x28) +800009f8: 004e0e13 addi x28,x28,4 + +800009fc : +Zbkb_orn_cg_cp_rs2_b23: + orn x12, x26, x23 # perform operation +800009fc: 417d6633 orn x12,x26,x23 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkb_orn_cg_cp_rs2_b23, Zbkb_orn_cg_cp_rs2_b23_str) +80000a00: 00012203 lw x4,0(x2) +80000a04: 00c20863 beq x4,x12,80000a14 +80000a08: 2f9042ef jal x5,80005500 +80000a0c: 800009fc .word 0x800009fc +80000a10: 80009a91 .word 0x80009a91 +80000a14: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xdba44004 +80000a18: 000e2b03 lw x22,0(x28) +80000a1c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xd164a1c9 +80000a20: 000e2c03 lw x24,0(x28) +80000a24: 004e0e13 addi x28,x28,4 + +80000a28 : +Zbkb_orn_cg_cp_rs2_b24: + orn x13, x22, x24 # perform operation +80000a28: 418b66b3 orn x13,x22,x24 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_orn_cg_cp_rs2_b24, Zbkb_orn_cg_cp_rs2_b24_str) +80000a2c: 00012203 lw x4,0(x2) +80000a30: 00d20863 beq x4,x13,80000a40 +80000a34: 2cd042ef jal x5,80005500 +80000a38: 80000a28 .word 0x80000a28 +80000a3c: 80009ac3 .word 0x80009ac3 +80000a40: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x516ec2bf +80000a44: 000e2d03 lw x26,0(x28) +80000a48: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x31f6d73d +80000a4c: 000e2c83 lw x25,0(x28) +80000a50: 004e0e13 addi x28,x28,4 + +80000a54 : +Zbkb_orn_cg_cp_rs2_b25: + orn x1, x26, x25 # perform operation +80000a54: 419d60b3 orn x1,x26,x25 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_orn_cg_cp_rs2_b25, Zbkb_orn_cg_cp_rs2_b25_str) +80000a58: 00012203 lw x4,0(x2) +80000a5c: 00120863 beq x4,x1,80000a6c +80000a60: 2a1042ef jal x5,80005500 +80000a64: 80000a54 .word 0x80000a54 +80000a68: 80009af5 .word 0x80009af5 +80000a6c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xedf81f26 +80000a70: 000e2603 lw x12,0(x28) +80000a74: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x61f4aec9 +80000a78: 000e2d03 lw x26,0(x28) +80000a7c: 004e0e13 addi x28,x28,4 + +80000a80 : +Zbkb_orn_cg_cp_rs2_b26: + orn x30, x12, x26 # perform operation +80000a80: 41a66f33 orn x30,x12,x26 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_orn_cg_cp_rs2_b26, Zbkb_orn_cg_cp_rs2_b26_str) +80000a84: 00012203 lw x4,0(x2) +80000a88: 01e20863 beq x4,x30,80000a98 +80000a8c: 275042ef jal x5,80005500 +80000a90: 80000a80 .word 0x80000a80 +80000a94: 80009b27 .word 0x80009b27 +80000a98: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0x6529c7a1 +80000a9c: 000e2503 lw x10,0(x28) +80000aa0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x9d161268 +80000aa4: 000e2d83 lw x27,0(x28) +80000aa8: 004e0e13 addi x28,x28,4 + +80000aac : +Zbkb_orn_cg_cp_rs2_b27: + orn x18, x10, x27 # perform operation +80000aac: 41b56933 orn x18,x10,x27 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zbkb_orn_cg_cp_rs2_b27, Zbkb_orn_cg_cp_rs2_b27_str) +80000ab0: 00012203 lw x4,0(x2) +80000ab4: 01220863 beq x4,x18,80000ac4 +80000ab8: 249042ef jal x5,80005500 +80000abc: 80000aac .word 0x80000aac +80000ac0: 80009b59 .word 0x80009b59 +80000ac4: 00410113 addi x2,x2,4 + + mv x10, x28 # switch data pointer register to avoid conflict with test +80000ac8: 000e0513 addi x10,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x6f6efdc7 +80000acc: 00052483 lw x9,0(x10) +80000ad0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x89634081 +80000ad4: 00052e03 lw x28,0(x10) +80000ad8: 00450513 addi x10,x10,4 + +80000adc : +Zbkb_orn_cg_cp_rs2_b28: + orn x12, x9, x28 # perform operation +80000adc: 41c4e633 orn x12,x9,x28 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkb_orn_cg_cp_rs2_b28, Zbkb_orn_cg_cp_rs2_b28_str) +80000ae0: 00012203 lw x4,0(x2) +80000ae4: 00c20863 beq x4,x12,80000af4 +80000ae8: 219042ef jal x5,80005500 +80000aec: 80000adc .word 0x80000adc +80000af0: 80009b8b .word 0x80009b8b +80000af4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xd59ed0b8 +80000af8: 00052883 lw x17,0(x10) +80000afc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x02e9bb48 +80000b00: 00052e83 lw x29,0(x10) +80000b04: 00450513 addi x10,x10,4 + +80000b08 : +Zbkb_orn_cg_cp_rs2_b29: + orn x14, x17, x29 # perform operation +80000b08: 41d8e733 orn x14,x17,x29 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zbkb_orn_cg_cp_rs2_b29, Zbkb_orn_cg_cp_rs2_b29_str) +80000b0c: 00012203 lw x4,0(x2) +80000b10: 00e20863 beq x4,x14,80000b20 +80000b14: 1ed042ef jal x5,80005500 +80000b18: 80000b08 .word 0x80000b08 +80000b1c: 80009bbd .word 0x80009bbd +80000b20: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x66c77b9e +80000b24: 00052383 lw x7,0(x10) +80000b28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xf5a401a3 +80000b2c: 00052f03 lw x30,0(x10) +80000b30: 00450513 addi x10,x10,4 + +80000b34 : +Zbkb_orn_cg_cp_rs2_b30: + orn x21, x7, x30 # perform operation +80000b34: 41e3eab3 orn x21,x7,x30 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zbkb_orn_cg_cp_rs2_b30, Zbkb_orn_cg_cp_rs2_b30_str) +80000b38: 00012203 lw x4,0(x2) +80000b3c: 01520863 beq x4,x21,80000b4c +80000b40: 1c1042ef jal x5,80005500 +80000b44: 80000b34 .word 0x80000b34 +80000b48: 80009bef .word 0x80009bef +80000b4c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xf53edea9 +80000b50: 00052e83 lw x29,0(x10) +80000b54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xc5624259 +80000b58: 00052f83 lw x31,0(x10) +80000b5c: 00450513 addi x10,x10,4 + +80000b60 : +Zbkb_orn_cg_cp_rs2_b31: + orn x30, x29, x31 # perform operation +80000b60: 41feef33 orn x30,x29,x31 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_orn_cg_cp_rs2_b31, Zbkb_orn_cg_cp_rs2_b31_str) +80000b64: 00012203 lw x4,0(x2) +80000b68: 01e20863 beq x4,x30,80000b78 +80000b6c: 195042ef jal x5,80005500 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 80009c21 .word 0x80009c21 +80000b78: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x87b60f4a +80000b7c: 00052483 lw x9,0(x10) +80000b80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x3b255701 +80000b84: 00052f03 lw x30,0(x10) +80000b88: 00450513 addi x10,x10,4 + +80000b8c : +Zbkb_orn_cg_cp_rd_b0: + orn x0, x9, x30 # perform operation +80000b8c: 41e4e033 orn x0,x9,x30 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_orn_cg_cp_rd_b0, Zbkb_orn_cg_cp_rd_b0_str) +80000b90: 00012203 lw x4,0(x2) +80000b94: 00020863 beq x4,x0,80000ba4 +80000b98: 169042ef jal x5,80005500 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80009c53 .word 0x80009c53 +80000ba4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xd83a0c3a +80000ba8: 00052803 lw x16,0(x10) +80000bac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x38a10e22 +80000bb0: 00052e03 lw x28,0(x10) +80000bb4: 00450513 addi x10,x10,4 + +80000bb8 : +Zbkb_orn_cg_cp_rd_b1: + orn x1, x16, x28 # perform operation +80000bb8: 41c860b3 orn x1,x16,x28 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_orn_cg_cp_rd_b1, Zbkb_orn_cg_cp_rd_b1_str) +80000bbc: 00012203 lw x4,0(x2) +80000bc0: 00120863 beq x4,x1,80000bd0 +80000bc4: 13d042ef jal x5,80005500 +80000bc8: 80000bb8 .word 0x80000bb8 +80000bcc: 80009c83 .word 0x80009c83 +80000bd0: 00410113 addi x2,x2,4 + + mv x23, x2 # switch signature pointer register to avoid conflict with test +80000bd4: 00010b93 addi x23,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xb114d8e3 +80000bd8: 00052983 lw x19,0(x10) +80000bdc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xb4241f08 +80000be0: 00052e03 lw x28,0(x10) +80000be4: 00450513 addi x10,x10,4 + +80000be8 : +Zbkb_orn_cg_cp_rd_b2: + orn x2, x19, x28 # perform operation +80000be8: 41c9e133 orn x2,x19,x28 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_orn_cg_cp_rd_b2, Zbkb_orn_cg_cp_rd_b2_str) +80000bec: 000ba203 lw x4,0(x23) +80000bf0: 00220863 beq x4,x2,80000c00 +80000bf4: 10d042ef jal x5,80005500 +80000bf8: 80000be8 .word 0x80000be8 +80000bfc: 80009cb3 .word 0x80009cb3 +80000c00: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xb47c60c4 +80000c04: 00052003 lw x0,0(x10) +80000c08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xc729fa55 +80000c0c: 00052a83 lw x21,0(x10) +80000c10: 00450513 addi x10,x10,4 + +80000c14 : +Zbkb_orn_cg_cp_rd_b3: + orn x3, x0, x21 # perform operation +80000c14: 415061b3 orn x3,x0,x21 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_orn_cg_cp_rd_b3, Zbkb_orn_cg_cp_rd_b3_str) +80000c18: 000ba203 lw x4,0(x23) +80000c1c: 00320863 beq x4,x3,80000c2c +80000c20: 0e1042ef jal x5,80005500 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 80009ce3 .word 0x80009ce3 +80000c2c: 004b8b93 addi x23,x23,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c30: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c34: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x891ba278 +80000c38: 00052283 lw x5,0(x10) +80000c3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x23fc57c0 +80000c40: 00052803 lw x16,0(x10) +80000c44: 00450513 addi x10,x10,4 + +80000c48 : +Zbkb_orn_cg_cp_rd_b4: + orn x4, x5, x16 # perform operation +80000c48: 4102e233 orn x4,x5,x16 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zbkb_orn_cg_cp_rd_b4, Zbkb_orn_cg_cp_rd_b4_str) +80000c4c: 000ba683 lw x13,0(x23) +80000c50: 00468863 beq x13,x4,80000c60 +80000c54: 0ed0476f jal x14,80005540 +80000c58: 80000c48 .word 0x80000c48 +80000c5c: 80009d13 .word 0x80009d13 +80000c60: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x38009af0 +80000c64: 00052e03 lw x28,0(x10) +80000c68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x91647233 +80000c6c: 00052a83 lw x21,0(x10) +80000c70: 00450513 addi x10,x10,4 + +80000c74 : +Zbkb_orn_cg_cp_rd_b5: + orn x5, x28, x21 # perform operation +80000c74: 415e62b3 orn x5,x28,x21 + # Check if x5 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x5, Zbkb_orn_cg_cp_rd_b5, Zbkb_orn_cg_cp_rd_b5_str) +80000c78: 000ba683 lw x13,0(x23) +80000c7c: 00568863 beq x13,x5,80000c8c +80000c80: 0c10476f jal x14,80005540 +80000c84: 80000c74 .word 0x80000c74 +80000c88: 80009d43 .word 0x80009d43 +80000c8c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xbf43dc05 +80000c90: 00052403 lw x8,0(x10) +80000c94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x88832470 +80000c98: 00052883 lw x17,0(x10) +80000c9c: 00450513 addi x10,x10,4 + +80000ca0 : +Zbkb_orn_cg_cp_rd_b6: + orn x6, x8, x17 # perform operation +80000ca0: 41146333 orn x6,x8,x17 + # Check if x6 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x6, Zbkb_orn_cg_cp_rd_b6, Zbkb_orn_cg_cp_rd_b6_str) +80000ca4: 000ba683 lw x13,0(x23) +80000ca8: 00668863 beq x13,x6,80000cb8 +80000cac: 0950476f jal x14,80005540 +80000cb0: 80000ca0 .word 0x80000ca0 +80000cb4: 80009d73 .word 0x80009d73 +80000cb8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaa9565f1 +80000cbc: 00052a83 lw x21,0(x10) +80000cc0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x979e7fd1 +80000cc4: 00052283 lw x5,0(x10) +80000cc8: 00450513 addi x10,x10,4 + +80000ccc : +Zbkb_orn_cg_cp_rd_b7: + orn x7, x21, x5 # perform operation +80000ccc: 405ae3b3 orn x7,x21,x5 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zbkb_orn_cg_cp_rd_b7, Zbkb_orn_cg_cp_rd_b7_str) +80000cd0: 000ba683 lw x13,0(x23) +80000cd4: 00768863 beq x13,x7,80000ce4 +80000cd8: 0690476f jal x14,80005540 +80000cdc: 80000ccc .word 0x80000ccc +80000ce0: 80009da3 .word 0x80009da3 +80000ce4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x5532f5fe +80000ce8: 00052e83 lw x29,0(x10) +80000cec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5e01a673 +80000cf0: 00052a83 lw x21,0(x10) +80000cf4: 00450513 addi x10,x10,4 + +80000cf8 : +Zbkb_orn_cg_cp_rd_b8: + orn x8, x29, x21 # perform operation +80000cf8: 415ee433 orn x8,x29,x21 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zbkb_orn_cg_cp_rd_b8, Zbkb_orn_cg_cp_rd_b8_str) +80000cfc: 000ba683 lw x13,0(x23) +80000d00: 00868863 beq x13,x8,80000d10 +80000d04: 03d0476f jal x14,80005540 +80000d08: 80000cf8 .word 0x80000cf8 +80000d0c: 80009dd3 .word 0x80009dd3 +80000d10: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5f21574d +80000d14: 00052603 lw x12,0(x10) +80000d18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x219eedaf +80000d1c: 00052983 lw x19,0(x10) +80000d20: 00450513 addi x10,x10,4 + +80000d24 : +Zbkb_orn_cg_cp_rd_b9: + orn x9, x12, x19 # perform operation +80000d24: 413664b3 orn x9,x12,x19 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zbkb_orn_cg_cp_rd_b9, Zbkb_orn_cg_cp_rd_b9_str) +80000d28: 000ba683 lw x13,0(x23) +80000d2c: 00968863 beq x13,x9,80000d3c +80000d30: 0110476f jal x14,80005540 +80000d34: 80000d24 .word 0x80000d24 +80000d38: 80009e03 .word 0x80009e03 +80000d3c: 004b8b93 addi x23,x23,4 + + mv x30, x10 # switch data pointer register to avoid conflict with test +80000d40: 00050f13 addi x30,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x52ac46e7 +80000d44: 000f2c83 lw x25,0(x30) +80000d48: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xa78b4196 +80000d4c: 000f2883 lw x17,0(x30) +80000d50: 004f0f13 addi x30,x30,4 + +80000d54 : +Zbkb_orn_cg_cp_rd_b10: + orn x10, x25, x17 # perform operation +80000d54: 411ce533 orn x10,x25,x17 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zbkb_orn_cg_cp_rd_b10, Zbkb_orn_cg_cp_rd_b10_str) +80000d58: 000ba683 lw x13,0(x23) +80000d5c: 00a68863 beq x13,x10,80000d6c +80000d60: 7e00476f jal x14,80005540 +80000d64: 80000d54 .word 0x80000d54 +80000d68: 80009e33 .word 0x80009e33 +80000d6c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x68541f6c +80000d70: 000f2e03 lw x28,0(x30) +80000d74: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x5afdec39 +80000d78: 000f2783 lw x15,0(x30) +80000d7c: 004f0f13 addi x30,x30,4 + +80000d80 : +Zbkb_orn_cg_cp_rd_b11: + orn x11, x28, x15 # perform operation +80000d80: 40fe65b3 orn x11,x28,x15 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkb_orn_cg_cp_rd_b11, Zbkb_orn_cg_cp_rd_b11_str) +80000d84: 000ba683 lw x13,0(x23) +80000d88: 00b68863 beq x13,x11,80000d98 +80000d8c: 7b40476f jal x14,80005540 +80000d90: 80000d80 .word 0x80000d80 +80000d94: 80009e64 .word 0x80009e64 +80000d98: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0xa440f5a7 +80000d9c: 000f2483 lw x9,0(x30) +80000da0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs2: x31 = 0xec45be7c +80000da4: 000f2f83 lw x31,0(x30) +80000da8: 004f0f13 addi x30,x30,4 + +80000dac : +Zbkb_orn_cg_cp_rd_b12: + orn x12, x9, x31 # perform operation +80000dac: 41f4e633 orn x12,x9,x31 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zbkb_orn_cg_cp_rd_b12, Zbkb_orn_cg_cp_rd_b12_str) +80000db0: 000ba683 lw x13,0(x23) +80000db4: 00c68863 beq x13,x12,80000dc4 +80000db8: 7880476f jal x14,80005540 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 80009e95 .word 0x80009e95 +80000dc4: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dc8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dcc: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x5c408360 +80000dd0: 000f2703 lw x14,0(x30) +80000dd4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0x04e39fab +80000dd8: 000f2183 lw x3,0(x30) +80000ddc: 004f0f13 addi x30,x30,4 + +80000de0 : +Zbkb_orn_cg_cp_rd_b13: + orn x13, x14, x3 # perform operation +80000de0: 403766b3 orn x13,x14,x3 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_orn_cg_cp_rd_b13, Zbkb_orn_cg_cp_rd_b13_str) +80000de4: 000ba203 lw x4,0(x23) +80000de8: 00d20863 beq x4,x13,80000df8 +80000dec: 714042ef jal x5,80005500 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 80009ec6 .word 0x80009ec6 +80000df8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0xb395af78 +80000dfc: 000f2303 lw x6,0(x30) +80000e00: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xc073f50f +80000e04: 000f2583 lw x11,0(x30) +80000e08: 004f0f13 addi x30,x30,4 + +80000e0c : +Zbkb_orn_cg_cp_rd_b14: + orn x14, x6, x11 # perform operation +80000e0c: 40b36733 orn x14,x6,x11 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_orn_cg_cp_rd_b14, Zbkb_orn_cg_cp_rd_b14_str) +80000e10: 000ba203 lw x4,0(x23) +80000e14: 00e20863 beq x4,x14,80000e24 +80000e18: 6e8042ef jal x5,80005500 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 80009ef7 .word 0x80009ef7 +80000e24: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x41c12c1c +80000e28: 000f2083 lw x1,0(x30) +80000e2c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0x8940323a +80000e30: 000f2103 lw x2,0(x30) +80000e34: 004f0f13 addi x30,x30,4 + +80000e38 : +Zbkb_orn_cg_cp_rd_b15: + orn x15, x1, x2 # perform operation +80000e38: 4020e7b3 orn x15,x1,x2 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_orn_cg_cp_rd_b15, Zbkb_orn_cg_cp_rd_b15_str) +80000e3c: 000ba203 lw x4,0(x23) +80000e40: 00f20863 beq x4,x15,80000e50 +80000e44: 6bc042ef jal x5,80005500 +80000e48: 80000e38 .word 0x80000e38 +80000e4c: 80009f28 .word 0x80009f28 +80000e50: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x3f382ecf +80000e54: 000f2983 lw x19,0(x30) +80000e58: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0x75a03905 +80000e5c: 000f2183 lw x3,0(x30) +80000e60: 004f0f13 addi x30,x30,4 + +80000e64 : +Zbkb_orn_cg_cp_rd_b16: + orn x16, x19, x3 # perform operation +80000e64: 4039e833 orn x16,x19,x3 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_orn_cg_cp_rd_b16, Zbkb_orn_cg_cp_rd_b16_str) +80000e68: 000ba203 lw x4,0(x23) +80000e6c: 01020863 beq x4,x16,80000e7c +80000e70: 690042ef jal x5,80005500 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 80009f59 .word 0x80009f59 +80000e7c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x28393ae1 +80000e80: 000f2d83 lw x27,0(x30) +80000e84: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0xcabb00d8 +80000e88: 000f2303 lw x6,0(x30) +80000e8c: 004f0f13 addi x30,x30,4 + +80000e90 : +Zbkb_orn_cg_cp_rd_b17: + orn x17, x27, x6 # perform operation +80000e90: 406de8b3 orn x17,x27,x6 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_orn_cg_cp_rd_b17, Zbkb_orn_cg_cp_rd_b17_str) +80000e94: 000ba203 lw x4,0(x23) +80000e98: 01120863 beq x4,x17,80000ea8 +80000e9c: 664042ef jal x5,80005500 +80000ea0: 80000e90 .word 0x80000e90 +80000ea4: 80009f8a .word 0x80009f8a +80000ea8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x7ad27ff3 +80000eac: 000f2a03 lw x20,0(x30) +80000eb0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x09657485 +80000eb4: 000f2b03 lw x22,0(x30) +80000eb8: 004f0f13 addi x30,x30,4 + +80000ebc : +Zbkb_orn_cg_cp_rd_b18: + orn x18, x20, x22 # perform operation +80000ebc: 416a6933 orn x18,x20,x22 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_orn_cg_cp_rd_b18, Zbkb_orn_cg_cp_rd_b18_str) +80000ec0: 000ba203 lw x4,0(x23) +80000ec4: 01220863 beq x4,x18,80000ed4 +80000ec8: 638042ef jal x5,80005500 +80000ecc: 80000ebc .word 0x80000ebc +80000ed0: 80009fbb .word 0x80009fbb +80000ed4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xc2311d5f +80000ed8: 000f2c83 lw x25,0(x30) +80000edc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x40386db7 +80000ee0: 000f2c03 lw x24,0(x30) +80000ee4: 004f0f13 addi x30,x30,4 + +80000ee8 : +Zbkb_orn_cg_cp_rd_b19: + orn x19, x25, x24 # perform operation +80000ee8: 418ce9b3 orn x19,x25,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_orn_cg_cp_rd_b19, Zbkb_orn_cg_cp_rd_b19_str) +80000eec: 000ba203 lw x4,0(x23) +80000ef0: 01320863 beq x4,x19,80000f00 +80000ef4: 60c042ef jal x5,80005500 +80000ef8: 80000ee8 .word 0x80000ee8 +80000efc: 80009fec .word 0x80009fec +80000f00: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xc80d578e +80000f04: 000f2a83 lw x21,0(x30) +80000f08: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x62cb8bee +80000f0c: 000f2983 lw x19,0(x30) +80000f10: 004f0f13 addi x30,x30,4 + +80000f14 : +Zbkb_orn_cg_cp_rd_b20: + orn x20, x21, x19 # perform operation +80000f14: 413aea33 orn x20,x21,x19 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_orn_cg_cp_rd_b20, Zbkb_orn_cg_cp_rd_b20_str) +80000f18: 000ba203 lw x4,0(x23) +80000f1c: 01420863 beq x4,x20,80000f2c +80000f20: 5e0042ef jal x5,80005500 +80000f24: 80000f14 .word 0x80000f14 +80000f28: 8000a01d .word 0x8000a01d +80000f2c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0xf7d323f0 +80000f30: 000f2583 lw x11,0(x30) +80000f34: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x16f212f1 +80000f38: 000f2983 lw x19,0(x30) +80000f3c: 004f0f13 addi x30,x30,4 + +80000f40 : +Zbkb_orn_cg_cp_rd_b21: + orn x21, x11, x19 # perform operation +80000f40: 4135eab3 orn x21,x11,x19 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_orn_cg_cp_rd_b21, Zbkb_orn_cg_cp_rd_b21_str) +80000f44: 000ba203 lw x4,0(x23) +80000f48: 01520863 beq x4,x21,80000f58 +80000f4c: 5b4042ef jal x5,80005500 +80000f50: 80000f40 .word 0x80000f40 +80000f54: 8000a04e .word 0x8000a04e +80000f58: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs1: x31 = 0xffdae78e +80000f5c: 000f2f83 lw x31,0(x30) +80000f60: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xcfe8a5ad +80000f64: 000f2e03 lw x28,0(x30) +80000f68: 004f0f13 addi x30,x30,4 + +80000f6c : +Zbkb_orn_cg_cp_rd_b22: + orn x22, x31, x28 # perform operation +80000f6c: 41cfeb33 orn x22,x31,x28 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_orn_cg_cp_rd_b22, Zbkb_orn_cg_cp_rd_b22_str) +80000f70: 000ba203 lw x4,0(x23) +80000f74: 01620863 beq x4,x22,80000f84 +80000f78: 588042ef jal x5,80005500 +80000f7c: 80000f6c .word 0x80000f6c +80000f80: 8000a07f .word 0x8000a07f +80000f84: 004b8b93 addi x23,x23,4 + + mv x12, x23 # switch signature pointer register to avoid conflict with test +80000f88: 000b8613 addi x12,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xf6397af5 +80000f8c: 000f2803 lw x16,0(x30) +80000f90: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0x0a971d3c +80000f94: 000f2303 lw x6,0(x30) +80000f98: 004f0f13 addi x30,x30,4 + +80000f9c : +Zbkb_orn_cg_cp_rd_b23: + orn x23, x16, x6 # perform operation +80000f9c: 40686bb3 orn x23,x16,x6 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cp_rd_b23, Zbkb_orn_cg_cp_rd_b23_str) +80000fa0: 00062203 lw x4,0(x12) +80000fa4: 01720863 beq x4,x23,80000fb4 +80000fa8: 558042ef jal x5,80005500 +80000fac: 80000f9c .word 0x80000f9c +80000fb0: 8000a0b0 .word 0x8000a0b0 +80000fb4: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xfd7b8367 +80000fb8: 000f2683 lw x13,0(x30) +80000fbc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0xf394b9a6 +80000fc0: 000f2783 lw x15,0(x30) +80000fc4: 004f0f13 addi x30,x30,4 + +80000fc8 : +Zbkb_orn_cg_cp_rd_b24: + orn x24, x13, x15 # perform operation +80000fc8: 40f6ec33 orn x24,x13,x15 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_orn_cg_cp_rd_b24, Zbkb_orn_cg_cp_rd_b24_str) +80000fcc: 00062203 lw x4,0(x12) +80000fd0: 01820863 beq x4,x24,80000fe0 +80000fd4: 52c042ef jal x5,80005500 +80000fd8: 80000fc8 .word 0x80000fc8 +80000fdc: 8000a0e1 .word 0x8000a0e1 +80000fe0: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0xfed2655f +80000fe4: 000f2083 lw x1,0(x30) +80000fe8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x149f29eb +80000fec: 000f2803 lw x16,0(x30) +80000ff0: 004f0f13 addi x30,x30,4 + +80000ff4 : +Zbkb_orn_cg_cp_rd_b25: + orn x25, x1, x16 # perform operation +80000ff4: 4100ecb3 orn x25,x1,x16 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cp_rd_b25, Zbkb_orn_cg_cp_rd_b25_str) +80000ff8: 00062203 lw x4,0(x12) +80000ffc: 01920863 beq x4,x25,8000100c +80001000: 500042ef jal x5,80005500 +80001004: 80000ff4 .word 0x80000ff4 +80001008: 8000a112 .word 0x8000a112 +8000100c: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0xb66d37da +80001010: 000f2a03 lw x20,0(x30) +80001014: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x59c5eccc +80001018: 000f2e83 lw x29,0(x30) +8000101c: 004f0f13 addi x30,x30,4 + +80001020 : +Zbkb_orn_cg_cp_rd_b26: + orn x26, x20, x29 # perform operation +80001020: 41da6d33 orn x26,x20,x29 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cp_rd_b26, Zbkb_orn_cg_cp_rd_b26_str) +80001024: 00062203 lw x4,0(x12) +80001028: 01a20863 beq x4,x26,80001038 +8000102c: 4d4042ef jal x5,80005500 +80001030: 80001020 .word 0x80001020 +80001034: 8000a143 .word 0x8000a143 +80001038: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x3732ac5b +8000103c: 000f2083 lw x1,0(x30) +80001040: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x0f6051c2 +80001044: 000f2d03 lw x26,0(x30) +80001048: 004f0f13 addi x30,x30,4 + +8000104c : +Zbkb_orn_cg_cp_rd_b27: + orn x27, x1, x26 # perform operation +8000104c: 41a0edb3 orn x27,x1,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cp_rd_b27, Zbkb_orn_cg_cp_rd_b27_str) +80001050: 00062203 lw x4,0(x12) +80001054: 01b20863 beq x4,x27,80001064 +80001058: 4a8042ef jal x5,80005500 +8000105c: 8000104c .word 0x8000104c +80001060: 8000a174 .word 0x8000a174 +80001064: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x42f81e4b +80001068: 000f2003 lw x0,0(x30) +8000106c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xfbf50569 +80001070: 000f2c03 lw x24,0(x30) +80001074: 004f0f13 addi x30,x30,4 + +80001078 : +Zbkb_orn_cg_cp_rd_b28: + orn x28, x0, x24 # perform operation +80001078: 41806e33 orn x28,x0,x24 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cp_rd_b28, Zbkb_orn_cg_cp_rd_b28_str) +8000107c: 00062203 lw x4,0(x12) +80001080: 01c20863 beq x4,x28,80001090 +80001084: 47c042ef jal x5,80005500 +80001088: 80001078 .word 0x80001078 +8000108c: 8000a1a5 .word 0x8000a1a5 +80001090: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x1b67134c +80001094: 000f2d83 lw x27,0(x30) +80001098: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x9baf3ed6 +8000109c: 000f2883 lw x17,0(x30) +800010a0: 004f0f13 addi x30,x30,4 + +800010a4 : +Zbkb_orn_cg_cp_rd_b29: + orn x29, x27, x17 # perform operation +800010a4: 411deeb3 orn x29,x27,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cp_rd_b29, Zbkb_orn_cg_cp_rd_b29_str) +800010a8: 00062203 lw x4,0(x12) +800010ac: 01d20863 beq x4,x29,800010bc +800010b0: 450042ef jal x5,80005500 +800010b4: 800010a4 .word 0x800010a4 +800010b8: 8000a1d6 .word 0x8000a1d6 +800010bc: 00460613 addi x12,x12,4 + + mv x15, x30 # switch data pointer register to avoid conflict with test +800010c0: 000f0793 addi x15,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x3ae18c89 +800010c4: 0007a903 lw x18,0(x15) +800010c8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x348fab72 +800010cc: 0007a483 lw x9,0(x15) +800010d0: 00478793 addi x15,x15,4 + +800010d4 : +Zbkb_orn_cg_cp_rd_b30: + orn x30, x18, x9 # perform operation +800010d4: 40996f33 orn x30,x18,x9 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cp_rd_b30, Zbkb_orn_cg_cp_rd_b30_str) +800010d8: 00062203 lw x4,0(x12) +800010dc: 01e20863 beq x4,x30,800010ec +800010e0: 420042ef jal x5,80005500 +800010e4: 800010d4 .word 0x800010d4 +800010e8: 8000a207 .word 0x8000a207 +800010ec: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xd5ecc433 +800010f0: 0007a583 lw x11,0(x15) +800010f4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x7a327ce0 +800010f8: 0007a403 lw x8,0(x15) +800010fc: 00478793 addi x15,x15,4 + +80001100 : +Zbkb_orn_cg_cp_rd_b31: + orn x31, x11, x8 # perform operation +80001100: 4085efb3 orn x31,x11,x8 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_orn_cg_cp_rd_b31, Zbkb_orn_cg_cp_rd_b31_str) +80001104: 00062203 lw x4,0(x12) +80001108: 01f20863 beq x4,x31,80001118 +8000110c: 3f4042ef jal x5,80005500 +80001110: 80001100 .word 0x80001100 +80001114: 8000a238 .word 0x8000a238 +80001118: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x00000000 +8000111c: 0007ae83 lw x29,0(x15) +80001120: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x3319c0b7 +80001124: 0007a803 lw x16,0(x15) +80001128: 00478793 addi x15,x15,4 + +8000112c : +Zbkb_orn_cg_cp_rs1_edges_0x0: + orn x7, x29, x16 # perform operation +8000112c: 410ee3b3 orn x7,x29,x16 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cp_rs1_edges_0x0, Zbkb_orn_cg_cp_rs1_edges_0x0_str) +80001130: 00062203 lw x4,0(x12) +80001134: 00720863 beq x4,x7,80001144 +80001138: 3c8042ef jal x5,80005500 +8000113c: 8000112c .word 0x8000112c +80001140: 8000a269 .word 0x8000a269 +80001144: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x00000001 +80001148: 0007ad03 lw x26,0(x15) +8000114c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xd2413f14 +80001150: 0007a703 lw x14,0(x15) +80001154: 00478793 addi x15,x15,4 + +80001158 : +Zbkb_orn_cg_cp_rs1_edges_0x1: + orn x22, x26, x14 # perform operation +80001158: 40ed6b33 orn x22,x26,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cp_rs1_edges_0x1, Zbkb_orn_cg_cp_rs1_edges_0x1_str) +8000115c: 00062203 lw x4,0(x12) +80001160: 01620863 beq x4,x22,80001170 +80001164: 39c042ef jal x5,80005500 +80001168: 80001158 .word 0x80001158 +8000116c: 8000a2a1 .word 0x8000a2a1 +80001170: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000002 +80001174: 0007ab03 lw x22,0(x15) +80001178: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x398a435d +8000117c: 0007a883 lw x17,0(x15) +80001180: 00478793 addi x15,x15,4 + +80001184 : +Zbkb_orn_cg_cp_rs1_edges_0x2: + orn x3, x22, x17 # perform operation +80001184: 411b61b3 orn x3,x22,x17 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cp_rs1_edges_0x2, Zbkb_orn_cg_cp_rs1_edges_0x2_str) +80001188: 00062203 lw x4,0(x12) +8000118c: 00320863 beq x4,x3,8000119c +80001190: 370042ef jal x5,80005500 +80001194: 80001184 .word 0x80001184 +80001198: 8000a2d9 .word 0x8000a2d9 +8000119c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x80000000 +800011a0: 0007af83 lw x31,0(x15) +800011a4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xfdf81975 +800011a8: 0007a103 lw x2,0(x15) +800011ac: 00478793 addi x15,x15,4 + +800011b0 : +Zbkb_orn_cg_cp_rs1_edges_0x80000000: + orn x28, x31, x2 # perform operation +800011b0: 402fee33 orn x28,x31,x2 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cp_rs1_edges_0x80000000, Zbkb_orn_cg_cp_rs1_edges_0x80000000_str) +800011b4: 00062203 lw x4,0(x12) +800011b8: 01c20863 beq x4,x28,800011c8 +800011bc: 344042ef jal x5,80005500 +800011c0: 800011b0 .word 0x800011b0 +800011c4: 8000a311 .word 0x8000a311 +800011c8: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x80000001 +800011cc: 0007aa83 lw x21,0(x15) +800011d0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xc5a440a6 +800011d4: 0007ad83 lw x27,0(x15) +800011d8: 00478793 addi x15,x15,4 + +800011dc : +Zbkb_orn_cg_cp_rs1_edges_0x80000001: + orn x1, x21, x27 # perform operation +800011dc: 41bae0b3 orn x1,x21,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cp_rs1_edges_0x80000001, Zbkb_orn_cg_cp_rs1_edges_0x80000001_str) +800011e0: 00062203 lw x4,0(x12) +800011e4: 00120863 beq x4,x1,800011f4 +800011e8: 318042ef jal x5,80005500 +800011ec: 800011dc .word 0x800011dc +800011f0: 8000a351 .word 0x8000a351 +800011f4: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x7fffffff +800011f8: 0007ad83 lw x27,0(x15) +800011fc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x957762c4 +80001200: 0007a883 lw x17,0(x15) +80001204: 00478793 addi x15,x15,4 + +80001208 : +Zbkb_orn_cg_cp_rs1_edges_0x7fffffff: + orn x2, x27, x17 # perform operation +80001208: 411de133 orn x2,x27,x17 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cp_rs1_edges_0x7fffffff, Zbkb_orn_cg_cp_rs1_edges_0x7fffffff_str) +8000120c: 00062203 lw x4,0(x12) +80001210: 00220863 beq x4,x2,80001220 +80001214: 2ec042ef jal x5,80005500 +80001218: 80001208 .word 0x80001208 +8000121c: 8000a391 .word 0x8000a391 +80001220: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x7ffffffe +80001224: 0007ab83 lw x23,0(x15) +80001228: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x93d74b9d +8000122c: 0007af83 lw x31,0(x15) +80001230: 00478793 addi x15,x15,4 + +80001234 : +Zbkb_orn_cg_cp_rs1_edges_0x7ffffffe: + orn x11, x23, x31 # perform operation +80001234: 41fbe5b3 orn x11,x23,x31 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cp_rs1_edges_0x7ffffffe, Zbkb_orn_cg_cp_rs1_edges_0x7ffffffe_str) +80001238: 00062203 lw x4,0(x12) +8000123c: 00b20863 beq x4,x11,8000124c +80001240: 2c0042ef jal x5,80005500 +80001244: 80001234 .word 0x80001234 +80001248: 8000a3d1 .word 0x8000a3d1 +8000124c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xffffffff +80001250: 0007a903 lw x18,0(x15) +80001254: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xe39dd059 +80001258: 0007ae83 lw x29,0(x15) +8000125c: 00478793 addi x15,x15,4 + +80001260 : +Zbkb_orn_cg_cp_rs1_edges_0xffffffff: + orn x23, x18, x29 # perform operation +80001260: 41d96bb3 orn x23,x18,x29 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cp_rs1_edges_0xffffffff, Zbkb_orn_cg_cp_rs1_edges_0xffffffff_str) +80001264: 00062203 lw x4,0(x12) +80001268: 01720863 beq x4,x23,80001278 +8000126c: 294042ef jal x5,80005500 +80001270: 80001260 .word 0x80001260 +80001274: 8000a411 .word 0x8000a411 +80001278: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xfffffffe +8000127c: 0007a803 lw x16,0(x15) +80001280: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xbb9b79e0 +80001284: 0007a403 lw x8,0(x15) +80001288: 00478793 addi x15,x15,4 + +8000128c : +Zbkb_orn_cg_cp_rs1_edges_0xfffffffe: + orn x22, x16, x8 # perform operation +8000128c: 40886b33 orn x22,x16,x8 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cp_rs1_edges_0xfffffffe, Zbkb_orn_cg_cp_rs1_edges_0xfffffffe_str) +80001290: 00062203 lw x4,0(x12) +80001294: 01620863 beq x4,x22,800012a4 +80001298: 268042ef jal x5,80005500 +8000129c: 8000128c .word 0x8000128c +800012a0: 8000a451 .word 0x8000a451 +800012a4: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x5bbc8872 +800012a8: 0007a683 lw x13,0(x15) +800012ac: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xff6c012f +800012b0: 0007a383 lw x7,0(x15) +800012b4: 00478793 addi x15,x15,4 + +800012b8 : +Zbkb_orn_cg_cp_rs1_edges_0x5bbc8872: + orn x16, x13, x7 # perform operation +800012b8: 4076e833 orn x16,x13,x7 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cp_rs1_edges_0x5bbc8872, Zbkb_orn_cg_cp_rs1_edges_0x5bbc8872_str) +800012bc: 00062203 lw x4,0(x12) +800012c0: 01020863 beq x4,x16,800012d0 +800012c4: 23c042ef jal x5,80005500 +800012c8: 800012b8 .word 0x800012b8 +800012cc: 8000a491 .word 0x8000a491 +800012d0: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xaaaaaaaa +800012d4: 0007a483 lw x9,0(x15) +800012d8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x5939cc4e +800012dc: 0007af83 lw x31,0(x15) +800012e0: 00478793 addi x15,x15,4 + +800012e4 : +Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaa: + orn x20, x9, x31 # perform operation +800012e4: 41f4ea33 orn x20,x9,x31 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012e8: 00062203 lw x4,0(x12) +800012ec: 01420863 beq x4,x20,800012fc +800012f0: 210042ef jal x5,80005500 +800012f4: 800012e4 .word 0x800012e4 +800012f8: 8000a4d1 .word 0x8000a4d1 +800012fc: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x55555555 +80001300: 0007a903 lw x18,0(x15) +80001304: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x8cf5f49e +80001308: 0007ae03 lw x28,0(x15) +8000130c: 00478793 addi x15,x15,4 + +80001310 : +Zbkb_orn_cg_cp_rs1_edges_0x55555555: + orn x6, x18, x28 # perform operation +80001310: 41c96333 orn x6,x18,x28 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cp_rs1_edges_0x55555555, Zbkb_orn_cg_cp_rs1_edges_0x55555555_str) +80001314: 00062203 lw x4,0(x12) +80001318: 00620863 beq x4,x6,80001328 +8000131c: 1e4042ef jal x5,80005500 +80001320: 80001310 .word 0x80001310 +80001324: 8000a511 .word 0x8000a511 +80001328: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x5113de2a +8000132c: 0007a303 lw x6,0(x15) +80001330: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x00000000 +80001334: 0007ad03 lw x26,0(x15) +80001338: 00478793 addi x15,x15,4 + +8000133c : +Zbkb_orn_cg_cp_rs2_edges_0x0: + orn x17, x6, x26 # perform operation +8000133c: 41a368b3 orn x17,x6,x26 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_orn_cg_cp_rs2_edges_0x0, Zbkb_orn_cg_cp_rs2_edges_0x0_str) +80001340: 00062203 lw x4,0(x12) +80001344: 01120863 beq x4,x17,80001354 +80001348: 1b8042ef jal x5,80005500 +8000134c: 8000133c .word 0x8000133c +80001350: 8000a551 .word 0x8000a551 +80001354: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8d438563 +80001358: 0007ac03 lw x24,0(x15) +8000135c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x00000001 +80001360: 0007ad03 lw x26,0(x15) +80001364: 00478793 addi x15,x15,4 + +80001368 : +Zbkb_orn_cg_cp_rs2_edges_0x1: + orn x20, x24, x26 # perform operation +80001368: 41ac6a33 orn x20,x24,x26 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cp_rs2_edges_0x1, Zbkb_orn_cg_cp_rs2_edges_0x1_str) +8000136c: 00062203 lw x4,0(x12) +80001370: 01420863 beq x4,x20,80001380 +80001374: 18c042ef jal x5,80005500 +80001378: 80001368 .word 0x80001368 +8000137c: 8000a58a .word 0x8000a58a +80001380: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xe19552c8 +80001384: 0007a183 lw x3,0(x15) +80001388: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x00000002 +8000138c: 0007ab03 lw x22,0(x15) +80001390: 00478793 addi x15,x15,4 + +80001394 : +Zbkb_orn_cg_cp_rs2_edges_0x2: + orn x13, x3, x22 # perform operation +80001394: 4161e6b3 orn x13,x3,x22 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cp_rs2_edges_0x2, Zbkb_orn_cg_cp_rs2_edges_0x2_str) +80001398: 00062203 lw x4,0(x12) +8000139c: 00d20863 beq x4,x13,800013ac +800013a0: 160042ef jal x5,80005500 +800013a4: 80001394 .word 0x80001394 +800013a8: 8000a5c3 .word 0x8000a5c3 +800013ac: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x9e8e4964 +800013b0: 0007ae83 lw x29,0(x15) +800013b4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x80000000 +800013b8: 0007af03 lw x30,0(x15) +800013bc: 00478793 addi x15,x15,4 + +800013c0 : +Zbkb_orn_cg_cp_rs2_edges_0x80000000: + orn x24, x29, x30 # perform operation +800013c0: 41eeec33 orn x24,x29,x30 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_orn_cg_cp_rs2_edges_0x80000000, Zbkb_orn_cg_cp_rs2_edges_0x80000000_str) +800013c4: 00062203 lw x4,0(x12) +800013c8: 01820863 beq x4,x24,800013d8 +800013cc: 134042ef jal x5,80005500 +800013d0: 800013c0 .word 0x800013c0 +800013d4: 8000a5fc .word 0x8000a5fc +800013d8: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x5ce43201 +800013dc: 0007a483 lw x9,0(x15) +800013e0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x80000001 +800013e4: 0007a803 lw x16,0(x15) +800013e8: 00478793 addi x15,x15,4 + +800013ec : +Zbkb_orn_cg_cp_rs2_edges_0x80000001: + orn x19, x9, x16 # perform operation +800013ec: 4104e9b3 orn x19,x9,x16 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_orn_cg_cp_rs2_edges_0x80000001, Zbkb_orn_cg_cp_rs2_edges_0x80000001_str) +800013f0: 00062203 lw x4,0(x12) +800013f4: 01320863 beq x4,x19,80001404 +800013f8: 108042ef jal x5,80005500 +800013fc: 800013ec .word 0x800013ec +80001400: 8000a63c .word 0x8000a63c +80001404: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xb41d7355 +80001408: 0007a983 lw x19,0(x15) +8000140c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x7fffffff +80001410: 0007a503 lw x10,0(x15) +80001414: 00478793 addi x15,x15,4 + +80001418 : +Zbkb_orn_cg_cp_rs2_edges_0x7fffffff: + orn x2, x19, x10 # perform operation +80001418: 40a9e133 orn x2,x19,x10 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cp_rs2_edges_0x7fffffff, Zbkb_orn_cg_cp_rs2_edges_0x7fffffff_str) +8000141c: 00062203 lw x4,0(x12) +80001420: 00220863 beq x4,x2,80001430 +80001424: 0dc042ef jal x5,80005500 +80001428: 80001418 .word 0x80001418 +8000142c: 8000a67c .word 0x8000a67c +80001430: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x84f2e238 +80001434: 0007a183 lw x3,0(x15) +80001438: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x7ffffffe +8000143c: 0007af03 lw x30,0(x15) +80001440: 00478793 addi x15,x15,4 + +80001444 : +Zbkb_orn_cg_cp_rs2_edges_0x7ffffffe: + orn x8, x3, x30 # perform operation +80001444: 41e1e433 orn x8,x3,x30 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cp_rs2_edges_0x7ffffffe, Zbkb_orn_cg_cp_rs2_edges_0x7ffffffe_str) +80001448: 00062203 lw x4,0(x12) +8000144c: 00820863 beq x4,x8,8000145c +80001450: 0b0042ef jal x5,80005500 +80001454: 80001444 .word 0x80001444 +80001458: 8000a6bc .word 0x8000a6bc +8000145c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xfb83ac53 +80001460: 0007a983 lw x19,0(x15) +80001464: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xffffffff +80001468: 0007a703 lw x14,0(x15) +8000146c: 00478793 addi x15,x15,4 + +80001470 : +Zbkb_orn_cg_cp_rs2_edges_0xffffffff: + orn x2, x19, x14 # perform operation +80001470: 40e9e133 orn x2,x19,x14 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cp_rs2_edges_0xffffffff, Zbkb_orn_cg_cp_rs2_edges_0xffffffff_str) +80001474: 00062203 lw x4,0(x12) +80001478: 00220863 beq x4,x2,80001488 +8000147c: 084042ef jal x5,80005500 +80001480: 80001470 .word 0x80001470 +80001484: 8000a6fc .word 0x8000a6fc +80001488: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xeb27e563 +8000148c: 0007a803 lw x16,0(x15) +80001490: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xfffffffe +80001494: 0007ac03 lw x24,0(x15) +80001498: 00478793 addi x15,x15,4 + +8000149c : +Zbkb_orn_cg_cp_rs2_edges_0xfffffffe: + orn x6, x16, x24 # perform operation +8000149c: 41886333 orn x6,x16,x24 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cp_rs2_edges_0xfffffffe, Zbkb_orn_cg_cp_rs2_edges_0xfffffffe_str) +800014a0: 00062203 lw x4,0(x12) +800014a4: 00620863 beq x4,x6,800014b4 +800014a8: 058042ef jal x5,80005500 +800014ac: 8000149c .word 0x8000149c +800014b0: 8000a73c .word 0x8000a73c +800014b4: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x194defc3 +800014b8: 0007a883 lw x17,0(x15) +800014bc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x5bbc8872 +800014c0: 0007a483 lw x9,0(x15) +800014c4: 00478793 addi x15,x15,4 + +800014c8 : +Zbkb_orn_cg_cp_rs2_edges_0x5bbc8872: + orn x2, x17, x9 # perform operation +800014c8: 4098e133 orn x2,x17,x9 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cp_rs2_edges_0x5bbc8872, Zbkb_orn_cg_cp_rs2_edges_0x5bbc8872_str) +800014cc: 00062203 lw x4,0(x12) +800014d0: 00220863 beq x4,x2,800014e0 +800014d4: 02c042ef jal x5,80005500 +800014d8: 800014c8 .word 0x800014c8 +800014dc: 8000a77c .word 0x8000a77c +800014e0: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xa0671132 +800014e4: 0007a983 lw x19,0(x15) +800014e8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xaaaaaaaa +800014ec: 0007ab03 lw x22,0(x15) +800014f0: 00478793 addi x15,x15,4 + +800014f4 : +Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaa: + orn x17, x19, x22 # perform operation +800014f4: 4169e8b3 orn x17,x19,x22 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014f8: 00062203 lw x4,0(x12) +800014fc: 01120863 beq x4,x17,8000150c +80001500: 000042ef jal x5,80005500 +80001504: 800014f4 .word 0x800014f4 +80001508: 8000a7bc .word 0x8000a7bc +8000150c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x8cef1b1c +80001510: 0007aa03 lw x20,0(x15) +80001514: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x55555555 +80001518: 0007ab03 lw x22,0(x15) +8000151c: 00478793 addi x15,x15,4 + +80001520 : +Zbkb_orn_cg_cp_rs2_edges_0x55555555: + orn x23, x20, x22 # perform operation +80001520: 416a6bb3 orn x23,x20,x22 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cp_rs2_edges_0x55555555, Zbkb_orn_cg_cp_rs2_edges_0x55555555_str) +80001524: 00062203 lw x4,0(x12) +80001528: 01720863 beq x4,x23,80001538 +8000152c: 7d5032ef jal x5,80005500 +80001530: 80001520 .word 0x80001520 +80001534: 8000a7fc .word 0x8000a7fc +80001538: 00460613 addi x12,x12,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x00000000 +8000153c: 0007ae83 lw x29,0(x15) +80001540: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x00000000 +80001544: 0007ac83 lw x25,0(x15) +80001548: 00478793 addi x15,x15,4 + +8000154c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + orn x28, x29, x25 # perform operation +8000154c: 419eee33 orn x28,x29,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001550: 00062203 lw x4,0(x12) +80001554: 01c20863 beq x4,x28,80001564 +80001558: 7a9032ef jal x5,80005500 +8000155c: 8000154c .word 0x8000154c +80001560: 8000a83c .word 0x8000a83c +80001564: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x00000000 +80001568: 0007a803 lw x16,0(x15) +8000156c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000001 +80001570: 0007aa83 lw x21,0(x15) +80001574: 00478793 addi x15,x15,4 + +80001578 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + orn x6, x16, x21 # perform operation +80001578: 41586333 orn x6,x16,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000157c: 00062203 lw x4,0(x12) +80001580: 00620863 beq x4,x6,80001590 +80001584: 77d032ef jal x5,80005500 +80001588: 80001578 .word 0x80001578 +8000158c: 8000a88c .word 0x8000a88c +80001590: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x00000000 +80001594: 0007ae83 lw x29,0(x15) +80001598: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x00000002 +8000159c: 0007a403 lw x8,0(x15) +800015a0: 00478793 addi x15,x15,4 + +800015a4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + orn x3, x29, x8 # perform operation +800015a4: 408ee1b3 orn x3,x29,x8 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015a8: 00062203 lw x4,0(x12) +800015ac: 00320863 beq x4,x3,800015bc +800015b0: 751032ef jal x5,80005500 +800015b4: 800015a4 .word 0x800015a4 +800015b8: 8000a8dc .word 0x8000a8dc +800015bc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x00000000 +800015c0: 0007a983 lw x19,0(x15) +800015c4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x80000000 +800015c8: 0007a383 lw x7,0(x15) +800015cc: 00478793 addi x15,x15,4 + +800015d0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + orn x3, x19, x7 # perform operation +800015d0: 4079e1b3 orn x3,x19,x7 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015d4: 00062203 lw x4,0(x12) +800015d8: 00320863 beq x4,x3,800015e8 +800015dc: 725032ef jal x5,80005500 +800015e0: 800015d0 .word 0x800015d0 +800015e4: 8000a92c .word 0x8000a92c +800015e8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x00000000 +800015ec: 0007a703 lw x14,0(x15) +800015f0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x80000001 +800015f4: 0007ac03 lw x24,0(x15) +800015f8: 00478793 addi x15,x15,4 + +800015fc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + orn x25, x14, x24 # perform operation +800015fc: 41876cb3 orn x25,x14,x24 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001600: 00062203 lw x4,0(x12) +80001604: 01920863 beq x4,x25,80001614 +80001608: 6f9032ef jal x5,80005500 +8000160c: 800015fc .word 0x800015fc +80001610: 8000a983 .word 0x8000a983 +80001614: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x00000000 +80001618: 0007a183 lw x3,0(x15) +8000161c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7fffffff +80001620: 0007a703 lw x14,0(x15) +80001624: 00478793 addi x15,x15,4 + +80001628 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + orn x1, x3, x14 # perform operation +80001628: 40e1e0b3 orn x1,x3,x14 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000162c: 00062203 lw x4,0(x12) +80001630: 00120863 beq x4,x1,80001640 +80001634: 6cd032ef jal x5,80005500 +80001638: 80001628 .word 0x80001628 +8000163c: 8000a9da .word 0x8000a9da +80001640: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000000 +80001644: 0007ab03 lw x22,0(x15) +80001648: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x7ffffffe +8000164c: 0007a103 lw x2,0(x15) +80001650: 00478793 addi x15,x15,4 + +80001654 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + orn x20, x22, x2 # perform operation +80001654: 402b6a33 orn x20,x22,x2 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001658: 00062203 lw x4,0(x12) +8000165c: 01420863 beq x4,x20,8000166c +80001660: 6a1032ef jal x5,80005500 +80001664: 80001654 .word 0x80001654 +80001668: 8000aa31 .word 0x8000aa31 +8000166c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x00000000 +80001670: 0007a303 lw x6,0(x15) +80001674: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xffffffff +80001678: 0007a183 lw x3,0(x15) +8000167c: 00478793 addi x15,x15,4 + +80001680 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + orn x27, x6, x3 # perform operation +80001680: 40336db3 orn x27,x6,x3 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001684: 00062203 lw x4,0(x12) +80001688: 01b20863 beq x4,x27,80001698 +8000168c: 675032ef jal x5,80005500 +80001690: 80001680 .word 0x80001680 +80001694: 8000aa88 .word 0x8000aa88 +80001698: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x00000000 +8000169c: 0007a103 lw x2,0(x15) +800016a0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xfffffffe +800016a4: 0007a983 lw x19,0(x15) +800016a8: 00478793 addi x15,x15,4 + +800016ac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + orn x3, x2, x19 # perform operation +800016ac: 413161b3 orn x3,x2,x19 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016b0: 00062203 lw x4,0(x12) +800016b4: 00320863 beq x4,x3,800016c4 +800016b8: 649032ef jal x5,80005500 +800016bc: 800016ac .word 0x800016ac +800016c0: 8000aadf .word 0x8000aadf +800016c4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x00000000 +800016c8: 0007a803 lw x16,0(x15) +800016cc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5bbc8872 +800016d0: 0007af03 lw x30,0(x15) +800016d4: 00478793 addi x15,x15,4 + +800016d8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + orn x14, x16, x30 # perform operation +800016d8: 41e86733 orn x14,x16,x30 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016dc: 00062203 lw x4,0(x12) +800016e0: 00e20863 beq x4,x14,800016f0 +800016e4: 61d032ef jal x5,80005500 +800016e8: 800016d8 .word 0x800016d8 +800016ec: 8000ab36 .word 0x8000ab36 +800016f0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x00000000 +800016f4: 0007aa03 lw x20,0(x15) +800016f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xaaaaaaaa +800016fc: 0007ab83 lw x23,0(x15) +80001700: 00478793 addi x15,x15,4 + +80001704 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + orn x7, x20, x23 # perform operation +80001704: 417a63b3 orn x7,x20,x23 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001708: 00062203 lw x4,0(x12) +8000170c: 00720863 beq x4,x7,8000171c +80001710: 5f1032ef jal x5,80005500 +80001714: 80001704 .word 0x80001704 +80001718: 8000ab8d .word 0x8000ab8d +8000171c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x00000000 +80001720: 0007a683 lw x13,0(x15) +80001724: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x55555555 +80001728: 0007a403 lw x8,0(x15) +8000172c: 00478793 addi x15,x15,4 + +80001730 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + orn x19, x13, x8 # perform operation +80001730: 4086e9b3 orn x19,x13,x8 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001734: 00062203 lw x4,0(x12) +80001738: 01320863 beq x4,x19,80001748 +8000173c: 5c5032ef jal x5,80005500 +80001740: 80001730 .word 0x80001730 +80001744: 8000abe4 .word 0x8000abe4 +80001748: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x00000001 +8000174c: 0007a503 lw x10,0(x15) +80001750: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x00000000 +80001754: 0007a983 lw x19,0(x15) +80001758: 00478793 addi x15,x15,4 + +8000175c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + orn x13, x10, x19 # perform operation +8000175c: 413566b3 orn x13,x10,x19 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001760: 00062203 lw x4,0(x12) +80001764: 00d20863 beq x4,x13,80001774 +80001768: 599032ef jal x5,80005500 +8000176c: 8000175c .word 0x8000175c +80001770: 8000ac3b .word 0x8000ac3b +80001774: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x00000001 +80001778: 0007af03 lw x30,0(x15) +8000177c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x00000001 +80001780: 0007ab83 lw x23,0(x15) +80001784: 00478793 addi x15,x15,4 + +80001788 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + orn x18, x30, x23 # perform operation +80001788: 417f6933 orn x18,x30,x23 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +8000178c: 00062203 lw x4,0(x12) +80001790: 01220863 beq x4,x18,800017a0 +80001794: 56d032ef jal x5,80005500 +80001798: 80001788 .word 0x80001788 +8000179c: 8000ac8b .word 0x8000ac8b +800017a0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x00000001 +800017a4: 0007a883 lw x17,0(x15) +800017a8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x00000002 +800017ac: 0007a583 lw x11,0(x15) +800017b0: 00478793 addi x15,x15,4 + +800017b4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + orn x16, x17, x11 # perform operation +800017b4: 40b8e833 orn x16,x17,x11 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017b8: 00062203 lw x4,0(x12) +800017bc: 01020863 beq x4,x16,800017cc +800017c0: 541032ef jal x5,80005500 +800017c4: 800017b4 .word 0x800017b4 +800017c8: 8000acdb .word 0x8000acdb +800017cc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x00000001 +800017d0: 0007a383 lw x7,0(x15) +800017d4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x80000000 +800017d8: 0007ac83 lw x25,0(x15) +800017dc: 00478793 addi x15,x15,4 + +800017e0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + orn x14, x7, x25 # perform operation +800017e0: 4193e733 orn x14,x7,x25 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017e4: 00062203 lw x4,0(x12) +800017e8: 00e20863 beq x4,x14,800017f8 +800017ec: 515032ef jal x5,80005500 +800017f0: 800017e0 .word 0x800017e0 +800017f4: 8000ad2b .word 0x8000ad2b +800017f8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x00000001 +800017fc: 0007ab83 lw x23,0(x15) +80001800: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x80000001 +80001804: 0007ac03 lw x24,0(x15) +80001808: 00478793 addi x15,x15,4 + +8000180c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + orn x21, x23, x24 # perform operation +8000180c: 418beab3 orn x21,x23,x24 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001810: 00062203 lw x4,0(x12) +80001814: 01520863 beq x4,x21,80001824 +80001818: 4e9032ef jal x5,80005500 +8000181c: 8000180c .word 0x8000180c +80001820: 8000ad82 .word 0x8000ad82 +80001824: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x00000001 +80001828: 0007a703 lw x14,0(x15) +8000182c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x7fffffff +80001830: 0007a483 lw x9,0(x15) +80001834: 00478793 addi x15,x15,4 + +80001838 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + orn x10, x14, x9 # perform operation +80001838: 40976533 orn x10,x14,x9 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000183c: 00062203 lw x4,0(x12) +80001840: 00a20863 beq x4,x10,80001850 +80001844: 4bd032ef jal x5,80005500 +80001848: 80001838 .word 0x80001838 +8000184c: 8000add9 .word 0x8000add9 +80001850: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x00000001 +80001854: 0007ac03 lw x24,0(x15) +80001858: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x7ffffffe +8000185c: 0007aa83 lw x21,0(x15) +80001860: 00478793 addi x15,x15,4 + +80001864 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + orn x28, x24, x21 # perform operation +80001864: 415c6e33 orn x28,x24,x21 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001868: 00062203 lw x4,0(x12) +8000186c: 01c20863 beq x4,x28,8000187c +80001870: 491032ef jal x5,80005500 +80001874: 80001864 .word 0x80001864 +80001878: 8000ae30 .word 0x8000ae30 +8000187c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x00000001 +80001880: 0007a983 lw x19,0(x15) +80001884: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xffffffff +80001888: 0007ab83 lw x23,0(x15) +8000188c: 00478793 addi x15,x15,4 + +80001890 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + orn x11, x19, x23 # perform operation +80001890: 4179e5b3 orn x11,x19,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +80001894: 00062203 lw x4,0(x12) +80001898: 00b20863 beq x4,x11,800018a8 +8000189c: 465032ef jal x5,80005500 +800018a0: 80001890 .word 0x80001890 +800018a4: 8000ae87 .word 0x8000ae87 +800018a8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000001 +800018ac: 0007ae03 lw x28,0(x15) +800018b0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xfffffffe +800018b4: 0007aa83 lw x21,0(x15) +800018b8: 00478793 addi x15,x15,4 + +800018bc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + orn x2, x28, x21 # perform operation +800018bc: 415e6133 orn x2,x28,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018c0: 00062203 lw x4,0(x12) +800018c4: 00220863 beq x4,x2,800018d4 +800018c8: 439032ef jal x5,80005500 +800018cc: 800018bc .word 0x800018bc +800018d0: 8000aede .word 0x8000aede +800018d4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x00000001 +800018d8: 0007ad03 lw x26,0(x15) +800018dc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x5bbc8872 +800018e0: 0007ae03 lw x28,0(x15) +800018e4: 00478793 addi x15,x15,4 + +800018e8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + orn x22, x26, x28 # perform operation +800018e8: 41cd6b33 orn x22,x26,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018ec: 00062203 lw x4,0(x12) +800018f0: 01620863 beq x4,x22,80001900 +800018f4: 40d032ef jal x5,80005500 +800018f8: 800018e8 .word 0x800018e8 +800018fc: 8000af35 .word 0x8000af35 +80001900: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x00000001 +80001904: 0007a403 lw x8,0(x15) +80001908: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xaaaaaaaa +8000190c: 0007a303 lw x6,0(x15) +80001910: 00478793 addi x15,x15,4 + +80001914 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + orn x20, x8, x6 # perform operation +80001914: 40646a33 orn x20,x8,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001918: 00062203 lw x4,0(x12) +8000191c: 01420863 beq x4,x20,8000192c +80001920: 3e1032ef jal x5,80005500 +80001924: 80001914 .word 0x80001914 +80001928: 8000af8c .word 0x8000af8c +8000192c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x00000001 +80001930: 0007a883 lw x17,0(x15) +80001934: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x55555555 +80001938: 0007a303 lw x6,0(x15) +8000193c: 00478793 addi x15,x15,4 + +80001940 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + orn x21, x17, x6 # perform operation +80001940: 4068eab3 orn x21,x17,x6 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001944: 00062203 lw x4,0(x12) +80001948: 01520863 beq x4,x21,80001958 +8000194c: 3b5032ef jal x5,80005500 +80001950: 80001940 .word 0x80001940 +80001954: 8000afe3 .word 0x8000afe3 +80001958: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x00000002 +8000195c: 0007af03 lw x30,0(x15) +80001960: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x00000000 +80001964: 0007ab03 lw x22,0(x15) +80001968: 00478793 addi x15,x15,4 + +8000196c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + orn x10, x30, x22 # perform operation +8000196c: 416f6533 orn x10,x30,x22 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001970: 00062203 lw x4,0(x12) +80001974: 00a20863 beq x4,x10,80001984 +80001978: 389032ef jal x5,80005500 +8000197c: 8000196c .word 0x8000196c +80001980: 8000b03a .word 0x8000b03a +80001984: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x00000002 +80001988: 0007a503 lw x10,0(x15) +8000198c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000001 +80001990: 0007aa83 lw x21,0(x15) +80001994: 00478793 addi x15,x15,4 + +80001998 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + orn x11, x10, x21 # perform operation +80001998: 415565b3 orn x11,x10,x21 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +8000199c: 00062203 lw x4,0(x12) +800019a0: 00b20863 beq x4,x11,800019b0 +800019a4: 35d032ef jal x5,80005500 +800019a8: 80001998 .word 0x80001998 +800019ac: 8000b08a .word 0x8000b08a +800019b0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x00000002 +800019b4: 0007a503 lw x10,0(x15) +800019b8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000002 +800019bc: 0007aa83 lw x21,0(x15) +800019c0: 00478793 addi x15,x15,4 + +800019c4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + orn x25, x10, x21 # perform operation +800019c4: 41556cb3 orn x25,x10,x21 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019c8: 00062203 lw x4,0(x12) +800019cc: 01920863 beq x4,x25,800019dc +800019d0: 331032ef jal x5,80005500 +800019d4: 800019c4 .word 0x800019c4 +800019d8: 8000b0da .word 0x8000b0da +800019dc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x00000002 +800019e0: 0007af83 lw x31,0(x15) +800019e4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x80000000 +800019e8: 0007ad03 lw x26,0(x15) +800019ec: 00478793 addi x15,x15,4 + +800019f0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + orn x2, x31, x26 # perform operation +800019f0: 41afe133 orn x2,x31,x26 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019f4: 00062203 lw x4,0(x12) +800019f8: 00220863 beq x4,x2,80001a08 +800019fc: 305032ef jal x5,80005500 +80001a00: 800019f0 .word 0x800019f0 +80001a04: 8000b12a .word 0x8000b12a +80001a08: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000002 +80001a0c: 0007ab03 lw x22,0(x15) +80001a10: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x80000001 +80001a14: 0007a403 lw x8,0(x15) +80001a18: 00478793 addi x15,x15,4 + +80001a1c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + orn x30, x22, x8 # perform operation +80001a1c: 408b6f33 orn x30,x22,x8 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a20: 00062203 lw x4,0(x12) +80001a24: 01e20863 beq x4,x30,80001a34 +80001a28: 2d9032ef jal x5,80005500 +80001a2c: 80001a1c .word 0x80001a1c +80001a30: 8000b181 .word 0x8000b181 +80001a34: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x00000002 +80001a38: 0007a983 lw x19,0(x15) +80001a3c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x7fffffff +80001a40: 0007ae83 lw x29,0(x15) +80001a44: 00478793 addi x15,x15,4 + +80001a48 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + orn x22, x19, x29 # perform operation +80001a48: 41d9eb33 orn x22,x19,x29 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a4c: 00062203 lw x4,0(x12) +80001a50: 01620863 beq x4,x22,80001a60 +80001a54: 2ad032ef jal x5,80005500 +80001a58: 80001a48 .word 0x80001a48 +80001a5c: 8000b1d8 .word 0x8000b1d8 +80001a60: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x00000002 +80001a64: 0007a103 lw x2,0(x15) +80001a68: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x7ffffffe +80001a6c: 0007ac03 lw x24,0(x15) +80001a70: 00478793 addi x15,x15,4 + +80001a74 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + orn x25, x2, x24 # perform operation +80001a74: 41816cb3 orn x25,x2,x24 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a78: 00062203 lw x4,0(x12) +80001a7c: 01920863 beq x4,x25,80001a8c +80001a80: 281032ef jal x5,80005500 +80001a84: 80001a74 .word 0x80001a74 +80001a88: 8000b22f .word 0x8000b22f +80001a8c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x00000002 +80001a90: 0007ac03 lw x24,0(x15) +80001a94: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xffffffff +80001a98: 0007a703 lw x14,0(x15) +80001a9c: 00478793 addi x15,x15,4 + +80001aa0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + orn x10, x24, x14 # perform operation +80001aa0: 40ec6533 orn x10,x24,x14 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aa4: 00062203 lw x4,0(x12) +80001aa8: 00a20863 beq x4,x10,80001ab8 +80001aac: 255032ef jal x5,80005500 +80001ab0: 80001aa0 .word 0x80001aa0 +80001ab4: 8000b286 .word 0x8000b286 +80001ab8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x00000002 +80001abc: 0007af03 lw x30,0(x15) +80001ac0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xfffffffe +80001ac4: 0007a483 lw x9,0(x15) +80001ac8: 00478793 addi x15,x15,4 + +80001acc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + orn x6, x30, x9 # perform operation +80001acc: 409f6333 orn x6,x30,x9 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ad0: 00062203 lw x4,0(x12) +80001ad4: 00620863 beq x4,x6,80001ae4 +80001ad8: 229032ef jal x5,80005500 +80001adc: 80001acc .word 0x80001acc +80001ae0: 8000b2dd .word 0x8000b2dd +80001ae4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x00000002 +80001ae8: 0007a803 lw x16,0(x15) +80001aec: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x5bbc8872 +80001af0: 0007a103 lw x2,0(x15) +80001af4: 00478793 addi x15,x15,4 + +80001af8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + orn x7, x16, x2 # perform operation +80001af8: 402863b3 orn x7,x16,x2 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001afc: 00062203 lw x4,0(x12) +80001b00: 00720863 beq x4,x7,80001b10 +80001b04: 1fd032ef jal x5,80005500 +80001b08: 80001af8 .word 0x80001af8 +80001b0c: 8000b334 .word 0x8000b334 +80001b10: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x00000002 +80001b14: 0007a383 lw x7,0(x15) +80001b18: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xaaaaaaaa +80001b1c: 0007ab03 lw x22,0(x15) +80001b20: 00478793 addi x15,x15,4 + +80001b24 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + orn x27, x7, x22 # perform operation +80001b24: 4163edb3 orn x27,x7,x22 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b28: 00062203 lw x4,0(x12) +80001b2c: 01b20863 beq x4,x27,80001b3c +80001b30: 1d1032ef jal x5,80005500 +80001b34: 80001b24 .word 0x80001b24 +80001b38: 8000b38b .word 0x8000b38b +80001b3c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x00000002 +80001b40: 0007aa03 lw x20,0(x15) +80001b44: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x55555555 +80001b48: 0007ad83 lw x27,0(x15) +80001b4c: 00478793 addi x15,x15,4 + +80001b50 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + orn x1, x20, x27 # perform operation +80001b50: 41ba60b3 orn x1,x20,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b54: 00062203 lw x4,0(x12) +80001b58: 00120863 beq x4,x1,80001b68 +80001b5c: 1a5032ef jal x5,80005500 +80001b60: 80001b50 .word 0x80001b50 +80001b64: 8000b3e2 .word 0x8000b3e2 +80001b68: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x80000000 +80001b6c: 0007aa83 lw x21,0(x15) +80001b70: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x00000000 +80001b74: 0007a503 lw x10,0(x15) +80001b78: 00478793 addi x15,x15,4 + +80001b7c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + orn x18, x21, x10 # perform operation +80001b7c: 40aae933 orn x18,x21,x10 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b80: 00062203 lw x4,0(x12) +80001b84: 01220863 beq x4,x18,80001b94 +80001b88: 179032ef jal x5,80005500 +80001b8c: 80001b7c .word 0x80001b7c +80001b90: 8000b439 .word 0x8000b439 +80001b94: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x80000000 +80001b98: 0007a683 lw x13,0(x15) +80001b9c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x00000001 +80001ba0: 0007a483 lw x9,0(x15) +80001ba4: 00478793 addi x15,x15,4 + +80001ba8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + orn x30, x13, x9 # perform operation +80001ba8: 4096ef33 orn x30,x13,x9 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bac: 00062203 lw x4,0(x12) +80001bb0: 01e20863 beq x4,x30,80001bc0 +80001bb4: 14d032ef jal x5,80005500 +80001bb8: 80001ba8 .word 0x80001ba8 +80001bbc: 8000b490 .word 0x8000b490 +80001bc0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x80000000 +80001bc4: 0007a883 lw x17,0(x15) +80001bc8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x00000002 +80001bcc: 0007a703 lw x14,0(x15) +80001bd0: 00478793 addi x15,x15,4 + +80001bd4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + orn x20, x17, x14 # perform operation +80001bd4: 40e8ea33 orn x20,x17,x14 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bd8: 00062203 lw x4,0(x12) +80001bdc: 01420863 beq x4,x20,80001bec +80001be0: 121032ef jal x5,80005500 +80001be4: 80001bd4 .word 0x80001bd4 +80001be8: 8000b4e7 .word 0x8000b4e7 +80001bec: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x80000000 +80001bf0: 0007a883 lw x17,0(x15) +80001bf4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x80000000 +80001bf8: 0007a183 lw x3,0(x15) +80001bfc: 00478793 addi x15,x15,4 + +80001c00 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + orn x7, x17, x3 # perform operation +80001c00: 4038e3b3 orn x7,x17,x3 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c04: 00062203 lw x4,0(x12) +80001c08: 00720863 beq x4,x7,80001c18 +80001c0c: 0f5032ef jal x5,80005500 +80001c10: 80001c00 .word 0x80001c00 +80001c14: 8000b53e .word 0x8000b53e +80001c18: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x80000000 +80001c1c: 0007ae83 lw x29,0(x15) +80001c20: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x80000001 +80001c24: 0007a083 lw x1,0(x15) +80001c28: 00478793 addi x15,x15,4 + +80001c2c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + orn x13, x29, x1 # perform operation +80001c2c: 401ee6b3 orn x13,x29,x1 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c30: 00062203 lw x4,0(x12) +80001c34: 00d20863 beq x4,x13,80001c44 +80001c38: 0c9032ef jal x5,80005500 +80001c3c: 80001c2c .word 0x80001c2c +80001c40: 8000b59c .word 0x8000b59c +80001c44: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x80000000 +80001c48: 0007ad83 lw x27,0(x15) +80001c4c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x7fffffff +80001c50: 0007a803 lw x16,0(x15) +80001c54: 00478793 addi x15,x15,4 + +80001c58 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + orn x3, x27, x16 # perform operation +80001c58: 410de1b3 orn x3,x27,x16 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c5c: 00062203 lw x4,0(x12) +80001c60: 00320863 beq x4,x3,80001c70 +80001c64: 09d032ef jal x5,80005500 +80001c68: 80001c58 .word 0x80001c58 +80001c6c: 8000b5fa .word 0x8000b5fa +80001c70: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x80000000 +80001c74: 0007a903 lw x18,0(x15) +80001c78: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x7ffffffe +80001c7c: 0007ac83 lw x25,0(x15) +80001c80: 00478793 addi x15,x15,4 + +80001c84 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + orn x28, x18, x25 # perform operation +80001c84: 41996e33 orn x28,x18,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c88: 00062203 lw x4,0(x12) +80001c8c: 01c20863 beq x4,x28,80001c9c +80001c90: 071032ef jal x5,80005500 +80001c94: 80001c84 .word 0x80001c84 +80001c98: 8000b658 .word 0x8000b658 +80001c9c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x80000000 +80001ca0: 0007a383 lw x7,0(x15) +80001ca4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xffffffff +80001ca8: 0007a503 lw x10,0(x15) +80001cac: 00478793 addi x15,x15,4 + +80001cb0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + orn x25, x7, x10 # perform operation +80001cb0: 40a3ecb3 orn x25,x7,x10 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cb4: 00062203 lw x4,0(x12) +80001cb8: 01920863 beq x4,x25,80001cc8 +80001cbc: 045032ef jal x5,80005500 +80001cc0: 80001cb0 .word 0x80001cb0 +80001cc4: 8000b6b6 .word 0x8000b6b6 +80001cc8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x80000000 +80001ccc: 0007aa83 lw x21,0(x15) +80001cd0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xfffffffe +80001cd4: 0007a803 lw x16,0(x15) +80001cd8: 00478793 addi x15,x15,4 + +80001cdc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + orn x26, x21, x16 # perform operation +80001cdc: 410aed33 orn x26,x21,x16 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001ce0: 00062203 lw x4,0(x12) +80001ce4: 01a20863 beq x4,x26,80001cf4 +80001ce8: 019032ef jal x5,80005500 +80001cec: 80001cdc .word 0x80001cdc +80001cf0: 8000b714 .word 0x8000b714 +80001cf4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x80000000 +80001cf8: 0007a483 lw x9,0(x15) +80001cfc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x5bbc8872 +80001d00: 0007a903 lw x18,0(x15) +80001d04: 00478793 addi x15,x15,4 + +80001d08 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + orn x20, x9, x18 # perform operation +80001d08: 4124ea33 orn x20,x9,x18 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d0c: 00062203 lw x4,0(x12) +80001d10: 01420863 beq x4,x20,80001d20 +80001d14: 7ec032ef jal x5,80005500 +80001d18: 80001d08 .word 0x80001d08 +80001d1c: 8000b772 .word 0x8000b772 +80001d20: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x80000000 +80001d24: 0007a303 lw x6,0(x15) +80001d28: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xaaaaaaaa +80001d2c: 0007ac83 lw x25,0(x15) +80001d30: 00478793 addi x15,x15,4 + +80001d34 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + orn x2, x6, x25 # perform operation +80001d34: 41936133 orn x2,x6,x25 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d38: 00062203 lw x4,0(x12) +80001d3c: 00220863 beq x4,x2,80001d4c +80001d40: 7c0032ef jal x5,80005500 +80001d44: 80001d34 .word 0x80001d34 +80001d48: 8000b7d0 .word 0x8000b7d0 +80001d4c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x80000000 +80001d50: 0007a803 lw x16,0(x15) +80001d54: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x55555555 +80001d58: 0007a303 lw x6,0(x15) +80001d5c: 00478793 addi x15,x15,4 + +80001d60 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + orn x17, x16, x6 # perform operation +80001d60: 406868b3 orn x17,x16,x6 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d64: 00062203 lw x4,0(x12) +80001d68: 01120863 beq x4,x17,80001d78 +80001d6c: 794032ef jal x5,80005500 +80001d70: 80001d60 .word 0x80001d60 +80001d74: 8000b82e .word 0x8000b82e +80001d78: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x80000001 +80001d7c: 0007ab03 lw x22,0(x15) +80001d80: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x00000000 +80001d84: 0007a303 lw x6,0(x15) +80001d88: 00478793 addi x15,x15,4 + +80001d8c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + orn x23, x22, x6 # perform operation +80001d8c: 406b6bb3 orn x23,x22,x6 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d90: 00062203 lw x4,0(x12) +80001d94: 01720863 beq x4,x23,80001da4 +80001d98: 768032ef jal x5,80005500 +80001d9c: 80001d8c .word 0x80001d8c +80001da0: 8000b88c .word 0x8000b88c +80001da4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x80000001 +80001da8: 0007af83 lw x31,0(x15) +80001dac: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x00000001 +80001db0: 0007a103 lw x2,0(x15) +80001db4: 00478793 addi x15,x15,4 + +80001db8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + orn x18, x31, x2 # perform operation +80001db8: 402fe933 orn x18,x31,x2 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dbc: 00062203 lw x4,0(x12) +80001dc0: 01220863 beq x4,x18,80001dd0 +80001dc4: 73c032ef jal x5,80005500 +80001dc8: 80001db8 .word 0x80001db8 +80001dcc: 8000b8e3 .word 0x8000b8e3 +80001dd0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x80000001 +80001dd4: 0007ac03 lw x24,0(x15) +80001dd8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x00000002 +80001ddc: 0007a383 lw x7,0(x15) +80001de0: 00478793 addi x15,x15,4 + +80001de4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + orn x20, x24, x7 # perform operation +80001de4: 407c6a33 orn x20,x24,x7 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001de8: 00062203 lw x4,0(x12) +80001dec: 01420863 beq x4,x20,80001dfc +80001df0: 710032ef jal x5,80005500 +80001df4: 80001de4 .word 0x80001de4 +80001df8: 8000b93a .word 0x8000b93a +80001dfc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x80000001 +80001e00: 0007ac83 lw x25,0(x15) +80001e04: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x80000000 +80001e08: 0007a903 lw x18,0(x15) +80001e0c: 00478793 addi x15,x15,4 + +80001e10 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + orn x14, x25, x18 # perform operation +80001e10: 412ce733 orn x14,x25,x18 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e14: 00062203 lw x4,0(x12) +80001e18: 00e20863 beq x4,x14,80001e28 +80001e1c: 6e4032ef jal x5,80005500 +80001e20: 80001e10 .word 0x80001e10 +80001e24: 8000b991 .word 0x8000b991 +80001e28: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x80000001 +80001e2c: 0007af83 lw x31,0(x15) +80001e30: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x80000001 +80001e34: 0007a903 lw x18,0(x15) +80001e38: 00478793 addi x15,x15,4 + +80001e3c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + orn x7, x31, x18 # perform operation +80001e3c: 412fe3b3 orn x7,x31,x18 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e40: 00062203 lw x4,0(x12) +80001e44: 00720863 beq x4,x7,80001e54 +80001e48: 6b8032ef jal x5,80005500 +80001e4c: 80001e3c .word 0x80001e3c +80001e50: 8000b9ef .word 0x8000b9ef +80001e54: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x80000001 +80001e58: 0007a103 lw x2,0(x15) +80001e5c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7fffffff +80001e60: 0007a903 lw x18,0(x15) +80001e64: 00478793 addi x15,x15,4 + +80001e68 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + orn x27, x2, x18 # perform operation +80001e68: 41216db3 orn x27,x2,x18 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e6c: 00062203 lw x4,0(x12) +80001e70: 01b20863 beq x4,x27,80001e80 +80001e74: 68c032ef jal x5,80005500 +80001e78: 80001e68 .word 0x80001e68 +80001e7c: 8000ba4d .word 0x8000ba4d +80001e80: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x80000001 +80001e84: 0007ab03 lw x22,0(x15) +80001e88: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7ffffffe +80001e8c: 0007a703 lw x14,0(x15) +80001e90: 00478793 addi x15,x15,4 + +80001e94 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + orn x13, x22, x14 # perform operation +80001e94: 40eb66b3 orn x13,x22,x14 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e98: 00062203 lw x4,0(x12) +80001e9c: 00d20863 beq x4,x13,80001eac +80001ea0: 660032ef jal x5,80005500 +80001ea4: 80001e94 .word 0x80001e94 +80001ea8: 8000baab .word 0x8000baab +80001eac: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x80000001 +80001eb0: 0007ae03 lw x28,0(x15) +80001eb4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xffffffff +80001eb8: 0007a403 lw x8,0(x15) +80001ebc: 00478793 addi x15,x15,4 + +80001ec0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + orn x25, x28, x8 # perform operation +80001ec0: 408e6cb3 orn x25,x28,x8 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ec4: 00062203 lw x4,0(x12) +80001ec8: 01920863 beq x4,x25,80001ed8 +80001ecc: 634032ef jal x5,80005500 +80001ed0: 80001ec0 .word 0x80001ec0 +80001ed4: 8000bb09 .word 0x8000bb09 +80001ed8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x80000001 +80001edc: 0007ad83 lw x27,0(x15) +80001ee0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xfffffffe +80001ee4: 0007a103 lw x2,0(x15) +80001ee8: 00478793 addi x15,x15,4 + +80001eec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + orn x10, x27, x2 # perform operation +80001eec: 402de533 orn x10,x27,x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ef0: 00062203 lw x4,0(x12) +80001ef4: 00a20863 beq x4,x10,80001f04 +80001ef8: 608032ef jal x5,80005500 +80001efc: 80001eec .word 0x80001eec +80001f00: 8000bb67 .word 0x8000bb67 +80001f04: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x80000001 +80001f08: 0007ad83 lw x27,0(x15) +80001f0c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x5bbc8872 +80001f10: 0007a703 lw x14,0(x15) +80001f14: 00478793 addi x15,x15,4 + +80001f18 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + orn x2, x27, x14 # perform operation +80001f18: 40ede133 orn x2,x27,x14 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f1c: 00062203 lw x4,0(x12) +80001f20: 00220863 beq x4,x2,80001f30 +80001f24: 5dc032ef jal x5,80005500 +80001f28: 80001f18 .word 0x80001f18 +80001f2c: 8000bbc5 .word 0x8000bbc5 +80001f30: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x80000001 +80001f34: 0007ac83 lw x25,0(x15) +80001f38: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xaaaaaaaa +80001f3c: 0007a703 lw x14,0(x15) +80001f40: 00478793 addi x15,x15,4 + +80001f44 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + orn x26, x25, x14 # perform operation +80001f44: 40eced33 orn x26,x25,x14 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f48: 00062203 lw x4,0(x12) +80001f4c: 01a20863 beq x4,x26,80001f5c +80001f50: 5b0032ef jal x5,80005500 +80001f54: 80001f44 .word 0x80001f44 +80001f58: 8000bc23 .word 0x8000bc23 +80001f5c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x80000001 +80001f60: 0007a503 lw x10,0(x15) +80001f64: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x55555555 +80001f68: 0007ad03 lw x26,0(x15) +80001f6c: 00478793 addi x15,x15,4 + +80001f70 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + orn x28, x10, x26 # perform operation +80001f70: 41a56e33 orn x28,x10,x26 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f74: 00062203 lw x4,0(x12) +80001f78: 01c20863 beq x4,x28,80001f88 +80001f7c: 584032ef jal x5,80005500 +80001f80: 80001f70 .word 0x80001f70 +80001f84: 8000bc81 .word 0x8000bc81 +80001f88: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x7fffffff +80001f8c: 0007ab83 lw x23,0(x15) +80001f90: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x00000000 +80001f94: 0007a803 lw x16,0(x15) +80001f98: 00478793 addi x15,x15,4 + +80001f9c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + orn x13, x23, x16 # perform operation +80001f9c: 410be6b3 orn x13,x23,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fa0: 00062203 lw x4,0(x12) +80001fa4: 00d20863 beq x4,x13,80001fb4 +80001fa8: 558032ef jal x5,80005500 +80001fac: 80001f9c .word 0x80001f9c +80001fb0: 8000bcdf .word 0x8000bcdf +80001fb4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x7fffffff +80001fb8: 0007ab03 lw x22,0(x15) +80001fbc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x00000001 +80001fc0: 0007ac83 lw x25,0(x15) +80001fc4: 00478793 addi x15,x15,4 + +80001fc8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + orn x23, x22, x25 # perform operation +80001fc8: 419b6bb3 orn x23,x22,x25 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fcc: 00062203 lw x4,0(x12) +80001fd0: 01720863 beq x4,x23,80001fe0 +80001fd4: 52c032ef jal x5,80005500 +80001fd8: 80001fc8 .word 0x80001fc8 +80001fdc: 8000bd36 .word 0x8000bd36 +80001fe0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x7fffffff +80001fe4: 0007a703 lw x14,0(x15) +80001fe8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000002 +80001fec: 0007aa83 lw x21,0(x15) +80001ff0: 00478793 addi x15,x15,4 + +80001ff4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + orn x13, x14, x21 # perform operation +80001ff4: 415766b3 orn x13,x14,x21 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ff8: 00062203 lw x4,0(x12) +80001ffc: 00d20863 beq x4,x13,8000200c +80002000: 500032ef jal x5,80005500 +80002004: 80001ff4 .word 0x80001ff4 +80002008: 8000bd8d .word 0x8000bd8d +8000200c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7fffffff +80002010: 0007a183 lw x3,0(x15) +80002014: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x80000000 +80002018: 0007ac03 lw x24,0(x15) +8000201c: 00478793 addi x15,x15,4 + +80002020 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + orn x28, x3, x24 # perform operation +80002020: 4181ee33 orn x28,x3,x24 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002024: 00062203 lw x4,0(x12) +80002028: 01c20863 beq x4,x28,80002038 +8000202c: 4d4032ef jal x5,80005500 +80002030: 80002020 .word 0x80002020 +80002034: 8000bde4 .word 0x8000bde4 +80002038: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7fffffff +8000203c: 0007aa83 lw x21,0(x15) +80002040: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x80000001 +80002044: 0007a483 lw x9,0(x15) +80002048: 00478793 addi x15,x15,4 + +8000204c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + orn x30, x21, x9 # perform operation +8000204c: 409aef33 orn x30,x21,x9 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002050: 00062203 lw x4,0(x12) +80002054: 01e20863 beq x4,x30,80002064 +80002058: 4a8032ef jal x5,80005500 +8000205c: 8000204c .word 0x8000204c +80002060: 8000be42 .word 0x8000be42 +80002064: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x7fffffff +80002068: 0007aa03 lw x20,0(x15) +8000206c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x7fffffff +80002070: 0007a803 lw x16,0(x15) +80002074: 00478793 addi x15,x15,4 + +80002078 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + orn x6, x20, x16 # perform operation +80002078: 410a6333 orn x6,x20,x16 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000207c: 00062203 lw x4,0(x12) +80002080: 00620863 beq x4,x6,80002090 +80002084: 47c032ef jal x5,80005500 +80002088: 80002078 .word 0x80002078 +8000208c: 8000bea0 .word 0x8000bea0 +80002090: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7fffffff +80002094: 0007ae03 lw x28,0(x15) +80002098: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x7ffffffe +8000209c: 0007ab03 lw x22,0(x15) +800020a0: 00478793 addi x15,x15,4 + +800020a4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + orn x2, x28, x22 # perform operation +800020a4: 416e6133 orn x2,x28,x22 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020a8: 00062203 lw x4,0(x12) +800020ac: 00220863 beq x4,x2,800020bc +800020b0: 450032ef jal x5,80005500 +800020b4: 800020a4 .word 0x800020a4 +800020b8: 8000befe .word 0x8000befe +800020bc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x7fffffff +800020c0: 0007a483 lw x9,0(x15) +800020c4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xffffffff +800020c8: 0007a983 lw x19,0(x15) +800020cc: 00478793 addi x15,x15,4 + +800020d0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + orn x23, x9, x19 # perform operation +800020d0: 4134ebb3 orn x23,x9,x19 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020d4: 00062203 lw x4,0(x12) +800020d8: 01720863 beq x4,x23,800020e8 +800020dc: 424032ef jal x5,80005500 +800020e0: 800020d0 .word 0x800020d0 +800020e4: 8000bf5c .word 0x8000bf5c +800020e8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x7fffffff +800020ec: 0007a583 lw x11,0(x15) +800020f0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xfffffffe +800020f4: 0007ab83 lw x23,0(x15) +800020f8: 00478793 addi x15,x15,4 + +800020fc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + orn x21, x11, x23 # perform operation +800020fc: 4175eab3 orn x21,x11,x23 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002100: 00062203 lw x4,0(x12) +80002104: 01520863 beq x4,x21,80002114 +80002108: 3f8032ef jal x5,80005500 +8000210c: 800020fc .word 0x800020fc +80002110: 8000bfba .word 0x8000bfba +80002114: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7fffffff +80002118: 0007ac83 lw x25,0(x15) +8000211c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x5bbc8872 +80002120: 0007a303 lw x6,0(x15) +80002124: 00478793 addi x15,x15,4 + +80002128 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + orn x20, x25, x6 # perform operation +80002128: 406cea33 orn x20,x25,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000212c: 00062203 lw x4,0(x12) +80002130: 01420863 beq x4,x20,80002140 +80002134: 3cc032ef jal x5,80005500 +80002138: 80002128 .word 0x80002128 +8000213c: 8000c018 .word 0x8000c018 +80002140: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7fffffff +80002144: 0007a883 lw x17,0(x15) +80002148: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xaaaaaaaa +8000214c: 0007ad83 lw x27,0(x15) +80002150: 00478793 addi x15,x15,4 + +80002154 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + orn x13, x17, x27 # perform operation +80002154: 41b8e6b3 orn x13,x17,x27 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002158: 00062203 lw x4,0(x12) +8000215c: 00d20863 beq x4,x13,8000216c +80002160: 3a0032ef jal x5,80005500 +80002164: 80002154 .word 0x80002154 +80002168: 8000c076 .word 0x8000c076 +8000216c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7fffffff +80002170: 0007a083 lw x1,0(x15) +80002174: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x55555555 +80002178: 0007ae03 lw x28,0(x15) +8000217c: 00478793 addi x15,x15,4 + +80002180 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + orn x17, x1, x28 # perform operation +80002180: 41c0e8b3 orn x17,x1,x28 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002184: 00062203 lw x4,0(x12) +80002188: 01120863 beq x4,x17,80002198 +8000218c: 374032ef jal x5,80005500 +80002190: 80002180 .word 0x80002180 +80002194: 8000c0d4 .word 0x8000c0d4 +80002198: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x7ffffffe +8000219c: 0007a803 lw x16,0(x15) +800021a0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x00000000 +800021a4: 0007a403 lw x8,0(x15) +800021a8: 00478793 addi x15,x15,4 + +800021ac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + orn x18, x16, x8 # perform operation +800021ac: 40886933 orn x18,x16,x8 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021b0: 00062203 lw x4,0(x12) +800021b4: 01220863 beq x4,x18,800021c4 +800021b8: 348032ef jal x5,80005500 +800021bc: 800021ac .word 0x800021ac +800021c0: 8000c132 .word 0x8000c132 +800021c4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x7ffffffe +800021c8: 0007a583 lw x11,0(x15) +800021cc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x00000001 +800021d0: 0007a183 lw x3,0(x15) +800021d4: 00478793 addi x15,x15,4 + +800021d8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + orn x30, x11, x3 # perform operation +800021d8: 4035ef33 orn x30,x11,x3 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021dc: 00062203 lw x4,0(x12) +800021e0: 01e20863 beq x4,x30,800021f0 +800021e4: 31c032ef jal x5,80005500 +800021e8: 800021d8 .word 0x800021d8 +800021ec: 8000c189 .word 0x8000c189 +800021f0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7ffffffe +800021f4: 0007a183 lw x3,0(x15) +800021f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x00000002 +800021fc: 0007a083 lw x1,0(x15) +80002200: 00478793 addi x15,x15,4 + +80002204 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + orn x2, x3, x1 # perform operation +80002204: 4011e133 orn x2,x3,x1 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002208: 00062203 lw x4,0(x12) +8000220c: 00220863 beq x4,x2,8000221c +80002210: 2f0032ef jal x5,80005500 +80002214: 80002204 .word 0x80002204 +80002218: 8000c1e0 .word 0x8000c1e0 +8000221c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7ffffffe +80002220: 0007ac83 lw x25,0(x15) +80002224: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x80000000 +80002228: 0007a903 lw x18,0(x15) +8000222c: 00478793 addi x15,x15,4 + +80002230 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + orn x9, x25, x18 # perform operation +80002230: 412ce4b3 orn x9,x25,x18 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002234: 00062203 lw x4,0(x12) +80002238: 00920863 beq x4,x9,80002248 +8000223c: 2c4032ef jal x5,80005500 +80002240: 80002230 .word 0x80002230 +80002244: 8000c237 .word 0x8000c237 +80002248: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x7ffffffe +8000224c: 0007a903 lw x18,0(x15) +80002250: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x80000001 +80002254: 0007a983 lw x19,0(x15) +80002258: 00478793 addi x15,x15,4 + +8000225c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + orn x11, x18, x19 # perform operation +8000225c: 413965b3 orn x11,x18,x19 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002260: 00062203 lw x4,0(x12) +80002264: 00b20863 beq x4,x11,80002274 +80002268: 298032ef jal x5,80005500 +8000226c: 8000225c .word 0x8000225c +80002270: 8000c295 .word 0x8000c295 +80002274: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x7ffffffe +80002278: 0007ad03 lw x26,0(x15) +8000227c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7fffffff +80002280: 0007af83 lw x31,0(x15) +80002284: 00478793 addi x15,x15,4 + +80002288 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + orn x7, x26, x31 # perform operation +80002288: 41fd63b3 orn x7,x26,x31 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +8000228c: 00062203 lw x4,0(x12) +80002290: 00720863 beq x4,x7,800022a0 +80002294: 26c032ef jal x5,80005500 +80002298: 80002288 .word 0x80002288 +8000229c: 8000c2f3 .word 0x8000c2f3 +800022a0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x7ffffffe +800022a4: 0007a403 lw x8,0(x15) +800022a8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x7ffffffe +800022ac: 0007ad83 lw x27,0(x15) +800022b0: 00478793 addi x15,x15,4 + +800022b4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + orn x10, x8, x27 # perform operation +800022b4: 41b46533 orn x10,x8,x27 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022b8: 00062203 lw x4,0(x12) +800022bc: 00a20863 beq x4,x10,800022cc +800022c0: 240032ef jal x5,80005500 +800022c4: 800022b4 .word 0x800022b4 +800022c8: 8000c351 .word 0x8000c351 +800022cc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x7ffffffe +800022d0: 0007ac03 lw x24,0(x15) +800022d4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xffffffff +800022d8: 0007a103 lw x2,0(x15) +800022dc: 00478793 addi x15,x15,4 + +800022e0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + orn x29, x24, x2 # perform operation +800022e0: 402c6eb3 orn x29,x24,x2 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022e4: 00062203 lw x4,0(x12) +800022e8: 01d20863 beq x4,x29,800022f8 +800022ec: 214032ef jal x5,80005500 +800022f0: 800022e0 .word 0x800022e0 +800022f4: 8000c3af .word 0x8000c3af +800022f8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7ffffffe +800022fc: 0007a083 lw x1,0(x15) +80002300: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xfffffffe +80002304: 0007a903 lw x18,0(x15) +80002308: 00478793 addi x15,x15,4 + +8000230c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + orn x16, x1, x18 # perform operation +8000230c: 4120e833 orn x16,x1,x18 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002310: 00062203 lw x4,0(x12) +80002314: 01020863 beq x4,x16,80002324 +80002318: 1e8032ef jal x5,80005500 +8000231c: 8000230c .word 0x8000230c +80002320: 8000c40d .word 0x8000c40d +80002324: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7ffffffe +80002328: 0007ae03 lw x28,0(x15) +8000232c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x5bbc8872 +80002330: 0007a583 lw x11,0(x15) +80002334: 00478793 addi x15,x15,4 + +80002338 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + orn x22, x28, x11 # perform operation +80002338: 40be6b33 orn x22,x28,x11 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000233c: 00062203 lw x4,0(x12) +80002340: 01620863 beq x4,x22,80002350 +80002344: 1bc032ef jal x5,80005500 +80002348: 80002338 .word 0x80002338 +8000234c: 8000c46b .word 0x8000c46b +80002350: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x7ffffffe +80002354: 0007a483 lw x9,0(x15) +80002358: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xaaaaaaaa +8000235c: 0007a583 lw x11,0(x15) +80002360: 00478793 addi x15,x15,4 + +80002364 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + orn x18, x9, x11 # perform operation +80002364: 40b4e933 orn x18,x9,x11 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002368: 00062203 lw x4,0(x12) +8000236c: 01220863 beq x4,x18,8000237c +80002370: 190032ef jal x5,80005500 +80002374: 80002364 .word 0x80002364 +80002378: 8000c4c9 .word 0x8000c4c9 +8000237c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x7ffffffe +80002380: 0007a803 lw x16,0(x15) +80002384: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x55555555 +80002388: 0007a903 lw x18,0(x15) +8000238c: 00478793 addi x15,x15,4 + +80002390 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + orn x10, x16, x18 # perform operation +80002390: 41286533 orn x10,x16,x18 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +80002394: 00062203 lw x4,0(x12) +80002398: 00a20863 beq x4,x10,800023a8 +8000239c: 164032ef jal x5,80005500 +800023a0: 80002390 .word 0x80002390 +800023a4: 8000c527 .word 0x8000c527 +800023a8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xffffffff +800023ac: 0007a103 lw x2,0(x15) +800023b0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x00000000 +800023b4: 0007a503 lw x10,0(x15) +800023b8: 00478793 addi x15,x15,4 + +800023bc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + orn x26, x2, x10 # perform operation +800023bc: 40a16d33 orn x26,x2,x10 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023c0: 00062203 lw x4,0(x12) +800023c4: 01a20863 beq x4,x26,800023d4 +800023c8: 138032ef jal x5,80005500 +800023cc: 800023bc .word 0x800023bc +800023d0: 8000c585 .word 0x8000c585 +800023d4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xffffffff +800023d8: 0007a303 lw x6,0(x15) +800023dc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x00000001 +800023e0: 0007a683 lw x13,0(x15) +800023e4: 00478793 addi x15,x15,4 + +800023e8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + orn x8, x6, x13 # perform operation +800023e8: 40d36433 orn x8,x6,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023ec: 00062203 lw x4,0(x12) +800023f0: 00820863 beq x4,x8,80002400 +800023f4: 10c032ef jal x5,80005500 +800023f8: 800023e8 .word 0x800023e8 +800023fc: 8000c5dc .word 0x8000c5dc +80002400: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xffffffff +80002404: 0007aa83 lw x21,0(x15) +80002408: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x00000002 +8000240c: 0007aa03 lw x20,0(x15) +80002410: 00478793 addi x15,x15,4 + +80002414 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + orn x27, x21, x20 # perform operation +80002414: 414aedb3 orn x27,x21,x20 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002418: 00062203 lw x4,0(x12) +8000241c: 01b20863 beq x4,x27,8000242c +80002420: 0e0032ef jal x5,80005500 +80002424: 80002414 .word 0x80002414 +80002428: 8000c633 .word 0x8000c633 +8000242c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xffffffff +80002430: 0007ae03 lw x28,0(x15) +80002434: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x80000000 +80002438: 0007a183 lw x3,0(x15) +8000243c: 00478793 addi x15,x15,4 + +80002440 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + orn x31, x28, x3 # perform operation +80002440: 403e6fb3 orn x31,x28,x3 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002444: 00062203 lw x4,0(x12) +80002448: 01f20863 beq x4,x31,80002458 +8000244c: 0b4032ef jal x5,80005500 +80002450: 80002440 .word 0x80002440 +80002454: 8000c68a .word 0x8000c68a +80002458: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xffffffff +8000245c: 0007aa83 lw x21,0(x15) +80002460: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x80000001 +80002464: 0007ae83 lw x29,0(x15) +80002468: 00478793 addi x15,x15,4 + +8000246c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + orn x6, x21, x29 # perform operation +8000246c: 41dae333 orn x6,x21,x29 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002470: 00062203 lw x4,0(x12) +80002474: 00620863 beq x4,x6,80002484 +80002478: 088032ef jal x5,80005500 +8000247c: 8000246c .word 0x8000246c +80002480: 8000c6e8 .word 0x8000c6e8 +80002484: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xffffffff +80002488: 0007ae03 lw x28,0(x15) +8000248c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x7fffffff +80002490: 0007ac83 lw x25,0(x15) +80002494: 00478793 addi x15,x15,4 + +80002498 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + orn x26, x28, x25 # perform operation +80002498: 419e6d33 orn x26,x28,x25 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +8000249c: 00062203 lw x4,0(x12) +800024a0: 01a20863 beq x4,x26,800024b0 +800024a4: 05c032ef jal x5,80005500 +800024a8: 80002498 .word 0x80002498 +800024ac: 8000c746 .word 0x8000c746 +800024b0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xffffffff +800024b4: 0007a883 lw x17,0(x15) +800024b8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x7ffffffe +800024bc: 0007a583 lw x11,0(x15) +800024c0: 00478793 addi x15,x15,4 + +800024c4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + orn x7, x17, x11 # perform operation +800024c4: 40b8e3b3 orn x7,x17,x11 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024c8: 00062203 lw x4,0(x12) +800024cc: 00720863 beq x4,x7,800024dc +800024d0: 030032ef jal x5,80005500 +800024d4: 800024c4 .word 0x800024c4 +800024d8: 8000c7a4 .word 0x8000c7a4 +800024dc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xffffffff +800024e0: 0007ae03 lw x28,0(x15) +800024e4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xffffffff +800024e8: 0007a503 lw x10,0(x15) +800024ec: 00478793 addi x15,x15,4 + +800024f0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + orn x14, x28, x10 # perform operation +800024f0: 40ae6733 orn x14,x28,x10 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024f4: 00062203 lw x4,0(x12) +800024f8: 00e20863 beq x4,x14,80002508 +800024fc: 004032ef jal x5,80005500 +80002500: 800024f0 .word 0x800024f0 +80002504: 8000c802 .word 0x8000c802 +80002508: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xffffffff +8000250c: 0007a883 lw x17,0(x15) +80002510: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xfffffffe +80002514: 0007a183 lw x3,0(x15) +80002518: 00478793 addi x15,x15,4 + +8000251c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + orn x10, x17, x3 # perform operation +8000251c: 4038e533 orn x10,x17,x3 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002520: 00062203 lw x4,0(x12) +80002524: 00a20863 beq x4,x10,80002534 +80002528: 7d9022ef jal x5,80005500 +8000252c: 8000251c .word 0x8000251c +80002530: 8000c860 .word 0x8000c860 +80002534: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xffffffff +80002538: 0007a403 lw x8,0(x15) +8000253c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x5bbc8872 +80002540: 0007a383 lw x7,0(x15) +80002544: 00478793 addi x15,x15,4 + +80002548 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + orn x30, x8, x7 # perform operation +80002548: 40746f33 orn x30,x8,x7 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000254c: 00062203 lw x4,0(x12) +80002550: 01e20863 beq x4,x30,80002560 +80002554: 7ad022ef jal x5,80005500 +80002558: 80002548 .word 0x80002548 +8000255c: 8000c8be .word 0x8000c8be +80002560: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xffffffff +80002564: 0007ad03 lw x26,0(x15) +80002568: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xaaaaaaaa +8000256c: 0007a083 lw x1,0(x15) +80002570: 00478793 addi x15,x15,4 + +80002574 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + orn x13, x26, x1 # perform operation +80002574: 401d66b3 orn x13,x26,x1 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002578: 00062203 lw x4,0(x12) +8000257c: 00d20863 beq x4,x13,8000258c +80002580: 781022ef jal x5,80005500 +80002584: 80002574 .word 0x80002574 +80002588: 8000c91c .word 0x8000c91c +8000258c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xffffffff +80002590: 0007a583 lw x11,0(x15) +80002594: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x55555555 +80002598: 0007ab83 lw x23,0(x15) +8000259c: 00478793 addi x15,x15,4 + +800025a0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + orn x25, x11, x23 # perform operation +800025a0: 4175ecb3 orn x25,x11,x23 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025a4: 00062203 lw x4,0(x12) +800025a8: 01920863 beq x4,x25,800025b8 +800025ac: 755022ef jal x5,80005500 +800025b0: 800025a0 .word 0x800025a0 +800025b4: 8000c97a .word 0x8000c97a +800025b8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xfffffffe +800025bc: 0007a403 lw x8,0(x15) +800025c0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x00000000 +800025c4: 0007a583 lw x11,0(x15) +800025c8: 00478793 addi x15,x15,4 + +800025cc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + orn x25, x8, x11 # perform operation +800025cc: 40b46cb3 orn x25,x8,x11 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025d0: 00062203 lw x4,0(x12) +800025d4: 01920863 beq x4,x25,800025e4 +800025d8: 729022ef jal x5,80005500 +800025dc: 800025cc .word 0x800025cc +800025e0: 8000c9d8 .word 0x8000c9d8 +800025e4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xfffffffe +800025e8: 0007a183 lw x3,0(x15) +800025ec: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x00000001 +800025f0: 0007ad03 lw x26,0(x15) +800025f4: 00478793 addi x15,x15,4 + +800025f8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + orn x17, x3, x26 # perform operation +800025f8: 41a1e8b3 orn x17,x3,x26 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +800025fc: 00062203 lw x4,0(x12) +80002600: 01120863 beq x4,x17,80002610 +80002604: 6fd022ef jal x5,80005500 +80002608: 800025f8 .word 0x800025f8 +8000260c: 8000ca2f .word 0x8000ca2f +80002610: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xfffffffe +80002614: 0007af83 lw x31,0(x15) +80002618: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x00000002 +8000261c: 0007ac03 lw x24,0(x15) +80002620: 00478793 addi x15,x15,4 + +80002624 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + orn x30, x31, x24 # perform operation +80002624: 418fef33 orn x30,x31,x24 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002628: 00062203 lw x4,0(x12) +8000262c: 01e20863 beq x4,x30,8000263c +80002630: 6d1022ef jal x5,80005500 +80002634: 80002624 .word 0x80002624 +80002638: 8000ca86 .word 0x8000ca86 +8000263c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xfffffffe +80002640: 0007ae83 lw x29,0(x15) +80002644: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x80000000 +80002648: 0007a303 lw x6,0(x15) +8000264c: 00478793 addi x15,x15,4 + +80002650 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + orn x9, x29, x6 # perform operation +80002650: 406ee4b3 orn x9,x29,x6 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002654: 00062203 lw x4,0(x12) +80002658: 00920863 beq x4,x9,80002668 +8000265c: 6a5022ef jal x5,80005500 +80002660: 80002650 .word 0x80002650 +80002664: 8000cadd .word 0x8000cadd +80002668: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xfffffffe +8000266c: 0007ac83 lw x25,0(x15) +80002670: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x80000001 +80002674: 0007ab83 lw x23,0(x15) +80002678: 00478793 addi x15,x15,4 + +8000267c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + orn x20, x25, x23 # perform operation +8000267c: 417cea33 orn x20,x25,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002680: 00062203 lw x4,0(x12) +80002684: 01420863 beq x4,x20,80002694 +80002688: 679022ef jal x5,80005500 +8000268c: 8000267c .word 0x8000267c +80002690: 8000cb3b .word 0x8000cb3b +80002694: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xfffffffe +80002698: 0007ad83 lw x27,0(x15) +8000269c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x7fffffff +800026a0: 0007a483 lw x9,0(x15) +800026a4: 00478793 addi x15,x15,4 + +800026a8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + orn x31, x27, x9 # perform operation +800026a8: 409defb3 orn x31,x27,x9 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026ac: 00062203 lw x4,0(x12) +800026b0: 01f20863 beq x4,x31,800026c0 +800026b4: 64d022ef jal x5,80005500 +800026b8: 800026a8 .word 0x800026a8 +800026bc: 8000cb99 .word 0x8000cb99 +800026c0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xfffffffe +800026c4: 0007a103 lw x2,0(x15) +800026c8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x7ffffffe +800026cc: 0007af03 lw x30,0(x15) +800026d0: 00478793 addi x15,x15,4 + +800026d4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + orn x21, x2, x30 # perform operation +800026d4: 41e16ab3 orn x21,x2,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026d8: 00062203 lw x4,0(x12) +800026dc: 01520863 beq x4,x21,800026ec +800026e0: 621022ef jal x5,80005500 +800026e4: 800026d4 .word 0x800026d4 +800026e8: 8000cbf7 .word 0x8000cbf7 +800026ec: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xfffffffe +800026f0: 0007ae03 lw x28,0(x15) +800026f4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xffffffff +800026f8: 0007a803 lw x16,0(x15) +800026fc: 00478793 addi x15,x15,4 + +80002700 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + orn x30, x28, x16 # perform operation +80002700: 410e6f33 orn x30,x28,x16 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002704: 00062203 lw x4,0(x12) +80002708: 01e20863 beq x4,x30,80002718 +8000270c: 5f5022ef jal x5,80005500 +80002710: 80002700 .word 0x80002700 +80002714: 8000cc55 .word 0x8000cc55 +80002718: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xfffffffe +8000271c: 0007a903 lw x18,0(x15) +80002720: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xfffffffe +80002724: 0007a483 lw x9,0(x15) +80002728: 00478793 addi x15,x15,4 + +8000272c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + orn x10, x18, x9 # perform operation +8000272c: 40996533 orn x10,x18,x9 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002730: 00062203 lw x4,0(x12) +80002734: 00a20863 beq x4,x10,80002744 +80002738: 5c9022ef jal x5,80005500 +8000273c: 8000272c .word 0x8000272c +80002740: 8000ccb3 .word 0x8000ccb3 +80002744: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xfffffffe +80002748: 0007ac83 lw x25,0(x15) +8000274c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x5bbc8872 +80002750: 0007a583 lw x11,0(x15) +80002754: 00478793 addi x15,x15,4 + +80002758 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + orn x19, x25, x11 # perform operation +80002758: 40bce9b3 orn x19,x25,x11 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000275c: 00062203 lw x4,0(x12) +80002760: 01320863 beq x4,x19,80002770 +80002764: 59d022ef jal x5,80005500 +80002768: 80002758 .word 0x80002758 +8000276c: 8000cd11 .word 0x8000cd11 +80002770: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xfffffffe +80002774: 0007aa03 lw x20,0(x15) +80002778: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xaaaaaaaa +8000277c: 0007a903 lw x18,0(x15) +80002780: 00478793 addi x15,x15,4 + +80002784 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + orn x23, x20, x18 # perform operation +80002784: 412a6bb3 orn x23,x20,x18 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002788: 00062203 lw x4,0(x12) +8000278c: 01720863 beq x4,x23,8000279c +80002790: 571022ef jal x5,80005500 +80002794: 80002784 .word 0x80002784 +80002798: 8000cd6f .word 0x8000cd6f +8000279c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xfffffffe +800027a0: 0007ad83 lw x27,0(x15) +800027a4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x55555555 +800027a8: 0007ae03 lw x28,0(x15) +800027ac: 00478793 addi x15,x15,4 + +800027b0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + orn x1, x27, x28 # perform operation +800027b0: 41cde0b3 orn x1,x27,x28 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027b4: 00062203 lw x4,0(x12) +800027b8: 00120863 beq x4,x1,800027c8 +800027bc: 545022ef jal x5,80005500 +800027c0: 800027b0 .word 0x800027b0 +800027c4: 8000cdcd .word 0x8000cdcd +800027c8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x5bbc8872 +800027cc: 0007af03 lw x30,0(x15) +800027d0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x00000000 +800027d4: 0007a403 lw x8,0(x15) +800027d8: 00478793 addi x15,x15,4 + +800027dc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + orn x22, x30, x8 # perform operation +800027dc: 408f6b33 orn x22,x30,x8 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027e0: 00062203 lw x4,0(x12) +800027e4: 01620863 beq x4,x22,800027f4 +800027e8: 519022ef jal x5,80005500 +800027ec: 800027dc .word 0x800027dc +800027f0: 8000ce2b .word 0x8000ce2b +800027f4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x5bbc8872 +800027f8: 0007ac83 lw x25,0(x15) +800027fc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x00000001 +80002800: 0007aa03 lw x20,0(x15) +80002804: 00478793 addi x15,x15,4 + +80002808 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + orn x1, x25, x20 # perform operation +80002808: 414ce0b3 orn x1,x25,x20 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000280c: 00062203 lw x4,0(x12) +80002810: 00120863 beq x4,x1,80002820 +80002814: 4ed022ef jal x5,80005500 +80002818: 80002808 .word 0x80002808 +8000281c: 8000ce82 .word 0x8000ce82 +80002820: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5bbc8872 +80002824: 0007a083 lw x1,0(x15) +80002828: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x00000002 +8000282c: 0007af83 lw x31,0(x15) +80002830: 00478793 addi x15,x15,4 + +80002834 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + orn x28, x1, x31 # perform operation +80002834: 41f0ee33 orn x28,x1,x31 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002838: 00062203 lw x4,0(x12) +8000283c: 01c20863 beq x4,x28,8000284c +80002840: 4c1022ef jal x5,80005500 +80002844: 80002834 .word 0x80002834 +80002848: 8000ced9 .word 0x8000ced9 +8000284c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5bbc8872 +80002850: 0007a083 lw x1,0(x15) +80002854: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x80000000 +80002858: 0007a683 lw x13,0(x15) +8000285c: 00478793 addi x15,x15,4 + +80002860 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + orn x25, x1, x13 # perform operation +80002860: 40d0ecb3 orn x25,x1,x13 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002864: 00062203 lw x4,0(x12) +80002868: 01920863 beq x4,x25,80002878 +8000286c: 495022ef jal x5,80005500 +80002870: 80002860 .word 0x80002860 +80002874: 8000cf30 .word 0x8000cf30 +80002878: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x5bbc8872 +8000287c: 0007a883 lw x17,0(x15) +80002880: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x80000001 +80002884: 0007ab03 lw x22,0(x15) +80002888: 00478793 addi x15,x15,4 + +8000288c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + orn x16, x17, x22 # perform operation +8000288c: 4168e833 orn x16,x17,x22 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002890: 00062203 lw x4,0(x12) +80002894: 01020863 beq x4,x16,800028a4 +80002898: 469022ef jal x5,80005500 +8000289c: 8000288c .word 0x8000288c +800028a0: 8000cf8e .word 0x8000cf8e +800028a4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x5bbc8872 +800028a8: 0007ac03 lw x24,0(x15) +800028ac: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7fffffff +800028b0: 0007a903 lw x18,0(x15) +800028b4: 00478793 addi x15,x15,4 + +800028b8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + orn x7, x24, x18 # perform operation +800028b8: 412c63b3 orn x7,x24,x18 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028bc: 00062203 lw x4,0(x12) +800028c0: 00720863 beq x4,x7,800028d0 +800028c4: 43d022ef jal x5,80005500 +800028c8: 800028b8 .word 0x800028b8 +800028cc: 8000cfec .word 0x8000cfec +800028d0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5bbc8872 +800028d4: 0007a083 lw x1,0(x15) +800028d8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x7ffffffe +800028dc: 0007aa83 lw x21,0(x15) +800028e0: 00478793 addi x15,x15,4 + +800028e4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + orn x29, x1, x21 # perform operation +800028e4: 4150eeb3 orn x29,x1,x21 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028e8: 00062203 lw x4,0(x12) +800028ec: 01d20863 beq x4,x29,800028fc +800028f0: 411022ef jal x5,80005500 +800028f4: 800028e4 .word 0x800028e4 +800028f8: 8000d04a .word 0x8000d04a +800028fc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x5bbc8872 +80002900: 0007af03 lw x30,0(x15) +80002904: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xffffffff +80002908: 0007ab83 lw x23,0(x15) +8000290c: 00478793 addi x15,x15,4 + +80002910 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + orn x20, x30, x23 # perform operation +80002910: 417f6a33 orn x20,x30,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002914: 00062203 lw x4,0(x12) +80002918: 01420863 beq x4,x20,80002928 +8000291c: 3e5022ef jal x5,80005500 +80002920: 80002910 .word 0x80002910 +80002924: 8000d0a8 .word 0x8000d0a8 +80002928: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x5bbc8872 +8000292c: 0007ad83 lw x27,0(x15) +80002930: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xfffffffe +80002934: 0007a183 lw x3,0(x15) +80002938: 00478793 addi x15,x15,4 + +8000293c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + orn x11, x27, x3 # perform operation +8000293c: 403de5b3 orn x11,x27,x3 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002940: 00062203 lw x4,0(x12) +80002944: 00b20863 beq x4,x11,80002954 +80002948: 3b9022ef jal x5,80005500 +8000294c: 8000293c .word 0x8000293c +80002950: 8000d106 .word 0x8000d106 +80002954: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x5bbc8872 +80002958: 0007ad03 lw x26,0(x15) +8000295c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x5bbc8872 +80002960: 0007a903 lw x18,0(x15) +80002964: 00478793 addi x15,x15,4 + +80002968 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + orn x11, x26, x18 # perform operation +80002968: 412d65b3 orn x11,x26,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000296c: 00062203 lw x4,0(x12) +80002970: 00b20863 beq x4,x11,80002980 +80002974: 38d022ef jal x5,80005500 +80002978: 80002968 .word 0x80002968 +8000297c: 8000d164 .word 0x8000d164 +80002980: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x5bbc8872 +80002984: 0007a403 lw x8,0(x15) +80002988: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xaaaaaaaa +8000298c: 0007a883 lw x17,0(x15) +80002990: 00478793 addi x15,x15,4 + +80002994 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + orn x24, x8, x17 # perform operation +80002994: 41146c33 orn x24,x8,x17 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +80002998: 00062203 lw x4,0(x12) +8000299c: 01820863 beq x4,x24,800029ac +800029a0: 361022ef jal x5,80005500 +800029a4: 80002994 .word 0x80002994 +800029a8: 8000d1c2 .word 0x8000d1c2 +800029ac: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x5bbc8872 +800029b0: 0007a383 lw x7,0(x15) +800029b4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x55555555 +800029b8: 0007ad03 lw x26,0(x15) +800029bc: 00478793 addi x15,x15,4 + +800029c0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + orn x1, x7, x26 # perform operation +800029c0: 41a3e0b3 orn x1,x7,x26 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029c4: 00062203 lw x4,0(x12) +800029c8: 00120863 beq x4,x1,800029d8 +800029cc: 335022ef jal x5,80005500 +800029d0: 800029c0 .word 0x800029c0 +800029d4: 8000d220 .word 0x8000d220 +800029d8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xaaaaaaaa +800029dc: 0007aa83 lw x21,0(x15) +800029e0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x00000000 +800029e4: 0007a683 lw x13,0(x15) +800029e8: 00478793 addi x15,x15,4 + +800029ec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + orn x29, x21, x13 # perform operation +800029ec: 40daeeb3 orn x29,x21,x13 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029f0: 00062203 lw x4,0(x12) +800029f4: 01d20863 beq x4,x29,80002a04 +800029f8: 309022ef jal x5,80005500 +800029fc: 800029ec .word 0x800029ec +80002a00: 8000d27e .word 0x8000d27e +80002a04: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xaaaaaaaa +80002a08: 0007a083 lw x1,0(x15) +80002a0c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000001 +80002a10: 0007aa83 lw x21,0(x15) +80002a14: 00478793 addi x15,x15,4 + +80002a18 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + orn x6, x1, x21 # perform operation +80002a18: 4150e333 orn x6,x1,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a1c: 00062203 lw x4,0(x12) +80002a20: 00620863 beq x4,x6,80002a30 +80002a24: 2dd022ef jal x5,80005500 +80002a28: 80002a18 .word 0x80002a18 +80002a2c: 8000d2d5 .word 0x8000d2d5 +80002a30: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xaaaaaaaa +80002a34: 0007a303 lw x6,0(x15) +80002a38: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x00000002 +80002a3c: 0007aa03 lw x20,0(x15) +80002a40: 00478793 addi x15,x15,4 + +80002a44 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + orn x8, x6, x20 # perform operation +80002a44: 41436433 orn x8,x6,x20 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a48: 00062203 lw x4,0(x12) +80002a4c: 00820863 beq x4,x8,80002a5c +80002a50: 2b1022ef jal x5,80005500 +80002a54: 80002a44 .word 0x80002a44 +80002a58: 8000d32c .word 0x8000d32c +80002a5c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xaaaaaaaa +80002a60: 0007a103 lw x2,0(x15) +80002a64: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x80000000 +80002a68: 0007ac83 lw x25,0(x15) +80002a6c: 00478793 addi x15,x15,4 + +80002a70 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + orn x13, x2, x25 # perform operation +80002a70: 419166b3 orn x13,x2,x25 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a74: 00062203 lw x4,0(x12) +80002a78: 00d20863 beq x4,x13,80002a88 +80002a7c: 285022ef jal x5,80005500 +80002a80: 80002a70 .word 0x80002a70 +80002a84: 8000d383 .word 0x8000d383 +80002a88: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xaaaaaaaa +80002a8c: 0007a703 lw x14,0(x15) +80002a90: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x80000001 +80002a94: 0007a683 lw x13,0(x15) +80002a98: 00478793 addi x15,x15,4 + +80002a9c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + orn x10, x14, x13 # perform operation +80002a9c: 40d76533 orn x10,x14,x13 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aa0: 00062203 lw x4,0(x12) +80002aa4: 00a20863 beq x4,x10,80002ab4 +80002aa8: 259022ef jal x5,80005500 +80002aac: 80002a9c .word 0x80002a9c +80002ab0: 8000d3e1 .word 0x8000d3e1 +80002ab4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xaaaaaaaa +80002ab8: 0007a303 lw x6,0(x15) +80002abc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x7fffffff +80002ac0: 0007a083 lw x1,0(x15) +80002ac4: 00478793 addi x15,x15,4 + +80002ac8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + orn x14, x6, x1 # perform operation +80002ac8: 40136733 orn x14,x6,x1 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002acc: 00062203 lw x4,0(x12) +80002ad0: 00e20863 beq x4,x14,80002ae0 +80002ad4: 22d022ef jal x5,80005500 +80002ad8: 80002ac8 .word 0x80002ac8 +80002adc: 8000d43f .word 0x8000d43f +80002ae0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaa +80002ae4: 0007a883 lw x17,0(x15) +80002ae8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x7ffffffe +80002aec: 0007ad83 lw x27,0(x15) +80002af0: 00478793 addi x15,x15,4 + +80002af4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + orn x16, x17, x27 # perform operation +80002af4: 41b8e833 orn x16,x17,x27 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002af8: 00062203 lw x4,0(x12) +80002afc: 01020863 beq x4,x16,80002b0c +80002b00: 201022ef jal x5,80005500 +80002b04: 80002af4 .word 0x80002af4 +80002b08: 8000d49d .word 0x8000d49d +80002b0c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xaaaaaaaa +80002b10: 0007a303 lw x6,0(x15) +80002b14: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xffffffff +80002b18: 0007a983 lw x19,0(x15) +80002b1c: 00478793 addi x15,x15,4 + +80002b20 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + orn x28, x6, x19 # perform operation +80002b20: 41336e33 orn x28,x6,x19 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b24: 00062203 lw x4,0(x12) +80002b28: 01c20863 beq x4,x28,80002b38 +80002b2c: 1d5022ef jal x5,80005500 +80002b30: 80002b20 .word 0x80002b20 +80002b34: 8000d4fb .word 0x8000d4fb +80002b38: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xaaaaaaaa +80002b3c: 0007ae83 lw x29,0(x15) +80002b40: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xfffffffe +80002b44: 0007a383 lw x7,0(x15) +80002b48: 00478793 addi x15,x15,4 + +80002b4c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + orn x24, x29, x7 # perform operation +80002b4c: 407eec33 orn x24,x29,x7 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b50: 00062203 lw x4,0(x12) +80002b54: 01820863 beq x4,x24,80002b64 +80002b58: 1a9022ef jal x5,80005500 +80002b5c: 80002b4c .word 0x80002b4c +80002b60: 8000d559 .word 0x8000d559 +80002b64: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xaaaaaaaa +80002b68: 0007aa03 lw x20,0(x15) +80002b6c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x5bbc8872 +80002b70: 0007ac83 lw x25,0(x15) +80002b74: 00478793 addi x15,x15,4 + +80002b78 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + orn x26, x20, x25 # perform operation +80002b78: 419a6d33 orn x26,x20,x25 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b7c: 00062203 lw x4,0(x12) +80002b80: 01a20863 beq x4,x26,80002b90 +80002b84: 17d022ef jal x5,80005500 +80002b88: 80002b78 .word 0x80002b78 +80002b8c: 8000d5b7 .word 0x8000d5b7 +80002b90: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xaaaaaaaa +80002b94: 0007aa83 lw x21,0(x15) +80002b98: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xaaaaaaaa +80002b9c: 0007af83 lw x31,0(x15) +80002ba0: 00478793 addi x15,x15,4 + +80002ba4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + orn x29, x21, x31 # perform operation +80002ba4: 41faeeb3 orn x29,x21,x31 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002ba8: 00062203 lw x4,0(x12) +80002bac: 01d20863 beq x4,x29,80002bbc +80002bb0: 151022ef jal x5,80005500 +80002bb4: 80002ba4 .word 0x80002ba4 +80002bb8: 8000d615 .word 0x8000d615 +80002bbc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xaaaaaaaa +80002bc0: 0007a303 lw x6,0(x15) +80002bc4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x55555555 +80002bc8: 0007ae83 lw x29,0(x15) +80002bcc: 00478793 addi x15,x15,4 + +80002bd0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + orn x10, x6, x29 # perform operation +80002bd0: 41d36533 orn x10,x6,x29 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bd4: 00062203 lw x4,0(x12) +80002bd8: 00a20863 beq x4,x10,80002be8 +80002bdc: 125022ef jal x5,80005500 +80002be0: 80002bd0 .word 0x80002bd0 +80002be4: 8000d673 .word 0x8000d673 +80002be8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x55555555 +80002bec: 0007ad03 lw x26,0(x15) +80002bf0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x00000000 +80002bf4: 0007ae83 lw x29,0(x15) +80002bf8: 00478793 addi x15,x15,4 + +80002bfc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + orn x13, x26, x29 # perform operation +80002bfc: 41dd66b3 orn x13,x26,x29 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c00: 00062203 lw x4,0(x12) +80002c04: 00d20863 beq x4,x13,80002c14 +80002c08: 0f9022ef jal x5,80005500 +80002c0c: 80002bfc .word 0x80002bfc +80002c10: 8000d6d1 .word 0x8000d6d1 +80002c14: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x55555555 +80002c18: 0007ad83 lw x27,0(x15) +80002c1c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x00000001 +80002c20: 0007a803 lw x16,0(x15) +80002c24: 00478793 addi x15,x15,4 + +80002c28 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + orn x24, x27, x16 # perform operation +80002c28: 410dec33 orn x24,x27,x16 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c2c: 00062203 lw x4,0(x12) +80002c30: 01820863 beq x4,x24,80002c40 +80002c34: 0cd022ef jal x5,80005500 +80002c38: 80002c28 .word 0x80002c28 +80002c3c: 8000d728 .word 0x8000d728 +80002c40: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x55555555 +80002c44: 0007a183 lw x3,0(x15) +80002c48: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x00000002 +80002c4c: 0007a803 lw x16,0(x15) +80002c50: 00478793 addi x15,x15,4 + +80002c54 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + orn x10, x3, x16 # perform operation +80002c54: 4101e533 orn x10,x3,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c58: 00062203 lw x4,0(x12) +80002c5c: 00a20863 beq x4,x10,80002c6c +80002c60: 0a1022ef jal x5,80005500 +80002c64: 80002c54 .word 0x80002c54 +80002c68: 8000d77f .word 0x8000d77f +80002c6c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x55555555 +80002c70: 0007ae83 lw x29,0(x15) +80002c74: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x80000000 +80002c78: 0007aa03 lw x20,0(x15) +80002c7c: 00478793 addi x15,x15,4 + +80002c80 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + orn x25, x29, x20 # perform operation +80002c80: 414eecb3 orn x25,x29,x20 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c84: 00062203 lw x4,0(x12) +80002c88: 01920863 beq x4,x25,80002c98 +80002c8c: 075022ef jal x5,80005500 +80002c90: 80002c80 .word 0x80002c80 +80002c94: 8000d7d6 .word 0x8000d7d6 +80002c98: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x55555555 +80002c9c: 0007a403 lw x8,0(x15) +80002ca0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x80000001 +80002ca4: 0007a883 lw x17,0(x15) +80002ca8: 00478793 addi x15,x15,4 + +80002cac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + orn x19, x8, x17 # perform operation +80002cac: 411469b3 orn x19,x8,x17 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cb0: 00062203 lw x4,0(x12) +80002cb4: 01320863 beq x4,x19,80002cc4 +80002cb8: 049022ef jal x5,80005500 +80002cbc: 80002cac .word 0x80002cac +80002cc0: 8000d834 .word 0x8000d834 +80002cc4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x55555555 +80002cc8: 0007ae03 lw x28,0(x15) +80002ccc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x7fffffff +80002cd0: 0007a183 lw x3,0(x15) +80002cd4: 00478793 addi x15,x15,4 + +80002cd8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + orn x30, x28, x3 # perform operation +80002cd8: 403e6f33 orn x30,x28,x3 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cdc: 00062203 lw x4,0(x12) +80002ce0: 01e20863 beq x4,x30,80002cf0 +80002ce4: 01d022ef jal x5,80005500 +80002ce8: 80002cd8 .word 0x80002cd8 +80002cec: 8000d892 .word 0x8000d892 +80002cf0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x55555555 +80002cf4: 0007ac83 lw x25,0(x15) +80002cf8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x7ffffffe +80002cfc: 0007ac03 lw x24,0(x15) +80002d00: 00478793 addi x15,x15,4 + +80002d04 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + orn x11, x25, x24 # perform operation +80002d04: 418ce5b3 orn x11,x25,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d08: 00062203 lw x4,0(x12) +80002d0c: 00b20863 beq x4,x11,80002d1c +80002d10: 7f0022ef jal x5,80005500 +80002d14: 80002d04 .word 0x80002d04 +80002d18: 8000d8f0 .word 0x8000d8f0 +80002d1c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x55555555 +80002d20: 0007ae03 lw x28,0(x15) +80002d24: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xffffffff +80002d28: 0007a803 lw x16,0(x15) +80002d2c: 00478793 addi x15,x15,4 + +80002d30 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + orn x20, x28, x16 # perform operation +80002d30: 410e6a33 orn x20,x28,x16 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d34: 00062203 lw x4,0(x12) +80002d38: 01420863 beq x4,x20,80002d48 +80002d3c: 7c4022ef jal x5,80005500 +80002d40: 80002d30 .word 0x80002d30 +80002d44: 8000d94e .word 0x8000d94e +80002d48: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x55555555 +80002d4c: 0007a303 lw x6,0(x15) +80002d50: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xfffffffe +80002d54: 0007af83 lw x31,0(x15) +80002d58: 00478793 addi x15,x15,4 + +80002d5c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + orn x23, x6, x31 # perform operation +80002d5c: 41f36bb3 orn x23,x6,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d60: 00062203 lw x4,0(x12) +80002d64: 01720863 beq x4,x23,80002d74 +80002d68: 798022ef jal x5,80005500 +80002d6c: 80002d5c .word 0x80002d5c +80002d70: 8000d9ac .word 0x8000d9ac +80002d74: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x55555555 +80002d78: 0007ad03 lw x26,0(x15) +80002d7c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x5bbc8872 +80002d80: 0007aa83 lw x21,0(x15) +80002d84: 00478793 addi x15,x15,4 + +80002d88 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + orn x13, x26, x21 # perform operation +80002d88: 415d66b3 orn x13,x26,x21 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d8c: 00062203 lw x4,0(x12) +80002d90: 00d20863 beq x4,x13,80002da0 +80002d94: 76c022ef jal x5,80005500 +80002d98: 80002d88 .word 0x80002d88 +80002d9c: 8000da0a .word 0x8000da0a +80002da0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x55555555 +80002da4: 0007ab03 lw x22,0(x15) +80002da8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xaaaaaaaa +80002dac: 0007a703 lw x14,0(x15) +80002db0: 00478793 addi x15,x15,4 + +80002db4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + orn x20, x22, x14 # perform operation +80002db4: 40eb6a33 orn x20,x22,x14 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002db8: 00062203 lw x4,0(x12) +80002dbc: 01420863 beq x4,x20,80002dcc +80002dc0: 740022ef jal x5,80005500 +80002dc4: 80002db4 .word 0x80002db4 +80002dc8: 8000da68 .word 0x8000da68 +80002dcc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x55555555 +80002dd0: 0007a703 lw x14,0(x15) +80002dd4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x55555555 +80002dd8: 0007a483 lw x9,0(x15) +80002ddc: 00478793 addi x15,x15,4 + +80002de0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + orn x18, x14, x9 # perform operation +80002de0: 40976933 orn x18,x14,x9 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002de4: 00062203 lw x4,0(x12) +80002de8: 01220863 beq x4,x18,80002df8 +80002dec: 714022ef jal x5,80005500 +80002df0: 80002de0 .word 0x80002de0 +80002df4: 8000dac6 .word 0x8000dac6 +80002df8: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x357fd498 +80002dfc: 0007a003 lw x0,0(x15) +80002e00: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x5cd8bb5c +80002e04: 0007a003 lw x0,0(x15) +80002e08: 00478793 addi x15,x15,4 + +80002e0c : +Zbkb_orn_cg_cmp_rs1_rs2_b0: + orn x8, x0, x0 # perform operation +80002e0c: 40006433 orn x8,x0,x0 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cmp_rs1_rs2_b0, Zbkb_orn_cg_cmp_rs1_rs2_b0_str) +80002e10: 00062203 lw x4,0(x12) +80002e14: 00820863 beq x4,x8,80002e24 +80002e18: 6e8022ef jal x5,80005500 +80002e1c: 80002e0c .word 0x80002e0c +80002e20: 8000db24 .word 0x8000db24 +80002e24: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x0634be26 +80002e28: 0007a083 lw x1,0(x15) +80002e2c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xd5e21322 +80002e30: 0007a083 lw x1,0(x15) +80002e34: 00478793 addi x15,x15,4 + +80002e38 : +Zbkb_orn_cg_cmp_rs1_rs2_b1: + orn x16, x1, x1 # perform operation +80002e38: 4010e833 orn x16,x1,x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cmp_rs1_rs2_b1, Zbkb_orn_cg_cmp_rs1_rs2_b1_str) +80002e3c: 00062203 lw x4,0(x12) +80002e40: 01020863 beq x4,x16,80002e50 +80002e44: 6bc022ef jal x5,80005500 +80002e48: 80002e38 .word 0x80002e38 +80002e4c: 8000db5b .word 0x8000db5b +80002e50: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x60213a85 +80002e54: 0007a103 lw x2,0(x15) +80002e58: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xa532b479 +80002e5c: 0007a103 lw x2,0(x15) +80002e60: 00478793 addi x15,x15,4 + +80002e64 : +Zbkb_orn_cg_cmp_rs1_rs2_b2: + orn x8, x2, x2 # perform operation +80002e64: 40216433 orn x8,x2,x2 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cmp_rs1_rs2_b2, Zbkb_orn_cg_cmp_rs1_rs2_b2_str) +80002e68: 00062203 lw x4,0(x12) +80002e6c: 00820863 beq x4,x8,80002e7c +80002e70: 690022ef jal x5,80005500 +80002e74: 80002e64 .word 0x80002e64 +80002e78: 8000db92 .word 0x8000db92 +80002e7c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x1c5782a3 +80002e80: 0007a183 lw x3,0(x15) +80002e84: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xa8e05d62 +80002e88: 0007a183 lw x3,0(x15) +80002e8c: 00478793 addi x15,x15,4 + +80002e90 : +Zbkb_orn_cg_cmp_rs1_rs2_b3: + orn x22, x3, x3 # perform operation +80002e90: 4031eb33 orn x22,x3,x3 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_orn_cg_cmp_rs1_rs2_b3, Zbkb_orn_cg_cmp_rs1_rs2_b3_str) +80002e94: 00062203 lw x4,0(x12) +80002e98: 01620863 beq x4,x22,80002ea8 +80002e9c: 664022ef jal x5,80005500 +80002ea0: 80002e90 .word 0x80002e90 +80002ea4: 8000dbc9 .word 0x8000dbc9 +80002ea8: 00460613 addi x12,x12,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002eac: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002eb0: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x9c7414cd +80002eb4: 0007a203 lw x4,0(x15) +80002eb8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xb74285b0 +80002ebc: 0007a203 lw x4,0(x15) +80002ec0: 00478793 addi x15,x15,4 + +80002ec4 : +Zbkb_orn_cg_cmp_rs1_rs2_b4: + orn x14, x4, x4 # perform operation +80002ec4: 40426733 orn x14,x4,x4 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zbkb_orn_cg_cmp_rs1_rs2_b4, Zbkb_orn_cg_cmp_rs1_rs2_b4_str) +80002ec8: 00062383 lw x7,0(x12) +80002ecc: 00e38863 beq x7,x14,80002edc +80002ed0: 6480246f jal x8,80005518 +80002ed4: 80002ec4 .word 0x80002ec4 +80002ed8: 8000dc00 .word 0x8000dc00 +80002edc: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x301887db +80002ee0: 0007a283 lw x5,0(x15) +80002ee4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x16dc54bd +80002ee8: 0007a283 lw x5,0(x15) +80002eec: 00478793 addi x15,x15,4 + +80002ef0 : +Zbkb_orn_cg_cmp_rs1_rs2_b5: + orn x20, x5, x5 # perform operation +80002ef0: 4052ea33 orn x20,x5,x5 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zbkb_orn_cg_cmp_rs1_rs2_b5, Zbkb_orn_cg_cmp_rs1_rs2_b5_str) +80002ef4: 00062383 lw x7,0(x12) +80002ef8: 01438863 beq x7,x20,80002f08 +80002efc: 61c0246f jal x8,80005518 +80002f00: 80002ef0 .word 0x80002ef0 +80002f04: 8000dc37 .word 0x8000dc37 +80002f08: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xd5af1120 +80002f0c: 0007a303 lw x6,0(x15) +80002f10: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x1da9e692 +80002f14: 0007a303 lw x6,0(x15) +80002f18: 00478793 addi x15,x15,4 + +80002f1c : +Zbkb_orn_cg_cmp_rs1_rs2_b6: + orn x17, x6, x6 # perform operation +80002f1c: 406368b3 orn x17,x6,x6 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zbkb_orn_cg_cmp_rs1_rs2_b6, Zbkb_orn_cg_cmp_rs1_rs2_b6_str) +80002f20: 00062383 lw x7,0(x12) +80002f24: 01138863 beq x7,x17,80002f34 +80002f28: 5f00246f jal x8,80005518 +80002f2c: 80002f1c .word 0x80002f1c +80002f30: 8000dc6e .word 0x8000dc6e +80002f34: 00460613 addi x12,x12,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80002f38: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80002f3c: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x300708c0 +80002f40: 0007a383 lw x7,0(x15) +80002f44: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x2ad6b682 +80002f48: 0007a383 lw x7,0(x15) +80002f4c: 00478793 addi x15,x15,4 + +80002f50 : +Zbkb_orn_cg_cmp_rs1_rs2_b7: + orn x28, x7, x7 # perform operation +80002f50: 4073ee33 orn x28,x7,x7 + # Check if x28 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x28, Zbkb_orn_cg_cmp_rs1_rs2_b7, Zbkb_orn_cg_cmp_rs1_rs2_b7_str) +80002f54: 00062683 lw x13,0(x12) +80002f58: 01c68863 beq x13,x28,80002f68 +80002f5c: 5e40276f jal x14,80005540 +80002f60: 80002f50 .word 0x80002f50 +80002f64: 8000dca5 .word 0x8000dca5 +80002f68: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x4994076f +80002f6c: 0007a403 lw x8,0(x15) +80002f70: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x841e7839 +80002f74: 0007a403 lw x8,0(x15) +80002f78: 00478793 addi x15,x15,4 + +80002f7c : +Zbkb_orn_cg_cmp_rs1_rs2_b8: + orn x25, x8, x8 # perform operation +80002f7c: 40846cb3 orn x25,x8,x8 + # Check if x25 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x25, Zbkb_orn_cg_cmp_rs1_rs2_b8, Zbkb_orn_cg_cmp_rs1_rs2_b8_str) +80002f80: 00062683 lw x13,0(x12) +80002f84: 01968863 beq x13,x25,80002f94 +80002f88: 5b80276f jal x14,80005540 +80002f8c: 80002f7c .word 0x80002f7c +80002f90: 8000dcdc .word 0x8000dcdc +80002f94: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x49e4a044 +80002f98: 0007a483 lw x9,0(x15) +80002f9c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xd5f350f6 +80002fa0: 0007a483 lw x9,0(x15) +80002fa4: 00478793 addi x15,x15,4 + +80002fa8 : +Zbkb_orn_cg_cmp_rs1_rs2_b9: + orn x11, x9, x9 # perform operation +80002fa8: 4094e5b3 orn x11,x9,x9 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_orn_cg_cmp_rs1_rs2_b9, Zbkb_orn_cg_cmp_rs1_rs2_b9_str) +80002fac: 00062683 lw x13,0(x12) +80002fb0: 00b68863 beq x13,x11,80002fc0 +80002fb4: 58c0276f jal x14,80005540 +80002fb8: 80002fa8 .word 0x80002fa8 +80002fbc: 8000dd13 .word 0x8000dd13 +80002fc0: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x5114b769 +80002fc4: 0007a503 lw x10,0(x15) +80002fc8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x49a9e4b6 +80002fcc: 0007a503 lw x10,0(x15) +80002fd0: 00478793 addi x15,x15,4 + +80002fd4 : +Zbkb_orn_cg_cmp_rs1_rs2_b10: + orn x11, x10, x10 # perform operation +80002fd4: 40a565b3 orn x11,x10,x10 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_orn_cg_cmp_rs1_rs2_b10, Zbkb_orn_cg_cmp_rs1_rs2_b10_str) +80002fd8: 00062683 lw x13,0(x12) +80002fdc: 00b68863 beq x13,x11,80002fec +80002fe0: 5600276f jal x14,80005540 +80002fe4: 80002fd4 .word 0x80002fd4 +80002fe8: 8000dd4a .word 0x8000dd4a +80002fec: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xc84697fa +80002ff0: 0007a583 lw x11,0(x15) +80002ff4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x3ac90e4c +80002ff8: 0007a583 lw x11,0(x15) +80002ffc: 00478793 addi x15,x15,4 + +80003000 : +Zbkb_orn_cg_cmp_rs1_rs2_b11: + orn x28, x11, x11 # perform operation +80003000: 40b5ee33 orn x28,x11,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x28, Zbkb_orn_cg_cmp_rs1_rs2_b11, Zbkb_orn_cg_cmp_rs1_rs2_b11_str) +80003004: 00062683 lw x13,0(x12) +80003008: 01c68863 beq x13,x28,80003018 +8000300c: 5340276f jal x14,80005540 +80003010: 80003000 .word 0x80003000 +80003014: 8000dd82 .word 0x8000dd82 +80003018: 00460613 addi x12,x12,4 + + mv x31, x12 # switch signature pointer register to avoid conflict with test +8000301c: 00060f93 addi x31,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x2f13cc62 +80003020: 0007a603 lw x12,0(x15) +80003024: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x4c8d568e +80003028: 0007a603 lw x12,0(x15) +8000302c: 00478793 addi x15,x15,4 + +80003030 : +Zbkb_orn_cg_cmp_rs1_rs2_b12: + orn x25, x12, x12 # perform operation +80003030: 40c66cb3 orn x25,x12,x12 + # Check if x25 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x25, Zbkb_orn_cg_cmp_rs1_rs2_b12, Zbkb_orn_cg_cmp_rs1_rs2_b12_str) +80003034: 000fa683 lw x13,0(x31) +80003038: 01968863 beq x13,x25,80003048 +8000303c: 5040276f jal x14,80005540 +80003040: 80003030 .word 0x80003030 +80003044: 8000ddba .word 0x8000ddba +80003048: 004f8f93 addi x31,x31,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000304c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003050: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x6d85e06e +80003054: 0007a683 lw x13,0(x15) +80003058: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x9cc1cc28 +8000305c: 0007a683 lw x13,0(x15) +80003060: 00478793 addi x15,x15,4 + +80003064 : +Zbkb_orn_cg_cmp_rs1_rs2_b13: + orn x1, x13, x13 # perform operation +80003064: 40d6e0b3 orn x1,x13,x13 + # Check if x1 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x1, Zbkb_orn_cg_cmp_rs1_rs2_b13, Zbkb_orn_cg_cmp_rs1_rs2_b13_str) +80003068: 000fa383 lw x7,0(x31) +8000306c: 00138863 beq x7,x1,8000307c +80003070: 4a80246f jal x8,80005518 +80003074: 80003064 .word 0x80003064 +80003078: 8000ddf2 .word 0x8000ddf2 +8000307c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xe13e42af +80003080: 0007a703 lw x14,0(x15) +80003084: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x70ef0a96 +80003088: 0007a703 lw x14,0(x15) +8000308c: 00478793 addi x15,x15,4 + +80003090 : +Zbkb_orn_cg_cmp_rs1_rs2_b14: + orn x17, x14, x14 # perform operation +80003090: 40e768b3 orn x17,x14,x14 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkb_orn_cg_cmp_rs1_rs2_b14, Zbkb_orn_cg_cmp_rs1_rs2_b14_str) +80003094: 000fa383 lw x7,0(x31) +80003098: 01138863 beq x7,x17,800030a8 +8000309c: 47c0246f jal x8,80005518 +800030a0: 80003090 .word 0x80003090 +800030a4: 8000de2a .word 0x8000de2a +800030a8: 004f8f93 addi x31,x31,4 + + mv x1, x15 # switch data pointer register to avoid conflict with test +800030ac: 00078093 addi x1,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xff708fc9 +800030b0: 0000a783 lw x15,0(x1) +800030b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xf8a952ec +800030b8: 0000a783 lw x15,0(x1) +800030bc: 00408093 addi x1,x1,4 + +800030c0 : +Zbkb_orn_cg_cmp_rs1_rs2_b15: + orn x25, x15, x15 # perform operation +800030c0: 40f7ecb3 orn x25,x15,x15 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkb_orn_cg_cmp_rs1_rs2_b15, Zbkb_orn_cg_cmp_rs1_rs2_b15_str) +800030c4: 000fa383 lw x7,0(x31) +800030c8: 01938863 beq x7,x25,800030d8 +800030cc: 44c0246f jal x8,80005518 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 8000de62 .word 0x8000de62 +800030d8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x9f264fe4 +800030dc: 0000a803 lw x16,0(x1) +800030e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x72b3af05 +800030e4: 0000a803 lw x16,0(x1) +800030e8: 00408093 addi x1,x1,4 + +800030ec : +Zbkb_orn_cg_cmp_rs1_rs2_b16: + orn x5, x16, x16 # perform operation +800030ec: 410862b3 orn x5,x16,x16 + # Check if x5 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x5, Zbkb_orn_cg_cmp_rs1_rs2_b16, Zbkb_orn_cg_cmp_rs1_rs2_b16_str) +800030f0: 000fa383 lw x7,0(x31) +800030f4: 00538863 beq x7,x5,80003104 +800030f8: 4200246f jal x8,80005518 +800030fc: 800030ec .word 0x800030ec +80003100: 8000de9a .word 0x8000de9a +80003104: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x27e186c3 +80003108: 0000a883 lw x17,0(x1) +8000310c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xa703500c +80003110: 0000a883 lw x17,0(x1) +80003114: 00408093 addi x1,x1,4 + +80003118 : +Zbkb_orn_cg_cmp_rs1_rs2_b17: + orn x15, x17, x17 # perform operation +80003118: 4118e7b3 orn x15,x17,x17 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkb_orn_cg_cmp_rs1_rs2_b17, Zbkb_orn_cg_cmp_rs1_rs2_b17_str) +8000311c: 000fa383 lw x7,0(x31) +80003120: 00f38863 beq x7,x15,80003130 +80003124: 3f40246f jal x8,80005518 +80003128: 80003118 .word 0x80003118 +8000312c: 8000ded2 .word 0x8000ded2 +80003130: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x8b7776f4 +80003134: 0000a903 lw x18,0(x1) +80003138: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xf82b9f9b +8000313c: 0000a903 lw x18,0(x1) +80003140: 00408093 addi x1,x1,4 + +80003144 : +Zbkb_orn_cg_cmp_rs1_rs2_b18: + orn x17, x18, x18 # perform operation +80003144: 412968b3 orn x17,x18,x18 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkb_orn_cg_cmp_rs1_rs2_b18, Zbkb_orn_cg_cmp_rs1_rs2_b18_str) +80003148: 000fa383 lw x7,0(x31) +8000314c: 01138863 beq x7,x17,8000315c +80003150: 3c80246f jal x8,80005518 +80003154: 80003144 .word 0x80003144 +80003158: 8000df0a .word 0x8000df0a +8000315c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xcca3fa42 +80003160: 0000a983 lw x19,0(x1) +80003164: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x1ff1161f +80003168: 0000a983 lw x19,0(x1) +8000316c: 00408093 addi x1,x1,4 + +80003170 : +Zbkb_orn_cg_cmp_rs1_rs2_b19: + orn x20, x19, x19 # perform operation +80003170: 4139ea33 orn x20,x19,x19 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_orn_cg_cmp_rs1_rs2_b19, Zbkb_orn_cg_cmp_rs1_rs2_b19_str) +80003174: 000fa383 lw x7,0(x31) +80003178: 01438863 beq x7,x20,80003188 +8000317c: 39c0246f jal x8,80005518 +80003180: 80003170 .word 0x80003170 +80003184: 8000df42 .word 0x8000df42 +80003188: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xa1856958 +8000318c: 0000aa03 lw x20,0(x1) +80003190: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x4ebbfdc3 +80003194: 0000aa03 lw x20,0(x1) +80003198: 00408093 addi x1,x1,4 + +8000319c : +Zbkb_orn_cg_cmp_rs1_rs2_b20: + orn x5, x20, x20 # perform operation +8000319c: 414a62b3 orn x5,x20,x20 + # Check if x5 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x5, Zbkb_orn_cg_cmp_rs1_rs2_b20, Zbkb_orn_cg_cmp_rs1_rs2_b20_str) +800031a0: 000fa383 lw x7,0(x31) +800031a4: 00538863 beq x7,x5,800031b4 +800031a8: 3700246f jal x8,80005518 +800031ac: 8000319c .word 0x8000319c +800031b0: 8000df7a .word 0x8000df7a +800031b4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xd550c073 +800031b8: 0000aa83 lw x21,0(x1) +800031bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xc7716b1e +800031c0: 0000aa83 lw x21,0(x1) +800031c4: 00408093 addi x1,x1,4 + +800031c8 : +Zbkb_orn_cg_cmp_rs1_rs2_b21: + orn x2, x21, x21 # perform operation +800031c8: 415ae133 orn x2,x21,x21 + # Check if x2 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x2, Zbkb_orn_cg_cmp_rs1_rs2_b21, Zbkb_orn_cg_cmp_rs1_rs2_b21_str) +800031cc: 000fa383 lw x7,0(x31) +800031d0: 00238863 beq x7,x2,800031e0 +800031d4: 3440246f jal x8,80005518 +800031d8: 800031c8 .word 0x800031c8 +800031dc: 8000dfb2 .word 0x8000dfb2 +800031e0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x429891cb +800031e4: 0000ab03 lw x22,0(x1) +800031e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7f781740 +800031ec: 0000ab03 lw x22,0(x1) +800031f0: 00408093 addi x1,x1,4 + +800031f4 : +Zbkb_orn_cg_cmp_rs1_rs2_b22: + orn x4, x22, x22 # perform operation +800031f4: 416b6233 orn x4,x22,x22 + # Check if x4 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x4, Zbkb_orn_cg_cmp_rs1_rs2_b22, Zbkb_orn_cg_cmp_rs1_rs2_b22_str) +800031f8: 000fa383 lw x7,0(x31) +800031fc: 00438863 beq x7,x4,8000320c +80003200: 3180246f jal x8,80005518 +80003204: 800031f4 .word 0x800031f4 +80003208: 8000dfea .word 0x8000dfea +8000320c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x886b3f6b +80003210: 0000ab83 lw x23,0(x1) +80003214: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xf77eb50a +80003218: 0000ab83 lw x23,0(x1) +8000321c: 00408093 addi x1,x1,4 + +80003220 : +Zbkb_orn_cg_cmp_rs1_rs2_b23: + orn x22, x23, x23 # perform operation +80003220: 417beb33 orn x22,x23,x23 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkb_orn_cg_cmp_rs1_rs2_b23, Zbkb_orn_cg_cmp_rs1_rs2_b23_str) +80003224: 000fa383 lw x7,0(x31) +80003228: 01638863 beq x7,x22,80003238 +8000322c: 2ec0246f jal x8,80005518 +80003230: 80003220 .word 0x80003220 +80003234: 8000e022 .word 0x8000e022 +80003238: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xf8107e87 +8000323c: 0000ac03 lw x24,0(x1) +80003240: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xff642079 +80003244: 0000ac03 lw x24,0(x1) +80003248: 00408093 addi x1,x1,4 + +8000324c : +Zbkb_orn_cg_cmp_rs1_rs2_b24: + orn x4, x24, x24 # perform operation +8000324c: 418c6233 orn x4,x24,x24 + # Check if x4 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x4, Zbkb_orn_cg_cmp_rs1_rs2_b24, Zbkb_orn_cg_cmp_rs1_rs2_b24_str) +80003250: 000fa383 lw x7,0(x31) +80003254: 00438863 beq x7,x4,80003264 +80003258: 2c00246f jal x8,80005518 +8000325c: 8000324c .word 0x8000324c +80003260: 8000e05a .word 0x8000e05a +80003264: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xa4f2768f +80003268: 0000ac83 lw x25,0(x1) +8000326c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x696ba14f +80003270: 0000ac83 lw x25,0(x1) +80003274: 00408093 addi x1,x1,4 + +80003278 : +Zbkb_orn_cg_cmp_rs1_rs2_b25: + orn x6, x25, x25 # perform operation +80003278: 419ce333 orn x6,x25,x25 + # Check if x6 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x6, Zbkb_orn_cg_cmp_rs1_rs2_b25, Zbkb_orn_cg_cmp_rs1_rs2_b25_str) +8000327c: 000fa383 lw x7,0(x31) +80003280: 00638863 beq x7,x6,80003290 +80003284: 2940246f jal x8,80005518 +80003288: 80003278 .word 0x80003278 +8000328c: 8000e092 .word 0x8000e092 +80003290: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfaf45594 +80003294: 0000ad03 lw x26,0(x1) +80003298: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xc7cc8596 +8000329c: 0000ad03 lw x26,0(x1) +800032a0: 00408093 addi x1,x1,4 + +800032a4 : +Zbkb_orn_cg_cmp_rs1_rs2_b26: + orn x6, x26, x26 # perform operation +800032a4: 41ad6333 orn x6,x26,x26 + # Check if x6 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x6, Zbkb_orn_cg_cmp_rs1_rs2_b26, Zbkb_orn_cg_cmp_rs1_rs2_b26_str) +800032a8: 000fa383 lw x7,0(x31) +800032ac: 00638863 beq x7,x6,800032bc +800032b0: 2680246f jal x8,80005518 +800032b4: 800032a4 .word 0x800032a4 +800032b8: 8000e0ca .word 0x8000e0ca +800032bc: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8c193d58 +800032c0: 0000ad83 lw x27,0(x1) +800032c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xedee222a +800032c8: 0000ad83 lw x27,0(x1) +800032cc: 00408093 addi x1,x1,4 + +800032d0 : +Zbkb_orn_cg_cmp_rs1_rs2_b27: + orn x28, x27, x27 # perform operation +800032d0: 41bdee33 orn x28,x27,x27 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_orn_cg_cmp_rs1_rs2_b27, Zbkb_orn_cg_cmp_rs1_rs2_b27_str) +800032d4: 000fa383 lw x7,0(x31) +800032d8: 01c38863 beq x7,x28,800032e8 +800032dc: 23c0246f jal x8,80005518 +800032e0: 800032d0 .word 0x800032d0 +800032e4: 8000e102 .word 0x8000e102 +800032e8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x17cca2f5 +800032ec: 0000ae03 lw x28,0(x1) +800032f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x36790c15 +800032f4: 0000ae03 lw x28,0(x1) +800032f8: 00408093 addi x1,x1,4 + +800032fc : +Zbkb_orn_cg_cmp_rs1_rs2_b28: + orn x27, x28, x28 # perform operation +800032fc: 41ce6db3 orn x27,x28,x28 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_orn_cg_cmp_rs1_rs2_b28, Zbkb_orn_cg_cmp_rs1_rs2_b28_str) +80003300: 000fa383 lw x7,0(x31) +80003304: 01b38863 beq x7,x27,80003314 +80003308: 2100246f jal x8,80005518 +8000330c: 800032fc .word 0x800032fc +80003310: 8000e13a .word 0x8000e13a +80003314: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x8ee0eb75 +80003318: 0000ae83 lw x29,0(x1) +8000331c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x3dd70626 +80003320: 0000ae83 lw x29,0(x1) +80003324: 00408093 addi x1,x1,4 + +80003328 : +Zbkb_orn_cg_cmp_rs1_rs2_b29: + orn x10, x29, x29 # perform operation +80003328: 41dee533 orn x10,x29,x29 + # Check if x10 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x10, Zbkb_orn_cg_cmp_rs1_rs2_b29, Zbkb_orn_cg_cmp_rs1_rs2_b29_str) +8000332c: 000fa383 lw x7,0(x31) +80003330: 00a38863 beq x7,x10,80003340 +80003334: 1e40246f jal x8,80005518 +80003338: 80003328 .word 0x80003328 +8000333c: 8000e172 .word 0x8000e172 +80003340: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x1dc18c55 +80003344: 0000af03 lw x30,0(x1) +80003348: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xa36bc160 +8000334c: 0000af03 lw x30,0(x1) +80003350: 00408093 addi x1,x1,4 + +80003354 : +Zbkb_orn_cg_cmp_rs1_rs2_b30: + orn x24, x30, x30 # perform operation +80003354: 41ef6c33 orn x24,x30,x30 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_orn_cg_cmp_rs1_rs2_b30, Zbkb_orn_cg_cmp_rs1_rs2_b30_str) +80003358: 000fa383 lw x7,0(x31) +8000335c: 01838863 beq x7,x24,8000336c +80003360: 1b80246f jal x8,80005518 +80003364: 80003354 .word 0x80003354 +80003368: 8000e1aa .word 0x8000e1aa +8000336c: 004f8f93 addi x31,x31,4 + + mv x23, x31 # switch signature pointer register to avoid conflict with test +80003370: 000f8b93 addi x23,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x843fbe38 +80003374: 0000af83 lw x31,0(x1) +80003378: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xa52daabe +8000337c: 0000af83 lw x31,0(x1) +80003380: 00408093 addi x1,x1,4 + +80003384 : +Zbkb_orn_cg_cmp_rs1_rs2_b31: + orn x26, x31, x31 # perform operation +80003384: 41ffed33 orn x26,x31,x31 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_orn_cg_cmp_rs1_rs2_b31, Zbkb_orn_cg_cmp_rs1_rs2_b31_str) +80003388: 000ba383 lw x7,0(x23) +8000338c: 01a38863 beq x7,x26,8000339c +80003390: 1880246f jal x8,80005518 +80003394: 80003384 .word 0x80003384 +80003398: 8000e1e2 .word 0x8000e1e2 +8000339c: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x82829167 +800033a0: 0000a003 lw x0,0(x1) +800033a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xd0ec05e8 +800033a8: 0000a983 lw x19,0(x1) +800033ac: 00408093 addi x1,x1,4 + +800033b0 : +Zbkb_orn_cg_cmp_rd_rs1_b0: + orn x0, x0, x19 # perform operation +800033b0: 41306033 orn x0,x0,x19 + # Check if x0 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x0, Zbkb_orn_cg_cmp_rd_rs1_b0, Zbkb_orn_cg_cmp_rd_rs1_b0_str) +800033b4: 000ba383 lw x7,0(x23) +800033b8: 00038863 beq x7,x0,800033c8 +800033bc: 15c0246f jal x8,80005518 +800033c0: 800033b0 .word 0x800033b0 +800033c4: 8000e21a .word 0x8000e21a +800033c8: 004b8b93 addi x23,x23,4 + + mv x3, x1 # switch data pointer register to avoid conflict with test +800033cc: 00008193 addi x3,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x759968b0 +800033d0: 0001a083 lw x1,0(x3) +800033d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x55d60e96 +800033d8: 0001af03 lw x30,0(x3) +800033dc: 00418193 addi x3,x3,4 + +800033e0 : +Zbkb_orn_cg_cmp_rd_rs1_b1: + orn x1, x1, x30 # perform operation +800033e0: 41e0e0b3 orn x1,x1,x30 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkb_orn_cg_cmp_rd_rs1_b1, Zbkb_orn_cg_cmp_rd_rs1_b1_str) +800033e4: 000ba383 lw x7,0(x23) +800033e8: 00138863 beq x7,x1,800033f8 +800033ec: 12c0246f jal x8,80005518 +800033f0: 800033e0 .word 0x800033e0 +800033f4: 8000e250 .word 0x8000e250 +800033f8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xfe6f3c50 +800033fc: 0001a103 lw x2,0(x3) +80003400: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x230a3b48 +80003404: 0001af83 lw x31,0(x3) +80003408: 00418193 addi x3,x3,4 + +8000340c : +Zbkb_orn_cg_cmp_rd_rs1_b2: + orn x2, x2, x31 # perform operation +8000340c: 41f16133 orn x2,x2,x31 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_orn_cg_cmp_rd_rs1_b2, Zbkb_orn_cg_cmp_rd_rs1_b2_str) +80003410: 000ba383 lw x7,0(x23) +80003414: 00238863 beq x7,x2,80003424 +80003418: 1000246f jal x8,80005518 +8000341c: 8000340c .word 0x8000340c +80003420: 8000e286 .word 0x8000e286 +80003424: 004b8b93 addi x23,x23,4 + + mv x15, x3 # switch data pointer register to avoid conflict with test +80003428: 00018793 addi x15,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x1f82a6e2 +8000342c: 0007a183 lw x3,0(x15) +80003430: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xd80b8e1c +80003434: 0007a083 lw x1,0(x15) +80003438: 00478793 addi x15,x15,4 + +8000343c : +Zbkb_orn_cg_cmp_rd_rs1_b3: + orn x3, x3, x1 # perform operation +8000343c: 4011e1b3 orn x3,x3,x1 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_orn_cg_cmp_rd_rs1_b3, Zbkb_orn_cg_cmp_rd_rs1_b3_str) +80003440: 000ba383 lw x7,0(x23) +80003444: 00338863 beq x7,x3,80003454 +80003448: 0d00246f jal x8,80005518 +8000344c: 8000343c .word 0x8000343c +80003450: 8000e2bc .word 0x8000e2bc +80003454: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x72c5e216 +80003458: 0007a203 lw x4,0(x15) +8000345c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x01572259 +80003460: 0007ae03 lw x28,0(x15) +80003464: 00478793 addi x15,x15,4 + +80003468 : +Zbkb_orn_cg_cmp_rd_rs1_b4: + orn x4, x4, x28 # perform operation +80003468: 41c26233 orn x4,x4,x28 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_orn_cg_cmp_rd_rs1_b4, Zbkb_orn_cg_cmp_rd_rs1_b4_str) +8000346c: 000ba383 lw x7,0(x23) +80003470: 00438863 beq x7,x4,80003480 +80003474: 0a40246f jal x8,80005518 +80003478: 80003468 .word 0x80003468 +8000347c: 8000e2f2 .word 0x8000e2f2 +80003480: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xb1550a33 +80003484: 0007a283 lw x5,0(x15) +80003488: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x8bfaa20e +8000348c: 0007a503 lw x10,0(x15) +80003490: 00478793 addi x15,x15,4 + +80003494 : +Zbkb_orn_cg_cmp_rd_rs1_b5: + orn x5, x5, x10 # perform operation +80003494: 40a2e2b3 orn x5,x5,x10 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_orn_cg_cmp_rd_rs1_b5, Zbkb_orn_cg_cmp_rd_rs1_b5_str) +80003498: 000ba383 lw x7,0(x23) +8000349c: 00538863 beq x7,x5,800034ac +800034a0: 0780246f jal x8,80005518 +800034a4: 80003494 .word 0x80003494 +800034a8: 8000e328 .word 0x8000e328 +800034ac: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xa9554b01 +800034b0: 0007a303 lw x6,0(x15) +800034b4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0f34a026 +800034b8: 0007ab03 lw x22,0(x15) +800034bc: 00478793 addi x15,x15,4 + +800034c0 : +Zbkb_orn_cg_cmp_rd_rs1_b6: + orn x6, x6, x22 # perform operation +800034c0: 41636333 orn x6,x6,x22 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_orn_cg_cmp_rd_rs1_b6, Zbkb_orn_cg_cmp_rd_rs1_b6_str) +800034c4: 000ba383 lw x7,0(x23) +800034c8: 00638863 beq x7,x6,800034d8 +800034cc: 04c0246f jal x8,80005518 +800034d0: 800034c0 .word 0x800034c0 +800034d4: 8000e35e .word 0x8000e35e +800034d8: 004b8b93 addi x23,x23,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800034dc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800034e0: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x3faf3fb4 +800034e4: 0007a383 lw x7,0(x15) +800034e8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x54fb2ca0 +800034ec: 0007aa83 lw x21,0(x15) +800034f0: 00478793 addi x15,x15,4 + +800034f4 : +Zbkb_orn_cg_cmp_rd_rs1_b7: + orn x7, x7, x21 # perform operation +800034f4: 4153e3b3 orn x7,x7,x21 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs1_b7, Zbkb_orn_cg_cmp_rd_rs1_b7_str) +800034f8: 000ba683 lw x13,0(x23) +800034fc: 00768863 beq x13,x7,8000350c +80003500: 0400276f jal x14,80005540 +80003504: 800034f4 .word 0x800034f4 +80003508: 8000e394 .word 0x8000e394 +8000350c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x3c38c55e +80003510: 0007a403 lw x8,0(x15) +80003514: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x3b24763a +80003518: 0007ad83 lw x27,0(x15) +8000351c: 00478793 addi x15,x15,4 + +80003520 : +Zbkb_orn_cg_cmp_rd_rs1_b8: + orn x8, x8, x27 # perform operation +80003520: 41b46433 orn x8,x8,x27 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs1_b8, Zbkb_orn_cg_cmp_rd_rs1_b8_str) +80003524: 000ba683 lw x13,0(x23) +80003528: 00868863 beq x13,x8,80003538 +8000352c: 0140276f jal x14,80005540 +80003530: 80003520 .word 0x80003520 +80003534: 8000e3ca .word 0x8000e3ca +80003538: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x9f5c7e1e +8000353c: 0007a483 lw x9,0(x15) +80003540: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x65bf6898 +80003544: 0007a803 lw x16,0(x15) +80003548: 00478793 addi x15,x15,4 + +8000354c : +Zbkb_orn_cg_cmp_rd_rs1_b9: + orn x9, x9, x16 # perform operation +8000354c: 4104e4b3 orn x9,x9,x16 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs1_b9, Zbkb_orn_cg_cmp_rd_rs1_b9_str) +80003550: 000ba683 lw x13,0(x23) +80003554: 00968863 beq x13,x9,80003564 +80003558: 7e90176f jal x14,80005540 +8000355c: 8000354c .word 0x8000354c +80003560: 8000e400 .word 0x8000e400 +80003564: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x10eabf50 +80003568: 0007a503 lw x10,0(x15) +8000356c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xa2a58bb4 +80003570: 0007af83 lw x31,0(x15) +80003574: 00478793 addi x15,x15,4 + +80003578 : +Zbkb_orn_cg_cmp_rd_rs1_b10: + orn x10, x10, x31 # perform operation +80003578: 41f56533 orn x10,x10,x31 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs1_b10, Zbkb_orn_cg_cmp_rd_rs1_b10_str) +8000357c: 000ba683 lw x13,0(x23) +80003580: 00a68863 beq x13,x10,80003590 +80003584: 7bd0176f jal x14,80005540 +80003588: 80003578 .word 0x80003578 +8000358c: 8000e436 .word 0x8000e436 +80003590: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x1f966cb8 +80003594: 0007a583 lw x11,0(x15) +80003598: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xea4415a3 +8000359c: 0007a983 lw x19,0(x15) +800035a0: 00478793 addi x15,x15,4 + +800035a4 : +Zbkb_orn_cg_cmp_rd_rs1_b11: + orn x11, x11, x19 # perform operation +800035a4: 4135e5b3 orn x11,x11,x19 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs1_b11, Zbkb_orn_cg_cmp_rd_rs1_b11_str) +800035a8: 000ba683 lw x13,0(x23) +800035ac: 00b68863 beq x13,x11,800035bc +800035b0: 7910176f jal x14,80005540 +800035b4: 800035a4 .word 0x800035a4 +800035b8: 8000e46d .word 0x8000e46d +800035bc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x63b3c461 +800035c0: 0007a603 lw x12,0(x15) +800035c4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x32c9ad83 +800035c8: 0007a403 lw x8,0(x15) +800035cc: 00478793 addi x15,x15,4 + +800035d0 : +Zbkb_orn_cg_cmp_rd_rs1_b12: + orn x12, x12, x8 # perform operation +800035d0: 40866633 orn x12,x12,x8 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs1_b12, Zbkb_orn_cg_cmp_rd_rs1_b12_str) +800035d4: 000ba683 lw x13,0(x23) +800035d8: 00c68863 beq x13,x12,800035e8 +800035dc: 7650176f jal x14,80005540 +800035e0: 800035d0 .word 0x800035d0 +800035e4: 8000e4a4 .word 0x8000e4a4 +800035e8: 004b8b93 addi x23,x23,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035ec: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035f0: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xc8405d41 +800035f4: 0007a683 lw x13,0(x15) +800035f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x8a7f607d +800035fc: 0007ab03 lw x22,0(x15) +80003600: 00478793 addi x15,x15,4 + +80003604 : +Zbkb_orn_cg_cmp_rd_rs1_b13: + orn x13, x13, x22 # perform operation +80003604: 4166e6b3 orn x13,x13,x22 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_orn_cg_cmp_rd_rs1_b13, Zbkb_orn_cg_cmp_rd_rs1_b13_str) +80003608: 000ba383 lw x7,0(x23) +8000360c: 00d38863 beq x7,x13,8000361c +80003610: 7090146f jal x8,80005518 +80003614: 80003604 .word 0x80003604 +80003618: 8000e4db .word 0x8000e4db +8000361c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xa6583090 +80003620: 0007a703 lw x14,0(x15) +80003624: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x3d7cfd48 +80003628: 0007a083 lw x1,0(x15) +8000362c: 00478793 addi x15,x15,4 + +80003630 : +Zbkb_orn_cg_cmp_rd_rs1_b14: + orn x14, x14, x1 # perform operation +80003630: 40176733 orn x14,x14,x1 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_orn_cg_cmp_rd_rs1_b14, Zbkb_orn_cg_cmp_rd_rs1_b14_str) +80003634: 000ba383 lw x7,0(x23) +80003638: 00e38863 beq x7,x14,80003648 +8000363c: 6dd0146f jal x8,80005518 +80003640: 80003630 .word 0x80003630 +80003644: 8000e512 .word 0x8000e512 +80003648: 004b8b93 addi x23,x23,4 + + mv x6, x15 # switch data pointer register to avoid conflict with test +8000364c: 00078313 addi x6,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xac0f50fc +80003650: 00032783 lw x15,0(x6) +80003654: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x9c4c2308 +80003658: 00032203 lw x4,0(x6) +8000365c: 00430313 addi x6,x6,4 + +80003660 : +Zbkb_orn_cg_cmp_rd_rs1_b15: + orn x15, x15, x4 # perform operation +80003660: 4047e7b3 orn x15,x15,x4 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_orn_cg_cmp_rd_rs1_b15, Zbkb_orn_cg_cmp_rd_rs1_b15_str) +80003664: 000ba383 lw x7,0(x23) +80003668: 00f38863 beq x7,x15,80003678 +8000366c: 6ad0146f jal x8,80005518 +80003670: 80003660 .word 0x80003660 +80003674: 8000e549 .word 0x8000e549 +80003678: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x565eae73 +8000367c: 00032803 lw x16,0(x6) +80003680: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8da29830 +80003684: 00032603 lw x12,0(x6) +80003688: 00430313 addi x6,x6,4 + +8000368c : +Zbkb_orn_cg_cmp_rd_rs1_b16: + orn x16, x16, x12 # perform operation +8000368c: 40c86833 orn x16,x16,x12 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_orn_cg_cmp_rd_rs1_b16, Zbkb_orn_cg_cmp_rd_rs1_b16_str) +80003690: 000ba383 lw x7,0(x23) +80003694: 01038863 beq x7,x16,800036a4 +80003698: 6810146f jal x8,80005518 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000e580 .word 0x8000e580 +800036a4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x844d203d +800036a8: 00032883 lw x17,0(x6) +800036ac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x203e0e75 +800036b0: 00032503 lw x10,0(x6) +800036b4: 00430313 addi x6,x6,4 + +800036b8 : +Zbkb_orn_cg_cmp_rd_rs1_b17: + orn x17, x17, x10 # perform operation +800036b8: 40a8e8b3 orn x17,x17,x10 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_orn_cg_cmp_rd_rs1_b17, Zbkb_orn_cg_cmp_rd_rs1_b17_str) +800036bc: 000ba383 lw x7,0(x23) +800036c0: 01138863 beq x7,x17,800036d0 +800036c4: 6550146f jal x8,80005518 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000e5b7 .word 0x8000e5b7 +800036d0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x38611e66 +800036d4: 00032903 lw x18,0(x6) +800036d8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x1599d040 +800036dc: 00032603 lw x12,0(x6) +800036e0: 00430313 addi x6,x6,4 + +800036e4 : +Zbkb_orn_cg_cmp_rd_rs1_b18: + orn x18, x18, x12 # perform operation +800036e4: 40c96933 orn x18,x18,x12 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_orn_cg_cmp_rd_rs1_b18, Zbkb_orn_cg_cmp_rd_rs1_b18_str) +800036e8: 000ba383 lw x7,0(x23) +800036ec: 01238863 beq x7,x18,800036fc +800036f0: 6290146f jal x8,80005518 +800036f4: 800036e4 .word 0x800036e4 +800036f8: 8000e5ee .word 0x8000e5ee +800036fc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xfb22beb1 +80003700: 00032983 lw x19,0(x6) +80003704: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x31b6bfe9 +80003708: 00032183 lw x3,0(x6) +8000370c: 00430313 addi x6,x6,4 + +80003710 : +Zbkb_orn_cg_cmp_rd_rs1_b19: + orn x19, x19, x3 # perform operation +80003710: 4039e9b3 orn x19,x19,x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_orn_cg_cmp_rd_rs1_b19, Zbkb_orn_cg_cmp_rd_rs1_b19_str) +80003714: 000ba383 lw x7,0(x23) +80003718: 01338863 beq x7,x19,80003728 +8000371c: 5fd0146f jal x8,80005518 +80003720: 80003710 .word 0x80003710 +80003724: 8000e625 .word 0x8000e625 +80003728: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xaf058429 +8000372c: 00032a03 lw x20,0(x6) +80003730: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x223a1fc1 +80003734: 00032f83 lw x31,0(x6) +80003738: 00430313 addi x6,x6,4 + +8000373c : +Zbkb_orn_cg_cmp_rd_rs1_b20: + orn x20, x20, x31 # perform operation +8000373c: 41fa6a33 orn x20,x20,x31 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_orn_cg_cmp_rd_rs1_b20, Zbkb_orn_cg_cmp_rd_rs1_b20_str) +80003740: 000ba383 lw x7,0(x23) +80003744: 01438863 beq x7,x20,80003754 +80003748: 5d10146f jal x8,80005518 +8000374c: 8000373c .word 0x8000373c +80003750: 8000e65c .word 0x8000e65c +80003754: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x358eddc4 +80003758: 00032a83 lw x21,0(x6) +8000375c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xf25b1458 +80003760: 00032d83 lw x27,0(x6) +80003764: 00430313 addi x6,x6,4 + +80003768 : +Zbkb_orn_cg_cmp_rd_rs1_b21: + orn x21, x21, x27 # perform operation +80003768: 41baeab3 orn x21,x21,x27 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_orn_cg_cmp_rd_rs1_b21, Zbkb_orn_cg_cmp_rd_rs1_b21_str) +8000376c: 000ba383 lw x7,0(x23) +80003770: 01538863 beq x7,x21,80003780 +80003774: 5a50146f jal x8,80005518 +80003778: 80003768 .word 0x80003768 +8000377c: 8000e693 .word 0x8000e693 +80003780: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xc91ecca6 +80003784: 00032b03 lw x22,0(x6) +80003788: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x4450dbd2 +8000378c: 00032283 lw x5,0(x6) +80003790: 00430313 addi x6,x6,4 + +80003794 : +Zbkb_orn_cg_cmp_rd_rs1_b22: + orn x22, x22, x5 # perform operation +80003794: 405b6b33 orn x22,x22,x5 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zbkb_orn_cg_cmp_rd_rs1_b22, Zbkb_orn_cg_cmp_rd_rs1_b22_str) +80003798: 000ba383 lw x7,0(x23) +8000379c: 01638863 beq x7,x22,800037ac +800037a0: 5790146f jal x8,80005518 +800037a4: 80003794 .word 0x80003794 +800037a8: 8000e6ca .word 0x8000e6ca +800037ac: 004b8b93 addi x23,x23,4 + + mv x26, x23 # switch signature pointer register to avoid conflict with test +800037b0: 000b8d13 addi x26,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x1d18797f +800037b4: 00032b83 lw x23,0(x6) +800037b8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xf16df42a +800037bc: 00032103 lw x2,0(x6) +800037c0: 00430313 addi x6,x6,4 + +800037c4 : +Zbkb_orn_cg_cmp_rd_rs1_b23: + orn x23, x23, x2 # perform operation +800037c4: 402bebb3 orn x23,x23,x2 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zbkb_orn_cg_cmp_rd_rs1_b23, Zbkb_orn_cg_cmp_rd_rs1_b23_str) +800037c8: 000d2383 lw x7,0(x26) +800037cc: 01738863 beq x7,x23,800037dc +800037d0: 5490146f jal x8,80005518 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000e701 .word 0x8000e701 +800037dc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xb0dfd416 +800037e0: 00032c03 lw x24,0(x6) +800037e4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x3e6bdbae +800037e8: 00032203 lw x4,0(x6) +800037ec: 00430313 addi x6,x6,4 + +800037f0 : +Zbkb_orn_cg_cmp_rd_rs1_b24: + orn x24, x24, x4 # perform operation +800037f0: 404c6c33 orn x24,x24,x4 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zbkb_orn_cg_cmp_rd_rs1_b24, Zbkb_orn_cg_cmp_rd_rs1_b24_str) +800037f4: 000d2383 lw x7,0(x26) +800037f8: 01838863 beq x7,x24,80003808 +800037fc: 51d0146f jal x8,80005518 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000e738 .word 0x8000e738 +80003808: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xd92f0041 +8000380c: 00032c83 lw x25,0(x6) +80003810: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x3826522e +80003814: 00032c03 lw x24,0(x6) +80003818: 00430313 addi x6,x6,4 + +8000381c : +Zbkb_orn_cg_cmp_rd_rs1_b25: + orn x25, x25, x24 # perform operation +8000381c: 418cecb3 orn x25,x25,x24 + # Check if x25 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x25, Zbkb_orn_cg_cmp_rd_rs1_b25, Zbkb_orn_cg_cmp_rd_rs1_b25_str) +80003820: 000d2383 lw x7,0(x26) +80003824: 01938863 beq x7,x25,80003834 +80003828: 4f10146f jal x8,80005518 +8000382c: 8000381c .word 0x8000381c +80003830: 8000e76f .word 0x8000e76f +80003834: 004d0d13 addi x26,x26,4 + + mv x28, x26 # switch signature pointer register to avoid conflict with test +80003838: 000d0e13 addi x28,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x8fe76b00 +8000383c: 00032d03 lw x26,0(x6) +80003840: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xe843df80 +80003844: 00032c83 lw x25,0(x6) +80003848: 00430313 addi x6,x6,4 + +8000384c : +Zbkb_orn_cg_cmp_rd_rs1_b26: + orn x26, x26, x25 # perform operation +8000384c: 419d6d33 orn x26,x26,x25 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkb_orn_cg_cmp_rd_rs1_b26, Zbkb_orn_cg_cmp_rd_rs1_b26_str) +80003850: 000e2383 lw x7,0(x28) +80003854: 01a38863 beq x7,x26,80003864 +80003858: 4c10146f jal x8,80005518 +8000385c: 8000384c .word 0x8000384c +80003860: 8000e7a6 .word 0x8000e7a6 +80003864: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x4049dce6 +80003868: 00032d83 lw x27,0(x6) +8000386c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x03ef8af9 +80003870: 00032083 lw x1,0(x6) +80003874: 00430313 addi x6,x6,4 + +80003878 : +Zbkb_orn_cg_cmp_rd_rs1_b27: + orn x27, x27, x1 # perform operation +80003878: 401dedb3 orn x27,x27,x1 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zbkb_orn_cg_cmp_rd_rs1_b27, Zbkb_orn_cg_cmp_rd_rs1_b27_str) +8000387c: 000e2383 lw x7,0(x28) +80003880: 01b38863 beq x7,x27,80003890 +80003884: 4950146f jal x8,80005518 +80003888: 80003878 .word 0x80003878 +8000388c: 8000e7dd .word 0x8000e7dd +80003890: 004e0e13 addi x28,x28,4 + + mv x31, x28 # switch signature pointer register to avoid conflict with test +80003894: 000e0f93 addi x31,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6eb300bf +80003898: 00032e03 lw x28,0(x6) +8000389c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xa9aa6133 +800038a0: 00032603 lw x12,0(x6) +800038a4: 00430313 addi x6,x6,4 + +800038a8 : +Zbkb_orn_cg_cmp_rd_rs1_b28: + orn x28, x28, x12 # perform operation +800038a8: 40ce6e33 orn x28,x28,x12 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_orn_cg_cmp_rd_rs1_b28, Zbkb_orn_cg_cmp_rd_rs1_b28_str) +800038ac: 000fa383 lw x7,0(x31) +800038b0: 01c38863 beq x7,x28,800038c0 +800038b4: 4650146f jal x8,80005518 +800038b8: 800038a8 .word 0x800038a8 +800038bc: 8000e814 .word 0x8000e814 +800038c0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xa6f24808 +800038c4: 00032e83 lw x29,0(x6) +800038c8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x681cb114 +800038cc: 00032c83 lw x25,0(x6) +800038d0: 00430313 addi x6,x6,4 + +800038d4 : +Zbkb_orn_cg_cmp_rd_rs1_b29: + orn x29, x29, x25 # perform operation +800038d4: 419eeeb3 orn x29,x29,x25 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkb_orn_cg_cmp_rd_rs1_b29, Zbkb_orn_cg_cmp_rd_rs1_b29_str) +800038d8: 000fa383 lw x7,0(x31) +800038dc: 01d38863 beq x7,x29,800038ec +800038e0: 4390146f jal x8,80005518 +800038e4: 800038d4 .word 0x800038d4 +800038e8: 8000e84b .word 0x8000e84b +800038ec: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x4d31cf0d +800038f0: 00032f03 lw x30,0(x6) +800038f4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0xf721541b +800038f8: 00032203 lw x4,0(x6) +800038fc: 00430313 addi x6,x6,4 + +80003900 : +Zbkb_orn_cg_cmp_rd_rs1_b30: + orn x30, x30, x4 # perform operation +80003900: 404f6f33 orn x30,x30,x4 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkb_orn_cg_cmp_rd_rs1_b30, Zbkb_orn_cg_cmp_rd_rs1_b30_str) +80003904: 000fa383 lw x7,0(x31) +80003908: 01e38863 beq x7,x30,80003918 +8000390c: 40d0146f jal x8,80005518 +80003910: 80003900 .word 0x80003900 +80003914: 8000e882 .word 0x8000e882 +80003918: 004f8f93 addi x31,x31,4 + + mv x20, x31 # switch signature pointer register to avoid conflict with test +8000391c: 000f8a13 addi x20,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x775b0c61 +80003920: 00032f83 lw x31,0(x6) +80003924: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x1d02bac1 +80003928: 00032083 lw x1,0(x6) +8000392c: 00430313 addi x6,x6,4 + +80003930 : +Zbkb_orn_cg_cmp_rd_rs1_b31: + orn x31, x31, x1 # perform operation +80003930: 401fefb3 orn x31,x31,x1 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zbkb_orn_cg_cmp_rd_rs1_b31, Zbkb_orn_cg_cmp_rd_rs1_b31_str) +80003934: 000a2383 lw x7,0(x20) +80003938: 01f38863 beq x7,x31,80003948 +8000393c: 3dd0146f jal x8,80005518 +80003940: 80003930 .word 0x80003930 +80003944: 8000e8b9 .word 0x8000e8b9 +80003948: 004a0a13 addi x20,x20,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xd2b452cc +8000394c: 00032c03 lw x24,0(x6) +80003950: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x23e7d8fe +80003954: 00032003 lw x0,0(x6) +80003958: 00430313 addi x6,x6,4 + +8000395c : +Zbkb_orn_cg_cmp_rd_rs2_b0: + orn x0, x24, x0 # perform operation +8000395c: 400c6033 orn x0,x24,x0 + # Check if x0 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x0, Zbkb_orn_cg_cmp_rd_rs2_b0, Zbkb_orn_cg_cmp_rd_rs2_b0_str) +80003960: 000a2383 lw x7,0(x20) +80003964: 00038863 beq x7,x0,80003974 +80003968: 3b10146f jal x8,80005518 +8000396c: 8000395c .word 0x8000395c +80003970: 8000e8f0 .word 0x8000e8f0 +80003974: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xc6dcd479 +80003978: 00032b83 lw x23,0(x6) +8000397c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xa36e147b +80003980: 00032083 lw x1,0(x6) +80003984: 00430313 addi x6,x6,4 + +80003988 : +Zbkb_orn_cg_cmp_rd_rs2_b1: + orn x1, x23, x1 # perform operation +80003988: 401be0b3 orn x1,x23,x1 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zbkb_orn_cg_cmp_rd_rs2_b1, Zbkb_orn_cg_cmp_rd_rs2_b1_str) +8000398c: 000a2383 lw x7,0(x20) +80003990: 00138863 beq x7,x1,800039a0 +80003994: 3850146f jal x8,80005518 +80003998: 80003988 .word 0x80003988 +8000399c: 8000e926 .word 0x8000e926 +800039a0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x11f67211 +800039a4: 00032a83 lw x21,0(x6) +800039a8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x38e5808f +800039ac: 00032103 lw x2,0(x6) +800039b0: 00430313 addi x6,x6,4 + +800039b4 : +Zbkb_orn_cg_cmp_rd_rs2_b2: + orn x2, x21, x2 # perform operation +800039b4: 402ae133 orn x2,x21,x2 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_orn_cg_cmp_rd_rs2_b2, Zbkb_orn_cg_cmp_rd_rs2_b2_str) +800039b8: 000a2383 lw x7,0(x20) +800039bc: 00238863 beq x7,x2,800039cc +800039c0: 3590146f jal x8,80005518 +800039c4: 800039b4 .word 0x800039b4 +800039c8: 8000e95c .word 0x8000e95c +800039cc: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x52c1b7e1 +800039d0: 00032f83 lw x31,0(x6) +800039d4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x2ee6ce0d +800039d8: 00032183 lw x3,0(x6) +800039dc: 00430313 addi x6,x6,4 + +800039e0 : +Zbkb_orn_cg_cmp_rd_rs2_b3: + orn x3, x31, x3 # perform operation +800039e0: 403fe1b3 orn x3,x31,x3 + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zbkb_orn_cg_cmp_rd_rs2_b3, Zbkb_orn_cg_cmp_rd_rs2_b3_str) +800039e4: 000a2383 lw x7,0(x20) +800039e8: 00338863 beq x7,x3,800039f8 +800039ec: 32d0146f jal x8,80005518 +800039f0: 800039e0 .word 0x800039e0 +800039f4: 8000e992 .word 0x8000e992 +800039f8: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xf1a4fce7 +800039fc: 00032e03 lw x28,0(x6) +80003a00: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x1af30386 +80003a04: 00032203 lw x4,0(x6) +80003a08: 00430313 addi x6,x6,4 + +80003a0c : +Zbkb_orn_cg_cmp_rd_rs2_b4: + orn x4, x28, x4 # perform operation +80003a0c: 404e6233 orn x4,x28,x4 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zbkb_orn_cg_cmp_rd_rs2_b4, Zbkb_orn_cg_cmp_rd_rs2_b4_str) +80003a10: 000a2383 lw x7,0(x20) +80003a14: 00438863 beq x7,x4,80003a24 +80003a18: 3010146f jal x8,80005518 +80003a1c: 80003a0c .word 0x80003a0c +80003a20: 8000e9c8 .word 0x8000e9c8 +80003a24: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x7775dda2 +80003a28: 00032e83 lw x29,0(x6) +80003a2c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x05c3fa70 +80003a30: 00032283 lw x5,0(x6) +80003a34: 00430313 addi x6,x6,4 + +80003a38 : +Zbkb_orn_cg_cmp_rd_rs2_b5: + orn x5, x29, x5 # perform operation +80003a38: 405ee2b3 orn x5,x29,x5 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zbkb_orn_cg_cmp_rd_rs2_b5, Zbkb_orn_cg_cmp_rd_rs2_b5_str) +80003a3c: 000a2383 lw x7,0(x20) +80003a40: 00538863 beq x7,x5,80003a50 +80003a44: 2d50146f jal x8,80005518 +80003a48: 80003a38 .word 0x80003a38 +80003a4c: 8000e9fe .word 0x8000e9fe +80003a50: 004a0a13 addi x20,x20,4 + + mv x19, x6 # switch data pointer register to avoid conflict with test +80003a54: 00030993 addi x19,x6,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xb4079958 +80003a58: 0009a203 lw x4,0(x19) +80003a5c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0xad4e2d8e +80003a60: 0009a303 lw x6,0(x19) +80003a64: 00498993 addi x19,x19,4 + +80003a68 : +Zbkb_orn_cg_cmp_rd_rs2_b6: + orn x6, x4, x6 # perform operation +80003a68: 40626333 orn x6,x4,x6 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkb_orn_cg_cmp_rd_rs2_b6, Zbkb_orn_cg_cmp_rd_rs2_b6_str) +80003a6c: 000a2383 lw x7,0(x20) +80003a70: 00638863 beq x7,x6,80003a80 +80003a74: 2a50146f jal x8,80005518 +80003a78: 80003a68 .word 0x80003a68 +80003a7c: 8000ea34 .word 0x8000ea34 +80003a80: 004a0a13 addi x20,x20,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a84: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a88: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x5ddb429d +80003a8c: 0009a203 lw x4,0(x19) +80003a90: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0x47ab43b4 +80003a94: 0009a383 lw x7,0(x19) +80003a98: 00498993 addi x19,x19,4 + +80003a9c : +Zbkb_orn_cg_cmp_rd_rs2_b7: + orn x7, x4, x7 # perform operation +80003a9c: 407263b3 orn x7,x4,x7 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs2_b7, Zbkb_orn_cg_cmp_rd_rs2_b7_str) +80003aa0: 000a2683 lw x13,0(x20) +80003aa4: 00768863 beq x13,x7,80003ab4 +80003aa8: 2990176f jal x14,80005540 +80003aac: 80003a9c .word 0x80003a9c +80003ab0: 8000ea6a .word 0x8000ea6a +80003ab4: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x9bdab533 +80003ab8: 0009a303 lw x6,0(x19) +80003abc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x3ca086fb +80003ac0: 0009a403 lw x8,0(x19) +80003ac4: 00498993 addi x19,x19,4 + +80003ac8 : +Zbkb_orn_cg_cmp_rd_rs2_b8: + orn x8, x6, x8 # perform operation +80003ac8: 40836433 orn x8,x6,x8 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs2_b8, Zbkb_orn_cg_cmp_rd_rs2_b8_str) +80003acc: 000a2683 lw x13,0(x20) +80003ad0: 00868863 beq x13,x8,80003ae0 +80003ad4: 26d0176f jal x14,80005540 +80003ad8: 80003ac8 .word 0x80003ac8 +80003adc: 8000eaa0 .word 0x8000eaa0 +80003ae0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xe46dbe42 +80003ae4: 0009af03 lw x30,0(x19) +80003ae8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x8ea18d08 +80003aec: 0009a483 lw x9,0(x19) +80003af0: 00498993 addi x19,x19,4 + +80003af4 : +Zbkb_orn_cg_cmp_rd_rs2_b9: + orn x9, x30, x9 # perform operation +80003af4: 409f64b3 orn x9,x30,x9 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs2_b9, Zbkb_orn_cg_cmp_rd_rs2_b9_str) +80003af8: 000a2683 lw x13,0(x20) +80003afc: 00968863 beq x13,x9,80003b0c +80003b00: 2410176f jal x14,80005540 +80003b04: 80003af4 .word 0x80003af4 +80003b08: 8000ead6 .word 0x8000ead6 +80003b0c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x18436a76 +80003b10: 0009ad03 lw x26,0(x19) +80003b14: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x99d83594 +80003b18: 0009a503 lw x10,0(x19) +80003b1c: 00498993 addi x19,x19,4 + +80003b20 : +Zbkb_orn_cg_cmp_rd_rs2_b10: + orn x10, x26, x10 # perform operation +80003b20: 40ad6533 orn x10,x26,x10 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs2_b10, Zbkb_orn_cg_cmp_rd_rs2_b10_str) +80003b24: 000a2683 lw x13,0(x20) +80003b28: 00a68863 beq x13,x10,80003b38 +80003b2c: 2150176f jal x14,80005540 +80003b30: 80003b20 .word 0x80003b20 +80003b34: 8000eb0c .word 0x8000eb0c +80003b38: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xe5373a49 +80003b3c: 0009a303 lw x6,0(x19) +80003b40: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x81b3d492 +80003b44: 0009a583 lw x11,0(x19) +80003b48: 00498993 addi x19,x19,4 + +80003b4c : +Zbkb_orn_cg_cmp_rd_rs2_b11: + orn x11, x6, x11 # perform operation +80003b4c: 40b365b3 orn x11,x6,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs2_b11, Zbkb_orn_cg_cmp_rd_rs2_b11_str) +80003b50: 000a2683 lw x13,0(x20) +80003b54: 00b68863 beq x13,x11,80003b64 +80003b58: 1e90176f jal x14,80005540 +80003b5c: 80003b4c .word 0x80003b4c +80003b60: 8000eb43 .word 0x8000eb43 +80003b64: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x1321c867 +80003b68: 0009af83 lw x31,0(x19) +80003b6c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x0239928d +80003b70: 0009a603 lw x12,0(x19) +80003b74: 00498993 addi x19,x19,4 + +80003b78 : +Zbkb_orn_cg_cmp_rd_rs2_b12: + orn x12, x31, x12 # perform operation +80003b78: 40cfe633 orn x12,x31,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs2_b12, Zbkb_orn_cg_cmp_rd_rs2_b12_str) +80003b7c: 000a2683 lw x13,0(x20) +80003b80: 00c68863 beq x13,x12,80003b90 +80003b84: 1bd0176f jal x14,80005540 +80003b88: 80003b78 .word 0x80003b78 +80003b8c: 8000eb7a .word 0x8000eb7a +80003b90: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003b94: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003b98: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x6d31a54e +80003b9c: 0009ac03 lw x24,0(x19) +80003ba0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x4edbf125 +80003ba4: 0009a683 lw x13,0(x19) +80003ba8: 00498993 addi x19,x19,4 + +80003bac : +Zbkb_orn_cg_cmp_rd_rs2_b13: + orn x13, x24, x13 # perform operation +80003bac: 40dc66b3 orn x13,x24,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkb_orn_cg_cmp_rd_rs2_b13, Zbkb_orn_cg_cmp_rd_rs2_b13_str) +80003bb0: 000a2203 lw x4,0(x20) +80003bb4: 00d20863 beq x4,x13,80003bc4 +80003bb8: 149012ef jal x5,80005500 +80003bbc: 80003bac .word 0x80003bac +80003bc0: 8000ebb1 .word 0x8000ebb1 +80003bc4: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0xe919b4d3 +80003bc8: 0009a103 lw x2,0(x19) +80003bcc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x458838c0 +80003bd0: 0009a703 lw x14,0(x19) +80003bd4: 00498993 addi x19,x19,4 + +80003bd8 : +Zbkb_orn_cg_cmp_rd_rs2_b14: + orn x14, x2, x14 # perform operation +80003bd8: 40e16733 orn x14,x2,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkb_orn_cg_cmp_rd_rs2_b14, Zbkb_orn_cg_cmp_rd_rs2_b14_str) +80003bdc: 000a2203 lw x4,0(x20) +80003be0: 00e20863 beq x4,x14,80003bf0 +80003be4: 11d012ef jal x5,80005500 +80003be8: 80003bd8 .word 0x80003bd8 +80003bec: 8000ebe8 .word 0x8000ebe8 +80003bf0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xec7d712a +80003bf4: 0009a583 lw x11,0(x19) +80003bf8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x84ed9f80 +80003bfc: 0009a783 lw x15,0(x19) +80003c00: 00498993 addi x19,x19,4 + +80003c04 : +Zbkb_orn_cg_cmp_rd_rs2_b15: + orn x15, x11, x15 # perform operation +80003c04: 40f5e7b3 orn x15,x11,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkb_orn_cg_cmp_rd_rs2_b15, Zbkb_orn_cg_cmp_rd_rs2_b15_str) +80003c08: 000a2203 lw x4,0(x20) +80003c0c: 00f20863 beq x4,x15,80003c1c +80003c10: 0f1012ef jal x5,80005500 +80003c14: 80003c04 .word 0x80003c04 +80003c18: 8000ec1f .word 0x8000ec1f +80003c1c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xd96c9e08 +80003c20: 0009a783 lw x15,0(x19) +80003c24: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x126c3b30 +80003c28: 0009a803 lw x16,0(x19) +80003c2c: 00498993 addi x19,x19,4 + +80003c30 : +Zbkb_orn_cg_cmp_rd_rs2_b16: + orn x16, x15, x16 # perform operation +80003c30: 4107e833 orn x16,x15,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkb_orn_cg_cmp_rd_rs2_b16, Zbkb_orn_cg_cmp_rd_rs2_b16_str) +80003c34: 000a2203 lw x4,0(x20) +80003c38: 01020863 beq x4,x16,80003c48 +80003c3c: 0c5012ef jal x5,80005500 +80003c40: 80003c30 .word 0x80003c30 +80003c44: 8000ec56 .word 0x8000ec56 +80003c48: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x52de9dc8 +80003c4c: 0009a083 lw x1,0(x19) +80003c50: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xbc042a7d +80003c54: 0009a883 lw x17,0(x19) +80003c58: 00498993 addi x19,x19,4 + +80003c5c : +Zbkb_orn_cg_cmp_rd_rs2_b17: + orn x17, x1, x17 # perform operation +80003c5c: 4110e8b3 orn x17,x1,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkb_orn_cg_cmp_rd_rs2_b17, Zbkb_orn_cg_cmp_rd_rs2_b17_str) +80003c60: 000a2203 lw x4,0(x20) +80003c64: 01120863 beq x4,x17,80003c74 +80003c68: 099012ef jal x5,80005500 +80003c6c: 80003c5c .word 0x80003c5c +80003c70: 8000ec8d .word 0x8000ec8d +80003c74: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x750d1e81 +80003c78: 0009af83 lw x31,0(x19) +80003c7c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x9bc51669 +80003c80: 0009a903 lw x18,0(x19) +80003c84: 00498993 addi x19,x19,4 + +80003c88 : +Zbkb_orn_cg_cmp_rd_rs2_b18: + orn x18, x31, x18 # perform operation +80003c88: 412fe933 orn x18,x31,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkb_orn_cg_cmp_rd_rs2_b18, Zbkb_orn_cg_cmp_rd_rs2_b18_str) +80003c8c: 000a2203 lw x4,0(x20) +80003c90: 01220863 beq x4,x18,80003ca0 +80003c94: 06d012ef jal x5,80005500 +80003c98: 80003c88 .word 0x80003c88 +80003c9c: 8000ecc4 .word 0x8000ecc4 +80003ca0: 004a0a13 addi x20,x20,4 + + mv x16, x19 # switch data pointer register to avoid conflict with test +80003ca4: 00098813 addi x16,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x24680e0c +80003ca8: 00082883 lw x17,0(x16) +80003cac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x97bff80c +80003cb0: 00082983 lw x19,0(x16) +80003cb4: 00480813 addi x16,x16,4 + +80003cb8 : +Zbkb_orn_cg_cmp_rd_rs2_b19: + orn x19, x17, x19 # perform operation +80003cb8: 4138e9b3 orn x19,x17,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zbkb_orn_cg_cmp_rd_rs2_b19, Zbkb_orn_cg_cmp_rd_rs2_b19_str) +80003cbc: 000a2203 lw x4,0(x20) +80003cc0: 01320863 beq x4,x19,80003cd0 +80003cc4: 03d012ef jal x5,80005500 +80003cc8: 80003cb8 .word 0x80003cb8 +80003ccc: 8000ecfb .word 0x8000ecfb +80003cd0: 004a0a13 addi x20,x20,4 + + mv x18, x20 # switch signature pointer register to avoid conflict with test +80003cd4: 000a0913 addi x18,x20,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x9616975e +80003cd8: 00082f03 lw x30,0(x16) +80003cdc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0xcd211a7e +80003ce0: 00082a03 lw x20,0(x16) +80003ce4: 00480813 addi x16,x16,4 + +80003ce8 : +Zbkb_orn_cg_cmp_rd_rs2_b20: + orn x20, x30, x20 # perform operation +80003ce8: 414f6a33 orn x20,x30,x20 + # Check if x20 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x20, Zbkb_orn_cg_cmp_rd_rs2_b20, Zbkb_orn_cg_cmp_rd_rs2_b20_str) +80003cec: 00092203 lw x4,0(x18) +80003cf0: 01420863 beq x4,x20,80003d00 +80003cf4: 00d012ef jal x5,80005500 +80003cf8: 80003ce8 .word 0x80003ce8 +80003cfc: 8000ed32 .word 0x8000ed32 +80003d00: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xb51a2436 +80003d04: 00082e03 lw x28,0(x16) +80003d08: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x66e6b04e +80003d0c: 00082a83 lw x21,0(x16) +80003d10: 00480813 addi x16,x16,4 + +80003d14 : +Zbkb_orn_cg_cmp_rd_rs2_b21: + orn x21, x28, x21 # perform operation +80003d14: 415e6ab3 orn x21,x28,x21 + # Check if x21 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x21, Zbkb_orn_cg_cmp_rd_rs2_b21, Zbkb_orn_cg_cmp_rd_rs2_b21_str) +80003d18: 00092203 lw x4,0(x18) +80003d1c: 01520863 beq x4,x21,80003d2c +80003d20: 7e0012ef jal x5,80005500 +80003d24: 80003d14 .word 0x80003d14 +80003d28: 8000ed69 .word 0x8000ed69 +80003d2c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xd4ac44b5 +80003d30: 00082e83 lw x29,0(x16) +80003d34: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xfbf22414 +80003d38: 00082b03 lw x22,0(x16) +80003d3c: 00480813 addi x16,x16,4 + +80003d40 : +Zbkb_orn_cg_cmp_rd_rs2_b22: + orn x22, x29, x22 # perform operation +80003d40: 416eeb33 orn x22,x29,x22 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zbkb_orn_cg_cmp_rd_rs2_b22, Zbkb_orn_cg_cmp_rd_rs2_b22_str) +80003d44: 00092203 lw x4,0(x18) +80003d48: 01620863 beq x4,x22,80003d58 +80003d4c: 7b4012ef jal x5,80005500 +80003d50: 80003d40 .word 0x80003d40 +80003d54: 8000eda0 .word 0x8000eda0 +80003d58: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xcf6a3492 +80003d5c: 00082483 lw x9,0(x16) +80003d60: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x22400a1a +80003d64: 00082b83 lw x23,0(x16) +80003d68: 00480813 addi x16,x16,4 + +80003d6c : +Zbkb_orn_cg_cmp_rd_rs2_b23: + orn x23, x9, x23 # perform operation +80003d6c: 4174ebb3 orn x23,x9,x23 + # Check if x23 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x23, Zbkb_orn_cg_cmp_rd_rs2_b23, Zbkb_orn_cg_cmp_rd_rs2_b23_str) +80003d70: 00092203 lw x4,0(x18) +80003d74: 01720863 beq x4,x23,80003d84 +80003d78: 788012ef jal x5,80005500 +80003d7c: 80003d6c .word 0x80003d6c +80003d80: 8000edd7 .word 0x8000edd7 +80003d84: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x9afb73b9 +80003d88: 00082383 lw x7,0(x16) +80003d8c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x43897d91 +80003d90: 00082c03 lw x24,0(x16) +80003d94: 00480813 addi x16,x16,4 + +80003d98 : +Zbkb_orn_cg_cmp_rd_rs2_b24: + orn x24, x7, x24 # perform operation +80003d98: 4183ec33 orn x24,x7,x24 + # Check if x24 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x24, Zbkb_orn_cg_cmp_rd_rs2_b24, Zbkb_orn_cg_cmp_rd_rs2_b24_str) +80003d9c: 00092203 lw x4,0(x18) +80003da0: 01820863 beq x4,x24,80003db0 +80003da4: 75c012ef jal x5,80005500 +80003da8: 80003d98 .word 0x80003d98 +80003dac: 8000ee0e .word 0x8000ee0e +80003db0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x53a774bb +80003db4: 00082003 lw x0,0(x16) +80003db8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x675a7e91 +80003dbc: 00082c83 lw x25,0(x16) +80003dc0: 00480813 addi x16,x16,4 + +80003dc4 : +Zbkb_orn_cg_cmp_rd_rs2_b25: + orn x25, x0, x25 # perform operation +80003dc4: 41906cb3 orn x25,x0,x25 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zbkb_orn_cg_cmp_rd_rs2_b25, Zbkb_orn_cg_cmp_rd_rs2_b25_str) +80003dc8: 00092203 lw x4,0(x18) +80003dcc: 01920863 beq x4,x25,80003ddc +80003dd0: 730012ef jal x5,80005500 +80003dd4: 80003dc4 .word 0x80003dc4 +80003dd8: 8000ee45 .word 0x8000ee45 +80003ddc: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x3e327c80 +80003de0: 00082083 lw x1,0(x16) +80003de4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xfb5ad3c4 +80003de8: 00082d03 lw x26,0(x16) +80003dec: 00480813 addi x16,x16,4 + +80003df0 : +Zbkb_orn_cg_cmp_rd_rs2_b26: + orn x26, x1, x26 # perform operation +80003df0: 41a0ed33 orn x26,x1,x26 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zbkb_orn_cg_cmp_rd_rs2_b26, Zbkb_orn_cg_cmp_rd_rs2_b26_str) +80003df4: 00092203 lw x4,0(x18) +80003df8: 01a20863 beq x4,x26,80003e08 +80003dfc: 704012ef jal x5,80005500 +80003e00: 80003df0 .word 0x80003df0 +80003e04: 8000ee7c .word 0x8000ee7c +80003e08: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xebb33d85 +80003e0c: 00082303 lw x6,0(x16) +80003e10: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x4f0a7fbc +80003e14: 00082d83 lw x27,0(x16) +80003e18: 00480813 addi x16,x16,4 + +80003e1c : +Zbkb_orn_cg_cmp_rd_rs2_b27: + orn x27, x6, x27 # perform operation +80003e1c: 41b36db3 orn x27,x6,x27 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zbkb_orn_cg_cmp_rd_rs2_b27, Zbkb_orn_cg_cmp_rd_rs2_b27_str) +80003e20: 00092203 lw x4,0(x18) +80003e24: 01b20863 beq x4,x27,80003e34 +80003e28: 6d8012ef jal x5,80005500 +80003e2c: 80003e1c .word 0x80003e1c +80003e30: 8000eeb3 .word 0x8000eeb3 +80003e34: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xfddc6b32 +80003e38: 00082f83 lw x31,0(x16) +80003e3c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xc70de4f0 +80003e40: 00082e03 lw x28,0(x16) +80003e44: 00480813 addi x16,x16,4 + +80003e48 : +Zbkb_orn_cg_cmp_rd_rs2_b28: + orn x28, x31, x28 # perform operation +80003e48: 41cfee33 orn x28,x31,x28 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zbkb_orn_cg_cmp_rd_rs2_b28, Zbkb_orn_cg_cmp_rd_rs2_b28_str) +80003e4c: 00092203 lw x4,0(x18) +80003e50: 01c20863 beq x4,x28,80003e60 +80003e54: 6ac012ef jal x5,80005500 +80003e58: 80003e48 .word 0x80003e48 +80003e5c: 8000eeea .word 0x8000eeea +80003e60: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x204e158c +80003e64: 00082603 lw x12,0(x16) +80003e68: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x66938da1 +80003e6c: 00082e83 lw x29,0(x16) +80003e70: 00480813 addi x16,x16,4 + +80003e74 : +Zbkb_orn_cg_cmp_rd_rs2_b29: + orn x29, x12, x29 # perform operation +80003e74: 41d66eb3 orn x29,x12,x29 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zbkb_orn_cg_cmp_rd_rs2_b29, Zbkb_orn_cg_cmp_rd_rs2_b29_str) +80003e78: 00092203 lw x4,0(x18) +80003e7c: 01d20863 beq x4,x29,80003e8c +80003e80: 680012ef jal x5,80005500 +80003e84: 80003e74 .word 0x80003e74 +80003e88: 8000ef21 .word 0x8000ef21 +80003e8c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x44f08b63 +80003e90: 00082483 lw x9,0(x16) +80003e94: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xf691145a +80003e98: 00082f03 lw x30,0(x16) +80003e9c: 00480813 addi x16,x16,4 + +80003ea0 : +Zbkb_orn_cg_cmp_rd_rs2_b30: + orn x30, x9, x30 # perform operation +80003ea0: 41e4ef33 orn x30,x9,x30 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zbkb_orn_cg_cmp_rd_rs2_b30, Zbkb_orn_cg_cmp_rd_rs2_b30_str) +80003ea4: 00092203 lw x4,0(x18) +80003ea8: 01e20863 beq x4,x30,80003eb8 +80003eac: 654012ef jal x5,80005500 +80003eb0: 80003ea0 .word 0x80003ea0 +80003eb4: 8000ef58 .word 0x8000ef58 +80003eb8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x429fe778 +80003ebc: 00082d03 lw x26,0(x16) +80003ec0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x71ab4827 +80003ec4: 00082f83 lw x31,0(x16) +80003ec8: 00480813 addi x16,x16,4 + +80003ecc : +Zbkb_orn_cg_cmp_rd_rs2_b31: + orn x31, x26, x31 # perform operation +80003ecc: 41fd6fb3 orn x31,x26,x31 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_orn_cg_cmp_rd_rs2_b31, Zbkb_orn_cg_cmp_rd_rs2_b31_str) +80003ed0: 00092203 lw x4,0(x18) +80003ed4: 01f20863 beq x4,x31,80003ee4 +80003ed8: 628012ef jal x5,80005500 +80003edc: 80003ecc .word 0x80003ecc +80003ee0: 8000ef8f .word 0x8000ef8f +80003ee4: 00490913 addi x18,x18,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0xc6fa9ed3 +80003ee8: 00082003 lw x0,0(x16) +80003eec: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x200d981f +80003ef0: 00082003 lw x0,0(x16) +80003ef4: 00480813 addi x16,x16,4 + +80003ef8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b0: + orn x0, x0, x0 # perform operation +80003ef8: 40006033 orn x0,x0,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkb_orn_cg_cmp_rd_rs1_rs2_b0, Zbkb_orn_cg_cmp_rd_rs1_rs2_b0_str) +80003efc: 00092203 lw x4,0(x18) +80003f00: 00020863 beq x4,x0,80003f10 +80003f04: 5fc012ef jal x5,80005500 +80003f08: 80003ef8 .word 0x80003ef8 +80003f0c: 8000efc6 .word 0x8000efc6 +80003f10: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xa0a7d72c +80003f14: 00082083 lw x1,0(x16) +80003f18: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x06b52f58 +80003f1c: 00082083 lw x1,0(x16) +80003f20: 00480813 addi x16,x16,4 + +80003f24 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b1: + orn x1, x1, x1 # perform operation +80003f24: 4010e0b3 orn x1,x1,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_orn_cg_cmp_rd_rs1_rs2_b1, Zbkb_orn_cg_cmp_rd_rs1_rs2_b1_str) +80003f28: 00092203 lw x4,0(x18) +80003f2c: 00120863 beq x4,x1,80003f3c +80003f30: 5d0012ef jal x5,80005500 +80003f34: 80003f24 .word 0x80003f24 +80003f38: 8000f000 .word 0x8000f000 +80003f3c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x5abe6a5a +80003f40: 00082103 lw x2,0(x16) +80003f44: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xc3f4e650 +80003f48: 00082103 lw x2,0(x16) +80003f4c: 00480813 addi x16,x16,4 + +80003f50 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b2: + orn x2, x2, x2 # perform operation +80003f50: 40216133 orn x2,x2,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_orn_cg_cmp_rd_rs1_rs2_b2, Zbkb_orn_cg_cmp_rd_rs1_rs2_b2_str) +80003f54: 00092203 lw x4,0(x18) +80003f58: 00220863 beq x4,x2,80003f68 +80003f5c: 5a4012ef jal x5,80005500 +80003f60: 80003f50 .word 0x80003f50 +80003f64: 8000f03a .word 0x8000f03a +80003f68: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xe59c8ff8 +80003f6c: 00082183 lw x3,0(x16) +80003f70: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x679a68d0 +80003f74: 00082183 lw x3,0(x16) +80003f78: 00480813 addi x16,x16,4 + +80003f7c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b3: + orn x3, x3, x3 # perform operation +80003f7c: 4031e1b3 orn x3,x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_orn_cg_cmp_rd_rs1_rs2_b3, Zbkb_orn_cg_cmp_rd_rs1_rs2_b3_str) +80003f80: 00092203 lw x4,0(x18) +80003f84: 00320863 beq x4,x3,80003f94 +80003f88: 578012ef jal x5,80005500 +80003f8c: 80003f7c .word 0x80003f7c +80003f90: 8000f074 .word 0x8000f074 +80003f94: 00490913 addi x18,x18,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f98: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f9c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x0fc9bfc6 +80003fa0: 00082203 lw x4,0(x16) +80003fa4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0xb969d9f8 +80003fa8: 00082203 lw x4,0(x16) +80003fac: 00480813 addi x16,x16,4 + +80003fb0 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b4: + orn x4, x4, x4 # perform operation +80003fb0: 40426233 orn x4,x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_orn_cg_cmp_rd_rs1_rs2_b4, Zbkb_orn_cg_cmp_rd_rs1_rs2_b4_str) +80003fb4: 00092683 lw x13,0(x18) +80003fb8: 00468863 beq x13,x4,80003fc8 +80003fbc: 5840176f jal x14,80005540 +80003fc0: 80003fb0 .word 0x80003fb0 +80003fc4: 8000f0ae .word 0x8000f0ae +80003fc8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x7fb9aba9 +80003fcc: 00082283 lw x5,0(x16) +80003fd0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xcb0d99a6 +80003fd4: 00082283 lw x5,0(x16) +80003fd8: 00480813 addi x16,x16,4 + +80003fdc : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b5: + orn x5, x5, x5 # perform operation +80003fdc: 4052e2b3 orn x5,x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_orn_cg_cmp_rd_rs1_rs2_b5, Zbkb_orn_cg_cmp_rd_rs1_rs2_b5_str) +80003fe0: 00092683 lw x13,0(x18) +80003fe4: 00568863 beq x13,x5,80003ff4 +80003fe8: 5580176f jal x14,80005540 +80003fec: 80003fdc .word 0x80003fdc +80003ff0: 8000f0e8 .word 0x8000f0e8 +80003ff4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xc3b136ff +80003ff8: 00082303 lw x6,0(x16) +80003ffc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x0f6b827e +80004000: 00082303 lw x6,0(x16) +80004004: 00480813 addi x16,x16,4 + +80004008 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b6: + orn x6, x6, x6 # perform operation +80004008: 40636333 orn x6,x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_orn_cg_cmp_rd_rs1_rs2_b6, Zbkb_orn_cg_cmp_rd_rs1_rs2_b6_str) +8000400c: 00092683 lw x13,0(x18) +80004010: 00668863 beq x13,x6,80004020 +80004014: 52c0176f jal x14,80005540 +80004018: 80004008 .word 0x80004008 +8000401c: 8000f122 .word 0x8000f122 +80004020: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xb283ed2c +80004024: 00082383 lw x7,0(x16) +80004028: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xc0362297 +8000402c: 00082383 lw x7,0(x16) +80004030: 00480813 addi x16,x16,4 + +80004034 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b7: + orn x7, x7, x7 # perform operation +80004034: 4073e3b3 orn x7,x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs1_rs2_b7, Zbkb_orn_cg_cmp_rd_rs1_rs2_b7_str) +80004038: 00092683 lw x13,0(x18) +8000403c: 00768863 beq x13,x7,8000404c +80004040: 5000176f jal x14,80005540 +80004044: 80004034 .word 0x80004034 +80004048: 8000f15c .word 0x8000f15c +8000404c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xfc828302 +80004050: 00082403 lw x8,0(x16) +80004054: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xb0fa0e5d +80004058: 00082403 lw x8,0(x16) +8000405c: 00480813 addi x16,x16,4 + +80004060 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b8: + orn x8, x8, x8 # perform operation +80004060: 40846433 orn x8,x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs1_rs2_b8, Zbkb_orn_cg_cmp_rd_rs1_rs2_b8_str) +80004064: 00092683 lw x13,0(x18) +80004068: 00868863 beq x13,x8,80004078 +8000406c: 4d40176f jal x14,80005540 +80004070: 80004060 .word 0x80004060 +80004074: 8000f196 .word 0x8000f196 +80004078: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xd86b2168 +8000407c: 00082483 lw x9,0(x16) +80004080: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xc9b2c371 +80004084: 00082483 lw x9,0(x16) +80004088: 00480813 addi x16,x16,4 + +8000408c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b9: + orn x9, x9, x9 # perform operation +8000408c: 4094e4b3 orn x9,x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs1_rs2_b9, Zbkb_orn_cg_cmp_rd_rs1_rs2_b9_str) +80004090: 00092683 lw x13,0(x18) +80004094: 00968863 beq x13,x9,800040a4 +80004098: 4a80176f jal x14,80005540 +8000409c: 8000408c .word 0x8000408c +800040a0: 8000f1d0 .word 0x8000f1d0 +800040a4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x2119e54b +800040a8: 00082503 lw x10,0(x16) +800040ac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x9f1ccb1d +800040b0: 00082503 lw x10,0(x16) +800040b4: 00480813 addi x16,x16,4 + +800040b8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b10: + orn x10, x10, x10 # perform operation +800040b8: 40a56533 orn x10,x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs1_rs2_b10, Zbkb_orn_cg_cmp_rd_rs1_rs2_b10_str) +800040bc: 00092683 lw x13,0(x18) +800040c0: 00a68863 beq x13,x10,800040d0 +800040c4: 47c0176f jal x14,80005540 +800040c8: 800040b8 .word 0x800040b8 +800040cc: 8000f20a .word 0x8000f20a +800040d0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xda40a78c +800040d4: 00082583 lw x11,0(x16) +800040d8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x34287ad7 +800040dc: 00082583 lw x11,0(x16) +800040e0: 00480813 addi x16,x16,4 + +800040e4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b11: + orn x11, x11, x11 # perform operation +800040e4: 40b5e5b3 orn x11,x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs1_rs2_b11, Zbkb_orn_cg_cmp_rd_rs1_rs2_b11_str) +800040e8: 00092683 lw x13,0(x18) +800040ec: 00b68863 beq x13,x11,800040fc +800040f0: 4500176f jal x14,80005540 +800040f4: 800040e4 .word 0x800040e4 +800040f8: 8000f245 .word 0x8000f245 +800040fc: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x945ed72f +80004100: 00082603 lw x12,0(x16) +80004104: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x12039a90 +80004108: 00082603 lw x12,0(x16) +8000410c: 00480813 addi x16,x16,4 + +80004110 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b12: + orn x12, x12, x12 # perform operation +80004110: 40c66633 orn x12,x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs1_rs2_b12, Zbkb_orn_cg_cmp_rd_rs1_rs2_b12_str) +80004114: 00092683 lw x13,0(x18) +80004118: 00c68863 beq x13,x12,80004128 +8000411c: 4240176f jal x14,80005540 +80004120: 80004110 .word 0x80004110 +80004124: 8000f280 .word 0x8000f280 +80004128: 00490913 addi x18,x18,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000412c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80004130: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x1ebe17fc +80004134: 00082683 lw x13,0(x16) +80004138: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xceec4540 +8000413c: 00082683 lw x13,0(x16) +80004140: 00480813 addi x16,x16,4 + +80004144 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b13: + orn x13, x13, x13 # perform operation +80004144: 40d6e6b3 orn x13,x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkb_orn_cg_cmp_rd_rs1_rs2_b13, Zbkb_orn_cg_cmp_rd_rs1_rs2_b13_str) +80004148: 00092203 lw x4,0(x18) +8000414c: 00d20863 beq x4,x13,8000415c +80004150: 3b0012ef jal x5,80005500 +80004154: 80004144 .word 0x80004144 +80004158: 8000f2bb .word 0x8000f2bb +8000415c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xf13430f4 +80004160: 00082703 lw x14,0(x16) +80004164: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x86a114fe +80004168: 00082703 lw x14,0(x16) +8000416c: 00480813 addi x16,x16,4 + +80004170 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b14: + orn x14, x14, x14 # perform operation +80004170: 40e76733 orn x14,x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkb_orn_cg_cmp_rd_rs1_rs2_b14, Zbkb_orn_cg_cmp_rd_rs1_rs2_b14_str) +80004174: 00092203 lw x4,0(x18) +80004178: 00e20863 beq x4,x14,80004188 +8000417c: 384012ef jal x5,80005500 +80004180: 80004170 .word 0x80004170 +80004184: 8000f2f6 .word 0x8000f2f6 +80004188: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xcd837705 +8000418c: 00082783 lw x15,0(x16) +80004190: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x860f5c02 +80004194: 00082783 lw x15,0(x16) +80004198: 00480813 addi x16,x16,4 + +8000419c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b15: + orn x15, x15, x15 # perform operation +8000419c: 40f7e7b3 orn x15,x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkb_orn_cg_cmp_rd_rs1_rs2_b15, Zbkb_orn_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 00092203 lw x4,0(x18) +800041a4: 00f20863 beq x4,x15,800041b4 +800041a8: 358012ef jal x5,80005500 +800041ac: 8000419c .word 0x8000419c +800041b0: 8000f331 .word 0x8000f331 +800041b4: 00490913 addi x18,x18,4 + + mv x29, x16 # switch data pointer register to avoid conflict with test +800041b8: 00080e93 addi x29,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x68e6c3b1 +800041bc: 000ea803 lw x16,0(x29) +800041c0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x8750490d +800041c4: 000ea803 lw x16,0(x29) +800041c8: 004e8e93 addi x29,x29,4 + +800041cc : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b16: + orn x16, x16, x16 # perform operation +800041cc: 41086833 orn x16,x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_orn_cg_cmp_rd_rs1_rs2_b16, Zbkb_orn_cg_cmp_rd_rs1_rs2_b16_str) +800041d0: 00092203 lw x4,0(x18) +800041d4: 01020863 beq x4,x16,800041e4 +800041d8: 328012ef jal x5,80005500 +800041dc: 800041cc .word 0x800041cc +800041e0: 8000f36c .word 0x8000f36c +800041e4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x64e1cb62 +800041e8: 000ea883 lw x17,0(x29) +800041ec: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x9d6199d2 +800041f0: 000ea883 lw x17,0(x29) +800041f4: 004e8e93 addi x29,x29,4 + +800041f8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b17: + orn x17, x17, x17 # perform operation +800041f8: 4118e8b3 orn x17,x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkb_orn_cg_cmp_rd_rs1_rs2_b17, Zbkb_orn_cg_cmp_rd_rs1_rs2_b17_str) +800041fc: 00092203 lw x4,0(x18) +80004200: 01120863 beq x4,x17,80004210 +80004204: 2fc012ef jal x5,80005500 +80004208: 800041f8 .word 0x800041f8 +8000420c: 8000f3a7 .word 0x8000f3a7 +80004210: 00490913 addi x18,x18,4 + + mv x17, x18 # switch signature pointer register to avoid conflict with test +80004214: 00090893 addi x17,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0xfd0ebd6e +80004218: 000ea903 lw x18,0(x29) +8000421c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xefa894b2 +80004220: 000ea903 lw x18,0(x29) +80004224: 004e8e93 addi x29,x29,4 + +80004228 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b18: + orn x18, x18, x18 # perform operation +80004228: 41296933 orn x18,x18,x18 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkb_orn_cg_cmp_rd_rs1_rs2_b18, Zbkb_orn_cg_cmp_rd_rs1_rs2_b18_str) +8000422c: 0008a203 lw x4,0(x17) +80004230: 01220863 beq x4,x18,80004240 +80004234: 2cc012ef jal x5,80005500 +80004238: 80004228 .word 0x80004228 +8000423c: 8000f3e2 .word 0x8000f3e2 +80004240: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x5fa89066 +80004244: 000ea983 lw x19,0(x29) +80004248: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x053babe1 +8000424c: 000ea983 lw x19,0(x29) +80004250: 004e8e93 addi x29,x29,4 + +80004254 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b19: + orn x19, x19, x19 # perform operation +80004254: 4139e9b3 orn x19,x19,x19 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkb_orn_cg_cmp_rd_rs1_rs2_b19, Zbkb_orn_cg_cmp_rd_rs1_rs2_b19_str) +80004258: 0008a203 lw x4,0(x17) +8000425c: 01320863 beq x4,x19,8000426c +80004260: 2a0012ef jal x5,80005500 +80004264: 80004254 .word 0x80004254 +80004268: 8000f41d .word 0x8000f41d +8000426c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x5e46e370 +80004270: 000eaa03 lw x20,0(x29) +80004274: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs2: x20 = 0x48d2acc4 +80004278: 000eaa03 lw x20,0(x29) +8000427c: 004e8e93 addi x29,x29,4 + +80004280 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b20: + orn x20, x20, x20 # perform operation +80004280: 414a6a33 orn x20,x20,x20 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkb_orn_cg_cmp_rd_rs1_rs2_b20, Zbkb_orn_cg_cmp_rd_rs1_rs2_b20_str) +80004284: 0008a203 lw x4,0(x17) +80004288: 01420863 beq x4,x20,80004298 +8000428c: 274012ef jal x5,80005500 +80004290: 80004280 .word 0x80004280 +80004294: 8000f458 .word 0x8000f458 +80004298: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x022f4742 +8000429c: 000eaa83 lw x21,0(x29) +800042a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x304d21b3 +800042a4: 000eaa83 lw x21,0(x29) +800042a8: 004e8e93 addi x29,x29,4 + +800042ac : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b21: + orn x21, x21, x21 # perform operation +800042ac: 415aeab3 orn x21,x21,x21 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkb_orn_cg_cmp_rd_rs1_rs2_b21, Zbkb_orn_cg_cmp_rd_rs1_rs2_b21_str) +800042b0: 0008a203 lw x4,0(x17) +800042b4: 01520863 beq x4,x21,800042c4 +800042b8: 248012ef jal x5,80005500 +800042bc: 800042ac .word 0x800042ac +800042c0: 8000f493 .word 0x8000f493 +800042c4: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x71e3b6e9 +800042c8: 000eab03 lw x22,0(x29) +800042cc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xa55d5bcc +800042d0: 000eab03 lw x22,0(x29) +800042d4: 004e8e93 addi x29,x29,4 + +800042d8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b22: + orn x22, x22, x22 # perform operation +800042d8: 416b6b33 orn x22,x22,x22 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkb_orn_cg_cmp_rd_rs1_rs2_b22, Zbkb_orn_cg_cmp_rd_rs1_rs2_b22_str) +800042dc: 0008a203 lw x4,0(x17) +800042e0: 01620863 beq x4,x22,800042f0 +800042e4: 21c012ef jal x5,80005500 +800042e8: 800042d8 .word 0x800042d8 +800042ec: 8000f4ce .word 0x8000f4ce +800042f0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xc017cfcd +800042f4: 000eab83 lw x23,0(x29) +800042f8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0xe0d33e6e +800042fc: 000eab83 lw x23,0(x29) +80004300: 004e8e93 addi x29,x29,4 + +80004304 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b23: + orn x23, x23, x23 # perform operation +80004304: 417bebb3 orn x23,x23,x23 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkb_orn_cg_cmp_rd_rs1_rs2_b23, Zbkb_orn_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 0008a203 lw x4,0(x17) +8000430c: 01720863 beq x4,x23,8000431c +80004310: 1f0012ef jal x5,80005500 +80004314: 80004304 .word 0x80004304 +80004318: 8000f509 .word 0x8000f509 +8000431c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x253812ca +80004320: 000eac03 lw x24,0(x29) +80004324: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0xedd722f6 +80004328: 000eac03 lw x24,0(x29) +8000432c: 004e8e93 addi x29,x29,4 + +80004330 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b24: + orn x24, x24, x24 # perform operation +80004330: 418c6c33 orn x24,x24,x24 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkb_orn_cg_cmp_rd_rs1_rs2_b24, Zbkb_orn_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 0008a203 lw x4,0(x17) +80004338: 01820863 beq x4,x24,80004348 +8000433c: 1c4012ef jal x5,80005500 +80004340: 80004330 .word 0x80004330 +80004344: 8000f544 .word 0x8000f544 +80004348: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x34c7a705 +8000434c: 000eac83 lw x25,0(x29) +80004350: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x0ad8475c +80004354: 000eac83 lw x25,0(x29) +80004358: 004e8e93 addi x29,x29,4 + +8000435c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b25: + orn x25, x25, x25 # perform operation +8000435c: 419cecb3 orn x25,x25,x25 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkb_orn_cg_cmp_rd_rs1_rs2_b25, Zbkb_orn_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 0008a203 lw x4,0(x17) +80004364: 01920863 beq x4,x25,80004374 +80004368: 198012ef jal x5,80005500 +8000436c: 8000435c .word 0x8000435c +80004370: 8000f57f .word 0x8000f57f +80004374: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x87296b4f +80004378: 000ead03 lw x26,0(x29) +8000437c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0x1d92c538 +80004380: 000ead03 lw x26,0(x29) +80004384: 004e8e93 addi x29,x29,4 + +80004388 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b26: + orn x26, x26, x26 # perform operation +80004388: 41ad6d33 orn x26,x26,x26 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkb_orn_cg_cmp_rd_rs1_rs2_b26, Zbkb_orn_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 0008a203 lw x4,0(x17) +80004390: 01a20863 beq x4,x26,800043a0 +80004394: 16c012ef jal x5,80005500 +80004398: 80004388 .word 0x80004388 +8000439c: 8000f5ba .word 0x8000f5ba +800043a0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xb5445da8 +800043a4: 000ead83 lw x27,0(x29) +800043a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x29f44468 +800043ac: 000ead83 lw x27,0(x29) +800043b0: 004e8e93 addi x29,x29,4 + +800043b4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b27: + orn x27, x27, x27 # perform operation +800043b4: 41bdedb3 orn x27,x27,x27 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkb_orn_cg_cmp_rd_rs1_rs2_b27, Zbkb_orn_cg_cmp_rd_rs1_rs2_b27_str) +800043b8: 0008a203 lw x4,0(x17) +800043bc: 01b20863 beq x4,x27,800043cc +800043c0: 140012ef jal x5,80005500 +800043c4: 800043b4 .word 0x800043b4 +800043c8: 8000f5f5 .word 0x8000f5f5 +800043cc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xeb6ec66f +800043d0: 000eae03 lw x28,0(x29) +800043d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x3fb8db99 +800043d8: 000eae03 lw x28,0(x29) +800043dc: 004e8e93 addi x29,x29,4 + +800043e0 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b28: + orn x28, x28, x28 # perform operation +800043e0: 41ce6e33 orn x28,x28,x28 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkb_orn_cg_cmp_rd_rs1_rs2_b28, Zbkb_orn_cg_cmp_rd_rs1_rs2_b28_str) +800043e4: 0008a203 lw x4,0(x17) +800043e8: 01c20863 beq x4,x28,800043f8 +800043ec: 114012ef jal x5,80005500 +800043f0: 800043e0 .word 0x800043e0 +800043f4: 8000f630 .word 0x8000f630 +800043f8: 00488893 addi x17,x17,4 + + mv x6, x29 # switch data pointer register to avoid conflict with test +800043fc: 000e8313 addi x6,x29,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x03c8bb3f +80004400: 00032e83 lw x29,0(x6) +80004404: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xfaaaabc9 +80004408: 00032e83 lw x29,0(x6) +8000440c: 00430313 addi x6,x6,4 + +80004410 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b29: + orn x29, x29, x29 # perform operation +80004410: 41deeeb3 orn x29,x29,x29 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkb_orn_cg_cmp_rd_rs1_rs2_b29, Zbkb_orn_cg_cmp_rd_rs1_rs2_b29_str) +80004414: 0008a203 lw x4,0(x17) +80004418: 01d20863 beq x4,x29,80004428 +8000441c: 0e4012ef jal x5,80005500 +80004420: 80004410 .word 0x80004410 +80004424: 8000f66b .word 0x8000f66b +80004428: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x062603bd +8000442c: 00032f03 lw x30,0(x6) +80004430: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x9f4bb1be +80004434: 00032f03 lw x30,0(x6) +80004438: 00430313 addi x6,x6,4 + +8000443c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b30: + orn x30, x30, x30 # perform operation +8000443c: 41ef6f33 orn x30,x30,x30 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkb_orn_cg_cmp_rd_rs1_rs2_b30, Zbkb_orn_cg_cmp_rd_rs1_rs2_b30_str) +80004440: 0008a203 lw x4,0(x17) +80004444: 01e20863 beq x4,x30,80004454 +80004448: 0b8012ef jal x5,80005500 +8000444c: 8000443c .word 0x8000443c +80004450: 8000f6a6 .word 0x8000f6a6 +80004454: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x4537d041 +80004458: 00032f83 lw x31,0(x6) +8000445c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xef786e3e +80004460: 00032f83 lw x31,0(x6) +80004464: 00430313 addi x6,x6,4 + +80004468 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b31: + orn x31, x31, x31 # perform operation +80004468: 41ffefb3 orn x31,x31,x31 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkb_orn_cg_cmp_rd_rs1_rs2_b31, Zbkb_orn_cg_cmp_rd_rs1_rs2_b31_str) +8000446c: 0008a203 lw x4,0(x17) +80004470: 01f20863 beq x4,x31,80004480 +80004474: 08c012ef jal x5,80005500 +80004478: 80004468 .word 0x80004468 +8000447c: 8000f6e1 .word 0x8000f6e1 +80004480: 00488893 addi x17,x17,4 + + mv x2, x17 # restore signature pointer to default register for teardown +80004484: 00088113 addi x2,x17,0 + +80004488 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004488: 00000513 addi x10,x0,0 +8000448c: 00000073 ecall +80004490: fff00513 addi x10,x0,-1 +80004494: 1d800413 addi x8,x0,472 + +80004498 : +80004498: 34002373 csrrs x6,mscratch,x0 + +8000449c : +8000449c: 23832383 lw x7,568(x6) +800044a0: 23c32483 lw x9,572(x6) + +800044a4 : +800044a4: 22032383 lw x7,544(x6) + +800044a8 : +800044a8: 25032483 lw x9,592(x6) +800044ac: 34049073 csrrw x0,mscratch,x9 + +800044b0 : +800044b0: 24832483 lw x9,584(x6) +800044b4: 305493f3 csrrw x7,mtvec,x9 +800044b8: ffc4f493 andi x9,x9,-4 +800044bc: ffc3f393 andi x7,x7,-4 +800044c0: 00749e63 bne x9,x7,800044dc + +800044c4 : +800044c4: 00030493 addi x9,x6,0 + +800044c8 : +800044c8: 0004a783 lw x15,0(x9) +800044cc: 00f3a023 sw x15,0(x7) +800044d0: 00438393 addi x7,x7,4 +800044d4: 00448493 addi x9,x9,4 +800044d8: fe83c8e3 blt x7,x8,800044c8 +800044dc: 0000100f fence.i + +800044e0 : +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 87d50513 addi x10,x10,-1923 # 8000fd9d +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 87550513 addi x10,x10,-1931 # 8000fdd5 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 89550513 addi x10,x10,-1899 # 8000fe35 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000c517 auipc x10,0xc +800045e4: 40050513 addi x10,x10,1024 # 800109e0 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000d397 auipc x7,0xd +80004664: 45838393 addi x7,x7,1112 # 80011ab8 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000d417 auipc x8,0xd +800046a4: 41040413 addi x8,x8,1040 # 80011ab0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8000ff89 .word 0x8000ff89 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8000fdf7 .word 0x8000fdf7 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000b517 auipc x10,0xb +80004704: 66450513 addi x10,x10,1636 # 8000fd64 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000b517 auipc x10,0xb +80004744: 65d50513 addi x10,x10,1629 # 8000fd9d +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce9ff06f jal x0,80004488 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: cddff06f jal x0,80004488 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b8030313 addi x6,x6,-1152 # 800044e0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 8d750513 addi x10,x10,-1833 # 80011417 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: d0850513 addi x10,x10,-760 # 8000f888 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 2de50513 addi x10,x10,734 # 8000fe9e +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 19d50513 addi x10,x10,413 # 8000fd9d +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 88848493 addi x9,x9,-1912 # 8000f868 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001b417 auipc x8,0x1b +80005024: 4fc40413 addi x8,x8,1276 # 8002051c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 8000ffa0 .word 0x8000ffa0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 800100a2 .word 0x800100a2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 8001019d .word 0x8001019d +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010290 .word 0x80010290 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80010403 .word 0x80010403 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 22020213 addi x4,x4,544 # 8000f720 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 20838393 addi x7,x7,520 # 8000f720 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 1e068693 addi x13,x13,480 # 8000f720 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 1b848493 addi x9,x9,440 # 8000f720 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 1144a483 lw x9,276(x9) # 8000f720 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: da040413 addi x8,x8,-608 # 80011460 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: e2040413 addi x8,x8,-480 # 80020520 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 10848493 addi x9,x9,264 # 8000f848 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 0c848493 addi x9,x9,200 # 8000f848 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 0a880813 addi x16,x16,168 # 8000f858 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 09480813 addi x16,x16,148 # 8000f858 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000a397 auipc x7,0xa +800057d4: 7b938393 addi x7,x7,1977 # 8000ff89 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 07080813 addi x16,x16,112 # 8000f850 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000a397 auipc x7,0xa +800057f0: 7b438393 addi x7,x7,1972 # 8000ffa0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 89e38393 addi x7,x7,-1890 # 800100a2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 98138393 addi x7,x7,-1663 # 8001019d +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: a5c38393 addi x7,x7,-1444 # 80010290 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: bb738393 addi x7,x7,-1097 # 80010403 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: b2338393 addi x7,x7,-1245 # 80010387 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: b4938393 addi x7,x7,-1207 # 800103c5 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000a397 auipc x7,0xa +80005898: 74c38393 addi x7,x7,1868 # 8000ffe0 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 83438393 addi x7,x7,-1996 # 800100e0 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 91538393 addi x7,x7,-1771 # 800101d9 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 9f138393 addi x7,x7,-1551 # 800102cd +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: b4a38393 addi x7,x7,-1206 # 8001043e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000a397 auipc x7,0xa +80005910: 71438393 addi x7,x7,1812 # 80010020 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000a397 auipc x7,0xa +80005928: 7fa38393 addi x7,x7,2042 # 8001011e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 8d938393 addi x7,x7,-1831 # 80010215 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 9b638393 addi x7,x7,-1610 # 8001030a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: b0d38393 addi x7,x7,-1267 # 80010479 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000a397 auipc x7,0xa +80005988: 6dd38393 addi x7,x7,1757 # 80010061 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000a397 auipc x7,0xa +800059a0: 7c138393 addi x7,x7,1985 # 8001015d +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 89e38393 addi x7,x7,-1890 # 80010252 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 97c38393 addi x7,x7,-1668 # 80010348 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: ad138393 addi x7,x7,-1327 # 800104b5 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: af638393 addi x7,x7,-1290 # 800104f2 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: b2d38393 addi x7,x7,-1235 # 80010541 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: c1038393 addi x7,x7,-1008 # 8001063c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: cf438393 addi x7,x7,-780 # 80010738 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: dec80813 addi x16,x16,-532 # 8000f850 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: ddc80813 addi x16,x16,-548 # 8000f850 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: dd480813 addi x16,x16,-556 # 8000f854 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: dc080813 addi x16,x16,-576 # 8000f850 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 2bd50513 addi x10,x10,701 # 8000fd9d +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 2b550513 addi x10,x10,693 # 8000fdd5 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 32c50513 addi x10,x10,812 # 8000fe8c +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: cb852503 lw x10,-840(x10) # 8000f840 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 2fe50513 addi x10,x10,766 # 8000fe9e +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: b5852503 lw x10,-1192(x10) # 8000f720 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 2c050513 addi x10,x10,704 # 8000fea0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: c1852503 lw x10,-1000(x10) # 8000f820 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: c4850513 addi x10,x10,-952 # 8000f888 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 23450513 addi x10,x10,564 # 8000feb4 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: b8052503 lw x10,-1152(x10) # 8000f828 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: bc850513 addi x10,x10,-1080 # 8000f888 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: beb50513 addi x10,x10,-1045 # 800108eb +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 9f852503 lw x10,-1544(x10) # 8000f720 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: b4860613 addi x12,x12,-1208 # 8000f888 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: abc52503 lw x10,-1348(x10) # 8000f824 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: c6150513 addi x10,x10,-927 # 80010a01 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: aa860613 addi x12,x12,-1368 # 8000f888 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: a1c52503 lw x10,-1508(x10) # 8000f824 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: a6860613 addi x12,x12,-1432 # 8000f888 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 9dc52503 lw x10,-1572(x10) # 8000f824 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: a8450513 addi x10,x10,-1404 # 800108e4 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 9e850513 addi x10,x10,-1560 # 8000f888 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: a1c50513 addi x10,x10,-1508 # 800108fc +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 81852503 lw x10,-2024(x10) # 8000f720 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 91852503 lw x10,-1768(x10) # 8000f830 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 90452503 lw x10,-1788(x10) # 8000f830 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 94850513 addi x10,x10,-1720 # 8000f888 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 8e052503 lw x10,-1824(x10) # 8000f848 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 99350513 addi x10,x10,-1645 # 80010913 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 00009517 auipc x10,0x9 +80005fac: 77852503 lw x10,1912(x10) # 8000f720 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 88052503 lw x10,-1920(x10) # 8000f838 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 86c52503 lw x10,-1940(x10) # 8000f838 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 8a850513 addi x10,x10,-1880 # 8000f888 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 90a50513 addi x10,x10,-1782 # 8001092a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 00009517 auipc x10,0x9 +8000604c: 7f052503 lw x10,2032(x10) # 8000f838 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 82850513 addi x10,x10,-2008 # 8000f888 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 8e850513 addi x10,x10,-1816 # 80010988 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 00009517 auipc x10,0x9 +800060cc: 77052503 lw x10,1904(x10) # 8000f838 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 00009517 auipc x10,0x9 +800060e4: 7a850513 addi x10,x10,1960 # 8000f888 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 00009417 auipc x8,0x9 +80006110: 74442403 lw x8,1860(x8) # 8000f850 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 90d50513 addi x10,x10,-1779 # 80010a2d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 8f950513 addi x10,x10,-1799 # 80010a59 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00009817 auipc x16,0x9 +8000618c: 6d080813 addi x16,x16,1744 # 8000f858 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: cfe50513 addi x10,x10,-770 # 8000fe9e +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 88950513 addi x10,x10,-1911 # 80010a69 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 00009517 auipc x10,0x9 +8000620c: 63052503 lw x10,1584(x10) # 8000f838 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 00009517 auipc x10,0x9 +80006224: 66850513 addi x10,x10,1640 # 8000f888 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 83450513 addi x10,x10,-1996 # 80010a94 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00009517 auipc x10,0x9 +8000628c: 5a852503 lw x10,1448(x10) # 8000f830 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 00009517 auipc x10,0x9 +800062a4: 5e850513 addi x10,x10,1512 # 8000f888 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 00009317 auipc x6,0x9 +800062cc: 56832303 lw x6,1384(x6) # 8000f830 +800062d0: 00009397 auipc x7,0x9 +800062d4: 5683a383 lw x7,1384(x7) # 8000f838 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000a517 auipc x10,0xa +800062e4: 7e350513 addi x10,x10,2019 # 80010ac3 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 80b50513 addi x10,x10,-2037 # 80010b2b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00009317 auipc x6,0x9 +8000634c: 4e832303 lw x6,1256(x6) # 8000f830 +80006350: 00009397 auipc x7,0x9 +80006354: 4e83a383 lw x7,1256(x7) # 8000f838 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 00009517 auipc x10,0x9 +80006384: 50850513 addi x10,x10,1288 # 8000f888 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000a517 auipc x10,0xa +800063c4: 79250513 addi x10,x10,1938 # 80010b52 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000a517 auipc x10,0xa +80006404: 6ef50513 addi x10,x10,1775 # 80010aef +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000a517 auipc x10,0xa +80006444: 6eb50513 addi x10,x10,1771 # 80010b2b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00009317 auipc x6,0x9 +8000646c: 3d032303 lw x6,976(x6) # 8000f838 +80006470: 00009397 auipc x7,0x9 +80006474: 3c03a383 lw x7,960(x7) # 8000f830 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 00009517 auipc x10,0x9 +800064a4: 3e850513 addi x10,x10,1000 # 8000f888 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000a517 auipc x10,0xa +800064e4: 75a50513 addi x10,x10,1882 # 80010c3a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 80150513 addi x10,x10,-2047 # 80010d21 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 30c52503 lw x10,780(x10) # 8000f854 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000a517 auipc x10,0xa +80006584: 7dd50513 addi x10,x10,2013 # 80010d5d +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000a517 auipc x10,0xa +800065c4: 77b50513 addi x10,x10,1915 # 80010d3b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000a517 auipc x10,0xa +80006604: 74350513 addi x10,x10,1859 # 80010d43 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000a517 auipc x10,0xa +80006644: 70b50513 addi x10,x10,1803 # 80010d4b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000a517 auipc x10,0xa +80006684: 6d450513 addi x10,x10,1748 # 80010d54 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000a517 auipc x10,0xa +800066c4: 6a650513 addi x10,x10,1702 # 80010d66 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 16852503 lw x10,360(x10) # 8000f850 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000a517 auipc x10,0xa +80006744: 77d50513 addi x10,x10,1917 # 80010ebd +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000a517 auipc x10,0xa +80006784: 60050513 addi x10,x10,1536 # 80010d80 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000a517 auipc x10,0xa +800067c4: 5f150513 addi x10,x10,1521 # 80010db1 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000a517 auipc x10,0xa +80006804: 5d150513 addi x10,x10,1489 # 80010dd1 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000a517 auipc x10,0xa +80006844: 5af50513 addi x10,x10,1455 # 80010def +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000a517 auipc x10,0xa +80006884: 58e50513 addi x10,x10,1422 # 80010e0e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000a517 auipc x10,0xa +800068c4: 57650513 addi x10,x10,1398 # 80010e36 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000a517 auipc x10,0xa +80006904: 56250513 addi x10,x10,1378 # 80010e62 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000a517 auipc x10,0xa +80006944: 54e50513 addi x10,x10,1358 # 80010e8e +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000a517 auipc x10,0xa +80006984: 54c50513 addi x10,x10,1356 # 80010ecc +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: e9052503 lw x10,-368(x10) # 8000f838 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: ec850513 addi x10,x10,-312 # 8000f888 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000a517 auipc x10,0xa +80006a04: 4e350513 addi x10,x10,1251 # 80010ee3 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: e0852503 lw x10,-504(x10) # 8000f830 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: e4850513 addi x10,x10,-440 # 8000f888 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: de852503 lw x10,-536(x10) # 8000f850 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000a517 auipc x10,0xa +80006a84: 47a50513 addi x10,x10,1146 # 80010efa +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: d9052503 lw x10,-624(x10) # 8000f838 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 45150513 addi x10,x10,1105 # 80010f11 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: d4852503 lw x10,-696(x10) # 8000f830 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: d4c52503 lw x10,-692(x10) # 8000f850 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000a517 auipc x10,0xa +80006b24: 46750513 addi x10,x10,1127 # 80010f87 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 4fd50513 addi x10,x10,1277 # 8001105d +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 5b050513 addi x10,x10,1456 # 80011150 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000a517 auipc x10,0xa +80006be4: 66b50513 addi x10,x10,1643 # 8001124b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000a517 auipc x10,0xa +80006c24: 71250513 addi x10,x10,1810 # 80011332 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 2df50513 addi x10,x10,735 # 80010f3f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: be062603 lw x12,-1056(x12) # 8000f868 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 28850513 addi x10,x10,648 # 8000ff28 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: b8850513 addi x10,x10,-1144 # 8000f888 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: b7058593 addi x11,x11,-1168 # 8000f8b0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: ba458593 addi x11,x11,-1116 # 8000f910 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: fae50513 addi x10,x10,-82 # 8000fd4e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: c0050513 addi x10,x10,-1024 # 800109e0 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: a5060613 addi x12,x12,-1456 # 8000f860 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 12950513 addi x10,x10,297 # 8000ff49 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: a2052503 lw x10,-1504(x10) # 8000f868 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: a2850513 addi x10,x10,-1496 # 8000f888 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 0b950513 addi x10,x10,185 # 8000ff59 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 9a852503 lw x10,-1624(x10) # 8000f870 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 9a850513 addi x10,x10,-1624 # 8000f888 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 04950513 addi x10,x10,73 # 8000ff69 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 93052503 lw x10,-1744(x10) # 8000f878 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 92850513 addi x10,x10,-1752 # 8000f888 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: fd950513 addi x10,x10,-39 # 8000ff79 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 8b852503 lw x10,-1864(x10) # 8000f880 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 8a850513 addi x10,x10,-1880 # 8000f888 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: 85860613 addi x12,x12,-1960 # 8000f860 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 86860613 addi x12,x12,-1944 # 8000f888 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3ec30313 addi x6,x6,1004 # 80004488 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3d430313 addi x6,x6,980 # 80004488 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3bc30313 addi x6,x6,956 # 80004488 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 25878793 addi x15,x15,600 # 80004498 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: fc010113 addi x2,x2,-64 # 80011460 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010a09 .word 0x80010a09 +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 05828293 addi x5,x5,88 # 80020600 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 03828293 addi x5,x5,56 # 80020600 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-pack-00.elf.objdump b/riscv-tests/rv32-Zbkb-pack-00.elf.objdump new file mode 100644 index 0000000..86975f4 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-pack-00.elf.objdump @@ -0,0 +1,12359 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-pack-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-pack-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00021640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00006ac0 memsz 0x00006ac0 flags r-x + LOAD off 0x00008000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00006a80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00017f20 80008000 80008000 00008000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020000 80020000 00020000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00021000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00021640 2**0 + CONTENTS, READONLY + 6 .debug_line 000022f8 00000000 00000000 0002167b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 00000000 00000000 00023973 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 000239ed 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00023a10 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00023a28 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 00000000 00000000 00023a50 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00023ad8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020000 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccGbjT91.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b0 +80004ec0 l .text.rvtest 00000000 failedtest_x5_x4 +80008ed0 l .data 00000000 Zbkb_pack_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b1 +80008f01 l .data 00000000 Zbkb_pack_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b2 +80008f32 l .data 00000000 Zbkb_pack_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b3 +80008f63 l .data 00000000 Zbkb_pack_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b4 +80004f00 l .text.rvtest 00000000 failedtest_x14_x13 +80008f94 l .data 00000000 Zbkb_pack_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b5 +80008fc5 l .data 00000000 Zbkb_pack_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b6 +80008ff6 l .data 00000000 Zbkb_pack_cg_cp_rs1_b6_str +80000194 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b7 +80009027 l .data 00000000 Zbkb_pack_cg_cp_rs1_b7_str +800001c0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b8 +80009058 l .data 00000000 Zbkb_pack_cg_cp_rs1_b8_str +800001ec l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b9 +80009089 l .data 00000000 Zbkb_pack_cg_cp_rs1_b9_str +80000218 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b10 +800090bb l .data 00000000 Zbkb_pack_cg_cp_rs1_b10_str +80000244 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b11 +800090ee l .data 00000000 Zbkb_pack_cg_cp_rs1_b11_str +80000270 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b12 +80009121 l .data 00000000 Zbkb_pack_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b13 +80009154 l .data 00000000 Zbkb_pack_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b14 +80009187 l .data 00000000 Zbkb_pack_cg_cp_rs1_b14_str +800002fc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b15 +800091ba l .data 00000000 Zbkb_pack_cg_cp_rs1_b15_str +80000328 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b16 +800091ed l .data 00000000 Zbkb_pack_cg_cp_rs1_b16_str +80000354 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b17 +80009220 l .data 00000000 Zbkb_pack_cg_cp_rs1_b17_str +80000380 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b18 +80009253 l .data 00000000 Zbkb_pack_cg_cp_rs1_b18_str +800003ac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b19 +80009286 l .data 00000000 Zbkb_pack_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b20 +800092b9 l .data 00000000 Zbkb_pack_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b21 +800092ec l .data 00000000 Zbkb_pack_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b22 +8000931f l .data 00000000 Zbkb_pack_cg_cp_rs1_b22_str +80000460 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b23 +80009352 l .data 00000000 Zbkb_pack_cg_cp_rs1_b23_str +8000048c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b24 +80009385 l .data 00000000 Zbkb_pack_cg_cp_rs1_b24_str +800004b8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b25 +800093b8 l .data 00000000 Zbkb_pack_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b26 +800093eb l .data 00000000 Zbkb_pack_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b27 +8000941e l .data 00000000 Zbkb_pack_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b28 +80009451 l .data 00000000 Zbkb_pack_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b29 +80009484 l .data 00000000 Zbkb_pack_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b30 +800094b7 l .data 00000000 Zbkb_pack_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_b31 +800094ea l .data 00000000 Zbkb_pack_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b1 +8000951d l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b1_str +80000620 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b2 +80009553 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b2_str +8000064c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b3 +80009589 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b3_str +80000680 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b4 +80004ed8 l .text.rvtest 00000000 failedtest_x8_x7 +800095bf l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b4_str +800006ac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b5 +800095f5 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b5_str +800006d8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b6 +8000962b l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b6_str +8000070c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b7 +80009661 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b7_str +80000738 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b8 +80009697 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b8_str +80000764 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b9 +800096cd l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b9_str +80000790 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b10 +80009703 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b10_str +800007bc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b11 +8000973a l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b11_str +800007e8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b12 +80009771 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b12_str +8000081c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b13 +800097a8 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b13_str +80000848 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b14 +800097df l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b14_str +80000874 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b15 +80009816 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b15_str +800008a0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b16 +8000984d l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b16_str +800008cc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b17 +80009884 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b17_str +800008fc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b18 +800098bb l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b18_str +80000928 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b19 +800098f2 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b19_str +80000954 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b20 +80009929 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b20_str +80000980 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b21 +80009960 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b21_str +800009ac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b22 +80009997 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b22_str +800009d8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b23 +800099ce l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b23_str +80000a08 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b24 +80009a05 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b24_str +80000a38 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b25 +80009a3c l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b25_str +80000a64 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b26 +80009a73 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b26_str +80000a90 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b27 +80009aaa l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b27_str +80000abc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b28 +80009ae1 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b28_str +80000ae8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b29 +80009b18 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b29_str +80000b14 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b30 +80009b4f l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b30_str +80000b40 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_nx0_b31 +80009b86 l .data 00000000 Zbkb_pack_cg_cp_rs2_nx0_b31_str +80000b6c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b0 +80009bbd l .data 00000000 Zbkb_pack_cg_cp_rd_b0_str +80000b98 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b1 +80009bee l .data 00000000 Zbkb_pack_cg_cp_rd_b1_str +80000bc8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b2 +80009c1f l .data 00000000 Zbkb_pack_cg_cp_rd_b2_str +80000bf4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b3 +80009c50 l .data 00000000 Zbkb_pack_cg_cp_rd_b3_str +80000c20 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b4 +80009c81 l .data 00000000 Zbkb_pack_cg_cp_rd_b4_str +80000c4c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b5 +80009cb2 l .data 00000000 Zbkb_pack_cg_cp_rd_b5_str +80000c78 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b6 +80009ce3 l .data 00000000 Zbkb_pack_cg_cp_rd_b6_str +80000cac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b7 +80009d14 l .data 00000000 Zbkb_pack_cg_cp_rd_b7_str +80000cd8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b8 +80009d45 l .data 00000000 Zbkb_pack_cg_cp_rd_b8_str +80000d04 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b9 +80009d76 l .data 00000000 Zbkb_pack_cg_cp_rd_b9_str +80000d30 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b10 +80009da7 l .data 00000000 Zbkb_pack_cg_cp_rd_b10_str +80000d5c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b11 +80009dd9 l .data 00000000 Zbkb_pack_cg_cp_rd_b11_str +80000d88 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b12 +80009e0b l .data 00000000 Zbkb_pack_cg_cp_rd_b12_str +80000db4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b13 +80009e3d l .data 00000000 Zbkb_pack_cg_cp_rd_b13_str +80000de0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b14 +80009e6f l .data 00000000 Zbkb_pack_cg_cp_rd_b14_str +80000e0c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b15 +80009ea1 l .data 00000000 Zbkb_pack_cg_cp_rd_b15_str +80000e3c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b16 +80009ed3 l .data 00000000 Zbkb_pack_cg_cp_rd_b16_str +80000e68 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b17 +80009f05 l .data 00000000 Zbkb_pack_cg_cp_rd_b17_str +80000e94 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b18 +80009f37 l .data 00000000 Zbkb_pack_cg_cp_rd_b18_str +80000ec0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b19 +80009f69 l .data 00000000 Zbkb_pack_cg_cp_rd_b19_str +80000eec l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b20 +80009f9b l .data 00000000 Zbkb_pack_cg_cp_rd_b20_str +80000f1c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b21 +80009fcd l .data 00000000 Zbkb_pack_cg_cp_rd_b21_str +80000f48 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b22 +80009fff l .data 00000000 Zbkb_pack_cg_cp_rd_b22_str +80000f74 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b23 +8000a031 l .data 00000000 Zbkb_pack_cg_cp_rd_b23_str +80000fa0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b24 +8000a063 l .data 00000000 Zbkb_pack_cg_cp_rd_b24_str +80000fcc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b25 +8000a095 l .data 00000000 Zbkb_pack_cg_cp_rd_b25_str +80000ff8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b26 +8000a0c7 l .data 00000000 Zbkb_pack_cg_cp_rd_b26_str +80001028 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b27 +8000a0f9 l .data 00000000 Zbkb_pack_cg_cp_rd_b27_str +80001054 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b28 +8000a12b l .data 00000000 Zbkb_pack_cg_cp_rd_b28_str +80001080 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b29 +8000a15d l .data 00000000 Zbkb_pack_cg_cp_rd_b29_str +800010ac l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b30 +8000a18f l .data 00000000 Zbkb_pack_cg_cp_rd_b30_str +800010d8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rd_b31 +8000a1c1 l .data 00000000 Zbkb_pack_cg_cp_rd_b31_str +80001104 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x0 +8000a1f3 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x0_str +80001130 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x1 +8000a22c l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x1_str +8000115c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x2 +8000a265 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x2_str +80001188 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x80000000 +8000a29e l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x80000000_str +800011b4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x80000001 +8000a2de l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x80000001_str +800011e0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x7fffffff +8000a31f l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x7fffffff_str +8000120c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x7ffffffe +8000a360 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x7ffffffe_str +80001238 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0xffffffff +8000a3a1 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0xffffffff_str +80001264 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0xfffffffe +8000a3e2 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0xfffffffe_str +80001290 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x5bbc8872 +8000a423 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x5bbc8872_str +800012bc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaa +8000a464 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaa_str +800012e8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs1_edges_0x55555555 +8000a4a5 l .data 00000000 Zbkb_pack_cg_cp_rs1_edges_0x55555555_str +80001314 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x0 +8000a4e6 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x0_str +80001340 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x1 +8000a520 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x1_str +8000136c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x2 +8000a55a l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x2_str +80001398 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x80000000 +8000a594 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x80000000_str +800013c4 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x80000001 +8000a5d5 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x80000001_str +800013f0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x7fffffff +8000a616 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x7fffffff_str +8000141c l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x7ffffffe +8000a657 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x7ffffffe_str +80001448 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0xffffffff +8000a698 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0xffffffff_str +80001474 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0xfffffffe +8000a6d9 l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0xfffffffe_str +800014a0 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x5bbc8872 +8000a71a l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x5bbc8872_str +800014cc l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaa +8000a75b l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaa_str +800014f8 l .text.rvtest 00000000 Zbkb_pack_cg_cp_rs2_edges_0x55555555 +8000a79c l .data 00000000 Zbkb_pack_cg_cp_rs2_edges_0x55555555_str +80001524 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a7dd l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001550 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a82e l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +8000157c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a87f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015a8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a8d0 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +800015d4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a928 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001600 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000a980 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000162c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000a9d8 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001658 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000aa30 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +80001684 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aa88 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016b0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000aae0 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +800016dc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ab38 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001708 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ab90 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001734 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000abe8 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001760 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ac39 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +8000178c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ac8a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017b8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000acdb l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +800017e4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ad33 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001810 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000ad8b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000183c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000ade3 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001868 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000ae3b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +80001894 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000ae93 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018c0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000aeeb l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +800018ec l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000af43 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001918 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000af9b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001944 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000aff3 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +80001970 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b044 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +8000199c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b095 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019c8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b0e6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +800019f4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b13e l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a20 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b196 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a4c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b1ee l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001a78 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b246 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001aa4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b29e l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001ad0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b2f6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001afc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b34e l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b28 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b3a6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b54 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b3fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001b80 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b456 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bac l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b4ae l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001bd8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b506 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c04 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b565 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c30 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b5c4 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c5c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b623 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001c88 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b682 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cb4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b6e1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001ce0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b740 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d0c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b79f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d38 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b7fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d64 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b85d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001d90 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b8b5 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001dbc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b90d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001de8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000b965 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e14 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000b9c4 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e40 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000ba23 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e6c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000ba82 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001e98 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bae1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ec4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bb40 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001ef0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bb9f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f1c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bbfe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f48 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bc5d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001f74 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bcbc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fa0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bd14 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001fcc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bd6c l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80001ff8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bdc4 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002024 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000be23 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002050 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000be82 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +8000207c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000bee1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020a8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000bf40 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +800020d4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000bf9f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002100 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000bffe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000212c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c05d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002158 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c0bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +80002184 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c11b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021b0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c173 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +800021dc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c1cb l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002208 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c223 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002234 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c282 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002260 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c2e1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +8000228c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c340 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022b8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c39f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +800022e4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c3fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002310 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c45d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000233c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c4bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002368 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c51b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +80002394 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c57a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023c0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c5d2 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +800023ec l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c62a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002418 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c682 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002444 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c6e1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +80002470 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c740 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +8000249c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c79f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024c8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c7fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +800024f4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c85d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002520 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c8bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000254c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c91b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +80002578 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000c97a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025a4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000c9d9 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025d0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ca31 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +800025fc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000ca89 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002628 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cae1 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002654 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cb40 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +80002680 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cb9f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026ac l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cbfe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +800026d8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cc5d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002704 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ccbc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002730 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cd1b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000275c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cd7a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +80002788 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cdd9 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027b4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000ce38 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +800027e0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000ce90 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000280c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000cee8 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002838 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000cf40 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002864 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000cf9f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +80002890 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000cffe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028bc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d05d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +800028e8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d0bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002914 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d11b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002940 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d17a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +8000296c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d1d9 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +80002998 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d238 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029c4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d297 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +800029f0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d2ef l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a1c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d347 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a48 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d39f l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002a74 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d3fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002aa0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d45d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002acc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d4bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002af8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d51b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b24 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d57a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b50 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d5d9 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002b7c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d638 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002ba8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d697 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002bd4 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d6f6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c00 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d74e l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c2c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d7a6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c58 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d7fe l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002c84 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d85d l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cb0 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d8bc l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002cdc l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d91b l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d08 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000d97a l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d34 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000d9d9 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d60 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000da38 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002d8c l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000da97 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002db8 l .text.rvtest 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000daf6 l .data 00000000 Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002de8 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1 +8000db55 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1_str +80002e14 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2 +8000db91 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2_str +80002e40 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3 +8000dbcd l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3_str +80002e74 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4 +8000dc09 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4_str +80002ea0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5 +8000dc45 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5_str +80002ed0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6 +8000dc81 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6_str +80002efc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7 +8000dcbd l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7_str +80002f28 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8 +8000dcf9 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8_str +80002f54 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9 +8000dd35 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9_str +80002f80 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10 +8000dd71 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10_str +80002fac l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11 +8000ddae l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11_str +80002fdc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12 +8000ddeb l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12_str +80003010 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13 +8000de28 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13_str +8000303c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14 +8000de65 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14_str +80003068 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15 +8000dea2 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15_str +80003094 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16 +8000dedf l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16_str +800030c0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17 +8000df1c l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17_str +800030ec l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18 +8000df59 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18_str +80003118 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19 +8000df96 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19_str +80003148 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20 +8000dfd3 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20_str +80003174 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21 +8000e010 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21_str +800031a0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22 +8000e04d l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22_str +800031cc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23 +8000e08a l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23_str +800031f8 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24 +8000e0c7 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24_str +80003224 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25 +8000e104 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25_str +80003250 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26 +8000e141 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26_str +80003280 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27 +8000e17e l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27_str +800032ac l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28 +8000e1bb l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28_str +800032dc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29 +8000e1f8 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29_str +80003308 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30 +8000e235 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30_str +80003334 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31 +8000e272 l .data 00000000 Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31_str +80003364 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b1 +8000e2af l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b1_str +80003390 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b2 +8000e2ea l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b2_str +800033bc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b3 +8000e325 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b3_str +800033f0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b4 +8000e360 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b4_str +8000341c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b5 +8000e39b l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b5_str +80003448 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b6 +8000e3d6 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b6_str +8000347c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b7 +8000e411 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b7_str +800034a8 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b8 +8000e44c l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b8_str +800034d4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b9 +8000e487 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b9_str +80003500 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b10 +8000e4c2 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b10_str +8000352c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b11 +8000e4fe l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b11_str +80003558 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b12 +8000e53a l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b12_str +8000358c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b13 +8000e576 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b13_str +800035b8 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b14 +8000e5b2 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b14_str +800035e4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b15 +8000e5ee l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b15_str +80003614 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b16 +8000e62a l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b16_str +80003640 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b17 +8000e666 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b17_str +8000366c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b18 +8000e6a2 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b18_str +80003698 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b19 +8000e6de l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b19_str +800036c4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b20 +8000e71a l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b20_str +800036f0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b21 +8000e756 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b21_str +8000371c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b22 +8000e792 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b22_str +80003748 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b23 +8000e7ce l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b23_str +80003774 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b24 +8000e80a l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b24_str +800037a4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b25 +8000e846 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b25_str +800037d0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b26 +8000e882 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b26_str +800037fc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b27 +8000e8be l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b27_str +80003828 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b28 +8000e8fa l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b28_str +80003858 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b29 +8000e936 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b29_str +80003884 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b30 +8000e972 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b30_str +800038b0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b31 +8000e9ae l .data 00000000 Zbkb_pack_cg_cmp_rd_rs2_nx0_b31_str +800038dc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1 +8000e9ea l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1_str +80003908 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2 +8000ea29 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2_str +80003938 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3 +8000ea68 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3_str +8000396c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4 +8000eaa7 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4_str +80003998 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5 +8000eae6 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5_str +800039c4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6 +8000eb25 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6_str +800039f0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7 +8000eb64 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7_str +80003a1c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8 +8000eba3 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8_str +80003a48 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9 +8000ebe2 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9_str +80003a74 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10 +8000ec21 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10_str +80003aa4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11 +8000ec61 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11_str +80003ad0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12 +8000eca1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12_str +80003b04 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13 +8000ece1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13_str +80003b30 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14 +8000ed21 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14_str +80003b5c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15 +8000ed61 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15_str +80003b88 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16 +8000eda1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16_str +80003bb4 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17 +8000ede1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17_str +80003be0 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18 +8000ee21 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18_str +80003c0c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19 +8000ee61 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19_str +80003c38 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20 +8000eea1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20_str +80003c64 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21 +8000eee1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21_str +80003c90 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22 +8000ef21 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22_str +80003cbc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23 +8000ef61 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23_str +80003cec l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24 +8000efa1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24_str +80003d18 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25 +8000efe1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25_str +80003d44 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26 +8000f021 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26_str +80003d70 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27 +8000f061 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27_str +80003d9c l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28 +8000f0a1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28_str +80003dcc l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29 +8000f0e1 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29_str +80003df8 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30 +8000f121 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30_str +80003e24 l .text.rvtest 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31 +8000f161 l .data 00000000 Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80003e54 l .text.rvtest 00000000 exit_Mcleanup +80003e58 l .text.rvtest 00000000 resto_Medeleg +80003e60 l .text.rvtest 00000000 resto_Msatp +80003e64 l .text.rvtest 00000000 resto_Mscratch +80003e6c l .text.rvtest 00000000 resto_Mxtvec +80003e80 l .text.rvtest 00000000 resto_Mtramp +80003e84 l .text.rvtest 00000000 resto_Mloop +80003e9c l .text.rvtest 00000000 check_trap_sig_overflow +80004130 l .text.rvtest 00000000 trap_sig_overflow +80003fd0 l .text.rvtest 00000000 check_trap_sig_offset +8000f82e l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000f867 l .data 00000000 begin_debugstr +8000f8c7 l .data 00000000 trap_sig_overflowstr +80010472 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +800114b8 l .data 00000000 trap_sigptr +800114b0 l .data 00000000 final_trap_sig_offset +80004094 l .text.rvtest 00000000 check_abort_test +80004f28 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000fa1b l .data 00000000 trap_sig_offset_mismatch +800040b0 l .text.rvtest 00000000 exit_cleanup +80004164 l .text.rvtest 00000000 abort_test +8000f889 l .data 00000000 abortstr +8000f7f4 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004200 l .text.rvtest 00000000 trap_Mhandler +80004320 l .text.rvtest 00000000 rvtest_Mendtest +80004344 l .text.rvtest 00000000 common_Mhandler +800043b0 l .text.rvtest 00000000 spcl_M2mmode_test +800043bc l .text.rvtest 00000000 spcl_Mchk4alt +800043cc l .text.rvtest 00000000 spcl_Mchk4ecall +800043c4 l .text.rvtest 00000000 spcl_Mparam_chk +80004e50 l .text.rvtest 00000000 Mrtn2mmode +80004954 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800043d8 l .text.rvtest 00000000 Mgoto_mchk +800043dc l .text.rvtest 00000000 tsbi_Mdispatch +80004404 l .text.rvtest 00000000 tsbi_Mgoto_mode +800043f4 l .text.rvtest 00000000 tsbi_Mecall_test +80004470 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80004bc0 l .text.rvtest 00000000 resto_Mrtn +80004430 l .text.rvtest 00000000 tsbi_Mgoto_m +80004440 l .text.rvtest 00000000 tsbi_Mgoto_s +8000445c l .text.rvtest 00000000 tsbi_Mgoto_u +8000446c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800045f0 l .text.rvtest 00000000 tsbi_instr_table +800044a0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800044b4 l .text.rvtest 00000000 found_instr +800044f8 l .text.rvtest 00000000 tsbi_instr_not_found +800044e4 l .text.rvtest 00000000 tsbi_instr_rtn +80010ea9 l .data 00000000 tsbi_instr_not_found_str +800069d8 l .text.rvtest 00000000 failedtest_hex_to_str +8000f318 l .data 00000000 ascii_buffer +8000f930 l .data 00000000 newlinestr +80004970 l .text.rvtest 00000000 Mxcpt_sig_sv +8000495c l .text.rvtest 00000000 Mint_sig_sv +80004970 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f2f8 l .data 00000000 saved_xepc +8001ff1c l .data 00000000 sig_end_canary +80004a08 l .text.rvtest 00000000 sv_Mvect +8000fa32 l .data 00000000 sv_Mvect_str +80004aac l .text.rvtest 00000000 sv_Mcause +8000fb34 l .data 00000000 sv_Mcause_str +80004be0 l .text.rvtest 00000000 common_Mint_handler +80004ad4 l .text.rvtest 00000000 common_Mexcpt_handler +80004ae0 l .text.rvtest 00000000 vmem_adj_Mepc +80004b34 l .text.rvtest 00000000 sv_Mepc +80004b08 l .text.rvtest 00000000 code_adj_Mepc +80004b30 l .text.rvtest 00000000 adj_Mepc +80004b1c l .text.rvtest 00000000 data_adj_Mepc +8000fc2f l .data 00000000 sv_Mepc_str +80004b54 l .text.rvtest 00000000 skpsv_Mepc +80004b7c l .text.rvtest 00000000 adj_Mepc_rtn +80004b88 l .text.rvtest 00000000 skp_adj_Mepc +80004b8c l .text.rvtest 00000000 sv_Mtval +8000fd22 l .data 00000000 sv_Mtval_str +80004bac l .text.rvtest 00000000 skp_Mtval +80004bb8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80004c18 l .text.rvtest 00000000 spcl_Mhandler +80004bf4 l .text.rvtest 00000000 sv_Mip +8000fe95 l .data 00000000 sv_Mip_str +80004c34 l .text.rvtest 00000000 spcl_Mdispatch_handling +80004c4c l .text.rvtest 00000000 spcl_Mdispatch +80004c50 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80004d50 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +80004ea0 l .text.rvtest 00000000 rtn_fm_mmode +80004e8c l .text.rvtest 00000000 from_hs_u +80004e7c l .text.rvtest 00000000 from_vs +8000f1b0 l .data 00000000 begin_failure_scratch +80004f5c l .text.rvtest 00000000 failedtest_saveregs +80004fcc l .text.rvtest 00000000 failedtest_saveresults +8000f1b0 l .data 00000000 failure_type +8000516c l .text.rvtest 00000000 failedtest_saveresults_trap +80004fdc l .text.rvtest 00000000 failedtest_saveresults_int +800050f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000512c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005460 l .text.rvtest 00000000 failedtest_saveresults_common +8000f2d8 l .data 00000000 failure_diag_type +8000f2e8 l .data 00000000 trap_diag_fail_str_ptr +80005420 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000f2e0 l .data 00000000 trap_diag_subtype +80005434 l .text.rvtest 00000000 trap_diag_field_identified +8000fe19 l .data 00000000 sv_Mtval2_str +8000fe57 l .data 00000000 sv_Mtinst_str +8000fa72 l .data 00000000 sv_Svect_str +8000fb72 l .data 00000000 sv_Scause_str +8000fc6b l .data 00000000 sv_Sepc_str +8000fd5f l .data 00000000 sv_Stval_str +8000fed0 l .data 00000000 sv_Sip_str +8000fab2 l .data 00000000 sv_Hvect_str +8000fbb0 l .data 00000000 sv_Hcause_str +8000fca7 l .data 00000000 sv_Hepc_str +8000fd9c l .data 00000000 sv_Htval_str +8000ff0b l .data 00000000 sv_Hip_str +8000faf3 l .data 00000000 sv_Vvect_str +8000fbef l .data 00000000 sv_Vcause_str +8000fce4 l .data 00000000 sv_Vepc_str +8000fdda l .data 00000000 sv_Vtval_str +8000ff47 l .data 00000000 sv_Vip_str +8000ff84 l .data 00000000 Mclr_Mext_int_str +8000ffd3 l .data 00000000 Mclr_Sext_int_str +800100ce l .data 00000000 Sclr_Sext_int_str +800101ca l .data 00000000 Hclr_Sext_int_str +80005450 l .text.rvtest 00000000 trap_diag_generic_report +8000f2e4 l .data 00000000 trap_diag_mode +80005490 l .text.rvtest 00000000 failedtest_report +80005490 l .text.rvtest 00000000 print_failstr +80005508 l .text.rvtest 00000000 print_testnamestr +8000f91e l .data 00000000 testnamestr +80005548 l .text.rvtest 00000000 print_failure_test_name_str +8000f2d0 l .data 00000000 failure_string_ptr +80005558 l .text.rvtest 00000000 print_newline_str +80005acc l .text.rvtest 00000000 failedtest_report_trap_detailed +8000f932 l .data 00000000 inststr +8000f2b0 l .data 00000000 failing_instruction +8000f946 l .data 00000000 addrstr +8000f2b8 l .data 00000000 failing_addr +8001037d l .data 00000000 regstr +80005738 l .text.rvtest 00000000 failedtest_report_not_intreg +8000f2b4 l .data 00000000 failing_reg +80006a54 l .text.rvtest 00000000 failedtest_dec_to_str +8000584c l .text.rvtest 00000000 failedtest_report_print_regstr +8000578c l .text.rvtest 00000000 failedtest_report_fpreg +800057d8 l .text.rvtest 00000000 failedtest_report_vecreg +80005814 l .text.rvtest 00000000 failedtest_report_vxsat +80010493 l .data 00000000 fflagsstr +80005888 l .text.rvtest 00000000 failedtest_report_after_reg +80010376 l .data 00000000 vxsatstr +8001038e l .data 00000000 badvalstr +800058ec l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000f2c0 l .data 00000000 failing_value +800058fc l .text.rvtest 00000000 failedtest_report_badval_done +800059cc l .text.rvtest 00000000 failedtest_report_diag +800103a5 l .data 00000000 expvalstr +8000598c l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000f2c8 l .data 00000000 expected_value +8000599c l .text.rvtest 00000000 failedtest_report_expval_done +80006784 l .text.rvtest 00000000 failedtest_report_end +80005a4c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +800059d4 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +800103bc l .data 00000000 failure_diag_bad_instr_str +8001041a l .data 00000000 failure_diag_bad_ptr_str +80005b90 l .text.rvtest 00000000 trap_report_offset_mismatch +800104bf l .data 00000000 trap_diag_header_str +800104eb l .data 00000000 trap_diag_origstr_label +80006610 l .text.rvtest 00000000 trap_report_generic +80005ecc l .text.rvtest 00000000 trap_report_field_mismatch +800104fb l .data 00000000 trap_diag_expected_offset_str +80010526 l .data 00000000 trap_diag_actual_offset_str +80005dac l .text.rvtest 00000000 trap_report_missing_traps +80005c9c l .text.rvtest 00000000 trap_report_extra_traps +80010555 l .data 00000000 trap_diag_extra_traps_str +800105bd l .data 00000000 trap_diag_diff_bytes_str +800105e4 l .data 00000000 trap_diag_extra_next_step_str +80010581 l .data 00000000 trap_diag_missing_traps_str +800106cc l .data 00000000 trap_diag_missing_next_step_str +800107b3 l .data 00000000 trap_diag_handler_mode_str +80005f64 l .text.rvtest 00000000 trap_mode_m +80005fa4 l .text.rvtest 00000000 trap_mode_s +80005fe4 l .text.rvtest 00000000 trap_mode_h +80006024 l .text.rvtest 00000000 trap_mode_v +800107ef l .data 00000000 trap_diag_mode_unknown_str +80006060 l .text.rvtest 00000000 trap_mode_print +800107cd l .data 00000000 trap_diag_mode_m_str +800107d5 l .data 00000000 trap_diag_mode_s_str +800107dd l .data 00000000 trap_diag_mode_hs_str +800107e6 l .data 00000000 trap_diag_mode_vs_str +800107f8 l .data 00000000 trap_diag_field_str +80006124 l .text.rvtest 00000000 trap_field_vect +80006164 l .text.rvtest 00000000 trap_field_cause +800061a4 l .text.rvtest 00000000 trap_field_epc +800061e4 l .text.rvtest 00000000 trap_field_tval +80006224 l .text.rvtest 00000000 trap_field_ip +80006264 l .text.rvtest 00000000 trap_field_tval2 +800062a4 l .text.rvtest 00000000 trap_field_tinst +800062e4 l .text.rvtest 00000000 trap_field_intid +8001094f l .data 00000000 trap_diag_field_unknown_str +80006320 l .text.rvtest 00000000 trap_field_print +80010812 l .data 00000000 trap_diag_field_vect_str +80010843 l .data 00000000 trap_diag_field_cause_str +80010863 l .data 00000000 trap_diag_field_epc_str +80010881 l .data 00000000 trap_diag_field_tval_str +800108a0 l .data 00000000 trap_diag_field_ip_str +800108c8 l .data 00000000 trap_diag_field_tval2_str +800108f4 l .data 00000000 trap_diag_field_tinst_str +80010920 l .data 00000000 trap_diag_field_intid_str +8001095e l .data 00000000 trap_diag_expected_str +80010975 l .data 00000000 trap_diag_actual_str +800064bc l .text.rvtest 00000000 trap_field_not_cause +8001098c l .data 00000000 trap_diag_expected_cause_name_str +800066f4 l .text.rvtest 00000000 trap_cause_to_str +800109a3 l .data 00000000 trap_diag_actual_cause_name_str +800064bc l .text.rvtest 00000000 trap_field_not_epc +800067d0 l .text.rvtest 00000000 failedtest_print_csr_context +80010a19 l .data 00000000 trap_diag_hint_vect_str +80010aef l .data 00000000 trap_diag_hint_cause_str +80010be2 l .data 00000000 trap_diag_hint_epc_str +80010cdd l .data 00000000 trap_diag_hint_tval_str +80010dc4 l .data 00000000 trap_diag_hint_ip_str +800109d1 l .data 00000000 trap_diag_generic_str +8000f9ba l .data 00000000 xepcinstrstr +80006718 l .text.rvtest 00000000 trap_cause_interrupt +800066f8 l .text.rvtest 00000000 trap_cause_exception +80006744 l .text.rvtest 00000000 trap_cause_unknown +8000f340 l .data 00000000 trap_excpt_name_tbl +8000f3a0 l .data 00000000 trap_int_name_tbl +8000f7de l .data 00000000 trap_cause_unknown_str +800067c8 l .text.rvtest 00000000 failedtest_terminate +8000f2f0 l .data 00000000 csr_context_ret_addr +8000f9db l .data 00000000 mepcstr +8000f9eb l .data 00000000 mcausestr +8000f300 l .data 00000000 saved_xcause +8000f9fb l .data 00000000 mtvalstr +8000f308 l .data 00000000 saved_xtval +8000fa0b l .data 00000000 mstatusstr +8000f310 l .data 00000000 saved_xstatus +80006a18 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80006a34 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80006a38 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80010ef0 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +8001049b l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000f340 l .data 00000000 end_failure_scratch +8000f3e0 l .data 00000000 trap_excpt_name_0 +8000f400 l .data 00000000 trap_excpt_name_1 +8000f41a l .data 00000000 trap_excpt_name_2 +8000f42f l .data 00000000 trap_excpt_name_3 +8000f43b l .data 00000000 trap_excpt_name_4 +8000f454 l .data 00000000 trap_excpt_name_5 +8000f467 l .data 00000000 trap_excpt_name_6 +8000f485 l .data 00000000 trap_excpt_name_7 +8000f49d l .data 00000000 trap_excpt_name_8 +8000f4bb l .data 00000000 trap_excpt_name_9 +8000f4d9 l .data 00000000 trap_excpt_name_10 +8000f4f8 l .data 00000000 trap_excpt_name_11 +8000f516 l .data 00000000 trap_excpt_name_12 +8000f52e l .data 00000000 trap_excpt_name_13 +8000f53f l .data 00000000 trap_excpt_name_14 +8000f54e l .data 00000000 trap_excpt_name_15 +8000f564 l .data 00000000 trap_excpt_name_16 +8000f571 l .data 00000000 trap_excpt_name_17 +8000f580 l .data 00000000 trap_excpt_name_18 +8000f590 l .data 00000000 trap_excpt_name_19 +8000f5a0 l .data 00000000 trap_excpt_name_20 +8000f5be l .data 00000000 trap_excpt_name_21 +8000f5d5 l .data 00000000 trap_excpt_name_22 +8000f5ea l .data 00000000 trap_excpt_name_23 +8000f606 l .data 00000000 trap_int_name_0 +8000f61e l .data 00000000 trap_int_name_1 +8000f63d l .data 00000000 trap_int_name_2 +8000f664 l .data 00000000 trap_int_name_3 +8000f680 l .data 00000000 trap_int_name_4 +8000f698 l .data 00000000 trap_int_name_5 +8000f6b4 l .data 00000000 trap_int_name_6 +8000f6d8 l .data 00000000 trap_int_name_7 +8000f6f1 l .data 00000000 trap_int_name_8 +8000f709 l .data 00000000 trap_int_name_9 +8000f728 l .data 00000000 trap_int_name_10 +8000f74f l .data 00000000 trap_int_name_11 +8000f76b l .data 00000000 trap_int_name_12 +8000f790 l .data 00000000 trap_int_name_13 +8000f7ac l .data 00000000 trap_int_name_14 +8000f7c5 l .data 00000000 trap_int_name_15 +8000f987 l .data 00000000 xepcstr +80010025 l .data 00000000 Mclr_Vext_int_str +8001007f l .data 00000000 Sclr_Mext_int_str +80010120 l .data 00000000 Sclr_Vext_int_str +8001017a l .data 00000000 Hclr_Mext_int_str +8001021d l .data 00000000 Hclr_Vext_int_str +80010278 l .data 00000000 Vclr_Mext_int_str +800102c8 l .data 00000000 Vclr_Sext_int_str +8001031b l .data 00000000 Vclr_Vext_int_str +800109ba l .data 00000000 trap_diag_curr_xepc_str +8001ff20 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +8001ff20 g .data 00000000 rvtest_sig_end +80004358 g .text.rvtest 00000000 common_Mentry +80003e9c g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80010ef0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80003e44 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80010ef0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +80010eed g .data 00000000 rvtest_data_end +80003e44 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020100 g .tohost 00000000 fromhost +80020000 g .tohost 00000000 tohost +800040f0 g .text.rvtest 00000000 rvtest_fail_summary +80004180 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd2c7373c +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x4e90095f +80000048: 0001a903 lw x18,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_pack_cg_cp_rs1_b0: + pack x24, x0, x18 # perform operation +80000050: 09204c33 pack x24,x0,x18 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_pack_cg_cp_rs1_b0, Zbkb_pack_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01820863 beq x4,x24,80000068 +8000005c: 665042ef jal x5,80004ec0 +80000060: 80000050 .word 0x80000050 +80000064: 80008ed0 .word 0x80008ed0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xace328a7 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x16ee561a +80000074: 0001ac03 lw x24,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_pack_cg_cp_rs1_b1: + pack x19, x1, x24 # perform operation +8000007c: 0980c9b3 pack x19,x1,x24 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_pack_cg_cp_rs1_b1, Zbkb_pack_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01320863 beq x4,x19,80000094 +80000088: 639042ef jal x5,80004ec0 +8000008c: 8000007c .word 0x8000007c +80000090: 80008f01 .word 0x80008f01 +80000094: 00410113 addi x2,x2,4 + + mv x20, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010a13 addi x20,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x9f6f388f +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x2771d249 +800000a4: 0001a483 lw x9,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_pack_cg_cp_rs1_b2: + pack x27, x2, x9 # perform operation +800000ac: 08914db3 pack x27,x2,x9 + # Check if x27 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x27, Zbkb_pack_cg_cp_rs1_b2, Zbkb_pack_cg_cp_rs1_b2_str) +800000b0: 000a2203 lw x4,0(x20) +800000b4: 01b20863 beq x4,x27,800000c4 +800000b8: 609042ef jal x5,80004ec0 +800000bc: 800000ac .word 0x800000ac +800000c0: 80008f32 .word 0x80008f32 +800000c4: 004a0a13 addi x20,x20,4 + + mv x26, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018d13 addi x26,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x95ee9bc3 +800000cc: 000d2183 lw x3,0(x26) +800000d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xce50767f +800000d4: 000d2403 lw x8,0(x26) +800000d8: 004d0d13 addi x26,x26,4 + +800000dc : +Zbkb_pack_cg_cp_rs1_b3: + pack x6, x3, x8 # perform operation +800000dc: 0881c333 pack x6,x3,x8 + # Check if x6 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x6, Zbkb_pack_cg_cp_rs1_b3, Zbkb_pack_cg_cp_rs1_b3_str) +800000e0: 000a2203 lw x4,0(x20) +800000e4: 00620863 beq x4,x6,800000f4 +800000e8: 5d9042ef jal x5,80004ec0 +800000ec: 800000dc .word 0x800000dc +800000f0: 80008f63 .word 0x80008f63 +800000f4: 004a0a13 addi x20,x20,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x0fa94323 +80000100: 000d2203 lw x4,0(x26) +80000104: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xd9bcceab +80000108: 000d2e03 lw x28,0(x26) +8000010c: 004d0d13 addi x26,x26,4 + +80000110 : +Zbkb_pack_cg_cp_rs1_b4: + pack x3, x4, x28 # perform operation +80000110: 09c241b3 pack x3,x4,x28 + # Check if x3 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x3, Zbkb_pack_cg_cp_rs1_b4, Zbkb_pack_cg_cp_rs1_b4_str) +80000114: 000a2683 lw x13,0(x20) +80000118: 00368863 beq x13,x3,80000128 +8000011c: 5e50476f jal x14,80004f00 +80000120: 80000110 .word 0x80000110 +80000124: 80008f94 .word 0x80008f94 +80000128: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x5b59e854 +8000012c: 000d2283 lw x5,0(x26) +80000130: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x2cd788db +80000134: 000d2203 lw x4,0(x26) +80000138: 004d0d13 addi x26,x26,4 + +8000013c : +Zbkb_pack_cg_cp_rs1_b5: + pack x15, x5, x4 # perform operation +8000013c: 0842c7b3 pack x15,x5,x4 + # Check if x15 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x15, Zbkb_pack_cg_cp_rs1_b5, Zbkb_pack_cg_cp_rs1_b5_str) +80000140: 000a2683 lw x13,0(x20) +80000144: 00f68863 beq x13,x15,80000154 +80000148: 5b90476f jal x14,80004f00 +8000014c: 8000013c .word 0x8000013c +80000150: 80008fc5 .word 0x80008fc5 +80000154: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x80bcc838 +80000158: 000d2303 lw x6,0(x26) +8000015c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x9029eb37 +80000160: 000d2c03 lw x24,0(x26) +80000164: 004d0d13 addi x26,x26,4 + +80000168 : +Zbkb_pack_cg_cp_rs1_b6: + pack x22, x6, x24 # perform operation +80000168: 09834b33 pack x22,x6,x24 + # Check if x22 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x22, Zbkb_pack_cg_cp_rs1_b6, Zbkb_pack_cg_cp_rs1_b6_str) +8000016c: 000a2683 lw x13,0(x20) +80000170: 01668863 beq x13,x22,80000180 +80000174: 58d0476f jal x14,80004f00 +80000178: 80000168 .word 0x80000168 +8000017c: 80008ff6 .word 0x80008ff6 +80000180: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xebfb0104 +80000184: 000d2383 lw x7,0(x26) +80000188: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x24a68d18 +8000018c: 000d2b03 lw x22,0(x26) +80000190: 004d0d13 addi x26,x26,4 + +80000194 : +Zbkb_pack_cg_cp_rs1_b7: + pack x1, x7, x22 # perform operation +80000194: 0963c0b3 pack x1,x7,x22 + # Check if x1 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x1, Zbkb_pack_cg_cp_rs1_b7, Zbkb_pack_cg_cp_rs1_b7_str) +80000198: 000a2683 lw x13,0(x20) +8000019c: 00168863 beq x13,x1,800001ac +800001a0: 5610476f jal x14,80004f00 +800001a4: 80000194 .word 0x80000194 +800001a8: 80009027 .word 0x80009027 +800001ac: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xcd19a4e6 +800001b0: 000d2403 lw x8,0(x26) +800001b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x65ea4c43 +800001b8: 000d2483 lw x9,0(x26) +800001bc: 004d0d13 addi x26,x26,4 + +800001c0 : +Zbkb_pack_cg_cp_rs1_b8: + pack x1, x8, x9 # perform operation +800001c0: 089440b3 pack x1,x8,x9 + # Check if x1 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x1, Zbkb_pack_cg_cp_rs1_b8, Zbkb_pack_cg_cp_rs1_b8_str) +800001c4: 000a2683 lw x13,0(x20) +800001c8: 00168863 beq x13,x1,800001d8 +800001cc: 5350476f jal x14,80004f00 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80009058 .word 0x80009058 +800001d8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xcddf8157 +800001dc: 000d2483 lw x9,0(x26) +800001e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xef603092 +800001e4: 000d2603 lw x12,0(x26) +800001e8: 004d0d13 addi x26,x26,4 + +800001ec : +Zbkb_pack_cg_cp_rs1_b9: + pack x4, x9, x12 # perform operation +800001ec: 08c4c233 pack x4,x9,x12 + # Check if x4 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x4, Zbkb_pack_cg_cp_rs1_b9, Zbkb_pack_cg_cp_rs1_b9_str) +800001f0: 000a2683 lw x13,0(x20) +800001f4: 00468863 beq x13,x4,80000204 +800001f8: 5090476f jal x14,80004f00 +800001fc: 800001ec .word 0x800001ec +80000200: 80009089 .word 0x80009089 +80000204: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x276c2d34 +80000208: 000d2503 lw x10,0(x26) +8000020c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x012079ae +80000210: 000d2c03 lw x24,0(x26) +80000214: 004d0d13 addi x26,x26,4 + +80000218 : +Zbkb_pack_cg_cp_rs1_b10: + pack x29, x10, x24 # perform operation +80000218: 09854eb3 pack x29,x10,x24 + # Check if x29 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x29, Zbkb_pack_cg_cp_rs1_b10, Zbkb_pack_cg_cp_rs1_b10_str) +8000021c: 000a2683 lw x13,0(x20) +80000220: 01d68863 beq x13,x29,80000230 +80000224: 4dd0476f jal x14,80004f00 +80000228: 80000218 .word 0x80000218 +8000022c: 800090bb .word 0x800090bb +80000230: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x54709423 +80000234: 000d2583 lw x11,0(x26) +80000238: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x2760d9e6 +8000023c: 000d2803 lw x16,0(x26) +80000240: 004d0d13 addi x26,x26,4 + +80000244 : +Zbkb_pack_cg_cp_rs1_b11: + pack x29, x11, x16 # perform operation +80000244: 0905ceb3 pack x29,x11,x16 + # Check if x29 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x29, Zbkb_pack_cg_cp_rs1_b11, Zbkb_pack_cg_cp_rs1_b11_str) +80000248: 000a2683 lw x13,0(x20) +8000024c: 01d68863 beq x13,x29,8000025c +80000250: 4b10476f jal x14,80004f00 +80000254: 80000244 .word 0x80000244 +80000258: 800090ee .word 0x800090ee +8000025c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xd87118e8 +80000260: 000d2603 lw x12,0(x26) +80000264: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xb76c7593 +80000268: 000d2383 lw x7,0(x26) +8000026c: 004d0d13 addi x26,x26,4 + +80000270 : +Zbkb_pack_cg_cp_rs1_b12: + pack x25, x12, x7 # perform operation +80000270: 08764cb3 pack x25,x12,x7 + # Check if x25 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x25, Zbkb_pack_cg_cp_rs1_b12, Zbkb_pack_cg_cp_rs1_b12_str) +80000274: 000a2683 lw x13,0(x20) +80000278: 01968863 beq x13,x25,80000288 +8000027c: 4850476f jal x14,80004f00 +80000280: 80000270 .word 0x80000270 +80000284: 80009121 .word 0x80009121 +80000288: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000028c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000290: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xab9a9698 +80000294: 000d2683 lw x13,0(x26) +80000298: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xdafdb53f +8000029c: 000d2603 lw x12,0(x26) +800002a0: 004d0d13 addi x26,x26,4 + +800002a4 : +Zbkb_pack_cg_cp_rs1_b13: + pack x27, x13, x12 # perform operation +800002a4: 08c6cdb3 pack x27,x13,x12 + # Check if x27 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x27, Zbkb_pack_cg_cp_rs1_b13, Zbkb_pack_cg_cp_rs1_b13_str) +800002a8: 000a2203 lw x4,0(x20) +800002ac: 01b20863 beq x4,x27,800002bc +800002b0: 411042ef jal x5,80004ec0 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 80009154 .word 0x80009154 +800002bc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x0728e6ea +800002c0: 000d2703 lw x14,0(x26) +800002c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x0669032a +800002c8: 000d2f03 lw x30,0(x26) +800002cc: 004d0d13 addi x26,x26,4 + +800002d0 : +Zbkb_pack_cg_cp_rs1_b14: + pack x18, x14, x30 # perform operation +800002d0: 09e74933 pack x18,x14,x30 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkb_pack_cg_cp_rs1_b14, Zbkb_pack_cg_cp_rs1_b14_str) +800002d4: 000a2203 lw x4,0(x20) +800002d8: 01220863 beq x4,x18,800002e8 +800002dc: 3e5042ef jal x5,80004ec0 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 80009187 .word 0x80009187 +800002e8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x13ea1355 +800002ec: 000d2783 lw x15,0(x26) +800002f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xf6c6c3cc +800002f4: 000d2703 lw x14,0(x26) +800002f8: 004d0d13 addi x26,x26,4 + +800002fc : +Zbkb_pack_cg_cp_rs1_b15: + pack x23, x15, x14 # perform operation +800002fc: 08e7cbb3 pack x23,x15,x14 + # Check if x23 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x23, Zbkb_pack_cg_cp_rs1_b15, Zbkb_pack_cg_cp_rs1_b15_str) +80000300: 000a2203 lw x4,0(x20) +80000304: 01720863 beq x4,x23,80000314 +80000308: 3b9042ef jal x5,80004ec0 +8000030c: 800002fc .word 0x800002fc +80000310: 800091ba .word 0x800091ba +80000314: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xe8f3c282 +80000318: 000d2803 lw x16,0(x26) +8000031c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xcb8d6f6a +80000320: 000d2b83 lw x23,0(x26) +80000324: 004d0d13 addi x26,x26,4 + +80000328 : +Zbkb_pack_cg_cp_rs1_b16: + pack x2, x16, x23 # perform operation +80000328: 09784133 pack x2,x16,x23 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zbkb_pack_cg_cp_rs1_b16, Zbkb_pack_cg_cp_rs1_b16_str) +8000032c: 000a2203 lw x4,0(x20) +80000330: 00220863 beq x4,x2,80000340 +80000334: 38d042ef jal x5,80004ec0 +80000338: 80000328 .word 0x80000328 +8000033c: 800091ed .word 0x800091ed +80000340: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x512c0bb5 +80000344: 000d2883 lw x17,0(x26) +80000348: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x1e4195bb +8000034c: 000d2a83 lw x21,0(x26) +80000350: 004d0d13 addi x26,x26,4 + +80000354 : +Zbkb_pack_cg_cp_rs1_b17: + pack x13, x17, x21 # perform operation +80000354: 0958c6b3 pack x13,x17,x21 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkb_pack_cg_cp_rs1_b17, Zbkb_pack_cg_cp_rs1_b17_str) +80000358: 000a2203 lw x4,0(x20) +8000035c: 00d20863 beq x4,x13,8000036c +80000360: 361042ef jal x5,80004ec0 +80000364: 80000354 .word 0x80000354 +80000368: 80009220 .word 0x80009220 +8000036c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xd7172f60 +80000370: 000d2903 lw x18,0(x26) +80000374: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xcfb30f51 +80000378: 000d2783 lw x15,0(x26) +8000037c: 004d0d13 addi x26,x26,4 + +80000380 : +Zbkb_pack_cg_cp_rs1_b18: + pack x3, x18, x15 # perform operation +80000380: 08f941b3 pack x3,x18,x15 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zbkb_pack_cg_cp_rs1_b18, Zbkb_pack_cg_cp_rs1_b18_str) +80000384: 000a2203 lw x4,0(x20) +80000388: 00320863 beq x4,x3,80000398 +8000038c: 335042ef jal x5,80004ec0 +80000390: 80000380 .word 0x80000380 +80000394: 80009253 .word 0x80009253 +80000398: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x3beac975 +8000039c: 000d2983 lw x19,0(x26) +800003a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x4763a20c +800003a4: 000d2703 lw x14,0(x26) +800003a8: 004d0d13 addi x26,x26,4 + +800003ac : +Zbkb_pack_cg_cp_rs1_b19: + pack x31, x19, x14 # perform operation +800003ac: 08e9cfb3 pack x31,x19,x14 + # Check if x31 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x31, Zbkb_pack_cg_cp_rs1_b19, Zbkb_pack_cg_cp_rs1_b19_str) +800003b0: 000a2203 lw x4,0(x20) +800003b4: 01f20863 beq x4,x31,800003c4 +800003b8: 309042ef jal x5,80004ec0 +800003bc: 800003ac .word 0x800003ac +800003c0: 80009286 .word 0x80009286 +800003c4: 004a0a13 addi x20,x20,4 + + mv x31, x20 # switch signature pointer register to avoid conflict with test +800003c8: 000a0f93 addi x31,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x23a48ce5 +800003cc: 000d2a03 lw x20,0(x26) +800003d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xff85ca1a +800003d4: 000d2983 lw x19,0(x26) +800003d8: 004d0d13 addi x26,x26,4 + +800003dc : +Zbkb_pack_cg_cp_rs1_b20: + pack x10, x20, x19 # perform operation +800003dc: 093a4533 pack x10,x20,x19 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zbkb_pack_cg_cp_rs1_b20, Zbkb_pack_cg_cp_rs1_b20_str) +800003e0: 000fa203 lw x4,0(x31) +800003e4: 00a20863 beq x4,x10,800003f4 +800003e8: 2d9042ef jal x5,80004ec0 +800003ec: 800003dc .word 0x800003dc +800003f0: 800092b9 .word 0x800092b9 +800003f4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xa2175fbe +800003f8: 000d2a83 lw x21,0(x26) +800003fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xdb3dcb51 +80000400: 000d2403 lw x8,0(x26) +80000404: 004d0d13 addi x26,x26,4 + +80000408 : +Zbkb_pack_cg_cp_rs1_b21: + pack x12, x21, x8 # perform operation +80000408: 088ac633 pack x12,x21,x8 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zbkb_pack_cg_cp_rs1_b21, Zbkb_pack_cg_cp_rs1_b21_str) +8000040c: 000fa203 lw x4,0(x31) +80000410: 00c20863 beq x4,x12,80000420 +80000414: 2ad042ef jal x5,80004ec0 +80000418: 80000408 .word 0x80000408 +8000041c: 800092ec .word 0x800092ec +80000420: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xb52c7c12 +80000424: 000d2b03 lw x22,0(x26) +80000428: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x6a47182c +8000042c: 000d2983 lw x19,0(x26) +80000430: 004d0d13 addi x26,x26,4 + +80000434 : +Zbkb_pack_cg_cp_rs1_b22: + pack x3, x22, x19 # perform operation +80000434: 093b41b3 pack x3,x22,x19 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zbkb_pack_cg_cp_rs1_b22, Zbkb_pack_cg_cp_rs1_b22_str) +80000438: 000fa203 lw x4,0(x31) +8000043c: 00320863 beq x4,x3,8000044c +80000440: 281042ef jal x5,80004ec0 +80000444: 80000434 .word 0x80000434 +80000448: 8000931f .word 0x8000931f +8000044c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xf5ebf969 +80000450: 000d2b83 lw x23,0(x26) +80000454: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x9d9a8a7f +80000458: 000d2e83 lw x29,0(x26) +8000045c: 004d0d13 addi x26,x26,4 + +80000460 : +Zbkb_pack_cg_cp_rs1_b23: + pack x1, x23, x29 # perform operation +80000460: 09dbc0b3 pack x1,x23,x29 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zbkb_pack_cg_cp_rs1_b23, Zbkb_pack_cg_cp_rs1_b23_str) +80000464: 000fa203 lw x4,0(x31) +80000468: 00120863 beq x4,x1,80000478 +8000046c: 255042ef jal x5,80004ec0 +80000470: 80000460 .word 0x80000460 +80000474: 80009352 .word 0x80009352 +80000478: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x950fb5ae +8000047c: 000d2c03 lw x24,0(x26) +80000480: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xc1cef4b9 +80000484: 000d2a83 lw x21,0(x26) +80000488: 004d0d13 addi x26,x26,4 + +8000048c : +Zbkb_pack_cg_cp_rs1_b24: + pack x2, x24, x21 # perform operation +8000048c: 095c4133 pack x2,x24,x21 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zbkb_pack_cg_cp_rs1_b24, Zbkb_pack_cg_cp_rs1_b24_str) +80000490: 000fa203 lw x4,0(x31) +80000494: 00220863 beq x4,x2,800004a4 +80000498: 229042ef jal x5,80004ec0 +8000049c: 8000048c .word 0x8000048c +800004a0: 80009385 .word 0x80009385 +800004a4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x61d39360 +800004a8: 000d2c83 lw x25,0(x26) +800004ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xcdb78c4d +800004b0: 000d2903 lw x18,0(x26) +800004b4: 004d0d13 addi x26,x26,4 + +800004b8 : +Zbkb_pack_cg_cp_rs1_b25: + pack x21, x25, x18 # perform operation +800004b8: 092ccab3 pack x21,x25,x18 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zbkb_pack_cg_cp_rs1_b25, Zbkb_pack_cg_cp_rs1_b25_str) +800004bc: 000fa203 lw x4,0(x31) +800004c0: 01520863 beq x4,x21,800004d0 +800004c4: 1fd042ef jal x5,80004ec0 +800004c8: 800004b8 .word 0x800004b8 +800004cc: 800093b8 .word 0x800093b8 +800004d0: 004f8f93 addi x31,x31,4 + + mv x24, x26 # switch data pointer register to avoid conflict with test +800004d4: 000d0c13 addi x24,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0xc6853dbd +800004d8: 000c2d03 lw x26,0(x24) +800004dc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x0a4bbab2 +800004e0: 000c2a83 lw x21,0(x24) +800004e4: 004c0c13 addi x24,x24,4 + +800004e8 : +Zbkb_pack_cg_cp_rs1_b26: + pack x6, x26, x21 # perform operation +800004e8: 095d4333 pack x6,x26,x21 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zbkb_pack_cg_cp_rs1_b26, Zbkb_pack_cg_cp_rs1_b26_str) +800004ec: 000fa203 lw x4,0(x31) +800004f0: 00620863 beq x4,x6,80000500 +800004f4: 1cd042ef jal x5,80004ec0 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800093eb .word 0x800093eb +80000500: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x8e42f4ce +80000504: 000c2d83 lw x27,0(x24) +80000508: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xd274703f +8000050c: 000c2183 lw x3,0(x24) +80000510: 004c0c13 addi x24,x24,4 + +80000514 : +Zbkb_pack_cg_cp_rs1_b27: + pack x8, x27, x3 # perform operation +80000514: 083dc433 pack x8,x27,x3 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zbkb_pack_cg_cp_rs1_b27, Zbkb_pack_cg_cp_rs1_b27_str) +80000518: 000fa203 lw x4,0(x31) +8000051c: 00820863 beq x4,x8,8000052c +80000520: 1a1042ef jal x5,80004ec0 +80000524: 80000514 .word 0x80000514 +80000528: 8000941e .word 0x8000941e +8000052c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0xd6a85cc0 +80000530: 000c2e03 lw x28,0(x24) +80000534: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0xdb731bd6 +80000538: 000c2c83 lw x25,0(x24) +8000053c: 004c0c13 addi x24,x24,4 + +80000540 : +Zbkb_pack_cg_cp_rs1_b28: + pack x10, x28, x25 # perform operation +80000540: 099e4533 pack x10,x28,x25 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zbkb_pack_cg_cp_rs1_b28, Zbkb_pack_cg_cp_rs1_b28_str) +80000544: 000fa203 lw x4,0(x31) +80000548: 00a20863 beq x4,x10,80000558 +8000054c: 175042ef jal x5,80004ec0 +80000550: 80000540 .word 0x80000540 +80000554: 80009451 .word 0x80009451 +80000558: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x9e4e1767 +8000055c: 000c2e83 lw x29,0(x24) +80000560: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x9da7f30c +80000564: 000c2d83 lw x27,0(x24) +80000568: 004c0c13 addi x24,x24,4 + +8000056c : +Zbkb_pack_cg_cp_rs1_b29: + pack x12, x29, x27 # perform operation +8000056c: 09bec633 pack x12,x29,x27 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zbkb_pack_cg_cp_rs1_b29, Zbkb_pack_cg_cp_rs1_b29_str) +80000570: 000fa203 lw x4,0(x31) +80000574: 00c20863 beq x4,x12,80000584 +80000578: 149042ef jal x5,80004ec0 +8000057c: 8000056c .word 0x8000056c +80000580: 80009484 .word 0x80009484 +80000584: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0xdc5a23f2 +80000588: 000c2f03 lw x30,0(x24) +8000058c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x3c4d59d1 +80000590: 000c2803 lw x16,0(x24) +80000594: 004c0c13 addi x24,x24,4 + +80000598 : +Zbkb_pack_cg_cp_rs1_b30: + pack x19, x30, x16 # perform operation +80000598: 090f49b3 pack x19,x30,x16 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_pack_cg_cp_rs1_b30, Zbkb_pack_cg_cp_rs1_b30_str) +8000059c: 000fa203 lw x4,0(x31) +800005a0: 01320863 beq x4,x19,800005b0 +800005a4: 11d042ef jal x5,80004ec0 +800005a8: 80000598 .word 0x80000598 +800005ac: 800094b7 .word 0x800094b7 +800005b0: 004f8f93 addi x31,x31,4 + + mv x18, x31 # switch signature pointer register to avoid conflict with test +800005b4: 000f8913 addi x18,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x193ab222 +800005b8: 000c2f83 lw x31,0(x24) +800005bc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xa900a02e +800005c0: 000c2183 lw x3,0(x24) +800005c4: 004c0c13 addi x24,x24,4 + +800005c8 : +Zbkb_pack_cg_cp_rs1_b31: + pack x2, x31, x3 # perform operation +800005c8: 083fc133 pack x2,x31,x3 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_pack_cg_cp_rs1_b31, Zbkb_pack_cg_cp_rs1_b31_str) +800005cc: 00092203 lw x4,0(x18) +800005d0: 00220863 beq x4,x2,800005e0 +800005d4: 0ed042ef jal x5,80004ec0 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 800094ea .word 0x800094ea +800005e0: 00490913 addi x18,x18,4 +///////////////////////////////// +// cp_rs2_nx0 +///////////////////////////////// + +# Testcase cp_rs2_nx0 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x120298ac +800005e4: 000c2403 lw x8,0(x24) +800005e8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0xade99755 +800005ec: 000c2083 lw x1,0(x24) +800005f0: 004c0c13 addi x24,x24,4 + +800005f4 : +Zbkb_pack_cg_cp_rs2_nx0_b1: + pack x22, x8, x1 # perform operation +800005f4: 08144b33 pack x22,x8,x1 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zbkb_pack_cg_cp_rs2_nx0_b1, Zbkb_pack_cg_cp_rs2_nx0_b1_str) +800005f8: 00092203 lw x4,0(x18) +800005fc: 01620863 beq x4,x22,8000060c +80000600: 0c1042ef jal x5,80004ec0 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000951d .word 0x8000951d +8000060c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x1cae4252 +80000610: 000c2403 lw x8,0(x24) +80000614: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0xe27635ce +80000618: 000c2103 lw x2,0(x24) +8000061c: 004c0c13 addi x24,x24,4 + +80000620 : +Zbkb_pack_cg_cp_rs2_nx0_b2: + pack x1, x8, x2 # perform operation +80000620: 082440b3 pack x1,x8,x2 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_pack_cg_cp_rs2_nx0_b2, Zbkb_pack_cg_cp_rs2_nx0_b2_str) +80000624: 00092203 lw x4,0(x18) +80000628: 00120863 beq x4,x1,80000638 +8000062c: 095042ef jal x5,80004ec0 +80000630: 80000620 .word 0x80000620 +80000634: 80009553 .word 0x80009553 +80000638: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x1034e3df +8000063c: 000c2403 lw x8,0(x24) +80000640: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x18d6fdd3 +80000644: 000c2183 lw x3,0(x24) +80000648: 004c0c13 addi x24,x24,4 + +8000064c : +Zbkb_pack_cg_cp_rs2_nx0_b3: + pack x2, x8, x3 # perform operation +8000064c: 08344133 pack x2,x8,x3 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_pack_cg_cp_rs2_nx0_b3, Zbkb_pack_cg_cp_rs2_nx0_b3_str) +80000650: 00092203 lw x4,0(x18) +80000654: 00220863 beq x4,x2,80000664 +80000658: 069042ef jal x5,80004ec0 +8000065c: 8000064c .word 0x8000064c +80000660: 80009589 .word 0x80009589 +80000664: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000668: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +8000066c: 00028413 addi x8,x5,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x1a328e69 +80000670: 000c2b83 lw x23,0(x24) +80000674: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0xbd942147 +80000678: 000c2203 lw x4,0(x24) +8000067c: 004c0c13 addi x24,x24,4 + +80000680 : +Zbkb_pack_cg_cp_rs2_nx0_b4: + pack x9, x23, x4 # perform operation +80000680: 084bc4b3 pack x9,x23,x4 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zbkb_pack_cg_cp_rs2_nx0_b4, Zbkb_pack_cg_cp_rs2_nx0_b4_str) +80000684: 00092383 lw x7,0(x18) +80000688: 00938863 beq x7,x9,80000698 +8000068c: 04d0446f jal x8,80004ed8 +80000690: 80000680 .word 0x80000680 +80000694: 800095bf .word 0x800095bf +80000698: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x4e9e6f94 +8000069c: 000c2703 lw x14,0(x24) +800006a0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0398ed88 +800006a4: 000c2283 lw x5,0(x24) +800006a8: 004c0c13 addi x24,x24,4 + +800006ac : +Zbkb_pack_cg_cp_rs2_nx0_b5: + pack x12, x14, x5 # perform operation +800006ac: 08574633 pack x12,x14,x5 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zbkb_pack_cg_cp_rs2_nx0_b5, Zbkb_pack_cg_cp_rs2_nx0_b5_str) +800006b0: 00092383 lw x7,0(x18) +800006b4: 00c38863 beq x7,x12,800006c4 +800006b8: 0210446f jal x8,80004ed8 +800006bc: 800006ac .word 0x800006ac +800006c0: 800095f5 .word 0x800095f5 +800006c4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x4e1d3df6 +800006c8: 000c2d83 lw x27,0(x24) +800006cc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x110a9bc8 +800006d0: 000c2303 lw x6,0(x24) +800006d4: 004c0c13 addi x24,x24,4 + +800006d8 : +Zbkb_pack_cg_cp_rs2_nx0_b6: + pack x28, x27, x6 # perform operation +800006d8: 086dce33 pack x28,x27,x6 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zbkb_pack_cg_cp_rs2_nx0_b6, Zbkb_pack_cg_cp_rs2_nx0_b6_str) +800006dc: 00092383 lw x7,0(x18) +800006e0: 01c38863 beq x7,x28,800006f0 +800006e4: 7f40446f jal x8,80004ed8 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000962b .word 0x8000962b +800006f0: 00490913 addi x18,x18,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800006f4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800006f8: 00040713 addi x14,x8,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x94f1e408 +800006fc: 000c2303 lw x6,0(x24) +80000700: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x77b8b621 +80000704: 000c2383 lw x7,0(x24) +80000708: 004c0c13 addi x24,x24,4 + +8000070c : +Zbkb_pack_cg_cp_rs2_nx0_b7: + pack x9, x6, x7 # perform operation +8000070c: 087344b3 pack x9,x6,x7 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_pack_cg_cp_rs2_nx0_b7, Zbkb_pack_cg_cp_rs2_nx0_b7_str) +80000710: 00092683 lw x13,0(x18) +80000714: 00968863 beq x13,x9,80000724 +80000718: 7e80476f jal x14,80004f00 +8000071c: 8000070c .word 0x8000070c +80000720: 80009661 .word 0x80009661 +80000724: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xdeb51e07 +80000728: 000c2183 lw x3,0(x24) +8000072c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x06c42ca1 +80000730: 000c2403 lw x8,0(x24) +80000734: 004c0c13 addi x24,x24,4 + +80000738 : +Zbkb_pack_cg_cp_rs2_nx0_b8: + pack x25, x3, x8 # perform operation +80000738: 0881ccb3 pack x25,x3,x8 + # Check if x25 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x25, Zbkb_pack_cg_cp_rs2_nx0_b8, Zbkb_pack_cg_cp_rs2_nx0_b8_str) +8000073c: 00092683 lw x13,0(x18) +80000740: 01968863 beq x13,x25,80000750 +80000744: 7bc0476f jal x14,80004f00 +80000748: 80000738 .word 0x80000738 +8000074c: 80009697 .word 0x80009697 +80000750: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xea147b9f +80000754: 000c2883 lw x17,0(x24) +80000758: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0fd98d3e +8000075c: 000c2483 lw x9,0(x24) +80000760: 004c0c13 addi x24,x24,4 + +80000764 : +Zbkb_pack_cg_cp_rs2_nx0_b9: + pack x7, x17, x9 # perform operation +80000764: 0898c3b3 pack x7,x17,x9 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_pack_cg_cp_rs2_nx0_b9, Zbkb_pack_cg_cp_rs2_nx0_b9_str) +80000768: 00092683 lw x13,0(x18) +8000076c: 00768863 beq x13,x7,8000077c +80000770: 7900476f jal x14,80004f00 +80000774: 80000764 .word 0x80000764 +80000778: 800096cd .word 0x800096cd +8000077c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xd38750cb +80000780: 000c2303 lw x6,0(x24) +80000784: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x7a8168c6 +80000788: 000c2503 lw x10,0(x24) +8000078c: 004c0c13 addi x24,x24,4 + +80000790 : +Zbkb_pack_cg_cp_rs2_nx0_b10: + pack x19, x6, x10 # perform operation +80000790: 08a349b3 pack x19,x6,x10 + # Check if x19 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x19, Zbkb_pack_cg_cp_rs2_nx0_b10, Zbkb_pack_cg_cp_rs2_nx0_b10_str) +80000794: 00092683 lw x13,0(x18) +80000798: 01368863 beq x13,x19,800007a8 +8000079c: 7640476f jal x14,80004f00 +800007a0: 80000790 .word 0x80000790 +800007a4: 80009703 .word 0x80009703 +800007a8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xb7ad5312 +800007ac: 000c2e83 lw x29,0(x24) +800007b0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x2ad63d89 +800007b4: 000c2583 lw x11,0(x24) +800007b8: 004c0c13 addi x24,x24,4 + +800007bc : +Zbkb_pack_cg_cp_rs2_nx0_b11: + pack x27, x29, x11 # perform operation +800007bc: 08becdb3 pack x27,x29,x11 + # Check if x27 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x27, Zbkb_pack_cg_cp_rs2_nx0_b11, Zbkb_pack_cg_cp_rs2_nx0_b11_str) +800007c0: 00092683 lw x13,0(x18) +800007c4: 01b68863 beq x13,x27,800007d4 +800007c8: 7380476f jal x14,80004f00 +800007cc: 800007bc .word 0x800007bc +800007d0: 8000973a .word 0x8000973a +800007d4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xfc5e0cf8 +800007d8: 000c2583 lw x11,0(x24) +800007dc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0x28a699b3 +800007e0: 000c2603 lw x12,0(x24) +800007e4: 004c0c13 addi x24,x24,4 + +800007e8 : +Zbkb_pack_cg_cp_rs2_nx0_b12: + pack x3, x11, x12 # perform operation +800007e8: 08c5c1b3 pack x3,x11,x12 + # Check if x3 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x3, Zbkb_pack_cg_cp_rs2_nx0_b12, Zbkb_pack_cg_cp_rs2_nx0_b12_str) +800007ec: 00092683 lw x13,0(x18) +800007f0: 00368863 beq x13,x3,80000800 +800007f4: 70c0476f jal x14,80004f00 +800007f8: 800007e8 .word 0x800007e8 +800007fc: 80009771 .word 0x80009771 +80000800: 00490913 addi x18,x18,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000804: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000808: 00070413 addi x8,x14,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x856baccc +8000080c: 000c2d03 lw x26,0(x24) +80000810: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xedd8ce8a +80000814: 000c2683 lw x13,0(x24) +80000818: 004c0c13 addi x24,x24,4 + +8000081c : +Zbkb_pack_cg_cp_rs2_nx0_b13: + pack x25, x26, x13 # perform operation +8000081c: 08dd4cb3 pack x25,x26,x13 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zbkb_pack_cg_cp_rs2_nx0_b13, Zbkb_pack_cg_cp_rs2_nx0_b13_str) +80000820: 00092383 lw x7,0(x18) +80000824: 01938863 beq x7,x25,80000834 +80000828: 6b00446f jal x8,80004ed8 +8000082c: 8000081c .word 0x8000081c +80000830: 800097a8 .word 0x800097a8 +80000834: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x7cba5d35 +80000838: 000c2d03 lw x26,0(x24) +8000083c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x3562030d +80000840: 000c2703 lw x14,0(x24) +80000844: 004c0c13 addi x24,x24,4 + +80000848 : +Zbkb_pack_cg_cp_rs2_nx0_b14: + pack x0, x26, x14 # perform operation +80000848: 08ed4033 pack x0,x26,x14 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zbkb_pack_cg_cp_rs2_nx0_b14, Zbkb_pack_cg_cp_rs2_nx0_b14_str) +8000084c: 00092383 lw x7,0(x18) +80000850: 00038863 beq x7,x0,80000860 +80000854: 6840446f jal x8,80004ed8 +80000858: 80000848 .word 0x80000848 +8000085c: 800097df .word 0x800097df +80000860: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x3da8c7a9 +80000864: 000c2883 lw x17,0(x24) +80000868: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x28e7e516 +8000086c: 000c2783 lw x15,0(x24) +80000870: 004c0c13 addi x24,x24,4 + +80000874 : +Zbkb_pack_cg_cp_rs2_nx0_b15: + pack x16, x17, x15 # perform operation +80000874: 08f8c833 pack x16,x17,x15 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_pack_cg_cp_rs2_nx0_b15, Zbkb_pack_cg_cp_rs2_nx0_b15_str) +80000878: 00092383 lw x7,0(x18) +8000087c: 01038863 beq x7,x16,8000088c +80000880: 6580446f jal x8,80004ed8 +80000884: 80000874 .word 0x80000874 +80000888: 80009816 .word 0x80009816 +8000088c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x45ef5dc9 +80000890: 000c2203 lw x4,0(x24) +80000894: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x87523a94 +80000898: 000c2803 lw x16,0(x24) +8000089c: 004c0c13 addi x24,x24,4 + +800008a0 : +Zbkb_pack_cg_cp_rs2_nx0_b16: + pack x11, x4, x16 # perform operation +800008a0: 090245b3 pack x11,x4,x16 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zbkb_pack_cg_cp_rs2_nx0_b16, Zbkb_pack_cg_cp_rs2_nx0_b16_str) +800008a4: 00092383 lw x7,0(x18) +800008a8: 00b38863 beq x7,x11,800008b8 +800008ac: 62c0446f jal x8,80004ed8 +800008b0: 800008a0 .word 0x800008a0 +800008b4: 8000984d .word 0x8000984d +800008b8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x5651a205 +800008bc: 000c2e83 lw x29,0(x24) +800008c0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x14836193 +800008c4: 000c2883 lw x17,0(x24) +800008c8: 004c0c13 addi x24,x24,4 + +800008cc : +Zbkb_pack_cg_cp_rs2_nx0_b17: + pack x4, x29, x17 # perform operation +800008cc: 091ec233 pack x4,x29,x17 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zbkb_pack_cg_cp_rs2_nx0_b17, Zbkb_pack_cg_cp_rs2_nx0_b17_str) +800008d0: 00092383 lw x7,0(x18) +800008d4: 00438863 beq x7,x4,800008e4 +800008d8: 6000446f jal x8,80004ed8 +800008dc: 800008cc .word 0x800008cc +800008e0: 80009884 .word 0x80009884 +800008e4: 00490913 addi x18,x18,4 + + mv x16, x18 # switch signature pointer register to avoid conflict with test +800008e8: 00090813 addi x16,x18,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0xf5dbd8a1 +800008ec: 000c2d03 lw x26,0(x24) +800008f0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xf7d249e6 +800008f4: 000c2903 lw x18,0(x24) +800008f8: 004c0c13 addi x24,x24,4 + +800008fc : +Zbkb_pack_cg_cp_rs2_nx0_b18: + pack x2, x26, x18 # perform operation +800008fc: 092d4133 pack x2,x26,x18 + # Check if x2 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x2, Zbkb_pack_cg_cp_rs2_nx0_b18, Zbkb_pack_cg_cp_rs2_nx0_b18_str) +80000900: 00082383 lw x7,0(x16) +80000904: 00238863 beq x7,x2,80000914 +80000908: 5d00446f jal x8,80004ed8 +8000090c: 800008fc .word 0x800008fc +80000910: 800098bb .word 0x800098bb +80000914: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x35feda33 +80000918: 000c2b03 lw x22,0(x24) +8000091c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xc1310874 +80000920: 000c2983 lw x19,0(x24) +80000924: 004c0c13 addi x24,x24,4 + +80000928 : +Zbkb_pack_cg_cp_rs2_nx0_b19: + pack x13, x22, x19 # perform operation +80000928: 093b46b3 pack x13,x22,x19 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zbkb_pack_cg_cp_rs2_nx0_b19, Zbkb_pack_cg_cp_rs2_nx0_b19_str) +8000092c: 00082383 lw x7,0(x16) +80000930: 00d38863 beq x7,x13,80000940 +80000934: 5a40446f jal x8,80004ed8 +80000938: 80000928 .word 0x80000928 +8000093c: 800098f2 .word 0x800098f2 +80000940: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x14d2b5b5 +80000944: 000c2603 lw x12,0(x24) +80000948: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x5e8ce567 +8000094c: 000c2a03 lw x20,0(x24) +80000950: 004c0c13 addi x24,x24,4 + +80000954 : +Zbkb_pack_cg_cp_rs2_nx0_b20: + pack x19, x12, x20 # perform operation +80000954: 094649b3 pack x19,x12,x20 + # Check if x19 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x19, Zbkb_pack_cg_cp_rs2_nx0_b20, Zbkb_pack_cg_cp_rs2_nx0_b20_str) +80000958: 00082383 lw x7,0(x16) +8000095c: 01338863 beq x7,x19,8000096c +80000960: 5780446f jal x8,80004ed8 +80000964: 80000954 .word 0x80000954 +80000968: 80009929 .word 0x80009929 +8000096c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x2314b665 +80000970: 000c2f03 lw x30,0(x24) +80000974: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xca67dca6 +80000978: 000c2a83 lw x21,0(x24) +8000097c: 004c0c13 addi x24,x24,4 + +80000980 : +Zbkb_pack_cg_cp_rs2_nx0_b21: + pack x22, x30, x21 # perform operation +80000980: 095f4b33 pack x22,x30,x21 + # Check if x22 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x22, Zbkb_pack_cg_cp_rs2_nx0_b21, Zbkb_pack_cg_cp_rs2_nx0_b21_str) +80000984: 00082383 lw x7,0(x16) +80000988: 01638863 beq x7,x22,80000998 +8000098c: 54c0446f jal x8,80004ed8 +80000990: 80000980 .word 0x80000980 +80000994: 80009960 .word 0x80009960 +80000998: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xd2a4653c +8000099c: 000c2983 lw x19,0(x24) +800009a0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x1f854660 +800009a4: 000c2b03 lw x22,0(x24) +800009a8: 004c0c13 addi x24,x24,4 + +800009ac : +Zbkb_pack_cg_cp_rs2_nx0_b22: + pack x5, x19, x22 # perform operation +800009ac: 0969c2b3 pack x5,x19,x22 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkb_pack_cg_cp_rs2_nx0_b22, Zbkb_pack_cg_cp_rs2_nx0_b22_str) +800009b0: 00082383 lw x7,0(x16) +800009b4: 00538863 beq x7,x5,800009c4 +800009b8: 5200446f jal x8,80004ed8 +800009bc: 800009ac .word 0x800009ac +800009c0: 80009997 .word 0x80009997 +800009c4: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x30892a46 +800009c8: 000c2883 lw x17,0(x24) +800009cc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0c10602f +800009d0: 000c2b83 lw x23,0(x24) +800009d4: 004c0c13 addi x24,x24,4 + +800009d8 : +Zbkb_pack_cg_cp_rs2_nx0_b23: + pack x18, x17, x23 # perform operation +800009d8: 0978c933 pack x18,x17,x23 + # Check if x18 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x18, Zbkb_pack_cg_cp_rs2_nx0_b23, Zbkb_pack_cg_cp_rs2_nx0_b23_str) +800009dc: 00082383 lw x7,0(x16) +800009e0: 01238863 beq x7,x18,800009f0 +800009e4: 4f40446f jal x8,80004ed8 +800009e8: 800009d8 .word 0x800009d8 +800009ec: 800099ce .word 0x800099ce +800009f0: 00480813 addi x16,x16,4 + + mv x25, x24 # switch data pointer register to avoid conflict with test +800009f4: 000c0c93 addi x25,x24,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0xc786eb31 +800009f8: 000ca183 lw x3,0(x25) +800009fc: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x41d7eba9 +80000a00: 000cac03 lw x24,0(x25) +80000a04: 004c8c93 addi x25,x25,4 + +80000a08 : +Zbkb_pack_cg_cp_rs2_nx0_b24: + pack x29, x3, x24 # perform operation +80000a08: 0981ceb3 pack x29,x3,x24 + # Check if x29 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x29, Zbkb_pack_cg_cp_rs2_nx0_b24, Zbkb_pack_cg_cp_rs2_nx0_b24_str) +80000a0c: 00082383 lw x7,0(x16) +80000a10: 01d38863 beq x7,x29,80000a20 +80000a14: 4c40446f jal x8,80004ed8 +80000a18: 80000a08 .word 0x80000a08 +80000a1c: 80009a05 .word 0x80009a05 +80000a20: 00480813 addi x16,x16,4 + + mv x2, x25 # switch data pointer register to avoid conflict with test +80000a24: 000c8113 addi x2,x25,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xa1ef64b9 +80000a28: 00012b03 lw x22,0(x2) +80000a2c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xf173f549 +80000a30: 00012c83 lw x25,0(x2) +80000a34: 00410113 addi x2,x2,4 + +80000a38 : +Zbkb_pack_cg_cp_rs2_nx0_b25: + pack x15, x22, x25 # perform operation +80000a38: 099b47b3 pack x15,x22,x25 + # Check if x15 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x15, Zbkb_pack_cg_cp_rs2_nx0_b25, Zbkb_pack_cg_cp_rs2_nx0_b25_str) +80000a3c: 00082383 lw x7,0(x16) +80000a40: 00f38863 beq x7,x15,80000a50 +80000a44: 4940446f jal x8,80004ed8 +80000a48: 80000a38 .word 0x80000a38 +80000a4c: 80009a3c .word 0x80009a3c +80000a50: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xe620aa77 +80000a54: 00012483 lw x9,0(x2) +80000a58: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x741dfd65 +80000a5c: 00012d03 lw x26,0(x2) +80000a60: 00410113 addi x2,x2,4 + +80000a64 : +Zbkb_pack_cg_cp_rs2_nx0_b26: + pack x19, x9, x26 # perform operation +80000a64: 09a4c9b3 pack x19,x9,x26 + # Check if x19 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x19, Zbkb_pack_cg_cp_rs2_nx0_b26, Zbkb_pack_cg_cp_rs2_nx0_b26_str) +80000a68: 00082383 lw x7,0(x16) +80000a6c: 01338863 beq x7,x19,80000a7c +80000a70: 4680446f jal x8,80004ed8 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 80009a73 .word 0x80009a73 +80000a7c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x53ec7654 +80000a80: 00012703 lw x14,0(x2) +80000a84: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xc6a0db8c +80000a88: 00012d83 lw x27,0(x2) +80000a8c: 00410113 addi x2,x2,4 + +80000a90 : +Zbkb_pack_cg_cp_rs2_nx0_b27: + pack x17, x14, x27 # perform operation +80000a90: 09b748b3 pack x17,x14,x27 + # Check if x17 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x17, Zbkb_pack_cg_cp_rs2_nx0_b27, Zbkb_pack_cg_cp_rs2_nx0_b27_str) +80000a94: 00082383 lw x7,0(x16) +80000a98: 01138863 beq x7,x17,80000aa8 +80000a9c: 43c0446f jal x8,80004ed8 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 80009aaa .word 0x80009aaa +80000aa8: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x638eb20f +80000aac: 00012b83 lw x23,0(x2) +80000ab0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x3aab0147 +80000ab4: 00012e03 lw x28,0(x2) +80000ab8: 00410113 addi x2,x2,4 + +80000abc : +Zbkb_pack_cg_cp_rs2_nx0_b28: + pack x25, x23, x28 # perform operation +80000abc: 09cbccb3 pack x25,x23,x28 + # Check if x25 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x25, Zbkb_pack_cg_cp_rs2_nx0_b28, Zbkb_pack_cg_cp_rs2_nx0_b28_str) +80000ac0: 00082383 lw x7,0(x16) +80000ac4: 01938863 beq x7,x25,80000ad4 +80000ac8: 4100446f jal x8,80004ed8 +80000acc: 80000abc .word 0x80000abc +80000ad0: 80009ae1 .word 0x80009ae1 +80000ad4: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xc3edb134 +80000ad8: 00012a83 lw x21,0(x2) +80000adc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x3e60b173 +80000ae0: 00012e83 lw x29,0(x2) +80000ae4: 00410113 addi x2,x2,4 + +80000ae8 : +Zbkb_pack_cg_cp_rs2_nx0_b29: + pack x0, x21, x29 # perform operation +80000ae8: 09dac033 pack x0,x21,x29 + # Check if x0 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x0, Zbkb_pack_cg_cp_rs2_nx0_b29, Zbkb_pack_cg_cp_rs2_nx0_b29_str) +80000aec: 00082383 lw x7,0(x16) +80000af0: 00038863 beq x7,x0,80000b00 +80000af4: 3e40446f jal x8,80004ed8 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 80009b18 .word 0x80009b18 +80000b00: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xf1e598dd +80000b04: 00012983 lw x19,0(x2) +80000b08: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x3ac8ae07 +80000b0c: 00012f03 lw x30,0(x2) +80000b10: 00410113 addi x2,x2,4 + +80000b14 : +Zbkb_pack_cg_cp_rs2_nx0_b30: + pack x1, x19, x30 # perform operation +80000b14: 09e9c0b3 pack x1,x19,x30 + # Check if x1 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x1, Zbkb_pack_cg_cp_rs2_nx0_b30, Zbkb_pack_cg_cp_rs2_nx0_b30_str) +80000b18: 00082383 lw x7,0(x16) +80000b1c: 00138863 beq x7,x1,80000b2c +80000b20: 3b80446f jal x8,80004ed8 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 80009b4f .word 0x80009b4f +80000b2c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_nx0 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x8f5a9a22 +80000b30: 00012483 lw x9,0(x2) +80000b34: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xa94071d8 +80000b38: 00012f83 lw x31,0(x2) +80000b3c: 00410113 addi x2,x2,4 + +80000b40 : +Zbkb_pack_cg_cp_rs2_nx0_b31: + pack x11, x9, x31 # perform operation +80000b40: 09f4c5b3 pack x11,x9,x31 + # Check if x11 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x11, Zbkb_pack_cg_cp_rs2_nx0_b31, Zbkb_pack_cg_cp_rs2_nx0_b31_str) +80000b44: 00082383 lw x7,0(x16) +80000b48: 00b38863 beq x7,x11,80000b58 +80000b4c: 38c0446f jal x8,80004ed8 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 80009b86 .word 0x80009b86 +80000b58: 00480813 addi x16,x16,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x166c5884 +80000b5c: 00012e03 lw x28,0(x2) +80000b60: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xa93943c9 +80000b64: 00012183 lw x3,0(x2) +80000b68: 00410113 addi x2,x2,4 + +80000b6c : +Zbkb_pack_cg_cp_rd_b0: + pack x0, x28, x3 # perform operation +80000b6c: 083e4033 pack x0,x28,x3 + # Check if x0 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x0, Zbkb_pack_cg_cp_rd_b0, Zbkb_pack_cg_cp_rd_b0_str) +80000b70: 00082383 lw x7,0(x16) +80000b74: 00038863 beq x7,x0,80000b84 +80000b78: 3600446f jal x8,80004ed8 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 80009bbd .word 0x80009bbd +80000b84: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xb2b8dbca +80000b88: 00012603 lw x12,0(x2) +80000b8c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x45bde9a4 +80000b90: 00012683 lw x13,0(x2) +80000b94: 00410113 addi x2,x2,4 + +80000b98 : +Zbkb_pack_cg_cp_rd_b1: + pack x1, x12, x13 # perform operation +80000b98: 08d640b3 pack x1,x12,x13 + # Check if x1 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x1, Zbkb_pack_cg_cp_rd_b1, Zbkb_pack_cg_cp_rd_b1_str) +80000b9c: 00082383 lw x7,0(x16) +80000ba0: 00138863 beq x7,x1,80000bb0 +80000ba4: 3340446f jal x8,80004ed8 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 80009bee .word 0x80009bee +80000bb0: 00480813 addi x16,x16,4 + + mv x27, x2 # switch data pointer register to avoid conflict with test +80000bb4: 00010d93 addi x27,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xe1f17f15 +80000bb8: 000da603 lw x12,0(x27) +80000bbc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x47064589 +80000bc0: 000daa83 lw x21,0(x27) +80000bc4: 004d8d93 addi x27,x27,4 + +80000bc8 : +Zbkb_pack_cg_cp_rd_b2: + pack x2, x12, x21 # perform operation +80000bc8: 09564133 pack x2,x12,x21 + # Check if x2 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x2, Zbkb_pack_cg_cp_rd_b2, Zbkb_pack_cg_cp_rd_b2_str) +80000bcc: 00082383 lw x7,0(x16) +80000bd0: 00238863 beq x7,x2,80000be0 +80000bd4: 3040446f jal x8,80004ed8 +80000bd8: 80000bc8 .word 0x80000bc8 +80000bdc: 80009c1f .word 0x80009c1f +80000be0: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xe483cb34 +80000be4: 000dad03 lw x26,0(x27) +80000be8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x98bde676 +80000bec: 000daa83 lw x21,0(x27) +80000bf0: 004d8d93 addi x27,x27,4 + +80000bf4 : +Zbkb_pack_cg_cp_rd_b3: + pack x3, x26, x21 # perform operation +80000bf4: 095d41b3 pack x3,x26,x21 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zbkb_pack_cg_cp_rd_b3, Zbkb_pack_cg_cp_rd_b3_str) +80000bf8: 00082383 lw x7,0(x16) +80000bfc: 00338863 beq x7,x3,80000c0c +80000c00: 2d80446f jal x8,80004ed8 +80000c04: 80000bf4 .word 0x80000bf4 +80000c08: 80009c50 .word 0x80009c50 +80000c0c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0xddf9c14b +80000c10: 000dae83 lw x29,0(x27) +80000c14: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0x7d448b3f +80000c18: 000da303 lw x6,0(x27) +80000c1c: 004d8d93 addi x27,x27,4 + +80000c20 : +Zbkb_pack_cg_cp_rd_b4: + pack x4, x29, x6 # perform operation +80000c20: 086ec233 pack x4,x29,x6 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zbkb_pack_cg_cp_rd_b4, Zbkb_pack_cg_cp_rd_b4_str) +80000c24: 00082383 lw x7,0(x16) +80000c28: 00438863 beq x7,x4,80000c38 +80000c2c: 2ac0446f jal x8,80004ed8 +80000c30: 80000c20 .word 0x80000c20 +80000c34: 80009c81 .word 0x80009c81 +80000c38: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs1: x1 = 0x3e9a07fa +80000c3c: 000da083 lw x1,0(x27) +80000c40: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0x45eaaad1 +80000c44: 000da303 lw x6,0(x27) +80000c48: 004d8d93 addi x27,x27,4 + +80000c4c : +Zbkb_pack_cg_cp_rd_b5: + pack x5, x1, x6 # perform operation +80000c4c: 0860c2b3 pack x5,x1,x6 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkb_pack_cg_cp_rd_b5, Zbkb_pack_cg_cp_rd_b5_str) +80000c50: 00082383 lw x7,0(x16) +80000c54: 00538863 beq x7,x5,80000c64 +80000c58: 2800446f jal x8,80004ed8 +80000c5c: 80000c4c .word 0x80000c4c +80000c60: 80009cb2 .word 0x80009cb2 +80000c64: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x3fc14679 +80000c68: 000da983 lw x19,0(x27) +80000c6c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0xd0b75eb3 +80000c70: 000da003 lw x0,0(x27) +80000c74: 004d8d93 addi x27,x27,4 + +80000c78 : +Zbkb_pack_cg_cp_rd_b6: + pack x6, x19, x0 # perform operation +80000c78: 0809c333 zext.h x6,x19 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zbkb_pack_cg_cp_rd_b6, Zbkb_pack_cg_cp_rd_b6_str) +80000c7c: 00082383 lw x7,0(x16) +80000c80: 00638863 beq x7,x6,80000c90 +80000c84: 2540446f jal x8,80004ed8 +80000c88: 80000c78 .word 0x80000c78 +80000c8c: 80009ce3 .word 0x80009ce3 +80000c90: 00480813 addi x16,x16,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c94: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c98: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0x6d823b09 +80000c9c: 000dae83 lw x29,0(x27) +80000ca0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0xc50201f2 +80000ca4: 000da583 lw x11,0(x27) +80000ca8: 004d8d93 addi x27,x27,4 + +80000cac : +Zbkb_pack_cg_cp_rd_b7: + pack x7, x29, x11 # perform operation +80000cac: 08bec3b3 pack x7,x29,x11 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_pack_cg_cp_rd_b7, Zbkb_pack_cg_cp_rd_b7_str) +80000cb0: 00082203 lw x4,0(x16) +80000cb4: 00720863 beq x4,x7,80000cc4 +80000cb8: 208042ef jal x5,80004ec0 +80000cbc: 80000cac .word 0x80000cac +80000cc0: 80009d14 .word 0x80009d14 +80000cc4: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xaafd7952 +80000cc8: 000da883 lw x17,0(x27) +80000ccc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x21627976 +80000cd0: 000da083 lw x1,0(x27) +80000cd4: 004d8d93 addi x27,x27,4 + +80000cd8 : +Zbkb_pack_cg_cp_rd_b8: + pack x8, x17, x1 # perform operation +80000cd8: 0818c433 pack x8,x17,x1 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_pack_cg_cp_rd_b8, Zbkb_pack_cg_cp_rd_b8_str) +80000cdc: 00082203 lw x4,0(x16) +80000ce0: 00820863 beq x4,x8,80000cf0 +80000ce4: 1dc042ef jal x5,80004ec0 +80000ce8: 80000cd8 .word 0x80000cd8 +80000cec: 80009d45 .word 0x80009d45 +80000cf0: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xa020ad3e +80000cf4: 000da583 lw x11,0(x27) +80000cf8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs2: x7 = 0x9c31b2bd +80000cfc: 000da383 lw x7,0(x27) +80000d00: 004d8d93 addi x27,x27,4 + +80000d04 : +Zbkb_pack_cg_cp_rd_b9: + pack x9, x11, x7 # perform operation +80000d04: 0875c4b3 pack x9,x11,x7 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_pack_cg_cp_rd_b9, Zbkb_pack_cg_cp_rd_b9_str) +80000d08: 00082203 lw x4,0(x16) +80000d0c: 00920863 beq x4,x9,80000d1c +80000d10: 1b0042ef jal x5,80004ec0 +80000d14: 80000d04 .word 0x80000d04 +80000d18: 80009d76 .word 0x80009d76 +80000d1c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0xe962e714 +80000d20: 000da703 lw x14,0(x27) +80000d24: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xb1e4338c +80000d28: 000daa03 lw x20,0(x27) +80000d2c: 004d8d93 addi x27,x27,4 + +80000d30 : +Zbkb_pack_cg_cp_rd_b10: + pack x10, x14, x20 # perform operation +80000d30: 09474533 pack x10,x14,x20 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_pack_cg_cp_rd_b10, Zbkb_pack_cg_cp_rd_b10_str) +80000d34: 00082203 lw x4,0(x16) +80000d38: 00a20863 beq x4,x10,80000d48 +80000d3c: 184042ef jal x5,80004ec0 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 80009da7 .word 0x80009da7 +80000d48: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x61acfe21 +80000d4c: 000da603 lw x12,0(x27) +80000d50: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs2: x29 = 0x9c400d57 +80000d54: 000dae83 lw x29,0(x27) +80000d58: 004d8d93 addi x27,x27,4 + +80000d5c : +Zbkb_pack_cg_cp_rd_b11: + pack x11, x12, x29 # perform operation +80000d5c: 09d645b3 pack x11,x12,x29 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_pack_cg_cp_rd_b11, Zbkb_pack_cg_cp_rd_b11_str) +80000d60: 00082203 lw x4,0(x16) +80000d64: 00b20863 beq x4,x11,80000d74 +80000d68: 158042ef jal x5,80004ec0 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 80009dd9 .word 0x80009dd9 +80000d74: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x7214cc19 +80000d78: 000dab83 lw x23,0(x27) +80000d7c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x585a619e +80000d80: 000dac83 lw x25,0(x27) +80000d84: 004d8d93 addi x27,x27,4 + +80000d88 : +Zbkb_pack_cg_cp_rd_b12: + pack x12, x23, x25 # perform operation +80000d88: 099bc633 pack x12,x23,x25 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zbkb_pack_cg_cp_rd_b12, Zbkb_pack_cg_cp_rd_b12_str) +80000d8c: 00082203 lw x4,0(x16) +80000d90: 00c20863 beq x4,x12,80000da0 +80000d94: 12c042ef jal x5,80004ec0 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80009e0b .word 0x80009e0b +80000da0: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0xf38a3f67 +80000da4: 000da183 lw x3,0(x27) +80000da8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0xe9f604cd +80000dac: 000da083 lw x1,0(x27) +80000db0: 004d8d93 addi x27,x27,4 + +80000db4 : +Zbkb_pack_cg_cp_rd_b13: + pack x13, x3, x1 # perform operation +80000db4: 0811c6b3 pack x13,x3,x1 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_pack_cg_cp_rd_b13, Zbkb_pack_cg_cp_rd_b13_str) +80000db8: 00082203 lw x4,0(x16) +80000dbc: 00d20863 beq x4,x13,80000dcc +80000dc0: 100042ef jal x5,80004ec0 +80000dc4: 80000db4 .word 0x80000db4 +80000dc8: 80009e3d .word 0x80009e3d +80000dcc: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x43a29fde +80000dd0: 000da603 lw x12,0(x27) +80000dd4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x6d6918cd +80000dd8: 000daa83 lw x21,0(x27) +80000ddc: 004d8d93 addi x27,x27,4 + +80000de0 : +Zbkb_pack_cg_cp_rd_b14: + pack x14, x12, x21 # perform operation +80000de0: 09564733 pack x14,x12,x21 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_pack_cg_cp_rd_b14, Zbkb_pack_cg_cp_rd_b14_str) +80000de4: 00082203 lw x4,0(x16) +80000de8: 00e20863 beq x4,x14,80000df8 +80000dec: 0d4042ef jal x5,80004ec0 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 80009e6f .word 0x80009e6f +80000df8: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x2d391e37 +80000dfc: 000daf03 lw x30,0(x27) +80000e00: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0x4db3f9ee +80000e04: 000da003 lw x0,0(x27) +80000e08: 004d8d93 addi x27,x27,4 + +80000e0c : +Zbkb_pack_cg_cp_rd_b15: + pack x15, x30, x0 # perform operation +80000e0c: 080f47b3 zext.h x15,x30 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_pack_cg_cp_rd_b15, Zbkb_pack_cg_cp_rd_b15_str) +80000e10: 00082203 lw x4,0(x16) +80000e14: 00f20863 beq x4,x15,80000e24 +80000e18: 0a8042ef jal x5,80004ec0 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 80009ea1 .word 0x80009ea1 +80000e24: 00480813 addi x16,x16,4 + + mv x21, x16 # switch signature pointer register to avoid conflict with test +80000e28: 00080a93 addi x21,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0xb714c958 +80000e2c: 000da703 lw x14,0(x27) +80000e30: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x8d16a3b1 +80000e34: 000da083 lw x1,0(x27) +80000e38: 004d8d93 addi x27,x27,4 + +80000e3c : +Zbkb_pack_cg_cp_rd_b16: + pack x16, x14, x1 # perform operation +80000e3c: 08174833 pack x16,x14,x1 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zbkb_pack_cg_cp_rd_b16, Zbkb_pack_cg_cp_rd_b16_str) +80000e40: 000aa203 lw x4,0(x21) +80000e44: 01020863 beq x4,x16,80000e54 +80000e48: 078042ef jal x5,80004ec0 +80000e4c: 80000e3c .word 0x80000e3c +80000e50: 80009ed3 .word 0x80009ed3 +80000e54: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x1e7487b9 +80000e58: 000da783 lw x15,0(x27) +80000e5c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs2: x29 = 0x50b3dd45 +80000e60: 000dae83 lw x29,0(x27) +80000e64: 004d8d93 addi x27,x27,4 + +80000e68 : +Zbkb_pack_cg_cp_rd_b17: + pack x17, x15, x29 # perform operation +80000e68: 09d7c8b3 pack x17,x15,x29 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zbkb_pack_cg_cp_rd_b17, Zbkb_pack_cg_cp_rd_b17_str) +80000e6c: 000aa203 lw x4,0(x21) +80000e70: 01120863 beq x4,x17,80000e80 +80000e74: 04c042ef jal x5,80004ec0 +80000e78: 80000e68 .word 0x80000e68 +80000e7c: 80009f05 .word 0x80009f05 +80000e80: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0x56268b7d +80000e84: 000dae03 lw x28,0(x27) +80000e88: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x1c92209c +80000e8c: 000dac03 lw x24,0(x27) +80000e90: 004d8d93 addi x27,x27,4 + +80000e94 : +Zbkb_pack_cg_cp_rd_b18: + pack x18, x28, x24 # perform operation +80000e94: 098e4933 pack x18,x28,x24 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkb_pack_cg_cp_rd_b18, Zbkb_pack_cg_cp_rd_b18_str) +80000e98: 000aa203 lw x4,0(x21) +80000e9c: 01220863 beq x4,x18,80000eac +80000ea0: 020042ef jal x5,80004ec0 +80000ea4: 80000e94 .word 0x80000e94 +80000ea8: 80009f37 .word 0x80009f37 +80000eac: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x12b709b9 +80000eb0: 000da183 lw x3,0(x27) +80000eb4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x5e886a62 +80000eb8: 000dad03 lw x26,0(x27) +80000ebc: 004d8d93 addi x27,x27,4 + +80000ec0 : +Zbkb_pack_cg_cp_rd_b19: + pack x19, x3, x26 # perform operation +80000ec0: 09a1c9b3 pack x19,x3,x26 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zbkb_pack_cg_cp_rd_b19, Zbkb_pack_cg_cp_rd_b19_str) +80000ec4: 000aa203 lw x4,0(x21) +80000ec8: 01320863 beq x4,x19,80000ed8 +80000ecc: 7f5032ef jal x5,80004ec0 +80000ed0: 80000ec0 .word 0x80000ec0 +80000ed4: 80009f69 .word 0x80009f69 +80000ed8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0xf582a86c +80000edc: 000dae83 lw x29,0(x27) +80000ee0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0xcf87157b +80000ee4: 000dac03 lw x24,0(x27) +80000ee8: 004d8d93 addi x27,x27,4 + +80000eec : +Zbkb_pack_cg_cp_rd_b20: + pack x20, x29, x24 # perform operation +80000eec: 098eca33 pack x20,x29,x24 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkb_pack_cg_cp_rd_b20, Zbkb_pack_cg_cp_rd_b20_str) +80000ef0: 000aa203 lw x4,0(x21) +80000ef4: 01420863 beq x4,x20,80000f04 +80000ef8: 7c9032ef jal x5,80004ec0 +80000efc: 80000eec .word 0x80000eec +80000f00: 80009f9b .word 0x80009f9b +80000f04: 004a8a93 addi x21,x21,4 + + mv x12, x21 # switch signature pointer register to avoid conflict with test +80000f08: 000a8613 addi x12,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0xb419b614 +80000f0c: 000da403 lw x8,0(x27) +80000f10: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0xbc6179a5 +80000f14: 000da303 lw x6,0(x27) +80000f18: 004d8d93 addi x27,x27,4 + +80000f1c : +Zbkb_pack_cg_cp_rd_b21: + pack x21, x8, x6 # perform operation +80000f1c: 08644ab3 pack x21,x8,x6 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_pack_cg_cp_rd_b21, Zbkb_pack_cg_cp_rd_b21_str) +80000f20: 00062203 lw x4,0(x12) +80000f24: 01520863 beq x4,x21,80000f34 +80000f28: 799032ef jal x5,80004ec0 +80000f2c: 80000f1c .word 0x80000f1c +80000f30: 80009fcd .word 0x80009fcd +80000f34: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x0657744a +80000f38: 000da483 lw x9,0(x27) +80000f3c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs2: x31 = 0x6826580f +80000f40: 000daf83 lw x31,0(x27) +80000f44: 004d8d93 addi x27,x27,4 + +80000f48 : +Zbkb_pack_cg_cp_rd_b22: + pack x22, x9, x31 # perform operation +80000f48: 09f4cb33 pack x22,x9,x31 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cp_rd_b22, Zbkb_pack_cg_cp_rd_b22_str) +80000f4c: 00062203 lw x4,0(x12) +80000f50: 01620863 beq x4,x22,80000f60 +80000f54: 76d032ef jal x5,80004ec0 +80000f58: 80000f48 .word 0x80000f48 +80000f5c: 80009fff .word 0x80009fff +80000f60: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x24c17fb4 +80000f64: 000da983 lw x19,0(x27) +80000f68: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0xce2bd0be +80000f6c: 000da703 lw x14,0(x27) +80000f70: 004d8d93 addi x27,x27,4 + +80000f74 : +Zbkb_pack_cg_cp_rd_b23: + pack x23, x19, x14 # perform operation +80000f74: 08e9cbb3 pack x23,x19,x14 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_pack_cg_cp_rd_b23, Zbkb_pack_cg_cp_rd_b23_str) +80000f78: 00062203 lw x4,0(x12) +80000f7c: 01720863 beq x4,x23,80000f8c +80000f80: 741032ef jal x5,80004ec0 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 8000a031 .word 0x8000a031 +80000f8c: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xde2315e2 +80000f90: 000da583 lw x11,0(x27) +80000f94: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0xfc799f42 +80000f98: 000da503 lw x10,0(x27) +80000f9c: 004d8d93 addi x27,x27,4 + +80000fa0 : +Zbkb_pack_cg_cp_rd_b24: + pack x24, x11, x10 # perform operation +80000fa0: 08a5cc33 pack x24,x11,x10 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_pack_cg_cp_rd_b24, Zbkb_pack_cg_cp_rd_b24_str) +80000fa4: 00062203 lw x4,0(x12) +80000fa8: 01820863 beq x4,x24,80000fb8 +80000fac: 715032ef jal x5,80004ec0 +80000fb0: 80000fa0 .word 0x80000fa0 +80000fb4: 8000a063 .word 0x8000a063 +80000fb8: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0xc702fea1 +80000fbc: 000da003 lw x0,0(x27) +80000fc0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0x3049fdc5 +80000fc4: 000da403 lw x8,0(x27) +80000fc8: 004d8d93 addi x27,x27,4 + +80000fcc : +Zbkb_pack_cg_cp_rd_b25: + pack x25, x0, x8 # perform operation +80000fcc: 08804cb3 pack x25,x0,x8 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cp_rd_b25, Zbkb_pack_cg_cp_rd_b25_str) +80000fd0: 00062203 lw x4,0(x12) +80000fd4: 01920863 beq x4,x25,80000fe4 +80000fd8: 6e9032ef jal x5,80004ec0 +80000fdc: 80000fcc .word 0x80000fcc +80000fe0: 8000a095 .word 0x8000a095 +80000fe4: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0x2a2b830a +80000fe8: 000dae83 lw x29,0(x27) +80000fec: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0x8b26fdae +80000ff0: 000da183 lw x3,0(x27) +80000ff4: 004d8d93 addi x27,x27,4 + +80000ff8 : +Zbkb_pack_cg_cp_rd_b26: + pack x26, x29, x3 # perform operation +80000ff8: 083ecd33 pack x26,x29,x3 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cp_rd_b26, Zbkb_pack_cg_cp_rd_b26_str) +80000ffc: 00062203 lw x4,0(x12) +80001000: 01a20863 beq x4,x26,80001010 +80001004: 6bd032ef jal x5,80004ec0 +80001008: 80000ff8 .word 0x80000ff8 +8000100c: 8000a0c7 .word 0x8000a0c7 +80001010: 00460613 addi x12,x12,4 + + mv x1, x27 # switch data pointer register to avoid conflict with test +80001014: 000d8093 addi x1,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x90cd2c31 +80001018: 0000a503 lw x10,0(x1) +8000101c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xb6ecab6e +80001020: 0000ae03 lw x28,0(x1) +80001024: 00408093 addi x1,x1,4 + +80001028 : +Zbkb_pack_cg_cp_rd_b27: + pack x27, x10, x28 # perform operation +80001028: 09c54db3 pack x27,x10,x28 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cp_rd_b27, Zbkb_pack_cg_cp_rd_b27_str) +8000102c: 00062203 lw x4,0(x12) +80001030: 01b20863 beq x4,x27,80001040 +80001034: 68d032ef jal x5,80004ec0 +80001038: 80001028 .word 0x80001028 +8000103c: 8000a0f9 .word 0x8000a0f9 +80001040: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x0cdacf7a +80001044: 0000a103 lw x2,0(x1) +80001048: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x746f034c +8000104c: 0000ac83 lw x25,0(x1) +80001050: 00408093 addi x1,x1,4 + +80001054 : +Zbkb_pack_cg_cp_rd_b28: + pack x28, x2, x25 # perform operation +80001054: 09914e33 pack x28,x2,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cp_rd_b28, Zbkb_pack_cg_cp_rd_b28_str) +80001058: 00062203 lw x4,0(x12) +8000105c: 01c20863 beq x4,x28,8000106c +80001060: 661032ef jal x5,80004ec0 +80001064: 80001054 .word 0x80001054 +80001068: 8000a12b .word 0x8000a12b +8000106c: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xa5082b43 +80001070: 0000aa83 lw x21,0(x1) +80001074: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xdd83a7a7 +80001078: 0000af03 lw x30,0(x1) +8000107c: 00408093 addi x1,x1,4 + +80001080 : +Zbkb_pack_cg_cp_rd_b29: + pack x29, x21, x30 # perform operation +80001080: 09eaceb3 pack x29,x21,x30 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cp_rd_b29, Zbkb_pack_cg_cp_rd_b29_str) +80001084: 00062203 lw x4,0(x12) +80001088: 01d20863 beq x4,x29,80001098 +8000108c: 635032ef jal x5,80004ec0 +80001090: 80001080 .word 0x80001080 +80001094: 8000a15d .word 0x8000a15d +80001098: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x4aa3daff +8000109c: 0000a183 lw x3,0(x1) +800010a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x2e02151b +800010a4: 0000a383 lw x7,0(x1) +800010a8: 00408093 addi x1,x1,4 + +800010ac : +Zbkb_pack_cg_cp_rd_b30: + pack x30, x3, x7 # perform operation +800010ac: 0871cf33 pack x30,x3,x7 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cp_rd_b30, Zbkb_pack_cg_cp_rd_b30_str) +800010b0: 00062203 lw x4,0(x12) +800010b4: 01e20863 beq x4,x30,800010c4 +800010b8: 609032ef jal x5,80004ec0 +800010bc: 800010ac .word 0x800010ac +800010c0: 8000a18f .word 0x8000a18f +800010c4: 00460613 addi x12,x12,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x87cdf21f +800010c8: 0000aa83 lw x21,0(x1) +800010cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x6ebae886 +800010d0: 0000a983 lw x19,0(x1) +800010d4: 00408093 addi x1,x1,4 + +800010d8 : +Zbkb_pack_cg_cp_rd_b31: + pack x31, x21, x19 # perform operation +800010d8: 093acfb3 pack x31,x21,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cp_rd_b31, Zbkb_pack_cg_cp_rd_b31_str) +800010dc: 00062203 lw x4,0(x12) +800010e0: 01f20863 beq x4,x31,800010f0 +800010e4: 5dd032ef jal x5,80004ec0 +800010e8: 800010d8 .word 0x800010d8 +800010ec: 8000a1c1 .word 0x8000a1c1 +800010f0: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x00000000 +800010f4: 0000a503 lw x10,0(x1) +800010f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xe9b8db2c +800010fc: 0000a683 lw x13,0(x1) +80001100: 00408093 addi x1,x1,4 + +80001104 : +Zbkb_pack_cg_cp_rs1_edges_0x0: + pack x2, x10, x13 # perform operation +80001104: 08d54133 pack x2,x10,x13 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_pack_cg_cp_rs1_edges_0x0, Zbkb_pack_cg_cp_rs1_edges_0x0_str) +80001108: 00062203 lw x4,0(x12) +8000110c: 00220863 beq x4,x2,8000111c +80001110: 5b1032ef jal x5,80004ec0 +80001114: 80001104 .word 0x80001104 +80001118: 8000a1f3 .word 0x8000a1f3 +8000111c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x00000001 +80001120: 0000a403 lw x8,0(x1) +80001124: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xc8a85234 +80001128: 0000af83 lw x31,0(x1) +8000112c: 00408093 addi x1,x1,4 + +80001130 : +Zbkb_pack_cg_cp_rs1_edges_0x1: + pack x29, x8, x31 # perform operation +80001130: 09f44eb3 pack x29,x8,x31 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cp_rs1_edges_0x1, Zbkb_pack_cg_cp_rs1_edges_0x1_str) +80001134: 00062203 lw x4,0(x12) +80001138: 01d20863 beq x4,x29,80001148 +8000113c: 585032ef jal x5,80004ec0 +80001140: 80001130 .word 0x80001130 +80001144: 8000a22c .word 0x8000a22c +80001148: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x00000002 +8000114c: 0000a103 lw x2,0(x1) +80001150: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xa1a8bc73 +80001154: 0000ae83 lw x29,0(x1) +80001158: 00408093 addi x1,x1,4 + +8000115c : +Zbkb_pack_cg_cp_rs1_edges_0x2: + pack x26, x2, x29 # perform operation +8000115c: 09d14d33 pack x26,x2,x29 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cp_rs1_edges_0x2, Zbkb_pack_cg_cp_rs1_edges_0x2_str) +80001160: 00062203 lw x4,0(x12) +80001164: 01a20863 beq x4,x26,80001174 +80001168: 559032ef jal x5,80004ec0 +8000116c: 8000115c .word 0x8000115c +80001170: 8000a265 .word 0x8000a265 +80001174: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x80000000 +80001178: 0000ac83 lw x25,0(x1) +8000117c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x24afa8a6 +80001180: 0000a503 lw x10,0(x1) +80001184: 00408093 addi x1,x1,4 + +80001188 : +Zbkb_pack_cg_cp_rs1_edges_0x80000000: + pack x23, x25, x10 # perform operation +80001188: 08accbb3 pack x23,x25,x10 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_pack_cg_cp_rs1_edges_0x80000000, Zbkb_pack_cg_cp_rs1_edges_0x80000000_str) +8000118c: 00062203 lw x4,0(x12) +80001190: 01720863 beq x4,x23,800011a0 +80001194: 52d032ef jal x5,80004ec0 +80001198: 80001188 .word 0x80001188 +8000119c: 8000a29e .word 0x8000a29e +800011a0: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x80000001 +800011a4: 0000ac83 lw x25,0(x1) +800011a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xdafa9d51 +800011ac: 0000a803 lw x16,0(x1) +800011b0: 00408093 addi x1,x1,4 + +800011b4 : +Zbkb_pack_cg_cp_rs1_edges_0x80000001: + pack x10, x25, x16 # perform operation +800011b4: 090cc533 pack x10,x25,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cp_rs1_edges_0x80000001, Zbkb_pack_cg_cp_rs1_edges_0x80000001_str) +800011b8: 00062203 lw x4,0(x12) +800011bc: 00a20863 beq x4,x10,800011cc +800011c0: 501032ef jal x5,80004ec0 +800011c4: 800011b4 .word 0x800011b4 +800011c8: 8000a2de .word 0x8000a2de +800011cc: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7fffffff +800011d0: 0000ab03 lw x22,0(x1) +800011d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xa83b980e +800011d8: 0000ad03 lw x26,0(x1) +800011dc: 00408093 addi x1,x1,4 + +800011e0 : +Zbkb_pack_cg_cp_rs1_edges_0x7fffffff: + pack x9, x22, x26 # perform operation +800011e0: 09ab44b3 pack x9,x22,x26 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cp_rs1_edges_0x7fffffff, Zbkb_pack_cg_cp_rs1_edges_0x7fffffff_str) +800011e4: 00062203 lw x4,0(x12) +800011e8: 00920863 beq x4,x9,800011f8 +800011ec: 4d5032ef jal x5,80004ec0 +800011f0: 800011e0 .word 0x800011e0 +800011f4: 8000a31f .word 0x8000a31f +800011f8: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x7ffffffe +800011fc: 0000a983 lw x19,0(x1) +80001200: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x54b768bf +80001204: 0000a403 lw x8,0(x1) +80001208: 00408093 addi x1,x1,4 + +8000120c : +Zbkb_pack_cg_cp_rs1_edges_0x7ffffffe: + pack x20, x19, x8 # perform operation +8000120c: 0889ca33 pack x20,x19,x8 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cp_rs1_edges_0x7ffffffe, Zbkb_pack_cg_cp_rs1_edges_0x7ffffffe_str) +80001210: 00062203 lw x4,0(x12) +80001214: 01420863 beq x4,x20,80001224 +80001218: 4a9032ef jal x5,80004ec0 +8000121c: 8000120c .word 0x8000120c +80001220: 8000a360 .word 0x8000a360 +80001224: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xffffffff +80001228: 0000af03 lw x30,0(x1) +8000122c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xcefc870c +80001230: 0000a103 lw x2,0(x1) +80001234: 00408093 addi x1,x1,4 + +80001238 : +Zbkb_pack_cg_cp_rs1_edges_0xffffffff: + pack x17, x30, x2 # perform operation +80001238: 082f48b3 pack x17,x30,x2 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_pack_cg_cp_rs1_edges_0xffffffff, Zbkb_pack_cg_cp_rs1_edges_0xffffffff_str) +8000123c: 00062203 lw x4,0(x12) +80001240: 01120863 beq x4,x17,80001250 +80001244: 47d032ef jal x5,80004ec0 +80001248: 80001238 .word 0x80001238 +8000124c: 8000a3a1 .word 0x8000a3a1 +80001250: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xfffffffe +80001254: 0000ae83 lw x29,0(x1) +80001258: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xd1cef73d +8000125c: 0000ad83 lw x27,0(x1) +80001260: 00408093 addi x1,x1,4 + +80001264 : +Zbkb_pack_cg_cp_rs1_edges_0xfffffffe: + pack x21, x29, x27 # perform operation +80001264: 09becab3 pack x21,x29,x27 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_pack_cg_cp_rs1_edges_0xfffffffe, Zbkb_pack_cg_cp_rs1_edges_0xfffffffe_str) +80001268: 00062203 lw x4,0(x12) +8000126c: 01520863 beq x4,x21,8000127c +80001270: 451032ef jal x5,80004ec0 +80001274: 80001264 .word 0x80001264 +80001278: 8000a3e2 .word 0x8000a3e2 +8000127c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x5bbc8872 +80001280: 0000af03 lw x30,0(x1) +80001284: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x24c14793 +80001288: 0000a303 lw x6,0(x1) +8000128c: 00408093 addi x1,x1,4 + +80001290 : +Zbkb_pack_cg_cp_rs1_edges_0x5bbc8872: + pack x31, x30, x6 # perform operation +80001290: 086f4fb3 pack x31,x30,x6 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cp_rs1_edges_0x5bbc8872, Zbkb_pack_cg_cp_rs1_edges_0x5bbc8872_str) +80001294: 00062203 lw x4,0(x12) +80001298: 01f20863 beq x4,x31,800012a8 +8000129c: 425032ef jal x5,80004ec0 +800012a0: 80001290 .word 0x80001290 +800012a4: 8000a423 .word 0x8000a423 +800012a8: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaa +800012ac: 0000a503 lw x10,0(x1) +800012b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x86ee613d +800012b4: 0000a983 lw x19,0(x1) +800012b8: 00408093 addi x1,x1,4 + +800012bc : +Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaa: + pack x13, x10, x19 # perform operation +800012bc: 093546b3 pack x13,x10,x19 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012c0: 00062203 lw x4,0(x12) +800012c4: 00d20863 beq x4,x13,800012d4 +800012c8: 3f9032ef jal x5,80004ec0 +800012cc: 800012bc .word 0x800012bc +800012d0: 8000a464 .word 0x8000a464 +800012d4: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x55555555 +800012d8: 0000a183 lw x3,0(x1) +800012dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xf3ddfbbd +800012e0: 0000a583 lw x11,0(x1) +800012e4: 00408093 addi x1,x1,4 + +800012e8 : +Zbkb_pack_cg_cp_rs1_edges_0x55555555: + pack x24, x3, x11 # perform operation +800012e8: 08b1cc33 pack x24,x3,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_pack_cg_cp_rs1_edges_0x55555555, Zbkb_pack_cg_cp_rs1_edges_0x55555555_str) +800012ec: 00062203 lw x4,0(x12) +800012f0: 01820863 beq x4,x24,80001300 +800012f4: 3cd032ef jal x5,80004ec0 +800012f8: 800012e8 .word 0x800012e8 +800012fc: 8000a4a5 .word 0x8000a4a5 +80001300: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x590987d0 +80001304: 0000a803 lw x16,0(x1) +80001308: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x00000000 +8000130c: 0000ab83 lw x23,0(x1) +80001310: 00408093 addi x1,x1,4 + +80001314 : +Zbkb_pack_cg_cp_rs2_edges_0x0: + pack x13, x16, x23 # perform operation +80001314: 097846b3 pack x13,x16,x23 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cp_rs2_edges_0x0, Zbkb_pack_cg_cp_rs2_edges_0x0_str) +80001318: 00062203 lw x4,0(x12) +8000131c: 00d20863 beq x4,x13,8000132c +80001320: 3a1032ef jal x5,80004ec0 +80001324: 80001314 .word 0x80001314 +80001328: 8000a4e6 .word 0x8000a4e6 +8000132c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x7572471d +80001330: 0000ae03 lw x28,0(x1) +80001334: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000001 +80001338: 0000af03 lw x30,0(x1) +8000133c: 00408093 addi x1,x1,4 + +80001340 : +Zbkb_pack_cg_cp_rs2_edges_0x1: + pack x27, x28, x30 # perform operation +80001340: 09ee4db3 pack x27,x28,x30 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cp_rs2_edges_0x1, Zbkb_pack_cg_cp_rs2_edges_0x1_str) +80001344: 00062203 lw x4,0(x12) +80001348: 01b20863 beq x4,x27,80001358 +8000134c: 375032ef jal x5,80004ec0 +80001350: 80001340 .word 0x80001340 +80001354: 8000a520 .word 0x8000a520 +80001358: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x31b9cf2b +8000135c: 0000a103 lw x2,0(x1) +80001360: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x00000002 +80001364: 0000ae03 lw x28,0(x1) +80001368: 00408093 addi x1,x1,4 + +8000136c : +Zbkb_pack_cg_cp_rs2_edges_0x2: + pack x18, x2, x28 # perform operation +8000136c: 09c14933 pack x18,x2,x28 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cp_rs2_edges_0x2, Zbkb_pack_cg_cp_rs2_edges_0x2_str) +80001370: 00062203 lw x4,0(x12) +80001374: 01220863 beq x4,x18,80001384 +80001378: 349032ef jal x5,80004ec0 +8000137c: 8000136c .word 0x8000136c +80001380: 8000a55a .word 0x8000a55a +80001384: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xccd09283 +80001388: 0000a183 lw x3,0(x1) +8000138c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x80000000 +80001390: 0000a683 lw x13,0(x1) +80001394: 00408093 addi x1,x1,4 + +80001398 : +Zbkb_pack_cg_cp_rs2_edges_0x80000000: + pack x8, x3, x13 # perform operation +80001398: 08d1c433 pack x8,x3,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_pack_cg_cp_rs2_edges_0x80000000, Zbkb_pack_cg_cp_rs2_edges_0x80000000_str) +8000139c: 00062203 lw x4,0(x12) +800013a0: 00820863 beq x4,x8,800013b0 +800013a4: 31d032ef jal x5,80004ec0 +800013a8: 80001398 .word 0x80001398 +800013ac: 8000a594 .word 0x8000a594 +800013b0: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x2df5a6c1 +800013b4: 0000a583 lw x11,0(x1) +800013b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x80000001 +800013bc: 0000aa03 lw x20,0(x1) +800013c0: 00408093 addi x1,x1,4 + +800013c4 : +Zbkb_pack_cg_cp_rs2_edges_0x80000001: + pack x31, x11, x20 # perform operation +800013c4: 0945cfb3 pack x31,x11,x20 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cp_rs2_edges_0x80000001, Zbkb_pack_cg_cp_rs2_edges_0x80000001_str) +800013c8: 00062203 lw x4,0(x12) +800013cc: 01f20863 beq x4,x31,800013dc +800013d0: 2f1032ef jal x5,80004ec0 +800013d4: 800013c4 .word 0x800013c4 +800013d8: 8000a5d5 .word 0x8000a5d5 +800013dc: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0b6bd940 +800013e0: 0000a703 lw x14,0(x1) +800013e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x7fffffff +800013e8: 0000a903 lw x18,0(x1) +800013ec: 00408093 addi x1,x1,4 + +800013f0 : +Zbkb_pack_cg_cp_rs2_edges_0x7fffffff: + pack x3, x14, x18 # perform operation +800013f0: 092741b3 pack x3,x14,x18 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_pack_cg_cp_rs2_edges_0x7fffffff, Zbkb_pack_cg_cp_rs2_edges_0x7fffffff_str) +800013f4: 00062203 lw x4,0(x12) +800013f8: 00320863 beq x4,x3,80001408 +800013fc: 2c5032ef jal x5,80004ec0 +80001400: 800013f0 .word 0x800013f0 +80001404: 8000a616 .word 0x8000a616 +80001408: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xf5ba4f04 +8000140c: 0000ab83 lw x23,0(x1) +80001410: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7ffffffe +80001414: 0000ac03 lw x24,0(x1) +80001418: 00408093 addi x1,x1,4 + +8000141c : +Zbkb_pack_cg_cp_rs2_edges_0x7ffffffe: + pack x29, x23, x24 # perform operation +8000141c: 098bceb3 pack x29,x23,x24 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cp_rs2_edges_0x7ffffffe, Zbkb_pack_cg_cp_rs2_edges_0x7ffffffe_str) +80001420: 00062203 lw x4,0(x12) +80001424: 01d20863 beq x4,x29,80001434 +80001428: 299032ef jal x5,80004ec0 +8000142c: 8000141c .word 0x8000141c +80001430: 8000a657 .word 0x8000a657 +80001434: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x477d9fba +80001438: 0000a383 lw x7,0(x1) +8000143c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xffffffff +80001440: 0000a403 lw x8,0(x1) +80001444: 00408093 addi x1,x1,4 + +80001448 : +Zbkb_pack_cg_cp_rs2_edges_0xffffffff: + pack x16, x7, x8 # perform operation +80001448: 0883c833 pack x16,x7,x8 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cp_rs2_edges_0xffffffff, Zbkb_pack_cg_cp_rs2_edges_0xffffffff_str) +8000144c: 00062203 lw x4,0(x12) +80001450: 01020863 beq x4,x16,80001460 +80001454: 26d032ef jal x5,80004ec0 +80001458: 80001448 .word 0x80001448 +8000145c: 8000a698 .word 0x8000a698 +80001460: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0fa825f6 +80001464: 0000a883 lw x17,0(x1) +80001468: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xfffffffe +8000146c: 0000ad83 lw x27,0(x1) +80001470: 00408093 addi x1,x1,4 + +80001474 : +Zbkb_pack_cg_cp_rs2_edges_0xfffffffe: + pack x19, x17, x27 # perform operation +80001474: 09b8c9b3 pack x19,x17,x27 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_pack_cg_cp_rs2_edges_0xfffffffe, Zbkb_pack_cg_cp_rs2_edges_0xfffffffe_str) +80001478: 00062203 lw x4,0(x12) +8000147c: 01320863 beq x4,x19,8000148c +80001480: 241032ef jal x5,80004ec0 +80001484: 80001474 .word 0x80001474 +80001488: 8000a6d9 .word 0x8000a6d9 +8000148c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xbc48ae5d +80001490: 0000aa83 lw x21,0(x1) +80001494: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x5bbc8872 +80001498: 0000a183 lw x3,0(x1) +8000149c: 00408093 addi x1,x1,4 + +800014a0 : +Zbkb_pack_cg_cp_rs2_edges_0x5bbc8872: + pack x30, x21, x3 # perform operation +800014a0: 083acf33 pack x30,x21,x3 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cp_rs2_edges_0x5bbc8872, Zbkb_pack_cg_cp_rs2_edges_0x5bbc8872_str) +800014a4: 00062203 lw x4,0(x12) +800014a8: 01e20863 beq x4,x30,800014b8 +800014ac: 215032ef jal x5,80004ec0 +800014b0: 800014a0 .word 0x800014a0 +800014b4: 8000a71a .word 0x8000a71a +800014b8: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xefbaec1b +800014bc: 0000a703 lw x14,0(x1) +800014c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xaaaaaaaa +800014c4: 0000a183 lw x3,0(x1) +800014c8: 00408093 addi x1,x1,4 + +800014cc : +Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaa: + pack x18, x14, x3 # perform operation +800014cc: 08374933 pack x18,x14,x3 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014d0: 00062203 lw x4,0(x12) +800014d4: 01220863 beq x4,x18,800014e4 +800014d8: 1e9032ef jal x5,80004ec0 +800014dc: 800014cc .word 0x800014cc +800014e0: 8000a75b .word 0x8000a75b +800014e4: 00460613 addi x12,x12,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x911f6292 +800014e8: 0000a703 lw x14,0(x1) +800014ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x55555555 +800014f0: 0000a483 lw x9,0(x1) +800014f4: 00408093 addi x1,x1,4 + +800014f8 : +Zbkb_pack_cg_cp_rs2_edges_0x55555555: + pack x19, x14, x9 # perform operation +800014f8: 089749b3 pack x19,x14,x9 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_pack_cg_cp_rs2_edges_0x55555555, Zbkb_pack_cg_cp_rs2_edges_0x55555555_str) +800014fc: 00062203 lw x4,0(x12) +80001500: 01320863 beq x4,x19,80001510 +80001504: 1bd032ef jal x5,80004ec0 +80001508: 800014f8 .word 0x800014f8 +8000150c: 8000a79c .word 0x8000a79c +80001510: 00460613 addi x12,x12,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000 +80001514: 0000ac03 lw x24,0(x1) +80001518: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x00000000 +8000151c: 0000a303 lw x6,0(x1) +80001520: 00408093 addi x1,x1,4 + +80001524 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + pack x14, x24, x6 # perform operation +80001524: 086c4733 pack x14,x24,x6 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001528: 00062203 lw x4,0(x12) +8000152c: 00e20863 beq x4,x14,8000153c +80001530: 191032ef jal x5,80004ec0 +80001534: 80001524 .word 0x80001524 +80001538: 8000a7dd .word 0x8000a7dd +8000153c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000000 +80001540: 0000ae83 lw x29,0(x1) +80001544: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x00000001 +80001548: 0000ac83 lw x25,0(x1) +8000154c: 00408093 addi x1,x1,4 + +80001550 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + pack x31, x29, x25 # perform operation +80001550: 099ecfb3 pack x31,x29,x25 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001554: 00062203 lw x4,0(x12) +80001558: 01f20863 beq x4,x31,80001568 +8000155c: 165032ef jal x5,80004ec0 +80001560: 80001550 .word 0x80001550 +80001564: 8000a82e .word 0x8000a82e +80001568: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x00000000 +8000156c: 0000ac83 lw x25,0(x1) +80001570: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000002 +80001574: 0000a883 lw x17,0(x1) +80001578: 00408093 addi x1,x1,4 + +8000157c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + pack x28, x25, x17 # perform operation +8000157c: 091cce33 pack x28,x25,x17 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +80001580: 00062203 lw x4,0(x12) +80001584: 01c20863 beq x4,x28,80001594 +80001588: 139032ef jal x5,80004ec0 +8000158c: 8000157c .word 0x8000157c +80001590: 8000a87f .word 0x8000a87f +80001594: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000 +80001598: 0000a303 lw x6,0(x1) +8000159c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x80000000 +800015a0: 0000ab03 lw x22,0(x1) +800015a4: 00408093 addi x1,x1,4 + +800015a8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + pack x16, x6, x22 # perform operation +800015a8: 09634833 pack x16,x6,x22 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015ac: 00062203 lw x4,0(x12) +800015b0: 01020863 beq x4,x16,800015c0 +800015b4: 10d032ef jal x5,80004ec0 +800015b8: 800015a8 .word 0x800015a8 +800015bc: 8000a8d0 .word 0x8000a8d0 +800015c0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000000 +800015c4: 0000aa83 lw x21,0(x1) +800015c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x80000001 +800015cc: 0000ae03 lw x28,0(x1) +800015d0: 00408093 addi x1,x1,4 + +800015d4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + pack x16, x21, x28 # perform operation +800015d4: 09cac833 pack x16,x21,x28 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +800015d8: 00062203 lw x4,0(x12) +800015dc: 01020863 beq x4,x16,800015ec +800015e0: 0e1032ef jal x5,80004ec0 +800015e4: 800015d4 .word 0x800015d4 +800015e8: 8000a928 .word 0x8000a928 +800015ec: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x00000000 +800015f0: 0000a503 lw x10,0(x1) +800015f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x7fffffff +800015f8: 0000a403 lw x8,0(x1) +800015fc: 00408093 addi x1,x1,4 + +80001600 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + pack x14, x10, x8 # perform operation +80001600: 08854733 pack x14,x10,x8 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001604: 00062203 lw x4,0(x12) +80001608: 00e20863 beq x4,x14,80001618 +8000160c: 0b5032ef jal x5,80004ec0 +80001610: 80001600 .word 0x80001600 +80001614: 8000a980 .word 0x8000a980 +80001618: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x00000000 +8000161c: 0000a583 lw x11,0(x1) +80001620: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffe +80001624: 0000a183 lw x3,0(x1) +80001628: 00408093 addi x1,x1,4 + +8000162c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + pack x10, x11, x3 # perform operation +8000162c: 0835c533 pack x10,x11,x3 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001630: 00062203 lw x4,0(x12) +80001634: 00a20863 beq x4,x10,80001644 +80001638: 089032ef jal x5,80004ec0 +8000163c: 8000162c .word 0x8000162c +80001640: 8000a9d8 .word 0x8000a9d8 +80001644: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000000 +80001648: 0000a783 lw x15,0(x1) +8000164c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffff +80001650: 0000af83 lw x31,0(x1) +80001654: 00408093 addi x1,x1,4 + +80001658 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + pack x8, x15, x31 # perform operation +80001658: 09f7c433 pack x8,x15,x31 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000165c: 00062203 lw x4,0(x12) +80001660: 00820863 beq x4,x8,80001670 +80001664: 05d032ef jal x5,80004ec0 +80001668: 80001658 .word 0x80001658 +8000166c: 8000aa30 .word 0x8000aa30 +80001670: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x00000000 +80001674: 0000af83 lw x31,0(x1) +80001678: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xfffffffe +8000167c: 0000a583 lw x11,0(x1) +80001680: 00408093 addi x1,x1,4 + +80001684 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + pack x26, x31, x11 # perform operation +80001684: 08bfcd33 pack x26,x31,x11 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +80001688: 00062203 lw x4,0(x12) +8000168c: 01a20863 beq x4,x26,8000169c +80001690: 031032ef jal x5,80004ec0 +80001694: 80001684 .word 0x80001684 +80001698: 8000aa88 .word 0x8000aa88 +8000169c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000000 +800016a0: 0000af03 lw x30,0(x1) +800016a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x5bbc8872 +800016a8: 0000ab83 lw x23,0(x1) +800016ac: 00408093 addi x1,x1,4 + +800016b0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + pack x27, x30, x23 # perform operation +800016b0: 097f4db3 pack x27,x30,x23 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016b4: 00062203 lw x4,0(x12) +800016b8: 01b20863 beq x4,x27,800016c8 +800016bc: 005032ef jal x5,80004ec0 +800016c0: 800016b0 .word 0x800016b0 +800016c4: 8000aae0 .word 0x8000aae0 +800016c8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000000 +800016cc: 0000a183 lw x3,0(x1) +800016d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xaaaaaaaa +800016d4: 0000af83 lw x31,0(x1) +800016d8: 00408093 addi x1,x1,4 + +800016dc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + pack x19, x3, x31 # perform operation +800016dc: 09f1c9b3 pack x19,x3,x31 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +800016e0: 00062203 lw x4,0(x12) +800016e4: 01320863 beq x4,x19,800016f4 +800016e8: 7d8032ef jal x5,80004ec0 +800016ec: 800016dc .word 0x800016dc +800016f0: 8000ab38 .word 0x8000ab38 +800016f4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x00000000 +800016f8: 0000af83 lw x31,0(x1) +800016fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x55555555 +80001700: 0000ad83 lw x27,0(x1) +80001704: 00408093 addi x1,x1,4 + +80001708 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + pack x9, x31, x27 # perform operation +80001708: 09bfc4b3 pack x9,x31,x27 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000170c: 00062203 lw x4,0(x12) +80001710: 00920863 beq x4,x9,80001720 +80001714: 7ac032ef jal x5,80004ec0 +80001718: 80001708 .word 0x80001708 +8000171c: 8000ab90 .word 0x8000ab90 +80001720: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000001 +80001724: 0000a183 lw x3,0(x1) +80001728: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000 +8000172c: 0000a503 lw x10,0(x1) +80001730: 00408093 addi x1,x1,4 + +80001734 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + pack x17, x3, x10 # perform operation +80001734: 08a1c8b3 pack x17,x3,x10 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001738: 00062203 lw x4,0(x12) +8000173c: 01120863 beq x4,x17,8000174c +80001740: 780032ef jal x5,80004ec0 +80001744: 80001734 .word 0x80001734 +80001748: 8000abe8 .word 0x8000abe8 +8000174c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000001 +80001750: 0000a783 lw x15,0(x1) +80001754: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x00000001 +80001758: 0000a483 lw x9,0(x1) +8000175c: 00408093 addi x1,x1,4 + +80001760 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + pack x11, x15, x9 # perform operation +80001760: 0897c5b3 pack x11,x15,x9 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001764: 00062203 lw x4,0(x12) +80001768: 00b20863 beq x4,x11,80001778 +8000176c: 754032ef jal x5,80004ec0 +80001770: 80001760 .word 0x80001760 +80001774: 8000ac39 .word 0x8000ac39 +80001778: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x00000001 +8000177c: 0000a883 lw x17,0(x1) +80001780: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000002 +80001784: 0000a683 lw x13,0(x1) +80001788: 00408093 addi x1,x1,4 + +8000178c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + pack x7, x17, x13 # perform operation +8000178c: 08d8c3b3 pack x7,x17,x13 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +80001790: 00062203 lw x4,0(x12) +80001794: 00720863 beq x4,x7,800017a4 +80001798: 728032ef jal x5,80004ec0 +8000179c: 8000178c .word 0x8000178c +800017a0: 8000ac8a .word 0x8000ac8a +800017a4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x00000001 +800017a8: 0000a103 lw x2,0(x1) +800017ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x80000000 +800017b0: 0000ac03 lw x24,0(x1) +800017b4: 00408093 addi x1,x1,4 + +800017b8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + pack x15, x2, x24 # perform operation +800017b8: 098147b3 pack x15,x2,x24 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017bc: 00062203 lw x4,0(x12) +800017c0: 00f20863 beq x4,x15,800017d0 +800017c4: 6fc032ef jal x5,80004ec0 +800017c8: 800017b8 .word 0x800017b8 +800017cc: 8000acdb .word 0x8000acdb +800017d0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000001 +800017d4: 0000a783 lw x15,0(x1) +800017d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x80000001 +800017dc: 0000ac03 lw x24,0(x1) +800017e0: 00408093 addi x1,x1,4 + +800017e4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + pack x11, x15, x24 # perform operation +800017e4: 0987c5b3 pack x11,x15,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +800017e8: 00062203 lw x4,0(x12) +800017ec: 00b20863 beq x4,x11,800017fc +800017f0: 6d0032ef jal x5,80004ec0 +800017f4: 800017e4 .word 0x800017e4 +800017f8: 8000ad33 .word 0x8000ad33 +800017fc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x00000001 +80001800: 0000a883 lw x17,0(x1) +80001804: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x7fffffff +80001808: 0000ad03 lw x26,0(x1) +8000180c: 00408093 addi x1,x1,4 + +80001810 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + pack x9, x17, x26 # perform operation +80001810: 09a8c4b3 pack x9,x17,x26 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001814: 00062203 lw x4,0(x12) +80001818: 00920863 beq x4,x9,80001828 +8000181c: 6a4032ef jal x5,80004ec0 +80001820: 80001810 .word 0x80001810 +80001824: 8000ad8b .word 0x8000ad8b +80001828: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x00000001 +8000182c: 0000a683 lw x13,0(x1) +80001830: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7ffffffe +80001834: 0000ac03 lw x24,0(x1) +80001838: 00408093 addi x1,x1,4 + +8000183c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + pack x20, x13, x24 # perform operation +8000183c: 0986ca33 pack x20,x13,x24 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001840: 00062203 lw x4,0(x12) +80001844: 01420863 beq x4,x20,80001854 +80001848: 678032ef jal x5,80004ec0 +8000184c: 8000183c .word 0x8000183c +80001850: 8000ade3 .word 0x8000ade3 +80001854: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x00000001 +80001858: 0000af83 lw x31,0(x1) +8000185c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffff +80001860: 0000a183 lw x3,0(x1) +80001864: 00408093 addi x1,x1,4 + +80001868 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + pack x18, x31, x3 # perform operation +80001868: 083fc933 pack x18,x31,x3 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +8000186c: 00062203 lw x4,0(x12) +80001870: 01220863 beq x4,x18,80001880 +80001874: 64c032ef jal x5,80004ec0 +80001878: 80001868 .word 0x80001868 +8000187c: 8000ae3b .word 0x8000ae3b +80001880: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000001 +80001884: 0000ab03 lw x22,0(x1) +80001888: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xfffffffe +8000188c: 0000a503 lw x10,0(x1) +80001890: 00408093 addi x1,x1,4 + +80001894 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + pack x17, x22, x10 # perform operation +80001894: 08ab48b3 pack x17,x22,x10 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +80001898: 00062203 lw x4,0(x12) +8000189c: 01120863 beq x4,x17,800018ac +800018a0: 620032ef jal x5,80004ec0 +800018a4: 80001894 .word 0x80001894 +800018a8: 8000ae93 .word 0x8000ae93 +800018ac: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000001 +800018b0: 0000a183 lw x3,0(x1) +800018b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x5bbc8872 +800018b8: 0000ac03 lw x24,0(x1) +800018bc: 00408093 addi x1,x1,4 + +800018c0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + pack x20, x3, x24 # perform operation +800018c0: 0981ca33 pack x20,x3,x24 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018c4: 00062203 lw x4,0(x12) +800018c8: 01420863 beq x4,x20,800018d8 +800018cc: 5f4032ef jal x5,80004ec0 +800018d0: 800018c0 .word 0x800018c0 +800018d4: 8000aeeb .word 0x8000aeeb +800018d8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000001 +800018dc: 0000a783 lw x15,0(x1) +800018e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xaaaaaaaa +800018e4: 0000a683 lw x13,0(x1) +800018e8: 00408093 addi x1,x1,4 + +800018ec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + pack x30, x15, x13 # perform operation +800018ec: 08d7cf33 pack x30,x15,x13 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +800018f0: 00062203 lw x4,0(x12) +800018f4: 01e20863 beq x4,x30,80001904 +800018f8: 5c8032ef jal x5,80004ec0 +800018fc: 800018ec .word 0x800018ec +80001900: 8000af43 .word 0x8000af43 +80001904: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x00000001 +80001908: 0000a903 lw x18,0(x1) +8000190c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x55555555 +80001910: 0000a483 lw x9,0(x1) +80001914: 00408093 addi x1,x1,4 + +80001918 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + pack x28, x18, x9 # perform operation +80001918: 08994e33 pack x28,x18,x9 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000191c: 00062203 lw x4,0(x12) +80001920: 01c20863 beq x4,x28,80001930 +80001924: 59c032ef jal x5,80004ec0 +80001928: 80001918 .word 0x80001918 +8000192c: 8000af9b .word 0x8000af9b +80001930: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x00000002 +80001934: 0000a103 lw x2,0(x1) +80001938: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x00000000 +8000193c: 0000ab83 lw x23,0(x1) +80001940: 00408093 addi x1,x1,4 + +80001944 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + pack x20, x2, x23 # perform operation +80001944: 09714a33 pack x20,x2,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001948: 00062203 lw x4,0(x12) +8000194c: 01420863 beq x4,x20,8000195c +80001950: 570032ef jal x5,80004ec0 +80001954: 80001944 .word 0x80001944 +80001958: 8000aff3 .word 0x8000aff3 +8000195c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x00000002 +80001960: 0000a903 lw x18,0(x1) +80001964: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000001 +80001968: 0000a803 lw x16,0(x1) +8000196c: 00408093 addi x1,x1,4 + +80001970 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + pack x13, x18, x16 # perform operation +80001970: 090946b3 pack x13,x18,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +80001974: 00062203 lw x4,0(x12) +80001978: 00d20863 beq x4,x13,80001988 +8000197c: 544032ef jal x5,80004ec0 +80001980: 80001970 .word 0x80001970 +80001984: 8000b044 .word 0x8000b044 +80001988: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x00000002 +8000198c: 0000ab83 lw x23,0(x1) +80001990: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x00000002 +80001994: 0000a903 lw x18,0(x1) +80001998: 00408093 addi x1,x1,4 + +8000199c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + pack x22, x23, x18 # perform operation +8000199c: 092bcb33 pack x22,x23,x18 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019a0: 00062203 lw x4,0(x12) +800019a4: 01620863 beq x4,x22,800019b4 +800019a8: 518032ef jal x5,80004ec0 +800019ac: 8000199c .word 0x8000199c +800019b0: 8000b095 .word 0x8000b095 +800019b4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000002 +800019b8: 0000aa83 lw x21,0(x1) +800019bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x80000000 +800019c0: 0000a303 lw x6,0(x1) +800019c4: 00408093 addi x1,x1,4 + +800019c8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + pack x18, x21, x6 # perform operation +800019c8: 086ac933 pack x18,x21,x6 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019cc: 00062203 lw x4,0(x12) +800019d0: 01220863 beq x4,x18,800019e0 +800019d4: 4ec032ef jal x5,80004ec0 +800019d8: 800019c8 .word 0x800019c8 +800019dc: 8000b0e6 .word 0x8000b0e6 +800019e0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000002 +800019e4: 0000a483 lw x9,0(x1) +800019e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x80000001 +800019ec: 0000a583 lw x11,0(x1) +800019f0: 00408093 addi x1,x1,4 + +800019f4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + pack x17, x9, x11 # perform operation +800019f4: 08b4c8b3 pack x17,x9,x11 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +800019f8: 00062203 lw x4,0(x12) +800019fc: 01120863 beq x4,x17,80001a0c +80001a00: 4c0032ef jal x5,80004ec0 +80001a04: 800019f4 .word 0x800019f4 +80001a08: 8000b13e .word 0x8000b13e +80001a0c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x00000002 +80001a10: 0000a383 lw x7,0(x1) +80001a14: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7fffffff +80001a18: 0000a183 lw x3,0(x1) +80001a1c: 00408093 addi x1,x1,4 + +80001a20 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + pack x23, x7, x3 # perform operation +80001a20: 0833cbb3 pack x23,x7,x3 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a24: 00062203 lw x4,0(x12) +80001a28: 01720863 beq x4,x23,80001a38 +80001a2c: 494032ef jal x5,80004ec0 +80001a30: 80001a20 .word 0x80001a20 +80001a34: 8000b196 .word 0x8000b196 +80001a38: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000002 +80001a3c: 0000aa03 lw x20,0(x1) +80001a40: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x7ffffffe +80001a44: 0000ac83 lw x25,0(x1) +80001a48: 00408093 addi x1,x1,4 + +80001a4c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + pack x13, x20, x25 # perform operation +80001a4c: 099a46b3 pack x13,x20,x25 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a50: 00062203 lw x4,0(x12) +80001a54: 00d20863 beq x4,x13,80001a64 +80001a58: 468032ef jal x5,80004ec0 +80001a5c: 80001a4c .word 0x80001a4c +80001a60: 8000b1ee .word 0x8000b1ee +80001a64: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x00000002 +80001a68: 0000a583 lw x11,0(x1) +80001a6c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xffffffff +80001a70: 0000a383 lw x7,0(x1) +80001a74: 00408093 addi x1,x1,4 + +80001a78 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + pack x31, x11, x7 # perform operation +80001a78: 0875cfb3 pack x31,x11,x7 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001a7c: 00062203 lw x4,0(x12) +80001a80: 01f20863 beq x4,x31,80001a90 +80001a84: 43c032ef jal x5,80004ec0 +80001a88: 80001a78 .word 0x80001a78 +80001a8c: 8000b246 .word 0x8000b246 +80001a90: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x00000002 +80001a94: 0000a803 lw x16,0(x1) +80001a98: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xfffffffe +80001a9c: 0000ad83 lw x27,0(x1) +80001aa0: 00408093 addi x1,x1,4 + +80001aa4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + pack x26, x16, x27 # perform operation +80001aa4: 09b84d33 pack x26,x16,x27 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001aa8: 00062203 lw x4,0(x12) +80001aac: 01a20863 beq x4,x26,80001abc +80001ab0: 410032ef jal x5,80004ec0 +80001ab4: 80001aa4 .word 0x80001aa4 +80001ab8: 8000b29e .word 0x8000b29e +80001abc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000002 +80001ac0: 0000af03 lw x30,0(x1) +80001ac4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x5bbc8872 +80001ac8: 0000ae03 lw x28,0(x1) +80001acc: 00408093 addi x1,x1,4 + +80001ad0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + pack x25, x30, x28 # perform operation +80001ad0: 09cf4cb3 pack x25,x30,x28 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001ad4: 00062203 lw x4,0(x12) +80001ad8: 01920863 beq x4,x25,80001ae8 +80001adc: 3e4032ef jal x5,80004ec0 +80001ae0: 80001ad0 .word 0x80001ad0 +80001ae4: 8000b2f6 .word 0x8000b2f6 +80001ae8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000002 +80001aec: 0000a783 lw x15,0(x1) +80001af0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xaaaaaaaa +80001af4: 0000a703 lw x14,0(x1) +80001af8: 00408093 addi x1,x1,4 + +80001afc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + pack x22, x15, x14 # perform operation +80001afc: 08e7cb33 pack x22,x15,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b00: 00062203 lw x4,0(x12) +80001b04: 01620863 beq x4,x22,80001b14 +80001b08: 3b8032ef jal x5,80004ec0 +80001b0c: 80001afc .word 0x80001afc +80001b10: 8000b34e .word 0x8000b34e +80001b14: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000002 +80001b18: 0000aa03 lw x20,0(x1) +80001b1c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x55555555 +80001b20: 0000a383 lw x7,0(x1) +80001b24: 00408093 addi x1,x1,4 + +80001b28 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + pack x10, x20, x7 # perform operation +80001b28: 087a4533 pack x10,x20,x7 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b2c: 00062203 lw x4,0(x12) +80001b30: 00a20863 beq x4,x10,80001b40 +80001b34: 38c032ef jal x5,80004ec0 +80001b38: 80001b28 .word 0x80001b28 +80001b3c: 8000b3a6 .word 0x8000b3a6 +80001b40: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x80000000 +80001b44: 0000a983 lw x19,0(x1) +80001b48: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x00000000 +80001b4c: 0000aa03 lw x20,0(x1) +80001b50: 00408093 addi x1,x1,4 + +80001b54 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + pack x7, x19, x20 # perform operation +80001b54: 0949c3b3 pack x7,x19,x20 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b58: 00062203 lw x4,0(x12) +80001b5c: 00720863 beq x4,x7,80001b6c +80001b60: 360032ef jal x5,80004ec0 +80001b64: 80001b54 .word 0x80001b54 +80001b68: 8000b3fe .word 0x8000b3fe +80001b6c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x80000000 +80001b70: 0000af03 lw x30,0(x1) +80001b74: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x00000001 +80001b78: 0000ac83 lw x25,0(x1) +80001b7c: 00408093 addi x1,x1,4 + +80001b80 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + pack x29, x30, x25 # perform operation +80001b80: 099f4eb3 pack x29,x30,x25 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001b84: 00062203 lw x4,0(x12) +80001b88: 01d20863 beq x4,x29,80001b98 +80001b8c: 334032ef jal x5,80004ec0 +80001b90: 80001b80 .word 0x80001b80 +80001b94: 8000b456 .word 0x8000b456 +80001b98: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x80000000 +80001b9c: 0000a583 lw x11,0(x1) +80001ba0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x00000002 +80001ba4: 0000a183 lw x3,0(x1) +80001ba8: 00408093 addi x1,x1,4 + +80001bac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + pack x25, x11, x3 # perform operation +80001bac: 0835ccb3 pack x25,x11,x3 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bb0: 00062203 lw x4,0(x12) +80001bb4: 01920863 beq x4,x25,80001bc4 +80001bb8: 308032ef jal x5,80004ec0 +80001bbc: 80001bac .word 0x80001bac +80001bc0: 8000b4ae .word 0x8000b4ae +80001bc4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x80000000 +80001bc8: 0000ae83 lw x29,0(x1) +80001bcc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x80000000 +80001bd0: 0000ad03 lw x26,0(x1) +80001bd4: 00408093 addi x1,x1,4 + +80001bd8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + pack x11, x29, x26 # perform operation +80001bd8: 09aec5b3 pack x11,x29,x26 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001bdc: 00062203 lw x4,0(x12) +80001be0: 00b20863 beq x4,x11,80001bf0 +80001be4: 2dc032ef jal x5,80004ec0 +80001be8: 80001bd8 .word 0x80001bd8 +80001bec: 8000b506 .word 0x8000b506 +80001bf0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x80000000 +80001bf4: 0000a883 lw x17,0(x1) +80001bf8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x80000001 +80001bfc: 0000a903 lw x18,0(x1) +80001c00: 00408093 addi x1,x1,4 + +80001c04 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + pack x3, x17, x18 # perform operation +80001c04: 0928c1b3 pack x3,x17,x18 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c08: 00062203 lw x4,0(x12) +80001c0c: 00320863 beq x4,x3,80001c1c +80001c10: 2b0032ef jal x5,80004ec0 +80001c14: 80001c04 .word 0x80001c04 +80001c18: 8000b565 .word 0x8000b565 +80001c1c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x80000000 +80001c20: 0000aa03 lw x20,0(x1) +80001c24: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7fffffff +80001c28: 0000a183 lw x3,0(x1) +80001c2c: 00408093 addi x1,x1,4 + +80001c30 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + pack x22, x20, x3 # perform operation +80001c30: 083a4b33 pack x22,x20,x3 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c34: 00062203 lw x4,0(x12) +80001c38: 01620863 beq x4,x22,80001c48 +80001c3c: 284032ef jal x5,80004ec0 +80001c40: 80001c30 .word 0x80001c30 +80001c44: 8000b5c4 .word 0x8000b5c4 +80001c48: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x80000000 +80001c4c: 0000a583 lw x11,0(x1) +80001c50: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x7ffffffe +80001c54: 0000aa83 lw x21,0(x1) +80001c58: 00408093 addi x1,x1,4 + +80001c5c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + pack x24, x11, x21 # perform operation +80001c5c: 0955cc33 pack x24,x11,x21 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c60: 00062203 lw x4,0(x12) +80001c64: 01820863 beq x4,x24,80001c74 +80001c68: 258032ef jal x5,80004ec0 +80001c6c: 80001c5c .word 0x80001c5c +80001c70: 8000b623 .word 0x8000b623 +80001c74: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x80000000 +80001c78: 0000a583 lw x11,0(x1) +80001c7c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xffffffff +80001c80: 0000ad03 lw x26,0(x1) +80001c84: 00408093 addi x1,x1,4 + +80001c88 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + pack x17, x11, x26 # perform operation +80001c88: 09a5c8b3 pack x17,x11,x26 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001c8c: 00062203 lw x4,0(x12) +80001c90: 01120863 beq x4,x17,80001ca0 +80001c94: 22c032ef jal x5,80004ec0 +80001c98: 80001c88 .word 0x80001c88 +80001c9c: 8000b682 .word 0x8000b682 +80001ca0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x80000000 +80001ca4: 0000ac83 lw x25,0(x1) +80001ca8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xfffffffe +80001cac: 0000a503 lw x10,0(x1) +80001cb0: 00408093 addi x1,x1,4 + +80001cb4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + pack x30, x25, x10 # perform operation +80001cb4: 08accf33 pack x30,x25,x10 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cb8: 00062203 lw x4,0(x12) +80001cbc: 01e20863 beq x4,x30,80001ccc +80001cc0: 200032ef jal x5,80004ec0 +80001cc4: 80001cb4 .word 0x80001cb4 +80001cc8: 8000b6e1 .word 0x8000b6e1 +80001ccc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x80000000 +80001cd0: 0000aa83 lw x21,0(x1) +80001cd4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x5bbc8872 +80001cd8: 0000a983 lw x19,0(x1) +80001cdc: 00408093 addi x1,x1,4 + +80001ce0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + pack x15, x21, x19 # perform operation +80001ce0: 093ac7b3 pack x15,x21,x19 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001ce4: 00062203 lw x4,0(x12) +80001ce8: 00f20863 beq x4,x15,80001cf8 +80001cec: 1d4032ef jal x5,80004ec0 +80001cf0: 80001ce0 .word 0x80001ce0 +80001cf4: 8000b740 .word 0x8000b740 +80001cf8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x80000000 +80001cfc: 0000a103 lw x2,0(x1) +80001d00: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xaaaaaaaa +80001d04: 0000a783 lw x15,0(x1) +80001d08: 00408093 addi x1,x1,4 + +80001d0c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + pack x11, x2, x15 # perform operation +80001d0c: 08f145b3 pack x11,x2,x15 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d10: 00062203 lw x4,0(x12) +80001d14: 00b20863 beq x4,x11,80001d24 +80001d18: 1a8032ef jal x5,80004ec0 +80001d1c: 80001d0c .word 0x80001d0c +80001d20: 8000b79f .word 0x8000b79f +80001d24: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x80000000 +80001d28: 0000a183 lw x3,0(x1) +80001d2c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x55555555 +80001d30: 0000a983 lw x19,0(x1) +80001d34: 00408093 addi x1,x1,4 + +80001d38 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + pack x11, x3, x19 # perform operation +80001d38: 0931c5b3 pack x11,x3,x19 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d3c: 00062203 lw x4,0(x12) +80001d40: 00b20863 beq x4,x11,80001d50 +80001d44: 17c032ef jal x5,80004ec0 +80001d48: 80001d38 .word 0x80001d38 +80001d4c: 8000b7fe .word 0x8000b7fe +80001d50: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x80000001 +80001d54: 0000a383 lw x7,0(x1) +80001d58: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x00000000 +80001d5c: 0000ad83 lw x27,0(x1) +80001d60: 00408093 addi x1,x1,4 + +80001d64 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + pack x14, x7, x27 # perform operation +80001d64: 09b3c733 pack x14,x7,x27 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d68: 00062203 lw x4,0(x12) +80001d6c: 00e20863 beq x4,x14,80001d7c +80001d70: 150032ef jal x5,80004ec0 +80001d74: 80001d64 .word 0x80001d64 +80001d78: 8000b85d .word 0x8000b85d +80001d7c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x80000001 +80001d80: 0000a303 lw x6,0(x1) +80001d84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x00000001 +80001d88: 0000a483 lw x9,0(x1) +80001d8c: 00408093 addi x1,x1,4 + +80001d90 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + pack x18, x6, x9 # perform operation +80001d90: 08934933 pack x18,x6,x9 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001d94: 00062203 lw x4,0(x12) +80001d98: 01220863 beq x4,x18,80001da8 +80001d9c: 124032ef jal x5,80004ec0 +80001da0: 80001d90 .word 0x80001d90 +80001da4: 8000b8b5 .word 0x8000b8b5 +80001da8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x80000001 +80001dac: 0000ab03 lw x22,0(x1) +80001db0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000002 +80001db4: 0000a683 lw x13,0(x1) +80001db8: 00408093 addi x1,x1,4 + +80001dbc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + pack x26, x22, x13 # perform operation +80001dbc: 08db4d33 pack x26,x22,x13 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001dc0: 00062203 lw x4,0(x12) +80001dc4: 01a20863 beq x4,x26,80001dd4 +80001dc8: 0f8032ef jal x5,80004ec0 +80001dcc: 80001dbc .word 0x80001dbc +80001dd0: 8000b90d .word 0x8000b90d +80001dd4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x80000001 +80001dd8: 0000ae03 lw x28,0(x1) +80001ddc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x80000000 +80001de0: 0000af83 lw x31,0(x1) +80001de4: 00408093 addi x1,x1,4 + +80001de8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + pack x29, x28, x31 # perform operation +80001de8: 09fe4eb3 pack x29,x28,x31 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001dec: 00062203 lw x4,0(x12) +80001df0: 01d20863 beq x4,x29,80001e00 +80001df4: 0cc032ef jal x5,80004ec0 +80001df8: 80001de8 .word 0x80001de8 +80001dfc: 8000b965 .word 0x8000b965 +80001e00: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x80000001 +80001e04: 0000ae03 lw x28,0(x1) +80001e08: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x80000001 +80001e0c: 0000a403 lw x8,0(x1) +80001e10: 00408093 addi x1,x1,4 + +80001e14 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + pack x23, x28, x8 # perform operation +80001e14: 088e4bb3 pack x23,x28,x8 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e18: 00062203 lw x4,0(x12) +80001e1c: 01720863 beq x4,x23,80001e2c +80001e20: 0a0032ef jal x5,80004ec0 +80001e24: 80001e14 .word 0x80001e14 +80001e28: 8000b9c4 .word 0x8000b9c4 +80001e2c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x80000001 +80001e30: 0000a703 lw x14,0(x1) +80001e34: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7fffffff +80001e38: 0000ad83 lw x27,0(x1) +80001e3c: 00408093 addi x1,x1,4 + +80001e40 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + pack x2, x14, x27 # perform operation +80001e40: 09b74133 pack x2,x14,x27 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e44: 00062203 lw x4,0(x12) +80001e48: 00220863 beq x4,x2,80001e58 +80001e4c: 074032ef jal x5,80004ec0 +80001e50: 80001e40 .word 0x80001e40 +80001e54: 8000ba23 .word 0x8000ba23 +80001e58: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x80000001 +80001e5c: 0000a983 lw x19,0(x1) +80001e60: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x7ffffffe +80001e64: 0000aa83 lw x21,0(x1) +80001e68: 00408093 addi x1,x1,4 + +80001e6c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + pack x14, x19, x21 # perform operation +80001e6c: 0959c733 pack x14,x19,x21 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e70: 00062203 lw x4,0(x12) +80001e74: 00e20863 beq x4,x14,80001e84 +80001e78: 048032ef jal x5,80004ec0 +80001e7c: 80001e6c .word 0x80001e6c +80001e80: 8000ba82 .word 0x8000ba82 +80001e84: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x80000001 +80001e88: 0000ac83 lw x25,0(x1) +80001e8c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xffffffff +80001e90: 0000ab83 lw x23,0(x1) +80001e94: 00408093 addi x1,x1,4 + +80001e98 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + pack x15, x25, x23 # perform operation +80001e98: 097cc7b3 pack x15,x25,x23 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001e9c: 00062203 lw x4,0(x12) +80001ea0: 00f20863 beq x4,x15,80001eb0 +80001ea4: 01c032ef jal x5,80004ec0 +80001ea8: 80001e98 .word 0x80001e98 +80001eac: 8000bae1 .word 0x8000bae1 +80001eb0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x80000001 +80001eb4: 0000af03 lw x30,0(x1) +80001eb8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xfffffffe +80001ebc: 0000a703 lw x14,0(x1) +80001ec0: 00408093 addi x1,x1,4 + +80001ec4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + pack x31, x30, x14 # perform operation +80001ec4: 08ef4fb3 pack x31,x30,x14 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ec8: 00062203 lw x4,0(x12) +80001ecc: 01f20863 beq x4,x31,80001edc +80001ed0: 7f1022ef jal x5,80004ec0 +80001ed4: 80001ec4 .word 0x80001ec4 +80001ed8: 8000bb40 .word 0x8000bb40 +80001edc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x80000001 +80001ee0: 0000a783 lw x15,0(x1) +80001ee4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x5bbc8872 +80001ee8: 0000a903 lw x18,0(x1) +80001eec: 00408093 addi x1,x1,4 + +80001ef0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + pack x11, x15, x18 # perform operation +80001ef0: 0927c5b3 pack x11,x15,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001ef4: 00062203 lw x4,0(x12) +80001ef8: 00b20863 beq x4,x11,80001f08 +80001efc: 7c5022ef jal x5,80004ec0 +80001f00: 80001ef0 .word 0x80001ef0 +80001f04: 8000bb9f .word 0x8000bb9f +80001f08: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x80000001 +80001f0c: 0000a683 lw x13,0(x1) +80001f10: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xaaaaaaaa +80001f14: 0000a583 lw x11,0(x1) +80001f18: 00408093 addi x1,x1,4 + +80001f1c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + pack x16, x13, x11 # perform operation +80001f1c: 08b6c833 pack x16,x13,x11 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f20: 00062203 lw x4,0(x12) +80001f24: 01020863 beq x4,x16,80001f34 +80001f28: 799022ef jal x5,80004ec0 +80001f2c: 80001f1c .word 0x80001f1c +80001f30: 8000bbfe .word 0x8000bbfe +80001f34: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x80000001 +80001f38: 0000ad83 lw x27,0(x1) +80001f3c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x55555555 +80001f40: 0000a303 lw x6,0(x1) +80001f44: 00408093 addi x1,x1,4 + +80001f48 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + pack x21, x27, x6 # perform operation +80001f48: 086dcab3 pack x21,x27,x6 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f4c: 00062203 lw x4,0(x12) +80001f50: 01520863 beq x4,x21,80001f60 +80001f54: 76d022ef jal x5,80004ec0 +80001f58: 80001f48 .word 0x80001f48 +80001f5c: 8000bc5d .word 0x8000bc5d +80001f60: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x7fffffff +80001f64: 0000af83 lw x31,0(x1) +80001f68: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x00000000 +80001f6c: 0000a303 lw x6,0(x1) +80001f70: 00408093 addi x1,x1,4 + +80001f74 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + pack x21, x31, x6 # perform operation +80001f74: 086fcab3 pack x21,x31,x6 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001f78: 00062203 lw x4,0(x12) +80001f7c: 01520863 beq x4,x21,80001f8c +80001f80: 741022ef jal x5,80004ec0 +80001f84: 80001f74 .word 0x80001f74 +80001f88: 8000bcbc .word 0x8000bcbc +80001f8c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7fffffff +80001f90: 0000a303 lw x6,0(x1) +80001f94: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000001 +80001f98: 0000a783 lw x15,0(x1) +80001f9c: 00408093 addi x1,x1,4 + +80001fa0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + pack x10, x6, x15 # perform operation +80001fa0: 08f34533 pack x10,x6,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fa4: 00062203 lw x4,0(x12) +80001fa8: 00a20863 beq x4,x10,80001fb8 +80001fac: 715022ef jal x5,80004ec0 +80001fb0: 80001fa0 .word 0x80001fa0 +80001fb4: 8000bd14 .word 0x8000bd14 +80001fb8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x7fffffff +80001fbc: 0000ae83 lw x29,0(x1) +80001fc0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x00000002 +80001fc4: 0000ab03 lw x22,0(x1) +80001fc8: 00408093 addi x1,x1,4 + +80001fcc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + pack x18, x29, x22 # perform operation +80001fcc: 096ec933 pack x18,x29,x22 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001fd0: 00062203 lw x4,0(x12) +80001fd4: 01220863 beq x4,x18,80001fe4 +80001fd8: 6e9022ef jal x5,80004ec0 +80001fdc: 80001fcc .word 0x80001fcc +80001fe0: 8000bd6c .word 0x8000bd6c +80001fe4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x7fffffff +80001fe8: 0000ab83 lw x23,0(x1) +80001fec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x80000000 +80001ff0: 0000ac83 lw x25,0(x1) +80001ff4: 00408093 addi x1,x1,4 + +80001ff8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + pack x14, x23, x25 # perform operation +80001ff8: 099bc733 pack x14,x23,x25 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80001ffc: 00062203 lw x4,0(x12) +80002000: 00e20863 beq x4,x14,80002010 +80002004: 6bd022ef jal x5,80004ec0 +80002008: 80001ff8 .word 0x80001ff8 +8000200c: 8000bdc4 .word 0x8000bdc4 +80002010: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x7fffffff +80002014: 0000a883 lw x17,0(x1) +80002018: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x80000001 +8000201c: 0000ab03 lw x22,0(x1) +80002020: 00408093 addi x1,x1,4 + +80002024 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + pack x6, x17, x22 # perform operation +80002024: 0968c333 pack x6,x17,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002028: 00062203 lw x4,0(x12) +8000202c: 00620863 beq x4,x6,8000203c +80002030: 691022ef jal x5,80004ec0 +80002034: 80002024 .word 0x80002024 +80002038: 8000be23 .word 0x8000be23 +8000203c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x7fffffff +80002040: 0000a803 lw x16,0(x1) +80002044: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x7fffffff +80002048: 0000ab83 lw x23,0(x1) +8000204c: 00408093 addi x1,x1,4 + +80002050 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + pack x11, x16, x23 # perform operation +80002050: 097845b3 pack x11,x16,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002054: 00062203 lw x4,0(x12) +80002058: 00b20863 beq x4,x11,80002068 +8000205c: 665022ef jal x5,80004ec0 +80002060: 80002050 .word 0x80002050 +80002064: 8000be82 .word 0x8000be82 +80002068: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x7fffffff +8000206c: 0000a483 lw x9,0(x1) +80002070: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x7ffffffe +80002074: 0000ab83 lw x23,0(x1) +80002078: 00408093 addi x1,x1,4 + +8000207c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + pack x14, x9, x23 # perform operation +8000207c: 0974c733 pack x14,x9,x23 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +80002080: 00062203 lw x4,0(x12) +80002084: 00e20863 beq x4,x14,80002094 +80002088: 639022ef jal x5,80004ec0 +8000208c: 8000207c .word 0x8000207c +80002090: 8000bee1 .word 0x8000bee1 +80002094: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x7fffffff +80002098: 0000ab83 lw x23,0(x1) +8000209c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xffffffff +800020a0: 0000ae83 lw x29,0(x1) +800020a4: 00408093 addi x1,x1,4 + +800020a8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + pack x27, x23, x29 # perform operation +800020a8: 09dbcdb3 pack x27,x23,x29 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020ac: 00062203 lw x4,0(x12) +800020b0: 01b20863 beq x4,x27,800020c0 +800020b4: 60d022ef jal x5,80004ec0 +800020b8: 800020a8 .word 0x800020a8 +800020bc: 8000bf40 .word 0x8000bf40 +800020c0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x7fffffff +800020c4: 0000a883 lw x17,0(x1) +800020c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xfffffffe +800020cc: 0000a403 lw x8,0(x1) +800020d0: 00408093 addi x1,x1,4 + +800020d4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + pack x18, x17, x8 # perform operation +800020d4: 0888c933 pack x18,x17,x8 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +800020d8: 00062203 lw x4,0(x12) +800020dc: 01220863 beq x4,x18,800020ec +800020e0: 5e1022ef jal x5,80004ec0 +800020e4: 800020d4 .word 0x800020d4 +800020e8: 8000bf9f .word 0x8000bf9f +800020ec: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x7fffffff +800020f0: 0000a503 lw x10,0(x1) +800020f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5bbc8872 +800020f8: 0000a783 lw x15,0(x1) +800020fc: 00408093 addi x1,x1,4 + +80002100 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + pack x3, x10, x15 # perform operation +80002100: 08f541b3 pack x3,x10,x15 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002104: 00062203 lw x4,0(x12) +80002108: 00320863 beq x4,x3,80002118 +8000210c: 5b5022ef jal x5,80004ec0 +80002110: 80002100 .word 0x80002100 +80002114: 8000bffe .word 0x8000bffe +80002118: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7fffffff +8000211c: 0000ac03 lw x24,0(x1) +80002120: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xaaaaaaaa +80002124: 0000a483 lw x9,0(x1) +80002128: 00408093 addi x1,x1,4 + +8000212c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + pack x11, x24, x9 # perform operation +8000212c: 089c45b3 pack x11,x24,x9 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002130: 00062203 lw x4,0(x12) +80002134: 00b20863 beq x4,x11,80002144 +80002138: 589022ef jal x5,80004ec0 +8000213c: 8000212c .word 0x8000212c +80002140: 8000c05d .word 0x8000c05d +80002144: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x7fffffff +80002148: 0000af03 lw x30,0(x1) +8000214c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x55555555 +80002150: 0000af83 lw x31,0(x1) +80002154: 00408093 addi x1,x1,4 + +80002158 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + pack x9, x30, x31 # perform operation +80002158: 09ff44b3 pack x9,x30,x31 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000215c: 00062203 lw x4,0(x12) +80002160: 00920863 beq x4,x9,80002170 +80002164: 55d022ef jal x5,80004ec0 +80002168: 80002158 .word 0x80002158 +8000216c: 8000c0bc .word 0x8000c0bc +80002170: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7ffffffe +80002174: 0000ad83 lw x27,0(x1) +80002178: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x00000000 +8000217c: 0000a403 lw x8,0(x1) +80002180: 00408093 addi x1,x1,4 + +80002184 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + pack x11, x27, x8 # perform operation +80002184: 088dc5b3 pack x11,x27,x8 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +80002188: 00062203 lw x4,0(x12) +8000218c: 00b20863 beq x4,x11,8000219c +80002190: 531022ef jal x5,80004ec0 +80002194: 80002184 .word 0x80002184 +80002198: 8000c11b .word 0x8000c11b +8000219c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x7ffffffe +800021a0: 0000a803 lw x16,0(x1) +800021a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x00000001 +800021a8: 0000a583 lw x11,0(x1) +800021ac: 00408093 addi x1,x1,4 + +800021b0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + pack x28, x16, x11 # perform operation +800021b0: 08b84e33 pack x28,x16,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021b4: 00062203 lw x4,0(x12) +800021b8: 01c20863 beq x4,x28,800021c8 +800021bc: 505022ef jal x5,80004ec0 +800021c0: 800021b0 .word 0x800021b0 +800021c4: 8000c173 .word 0x8000c173 +800021c8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x7ffffffe +800021cc: 0000ae03 lw x28,0(x1) +800021d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x00000002 +800021d4: 0000af83 lw x31,0(x1) +800021d8: 00408093 addi x1,x1,4 + +800021dc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + pack x9, x28, x31 # perform operation +800021dc: 09fe44b3 pack x9,x28,x31 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +800021e0: 00062203 lw x4,0(x12) +800021e4: 00920863 beq x4,x9,800021f4 +800021e8: 4d9022ef jal x5,80004ec0 +800021ec: 800021dc .word 0x800021dc +800021f0: 8000c1cb .word 0x8000c1cb +800021f4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7ffffffe +800021f8: 0000ad83 lw x27,0(x1) +800021fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x80000000 +80002200: 0000af83 lw x31,0(x1) +80002204: 00408093 addi x1,x1,4 + +80002208 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + pack x29, x27, x31 # perform operation +80002208: 09fdceb3 pack x29,x27,x31 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000220c: 00062203 lw x4,0(x12) +80002210: 01d20863 beq x4,x29,80002220 +80002214: 4ad022ef jal x5,80004ec0 +80002218: 80002208 .word 0x80002208 +8000221c: 8000c223 .word 0x8000c223 +80002220: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x7ffffffe +80002224: 0000ab83 lw x23,0(x1) +80002228: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x80000001 +8000222c: 0000a403 lw x8,0(x1) +80002230: 00408093 addi x1,x1,4 + +80002234 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + pack x13, x23, x8 # perform operation +80002234: 088bc6b3 pack x13,x23,x8 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002238: 00062203 lw x4,0(x12) +8000223c: 00d20863 beq x4,x13,8000224c +80002240: 481022ef jal x5,80004ec0 +80002244: 80002234 .word 0x80002234 +80002248: 8000c282 .word 0x8000c282 +8000224c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7ffffffe +80002250: 0000a903 lw x18,0(x1) +80002254: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x7fffffff +80002258: 0000ab83 lw x23,0(x1) +8000225c: 00408093 addi x1,x1,4 + +80002260 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + pack x29, x18, x23 # perform operation +80002260: 09794eb3 pack x29,x18,x23 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002264: 00062203 lw x4,0(x12) +80002268: 01d20863 beq x4,x29,80002278 +8000226c: 455022ef jal x5,80004ec0 +80002270: 80002260 .word 0x80002260 +80002274: 8000c2e1 .word 0x8000c2e1 +80002278: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x7ffffffe +8000227c: 0000ac83 lw x25,0(x1) +80002280: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7ffffffe +80002284: 0000ad83 lw x27,0(x1) +80002288: 00408093 addi x1,x1,4 + +8000228c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + pack x26, x25, x27 # perform operation +8000228c: 09bccd33 pack x26,x25,x27 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +80002290: 00062203 lw x4,0(x12) +80002294: 01a20863 beq x4,x26,800022a4 +80002298: 429022ef jal x5,80004ec0 +8000229c: 8000228c .word 0x8000228c +800022a0: 8000c340 .word 0x8000c340 +800022a4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7ffffffe +800022a8: 0000ad83 lw x27,0(x1) +800022ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xffffffff +800022b0: 0000a303 lw x6,0(x1) +800022b4: 00408093 addi x1,x1,4 + +800022b8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + pack x20, x27, x6 # perform operation +800022b8: 086dca33 pack x20,x27,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022bc: 00062203 lw x4,0(x12) +800022c0: 01420863 beq x4,x20,800022d0 +800022c4: 3fd022ef jal x5,80004ec0 +800022c8: 800022b8 .word 0x800022b8 +800022cc: 8000c39f .word 0x8000c39f +800022d0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7ffffffe +800022d4: 0000a103 lw x2,0(x1) +800022d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xfffffffe +800022dc: 0000a703 lw x14,0(x1) +800022e0: 00408093 addi x1,x1,4 + +800022e4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + pack x29, x2, x14 # perform operation +800022e4: 08e14eb3 pack x29,x2,x14 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +800022e8: 00062203 lw x4,0(x12) +800022ec: 01d20863 beq x4,x29,800022fc +800022f0: 3d1022ef jal x5,80004ec0 +800022f4: 800022e4 .word 0x800022e4 +800022f8: 8000c3fe .word 0x8000c3fe +800022fc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x7ffffffe +80002300: 0000ae83 lw x29,0(x1) +80002304: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x5bbc8872 +80002308: 0000a703 lw x14,0(x1) +8000230c: 00408093 addi x1,x1,4 + +80002310 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + pack x18, x29, x14 # perform operation +80002310: 08eec933 pack x18,x29,x14 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002314: 00062203 lw x4,0(x12) +80002318: 01220863 beq x4,x18,80002328 +8000231c: 3a5022ef jal x5,80004ec0 +80002320: 80002310 .word 0x80002310 +80002324: 8000c45d .word 0x8000c45d +80002328: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x7ffffffe +8000232c: 0000a583 lw x11,0(x1) +80002330: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xaaaaaaaa +80002334: 0000a883 lw x17,0(x1) +80002338: 00408093 addi x1,x1,4 + +8000233c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + pack x25, x11, x17 # perform operation +8000233c: 0915ccb3 pack x25,x11,x17 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002340: 00062203 lw x4,0(x12) +80002344: 01920863 beq x4,x25,80002354 +80002348: 379022ef jal x5,80004ec0 +8000234c: 8000233c .word 0x8000233c +80002350: 8000c4bc .word 0x8000c4bc +80002354: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7ffffffe +80002358: 0000a403 lw x8,0(x1) +8000235c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x55555555 +80002360: 0000af83 lw x31,0(x1) +80002364: 00408093 addi x1,x1,4 + +80002368 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + pack x18, x8, x31 # perform operation +80002368: 09f44933 pack x18,x8,x31 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +8000236c: 00062203 lw x4,0(x12) +80002370: 01220863 beq x4,x18,80002380 +80002374: 34d022ef jal x5,80004ec0 +80002378: 80002368 .word 0x80002368 +8000237c: 8000c51b .word 0x8000c51b +80002380: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xffffffff +80002384: 0000ae03 lw x28,0(x1) +80002388: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x00000000 +8000238c: 0000ac83 lw x25,0(x1) +80002390: 00408093 addi x1,x1,4 + +80002394 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + pack x18, x28, x25 # perform operation +80002394: 099e4933 pack x18,x28,x25 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +80002398: 00062203 lw x4,0(x12) +8000239c: 01220863 beq x4,x18,800023ac +800023a0: 321022ef jal x5,80004ec0 +800023a4: 80002394 .word 0x80002394 +800023a8: 8000c57a .word 0x8000c57a +800023ac: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xffffffff +800023b0: 0000a183 lw x3,0(x1) +800023b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x00000001 +800023b8: 0000aa83 lw x21,0(x1) +800023bc: 00408093 addi x1,x1,4 + +800023c0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + pack x26, x3, x21 # perform operation +800023c0: 0951cd33 pack x26,x3,x21 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023c4: 00062203 lw x4,0(x12) +800023c8: 01a20863 beq x4,x26,800023d8 +800023cc: 2f5022ef jal x5,80004ec0 +800023d0: 800023c0 .word 0x800023c0 +800023d4: 8000c5d2 .word 0x8000c5d2 +800023d8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xffffffff +800023dc: 0000ad83 lw x27,0(x1) +800023e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x00000002 +800023e4: 0000af83 lw x31,0(x1) +800023e8: 00408093 addi x1,x1,4 + +800023ec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + pack x20, x27, x31 # perform operation +800023ec: 09fdca33 pack x20,x27,x31 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +800023f0: 00062203 lw x4,0(x12) +800023f4: 01420863 beq x4,x20,80002404 +800023f8: 2c9022ef jal x5,80004ec0 +800023fc: 800023ec .word 0x800023ec +80002400: 8000c62a .word 0x8000c62a +80002404: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xffffffff +80002408: 0000a583 lw x11,0(x1) +8000240c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x80000000 +80002410: 0000a683 lw x13,0(x1) +80002414: 00408093 addi x1,x1,4 + +80002418 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + pack x10, x11, x13 # perform operation +80002418: 08d5c533 pack x10,x11,x13 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000241c: 00062203 lw x4,0(x12) +80002420: 00a20863 beq x4,x10,80002430 +80002424: 29d022ef jal x5,80004ec0 +80002428: 80002418 .word 0x80002418 +8000242c: 8000c682 .word 0x8000c682 +80002430: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xffffffff +80002434: 0000a103 lw x2,0(x1) +80002438: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x80000001 +8000243c: 0000ad03 lw x26,0(x1) +80002440: 00408093 addi x1,x1,4 + +80002444 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + pack x6, x2, x26 # perform operation +80002444: 09a14333 pack x6,x2,x26 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002448: 00062203 lw x4,0(x12) +8000244c: 00620863 beq x4,x6,8000245c +80002450: 271022ef jal x5,80004ec0 +80002454: 80002444 .word 0x80002444 +80002458: 8000c6e1 .word 0x8000c6e1 +8000245c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xffffffff +80002460: 0000ad03 lw x26,0(x1) +80002464: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7fffffff +80002468: 0000ab03 lw x22,0(x1) +8000246c: 00408093 addi x1,x1,4 + +80002470 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + pack x20, x26, x22 # perform operation +80002470: 096d4a33 pack x20,x26,x22 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +80002474: 00062203 lw x4,0(x12) +80002478: 01420863 beq x4,x20,80002488 +8000247c: 245022ef jal x5,80004ec0 +80002480: 80002470 .word 0x80002470 +80002484: 8000c740 .word 0x8000c740 +80002488: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xffffffff +8000248c: 0000ac03 lw x24,0(x1) +80002490: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffe +80002494: 0000a183 lw x3,0(x1) +80002498: 00408093 addi x1,x1,4 + +8000249c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + pack x14, x24, x3 # perform operation +8000249c: 083c4733 pack x14,x24,x3 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024a0: 00062203 lw x4,0(x12) +800024a4: 00e20863 beq x4,x14,800024b4 +800024a8: 219022ef jal x5,80004ec0 +800024ac: 8000249c .word 0x8000249c +800024b0: 8000c79f .word 0x8000c79f +800024b4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xffffffff +800024b8: 0000ab03 lw x22,0(x1) +800024bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xffffffff +800024c0: 0000ae03 lw x28,0(x1) +800024c4: 00408093 addi x1,x1,4 + +800024c8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + pack x14, x22, x28 # perform operation +800024c8: 09cb4733 pack x14,x22,x28 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024cc: 00062203 lw x4,0(x12) +800024d0: 00e20863 beq x4,x14,800024e0 +800024d4: 1ed022ef jal x5,80004ec0 +800024d8: 800024c8 .word 0x800024c8 +800024dc: 8000c7fe .word 0x8000c7fe +800024e0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xffffffff +800024e4: 0000a183 lw x3,0(x1) +800024e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xfffffffe +800024ec: 0000a503 lw x10,0(x1) +800024f0: 00408093 addi x1,x1,4 + +800024f4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + pack x25, x3, x10 # perform operation +800024f4: 08a1ccb3 pack x25,x3,x10 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +800024f8: 00062203 lw x4,0(x12) +800024fc: 01920863 beq x4,x25,8000250c +80002500: 1c1022ef jal x5,80004ec0 +80002504: 800024f4 .word 0x800024f4 +80002508: 8000c85d .word 0x8000c85d +8000250c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xffffffff +80002510: 0000aa83 lw x21,0(x1) +80002514: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x5bbc8872 +80002518: 0000a883 lw x17,0(x1) +8000251c: 00408093 addi x1,x1,4 + +80002520 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + pack x6, x21, x17 # perform operation +80002520: 091ac333 pack x6,x21,x17 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002524: 00062203 lw x4,0(x12) +80002528: 00620863 beq x4,x6,80002538 +8000252c: 195022ef jal x5,80004ec0 +80002530: 80002520 .word 0x80002520 +80002534: 8000c8bc .word 0x8000c8bc +80002538: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xffffffff +8000253c: 0000a783 lw x15,0(x1) +80002540: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xaaaaaaaa +80002544: 0000a103 lw x2,0(x1) +80002548: 00408093 addi x1,x1,4 + +8000254c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + pack x18, x15, x2 # perform operation +8000254c: 0827c933 pack x18,x15,x2 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002550: 00062203 lw x4,0(x12) +80002554: 01220863 beq x4,x18,80002564 +80002558: 169022ef jal x5,80004ec0 +8000255c: 8000254c .word 0x8000254c +80002560: 8000c91b .word 0x8000c91b +80002564: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xffffffff +80002568: 0000a403 lw x8,0(x1) +8000256c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x55555555 +80002570: 0000a903 lw x18,0(x1) +80002574: 00408093 addi x1,x1,4 + +80002578 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + pack x7, x8, x18 # perform operation +80002578: 092443b3 pack x7,x8,x18 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +8000257c: 00062203 lw x4,0(x12) +80002580: 00720863 beq x4,x7,80002590 +80002584: 13d022ef jal x5,80004ec0 +80002588: 80002578 .word 0x80002578 +8000258c: 8000c97a .word 0x8000c97a +80002590: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xfffffffe +80002594: 0000ad83 lw x27,0(x1) +80002598: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000 +8000259c: 0000a503 lw x10,0(x1) +800025a0: 00408093 addi x1,x1,4 + +800025a4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + pack x11, x27, x10 # perform operation +800025a4: 08adc5b3 pack x11,x27,x10 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025a8: 00062203 lw x4,0(x12) +800025ac: 00b20863 beq x4,x11,800025bc +800025b0: 111022ef jal x5,80004ec0 +800025b4: 800025a4 .word 0x800025a4 +800025b8: 8000c9d9 .word 0x8000c9d9 +800025bc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfffffffe +800025c0: 0000ae03 lw x28,0(x1) +800025c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000001 +800025c8: 0000af03 lw x30,0(x1) +800025cc: 00408093 addi x1,x1,4 + +800025d0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + pack x27, x28, x30 # perform operation +800025d0: 09ee4db3 pack x27,x28,x30 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +800025d4: 00062203 lw x4,0(x12) +800025d8: 01b20863 beq x4,x27,800025e8 +800025dc: 0e5022ef jal x5,80004ec0 +800025e0: 800025d0 .word 0x800025d0 +800025e4: 8000ca31 .word 0x8000ca31 +800025e8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xfffffffe +800025ec: 0000a303 lw x6,0(x1) +800025f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x00000002 +800025f4: 0000ae83 lw x29,0(x1) +800025f8: 00408093 addi x1,x1,4 + +800025fc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + pack x13, x6, x29 # perform operation +800025fc: 09d346b3 pack x13,x6,x29 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002600: 00062203 lw x4,0(x12) +80002604: 00d20863 beq x4,x13,80002614 +80002608: 0b9022ef jal x5,80004ec0 +8000260c: 800025fc .word 0x800025fc +80002610: 8000ca89 .word 0x8000ca89 +80002614: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xfffffffe +80002618: 0000a983 lw x19,0(x1) +8000261c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x80000000 +80002620: 0000ad03 lw x26,0(x1) +80002624: 00408093 addi x1,x1,4 + +80002628 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + pack x3, x19, x26 # perform operation +80002628: 09a9c1b3 pack x3,x19,x26 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000262c: 00062203 lw x4,0(x12) +80002630: 00320863 beq x4,x3,80002640 +80002634: 08d022ef jal x5,80004ec0 +80002638: 80002628 .word 0x80002628 +8000263c: 8000cae1 .word 0x8000cae1 +80002640: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xfffffffe +80002644: 0000a403 lw x8,0(x1) +80002648: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x80000001 +8000264c: 0000ad03 lw x26,0(x1) +80002650: 00408093 addi x1,x1,4 + +80002654 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + pack x28, x8, x26 # perform operation +80002654: 09a44e33 pack x28,x8,x26 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002658: 00062203 lw x4,0(x12) +8000265c: 01c20863 beq x4,x28,8000266c +80002660: 061022ef jal x5,80004ec0 +80002664: 80002654 .word 0x80002654 +80002668: 8000cb40 .word 0x8000cb40 +8000266c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xfffffffe +80002670: 0000aa03 lw x20,0(x1) +80002674: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7fffffff +80002678: 0000ac03 lw x24,0(x1) +8000267c: 00408093 addi x1,x1,4 + +80002680 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + pack x13, x20, x24 # perform operation +80002680: 098a46b3 pack x13,x20,x24 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +80002684: 00062203 lw x4,0(x12) +80002688: 00d20863 beq x4,x13,80002698 +8000268c: 035022ef jal x5,80004ec0 +80002690: 80002680 .word 0x80002680 +80002694: 8000cb9f .word 0x8000cb9f +80002698: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfffffffe +8000269c: 0000ad03 lw x26,0(x1) +800026a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffe +800026a4: 0000a183 lw x3,0(x1) +800026a8: 00408093 addi x1,x1,4 + +800026ac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + pack x18, x26, x3 # perform operation +800026ac: 083d4933 pack x18,x26,x3 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026b0: 00062203 lw x4,0(x12) +800026b4: 01220863 beq x4,x18,800026c4 +800026b8: 009022ef jal x5,80004ec0 +800026bc: 800026ac .word 0x800026ac +800026c0: 8000cbfe .word 0x8000cbfe +800026c4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xfffffffe +800026c8: 0000ab83 lw x23,0(x1) +800026cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xffffffff +800026d0: 0000a983 lw x19,0(x1) +800026d4: 00408093 addi x1,x1,4 + +800026d8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + pack x11, x23, x19 # perform operation +800026d8: 093bc5b3 pack x11,x23,x19 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +800026dc: 00062203 lw x4,0(x12) +800026e0: 00b20863 beq x4,x11,800026f0 +800026e4: 7dc022ef jal x5,80004ec0 +800026e8: 800026d8 .word 0x800026d8 +800026ec: 8000cc5d .word 0x8000cc5d +800026f0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xfffffffe +800026f4: 0000a483 lw x9,0(x1) +800026f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xfffffffe +800026fc: 0000af83 lw x31,0(x1) +80002700: 00408093 addi x1,x1,4 + +80002704 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + pack x19, x9, x31 # perform operation +80002704: 09f4c9b3 pack x19,x9,x31 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002708: 00062203 lw x4,0(x12) +8000270c: 01320863 beq x4,x19,8000271c +80002710: 7b0022ef jal x5,80004ec0 +80002714: 80002704 .word 0x80002704 +80002718: 8000ccbc .word 0x8000ccbc +8000271c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfffffffe +80002720: 0000ad03 lw x26,0(x1) +80002724: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x5bbc8872 +80002728: 0000a303 lw x6,0(x1) +8000272c: 00408093 addi x1,x1,4 + +80002730 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + pack x19, x26, x6 # perform operation +80002730: 086d49b3 pack x19,x26,x6 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002734: 00062203 lw x4,0(x12) +80002738: 01320863 beq x4,x19,80002748 +8000273c: 784022ef jal x5,80004ec0 +80002740: 80002730 .word 0x80002730 +80002744: 8000cd1b .word 0x8000cd1b +80002748: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xfffffffe +8000274c: 0000ac03 lw x24,0(x1) +80002750: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xaaaaaaaa +80002754: 0000ad83 lw x27,0(x1) +80002758: 00408093 addi x1,x1,4 + +8000275c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + pack x21, x24, x27 # perform operation +8000275c: 09bc4ab3 pack x21,x24,x27 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002760: 00062203 lw x4,0(x12) +80002764: 01520863 beq x4,x21,80002774 +80002768: 758022ef jal x5,80004ec0 +8000276c: 8000275c .word 0x8000275c +80002770: 8000cd7a .word 0x8000cd7a +80002774: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xfffffffe +80002778: 0000aa83 lw x21,0(x1) +8000277c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x55555555 +80002780: 0000a883 lw x17,0(x1) +80002784: 00408093 addi x1,x1,4 + +80002788 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + pack x20, x21, x17 # perform operation +80002788: 091aca33 pack x20,x21,x17 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +8000278c: 00062203 lw x4,0(x12) +80002790: 01420863 beq x4,x20,800027a0 +80002794: 72c022ef jal x5,80004ec0 +80002798: 80002788 .word 0x80002788 +8000279c: 8000cdd9 .word 0x8000cdd9 +800027a0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5bbc8872 +800027a4: 0000a703 lw x14,0(x1) +800027a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x00000000 +800027ac: 0000a103 lw x2,0(x1) +800027b0: 00408093 addi x1,x1,4 + +800027b4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + pack x6, x14, x2 # perform operation +800027b4: 08274333 pack x6,x14,x2 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027b8: 00062203 lw x4,0(x12) +800027bc: 00620863 beq x4,x6,800027cc +800027c0: 700022ef jal x5,80004ec0 +800027c4: 800027b4 .word 0x800027b4 +800027c8: 8000ce38 .word 0x8000ce38 +800027cc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x5bbc8872 +800027d0: 0000a783 lw x15,0(x1) +800027d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x00000001 +800027d8: 0000aa03 lw x20,0(x1) +800027dc: 00408093 addi x1,x1,4 + +800027e0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + pack x10, x15, x20 # perform operation +800027e0: 0947c533 pack x10,x15,x20 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +800027e4: 00062203 lw x4,0(x12) +800027e8: 00a20863 beq x4,x10,800027f8 +800027ec: 6d4022ef jal x5,80004ec0 +800027f0: 800027e0 .word 0x800027e0 +800027f4: 8000ce90 .word 0x8000ce90 +800027f8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x5bbc8872 +800027fc: 0000a303 lw x6,0(x1) +80002800: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000002 +80002804: 0000a883 lw x17,0(x1) +80002808: 00408093 addi x1,x1,4 + +8000280c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + pack x29, x6, x17 # perform operation +8000280c: 09134eb3 pack x29,x6,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002810: 00062203 lw x4,0(x12) +80002814: 01d20863 beq x4,x29,80002824 +80002818: 6a8022ef jal x5,80004ec0 +8000281c: 8000280c .word 0x8000280c +80002820: 8000cee8 .word 0x8000cee8 +80002824: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x5bbc8872 +80002828: 0000a403 lw x8,0(x1) +8000282c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x80000000 +80002830: 0000ae03 lw x28,0(x1) +80002834: 00408093 addi x1,x1,4 + +80002838 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + pack x29, x8, x28 # perform operation +80002838: 09c44eb3 pack x29,x8,x28 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000283c: 00062203 lw x4,0(x12) +80002840: 01d20863 beq x4,x29,80002850 +80002844: 67c022ef jal x5,80004ec0 +80002848: 80002838 .word 0x80002838 +8000284c: 8000cf40 .word 0x8000cf40 +80002850: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x5bbc8872 +80002854: 0000aa03 lw x20,0(x1) +80002858: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x80000001 +8000285c: 0000ae83 lw x29,0(x1) +80002860: 00408093 addi x1,x1,4 + +80002864 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + pack x13, x20, x29 # perform operation +80002864: 09da46b3 pack x13,x20,x29 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002868: 00062203 lw x4,0(x12) +8000286c: 00d20863 beq x4,x13,8000287c +80002870: 650022ef jal x5,80004ec0 +80002874: 80002864 .word 0x80002864 +80002878: 8000cf9f .word 0x8000cf9f +8000287c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x5bbc8872 +80002880: 0000a903 lw x18,0(x1) +80002884: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x7fffffff +80002888: 0000af83 lw x31,0(x1) +8000288c: 00408093 addi x1,x1,4 + +80002890 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + pack x10, x18, x31 # perform operation +80002890: 09f94533 pack x10,x18,x31 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +80002894: 00062203 lw x4,0(x12) +80002898: 00a20863 beq x4,x10,800028a8 +8000289c: 624022ef jal x5,80004ec0 +800028a0: 80002890 .word 0x80002890 +800028a4: 8000cffe .word 0x8000cffe +800028a8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x5bbc8872 +800028ac: 0000af03 lw x30,0(x1) +800028b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x7ffffffe +800028b4: 0000a803 lw x16,0(x1) +800028b8: 00408093 addi x1,x1,4 + +800028bc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + pack x22, x30, x16 # perform operation +800028bc: 090f4b33 pack x22,x30,x16 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028c0: 00062203 lw x4,0(x12) +800028c4: 01620863 beq x4,x22,800028d4 +800028c8: 5f8022ef jal x5,80004ec0 +800028cc: 800028bc .word 0x800028bc +800028d0: 8000d05d .word 0x8000d05d +800028d4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x5bbc8872 +800028d8: 0000a403 lw x8,0(x1) +800028dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xffffffff +800028e0: 0000a903 lw x18,0(x1) +800028e4: 00408093 addi x1,x1,4 + +800028e8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + pack x6, x8, x18 # perform operation +800028e8: 09244333 pack x6,x8,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +800028ec: 00062203 lw x4,0(x12) +800028f0: 00620863 beq x4,x6,80002900 +800028f4: 5cc022ef jal x5,80004ec0 +800028f8: 800028e8 .word 0x800028e8 +800028fc: 8000d0bc .word 0x8000d0bc +80002900: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5bbc8872 +80002904: 0000a703 lw x14,0(x1) +80002908: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xfffffffe +8000290c: 0000a403 lw x8,0(x1) +80002910: 00408093 addi x1,x1,4 + +80002914 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + pack x26, x14, x8 # perform operation +80002914: 08874d33 pack x26,x14,x8 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002918: 00062203 lw x4,0(x12) +8000291c: 01a20863 beq x4,x26,8000292c +80002920: 5a0022ef jal x5,80004ec0 +80002924: 80002914 .word 0x80002914 +80002928: 8000d11b .word 0x8000d11b +8000292c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x5bbc8872 +80002930: 0000aa83 lw x21,0(x1) +80002934: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x5bbc8872 +80002938: 0000ae03 lw x28,0(x1) +8000293c: 00408093 addi x1,x1,4 + +80002940 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + pack x29, x21, x28 # perform operation +80002940: 09caceb3 pack x29,x21,x28 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002944: 00062203 lw x4,0(x12) +80002948: 01d20863 beq x4,x29,80002958 +8000294c: 574022ef jal x5,80004ec0 +80002950: 80002940 .word 0x80002940 +80002954: 8000d17a .word 0x8000d17a +80002958: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x5bbc8872 +8000295c: 0000ac03 lw x24,0(x1) +80002960: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xaaaaaaaa +80002964: 0000aa83 lw x21,0(x1) +80002968: 00408093 addi x1,x1,4 + +8000296c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + pack x18, x24, x21 # perform operation +8000296c: 095c4933 pack x18,x24,x21 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +80002970: 00062203 lw x4,0(x12) +80002974: 01220863 beq x4,x18,80002984 +80002978: 548022ef jal x5,80004ec0 +8000297c: 8000296c .word 0x8000296c +80002980: 8000d1d9 .word 0x8000d1d9 +80002984: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x5bbc8872 +80002988: 0000a983 lw x19,0(x1) +8000298c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x55555555 +80002990: 0000a703 lw x14,0(x1) +80002994: 00408093 addi x1,x1,4 + +80002998 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + pack x25, x19, x14 # perform operation +80002998: 08e9ccb3 pack x25,x19,x14 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +8000299c: 00062203 lw x4,0(x12) +800029a0: 01920863 beq x4,x25,800029b0 +800029a4: 51c022ef jal x5,80004ec0 +800029a8: 80002998 .word 0x80002998 +800029ac: 8000d238 .word 0x8000d238 +800029b0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xaaaaaaaa +800029b4: 0000a483 lw x9,0(x1) +800029b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x00000000 +800029bc: 0000a983 lw x19,0(x1) +800029c0: 00408093 addi x1,x1,4 + +800029c4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + pack x16, x9, x19 # perform operation +800029c4: 0934c833 pack x16,x9,x19 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029c8: 00062203 lw x4,0(x12) +800029cc: 01020863 beq x4,x16,800029dc +800029d0: 4f0022ef jal x5,80004ec0 +800029d4: 800029c4 .word 0x800029c4 +800029d8: 8000d297 .word 0x8000d297 +800029dc: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xaaaaaaaa +800029e0: 0000ab83 lw x23,0(x1) +800029e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000001 +800029e8: 0000a683 lw x13,0(x1) +800029ec: 00408093 addi x1,x1,4 + +800029f0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + pack x11, x23, x13 # perform operation +800029f0: 08dbc5b3 pack x11,x23,x13 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +800029f4: 00062203 lw x4,0(x12) +800029f8: 00b20863 beq x4,x11,80002a08 +800029fc: 4c4022ef jal x5,80004ec0 +80002a00: 800029f0 .word 0x800029f0 +80002a04: 8000d2ef .word 0x8000d2ef +80002a08: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xaaaaaaaa +80002a0c: 0000aa03 lw x20,0(x1) +80002a10: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x00000002 +80002a14: 0000a303 lw x6,0(x1) +80002a18: 00408093 addi x1,x1,4 + +80002a1c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + pack x8, x20, x6 # perform operation +80002a1c: 086a4433 pack x8,x20,x6 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a20: 00062203 lw x4,0(x12) +80002a24: 00820863 beq x4,x8,80002a34 +80002a28: 498022ef jal x5,80004ec0 +80002a2c: 80002a1c .word 0x80002a1c +80002a30: 8000d347 .word 0x8000d347 +80002a34: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xaaaaaaaa +80002a38: 0000a703 lw x14,0(x1) +80002a3c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x80000000 +80002a40: 0000ad83 lw x27,0(x1) +80002a44: 00408093 addi x1,x1,4 + +80002a48 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + pack x10, x14, x27 # perform operation +80002a48: 09b74533 pack x10,x14,x27 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a4c: 00062203 lw x4,0(x12) +80002a50: 00a20863 beq x4,x10,80002a60 +80002a54: 46c022ef jal x5,80004ec0 +80002a58: 80002a48 .word 0x80002a48 +80002a5c: 8000d39f .word 0x8000d39f +80002a60: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaa +80002a64: 0000a503 lw x10,0(x1) +80002a68: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x80000001 +80002a6c: 0000ad83 lw x27,0(x1) +80002a70: 00408093 addi x1,x1,4 + +80002a74 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + pack x13, x10, x27 # perform operation +80002a74: 09b546b3 pack x13,x10,x27 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002a78: 00062203 lw x4,0(x12) +80002a7c: 00d20863 beq x4,x13,80002a8c +80002a80: 440022ef jal x5,80004ec0 +80002a84: 80002a74 .word 0x80002a74 +80002a88: 8000d3fe .word 0x8000d3fe +80002a8c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xaaaaaaaa +80002a90: 0000ad03 lw x26,0(x1) +80002a94: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7fffffff +80002a98: 0000af03 lw x30,0(x1) +80002a9c: 00408093 addi x1,x1,4 + +80002aa0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + pack x9, x26, x30 # perform operation +80002aa0: 09ed44b3 pack x9,x26,x30 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002aa4: 00062203 lw x4,0(x12) +80002aa8: 00920863 beq x4,x9,80002ab8 +80002aac: 414022ef jal x5,80004ec0 +80002ab0: 80002aa0 .word 0x80002aa0 +80002ab4: 8000d45d .word 0x8000d45d +80002ab8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xaaaaaaaa +80002abc: 0000ac03 lw x24,0(x1) +80002ac0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x7ffffffe +80002ac4: 0000a303 lw x6,0(x1) +80002ac8: 00408093 addi x1,x1,4 + +80002acc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + pack x30, x24, x6 # perform operation +80002acc: 086c4f33 pack x30,x24,x6 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002ad0: 00062203 lw x4,0(x12) +80002ad4: 01e20863 beq x4,x30,80002ae4 +80002ad8: 3e8022ef jal x5,80004ec0 +80002adc: 80002acc .word 0x80002acc +80002ae0: 8000d4bc .word 0x8000d4bc +80002ae4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xaaaaaaaa +80002ae8: 0000a983 lw x19,0(x1) +80002aec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xffffffff +80002af0: 0000ab03 lw x22,0(x1) +80002af4: 00408093 addi x1,x1,4 + +80002af8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + pack x27, x19, x22 # perform operation +80002af8: 0969cdb3 pack x27,x19,x22 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002afc: 00062203 lw x4,0(x12) +80002b00: 01b20863 beq x4,x27,80002b10 +80002b04: 3bc022ef jal x5,80004ec0 +80002b08: 80002af8 .word 0x80002af8 +80002b0c: 8000d51b .word 0x8000d51b +80002b10: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xaaaaaaaa +80002b14: 0000a303 lw x6,0(x1) +80002b18: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xfffffffe +80002b1c: 0000a903 lw x18,0(x1) +80002b20: 00408093 addi x1,x1,4 + +80002b24 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + pack x11, x6, x18 # perform operation +80002b24: 092345b3 pack x11,x6,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b28: 00062203 lw x4,0(x12) +80002b2c: 00b20863 beq x4,x11,80002b3c +80002b30: 390022ef jal x5,80004ec0 +80002b34: 80002b24 .word 0x80002b24 +80002b38: 8000d57a .word 0x8000d57a +80002b3c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xaaaaaaaa +80002b40: 0000af83 lw x31,0(x1) +80002b44: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x5bbc8872 +80002b48: 0000a583 lw x11,0(x1) +80002b4c: 00408093 addi x1,x1,4 + +80002b50 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + pack x25, x31, x11 # perform operation +80002b50: 08bfccb3 pack x25,x31,x11 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b54: 00062203 lw x4,0(x12) +80002b58: 01920863 beq x4,x25,80002b68 +80002b5c: 364022ef jal x5,80004ec0 +80002b60: 80002b50 .word 0x80002b50 +80002b64: 8000d5d9 .word 0x8000d5d9 +80002b68: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xaaaaaaaa +80002b6c: 0000ac83 lw x25,0(x1) +80002b70: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xaaaaaaaa +80002b74: 0000a383 lw x7,0(x1) +80002b78: 00408093 addi x1,x1,4 + +80002b7c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + pack x3, x25, x7 # perform operation +80002b7c: 087cc1b3 pack x3,x25,x7 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002b80: 00062203 lw x4,0(x12) +80002b84: 00320863 beq x4,x3,80002b94 +80002b88: 338022ef jal x5,80004ec0 +80002b8c: 80002b7c .word 0x80002b7c +80002b90: 8000d638 .word 0x8000d638 +80002b94: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xaaaaaaaa +80002b98: 0000ae03 lw x28,0(x1) +80002b9c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x55555555 +80002ba0: 0000af03 lw x30,0(x1) +80002ba4: 00408093 addi x1,x1,4 + +80002ba8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + pack x9, x28, x30 # perform operation +80002ba8: 09ee44b3 pack x9,x28,x30 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bac: 00062203 lw x4,0(x12) +80002bb0: 00920863 beq x4,x9,80002bc0 +80002bb4: 30c022ef jal x5,80004ec0 +80002bb8: 80002ba8 .word 0x80002ba8 +80002bbc: 8000d697 .word 0x8000d697 +80002bc0: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x55555555 +80002bc4: 0000a103 lw x2,0(x1) +80002bc8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000000 +80002bcc: 0000a703 lw x14,0(x1) +80002bd0: 00408093 addi x1,x1,4 + +80002bd4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + pack x28, x2, x14 # perform operation +80002bd4: 08e14e33 pack x28,x2,x14 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002bd8: 00062203 lw x4,0(x12) +80002bdc: 01c20863 beq x4,x28,80002bec +80002be0: 2e0022ef jal x5,80004ec0 +80002be4: 80002bd4 .word 0x80002bd4 +80002be8: 8000d6f6 .word 0x8000d6f6 +80002bec: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x55555555 +80002bf0: 0000ad03 lw x26,0(x1) +80002bf4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000001 +80002bf8: 0000a703 lw x14,0(x1) +80002bfc: 00408093 addi x1,x1,4 + +80002c00 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + pack x6, x26, x14 # perform operation +80002c00: 08ed4333 pack x6,x26,x14 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c04: 00062203 lw x4,0(x12) +80002c08: 00620863 beq x4,x6,80002c18 +80002c0c: 2b4022ef jal x5,80004ec0 +80002c10: 80002c00 .word 0x80002c00 +80002c14: 8000d74e .word 0x8000d74e +80002c18: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x55555555 +80002c1c: 0000aa83 lw x21,0(x1) +80002c20: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x00000002 +80002c24: 0000ac03 lw x24,0(x1) +80002c28: 00408093 addi x1,x1,4 + +80002c2c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + pack x22, x21, x24 # perform operation +80002c2c: 098acb33 pack x22,x21,x24 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c30: 00062203 lw x4,0(x12) +80002c34: 01620863 beq x4,x22,80002c44 +80002c38: 288022ef jal x5,80004ec0 +80002c3c: 80002c2c .word 0x80002c2c +80002c40: 8000d7a6 .word 0x8000d7a6 +80002c44: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x55555555 +80002c48: 0000aa83 lw x21,0(x1) +80002c4c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x80000000 +80002c50: 0000a403 lw x8,0(x1) +80002c54: 00408093 addi x1,x1,4 + +80002c58 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + pack x13, x21, x8 # perform operation +80002c58: 088ac6b3 pack x13,x21,x8 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c5c: 00062203 lw x4,0(x12) +80002c60: 00d20863 beq x4,x13,80002c70 +80002c64: 25c022ef jal x5,80004ec0 +80002c68: 80002c58 .word 0x80002c58 +80002c6c: 8000d7fe .word 0x8000d7fe +80002c70: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x55555555 +80002c74: 0000ae03 lw x28,0(x1) +80002c78: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x80000001 +80002c7c: 0000ab83 lw x23,0(x1) +80002c80: 00408093 addi x1,x1,4 + +80002c84 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + pack x11, x28, x23 # perform operation +80002c84: 097e45b3 pack x11,x28,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002c88: 00062203 lw x4,0(x12) +80002c8c: 00b20863 beq x4,x11,80002c9c +80002c90: 230022ef jal x5,80004ec0 +80002c94: 80002c84 .word 0x80002c84 +80002c98: 8000d85d .word 0x8000d85d +80002c9c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x55555555 +80002ca0: 0000a983 lw x19,0(x1) +80002ca4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x7fffffff +80002ca8: 0000ae83 lw x29,0(x1) +80002cac: 00408093 addi x1,x1,4 + +80002cb0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + pack x24, x19, x29 # perform operation +80002cb0: 09d9cc33 pack x24,x19,x29 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cb4: 00062203 lw x4,0(x12) +80002cb8: 01820863 beq x4,x24,80002cc8 +80002cbc: 204022ef jal x5,80004ec0 +80002cc0: 80002cb0 .word 0x80002cb0 +80002cc4: 8000d8bc .word 0x8000d8bc +80002cc8: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x55555555 +80002ccc: 0000a803 lw x16,0(x1) +80002cd0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x7ffffffe +80002cd4: 0000a783 lw x15,0(x1) +80002cd8: 00408093 addi x1,x1,4 + +80002cdc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + pack x29, x16, x15 # perform operation +80002cdc: 08f84eb3 pack x29,x16,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002ce0: 00062203 lw x4,0(x12) +80002ce4: 01d20863 beq x4,x29,80002cf4 +80002ce8: 1d8022ef jal x5,80004ec0 +80002cec: 80002cdc .word 0x80002cdc +80002cf0: 8000d91b .word 0x8000d91b +80002cf4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x55555555 +80002cf8: 0000a983 lw x19,0(x1) +80002cfc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffff +80002d00: 0000a183 lw x3,0(x1) +80002d04: 00408093 addi x1,x1,4 + +80002d08 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + pack x23, x19, x3 # perform operation +80002d08: 0839cbb3 pack x23,x19,x3 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d0c: 00062203 lw x4,0(x12) +80002d10: 01720863 beq x4,x23,80002d20 +80002d14: 1ac022ef jal x5,80004ec0 +80002d18: 80002d08 .word 0x80002d08 +80002d1c: 8000d97a .word 0x8000d97a +80002d20: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x55555555 +80002d24: 0000a383 lw x7,0(x1) +80002d28: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xfffffffe +80002d2c: 0000a783 lw x15,0(x1) +80002d30: 00408093 addi x1,x1,4 + +80002d34 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + pack x27, x7, x15 # perform operation +80002d34: 08f3cdb3 pack x27,x7,x15 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d38: 00062203 lw x4,0(x12) +80002d3c: 01b20863 beq x4,x27,80002d4c +80002d40: 180022ef jal x5,80004ec0 +80002d44: 80002d34 .word 0x80002d34 +80002d48: 8000d9d9 .word 0x8000d9d9 +80002d4c: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x55555555 +80002d50: 0000a403 lw x8,0(x1) +80002d54: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x5bbc8872 +80002d58: 0000a383 lw x7,0(x1) +80002d5c: 00408093 addi x1,x1,4 + +80002d60 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + pack x15, x8, x7 # perform operation +80002d60: 087447b3 pack x15,x8,x7 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d64: 00062203 lw x4,0(x12) +80002d68: 00f20863 beq x4,x15,80002d78 +80002d6c: 154022ef jal x5,80004ec0 +80002d70: 80002d60 .word 0x80002d60 +80002d74: 8000da38 .word 0x8000da38 +80002d78: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x55555555 +80002d7c: 0000ae03 lw x28,0(x1) +80002d80: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xaaaaaaaa +80002d84: 0000a803 lw x16,0(x1) +80002d88: 00408093 addi x1,x1,4 + +80002d8c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + pack x30, x28, x16 # perform operation +80002d8c: 090e4f33 pack x30,x28,x16 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002d90: 00062203 lw x4,0(x12) +80002d94: 01e20863 beq x4,x30,80002da4 +80002d98: 128022ef jal x5,80004ec0 +80002d9c: 80002d8c .word 0x80002d8c +80002da0: 8000da97 .word 0x8000da97 +80002da4: 00460613 addi x12,x12,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x55555555 +80002da8: 0000aa83 lw x21,0(x1) +80002dac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x55555555 +80002db0: 0000af03 lw x30,0(x1) +80002db4: 00408093 addi x1,x1,4 + +80002db8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + pack x2, x21, x30 # perform operation +80002db8: 09eac133 pack x2,x21,x30 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002dbc: 00062203 lw x4,0(x12) +80002dc0: 00220863 beq x4,x2,80002dd0 +80002dc4: 0fc022ef jal x5,80004ec0 +80002dc8: 80002db8 .word 0x80002db8 +80002dcc: 8000daf6 .word 0x8000daf6 +80002dd0: 00460613 addi x12,x12,4 + +///////////////////////////////// +// cmp_rs1_rs2_nx0 +///////////////////////////////// + + mv x6, x1 # switch data pointer register to avoid conflict with test +80002dd4: 00008313 addi x6,x1,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xbd376d01 +80002dd8: 00032083 lw x1,0(x6) +80002ddc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x13731343 +80002de0: 00032083 lw x1,0(x6) +80002de4: 00430313 addi x6,x6,4 + +80002de8 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1: + pack x16, x1, x1 # perform operation +80002de8: 0810c833 pack x16,x1,x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1_str) +80002dec: 00062203 lw x4,0(x12) +80002df0: 01020863 beq x4,x16,80002e00 +80002df4: 0cc022ef jal x5,80004ec0 +80002df8: 80002de8 .word 0x80002de8 +80002dfc: 8000db55 .word 0x8000db55 +80002e00: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x3aca37dc +80002e04: 00032103 lw x2,0(x6) +80002e08: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x9bc363aa +80002e0c: 00032103 lw x2,0(x6) +80002e10: 00430313 addi x6,x6,4 + +80002e14 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2: + pack x20, x2, x2 # perform operation +80002e14: 08214a33 pack x20,x2,x2 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2_str) +80002e18: 00062203 lw x4,0(x12) +80002e1c: 01420863 beq x4,x20,80002e2c +80002e20: 0a0022ef jal x5,80004ec0 +80002e24: 80002e14 .word 0x80002e14 +80002e28: 8000db91 .word 0x8000db91 +80002e2c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x88502fde +80002e30: 00032183 lw x3,0(x6) +80002e34: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x64a9959f +80002e38: 00032183 lw x3,0(x6) +80002e3c: 00430313 addi x6,x6,4 + +80002e40 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3: + pack x26, x3, x3 # perform operation +80002e40: 0831cd33 pack x26,x3,x3 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3_str) +80002e44: 00062203 lw x4,0(x12) +80002e48: 01a20863 beq x4,x26,80002e58 +80002e4c: 074022ef jal x5,80004ec0 +80002e50: 80002e40 .word 0x80002e40 +80002e54: 8000dbcd .word 0x8000dbcd +80002e58: 00460613 addi x12,x12,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002e5c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002e60: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xd5adb355 +80002e64: 00032203 lw x4,0(x6) +80002e68: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x593649cb +80002e6c: 00032203 lw x4,0(x6) +80002e70: 00430313 addi x6,x6,4 + +80002e74 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4: + pack x28, x4, x4 # perform operation +80002e74: 08424e33 pack x28,x4,x4 + # Check if x28 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x28, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4_str) +80002e78: 00062683 lw x13,0(x12) +80002e7c: 01c68863 beq x13,x28,80002e8c +80002e80: 0800276f jal x14,80004f00 +80002e84: 80002e74 .word 0x80002e74 +80002e88: 8000dc09 .word 0x8000dc09 +80002e8c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xc75b08ec +80002e90: 00032283 lw x5,0(x6) +80002e94: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x5d18c5a4 +80002e98: 00032283 lw x5,0(x6) +80002e9c: 00430313 addi x6,x6,4 + +80002ea0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5: + pack x3, x5, x5 # perform operation +80002ea0: 0852c1b3 pack x3,x5,x5 + # Check if x3 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5_str) +80002ea4: 00062683 lw x13,0(x12) +80002ea8: 00368863 beq x13,x3,80002eb8 +80002eac: 0540276f jal x14,80004f00 +80002eb0: 80002ea0 .word 0x80002ea0 +80002eb4: 8000dc45 .word 0x8000dc45 +80002eb8: 00460613 addi x12,x12,4 + + mv x29, x6 # switch data pointer register to avoid conflict with test +80002ebc: 00030e93 addi x29,x6,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x0d3ffe7c +80002ec0: 000ea303 lw x6,0(x29) +80002ec4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0x3ee7c984 +80002ec8: 000ea303 lw x6,0(x29) +80002ecc: 004e8e93 addi x29,x29,4 + +80002ed0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6: + pack x31, x6, x6 # perform operation +80002ed0: 08634fb3 pack x31,x6,x6 + # Check if x31 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x31, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6_str) +80002ed4: 00062683 lw x13,0(x12) +80002ed8: 01f68863 beq x13,x31,80002ee8 +80002edc: 0240276f jal x14,80004f00 +80002ee0: 80002ed0 .word 0x80002ed0 +80002ee4: 8000dc81 .word 0x8000dc81 +80002ee8: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0xd223c3c2 +80002eec: 000ea383 lw x7,0(x29) +80002ef0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0x221d64d2 +80002ef4: 000ea383 lw x7,0(x29) +80002ef8: 004e8e93 addi x29,x29,4 + +80002efc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7: + pack x11, x7, x7 # perform operation +80002efc: 0873c5b3 pack x11,x7,x7 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7_str) +80002f00: 00062683 lw x13,0(x12) +80002f04: 00b68863 beq x13,x11,80002f14 +80002f08: 7f90176f jal x14,80004f00 +80002f0c: 80002efc .word 0x80002efc +80002f10: 8000dcbd .word 0x8000dcbd +80002f14: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x738ebb1f +80002f18: 000ea403 lw x8,0(x29) +80002f1c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0xa2571917 +80002f20: 000ea403 lw x8,0(x29) +80002f24: 004e8e93 addi x29,x29,4 + +80002f28 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8: + pack x20, x8, x8 # perform operation +80002f28: 08844a33 pack x20,x8,x8 + # Check if x20 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x20, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8_str) +80002f2c: 00062683 lw x13,0(x12) +80002f30: 01468863 beq x13,x20,80002f40 +80002f34: 7cd0176f jal x14,80004f00 +80002f38: 80002f28 .word 0x80002f28 +80002f3c: 8000dcf9 .word 0x8000dcf9 +80002f40: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0xbecd46d6 +80002f44: 000ea483 lw x9,0(x29) +80002f48: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs2: x9 = 0xab4cbf68 +80002f4c: 000ea483 lw x9,0(x29) +80002f50: 004e8e93 addi x29,x29,4 + +80002f54 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9: + pack x7, x9, x9 # perform operation +80002f54: 0894c3b3 pack x7,x9,x9 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9_str) +80002f58: 00062683 lw x13,0(x12) +80002f5c: 00768863 beq x13,x7,80002f6c +80002f60: 7a10176f jal x14,80004f00 +80002f64: 80002f54 .word 0x80002f54 +80002f68: 8000dd35 .word 0x8000dd35 +80002f6c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xcc68ea9c +80002f70: 000ea503 lw x10,0(x29) +80002f74: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x2e57c935 +80002f78: 000ea503 lw x10,0(x29) +80002f7c: 004e8e93 addi x29,x29,4 + +80002f80 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10: + pack x27, x10, x10 # perform operation +80002f80: 08a54db3 pack x27,x10,x10 + # Check if x27 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x27, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10_str) +80002f84: 00062683 lw x13,0(x12) +80002f88: 01b68863 beq x13,x27,80002f98 +80002f8c: 7750176f jal x14,80004f00 +80002f90: 80002f80 .word 0x80002f80 +80002f94: 8000dd71 .word 0x8000dd71 +80002f98: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0xaa45989e +80002f9c: 000ea583 lw x11,0(x29) +80002fa0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x9ab100d6 +80002fa4: 000ea583 lw x11,0(x29) +80002fa8: 004e8e93 addi x29,x29,4 + +80002fac : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11: + pack x19, x11, x11 # perform operation +80002fac: 08b5c9b3 pack x19,x11,x11 + # Check if x19 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x19, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11_str) +80002fb0: 00062683 lw x13,0(x12) +80002fb4: 01368863 beq x13,x19,80002fc4 +80002fb8: 7490176f jal x14,80004f00 +80002fbc: 80002fac .word 0x80002fac +80002fc0: 8000ddae .word 0x8000ddae +80002fc4: 00460613 addi x12,x12,4 + + mv x20, x12 # switch signature pointer register to avoid conflict with test +80002fc8: 00060a13 addi x20,x12,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x9f4f72cf +80002fcc: 000ea603 lw x12,0(x29) +80002fd0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0xac588761 +80002fd4: 000ea603 lw x12,0(x29) +80002fd8: 004e8e93 addi x29,x29,4 + +80002fdc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12: + pack x10, x12, x12 # perform operation +80002fdc: 08c64533 pack x10,x12,x12 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12_str) +80002fe0: 000a2683 lw x13,0(x20) +80002fe4: 00a68863 beq x13,x10,80002ff4 +80002fe8: 7190176f jal x14,80004f00 +80002fec: 80002fdc .word 0x80002fdc +80002ff0: 8000ddeb .word 0x8000ddeb +80002ff4: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80002ff8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80002ffc: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0xd901ed6a +80003000: 000ea683 lw x13,0(x29) +80003004: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0xe62c123e +80003008: 000ea683 lw x13,0(x29) +8000300c: 004e8e93 addi x29,x29,4 + +80003010 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13: + pack x15, x13, x13 # perform operation +80003010: 08d6c7b3 pack x15,x13,x13 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13_str) +80003014: 000a2203 lw x4,0(x20) +80003018: 00f20863 beq x4,x15,80003028 +8000301c: 6a5012ef jal x5,80004ec0 +80003020: 80003010 .word 0x80003010 +80003024: 8000de28 .word 0x8000de28 +80003028: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x3d9687cf +8000302c: 000ea703 lw x14,0(x29) +80003030: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x3b405439 +80003034: 000ea703 lw x14,0(x29) +80003038: 004e8e93 addi x29,x29,4 + +8000303c : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14: + pack x0, x14, x14 # perform operation +8000303c: 08e74033 pack x0,x14,x14 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14_str) +80003040: 000a2203 lw x4,0(x20) +80003044: 00020863 beq x4,x0,80003054 +80003048: 679012ef jal x5,80004ec0 +8000304c: 8000303c .word 0x8000303c +80003050: 8000de65 .word 0x8000de65 +80003054: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x287f3d95 +80003058: 000ea783 lw x15,0(x29) +8000305c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0x9e1dd9ab +80003060: 000ea783 lw x15,0(x29) +80003064: 004e8e93 addi x29,x29,4 + +80003068 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15: + pack x16, x15, x15 # perform operation +80003068: 08f7c833 pack x16,x15,x15 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15_str) +8000306c: 000a2203 lw x4,0(x20) +80003070: 01020863 beq x4,x16,80003080 +80003074: 64d012ef jal x5,80004ec0 +80003078: 80003068 .word 0x80003068 +8000307c: 8000dea2 .word 0x8000dea2 +80003080: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x8fcecf63 +80003084: 000ea803 lw x16,0(x29) +80003088: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x53b9cd9e +8000308c: 000ea803 lw x16,0(x29) +80003090: 004e8e93 addi x29,x29,4 + +80003094 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16: + pack x25, x16, x16 # perform operation +80003094: 09084cb3 pack x25,x16,x16 + # Check if x25 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x25, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16_str) +80003098: 000a2203 lw x4,0(x20) +8000309c: 01920863 beq x4,x25,800030ac +800030a0: 621012ef jal x5,80004ec0 +800030a4: 80003094 .word 0x80003094 +800030a8: 8000dedf .word 0x8000dedf +800030ac: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xadf93d2a +800030b0: 000ea883 lw x17,0(x29) +800030b4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x66118742 +800030b8: 000ea883 lw x17,0(x29) +800030bc: 004e8e93 addi x29,x29,4 + +800030c0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17: + pack x24, x17, x17 # perform operation +800030c0: 0918cc33 pack x24,x17,x17 + # Check if x24 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x24, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17_str) +800030c4: 000a2203 lw x4,0(x20) +800030c8: 01820863 beq x4,x24,800030d8 +800030cc: 5f5012ef jal x5,80004ec0 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 8000df1c .word 0x8000df1c +800030d8: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x28cd0384 +800030dc: 000ea903 lw x18,0(x29) +800030e0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xc70f4999 +800030e4: 000ea903 lw x18,0(x29) +800030e8: 004e8e93 addi x29,x29,4 + +800030ec : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18: + pack x7, x18, x18 # perform operation +800030ec: 092943b3 pack x7,x18,x18 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18_str) +800030f0: 000a2203 lw x4,0(x20) +800030f4: 00720863 beq x4,x7,80003104 +800030f8: 5c9012ef jal x5,80004ec0 +800030fc: 800030ec .word 0x800030ec +80003100: 8000df59 .word 0x8000df59 +80003104: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x3fcf1023 +80003108: 000ea983 lw x19,0(x29) +8000310c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0xcee1be24 +80003110: 000ea983 lw x19,0(x29) +80003114: 004e8e93 addi x29,x29,4 + +80003118 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19: + pack x17, x19, x19 # perform operation +80003118: 0939c8b3 pack x17,x19,x19 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19_str) +8000311c: 000a2203 lw x4,0(x20) +80003120: 01120863 beq x4,x17,80003130 +80003124: 59d012ef jal x5,80004ec0 +80003128: 80003118 .word 0x80003118 +8000312c: 8000df96 .word 0x8000df96 +80003130: 004a0a13 addi x20,x20,4 + + mv x27, x20 # switch signature pointer register to avoid conflict with test +80003134: 000a0d93 addi x27,x20,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x4315bd1e +80003138: 000eaa03 lw x20,0(x29) +8000313c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs2: x20 = 0x3ff1ed39 +80003140: 000eaa03 lw x20,0(x29) +80003144: 004e8e93 addi x29,x29,4 + +80003148 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20: + pack x11, x20, x20 # perform operation +80003148: 094a45b3 pack x11,x20,x20 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20_str) +8000314c: 000da203 lw x4,0(x27) +80003150: 00b20863 beq x4,x11,80003160 +80003154: 56d012ef jal x5,80004ec0 +80003158: 80003148 .word 0x80003148 +8000315c: 8000dfd3 .word 0x8000dfd3 +80003160: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xb2f0de8d +80003164: 000eaa83 lw x21,0(x29) +80003168: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x74a0d1b7 +8000316c: 000eaa83 lw x21,0(x29) +80003170: 004e8e93 addi x29,x29,4 + +80003174 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21: + pack x11, x21, x21 # perform operation +80003174: 095ac5b3 pack x11,x21,x21 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21_str) +80003178: 000da203 lw x4,0(x27) +8000317c: 00b20863 beq x4,x11,8000318c +80003180: 541012ef jal x5,80004ec0 +80003184: 80003174 .word 0x80003174 +80003188: 8000e010 .word 0x8000e010 +8000318c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x86f58e79 +80003190: 000eab03 lw x22,0(x29) +80003194: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0x8b35f395 +80003198: 000eab03 lw x22,0(x29) +8000319c: 004e8e93 addi x29,x29,4 + +800031a0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22: + pack x10, x22, x22 # perform operation +800031a0: 096b4533 pack x10,x22,x22 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22_str) +800031a4: 000da203 lw x4,0(x27) +800031a8: 00a20863 beq x4,x10,800031b8 +800031ac: 515012ef jal x5,80004ec0 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 8000e04d .word 0x8000e04d +800031b8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x2f79e318 +800031bc: 000eab83 lw x23,0(x29) +800031c0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x6b8cee2d +800031c4: 000eab83 lw x23,0(x29) +800031c8: 004e8e93 addi x29,x29,4 + +800031cc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23: + pack x17, x23, x23 # perform operation +800031cc: 097bc8b3 pack x17,x23,x23 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23_str) +800031d0: 000da203 lw x4,0(x27) +800031d4: 01120863 beq x4,x17,800031e4 +800031d8: 4e9012ef jal x5,80004ec0 +800031dc: 800031cc .word 0x800031cc +800031e0: 8000e08a .word 0x8000e08a +800031e4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xf12e25c7 +800031e8: 000eac03 lw x24,0(x29) +800031ec: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x81c89722 +800031f0: 000eac03 lw x24,0(x29) +800031f4: 004e8e93 addi x29,x29,4 + +800031f8 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24: + pack x17, x24, x24 # perform operation +800031f8: 098c48b3 pack x17,x24,x24 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24_str) +800031fc: 000da203 lw x4,0(x27) +80003200: 01120863 beq x4,x17,80003210 +80003204: 4bd012ef jal x5,80004ec0 +80003208: 800031f8 .word 0x800031f8 +8000320c: 8000e0c7 .word 0x8000e0c7 +80003210: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0xd37a70c6 +80003214: 000eac83 lw x25,0(x29) +80003218: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x6823c8b3 +8000321c: 000eac83 lw x25,0(x29) +80003220: 004e8e93 addi x29,x29,4 + +80003224 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25: + pack x7, x25, x25 # perform operation +80003224: 099cc3b3 pack x7,x25,x25 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25_str) +80003228: 000da203 lw x4,0(x27) +8000322c: 00720863 beq x4,x7,8000323c +80003230: 491012ef jal x5,80004ec0 +80003234: 80003224 .word 0x80003224 +80003238: 8000e104 .word 0x8000e104 +8000323c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xfc266725 +80003240: 000ead03 lw x26,0(x29) +80003244: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xf27689e7 +80003248: 000ead03 lw x26,0(x29) +8000324c: 004e8e93 addi x29,x29,4 + +80003250 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26: + pack x10, x26, x26 # perform operation +80003250: 09ad4533 pack x10,x26,x26 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26_str) +80003254: 000da203 lw x4,0(x27) +80003258: 00a20863 beq x4,x10,80003268 +8000325c: 465012ef jal x5,80004ec0 +80003260: 80003250 .word 0x80003250 +80003264: 8000e141 .word 0x8000e141 +80003268: 004d8d93 addi x27,x27,4 + + mv x1, x27 # switch signature pointer register to avoid conflict with test +8000326c: 000d8093 addi x1,x27,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xf47219a8 +80003270: 000ead83 lw x27,0(x29) +80003274: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0xfbbc820f +80003278: 000ead83 lw x27,0(x29) +8000327c: 004e8e93 addi x29,x29,4 + +80003280 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27: + pack x28, x27, x27 # perform operation +80003280: 09bdce33 pack x28,x27,x27 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27_str) +80003284: 0000a203 lw x4,0(x1) +80003288: 01c20863 beq x4,x28,80003298 +8000328c: 435012ef jal x5,80004ec0 +80003290: 80003280 .word 0x80003280 +80003294: 8000e17e .word 0x8000e17e +80003298: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x042c0cff +8000329c: 000eae03 lw x28,0(x29) +800032a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x16a99731 +800032a4: 000eae03 lw x28,0(x29) +800032a8: 004e8e93 addi x29,x29,4 + +800032ac : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28: + pack x21, x28, x28 # perform operation +800032ac: 09ce4ab3 pack x21,x28,x28 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28_str) +800032b0: 0000a203 lw x4,0(x1) +800032b4: 01520863 beq x4,x21,800032c4 +800032b8: 409012ef jal x5,80004ec0 +800032bc: 800032ac .word 0x800032ac +800032c0: 8000e1bb .word 0x8000e1bb +800032c4: 00408093 addi x1,x1,4 + + mv x16, x29 # switch data pointer register to avoid conflict with test +800032c8: 000e8813 addi x16,x29,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x6d7196f8 +800032cc: 00082e83 lw x29,0(x16) +800032d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x435cbc0a +800032d4: 00082e83 lw x29,0(x16) +800032d8: 00480813 addi x16,x16,4 + +800032dc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29: + pack x20, x29, x29 # perform operation +800032dc: 09deca33 pack x20,x29,x29 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29_str) +800032e0: 0000a203 lw x4,0(x1) +800032e4: 01420863 beq x4,x20,800032f4 +800032e8: 3d9012ef jal x5,80004ec0 +800032ec: 800032dc .word 0x800032dc +800032f0: 8000e1f8 .word 0x8000e1f8 +800032f4: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x4ac35f81 +800032f8: 00082f03 lw x30,0(x16) +800032fc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xed4dd1e9 +80003300: 00082f03 lw x30,0(x16) +80003304: 00480813 addi x16,x16,4 + +80003308 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30: + pack x28, x30, x30 # perform operation +80003308: 09ef4e33 pack x28,x30,x30 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30_str) +8000330c: 0000a203 lw x4,0(x1) +80003310: 01c20863 beq x4,x28,80003320 +80003314: 3ad012ef jal x5,80004ec0 +80003318: 80003308 .word 0x80003308 +8000331c: 8000e235 .word 0x8000e235 +80003320: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x8e9ba77f +80003324: 00082f83 lw x31,0(x16) +80003328: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x84ea1c88 +8000332c: 00082f83 lw x31,0(x16) +80003330: 00480813 addi x16,x16,4 + +80003334 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31: + pack x23, x31, x31 # perform operation +80003334: 09ffcbb3 pack x23,x31,x31 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31_str) +80003338: 0000a203 lw x4,0(x1) +8000333c: 01720863 beq x4,x23,8000334c +80003340: 381012ef jal x5,80004ec0 +80003344: 80003334 .word 0x80003334 +80003348: 8000e272 .word 0x8000e272 +8000334c: 00408093 addi x1,x1,4 + +///////////////////////////////// +// cmp_rd_rs2_nx0 +///////////////////////////////// + + mv x29, x1 # switch signature pointer register to avoid conflict with test +80003350: 00008e93 addi x29,x1,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x957ced21 +80003354: 00082483 lw x9,0(x16) +80003358: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x751d709c +8000335c: 00082083 lw x1,0(x16) +80003360: 00480813 addi x16,x16,4 + +80003364 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b1: + pack x1, x9, x1 # perform operation +80003364: 0814c0b3 pack x1,x9,x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zbkb_pack_cg_cmp_rd_rs2_nx0_b1, Zbkb_pack_cg_cmp_rd_rs2_nx0_b1_str) +80003368: 000ea203 lw x4,0(x29) +8000336c: 00120863 beq x4,x1,8000337c +80003370: 351012ef jal x5,80004ec0 +80003374: 80003364 .word 0x80003364 +80003378: 8000e2af .word 0x8000e2af +8000337c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x95eea076 +80003380: 00082303 lw x6,0(x16) +80003384: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xb88e5189 +80003388: 00082103 lw x2,0(x16) +8000338c: 00480813 addi x16,x16,4 + +80003390 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b2: + pack x2, x6, x2 # perform operation +80003390: 08234133 pack x2,x6,x2 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zbkb_pack_cg_cmp_rd_rs2_nx0_b2, Zbkb_pack_cg_cmp_rd_rs2_nx0_b2_str) +80003394: 000ea203 lw x4,0(x29) +80003398: 00220863 beq x4,x2,800033a8 +8000339c: 325012ef jal x5,80004ec0 +800033a0: 80003390 .word 0x80003390 +800033a4: 8000e2ea .word 0x8000e2ea +800033a8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xc0e336ec +800033ac: 00082303 lw x6,0(x16) +800033b0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x4b39c1f0 +800033b4: 00082183 lw x3,0(x16) +800033b8: 00480813 addi x16,x16,4 + +800033bc : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b3: + pack x3, x6, x3 # perform operation +800033bc: 083341b3 pack x3,x6,x3 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zbkb_pack_cg_cmp_rd_rs2_nx0_b3, Zbkb_pack_cg_cmp_rd_rs2_nx0_b3_str) +800033c0: 000ea203 lw x4,0(x29) +800033c4: 00320863 beq x4,x3,800033d4 +800033c8: 2f9012ef jal x5,80004ec0 +800033cc: 800033bc .word 0x800033bc +800033d0: 8000e325 .word 0x8000e325 +800033d4: 004e8e93 addi x29,x29,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800033d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800033dc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x23916431 +800033e0: 00082a83 lw x21,0(x16) +800033e4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x1a1ebf0f +800033e8: 00082203 lw x4,0(x16) +800033ec: 00480813 addi x16,x16,4 + +800033f0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b4: + pack x4, x21, x4 # perform operation +800033f0: 084ac233 pack x4,x21,x4 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zbkb_pack_cg_cmp_rd_rs2_nx0_b4, Zbkb_pack_cg_cmp_rd_rs2_nx0_b4_str) +800033f4: 000ea383 lw x7,0(x29) +800033f8: 00438863 beq x7,x4,80003408 +800033fc: 2dd0146f jal x8,80004ed8 +80003400: 800033f0 .word 0x800033f0 +80003404: 8000e360 .word 0x8000e360 +80003408: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x10de5044 +8000340c: 00082f83 lw x31,0(x16) +80003410: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x99124d6e +80003414: 00082283 lw x5,0(x16) +80003418: 00480813 addi x16,x16,4 + +8000341c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b5: + pack x5, x31, x5 # perform operation +8000341c: 085fc2b3 pack x5,x31,x5 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zbkb_pack_cg_cmp_rd_rs2_nx0_b5, Zbkb_pack_cg_cmp_rd_rs2_nx0_b5_str) +80003420: 000ea383 lw x7,0(x29) +80003424: 00538863 beq x7,x5,80003434 +80003428: 2b10146f jal x8,80004ed8 +8000342c: 8000341c .word 0x8000341c +80003430: 8000e39b .word 0x8000e39b +80003434: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x2cf456a0 +80003438: 00082603 lw x12,0(x16) +8000343c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x3da92037 +80003440: 00082303 lw x6,0(x16) +80003444: 00480813 addi x16,x16,4 + +80003448 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b6: + pack x6, x12, x6 # perform operation +80003448: 08664333 pack x6,x12,x6 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zbkb_pack_cg_cmp_rd_rs2_nx0_b6, Zbkb_pack_cg_cmp_rd_rs2_nx0_b6_str) +8000344c: 000ea383 lw x7,0(x29) +80003450: 00638863 beq x7,x6,80003460 +80003454: 2850146f jal x8,80004ed8 +80003458: 80003448 .word 0x80003448 +8000345c: 8000e3d6 .word 0x8000e3d6 +80003460: 004e8e93 addi x29,x29,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003464: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003468: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x141570e3 +8000346c: 00082303 lw x6,0(x16) +80003470: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x147aa46f +80003474: 00082383 lw x7,0(x16) +80003478: 00480813 addi x16,x16,4 + +8000347c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b7: + pack x7, x6, x7 # perform operation +8000347c: 087343b3 pack x7,x6,x7 + # Check if x7 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x7, Zbkb_pack_cg_cmp_rd_rs2_nx0_b7, Zbkb_pack_cg_cmp_rd_rs2_nx0_b7_str) +80003480: 000ea683 lw x13,0(x29) +80003484: 00768863 beq x13,x7,80003494 +80003488: 2790176f jal x14,80004f00 +8000348c: 8000347c .word 0x8000347c +80003490: 8000e411 .word 0x8000e411 +80003494: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x85228385 +80003498: 00082b83 lw x23,0(x16) +8000349c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x5d93292f +800034a0: 00082403 lw x8,0(x16) +800034a4: 00480813 addi x16,x16,4 + +800034a8 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b8: + pack x8, x23, x8 # perform operation +800034a8: 088bc433 pack x8,x23,x8 + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zbkb_pack_cg_cmp_rd_rs2_nx0_b8, Zbkb_pack_cg_cmp_rd_rs2_nx0_b8_str) +800034ac: 000ea683 lw x13,0(x29) +800034b0: 00868863 beq x13,x8,800034c0 +800034b4: 24d0176f jal x14,80004f00 +800034b8: 800034a8 .word 0x800034a8 +800034bc: 8000e44c .word 0x8000e44c +800034c0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x05a74170 +800034c4: 00082d03 lw x26,0(x16) +800034c8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x2302641c +800034cc: 00082483 lw x9,0(x16) +800034d0: 00480813 addi x16,x16,4 + +800034d4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b9: + pack x9, x26, x9 # perform operation +800034d4: 089d44b3 pack x9,x26,x9 + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zbkb_pack_cg_cmp_rd_rs2_nx0_b9, Zbkb_pack_cg_cmp_rd_rs2_nx0_b9_str) +800034d8: 000ea683 lw x13,0(x29) +800034dc: 00968863 beq x13,x9,800034ec +800034e0: 2210176f jal x14,80004f00 +800034e4: 800034d4 .word 0x800034d4 +800034e8: 8000e487 .word 0x8000e487 +800034ec: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0xae2b54a7 +800034f0: 00082a03 lw x20,0(x16) +800034f4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xcb4d5157 +800034f8: 00082503 lw x10,0(x16) +800034fc: 00480813 addi x16,x16,4 + +80003500 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b10: + pack x10, x20, x10 # perform operation +80003500: 08aa4533 pack x10,x20,x10 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zbkb_pack_cg_cmp_rd_rs2_nx0_b10, Zbkb_pack_cg_cmp_rd_rs2_nx0_b10_str) +80003504: 000ea683 lw x13,0(x29) +80003508: 00a68863 beq x13,x10,80003518 +8000350c: 1f50176f jal x14,80004f00 +80003510: 80003500 .word 0x80003500 +80003514: 8000e4c2 .word 0x8000e4c2 +80003518: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x8e3db826 +8000351c: 00082403 lw x8,0(x16) +80003520: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x030ac840 +80003524: 00082583 lw x11,0(x16) +80003528: 00480813 addi x16,x16,4 + +8000352c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b11: + pack x11, x8, x11 # perform operation +8000352c: 08b445b3 pack x11,x8,x11 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zbkb_pack_cg_cmp_rd_rs2_nx0_b11, Zbkb_pack_cg_cmp_rd_rs2_nx0_b11_str) +80003530: 000ea683 lw x13,0(x29) +80003534: 00b68863 beq x13,x11,80003544 +80003538: 1c90176f jal x14,80004f00 +8000353c: 8000352c .word 0x8000352c +80003540: 8000e4fe .word 0x8000e4fe +80003544: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x48b0cd76 +80003548: 00082283 lw x5,0(x16) +8000354c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xe48bf228 +80003550: 00082603 lw x12,0(x16) +80003554: 00480813 addi x16,x16,4 + +80003558 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b12: + pack x12, x5, x12 # perform operation +80003558: 08c2c633 pack x12,x5,x12 + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zbkb_pack_cg_cmp_rd_rs2_nx0_b12, Zbkb_pack_cg_cmp_rd_rs2_nx0_b12_str) +8000355c: 000ea683 lw x13,0(x29) +80003560: 00c68863 beq x13,x12,80003570 +80003564: 19d0176f jal x14,80004f00 +80003568: 80003558 .word 0x80003558 +8000356c: 8000e53a .word 0x8000e53a +80003570: 004e8e93 addi x29,x29,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003574: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003578: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xda05dc8c +8000357c: 00082403 lw x8,0(x16) +80003580: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x279109ee +80003584: 00082683 lw x13,0(x16) +80003588: 00480813 addi x16,x16,4 + +8000358c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b13: + pack x13, x8, x13 # perform operation +8000358c: 08d446b3 pack x13,x8,x13 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zbkb_pack_cg_cmp_rd_rs2_nx0_b13, Zbkb_pack_cg_cmp_rd_rs2_nx0_b13_str) +80003590: 000ea203 lw x4,0(x29) +80003594: 00d20863 beq x4,x13,800035a4 +80003598: 129012ef jal x5,80004ec0 +8000359c: 8000358c .word 0x8000358c +800035a0: 8000e576 .word 0x8000e576 +800035a4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x47c1bed4 +800035a8: 00082d83 lw x27,0(x16) +800035ac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x761da117 +800035b0: 00082703 lw x14,0(x16) +800035b4: 00480813 addi x16,x16,4 + +800035b8 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b14: + pack x14, x27, x14 # perform operation +800035b8: 08edc733 pack x14,x27,x14 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zbkb_pack_cg_cmp_rd_rs2_nx0_b14, Zbkb_pack_cg_cmp_rd_rs2_nx0_b14_str) +800035bc: 000ea203 lw x4,0(x29) +800035c0: 00e20863 beq x4,x14,800035d0 +800035c4: 0fd012ef jal x5,80004ec0 +800035c8: 800035b8 .word 0x800035b8 +800035cc: 8000e5b2 .word 0x8000e5b2 +800035d0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xae723508 +800035d4: 00082483 lw x9,0(x16) +800035d8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xe292bdcd +800035dc: 00082783 lw x15,0(x16) +800035e0: 00480813 addi x16,x16,4 + +800035e4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b15: + pack x15, x9, x15 # perform operation +800035e4: 08f4c7b3 pack x15,x9,x15 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zbkb_pack_cg_cmp_rd_rs2_nx0_b15, Zbkb_pack_cg_cmp_rd_rs2_nx0_b15_str) +800035e8: 000ea203 lw x4,0(x29) +800035ec: 00f20863 beq x4,x15,800035fc +800035f0: 0d1012ef jal x5,80004ec0 +800035f4: 800035e4 .word 0x800035e4 +800035f8: 8000e5ee .word 0x8000e5ee +800035fc: 004e8e93 addi x29,x29,4 + + mv x25, x16 # switch data pointer register to avoid conflict with test +80003600: 00080c93 addi x25,x16,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x4624e7a0 +80003604: 000caa03 lw x20,0(x25) +80003608: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0xd2cd5404 +8000360c: 000ca803 lw x16,0(x25) +80003610: 004c8c93 addi x25,x25,4 + +80003614 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b16: + pack x16, x20, x16 # perform operation +80003614: 090a4833 pack x16,x20,x16 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zbkb_pack_cg_cmp_rd_rs2_nx0_b16, Zbkb_pack_cg_cmp_rd_rs2_nx0_b16_str) +80003618: 000ea203 lw x4,0(x29) +8000361c: 01020863 beq x4,x16,8000362c +80003620: 0a1012ef jal x5,80004ec0 +80003624: 80003614 .word 0x80003614 +80003628: 8000e62a .word 0x8000e62a +8000362c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x91bba083 +80003630: 000cad83 lw x27,0(x25) +80003634: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0x76706b7b +80003638: 000ca883 lw x17,0(x25) +8000363c: 004c8c93 addi x25,x25,4 + +80003640 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b17: + pack x17, x27, x17 # perform operation +80003640: 091dc8b3 pack x17,x27,x17 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zbkb_pack_cg_cmp_rd_rs2_nx0_b17, Zbkb_pack_cg_cmp_rd_rs2_nx0_b17_str) +80003644: 000ea203 lw x4,0(x29) +80003648: 01120863 beq x4,x17,80003658 +8000364c: 075012ef jal x5,80004ec0 +80003650: 80003640 .word 0x80003640 +80003654: 8000e666 .word 0x8000e666 +80003658: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x2f595466 +8000365c: 000caf83 lw x31,0(x25) +80003660: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x9220a2f9 +80003664: 000ca903 lw x18,0(x25) +80003668: 004c8c93 addi x25,x25,4 + +8000366c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b18: + pack x18, x31, x18 # perform operation +8000366c: 092fc933 pack x18,x31,x18 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zbkb_pack_cg_cmp_rd_rs2_nx0_b18, Zbkb_pack_cg_cmp_rd_rs2_nx0_b18_str) +80003670: 000ea203 lw x4,0(x29) +80003674: 01220863 beq x4,x18,80003684 +80003678: 049012ef jal x5,80004ec0 +8000367c: 8000366c .word 0x8000366c +80003680: 8000e6a2 .word 0x8000e6a2 +80003684: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xff20a796 +80003688: 000cae03 lw x28,0(x25) +8000368c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xbeca6575 +80003690: 000ca983 lw x19,0(x25) +80003694: 004c8c93 addi x25,x25,4 + +80003698 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b19: + pack x19, x28, x19 # perform operation +80003698: 093e49b3 pack x19,x28,x19 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zbkb_pack_cg_cmp_rd_rs2_nx0_b19, Zbkb_pack_cg_cmp_rd_rs2_nx0_b19_str) +8000369c: 000ea203 lw x4,0(x29) +800036a0: 01320863 beq x4,x19,800036b0 +800036a4: 01d012ef jal x5,80004ec0 +800036a8: 80003698 .word 0x80003698 +800036ac: 8000e6de .word 0x8000e6de +800036b0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x0155e9ad +800036b4: 000cae03 lw x28,0(x25) +800036b8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xfb9ff115 +800036bc: 000caa03 lw x20,0(x25) +800036c0: 004c8c93 addi x25,x25,4 + +800036c4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b20: + pack x20, x28, x20 # perform operation +800036c4: 094e4a33 pack x20,x28,x20 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zbkb_pack_cg_cmp_rd_rs2_nx0_b20, Zbkb_pack_cg_cmp_rd_rs2_nx0_b20_str) +800036c8: 000ea203 lw x4,0(x29) +800036cc: 01420863 beq x4,x20,800036dc +800036d0: 7f0012ef jal x5,80004ec0 +800036d4: 800036c4 .word 0x800036c4 +800036d8: 8000e71a .word 0x8000e71a +800036dc: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x6ed776f1 +800036e0: 000cad83 lw x27,0(x25) +800036e4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0xce8d22b5 +800036e8: 000caa83 lw x21,0(x25) +800036ec: 004c8c93 addi x25,x25,4 + +800036f0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b21: + pack x21, x27, x21 # perform operation +800036f0: 095dcab3 pack x21,x27,x21 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zbkb_pack_cg_cmp_rd_rs2_nx0_b21, Zbkb_pack_cg_cmp_rd_rs2_nx0_b21_str) +800036f4: 000ea203 lw x4,0(x29) +800036f8: 01520863 beq x4,x21,80003708 +800036fc: 7c4012ef jal x5,80004ec0 +80003700: 800036f0 .word 0x800036f0 +80003704: 8000e756 .word 0x8000e756 +80003708: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x48a0810f +8000370c: 000cac03 lw x24,0(x25) +80003710: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x054602ee +80003714: 000cab03 lw x22,0(x25) +80003718: 004c8c93 addi x25,x25,4 + +8000371c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b22: + pack x22, x24, x22 # perform operation +8000371c: 096c4b33 pack x22,x24,x22 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zbkb_pack_cg_cmp_rd_rs2_nx0_b22, Zbkb_pack_cg_cmp_rd_rs2_nx0_b22_str) +80003720: 000ea203 lw x4,0(x29) +80003724: 01620863 beq x4,x22,80003734 +80003728: 798012ef jal x5,80004ec0 +8000372c: 8000371c .word 0x8000371c +80003730: 8000e792 .word 0x8000e792 +80003734: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x2cfc67e8 +80003738: 000ca803 lw x16,0(x25) +8000373c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xc485ec0d +80003740: 000cab83 lw x23,0(x25) +80003744: 004c8c93 addi x25,x25,4 + +80003748 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b23: + pack x23, x16, x23 # perform operation +80003748: 09784bb3 pack x23,x16,x23 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zbkb_pack_cg_cmp_rd_rs2_nx0_b23, Zbkb_pack_cg_cmp_rd_rs2_nx0_b23_str) +8000374c: 000ea203 lw x4,0(x29) +80003750: 01720863 beq x4,x23,80003760 +80003754: 76c012ef jal x5,80004ec0 +80003758: 80003748 .word 0x80003748 +8000375c: 8000e7ce .word 0x8000e7ce +80003760: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x45c182e6 +80003764: 000ca083 lw x1,0(x25) +80003768: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x0c5cf4ef +8000376c: 000cac03 lw x24,0(x25) +80003770: 004c8c93 addi x25,x25,4 + +80003774 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b24: + pack x24, x1, x24 # perform operation +80003774: 0980cc33 pack x24,x1,x24 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zbkb_pack_cg_cmp_rd_rs2_nx0_b24, Zbkb_pack_cg_cmp_rd_rs2_nx0_b24_str) +80003778: 000ea203 lw x4,0(x29) +8000377c: 01820863 beq x4,x24,8000378c +80003780: 740012ef jal x5,80004ec0 +80003784: 80003774 .word 0x80003774 +80003788: 8000e80a .word 0x8000e80a +8000378c: 004e8e93 addi x29,x29,4 + + mv x3, x25 # switch data pointer register to avoid conflict with test +80003790: 000c8193 addi x3,x25,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5bf103d6 +80003794: 0001a503 lw x10,0(x3) +80003798: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x262f4780 +8000379c: 0001ac83 lw x25,0(x3) +800037a0: 00418193 addi x3,x3,4 + +800037a4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b25: + pack x25, x10, x25 # perform operation +800037a4: 09954cb3 pack x25,x10,x25 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zbkb_pack_cg_cmp_rd_rs2_nx0_b25, Zbkb_pack_cg_cmp_rd_rs2_nx0_b25_str) +800037a8: 000ea203 lw x4,0(x29) +800037ac: 01920863 beq x4,x25,800037bc +800037b0: 710012ef jal x5,80004ec0 +800037b4: 800037a4 .word 0x800037a4 +800037b8: 8000e846 .word 0x8000e846 +800037bc: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xb6e1d7d9 +800037c0: 0001a783 lw x15,0(x3) +800037c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xb0ecbb1f +800037c8: 0001ad03 lw x26,0(x3) +800037cc: 00418193 addi x3,x3,4 + +800037d0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b26: + pack x26, x15, x26 # perform operation +800037d0: 09a7cd33 pack x26,x15,x26 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkb_pack_cg_cmp_rd_rs2_nx0_b26, Zbkb_pack_cg_cmp_rd_rs2_nx0_b26_str) +800037d4: 000ea203 lw x4,0(x29) +800037d8: 01a20863 beq x4,x26,800037e8 +800037dc: 6e4012ef jal x5,80004ec0 +800037e0: 800037d0 .word 0x800037d0 +800037e4: 8000e882 .word 0x8000e882 +800037e8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x4ea3fbb1 +800037ec: 0001a783 lw x15,0(x3) +800037f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xc01cfd28 +800037f4: 0001ad83 lw x27,0(x3) +800037f8: 00418193 addi x3,x3,4 + +800037fc : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b27: + pack x27, x15, x27 # perform operation +800037fc: 09b7cdb3 pack x27,x15,x27 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zbkb_pack_cg_cmp_rd_rs2_nx0_b27, Zbkb_pack_cg_cmp_rd_rs2_nx0_b27_str) +80003800: 000ea203 lw x4,0(x29) +80003804: 01b20863 beq x4,x27,80003814 +80003808: 6b8012ef jal x5,80004ec0 +8000380c: 800037fc .word 0x800037fc +80003810: 8000e8be .word 0x8000e8be +80003814: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x5ce09ab9 +80003818: 0001a303 lw x6,0(x3) +8000381c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xea61ab72 +80003820: 0001ae03 lw x28,0(x3) +80003824: 00418193 addi x3,x3,4 + +80003828 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b28: + pack x28, x6, x28 # perform operation +80003828: 09c34e33 pack x28,x6,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkb_pack_cg_cmp_rd_rs2_nx0_b28, Zbkb_pack_cg_cmp_rd_rs2_nx0_b28_str) +8000382c: 000ea203 lw x4,0(x29) +80003830: 01c20863 beq x4,x28,80003840 +80003834: 68c012ef jal x5,80004ec0 +80003838: 80003828 .word 0x80003828 +8000383c: 8000e8fa .word 0x8000e8fa +80003840: 004e8e93 addi x29,x29,4 + + mv x24, x29 # switch signature pointer register to avoid conflict with test +80003844: 000e8c13 addi x24,x29,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xda486ef1 +80003848: 0001ab83 lw x23,0(x3) +8000384c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xf12cdd59 +80003850: 0001ae83 lw x29,0(x3) +80003854: 00418193 addi x3,x3,4 + +80003858 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b29: + pack x29, x23, x29 # perform operation +80003858: 09dbceb3 pack x29,x23,x29 + # Check if x29 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x29, Zbkb_pack_cg_cmp_rd_rs2_nx0_b29, Zbkb_pack_cg_cmp_rd_rs2_nx0_b29_str) +8000385c: 000c2203 lw x4,0(x24) +80003860: 01d20863 beq x4,x29,80003870 +80003864: 65c012ef jal x5,80004ec0 +80003868: 80003858 .word 0x80003858 +8000386c: 8000e936 .word 0x8000e936 +80003870: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x6890ef48 +80003874: 0001a503 lw x10,0(x3) +80003878: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x3dbc2285 +8000387c: 0001af03 lw x30,0(x3) +80003880: 00418193 addi x3,x3,4 + +80003884 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b30: + pack x30, x10, x30 # perform operation +80003884: 09e54f33 pack x30,x10,x30 + # Check if x30 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x30, Zbkb_pack_cg_cmp_rd_rs2_nx0_b30, Zbkb_pack_cg_cmp_rd_rs2_nx0_b30_str) +80003888: 000c2203 lw x4,0(x24) +8000388c: 01e20863 beq x4,x30,8000389c +80003890: 630012ef jal x5,80004ec0 +80003894: 80003884 .word 0x80003884 +80003898: 8000e972 .word 0x8000e972 +8000389c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x864961cd +800038a0: 0001a583 lw x11,0(x3) +800038a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x1ff4f85e +800038a8: 0001af83 lw x31,0(x3) +800038ac: 00418193 addi x3,x3,4 + +800038b0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b31: + pack x31, x11, x31 # perform operation +800038b0: 09f5cfb3 pack x31,x11,x31 + # Check if x31 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x31, Zbkb_pack_cg_cmp_rd_rs2_nx0_b31, Zbkb_pack_cg_cmp_rd_rs2_nx0_b31_str) +800038b4: 000c2203 lw x4,0(x24) +800038b8: 01f20863 beq x4,x31,800038c8 +800038bc: 604012ef jal x5,80004ec0 +800038c0: 800038b0 .word 0x800038b0 +800038c4: 8000e9ae .word 0x8000e9ae +800038c8: 004c0c13 addi x24,x24,4 +///////////////////////////////// +// cmp_rd_rs1_rs2_nx0 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xda9d0e1a +800038cc: 0001a083 lw x1,0(x3) +800038d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xdbad3768 +800038d4: 0001a083 lw x1,0(x3) +800038d8: 00418193 addi x3,x3,4 + +800038dc : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1: + pack x1, x1, x1 # perform operation +800038dc: 0810c0b3 pack x1,x1,x1 + # Check if x1 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x1, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1_str) +800038e0: 000c2203 lw x4,0(x24) +800038e4: 00120863 beq x4,x1,800038f4 +800038e8: 5d8012ef jal x5,80004ec0 +800038ec: 800038dc .word 0x800038dc +800038f0: 8000e9ea .word 0x8000e9ea +800038f4: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x07dd00f5 +800038f8: 0001a103 lw x2,0(x3) +800038fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xe72f9cc3 +80003900: 0001a103 lw x2,0(x3) +80003904: 00418193 addi x3,x3,4 + +80003908 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2: + pack x2, x2, x2 # perform operation +80003908: 08214133 pack x2,x2,x2 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2_str) +8000390c: 000c2203 lw x4,0(x24) +80003910: 00220863 beq x4,x2,80003920 +80003914: 5ac012ef jal x5,80004ec0 +80003918: 80003908 .word 0x80003908 +8000391c: 8000ea29 .word 0x8000ea29 +80003920: 004c0c13 addi x24,x24,4 + + mv x11, x3 # switch data pointer register to avoid conflict with test +80003924: 00018593 addi x11,x3,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xa53a8214 +80003928: 0005a183 lw x3,0(x11) +8000392c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xfdb2dc8f +80003930: 0005a183 lw x3,0(x11) +80003934: 00458593 addi x11,x11,4 + +80003938 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3: + pack x3, x3, x3 # perform operation +80003938: 0831c1b3 pack x3,x3,x3 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3_str) +8000393c: 000c2203 lw x4,0(x24) +80003940: 00320863 beq x4,x3,80003950 +80003944: 57c012ef jal x5,80004ec0 +80003948: 80003938 .word 0x80003938 +8000394c: 8000ea68 .word 0x8000ea68 +80003950: 004c0c13 addi x24,x24,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003954: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003958: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x8d436c1f +8000395c: 0005a203 lw x4,0(x11) +80003960: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xa5ba8211 +80003964: 0005a203 lw x4,0(x11) +80003968: 00458593 addi x11,x11,4 + +8000396c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4: + pack x4, x4, x4 # perform operation +8000396c: 08424233 pack x4,x4,x4 + # Check if x4 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x4, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4_str) +80003970: 000c2683 lw x13,0(x24) +80003974: 00468863 beq x13,x4,80003984 +80003978: 5880176f jal x14,80004f00 +8000397c: 8000396c .word 0x8000396c +80003980: 8000eaa7 .word 0x8000eaa7 +80003984: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xa18a8fd1 +80003988: 0005a283 lw x5,0(x11) +8000398c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xfd72cb6e +80003990: 0005a283 lw x5,0(x11) +80003994: 00458593 addi x11,x11,4 + +80003998 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5: + pack x5, x5, x5 # perform operation +80003998: 0852c2b3 pack x5,x5,x5 + # Check if x5 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x5, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5_str) +8000399c: 000c2683 lw x13,0(x24) +800039a0: 00568863 beq x13,x5,800039b0 +800039a4: 55c0176f jal x14,80004f00 +800039a8: 80003998 .word 0x80003998 +800039ac: 8000eae6 .word 0x8000eae6 +800039b0: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x983bc7f7 +800039b4: 0005a303 lw x6,0(x11) +800039b8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x44ac6953 +800039bc: 0005a303 lw x6,0(x11) +800039c0: 00458593 addi x11,x11,4 + +800039c4 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6: + pack x6, x6, x6 # perform operation +800039c4: 08634333 pack x6,x6,x6 + # Check if x6 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x6, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6_str) +800039c8: 000c2683 lw x13,0(x24) +800039cc: 00668863 beq x13,x6,800039dc +800039d0: 5300176f jal x14,80004f00 +800039d4: 800039c4 .word 0x800039c4 +800039d8: 8000eb25 .word 0x8000eb25 +800039dc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xa9a15526 +800039e0: 0005a383 lw x7,0(x11) +800039e4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x07b5dead +800039e8: 0005a383 lw x7,0(x11) +800039ec: 00458593 addi x11,x11,4 + +800039f0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7: + pack x7, x7, x7 # perform operation +800039f0: 0873c3b3 pack x7,x7,x7 + # Check if x7 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x7, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7_str) +800039f4: 000c2683 lw x13,0(x24) +800039f8: 00768863 beq x13,x7,80003a08 +800039fc: 5040176f jal x14,80004f00 +80003a00: 800039f0 .word 0x800039f0 +80003a04: 8000eb64 .word 0x8000eb64 +80003a08: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x4470200f +80003a0c: 0005a403 lw x8,0(x11) +80003a10: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xb3d1fb3a +80003a14: 0005a403 lw x8,0(x11) +80003a18: 00458593 addi x11,x11,4 + +80003a1c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8: + pack x8, x8, x8 # perform operation +80003a1c: 08844433 pack x8,x8,x8 + # Check if x8 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x8, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8_str) +80003a20: 000c2683 lw x13,0(x24) +80003a24: 00868863 beq x13,x8,80003a34 +80003a28: 4d80176f jal x14,80004f00 +80003a2c: 80003a1c .word 0x80003a1c +80003a30: 8000eba3 .word 0x8000eba3 +80003a34: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x55c3175d +80003a38: 0005a483 lw x9,0(x11) +80003a3c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x55220122 +80003a40: 0005a483 lw x9,0(x11) +80003a44: 00458593 addi x11,x11,4 + +80003a48 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9: + pack x9, x9, x9 # perform operation +80003a48: 0894c4b3 pack x9,x9,x9 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9_str) +80003a4c: 000c2683 lw x13,0(x24) +80003a50: 00968863 beq x13,x9,80003a60 +80003a54: 4ac0176f jal x14,80004f00 +80003a58: 80003a48 .word 0x80003a48 +80003a5c: 8000ebe2 .word 0x8000ebe2 +80003a60: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x5acc5e82 +80003a64: 0005a503 lw x10,0(x11) +80003a68: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xa8e09e12 +80003a6c: 0005a503 lw x10,0(x11) +80003a70: 00458593 addi x11,x11,4 + +80003a74 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10: + pack x10, x10, x10 # perform operation +80003a74: 08a54533 pack x10,x10,x10 + # Check if x10 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x10, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10_str) +80003a78: 000c2683 lw x13,0(x24) +80003a7c: 00a68863 beq x13,x10,80003a8c +80003a80: 4800176f jal x14,80004f00 +80003a84: 80003a74 .word 0x80003a74 +80003a88: 8000ec21 .word 0x8000ec21 +80003a8c: 004c0c13 addi x24,x24,4 + + mv x2, x11 # switch data pointer register to avoid conflict with test +80003a90: 00058113 addi x2,x11,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0432eedc +80003a94: 00012583 lw x11,0(x2) +80003a98: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x9832fc18 +80003a9c: 00012583 lw x11,0(x2) +80003aa0: 00410113 addi x2,x2,4 + +80003aa4 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11: + pack x11, x11, x11 # perform operation +80003aa4: 08b5c5b3 pack x11,x11,x11 + # Check if x11 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x11, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11_str) +80003aa8: 000c2683 lw x13,0(x24) +80003aac: 00b68863 beq x13,x11,80003abc +80003ab0: 4500176f jal x14,80004f00 +80003ab4: 80003aa4 .word 0x80003aa4 +80003ab8: 8000ec61 .word 0x8000ec61 +80003abc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x47e88ea2 +80003ac0: 00012603 lw x12,0(x2) +80003ac4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x6b2470e2 +80003ac8: 00012603 lw x12,0(x2) +80003acc: 00410113 addi x2,x2,4 + +80003ad0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12: + pack x12, x12, x12 # perform operation +80003ad0: 08c64633 pack x12,x12,x12 + # Check if x12 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x12, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12_str) +80003ad4: 000c2683 lw x13,0(x24) +80003ad8: 00c68863 beq x13,x12,80003ae8 +80003adc: 4240176f jal x14,80004f00 +80003ae0: 80003ad0 .word 0x80003ad0 +80003ae4: 8000eca1 .word 0x8000eca1 +80003ae8: 004c0c13 addi x24,x24,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003aec: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003af0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x91128c37 +80003af4: 00012683 lw x13,0(x2) +80003af8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x2bf76cf9 +80003afc: 00012683 lw x13,0(x2) +80003b00: 00410113 addi x2,x2,4 + +80003b04 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13: + pack x13, x13, x13 # perform operation +80003b04: 08d6c6b3 pack x13,x13,x13 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13_str) +80003b08: 000c2203 lw x4,0(x24) +80003b0c: 00d20863 beq x4,x13,80003b1c +80003b10: 3b0012ef jal x5,80004ec0 +80003b14: 80003b04 .word 0x80003b04 +80003b18: 8000ece1 .word 0x8000ece1 +80003b1c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xa8398ac3 +80003b20: 00012703 lw x14,0(x2) +80003b24: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x28a7d6b2 +80003b28: 00012703 lw x14,0(x2) +80003b2c: 00410113 addi x2,x2,4 + +80003b30 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14: + pack x14, x14, x14 # perform operation +80003b30: 08e74733 pack x14,x14,x14 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14_str) +80003b34: 000c2203 lw x4,0(x24) +80003b38: 00e20863 beq x4,x14,80003b48 +80003b3c: 384012ef jal x5,80004ec0 +80003b40: 80003b30 .word 0x80003b30 +80003b44: 8000ed21 .word 0x8000ed21 +80003b48: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x391b4d31 +80003b4c: 00012783 lw x15,0(x2) +80003b50: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xcc0e0f17 +80003b54: 00012783 lw x15,0(x2) +80003b58: 00410113 addi x2,x2,4 + +80003b5c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15: + pack x15, x15, x15 # perform operation +80003b5c: 08f7c7b3 pack x15,x15,x15 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15_str) +80003b60: 000c2203 lw x4,0(x24) +80003b64: 00f20863 beq x4,x15,80003b74 +80003b68: 358012ef jal x5,80004ec0 +80003b6c: 80003b5c .word 0x80003b5c +80003b70: 8000ed61 .word 0x8000ed61 +80003b74: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xa05092e7 +80003b78: 00012803 lw x16,0(x2) +80003b7c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x540e9916 +80003b80: 00012803 lw x16,0(x2) +80003b84: 00410113 addi x2,x2,4 + +80003b88 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16: + pack x16, x16, x16 # perform operation +80003b88: 09084833 pack x16,x16,x16 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16_str) +80003b8c: 000c2203 lw x4,0(x24) +80003b90: 01020863 beq x4,x16,80003ba0 +80003b94: 32c012ef jal x5,80004ec0 +80003b98: 80003b88 .word 0x80003b88 +80003b9c: 8000eda1 .word 0x8000eda1 +80003ba0: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xffa91199 +80003ba4: 00012883 lw x17,0(x2) +80003ba8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x1efcdb65 +80003bac: 00012883 lw x17,0(x2) +80003bb0: 00410113 addi x2,x2,4 + +80003bb4 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17: + pack x17, x17, x17 # perform operation +80003bb4: 0918c8b3 pack x17,x17,x17 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17_str) +80003bb8: 000c2203 lw x4,0(x24) +80003bbc: 01120863 beq x4,x17,80003bcc +80003bc0: 300012ef jal x5,80004ec0 +80003bc4: 80003bb4 .word 0x80003bb4 +80003bc8: 8000ede1 .word 0x8000ede1 +80003bcc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x3e72478e +80003bd0: 00012903 lw x18,0(x2) +80003bd4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x2bd19238 +80003bd8: 00012903 lw x18,0(x2) +80003bdc: 00410113 addi x2,x2,4 + +80003be0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18: + pack x18, x18, x18 # perform operation +80003be0: 09294933 pack x18,x18,x18 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18_str) +80003be4: 000c2203 lw x4,0(x24) +80003be8: 01220863 beq x4,x18,80003bf8 +80003bec: 2d4012ef jal x5,80004ec0 +80003bf0: 80003be0 .word 0x80003be0 +80003bf4: 8000ee21 .word 0x8000ee21 +80003bf8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xb8d35fcc +80003bfc: 00012983 lw x19,0(x2) +80003c00: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x37bcd49f +80003c04: 00012983 lw x19,0(x2) +80003c08: 00410113 addi x2,x2,4 + +80003c0c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19: + pack x19, x19, x19 # perform operation +80003c0c: 0939c9b3 pack x19,x19,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19_str) +80003c10: 000c2203 lw x4,0(x24) +80003c14: 01320863 beq x4,x19,80003c24 +80003c18: 2a8012ef jal x5,80004ec0 +80003c1c: 80003c0c .word 0x80003c0c +80003c20: 8000ee61 .word 0x8000ee61 +80003c24: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xc06ae6f5 +80003c28: 00012a03 lw x20,0(x2) +80003c2c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xd1d9a462 +80003c30: 00012a03 lw x20,0(x2) +80003c34: 00410113 addi x2,x2,4 + +80003c38 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20: + pack x20, x20, x20 # perform operation +80003c38: 094a4a33 pack x20,x20,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20_str) +80003c3c: 000c2203 lw x4,0(x24) +80003c40: 01420863 beq x4,x20,80003c50 +80003c44: 27c012ef jal x5,80004ec0 +80003c48: 80003c38 .word 0x80003c38 +80003c4c: 8000eea1 .word 0x8000eea1 +80003c50: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x415fa775 +80003c54: 00012a83 lw x21,0(x2) +80003c58: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x9ec3256d +80003c5c: 00012a83 lw x21,0(x2) +80003c60: 00410113 addi x2,x2,4 + +80003c64 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21: + pack x21, x21, x21 # perform operation +80003c64: 095acab3 pack x21,x21,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21_str) +80003c68: 000c2203 lw x4,0(x24) +80003c6c: 01520863 beq x4,x21,80003c7c +80003c70: 250012ef jal x5,80004ec0 +80003c74: 80003c64 .word 0x80003c64 +80003c78: 8000eee1 .word 0x8000eee1 +80003c7c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xa25ce626 +80003c80: 00012b03 lw x22,0(x2) +80003c84: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xc753d107 +80003c88: 00012b03 lw x22,0(x2) +80003c8c: 00410113 addi x2,x2,4 + +80003c90 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22: + pack x22, x22, x22 # perform operation +80003c90: 096b4b33 pack x22,x22,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22_str) +80003c94: 000c2203 lw x4,0(x24) +80003c98: 01620863 beq x4,x22,80003ca8 +80003c9c: 224012ef jal x5,80004ec0 +80003ca0: 80003c90 .word 0x80003c90 +80003ca4: 8000ef21 .word 0x8000ef21 +80003ca8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xae06f32b +80003cac: 00012b83 lw x23,0(x2) +80003cb0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xbfd37c61 +80003cb4: 00012b83 lw x23,0(x2) +80003cb8: 00410113 addi x2,x2,4 + +80003cbc : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23: + pack x23, x23, x23 # perform operation +80003cbc: 097bcbb3 pack x23,x23,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23_str) +80003cc0: 000c2203 lw x4,0(x24) +80003cc4: 01720863 beq x4,x23,80003cd4 +80003cc8: 1f8012ef jal x5,80004ec0 +80003ccc: 80003cbc .word 0x80003cbc +80003cd0: 8000ef61 .word 0x8000ef61 +80003cd4: 004c0c13 addi x24,x24,4 + + mv x29, x24 # switch signature pointer register to avoid conflict with test +80003cd8: 000c0e93 addi x29,x24,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xf9d19c61 +80003cdc: 00012c03 lw x24,0(x2) +80003ce0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x3fee6739 +80003ce4: 00012c03 lw x24,0(x2) +80003ce8: 00410113 addi x2,x2,4 + +80003cec : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24: + pack x24, x24, x24 # perform operation +80003cec: 098c4c33 pack x24,x24,x24 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24_str) +80003cf0: 000ea203 lw x4,0(x29) +80003cf4: 01820863 beq x4,x24,80003d04 +80003cf8: 1c8012ef jal x5,80004ec0 +80003cfc: 80003cec .word 0x80003cec +80003d00: 8000efa1 .word 0x8000efa1 +80003d04: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xb7de2781 +80003d08: 00012c83 lw x25,0(x2) +80003d0c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x0a10b01b +80003d10: 00012c83 lw x25,0(x2) +80003d14: 00410113 addi x2,x2,4 + +80003d18 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25: + pack x25, x25, x25 # perform operation +80003d18: 099cccb3 pack x25,x25,x25 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25_str) +80003d1c: 000ea203 lw x4,0(x29) +80003d20: 01920863 beq x4,x25,80003d30 +80003d24: 19c012ef jal x5,80004ec0 +80003d28: 80003d18 .word 0x80003d18 +80003d2c: 8000efe1 .word 0x8000efe1 +80003d30: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xb1763abb +80003d34: 00012d03 lw x26,0(x2) +80003d38: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xb0573d87 +80003d3c: 00012d03 lw x26,0(x2) +80003d40: 00410113 addi x2,x2,4 + +80003d44 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26: + pack x26, x26, x26 # perform operation +80003d44: 09ad4d33 pack x26,x26,x26 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26_str) +80003d48: 000ea203 lw x4,0(x29) +80003d4c: 01a20863 beq x4,x26,80003d5c +80003d50: 170012ef jal x5,80004ec0 +80003d54: 80003d44 .word 0x80003d44 +80003d58: 8000f021 .word 0x8000f021 +80003d5c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x649f2f42 +80003d60: 00012d83 lw x27,0(x2) +80003d64: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x8cdfd8d8 +80003d68: 00012d83 lw x27,0(x2) +80003d6c: 00410113 addi x2,x2,4 + +80003d70 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27: + pack x27, x27, x27 # perform operation +80003d70: 09bdcdb3 pack x27,x27,x27 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27_str) +80003d74: 000ea203 lw x4,0(x29) +80003d78: 01b20863 beq x4,x27,80003d88 +80003d7c: 144012ef jal x5,80004ec0 +80003d80: 80003d70 .word 0x80003d70 +80003d84: 8000f061 .word 0x8000f061 +80003d88: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xbe7a9b1e +80003d8c: 00012e03 lw x28,0(x2) +80003d90: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xbedd4f6a +80003d94: 00012e03 lw x28,0(x2) +80003d98: 00410113 addi x2,x2,4 + +80003d9c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28: + pack x28, x28, x28 # perform operation +80003d9c: 09ce4e33 pack x28,x28,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28_str) +80003da0: 000ea203 lw x4,0(x29) +80003da4: 01c20863 beq x4,x28,80003db4 +80003da8: 118012ef jal x5,80004ec0 +80003dac: 80003d9c .word 0x80003d9c +80003db0: 8000f0a1 .word 0x8000f0a1 +80003db4: 004e8e93 addi x29,x29,4 + + mv x12, x29 # switch signature pointer register to avoid conflict with test +80003db8: 000e8613 addi x12,x29,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x8faab038 +80003dbc: 00012e83 lw x29,0(x2) +80003dc0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x40b60e80 +80003dc4: 00012e83 lw x29,0(x2) +80003dc8: 00410113 addi x2,x2,4 + +80003dcc : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29: + pack x29, x29, x29 # perform operation +80003dcc: 09deceb3 pack x29,x29,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29_str) +80003dd0: 00062203 lw x4,0(x12) +80003dd4: 01d20863 beq x4,x29,80003de4 +80003dd8: 0e8012ef jal x5,80004ec0 +80003ddc: 80003dcc .word 0x80003dcc +80003de0: 8000f0e1 .word 0x8000f0e1 +80003de4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xed0094c0 +80003de8: 00012f03 lw x30,0(x2) +80003dec: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x757ccde7 +80003df0: 00012f03 lw x30,0(x2) +80003df4: 00410113 addi x2,x2,4 + +80003df8 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30: + pack x30, x30, x30 # perform operation +80003df8: 09ef4f33 pack x30,x30,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30_str) +80003dfc: 00062203 lw x4,0(x12) +80003e00: 01e20863 beq x4,x30,80003e10 +80003e04: 0bc012ef jal x5,80004ec0 +80003e08: 80003df8 .word 0x80003df8 +80003e0c: 8000f121 .word 0x8000f121 +80003e10: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xd1e94829 +80003e14: 00012f83 lw x31,0(x2) +80003e18: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x593fa80b +80003e1c: 00012f83 lw x31,0(x2) +80003e20: 00410113 addi x2,x2,4 + +80003e24 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31: + pack x31, x31, x31 # perform operation +80003e24: 09ffcfb3 pack x31,x31,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31_str) +80003e28: 00062203 lw x4,0(x12) +80003e2c: 01f20863 beq x4,x31,80003e3c +80003e30: 090012ef jal x5,80004ec0 +80003e34: 80003e24 .word 0x80003e24 +80003e38: 8000f161 .word 0x8000f161 +80003e3c: 00460613 addi x12,x12,4 + + mv x2, x12 # restore signature pointer to default register for teardown +80003e40: 00060113 addi x2,x12,0 + +80003e44 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80003e44: 00000513 addi x10,x0,0 +80003e48: 00000073 ecall +80003e4c: fff00513 addi x10,x0,-1 +80003e50: 1d800413 addi x8,x0,472 + +80003e54 : +80003e54: 34002373 csrrs x6,mscratch,x0 + +80003e58 : +80003e58: 23832383 lw x7,568(x6) +80003e5c: 23c32483 lw x9,572(x6) + +80003e60 : +80003e60: 22032383 lw x7,544(x6) + +80003e64 : +80003e64: 25032483 lw x9,592(x6) +80003e68: 34049073 csrrw x0,mscratch,x9 + +80003e6c : +80003e6c: 24832483 lw x9,584(x6) +80003e70: 305493f3 csrrw x7,mtvec,x9 +80003e74: ffc4f493 andi x9,x9,-4 +80003e78: ffc3f393 andi x7,x7,-4 +80003e7c: 00749e63 bne x9,x7,80003e98 + +80003e80 : +80003e80: 00030493 addi x9,x6,0 + +80003e84 : +80003e84: 0004a783 lw x15,0(x9) +80003e88: 00f3a023 sw x15,0(x7) +80003e8c: 00438393 addi x7,x7,4 +80003e90: 00448493 addi x9,x9,4 +80003e94: fe83c8e3 blt x7,x8,80003e84 +80003e98: 0000100f fence.i + +80003e9c : +80003e9c: 00000013 addi x0,x0,0 +80003ea0: 00000497 auipc x9,0x0 +80003ea4: 29048493 addi x9,x9,656 # 80004130 +80003ea8: 00000013 addi x0,x0,0 +80003eac: 00000013 addi x0,x0,0 +80003eb0: 00000013 addi x0,x0,0 +80003eb4: 00000013 addi x0,x0,0 +80003eb8: 00000013 addi x0,x0,0 +80003ebc: 00000013 addi x0,x0,0 +80003ec0: 10e49863 bne x9,x14,80003fd0 +80003ec4: 00000013 addi x0,x0,0 +80003ec8: 00000013 addi x0,x0,0 +80003ecc: 00000013 addi x0,x0,0 +80003ed0: 00000013 addi x0,x0,0 +80003ed4: 00000013 addi x0,x0,0 +80003ed8: 00000013 addi x0,x0,0 +80003edc: 00000013 addi x0,x0,0 +80003ee0: 0000c517 auipc x10,0xc +80003ee4: 94e50513 addi x10,x10,-1714 # 8000f82e +80003ee8: 00000013 addi x0,x0,0 +80003eec: 00000013 addi x0,x0,0 +80003ef0: 00000013 addi x0,x0,0 +80003ef4: 00000013 addi x0,x0,0 +80003ef8: 00000013 addi x0,x0,0 +80003efc: 00000013 addi x0,x0,0 +80003f00: 0001d097 auipc x1,0x1d +80003f04: 664080e7 jalr x1,1636(x1) # 80021564 +80003f08: 00000013 addi x0,x0,0 +80003f0c: 00000013 addi x0,x0,0 +80003f10: 00000013 addi x0,x0,0 +80003f14: 00000013 addi x0,x0,0 +80003f18: 00000013 addi x0,x0,0 +80003f1c: 00000013 addi x0,x0,0 +80003f20: 0000c517 auipc x10,0xc +80003f24: 94750513 addi x10,x10,-1721 # 8000f867 +80003f28: 00000013 addi x0,x0,0 +80003f2c: 00000013 addi x0,x0,0 +80003f30: 00000013 addi x0,x0,0 +80003f34: 00000013 addi x0,x0,0 +80003f38: 00000013 addi x0,x0,0 +80003f3c: 00000013 addi x0,x0,0 +80003f40: 0001d097 auipc x1,0x1d +80003f44: 624080e7 jalr x1,1572(x1) # 80021564 +80003f48: 00000013 addi x0,x0,0 +80003f4c: 00000013 addi x0,x0,0 +80003f50: 00000013 addi x0,x0,0 +80003f54: 00000013 addi x0,x0,0 +80003f58: 00000013 addi x0,x0,0 +80003f5c: 00000013 addi x0,x0,0 +80003f60: 0000c517 auipc x10,0xc +80003f64: 96750513 addi x10,x10,-1689 # 8000f8c7 +80003f68: 00000013 addi x0,x0,0 +80003f6c: 00000013 addi x0,x0,0 +80003f70: 00000013 addi x0,x0,0 +80003f74: 00000013 addi x0,x0,0 +80003f78: 00000013 addi x0,x0,0 +80003f7c: 00000013 addi x0,x0,0 +80003f80: 0001d097 auipc x1,0x1d +80003f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80003f88: 00000013 addi x0,x0,0 +80003f8c: 00000013 addi x0,x0,0 +80003f90: 00000013 addi x0,x0,0 +80003f94: 00000013 addi x0,x0,0 +80003f98: 00000013 addi x0,x0,0 +80003f9c: 00000013 addi x0,x0,0 +80003fa0: 0000c517 auipc x10,0xc +80003fa4: 4d250513 addi x10,x10,1234 # 80010472 +80003fa8: 00000013 addi x0,x0,0 +80003fac: 00000013 addi x0,x0,0 +80003fb0: 00000013 addi x0,x0,0 +80003fb4: 00000013 addi x0,x0,0 +80003fb8: 00000013 addi x0,x0,0 +80003fbc: 00000013 addi x0,x0,0 +80003fc0: 0001d097 auipc x1,0x1d +80003fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80003fc8: 0001d097 auipc x1,0x1d +80003fcc: 5fc080e7 jalr x1,1532(x1) # 800215c4 + +80003fd0 : +80003fd0: 00000013 addi x0,x0,0 +80003fd4: 00000013 addi x0,x0,0 +80003fd8: 00000013 addi x0,x0,0 +80003fdc: 00000013 addi x0,x0,0 +80003fe0: 00004317 auipc x6,0x4 +80003fe4: 34830313 addi x6,x6,840 # 80008328 +80003fe8: 00000013 addi x0,x0,0 +80003fec: 00000013 addi x0,x0,0 +80003ff0: 00000013 addi x0,x0,0 +80003ff4: 00000013 addi x0,x0,0 +80003ff8: 00000013 addi x0,x0,0 +80003ffc: 00000013 addi x0,x0,0 +80004000: 00032303 lw x6,0(x6) +80004004: 00000013 addi x0,x0,0 +80004008: 00000013 addi x0,x0,0 +8000400c: 00000013 addi x0,x0,0 +80004010: 00000013 addi x0,x0,0 +80004014: 00000013 addi x0,x0,0 +80004018: 00000013 addi x0,x0,0 +8000401c: 00000013 addi x0,x0,0 +80004020: 0000d397 auipc x7,0xd +80004024: 49838393 addi x7,x7,1176 # 800114b8 +80004028: 00000013 addi x0,x0,0 +8000402c: 00000013 addi x0,x0,0 +80004030: 00000013 addi x0,x0,0 +80004034: 00000013 addi x0,x0,0 +80004038: 00000013 addi x0,x0,0 +8000403c: 00000013 addi x0,x0,0 +80004040: 40730333 sub x6,x6,x7 +80004044: 00000013 addi x0,x0,0 +80004048: 00000013 addi x0,x0,0 +8000404c: 00000013 addi x0,x0,0 +80004050: 00000013 addi x0,x0,0 +80004054: 00000013 addi x0,x0,0 +80004058: 00000013 addi x0,x0,0 +8000405c: 00000013 addi x0,x0,0 +80004060: 0000d417 auipc x8,0xd +80004064: 45040413 addi x8,x8,1104 # 800114b0 +80004068: 00000013 addi x0,x0,0 +8000406c: 00000013 addi x0,x0,0 +80004070: 00000013 addi x0,x0,0 +80004074: 00000013 addi x0,x0,0 +80004078: 00000013 addi x0,x0,0 +8000407c: 00000013 addi x0,x0,0 +80004080: 00042203 lw x4,0(x8) +80004084: 00620863 beq x4,x6,80004094 +80004088: 6a1003ef jal x7,80004f28 +8000408c: 80003fd0 .word 0x80003fd0 +80004090: 8000fa1b .word 0x8000fa1b + +80004094 : +80004094: bad0e4b7 lui x9,0xbad0e +80004098: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +8000409c: 00e49a63 bne x9,x14,800040b0 +800040a0: 689003ef jal x7,80004f28 +800040a4: 80004164 .word 0x80004164 +800040a8: 8000f889 .word 0x8000f889 +800040ac: 00000341 .word 0x00000341 + +800040b0 : +800040b0: 00000013 addi x0,x0,0 +800040b4: 00000013 addi x0,x0,0 +800040b8: 00000013 addi x0,x0,0 +800040bc: 00000013 addi x0,x0,0 +800040c0: 0000b517 auipc x10,0xb +800040c4: 73450513 addi x10,x10,1844 # 8000f7f4 +800040c8: 00000013 addi x0,x0,0 +800040cc: 00000013 addi x0,x0,0 +800040d0: 00000013 addi x0,x0,0 +800040d4: 00000013 addi x0,x0,0 +800040d8: 00000013 addi x0,x0,0 +800040dc: 00000013 addi x0,x0,0 +800040e0: 0001d097 auipc x1,0x1d +800040e4: 484080e7 jalr x1,1156(x1) # 80021564 +800040e8: 0001d097 auipc x1,0x1d +800040ec: 4bc080e7 jalr x1,1212(x1) # 800215a4 + +800040f0 : +800040f0: 00000013 addi x0,x0,0 +800040f4: 00000013 addi x0,x0,0 +800040f8: 00000013 addi x0,x0,0 +800040fc: 00000013 addi x0,x0,0 +80004100: 0000b517 auipc x10,0xb +80004104: 72e50513 addi x10,x10,1838 # 8000f82e +80004108: 00000013 addi x0,x0,0 +8000410c: 00000013 addi x0,x0,0 +80004110: 00000013 addi x0,x0,0 +80004114: 00000013 addi x0,x0,0 +80004118: 00000013 addi x0,x0,0 +8000411c: 00000013 addi x0,x0,0 +80004120: 0001d097 auipc x1,0x1d +80004124: 444080e7 jalr x1,1092(x1) # 80021564 +80004128: 0001d097 auipc x1,0x1d +8000412c: 49c080e7 jalr x1,1180(x1) # 800215c4 + +80004130 : +80004130: 00000013 addi x0,x0,0 +80004134: 00000013 addi x0,x0,0 +80004138: 00000013 addi x0,x0,0 +8000413c: 00000013 addi x0,x0,0 +80004140: 00000717 auipc x14,0x0 +80004144: ff070713 addi x14,x14,-16 # 80004130 +80004148: 00000013 addi x0,x0,0 +8000414c: 00000013 addi x0,x0,0 +80004150: 00000013 addi x0,x0,0 +80004154: 00000013 addi x0,x0,0 +80004158: 00000013 addi x0,x0,0 +8000415c: 00000013 addi x0,x0,0 +80004160: ce5ff06f jal x0,80003e44 + +80004164 : +80004164: bad0e737 lui x14,0xbad0e +80004168: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +8000416c: cd9ff06f jal x0,80003e44 +80004170: 00000013 addi x0,x0,0 +80004174: 00000013 addi x0,x0,0 +80004178: 00000013 addi x0,x0,0 +8000417c: 00000013 addi x0,x0,0 + +80004180 : +80004180: 0800006f jal x0,80004200 +80004184: 0880006f jal x0,8000420c +80004188: 0900006f jal x0,80004218 +8000418c: 0980006f jal x0,80004224 +80004190: 0a00006f jal x0,80004230 +80004194: 0a80006f jal x0,8000423c +80004198: 0b00006f jal x0,80004248 +8000419c: 0b80006f jal x0,80004254 +800041a0: 0c00006f jal x0,80004260 +800041a4: 0c80006f jal x0,8000426c +800041a8: 0d00006f jal x0,80004278 +800041ac: 0d80006f jal x0,80004284 +800041b0: 0e00006f jal x0,80004290 +800041b4: 0e80006f jal x0,8000429c +800041b8: 0f00006f jal x0,800042a8 +800041bc: 0f80006f jal x0,800042b4 +800041c0: 1000006f jal x0,800042c0 +800041c4: 1080006f jal x0,800042cc +800041c8: 1100006f jal x0,800042d8 +800041cc: 1180006f jal x0,800042e4 +800041d0: 1200006f jal x0,800042f0 +800041d4: 1280006f jal x0,800042fc +800041d8: 1300006f jal x0,80004308 +800041dc: 1380006f jal x0,80004314 +800041e0: 1400006f jal x0,80004320 +800041e4: 13c0006f jal x0,80004320 +800041e8: 1380006f jal x0,80004320 +800041ec: 1340006f jal x0,80004320 +800041f0: 1300006f jal x0,80004320 +800041f4: 12c0006f jal x0,80004320 +800041f8: 1280006f jal x0,80004320 +800041fc: 1240006f jal x0,80004320 + +80004200 : +80004200: 34011173 csrrw x2,mscratch,x2 +80004204: 26f12823 sw x15,624(x2) +80004208: 13c007ef jal x15,80004344 +8000420c: 34011173 csrrw x2,mscratch,x2 +80004210: 26f12823 sw x15,624(x2) +80004214: 130007ef jal x15,80004344 +80004218: 34011173 csrrw x2,mscratch,x2 +8000421c: 26f12823 sw x15,624(x2) +80004220: 124007ef jal x15,80004344 +80004224: 34011173 csrrw x2,mscratch,x2 +80004228: 26f12823 sw x15,624(x2) +8000422c: 118007ef jal x15,80004344 +80004230: 34011173 csrrw x2,mscratch,x2 +80004234: 26f12823 sw x15,624(x2) +80004238: 10c007ef jal x15,80004344 +8000423c: 34011173 csrrw x2,mscratch,x2 +80004240: 26f12823 sw x15,624(x2) +80004244: 100007ef jal x15,80004344 +80004248: 34011173 csrrw x2,mscratch,x2 +8000424c: 26f12823 sw x15,624(x2) +80004250: 0f4007ef jal x15,80004344 +80004254: 34011173 csrrw x2,mscratch,x2 +80004258: 26f12823 sw x15,624(x2) +8000425c: 0e8007ef jal x15,80004344 +80004260: 34011173 csrrw x2,mscratch,x2 +80004264: 26f12823 sw x15,624(x2) +80004268: 0dc007ef jal x15,80004344 +8000426c: 34011173 csrrw x2,mscratch,x2 +80004270: 26f12823 sw x15,624(x2) +80004274: 0d0007ef jal x15,80004344 +80004278: 34011173 csrrw x2,mscratch,x2 +8000427c: 26f12823 sw x15,624(x2) +80004280: 0c4007ef jal x15,80004344 +80004284: 34011173 csrrw x2,mscratch,x2 +80004288: 26f12823 sw x15,624(x2) +8000428c: 0b8007ef jal x15,80004344 +80004290: 34011173 csrrw x2,mscratch,x2 +80004294: 26f12823 sw x15,624(x2) +80004298: 0ac007ef jal x15,80004344 +8000429c: 34011173 csrrw x2,mscratch,x2 +800042a0: 26f12823 sw x15,624(x2) +800042a4: 0a0007ef jal x15,80004344 +800042a8: 34011173 csrrw x2,mscratch,x2 +800042ac: 26f12823 sw x15,624(x2) +800042b0: 094007ef jal x15,80004344 +800042b4: 34011173 csrrw x2,mscratch,x2 +800042b8: 26f12823 sw x15,624(x2) +800042bc: 088007ef jal x15,80004344 +800042c0: 34011173 csrrw x2,mscratch,x2 +800042c4: 26f12823 sw x15,624(x2) +800042c8: 07c007ef jal x15,80004344 +800042cc: 34011173 csrrw x2,mscratch,x2 +800042d0: 26f12823 sw x15,624(x2) +800042d4: 070007ef jal x15,80004344 +800042d8: 34011173 csrrw x2,mscratch,x2 +800042dc: 26f12823 sw x15,624(x2) +800042e0: 064007ef jal x15,80004344 +800042e4: 34011173 csrrw x2,mscratch,x2 +800042e8: 26f12823 sw x15,624(x2) +800042ec: 058007ef jal x15,80004344 +800042f0: 34011173 csrrw x2,mscratch,x2 +800042f4: 26f12823 sw x15,624(x2) +800042f8: 04c007ef jal x15,80004344 +800042fc: 34011173 csrrw x2,mscratch,x2 +80004300: 26f12823 sw x15,624(x2) +80004304: 040007ef jal x15,80004344 +80004308: 34011173 csrrw x2,mscratch,x2 +8000430c: 26f12823 sw x15,624(x2) +80004310: 034007ef jal x15,80004344 +80004314: 34011173 csrrw x2,mscratch,x2 +80004318: 26f12823 sw x15,624(x2) +8000431c: 028007ef jal x15,80004344 + +80004320 : +80004320: 00000317 auipc x6,0x0 +80004324: b7c30313 addi x6,x6,-1156 # 80003e9c +80004328: 00000013 addi x0,x0,0 +8000432c: 00000013 addi x0,x0,0 +80004330: 00000013 addi x0,x0,0 +80004334: 00000013 addi x0,x0,0 +80004338: 00000013 addi x0,x0,0 +8000433c: 00000013 addi x0,x0,0 +80004340: 00030067 jalr x0,0(x6) + +80004344 : +80004344: 26e12623 sw x14,620(x2) +80004348: 34011773 csrrw x14,mscratch,x2 +8000434c: 26e12a23 sw x14,628(x2) +80004350: 23012703 lw x14,560(x2) +80004354: 00070067 jalr x0,0(x14) + +80004358 : +80004358: 26912423 sw x9,616(x2) +8000435c: 26812223 sw x8,612(x2) +80004360: 26712023 sw x7,608(x2) +80004364: 24612e23 sw x6,604(x2) +80004368: 00000013 addi x0,x0,0 +8000436c: 00000013 addi x0,x0,0 +80004370: 00000013 addi x0,x0,0 +80004374: 00000013 addi x0,x0,0 +80004378: 00000013 addi x0,x0,0 +8000437c: 00000013 addi x0,x0,0 +80004380: 00004317 auipc x6,0x4 +80004384: d8830313 addi x6,x6,-632 # 80008108 +80004388: 00000013 addi x0,x0,0 +8000438c: 00000013 addi x0,x0,0 +80004390: 00000013 addi x0,x0,0 +80004394: 00000013 addi x0,x0,0 +80004398: 00000013 addi x0,x0,0 +8000439c: 00000013 addi x0,x0,0 +800043a0: 00032383 lw x7,0(x6) +800043a4: 00138393 addi x7,x7,1 +800043a8: 00732023 sw x7,0(x6) +800043ac: 34202773 csrrs x14,mcause,x0 + +800043b0 : +800043b0: 800014b7 lui x9,0x80001 +800043b4: fff48493 addi x9,x9,-1 # 80000fff +800043b8: 00e4f4b3 and x9,x9,x14 + +800043bc : +800043bc: ffe48413 addi x8,x9,-2 +800043c0: 00041663 bne x8,x0,800043cc + +800043c4 : +800043c4: 280506e3 beq x10,x0,80004e50 +800043c8: 58c0006f jal x0,80004954 + +800043cc : +800043cc: ff848413 addi x8,x9,-8 +800043d0: 00245413 srli x8,x8,0x2 +800043d4: 58041063 bne x8,x0,80004954 + +800043d8 : +800043d8: 26050ce3 beq x10,x0,80004e50 + +800043dc : +800043dc: fff50493 addi x9,x10,-1 +800043e0: 00500393 addi x7,x0,5 +800043e4: 0274e063 bltu x9,x7,80004404 +800043e8: 07300393 addi x7,x0,115 +800043ec: 00750463 beq x10,x7,800043f4 +800043f0: 0800006f jal x0,80004470 + +800043f4 : +800043f4: 34102573 csrrs x10,mepc,x0 +800043f8: 00450413 addi x8,x10,4 +800043fc: 34141073 csrrw x0,mepc,x8 +80004400: 7c00006f jal x0,80004bc0 + +80004404 : +80004404: 341024f3 csrrs x9,mepc,x0 +80004408: 00448493 addi x9,x9,4 +8000440c: 34149073 csrrw x0,mepc,x9 +80004410: 00100393 addi x7,x0,1 +80004414: 00750e63 beq x10,x7,80004430 +80004418: 00200393 addi x7,x0,2 +8000441c: 02750263 beq x10,x7,80004440 +80004420: 00300393 addi x7,x0,3 +80004424: 02750c63 beq x10,x7,8000445c +80004428: fff00513 addi x10,x0,-1 +8000442c: 7940006f jal x0,80004bc0 + +80004430 : +80004430: 000024b7 lui x9,0x2 +80004434: 80048493 addi x9,x9,-2048 # 1800 +80004438: 3004a073 csrrs x0,mstatus,x9 +8000443c: 7840006f jal x0,80004bc0 + +80004440 : +80004440: 000024b7 lui x9,0x2 +80004444: 80048493 addi x9,x9,-2048 # 1800 +80004448: 3004b073 csrrc x0,mstatus,x9 +8000444c: 000014b7 lui x9,0x1 +80004450: 80048493 addi x9,x9,-2048 # 800 +80004454: 3004a073 csrrs x0,mstatus,x9 +80004458: 7680006f jal x0,80004bc0 + +8000445c : +8000445c: 000024b7 lui x9,0x2 +80004460: 80048493 addi x9,x9,-2048 # 1800 +80004464: 3004b073 csrrc x0,mstatus,x9 +80004468: 7580006f jal x0,80004bc0 + +8000446c : +8000446c: 00000013 addi x0,x0,0 + +80004470 : +80004470: 00000013 addi x0,x0,0 +80004474: 00000013 addi x0,x0,0 +80004478: 00000013 addi x0,x0,0 +8000447c: 00000013 addi x0,x0,0 +80004480: 00000397 auipc x7,0x0 +80004484: 17038393 addi x7,x7,368 # 800045f0 +80004488: 00000013 addi x0,x0,0 +8000448c: 00000013 addi x0,x0,0 +80004490: 00000013 addi x0,x0,0 +80004494: 00000013 addi x0,x0,0 +80004498: 00000013 addi x0,x0,0 +8000449c: 00000013 addi x0,x0,0 + +800044a0 : +800044a0: 0003a403 lw x8,0(x7) +800044a4: 00a40863 beq x8,x10,800044b4 +800044a8: 04040863 beq x8,x0,800044f8 +800044ac: 00838393 addi x7,x7,8 +800044b0: ff1ff06f jal x0,800044a0 + +800044b4 : +800044b4: 00008493 addi x9,x1,0 +800044b8: 00000013 addi x0,x0,0 +800044bc: 00000013 addi x0,x0,0 +800044c0: 00000097 auipc x1,0x0 +800044c4: 02408093 addi x1,x1,36 # 800044e4 +800044c8: 00000013 addi x0,x0,0 +800044cc: 00000013 addi x0,x0,0 +800044d0: 00000013 addi x0,x0,0 +800044d4: 00000013 addi x0,x0,0 +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00038067 jalr x0,0(x7) + +800044e4 : +800044e4: 00048093 addi x1,x9,0 +800044e8: 34102473 csrrs x8,mepc,x0 +800044ec: 00440413 addi x8,x8,4 +800044f0: 34141073 csrrw x0,mepc,x8 +800044f4: 6cc0006f jal x0,80004bc0 + +800044f8 : +800044f8: 00050493 addi x9,x10,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 0000d517 auipc x10,0xd +80004504: 9a950513 addi x10,x10,-1623 # 80010ea9 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0001d097 auipc x1,0x1d +80004524: 044080e7 jalr x1,68(x1) # 80021564 +80004528: 00048513 addi x10,x9,0 +8000452c: 02000593 addi x11,x0,32 +80004530: 4a8020ef jal x1,800069d8 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000b517 auipc x10,0xb +80004544: dd850513 addi x10,x10,-552 # 8000f318 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001d097 auipc x1,0x1d +80004564: 004080e7 jalr x1,4(x1) # 80021564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000b517 auipc x10,0xb +80004584: 3b050513 addi x10,x10,944 # 8000f930 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001d097 auipc x1,0x1d +800045a4: fc4080e7 jalr x1,-60(x1) # 80021564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000b517 auipc x10,0xb +800045c4: 26e50513 addi x10,x10,622 # 8000f82e +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001d097 auipc x1,0x1d +800045e4: f84080e7 jalr x1,-124(x1) # 80021564 +800045e8: 0001d097 auipc x1,0x1d +800045ec: fdc080e7 jalr x1,-36(x1) # 800215c4 + +800045f0 : +800045f0: 30002573 .word 0x30002573 +800045f4: 00008067 jalr x0,0(x1) +800045f8: 30059073 .word 0x30059073 +800045fc: 00008067 jalr x0,0(x1) +80004600: 3005a073 .word 0x3005a073 +80004604: 00008067 jalr x0,0(x1) +80004608: 3005b073 .word 0x3005b073 +8000460c: 00008067 jalr x0,0(x1) +80004610: 30402573 .word 0x30402573 +80004614: 00008067 jalr x0,0(x1) +80004618: 30459073 .word 0x30459073 +8000461c: 00008067 jalr x0,0(x1) +80004620: 3045a073 .word 0x3045a073 +80004624: 00008067 jalr x0,0(x1) +80004628: 3045b073 .word 0x3045b073 +8000462c: 00008067 jalr x0,0(x1) +80004630: 30602573 .word 0x30602573 +80004634: 00008067 jalr x0,0(x1) +80004638: 30659073 .word 0x30659073 +8000463c: 00008067 jalr x0,0(x1) +80004640: 3065a073 .word 0x3065a073 +80004644: 00008067 jalr x0,0(x1) +80004648: 3065b073 .word 0x3065b073 +8000464c: 00008067 jalr x0,0(x1) +80004650: 30a02573 .word 0x30a02573 +80004654: 00008067 jalr x0,0(x1) +80004658: 30a59073 .word 0x30a59073 +8000465c: 00008067 jalr x0,0(x1) +80004660: 30a5a073 .word 0x30a5a073 +80004664: 00008067 jalr x0,0(x1) +80004668: 30a5b073 .word 0x30a5b073 +8000466c: 00008067 jalr x0,0(x1) +80004670: 34402573 .word 0x34402573 +80004674: 00008067 jalr x0,0(x1) +80004678: 34459073 .word 0x34459073 +8000467c: 00008067 jalr x0,0(x1) +80004680: 3445a073 .word 0x3445a073 +80004684: 00008067 jalr x0,0(x1) +80004688: 3445b073 .word 0x3445b073 +8000468c: 00008067 jalr x0,0(x1) +80004690: 74702573 .word 0x74702573 +80004694: 00008067 jalr x0,0(x1) +80004698: 74759073 .word 0x74759073 +8000469c: 00008067 jalr x0,0(x1) +800046a0: 7475a073 .word 0x7475a073 +800046a4: 00008067 jalr x0,0(x1) +800046a8: 7475b073 .word 0x7475b073 +800046ac: 00008067 jalr x0,0(x1) +800046b0: 32002573 .word 0x32002573 +800046b4: 00008067 jalr x0,0(x1) +800046b8: 32059073 .word 0x32059073 +800046bc: 00008067 jalr x0,0(x1) +800046c0: 3205a073 .word 0x3205a073 +800046c4: 00008067 jalr x0,0(x1) +800046c8: 3205b073 .word 0x3205b073 +800046cc: 00008067 jalr x0,0(x1) +800046d0: b0002573 .word 0xb0002573 +800046d4: 00008067 jalr x0,0(x1) +800046d8: b0059073 .word 0xb0059073 +800046dc: 00008067 jalr x0,0(x1) +800046e0: b005a073 .word 0xb005a073 +800046e4: 00008067 jalr x0,0(x1) +800046e8: b005b073 .word 0xb005b073 +800046ec: 00008067 jalr x0,0(x1) +800046f0: b0202573 .word 0xb0202573 +800046f4: 00008067 jalr x0,0(x1) +800046f8: b0259073 .word 0xb0259073 +800046fc: 00008067 jalr x0,0(x1) +80004700: b025a073 .word 0xb025a073 +80004704: 00008067 jalr x0,0(x1) +80004708: b025b073 .word 0xb025b073 +8000470c: 00008067 jalr x0,0(x1) +80004710: 10002573 .word 0x10002573 +80004714: 00008067 jalr x0,0(x1) +80004718: 10059073 .word 0x10059073 +8000471c: 00008067 jalr x0,0(x1) +80004720: 1005a073 .word 0x1005a073 +80004724: 00008067 jalr x0,0(x1) +80004728: 1005b073 .word 0x1005b073 +8000472c: 00008067 jalr x0,0(x1) +80004730: 10402573 .word 0x10402573 +80004734: 00008067 jalr x0,0(x1) +80004738: 10459073 .word 0x10459073 +8000473c: 00008067 jalr x0,0(x1) +80004740: 1045a073 .word 0x1045a073 +80004744: 00008067 jalr x0,0(x1) +80004748: 1045b073 .word 0x1045b073 +8000474c: 00008067 jalr x0,0(x1) +80004750: 10602573 .word 0x10602573 +80004754: 00008067 jalr x0,0(x1) +80004758: 10659073 .word 0x10659073 +8000475c: 00008067 jalr x0,0(x1) +80004760: 1065a073 .word 0x1065a073 +80004764: 00008067 jalr x0,0(x1) +80004768: 1065b073 .word 0x1065b073 +8000476c: 00008067 jalr x0,0(x1) +80004770: 10a02573 .word 0x10a02573 +80004774: 00008067 jalr x0,0(x1) +80004778: 10a59073 .word 0x10a59073 +8000477c: 00008067 jalr x0,0(x1) +80004780: 10a5a073 .word 0x10a5a073 +80004784: 00008067 jalr x0,0(x1) +80004788: 10a5b073 .word 0x10a5b073 +8000478c: 00008067 jalr x0,0(x1) +80004790: 14402573 .word 0x14402573 +80004794: 00008067 jalr x0,0(x1) +80004798: 14459073 .word 0x14459073 +8000479c: 00008067 jalr x0,0(x1) +800047a0: 1445a073 .word 0x1445a073 +800047a4: 00008067 jalr x0,0(x1) +800047a8: 1445b073 .word 0x1445b073 +800047ac: 00008067 jalr x0,0(x1) +800047b0: 14d02573 .word 0x14d02573 +800047b4: 00008067 jalr x0,0(x1) +800047b8: 14d59073 .word 0x14d59073 +800047bc: 00008067 jalr x0,0(x1) +800047c0: 14d5a073 .word 0x14d5a073 +800047c4: 00008067 jalr x0,0(x1) +800047c8: 14d5b073 .word 0x14d5b073 +800047cc: 00008067 jalr x0,0(x1) +800047d0: 18002573 .word 0x18002573 +800047d4: 00008067 jalr x0,0(x1) +800047d8: 18059073 .word 0x18059073 +800047dc: 00008067 jalr x0,0(x1) +800047e0: 1805a073 .word 0x1805a073 +800047e4: 00008067 jalr x0,0(x1) +800047e8: 1805b073 .word 0x1805b073 +800047ec: 00008067 jalr x0,0(x1) +800047f0: 7a002573 .word 0x7a002573 +800047f4: 00008067 jalr x0,0(x1) +800047f8: 7a059073 .word 0x7a059073 +800047fc: 00008067 jalr x0,0(x1) +80004800: 7a05a073 .word 0x7a05a073 +80004804: 00008067 jalr x0,0(x1) +80004808: 7a05b073 .word 0x7a05b073 +8000480c: 00008067 jalr x0,0(x1) +80004810: 7a102573 .word 0x7a102573 +80004814: 00008067 jalr x0,0(x1) +80004818: 7a159073 .word 0x7a159073 +8000481c: 00008067 jalr x0,0(x1) +80004820: 7a15a073 .word 0x7a15a073 +80004824: 00008067 jalr x0,0(x1) +80004828: 7a15b073 .word 0x7a15b073 +8000482c: 00008067 jalr x0,0(x1) +80004830: 7a202573 .word 0x7a202573 +80004834: 00008067 jalr x0,0(x1) +80004838: 7a259073 .word 0x7a259073 +8000483c: 00008067 jalr x0,0(x1) +80004840: 7a25a073 .word 0x7a25a073 +80004844: 00008067 jalr x0,0(x1) +80004848: 7a25b073 .word 0x7a25b073 +8000484c: 00008067 jalr x0,0(x1) +80004850: 7a302573 .word 0x7a302573 +80004854: 00008067 jalr x0,0(x1) +80004858: 7a359073 .word 0x7a359073 +8000485c: 00008067 jalr x0,0(x1) +80004860: 7a35a073 .word 0x7a35a073 +80004864: 00008067 jalr x0,0(x1) +80004868: 7a35b073 .word 0x7a35b073 +8000486c: 00008067 jalr x0,0(x1) +80004870: 7a402573 .word 0x7a402573 +80004874: 00008067 jalr x0,0(x1) +80004878: 7a459073 .word 0x7a459073 +8000487c: 00008067 jalr x0,0(x1) +80004880: 7a45a073 .word 0x7a45a073 +80004884: 00008067 jalr x0,0(x1) +80004888: 7a45b073 .word 0x7a45b073 +8000488c: 00008067 jalr x0,0(x1) +80004890: 7a502573 .word 0x7a502573 +80004894: 00008067 jalr x0,0(x1) +80004898: 7a559073 .word 0x7a559073 +8000489c: 00008067 jalr x0,0(x1) +800048a0: 7a55a073 .word 0x7a55a073 +800048a4: 00008067 jalr x0,0(x1) +800048a8: 7a55b073 .word 0x7a55b073 +800048ac: 00008067 jalr x0,0(x1) +800048b0: 7a802573 .word 0x7a802573 +800048b4: 00008067 jalr x0,0(x1) +800048b8: 7a859073 .word 0x7a859073 +800048bc: 00008067 jalr x0,0(x1) +800048c0: 7a85a073 .word 0x7a85a073 +800048c4: 00008067 jalr x0,0(x1) +800048c8: 7a85b073 .word 0x7a85b073 +800048cc: 00008067 jalr x0,0(x1) +800048d0: 7aa02573 .word 0x7aa02573 +800048d4: 00008067 jalr x0,0(x1) +800048d8: 7aa59073 .word 0x7aa59073 +800048dc: 00008067 jalr x0,0(x1) +800048e0: 7aa5a073 .word 0x7aa5a073 +800048e4: 00008067 jalr x0,0(x1) +800048e8: 7aa5b073 .word 0x7aa5b073 +800048ec: 00008067 jalr x0,0(x1) +800048f0: 5a802573 .word 0x5a802573 +800048f4: 00008067 jalr x0,0(x1) +800048f8: 5a859073 .word 0x5a859073 +800048fc: 00008067 jalr x0,0(x1) +80004900: 5a85a073 .word 0x5a85a073 +80004904: 00008067 jalr x0,0(x1) +80004908: 5a85b073 .word 0x5a85b073 +8000490c: 00008067 jalr x0,0(x1) +80004910: 6a802573 .word 0x6a802573 +80004914: 00008067 jalr x0,0(x1) +80004918: 6a859073 .word 0x6a859073 +8000491c: 00008067 jalr x0,0(x1) +80004920: 6a85a073 .word 0x6a85a073 +80004924: 00008067 jalr x0,0(x1) +80004928: 6a85b073 .word 0x6a85b073 +8000492c: 00008067 jalr x0,0(x1) +80004930: 0005a503 lw x10,0(x11) +80004934: 00008067 jalr x0,0(x1) +80004938: 0045a503 lw x10,4(x11) +8000493c: 00008067 jalr x0,0(x1) +80004940: 00c5a023 sw x12,0(x11) +80004944: 00008067 jalr x0,0(x1) +80004948: 00c5a223 sw x12,4(x11) +8000494c: 00008067 jalr x0,0(x1) +80004950: 00000000 .word 0x00000000 + +80004954 : +80004954: 01000393 addi x7,x0,16 +80004958: 00075c63 bge x14,x0,80004970 + +8000495c : +8000495c: 00171413 slli x8,x14,0x1 +80004960: ff240413 addi x8,x8,-14 +80004964: 00045663 bge x8,x0,80004970 +80004968: 00c00393 addi x7,x0,12 +8000496c: 0040006f jal x0,80004970 + +80004970 : +80004970: d6810113 addi x2,x2,-664 +80004974: 4b012303 lw x6,1200(x2) +80004978: 007304b3 add x9,x6,x7 +8000497c: 4a912823 sw x9,1200(x2) +80004980: 49012403 lw x8,1168(x2) +80004984: 40830333 sub x6,x6,x8 +80004988: 29810113 addi x2,x2,664 +8000498c: 1f812403 lw x8,504(x2) +80004990: 00830333 add x6,x6,x8 +80004994: 34102473 csrrs x8,mepc,x0 +80004998: 00000013 addi x0,x0,0 +8000499c: 00000013 addi x0,x0,0 +800049a0: 0000b497 auipc x9,0xb +800049a4: 95848493 addi x9,x9,-1704 # 8000f2f8 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 0084a023 sw x8,0(x9) +800049c4: 00e4a423 sw x14,8(x9) +800049c8: 34302473 csrrs x8,mtval,x0 +800049cc: 0084a823 sw x8,16(x9) +800049d0: 30002473 csrrs x8,mstatus,x0 +800049d4: 0084ac23 sw x8,24(x9) +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 0001b417 auipc x8,0x1b +800049e4: 53c40413 addi x8,x8,1340 # 8001ff1c +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 007304b3 add x9,x6,x7 +80004a04: f2946663 bltu x8,x9,80004130 + +80004a08 : +80004a08: 24012403 lw x8,576(x2) +80004a0c: 408787b3 sub x15,x15,x8 +80004a10: 00179493 slli x9,x15,0x1 +80004a14: 009787b3 add x15,x15,x9 +80004a18: 0057d793 srli x15,x15,0x5 +80004a1c: 00679793 slli x15,x15,0x6 +80004a20: 0077e7b3 or x15,x15,x7 +80004a24: 00378793 addi x15,x15,3 +80004a28: 02075a63 bge x14,x0,80004a5c +80004a2c: 00f00413 addi x8,x0,15 +80004a30: 00877433 and x8,x14,x8 +80004a34: 304024f3 csrrs x9,mie,x0 +80004a38: 0084d4b3 srl x9,x9,x8 +80004a3c: 0014f493 andi x9,x9,1 +80004a40: 00b49493 slli x9,x9,0xb +80004a44: 0097e7b3 or x15,x15,x9 +80004a48: 344024f3 csrrs x9,mip,x0 +80004a4c: 0084d4b3 srl x9,x9,x8 +80004a50: 0014f493 andi x9,x9,1 +80004a54: 00c49493 slli x9,x9,0xc +80004a58: 0097e7b3 or x15,x15,x9 +80004a5c: 300023f3 csrrs x7,mstatus,x0 +80004a60: 00f39393 slli x7,x7,0xf +80004a64: 0023d393 srli x7,x7,0x2 +80004a68: 0021a437 lui x8,0x21a +80004a6c: fe540413 addi x8,x8,-27 # 219fe5 +80004a70: fff44413 xori x8,x8,-1 +80004a74: 0083f433 and x8,x7,x8 +80004a78: 0087e433 or x8,x15,x8 +80004a7c: 310024f3 csrrs x9,0x310,x0 +80004a80: 1c04f493 andi x9,x9,448 +80004a84: 00849493 slli x9,x9,0x8 +80004a88: 00946433 or x8,x8,x9 +80004a8c: 00032483 lw x9,0(x6) +80004a90: 00848e63 beq x9,x8,80004aac +80004a94: 00040313 addi x6,x8,0 +80004a98: 00048213 addi x4,x9,0 +80004a9c: 48c003ef jal x7,80004f28 +80004aa0: 80004a08 .word 0x80004a08 +80004aa4: 8000fa32 .word 0x8000fa32 +80004aa8: 00000341 .word 0x00000341 + +80004aac : +80004aac: 00070413 addi x8,x14,0 +80004ab0: 00432483 lw x9,4(x6) +80004ab4: 00848e63 beq x9,x8,80004ad0 +80004ab8: 00040313 addi x6,x8,0 +80004abc: 00048213 addi x4,x9,0 +80004ac0: 468003ef jal x7,80004f28 +80004ac4: 80004aac .word 0x80004aac +80004ac8: 8000fb34 .word 0x8000fb34 +80004acc: 00000341 .word 0x00000341 +80004ad0: 10074863 blt x14,x0,80004be0 + +80004ad4 : +80004ad4: 34102473 csrrs x8,mepc,x0 +80004ad8: 00010493 addi x9,x2,0 +80004adc: 0040006f jal x0,80004ae0 + +80004ae0 : +80004ae0: 08000393 addi x7,x0,128 +80004ae4: 04740863 beq x8,x7,80004b34 +80004ae8: 00238393 addi x7,x7,2 +80004aec: 04740463 beq x8,x7,80004b34 +80004af0: 04040263 beq x8,x0,80004b34 +80004af4: 2084a383 lw x7,520(x9) +80004af8: 2104a783 lw x15,528(x9) +80004afc: 007787b3 add x15,x15,x7 +80004b00: 00f47463 bgeu x8,x15,80004b08 +80004b04: 02747663 bgeu x8,x7,80004b30 + +80004b08 : +80004b08: 1d84a383 lw x7,472(x9) +80004b0c: 1e04a783 lw x15,480(x9) +80004b10: 007787b3 add x15,x15,x7 +80004b14: 00f47463 bgeu x8,x15,80004b1c +80004b18: 00747c63 bgeu x8,x7,80004b30 + +80004b1c : +80004b1c: 1e84a383 lw x7,488(x9) +80004b20: 1f04a783 lw x15,496(x9) +80004b24: 007787b3 add x15,x15,x7 +80004b28: e2f47e63 bgeu x8,x15,80004164 +80004b2c: e2746c63 bltu x8,x7,80004164 + +80004b30 : +80004b30: 40740433 sub x8,x8,x7 + +80004b34 : +80004b34: 00832483 lw x9,8(x6) +80004b38: 00848e63 beq x9,x8,80004b54 +80004b3c: 00040313 addi x6,x8,0 +80004b40: 00048213 addi x4,x9,0 +80004b44: 3e4003ef jal x7,80004f28 +80004b48: 80004b34 .word 0x80004b34 +80004b4c: 8000fc2f .word 0x8000fc2f +80004b50: 00000341 .word 0x00000341 + +80004b54 : +80004b54: 34102473 csrrs x8,mepc,x0 +80004b58: 342023f3 csrrs x7,mcause,x0 +80004b5c: 00c00793 addi x15,x0,12 +80004b60: 00f38a63 beq x7,x15,80004b74 +80004b64: 00100793 addi x15,x0,1 +80004b68: 00f38663 beq x7,x15,80004b74 +80004b6c: 01400793 addi x15,x0,20 +80004b70: 00f39663 bne x7,x15,80004b7c +80004b74: 34109073 csrrw x0,mepc,x1 +80004b78: 0100006f jal x0,80004b88 + +80004b7c : +80004b7c: 00400393 addi x7,x0,4 +80004b80: 00740433 add x8,x8,x7 +80004b84: 34141073 csrrw x0,mepc,x8 + +80004b88 : +80004b88: 34302473 csrrs x8,mtval,x0 + +80004b8c : +80004b8c: 00c32483 lw x9,12(x6) +80004b90: 00848e63 beq x9,x8,80004bac +80004b94: 00040313 addi x6,x8,0 +80004b98: 00048213 addi x4,x9,0 +80004b9c: 38c003ef jal x7,80004f28 +80004ba0: 80004b8c .word 0x80004b8c +80004ba4: 8000fd22 .word 0x8000fd22 +80004ba8: 00000341 .word 0x00000341 + +80004bac : +80004bac: 30102473 csrrs x8,misa,x0 +80004bb0: 01841413 slli x8,x8,0x18 +80004bb4: 00045263 bge x8,x0,80004bb8 + +80004bb8 : +80004bb8: 10000393 addi x7,x0,256 +80004bbc: 05c0006f jal x0,80004c18 + +80004bc0 : +80004bc0: 25c12303 lw x6,604(x2) +80004bc4: 26012383 lw x7,608(x2) +80004bc8: 26412403 lw x8,612(x2) +80004bcc: 26812483 lw x9,616(x2) +80004bd0: 26c12703 lw x14,620(x2) +80004bd4: 27012783 lw x15,624(x2) +80004bd8: 27412103 lw x2,628(x2) +80004bdc: 30200073 mret + +80004be0 : +80004be0: 00100413 addi x8,x0,1 +80004be4: 01f77393 andi x7,x14,31 +80004be8: 00741433 sll x8,x8,x7 +80004bec: 304434f3 csrrc x9,mie,x8 +80004bf0: 34443473 csrrc x8,mip,x8 + +80004bf4 : +80004bf4: 00832483 lw x9,8(x6) +80004bf8: 00848e63 beq x9,x8,80004c14 +80004bfc: 00040313 addi x6,x8,0 +80004c00: 00048213 addi x4,x9,0 +80004c04: 324003ef jal x7,80004f28 +80004c08: 80004bf4 .word 0x80004bf4 +80004c0c: 8000fe95 .word 0x8000fe95 +80004c10: 00000341 .word 0x00000341 +80004c14: 00000393 addi x7,x0,0 + +80004c18 : +80004c18: 00000417 auipc x8,0x0 +80004c1c: 03c40413 addi x8,x8,60 # 80004c54 +80004c20: 00740433 add x8,x8,x7 +80004c24: 00371393 slli x7,x14,0x3 +80004c28: 00740433 add x8,x8,x7 +80004c2c: ff847413 andi x8,x8,-8 +80004c30: 00042403 lw x8,0(x8) + +80004c34 : +80004c34: 00040a63 beq x8,x0,80004c48 +80004c38: 01f41393 slli x7,x8,0x1f +80004c3c: 0003d863 bge x7,x0,80004c4c +80004c40: 00145413 srli x8,x8,0x1 +80004c44: f6870ee3 beq x14,x8,80004bc0 +80004c48: d1cff06f jal x0,80004164 + +80004c4c : +80004c4c: 00040067 jalr x0,0(x8) + +80004c50 : + ... +80004c58: 00000001 .word 0x00000001 +80004c5c: 00000000 .word 0x00000000 +80004c60: 00000001 .word 0x00000001 +80004c64: 00000000 .word 0x00000000 +80004c68: 80021000 .word 0x80021000 + ... +80004c78: 00000001 .word 0x00000001 +80004c7c: 00000000 .word 0x00000000 +80004c80: 00000001 .word 0x00000001 +80004c84: 00000000 .word 0x00000000 +80004c88: 80021014 .word 0x80021014 + ... +80004c98: 00000001 .word 0x00000001 +80004c9c: 00000000 .word 0x00000000 +80004ca0: 00000001 .word 0x00000001 +80004ca4: 00000000 .word 0x00000000 +80004ca8: 80021030 .word 0x80021030 +80004cac: 00000000 .word 0x00000000 +80004cb0: 00000001 .word 0x00000001 +80004cb4: 00000000 .word 0x00000000 +80004cb8: 00000001 .word 0x00000001 +80004cbc: 00000000 .word 0x00000000 +80004cc0: 00000001 .word 0x00000001 +80004cc4: 00000000 .word 0x00000000 +80004cc8: 00000001 .word 0x00000001 +80004ccc: 00000000 .word 0x00000000 +80004cd0: 00000001 .word 0x00000001 +80004cd4: 00000000 .word 0x00000000 +80004cd8: 00000001 .word 0x00000001 +80004cdc: 00000000 .word 0x00000000 +80004ce0: 00000001 .word 0x00000001 +80004ce4: 00000000 .word 0x00000000 +80004ce8: 00000001 .word 0x00000001 +80004cec: 00000000 .word 0x00000000 +80004cf0: 00000001 .word 0x00000001 +80004cf4: 00000000 .word 0x00000000 +80004cf8: 00000001 .word 0x00000001 +80004cfc: 00000000 .word 0x00000000 +80004d00: 00000001 .word 0x00000001 +80004d04: 00000000 .word 0x00000000 +80004d08: 00000001 .word 0x00000001 + ... + +80004d50 : +80004d50: 00000001 .word 0x00000001 +80004d54: 00000000 .word 0x00000000 +80004d58: 00000003 .word 0x00000003 +80004d5c: 00000000 .word 0x00000000 +80004d60: 00000005 .word 0x00000005 +80004d64: 00000000 .word 0x00000000 +80004d68: 00000007 .word 0x00000007 +80004d6c: 00000000 .word 0x00000000 +80004d70: 00000009 .word 0x00000009 +80004d74: 00000000 .word 0x00000000 +80004d78: 0000000b .word 0x0000000b +80004d7c: 00000000 .word 0x00000000 +80004d80: 0000000d .word 0x0000000d +80004d84: 00000000 .word 0x00000000 +80004d88: 0000000f .word 0x0000000f +80004d8c: 00000000 .word 0x00000000 +80004d90: 00000011 .word 0x00000011 +80004d94: 00000000 .word 0x00000000 +80004d98: 00000013 .word 0x00000013 +80004d9c: 00000000 .word 0x00000000 +80004da0: 00000015 .word 0x00000015 +80004da4: 00000000 .word 0x00000000 +80004da8: 00000017 .word 0x00000017 +80004dac: 00000000 .word 0x00000000 +80004db0: 00000019 .word 0x00000019 +80004db4: 00000000 .word 0x00000000 +80004db8: 0000001b .word 0x0000001b +80004dbc: 00000000 .word 0x00000000 +80004dc0: 0000001d .word 0x0000001d +80004dc4: 00000000 .word 0x00000000 +80004dc8: 0000001f .word 0x0000001f +80004dcc: 00000000 .word 0x00000000 +80004dd0: 00000021 .word 0x00000021 +80004dd4: 00000000 .word 0x00000000 +80004dd8: 00000023 .word 0x00000023 +80004ddc: 00000000 .word 0x00000000 +80004de0: 00000025 .word 0x00000025 +80004de4: 00000000 .word 0x00000000 +80004de8: 00000027 .word 0x00000027 +80004dec: 00000000 .word 0x00000000 +80004df0: 00000029 .word 0x00000029 +80004df4: 00000000 .word 0x00000000 +80004df8: 0000002b .word 0x0000002b +80004dfc: 00000000 .word 0x00000000 +80004e00: 0000002d .word 0x0000002d +80004e04: 00000000 .word 0x00000000 +80004e08: 0000002f .word 0x0000002f + ... + +80004e50 : +80004e50: 300023f3 csrrs x7,mstatus,x0 +80004e54: 00b3d493 srli x9,x7,0xb +80004e58: 0034f493 andi x9,x9,3 +80004e5c: ffd48413 addi x8,x9,-3 +80004e60: 341023f3 csrrs x7,mepc,x0 +80004e64: 00000493 addi x9,x0,0 +80004e68: 02040c63 beq x8,x0,80004ea0 +80004e6c: 29810113 addi x2,x2,664 +80004e70: 310023f3 csrrs x7,0x310,x0 +80004e74: 01839393 slli x7,x7,0x18 +80004e78: 0003da63 bge x7,x0,80004e8c + +80004e7c : +80004e7c: 29810113 addi x2,x2,664 +80004e80: 47012783 lw x15,1136(x2) +80004e84: d6810113 addi x2,x2,-664 +80004e88: 0080006f jal x0,80004e90 + +80004e8c : +80004e8c: f4012783 lw x15,-192(x2) +80004e90: 341023f3 csrrs x7,mepc,x0 +80004e94: 40f383b3 sub x7,x7,x15 +80004e98: d6810113 addi x2,x2,-664 +80004e9c: 1d812483 lw x9,472(x2) + +80004ea0 : +80004ea0: 007483b3 add x7,x9,x7 +80004ea4: 25c12303 lw x6,604(x2) +80004ea8: 26412403 lw x8,612(x2) +80004eac: 26812483 lw x9,616(x2) +80004eb0: 26c12703 lw x14,620(x2) +80004eb4: 27012783 lw x15,624(x2) +80004eb8: 27412103 lw x2,628(x2) +80004ebc: 00438067 jalr x0,4(x7) + +80004ec0 : +80004ec0: 0000a217 auipc x4,0xa +80004ec4: 2f020213 addi x4,x4,752 # 8000f1b0 +80004ec8: 02522423 sw x5,40(x4) # 28 +80004ecc: 00122423 sw x1,8(x4) # 8 +80004ed0: 00022023 sw x0,0(x4) # 0 +80004ed4: 0880006f jal x0,80004f5c + +80004ed8 : +80004ed8: 0000a397 auipc x7,0xa +80004edc: 2d838393 addi x7,x7,728 # 8000f1b0 +80004ee0: 0483a023 sw x8,64(x7) +80004ee4: 0243a023 sw x4,32(x7) +80004ee8: 0253a423 sw x5,40(x7) +80004eec: 0013a423 sw x1,8(x7) +80004ef0: 0003a023 sw x0,0(x7) +80004ef4: 00038213 addi x4,x7,0 +80004ef8: 00040293 addi x5,x8,0 +80004efc: 0600006f jal x0,80004f5c + +80004f00 : +80004f00: 0000a697 auipc x13,0xa +80004f04: 2b068693 addi x13,x13,688 # 8000f1b0 +80004f08: 06e6a823 sw x14,112(x13) +80004f0c: 0246a023 sw x4,32(x13) +80004f10: 0256a423 sw x5,40(x13) +80004f14: 0016a423 sw x1,8(x13) +80004f18: 0006a023 sw x0,0(x13) +80004f1c: 00068213 addi x4,x13,0 +80004f20: 00070293 addi x5,x14,0 +80004f24: 0380006f jal x0,80004f5c + +80004f28 : +80004f28: 0000a497 auipc x9,0xa +80004f2c: 28848493 addi x9,x9,648 # 8000f1b0 +80004f30: 0674a423 sw x7,104(x9) +80004f34: 0244a023 sw x4,32(x9) +80004f38: 0254a423 sw x5,40(x9) +80004f3c: 0014a423 sw x1,8(x9) +80004f40: 00300093 addi x1,x0,3 +80004f44: 0014a023 sw x1,0(x9) +80004f48: 1064a823 sw x6,272(x9) +80004f4c: 1044ac23 sw x4,280(x9) +80004f50: 00048213 addi x4,x9,0 +80004f54: 00038293 addi x5,x7,0 +80004f58: 0040006f jal x0,80004f5c + +80004f5c : +80004f5c: 00222823 sw x2,16(x4) # 10 +80004f60: 00322c23 sw x3,24(x4) # 18 +80004f64: 02622823 sw x6,48(x4) # 30 +80004f68: 02722c23 sw x7,56(x4) # 38 +80004f6c: 04822023 sw x8,64(x4) # 40 +80004f70: 04922423 sw x9,72(x4) # 48 +80004f74: 04a22823 sw x10,80(x4) # 50 +80004f78: 04b22c23 sw x11,88(x4) # 58 +80004f7c: 06c22023 sw x12,96(x4) # 60 +80004f80: 06d22423 sw x13,104(x4) # 68 +80004f84: 06e22823 sw x14,112(x4) # 70 +80004f88: 06f22c23 sw x15,120(x4) # 78 +80004f8c: 09022023 sw x16,128(x4) # 80 +80004f90: 09122423 sw x17,136(x4) # 88 +80004f94: 09222823 sw x18,144(x4) # 90 +80004f98: 09322c23 sw x19,152(x4) # 98 +80004f9c: 0b422023 sw x20,160(x4) # a0 +80004fa0: 0b522423 sw x21,168(x4) # a8 +80004fa4: 0b622823 sw x22,176(x4) # b0 +80004fa8: 0b722c23 sw x23,184(x4) # b8 +80004fac: 0d822023 sw x24,192(x4) # c0 +80004fb0: 0d922423 sw x25,200(x4) # c8 +80004fb4: 0da22823 sw x26,208(x4) # d0 +80004fb8: 0db22c23 sw x27,216(x4) # d8 +80004fbc: 0fc22023 sw x28,224(x4) # e0 +80004fc0: 0fd22423 sw x29,232(x4) # e8 +80004fc4: 0fe22823 sw x30,240(x4) # f0 +80004fc8: 0ff22c23 sw x31,248(x4) # f8 + +80004fcc : +80004fcc: 0000a497 auipc x9,0xa +80004fd0: 1e44a483 lw x9,484(x9) # 8000f1b0 +80004fd4: 00300513 addi x10,x0,3 +80004fd8: 18a48a63 beq x9,x10,8000516c + +80004fdc : +80004fdc: ffa2d303 lhu x6,-6(x5) +80004fe0: ff82d383 lhu x7,-8(x5) +80004fe4: 01031313 slli x6,x6,0x10 +80004fe8: 00736333 or x6,x6,x7 +80004fec: 00f35393 srli x7,x6,0xf +80004ff0: 01f3f393 andi x7,x7,31 +80004ff4: 01435413 srli x8,x6,0x14 +80004ff8: 01f47413 andi x8,x8,31 +80004ffc: 10822223 sw x8,260(x4) # 104 +80005000: 00341313 slli x6,x8,0x3 +80005004: 00620333 add x6,x4,x6 +80005008: 00032303 lw x6,0(x6) +8000500c: 10622823 sw x6,272(x4) # 110 +80005010: ff62d303 lhu x6,-10(x5) +80005014: ff42d383 lhu x7,-12(x5) +80005018: 01031313 slli x6,x6,0x10 +8000501c: 00736333 or x6,x6,x7 +80005020: 00030513 addi x10,x6,0 +80005024: 07f37413 andi x8,x6,127 +80005028: 00300493 addi x9,x0,3 +8000502c: 0c941463 bne x8,x9,800050f4 +80005030: 00c35413 srli x8,x6,0xc +80005034: 00747413 andi x8,x8,7 +80005038: 00200493 addi x9,x0,2 +8000503c: 0a941c63 bne x8,x9,800050f4 +80005040: 41435393 srai x7,x6,0x14 +80005044: 00f35313 srli x6,x6,0xf +80005048: 01f37313 andi x6,x6,31 +8000504c: 00331313 slli x6,x6,0x3 +80005050: 00620333 add x6,x4,x6 +80005054: 00032303 lw x6,0(x6) +80005058: 00730333 add x6,x6,x7 +8000505c: 00337413 andi x8,x6,3 +80005060: 0c041663 bne x8,x0,8000512c +80005064: 00000013 addi x0,x0,0 +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 0000c417 auipc x8,0xc +80005084: e7040413 addi x8,x8,-400 # 80010ef0 +80005088: 00000013 addi x0,x0,0 +8000508c: 00000013 addi x0,x0,0 +80005090: 00000013 addi x0,x0,0 +80005094: 00000013 addi x0,x0,0 +80005098: 00000013 addi x0,x0,0 +8000509c: 00000013 addi x0,x0,0 +800050a0: 08836663 bltu x6,x8,8000512c +800050a4: 00000013 addi x0,x0,0 +800050a8: 00000013 addi x0,x0,0 +800050ac: 00000013 addi x0,x0,0 +800050b0: 00000013 addi x0,x0,0 +800050b4: 00000013 addi x0,x0,0 +800050b8: 00000013 addi x0,x0,0 +800050bc: 00000013 addi x0,x0,0 +800050c0: 0001b417 auipc x8,0x1b +800050c4: e6040413 addi x8,x8,-416 # 8001ff20 +800050c8: 00000013 addi x0,x0,0 +800050cc: 00000013 addi x0,x0,0 +800050d0: 00000013 addi x0,x0,0 +800050d4: 00000013 addi x0,x0,0 +800050d8: 00000013 addi x0,x0,0 +800050dc: 00000013 addi x0,x0,0 +800050e0: ffc40413 addi x8,x8,-4 +800050e4: 04646463 bltu x8,x6,8000512c +800050e8: 00032303 lw x6,0(x6) +800050ec: 10622c23 sw x6,280(x4) # 118 +800050f0: 3700006f jal x0,80005460 + +800050f4 : +800050f4: 00100413 addi x8,x0,1 +800050f8: 00000013 addi x0,x0,0 +800050fc: 00000013 addi x0,x0,0 +80005100: 0000a497 auipc x9,0xa +80005104: 1d848493 addi x9,x9,472 # 8000f2d8 +80005108: 00000013 addi x0,x0,0 +8000510c: 00000013 addi x0,x0,0 +80005110: 00000013 addi x0,x0,0 +80005114: 00000013 addi x0,x0,0 +80005118: 00000013 addi x0,x0,0 +8000511c: 00000013 addi x0,x0,0 +80005120: 0084a023 sw x8,0(x9) +80005124: 10a22c23 sw x10,280(x4) # 118 +80005128: 3380006f jal x0,80005460 + +8000512c : +8000512c: 00200413 addi x8,x0,2 +80005130: 00000013 addi x0,x0,0 +80005134: 00000013 addi x0,x0,0 +80005138: 00000013 addi x0,x0,0 +8000513c: 00000013 addi x0,x0,0 +80005140: 0000a497 auipc x9,0xa +80005144: 19848493 addi x9,x9,408 # 8000f2d8 +80005148: 00000013 addi x0,x0,0 +8000514c: 00000013 addi x0,x0,0 +80005150: 00000013 addi x0,x0,0 +80005154: 00000013 addi x0,x0,0 +80005158: 00000013 addi x0,x0,0 +8000515c: 00000013 addi x0,x0,0 +80005160: 0084a023 sw x8,0(x9) +80005164: 10622c23 sw x6,280(x4) # 118 +80005168: 2f80006f jal x0,80005460 + +8000516c : +8000516c: 0042a303 lw x6,4(x5) +80005170: 0000a817 auipc x16,0xa +80005174: 17880813 addi x16,x16,376 # 8000f2e8 +80005178: 00682023 sw x6,0(x16) +8000517c: 0002a303 lw x6,0(x5) +80005180: 10622423 sw x6,264(x4) # 108 +80005184: 0000a817 auipc x16,0xa +80005188: 16480813 addi x16,x16,356 # 8000f2e8 +8000518c: 00082303 lw x6,0(x16) +80005190: 0000b397 auipc x7,0xb +80005194: 88b38393 addi x7,x7,-1909 # 8000fa1b +80005198: 28730463 beq x6,x7,80005420 +8000519c: 00000413 addi x8,x0,0 +800051a0: 0000a817 auipc x16,0xa +800051a4: 14080813 addi x16,x16,320 # 8000f2e0 +800051a8: 00882023 sw x8,0(x16) +800051ac: 0000b397 auipc x7,0xb +800051b0: 88638393 addi x7,x7,-1914 # 8000fa32 +800051b4: 00731863 bne x6,x7,800051c4 +800051b8: 00100413 addi x8,x0,1 +800051bc: 00000493 addi x9,x0,0 +800051c0: 2740006f jal x0,80005434 +800051c4: 0000b397 auipc x7,0xb +800051c8: 97038393 addi x7,x7,-1680 # 8000fb34 +800051cc: 00731863 bne x6,x7,800051dc +800051d0: 00200413 addi x8,x0,2 +800051d4: 00000493 addi x9,x0,0 +800051d8: 25c0006f jal x0,80005434 +800051dc: 0000b397 auipc x7,0xb +800051e0: a5338393 addi x7,x7,-1453 # 8000fc2f +800051e4: 00731863 bne x6,x7,800051f4 +800051e8: 00300413 addi x8,x0,3 +800051ec: 00000493 addi x9,x0,0 +800051f0: 2440006f jal x0,80005434 +800051f4: 0000b397 auipc x7,0xb +800051f8: b2e38393 addi x7,x7,-1234 # 8000fd22 +800051fc: 00731863 bne x6,x7,8000520c +80005200: 00400413 addi x8,x0,4 +80005204: 00000493 addi x9,x0,0 +80005208: 22c0006f jal x0,80005434 +8000520c: 0000b397 auipc x7,0xb +80005210: c8938393 addi x7,x7,-887 # 8000fe95 +80005214: 00731863 bne x6,x7,80005224 +80005218: 00500413 addi x8,x0,5 +8000521c: 00000493 addi x9,x0,0 +80005220: 2140006f jal x0,80005434 +80005224: 0000b397 auipc x7,0xb +80005228: bf538393 addi x7,x7,-1035 # 8000fe19 +8000522c: 00731863 bne x6,x7,8000523c +80005230: 00600413 addi x8,x0,6 +80005234: 00000493 addi x9,x0,0 +80005238: 1fc0006f jal x0,80005434 +8000523c: 0000b397 auipc x7,0xb +80005240: c1b38393 addi x7,x7,-997 # 8000fe57 +80005244: 00731863 bne x6,x7,80005254 +80005248: 00700413 addi x8,x0,7 +8000524c: 00000493 addi x9,x0,0 +80005250: 1e40006f jal x0,80005434 +80005254: 0000b397 auipc x7,0xb +80005258: 81e38393 addi x7,x7,-2018 # 8000fa72 +8000525c: 00731863 bne x6,x7,8000526c +80005260: 00100413 addi x8,x0,1 +80005264: 00100493 addi x9,x0,1 +80005268: 1cc0006f jal x0,80005434 +8000526c: 0000b397 auipc x7,0xb +80005270: 90638393 addi x7,x7,-1786 # 8000fb72 +80005274: 00731863 bne x6,x7,80005284 +80005278: 00200413 addi x8,x0,2 +8000527c: 00100493 addi x9,x0,1 +80005280: 1b40006f jal x0,80005434 +80005284: 0000b397 auipc x7,0xb +80005288: 9e738393 addi x7,x7,-1561 # 8000fc6b +8000528c: 00731863 bne x6,x7,8000529c +80005290: 00300413 addi x8,x0,3 +80005294: 00100493 addi x9,x0,1 +80005298: 19c0006f jal x0,80005434 +8000529c: 0000b397 auipc x7,0xb +800052a0: ac338393 addi x7,x7,-1341 # 8000fd5f +800052a4: 00731863 bne x6,x7,800052b4 +800052a8: 00400413 addi x8,x0,4 +800052ac: 00100493 addi x9,x0,1 +800052b0: 1840006f jal x0,80005434 +800052b4: 0000b397 auipc x7,0xb +800052b8: c1c38393 addi x7,x7,-996 # 8000fed0 +800052bc: 00731863 bne x6,x7,800052cc +800052c0: 00500413 addi x8,x0,5 +800052c4: 00100493 addi x9,x0,1 +800052c8: 16c0006f jal x0,80005434 +800052cc: 0000a397 auipc x7,0xa +800052d0: 7e638393 addi x7,x7,2022 # 8000fab2 +800052d4: 00731863 bne x6,x7,800052e4 +800052d8: 00100413 addi x8,x0,1 +800052dc: 00200493 addi x9,x0,2 +800052e0: 1540006f jal x0,80005434 +800052e4: 0000b397 auipc x7,0xb +800052e8: 8cc38393 addi x7,x7,-1844 # 8000fbb0 +800052ec: 00731863 bne x6,x7,800052fc +800052f0: 00200413 addi x8,x0,2 +800052f4: 00200493 addi x9,x0,2 +800052f8: 13c0006f jal x0,80005434 +800052fc: 0000b397 auipc x7,0xb +80005300: 9ab38393 addi x7,x7,-1621 # 8000fca7 +80005304: 00731863 bne x6,x7,80005314 +80005308: 00300413 addi x8,x0,3 +8000530c: 00200493 addi x9,x0,2 +80005310: 1240006f jal x0,80005434 +80005314: 0000b397 auipc x7,0xb +80005318: a8838393 addi x7,x7,-1400 # 8000fd9c +8000531c: 00731863 bne x6,x7,8000532c +80005320: 00400413 addi x8,x0,4 +80005324: 00200493 addi x9,x0,2 +80005328: 10c0006f jal x0,80005434 +8000532c: 0000b397 auipc x7,0xb +80005330: bdf38393 addi x7,x7,-1057 # 8000ff0b +80005334: 00731863 bne x6,x7,80005344 +80005338: 00500413 addi x8,x0,5 +8000533c: 00200493 addi x9,x0,2 +80005340: 0f40006f jal x0,80005434 +80005344: 0000a397 auipc x7,0xa +80005348: 7af38393 addi x7,x7,1967 # 8000faf3 +8000534c: 00731863 bne x6,x7,8000535c +80005350: 00100413 addi x8,x0,1 +80005354: 00300493 addi x9,x0,3 +80005358: 0dc0006f jal x0,80005434 +8000535c: 0000b397 auipc x7,0xb +80005360: 89338393 addi x7,x7,-1901 # 8000fbef +80005364: 00731863 bne x6,x7,80005374 +80005368: 00200413 addi x8,x0,2 +8000536c: 00300493 addi x9,x0,3 +80005370: 0c40006f jal x0,80005434 +80005374: 0000b397 auipc x7,0xb +80005378: 97038393 addi x7,x7,-1680 # 8000fce4 +8000537c: 00731863 bne x6,x7,8000538c +80005380: 00300413 addi x8,x0,3 +80005384: 00300493 addi x9,x0,3 +80005388: 0ac0006f jal x0,80005434 +8000538c: 0000b397 auipc x7,0xb +80005390: a4e38393 addi x7,x7,-1458 # 8000fdda +80005394: 00731863 bne x6,x7,800053a4 +80005398: 00400413 addi x8,x0,4 +8000539c: 00300493 addi x9,x0,3 +800053a0: 0940006f jal x0,80005434 +800053a4: 0000b397 auipc x7,0xb +800053a8: ba338393 addi x7,x7,-1117 # 8000ff47 +800053ac: 00731863 bne x6,x7,800053bc +800053b0: 00500413 addi x8,x0,5 +800053b4: 00300493 addi x9,x0,3 +800053b8: 07c0006f jal x0,80005434 +800053bc: 0000b397 auipc x7,0xb +800053c0: bc838393 addi x7,x7,-1080 # 8000ff84 +800053c4: 00731863 bne x6,x7,800053d4 +800053c8: 00800413 addi x8,x0,8 +800053cc: 00000493 addi x9,x0,0 +800053d0: 0640006f jal x0,80005434 +800053d4: 0000b397 auipc x7,0xb +800053d8: bff38393 addi x7,x7,-1025 # 8000ffd3 +800053dc: 00731863 bne x6,x7,800053ec +800053e0: 00800413 addi x8,x0,8 +800053e4: 00000493 addi x9,x0,0 +800053e8: 04c0006f jal x0,80005434 +800053ec: 0000b397 auipc x7,0xb +800053f0: ce238393 addi x7,x7,-798 # 800100ce +800053f4: 00731863 bne x6,x7,80005404 +800053f8: 00800413 addi x8,x0,8 +800053fc: 00100493 addi x9,x0,1 +80005400: 0340006f jal x0,80005434 +80005404: 0000b397 auipc x7,0xb +80005408: dc638393 addi x7,x7,-570 # 800101ca +8000540c: 00731863 bne x6,x7,8000541c +80005410: 00800413 addi x8,x0,8 +80005414: 00200493 addi x9,x0,2 +80005418: 01c0006f jal x0,80005434 +8000541c: 0340006f jal x0,80005450 + +80005420 : +80005420: 00900413 addi x8,x0,9 +80005424: 0000a817 auipc x16,0xa +80005428: ebc80813 addi x16,x16,-324 # 8000f2e0 +8000542c: 00882023 sw x8,0(x16) +80005430: 0300006f jal x0,80005460 + +80005434 : +80005434: 0000a817 auipc x16,0xa +80005438: eac80813 addi x16,x16,-340 # 8000f2e0 +8000543c: 00882023 sw x8,0(x16) +80005440: 0000a817 auipc x16,0xa +80005444: ea480813 addi x16,x16,-348 # 8000f2e4 +80005448: 00982023 sw x9,0(x16) +8000544c: 0140006f jal x0,80005460 + +80005450 : +80005450: 0000a817 auipc x16,0xa +80005454: e9080813 addi x16,x16,-368 # 8000f2e0 +80005458: 00082023 sw x0,0(x16) +8000545c: 0040006f jal x0,80005460 + +80005460 : +80005460: 0002a303 lw x6,0(x5) +80005464: 10622423 sw x6,264(x4) # 108 +80005468: 00035383 lhu x7,0(x6) +8000546c: 0033f413 andi x8,x7,3 +80005470: 00300493 addi x9,x0,3 +80005474: 00941863 bne x8,x9,80005484 +80005478: 00235403 lhu x8,2(x6) +8000547c: 01041413 slli x8,x8,0x10 +80005480: 0083e3b3 or x7,x7,x8 +80005484: 10722023 sw x7,256(x4) # 100 +80005488: 0042a303 lw x6,4(x5) +8000548c: 12622023 sw x6,288(x4) # 120 + +80005490 : +80005490: 00000013 addi x0,x0,0 +80005494: 00000013 addi x0,x0,0 +80005498: 00000013 addi x0,x0,0 +8000549c: 00000013 addi x0,x0,0 +800054a0: 0000a517 auipc x10,0xa +800054a4: 38e50513 addi x10,x10,910 # 8000f82e +800054a8: 00000013 addi x0,x0,0 +800054ac: 00000013 addi x0,x0,0 +800054b0: 00000013 addi x0,x0,0 +800054b4: 00000013 addi x0,x0,0 +800054b8: 00000013 addi x0,x0,0 +800054bc: 00000013 addi x0,x0,0 +800054c0: 0001c097 auipc x1,0x1c +800054c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800054c8: 00000013 addi x0,x0,0 +800054cc: 00000013 addi x0,x0,0 +800054d0: 00000013 addi x0,x0,0 +800054d4: 00000013 addi x0,x0,0 +800054d8: 00000013 addi x0,x0,0 +800054dc: 00000013 addi x0,x0,0 +800054e0: 0000a517 auipc x10,0xa +800054e4: 38750513 addi x10,x10,903 # 8000f867 +800054e8: 00000013 addi x0,x0,0 +800054ec: 00000013 addi x0,x0,0 +800054f0: 00000013 addi x0,x0,0 +800054f4: 00000013 addi x0,x0,0 +800054f8: 00000013 addi x0,x0,0 +800054fc: 00000013 addi x0,x0,0 +80005500: 0001c097 auipc x1,0x1c +80005504: 064080e7 jalr x1,100(x1) # 80021564 + +80005508 : +80005508: 00000013 addi x0,x0,0 +8000550c: 00000013 addi x0,x0,0 +80005510: 00000013 addi x0,x0,0 +80005514: 00000013 addi x0,x0,0 +80005518: 00000013 addi x0,x0,0 +8000551c: 00000013 addi x0,x0,0 +80005520: 0000a517 auipc x10,0xa +80005524: 3fe50513 addi x10,x10,1022 # 8000f91e +80005528: 00000013 addi x0,x0,0 +8000552c: 00000013 addi x0,x0,0 +80005530: 00000013 addi x0,x0,0 +80005534: 00000013 addi x0,x0,0 +80005538: 00000013 addi x0,x0,0 +8000553c: 00000013 addi x0,x0,0 +80005540: 0001c097 auipc x1,0x1c +80005544: 024080e7 jalr x1,36(x1) # 80021564 + +80005548 : +80005548: 0000a517 auipc x10,0xa +8000554c: d8852503 lw x10,-632(x10) # 8000f2d0 +80005550: 0001c097 auipc x1,0x1c +80005554: 014080e7 jalr x1,20(x1) # 80021564 + +80005558 : +80005558: 00000013 addi x0,x0,0 +8000555c: 00000013 addi x0,x0,0 +80005560: 0000a517 auipc x10,0xa +80005564: 3d050513 addi x10,x10,976 # 8000f930 +80005568: 00000013 addi x0,x0,0 +8000556c: 00000013 addi x0,x0,0 +80005570: 00000013 addi x0,x0,0 +80005574: 00000013 addi x0,x0,0 +80005578: 00000013 addi x0,x0,0 +8000557c: 00000013 addi x0,x0,0 +80005580: 0001c097 auipc x1,0x1c +80005584: fe4080e7 jalr x1,-28(x1) # 80021564 +80005588: 0000a517 auipc x10,0xa +8000558c: c2852503 lw x10,-984(x10) # 8000f1b0 +80005590: 00300593 addi x11,x0,3 +80005594: 52b50c63 beq x10,x11,80005acc +80005598: 00000013 addi x0,x0,0 +8000559c: 00000013 addi x0,x0,0 +800055a0: 0000a517 auipc x10,0xa +800055a4: 39250513 addi x10,x10,914 # 8000f932 +800055a8: 00000013 addi x0,x0,0 +800055ac: 00000013 addi x0,x0,0 +800055b0: 00000013 addi x0,x0,0 +800055b4: 00000013 addi x0,x0,0 +800055b8: 00000013 addi x0,x0,0 +800055bc: 00000013 addi x0,x0,0 +800055c0: 0001c097 auipc x1,0x1c +800055c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800055c8: 0000a517 auipc x10,0xa +800055cc: ce852503 lw x10,-792(x10) # 8000f2b0 +800055d0: 02000593 addi x11,x0,32 +800055d4: 00357613 andi x12,x10,3 +800055d8: 00300693 addi x13,x0,3 +800055dc: 00d60463 beq x12,x13,800055e4 +800055e0: 01000593 addi x11,x0,16 +800055e4: 3f4010ef jal x1,800069d8 +800055e8: 00000013 addi x0,x0,0 +800055ec: 00000013 addi x0,x0,0 +800055f0: 00000013 addi x0,x0,0 +800055f4: 00000013 addi x0,x0,0 +800055f8: 00000013 addi x0,x0,0 +800055fc: 00000013 addi x0,x0,0 +80005600: 0000a517 auipc x10,0xa +80005604: d1850513 addi x10,x10,-744 # 8000f318 +80005608: 00000013 addi x0,x0,0 +8000560c: 00000013 addi x0,x0,0 +80005610: 00000013 addi x0,x0,0 +80005614: 00000013 addi x0,x0,0 +80005618: 00000013 addi x0,x0,0 +8000561c: 00000013 addi x0,x0,0 +80005620: 0001c097 auipc x1,0x1c +80005624: f44080e7 jalr x1,-188(x1) # 80021564 +80005628: 00000013 addi x0,x0,0 +8000562c: 00000013 addi x0,x0,0 +80005630: 00000013 addi x0,x0,0 +80005634: 00000013 addi x0,x0,0 +80005638: 00000013 addi x0,x0,0 +8000563c: 00000013 addi x0,x0,0 +80005640: 0000a517 auipc x10,0xa +80005644: 30650513 addi x10,x10,774 # 8000f946 +80005648: 00000013 addi x0,x0,0 +8000564c: 00000013 addi x0,x0,0 +80005650: 00000013 addi x0,x0,0 +80005654: 00000013 addi x0,x0,0 +80005658: 00000013 addi x0,x0,0 +8000565c: 00000013 addi x0,x0,0 +80005660: 0001c097 auipc x1,0x1c +80005664: f04080e7 jalr x1,-252(x1) # 80021564 +80005668: 0000a517 auipc x10,0xa +8000566c: c5052503 lw x10,-944(x10) # 8000f2b8 +80005670: 02000593 addi x11,x0,32 +80005674: 364010ef jal x1,800069d8 +80005678: 00000013 addi x0,x0,0 +8000567c: 00000013 addi x0,x0,0 +80005680: 0000a517 auipc x10,0xa +80005684: c9850513 addi x10,x10,-872 # 8000f318 +80005688: 00000013 addi x0,x0,0 +8000568c: 00000013 addi x0,x0,0 +80005690: 00000013 addi x0,x0,0 +80005694: 00000013 addi x0,x0,0 +80005698: 00000013 addi x0,x0,0 +8000569c: 00000013 addi x0,x0,0 +800056a0: 0001c097 auipc x1,0x1c +800056a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000b517 auipc x10,0xb +800056c4: cbd50513 addi x10,x10,-835 # 8001037d +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 0001c097 auipc x1,0x1c +800056e4: e84080e7 jalr x1,-380(x1) # 80021564 +800056e8: 0000a517 auipc x10,0xa +800056ec: ac852503 lw x10,-1336(x10) # 8000f1b0 +800056f0: 00050663 beq x10,x0,800056fc +800056f4: 00300593 addi x11,x0,3 +800056f8: 04b51063 bne x10,x11,80005738 +800056fc: 07800593 addi x11,x0,120 +80005700: 0000a617 auipc x12,0xa +80005704: c1860613 addi x12,x12,-1000 # 8000f318 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 00b60023 sb x11,0(x12) +80005724: 00160613 addi x12,x12,1 +80005728: 0000a517 auipc x10,0xa +8000572c: b8c52503 lw x10,-1140(x10) # 8000f2b4 +80005730: 324010ef jal x1,80006a54 +80005734: 1180006f jal x0,8000584c + +80005738 : +80005738: 00100593 addi x11,x0,1 +8000573c: 04b50863 beq x10,x11,8000578c +80005740: 00400593 addi x11,x0,4 +80005744: 08b50a63 beq x10,x11,800057d8 +80005748: 00500593 addi x11,x0,5 +8000574c: 0cb50463 beq x10,x11,80005814 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0000b517 auipc x10,0xb +80005764: d3350513 addi x10,x10,-717 # 80010493 +80005768: 00000013 addi x0,x0,0 +8000576c: 00000013 addi x0,x0,0 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0001c097 auipc x1,0x1c +80005784: de4080e7 jalr x1,-540(x1) # 80021564 +80005788: 1000006f jal x0,80005888 + +8000578c : +8000578c: 06600593 addi x11,x0,102 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0000a617 auipc x12,0xa +800057a4: b7860613 addi x12,x12,-1160 # 8000f318 +800057a8: 00000013 addi x0,x0,0 +800057ac: 00000013 addi x0,x0,0 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 00b60023 sb x11,0(x12) +800057c4: 00160613 addi x12,x12,1 +800057c8: 0000a517 auipc x10,0xa +800057cc: aec52503 lw x10,-1300(x10) # 8000f2b4 +800057d0: 284010ef jal x1,80006a54 +800057d4: 0780006f jal x0,8000584c + +800057d8 : +800057d8: 07600593 addi x11,x0,118 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0000a617 auipc x12,0xa +800057e4: b3860613 addi x12,x12,-1224 # 8000f318 +800057e8: 00000013 addi x0,x0,0 +800057ec: 00000013 addi x0,x0,0 +800057f0: 00000013 addi x0,x0,0 +800057f4: 00000013 addi x0,x0,0 +800057f8: 00000013 addi x0,x0,0 +800057fc: 00000013 addi x0,x0,0 +80005800: 00b60023 sb x11,0(x12) +80005804: 00160613 addi x12,x12,1 +80005808: 0000a517 auipc x10,0xa +8000580c: aac52503 lw x10,-1364(x10) # 8000f2b4 +80005810: 244010ef jal x1,80006a54 + +80005814 : +80005814: 00000013 addi x0,x0,0 +80005818: 00000013 addi x0,x0,0 +8000581c: 00000013 addi x0,x0,0 +80005820: 0000b517 auipc x10,0xb +80005824: b5650513 addi x10,x10,-1194 # 80010376 +80005828: 00000013 addi x0,x0,0 +8000582c: 00000013 addi x0,x0,0 +80005830: 00000013 addi x0,x0,0 +80005834: 00000013 addi x0,x0,0 +80005838: 00000013 addi x0,x0,0 +8000583c: 00000013 addi x0,x0,0 +80005840: 0001c097 auipc x1,0x1c +80005844: d24080e7 jalr x1,-732(x1) # 80021564 +80005848: 0400006f jal x0,80005888 + +8000584c : +8000584c: 00000013 addi x0,x0,0 +80005850: 00000013 addi x0,x0,0 +80005854: 00000013 addi x0,x0,0 +80005858: 00000013 addi x0,x0,0 +8000585c: 00000013 addi x0,x0,0 +80005860: 0000a517 auipc x10,0xa +80005864: ab850513 addi x10,x10,-1352 # 8000f318 +80005868: 00000013 addi x0,x0,0 +8000586c: 00000013 addi x0,x0,0 +80005870: 00000013 addi x0,x0,0 +80005874: 00000013 addi x0,x0,0 +80005878: 00000013 addi x0,x0,0 +8000587c: 00000013 addi x0,x0,0 +80005880: 0001c097 auipc x1,0x1c +80005884: ce4080e7 jalr x1,-796(x1) # 80021564 + +80005888 : +80005888: 00000013 addi x0,x0,0 +8000588c: 00000013 addi x0,x0,0 +80005890: 00000013 addi x0,x0,0 +80005894: 00000013 addi x0,x0,0 +80005898: 00000013 addi x0,x0,0 +8000589c: 00000013 addi x0,x0,0 +800058a0: 0000b517 auipc x10,0xb +800058a4: aee50513 addi x10,x10,-1298 # 8001038e +800058a8: 00000013 addi x0,x0,0 +800058ac: 00000013 addi x0,x0,0 +800058b0: 00000013 addi x0,x0,0 +800058b4: 00000013 addi x0,x0,0 +800058b8: 00000013 addi x0,x0,0 +800058bc: 00000013 addi x0,x0,0 +800058c0: 0001c097 auipc x1,0x1c +800058c4: ca4080e7 jalr x1,-860(x1) # 80021564 +800058c8: 0000a517 auipc x10,0xa +800058cc: 8e852503 lw x10,-1816(x10) # 8000f1b0 +800058d0: 00100593 addi x11,x0,1 +800058d4: 00b51c63 bne x10,x11,800058ec +800058d8: 0000a517 auipc x10,0xa +800058dc: 9e852503 lw x10,-1560(x10) # 8000f2c0 +800058e0: 02000593 addi x11,x0,32 +800058e4: 0f4010ef jal x1,800069d8 +800058e8: 0140006f jal x0,800058fc + +800058ec : +800058ec: 0000a517 auipc x10,0xa +800058f0: 9d452503 lw x10,-1580(x10) # 8000f2c0 +800058f4: 02000593 addi x11,x0,32 +800058f8: 0e0010ef jal x1,800069d8 + +800058fc : +800058fc: 00000013 addi x0,x0,0 +80005900: 0000a517 auipc x10,0xa +80005904: a1850513 addi x10,x10,-1512 # 8000f318 +80005908: 00000013 addi x0,x0,0 +8000590c: 00000013 addi x0,x0,0 +80005910: 00000013 addi x0,x0,0 +80005914: 00000013 addi x0,x0,0 +80005918: 00000013 addi x0,x0,0 +8000591c: 00000013 addi x0,x0,0 +80005920: 0001c097 auipc x1,0x1c +80005924: c44080e7 jalr x1,-956(x1) # 80021564 +80005928: 0000a517 auipc x10,0xa +8000592c: 9b052503 lw x10,-1616(x10) # 8000f2d8 +80005930: 08051e63 bne x10,x0,800059cc +80005934: 00000013 addi x0,x0,0 +80005938: 00000013 addi x0,x0,0 +8000593c: 00000013 addi x0,x0,0 +80005940: 0000b517 auipc x10,0xb +80005944: a6550513 addi x10,x10,-1435 # 800103a5 +80005948: 00000013 addi x0,x0,0 +8000594c: 00000013 addi x0,x0,0 +80005950: 00000013 addi x0,x0,0 +80005954: 00000013 addi x0,x0,0 +80005958: 00000013 addi x0,x0,0 +8000595c: 00000013 addi x0,x0,0 +80005960: 0001c097 auipc x1,0x1c +80005964: c04080e7 jalr x1,-1020(x1) # 80021564 +80005968: 0000a517 auipc x10,0xa +8000596c: 84852503 lw x10,-1976(x10) # 8000f1b0 +80005970: 00100593 addi x11,x0,1 +80005974: 00b51c63 bne x10,x11,8000598c +80005978: 0000a517 auipc x10,0xa +8000597c: 95052503 lw x10,-1712(x10) # 8000f2c8 +80005980: 02000593 addi x11,x0,32 +80005984: 054010ef jal x1,800069d8 +80005988: 0140006f jal x0,8000599c + +8000598c : +8000598c: 0000a517 auipc x10,0xa +80005990: 93c52503 lw x10,-1732(x10) # 8000f2c8 +80005994: 02000593 addi x11,x0,32 +80005998: 040010ef jal x1,800069d8 + +8000599c : +8000599c: 00000013 addi x0,x0,0 +800059a0: 0000a517 auipc x10,0xa +800059a4: 97850513 addi x10,x10,-1672 # 8000f318 +800059a8: 00000013 addi x0,x0,0 +800059ac: 00000013 addi x0,x0,0 +800059b0: 00000013 addi x0,x0,0 +800059b4: 00000013 addi x0,x0,0 +800059b8: 00000013 addi x0,x0,0 +800059bc: 00000013 addi x0,x0,0 +800059c0: 0001c097 auipc x1,0x1c +800059c4: ba4080e7 jalr x1,-1116(x1) # 80021564 +800059c8: 5bd0006f jal x0,80006784 + +800059cc : +800059cc: 00100593 addi x11,x0,1 +800059d0: 06b51e63 bne x10,x11,80005a4c + +800059d4 : +800059d4: 00000013 addi x0,x0,0 +800059d8: 00000013 addi x0,x0,0 +800059dc: 00000013 addi x0,x0,0 +800059e0: 0000b517 auipc x10,0xb +800059e4: 9dc50513 addi x10,x10,-1572 # 800103bc +800059e8: 00000013 addi x0,x0,0 +800059ec: 00000013 addi x0,x0,0 +800059f0: 00000013 addi x0,x0,0 +800059f4: 00000013 addi x0,x0,0 +800059f8: 00000013 addi x0,x0,0 +800059fc: 00000013 addi x0,x0,0 +80005a00: 0001c097 auipc x1,0x1c +80005a04: b64080e7 jalr x1,-1180(x1) # 80021564 +80005a08: 0000a517 auipc x10,0xa +80005a0c: 8c052503 lw x10,-1856(x10) # 8000f2c8 +80005a10: 02000593 addi x11,x0,32 +80005a14: 7c5000ef jal x1,800069d8 +80005a18: 00000013 addi x0,x0,0 +80005a1c: 00000013 addi x0,x0,0 +80005a20: 0000a517 auipc x10,0xa +80005a24: 8f850513 addi x10,x10,-1800 # 8000f318 +80005a28: 00000013 addi x0,x0,0 +80005a2c: 00000013 addi x0,x0,0 +80005a30: 00000013 addi x0,x0,0 +80005a34: 00000013 addi x0,x0,0 +80005a38: 00000013 addi x0,x0,0 +80005a3c: 00000013 addi x0,x0,0 +80005a40: 0001c097 auipc x1,0x1c +80005a44: b24080e7 jalr x1,-1244(x1) # 80021564 +80005a48: 53d0006f jal x0,80006784 + +80005a4c : +80005a4c: 00000013 addi x0,x0,0 +80005a50: 00000013 addi x0,x0,0 +80005a54: 00000013 addi x0,x0,0 +80005a58: 00000013 addi x0,x0,0 +80005a5c: 00000013 addi x0,x0,0 +80005a60: 0000b517 auipc x10,0xb +80005a64: 9ba50513 addi x10,x10,-1606 # 8001041a +80005a68: 00000013 addi x0,x0,0 +80005a6c: 00000013 addi x0,x0,0 +80005a70: 00000013 addi x0,x0,0 +80005a74: 00000013 addi x0,x0,0 +80005a78: 00000013 addi x0,x0,0 +80005a7c: 00000013 addi x0,x0,0 +80005a80: 0001c097 auipc x1,0x1c +80005a84: ae4080e7 jalr x1,-1308(x1) # 80021564 +80005a88: 0000a517 auipc x10,0xa +80005a8c: 84052503 lw x10,-1984(x10) # 8000f2c8 +80005a90: 02000593 addi x11,x0,32 +80005a94: 745000ef jal x1,800069d8 +80005a98: 00000013 addi x0,x0,0 +80005a9c: 00000013 addi x0,x0,0 +80005aa0: 0000a517 auipc x10,0xa +80005aa4: 87850513 addi x10,x10,-1928 # 8000f318 +80005aa8: 00000013 addi x0,x0,0 +80005aac: 00000013 addi x0,x0,0 +80005ab0: 00000013 addi x0,x0,0 +80005ab4: 00000013 addi x0,x0,0 +80005ab8: 00000013 addi x0,x0,0 +80005abc: 00000013 addi x0,x0,0 +80005ac0: 0001c097 auipc x1,0x1c +80005ac4: aa4080e7 jalr x1,-1372(x1) # 80021564 +80005ac8: 4bd0006f jal x0,80006784 + +80005acc : +80005acc: 0000a417 auipc x8,0xa +80005ad0: 81442403 lw x8,-2028(x8) # 8000f2e0 +80005ad4: 00900493 addi x9,x0,9 +80005ad8: 0a940c63 beq x8,x9,80005b90 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: 9df50513 addi x10,x10,-1569 # 800104bf +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: 9cb50513 addi x10,x10,-1589 # 800104eb +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80005b48: 00009817 auipc x16,0x9 +80005b4c: 7a080813 addi x16,x16,1952 # 8000f2e8 +80005b50: 00082503 lw x10,0(x16) +80005b54: 0001c097 auipc x1,0x1c +80005b58: a10080e7 jalr x1,-1520(x1) # 80021564 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: dd050513 addi x10,x10,-560 # 8000f930 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80005b88: 280404e3 beq x8,x0,80006610 +80005b8c: 3400006f jal x0,80005ecc + +80005b90 : +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: 95b50513 addi x10,x10,-1701 # 800104fb +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 00009517 auipc x10,0x9 +80005bcc: 70052503 lw x10,1792(x10) # 8000f2c8 +80005bd0: 02000593 addi x11,x0,32 +80005bd4: 605000ef jal x1,800069d8 +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 00009517 auipc x10,0x9 +80005be4: 73850513 addi x10,x10,1848 # 8000f318 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 00000013 addi x0,x0,0 +80005c0c: 00000013 addi x0,x0,0 +80005c10: 00000013 addi x0,x0,0 +80005c14: 00000013 addi x0,x0,0 +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000b517 auipc x10,0xb +80005c24: 90650513 addi x10,x10,-1786 # 80010526 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001c097 auipc x1,0x1c +80005c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80005c48: 00009517 auipc x10,0x9 +80005c4c: 67852503 lw x10,1656(x10) # 8000f2c0 +80005c50: 02000593 addi x11,x0,32 +80005c54: 585000ef jal x1,800069d8 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 00009517 auipc x10,0x9 +80005c64: 6b850513 addi x10,x10,1720 # 8000f318 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0001c097 auipc x1,0x1c +80005c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80005c88: 00009317 auipc x6,0x9 +80005c8c: 63832303 lw x6,1592(x6) # 8000f2c0 +80005c90: 00009397 auipc x7,0x9 +80005c94: 6383a383 lw x7,1592(x7) # 8000f2c8 +80005c98: 10736a63 bltu x6,x7,80005dac + +80005c9c : +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0000b517 auipc x10,0xb +80005ca4: 8b550513 addi x10,x10,-1867 # 80010555 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0001c097 auipc x1,0x1c +80005cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0000b517 auipc x10,0xb +80005ce4: 8dd50513 addi x10,x10,-1827 # 800105bd +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0001c097 auipc x1,0x1c +80005d04: 864080e7 jalr x1,-1948(x1) # 80021564 +80005d08: 00009317 auipc x6,0x9 +80005d0c: 5b832303 lw x6,1464(x6) # 8000f2c0 +80005d10: 00009397 auipc x7,0x9 +80005d14: 5b83a383 lw x7,1464(x7) # 8000f2c8 +80005d18: 40730533 sub x10,x6,x7 +80005d1c: 02000593 addi x11,x0,32 +80005d20: 4b9000ef jal x1,800069d8 +80005d24: 00000013 addi x0,x0,0 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 00009517 auipc x10,0x9 +80005d44: 5d850513 addi x10,x10,1496 # 8000f318 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001c097 auipc x1,0x1c +80005d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80005d68: 00000013 addi x0,x0,0 +80005d6c: 00000013 addi x0,x0,0 +80005d70: 00000013 addi x0,x0,0 +80005d74: 00000013 addi x0,x0,0 +80005d78: 00000013 addi x0,x0,0 +80005d7c: 00000013 addi x0,x0,0 +80005d80: 0000b517 auipc x10,0xb +80005d84: 86450513 addi x10,x10,-1948 # 800105e4 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0001b097 auipc x1,0x1b +80005da4: 7c4080e7 jalr x1,1988(x1) # 80021564 +80005da8: 1dd0006f jal x0,80006784 + +80005dac : +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0000a517 auipc x10,0xa +80005dc4: 7c150513 addi x10,x10,1985 # 80010581 +80005dc8: 00000013 addi x0,x0,0 +80005dcc: 00000013 addi x0,x0,0 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0001b097 auipc x1,0x1b +80005de4: 784080e7 jalr x1,1924(x1) # 80021564 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0000a517 auipc x10,0xa +80005e04: 7bd50513 addi x10,x10,1981 # 800105bd +80005e08: 00000013 addi x0,x0,0 +80005e0c: 00000013 addi x0,x0,0 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0001b097 auipc x1,0x1b +80005e24: 744080e7 jalr x1,1860(x1) # 80021564 +80005e28: 00009317 auipc x6,0x9 +80005e2c: 4a032303 lw x6,1184(x6) # 8000f2c8 +80005e30: 00009397 auipc x7,0x9 +80005e34: 4903a383 lw x7,1168(x7) # 8000f2c0 +80005e38: 40730533 sub x10,x6,x7 +80005e3c: 02000593 addi x11,x0,32 +80005e40: 399000ef jal x1,800069d8 +80005e44: 00000013 addi x0,x0,0 +80005e48: 00000013 addi x0,x0,0 +80005e4c: 00000013 addi x0,x0,0 +80005e50: 00000013 addi x0,x0,0 +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 00009517 auipc x10,0x9 +80005e64: 4b850513 addi x10,x10,1208 # 8000f318 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 00000013 addi x0,x0,0 +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: 82c50513 addi x10,x10,-2004 # 800106cc +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80005ec8: 0bd0006f jal x0,80006784 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 8d350513 addi x10,x10,-1837 # 800107b3 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 00009517 auipc x10,0x9 +80005f0c: 3dc52503 lw x10,988(x10) # 8000f2e4 +80005f10: 04050a63 beq x10,x0,80005f64 +80005f14: 00100593 addi x11,x0,1 +80005f18: 08b50663 beq x10,x11,80005fa4 +80005f1c: 00200593 addi x11,x0,2 +80005f20: 0cb50263 beq x10,x11,80005fe4 +80005f24: 00300593 addi x11,x0,3 +80005f28: 0eb50e63 beq x10,x11,80006024 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000b517 auipc x10,0xb +80005f44: 8af50513 addi x10,x10,-1873 # 800107ef +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 1000006f jal x0,80006060 + +80005f64 : +80005f64: 00000013 addi x0,x0,0 +80005f68: 00000013 addi x0,x0,0 +80005f6c: 00000013 addi x0,x0,0 +80005f70: 00000013 addi x0,x0,0 +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 84d50513 addi x10,x10,-1971 # 800107cd +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0c00006f jal x0,80006060 + +80005fa4 : +80005fa4: 00000013 addi x0,x0,0 +80005fa8: 00000013 addi x0,x0,0 +80005fac: 00000013 addi x0,x0,0 +80005fb0: 00000013 addi x0,x0,0 +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: 81550513 addi x10,x10,-2027 # 800107d5 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0800006f jal x0,80006060 + +80005fe4 : +80005fe4: 00000013 addi x0,x0,0 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0000a517 auipc x10,0xa +80006004: 7dd50513 addi x10,x10,2013 # 800107dd +80006008: 00000013 addi x0,x0,0 +8000600c: 00000013 addi x0,x0,0 +80006010: 00000013 addi x0,x0,0 +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0400006f jal x0,80006060 + +80006024 : +80006024: 00000013 addi x0,x0,0 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0000a517 auipc x10,0xa +80006044: 7a650513 addi x10,x10,1958 # 800107e6 +80006048: 00000013 addi x0,x0,0 +8000604c: 00000013 addi x0,x0,0 +80006050: 00000013 addi x0,x0,0 +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 + +80006060 : +80006060: 0001b097 auipc x1,0x1b +80006064: 504080e7 jalr x1,1284(x1) # 80021564 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0000a517 auipc x10,0xa +80006084: 77850513 addi x10,x10,1912 # 800107f8 +80006088: 00000013 addi x0,x0,0 +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0001b097 auipc x1,0x1b +800060a4: 4c4080e7 jalr x1,1220(x1) # 80021564 +800060a8: 00009517 auipc x10,0x9 +800060ac: 23852503 lw x10,568(x10) # 8000f2e0 +800060b0: 00100593 addi x11,x0,1 +800060b4: 06b50863 beq x10,x11,80006124 +800060b8: 00200593 addi x11,x0,2 +800060bc: 0ab50463 beq x10,x11,80006164 +800060c0: 00300593 addi x11,x0,3 +800060c4: 0eb50063 beq x10,x11,800061a4 +800060c8: 00400593 addi x11,x0,4 +800060cc: 10b50c63 beq x10,x11,800061e4 +800060d0: 00500593 addi x11,x0,5 +800060d4: 14b50863 beq x10,x11,80006224 +800060d8: 00600593 addi x11,x0,6 +800060dc: 18b50463 beq x10,x11,80006264 +800060e0: 00700593 addi x11,x0,7 +800060e4: 1cb50063 beq x10,x11,800062a4 +800060e8: 00800593 addi x11,x0,8 +800060ec: 1eb50c63 beq x10,x11,800062e4 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0000b517 auipc x10,0xb +80006104: 84f50513 addi x10,x10,-1969 # 8001094f +80006108: 00000013 addi x0,x0,0 +8000610c: 00000013 addi x0,x0,0 +80006110: 00000013 addi x0,x0,0 +80006114: 00000013 addi x0,x0,0 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 2000006f jal x0,80006320 + +80006124 : +80006124: 00000013 addi x0,x0,0 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0000a517 auipc x10,0xa +80006144: 6d250513 addi x10,x10,1746 # 80010812 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 1c00006f jal x0,80006320 + +80006164 : +80006164: 00000013 addi x0,x0,0 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0000a517 auipc x10,0xa +80006184: 6c350513 addi x10,x10,1731 # 80010843 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 1800006f jal x0,80006320 + +800061a4 : +800061a4: 00000013 addi x0,x0,0 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0000a517 auipc x10,0xa +800061c4: 6a350513 addi x10,x10,1699 # 80010863 +800061c8: 00000013 addi x0,x0,0 +800061cc: 00000013 addi x0,x0,0 +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 1400006f jal x0,80006320 + +800061e4 : +800061e4: 00000013 addi x0,x0,0 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0000a517 auipc x10,0xa +80006204: 68150513 addi x10,x10,1665 # 80010881 +80006208: 00000013 addi x0,x0,0 +8000620c: 00000013 addi x0,x0,0 +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 1000006f jal x0,80006320 + +80006224 : +80006224: 00000013 addi x0,x0,0 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0000a517 auipc x10,0xa +80006244: 66050513 addi x10,x10,1632 # 800108a0 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0c00006f jal x0,80006320 + +80006264 : +80006264: 00000013 addi x0,x0,0 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0000a517 auipc x10,0xa +80006284: 64850513 addi x10,x10,1608 # 800108c8 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0800006f jal x0,80006320 + +800062a4 : +800062a4: 00000013 addi x0,x0,0 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0000a517 auipc x10,0xa +800062c4: 63450513 addi x10,x10,1588 # 800108f4 +800062c8: 00000013 addi x0,x0,0 +800062cc: 00000013 addi x0,x0,0 +800062d0: 00000013 addi x0,x0,0 +800062d4: 00000013 addi x0,x0,0 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 0400006f jal x0,80006320 + +800062e4 : +800062e4: 00000013 addi x0,x0,0 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0000a517 auipc x10,0xa +80006304: 62050513 addi x10,x10,1568 # 80010920 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 + +80006320 : +80006320: 0001b097 auipc x1,0x1b +80006324: 244080e7 jalr x1,580(x1) # 80021564 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0000a517 auipc x10,0xa +80006344: 61e50513 addi x10,x10,1566 # 8001095e +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0001b097 auipc x1,0x1b +80006364: 204080e7 jalr x1,516(x1) # 80021564 +80006368: 00009517 auipc x10,0x9 +8000636c: f6052503 lw x10,-160(x10) # 8000f2c8 +80006370: 02000593 addi x11,x0,32 +80006374: 664000ef jal x1,800069d8 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 00009517 auipc x10,0x9 +80006384: f9850513 addi x10,x10,-104 # 8000f318 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000a517 auipc x10,0xa +800063c4: 5b550513 addi x10,x10,1461 # 80010975 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 00009517 auipc x10,0x9 +800063ec: ed852503 lw x10,-296(x10) # 8000f2c0 +800063f0: 02000593 addi x11,x0,32 +800063f4: 5e4000ef jal x1,800069d8 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 00009517 auipc x10,0x9 +80006404: f1850513 addi x10,x10,-232 # 8000f318 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00009517 auipc x10,0x9 +8000642c: eb852503 lw x10,-328(x10) # 8000f2e0 +80006430: 00200593 addi x11,x0,2 +80006434: 08b51463 bne x10,x11,800064bc +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000a517 auipc x10,0xa +80006444: 54c50513 addi x10,x10,1356 # 8001098c +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00009517 auipc x10,0x9 +8000646c: e6052503 lw x10,-416(x10) # 8000f2c8 +80006470: 284000ef jal x1,800066f4 +80006474: 0001b097 auipc x1,0x1b +80006478: 0f0080e7 jalr x1,240(x1) # 80021564 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000a517 auipc x10,0xa +80006484: 52350513 addi x10,x10,1315 # 800109a3 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001b097 auipc x1,0x1b +800064a4: 0c4080e7 jalr x1,196(x1) # 80021564 +800064a8: 00009517 auipc x10,0x9 +800064ac: e1852503 lw x10,-488(x10) # 8000f2c0 +800064b0: 244000ef jal x1,800066f4 +800064b4: 0001b097 auipc x1,0x1b +800064b8: 0b0080e7 jalr x1,176(x1) # 80021564 + +800064bc : +800064bc: 00000097 auipc x1,0x0 +800064c0: 314080e7 jalr x1,788(x1) # 800067d0 +800064c4: 00009517 auipc x10,0x9 +800064c8: e1c52503 lw x10,-484(x10) # 8000f2e0 +800064cc: 00100593 addi x11,x0,1 +800064d0: 02b51e63 bne x10,x11,8000650c +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000a517 auipc x10,0xa +800064e4: 53950513 addi x10,x10,1337 # 80010a19 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 27c0006f jal x0,80006784 +8000650c: 00200593 addi x11,x0,2 +80006510: 02b51e63 bne x10,x11,8000654c +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000a517 auipc x10,0xa +80006524: 5cf50513 addi x10,x10,1487 # 80010aef +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 23c0006f jal x0,80006784 +8000654c: 00300593 addi x11,x0,3 +80006550: 02b51e63 bne x10,x11,8000658c +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000a517 auipc x10,0xa +80006564: 68250513 addi x10,x10,1666 # 80010be2 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001b097 auipc x1,0x1b +80006584: fe4080e7 jalr x1,-28(x1) # 80021564 +80006588: 1fc0006f jal x0,80006784 +8000658c: 00400593 addi x11,x0,4 +80006590: 02b51e63 bne x10,x11,800065cc +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 0000a517 auipc x10,0xa +800065a4: 73d50513 addi x10,x10,1853 # 80010cdd +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0001b097 auipc x1,0x1b +800065c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800065c8: 1bc0006f jal x0,80006784 +800065cc: 00500593 addi x11,x0,5 +800065d0: 02b51e63 bne x10,x11,8000660c +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0000a517 auipc x10,0xa +800065e4: 7e450513 addi x10,x10,2020 # 80010dc4 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0001b097 auipc x1,0x1b +80006604: f64080e7 jalr x1,-156(x1) # 80021564 +80006608: 17c0006f jal x0,80006784 +8000660c: 1780006f jal x0,80006784 + +80006610 : +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0000a517 auipc x10,0xa +80006624: 3b150513 addi x10,x10,945 # 800109d1 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0001b097 auipc x1,0x1b +80006644: f24080e7 jalr x1,-220(x1) # 80021564 +80006648: 00009617 auipc x12,0x9 +8000664c: cb062603 lw x12,-848(x12) # 8000f2f8 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 00009517 auipc x10,0x9 +80006664: 35a50513 addi x10,x10,858 # 8000f9ba +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0001b097 auipc x1,0x1b +80006684: ee4080e7 jalr x1,-284(x1) # 80021564 +80006688: 00065503 lhu x10,0(x12) +8000668c: 01000593 addi x11,x0,16 +80006690: 00357413 andi x8,x10,3 +80006694: 00300493 addi x9,x0,3 +80006698: 00941a63 bne x8,x9,800066ac +8000669c: 00265403 lhu x8,2(x12) +800066a0: 01041413 slli x8,x8,0x10 +800066a4: 00856533 or x10,x10,x8 +800066a8: 02000593 addi x11,x0,32 +800066ac: 32c000ef jal x1,800069d8 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 00009517 auipc x10,0x9 +800066c4: c5850513 addi x10,x10,-936 # 8000f318 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00000097 auipc x1,0x0 +800066ec: 0e8080e7 jalr x1,232(x1) # 800067d0 +800066f0: 0940006f jal x0,80006784 + +800066f4 : +800066f4: 02054263 blt x10,x0,80006718 + +800066f8 : +800066f8: 01800593 addi x11,x0,24 +800066fc: 04b55463 bge x10,x11,80006744 +80006700: 00009597 auipc x11,0x9 +80006704: c4058593 addi x11,x11,-960 # 8000f340 +80006708: 00251613 slli x12,x10,0x2 +8000670c: 00c585b3 add x11,x11,x12 +80006710: 0005a503 lw x10,0(x11) +80006714: 00008067 jalr x0,0(x1) + +80006718 : +80006718: 00100593 addi x11,x0,1 +8000671c: 01f59593 slli x11,x11,0x1f +80006720: 00b54533 xor x10,x10,x11 +80006724: 01000593 addi x11,x0,16 +80006728: 00b55e63 bge x10,x11,80006744 +8000672c: 00009597 auipc x11,0x9 +80006730: c7458593 addi x11,x11,-908 # 8000f3a0 +80006734: 00251613 slli x12,x10,0x2 +80006738: 00c585b3 add x11,x11,x12 +8000673c: 0005a503 lw x10,0(x11) +80006740: 00008067 jalr x0,0(x1) + +80006744 : +80006744: 00000013 addi x0,x0,0 +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 00009517 auipc x10,0x9 +80006764: 07e50513 addi x10,x10,126 # 8000f7de +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 00008067 jalr x0,0(x1) + +80006784 : +80006784: 00000013 addi x0,x0,0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 0000a517 auipc x10,0xa +800067a4: cd250513 addi x10,x10,-814 # 80010472 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0001b097 auipc x1,0x1b +800067c4: da4080e7 jalr x1,-604(x1) # 80021564 + +800067c8 : +800067c8: 0001b097 auipc x1,0x1b +800067cc: dfc080e7 jalr x1,-516(x1) # 800215c4 + +800067d0 : +800067d0: 00009617 auipc x12,0x9 +800067d4: b2060613 addi x12,x12,-1248 # 8000f2f0 +800067d8: 00162023 sw x1,0(x12) +800067dc: 00000013 addi x0,x0,0 +800067e0: 00009517 auipc x10,0x9 +800067e4: 1fb50513 addi x10,x10,507 # 8000f9db +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0001b097 auipc x1,0x1b +80006804: d64080e7 jalr x1,-668(x1) # 80021564 +80006808: 00009517 auipc x10,0x9 +8000680c: af052503 lw x10,-1296(x10) # 8000f2f8 +80006810: 02000593 addi x11,x0,32 +80006814: 1c4000ef jal x1,800069d8 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 00009517 auipc x10,0x9 +80006824: af850513 addi x10,x10,-1288 # 8000f318 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0001b097 auipc x1,0x1b +80006844: d24080e7 jalr x1,-732(x1) # 80021564 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 00009517 auipc x10,0x9 +80006864: 18b50513 addi x10,x10,395 # 8000f9eb +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0001b097 auipc x1,0x1b +80006884: ce4080e7 jalr x1,-796(x1) # 80021564 +80006888: 00009517 auipc x10,0x9 +8000688c: a7852503 lw x10,-1416(x10) # 8000f300 +80006890: 02000593 addi x11,x0,32 +80006894: 144000ef jal x1,800069d8 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 00009517 auipc x10,0x9 +800068a4: a7850513 addi x10,x10,-1416 # 8000f318 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0001b097 auipc x1,0x1b +800068c4: ca4080e7 jalr x1,-860(x1) # 80021564 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 00009517 auipc x10,0x9 +800068e4: 11b50513 addi x10,x10,283 # 8000f9fb +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0001b097 auipc x1,0x1b +80006904: c64080e7 jalr x1,-924(x1) # 80021564 +80006908: 00009517 auipc x10,0x9 +8000690c: a0052503 lw x10,-1536(x10) # 8000f308 +80006910: 02000593 addi x11,x0,32 +80006914: 0c4000ef jal x1,800069d8 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 00009517 auipc x10,0x9 +80006924: 9f850513 addi x10,x10,-1544 # 8000f318 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0001b097 auipc x1,0x1b +80006944: c24080e7 jalr x1,-988(x1) # 80021564 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 00009517 auipc x10,0x9 +80006964: 0ab50513 addi x10,x10,171 # 8000fa0b +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0001b097 auipc x1,0x1b +80006984: be4080e7 jalr x1,-1052(x1) # 80021564 +80006988: 00009517 auipc x10,0x9 +8000698c: 98852503 lw x10,-1656(x10) # 8000f310 +80006990: 02000593 addi x11,x0,32 +80006994: 044000ef jal x1,800069d8 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 00009517 auipc x10,0x9 +800069a4: 97850513 addi x10,x10,-1672 # 8000f318 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0001b097 auipc x1,0x1b +800069c4: ba4080e7 jalr x1,-1116(x1) # 80021564 +800069c8: 00009617 auipc x12,0x9 +800069cc: 92860613 addi x12,x12,-1752 # 8000f2f0 +800069d0: 00062083 lw x1,0(x12) +800069d4: 00008067 jalr x0,0(x1) + +800069d8 : +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 00009617 auipc x12,0x9 +800069e4: 93860613 addi x12,x12,-1736 # 8000f318 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 03000693 addi x13,x0,48 +80006a04: 00d60023 sb x13,0(x12) +80006a08: 07800693 addi x13,x0,120 +80006a0c: 00d600a3 sb x13,1(x12) +80006a10: 00260613 addi x12,x12,2 +80006a14: 00058693 addi x13,x11,0 + +80006a18 : +80006a18: ffc68693 addi x13,x13,-4 +80006a1c: 00d55733 srl x14,x10,x13 +80006a20: 00f77713 andi x14,x14,15 +80006a24: 00a00793 addi x15,x0,10 +80006a28: 00f74663 blt x14,x15,80006a34 +80006a2c: 05770713 addi x14,x14,87 +80006a30: 0080006f jal x0,80006a38 + +80006a34 : +80006a34: 03070713 addi x14,x14,48 + +80006a38 : +80006a38: 00e60023 sb x14,0(x12) +80006a3c: 00160613 addi x12,x12,1 +80006a40: fc069ce3 bne x13,x0,80006a18 +80006a44: 00a00693 addi x13,x0,10 +80006a48: 00d60023 sb x13,0(x12) +80006a4c: 000600a3 sb x0,1(x12) +80006a50: 00008067 jalr x0,0(x1) + +80006a54 : +80006a54: 00a00693 addi x13,x0,10 +80006a58: 02d54663 blt x10,x13,80006a84 +80006a5c: ff650513 addi x10,x10,-10 +80006a60: 03100713 addi x14,x0,49 +80006a64: 00d54c63 blt x10,x13,80006a7c +80006a68: ff650513 addi x10,x10,-10 +80006a6c: 03200713 addi x14,x0,50 +80006a70: 00d54663 blt x10,x13,80006a7c +80006a74: ff650513 addi x10,x10,-10 +80006a78: 03300713 addi x14,x0,51 +80006a7c: 00e60023 sb x14,0(x12) +80006a80: 00160613 addi x12,x12,1 +80006a84: 03050513 addi x10,x10,48 +80006a88: 00a60023 sb x10,0(x12) +80006a8c: 00a00693 addi x13,x0,10 +80006a90: 00d600a3 sb x13,1(x12) +80006a94: 00060123 sb x0,2(x12) +80006a98: 00008067 jalr x0,0(x1) +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 00000013 addi x0,x0,0 +80006aa4: 00000013 addi x0,x0,0 +80006aa8: 00000013 addi x0,x0,0 +80006aac: 00000013 addi x0,x0,0 +80006ab0: 00000013 addi x0,x0,0 +80006ab4: 00000013 addi x0,x0,0 +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: bb838393 addi x7,x7,-1096 # 80004bc0 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: b9c38393 addi x7,x7,-1124 # 80004bc0 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: b8438393 addi x7,x7,-1148 # 80004bc0 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: b7038393 addi x7,x7,-1168 # 80004bc0 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: b6438393 addi x7,x7,-1180 # 80004bc0 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: b3038393 addi x7,x7,-1232 # 80004bc0 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: da830313 addi x6,x6,-600 # 80003e44 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: b1838393 addi x7,x7,-1256 # 80004bc0 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: d9030313 addi x6,x6,-624 # 80003e44 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: b0038393 addi x7,x7,-1280 # 80004bc0 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: d7830313 addi x6,x6,-648 # 80003e44 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: ae838393 addi x7,x7,-1304 # 80004bc0 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: c1478793 addi x15,x15,-1004 # 80003e54 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: a5010113 addi x2,x2,-1456 # 80010ef0 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 9e018193 addi x3,x3,-1568 # 80004ec0 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 8001049b .word 0x8001049b +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: a5828293 addi x5,x5,-1448 # 80020000 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: a3828293 addi x5,x5,-1480 # 80020000 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-packh-00.elf.objdump b/riscv-tests/rv32-Zbkb-packh-00.elf.objdump new file mode 100644 index 0000000..d79c5fc --- /dev/null +++ b/riscv-tests/rv32-Zbkb-packh-00.elf.objdump @@ -0,0 +1,13219 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-packh-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-packh-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007140 memsz 0x00007140 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00007100 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00018830 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020900 80020900 00021900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000269a 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00024d15 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d90 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024db3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024dc8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00024df0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e79 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020900 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccYi63Lu.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b0 +80005540 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_packh_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b1 +80009022 l .data 00000000 Zbkb_packh_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b2 +80009054 l .data 00000000 Zbkb_packh_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b3 +80009086 l .data 00000000 Zbkb_packh_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b4 +80005558 l .text.rvtest 00000000 failedtest_x8_x7 +800090b8 l .data 00000000 Zbkb_packh_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b5 +800090ea l .data 00000000 Zbkb_packh_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b6 +8000911c l .data 00000000 Zbkb_packh_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b7 +80005580 l .text.rvtest 00000000 failedtest_x14_x13 +8000914e l .data 00000000 Zbkb_packh_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b8 +80009180 l .data 00000000 Zbkb_packh_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b9 +800091b2 l .data 00000000 Zbkb_packh_cg_cp_rs1_b9_str +80000224 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b10 +800091e5 l .data 00000000 Zbkb_packh_cg_cp_rs1_b10_str +80000254 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b11 +80009219 l .data 00000000 Zbkb_packh_cg_cp_rs1_b11_str +80000284 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b12 +8000924d l .data 00000000 Zbkb_packh_cg_cp_rs1_b12_str +800002b8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b13 +80009281 l .data 00000000 Zbkb_packh_cg_cp_rs1_b13_str +800002e4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b14 +800092b5 l .data 00000000 Zbkb_packh_cg_cp_rs1_b14_str +80000310 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b15 +800092e9 l .data 00000000 Zbkb_packh_cg_cp_rs1_b15_str +80000340 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b16 +8000931d l .data 00000000 Zbkb_packh_cg_cp_rs1_b16_str +8000036c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b17 +80009351 l .data 00000000 Zbkb_packh_cg_cp_rs1_b17_str +80000398 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b18 +80009385 l .data 00000000 Zbkb_packh_cg_cp_rs1_b18_str +800003c4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b19 +800093b9 l .data 00000000 Zbkb_packh_cg_cp_rs1_b19_str +800003f0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b20 +800093ed l .data 00000000 Zbkb_packh_cg_cp_rs1_b20_str +8000041c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b21 +80009421 l .data 00000000 Zbkb_packh_cg_cp_rs1_b21_str +80000448 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b22 +80009455 l .data 00000000 Zbkb_packh_cg_cp_rs1_b22_str +80000478 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b23 +80009489 l .data 00000000 Zbkb_packh_cg_cp_rs1_b23_str +800004a4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b24 +800094bd l .data 00000000 Zbkb_packh_cg_cp_rs1_b24_str +800004d0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b25 +800094f1 l .data 00000000 Zbkb_packh_cg_cp_rs1_b25_str +800004fc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b26 +80009525 l .data 00000000 Zbkb_packh_cg_cp_rs1_b26_str +8000052c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b27 +80009559 l .data 00000000 Zbkb_packh_cg_cp_rs1_b27_str +80000558 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b28 +8000958d l .data 00000000 Zbkb_packh_cg_cp_rs1_b28_str +80000584 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b29 +800095c1 l .data 00000000 Zbkb_packh_cg_cp_rs1_b29_str +800005b0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b30 +800095f5 l .data 00000000 Zbkb_packh_cg_cp_rs1_b30_str +800005e0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_b31 +80009629 l .data 00000000 Zbkb_packh_cg_cp_rs1_b31_str +8000060c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b0 +8000965d l .data 00000000 Zbkb_packh_cg_cp_rs2_b0_str +80000638 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b1 +80009690 l .data 00000000 Zbkb_packh_cg_cp_rs2_b1_str +80000664 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b2 +800096c3 l .data 00000000 Zbkb_packh_cg_cp_rs2_b2_str +80000694 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b3 +800096f6 l .data 00000000 Zbkb_packh_cg_cp_rs2_b3_str +800006c8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b4 +80009729 l .data 00000000 Zbkb_packh_cg_cp_rs2_b4_str +800006f4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b5 +8000975c l .data 00000000 Zbkb_packh_cg_cp_rs2_b5_str +80000724 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b6 +8000978f l .data 00000000 Zbkb_packh_cg_cp_rs2_b6_str +80000758 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b7 +800097c2 l .data 00000000 Zbkb_packh_cg_cp_rs2_b7_str +80000784 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b8 +800097f5 l .data 00000000 Zbkb_packh_cg_cp_rs2_b8_str +800007b4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b9 +80009828 l .data 00000000 Zbkb_packh_cg_cp_rs2_b9_str +800007e0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b10 +8000985b l .data 00000000 Zbkb_packh_cg_cp_rs2_b10_str +8000080c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b11 +8000988f l .data 00000000 Zbkb_packh_cg_cp_rs2_b11_str +80000838 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b12 +800098c3 l .data 00000000 Zbkb_packh_cg_cp_rs2_b12_str +80000864 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b13 +800098f7 l .data 00000000 Zbkb_packh_cg_cp_rs2_b13_str +80000890 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b14 +8000992b l .data 00000000 Zbkb_packh_cg_cp_rs2_b14_str +800008bc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b15 +8000995f l .data 00000000 Zbkb_packh_cg_cp_rs2_b15_str +800008e8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b16 +80009993 l .data 00000000 Zbkb_packh_cg_cp_rs2_b16_str +80000914 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b17 +800099c7 l .data 00000000 Zbkb_packh_cg_cp_rs2_b17_str +80000940 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b18 +800099fb l .data 00000000 Zbkb_packh_cg_cp_rs2_b18_str +8000096c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b19 +80009a2f l .data 00000000 Zbkb_packh_cg_cp_rs2_b19_str +80000998 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b20 +80009a63 l .data 00000000 Zbkb_packh_cg_cp_rs2_b20_str +800009c4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b21 +80009a97 l .data 00000000 Zbkb_packh_cg_cp_rs2_b21_str +800009f0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b22 +80009acb l .data 00000000 Zbkb_packh_cg_cp_rs2_b22_str +80000a1c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b23 +80009aff l .data 00000000 Zbkb_packh_cg_cp_rs2_b23_str +80000a48 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b24 +80009b33 l .data 00000000 Zbkb_packh_cg_cp_rs2_b24_str +80000a74 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b25 +80009b67 l .data 00000000 Zbkb_packh_cg_cp_rs2_b25_str +80000aa0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b26 +80009b9b l .data 00000000 Zbkb_packh_cg_cp_rs2_b26_str +80000acc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b27 +80009bcf l .data 00000000 Zbkb_packh_cg_cp_rs2_b27_str +80000afc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b28 +80009c03 l .data 00000000 Zbkb_packh_cg_cp_rs2_b28_str +80000b28 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b29 +80009c37 l .data 00000000 Zbkb_packh_cg_cp_rs2_b29_str +80000b58 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b30 +80009c6b l .data 00000000 Zbkb_packh_cg_cp_rs2_b30_str +80000b84 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_b31 +80009c9f l .data 00000000 Zbkb_packh_cg_cp_rs2_b31_str +80000bb0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b0 +80009cd3 l .data 00000000 Zbkb_packh_cg_cp_rd_b0_str +80000be0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b1 +80009d05 l .data 00000000 Zbkb_packh_cg_cp_rd_b1_str +80000c0c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b2 +80009d37 l .data 00000000 Zbkb_packh_cg_cp_rd_b2_str +80000c38 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b3 +80009d69 l .data 00000000 Zbkb_packh_cg_cp_rd_b3_str +80000c6c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b4 +80009d9b l .data 00000000 Zbkb_packh_cg_cp_rd_b4_str +80000c98 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b5 +80009dcd l .data 00000000 Zbkb_packh_cg_cp_rd_b5_str +80000cc4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b6 +80009dff l .data 00000000 Zbkb_packh_cg_cp_rd_b6_str +80000cf0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b7 +80009e31 l .data 00000000 Zbkb_packh_cg_cp_rd_b7_str +80000d1c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b8 +80009e63 l .data 00000000 Zbkb_packh_cg_cp_rd_b8_str +80000d48 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b9 +80009e95 l .data 00000000 Zbkb_packh_cg_cp_rd_b9_str +80000d74 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b10 +80009ec7 l .data 00000000 Zbkb_packh_cg_cp_rd_b10_str +80000da0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b11 +80009efa l .data 00000000 Zbkb_packh_cg_cp_rd_b11_str +80000dcc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b12 +80009f2d l .data 00000000 Zbkb_packh_cg_cp_rd_b12_str +80000e00 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b13 +80009f60 l .data 00000000 Zbkb_packh_cg_cp_rd_b13_str +80000e2c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b14 +80009f93 l .data 00000000 Zbkb_packh_cg_cp_rd_b14_str +80000e5c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b15 +80009fc6 l .data 00000000 Zbkb_packh_cg_cp_rd_b15_str +80000e88 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b16 +80009ff9 l .data 00000000 Zbkb_packh_cg_cp_rd_b16_str +80000eb4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b17 +8000a02c l .data 00000000 Zbkb_packh_cg_cp_rd_b17_str +80000ee0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b18 +8000a05f l .data 00000000 Zbkb_packh_cg_cp_rd_b18_str +80000f0c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b19 +8000a092 l .data 00000000 Zbkb_packh_cg_cp_rd_b19_str +80000f38 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b20 +8000a0c5 l .data 00000000 Zbkb_packh_cg_cp_rd_b20_str +80000f64 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b21 +8000a0f8 l .data 00000000 Zbkb_packh_cg_cp_rd_b21_str +80000f90 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b22 +8000a12b l .data 00000000 Zbkb_packh_cg_cp_rd_b22_str +80000fc0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b23 +8000a15e l .data 00000000 Zbkb_packh_cg_cp_rd_b23_str +80000fec l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b24 +8000a191 l .data 00000000 Zbkb_packh_cg_cp_rd_b24_str +80001018 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b25 +8000a1c4 l .data 00000000 Zbkb_packh_cg_cp_rd_b25_str +80001044 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b26 +8000a1f7 l .data 00000000 Zbkb_packh_cg_cp_rd_b26_str +80001070 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b27 +8000a22a l .data 00000000 Zbkb_packh_cg_cp_rd_b27_str +8000109c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b28 +8000a25d l .data 00000000 Zbkb_packh_cg_cp_rd_b28_str +800010c8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b29 +8000a290 l .data 00000000 Zbkb_packh_cg_cp_rd_b29_str +800010f4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b30 +8000a2c3 l .data 00000000 Zbkb_packh_cg_cp_rd_b30_str +80001120 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rd_b31 +8000a2f6 l .data 00000000 Zbkb_packh_cg_cp_rd_b31_str +8000114c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x0 +8000a329 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x0_str +80001178 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x1 +8000a363 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x1_str +800011a4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x2 +8000a39d l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x2_str +800011d0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x80000000 +8000a3d7 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x80000000_str +800011fc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x80000001 +8000a419 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x80000001_str +80001228 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x7fffffff +8000a45b l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x7fffffff_str +80001254 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x7ffffffe +8000a49d l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x7ffffffe_str +80001280 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0xffffffff +8000a4df l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0xffffffff_str +800012ac l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0xfffffffe +8000a521 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0xfffffffe_str +800012d8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x5bbc8872 +8000a563 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x5bbc8872_str +80001304 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaa +8000a5a5 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaa_str +80001330 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs1_edges_0x55555555 +8000a5e7 l .data 00000000 Zbkb_packh_cg_cp_rs1_edges_0x55555555_str +8000135c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x0 +8000a629 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x0_str +80001388 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x1 +8000a664 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x1_str +800013b4 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x2 +8000a69f l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x2_str +800013e0 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x80000000 +8000a6da l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x80000000_str +8000140c l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x80000001 +8000a71c l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x80000001_str +80001438 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x7fffffff +8000a75e l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x7fffffff_str +80001464 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x7ffffffe +8000a7a0 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x7ffffffe_str +80001490 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0xffffffff +8000a7e2 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0xffffffff_str +800014bc l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0xfffffffe +8000a824 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0xfffffffe_str +800014e8 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x5bbc8872 +8000a866 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x5bbc8872_str +80001514 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaa +8000a8a8 l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaa_str +80001540 l .text.rvtest 00000000 Zbkb_packh_cg_cp_rs2_edges_0x55555555 +8000a8ea l .data 00000000 Zbkb_packh_cg_cp_rs2_edges_0x55555555_str +8000156c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a92c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001598 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a97e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015c4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a9d0 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015f0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000aa22 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +8000161c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000aa7b l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001648 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000aad4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001674 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ab2d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +800016a0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ab86 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016cc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000abdf l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000ac38 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001724 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ac91 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001750 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000acea l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000177c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000ad43 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ad95 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017d4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ade7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +80001800 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000ae39 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000182c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ae92 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001858 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000aeeb l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001884 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000af44 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018b0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000af9d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018dc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000aff6 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001908 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b04f l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001934 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b0a8 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001960 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b101 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000198c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b15a l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b1ac l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019e4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b1fe l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a10 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b250 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a3c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b2a9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a68 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b302 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a94 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b35b l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ac0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b3b4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001aec l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b40d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b18 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b466 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b44 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b4bf l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b70 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b518 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b9c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b571 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b5ca l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bf4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b623 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c20 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b67c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c4c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b6dc l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c78 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b73c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001ca4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b79c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cd0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b7fc l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cfc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b85c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d28 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b8bc l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d54 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b91c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d80 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b97c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001dac l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b9dc l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000ba35 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001e04 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000ba8e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e30 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bae7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e5c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bb47 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e88 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bba7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eb4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bc07 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ee0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bc67 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f0c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bcc7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f38 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bd27 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f64 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bd87 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f90 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bde7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fbc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000be47 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bea0 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002014 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bef9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002040 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bf52 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000206c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000bfb2 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002098 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c012 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020c4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c072 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020f0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c0d2 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +8000211c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c132 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002148 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c192 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002174 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c1f2 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +800021a0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c252 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021cc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c2b2 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c30b l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002224 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c364 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002250 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c3bd l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000227c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c41d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c47d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022d4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c4dd l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +80002300 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c53d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000232c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c59d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002358 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c5fd l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002384 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c65d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023b0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c6bd l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023dc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c71d l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002408 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c776 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002434 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c7cf l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002460 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c828 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000248c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c888 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c8e8 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024e4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c948 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002510 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c9a8 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000253c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000ca08 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002568 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000ca68 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002594 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cac8 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025c0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000cb28 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025ec l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cb88 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002618 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000cbe1 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002644 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cc3a l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002670 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cc93 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000269c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000ccf3 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cd53 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026f4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cdb3 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002720 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000ce13 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000274c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ce73 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002778 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000ced3 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +800027a4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cf33 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027d0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cf93 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027fc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000cff3 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002828 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d04c l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002854 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d0a5 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002880 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d0fe l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028ac l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d15e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d1be l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +80002904 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d21e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002930 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d27e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000295c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d2de l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002988 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d33e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029b4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d39e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029e0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d3fe l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a0c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d45e l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a38 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d4b7 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a64 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d510 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a90 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d569 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002abc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d5c9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d629 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b14 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d689 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b40 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d6e9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b6c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d749 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b98 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d7a9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bc4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d809 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bf0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d869 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c1c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d8c9 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c48 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d922 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c74 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d97b l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002ca0 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d9d4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002ccc l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000da34 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000da94 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d24 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000daf4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d50 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000db54 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d7c l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dbb4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da8 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000dc14 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dd4 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000dc74 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002e00 l .text.rvtest 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dcd4 l .data 00000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e2c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b0 +8000dd34 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b0_str +80002e58 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b1 +8000dd6d l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b1_str +80002e84 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b2 +8000dda6 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b2_str +80002eb0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b3 +8000dddf l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b3_str +80002edc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b4 +8000de18 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b4_str +80002f08 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b5 +8000de51 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b5_str +80002f34 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b6 +8000de8a l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b6_str +80002f68 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b7 +8000dec3 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b7_str +80002f94 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b8 +8000defc l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b8_str +80002fc4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b9 +8000df35 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b9_str +80002ff0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b10 +8000df6e l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b10_str +80003020 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b11 +8000dfa8 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b11_str +8000304c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b12 +8000dfe2 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b12_str +80003078 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b13 +8000e01c l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b13_str +800030a4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b14 +8000e056 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b14_str +800030d0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b15 +8000e090 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b15_str +800030fc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b16 +8000e0ca l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b16_str +8000312c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b17 +8000e104 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b17_str +80003158 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b18 +8000e13e l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b18_str +80003184 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b19 +8000e178 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b19_str +800031b0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b20 +8000e1b2 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b20_str +800031dc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b21 +8000e1ec l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b21_str +8000320c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b22 +8000e226 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b22_str +80003238 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b23 +8000e260 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b23_str +80003268 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b24 +8000e29a l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b24_str +80003294 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b25 +8000e2d4 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b25_str +800032c0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b26 +8000e30e l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b26_str +800032ec l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b27 +8000e348 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b27_str +80003318 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b28 +8000e382 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b28_str +80003344 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b29 +8000e3bc l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b29_str +80003370 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b30 +8000e3f6 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b30_str +800033a0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b31 +8000e430 l .data 00000000 Zbkb_packh_cg_cmp_rs1_rs2_b31_str +800033cc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b0 +8000e46a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b0_str +800033f8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b1 +8000e4a2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b1_str +80003424 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b2 +8000e4da l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b2_str +80003454 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b3 +8000e512 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b3_str +80003488 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b4 +8000e54a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b4_str +800034b4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b5 +8000e582 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b5_str +800034e0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b6 +8000e5ba l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b6_str +8000350c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b7 +8000e5f2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b7_str +80003538 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b8 +8000e62a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b8_str +80003564 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b9 +8000e662 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b9_str +80003590 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b10 +8000e69a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b10_str +800035bc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b11 +8000e6d3 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b11_str +800035e8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b12 +8000e70c l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b12_str +8000361c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b13 +8000e745 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b13_str +80003648 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b14 +8000e77e l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b14_str +80003674 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b15 +8000e7b7 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b15_str +800036a0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b16 +8000e7f0 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b16_str +800036cc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b17 +8000e829 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b17_str +800036f8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b18 +8000e862 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b18_str +80003724 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b19 +8000e89b l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b19_str +80003750 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b20 +8000e8d4 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b20_str +8000377c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b21 +8000e90d l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b21_str +800037ac l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b22 +8000e946 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b22_str +800037d8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b23 +8000e97f l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b23_str +80003804 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b24 +8000e9b8 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b24_str +80003830 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b25 +8000e9f1 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b25_str +80003860 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b26 +8000ea2a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b26_str +8000388c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b27 +8000ea63 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b27_str +800038b8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b28 +8000ea9c l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b28_str +800038e8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b29 +8000ead5 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b29_str +80003914 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b30 +8000eb0e l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b30_str +80003940 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_b31 +8000eb47 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_b31_str +8000396c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b0 +8000eb80 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b0_str +80003998 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b1 +8000ebb8 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b1_str +800039c8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b2 +8000ebf0 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b2_str +800039f4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b3 +8000ec28 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b3_str +80003a28 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b4 +8000ec60 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b4_str +80003a54 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b5 +8000ec98 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b5_str +80003a80 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b6 +8000ecd0 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b6_str +80003ab4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b7 +8000ed08 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b7_str +80003ae0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b8 +8000ed40 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b8_str +80003b0c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b9 +8000ed78 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b9_str +80003b38 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b10 +8000edb0 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b10_str +80003b64 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b11 +8000ede9 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b11_str +80003b90 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b12 +8000ee22 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b12_str +80003bc4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b13 +8000ee5b l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b13_str +80003bf0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b14 +8000ee94 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b14_str +80003c1c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b15 +8000eecd l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b15_str +80003c48 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b16 +8000ef06 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b16_str +80003c74 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b17 +8000ef3f l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b17_str +80003ca0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b18 +8000ef78 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b18_str +80003cd0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b19 +8000efb1 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b19_str +80003cfc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b20 +8000efea l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b20_str +80003d28 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b21 +8000f023 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b21_str +80003d54 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b22 +8000f05c l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b22_str +80003d80 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b23 +8000f095 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b23_str +80003db0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b24 +8000f0ce l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b24_str +80003ddc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b25 +8000f107 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b25_str +80003e08 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b26 +8000f140 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b26_str +80003e34 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b27 +8000f179 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b27_str +80003e60 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b28 +8000f1b2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b28_str +80003e8c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b29 +8000f1eb l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b29_str +80003eb8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b30 +8000f224 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b30_str +80003ee4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs2_b31 +8000f25d l .data 00000000 Zbkb_packh_cg_cmp_rd_rs2_b31_str +80003f10 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b0 +8000f296 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b0_str +80003f3c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b1 +8000f2d2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b1_str +80003f68 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b2 +8000f30e l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b2_str +80003f94 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b3 +8000f34a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b3_str +80003fc8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b4 +8000f386 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b4_str +80003ff4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b5 +8000f3c2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b5_str +80004020 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b6 +8000f3fe l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b6_str +8000404c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b7 +8000f43a l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b7_str +80004078 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b8 +8000f476 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b8_str +800040a4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b9 +8000f4b2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b9_str +800040d4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b10 +8000f4ee l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b10_str +80004100 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b11 +8000f52b l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b11_str +8000412c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b12 +8000f568 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b12_str +80004160 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b13 +8000f5a5 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b13_str +8000418c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b14 +8000f5e2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b14_str +800041b8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b15 +8000f61f l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b15_str +800041e4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b16 +8000f65c l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b16_str +80004210 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b17 +8000f699 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b17_str +80004240 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b18 +8000f6d6 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b18_str +8000426c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b19 +8000f713 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b19_str +80004298 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b20 +8000f750 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b20_str +800042c8 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b21 +8000f78d l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b21_str +800042f4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b22 +8000f7ca l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b22_str +80004320 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b23 +8000f807 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b23_str +8000434c l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b24 +8000f844 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b24_str +80004378 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b25 +8000f881 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b25_str +800043a4 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b26 +8000f8be l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b26_str +800043d0 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b27 +8000f8fb l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b27_str +800043fc l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b28 +8000f938 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b28_str +80004428 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b29 +8000f975 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b29_str +80004454 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b30 +8000f9b2 l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b30_str +80004480 l .text.rvtest 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b31 +8000f9ef l .data 00000000 Zbkb_packh_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +800044b0 l .text.rvtest 00000000 exit_Mcleanup +800044b4 l .text.rvtest 00000000 resto_Medeleg +800044bc l .text.rvtest 00000000 resto_Msatp +800044c0 l .text.rvtest 00000000 resto_Mscratch +800044c8 l .text.rvtest 00000000 resto_Mxtvec +800044dc l .text.rvtest 00000000 resto_Mtramp +800044e0 l .text.rvtest 00000000 resto_Mloop +800044f8 l .text.rvtest 00000000 check_trap_sig_overflow +80004790 l .text.rvtest 00000000 trap_sig_overflow +80004630 l .text.rvtest 00000000 check_trap_sig_offset +800100af l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +800100e9 l .data 00000000 begin_debugstr +80010149 l .data 00000000 trap_sig_overflowstr +80010cf4 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011dc8 l .data 00000000 trap_sigptr +80011dc0 l .data 00000000 final_trap_sig_offset +800046f4 l .text.rvtest 00000000 check_abort_test +800055a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001029d l .data 00000000 trap_sig_offset_mismatch +80004710 l .text.rvtest 00000000 exit_cleanup +800047c4 l .text.rvtest 00000000 abort_test +8001010b l .data 00000000 abortstr +80010074 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004880 l .text.rvtest 00000000 trap_Mhandler +800049a0 l .text.rvtest 00000000 rvtest_Mendtest +800049c4 l .text.rvtest 00000000 common_Mhandler +80004a30 l .text.rvtest 00000000 spcl_M2mmode_test +80004a3c l .text.rvtest 00000000 spcl_Mchk4alt +80004a4c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a44 l .text.rvtest 00000000 spcl_Mparam_chk +800054d0 l .text.rvtest 00000000 Mrtn2mmode +80004fd4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a58 l .text.rvtest 00000000 Mgoto_mchk +80004a5c l .text.rvtest 00000000 tsbi_Mdispatch +80004a84 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a74 l .text.rvtest 00000000 tsbi_Mecall_test +80004af0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005240 l .text.rvtest 00000000 resto_Mrtn +80004ab0 l .text.rvtest 00000000 tsbi_Mgoto_m +80004ac0 l .text.rvtest 00000000 tsbi_Mgoto_s +80004adc l .text.rvtest 00000000 tsbi_Mgoto_u +80004aec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c70 l .text.rvtest 00000000 tsbi_instr_table +80004b20 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004b34 l .text.rvtest 00000000 found_instr +80004b78 l .text.rvtest 00000000 tsbi_instr_not_found +80004b64 l .text.rvtest 00000000 tsbi_instr_rtn +8001172b l .data 00000000 tsbi_instr_not_found_str +80007058 l .text.rvtest 00000000 failedtest_hex_to_str +8000fb98 l .data 00000000 ascii_buffer +800101b2 l .data 00000000 newlinestr +80004ff0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004fdc l .text.rvtest 00000000 Mint_sig_sv +80004ff0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000fb78 l .data 00000000 saved_xepc +8002082c l .data 00000000 sig_end_canary +80005088 l .text.rvtest 00000000 sv_Mvect +800102b4 l .data 00000000 sv_Mvect_str +8000512c l .text.rvtest 00000000 sv_Mcause +800103b6 l .data 00000000 sv_Mcause_str +80005260 l .text.rvtest 00000000 common_Mint_handler +80005154 l .text.rvtest 00000000 common_Mexcpt_handler +80005160 l .text.rvtest 00000000 vmem_adj_Mepc +800051b4 l .text.rvtest 00000000 sv_Mepc +80005188 l .text.rvtest 00000000 code_adj_Mepc +800051b0 l .text.rvtest 00000000 adj_Mepc +8000519c l .text.rvtest 00000000 data_adj_Mepc +800104b1 l .data 00000000 sv_Mepc_str +800051d4 l .text.rvtest 00000000 skpsv_Mepc +800051fc l .text.rvtest 00000000 adj_Mepc_rtn +80005208 l .text.rvtest 00000000 skp_adj_Mepc +8000520c l .text.rvtest 00000000 sv_Mtval +800105a4 l .data 00000000 sv_Mtval_str +8000522c l .text.rvtest 00000000 skp_Mtval +80005238 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005298 l .text.rvtest 00000000 spcl_Mhandler +80005274 l .text.rvtest 00000000 sv_Mip +80010717 l .data 00000000 sv_Mip_str +800052b4 l .text.rvtest 00000000 spcl_Mdispatch_handling +800052cc l .text.rvtest 00000000 spcl_Mdispatch +800052d0 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +800053d0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +80005520 l .text.rvtest 00000000 rtn_fm_mmode +8000550c l .text.rvtest 00000000 from_hs_u +800054fc l .text.rvtest 00000000 from_vs +8000fa30 l .data 00000000 begin_failure_scratch +800055dc l .text.rvtest 00000000 failedtest_saveregs +8000564c l .text.rvtest 00000000 failedtest_saveresults +8000fa30 l .data 00000000 failure_type +800057ec l .text.rvtest 00000000 failedtest_saveresults_trap +8000565c l .text.rvtest 00000000 failedtest_saveresults_int +80005774 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800057ac l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005ae0 l .text.rvtest 00000000 failedtest_saveresults_common +8000fb58 l .data 00000000 failure_diag_type +8000fb68 l .data 00000000 trap_diag_fail_str_ptr +80005aa0 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000fb60 l .data 00000000 trap_diag_subtype +80005ab4 l .text.rvtest 00000000 trap_diag_field_identified +8001069b l .data 00000000 sv_Mtval2_str +800106d9 l .data 00000000 sv_Mtinst_str +800102f4 l .data 00000000 sv_Svect_str +800103f4 l .data 00000000 sv_Scause_str +800104ed l .data 00000000 sv_Sepc_str +800105e1 l .data 00000000 sv_Stval_str +80010752 l .data 00000000 sv_Sip_str +80010334 l .data 00000000 sv_Hvect_str +80010432 l .data 00000000 sv_Hcause_str +80010529 l .data 00000000 sv_Hepc_str +8001061e l .data 00000000 sv_Htval_str +8001078d l .data 00000000 sv_Hip_str +80010375 l .data 00000000 sv_Vvect_str +80010471 l .data 00000000 sv_Vcause_str +80010566 l .data 00000000 sv_Vepc_str +8001065c l .data 00000000 sv_Vtval_str +800107c9 l .data 00000000 sv_Vip_str +80010806 l .data 00000000 Mclr_Mext_int_str +80010855 l .data 00000000 Mclr_Sext_int_str +80010950 l .data 00000000 Sclr_Sext_int_str +80010a4c l .data 00000000 Hclr_Sext_int_str +80005ad0 l .text.rvtest 00000000 trap_diag_generic_report +8000fb64 l .data 00000000 trap_diag_mode +80005b10 l .text.rvtest 00000000 failedtest_report +80005b10 l .text.rvtest 00000000 print_failstr +80005b88 l .text.rvtest 00000000 print_testnamestr +800101a0 l .data 00000000 testnamestr +80005bc8 l .text.rvtest 00000000 print_failure_test_name_str +8000fb50 l .data 00000000 failure_string_ptr +80005bd8 l .text.rvtest 00000000 print_newline_str +8000614c l .text.rvtest 00000000 failedtest_report_trap_detailed +800101b4 l .data 00000000 inststr +8000fb30 l .data 00000000 failing_instruction +800101c8 l .data 00000000 addrstr +8000fb38 l .data 00000000 failing_addr +80010bff l .data 00000000 regstr +80005db8 l .text.rvtest 00000000 failedtest_report_not_intreg +8000fb34 l .data 00000000 failing_reg +800070d4 l .text.rvtest 00000000 failedtest_dec_to_str +80005ecc l .text.rvtest 00000000 failedtest_report_print_regstr +80005e0c l .text.rvtest 00000000 failedtest_report_fpreg +80005e58 l .text.rvtest 00000000 failedtest_report_vecreg +80005e94 l .text.rvtest 00000000 failedtest_report_vxsat +80010d15 l .data 00000000 fflagsstr +80005f08 l .text.rvtest 00000000 failedtest_report_after_reg +80010bf8 l .data 00000000 vxsatstr +80010c10 l .data 00000000 badvalstr +80005f6c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000fb40 l .data 00000000 failing_value +80005f7c l .text.rvtest 00000000 failedtest_report_badval_done +8000604c l .text.rvtest 00000000 failedtest_report_diag +80010c27 l .data 00000000 expvalstr +8000600c l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000fb48 l .data 00000000 expected_value +8000601c l .text.rvtest 00000000 failedtest_report_expval_done +80006e04 l .text.rvtest 00000000 failedtest_report_end +800060cc l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006054 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010c3e l .data 00000000 failure_diag_bad_instr_str +80010c9c l .data 00000000 failure_diag_bad_ptr_str +80006210 l .text.rvtest 00000000 trap_report_offset_mismatch +80010d41 l .data 00000000 trap_diag_header_str +80010d6d l .data 00000000 trap_diag_origstr_label +80006c90 l .text.rvtest 00000000 trap_report_generic +8000654c l .text.rvtest 00000000 trap_report_field_mismatch +80010d7d l .data 00000000 trap_diag_expected_offset_str +80010da8 l .data 00000000 trap_diag_actual_offset_str +8000642c l .text.rvtest 00000000 trap_report_missing_traps +8000631c l .text.rvtest 00000000 trap_report_extra_traps +80010dd7 l .data 00000000 trap_diag_extra_traps_str +80010e3f l .data 00000000 trap_diag_diff_bytes_str +80010e66 l .data 00000000 trap_diag_extra_next_step_str +80010e03 l .data 00000000 trap_diag_missing_traps_str +80010f4e l .data 00000000 trap_diag_missing_next_step_str +80011035 l .data 00000000 trap_diag_handler_mode_str +800065e4 l .text.rvtest 00000000 trap_mode_m +80006624 l .text.rvtest 00000000 trap_mode_s +80006664 l .text.rvtest 00000000 trap_mode_h +800066a4 l .text.rvtest 00000000 trap_mode_v +80011071 l .data 00000000 trap_diag_mode_unknown_str +800066e0 l .text.rvtest 00000000 trap_mode_print +8001104f l .data 00000000 trap_diag_mode_m_str +80011057 l .data 00000000 trap_diag_mode_s_str +8001105f l .data 00000000 trap_diag_mode_hs_str +80011068 l .data 00000000 trap_diag_mode_vs_str +8001107a l .data 00000000 trap_diag_field_str +800067a4 l .text.rvtest 00000000 trap_field_vect +800067e4 l .text.rvtest 00000000 trap_field_cause +80006824 l .text.rvtest 00000000 trap_field_epc +80006864 l .text.rvtest 00000000 trap_field_tval +800068a4 l .text.rvtest 00000000 trap_field_ip +800068e4 l .text.rvtest 00000000 trap_field_tval2 +80006924 l .text.rvtest 00000000 trap_field_tinst +80006964 l .text.rvtest 00000000 trap_field_intid +800111d1 l .data 00000000 trap_diag_field_unknown_str +800069a0 l .text.rvtest 00000000 trap_field_print +80011094 l .data 00000000 trap_diag_field_vect_str +800110c5 l .data 00000000 trap_diag_field_cause_str +800110e5 l .data 00000000 trap_diag_field_epc_str +80011103 l .data 00000000 trap_diag_field_tval_str +80011122 l .data 00000000 trap_diag_field_ip_str +8001114a l .data 00000000 trap_diag_field_tval2_str +80011176 l .data 00000000 trap_diag_field_tinst_str +800111a2 l .data 00000000 trap_diag_field_intid_str +800111e0 l .data 00000000 trap_diag_expected_str +800111f7 l .data 00000000 trap_diag_actual_str +80006b3c l .text.rvtest 00000000 trap_field_not_cause +8001120e l .data 00000000 trap_diag_expected_cause_name_str +80006d74 l .text.rvtest 00000000 trap_cause_to_str +80011225 l .data 00000000 trap_diag_actual_cause_name_str +80006b3c l .text.rvtest 00000000 trap_field_not_epc +80006e50 l .text.rvtest 00000000 failedtest_print_csr_context +8001129b l .data 00000000 trap_diag_hint_vect_str +80011371 l .data 00000000 trap_diag_hint_cause_str +80011464 l .data 00000000 trap_diag_hint_epc_str +8001155f l .data 00000000 trap_diag_hint_tval_str +80011646 l .data 00000000 trap_diag_hint_ip_str +80011253 l .data 00000000 trap_diag_generic_str +8001023c l .data 00000000 xepcinstrstr +80006d98 l .text.rvtest 00000000 trap_cause_interrupt +80006d78 l .text.rvtest 00000000 trap_cause_exception +80006dc4 l .text.rvtest 00000000 trap_cause_unknown +8000fbc0 l .data 00000000 trap_excpt_name_tbl +8000fc20 l .data 00000000 trap_int_name_tbl +8001005e l .data 00000000 trap_cause_unknown_str +80006e48 l .text.rvtest 00000000 failedtest_terminate +8000fb70 l .data 00000000 csr_context_ret_addr +8001025d l .data 00000000 mepcstr +8001026d l .data 00000000 mcausestr +8000fb80 l .data 00000000 saved_xcause +8001027d l .data 00000000 mtvalstr +8000fb88 l .data 00000000 saved_xtval +8001028d l .data 00000000 mstatusstr +8000fb90 l .data 00000000 saved_xstatus +80007098 l .text.rvtest 00000000 failedtest_hex_to_str_loop +800070b4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +800070b8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011770 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010d1d l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fbc0 l .data 00000000 end_failure_scratch +8000fc60 l .data 00000000 trap_excpt_name_0 +8000fc80 l .data 00000000 trap_excpt_name_1 +8000fc9a l .data 00000000 trap_excpt_name_2 +8000fcaf l .data 00000000 trap_excpt_name_3 +8000fcbb l .data 00000000 trap_excpt_name_4 +8000fcd4 l .data 00000000 trap_excpt_name_5 +8000fce7 l .data 00000000 trap_excpt_name_6 +8000fd05 l .data 00000000 trap_excpt_name_7 +8000fd1d l .data 00000000 trap_excpt_name_8 +8000fd3b l .data 00000000 trap_excpt_name_9 +8000fd59 l .data 00000000 trap_excpt_name_10 +8000fd78 l .data 00000000 trap_excpt_name_11 +8000fd96 l .data 00000000 trap_excpt_name_12 +8000fdae l .data 00000000 trap_excpt_name_13 +8000fdbf l .data 00000000 trap_excpt_name_14 +8000fdce l .data 00000000 trap_excpt_name_15 +8000fde4 l .data 00000000 trap_excpt_name_16 +8000fdf1 l .data 00000000 trap_excpt_name_17 +8000fe00 l .data 00000000 trap_excpt_name_18 +8000fe10 l .data 00000000 trap_excpt_name_19 +8000fe20 l .data 00000000 trap_excpt_name_20 +8000fe3e l .data 00000000 trap_excpt_name_21 +8000fe55 l .data 00000000 trap_excpt_name_22 +8000fe6a l .data 00000000 trap_excpt_name_23 +8000fe86 l .data 00000000 trap_int_name_0 +8000fe9e l .data 00000000 trap_int_name_1 +8000febd l .data 00000000 trap_int_name_2 +8000fee4 l .data 00000000 trap_int_name_3 +8000ff00 l .data 00000000 trap_int_name_4 +8000ff18 l .data 00000000 trap_int_name_5 +8000ff34 l .data 00000000 trap_int_name_6 +8000ff58 l .data 00000000 trap_int_name_7 +8000ff71 l .data 00000000 trap_int_name_8 +8000ff89 l .data 00000000 trap_int_name_9 +8000ffa8 l .data 00000000 trap_int_name_10 +8000ffcf l .data 00000000 trap_int_name_11 +8000ffeb l .data 00000000 trap_int_name_12 +80010010 l .data 00000000 trap_int_name_13 +8001002c l .data 00000000 trap_int_name_14 +80010045 l .data 00000000 trap_int_name_15 +80010209 l .data 00000000 xepcstr +800108a7 l .data 00000000 Mclr_Vext_int_str +80010901 l .data 00000000 Sclr_Mext_int_str +800109a2 l .data 00000000 Sclr_Vext_int_str +800109fc l .data 00000000 Hclr_Mext_int_str +80010a9f l .data 00000000 Hclr_Vext_int_str +80010afa l .data 00000000 Vclr_Mext_int_str +80010b4a l .data 00000000 Vclr_Sext_int_str +80010b9d l .data 00000000 Vclr_Vext_int_str +8001123c l .data 00000000 trap_diag_curr_xepc_str +80020830 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80020830 g .data 00000000 rvtest_sig_end +800049d8 g .text.rvtest 00000000 common_Mentry +800044f8 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011770 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +800044a0 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011770 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8001176f g .data 00000000 rvtest_data_end +800044a0 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020a00 g .tohost 00000000 fromhost +80020900 g .tohost 00000000 tohost +80004750 g .text.rvtest 00000000 rvtest_fail_summary +80004800 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7c52593a +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x11e6978b +80000048: 0001a303 lw x6,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_packh_cg_cp_rs1_b0: + packh x11, x0, x6 # perform operation +80000050: 086075b3 packh x11,x0,x6 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_packh_cg_cp_rs1_b0, Zbkb_packh_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00b20863 beq x4,x11,80000068 +8000005c: 4e4052ef jal x5,80005540 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xed1cbdd2 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xf1b17109 +80000074: 0001ab83 lw x23,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_packh_cg_cp_rs1_b1: + packh x0, x1, x23 # perform operation +8000007c: 0970f033 packh x0,x1,x23 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_packh_cg_cp_rs1_b1, Zbkb_packh_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00020863 beq x4,x0,80000094 +80000088: 4b8052ef jal x5,80005540 +8000008c: 8000007c .word 0x8000007c +80000090: 80009022 .word 0x80009022 +80000094: 00410113 addi x2,x2,4 + + mv x10, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010513 addi x10,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x6e8e918d +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7cafa981 +800000a4: 0001a883 lw x17,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_packh_cg_cp_rs1_b2: + packh x26, x2, x17 # perform operation +800000ac: 09117d33 packh x26,x2,x17 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkb_packh_cg_cp_rs1_b2, Zbkb_packh_cg_cp_rs1_b2_str) +800000b0: 00052203 lw x4,0(x10) +800000b4: 01a20863 beq x4,x26,800000c4 +800000b8: 488052ef jal x5,80005540 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009054 .word 0x80009054 +800000c4: 00450513 addi x10,x10,4 + + mv x11, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x54370b97 +800000cc: 0005a183 lw x3,0(x11) +800000d0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x25b64a17 +800000d4: 0005af03 lw x30,0(x11) +800000d8: 00458593 addi x11,x11,4 + +800000dc : +Zbkb_packh_cg_cp_rs1_b3: + packh x28, x3, x30 # perform operation +800000dc: 09e1fe33 packh x28,x3,x30 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkb_packh_cg_cp_rs1_b3, Zbkb_packh_cg_cp_rs1_b3_str) +800000e0: 00052203 lw x4,0(x10) +800000e4: 01c20863 beq x4,x28,800000f4 +800000e8: 458052ef jal x5,80005540 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009086 .word 0x80009086 +800000f4: 00450513 addi x10,x10,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x91acf566 +80000100: 0005a203 lw x4,0(x11) +80000104: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x450e0e94 +80000108: 0005a703 lw x14,0(x11) +8000010c: 00458593 addi x11,x11,4 + +80000110 : +Zbkb_packh_cg_cp_rs1_b4: + packh x31, x4, x14 # perform operation +80000110: 08e27fb3 packh x31,x4,x14 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zbkb_packh_cg_cp_rs1_b4, Zbkb_packh_cg_cp_rs1_b4_str) +80000114: 00052383 lw x7,0(x10) +80000118: 01f38863 beq x7,x31,80000128 +8000011c: 43c0546f jal x8,80005558 +80000120: 80000110 .word 0x80000110 +80000124: 800090b8 .word 0x800090b8 +80000128: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xc3cd0f69 +8000012c: 0005a283 lw x5,0(x11) +80000130: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x99c3ea3b +80000134: 0005a783 lw x15,0(x11) +80000138: 00458593 addi x11,x11,4 + +8000013c : +Zbkb_packh_cg_cp_rs1_b5: + packh x1, x5, x15 # perform operation +8000013c: 08f2f0b3 packh x1,x5,x15 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_packh_cg_cp_rs1_b5, Zbkb_packh_cg_cp_rs1_b5_str) +80000140: 00052383 lw x7,0(x10) +80000144: 00138863 beq x7,x1,80000154 +80000148: 4100546f jal x8,80005558 +8000014c: 8000013c .word 0x8000013c +80000150: 800090ea .word 0x800090ea +80000154: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x72e1e958 +80000158: 0005a303 lw x6,0(x11) +8000015c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xf7741f4a +80000160: 0005ad83 lw x27,0(x11) +80000164: 00458593 addi x11,x11,4 + +80000168 : +Zbkb_packh_cg_cp_rs1_b6: + packh x17, x6, x27 # perform operation +80000168: 09b378b3 packh x17,x6,x27 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zbkb_packh_cg_cp_rs1_b6, Zbkb_packh_cg_cp_rs1_b6_str) +8000016c: 00052383 lw x7,0(x10) +80000170: 01138863 beq x7,x17,80000180 +80000174: 3e40546f jal x8,80005558 +80000178: 80000168 .word 0x80000168 +8000017c: 8000911c .word 0x8000911c +80000180: 00450513 addi x10,x10,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x4017b3e0 +8000018c: 0005a383 lw x7,0(x11) +80000190: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0xb9a15a54 +80000194: 0005a083 lw x1,0(x11) +80000198: 00458593 addi x11,x11,4 + +8000019c : +Zbkb_packh_cg_cp_rs1_b7: + packh x31, x7, x1 # perform operation +8000019c: 0813ffb3 packh x31,x7,x1 + # Check if x31 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x31, Zbkb_packh_cg_cp_rs1_b7, Zbkb_packh_cg_cp_rs1_b7_str) +800001a0: 00052683 lw x13,0(x10) +800001a4: 01f68863 beq x13,x31,800001b4 +800001a8: 3d80576f jal x14,80005580 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000914e .word 0x8000914e +800001b4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x221fa16a +800001b8: 0005a403 lw x8,0(x11) +800001bc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xefb19c88 +800001c0: 0005ad83 lw x27,0(x11) +800001c4: 00458593 addi x11,x11,4 + +800001c8 : +Zbkb_packh_cg_cp_rs1_b8: + packh x26, x8, x27 # perform operation +800001c8: 09b47d33 packh x26,x8,x27 + # Check if x26 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x26, Zbkb_packh_cg_cp_rs1_b8, Zbkb_packh_cg_cp_rs1_b8_str) +800001cc: 00052683 lw x13,0(x10) +800001d0: 01a68863 beq x13,x26,800001e0 +800001d4: 3ac0576f jal x14,80005580 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009180 .word 0x80009180 +800001e0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x6b37810b +800001e4: 0005a483 lw x9,0(x11) +800001e8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xcd20a65a +800001ec: 0005a903 lw x18,0(x11) +800001f0: 00458593 addi x11,x11,4 + +800001f4 : +Zbkb_packh_cg_cp_rs1_b9: + packh x19, x9, x18 # perform operation +800001f4: 0924f9b3 packh x19,x9,x18 + # Check if x19 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x19, Zbkb_packh_cg_cp_rs1_b9, Zbkb_packh_cg_cp_rs1_b9_str) +800001f8: 00052683 lw x13,0(x10) +800001fc: 01368863 beq x13,x19,8000020c +80000200: 3800576f jal x14,80005580 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091b2 .word 0x800091b2 +8000020c: 00450513 addi x10,x10,4 + + mv x12, x10 # switch signature pointer register to avoid conflict with test +80000210: 00050613 addi x12,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x886d9fde +80000214: 0005a503 lw x10,0(x11) +80000218: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x21d19831 +8000021c: 0005a183 lw x3,0(x11) +80000220: 00458593 addi x11,x11,4 + +80000224 : +Zbkb_packh_cg_cp_rs1_b10: + packh x16, x10, x3 # perform operation +80000224: 08357833 packh x16,x10,x3 + # Check if x16 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x16, Zbkb_packh_cg_cp_rs1_b10, Zbkb_packh_cg_cp_rs1_b10_str) +80000228: 00062683 lw x13,0(x12) +8000022c: 01068863 beq x13,x16,8000023c +80000230: 3500576f jal x14,80005580 +80000234: 80000224 .word 0x80000224 +80000238: 800091e5 .word 0x800091e5 +8000023c: 00460613 addi x12,x12,4 + + mv x16, x11 # switch data pointer register to avoid conflict with test +80000240: 00058813 addi x16,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x41b3799f +80000244: 00082583 lw x11,0(x16) +80000248: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x5635b2ce +8000024c: 00082283 lw x5,0(x16) +80000250: 00480813 addi x16,x16,4 + +80000254 : +Zbkb_packh_cg_cp_rs1_b11: + packh x31, x11, x5 # perform operation +80000254: 0855ffb3 packh x31,x11,x5 + # Check if x31 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x31, Zbkb_packh_cg_cp_rs1_b11, Zbkb_packh_cg_cp_rs1_b11_str) +80000258: 00062683 lw x13,0(x12) +8000025c: 01f68863 beq x13,x31,8000026c +80000260: 3200576f jal x14,80005580 +80000264: 80000254 .word 0x80000254 +80000268: 80009219 .word 0x80009219 +8000026c: 00460613 addi x12,x12,4 + + mv x31, x12 # switch signature pointer register to avoid conflict with test +80000270: 00060f93 addi x31,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x5859c4ab +80000274: 00082603 lw x12,0(x16) +80000278: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xdd382023 +8000027c: 00082483 lw x9,0(x16) +80000280: 00480813 addi x16,x16,4 + +80000284 : +Zbkb_packh_cg_cp_rs1_b12: + packh x15, x12, x9 # perform operation +80000284: 089677b3 packh x15,x12,x9 + # Check if x15 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x15, Zbkb_packh_cg_cp_rs1_b12, Zbkb_packh_cg_cp_rs1_b12_str) +80000288: 000fa683 lw x13,0(x31) +8000028c: 00f68863 beq x13,x15,8000029c +80000290: 2f00576f jal x14,80005580 +80000294: 80000284 .word 0x80000284 +80000298: 8000924d .word 0x8000924d +8000029c: 004f8f93 addi x31,x31,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800002a0: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800002a4: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x09603318 +800002a8: 00082683 lw x13,0(x16) +800002ac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x4a49e20f +800002b0: 00082b83 lw x23,0(x16) +800002b4: 00480813 addi x16,x16,4 + +800002b8 : +Zbkb_packh_cg_cp_rs1_b13: + packh x12, x13, x23 # perform operation +800002b8: 0976f633 packh x12,x13,x23 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zbkb_packh_cg_cp_rs1_b13, Zbkb_packh_cg_cp_rs1_b13_str) +800002bc: 000fa203 lw x4,0(x31) +800002c0: 00c20863 beq x4,x12,800002d0 +800002c4: 27c052ef jal x5,80005540 +800002c8: 800002b8 .word 0x800002b8 +800002cc: 80009281 .word 0x80009281 +800002d0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xedb1f2c8 +800002d4: 00082703 lw x14,0(x16) +800002d8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x1c8d2ba2 +800002dc: 00082003 lw x0,0(x16) +800002e0: 00480813 addi x16,x16,4 + +800002e4 : +Zbkb_packh_cg_cp_rs1_b14: + packh x19, x14, x0 # perform operation +800002e4: 080779b3 packh x19,x14,x0 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_packh_cg_cp_rs1_b14, Zbkb_packh_cg_cp_rs1_b14_str) +800002e8: 000fa203 lw x4,0(x31) +800002ec: 01320863 beq x4,x19,800002fc +800002f0: 250052ef jal x5,80005540 +800002f4: 800002e4 .word 0x800002e4 +800002f8: 800092b5 .word 0x800092b5 +800002fc: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x01ddfdcf +80000300: 00082783 lw x15,0(x16) +80000304: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xcb823638 +80000308: 00082403 lw x8,0(x16) +8000030c: 00480813 addi x16,x16,4 + +80000310 : +Zbkb_packh_cg_cp_rs1_b15: + packh x26, x15, x8 # perform operation +80000310: 0887fd33 packh x26,x15,x8 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_packh_cg_cp_rs1_b15, Zbkb_packh_cg_cp_rs1_b15_str) +80000314: 000fa203 lw x4,0(x31) +80000318: 01a20863 beq x4,x26,80000328 +8000031c: 224052ef jal x5,80005540 +80000320: 80000310 .word 0x80000310 +80000324: 800092e9 .word 0x800092e9 +80000328: 004f8f93 addi x31,x31,4 + + mv x23, x16 # switch data pointer register to avoid conflict with test +8000032c: 00080b93 addi x23,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x30d48996 +80000330: 000ba803 lw x16,0(x23) +80000334: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x03636e9e +80000338: 000ba683 lw x13,0(x23) +8000033c: 004b8b93 addi x23,x23,4 + +80000340 : +Zbkb_packh_cg_cp_rs1_b16: + packh x10, x16, x13 # perform operation +80000340: 08d87533 packh x10,x16,x13 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zbkb_packh_cg_cp_rs1_b16, Zbkb_packh_cg_cp_rs1_b16_str) +80000344: 000fa203 lw x4,0(x31) +80000348: 00a20863 beq x4,x10,80000358 +8000034c: 1f4052ef jal x5,80005540 +80000350: 80000340 .word 0x80000340 +80000354: 8000931d .word 0x8000931d +80000358: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xe26e6e20 +8000035c: 000ba883 lw x17,0(x23) +80000360: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x3e5bb072 +80000364: 000ba703 lw x14,0(x23) +80000368: 004b8b93 addi x23,x23,4 + +8000036c : +Zbkb_packh_cg_cp_rs1_b17: + packh x15, x17, x14 # perform operation +8000036c: 08e8f7b3 packh x15,x17,x14 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zbkb_packh_cg_cp_rs1_b17, Zbkb_packh_cg_cp_rs1_b17_str) +80000370: 000fa203 lw x4,0(x31) +80000374: 00f20863 beq x4,x15,80000384 +80000378: 1c8052ef jal x5,80005540 +8000037c: 8000036c .word 0x8000036c +80000380: 80009351 .word 0x80009351 +80000384: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x8ba1d919 +80000388: 000ba903 lw x18,0(x23) +8000038c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x749d4ff0 +80000390: 000ba383 lw x7,0(x23) +80000394: 004b8b93 addi x23,x23,4 + +80000398 : +Zbkb_packh_cg_cp_rs1_b18: + packh x17, x18, x7 # perform operation +80000398: 087978b3 packh x17,x18,x7 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zbkb_packh_cg_cp_rs1_b18, Zbkb_packh_cg_cp_rs1_b18_str) +8000039c: 000fa203 lw x4,0(x31) +800003a0: 01120863 beq x4,x17,800003b0 +800003a4: 19c052ef jal x5,80005540 +800003a8: 80000398 .word 0x80000398 +800003ac: 80009385 .word 0x80009385 +800003b0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x2ee12e63 +800003b4: 000ba983 lw x19,0(x23) +800003b8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x5082aee4 +800003bc: 000bab03 lw x22,0(x23) +800003c0: 004b8b93 addi x23,x23,4 + +800003c4 : +Zbkb_packh_cg_cp_rs1_b19: + packh x6, x19, x22 # perform operation +800003c4: 0969f333 packh x6,x19,x22 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zbkb_packh_cg_cp_rs1_b19, Zbkb_packh_cg_cp_rs1_b19_str) +800003c8: 000fa203 lw x4,0(x31) +800003cc: 00620863 beq x4,x6,800003dc +800003d0: 170052ef jal x5,80005540 +800003d4: 800003c4 .word 0x800003c4 +800003d8: 800093b9 .word 0x800093b9 +800003dc: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xe1facbf1 +800003e0: 000baa03 lw x20,0(x23) +800003e4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x87c9ebf3 +800003e8: 000ba483 lw x9,0(x23) +800003ec: 004b8b93 addi x23,x23,4 + +800003f0 : +Zbkb_packh_cg_cp_rs1_b20: + packh x21, x20, x9 # perform operation +800003f0: 089a7ab3 packh x21,x20,x9 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zbkb_packh_cg_cp_rs1_b20, Zbkb_packh_cg_cp_rs1_b20_str) +800003f4: 000fa203 lw x4,0(x31) +800003f8: 01520863 beq x4,x21,80000408 +800003fc: 144052ef jal x5,80005540 +80000400: 800003f0 .word 0x800003f0 +80000404: 800093ed .word 0x800093ed +80000408: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x904c036a +8000040c: 000baa83 lw x21,0(x23) +80000410: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x117d104d +80000414: 000bad03 lw x26,0(x23) +80000418: 004b8b93 addi x23,x23,4 + +8000041c : +Zbkb_packh_cg_cp_rs1_b21: + packh x22, x21, x26 # perform operation +8000041c: 09aafb33 packh x22,x21,x26 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zbkb_packh_cg_cp_rs1_b21, Zbkb_packh_cg_cp_rs1_b21_str) +80000420: 000fa203 lw x4,0(x31) +80000424: 01620863 beq x4,x22,80000434 +80000428: 118052ef jal x5,80005540 +8000042c: 8000041c .word 0x8000041c +80000430: 80009421 .word 0x80009421 +80000434: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x8cd110d0 +80000438: 000bab03 lw x22,0(x23) +8000043c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x58d2ff40 +80000440: 000bae83 lw x29,0(x23) +80000444: 004b8b93 addi x23,x23,4 + +80000448 : +Zbkb_packh_cg_cp_rs1_b22: + packh x27, x22, x29 # perform operation +80000448: 09db7db3 packh x27,x22,x29 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zbkb_packh_cg_cp_rs1_b22, Zbkb_packh_cg_cp_rs1_b22_str) +8000044c: 000fa203 lw x4,0(x31) +80000450: 01b20863 beq x4,x27,80000460 +80000454: 0ec052ef jal x5,80005540 +80000458: 80000448 .word 0x80000448 +8000045c: 80009455 .word 0x80009455 +80000460: 004f8f93 addi x31,x31,4 + + mv x27, x23 # switch data pointer register to avoid conflict with test +80000464: 000b8d93 addi x27,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xd91b9002 +80000468: 000dab83 lw x23,0(x27) +8000046c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x9b421942 +80000470: 000da803 lw x16,0(x27) +80000474: 004d8d93 addi x27,x27,4 + +80000478 : +Zbkb_packh_cg_cp_rs1_b23: + packh x28, x23, x16 # perform operation +80000478: 090bfe33 packh x28,x23,x16 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_packh_cg_cp_rs1_b23, Zbkb_packh_cg_cp_rs1_b23_str) +8000047c: 000fa203 lw x4,0(x31) +80000480: 01c20863 beq x4,x28,80000490 +80000484: 0bc052ef jal x5,80005540 +80000488: 80000478 .word 0x80000478 +8000048c: 80009489 .word 0x80009489 +80000490: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x03074e42 +80000494: 000dac03 lw x24,0(x27) +80000498: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x473b3dc6 +8000049c: 000da603 lw x12,0(x27) +800004a0: 004d8d93 addi x27,x27,4 + +800004a4 : +Zbkb_packh_cg_cp_rs1_b24: + packh x19, x24, x12 # perform operation +800004a4: 08cc79b3 packh x19,x24,x12 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_packh_cg_cp_rs1_b24, Zbkb_packh_cg_cp_rs1_b24_str) +800004a8: 000fa203 lw x4,0(x31) +800004ac: 01320863 beq x4,x19,800004bc +800004b0: 090052ef jal x5,80005540 +800004b4: 800004a4 .word 0x800004a4 +800004b8: 800094bd .word 0x800094bd +800004bc: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xd832bc42 +800004c0: 000dac83 lw x25,0(x27) +800004c4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0xabab0f99 +800004c8: 000da903 lw x18,0(x27) +800004cc: 004d8d93 addi x27,x27,4 + +800004d0 : +Zbkb_packh_cg_cp_rs1_b25: + packh x12, x25, x18 # perform operation +800004d0: 092cf633 packh x12,x25,x18 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zbkb_packh_cg_cp_rs1_b25, Zbkb_packh_cg_cp_rs1_b25_str) +800004d4: 000fa203 lw x4,0(x31) +800004d8: 00c20863 beq x4,x12,800004e8 +800004dc: 064052ef jal x5,80005540 +800004e0: 800004d0 .word 0x800004d0 +800004e4: 800094f1 .word 0x800094f1 +800004e8: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x0c90c60b +800004ec: 000dad03 lw x26,0(x27) +800004f0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0xcfb71f7b +800004f4: 000da583 lw x11,0(x27) +800004f8: 004d8d93 addi x27,x27,4 + +800004fc : +Zbkb_packh_cg_cp_rs1_b26: + packh x15, x26, x11 # perform operation +800004fc: 08bd77b3 packh x15,x26,x11 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zbkb_packh_cg_cp_rs1_b26, Zbkb_packh_cg_cp_rs1_b26_str) +80000500: 000fa203 lw x4,0(x31) +80000504: 00f20863 beq x4,x15,80000514 +80000508: 038052ef jal x5,80005540 +8000050c: 800004fc .word 0x800004fc +80000510: 80009525 .word 0x80009525 +80000514: 004f8f93 addi x31,x31,4 + + mv x3, x27 # switch data pointer register to avoid conflict with test +80000518: 000d8193 addi x3,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x9b849aa5 +8000051c: 0001ad83 lw x27,0(x3) +80000520: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x46aecf3d +80000524: 0001ae83 lw x29,0(x3) +80000528: 00418193 addi x3,x3,4 + +8000052c : +Zbkb_packh_cg_cp_rs1_b27: + packh x28, x27, x29 # perform operation +8000052c: 09ddfe33 packh x28,x27,x29 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_packh_cg_cp_rs1_b27, Zbkb_packh_cg_cp_rs1_b27_str) +80000530: 000fa203 lw x4,0(x31) +80000534: 01c20863 beq x4,x28,80000544 +80000538: 008052ef jal x5,80005540 +8000053c: 8000052c .word 0x8000052c +80000540: 80009559 .word 0x80009559 +80000544: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x01185d5c +80000548: 0001ae03 lw x28,0(x3) +8000054c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x808c7255 +80000550: 0001a883 lw x17,0(x3) +80000554: 00418193 addi x3,x3,4 + +80000558 : +Zbkb_packh_cg_cp_rs1_b28: + packh x1, x28, x17 # perform operation +80000558: 091e70b3 packh x1,x28,x17 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zbkb_packh_cg_cp_rs1_b28, Zbkb_packh_cg_cp_rs1_b28_str) +8000055c: 000fa203 lw x4,0(x31) +80000560: 00120863 beq x4,x1,80000570 +80000564: 7dd042ef jal x5,80005540 +80000568: 80000558 .word 0x80000558 +8000056c: 8000958d .word 0x8000958d +80000570: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xeafbd124 +80000574: 0001ae83 lw x29,0(x3) +80000578: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x6c888f4a +8000057c: 0001a783 lw x15,0(x3) +80000580: 00418193 addi x3,x3,4 + +80000584 : +Zbkb_packh_cg_cp_rs1_b29: + packh x26, x29, x15 # perform operation +80000584: 08fefd33 packh x26,x29,x15 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_packh_cg_cp_rs1_b29, Zbkb_packh_cg_cp_rs1_b29_str) +80000588: 000fa203 lw x4,0(x31) +8000058c: 01a20863 beq x4,x26,8000059c +80000590: 7b1042ef jal x5,80005540 +80000594: 80000584 .word 0x80000584 +80000598: 800095c1 .word 0x800095c1 +8000059c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x96b406d3 +800005a0: 0001af03 lw x30,0(x3) +800005a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xd999ea7f +800005a8: 0001ac83 lw x25,0(x3) +800005ac: 00418193 addi x3,x3,4 + +800005b0 : +Zbkb_packh_cg_cp_rs1_b30: + packh x19, x30, x25 # perform operation +800005b0: 099f79b3 packh x19,x30,x25 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_packh_cg_cp_rs1_b30, Zbkb_packh_cg_cp_rs1_b30_str) +800005b4: 000fa203 lw x4,0(x31) +800005b8: 01320863 beq x4,x19,800005c8 +800005bc: 785042ef jal x5,80005540 +800005c0: 800005b0 .word 0x800005b0 +800005c4: 800095f5 .word 0x800095f5 +800005c8: 004f8f93 addi x31,x31,4 + + mv x6, x31 # switch signature pointer register to avoid conflict with test +800005cc: 000f8313 addi x6,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7140952f +800005d0: 0001af83 lw x31,0(x3) +800005d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xfff5eb5e +800005d8: 0001a883 lw x17,0(x3) +800005dc: 00418193 addi x3,x3,4 + +800005e0 : +Zbkb_packh_cg_cp_rs1_b31: + packh x25, x31, x17 # perform operation +800005e0: 091ffcb3 packh x25,x31,x17 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_packh_cg_cp_rs1_b31, Zbkb_packh_cg_cp_rs1_b31_str) +800005e4: 00032203 lw x4,0(x6) +800005e8: 01920863 beq x4,x25,800005f8 +800005ec: 755042ef jal x5,80005540 +800005f0: 800005e0 .word 0x800005e0 +800005f4: 80009629 .word 0x80009629 +800005f8: 00430313 addi x6,x6,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xcecec3ab +800005fc: 0001a703 lw x14,0(x3) +80000600: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x200ac97a +80000604: 0001a003 lw x0,0(x3) +80000608: 00418193 addi x3,x3,4 + +8000060c : +Zbkb_packh_cg_cp_rs2_b0: + packh x22, x14, x0 # perform operation +8000060c: 08077b33 packh x22,x14,x0 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b0, Zbkb_packh_cg_cp_rs2_b0_str) +80000610: 00032203 lw x4,0(x6) +80000614: 01620863 beq x4,x22,80000624 +80000618: 729042ef jal x5,80005540 +8000061c: 8000060c .word 0x8000060c +80000620: 8000965d .word 0x8000965d +80000624: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x51212853 +80000628: 0001a383 lw x7,0(x3) +8000062c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x7e14e35c +80000630: 0001a083 lw x1,0(x3) +80000634: 00418193 addi x3,x3,4 + +80000638 : +Zbkb_packh_cg_cp_rs2_b1: + packh x20, x7, x1 # perform operation +80000638: 0813fa33 packh x20,x7,x1 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkb_packh_cg_cp_rs2_b1, Zbkb_packh_cg_cp_rs2_b1_str) +8000063c: 00032203 lw x4,0(x6) +80000640: 01420863 beq x4,x20,80000650 +80000644: 6fd042ef jal x5,80005540 +80000648: 80000638 .word 0x80000638 +8000064c: 80009690 .word 0x80009690 +80000650: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x62e67d3f +80000654: 0001a403 lw x8,0(x3) +80000658: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xdddf61f7 +8000065c: 0001a103 lw x2,0(x3) +80000660: 00418193 addi x3,x3,4 + +80000664 : +Zbkb_packh_cg_cp_rs2_b2: + packh x22, x8, x2 # perform operation +80000664: 08247b33 packh x22,x8,x2 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b2, Zbkb_packh_cg_cp_rs2_b2_str) +80000668: 00032203 lw x4,0(x6) +8000066c: 01620863 beq x4,x22,8000067c +80000670: 6d1042ef jal x5,80005540 +80000674: 80000664 .word 0x80000664 +80000678: 800096c3 .word 0x800096c3 +8000067c: 00430313 addi x6,x6,4 + + mv x9, x3 # switch data pointer register to avoid conflict with test +80000680: 00018493 addi x9,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xad26f2df +80000684: 0004a903 lw x18,0(x9) +80000688: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x2a8c1b60 +8000068c: 0004a183 lw x3,0(x9) +80000690: 00448493 addi x9,x9,4 + +80000694 : +Zbkb_packh_cg_cp_rs2_b3: + packh x23, x18, x3 # perform operation +80000694: 08397bb3 packh x23,x18,x3 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_packh_cg_cp_rs2_b3, Zbkb_packh_cg_cp_rs2_b3_str) +80000698: 00032203 lw x4,0(x6) +8000069c: 01720863 beq x4,x23,800006ac +800006a0: 6a1042ef jal x5,80005540 +800006a4: 80000694 .word 0x80000694 +800006a8: 800096f6 .word 0x800096f6 +800006ac: 00430313 addi x6,x6,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800006b0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800006b4: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x0d3e88fd +800006b8: 0004a283 lw x5,0(x9) +800006bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x12943999 +800006c0: 0004a203 lw x4,0(x9) +800006c4: 00448493 addi x9,x9,4 + +800006c8 : +Zbkb_packh_cg_cp_rs2_b4: + packh x12, x5, x4 # perform operation +800006c8: 0842f633 packh x12,x5,x4 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkb_packh_cg_cp_rs2_b4, Zbkb_packh_cg_cp_rs2_b4_str) +800006cc: 00032383 lw x7,0(x6) +800006d0: 00c38863 beq x7,x12,800006e0 +800006d4: 6850446f jal x8,80005558 +800006d8: 800006c8 .word 0x800006c8 +800006dc: 80009729 .word 0x80009729 +800006e0: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x83a89e2b +800006e4: 0004a583 lw x11,0(x9) +800006e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x8f0fbc36 +800006ec: 0004a283 lw x5,0(x9) +800006f0: 00448493 addi x9,x9,4 + +800006f4 : +Zbkb_packh_cg_cp_rs2_b5: + packh x23, x11, x5 # perform operation +800006f4: 0855fbb3 packh x23,x11,x5 + # Check if x23 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x23, Zbkb_packh_cg_cp_rs2_b5, Zbkb_packh_cg_cp_rs2_b5_str) +800006f8: 00032383 lw x7,0(x6) +800006fc: 01738863 beq x7,x23,8000070c +80000700: 6590446f jal x8,80005558 +80000704: 800006f4 .word 0x800006f4 +80000708: 8000975c .word 0x8000975c +8000070c: 00430313 addi x6,x6,4 + + mv x28, x6 # switch signature pointer register to avoid conflict with test +80000710: 00030e13 addi x28,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x399c69ba +80000714: 0004a503 lw x10,0(x9) +80000718: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x198188e2 +8000071c: 0004a303 lw x6,0(x9) +80000720: 00448493 addi x9,x9,4 + +80000724 : +Zbkb_packh_cg_cp_rs2_b6: + packh x11, x10, x6 # perform operation +80000724: 086575b3 packh x11,x10,x6 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zbkb_packh_cg_cp_rs2_b6, Zbkb_packh_cg_cp_rs2_b6_str) +80000728: 000e2383 lw x7,0(x28) +8000072c: 00b38863 beq x7,x11,8000073c +80000730: 6290446f jal x8,80005558 +80000734: 80000724 .word 0x80000724 +80000738: 8000978f .word 0x8000978f +8000073c: 004e0e13 addi x28,x28,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000740: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000744: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x6affb142 +80000748: 0004ad03 lw x26,0(x9) +8000074c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xeaa81136 +80000750: 0004a383 lw x7,0(x9) +80000754: 00448493 addi x9,x9,4 + +80000758 : +Zbkb_packh_cg_cp_rs2_b7: + packh x22, x26, x7 # perform operation +80000758: 087d7b33 packh x22,x26,x7 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b7, Zbkb_packh_cg_cp_rs2_b7_str) +8000075c: 000e2203 lw x4,0(x28) +80000760: 01620863 beq x4,x22,80000770 +80000764: 5dd042ef jal x5,80005540 +80000768: 80000758 .word 0x80000758 +8000076c: 800097c2 .word 0x800097c2 +80000770: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x61b5aaf1 +80000774: 0004a183 lw x3,0(x9) +80000778: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x6ef66582 +8000077c: 0004a403 lw x8,0(x9) +80000780: 00448493 addi x9,x9,4 + +80000784 : +Zbkb_packh_cg_cp_rs2_b8: + packh x29, x3, x8 # perform operation +80000784: 0881feb3 packh x29,x3,x8 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zbkb_packh_cg_cp_rs2_b8, Zbkb_packh_cg_cp_rs2_b8_str) +80000788: 000e2203 lw x4,0(x28) +8000078c: 01d20863 beq x4,x29,8000079c +80000790: 5b1042ef jal x5,80005540 +80000794: 80000784 .word 0x80000784 +80000798: 800097f5 .word 0x800097f5 +8000079c: 004e0e13 addi x28,x28,4 + + mv x30, x9 # switch data pointer register to avoid conflict with test +800007a0: 00048f13 addi x30,x9,0 +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0xd561fee9 +800007a4: 000f2103 lw x2,0(x30) +800007a8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0xcf8f29fd +800007ac: 000f2483 lw x9,0(x30) +800007b0: 004f0f13 addi x30,x30,4 + +800007b4 : +Zbkb_packh_cg_cp_rs2_b9: + packh x20, x2, x9 # perform operation +800007b4: 08917a33 packh x20,x2,x9 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zbkb_packh_cg_cp_rs2_b9, Zbkb_packh_cg_cp_rs2_b9_str) +800007b8: 000e2203 lw x4,0(x28) +800007bc: 01420863 beq x4,x20,800007cc +800007c0: 581042ef jal x5,80005540 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80009828 .word 0x80009828 +800007cc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0xe40bedcc +800007d0: 000f2703 lw x14,0(x30) +800007d4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xdfd8165c +800007d8: 000f2503 lw x10,0(x30) +800007dc: 004f0f13 addi x30,x30,4 + +800007e0 : +Zbkb_packh_cg_cp_rs2_b10: + packh x20, x14, x10 # perform operation +800007e0: 08a77a33 packh x20,x14,x10 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zbkb_packh_cg_cp_rs2_b10, Zbkb_packh_cg_cp_rs2_b10_str) +800007e4: 000e2203 lw x4,0(x28) +800007e8: 01420863 beq x4,x20,800007f8 +800007ec: 555042ef jal x5,80005540 +800007f0: 800007e0 .word 0x800007e0 +800007f4: 8000985b .word 0x8000985b +800007f8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x55bc8b9e +800007fc: 000f2103 lw x2,0(x30) +80000800: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x066bbaf8 +80000804: 000f2583 lw x11,0(x30) +80000808: 004f0f13 addi x30,x30,4 + +8000080c : +Zbkb_packh_cg_cp_rs2_b11: + packh x19, x2, x11 # perform operation +8000080c: 08b179b3 packh x19,x2,x11 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zbkb_packh_cg_cp_rs2_b11, Zbkb_packh_cg_cp_rs2_b11_str) +80000810: 000e2203 lw x4,0(x28) +80000814: 01320863 beq x4,x19,80000824 +80000818: 529042ef jal x5,80005540 +8000081c: 8000080c .word 0x8000080c +80000820: 8000988f .word 0x8000988f +80000824: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x58211489 +80000828: 000f2c03 lw x24,0(x30) +8000082c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xfb0cead0 +80000830: 000f2603 lw x12,0(x30) +80000834: 004f0f13 addi x30,x30,4 + +80000838 : +Zbkb_packh_cg_cp_rs2_b12: + packh x10, x24, x12 # perform operation +80000838: 08cc7533 packh x10,x24,x12 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zbkb_packh_cg_cp_rs2_b12, Zbkb_packh_cg_cp_rs2_b12_str) +8000083c: 000e2203 lw x4,0(x28) +80000840: 00a20863 beq x4,x10,80000850 +80000844: 4fd042ef jal x5,80005540 +80000848: 80000838 .word 0x80000838 +8000084c: 800098c3 .word 0x800098c3 +80000850: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xcb7d3106 +80000854: 000f2803 lw x16,0(x30) +80000858: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0xcc17eebc +8000085c: 000f2683 lw x13,0(x30) +80000860: 004f0f13 addi x30,x30,4 + +80000864 : +Zbkb_packh_cg_cp_rs2_b13: + packh x21, x16, x13 # perform operation +80000864: 08d87ab3 packh x21,x16,x13 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zbkb_packh_cg_cp_rs2_b13, Zbkb_packh_cg_cp_rs2_b13_str) +80000868: 000e2203 lw x4,0(x28) +8000086c: 01520863 beq x4,x21,8000087c +80000870: 4d1042ef jal x5,80005540 +80000874: 80000864 .word 0x80000864 +80000878: 800098f7 .word 0x800098f7 +8000087c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x2d019b06 +80000880: 000f2303 lw x6,0(x30) +80000884: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x764b1f0d +80000888: 000f2703 lw x14,0(x30) +8000088c: 004f0f13 addi x30,x30,4 + +80000890 : +Zbkb_packh_cg_cp_rs2_b14: + packh x3, x6, x14 # perform operation +80000890: 08e371b3 packh x3,x6,x14 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zbkb_packh_cg_cp_rs2_b14, Zbkb_packh_cg_cp_rs2_b14_str) +80000894: 000e2203 lw x4,0(x28) +80000898: 00320863 beq x4,x3,800008a8 +8000089c: 4a5042ef jal x5,80005540 +800008a0: 80000890 .word 0x80000890 +800008a4: 8000992b .word 0x8000992b +800008a8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x2517be86 +800008ac: 000f2103 lw x2,0(x30) +800008b0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0xc8a7000b +800008b4: 000f2783 lw x15,0(x30) +800008b8: 004f0f13 addi x30,x30,4 + +800008bc : +Zbkb_packh_cg_cp_rs2_b15: + packh x19, x2, x15 # perform operation +800008bc: 08f179b3 packh x19,x2,x15 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zbkb_packh_cg_cp_rs2_b15, Zbkb_packh_cg_cp_rs2_b15_str) +800008c0: 000e2203 lw x4,0(x28) +800008c4: 01320863 beq x4,x19,800008d4 +800008c8: 479042ef jal x5,80005540 +800008cc: 800008bc .word 0x800008bc +800008d0: 8000995f .word 0x8000995f +800008d4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0xfd52e115 +800008d8: 000f2183 lw x3,0(x30) +800008dc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0xb5be3645 +800008e0: 000f2803 lw x16,0(x30) +800008e4: 004f0f13 addi x30,x30,4 + +800008e8 : +Zbkb_packh_cg_cp_rs2_b16: + packh x11, x3, x16 # perform operation +800008e8: 0901f5b3 packh x11,x3,x16 + # Check if x11 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x11, Zbkb_packh_cg_cp_rs2_b16, Zbkb_packh_cg_cp_rs2_b16_str) +800008ec: 000e2203 lw x4,0(x28) +800008f0: 00b20863 beq x4,x11,80000900 +800008f4: 44d042ef jal x5,80005540 +800008f8: 800008e8 .word 0x800008e8 +800008fc: 80009993 .word 0x80009993 +80000900: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x982334b2 +80000904: 000f2003 lw x0,0(x30) +80000908: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x76762529 +8000090c: 000f2883 lw x17,0(x30) +80000910: 004f0f13 addi x30,x30,4 + +80000914 : +Zbkb_packh_cg_cp_rs2_b17: + packh x10, x0, x17 # perform operation +80000914: 09107533 packh x10,x0,x17 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zbkb_packh_cg_cp_rs2_b17, Zbkb_packh_cg_cp_rs2_b17_str) +80000918: 000e2203 lw x4,0(x28) +8000091c: 00a20863 beq x4,x10,8000092c +80000920: 421042ef jal x5,80005540 +80000924: 80000914 .word 0x80000914 +80000928: 800099c7 .word 0x800099c7 +8000092c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x2c1e6265 +80000930: 000f2a03 lw x20,0(x30) +80000934: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x404ccffc +80000938: 000f2903 lw x18,0(x30) +8000093c: 004f0f13 addi x30,x30,4 + +80000940 : +Zbkb_packh_cg_cp_rs2_b18: + packh x23, x20, x18 # perform operation +80000940: 092a7bb3 packh x23,x20,x18 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zbkb_packh_cg_cp_rs2_b18, Zbkb_packh_cg_cp_rs2_b18_str) +80000944: 000e2203 lw x4,0(x28) +80000948: 01720863 beq x4,x23,80000958 +8000094c: 3f5042ef jal x5,80005540 +80000950: 80000940 .word 0x80000940 +80000954: 800099fb .word 0x800099fb +80000958: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0xdacd2459 +8000095c: 000f2383 lw x7,0(x30) +80000960: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x29e6529f +80000964: 000f2983 lw x19,0(x30) +80000968: 004f0f13 addi x30,x30,4 + +8000096c : +Zbkb_packh_cg_cp_rs2_b19: + packh x6, x7, x19 # perform operation +8000096c: 0933f333 packh x6,x7,x19 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zbkb_packh_cg_cp_rs2_b19, Zbkb_packh_cg_cp_rs2_b19_str) +80000970: 000e2203 lw x4,0(x28) +80000974: 00620863 beq x4,x6,80000984 +80000978: 3c9042ef jal x5,80005540 +8000097c: 8000096c .word 0x8000096c +80000980: 80009a2f .word 0x80009a2f +80000984: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xb44818a8 +80000988: 000f2603 lw x12,0(x30) +8000098c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0xc0d0fe0c +80000990: 000f2a03 lw x20,0(x30) +80000994: 004f0f13 addi x30,x30,4 + +80000998 : +Zbkb_packh_cg_cp_rs2_b20: + packh x22, x12, x20 # perform operation +80000998: 09467b33 packh x22,x12,x20 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b20, Zbkb_packh_cg_cp_rs2_b20_str) +8000099c: 000e2203 lw x4,0(x28) +800009a0: 01620863 beq x4,x22,800009b0 +800009a4: 39d042ef jal x5,80005540 +800009a8: 80000998 .word 0x80000998 +800009ac: 80009a63 .word 0x80009a63 +800009b0: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x7c1af869 +800009b4: 000f2183 lw x3,0(x30) +800009b8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x8b6819ee +800009bc: 000f2a83 lw x21,0(x30) +800009c0: 004f0f13 addi x30,x30,4 + +800009c4 : +Zbkb_packh_cg_cp_rs2_b21: + packh x9, x3, x21 # perform operation +800009c4: 0951f4b3 packh x9,x3,x21 + # Check if x9 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x9, Zbkb_packh_cg_cp_rs2_b21, Zbkb_packh_cg_cp_rs2_b21_str) +800009c8: 000e2203 lw x4,0(x28) +800009cc: 00920863 beq x4,x9,800009dc +800009d0: 371042ef jal x5,80005540 +800009d4: 800009c4 .word 0x800009c4 +800009d8: 80009a97 .word 0x80009a97 +800009dc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x2b312234 +800009e0: 000f2c83 lw x25,0(x30) +800009e4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x55eaf262 +800009e8: 000f2b03 lw x22,0(x30) +800009ec: 004f0f13 addi x30,x30,4 + +800009f0 : +Zbkb_packh_cg_cp_rs2_b22: + packh x3, x25, x22 # perform operation +800009f0: 096cf1b3 packh x3,x25,x22 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zbkb_packh_cg_cp_rs2_b22, Zbkb_packh_cg_cp_rs2_b22_str) +800009f4: 000e2203 lw x4,0(x28) +800009f8: 00320863 beq x4,x3,80000a08 +800009fc: 345042ef jal x5,80005540 +80000a00: 800009f0 .word 0x800009f0 +80000a04: 80009acb .word 0x80009acb +80000a08: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0xbad7d551 +80000a0c: 000f2183 lw x3,0(x30) +80000a10: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x4d37258f +80000a14: 000f2b83 lw x23,0(x30) +80000a18: 004f0f13 addi x30,x30,4 + +80000a1c : +Zbkb_packh_cg_cp_rs2_b23: + packh x17, x3, x23 # perform operation +80000a1c: 0971f8b3 packh x17,x3,x23 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zbkb_packh_cg_cp_rs2_b23, Zbkb_packh_cg_cp_rs2_b23_str) +80000a20: 000e2203 lw x4,0(x28) +80000a24: 01120863 beq x4,x17,80000a34 +80000a28: 319042ef jal x5,80005540 +80000a2c: 80000a1c .word 0x80000a1c +80000a30: 80009aff .word 0x80009aff +80000a34: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x9f5223f5 +80000a38: 000f2403 lw x8,0(x30) +80000a3c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xf4d1c6fe +80000a40: 000f2c03 lw x24,0(x30) +80000a44: 004f0f13 addi x30,x30,4 + +80000a48 : +Zbkb_packh_cg_cp_rs2_b24: + packh x17, x8, x24 # perform operation +80000a48: 098478b3 packh x17,x8,x24 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zbkb_packh_cg_cp_rs2_b24, Zbkb_packh_cg_cp_rs2_b24_str) +80000a4c: 000e2203 lw x4,0(x28) +80000a50: 01120863 beq x4,x17,80000a60 +80000a54: 2ed042ef jal x5,80005540 +80000a58: 80000a48 .word 0x80000a48 +80000a5c: 80009b33 .word 0x80009b33 +80000a60: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xf0c8b941 +80000a64: 000f2683 lw x13,0(x30) +80000a68: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x2bbb3387 +80000a6c: 000f2c83 lw x25,0(x30) +80000a70: 004f0f13 addi x30,x30,4 + +80000a74 : +Zbkb_packh_cg_cp_rs2_b25: + packh x15, x13, x25 # perform operation +80000a74: 0996f7b3 packh x15,x13,x25 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zbkb_packh_cg_cp_rs2_b25, Zbkb_packh_cg_cp_rs2_b25_str) +80000a78: 000e2203 lw x4,0(x28) +80000a7c: 00f20863 beq x4,x15,80000a8c +80000a80: 2c1042ef jal x5,80005540 +80000a84: 80000a74 .word 0x80000a74 +80000a88: 80009b67 .word 0x80009b67 +80000a8c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x10003a07 +80000a90: 000f2c83 lw x25,0(x30) +80000a94: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x31e748af +80000a98: 000f2d03 lw x26,0(x30) +80000a9c: 004f0f13 addi x30,x30,4 + +80000aa0 : +Zbkb_packh_cg_cp_rs2_b26: + packh x17, x25, x26 # perform operation +80000aa0: 09acf8b3 packh x17,x25,x26 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zbkb_packh_cg_cp_rs2_b26, Zbkb_packh_cg_cp_rs2_b26_str) +80000aa4: 000e2203 lw x4,0(x28) +80000aa8: 01120863 beq x4,x17,80000ab8 +80000aac: 295042ef jal x5,80005540 +80000ab0: 80000aa0 .word 0x80000aa0 +80000ab4: 80009b9b .word 0x80009b9b +80000ab8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x151d2770 +80000abc: 000f2003 lw x0,0(x30) +80000ac0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x6e0a3724 +80000ac4: 000f2d83 lw x27,0(x30) +80000ac8: 004f0f13 addi x30,x30,4 + +80000acc : +Zbkb_packh_cg_cp_rs2_b27: + packh x13, x0, x27 # perform operation +80000acc: 09b076b3 packh x13,x0,x27 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zbkb_packh_cg_cp_rs2_b27, Zbkb_packh_cg_cp_rs2_b27_str) +80000ad0: 000e2203 lw x4,0(x28) +80000ad4: 00d20863 beq x4,x13,80000ae4 +80000ad8: 269042ef jal x5,80005540 +80000adc: 80000acc .word 0x80000acc +80000ae0: 80009bcf .word 0x80009bcf +80000ae4: 004e0e13 addi x28,x28,4 + + mv x23, x28 # switch signature pointer register to avoid conflict with test +80000ae8: 000e0b93 addi x23,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xb5b3c7c3 +80000aec: 000f2a83 lw x21,0(x30) +80000af0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xc5dc92ef +80000af4: 000f2e03 lw x28,0(x30) +80000af8: 004f0f13 addi x30,x30,4 + +80000afc : +Zbkb_packh_cg_cp_rs2_b28: + packh x29, x21, x28 # perform operation +80000afc: 09cafeb3 packh x29,x21,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_packh_cg_cp_rs2_b28, Zbkb_packh_cg_cp_rs2_b28_str) +80000b00: 000ba203 lw x4,0(x23) +80000b04: 01d20863 beq x4,x29,80000b14 +80000b08: 239042ef jal x5,80005540 +80000b0c: 80000afc .word 0x80000afc +80000b10: 80009c03 .word 0x80009c03 +80000b14: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0xf4dc8833 +80000b18: 000f2d83 lw x27,0(x30) +80000b1c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xb3daff8a +80000b20: 000f2e83 lw x29,0(x30) +80000b24: 004f0f13 addi x30,x30,4 + +80000b28 : +Zbkb_packh_cg_cp_rs2_b29: + packh x3, x27, x29 # perform operation +80000b28: 09ddf1b3 packh x3,x27,x29 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_packh_cg_cp_rs2_b29, Zbkb_packh_cg_cp_rs2_b29_str) +80000b2c: 000ba203 lw x4,0(x23) +80000b30: 00320863 beq x4,x3,80000b40 +80000b34: 20d042ef jal x5,80005540 +80000b38: 80000b28 .word 0x80000b28 +80000b3c: 80009c37 .word 0x80009c37 +80000b40: 004b8b93 addi x23,x23,4 + + mv x1, x30 # switch data pointer register to avoid conflict with test +80000b44: 000f0093 addi x1,x30,0 +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x7ec109ea +80000b48: 0000a603 lw x12,0(x1) +80000b4c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xdd2f1834 +80000b50: 0000af03 lw x30,0(x1) +80000b54: 00408093 addi x1,x1,4 + +80000b58 : +Zbkb_packh_cg_cp_rs2_b30: + packh x31, x12, x30 # perform operation +80000b58: 09e67fb3 packh x31,x12,x30 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_packh_cg_cp_rs2_b30, Zbkb_packh_cg_cp_rs2_b30_str) +80000b5c: 000ba203 lw x4,0(x23) +80000b60: 01f20863 beq x4,x31,80000b70 +80000b64: 1dd042ef jal x5,80005540 +80000b68: 80000b58 .word 0x80000b58 +80000b6c: 80009c6b .word 0x80009c6b +80000b70: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x7fd4503a +80000b74: 0000a383 lw x7,0(x1) +80000b78: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x177bcb53 +80000b7c: 0000af83 lw x31,0(x1) +80000b80: 00408093 addi x1,x1,4 + +80000b84 : +Zbkb_packh_cg_cp_rs2_b31: + packh x15, x7, x31 # perform operation +80000b84: 09f3f7b3 packh x15,x7,x31 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_packh_cg_cp_rs2_b31, Zbkb_packh_cg_cp_rs2_b31_str) +80000b88: 000ba203 lw x4,0(x23) +80000b8c: 00f20863 beq x4,x15,80000b9c +80000b90: 1b1042ef jal x5,80005540 +80000b94: 80000b84 .word 0x80000b84 +80000b98: 80009c9f .word 0x80009c9f +80000b9c: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x39e4618b +80000ba0: 0000ab03 lw x22,0(x1) +80000ba4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x6d88b8cb +80000ba8: 0000aa03 lw x20,0(x1) +80000bac: 00408093 addi x1,x1,4 + +80000bb0 : +Zbkb_packh_cg_cp_rd_b0: + packh x0, x22, x20 # perform operation +80000bb0: 094b7033 packh x0,x22,x20 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zbkb_packh_cg_cp_rd_b0, Zbkb_packh_cg_cp_rd_b0_str) +80000bb4: 000ba203 lw x4,0(x23) +80000bb8: 00020863 beq x4,x0,80000bc8 +80000bbc: 185042ef jal x5,80005540 +80000bc0: 80000bb0 .word 0x80000bb0 +80000bc4: 80009cd3 .word 0x80009cd3 +80000bc8: 004b8b93 addi x23,x23,4 + + mv x15, x1 # switch data pointer register to avoid conflict with test +80000bcc: 00008793 addi x15,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5874009a +80000bd0: 0007a703 lw x14,0(x15) +80000bd4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x52a41d07 +80000bd8: 0007ad03 lw x26,0(x15) +80000bdc: 00478793 addi x15,x15,4 + +80000be0 : +Zbkb_packh_cg_cp_rd_b1: + packh x1, x14, x26 # perform operation +80000be0: 09a770b3 packh x1,x14,x26 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkb_packh_cg_cp_rd_b1, Zbkb_packh_cg_cp_rd_b1_str) +80000be4: 000ba203 lw x4,0(x23) +80000be8: 00120863 beq x4,x1,80000bf8 +80000bec: 155042ef jal x5,80005540 +80000bf0: 80000be0 .word 0x80000be0 +80000bf4: 80009d05 .word 0x80009d05 +80000bf8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x86ebb124 +80000bfc: 0007ac03 lw x24,0(x15) +80000c00: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x277d52b2 +80000c04: 0007ad03 lw x26,0(x15) +80000c08: 00478793 addi x15,x15,4 + +80000c0c : +Zbkb_packh_cg_cp_rd_b2: + packh x2, x24, x26 # perform operation +80000c0c: 09ac7133 packh x2,x24,x26 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_packh_cg_cp_rd_b2, Zbkb_packh_cg_cp_rd_b2_str) +80000c10: 000ba203 lw x4,0(x23) +80000c14: 00220863 beq x4,x2,80000c24 +80000c18: 129042ef jal x5,80005540 +80000c1c: 80000c0c .word 0x80000c0c +80000c20: 80009d37 .word 0x80009d37 +80000c24: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x62d12cd9 +80000c28: 0007ac83 lw x25,0(x15) +80000c2c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x098c117c +80000c30: 0007a603 lw x12,0(x15) +80000c34: 00478793 addi x15,x15,4 + +80000c38 : +Zbkb_packh_cg_cp_rd_b3: + packh x3, x25, x12 # perform operation +80000c38: 08ccf1b3 packh x3,x25,x12 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_packh_cg_cp_rd_b3, Zbkb_packh_cg_cp_rd_b3_str) +80000c3c: 000ba203 lw x4,0(x23) +80000c40: 00320863 beq x4,x3,80000c50 +80000c44: 0fd042ef jal x5,80005540 +80000c48: 80000c38 .word 0x80000c38 +80000c4c: 80009d69 .word 0x80009d69 +80000c50: 004b8b93 addi x23,x23,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c54: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c58: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x2059bdca +80000c5c: 0007a803 lw x16,0(x15) +80000c60: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x6bfcb87a +80000c64: 0007a103 lw x2,0(x15) +80000c68: 00478793 addi x15,x15,4 + +80000c6c : +Zbkb_packh_cg_cp_rd_b4: + packh x4, x16, x2 # perform operation +80000c6c: 08287233 packh x4,x16,x2 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zbkb_packh_cg_cp_rd_b4, Zbkb_packh_cg_cp_rd_b4_str) +80000c70: 000ba683 lw x13,0(x23) +80000c74: 00468863 beq x13,x4,80000c84 +80000c78: 1090476f jal x14,80005580 +80000c7c: 80000c6c .word 0x80000c6c +80000c80: 80009d9b .word 0x80009d9b +80000c84: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8f3db83a +80000c88: 0007ac83 lw x25,0(x15) +80000c8c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xde113513 +80000c90: 0007af03 lw x30,0(x15) +80000c94: 00478793 addi x15,x15,4 + +80000c98 : +Zbkb_packh_cg_cp_rd_b5: + packh x5, x25, x30 # perform operation +80000c98: 09ecf2b3 packh x5,x25,x30 + # Check if x5 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x5, Zbkb_packh_cg_cp_rd_b5, Zbkb_packh_cg_cp_rd_b5_str) +80000c9c: 000ba683 lw x13,0(x23) +80000ca0: 00568863 beq x13,x5,80000cb0 +80000ca4: 0dd0476f jal x14,80005580 +80000ca8: 80000c98 .word 0x80000c98 +80000cac: 80009dcd .word 0x80009dcd +80000cb0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x2c5bdf51 +80000cb4: 0007a183 lw x3,0(x15) +80000cb8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x44ad85b0 +80000cbc: 0007ad83 lw x27,0(x15) +80000cc0: 00478793 addi x15,x15,4 + +80000cc4 : +Zbkb_packh_cg_cp_rd_b6: + packh x6, x3, x27 # perform operation +80000cc4: 09b1f333 packh x6,x3,x27 + # Check if x6 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x6, Zbkb_packh_cg_cp_rd_b6, Zbkb_packh_cg_cp_rd_b6_str) +80000cc8: 000ba683 lw x13,0(x23) +80000ccc: 00668863 beq x13,x6,80000cdc +80000cd0: 0b10476f jal x14,80005580 +80000cd4: 80000cc4 .word 0x80000cc4 +80000cd8: 80009dff .word 0x80009dff +80000cdc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x83668d60 +80000ce0: 0007a803 lw x16,0(x15) +80000ce4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x37e7c9a6 +80000ce8: 0007ad03 lw x26,0(x15) +80000cec: 00478793 addi x15,x15,4 + +80000cf0 : +Zbkb_packh_cg_cp_rd_b7: + packh x7, x16, x26 # perform operation +80000cf0: 09a873b3 packh x7,x16,x26 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zbkb_packh_cg_cp_rd_b7, Zbkb_packh_cg_cp_rd_b7_str) +80000cf4: 000ba683 lw x13,0(x23) +80000cf8: 00768863 beq x13,x7,80000d08 +80000cfc: 0850476f jal x14,80005580 +80000d00: 80000cf0 .word 0x80000cf0 +80000d04: 80009e31 .word 0x80009e31 +80000d08: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x9728a29f +80000d0c: 0007a083 lw x1,0(x15) +80000d10: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x5972e42e +80000d14: 0007a883 lw x17,0(x15) +80000d18: 00478793 addi x15,x15,4 + +80000d1c : +Zbkb_packh_cg_cp_rd_b8: + packh x8, x1, x17 # perform operation +80000d1c: 0910f433 packh x8,x1,x17 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zbkb_packh_cg_cp_rd_b8, Zbkb_packh_cg_cp_rd_b8_str) +80000d20: 000ba683 lw x13,0(x23) +80000d24: 00868863 beq x13,x8,80000d34 +80000d28: 0590476f jal x14,80005580 +80000d2c: 80000d1c .word 0x80000d1c +80000d30: 80009e63 .word 0x80009e63 +80000d34: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xcd7026ea +80000d38: 0007ad83 lw x27,0(x15) +80000d3c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x28795e5f +80000d40: 0007a603 lw x12,0(x15) +80000d44: 00478793 addi x15,x15,4 + +80000d48 : +Zbkb_packh_cg_cp_rd_b9: + packh x9, x27, x12 # perform operation +80000d48: 08cdf4b3 packh x9,x27,x12 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zbkb_packh_cg_cp_rd_b9, Zbkb_packh_cg_cp_rd_b9_str) +80000d4c: 000ba683 lw x13,0(x23) +80000d50: 00968863 beq x13,x9,80000d60 +80000d54: 02d0476f jal x14,80005580 +80000d58: 80000d48 .word 0x80000d48 +80000d5c: 80009e95 .word 0x80009e95 +80000d60: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xc6719bb1 +80000d64: 0007a403 lw x8,0(x15) +80000d68: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x6336ee31 +80000d6c: 0007a103 lw x2,0(x15) +80000d70: 00478793 addi x15,x15,4 + +80000d74 : +Zbkb_packh_cg_cp_rd_b10: + packh x10, x8, x2 # perform operation +80000d74: 08247533 packh x10,x8,x2 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zbkb_packh_cg_cp_rd_b10, Zbkb_packh_cg_cp_rd_b10_str) +80000d78: 000ba683 lw x13,0(x23) +80000d7c: 00a68863 beq x13,x10,80000d8c +80000d80: 0010476f jal x14,80005580 +80000d84: 80000d74 .word 0x80000d74 +80000d88: 80009ec7 .word 0x80009ec7 +80000d8c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x0fceb29e +80000d90: 0007ae83 lw x29,0(x15) +80000d94: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x77747ff7 +80000d98: 0007a003 lw x0,0(x15) +80000d9c: 00478793 addi x15,x15,4 + +80000da0 : +Zbkb_packh_cg_cp_rd_b11: + packh x11, x29, x0 # perform operation +80000da0: 080ef5b3 packh x11,x29,x0 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkb_packh_cg_cp_rd_b11, Zbkb_packh_cg_cp_rd_b11_str) +80000da4: 000ba683 lw x13,0(x23) +80000da8: 00b68863 beq x13,x11,80000db8 +80000dac: 7d40476f jal x14,80005580 +80000db0: 80000da0 .word 0x80000da0 +80000db4: 80009efa .word 0x80009efa +80000db8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x9122512e +80000dbc: 0007ac83 lw x25,0(x15) +80000dc0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xf8216a44 +80000dc4: 0007a183 lw x3,0(x15) +80000dc8: 00478793 addi x15,x15,4 + +80000dcc : +Zbkb_packh_cg_cp_rd_b12: + packh x12, x25, x3 # perform operation +80000dcc: 083cf633 packh x12,x25,x3 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zbkb_packh_cg_cp_rd_b12, Zbkb_packh_cg_cp_rd_b12_str) +80000dd0: 000ba683 lw x13,0(x23) +80000dd4: 00c68863 beq x13,x12,80000de4 +80000dd8: 7a80476f jal x14,80005580 +80000ddc: 80000dcc .word 0x80000dcc +80000de0: 80009f2d .word 0x80009f2d +80000de4: 004b8b93 addi x23,x23,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000de8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dec: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x3783e704 +80000df0: 0007a003 lw x0,0(x15) +80000df4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x77d4d9ae +80000df8: 0007ad83 lw x27,0(x15) +80000dfc: 00478793 addi x15,x15,4 + +80000e00 : +Zbkb_packh_cg_cp_rd_b13: + packh x13, x0, x27 # perform operation +80000e00: 09b076b3 packh x13,x0,x27 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zbkb_packh_cg_cp_rd_b13, Zbkb_packh_cg_cp_rd_b13_str) +80000e04: 000ba383 lw x7,0(x23) +80000e08: 00d38863 beq x7,x13,80000e18 +80000e0c: 74c0446f jal x8,80005558 +80000e10: 80000e00 .word 0x80000e00 +80000e14: 80009f60 .word 0x80009f60 +80000e18: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x4b3b359c +80000e1c: 0007aa03 lw x20,0(x15) +80000e20: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x1e758b42 +80000e24: 0007aa83 lw x21,0(x15) +80000e28: 00478793 addi x15,x15,4 + +80000e2c : +Zbkb_packh_cg_cp_rd_b14: + packh x14, x20, x21 # perform operation +80000e2c: 095a7733 packh x14,x20,x21 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zbkb_packh_cg_cp_rd_b14, Zbkb_packh_cg_cp_rd_b14_str) +80000e30: 000ba383 lw x7,0(x23) +80000e34: 00e38863 beq x7,x14,80000e44 +80000e38: 7200446f jal x8,80005558 +80000e3c: 80000e2c .word 0x80000e2c +80000e40: 80009f93 .word 0x80009f93 +80000e44: 004b8b93 addi x23,x23,4 + + mv x9, x15 # switch data pointer register to avoid conflict with test +80000e48: 00078493 addi x9,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x083ca0f2 +80000e4c: 0004a903 lw x18,0(x9) +80000e50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xcb715f0d +80000e54: 0004af03 lw x30,0(x9) +80000e58: 00448493 addi x9,x9,4 + +80000e5c : +Zbkb_packh_cg_cp_rd_b15: + packh x15, x18, x30 # perform operation +80000e5c: 09e977b3 packh x15,x18,x30 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zbkb_packh_cg_cp_rd_b15, Zbkb_packh_cg_cp_rd_b15_str) +80000e60: 000ba383 lw x7,0(x23) +80000e64: 00f38863 beq x7,x15,80000e74 +80000e68: 6f00446f jal x8,80005558 +80000e6c: 80000e5c .word 0x80000e5c +80000e70: 80009fc6 .word 0x80009fc6 +80000e74: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xa76876f4 +80000e78: 0004a583 lw x11,0(x9) +80000e7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x9bcd1f6b +80000e80: 0004a603 lw x12,0(x9) +80000e84: 00448493 addi x9,x9,4 + +80000e88 : +Zbkb_packh_cg_cp_rd_b16: + packh x16, x11, x12 # perform operation +80000e88: 08c5f833 packh x16,x11,x12 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_packh_cg_cp_rd_b16, Zbkb_packh_cg_cp_rd_b16_str) +80000e8c: 000ba383 lw x7,0(x23) +80000e90: 01038863 beq x7,x16,80000ea0 +80000e94: 6c40446f jal x8,80005558 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 80009ff9 .word 0x80009ff9 +80000ea0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x53b9731d +80000ea4: 0004a983 lw x19,0(x9) +80000ea8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x4f866a56 +80000eac: 0004a183 lw x3,0(x9) +80000eb0: 00448493 addi x9,x9,4 + +80000eb4 : +Zbkb_packh_cg_cp_rd_b17: + packh x17, x19, x3 # perform operation +80000eb4: 0839f8b3 packh x17,x19,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_packh_cg_cp_rd_b17, Zbkb_packh_cg_cp_rd_b17_str) +80000eb8: 000ba383 lw x7,0(x23) +80000ebc: 01138863 beq x7,x17,80000ecc +80000ec0: 6980446f jal x8,80005558 +80000ec4: 80000eb4 .word 0x80000eb4 +80000ec8: 8000a02c .word 0x8000a02c +80000ecc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xa1bd67a1 +80000ed0: 0004ac83 lw x25,0(x9) +80000ed4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x3a8531b8 +80000ed8: 0004a803 lw x16,0(x9) +80000edc: 00448493 addi x9,x9,4 + +80000ee0 : +Zbkb_packh_cg_cp_rd_b18: + packh x18, x25, x16 # perform operation +80000ee0: 090cf933 packh x18,x25,x16 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_packh_cg_cp_rd_b18, Zbkb_packh_cg_cp_rd_b18_str) +80000ee4: 000ba383 lw x7,0(x23) +80000ee8: 01238863 beq x7,x18,80000ef8 +80000eec: 66c0446f jal x8,80005558 +80000ef0: 80000ee0 .word 0x80000ee0 +80000ef4: 8000a05f .word 0x8000a05f +80000ef8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x10197a0b +80000efc: 0004ae83 lw x29,0(x9) +80000f00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x6d4e2472 +80000f04: 0004af03 lw x30,0(x9) +80000f08: 00448493 addi x9,x9,4 + +80000f0c : +Zbkb_packh_cg_cp_rd_b19: + packh x19, x29, x30 # perform operation +80000f0c: 09eef9b3 packh x19,x29,x30 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_packh_cg_cp_rd_b19, Zbkb_packh_cg_cp_rd_b19_str) +80000f10: 000ba383 lw x7,0(x23) +80000f14: 01338863 beq x7,x19,80000f24 +80000f18: 6400446f jal x8,80005558 +80000f1c: 80000f0c .word 0x80000f0c +80000f20: 8000a092 .word 0x8000a092 +80000f24: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x3a7aa272 +80000f28: 0004a803 lw x16,0(x9) +80000f2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x14a1acf7 +80000f30: 0004af03 lw x30,0(x9) +80000f34: 00448493 addi x9,x9,4 + +80000f38 : +Zbkb_packh_cg_cp_rd_b20: + packh x20, x16, x30 # perform operation +80000f38: 09e87a33 packh x20,x16,x30 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_packh_cg_cp_rd_b20, Zbkb_packh_cg_cp_rd_b20_str) +80000f3c: 000ba383 lw x7,0(x23) +80000f40: 01438863 beq x7,x20,80000f50 +80000f44: 6140446f jal x8,80005558 +80000f48: 80000f38 .word 0x80000f38 +80000f4c: 8000a0c5 .word 0x8000a0c5 +80000f50: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xb26d3e6b +80000f54: 0004af83 lw x31,0(x9) +80000f58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xd8b5b24a +80000f5c: 0004ae03 lw x28,0(x9) +80000f60: 00448493 addi x9,x9,4 + +80000f64 : +Zbkb_packh_cg_cp_rd_b21: + packh x21, x31, x28 # perform operation +80000f64: 09cffab3 packh x21,x31,x28 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_packh_cg_cp_rd_b21, Zbkb_packh_cg_cp_rd_b21_str) +80000f68: 000ba383 lw x7,0(x23) +80000f6c: 01538863 beq x7,x21,80000f7c +80000f70: 5e80446f jal x8,80005558 +80000f74: 80000f64 .word 0x80000f64 +80000f78: 8000a0f8 .word 0x8000a0f8 +80000f7c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x57926e57 +80000f80: 0004a603 lw x12,0(x9) +80000f84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x1c69ccc2 +80000f88: 0004a203 lw x4,0(x9) +80000f8c: 00448493 addi x9,x9,4 + +80000f90 : +Zbkb_packh_cg_cp_rd_b22: + packh x22, x12, x4 # perform operation +80000f90: 08467b33 packh x22,x12,x4 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zbkb_packh_cg_cp_rd_b22, Zbkb_packh_cg_cp_rd_b22_str) +80000f94: 000ba383 lw x7,0(x23) +80000f98: 01638863 beq x7,x22,80000fa8 +80000f9c: 5bc0446f jal x8,80005558 +80000fa0: 80000f90 .word 0x80000f90 +80000fa4: 8000a12b .word 0x8000a12b +80000fa8: 004b8b93 addi x23,x23,4 + + mv x11, x23 # switch signature pointer register to avoid conflict with test +80000fac: 000b8593 addi x11,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x959ff0a0 +80000fb0: 0004a083 lw x1,0(x9) +80000fb4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x6c43a115 +80000fb8: 0004ad83 lw x27,0(x9) +80000fbc: 00448493 addi x9,x9,4 + +80000fc0 : +Zbkb_packh_cg_cp_rd_b23: + packh x23, x1, x27 # perform operation +80000fc0: 09b0fbb3 packh x23,x1,x27 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cp_rd_b23, Zbkb_packh_cg_cp_rd_b23_str) +80000fc4: 0005a383 lw x7,0(x11) +80000fc8: 01738863 beq x7,x23,80000fd8 +80000fcc: 58c0446f jal x8,80005558 +80000fd0: 80000fc0 .word 0x80000fc0 +80000fd4: 8000a15e .word 0x8000a15e +80000fd8: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x1b678c8c +80000fdc: 0004a003 lw x0,0(x9) +80000fe0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xce1f809d +80000fe4: 0004ae83 lw x29,0(x9) +80000fe8: 00448493 addi x9,x9,4 + +80000fec : +Zbkb_packh_cg_cp_rd_b24: + packh x24, x0, x29 # perform operation +80000fec: 09d07c33 packh x24,x0,x29 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkb_packh_cg_cp_rd_b24, Zbkb_packh_cg_cp_rd_b24_str) +80000ff0: 0005a383 lw x7,0(x11) +80000ff4: 01838863 beq x7,x24,80001004 +80000ff8: 5600446f jal x8,80005558 +80000ffc: 80000fec .word 0x80000fec +80001000: 8000a191 .word 0x8000a191 +80001004: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x3778b26f +80001008: 0004a183 lw x3,0(x9) +8000100c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xb51e1a22 +80001010: 0004ae83 lw x29,0(x9) +80001014: 00448493 addi x9,x9,4 + +80001018 : +Zbkb_packh_cg_cp_rd_b25: + packh x25, x3, x29 # perform operation +80001018: 09d1fcb3 packh x25,x3,x29 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cp_rd_b25, Zbkb_packh_cg_cp_rd_b25_str) +8000101c: 0005a383 lw x7,0(x11) +80001020: 01938863 beq x7,x25,80001030 +80001024: 5340446f jal x8,80005558 +80001028: 80001018 .word 0x80001018 +8000102c: 8000a1c4 .word 0x8000a1c4 +80001030: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xe138a9a4 +80001034: 0004a903 lw x18,0(x9) +80001038: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x77866087 +8000103c: 0004a983 lw x19,0(x9) +80001040: 00448493 addi x9,x9,4 + +80001044 : +Zbkb_packh_cg_cp_rd_b26: + packh x26, x18, x19 # perform operation +80001044: 09397d33 packh x26,x18,x19 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cp_rd_b26, Zbkb_packh_cg_cp_rd_b26_str) +80001048: 0005a383 lw x7,0(x11) +8000104c: 01a38863 beq x7,x26,8000105c +80001050: 5080446f jal x8,80005558 +80001054: 80001044 .word 0x80001044 +80001058: 8000a1f7 .word 0x8000a1f7 +8000105c: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x027e22d9 +80001060: 0004a503 lw x10,0(x9) +80001064: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xdc8e1931 +80001068: 0004a783 lw x15,0(x9) +8000106c: 00448493 addi x9,x9,4 + +80001070 : +Zbkb_packh_cg_cp_rd_b27: + packh x27, x10, x15 # perform operation +80001070: 08f57db3 packh x27,x10,x15 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cp_rd_b27, Zbkb_packh_cg_cp_rd_b27_str) +80001074: 0005a383 lw x7,0(x11) +80001078: 01b38863 beq x7,x27,80001088 +8000107c: 4dc0446f jal x8,80005558 +80001080: 80001070 .word 0x80001070 +80001084: 8000a22a .word 0x8000a22a +80001088: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xa2e3c409 +8000108c: 0004a983 lw x19,0(x9) +80001090: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xe91b1467 +80001094: 0004a203 lw x4,0(x9) +80001098: 00448493 addi x9,x9,4 + +8000109c : +Zbkb_packh_cg_cp_rd_b28: + packh x28, x19, x4 # perform operation +8000109c: 0849fe33 packh x28,x19,x4 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cp_rd_b28, Zbkb_packh_cg_cp_rd_b28_str) +800010a0: 0005a383 lw x7,0(x11) +800010a4: 01c38863 beq x7,x28,800010b4 +800010a8: 4b00446f jal x8,80005558 +800010ac: 8000109c .word 0x8000109c +800010b0: 8000a25d .word 0x8000a25d +800010b4: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xc0b76704 +800010b8: 0004aa03 lw x20,0(x9) +800010bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x10d03e6d +800010c0: 0004a103 lw x2,0(x9) +800010c4: 00448493 addi x9,x9,4 + +800010c8 : +Zbkb_packh_cg_cp_rd_b29: + packh x29, x20, x2 # perform operation +800010c8: 082a7eb3 packh x29,x20,x2 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cp_rd_b29, Zbkb_packh_cg_cp_rd_b29_str) +800010cc: 0005a383 lw x7,0(x11) +800010d0: 01d38863 beq x7,x29,800010e0 +800010d4: 4840446f jal x8,80005558 +800010d8: 800010c8 .word 0x800010c8 +800010dc: 8000a290 .word 0x8000a290 +800010e0: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xac5738c8 +800010e4: 0004a983 lw x19,0(x9) +800010e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x2b66cdbb +800010ec: 0004a883 lw x17,0(x9) +800010f0: 00448493 addi x9,x9,4 + +800010f4 : +Zbkb_packh_cg_cp_rd_b30: + packh x30, x19, x17 # perform operation +800010f4: 0919ff33 packh x30,x19,x17 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkb_packh_cg_cp_rd_b30, Zbkb_packh_cg_cp_rd_b30_str) +800010f8: 0005a383 lw x7,0(x11) +800010fc: 01e38863 beq x7,x30,8000110c +80001100: 4580446f jal x8,80005558 +80001104: 800010f4 .word 0x800010f4 +80001108: 8000a2c3 .word 0x8000a2c3 +8000110c: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xe9b5311b +80001110: 0004a883 lw x17,0(x9) +80001114: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xbe4f36c3 +80001118: 0004a303 lw x6,0(x9) +8000111c: 00448493 addi x9,x9,4 + +80001120 : +Zbkb_packh_cg_cp_rd_b31: + packh x31, x17, x6 # perform operation +80001120: 0868ffb3 packh x31,x17,x6 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zbkb_packh_cg_cp_rd_b31, Zbkb_packh_cg_cp_rd_b31_str) +80001124: 0005a383 lw x7,0(x11) +80001128: 01f38863 beq x7,x31,80001138 +8000112c: 42c0446f jal x8,80005558 +80001130: 80001120 .word 0x80001120 +80001134: 8000a2f6 .word 0x8000a2f6 +80001138: 00458593 addi x11,x11,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x00000000 +8000113c: 0004ae03 lw x28,0(x9) +80001140: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xc29db7c4 +80001144: 0004a203 lw x4,0(x9) +80001148: 00448493 addi x9,x9,4 + +8000114c : +Zbkb_packh_cg_cp_rs1_edges_0x0: + packh x29, x28, x4 # perform operation +8000114c: 084e7eb3 packh x29,x28,x4 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cp_rs1_edges_0x0, Zbkb_packh_cg_cp_rs1_edges_0x0_str) +80001150: 0005a383 lw x7,0(x11) +80001154: 01d38863 beq x7,x29,80001164 +80001158: 4000446f jal x8,80005558 +8000115c: 8000114c .word 0x8000114c +80001160: 8000a329 .word 0x8000a329 +80001164: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000001 +80001168: 0004a703 lw x14,0(x9) +8000116c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x4793419d +80001170: 0004a603 lw x12,0(x9) +80001174: 00448493 addi x9,x9,4 + +80001178 : +Zbkb_packh_cg_cp_rs1_edges_0x1: + packh x13, x14, x12 # perform operation +80001178: 08c776b3 packh x13,x14,x12 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cp_rs1_edges_0x1, Zbkb_packh_cg_cp_rs1_edges_0x1_str) +8000117c: 0005a383 lw x7,0(x11) +80001180: 00d38863 beq x7,x13,80001190 +80001184: 3d40446f jal x8,80005558 +80001188: 80001178 .word 0x80001178 +8000118c: 8000a363 .word 0x8000a363 +80001190: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +80001194: 0004a903 lw x18,0(x9) +80001198: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x1b0d9ca7 +8000119c: 0004a203 lw x4,0(x9) +800011a0: 00448493 addi x9,x9,4 + +800011a4 : +Zbkb_packh_cg_cp_rs1_edges_0x2: + packh x6, x18, x4 # perform operation +800011a4: 08497333 packh x6,x18,x4 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cp_rs1_edges_0x2, Zbkb_packh_cg_cp_rs1_edges_0x2_str) +800011a8: 0005a383 lw x7,0(x11) +800011ac: 00638863 beq x7,x6,800011bc +800011b0: 3a80446f jal x8,80005558 +800011b4: 800011a4 .word 0x800011a4 +800011b8: 8000a39d .word 0x8000a39d +800011bc: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x80000000 +800011c0: 0004a203 lw x4,0(x9) +800011c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xb10d23dd +800011c8: 0004ac83 lw x25,0(x9) +800011cc: 00448493 addi x9,x9,4 + +800011d0 : +Zbkb_packh_cg_cp_rs1_edges_0x80000000: + packh x31, x4, x25 # perform operation +800011d0: 09927fb3 packh x31,x4,x25 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zbkb_packh_cg_cp_rs1_edges_0x80000000, Zbkb_packh_cg_cp_rs1_edges_0x80000000_str) +800011d4: 0005a383 lw x7,0(x11) +800011d8: 01f38863 beq x7,x31,800011e8 +800011dc: 37c0446f jal x8,80005558 +800011e0: 800011d0 .word 0x800011d0 +800011e4: 8000a3d7 .word 0x8000a3d7 +800011e8: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000001 +800011ec: 0004a603 lw x12,0(x9) +800011f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xebe3276d +800011f4: 0004ae83 lw x29,0(x9) +800011f8: 00448493 addi x9,x9,4 + +800011fc : +Zbkb_packh_cg_cp_rs1_edges_0x80000001: + packh x20, x12, x29 # perform operation +800011fc: 09d67a33 packh x20,x12,x29 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cp_rs1_edges_0x80000001, Zbkb_packh_cg_cp_rs1_edges_0x80000001_str) +80001200: 0005a383 lw x7,0(x11) +80001204: 01438863 beq x7,x20,80001214 +80001208: 3500446f jal x8,80005558 +8000120c: 800011fc .word 0x800011fc +80001210: 8000a419 .word 0x8000a419 +80001214: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7fffffff +80001218: 0004ad83 lw x27,0(x9) +8000121c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xf420e549 +80001220: 0004a703 lw x14,0(x9) +80001224: 00448493 addi x9,x9,4 + +80001228 : +Zbkb_packh_cg_cp_rs1_edges_0x7fffffff: + packh x6, x27, x14 # perform operation +80001228: 08edf333 packh x6,x27,x14 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cp_rs1_edges_0x7fffffff, Zbkb_packh_cg_cp_rs1_edges_0x7fffffff_str) +8000122c: 0005a383 lw x7,0(x11) +80001230: 00638863 beq x7,x6,80001240 +80001234: 3240446f jal x8,80005558 +80001238: 80001228 .word 0x80001228 +8000123c: 8000a45b .word 0x8000a45b +80001240: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7ffffffe +80001244: 0004a883 lw x17,0(x9) +80001248: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xba262627 +8000124c: 0004af83 lw x31,0(x9) +80001250: 00448493 addi x9,x9,4 + +80001254 : +Zbkb_packh_cg_cp_rs1_edges_0x7ffffffe: + packh x4, x17, x31 # perform operation +80001254: 09f8f233 packh x4,x17,x31 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkb_packh_cg_cp_rs1_edges_0x7ffffffe, Zbkb_packh_cg_cp_rs1_edges_0x7ffffffe_str) +80001258: 0005a383 lw x7,0(x11) +8000125c: 00438863 beq x7,x4,8000126c +80001260: 2f80446f jal x8,80005558 +80001264: 80001254 .word 0x80001254 +80001268: 8000a49d .word 0x8000a49d +8000126c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xffffffff +80001270: 0004a303 lw x6,0(x9) +80001274: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x9df65b5d +80001278: 0004a283 lw x5,0(x9) +8000127c: 00448493 addi x9,x9,4 + +80001280 : +Zbkb_packh_cg_cp_rs1_edges_0xffffffff: + packh x14, x6, x5 # perform operation +80001280: 08537733 packh x14,x6,x5 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cp_rs1_edges_0xffffffff, Zbkb_packh_cg_cp_rs1_edges_0xffffffff_str) +80001284: 0005a383 lw x7,0(x11) +80001288: 00e38863 beq x7,x14,80001298 +8000128c: 2cc0446f jal x8,80005558 +80001290: 80001280 .word 0x80001280 +80001294: 8000a4df .word 0x8000a4df +80001298: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xfffffffe +8000129c: 0004a603 lw x12,0(x9) +800012a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x894924c7 +800012a4: 0004ac03 lw x24,0(x9) +800012a8: 00448493 addi x9,x9,4 + +800012ac : +Zbkb_packh_cg_cp_rs1_edges_0xfffffffe: + packh x18, x12, x24 # perform operation +800012ac: 09867933 packh x18,x12,x24 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cp_rs1_edges_0xfffffffe, Zbkb_packh_cg_cp_rs1_edges_0xfffffffe_str) +800012b0: 0005a383 lw x7,0(x11) +800012b4: 01238863 beq x7,x18,800012c4 +800012b8: 2a00446f jal x8,80005558 +800012bc: 800012ac .word 0x800012ac +800012c0: 8000a521 .word 0x8000a521 +800012c4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5bbc8872 +800012c8: 0004a703 lw x14,0(x9) +800012cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x06c5c607 +800012d0: 0004a503 lw x10,0(x9) +800012d4: 00448493 addi x9,x9,4 + +800012d8 : +Zbkb_packh_cg_cp_rs1_edges_0x5bbc8872: + packh x28, x14, x10 # perform operation +800012d8: 08a77e33 packh x28,x14,x10 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cp_rs1_edges_0x5bbc8872, Zbkb_packh_cg_cp_rs1_edges_0x5bbc8872_str) +800012dc: 0005a383 lw x7,0(x11) +800012e0: 01c38863 beq x7,x28,800012f0 +800012e4: 2740446f jal x8,80005558 +800012e8: 800012d8 .word 0x800012d8 +800012ec: 8000a563 .word 0x8000a563 +800012f0: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xaaaaaaaa +800012f4: 0004a983 lw x19,0(x9) +800012f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x9c418871 +800012fc: 0004a883 lw x17,0(x9) +80001300: 00448493 addi x9,x9,4 + +80001304 : +Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaa: + packh x2, x19, x17 # perform operation +80001304: 0919f133 packh x2,x19,x17 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001308: 0005a383 lw x7,0(x11) +8000130c: 00238863 beq x7,x2,8000131c +80001310: 2480446f jal x8,80005558 +80001314: 80001304 .word 0x80001304 +80001318: 8000a5a5 .word 0x8000a5a5 +8000131c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x55555555 +80001320: 0004a603 lw x12,0(x9) +80001324: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x586be013 +80001328: 0004a183 lw x3,0(x9) +8000132c: 00448493 addi x9,x9,4 + +80001330 : +Zbkb_packh_cg_cp_rs1_edges_0x55555555: + packh x24, x12, x3 # perform operation +80001330: 08367c33 packh x24,x12,x3 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkb_packh_cg_cp_rs1_edges_0x55555555, Zbkb_packh_cg_cp_rs1_edges_0x55555555_str) +80001334: 0005a383 lw x7,0(x11) +80001338: 01838863 beq x7,x24,80001348 +8000133c: 21c0446f jal x8,80005558 +80001340: 80001330 .word 0x80001330 +80001344: 8000a5e7 .word 0x8000a5e7 +80001348: 00458593 addi x11,x11,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xf8152ca4 +8000134c: 0004ac03 lw x24,0(x9) +80001350: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x00000000 +80001354: 0004a203 lw x4,0(x9) +80001358: 00448493 addi x9,x9,4 + +8000135c : +Zbkb_packh_cg_cp_rs2_edges_0x0: + packh x27, x24, x4 # perform operation +8000135c: 084c7db3 packh x27,x24,x4 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cp_rs2_edges_0x0, Zbkb_packh_cg_cp_rs2_edges_0x0_str) +80001360: 0005a383 lw x7,0(x11) +80001364: 01b38863 beq x7,x27,80001374 +80001368: 1f00446f jal x8,80005558 +8000136c: 8000135c .word 0x8000135c +80001370: 8000a629 .word 0x8000a629 +80001374: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x409dbbd3 +80001378: 0004ac03 lw x24,0(x9) +8000137c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000001 +80001380: 0004ac83 lw x25,0(x9) +80001384: 00448493 addi x9,x9,4 + +80001388 : +Zbkb_packh_cg_cp_rs2_edges_0x1: + packh x27, x24, x25 # perform operation +80001388: 099c7db3 packh x27,x24,x25 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cp_rs2_edges_0x1, Zbkb_packh_cg_cp_rs2_edges_0x1_str) +8000138c: 0005a383 lw x7,0(x11) +80001390: 01b38863 beq x7,x27,800013a0 +80001394: 1c40446f jal x8,80005558 +80001398: 80001388 .word 0x80001388 +8000139c: 8000a664 .word 0x8000a664 +800013a0: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xe0a70f42 +800013a4: 0004a703 lw x14,0(x9) +800013a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000002 +800013ac: 0004ad03 lw x26,0(x9) +800013b0: 00448493 addi x9,x9,4 + +800013b4 : +Zbkb_packh_cg_cp_rs2_edges_0x2: + packh x30, x14, x26 # perform operation +800013b4: 09a77f33 packh x30,x14,x26 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkb_packh_cg_cp_rs2_edges_0x2, Zbkb_packh_cg_cp_rs2_edges_0x2_str) +800013b8: 0005a383 lw x7,0(x11) +800013bc: 01e38863 beq x7,x30,800013cc +800013c0: 1980446f jal x8,80005558 +800013c4: 800013b4 .word 0x800013b4 +800013c8: 8000a69f .word 0x8000a69f +800013cc: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xc3fa2057 +800013d0: 0004ad03 lw x26,0(x9) +800013d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x80000000 +800013d8: 0004af83 lw x31,0(x9) +800013dc: 00448493 addi x9,x9,4 + +800013e0 : +Zbkb_packh_cg_cp_rs2_edges_0x80000000: + packh x16, x26, x31 # perform operation +800013e0: 09fd7833 packh x16,x26,x31 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cp_rs2_edges_0x80000000, Zbkb_packh_cg_cp_rs2_edges_0x80000000_str) +800013e4: 0005a383 lw x7,0(x11) +800013e8: 01038863 beq x7,x16,800013f8 +800013ec: 16c0446f jal x8,80005558 +800013f0: 800013e0 .word 0x800013e0 +800013f4: 8000a6da .word 0x8000a6da +800013f8: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x4a6646f5 +800013fc: 0004aa03 lw x20,0(x9) +80001400: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x80000001 +80001404: 0004a703 lw x14,0(x9) +80001408: 00448493 addi x9,x9,4 + +8000140c : +Zbkb_packh_cg_cp_rs2_edges_0x80000001: + packh x25, x20, x14 # perform operation +8000140c: 08ea7cb3 packh x25,x20,x14 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cp_rs2_edges_0x80000001, Zbkb_packh_cg_cp_rs2_edges_0x80000001_str) +80001410: 0005a383 lw x7,0(x11) +80001414: 01938863 beq x7,x25,80001424 +80001418: 1400446f jal x8,80005558 +8000141c: 8000140c .word 0x8000140c +80001420: 8000a71c .word 0x8000a71c +80001424: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xde3f32fc +80001428: 0004a203 lw x4,0(x9) +8000142c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x7fffffff +80001430: 0004a503 lw x10,0(x9) +80001434: 00448493 addi x9,x9,4 + +80001438 : +Zbkb_packh_cg_cp_rs2_edges_0x7fffffff: + packh x12, x4, x10 # perform operation +80001438: 08a27633 packh x12,x4,x10 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cp_rs2_edges_0x7fffffff, Zbkb_packh_cg_cp_rs2_edges_0x7fffffff_str) +8000143c: 0005a383 lw x7,0(x11) +80001440: 00c38863 beq x7,x12,80001450 +80001444: 1140446f jal x8,80005558 +80001448: 80001438 .word 0x80001438 +8000144c: 8000a75e .word 0x8000a75e +80001450: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7175a88a +80001454: 0004a883 lw x17,0(x9) +80001458: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7ffffffe +8000145c: 0004ab83 lw x23,0(x9) +80001460: 00448493 addi x9,x9,4 + +80001464 : +Zbkb_packh_cg_cp_rs2_edges_0x7ffffffe: + packh x14, x17, x23 # perform operation +80001464: 0978f733 packh x14,x17,x23 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cp_rs2_edges_0x7ffffffe, Zbkb_packh_cg_cp_rs2_edges_0x7ffffffe_str) +80001468: 0005a383 lw x7,0(x11) +8000146c: 00e38863 beq x7,x14,8000147c +80001470: 0e80446f jal x8,80005558 +80001474: 80001464 .word 0x80001464 +80001478: 8000a7a0 .word 0x8000a7a0 +8000147c: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x9e85bbcd +80001480: 0004ac83 lw x25,0(x9) +80001484: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffff +80001488: 0004a303 lw x6,0(x9) +8000148c: 00448493 addi x9,x9,4 + +80001490 : +Zbkb_packh_cg_cp_rs2_edges_0xffffffff: + packh x2, x25, x6 # perform operation +80001490: 086cf133 packh x2,x25,x6 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cp_rs2_edges_0xffffffff, Zbkb_packh_cg_cp_rs2_edges_0xffffffff_str) +80001494: 0005a383 lw x7,0(x11) +80001498: 00238863 beq x7,x2,800014a8 +8000149c: 0bc0446f jal x8,80005558 +800014a0: 80001490 .word 0x80001490 +800014a4: 8000a7e2 .word 0x8000a7e2 +800014a8: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7845f45d +800014ac: 0004a183 lw x3,0(x9) +800014b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xfffffffe +800014b4: 0004a103 lw x2,0(x9) +800014b8: 00448493 addi x9,x9,4 + +800014bc : +Zbkb_packh_cg_cp_rs2_edges_0xfffffffe: + packh x31, x3, x2 # perform operation +800014bc: 0821ffb3 packh x31,x3,x2 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zbkb_packh_cg_cp_rs2_edges_0xfffffffe, Zbkb_packh_cg_cp_rs2_edges_0xfffffffe_str) +800014c0: 0005a383 lw x7,0(x11) +800014c4: 01f38863 beq x7,x31,800014d4 +800014c8: 0900446f jal x8,80005558 +800014cc: 800014bc .word 0x800014bc +800014d0: 8000a824 .word 0x8000a824 +800014d4: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xfb7156a8 +800014d8: 0004ab03 lw x22,0(x9) +800014dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x5bbc8872 +800014e0: 0004aa83 lw x21,0(x9) +800014e4: 00448493 addi x9,x9,4 + +800014e8 : +Zbkb_packh_cg_cp_rs2_edges_0x5bbc8872: + packh x17, x22, x21 # perform operation +800014e8: 095b78b3 packh x17,x22,x21 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cp_rs2_edges_0x5bbc8872, Zbkb_packh_cg_cp_rs2_edges_0x5bbc8872_str) +800014ec: 0005a383 lw x7,0(x11) +800014f0: 01138863 beq x7,x17,80001500 +800014f4: 0640446f jal x8,80005558 +800014f8: 800014e8 .word 0x800014e8 +800014fc: 8000a866 .word 0x8000a866 +80001500: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x11e2f652 +80001504: 0004a683 lw x13,0(x9) +80001508: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0xaaaaaaaa +8000150c: 0004ab83 lw x23,0(x9) +80001510: 00448493 addi x9,x9,4 + +80001514 : +Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaa: + packh x30, x13, x23 # perform operation +80001514: 0976ff33 packh x30,x13,x23 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001518: 0005a383 lw x7,0(x11) +8000151c: 01e38863 beq x7,x30,8000152c +80001520: 0380446f jal x8,80005558 +80001524: 80001514 .word 0x80001514 +80001528: 8000a8a8 .word 0x8000a8a8 +8000152c: 00458593 addi x11,x11,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x002011ce +80001530: 0004a983 lw x19,0(x9) +80001534: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x55555555 +80001538: 0004a303 lw x6,0(x9) +8000153c: 00448493 addi x9,x9,4 + +80001540 : +Zbkb_packh_cg_cp_rs2_edges_0x55555555: + packh x18, x19, x6 # perform operation +80001540: 0869f933 packh x18,x19,x6 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cp_rs2_edges_0x55555555, Zbkb_packh_cg_cp_rs2_edges_0x55555555_str) +80001544: 0005a383 lw x7,0(x11) +80001548: 01238863 beq x7,x18,80001558 +8000154c: 00c0446f jal x8,80005558 +80001550: 80001540 .word 0x80001540 +80001554: 8000a8ea .word 0x8000a8ea +80001558: 00458593 addi x11,x11,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000000 +8000155c: 0004ac03 lw x24,0(x9) +80001560: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000 +80001564: 0004ae03 lw x28,0(x9) +80001568: 00448493 addi x9,x9,4 + +8000156c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + packh x16, x24, x28 # perform operation +8000156c: 09cc7833 packh x16,x24,x28 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001570: 0005a383 lw x7,0(x11) +80001574: 01038863 beq x7,x16,80001584 +80001578: 7e10346f jal x8,80005558 +8000157c: 8000156c .word 0x8000156c +80001580: 8000a92c .word 0x8000a92c +80001584: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x00000000 +80001588: 0004af03 lw x30,0(x9) +8000158c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x00000001 +80001590: 0004a903 lw x18,0(x9) +80001594: 00448493 addi x9,x9,4 + +80001598 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + packh x31, x30, x18 # perform operation +80001598: 092f7fb3 packh x31,x30,x18 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000159c: 0005a383 lw x7,0(x11) +800015a0: 01f38863 beq x7,x31,800015b0 +800015a4: 7b50346f jal x8,80005558 +800015a8: 80001598 .word 0x80001598 +800015ac: 8000a97e .word 0x8000a97e +800015b0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000 +800015b4: 0004af83 lw x31,0(x9) +800015b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000002 +800015bc: 0004ac83 lw x25,0(x9) +800015c0: 00448493 addi x9,x9,4 + +800015c4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + packh x16, x31, x25 # perform operation +800015c4: 099ff833 packh x16,x31,x25 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c8: 0005a383 lw x7,0(x11) +800015cc: 01038863 beq x7,x16,800015dc +800015d0: 7890346f jal x8,80005558 +800015d4: 800015c4 .word 0x800015c4 +800015d8: 8000a9d0 .word 0x8000a9d0 +800015dc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000 +800015e0: 0004ae83 lw x29,0(x9) +800015e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +800015e8: 0004ab03 lw x22,0(x9) +800015ec: 00448493 addi x9,x9,4 + +800015f0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + packh x16, x29, x22 # perform operation +800015f0: 096ef833 packh x16,x29,x22 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015f4: 0005a383 lw x7,0(x11) +800015f8: 01038863 beq x7,x16,80001608 +800015fc: 75d0346f jal x8,80005558 +80001600: 800015f0 .word 0x800015f0 +80001604: 8000aa22 .word 0x8000aa22 +80001608: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x00000000 +8000160c: 0004a283 lw x5,0(x9) +80001610: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000001 +80001614: 0004ab03 lw x22,0(x9) +80001618: 00448493 addi x9,x9,4 + +8000161c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + packh x26, x5, x22 # perform operation +8000161c: 0962fd33 packh x26,x5,x22 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001620: 0005a383 lw x7,0(x11) +80001624: 01a38863 beq x7,x26,80001634 +80001628: 7310346f jal x8,80005558 +8000162c: 8000161c .word 0x8000161c +80001630: 8000aa7b .word 0x8000aa7b +80001634: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000000 +80001638: 0004a883 lw x17,0(x9) +8000163c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffff +80001640: 0004a183 lw x3,0(x9) +80001644: 00448493 addi x9,x9,4 + +80001648 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + packh x6, x17, x3 # perform operation +80001648: 0838f333 packh x6,x17,x3 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000164c: 0005a383 lw x7,0(x11) +80001650: 00638863 beq x7,x6,80001660 +80001654: 7050346f jal x8,80005558 +80001658: 80001648 .word 0x80001648 +8000165c: 8000aad4 .word 0x8000aad4 +80001660: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000 +80001664: 0004af83 lw x31,0(x9) +80001668: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x7ffffffe +8000166c: 0004a503 lw x10,0(x9) +80001670: 00448493 addi x9,x9,4 + +80001674 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + packh x26, x31, x10 # perform operation +80001674: 08affd33 packh x26,x31,x10 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001678: 0005a383 lw x7,0(x11) +8000167c: 01a38863 beq x7,x26,8000168c +80001680: 6d90346f jal x8,80005558 +80001684: 80001674 .word 0x80001674 +80001688: 8000ab2d .word 0x8000ab2d +8000168c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x00000000 +80001690: 0004a283 lw x5,0(x9) +80001694: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0xffffffff +80001698: 0004ab83 lw x23,0(x9) +8000169c: 00448493 addi x9,x9,4 + +800016a0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + packh x22, x5, x23 # perform operation +800016a0: 0972fb33 packh x22,x5,x23 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +800016a4: 0005a383 lw x7,0(x11) +800016a8: 01638863 beq x7,x22,800016b8 +800016ac: 6ad0346f jal x8,80005558 +800016b0: 800016a0 .word 0x800016a0 +800016b4: 8000ab86 .word 0x8000ab86 +800016b8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x00000000 +800016bc: 0004ae03 lw x28,0(x9) +800016c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xfffffffe +800016c4: 0004af03 lw x30,0(x9) +800016c8: 00448493 addi x9,x9,4 + +800016cc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + packh x26, x28, x30 # perform operation +800016cc: 09ee7d33 packh x26,x28,x30 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016d0: 0005a383 lw x7,0(x11) +800016d4: 01a38863 beq x7,x26,800016e4 +800016d8: 6810346f jal x8,80005558 +800016dc: 800016cc .word 0x800016cc +800016e0: 8000abdf .word 0x8000abdf +800016e4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x00000000 +800016e8: 0004a603 lw x12,0(x9) +800016ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x5bbc8872 +800016f0: 0004a983 lw x19,0(x9) +800016f4: 00448493 addi x9,x9,4 + +800016f8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + packh x13, x12, x19 # perform operation +800016f8: 093676b3 packh x13,x12,x19 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016fc: 0005a383 lw x7,0(x11) +80001700: 00d38863 beq x7,x13,80001710 +80001704: 6550346f jal x8,80005558 +80001708: 800016f8 .word 0x800016f8 +8000170c: 8000ac38 .word 0x8000ac38 +80001710: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x00000000 +80001714: 0004ab03 lw x22,0(x9) +80001718: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xaaaaaaaa +8000171c: 0004a103 lw x2,0(x9) +80001720: 00448493 addi x9,x9,4 + +80001724 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + packh x5, x22, x2 # perform operation +80001724: 082b72b3 packh x5,x22,x2 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001728: 0005a383 lw x7,0(x11) +8000172c: 00538863 beq x7,x5,8000173c +80001730: 6290346f jal x8,80005558 +80001734: 80001724 .word 0x80001724 +80001738: 8000ac91 .word 0x8000ac91 +8000173c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x00000000 +80001740: 0004a603 lw x12,0(x9) +80001744: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x55555555 +80001748: 0004a303 lw x6,0(x9) +8000174c: 00448493 addi x9,x9,4 + +80001750 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + packh x29, x12, x6 # perform operation +80001750: 08667eb3 packh x29,x12,x6 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001754: 0005a383 lw x7,0(x11) +80001758: 01d38863 beq x7,x29,80001768 +8000175c: 5fd0346f jal x8,80005558 +80001760: 80001750 .word 0x80001750 +80001764: 8000acea .word 0x8000acea +80001768: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000001 +8000176c: 0004aa03 lw x20,0(x9) +80001770: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x00000000 +80001774: 0004af83 lw x31,0(x9) +80001778: 00448493 addi x9,x9,4 + +8000177c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + packh x21, x20, x31 # perform operation +8000177c: 09fa7ab3 packh x21,x20,x31 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001780: 0005a383 lw x7,0(x11) +80001784: 01538863 beq x7,x21,80001794 +80001788: 5d10346f jal x8,80005558 +8000178c: 8000177c .word 0x8000177c +80001790: 8000ad43 .word 0x8000ad43 +80001794: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000001 +80001798: 0004ad83 lw x27,0(x9) +8000179c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000001 +800017a0: 0004a983 lw x19,0(x9) +800017a4: 00448493 addi x9,x9,4 + +800017a8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + packh x25, x27, x19 # perform operation +800017a8: 093dfcb3 packh x25,x27,x19 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017ac: 0005a383 lw x7,0(x11) +800017b0: 01938863 beq x7,x25,800017c0 +800017b4: 5a50346f jal x8,80005558 +800017b8: 800017a8 .word 0x800017a8 +800017bc: 8000ad95 .word 0x8000ad95 +800017c0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000001 +800017c4: 0004ac83 lw x25,0(x9) +800017c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x00000002 +800017cc: 0004af83 lw x31,0(x9) +800017d0: 00448493 addi x9,x9,4 + +800017d4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + packh x14, x25, x31 # perform operation +800017d4: 09fcf733 packh x14,x25,x31 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d8: 0005a383 lw x7,0(x11) +800017dc: 00e38863 beq x7,x14,800017ec +800017e0: 5790346f jal x8,80005558 +800017e4: 800017d4 .word 0x800017d4 +800017e8: 8000ade7 .word 0x8000ade7 +800017ec: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000001 +800017f0: 0004ac83 lw x25,0(x9) +800017f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x80000000 +800017f8: 0004af03 lw x30,0(x9) +800017fc: 00448493 addi x9,x9,4 + +80001800 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + packh x21, x25, x30 # perform operation +80001800: 09ecfab3 packh x21,x25,x30 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +80001804: 0005a383 lw x7,0(x11) +80001808: 01538863 beq x7,x21,80001818 +8000180c: 54d0346f jal x8,80005558 +80001810: 80001800 .word 0x80001800 +80001814: 8000ae39 .word 0x8000ae39 +80001818: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000001 +8000181c: 0004aa83 lw x21,0(x9) +80001820: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x80000001 +80001824: 0004a803 lw x16,0(x9) +80001828: 00448493 addi x9,x9,4 + +8000182c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + packh x19, x21, x16 # perform operation +8000182c: 090af9b3 packh x19,x21,x16 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001830: 0005a383 lw x7,0(x11) +80001834: 01338863 beq x7,x19,80001844 +80001838: 5210346f jal x8,80005558 +8000183c: 8000182c .word 0x8000182c +80001840: 8000ae92 .word 0x8000ae92 +80001844: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000001 +80001848: 0004aa03 lw x20,0(x9) +8000184c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x7fffffff +80001850: 0004a203 lw x4,0(x9) +80001854: 00448493 addi x9,x9,4 + +80001858 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + packh x5, x20, x4 # perform operation +80001858: 084a72b3 packh x5,x20,x4 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000185c: 0005a383 lw x7,0(x11) +80001860: 00538863 beq x7,x5,80001870 +80001864: 4f50346f jal x8,80005558 +80001868: 80001858 .word 0x80001858 +8000186c: 8000aeeb .word 0x8000aeeb +80001870: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000001 +80001874: 0004a883 lw x17,0(x9) +80001878: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffe +8000187c: 0004a783 lw x15,0(x9) +80001880: 00448493 addi x9,x9,4 + +80001884 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + packh x25, x17, x15 # perform operation +80001884: 08f8fcb3 packh x25,x17,x15 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001888: 0005a383 lw x7,0(x11) +8000188c: 01938863 beq x7,x25,8000189c +80001890: 4c90346f jal x8,80005558 +80001894: 80001884 .word 0x80001884 +80001898: 8000af44 .word 0x8000af44 +8000189c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000001 +800018a0: 0004af83 lw x31,0(x9) +800018a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xffffffff +800018a8: 0004a903 lw x18,0(x9) +800018ac: 00448493 addi x9,x9,4 + +800018b0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + packh x10, x31, x18 # perform operation +800018b0: 092ff533 packh x10,x31,x18 + # Check if x10 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018b4: 0005a383 lw x7,0(x11) +800018b8: 00a38863 beq x7,x10,800018c8 +800018bc: 49d0346f jal x8,80005558 +800018c0: 800018b0 .word 0x800018b0 +800018c4: 8000af9d .word 0x8000af9d +800018c8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x00000001 +800018cc: 0004a303 lw x6,0(x9) +800018d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xfffffffe +800018d4: 0004af83 lw x31,0(x9) +800018d8: 00448493 addi x9,x9,4 + +800018dc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + packh x24, x6, x31 # perform operation +800018dc: 09f37c33 packh x24,x6,x31 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018e0: 0005a383 lw x7,0(x11) +800018e4: 01838863 beq x7,x24,800018f4 +800018e8: 4710346f jal x8,80005558 +800018ec: 800018dc .word 0x800018dc +800018f0: 8000aff6 .word 0x8000aff6 +800018f4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000001 +800018f8: 0004ac83 lw x25,0(x9) +800018fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x5bbc8872 +80001900: 0004a603 lw x12,0(x9) +80001904: 00448493 addi x9,x9,4 + +80001908 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + packh x14, x25, x12 # perform operation +80001908: 08ccf733 packh x14,x25,x12 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +8000190c: 0005a383 lw x7,0(x11) +80001910: 00e38863 beq x7,x14,80001920 +80001914: 4450346f jal x8,80005558 +80001918: 80001908 .word 0x80001908 +8000191c: 8000b04f .word 0x8000b04f +80001920: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x00000001 +80001924: 0004a203 lw x4,0(x9) +80001928: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xaaaaaaaa +8000192c: 0004ad03 lw x26,0(x9) +80001930: 00448493 addi x9,x9,4 + +80001934 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + packh x30, x4, x26 # perform operation +80001934: 09a27f33 packh x30,x4,x26 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001938: 0005a383 lw x7,0(x11) +8000193c: 01e38863 beq x7,x30,8000194c +80001940: 4190346f jal x8,80005558 +80001944: 80001934 .word 0x80001934 +80001948: 8000b0a8 .word 0x8000b0a8 +8000194c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000001 +80001950: 0004a883 lw x17,0(x9) +80001954: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x55555555 +80001958: 0004a803 lw x16,0(x9) +8000195c: 00448493 addi x9,x9,4 + +80001960 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + packh x22, x17, x16 # perform operation +80001960: 0908fb33 packh x22,x17,x16 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001964: 0005a383 lw x7,0(x11) +80001968: 01638863 beq x7,x22,80001978 +8000196c: 3ed0346f jal x8,80005558 +80001970: 80001960 .word 0x80001960 +80001974: 8000b101 .word 0x8000b101 +80001978: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +8000197c: 0004a903 lw x18,0(x9) +80001980: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000 +80001984: 0004aa03 lw x20,0(x9) +80001988: 00448493 addi x9,x9,4 + +8000198c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + packh x13, x18, x20 # perform operation +8000198c: 094976b3 packh x13,x18,x20 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001990: 0005a383 lw x7,0(x11) +80001994: 00d38863 beq x7,x13,800019a4 +80001998: 3c10346f jal x8,80005558 +8000199c: 8000198c .word 0x8000198c +800019a0: 8000b15a .word 0x8000b15a +800019a4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000002 +800019a8: 0004a183 lw x3,0(x9) +800019ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x00000001 +800019b0: 0004a083 lw x1,0(x9) +800019b4: 00448493 addi x9,x9,4 + +800019b8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + packh x4, x3, x1 # perform operation +800019b8: 0811f233 packh x4,x3,x1 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019bc: 0005a383 lw x7,0(x11) +800019c0: 00438863 beq x7,x4,800019d0 +800019c4: 3950346f jal x8,80005558 +800019c8: 800019b8 .word 0x800019b8 +800019cc: 8000b1ac .word 0x8000b1ac +800019d0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000002 +800019d4: 0004aa03 lw x20,0(x9) +800019d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000002 +800019dc: 0004af03 lw x30,0(x9) +800019e0: 00448493 addi x9,x9,4 + +800019e4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + packh x10, x20, x30 # perform operation +800019e4: 09ea7533 packh x10,x20,x30 + # Check if x10 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e8: 0005a383 lw x7,0(x11) +800019ec: 00a38863 beq x7,x10,800019fc +800019f0: 3690346f jal x8,80005558 +800019f4: 800019e4 .word 0x800019e4 +800019f8: 8000b1fe .word 0x8000b1fe +800019fc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +80001a00: 0004a903 lw x18,0(x9) +80001a04: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x80000000 +80001a08: 0004a283 lw x5,0(x9) +80001a0c: 00448493 addi x9,x9,4 + +80001a10 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + packh x29, x18, x5 # perform operation +80001a10: 08597eb3 packh x29,x18,x5 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a14: 0005a383 lw x7,0(x11) +80001a18: 01d38863 beq x7,x29,80001a28 +80001a1c: 33d0346f jal x8,80005558 +80001a20: 80001a10 .word 0x80001a10 +80001a24: 8000b250 .word 0x8000b250 +80001a28: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000002 +80001a2c: 0004aa03 lw x20,0(x9) +80001a30: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x80000001 +80001a34: 0004ac83 lw x25,0(x9) +80001a38: 00448493 addi x9,x9,4 + +80001a3c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + packh x18, x20, x25 # perform operation +80001a3c: 099a7933 packh x18,x20,x25 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a40: 0005a383 lw x7,0(x11) +80001a44: 01238863 beq x7,x18,80001a54 +80001a48: 3110346f jal x8,80005558 +80001a4c: 80001a3c .word 0x80001a3c +80001a50: 8000b2a9 .word 0x8000b2a9 +80001a54: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000002 +80001a58: 0004ae83 lw x29,0(x9) +80001a5c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7fffffff +80001a60: 0004af03 lw x30,0(x9) +80001a64: 00448493 addi x9,x9,4 + +80001a68 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + packh x17, x29, x30 # perform operation +80001a68: 09eef8b3 packh x17,x29,x30 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a6c: 0005a383 lw x7,0(x11) +80001a70: 01138863 beq x7,x17,80001a80 +80001a74: 2e50346f jal x8,80005558 +80001a78: 80001a68 .word 0x80001a68 +80001a7c: 8000b302 .word 0x8000b302 +80001a80: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000002 +80001a84: 0004a803 lw x16,0(x9) +80001a88: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x7ffffffe +80001a8c: 0004a283 lw x5,0(x9) +80001a90: 00448493 addi x9,x9,4 + +80001a94 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + packh x15, x16, x5 # perform operation +80001a94: 085877b3 packh x15,x16,x5 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a98: 0005a383 lw x7,0(x11) +80001a9c: 00f38863 beq x7,x15,80001aac +80001aa0: 2b90346f jal x8,80005558 +80001aa4: 80001a94 .word 0x80001a94 +80001aa8: 8000b35b .word 0x8000b35b +80001aac: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x00000002 +80001ab0: 0004af03 lw x30,0(x9) +80001ab4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xffffffff +80001ab8: 0004a283 lw x5,0(x9) +80001abc: 00448493 addi x9,x9,4 + +80001ac0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + packh x16, x30, x5 # perform operation +80001ac0: 085f7833 packh x16,x30,x5 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ac4: 0005a383 lw x7,0(x11) +80001ac8: 01038863 beq x7,x16,80001ad8 +80001acc: 28d0346f jal x8,80005558 +80001ad0: 80001ac0 .word 0x80001ac0 +80001ad4: 8000b3b4 .word 0x8000b3b4 +80001ad8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +80001adc: 0004a903 lw x18,0(x9) +80001ae0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xfffffffe +80001ae4: 0004ae03 lw x28,0(x9) +80001ae8: 00448493 addi x9,x9,4 + +80001aec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + packh x23, x18, x28 # perform operation +80001aec: 09c97bb3 packh x23,x18,x28 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001af0: 0005a383 lw x7,0(x11) +80001af4: 01738863 beq x7,x23,80001b04 +80001af8: 2610346f jal x8,80005558 +80001afc: 80001aec .word 0x80001aec +80001b00: 8000b40d .word 0x8000b40d +80001b04: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x00000002 +80001b08: 0004a683 lw x13,0(x9) +80001b0c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x5bbc8872 +80001b10: 0004af03 lw x30,0(x9) +80001b14: 00448493 addi x9,x9,4 + +80001b18 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + packh x6, x13, x30 # perform operation +80001b18: 09e6f333 packh x6,x13,x30 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b1c: 0005a383 lw x7,0(x11) +80001b20: 00638863 beq x7,x6,80001b30 +80001b24: 2350346f jal x8,80005558 +80001b28: 80001b18 .word 0x80001b18 +80001b2c: 8000b466 .word 0x8000b466 +80001b30: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000002 +80001b34: 0004a903 lw x18,0(x9) +80001b38: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xaaaaaaaa +80001b3c: 0004ad83 lw x27,0(x9) +80001b40: 00448493 addi x9,x9,4 + +80001b44 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + packh x17, x18, x27 # perform operation +80001b44: 09b978b3 packh x17,x18,x27 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b48: 0005a383 lw x7,0(x11) +80001b4c: 01138863 beq x7,x17,80001b5c +80001b50: 2090346f jal x8,80005558 +80001b54: 80001b44 .word 0x80001b44 +80001b58: 8000b4bf .word 0x8000b4bf +80001b5c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000002 +80001b60: 0004aa03 lw x20,0(x9) +80001b64: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x55555555 +80001b68: 0004ac03 lw x24,0(x9) +80001b6c: 00448493 addi x9,x9,4 + +80001b70 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + packh x18, x20, x24 # perform operation +80001b70: 098a7933 packh x18,x20,x24 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b74: 0005a383 lw x7,0(x11) +80001b78: 01238863 beq x7,x18,80001b88 +80001b7c: 1dd0346f jal x8,80005558 +80001b80: 80001b70 .word 0x80001b70 +80001b84: 8000b518 .word 0x8000b518 +80001b88: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x80000000 +80001b8c: 0004aa83 lw x21,0(x9) +80001b90: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000 +80001b94: 0004ac83 lw x25,0(x9) +80001b98: 00448493 addi x9,x9,4 + +80001b9c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + packh x20, x21, x25 # perform operation +80001b9c: 099afa33 packh x20,x21,x25 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001ba0: 0005a383 lw x7,0(x11) +80001ba4: 01438863 beq x7,x20,80001bb4 +80001ba8: 1b10346f jal x8,80005558 +80001bac: 80001b9c .word 0x80001b9c +80001bb0: 8000b571 .word 0x8000b571 +80001bb4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000000 +80001bb8: 0004aa03 lw x20,0(x9) +80001bbc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x00000001 +80001bc0: 0004a083 lw x1,0(x9) +80001bc4: 00448493 addi x9,x9,4 + +80001bc8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + packh x23, x20, x1 # perform operation +80001bc8: 081a7bb3 packh x23,x20,x1 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bcc: 0005a383 lw x7,0(x11) +80001bd0: 01738863 beq x7,x23,80001be0 +80001bd4: 1850346f jal x8,80005558 +80001bd8: 80001bc8 .word 0x80001bc8 +80001bdc: 8000b5ca .word 0x8000b5ca +80001be0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x80000000 +80001be4: 0004ab03 lw x22,0(x9) +80001be8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x00000002 +80001bec: 0004a283 lw x5,0(x9) +80001bf0: 00448493 addi x9,x9,4 + +80001bf4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + packh x2, x22, x5 # perform operation +80001bf4: 085b7133 packh x2,x22,x5 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf8: 0005a383 lw x7,0(x11) +80001bfc: 00238863 beq x7,x2,80001c0c +80001c00: 1590346f jal x8,80005558 +80001c04: 80001bf4 .word 0x80001bf4 +80001c08: 8000b623 .word 0x8000b623 +80001c0c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x80000000 +80001c10: 0004a683 lw x13,0(x9) +80001c14: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +80001c18: 0004ab03 lw x22,0(x9) +80001c1c: 00448493 addi x9,x9,4 + +80001c20 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + packh x29, x13, x22 # perform operation +80001c20: 0966feb3 packh x29,x13,x22 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c24: 0005a383 lw x7,0(x11) +80001c28: 01d38863 beq x7,x29,80001c38 +80001c2c: 12d0346f jal x8,80005558 +80001c30: 80001c20 .word 0x80001c20 +80001c34: 8000b67c .word 0x8000b67c +80001c38: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x80000000 +80001c3c: 0004ad03 lw x26,0(x9) +80001c40: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x80000001 +80001c44: 0004a903 lw x18,0(x9) +80001c48: 00448493 addi x9,x9,4 + +80001c4c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + packh x12, x26, x18 # perform operation +80001c4c: 092d7633 packh x12,x26,x18 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c50: 0005a383 lw x7,0(x11) +80001c54: 00c38863 beq x7,x12,80001c64 +80001c58: 1010346f jal x8,80005558 +80001c5c: 80001c4c .word 0x80001c4c +80001c60: 8000b6dc .word 0x8000b6dc +80001c64: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x80000000 +80001c68: 0004a783 lw x15,0(x9) +80001c6c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x7fffffff +80001c70: 0004af83 lw x31,0(x9) +80001c74: 00448493 addi x9,x9,4 + +80001c78 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + packh x19, x15, x31 # perform operation +80001c78: 09f7f9b3 packh x19,x15,x31 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c7c: 0005a383 lw x7,0(x11) +80001c80: 01338863 beq x7,x19,80001c90 +80001c84: 0d50346f jal x8,80005558 +80001c88: 80001c78 .word 0x80001c78 +80001c8c: 8000b73c .word 0x8000b73c +80001c90: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x80000000 +80001c94: 0004a803 lw x16,0(x9) +80001c98: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x7ffffffe +80001c9c: 0004a303 lw x6,0(x9) +80001ca0: 00448493 addi x9,x9,4 + +80001ca4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + packh x30, x16, x6 # perform operation +80001ca4: 08687f33 packh x30,x16,x6 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca8: 0005a383 lw x7,0(x11) +80001cac: 01e38863 beq x7,x30,80001cbc +80001cb0: 0a90346f jal x8,80005558 +80001cb4: 80001ca4 .word 0x80001ca4 +80001cb8: 8000b79c .word 0x8000b79c +80001cbc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x80000000 +80001cc0: 0004a803 lw x16,0(x9) +80001cc4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xffffffff +80001cc8: 0004aa83 lw x21,0(x9) +80001ccc: 00448493 addi x9,x9,4 + +80001cd0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + packh x3, x16, x21 # perform operation +80001cd0: 095871b3 packh x3,x16,x21 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cd4: 0005a383 lw x7,0(x11) +80001cd8: 00338863 beq x7,x3,80001ce8 +80001cdc: 07d0346f jal x8,80005558 +80001ce0: 80001cd0 .word 0x80001cd0 +80001ce4: 8000b7fc .word 0x8000b7fc +80001ce8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x80000000 +80001cec: 0004a703 lw x14,0(x9) +80001cf0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfffffffe +80001cf4: 0004ac03 lw x24,0(x9) +80001cf8: 00448493 addi x9,x9,4 + +80001cfc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + packh x18, x14, x24 # perform operation +80001cfc: 09877933 packh x18,x14,x24 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001d00: 0005a383 lw x7,0(x11) +80001d04: 01238863 beq x7,x18,80001d14 +80001d08: 0510346f jal x8,80005558 +80001d0c: 80001cfc .word 0x80001cfc +80001d10: 8000b85c .word 0x8000b85c +80001d14: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x80000000 +80001d18: 0004a903 lw x18,0(x9) +80001d1c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5bbc8872 +80001d20: 0004a683 lw x13,0(x9) +80001d24: 00448493 addi x9,x9,4 + +80001d28 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + packh x2, x18, x13 # perform operation +80001d28: 08d97133 packh x2,x18,x13 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d2c: 0005a383 lw x7,0(x11) +80001d30: 00238863 beq x7,x2,80001d40 +80001d34: 0250346f jal x8,80005558 +80001d38: 80001d28 .word 0x80001d28 +80001d3c: 8000b8bc .word 0x8000b8bc +80001d40: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x80000000 +80001d44: 0004af83 lw x31,0(x9) +80001d48: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xaaaaaaaa +80001d4c: 0004a283 lw x5,0(x9) +80001d50: 00448493 addi x9,x9,4 + +80001d54 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + packh x23, x31, x5 # perform operation +80001d54: 085ffbb3 packh x23,x31,x5 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d58: 0005a383 lw x7,0(x11) +80001d5c: 01738863 beq x7,x23,80001d6c +80001d60: 7f80346f jal x8,80005558 +80001d64: 80001d54 .word 0x80001d54 +80001d68: 8000b91c .word 0x8000b91c +80001d6c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x80000000 +80001d70: 0004a303 lw x6,0(x9) +80001d74: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x55555555 +80001d78: 0004ac03 lw x24,0(x9) +80001d7c: 00448493 addi x9,x9,4 + +80001d80 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + packh x5, x6, x24 # perform operation +80001d80: 098372b3 packh x5,x6,x24 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d84: 0005a383 lw x7,0(x11) +80001d88: 00538863 beq x7,x5,80001d98 +80001d8c: 7cc0346f jal x8,80005558 +80001d90: 80001d80 .word 0x80001d80 +80001d94: 8000b97c .word 0x8000b97c +80001d98: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x80000001 +80001d9c: 0004ac83 lw x25,0(x9) +80001da0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000000 +80001da4: 0004af03 lw x30,0(x9) +80001da8: 00448493 addi x9,x9,4 + +80001dac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + packh x18, x25, x30 # perform operation +80001dac: 09ecf933 packh x18,x25,x30 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001db0: 0005a383 lw x7,0(x11) +80001db4: 01238863 beq x7,x18,80001dc4 +80001db8: 7a00346f jal x8,80005558 +80001dbc: 80001dac .word 0x80001dac +80001dc0: 8000b9dc .word 0x8000b9dc +80001dc4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x80000001 +80001dc8: 0004a203 lw x4,0(x9) +80001dcc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000001 +80001dd0: 0004a503 lw x10,0(x9) +80001dd4: 00448493 addi x9,x9,4 + +80001dd8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + packh x14, x4, x10 # perform operation +80001dd8: 08a27733 packh x14,x4,x10 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001ddc: 0005a383 lw x7,0(x11) +80001de0: 00e38863 beq x7,x14,80001df0 +80001de4: 7740346f jal x8,80005558 +80001de8: 80001dd8 .word 0x80001dd8 +80001dec: 8000ba35 .word 0x8000ba35 +80001df0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x80000001 +80001df4: 0004a083 lw x1,0(x9) +80001df8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000002 +80001dfc: 0004aa03 lw x20,0(x9) +80001e00: 00448493 addi x9,x9,4 + +80001e04 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + packh x24, x1, x20 # perform operation +80001e04: 0940fc33 packh x24,x1,x20 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e08: 0005a383 lw x7,0(x11) +80001e0c: 01838863 beq x7,x24,80001e1c +80001e10: 7480346f jal x8,80005558 +80001e14: 80001e04 .word 0x80001e04 +80001e18: 8000ba8e .word 0x8000ba8e +80001e1c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x80000001 +80001e20: 0004a783 lw x15,0(x9) +80001e24: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +80001e28: 0004ab03 lw x22,0(x9) +80001e2c: 00448493 addi x9,x9,4 + +80001e30 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + packh x20, x15, x22 # perform operation +80001e30: 0967fa33 packh x20,x15,x22 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e34: 0005a383 lw x7,0(x11) +80001e38: 01438863 beq x7,x20,80001e48 +80001e3c: 71c0346f jal x8,80005558 +80001e40: 80001e30 .word 0x80001e30 +80001e44: 8000bae7 .word 0x8000bae7 +80001e48: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x80000001 +80001e4c: 0004ae03 lw x28,0(x9) +80001e50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x80000001 +80001e54: 0004a983 lw x19,0(x9) +80001e58: 00448493 addi x9,x9,4 + +80001e5c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + packh x21, x28, x19 # perform operation +80001e5c: 093e7ab3 packh x21,x28,x19 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e60: 0005a383 lw x7,0(x11) +80001e64: 01538863 beq x7,x21,80001e74 +80001e68: 6f00346f jal x8,80005558 +80001e6c: 80001e5c .word 0x80001e5c +80001e70: 8000bb47 .word 0x8000bb47 +80001e74: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x80000001 +80001e78: 0004ae03 lw x28,0(x9) +80001e7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7fffffff +80001e80: 0004ab83 lw x23,0(x9) +80001e84: 00448493 addi x9,x9,4 + +80001e88 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + packh x3, x28, x23 # perform operation +80001e88: 097e71b3 packh x3,x28,x23 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e8c: 0005a383 lw x7,0(x11) +80001e90: 00338863 beq x7,x3,80001ea0 +80001e94: 6c40346f jal x8,80005558 +80001e98: 80001e88 .word 0x80001e88 +80001e9c: 8000bba7 .word 0x8000bba7 +80001ea0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x80000001 +80001ea4: 0004ae83 lw x29,0(x9) +80001ea8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffe +80001eac: 0004a783 lw x15,0(x9) +80001eb0: 00448493 addi x9,x9,4 + +80001eb4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + packh x25, x29, x15 # perform operation +80001eb4: 08fefcb3 packh x25,x29,x15 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb8: 0005a383 lw x7,0(x11) +80001ebc: 01938863 beq x7,x25,80001ecc +80001ec0: 6980346f jal x8,80005558 +80001ec4: 80001eb4 .word 0x80001eb4 +80001ec8: 8000bc07 .word 0x8000bc07 +80001ecc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x80000001 +80001ed0: 0004ab83 lw x23,0(x9) +80001ed4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xffffffff +80001ed8: 0004ad83 lw x27,0(x9) +80001edc: 00448493 addi x9,x9,4 + +80001ee0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + packh x12, x23, x27 # perform operation +80001ee0: 09bbf633 packh x12,x23,x27 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ee4: 0005a383 lw x7,0(x11) +80001ee8: 00c38863 beq x7,x12,80001ef8 +80001eec: 66c0346f jal x8,80005558 +80001ef0: 80001ee0 .word 0x80001ee0 +80001ef4: 8000bc67 .word 0x8000bc67 +80001ef8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x80000001 +80001efc: 0004ad83 lw x27,0(x9) +80001f00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xfffffffe +80001f04: 0004a303 lw x6,0(x9) +80001f08: 00448493 addi x9,x9,4 + +80001f0c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + packh x5, x27, x6 # perform operation +80001f0c: 086df2b3 packh x5,x27,x6 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f10: 0005a383 lw x7,0(x11) +80001f14: 00538863 beq x7,x5,80001f24 +80001f18: 6400346f jal x8,80005558 +80001f1c: 80001f0c .word 0x80001f0c +80001f20: 8000bcc7 .word 0x8000bcc7 +80001f24: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x80000001 +80001f28: 0004a803 lw x16,0(x9) +80001f2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x5bbc8872 +80001f30: 0004a283 lw x5,0(x9) +80001f34: 00448493 addi x9,x9,4 + +80001f38 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + packh x19, x16, x5 # perform operation +80001f38: 085879b3 packh x19,x16,x5 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f3c: 0005a383 lw x7,0(x11) +80001f40: 01338863 beq x7,x19,80001f50 +80001f44: 6140346f jal x8,80005558 +80001f48: 80001f38 .word 0x80001f38 +80001f4c: 8000bd27 .word 0x8000bd27 +80001f50: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x80000001 +80001f54: 0004ac03 lw x24,0(x9) +80001f58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xaaaaaaaa +80001f5c: 0004a283 lw x5,0(x9) +80001f60: 00448493 addi x9,x9,4 + +80001f64 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + packh x14, x24, x5 # perform operation +80001f64: 085c7733 packh x14,x24,x5 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f68: 0005a383 lw x7,0(x11) +80001f6c: 00e38863 beq x7,x14,80001f7c +80001f70: 5e80346f jal x8,80005558 +80001f74: 80001f64 .word 0x80001f64 +80001f78: 8000bd87 .word 0x8000bd87 +80001f7c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x80000001 +80001f80: 0004a183 lw x3,0(x9) +80001f84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x55555555 +80001f88: 0004a103 lw x2,0(x9) +80001f8c: 00448493 addi x9,x9,4 + +80001f90 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + packh x29, x3, x2 # perform operation +80001f90: 0821feb3 packh x29,x3,x2 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f94: 0005a383 lw x7,0(x11) +80001f98: 01d38863 beq x7,x29,80001fa8 +80001f9c: 5bc0346f jal x8,80005558 +80001fa0: 80001f90 .word 0x80001f90 +80001fa4: 8000bde7 .word 0x8000bde7 +80001fa8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x7fffffff +80001fac: 0004a303 lw x6,0(x9) +80001fb0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000000 +80001fb4: 0004a883 lw x17,0(x9) +80001fb8: 00448493 addi x9,x9,4 + +80001fbc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + packh x2, x6, x17 # perform operation +80001fbc: 09137133 packh x2,x6,x17 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fc0: 0005a383 lw x7,0(x11) +80001fc4: 00238863 beq x7,x2,80001fd4 +80001fc8: 5900346f jal x8,80005558 +80001fcc: 80001fbc .word 0x80001fbc +80001fd0: 8000be47 .word 0x8000be47 +80001fd4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x7fffffff +80001fd8: 0004ad03 lw x26,0(x9) +80001fdc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000001 +80001fe0: 0004ae03 lw x28,0(x9) +80001fe4: 00448493 addi x9,x9,4 + +80001fe8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + packh x20, x26, x28 # perform operation +80001fe8: 09cd7a33 packh x20,x26,x28 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fec: 0005a383 lw x7,0(x11) +80001ff0: 01438863 beq x7,x20,80002000 +80001ff4: 5640346f jal x8,80005558 +80001ff8: 80001fe8 .word 0x80001fe8 +80001ffc: 8000bea0 .word 0x8000bea0 +80002000: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffff +80002004: 0004a803 lw x16,0(x9) +80002008: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000002 +8000200c: 0004af03 lw x30,0(x9) +80002010: 00448493 addi x9,x9,4 + +80002014 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + packh x22, x16, x30 # perform operation +80002014: 09e87b33 packh x22,x16,x30 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002018: 0005a383 lw x7,0(x11) +8000201c: 01638863 beq x7,x22,8000202c +80002020: 5380346f jal x8,80005558 +80002024: 80002014 .word 0x80002014 +80002028: 8000bef9 .word 0x8000bef9 +8000202c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7fffffff +80002030: 0004a783 lw x15,0(x9) +80002034: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x80000000 +80002038: 0004a603 lw x12,0(x9) +8000203c: 00448493 addi x9,x9,4 + +80002040 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + packh x18, x15, x12 # perform operation +80002040: 08c7f933 packh x18,x15,x12 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002044: 0005a383 lw x7,0(x11) +80002048: 01238863 beq x7,x18,80002058 +8000204c: 50c0346f jal x8,80005558 +80002050: 80002040 .word 0x80002040 +80002054: 8000bf52 .word 0x8000bf52 +80002058: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7fffffff +8000205c: 0004a503 lw x10,0(x9) +80002060: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x80000001 +80002064: 0004ae03 lw x28,0(x9) +80002068: 00448493 addi x9,x9,4 + +8000206c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + packh x6, x10, x28 # perform operation +8000206c: 09c57333 packh x6,x10,x28 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002070: 0005a383 lw x7,0(x11) +80002074: 00638863 beq x7,x6,80002084 +80002078: 4e00346f jal x8,80005558 +8000207c: 8000206c .word 0x8000206c +80002080: 8000bfb2 .word 0x8000bfb2 +80002084: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7fffffff +80002088: 0004a783 lw x15,0(x9) +8000208c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffff +80002090: 0004aa03 lw x20,0(x9) +80002094: 00448493 addi x9,x9,4 + +80002098 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + packh x3, x15, x20 # perform operation +80002098: 0947f1b3 packh x3,x15,x20 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000209c: 0005a383 lw x7,0(x11) +800020a0: 00338863 beq x7,x3,800020b0 +800020a4: 4b40346f jal x8,80005558 +800020a8: 80002098 .word 0x80002098 +800020ac: 8000c012 .word 0x8000c012 +800020b0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7fffffff +800020b4: 0004ac83 lw x25,0(x9) +800020b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffe +800020bc: 0004ae83 lw x29,0(x9) +800020c0: 00448493 addi x9,x9,4 + +800020c4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + packh x13, x25, x29 # perform operation +800020c4: 09dcf6b3 packh x13,x25,x29 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c8: 0005a383 lw x7,0(x11) +800020cc: 00d38863 beq x7,x13,800020dc +800020d0: 4880346f jal x8,80005558 +800020d4: 800020c4 .word 0x800020c4 +800020d8: 8000c072 .word 0x8000c072 +800020dc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x7fffffff +800020e0: 0004af03 lw x30,0(x9) +800020e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xffffffff +800020e8: 0004a603 lw x12,0(x9) +800020ec: 00448493 addi x9,x9,4 + +800020f0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + packh x17, x30, x12 # perform operation +800020f0: 08cf78b3 packh x17,x30,x12 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020f4: 0005a383 lw x7,0(x11) +800020f8: 01138863 beq x7,x17,80002108 +800020fc: 45c0346f jal x8,80005558 +80002100: 800020f0 .word 0x800020f0 +80002104: 8000c0d2 .word 0x8000c0d2 +80002108: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7fffffff +8000210c: 0004ac83 lw x25,0(x9) +80002110: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xfffffffe +80002114: 0004a103 lw x2,0(x9) +80002118: 00448493 addi x9,x9,4 + +8000211c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + packh x26, x25, x2 # perform operation +8000211c: 082cfd33 packh x26,x25,x2 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002120: 0005a383 lw x7,0(x11) +80002124: 01a38863 beq x7,x26,80002134 +80002128: 4300346f jal x8,80005558 +8000212c: 8000211c .word 0x8000211c +80002130: 8000c132 .word 0x8000c132 +80002134: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffff +80002138: 0004a803 lw x16,0(x9) +8000213c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x5bbc8872 +80002140: 0004a283 lw x5,0(x9) +80002144: 00448493 addi x9,x9,4 + +80002148 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + packh x1, x16, x5 # perform operation +80002148: 085870b3 packh x1,x16,x5 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000214c: 0005a383 lw x7,0(x11) +80002150: 00138863 beq x7,x1,80002160 +80002154: 4040346f jal x8,80005558 +80002158: 80002148 .word 0x80002148 +8000215c: 8000c192 .word 0x8000c192 +80002160: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7fffffff +80002164: 0004a703 lw x14,0(x9) +80002168: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xaaaaaaaa +8000216c: 0004a303 lw x6,0(x9) +80002170: 00448493 addi x9,x9,4 + +80002174 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + packh x23, x14, x6 # perform operation +80002174: 08677bb3 packh x23,x14,x6 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002178: 0005a383 lw x7,0(x11) +8000217c: 01738863 beq x7,x23,8000218c +80002180: 3d80346f jal x8,80005558 +80002184: 80002174 .word 0x80002174 +80002188: 8000c1f2 .word 0x8000c1f2 +8000218c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x7fffffff +80002190: 0004a203 lw x4,0(x9) +80002194: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x55555555 +80002198: 0004af03 lw x30,0(x9) +8000219c: 00448493 addi x9,x9,4 + +800021a0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + packh x3, x4, x30 # perform operation +800021a0: 09e271b3 packh x3,x4,x30 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +800021a4: 0005a383 lw x7,0(x11) +800021a8: 00338863 beq x7,x3,800021b8 +800021ac: 3ac0346f jal x8,80005558 +800021b0: 800021a0 .word 0x800021a0 +800021b4: 8000c252 .word 0x8000c252 +800021b8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7ffffffe +800021bc: 0004ac83 lw x25,0(x9) +800021c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x00000000 +800021c4: 0004a903 lw x18,0(x9) +800021c8: 00448493 addi x9,x9,4 + +800021cc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + packh x28, x25, x18 # perform operation +800021cc: 092cfe33 packh x28,x25,x18 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021d0: 0005a383 lw x7,0(x11) +800021d4: 01c38863 beq x7,x28,800021e4 +800021d8: 3800346f jal x8,80005558 +800021dc: 800021cc .word 0x800021cc +800021e0: 8000c2b2 .word 0x8000c2b2 +800021e4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7ffffffe +800021e8: 0004ac83 lw x25,0(x9) +800021ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x00000001 +800021f0: 0004a083 lw x1,0(x9) +800021f4: 00448493 addi x9,x9,4 + +800021f8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + packh x18, x25, x1 # perform operation +800021f8: 081cf933 packh x18,x25,x1 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021fc: 0005a383 lw x7,0(x11) +80002200: 01238863 beq x7,x18,80002210 +80002204: 3540346f jal x8,80005558 +80002208: 800021f8 .word 0x800021f8 +8000220c: 8000c30b .word 0x8000c30b +80002210: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffe +80002214: 0004aa83 lw x21,0(x9) +80002218: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x00000002 +8000221c: 0004a083 lw x1,0(x9) +80002220: 00448493 addi x9,x9,4 + +80002224 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + packh x27, x21, x1 # perform operation +80002224: 081afdb3 packh x27,x21,x1 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002228: 0005a383 lw x7,0(x11) +8000222c: 01b38863 beq x7,x27,8000223c +80002230: 3280346f jal x8,80005558 +80002234: 80002224 .word 0x80002224 +80002238: 8000c364 .word 0x8000c364 +8000223c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +80002240: 0004ae83 lw x29,0(x9) +80002244: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x80000000 +80002248: 0004a983 lw x19,0(x9) +8000224c: 00448493 addi x9,x9,4 + +80002250 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + packh x22, x29, x19 # perform operation +80002250: 093efb33 packh x22,x29,x19 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002254: 0005a383 lw x7,0(x11) +80002258: 01638863 beq x7,x22,80002268 +8000225c: 2fc0346f jal x8,80005558 +80002260: 80002250 .word 0x80002250 +80002264: 8000c3bd .word 0x8000c3bd +80002268: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7ffffffe +8000226c: 0004aa03 lw x20,0(x9) +80002270: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x80000001 +80002274: 0004af83 lw x31,0(x9) +80002278: 00448493 addi x9,x9,4 + +8000227c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + packh x26, x20, x31 # perform operation +8000227c: 09fa7d33 packh x26,x20,x31 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002280: 0005a383 lw x7,0(x11) +80002284: 01a38863 beq x7,x26,80002294 +80002288: 2d00346f jal x8,80005558 +8000228c: 8000227c .word 0x8000227c +80002290: 8000c41d .word 0x8000c41d +80002294: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +80002298: 0004ae83 lw x29,0(x9) +8000229c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x7fffffff +800022a0: 0004ac03 lw x24,0(x9) +800022a4: 00448493 addi x9,x9,4 + +800022a8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + packh x13, x29, x24 # perform operation +800022a8: 098ef6b3 packh x13,x29,x24 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022ac: 0005a383 lw x7,0(x11) +800022b0: 00d38863 beq x7,x13,800022c0 +800022b4: 2a40346f jal x8,80005558 +800022b8: 800022a8 .word 0x800022a8 +800022bc: 8000c47d .word 0x8000c47d +800022c0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x7ffffffe +800022c4: 0004ab83 lw x23,0(x9) +800022c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x7ffffffe +800022cc: 0004ab03 lw x22,0(x9) +800022d0: 00448493 addi x9,x9,4 + +800022d4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + packh x20, x23, x22 # perform operation +800022d4: 096bfa33 packh x20,x23,x22 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d8: 0005a383 lw x7,0(x11) +800022dc: 01438863 beq x7,x20,800022ec +800022e0: 2780346f jal x8,80005558 +800022e4: 800022d4 .word 0x800022d4 +800022e8: 8000c4dd .word 0x8000c4dd +800022ec: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +800022f0: 0004ae83 lw x29,0(x9) +800022f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xffffffff +800022f8: 0004a503 lw x10,0(x9) +800022fc: 00448493 addi x9,x9,4 + +80002300 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + packh x4, x29, x10 # perform operation +80002300: 08aef233 packh x4,x29,x10 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +80002304: 0005a383 lw x7,0(x11) +80002308: 00438863 beq x7,x4,80002318 +8000230c: 24c0346f jal x8,80005558 +80002310: 80002300 .word 0x80002300 +80002314: 8000c53d .word 0x8000c53d +80002318: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7ffffffe +8000231c: 0004ac83 lw x25,0(x9) +80002320: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xfffffffe +80002324: 0004ab03 lw x22,0(x9) +80002328: 00448493 addi x9,x9,4 + +8000232c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + packh x6, x25, x22 # perform operation +8000232c: 096cf333 packh x6,x25,x22 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002330: 0005a383 lw x7,0(x11) +80002334: 00638863 beq x7,x6,80002344 +80002338: 2200346f jal x8,80005558 +8000233c: 8000232c .word 0x8000232c +80002340: 8000c59d .word 0x8000c59d +80002344: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7ffffffe +80002348: 0004ac83 lw x25,0(x9) +8000234c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5bbc8872 +80002350: 0004ab03 lw x22,0(x9) +80002354: 00448493 addi x9,x9,4 + +80002358 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + packh x19, x25, x22 # perform operation +80002358: 096cf9b3 packh x19,x25,x22 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000235c: 0005a383 lw x7,0(x11) +80002360: 01338863 beq x7,x19,80002370 +80002364: 1f40346f jal x8,80005558 +80002368: 80002358 .word 0x80002358 +8000236c: 8000c5fd .word 0x8000c5fd +80002370: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7ffffffe +80002374: 0004a983 lw x19,0(x9) +80002378: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xaaaaaaaa +8000237c: 0004a203 lw x4,0(x9) +80002380: 00448493 addi x9,x9,4 + +80002384 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + packh x1, x19, x4 # perform operation +80002384: 0849f0b3 packh x1,x19,x4 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002388: 0005a383 lw x7,0(x11) +8000238c: 00138863 beq x7,x1,8000239c +80002390: 1c80346f jal x8,80005558 +80002394: 80002384 .word 0x80002384 +80002398: 8000c65d .word 0x8000c65d +8000239c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffe +800023a0: 0004aa83 lw x21,0(x9) +800023a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x55555555 +800023a8: 0004a883 lw x17,0(x9) +800023ac: 00448493 addi x9,x9,4 + +800023b0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + packh x15, x21, x17 # perform operation +800023b0: 091af7b3 packh x15,x21,x17 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023b4: 0005a383 lw x7,0(x11) +800023b8: 00f38863 beq x7,x15,800023c8 +800023bc: 19c0346f jal x8,80005558 +800023c0: 800023b0 .word 0x800023b0 +800023c4: 8000c6bd .word 0x8000c6bd +800023c8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xffffffff +800023cc: 0004aa03 lw x20,0(x9) +800023d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000000 +800023d4: 0004ab03 lw x22,0(x9) +800023d8: 00448493 addi x9,x9,4 + +800023dc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + packh x14, x20, x22 # perform operation +800023dc: 096a7733 packh x14,x20,x22 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023e0: 0005a383 lw x7,0(x11) +800023e4: 00e38863 beq x7,x14,800023f4 +800023e8: 1700346f jal x8,80005558 +800023ec: 800023dc .word 0x800023dc +800023f0: 8000c71d .word 0x8000c71d +800023f4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xffffffff +800023f8: 0004a783 lw x15,0(x9) +800023fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x00000001 +80002400: 0004a083 lw x1,0(x9) +80002404: 00448493 addi x9,x9,4 + +80002408 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + packh x2, x15, x1 # perform operation +80002408: 0817f133 packh x2,x15,x1 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +8000240c: 0005a383 lw x7,0(x11) +80002410: 00238863 beq x7,x2,80002420 +80002414: 1440346f jal x8,80005558 +80002418: 80002408 .word 0x80002408 +8000241c: 8000c776 .word 0x8000c776 +80002420: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffff +80002424: 0004a703 lw x14,0(x9) +80002428: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000002 +8000242c: 0004a683 lw x13,0(x9) +80002430: 00448493 addi x9,x9,4 + +80002434 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + packh x22, x14, x13 # perform operation +80002434: 08d77b33 packh x22,x14,x13 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002438: 0005a383 lw x7,0(x11) +8000243c: 01638863 beq x7,x22,8000244c +80002440: 1180346f jal x8,80005558 +80002444: 80002434 .word 0x80002434 +80002448: 8000c7cf .word 0x8000c7cf +8000244c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffff +80002450: 0004a103 lw x2,0(x9) +80002454: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000000 +80002458: 0004ac03 lw x24,0(x9) +8000245c: 00448493 addi x9,x9,4 + +80002460 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + packh x17, x2, x24 # perform operation +80002460: 098178b3 packh x17,x2,x24 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002464: 0005a383 lw x7,0(x11) +80002468: 01138863 beq x7,x17,80002478 +8000246c: 0ec0346f jal x8,80005558 +80002470: 80002460 .word 0x80002460 +80002474: 8000c828 .word 0x8000c828 +80002478: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xffffffff +8000247c: 0004a183 lw x3,0(x9) +80002480: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000001 +80002484: 0004ac03 lw x24,0(x9) +80002488: 00448493 addi x9,x9,4 + +8000248c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + packh x23, x3, x24 # perform operation +8000248c: 0981fbb3 packh x23,x3,x24 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002490: 0005a383 lw x7,0(x11) +80002494: 01738863 beq x7,x23,800024a4 +80002498: 0c00346f jal x8,80005558 +8000249c: 8000248c .word 0x8000248c +800024a0: 8000c888 .word 0x8000c888 +800024a4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffff +800024a8: 0004a703 lw x14,0(x9) +800024ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7fffffff +800024b0: 0004a903 lw x18,0(x9) +800024b4: 00448493 addi x9,x9,4 + +800024b8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + packh x28, x14, x18 # perform operation +800024b8: 09277e33 packh x28,x14,x18 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024bc: 0005a383 lw x7,0(x11) +800024c0: 01c38863 beq x7,x28,800024d0 +800024c4: 0940346f jal x8,80005558 +800024c8: 800024b8 .word 0x800024b8 +800024cc: 8000c8e8 .word 0x8000c8e8 +800024d0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xffffffff +800024d4: 0004ac83 lw x25,0(x9) +800024d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x7ffffffe +800024dc: 0004a303 lw x6,0(x9) +800024e0: 00448493 addi x9,x9,4 + +800024e4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + packh x17, x25, x6 # perform operation +800024e4: 086cf8b3 packh x17,x25,x6 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e8: 0005a383 lw x7,0(x11) +800024ec: 01138863 beq x7,x17,800024fc +800024f0: 0680346f jal x8,80005558 +800024f4: 800024e4 .word 0x800024e4 +800024f8: 8000c948 .word 0x8000c948 +800024fc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffff +80002500: 0004a103 lw x2,0(x9) +80002504: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xffffffff +80002508: 0004a683 lw x13,0(x9) +8000250c: 00448493 addi x9,x9,4 + +80002510 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + packh x12, x2, x13 # perform operation +80002510: 08d17633 packh x12,x2,x13 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002514: 0005a383 lw x7,0(x11) +80002518: 00c38863 beq x7,x12,80002528 +8000251c: 03c0346f jal x8,80005558 +80002520: 80002510 .word 0x80002510 +80002524: 8000c9a8 .word 0x8000c9a8 +80002528: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xffffffff +8000252c: 0004af83 lw x31,0(x9) +80002530: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xfffffffe +80002534: 0004a283 lw x5,0(x9) +80002538: 00448493 addi x9,x9,4 + +8000253c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + packh x23, x31, x5 # perform operation +8000253c: 085ffbb3 packh x23,x31,x5 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002540: 0005a383 lw x7,0(x11) +80002544: 01738863 beq x7,x23,80002554 +80002548: 0100346f jal x8,80005558 +8000254c: 8000253c .word 0x8000253c +80002550: 8000ca08 .word 0x8000ca08 +80002554: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xffffffff +80002558: 0004ae03 lw x28,0(x9) +8000255c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5bbc8872 +80002560: 0004a183 lw x3,0(x9) +80002564: 00448493 addi x9,x9,4 + +80002568 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + packh x15, x28, x3 # perform operation +80002568: 083e77b3 packh x15,x28,x3 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000256c: 0005a383 lw x7,0(x11) +80002570: 00f38863 beq x7,x15,80002580 +80002574: 7e50246f jal x8,80005558 +80002578: 80002568 .word 0x80002568 +8000257c: 8000ca68 .word 0x8000ca68 +80002580: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xffffffff +80002584: 0004af83 lw x31,0(x9) +80002588: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaa +8000258c: 0004aa03 lw x20,0(x9) +80002590: 00448493 addi x9,x9,4 + +80002594 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + packh x4, x31, x20 # perform operation +80002594: 094ff233 packh x4,x31,x20 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002598: 0005a383 lw x7,0(x11) +8000259c: 00438863 beq x7,x4,800025ac +800025a0: 7b90246f jal x8,80005558 +800025a4: 80002594 .word 0x80002594 +800025a8: 8000cac8 .word 0x8000cac8 +800025ac: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xffffffff +800025b0: 0004aa03 lw x20,0(x9) +800025b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x55555555 +800025b8: 0004a283 lw x5,0(x9) +800025bc: 00448493 addi x9,x9,4 + +800025c0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + packh x14, x20, x5 # perform operation +800025c0: 085a7733 packh x14,x20,x5 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025c4: 0005a383 lw x7,0(x11) +800025c8: 00e38863 beq x7,x14,800025d8 +800025cc: 78d0246f jal x8,80005558 +800025d0: 800025c0 .word 0x800025c0 +800025d4: 8000cb28 .word 0x8000cb28 +800025d8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xfffffffe +800025dc: 0004a683 lw x13,0(x9) +800025e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x00000000 +800025e4: 0004a283 lw x5,0(x9) +800025e8: 00448493 addi x9,x9,4 + +800025ec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + packh x22, x13, x5 # perform operation +800025ec: 0856fb33 packh x22,x13,x5 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025f0: 0005a383 lw x7,0(x11) +800025f4: 01638863 beq x7,x22,80002604 +800025f8: 7610246f jal x8,80005558 +800025fc: 800025ec .word 0x800025ec +80002600: 8000cb88 .word 0x8000cb88 +80002604: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffe +80002608: 0004a083 lw x1,0(x9) +8000260c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x00000001 +80002610: 0004ab83 lw x23,0(x9) +80002614: 00448493 addi x9,x9,4 + +80002618 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + packh x10, x1, x23 # perform operation +80002618: 0970f533 packh x10,x1,x23 + # Check if x10 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +8000261c: 0005a383 lw x7,0(x11) +80002620: 00a38863 beq x7,x10,80002630 +80002624: 7350246f jal x8,80005558 +80002628: 80002618 .word 0x80002618 +8000262c: 8000cbe1 .word 0x8000cbe1 +80002630: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xfffffffe +80002634: 0004ad03 lw x26,0(x9) +80002638: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000002 +8000263c: 0004ae03 lw x28,0(x9) +80002640: 00448493 addi x9,x9,4 + +80002644 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + packh x16, x26, x28 # perform operation +80002644: 09cd7833 packh x16,x26,x28 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002648: 0005a383 lw x7,0(x11) +8000264c: 01038863 beq x7,x16,8000265c +80002650: 7090246f jal x8,80005558 +80002654: 80002644 .word 0x80002644 +80002658: 8000cc3a .word 0x8000cc3a +8000265c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xfffffffe +80002660: 0004aa83 lw x21,0(x9) +80002664: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x80000000 +80002668: 0004a203 lw x4,0(x9) +8000266c: 00448493 addi x9,x9,4 + +80002670 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + packh x13, x21, x4 # perform operation +80002670: 084af6b3 packh x13,x21,x4 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002674: 0005a383 lw x7,0(x11) +80002678: 00d38863 beq x7,x13,80002688 +8000267c: 6dd0246f jal x8,80005558 +80002680: 80002670 .word 0x80002670 +80002684: 8000cc93 .word 0x8000cc93 +80002688: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xfffffffe +8000268c: 0004ae03 lw x28,0(x9) +80002690: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x80000001 +80002694: 0004a303 lw x6,0(x9) +80002698: 00448493 addi x9,x9,4 + +8000269c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + packh x27, x28, x6 # perform operation +8000269c: 086e7db3 packh x27,x28,x6 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +800026a0: 0005a383 lw x7,0(x11) +800026a4: 01b38863 beq x7,x27,800026b4 +800026a8: 6b10246f jal x8,80005558 +800026ac: 8000269c .word 0x8000269c +800026b0: 8000ccf3 .word 0x8000ccf3 +800026b4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xfffffffe +800026b8: 0004a983 lw x19,0(x9) +800026bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7fffffff +800026c0: 0004a883 lw x17,0(x9) +800026c4: 00448493 addi x9,x9,4 + +800026c8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + packh x16, x19, x17 # perform operation +800026c8: 0919f833 packh x16,x19,x17 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026cc: 0005a383 lw x7,0(x11) +800026d0: 01038863 beq x7,x16,800026e0 +800026d4: 6850246f jal x8,80005558 +800026d8: 800026c8 .word 0x800026c8 +800026dc: 8000cd53 .word 0x8000cd53 +800026e0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xfffffffe +800026e4: 0004a183 lw x3,0(x9) +800026e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x7ffffffe +800026ec: 0004aa83 lw x21,0(x9) +800026f0: 00448493 addi x9,x9,4 + +800026f4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + packh x12, x3, x21 # perform operation +800026f4: 0951f633 packh x12,x3,x21 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f8: 0005a383 lw x7,0(x11) +800026fc: 00c38863 beq x7,x12,8000270c +80002700: 6590246f jal x8,80005558 +80002704: 800026f4 .word 0x800026f4 +80002708: 8000cdb3 .word 0x8000cdb3 +8000270c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xfffffffe +80002710: 0004a783 lw x15,0(x9) +80002714: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xffffffff +80002718: 0004a603 lw x12,0(x9) +8000271c: 00448493 addi x9,x9,4 + +80002720 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + packh x17, x15, x12 # perform operation +80002720: 08c7f8b3 packh x17,x15,x12 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002724: 0005a383 lw x7,0(x11) +80002728: 01138863 beq x7,x17,80002738 +8000272c: 62d0246f jal x8,80005558 +80002730: 80002720 .word 0x80002720 +80002734: 8000ce13 .word 0x8000ce13 +80002738: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xfffffffe +8000273c: 0004a883 lw x17,0(x9) +80002740: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xfffffffe +80002744: 0004ad83 lw x27,0(x9) +80002748: 00448493 addi x9,x9,4 + +8000274c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + packh x6, x17, x27 # perform operation +8000274c: 09b8f333 packh x6,x17,x27 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002750: 0005a383 lw x7,0(x11) +80002754: 00638863 beq x7,x6,80002764 +80002758: 6010246f jal x8,80005558 +8000275c: 8000274c .word 0x8000274c +80002760: 8000ce73 .word 0x8000ce73 +80002764: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfffffffe +80002768: 0004a703 lw x14,0(x9) +8000276c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x5bbc8872 +80002770: 0004a803 lw x16,0(x9) +80002774: 00448493 addi x9,x9,4 + +80002778 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + packh x19, x14, x16 # perform operation +80002778: 090779b3 packh x19,x14,x16 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000277c: 0005a383 lw x7,0(x11) +80002780: 01338863 beq x7,x19,80002790 +80002784: 5d50246f jal x8,80005558 +80002788: 80002778 .word 0x80002778 +8000278c: 8000ced3 .word 0x8000ced3 +80002790: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffe +80002794: 0004a083 lw x1,0(x9) +80002798: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0xaaaaaaaa +8000279c: 0004a803 lw x16,0(x9) +800027a0: 00448493 addi x9,x9,4 + +800027a4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + packh x22, x1, x16 # perform operation +800027a4: 0900fb33 packh x22,x1,x16 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a8: 0005a383 lw x7,0(x11) +800027ac: 01638863 beq x7,x22,800027bc +800027b0: 5a90246f jal x8,80005558 +800027b4: 800027a4 .word 0x800027a4 +800027b8: 8000cf33 .word 0x8000cf33 +800027bc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffe +800027c0: 0004a903 lw x18,0(x9) +800027c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x55555555 +800027c8: 0004aa03 lw x20,0(x9) +800027cc: 00448493 addi x9,x9,4 + +800027d0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + packh x12, x18, x20 # perform operation +800027d0: 09497633 packh x12,x18,x20 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027d4: 0005a383 lw x7,0(x11) +800027d8: 00c38863 beq x7,x12,800027e8 +800027dc: 57d0246f jal x8,80005558 +800027e0: 800027d0 .word 0x800027d0 +800027e4: 8000cf93 .word 0x8000cf93 +800027e8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x5bbc8872 +800027ec: 0004a083 lw x1,0(x9) +800027f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x00000000 +800027f4: 0004ac03 lw x24,0(x9) +800027f8: 00448493 addi x9,x9,4 + +800027fc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + packh x26, x1, x24 # perform operation +800027fc: 0980fd33 packh x26,x1,x24 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +80002800: 0005a383 lw x7,0(x11) +80002804: 01a38863 beq x7,x26,80002814 +80002808: 5510246f jal x8,80005558 +8000280c: 800027fc .word 0x800027fc +80002810: 8000cff3 .word 0x8000cff3 +80002814: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x5bbc8872 +80002818: 0004a603 lw x12,0(x9) +8000281c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000001 +80002820: 0004a783 lw x15,0(x9) +80002824: 00448493 addi x9,x9,4 + +80002828 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + packh x21, x12, x15 # perform operation +80002828: 08f67ab3 packh x21,x12,x15 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000282c: 0005a383 lw x7,0(x11) +80002830: 01538863 beq x7,x21,80002840 +80002834: 5250246f jal x8,80005558 +80002838: 80002828 .word 0x80002828 +8000283c: 8000d04c .word 0x8000d04c +80002840: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x5bbc8872 +80002844: 0004a803 lw x16,0(x9) +80002848: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000002 +8000284c: 0004ae03 lw x28,0(x9) +80002850: 00448493 addi x9,x9,4 + +80002854 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + packh x26, x16, x28 # perform operation +80002854: 09c87d33 packh x26,x16,x28 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002858: 0005a383 lw x7,0(x11) +8000285c: 01a38863 beq x7,x26,8000286c +80002860: 4f90246f jal x8,80005558 +80002864: 80002854 .word 0x80002854 +80002868: 8000d0a5 .word 0x8000d0a5 +8000286c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x5bbc8872 +80002870: 0004a203 lw x4,0(x9) +80002874: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x80000000 +80002878: 0004af83 lw x31,0(x9) +8000287c: 00448493 addi x9,x9,4 + +80002880 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + packh x14, x4, x31 # perform operation +80002880: 09f27733 packh x14,x4,x31 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002884: 0005a383 lw x7,0(x11) +80002888: 00e38863 beq x7,x14,80002898 +8000288c: 4cd0246f jal x8,80005558 +80002890: 80002880 .word 0x80002880 +80002894: 8000d0fe .word 0x8000d0fe +80002898: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5bbc8872 +8000289c: 0004a303 lw x6,0(x9) +800028a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x80000001 +800028a4: 0004a983 lw x19,0(x9) +800028a8: 00448493 addi x9,x9,4 + +800028ac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + packh x17, x6, x19 # perform operation +800028ac: 093378b3 packh x17,x6,x19 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028b0: 0005a383 lw x7,0(x11) +800028b4: 01138863 beq x7,x17,800028c4 +800028b8: 4a10246f jal x8,80005558 +800028bc: 800028ac .word 0x800028ac +800028c0: 8000d15e .word 0x8000d15e +800028c4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x5bbc8872 +800028c8: 0004a083 lw x1,0(x9) +800028cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7fffffff +800028d0: 0004ae83 lw x29,0(x9) +800028d4: 00448493 addi x9,x9,4 + +800028d8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + packh x18, x1, x29 # perform operation +800028d8: 09d0f933 packh x18,x1,x29 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028dc: 0005a383 lw x7,0(x11) +800028e0: 01238863 beq x7,x18,800028f0 +800028e4: 4750246f jal x8,80005558 +800028e8: 800028d8 .word 0x800028d8 +800028ec: 8000d1be .word 0x8000d1be +800028f0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x5bbc8872 +800028f4: 0004af83 lw x31,0(x9) +800028f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7ffffffe +800028fc: 0004a903 lw x18,0(x9) +80002900: 00448493 addi x9,x9,4 + +80002904 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + packh x28, x31, x18 # perform operation +80002904: 092ffe33 packh x28,x31,x18 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002908: 0005a383 lw x7,0(x11) +8000290c: 01c38863 beq x7,x28,8000291c +80002910: 4490246f jal x8,80005558 +80002914: 80002904 .word 0x80002904 +80002918: 8000d21e .word 0x8000d21e +8000291c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x5bbc8872 +80002920: 0004ae83 lw x29,0(x9) +80002924: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xffffffff +80002928: 0004a783 lw x15,0(x9) +8000292c: 00448493 addi x9,x9,4 + +80002930 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + packh x18, x29, x15 # perform operation +80002930: 08fef933 packh x18,x29,x15 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002934: 0005a383 lw x7,0(x11) +80002938: 01238863 beq x7,x18,80002948 +8000293c: 41d0246f jal x8,80005558 +80002940: 80002930 .word 0x80002930 +80002944: 8000d27e .word 0x8000d27e +80002948: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5bbc8872 +8000294c: 0004a303 lw x6,0(x9) +80002950: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffe +80002954: 0004ac83 lw x25,0(x9) +80002958: 00448493 addi x9,x9,4 + +8000295c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + packh x29, x6, x25 # perform operation +8000295c: 09937eb3 packh x29,x6,x25 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002960: 0005a383 lw x7,0(x11) +80002964: 01d38863 beq x7,x29,80002974 +80002968: 3f10246f jal x8,80005558 +8000296c: 8000295c .word 0x8000295c +80002970: 8000d2de .word 0x8000d2de +80002974: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x5bbc8872 +80002978: 0004a183 lw x3,0(x9) +8000297c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x5bbc8872 +80002980: 0004ae03 lw x28,0(x9) +80002984: 00448493 addi x9,x9,4 + +80002988 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + packh x19, x3, x28 # perform operation +80002988: 09c1f9b3 packh x19,x3,x28 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000298c: 0005a383 lw x7,0(x11) +80002990: 01338863 beq x7,x19,800029a0 +80002994: 3c50246f jal x8,80005558 +80002998: 80002988 .word 0x80002988 +8000299c: 8000d33e .word 0x8000d33e +800029a0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x5bbc8872 +800029a4: 0004a903 lw x18,0(x9) +800029a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xaaaaaaaa +800029ac: 0004ac83 lw x25,0(x9) +800029b0: 00448493 addi x9,x9,4 + +800029b4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + packh x20, x18, x25 # perform operation +800029b4: 09997a33 packh x20,x18,x25 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b8: 0005a383 lw x7,0(x11) +800029bc: 01438863 beq x7,x20,800029cc +800029c0: 3990246f jal x8,80005558 +800029c4: 800029b4 .word 0x800029b4 +800029c8: 8000d39e .word 0x8000d39e +800029cc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x5bbc8872 +800029d0: 0004ab83 lw x23,0(x9) +800029d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x55555555 +800029d8: 0004ae83 lw x29,0(x9) +800029dc: 00448493 addi x9,x9,4 + +800029e0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + packh x13, x23, x29 # perform operation +800029e0: 09dbf6b3 packh x13,x23,x29 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029e4: 0005a383 lw x7,0(x11) +800029e8: 00d38863 beq x7,x13,800029f8 +800029ec: 36d0246f jal x8,80005558 +800029f0: 800029e0 .word 0x800029e0 +800029f4: 8000d3fe .word 0x8000d3fe +800029f8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xaaaaaaaa +800029fc: 0004a783 lw x15,0(x9) +80002a00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000000 +80002a04: 0004ae83 lw x29,0(x9) +80002a08: 00448493 addi x9,x9,4 + +80002a0c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + packh x24, x15, x29 # perform operation +80002a0c: 09d7fc33 packh x24,x15,x29 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a10: 0005a383 lw x7,0(x11) +80002a14: 01838863 beq x7,x24,80002a24 +80002a18: 3410246f jal x8,80005558 +80002a1c: 80002a0c .word 0x80002a0c +80002a20: 8000d45e .word 0x8000d45e +80002a24: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xaaaaaaaa +80002a28: 0004ac83 lw x25,0(x9) +80002a2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x00000001 +80002a30: 0004a183 lw x3,0(x9) +80002a34: 00448493 addi x9,x9,4 + +80002a38 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + packh x28, x25, x3 # perform operation +80002a38: 083cfe33 packh x28,x25,x3 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a3c: 0005a383 lw x7,0(x11) +80002a40: 01c38863 beq x7,x28,80002a50 +80002a44: 3150246f jal x8,80005558 +80002a48: 80002a38 .word 0x80002a38 +80002a4c: 8000d4b7 .word 0x8000d4b7 +80002a50: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xaaaaaaaa +80002a54: 0004a503 lw x10,0(x9) +80002a58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000002 +80002a5c: 0004a303 lw x6,0(x9) +80002a60: 00448493 addi x9,x9,4 + +80002a64 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + packh x26, x10, x6 # perform operation +80002a64: 08657d33 packh x26,x10,x6 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a68: 0005a383 lw x7,0(x11) +80002a6c: 01a38863 beq x7,x26,80002a7c +80002a70: 2e90246f jal x8,80005558 +80002a74: 80002a64 .word 0x80002a64 +80002a78: 8000d510 .word 0x8000d510 +80002a7c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xaaaaaaaa +80002a80: 0004a203 lw x4,0(x9) +80002a84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x80000000 +80002a88: 0004ae03 lw x28,0(x9) +80002a8c: 00448493 addi x9,x9,4 + +80002a90 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + packh x25, x4, x28 # perform operation +80002a90: 09c27cb3 packh x25,x4,x28 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a94: 0005a383 lw x7,0(x11) +80002a98: 01938863 beq x7,x25,80002aa8 +80002a9c: 2bd0246f jal x8,80005558 +80002aa0: 80002a90 .word 0x80002a90 +80002aa4: 8000d569 .word 0x8000d569 +80002aa8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xaaaaaaaa +80002aac: 0004a183 lw x3,0(x9) +80002ab0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x80000001 +80002ab4: 0004ab83 lw x23,0(x9) +80002ab8: 00448493 addi x9,x9,4 + +80002abc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + packh x16, x3, x23 # perform operation +80002abc: 0971f833 packh x16,x3,x23 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ac0: 0005a383 lw x7,0(x11) +80002ac4: 01038863 beq x7,x16,80002ad4 +80002ac8: 2910246f jal x8,80005558 +80002acc: 80002abc .word 0x80002abc +80002ad0: 8000d5c9 .word 0x8000d5c9 +80002ad4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xaaaaaaaa +80002ad8: 0004a083 lw x1,0(x9) +80002adc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffff +80002ae0: 0004aa03 lw x20,0(x9) +80002ae4: 00448493 addi x9,x9,4 + +80002ae8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + packh x27, x1, x20 # perform operation +80002ae8: 0940fdb3 packh x27,x1,x20 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002aec: 0005a383 lw x7,0(x11) +80002af0: 01b38863 beq x7,x27,80002b00 +80002af4: 2650246f jal x8,80005558 +80002af8: 80002ae8 .word 0x80002ae8 +80002afc: 8000d629 .word 0x8000d629 +80002b00: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xaaaaaaaa +80002b04: 0004a983 lw x19,0(x9) +80002b08: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7ffffffe +80002b0c: 0004a183 lw x3,0(x9) +80002b10: 00448493 addi x9,x9,4 + +80002b14 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + packh x25, x19, x3 # perform operation +80002b14: 0839fcb3 packh x25,x19,x3 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b18: 0005a383 lw x7,0(x11) +80002b1c: 01938863 beq x7,x25,80002b2c +80002b20: 2390246f jal x8,80005558 +80002b24: 80002b14 .word 0x80002b14 +80002b28: 8000d689 .word 0x8000d689 +80002b2c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xaaaaaaaa +80002b30: 0004a103 lw x2,0(x9) +80002b34: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xffffffff +80002b38: 0004a983 lw x19,0(x9) +80002b3c: 00448493 addi x9,x9,4 + +80002b40 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + packh x18, x2, x19 # perform operation +80002b40: 09317933 packh x18,x2,x19 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b44: 0005a383 lw x7,0(x11) +80002b48: 01238863 beq x7,x18,80002b58 +80002b4c: 20d0246f jal x8,80005558 +80002b50: 80002b40 .word 0x80002b40 +80002b54: 8000d6e9 .word 0x8000d6e9 +80002b58: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xaaaaaaaa +80002b5c: 0004a883 lw x17,0(x9) +80002b60: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xfffffffe +80002b64: 0004af83 lw x31,0(x9) +80002b68: 00448493 addi x9,x9,4 + +80002b6c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + packh x15, x17, x31 # perform operation +80002b6c: 09f8f7b3 packh x15,x17,x31 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b70: 0005a383 lw x7,0(x11) +80002b74: 00f38863 beq x7,x15,80002b84 +80002b78: 1e10246f jal x8,80005558 +80002b7c: 80002b6c .word 0x80002b6c +80002b80: 8000d749 .word 0x8000d749 +80002b84: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaa +80002b88: 0004aa83 lw x21,0(x9) +80002b8c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5bbc8872 +80002b90: 0004a183 lw x3,0(x9) +80002b94: 00448493 addi x9,x9,4 + +80002b98 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + packh x25, x21, x3 # perform operation +80002b98: 083afcb3 packh x25,x21,x3 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b9c: 0005a383 lw x7,0(x11) +80002ba0: 01938863 beq x7,x25,80002bb0 +80002ba4: 1b50246f jal x8,80005558 +80002ba8: 80002b98 .word 0x80002b98 +80002bac: 8000d7a9 .word 0x8000d7a9 +80002bb0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xaaaaaaaa +80002bb4: 0004aa03 lw x20,0(x9) +80002bb8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xaaaaaaaa +80002bbc: 0004a103 lw x2,0(x9) +80002bc0: 00448493 addi x9,x9,4 + +80002bc4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + packh x13, x20, x2 # perform operation +80002bc4: 082a76b3 packh x13,x20,x2 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc8: 0005a383 lw x7,0(x11) +80002bcc: 00d38863 beq x7,x13,80002bdc +80002bd0: 1890246f jal x8,80005558 +80002bd4: 80002bc4 .word 0x80002bc4 +80002bd8: 8000d809 .word 0x8000d809 +80002bdc: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xaaaaaaaa +80002be0: 0004a283 lw x5,0(x9) +80002be4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x55555555 +80002be8: 0004a703 lw x14,0(x9) +80002bec: 00448493 addi x9,x9,4 + +80002bf0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + packh x29, x5, x14 # perform operation +80002bf0: 08e2feb3 packh x29,x5,x14 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bf4: 0005a383 lw x7,0(x11) +80002bf8: 01d38863 beq x7,x29,80002c08 +80002bfc: 15d0246f jal x8,80005558 +80002c00: 80002bf0 .word 0x80002bf0 +80002c04: 8000d869 .word 0x8000d869 +80002c08: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x55555555 +80002c0c: 0004a803 lw x16,0(x9) +80002c10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000 +80002c14: 0004ae03 lw x28,0(x9) +80002c18: 00448493 addi x9,x9,4 + +80002c1c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + packh x19, x16, x28 # perform operation +80002c1c: 09c879b3 packh x19,x16,x28 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c20: 0005a383 lw x7,0(x11) +80002c24: 01338863 beq x7,x19,80002c34 +80002c28: 1310246f jal x8,80005558 +80002c2c: 80002c1c .word 0x80002c1c +80002c30: 8000d8c9 .word 0x8000d8c9 +80002c34: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x55555555 +80002c38: 0004a103 lw x2,0(x9) +80002c3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000001 +80002c40: 0004ad83 lw x27,0(x9) +80002c44: 00448493 addi x9,x9,4 + +80002c48 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + packh x10, x2, x27 # perform operation +80002c48: 09b17533 packh x10,x2,x27 + # Check if x10 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c4c: 0005a383 lw x7,0(x11) +80002c50: 00a38863 beq x7,x10,80002c60 +80002c54: 1050246f jal x8,80005558 +80002c58: 80002c48 .word 0x80002c48 +80002c5c: 8000d922 .word 0x8000d922 +80002c60: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x55555555 +80002c64: 0004af83 lw x31,0(x9) +80002c68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000002 +80002c6c: 0004ae83 lw x29,0(x9) +80002c70: 00448493 addi x9,x9,4 + +80002c74 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + packh x6, x31, x29 # perform operation +80002c74: 09dff333 packh x6,x31,x29 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c78: 0005a383 lw x7,0(x11) +80002c7c: 00638863 beq x7,x6,80002c8c +80002c80: 0d90246f jal x8,80005558 +80002c84: 80002c74 .word 0x80002c74 +80002c88: 8000d97b .word 0x8000d97b +80002c8c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x55555555 +80002c90: 0004a983 lw x19,0(x9) +80002c94: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +80002c98: 0004ab03 lw x22,0(x9) +80002c9c: 00448493 addi x9,x9,4 + +80002ca0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + packh x14, x19, x22 # perform operation +80002ca0: 0969f733 packh x14,x19,x22 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002ca4: 0005a383 lw x7,0(x11) +80002ca8: 00e38863 beq x7,x14,80002cb8 +80002cac: 0ad0246f jal x8,80005558 +80002cb0: 80002ca0 .word 0x80002ca0 +80002cb4: 8000d9d4 .word 0x8000d9d4 +80002cb8: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x55555555 +80002cbc: 0004a603 lw x12,0(x9) +80002cc0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x80000001 +80002cc4: 0004a083 lw x1,0(x9) +80002cc8: 00448493 addi x9,x9,4 + +80002ccc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + packh x17, x12, x1 # perform operation +80002ccc: 081678b3 packh x17,x12,x1 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cd0: 0005a383 lw x7,0(x11) +80002cd4: 01138863 beq x7,x17,80002ce4 +80002cd8: 0810246f jal x8,80005558 +80002cdc: 80002ccc .word 0x80002ccc +80002ce0: 8000da34 .word 0x8000da34 +80002ce4: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x55555555 +80002ce8: 0004a803 lw x16,0(x9) +80002cec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffff +80002cf0: 0004a183 lw x3,0(x9) +80002cf4: 00448493 addi x9,x9,4 + +80002cf8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + packh x12, x16, x3 # perform operation +80002cf8: 08387633 packh x12,x16,x3 + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cfc: 0005a383 lw x7,0(x11) +80002d00: 00c38863 beq x7,x12,80002d10 +80002d04: 0550246f jal x8,80005558 +80002d08: 80002cf8 .word 0x80002cf8 +80002d0c: 8000da94 .word 0x8000da94 +80002d10: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x55555555 +80002d14: 0004a603 lw x12,0(x9) +80002d18: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffe +80002d1c: 0004a783 lw x15,0(x9) +80002d20: 00448493 addi x9,x9,4 + +80002d24 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + packh x16, x12, x15 # perform operation +80002d24: 08f67833 packh x16,x12,x15 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d28: 0005a383 lw x7,0(x11) +80002d2c: 01038863 beq x7,x16,80002d3c +80002d30: 0290246f jal x8,80005558 +80002d34: 80002d24 .word 0x80002d24 +80002d38: 8000daf4 .word 0x8000daf4 +80002d3c: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x55555555 +80002d40: 0004a683 lw x13,0(x9) +80002d44: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xffffffff +80002d48: 0004a183 lw x3,0(x9) +80002d4c: 00448493 addi x9,x9,4 + +80002d50 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + packh x22, x13, x3 # perform operation +80002d50: 0836fb33 packh x22,x13,x3 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d54: 0005a383 lw x7,0(x11) +80002d58: 01638863 beq x7,x22,80002d68 +80002d5c: 7fc0246f jal x8,80005558 +80002d60: 80002d50 .word 0x80002d50 +80002d64: 8000db54 .word 0x8000db54 +80002d68: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x55555555 +80002d6c: 0004ab83 lw x23,0(x9) +80002d70: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfffffffe +80002d74: 0004ad03 lw x26,0(x9) +80002d78: 00448493 addi x9,x9,4 + +80002d7c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + packh x27, x23, x26 # perform operation +80002d7c: 09abfdb3 packh x27,x23,x26 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d80: 0005a383 lw x7,0(x11) +80002d84: 01b38863 beq x7,x27,80002d94 +80002d88: 7d00246f jal x8,80005558 +80002d8c: 80002d7c .word 0x80002d7c +80002d90: 8000dbb4 .word 0x8000dbb4 +80002d94: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x55555555 +80002d98: 0004a783 lw x15,0(x9) +80002d9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc8872 +80002da0: 0004a703 lw x14,0(x9) +80002da4: 00448493 addi x9,x9,4 + +80002da8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + packh x27, x15, x14 # perform operation +80002da8: 08e7fdb3 packh x27,x15,x14 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002dac: 0005a383 lw x7,0(x11) +80002db0: 01b38863 beq x7,x27,80002dc0 +80002db4: 7a40246f jal x8,80005558 +80002db8: 80002da8 .word 0x80002da8 +80002dbc: 8000dc14 .word 0x8000dc14 +80002dc0: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x55555555 +80002dc4: 0004ac83 lw x25,0(x9) +80002dc8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaa +80002dcc: 0004aa03 lw x20,0(x9) +80002dd0: 00448493 addi x9,x9,4 + +80002dd4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + packh x10, x25, x20 # perform operation +80002dd4: 094cf533 packh x10,x25,x20 + # Check if x10 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd8: 0005a383 lw x7,0(x11) +80002ddc: 00a38863 beq x7,x10,80002dec +80002de0: 7780246f jal x8,80005558 +80002de4: 80002dd4 .word 0x80002dd4 +80002de8: 8000dc74 .word 0x8000dc74 +80002dec: 00458593 addi x11,x11,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x55555555 +80002df0: 0004ad83 lw x27,0(x9) +80002df4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x55555555 +80002df8: 0004ac83 lw x25,0(x9) +80002dfc: 00448493 addi x9,x9,4 + +80002e00 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + packh x21, x27, x25 # perform operation +80002e00: 099dfab3 packh x21,x27,x25 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002e04: 0005a383 lw x7,0(x11) +80002e08: 01538863 beq x7,x21,80002e18 +80002e0c: 74c0246f jal x8,80005558 +80002e10: 80002e00 .word 0x80002e00 +80002e14: 8000dcd4 .word 0x8000dcd4 +80002e18: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x2317f271 +80002e1c: 0004a003 lw x0,0(x9) +80002e20: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xc59e9cf9 +80002e24: 0004a003 lw x0,0(x9) +80002e28: 00448493 addi x9,x9,4 + +80002e2c : +Zbkb_packh_cg_cmp_rs1_rs2_b0: + packh x29, x0, x0 # perform operation +80002e2c: 08007eb3 packh x29,x0,x0 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkb_packh_cg_cmp_rs1_rs2_b0, Zbkb_packh_cg_cmp_rs1_rs2_b0_str) +80002e30: 0005a383 lw x7,0(x11) +80002e34: 01d38863 beq x7,x29,80002e44 +80002e38: 7200246f jal x8,80005558 +80002e3c: 80002e2c .word 0x80002e2c +80002e40: 8000dd34 .word 0x8000dd34 +80002e44: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x30fe2817 +80002e48: 0004a083 lw x1,0(x9) +80002e4c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x72d4f147 +80002e50: 0004a083 lw x1,0(x9) +80002e54: 00448493 addi x9,x9,4 + +80002e58 : +Zbkb_packh_cg_cmp_rs1_rs2_b1: + packh x13, x1, x1 # perform operation +80002e58: 0810f6b3 packh x13,x1,x1 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkb_packh_cg_cmp_rs1_rs2_b1, Zbkb_packh_cg_cmp_rs1_rs2_b1_str) +80002e5c: 0005a383 lw x7,0(x11) +80002e60: 00d38863 beq x7,x13,80002e70 +80002e64: 6f40246f jal x8,80005558 +80002e68: 80002e58 .word 0x80002e58 +80002e6c: 8000dd6d .word 0x8000dd6d +80002e70: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x39b36bb0 +80002e74: 0004a103 lw x2,0(x9) +80002e78: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x585a8cc5 +80002e7c: 0004a103 lw x2,0(x9) +80002e80: 00448493 addi x9,x9,4 + +80002e84 : +Zbkb_packh_cg_cmp_rs1_rs2_b2: + packh x23, x2, x2 # perform operation +80002e84: 08217bb3 packh x23,x2,x2 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkb_packh_cg_cmp_rs1_rs2_b2, Zbkb_packh_cg_cmp_rs1_rs2_b2_str) +80002e88: 0005a383 lw x7,0(x11) +80002e8c: 01738863 beq x7,x23,80002e9c +80002e90: 6c80246f jal x8,80005558 +80002e94: 80002e84 .word 0x80002e84 +80002e98: 8000dda6 .word 0x8000dda6 +80002e9c: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x25b59fef +80002ea0: 0004a183 lw x3,0(x9) +80002ea4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x72c63845 +80002ea8: 0004a183 lw x3,0(x9) +80002eac: 00448493 addi x9,x9,4 + +80002eb0 : +Zbkb_packh_cg_cmp_rs1_rs2_b3: + packh x6, x3, x3 # perform operation +80002eb0: 0831f333 packh x6,x3,x3 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkb_packh_cg_cmp_rs1_rs2_b3, Zbkb_packh_cg_cmp_rs1_rs2_b3_str) +80002eb4: 0005a383 lw x7,0(x11) +80002eb8: 00638863 beq x7,x6,80002ec8 +80002ebc: 69c0246f jal x8,80005558 +80002ec0: 80002eb0 .word 0x80002eb0 +80002ec4: 8000dddf .word 0x8000dddf +80002ec8: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x906d3010 +80002ecc: 0004a203 lw x4,0(x9) +80002ed0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x03753754 +80002ed4: 0004a203 lw x4,0(x9) +80002ed8: 00448493 addi x9,x9,4 + +80002edc : +Zbkb_packh_cg_cmp_rs1_rs2_b4: + packh x27, x4, x4 # perform operation +80002edc: 08427db3 packh x27,x4,x4 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkb_packh_cg_cmp_rs1_rs2_b4, Zbkb_packh_cg_cmp_rs1_rs2_b4_str) +80002ee0: 0005a383 lw x7,0(x11) +80002ee4: 01b38863 beq x7,x27,80002ef4 +80002ee8: 6700246f jal x8,80005558 +80002eec: 80002edc .word 0x80002edc +80002ef0: 8000de18 .word 0x8000de18 +80002ef4: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x8956573c +80002ef8: 0004a283 lw x5,0(x9) +80002efc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xd85811d8 +80002f00: 0004a283 lw x5,0(x9) +80002f04: 00448493 addi x9,x9,4 + +80002f08 : +Zbkb_packh_cg_cmp_rs1_rs2_b5: + packh x3, x5, x5 # perform operation +80002f08: 0852f1b3 packh x3,x5,x5 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cmp_rs1_rs2_b5, Zbkb_packh_cg_cmp_rs1_rs2_b5_str) +80002f0c: 0005a383 lw x7,0(x11) +80002f10: 00338863 beq x7,x3,80002f20 +80002f14: 6440246f jal x8,80005558 +80002f18: 80002f08 .word 0x80002f08 +80002f1c: 8000de51 .word 0x8000de51 +80002f20: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xef963fea +80002f24: 0004a303 lw x6,0(x9) +80002f28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xe947f90f +80002f2c: 0004a303 lw x6,0(x9) +80002f30: 00448493 addi x9,x9,4 + +80002f34 : +Zbkb_packh_cg_cmp_rs1_rs2_b6: + packh x3, x6, x6 # perform operation +80002f34: 086371b3 packh x3,x6,x6 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkb_packh_cg_cmp_rs1_rs2_b6, Zbkb_packh_cg_cmp_rs1_rs2_b6_str) +80002f38: 0005a383 lw x7,0(x11) +80002f3c: 00338863 beq x7,x3,80002f4c +80002f40: 6180246f jal x8,80005558 +80002f44: 80002f34 .word 0x80002f34 +80002f48: 8000de8a .word 0x8000de8a +80002f4c: 00458593 addi x11,x11,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f50: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f54: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x05b0391d +80002f58: 0004a383 lw x7,0(x9) +80002f5c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x8165c4b0 +80002f60: 0004a383 lw x7,0(x9) +80002f64: 00448493 addi x9,x9,4 + +80002f68 : +Zbkb_packh_cg_cmp_rs1_rs2_b7: + packh x10, x7, x7 # perform operation +80002f68: 0873f533 packh x10,x7,x7 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_packh_cg_cmp_rs1_rs2_b7, Zbkb_packh_cg_cmp_rs1_rs2_b7_str) +80002f6c: 0005a203 lw x4,0(x11) +80002f70: 00a20863 beq x4,x10,80002f80 +80002f74: 5cc022ef jal x5,80005540 +80002f78: 80002f68 .word 0x80002f68 +80002f7c: 8000dec3 .word 0x8000dec3 +80002f80: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xad747a23 +80002f84: 0004a403 lw x8,0(x9) +80002f88: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xa966bb93 +80002f8c: 0004a403 lw x8,0(x9) +80002f90: 00448493 addi x9,x9,4 + +80002f94 : +Zbkb_packh_cg_cmp_rs1_rs2_b8: + packh x25, x8, x8 # perform operation +80002f94: 08847cb3 packh x25,x8,x8 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_packh_cg_cmp_rs1_rs2_b8, Zbkb_packh_cg_cmp_rs1_rs2_b8_str) +80002f98: 0005a203 lw x4,0(x11) +80002f9c: 01920863 beq x4,x25,80002fac +80002fa0: 5a0022ef jal x5,80005540 +80002fa4: 80002f94 .word 0x80002f94 +80002fa8: 8000defc .word 0x8000defc +80002fac: 00458593 addi x11,x11,4 + + mv x17, x9 # switch data pointer register to avoid conflict with test +80002fb0: 00048893 addi x17,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xd996c0e1 +80002fb4: 0008a483 lw x9,0(x17) +80002fb8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x28ef2182 +80002fbc: 0008a483 lw x9,0(x17) +80002fc0: 00488893 addi x17,x17,4 + +80002fc4 : +Zbkb_packh_cg_cmp_rs1_rs2_b9: + packh x2, x9, x9 # perform operation +80002fc4: 0894f133 packh x2,x9,x9 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_packh_cg_cmp_rs1_rs2_b9, Zbkb_packh_cg_cmp_rs1_rs2_b9_str) +80002fc8: 0005a203 lw x4,0(x11) +80002fcc: 00220863 beq x4,x2,80002fdc +80002fd0: 570022ef jal x5,80005540 +80002fd4: 80002fc4 .word 0x80002fc4 +80002fd8: 8000df35 .word 0x8000df35 +80002fdc: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x42876732 +80002fe0: 0008a503 lw x10,0(x17) +80002fe4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x7e07dedd +80002fe8: 0008a503 lw x10,0(x17) +80002fec: 00488893 addi x17,x17,4 + +80002ff0 : +Zbkb_packh_cg_cmp_rs1_rs2_b10: + packh x28, x10, x10 # perform operation +80002ff0: 08a57e33 packh x28,x10,x10 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b10, Zbkb_packh_cg_cmp_rs1_rs2_b10_str) +80002ff4: 0005a203 lw x4,0(x11) +80002ff8: 01c20863 beq x4,x28,80003008 +80002ffc: 544022ef jal x5,80005540 +80003000: 80002ff0 .word 0x80002ff0 +80003004: 8000df6e .word 0x8000df6e +80003008: 00458593 addi x11,x11,4 + + mv x3, x11 # switch signature pointer register to avoid conflict with test +8000300c: 00058193 addi x3,x11,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x19614b17 +80003010: 0008a583 lw x11,0(x17) +80003014: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7d50d145 +80003018: 0008a583 lw x11,0(x17) +8000301c: 00488893 addi x17,x17,4 + +80003020 : +Zbkb_packh_cg_cmp_rs1_rs2_b11: + packh x9, x11, x11 # perform operation +80003020: 08b5f4b3 packh x9,x11,x11 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkb_packh_cg_cmp_rs1_rs2_b11, Zbkb_packh_cg_cmp_rs1_rs2_b11_str) +80003024: 0001a203 lw x4,0(x3) +80003028: 00920863 beq x4,x9,80003038 +8000302c: 514022ef jal x5,80005540 +80003030: 80003020 .word 0x80003020 +80003034: 8000dfa8 .word 0x8000dfa8 +80003038: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x1b71d5f9 +8000303c: 0008a603 lw x12,0(x17) +80003040: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0xc3719c80 +80003044: 0008a603 lw x12,0(x17) +80003048: 00488893 addi x17,x17,4 + +8000304c : +Zbkb_packh_cg_cmp_rs1_rs2_b12: + packh x16, x12, x12 # perform operation +8000304c: 08c67833 packh x16,x12,x12 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkb_packh_cg_cmp_rs1_rs2_b12, Zbkb_packh_cg_cmp_rs1_rs2_b12_str) +80003050: 0001a203 lw x4,0(x3) +80003054: 01020863 beq x4,x16,80003064 +80003058: 4e8022ef jal x5,80005540 +8000305c: 8000304c .word 0x8000304c +80003060: 8000dfe2 .word 0x8000dfe2 +80003064: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x912980f5 +80003068: 0008a683 lw x13,0(x17) +8000306c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xcea67802 +80003070: 0008a683 lw x13,0(x17) +80003074: 00488893 addi x17,x17,4 + +80003078 : +Zbkb_packh_cg_cmp_rs1_rs2_b13: + packh x18, x13, x13 # perform operation +80003078: 08d6f933 packh x18,x13,x13 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkb_packh_cg_cmp_rs1_rs2_b13, Zbkb_packh_cg_cmp_rs1_rs2_b13_str) +8000307c: 0001a203 lw x4,0(x3) +80003080: 01220863 beq x4,x18,80003090 +80003084: 4bc022ef jal x5,80005540 +80003088: 80003078 .word 0x80003078 +8000308c: 8000e01c .word 0x8000e01c +80003090: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xac9f8b6b +80003094: 0008a703 lw x14,0(x17) +80003098: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x621b56a9 +8000309c: 0008a703 lw x14,0(x17) +800030a0: 00488893 addi x17,x17,4 + +800030a4 : +Zbkb_packh_cg_cmp_rs1_rs2_b14: + packh x1, x14, x14 # perform operation +800030a4: 08e770b3 packh x1,x14,x14 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_packh_cg_cmp_rs1_rs2_b14, Zbkb_packh_cg_cmp_rs1_rs2_b14_str) +800030a8: 0001a203 lw x4,0(x3) +800030ac: 00120863 beq x4,x1,800030bc +800030b0: 490022ef jal x5,80005540 +800030b4: 800030a4 .word 0x800030a4 +800030b8: 8000e056 .word 0x8000e056 +800030bc: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xe0e11cdf +800030c0: 0008a783 lw x15,0(x17) +800030c4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x30fdd2b5 +800030c8: 0008a783 lw x15,0(x17) +800030cc: 00488893 addi x17,x17,4 + +800030d0 : +Zbkb_packh_cg_cmp_rs1_rs2_b15: + packh x20, x15, x15 # perform operation +800030d0: 08f7fa33 packh x20,x15,x15 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkb_packh_cg_cmp_rs1_rs2_b15, Zbkb_packh_cg_cmp_rs1_rs2_b15_str) +800030d4: 0001a203 lw x4,0(x3) +800030d8: 01420863 beq x4,x20,800030e8 +800030dc: 464022ef jal x5,80005540 +800030e0: 800030d0 .word 0x800030d0 +800030e4: 8000e090 .word 0x8000e090 +800030e8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x535f6539 +800030ec: 0008a803 lw x16,0(x17) +800030f0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xb8e143b7 +800030f4: 0008a803 lw x16,0(x17) +800030f8: 00488893 addi x17,x17,4 + +800030fc : +Zbkb_packh_cg_cmp_rs1_rs2_b16: + packh x8, x16, x16 # perform operation +800030fc: 09087433 packh x8,x16,x16 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkb_packh_cg_cmp_rs1_rs2_b16, Zbkb_packh_cg_cmp_rs1_rs2_b16_str) +80003100: 0001a203 lw x4,0(x3) +80003104: 00820863 beq x4,x8,80003114 +80003108: 438022ef jal x5,80005540 +8000310c: 800030fc .word 0x800030fc +80003110: 8000e0ca .word 0x8000e0ca +80003114: 00418193 addi x3,x3,4 + + mv x22, x17 # switch data pointer register to avoid conflict with test +80003118: 00088b13 addi x22,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x96298903 +8000311c: 000b2883 lw x17,0(x22) +80003120: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x76e2fac3 +80003124: 000b2883 lw x17,0(x22) +80003128: 004b0b13 addi x22,x22,4 + +8000312c : +Zbkb_packh_cg_cmp_rs1_rs2_b17: + packh x2, x17, x17 # perform operation +8000312c: 0918f133 packh x2,x17,x17 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_packh_cg_cmp_rs1_rs2_b17, Zbkb_packh_cg_cmp_rs1_rs2_b17_str) +80003130: 0001a203 lw x4,0(x3) +80003134: 00220863 beq x4,x2,80003144 +80003138: 408022ef jal x5,80005540 +8000313c: 8000312c .word 0x8000312c +80003140: 8000e104 .word 0x8000e104 +80003144: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x1cfd4e41 +80003148: 000b2903 lw x18,0(x22) +8000314c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xcd74c83f +80003150: 000b2903 lw x18,0(x22) +80003154: 004b0b13 addi x22,x22,4 + +80003158 : +Zbkb_packh_cg_cmp_rs1_rs2_b18: + packh x28, x18, x18 # perform operation +80003158: 09297e33 packh x28,x18,x18 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b18, Zbkb_packh_cg_cmp_rs1_rs2_b18_str) +8000315c: 0001a203 lw x4,0(x3) +80003160: 01c20863 beq x4,x28,80003170 +80003164: 3dc022ef jal x5,80005540 +80003168: 80003158 .word 0x80003158 +8000316c: 8000e13e .word 0x8000e13e +80003170: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x4c1db4f5 +80003174: 000b2983 lw x19,0(x22) +80003178: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x8b67ee41 +8000317c: 000b2983 lw x19,0(x22) +80003180: 004b0b13 addi x22,x22,4 + +80003184 : +Zbkb_packh_cg_cmp_rs1_rs2_b19: + packh x24, x19, x19 # perform operation +80003184: 0939fc33 packh x24,x19,x19 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkb_packh_cg_cmp_rs1_rs2_b19, Zbkb_packh_cg_cmp_rs1_rs2_b19_str) +80003188: 0001a203 lw x4,0(x3) +8000318c: 01820863 beq x4,x24,8000319c +80003190: 3b0022ef jal x5,80005540 +80003194: 80003184 .word 0x80003184 +80003198: 8000e178 .word 0x8000e178 +8000319c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xdfe0eccb +800031a0: 000b2a03 lw x20,0(x22) +800031a4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x2f317016 +800031a8: 000b2a03 lw x20,0(x22) +800031ac: 004b0b13 addi x22,x22,4 + +800031b0 : +Zbkb_packh_cg_cmp_rs1_rs2_b20: + packh x13, x20, x20 # perform operation +800031b0: 094a76b3 packh x13,x20,x20 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkb_packh_cg_cmp_rs1_rs2_b20, Zbkb_packh_cg_cmp_rs1_rs2_b20_str) +800031b4: 0001a203 lw x4,0(x3) +800031b8: 00d20863 beq x4,x13,800031c8 +800031bc: 384022ef jal x5,80005540 +800031c0: 800031b0 .word 0x800031b0 +800031c4: 8000e1b2 .word 0x8000e1b2 +800031c8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x2021f986 +800031cc: 000b2a83 lw x21,0(x22) +800031d0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xfee5bfc9 +800031d4: 000b2a83 lw x21,0(x22) +800031d8: 004b0b13 addi x22,x22,4 + +800031dc : +Zbkb_packh_cg_cmp_rs1_rs2_b21: + packh x17, x21, x21 # perform operation +800031dc: 095af8b3 packh x17,x21,x21 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkb_packh_cg_cmp_rs1_rs2_b21, Zbkb_packh_cg_cmp_rs1_rs2_b21_str) +800031e0: 0001a203 lw x4,0(x3) +800031e4: 01120863 beq x4,x17,800031f4 +800031e8: 358022ef jal x5,80005540 +800031ec: 800031dc .word 0x800031dc +800031f0: 8000e1ec .word 0x8000e1ec +800031f4: 00418193 addi x3,x3,4 + + mv x24, x22 # switch data pointer register to avoid conflict with test +800031f8: 000b0c13 addi x24,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x4e7af783 +800031fc: 000c2b03 lw x22,0(x24) +80003200: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x14a1a5a6 +80003204: 000c2b03 lw x22,0(x24) +80003208: 004c0c13 addi x24,x24,4 + +8000320c : +Zbkb_packh_cg_cmp_rs1_rs2_b22: + packh x17, x22, x22 # perform operation +8000320c: 096b78b3 packh x17,x22,x22 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkb_packh_cg_cmp_rs1_rs2_b22, Zbkb_packh_cg_cmp_rs1_rs2_b22_str) +80003210: 0001a203 lw x4,0(x3) +80003214: 01120863 beq x4,x17,80003224 +80003218: 328022ef jal x5,80005540 +8000321c: 8000320c .word 0x8000320c +80003220: 8000e226 .word 0x8000e226 +80003224: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xa40abb5a +80003228: 000c2b83 lw x23,0(x24) +8000322c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x5b0a3672 +80003230: 000c2b83 lw x23,0(x24) +80003234: 004c0c13 addi x24,x24,4 + +80003238 : +Zbkb_packh_cg_cmp_rs1_rs2_b23: + packh x8, x23, x23 # perform operation +80003238: 097bf433 packh x8,x23,x23 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkb_packh_cg_cmp_rs1_rs2_b23, Zbkb_packh_cg_cmp_rs1_rs2_b23_str) +8000323c: 0001a203 lw x4,0(x3) +80003240: 00820863 beq x4,x8,80003250 +80003244: 2fc022ef jal x5,80005540 +80003248: 80003238 .word 0x80003238 +8000324c: 8000e260 .word 0x8000e260 +80003250: 00418193 addi x3,x3,4 + + mv x31, x24 # switch data pointer register to avoid conflict with test +80003254: 000c0f93 addi x31,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x1e5bb5ca +80003258: 000fac03 lw x24,0(x31) +8000325c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x159333c6 +80003260: 000fac03 lw x24,0(x31) +80003264: 004f8f93 addi x31,x31,4 + +80003268 : +Zbkb_packh_cg_cmp_rs1_rs2_b24: + packh x17, x24, x24 # perform operation +80003268: 098c78b3 packh x17,x24,x24 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkb_packh_cg_cmp_rs1_rs2_b24, Zbkb_packh_cg_cmp_rs1_rs2_b24_str) +8000326c: 0001a203 lw x4,0(x3) +80003270: 01120863 beq x4,x17,80003280 +80003274: 2cc022ef jal x5,80005540 +80003278: 80003268 .word 0x80003268 +8000327c: 8000e29a .word 0x8000e29a +80003280: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xa5d6e8b5 +80003284: 000fac83 lw x25,0(x31) +80003288: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xe497eade +8000328c: 000fac83 lw x25,0(x31) +80003290: 004f8f93 addi x31,x31,4 + +80003294 : +Zbkb_packh_cg_cmp_rs1_rs2_b25: + packh x27, x25, x25 # perform operation +80003294: 099cfdb3 packh x27,x25,x25 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkb_packh_cg_cmp_rs1_rs2_b25, Zbkb_packh_cg_cmp_rs1_rs2_b25_str) +80003298: 0001a203 lw x4,0(x3) +8000329c: 01b20863 beq x4,x27,800032ac +800032a0: 2a0022ef jal x5,80005540 +800032a4: 80003294 .word 0x80003294 +800032a8: 8000e2d4 .word 0x8000e2d4 +800032ac: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0xc537ca3e +800032b0: 000fad03 lw x26,0(x31) +800032b4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x7f645bcf +800032b8: 000fad03 lw x26,0(x31) +800032bc: 004f8f93 addi x31,x31,4 + +800032c0 : +Zbkb_packh_cg_cmp_rs1_rs2_b26: + packh x23, x26, x26 # perform operation +800032c0: 09ad7bb3 packh x23,x26,x26 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkb_packh_cg_cmp_rs1_rs2_b26, Zbkb_packh_cg_cmp_rs1_rs2_b26_str) +800032c4: 0001a203 lw x4,0(x3) +800032c8: 01720863 beq x4,x23,800032d8 +800032cc: 274022ef jal x5,80005540 +800032d0: 800032c0 .word 0x800032c0 +800032d4: 8000e30e .word 0x8000e30e +800032d8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x2793e69a +800032dc: 000fad83 lw x27,0(x31) +800032e0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x8c1d99cc +800032e4: 000fad83 lw x27,0(x31) +800032e8: 004f8f93 addi x31,x31,4 + +800032ec : +Zbkb_packh_cg_cmp_rs1_rs2_b27: + packh x6, x27, x27 # perform operation +800032ec: 09bdf333 packh x6,x27,x27 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zbkb_packh_cg_cmp_rs1_rs2_b27, Zbkb_packh_cg_cmp_rs1_rs2_b27_str) +800032f0: 0001a203 lw x4,0(x3) +800032f4: 00620863 beq x4,x6,80003304 +800032f8: 248022ef jal x5,80005540 +800032fc: 800032ec .word 0x800032ec +80003300: 8000e348 .word 0x8000e348 +80003304: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xac872b32 +80003308: 000fae03 lw x28,0(x31) +8000330c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x3a3e6828 +80003310: 000fae03 lw x28,0(x31) +80003314: 004f8f93 addi x31,x31,4 + +80003318 : +Zbkb_packh_cg_cmp_rs1_rs2_b28: + packh x25, x28, x28 # perform operation +80003318: 09ce7cb3 packh x25,x28,x28 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_packh_cg_cmp_rs1_rs2_b28, Zbkb_packh_cg_cmp_rs1_rs2_b28_str) +8000331c: 0001a203 lw x4,0(x3) +80003320: 01920863 beq x4,x25,80003330 +80003324: 21c022ef jal x5,80005540 +80003328: 80003318 .word 0x80003318 +8000332c: 8000e382 .word 0x8000e382 +80003330: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x45202524 +80003334: 000fae83 lw x29,0(x31) +80003338: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xdfc6f2e4 +8000333c: 000fae83 lw x29,0(x31) +80003340: 004f8f93 addi x31,x31,4 + +80003344 : +Zbkb_packh_cg_cmp_rs1_rs2_b29: + packh x9, x29, x29 # perform operation +80003344: 09def4b3 packh x9,x29,x29 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkb_packh_cg_cmp_rs1_rs2_b29, Zbkb_packh_cg_cmp_rs1_rs2_b29_str) +80003348: 0001a203 lw x4,0(x3) +8000334c: 00920863 beq x4,x9,8000335c +80003350: 1f0022ef jal x5,80005540 +80003354: 80003344 .word 0x80003344 +80003358: 8000e3bc .word 0x8000e3bc +8000335c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x9b46242c +80003360: 000faf03 lw x30,0(x31) +80003364: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x7d2211d3 +80003368: 000faf03 lw x30,0(x31) +8000336c: 004f8f93 addi x31,x31,4 + +80003370 : +Zbkb_packh_cg_cmp_rs1_rs2_b30: + packh x27, x30, x30 # perform operation +80003370: 09ef7db3 packh x27,x30,x30 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkb_packh_cg_cmp_rs1_rs2_b30, Zbkb_packh_cg_cmp_rs1_rs2_b30_str) +80003374: 0001a203 lw x4,0(x3) +80003378: 01b20863 beq x4,x27,80003388 +8000337c: 1c4022ef jal x5,80005540 +80003380: 80003370 .word 0x80003370 +80003384: 8000e3f6 .word 0x8000e3f6 +80003388: 00418193 addi x3,x3,4 + + mv x29, x31 # switch data pointer register to avoid conflict with test +8000338c: 000f8e93 addi x29,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs1: x31 = 0x3c96b5df +80003390: 000eaf83 lw x31,0(x29) +80003394: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0xcf845c82 +80003398: 000eaf83 lw x31,0(x29) +8000339c: 004e8e93 addi x29,x29,4 + +800033a0 : +Zbkb_packh_cg_cmp_rs1_rs2_b31: + packh x17, x31, x31 # perform operation +800033a0: 09fff8b3 packh x17,x31,x31 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkb_packh_cg_cmp_rs1_rs2_b31, Zbkb_packh_cg_cmp_rs1_rs2_b31_str) +800033a4: 0001a203 lw x4,0(x3) +800033a8: 01120863 beq x4,x17,800033b8 +800033ac: 194022ef jal x5,80005540 +800033b0: 800033a0 .word 0x800033a0 +800033b4: 8000e430 .word 0x8000e430 +800033b8: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs1: x0 = 0x1717f3b3 +800033bc: 000ea003 lw x0,0(x29) +800033c0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xeada05fa +800033c4: 000ea783 lw x15,0(x29) +800033c8: 004e8e93 addi x29,x29,4 + +800033cc : +Zbkb_packh_cg_cmp_rd_rs1_b0: + packh x0, x0, x15 # perform operation +800033cc: 08f07033 packh x0,x0,x15 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_packh_cg_cmp_rd_rs1_b0, Zbkb_packh_cg_cmp_rd_rs1_b0_str) +800033d0: 0001a203 lw x4,0(x3) +800033d4: 00020863 beq x4,x0,800033e4 +800033d8: 168022ef jal x5,80005540 +800033dc: 800033cc .word 0x800033cc +800033e0: 8000e46a .word 0x8000e46a +800033e4: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs1: x1 = 0x5a57665c +800033e8: 000ea083 lw x1,0(x29) +800033ec: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x59b12af1 +800033f0: 000eaf03 lw x30,0(x29) +800033f4: 004e8e93 addi x29,x29,4 + +800033f8 : +Zbkb_packh_cg_cmp_rd_rs1_b1: + packh x1, x1, x30 # perform operation +800033f8: 09e0f0b3 packh x1,x1,x30 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_packh_cg_cmp_rd_rs1_b1, Zbkb_packh_cg_cmp_rd_rs1_b1_str) +800033fc: 0001a203 lw x4,0(x3) +80003400: 00120863 beq x4,x1,80003410 +80003404: 13c022ef jal x5,80005540 +80003408: 800033f8 .word 0x800033f8 +8000340c: 8000e4a2 .word 0x8000e4a2 +80003410: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs1: x2 = 0x8ca3067b +80003414: 000ea103 lw x2,0(x29) +80003418: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x5db9f078 +8000341c: 000ea603 lw x12,0(x29) +80003420: 004e8e93 addi x29,x29,4 + +80003424 : +Zbkb_packh_cg_cmp_rd_rs1_b2: + packh x2, x2, x12 # perform operation +80003424: 08c17133 packh x2,x2,x12 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_packh_cg_cmp_rd_rs1_b2, Zbkb_packh_cg_cmp_rd_rs1_b2_str) +80003428: 0001a203 lw x4,0(x3) +8000342c: 00220863 beq x4,x2,8000343c +80003430: 110022ef jal x5,80005540 +80003434: 80003424 .word 0x80003424 +80003438: 8000e4da .word 0x8000e4da +8000343c: 00418193 addi x3,x3,4 + + mv x22, x3 # switch signature pointer register to avoid conflict with test +80003440: 00018b13 addi x22,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0xac073e79 +80003444: 000ea183 lw x3,0(x29) +80003448: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0xbde8da71 +8000344c: 000ea503 lw x10,0(x29) +80003450: 004e8e93 addi x29,x29,4 + +80003454 : +Zbkb_packh_cg_cmp_rd_rs1_b3: + packh x3, x3, x10 # perform operation +80003454: 08a1f1b3 packh x3,x3,x10 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zbkb_packh_cg_cmp_rd_rs1_b3, Zbkb_packh_cg_cmp_rd_rs1_b3_str) +80003458: 000b2203 lw x4,0(x22) +8000345c: 00320863 beq x4,x3,8000346c +80003460: 0e0022ef jal x5,80005540 +80003464: 80003454 .word 0x80003454 +80003468: 8000e512 .word 0x8000e512 +8000346c: 004b0b13 addi x22,x22,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003470: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003474: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x3dc4680d +80003478: 000ea203 lw x4,0(x29) +8000347c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0x6e5e40b1 +80003480: 000ead03 lw x26,0(x29) +80003484: 004e8e93 addi x29,x29,4 + +80003488 : +Zbkb_packh_cg_cmp_rd_rs1_b4: + packh x4, x4, x26 # perform operation +80003488: 09a27233 packh x4,x4,x26 + # Check if x4 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x4, Zbkb_packh_cg_cmp_rd_rs1_b4, Zbkb_packh_cg_cmp_rd_rs1_b4_str) +8000348c: 000b2683 lw x13,0(x22) +80003490: 00468863 beq x13,x4,800034a0 +80003494: 0ec0276f jal x14,80005580 +80003498: 80003488 .word 0x80003488 +8000349c: 8000e54a .word 0x8000e54a +800034a0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0x1ea1ef4d +800034a4: 000ea283 lw x5,0(x29) +800034a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0xbeca9e9b +800034ac: 000ea383 lw x7,0(x29) +800034b0: 004e8e93 addi x29,x29,4 + +800034b4 : +Zbkb_packh_cg_cmp_rd_rs1_b5: + packh x5, x5, x7 # perform operation +800034b4: 0872f2b3 packh x5,x5,x7 + # Check if x5 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x5, Zbkb_packh_cg_cmp_rd_rs1_b5, Zbkb_packh_cg_cmp_rd_rs1_b5_str) +800034b8: 000b2683 lw x13,0(x22) +800034bc: 00568863 beq x13,x5,800034cc +800034c0: 0c00276f jal x14,80005580 +800034c4: 800034b4 .word 0x800034b4 +800034c8: 8000e582 .word 0x8000e582 +800034cc: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x7e41fb11 +800034d0: 000ea303 lw x6,0(x29) +800034d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0x29f35c26 +800034d8: 000ea403 lw x8,0(x29) +800034dc: 004e8e93 addi x29,x29,4 + +800034e0 : +Zbkb_packh_cg_cmp_rd_rs1_b6: + packh x6, x6, x8 # perform operation +800034e0: 08837333 packh x6,x6,x8 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zbkb_packh_cg_cmp_rd_rs1_b6, Zbkb_packh_cg_cmp_rd_rs1_b6_str) +800034e4: 000b2683 lw x13,0(x22) +800034e8: 00668863 beq x13,x6,800034f8 +800034ec: 0940276f jal x14,80005580 +800034f0: 800034e0 .word 0x800034e0 +800034f4: 8000e5ba .word 0x8000e5ba +800034f8: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0xb3d4cf93 +800034fc: 000ea383 lw x7,0(x29) +80003500: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x9ee77f0a +80003504: 000ea603 lw x12,0(x29) +80003508: 004e8e93 addi x29,x29,4 + +8000350c : +Zbkb_packh_cg_cmp_rd_rs1_b7: + packh x7, x7, x12 # perform operation +8000350c: 08c3f3b3 packh x7,x7,x12 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zbkb_packh_cg_cmp_rd_rs1_b7, Zbkb_packh_cg_cmp_rd_rs1_b7_str) +80003510: 000b2683 lw x13,0(x22) +80003514: 00768863 beq x13,x7,80003524 +80003518: 0680276f jal x14,80005580 +8000351c: 8000350c .word 0x8000350c +80003520: 8000e5f2 .word 0x8000e5f2 +80003524: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0xb5e28391 +80003528: 000ea403 lw x8,0(x29) +8000352c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x2b50429b +80003530: 000ea603 lw x12,0(x29) +80003534: 004e8e93 addi x29,x29,4 + +80003538 : +Zbkb_packh_cg_cmp_rd_rs1_b8: + packh x8, x8, x12 # perform operation +80003538: 08c47433 packh x8,x8,x12 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zbkb_packh_cg_cmp_rd_rs1_b8, Zbkb_packh_cg_cmp_rd_rs1_b8_str) +8000353c: 000b2683 lw x13,0(x22) +80003540: 00868863 beq x13,x8,80003550 +80003544: 03c0276f jal x14,80005580 +80003548: 80003538 .word 0x80003538 +8000354c: 8000e62a .word 0x8000e62a +80003550: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0xea3153f9 +80003554: 000ea483 lw x9,0(x29) +80003558: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xaf7f5f1d +8000355c: 000eaf03 lw x30,0(x29) +80003560: 004e8e93 addi x29,x29,4 + +80003564 : +Zbkb_packh_cg_cmp_rd_rs1_b9: + packh x9, x9, x30 # perform operation +80003564: 09e4f4b3 packh x9,x9,x30 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zbkb_packh_cg_cmp_rd_rs1_b9, Zbkb_packh_cg_cmp_rd_rs1_b9_str) +80003568: 000b2683 lw x13,0(x22) +8000356c: 00968863 beq x13,x9,8000357c +80003570: 0100276f jal x14,80005580 +80003574: 80003564 .word 0x80003564 +80003578: 8000e662 .word 0x8000e662 +8000357c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0x002dbbbd +80003580: 000ea503 lw x10,0(x29) +80003584: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x37931e7e +80003588: 000eaf83 lw x31,0(x29) +8000358c: 004e8e93 addi x29,x29,4 + +80003590 : +Zbkb_packh_cg_cmp_rd_rs1_b10: + packh x10, x10, x31 # perform operation +80003590: 09f57533 packh x10,x10,x31 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zbkb_packh_cg_cmp_rd_rs1_b10, Zbkb_packh_cg_cmp_rd_rs1_b10_str) +80003594: 000b2683 lw x13,0(x22) +80003598: 00a68863 beq x13,x10,800035a8 +8000359c: 7e50176f jal x14,80005580 +800035a0: 80003590 .word 0x80003590 +800035a4: 8000e69a .word 0x8000e69a +800035a8: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0x8e304866 +800035ac: 000ea583 lw x11,0(x29) +800035b0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x8a4ee8b2 +800035b4: 000eaf83 lw x31,0(x29) +800035b8: 004e8e93 addi x29,x29,4 + +800035bc : +Zbkb_packh_cg_cmp_rd_rs1_b11: + packh x11, x11, x31 # perform operation +800035bc: 09f5f5b3 packh x11,x11,x31 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zbkb_packh_cg_cmp_rd_rs1_b11, Zbkb_packh_cg_cmp_rd_rs1_b11_str) +800035c0: 000b2683 lw x13,0(x22) +800035c4: 00b68863 beq x13,x11,800035d4 +800035c8: 7b90176f jal x14,80005580 +800035cc: 800035bc .word 0x800035bc +800035d0: 8000e6d3 .word 0x8000e6d3 +800035d4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xba3d41c9 +800035d8: 000ea603 lw x12,0(x29) +800035dc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x55f0e2a0 +800035e0: 000eaa83 lw x21,0(x29) +800035e4: 004e8e93 addi x29,x29,4 + +800035e8 : +Zbkb_packh_cg_cmp_rd_rs1_b12: + packh x12, x12, x21 # perform operation +800035e8: 09567633 packh x12,x12,x21 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zbkb_packh_cg_cmp_rd_rs1_b12, Zbkb_packh_cg_cmp_rd_rs1_b12_str) +800035ec: 000b2683 lw x13,0(x22) +800035f0: 00c68863 beq x13,x12,80003600 +800035f4: 78d0176f jal x14,80005580 +800035f8: 800035e8 .word 0x800035e8 +800035fc: 8000e70c .word 0x8000e70c +80003600: 004b0b13 addi x22,x22,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003604: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003608: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x2998775d +8000360c: 000ea683 lw x13,0(x29) +80003610: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x467d05fd +80003614: 000eaa83 lw x21,0(x29) +80003618: 004e8e93 addi x29,x29,4 + +8000361c : +Zbkb_packh_cg_cmp_rd_rs1_b13: + packh x13, x13, x21 # perform operation +8000361c: 0956f6b3 packh x13,x13,x21 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zbkb_packh_cg_cmp_rd_rs1_b13, Zbkb_packh_cg_cmp_rd_rs1_b13_str) +80003620: 000b2203 lw x4,0(x22) +80003624: 00d20863 beq x4,x13,80003634 +80003628: 719012ef jal x5,80005540 +8000362c: 8000361c .word 0x8000361c +80003630: 8000e745 .word 0x8000e745 +80003634: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0xdea883cc +80003638: 000ea703 lw x14,0(x29) +8000363c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0xebb29179 +80003640: 000ea183 lw x3,0(x29) +80003644: 004e8e93 addi x29,x29,4 + +80003648 : +Zbkb_packh_cg_cmp_rd_rs1_b14: + packh x14, x14, x3 # perform operation +80003648: 08377733 packh x14,x14,x3 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zbkb_packh_cg_cmp_rd_rs1_b14, Zbkb_packh_cg_cmp_rd_rs1_b14_str) +8000364c: 000b2203 lw x4,0(x22) +80003650: 00e20863 beq x4,x14,80003660 +80003654: 6ed012ef jal x5,80005540 +80003658: 80003648 .word 0x80003648 +8000365c: 8000e77e .word 0x8000e77e +80003660: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x95b04fa9 +80003664: 000ea783 lw x15,0(x29) +80003668: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0xabb9eed4 +8000366c: 000ea883 lw x17,0(x29) +80003670: 004e8e93 addi x29,x29,4 + +80003674 : +Zbkb_packh_cg_cmp_rd_rs1_b15: + packh x15, x15, x17 # perform operation +80003674: 0917f7b3 packh x15,x15,x17 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zbkb_packh_cg_cmp_rd_rs1_b15, Zbkb_packh_cg_cmp_rd_rs1_b15_str) +80003678: 000b2203 lw x4,0(x22) +8000367c: 00f20863 beq x4,x15,8000368c +80003680: 6c1012ef jal x5,80005540 +80003684: 80003674 .word 0x80003674 +80003688: 8000e7b7 .word 0x8000e7b7 +8000368c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x22f47855 +80003690: 000ea803 lw x16,0(x29) +80003694: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x5983492a +80003698: 000eae03 lw x28,0(x29) +8000369c: 004e8e93 addi x29,x29,4 + +800036a0 : +Zbkb_packh_cg_cmp_rd_rs1_b16: + packh x16, x16, x28 # perform operation +800036a0: 09c87833 packh x16,x16,x28 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zbkb_packh_cg_cmp_rd_rs1_b16, Zbkb_packh_cg_cmp_rd_rs1_b16_str) +800036a4: 000b2203 lw x4,0(x22) +800036a8: 01020863 beq x4,x16,800036b8 +800036ac: 695012ef jal x5,80005540 +800036b0: 800036a0 .word 0x800036a0 +800036b4: 8000e7f0 .word 0x8000e7f0 +800036b8: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x845495e7 +800036bc: 000ea883 lw x17,0(x29) +800036c0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x6e1a2929 +800036c4: 000eaf83 lw x31,0(x29) +800036c8: 004e8e93 addi x29,x29,4 + +800036cc : +Zbkb_packh_cg_cmp_rd_rs1_b17: + packh x17, x17, x31 # perform operation +800036cc: 09f8f8b3 packh x17,x17,x31 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zbkb_packh_cg_cmp_rd_rs1_b17, Zbkb_packh_cg_cmp_rd_rs1_b17_str) +800036d0: 000b2203 lw x4,0(x22) +800036d4: 01120863 beq x4,x17,800036e4 +800036d8: 669012ef jal x5,80005540 +800036dc: 800036cc .word 0x800036cc +800036e0: 8000e829 .word 0x8000e829 +800036e4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x3f62e109 +800036e8: 000ea903 lw x18,0(x29) +800036ec: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0x1bd64432 +800036f0: 000ea783 lw x15,0(x29) +800036f4: 004e8e93 addi x29,x29,4 + +800036f8 : +Zbkb_packh_cg_cmp_rd_rs1_b18: + packh x18, x18, x15 # perform operation +800036f8: 08f97933 packh x18,x18,x15 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zbkb_packh_cg_cmp_rd_rs1_b18, Zbkb_packh_cg_cmp_rd_rs1_b18_str) +800036fc: 000b2203 lw x4,0(x22) +80003700: 01220863 beq x4,x18,80003710 +80003704: 63d012ef jal x5,80005540 +80003708: 800036f8 .word 0x800036f8 +8000370c: 8000e862 .word 0x8000e862 +80003710: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x8d43c3d0 +80003714: 000ea983 lw x19,0(x29) +80003718: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x62118a10 +8000371c: 000eac03 lw x24,0(x29) +80003720: 004e8e93 addi x29,x29,4 + +80003724 : +Zbkb_packh_cg_cmp_rd_rs1_b19: + packh x19, x19, x24 # perform operation +80003724: 0989f9b3 packh x19,x19,x24 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zbkb_packh_cg_cmp_rd_rs1_b19, Zbkb_packh_cg_cmp_rd_rs1_b19_str) +80003728: 000b2203 lw x4,0(x22) +8000372c: 01320863 beq x4,x19,8000373c +80003730: 611012ef jal x5,80005540 +80003734: 80003724 .word 0x80003724 +80003738: 8000e89b .word 0x8000e89b +8000373c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x2be78626 +80003740: 000eaa03 lw x20,0(x29) +80003744: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x9985aabf +80003748: 000ea883 lw x17,0(x29) +8000374c: 004e8e93 addi x29,x29,4 + +80003750 : +Zbkb_packh_cg_cmp_rd_rs1_b20: + packh x20, x20, x17 # perform operation +80003750: 091a7a33 packh x20,x20,x17 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkb_packh_cg_cmp_rd_rs1_b20, Zbkb_packh_cg_cmp_rd_rs1_b20_str) +80003754: 000b2203 lw x4,0(x22) +80003758: 01420863 beq x4,x20,80003768 +8000375c: 5e5012ef jal x5,80005540 +80003760: 80003750 .word 0x80003750 +80003764: 8000e8d4 .word 0x8000e8d4 +80003768: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x2274ccdb +8000376c: 000eaa83 lw x21,0(x29) +80003770: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0x403d4c20 +80003774: 000ea683 lw x13,0(x29) +80003778: 004e8e93 addi x29,x29,4 + +8000377c : +Zbkb_packh_cg_cmp_rd_rs1_b21: + packh x21, x21, x13 # perform operation +8000377c: 08dafab3 packh x21,x21,x13 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkb_packh_cg_cmp_rd_rs1_b21, Zbkb_packh_cg_cmp_rd_rs1_b21_str) +80003780: 000b2203 lw x4,0(x22) +80003784: 01520863 beq x4,x21,80003794 +80003788: 5b9012ef jal x5,80005540 +8000378c: 8000377c .word 0x8000377c +80003790: 8000e90d .word 0x8000e90d +80003794: 004b0b13 addi x22,x22,4 + + mv x26, x22 # switch signature pointer register to avoid conflict with test +80003798: 000b0d13 addi x26,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x9e900871 +8000379c: 000eab03 lw x22,0(x29) +800037a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x96d05985 +800037a4: 000ea603 lw x12,0(x29) +800037a8: 004e8e93 addi x29,x29,4 + +800037ac : +Zbkb_packh_cg_cmp_rd_rs1_b22: + packh x22, x22, x12 # perform operation +800037ac: 08cb7b33 packh x22,x22,x12 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zbkb_packh_cg_cmp_rd_rs1_b22, Zbkb_packh_cg_cmp_rd_rs1_b22_str) +800037b0: 000d2203 lw x4,0(x26) +800037b4: 01620863 beq x4,x22,800037c4 +800037b8: 589012ef jal x5,80005540 +800037bc: 800037ac .word 0x800037ac +800037c0: 8000e946 .word 0x8000e946 +800037c4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x787debfe +800037c8: 000eab83 lw x23,0(x29) +800037cc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x317bccb5 +800037d0: 000eae03 lw x28,0(x29) +800037d4: 004e8e93 addi x29,x29,4 + +800037d8 : +Zbkb_packh_cg_cmp_rd_rs1_b23: + packh x23, x23, x28 # perform operation +800037d8: 09cbfbb3 packh x23,x23,x28 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zbkb_packh_cg_cmp_rd_rs1_b23, Zbkb_packh_cg_cmp_rd_rs1_b23_str) +800037dc: 000d2203 lw x4,0(x26) +800037e0: 01720863 beq x4,x23,800037f0 +800037e4: 55d012ef jal x5,80005540 +800037e8: 800037d8 .word 0x800037d8 +800037ec: 8000e97f .word 0x8000e97f +800037f0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x8ad704ae +800037f4: 000eac03 lw x24,0(x29) +800037f8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x3b60b618 +800037fc: 000eaf83 lw x31,0(x29) +80003800: 004e8e93 addi x29,x29,4 + +80003804 : +Zbkb_packh_cg_cmp_rd_rs1_b24: + packh x24, x24, x31 # perform operation +80003804: 09fc7c33 packh x24,x24,x31 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zbkb_packh_cg_cmp_rd_rs1_b24, Zbkb_packh_cg_cmp_rd_rs1_b24_str) +80003808: 000d2203 lw x4,0(x26) +8000380c: 01820863 beq x4,x24,8000381c +80003810: 531012ef jal x5,80005540 +80003814: 80003804 .word 0x80003804 +80003818: 8000e9b8 .word 0x8000e9b8 +8000381c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x0e1da70b +80003820: 000eac83 lw x25,0(x29) +80003824: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x875a3685 +80003828: 000eaf83 lw x31,0(x29) +8000382c: 004e8e93 addi x29,x29,4 + +80003830 : +Zbkb_packh_cg_cmp_rd_rs1_b25: + packh x25, x25, x31 # perform operation +80003830: 09fcfcb3 packh x25,x25,x31 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zbkb_packh_cg_cmp_rd_rs1_b25, Zbkb_packh_cg_cmp_rd_rs1_b25_str) +80003834: 000d2203 lw x4,0(x26) +80003838: 01920863 beq x4,x25,80003848 +8000383c: 505012ef jal x5,80005540 +80003840: 80003830 .word 0x80003830 +80003844: 8000e9f1 .word 0x8000e9f1 +80003848: 004d0d13 addi x26,x26,4 + + mv x2, x26 # switch signature pointer register to avoid conflict with test +8000384c: 000d0113 addi x2,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x4fa33e3c +80003850: 000ead03 lw x26,0(x29) +80003854: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x47155c75 +80003858: 000ea503 lw x10,0(x29) +8000385c: 004e8e93 addi x29,x29,4 + +80003860 : +Zbkb_packh_cg_cmp_rd_rs1_b26: + packh x26, x26, x10 # perform operation +80003860: 08ad7d33 packh x26,x26,x10 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_packh_cg_cmp_rd_rs1_b26, Zbkb_packh_cg_cmp_rd_rs1_b26_str) +80003864: 00012203 lw x4,0(x2) +80003868: 01a20863 beq x4,x26,80003878 +8000386c: 4d5012ef jal x5,80005540 +80003870: 80003860 .word 0x80003860 +80003874: 8000ea2a .word 0x8000ea2a +80003878: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xf2d8f4a8 +8000387c: 000ead83 lw x27,0(x29) +80003880: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0x8ec1bbbf +80003884: 000ea683 lw x13,0(x29) +80003888: 004e8e93 addi x29,x29,4 + +8000388c : +Zbkb_packh_cg_cmp_rd_rs1_b27: + packh x27, x27, x13 # perform operation +8000388c: 08ddfdb3 packh x27,x27,x13 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkb_packh_cg_cmp_rd_rs1_b27, Zbkb_packh_cg_cmp_rd_rs1_b27_str) +80003890: 00012203 lw x4,0(x2) +80003894: 01b20863 beq x4,x27,800038a4 +80003898: 4a9012ef jal x5,80005540 +8000389c: 8000388c .word 0x8000388c +800038a0: 8000ea63 .word 0x8000ea63 +800038a4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x160bef38 +800038a8: 000eae03 lw x28,0(x29) +800038ac: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x49f2b021 +800038b0: 000ea083 lw x1,0(x29) +800038b4: 004e8e93 addi x29,x29,4 + +800038b8 : +Zbkb_packh_cg_cmp_rd_rs1_b28: + packh x28, x28, x1 # perform operation +800038b8: 081e7e33 packh x28,x28,x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_packh_cg_cmp_rd_rs1_b28, Zbkb_packh_cg_cmp_rd_rs1_b28_str) +800038bc: 00012203 lw x4,0(x2) +800038c0: 01c20863 beq x4,x28,800038d0 +800038c4: 47d012ef jal x5,80005540 +800038c8: 800038b8 .word 0x800038b8 +800038cc: 8000ea9c .word 0x8000ea9c +800038d0: 00410113 addi x2,x2,4 + + mv x24, x29 # switch data pointer register to avoid conflict with test +800038d4: 000e8c13 addi x24,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x94972c9b +800038d8: 000c2e83 lw x29,0(x24) +800038dc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xc799380a +800038e0: 000c2303 lw x6,0(x24) +800038e4: 004c0c13 addi x24,x24,4 + +800038e8 : +Zbkb_packh_cg_cmp_rd_rs1_b29: + packh x29, x29, x6 # perform operation +800038e8: 086efeb3 packh x29,x29,x6 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_packh_cg_cmp_rd_rs1_b29, Zbkb_packh_cg_cmp_rd_rs1_b29_str) +800038ec: 00012203 lw x4,0(x2) +800038f0: 01d20863 beq x4,x29,80003900 +800038f4: 44d012ef jal x5,80005540 +800038f8: 800038e8 .word 0x800038e8 +800038fc: 8000ead5 .word 0x8000ead5 +80003900: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x628ebea0 +80003904: 000c2f03 lw x30,0(x24) +80003908: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x13085e9b +8000390c: 000c2d03 lw x26,0(x24) +80003910: 004c0c13 addi x24,x24,4 + +80003914 : +Zbkb_packh_cg_cmp_rd_rs1_b30: + packh x30, x30, x26 # perform operation +80003914: 09af7f33 packh x30,x30,x26 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_packh_cg_cmp_rd_rs1_b30, Zbkb_packh_cg_cmp_rd_rs1_b30_str) +80003918: 00012203 lw x4,0(x2) +8000391c: 01e20863 beq x4,x30,8000392c +80003920: 421012ef jal x5,80005540 +80003924: 80003914 .word 0x80003914 +80003928: 8000eb0e .word 0x8000eb0e +8000392c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x6a2a3d0f +80003930: 000c2f83 lw x31,0(x24) +80003934: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xf331178b +80003938: 000c2a03 lw x20,0(x24) +8000393c: 004c0c13 addi x24,x24,4 + +80003940 : +Zbkb_packh_cg_cmp_rd_rs1_b31: + packh x31, x31, x20 # perform operation +80003940: 094fffb3 packh x31,x31,x20 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_packh_cg_cmp_rd_rs1_b31, Zbkb_packh_cg_cmp_rd_rs1_b31_str) +80003944: 00012203 lw x4,0(x2) +80003948: 01f20863 beq x4,x31,80003958 +8000394c: 3f5012ef jal x5,80005540 +80003950: 80003940 .word 0x80003940 +80003954: 8000eb47 .word 0x8000eb47 +80003958: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x329ebd93 +8000395c: 000c2883 lw x17,0(x24) +80003960: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0xaf00a3d2 +80003964: 000c2003 lw x0,0(x24) +80003968: 004c0c13 addi x24,x24,4 + +8000396c : +Zbkb_packh_cg_cmp_rd_rs2_b0: + packh x0, x17, x0 # perform operation +8000396c: 0808f033 packh x0,x17,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_packh_cg_cmp_rd_rs2_b0, Zbkb_packh_cg_cmp_rd_rs2_b0_str) +80003970: 00012203 lw x4,0(x2) +80003974: 00020863 beq x4,x0,80003984 +80003978: 3c9012ef jal x5,80005540 +8000397c: 8000396c .word 0x8000396c +80003980: 8000eb80 .word 0x8000eb80 +80003984: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xef30a37e +80003988: 000c2f83 lw x31,0(x24) +8000398c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0xe79101c9 +80003990: 000c2083 lw x1,0(x24) +80003994: 004c0c13 addi x24,x24,4 + +80003998 : +Zbkb_packh_cg_cmp_rd_rs2_b1: + packh x1, x31, x1 # perform operation +80003998: 081ff0b3 packh x1,x31,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_packh_cg_cmp_rd_rs2_b1, Zbkb_packh_cg_cmp_rd_rs2_b1_str) +8000399c: 00012203 lw x4,0(x2) +800039a0: 00120863 beq x4,x1,800039b0 +800039a4: 39d012ef jal x5,80005540 +800039a8: 80003998 .word 0x80003998 +800039ac: 8000ebb8 .word 0x8000ebb8 +800039b0: 00410113 addi x2,x2,4 + + mv x19, x2 # switch signature pointer register to avoid conflict with test +800039b4: 00010993 addi x19,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x219937a2 +800039b8: 000c2703 lw x14,0(x24) +800039bc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x16e0e00a +800039c0: 000c2103 lw x2,0(x24) +800039c4: 004c0c13 addi x24,x24,4 + +800039c8 : +Zbkb_packh_cg_cmp_rd_rs2_b2: + packh x2, x14, x2 # perform operation +800039c8: 08277133 packh x2,x14,x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_packh_cg_cmp_rd_rs2_b2, Zbkb_packh_cg_cmp_rd_rs2_b2_str) +800039cc: 0009a203 lw x4,0(x19) +800039d0: 00220863 beq x4,x2,800039e0 +800039d4: 36d012ef jal x5,80005540 +800039d8: 800039c8 .word 0x800039c8 +800039dc: 8000ebf0 .word 0x8000ebf0 +800039e0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xcec2b032 +800039e4: 000c2483 lw x9,0(x24) +800039e8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x2a2b631d +800039ec: 000c2183 lw x3,0(x24) +800039f0: 004c0c13 addi x24,x24,4 + +800039f4 : +Zbkb_packh_cg_cmp_rd_rs2_b3: + packh x3, x9, x3 # perform operation +800039f4: 0834f1b3 packh x3,x9,x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_packh_cg_cmp_rd_rs2_b3, Zbkb_packh_cg_cmp_rd_rs2_b3_str) +800039f8: 0009a203 lw x4,0(x19) +800039fc: 00320863 beq x4,x3,80003a0c +80003a00: 341012ef jal x5,80005540 +80003a04: 800039f4 .word 0x800039f4 +80003a08: 8000ec28 .word 0x8000ec28 +80003a0c: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003a10: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003a14: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x54e5f86d +80003a18: 000c2503 lw x10,0(x24) +80003a1c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x9efa0314 +80003a20: 000c2203 lw x4,0(x24) +80003a24: 004c0c13 addi x24,x24,4 + +80003a28 : +Zbkb_packh_cg_cmp_rd_rs2_b4: + packh x4, x10, x4 # perform operation +80003a28: 08457233 packh x4,x10,x4 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkb_packh_cg_cmp_rd_rs2_b4, Zbkb_packh_cg_cmp_rd_rs2_b4_str) +80003a2c: 0009a383 lw x7,0(x19) +80003a30: 00438863 beq x7,x4,80003a40 +80003a34: 3250146f jal x8,80005558 +80003a38: 80003a28 .word 0x80003a28 +80003a3c: 8000ec60 .word 0x8000ec60 +80003a40: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x58dffa77 +80003a44: 000c2703 lw x14,0(x24) +80003a48: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x8d12edb5 +80003a4c: 000c2283 lw x5,0(x24) +80003a50: 004c0c13 addi x24,x24,4 + +80003a54 : +Zbkb_packh_cg_cmp_rd_rs2_b5: + packh x5, x14, x5 # perform operation +80003a54: 085772b3 packh x5,x14,x5 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_packh_cg_cmp_rd_rs2_b5, Zbkb_packh_cg_cmp_rd_rs2_b5_str) +80003a58: 0009a383 lw x7,0(x19) +80003a5c: 00538863 beq x7,x5,80003a6c +80003a60: 2f90146f jal x8,80005558 +80003a64: 80003a54 .word 0x80003a54 +80003a68: 8000ec98 .word 0x8000ec98 +80003a6c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x0f6d9297 +80003a70: 000c2b83 lw x23,0(x24) +80003a74: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xe9ae46c7 +80003a78: 000c2303 lw x6,0(x24) +80003a7c: 004c0c13 addi x24,x24,4 + +80003a80 : +Zbkb_packh_cg_cmp_rd_rs2_b6: + packh x6, x23, x6 # perform operation +80003a80: 086bf333 packh x6,x23,x6 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkb_packh_cg_cmp_rd_rs2_b6, Zbkb_packh_cg_cmp_rd_rs2_b6_str) +80003a84: 0009a383 lw x7,0(x19) +80003a88: 00638863 beq x7,x6,80003a98 +80003a8c: 2cd0146f jal x8,80005558 +80003a90: 80003a80 .word 0x80003a80 +80003a94: 8000ecd0 .word 0x8000ecd0 +80003a98: 00498993 addi x19,x19,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a9c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003aa0: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x7173cef6 +80003aa4: 000c2f03 lw x30,0(x24) +80003aa8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0xa473cff0 +80003aac: 000c2383 lw x7,0(x24) +80003ab0: 004c0c13 addi x24,x24,4 + +80003ab4 : +Zbkb_packh_cg_cmp_rd_rs2_b7: + packh x7, x30, x7 # perform operation +80003ab4: 087f73b3 packh x7,x30,x7 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_packh_cg_cmp_rd_rs2_b7, Zbkb_packh_cg_cmp_rd_rs2_b7_str) +80003ab8: 0009a683 lw x13,0(x19) +80003abc: 00768863 beq x13,x7,80003acc +80003ac0: 2c10176f jal x14,80005580 +80003ac4: 80003ab4 .word 0x80003ab4 +80003ac8: 8000ed08 .word 0x8000ed08 +80003acc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x96e07002 +80003ad0: 000c2583 lw x11,0(x24) +80003ad4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x6779dfed +80003ad8: 000c2403 lw x8,0(x24) +80003adc: 004c0c13 addi x24,x24,4 + +80003ae0 : +Zbkb_packh_cg_cmp_rd_rs2_b8: + packh x8, x11, x8 # perform operation +80003ae0: 0885f433 packh x8,x11,x8 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_packh_cg_cmp_rd_rs2_b8, Zbkb_packh_cg_cmp_rd_rs2_b8_str) +80003ae4: 0009a683 lw x13,0(x19) +80003ae8: 00868863 beq x13,x8,80003af8 +80003aec: 2950176f jal x14,80005580 +80003af0: 80003ae0 .word 0x80003ae0 +80003af4: 8000ed40 .word 0x8000ed40 +80003af8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x9a9504a5 +80003afc: 000c2803 lw x16,0(x24) +80003b00: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xa0c12065 +80003b04: 000c2483 lw x9,0(x24) +80003b08: 004c0c13 addi x24,x24,4 + +80003b0c : +Zbkb_packh_cg_cmp_rd_rs2_b9: + packh x9, x16, x9 # perform operation +80003b0c: 089874b3 packh x9,x16,x9 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_packh_cg_cmp_rd_rs2_b9, Zbkb_packh_cg_cmp_rd_rs2_b9_str) +80003b10: 0009a683 lw x13,0(x19) +80003b14: 00968863 beq x13,x9,80003b24 +80003b18: 2690176f jal x14,80005580 +80003b1c: 80003b0c .word 0x80003b0c +80003b20: 8000ed78 .word 0x8000ed78 +80003b24: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0f5f13e1 +80003b28: 000c2e83 lw x29,0(x24) +80003b2c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x4ed9d15c +80003b30: 000c2503 lw x10,0(x24) +80003b34: 004c0c13 addi x24,x24,4 + +80003b38 : +Zbkb_packh_cg_cmp_rd_rs2_b10: + packh x10, x29, x10 # perform operation +80003b38: 08aef533 packh x10,x29,x10 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_packh_cg_cmp_rd_rs2_b10, Zbkb_packh_cg_cmp_rd_rs2_b10_str) +80003b3c: 0009a683 lw x13,0(x19) +80003b40: 00a68863 beq x13,x10,80003b50 +80003b44: 23d0176f jal x14,80005580 +80003b48: 80003b38 .word 0x80003b38 +80003b4c: 8000edb0 .word 0x8000edb0 +80003b50: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xf569c6a8 +80003b54: 000c2783 lw x15,0(x24) +80003b58: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x36d645f3 +80003b5c: 000c2583 lw x11,0(x24) +80003b60: 004c0c13 addi x24,x24,4 + +80003b64 : +Zbkb_packh_cg_cmp_rd_rs2_b11: + packh x11, x15, x11 # perform operation +80003b64: 08b7f5b3 packh x11,x15,x11 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_packh_cg_cmp_rd_rs2_b11, Zbkb_packh_cg_cmp_rd_rs2_b11_str) +80003b68: 0009a683 lw x13,0(x19) +80003b6c: 00b68863 beq x13,x11,80003b7c +80003b70: 2110176f jal x14,80005580 +80003b74: 80003b64 .word 0x80003b64 +80003b78: 8000ede9 .word 0x8000ede9 +80003b7c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xbf5d1deb +80003b80: 000c2f83 lw x31,0(x24) +80003b84: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xfd5238dc +80003b88: 000c2603 lw x12,0(x24) +80003b8c: 004c0c13 addi x24,x24,4 + +80003b90 : +Zbkb_packh_cg_cmp_rd_rs2_b12: + packh x12, x31, x12 # perform operation +80003b90: 08cff633 packh x12,x31,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_packh_cg_cmp_rd_rs2_b12, Zbkb_packh_cg_cmp_rd_rs2_b12_str) +80003b94: 0009a683 lw x13,0(x19) +80003b98: 00c68863 beq x13,x12,80003ba8 +80003b9c: 1e50176f jal x14,80005580 +80003ba0: 80003b90 .word 0x80003b90 +80003ba4: 8000ee22 .word 0x8000ee22 +80003ba8: 00498993 addi x19,x19,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003bac: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003bb0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xb31fd37c +80003bb4: 000c2483 lw x9,0(x24) +80003bb8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x01b945a0 +80003bbc: 000c2683 lw x13,0(x24) +80003bc0: 004c0c13 addi x24,x24,4 + +80003bc4 : +Zbkb_packh_cg_cmp_rd_rs2_b13: + packh x13, x9, x13 # perform operation +80003bc4: 08d4f6b3 packh x13,x9,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_packh_cg_cmp_rd_rs2_b13, Zbkb_packh_cg_cmp_rd_rs2_b13_str) +80003bc8: 0009a203 lw x4,0(x19) +80003bcc: 00d20863 beq x4,x13,80003bdc +80003bd0: 171012ef jal x5,80005540 +80003bd4: 80003bc4 .word 0x80003bc4 +80003bd8: 8000ee5b .word 0x8000ee5b +80003bdc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xcaf879c8 +80003be0: 000c2183 lw x3,0(x24) +80003be4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xe2834e8d +80003be8: 000c2703 lw x14,0(x24) +80003bec: 004c0c13 addi x24,x24,4 + +80003bf0 : +Zbkb_packh_cg_cmp_rd_rs2_b14: + packh x14, x3, x14 # perform operation +80003bf0: 08e1f733 packh x14,x3,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_packh_cg_cmp_rd_rs2_b14, Zbkb_packh_cg_cmp_rd_rs2_b14_str) +80003bf4: 0009a203 lw x4,0(x19) +80003bf8: 00e20863 beq x4,x14,80003c08 +80003bfc: 145012ef jal x5,80005540 +80003c00: 80003bf0 .word 0x80003bf0 +80003c04: 8000ee94 .word 0x8000ee94 +80003c08: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x1f2f3db3 +80003c0c: 000c2f83 lw x31,0(x24) +80003c10: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x2fafaa87 +80003c14: 000c2783 lw x15,0(x24) +80003c18: 004c0c13 addi x24,x24,4 + +80003c1c : +Zbkb_packh_cg_cmp_rd_rs2_b15: + packh x15, x31, x15 # perform operation +80003c1c: 08fff7b3 packh x15,x31,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_packh_cg_cmp_rd_rs2_b15, Zbkb_packh_cg_cmp_rd_rs2_b15_str) +80003c20: 0009a203 lw x4,0(x19) +80003c24: 00f20863 beq x4,x15,80003c34 +80003c28: 119012ef jal x5,80005540 +80003c2c: 80003c1c .word 0x80003c1c +80003c30: 8000eecd .word 0x8000eecd +80003c34: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x141be88e +80003c38: 000c2383 lw x7,0(x24) +80003c3c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xcdd7f58d +80003c40: 000c2803 lw x16,0(x24) +80003c44: 004c0c13 addi x24,x24,4 + +80003c48 : +Zbkb_packh_cg_cmp_rd_rs2_b16: + packh x16, x7, x16 # perform operation +80003c48: 0903f833 packh x16,x7,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_packh_cg_cmp_rd_rs2_b16, Zbkb_packh_cg_cmp_rd_rs2_b16_str) +80003c4c: 0009a203 lw x4,0(x19) +80003c50: 01020863 beq x4,x16,80003c60 +80003c54: 0ed012ef jal x5,80005540 +80003c58: 80003c48 .word 0x80003c48 +80003c5c: 8000ef06 .word 0x8000ef06 +80003c60: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x46d9fbe2 +80003c64: 000c2a03 lw x20,0(x24) +80003c68: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x18769f6e +80003c6c: 000c2883 lw x17,0(x24) +80003c70: 004c0c13 addi x24,x24,4 + +80003c74 : +Zbkb_packh_cg_cmp_rd_rs2_b17: + packh x17, x20, x17 # perform operation +80003c74: 091a78b3 packh x17,x20,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_packh_cg_cmp_rd_rs2_b17, Zbkb_packh_cg_cmp_rd_rs2_b17_str) +80003c78: 0009a203 lw x4,0(x19) +80003c7c: 01120863 beq x4,x17,80003c8c +80003c80: 0c1012ef jal x5,80005540 +80003c84: 80003c74 .word 0x80003c74 +80003c88: 8000ef3f .word 0x8000ef3f +80003c8c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xcc936f4b +80003c90: 000c2a03 lw x20,0(x24) +80003c94: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xf61718c1 +80003c98: 000c2903 lw x18,0(x24) +80003c9c: 004c0c13 addi x24,x24,4 + +80003ca0 : +Zbkb_packh_cg_cmp_rd_rs2_b18: + packh x18, x20, x18 # perform operation +80003ca0: 092a7933 packh x18,x20,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_packh_cg_cmp_rd_rs2_b18, Zbkb_packh_cg_cmp_rd_rs2_b18_str) +80003ca4: 0009a203 lw x4,0(x19) +80003ca8: 01220863 beq x4,x18,80003cb8 +80003cac: 095012ef jal x5,80005540 +80003cb0: 80003ca0 .word 0x80003ca0 +80003cb4: 8000ef78 .word 0x8000ef78 +80003cb8: 00498993 addi x19,x19,4 + + mv x18, x19 # switch signature pointer register to avoid conflict with test +80003cbc: 00098913 addi x18,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x511c512e +80003cc0: 000c2e83 lw x29,0(x24) +80003cc4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x0361aa92 +80003cc8: 000c2983 lw x19,0(x24) +80003ccc: 004c0c13 addi x24,x24,4 + +80003cd0 : +Zbkb_packh_cg_cmp_rd_rs2_b19: + packh x19, x29, x19 # perform operation +80003cd0: 093ef9b3 packh x19,x29,x19 + # Check if x19 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x19, Zbkb_packh_cg_cmp_rd_rs2_b19, Zbkb_packh_cg_cmp_rd_rs2_b19_str) +80003cd4: 00092203 lw x4,0(x18) +80003cd8: 01320863 beq x4,x19,80003ce8 +80003cdc: 065012ef jal x5,80005540 +80003ce0: 80003cd0 .word 0x80003cd0 +80003ce4: 8000efb1 .word 0x8000efb1 +80003ce8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x5e0a4f01 +80003cec: 000c2883 lw x17,0(x24) +80003cf0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xcee231b2 +80003cf4: 000c2a03 lw x20,0(x24) +80003cf8: 004c0c13 addi x24,x24,4 + +80003cfc : +Zbkb_packh_cg_cmp_rd_rs2_b20: + packh x20, x17, x20 # perform operation +80003cfc: 0948fa33 packh x20,x17,x20 + # Check if x20 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x20, Zbkb_packh_cg_cmp_rd_rs2_b20, Zbkb_packh_cg_cmp_rd_rs2_b20_str) +80003d00: 00092203 lw x4,0(x18) +80003d04: 01420863 beq x4,x20,80003d14 +80003d08: 039012ef jal x5,80005540 +80003d0c: 80003cfc .word 0x80003cfc +80003d10: 8000efea .word 0x8000efea +80003d14: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x73b0405c +80003d18: 000c2783 lw x15,0(x24) +80003d1c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x7a3eb669 +80003d20: 000c2a83 lw x21,0(x24) +80003d24: 004c0c13 addi x24,x24,4 + +80003d28 : +Zbkb_packh_cg_cmp_rd_rs2_b21: + packh x21, x15, x21 # perform operation +80003d28: 0957fab3 packh x21,x15,x21 + # Check if x21 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x21, Zbkb_packh_cg_cmp_rd_rs2_b21, Zbkb_packh_cg_cmp_rd_rs2_b21_str) +80003d2c: 00092203 lw x4,0(x18) +80003d30: 01520863 beq x4,x21,80003d40 +80003d34: 00d012ef jal x5,80005540 +80003d38: 80003d28 .word 0x80003d28 +80003d3c: 8000f023 .word 0x8000f023 +80003d40: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x3bc169f0 +80003d44: 000c2703 lw x14,0(x24) +80003d48: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xfd1c9df5 +80003d4c: 000c2b03 lw x22,0(x24) +80003d50: 004c0c13 addi x24,x24,4 + +80003d54 : +Zbkb_packh_cg_cmp_rd_rs2_b22: + packh x22, x14, x22 # perform operation +80003d54: 09677b33 packh x22,x14,x22 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zbkb_packh_cg_cmp_rd_rs2_b22, Zbkb_packh_cg_cmp_rd_rs2_b22_str) +80003d58: 00092203 lw x4,0(x18) +80003d5c: 01620863 beq x4,x22,80003d6c +80003d60: 7e0012ef jal x5,80005540 +80003d64: 80003d54 .word 0x80003d54 +80003d68: 8000f05c .word 0x8000f05c +80003d6c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x7355d6c3 +80003d70: 000c2983 lw x19,0(x24) +80003d74: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x8007d208 +80003d78: 000c2b83 lw x23,0(x24) +80003d7c: 004c0c13 addi x24,x24,4 + +80003d80 : +Zbkb_packh_cg_cmp_rd_rs2_b23: + packh x23, x19, x23 # perform operation +80003d80: 0979fbb3 packh x23,x19,x23 + # Check if x23 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x23, Zbkb_packh_cg_cmp_rd_rs2_b23, Zbkb_packh_cg_cmp_rd_rs2_b23_str) +80003d84: 00092203 lw x4,0(x18) +80003d88: 01720863 beq x4,x23,80003d98 +80003d8c: 7b4012ef jal x5,80005540 +80003d90: 80003d80 .word 0x80003d80 +80003d94: 8000f095 .word 0x8000f095 +80003d98: 00490913 addi x18,x18,4 + + mv x10, x24 # switch data pointer register to avoid conflict with test +80003d9c: 000c0513 addi x10,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xf359a69f +80003da0: 00052603 lw x12,0(x10) +80003da4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x4f95603d +80003da8: 00052c03 lw x24,0(x10) +80003dac: 00450513 addi x10,x10,4 + +80003db0 : +Zbkb_packh_cg_cmp_rd_rs2_b24: + packh x24, x12, x24 # perform operation +80003db0: 09867c33 packh x24,x12,x24 + # Check if x24 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x24, Zbkb_packh_cg_cmp_rd_rs2_b24, Zbkb_packh_cg_cmp_rd_rs2_b24_str) +80003db4: 00092203 lw x4,0(x18) +80003db8: 01820863 beq x4,x24,80003dc8 +80003dbc: 784012ef jal x5,80005540 +80003dc0: 80003db0 .word 0x80003db0 +80003dc4: 8000f0ce .word 0x8000f0ce +80003dc8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x77026e6a +80003dcc: 00052103 lw x2,0(x10) +80003dd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x94855ff2 +80003dd4: 00052c83 lw x25,0(x10) +80003dd8: 00450513 addi x10,x10,4 + +80003ddc : +Zbkb_packh_cg_cmp_rd_rs2_b25: + packh x25, x2, x25 # perform operation +80003ddc: 09917cb3 packh x25,x2,x25 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zbkb_packh_cg_cmp_rd_rs2_b25, Zbkb_packh_cg_cmp_rd_rs2_b25_str) +80003de0: 00092203 lw x4,0(x18) +80003de4: 01920863 beq x4,x25,80003df4 +80003de8: 758012ef jal x5,80005540 +80003dec: 80003ddc .word 0x80003ddc +80003df0: 8000f107 .word 0x8000f107 +80003df4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xd2870c68 +80003df8: 00052b03 lw x22,0(x10) +80003dfc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xb7ab03ba +80003e00: 00052d03 lw x26,0(x10) +80003e04: 00450513 addi x10,x10,4 + +80003e08 : +Zbkb_packh_cg_cmp_rd_rs2_b26: + packh x26, x22, x26 # perform operation +80003e08: 09ab7d33 packh x26,x22,x26 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zbkb_packh_cg_cmp_rd_rs2_b26, Zbkb_packh_cg_cmp_rd_rs2_b26_str) +80003e0c: 00092203 lw x4,0(x18) +80003e10: 01a20863 beq x4,x26,80003e20 +80003e14: 72c012ef jal x5,80005540 +80003e18: 80003e08 .word 0x80003e08 +80003e1c: 8000f140 .word 0x8000f140 +80003e20: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x62611656 +80003e24: 00052383 lw x7,0(x10) +80003e28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8c520a4c +80003e2c: 00052d83 lw x27,0(x10) +80003e30: 00450513 addi x10,x10,4 + +80003e34 : +Zbkb_packh_cg_cmp_rd_rs2_b27: + packh x27, x7, x27 # perform operation +80003e34: 09b3fdb3 packh x27,x7,x27 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zbkb_packh_cg_cmp_rd_rs2_b27, Zbkb_packh_cg_cmp_rd_rs2_b27_str) +80003e38: 00092203 lw x4,0(x18) +80003e3c: 01b20863 beq x4,x27,80003e4c +80003e40: 700012ef jal x5,80005540 +80003e44: 80003e34 .word 0x80003e34 +80003e48: 8000f179 .word 0x8000f179 +80003e4c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x325fe769 +80003e50: 00052303 lw x6,0(x10) +80003e54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xa4a54e07 +80003e58: 00052e03 lw x28,0(x10) +80003e5c: 00450513 addi x10,x10,4 + +80003e60 : +Zbkb_packh_cg_cmp_rd_rs2_b28: + packh x28, x6, x28 # perform operation +80003e60: 09c37e33 packh x28,x6,x28 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zbkb_packh_cg_cmp_rd_rs2_b28, Zbkb_packh_cg_cmp_rd_rs2_b28_str) +80003e64: 00092203 lw x4,0(x18) +80003e68: 01c20863 beq x4,x28,80003e78 +80003e6c: 6d4012ef jal x5,80005540 +80003e70: 80003e60 .word 0x80003e60 +80003e74: 8000f1b2 .word 0x8000f1b2 +80003e78: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8ca92aa1 +80003e7c: 00052d83 lw x27,0(x10) +80003e80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xbc5dce0a +80003e84: 00052e83 lw x29,0(x10) +80003e88: 00450513 addi x10,x10,4 + +80003e8c : +Zbkb_packh_cg_cmp_rd_rs2_b29: + packh x29, x27, x29 # perform operation +80003e8c: 09ddfeb3 packh x29,x27,x29 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zbkb_packh_cg_cmp_rd_rs2_b29, Zbkb_packh_cg_cmp_rd_rs2_b29_str) +80003e90: 00092203 lw x4,0(x18) +80003e94: 01d20863 beq x4,x29,80003ea4 +80003e98: 6a8012ef jal x5,80005540 +80003e9c: 80003e8c .word 0x80003e8c +80003ea0: 8000f1eb .word 0x8000f1eb +80003ea4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x70a1da27 +80003ea8: 00052183 lw x3,0(x10) +80003eac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x4febfa0e +80003eb0: 00052f03 lw x30,0(x10) +80003eb4: 00450513 addi x10,x10,4 + +80003eb8 : +Zbkb_packh_cg_cmp_rd_rs2_b30: + packh x30, x3, x30 # perform operation +80003eb8: 09e1ff33 packh x30,x3,x30 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zbkb_packh_cg_cmp_rd_rs2_b30, Zbkb_packh_cg_cmp_rd_rs2_b30_str) +80003ebc: 00092203 lw x4,0(x18) +80003ec0: 01e20863 beq x4,x30,80003ed0 +80003ec4: 67c012ef jal x5,80005540 +80003ec8: 80003eb8 .word 0x80003eb8 +80003ecc: 8000f224 .word 0x8000f224 +80003ed0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x979c60b2 +80003ed4: 00052d03 lw x26,0(x10) +80003ed8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xc7299e8f +80003edc: 00052f83 lw x31,0(x10) +80003ee0: 00450513 addi x10,x10,4 + +80003ee4 : +Zbkb_packh_cg_cmp_rd_rs2_b31: + packh x31, x26, x31 # perform operation +80003ee4: 09fd7fb3 packh x31,x26,x31 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_packh_cg_cmp_rd_rs2_b31, Zbkb_packh_cg_cmp_rd_rs2_b31_str) +80003ee8: 00092203 lw x4,0(x18) +80003eec: 01f20863 beq x4,x31,80003efc +80003ef0: 650012ef jal x5,80005540 +80003ef4: 80003ee4 .word 0x80003ee4 +80003ef8: 8000f25d .word 0x8000f25d +80003efc: 00490913 addi x18,x18,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xcc6f4048 +80003f00: 00052003 lw x0,0(x10) +80003f04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xb72257ca +80003f08: 00052003 lw x0,0(x10) +80003f0c: 00450513 addi x10,x10,4 + +80003f10 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b0: + packh x0, x0, x0 # perform operation +80003f10: 08007033 packh x0,x0,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkb_packh_cg_cmp_rd_rs1_rs2_b0, Zbkb_packh_cg_cmp_rd_rs1_rs2_b0_str) +80003f14: 00092203 lw x4,0(x18) +80003f18: 00020863 beq x4,x0,80003f28 +80003f1c: 624012ef jal x5,80005540 +80003f20: 80003f10 .word 0x80003f10 +80003f24: 8000f296 .word 0x8000f296 +80003f28: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x1d710164 +80003f2c: 00052083 lw x1,0(x10) +80003f30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x16bffcad +80003f34: 00052083 lw x1,0(x10) +80003f38: 00450513 addi x10,x10,4 + +80003f3c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b1: + packh x1, x1, x1 # perform operation +80003f3c: 0810f0b3 packh x1,x1,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_packh_cg_cmp_rd_rs1_rs2_b1, Zbkb_packh_cg_cmp_rd_rs1_rs2_b1_str) +80003f40: 00092203 lw x4,0(x18) +80003f44: 00120863 beq x4,x1,80003f54 +80003f48: 5f8012ef jal x5,80005540 +80003f4c: 80003f3c .word 0x80003f3c +80003f50: 8000f2d2 .word 0x8000f2d2 +80003f54: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x724867e2 +80003f58: 00052103 lw x2,0(x10) +80003f5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x52b0af15 +80003f60: 00052103 lw x2,0(x10) +80003f64: 00450513 addi x10,x10,4 + +80003f68 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b2: + packh x2, x2, x2 # perform operation +80003f68: 08217133 packh x2,x2,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_packh_cg_cmp_rd_rs1_rs2_b2, Zbkb_packh_cg_cmp_rd_rs1_rs2_b2_str) +80003f6c: 00092203 lw x4,0(x18) +80003f70: 00220863 beq x4,x2,80003f80 +80003f74: 5cc012ef jal x5,80005540 +80003f78: 80003f68 .word 0x80003f68 +80003f7c: 8000f30e .word 0x8000f30e +80003f80: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x398c8702 +80003f84: 00052183 lw x3,0(x10) +80003f88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x518b37b5 +80003f8c: 00052183 lw x3,0(x10) +80003f90: 00450513 addi x10,x10,4 + +80003f94 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b3: + packh x3, x3, x3 # perform operation +80003f94: 0831f1b3 packh x3,x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_packh_cg_cmp_rd_rs1_rs2_b3, Zbkb_packh_cg_cmp_rd_rs1_rs2_b3_str) +80003f98: 00092203 lw x4,0(x18) +80003f9c: 00320863 beq x4,x3,80003fac +80003fa0: 5a0012ef jal x5,80005540 +80003fa4: 80003f94 .word 0x80003f94 +80003fa8: 8000f34a .word 0x8000f34a +80003fac: 00490913 addi x18,x18,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003fb0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003fb4: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x61ca2822 +80003fb8: 00052203 lw x4,0(x10) +80003fbc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xe36455a6 +80003fc0: 00052203 lw x4,0(x10) +80003fc4: 00450513 addi x10,x10,4 + +80003fc8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b4: + packh x4, x4, x4 # perform operation +80003fc8: 08427233 packh x4,x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_packh_cg_cmp_rd_rs1_rs2_b4, Zbkb_packh_cg_cmp_rd_rs1_rs2_b4_str) +80003fcc: 00092683 lw x13,0(x18) +80003fd0: 00468863 beq x13,x4,80003fe0 +80003fd4: 5ac0176f jal x14,80005580 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 8000f386 .word 0x8000f386 +80003fe0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xbb9f6d55 +80003fe4: 00052283 lw x5,0(x10) +80003fe8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xa6976550 +80003fec: 00052283 lw x5,0(x10) +80003ff0: 00450513 addi x10,x10,4 + +80003ff4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b5: + packh x5, x5, x5 # perform operation +80003ff4: 0852f2b3 packh x5,x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_packh_cg_cmp_rd_rs1_rs2_b5, Zbkb_packh_cg_cmp_rd_rs1_rs2_b5_str) +80003ff8: 00092683 lw x13,0(x18) +80003ffc: 00568863 beq x13,x5,8000400c +80004000: 5800176f jal x14,80005580 +80004004: 80003ff4 .word 0x80003ff4 +80004008: 8000f3c2 .word 0x8000f3c2 +8000400c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7be7828a +80004010: 00052303 lw x6,0(x10) +80004014: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xc8453caf +80004018: 00052303 lw x6,0(x10) +8000401c: 00450513 addi x10,x10,4 + +80004020 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b6: + packh x6, x6, x6 # perform operation +80004020: 08637333 packh x6,x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_packh_cg_cmp_rd_rs1_rs2_b6, Zbkb_packh_cg_cmp_rd_rs1_rs2_b6_str) +80004024: 00092683 lw x13,0(x18) +80004028: 00668863 beq x13,x6,80004038 +8000402c: 5540176f jal x14,80005580 +80004030: 80004020 .word 0x80004020 +80004034: 8000f3fe .word 0x8000f3fe +80004038: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x131cc541 +8000403c: 00052383 lw x7,0(x10) +80004040: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x4bce95af +80004044: 00052383 lw x7,0(x10) +80004048: 00450513 addi x10,x10,4 + +8000404c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b7: + packh x7, x7, x7 # perform operation +8000404c: 0873f3b3 packh x7,x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_packh_cg_cmp_rd_rs1_rs2_b7, Zbkb_packh_cg_cmp_rd_rs1_rs2_b7_str) +80004050: 00092683 lw x13,0(x18) +80004054: 00768863 beq x13,x7,80004064 +80004058: 5280176f jal x14,80005580 +8000405c: 8000404c .word 0x8000404c +80004060: 8000f43a .word 0x8000f43a +80004064: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x7df58536 +80004068: 00052403 lw x8,0(x10) +8000406c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xd60d2561 +80004070: 00052403 lw x8,0(x10) +80004074: 00450513 addi x10,x10,4 + +80004078 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b8: + packh x8, x8, x8 # perform operation +80004078: 08847433 packh x8,x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_packh_cg_cmp_rd_rs1_rs2_b8, Zbkb_packh_cg_cmp_rd_rs1_rs2_b8_str) +8000407c: 00092683 lw x13,0(x18) +80004080: 00868863 beq x13,x8,80004090 +80004084: 4fc0176f jal x14,80005580 +80004088: 80004078 .word 0x80004078 +8000408c: 8000f476 .word 0x8000f476 +80004090: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x54a6015e +80004094: 00052483 lw x9,0(x10) +80004098: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xceae33d2 +8000409c: 00052483 lw x9,0(x10) +800040a0: 00450513 addi x10,x10,4 + +800040a4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b9: + packh x9, x9, x9 # perform operation +800040a4: 0894f4b3 packh x9,x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_packh_cg_cmp_rd_rs1_rs2_b9, Zbkb_packh_cg_cmp_rd_rs1_rs2_b9_str) +800040a8: 00092683 lw x13,0(x18) +800040ac: 00968863 beq x13,x9,800040bc +800040b0: 4d00176f jal x14,80005580 +800040b4: 800040a4 .word 0x800040a4 +800040b8: 8000f4b2 .word 0x8000f4b2 +800040bc: 00490913 addi x18,x18,4 + + mv x21, x10 # switch data pointer register to avoid conflict with test +800040c0: 00050a93 addi x21,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xf927ab71 +800040c4: 000aa503 lw x10,0(x21) +800040c8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xcf004bc1 +800040cc: 000aa503 lw x10,0(x21) +800040d0: 004a8a93 addi x21,x21,4 + +800040d4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b10: + packh x10, x10, x10 # perform operation +800040d4: 08a57533 packh x10,x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_packh_cg_cmp_rd_rs1_rs2_b10, Zbkb_packh_cg_cmp_rd_rs1_rs2_b10_str) +800040d8: 00092683 lw x13,0(x18) +800040dc: 00a68863 beq x13,x10,800040ec +800040e0: 4a00176f jal x14,80005580 +800040e4: 800040d4 .word 0x800040d4 +800040e8: 8000f4ee .word 0x8000f4ee +800040ec: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x783de4fa +800040f0: 000aa583 lw x11,0(x21) +800040f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xa814ec61 +800040f8: 000aa583 lw x11,0(x21) +800040fc: 004a8a93 addi x21,x21,4 + +80004100 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b11: + packh x11, x11, x11 # perform operation +80004100: 08b5f5b3 packh x11,x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_packh_cg_cmp_rd_rs1_rs2_b11, Zbkb_packh_cg_cmp_rd_rs1_rs2_b11_str) +80004104: 00092683 lw x13,0(x18) +80004108: 00b68863 beq x13,x11,80004118 +8000410c: 4740176f jal x14,80005580 +80004110: 80004100 .word 0x80004100 +80004114: 8000f52b .word 0x8000f52b +80004118: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x2905b957 +8000411c: 000aa603 lw x12,0(x21) +80004120: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x0f37696b +80004124: 000aa603 lw x12,0(x21) +80004128: 004a8a93 addi x21,x21,4 + +8000412c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b12: + packh x12, x12, x12 # perform operation +8000412c: 08c67633 packh x12,x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_packh_cg_cmp_rd_rs1_rs2_b12, Zbkb_packh_cg_cmp_rd_rs1_rs2_b12_str) +80004130: 00092683 lw x13,0(x18) +80004134: 00c68863 beq x13,x12,80004144 +80004138: 4480176f jal x14,80005580 +8000413c: 8000412c .word 0x8000412c +80004140: 8000f568 .word 0x8000f568 +80004144: 00490913 addi x18,x18,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80004148: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000414c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x4b21ef8c +80004150: 000aa683 lw x13,0(x21) +80004154: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xd7e51a51 +80004158: 000aa683 lw x13,0(x21) +8000415c: 004a8a93 addi x21,x21,4 + +80004160 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b13: + packh x13, x13, x13 # perform operation +80004160: 08d6f6b3 packh x13,x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkb_packh_cg_cmp_rd_rs1_rs2_b13, Zbkb_packh_cg_cmp_rd_rs1_rs2_b13_str) +80004164: 00092203 lw x4,0(x18) +80004168: 00d20863 beq x4,x13,80004178 +8000416c: 3d4012ef jal x5,80005540 +80004170: 80004160 .word 0x80004160 +80004174: 8000f5a5 .word 0x8000f5a5 +80004178: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x8456091c +8000417c: 000aa703 lw x14,0(x21) +80004180: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x9b0f2e67 +80004184: 000aa703 lw x14,0(x21) +80004188: 004a8a93 addi x21,x21,4 + +8000418c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b14: + packh x14, x14, x14 # perform operation +8000418c: 08e77733 packh x14,x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkb_packh_cg_cmp_rd_rs1_rs2_b14, Zbkb_packh_cg_cmp_rd_rs1_rs2_b14_str) +80004190: 00092203 lw x4,0(x18) +80004194: 00e20863 beq x4,x14,800041a4 +80004198: 3a8012ef jal x5,80005540 +8000419c: 8000418c .word 0x8000418c +800041a0: 8000f5e2 .word 0x8000f5e2 +800041a4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x0e21f85b +800041a8: 000aa783 lw x15,0(x21) +800041ac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x69b8f979 +800041b0: 000aa783 lw x15,0(x21) +800041b4: 004a8a93 addi x21,x21,4 + +800041b8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b15: + packh x15, x15, x15 # perform operation +800041b8: 08f7f7b3 packh x15,x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkb_packh_cg_cmp_rd_rs1_rs2_b15, Zbkb_packh_cg_cmp_rd_rs1_rs2_b15_str) +800041bc: 00092203 lw x4,0(x18) +800041c0: 00f20863 beq x4,x15,800041d0 +800041c4: 37c012ef jal x5,80005540 +800041c8: 800041b8 .word 0x800041b8 +800041cc: 8000f61f .word 0x8000f61f +800041d0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x6beca2cb +800041d4: 000aa803 lw x16,0(x21) +800041d8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xbb141852 +800041dc: 000aa803 lw x16,0(x21) +800041e0: 004a8a93 addi x21,x21,4 + +800041e4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b16: + packh x16, x16, x16 # perform operation +800041e4: 09087833 packh x16,x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_packh_cg_cmp_rd_rs1_rs2_b16, Zbkb_packh_cg_cmp_rd_rs1_rs2_b16_str) +800041e8: 00092203 lw x4,0(x18) +800041ec: 01020863 beq x4,x16,800041fc +800041f0: 350012ef jal x5,80005540 +800041f4: 800041e4 .word 0x800041e4 +800041f8: 8000f65c .word 0x8000f65c +800041fc: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x5aac4e48 +80004200: 000aa883 lw x17,0(x21) +80004204: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xd7ed6708 +80004208: 000aa883 lw x17,0(x21) +8000420c: 004a8a93 addi x21,x21,4 + +80004210 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b17: + packh x17, x17, x17 # perform operation +80004210: 0918f8b3 packh x17,x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkb_packh_cg_cmp_rd_rs1_rs2_b17, Zbkb_packh_cg_cmp_rd_rs1_rs2_b17_str) +80004214: 00092203 lw x4,0(x18) +80004218: 01120863 beq x4,x17,80004228 +8000421c: 324012ef jal x5,80005540 +80004220: 80004210 .word 0x80004210 +80004224: 8000f699 .word 0x8000f699 +80004228: 00490913 addi x18,x18,4 + + mv x12, x18 # switch signature pointer register to avoid conflict with test +8000422c: 00090613 addi x12,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xffb1737c +80004230: 000aa903 lw x18,0(x21) +80004234: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xe16c1565 +80004238: 000aa903 lw x18,0(x21) +8000423c: 004a8a93 addi x21,x21,4 + +80004240 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b18: + packh x18, x18, x18 # perform operation +80004240: 09297933 packh x18,x18,x18 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_packh_cg_cmp_rd_rs1_rs2_b18, Zbkb_packh_cg_cmp_rd_rs1_rs2_b18_str) +80004244: 00062203 lw x4,0(x12) +80004248: 01220863 beq x4,x18,80004258 +8000424c: 2f4012ef jal x5,80005540 +80004250: 80004240 .word 0x80004240 +80004254: 8000f6d6 .word 0x8000f6d6 +80004258: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xd169d5c1 +8000425c: 000aa983 lw x19,0(x21) +80004260: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x80fb038b +80004264: 000aa983 lw x19,0(x21) +80004268: 004a8a93 addi x21,x21,4 + +8000426c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b19: + packh x19, x19, x19 # perform operation +8000426c: 0939f9b3 packh x19,x19,x19 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_packh_cg_cmp_rd_rs1_rs2_b19, Zbkb_packh_cg_cmp_rd_rs1_rs2_b19_str) +80004270: 00062203 lw x4,0(x12) +80004274: 01320863 beq x4,x19,80004284 +80004278: 2c8012ef jal x5,80005540 +8000427c: 8000426c .word 0x8000426c +80004280: 8000f713 .word 0x8000f713 +80004284: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x888656fc +80004288: 000aaa03 lw x20,0(x21) +8000428c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x5aa8fc79 +80004290: 000aaa03 lw x20,0(x21) +80004294: 004a8a93 addi x21,x21,4 + +80004298 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b20: + packh x20, x20, x20 # perform operation +80004298: 094a7a33 packh x20,x20,x20 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_packh_cg_cmp_rd_rs1_rs2_b20, Zbkb_packh_cg_cmp_rd_rs1_rs2_b20_str) +8000429c: 00062203 lw x4,0(x12) +800042a0: 01420863 beq x4,x20,800042b0 +800042a4: 29c012ef jal x5,80005540 +800042a8: 80004298 .word 0x80004298 +800042ac: 8000f750 .word 0x8000f750 +800042b0: 00460613 addi x12,x12,4 + + mv x19, x21 # switch data pointer register to avoid conflict with test +800042b4: 000a8993 addi x19,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0xbbd2ff6a +800042b8: 0009aa83 lw x21,0(x19) +800042bc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x1d581fd0 +800042c0: 0009aa83 lw x21,0(x19) +800042c4: 00498993 addi x19,x19,4 + +800042c8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b21: + packh x21, x21, x21 # perform operation +800042c8: 095afab3 packh x21,x21,x21 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_packh_cg_cmp_rd_rs1_rs2_b21, Zbkb_packh_cg_cmp_rd_rs1_rs2_b21_str) +800042cc: 00062203 lw x4,0(x12) +800042d0: 01520863 beq x4,x21,800042e0 +800042d4: 26c012ef jal x5,80005540 +800042d8: 800042c8 .word 0x800042c8 +800042dc: 8000f78d .word 0x8000f78d +800042e0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x0ae8e1ce +800042e4: 0009ab03 lw x22,0(x19) +800042e8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x5ba4f594 +800042ec: 0009ab03 lw x22,0(x19) +800042f0: 00498993 addi x19,x19,4 + +800042f4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b22: + packh x22, x22, x22 # perform operation +800042f4: 096b7b33 packh x22,x22,x22 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_packh_cg_cmp_rd_rs1_rs2_b22, Zbkb_packh_cg_cmp_rd_rs1_rs2_b22_str) +800042f8: 00062203 lw x4,0(x12) +800042fc: 01620863 beq x4,x22,8000430c +80004300: 240012ef jal x5,80005540 +80004304: 800042f4 .word 0x800042f4 +80004308: 8000f7ca .word 0x8000f7ca +8000430c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x4af60e46 +80004310: 0009ab83 lw x23,0(x19) +80004314: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0xfd3ba550 +80004318: 0009ab83 lw x23,0(x19) +8000431c: 00498993 addi x19,x19,4 + +80004320 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b23: + packh x23, x23, x23 # perform operation +80004320: 097bfbb3 packh x23,x23,x23 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_packh_cg_cmp_rd_rs1_rs2_b23, Zbkb_packh_cg_cmp_rd_rs1_rs2_b23_str) +80004324: 00062203 lw x4,0(x12) +80004328: 01720863 beq x4,x23,80004338 +8000432c: 214012ef jal x5,80005540 +80004330: 80004320 .word 0x80004320 +80004334: 8000f807 .word 0x8000f807 +80004338: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0xae7eac44 +8000433c: 0009ac03 lw x24,0(x19) +80004340: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x27207514 +80004344: 0009ac03 lw x24,0(x19) +80004348: 00498993 addi x19,x19,4 + +8000434c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b24: + packh x24, x24, x24 # perform operation +8000434c: 098c7c33 packh x24,x24,x24 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_packh_cg_cmp_rd_rs1_rs2_b24, Zbkb_packh_cg_cmp_rd_rs1_rs2_b24_str) +80004350: 00062203 lw x4,0(x12) +80004354: 01820863 beq x4,x24,80004364 +80004358: 1e8012ef jal x5,80005540 +8000435c: 8000434c .word 0x8000434c +80004360: 8000f844 .word 0x8000f844 +80004364: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x87b23904 +80004368: 0009ac83 lw x25,0(x19) +8000436c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x1aeea9f9 +80004370: 0009ac83 lw x25,0(x19) +80004374: 00498993 addi x19,x19,4 + +80004378 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b25: + packh x25, x25, x25 # perform operation +80004378: 099cfcb3 packh x25,x25,x25 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_packh_cg_cmp_rd_rs1_rs2_b25, Zbkb_packh_cg_cmp_rd_rs1_rs2_b25_str) +8000437c: 00062203 lw x4,0(x12) +80004380: 01920863 beq x4,x25,80004390 +80004384: 1bc012ef jal x5,80005540 +80004388: 80004378 .word 0x80004378 +8000438c: 8000f881 .word 0x8000f881 +80004390: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xc610f135 +80004394: 0009ad03 lw x26,0(x19) +80004398: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0xc1ba2d19 +8000439c: 0009ad03 lw x26,0(x19) +800043a0: 00498993 addi x19,x19,4 + +800043a4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b26: + packh x26, x26, x26 # perform operation +800043a4: 09ad7d33 packh x26,x26,x26 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_packh_cg_cmp_rd_rs1_rs2_b26, Zbkb_packh_cg_cmp_rd_rs1_rs2_b26_str) +800043a8: 00062203 lw x4,0(x12) +800043ac: 01a20863 beq x4,x26,800043bc +800043b0: 190012ef jal x5,80005540 +800043b4: 800043a4 .word 0x800043a4 +800043b8: 8000f8be .word 0x8000f8be +800043bc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x13227ecc +800043c0: 0009ad83 lw x27,0(x19) +800043c4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xbc865443 +800043c8: 0009ad83 lw x27,0(x19) +800043cc: 00498993 addi x19,x19,4 + +800043d0 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b27: + packh x27, x27, x27 # perform operation +800043d0: 09bdfdb3 packh x27,x27,x27 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_packh_cg_cmp_rd_rs1_rs2_b27, Zbkb_packh_cg_cmp_rd_rs1_rs2_b27_str) +800043d4: 00062203 lw x4,0(x12) +800043d8: 01b20863 beq x4,x27,800043e8 +800043dc: 164012ef jal x5,80005540 +800043e0: 800043d0 .word 0x800043d0 +800043e4: 8000f8fb .word 0x8000f8fb +800043e8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x18091a34 +800043ec: 0009ae03 lw x28,0(x19) +800043f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0xf9914de7 +800043f4: 0009ae03 lw x28,0(x19) +800043f8: 00498993 addi x19,x19,4 + +800043fc : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b28: + packh x28, x28, x28 # perform operation +800043fc: 09ce7e33 packh x28,x28,x28 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_packh_cg_cmp_rd_rs1_rs2_b28, Zbkb_packh_cg_cmp_rd_rs1_rs2_b28_str) +80004400: 00062203 lw x4,0(x12) +80004404: 01c20863 beq x4,x28,80004414 +80004408: 138012ef jal x5,80005540 +8000440c: 800043fc .word 0x800043fc +80004410: 8000f938 .word 0x8000f938 +80004414: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xae48e192 +80004418: 0009ae83 lw x29,0(x19) +8000441c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x5250308f +80004420: 0009ae83 lw x29,0(x19) +80004424: 00498993 addi x19,x19,4 + +80004428 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b29: + packh x29, x29, x29 # perform operation +80004428: 09defeb3 packh x29,x29,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_packh_cg_cmp_rd_rs1_rs2_b29, Zbkb_packh_cg_cmp_rd_rs1_rs2_b29_str) +8000442c: 00062203 lw x4,0(x12) +80004430: 01d20863 beq x4,x29,80004440 +80004434: 10c012ef jal x5,80005540 +80004438: 80004428 .word 0x80004428 +8000443c: 8000f975 .word 0x8000f975 +80004440: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xb3a6e0b3 +80004444: 0009af03 lw x30,0(x19) +80004448: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x2b024e9b +8000444c: 0009af03 lw x30,0(x19) +80004450: 00498993 addi x19,x19,4 + +80004454 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b30: + packh x30, x30, x30 # perform operation +80004454: 09ef7f33 packh x30,x30,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_packh_cg_cmp_rd_rs1_rs2_b30, Zbkb_packh_cg_cmp_rd_rs1_rs2_b30_str) +80004458: 00062203 lw x4,0(x12) +8000445c: 01e20863 beq x4,x30,8000446c +80004460: 0e0012ef jal x5,80005540 +80004464: 80004454 .word 0x80004454 +80004468: 8000f9b2 .word 0x8000f9b2 +8000446c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x76554f95 +80004470: 0009af83 lw x31,0(x19) +80004474: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x0ff72953 +80004478: 0009af83 lw x31,0(x19) +8000447c: 00498993 addi x19,x19,4 + +80004480 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b31: + packh x31, x31, x31 # perform operation +80004480: 09ffffb3 packh x31,x31,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_packh_cg_cmp_rd_rs1_rs2_b31, Zbkb_packh_cg_cmp_rd_rs1_rs2_b31_str) +80004484: 00062203 lw x4,0(x12) +80004488: 01f20863 beq x4,x31,80004498 +8000448c: 0b4012ef jal x5,80005540 +80004490: 80004480 .word 0x80004480 +80004494: 8000f9ef .word 0x8000f9ef +80004498: 00460613 addi x12,x12,4 + + mv x2, x12 # restore signature pointer to default register for teardown +8000449c: 00060113 addi x2,x12,0 + +800044a0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +800044a0: 00000513 addi x10,x0,0 +800044a4: 00000073 ecall +800044a8: fff00513 addi x10,x0,-1 +800044ac: 1d800413 addi x8,x0,472 + +800044b0 : +800044b0: 34002373 csrrs x6,mscratch,x0 + +800044b4 : +800044b4: 23832383 lw x7,568(x6) +800044b8: 23c32483 lw x9,572(x6) + +800044bc : +800044bc: 22032383 lw x7,544(x6) + +800044c0 : +800044c0: 25032483 lw x9,592(x6) +800044c4: 34049073 csrrw x0,mscratch,x9 + +800044c8 : +800044c8: 24832483 lw x9,584(x6) +800044cc: 305493f3 csrrw x7,mtvec,x9 +800044d0: ffc4f493 andi x9,x9,-4 +800044d4: ffc3f393 andi x7,x7,-4 +800044d8: 00749e63 bne x9,x7,800044f4 + +800044dc : +800044dc: 00030493 addi x9,x6,0 + +800044e0 : +800044e0: 0004a783 lw x15,0(x9) +800044e4: 00f3a023 sw x15,0(x7) +800044e8: 00438393 addi x7,x7,4 +800044ec: 00448493 addi x9,x9,4 +800044f0: fe83c8e3 blt x7,x8,800044e0 +800044f4: 0000100f fence.i + +800044f8 : +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 00000497 auipc x9,0x0 +80004504: 29048493 addi x9,x9,656 # 80004790 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 10e49863 bne x9,x14,80004630 +80004524: 00000013 addi x0,x0,0 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000c517 auipc x10,0xc +80004544: b6f50513 addi x10,x10,-1169 # 800100af +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001d097 auipc x1,0x1d +80004564: 004080e7 jalr x1,4(x1) # 80021564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000c517 auipc x10,0xc +80004584: b6950513 addi x10,x10,-1175 # 800100e9 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001d097 auipc x1,0x1d +800045a4: fc4080e7 jalr x1,-60(x1) # 80021564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000c517 auipc x10,0xc +800045c4: b8950513 addi x10,x10,-1143 # 80010149 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001d097 auipc x1,0x1d +800045e4: f84080e7 jalr x1,-124(x1) # 80021564 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0000c517 auipc x10,0xc +80004604: 6f450513 addi x10,x10,1780 # 80010cf4 +80004608: 00000013 addi x0,x0,0 +8000460c: 00000013 addi x0,x0,0 +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 0001d097 auipc x1,0x1d +80004624: f44080e7 jalr x1,-188(x1) # 80021564 +80004628: 0001d097 auipc x1,0x1d +8000462c: f9c080e7 jalr x1,-100(x1) # 800215c4 + +80004630 : +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00004317 auipc x6,0x4 +80004644: ce830313 addi x6,x6,-792 # 80008328 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 00032303 lw x6,0(x6) +80004664: 00000013 addi x0,x0,0 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 0000d397 auipc x7,0xd +80004684: 74838393 addi x7,x7,1864 # 80011dc8 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 40730333 sub x6,x6,x7 +800046a4: 00000013 addi x0,x0,0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 0000d417 auipc x8,0xd +800046c4: 70040413 addi x8,x8,1792 # 80011dc0 +800046c8: 00000013 addi x0,x0,0 +800046cc: 00000013 addi x0,x0,0 +800046d0: 00000013 addi x0,x0,0 +800046d4: 00000013 addi x0,x0,0 +800046d8: 00000013 addi x0,x0,0 +800046dc: 00000013 addi x0,x0,0 +800046e0: 00042203 lw x4,0(x8) +800046e4: 00620863 beq x4,x6,800046f4 +800046e8: 6c1003ef jal x7,800055a8 +800046ec: 80004630 .word 0x80004630 +800046f0: 8001029d .word 0x8001029d + +800046f4 : +800046f4: bad0e4b7 lui x9,0xbad0e +800046f8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046fc: 00e49a63 bne x9,x14,80004710 +80004700: 6a9003ef jal x7,800055a8 +80004704: 800047c4 .word 0x800047c4 +80004708: 8001010b .word 0x8001010b +8000470c: 00000341 .word 0x00000341 + +80004710 : +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0000c517 auipc x10,0xc +80004724: 95450513 addi x10,x10,-1708 # 80010074 +80004728: 00000013 addi x0,x0,0 +8000472c: 00000013 addi x0,x0,0 +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0001d097 auipc x1,0x1d +80004744: e24080e7 jalr x1,-476(x1) # 80021564 +80004748: 0001d097 auipc x1,0x1d +8000474c: e5c080e7 jalr x1,-420(x1) # 800215a4 + +80004750 : +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0000c517 auipc x10,0xc +80004764: 94f50513 addi x10,x10,-1713 # 800100af +80004768: 00000013 addi x0,x0,0 +8000476c: 00000013 addi x0,x0,0 +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 0001d097 auipc x1,0x1d +80004784: de4080e7 jalr x1,-540(x1) # 80021564 +80004788: 0001d097 auipc x1,0x1d +8000478c: e3c080e7 jalr x1,-452(x1) # 800215c4 + +80004790 : +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: 00000717 auipc x14,0x0 +800047a4: ff070713 addi x14,x14,-16 # 80004790 +800047a8: 00000013 addi x0,x0,0 +800047ac: 00000013 addi x0,x0,0 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 +800047c0: ce1ff06f jal x0,800044a0 + +800047c4 : +800047c4: bad0e737 lui x14,0xbad0e +800047c8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047cc: cd5ff06f jal x0,800044a0 +800047d0: 00000013 addi x0,x0,0 +800047d4: 00000013 addi x0,x0,0 +800047d8: 00000013 addi x0,x0,0 +800047dc: 00000013 addi x0,x0,0 +800047e0: 00000013 addi x0,x0,0 +800047e4: 00000013 addi x0,x0,0 +800047e8: 00000013 addi x0,x0,0 +800047ec: 00000013 addi x0,x0,0 +800047f0: 00000013 addi x0,x0,0 +800047f4: 00000013 addi x0,x0,0 +800047f8: 00000013 addi x0,x0,0 +800047fc: 00000013 addi x0,x0,0 + +80004800 : +80004800: 0800006f jal x0,80004880 +80004804: 0880006f jal x0,8000488c +80004808: 0900006f jal x0,80004898 +8000480c: 0980006f jal x0,800048a4 +80004810: 0a00006f jal x0,800048b0 +80004814: 0a80006f jal x0,800048bc +80004818: 0b00006f jal x0,800048c8 +8000481c: 0b80006f jal x0,800048d4 +80004820: 0c00006f jal x0,800048e0 +80004824: 0c80006f jal x0,800048ec +80004828: 0d00006f jal x0,800048f8 +8000482c: 0d80006f jal x0,80004904 +80004830: 0e00006f jal x0,80004910 +80004834: 0e80006f jal x0,8000491c +80004838: 0f00006f jal x0,80004928 +8000483c: 0f80006f jal x0,80004934 +80004840: 1000006f jal x0,80004940 +80004844: 1080006f jal x0,8000494c +80004848: 1100006f jal x0,80004958 +8000484c: 1180006f jal x0,80004964 +80004850: 1200006f jal x0,80004970 +80004854: 1280006f jal x0,8000497c +80004858: 1300006f jal x0,80004988 +8000485c: 1380006f jal x0,80004994 +80004860: 1400006f jal x0,800049a0 +80004864: 13c0006f jal x0,800049a0 +80004868: 1380006f jal x0,800049a0 +8000486c: 1340006f jal x0,800049a0 +80004870: 1300006f jal x0,800049a0 +80004874: 12c0006f jal x0,800049a0 +80004878: 1280006f jal x0,800049a0 +8000487c: 1240006f jal x0,800049a0 + +80004880 : +80004880: 34011173 csrrw x2,mscratch,x2 +80004884: 26f12823 sw x15,624(x2) +80004888: 13c007ef jal x15,800049c4 +8000488c: 34011173 csrrw x2,mscratch,x2 +80004890: 26f12823 sw x15,624(x2) +80004894: 130007ef jal x15,800049c4 +80004898: 34011173 csrrw x2,mscratch,x2 +8000489c: 26f12823 sw x15,624(x2) +800048a0: 124007ef jal x15,800049c4 +800048a4: 34011173 csrrw x2,mscratch,x2 +800048a8: 26f12823 sw x15,624(x2) +800048ac: 118007ef jal x15,800049c4 +800048b0: 34011173 csrrw x2,mscratch,x2 +800048b4: 26f12823 sw x15,624(x2) +800048b8: 10c007ef jal x15,800049c4 +800048bc: 34011173 csrrw x2,mscratch,x2 +800048c0: 26f12823 sw x15,624(x2) +800048c4: 100007ef jal x15,800049c4 +800048c8: 34011173 csrrw x2,mscratch,x2 +800048cc: 26f12823 sw x15,624(x2) +800048d0: 0f4007ef jal x15,800049c4 +800048d4: 34011173 csrrw x2,mscratch,x2 +800048d8: 26f12823 sw x15,624(x2) +800048dc: 0e8007ef jal x15,800049c4 +800048e0: 34011173 csrrw x2,mscratch,x2 +800048e4: 26f12823 sw x15,624(x2) +800048e8: 0dc007ef jal x15,800049c4 +800048ec: 34011173 csrrw x2,mscratch,x2 +800048f0: 26f12823 sw x15,624(x2) +800048f4: 0d0007ef jal x15,800049c4 +800048f8: 34011173 csrrw x2,mscratch,x2 +800048fc: 26f12823 sw x15,624(x2) +80004900: 0c4007ef jal x15,800049c4 +80004904: 34011173 csrrw x2,mscratch,x2 +80004908: 26f12823 sw x15,624(x2) +8000490c: 0b8007ef jal x15,800049c4 +80004910: 34011173 csrrw x2,mscratch,x2 +80004914: 26f12823 sw x15,624(x2) +80004918: 0ac007ef jal x15,800049c4 +8000491c: 34011173 csrrw x2,mscratch,x2 +80004920: 26f12823 sw x15,624(x2) +80004924: 0a0007ef jal x15,800049c4 +80004928: 34011173 csrrw x2,mscratch,x2 +8000492c: 26f12823 sw x15,624(x2) +80004930: 094007ef jal x15,800049c4 +80004934: 34011173 csrrw x2,mscratch,x2 +80004938: 26f12823 sw x15,624(x2) +8000493c: 088007ef jal x15,800049c4 +80004940: 34011173 csrrw x2,mscratch,x2 +80004944: 26f12823 sw x15,624(x2) +80004948: 07c007ef jal x15,800049c4 +8000494c: 34011173 csrrw x2,mscratch,x2 +80004950: 26f12823 sw x15,624(x2) +80004954: 070007ef jal x15,800049c4 +80004958: 34011173 csrrw x2,mscratch,x2 +8000495c: 26f12823 sw x15,624(x2) +80004960: 064007ef jal x15,800049c4 +80004964: 34011173 csrrw x2,mscratch,x2 +80004968: 26f12823 sw x15,624(x2) +8000496c: 058007ef jal x15,800049c4 +80004970: 34011173 csrrw x2,mscratch,x2 +80004974: 26f12823 sw x15,624(x2) +80004978: 04c007ef jal x15,800049c4 +8000497c: 34011173 csrrw x2,mscratch,x2 +80004980: 26f12823 sw x15,624(x2) +80004984: 040007ef jal x15,800049c4 +80004988: 34011173 csrrw x2,mscratch,x2 +8000498c: 26f12823 sw x15,624(x2) +80004990: 034007ef jal x15,800049c4 +80004994: 34011173 csrrw x2,mscratch,x2 +80004998: 26f12823 sw x15,624(x2) +8000499c: 028007ef jal x15,800049c4 + +800049a0 : +800049a0: 00000317 auipc x6,0x0 +800049a4: b5830313 addi x6,x6,-1192 # 800044f8 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00030067 jalr x0,0(x6) + +800049c4 : +800049c4: 26e12623 sw x14,620(x2) +800049c8: 34011773 csrrw x14,mscratch,x2 +800049cc: 26e12a23 sw x14,628(x2) +800049d0: 23012703 lw x14,560(x2) +800049d4: 00070067 jalr x0,0(x14) + +800049d8 : +800049d8: 26912423 sw x9,616(x2) +800049dc: 26812223 sw x8,612(x2) +800049e0: 26712023 sw x7,608(x2) +800049e4: 24612e23 sw x6,604(x2) +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 00003317 auipc x6,0x3 +80004a04: 70830313 addi x6,x6,1800 # 80008108 +80004a08: 00000013 addi x0,x0,0 +80004a0c: 00000013 addi x0,x0,0 +80004a10: 00000013 addi x0,x0,0 +80004a14: 00000013 addi x0,x0,0 +80004a18: 00000013 addi x0,x0,0 +80004a1c: 00000013 addi x0,x0,0 +80004a20: 00032383 lw x7,0(x6) +80004a24: 00138393 addi x7,x7,1 +80004a28: 00732023 sw x7,0(x6) +80004a2c: 34202773 csrrs x14,mcause,x0 + +80004a30 : +80004a30: 800014b7 lui x9,0x80001 +80004a34: fff48493 addi x9,x9,-1 # 80000fff +80004a38: 00e4f4b3 and x9,x9,x14 + +80004a3c : +80004a3c: ffe48413 addi x8,x9,-2 +80004a40: 00041663 bne x8,x0,80004a4c + +80004a44 : +80004a44: 280506e3 beq x10,x0,800054d0 +80004a48: 58c0006f jal x0,80004fd4 + +80004a4c : +80004a4c: ff848413 addi x8,x9,-8 +80004a50: 00245413 srli x8,x8,0x2 +80004a54: 58041063 bne x8,x0,80004fd4 + +80004a58 : +80004a58: 26050ce3 beq x10,x0,800054d0 + +80004a5c : +80004a5c: fff50493 addi x9,x10,-1 +80004a60: 00500393 addi x7,x0,5 +80004a64: 0274e063 bltu x9,x7,80004a84 +80004a68: 07300393 addi x7,x0,115 +80004a6c: 00750463 beq x10,x7,80004a74 +80004a70: 0800006f jal x0,80004af0 + +80004a74 : +80004a74: 34102573 csrrs x10,mepc,x0 +80004a78: 00450413 addi x8,x10,4 +80004a7c: 34141073 csrrw x0,mepc,x8 +80004a80: 7c00006f jal x0,80005240 + +80004a84 : +80004a84: 341024f3 csrrs x9,mepc,x0 +80004a88: 00448493 addi x9,x9,4 +80004a8c: 34149073 csrrw x0,mepc,x9 +80004a90: 00100393 addi x7,x0,1 +80004a94: 00750e63 beq x10,x7,80004ab0 +80004a98: 00200393 addi x7,x0,2 +80004a9c: 02750263 beq x10,x7,80004ac0 +80004aa0: 00300393 addi x7,x0,3 +80004aa4: 02750c63 beq x10,x7,80004adc +80004aa8: fff00513 addi x10,x0,-1 +80004aac: 7940006f jal x0,80005240 + +80004ab0 : +80004ab0: 000024b7 lui x9,0x2 +80004ab4: 80048493 addi x9,x9,-2048 # 1800 +80004ab8: 3004a073 csrrs x0,mstatus,x9 +80004abc: 7840006f jal x0,80005240 + +80004ac0 : +80004ac0: 000024b7 lui x9,0x2 +80004ac4: 80048493 addi x9,x9,-2048 # 1800 +80004ac8: 3004b073 csrrc x0,mstatus,x9 +80004acc: 000014b7 lui x9,0x1 +80004ad0: 80048493 addi x9,x9,-2048 # 800 +80004ad4: 3004a073 csrrs x0,mstatus,x9 +80004ad8: 7680006f jal x0,80005240 + +80004adc : +80004adc: 000024b7 lui x9,0x2 +80004ae0: 80048493 addi x9,x9,-2048 # 1800 +80004ae4: 3004b073 csrrc x0,mstatus,x9 +80004ae8: 7580006f jal x0,80005240 + +80004aec : +80004aec: 00000013 addi x0,x0,0 + +80004af0 : +80004af0: 00000013 addi x0,x0,0 +80004af4: 00000013 addi x0,x0,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000397 auipc x7,0x0 +80004b04: 17038393 addi x7,x7,368 # 80004c70 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 + +80004b20 : +80004b20: 0003a403 lw x8,0(x7) +80004b24: 00a40863 beq x8,x10,80004b34 +80004b28: 04040863 beq x8,x0,80004b78 +80004b2c: 00838393 addi x7,x7,8 +80004b30: ff1ff06f jal x0,80004b20 + +80004b34 : +80004b34: 00008493 addi x9,x1,0 +80004b38: 00000013 addi x0,x0,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 00000097 auipc x1,0x0 +80004b44: 02408093 addi x1,x1,36 # 80004b64 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 00038067 jalr x0,0(x7) + +80004b64 : +80004b64: 00048093 addi x1,x9,0 +80004b68: 34102473 csrrs x8,mepc,x0 +80004b6c: 00440413 addi x8,x8,4 +80004b70: 34141073 csrrw x0,mepc,x8 +80004b74: 6cc0006f jal x0,80005240 + +80004b78 : +80004b78: 00050493 addi x9,x10,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000d517 auipc x10,0xd +80004b84: bab50513 addi x10,x10,-1109 # 8001172b +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00048513 addi x10,x9,0 +80004bac: 02000593 addi x11,x0,32 +80004bb0: 4a8020ef jal x1,80007058 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: fd850513 addi x10,x10,-40 # 8000fb98 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 5b250513 addi x10,x10,1458 # 800101b2 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 00000013 addi x0,x0,0 +80004c2c: 00000013 addi x0,x0,0 +80004c30: 00000013 addi x0,x0,0 +80004c34: 00000013 addi x0,x0,0 +80004c38: 00000013 addi x0,x0,0 +80004c3c: 00000013 addi x0,x0,0 +80004c40: 0000b517 auipc x10,0xb +80004c44: 46f50513 addi x10,x10,1135 # 800100af +80004c48: 00000013 addi x0,x0,0 +80004c4c: 00000013 addi x0,x0,0 +80004c50: 00000013 addi x0,x0,0 +80004c54: 00000013 addi x0,x0,0 +80004c58: 00000013 addi x0,x0,0 +80004c5c: 00000013 addi x0,x0,0 +80004c60: 0001d097 auipc x1,0x1d +80004c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80004c68: 0001d097 auipc x1,0x1d +80004c6c: 95c080e7 jalr x1,-1700(x1) # 800215c4 + +80004c70 : +80004c70: 30002573 .word 0x30002573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30059073 .word 0x30059073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3005a073 .word 0x3005a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3005b073 .word 0x3005b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30402573 .word 0x30402573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30459073 .word 0x30459073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 3045a073 .word 0x3045a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 3045b073 .word 0x3045b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 30602573 .word 0x30602573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 30659073 .word 0x30659073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3065a073 .word 0x3065a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3065b073 .word 0x3065b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 30a02573 .word 0x30a02573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 30a59073 .word 0x30a59073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 30a5a073 .word 0x30a5a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 30a5b073 .word 0x30a5b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 34402573 .word 0x34402573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 34459073 .word 0x34459073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3445a073 .word 0x3445a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3445b073 .word 0x3445b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: 74702573 .word 0x74702573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: 74759073 .word 0x74759073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: 7475a073 .word 0x7475a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: 7475b073 .word 0x7475b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: 32002573 .word 0x32002573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: 32059073 .word 0x32059073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: 3205a073 .word 0x3205a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: 3205b073 .word 0x3205b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: b0002573 .word 0xb0002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: b0059073 .word 0xb0059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: b005a073 .word 0xb005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: b005b073 .word 0xb005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: b0202573 .word 0xb0202573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: b0259073 .word 0xb0259073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: b025a073 .word 0xb025a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: b025b073 .word 0xb025b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10002573 .word 0x10002573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10059073 .word 0x10059073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1005a073 .word 0x1005a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1005b073 .word 0x1005b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10402573 .word 0x10402573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10459073 .word 0x10459073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 1045a073 .word 0x1045a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 1045b073 .word 0x1045b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 10602573 .word 0x10602573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 10659073 .word 0x10659073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1065a073 .word 0x1065a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1065b073 .word 0x1065b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 10a02573 .word 0x10a02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 10a59073 .word 0x10a59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 10a5a073 .word 0x10a5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 10a5b073 .word 0x10a5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 14402573 .word 0x14402573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 14459073 .word 0x14459073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1445a073 .word 0x1445a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1445b073 .word 0x1445b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 14d02573 .word 0x14d02573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 14d59073 .word 0x14d59073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 14d5a073 .word 0x14d5a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 14d5b073 .word 0x14d5b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 18002573 .word 0x18002573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 18059073 .word 0x18059073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 1805a073 .word 0x1805a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 1805b073 .word 0x1805b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a002573 .word 0x7a002573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a059073 .word 0x7a059073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a05a073 .word 0x7a05a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a05b073 .word 0x7a05b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a102573 .word 0x7a102573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a159073 .word 0x7a159073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a15a073 .word 0x7a15a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a15b073 .word 0x7a15b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a202573 .word 0x7a202573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a259073 .word 0x7a259073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a25a073 .word 0x7a25a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a25b073 .word 0x7a25b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a302573 .word 0x7a302573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a359073 .word 0x7a359073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a35a073 .word 0x7a35a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a35b073 .word 0x7a35b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a402573 .word 0x7a402573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a459073 .word 0x7a459073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a45a073 .word 0x7a45a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a45b073 .word 0x7a45b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7a502573 .word 0x7a502573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7a559073 .word 0x7a559073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7a55a073 .word 0x7a55a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7a55b073 .word 0x7a55b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 7a802573 .word 0x7a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 7a859073 .word 0x7a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 7a85a073 .word 0x7a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 7a85b073 .word 0x7a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 7aa02573 .word 0x7aa02573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 7aa59073 .word 0x7aa59073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 7aa5a073 .word 0x7aa5a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 7aa5b073 .word 0x7aa5b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 5a802573 .word 0x5a802573 +80004f74: 00008067 jalr x0,0(x1) +80004f78: 5a859073 .word 0x5a859073 +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 5a85a073 .word 0x5a85a073 +80004f84: 00008067 jalr x0,0(x1) +80004f88: 5a85b073 .word 0x5a85b073 +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 6a802573 .word 0x6a802573 +80004f94: 00008067 jalr x0,0(x1) +80004f98: 6a859073 .word 0x6a859073 +80004f9c: 00008067 jalr x0,0(x1) +80004fa0: 6a85a073 .word 0x6a85a073 +80004fa4: 00008067 jalr x0,0(x1) +80004fa8: 6a85b073 .word 0x6a85b073 +80004fac: 00008067 jalr x0,0(x1) +80004fb0: 0005a503 lw x10,0(x11) +80004fb4: 00008067 jalr x0,0(x1) +80004fb8: 0045a503 lw x10,4(x11) +80004fbc: 00008067 jalr x0,0(x1) +80004fc0: 00c5a023 sw x12,0(x11) +80004fc4: 00008067 jalr x0,0(x1) +80004fc8: 00c5a223 sw x12,4(x11) +80004fcc: 00008067 jalr x0,0(x1) +80004fd0: 00000000 .word 0x00000000 + +80004fd4 : +80004fd4: 01000393 addi x7,x0,16 +80004fd8: 00075c63 bge x14,x0,80004ff0 + +80004fdc : +80004fdc: 00171413 slli x8,x14,0x1 +80004fe0: ff240413 addi x8,x8,-14 +80004fe4: 00045663 bge x8,x0,80004ff0 +80004fe8: 00c00393 addi x7,x0,12 +80004fec: 0040006f jal x0,80004ff0 + +80004ff0 : +80004ff0: d6810113 addi x2,x2,-664 +80004ff4: 4b012303 lw x6,1200(x2) +80004ff8: 007304b3 add x9,x6,x7 +80004ffc: 4a912823 sw x9,1200(x2) +80005000: 49012403 lw x8,1168(x2) +80005004: 40830333 sub x6,x6,x8 +80005008: 29810113 addi x2,x2,664 +8000500c: 1f812403 lw x8,504(x2) +80005010: 00830333 add x6,x6,x8 +80005014: 34102473 csrrs x8,mepc,x0 +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0000b497 auipc x9,0xb +80005024: b5848493 addi x9,x9,-1192 # 8000fb78 +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 0084a023 sw x8,0(x9) +80005044: 00e4a423 sw x14,8(x9) +80005048: 34302473 csrrs x8,mtval,x0 +8000504c: 0084a823 sw x8,16(x9) +80005050: 30002473 csrrs x8,mstatus,x0 +80005054: 0084ac23 sw x8,24(x9) +80005058: 00000013 addi x0,x0,0 +8000505c: 00000013 addi x0,x0,0 +80005060: 0001b417 auipc x8,0x1b +80005064: 7cc40413 addi x8,x8,1996 # 8002082c +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 007304b3 add x9,x6,x7 +80005084: f0946663 bltu x8,x9,80004790 + +80005088 : +80005088: 24012403 lw x8,576(x2) +8000508c: 408787b3 sub x15,x15,x8 +80005090: 00179493 slli x9,x15,0x1 +80005094: 009787b3 add x15,x15,x9 +80005098: 0057d793 srli x15,x15,0x5 +8000509c: 00679793 slli x15,x15,0x6 +800050a0: 0077e7b3 or x15,x15,x7 +800050a4: 00378793 addi x15,x15,3 +800050a8: 02075a63 bge x14,x0,800050dc +800050ac: 00f00413 addi x8,x0,15 +800050b0: 00877433 and x8,x14,x8 +800050b4: 304024f3 csrrs x9,mie,x0 +800050b8: 0084d4b3 srl x9,x9,x8 +800050bc: 0014f493 andi x9,x9,1 +800050c0: 00b49493 slli x9,x9,0xb +800050c4: 0097e7b3 or x15,x15,x9 +800050c8: 344024f3 csrrs x9,mip,x0 +800050cc: 0084d4b3 srl x9,x9,x8 +800050d0: 0014f493 andi x9,x9,1 +800050d4: 00c49493 slli x9,x9,0xc +800050d8: 0097e7b3 or x15,x15,x9 +800050dc: 300023f3 csrrs x7,mstatus,x0 +800050e0: 00f39393 slli x7,x7,0xf +800050e4: 0023d393 srli x7,x7,0x2 +800050e8: 0021a437 lui x8,0x21a +800050ec: fe540413 addi x8,x8,-27 # 219fe5 +800050f0: fff44413 xori x8,x8,-1 +800050f4: 0083f433 and x8,x7,x8 +800050f8: 0087e433 or x8,x15,x8 +800050fc: 310024f3 csrrs x9,0x310,x0 +80005100: 1c04f493 andi x9,x9,448 +80005104: 00849493 slli x9,x9,0x8 +80005108: 00946433 or x8,x8,x9 +8000510c: 00032483 lw x9,0(x6) +80005110: 00848e63 beq x9,x8,8000512c +80005114: 00040313 addi x6,x8,0 +80005118: 00048213 addi x4,x9,0 +8000511c: 48c003ef jal x7,800055a8 +80005120: 80005088 .word 0x80005088 +80005124: 800102b4 .word 0x800102b4 +80005128: 00000341 .word 0x00000341 + +8000512c : +8000512c: 00070413 addi x8,x14,0 +80005130: 00432483 lw x9,4(x6) +80005134: 00848e63 beq x9,x8,80005150 +80005138: 00040313 addi x6,x8,0 +8000513c: 00048213 addi x4,x9,0 +80005140: 468003ef jal x7,800055a8 +80005144: 8000512c .word 0x8000512c +80005148: 800103b6 .word 0x800103b6 +8000514c: 00000341 .word 0x00000341 +80005150: 10074863 blt x14,x0,80005260 + +80005154 : +80005154: 34102473 csrrs x8,mepc,x0 +80005158: 00010493 addi x9,x2,0 +8000515c: 0040006f jal x0,80005160 + +80005160 : +80005160: 08000393 addi x7,x0,128 +80005164: 04740863 beq x8,x7,800051b4 +80005168: 00238393 addi x7,x7,2 +8000516c: 04740463 beq x8,x7,800051b4 +80005170: 04040263 beq x8,x0,800051b4 +80005174: 2084a383 lw x7,520(x9) +80005178: 2104a783 lw x15,528(x9) +8000517c: 007787b3 add x15,x15,x7 +80005180: 00f47463 bgeu x8,x15,80005188 +80005184: 02747663 bgeu x8,x7,800051b0 + +80005188 : +80005188: 1d84a383 lw x7,472(x9) +8000518c: 1e04a783 lw x15,480(x9) +80005190: 007787b3 add x15,x15,x7 +80005194: 00f47463 bgeu x8,x15,8000519c +80005198: 00747c63 bgeu x8,x7,800051b0 + +8000519c : +8000519c: 1e84a383 lw x7,488(x9) +800051a0: 1f04a783 lw x15,496(x9) +800051a4: 007787b3 add x15,x15,x7 +800051a8: e0f47e63 bgeu x8,x15,800047c4 +800051ac: e0746c63 bltu x8,x7,800047c4 + +800051b0 : +800051b0: 40740433 sub x8,x8,x7 + +800051b4 : +800051b4: 00832483 lw x9,8(x6) +800051b8: 00848e63 beq x9,x8,800051d4 +800051bc: 00040313 addi x6,x8,0 +800051c0: 00048213 addi x4,x9,0 +800051c4: 3e4003ef jal x7,800055a8 +800051c8: 800051b4 .word 0x800051b4 +800051cc: 800104b1 .word 0x800104b1 +800051d0: 00000341 .word 0x00000341 + +800051d4 : +800051d4: 34102473 csrrs x8,mepc,x0 +800051d8: 342023f3 csrrs x7,mcause,x0 +800051dc: 00c00793 addi x15,x0,12 +800051e0: 00f38a63 beq x7,x15,800051f4 +800051e4: 00100793 addi x15,x0,1 +800051e8: 00f38663 beq x7,x15,800051f4 +800051ec: 01400793 addi x15,x0,20 +800051f0: 00f39663 bne x7,x15,800051fc +800051f4: 34109073 csrrw x0,mepc,x1 +800051f8: 0100006f jal x0,80005208 + +800051fc : +800051fc: 00400393 addi x7,x0,4 +80005200: 00740433 add x8,x8,x7 +80005204: 34141073 csrrw x0,mepc,x8 + +80005208 : +80005208: 34302473 csrrs x8,mtval,x0 + +8000520c : +8000520c: 00c32483 lw x9,12(x6) +80005210: 00848e63 beq x9,x8,8000522c +80005214: 00040313 addi x6,x8,0 +80005218: 00048213 addi x4,x9,0 +8000521c: 38c003ef jal x7,800055a8 +80005220: 8000520c .word 0x8000520c +80005224: 800105a4 .word 0x800105a4 +80005228: 00000341 .word 0x00000341 + +8000522c : +8000522c: 30102473 csrrs x8,misa,x0 +80005230: 01841413 slli x8,x8,0x18 +80005234: 00045263 bge x8,x0,80005238 + +80005238 : +80005238: 10000393 addi x7,x0,256 +8000523c: 05c0006f jal x0,80005298 + +80005240 : +80005240: 25c12303 lw x6,604(x2) +80005244: 26012383 lw x7,608(x2) +80005248: 26412403 lw x8,612(x2) +8000524c: 26812483 lw x9,616(x2) +80005250: 26c12703 lw x14,620(x2) +80005254: 27012783 lw x15,624(x2) +80005258: 27412103 lw x2,628(x2) +8000525c: 30200073 mret + +80005260 : +80005260: 00100413 addi x8,x0,1 +80005264: 01f77393 andi x7,x14,31 +80005268: 00741433 sll x8,x8,x7 +8000526c: 304434f3 csrrc x9,mie,x8 +80005270: 34443473 csrrc x8,mip,x8 + +80005274 : +80005274: 00832483 lw x9,8(x6) +80005278: 00848e63 beq x9,x8,80005294 +8000527c: 00040313 addi x6,x8,0 +80005280: 00048213 addi x4,x9,0 +80005284: 324003ef jal x7,800055a8 +80005288: 80005274 .word 0x80005274 +8000528c: 80010717 .word 0x80010717 +80005290: 00000341 .word 0x00000341 +80005294: 00000393 addi x7,x0,0 + +80005298 : +80005298: 00000417 auipc x8,0x0 +8000529c: 03c40413 addi x8,x8,60 # 800052d4 +800052a0: 00740433 add x8,x8,x7 +800052a4: 00371393 slli x7,x14,0x3 +800052a8: 00740433 add x8,x8,x7 +800052ac: ff847413 andi x8,x8,-8 +800052b0: 00042403 lw x8,0(x8) + +800052b4 : +800052b4: 00040a63 beq x8,x0,800052c8 +800052b8: 01f41393 slli x7,x8,0x1f +800052bc: 0003d863 bge x7,x0,800052cc +800052c0: 00145413 srli x8,x8,0x1 +800052c4: f6870ee3 beq x14,x8,80005240 +800052c8: cfcff06f jal x0,800047c4 + +800052cc : +800052cc: 00040067 jalr x0,0(x8) + +800052d0 : + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021000 .word 0x80021000 + ... +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 80021014 .word 0x80021014 + ... +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 80021030 .word 0x80021030 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 +8000534c: 00000000 .word 0x00000000 +80005350: 00000001 .word 0x00000001 +80005354: 00000000 .word 0x00000000 +80005358: 00000001 .word 0x00000001 +8000535c: 00000000 .word 0x00000000 +80005360: 00000001 .word 0x00000001 +80005364: 00000000 .word 0x00000000 +80005368: 00000001 .word 0x00000001 +8000536c: 00000000 .word 0x00000000 +80005370: 00000001 .word 0x00000001 +80005374: 00000000 .word 0x00000000 +80005378: 00000001 .word 0x00000001 +8000537c: 00000000 .word 0x00000000 +80005380: 00000001 .word 0x00000001 +80005384: 00000000 .word 0x00000000 +80005388: 00000001 .word 0x00000001 + ... + +800053d0 : +800053d0: 00000001 .word 0x00000001 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000003 .word 0x00000003 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000005 .word 0x00000005 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000007 .word 0x00000007 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000009 .word 0x00000009 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000000b .word 0x0000000b +800053fc: 00000000 .word 0x00000000 +80005400: 0000000d .word 0x0000000d +80005404: 00000000 .word 0x00000000 +80005408: 0000000f .word 0x0000000f +8000540c: 00000000 .word 0x00000000 +80005410: 00000011 .word 0x00000011 +80005414: 00000000 .word 0x00000000 +80005418: 00000013 .word 0x00000013 +8000541c: 00000000 .word 0x00000000 +80005420: 00000015 .word 0x00000015 +80005424: 00000000 .word 0x00000000 +80005428: 00000017 .word 0x00000017 +8000542c: 00000000 .word 0x00000000 +80005430: 00000019 .word 0x00000019 +80005434: 00000000 .word 0x00000000 +80005438: 0000001b .word 0x0000001b +8000543c: 00000000 .word 0x00000000 +80005440: 0000001d .word 0x0000001d +80005444: 00000000 .word 0x00000000 +80005448: 0000001f .word 0x0000001f +8000544c: 00000000 .word 0x00000000 +80005450: 00000021 .word 0x00000021 +80005454: 00000000 .word 0x00000000 +80005458: 00000023 .word 0x00000023 +8000545c: 00000000 .word 0x00000000 +80005460: 00000025 .word 0x00000025 +80005464: 00000000 .word 0x00000000 +80005468: 00000027 .word 0x00000027 +8000546c: 00000000 .word 0x00000000 +80005470: 00000029 .word 0x00000029 +80005474: 00000000 .word 0x00000000 +80005478: 0000002b .word 0x0000002b +8000547c: 00000000 .word 0x00000000 +80005480: 0000002d .word 0x0000002d +80005484: 00000000 .word 0x00000000 +80005488: 0000002f .word 0x0000002f + ... + +800054d0 : +800054d0: 300023f3 csrrs x7,mstatus,x0 +800054d4: 00b3d493 srli x9,x7,0xb +800054d8: 0034f493 andi x9,x9,3 +800054dc: ffd48413 addi x8,x9,-3 +800054e0: 341023f3 csrrs x7,mepc,x0 +800054e4: 00000493 addi x9,x0,0 +800054e8: 02040c63 beq x8,x0,80005520 +800054ec: 29810113 addi x2,x2,664 +800054f0: 310023f3 csrrs x7,0x310,x0 +800054f4: 01839393 slli x7,x7,0x18 +800054f8: 0003da63 bge x7,x0,8000550c + +800054fc : +800054fc: 29810113 addi x2,x2,664 +80005500: 47012783 lw x15,1136(x2) +80005504: d6810113 addi x2,x2,-664 +80005508: 0080006f jal x0,80005510 + +8000550c : +8000550c: f4012783 lw x15,-192(x2) +80005510: 341023f3 csrrs x7,mepc,x0 +80005514: 40f383b3 sub x7,x7,x15 +80005518: d6810113 addi x2,x2,-664 +8000551c: 1d812483 lw x9,472(x2) + +80005520 : +80005520: 007483b3 add x7,x9,x7 +80005524: 25c12303 lw x6,604(x2) +80005528: 26412403 lw x8,612(x2) +8000552c: 26812483 lw x9,616(x2) +80005530: 26c12703 lw x14,620(x2) +80005534: 27012783 lw x15,624(x2) +80005538: 27412103 lw x2,628(x2) +8000553c: 00438067 jalr x0,4(x7) + +80005540 : +80005540: 0000a217 auipc x4,0xa +80005544: 4f020213 addi x4,x4,1264 # 8000fa30 +80005548: 02522423 sw x5,40(x4) # 28 +8000554c: 00122423 sw x1,8(x4) # 8 +80005550: 00022023 sw x0,0(x4) # 0 +80005554: 0880006f jal x0,800055dc + +80005558 : +80005558: 0000a397 auipc x7,0xa +8000555c: 4d838393 addi x7,x7,1240 # 8000fa30 +80005560: 0483a023 sw x8,64(x7) +80005564: 0243a023 sw x4,32(x7) +80005568: 0253a423 sw x5,40(x7) +8000556c: 0013a423 sw x1,8(x7) +80005570: 0003a023 sw x0,0(x7) +80005574: 00038213 addi x4,x7,0 +80005578: 00040293 addi x5,x8,0 +8000557c: 0600006f jal x0,800055dc + +80005580 : +80005580: 0000a697 auipc x13,0xa +80005584: 4b068693 addi x13,x13,1200 # 8000fa30 +80005588: 06e6a823 sw x14,112(x13) +8000558c: 0246a023 sw x4,32(x13) +80005590: 0256a423 sw x5,40(x13) +80005594: 0016a423 sw x1,8(x13) +80005598: 0006a023 sw x0,0(x13) +8000559c: 00068213 addi x4,x13,0 +800055a0: 00070293 addi x5,x14,0 +800055a4: 0380006f jal x0,800055dc + +800055a8 : +800055a8: 0000a497 auipc x9,0xa +800055ac: 48848493 addi x9,x9,1160 # 8000fa30 +800055b0: 0674a423 sw x7,104(x9) +800055b4: 0244a023 sw x4,32(x9) +800055b8: 0254a423 sw x5,40(x9) +800055bc: 0014a423 sw x1,8(x9) +800055c0: 00300093 addi x1,x0,3 +800055c4: 0014a023 sw x1,0(x9) +800055c8: 1064a823 sw x6,272(x9) +800055cc: 1044ac23 sw x4,280(x9) +800055d0: 00048213 addi x4,x9,0 +800055d4: 00038293 addi x5,x7,0 +800055d8: 0040006f jal x0,800055dc + +800055dc : +800055dc: 00222823 sw x2,16(x4) # 10 +800055e0: 00322c23 sw x3,24(x4) # 18 +800055e4: 02622823 sw x6,48(x4) # 30 +800055e8: 02722c23 sw x7,56(x4) # 38 +800055ec: 04822023 sw x8,64(x4) # 40 +800055f0: 04922423 sw x9,72(x4) # 48 +800055f4: 04a22823 sw x10,80(x4) # 50 +800055f8: 04b22c23 sw x11,88(x4) # 58 +800055fc: 06c22023 sw x12,96(x4) # 60 +80005600: 06d22423 sw x13,104(x4) # 68 +80005604: 06e22823 sw x14,112(x4) # 70 +80005608: 06f22c23 sw x15,120(x4) # 78 +8000560c: 09022023 sw x16,128(x4) # 80 +80005610: 09122423 sw x17,136(x4) # 88 +80005614: 09222823 sw x18,144(x4) # 90 +80005618: 09322c23 sw x19,152(x4) # 98 +8000561c: 0b422023 sw x20,160(x4) # a0 +80005620: 0b522423 sw x21,168(x4) # a8 +80005624: 0b622823 sw x22,176(x4) # b0 +80005628: 0b722c23 sw x23,184(x4) # b8 +8000562c: 0d822023 sw x24,192(x4) # c0 +80005630: 0d922423 sw x25,200(x4) # c8 +80005634: 0da22823 sw x26,208(x4) # d0 +80005638: 0db22c23 sw x27,216(x4) # d8 +8000563c: 0fc22023 sw x28,224(x4) # e0 +80005640: 0fd22423 sw x29,232(x4) # e8 +80005644: 0fe22823 sw x30,240(x4) # f0 +80005648: 0ff22c23 sw x31,248(x4) # f8 + +8000564c : +8000564c: 0000a497 auipc x9,0xa +80005650: 3e44a483 lw x9,996(x9) # 8000fa30 +80005654: 00300513 addi x10,x0,3 +80005658: 18a48a63 beq x9,x10,800057ec + +8000565c : +8000565c: ffa2d303 lhu x6,-6(x5) +80005660: ff82d383 lhu x7,-8(x5) +80005664: 01031313 slli x6,x6,0x10 +80005668: 00736333 or x6,x6,x7 +8000566c: 00f35393 srli x7,x6,0xf +80005670: 01f3f393 andi x7,x7,31 +80005674: 01435413 srli x8,x6,0x14 +80005678: 01f47413 andi x8,x8,31 +8000567c: 10822223 sw x8,260(x4) # 104 +80005680: 00341313 slli x6,x8,0x3 +80005684: 00620333 add x6,x4,x6 +80005688: 00032303 lw x6,0(x6) +8000568c: 10622823 sw x6,272(x4) # 110 +80005690: ff62d303 lhu x6,-10(x5) +80005694: ff42d383 lhu x7,-12(x5) +80005698: 01031313 slli x6,x6,0x10 +8000569c: 00736333 or x6,x6,x7 +800056a0: 00030513 addi x10,x6,0 +800056a4: 07f37413 andi x8,x6,127 +800056a8: 00300493 addi x9,x0,3 +800056ac: 0c941463 bne x8,x9,80005774 +800056b0: 00c35413 srli x8,x6,0xc +800056b4: 00747413 andi x8,x8,7 +800056b8: 00200493 addi x9,x0,2 +800056bc: 0a941c63 bne x8,x9,80005774 +800056c0: 41435393 srai x7,x6,0x14 +800056c4: 00f35313 srli x6,x6,0xf +800056c8: 01f37313 andi x6,x6,31 +800056cc: 00331313 slli x6,x6,0x3 +800056d0: 00620333 add x6,x4,x6 +800056d4: 00032303 lw x6,0(x6) +800056d8: 00730333 add x6,x6,x7 +800056dc: 00337413 andi x8,x6,3 +800056e0: 0c041663 bne x8,x0,800057ac +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0000c417 auipc x8,0xc +80005704: 07040413 addi x8,x8,112 # 80011770 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 08836663 bltu x6,x8,800057ac +80005724: 00000013 addi x0,x0,0 +80005728: 00000013 addi x0,x0,0 +8000572c: 00000013 addi x0,x0,0 +80005730: 00000013 addi x0,x0,0 +80005734: 00000013 addi x0,x0,0 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0001b417 auipc x8,0x1b +80005744: 0f040413 addi x8,x8,240 # 80020830 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: ffc40413 addi x8,x8,-4 +80005764: 04646463 bltu x8,x6,800057ac +80005768: 00032303 lw x6,0(x6) +8000576c: 10622c23 sw x6,280(x4) # 118 +80005770: 3700006f jal x0,80005ae0 + +80005774 : +80005774: 00100413 addi x8,x0,1 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 3d848493 addi x9,x9,984 # 8000fb58 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10a22c23 sw x10,280(x4) # 118 +800057a8: 3380006f jal x0,80005ae0 + +800057ac : +800057ac: 00200413 addi x8,x0,2 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 0000a497 auipc x9,0xa +800057c4: 39848493 addi x9,x9,920 # 8000fb58 +800057c8: 00000013 addi x0,x0,0 +800057cc: 00000013 addi x0,x0,0 +800057d0: 00000013 addi x0,x0,0 +800057d4: 00000013 addi x0,x0,0 +800057d8: 00000013 addi x0,x0,0 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0084a023 sw x8,0(x9) +800057e4: 10622c23 sw x6,280(x4) # 118 +800057e8: 2f80006f jal x0,80005ae0 + +800057ec : +800057ec: 0042a303 lw x6,4(x5) +800057f0: 0000a817 auipc x16,0xa +800057f4: 37880813 addi x16,x16,888 # 8000fb68 +800057f8: 00682023 sw x6,0(x16) +800057fc: 0002a303 lw x6,0(x5) +80005800: 10622423 sw x6,264(x4) # 108 +80005804: 0000a817 auipc x16,0xa +80005808: 36480813 addi x16,x16,868 # 8000fb68 +8000580c: 00082303 lw x6,0(x16) +80005810: 0000b397 auipc x7,0xb +80005814: a8d38393 addi x7,x7,-1395 # 8001029d +80005818: 28730463 beq x6,x7,80005aa0 +8000581c: 00000413 addi x8,x0,0 +80005820: 0000a817 auipc x16,0xa +80005824: 34080813 addi x16,x16,832 # 8000fb60 +80005828: 00882023 sw x8,0(x16) +8000582c: 0000b397 auipc x7,0xb +80005830: a8838393 addi x7,x7,-1400 # 800102b4 +80005834: 00731863 bne x6,x7,80005844 +80005838: 00100413 addi x8,x0,1 +8000583c: 00000493 addi x9,x0,0 +80005840: 2740006f jal x0,80005ab4 +80005844: 0000b397 auipc x7,0xb +80005848: b7238393 addi x7,x7,-1166 # 800103b6 +8000584c: 00731863 bne x6,x7,8000585c +80005850: 00200413 addi x8,x0,2 +80005854: 00000493 addi x9,x0,0 +80005858: 25c0006f jal x0,80005ab4 +8000585c: 0000b397 auipc x7,0xb +80005860: c5538393 addi x7,x7,-939 # 800104b1 +80005864: 00731863 bne x6,x7,80005874 +80005868: 00300413 addi x8,x0,3 +8000586c: 00000493 addi x9,x0,0 +80005870: 2440006f jal x0,80005ab4 +80005874: 0000b397 auipc x7,0xb +80005878: d3038393 addi x7,x7,-720 # 800105a4 +8000587c: 00731863 bne x6,x7,8000588c +80005880: 00400413 addi x8,x0,4 +80005884: 00000493 addi x9,x0,0 +80005888: 22c0006f jal x0,80005ab4 +8000588c: 0000b397 auipc x7,0xb +80005890: e8b38393 addi x7,x7,-373 # 80010717 +80005894: 00731863 bne x6,x7,800058a4 +80005898: 00500413 addi x8,x0,5 +8000589c: 00000493 addi x9,x0,0 +800058a0: 2140006f jal x0,80005ab4 +800058a4: 0000b397 auipc x7,0xb +800058a8: df738393 addi x7,x7,-521 # 8001069b +800058ac: 00731863 bne x6,x7,800058bc +800058b0: 00600413 addi x8,x0,6 +800058b4: 00000493 addi x9,x0,0 +800058b8: 1fc0006f jal x0,80005ab4 +800058bc: 0000b397 auipc x7,0xb +800058c0: e1d38393 addi x7,x7,-483 # 800106d9 +800058c4: 00731863 bne x6,x7,800058d4 +800058c8: 00700413 addi x8,x0,7 +800058cc: 00000493 addi x9,x0,0 +800058d0: 1e40006f jal x0,80005ab4 +800058d4: 0000b397 auipc x7,0xb +800058d8: a2038393 addi x7,x7,-1504 # 800102f4 +800058dc: 00731863 bne x6,x7,800058ec +800058e0: 00100413 addi x8,x0,1 +800058e4: 00100493 addi x9,x0,1 +800058e8: 1cc0006f jal x0,80005ab4 +800058ec: 0000b397 auipc x7,0xb +800058f0: b0838393 addi x7,x7,-1272 # 800103f4 +800058f4: 00731863 bne x6,x7,80005904 +800058f8: 00200413 addi x8,x0,2 +800058fc: 00100493 addi x9,x0,1 +80005900: 1b40006f jal x0,80005ab4 +80005904: 0000b397 auipc x7,0xb +80005908: be938393 addi x7,x7,-1047 # 800104ed +8000590c: 00731863 bne x6,x7,8000591c +80005910: 00300413 addi x8,x0,3 +80005914: 00100493 addi x9,x0,1 +80005918: 19c0006f jal x0,80005ab4 +8000591c: 0000b397 auipc x7,0xb +80005920: cc538393 addi x7,x7,-827 # 800105e1 +80005924: 00731863 bne x6,x7,80005934 +80005928: 00400413 addi x8,x0,4 +8000592c: 00100493 addi x9,x0,1 +80005930: 1840006f jal x0,80005ab4 +80005934: 0000b397 auipc x7,0xb +80005938: e1e38393 addi x7,x7,-482 # 80010752 +8000593c: 00731863 bne x6,x7,8000594c +80005940: 00500413 addi x8,x0,5 +80005944: 00100493 addi x9,x0,1 +80005948: 16c0006f jal x0,80005ab4 +8000594c: 0000b397 auipc x7,0xb +80005950: 9e838393 addi x7,x7,-1560 # 80010334 +80005954: 00731863 bne x6,x7,80005964 +80005958: 00100413 addi x8,x0,1 +8000595c: 00200493 addi x9,x0,2 +80005960: 1540006f jal x0,80005ab4 +80005964: 0000b397 auipc x7,0xb +80005968: ace38393 addi x7,x7,-1330 # 80010432 +8000596c: 00731863 bne x6,x7,8000597c +80005970: 00200413 addi x8,x0,2 +80005974: 00200493 addi x9,x0,2 +80005978: 13c0006f jal x0,80005ab4 +8000597c: 0000b397 auipc x7,0xb +80005980: bad38393 addi x7,x7,-1107 # 80010529 +80005984: 00731863 bne x6,x7,80005994 +80005988: 00300413 addi x8,x0,3 +8000598c: 00200493 addi x9,x0,2 +80005990: 1240006f jal x0,80005ab4 +80005994: 0000b397 auipc x7,0xb +80005998: c8a38393 addi x7,x7,-886 # 8001061e +8000599c: 00731863 bne x6,x7,800059ac +800059a0: 00400413 addi x8,x0,4 +800059a4: 00200493 addi x9,x0,2 +800059a8: 10c0006f jal x0,80005ab4 +800059ac: 0000b397 auipc x7,0xb +800059b0: de138393 addi x7,x7,-543 # 8001078d +800059b4: 00731863 bne x6,x7,800059c4 +800059b8: 00500413 addi x8,x0,5 +800059bc: 00200493 addi x9,x0,2 +800059c0: 0f40006f jal x0,80005ab4 +800059c4: 0000b397 auipc x7,0xb +800059c8: 9b138393 addi x7,x7,-1615 # 80010375 +800059cc: 00731863 bne x6,x7,800059dc +800059d0: 00100413 addi x8,x0,1 +800059d4: 00300493 addi x9,x0,3 +800059d8: 0dc0006f jal x0,80005ab4 +800059dc: 0000b397 auipc x7,0xb +800059e0: a9538393 addi x7,x7,-1387 # 80010471 +800059e4: 00731863 bne x6,x7,800059f4 +800059e8: 00200413 addi x8,x0,2 +800059ec: 00300493 addi x9,x0,3 +800059f0: 0c40006f jal x0,80005ab4 +800059f4: 0000b397 auipc x7,0xb +800059f8: b7238393 addi x7,x7,-1166 # 80010566 +800059fc: 00731863 bne x6,x7,80005a0c +80005a00: 00300413 addi x8,x0,3 +80005a04: 00300493 addi x9,x0,3 +80005a08: 0ac0006f jal x0,80005ab4 +80005a0c: 0000b397 auipc x7,0xb +80005a10: c5038393 addi x7,x7,-944 # 8001065c +80005a14: 00731863 bne x6,x7,80005a24 +80005a18: 00400413 addi x8,x0,4 +80005a1c: 00300493 addi x9,x0,3 +80005a20: 0940006f jal x0,80005ab4 +80005a24: 0000b397 auipc x7,0xb +80005a28: da538393 addi x7,x7,-603 # 800107c9 +80005a2c: 00731863 bne x6,x7,80005a3c +80005a30: 00500413 addi x8,x0,5 +80005a34: 00300493 addi x9,x0,3 +80005a38: 07c0006f jal x0,80005ab4 +80005a3c: 0000b397 auipc x7,0xb +80005a40: dca38393 addi x7,x7,-566 # 80010806 +80005a44: 00731863 bne x6,x7,80005a54 +80005a48: 00800413 addi x8,x0,8 +80005a4c: 00000493 addi x9,x0,0 +80005a50: 0640006f jal x0,80005ab4 +80005a54: 0000b397 auipc x7,0xb +80005a58: e0138393 addi x7,x7,-511 # 80010855 +80005a5c: 00731863 bne x6,x7,80005a6c +80005a60: 00800413 addi x8,x0,8 +80005a64: 00000493 addi x9,x0,0 +80005a68: 04c0006f jal x0,80005ab4 +80005a6c: 0000b397 auipc x7,0xb +80005a70: ee438393 addi x7,x7,-284 # 80010950 +80005a74: 00731863 bne x6,x7,80005a84 +80005a78: 00800413 addi x8,x0,8 +80005a7c: 00100493 addi x9,x0,1 +80005a80: 0340006f jal x0,80005ab4 +80005a84: 0000b397 auipc x7,0xb +80005a88: fc838393 addi x7,x7,-56 # 80010a4c +80005a8c: 00731863 bne x6,x7,80005a9c +80005a90: 00800413 addi x8,x0,8 +80005a94: 00200493 addi x9,x0,2 +80005a98: 01c0006f jal x0,80005ab4 +80005a9c: 0340006f jal x0,80005ad0 + +80005aa0 : +80005aa0: 00900413 addi x8,x0,9 +80005aa4: 0000a817 auipc x16,0xa +80005aa8: 0bc80813 addi x16,x16,188 # 8000fb60 +80005aac: 00882023 sw x8,0(x16) +80005ab0: 0300006f jal x0,80005ae0 + +80005ab4 : +80005ab4: 0000a817 auipc x16,0xa +80005ab8: 0ac80813 addi x16,x16,172 # 8000fb60 +80005abc: 00882023 sw x8,0(x16) +80005ac0: 0000a817 auipc x16,0xa +80005ac4: 0a480813 addi x16,x16,164 # 8000fb64 +80005ac8: 00982023 sw x9,0(x16) +80005acc: 0140006f jal x0,80005ae0 + +80005ad0 : +80005ad0: 0000a817 auipc x16,0xa +80005ad4: 09080813 addi x16,x16,144 # 8000fb60 +80005ad8: 00082023 sw x0,0(x16) +80005adc: 0040006f jal x0,80005ae0 + +80005ae0 : +80005ae0: 0002a303 lw x6,0(x5) +80005ae4: 10622423 sw x6,264(x4) # 108 +80005ae8: 00035383 lhu x7,0(x6) +80005aec: 0033f413 andi x8,x7,3 +80005af0: 00300493 addi x9,x0,3 +80005af4: 00941863 bne x8,x9,80005b04 +80005af8: 00235403 lhu x8,2(x6) +80005afc: 01041413 slli x8,x8,0x10 +80005b00: 0083e3b3 or x7,x7,x8 +80005b04: 10722023 sw x7,256(x4) # 100 +80005b08: 0042a303 lw x6,4(x5) +80005b0c: 12622023 sw x6,288(x4) # 120 + +80005b10 : +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 58f50513 addi x10,x10,1423 # 800100af +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 58950513 addi x10,x10,1417 # 800100e9 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 00000013 addi x0,x0,0 +80005b8c: 00000013 addi x0,x0,0 +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 60050513 addi x10,x10,1536 # 800101a0 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 + +80005bc8 : +80005bc8: 0000a517 auipc x10,0xa +80005bcc: f8852503 lw x10,-120(x10) # 8000fb50 +80005bd0: 0001c097 auipc x1,0x1c +80005bd4: 994080e7 jalr x1,-1644(x1) # 80021564 + +80005bd8 : +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 5d250513 addi x10,x10,1490 # 800101b2 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: e2852503 lw x10,-472(x10) # 8000fa30 +80005c10: 00300593 addi x11,x0,3 +80005c14: 52b50c63 beq x10,x11,8000614c +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000a517 auipc x10,0xa +80005c24: 59450513 addi x10,x10,1428 # 800101b4 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001c097 auipc x1,0x1c +80005c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80005c48: 0000a517 auipc x10,0xa +80005c4c: ee852503 lw x10,-280(x10) # 8000fb30 +80005c50: 02000593 addi x11,x0,32 +80005c54: 00357613 andi x12,x10,3 +80005c58: 00300693 addi x13,x0,3 +80005c5c: 00d60463 beq x12,x13,80005c64 +80005c60: 01000593 addi x11,x0,16 +80005c64: 3f4010ef jal x1,80007058 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: f1850513 addi x10,x10,-232 # 8000fb98 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 50850513 addi x10,x10,1288 # 800101c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 0000a517 auipc x10,0xa +80005cec: e5052503 lw x10,-432(x10) # 8000fb38 +80005cf0: 02000593 addi x11,x0,32 +80005cf4: 364010ef jal x1,80007058 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000a517 auipc x10,0xa +80005d04: e9850513 addi x10,x10,-360 # 8000fb98 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 0000b517 auipc x10,0xb +80005d44: ebf50513 addi x10,x10,-321 # 80010bff +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001c097 auipc x1,0x1c +80005d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80005d68: 0000a517 auipc x10,0xa +80005d6c: cc852503 lw x10,-824(x10) # 8000fa30 +80005d70: 00050663 beq x10,x0,80005d7c +80005d74: 00300593 addi x11,x0,3 +80005d78: 04b51063 bne x10,x11,80005db8 +80005d7c: 07800593 addi x11,x0,120 +80005d80: 0000a617 auipc x12,0xa +80005d84: e1860613 addi x12,x12,-488 # 8000fb98 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 00b60023 sb x11,0(x12) +80005da4: 00160613 addi x12,x12,1 +80005da8: 0000a517 auipc x10,0xa +80005dac: d8c52503 lw x10,-628(x10) # 8000fb34 +80005db0: 324010ef jal x1,800070d4 +80005db4: 1180006f jal x0,80005ecc + +80005db8 : +80005db8: 00100593 addi x11,x0,1 +80005dbc: 04b50863 beq x10,x11,80005e0c +80005dc0: 00400593 addi x11,x0,4 +80005dc4: 08b50a63 beq x10,x11,80005e58 +80005dc8: 00500593 addi x11,x0,5 +80005dcc: 0cb50463 beq x10,x11,80005e94 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000b517 auipc x10,0xb +80005de4: f3550513 addi x10,x10,-203 # 80010d15 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0001b097 auipc x1,0x1b +80005e04: 764080e7 jalr x1,1892(x1) # 80021564 +80005e08: 1000006f jal x0,80005f08 + +80005e0c : +80005e0c: 06600593 addi x11,x0,102 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: d7860613 addi x12,x12,-648 # 8000fb98 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: cec52503 lw x10,-788(x10) # 8000fb34 +80005e50: 284010ef jal x1,800070d4 +80005e54: 0780006f jal x0,80005ecc + +80005e58 : +80005e58: 07600593 addi x11,x0,118 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000a617 auipc x12,0xa +80005e64: d3860613 addi x12,x12,-712 # 8000fb98 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 00b60023 sb x11,0(x12) +80005e84: 00160613 addi x12,x12,1 +80005e88: 0000a517 auipc x10,0xa +80005e8c: cac52503 lw x10,-852(x10) # 8000fb34 +80005e90: 244010ef jal x1,800070d4 + +80005e94 : +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: d5850513 addi x10,x10,-680 # 80010bf8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80005ec8: 0400006f jal x0,80005f08 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000a517 auipc x10,0xa +80005ee4: cb850513 addi x10,x10,-840 # 8000fb98 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 + +80005f08 : +80005f08: 00000013 addi x0,x0,0 +80005f0c: 00000013 addi x0,x0,0 +80005f10: 00000013 addi x0,x0,0 +80005f14: 00000013 addi x0,x0,0 +80005f18: 00000013 addi x0,x0,0 +80005f1c: 00000013 addi x0,x0,0 +80005f20: 0000b517 auipc x10,0xb +80005f24: cf050513 addi x10,x10,-784 # 80010c10 +80005f28: 00000013 addi x0,x0,0 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0001b097 auipc x1,0x1b +80005f44: 624080e7 jalr x1,1572(x1) # 80021564 +80005f48: 0000a517 auipc x10,0xa +80005f4c: ae852503 lw x10,-1304(x10) # 8000fa30 +80005f50: 00100593 addi x11,x0,1 +80005f54: 00b51c63 bne x10,x11,80005f6c +80005f58: 0000a517 auipc x10,0xa +80005f5c: be852503 lw x10,-1048(x10) # 8000fb40 +80005f60: 02000593 addi x11,x0,32 +80005f64: 0f4010ef jal x1,80007058 +80005f68: 0140006f jal x0,80005f7c + +80005f6c : +80005f6c: 0000a517 auipc x10,0xa +80005f70: bd452503 lw x10,-1068(x10) # 8000fb40 +80005f74: 02000593 addi x11,x0,32 +80005f78: 0e0010ef jal x1,80007058 + +80005f7c : +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000a517 auipc x10,0xa +80005f84: c1850513 addi x10,x10,-1000 # 8000fb98 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: bb052503 lw x10,-1104(x10) # 8000fb58 +80005fb0: 08051e63 bne x10,x0,8000604c +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: c6750513 addi x10,x10,-921 # 80010c27 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0001b097 auipc x1,0x1b +80005fe4: 584080e7 jalr x1,1412(x1) # 80021564 +80005fe8: 0000a517 auipc x10,0xa +80005fec: a4852503 lw x10,-1464(x10) # 8000fa30 +80005ff0: 00100593 addi x11,x0,1 +80005ff4: 00b51c63 bne x10,x11,8000600c +80005ff8: 0000a517 auipc x10,0xa +80005ffc: b5052503 lw x10,-1200(x10) # 8000fb48 +80006000: 02000593 addi x11,x0,32 +80006004: 054010ef jal x1,80007058 +80006008: 0140006f jal x0,8000601c + +8000600c : +8000600c: 0000a517 auipc x10,0xa +80006010: b3c52503 lw x10,-1220(x10) # 8000fb48 +80006014: 02000593 addi x11,x0,32 +80006018: 040010ef jal x1,80007058 + +8000601c : +8000601c: 00000013 addi x0,x0,0 +80006020: 0000a517 auipc x10,0xa +80006024: b7850513 addi x10,x10,-1160 # 8000fb98 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 5bd0006f jal x0,80006e04 + +8000604c : +8000604c: 00100593 addi x11,x0,1 +80006050: 06b51e63 bne x10,x11,800060cc + +80006054 : +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000b517 auipc x10,0xb +80006064: bde50513 addi x10,x10,-1058 # 80010c3e +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 0000a517 auipc x10,0xa +8000608c: ac052503 lw x10,-1344(x10) # 8000fb48 +80006090: 02000593 addi x11,x0,32 +80006094: 7c5000ef jal x1,80007058 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000a517 auipc x10,0xa +800060a4: af850513 addi x10,x10,-1288 # 8000fb98 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 53d0006f jal x0,80006e04 + +800060cc : +800060cc: 00000013 addi x0,x0,0 +800060d0: 00000013 addi x0,x0,0 +800060d4: 00000013 addi x0,x0,0 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000b517 auipc x10,0xb +800060e4: bbc50513 addi x10,x10,-1092 # 80010c9c +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 0000a517 auipc x10,0xa +8000610c: a4052503 lw x10,-1472(x10) # 8000fb48 +80006110: 02000593 addi x11,x0,32 +80006114: 745000ef jal x1,80007058 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000a517 auipc x10,0xa +80006124: a7850513 addi x10,x10,-1416 # 8000fb98 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 4bd0006f jal x0,80006e04 + +8000614c : +8000614c: 0000a417 auipc x8,0xa +80006150: a1442403 lw x8,-1516(x8) # 8000fb60 +80006154: 00900493 addi x9,x0,9 +80006158: 0a940c63 beq x8,x9,80006210 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: be150513 addi x10,x10,-1055 # 80010d41 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: bcd50513 addi x10,x10,-1075 # 80010d6d +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 0000a817 auipc x16,0xa +800061cc: 9a080813 addi x16,x16,-1632 # 8000fb68 +800061d0: 00082503 lw x10,0(x16) +800061d4: 0001b097 auipc x1,0x1b +800061d8: 390080e7 jalr x1,912(x1) # 80021564 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000a517 auipc x10,0xa +800061e4: fd250513 addi x10,x10,-46 # 800101b2 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 280404e3 beq x8,x0,80006c90 +8000620c: 3400006f jal x0,8000654c + +80006210 : +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000b517 auipc x10,0xb +80006224: b5d50513 addi x10,x10,-1187 # 80010d7d +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 0000a517 auipc x10,0xa +8000624c: 90052503 lw x10,-1792(x10) # 8000fb48 +80006250: 02000593 addi x11,x0,32 +80006254: 605000ef jal x1,80007058 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000a517 auipc x10,0xa +80006264: 93850513 addi x10,x10,-1736 # 8000fb98 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000b517 auipc x10,0xb +800062a4: b0850513 addi x10,x10,-1272 # 80010da8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 0000a517 auipc x10,0xa +800062cc: 87852503 lw x10,-1928(x10) # 8000fb40 +800062d0: 02000593 addi x11,x0,32 +800062d4: 585000ef jal x1,80007058 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000a517 auipc x10,0xa +800062e4: 8b850513 addi x10,x10,-1864 # 8000fb98 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 0000a317 auipc x6,0xa +8000630c: 83832303 lw x6,-1992(x6) # 8000fb40 +80006310: 0000a397 auipc x7,0xa +80006314: 8383a383 lw x7,-1992(x7) # 8000fb48 +80006318: 10736a63 bltu x6,x7,8000642c + +8000631c : +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: ab750513 addi x10,x10,-1353 # 80010dd7 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0000b517 auipc x10,0xb +80006364: adf50513 addi x10,x10,-1313 # 80010e3f +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0001b097 auipc x1,0x1b +80006384: 1e4080e7 jalr x1,484(x1) # 80021564 +80006388: 00009317 auipc x6,0x9 +8000638c: 7b832303 lw x6,1976(x6) # 8000fb40 +80006390: 00009397 auipc x7,0x9 +80006394: 7b83a383 lw x7,1976(x7) # 8000fb48 +80006398: 40730533 sub x10,x6,x7 +8000639c: 02000593 addi x11,x0,32 +800063a0: 4b9000ef jal x1,80007058 +800063a4: 00000013 addi x0,x0,0 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 00009517 auipc x10,0x9 +800063c4: 7d850513 addi x10,x10,2008 # 8000fb98 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 00000013 addi x0,x0,0 +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: a6650513 addi x10,x10,-1434 # 80010e66 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 1dd0006f jal x0,80006e04 + +8000642c : +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 9c350513 addi x10,x10,-1597 # 80010e03 +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00000013 addi x0,x0,0 +8000646c: 00000013 addi x0,x0,0 +80006470: 00000013 addi x0,x0,0 +80006474: 00000013 addi x0,x0,0 +80006478: 00000013 addi x0,x0,0 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000b517 auipc x10,0xb +80006484: 9bf50513 addi x10,x10,-1601 # 80010e3f +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001b097 auipc x1,0x1b +800064a4: 0c4080e7 jalr x1,196(x1) # 80021564 +800064a8: 00009317 auipc x6,0x9 +800064ac: 6a032303 lw x6,1696(x6) # 8000fb48 +800064b0: 00009397 auipc x7,0x9 +800064b4: 6903a383 lw x7,1680(x7) # 8000fb40 +800064b8: 40730533 sub x10,x6,x7 +800064bc: 02000593 addi x11,x0,32 +800064c0: 399000ef jal x1,80007058 +800064c4: 00000013 addi x0,x0,0 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 00009517 auipc x10,0x9 +800064e4: 6b850513 addi x10,x10,1720 # 8000fb98 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 00000013 addi x0,x0,0 +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: a2e50513 addi x10,x10,-1490 # 80010f4e +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 0bd0006f jal x0,80006e04 + +8000654c : +8000654c: 00000013 addi x0,x0,0 +80006550: 00000013 addi x0,x0,0 +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000b517 auipc x10,0xb +80006564: ad550513 addi x10,x10,-1323 # 80011035 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001b097 auipc x1,0x1b +80006584: fe4080e7 jalr x1,-28(x1) # 80021564 +80006588: 00009517 auipc x10,0x9 +8000658c: 5dc52503 lw x10,1500(x10) # 8000fb64 +80006590: 04050a63 beq x10,x0,800065e4 +80006594: 00100593 addi x11,x0,1 +80006598: 08b50663 beq x10,x11,80006624 +8000659c: 00200593 addi x11,x0,2 +800065a0: 0cb50263 beq x10,x11,80006664 +800065a4: 00300593 addi x11,x0,3 +800065a8: 0eb50e63 beq x10,x11,800066a4 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: ab150513 addi x10,x10,-1359 # 80011071 +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 1000006f jal x0,800066e0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: a4f50513 addi x10,x10,-1457 # 8001104f +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0c00006f jal x0,800066e0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: a1750513 addi x10,x10,-1513 # 80011057 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0800006f jal x0,800066e0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 9df50513 addi x10,x10,-1569 # 8001105f +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 +800066a0: 0400006f jal x0,800066e0 + +800066a4 : +800066a4: 00000013 addi x0,x0,0 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 9a850513 addi x10,x10,-1624 # 80011068 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 + +800066e0 : +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00000013 addi x0,x0,0 +800066ec: 00000013 addi x0,x0,0 +800066f0: 00000013 addi x0,x0,0 +800066f4: 00000013 addi x0,x0,0 +800066f8: 00000013 addi x0,x0,0 +800066fc: 00000013 addi x0,x0,0 +80006700: 0000b517 auipc x10,0xb +80006704: 97a50513 addi x10,x10,-1670 # 8001107a +80006708: 00000013 addi x0,x0,0 +8000670c: 00000013 addi x0,x0,0 +80006710: 00000013 addi x0,x0,0 +80006714: 00000013 addi x0,x0,0 +80006718: 00000013 addi x0,x0,0 +8000671c: 00000013 addi x0,x0,0 +80006720: 0001b097 auipc x1,0x1b +80006724: e44080e7 jalr x1,-444(x1) # 80021564 +80006728: 00009517 auipc x10,0x9 +8000672c: 43852503 lw x10,1080(x10) # 8000fb60 +80006730: 00100593 addi x11,x0,1 +80006734: 06b50863 beq x10,x11,800067a4 +80006738: 00200593 addi x11,x0,2 +8000673c: 0ab50463 beq x10,x11,800067e4 +80006740: 00300593 addi x11,x0,3 +80006744: 0eb50063 beq x10,x11,80006824 +80006748: 00400593 addi x11,x0,4 +8000674c: 10b50c63 beq x10,x11,80006864 +80006750: 00500593 addi x11,x0,5 +80006754: 14b50863 beq x10,x11,800068a4 +80006758: 00600593 addi x11,x0,6 +8000675c: 18b50463 beq x10,x11,800068e4 +80006760: 00700593 addi x11,x0,7 +80006764: 1cb50063 beq x10,x11,80006924 +80006768: 00800593 addi x11,x0,8 +8000676c: 1eb50c63 beq x10,x11,80006964 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: a5150513 addi x10,x10,-1455 # 800111d1 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 2000006f jal x0,800069a0 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 8d450513 addi x10,x10,-1836 # 80011094 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1c00006f jal x0,800069a0 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 8c550513 addi x10,x10,-1851 # 800110c5 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1800006f jal x0,800069a0 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 8a550513 addi x10,x10,-1883 # 800110e5 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1400006f jal x0,800069a0 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 88350513 addi x10,x10,-1917 # 80011103 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 1000006f jal x0,800069a0 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 86250513 addi x10,x10,-1950 # 80011122 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0c00006f jal x0,800069a0 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 84a50513 addi x10,x10,-1974 # 8001114a +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0800006f jal x0,800069a0 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 83650513 addi x10,x10,-1994 # 80011176 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 0400006f jal x0,800069a0 + +80006964 : +80006964: 00000013 addi x0,x0,0 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 82250513 addi x10,x10,-2014 # 800111a2 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 + +800069a0 : +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000b517 auipc x10,0xb +800069c4: 82050513 addi x10,x10,-2016 # 800111e0 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00009517 auipc x10,0x9 +800069ec: 16052503 lw x10,352(x10) # 8000fb48 +800069f0: 02000593 addi x11,x0,32 +800069f4: 664000ef jal x1,80007058 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 00009517 auipc x10,0x9 +80006a04: 19850513 addi x10,x10,408 # 8000fb98 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00000013 addi x0,x0,0 +80006a2c: 00000013 addi x0,x0,0 +80006a30: 00000013 addi x0,x0,0 +80006a34: 00000013 addi x0,x0,0 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: 7b750513 addi x10,x10,1975 # 800111f7 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: 0d852503 lw x10,216(x10) # 8000fb40 +80006a70: 02000593 addi x11,x0,32 +80006a74: 5e4000ef jal x1,80007058 +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 00009517 auipc x10,0x9 +80006a84: 11850513 addi x10,x10,280 # 8000fb98 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: 0b852503 lw x10,184(x10) # 8000fb60 +80006ab0: 00200593 addi x11,x0,2 +80006ab4: 08b51463 bne x10,x11,80006b3c +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 74e50513 addi x10,x10,1870 # 8001120e +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: 06052503 lw x10,96(x10) # 8000fb48 +80006af0: 284000ef jal x1,80006d74 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 +80006afc: 00000013 addi x0,x0,0 +80006b00: 0000a517 auipc x10,0xa +80006b04: 72550513 addi x10,x10,1829 # 80011225 +80006b08: 00000013 addi x0,x0,0 +80006b0c: 00000013 addi x0,x0,0 +80006b10: 00000013 addi x0,x0,0 +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0001b097 auipc x1,0x1b +80006b24: a44080e7 jalr x1,-1468(x1) # 80021564 +80006b28: 00009517 auipc x10,0x9 +80006b2c: 01852503 lw x10,24(x10) # 8000fb40 +80006b30: 244000ef jal x1,80006d74 +80006b34: 0001b097 auipc x1,0x1b +80006b38: a30080e7 jalr x1,-1488(x1) # 80021564 + +80006b3c : +80006b3c: 00000097 auipc x1,0x0 +80006b40: 314080e7 jalr x1,788(x1) # 80006e50 +80006b44: 00009517 auipc x10,0x9 +80006b48: 01c52503 lw x10,28(x10) # 8000fb60 +80006b4c: 00100593 addi x11,x0,1 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 73b50513 addi x10,x10,1851 # 8001129b +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 27c0006f jal x0,80006e04 +80006b8c: 00200593 addi x11,x0,2 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 7d150513 addi x10,x10,2001 # 80011371 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 23c0006f jal x0,80006e04 +80006bcc: 00300593 addi x11,x0,3 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 88450513 addi x10,x10,-1916 # 80011464 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1fc0006f jal x0,80006e04 +80006c0c: 00400593 addi x11,x0,4 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 93f50513 addi x10,x10,-1729 # 8001155f +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 1bc0006f jal x0,80006e04 +80006c4c: 00500593 addi x11,x0,5 +80006c50: 02b51e63 bne x10,x11,80006c8c +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: 9e650513 addi x10,x10,-1562 # 80011646 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 17c0006f jal x0,80006e04 +80006c8c: 1780006f jal x0,80006e04 + +80006c90 : +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: 5b350513 addi x10,x10,1459 # 80011253 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00009617 auipc x12,0x9 +80006ccc: eb062603 lw x12,-336(x12) # 8000fb78 +80006cd0: 00000013 addi x0,x0,0 +80006cd4: 00000013 addi x0,x0,0 +80006cd8: 00000013 addi x0,x0,0 +80006cdc: 00000013 addi x0,x0,0 +80006ce0: 00009517 auipc x10,0x9 +80006ce4: 55c50513 addi x10,x10,1372 # 8001023c +80006ce8: 00000013 addi x0,x0,0 +80006cec: 00000013 addi x0,x0,0 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 0001b097 auipc x1,0x1b +80006d04: 864080e7 jalr x1,-1948(x1) # 80021564 +80006d08: 00065503 lhu x10,0(x12) +80006d0c: 01000593 addi x11,x0,16 +80006d10: 00357413 andi x8,x10,3 +80006d14: 00300493 addi x9,x0,3 +80006d18: 00941a63 bne x8,x9,80006d2c +80006d1c: 00265403 lhu x8,2(x12) +80006d20: 01041413 slli x8,x8,0x10 +80006d24: 00856533 or x10,x10,x8 +80006d28: 02000593 addi x11,x0,32 +80006d2c: 32c000ef jal x1,80007058 +80006d30: 00000013 addi x0,x0,0 +80006d34: 00000013 addi x0,x0,0 +80006d38: 00000013 addi x0,x0,0 +80006d3c: 00000013 addi x0,x0,0 +80006d40: 00009517 auipc x10,0x9 +80006d44: e5850513 addi x10,x10,-424 # 8000fb98 +80006d48: 00000013 addi x0,x0,0 +80006d4c: 00000013 addi x0,x0,0 +80006d50: 00000013 addi x0,x0,0 +80006d54: 00000013 addi x0,x0,0 +80006d58: 00000013 addi x0,x0,0 +80006d5c: 00000013 addi x0,x0,0 +80006d60: 0001b097 auipc x1,0x1b +80006d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80006d68: 00000097 auipc x1,0x0 +80006d6c: 0e8080e7 jalr x1,232(x1) # 80006e50 +80006d70: 0940006f jal x0,80006e04 + +80006d74 : +80006d74: 02054263 blt x10,x0,80006d98 + +80006d78 : +80006d78: 01800593 addi x11,x0,24 +80006d7c: 04b55463 bge x10,x11,80006dc4 +80006d80: 00009597 auipc x11,0x9 +80006d84: e4058593 addi x11,x11,-448 # 8000fbc0 +80006d88: 00251613 slli x12,x10,0x2 +80006d8c: 00c585b3 add x11,x11,x12 +80006d90: 0005a503 lw x10,0(x11) +80006d94: 00008067 jalr x0,0(x1) + +80006d98 : +80006d98: 00100593 addi x11,x0,1 +80006d9c: 01f59593 slli x11,x11,0x1f +80006da0: 00b54533 xor x10,x10,x11 +80006da4: 01000593 addi x11,x0,16 +80006da8: 00b55e63 bge x10,x11,80006dc4 +80006dac: 00009597 auipc x11,0x9 +80006db0: e7458593 addi x11,x11,-396 # 8000fc20 +80006db4: 00251613 slli x12,x10,0x2 +80006db8: 00c585b3 add x11,x11,x12 +80006dbc: 0005a503 lw x10,0(x11) +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 00009517 auipc x10,0x9 +80006de4: 27e50513 addi x10,x10,638 # 8001005e +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 00008067 jalr x0,0(x1) + +80006e04 : +80006e04: 00000013 addi x0,x0,0 +80006e08: 00000013 addi x0,x0,0 +80006e0c: 00000013 addi x0,x0,0 +80006e10: 00000013 addi x0,x0,0 +80006e14: 00000013 addi x0,x0,0 +80006e18: 00000013 addi x0,x0,0 +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: ed450513 addi x10,x10,-300 # 80010cf4 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 + +80006e48 : +80006e48: 0001a097 auipc x1,0x1a +80006e4c: 77c080e7 jalr x1,1916(x1) # 800215c4 + +80006e50 : +80006e50: 00009617 auipc x12,0x9 +80006e54: d2060613 addi x12,x12,-736 # 8000fb70 +80006e58: 00162023 sw x1,0(x12) +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 3fd50513 addi x10,x10,1021 # 8001025d +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00009517 auipc x10,0x9 +80006e8c: cf052503 lw x10,-784(x10) # 8000fb78 +80006e90: 02000593 addi x11,x0,32 +80006e94: 1c4000ef jal x1,80007058 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: cf850513 addi x10,x10,-776 # 8000fb98 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00000013 addi x0,x0,0 +80006ecc: 00000013 addi x0,x0,0 +80006ed0: 00000013 addi x0,x0,0 +80006ed4: 00000013 addi x0,x0,0 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 38d50513 addi x10,x10,909 # 8001026d +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00009517 auipc x10,0x9 +80006f0c: c7852503 lw x10,-904(x10) # 8000fb80 +80006f10: 02000593 addi x11,x0,32 +80006f14: 144000ef jal x1,80007058 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: c7850513 addi x10,x10,-904 # 8000fb98 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00000013 addi x0,x0,0 +80006f4c: 00000013 addi x0,x0,0 +80006f50: 00000013 addi x0,x0,0 +80006f54: 00000013 addi x0,x0,0 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 31d50513 addi x10,x10,797 # 8001027d +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00009517 auipc x10,0x9 +80006f8c: c0052503 lw x10,-1024(x10) # 8000fb88 +80006f90: 02000593 addi x11,x0,32 +80006f94: 0c4000ef jal x1,80007058 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: bf850513 addi x10,x10,-1032 # 8000fb98 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00000013 addi x0,x0,0 +80006fcc: 00000013 addi x0,x0,0 +80006fd0: 00000013 addi x0,x0,0 +80006fd4: 00000013 addi x0,x0,0 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 2ad50513 addi x10,x10,685 # 8001028d +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009517 auipc x10,0x9 +8000700c: b8852503 lw x10,-1144(x10) # 8000fb90 +80007010: 02000593 addi x11,x0,32 +80007014: 044000ef jal x1,80007058 +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009517 auipc x10,0x9 +80007024: b7850513 addi x10,x10,-1160 # 8000fb98 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 0001a097 auipc x1,0x1a +80007044: 524080e7 jalr x1,1316(x1) # 80021564 +80007048: 00009617 auipc x12,0x9 +8000704c: b2860613 addi x12,x12,-1240 # 8000fb70 +80007050: 00062083 lw x1,0(x12) +80007054: 00008067 jalr x0,0(x1) + +80007058 : +80007058: 00000013 addi x0,x0,0 +8000705c: 00000013 addi x0,x0,0 +80007060: 00009617 auipc x12,0x9 +80007064: b3860613 addi x12,x12,-1224 # 8000fb98 +80007068: 00000013 addi x0,x0,0 +8000706c: 00000013 addi x0,x0,0 +80007070: 00000013 addi x0,x0,0 +80007074: 00000013 addi x0,x0,0 +80007078: 00000013 addi x0,x0,0 +8000707c: 00000013 addi x0,x0,0 +80007080: 03000693 addi x13,x0,48 +80007084: 00d60023 sb x13,0(x12) +80007088: 07800693 addi x13,x0,120 +8000708c: 00d600a3 sb x13,1(x12) +80007090: 00260613 addi x12,x12,2 +80007094: 00058693 addi x13,x11,0 + +80007098 : +80007098: ffc68693 addi x13,x13,-4 +8000709c: 00d55733 srl x14,x10,x13 +800070a0: 00f77713 andi x14,x14,15 +800070a4: 00a00793 addi x15,x0,10 +800070a8: 00f74663 blt x14,x15,800070b4 +800070ac: 05770713 addi x14,x14,87 +800070b0: 0080006f jal x0,800070b8 + +800070b4 : +800070b4: 03070713 addi x14,x14,48 + +800070b8 : +800070b8: 00e60023 sb x14,0(x12) +800070bc: 00160613 addi x12,x12,1 +800070c0: fc069ce3 bne x13,x0,80007098 +800070c4: 00a00693 addi x13,x0,10 +800070c8: 00d60023 sb x13,0(x12) +800070cc: 000600a3 sb x0,1(x12) +800070d0: 00008067 jalr x0,0(x1) + +800070d4 : +800070d4: 00a00693 addi x13,x0,10 +800070d8: 02d54663 blt x10,x13,80007104 +800070dc: ff650513 addi x10,x10,-10 +800070e0: 03100713 addi x14,x0,49 +800070e4: 00d54c63 blt x10,x13,800070fc +800070e8: ff650513 addi x10,x10,-10 +800070ec: 03200713 addi x14,x0,50 +800070f0: 00d54663 blt x10,x13,800070fc +800070f4: ff650513 addi x10,x10,-10 +800070f8: 03300713 addi x14,x0,51 +800070fc: 00e60023 sb x14,0(x12) +80007100: 00160613 addi x12,x12,1 +80007104: 03050513 addi x10,x10,48 +80007108: 00a60023 sb x10,0(x12) +8000710c: 00a00693 addi x13,x0,10 +80007110: 00d600a3 sb x13,1(x12) +80007114: 00060123 sb x0,2(x12) +80007118: 00008067 jalr x0,0(x1) +8000711c: 00000013 addi x0,x0,0 +80007120: 00000013 addi x0,x0,0 +80007124: 00000013 addi x0,x0,0 +80007128: 00000013 addi x0,x0,0 +8000712c: 00000013 addi x0,x0,0 +80007130: 00000013 addi x0,x0,0 +80007134: 00000013 addi x0,x0,0 +80007138: 00000013 addi x0,x0,0 +8000713c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 23838393 addi x7,x7,568 # 80005240 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 21c38393 addi x7,x7,540 # 80005240 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 20438393 addi x7,x7,516 # 80005240 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1f038393 addi x7,x7,496 # 80005240 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1e438393 addi x7,x7,484 # 80005240 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 1b038393 addi x7,x7,432 # 80005240 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 40430313 addi x6,x6,1028 # 800044a0 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 19838393 addi x7,x7,408 # 80005240 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3ec30313 addi x6,x6,1004 # 800044a0 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 18038393 addi x7,x7,384 # 80005240 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3d430313 addi x6,x6,980 # 800044a0 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 16838393 addi x7,x7,360 # 80005240 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 27078793 addi x15,x15,624 # 800044b0 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 2d010113 addi x2,x2,720 # 80011770 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 06018193 addi x3,x3,96 # 80005540 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010d1d .word 0x80010d1d +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 35828293 addi x5,x5,856 # 80020900 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 33828293 addi x5,x5,824 # 80020900 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-rev8-00.elf.objdump b/riscv-tests/rv32-Zbkb-rev8-00.elf.objdump new file mode 100644 index 0000000..0961dc2 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-rev8-00.elf.objdump @@ -0,0 +1,6273 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rev8-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rev8-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00012540 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016600 80016600 00017600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000089a 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 00000000 00000000 00018f15 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f8f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fb2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fc8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 00000000 00000000 00018ff0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019078 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016600 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccW0HemY.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b1 +80004591 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b2 +800045c2 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b3 +800045f3 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b4 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004624 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b5 +80004655 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b6 +80004686 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b7 +800046b7 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b8 +800046e8 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b8_str +800001a4 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b9 +80004719 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b9_str +800001c8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b10 +8000474b l .data 00000000 Zbkb_rev8_cg_cp_rs1_b10_str +800001ec l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b11 +8000477e l .data 00000000 Zbkb_rev8_cg_cp_rs1_b11_str +80000210 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b12 +800047b1 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b12_str +80000234 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b13 +800047e4 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b13_str +80000258 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b14 +80004817 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b14_str +80000280 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b15 +8000484a l .data 00000000 Zbkb_rev8_cg_cp_rs1_b15_str +800002a4 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b16 +8000487d l .data 00000000 Zbkb_rev8_cg_cp_rs1_b16_str +800002c8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b17 +800048b0 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b17_str +800002ec l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b18 +800048e3 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b18_str +80000310 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b19 +80004916 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b19_str +80000334 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b20 +80004949 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b20_str +8000035c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b21 +8000497c l .data 00000000 Zbkb_rev8_cg_cp_rs1_b21_str +80000380 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b22 +800049af l .data 00000000 Zbkb_rev8_cg_cp_rs1_b22_str +800003a8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b23 +800049e2 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b23_str +800003cc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b24 +80004a15 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b24_str +800003f0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b25 +80004a48 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b25_str +80000418 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b26 +80004a7b l .data 00000000 Zbkb_rev8_cg_cp_rs1_b26_str +8000043c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b27 +80004aae l .data 00000000 Zbkb_rev8_cg_cp_rs1_b27_str +80000460 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b28 +80004ae1 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b28_str +80000484 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b29 +80004b14 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b29_str +800004a8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b30 +80004b47 l .data 00000000 Zbkb_rev8_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_b31 +80004b7a l .data 00000000 Zbkb_rev8_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b0 +80004bad l .data 00000000 Zbkb_rev8_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b1 +80004bde l .data 00000000 Zbkb_rev8_cg_cp_rd_b1_str +80000538 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b2 +80004c0f l .data 00000000 Zbkb_rev8_cg_cp_rd_b2_str +8000055c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b3 +80004c40 l .data 00000000 Zbkb_rev8_cg_cp_rd_b3_str +80000588 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b4 +80004c71 l .data 00000000 Zbkb_rev8_cg_cp_rd_b4_str +800005ac l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b5 +80004ca2 l .data 00000000 Zbkb_rev8_cg_cp_rd_b5_str +800005d0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b6 +80004cd3 l .data 00000000 Zbkb_rev8_cg_cp_rd_b6_str +800005fc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b7 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +80004d04 l .data 00000000 Zbkb_rev8_cg_cp_rd_b7_str +80000620 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b8 +80004d35 l .data 00000000 Zbkb_rev8_cg_cp_rd_b8_str +80000644 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b9 +80004d66 l .data 00000000 Zbkb_rev8_cg_cp_rd_b9_str +8000066c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b10 +80004d97 l .data 00000000 Zbkb_rev8_cg_cp_rd_b10_str +80000690 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b11 +80004dc9 l .data 00000000 Zbkb_rev8_cg_cp_rd_b11_str +800006b4 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b12 +80004dfb l .data 00000000 Zbkb_rev8_cg_cp_rd_b12_str +800006e0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b13 +80004e2d l .data 00000000 Zbkb_rev8_cg_cp_rd_b13_str +80000704 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b14 +80004e5f l .data 00000000 Zbkb_rev8_cg_cp_rd_b14_str +80000728 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b15 +80004e91 l .data 00000000 Zbkb_rev8_cg_cp_rd_b15_str +8000074c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b16 +80004ec3 l .data 00000000 Zbkb_rev8_cg_cp_rd_b16_str +80000770 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b17 +80004ef5 l .data 00000000 Zbkb_rev8_cg_cp_rd_b17_str +80000794 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b18 +80004f27 l .data 00000000 Zbkb_rev8_cg_cp_rd_b18_str +800007bc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b19 +80004f59 l .data 00000000 Zbkb_rev8_cg_cp_rd_b19_str +800007e0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b20 +80004f8b l .data 00000000 Zbkb_rev8_cg_cp_rd_b20_str +80000808 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b21 +80004fbd l .data 00000000 Zbkb_rev8_cg_cp_rd_b21_str +8000082c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b22 +80004fef l .data 00000000 Zbkb_rev8_cg_cp_rd_b22_str +80000850 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b23 +80005021 l .data 00000000 Zbkb_rev8_cg_cp_rd_b23_str +80000874 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b24 +80005053 l .data 00000000 Zbkb_rev8_cg_cp_rd_b24_str +80000898 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b25 +80005085 l .data 00000000 Zbkb_rev8_cg_cp_rd_b25_str +800008bc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b26 +800050b7 l .data 00000000 Zbkb_rev8_cg_cp_rd_b26_str +800008e0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b27 +800050e9 l .data 00000000 Zbkb_rev8_cg_cp_rd_b27_str +80000904 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b28 +8000511b l .data 00000000 Zbkb_rev8_cg_cp_rd_b28_str +80000928 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b29 +8000514d l .data 00000000 Zbkb_rev8_cg_cp_rd_b29_str +8000094c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b30 +8000517f l .data 00000000 Zbkb_rev8_cg_cp_rd_b30_str +80000974 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rd_b31 +800051b1 l .data 00000000 Zbkb_rev8_cg_cp_rd_b31_str +80000998 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x0 +800051e3 l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x0_str +800009bc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x1 +8000521c l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x1_str +800009e0 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x2 +80005255 l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x2_str +80000a04 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x80000000 +8000528e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x80000000_str +80000a28 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x80000001 +800052ce l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x80000001_str +80000a4c l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x7fffffff +8000530e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x7fffffff_str +80000a70 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffe +8000534e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffe_str +80000a94 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xffffffff +8000538e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xffffffff_str +80000ab8 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe +800053ce l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe_str +80000adc l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x5bbc8872 +8000540e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x5bbc8872_str +80000b00 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaa +8000544e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b24 l .text.rvtest 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x55555555 +8000548e l .data 00000000 Zbkb_rev8_cg_cp_rs1_edges_0x55555555_str +80000b48 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b0 +800054ce l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b0_str +80000b6c l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b1 +80005504 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b1_str +80000b94 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b2 +8000553a l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b2_str +80000bb8 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b3 +80005570 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b3_str +80000bdc l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b4 +800055a6 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b4_str +80000c00 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b5 +800055dc l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b5_str +80000c24 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b6 +80005612 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b6_str +80000c50 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b7 +80005648 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b7_str +80000c74 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b8 +8000567e l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b8_str +80000c98 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b9 +800056b4 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b9_str +80000cbc l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b10 +800056ea l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b10_str +80000ce0 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b11 +80005721 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b11_str +80000d08 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b12 +80005758 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b12_str +80000d34 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b13 +8000578f l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b13_str +80000d58 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b14 +800057c6 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b14_str +80000d7c l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b15 +800057fd l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b15_str +80000da0 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b16 +80005834 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b16_str +80000dc4 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b17 +8000586b l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b17_str +80000de8 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b18 +800058a2 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b18_str +80000e0c l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b19 +800058d9 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b19_str +80000e30 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b20 +80005910 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b20_str +80000e54 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b21 +80005947 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b21_str +80000e78 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b22 +8000597e l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b22_str +80000e9c l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b23 +800059b5 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b23_str +80000ec0 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b24 +800059ed l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b24_str +80000ee4 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b25 +80005a25 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b25_str +80000f08 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b26 +80005a5d l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b26_str +80000f2c l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b27 +80005a95 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b27_str +80000f50 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b28 +80005acd l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b28_str +80000f74 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b29 +80005b05 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b29_str +80000f98 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b30 +80005b3d l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b30_str +80000fc0 l .text.rvtest 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b31 +80005b75 l .data 00000000 Zbkb_rev8_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000ff0 l .text.rvtest 00000000 exit_Mcleanup +80000ff4 l .text.rvtest 00000000 resto_Medeleg +80000ffc l .text.rvtest 00000000 resto_Msatp +80001000 l .text.rvtest 00000000 resto_Mscratch +80001008 l .text.rvtest 00000000 resto_Mxtvec +8000101c l .text.rvtest 00000000 resto_Mtramp +80001020 l .text.rvtest 00000000 resto_Mloop +80001038 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +8000622e l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006267 l .data 00000000 begin_debugstr +800062c7 l .data 00000000 trap_sig_overflowstr +80006e72 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007ad8 l .data 00000000 trap_sigptr +80007ad0 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000641b l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +80006289 l .data 00000000 abortstr +800061f4 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +800078a9 l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005d18 l .data 00000000 ascii_buffer +80006330 l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005cf8 l .data 00000000 saved_xepc +8001653c l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +80006432 l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +80006534 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +8000662f l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +80006722 l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006895 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005bb0 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005bb0 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005cd8 l .data 00000000 failure_diag_type +80005ce8 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005ce0 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +80006819 l .data 00000000 sv_Mtval2_str +80006857 l .data 00000000 sv_Mtinst_str +80006472 l .data 00000000 sv_Svect_str +80006572 l .data 00000000 sv_Scause_str +8000666b l .data 00000000 sv_Sepc_str +8000675f l .data 00000000 sv_Stval_str +800068d0 l .data 00000000 sv_Sip_str +800064b2 l .data 00000000 sv_Hvect_str +800065b0 l .data 00000000 sv_Hcause_str +800066a7 l .data 00000000 sv_Hepc_str +8000679c l .data 00000000 sv_Htval_str +8000690b l .data 00000000 sv_Hip_str +800064f3 l .data 00000000 sv_Vvect_str +800065ef l .data 00000000 sv_Vcause_str +800066e4 l .data 00000000 sv_Vepc_str +800067da l .data 00000000 sv_Vtval_str +80006947 l .data 00000000 sv_Vip_str +80006984 l .data 00000000 Mclr_Mext_int_str +800069d3 l .data 00000000 Mclr_Sext_int_str +80006ace l .data 00000000 Sclr_Sext_int_str +80006bca l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005ce4 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +8000631e l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005cd0 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +80006332 l .data 00000000 inststr +80005cb0 l .data 00000000 failing_instruction +80006346 l .data 00000000 addrstr +80005cb8 l .data 00000000 failing_addr +80006d7d l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005cb4 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +80006e93 l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80006d76 l .data 00000000 vxsatstr +80006d8e l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005cc0 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80006da5 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005cc8 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006dbc l .data 00000000 failure_diag_bad_instr_str +80006e1a l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +80006ebf l .data 00000000 trap_diag_header_str +80006eeb l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80006efb l .data 00000000 trap_diag_expected_offset_str +80006f26 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +80006f55 l .data 00000000 trap_diag_extra_traps_str +80006fbd l .data 00000000 trap_diag_diff_bytes_str +80006fe4 l .data 00000000 trap_diag_extra_next_step_str +80006f81 l .data 00000000 trap_diag_missing_traps_str +800070cc l .data 00000000 trap_diag_missing_next_step_str +800071b3 l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +800071ef l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +800071cd l .data 00000000 trap_diag_mode_m_str +800071d5 l .data 00000000 trap_diag_mode_s_str +800071dd l .data 00000000 trap_diag_mode_hs_str +800071e6 l .data 00000000 trap_diag_mode_vs_str +800071f8 l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +8000734f l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +80007212 l .data 00000000 trap_diag_field_vect_str +80007243 l .data 00000000 trap_diag_field_cause_str +80007263 l .data 00000000 trap_diag_field_epc_str +80007281 l .data 00000000 trap_diag_field_tval_str +800072a0 l .data 00000000 trap_diag_field_ip_str +800072c8 l .data 00000000 trap_diag_field_tval2_str +800072f4 l .data 00000000 trap_diag_field_tinst_str +80007320 l .data 00000000 trap_diag_field_intid_str +8000735e l .data 00000000 trap_diag_expected_str +80007375 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +8000738c l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +800073a3 l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +80007419 l .data 00000000 trap_diag_hint_vect_str +800074ef l .data 00000000 trap_diag_hint_cause_str +800075e2 l .data 00000000 trap_diag_hint_epc_str +800076dd l .data 00000000 trap_diag_hint_tval_str +800077c4 l .data 00000000 trap_diag_hint_ip_str +800073d1 l .data 00000000 trap_diag_generic_str +800063ba l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005d40 l .data 00000000 trap_excpt_name_tbl +80005da0 l .data 00000000 trap_int_name_tbl +800061de l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005cf0 l .data 00000000 csr_context_ret_addr +800063db l .data 00000000 mepcstr +800063eb l .data 00000000 mcausestr +80005d00 l .data 00000000 saved_xcause +800063fb l .data 00000000 mtvalstr +80005d08 l .data 00000000 saved_xtval +8000640b l .data 00000000 mstatusstr +80005d10 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +800078f0 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006e9b l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005d40 l .data 00000000 end_failure_scratch +80005de0 l .data 00000000 trap_excpt_name_0 +80005e00 l .data 00000000 trap_excpt_name_1 +80005e1a l .data 00000000 trap_excpt_name_2 +80005e2f l .data 00000000 trap_excpt_name_3 +80005e3b l .data 00000000 trap_excpt_name_4 +80005e54 l .data 00000000 trap_excpt_name_5 +80005e67 l .data 00000000 trap_excpt_name_6 +80005e85 l .data 00000000 trap_excpt_name_7 +80005e9d l .data 00000000 trap_excpt_name_8 +80005ebb l .data 00000000 trap_excpt_name_9 +80005ed9 l .data 00000000 trap_excpt_name_10 +80005ef8 l .data 00000000 trap_excpt_name_11 +80005f16 l .data 00000000 trap_excpt_name_12 +80005f2e l .data 00000000 trap_excpt_name_13 +80005f3f l .data 00000000 trap_excpt_name_14 +80005f4e l .data 00000000 trap_excpt_name_15 +80005f64 l .data 00000000 trap_excpt_name_16 +80005f71 l .data 00000000 trap_excpt_name_17 +80005f80 l .data 00000000 trap_excpt_name_18 +80005f90 l .data 00000000 trap_excpt_name_19 +80005fa0 l .data 00000000 trap_excpt_name_20 +80005fbe l .data 00000000 trap_excpt_name_21 +80005fd5 l .data 00000000 trap_excpt_name_22 +80005fea l .data 00000000 trap_excpt_name_23 +80006006 l .data 00000000 trap_int_name_0 +8000601e l .data 00000000 trap_int_name_1 +8000603d l .data 00000000 trap_int_name_2 +80006064 l .data 00000000 trap_int_name_3 +80006080 l .data 00000000 trap_int_name_4 +80006098 l .data 00000000 trap_int_name_5 +800060b4 l .data 00000000 trap_int_name_6 +800060d8 l .data 00000000 trap_int_name_7 +800060f1 l .data 00000000 trap_int_name_8 +80006109 l .data 00000000 trap_int_name_9 +80006128 l .data 00000000 trap_int_name_10 +8000614f l .data 00000000 trap_int_name_11 +8000616b l .data 00000000 trap_int_name_12 +80006190 l .data 00000000 trap_int_name_13 +800061ac l .data 00000000 trap_int_name_14 +800061c5 l .data 00000000 trap_int_name_15 +80006387 l .data 00000000 xepcstr +80006a25 l .data 00000000 Mclr_Vext_int_str +80006a7f l .data 00000000 Sclr_Mext_int_str +80006b20 l .data 00000000 Sclr_Vext_int_str +80006b7a l .data 00000000 Hclr_Mext_int_str +80006c1d l .data 00000000 Hclr_Vext_int_str +80006c78 l .data 00000000 Vclr_Mext_int_str +80006cc8 l .data 00000000 Vclr_Sext_int_str +80006d1b l .data 00000000 Vclr_Vext_int_str +800073ba l .data 00000000 trap_diag_curr_xepc_str +80016540 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80016540 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001038 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800078f0 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fe0 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800078f0 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +800078ed g .data 00000000 rvtest_data_end +80000fe0 g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016700 g .tohost 00000000 fromhost +80016600 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x5b9beab0 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zbkb_rev8_cg_cp_rs1_b0: + rev8 x26, x0 # perform operation +80000048: 69805d13 rev8 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_rev8_cg_cp_rs1_b0, Zbkb_rev8_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01a20863 beq x4,x26,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xd85893bb +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zbkb_rev8_cg_cp_rs1_b1: + rev8 x30, x1 # perform operation +8000006c: 6980df13 rev8 x30,x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_rev8_cg_cp_rs1_b1, Zbkb_rev8_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01e20863 beq x4,x30,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004591 .word 0x80004591 +80000084: 00410113 addi x2,x2,4 + + mv x23, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010b93 addi x23,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x8f8ff699 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zbkb_rev8_cg_cp_rs1_b2: + rev8 x26, x2 # perform operation +80000094: 69815d13 rev8 x26,x2 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_rev8_cg_cp_rs1_b2, Zbkb_rev8_cg_cp_rs1_b2_str) +80000098: 000ba203 lw x4,0(x23) +8000009c: 01a20863 beq x4,x26,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c2 .word 0x800045c2 +800000ac: 004b8b93 addi x23,x23,4 + + mv x15, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018793 addi x15,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xc1fa26e5 +800000b4: 0007a183 lw x3,0(x15) +800000b8: 00478793 addi x15,x15,4 + +800000bc : +Zbkb_rev8_cg_cp_rs1_b3: + rev8 x20, x3 # perform operation +800000bc: 6981da13 rev8 x20,x3 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_rev8_cg_cp_rs1_b3, Zbkb_rev8_cg_cp_rs1_b3_str) +800000c0: 000ba203 lw x4,0(x23) +800000c4: 01420863 beq x4,x20,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f3 .word 0x800045f3 +800000d4: 004b8b93 addi x23,x23,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x7c7e64c8 +800000e0: 0007a203 lw x4,0(x15) +800000e4: 00478793 addi x15,x15,4 + +800000e8 : +Zbkb_rev8_cg_cp_rs1_b4: + rev8 x26, x4 # perform operation +800000e8: 69825d13 rev8 x26,x4 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_rev8_cg_cp_rs1_b4, Zbkb_rev8_cg_cp_rs1_b4_str) +800000ec: 000ba383 lw x7,0(x23) +800000f0: 01a38863 beq x7,x26,80000100 +800000f4: 7a50146f jal x8,80002098 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004624 .word 0x80004624 +80000100: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xc486aae1 +80000104: 0007a283 lw x5,0(x15) +80000108: 00478793 addi x15,x15,4 + +8000010c : +Zbkb_rev8_cg_cp_rs1_b5: + rev8 x27, x5 # perform operation +8000010c: 6982dd93 rev8 x27,x5 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_rev8_cg_cp_rs1_b5, Zbkb_rev8_cg_cp_rs1_b5_str) +80000110: 000ba383 lw x7,0(x23) +80000114: 01b38863 beq x7,x27,80000124 +80000118: 7810146f jal x8,80002098 +8000011c: 8000010c .word 0x8000010c +80000120: 80004655 .word 0x80004655 +80000124: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xc20e00e1 +80000128: 0007a303 lw x6,0(x15) +8000012c: 00478793 addi x15,x15,4 + +80000130 : +Zbkb_rev8_cg_cp_rs1_b6: + rev8 x19, x6 # perform operation +80000130: 69835993 rev8 x19,x6 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_rev8_cg_cp_rs1_b6, Zbkb_rev8_cg_cp_rs1_b6_str) +80000134: 000ba383 lw x7,0(x23) +80000138: 01338863 beq x7,x19,80000148 +8000013c: 75d0146f jal x8,80002098 +80000140: 80000130 .word 0x80000130 +80000144: 80004686 .word 0x80004686 +80000148: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +8000014c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000150: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x407cae21 +80000154: 0007a383 lw x7,0(x15) +80000158: 00478793 addi x15,x15,4 + +8000015c : +Zbkb_rev8_cg_cp_rs1_b7: + rev8 x20, x7 # perform operation +8000015c: 6983da13 rev8 x20,x7 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_rev8_cg_cp_rs1_b7, Zbkb_rev8_cg_cp_rs1_b7_str) +80000160: 000ba203 lw x4,0(x23) +80000164: 01420863 beq x4,x20,80000174 +80000168: 719012ef jal x5,80002080 +8000016c: 8000015c .word 0x8000015c +80000170: 800046b7 .word 0x800046b7 +80000174: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x871f8ce5 +80000178: 0007a403 lw x8,0(x15) +8000017c: 00478793 addi x15,x15,4 + +80000180 : +Zbkb_rev8_cg_cp_rs1_b8: + rev8 x24, x8 # perform operation +80000180: 69845c13 rev8 x24,x8 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_rev8_cg_cp_rs1_b8, Zbkb_rev8_cg_cp_rs1_b8_str) +80000184: 000ba203 lw x4,0(x23) +80000188: 01820863 beq x4,x24,80000198 +8000018c: 6f5012ef jal x5,80002080 +80000190: 80000180 .word 0x80000180 +80000194: 800046e8 .word 0x800046e8 +80000198: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xb040c241 +8000019c: 0007a483 lw x9,0(x15) +800001a0: 00478793 addi x15,x15,4 + +800001a4 : +Zbkb_rev8_cg_cp_rs1_b9: + rev8 x17, x9 # perform operation +800001a4: 6984d893 rev8 x17,x9 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_rev8_cg_cp_rs1_b9, Zbkb_rev8_cg_cp_rs1_b9_str) +800001a8: 000ba203 lw x4,0(x23) +800001ac: 01120863 beq x4,x17,800001bc +800001b0: 6d1012ef jal x5,80002080 +800001b4: 800001a4 .word 0x800001a4 +800001b8: 80004719 .word 0x80004719 +800001bc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x6e05e8a1 +800001c0: 0007a503 lw x10,0(x15) +800001c4: 00478793 addi x15,x15,4 + +800001c8 : +Zbkb_rev8_cg_cp_rs1_b10: + rev8 x11, x10 # perform operation +800001c8: 69855593 rev8 x11,x10 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_rev8_cg_cp_rs1_b10, Zbkb_rev8_cg_cp_rs1_b10_str) +800001cc: 000ba203 lw x4,0(x23) +800001d0: 00b20863 beq x4,x11,800001e0 +800001d4: 6ad012ef jal x5,80002080 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 8000474b .word 0x8000474b +800001e0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xce891b63 +800001e4: 0007a583 lw x11,0(x15) +800001e8: 00478793 addi x15,x15,4 + +800001ec : +Zbkb_rev8_cg_cp_rs1_b11: + rev8 x17, x11 # perform operation +800001ec: 6985d893 rev8 x17,x11 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_rev8_cg_cp_rs1_b11, Zbkb_rev8_cg_cp_rs1_b11_str) +800001f0: 000ba203 lw x4,0(x23) +800001f4: 01120863 beq x4,x17,80000204 +800001f8: 689012ef jal x5,80002080 +800001fc: 800001ec .word 0x800001ec +80000200: 8000477e .word 0x8000477e +80000204: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xa118d8e3 +80000208: 0007a603 lw x12,0(x15) +8000020c: 00478793 addi x15,x15,4 + +80000210 : +Zbkb_rev8_cg_cp_rs1_b12: + rev8 x17, x12 # perform operation +80000210: 69865893 rev8 x17,x12 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_rev8_cg_cp_rs1_b12, Zbkb_rev8_cg_cp_rs1_b12_str) +80000214: 000ba203 lw x4,0(x23) +80000218: 01120863 beq x4,x17,80000228 +8000021c: 665012ef jal x5,80002080 +80000220: 80000210 .word 0x80000210 +80000224: 800047b1 .word 0x800047b1 +80000228: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x7f4680cf +8000022c: 0007a683 lw x13,0(x15) +80000230: 00478793 addi x15,x15,4 + +80000234 : +Zbkb_rev8_cg_cp_rs1_b13: + rev8 x29, x13 # perform operation +80000234: 6986de93 rev8 x29,x13 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_rev8_cg_cp_rs1_b13, Zbkb_rev8_cg_cp_rs1_b13_str) +80000238: 000ba203 lw x4,0(x23) +8000023c: 01d20863 beq x4,x29,8000024c +80000240: 641012ef jal x5,80002080 +80000244: 80000234 .word 0x80000234 +80000248: 800047e4 .word 0x800047e4 +8000024c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x468b34ca +80000250: 0007a703 lw x14,0(x15) +80000254: 00478793 addi x15,x15,4 + +80000258 : +Zbkb_rev8_cg_cp_rs1_b14: + rev8 x1, x14 # perform operation +80000258: 69875093 rev8 x1,x14 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkb_rev8_cg_cp_rs1_b14, Zbkb_rev8_cg_cp_rs1_b14_str) +8000025c: 000ba203 lw x4,0(x23) +80000260: 00120863 beq x4,x1,80000270 +80000264: 61d012ef jal x5,80002080 +80000268: 80000258 .word 0x80000258 +8000026c: 80004817 .word 0x80004817 +80000270: 004b8b93 addi x23,x23,4 + + mv x21, x15 # switch data pointer register to avoid conflict with test +80000274: 00078a93 addi x21,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xb1a5aeca +80000278: 000aa783 lw x15,0(x21) +8000027c: 004a8a93 addi x21,x21,4 + +80000280 : +Zbkb_rev8_cg_cp_rs1_b15: + rev8 x8, x15 # perform operation +80000280: 6987d413 rev8 x8,x15 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_rev8_cg_cp_rs1_b15, Zbkb_rev8_cg_cp_rs1_b15_str) +80000284: 000ba203 lw x4,0(x23) +80000288: 00820863 beq x4,x8,80000298 +8000028c: 5f5012ef jal x5,80002080 +80000290: 80000280 .word 0x80000280 +80000294: 8000484a .word 0x8000484a +80000298: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x3260e256 +8000029c: 000aa803 lw x16,0(x21) +800002a0: 004a8a93 addi x21,x21,4 + +800002a4 : +Zbkb_rev8_cg_cp_rs1_b16: + rev8 x26, x16 # perform operation +800002a4: 69885d13 rev8 x26,x16 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_rev8_cg_cp_rs1_b16, Zbkb_rev8_cg_cp_rs1_b16_str) +800002a8: 000ba203 lw x4,0(x23) +800002ac: 01a20863 beq x4,x26,800002bc +800002b0: 5d1012ef jal x5,80002080 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 8000487d .word 0x8000487d +800002bc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xe5ec6fe6 +800002c0: 000aa883 lw x17,0(x21) +800002c4: 004a8a93 addi x21,x21,4 + +800002c8 : +Zbkb_rev8_cg_cp_rs1_b17: + rev8 x7, x17 # perform operation +800002c8: 6988d393 rev8 x7,x17 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_rev8_cg_cp_rs1_b17, Zbkb_rev8_cg_cp_rs1_b17_str) +800002cc: 000ba203 lw x4,0(x23) +800002d0: 00720863 beq x4,x7,800002e0 +800002d4: 5ad012ef jal x5,80002080 +800002d8: 800002c8 .word 0x800002c8 +800002dc: 800048b0 .word 0x800048b0 +800002e0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xe12282b3 +800002e4: 000aa903 lw x18,0(x21) +800002e8: 004a8a93 addi x21,x21,4 + +800002ec : +Zbkb_rev8_cg_cp_rs1_b18: + rev8 x0, x18 # perform operation +800002ec: 69895013 rev8 x0,x18 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zbkb_rev8_cg_cp_rs1_b18, Zbkb_rev8_cg_cp_rs1_b18_str) +800002f0: 000ba203 lw x4,0(x23) +800002f4: 00020863 beq x4,x0,80000304 +800002f8: 589012ef jal x5,80002080 +800002fc: 800002ec .word 0x800002ec +80000300: 800048e3 .word 0x800048e3 +80000304: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xecd2b997 +80000308: 000aa983 lw x19,0(x21) +8000030c: 004a8a93 addi x21,x21,4 + +80000310 : +Zbkb_rev8_cg_cp_rs1_b19: + rev8 x27, x19 # perform operation +80000310: 6989dd93 rev8 x27,x19 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_rev8_cg_cp_rs1_b19, Zbkb_rev8_cg_cp_rs1_b19_str) +80000314: 000ba203 lw x4,0(x23) +80000318: 01b20863 beq x4,x27,80000328 +8000031c: 565012ef jal x5,80002080 +80000320: 80000310 .word 0x80000310 +80000324: 80004916 .word 0x80004916 +80000328: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x83457489 +8000032c: 000aaa03 lw x20,0(x21) +80000330: 004a8a93 addi x21,x21,4 + +80000334 : +Zbkb_rev8_cg_cp_rs1_b20: + rev8 x18, x20 # perform operation +80000334: 698a5913 rev8 x18,x20 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_rev8_cg_cp_rs1_b20, Zbkb_rev8_cg_cp_rs1_b20_str) +80000338: 000ba203 lw x4,0(x23) +8000033c: 01220863 beq x4,x18,8000034c +80000340: 541012ef jal x5,80002080 +80000344: 80000334 .word 0x80000334 +80000348: 80004949 .word 0x80004949 +8000034c: 004b8b93 addi x23,x23,4 + + mv x26, x21 # switch data pointer register to avoid conflict with test +80000350: 000a8d13 addi x26,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xad505f3a +80000354: 000d2a83 lw x21,0(x26) +80000358: 004d0d13 addi x26,x26,4 + +8000035c : +Zbkb_rev8_cg_cp_rs1_b21: + rev8 x18, x21 # perform operation +8000035c: 698ad913 rev8 x18,x21 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_rev8_cg_cp_rs1_b21, Zbkb_rev8_cg_cp_rs1_b21_str) +80000360: 000ba203 lw x4,0(x23) +80000364: 01220863 beq x4,x18,80000374 +80000368: 519012ef jal x5,80002080 +8000036c: 8000035c .word 0x8000035c +80000370: 8000497c .word 0x8000497c +80000374: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x3d523bd1 +80000378: 000d2b03 lw x22,0(x26) +8000037c: 004d0d13 addi x26,x26,4 + +80000380 : +Zbkb_rev8_cg_cp_rs1_b22: + rev8 x27, x22 # perform operation +80000380: 698b5d93 rev8 x27,x22 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_rev8_cg_cp_rs1_b22, Zbkb_rev8_cg_cp_rs1_b22_str) +80000384: 000ba203 lw x4,0(x23) +80000388: 01b20863 beq x4,x27,80000398 +8000038c: 4f5012ef jal x5,80002080 +80000390: 80000380 .word 0x80000380 +80000394: 800049af .word 0x800049af +80000398: 004b8b93 addi x23,x23,4 + + mv x19, x23 # switch signature pointer register to avoid conflict with test +8000039c: 000b8993 addi x19,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x74924c4f +800003a0: 000d2b83 lw x23,0(x26) +800003a4: 004d0d13 addi x26,x26,4 + +800003a8 : +Zbkb_rev8_cg_cp_rs1_b23: + rev8 x27, x23 # perform operation +800003a8: 698bdd93 rev8 x27,x23 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_rev8_cg_cp_rs1_b23, Zbkb_rev8_cg_cp_rs1_b23_str) +800003ac: 0009a203 lw x4,0(x19) +800003b0: 01b20863 beq x4,x27,800003c0 +800003b4: 4cd012ef jal x5,80002080 +800003b8: 800003a8 .word 0x800003a8 +800003bc: 800049e2 .word 0x800049e2 +800003c0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x1ebefe14 +800003c4: 000d2c03 lw x24,0(x26) +800003c8: 004d0d13 addi x26,x26,4 + +800003cc : +Zbkb_rev8_cg_cp_rs1_b24: + rev8 x25, x24 # perform operation +800003cc: 698c5c93 rev8 x25,x24 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_rev8_cg_cp_rs1_b24, Zbkb_rev8_cg_cp_rs1_b24_str) +800003d0: 0009a203 lw x4,0(x19) +800003d4: 01920863 beq x4,x25,800003e4 +800003d8: 4a9012ef jal x5,80002080 +800003dc: 800003cc .word 0x800003cc +800003e0: 80004a15 .word 0x80004a15 +800003e4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xc2c3e1c4 +800003e8: 000d2c83 lw x25,0(x26) +800003ec: 004d0d13 addi x26,x26,4 + +800003f0 : +Zbkb_rev8_cg_cp_rs1_b25: + rev8 x21, x25 # perform operation +800003f0: 698cda93 rev8 x21,x25 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkb_rev8_cg_cp_rs1_b25, Zbkb_rev8_cg_cp_rs1_b25_str) +800003f4: 0009a203 lw x4,0(x19) +800003f8: 01520863 beq x4,x21,80000408 +800003fc: 485012ef jal x5,80002080 +80000400: 800003f0 .word 0x800003f0 +80000404: 80004a48 .word 0x80004a48 +80000408: 00498993 addi x19,x19,4 + + mv x10, x26 # switch data pointer register to avoid conflict with test +8000040c: 000d0513 addi x10,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x2fa835ba +80000410: 00052d03 lw x26,0(x10) +80000414: 00450513 addi x10,x10,4 + +80000418 : +Zbkb_rev8_cg_cp_rs1_b26: + rev8 x8, x26 # perform operation +80000418: 698d5413 rev8 x8,x26 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_rev8_cg_cp_rs1_b26, Zbkb_rev8_cg_cp_rs1_b26_str) +8000041c: 0009a203 lw x4,0(x19) +80000420: 00820863 beq x4,x8,80000430 +80000424: 45d012ef jal x5,80002080 +80000428: 80000418 .word 0x80000418 +8000042c: 80004a7b .word 0x80004a7b +80000430: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xe7212465 +80000434: 00052d83 lw x27,0(x10) +80000438: 00450513 addi x10,x10,4 + +8000043c : +Zbkb_rev8_cg_cp_rs1_b27: + rev8 x24, x27 # perform operation +8000043c: 698ddc13 rev8 x24,x27 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_rev8_cg_cp_rs1_b27, Zbkb_rev8_cg_cp_rs1_b27_str) +80000440: 0009a203 lw x4,0(x19) +80000444: 01820863 beq x4,x24,80000454 +80000448: 439012ef jal x5,80002080 +8000044c: 8000043c .word 0x8000043c +80000450: 80004aae .word 0x80004aae +80000454: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7480d032 +80000458: 00052e03 lw x28,0(x10) +8000045c: 00450513 addi x10,x10,4 + +80000460 : +Zbkb_rev8_cg_cp_rs1_b28: + rev8 x6, x28 # perform operation +80000460: 698e5313 rev8 x6,x28 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_rev8_cg_cp_rs1_b28, Zbkb_rev8_cg_cp_rs1_b28_str) +80000464: 0009a203 lw x4,0(x19) +80000468: 00620863 beq x4,x6,80000478 +8000046c: 415012ef jal x5,80002080 +80000470: 80000460 .word 0x80000460 +80000474: 80004ae1 .word 0x80004ae1 +80000478: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xcc8d564e +8000047c: 00052e83 lw x29,0(x10) +80000480: 00450513 addi x10,x10,4 + +80000484 : +Zbkb_rev8_cg_cp_rs1_b29: + rev8 x7, x29 # perform operation +80000484: 698ed393 rev8 x7,x29 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_rev8_cg_cp_rs1_b29, Zbkb_rev8_cg_cp_rs1_b29_str) +80000488: 0009a203 lw x4,0(x19) +8000048c: 00720863 beq x4,x7,8000049c +80000490: 3f1012ef jal x5,80002080 +80000494: 80000484 .word 0x80000484 +80000498: 80004b14 .word 0x80004b14 +8000049c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0ab7309e +800004a0: 00052f03 lw x30,0(x10) +800004a4: 00450513 addi x10,x10,4 + +800004a8 : +Zbkb_rev8_cg_cp_rs1_b30: + rev8 x28, x30 # perform operation +800004a8: 698f5e13 rev8 x28,x30 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_rev8_cg_cp_rs1_b30, Zbkb_rev8_cg_cp_rs1_b30_str) +800004ac: 0009a203 lw x4,0(x19) +800004b0: 01c20863 beq x4,x28,800004c0 +800004b4: 3cd012ef jal x5,80002080 +800004b8: 800004a8 .word 0x800004a8 +800004bc: 80004b47 .word 0x80004b47 +800004c0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x45323f6b +800004c4: 00052f83 lw x31,0(x10) +800004c8: 00450513 addi x10,x10,4 + +800004cc : +Zbkb_rev8_cg_cp_rs1_b31: + rev8 x24, x31 # perform operation +800004cc: 698fdc13 rev8 x24,x31 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_rev8_cg_cp_rs1_b31, Zbkb_rev8_cg_cp_rs1_b31_str) +800004d0: 0009a203 lw x4,0(x19) +800004d4: 01820863 beq x4,x24,800004e4 +800004d8: 3a9012ef jal x5,80002080 +800004dc: 800004cc .word 0x800004cc +800004e0: 80004b7a .word 0x80004b7a +800004e4: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x4f3753c1 +800004e8: 00052703 lw x14,0(x10) +800004ec: 00450513 addi x10,x10,4 + +800004f0 : +Zbkb_rev8_cg_cp_rd_b0: + rev8 x0, x14 # perform operation +800004f0: 69875013 rev8 x0,x14 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_rev8_cg_cp_rd_b0, Zbkb_rev8_cg_cp_rd_b0_str) +800004f4: 0009a203 lw x4,0(x19) +800004f8: 00020863 beq x4,x0,80000508 +800004fc: 385012ef jal x5,80002080 +80000500: 800004f0 .word 0x800004f0 +80000504: 80004bad .word 0x80004bad +80000508: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x57f3ca90 +8000050c: 00052303 lw x6,0(x10) +80000510: 00450513 addi x10,x10,4 + +80000514 : +Zbkb_rev8_cg_cp_rd_b1: + rev8 x1, x6 # perform operation +80000514: 69835093 rev8 x1,x6 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_rev8_cg_cp_rd_b1, Zbkb_rev8_cg_cp_rd_b1_str) +80000518: 0009a203 lw x4,0(x19) +8000051c: 00120863 beq x4,x1,8000052c +80000520: 361012ef jal x5,80002080 +80000524: 80000514 .word 0x80000514 +80000528: 80004bde .word 0x80004bde +8000052c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xeb663654 +80000530: 00052583 lw x11,0(x10) +80000534: 00450513 addi x10,x10,4 + +80000538 : +Zbkb_rev8_cg_cp_rd_b2: + rev8 x2, x11 # perform operation +80000538: 6985d113 rev8 x2,x11 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_rev8_cg_cp_rd_b2, Zbkb_rev8_cg_cp_rd_b2_str) +8000053c: 0009a203 lw x4,0(x19) +80000540: 00220863 beq x4,x2,80000550 +80000544: 33d012ef jal x5,80002080 +80000548: 80000538 .word 0x80000538 +8000054c: 80004c0f .word 0x80004c0f +80000550: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x9b8accf9 +80000554: 00052303 lw x6,0(x10) +80000558: 00450513 addi x10,x10,4 + +8000055c : +Zbkb_rev8_cg_cp_rd_b3: + rev8 x3, x6 # perform operation +8000055c: 69835193 rev8 x3,x6 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_rev8_cg_cp_rd_b3, Zbkb_rev8_cg_cp_rd_b3_str) +80000560: 0009a203 lw x4,0(x19) +80000564: 00320863 beq x4,x3,80000574 +80000568: 319012ef jal x5,80002080 +8000056c: 8000055c .word 0x8000055c +80000570: 80004c40 .word 0x80004c40 +80000574: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000578: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +8000057c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xb138068b +80000580: 00052483 lw x9,0(x10) +80000584: 00450513 addi x10,x10,4 + +80000588 : +Zbkb_rev8_cg_cp_rd_b4: + rev8 x4, x9 # perform operation +80000588: 6984d213 rev8 x4,x9 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkb_rev8_cg_cp_rd_b4, Zbkb_rev8_cg_cp_rd_b4_str) +8000058c: 0009a383 lw x7,0(x19) +80000590: 00438863 beq x7,x4,800005a0 +80000594: 3050146f jal x8,80002098 +80000598: 80000588 .word 0x80000588 +8000059c: 80004c71 .word 0x80004c71 +800005a0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xb98d7553 +800005a4: 00052c03 lw x24,0(x10) +800005a8: 00450513 addi x10,x10,4 + +800005ac : +Zbkb_rev8_cg_cp_rd_b5: + rev8 x5, x24 # perform operation +800005ac: 698c5293 rev8 x5,x24 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_rev8_cg_cp_rd_b5, Zbkb_rev8_cg_cp_rd_b5_str) +800005b0: 0009a383 lw x7,0(x19) +800005b4: 00538863 beq x7,x5,800005c4 +800005b8: 2e10146f jal x8,80002098 +800005bc: 800005ac .word 0x800005ac +800005c0: 80004ca2 .word 0x80004ca2 +800005c4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x377e1b5c +800005c8: 00052483 lw x9,0(x10) +800005cc: 00450513 addi x10,x10,4 + +800005d0 : +Zbkb_rev8_cg_cp_rd_b6: + rev8 x6, x9 # perform operation +800005d0: 6984d313 rev8 x6,x9 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkb_rev8_cg_cp_rd_b6, Zbkb_rev8_cg_cp_rd_b6_str) +800005d4: 0009a383 lw x7,0(x19) +800005d8: 00638863 beq x7,x6,800005e8 +800005dc: 2bd0146f jal x8,80002098 +800005e0: 800005d0 .word 0x800005d0 +800005e4: 80004cd3 .word 0x80004cd3 +800005e8: 00498993 addi x19,x19,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800005ec: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800005f0: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xaad2e173 +800005f4: 00052d83 lw x27,0(x10) +800005f8: 00450513 addi x10,x10,4 + +800005fc : +Zbkb_rev8_cg_cp_rd_b7: + rev8 x7, x27 # perform operation +800005fc: 698dd393 rev8 x7,x27 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_rev8_cg_cp_rd_b7, Zbkb_rev8_cg_cp_rd_b7_str) +80000600: 0009a683 lw x13,0(x19) +80000604: 00768863 beq x13,x7,80000614 +80000608: 2b90176f jal x14,800020c0 +8000060c: 800005fc .word 0x800005fc +80000610: 80004d04 .word 0x80004d04 +80000614: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x6f7b5326 +80000618: 00052d83 lw x27,0(x10) +8000061c: 00450513 addi x10,x10,4 + +80000620 : +Zbkb_rev8_cg_cp_rd_b8: + rev8 x8, x27 # perform operation +80000620: 698dd413 rev8 x8,x27 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_rev8_cg_cp_rd_b8, Zbkb_rev8_cg_cp_rd_b8_str) +80000624: 0009a683 lw x13,0(x19) +80000628: 00868863 beq x13,x8,80000638 +8000062c: 2950176f jal x14,800020c0 +80000630: 80000620 .word 0x80000620 +80000634: 80004d35 .word 0x80004d35 +80000638: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x26bfdfae +8000063c: 00052d83 lw x27,0(x10) +80000640: 00450513 addi x10,x10,4 + +80000644 : +Zbkb_rev8_cg_cp_rd_b9: + rev8 x9, x27 # perform operation +80000644: 698dd493 rev8 x9,x27 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_rev8_cg_cp_rd_b9, Zbkb_rev8_cg_cp_rd_b9_str) +80000648: 0009a683 lw x13,0(x19) +8000064c: 00968863 beq x13,x9,8000065c +80000650: 2710176f jal x14,800020c0 +80000654: 80000644 .word 0x80000644 +80000658: 80004d66 .word 0x80004d66 +8000065c: 00498993 addi x19,x19,4 + + mv x21, x10 # switch data pointer register to avoid conflict with test +80000660: 00050a93 addi x21,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xa8ef4f97 +80000664: 000aac03 lw x24,0(x21) +80000668: 004a8a93 addi x21,x21,4 + +8000066c : +Zbkb_rev8_cg_cp_rd_b10: + rev8 x10, x24 # perform operation +8000066c: 698c5513 rev8 x10,x24 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_rev8_cg_cp_rd_b10, Zbkb_rev8_cg_cp_rd_b10_str) +80000670: 0009a683 lw x13,0(x19) +80000674: 00a68863 beq x13,x10,80000684 +80000678: 2490176f jal x14,800020c0 +8000067c: 8000066c .word 0x8000066c +80000680: 80004d97 .word 0x80004d97 +80000684: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0xdf78848f +80000688: 000aa183 lw x3,0(x21) +8000068c: 004a8a93 addi x21,x21,4 + +80000690 : +Zbkb_rev8_cg_cp_rd_b11: + rev8 x11, x3 # perform operation +80000690: 6981d593 rev8 x11,x3 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_rev8_cg_cp_rd_b11, Zbkb_rev8_cg_cp_rd_b11_str) +80000694: 0009a683 lw x13,0(x19) +80000698: 00b68863 beq x13,x11,800006a8 +8000069c: 2250176f jal x14,800020c0 +800006a0: 80000690 .word 0x80000690 +800006a4: 80004dc9 .word 0x80004dc9 +800006a8: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x0f6b2cd9 +800006ac: 000aa103 lw x2,0(x21) +800006b0: 004a8a93 addi x21,x21,4 + +800006b4 : +Zbkb_rev8_cg_cp_rd_b12: + rev8 x12, x2 # perform operation +800006b4: 69815613 rev8 x12,x2 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_rev8_cg_cp_rd_b12, Zbkb_rev8_cg_cp_rd_b12_str) +800006b8: 0009a683 lw x13,0(x19) +800006bc: 00c68863 beq x13,x12,800006cc +800006c0: 2010176f jal x14,800020c0 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 80004dfb .word 0x80004dfb +800006cc: 00498993 addi x19,x19,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800006d0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800006d4: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x6290bc59 +800006d8: 000aa203 lw x4,0(x21) +800006dc: 004a8a93 addi x21,x21,4 + +800006e0 : +Zbkb_rev8_cg_cp_rd_b13: + rev8 x13, x4 # perform operation +800006e0: 69825693 rev8 x13,x4 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_rev8_cg_cp_rd_b13, Zbkb_rev8_cg_cp_rd_b13_str) +800006e4: 0009a383 lw x7,0(x19) +800006e8: 00d38863 beq x7,x13,800006f8 +800006ec: 1ad0146f jal x8,80002098 +800006f0: 800006e0 .word 0x800006e0 +800006f4: 80004e2d .word 0x80004e2d +800006f8: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xd5fee9fa +800006fc: 000aa583 lw x11,0(x21) +80000700: 004a8a93 addi x21,x21,4 + +80000704 : +Zbkb_rev8_cg_cp_rd_b14: + rev8 x14, x11 # perform operation +80000704: 6985d713 rev8 x14,x11 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkb_rev8_cg_cp_rd_b14, Zbkb_rev8_cg_cp_rd_b14_str) +80000708: 0009a383 lw x7,0(x19) +8000070c: 00e38863 beq x7,x14,8000071c +80000710: 1890146f jal x8,80002098 +80000714: 80000704 .word 0x80000704 +80000718: 80004e5f .word 0x80004e5f +8000071c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x3452e60e +80000720: 000aaf83 lw x31,0(x21) +80000724: 004a8a93 addi x21,x21,4 + +80000728 : +Zbkb_rev8_cg_cp_rd_b15: + rev8 x15, x31 # perform operation +80000728: 698fd793 rev8 x15,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkb_rev8_cg_cp_rd_b15, Zbkb_rev8_cg_cp_rd_b15_str) +8000072c: 0009a383 lw x7,0(x19) +80000730: 00f38863 beq x7,x15,80000740 +80000734: 1650146f jal x8,80002098 +80000738: 80000728 .word 0x80000728 +8000073c: 80004e91 .word 0x80004e91 +80000740: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x34811d41 +80000744: 000aa003 lw x0,0(x21) +80000748: 004a8a93 addi x21,x21,4 + +8000074c : +Zbkb_rev8_cg_cp_rd_b16: + rev8 x16, x0 # perform operation +8000074c: 69805813 rev8 x16,x0 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkb_rev8_cg_cp_rd_b16, Zbkb_rev8_cg_cp_rd_b16_str) +80000750: 0009a383 lw x7,0(x19) +80000754: 01038863 beq x7,x16,80000764 +80000758: 1410146f jal x8,80002098 +8000075c: 8000074c .word 0x8000074c +80000760: 80004ec3 .word 0x80004ec3 +80000764: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0xc830ccb4 +80000768: 000aa183 lw x3,0(x21) +8000076c: 004a8a93 addi x21,x21,4 + +80000770 : +Zbkb_rev8_cg_cp_rd_b17: + rev8 x17, x3 # perform operation +80000770: 6981d893 rev8 x17,x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkb_rev8_cg_cp_rd_b17, Zbkb_rev8_cg_cp_rd_b17_str) +80000774: 0009a383 lw x7,0(x19) +80000778: 01138863 beq x7,x17,80000788 +8000077c: 11d0146f jal x8,80002098 +80000780: 80000770 .word 0x80000770 +80000784: 80004ef5 .word 0x80004ef5 +80000788: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xcb412f7b +8000078c: 000aac03 lw x24,0(x21) +80000790: 004a8a93 addi x21,x21,4 + +80000794 : +Zbkb_rev8_cg_cp_rd_b18: + rev8 x18, x24 # perform operation +80000794: 698c5913 rev8 x18,x24 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkb_rev8_cg_cp_rd_b18, Zbkb_rev8_cg_cp_rd_b18_str) +80000798: 0009a383 lw x7,0(x19) +8000079c: 01238863 beq x7,x18,800007ac +800007a0: 0f90146f jal x8,80002098 +800007a4: 80000794 .word 0x80000794 +800007a8: 80004f27 .word 0x80004f27 +800007ac: 00498993 addi x19,x19,4 + + mv x31, x19 # switch signature pointer register to avoid conflict with test +800007b0: 00098f93 addi x31,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xba0e9c43 +800007b4: 000aab03 lw x22,0(x21) +800007b8: 004a8a93 addi x21,x21,4 + +800007bc : +Zbkb_rev8_cg_cp_rd_b19: + rev8 x19, x22 # perform operation +800007bc: 698b5993 rev8 x19,x22 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkb_rev8_cg_cp_rd_b19, Zbkb_rev8_cg_cp_rd_b19_str) +800007c0: 000fa383 lw x7,0(x31) +800007c4: 01338863 beq x7,x19,800007d4 +800007c8: 0d10146f jal x8,80002098 +800007cc: 800007bc .word 0x800007bc +800007d0: 80004f59 .word 0x80004f59 +800007d4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x3addce5b +800007d8: 000aa283 lw x5,0(x21) +800007dc: 004a8a93 addi x21,x21,4 + +800007e0 : +Zbkb_rev8_cg_cp_rd_b20: + rev8 x20, x5 # perform operation +800007e0: 6982da13 rev8 x20,x5 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_rev8_cg_cp_rd_b20, Zbkb_rev8_cg_cp_rd_b20_str) +800007e4: 000fa383 lw x7,0(x31) +800007e8: 01438863 beq x7,x20,800007f8 +800007ec: 0ad0146f jal x8,80002098 +800007f0: 800007e0 .word 0x800007e0 +800007f4: 80004f8b .word 0x80004f8b +800007f8: 004f8f93 addi x31,x31,4 + + mv x2, x21 # switch data pointer register to avoid conflict with test +800007fc: 000a8113 addi x2,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xa8c622de +80000800: 00012903 lw x18,0(x2) +80000804: 00410113 addi x2,x2,4 + +80000808 : +Zbkb_rev8_cg_cp_rd_b21: + rev8 x21, x18 # perform operation +80000808: 69895a93 rev8 x21,x18 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkb_rev8_cg_cp_rd_b21, Zbkb_rev8_cg_cp_rd_b21_str) +8000080c: 000fa383 lw x7,0(x31) +80000810: 01538863 beq x7,x21,80000820 +80000814: 0850146f jal x8,80002098 +80000818: 80000808 .word 0x80000808 +8000081c: 80004fbd .word 0x80004fbd +80000820: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xf823fea6 +80000824: 00012603 lw x12,0(x2) +80000828: 00410113 addi x2,x2,4 + +8000082c : +Zbkb_rev8_cg_cp_rd_b22: + rev8 x22, x12 # perform operation +8000082c: 69865b13 rev8 x22,x12 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkb_rev8_cg_cp_rd_b22, Zbkb_rev8_cg_cp_rd_b22_str) +80000830: 000fa383 lw x7,0(x31) +80000834: 01638863 beq x7,x22,80000844 +80000838: 0610146f jal x8,80002098 +8000083c: 8000082c .word 0x8000082c +80000840: 80004fef .word 0x80004fef +80000844: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x470e1573 +80000848: 00012803 lw x16,0(x2) +8000084c: 00410113 addi x2,x2,4 + +80000850 : +Zbkb_rev8_cg_cp_rd_b23: + rev8 x23, x16 # perform operation +80000850: 69885b93 rev8 x23,x16 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkb_rev8_cg_cp_rd_b23, Zbkb_rev8_cg_cp_rd_b23_str) +80000854: 000fa383 lw x7,0(x31) +80000858: 01738863 beq x7,x23,80000868 +8000085c: 03d0146f jal x8,80002098 +80000860: 80000850 .word 0x80000850 +80000864: 80005021 .word 0x80005021 +80000868: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xf3652f33 +8000086c: 00012c83 lw x25,0(x2) +80000870: 00410113 addi x2,x2,4 + +80000874 : +Zbkb_rev8_cg_cp_rd_b24: + rev8 x24, x25 # perform operation +80000874: 698cdc13 rev8 x24,x25 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_rev8_cg_cp_rd_b24, Zbkb_rev8_cg_cp_rd_b24_str) +80000878: 000fa383 lw x7,0(x31) +8000087c: 01838863 beq x7,x24,8000088c +80000880: 0190146f jal x8,80002098 +80000884: 80000874 .word 0x80000874 +80000888: 80005053 .word 0x80005053 +8000088c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x2280ae8d +80000890: 00012083 lw x1,0(x2) +80000894: 00410113 addi x2,x2,4 + +80000898 : +Zbkb_rev8_cg_cp_rd_b25: + rev8 x25, x1 # perform operation +80000898: 6980dc93 rev8 x25,x1 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkb_rev8_cg_cp_rd_b25, Zbkb_rev8_cg_cp_rd_b25_str) +8000089c: 000fa383 lw x7,0(x31) +800008a0: 01938863 beq x7,x25,800008b0 +800008a4: 7f40146f jal x8,80002098 +800008a8: 80000898 .word 0x80000898 +800008ac: 80005085 .word 0x80005085 +800008b0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0x7d056259 +800008b4: 00012283 lw x5,0(x2) +800008b8: 00410113 addi x2,x2,4 + +800008bc : +Zbkb_rev8_cg_cp_rd_b26: + rev8 x26, x5 # perform operation +800008bc: 6982dd13 rev8 x26,x5 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkb_rev8_cg_cp_rd_b26, Zbkb_rev8_cg_cp_rd_b26_str) +800008c0: 000fa383 lw x7,0(x31) +800008c4: 01a38863 beq x7,x26,800008d4 +800008c8: 7d00146f jal x8,80002098 +800008cc: 800008bc .word 0x800008bc +800008d0: 800050b7 .word 0x800050b7 +800008d4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x6011d196 +800008d8: 00012c03 lw x24,0(x2) +800008dc: 00410113 addi x2,x2,4 + +800008e0 : +Zbkb_rev8_cg_cp_rd_b27: + rev8 x27, x24 # perform operation +800008e0: 698c5d93 rev8 x27,x24 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_rev8_cg_cp_rd_b27, Zbkb_rev8_cg_cp_rd_b27_str) +800008e4: 000fa383 lw x7,0(x31) +800008e8: 01b38863 beq x7,x27,800008f8 +800008ec: 7ac0146f jal x8,80002098 +800008f0: 800008e0 .word 0x800008e0 +800008f4: 800050e9 .word 0x800050e9 +800008f8: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x72f22351 +800008fc: 00012183 lw x3,0(x2) +80000900: 00410113 addi x2,x2,4 + +80000904 : +Zbkb_rev8_cg_cp_rd_b28: + rev8 x28, x3 # perform operation +80000904: 6981de13 rev8 x28,x3 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_rev8_cg_cp_rd_b28, Zbkb_rev8_cg_cp_rd_b28_str) +80000908: 000fa383 lw x7,0(x31) +8000090c: 01c38863 beq x7,x28,8000091c +80000910: 7880146f jal x8,80002098 +80000914: 80000904 .word 0x80000904 +80000918: 8000511b .word 0x8000511b +8000091c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xaa2249d3 +80000920: 00012b03 lw x22,0(x2) +80000924: 00410113 addi x2,x2,4 + +80000928 : +Zbkb_rev8_cg_cp_rd_b29: + rev8 x29, x22 # perform operation +80000928: 698b5e93 rev8 x29,x22 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkb_rev8_cg_cp_rd_b29, Zbkb_rev8_cg_cp_rd_b29_str) +8000092c: 000fa383 lw x7,0(x31) +80000930: 01d38863 beq x7,x29,80000940 +80000934: 7640146f jal x8,80002098 +80000938: 80000928 .word 0x80000928 +8000093c: 8000514d .word 0x8000514d +80000940: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x019c6d3f +80000944: 00012503 lw x10,0(x2) +80000948: 00410113 addi x2,x2,4 + +8000094c : +Zbkb_rev8_cg_cp_rd_b30: + rev8 x30, x10 # perform operation +8000094c: 69855f13 rev8 x30,x10 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkb_rev8_cg_cp_rd_b30, Zbkb_rev8_cg_cp_rd_b30_str) +80000950: 000fa383 lw x7,0(x31) +80000954: 01e38863 beq x7,x30,80000964 +80000958: 7400146f jal x8,80002098 +8000095c: 8000094c .word 0x8000094c +80000960: 8000517f .word 0x8000517f +80000964: 004f8f93 addi x31,x31,4 + + mv x12, x31 # switch signature pointer register to avoid conflict with test +80000968: 000f8613 addi x12,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x587b396b +8000096c: 00012683 lw x13,0(x2) +80000970: 00410113 addi x2,x2,4 + +80000974 : +Zbkb_rev8_cg_cp_rd_b31: + rev8 x31, x13 # perform operation +80000974: 6986df93 rev8 x31,x13 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zbkb_rev8_cg_cp_rd_b31, Zbkb_rev8_cg_cp_rd_b31_str) +80000978: 00062383 lw x7,0(x12) +8000097c: 01f38863 beq x7,x31,8000098c +80000980: 7180146f jal x8,80002098 +80000984: 80000974 .word 0x80000974 +80000988: 800051b1 .word 0x800051b1 +8000098c: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x00000000 +80000990: 00012583 lw x11,0(x2) +80000994: 00410113 addi x2,x2,4 + +80000998 : +Zbkb_rev8_cg_cp_rs1_edges_0x0: + rev8 x4, x11 # perform operation +80000998: 6985d213 rev8 x4,x11 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zbkb_rev8_cg_cp_rs1_edges_0x0, Zbkb_rev8_cg_cp_rs1_edges_0x0_str) +8000099c: 00062383 lw x7,0(x12) +800009a0: 00438863 beq x7,x4,800009b0 +800009a4: 6f40146f jal x8,80002098 +800009a8: 80000998 .word 0x80000998 +800009ac: 800051e3 .word 0x800051e3 +800009b0: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x00000001 +800009b4: 00012d83 lw x27,0(x2) +800009b8: 00410113 addi x2,x2,4 + +800009bc : +Zbkb_rev8_cg_cp_rs1_edges_0x1: + rev8 x22, x27 # perform operation +800009bc: 698ddb13 rev8 x22,x27 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zbkb_rev8_cg_cp_rs1_edges_0x1, Zbkb_rev8_cg_cp_rs1_edges_0x1_str) +800009c0: 00062383 lw x7,0(x12) +800009c4: 01638863 beq x7,x22,800009d4 +800009c8: 6d00146f jal x8,80002098 +800009cc: 800009bc .word 0x800009bc +800009d0: 8000521c .word 0x8000521c +800009d4: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x00000002 +800009d8: 00012503 lw x10,0(x2) +800009dc: 00410113 addi x2,x2,4 + +800009e0 : +Zbkb_rev8_cg_cp_rs1_edges_0x2: + rev8 x24, x10 # perform operation +800009e0: 69855c13 rev8 x24,x10 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zbkb_rev8_cg_cp_rs1_edges_0x2, Zbkb_rev8_cg_cp_rs1_edges_0x2_str) +800009e4: 00062383 lw x7,0(x12) +800009e8: 01838863 beq x7,x24,800009f8 +800009ec: 6ac0146f jal x8,80002098 +800009f0: 800009e0 .word 0x800009e0 +800009f4: 80005255 .word 0x80005255 +800009f8: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x80000000 +800009fc: 00012f83 lw x31,0(x2) +80000a00: 00410113 addi x2,x2,4 + +80000a04 : +Zbkb_rev8_cg_cp_rs1_edges_0x80000000: + rev8 x4, x31 # perform operation +80000a04: 698fd213 rev8 x4,x31 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zbkb_rev8_cg_cp_rs1_edges_0x80000000, Zbkb_rev8_cg_cp_rs1_edges_0x80000000_str) +80000a08: 00062383 lw x7,0(x12) +80000a0c: 00438863 beq x7,x4,80000a1c +80000a10: 6880146f jal x8,80002098 +80000a14: 80000a04 .word 0x80000a04 +80000a18: 8000528e .word 0x8000528e +80000a1c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x80000001 +80000a20: 00012303 lw x6,0(x2) +80000a24: 00410113 addi x2,x2,4 + +80000a28 : +Zbkb_rev8_cg_cp_rs1_edges_0x80000001: + rev8 x21, x6 # perform operation +80000a28: 69835a93 rev8 x21,x6 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zbkb_rev8_cg_cp_rs1_edges_0x80000001, Zbkb_rev8_cg_cp_rs1_edges_0x80000001_str) +80000a2c: 00062383 lw x7,0(x12) +80000a30: 01538863 beq x7,x21,80000a40 +80000a34: 6640146f jal x8,80002098 +80000a38: 80000a28 .word 0x80000a28 +80000a3c: 800052ce .word 0x800052ce +80000a40: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7fffffff +80000a44: 00012c83 lw x25,0(x2) +80000a48: 00410113 addi x2,x2,4 + +80000a4c : +Zbkb_rev8_cg_cp_rs1_edges_0x7fffffff: + rev8 x18, x25 # perform operation +80000a4c: 698cd913 rev8 x18,x25 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zbkb_rev8_cg_cp_rs1_edges_0x7fffffff, Zbkb_rev8_cg_cp_rs1_edges_0x7fffffff_str) +80000a50: 00062383 lw x7,0(x12) +80000a54: 01238863 beq x7,x18,80000a64 +80000a58: 6400146f jal x8,80002098 +80000a5c: 80000a4c .word 0x80000a4c +80000a60: 8000530e .word 0x8000530e +80000a64: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7ffffffe +80000a68: 00012583 lw x11,0(x2) +80000a6c: 00410113 addi x2,x2,4 + +80000a70 : +Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffe: + rev8 x25, x11 # perform operation +80000a70: 6985dc93 rev8 x25,x11 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffe, Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffe_str) +80000a74: 00062383 lw x7,0(x12) +80000a78: 01938863 beq x7,x25,80000a88 +80000a7c: 61c0146f jal x8,80002098 +80000a80: 80000a70 .word 0x80000a70 +80000a84: 8000534e .word 0x8000534e +80000a88: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xffffffff +80000a8c: 00012303 lw x6,0(x2) +80000a90: 00410113 addi x2,x2,4 + +80000a94 : +Zbkb_rev8_cg_cp_rs1_edges_0xffffffff: + rev8 x14, x6 # perform operation +80000a94: 69835713 rev8 x14,x6 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zbkb_rev8_cg_cp_rs1_edges_0xffffffff, Zbkb_rev8_cg_cp_rs1_edges_0xffffffff_str) +80000a98: 00062383 lw x7,0(x12) +80000a9c: 00e38863 beq x7,x14,80000aac +80000aa0: 5f80146f jal x8,80002098 +80000aa4: 80000a94 .word 0x80000a94 +80000aa8: 8000538e .word 0x8000538e +80000aac: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xfffffffe +80000ab0: 00012483 lw x9,0(x2) +80000ab4: 00410113 addi x2,x2,4 + +80000ab8 : +Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe: + rev8 x11, x9 # perform operation +80000ab8: 6984d593 rev8 x11,x9 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe_str) +80000abc: 00062383 lw x7,0(x12) +80000ac0: 00b38863 beq x7,x11,80000ad0 +80000ac4: 5d40146f jal x8,80002098 +80000ac8: 80000ab8 .word 0x80000ab8 +80000acc: 800053ce .word 0x800053ce +80000ad0: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5bbc8872 +80000ad4: 00012503 lw x10,0(x2) +80000ad8: 00410113 addi x2,x2,4 + +80000adc : +Zbkb_rev8_cg_cp_rs1_edges_0x5bbc8872: + rev8 x21, x10 # perform operation +80000adc: 69855a93 rev8 x21,x10 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zbkb_rev8_cg_cp_rs1_edges_0x5bbc8872, Zbkb_rev8_cg_cp_rs1_edges_0x5bbc8872_str) +80000ae0: 00062383 lw x7,0(x12) +80000ae4: 01538863 beq x7,x21,80000af4 +80000ae8: 5b00146f jal x8,80002098 +80000aec: 80000adc .word 0x80000adc +80000af0: 8000540e .word 0x8000540e +80000af4: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xaaaaaaaa +80000af8: 00012083 lw x1,0(x2) +80000afc: 00410113 addi x2,x2,4 + +80000b00 : +Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaa: + rev8 x15, x1 # perform operation +80000b00: 6980d793 rev8 x15,x1 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000b04: 00062383 lw x7,0(x12) +80000b08: 00f38863 beq x7,x15,80000b18 +80000b0c: 58c0146f jal x8,80002098 +80000b10: 80000b00 .word 0x80000b00 +80000b14: 8000544e .word 0x8000544e +80000b18: 00460613 addi x12,x12,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x55555555 +80000b1c: 00012a03 lw x20,0(x2) +80000b20: 00410113 addi x2,x2,4 + +80000b24 : +Zbkb_rev8_cg_cp_rs1_edges_0x55555555: + rev8 x29, x20 # perform operation +80000b24: 698a5e93 rev8 x29,x20 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zbkb_rev8_cg_cp_rs1_edges_0x55555555, Zbkb_rev8_cg_cp_rs1_edges_0x55555555_str) +80000b28: 00062383 lw x7,0(x12) +80000b2c: 01d38863 beq x7,x29,80000b3c +80000b30: 5680146f jal x8,80002098 +80000b34: 80000b24 .word 0x80000b24 +80000b38: 8000548e .word 0x8000548e +80000b3c: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0xd7a5e15f +80000b40: 00012003 lw x0,0(x2) +80000b44: 00410113 addi x2,x2,4 + +80000b48 : +Zbkb_rev8_cg_cmp_rd_rs1_b0: + rev8 x0, x0 # perform operation +80000b48: 69805013 rev8 x0,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zbkb_rev8_cg_cmp_rd_rs1_b0, Zbkb_rev8_cg_cmp_rd_rs1_b0_str) +80000b4c: 00062383 lw x7,0(x12) +80000b50: 00038863 beq x7,x0,80000b60 +80000b54: 5440146f jal x8,80002098 +80000b58: 80000b48 .word 0x80000b48 +80000b5c: 800054ce .word 0x800054ce +80000b60: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xae5f648e +80000b64: 00012083 lw x1,0(x2) +80000b68: 00410113 addi x2,x2,4 + +80000b6c : +Zbkb_rev8_cg_cmp_rd_rs1_b1: + rev8 x1, x1 # perform operation +80000b6c: 6980d093 rev8 x1,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zbkb_rev8_cg_cmp_rd_rs1_b1, Zbkb_rev8_cg_cmp_rd_rs1_b1_str) +80000b70: 00062383 lw x7,0(x12) +80000b74: 00138863 beq x7,x1,80000b84 +80000b78: 5200146f jal x8,80002098 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 80005504 .word 0x80005504 +80000b84: 00460613 addi x12,x12,4 + + mv x31, x2 # switch data pointer register to avoid conflict with test +80000b88: 00010f93 addi x31,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0xa8975cbd +80000b8c: 000fa103 lw x2,0(x31) +80000b90: 004f8f93 addi x31,x31,4 + +80000b94 : +Zbkb_rev8_cg_cmp_rd_rs1_b2: + rev8 x2, x2 # perform operation +80000b94: 69815113 rev8 x2,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zbkb_rev8_cg_cmp_rd_rs1_b2, Zbkb_rev8_cg_cmp_rd_rs1_b2_str) +80000b98: 00062383 lw x7,0(x12) +80000b9c: 00238863 beq x7,x2,80000bac +80000ba0: 4f80146f jal x8,80002098 +80000ba4: 80000b94 .word 0x80000b94 +80000ba8: 8000553a .word 0x8000553a +80000bac: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xd94defce +80000bb0: 000fa183 lw x3,0(x31) +80000bb4: 004f8f93 addi x31,x31,4 + +80000bb8 : +Zbkb_rev8_cg_cmp_rd_rs1_b3: + rev8 x3, x3 # perform operation +80000bb8: 6981d193 rev8 x3,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zbkb_rev8_cg_cmp_rd_rs1_b3, Zbkb_rev8_cg_cmp_rd_rs1_b3_str) +80000bbc: 00062383 lw x7,0(x12) +80000bc0: 00338863 beq x7,x3,80000bd0 +80000bc4: 4d40146f jal x8,80002098 +80000bc8: 80000bb8 .word 0x80000bb8 +80000bcc: 80005570 .word 0x80005570 +80000bd0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0x40e45790 +80000bd4: 000fa203 lw x4,0(x31) +80000bd8: 004f8f93 addi x31,x31,4 + +80000bdc : +Zbkb_rev8_cg_cmp_rd_rs1_b4: + rev8 x4, x4 # perform operation +80000bdc: 69825213 rev8 x4,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zbkb_rev8_cg_cmp_rd_rs1_b4, Zbkb_rev8_cg_cmp_rd_rs1_b4_str) +80000be0: 00062383 lw x7,0(x12) +80000be4: 00438863 beq x7,x4,80000bf4 +80000be8: 4b00146f jal x8,80002098 +80000bec: 80000bdc .word 0x80000bdc +80000bf0: 800055a6 .word 0x800055a6 +80000bf4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x2a1d00fa +80000bf8: 000fa283 lw x5,0(x31) +80000bfc: 004f8f93 addi x31,x31,4 + +80000c00 : +Zbkb_rev8_cg_cmp_rd_rs1_b5: + rev8 x5, x5 # perform operation +80000c00: 6982d293 rev8 x5,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zbkb_rev8_cg_cmp_rd_rs1_b5, Zbkb_rev8_cg_cmp_rd_rs1_b5_str) +80000c04: 00062383 lw x7,0(x12) +80000c08: 00538863 beq x7,x5,80000c18 +80000c0c: 48c0146f jal x8,80002098 +80000c10: 80000c00 .word 0x80000c00 +80000c14: 800055dc .word 0x800055dc +80000c18: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0x54c5983c +80000c1c: 000fa303 lw x6,0(x31) +80000c20: 004f8f93 addi x31,x31,4 + +80000c24 : +Zbkb_rev8_cg_cmp_rd_rs1_b6: + rev8 x6, x6 # perform operation +80000c24: 69835313 rev8 x6,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zbkb_rev8_cg_cmp_rd_rs1_b6, Zbkb_rev8_cg_cmp_rd_rs1_b6_str) +80000c28: 00062383 lw x7,0(x12) +80000c2c: 00638863 beq x7,x6,80000c3c +80000c30: 4680146f jal x8,80002098 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80005612 .word 0x80005612 +80000c3c: 00460613 addi x12,x12,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000c40: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000c44: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x95547bef +80000c48: 000fa383 lw x7,0(x31) +80000c4c: 004f8f93 addi x31,x31,4 + +80000c50 : +Zbkb_rev8_cg_cmp_rd_rs1_b7: + rev8 x7, x7 # perform operation +80000c50: 6983d393 rev8 x7,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkb_rev8_cg_cmp_rd_rs1_b7, Zbkb_rev8_cg_cmp_rd_rs1_b7_str) +80000c54: 00062683 lw x13,0(x12) +80000c58: 00768863 beq x13,x7,80000c68 +80000c5c: 4640176f jal x14,800020c0 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 80005648 .word 0x80005648 +80000c68: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x76ffb14e +80000c6c: 000fa403 lw x8,0(x31) +80000c70: 004f8f93 addi x31,x31,4 + +80000c74 : +Zbkb_rev8_cg_cmp_rd_rs1_b8: + rev8 x8, x8 # perform operation +80000c74: 69845413 rev8 x8,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkb_rev8_cg_cmp_rd_rs1_b8, Zbkb_rev8_cg_cmp_rd_rs1_b8_str) +80000c78: 00062683 lw x13,0(x12) +80000c7c: 00868863 beq x13,x8,80000c8c +80000c80: 4400176f jal x14,800020c0 +80000c84: 80000c74 .word 0x80000c74 +80000c88: 8000567e .word 0x8000567e +80000c8c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xa465550f +80000c90: 000fa483 lw x9,0(x31) +80000c94: 004f8f93 addi x31,x31,4 + +80000c98 : +Zbkb_rev8_cg_cmp_rd_rs1_b9: + rev8 x9, x9 # perform operation +80000c98: 6984d493 rev8 x9,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkb_rev8_cg_cmp_rd_rs1_b9, Zbkb_rev8_cg_cmp_rd_rs1_b9_str) +80000c9c: 00062683 lw x13,0(x12) +80000ca0: 00968863 beq x13,x9,80000cb0 +80000ca4: 41c0176f jal x14,800020c0 +80000ca8: 80000c98 .word 0x80000c98 +80000cac: 800056b4 .word 0x800056b4 +80000cb0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xa404ac0c +80000cb4: 000fa503 lw x10,0(x31) +80000cb8: 004f8f93 addi x31,x31,4 + +80000cbc : +Zbkb_rev8_cg_cmp_rd_rs1_b10: + rev8 x10, x10 # perform operation +80000cbc: 69855513 rev8 x10,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkb_rev8_cg_cmp_rd_rs1_b10, Zbkb_rev8_cg_cmp_rd_rs1_b10_str) +80000cc0: 00062683 lw x13,0(x12) +80000cc4: 00a68863 beq x13,x10,80000cd4 +80000cc8: 3f80176f jal x14,800020c0 +80000ccc: 80000cbc .word 0x80000cbc +80000cd0: 800056ea .word 0x800056ea +80000cd4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x74f8fc44 +80000cd8: 000fa583 lw x11,0(x31) +80000cdc: 004f8f93 addi x31,x31,4 + +80000ce0 : +Zbkb_rev8_cg_cmp_rd_rs1_b11: + rev8 x11, x11 # perform operation +80000ce0: 6985d593 rev8 x11,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_rev8_cg_cmp_rd_rs1_b11, Zbkb_rev8_cg_cmp_rd_rs1_b11_str) +80000ce4: 00062683 lw x13,0(x12) +80000ce8: 00b68863 beq x13,x11,80000cf8 +80000cec: 3d40176f jal x14,800020c0 +80000cf0: 80000ce0 .word 0x80000ce0 +80000cf4: 80005721 .word 0x80005721 +80000cf8: 00460613 addi x12,x12,4 + + mv x1, x12 # switch signature pointer register to avoid conflict with test +80000cfc: 00060093 addi x1,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x2c53dcad +80000d00: 000fa603 lw x12,0(x31) +80000d04: 004f8f93 addi x31,x31,4 + +80000d08 : +Zbkb_rev8_cg_cmp_rd_rs1_b12: + rev8 x12, x12 # perform operation +80000d08: 69865613 rev8 x12,x12 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zbkb_rev8_cg_cmp_rd_rs1_b12, Zbkb_rev8_cg_cmp_rd_rs1_b12_str) +80000d0c: 0000a683 lw x13,0(x1) +80000d10: 00c68863 beq x13,x12,80000d20 +80000d14: 3ac0176f jal x14,800020c0 +80000d18: 80000d08 .word 0x80000d08 +80000d1c: 80005758 .word 0x80005758 +80000d20: 00408093 addi x1,x1,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d24: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d28: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xc309f165 +80000d2c: 000fa683 lw x13,0(x31) +80000d30: 004f8f93 addi x31,x31,4 + +80000d34 : +Zbkb_rev8_cg_cmp_rd_rs1_b13: + rev8 x13, x13 # perform operation +80000d34: 6986d693 rev8 x13,x13 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zbkb_rev8_cg_cmp_rd_rs1_b13, Zbkb_rev8_cg_cmp_rd_rs1_b13_str) +80000d38: 0000a383 lw x7,0(x1) +80000d3c: 00d38863 beq x7,x13,80000d4c +80000d40: 3580146f jal x8,80002098 +80000d44: 80000d34 .word 0x80000d34 +80000d48: 8000578f .word 0x8000578f +80000d4c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0xcf752906 +80000d50: 000fa703 lw x14,0(x31) +80000d54: 004f8f93 addi x31,x31,4 + +80000d58 : +Zbkb_rev8_cg_cmp_rd_rs1_b14: + rev8 x14, x14 # perform operation +80000d58: 69875713 rev8 x14,x14 + # Check if x14 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x14, Zbkb_rev8_cg_cmp_rd_rs1_b14, Zbkb_rev8_cg_cmp_rd_rs1_b14_str) +80000d5c: 0000a383 lw x7,0(x1) +80000d60: 00e38863 beq x7,x14,80000d70 +80000d64: 3340146f jal x8,80002098 +80000d68: 80000d58 .word 0x80000d58 +80000d6c: 800057c6 .word 0x800057c6 +80000d70: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xd2e5952f +80000d74: 000fa783 lw x15,0(x31) +80000d78: 004f8f93 addi x31,x31,4 + +80000d7c : +Zbkb_rev8_cg_cmp_rd_rs1_b15: + rev8 x15, x15 # perform operation +80000d7c: 6987d793 rev8 x15,x15 + # Check if x15 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x15, Zbkb_rev8_cg_cmp_rd_rs1_b15, Zbkb_rev8_cg_cmp_rd_rs1_b15_str) +80000d80: 0000a383 lw x7,0(x1) +80000d84: 00f38863 beq x7,x15,80000d94 +80000d88: 3100146f jal x8,80002098 +80000d8c: 80000d7c .word 0x80000d7c +80000d90: 800057fd .word 0x800057fd +80000d94: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x62245f4c +80000d98: 000fa803 lw x16,0(x31) +80000d9c: 004f8f93 addi x31,x31,4 + +80000da0 : +Zbkb_rev8_cg_cmp_rd_rs1_b16: + rev8 x16, x16 # perform operation +80000da0: 69885813 rev8 x16,x16 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zbkb_rev8_cg_cmp_rd_rs1_b16, Zbkb_rev8_cg_cmp_rd_rs1_b16_str) +80000da4: 0000a383 lw x7,0(x1) +80000da8: 01038863 beq x7,x16,80000db8 +80000dac: 2ec0146f jal x8,80002098 +80000db0: 80000da0 .word 0x80000da0 +80000db4: 80005834 .word 0x80005834 +80000db8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x90607932 +80000dbc: 000fa883 lw x17,0(x31) +80000dc0: 004f8f93 addi x31,x31,4 + +80000dc4 : +Zbkb_rev8_cg_cmp_rd_rs1_b17: + rev8 x17, x17 # perform operation +80000dc4: 6988d893 rev8 x17,x17 + # Check if x17 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x17, Zbkb_rev8_cg_cmp_rd_rs1_b17, Zbkb_rev8_cg_cmp_rd_rs1_b17_str) +80000dc8: 0000a383 lw x7,0(x1) +80000dcc: 01138863 beq x7,x17,80000ddc +80000dd0: 2c80146f jal x8,80002098 +80000dd4: 80000dc4 .word 0x80000dc4 +80000dd8: 8000586b .word 0x8000586b +80000ddc: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x6becfed8 +80000de0: 000fa903 lw x18,0(x31) +80000de4: 004f8f93 addi x31,x31,4 + +80000de8 : +Zbkb_rev8_cg_cmp_rd_rs1_b18: + rev8 x18, x18 # perform operation +80000de8: 69895913 rev8 x18,x18 + # Check if x18 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x18, Zbkb_rev8_cg_cmp_rd_rs1_b18, Zbkb_rev8_cg_cmp_rd_rs1_b18_str) +80000dec: 0000a383 lw x7,0(x1) +80000df0: 01238863 beq x7,x18,80000e00 +80000df4: 2a40146f jal x8,80002098 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 800058a2 .word 0x800058a2 +80000e00: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xe9eedaf6 +80000e04: 000fa983 lw x19,0(x31) +80000e08: 004f8f93 addi x31,x31,4 + +80000e0c : +Zbkb_rev8_cg_cmp_rd_rs1_b19: + rev8 x19, x19 # perform operation +80000e0c: 6989d993 rev8 x19,x19 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zbkb_rev8_cg_cmp_rd_rs1_b19, Zbkb_rev8_cg_cmp_rd_rs1_b19_str) +80000e10: 0000a383 lw x7,0(x1) +80000e14: 01338863 beq x7,x19,80000e24 +80000e18: 2800146f jal x8,80002098 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 800058d9 .word 0x800058d9 +80000e24: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xe87c555f +80000e28: 000faa03 lw x20,0(x31) +80000e2c: 004f8f93 addi x31,x31,4 + +80000e30 : +Zbkb_rev8_cg_cmp_rd_rs1_b20: + rev8 x20, x20 # perform operation +80000e30: 698a5a13 rev8 x20,x20 + # Check if x20 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x20, Zbkb_rev8_cg_cmp_rd_rs1_b20, Zbkb_rev8_cg_cmp_rd_rs1_b20_str) +80000e34: 0000a383 lw x7,0(x1) +80000e38: 01438863 beq x7,x20,80000e48 +80000e3c: 25c0146f jal x8,80002098 +80000e40: 80000e30 .word 0x80000e30 +80000e44: 80005910 .word 0x80005910 +80000e48: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xcfc3346c +80000e4c: 000faa83 lw x21,0(x31) +80000e50: 004f8f93 addi x31,x31,4 + +80000e54 : +Zbkb_rev8_cg_cmp_rd_rs1_b21: + rev8 x21, x21 # perform operation +80000e54: 698ada93 rev8 x21,x21 + # Check if x21 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x21, Zbkb_rev8_cg_cmp_rd_rs1_b21, Zbkb_rev8_cg_cmp_rd_rs1_b21_str) +80000e58: 0000a383 lw x7,0(x1) +80000e5c: 01538863 beq x7,x21,80000e6c +80000e60: 2380146f jal x8,80002098 +80000e64: 80000e54 .word 0x80000e54 +80000e68: 80005947 .word 0x80005947 +80000e6c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x91907546 +80000e70: 000fab03 lw x22,0(x31) +80000e74: 004f8f93 addi x31,x31,4 + +80000e78 : +Zbkb_rev8_cg_cmp_rd_rs1_b22: + rev8 x22, x22 # perform operation +80000e78: 698b5b13 rev8 x22,x22 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zbkb_rev8_cg_cmp_rd_rs1_b22, Zbkb_rev8_cg_cmp_rd_rs1_b22_str) +80000e7c: 0000a383 lw x7,0(x1) +80000e80: 01638863 beq x7,x22,80000e90 +80000e84: 2140146f jal x8,80002098 +80000e88: 80000e78 .word 0x80000e78 +80000e8c: 8000597e .word 0x8000597e +80000e90: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x241cd837 +80000e94: 000fab83 lw x23,0(x31) +80000e98: 004f8f93 addi x31,x31,4 + +80000e9c : +Zbkb_rev8_cg_cmp_rd_rs1_b23: + rev8 x23, x23 # perform operation +80000e9c: 698bdb93 rev8 x23,x23 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zbkb_rev8_cg_cmp_rd_rs1_b23, Zbkb_rev8_cg_cmp_rd_rs1_b23_str) +80000ea0: 0000a383 lw x7,0(x1) +80000ea4: 01738863 beq x7,x23,80000eb4 +80000ea8: 1f00146f jal x8,80002098 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 800059b5 .word 0x800059b5 +80000eb4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x5dbf2980 +80000eb8: 000fac03 lw x24,0(x31) +80000ebc: 004f8f93 addi x31,x31,4 + +80000ec0 : +Zbkb_rev8_cg_cmp_rd_rs1_b24: + rev8 x24, x24 # perform operation +80000ec0: 698c5c13 rev8 x24,x24 + # Check if x24 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x24, Zbkb_rev8_cg_cmp_rd_rs1_b24, Zbkb_rev8_cg_cmp_rd_rs1_b24_str) +80000ec4: 0000a383 lw x7,0(x1) +80000ec8: 01838863 beq x7,x24,80000ed8 +80000ecc: 1cc0146f jal x8,80002098 +80000ed0: 80000ec0 .word 0x80000ec0 +80000ed4: 800059ed .word 0x800059ed +80000ed8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xed00a3c3 +80000edc: 000fac83 lw x25,0(x31) +80000ee0: 004f8f93 addi x31,x31,4 + +80000ee4 : +Zbkb_rev8_cg_cmp_rd_rs1_b25: + rev8 x25, x25 # perform operation +80000ee4: 698cdc93 rev8 x25,x25 + # Check if x25 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x25, Zbkb_rev8_cg_cmp_rd_rs1_b25, Zbkb_rev8_cg_cmp_rd_rs1_b25_str) +80000ee8: 0000a383 lw x7,0(x1) +80000eec: 01938863 beq x7,x25,80000efc +80000ef0: 1a80146f jal x8,80002098 +80000ef4: 80000ee4 .word 0x80000ee4 +80000ef8: 80005a25 .word 0x80005a25 +80000efc: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x6cc73bf8 +80000f00: 000fad03 lw x26,0(x31) +80000f04: 004f8f93 addi x31,x31,4 + +80000f08 : +Zbkb_rev8_cg_cmp_rd_rs1_b26: + rev8 x26, x26 # perform operation +80000f08: 698d5d13 rev8 x26,x26 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zbkb_rev8_cg_cmp_rd_rs1_b26, Zbkb_rev8_cg_cmp_rd_rs1_b26_str) +80000f0c: 0000a383 lw x7,0(x1) +80000f10: 01a38863 beq x7,x26,80000f20 +80000f14: 1840146f jal x8,80002098 +80000f18: 80000f08 .word 0x80000f08 +80000f1c: 80005a5d .word 0x80005a5d +80000f20: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x2daf907c +80000f24: 000fad83 lw x27,0(x31) +80000f28: 004f8f93 addi x31,x31,4 + +80000f2c : +Zbkb_rev8_cg_cmp_rd_rs1_b27: + rev8 x27, x27 # perform operation +80000f2c: 698ddd93 rev8 x27,x27 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zbkb_rev8_cg_cmp_rd_rs1_b27, Zbkb_rev8_cg_cmp_rd_rs1_b27_str) +80000f30: 0000a383 lw x7,0(x1) +80000f34: 01b38863 beq x7,x27,80000f44 +80000f38: 1600146f jal x8,80002098 +80000f3c: 80000f2c .word 0x80000f2c +80000f40: 80005a95 .word 0x80005a95 +80000f44: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x45e7f61b +80000f48: 000fae03 lw x28,0(x31) +80000f4c: 004f8f93 addi x31,x31,4 + +80000f50 : +Zbkb_rev8_cg_cmp_rd_rs1_b28: + rev8 x28, x28 # perform operation +80000f50: 698e5e13 rev8 x28,x28 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zbkb_rev8_cg_cmp_rd_rs1_b28, Zbkb_rev8_cg_cmp_rd_rs1_b28_str) +80000f54: 0000a383 lw x7,0(x1) +80000f58: 01c38863 beq x7,x28,80000f68 +80000f5c: 13c0146f jal x8,80002098 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 80005acd .word 0x80005acd +80000f68: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xa36b6fbe +80000f6c: 000fae83 lw x29,0(x31) +80000f70: 004f8f93 addi x31,x31,4 + +80000f74 : +Zbkb_rev8_cg_cmp_rd_rs1_b29: + rev8 x29, x29 # perform operation +80000f74: 698ede93 rev8 x29,x29 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zbkb_rev8_cg_cmp_rd_rs1_b29, Zbkb_rev8_cg_cmp_rd_rs1_b29_str) +80000f78: 0000a383 lw x7,0(x1) +80000f7c: 01d38863 beq x7,x29,80000f8c +80000f80: 1180146f jal x8,80002098 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 80005b05 .word 0x80005b05 +80000f8c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xa2689c28 +80000f90: 000faf03 lw x30,0(x31) +80000f94: 004f8f93 addi x31,x31,4 + +80000f98 : +Zbkb_rev8_cg_cmp_rd_rs1_b30: + rev8 x30, x30 # perform operation +80000f98: 698f5f13 rev8 x30,x30 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zbkb_rev8_cg_cmp_rd_rs1_b30, Zbkb_rev8_cg_cmp_rd_rs1_b30_str) +80000f9c: 0000a383 lw x7,0(x1) +80000fa0: 01e38863 beq x7,x30,80000fb0 +80000fa4: 0f40146f jal x8,80002098 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 80005b3d .word 0x80005b3d +80000fb0: 00408093 addi x1,x1,4 + + mv x3, x31 # switch data pointer register to avoid conflict with test +80000fb4: 000f8193 addi x3,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xf3e7d7e7 +80000fb8: 0001af83 lw x31,0(x3) +80000fbc: 00418193 addi x3,x3,4 + +80000fc0 : +Zbkb_rev8_cg_cmp_rd_rs1_b31: + rev8 x31, x31 # perform operation +80000fc0: 698fdf93 rev8 x31,x31 + # Check if x31 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x31, Zbkb_rev8_cg_cmp_rd_rs1_b31, Zbkb_rev8_cg_cmp_rd_rs1_b31_str) +80000fc4: 0000a383 lw x7,0(x1) +80000fc8: 01f38863 beq x7,x31,80000fd8 +80000fcc: 0cc0146f jal x8,80002098 +80000fd0: 80000fc0 .word 0x80000fc0 +80000fd4: 80005b75 .word 0x80005b75 +80000fd8: 00408093 addi x1,x1,4 + + mv x2, x1 # restore signature pointer to default register for teardown +80000fdc: 00008113 addi x2,x1,0 + +80000fe0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fe0: 00000513 addi x10,x0,0 +80000fe4: 00000073 ecall +80000fe8: fff00513 addi x10,x0,-1 +80000fec: 1d800413 addi x8,x0,472 + +80000ff0 : +80000ff0: 34002373 csrrs x6,mscratch,x0 + +80000ff4 : +80000ff4: 23832383 lw x7,568(x6) +80000ff8: 23c32483 lw x9,572(x6) + +80000ffc : +80000ffc: 22032383 lw x7,544(x6) + +80001000 : +80001000: 25032483 lw x9,592(x6) +80001004: 34049073 csrrw x0,mscratch,x9 + +80001008 : +80001008: 24832483 lw x9,584(x6) +8000100c: 305493f3 csrrw x7,mtvec,x9 +80001010: ffc4f493 andi x9,x9,-4 +80001014: ffc3f393 andi x7,x7,-4 +80001018: 00749e63 bne x9,x7,80001034 + +8000101c : +8000101c: 00030493 addi x9,x6,0 + +80001020 : +80001020: 0004a783 lw x15,0(x9) +80001024: 00f3a023 sw x15,0(x7) +80001028: 00438393 addi x7,x7,4 +8000102c: 00448493 addi x9,x9,4 +80001030: fe83c8e3 blt x7,x8,80001020 +80001034: 0000100f fence.i + +80001038 : +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 1ae50513 addi x10,x10,430 # 8000622e +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 1a750513 addi x10,x10,423 # 80006267 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 1c750513 addi x10,x10,455 # 800062c7 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: d3250513 addi x10,x10,-718 # 80006e72 +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: 91838393 addi x7,x7,-1768 # 80007ad8 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: 8d040413 addi x8,x8,-1840 # 80007ad0 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 8000641b .word 0x8000641b + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 80006289 .word 0x80006289 +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: f9450513 addi x10,x10,-108 # 800061f4 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: f8e50513 addi x10,x10,-114 # 8000622e +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: ce1ff06f jal x0,80000fe0 + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cd5ff06f jal x0,80000fe0 +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b5830313 addi x6,x6,-1192 # 80001038 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 1e950513 addi x10,x10,489 # 800078a9 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00004517 auipc x10,0x4 +80001704: 61850513 addi x10,x10,1560 # 80005d18 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: bf050513 addi x10,x10,-1040 # 80006330 +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: aae50513 addi x10,x10,-1362 # 8000622e +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 19848493 addi x9,x9,408 # 80005cf8 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: 99c40413 addi x8,x8,-1636 # 8001653c +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 80006432 .word 0x80006432 +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 80006534 .word 0x80006534 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 8000662f .word 0x8000662f +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 80006722 .word 0x80006722 +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006895 .word 0x80006895 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: b3020213 addi x4,x4,-1232 # 80005bb0 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: b1838393 addi x7,x7,-1256 # 80005bb0 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: af068693 addi x13,x13,-1296 # 80005bb0 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: ac848493 addi x9,x9,-1336 # 80005bb0 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: a244a483 lw x9,-1500(x9) # 80005bb0 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00005417 auipc x8,0x5 +80002244: 6b040413 addi x8,x8,1712 # 800078f0 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 2c040413 addi x8,x8,704 # 80016540 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: a1848493 addi x9,x9,-1512 # 80005cd8 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: 9d848493 addi x9,x9,-1576 # 80005cd8 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: 9b880813 addi x16,x16,-1608 # 80005ce8 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: 9a480813 addi x16,x16,-1628 # 80005ce8 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 0cb38393 addi x7,x7,203 # 8000641b +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: 98080813 addi x16,x16,-1664 # 80005ce0 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 0c638393 addi x7,x7,198 # 80006432 +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 1b038393 addi x7,x7,432 # 80006534 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 29338393 addi x7,x7,659 # 8000662f +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 36e38393 addi x7,x7,878 # 80006722 +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 4c938393 addi x7,x7,1225 # 80006895 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 43538393 addi x7,x7,1077 # 80006819 +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 45b38393 addi x7,x7,1115 # 80006857 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 05e38393 addi x7,x7,94 # 80006472 +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 14638393 addi x7,x7,326 # 80006572 +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 22738393 addi x7,x7,551 # 8000666b +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 30338393 addi x7,x7,771 # 8000675f +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 45c38393 addi x7,x7,1116 # 800068d0 +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 02638393 addi x7,x7,38 # 800064b2 +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 10c38393 addi x7,x7,268 # 800065b0 +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 1eb38393 addi x7,x7,491 # 800066a7 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 2c838393 addi x7,x7,712 # 8000679c +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 41f38393 addi x7,x7,1055 # 8000690b +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: fef38393 addi x7,x7,-17 # 800064f3 +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 0d338393 addi x7,x7,211 # 800065ef +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 1b038393 addi x7,x7,432 # 800066e4 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 28e38393 addi x7,x7,654 # 800067da +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 3e338393 addi x7,x7,995 # 80006947 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 40838393 addi x7,x7,1032 # 80006984 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 43f38393 addi x7,x7,1087 # 800069d3 +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 52238393 addi x7,x7,1314 # 80006ace +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00004397 auipc x7,0x4 +800025c8: 60638393 addi x7,x7,1542 # 80006bca +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00003817 auipc x16,0x3 +800025e8: 6fc80813 addi x16,x16,1788 # 80005ce0 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00003817 auipc x16,0x3 +800025f8: 6ec80813 addi x16,x16,1772 # 80005ce0 +800025fc: 00882023 sw x8,0(x16) +80002600: 00003817 auipc x16,0x3 +80002604: 6e480813 addi x16,x16,1764 # 80005ce4 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00003817 auipc x16,0x3 +80002614: 6d080813 addi x16,x16,1744 # 80005ce0 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: bce50513 addi x10,x10,-1074 # 8000622e +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: bc750513 addi x10,x10,-1081 # 80006267 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: c3e50513 addi x10,x10,-962 # 8000631e +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00003517 auipc x10,0x3 +8000270c: 5c852503 lw x10,1480(x10) # 80005cd0 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: c1050513 addi x10,x10,-1008 # 80006330 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 46852503 lw x10,1128(x10) # 80005bb0 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: bd250513 addi x10,x10,-1070 # 80006332 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 52852503 lw x10,1320(x10) # 80005cb0 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 55850513 addi x10,x10,1368 # 80005d18 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: b4650513 addi x10,x10,-1210 # 80006346 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 49052503 lw x10,1168(x10) # 80005cb8 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 4d850513 addi x10,x10,1240 # 80005d18 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 4fd50513 addi x10,x10,1277 # 80006d7d +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 30852503 lw x10,776(x10) # 80005bb0 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 45860613 addi x12,x12,1112 # 80005d18 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 3cc52503 lw x10,972(x10) # 80005cb4 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00004517 auipc x10,0x4 +80002924: 57350513 addi x10,x10,1395 # 80006e93 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 3b860613 addi x12,x12,952 # 80005d18 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 32c52503 lw x10,812(x10) # 80005cb4 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 37860613 addi x12,x12,888 # 80005d18 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 2ec52503 lw x10,748(x10) # 80005cb4 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 39650513 addi x10,x10,918 # 80006d76 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 2f850513 addi x10,x10,760 # 80005d18 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 32e50513 addi x10,x10,814 # 80006d8e +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 12852503 lw x10,296(x10) # 80005bb0 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 22852503 lw x10,552(x10) # 80005cc0 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 21452503 lw x10,532(x10) # 80005cc0 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 25850513 addi x10,x10,600 # 80005d18 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 1f052503 lw x10,496(x10) # 80005cd8 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 2a550513 addi x10,x10,677 # 80006da5 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 08852503 lw x10,136(x10) # 80005bb0 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 19052503 lw x10,400(x10) # 80005cc8 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 17c52503 lw x10,380(x10) # 80005cc8 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 1b850513 addi x10,x10,440 # 80005d18 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 21c50513 addi x10,x10,540 # 80006dbc +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 10052503 lw x10,256(x10) # 80005cc8 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 13850513 addi x10,x10,312 # 80005d18 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 1fa50513 addi x10,x10,506 # 80006e1a +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 08052503 lw x10,128(x10) # 80005cc8 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 0b850513 addi x10,x10,184 # 80005d18 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 05442403 lw x8,84(x8) # 80005ce0 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 21f50513 addi x10,x10,543 # 80006ebf +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 20b50513 addi x10,x10,523 # 80006eeb +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: fe080813 addi x16,x16,-32 # 80005ce8 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00003517 auipc x10,0x3 +80002d24: 61050513 addi x10,x10,1552 # 80006330 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 19b50513 addi x10,x10,411 # 80006efb +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: f4052503 lw x10,-192(x10) # 80005cc8 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: f7850513 addi x10,x10,-136 # 80005d18 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 14650513 addi x10,x10,326 # 80006f26 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: eb852503 lw x10,-328(x10) # 80005cc0 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: ef850513 addi x10,x10,-264 # 80005d18 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: e7832303 lw x6,-392(x6) # 80005cc0 +80002e50: 00003397 auipc x7,0x3 +80002e54: e783a383 lw x7,-392(x7) # 80005cc8 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 0f550513 addi x10,x10,245 # 80006f55 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 11d50513 addi x10,x10,285 # 80006fbd +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: df832303 lw x6,-520(x6) # 80005cc0 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: df83a383 lw x7,-520(x7) # 80005cc8 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: e1850513 addi x10,x10,-488 # 80005d18 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 0a450513 addi x10,x10,164 # 80006fe4 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 00150513 addi x10,x10,1 # 80006f81 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: ffd50513 addi x10,x10,-3 # 80006fbd +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: ce032303 lw x6,-800(x6) # 80005cc8 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: cd03a383 lw x7,-816(x7) # 80005cc0 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: cf850513 addi x10,x10,-776 # 80005d18 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 06c50513 addi x10,x10,108 # 800070cc +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 11350513 addi x10,x10,275 # 800071b3 +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: c1c52503 lw x10,-996(x10) # 80005ce4 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 0ef50513 addi x10,x10,239 # 800071ef +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 08d50513 addi x10,x10,141 # 800071cd +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 05550513 addi x10,x10,85 # 800071d5 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 01d50513 addi x10,x10,29 # 800071dd +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: fe650513 addi x10,x10,-26 # 800071e6 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: fb850513 addi x10,x10,-72 # 800071f8 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: a7852503 lw x10,-1416(x10) # 80005ce0 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 08f50513 addi x10,x10,143 # 8000734f +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: f1250513 addi x10,x10,-238 # 80007212 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: f0350513 addi x10,x10,-253 # 80007243 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: ee350513 addi x10,x10,-285 # 80007263 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: ec150513 addi x10,x10,-319 # 80007281 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: ea050513 addi x10,x10,-352 # 800072a0 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: e8850513 addi x10,x10,-376 # 800072c8 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: e7450513 addi x10,x10,-396 # 800072f4 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: e6050513 addi x10,x10,-416 # 80007320 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: e5e50513 addi x10,x10,-418 # 8000735e +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00002517 auipc x10,0x2 +8000352c: 7a052503 lw x10,1952(x10) # 80005cc8 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00002517 auipc x10,0x2 +80003544: 7d850513 addi x10,x10,2008 # 80005d18 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: df550513 addi x10,x10,-523 # 80007375 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 71852503 lw x10,1816(x10) # 80005cc0 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00002517 auipc x10,0x2 +800035c4: 75850513 addi x10,x10,1880 # 80005d18 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 6f852503 lw x10,1784(x10) # 80005ce0 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: d8c50513 addi x10,x10,-628 # 8000738c +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 6a052503 lw x10,1696(x10) # 80005cc8 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: d6350513 addi x10,x10,-669 # 800073a3 +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00002517 auipc x10,0x2 +8000366c: 65852503 lw x10,1624(x10) # 80005cc0 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00002517 auipc x10,0x2 +80003688: 65c52503 lw x10,1628(x10) # 80005ce0 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: d7950513 addi x10,x10,-647 # 80007419 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: e0f50513 addi x10,x10,-497 # 800074ef +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: ec250513 addi x10,x10,-318 # 800075e2 +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: f7d50513 addi x10,x10,-131 # 800076dd +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 02450513 addi x10,x10,36 # 800077c4 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: bf150513 addi x10,x10,-1039 # 800073d1 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 4f062603 lw x12,1264(x12) # 80005cf8 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: b9a50513 addi x10,x10,-1126 # 800063ba +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 49850513 addi x10,x10,1176 # 80005d18 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 48058593 addi x11,x11,1152 # 80005d40 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 4b458593 addi x11,x11,1204 # 80005da0 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 8be50513 addi x10,x10,-1858 # 800061de +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 51250513 addi x10,x10,1298 # 80006e72 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 36060613 addi x12,x12,864 # 80005cf0 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: a3b50513 addi x10,x10,-1477 # 800063db +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 33052503 lw x10,816(x10) # 80005cf8 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 33850513 addi x10,x10,824 # 80005d18 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: 9cb50513 addi x10,x10,-1589 # 800063eb +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 2b852503 lw x10,696(x10) # 80005d00 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 2b850513 addi x10,x10,696 # 80005d18 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: 95b50513 addi x10,x10,-1701 # 800063fb +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 24052503 lw x10,576(x10) # 80005d08 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 23850513 addi x10,x10,568 # 80005d18 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: 8eb50513 addi x10,x10,-1813 # 8000640b +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 1c852503 lw x10,456(x10) # 80005d10 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 1b850513 addi x10,x10,440 # 80005d18 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 16860613 addi x12,x12,360 # 80005cf0 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 17860613 addi x12,x12,376 # 80005d18 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f4430313 addi x6,x6,-188 # 80000fe0 +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f2c30313 addi x6,x6,-212 # 80000fe0 +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f1430313 addi x6,x6,-236 # 80000fe0 +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: db078793 addi x15,x15,-592 # 80000ff0 +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 45010113 addi x2,x2,1104 # 800078f0 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006e9b .word 0x80006e9b +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 05828293 addi x5,x5,88 # 80016600 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 03828293 addi x5,x5,56 # 80016600 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-rol-00.elf.objdump b/riscv-tests/rv32-Zbkb-rol-00.elf.objdump new file mode 100644 index 0000000..e0756aa --- /dev/null +++ b/riscv-tests/rv32-Zbkb-rol-00.elf.objdump @@ -0,0 +1,13215 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rol-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rol-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007140 memsz 0x00007140 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00007100 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00018520 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020600 80020600 00021600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002682 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000079 00000000 00000000 00024cfd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d76 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d99 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024db0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000087 00000000 00000000 00024dd8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e5f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020600 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccWEAbFP.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b0 +80005540 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_rol_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b1 +80009020 l .data 00000000 Zbkb_rol_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b2 +80009050 l .data 00000000 Zbkb_rol_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b3 +80009080 l .data 00000000 Zbkb_rol_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b4 +80005558 l .text.rvtest 00000000 failedtest_x8_x7 +800090b0 l .data 00000000 Zbkb_rol_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b5 +800090e0 l .data 00000000 Zbkb_rol_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b6 +80009110 l .data 00000000 Zbkb_rol_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b7 +80005580 l .text.rvtest 00000000 failedtest_x14_x13 +80009140 l .data 00000000 Zbkb_rol_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b8 +80009170 l .data 00000000 Zbkb_rol_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b9 +800091a0 l .data 00000000 Zbkb_rol_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b10 +800091d1 l .data 00000000 Zbkb_rol_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b11 +80009203 l .data 00000000 Zbkb_rol_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b12 +80009235 l .data 00000000 Zbkb_rol_cg_cp_rs1_b12_str +800002ac l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b13 +80009267 l .data 00000000 Zbkb_rol_cg_cp_rs1_b13_str +800002d8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b14 +80009299 l .data 00000000 Zbkb_rol_cg_cp_rs1_b14_str +80000304 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b15 +800092cb l .data 00000000 Zbkb_rol_cg_cp_rs1_b15_str +80000330 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b16 +800092fd l .data 00000000 Zbkb_rol_cg_cp_rs1_b16_str +8000035c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b17 +8000932f l .data 00000000 Zbkb_rol_cg_cp_rs1_b17_str +80000388 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b18 +80009361 l .data 00000000 Zbkb_rol_cg_cp_rs1_b18_str +800003b4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b19 +80009393 l .data 00000000 Zbkb_rol_cg_cp_rs1_b19_str +800003e0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b20 +800093c5 l .data 00000000 Zbkb_rol_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b21 +800093f7 l .data 00000000 Zbkb_rol_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b22 +80009429 l .data 00000000 Zbkb_rol_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b23 +8000945b l .data 00000000 Zbkb_rol_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b24 +8000948d l .data 00000000 Zbkb_rol_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b25 +800094bf l .data 00000000 Zbkb_rol_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b26 +800094f1 l .data 00000000 Zbkb_rol_cg_cp_rs1_b26_str +80000518 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b27 +80009523 l .data 00000000 Zbkb_rol_cg_cp_rs1_b27_str +80000544 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b28 +80009555 l .data 00000000 Zbkb_rol_cg_cp_rs1_b28_str +80000574 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b29 +80009587 l .data 00000000 Zbkb_rol_cg_cp_rs1_b29_str +800005a4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b30 +800095b9 l .data 00000000 Zbkb_rol_cg_cp_rs1_b30_str +800005d4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_b31 +800095eb l .data 00000000 Zbkb_rol_cg_cp_rs1_b31_str +80000600 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b0 +8000961d l .data 00000000 Zbkb_rol_cg_cp_rs2_b0_str +8000062c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b1 +8000964e l .data 00000000 Zbkb_rol_cg_cp_rs2_b1_str +80000658 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b2 +8000967f l .data 00000000 Zbkb_rol_cg_cp_rs2_b2_str +80000684 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b3 +800096b0 l .data 00000000 Zbkb_rol_cg_cp_rs2_b3_str +800006b8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b4 +800096e1 l .data 00000000 Zbkb_rol_cg_cp_rs2_b4_str +800006e4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b5 +80009712 l .data 00000000 Zbkb_rol_cg_cp_rs2_b5_str +80000710 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b6 +80009743 l .data 00000000 Zbkb_rol_cg_cp_rs2_b6_str +80000744 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b7 +80009774 l .data 00000000 Zbkb_rol_cg_cp_rs2_b7_str +80000770 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b8 +800097a5 l .data 00000000 Zbkb_rol_cg_cp_rs2_b8_str +8000079c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b9 +800097d6 l .data 00000000 Zbkb_rol_cg_cp_rs2_b9_str +800007c8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b10 +80009807 l .data 00000000 Zbkb_rol_cg_cp_rs2_b10_str +800007f4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b11 +80009839 l .data 00000000 Zbkb_rol_cg_cp_rs2_b11_str +80000820 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b12 +8000986b l .data 00000000 Zbkb_rol_cg_cp_rs2_b12_str +80000854 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b13 +8000989d l .data 00000000 Zbkb_rol_cg_cp_rs2_b13_str +80000880 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b14 +800098cf l .data 00000000 Zbkb_rol_cg_cp_rs2_b14_str +800008ac l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b15 +80009901 l .data 00000000 Zbkb_rol_cg_cp_rs2_b15_str +800008d8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b16 +80009933 l .data 00000000 Zbkb_rol_cg_cp_rs2_b16_str +80000904 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b17 +80009965 l .data 00000000 Zbkb_rol_cg_cp_rs2_b17_str +80000930 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b18 +80009997 l .data 00000000 Zbkb_rol_cg_cp_rs2_b18_str +8000095c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b19 +800099c9 l .data 00000000 Zbkb_rol_cg_cp_rs2_b19_str +80000988 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b20 +800099fb l .data 00000000 Zbkb_rol_cg_cp_rs2_b20_str +800009b8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b21 +80009a2d l .data 00000000 Zbkb_rol_cg_cp_rs2_b21_str +800009e8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b22 +80009a5f l .data 00000000 Zbkb_rol_cg_cp_rs2_b22_str +80000a14 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b23 +80009a91 l .data 00000000 Zbkb_rol_cg_cp_rs2_b23_str +80000a40 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b24 +80009ac3 l .data 00000000 Zbkb_rol_cg_cp_rs2_b24_str +80000a6c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b25 +80009af5 l .data 00000000 Zbkb_rol_cg_cp_rs2_b25_str +80000a98 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b26 +80009b27 l .data 00000000 Zbkb_rol_cg_cp_rs2_b26_str +80000ac4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b27 +80009b59 l .data 00000000 Zbkb_rol_cg_cp_rs2_b27_str +80000af0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b28 +80009b8b l .data 00000000 Zbkb_rol_cg_cp_rs2_b28_str +80000b1c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b29 +80009bbd l .data 00000000 Zbkb_rol_cg_cp_rs2_b29_str +80000b48 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b30 +80009bef l .data 00000000 Zbkb_rol_cg_cp_rs2_b30_str +80000b74 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_b31 +80009c21 l .data 00000000 Zbkb_rol_cg_cp_rs2_b31_str +80000ba0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b0 +80009c53 l .data 00000000 Zbkb_rol_cg_cp_rd_b0_str +80000bcc l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b1 +80009c83 l .data 00000000 Zbkb_rol_cg_cp_rd_b1_str +80000bf8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b2 +80009cb3 l .data 00000000 Zbkb_rol_cg_cp_rd_b2_str +80000c24 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b3 +80009ce3 l .data 00000000 Zbkb_rol_cg_cp_rd_b3_str +80000c58 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b4 +80009d13 l .data 00000000 Zbkb_rol_cg_cp_rd_b4_str +80000c84 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b5 +80009d43 l .data 00000000 Zbkb_rol_cg_cp_rd_b5_str +80000cb0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b6 +80009d73 l .data 00000000 Zbkb_rol_cg_cp_rd_b6_str +80000ce4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b7 +80009da3 l .data 00000000 Zbkb_rol_cg_cp_rd_b7_str +80000d10 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b8 +80009dd3 l .data 00000000 Zbkb_rol_cg_cp_rd_b8_str +80000d3c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b9 +80009e03 l .data 00000000 Zbkb_rol_cg_cp_rd_b9_str +80000d6c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b10 +80009e33 l .data 00000000 Zbkb_rol_cg_cp_rd_b10_str +80000d9c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b11 +80009e64 l .data 00000000 Zbkb_rol_cg_cp_rd_b11_str +80000dc8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b12 +80009e95 l .data 00000000 Zbkb_rol_cg_cp_rd_b12_str +80000df4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b13 +80009ec6 l .data 00000000 Zbkb_rol_cg_cp_rd_b13_str +80000e20 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b14 +80009ef7 l .data 00000000 Zbkb_rol_cg_cp_rd_b14_str +80000e4c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b15 +80009f28 l .data 00000000 Zbkb_rol_cg_cp_rd_b15_str +80000e78 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b16 +80009f59 l .data 00000000 Zbkb_rol_cg_cp_rd_b16_str +80000ea8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b17 +80009f8a l .data 00000000 Zbkb_rol_cg_cp_rd_b17_str +80000ed4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b18 +80009fbb l .data 00000000 Zbkb_rol_cg_cp_rd_b18_str +80000f04 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b19 +80009fec l .data 00000000 Zbkb_rol_cg_cp_rd_b19_str +80000f30 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b20 +8000a01d l .data 00000000 Zbkb_rol_cg_cp_rd_b20_str +80000f5c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b21 +8000a04e l .data 00000000 Zbkb_rol_cg_cp_rd_b21_str +80000f88 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b22 +8000a07f l .data 00000000 Zbkb_rol_cg_cp_rd_b22_str +80000fb4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b23 +8000a0b0 l .data 00000000 Zbkb_rol_cg_cp_rd_b23_str +80000fe4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b24 +8000a0e1 l .data 00000000 Zbkb_rol_cg_cp_rd_b24_str +80001010 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b25 +8000a112 l .data 00000000 Zbkb_rol_cg_cp_rd_b25_str +8000103c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b26 +8000a143 l .data 00000000 Zbkb_rol_cg_cp_rd_b26_str +80001068 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b27 +8000a174 l .data 00000000 Zbkb_rol_cg_cp_rd_b27_str +80001094 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b28 +8000a1a5 l .data 00000000 Zbkb_rol_cg_cp_rd_b28_str +800010c0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b29 +8000a1d6 l .data 00000000 Zbkb_rol_cg_cp_rd_b29_str +800010ec l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b30 +8000a207 l .data 00000000 Zbkb_rol_cg_cp_rd_b30_str +80001118 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rd_b31 +8000a238 l .data 00000000 Zbkb_rol_cg_cp_rd_b31_str +80001144 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x0 +8000a269 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x0_str +80001170 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x1 +8000a2a1 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x1_str +8000119c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x2 +8000a2d9 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x2_str +800011c8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x80000000 +8000a311 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x80000000_str +800011f4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x80000001 +8000a351 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x80000001_str +80001220 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x7fffffff +8000a391 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x7fffffff_str +8000124c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x7ffffffe +8000a3d1 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x7ffffffe_str +80001278 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0xffffffff +8000a411 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0xffffffff_str +800012a4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0xfffffffe +8000a451 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0xfffffffe_str +800012d0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x5bbc8872 +8000a491 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x5bbc8872_str +800012fc l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaa +8000a4d1 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaa_str +80001328 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs1_edges_0x55555555 +8000a511 l .data 00000000 Zbkb_rol_cg_cp_rs1_edges_0x55555555_str +80001354 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x0 +8000a551 l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x0_str +80001380 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x1 +8000a58a l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x1_str +800013ac l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x2 +8000a5c3 l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x2_str +800013d8 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x80000000 +8000a5fc l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x80000000_str +80001404 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x80000001 +8000a63c l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x80000001_str +80001430 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x7fffffff +8000a67c l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x7fffffff_str +8000145c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x7ffffffe +8000a6bc l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x7ffffffe_str +80001488 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0xffffffff +8000a6fc l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0xffffffff_str +800014b4 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0xfffffffe +8000a73c l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0xfffffffe_str +800014e0 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x5bbc8872 +8000a77c l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x5bbc8872_str +8000150c l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaa +8000a7bc l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaa_str +80001538 l .text.rvtest 00000000 Zbkb_rol_cg_cp_rs2_edges_0x55555555 +8000a7fc l .data 00000000 Zbkb_rol_cg_cp_rs2_edges_0x55555555_str +80001564 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a83c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001590 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a88c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015bc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a8dc l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a92c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001614 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a983 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001640 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000a9da l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000166c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000aa31 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001698 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000aa88 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016c4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aadf l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000ab36 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +8000171c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ab8d l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001748 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000abe4 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001774 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000ac3b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ac8b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017cc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000acdb l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000ad2b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001824 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ad82 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001850 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000add9 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000187c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000ae30 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000ae87 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018d4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000aede l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001900 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000af35 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000192c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000af8c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001958 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000afe3 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001984 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b03a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b08a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019dc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b0da l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a08 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b12a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a34 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b181 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a60 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b1d8 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a8c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b22f l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b286 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ae4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b2dd l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b10 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b334 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b3c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b38b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b68 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b3e2 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b94 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b439 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b490 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bec l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b4e7 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c18 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b53e l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c44 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b59c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c70 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b5fa l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c9c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b658 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b6b6 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cf4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b714 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d20 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b772 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d4c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b7d0 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d78 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b82e l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001da4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b88c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b8e3 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001dfc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b93a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e28 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000b991 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e54 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000b9ef l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e80 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000ba4d l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eac l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000baab l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bb09 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f04 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bb67 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f30 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bbc5 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f5c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bc23 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f88 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bc81 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fb4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bcdf l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bd36 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +8000200c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bd8d l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002038 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bde4 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002064 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000be42 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002090 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000bea0 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020bc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000befe l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000bf5c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002114 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000bfba l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002140 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c018 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000216c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c076 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002198 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c0d4 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021c4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c132 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c189 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +8000221c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c1e0 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002248 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c237 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002274 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c295 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c2f3 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022cc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c351 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c3af l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002324 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c40d l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002350 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c46b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000237c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c4c9 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c527 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023d4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c585 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002400 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c5dc l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000242c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c633 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002458 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c68a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002484 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c6e8 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c746 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024dc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c7a4 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002508 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c802 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002534 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c860 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002560 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c8be l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000258c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c91c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000c97a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025e4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000c9d8 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002610 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ca2f l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000263c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000ca86 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002668 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cadd l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002694 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cb3b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cb99 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026ec l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cbf7 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002718 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cc55 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002744 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ccb3 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002770 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cd11 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000279c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cd6f l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cdcd l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027f4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000ce2b l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002820 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000ce82 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000284c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000ced9 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002878 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000cf30 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028a4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000cf8e l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000cfec l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028fc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d04a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002928 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d0a8 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002954 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d106 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002980 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d164 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029ac l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d1c2 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d220 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a04 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d27e l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a30 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d2d5 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a5c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d32c l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a88 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d383 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ab4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d3e1 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d43f l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b0c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d49d l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b38 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d4fb l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b64 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d559 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b90 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d5b7 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bbc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d615 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d673 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c14 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d6d1 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c40 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d728 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c6c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d77f l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c98 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d7d6 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cc4 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d834 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d892 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d1c l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d8f0 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d48 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000d94e l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d74 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000d9ac l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da0 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000da0a l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dcc l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000da68 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df8 l .text.rvtest 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dac6 l .data 00000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e24 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b0 +8000db24 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b0_str +80002e50 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b1 +8000db5b l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b1_str +80002e7c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b2 +8000db92 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b2_str +80002ea8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b3 +8000dbc9 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b3_str +80002edc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b4 +8000dc00 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b4_str +80002f08 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b5 +8000dc37 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b5_str +80002f34 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b6 +8000dc6e l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b7 +8000dca5 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b8 +8000dcdc l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b8_str +80002fb8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b9 +8000dd13 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b10 +8000dd4a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b11 +8000dd82 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b12 +8000ddba l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b12_str +80003070 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b13 +8000ddf2 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b13_str +8000309c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b14 +8000de2a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b14_str +800030c8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b15 +8000de62 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b15_str +800030f8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b16 +8000de9a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b16_str +80003124 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b17 +8000ded2 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b17_str +80003150 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b18 +8000df0a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b18_str +8000317c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b19 +8000df42 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b19_str +800031a8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b20 +8000df7a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b20_str +800031d8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b21 +8000dfb2 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b21_str +80003204 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b22 +8000dfea l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b22_str +80003230 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b23 +8000e022 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b23_str +8000325c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b24 +8000e05a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b24_str +80003288 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b25 +8000e092 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b25_str +800032b4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b26 +8000e0ca l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b26_str +800032e0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b27 +8000e102 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b27_str +8000330c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b28 +8000e13a l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b28_str +80003338 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b29 +8000e172 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b29_str +80003364 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b30 +8000e1aa l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b30_str +80003390 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b31 +8000e1e2 l .data 00000000 Zbkb_rol_cg_cmp_rs1_rs2_b31_str +800033bc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b0 +8000e21a l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b0_str +800033e8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b1 +8000e250 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b1_str +80003414 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b2 +8000e286 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b2_str +80003440 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b3 +8000e2bc l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b3_str +8000346c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b4 +8000e2f2 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b4_str +80003498 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b5 +8000e328 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b5_str +800034c8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b6 +8000e35e l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b6_str +800034fc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b7 +8000e394 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b7_str +80003528 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b8 +8000e3ca l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b8_str +80003558 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b9 +8000e400 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b9_str +80003584 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b10 +8000e436 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b10_str +800035b0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b11 +8000e46d l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b11_str +800035dc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b12 +8000e4a4 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b12_str +80003610 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b13 +8000e4db l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b13_str +8000363c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b14 +8000e512 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b14_str +80003668 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b15 +8000e549 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b15_str +80003694 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b16 +8000e580 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b16_str +800036c0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b17 +8000e5b7 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b17_str +800036f0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b18 +8000e5ee l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b18_str +8000371c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b19 +8000e625 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b19_str +80003748 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b20 +8000e65c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b20_str +80003774 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b21 +8000e693 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b21_str +800037a0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b22 +8000e6ca l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b22_str +800037cc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b23 +8000e701 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b23_str +800037f8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b24 +8000e738 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b24_str +80003824 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b25 +8000e76f l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b25_str +80003850 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b26 +8000e7a6 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b26_str +8000387c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b27 +8000e7dd l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b27_str +800038ac l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b28 +8000e814 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b28_str +800038d8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b29 +8000e84b l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b29_str +80003904 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b30 +8000e882 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b30_str +80003934 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_b31 +8000e8b9 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_b31_str +80003960 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b0 +8000e8f0 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b0_str +8000398c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b1 +8000e926 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b1_str +800039b8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b2 +8000e95c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b2_str +800039e4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b3 +8000e992 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b3_str +80003a10 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b4 +8000e9c8 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b4_str +80003a3c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b5 +8000e9fe l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b5_str +80003a68 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b6 +8000ea34 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b6_str +80003a9c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b7 +8000ea6a l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b7_str +80003ac8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b8 +8000eaa0 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b8_str +80003af4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b9 +8000ead6 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b9_str +80003b20 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b10 +8000eb0c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b10_str +80003b4c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b11 +8000eb43 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b11_str +80003b78 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b12 +8000eb7a l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b12_str +80003ba4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b13 +8000ebb1 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b13_str +80003bd0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b14 +8000ebe8 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b14_str +80003c00 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b15 +8000ec1f l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b15_str +80003c2c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b16 +8000ec56 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b16_str +80003c58 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b17 +8000ec8d l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b17_str +80003c84 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b18 +8000ecc4 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b18_str +80003cb0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b19 +8000ecfb l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b19_str +80003cdc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b20 +8000ed32 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b20_str +80003d08 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b21 +8000ed69 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b21_str +80003d34 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b22 +8000eda0 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b22_str +80003d60 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b23 +8000edd7 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b23_str +80003d90 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b24 +8000ee0e l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b24_str +80003dbc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b25 +8000ee45 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b25_str +80003dec l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b26 +8000ee7c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b26_str +80003e18 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b27 +8000eeb3 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b27_str +80003e48 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b28 +8000eeea l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b28_str +80003e74 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b29 +8000ef21 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b29_str +80003ea0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b30 +8000ef58 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b30_str +80003ecc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs2_b31 +8000ef8f l .data 00000000 Zbkb_rol_cg_cmp_rd_rs2_b31_str +80003ef8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b0 +8000efc6 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b0_str +80003f28 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b1 +8000f000 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b1_str +80003f58 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b2 +8000f03a l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b2_str +80003f88 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b3 +8000f074 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b3_str +80003fbc l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b4 +8000f0ae l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b4_str +80003fe8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b5 +8000f0e8 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b5_str +80004014 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b6 +8000f122 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b6_str +80004040 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b7 +8000f15c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b7_str +8000406c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b8 +8000f196 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b8_str +80004098 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b9 +8000f1d0 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b9_str +800040c4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b10 +8000f20a l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b10_str +800040f0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b11 +8000f245 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b11_str +8000411c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b12 +8000f280 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b12_str +80004150 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b13 +8000f2bb l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b13_str +8000417c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b14 +8000f2f6 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b14_str +800041a8 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b15 +8000f331 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b15_str +800041d4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b16 +8000f36c l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b16_str +80004200 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b17 +8000f3a7 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b17_str +80004230 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b18 +8000f3e2 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b18_str +8000425c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b19 +8000f41d l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b19_str +80004288 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b20 +8000f458 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b20_str +800042b4 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b21 +8000f493 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b21_str +800042e0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b22 +8000f4ce l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b22_str +8000430c l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b23 +8000f509 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b23_str +80004338 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b24 +8000f544 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b24_str +80004364 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b25 +8000f57f l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b25_str +80004390 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b26 +8000f5ba l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b26_str +800043c0 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b27 +8000f5f5 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b27_str +800043ec l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b28 +8000f630 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b28_str +80004418 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b29 +8000f66b l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b29_str +80004444 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b30 +8000f6a6 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b30_str +80004470 l .text.rvtest 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b31 +8000f6e1 l .data 00000000 Zbkb_rol_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +800044a0 l .text.rvtest 00000000 exit_Mcleanup +800044a4 l .text.rvtest 00000000 resto_Medeleg +800044ac l .text.rvtest 00000000 resto_Msatp +800044b0 l .text.rvtest 00000000 resto_Mscratch +800044b8 l .text.rvtest 00000000 resto_Mxtvec +800044cc l .text.rvtest 00000000 resto_Mtramp +800044d0 l .text.rvtest 00000000 resto_Mloop +800044e8 l .text.rvtest 00000000 check_trap_sig_overflow +80004790 l .text.rvtest 00000000 trap_sig_overflow +80004630 l .text.rvtest 00000000 check_trap_sig_offset +8000fd9d l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000fdd5 l .data 00000000 begin_debugstr +8000fe35 l .data 00000000 trap_sig_overflowstr +800109e0 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011ab8 l .data 00000000 trap_sigptr +80011ab0 l .data 00000000 final_trap_sig_offset +800046f4 l .text.rvtest 00000000 check_abort_test +800055a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000ff89 l .data 00000000 trap_sig_offset_mismatch +80004710 l .text.rvtest 00000000 exit_cleanup +800047c4 l .text.rvtest 00000000 abort_test +8000fdf7 l .data 00000000 abortstr +8000fd64 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004880 l .text.rvtest 00000000 trap_Mhandler +800049a0 l .text.rvtest 00000000 rvtest_Mendtest +800049c4 l .text.rvtest 00000000 common_Mhandler +80004a30 l .text.rvtest 00000000 spcl_M2mmode_test +80004a3c l .text.rvtest 00000000 spcl_Mchk4alt +80004a4c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a44 l .text.rvtest 00000000 spcl_Mparam_chk +800054d0 l .text.rvtest 00000000 Mrtn2mmode +80004fd4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a58 l .text.rvtest 00000000 Mgoto_mchk +80004a5c l .text.rvtest 00000000 tsbi_Mdispatch +80004a84 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a74 l .text.rvtest 00000000 tsbi_Mecall_test +80004af0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005240 l .text.rvtest 00000000 resto_Mrtn +80004ab0 l .text.rvtest 00000000 tsbi_Mgoto_m +80004ac0 l .text.rvtest 00000000 tsbi_Mgoto_s +80004adc l .text.rvtest 00000000 tsbi_Mgoto_u +80004aec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c70 l .text.rvtest 00000000 tsbi_instr_table +80004b20 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004b34 l .text.rvtest 00000000 found_instr +80004b78 l .text.rvtest 00000000 tsbi_instr_not_found +80004b64 l .text.rvtest 00000000 tsbi_instr_rtn +80011417 l .data 00000000 tsbi_instr_not_found_str +80007058 l .text.rvtest 00000000 failedtest_hex_to_str +8000f888 l .data 00000000 ascii_buffer +8000fe9e l .data 00000000 newlinestr +80004ff0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004fdc l .text.rvtest 00000000 Mint_sig_sv +80004ff0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f868 l .data 00000000 saved_xepc +8002051c l .data 00000000 sig_end_canary +80005088 l .text.rvtest 00000000 sv_Mvect +8000ffa0 l .data 00000000 sv_Mvect_str +8000512c l .text.rvtest 00000000 sv_Mcause +800100a2 l .data 00000000 sv_Mcause_str +80005260 l .text.rvtest 00000000 common_Mint_handler +80005154 l .text.rvtest 00000000 common_Mexcpt_handler +80005160 l .text.rvtest 00000000 vmem_adj_Mepc +800051b4 l .text.rvtest 00000000 sv_Mepc +80005188 l .text.rvtest 00000000 code_adj_Mepc +800051b0 l .text.rvtest 00000000 adj_Mepc +8000519c l .text.rvtest 00000000 data_adj_Mepc +8001019d l .data 00000000 sv_Mepc_str +800051d4 l .text.rvtest 00000000 skpsv_Mepc +800051fc l .text.rvtest 00000000 adj_Mepc_rtn +80005208 l .text.rvtest 00000000 skp_adj_Mepc +8000520c l .text.rvtest 00000000 sv_Mtval +80010290 l .data 00000000 sv_Mtval_str +8000522c l .text.rvtest 00000000 skp_Mtval +80005238 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005298 l .text.rvtest 00000000 spcl_Mhandler +80005274 l .text.rvtest 00000000 sv_Mip +80010403 l .data 00000000 sv_Mip_str +800052b4 l .text.rvtest 00000000 spcl_Mdispatch_handling +800052cc l .text.rvtest 00000000 spcl_Mdispatch +800052d0 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +800053d0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int 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.text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000f8b0 l .data 00000000 end_failure_scratch +8000f950 l .data 00000000 trap_excpt_name_0 +8000f970 l .data 00000000 trap_excpt_name_1 +8000f98a l .data 00000000 trap_excpt_name_2 +8000f99f l .data 00000000 trap_excpt_name_3 +8000f9ab l .data 00000000 trap_excpt_name_4 +8000f9c4 l .data 00000000 trap_excpt_name_5 +8000f9d7 l .data 00000000 trap_excpt_name_6 +8000f9f5 l .data 00000000 trap_excpt_name_7 +8000fa0d l .data 00000000 trap_excpt_name_8 +8000fa2b l .data 00000000 trap_excpt_name_9 +8000fa49 l .data 00000000 trap_excpt_name_10 +8000fa68 l .data 00000000 trap_excpt_name_11 +8000fa86 l .data 00000000 trap_excpt_name_12 +8000fa9e l .data 00000000 trap_excpt_name_13 +8000faaf l .data 00000000 trap_excpt_name_14 +8000fabe l .data 00000000 trap_excpt_name_15 +8000fad4 l .data 00000000 trap_excpt_name_16 +8000fae1 l .data 00000000 trap_excpt_name_17 +8000faf0 l .data 00000000 trap_excpt_name_18 +8000fb00 l .data 00000000 trap_excpt_name_19 +8000fb10 l .data 00000000 trap_excpt_name_20 +8000fb2e l .data 00000000 trap_excpt_name_21 +8000fb45 l .data 00000000 trap_excpt_name_22 +8000fb5a l .data 00000000 trap_excpt_name_23 +8000fb76 l .data 00000000 trap_int_name_0 +8000fb8e l .data 00000000 trap_int_name_1 +8000fbad l .data 00000000 trap_int_name_2 +8000fbd4 l .data 00000000 trap_int_name_3 +8000fbf0 l .data 00000000 trap_int_name_4 +8000fc08 l .data 00000000 trap_int_name_5 +8000fc24 l .data 00000000 trap_int_name_6 +8000fc48 l .data 00000000 trap_int_name_7 +8000fc61 l .data 00000000 trap_int_name_8 +8000fc79 l .data 00000000 trap_int_name_9 +8000fc98 l .data 00000000 trap_int_name_10 +8000fcbf l .data 00000000 trap_int_name_11 +8000fcdb l .data 00000000 trap_int_name_12 +8000fd00 l .data 00000000 trap_int_name_13 +8000fd1c l .data 00000000 trap_int_name_14 +8000fd35 l .data 00000000 trap_int_name_15 +8000fef5 l .data 00000000 xepcstr +80010593 l .data 00000000 Mclr_Vext_int_str +800105ed l .data 00000000 Sclr_Mext_int_str +8001068e l .data 00000000 Sclr_Vext_int_str +800106e8 l .data 00000000 Hclr_Mext_int_str +8001078b l .data 00000000 Hclr_Vext_int_str +800107e6 l .data 00000000 Vclr_Mext_int_str +80010836 l .data 00000000 Vclr_Sext_int_str +80010889 l .data 00000000 Vclr_Vext_int_str +80010f28 l .data 00000000 trap_diag_curr_xepc_str +80020520 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80020520 g .data 00000000 rvtest_sig_end +800049d8 g .text.rvtest 00000000 common_Mentry +800044e8 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011460 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004490 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011460 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8001145b g .data 00000000 rvtest_data_end +80004490 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020700 g .tohost 00000000 fromhost +80020600 g .tohost 00000000 tohost +80004750 g .text.rvtest 00000000 rvtest_fail_summary +80004800 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x4397e9e5 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xf66fc36d +80000048: 0001aa03 lw x20,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_rol_cg_cp_rs1_b0: + rol x9, x0, x20 # perform operation +80000050: 614014b3 rol x9,x0,x20 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkb_rol_cg_cp_rs1_b0, Zbkb_rol_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00920863 beq x4,x9,80000068 +8000005c: 4e4052ef jal x5,80005540 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xf8d93831 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xd6f1cda1 +80000074: 0001ab03 lw x22,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_rol_cg_cp_rs1_b1: + rol x20, x1, x22 # perform operation +8000007c: 61609a33 rol x20,x1,x22 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkb_rol_cg_cp_rs1_b1, Zbkb_rol_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01420863 beq x4,x20,80000094 +80000088: 4b8052ef jal x5,80005540 +8000008c: 8000007c .word 0x8000007c +80000090: 80009020 .word 0x80009020 +80000094: 00410113 addi x2,x2,4 + + mv x27, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010d93 addi x27,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x1c5e14c4 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xdf411278 +800000a4: 0001ae83 lw x29,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_rol_cg_cp_rs1_b2: + rol x17, x2, x29 # perform operation +800000ac: 61d118b3 rol x17,x2,x29 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_rol_cg_cp_rs1_b2, Zbkb_rol_cg_cp_rs1_b2_str) +800000b0: 000da203 lw x4,0(x27) +800000b4: 01120863 beq x4,x17,800000c4 +800000b8: 488052ef jal x5,80005540 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009050 .word 0x80009050 +800000c4: 004d8d93 addi x27,x27,4 + + mv x29, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018e93 addi x29,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0x033a5356 +800000cc: 000ea183 lw x3,0(x29) +800000d0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0x9e28a1e8 +800000d4: 000ea403 lw x8,0(x29) +800000d8: 004e8e93 addi x29,x29,4 + +800000dc : +Zbkb_rol_cg_cp_rs1_b3: + rol x25, x3, x8 # perform operation +800000dc: 60819cb3 rol x25,x3,x8 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkb_rol_cg_cp_rs1_b3, Zbkb_rol_cg_cp_rs1_b3_str) +800000e0: 000da203 lw x4,0(x27) +800000e4: 01920863 beq x4,x25,800000f4 +800000e8: 458052ef jal x5,80005540 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009080 .word 0x80009080 +800000f4: 004d8d93 addi x27,x27,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x9c2bf432 +80000100: 000ea203 lw x4,0(x29) +80000104: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x2b60ee60 +80000108: 000ea103 lw x2,0(x29) +8000010c: 004e8e93 addi x29,x29,4 + +80000110 : +Zbkb_rol_cg_cp_rs1_b4: + rol x9, x4, x2 # perform operation +80000110: 602214b3 rol x9,x4,x2 + # Check if x9 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x9, Zbkb_rol_cg_cp_rs1_b4, Zbkb_rol_cg_cp_rs1_b4_str) +80000114: 000da383 lw x7,0(x27) +80000118: 00938863 beq x7,x9,80000128 +8000011c: 43c0546f jal x8,80005558 +80000120: 80000110 .word 0x80000110 +80000124: 800090b0 .word 0x800090b0 +80000128: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0x67f01eed +8000012c: 000ea283 lw x5,0(x29) +80000130: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0xbb61a262 +80000134: 000ea183 lw x3,0(x29) +80000138: 004e8e93 addi x29,x29,4 + +8000013c : +Zbkb_rol_cg_cp_rs1_b5: + rol x23, x5, x3 # perform operation +8000013c: 60329bb3 rol x23,x5,x3 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkb_rol_cg_cp_rs1_b5, Zbkb_rol_cg_cp_rs1_b5_str) +80000140: 000da383 lw x7,0(x27) +80000144: 01738863 beq x7,x23,80000154 +80000148: 4100546f jal x8,80005558 +8000014c: 8000013c .word 0x8000013c +80000150: 800090e0 .word 0x800090e0 +80000154: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0xd515234e +80000158: 000ea303 lw x6,0(x29) +8000015c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xfb4149f4 +80000160: 000eab03 lw x22,0(x29) +80000164: 004e8e93 addi x29,x29,4 + +80000168 : +Zbkb_rol_cg_cp_rs1_b6: + rol x25, x6, x22 # perform operation +80000168: 61631cb3 rol x25,x6,x22 + # Check if x25 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x25, Zbkb_rol_cg_cp_rs1_b6, Zbkb_rol_cg_cp_rs1_b6_str) +8000016c: 000da383 lw x7,0(x27) +80000170: 01938863 beq x7,x25,80000180 +80000174: 3e40546f jal x8,80005558 +80000178: 80000168 .word 0x80000168 +8000017c: 80009110 .word 0x80009110 +80000180: 004d8d93 addi x27,x27,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0xc4560996 +8000018c: 000ea383 lw x7,0(x29) +80000190: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x2146a573 +80000194: 000eae03 lw x28,0(x29) +80000198: 004e8e93 addi x29,x29,4 + +8000019c : +Zbkb_rol_cg_cp_rs1_b7: + rol x6, x7, x28 # perform operation +8000019c: 61c39333 rol x6,x7,x28 + # Check if x6 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x6, Zbkb_rol_cg_cp_rs1_b7, Zbkb_rol_cg_cp_rs1_b7_str) +800001a0: 000da683 lw x13,0(x27) +800001a4: 00668863 beq x13,x6,800001b4 +800001a8: 3d80576f jal x14,80005580 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009140 .word 0x80009140 +800001b4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x2a165f8b +800001b8: 000ea403 lw x8,0(x29) +800001bc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs2: x20 = 0xda981371 +800001c0: 000eaa03 lw x20,0(x29) +800001c4: 004e8e93 addi x29,x29,4 + +800001c8 : +Zbkb_rol_cg_cp_rs1_b8: + rol x1, x8, x20 # perform operation +800001c8: 614410b3 rol x1,x8,x20 + # Check if x1 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x1, Zbkb_rol_cg_cp_rs1_b8, Zbkb_rol_cg_cp_rs1_b8_str) +800001cc: 000da683 lw x13,0(x27) +800001d0: 00168863 beq x13,x1,800001e0 +800001d4: 3ac0576f jal x14,80005580 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009170 .word 0x80009170 +800001e0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0xbb6e9f73 +800001e4: 000ea483 lw x9,0(x29) +800001e8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x815c508e +800001ec: 000ea883 lw x17,0(x29) +800001f0: 004e8e93 addi x29,x29,4 + +800001f4 : +Zbkb_rol_cg_cp_rs1_b9: + rol x15, x9, x17 # perform operation +800001f4: 611497b3 rol x15,x9,x17 + # Check if x15 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x15, Zbkb_rol_cg_cp_rs1_b9, Zbkb_rol_cg_cp_rs1_b9_str) +800001f8: 000da683 lw x13,0(x27) +800001fc: 00f68863 beq x13,x15,8000020c +80000200: 3800576f jal x14,80005580 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091a0 .word 0x800091a0 +8000020c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xf091fdfb +80000210: 000ea503 lw x10,0(x29) +80000214: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0xffed71cd +80000218: 000eac83 lw x25,0(x29) +8000021c: 004e8e93 addi x29,x29,4 + +80000220 : +Zbkb_rol_cg_cp_rs1_b10: + rol x16, x10, x25 # perform operation +80000220: 61951833 rol x16,x10,x25 + # Check if x16 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x16, Zbkb_rol_cg_cp_rs1_b10, Zbkb_rol_cg_cp_rs1_b10_str) +80000224: 000da683 lw x13,0(x27) +80000228: 01068863 beq x13,x16,80000238 +8000022c: 3540576f jal x14,80005580 +80000230: 80000220 .word 0x80000220 +80000234: 800091d1 .word 0x800091d1 +80000238: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0x6499a1a5 +8000023c: 000ea583 lw x11,0(x29) +80000240: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0x637bf99e +80000244: 000ea783 lw x15,0(x29) +80000248: 004e8e93 addi x29,x29,4 + +8000024c : +Zbkb_rol_cg_cp_rs1_b11: + rol x24, x11, x15 # perform operation +8000024c: 60f59c33 rol x24,x11,x15 + # Check if x24 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x24, Zbkb_rol_cg_cp_rs1_b11, Zbkb_rol_cg_cp_rs1_b11_str) +80000250: 000da683 lw x13,0(x27) +80000254: 01868863 beq x13,x24,80000264 +80000258: 3280576f jal x14,80005580 +8000025c: 8000024c .word 0x8000024c +80000260: 80009203 .word 0x80009203 +80000264: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xb65b18dc +80000268: 000ea603 lw x12,0(x29) +8000026c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x2afd7b16 +80000270: 000ea583 lw x11,0(x29) +80000274: 004e8e93 addi x29,x29,4 + +80000278 : +Zbkb_rol_cg_cp_rs1_b12: + rol x17, x12, x11 # perform operation +80000278: 60b618b3 rol x17,x12,x11 + # Check if x17 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x17, Zbkb_rol_cg_cp_rs1_b12, Zbkb_rol_cg_cp_rs1_b12_str) +8000027c: 000da683 lw x13,0(x27) +80000280: 01168863 beq x13,x17,80000290 +80000284: 2fc0576f jal x14,80005580 +80000288: 80000278 .word 0x80000278 +8000028c: 80009235 .word 0x80009235 +80000290: 004d8d93 addi x27,x27,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000294: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000298: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x3f09159f +8000029c: 000ea683 lw x13,0(x29) +800002a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x3b23bed0 +800002a4: 000ea583 lw x11,0(x29) +800002a8: 004e8e93 addi x29,x29,4 + +800002ac : +Zbkb_rol_cg_cp_rs1_b13: + rol x21, x13, x11 # perform operation +800002ac: 60b69ab3 rol x21,x13,x11 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkb_rol_cg_cp_rs1_b13, Zbkb_rol_cg_cp_rs1_b13_str) +800002b0: 000da203 lw x4,0(x27) +800002b4: 01520863 beq x4,x21,800002c4 +800002b8: 288052ef jal x5,80005540 +800002bc: 800002ac .word 0x800002ac +800002c0: 80009267 .word 0x80009267 +800002c4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0xb23402a6 +800002c8: 000ea703 lw x14,0(x29) +800002cc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0xe3cb40c5 +800002d0: 000ea103 lw x2,0(x29) +800002d4: 004e8e93 addi x29,x29,4 + +800002d8 : +Zbkb_rol_cg_cp_rs1_b14: + rol x22, x14, x2 # perform operation +800002d8: 60271b33 rol x22,x14,x2 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkb_rol_cg_cp_rs1_b14, Zbkb_rol_cg_cp_rs1_b14_str) +800002dc: 000da203 lw x4,0(x27) +800002e0: 01620863 beq x4,x22,800002f0 +800002e4: 25c052ef jal x5,80005540 +800002e8: 800002d8 .word 0x800002d8 +800002ec: 80009299 .word 0x80009299 +800002f0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x2f54783d +800002f4: 000ea783 lw x15,0(x29) +800002f8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0xb7a560a4 +800002fc: 000ea303 lw x6,0(x29) +80000300: 004e8e93 addi x29,x29,4 + +80000304 : +Zbkb_rol_cg_cp_rs1_b15: + rol x11, x15, x6 # perform operation +80000304: 606795b3 rol x11,x15,x6 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_rol_cg_cp_rs1_b15, Zbkb_rol_cg_cp_rs1_b15_str) +80000308: 000da203 lw x4,0(x27) +8000030c: 00b20863 beq x4,x11,8000031c +80000310: 230052ef jal x5,80005540 +80000314: 80000304 .word 0x80000304 +80000318: 800092cb .word 0x800092cb +8000031c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x863cf873 +80000320: 000ea803 lw x16,0(x29) +80000324: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x889ca31d +80000328: 000ea883 lw x17,0(x29) +8000032c: 004e8e93 addi x29,x29,4 + +80000330 : +Zbkb_rol_cg_cp_rs1_b16: + rol x1, x16, x17 # perform operation +80000330: 611810b3 rol x1,x16,x17 + # Check if x1 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x1, Zbkb_rol_cg_cp_rs1_b16, Zbkb_rol_cg_cp_rs1_b16_str) +80000334: 000da203 lw x4,0(x27) +80000338: 00120863 beq x4,x1,80000348 +8000033c: 204052ef jal x5,80005540 +80000340: 80000330 .word 0x80000330 +80000344: 800092fd .word 0x800092fd +80000348: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x13fac00d +8000034c: 000ea883 lw x17,0(x29) +80000350: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x4781b2f8 +80000354: 000ea983 lw x19,0(x29) +80000358: 004e8e93 addi x29,x29,4 + +8000035c : +Zbkb_rol_cg_cp_rs1_b17: + rol x23, x17, x19 # perform operation +8000035c: 61389bb3 rol x23,x17,x19 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkb_rol_cg_cp_rs1_b17, Zbkb_rol_cg_cp_rs1_b17_str) +80000360: 000da203 lw x4,0(x27) +80000364: 01720863 beq x4,x23,80000374 +80000368: 1d8052ef jal x5,80005540 +8000036c: 8000035c .word 0x8000035c +80000370: 8000932f .word 0x8000932f +80000374: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x37c59510 +80000378: 000ea903 lw x18,0(x29) +8000037c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x68700a92 +80000380: 000ea703 lw x14,0(x29) +80000384: 004e8e93 addi x29,x29,4 + +80000388 : +Zbkb_rol_cg_cp_rs1_b18: + rol x0, x18, x14 # perform operation +80000388: 60e91033 rol x0,x18,x14 + # Check if x0 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x0, Zbkb_rol_cg_cp_rs1_b18, Zbkb_rol_cg_cp_rs1_b18_str) +8000038c: 000da203 lw x4,0(x27) +80000390: 00020863 beq x4,x0,800003a0 +80000394: 1ac052ef jal x5,80005540 +80000398: 80000388 .word 0x80000388 +8000039c: 80009361 .word 0x80009361 +800003a0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x4e27ae52 +800003a4: 000ea983 lw x19,0(x29) +800003a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x46e3a7f0 +800003ac: 000ea103 lw x2,0(x29) +800003b0: 004e8e93 addi x29,x29,4 + +800003b4 : +Zbkb_rol_cg_cp_rs1_b19: + rol x23, x19, x2 # perform operation +800003b4: 60299bb3 rol x23,x19,x2 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkb_rol_cg_cp_rs1_b19, Zbkb_rol_cg_cp_rs1_b19_str) +800003b8: 000da203 lw x4,0(x27) +800003bc: 01720863 beq x4,x23,800003cc +800003c0: 180052ef jal x5,80005540 +800003c4: 800003b4 .word 0x800003b4 +800003c8: 80009393 .word 0x80009393 +800003cc: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xb6a1f832 +800003d0: 000eaa03 lw x20,0(x29) +800003d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x726a56f4 +800003d8: 000ea703 lw x14,0(x29) +800003dc: 004e8e93 addi x29,x29,4 + +800003e0 : +Zbkb_rol_cg_cp_rs1_b20: + rol x31, x20, x14 # perform operation +800003e0: 60ea1fb3 rol x31,x20,x14 + # Check if x31 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x31, Zbkb_rol_cg_cp_rs1_b20, Zbkb_rol_cg_cp_rs1_b20_str) +800003e4: 000da203 lw x4,0(x27) +800003e8: 01f20863 beq x4,x31,800003f8 +800003ec: 154052ef jal x5,80005540 +800003f0: 800003e0 .word 0x800003e0 +800003f4: 800093c5 .word 0x800093c5 +800003f8: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xc5e282c5 +800003fc: 000eaa83 lw x21,0(x29) +80000400: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x0097e202 +80000404: 000ea803 lw x16,0(x29) +80000408: 004e8e93 addi x29,x29,4 + +8000040c : +Zbkb_rol_cg_cp_rs1_b21: + rol x28, x21, x16 # perform operation +8000040c: 610a9e33 rol x28,x21,x16 + # Check if x28 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x28, Zbkb_rol_cg_cp_rs1_b21, Zbkb_rol_cg_cp_rs1_b21_str) +80000410: 000da203 lw x4,0(x27) +80000414: 01c20863 beq x4,x28,80000424 +80000418: 128052ef jal x5,80005540 +8000041c: 8000040c .word 0x8000040c +80000420: 800093f7 .word 0x800093f7 +80000424: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0xa199e779 +80000428: 000eab03 lw x22,0(x29) +8000042c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xcb71990f +80000430: 000ea583 lw x11,0(x29) +80000434: 004e8e93 addi x29,x29,4 + +80000438 : +Zbkb_rol_cg_cp_rs1_b22: + rol x6, x22, x11 # perform operation +80000438: 60bb1333 rol x6,x22,x11 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkb_rol_cg_cp_rs1_b22, Zbkb_rol_cg_cp_rs1_b22_str) +8000043c: 000da203 lw x4,0(x27) +80000440: 00620863 beq x4,x6,80000450 +80000444: 0fc052ef jal x5,80005540 +80000448: 80000438 .word 0x80000438 +8000044c: 80009429 .word 0x80009429 +80000450: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x2226f4e3 +80000454: 000eab83 lw x23,0(x29) +80000458: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xaa6c1a5f +8000045c: 000ea583 lw x11,0(x29) +80000460: 004e8e93 addi x29,x29,4 + +80000464 : +Zbkb_rol_cg_cp_rs1_b23: + rol x7, x23, x11 # perform operation +80000464: 60bb93b3 rol x7,x23,x11 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkb_rol_cg_cp_rs1_b23, Zbkb_rol_cg_cp_rs1_b23_str) +80000468: 000da203 lw x4,0(x27) +8000046c: 00720863 beq x4,x7,8000047c +80000470: 0d0052ef jal x5,80005540 +80000474: 80000464 .word 0x80000464 +80000478: 8000945b .word 0x8000945b +8000047c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xd263f810 +80000480: 000eac03 lw x24,0(x29) +80000484: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0xc9c465d1 +80000488: 000eab83 lw x23,0(x29) +8000048c: 004e8e93 addi x29,x29,4 + +80000490 : +Zbkb_rol_cg_cp_rs1_b24: + rol x31, x24, x23 # perform operation +80000490: 617c1fb3 rol x31,x24,x23 + # Check if x31 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x31, Zbkb_rol_cg_cp_rs1_b24, Zbkb_rol_cg_cp_rs1_b24_str) +80000494: 000da203 lw x4,0(x27) +80000498: 01f20863 beq x4,x31,800004a8 +8000049c: 0a4052ef jal x5,80005540 +800004a0: 80000490 .word 0x80000490 +800004a4: 8000948d .word 0x8000948d +800004a8: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x546a60dd +800004ac: 000eac83 lw x25,0(x29) +800004b0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x986bc15f +800004b4: 000eab83 lw x23,0(x29) +800004b8: 004e8e93 addi x29,x29,4 + +800004bc : +Zbkb_rol_cg_cp_rs1_b25: + rol x8, x25, x23 # perform operation +800004bc: 617c9433 rol x8,x25,x23 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkb_rol_cg_cp_rs1_b25, Zbkb_rol_cg_cp_rs1_b25_str) +800004c0: 000da203 lw x4,0(x27) +800004c4: 00820863 beq x4,x8,800004d4 +800004c8: 078052ef jal x5,80005540 +800004cc: 800004bc .word 0x800004bc +800004d0: 800094bf .word 0x800094bf +800004d4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xf5e08d2a +800004d8: 000ead03 lw x26,0(x29) +800004dc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x41781469 +800004e0: 000eac03 lw x24,0(x29) +800004e4: 004e8e93 addi x29,x29,4 + +800004e8 : +Zbkb_rol_cg_cp_rs1_b26: + rol x1, x26, x24 # perform operation +800004e8: 618d10b3 rol x1,x26,x24 + # Check if x1 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x1, Zbkb_rol_cg_cp_rs1_b26, Zbkb_rol_cg_cp_rs1_b26_str) +800004ec: 000da203 lw x4,0(x27) +800004f0: 00120863 beq x4,x1,80000500 +800004f4: 04c052ef jal x5,80005540 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800094f1 .word 0x800094f1 +80000500: 004d8d93 addi x27,x27,4 + + mv x30, x27 # switch signature pointer register to avoid conflict with test +80000504: 000d8f13 addi x30,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x48385378 +80000508: 000ead83 lw x27,0(x29) +8000050c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0xac4d69f3 +80000510: 000ea403 lw x8,0(x29) +80000514: 004e8e93 addi x29,x29,4 + +80000518 : +Zbkb_rol_cg_cp_rs1_b27: + rol x17, x27, x8 # perform operation +80000518: 608d98b3 rol x17,x27,x8 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zbkb_rol_cg_cp_rs1_b27, Zbkb_rol_cg_cp_rs1_b27_str) +8000051c: 000f2203 lw x4,0(x30) +80000520: 01120863 beq x4,x17,80000530 +80000524: 01c052ef jal x5,80005540 +80000528: 80000518 .word 0x80000518 +8000052c: 80009523 .word 0x80009523 +80000530: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xaa801666 +80000534: 000eae03 lw x28,0(x29) +80000538: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0xde8942eb +8000053c: 000ead83 lw x27,0(x29) +80000540: 004e8e93 addi x29,x29,4 + +80000544 : +Zbkb_rol_cg_cp_rs1_b28: + rol x24, x28, x27 # perform operation +80000544: 61be1c33 rol x24,x28,x27 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkb_rol_cg_cp_rs1_b28, Zbkb_rol_cg_cp_rs1_b28_str) +80000548: 000f2203 lw x4,0(x30) +8000054c: 01820863 beq x4,x24,8000055c +80000550: 7f1042ef jal x5,80005540 +80000554: 80000544 .word 0x80000544 +80000558: 80009555 .word 0x80009555 +8000055c: 004f0f13 addi x30,x30,4 + + mv x22, x29 # switch data pointer register to avoid conflict with test +80000560: 000e8b13 addi x22,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x5047dedc +80000564: 000b2e83 lw x29,0(x22) +80000568: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x980213f8 +8000056c: 000b2183 lw x3,0(x22) +80000570: 004b0b13 addi x22,x22,4 + +80000574 : +Zbkb_rol_cg_cp_rs1_b29: + rol x8, x29, x3 # perform operation +80000574: 603e9433 rol x8,x29,x3 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zbkb_rol_cg_cp_rs1_b29, Zbkb_rol_cg_cp_rs1_b29_str) +80000578: 000f2203 lw x4,0(x30) +8000057c: 00820863 beq x4,x8,8000058c +80000580: 7c1042ef jal x5,80005540 +80000584: 80000574 .word 0x80000574 +80000588: 80009587 .word 0x80009587 +8000058c: 004f0f13 addi x30,x30,4 + + mv x31, x30 # switch signature pointer register to avoid conflict with test +80000590: 000f0f93 addi x31,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x572eb7bd +80000594: 000b2f03 lw x30,0(x22) +80000598: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x9e399174 +8000059c: 000b2783 lw x15,0(x22) +800005a0: 004b0b13 addi x22,x22,4 + +800005a4 : +Zbkb_rol_cg_cp_rs1_b30: + rol x19, x30, x15 # perform operation +800005a4: 60ff19b3 rol x19,x30,x15 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_rol_cg_cp_rs1_b30, Zbkb_rol_cg_cp_rs1_b30_str) +800005a8: 000fa203 lw x4,0(x31) +800005ac: 01320863 beq x4,x19,800005bc +800005b0: 791042ef jal x5,80005540 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 800095b9 .word 0x800095b9 +800005bc: 004f8f93 addi x31,x31,4 + + mv x21, x31 # switch signature pointer register to avoid conflict with test +800005c0: 000f8a93 addi x21,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x4c1556d3 +800005c4: 000b2f83 lw x31,0(x22) +800005c8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0xf007d9df +800005cc: 000b2383 lw x7,0(x22) +800005d0: 004b0b13 addi x22,x22,4 + +800005d4 : +Zbkb_rol_cg_cp_rs1_b31: + rol x8, x31, x7 # perform operation +800005d4: 607f9433 rol x8,x31,x7 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zbkb_rol_cg_cp_rs1_b31, Zbkb_rol_cg_cp_rs1_b31_str) +800005d8: 000aa203 lw x4,0(x21) +800005dc: 00820863 beq x4,x8,800005ec +800005e0: 761042ef jal x5,80005540 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 800095eb .word 0x800095eb +800005ec: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x05991955 +800005f0: 000b2d83 lw x27,0(x22) +800005f4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x421fdb62 +800005f8: 000b2003 lw x0,0(x22) +800005fc: 004b0b13 addi x22,x22,4 + +80000600 : +Zbkb_rol_cg_cp_rs2_b0: + rol x8, x27, x0 # perform operation +80000600: 600d9433 rol x8,x27,x0 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zbkb_rol_cg_cp_rs2_b0, Zbkb_rol_cg_cp_rs2_b0_str) +80000604: 000aa203 lw x4,0(x21) +80000608: 00820863 beq x4,x8,80000618 +8000060c: 735042ef jal x5,80005540 +80000610: 80000600 .word 0x80000600 +80000614: 8000961d .word 0x8000961d +80000618: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x9aec455b +8000061c: 000b2583 lw x11,0(x22) +80000620: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0xda29a208 +80000624: 000b2083 lw x1,0(x22) +80000628: 004b0b13 addi x22,x22,4 + +8000062c : +Zbkb_rol_cg_cp_rs2_b1: + rol x23, x11, x1 # perform operation +8000062c: 60159bb3 rol x23,x11,x1 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zbkb_rol_cg_cp_rs2_b1, Zbkb_rol_cg_cp_rs2_b1_str) +80000630: 000aa203 lw x4,0(x21) +80000634: 01720863 beq x4,x23,80000644 +80000638: 709042ef jal x5,80005540 +8000063c: 8000062c .word 0x8000062c +80000640: 8000964e .word 0x8000964e +80000644: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x3a13cd92 +80000648: 000b2c83 lw x25,0(x22) +8000064c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x6e04c507 +80000650: 000b2103 lw x2,0(x22) +80000654: 004b0b13 addi x22,x22,4 + +80000658 : +Zbkb_rol_cg_cp_rs2_b2: + rol x1, x25, x2 # perform operation +80000658: 602c90b3 rol x1,x25,x2 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zbkb_rol_cg_cp_rs2_b2, Zbkb_rol_cg_cp_rs2_b2_str) +8000065c: 000aa203 lw x4,0(x21) +80000660: 00120863 beq x4,x1,80000670 +80000664: 6dd042ef jal x5,80005540 +80000668: 80000658 .word 0x80000658 +8000066c: 8000967f .word 0x8000967f +80000670: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x885589ab +80000674: 000b2d83 lw x27,0(x22) +80000678: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xa6a068e9 +8000067c: 000b2183 lw x3,0(x22) +80000680: 004b0b13 addi x22,x22,4 + +80000684 : +Zbkb_rol_cg_cp_rs2_b3: + rol x23, x27, x3 # perform operation +80000684: 603d9bb3 rol x23,x27,x3 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zbkb_rol_cg_cp_rs2_b3, Zbkb_rol_cg_cp_rs2_b3_str) +80000688: 000aa203 lw x4,0(x21) +8000068c: 01720863 beq x4,x23,8000069c +80000690: 6b1042ef jal x5,80005540 +80000694: 80000684 .word 0x80000684 +80000698: 800096b0 .word 0x800096b0 +8000069c: 004a8a93 addi x21,x21,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800006a0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800006a4: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x1aabf805 +800006a8: 000b2603 lw x12,0(x22) +800006ac: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xeb2a2366 +800006b0: 000b2203 lw x4,0(x22) +800006b4: 004b0b13 addi x22,x22,4 + +800006b8 : +Zbkb_rol_cg_cp_rs2_b4: + rol x30, x12, x4 # perform operation +800006b8: 60461f33 rol x30,x12,x4 + # Check if x30 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x30, Zbkb_rol_cg_cp_rs2_b4, Zbkb_rol_cg_cp_rs2_b4_str) +800006bc: 000aa383 lw x7,0(x21) +800006c0: 01e38863 beq x7,x30,800006d0 +800006c4: 6950446f jal x8,80005558 +800006c8: 800006b8 .word 0x800006b8 +800006cc: 800096e1 .word 0x800096e1 +800006d0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xa1e364ff +800006d4: 000b2783 lw x15,0(x22) +800006d8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x88990f4a +800006dc: 000b2283 lw x5,0(x22) +800006e0: 004b0b13 addi x22,x22,4 + +800006e4 : +Zbkb_rol_cg_cp_rs2_b5: + rol x19, x15, x5 # perform operation +800006e4: 605799b3 rol x19,x15,x5 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkb_rol_cg_cp_rs2_b5, Zbkb_rol_cg_cp_rs2_b5_str) +800006e8: 000aa383 lw x7,0(x21) +800006ec: 01338863 beq x7,x19,800006fc +800006f0: 6690446f jal x8,80005558 +800006f4: 800006e4 .word 0x800006e4 +800006f8: 80009712 .word 0x80009712 +800006fc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x618976ca +80000700: 000b2603 lw x12,0(x22) +80000704: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x2ee1ee72 +80000708: 000b2303 lw x6,0(x22) +8000070c: 004b0b13 addi x22,x22,4 + +80000710 : +Zbkb_rol_cg_cp_rs2_b6: + rol x9, x12, x6 # perform operation +80000710: 606614b3 rol x9,x12,x6 + # Check if x9 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x9, Zbkb_rol_cg_cp_rs2_b6, Zbkb_rol_cg_cp_rs2_b6_str) +80000714: 000aa383 lw x7,0(x21) +80000718: 00938863 beq x7,x9,80000728 +8000071c: 63d0446f jal x8,80005558 +80000720: 80000710 .word 0x80000710 +80000724: 80009743 .word 0x80009743 +80000728: 004a8a93 addi x21,x21,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000072c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000730: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xccde73d3 +80000734: 000b2603 lw x12,0(x22) +80000738: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x71c3111e +8000073c: 000b2383 lw x7,0(x22) +80000740: 004b0b13 addi x22,x22,4 + +80000744 : +Zbkb_rol_cg_cp_rs2_b7: + rol x10, x12, x7 # perform operation +80000744: 60761533 rol x10,x12,x7 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zbkb_rol_cg_cp_rs2_b7, Zbkb_rol_cg_cp_rs2_b7_str) +80000748: 000aa683 lw x13,0(x21) +8000074c: 00a68863 beq x13,x10,8000075c +80000750: 6310476f jal x14,80005580 +80000754: 80000744 .word 0x80000744 +80000758: 80009774 .word 0x80009774 +8000075c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x06dd5512 +80000760: 000b2e83 lw x29,0(x22) +80000764: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x8ca5a6c4 +80000768: 000b2403 lw x8,0(x22) +8000076c: 004b0b13 addi x22,x22,4 + +80000770 : +Zbkb_rol_cg_cp_rs2_b8: + rol x17, x29, x8 # perform operation +80000770: 608e98b3 rol x17,x29,x8 + # Check if x17 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x17, Zbkb_rol_cg_cp_rs2_b8, Zbkb_rol_cg_cp_rs2_b8_str) +80000774: 000aa683 lw x13,0(x21) +80000778: 01168863 beq x13,x17,80000788 +8000077c: 6050476f jal x14,80005580 +80000780: 80000770 .word 0x80000770 +80000784: 800097a5 .word 0x800097a5 +80000788: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x615fcefe +8000078c: 000b2d83 lw x27,0(x22) +80000790: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0xb5ba7872 +80000794: 000b2483 lw x9,0(x22) +80000798: 004b0b13 addi x22,x22,4 + +8000079c : +Zbkb_rol_cg_cp_rs2_b9: + rol x19, x27, x9 # perform operation +8000079c: 609d99b3 rol x19,x27,x9 + # Check if x19 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x19, Zbkb_rol_cg_cp_rs2_b9, Zbkb_rol_cg_cp_rs2_b9_str) +800007a0: 000aa683 lw x13,0(x21) +800007a4: 01368863 beq x13,x19,800007b4 +800007a8: 5d90476f jal x14,80005580 +800007ac: 8000079c .word 0x8000079c +800007b0: 800097d6 .word 0x800097d6 +800007b4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xb74a8557 +800007b8: 000b2e83 lw x29,0(x22) +800007bc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x21fa463f +800007c0: 000b2503 lw x10,0(x22) +800007c4: 004b0b13 addi x22,x22,4 + +800007c8 : +Zbkb_rol_cg_cp_rs2_b10: + rol x0, x29, x10 # perform operation +800007c8: 60ae9033 rol x0,x29,x10 + # Check if x0 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x0, Zbkb_rol_cg_cp_rs2_b10, Zbkb_rol_cg_cp_rs2_b10_str) +800007cc: 000aa683 lw x13,0(x21) +800007d0: 00068863 beq x13,x0,800007e0 +800007d4: 5ad0476f jal x14,80005580 +800007d8: 800007c8 .word 0x800007c8 +800007dc: 80009807 .word 0x80009807 +800007e0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x1a8ead5b +800007e4: 000b2503 lw x10,0(x22) +800007e8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xe1c3bd60 +800007ec: 000b2583 lw x11,0(x22) +800007f0: 004b0b13 addi x22,x22,4 + +800007f4 : +Zbkb_rol_cg_cp_rs2_b11: + rol x1, x10, x11 # perform operation +800007f4: 60b510b3 rol x1,x10,x11 + # Check if x1 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x1, Zbkb_rol_cg_cp_rs2_b11, Zbkb_rol_cg_cp_rs2_b11_str) +800007f8: 000aa683 lw x13,0(x21) +800007fc: 00168863 beq x13,x1,8000080c +80000800: 5810476f jal x14,80005580 +80000804: 800007f4 .word 0x800007f4 +80000808: 80009839 .word 0x80009839 +8000080c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xa758729b +80000810: 000b2103 lw x2,0(x22) +80000814: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x79b5087c +80000818: 000b2603 lw x12,0(x22) +8000081c: 004b0b13 addi x22,x22,4 + +80000820 : +Zbkb_rol_cg_cp_rs2_b12: + rol x27, x2, x12 # perform operation +80000820: 60c11db3 rol x27,x2,x12 + # Check if x27 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x27, Zbkb_rol_cg_cp_rs2_b12, Zbkb_rol_cg_cp_rs2_b12_str) +80000824: 000aa683 lw x13,0(x21) +80000828: 01b68863 beq x13,x27,80000838 +8000082c: 5550476f jal x14,80005580 +80000830: 80000820 .word 0x80000820 +80000834: 8000986b .word 0x8000986b +80000838: 004a8a93 addi x21,x21,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000083c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000840: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x1315f15e +80000844: 000b2003 lw x0,0(x22) +80000848: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x50fd944c +8000084c: 000b2683 lw x13,0(x22) +80000850: 004b0b13 addi x22,x22,4 + +80000854 : +Zbkb_rol_cg_cp_rs2_b13: + rol x29, x0, x13 # perform operation +80000854: 60d01eb3 rol x29,x0,x13 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zbkb_rol_cg_cp_rs2_b13, Zbkb_rol_cg_cp_rs2_b13_str) +80000858: 000aa203 lw x4,0(x21) +8000085c: 01d20863 beq x4,x29,8000086c +80000860: 4e1042ef jal x5,80005540 +80000864: 80000854 .word 0x80000854 +80000868: 8000989d .word 0x8000989d +8000086c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x831b8012 +80000870: 000b2303 lw x6,0(x22) +80000874: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x9bf1dae7 +80000878: 000b2703 lw x14,0(x22) +8000087c: 004b0b13 addi x22,x22,4 + +80000880 : +Zbkb_rol_cg_cp_rs2_b14: + rol x20, x6, x14 # perform operation +80000880: 60e31a33 rol x20,x6,x14 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkb_rol_cg_cp_rs2_b14, Zbkb_rol_cg_cp_rs2_b14_str) +80000884: 000aa203 lw x4,0(x21) +80000888: 01420863 beq x4,x20,80000898 +8000088c: 4b5042ef jal x5,80005540 +80000890: 80000880 .word 0x80000880 +80000894: 800098cf .word 0x800098cf +80000898: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x3b4a4498 +8000089c: 000b2903 lw x18,0(x22) +800008a0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x714ef8bc +800008a4: 000b2783 lw x15,0(x22) +800008a8: 004b0b13 addi x22,x22,4 + +800008ac : +Zbkb_rol_cg_cp_rs2_b15: + rol x31, x18, x15 # perform operation +800008ac: 60f91fb3 rol x31,x18,x15 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zbkb_rol_cg_cp_rs2_b15, Zbkb_rol_cg_cp_rs2_b15_str) +800008b0: 000aa203 lw x4,0(x21) +800008b4: 01f20863 beq x4,x31,800008c4 +800008b8: 489042ef jal x5,80005540 +800008bc: 800008ac .word 0x800008ac +800008c0: 80009901 .word 0x80009901 +800008c4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0x1993fd3d +800008c8: 000b2383 lw x7,0(x22) +800008cc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x012de3a5 +800008d0: 000b2803 lw x16,0(x22) +800008d4: 004b0b13 addi x22,x22,4 + +800008d8 : +Zbkb_rol_cg_cp_rs2_b16: + rol x10, x7, x16 # perform operation +800008d8: 61039533 rol x10,x7,x16 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zbkb_rol_cg_cp_rs2_b16, Zbkb_rol_cg_cp_rs2_b16_str) +800008dc: 000aa203 lw x4,0(x21) +800008e0: 00a20863 beq x4,x10,800008f0 +800008e4: 45d042ef jal x5,80005540 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 80009933 .word 0x80009933 +800008f0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x0b4b449e +800008f4: 000b2483 lw x9,0(x22) +800008f8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x09a4f600 +800008fc: 000b2883 lw x17,0(x22) +80000900: 004b0b13 addi x22,x22,4 + +80000904 : +Zbkb_rol_cg_cp_rs2_b17: + rol x16, x9, x17 # perform operation +80000904: 61149833 rol x16,x9,x17 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zbkb_rol_cg_cp_rs2_b17, Zbkb_rol_cg_cp_rs2_b17_str) +80000908: 000aa203 lw x4,0(x21) +8000090c: 01020863 beq x4,x16,8000091c +80000910: 431042ef jal x5,80005540 +80000914: 80000904 .word 0x80000904 +80000918: 80009965 .word 0x80009965 +8000091c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x33623c22 +80000920: 000b2d03 lw x26,0(x22) +80000924: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x6d8930b0 +80000928: 000b2903 lw x18,0(x22) +8000092c: 004b0b13 addi x22,x22,4 + +80000930 : +Zbkb_rol_cg_cp_rs2_b18: + rol x12, x26, x18 # perform operation +80000930: 612d1633 rol x12,x26,x18 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zbkb_rol_cg_cp_rs2_b18, Zbkb_rol_cg_cp_rs2_b18_str) +80000934: 000aa203 lw x4,0(x21) +80000938: 00c20863 beq x4,x12,80000948 +8000093c: 405042ef jal x5,80005540 +80000940: 80000930 .word 0x80000930 +80000944: 80009997 .word 0x80009997 +80000948: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xd08d3940 +8000094c: 000b2603 lw x12,0(x22) +80000950: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x9bf34937 +80000954: 000b2983 lw x19,0(x22) +80000958: 004b0b13 addi x22,x22,4 + +8000095c : +Zbkb_rol_cg_cp_rs2_b19: + rol x17, x12, x19 # perform operation +8000095c: 613618b3 rol x17,x12,x19 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zbkb_rol_cg_cp_rs2_b19, Zbkb_rol_cg_cp_rs2_b19_str) +80000960: 000aa203 lw x4,0(x21) +80000964: 01120863 beq x4,x17,80000974 +80000968: 3d9042ef jal x5,80005540 +8000096c: 8000095c .word 0x8000095c +80000970: 800099c9 .word 0x800099c9 +80000974: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x6b226155 +80000978: 000b2503 lw x10,0(x22) +8000097c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xff632792 +80000980: 000b2a03 lw x20,0(x22) +80000984: 004b0b13 addi x22,x22,4 + +80000988 : +Zbkb_rol_cg_cp_rs2_b20: + rol x3, x10, x20 # perform operation +80000988: 614511b3 rol x3,x10,x20 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zbkb_rol_cg_cp_rs2_b20, Zbkb_rol_cg_cp_rs2_b20_str) +8000098c: 000aa203 lw x4,0(x21) +80000990: 00320863 beq x4,x3,800009a0 +80000994: 3ad042ef jal x5,80005540 +80000998: 80000988 .word 0x80000988 +8000099c: 800099fb .word 0x800099fb +800009a0: 004a8a93 addi x21,x21,4 + + mv x19, x21 # switch signature pointer register to avoid conflict with test +800009a4: 000a8993 addi x19,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x3a83f04d +800009a8: 000b2783 lw x15,0(x22) +800009ac: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xf0d9fc6f +800009b0: 000b2a83 lw x21,0(x22) +800009b4: 004b0b13 addi x22,x22,4 + +800009b8 : +Zbkb_rol_cg_cp_rs2_b21: + rol x24, x15, x21 # perform operation +800009b8: 61579c33 rol x24,x15,x21 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_rol_cg_cp_rs2_b21, Zbkb_rol_cg_cp_rs2_b21_str) +800009bc: 0009a203 lw x4,0(x19) +800009c0: 01820863 beq x4,x24,800009d0 +800009c4: 37d042ef jal x5,80005540 +800009c8: 800009b8 .word 0x800009b8 +800009cc: 80009a2d .word 0x80009a2d +800009d0: 00498993 addi x19,x19,4 + + mv x10, x22 # switch data pointer register to avoid conflict with test +800009d4: 000b0513 addi x10,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xbe7843ec +800009d8: 00052a83 lw x21,0(x10) +800009dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x88328cbf +800009e0: 00052b03 lw x22,0(x10) +800009e4: 00450513 addi x10,x10,4 + +800009e8 : +Zbkb_rol_cg_cp_rs2_b22: + rol x1, x21, x22 # perform operation +800009e8: 616a90b3 rol x1,x21,x22 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_rol_cg_cp_rs2_b22, Zbkb_rol_cg_cp_rs2_b22_str) +800009ec: 0009a203 lw x4,0(x19) +800009f0: 00120863 beq x4,x1,80000a00 +800009f4: 34d042ef jal x5,80005540 +800009f8: 800009e8 .word 0x800009e8 +800009fc: 80009a5f .word 0x80009a5f +80000a00: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x4ec50d36 +80000a04: 00052403 lw x8,0(x10) +80000a08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x1a37a101 +80000a0c: 00052b83 lw x23,0(x10) +80000a10: 00450513 addi x10,x10,4 + +80000a14 : +Zbkb_rol_cg_cp_rs2_b23: + rol x20, x8, x23 # perform operation +80000a14: 61741a33 rol x20,x8,x23 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zbkb_rol_cg_cp_rs2_b23, Zbkb_rol_cg_cp_rs2_b23_str) +80000a18: 0009a203 lw x4,0(x19) +80000a1c: 01420863 beq x4,x20,80000a2c +80000a20: 321042ef jal x5,80005540 +80000a24: 80000a14 .word 0x80000a14 +80000a28: 80009a91 .word 0x80009a91 +80000a2c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xe4645dad +80000a30: 00052f03 lw x30,0(x10) +80000a34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xa9052408 +80000a38: 00052c03 lw x24,0(x10) +80000a3c: 00450513 addi x10,x10,4 + +80000a40 : +Zbkb_rol_cg_cp_rs2_b24: + rol x28, x30, x24 # perform operation +80000a40: 618f1e33 rol x28,x30,x24 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_rol_cg_cp_rs2_b24, Zbkb_rol_cg_cp_rs2_b24_str) +80000a44: 0009a203 lw x4,0(x19) +80000a48: 01c20863 beq x4,x28,80000a58 +80000a4c: 2f5042ef jal x5,80005540 +80000a50: 80000a40 .word 0x80000a40 +80000a54: 80009ac3 .word 0x80009ac3 +80000a58: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xe353b154 +80000a5c: 00052b83 lw x23,0(x10) +80000a60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x455e921e +80000a64: 00052c83 lw x25,0(x10) +80000a68: 00450513 addi x10,x10,4 + +80000a6c : +Zbkb_rol_cg_cp_rs2_b25: + rol x8, x23, x25 # perform operation +80000a6c: 619b9433 rol x8,x23,x25 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_rol_cg_cp_rs2_b25, Zbkb_rol_cg_cp_rs2_b25_str) +80000a70: 0009a203 lw x4,0(x19) +80000a74: 00820863 beq x4,x8,80000a84 +80000a78: 2c9042ef jal x5,80005540 +80000a7c: 80000a6c .word 0x80000a6c +80000a80: 80009af5 .word 0x80009af5 +80000a84: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8fb8e2a1 +80000a88: 00052c03 lw x24,0(x10) +80000a8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xda68a508 +80000a90: 00052d03 lw x26,0(x10) +80000a94: 00450513 addi x10,x10,4 + +80000a98 : +Zbkb_rol_cg_cp_rs2_b26: + rol x17, x24, x26 # perform operation +80000a98: 61ac18b3 rol x17,x24,x26 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_rol_cg_cp_rs2_b26, Zbkb_rol_cg_cp_rs2_b26_str) +80000a9c: 0009a203 lw x4,0(x19) +80000aa0: 01120863 beq x4,x17,80000ab0 +80000aa4: 29d042ef jal x5,80005540 +80000aa8: 80000a98 .word 0x80000a98 +80000aac: 80009b27 .word 0x80009b27 +80000ab0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xa51fdb18 +80000ab4: 00052e03 lw x28,0(x10) +80000ab8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5e4dd7d3 +80000abc: 00052d83 lw x27,0(x10) +80000ac0: 00450513 addi x10,x10,4 + +80000ac4 : +Zbkb_rol_cg_cp_rs2_b27: + rol x21, x28, x27 # perform operation +80000ac4: 61be1ab3 rol x21,x28,x27 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkb_rol_cg_cp_rs2_b27, Zbkb_rol_cg_cp_rs2_b27_str) +80000ac8: 0009a203 lw x4,0(x19) +80000acc: 01520863 beq x4,x21,80000adc +80000ad0: 271042ef jal x5,80005540 +80000ad4: 80000ac4 .word 0x80000ac4 +80000ad8: 80009b59 .word 0x80009b59 +80000adc: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xd17cac5a +80000ae0: 00052d83 lw x27,0(x10) +80000ae4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xf36ac720 +80000ae8: 00052e03 lw x28,0(x10) +80000aec: 00450513 addi x10,x10,4 + +80000af0 : +Zbkb_rol_cg_cp_rs2_b28: + rol x2, x27, x28 # perform operation +80000af0: 61cd9133 rol x2,x27,x28 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_rol_cg_cp_rs2_b28, Zbkb_rol_cg_cp_rs2_b28_str) +80000af4: 0009a203 lw x4,0(x19) +80000af8: 00220863 beq x4,x2,80000b08 +80000afc: 245042ef jal x5,80005540 +80000b00: 80000af0 .word 0x80000af0 +80000b04: 80009b8b .word 0x80009b8b +80000b08: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x9f2d3810 +80000b0c: 00052403 lw x8,0(x10) +80000b10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7be9b589 +80000b14: 00052e83 lw x29,0(x10) +80000b18: 00450513 addi x10,x10,4 + +80000b1c : +Zbkb_rol_cg_cp_rs2_b29: + rol x7, x8, x29 # perform operation +80000b1c: 61d413b3 rol x7,x8,x29 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_rol_cg_cp_rs2_b29, Zbkb_rol_cg_cp_rs2_b29_str) +80000b20: 0009a203 lw x4,0(x19) +80000b24: 00720863 beq x4,x7,80000b34 +80000b28: 219042ef jal x5,80005540 +80000b2c: 80000b1c .word 0x80000b1c +80000b30: 80009bbd .word 0x80009bbd +80000b34: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x354d5b80 +80000b38: 00052b03 lw x22,0(x10) +80000b3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xe3ae4ae2 +80000b40: 00052f03 lw x30,0(x10) +80000b44: 00450513 addi x10,x10,4 + +80000b48 : +Zbkb_rol_cg_cp_rs2_b30: + rol x2, x22, x30 # perform operation +80000b48: 61eb1133 rol x2,x22,x30 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_rol_cg_cp_rs2_b30, Zbkb_rol_cg_cp_rs2_b30_str) +80000b4c: 0009a203 lw x4,0(x19) +80000b50: 00220863 beq x4,x2,80000b60 +80000b54: 1ed042ef jal x5,80005540 +80000b58: 80000b48 .word 0x80000b48 +80000b5c: 80009bef .word 0x80009bef +80000b60: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xaa0cfd02 +80000b64: 00052003 lw x0,0(x10) +80000b68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xb5f2ad5a +80000b6c: 00052f83 lw x31,0(x10) +80000b70: 00450513 addi x10,x10,4 + +80000b74 : +Zbkb_rol_cg_cp_rs2_b31: + rol x15, x0, x31 # perform operation +80000b74: 61f017b3 rol x15,x0,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_rol_cg_cp_rs2_b31, Zbkb_rol_cg_cp_rs2_b31_str) +80000b78: 0009a203 lw x4,0(x19) +80000b7c: 00f20863 beq x4,x15,80000b8c +80000b80: 1c1042ef jal x5,80005540 +80000b84: 80000b74 .word 0x80000b74 +80000b88: 80009c21 .word 0x80009c21 +80000b8c: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xb2420ea9 +80000b90: 00052683 lw x13,0(x10) +80000b94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xc9867546 +80000b98: 00052e83 lw x29,0(x10) +80000b9c: 00450513 addi x10,x10,4 + +80000ba0 : +Zbkb_rol_cg_cp_rd_b0: + rol x0, x13, x29 # perform operation +80000ba0: 61d69033 rol x0,x13,x29 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_rol_cg_cp_rd_b0, Zbkb_rol_cg_cp_rd_b0_str) +80000ba4: 0009a203 lw x4,0(x19) +80000ba8: 00020863 beq x4,x0,80000bb8 +80000bac: 195042ef jal x5,80005540 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 80009c53 .word 0x80009c53 +80000bb8: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x391a266a +80000bbc: 00052903 lw x18,0(x10) +80000bc0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xa0789bfc +80000bc4: 00052d83 lw x27,0(x10) +80000bc8: 00450513 addi x10,x10,4 + +80000bcc : +Zbkb_rol_cg_cp_rd_b1: + rol x1, x18, x27 # perform operation +80000bcc: 61b910b3 rol x1,x18,x27 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_rol_cg_cp_rd_b1, Zbkb_rol_cg_cp_rd_b1_str) +80000bd0: 0009a203 lw x4,0(x19) +80000bd4: 00120863 beq x4,x1,80000be4 +80000bd8: 169042ef jal x5,80005540 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80009c83 .word 0x80009c83 +80000be4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0a714417 +80000be8: 00052c83 lw x25,0(x10) +80000bec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0d4cb8ad +80000bf0: 00052383 lw x7,0(x10) +80000bf4: 00450513 addi x10,x10,4 + +80000bf8 : +Zbkb_rol_cg_cp_rd_b2: + rol x2, x25, x7 # perform operation +80000bf8: 607c9133 rol x2,x25,x7 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_rol_cg_cp_rd_b2, Zbkb_rol_cg_cp_rd_b2_str) +80000bfc: 0009a203 lw x4,0(x19) +80000c00: 00220863 beq x4,x2,80000c10 +80000c04: 13d042ef jal x5,80005540 +80000c08: 80000bf8 .word 0x80000bf8 +80000c0c: 80009cb3 .word 0x80009cb3 +80000c10: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8a4878f0 +80000c14: 00052c03 lw x24,0(x10) +80000c18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x6d511403 +80000c1c: 00052003 lw x0,0(x10) +80000c20: 00450513 addi x10,x10,4 + +80000c24 : +Zbkb_rol_cg_cp_rd_b3: + rol x3, x24, x0 # perform operation +80000c24: 600c11b3 rol x3,x24,x0 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_rol_cg_cp_rd_b3, Zbkb_rol_cg_cp_rd_b3_str) +80000c28: 0009a203 lw x4,0(x19) +80000c2c: 00320863 beq x4,x3,80000c3c +80000c30: 111042ef jal x5,80005540 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80009ce3 .word 0x80009ce3 +80000c3c: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c40: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c44: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xd97e2991 +80000c48: 00052c83 lw x25,0(x10) +80000c4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xea0bf883 +80000c50: 00052e83 lw x29,0(x10) +80000c54: 00450513 addi x10,x10,4 + +80000c58 : +Zbkb_rol_cg_cp_rd_b4: + rol x4, x25, x29 # perform operation +80000c58: 61dc9233 rol x4,x25,x29 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkb_rol_cg_cp_rd_b4, Zbkb_rol_cg_cp_rd_b4_str) +80000c5c: 0009a383 lw x7,0(x19) +80000c60: 00438863 beq x7,x4,80000c70 +80000c64: 0f50446f jal x8,80005558 +80000c68: 80000c58 .word 0x80000c58 +80000c6c: 80009d13 .word 0x80009d13 +80000c70: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x30ffe699 +80000c74: 00052f03 lw x30,0(x10) +80000c78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7e96772d +80000c7c: 00052b83 lw x23,0(x10) +80000c80: 00450513 addi x10,x10,4 + +80000c84 : +Zbkb_rol_cg_cp_rd_b5: + rol x5, x30, x23 # perform operation +80000c84: 617f12b3 rol x5,x30,x23 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_rol_cg_cp_rd_b5, Zbkb_rol_cg_cp_rd_b5_str) +80000c88: 0009a383 lw x7,0(x19) +80000c8c: 00538863 beq x7,x5,80000c9c +80000c90: 0c90446f jal x8,80005558 +80000c94: 80000c84 .word 0x80000c84 +80000c98: 80009d43 .word 0x80009d43 +80000c9c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x38af3f5a +80000ca0: 00052b03 lw x22,0(x10) +80000ca4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xec5d8538 +80000ca8: 00052103 lw x2,0(x10) +80000cac: 00450513 addi x10,x10,4 + +80000cb0 : +Zbkb_rol_cg_cp_rd_b6: + rol x6, x22, x2 # perform operation +80000cb0: 602b1333 rol x6,x22,x2 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkb_rol_cg_cp_rd_b6, Zbkb_rol_cg_cp_rd_b6_str) +80000cb4: 0009a383 lw x7,0(x19) +80000cb8: 00638863 beq x7,x6,80000cc8 +80000cbc: 09d0446f jal x8,80005558 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 80009d73 .word 0x80009d73 +80000cc8: 00498993 addi x19,x19,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000ccc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000cd0: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xc856e131 +80000cd4: 00052c03 lw x24,0(x10) +80000cd8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x3113e41a +80000cdc: 00052f83 lw x31,0(x10) +80000ce0: 00450513 addi x10,x10,4 + +80000ce4 : +Zbkb_rol_cg_cp_rd_b7: + rol x7, x24, x31 # perform operation +80000ce4: 61fc13b3 rol x7,x24,x31 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_rol_cg_cp_rd_b7, Zbkb_rol_cg_cp_rd_b7_str) +80000ce8: 0009a203 lw x4,0(x19) +80000cec: 00720863 beq x4,x7,80000cfc +80000cf0: 051042ef jal x5,80005540 +80000cf4: 80000ce4 .word 0x80000ce4 +80000cf8: 80009da3 .word 0x80009da3 +80000cfc: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x70829712 +80000d00: 00052383 lw x7,0(x10) +80000d04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x50ade9e7 +80000d08: 00052a83 lw x21,0(x10) +80000d0c: 00450513 addi x10,x10,4 + +80000d10 : +Zbkb_rol_cg_cp_rd_b8: + rol x8, x7, x21 # perform operation +80000d10: 61539433 rol x8,x7,x21 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_rol_cg_cp_rd_b8, Zbkb_rol_cg_cp_rd_b8_str) +80000d14: 0009a203 lw x4,0(x19) +80000d18: 00820863 beq x4,x8,80000d28 +80000d1c: 025042ef jal x5,80005540 +80000d20: 80000d10 .word 0x80000d10 +80000d24: 80009dd3 .word 0x80009dd3 +80000d28: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xc530ae57 +80000d2c: 00052a83 lw x21,0(x10) +80000d30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x95b70135 +80000d34: 00052803 lw x16,0(x10) +80000d38: 00450513 addi x10,x10,4 + +80000d3c : +Zbkb_rol_cg_cp_rd_b9: + rol x9, x21, x16 # perform operation +80000d3c: 610a94b3 rol x9,x21,x16 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_rol_cg_cp_rd_b9, Zbkb_rol_cg_cp_rd_b9_str) +80000d40: 0009a203 lw x4,0(x19) +80000d44: 00920863 beq x4,x9,80000d54 +80000d48: 7f8042ef jal x5,80005540 +80000d4c: 80000d3c .word 0x80000d3c +80000d50: 80009e03 .word 0x80009e03 +80000d54: 00498993 addi x19,x19,4 + + mv x11, x10 # switch data pointer register to avoid conflict with test +80000d58: 00050593 addi x11,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x23a7f774 +80000d5c: 0005a903 lw x18,0(x11) +80000d60: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x6fd3bb41 +80000d64: 0005a003 lw x0,0(x11) +80000d68: 00458593 addi x11,x11,4 + +80000d6c : +Zbkb_rol_cg_cp_rd_b10: + rol x10, x18, x0 # perform operation +80000d6c: 60091533 rol x10,x18,x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zbkb_rol_cg_cp_rd_b10, Zbkb_rol_cg_cp_rd_b10_str) +80000d70: 0009a203 lw x4,0(x19) +80000d74: 00a20863 beq x4,x10,80000d84 +80000d78: 7c8042ef jal x5,80005540 +80000d7c: 80000d6c .word 0x80000d6c +80000d80: 80009e33 .word 0x80009e33 +80000d84: 00498993 addi x19,x19,4 + + mv x17, x11 # switch data pointer register to avoid conflict with test +80000d88: 00058893 addi x17,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x635b71cb +80000d8c: 0008af83 lw x31,0(x17) +80000d90: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0xfad01999 +80000d94: 0008a603 lw x12,0(x17) +80000d98: 00488893 addi x17,x17,4 + +80000d9c : +Zbkb_rol_cg_cp_rd_b11: + rol x11, x31, x12 # perform operation +80000d9c: 60cf95b3 rol x11,x31,x12 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_rol_cg_cp_rd_b11, Zbkb_rol_cg_cp_rd_b11_str) +80000da0: 0009a203 lw x4,0(x19) +80000da4: 00b20863 beq x4,x11,80000db4 +80000da8: 798042ef jal x5,80005540 +80000dac: 80000d9c .word 0x80000d9c +80000db0: 80009e64 .word 0x80009e64 +80000db4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7f5d5c41 +80000db8: 0008a183 lw x3,0(x17) +80000dbc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x12e7a45b +80000dc0: 0008ab83 lw x23,0(x17) +80000dc4: 00488893 addi x17,x17,4 + +80000dc8 : +Zbkb_rol_cg_cp_rd_b12: + rol x12, x3, x23 # perform operation +80000dc8: 61719633 rol x12,x3,x23 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkb_rol_cg_cp_rd_b12, Zbkb_rol_cg_cp_rd_b12_str) +80000dcc: 0009a203 lw x4,0(x19) +80000dd0: 00c20863 beq x4,x12,80000de0 +80000dd4: 76c042ef jal x5,80005540 +80000dd8: 80000dc8 .word 0x80000dc8 +80000ddc: 80009e95 .word 0x80009e95 +80000de0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xa9a42cb3 +80000de4: 0008a403 lw x8,0(x17) +80000de8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xf8a6b41b +80000dec: 0008a703 lw x14,0(x17) +80000df0: 00488893 addi x17,x17,4 + +80000df4 : +Zbkb_rol_cg_cp_rd_b13: + rol x13, x8, x14 # perform operation +80000df4: 60e416b3 rol x13,x8,x14 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_rol_cg_cp_rd_b13, Zbkb_rol_cg_cp_rd_b13_str) +80000df8: 0009a203 lw x4,0(x19) +80000dfc: 00d20863 beq x4,x13,80000e0c +80000e00: 740042ef jal x5,80005540 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80009ec6 .word 0x80009ec6 +80000e0c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x18eff22b +80000e10: 0008ae03 lw x28,0(x17) +80000e14: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x6edc7f95 +80000e18: 0008a383 lw x7,0(x17) +80000e1c: 00488893 addi x17,x17,4 + +80000e20 : +Zbkb_rol_cg_cp_rd_b14: + rol x14, x28, x7 # perform operation +80000e20: 607e1733 rol x14,x28,x7 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_rol_cg_cp_rd_b14, Zbkb_rol_cg_cp_rd_b14_str) +80000e24: 0009a203 lw x4,0(x19) +80000e28: 00e20863 beq x4,x14,80000e38 +80000e2c: 714042ef jal x5,80005540 +80000e30: 80000e20 .word 0x80000e20 +80000e34: 80009ef7 .word 0x80009ef7 +80000e38: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x6a67a1ae +80000e3c: 0008a603 lw x12,0(x17) +80000e40: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x822b7de6 +80000e44: 0008af83 lw x31,0(x17) +80000e48: 00488893 addi x17,x17,4 + +80000e4c : +Zbkb_rol_cg_cp_rd_b15: + rol x15, x12, x31 # perform operation +80000e4c: 61f617b3 rol x15,x12,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_rol_cg_cp_rd_b15, Zbkb_rol_cg_cp_rd_b15_str) +80000e50: 0009a203 lw x4,0(x19) +80000e54: 00f20863 beq x4,x15,80000e64 +80000e58: 6e8042ef jal x5,80005540 +80000e5c: 80000e4c .word 0x80000e4c +80000e60: 80009f28 .word 0x80009f28 +80000e64: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x80d035d5 +80000e68: 0008ae83 lw x29,0(x17) +80000e6c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0xcb3c21a5 +80000e70: 0008af83 lw x31,0(x17) +80000e74: 00488893 addi x17,x17,4 + +80000e78 : +Zbkb_rol_cg_cp_rd_b16: + rol x16, x29, x31 # perform operation +80000e78: 61fe9833 rol x16,x29,x31 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_rol_cg_cp_rd_b16, Zbkb_rol_cg_cp_rd_b16_str) +80000e7c: 0009a203 lw x4,0(x19) +80000e80: 01020863 beq x4,x16,80000e90 +80000e84: 6bc042ef jal x5,80005540 +80000e88: 80000e78 .word 0x80000e78 +80000e8c: 80009f59 .word 0x80009f59 +80000e90: 00498993 addi x19,x19,4 + + mv x24, x17 # switch data pointer register to avoid conflict with test +80000e94: 00088c13 addi x24,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x634513a9 +80000e98: 000c2a83 lw x21,0(x24) +80000e9c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x6601be4c +80000ea0: 000c2a03 lw x20,0(x24) +80000ea4: 004c0c13 addi x24,x24,4 + +80000ea8 : +Zbkb_rol_cg_cp_rd_b17: + rol x17, x21, x20 # perform operation +80000ea8: 614a98b3 rol x17,x21,x20 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_rol_cg_cp_rd_b17, Zbkb_rol_cg_cp_rd_b17_str) +80000eac: 0009a203 lw x4,0(x19) +80000eb0: 01120863 beq x4,x17,80000ec0 +80000eb4: 68c042ef jal x5,80005540 +80000eb8: 80000ea8 .word 0x80000ea8 +80000ebc: 80009f8a .word 0x80009f8a +80000ec0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0xc4001d1e +80000ec4: 000c2403 lw x8,0(x24) +80000ec8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x3a4a5080 +80000ecc: 000c2583 lw x11,0(x24) +80000ed0: 004c0c13 addi x24,x24,4 + +80000ed4 : +Zbkb_rol_cg_cp_rd_b18: + rol x18, x8, x11 # perform operation +80000ed4: 60b41933 rol x18,x8,x11 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_rol_cg_cp_rd_b18, Zbkb_rol_cg_cp_rd_b18_str) +80000ed8: 0009a203 lw x4,0(x19) +80000edc: 01220863 beq x4,x18,80000eec +80000ee0: 660042ef jal x5,80005540 +80000ee4: 80000ed4 .word 0x80000ed4 +80000ee8: 80009fbb .word 0x80009fbb +80000eec: 00498993 addi x19,x19,4 + + mv x16, x19 # switch signature pointer register to avoid conflict with test +80000ef0: 00098813 addi x16,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xa9a1b792 +80000ef4: 000c2b83 lw x23,0(x24) +80000ef8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x5233369c +80000efc: 000c2903 lw x18,0(x24) +80000f00: 004c0c13 addi x24,x24,4 + +80000f04 : +Zbkb_rol_cg_cp_rd_b19: + rol x19, x23, x18 # perform operation +80000f04: 612b99b3 rol x19,x23,x18 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cp_rd_b19, Zbkb_rol_cg_cp_rd_b19_str) +80000f08: 00082203 lw x4,0(x16) +80000f0c: 01320863 beq x4,x19,80000f1c +80000f10: 630042ef jal x5,80005540 +80000f14: 80000f04 .word 0x80000f04 +80000f18: 80009fec .word 0x80009fec +80000f1c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xeb33abc3 +80000f20: 000c2b83 lw x23,0(x24) +80000f24: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x29d82193 +80000f28: 000c2503 lw x10,0(x24) +80000f2c: 004c0c13 addi x24,x24,4 + +80000f30 : +Zbkb_rol_cg_cp_rd_b20: + rol x20, x23, x10 # perform operation +80000f30: 60ab9a33 rol x20,x23,x10 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zbkb_rol_cg_cp_rd_b20, Zbkb_rol_cg_cp_rd_b20_str) +80000f34: 00082203 lw x4,0(x16) +80000f38: 01420863 beq x4,x20,80000f48 +80000f3c: 604042ef jal x5,80005540 +80000f40: 80000f30 .word 0x80000f30 +80000f44: 8000a01d .word 0x8000a01d +80000f48: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xb91de803 +80000f4c: 000c2d83 lw x27,0(x24) +80000f50: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xeb44c033 +80000f54: 000c2503 lw x10,0(x24) +80000f58: 004c0c13 addi x24,x24,4 + +80000f5c : +Zbkb_rol_cg_cp_rd_b21: + rol x21, x27, x10 # perform operation +80000f5c: 60ad9ab3 rol x21,x27,x10 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zbkb_rol_cg_cp_rd_b21, Zbkb_rol_cg_cp_rd_b21_str) +80000f60: 00082203 lw x4,0(x16) +80000f64: 01520863 beq x4,x21,80000f74 +80000f68: 5d8042ef jal x5,80005540 +80000f6c: 80000f5c .word 0x80000f5c +80000f70: 8000a04e .word 0x8000a04e +80000f74: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xdde18240 +80000f78: 000c2703 lw x14,0(x24) +80000f7c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x9333197d +80000f80: 000c2483 lw x9,0(x24) +80000f84: 004c0c13 addi x24,x24,4 + +80000f88 : +Zbkb_rol_cg_cp_rd_b22: + rol x22, x14, x9 # perform operation +80000f88: 60971b33 rol x22,x14,x9 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zbkb_rol_cg_cp_rd_b22, Zbkb_rol_cg_cp_rd_b22_str) +80000f8c: 00082203 lw x4,0(x16) +80000f90: 01620863 beq x4,x22,80000fa0 +80000f94: 5ac042ef jal x5,80005540 +80000f98: 80000f88 .word 0x80000f88 +80000f9c: 8000a07f .word 0x8000a07f +80000fa0: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xac03df34 +80000fa4: 000c2603 lw x12,0(x24) +80000fa8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x0b16853f +80000fac: 000c2c83 lw x25,0(x24) +80000fb0: 004c0c13 addi x24,x24,4 + +80000fb4 : +Zbkb_rol_cg_cp_rd_b23: + rol x23, x12, x25 # perform operation +80000fb4: 61961bb3 rol x23,x12,x25 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkb_rol_cg_cp_rd_b23, Zbkb_rol_cg_cp_rd_b23_str) +80000fb8: 00082203 lw x4,0(x16) +80000fbc: 01720863 beq x4,x23,80000fcc +80000fc0: 580042ef jal x5,80005540 +80000fc4: 80000fb4 .word 0x80000fb4 +80000fc8: 8000a0b0 .word 0x8000a0b0 +80000fcc: 00480813 addi x16,x16,4 + + mv x21, x24 # switch data pointer register to avoid conflict with test +80000fd0: 000c0a93 addi x21,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x7738e444 +80000fd4: 000aaf03 lw x30,0(x21) +80000fd8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xbb92cc08 +80000fdc: 000aa703 lw x14,0(x21) +80000fe0: 004a8a93 addi x21,x21,4 + +80000fe4 : +Zbkb_rol_cg_cp_rd_b24: + rol x24, x30, x14 # perform operation +80000fe4: 60ef1c33 rol x24,x30,x14 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cp_rd_b24, Zbkb_rol_cg_cp_rd_b24_str) +80000fe8: 00082203 lw x4,0(x16) +80000fec: 01820863 beq x4,x24,80000ffc +80000ff0: 550042ef jal x5,80005540 +80000ff4: 80000fe4 .word 0x80000fe4 +80000ff8: 8000a0e1 .word 0x8000a0e1 +80000ffc: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xfe89eddf +80001000: 000aaf03 lw x30,0(x21) +80001004: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x66825ece +80001008: 000aa483 lw x9,0(x21) +8000100c: 004a8a93 addi x21,x21,4 + +80001010 : +Zbkb_rol_cg_cp_rd_b25: + rol x25, x30, x9 # perform operation +80001010: 609f1cb3 rol x25,x30,x9 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cp_rd_b25, Zbkb_rol_cg_cp_rd_b25_str) +80001014: 00082203 lw x4,0(x16) +80001018: 01920863 beq x4,x25,80001028 +8000101c: 524042ef jal x5,80005540 +80001020: 80001010 .word 0x80001010 +80001024: 8000a112 .word 0x8000a112 +80001028: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xcf3cea2e +8000102c: 000aa503 lw x10,0(x21) +80001030: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x20ddbc77 +80001034: 000aae03 lw x28,0(x21) +80001038: 004a8a93 addi x21,x21,4 + +8000103c : +Zbkb_rol_cg_cp_rd_b26: + rol x26, x10, x28 # perform operation +8000103c: 61c51d33 rol x26,x10,x28 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cp_rd_b26, Zbkb_rol_cg_cp_rd_b26_str) +80001040: 00082203 lw x4,0(x16) +80001044: 01a20863 beq x4,x26,80001054 +80001048: 4f8042ef jal x5,80005540 +8000104c: 8000103c .word 0x8000103c +80001050: 8000a143 .word 0x8000a143 +80001054: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x1166e798 +80001058: 000aa003 lw x0,0(x21) +8000105c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x620c4c80 +80001060: 000aac83 lw x25,0(x21) +80001064: 004a8a93 addi x21,x21,4 + +80001068 : +Zbkb_rol_cg_cp_rd_b27: + rol x27, x0, x25 # perform operation +80001068: 61901db3 rol x27,x0,x25 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cp_rd_b27, Zbkb_rol_cg_cp_rd_b27_str) +8000106c: 00082203 lw x4,0(x16) +80001070: 01b20863 beq x4,x27,80001080 +80001074: 4cc042ef jal x5,80005540 +80001078: 80001068 .word 0x80001068 +8000107c: 8000a174 .word 0x8000a174 +80001080: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x98f6a508 +80001084: 000aac03 lw x24,0(x21) +80001088: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x90633ada +8000108c: 000aaa03 lw x20,0(x21) +80001090: 004a8a93 addi x21,x21,4 + +80001094 : +Zbkb_rol_cg_cp_rd_b28: + rol x28, x24, x20 # perform operation +80001094: 614c1e33 rol x28,x24,x20 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cp_rd_b28, Zbkb_rol_cg_cp_rd_b28_str) +80001098: 00082203 lw x4,0(x16) +8000109c: 01c20863 beq x4,x28,800010ac +800010a0: 4a0042ef jal x5,80005540 +800010a4: 80001094 .word 0x80001094 +800010a8: 8000a1a5 .word 0x8000a1a5 +800010ac: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xfc6b2679 +800010b0: 000aa783 lw x15,0(x21) +800010b4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x21655fb2 +800010b8: 000aaf03 lw x30,0(x21) +800010bc: 004a8a93 addi x21,x21,4 + +800010c0 : +Zbkb_rol_cg_cp_rd_b29: + rol x29, x15, x30 # perform operation +800010c0: 61e79eb3 rol x29,x15,x30 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cp_rd_b29, Zbkb_rol_cg_cp_rd_b29_str) +800010c4: 00082203 lw x4,0(x16) +800010c8: 01d20863 beq x4,x29,800010d8 +800010cc: 474042ef jal x5,80005540 +800010d0: 800010c0 .word 0x800010c0 +800010d4: 8000a1d6 .word 0x8000a1d6 +800010d8: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x1cd1f7dd +800010dc: 000aa903 lw x18,0(x21) +800010e0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xe4ee5476 +800010e4: 000aaa03 lw x20,0(x21) +800010e8: 004a8a93 addi x21,x21,4 + +800010ec : +Zbkb_rol_cg_cp_rd_b30: + rol x30, x18, x20 # perform operation +800010ec: 61491f33 rol x30,x18,x20 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cp_rd_b30, Zbkb_rol_cg_cp_rd_b30_str) +800010f0: 00082203 lw x4,0(x16) +800010f4: 01e20863 beq x4,x30,80001104 +800010f8: 448042ef jal x5,80005540 +800010fc: 800010ec .word 0x800010ec +80001100: 8000a207 .word 0x8000a207 +80001104: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xab9b8496 +80001108: 000aab83 lw x23,0(x21) +8000110c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0xa97b1a7a +80001110: 000aa003 lw x0,0(x21) +80001114: 004a8a93 addi x21,x21,4 + +80001118 : +Zbkb_rol_cg_cp_rd_b31: + rol x31, x23, x0 # perform operation +80001118: 600b9fb3 rol x31,x23,x0 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cp_rd_b31, Zbkb_rol_cg_cp_rd_b31_str) +8000111c: 00082203 lw x4,0(x16) +80001120: 01f20863 beq x4,x31,80001130 +80001124: 41c042ef jal x5,80005540 +80001128: 80001118 .word 0x80001118 +8000112c: 8000a238 .word 0x8000a238 +80001130: 00480813 addi x16,x16,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x00000000 +80001134: 000aaa03 lw x20,0(x21) +80001138: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x8fdfad4d +8000113c: 000aaf83 lw x31,0(x21) +80001140: 004a8a93 addi x21,x21,4 + +80001144 : +Zbkb_rol_cg_cp_rs1_edges_0x0: + rol x13, x20, x31 # perform operation +80001144: 61fa16b3 rol x13,x20,x31 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cp_rs1_edges_0x0, Zbkb_rol_cg_cp_rs1_edges_0x0_str) +80001148: 00082203 lw x4,0(x16) +8000114c: 00d20863 beq x4,x13,8000115c +80001150: 3f0042ef jal x5,80005540 +80001154: 80001144 .word 0x80001144 +80001158: 8000a269 .word 0x8000a269 +8000115c: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x00000001 +80001160: 000aaf03 lw x30,0(x21) +80001164: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x62ed944d +80001168: 000aa403 lw x8,0(x21) +8000116c: 004a8a93 addi x21,x21,4 + +80001170 : +Zbkb_rol_cg_cp_rs1_edges_0x1: + rol x2, x30, x8 # perform operation +80001170: 608f1133 rol x2,x30,x8 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cp_rs1_edges_0x1, Zbkb_rol_cg_cp_rs1_edges_0x1_str) +80001174: 00082203 lw x4,0(x16) +80001178: 00220863 beq x4,x2,80001188 +8000117c: 3c4042ef jal x5,80005540 +80001180: 80001170 .word 0x80001170 +80001184: 8000a2a1 .word 0x8000a2a1 +80001188: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x00000002 +8000118c: 000aa083 lw x1,0(x21) +80001190: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xe697cec9 +80001194: 000aa883 lw x17,0(x21) +80001198: 004a8a93 addi x21,x21,4 + +8000119c : +Zbkb_rol_cg_cp_rs1_edges_0x2: + rol x14, x1, x17 # perform operation +8000119c: 61109733 rol x14,x1,x17 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cp_rs1_edges_0x2, Zbkb_rol_cg_cp_rs1_edges_0x2_str) +800011a0: 00082203 lw x4,0(x16) +800011a4: 00e20863 beq x4,x14,800011b4 +800011a8: 398042ef jal x5,80005540 +800011ac: 8000119c .word 0x8000119c +800011b0: 8000a2d9 .word 0x8000a2d9 +800011b4: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x80000000 +800011b8: 000aac03 lw x24,0(x21) +800011bc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xb773808e +800011c0: 000aa903 lw x18,0(x21) +800011c4: 004a8a93 addi x21,x21,4 + +800011c8 : +Zbkb_rol_cg_cp_rs1_edges_0x80000000: + rol x19, x24, x18 # perform operation +800011c8: 612c19b3 rol x19,x24,x18 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cp_rs1_edges_0x80000000, Zbkb_rol_cg_cp_rs1_edges_0x80000000_str) +800011cc: 00082203 lw x4,0(x16) +800011d0: 01320863 beq x4,x19,800011e0 +800011d4: 36c042ef jal x5,80005540 +800011d8: 800011c8 .word 0x800011c8 +800011dc: 8000a311 .word 0x8000a311 +800011e0: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x80000001 +800011e4: 000aa783 lw x15,0(x21) +800011e8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xcaef3b17 +800011ec: 000aad83 lw x27,0(x21) +800011f0: 004a8a93 addi x21,x21,4 + +800011f4 : +Zbkb_rol_cg_cp_rs1_edges_0x80000001: + rol x25, x15, x27 # perform operation +800011f4: 61b79cb3 rol x25,x15,x27 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cp_rs1_edges_0x80000001, Zbkb_rol_cg_cp_rs1_edges_0x80000001_str) +800011f8: 00082203 lw x4,0(x16) +800011fc: 01920863 beq x4,x25,8000120c +80001200: 340042ef jal x5,80005540 +80001204: 800011f4 .word 0x800011f4 +80001208: 8000a351 .word 0x8000a351 +8000120c: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x7fffffff +80001210: 000aa503 lw x10,0(x21) +80001214: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x9ac36574 +80001218: 000aa903 lw x18,0(x21) +8000121c: 004a8a93 addi x21,x21,4 + +80001220 : +Zbkb_rol_cg_cp_rs1_edges_0x7fffffff: + rol x27, x10, x18 # perform operation +80001220: 61251db3 rol x27,x10,x18 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cp_rs1_edges_0x7fffffff, Zbkb_rol_cg_cp_rs1_edges_0x7fffffff_str) +80001224: 00082203 lw x4,0(x16) +80001228: 01b20863 beq x4,x27,80001238 +8000122c: 314042ef jal x5,80005540 +80001230: 80001220 .word 0x80001220 +80001234: 8000a391 .word 0x8000a391 +80001238: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x7ffffffe +8000123c: 000aa683 lw x13,0(x21) +80001240: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xe7c3388d +80001244: 000aaf03 lw x30,0(x21) +80001248: 004a8a93 addi x21,x21,4 + +8000124c : +Zbkb_rol_cg_cp_rs1_edges_0x7ffffffe: + rol x22, x13, x30 # perform operation +8000124c: 61e69b33 rol x22,x13,x30 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zbkb_rol_cg_cp_rs1_edges_0x7ffffffe, Zbkb_rol_cg_cp_rs1_edges_0x7ffffffe_str) +80001250: 00082203 lw x4,0(x16) +80001254: 01620863 beq x4,x22,80001264 +80001258: 2e8042ef jal x5,80005540 +8000125c: 8000124c .word 0x8000124c +80001260: 8000a3d1 .word 0x8000a3d1 +80001264: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xffffffff +80001268: 000aae83 lw x29,0(x21) +8000126c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x797a22dc +80001270: 000aa483 lw x9,0(x21) +80001274: 004a8a93 addi x21,x21,4 + +80001278 : +Zbkb_rol_cg_cp_rs1_edges_0xffffffff: + rol x6, x29, x9 # perform operation +80001278: 609e9333 rol x6,x29,x9 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cp_rs1_edges_0xffffffff, Zbkb_rol_cg_cp_rs1_edges_0xffffffff_str) +8000127c: 00082203 lw x4,0(x16) +80001280: 00620863 beq x4,x6,80001290 +80001284: 2bc042ef jal x5,80005540 +80001288: 80001278 .word 0x80001278 +8000128c: 8000a411 .word 0x8000a411 +80001290: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xfffffffe +80001294: 000aa383 lw x7,0(x21) +80001298: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x52e22d28 +8000129c: 000aa083 lw x1,0(x21) +800012a0: 004a8a93 addi x21,x21,4 + +800012a4 : +Zbkb_rol_cg_cp_rs1_edges_0xfffffffe: + rol x15, x7, x1 # perform operation +800012a4: 601397b3 rol x15,x7,x1 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cp_rs1_edges_0xfffffffe, Zbkb_rol_cg_cp_rs1_edges_0xfffffffe_str) +800012a8: 00082203 lw x4,0(x16) +800012ac: 00f20863 beq x4,x15,800012bc +800012b0: 290042ef jal x5,80005540 +800012b4: 800012a4 .word 0x800012a4 +800012b8: 8000a451 .word 0x8000a451 +800012bc: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x5bbc8872 +800012c0: 000aa603 lw x12,0(x21) +800012c4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xf9e17f60 +800012c8: 000aa883 lw x17,0(x21) +800012cc: 004a8a93 addi x21,x21,4 + +800012d0 : +Zbkb_rol_cg_cp_rs1_edges_0x5bbc8872: + rol x28, x12, x17 # perform operation +800012d0: 61161e33 rol x28,x12,x17 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cp_rs1_edges_0x5bbc8872, Zbkb_rol_cg_cp_rs1_edges_0x5bbc8872_str) +800012d4: 00082203 lw x4,0(x16) +800012d8: 01c20863 beq x4,x28,800012e8 +800012dc: 264042ef jal x5,80005540 +800012e0: 800012d0 .word 0x800012d0 +800012e4: 8000a491 .word 0x8000a491 +800012e8: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xaaaaaaaa +800012ec: 000aa603 lw x12,0(x21) +800012f0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xc9004220 +800012f4: 000aad83 lw x27,0(x21) +800012f8: 004a8a93 addi x21,x21,4 + +800012fc : +Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaa: + rol x29, x12, x27 # perform operation +800012fc: 61b61eb3 rol x29,x12,x27 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001300: 00082203 lw x4,0(x16) +80001304: 01d20863 beq x4,x29,80001314 +80001308: 238042ef jal x5,80005540 +8000130c: 800012fc .word 0x800012fc +80001310: 8000a4d1 .word 0x8000a4d1 +80001314: 00480813 addi x16,x16,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x55555555 +80001318: 000aa303 lw x6,0(x21) +8000131c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x04004516 +80001320: 000aa603 lw x12,0(x21) +80001324: 004a8a93 addi x21,x21,4 + +80001328 : +Zbkb_rol_cg_cp_rs1_edges_0x55555555: + rol x14, x6, x12 # perform operation +80001328: 60c31733 rol x14,x6,x12 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cp_rs1_edges_0x55555555, Zbkb_rol_cg_cp_rs1_edges_0x55555555_str) +8000132c: 00082203 lw x4,0(x16) +80001330: 00e20863 beq x4,x14,80001340 +80001334: 20c042ef jal x5,80005540 +80001338: 80001328 .word 0x80001328 +8000133c: 8000a511 .word 0x8000a511 +80001340: 00480813 addi x16,x16,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xbc0a5b4a +80001344: 000aa403 lw x8,0(x21) +80001348: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x00000000 +8000134c: 000aa603 lw x12,0(x21) +80001350: 004a8a93 addi x21,x21,4 + +80001354 : +Zbkb_rol_cg_cp_rs2_edges_0x0: + rol x28, x8, x12 # perform operation +80001354: 60c41e33 rol x28,x8,x12 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cp_rs2_edges_0x0, Zbkb_rol_cg_cp_rs2_edges_0x0_str) +80001358: 00082203 lw x4,0(x16) +8000135c: 01c20863 beq x4,x28,8000136c +80001360: 1e0042ef jal x5,80005540 +80001364: 80001354 .word 0x80001354 +80001368: 8000a551 .word 0x8000a551 +8000136c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x48ee82ba +80001370: 000aac03 lw x24,0(x21) +80001374: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x00000001 +80001378: 000aa503 lw x10,0(x21) +8000137c: 004a8a93 addi x21,x21,4 + +80001380 : +Zbkb_rol_cg_cp_rs2_edges_0x1: + rol x9, x24, x10 # perform operation +80001380: 60ac14b3 rol x9,x24,x10 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cp_rs2_edges_0x1, Zbkb_rol_cg_cp_rs2_edges_0x1_str) +80001384: 00082203 lw x4,0(x16) +80001388: 00920863 beq x4,x9,80001398 +8000138c: 1b4042ef jal x5,80005540 +80001390: 80001380 .word 0x80001380 +80001394: 8000a58a .word 0x8000a58a +80001398: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x72e75744 +8000139c: 000aa783 lw x15,0(x21) +800013a0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000002 +800013a4: 000aa583 lw x11,0(x21) +800013a8: 004a8a93 addi x21,x21,4 + +800013ac : +Zbkb_rol_cg_cp_rs2_edges_0x2: + rol x31, x15, x11 # perform operation +800013ac: 60b79fb3 rol x31,x15,x11 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cp_rs2_edges_0x2, Zbkb_rol_cg_cp_rs2_edges_0x2_str) +800013b0: 00082203 lw x4,0(x16) +800013b4: 01f20863 beq x4,x31,800013c4 +800013b8: 188042ef jal x5,80005540 +800013bc: 800013ac .word 0x800013ac +800013c0: 8000a5c3 .word 0x8000a5c3 +800013c4: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xa7962f09 +800013c8: 000aa903 lw x18,0(x21) +800013cc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x80000000 +800013d0: 000aaa03 lw x20,0(x21) +800013d4: 004a8a93 addi x21,x21,4 + +800013d8 : +Zbkb_rol_cg_cp_rs2_edges_0x80000000: + rol x7, x18, x20 # perform operation +800013d8: 614913b3 rol x7,x18,x20 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cp_rs2_edges_0x80000000, Zbkb_rol_cg_cp_rs2_edges_0x80000000_str) +800013dc: 00082203 lw x4,0(x16) +800013e0: 00720863 beq x4,x7,800013f0 +800013e4: 15c042ef jal x5,80005540 +800013e8: 800013d8 .word 0x800013d8 +800013ec: 8000a5fc .word 0x8000a5fc +800013f0: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xb99c0fa2 +800013f4: 000aaf83 lw x31,0(x21) +800013f8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x80000001 +800013fc: 000aa303 lw x6,0(x21) +80001400: 004a8a93 addi x21,x21,4 + +80001404 : +Zbkb_rol_cg_cp_rs2_edges_0x80000001: + rol x8, x31, x6 # perform operation +80001404: 606f9433 rol x8,x31,x6 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cp_rs2_edges_0x80000001, Zbkb_rol_cg_cp_rs2_edges_0x80000001_str) +80001408: 00082203 lw x4,0(x16) +8000140c: 00820863 beq x4,x8,8000141c +80001410: 130042ef jal x5,80005540 +80001414: 80001404 .word 0x80001404 +80001418: 8000a63c .word 0x8000a63c +8000141c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xb39d826c +80001420: 000aad03 lw x26,0(x21) +80001424: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x7fffffff +80001428: 000aa783 lw x15,0(x21) +8000142c: 004a8a93 addi x21,x21,4 + +80001430 : +Zbkb_rol_cg_cp_rs2_edges_0x7fffffff: + rol x27, x26, x15 # perform operation +80001430: 60fd1db3 rol x27,x26,x15 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cp_rs2_edges_0x7fffffff, Zbkb_rol_cg_cp_rs2_edges_0x7fffffff_str) +80001434: 00082203 lw x4,0(x16) +80001438: 01b20863 beq x4,x27,80001448 +8000143c: 104042ef jal x5,80005540 +80001440: 80001430 .word 0x80001430 +80001444: 8000a67c .word 0x8000a67c +80001448: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x1c58df00 +8000144c: 000aa883 lw x17,0(x21) +80001450: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x7ffffffe +80001454: 000aab03 lw x22,0(x21) +80001458: 004a8a93 addi x21,x21,4 + +8000145c : +Zbkb_rol_cg_cp_rs2_edges_0x7ffffffe: + rol x6, x17, x22 # perform operation +8000145c: 61689333 rol x6,x17,x22 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cp_rs2_edges_0x7ffffffe, Zbkb_rol_cg_cp_rs2_edges_0x7ffffffe_str) +80001460: 00082203 lw x4,0(x16) +80001464: 00620863 beq x4,x6,80001474 +80001468: 0d8042ef jal x5,80005540 +8000146c: 8000145c .word 0x8000145c +80001470: 8000a6bc .word 0x8000a6bc +80001474: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xe277255b +80001478: 000aa603 lw x12,0(x21) +8000147c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0xffffffff +80001480: 000aac83 lw x25,0(x21) +80001484: 004a8a93 addi x21,x21,4 + +80001488 : +Zbkb_rol_cg_cp_rs2_edges_0xffffffff: + rol x29, x12, x25 # perform operation +80001488: 61961eb3 rol x29,x12,x25 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cp_rs2_edges_0xffffffff, Zbkb_rol_cg_cp_rs2_edges_0xffffffff_str) +8000148c: 00082203 lw x4,0(x16) +80001490: 01d20863 beq x4,x29,800014a0 +80001494: 0ac042ef jal x5,80005540 +80001498: 80001488 .word 0x80001488 +8000149c: 8000a6fc .word 0x8000a6fc +800014a0: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x734d27e2 +800014a4: 000aa083 lw x1,0(x21) +800014a8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xfffffffe +800014ac: 000aa383 lw x7,0(x21) +800014b0: 004a8a93 addi x21,x21,4 + +800014b4 : +Zbkb_rol_cg_cp_rs2_edges_0xfffffffe: + rol x15, x1, x7 # perform operation +800014b4: 607097b3 rol x15,x1,x7 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cp_rs2_edges_0xfffffffe, Zbkb_rol_cg_cp_rs2_edges_0xfffffffe_str) +800014b8: 00082203 lw x4,0(x16) +800014bc: 00f20863 beq x4,x15,800014cc +800014c0: 080042ef jal x5,80005540 +800014c4: 800014b4 .word 0x800014b4 +800014c8: 8000a73c .word 0x8000a73c +800014cc: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x998db018 +800014d0: 000aa703 lw x14,0(x21) +800014d4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x5bbc8872 +800014d8: 000aa583 lw x11,0(x21) +800014dc: 004a8a93 addi x21,x21,4 + +800014e0 : +Zbkb_rol_cg_cp_rs2_edges_0x5bbc8872: + rol x8, x14, x11 # perform operation +800014e0: 60b71433 rol x8,x14,x11 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cp_rs2_edges_0x5bbc8872, Zbkb_rol_cg_cp_rs2_edges_0x5bbc8872_str) +800014e4: 00082203 lw x4,0(x16) +800014e8: 00820863 beq x4,x8,800014f8 +800014ec: 054042ef jal x5,80005540 +800014f0: 800014e0 .word 0x800014e0 +800014f4: 8000a77c .word 0x8000a77c +800014f8: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xa03d5b09 +800014fc: 000aaf03 lw x30,0(x21) +80001500: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xaaaaaaaa +80001504: 000aa783 lw x15,0(x21) +80001508: 004a8a93 addi x21,x21,4 + +8000150c : +Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaa: + rol x26, x30, x15 # perform operation +8000150c: 60ff1d33 rol x26,x30,x15 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001510: 00082203 lw x4,0(x16) +80001514: 01a20863 beq x4,x26,80001524 +80001518: 028042ef jal x5,80005540 +8000151c: 8000150c .word 0x8000150c +80001520: 8000a7bc .word 0x8000a7bc +80001524: 00480813 addi x16,x16,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xb3930195 +80001528: 000aa703 lw x14,0(x21) +8000152c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x55555555 +80001530: 000aa603 lw x12,0(x21) +80001534: 004a8a93 addi x21,x21,4 + +80001538 : +Zbkb_rol_cg_cp_rs2_edges_0x55555555: + rol x9, x14, x12 # perform operation +80001538: 60c714b3 rol x9,x14,x12 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cp_rs2_edges_0x55555555, Zbkb_rol_cg_cp_rs2_edges_0x55555555_str) +8000153c: 00082203 lw x4,0(x16) +80001540: 00920863 beq x4,x9,80001550 +80001544: 7fd032ef jal x5,80005540 +80001548: 80001538 .word 0x80001538 +8000154c: 8000a7fc .word 0x8000a7fc +80001550: 00480813 addi x16,x16,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x00000000 +80001554: 000aaf03 lw x30,0(x21) +80001558: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000000 +8000155c: 000aa583 lw x11,0(x21) +80001560: 004a8a93 addi x21,x21,4 + +80001564 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + rol x14, x30, x11 # perform operation +80001564: 60bf1733 rol x14,x30,x11 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001568: 00082203 lw x4,0(x16) +8000156c: 00e20863 beq x4,x14,8000157c +80001570: 7d1032ef jal x5,80005540 +80001574: 80001564 .word 0x80001564 +80001578: 8000a83c .word 0x8000a83c +8000157c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x00000000 +80001580: 000aae03 lw x28,0(x21) +80001584: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x00000001 +80001588: 000aaf03 lw x30,0(x21) +8000158c: 004a8a93 addi x21,x21,4 + +80001590 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + rol x2, x28, x30 # perform operation +80001590: 61ee1133 rol x2,x28,x30 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001594: 00082203 lw x4,0(x16) +80001598: 00220863 beq x4,x2,800015a8 +8000159c: 7a5032ef jal x5,80005540 +800015a0: 80001590 .word 0x80001590 +800015a4: 8000a88c .word 0x8000a88c +800015a8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x00000000 +800015ac: 000aa883 lw x17,0(x21) +800015b0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000002 +800015b4: 000aa583 lw x11,0(x21) +800015b8: 004a8a93 addi x21,x21,4 + +800015bc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + rol x20, x17, x11 # perform operation +800015bc: 60b89a33 rol x20,x17,x11 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c0: 00082203 lw x4,0(x16) +800015c4: 01420863 beq x4,x20,800015d4 +800015c8: 779032ef jal x5,80005540 +800015cc: 800015bc .word 0x800015bc +800015d0: 8000a8dc .word 0x8000a8dc +800015d4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x00000000 +800015d8: 000aa683 lw x13,0(x21) +800015dc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x80000000 +800015e0: 000aa103 lw x2,0(x21) +800015e4: 004a8a93 addi x21,x21,4 + +800015e8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + rol x10, x13, x2 # perform operation +800015e8: 60269533 rol x10,x13,x2 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015ec: 00082203 lw x4,0(x16) +800015f0: 00a20863 beq x4,x10,80001600 +800015f4: 74d032ef jal x5,80005540 +800015f8: 800015e8 .word 0x800015e8 +800015fc: 8000a92c .word 0x8000a92c +80001600: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x00000000 +80001604: 000aa903 lw x18,0(x21) +80001608: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x80000001 +8000160c: 000aab83 lw x23,0(x21) +80001610: 004a8a93 addi x21,x21,4 + +80001614 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + rol x19, x18, x23 # perform operation +80001614: 617919b3 rol x19,x18,x23 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001618: 00082203 lw x4,0(x16) +8000161c: 01320863 beq x4,x19,8000162c +80001620: 721032ef jal x5,80005540 +80001624: 80001614 .word 0x80001614 +80001628: 8000a983 .word 0x8000a983 +8000162c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x00000000 +80001630: 000aa703 lw x14,0(x21) +80001634: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x7fffffff +80001638: 000aa403 lw x8,0(x21) +8000163c: 004a8a93 addi x21,x21,4 + +80001640 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + rol x10, x14, x8 # perform operation +80001640: 60871533 rol x10,x14,x8 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001644: 00082203 lw x4,0(x16) +80001648: 00a20863 beq x4,x10,80001658 +8000164c: 6f5032ef jal x5,80005540 +80001650: 80001640 .word 0x80001640 +80001654: 8000a9da .word 0x8000a9da +80001658: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x00000000 +8000165c: 000aa303 lw x6,0(x21) +80001660: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x7ffffffe +80001664: 000aa103 lw x2,0(x21) +80001668: 004a8a93 addi x21,x21,4 + +8000166c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + rol x23, x6, x2 # perform operation +8000166c: 60231bb3 rol x23,x6,x2 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001670: 00082203 lw x4,0(x16) +80001674: 01720863 beq x4,x23,80001684 +80001678: 6c9032ef jal x5,80005540 +8000167c: 8000166c .word 0x8000166c +80001680: 8000aa31 .word 0x8000aa31 +80001684: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x00000000 +80001688: 000aac03 lw x24,0(x21) +8000168c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xffffffff +80001690: 000aa883 lw x17,0(x21) +80001694: 004a8a93 addi x21,x21,4 + +80001698 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + rol x14, x24, x17 # perform operation +80001698: 611c1733 rol x14,x24,x17 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000169c: 00082203 lw x4,0(x16) +800016a0: 00e20863 beq x4,x14,800016b0 +800016a4: 69d032ef jal x5,80005540 +800016a8: 80001698 .word 0x80001698 +800016ac: 8000aa88 .word 0x8000aa88 +800016b0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x00000000 +800016b4: 000aa103 lw x2,0(x21) +800016b8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xfffffffe +800016bc: 000aa403 lw x8,0(x21) +800016c0: 004a8a93 addi x21,x21,4 + +800016c4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + rol x15, x2, x8 # perform operation +800016c4: 608117b3 rol x15,x2,x8 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c8: 00082203 lw x4,0(x16) +800016cc: 00f20863 beq x4,x15,800016dc +800016d0: 671032ef jal x5,80005540 +800016d4: 800016c4 .word 0x800016c4 +800016d8: 8000aadf .word 0x8000aadf +800016dc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x00000000 +800016e0: 000aa683 lw x13,0(x21) +800016e4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x5bbc8872 +800016e8: 000aa503 lw x10,0(x21) +800016ec: 004a8a93 addi x21,x21,4 + +800016f0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + rol x15, x13, x10 # perform operation +800016f0: 60a697b3 rol x15,x13,x10 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016f4: 00082203 lw x4,0(x16) +800016f8: 00f20863 beq x4,x15,80001708 +800016fc: 645032ef jal x5,80005540 +80001700: 800016f0 .word 0x800016f0 +80001704: 8000ab36 .word 0x8000ab36 +80001708: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x00000000 +8000170c: 000aae03 lw x28,0(x21) +80001710: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0xaaaaaaaa +80001714: 000aab03 lw x22,0(x21) +80001718: 004a8a93 addi x21,x21,4 + +8000171c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + rol x2, x28, x22 # perform operation +8000171c: 616e1133 rol x2,x28,x22 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001720: 00082203 lw x4,0(x16) +80001724: 00220863 beq x4,x2,80001734 +80001728: 619032ef jal x5,80005540 +8000172c: 8000171c .word 0x8000171c +80001730: 8000ab8d .word 0x8000ab8d +80001734: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x00000000 +80001738: 000aa903 lw x18,0(x21) +8000173c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x55555555 +80001740: 000aa983 lw x19,0(x21) +80001744: 004a8a93 addi x21,x21,4 + +80001748 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + rol x2, x18, x19 # perform operation +80001748: 61391133 rol x2,x18,x19 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000174c: 00082203 lw x4,0(x16) +80001750: 00220863 beq x4,x2,80001760 +80001754: 5ed032ef jal x5,80005540 +80001758: 80001748 .word 0x80001748 +8000175c: 8000abe4 .word 0x8000abe4 +80001760: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x00000001 +80001764: 000aa983 lw x19,0(x21) +80001768: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x00000000 +8000176c: 000aaa03 lw x20,0(x21) +80001770: 004a8a93 addi x21,x21,4 + +80001774 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + rol x24, x19, x20 # perform operation +80001774: 61499c33 rol x24,x19,x20 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001778: 00082203 lw x4,0(x16) +8000177c: 01820863 beq x4,x24,8000178c +80001780: 5c1032ef jal x5,80005540 +80001784: 80001774 .word 0x80001774 +80001788: 8000ac3b .word 0x8000ac3b +8000178c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x00000001 +80001790: 000aa903 lw x18,0(x21) +80001794: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x00000001 +80001798: 000aaa03 lw x20,0(x21) +8000179c: 004a8a93 addi x21,x21,4 + +800017a0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + rol x31, x18, x20 # perform operation +800017a0: 61491fb3 rol x31,x18,x20 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017a4: 00082203 lw x4,0(x16) +800017a8: 01f20863 beq x4,x31,800017b8 +800017ac: 595032ef jal x5,80005540 +800017b0: 800017a0 .word 0x800017a0 +800017b4: 8000ac8b .word 0x8000ac8b +800017b8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x00000001 +800017bc: 000aab03 lw x22,0(x21) +800017c0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x00000002 +800017c4: 000aa183 lw x3,0(x21) +800017c8: 004a8a93 addi x21,x21,4 + +800017cc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + rol x18, x22, x3 # perform operation +800017cc: 603b1933 rol x18,x22,x3 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d0: 00082203 lw x4,0(x16) +800017d4: 01220863 beq x4,x18,800017e4 +800017d8: 569032ef jal x5,80005540 +800017dc: 800017cc .word 0x800017cc +800017e0: 8000acdb .word 0x8000acdb +800017e4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x00000001 +800017e8: 000aa703 lw x14,0(x21) +800017ec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x80000000 +800017f0: 000aa903 lw x18,0(x21) +800017f4: 004a8a93 addi x21,x21,4 + +800017f8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + rol x29, x14, x18 # perform operation +800017f8: 61271eb3 rol x29,x14,x18 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017fc: 00082203 lw x4,0(x16) +80001800: 01d20863 beq x4,x29,80001810 +80001804: 53d032ef jal x5,80005540 +80001808: 800017f8 .word 0x800017f8 +8000180c: 8000ad2b .word 0x8000ad2b +80001810: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x00000001 +80001814: 000aac83 lw x25,0(x21) +80001818: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x80000001 +8000181c: 000aab03 lw x22,0(x21) +80001820: 004a8a93 addi x21,x21,4 + +80001824 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + rol x13, x25, x22 # perform operation +80001824: 616c96b3 rol x13,x25,x22 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001828: 00082203 lw x4,0(x16) +8000182c: 00d20863 beq x4,x13,8000183c +80001830: 511032ef jal x5,80005540 +80001834: 80001824 .word 0x80001824 +80001838: 8000ad82 .word 0x8000ad82 +8000183c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x00000001 +80001840: 000aa403 lw x8,0(x21) +80001844: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x7fffffff +80001848: 000aa703 lw x14,0(x21) +8000184c: 004a8a93 addi x21,x21,4 + +80001850 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + rol x27, x8, x14 # perform operation +80001850: 60e41db3 rol x27,x8,x14 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001854: 00082203 lw x4,0(x16) +80001858: 01b20863 beq x4,x27,80001868 +8000185c: 4e5032ef jal x5,80005540 +80001860: 80001850 .word 0x80001850 +80001864: 8000add9 .word 0x8000add9 +80001868: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x00000001 +8000186c: 000aa403 lw x8,0(x21) +80001870: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x7ffffffe +80001874: 000aac83 lw x25,0(x21) +80001878: 004a8a93 addi x21,x21,4 + +8000187c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + rol x14, x8, x25 # perform operation +8000187c: 61941733 rol x14,x8,x25 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001880: 00082203 lw x4,0(x16) +80001884: 00e20863 beq x4,x14,80001894 +80001888: 4b9032ef jal x5,80005540 +8000188c: 8000187c .word 0x8000187c +80001890: 8000ae30 .word 0x8000ae30 +80001894: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x00000001 +80001898: 000aa483 lw x9,0(x21) +8000189c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xffffffff +800018a0: 000aa783 lw x15,0(x21) +800018a4: 004a8a93 addi x21,x21,4 + +800018a8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + rol x2, x9, x15 # perform operation +800018a8: 60f49133 rol x2,x9,x15 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018ac: 00082203 lw x4,0(x16) +800018b0: 00220863 beq x4,x2,800018c0 +800018b4: 48d032ef jal x5,80005540 +800018b8: 800018a8 .word 0x800018a8 +800018bc: 8000ae87 .word 0x8000ae87 +800018c0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x00000001 +800018c4: 000aa983 lw x19,0(x21) +800018c8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xfffffffe +800018cc: 000aa303 lw x6,0(x21) +800018d0: 004a8a93 addi x21,x21,4 + +800018d4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + rol x27, x19, x6 # perform operation +800018d4: 60699db3 rol x27,x19,x6 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d8: 00082203 lw x4,0(x16) +800018dc: 01b20863 beq x4,x27,800018ec +800018e0: 461032ef jal x5,80005540 +800018e4: 800018d4 .word 0x800018d4 +800018e8: 8000aede .word 0x8000aede +800018ec: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x00000001 +800018f0: 000aac03 lw x24,0(x21) +800018f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x5bbc8872 +800018f8: 000aa983 lw x19,0(x21) +800018fc: 004a8a93 addi x21,x21,4 + +80001900 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + rol x31, x24, x19 # perform operation +80001900: 613c1fb3 rol x31,x24,x19 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001904: 00082203 lw x4,0(x16) +80001908: 01f20863 beq x4,x31,80001918 +8000190c: 435032ef jal x5,80005540 +80001910: 80001900 .word 0x80001900 +80001914: 8000af35 .word 0x8000af35 +80001918: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x00000001 +8000191c: 000aa983 lw x19,0(x21) +80001920: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0xaaaaaaaa +80001924: 000aac03 lw x24,0(x21) +80001928: 004a8a93 addi x21,x21,4 + +8000192c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + rol x30, x19, x24 # perform operation +8000192c: 61899f33 rol x30,x19,x24 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001930: 00082203 lw x4,0(x16) +80001934: 01e20863 beq x4,x30,80001944 +80001938: 409032ef jal x5,80005540 +8000193c: 8000192c .word 0x8000192c +80001940: 8000af8c .word 0x8000af8c +80001944: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x00000001 +80001948: 000aaf03 lw x30,0(x21) +8000194c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x55555555 +80001950: 000aa783 lw x15,0(x21) +80001954: 004a8a93 addi x21,x21,4 + +80001958 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + rol x28, x30, x15 # perform operation +80001958: 60ff1e33 rol x28,x30,x15 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000195c: 00082203 lw x4,0(x16) +80001960: 01c20863 beq x4,x28,80001970 +80001964: 3dd032ef jal x5,80005540 +80001968: 80001958 .word 0x80001958 +8000196c: 8000afe3 .word 0x8000afe3 +80001970: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x00000002 +80001974: 000aab03 lw x22,0(x21) +80001978: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x00000000 +8000197c: 000aa183 lw x3,0(x21) +80001980: 004a8a93 addi x21,x21,4 + +80001984 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + rol x19, x22, x3 # perform operation +80001984: 603b19b3 rol x19,x22,x3 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001988: 00082203 lw x4,0(x16) +8000198c: 01320863 beq x4,x19,8000199c +80001990: 3b1032ef jal x5,80005540 +80001994: 80001984 .word 0x80001984 +80001998: 8000b03a .word 0x8000b03a +8000199c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x00000002 +800019a0: 000aaa03 lw x20,0(x21) +800019a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000001 +800019a8: 000aa583 lw x11,0(x21) +800019ac: 004a8a93 addi x21,x21,4 + +800019b0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + rol x17, x20, x11 # perform operation +800019b0: 60ba18b3 rol x17,x20,x11 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019b4: 00082203 lw x4,0(x16) +800019b8: 01120863 beq x4,x17,800019c8 +800019bc: 385032ef jal x5,80005540 +800019c0: 800019b0 .word 0x800019b0 +800019c4: 8000b08a .word 0x8000b08a +800019c8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x00000002 +800019cc: 000aa303 lw x6,0(x21) +800019d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x00000002 +800019d4: 000aaf83 lw x31,0(x21) +800019d8: 004a8a93 addi x21,x21,4 + +800019dc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + rol x26, x6, x31 # perform operation +800019dc: 61f31d33 rol x26,x6,x31 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e0: 00082203 lw x4,0(x16) +800019e4: 01a20863 beq x4,x26,800019f4 +800019e8: 359032ef jal x5,80005540 +800019ec: 800019dc .word 0x800019dc +800019f0: 8000b0da .word 0x8000b0da +800019f4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x00000002 +800019f8: 000aa303 lw x6,0(x21) +800019fc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x80000000 +80001a00: 000aa883 lw x17,0(x21) +80001a04: 004a8a93 addi x21,x21,4 + +80001a08 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + rol x31, x6, x17 # perform operation +80001a08: 61131fb3 rol x31,x6,x17 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a0c: 00082203 lw x4,0(x16) +80001a10: 01f20863 beq x4,x31,80001a20 +80001a14: 32d032ef jal x5,80005540 +80001a18: 80001a08 .word 0x80001a08 +80001a1c: 8000b12a .word 0x8000b12a +80001a20: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x00000002 +80001a24: 000aa403 lw x8,0(x21) +80001a28: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x80000001 +80001a2c: 000aa903 lw x18,0(x21) +80001a30: 004a8a93 addi x21,x21,4 + +80001a34 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + rol x27, x8, x18 # perform operation +80001a34: 61241db3 rol x27,x8,x18 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a38: 00082203 lw x4,0(x16) +80001a3c: 01b20863 beq x4,x27,80001a4c +80001a40: 301032ef jal x5,80005540 +80001a44: 80001a34 .word 0x80001a34 +80001a48: 8000b181 .word 0x8000b181 +80001a4c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x00000002 +80001a50: 000aa503 lw x10,0(x21) +80001a54: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x7fffffff +80001a58: 000aac03 lw x24,0(x21) +80001a5c: 004a8a93 addi x21,x21,4 + +80001a60 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + rol x28, x10, x24 # perform operation +80001a60: 61851e33 rol x28,x10,x24 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a64: 00082203 lw x4,0(x16) +80001a68: 01c20863 beq x4,x28,80001a78 +80001a6c: 2d5032ef jal x5,80005540 +80001a70: 80001a60 .word 0x80001a60 +80001a74: 8000b1d8 .word 0x8000b1d8 +80001a78: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x00000002 +80001a7c: 000aae83 lw x29,0(x21) +80001a80: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x7ffffffe +80001a84: 000aa383 lw x7,0(x21) +80001a88: 004a8a93 addi x21,x21,4 + +80001a8c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + rol x17, x29, x7 # perform operation +80001a8c: 607e98b3 rol x17,x29,x7 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a90: 00082203 lw x4,0(x16) +80001a94: 01120863 beq x4,x17,80001aa4 +80001a98: 2a9032ef jal x5,80005540 +80001a9c: 80001a8c .word 0x80001a8c +80001aa0: 8000b22f .word 0x8000b22f +80001aa4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x00000002 +80001aa8: 000aa703 lw x14,0(x21) +80001aac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xffffffff +80001ab0: 000aa683 lw x13,0(x21) +80001ab4: 004a8a93 addi x21,x21,4 + +80001ab8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + rol x8, x14, x13 # perform operation +80001ab8: 60d71433 rol x8,x14,x13 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001abc: 00082203 lw x4,0(x16) +80001ac0: 00820863 beq x4,x8,80001ad0 +80001ac4: 27d032ef jal x5,80005540 +80001ac8: 80001ab8 .word 0x80001ab8 +80001acc: 8000b286 .word 0x8000b286 +80001ad0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x00000002 +80001ad4: 000aaf03 lw x30,0(x21) +80001ad8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xfffffffe +80001adc: 000aad83 lw x27,0(x21) +80001ae0: 004a8a93 addi x21,x21,4 + +80001ae4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + rol x24, x30, x27 # perform operation +80001ae4: 61bf1c33 rol x24,x30,x27 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae8: 00082203 lw x4,0(x16) +80001aec: 01820863 beq x4,x24,80001afc +80001af0: 251032ef jal x5,80005540 +80001af4: 80001ae4 .word 0x80001ae4 +80001af8: 8000b2dd .word 0x8000b2dd +80001afc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x00000002 +80001b00: 000aa683 lw x13,0(x21) +80001b04: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x5bbc8872 +80001b08: 000aa083 lw x1,0(x21) +80001b0c: 004a8a93 addi x21,x21,4 + +80001b10 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + rol x19, x13, x1 # perform operation +80001b10: 601699b3 rol x19,x13,x1 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b14: 00082203 lw x4,0(x16) +80001b18: 01320863 beq x4,x19,80001b28 +80001b1c: 225032ef jal x5,80005540 +80001b20: 80001b10 .word 0x80001b10 +80001b24: 8000b334 .word 0x8000b334 +80001b28: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x00000002 +80001b2c: 000aac03 lw x24,0(x21) +80001b30: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xaaaaaaaa +80001b34: 000aa903 lw x18,0(x21) +80001b38: 004a8a93 addi x21,x21,4 + +80001b3c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + rol x15, x24, x18 # perform operation +80001b3c: 612c17b3 rol x15,x24,x18 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b40: 00082203 lw x4,0(x16) +80001b44: 00f20863 beq x4,x15,80001b54 +80001b48: 1f9032ef jal x5,80005540 +80001b4c: 80001b3c .word 0x80001b3c +80001b50: 8000b38b .word 0x8000b38b +80001b54: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x00000002 +80001b58: 000aac03 lw x24,0(x21) +80001b5c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x55555555 +80001b60: 000aaf83 lw x31,0(x21) +80001b64: 004a8a93 addi x21,x21,4 + +80001b68 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + rol x1, x24, x31 # perform operation +80001b68: 61fc10b3 rol x1,x24,x31 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b6c: 00082203 lw x4,0(x16) +80001b70: 00120863 beq x4,x1,80001b80 +80001b74: 1cd032ef jal x5,80005540 +80001b78: 80001b68 .word 0x80001b68 +80001b7c: 8000b3e2 .word 0x8000b3e2 +80001b80: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x80000000 +80001b84: 000aa783 lw x15,0(x21) +80001b88: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000000 +80001b8c: 000aa583 lw x11,0(x21) +80001b90: 004a8a93 addi x21,x21,4 + +80001b94 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + rol x31, x15, x11 # perform operation +80001b94: 60b79fb3 rol x31,x15,x11 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b98: 00082203 lw x4,0(x16) +80001b9c: 01f20863 beq x4,x31,80001bac +80001ba0: 1a1032ef jal x5,80005540 +80001ba4: 80001b94 .word 0x80001b94 +80001ba8: 8000b439 .word 0x8000b439 +80001bac: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x80000000 +80001bb0: 000aa583 lw x11,0(x21) +80001bb4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x00000001 +80001bb8: 000aae83 lw x29,0(x21) +80001bbc: 004a8a93 addi x21,x21,4 + +80001bc0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + rol x24, x11, x29 # perform operation +80001bc0: 61d59c33 rol x24,x11,x29 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bc4: 00082203 lw x4,0(x16) +80001bc8: 01820863 beq x4,x24,80001bd8 +80001bcc: 175032ef jal x5,80005540 +80001bd0: 80001bc0 .word 0x80001bc0 +80001bd4: 8000b490 .word 0x8000b490 +80001bd8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x80000000 +80001bdc: 000aa903 lw x18,0(x21) +80001be0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x00000002 +80001be4: 000aab03 lw x22,0(x21) +80001be8: 004a8a93 addi x21,x21,4 + +80001bec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + rol x14, x18, x22 # perform operation +80001bec: 61691733 rol x14,x18,x22 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf0: 00082203 lw x4,0(x16) +80001bf4: 00e20863 beq x4,x14,80001c04 +80001bf8: 149032ef jal x5,80005540 +80001bfc: 80001bec .word 0x80001bec +80001c00: 8000b4e7 .word 0x8000b4e7 +80001c04: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x80000000 +80001c08: 000aa703 lw x14,0(x21) +80001c0c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x80000000 +80001c10: 000aab83 lw x23,0(x21) +80001c14: 004a8a93 addi x21,x21,4 + +80001c18 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + rol x7, x14, x23 # perform operation +80001c18: 617713b3 rol x7,x14,x23 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c1c: 00082203 lw x4,0(x16) +80001c20: 00720863 beq x4,x7,80001c30 +80001c24: 11d032ef jal x5,80005540 +80001c28: 80001c18 .word 0x80001c18 +80001c2c: 8000b53e .word 0x8000b53e +80001c30: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x80000000 +80001c34: 000aa483 lw x9,0(x21) +80001c38: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x80000001 +80001c3c: 000aa303 lw x6,0(x21) +80001c40: 004a8a93 addi x21,x21,4 + +80001c44 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + rol x8, x9, x6 # perform operation +80001c44: 60649433 rol x8,x9,x6 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c48: 00082203 lw x4,0(x16) +80001c4c: 00820863 beq x4,x8,80001c5c +80001c50: 0f1032ef jal x5,80005540 +80001c54: 80001c44 .word 0x80001c44 +80001c58: 8000b59c .word 0x8000b59c +80001c5c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x80000000 +80001c60: 000aa603 lw x12,0(x21) +80001c64: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x7fffffff +80001c68: 000aac03 lw x24,0(x21) +80001c6c: 004a8a93 addi x21,x21,4 + +80001c70 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + rol x29, x12, x24 # perform operation +80001c70: 61861eb3 rol x29,x12,x24 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c74: 00082203 lw x4,0(x16) +80001c78: 01d20863 beq x4,x29,80001c88 +80001c7c: 0c5032ef jal x5,80005540 +80001c80: 80001c70 .word 0x80001c70 +80001c84: 8000b5fa .word 0x8000b5fa +80001c88: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x80000000 +80001c8c: 000aaf83 lw x31,0(x21) +80001c90: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x7ffffffe +80001c94: 000aae83 lw x29,0(x21) +80001c98: 004a8a93 addi x21,x21,4 + +80001c9c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + rol x9, x31, x29 # perform operation +80001c9c: 61df94b3 rol x9,x31,x29 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca0: 00082203 lw x4,0(x16) +80001ca4: 00920863 beq x4,x9,80001cb4 +80001ca8: 099032ef jal x5,80005540 +80001cac: 80001c9c .word 0x80001c9c +80001cb0: 8000b658 .word 0x8000b658 +80001cb4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x80000000 +80001cb8: 000aae83 lw x29,0(x21) +80001cbc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xffffffff +80001cc0: 000aa603 lw x12,0(x21) +80001cc4: 004a8a93 addi x21,x21,4 + +80001cc8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + rol x3, x29, x12 # perform operation +80001cc8: 60ce91b3 rol x3,x29,x12 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001ccc: 00082203 lw x4,0(x16) +80001cd0: 00320863 beq x4,x3,80001ce0 +80001cd4: 06d032ef jal x5,80005540 +80001cd8: 80001cc8 .word 0x80001cc8 +80001cdc: 8000b6b6 .word 0x8000b6b6 +80001ce0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x80000000 +80001ce4: 000aa703 lw x14,0(x21) +80001ce8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xfffffffe +80001cec: 000aa403 lw x8,0(x21) +80001cf0: 004a8a93 addi x21,x21,4 + +80001cf4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + rol x7, x14, x8 # perform operation +80001cf4: 608713b3 rol x7,x14,x8 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf8: 00082203 lw x4,0(x16) +80001cfc: 00720863 beq x4,x7,80001d0c +80001d00: 041032ef jal x5,80005540 +80001d04: 80001cf4 .word 0x80001cf4 +80001d08: 8000b714 .word 0x8000b714 +80001d0c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x80000000 +80001d10: 000aa583 lw x11,0(x21) +80001d14: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x5bbc8872 +80001d18: 000aa403 lw x8,0(x21) +80001d1c: 004a8a93 addi x21,x21,4 + +80001d20 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + rol x2, x11, x8 # perform operation +80001d20: 60859133 rol x2,x11,x8 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d24: 00082203 lw x4,0(x16) +80001d28: 00220863 beq x4,x2,80001d38 +80001d2c: 015032ef jal x5,80005540 +80001d30: 80001d20 .word 0x80001d20 +80001d34: 8000b772 .word 0x8000b772 +80001d38: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x80000000 +80001d3c: 000aa483 lw x9,0(x21) +80001d40: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xaaaaaaaa +80001d44: 000aa303 lw x6,0(x21) +80001d48: 004a8a93 addi x21,x21,4 + +80001d4c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + rol x14, x9, x6 # perform operation +80001d4c: 60649733 rol x14,x9,x6 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d50: 00082203 lw x4,0(x16) +80001d54: 00e20863 beq x4,x14,80001d64 +80001d58: 7e8032ef jal x5,80005540 +80001d5c: 80001d4c .word 0x80001d4c +80001d60: 8000b7d0 .word 0x8000b7d0 +80001d64: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x80000000 +80001d68: 000aaf03 lw x30,0(x21) +80001d6c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x55555555 +80001d70: 000aaf83 lw x31,0(x21) +80001d74: 004a8a93 addi x21,x21,4 + +80001d78 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + rol x18, x30, x31 # perform operation +80001d78: 61ff1933 rol x18,x30,x31 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d7c: 00082203 lw x4,0(x16) +80001d80: 01220863 beq x4,x18,80001d90 +80001d84: 7bc032ef jal x5,80005540 +80001d88: 80001d78 .word 0x80001d78 +80001d8c: 8000b82e .word 0x8000b82e +80001d90: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x80000001 +80001d94: 000aaf03 lw x30,0(x21) +80001d98: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000000 +80001d9c: 000aa583 lw x11,0(x21) +80001da0: 004a8a93 addi x21,x21,4 + +80001da4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + rol x23, x30, x11 # perform operation +80001da4: 60bf1bb3 rol x23,x30,x11 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da8: 00082203 lw x4,0(x16) +80001dac: 01720863 beq x4,x23,80001dbc +80001db0: 790032ef jal x5,80005540 +80001db4: 80001da4 .word 0x80001da4 +80001db8: 8000b88c .word 0x8000b88c +80001dbc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x80000001 +80001dc0: 000aac03 lw x24,0(x21) +80001dc4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x00000001 +80001dc8: 000aad83 lw x27,0(x21) +80001dcc: 004a8a93 addi x21,x21,4 + +80001dd0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + rol x30, x24, x27 # perform operation +80001dd0: 61bc1f33 rol x30,x24,x27 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dd4: 00082203 lw x4,0(x16) +80001dd8: 01e20863 beq x4,x30,80001de8 +80001ddc: 764032ef jal x5,80005540 +80001de0: 80001dd0 .word 0x80001dd0 +80001de4: 8000b8e3 .word 0x8000b8e3 +80001de8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x80000001 +80001dec: 000aac83 lw x25,0(x21) +80001df0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x00000002 +80001df4: 000aa103 lw x2,0(x21) +80001df8: 004a8a93 addi x21,x21,4 + +80001dfc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + rol x13, x25, x2 # perform operation +80001dfc: 602c96b3 rol x13,x25,x2 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e00: 00082203 lw x4,0(x16) +80001e04: 00d20863 beq x4,x13,80001e14 +80001e08: 738032ef jal x5,80005540 +80001e0c: 80001dfc .word 0x80001dfc +80001e10: 8000b93a .word 0x8000b93a +80001e14: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x80000001 +80001e18: 000aac03 lw x24,0(x21) +80001e1c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x80000000 +80001e20: 000aae03 lw x28,0(x21) +80001e24: 004a8a93 addi x21,x21,4 + +80001e28 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + rol x11, x24, x28 # perform operation +80001e28: 61cc15b3 rol x11,x24,x28 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e2c: 00082203 lw x4,0(x16) +80001e30: 00b20863 beq x4,x11,80001e40 +80001e34: 70c032ef jal x5,80005540 +80001e38: 80001e28 .word 0x80001e28 +80001e3c: 8000b991 .word 0x8000b991 +80001e40: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x80000001 +80001e44: 000aaf83 lw x31,0(x21) +80001e48: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x80000001 +80001e4c: 000aa903 lw x18,0(x21) +80001e50: 004a8a93 addi x21,x21,4 + +80001e54 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + rol x24, x31, x18 # perform operation +80001e54: 612f9c33 rol x24,x31,x18 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e58: 00082203 lw x4,0(x16) +80001e5c: 01820863 beq x4,x24,80001e6c +80001e60: 6e0032ef jal x5,80005540 +80001e64: 80001e54 .word 0x80001e54 +80001e68: 8000b9ef .word 0x8000b9ef +80001e6c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x80000001 +80001e70: 000aab83 lw x23,0(x21) +80001e74: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x7fffffff +80001e78: 000aaf03 lw x30,0(x21) +80001e7c: 004a8a93 addi x21,x21,4 + +80001e80 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + rol x7, x23, x30 # perform operation +80001e80: 61eb93b3 rol x7,x23,x30 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e84: 00082203 lw x4,0(x16) +80001e88: 00720863 beq x4,x7,80001e98 +80001e8c: 6b4032ef jal x5,80005540 +80001e90: 80001e80 .word 0x80001e80 +80001e94: 8000ba4d .word 0x8000ba4d +80001e98: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x80000001 +80001e9c: 000aa183 lw x3,0(x21) +80001ea0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x7ffffffe +80001ea4: 000aa383 lw x7,0(x21) +80001ea8: 004a8a93 addi x21,x21,4 + +80001eac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + rol x26, x3, x7 # perform operation +80001eac: 60719d33 rol x26,x3,x7 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb0: 00082203 lw x4,0(x16) +80001eb4: 01a20863 beq x4,x26,80001ec4 +80001eb8: 688032ef jal x5,80005540 +80001ebc: 80001eac .word 0x80001eac +80001ec0: 8000baab .word 0x8000baab +80001ec4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x80000001 +80001ec8: 000aa583 lw x11,0(x21) +80001ecc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xffffffff +80001ed0: 000aa303 lw x6,0(x21) +80001ed4: 004a8a93 addi x21,x21,4 + +80001ed8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + rol x3, x11, x6 # perform operation +80001ed8: 606591b3 rol x3,x11,x6 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001edc: 00082203 lw x4,0(x16) +80001ee0: 00320863 beq x4,x3,80001ef0 +80001ee4: 65c032ef jal x5,80005540 +80001ee8: 80001ed8 .word 0x80001ed8 +80001eec: 8000bb09 .word 0x8000bb09 +80001ef0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x80000001 +80001ef4: 000aa583 lw x11,0(x21) +80001ef8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xfffffffe +80001efc: 000aaf03 lw x30,0(x21) +80001f00: 004a8a93 addi x21,x21,4 + +80001f04 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + rol x29, x11, x30 # perform operation +80001f04: 61e59eb3 rol x29,x11,x30 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f08: 00082203 lw x4,0(x16) +80001f0c: 01d20863 beq x4,x29,80001f1c +80001f10: 630032ef jal x5,80005540 +80001f14: 80001f04 .word 0x80001f04 +80001f18: 8000bb67 .word 0x8000bb67 +80001f1c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x80000001 +80001f20: 000aac03 lw x24,0(x21) +80001f24: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x5bbc8872 +80001f28: 000aa383 lw x7,0(x21) +80001f2c: 004a8a93 addi x21,x21,4 + +80001f30 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + rol x27, x24, x7 # perform operation +80001f30: 607c1db3 rol x27,x24,x7 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f34: 00082203 lw x4,0(x16) +80001f38: 01b20863 beq x4,x27,80001f48 +80001f3c: 604032ef jal x5,80005540 +80001f40: 80001f30 .word 0x80001f30 +80001f44: 8000bbc5 .word 0x8000bbc5 +80001f48: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x80000001 +80001f4c: 000aad83 lw x27,0(x21) +80001f50: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xaaaaaaaa +80001f54: 000aa583 lw x11,0(x21) +80001f58: 004a8a93 addi x21,x21,4 + +80001f5c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + rol x18, x27, x11 # perform operation +80001f5c: 60bd9933 rol x18,x27,x11 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f60: 00082203 lw x4,0(x16) +80001f64: 01220863 beq x4,x18,80001f74 +80001f68: 5d8032ef jal x5,80005540 +80001f6c: 80001f5c .word 0x80001f5c +80001f70: 8000bc23 .word 0x8000bc23 +80001f74: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x80000001 +80001f78: 000aab83 lw x23,0(x21) +80001f7c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x55555555 +80001f80: 000aaa03 lw x20,0(x21) +80001f84: 004a8a93 addi x21,x21,4 + +80001f88 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + rol x10, x23, x20 # perform operation +80001f88: 614b9533 rol x10,x23,x20 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f8c: 00082203 lw x4,0(x16) +80001f90: 00a20863 beq x4,x10,80001fa0 +80001f94: 5ac032ef jal x5,80005540 +80001f98: 80001f88 .word 0x80001f88 +80001f9c: 8000bc81 .word 0x8000bc81 +80001fa0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x7fffffff +80001fa4: 000aa083 lw x1,0(x21) +80001fa8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x00000000 +80001fac: 000aa883 lw x17,0(x21) +80001fb0: 004a8a93 addi x21,x21,4 + +80001fb4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + rol x28, x1, x17 # perform operation +80001fb4: 61109e33 rol x28,x1,x17 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb8: 00082203 lw x4,0(x16) +80001fbc: 01c20863 beq x4,x28,80001fcc +80001fc0: 580032ef jal x5,80005540 +80001fc4: 80001fb4 .word 0x80001fb4 +80001fc8: 8000bcdf .word 0x8000bcdf +80001fcc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x7fffffff +80001fd0: 000aae83 lw x29,0(x21) +80001fd4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x00000001 +80001fd8: 000aa903 lw x18,0(x21) +80001fdc: 004a8a93 addi x21,x21,4 + +80001fe0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + rol x1, x29, x18 # perform operation +80001fe0: 612e90b3 rol x1,x29,x18 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fe4: 00082203 lw x4,0(x16) +80001fe8: 00120863 beq x4,x1,80001ff8 +80001fec: 554032ef jal x5,80005540 +80001ff0: 80001fe0 .word 0x80001fe0 +80001ff4: 8000bd36 .word 0x8000bd36 +80001ff8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x7fffffff +80001ffc: 000aae03 lw x28,0(x21) +80002000: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x00000002 +80002004: 000aac03 lw x24,0(x21) +80002008: 004a8a93 addi x21,x21,4 + +8000200c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + rol x13, x28, x24 # perform operation +8000200c: 618e16b3 rol x13,x28,x24 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002010: 00082203 lw x4,0(x16) +80002014: 00d20863 beq x4,x13,80002024 +80002018: 528032ef jal x5,80005540 +8000201c: 8000200c .word 0x8000200c +80002020: 8000bd8d .word 0x8000bd8d +80002024: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x7fffffff +80002028: 000aa583 lw x11,0(x21) +8000202c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x80000000 +80002030: 000aa603 lw x12,0(x21) +80002034: 004a8a93 addi x21,x21,4 + +80002038 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + rol x2, x11, x12 # perform operation +80002038: 60c59133 rol x2,x11,x12 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000203c: 00082203 lw x4,0(x16) +80002040: 00220863 beq x4,x2,80002050 +80002044: 4fc032ef jal x5,80005540 +80002048: 80002038 .word 0x80002038 +8000204c: 8000bde4 .word 0x8000bde4 +80002050: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x7fffffff +80002054: 000aad03 lw x26,0(x21) +80002058: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x80000001 +8000205c: 000aa303 lw x6,0(x21) +80002060: 004a8a93 addi x21,x21,4 + +80002064 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + rol x31, x26, x6 # perform operation +80002064: 606d1fb3 rol x31,x26,x6 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002068: 00082203 lw x4,0(x16) +8000206c: 01f20863 beq x4,x31,8000207c +80002070: 4d0032ef jal x5,80005540 +80002074: 80002064 .word 0x80002064 +80002078: 8000be42 .word 0x8000be42 +8000207c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x7fffffff +80002080: 000aa403 lw x8,0(x21) +80002084: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x7fffffff +80002088: 000aa483 lw x9,0(x21) +8000208c: 004a8a93 addi x21,x21,4 + +80002090 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + rol x25, x8, x9 # perform operation +80002090: 60941cb3 rol x25,x8,x9 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002094: 00082203 lw x4,0(x16) +80002098: 01920863 beq x4,x25,800020a8 +8000209c: 4a4032ef jal x5,80005540 +800020a0: 80002090 .word 0x80002090 +800020a4: 8000bea0 .word 0x8000bea0 +800020a8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x7fffffff +800020ac: 000aaf03 lw x30,0(x21) +800020b0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x7ffffffe +800020b4: 000aa583 lw x11,0(x21) +800020b8: 004a8a93 addi x21,x21,4 + +800020bc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + rol x23, x30, x11 # perform operation +800020bc: 60bf1bb3 rol x23,x30,x11 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c0: 00082203 lw x4,0(x16) +800020c4: 01720863 beq x4,x23,800020d4 +800020c8: 478032ef jal x5,80005540 +800020cc: 800020bc .word 0x800020bc +800020d0: 8000befe .word 0x8000befe +800020d4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x7fffffff +800020d8: 000aad03 lw x26,0(x21) +800020dc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xffffffff +800020e0: 000aa783 lw x15,0(x21) +800020e4: 004a8a93 addi x21,x21,4 + +800020e8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + rol x18, x26, x15 # perform operation +800020e8: 60fd1933 rol x18,x26,x15 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020ec: 00082203 lw x4,0(x16) +800020f0: 01220863 beq x4,x18,80002100 +800020f4: 44c032ef jal x5,80005540 +800020f8: 800020e8 .word 0x800020e8 +800020fc: 8000bf5c .word 0x8000bf5c +80002100: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x7fffffff +80002104: 000aa483 lw x9,0(x21) +80002108: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xfffffffe +8000210c: 000aa303 lw x6,0(x21) +80002110: 004a8a93 addi x21,x21,4 + +80002114 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + rol x7, x9, x6 # perform operation +80002114: 606493b3 rol x7,x9,x6 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002118: 00082203 lw x4,0(x16) +8000211c: 00720863 beq x4,x7,8000212c +80002120: 420032ef jal x5,80005540 +80002124: 80002114 .word 0x80002114 +80002128: 8000bfba .word 0x8000bfba +8000212c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x7fffffff +80002130: 000aaf03 lw x30,0(x21) +80002134: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x5bbc8872 +80002138: 000aa083 lw x1,0(x21) +8000213c: 004a8a93 addi x21,x21,4 + +80002140 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + rol x27, x30, x1 # perform operation +80002140: 601f1db3 rol x27,x30,x1 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002144: 00082203 lw x4,0(x16) +80002148: 01b20863 beq x4,x27,80002158 +8000214c: 3f4032ef jal x5,80005540 +80002150: 80002140 .word 0x80002140 +80002154: 8000c018 .word 0x8000c018 +80002158: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x7fffffff +8000215c: 000aac03 lw x24,0(x21) +80002160: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xaaaaaaaa +80002164: 000aa403 lw x8,0(x21) +80002168: 004a8a93 addi x21,x21,4 + +8000216c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + rol x1, x24, x8 # perform operation +8000216c: 608c10b3 rol x1,x24,x8 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002170: 00082203 lw x4,0(x16) +80002174: 00120863 beq x4,x1,80002184 +80002178: 3c8032ef jal x5,80005540 +8000217c: 8000216c .word 0x8000216c +80002180: 8000c076 .word 0x8000c076 +80002184: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x7fffffff +80002188: 000aa183 lw x3,0(x21) +8000218c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x55555555 +80002190: 000aad83 lw x27,0(x21) +80002194: 004a8a93 addi x21,x21,4 + +80002198 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + rol x2, x3, x27 # perform operation +80002198: 61b19133 rol x2,x3,x27 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000219c: 00082203 lw x4,0(x16) +800021a0: 00220863 beq x4,x2,800021b0 +800021a4: 39c032ef jal x5,80005540 +800021a8: 80002198 .word 0x80002198 +800021ac: 8000c0d4 .word 0x8000c0d4 +800021b0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x7ffffffe +800021b4: 000aae83 lw x29,0(x21) +800021b8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x00000000 +800021bc: 000aa583 lw x11,0(x21) +800021c0: 004a8a93 addi x21,x21,4 + +800021c4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + rol x3, x29, x11 # perform operation +800021c4: 60be91b3 rol x3,x29,x11 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c8: 00082203 lw x4,0(x16) +800021cc: 00320863 beq x4,x3,800021dc +800021d0: 370032ef jal x5,80005540 +800021d4: 800021c4 .word 0x800021c4 +800021d8: 8000c132 .word 0x8000c132 +800021dc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x7ffffffe +800021e0: 000aa603 lw x12,0(x21) +800021e4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x00000001 +800021e8: 000aa103 lw x2,0(x21) +800021ec: 004a8a93 addi x21,x21,4 + +800021f0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + rol x23, x12, x2 # perform operation +800021f0: 60261bb3 rol x23,x12,x2 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021f4: 00082203 lw x4,0(x16) +800021f8: 01720863 beq x4,x23,80002208 +800021fc: 344032ef jal x5,80005540 +80002200: 800021f0 .word 0x800021f0 +80002204: 8000c189 .word 0x8000c189 +80002208: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x7ffffffe +8000220c: 000aa603 lw x12,0(x21) +80002210: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x00000002 +80002214: 000aa683 lw x13,0(x21) +80002218: 004a8a93 addi x21,x21,4 + +8000221c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + rol x30, x12, x13 # perform operation +8000221c: 60d61f33 rol x30,x12,x13 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002220: 00082203 lw x4,0(x16) +80002224: 01e20863 beq x4,x30,80002234 +80002228: 318032ef jal x5,80005540 +8000222c: 8000221c .word 0x8000221c +80002230: 8000c1e0 .word 0x8000c1e0 +80002234: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x7ffffffe +80002238: 000aaf83 lw x31,0(x21) +8000223c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x80000000 +80002240: 000aa183 lw x3,0(x21) +80002244: 004a8a93 addi x21,x21,4 + +80002248 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + rol x24, x31, x3 # perform operation +80002248: 603f9c33 rol x24,x31,x3 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000224c: 00082203 lw x4,0(x16) +80002250: 01820863 beq x4,x24,80002260 +80002254: 2ec032ef jal x5,80005540 +80002258: 80002248 .word 0x80002248 +8000225c: 8000c237 .word 0x8000c237 +80002260: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x7ffffffe +80002264: 000aa983 lw x19,0(x21) +80002268: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x80000001 +8000226c: 000aa603 lw x12,0(x21) +80002270: 004a8a93 addi x21,x21,4 + +80002274 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + rol x2, x19, x12 # perform operation +80002274: 60c99133 rol x2,x19,x12 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002278: 00082203 lw x4,0(x16) +8000227c: 00220863 beq x4,x2,8000228c +80002280: 2c0032ef jal x5,80005540 +80002284: 80002274 .word 0x80002274 +80002288: 8000c295 .word 0x8000c295 +8000228c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x7ffffffe +80002290: 000aa103 lw x2,0(x21) +80002294: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x7fffffff +80002298: 000aa883 lw x17,0(x21) +8000229c: 004a8a93 addi x21,x21,4 + +800022a0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + rol x24, x2, x17 # perform operation +800022a0: 61111c33 rol x24,x2,x17 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022a4: 00082203 lw x4,0(x16) +800022a8: 01820863 beq x4,x24,800022b8 +800022ac: 294032ef jal x5,80005540 +800022b0: 800022a0 .word 0x800022a0 +800022b4: 8000c2f3 .word 0x8000c2f3 +800022b8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x7ffffffe +800022bc: 000aa603 lw x12,0(x21) +800022c0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x7ffffffe +800022c4: 000aa303 lw x6,0(x21) +800022c8: 004a8a93 addi x21,x21,4 + +800022cc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + rol x28, x12, x6 # perform operation +800022cc: 60661e33 rol x28,x12,x6 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d0: 00082203 lw x4,0(x16) +800022d4: 01c20863 beq x4,x28,800022e4 +800022d8: 268032ef jal x5,80005540 +800022dc: 800022cc .word 0x800022cc +800022e0: 8000c351 .word 0x8000c351 +800022e4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x7ffffffe +800022e8: 000aa083 lw x1,0(x21) +800022ec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xffffffff +800022f0: 000aaf03 lw x30,0(x21) +800022f4: 004a8a93 addi x21,x21,4 + +800022f8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + rol x6, x1, x30 # perform operation +800022f8: 61e09333 rol x6,x1,x30 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022fc: 00082203 lw x4,0(x16) +80002300: 00620863 beq x4,x6,80002310 +80002304: 23c032ef jal x5,80005540 +80002308: 800022f8 .word 0x800022f8 +8000230c: 8000c3af .word 0x8000c3af +80002310: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x7ffffffe +80002314: 000aae03 lw x28,0(x21) +80002318: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xfffffffe +8000231c: 000aa983 lw x19,0(x21) +80002320: 004a8a93 addi x21,x21,4 + +80002324 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + rol x14, x28, x19 # perform operation +80002324: 613e1733 rol x14,x28,x19 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002328: 00082203 lw x4,0(x16) +8000232c: 00e20863 beq x4,x14,8000233c +80002330: 210032ef jal x5,80005540 +80002334: 80002324 .word 0x80002324 +80002338: 8000c40d .word 0x8000c40d +8000233c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x7ffffffe +80002340: 000aad03 lw x26,0(x21) +80002344: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x5bbc8872 +80002348: 000aae03 lw x28,0(x21) +8000234c: 004a8a93 addi x21,x21,4 + +80002350 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + rol x15, x26, x28 # perform operation +80002350: 61cd17b3 rol x15,x26,x28 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002354: 00082203 lw x4,0(x16) +80002358: 00f20863 beq x4,x15,80002368 +8000235c: 1e4032ef jal x5,80005540 +80002360: 80002350 .word 0x80002350 +80002364: 8000c46b .word 0x8000c46b +80002368: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x7ffffffe +8000236c: 000aac83 lw x25,0(x21) +80002370: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xaaaaaaaa +80002374: 000aad83 lw x27,0(x21) +80002378: 004a8a93 addi x21,x21,4 + +8000237c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + rol x24, x25, x27 # perform operation +8000237c: 61bc9c33 rol x24,x25,x27 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002380: 00082203 lw x4,0(x16) +80002384: 01820863 beq x4,x24,80002394 +80002388: 1b8032ef jal x5,80005540 +8000238c: 8000237c .word 0x8000237c +80002390: 8000c4c9 .word 0x8000c4c9 +80002394: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x7ffffffe +80002398: 000aa783 lw x15,0(x21) +8000239c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x55555555 +800023a0: 000aa583 lw x11,0(x21) +800023a4: 004a8a93 addi x21,x21,4 + +800023a8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + rol x18, x15, x11 # perform operation +800023a8: 60b79933 rol x18,x15,x11 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023ac: 00082203 lw x4,0(x16) +800023b0: 01220863 beq x4,x18,800023c0 +800023b4: 18c032ef jal x5,80005540 +800023b8: 800023a8 .word 0x800023a8 +800023bc: 8000c527 .word 0x8000c527 +800023c0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xffffffff +800023c4: 000aad03 lw x26,0(x21) +800023c8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x00000000 +800023cc: 000aa103 lw x2,0(x21) +800023d0: 004a8a93 addi x21,x21,4 + +800023d4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + rol x30, x26, x2 # perform operation +800023d4: 602d1f33 rol x30,x26,x2 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d8: 00082203 lw x4,0(x16) +800023dc: 01e20863 beq x4,x30,800023ec +800023e0: 160032ef jal x5,80005540 +800023e4: 800023d4 .word 0x800023d4 +800023e8: 8000c585 .word 0x8000c585 +800023ec: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xffffffff +800023f0: 000aa503 lw x10,0(x21) +800023f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x00000001 +800023f8: 000aaa03 lw x20,0(x21) +800023fc: 004a8a93 addi x21,x21,4 + +80002400 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + rol x15, x10, x20 # perform operation +80002400: 614517b3 rol x15,x10,x20 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002404: 00082203 lw x4,0(x16) +80002408: 00f20863 beq x4,x15,80002418 +8000240c: 134032ef jal x5,80005540 +80002410: 80002400 .word 0x80002400 +80002414: 8000c5dc .word 0x8000c5dc +80002418: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xffffffff +8000241c: 000aa603 lw x12,0(x21) +80002420: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x00000002 +80002424: 000aa783 lw x15,0(x21) +80002428: 004a8a93 addi x21,x21,4 + +8000242c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + rol x28, x12, x15 # perform operation +8000242c: 60f61e33 rol x28,x12,x15 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002430: 00082203 lw x4,0(x16) +80002434: 01c20863 beq x4,x28,80002444 +80002438: 108032ef jal x5,80005540 +8000243c: 8000242c .word 0x8000242c +80002440: 8000c633 .word 0x8000c633 +80002444: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xffffffff +80002448: 000aaf03 lw x30,0(x21) +8000244c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x80000000 +80002450: 000aa403 lw x8,0(x21) +80002454: 004a8a93 addi x21,x21,4 + +80002458 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + rol x3, x30, x8 # perform operation +80002458: 608f11b3 rol x3,x30,x8 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000245c: 00082203 lw x4,0(x16) +80002460: 00320863 beq x4,x3,80002470 +80002464: 0dc032ef jal x5,80005540 +80002468: 80002458 .word 0x80002458 +8000246c: 8000c68a .word 0x8000c68a +80002470: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xffffffff +80002474: 000aaa03 lw x20,0(x21) +80002478: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x80000001 +8000247c: 000aa783 lw x15,0(x21) +80002480: 004a8a93 addi x21,x21,4 + +80002484 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + rol x13, x20, x15 # perform operation +80002484: 60fa16b3 rol x13,x20,x15 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002488: 00082203 lw x4,0(x16) +8000248c: 00d20863 beq x4,x13,8000249c +80002490: 0b0032ef jal x5,80005540 +80002494: 80002484 .word 0x80002484 +80002498: 8000c6e8 .word 0x8000c6e8 +8000249c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xffffffff +800024a0: 000aa103 lw x2,0(x21) +800024a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x7fffffff +800024a8: 000aab83 lw x23,0(x21) +800024ac: 004a8a93 addi x21,x21,4 + +800024b0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + rol x8, x2, x23 # perform operation +800024b0: 61711433 rol x8,x2,x23 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024b4: 00082203 lw x4,0(x16) +800024b8: 00820863 beq x4,x8,800024c8 +800024bc: 084032ef jal x5,80005540 +800024c0: 800024b0 .word 0x800024b0 +800024c4: 8000c746 .word 0x8000c746 +800024c8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xffffffff +800024cc: 000aa583 lw x11,0(x21) +800024d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x7ffffffe +800024d4: 000aad83 lw x27,0(x21) +800024d8: 004a8a93 addi x21,x21,4 + +800024dc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + rol x8, x11, x27 # perform operation +800024dc: 61b59433 rol x8,x11,x27 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e0: 00082203 lw x4,0(x16) +800024e4: 00820863 beq x4,x8,800024f4 +800024e8: 058032ef jal x5,80005540 +800024ec: 800024dc .word 0x800024dc +800024f0: 8000c7a4 .word 0x8000c7a4 +800024f4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xffffffff +800024f8: 000aa683 lw x13,0(x21) +800024fc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xffffffff +80002500: 000aad83 lw x27,0(x21) +80002504: 004a8a93 addi x21,x21,4 + +80002508 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + rol x25, x13, x27 # perform operation +80002508: 61b69cb3 rol x25,x13,x27 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +8000250c: 00082203 lw x4,0(x16) +80002510: 01920863 beq x4,x25,80002520 +80002514: 02c032ef jal x5,80005540 +80002518: 80002508 .word 0x80002508 +8000251c: 8000c802 .word 0x8000c802 +80002520: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xffffffff +80002524: 000aaa03 lw x20,0(x21) +80002528: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0xfffffffe +8000252c: 000aac83 lw x25,0(x21) +80002530: 004a8a93 addi x21,x21,4 + +80002534 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + rol x18, x20, x25 # perform operation +80002534: 619a1933 rol x18,x20,x25 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002538: 00082203 lw x4,0(x16) +8000253c: 01220863 beq x4,x18,8000254c +80002540: 000032ef jal x5,80005540 +80002544: 80002534 .word 0x80002534 +80002548: 8000c860 .word 0x8000c860 +8000254c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xffffffff +80002550: 000aa383 lw x7,0(x21) +80002554: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x5bbc8872 +80002558: 000aa883 lw x17,0(x21) +8000255c: 004a8a93 addi x21,x21,4 + +80002560 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + rol x30, x7, x17 # perform operation +80002560: 61139f33 rol x30,x7,x17 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002564: 00082203 lw x4,0(x16) +80002568: 01e20863 beq x4,x30,80002578 +8000256c: 7d5022ef jal x5,80005540 +80002570: 80002560 .word 0x80002560 +80002574: 8000c8be .word 0x8000c8be +80002578: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xffffffff +8000257c: 000aa603 lw x12,0(x21) +80002580: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xaaaaaaaa +80002584: 000aa683 lw x13,0(x21) +80002588: 004a8a93 addi x21,x21,4 + +8000258c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + rol x24, x12, x13 # perform operation +8000258c: 60d61c33 rol x24,x12,x13 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002590: 00082203 lw x4,0(x16) +80002594: 01820863 beq x4,x24,800025a4 +80002598: 7a9022ef jal x5,80005540 +8000259c: 8000258c .word 0x8000258c +800025a0: 8000c91c .word 0x8000c91c +800025a4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xffffffff +800025a8: 000aa403 lw x8,0(x21) +800025ac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x55555555 +800025b0: 000aaa03 lw x20,0(x21) +800025b4: 004a8a93 addi x21,x21,4 + +800025b8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + rol x24, x8, x20 # perform operation +800025b8: 61441c33 rol x24,x8,x20 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025bc: 00082203 lw x4,0(x16) +800025c0: 01820863 beq x4,x24,800025d0 +800025c4: 77d022ef jal x5,80005540 +800025c8: 800025b8 .word 0x800025b8 +800025cc: 8000c97a .word 0x8000c97a +800025d0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xfffffffe +800025d4: 000aac03 lw x24,0(x21) +800025d8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x00000000 +800025dc: 000aa483 lw x9,0(x21) +800025e0: 004a8a93 addi x21,x21,4 + +800025e4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + rol x20, x24, x9 # perform operation +800025e4: 609c1a33 rol x20,x24,x9 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e8: 00082203 lw x4,0(x16) +800025ec: 01420863 beq x4,x20,800025fc +800025f0: 751022ef jal x5,80005540 +800025f4: 800025e4 .word 0x800025e4 +800025f8: 8000c9d8 .word 0x8000c9d8 +800025fc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xfffffffe +80002600: 000aa483 lw x9,0(x21) +80002604: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x00000001 +80002608: 000aa883 lw x17,0(x21) +8000260c: 004a8a93 addi x21,x21,4 + +80002610 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + rol x18, x9, x17 # perform operation +80002610: 61149933 rol x18,x9,x17 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002614: 00082203 lw x4,0(x16) +80002618: 01220863 beq x4,x18,80002628 +8000261c: 725022ef jal x5,80005540 +80002620: 80002610 .word 0x80002610 +80002624: 8000ca2f .word 0x8000ca2f +80002628: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xfffffffe +8000262c: 000aa303 lw x6,0(x21) +80002630: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x00000002 +80002634: 000aae83 lw x29,0(x21) +80002638: 004a8a93 addi x21,x21,4 + +8000263c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + rol x19, x6, x29 # perform operation +8000263c: 61d319b3 rol x19,x6,x29 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002640: 00082203 lw x4,0(x16) +80002644: 01320863 beq x4,x19,80002654 +80002648: 6f9022ef jal x5,80005540 +8000264c: 8000263c .word 0x8000263c +80002650: 8000ca86 .word 0x8000ca86 +80002654: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xfffffffe +80002658: 000aaf83 lw x31,0(x21) +8000265c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x80000000 +80002660: 000aa083 lw x1,0(x21) +80002664: 004a8a93 addi x21,x21,4 + +80002668 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + rol x26, x31, x1 # perform operation +80002668: 601f9d33 rol x26,x31,x1 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000266c: 00082203 lw x4,0(x16) +80002670: 01a20863 beq x4,x26,80002680 +80002674: 6cd022ef jal x5,80005540 +80002678: 80002668 .word 0x80002668 +8000267c: 8000cadd .word 0x8000cadd +80002680: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xfffffffe +80002684: 000aa583 lw x11,0(x21) +80002688: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x80000001 +8000268c: 000aa183 lw x3,0(x21) +80002690: 004a8a93 addi x21,x21,4 + +80002694 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + rol x8, x11, x3 # perform operation +80002694: 60359433 rol x8,x11,x3 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002698: 00082203 lw x4,0(x16) +8000269c: 00820863 beq x4,x8,800026ac +800026a0: 6a1022ef jal x5,80005540 +800026a4: 80002694 .word 0x80002694 +800026a8: 8000cb3b .word 0x8000cb3b +800026ac: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xfffffffe +800026b0: 000aa983 lw x19,0(x21) +800026b4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x7fffffff +800026b8: 000aac83 lw x25,0(x21) +800026bc: 004a8a93 addi x21,x21,4 + +800026c0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + rol x14, x19, x25 # perform operation +800026c0: 61999733 rol x14,x19,x25 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026c4: 00082203 lw x4,0(x16) +800026c8: 00e20863 beq x4,x14,800026d8 +800026cc: 675022ef jal x5,80005540 +800026d0: 800026c0 .word 0x800026c0 +800026d4: 8000cb99 .word 0x8000cb99 +800026d8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xfffffffe +800026dc: 000aad83 lw x27,0(x21) +800026e0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x7ffffffe +800026e4: 000aa983 lw x19,0(x21) +800026e8: 004a8a93 addi x21,x21,4 + +800026ec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + rol x3, x27, x19 # perform operation +800026ec: 613d91b3 rol x3,x27,x19 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f0: 00082203 lw x4,0(x16) +800026f4: 00320863 beq x4,x3,80002704 +800026f8: 649022ef jal x5,80005540 +800026fc: 800026ec .word 0x800026ec +80002700: 8000cbf7 .word 0x8000cbf7 +80002704: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xfffffffe +80002708: 000aae83 lw x29,0(x21) +8000270c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xffffffff +80002710: 000aaa03 lw x20,0(x21) +80002714: 004a8a93 addi x21,x21,4 + +80002718 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + rol x26, x29, x20 # perform operation +80002718: 614e9d33 rol x26,x29,x20 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +8000271c: 00082203 lw x4,0(x16) +80002720: 01a20863 beq x4,x26,80002730 +80002724: 61d022ef jal x5,80005540 +80002728: 80002718 .word 0x80002718 +8000272c: 8000cc55 .word 0x8000cc55 +80002730: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xfffffffe +80002734: 000aa583 lw x11,0(x21) +80002738: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xfffffffe +8000273c: 000aa603 lw x12,0(x21) +80002740: 004a8a93 addi x21,x21,4 + +80002744 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + rol x8, x11, x12 # perform operation +80002744: 60c59433 rol x8,x11,x12 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002748: 00082203 lw x4,0(x16) +8000274c: 00820863 beq x4,x8,8000275c +80002750: 5f1022ef jal x5,80005540 +80002754: 80002744 .word 0x80002744 +80002758: 8000ccb3 .word 0x8000ccb3 +8000275c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xfffffffe +80002760: 000aa603 lw x12,0(x21) +80002764: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x5bbc8872 +80002768: 000aa083 lw x1,0(x21) +8000276c: 004a8a93 addi x21,x21,4 + +80002770 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + rol x22, x12, x1 # perform operation +80002770: 60161b33 rol x22,x12,x1 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002774: 00082203 lw x4,0(x16) +80002778: 01620863 beq x4,x22,80002788 +8000277c: 5c5022ef jal x5,80005540 +80002780: 80002770 .word 0x80002770 +80002784: 8000cd11 .word 0x8000cd11 +80002788: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xfffffffe +8000278c: 000aab83 lw x23,0(x21) +80002790: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0xaaaaaaaa +80002794: 000aae83 lw x29,0(x21) +80002798: 004a8a93 addi x21,x21,4 + +8000279c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + rol x9, x23, x29 # perform operation +8000279c: 61db94b3 rol x9,x23,x29 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a0: 00082203 lw x4,0(x16) +800027a4: 00920863 beq x4,x9,800027b4 +800027a8: 599022ef jal x5,80005540 +800027ac: 8000279c .word 0x8000279c +800027b0: 8000cd6f .word 0x8000cd6f +800027b4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xfffffffe +800027b8: 000aa783 lw x15,0(x21) +800027bc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x55555555 +800027c0: 000aaf03 lw x30,0(x21) +800027c4: 004a8a93 addi x21,x21,4 + +800027c8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + rol x18, x15, x30 # perform operation +800027c8: 61e79933 rol x18,x15,x30 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027cc: 00082203 lw x4,0(x16) +800027d0: 01220863 beq x4,x18,800027e0 +800027d4: 56d022ef jal x5,80005540 +800027d8: 800027c8 .word 0x800027c8 +800027dc: 8000cdcd .word 0x8000cdcd +800027e0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x5bbc8872 +800027e4: 000aa303 lw x6,0(x21) +800027e8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x00000000 +800027ec: 000aac03 lw x24,0(x21) +800027f0: 004a8a93 addi x21,x21,4 + +800027f4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + rol x11, x6, x24 # perform operation +800027f4: 618315b3 rol x11,x6,x24 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f8: 00082203 lw x4,0(x16) +800027fc: 00b20863 beq x4,x11,8000280c +80002800: 541022ef jal x5,80005540 +80002804: 800027f4 .word 0x800027f4 +80002808: 8000ce2b .word 0x8000ce2b +8000280c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x5bbc8872 +80002810: 000aa503 lw x10,0(x21) +80002814: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x00000001 +80002818: 000aa483 lw x9,0(x21) +8000281c: 004a8a93 addi x21,x21,4 + +80002820 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + rol x2, x10, x9 # perform operation +80002820: 60951133 rol x2,x10,x9 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002824: 00082203 lw x4,0(x16) +80002828: 00220863 beq x4,x2,80002838 +8000282c: 515022ef jal x5,80005540 +80002830: 80002820 .word 0x80002820 +80002834: 8000ce82 .word 0x8000ce82 +80002838: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x5bbc8872 +8000283c: 000aaf03 lw x30,0(x21) +80002840: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x00000002 +80002844: 000aac83 lw x25,0(x21) +80002848: 004a8a93 addi x21,x21,4 + +8000284c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + rol x9, x30, x25 # perform operation +8000284c: 619f14b3 rol x9,x30,x25 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002850: 00082203 lw x4,0(x16) +80002854: 00920863 beq x4,x9,80002864 +80002858: 4e9022ef jal x5,80005540 +8000285c: 8000284c .word 0x8000284c +80002860: 8000ced9 .word 0x8000ced9 +80002864: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x5bbc8872 +80002868: 000aab83 lw x23,0(x21) +8000286c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x80000000 +80002870: 000aa483 lw x9,0(x21) +80002874: 004a8a93 addi x21,x21,4 + +80002878 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + rol x30, x23, x9 # perform operation +80002878: 609b9f33 rol x30,x23,x9 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000287c: 00082203 lw x4,0(x16) +80002880: 01e20863 beq x4,x30,80002890 +80002884: 4bd022ef jal x5,80005540 +80002888: 80002878 .word 0x80002878 +8000288c: 8000cf30 .word 0x8000cf30 +80002890: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x5bbc8872 +80002894: 000aaa03 lw x20,0(x21) +80002898: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x80000001 +8000289c: 000aad03 lw x26,0(x21) +800028a0: 004a8a93 addi x21,x21,4 + +800028a4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + rol x30, x20, x26 # perform operation +800028a4: 61aa1f33 rol x30,x20,x26 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a8: 00082203 lw x4,0(x16) +800028ac: 01e20863 beq x4,x30,800028bc +800028b0: 491022ef jal x5,80005540 +800028b4: 800028a4 .word 0x800028a4 +800028b8: 8000cf8e .word 0x8000cf8e +800028bc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x5bbc8872 +800028c0: 000aa503 lw x10,0(x21) +800028c4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x7fffffff +800028c8: 000aab03 lw x22,0(x21) +800028cc: 004a8a93 addi x21,x21,4 + +800028d0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + rol x6, x10, x22 # perform operation +800028d0: 61651333 rol x6,x10,x22 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028d4: 00082203 lw x4,0(x16) +800028d8: 00620863 beq x4,x6,800028e8 +800028dc: 465022ef jal x5,80005540 +800028e0: 800028d0 .word 0x800028d0 +800028e4: 8000cfec .word 0x8000cfec +800028e8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x5bbc8872 +800028ec: 000aab83 lw x23,0(x21) +800028f0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x7ffffffe +800028f4: 000aa403 lw x8,0(x21) +800028f8: 004a8a93 addi x21,x21,4 + +800028fc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + rol x18, x23, x8 # perform operation +800028fc: 608b9933 rol x18,x23,x8 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002900: 00082203 lw x4,0(x16) +80002904: 01220863 beq x4,x18,80002914 +80002908: 439022ef jal x5,80005540 +8000290c: 800028fc .word 0x800028fc +80002910: 8000d04a .word 0x8000d04a +80002914: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x5bbc8872 +80002918: 000aad83 lw x27,0(x21) +8000291c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xffffffff +80002920: 000aa303 lw x6,0(x21) +80002924: 004a8a93 addi x21,x21,4 + +80002928 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + rol x25, x27, x6 # perform operation +80002928: 606d9cb3 rol x25,x27,x6 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000292c: 00082203 lw x4,0(x16) +80002930: 01920863 beq x4,x25,80002940 +80002934: 40d022ef jal x5,80005540 +80002938: 80002928 .word 0x80002928 +8000293c: 8000d0a8 .word 0x8000d0a8 +80002940: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x5bbc8872 +80002944: 000aac83 lw x25,0(x21) +80002948: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xfffffffe +8000294c: 000aad83 lw x27,0(x21) +80002950: 004a8a93 addi x21,x21,4 + +80002954 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + rol x3, x25, x27 # perform operation +80002954: 61bc91b3 rol x3,x25,x27 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002958: 00082203 lw x4,0(x16) +8000295c: 00320863 beq x4,x3,8000296c +80002960: 3e1022ef jal x5,80005540 +80002964: 80002954 .word 0x80002954 +80002968: 8000d106 .word 0x8000d106 +8000296c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x5bbc8872 +80002970: 000aa583 lw x11,0(x21) +80002974: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x5bbc8872 +80002978: 000aaa03 lw x20,0(x21) +8000297c: 004a8a93 addi x21,x21,4 + +80002980 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + rol x17, x11, x20 # perform operation +80002980: 614598b3 rol x17,x11,x20 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002984: 00082203 lw x4,0(x16) +80002988: 01120863 beq x4,x17,80002998 +8000298c: 3b5022ef jal x5,80005540 +80002990: 80002980 .word 0x80002980 +80002994: 8000d164 .word 0x8000d164 +80002998: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x5bbc8872 +8000299c: 000aaf03 lw x30,0(x21) +800029a0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0xaaaaaaaa +800029a4: 000aac03 lw x24,0(x21) +800029a8: 004a8a93 addi x21,x21,4 + +800029ac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + rol x9, x30, x24 # perform operation +800029ac: 618f14b3 rol x9,x30,x24 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b0: 00082203 lw x4,0(x16) +800029b4: 00920863 beq x4,x9,800029c4 +800029b8: 389022ef jal x5,80005540 +800029bc: 800029ac .word 0x800029ac +800029c0: 8000d1c2 .word 0x8000d1c2 +800029c4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x5bbc8872 +800029c8: 000aa383 lw x7,0(x21) +800029cc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x55555555 +800029d0: 000aa783 lw x15,0(x21) +800029d4: 004a8a93 addi x21,x21,4 + +800029d8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + rol x27, x7, x15 # perform operation +800029d8: 60f39db3 rol x27,x7,x15 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029dc: 00082203 lw x4,0(x16) +800029e0: 01b20863 beq x4,x27,800029f0 +800029e4: 35d022ef jal x5,80005540 +800029e8: 800029d8 .word 0x800029d8 +800029ec: 8000d220 .word 0x8000d220 +800029f0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xaaaaaaaa +800029f4: 000aa303 lw x6,0(x21) +800029f8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x00000000 +800029fc: 000aa883 lw x17,0(x21) +80002a00: 004a8a93 addi x21,x21,4 + +80002a04 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + rol x30, x6, x17 # perform operation +80002a04: 61131f33 rol x30,x6,x17 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a08: 00082203 lw x4,0(x16) +80002a0c: 01e20863 beq x4,x30,80002a1c +80002a10: 331022ef jal x5,80005540 +80002a14: 80002a04 .word 0x80002a04 +80002a18: 8000d27e .word 0x8000d27e +80002a1c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xaaaaaaaa +80002a20: 000aa883 lw x17,0(x21) +80002a24: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x00000001 +80002a28: 000aae83 lw x29,0(x21) +80002a2c: 004a8a93 addi x21,x21,4 + +80002a30 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + rol x27, x17, x29 # perform operation +80002a30: 61d89db3 rol x27,x17,x29 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a34: 00082203 lw x4,0(x16) +80002a38: 01b20863 beq x4,x27,80002a48 +80002a3c: 305022ef jal x5,80005540 +80002a40: 80002a30 .word 0x80002a30 +80002a44: 8000d2d5 .word 0x8000d2d5 +80002a48: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xaaaaaaaa +80002a4c: 000aa503 lw x10,0(x21) +80002a50: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x00000002 +80002a54: 000aa083 lw x1,0(x21) +80002a58: 004a8a93 addi x21,x21,4 + +80002a5c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + rol x29, x10, x1 # perform operation +80002a5c: 60151eb3 rol x29,x10,x1 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a60: 00082203 lw x4,0(x16) +80002a64: 01d20863 beq x4,x29,80002a74 +80002a68: 2d9022ef jal x5,80005540 +80002a6c: 80002a5c .word 0x80002a5c +80002a70: 8000d32c .word 0x8000d32c +80002a74: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xaaaaaaaa +80002a78: 000aa103 lw x2,0(x21) +80002a7c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x80000000 +80002a80: 000aa983 lw x19,0(x21) +80002a84: 004a8a93 addi x21,x21,4 + +80002a88 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + rol x8, x2, x19 # perform operation +80002a88: 61311433 rol x8,x2,x19 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a8c: 00082203 lw x4,0(x16) +80002a90: 00820863 beq x4,x8,80002aa0 +80002a94: 2ad022ef jal x5,80005540 +80002a98: 80002a88 .word 0x80002a88 +80002a9c: 8000d383 .word 0x8000d383 +80002aa0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xaaaaaaaa +80002aa4: 000aae03 lw x28,0(x21) +80002aa8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x80000001 +80002aac: 000aad83 lw x27,0(x21) +80002ab0: 004a8a93 addi x21,x21,4 + +80002ab4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + rol x9, x28, x27 # perform operation +80002ab4: 61be14b3 rol x9,x28,x27 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab8: 00082203 lw x4,0(x16) +80002abc: 00920863 beq x4,x9,80002acc +80002ac0: 281022ef jal x5,80005540 +80002ac4: 80002ab4 .word 0x80002ab4 +80002ac8: 8000d3e1 .word 0x8000d3e1 +80002acc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xaaaaaaaa +80002ad0: 000aab03 lw x22,0(x21) +80002ad4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x7fffffff +80002ad8: 000aa383 lw x7,0(x21) +80002adc: 004a8a93 addi x21,x21,4 + +80002ae0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + rol x11, x22, x7 # perform operation +80002ae0: 607b15b3 rol x11,x22,x7 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ae4: 00082203 lw x4,0(x16) +80002ae8: 00b20863 beq x4,x11,80002af8 +80002aec: 255022ef jal x5,80005540 +80002af0: 80002ae0 .word 0x80002ae0 +80002af4: 8000d43f .word 0x8000d43f +80002af8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xaaaaaaaa +80002afc: 000aac83 lw x25,0(x21) +80002b00: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x7ffffffe +80002b04: 000aa183 lw x3,0(x21) +80002b08: 004a8a93 addi x21,x21,4 + +80002b0c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + rol x7, x25, x3 # perform operation +80002b0c: 603c93b3 rol x7,x25,x3 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b10: 00082203 lw x4,0(x16) +80002b14: 00720863 beq x4,x7,80002b24 +80002b18: 229022ef jal x5,80005540 +80002b1c: 80002b0c .word 0x80002b0c +80002b20: 8000d49d .word 0x8000d49d +80002b24: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xaaaaaaaa +80002b28: 000aa983 lw x19,0(x21) +80002b2c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xffffffff +80002b30: 000aad83 lw x27,0(x21) +80002b34: 004a8a93 addi x21,x21,4 + +80002b38 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + rol x6, x19, x27 # perform operation +80002b38: 61b99333 rol x6,x19,x27 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b3c: 00082203 lw x4,0(x16) +80002b40: 00620863 beq x4,x6,80002b50 +80002b44: 1fd022ef jal x5,80005540 +80002b48: 80002b38 .word 0x80002b38 +80002b4c: 8000d4fb .word 0x8000d4fb +80002b50: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xaaaaaaaa +80002b54: 000aac03 lw x24,0(x21) +80002b58: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xfffffffe +80002b5c: 000aa583 lw x11,0(x21) +80002b60: 004a8a93 addi x21,x21,4 + +80002b64 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + rol x25, x24, x11 # perform operation +80002b64: 60bc1cb3 rol x25,x24,x11 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b68: 00082203 lw x4,0(x16) +80002b6c: 01920863 beq x4,x25,80002b7c +80002b70: 1d1022ef jal x5,80005540 +80002b74: 80002b64 .word 0x80002b64 +80002b78: 8000d559 .word 0x8000d559 +80002b7c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xaaaaaaaa +80002b80: 000aab83 lw x23,0(x21) +80002b84: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x5bbc8872 +80002b88: 000aa783 lw x15,0(x21) +80002b8c: 004a8a93 addi x21,x21,4 + +80002b90 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + rol x3, x23, x15 # perform operation +80002b90: 60fb91b3 rol x3,x23,x15 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b94: 00082203 lw x4,0(x16) +80002b98: 00320863 beq x4,x3,80002ba8 +80002b9c: 1a5022ef jal x5,80005540 +80002ba0: 80002b90 .word 0x80002b90 +80002ba4: 8000d5b7 .word 0x8000d5b7 +80002ba8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xaaaaaaaa +80002bac: 000aaa03 lw x20,0(x21) +80002bb0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xaaaaaaaa +80002bb4: 000aa383 lw x7,0(x21) +80002bb8: 004a8a93 addi x21,x21,4 + +80002bbc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + rol x2, x20, x7 # perform operation +80002bbc: 607a1133 rol x2,x20,x7 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc0: 00082203 lw x4,0(x16) +80002bc4: 00220863 beq x4,x2,80002bd4 +80002bc8: 179022ef jal x5,80005540 +80002bcc: 80002bbc .word 0x80002bbc +80002bd0: 8000d615 .word 0x8000d615 +80002bd4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xaaaaaaaa +80002bd8: 000aad03 lw x26,0(x21) +80002bdc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x55555555 +80002be0: 000aa983 lw x19,0(x21) +80002be4: 004a8a93 addi x21,x21,4 + +80002be8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + rol x31, x26, x19 # perform operation +80002be8: 613d1fb3 rol x31,x26,x19 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bec: 00082203 lw x4,0(x16) +80002bf0: 01f20863 beq x4,x31,80002c00 +80002bf4: 14d022ef jal x5,80005540 +80002bf8: 80002be8 .word 0x80002be8 +80002bfc: 8000d673 .word 0x8000d673 +80002c00: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x55555555 +80002c04: 000aa403 lw x8,0(x21) +80002c08: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x00000000 +80002c0c: 000aae03 lw x28,0(x21) +80002c10: 004a8a93 addi x21,x21,4 + +80002c14 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + rol x24, x8, x28 # perform operation +80002c14: 61c41c33 rol x24,x8,x28 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c18: 00082203 lw x4,0(x16) +80002c1c: 01820863 beq x4,x24,80002c2c +80002c20: 121022ef jal x5,80005540 +80002c24: 80002c14 .word 0x80002c14 +80002c28: 8000d6d1 .word 0x8000d6d1 +80002c2c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x55555555 +80002c30: 000aac83 lw x25,0(x21) +80002c34: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x00000001 +80002c38: 000aa083 lw x1,0(x21) +80002c3c: 004a8a93 addi x21,x21,4 + +80002c40 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + rol x15, x25, x1 # perform operation +80002c40: 601c97b3 rol x15,x25,x1 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c44: 00082203 lw x4,0(x16) +80002c48: 00f20863 beq x4,x15,80002c58 +80002c4c: 0f5022ef jal x5,80005540 +80002c50: 80002c40 .word 0x80002c40 +80002c54: 8000d728 .word 0x8000d728 +80002c58: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x55555555 +80002c5c: 000aa783 lw x15,0(x21) +80002c60: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x00000002 +80002c64: 000aad03 lw x26,0(x21) +80002c68: 004a8a93 addi x21,x21,4 + +80002c6c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + rol x30, x15, x26 # perform operation +80002c6c: 61a79f33 rol x30,x15,x26 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c70: 00082203 lw x4,0(x16) +80002c74: 01e20863 beq x4,x30,80002c84 +80002c78: 0c9022ef jal x5,80005540 +80002c7c: 80002c6c .word 0x80002c6c +80002c80: 8000d77f .word 0x8000d77f +80002c84: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x55555555 +80002c88: 000aa483 lw x9,0(x21) +80002c8c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x80000000 +80002c90: 000aab83 lw x23,0(x21) +80002c94: 004a8a93 addi x21,x21,4 + +80002c98 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + rol x20, x9, x23 # perform operation +80002c98: 61749a33 rol x20,x9,x23 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c9c: 00082203 lw x4,0(x16) +80002ca0: 01420863 beq x4,x20,80002cb0 +80002ca4: 09d022ef jal x5,80005540 +80002ca8: 80002c98 .word 0x80002c98 +80002cac: 8000d7d6 .word 0x8000d7d6 +80002cb0: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x55555555 +80002cb4: 000aaa03 lw x20,0(x21) +80002cb8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x80000001 +80002cbc: 000aad83 lw x27,0(x21) +80002cc0: 004a8a93 addi x21,x21,4 + +80002cc4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + rol x15, x20, x27 # perform operation +80002cc4: 61ba17b3 rol x15,x20,x27 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc8: 00082203 lw x4,0(x16) +80002ccc: 00f20863 beq x4,x15,80002cdc +80002cd0: 071022ef jal x5,80005540 +80002cd4: 80002cc4 .word 0x80002cc4 +80002cd8: 8000d834 .word 0x8000d834 +80002cdc: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x55555555 +80002ce0: 000aa903 lw x18,0(x21) +80002ce4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x7fffffff +80002ce8: 000aa703 lw x14,0(x21) +80002cec: 004a8a93 addi x21,x21,4 + +80002cf0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + rol x19, x18, x14 # perform operation +80002cf0: 60e919b3 rol x19,x18,x14 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cf4: 00082203 lw x4,0(x16) +80002cf8: 01320863 beq x4,x19,80002d08 +80002cfc: 045022ef jal x5,80005540 +80002d00: 80002cf0 .word 0x80002cf0 +80002d04: 8000d892 .word 0x8000d892 +80002d08: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x55555555 +80002d0c: 000aa983 lw x19,0(x21) +80002d10: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x7ffffffe +80002d14: 000aae83 lw x29,0(x21) +80002d18: 004a8a93 addi x21,x21,4 + +80002d1c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + rol x6, x19, x29 # perform operation +80002d1c: 61d99333 rol x6,x19,x29 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d20: 00082203 lw x4,0(x16) +80002d24: 00620863 beq x4,x6,80002d34 +80002d28: 019022ef jal x5,80005540 +80002d2c: 80002d1c .word 0x80002d1c +80002d30: 8000d8f0 .word 0x8000d8f0 +80002d34: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x55555555 +80002d38: 000aac03 lw x24,0(x21) +80002d3c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xffffffff +80002d40: 000aa383 lw x7,0(x21) +80002d44: 004a8a93 addi x21,x21,4 + +80002d48 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + rol x22, x24, x7 # perform operation +80002d48: 607c1b33 rol x22,x24,x7 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d4c: 00082203 lw x4,0(x16) +80002d50: 01620863 beq x4,x22,80002d60 +80002d54: 7ec022ef jal x5,80005540 +80002d58: 80002d48 .word 0x80002d48 +80002d5c: 8000d94e .word 0x8000d94e +80002d60: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x55555555 +80002d64: 000aa883 lw x17,0(x21) +80002d68: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0xfffffffe +80002d6c: 000aab83 lw x23,0(x21) +80002d70: 004a8a93 addi x21,x21,4 + +80002d74 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + rol x10, x17, x23 # perform operation +80002d74: 61789533 rol x10,x17,x23 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d78: 00082203 lw x4,0(x16) +80002d7c: 00a20863 beq x4,x10,80002d8c +80002d80: 7c0022ef jal x5,80005540 +80002d84: 80002d74 .word 0x80002d74 +80002d88: 8000d9ac .word 0x8000d9ac +80002d8c: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x55555555 +80002d90: 000aab03 lw x22,0(x21) +80002d94: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x5bbc8872 +80002d98: 000aa783 lw x15,0(x21) +80002d9c: 004a8a93 addi x21,x21,4 + +80002da0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + rol x12, x22, x15 # perform operation +80002da0: 60fb1633 rol x12,x22,x15 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002da4: 00082203 lw x4,0(x16) +80002da8: 00c20863 beq x4,x12,80002db8 +80002dac: 794022ef jal x5,80005540 +80002db0: 80002da0 .word 0x80002da0 +80002db4: 8000da0a .word 0x8000da0a +80002db8: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x55555555 +80002dbc: 000aa703 lw x14,0(x21) +80002dc0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xaaaaaaaa +80002dc4: 000aaf03 lw x30,0(x21) +80002dc8: 004a8a93 addi x21,x21,4 + +80002dcc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + rol x25, x14, x30 # perform operation +80002dcc: 61e71cb3 rol x25,x14,x30 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd0: 00082203 lw x4,0(x16) +80002dd4: 01920863 beq x4,x25,80002de4 +80002dd8: 768022ef jal x5,80005540 +80002ddc: 80002dcc .word 0x80002dcc +80002de0: 8000da68 .word 0x8000da68 +80002de4: 00480813 addi x16,x16,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x55555555 +80002de8: 000aac03 lw x24,0(x21) +80002dec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x55555555 +80002df0: 000aab03 lw x22,0(x21) +80002df4: 004a8a93 addi x21,x21,4 + +80002df8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + rol x2, x24, x22 # perform operation +80002df8: 616c1133 rol x2,x24,x22 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002dfc: 00082203 lw x4,0(x16) +80002e00: 00220863 beq x4,x2,80002e10 +80002e04: 73c022ef jal x5,80005540 +80002e08: 80002df8 .word 0x80002df8 +80002e0c: 8000dac6 .word 0x8000dac6 +80002e10: 00480813 addi x16,x16,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x537fb57d +80002e14: 000aa003 lw x0,0(x21) +80002e18: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x946f537d +80002e1c: 000aa003 lw x0,0(x21) +80002e20: 004a8a93 addi x21,x21,4 + +80002e24 : +Zbkb_rol_cg_cmp_rs1_rs2_b0: + rol x24, x0, x0 # perform operation +80002e24: 60001c33 rol x24,x0,x0 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkb_rol_cg_cmp_rs1_rs2_b0, Zbkb_rol_cg_cmp_rs1_rs2_b0_str) +80002e28: 00082203 lw x4,0(x16) +80002e2c: 01820863 beq x4,x24,80002e3c +80002e30: 710022ef jal x5,80005540 +80002e34: 80002e24 .word 0x80002e24 +80002e38: 8000db24 .word 0x8000db24 +80002e3c: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xb8ff3645 +80002e40: 000aa083 lw x1,0(x21) +80002e44: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x1f2a8540 +80002e48: 000aa083 lw x1,0(x21) +80002e4c: 004a8a93 addi x21,x21,4 + +80002e50 : +Zbkb_rol_cg_cmp_rs1_rs2_b1: + rol x25, x1, x1 # perform operation +80002e50: 60109cb3 rol x25,x1,x1 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkb_rol_cg_cmp_rs1_rs2_b1, Zbkb_rol_cg_cmp_rs1_rs2_b1_str) +80002e54: 00082203 lw x4,0(x16) +80002e58: 01920863 beq x4,x25,80002e68 +80002e5c: 6e4022ef jal x5,80005540 +80002e60: 80002e50 .word 0x80002e50 +80002e64: 8000db5b .word 0x8000db5b +80002e68: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xd5ab893d +80002e6c: 000aa103 lw x2,0(x21) +80002e70: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x5e84da9d +80002e74: 000aa103 lw x2,0(x21) +80002e78: 004a8a93 addi x21,x21,4 + +80002e7c : +Zbkb_rol_cg_cmp_rs1_rs2_b2: + rol x27, x2, x2 # perform operation +80002e7c: 60211db3 rol x27,x2,x2 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkb_rol_cg_cmp_rs1_rs2_b2, Zbkb_rol_cg_cmp_rs1_rs2_b2_str) +80002e80: 00082203 lw x4,0(x16) +80002e84: 01b20863 beq x4,x27,80002e94 +80002e88: 6b8022ef jal x5,80005540 +80002e8c: 80002e7c .word 0x80002e7c +80002e90: 8000db92 .word 0x8000db92 +80002e94: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x643a53f9 +80002e98: 000aa183 lw x3,0(x21) +80002e9c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x65b20d30 +80002ea0: 000aa183 lw x3,0(x21) +80002ea4: 004a8a93 addi x21,x21,4 + +80002ea8 : +Zbkb_rol_cg_cmp_rs1_rs2_b3: + rol x31, x3, x3 # perform operation +80002ea8: 60319fb3 rol x31,x3,x3 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkb_rol_cg_cmp_rs1_rs2_b3, Zbkb_rol_cg_cmp_rs1_rs2_b3_str) +80002eac: 00082203 lw x4,0(x16) +80002eb0: 01f20863 beq x4,x31,80002ec0 +80002eb4: 68c022ef jal x5,80005540 +80002eb8: 80002ea8 .word 0x80002ea8 +80002ebc: 8000dbc9 .word 0x8000dbc9 +80002ec0: 00480813 addi x16,x16,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002ec4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002ec8: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x89e9b0f4 +80002ecc: 000aa203 lw x4,0(x21) +80002ed0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x54533aec +80002ed4: 000aa203 lw x4,0(x21) +80002ed8: 004a8a93 addi x21,x21,4 + +80002edc : +Zbkb_rol_cg_cmp_rs1_rs2_b4: + rol x8, x4, x4 # perform operation +80002edc: 60421433 rol x8,x4,x4 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zbkb_rol_cg_cmp_rs1_rs2_b4, Zbkb_rol_cg_cmp_rs1_rs2_b4_str) +80002ee0: 00082683 lw x13,0(x16) +80002ee4: 00868863 beq x13,x8,80002ef4 +80002ee8: 6980276f jal x14,80005580 +80002eec: 80002edc .word 0x80002edc +80002ef0: 8000dc00 .word 0x8000dc00 +80002ef4: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xcb735bd8 +80002ef8: 000aa283 lw x5,0(x21) +80002efc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x7ce6dade +80002f00: 000aa283 lw x5,0(x21) +80002f04: 004a8a93 addi x21,x21,4 + +80002f08 : +Zbkb_rol_cg_cmp_rs1_rs2_b5: + rol x27, x5, x5 # perform operation +80002f08: 60529db3 rol x27,x5,x5 + # Check if x27 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x27, Zbkb_rol_cg_cmp_rs1_rs2_b5, Zbkb_rol_cg_cmp_rs1_rs2_b5_str) +80002f0c: 00082683 lw x13,0(x16) +80002f10: 01b68863 beq x13,x27,80002f20 +80002f14: 66c0276f jal x14,80005580 +80002f18: 80002f08 .word 0x80002f08 +80002f1c: 8000dc37 .word 0x8000dc37 +80002f20: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x4cdd38a1 +80002f24: 000aa303 lw x6,0(x21) +80002f28: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x34291d0d +80002f2c: 000aa303 lw x6,0(x21) +80002f30: 004a8a93 addi x21,x21,4 + +80002f34 : +Zbkb_rol_cg_cmp_rs1_rs2_b6: + rol x26, x6, x6 # perform operation +80002f34: 60631d33 rol x26,x6,x6 + # Check if x26 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x26, Zbkb_rol_cg_cmp_rs1_rs2_b6, Zbkb_rol_cg_cmp_rs1_rs2_b6_str) +80002f38: 00082683 lw x13,0(x16) +80002f3c: 01a68863 beq x13,x26,80002f4c +80002f40: 6400276f jal x14,80005580 +80002f44: 80002f34 .word 0x80002f34 +80002f48: 8000dc6e .word 0x8000dc6e +80002f4c: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x04ff83be +80002f50: 000aa383 lw x7,0(x21) +80002f54: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xe6b0492c +80002f58: 000aa383 lw x7,0(x21) +80002f5c: 004a8a93 addi x21,x21,4 + +80002f60 : +Zbkb_rol_cg_cmp_rs1_rs2_b7: + rol x3, x7, x7 # perform operation +80002f60: 607391b3 rol x3,x7,x7 + # Check if x3 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x3, Zbkb_rol_cg_cmp_rs1_rs2_b7, Zbkb_rol_cg_cmp_rs1_rs2_b7_str) +80002f64: 00082683 lw x13,0(x16) +80002f68: 00368863 beq x13,x3,80002f78 +80002f6c: 6140276f jal x14,80005580 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 8000dca5 .word 0x8000dca5 +80002f78: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x1fb54841 +80002f7c: 000aa403 lw x8,0(x21) +80002f80: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x653e0727 +80002f84: 000aa403 lw x8,0(x21) +80002f88: 004a8a93 addi x21,x21,4 + +80002f8c : +Zbkb_rol_cg_cmp_rs1_rs2_b8: + rol x9, x8, x8 # perform operation +80002f8c: 608414b3 rol x9,x8,x8 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zbkb_rol_cg_cmp_rs1_rs2_b8, Zbkb_rol_cg_cmp_rs1_rs2_b8_str) +80002f90: 00082683 lw x13,0(x16) +80002f94: 00968863 beq x13,x9,80002fa4 +80002f98: 5e80276f jal x14,80005580 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 8000dcdc .word 0x8000dcdc +80002fa4: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x1c2e071c +80002fa8: 000aa483 lw x9,0(x21) +80002fac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xa8040363 +80002fb0: 000aa483 lw x9,0(x21) +80002fb4: 004a8a93 addi x21,x21,4 + +80002fb8 : +Zbkb_rol_cg_cmp_rs1_rs2_b9: + rol x3, x9, x9 # perform operation +80002fb8: 609491b3 rol x3,x9,x9 + # Check if x3 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x3, Zbkb_rol_cg_cmp_rs1_rs2_b9, Zbkb_rol_cg_cmp_rs1_rs2_b9_str) +80002fbc: 00082683 lw x13,0(x16) +80002fc0: 00368863 beq x13,x3,80002fd0 +80002fc4: 5bc0276f jal x14,80005580 +80002fc8: 80002fb8 .word 0x80002fb8 +80002fcc: 8000dd13 .word 0x8000dd13 +80002fd0: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x44fd1184 +80002fd4: 000aa503 lw x10,0(x21) +80002fd8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x2bdc4536 +80002fdc: 000aa503 lw x10,0(x21) +80002fe0: 004a8a93 addi x21,x21,4 + +80002fe4 : +Zbkb_rol_cg_cmp_rs1_rs2_b10: + rol x31, x10, x10 # perform operation +80002fe4: 60a51fb3 rol x31,x10,x10 + # Check if x31 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x31, Zbkb_rol_cg_cmp_rs1_rs2_b10, Zbkb_rol_cg_cmp_rs1_rs2_b10_str) +80002fe8: 00082683 lw x13,0(x16) +80002fec: 01f68863 beq x13,x31,80002ffc +80002ff0: 5900276f jal x14,80005580 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 8000dd4a .word 0x8000dd4a +80002ffc: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x95e0b6b4 +80003000: 000aa583 lw x11,0(x21) +80003004: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x96b1dc68 +80003008: 000aa583 lw x11,0(x21) +8000300c: 004a8a93 addi x21,x21,4 + +80003010 : +Zbkb_rol_cg_cmp_rs1_rs2_b11: + rol x0, x11, x11 # perform operation +80003010: 60b59033 rol x0,x11,x11 + # Check if x0 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x0, Zbkb_rol_cg_cmp_rs1_rs2_b11, Zbkb_rol_cg_cmp_rs1_rs2_b11_str) +80003014: 00082683 lw x13,0(x16) +80003018: 00068863 beq x13,x0,80003028 +8000301c: 5640276f jal x14,80005580 +80003020: 80003010 .word 0x80003010 +80003024: 8000dd82 .word 0x8000dd82 +80003028: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xf9ff2013 +8000302c: 000aa603 lw x12,0(x21) +80003030: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x1c97277f +80003034: 000aa603 lw x12,0(x21) +80003038: 004a8a93 addi x21,x21,4 + +8000303c : +Zbkb_rol_cg_cmp_rs1_rs2_b12: + rol x0, x12, x12 # perform operation +8000303c: 60c61033 rol x0,x12,x12 + # Check if x0 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x0, Zbkb_rol_cg_cmp_rs1_rs2_b12, Zbkb_rol_cg_cmp_rs1_rs2_b12_str) +80003040: 00082683 lw x13,0(x16) +80003044: 00068863 beq x13,x0,80003054 +80003048: 5380276f jal x14,80005580 +8000304c: 8000303c .word 0x8000303c +80003050: 8000ddba .word 0x8000ddba +80003054: 00480813 addi x16,x16,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003058: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000305c: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xa476ddc7 +80003060: 000aa683 lw x13,0(x21) +80003064: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x58b25f1c +80003068: 000aa683 lw x13,0(x21) +8000306c: 004a8a93 addi x21,x21,4 + +80003070 : +Zbkb_rol_cg_cmp_rs1_rs2_b13: + rol x17, x13, x13 # perform operation +80003070: 60d698b3 rol x17,x13,x13 + # Check if x17 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x17, Zbkb_rol_cg_cmp_rs1_rs2_b13, Zbkb_rol_cg_cmp_rs1_rs2_b13_str) +80003074: 00082383 lw x7,0(x16) +80003078: 01138863 beq x7,x17,80003088 +8000307c: 4dc0246f jal x8,80005558 +80003080: 80003070 .word 0x80003070 +80003084: 8000ddf2 .word 0x8000ddf2 +80003088: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xff4148ae +8000308c: 000aa703 lw x14,0(x21) +80003090: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x23b1e127 +80003094: 000aa703 lw x14,0(x21) +80003098: 004a8a93 addi x21,x21,4 + +8000309c : +Zbkb_rol_cg_cmp_rs1_rs2_b14: + rol x5, x14, x14 # perform operation +8000309c: 60e712b3 rol x5,x14,x14 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkb_rol_cg_cmp_rs1_rs2_b14, Zbkb_rol_cg_cmp_rs1_rs2_b14_str) +800030a0: 00082383 lw x7,0(x16) +800030a4: 00538863 beq x7,x5,800030b4 +800030a8: 4b00246f jal x8,80005558 +800030ac: 8000309c .word 0x8000309c +800030b0: 8000de2a .word 0x8000de2a +800030b4: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xf726a8fd +800030b8: 000aa783 lw x15,0(x21) +800030bc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x6f52d7dd +800030c0: 000aa783 lw x15,0(x21) +800030c4: 004a8a93 addi x21,x21,4 + +800030c8 : +Zbkb_rol_cg_cmp_rs1_rs2_b15: + rol x29, x15, x15 # perform operation +800030c8: 60f79eb3 rol x29,x15,x15 + # Check if x29 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x29, Zbkb_rol_cg_cmp_rs1_rs2_b15, Zbkb_rol_cg_cmp_rs1_rs2_b15_str) +800030cc: 00082383 lw x7,0(x16) +800030d0: 01d38863 beq x7,x29,800030e0 +800030d4: 4840246f jal x8,80005558 +800030d8: 800030c8 .word 0x800030c8 +800030dc: 8000de62 .word 0x8000de62 +800030e0: 00480813 addi x16,x16,4 + + mv x6, x16 # switch signature pointer register to avoid conflict with test +800030e4: 00080313 addi x6,x16,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xf514b694 +800030e8: 000aa803 lw x16,0(x21) +800030ec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x16e007b9 +800030f0: 000aa803 lw x16,0(x21) +800030f4: 004a8a93 addi x21,x21,4 + +800030f8 : +Zbkb_rol_cg_cmp_rs1_rs2_b16: + rol x2, x16, x16 # perform operation +800030f8: 61081133 rol x2,x16,x16 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkb_rol_cg_cmp_rs1_rs2_b16, Zbkb_rol_cg_cmp_rs1_rs2_b16_str) +800030fc: 00032383 lw x7,0(x6) +80003100: 00238863 beq x7,x2,80003110 +80003104: 4540246f jal x8,80005558 +80003108: 800030f8 .word 0x800030f8 +8000310c: 8000de9a .word 0x8000de9a +80003110: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x3ef3e68e +80003114: 000aa883 lw x17,0(x21) +80003118: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x362574d7 +8000311c: 000aa883 lw x17,0(x21) +80003120: 004a8a93 addi x21,x21,4 + +80003124 : +Zbkb_rol_cg_cmp_rs1_rs2_b17: + rol x10, x17, x17 # perform operation +80003124: 61189533 rol x10,x17,x17 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkb_rol_cg_cmp_rs1_rs2_b17, Zbkb_rol_cg_cmp_rs1_rs2_b17_str) +80003128: 00032383 lw x7,0(x6) +8000312c: 00a38863 beq x7,x10,8000313c +80003130: 4280246f jal x8,80005558 +80003134: 80003124 .word 0x80003124 +80003138: 8000ded2 .word 0x8000ded2 +8000313c: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xc20a979c +80003140: 000aa903 lw x18,0(x21) +80003144: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x0488180d +80003148: 000aa903 lw x18,0(x21) +8000314c: 004a8a93 addi x21,x21,4 + +80003150 : +Zbkb_rol_cg_cmp_rs1_rs2_b18: + rol x10, x18, x18 # perform operation +80003150: 61291533 rol x10,x18,x18 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkb_rol_cg_cmp_rs1_rs2_b18, Zbkb_rol_cg_cmp_rs1_rs2_b18_str) +80003154: 00032383 lw x7,0(x6) +80003158: 00a38863 beq x7,x10,80003168 +8000315c: 3fc0246f jal x8,80005558 +80003160: 80003150 .word 0x80003150 +80003164: 8000df0a .word 0x8000df0a +80003168: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x645df1dd +8000316c: 000aa983 lw x19,0(x21) +80003170: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x6c7a75e7 +80003174: 000aa983 lw x19,0(x21) +80003178: 004a8a93 addi x21,x21,4 + +8000317c : +Zbkb_rol_cg_cmp_rs1_rs2_b19: + rol x15, x19, x19 # perform operation +8000317c: 613997b3 rol x15,x19,x19 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkb_rol_cg_cmp_rs1_rs2_b19, Zbkb_rol_cg_cmp_rs1_rs2_b19_str) +80003180: 00032383 lw x7,0(x6) +80003184: 00f38863 beq x7,x15,80003194 +80003188: 3d00246f jal x8,80005558 +8000318c: 8000317c .word 0x8000317c +80003190: 8000df42 .word 0x8000df42 +80003194: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x5502e801 +80003198: 000aaa03 lw x20,0(x21) +8000319c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x51845b66 +800031a0: 000aaa03 lw x20,0(x21) +800031a4: 004a8a93 addi x21,x21,4 + +800031a8 : +Zbkb_rol_cg_cmp_rs1_rs2_b20: + rol x12, x20, x20 # perform operation +800031a8: 614a1633 rol x12,x20,x20 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkb_rol_cg_cmp_rs1_rs2_b20, Zbkb_rol_cg_cmp_rs1_rs2_b20_str) +800031ac: 00032383 lw x7,0(x6) +800031b0: 00c38863 beq x7,x12,800031c0 +800031b4: 3a40246f jal x8,80005558 +800031b8: 800031a8 .word 0x800031a8 +800031bc: 8000df7a .word 0x8000df7a +800031c0: 00430313 addi x6,x6,4 + + mv x9, x21 # switch data pointer register to avoid conflict with test +800031c4: 000a8493 addi x9,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x53b7ec99 +800031c8: 0004aa83 lw x21,0(x9) +800031cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x2860049e +800031d0: 0004aa83 lw x21,0(x9) +800031d4: 00448493 addi x9,x9,4 + +800031d8 : +Zbkb_rol_cg_cmp_rs1_rs2_b21: + rol x29, x21, x21 # perform operation +800031d8: 615a9eb3 rol x29,x21,x21 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkb_rol_cg_cmp_rs1_rs2_b21, Zbkb_rol_cg_cmp_rs1_rs2_b21_str) +800031dc: 00032383 lw x7,0(x6) +800031e0: 01d38863 beq x7,x29,800031f0 +800031e4: 3740246f jal x8,80005558 +800031e8: 800031d8 .word 0x800031d8 +800031ec: 8000dfb2 .word 0x8000dfb2 +800031f0: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x1c0f3162 +800031f4: 0004ab03 lw x22,0(x9) +800031f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xc0544aa5 +800031fc: 0004ab03 lw x22,0(x9) +80003200: 00448493 addi x9,x9,4 + +80003204 : +Zbkb_rol_cg_cmp_rs1_rs2_b22: + rol x31, x22, x22 # perform operation +80003204: 616b1fb3 rol x31,x22,x22 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkb_rol_cg_cmp_rs1_rs2_b22, Zbkb_rol_cg_cmp_rs1_rs2_b22_str) +80003208: 00032383 lw x7,0(x6) +8000320c: 01f38863 beq x7,x31,8000321c +80003210: 3480246f jal x8,80005558 +80003214: 80003204 .word 0x80003204 +80003218: 8000dfea .word 0x8000dfea +8000321c: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x4e6511e2 +80003220: 0004ab83 lw x23,0(x9) +80003224: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x07cab002 +80003228: 0004ab83 lw x23,0(x9) +8000322c: 00448493 addi x9,x9,4 + +80003230 : +Zbkb_rol_cg_cmp_rs1_rs2_b23: + rol x16, x23, x23 # perform operation +80003230: 617b9833 rol x16,x23,x23 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkb_rol_cg_cmp_rs1_rs2_b23, Zbkb_rol_cg_cmp_rs1_rs2_b23_str) +80003234: 00032383 lw x7,0(x6) +80003238: 01038863 beq x7,x16,80003248 +8000323c: 31c0246f jal x8,80005558 +80003240: 80003230 .word 0x80003230 +80003244: 8000e022 .word 0x8000e022 +80003248: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x39736a4d +8000324c: 0004ac03 lw x24,0(x9) +80003250: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xe618de8e +80003254: 0004ac03 lw x24,0(x9) +80003258: 00448493 addi x9,x9,4 + +8000325c : +Zbkb_rol_cg_cmp_rs1_rs2_b24: + rol x15, x24, x24 # perform operation +8000325c: 618c17b3 rol x15,x24,x24 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkb_rol_cg_cmp_rs1_rs2_b24, Zbkb_rol_cg_cmp_rs1_rs2_b24_str) +80003260: 00032383 lw x7,0(x6) +80003264: 00f38863 beq x7,x15,80003274 +80003268: 2f00246f jal x8,80005558 +8000326c: 8000325c .word 0x8000325c +80003270: 8000e05a .word 0x8000e05a +80003274: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xc8c8488a +80003278: 0004ac83 lw x25,0(x9) +8000327c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x8fc820c9 +80003280: 0004ac83 lw x25,0(x9) +80003284: 00448493 addi x9,x9,4 + +80003288 : +Zbkb_rol_cg_cmp_rs1_rs2_b25: + rol x14, x25, x25 # perform operation +80003288: 619c9733 rol x14,x25,x25 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkb_rol_cg_cmp_rs1_rs2_b25, Zbkb_rol_cg_cmp_rs1_rs2_b25_str) +8000328c: 00032383 lw x7,0(x6) +80003290: 00e38863 beq x7,x14,800032a0 +80003294: 2c40246f jal x8,80005558 +80003298: 80003288 .word 0x80003288 +8000329c: 8000e092 .word 0x8000e092 +800032a0: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x6dff9992 +800032a4: 0004ad03 lw x26,0(x9) +800032a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x997fe28d +800032ac: 0004ad03 lw x26,0(x9) +800032b0: 00448493 addi x9,x9,4 + +800032b4 : +Zbkb_rol_cg_cmp_rs1_rs2_b26: + rol x30, x26, x26 # perform operation +800032b4: 61ad1f33 rol x30,x26,x26 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkb_rol_cg_cmp_rs1_rs2_b26, Zbkb_rol_cg_cmp_rs1_rs2_b26_str) +800032b8: 00032383 lw x7,0(x6) +800032bc: 01e38863 beq x7,x30,800032cc +800032c0: 2980246f jal x8,80005558 +800032c4: 800032b4 .word 0x800032b4 +800032c8: 8000e0ca .word 0x8000e0ca +800032cc: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x76886d29 +800032d0: 0004ad83 lw x27,0(x9) +800032d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x331acb59 +800032d8: 0004ad83 lw x27,0(x9) +800032dc: 00448493 addi x9,x9,4 + +800032e0 : +Zbkb_rol_cg_cmp_rs1_rs2_b27: + rol x3, x27, x27 # perform operation +800032e0: 61bd91b3 rol x3,x27,x27 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkb_rol_cg_cmp_rs1_rs2_b27, Zbkb_rol_cg_cmp_rs1_rs2_b27_str) +800032e4: 00032383 lw x7,0(x6) +800032e8: 00338863 beq x7,x3,800032f8 +800032ec: 26c0246f jal x8,80005558 +800032f0: 800032e0 .word 0x800032e0 +800032f4: 8000e102 .word 0x8000e102 +800032f8: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xa8500e2d +800032fc: 0004ae03 lw x28,0(x9) +80003300: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x81503c8b +80003304: 0004ae03 lw x28,0(x9) +80003308: 00448493 addi x9,x9,4 + +8000330c : +Zbkb_rol_cg_cmp_rs1_rs2_b28: + rol x4, x28, x28 # perform operation +8000330c: 61ce1233 rol x4,x28,x28 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkb_rol_cg_cmp_rs1_rs2_b28, Zbkb_rol_cg_cmp_rs1_rs2_b28_str) +80003310: 00032383 lw x7,0(x6) +80003314: 00438863 beq x7,x4,80003324 +80003318: 2400246f jal x8,80005558 +8000331c: 8000330c .word 0x8000330c +80003320: 8000e13a .word 0x8000e13a +80003324: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x660c9aac +80003328: 0004ae83 lw x29,0(x9) +8000332c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7afd3917 +80003330: 0004ae83 lw x29,0(x9) +80003334: 00448493 addi x9,x9,4 + +80003338 : +Zbkb_rol_cg_cmp_rs1_rs2_b29: + rol x3, x29, x29 # perform operation +80003338: 61de91b3 rol x3,x29,x29 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkb_rol_cg_cmp_rs1_rs2_b29, Zbkb_rol_cg_cmp_rs1_rs2_b29_str) +8000333c: 00032383 lw x7,0(x6) +80003340: 00338863 beq x7,x3,80003350 +80003344: 2140246f jal x8,80005558 +80003348: 80003338 .word 0x80003338 +8000334c: 8000e172 .word 0x8000e172 +80003350: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x6f9ceda8 +80003354: 0004af03 lw x30,0(x9) +80003358: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x43151d58 +8000335c: 0004af03 lw x30,0(x9) +80003360: 00448493 addi x9,x9,4 + +80003364 : +Zbkb_rol_cg_cmp_rs1_rs2_b30: + rol x29, x30, x30 # perform operation +80003364: 61ef1eb3 rol x29,x30,x30 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkb_rol_cg_cmp_rs1_rs2_b30, Zbkb_rol_cg_cmp_rs1_rs2_b30_str) +80003368: 00032383 lw x7,0(x6) +8000336c: 01d38863 beq x7,x29,8000337c +80003370: 1e80246f jal x8,80005558 +80003374: 80003364 .word 0x80003364 +80003378: 8000e1aa .word 0x8000e1aa +8000337c: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xb4d125e7 +80003380: 0004af83 lw x31,0(x9) +80003384: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x21dd0ebb +80003388: 0004af83 lw x31,0(x9) +8000338c: 00448493 addi x9,x9,4 + +80003390 : +Zbkb_rol_cg_cmp_rs1_rs2_b31: + rol x27, x31, x31 # perform operation +80003390: 61ff9db3 rol x27,x31,x31 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkb_rol_cg_cmp_rs1_rs2_b31, Zbkb_rol_cg_cmp_rs1_rs2_b31_str) +80003394: 00032383 lw x7,0(x6) +80003398: 01b38863 beq x7,x27,800033a8 +8000339c: 1bc0246f jal x8,80005558 +800033a0: 80003390 .word 0x80003390 +800033a4: 8000e1e2 .word 0x8000e1e2 +800033a8: 00430313 addi x6,x6,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x47cbfbb5 +800033ac: 0004a003 lw x0,0(x9) +800033b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x5e53ae2f +800033b4: 0004ac83 lw x25,0(x9) +800033b8: 00448493 addi x9,x9,4 + +800033bc : +Zbkb_rol_cg_cmp_rd_rs1_b0: + rol x0, x0, x25 # perform operation +800033bc: 61901033 rol x0,x0,x25 + # Check if x0 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x0, Zbkb_rol_cg_cmp_rd_rs1_b0, Zbkb_rol_cg_cmp_rd_rs1_b0_str) +800033c0: 00032383 lw x7,0(x6) +800033c4: 00038863 beq x7,x0,800033d4 +800033c8: 1900246f jal x8,80005558 +800033cc: 800033bc .word 0x800033bc +800033d0: 8000e21a .word 0x8000e21a +800033d4: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xb33ecb8e +800033d8: 0004a083 lw x1,0(x9) +800033dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x39d5de01 +800033e0: 0004a903 lw x18,0(x9) +800033e4: 00448493 addi x9,x9,4 + +800033e8 : +Zbkb_rol_cg_cmp_rd_rs1_b1: + rol x1, x1, x18 # perform operation +800033e8: 612090b3 rol x1,x1,x18 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkb_rol_cg_cmp_rd_rs1_b1, Zbkb_rol_cg_cmp_rd_rs1_b1_str) +800033ec: 00032383 lw x7,0(x6) +800033f0: 00138863 beq x7,x1,80003400 +800033f4: 1640246f jal x8,80005558 +800033f8: 800033e8 .word 0x800033e8 +800033fc: 8000e250 .word 0x8000e250 +80003400: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x3945b2cc +80003404: 0004a103 lw x2,0(x9) +80003408: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x3786253f +8000340c: 0004af03 lw x30,0(x9) +80003410: 00448493 addi x9,x9,4 + +80003414 : +Zbkb_rol_cg_cmp_rd_rs1_b2: + rol x2, x2, x30 # perform operation +80003414: 61e11133 rol x2,x2,x30 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkb_rol_cg_cmp_rd_rs1_b2, Zbkb_rol_cg_cmp_rd_rs1_b2_str) +80003418: 00032383 lw x7,0(x6) +8000341c: 00238863 beq x7,x2,8000342c +80003420: 1380246f jal x8,80005558 +80003424: 80003414 .word 0x80003414 +80003428: 8000e286 .word 0x8000e286 +8000342c: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x4bf336e6 +80003430: 0004a183 lw x3,0(x9) +80003434: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xcf4cddf0 +80003438: 0004a503 lw x10,0(x9) +8000343c: 00448493 addi x9,x9,4 + +80003440 : +Zbkb_rol_cg_cmp_rd_rs1_b3: + rol x3, x3, x10 # perform operation +80003440: 60a191b3 rol x3,x3,x10 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkb_rol_cg_cmp_rd_rs1_b3, Zbkb_rol_cg_cmp_rd_rs1_b3_str) +80003444: 00032383 lw x7,0(x6) +80003448: 00338863 beq x7,x3,80003458 +8000344c: 10c0246f jal x8,80005558 +80003450: 80003440 .word 0x80003440 +80003454: 8000e2bc .word 0x8000e2bc +80003458: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x5a5adaa3 +8000345c: 0004a203 lw x4,0(x9) +80003460: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xa6964a41 +80003464: 0004ab03 lw x22,0(x9) +80003468: 00448493 addi x9,x9,4 + +8000346c : +Zbkb_rol_cg_cmp_rd_rs1_b4: + rol x4, x4, x22 # perform operation +8000346c: 61621233 rol x4,x4,x22 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkb_rol_cg_cmp_rd_rs1_b4, Zbkb_rol_cg_cmp_rd_rs1_b4_str) +80003470: 00032383 lw x7,0(x6) +80003474: 00438863 beq x7,x4,80003484 +80003478: 0e00246f jal x8,80005558 +8000347c: 8000346c .word 0x8000346c +80003480: 8000e2f2 .word 0x8000e2f2 +80003484: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x123c51c7 +80003488: 0004a283 lw x5,0(x9) +8000348c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x004d4a4f +80003490: 0004ae83 lw x29,0(x9) +80003494: 00448493 addi x9,x9,4 + +80003498 : +Zbkb_rol_cg_cmp_rd_rs1_b5: + rol x5, x5, x29 # perform operation +80003498: 61d292b3 rol x5,x5,x29 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkb_rol_cg_cmp_rd_rs1_b5, Zbkb_rol_cg_cmp_rd_rs1_b5_str) +8000349c: 00032383 lw x7,0(x6) +800034a0: 00538863 beq x7,x5,800034b0 +800034a4: 0b40246f jal x8,80005558 +800034a8: 80003498 .word 0x80003498 +800034ac: 8000e328 .word 0x8000e328 +800034b0: 00430313 addi x6,x6,4 + + mv x18, x6 # switch signature pointer register to avoid conflict with test +800034b4: 00030913 addi x18,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x34ce0b30 +800034b8: 0004a303 lw x6,0(x9) +800034bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x0e213f23 +800034c0: 0004a203 lw x4,0(x9) +800034c4: 00448493 addi x9,x9,4 + +800034c8 : +Zbkb_rol_cg_cmp_rd_rs1_b6: + rol x6, x6, x4 # perform operation +800034c8: 60431333 rol x6,x6,x4 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zbkb_rol_cg_cmp_rd_rs1_b6, Zbkb_rol_cg_cmp_rd_rs1_b6_str) +800034cc: 00092383 lw x7,0(x18) +800034d0: 00638863 beq x7,x6,800034e0 +800034d4: 0840246f jal x8,80005558 +800034d8: 800034c8 .word 0x800034c8 +800034dc: 8000e35e .word 0x8000e35e +800034e0: 00490913 addi x18,x18,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800034e4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800034e8: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xcf8ceecc +800034ec: 0004a383 lw x7,0(x9) +800034f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xfec8a42d +800034f4: 0004a283 lw x5,0(x9) +800034f8: 00448493 addi x9,x9,4 + +800034fc : +Zbkb_rol_cg_cmp_rd_rs1_b7: + rol x7, x7, x5 # perform operation +800034fc: 605393b3 rol x7,x7,x5 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_rol_cg_cmp_rd_rs1_b7, Zbkb_rol_cg_cmp_rd_rs1_b7_str) +80003500: 00092683 lw x13,0(x18) +80003504: 00768863 beq x13,x7,80003514 +80003508: 0780276f jal x14,80005580 +8000350c: 800034fc .word 0x800034fc +80003510: 8000e394 .word 0x8000e394 +80003514: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x2e55c495 +80003518: 0004a403 lw x8,0(x9) +8000351c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x7fa10348 +80003520: 0004a383 lw x7,0(x9) +80003524: 00448493 addi x9,x9,4 + +80003528 : +Zbkb_rol_cg_cmp_rd_rs1_b8: + rol x8, x8, x7 # perform operation +80003528: 60741433 rol x8,x8,x7 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_rol_cg_cmp_rd_rs1_b8, Zbkb_rol_cg_cmp_rd_rs1_b8_str) +8000352c: 00092683 lw x13,0(x18) +80003530: 00868863 beq x13,x8,80003540 +80003534: 04c0276f jal x14,80005580 +80003538: 80003528 .word 0x80003528 +8000353c: 8000e3ca .word 0x8000e3ca +80003540: 00490913 addi x18,x18,4 + + mv x28, x9 # switch data pointer register to avoid conflict with test +80003544: 00048e13 addi x28,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x0bff50b3 +80003548: 000e2483 lw x9,0(x28) +8000354c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xd22c7d18 +80003550: 000e2803 lw x16,0(x28) +80003554: 004e0e13 addi x28,x28,4 + +80003558 : +Zbkb_rol_cg_cmp_rd_rs1_b9: + rol x9, x9, x16 # perform operation +80003558: 610494b3 rol x9,x9,x16 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_rol_cg_cmp_rd_rs1_b9, Zbkb_rol_cg_cmp_rd_rs1_b9_str) +8000355c: 00092683 lw x13,0(x18) +80003560: 00968863 beq x13,x9,80003570 +80003564: 01c0276f jal x14,80005580 +80003568: 80003558 .word 0x80003558 +8000356c: 8000e400 .word 0x8000e400 +80003570: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0x1a808fa6 +80003574: 000e2503 lw x10,0(x28) +80003578: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x70b52e67 +8000357c: 000e2983 lw x19,0(x28) +80003580: 004e0e13 addi x28,x28,4 + +80003584 : +Zbkb_rol_cg_cmp_rd_rs1_b10: + rol x10, x10, x19 # perform operation +80003584: 61351533 rol x10,x10,x19 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_rol_cg_cmp_rd_rs1_b10, Zbkb_rol_cg_cmp_rd_rs1_b10_str) +80003588: 00092683 lw x13,0(x18) +8000358c: 00a68863 beq x13,x10,8000359c +80003590: 7f10176f jal x14,80005580 +80003594: 80003584 .word 0x80003584 +80003598: 8000e436 .word 0x8000e436 +8000359c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x68448fb6 +800035a0: 000e2583 lw x11,0(x28) +800035a4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x012ba332 +800035a8: 000e2a03 lw x20,0(x28) +800035ac: 004e0e13 addi x28,x28,4 + +800035b0 : +Zbkb_rol_cg_cmp_rd_rs1_b11: + rol x11, x11, x20 # perform operation +800035b0: 614595b3 rol x11,x11,x20 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_rol_cg_cmp_rd_rs1_b11, Zbkb_rol_cg_cmp_rd_rs1_b11_str) +800035b4: 00092683 lw x13,0(x18) +800035b8: 00b68863 beq x13,x11,800035c8 +800035bc: 7c50176f jal x14,80005580 +800035c0: 800035b0 .word 0x800035b0 +800035c4: 8000e46d .word 0x8000e46d +800035c8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xfeaf0152 +800035cc: 000e2603 lw x12,0(x28) +800035d0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs2: x7 = 0x1f992723 +800035d4: 000e2383 lw x7,0(x28) +800035d8: 004e0e13 addi x28,x28,4 + +800035dc : +Zbkb_rol_cg_cmp_rd_rs1_b12: + rol x12, x12, x7 # perform operation +800035dc: 60761633 rol x12,x12,x7 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_rol_cg_cmp_rd_rs1_b12, Zbkb_rol_cg_cmp_rd_rs1_b12_str) +800035e0: 00092683 lw x13,0(x18) +800035e4: 00c68863 beq x13,x12,800035f4 +800035e8: 7990176f jal x14,80005580 +800035ec: 800035dc .word 0x800035dc +800035f0: 8000e4a4 .word 0x8000e4a4 +800035f4: 00490913 addi x18,x18,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035f8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035fc: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0xb7b02657 +80003600: 000e2683 lw x13,0(x28) +80003604: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0x578f4375 +80003608: 000e2103 lw x2,0(x28) +8000360c: 004e0e13 addi x28,x28,4 + +80003610 : +Zbkb_rol_cg_cmp_rd_rs1_b13: + rol x13, x13, x2 # perform operation +80003610: 602696b3 rol x13,x13,x2 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zbkb_rol_cg_cmp_rd_rs1_b13, Zbkb_rol_cg_cmp_rd_rs1_b13_str) +80003614: 00092383 lw x7,0(x18) +80003618: 00d38863 beq x7,x13,80003628 +8000361c: 73d0146f jal x8,80005558 +80003620: 80003610 .word 0x80003610 +80003624: 8000e4db .word 0x8000e4db +80003628: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x337d0cca +8000362c: 000e2703 lw x14,0(x28) +80003630: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x717872e6 +80003634: 000e2183 lw x3,0(x28) +80003638: 004e0e13 addi x28,x28,4 + +8000363c : +Zbkb_rol_cg_cmp_rd_rs1_b14: + rol x14, x14, x3 # perform operation +8000363c: 60371733 rol x14,x14,x3 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zbkb_rol_cg_cmp_rd_rs1_b14, Zbkb_rol_cg_cmp_rd_rs1_b14_str) +80003640: 00092383 lw x7,0(x18) +80003644: 00e38863 beq x7,x14,80003654 +80003648: 7110146f jal x8,80005558 +8000364c: 8000363c .word 0x8000363c +80003650: 8000e512 .word 0x8000e512 +80003654: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xc09bd79d +80003658: 000e2783 lw x15,0(x28) +8000365c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xf5da010c +80003660: 000e2983 lw x19,0(x28) +80003664: 004e0e13 addi x28,x28,4 + +80003668 : +Zbkb_rol_cg_cmp_rd_rs1_b15: + rol x15, x15, x19 # perform operation +80003668: 613797b3 rol x15,x15,x19 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zbkb_rol_cg_cmp_rd_rs1_b15, Zbkb_rol_cg_cmp_rd_rs1_b15_str) +8000366c: 00092383 lw x7,0(x18) +80003670: 00f38863 beq x7,x15,80003680 +80003674: 6e50146f jal x8,80005558 +80003678: 80003668 .word 0x80003668 +8000367c: 8000e549 .word 0x8000e549 +80003680: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0x365fdd51 +80003684: 000e2803 lw x16,0(x28) +80003688: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x9b4768c2 +8000368c: 000e2a83 lw x21,0(x28) +80003690: 004e0e13 addi x28,x28,4 + +80003694 : +Zbkb_rol_cg_cmp_rd_rs1_b16: + rol x16, x16, x21 # perform operation +80003694: 61581833 rol x16,x16,x21 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_rol_cg_cmp_rd_rs1_b16, Zbkb_rol_cg_cmp_rd_rs1_b16_str) +80003698: 00092383 lw x7,0(x18) +8000369c: 01038863 beq x7,x16,800036ac +800036a0: 6b90146f jal x8,80005558 +800036a4: 80003694 .word 0x80003694 +800036a8: 8000e580 .word 0x8000e580 +800036ac: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xebb0e1bc +800036b0: 000e2883 lw x17,0(x28) +800036b4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xa719ba39 +800036b8: 000e2483 lw x9,0(x28) +800036bc: 004e0e13 addi x28,x28,4 + +800036c0 : +Zbkb_rol_cg_cmp_rd_rs1_b17: + rol x17, x17, x9 # perform operation +800036c0: 609898b3 rol x17,x17,x9 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zbkb_rol_cg_cmp_rd_rs1_b17, Zbkb_rol_cg_cmp_rd_rs1_b17_str) +800036c4: 00092383 lw x7,0(x18) +800036c8: 01138863 beq x7,x17,800036d8 +800036cc: 68d0146f jal x8,80005558 +800036d0: 800036c0 .word 0x800036c0 +800036d4: 8000e5b7 .word 0x8000e5b7 +800036d8: 00490913 addi x18,x18,4 + + mv x31, x18 # switch signature pointer register to avoid conflict with test +800036dc: 00090f93 addi x31,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x401c8da5 +800036e0: 000e2903 lw x18,0(x28) +800036e4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x55dd0725 +800036e8: 000e2a03 lw x20,0(x28) +800036ec: 004e0e13 addi x28,x28,4 + +800036f0 : +Zbkb_rol_cg_cmp_rd_rs1_b18: + rol x18, x18, x20 # perform operation +800036f0: 61491933 rol x18,x18,x20 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkb_rol_cg_cmp_rd_rs1_b18, Zbkb_rol_cg_cmp_rd_rs1_b18_str) +800036f4: 000fa383 lw x7,0(x31) +800036f8: 01238863 beq x7,x18,80003708 +800036fc: 65d0146f jal x8,80005558 +80003700: 800036f0 .word 0x800036f0 +80003704: 8000e5ee .word 0x8000e5ee +80003708: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x9c1ec28a +8000370c: 000e2983 lw x19,0(x28) +80003710: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs2: x5 = 0xd1ac1c9e +80003714: 000e2283 lw x5,0(x28) +80003718: 004e0e13 addi x28,x28,4 + +8000371c : +Zbkb_rol_cg_cmp_rd_rs1_b19: + rol x19, x19, x5 # perform operation +8000371c: 605999b3 rol x19,x19,x5 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkb_rol_cg_cmp_rd_rs1_b19, Zbkb_rol_cg_cmp_rd_rs1_b19_str) +80003720: 000fa383 lw x7,0(x31) +80003724: 01338863 beq x7,x19,80003734 +80003728: 6310146f jal x8,80005558 +8000372c: 8000371c .word 0x8000371c +80003730: 8000e625 .word 0x8000e625 +80003734: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x82fe04cb +80003738: 000e2a03 lw x20,0(x28) +8000373c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0xdc7f92ef +80003740: 000e2903 lw x18,0(x28) +80003744: 004e0e13 addi x28,x28,4 + +80003748 : +Zbkb_rol_cg_cmp_rd_rs1_b20: + rol x20, x20, x18 # perform operation +80003748: 612a1a33 rol x20,x20,x18 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_rol_cg_cmp_rd_rs1_b20, Zbkb_rol_cg_cmp_rd_rs1_b20_str) +8000374c: 000fa383 lw x7,0(x31) +80003750: 01438863 beq x7,x20,80003760 +80003754: 6050146f jal x8,80005558 +80003758: 80003748 .word 0x80003748 +8000375c: 8000e65c .word 0x8000e65c +80003760: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0xecf69162 +80003764: 000e2a83 lw x21,0(x28) +80003768: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x5a52b377 +8000376c: 000e2a03 lw x20,0(x28) +80003770: 004e0e13 addi x28,x28,4 + +80003774 : +Zbkb_rol_cg_cmp_rd_rs1_b21: + rol x21, x21, x20 # perform operation +80003774: 614a9ab3 rol x21,x21,x20 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkb_rol_cg_cmp_rd_rs1_b21, Zbkb_rol_cg_cmp_rd_rs1_b21_str) +80003778: 000fa383 lw x7,0(x31) +8000377c: 01538863 beq x7,x21,8000378c +80003780: 5d90146f jal x8,80005558 +80003784: 80003774 .word 0x80003774 +80003788: 8000e693 .word 0x8000e693 +8000378c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x6e91c395 +80003790: 000e2b03 lw x22,0(x28) +80003794: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0xad53d8fc +80003798: 000e2883 lw x17,0(x28) +8000379c: 004e0e13 addi x28,x28,4 + +800037a0 : +Zbkb_rol_cg_cmp_rd_rs1_b22: + rol x22, x22, x17 # perform operation +800037a0: 611b1b33 rol x22,x22,x17 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkb_rol_cg_cmp_rd_rs1_b22, Zbkb_rol_cg_cmp_rd_rs1_b22_str) +800037a4: 000fa383 lw x7,0(x31) +800037a8: 01638863 beq x7,x22,800037b8 +800037ac: 5ad0146f jal x8,80005558 +800037b0: 800037a0 .word 0x800037a0 +800037b4: 8000e6ca .word 0x8000e6ca +800037b8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0xa4ae8990 +800037bc: 000e2b83 lw x23,0(x28) +800037c0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x1c7054e9 +800037c4: 000e2b03 lw x22,0(x28) +800037c8: 004e0e13 addi x28,x28,4 + +800037cc : +Zbkb_rol_cg_cmp_rd_rs1_b23: + rol x23, x23, x22 # perform operation +800037cc: 616b9bb3 rol x23,x23,x22 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkb_rol_cg_cmp_rd_rs1_b23, Zbkb_rol_cg_cmp_rd_rs1_b23_str) +800037d0: 000fa383 lw x7,0(x31) +800037d4: 01738863 beq x7,x23,800037e4 +800037d8: 5810146f jal x8,80005558 +800037dc: 800037cc .word 0x800037cc +800037e0: 8000e701 .word 0x8000e701 +800037e4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xee28ba93 +800037e8: 000e2c03 lw x24,0(x28) +800037ec: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs2: x30 = 0xd7846316 +800037f0: 000e2f03 lw x30,0(x28) +800037f4: 004e0e13 addi x28,x28,4 + +800037f8 : +Zbkb_rol_cg_cmp_rd_rs1_b24: + rol x24, x24, x30 # perform operation +800037f8: 61ec1c33 rol x24,x24,x30 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_rol_cg_cmp_rd_rs1_b24, Zbkb_rol_cg_cmp_rd_rs1_b24_str) +800037fc: 000fa383 lw x7,0(x31) +80003800: 01838863 beq x7,x24,80003810 +80003804: 5550146f jal x8,80005558 +80003808: 800037f8 .word 0x800037f8 +8000380c: 8000e738 .word 0x8000e738 +80003810: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xd0051d4b +80003814: 000e2c83 lw x25,0(x28) +80003818: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x0a6101ae +8000381c: 000e2503 lw x10,0(x28) +80003820: 004e0e13 addi x28,x28,4 + +80003824 : +Zbkb_rol_cg_cmp_rd_rs1_b25: + rol x25, x25, x10 # perform operation +80003824: 60ac9cb3 rol x25,x25,x10 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkb_rol_cg_cmp_rd_rs1_b25, Zbkb_rol_cg_cmp_rd_rs1_b25_str) +80003828: 000fa383 lw x7,0(x31) +8000382c: 01938863 beq x7,x25,8000383c +80003830: 5290146f jal x8,80005558 +80003834: 80003824 .word 0x80003824 +80003838: 8000e76f .word 0x8000e76f +8000383c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x97750e3e +80003840: 000e2d03 lw x26,0(x28) +80003844: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0xc4d3f423 +80003848: 000e2703 lw x14,0(x28) +8000384c: 004e0e13 addi x28,x28,4 + +80003850 : +Zbkb_rol_cg_cmp_rd_rs1_b26: + rol x26, x26, x14 # perform operation +80003850: 60ed1d33 rol x26,x26,x14 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkb_rol_cg_cmp_rd_rs1_b26, Zbkb_rol_cg_cmp_rd_rs1_b26_str) +80003854: 000fa383 lw x7,0(x31) +80003858: 01a38863 beq x7,x26,80003868 +8000385c: 4fd0146f jal x8,80005558 +80003860: 80003850 .word 0x80003850 +80003864: 8000e7a6 .word 0x8000e7a6 +80003868: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x1d8f3656 +8000386c: 000e2d83 lw x27,0(x28) +80003870: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs2: x5 = 0x23d198f7 +80003874: 000e2283 lw x5,0(x28) +80003878: 004e0e13 addi x28,x28,4 + +8000387c : +Zbkb_rol_cg_cmp_rd_rs1_b27: + rol x27, x27, x5 # perform operation +8000387c: 605d9db3 rol x27,x27,x5 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_rol_cg_cmp_rd_rs1_b27, Zbkb_rol_cg_cmp_rd_rs1_b27_str) +80003880: 000fa383 lw x7,0(x31) +80003884: 01b38863 beq x7,x27,80003894 +80003888: 4d10146f jal x8,80005558 +8000388c: 8000387c .word 0x8000387c +80003890: 8000e7dd .word 0x8000e7dd +80003894: 004f8f93 addi x31,x31,4 + + mv x15, x28 # switch data pointer register to avoid conflict with test +80003898: 000e0793 addi x15,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xed137c1e +8000389c: 0007ae03 lw x28,0(x15) +800038a0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xd650a603 +800038a4: 0007ad03 lw x26,0(x15) +800038a8: 00478793 addi x15,x15,4 + +800038ac : +Zbkb_rol_cg_cmp_rd_rs1_b28: + rol x28, x28, x26 # perform operation +800038ac: 61ae1e33 rol x28,x28,x26 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_rol_cg_cmp_rd_rs1_b28, Zbkb_rol_cg_cmp_rd_rs1_b28_str) +800038b0: 000fa383 lw x7,0(x31) +800038b4: 01c38863 beq x7,x28,800038c4 +800038b8: 4a10146f jal x8,80005558 +800038bc: 800038ac .word 0x800038ac +800038c0: 8000e814 .word 0x8000e814 +800038c4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x57bb9394 +800038c8: 0007ae83 lw x29,0(x15) +800038cc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xaecc16e6 +800038d0: 0007a803 lw x16,0(x15) +800038d4: 00478793 addi x15,x15,4 + +800038d8 : +Zbkb_rol_cg_cmp_rd_rs1_b29: + rol x29, x29, x16 # perform operation +800038d8: 610e9eb3 rol x29,x29,x16 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkb_rol_cg_cmp_rd_rs1_b29, Zbkb_rol_cg_cmp_rd_rs1_b29_str) +800038dc: 000fa383 lw x7,0(x31) +800038e0: 01d38863 beq x7,x29,800038f0 +800038e4: 4750146f jal x8,80005558 +800038e8: 800038d8 .word 0x800038d8 +800038ec: 8000e84b .word 0x8000e84b +800038f0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xd52d6da3 +800038f4: 0007af03 lw x30,0(x15) +800038f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x852f0c47 +800038fc: 0007a083 lw x1,0(x15) +80003900: 00478793 addi x15,x15,4 + +80003904 : +Zbkb_rol_cg_cmp_rd_rs1_b30: + rol x30, x30, x1 # perform operation +80003904: 601f1f33 rol x30,x30,x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkb_rol_cg_cmp_rd_rs1_b30, Zbkb_rol_cg_cmp_rd_rs1_b30_str) +80003908: 000fa383 lw x7,0(x31) +8000390c: 01e38863 beq x7,x30,8000391c +80003910: 4490146f jal x8,80005558 +80003914: 80003904 .word 0x80003904 +80003918: 8000e882 .word 0x8000e882 +8000391c: 004f8f93 addi x31,x31,4 + + mv x26, x31 # switch signature pointer register to avoid conflict with test +80003920: 000f8d13 addi x26,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xae02fa7a +80003924: 0007af83 lw x31,0(x15) +80003928: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x610a7d9c +8000392c: 0007ac03 lw x24,0(x15) +80003930: 00478793 addi x15,x15,4 + +80003934 : +Zbkb_rol_cg_cmp_rd_rs1_b31: + rol x31, x31, x24 # perform operation +80003934: 618f9fb3 rol x31,x31,x24 + # Check if x31 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x31, Zbkb_rol_cg_cmp_rd_rs1_b31, Zbkb_rol_cg_cmp_rd_rs1_b31_str) +80003938: 000d2383 lw x7,0(x26) +8000393c: 01f38863 beq x7,x31,8000394c +80003940: 4190146f jal x8,80005558 +80003944: 80003934 .word 0x80003934 +80003948: 8000e8b9 .word 0x8000e8b9 +8000394c: 004d0d13 addi x26,x26,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xf54d7e5e +80003950: 0007a183 lw x3,0(x15) +80003954: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x90586b6f +80003958: 0007a003 lw x0,0(x15) +8000395c: 00478793 addi x15,x15,4 + +80003960 : +Zbkb_rol_cg_cmp_rd_rs2_b0: + rol x0, x3, x0 # perform operation +80003960: 60019033 rol x0,x3,x0 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zbkb_rol_cg_cmp_rd_rs2_b0, Zbkb_rol_cg_cmp_rd_rs2_b0_str) +80003964: 000d2383 lw x7,0(x26) +80003968: 00038863 beq x7,x0,80003978 +8000396c: 3ed0146f jal x8,80005558 +80003970: 80003960 .word 0x80003960 +80003974: 8000e8f0 .word 0x8000e8f0 +80003978: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x09445c5b +8000397c: 0007a983 lw x19,0(x15) +80003980: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x9d66e202 +80003984: 0007a083 lw x1,0(x15) +80003988: 00478793 addi x15,x15,4 + +8000398c : +Zbkb_rol_cg_cmp_rd_rs2_b1: + rol x1, x19, x1 # perform operation +8000398c: 601990b3 rol x1,x19,x1 + # Check if x1 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x1, Zbkb_rol_cg_cmp_rd_rs2_b1, Zbkb_rol_cg_cmp_rd_rs2_b1_str) +80003990: 000d2383 lw x7,0(x26) +80003994: 00138863 beq x7,x1,800039a4 +80003998: 3c10146f jal x8,80005558 +8000399c: 8000398c .word 0x8000398c +800039a0: 8000e926 .word 0x8000e926 +800039a4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x21a535e2 +800039a8: 0007a603 lw x12,0(x15) +800039ac: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x792f288e +800039b0: 0007a103 lw x2,0(x15) +800039b4: 00478793 addi x15,x15,4 + +800039b8 : +Zbkb_rol_cg_cmp_rd_rs2_b2: + rol x2, x12, x2 # perform operation +800039b8: 60261133 rol x2,x12,x2 + # Check if x2 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x2, Zbkb_rol_cg_cmp_rd_rs2_b2, Zbkb_rol_cg_cmp_rd_rs2_b2_str) +800039bc: 000d2383 lw x7,0(x26) +800039c0: 00238863 beq x7,x2,800039d0 +800039c4: 3950146f jal x8,80005558 +800039c8: 800039b8 .word 0x800039b8 +800039cc: 8000e95c .word 0x8000e95c +800039d0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xcd0e8693 +800039d4: 0007aa83 lw x21,0(x15) +800039d8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x3ecf0b96 +800039dc: 0007a183 lw x3,0(x15) +800039e0: 00478793 addi x15,x15,4 + +800039e4 : +Zbkb_rol_cg_cmp_rd_rs2_b3: + rol x3, x21, x3 # perform operation +800039e4: 603a91b3 rol x3,x21,x3 + # Check if x3 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x3, Zbkb_rol_cg_cmp_rd_rs2_b3, Zbkb_rol_cg_cmp_rd_rs2_b3_str) +800039e8: 000d2383 lw x7,0(x26) +800039ec: 00338863 beq x7,x3,800039fc +800039f0: 3690146f jal x8,80005558 +800039f4: 800039e4 .word 0x800039e4 +800039f8: 8000e992 .word 0x8000e992 +800039fc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xcf6298dc +80003a00: 0007a483 lw x9,0(x15) +80003a04: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xa7e407e6 +80003a08: 0007a203 lw x4,0(x15) +80003a0c: 00478793 addi x15,x15,4 + +80003a10 : +Zbkb_rol_cg_cmp_rd_rs2_b4: + rol x4, x9, x4 # perform operation +80003a10: 60449233 rol x4,x9,x4 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zbkb_rol_cg_cmp_rd_rs2_b4, Zbkb_rol_cg_cmp_rd_rs2_b4_str) +80003a14: 000d2383 lw x7,0(x26) +80003a18: 00438863 beq x7,x4,80003a28 +80003a1c: 33d0146f jal x8,80005558 +80003a20: 80003a10 .word 0x80003a10 +80003a24: 8000e9c8 .word 0x8000e9c8 +80003a28: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xfd0dfd06 +80003a2c: 0007a203 lw x4,0(x15) +80003a30: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x775f8ffb +80003a34: 0007a283 lw x5,0(x15) +80003a38: 00478793 addi x15,x15,4 + +80003a3c : +Zbkb_rol_cg_cmp_rd_rs2_b5: + rol x5, x4, x5 # perform operation +80003a3c: 605212b3 rol x5,x4,x5 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zbkb_rol_cg_cmp_rd_rs2_b5, Zbkb_rol_cg_cmp_rd_rs2_b5_str) +80003a40: 000d2383 lw x7,0(x26) +80003a44: 00538863 beq x7,x5,80003a54 +80003a48: 3110146f jal x8,80005558 +80003a4c: 80003a3c .word 0x80003a3c +80003a50: 8000e9fe .word 0x8000e9fe +80003a54: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x50795d36 +80003a58: 0007a803 lw x16,0(x15) +80003a5c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x82e0d7b0 +80003a60: 0007a303 lw x6,0(x15) +80003a64: 00478793 addi x15,x15,4 + +80003a68 : +Zbkb_rol_cg_cmp_rd_rs2_b6: + rol x6, x16, x6 # perform operation +80003a68: 60681333 rol x6,x16,x6 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zbkb_rol_cg_cmp_rd_rs2_b6, Zbkb_rol_cg_cmp_rd_rs2_b6_str) +80003a6c: 000d2383 lw x7,0(x26) +80003a70: 00638863 beq x7,x6,80003a80 +80003a74: 2e50146f jal x8,80005558 +80003a78: 80003a68 .word 0x80003a68 +80003a7c: 8000ea34 .word 0x8000ea34 +80003a80: 004d0d13 addi x26,x26,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a84: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a88: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x4d383d73 +80003a8c: 0007a503 lw x10,0(x15) +80003a90: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xb35638f9 +80003a94: 0007a383 lw x7,0(x15) +80003a98: 00478793 addi x15,x15,4 + +80003a9c : +Zbkb_rol_cg_cmp_rd_rs2_b7: + rol x7, x10, x7 # perform operation +80003a9c: 607513b3 rol x7,x10,x7 + # Check if x7 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x7, Zbkb_rol_cg_cmp_rd_rs2_b7, Zbkb_rol_cg_cmp_rd_rs2_b7_str) +80003aa0: 000d2203 lw x4,0(x26) +80003aa4: 00720863 beq x4,x7,80003ab4 +80003aa8: 299012ef jal x5,80005540 +80003aac: 80003a9c .word 0x80003a9c +80003ab0: 8000ea6a .word 0x8000ea6a +80003ab4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xe6f9ac6b +80003ab8: 0007a503 lw x10,0(x15) +80003abc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xb25572cb +80003ac0: 0007a403 lw x8,0(x15) +80003ac4: 00478793 addi x15,x15,4 + +80003ac8 : +Zbkb_rol_cg_cmp_rd_rs2_b8: + rol x8, x10, x8 # perform operation +80003ac8: 60851433 rol x8,x10,x8 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zbkb_rol_cg_cmp_rd_rs2_b8, Zbkb_rol_cg_cmp_rd_rs2_b8_str) +80003acc: 000d2203 lw x4,0(x26) +80003ad0: 00820863 beq x4,x8,80003ae0 +80003ad4: 26d012ef jal x5,80005540 +80003ad8: 80003ac8 .word 0x80003ac8 +80003adc: 8000eaa0 .word 0x8000eaa0 +80003ae0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x14eaacdc +80003ae4: 0007a103 lw x2,0(x15) +80003ae8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x505c9c35 +80003aec: 0007a483 lw x9,0(x15) +80003af0: 00478793 addi x15,x15,4 + +80003af4 : +Zbkb_rol_cg_cmp_rd_rs2_b9: + rol x9, x2, x9 # perform operation +80003af4: 609114b3 rol x9,x2,x9 + # Check if x9 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x9, Zbkb_rol_cg_cmp_rd_rs2_b9, Zbkb_rol_cg_cmp_rd_rs2_b9_str) +80003af8: 000d2203 lw x4,0(x26) +80003afc: 00920863 beq x4,x9,80003b0c +80003b00: 241012ef jal x5,80005540 +80003b04: 80003af4 .word 0x80003af4 +80003b08: 8000ead6 .word 0x8000ead6 +80003b0c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xf57c5298 +80003b10: 0007a103 lw x2,0(x15) +80003b14: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xf3ef6244 +80003b18: 0007a503 lw x10,0(x15) +80003b1c: 00478793 addi x15,x15,4 + +80003b20 : +Zbkb_rol_cg_cmp_rd_rs2_b10: + rol x10, x2, x10 # perform operation +80003b20: 60a11533 rol x10,x2,x10 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zbkb_rol_cg_cmp_rd_rs2_b10, Zbkb_rol_cg_cmp_rd_rs2_b10_str) +80003b24: 000d2203 lw x4,0(x26) +80003b28: 00a20863 beq x4,x10,80003b38 +80003b2c: 215012ef jal x5,80005540 +80003b30: 80003b20 .word 0x80003b20 +80003b34: 8000eb0c .word 0x8000eb0c +80003b38: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x3fdf5be2 +80003b3c: 0007a703 lw x14,0(x15) +80003b40: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x8c1632a8 +80003b44: 0007a583 lw x11,0(x15) +80003b48: 00478793 addi x15,x15,4 + +80003b4c : +Zbkb_rol_cg_cmp_rd_rs2_b11: + rol x11, x14, x11 # perform operation +80003b4c: 60b715b3 rol x11,x14,x11 + # Check if x11 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x11, Zbkb_rol_cg_cmp_rd_rs2_b11, Zbkb_rol_cg_cmp_rd_rs2_b11_str) +80003b50: 000d2203 lw x4,0(x26) +80003b54: 00b20863 beq x4,x11,80003b64 +80003b58: 1e9012ef jal x5,80005540 +80003b5c: 80003b4c .word 0x80003b4c +80003b60: 8000eb43 .word 0x8000eb43 +80003b64: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x5b3888b6 +80003b68: 0007a483 lw x9,0(x15) +80003b6c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x04a14155 +80003b70: 0007a603 lw x12,0(x15) +80003b74: 00478793 addi x15,x15,4 + +80003b78 : +Zbkb_rol_cg_cmp_rd_rs2_b12: + rol x12, x9, x12 # perform operation +80003b78: 60c49633 rol x12,x9,x12 + # Check if x12 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x12, Zbkb_rol_cg_cmp_rd_rs2_b12, Zbkb_rol_cg_cmp_rd_rs2_b12_str) +80003b7c: 000d2203 lw x4,0(x26) +80003b80: 00c20863 beq x4,x12,80003b90 +80003b84: 1bd012ef jal x5,80005540 +80003b88: 80003b78 .word 0x80003b78 +80003b8c: 8000eb7a .word 0x8000eb7a +80003b90: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x44b09e61 +80003b94: 0007af83 lw x31,0(x15) +80003b98: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x136d3d44 +80003b9c: 0007a683 lw x13,0(x15) +80003ba0: 00478793 addi x15,x15,4 + +80003ba4 : +Zbkb_rol_cg_cmp_rd_rs2_b13: + rol x13, x31, x13 # perform operation +80003ba4: 60df96b3 rol x13,x31,x13 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zbkb_rol_cg_cmp_rd_rs2_b13, Zbkb_rol_cg_cmp_rd_rs2_b13_str) +80003ba8: 000d2203 lw x4,0(x26) +80003bac: 00d20863 beq x4,x13,80003bbc +80003bb0: 191012ef jal x5,80005540 +80003bb4: 80003ba4 .word 0x80003ba4 +80003bb8: 8000ebb1 .word 0x8000ebb1 +80003bbc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x4194256b +80003bc0: 0007ac03 lw x24,0(x15) +80003bc4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xab0f7394 +80003bc8: 0007a703 lw x14,0(x15) +80003bcc: 00478793 addi x15,x15,4 + +80003bd0 : +Zbkb_rol_cg_cmp_rd_rs2_b14: + rol x14, x24, x14 # perform operation +80003bd0: 60ec1733 rol x14,x24,x14 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zbkb_rol_cg_cmp_rd_rs2_b14, Zbkb_rol_cg_cmp_rd_rs2_b14_str) +80003bd4: 000d2203 lw x4,0(x26) +80003bd8: 00e20863 beq x4,x14,80003be8 +80003bdc: 165012ef jal x5,80005540 +80003be0: 80003bd0 .word 0x80003bd0 +80003be4: 8000ebe8 .word 0x8000ebe8 +80003be8: 004d0d13 addi x26,x26,4 + + mv x24, x15 # switch data pointer register to avoid conflict with test +80003bec: 00078c13 addi x24,x15,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x8df38b22 +80003bf0: 000c2b83 lw x23,0(x24) +80003bf4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x9b39de04 +80003bf8: 000c2783 lw x15,0(x24) +80003bfc: 004c0c13 addi x24,x24,4 + +80003c00 : +Zbkb_rol_cg_cmp_rd_rs2_b15: + rol x15, x23, x15 # perform operation +80003c00: 60fb97b3 rol x15,x23,x15 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zbkb_rol_cg_cmp_rd_rs2_b15, Zbkb_rol_cg_cmp_rd_rs2_b15_str) +80003c04: 000d2203 lw x4,0(x26) +80003c08: 00f20863 beq x4,x15,80003c18 +80003c0c: 135012ef jal x5,80005540 +80003c10: 80003c00 .word 0x80003c00 +80003c14: 8000ec1f .word 0x8000ec1f +80003c18: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x1c8bb58c +80003c1c: 000c2b83 lw x23,0(x24) +80003c20: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x6abdbfc5 +80003c24: 000c2803 lw x16,0(x24) +80003c28: 004c0c13 addi x24,x24,4 + +80003c2c : +Zbkb_rol_cg_cmp_rd_rs2_b16: + rol x16, x23, x16 # perform operation +80003c2c: 610b9833 rol x16,x23,x16 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zbkb_rol_cg_cmp_rd_rs2_b16, Zbkb_rol_cg_cmp_rd_rs2_b16_str) +80003c30: 000d2203 lw x4,0(x26) +80003c34: 01020863 beq x4,x16,80003c44 +80003c38: 109012ef jal x5,80005540 +80003c3c: 80003c2c .word 0x80003c2c +80003c40: 8000ec56 .word 0x8000ec56 +80003c44: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xa4202aa8 +80003c48: 000c2603 lw x12,0(x24) +80003c4c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xbe6ac4e1 +80003c50: 000c2883 lw x17,0(x24) +80003c54: 004c0c13 addi x24,x24,4 + +80003c58 : +Zbkb_rol_cg_cmp_rd_rs2_b17: + rol x17, x12, x17 # perform operation +80003c58: 611618b3 rol x17,x12,x17 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zbkb_rol_cg_cmp_rd_rs2_b17, Zbkb_rol_cg_cmp_rd_rs2_b17_str) +80003c5c: 000d2203 lw x4,0(x26) +80003c60: 01120863 beq x4,x17,80003c70 +80003c64: 0dd012ef jal x5,80005540 +80003c68: 80003c58 .word 0x80003c58 +80003c6c: 8000ec8d .word 0x8000ec8d +80003c70: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x6cec4aa0 +80003c74: 000c2403 lw x8,0(x24) +80003c78: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x5b9e0650 +80003c7c: 000c2903 lw x18,0(x24) +80003c80: 004c0c13 addi x24,x24,4 + +80003c84 : +Zbkb_rol_cg_cmp_rd_rs2_b18: + rol x18, x8, x18 # perform operation +80003c84: 61241933 rol x18,x8,x18 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zbkb_rol_cg_cmp_rd_rs2_b18, Zbkb_rol_cg_cmp_rd_rs2_b18_str) +80003c88: 000d2203 lw x4,0(x26) +80003c8c: 01220863 beq x4,x18,80003c9c +80003c90: 0b1012ef jal x5,80005540 +80003c94: 80003c84 .word 0x80003c84 +80003c98: 8000ecc4 .word 0x8000ecc4 +80003c9c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x82b0f281 +80003ca0: 000c2f83 lw x31,0(x24) +80003ca4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xedac938d +80003ca8: 000c2983 lw x19,0(x24) +80003cac: 004c0c13 addi x24,x24,4 + +80003cb0 : +Zbkb_rol_cg_cmp_rd_rs2_b19: + rol x19, x31, x19 # perform operation +80003cb0: 613f99b3 rol x19,x31,x19 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zbkb_rol_cg_cmp_rd_rs2_b19, Zbkb_rol_cg_cmp_rd_rs2_b19_str) +80003cb4: 000d2203 lw x4,0(x26) +80003cb8: 01320863 beq x4,x19,80003cc8 +80003cbc: 085012ef jal x5,80005540 +80003cc0: 80003cb0 .word 0x80003cb0 +80003cc4: 8000ecfb .word 0x8000ecfb +80003cc8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x8fe61c06 +80003ccc: 000c2103 lw x2,0(x24) +80003cd0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xc4a6f4a8 +80003cd4: 000c2a03 lw x20,0(x24) +80003cd8: 004c0c13 addi x24,x24,4 + +80003cdc : +Zbkb_rol_cg_cmp_rd_rs2_b20: + rol x20, x2, x20 # perform operation +80003cdc: 61411a33 rol x20,x2,x20 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zbkb_rol_cg_cmp_rd_rs2_b20, Zbkb_rol_cg_cmp_rd_rs2_b20_str) +80003ce0: 000d2203 lw x4,0(x26) +80003ce4: 01420863 beq x4,x20,80003cf4 +80003ce8: 059012ef jal x5,80005540 +80003cec: 80003cdc .word 0x80003cdc +80003cf0: 8000ed32 .word 0x8000ed32 +80003cf4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x76cdc293 +80003cf8: 000c2b03 lw x22,0(x24) +80003cfc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xb6a4a4eb +80003d00: 000c2a83 lw x21,0(x24) +80003d04: 004c0c13 addi x24,x24,4 + +80003d08 : +Zbkb_rol_cg_cmp_rd_rs2_b21: + rol x21, x22, x21 # perform operation +80003d08: 615b1ab3 rol x21,x22,x21 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zbkb_rol_cg_cmp_rd_rs2_b21, Zbkb_rol_cg_cmp_rd_rs2_b21_str) +80003d0c: 000d2203 lw x4,0(x26) +80003d10: 01520863 beq x4,x21,80003d20 +80003d14: 02d012ef jal x5,80005540 +80003d18: 80003d08 .word 0x80003d08 +80003d1c: 8000ed69 .word 0x8000ed69 +80003d20: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x60fffa3d +80003d24: 000c2c83 lw x25,0(x24) +80003d28: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x65fe8022 +80003d2c: 000c2b03 lw x22,0(x24) +80003d30: 004c0c13 addi x24,x24,4 + +80003d34 : +Zbkb_rol_cg_cmp_rd_rs2_b22: + rol x22, x25, x22 # perform operation +80003d34: 616c9b33 rol x22,x25,x22 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zbkb_rol_cg_cmp_rd_rs2_b22, Zbkb_rol_cg_cmp_rd_rs2_b22_str) +80003d38: 000d2203 lw x4,0(x26) +80003d3c: 01620863 beq x4,x22,80003d4c +80003d40: 001012ef jal x5,80005540 +80003d44: 80003d34 .word 0x80003d34 +80003d48: 8000eda0 .word 0x8000eda0 +80003d4c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xe133f638 +80003d50: 000c2183 lw x3,0(x24) +80003d54: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x6ed575bd +80003d58: 000c2b83 lw x23,0(x24) +80003d5c: 004c0c13 addi x24,x24,4 + +80003d60 : +Zbkb_rol_cg_cmp_rd_rs2_b23: + rol x23, x3, x23 # perform operation +80003d60: 61719bb3 rol x23,x3,x23 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zbkb_rol_cg_cmp_rd_rs2_b23, Zbkb_rol_cg_cmp_rd_rs2_b23_str) +80003d64: 000d2203 lw x4,0(x26) +80003d68: 01720863 beq x4,x23,80003d78 +80003d6c: 7d4012ef jal x5,80005540 +80003d70: 80003d60 .word 0x80003d60 +80003d74: 8000edd7 .word 0x8000edd7 +80003d78: 004d0d13 addi x26,x26,4 + + mv x1, x24 # switch data pointer register to avoid conflict with test +80003d7c: 000c0093 addi x1,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xf60779ab +80003d80: 0000a803 lw x16,0(x1) +80003d84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xe0d7a3ca +80003d88: 0000ac03 lw x24,0(x1) +80003d8c: 00408093 addi x1,x1,4 + +80003d90 : +Zbkb_rol_cg_cmp_rd_rs2_b24: + rol x24, x16, x24 # perform operation +80003d90: 61881c33 rol x24,x16,x24 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zbkb_rol_cg_cmp_rd_rs2_b24, Zbkb_rol_cg_cmp_rd_rs2_b24_str) +80003d94: 000d2203 lw x4,0(x26) +80003d98: 01820863 beq x4,x24,80003da8 +80003d9c: 7a4012ef jal x5,80005540 +80003da0: 80003d90 .word 0x80003d90 +80003da4: 8000ee0e .word 0x8000ee0e +80003da8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x1e15d681 +80003dac: 0000ae83 lw x29,0(x1) +80003db0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x4033e14e +80003db4: 0000ac83 lw x25,0(x1) +80003db8: 00408093 addi x1,x1,4 + +80003dbc : +Zbkb_rol_cg_cmp_rd_rs2_b25: + rol x25, x29, x25 # perform operation +80003dbc: 619e9cb3 rol x25,x29,x25 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zbkb_rol_cg_cmp_rd_rs2_b25, Zbkb_rol_cg_cmp_rd_rs2_b25_str) +80003dc0: 000d2203 lw x4,0(x26) +80003dc4: 01920863 beq x4,x25,80003dd4 +80003dc8: 778012ef jal x5,80005540 +80003dcc: 80003dbc .word 0x80003dbc +80003dd0: 8000ee45 .word 0x8000ee45 +80003dd4: 004d0d13 addi x26,x26,4 + + mv x28, x26 # switch signature pointer register to avoid conflict with test +80003dd8: 000d0e13 addi x28,x26,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x29877593 +80003ddc: 0000a883 lw x17,0(x1) +80003de0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xd8fabd9f +80003de4: 0000ad03 lw x26,0(x1) +80003de8: 00408093 addi x1,x1,4 + +80003dec : +Zbkb_rol_cg_cmp_rd_rs2_b26: + rol x26, x17, x26 # perform operation +80003dec: 61a89d33 rol x26,x17,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zbkb_rol_cg_cmp_rd_rs2_b26, Zbkb_rol_cg_cmp_rd_rs2_b26_str) +80003df0: 000e2203 lw x4,0(x28) +80003df4: 01a20863 beq x4,x26,80003e04 +80003df8: 748012ef jal x5,80005540 +80003dfc: 80003dec .word 0x80003dec +80003e00: 8000ee7c .word 0x8000ee7c +80003e04: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x242e9e02 +80003e08: 0000aa03 lw x20,0(x1) +80003e0c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x73c110c5 +80003e10: 0000ad83 lw x27,0(x1) +80003e14: 00408093 addi x1,x1,4 + +80003e18 : +Zbkb_rol_cg_cmp_rd_rs2_b27: + rol x27, x20, x27 # perform operation +80003e18: 61ba1db3 rol x27,x20,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkb_rol_cg_cmp_rd_rs2_b27, Zbkb_rol_cg_cmp_rd_rs2_b27_str) +80003e1c: 000e2203 lw x4,0(x28) +80003e20: 01b20863 beq x4,x27,80003e30 +80003e24: 71c012ef jal x5,80005540 +80003e28: 80003e18 .word 0x80003e18 +80003e2c: 8000eeb3 .word 0x8000eeb3 +80003e30: 004e0e13 addi x28,x28,4 + + mv x2, x28 # switch signature pointer register to avoid conflict with test +80003e34: 000e0113 addi x2,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x6a737251 +80003e38: 0000ab03 lw x22,0(x1) +80003e3c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x254df0f9 +80003e40: 0000ae03 lw x28,0(x1) +80003e44: 00408093 addi x1,x1,4 + +80003e48 : +Zbkb_rol_cg_cmp_rd_rs2_b28: + rol x28, x22, x28 # perform operation +80003e48: 61cb1e33 rol x28,x22,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_rol_cg_cmp_rd_rs2_b28, Zbkb_rol_cg_cmp_rd_rs2_b28_str) +80003e4c: 00012203 lw x4,0(x2) +80003e50: 01c20863 beq x4,x28,80003e60 +80003e54: 6ec012ef jal x5,80005540 +80003e58: 80003e48 .word 0x80003e48 +80003e5c: 8000eeea .word 0x8000eeea +80003e60: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0c1a1f80 +80003e64: 0000a483 lw x9,0(x1) +80003e68: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x27557d5a +80003e6c: 0000ae83 lw x29,0(x1) +80003e70: 00408093 addi x1,x1,4 + +80003e74 : +Zbkb_rol_cg_cmp_rd_rs2_b29: + rol x29, x9, x29 # perform operation +80003e74: 61d49eb3 rol x29,x9,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_rol_cg_cmp_rd_rs2_b29, Zbkb_rol_cg_cmp_rd_rs2_b29_str) +80003e78: 00012203 lw x4,0(x2) +80003e7c: 01d20863 beq x4,x29,80003e8c +80003e80: 6c0012ef jal x5,80005540 +80003e84: 80003e74 .word 0x80003e74 +80003e88: 8000ef21 .word 0x8000ef21 +80003e8c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x68af02d7 +80003e90: 0000a983 lw x19,0(x1) +80003e94: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x89666724 +80003e98: 0000af03 lw x30,0(x1) +80003e9c: 00408093 addi x1,x1,4 + +80003ea0 : +Zbkb_rol_cg_cmp_rd_rs2_b30: + rol x30, x19, x30 # perform operation +80003ea0: 61e99f33 rol x30,x19,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_rol_cg_cmp_rd_rs2_b30, Zbkb_rol_cg_cmp_rd_rs2_b30_str) +80003ea4: 00012203 lw x4,0(x2) +80003ea8: 01e20863 beq x4,x30,80003eb8 +80003eac: 694012ef jal x5,80005540 +80003eb0: 80003ea0 .word 0x80003ea0 +80003eb4: 8000ef58 .word 0x8000ef58 +80003eb8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x35b6b1b1 +80003ebc: 0000ab83 lw x23,0(x1) +80003ec0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xd1686771 +80003ec4: 0000af83 lw x31,0(x1) +80003ec8: 00408093 addi x1,x1,4 + +80003ecc : +Zbkb_rol_cg_cmp_rd_rs2_b31: + rol x31, x23, x31 # perform operation +80003ecc: 61fb9fb3 rol x31,x23,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_rol_cg_cmp_rd_rs2_b31, Zbkb_rol_cg_cmp_rd_rs2_b31_str) +80003ed0: 00012203 lw x4,0(x2) +80003ed4: 01f20863 beq x4,x31,80003ee4 +80003ed8: 668012ef jal x5,80005540 +80003edc: 80003ecc .word 0x80003ecc +80003ee0: 8000ef8f .word 0x8000ef8f +80003ee4: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x9808d442 +80003ee8: 0000a003 lw x0,0(x1) +80003eec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xbe1ef957 +80003ef0: 0000a003 lw x0,0(x1) +80003ef4: 00408093 addi x1,x1,4 + +80003ef8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b0: + rol x0, x0, x0 # perform operation +80003ef8: 60001033 rol x0,x0,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_rol_cg_cmp_rd_rs1_rs2_b0, Zbkb_rol_cg_cmp_rd_rs1_rs2_b0_str) +80003efc: 00012203 lw x4,0(x2) +80003f00: 00020863 beq x4,x0,80003f10 +80003f04: 63c012ef jal x5,80005540 +80003f08: 80003ef8 .word 0x80003ef8 +80003f0c: 8000efc6 .word 0x8000efc6 +80003f10: 00410113 addi x2,x2,4 + + mv x18, x1 # switch data pointer register to avoid conflict with test +80003f14: 00008913 addi x18,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xc734f08f +80003f18: 00092083 lw x1,0(x18) +80003f1c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x78f52047 +80003f20: 00092083 lw x1,0(x18) +80003f24: 00490913 addi x18,x18,4 + +80003f28 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b1: + rol x1, x1, x1 # perform operation +80003f28: 601090b3 rol x1,x1,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_rol_cg_cmp_rd_rs1_rs2_b1, Zbkb_rol_cg_cmp_rd_rs1_rs2_b1_str) +80003f2c: 00012203 lw x4,0(x2) +80003f30: 00120863 beq x4,x1,80003f40 +80003f34: 60c012ef jal x5,80005540 +80003f38: 80003f28 .word 0x80003f28 +80003f3c: 8000f000 .word 0x8000f000 +80003f40: 00410113 addi x2,x2,4 + + mv x3, x2 # switch signature pointer register to avoid conflict with test +80003f44: 00010193 addi x3,x2,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x6433ec70 +80003f48: 00092103 lw x2,0(x18) +80003f4c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x8c056516 +80003f50: 00092103 lw x2,0(x18) +80003f54: 00490913 addi x18,x18,4 + +80003f58 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b2: + rol x2, x2, x2 # perform operation +80003f58: 60211133 rol x2,x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_rol_cg_cmp_rd_rs1_rs2_b2, Zbkb_rol_cg_cmp_rd_rs1_rs2_b2_str) +80003f5c: 0001a203 lw x4,0(x3) +80003f60: 00220863 beq x4,x2,80003f70 +80003f64: 5dc012ef jal x5,80005540 +80003f68: 80003f58 .word 0x80003f58 +80003f6c: 8000f03a .word 0x8000f03a +80003f70: 00418193 addi x3,x3,4 + + mv x27, x3 # switch signature pointer register to avoid conflict with test +80003f74: 00018d93 addi x27,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x2c2dc095 +80003f78: 00092183 lw x3,0(x18) +80003f7c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x17c44288 +80003f80: 00092183 lw x3,0(x18) +80003f84: 00490913 addi x18,x18,4 + +80003f88 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b3: + rol x3, x3, x3 # perform operation +80003f88: 603191b3 rol x3,x3,x3 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkb_rol_cg_cmp_rd_rs1_rs2_b3, Zbkb_rol_cg_cmp_rd_rs1_rs2_b3_str) +80003f8c: 000da203 lw x4,0(x27) +80003f90: 00320863 beq x4,x3,80003fa0 +80003f94: 5ac012ef jal x5,80005540 +80003f98: 80003f88 .word 0x80003f88 +80003f9c: 8000f074 .word 0x8000f074 +80003fa0: 004d8d93 addi x27,x27,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003fa4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003fa8: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x74f4a3cd +80003fac: 00092203 lw x4,0(x18) +80003fb0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x71d5c5d3 +80003fb4: 00092203 lw x4,0(x18) +80003fb8: 00490913 addi x18,x18,4 + +80003fbc : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b4: + rol x4, x4, x4 # perform operation +80003fbc: 60421233 rol x4,x4,x4 + # Check if x4 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x4, Zbkb_rol_cg_cmp_rd_rs1_rs2_b4, Zbkb_rol_cg_cmp_rd_rs1_rs2_b4_str) +80003fc0: 000da683 lw x13,0(x27) +80003fc4: 00468863 beq x13,x4,80003fd4 +80003fc8: 5b80176f jal x14,80005580 +80003fcc: 80003fbc .word 0x80003fbc +80003fd0: 8000f0ae .word 0x8000f0ae +80003fd4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x9675d2d5 +80003fd8: 00092283 lw x5,0(x18) +80003fdc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0xbc503bb7 +80003fe0: 00092283 lw x5,0(x18) +80003fe4: 00490913 addi x18,x18,4 + +80003fe8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b5: + rol x5, x5, x5 # perform operation +80003fe8: 605292b3 rol x5,x5,x5 + # Check if x5 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x5, Zbkb_rol_cg_cmp_rd_rs1_rs2_b5, Zbkb_rol_cg_cmp_rd_rs1_rs2_b5_str) +80003fec: 000da683 lw x13,0(x27) +80003ff0: 00568863 beq x13,x5,80004000 +80003ff4: 58c0176f jal x14,80005580 +80003ff8: 80003fe8 .word 0x80003fe8 +80003ffc: 8000f0e8 .word 0x8000f0e8 +80004000: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xd3ba0031 +80004004: 00092303 lw x6,0(x18) +80004008: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x85262b22 +8000400c: 00092303 lw x6,0(x18) +80004010: 00490913 addi x18,x18,4 + +80004014 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b6: + rol x6, x6, x6 # perform operation +80004014: 60631333 rol x6,x6,x6 + # Check if x6 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x6, Zbkb_rol_cg_cmp_rd_rs1_rs2_b6, Zbkb_rol_cg_cmp_rd_rs1_rs2_b6_str) +80004018: 000da683 lw x13,0(x27) +8000401c: 00668863 beq x13,x6,8000402c +80004020: 5600176f jal x14,80005580 +80004024: 80004014 .word 0x80004014 +80004028: 8000f122 .word 0x8000f122 +8000402c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x10a2c1f3 +80004030: 00092383 lw x7,0(x18) +80004034: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xd49c9d49 +80004038: 00092383 lw x7,0(x18) +8000403c: 00490913 addi x18,x18,4 + +80004040 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b7: + rol x7, x7, x7 # perform operation +80004040: 607393b3 rol x7,x7,x7 + # Check if x7 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x7, Zbkb_rol_cg_cmp_rd_rs1_rs2_b7, Zbkb_rol_cg_cmp_rd_rs1_rs2_b7_str) +80004044: 000da683 lw x13,0(x27) +80004048: 00768863 beq x13,x7,80004058 +8000404c: 5340176f jal x14,80005580 +80004050: 80004040 .word 0x80004040 +80004054: 8000f15c .word 0x8000f15c +80004058: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xe8413d81 +8000405c: 00092403 lw x8,0(x18) +80004060: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x5d831719 +80004064: 00092403 lw x8,0(x18) +80004068: 00490913 addi x18,x18,4 + +8000406c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b8: + rol x8, x8, x8 # perform operation +8000406c: 60841433 rol x8,x8,x8 + # Check if x8 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x8, Zbkb_rol_cg_cmp_rd_rs1_rs2_b8, Zbkb_rol_cg_cmp_rd_rs1_rs2_b8_str) +80004070: 000da683 lw x13,0(x27) +80004074: 00868863 beq x13,x8,80004084 +80004078: 5080176f jal x14,80005580 +8000407c: 8000406c .word 0x8000406c +80004080: 8000f196 .word 0x8000f196 +80004084: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x015359d6 +80004088: 00092483 lw x9,0(x18) +8000408c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xf4c25444 +80004090: 00092483 lw x9,0(x18) +80004094: 00490913 addi x18,x18,4 + +80004098 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b9: + rol x9, x9, x9 # perform operation +80004098: 609494b3 rol x9,x9,x9 + # Check if x9 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x9, Zbkb_rol_cg_cmp_rd_rs1_rs2_b9, Zbkb_rol_cg_cmp_rd_rs1_rs2_b9_str) +8000409c: 000da683 lw x13,0(x27) +800040a0: 00968863 beq x13,x9,800040b0 +800040a4: 4dc0176f jal x14,80005580 +800040a8: 80004098 .word 0x80004098 +800040ac: 8000f1d0 .word 0x8000f1d0 +800040b0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x9c22221d +800040b4: 00092503 lw x10,0(x18) +800040b8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xbd3f306a +800040bc: 00092503 lw x10,0(x18) +800040c0: 00490913 addi x18,x18,4 + +800040c4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b10: + rol x10, x10, x10 # perform operation +800040c4: 60a51533 rol x10,x10,x10 + # Check if x10 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x10, Zbkb_rol_cg_cmp_rd_rs1_rs2_b10, Zbkb_rol_cg_cmp_rd_rs1_rs2_b10_str) +800040c8: 000da683 lw x13,0(x27) +800040cc: 00a68863 beq x13,x10,800040dc +800040d0: 4b00176f jal x14,80005580 +800040d4: 800040c4 .word 0x800040c4 +800040d8: 8000f20a .word 0x8000f20a +800040dc: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x427d374f +800040e0: 00092583 lw x11,0(x18) +800040e4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x16e4483b +800040e8: 00092583 lw x11,0(x18) +800040ec: 00490913 addi x18,x18,4 + +800040f0 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b11: + rol x11, x11, x11 # perform operation +800040f0: 60b595b3 rol x11,x11,x11 + # Check if x11 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x11, Zbkb_rol_cg_cmp_rd_rs1_rs2_b11, Zbkb_rol_cg_cmp_rd_rs1_rs2_b11_str) +800040f4: 000da683 lw x13,0(x27) +800040f8: 00b68863 beq x13,x11,80004108 +800040fc: 4840176f jal x14,80005580 +80004100: 800040f0 .word 0x800040f0 +80004104: 8000f245 .word 0x8000f245 +80004108: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xfe6a827c +8000410c: 00092603 lw x12,0(x18) +80004110: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xcf62b457 +80004114: 00092603 lw x12,0(x18) +80004118: 00490913 addi x18,x18,4 + +8000411c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b12: + rol x12, x12, x12 # perform operation +8000411c: 60c61633 rol x12,x12,x12 + # Check if x12 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x12, Zbkb_rol_cg_cmp_rd_rs1_rs2_b12, Zbkb_rol_cg_cmp_rd_rs1_rs2_b12_str) +80004120: 000da683 lw x13,0(x27) +80004124: 00c68863 beq x13,x12,80004134 +80004128: 4580176f jal x14,80005580 +8000412c: 8000411c .word 0x8000411c +80004130: 8000f280 .word 0x8000f280 +80004134: 004d8d93 addi x27,x27,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80004138: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000413c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xdb5a0827 +80004140: 00092683 lw x13,0(x18) +80004144: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xc366f78d +80004148: 00092683 lw x13,0(x18) +8000414c: 00490913 addi x18,x18,4 + +80004150 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b13: + rol x13, x13, x13 # perform operation +80004150: 60d696b3 rol x13,x13,x13 + # Check if x13 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x13, Zbkb_rol_cg_cmp_rd_rs1_rs2_b13, Zbkb_rol_cg_cmp_rd_rs1_rs2_b13_str) +80004154: 000da383 lw x7,0(x27) +80004158: 00d38863 beq x7,x13,80004168 +8000415c: 3fc0146f jal x8,80005558 +80004160: 80004150 .word 0x80004150 +80004164: 8000f2bb .word 0x8000f2bb +80004168: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x4b6bcfa9 +8000416c: 00092703 lw x14,0(x18) +80004170: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x1f33c64d +80004174: 00092703 lw x14,0(x18) +80004178: 00490913 addi x18,x18,4 + +8000417c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b14: + rol x14, x14, x14 # perform operation +8000417c: 60e71733 rol x14,x14,x14 + # Check if x14 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x14, Zbkb_rol_cg_cmp_rd_rs1_rs2_b14, Zbkb_rol_cg_cmp_rd_rs1_rs2_b14_str) +80004180: 000da383 lw x7,0(x27) +80004184: 00e38863 beq x7,x14,80004194 +80004188: 3d00146f jal x8,80005558 +8000418c: 8000417c .word 0x8000417c +80004190: 8000f2f6 .word 0x8000f2f6 +80004194: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x65b5665a +80004198: 00092783 lw x15,0(x18) +8000419c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x7105a43f +800041a0: 00092783 lw x15,0(x18) +800041a4: 00490913 addi x18,x18,4 + +800041a8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b15: + rol x15, x15, x15 # perform operation +800041a8: 60f797b3 rol x15,x15,x15 + # Check if x15 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x15, Zbkb_rol_cg_cmp_rd_rs1_rs2_b15, Zbkb_rol_cg_cmp_rd_rs1_rs2_b15_str) +800041ac: 000da383 lw x7,0(x27) +800041b0: 00f38863 beq x7,x15,800041c0 +800041b4: 3a40146f jal x8,80005558 +800041b8: 800041a8 .word 0x800041a8 +800041bc: 8000f331 .word 0x8000f331 +800041c0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x4bf40e22 +800041c4: 00092803 lw x16,0(x18) +800041c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x3f027a30 +800041cc: 00092803 lw x16,0(x18) +800041d0: 00490913 addi x18,x18,4 + +800041d4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b16: + rol x16, x16, x16 # perform operation +800041d4: 61081833 rol x16,x16,x16 + # Check if x16 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x16, Zbkb_rol_cg_cmp_rd_rs1_rs2_b16, Zbkb_rol_cg_cmp_rd_rs1_rs2_b16_str) +800041d8: 000da383 lw x7,0(x27) +800041dc: 01038863 beq x7,x16,800041ec +800041e0: 3780146f jal x8,80005558 +800041e4: 800041d4 .word 0x800041d4 +800041e8: 8000f36c .word 0x8000f36c +800041ec: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x50cb2148 +800041f0: 00092883 lw x17,0(x18) +800041f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x1bd2af3c +800041f8: 00092883 lw x17,0(x18) +800041fc: 00490913 addi x18,x18,4 + +80004200 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b17: + rol x17, x17, x17 # perform operation +80004200: 611898b3 rol x17,x17,x17 + # Check if x17 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x17, Zbkb_rol_cg_cmp_rd_rs1_rs2_b17, Zbkb_rol_cg_cmp_rd_rs1_rs2_b17_str) +80004204: 000da383 lw x7,0(x27) +80004208: 01138863 beq x7,x17,80004218 +8000420c: 34c0146f jal x8,80005558 +80004210: 80004200 .word 0x80004200 +80004214: 8000f3a7 .word 0x8000f3a7 +80004218: 004d8d93 addi x27,x27,4 + + mv x9, x18 # switch data pointer register to avoid conflict with test +8000421c: 00090493 addi x9,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x67812c52 +80004220: 0004a903 lw x18,0(x9) +80004224: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xc42cb3f4 +80004228: 0004a903 lw x18,0(x9) +8000422c: 00448493 addi x9,x9,4 + +80004230 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b18: + rol x18, x18, x18 # perform operation +80004230: 61291933 rol x18,x18,x18 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zbkb_rol_cg_cmp_rd_rs1_rs2_b18, Zbkb_rol_cg_cmp_rd_rs1_rs2_b18_str) +80004234: 000da383 lw x7,0(x27) +80004238: 01238863 beq x7,x18,80004248 +8000423c: 31c0146f jal x8,80005558 +80004240: 80004230 .word 0x80004230 +80004244: 8000f3e2 .word 0x8000f3e2 +80004248: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xc034dce3 +8000424c: 0004a983 lw x19,0(x9) +80004250: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x942ce530 +80004254: 0004a983 lw x19,0(x9) +80004258: 00448493 addi x9,x9,4 + +8000425c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b19: + rol x19, x19, x19 # perform operation +8000425c: 613999b3 rol x19,x19,x19 + # Check if x19 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x19, Zbkb_rol_cg_cmp_rd_rs1_rs2_b19, Zbkb_rol_cg_cmp_rd_rs1_rs2_b19_str) +80004260: 000da383 lw x7,0(x27) +80004264: 01338863 beq x7,x19,80004274 +80004268: 2f00146f jal x8,80005558 +8000426c: 8000425c .word 0x8000425c +80004270: 8000f41d .word 0x8000f41d +80004274: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x46f7b198 +80004278: 0004aa03 lw x20,0(x9) +8000427c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xb71fdc61 +80004280: 0004aa03 lw x20,0(x9) +80004284: 00448493 addi x9,x9,4 + +80004288 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b20: + rol x20, x20, x20 # perform operation +80004288: 614a1a33 rol x20,x20,x20 + # Check if x20 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x20, Zbkb_rol_cg_cmp_rd_rs1_rs2_b20, Zbkb_rol_cg_cmp_rd_rs1_rs2_b20_str) +8000428c: 000da383 lw x7,0(x27) +80004290: 01438863 beq x7,x20,800042a0 +80004294: 2c40146f jal x8,80005558 +80004298: 80004288 .word 0x80004288 +8000429c: 8000f458 .word 0x8000f458 +800042a0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x291a19b6 +800042a4: 0004aa83 lw x21,0(x9) +800042a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x789ad99d +800042ac: 0004aa83 lw x21,0(x9) +800042b0: 00448493 addi x9,x9,4 + +800042b4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b21: + rol x21, x21, x21 # perform operation +800042b4: 615a9ab3 rol x21,x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x21, Zbkb_rol_cg_cmp_rd_rs1_rs2_b21, Zbkb_rol_cg_cmp_rd_rs1_rs2_b21_str) +800042b8: 000da383 lw x7,0(x27) +800042bc: 01538863 beq x7,x21,800042cc +800042c0: 2980146f jal x8,80005558 +800042c4: 800042b4 .word 0x800042b4 +800042c8: 8000f493 .word 0x8000f493 +800042cc: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xbdaa7c7e +800042d0: 0004ab03 lw x22,0(x9) +800042d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x42206f4b +800042d8: 0004ab03 lw x22,0(x9) +800042dc: 00448493 addi x9,x9,4 + +800042e0 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b22: + rol x22, x22, x22 # perform operation +800042e0: 616b1b33 rol x22,x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x22, Zbkb_rol_cg_cmp_rd_rs1_rs2_b22, Zbkb_rol_cg_cmp_rd_rs1_rs2_b22_str) +800042e4: 000da383 lw x7,0(x27) +800042e8: 01638863 beq x7,x22,800042f8 +800042ec: 26c0146f jal x8,80005558 +800042f0: 800042e0 .word 0x800042e0 +800042f4: 8000f4ce .word 0x8000f4ce +800042f8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xec2b09a8 +800042fc: 0004ab83 lw x23,0(x9) +80004300: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x3dd91fb7 +80004304: 0004ab83 lw x23,0(x9) +80004308: 00448493 addi x9,x9,4 + +8000430c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b23: + rol x23, x23, x23 # perform operation +8000430c: 617b9bb3 rol x23,x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkb_rol_cg_cmp_rd_rs1_rs2_b23, Zbkb_rol_cg_cmp_rd_rs1_rs2_b23_str) +80004310: 000da383 lw x7,0(x27) +80004314: 01738863 beq x7,x23,80004324 +80004318: 2400146f jal x8,80005558 +8000431c: 8000430c .word 0x8000430c +80004320: 8000f509 .word 0x8000f509 +80004324: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xd5c98cc7 +80004328: 0004ac03 lw x24,0(x9) +8000432c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xefbcc63c +80004330: 0004ac03 lw x24,0(x9) +80004334: 00448493 addi x9,x9,4 + +80004338 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b24: + rol x24, x24, x24 # perform operation +80004338: 618c1c33 rol x24,x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x24, Zbkb_rol_cg_cmp_rd_rs1_rs2_b24, Zbkb_rol_cg_cmp_rd_rs1_rs2_b24_str) +8000433c: 000da383 lw x7,0(x27) +80004340: 01838863 beq x7,x24,80004350 +80004344: 2140146f jal x8,80005558 +80004348: 80004338 .word 0x80004338 +8000434c: 8000f544 .word 0x8000f544 +80004350: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xaa5962b1 +80004354: 0004ac83 lw x25,0(x9) +80004358: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x3e5f8eef +8000435c: 0004ac83 lw x25,0(x9) +80004360: 00448493 addi x9,x9,4 + +80004364 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b25: + rol x25, x25, x25 # perform operation +80004364: 619c9cb3 rol x25,x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x25, Zbkb_rol_cg_cmp_rd_rs1_rs2_b25, Zbkb_rol_cg_cmp_rd_rs1_rs2_b25_str) +80004368: 000da383 lw x7,0(x27) +8000436c: 01938863 beq x7,x25,8000437c +80004370: 1e80146f jal x8,80005558 +80004374: 80004364 .word 0x80004364 +80004378: 8000f57f .word 0x8000f57f +8000437c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x3e29562b +80004380: 0004ad03 lw x26,0(x9) +80004384: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xc9048a2b +80004388: 0004ad03 lw x26,0(x9) +8000438c: 00448493 addi x9,x9,4 + +80004390 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b26: + rol x26, x26, x26 # perform operation +80004390: 61ad1d33 rol x26,x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x26, Zbkb_rol_cg_cmp_rd_rs1_rs2_b26, Zbkb_rol_cg_cmp_rd_rs1_rs2_b26_str) +80004394: 000da383 lw x7,0(x27) +80004398: 01a38863 beq x7,x26,800043a8 +8000439c: 1bc0146f jal x8,80005558 +800043a0: 80004390 .word 0x80004390 +800043a4: 8000f5ba .word 0x8000f5ba +800043a8: 004d8d93 addi x27,x27,4 + + mv x20, x27 # switch signature pointer register to avoid conflict with test +800043ac: 000d8a13 addi x20,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xedf25728 +800043b0: 0004ad83 lw x27,0(x9) +800043b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x6ac7e115 +800043b8: 0004ad83 lw x27,0(x9) +800043bc: 00448493 addi x9,x9,4 + +800043c0 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b27: + rol x27, x27, x27 # perform operation +800043c0: 61bd9db3 rol x27,x27,x27 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zbkb_rol_cg_cmp_rd_rs1_rs2_b27, Zbkb_rol_cg_cmp_rd_rs1_rs2_b27_str) +800043c4: 000a2383 lw x7,0(x20) +800043c8: 01b38863 beq x7,x27,800043d8 +800043cc: 18c0146f jal x8,80005558 +800043d0: 800043c0 .word 0x800043c0 +800043d4: 8000f5f5 .word 0x8000f5f5 +800043d8: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x76eec6a3 +800043dc: 0004ae03 lw x28,0(x9) +800043e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x58b3dcb8 +800043e4: 0004ae03 lw x28,0(x9) +800043e8: 00448493 addi x9,x9,4 + +800043ec : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b28: + rol x28, x28, x28 # perform operation +800043ec: 61ce1e33 rol x28,x28,x28 + # Check if x28 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x28, Zbkb_rol_cg_cmp_rd_rs1_rs2_b28, Zbkb_rol_cg_cmp_rd_rs1_rs2_b28_str) +800043f0: 000a2383 lw x7,0(x20) +800043f4: 01c38863 beq x7,x28,80004404 +800043f8: 1600146f jal x8,80005558 +800043fc: 800043ec .word 0x800043ec +80004400: 8000f630 .word 0x8000f630 +80004404: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x65f8368d +80004408: 0004ae83 lw x29,0(x9) +8000440c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x048eadb6 +80004410: 0004ae83 lw x29,0(x9) +80004414: 00448493 addi x9,x9,4 + +80004418 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b29: + rol x29, x29, x29 # perform operation +80004418: 61de9eb3 rol x29,x29,x29 + # Check if x29 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x29, Zbkb_rol_cg_cmp_rd_rs1_rs2_b29, Zbkb_rol_cg_cmp_rd_rs1_rs2_b29_str) +8000441c: 000a2383 lw x7,0(x20) +80004420: 01d38863 beq x7,x29,80004430 +80004424: 1340146f jal x8,80005558 +80004428: 80004418 .word 0x80004418 +8000442c: 8000f66b .word 0x8000f66b +80004430: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x6fcd2e22 +80004434: 0004af03 lw x30,0(x9) +80004438: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7f0c93f1 +8000443c: 0004af03 lw x30,0(x9) +80004440: 00448493 addi x9,x9,4 + +80004444 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b30: + rol x30, x30, x30 # perform operation +80004444: 61ef1f33 rol x30,x30,x30 + # Check if x30 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x30, Zbkb_rol_cg_cmp_rd_rs1_rs2_b30, Zbkb_rol_cg_cmp_rd_rs1_rs2_b30_str) +80004448: 000a2383 lw x7,0(x20) +8000444c: 01e38863 beq x7,x30,8000445c +80004450: 1080146f jal x8,80005558 +80004454: 80004444 .word 0x80004444 +80004458: 8000f6a6 .word 0x8000f6a6 +8000445c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x25850dbd +80004460: 0004af83 lw x31,0(x9) +80004464: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x82fd9f49 +80004468: 0004af83 lw x31,0(x9) +8000446c: 00448493 addi x9,x9,4 + +80004470 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b31: + rol x31, x31, x31 # perform operation +80004470: 61ff9fb3 rol x31,x31,x31 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zbkb_rol_cg_cmp_rd_rs1_rs2_b31, Zbkb_rol_cg_cmp_rd_rs1_rs2_b31_str) +80004474: 000a2383 lw x7,0(x20) +80004478: 01f38863 beq x7,x31,80004488 +8000447c: 0dc0146f jal x8,80005558 +80004480: 80004470 .word 0x80004470 +80004484: 8000f6e1 .word 0x8000f6e1 +80004488: 004a0a13 addi x20,x20,4 + + mv x2, x20 # restore signature pointer to default register for teardown +8000448c: 000a0113 addi x2,x20,0 + +80004490 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004490: 00000513 addi x10,x0,0 +80004494: 00000073 ecall +80004498: fff00513 addi x10,x0,-1 +8000449c: 1d800413 addi x8,x0,472 + +800044a0 : +800044a0: 34002373 csrrs x6,mscratch,x0 + +800044a4 : +800044a4: 23832383 lw x7,568(x6) +800044a8: 23c32483 lw x9,572(x6) + +800044ac : +800044ac: 22032383 lw x7,544(x6) + +800044b0 : +800044b0: 25032483 lw x9,592(x6) +800044b4: 34049073 csrrw x0,mscratch,x9 + +800044b8 : +800044b8: 24832483 lw x9,584(x6) +800044bc: 305493f3 csrrw x7,mtvec,x9 +800044c0: ffc4f493 andi x9,x9,-4 +800044c4: ffc3f393 andi x7,x7,-4 +800044c8: 00749e63 bne x9,x7,800044e4 + +800044cc : +800044cc: 00030493 addi x9,x6,0 + +800044d0 : +800044d0: 0004a783 lw x15,0(x9) +800044d4: 00f3a023 sw x15,0(x7) +800044d8: 00438393 addi x7,x7,4 +800044dc: 00448493 addi x9,x9,4 +800044e0: fe83c8e3 blt x7,x8,800044d0 +800044e4: 0000100f fence.i + +800044e8 : +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 00000497 auipc x9,0x0 +80004504: 29048493 addi x9,x9,656 # 80004790 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 10e49863 bne x9,x14,80004630 +80004524: 00000013 addi x0,x0,0 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000c517 auipc x10,0xc +80004544: 85d50513 addi x10,x10,-1955 # 8000fd9d +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001d097 auipc x1,0x1d +80004564: 004080e7 jalr x1,4(x1) # 80021564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000c517 auipc x10,0xc +80004584: 85550513 addi x10,x10,-1963 # 8000fdd5 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001d097 auipc x1,0x1d +800045a4: fc4080e7 jalr x1,-60(x1) # 80021564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000c517 auipc x10,0xc +800045c4: 87550513 addi x10,x10,-1931 # 8000fe35 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001d097 auipc x1,0x1d +800045e4: f84080e7 jalr x1,-124(x1) # 80021564 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0000c517 auipc x10,0xc +80004604: 3e050513 addi x10,x10,992 # 800109e0 +80004608: 00000013 addi x0,x0,0 +8000460c: 00000013 addi x0,x0,0 +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 0001d097 auipc x1,0x1d +80004624: f44080e7 jalr x1,-188(x1) # 80021564 +80004628: 0001d097 auipc x1,0x1d +8000462c: f9c080e7 jalr x1,-100(x1) # 800215c4 + +80004630 : +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00004317 auipc x6,0x4 +80004644: ce830313 addi x6,x6,-792 # 80008328 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 00032303 lw x6,0(x6) +80004664: 00000013 addi x0,x0,0 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 0000d397 auipc x7,0xd +80004684: 43838393 addi x7,x7,1080 # 80011ab8 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 40730333 sub x6,x6,x7 +800046a4: 00000013 addi x0,x0,0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 0000d417 auipc x8,0xd +800046c4: 3f040413 addi x8,x8,1008 # 80011ab0 +800046c8: 00000013 addi x0,x0,0 +800046cc: 00000013 addi x0,x0,0 +800046d0: 00000013 addi x0,x0,0 +800046d4: 00000013 addi x0,x0,0 +800046d8: 00000013 addi x0,x0,0 +800046dc: 00000013 addi x0,x0,0 +800046e0: 00042203 lw x4,0(x8) +800046e4: 00620863 beq x4,x6,800046f4 +800046e8: 6c1003ef jal x7,800055a8 +800046ec: 80004630 .word 0x80004630 +800046f0: 8000ff89 .word 0x8000ff89 + +800046f4 : +800046f4: bad0e4b7 lui x9,0xbad0e +800046f8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046fc: 00e49a63 bne x9,x14,80004710 +80004700: 6a9003ef jal x7,800055a8 +80004704: 800047c4 .word 0x800047c4 +80004708: 8000fdf7 .word 0x8000fdf7 +8000470c: 00000341 .word 0x00000341 + +80004710 : +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0000b517 auipc x10,0xb +80004724: 64450513 addi x10,x10,1604 # 8000fd64 +80004728: 00000013 addi x0,x0,0 +8000472c: 00000013 addi x0,x0,0 +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0001d097 auipc x1,0x1d +80004744: e24080e7 jalr x1,-476(x1) # 80021564 +80004748: 0001d097 auipc x1,0x1d +8000474c: e5c080e7 jalr x1,-420(x1) # 800215a4 + +80004750 : +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0000b517 auipc x10,0xb +80004764: 63d50513 addi x10,x10,1597 # 8000fd9d +80004768: 00000013 addi x0,x0,0 +8000476c: 00000013 addi x0,x0,0 +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 0001d097 auipc x1,0x1d +80004784: de4080e7 jalr x1,-540(x1) # 80021564 +80004788: 0001d097 auipc x1,0x1d +8000478c: e3c080e7 jalr x1,-452(x1) # 800215c4 + +80004790 : +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: 00000717 auipc x14,0x0 +800047a4: ff070713 addi x14,x14,-16 # 80004790 +800047a8: 00000013 addi x0,x0,0 +800047ac: 00000013 addi x0,x0,0 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 +800047c0: cd1ff06f jal x0,80004490 + +800047c4 : +800047c4: bad0e737 lui x14,0xbad0e +800047c8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047cc: cc5ff06f jal x0,80004490 +800047d0: 00000013 addi x0,x0,0 +800047d4: 00000013 addi x0,x0,0 +800047d8: 00000013 addi x0,x0,0 +800047dc: 00000013 addi x0,x0,0 +800047e0: 00000013 addi x0,x0,0 +800047e4: 00000013 addi x0,x0,0 +800047e8: 00000013 addi x0,x0,0 +800047ec: 00000013 addi x0,x0,0 +800047f0: 00000013 addi x0,x0,0 +800047f4: 00000013 addi x0,x0,0 +800047f8: 00000013 addi x0,x0,0 +800047fc: 00000013 addi x0,x0,0 + +80004800 : +80004800: 0800006f jal x0,80004880 +80004804: 0880006f jal x0,8000488c +80004808: 0900006f jal x0,80004898 +8000480c: 0980006f jal x0,800048a4 +80004810: 0a00006f jal x0,800048b0 +80004814: 0a80006f jal x0,800048bc +80004818: 0b00006f jal x0,800048c8 +8000481c: 0b80006f jal x0,800048d4 +80004820: 0c00006f jal x0,800048e0 +80004824: 0c80006f jal x0,800048ec +80004828: 0d00006f jal x0,800048f8 +8000482c: 0d80006f jal x0,80004904 +80004830: 0e00006f jal x0,80004910 +80004834: 0e80006f jal x0,8000491c +80004838: 0f00006f jal x0,80004928 +8000483c: 0f80006f jal x0,80004934 +80004840: 1000006f jal x0,80004940 +80004844: 1080006f jal x0,8000494c +80004848: 1100006f jal x0,80004958 +8000484c: 1180006f jal x0,80004964 +80004850: 1200006f jal x0,80004970 +80004854: 1280006f jal x0,8000497c +80004858: 1300006f jal x0,80004988 +8000485c: 1380006f jal x0,80004994 +80004860: 1400006f jal x0,800049a0 +80004864: 13c0006f jal x0,800049a0 +80004868: 1380006f jal x0,800049a0 +8000486c: 1340006f jal x0,800049a0 +80004870: 1300006f jal x0,800049a0 +80004874: 12c0006f jal x0,800049a0 +80004878: 1280006f jal x0,800049a0 +8000487c: 1240006f jal x0,800049a0 + +80004880 : +80004880: 34011173 csrrw x2,mscratch,x2 +80004884: 26f12823 sw x15,624(x2) +80004888: 13c007ef jal x15,800049c4 +8000488c: 34011173 csrrw x2,mscratch,x2 +80004890: 26f12823 sw x15,624(x2) +80004894: 130007ef jal x15,800049c4 +80004898: 34011173 csrrw x2,mscratch,x2 +8000489c: 26f12823 sw x15,624(x2) +800048a0: 124007ef jal x15,800049c4 +800048a4: 34011173 csrrw x2,mscratch,x2 +800048a8: 26f12823 sw x15,624(x2) +800048ac: 118007ef jal x15,800049c4 +800048b0: 34011173 csrrw x2,mscratch,x2 +800048b4: 26f12823 sw x15,624(x2) +800048b8: 10c007ef jal x15,800049c4 +800048bc: 34011173 csrrw x2,mscratch,x2 +800048c0: 26f12823 sw x15,624(x2) +800048c4: 100007ef jal x15,800049c4 +800048c8: 34011173 csrrw x2,mscratch,x2 +800048cc: 26f12823 sw x15,624(x2) +800048d0: 0f4007ef jal x15,800049c4 +800048d4: 34011173 csrrw x2,mscratch,x2 +800048d8: 26f12823 sw x15,624(x2) +800048dc: 0e8007ef jal x15,800049c4 +800048e0: 34011173 csrrw x2,mscratch,x2 +800048e4: 26f12823 sw x15,624(x2) +800048e8: 0dc007ef jal x15,800049c4 +800048ec: 34011173 csrrw x2,mscratch,x2 +800048f0: 26f12823 sw x15,624(x2) +800048f4: 0d0007ef jal x15,800049c4 +800048f8: 34011173 csrrw x2,mscratch,x2 +800048fc: 26f12823 sw x15,624(x2) +80004900: 0c4007ef jal x15,800049c4 +80004904: 34011173 csrrw x2,mscratch,x2 +80004908: 26f12823 sw x15,624(x2) +8000490c: 0b8007ef jal x15,800049c4 +80004910: 34011173 csrrw x2,mscratch,x2 +80004914: 26f12823 sw x15,624(x2) +80004918: 0ac007ef jal x15,800049c4 +8000491c: 34011173 csrrw x2,mscratch,x2 +80004920: 26f12823 sw x15,624(x2) +80004924: 0a0007ef jal x15,800049c4 +80004928: 34011173 csrrw x2,mscratch,x2 +8000492c: 26f12823 sw x15,624(x2) +80004930: 094007ef jal x15,800049c4 +80004934: 34011173 csrrw x2,mscratch,x2 +80004938: 26f12823 sw x15,624(x2) +8000493c: 088007ef jal x15,800049c4 +80004940: 34011173 csrrw x2,mscratch,x2 +80004944: 26f12823 sw x15,624(x2) +80004948: 07c007ef jal x15,800049c4 +8000494c: 34011173 csrrw x2,mscratch,x2 +80004950: 26f12823 sw x15,624(x2) +80004954: 070007ef jal x15,800049c4 +80004958: 34011173 csrrw x2,mscratch,x2 +8000495c: 26f12823 sw x15,624(x2) +80004960: 064007ef jal x15,800049c4 +80004964: 34011173 csrrw x2,mscratch,x2 +80004968: 26f12823 sw x15,624(x2) +8000496c: 058007ef jal x15,800049c4 +80004970: 34011173 csrrw x2,mscratch,x2 +80004974: 26f12823 sw x15,624(x2) +80004978: 04c007ef jal x15,800049c4 +8000497c: 34011173 csrrw x2,mscratch,x2 +80004980: 26f12823 sw x15,624(x2) +80004984: 040007ef jal x15,800049c4 +80004988: 34011173 csrrw x2,mscratch,x2 +8000498c: 26f12823 sw x15,624(x2) +80004990: 034007ef jal x15,800049c4 +80004994: 34011173 csrrw x2,mscratch,x2 +80004998: 26f12823 sw x15,624(x2) +8000499c: 028007ef jal x15,800049c4 + +800049a0 : +800049a0: 00000317 auipc x6,0x0 +800049a4: b4830313 addi x6,x6,-1208 # 800044e8 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00030067 jalr x0,0(x6) + +800049c4 : +800049c4: 26e12623 sw x14,620(x2) +800049c8: 34011773 csrrw x14,mscratch,x2 +800049cc: 26e12a23 sw x14,628(x2) +800049d0: 23012703 lw x14,560(x2) +800049d4: 00070067 jalr x0,0(x14) + +800049d8 : +800049d8: 26912423 sw x9,616(x2) +800049dc: 26812223 sw x8,612(x2) +800049e0: 26712023 sw x7,608(x2) +800049e4: 24612e23 sw x6,604(x2) +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 00003317 auipc x6,0x3 +80004a04: 70830313 addi x6,x6,1800 # 80008108 +80004a08: 00000013 addi x0,x0,0 +80004a0c: 00000013 addi x0,x0,0 +80004a10: 00000013 addi x0,x0,0 +80004a14: 00000013 addi x0,x0,0 +80004a18: 00000013 addi x0,x0,0 +80004a1c: 00000013 addi x0,x0,0 +80004a20: 00032383 lw x7,0(x6) +80004a24: 00138393 addi x7,x7,1 +80004a28: 00732023 sw x7,0(x6) +80004a2c: 34202773 csrrs x14,mcause,x0 + +80004a30 : +80004a30: 800014b7 lui x9,0x80001 +80004a34: fff48493 addi x9,x9,-1 # 80000fff +80004a38: 00e4f4b3 and x9,x9,x14 + +80004a3c : +80004a3c: ffe48413 addi x8,x9,-2 +80004a40: 00041663 bne x8,x0,80004a4c + +80004a44 : +80004a44: 280506e3 beq x10,x0,800054d0 +80004a48: 58c0006f jal x0,80004fd4 + +80004a4c : +80004a4c: ff848413 addi x8,x9,-8 +80004a50: 00245413 srli x8,x8,0x2 +80004a54: 58041063 bne x8,x0,80004fd4 + +80004a58 : +80004a58: 26050ce3 beq x10,x0,800054d0 + +80004a5c : +80004a5c: fff50493 addi x9,x10,-1 +80004a60: 00500393 addi x7,x0,5 +80004a64: 0274e063 bltu x9,x7,80004a84 +80004a68: 07300393 addi x7,x0,115 +80004a6c: 00750463 beq x10,x7,80004a74 +80004a70: 0800006f jal x0,80004af0 + +80004a74 : +80004a74: 34102573 csrrs x10,mepc,x0 +80004a78: 00450413 addi x8,x10,4 +80004a7c: 34141073 csrrw x0,mepc,x8 +80004a80: 7c00006f jal x0,80005240 + +80004a84 : +80004a84: 341024f3 csrrs x9,mepc,x0 +80004a88: 00448493 addi x9,x9,4 +80004a8c: 34149073 csrrw x0,mepc,x9 +80004a90: 00100393 addi x7,x0,1 +80004a94: 00750e63 beq x10,x7,80004ab0 +80004a98: 00200393 addi x7,x0,2 +80004a9c: 02750263 beq x10,x7,80004ac0 +80004aa0: 00300393 addi x7,x0,3 +80004aa4: 02750c63 beq x10,x7,80004adc +80004aa8: fff00513 addi x10,x0,-1 +80004aac: 7940006f jal x0,80005240 + +80004ab0 : +80004ab0: 000024b7 lui x9,0x2 +80004ab4: 80048493 addi x9,x9,-2048 # 1800 +80004ab8: 3004a073 csrrs x0,mstatus,x9 +80004abc: 7840006f jal x0,80005240 + +80004ac0 : +80004ac0: 000024b7 lui x9,0x2 +80004ac4: 80048493 addi x9,x9,-2048 # 1800 +80004ac8: 3004b073 csrrc x0,mstatus,x9 +80004acc: 000014b7 lui x9,0x1 +80004ad0: 80048493 addi x9,x9,-2048 # 800 +80004ad4: 3004a073 csrrs x0,mstatus,x9 +80004ad8: 7680006f jal x0,80005240 + +80004adc : +80004adc: 000024b7 lui x9,0x2 +80004ae0: 80048493 addi x9,x9,-2048 # 1800 +80004ae4: 3004b073 csrrc x0,mstatus,x9 +80004ae8: 7580006f jal x0,80005240 + +80004aec : +80004aec: 00000013 addi x0,x0,0 + +80004af0 : +80004af0: 00000013 addi x0,x0,0 +80004af4: 00000013 addi x0,x0,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000397 auipc x7,0x0 +80004b04: 17038393 addi x7,x7,368 # 80004c70 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 + +80004b20 : +80004b20: 0003a403 lw x8,0(x7) +80004b24: 00a40863 beq x8,x10,80004b34 +80004b28: 04040863 beq x8,x0,80004b78 +80004b2c: 00838393 addi x7,x7,8 +80004b30: ff1ff06f jal x0,80004b20 + +80004b34 : +80004b34: 00008493 addi x9,x1,0 +80004b38: 00000013 addi x0,x0,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 00000097 auipc x1,0x0 +80004b44: 02408093 addi x1,x1,36 # 80004b64 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 00038067 jalr x0,0(x7) + +80004b64 : +80004b64: 00048093 addi x1,x9,0 +80004b68: 34102473 csrrs x8,mepc,x0 +80004b6c: 00440413 addi x8,x8,4 +80004b70: 34141073 csrrw x0,mepc,x8 +80004b74: 6cc0006f jal x0,80005240 + +80004b78 : +80004b78: 00050493 addi x9,x10,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000d517 auipc x10,0xd +80004b84: 89750513 addi x10,x10,-1897 # 80011417 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00048513 addi x10,x9,0 +80004bac: 02000593 addi x11,x0,32 +80004bb0: 4a8020ef jal x1,80007058 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: cc850513 addi x10,x10,-824 # 8000f888 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 29e50513 addi x10,x10,670 # 8000fe9e +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 00000013 addi x0,x0,0 +80004c2c: 00000013 addi x0,x0,0 +80004c30: 00000013 addi x0,x0,0 +80004c34: 00000013 addi x0,x0,0 +80004c38: 00000013 addi x0,x0,0 +80004c3c: 00000013 addi x0,x0,0 +80004c40: 0000b517 auipc x10,0xb +80004c44: 15d50513 addi x10,x10,349 # 8000fd9d +80004c48: 00000013 addi x0,x0,0 +80004c4c: 00000013 addi x0,x0,0 +80004c50: 00000013 addi x0,x0,0 +80004c54: 00000013 addi x0,x0,0 +80004c58: 00000013 addi x0,x0,0 +80004c5c: 00000013 addi x0,x0,0 +80004c60: 0001d097 auipc x1,0x1d +80004c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80004c68: 0001d097 auipc x1,0x1d +80004c6c: 95c080e7 jalr x1,-1700(x1) # 800215c4 + +80004c70 : +80004c70: 30002573 .word 0x30002573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30059073 .word 0x30059073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3005a073 .word 0x3005a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3005b073 .word 0x3005b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30402573 .word 0x30402573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30459073 .word 0x30459073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 3045a073 .word 0x3045a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 3045b073 .word 0x3045b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 30602573 .word 0x30602573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 30659073 .word 0x30659073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3065a073 .word 0x3065a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3065b073 .word 0x3065b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 30a02573 .word 0x30a02573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 30a59073 .word 0x30a59073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 30a5a073 .word 0x30a5a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 30a5b073 .word 0x30a5b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 34402573 .word 0x34402573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 34459073 .word 0x34459073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3445a073 .word 0x3445a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3445b073 .word 0x3445b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: 74702573 .word 0x74702573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: 74759073 .word 0x74759073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: 7475a073 .word 0x7475a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: 7475b073 .word 0x7475b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: 32002573 .word 0x32002573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: 32059073 .word 0x32059073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: 3205a073 .word 0x3205a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: 3205b073 .word 0x3205b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: b0002573 .word 0xb0002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: b0059073 .word 0xb0059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: b005a073 .word 0xb005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: b005b073 .word 0xb005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: b0202573 .word 0xb0202573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: b0259073 .word 0xb0259073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: b025a073 .word 0xb025a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: b025b073 .word 0xb025b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10002573 .word 0x10002573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10059073 .word 0x10059073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1005a073 .word 0x1005a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1005b073 .word 0x1005b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10402573 .word 0x10402573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10459073 .word 0x10459073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 1045a073 .word 0x1045a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 1045b073 .word 0x1045b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 10602573 .word 0x10602573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 10659073 .word 0x10659073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1065a073 .word 0x1065a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1065b073 .word 0x1065b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 10a02573 .word 0x10a02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 10a59073 .word 0x10a59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 10a5a073 .word 0x10a5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 10a5b073 .word 0x10a5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 14402573 .word 0x14402573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 14459073 .word 0x14459073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1445a073 .word 0x1445a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1445b073 .word 0x1445b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 14d02573 .word 0x14d02573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 14d59073 .word 0x14d59073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 14d5a073 .word 0x14d5a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 14d5b073 .word 0x14d5b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 18002573 .word 0x18002573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 18059073 .word 0x18059073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 1805a073 .word 0x1805a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 1805b073 .word 0x1805b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a002573 .word 0x7a002573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a059073 .word 0x7a059073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a05a073 .word 0x7a05a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a05b073 .word 0x7a05b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a102573 .word 0x7a102573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a159073 .word 0x7a159073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a15a073 .word 0x7a15a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a15b073 .word 0x7a15b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a202573 .word 0x7a202573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a259073 .word 0x7a259073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a25a073 .word 0x7a25a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a25b073 .word 0x7a25b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a302573 .word 0x7a302573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a359073 .word 0x7a359073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a35a073 .word 0x7a35a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a35b073 .word 0x7a35b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a402573 .word 0x7a402573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a459073 .word 0x7a459073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a45a073 .word 0x7a45a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a45b073 .word 0x7a45b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7a502573 .word 0x7a502573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7a559073 .word 0x7a559073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7a55a073 .word 0x7a55a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7a55b073 .word 0x7a55b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 7a802573 .word 0x7a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 7a859073 .word 0x7a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 7a85a073 .word 0x7a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 7a85b073 .word 0x7a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 7aa02573 .word 0x7aa02573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 7aa59073 .word 0x7aa59073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 7aa5a073 .word 0x7aa5a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 7aa5b073 .word 0x7aa5b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 5a802573 .word 0x5a802573 +80004f74: 00008067 jalr x0,0(x1) +80004f78: 5a859073 .word 0x5a859073 +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 5a85a073 .word 0x5a85a073 +80004f84: 00008067 jalr x0,0(x1) +80004f88: 5a85b073 .word 0x5a85b073 +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 6a802573 .word 0x6a802573 +80004f94: 00008067 jalr x0,0(x1) +80004f98: 6a859073 .word 0x6a859073 +80004f9c: 00008067 jalr x0,0(x1) +80004fa0: 6a85a073 .word 0x6a85a073 +80004fa4: 00008067 jalr x0,0(x1) +80004fa8: 6a85b073 .word 0x6a85b073 +80004fac: 00008067 jalr x0,0(x1) +80004fb0: 0005a503 lw x10,0(x11) +80004fb4: 00008067 jalr x0,0(x1) +80004fb8: 0045a503 lw x10,4(x11) +80004fbc: 00008067 jalr x0,0(x1) +80004fc0: 00c5a023 sw x12,0(x11) +80004fc4: 00008067 jalr x0,0(x1) +80004fc8: 00c5a223 sw x12,4(x11) +80004fcc: 00008067 jalr x0,0(x1) +80004fd0: 00000000 .word 0x00000000 + +80004fd4 : +80004fd4: 01000393 addi x7,x0,16 +80004fd8: 00075c63 bge x14,x0,80004ff0 + +80004fdc : +80004fdc: 00171413 slli x8,x14,0x1 +80004fe0: ff240413 addi x8,x8,-14 +80004fe4: 00045663 bge x8,x0,80004ff0 +80004fe8: 00c00393 addi x7,x0,12 +80004fec: 0040006f jal x0,80004ff0 + +80004ff0 : +80004ff0: d6810113 addi x2,x2,-664 +80004ff4: 4b012303 lw x6,1200(x2) +80004ff8: 007304b3 add x9,x6,x7 +80004ffc: 4a912823 sw x9,1200(x2) +80005000: 49012403 lw x8,1168(x2) +80005004: 40830333 sub x6,x6,x8 +80005008: 29810113 addi x2,x2,664 +8000500c: 1f812403 lw x8,504(x2) +80005010: 00830333 add x6,x6,x8 +80005014: 34102473 csrrs x8,mepc,x0 +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0000b497 auipc x9,0xb +80005024: 84848493 addi x9,x9,-1976 # 8000f868 +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 0084a023 sw x8,0(x9) +80005044: 00e4a423 sw x14,8(x9) +80005048: 34302473 csrrs x8,mtval,x0 +8000504c: 0084a823 sw x8,16(x9) +80005050: 30002473 csrrs x8,mstatus,x0 +80005054: 0084ac23 sw x8,24(x9) +80005058: 00000013 addi x0,x0,0 +8000505c: 00000013 addi x0,x0,0 +80005060: 0001b417 auipc x8,0x1b +80005064: 4bc40413 addi x8,x8,1212 # 8002051c +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 007304b3 add x9,x6,x7 +80005084: f0946663 bltu x8,x9,80004790 + +80005088 : +80005088: 24012403 lw x8,576(x2) +8000508c: 408787b3 sub x15,x15,x8 +80005090: 00179493 slli x9,x15,0x1 +80005094: 009787b3 add x15,x15,x9 +80005098: 0057d793 srli x15,x15,0x5 +8000509c: 00679793 slli x15,x15,0x6 +800050a0: 0077e7b3 or x15,x15,x7 +800050a4: 00378793 addi x15,x15,3 +800050a8: 02075a63 bge x14,x0,800050dc +800050ac: 00f00413 addi x8,x0,15 +800050b0: 00877433 and x8,x14,x8 +800050b4: 304024f3 csrrs x9,mie,x0 +800050b8: 0084d4b3 srl x9,x9,x8 +800050bc: 0014f493 andi x9,x9,1 +800050c0: 00b49493 slli x9,x9,0xb +800050c4: 0097e7b3 or x15,x15,x9 +800050c8: 344024f3 csrrs x9,mip,x0 +800050cc: 0084d4b3 srl x9,x9,x8 +800050d0: 0014f493 andi x9,x9,1 +800050d4: 00c49493 slli x9,x9,0xc +800050d8: 0097e7b3 or x15,x15,x9 +800050dc: 300023f3 csrrs x7,mstatus,x0 +800050e0: 00f39393 slli x7,x7,0xf +800050e4: 0023d393 srli x7,x7,0x2 +800050e8: 0021a437 lui x8,0x21a +800050ec: fe540413 addi x8,x8,-27 # 219fe5 +800050f0: fff44413 xori x8,x8,-1 +800050f4: 0083f433 and x8,x7,x8 +800050f8: 0087e433 or x8,x15,x8 +800050fc: 310024f3 csrrs x9,0x310,x0 +80005100: 1c04f493 andi x9,x9,448 +80005104: 00849493 slli x9,x9,0x8 +80005108: 00946433 or x8,x8,x9 +8000510c: 00032483 lw x9,0(x6) +80005110: 00848e63 beq x9,x8,8000512c +80005114: 00040313 addi x6,x8,0 +80005118: 00048213 addi x4,x9,0 +8000511c: 48c003ef jal x7,800055a8 +80005120: 80005088 .word 0x80005088 +80005124: 8000ffa0 .word 0x8000ffa0 +80005128: 00000341 .word 0x00000341 + +8000512c : +8000512c: 00070413 addi x8,x14,0 +80005130: 00432483 lw x9,4(x6) +80005134: 00848e63 beq x9,x8,80005150 +80005138: 00040313 addi x6,x8,0 +8000513c: 00048213 addi x4,x9,0 +80005140: 468003ef jal x7,800055a8 +80005144: 8000512c .word 0x8000512c +80005148: 800100a2 .word 0x800100a2 +8000514c: 00000341 .word 0x00000341 +80005150: 10074863 blt x14,x0,80005260 + +80005154 : +80005154: 34102473 csrrs x8,mepc,x0 +80005158: 00010493 addi x9,x2,0 +8000515c: 0040006f jal x0,80005160 + +80005160 : +80005160: 08000393 addi x7,x0,128 +80005164: 04740863 beq x8,x7,800051b4 +80005168: 00238393 addi x7,x7,2 +8000516c: 04740463 beq x8,x7,800051b4 +80005170: 04040263 beq x8,x0,800051b4 +80005174: 2084a383 lw x7,520(x9) +80005178: 2104a783 lw x15,528(x9) +8000517c: 007787b3 add x15,x15,x7 +80005180: 00f47463 bgeu x8,x15,80005188 +80005184: 02747663 bgeu x8,x7,800051b0 + +80005188 : +80005188: 1d84a383 lw x7,472(x9) +8000518c: 1e04a783 lw x15,480(x9) +80005190: 007787b3 add x15,x15,x7 +80005194: 00f47463 bgeu x8,x15,8000519c +80005198: 00747c63 bgeu x8,x7,800051b0 + +8000519c : +8000519c: 1e84a383 lw x7,488(x9) +800051a0: 1f04a783 lw x15,496(x9) +800051a4: 007787b3 add x15,x15,x7 +800051a8: e0f47e63 bgeu x8,x15,800047c4 +800051ac: e0746c63 bltu x8,x7,800047c4 + +800051b0 : +800051b0: 40740433 sub x8,x8,x7 + +800051b4 : +800051b4: 00832483 lw x9,8(x6) +800051b8: 00848e63 beq x9,x8,800051d4 +800051bc: 00040313 addi x6,x8,0 +800051c0: 00048213 addi x4,x9,0 +800051c4: 3e4003ef jal x7,800055a8 +800051c8: 800051b4 .word 0x800051b4 +800051cc: 8001019d .word 0x8001019d +800051d0: 00000341 .word 0x00000341 + +800051d4 : +800051d4: 34102473 csrrs x8,mepc,x0 +800051d8: 342023f3 csrrs x7,mcause,x0 +800051dc: 00c00793 addi x15,x0,12 +800051e0: 00f38a63 beq x7,x15,800051f4 +800051e4: 00100793 addi x15,x0,1 +800051e8: 00f38663 beq x7,x15,800051f4 +800051ec: 01400793 addi x15,x0,20 +800051f0: 00f39663 bne x7,x15,800051fc +800051f4: 34109073 csrrw x0,mepc,x1 +800051f8: 0100006f jal x0,80005208 + +800051fc : +800051fc: 00400393 addi x7,x0,4 +80005200: 00740433 add x8,x8,x7 +80005204: 34141073 csrrw x0,mepc,x8 + +80005208 : +80005208: 34302473 csrrs x8,mtval,x0 + +8000520c : +8000520c: 00c32483 lw x9,12(x6) +80005210: 00848e63 beq x9,x8,8000522c +80005214: 00040313 addi x6,x8,0 +80005218: 00048213 addi x4,x9,0 +8000521c: 38c003ef jal x7,800055a8 +80005220: 8000520c .word 0x8000520c +80005224: 80010290 .word 0x80010290 +80005228: 00000341 .word 0x00000341 + +8000522c : +8000522c: 30102473 csrrs x8,misa,x0 +80005230: 01841413 slli x8,x8,0x18 +80005234: 00045263 bge x8,x0,80005238 + +80005238 : +80005238: 10000393 addi x7,x0,256 +8000523c: 05c0006f jal x0,80005298 + +80005240 : +80005240: 25c12303 lw x6,604(x2) +80005244: 26012383 lw x7,608(x2) +80005248: 26412403 lw x8,612(x2) +8000524c: 26812483 lw x9,616(x2) +80005250: 26c12703 lw x14,620(x2) +80005254: 27012783 lw x15,624(x2) +80005258: 27412103 lw x2,628(x2) +8000525c: 30200073 mret + +80005260 : +80005260: 00100413 addi x8,x0,1 +80005264: 01f77393 andi x7,x14,31 +80005268: 00741433 sll x8,x8,x7 +8000526c: 304434f3 csrrc x9,mie,x8 +80005270: 34443473 csrrc x8,mip,x8 + +80005274 : +80005274: 00832483 lw x9,8(x6) +80005278: 00848e63 beq x9,x8,80005294 +8000527c: 00040313 addi x6,x8,0 +80005280: 00048213 addi x4,x9,0 +80005284: 324003ef jal x7,800055a8 +80005288: 80005274 .word 0x80005274 +8000528c: 80010403 .word 0x80010403 +80005290: 00000341 .word 0x00000341 +80005294: 00000393 addi x7,x0,0 + +80005298 : +80005298: 00000417 auipc x8,0x0 +8000529c: 03c40413 addi x8,x8,60 # 800052d4 +800052a0: 00740433 add x8,x8,x7 +800052a4: 00371393 slli x7,x14,0x3 +800052a8: 00740433 add x8,x8,x7 +800052ac: ff847413 andi x8,x8,-8 +800052b0: 00042403 lw x8,0(x8) + +800052b4 : +800052b4: 00040a63 beq x8,x0,800052c8 +800052b8: 01f41393 slli x7,x8,0x1f +800052bc: 0003d863 bge x7,x0,800052cc +800052c0: 00145413 srli x8,x8,0x1 +800052c4: f6870ee3 beq x14,x8,80005240 +800052c8: cfcff06f jal x0,800047c4 + +800052cc : +800052cc: 00040067 jalr x0,0(x8) + +800052d0 : + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021000 .word 0x80021000 + ... +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 80021014 .word 0x80021014 + ... +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 80021030 .word 0x80021030 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 +8000534c: 00000000 .word 0x00000000 +80005350: 00000001 .word 0x00000001 +80005354: 00000000 .word 0x00000000 +80005358: 00000001 .word 0x00000001 +8000535c: 00000000 .word 0x00000000 +80005360: 00000001 .word 0x00000001 +80005364: 00000000 .word 0x00000000 +80005368: 00000001 .word 0x00000001 +8000536c: 00000000 .word 0x00000000 +80005370: 00000001 .word 0x00000001 +80005374: 00000000 .word 0x00000000 +80005378: 00000001 .word 0x00000001 +8000537c: 00000000 .word 0x00000000 +80005380: 00000001 .word 0x00000001 +80005384: 00000000 .word 0x00000000 +80005388: 00000001 .word 0x00000001 + ... + +800053d0 : +800053d0: 00000001 .word 0x00000001 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000003 .word 0x00000003 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000005 .word 0x00000005 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000007 .word 0x00000007 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000009 .word 0x00000009 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000000b .word 0x0000000b +800053fc: 00000000 .word 0x00000000 +80005400: 0000000d .word 0x0000000d +80005404: 00000000 .word 0x00000000 +80005408: 0000000f .word 0x0000000f +8000540c: 00000000 .word 0x00000000 +80005410: 00000011 .word 0x00000011 +80005414: 00000000 .word 0x00000000 +80005418: 00000013 .word 0x00000013 +8000541c: 00000000 .word 0x00000000 +80005420: 00000015 .word 0x00000015 +80005424: 00000000 .word 0x00000000 +80005428: 00000017 .word 0x00000017 +8000542c: 00000000 .word 0x00000000 +80005430: 00000019 .word 0x00000019 +80005434: 00000000 .word 0x00000000 +80005438: 0000001b .word 0x0000001b +8000543c: 00000000 .word 0x00000000 +80005440: 0000001d .word 0x0000001d +80005444: 00000000 .word 0x00000000 +80005448: 0000001f .word 0x0000001f +8000544c: 00000000 .word 0x00000000 +80005450: 00000021 .word 0x00000021 +80005454: 00000000 .word 0x00000000 +80005458: 00000023 .word 0x00000023 +8000545c: 00000000 .word 0x00000000 +80005460: 00000025 .word 0x00000025 +80005464: 00000000 .word 0x00000000 +80005468: 00000027 .word 0x00000027 +8000546c: 00000000 .word 0x00000000 +80005470: 00000029 .word 0x00000029 +80005474: 00000000 .word 0x00000000 +80005478: 0000002b .word 0x0000002b +8000547c: 00000000 .word 0x00000000 +80005480: 0000002d .word 0x0000002d +80005484: 00000000 .word 0x00000000 +80005488: 0000002f .word 0x0000002f + ... + +800054d0 : +800054d0: 300023f3 csrrs x7,mstatus,x0 +800054d4: 00b3d493 srli x9,x7,0xb +800054d8: 0034f493 andi x9,x9,3 +800054dc: ffd48413 addi x8,x9,-3 +800054e0: 341023f3 csrrs x7,mepc,x0 +800054e4: 00000493 addi x9,x0,0 +800054e8: 02040c63 beq x8,x0,80005520 +800054ec: 29810113 addi x2,x2,664 +800054f0: 310023f3 csrrs x7,0x310,x0 +800054f4: 01839393 slli x7,x7,0x18 +800054f8: 0003da63 bge x7,x0,8000550c + +800054fc : +800054fc: 29810113 addi x2,x2,664 +80005500: 47012783 lw x15,1136(x2) +80005504: d6810113 addi x2,x2,-664 +80005508: 0080006f jal x0,80005510 + +8000550c : +8000550c: f4012783 lw x15,-192(x2) +80005510: 341023f3 csrrs x7,mepc,x0 +80005514: 40f383b3 sub x7,x7,x15 +80005518: d6810113 addi x2,x2,-664 +8000551c: 1d812483 lw x9,472(x2) + +80005520 : +80005520: 007483b3 add x7,x9,x7 +80005524: 25c12303 lw x6,604(x2) +80005528: 26412403 lw x8,612(x2) +8000552c: 26812483 lw x9,616(x2) +80005530: 26c12703 lw x14,620(x2) +80005534: 27012783 lw x15,624(x2) +80005538: 27412103 lw x2,628(x2) +8000553c: 00438067 jalr x0,4(x7) + +80005540 : +80005540: 0000a217 auipc x4,0xa +80005544: 1e020213 addi x4,x4,480 # 8000f720 +80005548: 02522423 sw x5,40(x4) # 28 +8000554c: 00122423 sw x1,8(x4) # 8 +80005550: 00022023 sw x0,0(x4) # 0 +80005554: 0880006f jal x0,800055dc + +80005558 : +80005558: 0000a397 auipc x7,0xa +8000555c: 1c838393 addi x7,x7,456 # 8000f720 +80005560: 0483a023 sw x8,64(x7) +80005564: 0243a023 sw x4,32(x7) +80005568: 0253a423 sw x5,40(x7) +8000556c: 0013a423 sw x1,8(x7) +80005570: 0003a023 sw x0,0(x7) +80005574: 00038213 addi x4,x7,0 +80005578: 00040293 addi x5,x8,0 +8000557c: 0600006f jal x0,800055dc + +80005580 : +80005580: 0000a697 auipc x13,0xa +80005584: 1a068693 addi x13,x13,416 # 8000f720 +80005588: 06e6a823 sw x14,112(x13) +8000558c: 0246a023 sw x4,32(x13) +80005590: 0256a423 sw x5,40(x13) +80005594: 0016a423 sw x1,8(x13) +80005598: 0006a023 sw x0,0(x13) +8000559c: 00068213 addi x4,x13,0 +800055a0: 00070293 addi x5,x14,0 +800055a4: 0380006f jal x0,800055dc + +800055a8 : +800055a8: 0000a497 auipc x9,0xa +800055ac: 17848493 addi x9,x9,376 # 8000f720 +800055b0: 0674a423 sw x7,104(x9) +800055b4: 0244a023 sw x4,32(x9) +800055b8: 0254a423 sw x5,40(x9) +800055bc: 0014a423 sw x1,8(x9) +800055c0: 00300093 addi x1,x0,3 +800055c4: 0014a023 sw x1,0(x9) +800055c8: 1064a823 sw x6,272(x9) +800055cc: 1044ac23 sw x4,280(x9) +800055d0: 00048213 addi x4,x9,0 +800055d4: 00038293 addi x5,x7,0 +800055d8: 0040006f jal x0,800055dc + +800055dc : +800055dc: 00222823 sw x2,16(x4) # 10 +800055e0: 00322c23 sw x3,24(x4) # 18 +800055e4: 02622823 sw x6,48(x4) # 30 +800055e8: 02722c23 sw x7,56(x4) # 38 +800055ec: 04822023 sw x8,64(x4) # 40 +800055f0: 04922423 sw x9,72(x4) # 48 +800055f4: 04a22823 sw x10,80(x4) # 50 +800055f8: 04b22c23 sw x11,88(x4) # 58 +800055fc: 06c22023 sw x12,96(x4) # 60 +80005600: 06d22423 sw x13,104(x4) # 68 +80005604: 06e22823 sw x14,112(x4) # 70 +80005608: 06f22c23 sw x15,120(x4) # 78 +8000560c: 09022023 sw x16,128(x4) # 80 +80005610: 09122423 sw x17,136(x4) # 88 +80005614: 09222823 sw x18,144(x4) # 90 +80005618: 09322c23 sw x19,152(x4) # 98 +8000561c: 0b422023 sw x20,160(x4) # a0 +80005620: 0b522423 sw x21,168(x4) # a8 +80005624: 0b622823 sw x22,176(x4) # b0 +80005628: 0b722c23 sw x23,184(x4) # b8 +8000562c: 0d822023 sw x24,192(x4) # c0 +80005630: 0d922423 sw x25,200(x4) # c8 +80005634: 0da22823 sw x26,208(x4) # d0 +80005638: 0db22c23 sw x27,216(x4) # d8 +8000563c: 0fc22023 sw x28,224(x4) # e0 +80005640: 0fd22423 sw x29,232(x4) # e8 +80005644: 0fe22823 sw x30,240(x4) # f0 +80005648: 0ff22c23 sw x31,248(x4) # f8 + +8000564c : +8000564c: 0000a497 auipc x9,0xa +80005650: 0d44a483 lw x9,212(x9) # 8000f720 +80005654: 00300513 addi x10,x0,3 +80005658: 18a48a63 beq x9,x10,800057ec + +8000565c : +8000565c: ffa2d303 lhu x6,-6(x5) +80005660: ff82d383 lhu x7,-8(x5) +80005664: 01031313 slli x6,x6,0x10 +80005668: 00736333 or x6,x6,x7 +8000566c: 00f35393 srli x7,x6,0xf +80005670: 01f3f393 andi x7,x7,31 +80005674: 01435413 srli x8,x6,0x14 +80005678: 01f47413 andi x8,x8,31 +8000567c: 10822223 sw x8,260(x4) # 104 +80005680: 00341313 slli x6,x8,0x3 +80005684: 00620333 add x6,x4,x6 +80005688: 00032303 lw x6,0(x6) +8000568c: 10622823 sw x6,272(x4) # 110 +80005690: ff62d303 lhu x6,-10(x5) +80005694: ff42d383 lhu x7,-12(x5) +80005698: 01031313 slli x6,x6,0x10 +8000569c: 00736333 or x6,x6,x7 +800056a0: 00030513 addi x10,x6,0 +800056a4: 07f37413 andi x8,x6,127 +800056a8: 00300493 addi x9,x0,3 +800056ac: 0c941463 bne x8,x9,80005774 +800056b0: 00c35413 srli x8,x6,0xc +800056b4: 00747413 andi x8,x8,7 +800056b8: 00200493 addi x9,x0,2 +800056bc: 0a941c63 bne x8,x9,80005774 +800056c0: 41435393 srai x7,x6,0x14 +800056c4: 00f35313 srli x6,x6,0xf +800056c8: 01f37313 andi x6,x6,31 +800056cc: 00331313 slli x6,x6,0x3 +800056d0: 00620333 add x6,x4,x6 +800056d4: 00032303 lw x6,0(x6) +800056d8: 00730333 add x6,x6,x7 +800056dc: 00337413 andi x8,x6,3 +800056e0: 0c041663 bne x8,x0,800057ac +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0000c417 auipc x8,0xc +80005704: d6040413 addi x8,x8,-672 # 80011460 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 08836663 bltu x6,x8,800057ac +80005724: 00000013 addi x0,x0,0 +80005728: 00000013 addi x0,x0,0 +8000572c: 00000013 addi x0,x0,0 +80005730: 00000013 addi x0,x0,0 +80005734: 00000013 addi x0,x0,0 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0001b417 auipc x8,0x1b +80005744: de040413 addi x8,x8,-544 # 80020520 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: ffc40413 addi x8,x8,-4 +80005764: 04646463 bltu x8,x6,800057ac +80005768: 00032303 lw x6,0(x6) +8000576c: 10622c23 sw x6,280(x4) # 118 +80005770: 3700006f jal x0,80005ae0 + +80005774 : +80005774: 00100413 addi x8,x0,1 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 0c848493 addi x9,x9,200 # 8000f848 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10a22c23 sw x10,280(x4) # 118 +800057a8: 3380006f jal x0,80005ae0 + +800057ac : +800057ac: 00200413 addi x8,x0,2 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 0000a497 auipc x9,0xa +800057c4: 08848493 addi x9,x9,136 # 8000f848 +800057c8: 00000013 addi x0,x0,0 +800057cc: 00000013 addi x0,x0,0 +800057d0: 00000013 addi x0,x0,0 +800057d4: 00000013 addi x0,x0,0 +800057d8: 00000013 addi x0,x0,0 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0084a023 sw x8,0(x9) +800057e4: 10622c23 sw x6,280(x4) # 118 +800057e8: 2f80006f jal x0,80005ae0 + +800057ec : +800057ec: 0042a303 lw x6,4(x5) +800057f0: 0000a817 auipc x16,0xa +800057f4: 06880813 addi x16,x16,104 # 8000f858 +800057f8: 00682023 sw x6,0(x16) +800057fc: 0002a303 lw x6,0(x5) +80005800: 10622423 sw x6,264(x4) # 108 +80005804: 0000a817 auipc x16,0xa +80005808: 05480813 addi x16,x16,84 # 8000f858 +8000580c: 00082303 lw x6,0(x16) +80005810: 0000a397 auipc x7,0xa +80005814: 77938393 addi x7,x7,1913 # 8000ff89 +80005818: 28730463 beq x6,x7,80005aa0 +8000581c: 00000413 addi x8,x0,0 +80005820: 0000a817 auipc x16,0xa +80005824: 03080813 addi x16,x16,48 # 8000f850 +80005828: 00882023 sw x8,0(x16) +8000582c: 0000a397 auipc x7,0xa +80005830: 77438393 addi x7,x7,1908 # 8000ffa0 +80005834: 00731863 bne x6,x7,80005844 +80005838: 00100413 addi x8,x0,1 +8000583c: 00000493 addi x9,x0,0 +80005840: 2740006f jal x0,80005ab4 +80005844: 0000b397 auipc x7,0xb +80005848: 85e38393 addi x7,x7,-1954 # 800100a2 +8000584c: 00731863 bne x6,x7,8000585c +80005850: 00200413 addi x8,x0,2 +80005854: 00000493 addi x9,x0,0 +80005858: 25c0006f jal x0,80005ab4 +8000585c: 0000b397 auipc x7,0xb +80005860: 94138393 addi x7,x7,-1727 # 8001019d +80005864: 00731863 bne x6,x7,80005874 +80005868: 00300413 addi x8,x0,3 +8000586c: 00000493 addi x9,x0,0 +80005870: 2440006f jal x0,80005ab4 +80005874: 0000b397 auipc x7,0xb +80005878: a1c38393 addi x7,x7,-1508 # 80010290 +8000587c: 00731863 bne x6,x7,8000588c +80005880: 00400413 addi x8,x0,4 +80005884: 00000493 addi x9,x0,0 +80005888: 22c0006f jal x0,80005ab4 +8000588c: 0000b397 auipc x7,0xb +80005890: b7738393 addi x7,x7,-1161 # 80010403 +80005894: 00731863 bne x6,x7,800058a4 +80005898: 00500413 addi x8,x0,5 +8000589c: 00000493 addi x9,x0,0 +800058a0: 2140006f jal x0,80005ab4 +800058a4: 0000b397 auipc x7,0xb +800058a8: ae338393 addi x7,x7,-1309 # 80010387 +800058ac: 00731863 bne x6,x7,800058bc +800058b0: 00600413 addi x8,x0,6 +800058b4: 00000493 addi x9,x0,0 +800058b8: 1fc0006f jal x0,80005ab4 +800058bc: 0000b397 auipc x7,0xb +800058c0: b0938393 addi x7,x7,-1271 # 800103c5 +800058c4: 00731863 bne x6,x7,800058d4 +800058c8: 00700413 addi x8,x0,7 +800058cc: 00000493 addi x9,x0,0 +800058d0: 1e40006f jal x0,80005ab4 +800058d4: 0000a397 auipc x7,0xa +800058d8: 70c38393 addi x7,x7,1804 # 8000ffe0 +800058dc: 00731863 bne x6,x7,800058ec +800058e0: 00100413 addi x8,x0,1 +800058e4: 00100493 addi x9,x0,1 +800058e8: 1cc0006f jal x0,80005ab4 +800058ec: 0000a397 auipc x7,0xa +800058f0: 7f438393 addi x7,x7,2036 # 800100e0 +800058f4: 00731863 bne x6,x7,80005904 +800058f8: 00200413 addi x8,x0,2 +800058fc: 00100493 addi x9,x0,1 +80005900: 1b40006f jal x0,80005ab4 +80005904: 0000b397 auipc x7,0xb +80005908: 8d538393 addi x7,x7,-1835 # 800101d9 +8000590c: 00731863 bne x6,x7,8000591c +80005910: 00300413 addi x8,x0,3 +80005914: 00100493 addi x9,x0,1 +80005918: 19c0006f jal x0,80005ab4 +8000591c: 0000b397 auipc x7,0xb +80005920: 9b138393 addi x7,x7,-1615 # 800102cd +80005924: 00731863 bne x6,x7,80005934 +80005928: 00400413 addi x8,x0,4 +8000592c: 00100493 addi x9,x0,1 +80005930: 1840006f jal x0,80005ab4 +80005934: 0000b397 auipc x7,0xb +80005938: b0a38393 addi x7,x7,-1270 # 8001043e +8000593c: 00731863 bne x6,x7,8000594c +80005940: 00500413 addi x8,x0,5 +80005944: 00100493 addi x9,x0,1 +80005948: 16c0006f jal x0,80005ab4 +8000594c: 0000a397 auipc x7,0xa +80005950: 6d438393 addi x7,x7,1748 # 80010020 +80005954: 00731863 bne x6,x7,80005964 +80005958: 00100413 addi x8,x0,1 +8000595c: 00200493 addi x9,x0,2 +80005960: 1540006f jal x0,80005ab4 +80005964: 0000a397 auipc x7,0xa +80005968: 7ba38393 addi x7,x7,1978 # 8001011e +8000596c: 00731863 bne x6,x7,8000597c +80005970: 00200413 addi x8,x0,2 +80005974: 00200493 addi x9,x0,2 +80005978: 13c0006f jal x0,80005ab4 +8000597c: 0000b397 auipc x7,0xb +80005980: 89938393 addi x7,x7,-1895 # 80010215 +80005984: 00731863 bne x6,x7,80005994 +80005988: 00300413 addi x8,x0,3 +8000598c: 00200493 addi x9,x0,2 +80005990: 1240006f jal x0,80005ab4 +80005994: 0000b397 auipc x7,0xb +80005998: 97638393 addi x7,x7,-1674 # 8001030a +8000599c: 00731863 bne x6,x7,800059ac +800059a0: 00400413 addi x8,x0,4 +800059a4: 00200493 addi x9,x0,2 +800059a8: 10c0006f jal x0,80005ab4 +800059ac: 0000b397 auipc x7,0xb +800059b0: acd38393 addi x7,x7,-1331 # 80010479 +800059b4: 00731863 bne x6,x7,800059c4 +800059b8: 00500413 addi x8,x0,5 +800059bc: 00200493 addi x9,x0,2 +800059c0: 0f40006f jal x0,80005ab4 +800059c4: 0000a397 auipc x7,0xa +800059c8: 69d38393 addi x7,x7,1693 # 80010061 +800059cc: 00731863 bne x6,x7,800059dc +800059d0: 00100413 addi x8,x0,1 +800059d4: 00300493 addi x9,x0,3 +800059d8: 0dc0006f jal x0,80005ab4 +800059dc: 0000a397 auipc x7,0xa +800059e0: 78138393 addi x7,x7,1921 # 8001015d +800059e4: 00731863 bne x6,x7,800059f4 +800059e8: 00200413 addi x8,x0,2 +800059ec: 00300493 addi x9,x0,3 +800059f0: 0c40006f jal x0,80005ab4 +800059f4: 0000b397 auipc x7,0xb +800059f8: 85e38393 addi x7,x7,-1954 # 80010252 +800059fc: 00731863 bne x6,x7,80005a0c +80005a00: 00300413 addi x8,x0,3 +80005a04: 00300493 addi x9,x0,3 +80005a08: 0ac0006f jal x0,80005ab4 +80005a0c: 0000b397 auipc x7,0xb +80005a10: 93c38393 addi x7,x7,-1732 # 80010348 +80005a14: 00731863 bne x6,x7,80005a24 +80005a18: 00400413 addi x8,x0,4 +80005a1c: 00300493 addi x9,x0,3 +80005a20: 0940006f jal x0,80005ab4 +80005a24: 0000b397 auipc x7,0xb +80005a28: a9138393 addi x7,x7,-1391 # 800104b5 +80005a2c: 00731863 bne x6,x7,80005a3c +80005a30: 00500413 addi x8,x0,5 +80005a34: 00300493 addi x9,x0,3 +80005a38: 07c0006f jal x0,80005ab4 +80005a3c: 0000b397 auipc x7,0xb +80005a40: ab638393 addi x7,x7,-1354 # 800104f2 +80005a44: 00731863 bne x6,x7,80005a54 +80005a48: 00800413 addi x8,x0,8 +80005a4c: 00000493 addi x9,x0,0 +80005a50: 0640006f jal x0,80005ab4 +80005a54: 0000b397 auipc x7,0xb +80005a58: aed38393 addi x7,x7,-1299 # 80010541 +80005a5c: 00731863 bne x6,x7,80005a6c +80005a60: 00800413 addi x8,x0,8 +80005a64: 00000493 addi x9,x0,0 +80005a68: 04c0006f jal x0,80005ab4 +80005a6c: 0000b397 auipc x7,0xb +80005a70: bd038393 addi x7,x7,-1072 # 8001063c +80005a74: 00731863 bne x6,x7,80005a84 +80005a78: 00800413 addi x8,x0,8 +80005a7c: 00100493 addi x9,x0,1 +80005a80: 0340006f jal x0,80005ab4 +80005a84: 0000b397 auipc x7,0xb +80005a88: cb438393 addi x7,x7,-844 # 80010738 +80005a8c: 00731863 bne x6,x7,80005a9c +80005a90: 00800413 addi x8,x0,8 +80005a94: 00200493 addi x9,x0,2 +80005a98: 01c0006f jal x0,80005ab4 +80005a9c: 0340006f jal x0,80005ad0 + +80005aa0 : +80005aa0: 00900413 addi x8,x0,9 +80005aa4: 0000a817 auipc x16,0xa +80005aa8: dac80813 addi x16,x16,-596 # 8000f850 +80005aac: 00882023 sw x8,0(x16) +80005ab0: 0300006f jal x0,80005ae0 + +80005ab4 : +80005ab4: 0000a817 auipc x16,0xa +80005ab8: d9c80813 addi x16,x16,-612 # 8000f850 +80005abc: 00882023 sw x8,0(x16) +80005ac0: 0000a817 auipc x16,0xa +80005ac4: d9480813 addi x16,x16,-620 # 8000f854 +80005ac8: 00982023 sw x9,0(x16) +80005acc: 0140006f jal x0,80005ae0 + +80005ad0 : +80005ad0: 0000a817 auipc x16,0xa +80005ad4: d8080813 addi x16,x16,-640 # 8000f850 +80005ad8: 00082023 sw x0,0(x16) +80005adc: 0040006f jal x0,80005ae0 + +80005ae0 : +80005ae0: 0002a303 lw x6,0(x5) +80005ae4: 10622423 sw x6,264(x4) # 108 +80005ae8: 00035383 lhu x7,0(x6) +80005aec: 0033f413 andi x8,x7,3 +80005af0: 00300493 addi x9,x0,3 +80005af4: 00941863 bne x8,x9,80005b04 +80005af8: 00235403 lhu x8,2(x6) +80005afc: 01041413 slli x8,x8,0x10 +80005b00: 0083e3b3 or x7,x7,x8 +80005b04: 10722023 sw x7,256(x4) # 100 +80005b08: 0042a303 lw x6,4(x5) +80005b0c: 12622023 sw x6,288(x4) # 120 + +80005b10 : +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 27d50513 addi x10,x10,637 # 8000fd9d +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 27550513 addi x10,x10,629 # 8000fdd5 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 00000013 addi x0,x0,0 +80005b8c: 00000013 addi x0,x0,0 +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 2ec50513 addi x10,x10,748 # 8000fe8c +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 + +80005bc8 : +80005bc8: 0000a517 auipc x10,0xa +80005bcc: c7852503 lw x10,-904(x10) # 8000f840 +80005bd0: 0001c097 auipc x1,0x1c +80005bd4: 994080e7 jalr x1,-1644(x1) # 80021564 + +80005bd8 : +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 2be50513 addi x10,x10,702 # 8000fe9e +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: b1852503 lw x10,-1256(x10) # 8000f720 +80005c10: 00300593 addi x11,x0,3 +80005c14: 52b50c63 beq x10,x11,8000614c +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000a517 auipc x10,0xa +80005c24: 28050513 addi x10,x10,640 # 8000fea0 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001c097 auipc x1,0x1c +80005c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80005c48: 0000a517 auipc x10,0xa +80005c4c: bd852503 lw x10,-1064(x10) # 8000f820 +80005c50: 02000593 addi x11,x0,32 +80005c54: 00357613 andi x12,x10,3 +80005c58: 00300693 addi x13,x0,3 +80005c5c: 00d60463 beq x12,x13,80005c64 +80005c60: 01000593 addi x11,x0,16 +80005c64: 3f4010ef jal x1,80007058 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: c0850513 addi x10,x10,-1016 # 8000f888 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 1f450513 addi x10,x10,500 # 8000feb4 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 0000a517 auipc x10,0xa +80005cec: b4052503 lw x10,-1216(x10) # 8000f828 +80005cf0: 02000593 addi x11,x0,32 +80005cf4: 364010ef jal x1,80007058 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000a517 auipc x10,0xa +80005d04: b8850513 addi x10,x10,-1144 # 8000f888 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 0000b517 auipc x10,0xb +80005d44: bab50513 addi x10,x10,-1109 # 800108eb +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001c097 auipc x1,0x1c +80005d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 9b852503 lw x10,-1608(x10) # 8000f720 +80005d70: 00050663 beq x10,x0,80005d7c +80005d74: 00300593 addi x11,x0,3 +80005d78: 04b51063 bne x10,x11,80005db8 +80005d7c: 07800593 addi x11,x0,120 +80005d80: 0000a617 auipc x12,0xa +80005d84: b0860613 addi x12,x12,-1272 # 8000f888 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 00b60023 sb x11,0(x12) +80005da4: 00160613 addi x12,x12,1 +80005da8: 0000a517 auipc x10,0xa +80005dac: a7c52503 lw x10,-1412(x10) # 8000f824 +80005db0: 324010ef jal x1,800070d4 +80005db4: 1180006f jal x0,80005ecc + +80005db8 : +80005db8: 00100593 addi x11,x0,1 +80005dbc: 04b50863 beq x10,x11,80005e0c +80005dc0: 00400593 addi x11,x0,4 +80005dc4: 08b50a63 beq x10,x11,80005e58 +80005dc8: 00500593 addi x11,x0,5 +80005dcc: 0cb50463 beq x10,x11,80005e94 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000b517 auipc x10,0xb +80005de4: c2150513 addi x10,x10,-991 # 80010a01 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0001b097 auipc x1,0x1b +80005e04: 764080e7 jalr x1,1892(x1) # 80021564 +80005e08: 1000006f jal x0,80005f08 + +80005e0c : +80005e0c: 06600593 addi x11,x0,102 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: a6860613 addi x12,x12,-1432 # 8000f888 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 9dc52503 lw x10,-1572(x10) # 8000f824 +80005e50: 284010ef jal x1,800070d4 +80005e54: 0780006f jal x0,80005ecc + +80005e58 : +80005e58: 07600593 addi x11,x0,118 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000a617 auipc x12,0xa +80005e64: a2860613 addi x12,x12,-1496 # 8000f888 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 00b60023 sb x11,0(x12) +80005e84: 00160613 addi x12,x12,1 +80005e88: 0000a517 auipc x10,0xa +80005e8c: 99c52503 lw x10,-1636(x10) # 8000f824 +80005e90: 244010ef jal x1,800070d4 + +80005e94 : +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: a4450513 addi x10,x10,-1468 # 800108e4 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80005ec8: 0400006f jal x0,80005f08 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000a517 auipc x10,0xa +80005ee4: 9a850513 addi x10,x10,-1624 # 8000f888 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 + +80005f08 : +80005f08: 00000013 addi x0,x0,0 +80005f0c: 00000013 addi x0,x0,0 +80005f10: 00000013 addi x0,x0,0 +80005f14: 00000013 addi x0,x0,0 +80005f18: 00000013 addi x0,x0,0 +80005f1c: 00000013 addi x0,x0,0 +80005f20: 0000b517 auipc x10,0xb +80005f24: 9dc50513 addi x10,x10,-1572 # 800108fc +80005f28: 00000013 addi x0,x0,0 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0001b097 auipc x1,0x1b +80005f44: 624080e7 jalr x1,1572(x1) # 80021564 +80005f48: 00009517 auipc x10,0x9 +80005f4c: 7d852503 lw x10,2008(x10) # 8000f720 +80005f50: 00100593 addi x11,x0,1 +80005f54: 00b51c63 bne x10,x11,80005f6c +80005f58: 0000a517 auipc x10,0xa +80005f5c: 8d852503 lw x10,-1832(x10) # 8000f830 +80005f60: 02000593 addi x11,x0,32 +80005f64: 0f4010ef jal x1,80007058 +80005f68: 0140006f jal x0,80005f7c + +80005f6c : +80005f6c: 0000a517 auipc x10,0xa +80005f70: 8c452503 lw x10,-1852(x10) # 8000f830 +80005f74: 02000593 addi x11,x0,32 +80005f78: 0e0010ef jal x1,80007058 + +80005f7c : +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000a517 auipc x10,0xa +80005f84: 90850513 addi x10,x10,-1784 # 8000f888 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 8a052503 lw x10,-1888(x10) # 8000f848 +80005fb0: 08051e63 bne x10,x0,8000604c +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: 95350513 addi x10,x10,-1709 # 80010913 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0001b097 auipc x1,0x1b +80005fe4: 584080e7 jalr x1,1412(x1) # 80021564 +80005fe8: 00009517 auipc x10,0x9 +80005fec: 73852503 lw x10,1848(x10) # 8000f720 +80005ff0: 00100593 addi x11,x0,1 +80005ff4: 00b51c63 bne x10,x11,8000600c +80005ff8: 0000a517 auipc x10,0xa +80005ffc: 84052503 lw x10,-1984(x10) # 8000f838 +80006000: 02000593 addi x11,x0,32 +80006004: 054010ef jal x1,80007058 +80006008: 0140006f jal x0,8000601c + +8000600c : +8000600c: 0000a517 auipc x10,0xa +80006010: 82c52503 lw x10,-2004(x10) # 8000f838 +80006014: 02000593 addi x11,x0,32 +80006018: 040010ef jal x1,80007058 + +8000601c : +8000601c: 00000013 addi x0,x0,0 +80006020: 0000a517 auipc x10,0xa +80006024: 86850513 addi x10,x10,-1944 # 8000f888 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 5bd0006f jal x0,80006e04 + +8000604c : +8000604c: 00100593 addi x11,x0,1 +80006050: 06b51e63 bne x10,x11,800060cc + +80006054 : +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000b517 auipc x10,0xb +80006064: 8ca50513 addi x10,x10,-1846 # 8001092a +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 00009517 auipc x10,0x9 +8000608c: 7b052503 lw x10,1968(x10) # 8000f838 +80006090: 02000593 addi x11,x0,32 +80006094: 7c5000ef jal x1,80007058 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 00009517 auipc x10,0x9 +800060a4: 7e850513 addi x10,x10,2024 # 8000f888 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 53d0006f jal x0,80006e04 + +800060cc : +800060cc: 00000013 addi x0,x0,0 +800060d0: 00000013 addi x0,x0,0 +800060d4: 00000013 addi x0,x0,0 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000b517 auipc x10,0xb +800060e4: 8a850513 addi x10,x10,-1880 # 80010988 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 00009517 auipc x10,0x9 +8000610c: 73052503 lw x10,1840(x10) # 8000f838 +80006110: 02000593 addi x11,x0,32 +80006114: 745000ef jal x1,80007058 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 00009517 auipc x10,0x9 +80006124: 76850513 addi x10,x10,1896 # 8000f888 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 4bd0006f jal x0,80006e04 + +8000614c : +8000614c: 00009417 auipc x8,0x9 +80006150: 70442403 lw x8,1796(x8) # 8000f850 +80006154: 00900493 addi x9,x0,9 +80006158: 0a940c63 beq x8,x9,80006210 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 8cd50513 addi x10,x10,-1843 # 80010a2d +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 8b950513 addi x10,x10,-1863 # 80010a59 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 00009817 auipc x16,0x9 +800061cc: 69080813 addi x16,x16,1680 # 8000f858 +800061d0: 00082503 lw x10,0(x16) +800061d4: 0001b097 auipc x1,0x1b +800061d8: 390080e7 jalr x1,912(x1) # 80021564 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000a517 auipc x10,0xa +800061e4: cbe50513 addi x10,x10,-834 # 8000fe9e +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 280404e3 beq x8,x0,80006c90 +8000620c: 3400006f jal x0,8000654c + +80006210 : +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000b517 auipc x10,0xb +80006224: 84950513 addi x10,x10,-1975 # 80010a69 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00009517 auipc x10,0x9 +8000624c: 5f052503 lw x10,1520(x10) # 8000f838 +80006250: 02000593 addi x11,x0,32 +80006254: 605000ef jal x1,80007058 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 00009517 auipc x10,0x9 +80006264: 62850513 addi x10,x10,1576 # 8000f888 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 7f450513 addi x10,x10,2036 # 80010a94 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 00009517 auipc x10,0x9 +800062cc: 56852503 lw x10,1384(x10) # 8000f830 +800062d0: 02000593 addi x11,x0,32 +800062d4: 585000ef jal x1,80007058 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 00009517 auipc x10,0x9 +800062e4: 5a850513 addi x10,x10,1448 # 8000f888 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00009317 auipc x6,0x9 +8000630c: 52832303 lw x6,1320(x6) # 8000f830 +80006310: 00009397 auipc x7,0x9 +80006314: 5283a383 lw x7,1320(x7) # 8000f838 +80006318: 10736a63 bltu x6,x7,8000642c + +8000631c : +8000631c: 00000013 addi x0,x0,0 +80006320: 0000a517 auipc x10,0xa +80006324: 7a350513 addi x10,x10,1955 # 80010ac3 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0000a517 auipc x10,0xa +80006364: 7cb50513 addi x10,x10,1995 # 80010b2b +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0001b097 auipc x1,0x1b +80006384: 1e4080e7 jalr x1,484(x1) # 80021564 +80006388: 00009317 auipc x6,0x9 +8000638c: 4a832303 lw x6,1192(x6) # 8000f830 +80006390: 00009397 auipc x7,0x9 +80006394: 4a83a383 lw x7,1192(x7) # 8000f838 +80006398: 40730533 sub x10,x6,x7 +8000639c: 02000593 addi x11,x0,32 +800063a0: 4b9000ef jal x1,80007058 +800063a4: 00000013 addi x0,x0,0 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 00009517 auipc x10,0x9 +800063c4: 4c850513 addi x10,x10,1224 # 8000f888 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 00000013 addi x0,x0,0 +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000a517 auipc x10,0xa +80006404: 75250513 addi x10,x10,1874 # 80010b52 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 1dd0006f jal x0,80006e04 + +8000642c : +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000a517 auipc x10,0xa +80006444: 6af50513 addi x10,x10,1711 # 80010aef +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00000013 addi x0,x0,0 +8000646c: 00000013 addi x0,x0,0 +80006470: 00000013 addi x0,x0,0 +80006474: 00000013 addi x0,x0,0 +80006478: 00000013 addi x0,x0,0 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000a517 auipc x10,0xa +80006484: 6ab50513 addi x10,x10,1707 # 80010b2b +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001b097 auipc x1,0x1b +800064a4: 0c4080e7 jalr x1,196(x1) # 80021564 +800064a8: 00009317 auipc x6,0x9 +800064ac: 39032303 lw x6,912(x6) # 8000f838 +800064b0: 00009397 auipc x7,0x9 +800064b4: 3803a383 lw x7,896(x7) # 8000f830 +800064b8: 40730533 sub x10,x6,x7 +800064bc: 02000593 addi x11,x0,32 +800064c0: 399000ef jal x1,80007058 +800064c4: 00000013 addi x0,x0,0 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 00009517 auipc x10,0x9 +800064e4: 3a850513 addi x10,x10,936 # 8000f888 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 00000013 addi x0,x0,0 +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000a517 auipc x10,0xa +80006524: 71a50513 addi x10,x10,1818 # 80010c3a +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 0bd0006f jal x0,80006e04 + +8000654c : +8000654c: 00000013 addi x0,x0,0 +80006550: 00000013 addi x0,x0,0 +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000a517 auipc x10,0xa +80006564: 7c150513 addi x10,x10,1985 # 80010d21 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001b097 auipc x1,0x1b +80006584: fe4080e7 jalr x1,-28(x1) # 80021564 +80006588: 00009517 auipc x10,0x9 +8000658c: 2cc52503 lw x10,716(x10) # 8000f854 +80006590: 04050a63 beq x10,x0,800065e4 +80006594: 00100593 addi x11,x0,1 +80006598: 08b50663 beq x10,x11,80006624 +8000659c: 00200593 addi x11,x0,2 +800065a0: 0cb50263 beq x10,x11,80006664 +800065a4: 00300593 addi x11,x0,3 +800065a8: 0eb50e63 beq x10,x11,800066a4 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000a517 auipc x10,0xa +800065c4: 79d50513 addi x10,x10,1949 # 80010d5d +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 1000006f jal x0,800066e0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000a517 auipc x10,0xa +80006604: 73b50513 addi x10,x10,1851 # 80010d3b +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0c00006f jal x0,800066e0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000a517 auipc x10,0xa +80006644: 70350513 addi x10,x10,1795 # 80010d43 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0800006f jal x0,800066e0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000a517 auipc x10,0xa +80006684: 6cb50513 addi x10,x10,1739 # 80010d4b +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 +800066a0: 0400006f jal x0,800066e0 + +800066a4 : +800066a4: 00000013 addi x0,x0,0 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000a517 auipc x10,0xa +800066c4: 69450513 addi x10,x10,1684 # 80010d54 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 + +800066e0 : +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00000013 addi x0,x0,0 +800066ec: 00000013 addi x0,x0,0 +800066f0: 00000013 addi x0,x0,0 +800066f4: 00000013 addi x0,x0,0 +800066f8: 00000013 addi x0,x0,0 +800066fc: 00000013 addi x0,x0,0 +80006700: 0000a517 auipc x10,0xa +80006704: 66650513 addi x10,x10,1638 # 80010d66 +80006708: 00000013 addi x0,x0,0 +8000670c: 00000013 addi x0,x0,0 +80006710: 00000013 addi x0,x0,0 +80006714: 00000013 addi x0,x0,0 +80006718: 00000013 addi x0,x0,0 +8000671c: 00000013 addi x0,x0,0 +80006720: 0001b097 auipc x1,0x1b +80006724: e44080e7 jalr x1,-444(x1) # 80021564 +80006728: 00009517 auipc x10,0x9 +8000672c: 12852503 lw x10,296(x10) # 8000f850 +80006730: 00100593 addi x11,x0,1 +80006734: 06b50863 beq x10,x11,800067a4 +80006738: 00200593 addi x11,x0,2 +8000673c: 0ab50463 beq x10,x11,800067e4 +80006740: 00300593 addi x11,x0,3 +80006744: 0eb50063 beq x10,x11,80006824 +80006748: 00400593 addi x11,x0,4 +8000674c: 10b50c63 beq x10,x11,80006864 +80006750: 00500593 addi x11,x0,5 +80006754: 14b50863 beq x10,x11,800068a4 +80006758: 00600593 addi x11,x0,6 +8000675c: 18b50463 beq x10,x11,800068e4 +80006760: 00700593 addi x11,x0,7 +80006764: 1cb50063 beq x10,x11,80006924 +80006768: 00800593 addi x11,x0,8 +8000676c: 1eb50c63 beq x10,x11,80006964 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000a517 auipc x10,0xa +80006784: 73d50513 addi x10,x10,1853 # 80010ebd +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 2000006f jal x0,800069a0 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000a517 auipc x10,0xa +800067c4: 5c050513 addi x10,x10,1472 # 80010d80 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1c00006f jal x0,800069a0 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000a517 auipc x10,0xa +80006804: 5b150513 addi x10,x10,1457 # 80010db1 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1800006f jal x0,800069a0 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000a517 auipc x10,0xa +80006844: 59150513 addi x10,x10,1425 # 80010dd1 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1400006f jal x0,800069a0 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000a517 auipc x10,0xa +80006884: 56f50513 addi x10,x10,1391 # 80010def +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 1000006f jal x0,800069a0 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000a517 auipc x10,0xa +800068c4: 54e50513 addi x10,x10,1358 # 80010e0e +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0c00006f jal x0,800069a0 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000a517 auipc x10,0xa +80006904: 53650513 addi x10,x10,1334 # 80010e36 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0800006f jal x0,800069a0 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000a517 auipc x10,0xa +80006944: 52250513 addi x10,x10,1314 # 80010e62 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 0400006f jal x0,800069a0 + +80006964 : +80006964: 00000013 addi x0,x0,0 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000a517 auipc x10,0xa +80006984: 50e50513 addi x10,x10,1294 # 80010e8e +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 + +800069a0 : +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: 50c50513 addi x10,x10,1292 # 80010ecc +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00009517 auipc x10,0x9 +800069ec: e5052503 lw x10,-432(x10) # 8000f838 +800069f0: 02000593 addi x11,x0,32 +800069f4: 664000ef jal x1,80007058 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 00009517 auipc x10,0x9 +80006a04: e8850513 addi x10,x10,-376 # 8000f888 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00000013 addi x0,x0,0 +80006a2c: 00000013 addi x0,x0,0 +80006a30: 00000013 addi x0,x0,0 +80006a34: 00000013 addi x0,x0,0 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: 4a350513 addi x10,x10,1187 # 80010ee3 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: dc852503 lw x10,-568(x10) # 8000f830 +80006a70: 02000593 addi x11,x0,32 +80006a74: 5e4000ef jal x1,80007058 +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 00009517 auipc x10,0x9 +80006a84: e0850513 addi x10,x10,-504 # 8000f888 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: da852503 lw x10,-600(x10) # 8000f850 +80006ab0: 00200593 addi x11,x0,2 +80006ab4: 08b51463 bne x10,x11,80006b3c +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 43a50513 addi x10,x10,1082 # 80010efa +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: d5052503 lw x10,-688(x10) # 8000f838 +80006af0: 284000ef jal x1,80006d74 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 +80006afc: 00000013 addi x0,x0,0 +80006b00: 0000a517 auipc x10,0xa +80006b04: 41150513 addi x10,x10,1041 # 80010f11 +80006b08: 00000013 addi x0,x0,0 +80006b0c: 00000013 addi x0,x0,0 +80006b10: 00000013 addi x0,x0,0 +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0001b097 auipc x1,0x1b +80006b24: a44080e7 jalr x1,-1468(x1) # 80021564 +80006b28: 00009517 auipc x10,0x9 +80006b2c: d0852503 lw x10,-760(x10) # 8000f830 +80006b30: 244000ef jal x1,80006d74 +80006b34: 0001b097 auipc x1,0x1b +80006b38: a30080e7 jalr x1,-1488(x1) # 80021564 + +80006b3c : +80006b3c: 00000097 auipc x1,0x0 +80006b40: 314080e7 jalr x1,788(x1) # 80006e50 +80006b44: 00009517 auipc x10,0x9 +80006b48: d0c52503 lw x10,-756(x10) # 8000f850 +80006b4c: 00100593 addi x11,x0,1 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 42750513 addi x10,x10,1063 # 80010f87 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 27c0006f jal x0,80006e04 +80006b8c: 00200593 addi x11,x0,2 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 4bd50513 addi x10,x10,1213 # 8001105d +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 23c0006f jal x0,80006e04 +80006bcc: 00300593 addi x11,x0,3 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000a517 auipc x10,0xa +80006be4: 57050513 addi x10,x10,1392 # 80011150 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1fc0006f jal x0,80006e04 +80006c0c: 00400593 addi x11,x0,4 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000a517 auipc x10,0xa +80006c24: 62b50513 addi x10,x10,1579 # 8001124b +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 1bc0006f jal x0,80006e04 +80006c4c: 00500593 addi x11,x0,5 +80006c50: 02b51e63 bne x10,x11,80006c8c +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 6d250513 addi x10,x10,1746 # 80011332 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 17c0006f jal x0,80006e04 +80006c8c: 1780006f jal x0,80006e04 + +80006c90 : +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: 29f50513 addi x10,x10,671 # 80010f3f +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00009617 auipc x12,0x9 +80006ccc: ba062603 lw x12,-1120(x12) # 8000f868 +80006cd0: 00000013 addi x0,x0,0 +80006cd4: 00000013 addi x0,x0,0 +80006cd8: 00000013 addi x0,x0,0 +80006cdc: 00000013 addi x0,x0,0 +80006ce0: 00009517 auipc x10,0x9 +80006ce4: 24850513 addi x10,x10,584 # 8000ff28 +80006ce8: 00000013 addi x0,x0,0 +80006cec: 00000013 addi x0,x0,0 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 0001b097 auipc x1,0x1b +80006d04: 864080e7 jalr x1,-1948(x1) # 80021564 +80006d08: 00065503 lhu x10,0(x12) +80006d0c: 01000593 addi x11,x0,16 +80006d10: 00357413 andi x8,x10,3 +80006d14: 00300493 addi x9,x0,3 +80006d18: 00941a63 bne x8,x9,80006d2c +80006d1c: 00265403 lhu x8,2(x12) +80006d20: 01041413 slli x8,x8,0x10 +80006d24: 00856533 or x10,x10,x8 +80006d28: 02000593 addi x11,x0,32 +80006d2c: 32c000ef jal x1,80007058 +80006d30: 00000013 addi x0,x0,0 +80006d34: 00000013 addi x0,x0,0 +80006d38: 00000013 addi x0,x0,0 +80006d3c: 00000013 addi x0,x0,0 +80006d40: 00009517 auipc x10,0x9 +80006d44: b4850513 addi x10,x10,-1208 # 8000f888 +80006d48: 00000013 addi x0,x0,0 +80006d4c: 00000013 addi x0,x0,0 +80006d50: 00000013 addi x0,x0,0 +80006d54: 00000013 addi x0,x0,0 +80006d58: 00000013 addi x0,x0,0 +80006d5c: 00000013 addi x0,x0,0 +80006d60: 0001b097 auipc x1,0x1b +80006d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80006d68: 00000097 auipc x1,0x0 +80006d6c: 0e8080e7 jalr x1,232(x1) # 80006e50 +80006d70: 0940006f jal x0,80006e04 + +80006d74 : +80006d74: 02054263 blt x10,x0,80006d98 + +80006d78 : +80006d78: 01800593 addi x11,x0,24 +80006d7c: 04b55463 bge x10,x11,80006dc4 +80006d80: 00009597 auipc x11,0x9 +80006d84: b3058593 addi x11,x11,-1232 # 8000f8b0 +80006d88: 00251613 slli x12,x10,0x2 +80006d8c: 00c585b3 add x11,x11,x12 +80006d90: 0005a503 lw x10,0(x11) +80006d94: 00008067 jalr x0,0(x1) + +80006d98 : +80006d98: 00100593 addi x11,x0,1 +80006d9c: 01f59593 slli x11,x11,0x1f +80006da0: 00b54533 xor x10,x10,x11 +80006da4: 01000593 addi x11,x0,16 +80006da8: 00b55e63 bge x10,x11,80006dc4 +80006dac: 00009597 auipc x11,0x9 +80006db0: b6458593 addi x11,x11,-1180 # 8000f910 +80006db4: 00251613 slli x12,x10,0x2 +80006db8: 00c585b3 add x11,x11,x12 +80006dbc: 0005a503 lw x10,0(x11) +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 00009517 auipc x10,0x9 +80006de4: f6e50513 addi x10,x10,-146 # 8000fd4e +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 00008067 jalr x0,0(x1) + +80006e04 : +80006e04: 00000013 addi x0,x0,0 +80006e08: 00000013 addi x0,x0,0 +80006e0c: 00000013 addi x0,x0,0 +80006e10: 00000013 addi x0,x0,0 +80006e14: 00000013 addi x0,x0,0 +80006e18: 00000013 addi x0,x0,0 +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: bc050513 addi x10,x10,-1088 # 800109e0 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 + +80006e48 : +80006e48: 0001a097 auipc x1,0x1a +80006e4c: 77c080e7 jalr x1,1916(x1) # 800215c4 + +80006e50 : +80006e50: 00009617 auipc x12,0x9 +80006e54: a1060613 addi x12,x12,-1520 # 8000f860 +80006e58: 00162023 sw x1,0(x12) +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 0e950513 addi x10,x10,233 # 8000ff49 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00009517 auipc x10,0x9 +80006e8c: 9e052503 lw x10,-1568(x10) # 8000f868 +80006e90: 02000593 addi x11,x0,32 +80006e94: 1c4000ef jal x1,80007058 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 9e850513 addi x10,x10,-1560 # 8000f888 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00000013 addi x0,x0,0 +80006ecc: 00000013 addi x0,x0,0 +80006ed0: 00000013 addi x0,x0,0 +80006ed4: 00000013 addi x0,x0,0 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 07950513 addi x10,x10,121 # 8000ff59 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00009517 auipc x10,0x9 +80006f0c: 96852503 lw x10,-1688(x10) # 8000f870 +80006f10: 02000593 addi x11,x0,32 +80006f14: 144000ef jal x1,80007058 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 96850513 addi x10,x10,-1688 # 8000f888 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00000013 addi x0,x0,0 +80006f4c: 00000013 addi x0,x0,0 +80006f50: 00000013 addi x0,x0,0 +80006f54: 00000013 addi x0,x0,0 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 00950513 addi x10,x10,9 # 8000ff69 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00009517 auipc x10,0x9 +80006f8c: 8f052503 lw x10,-1808(x10) # 8000f878 +80006f90: 02000593 addi x11,x0,32 +80006f94: 0c4000ef jal x1,80007058 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 8e850513 addi x10,x10,-1816 # 8000f888 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00000013 addi x0,x0,0 +80006fcc: 00000013 addi x0,x0,0 +80006fd0: 00000013 addi x0,x0,0 +80006fd4: 00000013 addi x0,x0,0 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: f9950513 addi x10,x10,-103 # 8000ff79 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009517 auipc x10,0x9 +8000700c: 87852503 lw x10,-1928(x10) # 8000f880 +80007010: 02000593 addi x11,x0,32 +80007014: 044000ef jal x1,80007058 +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009517 auipc x10,0x9 +80007024: 86850513 addi x10,x10,-1944 # 8000f888 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 0001a097 auipc x1,0x1a +80007044: 524080e7 jalr x1,1316(x1) # 80021564 +80007048: 00009617 auipc x12,0x9 +8000704c: 81860613 addi x12,x12,-2024 # 8000f860 +80007050: 00062083 lw x1,0(x12) +80007054: 00008067 jalr x0,0(x1) + +80007058 : +80007058: 00000013 addi x0,x0,0 +8000705c: 00000013 addi x0,x0,0 +80007060: 00009617 auipc x12,0x9 +80007064: 82860613 addi x12,x12,-2008 # 8000f888 +80007068: 00000013 addi x0,x0,0 +8000706c: 00000013 addi x0,x0,0 +80007070: 00000013 addi x0,x0,0 +80007074: 00000013 addi x0,x0,0 +80007078: 00000013 addi x0,x0,0 +8000707c: 00000013 addi x0,x0,0 +80007080: 03000693 addi x13,x0,48 +80007084: 00d60023 sb x13,0(x12) +80007088: 07800693 addi x13,x0,120 +8000708c: 00d600a3 sb x13,1(x12) +80007090: 00260613 addi x12,x12,2 +80007094: 00058693 addi x13,x11,0 + +80007098 : +80007098: ffc68693 addi x13,x13,-4 +8000709c: 00d55733 srl x14,x10,x13 +800070a0: 00f77713 andi x14,x14,15 +800070a4: 00a00793 addi x15,x0,10 +800070a8: 00f74663 blt x14,x15,800070b4 +800070ac: 05770713 addi x14,x14,87 +800070b0: 0080006f jal x0,800070b8 + +800070b4 : +800070b4: 03070713 addi x14,x14,48 + +800070b8 : +800070b8: 00e60023 sb x14,0(x12) +800070bc: 00160613 addi x12,x12,1 +800070c0: fc069ce3 bne x13,x0,80007098 +800070c4: 00a00693 addi x13,x0,10 +800070c8: 00d60023 sb x13,0(x12) +800070cc: 000600a3 sb x0,1(x12) +800070d0: 00008067 jalr x0,0(x1) + +800070d4 : +800070d4: 00a00693 addi x13,x0,10 +800070d8: 02d54663 blt x10,x13,80007104 +800070dc: ff650513 addi x10,x10,-10 +800070e0: 03100713 addi x14,x0,49 +800070e4: 00d54c63 blt x10,x13,800070fc +800070e8: ff650513 addi x10,x10,-10 +800070ec: 03200713 addi x14,x0,50 +800070f0: 00d54663 blt x10,x13,800070fc +800070f4: ff650513 addi x10,x10,-10 +800070f8: 03300713 addi x14,x0,51 +800070fc: 00e60023 sb x14,0(x12) +80007100: 00160613 addi x12,x12,1 +80007104: 03050513 addi x10,x10,48 +80007108: 00a60023 sb x10,0(x12) +8000710c: 00a00693 addi x13,x0,10 +80007110: 00d600a3 sb x13,1(x12) +80007114: 00060123 sb x0,2(x12) +80007118: 00008067 jalr x0,0(x1) +8000711c: 00000013 addi x0,x0,0 +80007120: 00000013 addi x0,x0,0 +80007124: 00000013 addi x0,x0,0 +80007128: 00000013 addi x0,x0,0 +8000712c: 00000013 addi x0,x0,0 +80007130: 00000013 addi x0,x0,0 +80007134: 00000013 addi x0,x0,0 +80007138: 00000013 addi x0,x0,0 +8000713c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 23838393 addi x7,x7,568 # 80005240 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 21c38393 addi x7,x7,540 # 80005240 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 20438393 addi x7,x7,516 # 80005240 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1f038393 addi x7,x7,496 # 80005240 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1e438393 addi x7,x7,484 # 80005240 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 1b038393 addi x7,x7,432 # 80005240 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3f430313 addi x6,x6,1012 # 80004490 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 19838393 addi x7,x7,408 # 80005240 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3dc30313 addi x6,x6,988 # 80004490 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 18038393 addi x7,x7,384 # 80005240 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3c430313 addi x6,x6,964 # 80004490 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 16838393 addi x7,x7,360 # 80005240 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 26078793 addi x15,x15,608 # 800044a0 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: fc010113 addi x2,x2,-64 # 80011460 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 06018193 addi x3,x3,96 # 80005540 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010a09 .word 0x80010a09 +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 05828293 addi x5,x5,88 # 80020600 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 03828293 addi x5,x5,56 # 80020600 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-ror-00.elf.objdump b/riscv-tests/rv32-Zbkb-ror-00.elf.objdump new file mode 100644 index 0000000..17bfcf0 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-ror-00.elf.objdump @@ -0,0 +1,13197 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-ror-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-ror-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00018520 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020600 80020600 00021600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002676 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000079 00000000 00000000 00024cf1 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d6a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d8d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024da0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000087 00000000 00000000 00024dc8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e4f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020600 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccpXs2Wf.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_ror_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b1 +80009020 l .data 00000000 Zbkb_ror_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b2 +80009050 l .data 00000000 Zbkb_ror_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b3 +80009080 l .data 00000000 Zbkb_ror_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090b0 l .data 00000000 Zbkb_ror_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b5 +800090e0 l .data 00000000 Zbkb_ror_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b6 +80009110 l .data 00000000 Zbkb_ror_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b7 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +80009140 l .data 00000000 Zbkb_ror_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b8 +80009170 l .data 00000000 Zbkb_ror_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b9 +800091a0 l .data 00000000 Zbkb_ror_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b10 +800091d1 l .data 00000000 Zbkb_ror_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b11 +80009203 l .data 00000000 Zbkb_ror_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b12 +80009235 l .data 00000000 Zbkb_ror_cg_cp_rs1_b12_str +800002ac l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b13 +80009267 l .data 00000000 Zbkb_ror_cg_cp_rs1_b13_str +800002d8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b14 +80009299 l .data 00000000 Zbkb_ror_cg_cp_rs1_b14_str +80000304 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b15 +800092cb l .data 00000000 Zbkb_ror_cg_cp_rs1_b15_str +80000330 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b16 +800092fd l .data 00000000 Zbkb_ror_cg_cp_rs1_b16_str +8000035c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b17 +8000932f l .data 00000000 Zbkb_ror_cg_cp_rs1_b17_str +8000038c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b18 +80009361 l .data 00000000 Zbkb_ror_cg_cp_rs1_b18_str +800003b8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b19 +80009393 l .data 00000000 Zbkb_ror_cg_cp_rs1_b19_str +800003e4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b20 +800093c5 l .data 00000000 Zbkb_ror_cg_cp_rs1_b20_str +80000410 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b21 +800093f7 l .data 00000000 Zbkb_ror_cg_cp_rs1_b21_str +8000043c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b22 +80009429 l .data 00000000 Zbkb_ror_cg_cp_rs1_b22_str +80000468 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b23 +8000945b l .data 00000000 Zbkb_ror_cg_cp_rs1_b23_str +80000494 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b24 +8000948d l .data 00000000 Zbkb_ror_cg_cp_rs1_b24_str +800004c0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b25 +800094bf l .data 00000000 Zbkb_ror_cg_cp_rs1_b25_str +800004ec l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b26 +800094f1 l .data 00000000 Zbkb_ror_cg_cp_rs1_b26_str +80000518 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b27 +80009523 l .data 00000000 Zbkb_ror_cg_cp_rs1_b27_str +80000544 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b28 +80009555 l .data 00000000 Zbkb_ror_cg_cp_rs1_b28_str +80000570 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b29 +80009587 l .data 00000000 Zbkb_ror_cg_cp_rs1_b29_str +8000059c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b30 +800095b9 l .data 00000000 Zbkb_ror_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_b31 +800095eb l .data 00000000 Zbkb_ror_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b0 +8000961d l .data 00000000 Zbkb_ror_cg_cp_rs2_b0_str +80000624 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b1 +8000964e l .data 00000000 Zbkb_ror_cg_cp_rs2_b1_str +80000654 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b2 +8000967f l .data 00000000 Zbkb_ror_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b3 +800096b0 l .data 00000000 Zbkb_ror_cg_cp_rs2_b3_str +800006b4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b4 +800096e1 l .data 00000000 Zbkb_ror_cg_cp_rs2_b4_str +800006e0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b5 +80009712 l .data 00000000 Zbkb_ror_cg_cp_rs2_b5_str +8000070c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b6 +80009743 l .data 00000000 Zbkb_ror_cg_cp_rs2_b6_str +80000740 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b7 +80009774 l .data 00000000 Zbkb_ror_cg_cp_rs2_b7_str +8000076c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b8 +800097a5 l .data 00000000 Zbkb_ror_cg_cp_rs2_b8_str +80000798 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b9 +800097d6 l .data 00000000 Zbkb_ror_cg_cp_rs2_b9_str +800007c8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b10 +80009807 l .data 00000000 Zbkb_ror_cg_cp_rs2_b10_str +800007f4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b11 +80009839 l .data 00000000 Zbkb_ror_cg_cp_rs2_b11_str +80000820 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b12 +8000986b l .data 00000000 Zbkb_ror_cg_cp_rs2_b12_str +80000854 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b13 +8000989d l .data 00000000 Zbkb_ror_cg_cp_rs2_b13_str +80000880 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b14 +800098cf l .data 00000000 Zbkb_ror_cg_cp_rs2_b14_str +800008ac l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b15 +80009901 l .data 00000000 Zbkb_ror_cg_cp_rs2_b15_str +800008d8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b16 +80009933 l .data 00000000 Zbkb_ror_cg_cp_rs2_b16_str +80000904 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b17 +80009965 l .data 00000000 Zbkb_ror_cg_cp_rs2_b17_str +80000930 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b18 +80009997 l .data 00000000 Zbkb_ror_cg_cp_rs2_b18_str +8000095c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b19 +800099c9 l .data 00000000 Zbkb_ror_cg_cp_rs2_b19_str +80000988 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b20 +800099fb l .data 00000000 Zbkb_ror_cg_cp_rs2_b20_str +800009b4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b21 +80009a2d l .data 00000000 Zbkb_ror_cg_cp_rs2_b21_str +800009e0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b22 +80009a5f l .data 00000000 Zbkb_ror_cg_cp_rs2_b22_str +80000a0c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b23 +80009a91 l .data 00000000 Zbkb_ror_cg_cp_rs2_b23_str +80000a38 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b24 +80009ac3 l .data 00000000 Zbkb_ror_cg_cp_rs2_b24_str +80000a64 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b25 +80009af5 l .data 00000000 Zbkb_ror_cg_cp_rs2_b25_str +80000a94 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b26 +80009b27 l .data 00000000 Zbkb_ror_cg_cp_rs2_b26_str +80000ac0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b27 +80009b59 l .data 00000000 Zbkb_ror_cg_cp_rs2_b27_str +80000aec l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b28 +80009b8b l .data 00000000 Zbkb_ror_cg_cp_rs2_b28_str +80000b18 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b29 +80009bbd l .data 00000000 Zbkb_ror_cg_cp_rs2_b29_str +80000b48 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b30 +80009bef l .data 00000000 Zbkb_ror_cg_cp_rs2_b30_str +80000b74 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_b31 +80009c21 l .data 00000000 Zbkb_ror_cg_cp_rs2_b31_str +80000ba0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b0 +80009c53 l .data 00000000 Zbkb_ror_cg_cp_rd_b0_str +80000bcc l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b1 +80009c83 l .data 00000000 Zbkb_ror_cg_cp_rd_b1_str +80000bf8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b2 +80009cb3 l .data 00000000 Zbkb_ror_cg_cp_rd_b2_str +80000c24 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b3 +80009ce3 l .data 00000000 Zbkb_ror_cg_cp_rd_b3_str +80000c50 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b4 +80009d13 l .data 00000000 Zbkb_ror_cg_cp_rd_b4_str +80000c7c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b5 +80009d43 l .data 00000000 Zbkb_ror_cg_cp_rd_b5_str +80000ca8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b6 +80009d73 l .data 00000000 Zbkb_ror_cg_cp_rd_b6_str +80000cdc l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b7 +80009da3 l .data 00000000 Zbkb_ror_cg_cp_rd_b7_str +80000d08 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b8 +80009dd3 l .data 00000000 Zbkb_ror_cg_cp_rd_b8_str +80000d34 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b9 +80009e03 l .data 00000000 Zbkb_ror_cg_cp_rd_b9_str +80000d60 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b10 +80009e33 l .data 00000000 Zbkb_ror_cg_cp_rd_b10_str +80000d8c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b11 +80009e64 l .data 00000000 Zbkb_ror_cg_cp_rd_b11_str +80000db8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b12 +80009e95 l .data 00000000 Zbkb_ror_cg_cp_rd_b12_str +80000dec l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b13 +80009ec6 l .data 00000000 Zbkb_ror_cg_cp_rd_b13_str +80000e18 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b14 +80009ef7 l .data 00000000 Zbkb_ror_cg_cp_rd_b14_str +80000e44 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b15 +80009f28 l .data 00000000 Zbkb_ror_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b16 +80009f59 l .data 00000000 Zbkb_ror_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b17 +80009f8a l .data 00000000 Zbkb_ror_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b18 +80009fbb l .data 00000000 Zbkb_ror_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b19 +80009fec l .data 00000000 Zbkb_ror_cg_cp_rd_b19_str +80000f24 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b20 +8000a01d l .data 00000000 Zbkb_ror_cg_cp_rd_b20_str +80000f54 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b21 +8000a04e l .data 00000000 Zbkb_ror_cg_cp_rd_b21_str +80000f80 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b22 +8000a07f l .data 00000000 Zbkb_ror_cg_cp_rd_b22_str +80000fac l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b23 +8000a0b0 l .data 00000000 Zbkb_ror_cg_cp_rd_b23_str +80000fd8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b24 +8000a0e1 l .data 00000000 Zbkb_ror_cg_cp_rd_b24_str +80001004 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b25 +8000a112 l .data 00000000 Zbkb_ror_cg_cp_rd_b25_str +80001030 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b26 +8000a143 l .data 00000000 Zbkb_ror_cg_cp_rd_b26_str +8000105c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b27 +8000a174 l .data 00000000 Zbkb_ror_cg_cp_rd_b27_str +80001088 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b28 +8000a1a5 l .data 00000000 Zbkb_ror_cg_cp_rd_b28_str +800010b4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b29 +8000a1d6 l .data 00000000 Zbkb_ror_cg_cp_rd_b29_str +800010e0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b30 +8000a207 l .data 00000000 Zbkb_ror_cg_cp_rd_b30_str +8000110c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rd_b31 +8000a238 l .data 00000000 Zbkb_ror_cg_cp_rd_b31_str +80001138 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x0 +8000a269 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x0_str +80001164 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x1 +8000a2a1 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x1_str +80001190 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x2 +8000a2d9 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x2_str +800011bc l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x80000000 +8000a311 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x80000000_str +800011e8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x80000001 +8000a351 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x80000001_str +80001214 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x7fffffff +8000a391 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x7fffffff_str +80001240 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x7ffffffe +8000a3d1 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x7ffffffe_str +8000126c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0xffffffff +8000a411 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0xffffffff_str +80001298 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0xfffffffe +8000a451 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0xfffffffe_str +800012c4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x5bbc8872 +8000a491 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x5bbc8872_str +800012f0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaa +8000a4d1 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaa_str +8000131c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs1_edges_0x55555555 +8000a511 l .data 00000000 Zbkb_ror_cg_cp_rs1_edges_0x55555555_str +80001348 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x0 +8000a551 l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x0_str +80001374 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x1 +8000a58a l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x1_str +800013a0 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x2 +8000a5c3 l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x2_str +800013cc l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x80000000 +8000a5fc l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x80000000_str +800013f8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x80000001 +8000a63c l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x80000001_str +80001424 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x7fffffff +8000a67c l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x7fffffff_str +80001450 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x7ffffffe +8000a6bc l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x7ffffffe_str +8000147c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0xffffffff +8000a6fc l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0xffffffff_str +800014a8 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0xfffffffe +8000a73c l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0xfffffffe_str +800014d4 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x5bbc8872 +8000a77c l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x5bbc8872_str +80001500 l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaa +8000a7bc l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaa_str +8000152c l .text.rvtest 00000000 Zbkb_ror_cg_cp_rs2_edges_0x55555555 +8000a7fc l .data 00000000 Zbkb_ror_cg_cp_rs2_edges_0x55555555_str +80001558 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a83c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001584 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a88c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a8dc l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015dc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a92c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001608 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a983 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001634 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000a9da l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001660 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000aa31 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000168c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000aa88 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aadf l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000ab36 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001710 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ab8d l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000173c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000abe4 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001768 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000ac3b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001794 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ac8b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000acdb l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017ec l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000ad2b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001818 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ad82 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001844 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000add9 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001870 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000ae30 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000189c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000ae87 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000aede l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000af35 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001920 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000af8c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000194c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000afe3 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001978 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b03a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b08a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b0da l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019fc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b12a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a28 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b181 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a54 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b1d8 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a80 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b22f l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aac l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b286 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b2dd l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b04 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b334 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b30 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b38b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b5c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b3e2 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b88 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b439 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b490 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b4e7 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c0c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b53e l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c38 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b59c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c64 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b5fa l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c90 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b658 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cbc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b6b6 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b714 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d14 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b772 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d40 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b7d0 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d6c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b82e l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d98 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b88c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b8e3 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b93a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e1c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000b991 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e48 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000b9ef l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e74 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000ba4d l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000baab l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ecc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bb09 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bb67 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f24 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bbc5 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f50 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bc23 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f7c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bc81 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bcdf l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bd36 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002000 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bd8d l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000202c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bde4 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002058 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000be42 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002084 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000bea0 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000befe l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020dc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000bf5c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002108 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000bfba l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002134 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c018 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002160 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c076 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000218c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c0d4 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c132 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c189 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002210 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c1e0 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000223c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c237 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002268 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c295 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002294 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c2f3 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c351 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022ec l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c3af l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002318 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c40d l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002344 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c46b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002370 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c4c9 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000239c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c527 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c585 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c5dc l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002420 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c633 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000244c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c68a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002478 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c6e8 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c746 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c7a4 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024fc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c802 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002528 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c860 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002554 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c8be l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002580 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c91c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025ac l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000c97a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000c9d8 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002604 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ca2f l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002630 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000ca86 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000265c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cadd l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002688 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cb3b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cb99 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cbf7 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000270c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cc55 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002738 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ccb3 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002764 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cd11 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002790 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cd6f l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027bc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cdcd l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000ce2b l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002814 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000ce82 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002840 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000ced9 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000286c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000cf30 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002898 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000cf8e l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000cfec l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d04a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000291c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d0a8 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002948 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d106 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002974 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d164 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d1c2 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029cc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d220 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d27e l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a24 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d2d5 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a50 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d32c l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a7c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d383 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d3e1 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d43f l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b00 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d49d l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b2c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d4fb l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b58 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d559 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b84 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d5b7 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d615 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bdc l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d673 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c08 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d6d1 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c34 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d728 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c60 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d77f l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c8c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d7d6 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb8 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d834 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce4 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d892 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d10 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d8f0 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d3c l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000d94e l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d68 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000d9ac l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d94 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000da0a l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc0 l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000da68 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dec l .text.rvtest 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dac6 l .data 00000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e18 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b0 +8000db24 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b0_str +80002e44 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b1 +8000db5b l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b2 +8000db92 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b2_str +80002e9c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b3 +8000dbc9 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b3_str +80002ed0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b4 +8000dc00 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b4_str +80002efc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b5 +8000dc37 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b5_str +80002f28 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b6 +8000dc6e l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b6_str +80002f5c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b7 +8000dca5 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b7_str +80002f88 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b8 +8000dcdc l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b8_str +80002fb4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b9 +8000dd13 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b10 +8000dd4a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b11 +8000dd82 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b12 +8000ddba l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b12_str +80003068 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b13 +8000ddf2 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b13_str +80003094 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b14 +8000de2a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b14_str +800030c0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b15 +8000de62 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b15_str +800030ec l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b16 +8000de9a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b17 +8000ded2 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b18 +8000df0a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b18_str +80003174 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b19 +8000df42 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b19_str +800031a0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b20 +8000df7a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b20_str +800031cc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b21 +8000dfb2 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b21_str +800031fc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b22 +8000dfea l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b22_str +80003228 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b23 +8000e022 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b23_str +80003254 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b24 +8000e05a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b24_str +80003280 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b25 +8000e092 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b25_str +800032ac l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b26 +8000e0ca l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b26_str +800032d8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b27 +8000e102 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b27_str +80003304 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b28 +8000e13a l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b28_str +80003330 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b29 +8000e172 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b29_str +8000335c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b30 +8000e1aa l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b30_str +80003388 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b31 +8000e1e2 l .data 00000000 Zbkb_ror_cg_cmp_rs1_rs2_b31_str +800033b4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b0 +8000e21a l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b0_str +800033e0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b1 +8000e250 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b1_str +8000340c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b2 +8000e286 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b2_str +80003438 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b3 +8000e2bc l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b3_str +8000346c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b4 +8000e2f2 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b4_str +80003498 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b5 +8000e328 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b5_str +800034c4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b6 +8000e35e l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b6_str +800034f0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b7 +8000e394 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b7_str +8000351c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b8 +8000e3ca l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b8_str +80003548 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b9 +8000e400 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b9_str +80003574 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b10 +8000e436 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b10_str +800035a0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b11 +8000e46d l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b11_str +800035cc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b12 +8000e4a4 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b12_str +80003600 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b13 +8000e4db l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b13_str +8000362c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b14 +8000e512 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b14_str +8000365c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b15 +8000e549 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b16 +8000e580 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b17 +8000e5b7 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b17_str +800036e4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b18 +8000e5ee l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b18_str +80003710 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b19 +8000e625 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b19_str +8000373c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b20 +8000e65c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b21 +8000e693 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b22 +8000e6ca l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b23 +8000e701 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b24 +8000e738 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b24_str +80003820 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b25 +8000e76f l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b26 +8000e7a6 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b27 +8000e7dd l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b27_str +800038a4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b28 +8000e814 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b28_str +800038d0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b29 +8000e84b l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b29_str +800038fc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b30 +8000e882 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b30_str +80003928 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_b31 +8000e8b9 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_b31_str +80003954 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b0 +8000e8f0 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b0_str +80003980 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b1 +8000e926 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b1_str +800039ac l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b2 +8000e95c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b2_str +800039dc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b3 +8000e992 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b4 +8000e9c8 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b5 +8000e9fe l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b6 +8000ea34 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b6_str +80003a94 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b7 +8000ea6a l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b7_str +80003ac0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b8 +8000eaa0 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b8_str +80003af0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b9 +8000ead6 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b9_str +80003b1c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b10 +8000eb0c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b10_str +80003b48 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b11 +8000eb43 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b11_str +80003b74 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b12 +8000eb7a l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b12_str +80003ba8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b13 +8000ebb1 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b13_str +80003bd4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b14 +8000ebe8 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b14_str +80003c00 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b15 +8000ec1f l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b15_str +80003c2c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b16 +8000ec56 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b16_str +80003c58 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b17 +8000ec8d l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b17_str +80003c84 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b18 +8000ecc4 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b18_str +80003cb0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b19 +8000ecfb l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b19_str +80003cdc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b20 +8000ed32 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b20_str +80003d08 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b21 +8000ed69 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b21_str +80003d34 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b22 +8000eda0 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b22_str +80003d64 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b23 +8000edd7 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b23_str +80003d90 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b24 +8000ee0e l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b24_str +80003dbc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b25 +8000ee45 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b25_str +80003de8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b26 +8000ee7c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b26_str +80003e18 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b27 +8000eeb3 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b27_str +80003e44 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b28 +8000eeea l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b28_str +80003e70 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b29 +8000ef21 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b29_str +80003e9c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b30 +8000ef58 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b30_str +80003ec8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs2_b31 +8000ef8f l .data 00000000 Zbkb_ror_cg_cmp_rd_rs2_b31_str +80003ef4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b0 +8000efc6 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b0_str +80003f20 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b1 +8000f000 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b1_str +80003f4c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b2 +8000f03a l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b2_str +80003f7c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b3 +8000f074 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b3_str +80003fb0 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b4 +8000f0ae l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b4_str +80003fdc l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b5 +8000f0e8 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b5_str +80004008 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b6 +8000f122 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b6_str +80004034 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b7 +8000f15c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b7_str +80004060 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b8 +8000f196 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b8_str +8000408c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b9 +8000f1d0 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b9_str +800040b8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b10 +8000f20a l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b10_str +800040e4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b11 +8000f245 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b11_str +80004110 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b12 +8000f280 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b12_str +80004144 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b13 +8000f2bb l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b13_str +80004170 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b14 +8000f2f6 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b15 +8000f331 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b15_str +800041c8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b16 +8000f36c l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b16_str +800041f8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b17 +8000f3a7 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b17_str +80004228 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b18 +8000f3e2 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b18_str +80004254 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b19 +8000f41d l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b19_str +80004280 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b20 +8000f458 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b20_str +800042ac l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b21 +8000f493 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b21_str +800042d8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b22 +8000f4ce l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b23 +8000f509 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b24 +8000f544 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b24_str +80004360 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b25 +8000f57f l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b25_str +8000438c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b26 +8000f5ba l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b26_str +800043b8 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b27 +8000f5f5 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b27_str +800043e4 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b28 +8000f630 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b28_str +80004410 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b29 +8000f66b l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b29_str +8000443c l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b30 +8000f6a6 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b30_str +80004468 l .text.rvtest 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b31 +8000f6e1 l .data 00000000 Zbkb_ror_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004498 l .text.rvtest 00000000 exit_Mcleanup +8000449c l .text.rvtest 00000000 resto_Medeleg +800044a4 l .text.rvtest 00000000 resto_Msatp +800044a8 l .text.rvtest 00000000 resto_Mscratch +800044b0 l .text.rvtest 00000000 resto_Mxtvec +800044c4 l .text.rvtest 00000000 resto_Mtramp +800044c8 l .text.rvtest 00000000 resto_Mloop +800044e0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +8000fd9d l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000fdd5 l .data 00000000 begin_debugstr +8000fe35 l .data 00000000 trap_sig_overflowstr +800109e0 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011ab8 l .data 00000000 trap_sigptr +80011ab0 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000ff89 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8000fdf7 l .data 00000000 abortstr +8000fd64 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80011417 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000f888 l .data 00000000 ascii_buffer +8000fe9e l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f868 l .data 00000000 saved_xepc +8002051c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +8000ffa0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +800100a2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +8001019d l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010290 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80010403 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000f720 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000f720 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000f848 l .data 00000000 failure_diag_type +8000f858 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000f850 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010387 l .data 00000000 sv_Mtval2_str +800103c5 l .data 00000000 sv_Mtinst_str +8000ffe0 l .data 00000000 sv_Svect_str +800100e0 l .data 00000000 sv_Scause_str +800101d9 l .data 00000000 sv_Sepc_str +800102cd l .data 00000000 sv_Stval_str +8001043e l .data 00000000 sv_Sip_str +80010020 l .data 00000000 sv_Hvect_str +8001011e l .data 00000000 sv_Hcause_str +80010215 l .data 00000000 sv_Hepc_str +8001030a l .data 00000000 sv_Htval_str +80010479 l .data 00000000 sv_Hip_str +80010061 l .data 00000000 sv_Vvect_str +8001015d l .data 00000000 sv_Vcause_str +80010252 l .data 00000000 sv_Vepc_str +80010348 l .data 00000000 sv_Vtval_str +800104b5 l .data 00000000 sv_Vip_str +800104f2 l .data 00000000 Mclr_Mext_int_str +80010541 l .data 00000000 Mclr_Sext_int_str +8001063c l .data 00000000 Sclr_Sext_int_str +80010738 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000f854 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +8000fe8c l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000f840 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +8000fea0 l .data 00000000 inststr +8000f820 l .data 00000000 failing_instruction +8000feb4 l .data 00000000 addrstr +8000f828 l .data 00000000 failing_addr +800108eb l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000f824 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010a01 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +800108e4 l .data 00000000 vxsatstr +800108fc l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000f830 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010913 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000f838 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001092a l .data 00000000 failure_diag_bad_instr_str +80010988 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010a2d l .data 00000000 trap_diag_header_str +80010a59 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010a69 l .data 00000000 trap_diag_expected_offset_str +80010a94 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010ac3 l .data 00000000 trap_diag_extra_traps_str +80010b2b l .data 00000000 trap_diag_diff_bytes_str +80010b52 l .data 00000000 trap_diag_extra_next_step_str +80010aef l .data 00000000 trap_diag_missing_traps_str +80010c3a l .data 00000000 trap_diag_missing_next_step_str +80010d21 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80010d5d l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +80010d3b l .data 00000000 trap_diag_mode_m_str +80010d43 l .data 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+80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000f8b0 l .data 00000000 trap_excpt_name_tbl +8000f910 l .data 00000000 trap_int_name_tbl +8000fd4e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000f860 l .data 00000000 csr_context_ret_addr +8000ff49 l .data 00000000 mepcstr +8000ff59 l .data 00000000 mcausestr +8000f870 l .data 00000000 saved_xcause +8000ff69 l .data 00000000 mtvalstr +8000f878 l .data 00000000 saved_xtval +8000ff79 l .data 00000000 mstatusstr +8000f880 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011460 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010a09 l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000f8b0 l .data 00000000 end_failure_scratch +8000f950 l .data 00000000 trap_excpt_name_0 +8000f970 l .data 00000000 trap_excpt_name_1 +8000f98a l .data 00000000 trap_excpt_name_2 +8000f99f l .data 00000000 trap_excpt_name_3 +8000f9ab l .data 00000000 trap_excpt_name_4 +8000f9c4 l .data 00000000 trap_excpt_name_5 +8000f9d7 l .data 00000000 trap_excpt_name_6 +8000f9f5 l .data 00000000 trap_excpt_name_7 +8000fa0d l .data 00000000 trap_excpt_name_8 +8000fa2b l .data 00000000 trap_excpt_name_9 +8000fa49 l .data 00000000 trap_excpt_name_10 +8000fa68 l .data 00000000 trap_excpt_name_11 +8000fa86 l .data 00000000 trap_excpt_name_12 +8000fa9e l .data 00000000 trap_excpt_name_13 +8000faaf l .data 00000000 trap_excpt_name_14 +8000fabe l .data 00000000 trap_excpt_name_15 +8000fad4 l .data 00000000 trap_excpt_name_16 +8000fae1 l .data 00000000 trap_excpt_name_17 +8000faf0 l .data 00000000 trap_excpt_name_18 +8000fb00 l .data 00000000 trap_excpt_name_19 +8000fb10 l .data 00000000 trap_excpt_name_20 +8000fb2e l .data 00000000 trap_excpt_name_21 +8000fb45 l .data 00000000 trap_excpt_name_22 +8000fb5a l .data 00000000 trap_excpt_name_23 +8000fb76 l .data 00000000 trap_int_name_0 +8000fb8e l .data 00000000 trap_int_name_1 +8000fbad l .data 00000000 trap_int_name_2 +8000fbd4 l .data 00000000 trap_int_name_3 +8000fbf0 l .data 00000000 trap_int_name_4 +8000fc08 l .data 00000000 trap_int_name_5 +8000fc24 l .data 00000000 trap_int_name_6 +8000fc48 l .data 00000000 trap_int_name_7 +8000fc61 l .data 00000000 trap_int_name_8 +8000fc79 l .data 00000000 trap_int_name_9 +8000fc98 l .data 00000000 trap_int_name_10 +8000fcbf l .data 00000000 trap_int_name_11 +8000fcdb l .data 00000000 trap_int_name_12 +8000fd00 l .data 00000000 trap_int_name_13 +8000fd1c l .data 00000000 trap_int_name_14 +8000fd35 l .data 00000000 trap_int_name_15 +8000fef5 l .data 00000000 xepcstr +80010593 l .data 00000000 Mclr_Vext_int_str +800105ed l .data 00000000 Sclr_Mext_int_str +8001068e l .data 00000000 Sclr_Vext_int_str +800106e8 l .data 00000000 Hclr_Mext_int_str +8001078b l .data 00000000 Hclr_Vext_int_str +800107e6 l .data 00000000 Vclr_Mext_int_str +80010836 l .data 00000000 Vclr_Sext_int_str +80010889 l .data 00000000 Vclr_Vext_int_str +80010f28 l .data 00000000 trap_diag_curr_xepc_str +80020520 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80020520 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044e0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011460 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004488 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011460 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8001145b g .data 00000000 rvtest_data_end +80004488 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020700 g .tohost 00000000 fromhost +80020600 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x011beef5 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x6cdc9c20 +80000048: 0001a403 lw x8,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_ror_cg_cp_rs1_b0: + ror x28, x0, x8 # perform operation +80000050: 60805e33 ror x28,x0,x8 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_ror_cg_cp_rs1_b0, Zbkb_ror_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01c20863 beq x4,x28,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x52876daf +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x26a846dc +80000074: 0001a703 lw x14,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_ror_cg_cp_rs1_b1: + ror x25, x1, x14 # perform operation +8000007c: 60e0dcb3 ror x25,x1,x14 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_ror_cg_cp_rs1_b1, Zbkb_ror_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01920863 beq x4,x25,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009020 .word 0x80009020 +80000094: 00410113 addi x2,x2,4 + + mv x1, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010093 addi x1,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3f2b51d5 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xfec690a2 +800000a4: 0001a683 lw x13,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_ror_cg_cp_rs1_b2: + ror x14, x2, x13 # perform operation +800000ac: 60d15733 ror x14,x2,x13 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_ror_cg_cp_rs1_b2, Zbkb_ror_cg_cp_rs1_b2_str) +800000b0: 0000a203 lw x4,0(x1) +800000b4: 00e20863 beq x4,x14,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009050 .word 0x80009050 +800000c4: 00408093 addi x1,x1,4 + + mv x18, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018913 addi x18,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x20cb7b48 +800000cc: 00092183 lw x3,0(x18) +800000d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x7c121533 +800000d4: 00092e03 lw x28,0(x18) +800000d8: 00490913 addi x18,x18,4 + +800000dc : +Zbkb_ror_cg_cp_rs1_b3: + ror x30, x3, x28 # perform operation +800000dc: 61c1df33 ror x30,x3,x28 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_ror_cg_cp_rs1_b3, Zbkb_ror_cg_cp_rs1_b3_str) +800000e0: 0000a203 lw x4,0(x1) +800000e4: 01e20863 beq x4,x30,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009080 .word 0x80009080 +800000f4: 00408093 addi x1,x1,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xdd027566 +80000100: 00092203 lw x4,0(x18) +80000104: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x4eb854f5 +80000108: 00092f03 lw x30,0(x18) +8000010c: 00490913 addi x18,x18,4 + +80000110 : +Zbkb_ror_cg_cp_rs1_b4: + ror x16, x4, x30 # perform operation +80000110: 61e25833 ror x16,x4,x30 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zbkb_ror_cg_cp_rs1_b4, Zbkb_ror_cg_cp_rs1_b4_str) +80000114: 0000a383 lw x7,0(x1) +80000118: 01038863 beq x7,x16,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090b0 .word 0x800090b0 +80000128: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xc61ef38f +8000012c: 00092283 lw x5,0(x18) +80000130: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xa0fd5c17 +80000134: 00092003 lw x0,0(x18) +80000138: 00490913 addi x18,x18,4 + +8000013c : +Zbkb_ror_cg_cp_rs1_b5: + ror x4, x5, x0 # perform operation +8000013c: 6002d233 ror x4,x5,x0 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zbkb_ror_cg_cp_rs1_b5, Zbkb_ror_cg_cp_rs1_b5_str) +80000140: 0000a383 lw x7,0(x1) +80000144: 00438863 beq x7,x4,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 800090e0 .word 0x800090e0 +80000154: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xee4aa68d +80000158: 00092303 lw x6,0(x18) +8000015c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x2da65110 +80000160: 00092003 lw x0,0(x18) +80000164: 00490913 addi x18,x18,4 + +80000168 : +Zbkb_ror_cg_cp_rs1_b6: + ror x17, x6, x0 # perform operation +80000168: 600358b3 ror x17,x6,x0 + # Check if x17 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x17, Zbkb_ror_cg_cp_rs1_b6, Zbkb_ror_cg_cp_rs1_b6_str) +8000016c: 0000a383 lw x7,0(x1) +80000170: 01138863 beq x7,x17,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009110 .word 0x80009110 +80000180: 00408093 addi x1,x1,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x60c2e89a +8000018c: 00092383 lw x7,0(x18) +80000190: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x18257e8c +80000194: 00092b03 lw x22,0(x18) +80000198: 00490913 addi x18,x18,4 + +8000019c : +Zbkb_ror_cg_cp_rs1_b7: + ror x20, x7, x22 # perform operation +8000019c: 6163da33 ror x20,x7,x22 + # Check if x20 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x20, Zbkb_ror_cg_cp_rs1_b7, Zbkb_ror_cg_cp_rs1_b7_str) +800001a0: 0000a683 lw x13,0(x1) +800001a4: 01468863 beq x13,x20,800001b4 +800001a8: 3980576f jal x14,80005540 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009140 .word 0x80009140 +800001b4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x6ae59cf0 +800001b8: 00092403 lw x8,0(x18) +800001bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x97dab8ad +800001c0: 00092a03 lw x20,0(x18) +800001c4: 00490913 addi x18,x18,4 + +800001c8 : +Zbkb_ror_cg_cp_rs1_b8: + ror x0, x8, x20 # perform operation +800001c8: 61445033 ror x0,x8,x20 + # Check if x0 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x0, Zbkb_ror_cg_cp_rs1_b8, Zbkb_ror_cg_cp_rs1_b8_str) +800001cc: 0000a683 lw x13,0(x1) +800001d0: 00068863 beq x13,x0,800001e0 +800001d4: 36c0576f jal x14,80005540 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009170 .word 0x80009170 +800001e0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x4a219c8e +800001e4: 00092483 lw x9,0(x18) +800001e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x31e7097d +800001ec: 00092f03 lw x30,0(x18) +800001f0: 00490913 addi x18,x18,4 + +800001f4 : +Zbkb_ror_cg_cp_rs1_b9: + ror x0, x9, x30 # perform operation +800001f4: 61e4d033 ror x0,x9,x30 + # Check if x0 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x0, Zbkb_ror_cg_cp_rs1_b9, Zbkb_ror_cg_cp_rs1_b9_str) +800001f8: 0000a683 lw x13,0(x1) +800001fc: 00068863 beq x13,x0,8000020c +80000200: 3400576f jal x14,80005540 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091a0 .word 0x800091a0 +8000020c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xe328d1e4 +80000210: 00092503 lw x10,0(x18) +80000214: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x4a3f827d +80000218: 00092f03 lw x30,0(x18) +8000021c: 00490913 addi x18,x18,4 + +80000220 : +Zbkb_ror_cg_cp_rs1_b10: + ror x4, x10, x30 # perform operation +80000220: 61e55233 ror x4,x10,x30 + # Check if x4 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x4, Zbkb_ror_cg_cp_rs1_b10, Zbkb_ror_cg_cp_rs1_b10_str) +80000224: 0000a683 lw x13,0(x1) +80000228: 00468863 beq x13,x4,80000238 +8000022c: 3140576f jal x14,80005540 +80000230: 80000220 .word 0x80000220 +80000234: 800091d1 .word 0x800091d1 +80000238: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x24e38212 +8000023c: 00092583 lw x11,0(x18) +80000240: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xf746a7fb +80000244: 00092e03 lw x28,0(x18) +80000248: 00490913 addi x18,x18,4 + +8000024c : +Zbkb_ror_cg_cp_rs1_b11: + ror x25, x11, x28 # perform operation +8000024c: 61c5dcb3 ror x25,x11,x28 + # Check if x25 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x25, Zbkb_ror_cg_cp_rs1_b11, Zbkb_ror_cg_cp_rs1_b11_str) +80000250: 0000a683 lw x13,0(x1) +80000254: 01968863 beq x13,x25,80000264 +80000258: 2e80576f jal x14,80005540 +8000025c: 8000024c .word 0x8000024c +80000260: 80009203 .word 0x80009203 +80000264: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x45b4de6c +80000268: 00092603 lw x12,0(x18) +8000026c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x5d9ccf38 +80000270: 00092b83 lw x23,0(x18) +80000274: 00490913 addi x18,x18,4 + +80000278 : +Zbkb_ror_cg_cp_rs1_b12: + ror x9, x12, x23 # perform operation +80000278: 617654b3 ror x9,x12,x23 + # Check if x9 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x9, Zbkb_ror_cg_cp_rs1_b12, Zbkb_ror_cg_cp_rs1_b12_str) +8000027c: 0000a683 lw x13,0(x1) +80000280: 00968863 beq x13,x9,80000290 +80000284: 2bc0576f jal x14,80005540 +80000288: 80000278 .word 0x80000278 +8000028c: 80009235 .word 0x80009235 +80000290: 00408093 addi x1,x1,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000294: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000298: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x01ff20fa +8000029c: 00092683 lw x13,0(x18) +800002a0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xd537e6ca +800002a4: 00092703 lw x14,0(x18) +800002a8: 00490913 addi x18,x18,4 + +800002ac : +Zbkb_ror_cg_cp_rs1_b13: + ror x11, x13, x14 # perform operation +800002ac: 60e6d5b3 ror x11,x13,x14 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_ror_cg_cp_rs1_b13, Zbkb_ror_cg_cp_rs1_b13_str) +800002b0: 0000a203 lw x4,0(x1) +800002b4: 00b20863 beq x4,x11,800002c4 +800002b8: 248052ef jal x5,80005500 +800002bc: 800002ac .word 0x800002ac +800002c0: 80009267 .word 0x80009267 +800002c4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x23563cf2 +800002c8: 00092703 lw x14,0(x18) +800002cc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xc0aa092b +800002d0: 00092383 lw x7,0(x18) +800002d4: 00490913 addi x18,x18,4 + +800002d8 : +Zbkb_ror_cg_cp_rs1_b14: + ror x12, x14, x7 # perform operation +800002d8: 60775633 ror x12,x14,x7 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_ror_cg_cp_rs1_b14, Zbkb_ror_cg_cp_rs1_b14_str) +800002dc: 0000a203 lw x4,0(x1) +800002e0: 00c20863 beq x4,x12,800002f0 +800002e4: 21c052ef jal x5,80005500 +800002e8: 800002d8 .word 0x800002d8 +800002ec: 80009299 .word 0x80009299 +800002f0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xccdb3948 +800002f4: 00092783 lw x15,0(x18) +800002f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xfcdc4451 +800002fc: 00092d83 lw x27,0(x18) +80000300: 00490913 addi x18,x18,4 + +80000304 : +Zbkb_ror_cg_cp_rs1_b15: + ror x13, x15, x27 # perform operation +80000304: 61b7d6b3 ror x13,x15,x27 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_ror_cg_cp_rs1_b15, Zbkb_ror_cg_cp_rs1_b15_str) +80000308: 0000a203 lw x4,0(x1) +8000030c: 00d20863 beq x4,x13,8000031c +80000310: 1f0052ef jal x5,80005500 +80000314: 80000304 .word 0x80000304 +80000318: 800092cb .word 0x800092cb +8000031c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x5bd8a83b +80000320: 00092803 lw x16,0(x18) +80000324: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x32f25c4b +80000328: 00092603 lw x12,0(x18) +8000032c: 00490913 addi x18,x18,4 + +80000330 : +Zbkb_ror_cg_cp_rs1_b16: + ror x20, x16, x12 # perform operation +80000330: 60c85a33 ror x20,x16,x12 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_ror_cg_cp_rs1_b16, Zbkb_ror_cg_cp_rs1_b16_str) +80000334: 0000a203 lw x4,0(x1) +80000338: 01420863 beq x4,x20,80000348 +8000033c: 1c4052ef jal x5,80005500 +80000340: 80000330 .word 0x80000330 +80000344: 800092fd .word 0x800092fd +80000348: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xaff17836 +8000034c: 00092883 lw x17,0(x18) +80000350: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x56d6908c +80000354: 00092783 lw x15,0(x18) +80000358: 00490913 addi x18,x18,4 + +8000035c : +Zbkb_ror_cg_cp_rs1_b17: + ror x31, x17, x15 # perform operation +8000035c: 60f8dfb3 ror x31,x17,x15 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_ror_cg_cp_rs1_b17, Zbkb_ror_cg_cp_rs1_b17_str) +80000360: 0000a203 lw x4,0(x1) +80000364: 01f20863 beq x4,x31,80000374 +80000368: 198052ef jal x5,80005500 +8000036c: 8000035c .word 0x8000035c +80000370: 8000932f .word 0x8000932f +80000374: 00408093 addi x1,x1,4 + + mv x10, x18 # switch data pointer register to avoid conflict with test +80000378: 00090513 addi x10,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x8dfa9ae2 +8000037c: 00052903 lw x18,0(x10) +80000380: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x353836e0 +80000384: 00052b03 lw x22,0(x10) +80000388: 00450513 addi x10,x10,4 + +8000038c : +Zbkb_ror_cg_cp_rs1_b18: + ror x14, x18, x22 # perform operation +8000038c: 61695733 ror x14,x18,x22 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_ror_cg_cp_rs1_b18, Zbkb_ror_cg_cp_rs1_b18_str) +80000390: 0000a203 lw x4,0(x1) +80000394: 00e20863 beq x4,x14,800003a4 +80000398: 168052ef jal x5,80005500 +8000039c: 8000038c .word 0x8000038c +800003a0: 80009361 .word 0x80009361 +800003a4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xb11240c6 +800003a8: 00052983 lw x19,0(x10) +800003ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0d189771 +800003b0: 00052703 lw x14,0(x10) +800003b4: 00450513 addi x10,x10,4 + +800003b8 : +Zbkb_ror_cg_cp_rs1_b19: + ror x31, x19, x14 # perform operation +800003b8: 60e9dfb3 ror x31,x19,x14 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_ror_cg_cp_rs1_b19, Zbkb_ror_cg_cp_rs1_b19_str) +800003bc: 0000a203 lw x4,0(x1) +800003c0: 01f20863 beq x4,x31,800003d0 +800003c4: 13c052ef jal x5,80005500 +800003c8: 800003b8 .word 0x800003b8 +800003cc: 80009393 .word 0x80009393 +800003d0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x19858ec4 +800003d4: 00052a03 lw x20,0(x10) +800003d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xde310ae3 +800003dc: 00052f03 lw x30,0(x10) +800003e0: 00450513 addi x10,x10,4 + +800003e4 : +Zbkb_ror_cg_cp_rs1_b20: + ror x21, x20, x30 # perform operation +800003e4: 61ea5ab3 ror x21,x20,x30 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_ror_cg_cp_rs1_b20, Zbkb_ror_cg_cp_rs1_b20_str) +800003e8: 0000a203 lw x4,0(x1) +800003ec: 01520863 beq x4,x21,800003fc +800003f0: 110052ef jal x5,80005500 +800003f4: 800003e4 .word 0x800003e4 +800003f8: 800093c5 .word 0x800093c5 +800003fc: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xb70aaace +80000400: 00052a83 lw x21,0(x10) +80000404: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x89ce7d18 +80000408: 00052183 lw x3,0(x10) +8000040c: 00450513 addi x10,x10,4 + +80000410 : +Zbkb_ror_cg_cp_rs1_b21: + ror x27, x21, x3 # perform operation +80000410: 603addb3 ror x27,x21,x3 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_ror_cg_cp_rs1_b21, Zbkb_ror_cg_cp_rs1_b21_str) +80000414: 0000a203 lw x4,0(x1) +80000418: 01b20863 beq x4,x27,80000428 +8000041c: 0e4052ef jal x5,80005500 +80000420: 80000410 .word 0x80000410 +80000424: 800093f7 .word 0x800093f7 +80000428: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xd6558d18 +8000042c: 00052b03 lw x22,0(x10) +80000430: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x09b492a7 +80000434: 00052603 lw x12,0(x10) +80000438: 00450513 addi x10,x10,4 + +8000043c : +Zbkb_ror_cg_cp_rs1_b22: + ror x8, x22, x12 # perform operation +8000043c: 60cb5433 ror x8,x22,x12 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_ror_cg_cp_rs1_b22, Zbkb_ror_cg_cp_rs1_b22_str) +80000440: 0000a203 lw x4,0(x1) +80000444: 00820863 beq x4,x8,80000454 +80000448: 0b8052ef jal x5,80005500 +8000044c: 8000043c .word 0x8000043c +80000450: 80009429 .word 0x80009429 +80000454: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xbe145bf4 +80000458: 00052b83 lw x23,0(x10) +8000045c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x9a3065ec +80000460: 00052783 lw x15,0(x10) +80000464: 00450513 addi x10,x10,4 + +80000468 : +Zbkb_ror_cg_cp_rs1_b23: + ror x9, x23, x15 # perform operation +80000468: 60fbd4b3 ror x9,x23,x15 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_ror_cg_cp_rs1_b23, Zbkb_ror_cg_cp_rs1_b23_str) +8000046c: 0000a203 lw x4,0(x1) +80000470: 00920863 beq x4,x9,80000480 +80000474: 08c052ef jal x5,80005500 +80000478: 80000468 .word 0x80000468 +8000047c: 8000945b .word 0x8000945b +80000480: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x6d3f27b1 +80000484: 00052c03 lw x24,0(x10) +80000488: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xe0a8dece +8000048c: 00052c83 lw x25,0(x10) +80000490: 00450513 addi x10,x10,4 + +80000494 : +Zbkb_ror_cg_cp_rs1_b24: + ror x19, x24, x25 # perform operation +80000494: 619c59b3 ror x19,x24,x25 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_ror_cg_cp_rs1_b24, Zbkb_ror_cg_cp_rs1_b24_str) +80000498: 0000a203 lw x4,0(x1) +8000049c: 01320863 beq x4,x19,800004ac +800004a0: 060052ef jal x5,80005500 +800004a4: 80000494 .word 0x80000494 +800004a8: 8000948d .word 0x8000948d +800004ac: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xd13bb37f +800004b0: 00052c83 lw x25,0(x10) +800004b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x740f1610 +800004b8: 00052603 lw x12,0(x10) +800004bc: 00450513 addi x10,x10,4 + +800004c0 : +Zbkb_ror_cg_cp_rs1_b25: + ror x22, x25, x12 # perform operation +800004c0: 60ccdb33 ror x22,x25,x12 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_ror_cg_cp_rs1_b25, Zbkb_ror_cg_cp_rs1_b25_str) +800004c4: 0000a203 lw x4,0(x1) +800004c8: 01620863 beq x4,x22,800004d8 +800004cc: 034052ef jal x5,80005500 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 800094bf .word 0x800094bf +800004d8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x6f12f35f +800004dc: 00052d03 lw x26,0(x10) +800004e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x4586be56 +800004e4: 00052303 lw x6,0(x10) +800004e8: 00450513 addi x10,x10,4 + +800004ec : +Zbkb_ror_cg_cp_rs1_b26: + ror x13, x26, x6 # perform operation +800004ec: 606d56b3 ror x13,x26,x6 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_ror_cg_cp_rs1_b26, Zbkb_ror_cg_cp_rs1_b26_str) +800004f0: 0000a203 lw x4,0(x1) +800004f4: 00d20863 beq x4,x13,80000504 +800004f8: 008052ef jal x5,80005500 +800004fc: 800004ec .word 0x800004ec +80000500: 800094f1 .word 0x800094f1 +80000504: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xad58cb4f +80000508: 00052d83 lw x27,0(x10) +8000050c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xb5b038e7 +80000510: 00052783 lw x15,0(x10) +80000514: 00450513 addi x10,x10,4 + +80000518 : +Zbkb_ror_cg_cp_rs1_b27: + ror x7, x27, x15 # perform operation +80000518: 60fdd3b3 ror x7,x27,x15 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_ror_cg_cp_rs1_b27, Zbkb_ror_cg_cp_rs1_b27_str) +8000051c: 0000a203 lw x4,0(x1) +80000520: 00720863 beq x4,x7,80000530 +80000524: 7dd042ef jal x5,80005500 +80000528: 80000518 .word 0x80000518 +8000052c: 80009523 .word 0x80009523 +80000530: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xb56eb33a +80000534: 00052e03 lw x28,0(x10) +80000538: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xd38791a0 +8000053c: 00052f03 lw x30,0(x10) +80000540: 00450513 addi x10,x10,4 + +80000544 : +Zbkb_ror_cg_cp_rs1_b28: + ror x2, x28, x30 # perform operation +80000544: 61ee5133 ror x2,x28,x30 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_ror_cg_cp_rs1_b28, Zbkb_ror_cg_cp_rs1_b28_str) +80000548: 0000a203 lw x4,0(x1) +8000054c: 00220863 beq x4,x2,8000055c +80000550: 7b1042ef jal x5,80005500 +80000554: 80000544 .word 0x80000544 +80000558: 80009555 .word 0x80009555 +8000055c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x03bf26c8 +80000560: 00052e83 lw x29,0(x10) +80000564: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xcd3453d3 +80000568: 00052383 lw x7,0(x10) +8000056c: 00450513 addi x10,x10,4 + +80000570 : +Zbkb_ror_cg_cp_rs1_b29: + ror x28, x29, x7 # perform operation +80000570: 607ede33 ror x28,x29,x7 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_ror_cg_cp_rs1_b29, Zbkb_ror_cg_cp_rs1_b29_str) +80000574: 0000a203 lw x4,0(x1) +80000578: 01c20863 beq x4,x28,80000588 +8000057c: 785042ef jal x5,80005500 +80000580: 80000570 .word 0x80000570 +80000584: 80009587 .word 0x80009587 +80000588: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xdaaa88ef +8000058c: 00052f03 lw x30,0(x10) +80000590: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x369e28b5 +80000594: 00052703 lw x14,0(x10) +80000598: 00450513 addi x10,x10,4 + +8000059c : +Zbkb_ror_cg_cp_rs1_b30: + ror x21, x30, x14 # perform operation +8000059c: 60ef5ab3 ror x21,x30,x14 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_ror_cg_cp_rs1_b30, Zbkb_ror_cg_cp_rs1_b30_str) +800005a0: 0000a203 lw x4,0(x1) +800005a4: 01520863 beq x4,x21,800005b4 +800005a8: 759042ef jal x5,80005500 +800005ac: 8000059c .word 0x8000059c +800005b0: 800095b9 .word 0x800095b9 +800005b4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x72b1145b +800005b8: 00052f83 lw x31,0(x10) +800005bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xe4dc6b10 +800005c0: 00052d03 lw x26,0(x10) +800005c4: 00450513 addi x10,x10,4 + +800005c8 : +Zbkb_ror_cg_cp_rs1_b31: + ror x12, x31, x26 # perform operation +800005c8: 61afd633 ror x12,x31,x26 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_ror_cg_cp_rs1_b31, Zbkb_ror_cg_cp_rs1_b31_str) +800005cc: 0000a203 lw x4,0(x1) +800005d0: 00c20863 beq x4,x12,800005e0 +800005d4: 72d042ef jal x5,80005500 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 800095eb .word 0x800095eb +800005e0: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xba2a2c4b +800005e4: 00052303 lw x6,0(x10) +800005e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xfd17be56 +800005ec: 00052003 lw x0,0(x10) +800005f0: 00450513 addi x10,x10,4 + +800005f4 : +Zbkb_ror_cg_cp_rs2_b0: + ror x31, x6, x0 # perform operation +800005f4: 60035fb3 ror x31,x6,x0 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_ror_cg_cp_rs2_b0, Zbkb_ror_cg_cp_rs2_b0_str) +800005f8: 0000a203 lw x4,0(x1) +800005fc: 01f20863 beq x4,x31,8000060c +80000600: 701042ef jal x5,80005500 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000961d .word 0x8000961d +8000060c: 00408093 addi x1,x1,4 + + mv x2, x1 # switch signature pointer register to avoid conflict with test +80000610: 00008113 addi x2,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x691188fc +80000614: 00052703 lw x14,0(x10) +80000618: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0a62ed6d +8000061c: 00052083 lw x1,0(x10) +80000620: 00450513 addi x10,x10,4 + +80000624 : +Zbkb_ror_cg_cp_rs2_b1: + ror x16, x14, x1 # perform operation +80000624: 60175833 ror x16,x14,x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkb_ror_cg_cp_rs2_b1, Zbkb_ror_cg_cp_rs2_b1_str) +80000628: 00012203 lw x4,0(x2) +8000062c: 01020863 beq x4,x16,8000063c +80000630: 6d1042ef jal x5,80005500 +80000634: 80000624 .word 0x80000624 +80000638: 8000964e .word 0x8000964e +8000063c: 00410113 addi x2,x2,4 + + mv x26, x2 # switch signature pointer register to avoid conflict with test +80000640: 00010d13 addi x26,x2,0 +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xf74b7a5a +80000644: 00052883 lw x17,0(x10) +80000648: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xaacfe943 +8000064c: 00052103 lw x2,0(x10) +80000650: 00450513 addi x10,x10,4 + +80000654 : +Zbkb_ror_cg_cp_rs2_b2: + ror x29, x17, x2 # perform operation +80000654: 6028deb3 ror x29,x17,x2 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zbkb_ror_cg_cp_rs2_b2, Zbkb_ror_cg_cp_rs2_b2_str) +80000658: 000d2203 lw x4,0(x26) +8000065c: 01d20863 beq x4,x29,8000066c +80000660: 6a1042ef jal x5,80005500 +80000664: 80000654 .word 0x80000654 +80000668: 8000967f .word 0x8000967f +8000066c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x78cf25fe +80000670: 00052603 lw x12,0(x10) +80000674: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xbb367afa +80000678: 00052183 lw x3,0(x10) +8000067c: 00450513 addi x10,x10,4 + +80000680 : +Zbkb_ror_cg_cp_rs2_b3: + ror x19, x12, x3 # perform operation +80000680: 603659b3 ror x19,x12,x3 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zbkb_ror_cg_cp_rs2_b3, Zbkb_ror_cg_cp_rs2_b3_str) +80000684: 000d2203 lw x4,0(x26) +80000688: 01320863 beq x4,x19,80000698 +8000068c: 675042ef jal x5,80005500 +80000690: 80000680 .word 0x80000680 +80000694: 800096b0 .word 0x800096b0 +80000698: 004d0d13 addi x26,x26,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000069c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800006a0: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xcb008277 +800006a4: 00052f83 lw x31,0(x10) +800006a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x7eed7025 +800006ac: 00052203 lw x4,0(x10) +800006b0: 00450513 addi x10,x10,4 + +800006b4 : +Zbkb_ror_cg_cp_rs2_b4: + ror x20, x31, x4 # perform operation +800006b4: 604fda33 ror x20,x31,x4 + # Check if x20 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x20, Zbkb_ror_cg_cp_rs2_b4, Zbkb_ror_cg_cp_rs2_b4_str) +800006b8: 000d2383 lw x7,0(x26) +800006bc: 01438863 beq x7,x20,800006cc +800006c0: 6590446f jal x8,80005518 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 800096e1 .word 0x800096e1 +800006cc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x32b82754 +800006d0: 00052e83 lw x29,0(x10) +800006d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xe217c753 +800006d8: 00052283 lw x5,0(x10) +800006dc: 00450513 addi x10,x10,4 + +800006e0 : +Zbkb_ror_cg_cp_rs2_b5: + ror x12, x29, x5 # perform operation +800006e0: 605ed633 ror x12,x29,x5 + # Check if x12 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x12, Zbkb_ror_cg_cp_rs2_b5, Zbkb_ror_cg_cp_rs2_b5_str) +800006e4: 000d2383 lw x7,0(x26) +800006e8: 00c38863 beq x7,x12,800006f8 +800006ec: 62d0446f jal x8,80005518 +800006f0: 800006e0 .word 0x800006e0 +800006f4: 80009712 .word 0x80009712 +800006f8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x6a2837ec +800006fc: 00052703 lw x14,0(x10) +80000700: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5e53fb62 +80000704: 00052303 lw x6,0(x10) +80000708: 00450513 addi x10,x10,4 + +8000070c : +Zbkb_ror_cg_cp_rs2_b6: + ror x4, x14, x6 # perform operation +8000070c: 60675233 ror x4,x14,x6 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zbkb_ror_cg_cp_rs2_b6, Zbkb_ror_cg_cp_rs2_b6_str) +80000710: 000d2383 lw x7,0(x26) +80000714: 00438863 beq x7,x4,80000724 +80000718: 6010446f jal x8,80005518 +8000071c: 8000070c .word 0x8000070c +80000720: 80009743 .word 0x80009743 +80000724: 004d0d13 addi x26,x26,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000728: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +8000072c: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xd5c486d2 +80000730: 00052c83 lw x25,0(x10) +80000734: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x16373756 +80000738: 00052383 lw x7,0(x10) +8000073c: 00450513 addi x10,x10,4 + +80000740 : +Zbkb_ror_cg_cp_rs2_b7: + ror x29, x25, x7 # perform operation +80000740: 607cdeb3 ror x29,x25,x7 + # Check if x29 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x29, Zbkb_ror_cg_cp_rs2_b7, Zbkb_ror_cg_cp_rs2_b7_str) +80000744: 000d2683 lw x13,0(x26) +80000748: 01d68863 beq x13,x29,80000758 +8000074c: 5f50476f jal x14,80005540 +80000750: 80000740 .word 0x80000740 +80000754: 80009774 .word 0x80009774 +80000758: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xd372562b +8000075c: 00052c03 lw x24,0(x10) +80000760: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x1d1c94f3 +80000764: 00052403 lw x8,0(x10) +80000768: 00450513 addi x10,x10,4 + +8000076c : +Zbkb_ror_cg_cp_rs2_b8: + ror x30, x24, x8 # perform operation +8000076c: 608c5f33 ror x30,x24,x8 + # Check if x30 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x30, Zbkb_ror_cg_cp_rs2_b8, Zbkb_ror_cg_cp_rs2_b8_str) +80000770: 000d2683 lw x13,0(x26) +80000774: 01e68863 beq x13,x30,80000784 +80000778: 5c90476f jal x14,80005540 +8000077c: 8000076c .word 0x8000076c +80000780: 800097a5 .word 0x800097a5 +80000784: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x29593aa4 +80000788: 00052583 lw x11,0(x10) +8000078c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xc8a9ef60 +80000790: 00052483 lw x9,0(x10) +80000794: 00450513 addi x10,x10,4 + +80000798 : +Zbkb_ror_cg_cp_rs2_b9: + ror x25, x11, x9 # perform operation +80000798: 6095dcb3 ror x25,x11,x9 + # Check if x25 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x25, Zbkb_ror_cg_cp_rs2_b9, Zbkb_ror_cg_cp_rs2_b9_str) +8000079c: 000d2683 lw x13,0(x26) +800007a0: 01968863 beq x13,x25,800007b0 +800007a4: 59d0476f jal x14,80005540 +800007a8: 80000798 .word 0x80000798 +800007ac: 800097d6 .word 0x800097d6 +800007b0: 004d0d13 addi x26,x26,4 + + mv x30, x10 # switch data pointer register to avoid conflict with test +800007b4: 00050f13 addi x30,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x1c2e854b +800007b8: 000f2903 lw x18,0(x30) +800007bc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xe03c0367 +800007c0: 000f2503 lw x10,0(x30) +800007c4: 004f0f13 addi x30,x30,4 + +800007c8 : +Zbkb_ror_cg_cp_rs2_b10: + ror x12, x18, x10 # perform operation +800007c8: 60a95633 ror x12,x18,x10 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zbkb_ror_cg_cp_rs2_b10, Zbkb_ror_cg_cp_rs2_b10_str) +800007cc: 000d2683 lw x13,0(x26) +800007d0: 00c68863 beq x13,x12,800007e0 +800007d4: 56d0476f jal x14,80005540 +800007d8: 800007c8 .word 0x800007c8 +800007dc: 80009807 .word 0x80009807 +800007e0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x0b6c0cf5 +800007e4: 000f2c03 lw x24,0(x30) +800007e8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xef3ba13c +800007ec: 000f2583 lw x11,0(x30) +800007f0: 004f0f13 addi x30,x30,4 + +800007f4 : +Zbkb_ror_cg_cp_rs2_b11: + ror x2, x24, x11 # perform operation +800007f4: 60bc5133 ror x2,x24,x11 + # Check if x2 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x2, Zbkb_ror_cg_cp_rs2_b11, Zbkb_ror_cg_cp_rs2_b11_str) +800007f8: 000d2683 lw x13,0(x26) +800007fc: 00268863 beq x13,x2,8000080c +80000800: 5410476f jal x14,80005540 +80000804: 800007f4 .word 0x800007f4 +80000808: 80009839 .word 0x80009839 +8000080c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x595cfce9 +80000810: 000f2283 lw x5,0(x30) +80000814: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xa335e17e +80000818: 000f2603 lw x12,0(x30) +8000081c: 004f0f13 addi x30,x30,4 + +80000820 : +Zbkb_ror_cg_cp_rs2_b12: + ror x17, x5, x12 # perform operation +80000820: 60c2d8b3 ror x17,x5,x12 + # Check if x17 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x17, Zbkb_ror_cg_cp_rs2_b12, Zbkb_ror_cg_cp_rs2_b12_str) +80000824: 000d2683 lw x13,0(x26) +80000828: 01168863 beq x13,x17,80000838 +8000082c: 5150476f jal x14,80005540 +80000830: 80000820 .word 0x80000820 +80000834: 8000986b .word 0x8000986b +80000838: 004d0d13 addi x26,x26,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000083c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000840: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x48b7a309 +80000844: 000f2283 lw x5,0(x30) +80000848: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0xe9b65d0a +8000084c: 000f2683 lw x13,0(x30) +80000850: 004f0f13 addi x30,x30,4 + +80000854 : +Zbkb_ror_cg_cp_rs2_b13: + ror x12, x5, x13 # perform operation +80000854: 60d2d633 ror x12,x5,x13 + # Check if x12 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x12, Zbkb_ror_cg_cp_rs2_b13, Zbkb_ror_cg_cp_rs2_b13_str) +80000858: 000d2383 lw x7,0(x26) +8000085c: 00c38863 beq x7,x12,8000086c +80000860: 4b90446f jal x8,80005518 +80000864: 80000854 .word 0x80000854 +80000868: 8000989d .word 0x8000989d +8000086c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x01bf41a0 +80000870: 000f2d83 lw x27,0(x30) +80000874: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0xb408e56c +80000878: 000f2703 lw x14,0(x30) +8000087c: 004f0f13 addi x30,x30,4 + +80000880 : +Zbkb_ror_cg_cp_rs2_b14: + ror x0, x27, x14 # perform operation +80000880: 60edd033 ror x0,x27,x14 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zbkb_ror_cg_cp_rs2_b14, Zbkb_ror_cg_cp_rs2_b14_str) +80000884: 000d2383 lw x7,0(x26) +80000888: 00038863 beq x7,x0,80000898 +8000088c: 48d0446f jal x8,80005518 +80000890: 80000880 .word 0x80000880 +80000894: 800098cf .word 0x800098cf +80000898: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x43ddcd28 +8000089c: 000f2803 lw x16,0(x30) +800008a0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x130fa7ea +800008a4: 000f2783 lw x15,0(x30) +800008a8: 004f0f13 addi x30,x30,4 + +800008ac : +Zbkb_ror_cg_cp_rs2_b15: + ror x2, x16, x15 # perform operation +800008ac: 60f85133 ror x2,x16,x15 + # Check if x2 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x2, Zbkb_ror_cg_cp_rs2_b15, Zbkb_ror_cg_cp_rs2_b15_str) +800008b0: 000d2383 lw x7,0(x26) +800008b4: 00238863 beq x7,x2,800008c4 +800008b8: 4610446f jal x8,80005518 +800008bc: 800008ac .word 0x800008ac +800008c0: 80009901 .word 0x80009901 +800008c4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xe3c40999 +800008c8: 000f2e83 lw x29,0(x30) +800008cc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x22cccc92 +800008d0: 000f2803 lw x16,0(x30) +800008d4: 004f0f13 addi x30,x30,4 + +800008d8 : +Zbkb_ror_cg_cp_rs2_b16: + ror x27, x29, x16 # perform operation +800008d8: 610eddb3 ror x27,x29,x16 + # Check if x27 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x27, Zbkb_ror_cg_cp_rs2_b16, Zbkb_ror_cg_cp_rs2_b16_str) +800008dc: 000d2383 lw x7,0(x26) +800008e0: 01b38863 beq x7,x27,800008f0 +800008e4: 4350446f jal x8,80005518 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 80009933 .word 0x80009933 +800008f0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x0e032c7c +800008f4: 000f2983 lw x19,0(x30) +800008f8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x75a0a2b7 +800008fc: 000f2883 lw x17,0(x30) +80000900: 004f0f13 addi x30,x30,4 + +80000904 : +Zbkb_ror_cg_cp_rs2_b17: + ror x14, x19, x17 # perform operation +80000904: 6119d733 ror x14,x19,x17 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zbkb_ror_cg_cp_rs2_b17, Zbkb_ror_cg_cp_rs2_b17_str) +80000908: 000d2383 lw x7,0(x26) +8000090c: 00e38863 beq x7,x14,8000091c +80000910: 4090446f jal x8,80005518 +80000914: 80000904 .word 0x80000904 +80000918: 80009965 .word 0x80009965 +8000091c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x4c507aae +80000920: 000f2e03 lw x28,0(x30) +80000924: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x019855e2 +80000928: 000f2903 lw x18,0(x30) +8000092c: 004f0f13 addi x30,x30,4 + +80000930 : +Zbkb_ror_cg_cp_rs2_b18: + ror x17, x28, x18 # perform operation +80000930: 612e58b3 ror x17,x28,x18 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zbkb_ror_cg_cp_rs2_b18, Zbkb_ror_cg_cp_rs2_b18_str) +80000934: 000d2383 lw x7,0(x26) +80000938: 01138863 beq x7,x17,80000948 +8000093c: 3dd0446f jal x8,80005518 +80000940: 80000930 .word 0x80000930 +80000944: 80009997 .word 0x80009997 +80000948: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x1827fb16 +8000094c: 000f2e83 lw x29,0(x30) +80000950: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xc975ac98 +80000954: 000f2983 lw x19,0(x30) +80000958: 004f0f13 addi x30,x30,4 + +8000095c : +Zbkb_ror_cg_cp_rs2_b19: + ror x27, x29, x19 # perform operation +8000095c: 613eddb3 ror x27,x29,x19 + # Check if x27 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x27, Zbkb_ror_cg_cp_rs2_b19, Zbkb_ror_cg_cp_rs2_b19_str) +80000960: 000d2383 lw x7,0(x26) +80000964: 01b38863 beq x7,x27,80000974 +80000968: 3b10446f jal x8,80005518 +8000096c: 8000095c .word 0x8000095c +80000970: 800099c9 .word 0x800099c9 +80000974: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x11a6595a +80000978: 000f2683 lw x13,0(x30) +8000097c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x1141f56f +80000980: 000f2a03 lw x20,0(x30) +80000984: 004f0f13 addi x30,x30,4 + +80000988 : +Zbkb_ror_cg_cp_rs2_b20: + ror x24, x13, x20 # perform operation +80000988: 6146dc33 ror x24,x13,x20 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zbkb_ror_cg_cp_rs2_b20, Zbkb_ror_cg_cp_rs2_b20_str) +8000098c: 000d2383 lw x7,0(x26) +80000990: 01838863 beq x7,x24,800009a0 +80000994: 3850446f jal x8,80005518 +80000998: 80000988 .word 0x80000988 +8000099c: 800099fb .word 0x800099fb +800009a0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x12611701 +800009a4: 000f2483 lw x9,0(x30) +800009a8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x05a063e1 +800009ac: 000f2a83 lw x21,0(x30) +800009b0: 004f0f13 addi x30,x30,4 + +800009b4 : +Zbkb_ror_cg_cp_rs2_b21: + ror x14, x9, x21 # perform operation +800009b4: 6154d733 ror x14,x9,x21 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zbkb_ror_cg_cp_rs2_b21, Zbkb_ror_cg_cp_rs2_b21_str) +800009b8: 000d2383 lw x7,0(x26) +800009bc: 00e38863 beq x7,x14,800009cc +800009c0: 3590446f jal x8,80005518 +800009c4: 800009b4 .word 0x800009b4 +800009c8: 80009a2d .word 0x80009a2d +800009cc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xd321d3c9 +800009d0: 000f2a83 lw x21,0(x30) +800009d4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x41efbdb7 +800009d8: 000f2b03 lw x22,0(x30) +800009dc: 004f0f13 addi x30,x30,4 + +800009e0 : +Zbkb_ror_cg_cp_rs2_b22: + ror x15, x21, x22 # perform operation +800009e0: 616ad7b3 ror x15,x21,x22 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zbkb_ror_cg_cp_rs2_b22, Zbkb_ror_cg_cp_rs2_b22_str) +800009e4: 000d2383 lw x7,0(x26) +800009e8: 00f38863 beq x7,x15,800009f8 +800009ec: 32d0446f jal x8,80005518 +800009f0: 800009e0 .word 0x800009e0 +800009f4: 80009a5f .word 0x80009a5f +800009f8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x166f5cd7 +800009fc: 000f2983 lw x19,0(x30) +80000a00: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x0146534e +80000a04: 000f2b83 lw x23,0(x30) +80000a08: 004f0f13 addi x30,x30,4 + +80000a0c : +Zbkb_ror_cg_cp_rs2_b23: + ror x16, x19, x23 # perform operation +80000a0c: 6179d833 ror x16,x19,x23 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zbkb_ror_cg_cp_rs2_b23, Zbkb_ror_cg_cp_rs2_b23_str) +80000a10: 000d2383 lw x7,0(x26) +80000a14: 01038863 beq x7,x16,80000a24 +80000a18: 3010446f jal x8,80005518 +80000a1c: 80000a0c .word 0x80000a0c +80000a20: 80009a91 .word 0x80009a91 +80000a24: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x2ef50104 +80000a28: 000f2a83 lw x21,0(x30) +80000a2c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x8df9292e +80000a30: 000f2c03 lw x24,0(x30) +80000a34: 004f0f13 addi x30,x30,4 + +80000a38 : +Zbkb_ror_cg_cp_rs2_b24: + ror x5, x21, x24 # perform operation +80000a38: 618ad2b3 ror x5,x21,x24 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zbkb_ror_cg_cp_rs2_b24, Zbkb_ror_cg_cp_rs2_b24_str) +80000a3c: 000d2383 lw x7,0(x26) +80000a40: 00538863 beq x7,x5,80000a50 +80000a44: 2d50446f jal x8,80005518 +80000a48: 80000a38 .word 0x80000a38 +80000a4c: 80009ac3 .word 0x80009ac3 +80000a50: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x69139926 +80000a54: 000f2e83 lw x29,0(x30) +80000a58: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0xb1382d39 +80000a5c: 000f2c83 lw x25,0(x30) +80000a60: 004f0f13 addi x30,x30,4 + +80000a64 : +Zbkb_ror_cg_cp_rs2_b25: + ror x22, x29, x25 # perform operation +80000a64: 619edb33 ror x22,x29,x25 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zbkb_ror_cg_cp_rs2_b25, Zbkb_ror_cg_cp_rs2_b25_str) +80000a68: 000d2383 lw x7,0(x26) +80000a6c: 01638863 beq x7,x22,80000a7c +80000a70: 2a90446f jal x8,80005518 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 80009af5 .word 0x80009af5 +80000a7c: 004d0d13 addi x26,x26,4 + + mv x20, x26 # switch signature pointer register to avoid conflict with test +80000a80: 000d0a13 addi x20,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x259e1cf1 +80000a84: 000f2283 lw x5,0(x30) +80000a88: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xeae450de +80000a8c: 000f2d03 lw x26,0(x30) +80000a90: 004f0f13 addi x30,x30,4 + +80000a94 : +Zbkb_ror_cg_cp_rs2_b26: + ror x2, x5, x26 # perform operation +80000a94: 61a2d133 ror x2,x5,x26 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_ror_cg_cp_rs2_b26, Zbkb_ror_cg_cp_rs2_b26_str) +80000a98: 000a2383 lw x7,0(x20) +80000a9c: 00238863 beq x7,x2,80000aac +80000aa0: 2790446f jal x8,80005518 +80000aa4: 80000a94 .word 0x80000a94 +80000aa8: 80009b27 .word 0x80009b27 +80000aac: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x56ce1abf +80000ab0: 000f2d03 lw x26,0(x30) +80000ab4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xadb11a70 +80000ab8: 000f2d83 lw x27,0(x30) +80000abc: 004f0f13 addi x30,x30,4 + +80000ac0 : +Zbkb_ror_cg_cp_rs2_b27: + ror x23, x26, x27 # perform operation +80000ac0: 61bd5bb3 ror x23,x26,x27 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zbkb_ror_cg_cp_rs2_b27, Zbkb_ror_cg_cp_rs2_b27_str) +80000ac4: 000a2383 lw x7,0(x20) +80000ac8: 01738863 beq x7,x23,80000ad8 +80000acc: 24d0446f jal x8,80005518 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 80009b59 .word 0x80009b59 +80000ad8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x9e827ee6 +80000adc: 000f2b03 lw x22,0(x30) +80000ae0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x22578df7 +80000ae4: 000f2e03 lw x28,0(x30) +80000ae8: 004f0f13 addi x30,x30,4 + +80000aec : +Zbkb_ror_cg_cp_rs2_b28: + ror x0, x22, x28 # perform operation +80000aec: 61cb5033 ror x0,x22,x28 + # Check if x0 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x0, Zbkb_ror_cg_cp_rs2_b28, Zbkb_ror_cg_cp_rs2_b28_str) +80000af0: 000a2383 lw x7,0(x20) +80000af4: 00038863 beq x7,x0,80000b04 +80000af8: 2210446f jal x8,80005518 +80000afc: 80000aec .word 0x80000aec +80000b00: 80009b8b .word 0x80009b8b +80000b04: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x2458a2c1 +80000b08: 000f2503 lw x10,0(x30) +80000b0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xb33ae1f9 +80000b10: 000f2e83 lw x29,0(x30) +80000b14: 004f0f13 addi x30,x30,4 + +80000b18 : +Zbkb_ror_cg_cp_rs2_b29: + ror x9, x10, x29 # perform operation +80000b18: 61d554b3 ror x9,x10,x29 + # Check if x9 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x9, Zbkb_ror_cg_cp_rs2_b29, Zbkb_ror_cg_cp_rs2_b29_str) +80000b1c: 000a2383 lw x7,0(x20) +80000b20: 00938863 beq x7,x9,80000b30 +80000b24: 1f50446f jal x8,80005518 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 80009bbd .word 0x80009bbd +80000b30: 004a0a13 addi x20,x20,4 + + mv x21, x30 # switch data pointer register to avoid conflict with test +80000b34: 000f0a93 addi x21,x30,0 +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xcc5c58aa +80000b38: 000aa103 lw x2,0(x21) +80000b3c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xd15abc30 +80000b40: 000aaf03 lw x30,0(x21) +80000b44: 004a8a93 addi x21,x21,4 + +80000b48 : +Zbkb_ror_cg_cp_rs2_b30: + ror x16, x2, x30 # perform operation +80000b48: 61e15833 ror x16,x2,x30 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zbkb_ror_cg_cp_rs2_b30, Zbkb_ror_cg_cp_rs2_b30_str) +80000b4c: 000a2383 lw x7,0(x20) +80000b50: 01038863 beq x7,x16,80000b60 +80000b54: 1c50446f jal x8,80005518 +80000b58: 80000b48 .word 0x80000b48 +80000b5c: 80009bef .word 0x80009bef +80000b60: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xc5337555 +80000b64: 000aab03 lw x22,0(x21) +80000b68: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x79408b2f +80000b6c: 000aaf83 lw x31,0(x21) +80000b70: 004a8a93 addi x21,x21,4 + +80000b74 : +Zbkb_ror_cg_cp_rs2_b31: + ror x13, x22, x31 # perform operation +80000b74: 61fb56b3 ror x13,x22,x31 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zbkb_ror_cg_cp_rs2_b31, Zbkb_ror_cg_cp_rs2_b31_str) +80000b78: 000a2383 lw x7,0(x20) +80000b7c: 00d38863 beq x7,x13,80000b8c +80000b80: 1990446f jal x8,80005518 +80000b84: 80000b74 .word 0x80000b74 +80000b88: 80009c21 .word 0x80009c21 +80000b8c: 004a0a13 addi x20,x20,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xb15e4dee +80000b90: 000aab83 lw x23,0(x21) +80000b94: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0xd3a825a6 +80000b98: 000aa283 lw x5,0(x21) +80000b9c: 004a8a93 addi x21,x21,4 + +80000ba0 : +Zbkb_ror_cg_cp_rd_b0: + ror x0, x23, x5 # perform operation +80000ba0: 605bd033 ror x0,x23,x5 + # Check if x0 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x0, Zbkb_ror_cg_cp_rd_b0, Zbkb_ror_cg_cp_rd_b0_str) +80000ba4: 000a2383 lw x7,0(x20) +80000ba8: 00038863 beq x7,x0,80000bb8 +80000bac: 16d0446f jal x8,80005518 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 80009c53 .word 0x80009c53 +80000bb8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x0a1e1ad9 +80000bbc: 000aa683 lw x13,0(x21) +80000bc0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x7dafb9d2 +80000bc4: 000aa283 lw x5,0(x21) +80000bc8: 004a8a93 addi x21,x21,4 + +80000bcc : +Zbkb_ror_cg_cp_rd_b1: + ror x1, x13, x5 # perform operation +80000bcc: 6056d0b3 ror x1,x13,x5 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zbkb_ror_cg_cp_rd_b1, Zbkb_ror_cg_cp_rd_b1_str) +80000bd0: 000a2383 lw x7,0(x20) +80000bd4: 00138863 beq x7,x1,80000be4 +80000bd8: 1410446f jal x8,80005518 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80009c83 .word 0x80009c83 +80000be4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x3a53d9d1 +80000be8: 000aa003 lw x0,0(x21) +80000bec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x306c72f6 +80000bf0: 000aa603 lw x12,0(x21) +80000bf4: 004a8a93 addi x21,x21,4 + +80000bf8 : +Zbkb_ror_cg_cp_rd_b2: + ror x2, x0, x12 # perform operation +80000bf8: 60c05133 ror x2,x0,x12 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_ror_cg_cp_rd_b2, Zbkb_ror_cg_cp_rd_b2_str) +80000bfc: 000a2383 lw x7,0(x20) +80000c00: 00238863 beq x7,x2,80000c10 +80000c04: 1150446f jal x8,80005518 +80000c08: 80000bf8 .word 0x80000bf8 +80000c0c: 80009cb3 .word 0x80009cb3 +80000c10: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x23130d90 +80000c14: 000aab83 lw x23,0(x21) +80000c18: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x0c6fbe0a +80000c1c: 000aa903 lw x18,0(x21) +80000c20: 004a8a93 addi x21,x21,4 + +80000c24 : +Zbkb_ror_cg_cp_rd_b3: + ror x3, x23, x18 # perform operation +80000c24: 612bd1b3 ror x3,x23,x18 + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zbkb_ror_cg_cp_rd_b3, Zbkb_ror_cg_cp_rd_b3_str) +80000c28: 000a2383 lw x7,0(x20) +80000c2c: 00338863 beq x7,x3,80000c3c +80000c30: 0e90446f jal x8,80005518 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80009ce3 .word 0x80009ce3 +80000c3c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xf8a88ffa +80000c40: 000aae03 lw x28,0(x21) +80000c44: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x88396fec +80000c48: 000aa003 lw x0,0(x21) +80000c4c: 004a8a93 addi x21,x21,4 + +80000c50 : +Zbkb_ror_cg_cp_rd_b4: + ror x4, x28, x0 # perform operation +80000c50: 600e5233 ror x4,x28,x0 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zbkb_ror_cg_cp_rd_b4, Zbkb_ror_cg_cp_rd_b4_str) +80000c54: 000a2383 lw x7,0(x20) +80000c58: 00438863 beq x7,x4,80000c68 +80000c5c: 0bd0446f jal x8,80005518 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 80009d13 .word 0x80009d13 +80000c68: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x183d3840 +80000c6c: 000aa083 lw x1,0(x21) +80000c70: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xd4ac369c +80000c74: 000aad03 lw x26,0(x21) +80000c78: 004a8a93 addi x21,x21,4 + +80000c7c : +Zbkb_ror_cg_cp_rd_b5: + ror x5, x1, x26 # perform operation +80000c7c: 61a0d2b3 ror x5,x1,x26 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zbkb_ror_cg_cp_rd_b5, Zbkb_ror_cg_cp_rd_b5_str) +80000c80: 000a2383 lw x7,0(x20) +80000c84: 00538863 beq x7,x5,80000c94 +80000c88: 0910446f jal x8,80005518 +80000c8c: 80000c7c .word 0x80000c7c +80000c90: 80009d43 .word 0x80009d43 +80000c94: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x4d2a96ba +80000c98: 000aaf83 lw x31,0(x21) +80000c9c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xe5aab797 +80000ca0: 000aad83 lw x27,0(x21) +80000ca4: 004a8a93 addi x21,x21,4 + +80000ca8 : +Zbkb_ror_cg_cp_rd_b6: + ror x6, x31, x27 # perform operation +80000ca8: 61bfd333 ror x6,x31,x27 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkb_ror_cg_cp_rd_b6, Zbkb_ror_cg_cp_rd_b6_str) +80000cac: 000a2383 lw x7,0(x20) +80000cb0: 00638863 beq x7,x6,80000cc0 +80000cb4: 0650446f jal x8,80005518 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 80009d73 .word 0x80009d73 +80000cc0: 004a0a13 addi x20,x20,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cc4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cc8: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x939bf55d +80000ccc: 000aa603 lw x12,0(x21) +80000cd0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x16ec89db +80000cd4: 000aa483 lw x9,0(x21) +80000cd8: 004a8a93 addi x21,x21,4 + +80000cdc : +Zbkb_ror_cg_cp_rd_b7: + ror x7, x12, x9 # perform operation +80000cdc: 609653b3 ror x7,x12,x9 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zbkb_ror_cg_cp_rd_b7, Zbkb_ror_cg_cp_rd_b7_str) +80000ce0: 000a2683 lw x13,0(x20) +80000ce4: 00768863 beq x13,x7,80000cf4 +80000ce8: 0590476f jal x14,80005540 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 80009da3 .word 0x80009da3 +80000cf4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x0667ef37 +80000cf8: 000aac83 lw x25,0(x21) +80000cfc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x3922dc5c +80000d00: 000aa003 lw x0,0(x21) +80000d04: 004a8a93 addi x21,x21,4 + +80000d08 : +Zbkb_ror_cg_cp_rd_b8: + ror x8, x25, x0 # perform operation +80000d08: 600cd433 ror x8,x25,x0 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zbkb_ror_cg_cp_rd_b8, Zbkb_ror_cg_cp_rd_b8_str) +80000d0c: 000a2683 lw x13,0(x20) +80000d10: 00868863 beq x13,x8,80000d20 +80000d14: 02d0476f jal x14,80005540 +80000d18: 80000d08 .word 0x80000d08 +80000d1c: 80009dd3 .word 0x80009dd3 +80000d20: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x7ada987c +80000d24: 000aa403 lw x8,0(x21) +80000d28: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x4094871c +80000d2c: 000aa883 lw x17,0(x21) +80000d30: 004a8a93 addi x21,x21,4 + +80000d34 : +Zbkb_ror_cg_cp_rd_b9: + ror x9, x8, x17 # perform operation +80000d34: 611454b3 ror x9,x8,x17 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zbkb_ror_cg_cp_rd_b9, Zbkb_ror_cg_cp_rd_b9_str) +80000d38: 000a2683 lw x13,0(x20) +80000d3c: 00968863 beq x13,x9,80000d4c +80000d40: 0010476f jal x14,80005540 +80000d44: 80000d34 .word 0x80000d34 +80000d48: 80009e03 .word 0x80009e03 +80000d4c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xb2520c0e +80000d50: 000aaf83 lw x31,0(x21) +80000d54: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xa648b340 +80000d58: 000aa603 lw x12,0(x21) +80000d5c: 004a8a93 addi x21,x21,4 + +80000d60 : +Zbkb_ror_cg_cp_rd_b10: + ror x10, x31, x12 # perform operation +80000d60: 60cfd533 ror x10,x31,x12 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkb_ror_cg_cp_rd_b10, Zbkb_ror_cg_cp_rd_b10_str) +80000d64: 000a2683 lw x13,0(x20) +80000d68: 00a68863 beq x13,x10,80000d78 +80000d6c: 7d40476f jal x14,80005540 +80000d70: 80000d60 .word 0x80000d60 +80000d74: 80009e33 .word 0x80009e33 +80000d78: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xac81a6ac +80000d7c: 000aad03 lw x26,0(x21) +80000d80: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x3b0d51cf +80000d84: 000aa183 lw x3,0(x21) +80000d88: 004a8a93 addi x21,x21,4 + +80000d8c : +Zbkb_ror_cg_cp_rd_b11: + ror x11, x26, x3 # perform operation +80000d8c: 603d55b3 ror x11,x26,x3 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkb_ror_cg_cp_rd_b11, Zbkb_ror_cg_cp_rd_b11_str) +80000d90: 000a2683 lw x13,0(x20) +80000d94: 00b68863 beq x13,x11,80000da4 +80000d98: 7a80476f jal x14,80005540 +80000d9c: 80000d8c .word 0x80000d8c +80000da0: 80009e64 .word 0x80009e64 +80000da4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x9a1bd796 +80000da8: 000aa003 lw x0,0(x21) +80000dac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xf3efd838 +80000db0: 000aa503 lw x10,0(x21) +80000db4: 004a8a93 addi x21,x21,4 + +80000db8 : +Zbkb_ror_cg_cp_rd_b12: + ror x12, x0, x10 # perform operation +80000db8: 60a05633 ror x12,x0,x10 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkb_ror_cg_cp_rd_b12, Zbkb_ror_cg_cp_rd_b12_str) +80000dbc: 000a2683 lw x13,0(x20) +80000dc0: 00c68863 beq x13,x12,80000dd0 +80000dc4: 77c0476f jal x14,80005540 +80000dc8: 80000db8 .word 0x80000db8 +80000dcc: 80009e95 .word 0x80009e95 +80000dd0: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dd4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dd8: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xf1d1d082 +80000ddc: 000aa803 lw x16,0(x21) +80000de0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x49c860a3 +80000de4: 000aa583 lw x11,0(x21) +80000de8: 004a8a93 addi x21,x21,4 + +80000dec : +Zbkb_ror_cg_cp_rd_b13: + ror x13, x16, x11 # perform operation +80000dec: 60b856b3 ror x13,x16,x11 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkb_ror_cg_cp_rd_b13, Zbkb_ror_cg_cp_rd_b13_str) +80000df0: 000a2203 lw x4,0(x20) +80000df4: 00d20863 beq x4,x13,80000e04 +80000df8: 708042ef jal x5,80005500 +80000dfc: 80000dec .word 0x80000dec +80000e00: 80009ec6 .word 0x80009ec6 +80000e04: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xe8f26201 +80000e08: 000aa303 lw x6,0(x21) +80000e0c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x2c4a5277 +80000e10: 000aa883 lw x17,0(x21) +80000e14: 004a8a93 addi x21,x21,4 + +80000e18 : +Zbkb_ror_cg_cp_rd_b14: + ror x14, x6, x17 # perform operation +80000e18: 61135733 ror x14,x6,x17 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkb_ror_cg_cp_rd_b14, Zbkb_ror_cg_cp_rd_b14_str) +80000e1c: 000a2203 lw x4,0(x20) +80000e20: 00e20863 beq x4,x14,80000e30 +80000e24: 6dc042ef jal x5,80005500 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80009ef7 .word 0x80009ef7 +80000e30: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x9c49c3f6 +80000e34: 000aad83 lw x27,0(x21) +80000e38: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x406577ac +80000e3c: 000aa703 lw x14,0(x21) +80000e40: 004a8a93 addi x21,x21,4 + +80000e44 : +Zbkb_ror_cg_cp_rd_b15: + ror x15, x27, x14 # perform operation +80000e44: 60edd7b3 ror x15,x27,x14 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkb_ror_cg_cp_rd_b15, Zbkb_ror_cg_cp_rd_b15_str) +80000e48: 000a2203 lw x4,0(x20) +80000e4c: 00f20863 beq x4,x15,80000e5c +80000e50: 6b0042ef jal x5,80005500 +80000e54: 80000e44 .word 0x80000e44 +80000e58: 80009f28 .word 0x80009f28 +80000e5c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xe3234651 +80000e60: 000aac83 lw x25,0(x21) +80000e64: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xfeab9250 +80000e68: 000aa983 lw x19,0(x21) +80000e6c: 004a8a93 addi x21,x21,4 + +80000e70 : +Zbkb_ror_cg_cp_rd_b16: + ror x16, x25, x19 # perform operation +80000e70: 613cd833 ror x16,x25,x19 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkb_ror_cg_cp_rd_b16, Zbkb_ror_cg_cp_rd_b16_str) +80000e74: 000a2203 lw x4,0(x20) +80000e78: 01020863 beq x4,x16,80000e88 +80000e7c: 684042ef jal x5,80005500 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 80009f59 .word 0x80009f59 +80000e88: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x1af10039 +80000e8c: 000aa403 lw x8,0(x21) +80000e90: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x868ca48b +80000e94: 000aa303 lw x6,0(x21) +80000e98: 004a8a93 addi x21,x21,4 + +80000e9c : +Zbkb_ror_cg_cp_rd_b17: + ror x17, x8, x6 # perform operation +80000e9c: 606458b3 ror x17,x8,x6 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkb_ror_cg_cp_rd_b17, Zbkb_ror_cg_cp_rd_b17_str) +80000ea0: 000a2203 lw x4,0(x20) +80000ea4: 01120863 beq x4,x17,80000eb4 +80000ea8: 658042ef jal x5,80005500 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 80009f8a .word 0x80009f8a +80000eb4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xada95f0a +80000eb8: 000aa603 lw x12,0(x21) +80000ebc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x7a17e37b +80000ec0: 000aa083 lw x1,0(x21) +80000ec4: 004a8a93 addi x21,x21,4 + +80000ec8 : +Zbkb_ror_cg_cp_rd_b18: + ror x18, x12, x1 # perform operation +80000ec8: 60165933 ror x18,x12,x1 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkb_ror_cg_cp_rd_b18, Zbkb_ror_cg_cp_rd_b18_str) +80000ecc: 000a2203 lw x4,0(x20) +80000ed0: 01220863 beq x4,x18,80000ee0 +80000ed4: 62c042ef jal x5,80005500 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 80009fbb .word 0x80009fbb +80000ee0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x41675876 +80000ee4: 000aac83 lw x25,0(x21) +80000ee8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x84c9eecf +80000eec: 000aa903 lw x18,0(x21) +80000ef0: 004a8a93 addi x21,x21,4 + +80000ef4 : +Zbkb_ror_cg_cp_rd_b19: + ror x19, x25, x18 # perform operation +80000ef4: 612cd9b3 ror x19,x25,x18 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zbkb_ror_cg_cp_rd_b19, Zbkb_ror_cg_cp_rd_b19_str) +80000ef8: 000a2203 lw x4,0(x20) +80000efc: 01320863 beq x4,x19,80000f0c +80000f00: 600042ef jal x5,80005500 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 80009fec .word 0x80009fec +80000f0c: 004a0a13 addi x20,x20,4 + + mv x19, x20 # switch signature pointer register to avoid conflict with test +80000f10: 000a0993 addi x19,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x06c2ea2b +80000f14: 000aa483 lw x9,0(x21) +80000f18: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0xb745d572 +80000f1c: 000aac03 lw x24,0(x21) +80000f20: 004a8a93 addi x21,x21,4 + +80000f24 : +Zbkb_ror_cg_cp_rd_b20: + ror x20, x9, x24 # perform operation +80000f24: 6184da33 ror x20,x9,x24 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zbkb_ror_cg_cp_rd_b20, Zbkb_ror_cg_cp_rd_b20_str) +80000f28: 0009a203 lw x4,0(x19) +80000f2c: 01420863 beq x4,x20,80000f3c +80000f30: 5d0042ef jal x5,80005500 +80000f34: 80000f24 .word 0x80000f24 +80000f38: 8000a01d .word 0x8000a01d +80000f3c: 00498993 addi x19,x19,4 + + mv x10, x21 # switch data pointer register to avoid conflict with test +80000f40: 000a8513 addi x10,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xfd16b93d +80000f44: 00052403 lw x8,0(x10) +80000f48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x1375fac0 +80000f4c: 00052b83 lw x23,0(x10) +80000f50: 00450513 addi x10,x10,4 + +80000f54 : +Zbkb_ror_cg_cp_rd_b21: + ror x21, x8, x23 # perform operation +80000f54: 61745ab3 ror x21,x8,x23 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkb_ror_cg_cp_rd_b21, Zbkb_ror_cg_cp_rd_b21_str) +80000f58: 0009a203 lw x4,0(x19) +80000f5c: 01520863 beq x4,x21,80000f6c +80000f60: 5a0042ef jal x5,80005500 +80000f64: 80000f54 .word 0x80000f54 +80000f68: 8000a04e .word 0x8000a04e +80000f6c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xeafd7b89 +80000f70: 00052b83 lw x23,0(x10) +80000f74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x13c0294a +80000f78: 00052603 lw x12,0(x10) +80000f7c: 00450513 addi x10,x10,4 + +80000f80 : +Zbkb_ror_cg_cp_rd_b22: + ror x22, x23, x12 # perform operation +80000f80: 60cbdb33 ror x22,x23,x12 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cp_rd_b22, Zbkb_ror_cg_cp_rd_b22_str) +80000f84: 0009a203 lw x4,0(x19) +80000f88: 01620863 beq x4,x22,80000f98 +80000f8c: 574042ef jal x5,80005500 +80000f90: 80000f80 .word 0x80000f80 +80000f94: 8000a07f .word 0x8000a07f +80000f98: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x383e74f3 +80000f9c: 00052803 lw x16,0(x10) +80000fa0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xe4239889 +80000fa4: 00052583 lw x11,0(x10) +80000fa8: 00450513 addi x10,x10,4 + +80000fac : +Zbkb_ror_cg_cp_rd_b23: + ror x23, x16, x11 # perform operation +80000fac: 60b85bb3 ror x23,x16,x11 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkb_ror_cg_cp_rd_b23, Zbkb_ror_cg_cp_rd_b23_str) +80000fb0: 0009a203 lw x4,0(x19) +80000fb4: 01720863 beq x4,x23,80000fc4 +80000fb8: 548042ef jal x5,80005500 +80000fbc: 80000fac .word 0x80000fac +80000fc0: 8000a0b0 .word 0x8000a0b0 +80000fc4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x10b2874a +80000fc8: 00052883 lw x17,0(x10) +80000fcc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x76684a60 +80000fd0: 00052b83 lw x23,0(x10) +80000fd4: 00450513 addi x10,x10,4 + +80000fd8 : +Zbkb_ror_cg_cp_rd_b24: + ror x24, x17, x23 # perform operation +80000fd8: 6178dc33 ror x24,x17,x23 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cp_rd_b24, Zbkb_ror_cg_cp_rd_b24_str) +80000fdc: 0009a203 lw x4,0(x19) +80000fe0: 01820863 beq x4,x24,80000ff0 +80000fe4: 51c042ef jal x5,80005500 +80000fe8: 80000fd8 .word 0x80000fd8 +80000fec: 8000a0e1 .word 0x8000a0e1 +80000ff0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfb3245f1 +80000ff4: 00052683 lw x13,0(x10) +80000ff8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xc5da4557 +80000ffc: 00052f03 lw x30,0(x10) +80001000: 00450513 addi x10,x10,4 + +80001004 : +Zbkb_ror_cg_cp_rd_b25: + ror x25, x13, x30 # perform operation +80001004: 61e6dcb3 ror x25,x13,x30 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cp_rd_b25, Zbkb_ror_cg_cp_rd_b25_str) +80001008: 0009a203 lw x4,0(x19) +8000100c: 01920863 beq x4,x25,8000101c +80001010: 4f0042ef jal x5,80005500 +80001014: 80001004 .word 0x80001004 +80001018: 8000a112 .word 0x8000a112 +8000101c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x28320064 +80001020: 00052c83 lw x25,0(x10) +80001024: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x67482cf6 +80001028: 00052683 lw x13,0(x10) +8000102c: 00450513 addi x10,x10,4 + +80001030 : +Zbkb_ror_cg_cp_rd_b26: + ror x26, x25, x13 # perform operation +80001030: 60dcdd33 ror x26,x25,x13 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cp_rd_b26, Zbkb_ror_cg_cp_rd_b26_str) +80001034: 0009a203 lw x4,0(x19) +80001038: 01a20863 beq x4,x26,80001048 +8000103c: 4c4042ef jal x5,80005500 +80001040: 80001030 .word 0x80001030 +80001044: 8000a143 .word 0x8000a143 +80001048: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xecb8f47a +8000104c: 00052703 lw x14,0(x10) +80001050: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x6b478054 +80001054: 00052683 lw x13,0(x10) +80001058: 00450513 addi x10,x10,4 + +8000105c : +Zbkb_ror_cg_cp_rd_b27: + ror x27, x14, x13 # perform operation +8000105c: 60d75db3 ror x27,x14,x13 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cp_rd_b27, Zbkb_ror_cg_cp_rd_b27_str) +80001060: 0009a203 lw x4,0(x19) +80001064: 01b20863 beq x4,x27,80001074 +80001068: 498042ef jal x5,80005500 +8000106c: 8000105c .word 0x8000105c +80001070: 8000a174 .word 0x8000a174 +80001074: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x95a22a20 +80001078: 00052083 lw x1,0(x10) +8000107c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x38415c21 +80001080: 00052d03 lw x26,0(x10) +80001084: 00450513 addi x10,x10,4 + +80001088 : +Zbkb_ror_cg_cp_rd_b28: + ror x28, x1, x26 # perform operation +80001088: 61a0de33 ror x28,x1,x26 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cp_rd_b28, Zbkb_ror_cg_cp_rd_b28_str) +8000108c: 0009a203 lw x4,0(x19) +80001090: 01c20863 beq x4,x28,800010a0 +80001094: 46c042ef jal x5,80005500 +80001098: 80001088 .word 0x80001088 +8000109c: 8000a1a5 .word 0x8000a1a5 +800010a0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x4f1b0eb6 +800010a4: 00052303 lw x6,0(x10) +800010a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xd9d01c7e +800010ac: 00052d03 lw x26,0(x10) +800010b0: 00450513 addi x10,x10,4 + +800010b4 : +Zbkb_ror_cg_cp_rd_b29: + ror x29, x6, x26 # perform operation +800010b4: 61a35eb3 ror x29,x6,x26 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cp_rd_b29, Zbkb_ror_cg_cp_rd_b29_str) +800010b8: 0009a203 lw x4,0(x19) +800010bc: 01d20863 beq x4,x29,800010cc +800010c0: 440042ef jal x5,80005500 +800010c4: 800010b4 .word 0x800010b4 +800010c8: 8000a1d6 .word 0x8000a1d6 +800010cc: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x95aa0a8d +800010d0: 00052a03 lw x20,0(x10) +800010d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x40d521ce +800010d8: 00052c03 lw x24,0(x10) +800010dc: 00450513 addi x10,x10,4 + +800010e0 : +Zbkb_ror_cg_cp_rd_b30: + ror x30, x20, x24 # perform operation +800010e0: 618a5f33 ror x30,x20,x24 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cp_rd_b30, Zbkb_ror_cg_cp_rd_b30_str) +800010e4: 0009a203 lw x4,0(x19) +800010e8: 01e20863 beq x4,x30,800010f8 +800010ec: 414042ef jal x5,80005500 +800010f0: 800010e0 .word 0x800010e0 +800010f4: 8000a207 .word 0x8000a207 +800010f8: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0c2f7adc +800010fc: 00052103 lw x2,0(x10) +80001100: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x81916441 +80001104: 00052583 lw x11,0(x10) +80001108: 00450513 addi x10,x10,4 + +8000110c : +Zbkb_ror_cg_cp_rd_b31: + ror x31, x2, x11 # perform operation +8000110c: 60b15fb3 ror x31,x2,x11 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_ror_cg_cp_rd_b31, Zbkb_ror_cg_cp_rd_b31_str) +80001110: 0009a203 lw x4,0(x19) +80001114: 01f20863 beq x4,x31,80001124 +80001118: 3e8042ef jal x5,80005500 +8000111c: 8000110c .word 0x8000110c +80001120: 8000a238 .word 0x8000a238 +80001124: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000 +80001128: 00052a03 lw x20,0(x10) +8000112c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x94f34954 +80001130: 00052883 lw x17,0(x10) +80001134: 00450513 addi x10,x10,4 + +80001138 : +Zbkb_ror_cg_cp_rs1_edges_0x0: + ror x16, x20, x17 # perform operation +80001138: 611a5833 ror x16,x20,x17 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cp_rs1_edges_0x0, Zbkb_ror_cg_cp_rs1_edges_0x0_str) +8000113c: 0009a203 lw x4,0(x19) +80001140: 01020863 beq x4,x16,80001150 +80001144: 3bc042ef jal x5,80005500 +80001148: 80001138 .word 0x80001138 +8000114c: 8000a269 .word 0x8000a269 +80001150: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000001 +80001154: 00052083 lw x1,0(x10) +80001158: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xa621c487 +8000115c: 00052603 lw x12,0(x10) +80001160: 00450513 addi x10,x10,4 + +80001164 : +Zbkb_ror_cg_cp_rs1_edges_0x1: + ror x14, x1, x12 # perform operation +80001164: 60c0d733 ror x14,x1,x12 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cp_rs1_edges_0x1, Zbkb_ror_cg_cp_rs1_edges_0x1_str) +80001168: 0009a203 lw x4,0(x19) +8000116c: 00e20863 beq x4,x14,8000117c +80001170: 390042ef jal x5,80005500 +80001174: 80001164 .word 0x80001164 +80001178: 8000a2a1 .word 0x8000a2a1 +8000117c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x00000002 +80001180: 00052183 lw x3,0(x10) +80001184: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x5d0a4e29 +80001188: 00052603 lw x12,0(x10) +8000118c: 00450513 addi x10,x10,4 + +80001190 : +Zbkb_ror_cg_cp_rs1_edges_0x2: + ror x18, x3, x12 # perform operation +80001190: 60c1d933 ror x18,x3,x12 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cp_rs1_edges_0x2, Zbkb_ror_cg_cp_rs1_edges_0x2_str) +80001194: 0009a203 lw x4,0(x19) +80001198: 01220863 beq x4,x18,800011a8 +8000119c: 364042ef jal x5,80005500 +800011a0: 80001190 .word 0x80001190 +800011a4: 8000a2d9 .word 0x8000a2d9 +800011a8: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x80000000 +800011ac: 00052483 lw x9,0(x10) +800011b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xc3febc09 +800011b4: 00052c83 lw x25,0(x10) +800011b8: 00450513 addi x10,x10,4 + +800011bc : +Zbkb_ror_cg_cp_rs1_edges_0x80000000: + ror x14, x9, x25 # perform operation +800011bc: 6194d733 ror x14,x9,x25 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cp_rs1_edges_0x80000000, Zbkb_ror_cg_cp_rs1_edges_0x80000000_str) +800011c0: 0009a203 lw x4,0(x19) +800011c4: 00e20863 beq x4,x14,800011d4 +800011c8: 338042ef jal x5,80005500 +800011cc: 800011bc .word 0x800011bc +800011d0: 8000a311 .word 0x8000a311 +800011d4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x80000001 +800011d8: 00052f03 lw x30,0(x10) +800011dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x953fe097 +800011e0: 00052183 lw x3,0(x10) +800011e4: 00450513 addi x10,x10,4 + +800011e8 : +Zbkb_ror_cg_cp_rs1_edges_0x80000001: + ror x17, x30, x3 # perform operation +800011e8: 603f58b3 ror x17,x30,x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cp_rs1_edges_0x80000001, Zbkb_ror_cg_cp_rs1_edges_0x80000001_str) +800011ec: 0009a203 lw x4,0(x19) +800011f0: 01120863 beq x4,x17,80001200 +800011f4: 30c042ef jal x5,80005500 +800011f8: 800011e8 .word 0x800011e8 +800011fc: 8000a351 .word 0x8000a351 +80001200: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7fffffff +80001204: 00052b03 lw x22,0(x10) +80001208: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x06a8769e +8000120c: 00052d83 lw x27,0(x10) +80001210: 00450513 addi x10,x10,4 + +80001214 : +Zbkb_ror_cg_cp_rs1_edges_0x7fffffff: + ror x24, x22, x27 # perform operation +80001214: 61bb5c33 ror x24,x22,x27 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cp_rs1_edges_0x7fffffff, Zbkb_ror_cg_cp_rs1_edges_0x7fffffff_str) +80001218: 0009a203 lw x4,0(x19) +8000121c: 01820863 beq x4,x24,8000122c +80001220: 2e0042ef jal x5,80005500 +80001224: 80001214 .word 0x80001214 +80001228: 8000a391 .word 0x8000a391 +8000122c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x7ffffffe +80001230: 00052403 lw x8,0(x10) +80001234: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x5a435527 +80001238: 00052583 lw x11,0(x10) +8000123c: 00450513 addi x10,x10,4 + +80001240 : +Zbkb_ror_cg_cp_rs1_edges_0x7ffffffe: + ror x13, x8, x11 # perform operation +80001240: 60b456b3 ror x13,x8,x11 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cp_rs1_edges_0x7ffffffe, Zbkb_ror_cg_cp_rs1_edges_0x7ffffffe_str) +80001244: 0009a203 lw x4,0(x19) +80001248: 00d20863 beq x4,x13,80001258 +8000124c: 2b4042ef jal x5,80005500 +80001250: 80001240 .word 0x80001240 +80001254: 8000a3d1 .word 0x8000a3d1 +80001258: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffff +8000125c: 00052b83 lw x23,0(x10) +80001260: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xfeb19ca9 +80001264: 00052783 lw x15,0(x10) +80001268: 00450513 addi x10,x10,4 + +8000126c : +Zbkb_ror_cg_cp_rs1_edges_0xffffffff: + ror x7, x23, x15 # perform operation +8000126c: 60fbd3b3 ror x7,x23,x15 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cp_rs1_edges_0xffffffff, Zbkb_ror_cg_cp_rs1_edges_0xffffffff_str) +80001270: 0009a203 lw x4,0(x19) +80001274: 00720863 beq x4,x7,80001284 +80001278: 288042ef jal x5,80005500 +8000127c: 8000126c .word 0x8000126c +80001280: 8000a411 .word 0x8000a411 +80001284: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xfffffffe +80001288: 00052d83 lw x27,0(x10) +8000128c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x1e531ab6 +80001290: 00052383 lw x7,0(x10) +80001294: 00450513 addi x10,x10,4 + +80001298 : +Zbkb_ror_cg_cp_rs1_edges_0xfffffffe: + ror x23, x27, x7 # perform operation +80001298: 607ddbb3 ror x23,x27,x7 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkb_ror_cg_cp_rs1_edges_0xfffffffe, Zbkb_ror_cg_cp_rs1_edges_0xfffffffe_str) +8000129c: 0009a203 lw x4,0(x19) +800012a0: 01720863 beq x4,x23,800012b0 +800012a4: 25c042ef jal x5,80005500 +800012a8: 80001298 .word 0x80001298 +800012ac: 8000a451 .word 0x8000a451 +800012b0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc8872 +800012b4: 00052e03 lw x28,0(x10) +800012b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xfb22a855 +800012bc: 00052b03 lw x22,0(x10) +800012c0: 00450513 addi x10,x10,4 + +800012c4 : +Zbkb_ror_cg_cp_rs1_edges_0x5bbc8872: + ror x12, x28, x22 # perform operation +800012c4: 616e5633 ror x12,x28,x22 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkb_ror_cg_cp_rs1_edges_0x5bbc8872, Zbkb_ror_cg_cp_rs1_edges_0x5bbc8872_str) +800012c8: 0009a203 lw x4,0(x19) +800012cc: 00c20863 beq x4,x12,800012dc +800012d0: 230042ef jal x5,80005500 +800012d4: 800012c4 .word 0x800012c4 +800012d8: 8000a491 .word 0x8000a491 +800012dc: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xaaaaaaaa +800012e0: 00052303 lw x6,0(x10) +800012e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x995d3d02 +800012e8: 00052d83 lw x27,0(x10) +800012ec: 00450513 addi x10,x10,4 + +800012f0 : +Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaa: + ror x17, x6, x27 # perform operation +800012f0: 61b358b3 ror x17,x6,x27 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f4: 0009a203 lw x4,0(x19) +800012f8: 01120863 beq x4,x17,80001308 +800012fc: 204042ef jal x5,80005500 +80001300: 800012f0 .word 0x800012f0 +80001304: 8000a4d1 .word 0x8000a4d1 +80001308: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x55555555 +8000130c: 00052b83 lw x23,0(x10) +80001310: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x23794fb4 +80001314: 00052103 lw x2,0(x10) +80001318: 00450513 addi x10,x10,4 + +8000131c : +Zbkb_ror_cg_cp_rs1_edges_0x55555555: + ror x1, x23, x2 # perform operation +8000131c: 602bd0b3 ror x1,x23,x2 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cp_rs1_edges_0x55555555, Zbkb_ror_cg_cp_rs1_edges_0x55555555_str) +80001320: 0009a203 lw x4,0(x19) +80001324: 00120863 beq x4,x1,80001334 +80001328: 1d8042ef jal x5,80005500 +8000132c: 8000131c .word 0x8000131c +80001330: 8000a511 .word 0x8000a511 +80001334: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x04f32097 +80001338: 00052383 lw x7,0(x10) +8000133c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000 +80001340: 00052f83 lw x31,0(x10) +80001344: 00450513 addi x10,x10,4 + +80001348 : +Zbkb_ror_cg_cp_rs2_edges_0x0: + ror x16, x7, x31 # perform operation +80001348: 61f3d833 ror x16,x7,x31 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cp_rs2_edges_0x0, Zbkb_ror_cg_cp_rs2_edges_0x0_str) +8000134c: 0009a203 lw x4,0(x19) +80001350: 01020863 beq x4,x16,80001360 +80001354: 1ac042ef jal x5,80005500 +80001358: 80001348 .word 0x80001348 +8000135c: 8000a551 .word 0x8000a551 +80001360: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x43e9ddf9 +80001364: 00052803 lw x16,0(x10) +80001368: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x00000001 +8000136c: 00052d03 lw x26,0(x10) +80001370: 00450513 addi x10,x10,4 + +80001374 : +Zbkb_ror_cg_cp_rs2_edges_0x1: + ror x30, x16, x26 # perform operation +80001374: 61a85f33 ror x30,x16,x26 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cp_rs2_edges_0x1, Zbkb_ror_cg_cp_rs2_edges_0x1_str) +80001378: 0009a203 lw x4,0(x19) +8000137c: 01e20863 beq x4,x30,8000138c +80001380: 180042ef jal x5,80005500 +80001384: 80001374 .word 0x80001374 +80001388: 8000a58a .word 0x8000a58a +8000138c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x74d7c192 +80001390: 00052c83 lw x25,0(x10) +80001394: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000002 +80001398: 00052683 lw x13,0(x10) +8000139c: 00450513 addi x10,x10,4 + +800013a0 : +Zbkb_ror_cg_cp_rs2_edges_0x2: + ror x26, x25, x13 # perform operation +800013a0: 60dcdd33 ror x26,x25,x13 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cp_rs2_edges_0x2, Zbkb_ror_cg_cp_rs2_edges_0x2_str) +800013a4: 0009a203 lw x4,0(x19) +800013a8: 01a20863 beq x4,x26,800013b8 +800013ac: 154042ef jal x5,80005500 +800013b0: 800013a0 .word 0x800013a0 +800013b4: 8000a5c3 .word 0x8000a5c3 +800013b8: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xf7392e8b +800013bc: 00052e03 lw x28,0(x10) +800013c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x80000000 +800013c4: 00052d83 lw x27,0(x10) +800013c8: 00450513 addi x10,x10,4 + +800013cc : +Zbkb_ror_cg_cp_rs2_edges_0x80000000: + ror x1, x28, x27 # perform operation +800013cc: 61be50b3 ror x1,x28,x27 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cp_rs2_edges_0x80000000, Zbkb_ror_cg_cp_rs2_edges_0x80000000_str) +800013d0: 0009a203 lw x4,0(x19) +800013d4: 00120863 beq x4,x1,800013e4 +800013d8: 128042ef jal x5,80005500 +800013dc: 800013cc .word 0x800013cc +800013e0: 8000a5fc .word 0x8000a5fc +800013e4: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x9025df8d +800013e8: 00052f83 lw x31,0(x10) +800013ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x80000001 +800013f0: 00052a03 lw x20,0(x10) +800013f4: 00450513 addi x10,x10,4 + +800013f8 : +Zbkb_ror_cg_cp_rs2_edges_0x80000001: + ror x22, x31, x20 # perform operation +800013f8: 614fdb33 ror x22,x31,x20 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cp_rs2_edges_0x80000001, Zbkb_ror_cg_cp_rs2_edges_0x80000001_str) +800013fc: 0009a203 lw x4,0(x19) +80001400: 01620863 beq x4,x22,80001410 +80001404: 0fc042ef jal x5,80005500 +80001408: 800013f8 .word 0x800013f8 +8000140c: 8000a63c .word 0x8000a63c +80001410: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8489277f +80001414: 00052103 lw x2,0(x10) +80001418: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7fffffff +8000141c: 00052e83 lw x29,0(x10) +80001420: 00450513 addi x10,x10,4 + +80001424 : +Zbkb_ror_cg_cp_rs2_edges_0x7fffffff: + ror x25, x2, x29 # perform operation +80001424: 61d15cb3 ror x25,x2,x29 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cp_rs2_edges_0x7fffffff, Zbkb_ror_cg_cp_rs2_edges_0x7fffffff_str) +80001428: 0009a203 lw x4,0(x19) +8000142c: 01920863 beq x4,x25,8000143c +80001430: 0d0042ef jal x5,80005500 +80001434: 80001424 .word 0x80001424 +80001438: 8000a67c .word 0x8000a67c +8000143c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x64d9a130 +80001440: 00052d83 lw x27,0(x10) +80001444: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7ffffffe +80001448: 00052703 lw x14,0(x10) +8000144c: 00450513 addi x10,x10,4 + +80001450 : +Zbkb_ror_cg_cp_rs2_edges_0x7ffffffe: + ror x11, x27, x14 # perform operation +80001450: 60edd5b3 ror x11,x27,x14 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cp_rs2_edges_0x7ffffffe, Zbkb_ror_cg_cp_rs2_edges_0x7ffffffe_str) +80001454: 0009a203 lw x4,0(x19) +80001458: 00b20863 beq x4,x11,80001468 +8000145c: 0a4042ef jal x5,80005500 +80001460: 80001450 .word 0x80001450 +80001464: 8000a6bc .word 0x8000a6bc +80001468: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x87f90e2e +8000146c: 00052f03 lw x30,0(x10) +80001470: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffff +80001474: 00052b83 lw x23,0(x10) +80001478: 00450513 addi x10,x10,4 + +8000147c : +Zbkb_ror_cg_cp_rs2_edges_0xffffffff: + ror x11, x30, x23 # perform operation +8000147c: 617f55b3 ror x11,x30,x23 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cp_rs2_edges_0xffffffff, Zbkb_ror_cg_cp_rs2_edges_0xffffffff_str) +80001480: 0009a203 lw x4,0(x19) +80001484: 00b20863 beq x4,x11,80001494 +80001488: 078042ef jal x5,80005500 +8000148c: 8000147c .word 0x8000147c +80001490: 8000a6fc .word 0x8000a6fc +80001494: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xe457c2ac +80001498: 00052e03 lw x28,0(x10) +8000149c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xfffffffe +800014a0: 00052183 lw x3,0(x10) +800014a4: 00450513 addi x10,x10,4 + +800014a8 : +Zbkb_ror_cg_cp_rs2_edges_0xfffffffe: + ror x13, x28, x3 # perform operation +800014a8: 603e56b3 ror x13,x28,x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cp_rs2_edges_0xfffffffe, Zbkb_ror_cg_cp_rs2_edges_0xfffffffe_str) +800014ac: 0009a203 lw x4,0(x19) +800014b0: 00d20863 beq x4,x13,800014c0 +800014b4: 04c042ef jal x5,80005500 +800014b8: 800014a8 .word 0x800014a8 +800014bc: 8000a73c .word 0x8000a73c +800014c0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x07cd1241 +800014c4: 00052703 lw x14,0(x10) +800014c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc8872 +800014cc: 00052c03 lw x24,0(x10) +800014d0: 00450513 addi x10,x10,4 + +800014d4 : +Zbkb_ror_cg_cp_rs2_edges_0x5bbc8872: + ror x17, x14, x24 # perform operation +800014d4: 618758b3 ror x17,x14,x24 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cp_rs2_edges_0x5bbc8872, Zbkb_ror_cg_cp_rs2_edges_0x5bbc8872_str) +800014d8: 0009a203 lw x4,0(x19) +800014dc: 01120863 beq x4,x17,800014ec +800014e0: 020042ef jal x5,80005500 +800014e4: 800014d4 .word 0x800014d4 +800014e8: 8000a77c .word 0x8000a77c +800014ec: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xef5643b1 +800014f0: 00052e03 lw x28,0(x10) +800014f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xaaaaaaaa +800014f8: 00052403 lw x8,0(x10) +800014fc: 00450513 addi x10,x10,4 + +80001500 : +Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaa: + ror x25, x28, x8 # perform operation +80001500: 608e5cb3 ror x25,x28,x8 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001504: 0009a203 lw x4,0(x19) +80001508: 01920863 beq x4,x25,80001518 +8000150c: 7f5032ef jal x5,80005500 +80001510: 80001500 .word 0x80001500 +80001514: 8000a7bc .word 0x8000a7bc +80001518: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x04c85736 +8000151c: 00052483 lw x9,0(x10) +80001520: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x55555555 +80001524: 00052b83 lw x23,0(x10) +80001528: 00450513 addi x10,x10,4 + +8000152c : +Zbkb_ror_cg_cp_rs2_edges_0x55555555: + ror x8, x9, x23 # perform operation +8000152c: 6174d433 ror x8,x9,x23 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cp_rs2_edges_0x55555555, Zbkb_ror_cg_cp_rs2_edges_0x55555555_str) +80001530: 0009a203 lw x4,0(x19) +80001534: 00820863 beq x4,x8,80001544 +80001538: 7c9032ef jal x5,80005500 +8000153c: 8000152c .word 0x8000152c +80001540: 8000a7fc .word 0x8000a7fc +80001544: 00498993 addi x19,x19,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000 +80001548: 00052803 lw x16,0(x10) +8000154c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000000 +80001550: 00052a03 lw x20,0(x10) +80001554: 00450513 addi x10,x10,4 + +80001558 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + ror x6, x16, x20 # perform operation +80001558: 61485333 ror x6,x16,x20 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000155c: 0009a203 lw x4,0(x19) +80001560: 00620863 beq x4,x6,80001570 +80001564: 79d032ef jal x5,80005500 +80001568: 80001558 .word 0x80001558 +8000156c: 8000a83c .word 0x8000a83c +80001570: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000 +80001574: 00052f83 lw x31,0(x10) +80001578: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x00000001 +8000157c: 00052783 lw x15,0(x10) +80001580: 00450513 addi x10,x10,4 + +80001584 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + ror x22, x31, x15 # perform operation +80001584: 60ffdb33 ror x22,x31,x15 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001588: 0009a203 lw x4,0(x19) +8000158c: 01620863 beq x4,x22,8000159c +80001590: 771032ef jal x5,80005500 +80001594: 80001584 .word 0x80001584 +80001598: 8000a88c .word 0x8000a88c +8000159c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000000 +800015a0: 00052083 lw x1,0(x10) +800015a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000002 +800015a8: 00052483 lw x9,0(x10) +800015ac: 00450513 addi x10,x10,4 + +800015b0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + ror x20, x1, x9 # perform operation +800015b0: 6090da33 ror x20,x1,x9 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b4: 0009a203 lw x4,0(x19) +800015b8: 01420863 beq x4,x20,800015c8 +800015bc: 745032ef jal x5,80005500 +800015c0: 800015b0 .word 0x800015b0 +800015c4: 8000a8dc .word 0x8000a8dc +800015c8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000 +800015cc: 00052d83 lw x27,0(x10) +800015d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x80000000 +800015d4: 00052083 lw x1,0(x10) +800015d8: 00450513 addi x10,x10,4 + +800015dc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + ror x11, x27, x1 # perform operation +800015dc: 601dd5b3 ror x11,x27,x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e0: 0009a203 lw x4,0(x19) +800015e4: 00b20863 beq x4,x11,800015f4 +800015e8: 719032ef jal x5,80005500 +800015ec: 800015dc .word 0x800015dc +800015f0: 8000a92c .word 0x8000a92c +800015f4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000 +800015f8: 00052783 lw x15,0(x10) +800015fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x80000001 +80001600: 00052603 lw x12,0(x10) +80001604: 00450513 addi x10,x10,4 + +80001608 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + ror x3, x15, x12 # perform operation +80001608: 60c7d1b3 ror x3,x15,x12 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000160c: 0009a203 lw x4,0(x19) +80001610: 00320863 beq x4,x3,80001620 +80001614: 6ed032ef jal x5,80005500 +80001618: 80001608 .word 0x80001608 +8000161c: 8000a983 .word 0x8000a983 +80001620: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000 +80001624: 00052703 lw x14,0(x10) +80001628: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7fffffff +8000162c: 00052683 lw x13,0(x10) +80001630: 00450513 addi x10,x10,4 + +80001634 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + ror x16, x14, x13 # perform operation +80001634: 60d75833 ror x16,x14,x13 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001638: 0009a203 lw x4,0(x19) +8000163c: 01020863 beq x4,x16,8000164c +80001640: 6c1032ef jal x5,80005500 +80001644: 80001634 .word 0x80001634 +80001648: 8000a9da .word 0x8000a9da +8000164c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000 +80001650: 00052c03 lw x24,0(x10) +80001654: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffe +80001658: 00052683 lw x13,0(x10) +8000165c: 00450513 addi x10,x10,4 + +80001660 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + ror x14, x24, x13 # perform operation +80001660: 60dc5733 ror x14,x24,x13 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001664: 0009a203 lw x4,0(x19) +80001668: 00e20863 beq x4,x14,80001678 +8000166c: 695032ef jal x5,80005500 +80001670: 80001660 .word 0x80001660 +80001674: 8000aa31 .word 0x8000aa31 +80001678: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000 +8000167c: 00052603 lw x12,0(x10) +80001680: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xffffffff +80001684: 00052a83 lw x21,0(x10) +80001688: 00450513 addi x10,x10,4 + +8000168c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + ror x14, x12, x21 # perform operation +8000168c: 61565733 ror x14,x12,x21 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001690: 0009a203 lw x4,0(x19) +80001694: 00e20863 beq x4,x14,800016a4 +80001698: 669032ef jal x5,80005500 +8000169c: 8000168c .word 0x8000168c +800016a0: 8000aa88 .word 0x8000aa88 +800016a4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x00000000 +800016a8: 00052903 lw x18,0(x10) +800016ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xfffffffe +800016b0: 00052c83 lw x25,0(x10) +800016b4: 00450513 addi x10,x10,4 + +800016b8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + ror x29, x18, x25 # perform operation +800016b8: 61995eb3 ror x29,x18,x25 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016bc: 0009a203 lw x4,0(x19) +800016c0: 01d20863 beq x4,x29,800016d0 +800016c4: 63d032ef jal x5,80005500 +800016c8: 800016b8 .word 0x800016b8 +800016cc: 8000aadf .word 0x8000aadf +800016d0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000 +800016d4: 00052703 lw x14,0(x10) +800016d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc8872 +800016dc: 00052c03 lw x24,0(x10) +800016e0: 00450513 addi x10,x10,4 + +800016e4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + ror x26, x14, x24 # perform operation +800016e4: 61875d33 ror x26,x14,x24 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e8: 0009a203 lw x4,0(x19) +800016ec: 01a20863 beq x4,x26,800016fc +800016f0: 611032ef jal x5,80005500 +800016f4: 800016e4 .word 0x800016e4 +800016f8: 8000ab36 .word 0x8000ab36 +800016fc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000 +80001700: 00052b83 lw x23,0(x10) +80001704: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaa +80001708: 00052803 lw x16,0(x10) +8000170c: 00450513 addi x10,x10,4 + +80001710 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + ror x7, x23, x16 # perform operation +80001710: 610bd3b3 ror x7,x23,x16 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001714: 0009a203 lw x4,0(x19) +80001718: 00720863 beq x4,x7,80001728 +8000171c: 5e5032ef jal x5,80005500 +80001720: 80001710 .word 0x80001710 +80001724: 8000ab8d .word 0x8000ab8d +80001728: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x00000000 +8000172c: 00052183 lw x3,0(x10) +80001730: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x55555555 +80001734: 00052d83 lw x27,0(x10) +80001738: 00450513 addi x10,x10,4 + +8000173c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + ror x24, x3, x27 # perform operation +8000173c: 61b1dc33 ror x24,x3,x27 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001740: 0009a203 lw x4,0(x19) +80001744: 01820863 beq x4,x24,80001754 +80001748: 5b9032ef jal x5,80005500 +8000174c: 8000173c .word 0x8000173c +80001750: 8000abe4 .word 0x8000abe4 +80001754: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000001 +80001758: 00052f83 lw x31,0(x10) +8000175c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x00000000 +80001760: 00052583 lw x11,0(x10) +80001764: 00450513 addi x10,x10,4 + +80001768 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + ror x9, x31, x11 # perform operation +80001768: 60bfd4b3 ror x9,x31,x11 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000176c: 0009a203 lw x4,0(x19) +80001770: 00920863 beq x4,x9,80001780 +80001774: 58d032ef jal x5,80005500 +80001778: 80001768 .word 0x80001768 +8000177c: 8000ac3b .word 0x8000ac3b +80001780: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000001 +80001784: 00052803 lw x16,0(x10) +80001788: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000001 +8000178c: 00052b03 lw x22,0(x10) +80001790: 00450513 addi x10,x10,4 + +80001794 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + ror x7, x16, x22 # perform operation +80001794: 616853b3 ror x7,x16,x22 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001798: 0009a203 lw x4,0(x19) +8000179c: 00720863 beq x4,x7,800017ac +800017a0: 561032ef jal x5,80005500 +800017a4: 80001794 .word 0x80001794 +800017a8: 8000ac8b .word 0x8000ac8b +800017ac: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000001 +800017b0: 00052083 lw x1,0(x10) +800017b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000002 +800017b8: 00052403 lw x8,0(x10) +800017bc: 00450513 addi x10,x10,4 + +800017c0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + ror x15, x1, x8 # perform operation +800017c0: 6080d7b3 ror x15,x1,x8 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c4: 0009a203 lw x4,0(x19) +800017c8: 00f20863 beq x4,x15,800017d8 +800017cc: 535032ef jal x5,80005500 +800017d0: 800017c0 .word 0x800017c0 +800017d4: 8000acdb .word 0x8000acdb +800017d8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000001 +800017dc: 00052783 lw x15,0(x10) +800017e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x80000000 +800017e4: 00052c83 lw x25,0(x10) +800017e8: 00450513 addi x10,x10,4 + +800017ec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + ror x3, x15, x25 # perform operation +800017ec: 6197d1b3 ror x3,x15,x25 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f0: 0009a203 lw x4,0(x19) +800017f4: 00320863 beq x4,x3,80001804 +800017f8: 509032ef jal x5,80005500 +800017fc: 800017ec .word 0x800017ec +80001800: 8000ad2b .word 0x8000ad2b +80001804: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000001 +80001808: 00052f03 lw x30,0(x10) +8000180c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x80000001 +80001810: 00052e83 lw x29,0(x10) +80001814: 00450513 addi x10,x10,4 + +80001818 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + ror x2, x30, x29 # perform operation +80001818: 61df5133 ror x2,x30,x29 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000181c: 0009a203 lw x4,0(x19) +80001820: 00220863 beq x4,x2,80001830 +80001824: 4dd032ef jal x5,80005500 +80001828: 80001818 .word 0x80001818 +8000182c: 8000ad82 .word 0x8000ad82 +80001830: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x00000001 +80001834: 00052d03 lw x26,0(x10) +80001838: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7fffffff +8000183c: 00052b83 lw x23,0(x10) +80001840: 00450513 addi x10,x10,4 + +80001844 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + ror x27, x26, x23 # perform operation +80001844: 617d5db3 ror x27,x26,x23 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001848: 0009a203 lw x4,0(x19) +8000184c: 01b20863 beq x4,x27,8000185c +80001850: 4b1032ef jal x5,80005500 +80001854: 80001844 .word 0x80001844 +80001858: 8000add9 .word 0x8000add9 +8000185c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x00000001 +80001860: 00052183 lw x3,0(x10) +80001864: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x7ffffffe +80001868: 00052403 lw x8,0(x10) +8000186c: 00450513 addi x10,x10,4 + +80001870 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + ror x9, x3, x8 # perform operation +80001870: 6081d4b3 ror x9,x3,x8 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001874: 0009a203 lw x4,0(x19) +80001878: 00920863 beq x4,x9,80001888 +8000187c: 485032ef jal x5,80005500 +80001880: 80001870 .word 0x80001870 +80001884: 8000ae30 .word 0x8000ae30 +80001888: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000001 +8000188c: 00052683 lw x13,0(x10) +80001890: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xffffffff +80001894: 00052f03 lw x30,0(x10) +80001898: 00450513 addi x10,x10,4 + +8000189c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + ror x16, x13, x30 # perform operation +8000189c: 61e6d833 ror x16,x13,x30 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a0: 0009a203 lw x4,0(x19) +800018a4: 01020863 beq x4,x16,800018b4 +800018a8: 459032ef jal x5,80005500 +800018ac: 8000189c .word 0x8000189c +800018b0: 8000ae87 .word 0x8000ae87 +800018b4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000001 +800018b8: 00052783 lw x15,0(x10) +800018bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xfffffffe +800018c0: 00052803 lw x16,0(x10) +800018c4: 00450513 addi x10,x10,4 + +800018c8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + ror x18, x15, x16 # perform operation +800018c8: 6107d933 ror x18,x15,x16 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018cc: 0009a203 lw x4,0(x19) +800018d0: 01220863 beq x4,x18,800018e0 +800018d4: 42d032ef jal x5,80005500 +800018d8: 800018c8 .word 0x800018c8 +800018dc: 8000aede .word 0x8000aede +800018e0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000001 +800018e4: 00052383 lw x7,0(x10) +800018e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5bbc8872 +800018ec: 00052783 lw x15,0(x10) +800018f0: 00450513 addi x10,x10,4 + +800018f4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + ror x27, x7, x15 # perform operation +800018f4: 60f3ddb3 ror x27,x7,x15 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f8: 0009a203 lw x4,0(x19) +800018fc: 01b20863 beq x4,x27,8000190c +80001900: 401032ef jal x5,80005500 +80001904: 800018f4 .word 0x800018f4 +80001908: 8000af35 .word 0x8000af35 +8000190c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000001 +80001910: 00052803 lw x16,0(x10) +80001914: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xaaaaaaaa +80001918: 00052603 lw x12,0(x10) +8000191c: 00450513 addi x10,x10,4 + +80001920 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + ror x24, x16, x12 # perform operation +80001920: 60c85c33 ror x24,x16,x12 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001924: 0009a203 lw x4,0(x19) +80001928: 01820863 beq x4,x24,80001938 +8000192c: 3d5032ef jal x5,80005500 +80001930: 80001920 .word 0x80001920 +80001934: 8000af8c .word 0x8000af8c +80001938: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000001 +8000193c: 00052a83 lw x21,0(x10) +80001940: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x55555555 +80001944: 00052f83 lw x31,0(x10) +80001948: 00450513 addi x10,x10,4 + +8000194c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + ror x15, x21, x31 # perform operation +8000194c: 61fad7b3 ror x15,x21,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001950: 0009a203 lw x4,0(x19) +80001954: 00f20863 beq x4,x15,80001964 +80001958: 3a9032ef jal x5,80005500 +8000195c: 8000194c .word 0x8000194c +80001960: 8000afe3 .word 0x8000afe3 +80001964: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000002 +80001968: 00052383 lw x7,0(x10) +8000196c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x00000000 +80001970: 00052783 lw x15,0(x10) +80001974: 00450513 addi x10,x10,4 + +80001978 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + ror x17, x7, x15 # perform operation +80001978: 60f3d8b3 ror x17,x7,x15 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000197c: 0009a203 lw x4,0(x19) +80001980: 01120863 beq x4,x17,80001990 +80001984: 37d032ef jal x5,80005500 +80001988: 80001978 .word 0x80001978 +8000198c: 8000b03a .word 0x8000b03a +80001990: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000002 +80001994: 00052f83 lw x31,0(x10) +80001998: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000001 +8000199c: 00052903 lw x18,0(x10) +800019a0: 00450513 addi x10,x10,4 + +800019a4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + ror x17, x31, x18 # perform operation +800019a4: 612fd8b3 ror x17,x31,x18 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a8: 0009a203 lw x4,0(x19) +800019ac: 01120863 beq x4,x17,800019bc +800019b0: 351032ef jal x5,80005500 +800019b4: 800019a4 .word 0x800019a4 +800019b8: 8000b08a .word 0x8000b08a +800019bc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x00000002 +800019c0: 00052d03 lw x26,0(x10) +800019c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000002 +800019c8: 00052c03 lw x24,0(x10) +800019cc: 00450513 addi x10,x10,4 + +800019d0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + ror x17, x26, x24 # perform operation +800019d0: 618d58b3 ror x17,x26,x24 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d4: 0009a203 lw x4,0(x19) +800019d8: 01120863 beq x4,x17,800019e8 +800019dc: 325032ef jal x5,80005500 +800019e0: 800019d0 .word 0x800019d0 +800019e4: 8000b0da .word 0x8000b0da +800019e8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000002 +800019ec: 00052483 lw x9,0(x10) +800019f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x80000000 +800019f4: 00052b83 lw x23,0(x10) +800019f8: 00450513 addi x10,x10,4 + +800019fc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + ror x17, x9, x23 # perform operation +800019fc: 6174d8b3 ror x17,x9,x23 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a00: 0009a203 lw x4,0(x19) +80001a04: 01120863 beq x4,x17,80001a14 +80001a08: 2f9032ef jal x5,80005500 +80001a0c: 800019fc .word 0x800019fc +80001a10: 8000b12a .word 0x8000b12a +80001a14: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000002 +80001a18: 00052c03 lw x24,0(x10) +80001a1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x80000001 +80001a20: 00052703 lw x14,0(x10) +80001a24: 00450513 addi x10,x10,4 + +80001a28 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + ror x15, x24, x14 # perform operation +80001a28: 60ec57b3 ror x15,x24,x14 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a2c: 0009a203 lw x4,0(x19) +80001a30: 00f20863 beq x4,x15,80001a40 +80001a34: 2cd032ef jal x5,80005500 +80001a38: 80001a28 .word 0x80001a28 +80001a3c: 8000b181 .word 0x8000b181 +80001a40: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000002 +80001a44: 00052e83 lw x29,0(x10) +80001a48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7fffffff +80001a4c: 00052903 lw x18,0(x10) +80001a50: 00450513 addi x10,x10,4 + +80001a54 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + ror x23, x29, x18 # perform operation +80001a54: 612edbb3 ror x23,x29,x18 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a58: 0009a203 lw x4,0(x19) +80001a5c: 01720863 beq x4,x23,80001a6c +80001a60: 2a1032ef jal x5,80005500 +80001a64: 80001a54 .word 0x80001a54 +80001a68: 8000b1d8 .word 0x8000b1d8 +80001a6c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000002 +80001a70: 00052583 lw x11,0(x10) +80001a74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7ffffffe +80001a78: 00052a83 lw x21,0(x10) +80001a7c: 00450513 addi x10,x10,4 + +80001a80 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + ror x1, x11, x21 # perform operation +80001a80: 6155d0b3 ror x1,x11,x21 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a84: 0009a203 lw x4,0(x19) +80001a88: 00120863 beq x4,x1,80001a98 +80001a8c: 275032ef jal x5,80005500 +80001a90: 80001a80 .word 0x80001a80 +80001a94: 8000b22f .word 0x8000b22f +80001a98: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000002 +80001a9c: 00052c83 lw x25,0(x10) +80001aa0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xffffffff +80001aa4: 00052903 lw x18,0(x10) +80001aa8: 00450513 addi x10,x10,4 + +80001aac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + ror x6, x25, x18 # perform operation +80001aac: 612cd333 ror x6,x25,x18 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab0: 0009a203 lw x4,0(x19) +80001ab4: 00620863 beq x4,x6,80001ac4 +80001ab8: 249032ef jal x5,80005500 +80001abc: 80001aac .word 0x80001aac +80001ac0: 8000b286 .word 0x8000b286 +80001ac4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000002 +80001ac8: 00052883 lw x17,0(x10) +80001acc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xfffffffe +80001ad0: 00052603 lw x12,0(x10) +80001ad4: 00450513 addi x10,x10,4 + +80001ad8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + ror x30, x17, x12 # perform operation +80001ad8: 60c8df33 ror x30,x17,x12 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001adc: 0009a203 lw x4,0(x19) +80001ae0: 01e20863 beq x4,x30,80001af0 +80001ae4: 21d032ef jal x5,80005500 +80001ae8: 80001ad8 .word 0x80001ad8 +80001aec: 8000b2dd .word 0x8000b2dd +80001af0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000002 +80001af4: 00052583 lw x11,0(x10) +80001af8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc8872 +80001afc: 00052e03 lw x28,0(x10) +80001b00: 00450513 addi x10,x10,4 + +80001b04 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + ror x6, x11, x28 # perform operation +80001b04: 61c5d333 ror x6,x11,x28 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b08: 0009a203 lw x4,0(x19) +80001b0c: 00620863 beq x4,x6,80001b1c +80001b10: 1f1032ef jal x5,80005500 +80001b14: 80001b04 .word 0x80001b04 +80001b18: 8000b334 .word 0x8000b334 +80001b1c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000002 +80001b20: 00052803 lw x16,0(x10) +80001b24: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaaaaaaaa +80001b28: 00052383 lw x7,0(x10) +80001b2c: 00450513 addi x10,x10,4 + +80001b30 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + ror x9, x16, x7 # perform operation +80001b30: 607854b3 ror x9,x16,x7 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b34: 0009a203 lw x4,0(x19) +80001b38: 00920863 beq x4,x9,80001b48 +80001b3c: 1c5032ef jal x5,80005500 +80001b40: 80001b30 .word 0x80001b30 +80001b44: 8000b38b .word 0x8000b38b +80001b48: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000002 +80001b4c: 00052483 lw x9,0(x10) +80001b50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x55555555 +80001b54: 00052103 lw x2,0(x10) +80001b58: 00450513 addi x10,x10,4 + +80001b5c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + ror x13, x9, x2 # perform operation +80001b5c: 6024d6b3 ror x13,x9,x2 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b60: 0009a203 lw x4,0(x19) +80001b64: 00d20863 beq x4,x13,80001b74 +80001b68: 199032ef jal x5,80005500 +80001b6c: 80001b5c .word 0x80001b5c +80001b70: 8000b3e2 .word 0x8000b3e2 +80001b74: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x80000000 +80001b78: 00052e03 lw x28,0(x10) +80001b7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000 +80001b80: 00052e83 lw x29,0(x10) +80001b84: 00450513 addi x10,x10,4 + +80001b88 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + ror x15, x28, x29 # perform operation +80001b88: 61de57b3 ror x15,x28,x29 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b8c: 0009a203 lw x4,0(x19) +80001b90: 00f20863 beq x4,x15,80001ba0 +80001b94: 16d032ef jal x5,80005500 +80001b98: 80001b88 .word 0x80001b88 +80001b9c: 8000b439 .word 0x8000b439 +80001ba0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x80000000 +80001ba4: 00052703 lw x14,0(x10) +80001ba8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000001 +80001bac: 00052303 lw x6,0(x10) +80001bb0: 00450513 addi x10,x10,4 + +80001bb4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + ror x21, x14, x6 # perform operation +80001bb4: 60675ab3 ror x21,x14,x6 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb8: 0009a203 lw x4,0(x19) +80001bbc: 01520863 beq x4,x21,80001bcc +80001bc0: 141032ef jal x5,80005500 +80001bc4: 80001bb4 .word 0x80001bb4 +80001bc8: 8000b490 .word 0x8000b490 +80001bcc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x80000000 +80001bd0: 00052e03 lw x28,0(x10) +80001bd4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000002 +80001bd8: 00052b83 lw x23,0(x10) +80001bdc: 00450513 addi x10,x10,4 + +80001be0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + ror x1, x28, x23 # perform operation +80001be0: 617e50b3 ror x1,x28,x23 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be4: 0009a203 lw x4,0(x19) +80001be8: 00120863 beq x4,x1,80001bf8 +80001bec: 115032ef jal x5,80005500 +80001bf0: 80001be0 .word 0x80001be0 +80001bf4: 8000b4e7 .word 0x8000b4e7 +80001bf8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x80000000 +80001bfc: 00052583 lw x11,0(x10) +80001c00: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x80000000 +80001c04: 00052e83 lw x29,0(x10) +80001c08: 00450513 addi x10,x10,4 + +80001c0c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + ror x18, x11, x29 # perform operation +80001c0c: 61d5d933 ror x18,x11,x29 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c10: 0009a203 lw x4,0(x19) +80001c14: 01220863 beq x4,x18,80001c24 +80001c18: 0e9032ef jal x5,80005500 +80001c1c: 80001c0c .word 0x80001c0c +80001c20: 8000b53e .word 0x8000b53e +80001c24: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x80000000 +80001c28: 00052903 lw x18,0(x10) +80001c2c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x80000001 +80001c30: 00052e03 lw x28,0(x10) +80001c34: 00450513 addi x10,x10,4 + +80001c38 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + ror x30, x18, x28 # perform operation +80001c38: 61c95f33 ror x30,x18,x28 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c3c: 0009a203 lw x4,0(x19) +80001c40: 01e20863 beq x4,x30,80001c50 +80001c44: 0bd032ef jal x5,80005500 +80001c48: 80001c38 .word 0x80001c38 +80001c4c: 8000b59c .word 0x8000b59c +80001c50: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x80000000 +80001c54: 00052f03 lw x30,0(x10) +80001c58: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7fffffff +80001c5c: 00052583 lw x11,0(x10) +80001c60: 00450513 addi x10,x10,4 + +80001c64 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + ror x26, x30, x11 # perform operation +80001c64: 60bf5d33 ror x26,x30,x11 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c68: 0009a203 lw x4,0(x19) +80001c6c: 01a20863 beq x4,x26,80001c7c +80001c70: 091032ef jal x5,80005500 +80001c74: 80001c64 .word 0x80001c64 +80001c78: 8000b5fa .word 0x8000b5fa +80001c7c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x80000000 +80001c80: 00052f03 lw x30,0(x10) +80001c84: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7ffffffe +80001c88: 00052703 lw x14,0(x10) +80001c8c: 00450513 addi x10,x10,4 + +80001c90 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + ror x7, x30, x14 # perform operation +80001c90: 60ef53b3 ror x7,x30,x14 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c94: 0009a203 lw x4,0(x19) +80001c98: 00720863 beq x4,x7,80001ca8 +80001c9c: 065032ef jal x5,80005500 +80001ca0: 80001c90 .word 0x80001c90 +80001ca4: 8000b658 .word 0x8000b658 +80001ca8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x80000000 +80001cac: 00052b83 lw x23,0(x10) +80001cb0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xffffffff +80001cb4: 00052103 lw x2,0(x10) +80001cb8: 00450513 addi x10,x10,4 + +80001cbc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + ror x13, x23, x2 # perform operation +80001cbc: 602bd6b3 ror x13,x23,x2 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc0: 0009a203 lw x4,0(x19) +80001cc4: 00d20863 beq x4,x13,80001cd4 +80001cc8: 039032ef jal x5,80005500 +80001ccc: 80001cbc .word 0x80001cbc +80001cd0: 8000b6b6 .word 0x8000b6b6 +80001cd4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x80000000 +80001cd8: 00052903 lw x18,0(x10) +80001cdc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffe +80001ce0: 00052683 lw x13,0(x10) +80001ce4: 00450513 addi x10,x10,4 + +80001ce8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + ror x30, x18, x13 # perform operation +80001ce8: 60d95f33 ror x30,x18,x13 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cec: 0009a203 lw x4,0(x19) +80001cf0: 01e20863 beq x4,x30,80001d00 +80001cf4: 00d032ef jal x5,80005500 +80001cf8: 80001ce8 .word 0x80001ce8 +80001cfc: 8000b714 .word 0x8000b714 +80001d00: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x80000000 +80001d04: 00052083 lw x1,0(x10) +80001d08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5bbc8872 +80001d0c: 00052303 lw x6,0(x10) +80001d10: 00450513 addi x10,x10,4 + +80001d14 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + ror x29, x1, x6 # perform operation +80001d14: 6060deb3 ror x29,x1,x6 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d18: 0009a203 lw x4,0(x19) +80001d1c: 01d20863 beq x4,x29,80001d2c +80001d20: 7e0032ef jal x5,80005500 +80001d24: 80001d14 .word 0x80001d14 +80001d28: 8000b772 .word 0x8000b772 +80001d2c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x80000000 +80001d30: 00052803 lw x16,0(x10) +80001d34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xaaaaaaaa +80001d38: 00052183 lw x3,0(x10) +80001d3c: 00450513 addi x10,x10,4 + +80001d40 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + ror x6, x16, x3 # perform operation +80001d40: 60385333 ror x6,x16,x3 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d44: 0009a203 lw x4,0(x19) +80001d48: 00620863 beq x4,x6,80001d58 +80001d4c: 7b4032ef jal x5,80005500 +80001d50: 80001d40 .word 0x80001d40 +80001d54: 8000b7d0 .word 0x8000b7d0 +80001d58: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x80000000 +80001d5c: 00052b83 lw x23,0(x10) +80001d60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x55555555 +80001d64: 00052803 lw x16,0(x10) +80001d68: 00450513 addi x10,x10,4 + +80001d6c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + ror x2, x23, x16 # perform operation +80001d6c: 610bd133 ror x2,x23,x16 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d70: 0009a203 lw x4,0(x19) +80001d74: 00220863 beq x4,x2,80001d84 +80001d78: 788032ef jal x5,80005500 +80001d7c: 80001d6c .word 0x80001d6c +80001d80: 8000b82e .word 0x8000b82e +80001d84: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x80000001 +80001d88: 00052903 lw x18,0(x10) +80001d8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000 +80001d90: 00052f83 lw x31,0(x10) +80001d94: 00450513 addi x10,x10,4 + +80001d98 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + ror x28, x18, x31 # perform operation +80001d98: 61f95e33 ror x28,x18,x31 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d9c: 0009a203 lw x4,0(x19) +80001da0: 01c20863 beq x4,x28,80001db0 +80001da4: 75c032ef jal x5,80005500 +80001da8: 80001d98 .word 0x80001d98 +80001dac: 8000b88c .word 0x8000b88c +80001db0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x80000001 +80001db4: 00052103 lw x2,0(x10) +80001db8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000001 +80001dbc: 00052883 lw x17,0(x10) +80001dc0: 00450513 addi x10,x10,4 + +80001dc4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + ror x31, x2, x17 # perform operation +80001dc4: 61115fb3 ror x31,x2,x17 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc8: 0009a203 lw x4,0(x19) +80001dcc: 01f20863 beq x4,x31,80001ddc +80001dd0: 730032ef jal x5,80005500 +80001dd4: 80001dc4 .word 0x80001dc4 +80001dd8: 8000b8e3 .word 0x8000b8e3 +80001ddc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x80000001 +80001de0: 00052703 lw x14,0(x10) +80001de4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000002 +80001de8: 00052a03 lw x20,0(x10) +80001dec: 00450513 addi x10,x10,4 + +80001df0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + ror x16, x14, x20 # perform operation +80001df0: 61475833 ror x16,x14,x20 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df4: 0009a203 lw x4,0(x19) +80001df8: 01020863 beq x4,x16,80001e08 +80001dfc: 704032ef jal x5,80005500 +80001e00: 80001df0 .word 0x80001df0 +80001e04: 8000b93a .word 0x8000b93a +80001e08: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x80000001 +80001e0c: 00052883 lw x17,0(x10) +80001e10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x80000000 +80001e14: 00052783 lw x15,0(x10) +80001e18: 00450513 addi x10,x10,4 + +80001e1c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + ror x14, x17, x15 # perform operation +80001e1c: 60f8d733 ror x14,x17,x15 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e20: 0009a203 lw x4,0(x19) +80001e24: 00e20863 beq x4,x14,80001e34 +80001e28: 6d8032ef jal x5,80005500 +80001e2c: 80001e1c .word 0x80001e1c +80001e30: 8000b991 .word 0x8000b991 +80001e34: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x80000001 +80001e38: 00052303 lw x6,0(x10) +80001e3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x80000001 +80001e40: 00052a83 lw x21,0(x10) +80001e44: 00450513 addi x10,x10,4 + +80001e48 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + ror x28, x6, x21 # perform operation +80001e48: 61535e33 ror x28,x6,x21 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e4c: 0009a203 lw x4,0(x19) +80001e50: 01c20863 beq x4,x28,80001e60 +80001e54: 6ac032ef jal x5,80005500 +80001e58: 80001e48 .word 0x80001e48 +80001e5c: 8000b9ef .word 0x8000b9ef +80001e60: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x80000001 +80001e64: 00052783 lw x15,0(x10) +80001e68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7fffffff +80001e6c: 00052803 lw x16,0(x10) +80001e70: 00450513 addi x10,x10,4 + +80001e74 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + ror x17, x15, x16 # perform operation +80001e74: 6107d8b3 ror x17,x15,x16 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e78: 0009a203 lw x4,0(x19) +80001e7c: 01120863 beq x4,x17,80001e8c +80001e80: 680032ef jal x5,80005500 +80001e84: 80001e74 .word 0x80001e74 +80001e88: 8000ba4d .word 0x8000ba4d +80001e8c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x80000001 +80001e90: 00052883 lw x17,0(x10) +80001e94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7ffffffe +80001e98: 00052d83 lw x27,0(x10) +80001e9c: 00450513 addi x10,x10,4 + +80001ea0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + ror x22, x17, x27 # perform operation +80001ea0: 61b8db33 ror x22,x17,x27 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea4: 0009a203 lw x4,0(x19) +80001ea8: 01620863 beq x4,x22,80001eb8 +80001eac: 654032ef jal x5,80005500 +80001eb0: 80001ea0 .word 0x80001ea0 +80001eb4: 8000baab .word 0x8000baab +80001eb8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x80000001 +80001ebc: 00052703 lw x14,0(x10) +80001ec0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xffffffff +80001ec4: 00052803 lw x16,0(x10) +80001ec8: 00450513 addi x10,x10,4 + +80001ecc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + ror x15, x14, x16 # perform operation +80001ecc: 610757b3 ror x15,x14,x16 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed0: 0009a203 lw x4,0(x19) +80001ed4: 00f20863 beq x4,x15,80001ee4 +80001ed8: 628032ef jal x5,80005500 +80001edc: 80001ecc .word 0x80001ecc +80001ee0: 8000bb09 .word 0x8000bb09 +80001ee4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x80000001 +80001ee8: 00052803 lw x16,0(x10) +80001eec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfffffffe +80001ef0: 00052303 lw x6,0(x10) +80001ef4: 00450513 addi x10,x10,4 + +80001ef8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + ror x28, x16, x6 # perform operation +80001ef8: 60685e33 ror x28,x16,x6 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001efc: 0009a203 lw x4,0(x19) +80001f00: 01c20863 beq x4,x28,80001f10 +80001f04: 5fc032ef jal x5,80005500 +80001f08: 80001ef8 .word 0x80001ef8 +80001f0c: 8000bb67 .word 0x8000bb67 +80001f10: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x80000001 +80001f14: 00052483 lw x9,0(x10) +80001f18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5bbc8872 +80001f1c: 00052303 lw x6,0(x10) +80001f20: 00450513 addi x10,x10,4 + +80001f24 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + ror x31, x9, x6 # perform operation +80001f24: 6064dfb3 ror x31,x9,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f28: 0009a203 lw x4,0(x19) +80001f2c: 01f20863 beq x4,x31,80001f3c +80001f30: 5d0032ef jal x5,80005500 +80001f34: 80001f24 .word 0x80001f24 +80001f38: 8000bbc5 .word 0x8000bbc5 +80001f3c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x80000001 +80001f40: 00052e03 lw x28,0(x10) +80001f44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xaaaaaaaa +80001f48: 00052703 lw x14,0(x10) +80001f4c: 00450513 addi x10,x10,4 + +80001f50 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + ror x9, x28, x14 # perform operation +80001f50: 60ee54b3 ror x9,x28,x14 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f54: 0009a203 lw x4,0(x19) +80001f58: 00920863 beq x4,x9,80001f68 +80001f5c: 5a4032ef jal x5,80005500 +80001f60: 80001f50 .word 0x80001f50 +80001f64: 8000bc23 .word 0x8000bc23 +80001f68: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x80000001 +80001f6c: 00052783 lw x15,0(x10) +80001f70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x55555555 +80001f74: 00052183 lw x3,0(x10) +80001f78: 00450513 addi x10,x10,4 + +80001f7c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + ror x24, x15, x3 # perform operation +80001f7c: 6037dc33 ror x24,x15,x3 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f80: 0009a203 lw x4,0(x19) +80001f84: 01820863 beq x4,x24,80001f94 +80001f88: 578032ef jal x5,80005500 +80001f8c: 80001f7c .word 0x80001f7c +80001f90: 8000bc81 .word 0x8000bc81 +80001f94: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7fffffff +80001f98: 00052803 lw x16,0(x10) +80001f9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000000 +80001fa0: 00052603 lw x12,0(x10) +80001fa4: 00450513 addi x10,x10,4 + +80001fa8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + ror x26, x16, x12 # perform operation +80001fa8: 60c85d33 ror x26,x16,x12 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fac: 0009a203 lw x4,0(x19) +80001fb0: 01a20863 beq x4,x26,80001fc0 +80001fb4: 54c032ef jal x5,80005500 +80001fb8: 80001fa8 .word 0x80001fa8 +80001fbc: 8000bcdf .word 0x8000bcdf +80001fc0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7fffffff +80001fc4: 00052c03 lw x24,0(x10) +80001fc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000001 +80001fcc: 00052803 lw x16,0(x10) +80001fd0: 00450513 addi x10,x10,4 + +80001fd4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + ror x11, x24, x16 # perform operation +80001fd4: 610c55b3 ror x11,x24,x16 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd8: 0009a203 lw x4,0(x19) +80001fdc: 00b20863 beq x4,x11,80001fec +80001fe0: 520032ef jal x5,80005500 +80001fe4: 80001fd4 .word 0x80001fd4 +80001fe8: 8000bd36 .word 0x8000bd36 +80001fec: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffff +80001ff0: 00052783 lw x15,0(x10) +80001ff4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000002 +80001ff8: 00052a03 lw x20,0(x10) +80001ffc: 00450513 addi x10,x10,4 + +80002000 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + ror x9, x15, x20 # perform operation +80002000: 6147d4b3 ror x9,x15,x20 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002004: 0009a203 lw x4,0(x19) +80002008: 00920863 beq x4,x9,80002018 +8000200c: 4f4032ef jal x5,80005500 +80002010: 80002000 .word 0x80002000 +80002014: 8000bd8d .word 0x8000bd8d +80002018: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7fffffff +8000201c: 00052b03 lw x22,0(x10) +80002020: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x80000000 +80002024: 00052783 lw x15,0(x10) +80002028: 00450513 addi x10,x10,4 + +8000202c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + ror x8, x22, x15 # perform operation +8000202c: 60fb5433 ror x8,x22,x15 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002030: 0009a203 lw x4,0(x19) +80002034: 00820863 beq x4,x8,80002044 +80002038: 4c8032ef jal x5,80005500 +8000203c: 8000202c .word 0x8000202c +80002040: 8000bde4 .word 0x8000bde4 +80002044: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7fffffff +80002048: 00052b03 lw x22,0(x10) +8000204c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x80000001 +80002050: 00052303 lw x6,0(x10) +80002054: 00450513 addi x10,x10,4 + +80002058 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + ror x27, x22, x6 # perform operation +80002058: 606b5db3 ror x27,x22,x6 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000205c: 0009a203 lw x4,0(x19) +80002060: 01b20863 beq x4,x27,80002070 +80002064: 49c032ef jal x5,80005500 +80002068: 80002058 .word 0x80002058 +8000206c: 8000be42 .word 0x8000be42 +80002070: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7fffffff +80002074: 00052683 lw x13,0(x10) +80002078: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7fffffff +8000207c: 00052c03 lw x24,0(x10) +80002080: 00450513 addi x10,x10,4 + +80002084 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + ror x18, x13, x24 # perform operation +80002084: 6186d933 ror x18,x13,x24 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002088: 0009a203 lw x4,0(x19) +8000208c: 01220863 beq x4,x18,8000209c +80002090: 470032ef jal x5,80005500 +80002094: 80002084 .word 0x80002084 +80002098: 8000bea0 .word 0x8000bea0 +8000209c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7fffffff +800020a0: 00052303 lw x6,0(x10) +800020a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7ffffffe +800020a8: 00052b03 lw x22,0(x10) +800020ac: 00450513 addi x10,x10,4 + +800020b0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + ror x28, x6, x22 # perform operation +800020b0: 61635e33 ror x28,x6,x22 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b4: 0009a203 lw x4,0(x19) +800020b8: 01c20863 beq x4,x28,800020c8 +800020bc: 444032ef jal x5,80005500 +800020c0: 800020b0 .word 0x800020b0 +800020c4: 8000befe .word 0x8000befe +800020c8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7fffffff +800020cc: 00052103 lw x2,0(x10) +800020d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xffffffff +800020d4: 00052903 lw x18,0(x10) +800020d8: 00450513 addi x10,x10,4 + +800020dc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + ror x25, x2, x18 # perform operation +800020dc: 61215cb3 ror x25,x2,x18 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e0: 0009a203 lw x4,0(x19) +800020e4: 01920863 beq x4,x25,800020f4 +800020e8: 418032ef jal x5,80005500 +800020ec: 800020dc .word 0x800020dc +800020f0: 8000bf5c .word 0x8000bf5c +800020f4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7fffffff +800020f8: 00052103 lw x2,0(x10) +800020fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xfffffffe +80002100: 00052b03 lw x22,0(x10) +80002104: 00450513 addi x10,x10,4 + +80002108 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + ror x14, x2, x22 # perform operation +80002108: 61615733 ror x14,x2,x22 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000210c: 0009a203 lw x4,0(x19) +80002110: 00e20863 beq x4,x14,80002120 +80002114: 3ec032ef jal x5,80005500 +80002118: 80002108 .word 0x80002108 +8000211c: 8000bfba .word 0x8000bfba +80002120: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7fffffff +80002124: 00052c03 lw x24,0(x10) +80002128: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5bbc8872 +8000212c: 00052303 lw x6,0(x10) +80002130: 00450513 addi x10,x10,4 + +80002134 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + ror x13, x24, x6 # perform operation +80002134: 606c56b3 ror x13,x24,x6 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002138: 0009a203 lw x4,0(x19) +8000213c: 00d20863 beq x4,x13,8000214c +80002140: 3c0032ef jal x5,80005500 +80002144: 80002134 .word 0x80002134 +80002148: 8000c018 .word 0x8000c018 +8000214c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffff +80002150: 00052783 lw x15,0(x10) +80002154: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaa +80002158: 00052803 lw x16,0(x10) +8000215c: 00450513 addi x10,x10,4 + +80002160 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + ror x8, x15, x16 # perform operation +80002160: 6107d433 ror x8,x15,x16 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002164: 0009a203 lw x4,0(x19) +80002168: 00820863 beq x4,x8,80002178 +8000216c: 394032ef jal x5,80005500 +80002170: 80002160 .word 0x80002160 +80002174: 8000c076 .word 0x8000c076 +80002178: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7fffffff +8000217c: 00052383 lw x7,0(x10) +80002180: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x55555555 +80002184: 00052783 lw x15,0(x10) +80002188: 00450513 addi x10,x10,4 + +8000218c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + ror x30, x7, x15 # perform operation +8000218c: 60f3df33 ror x30,x7,x15 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002190: 0009a203 lw x4,0(x19) +80002194: 01e20863 beq x4,x30,800021a4 +80002198: 368032ef jal x5,80005500 +8000219c: 8000218c .word 0x8000218c +800021a0: 8000c0d4 .word 0x8000c0d4 +800021a4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffe +800021a8: 00052883 lw x17,0(x10) +800021ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000000 +800021b0: 00052a03 lw x20,0(x10) +800021b4: 00450513 addi x10,x10,4 + +800021b8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + ror x14, x17, x20 # perform operation +800021b8: 6148d733 ror x14,x17,x20 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021bc: 0009a203 lw x4,0(x19) +800021c0: 00e20863 beq x4,x14,800021d0 +800021c4: 33c032ef jal x5,80005500 +800021c8: 800021b8 .word 0x800021b8 +800021cc: 8000c132 .word 0x8000c132 +800021d0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7ffffffe +800021d4: 00052803 lw x16,0(x10) +800021d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000001 +800021dc: 00052e83 lw x29,0(x10) +800021e0: 00450513 addi x10,x10,4 + +800021e4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + ror x24, x16, x29 # perform operation +800021e4: 61d85c33 ror x24,x16,x29 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e8: 0009a203 lw x4,0(x19) +800021ec: 01820863 beq x4,x24,800021fc +800021f0: 310032ef jal x5,80005500 +800021f4: 800021e4 .word 0x800021e4 +800021f8: 8000c189 .word 0x8000c189 +800021fc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7ffffffe +80002200: 00052c03 lw x24,0(x10) +80002204: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000002 +80002208: 00052083 lw x1,0(x10) +8000220c: 00450513 addi x10,x10,4 + +80002210 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + ror x30, x24, x1 # perform operation +80002210: 601c5f33 ror x30,x24,x1 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002214: 0009a203 lw x4,0(x19) +80002218: 01e20863 beq x4,x30,80002228 +8000221c: 2e4032ef jal x5,80005500 +80002220: 80002210 .word 0x80002210 +80002224: 8000c1e0 .word 0x8000c1e0 +80002228: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x7ffffffe +8000222c: 00052903 lw x18,0(x10) +80002230: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x80000000 +80002234: 00052a83 lw x21,0(x10) +80002238: 00450513 addi x10,x10,4 + +8000223c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + ror x11, x18, x21 # perform operation +8000223c: 615955b3 ror x11,x18,x21 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002240: 0009a203 lw x4,0(x19) +80002244: 00b20863 beq x4,x11,80002254 +80002248: 2b8032ef jal x5,80005500 +8000224c: 8000223c .word 0x8000223c +80002250: 8000c237 .word 0x8000c237 +80002254: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffe +80002258: 00052883 lw x17,0(x10) +8000225c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x80000001 +80002260: 00052b03 lw x22,0(x10) +80002264: 00450513 addi x10,x10,4 + +80002268 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + ror x12, x17, x22 # perform operation +80002268: 6168d633 ror x12,x17,x22 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000226c: 0009a203 lw x4,0(x19) +80002270: 00c20863 beq x4,x12,80002280 +80002274: 28c032ef jal x5,80005500 +80002278: 80002268 .word 0x80002268 +8000227c: 8000c295 .word 0x8000c295 +80002280: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7ffffffe +80002284: 00052483 lw x9,0(x10) +80002288: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7fffffff +8000228c: 00052a83 lw x21,0(x10) +80002290: 00450513 addi x10,x10,4 + +80002294 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + ror x25, x9, x21 # perform operation +80002294: 6154dcb3 ror x25,x9,x21 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002298: 0009a203 lw x4,0(x19) +8000229c: 01920863 beq x4,x25,800022ac +800022a0: 260032ef jal x5,80005500 +800022a4: 80002294 .word 0x80002294 +800022a8: 8000c2f3 .word 0x8000c2f3 +800022ac: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffe +800022b0: 00052883 lw x17,0(x10) +800022b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7ffffffe +800022b8: 00052703 lw x14,0(x10) +800022bc: 00450513 addi x10,x10,4 + +800022c0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + ror x13, x17, x14 # perform operation +800022c0: 60e8d6b3 ror x13,x17,x14 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c4: 0009a203 lw x4,0(x19) +800022c8: 00d20863 beq x4,x13,800022d8 +800022cc: 234032ef jal x5,80005500 +800022d0: 800022c0 .word 0x800022c0 +800022d4: 8000c351 .word 0x8000c351 +800022d8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7ffffffe +800022dc: 00052a83 lw x21,0(x10) +800022e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xffffffff +800022e4: 00052e83 lw x29,0(x10) +800022e8: 00450513 addi x10,x10,4 + +800022ec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + ror x6, x21, x29 # perform operation +800022ec: 61dad333 ror x6,x21,x29 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f0: 0009a203 lw x4,0(x19) +800022f4: 00620863 beq x4,x6,80002304 +800022f8: 208032ef jal x5,80005500 +800022fc: 800022ec .word 0x800022ec +80002300: 8000c3af .word 0x8000c3af +80002304: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffe +80002308: 00052f83 lw x31,0(x10) +8000230c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xfffffffe +80002310: 00052a03 lw x20,0(x10) +80002314: 00450513 addi x10,x10,4 + +80002318 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + ror x14, x31, x20 # perform operation +80002318: 614fd733 ror x14,x31,x20 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000231c: 0009a203 lw x4,0(x19) +80002320: 00e20863 beq x4,x14,80002330 +80002324: 1dc032ef jal x5,80005500 +80002328: 80002318 .word 0x80002318 +8000232c: 8000c40d .word 0x8000c40d +80002330: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7ffffffe +80002334: 00052c03 lw x24,0(x10) +80002338: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5bbc8872 +8000233c: 00052683 lw x13,0(x10) +80002340: 00450513 addi x10,x10,4 + +80002344 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + ror x26, x24, x13 # perform operation +80002344: 60dc5d33 ror x26,x24,x13 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002348: 0009a203 lw x4,0(x19) +8000234c: 01a20863 beq x4,x26,8000235c +80002350: 1b0032ef jal x5,80005500 +80002354: 80002344 .word 0x80002344 +80002358: 8000c46b .word 0x8000c46b +8000235c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7ffffffe +80002360: 00052483 lw x9,0(x10) +80002364: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xaaaaaaaa +80002368: 00052883 lw x17,0(x10) +8000236c: 00450513 addi x10,x10,4 + +80002370 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + ror x30, x9, x17 # perform operation +80002370: 6114df33 ror x30,x9,x17 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002374: 0009a203 lw x4,0(x19) +80002378: 01e20863 beq x4,x30,80002388 +8000237c: 184032ef jal x5,80005500 +80002380: 80002370 .word 0x80002370 +80002384: 8000c4c9 .word 0x8000c4c9 +80002388: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7ffffffe +8000238c: 00052583 lw x11,0(x10) +80002390: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x55555555 +80002394: 00052883 lw x17,0(x10) +80002398: 00450513 addi x10,x10,4 + +8000239c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + ror x15, x11, x17 # perform operation +8000239c: 6115d7b3 ror x15,x11,x17 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a0: 0009a203 lw x4,0(x19) +800023a4: 00f20863 beq x4,x15,800023b4 +800023a8: 158032ef jal x5,80005500 +800023ac: 8000239c .word 0x8000239c +800023b0: 8000c527 .word 0x8000c527 +800023b4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xffffffff +800023b8: 00052c83 lw x25,0(x10) +800023bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000 +800023c0: 00052703 lw x14,0(x10) +800023c4: 00450513 addi x10,x10,4 + +800023c8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + ror x3, x25, x14 # perform operation +800023c8: 60ecd1b3 ror x3,x25,x14 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023cc: 0009a203 lw x4,0(x19) +800023d0: 00320863 beq x4,x3,800023e0 +800023d4: 12c032ef jal x5,80005500 +800023d8: 800023c8 .word 0x800023c8 +800023dc: 8000c585 .word 0x8000c585 +800023e0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xffffffff +800023e4: 00052d83 lw x27,0(x10) +800023e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000001 +800023ec: 00052a03 lw x20,0(x10) +800023f0: 00450513 addi x10,x10,4 + +800023f4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + ror x8, x27, x20 # perform operation +800023f4: 614dd433 ror x8,x27,x20 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f8: 0009a203 lw x4,0(x19) +800023fc: 00820863 beq x4,x8,8000240c +80002400: 100032ef jal x5,80005500 +80002404: 800023f4 .word 0x800023f4 +80002408: 8000c5dc .word 0x8000c5dc +8000240c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffff +80002410: 00052483 lw x9,0(x10) +80002414: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x00000002 +80002418: 00052583 lw x11,0(x10) +8000241c: 00450513 addi x10,x10,4 + +80002420 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + ror x3, x9, x11 # perform operation +80002420: 60b4d1b3 ror x3,x9,x11 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002424: 0009a203 lw x4,0(x19) +80002428: 00320863 beq x4,x3,80002438 +8000242c: 0d4032ef jal x5,80005500 +80002430: 80002420 .word 0x80002420 +80002434: 8000c633 .word 0x8000c633 +80002438: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xffffffff +8000243c: 00052e03 lw x28,0(x10) +80002440: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x80000000 +80002444: 00052f83 lw x31,0(x10) +80002448: 00450513 addi x10,x10,4 + +8000244c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + ror x11, x28, x31 # perform operation +8000244c: 61fe55b3 ror x11,x28,x31 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002450: 0009a203 lw x4,0(x19) +80002454: 00b20863 beq x4,x11,80002464 +80002458: 0a8032ef jal x5,80005500 +8000245c: 8000244c .word 0x8000244c +80002460: 8000c68a .word 0x8000c68a +80002464: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffff +80002468: 00052703 lw x14,0(x10) +8000246c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x80000001 +80002470: 00052583 lw x11,0(x10) +80002474: 00450513 addi x10,x10,4 + +80002478 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + ror x2, x14, x11 # perform operation +80002478: 60b75133 ror x2,x14,x11 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000247c: 0009a203 lw x4,0(x19) +80002480: 00220863 beq x4,x2,80002490 +80002484: 07c032ef jal x5,80005500 +80002488: 80002478 .word 0x80002478 +8000248c: 8000c6e8 .word 0x8000c6e8 +80002490: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffff +80002494: 00052483 lw x9,0(x10) +80002498: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7fffffff +8000249c: 00052683 lw x13,0(x10) +800024a0: 00450513 addi x10,x10,4 + +800024a4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + ror x16, x9, x13 # perform operation +800024a4: 60d4d833 ror x16,x9,x13 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a8: 0009a203 lw x4,0(x19) +800024ac: 01020863 beq x4,x16,800024bc +800024b0: 050032ef jal x5,80005500 +800024b4: 800024a4 .word 0x800024a4 +800024b8: 8000c746 .word 0x8000c746 +800024bc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xffffffff +800024c0: 00052403 lw x8,0(x10) +800024c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffe +800024c8: 00052c03 lw x24,0(x10) +800024cc: 00450513 addi x10,x10,4 + +800024d0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + ror x27, x8, x24 # perform operation +800024d0: 61845db3 ror x27,x8,x24 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d4: 0009a203 lw x4,0(x19) +800024d8: 01b20863 beq x4,x27,800024e8 +800024dc: 024032ef jal x5,80005500 +800024e0: 800024d0 .word 0x800024d0 +800024e4: 8000c7a4 .word 0x8000c7a4 +800024e8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xffffffff +800024ec: 00052583 lw x11,0(x10) +800024f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffff +800024f4: 00052e03 lw x28,0(x10) +800024f8: 00450513 addi x10,x10,4 + +800024fc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + ror x22, x11, x28 # perform operation +800024fc: 61c5db33 ror x22,x11,x28 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002500: 0009a203 lw x4,0(x19) +80002504: 01620863 beq x4,x22,80002514 +80002508: 7f9022ef jal x5,80005500 +8000250c: 800024fc .word 0x800024fc +80002510: 8000c802 .word 0x8000c802 +80002514: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffff +80002518: 00052483 lw x9,0(x10) +8000251c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffe +80002520: 00052883 lw x17,0(x10) +80002524: 00450513 addi x10,x10,4 + +80002528 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + ror x27, x9, x17 # perform operation +80002528: 6114ddb3 ror x27,x9,x17 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000252c: 0009a203 lw x4,0(x19) +80002530: 01b20863 beq x4,x27,80002540 +80002534: 7cd022ef jal x5,80005500 +80002538: 80002528 .word 0x80002528 +8000253c: 8000c860 .word 0x8000c860 +80002540: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffff +80002544: 00052703 lw x14,0(x10) +80002548: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x5bbc8872 +8000254c: 00052483 lw x9,0(x10) +80002550: 00450513 addi x10,x10,4 + +80002554 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + ror x26, x14, x9 # perform operation +80002554: 60975d33 ror x26,x14,x9 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002558: 0009a203 lw x4,0(x19) +8000255c: 01a20863 beq x4,x26,8000256c +80002560: 7a1022ef jal x5,80005500 +80002564: 80002554 .word 0x80002554 +80002568: 8000c8be .word 0x8000c8be +8000256c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xffffffff +80002570: 00052b03 lw x22,0(x10) +80002574: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xaaaaaaaa +80002578: 00052783 lw x15,0(x10) +8000257c: 00450513 addi x10,x10,4 + +80002580 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + ror x17, x22, x15 # perform operation +80002580: 60fb58b3 ror x17,x22,x15 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002584: 0009a203 lw x4,0(x19) +80002588: 01120863 beq x4,x17,80002598 +8000258c: 775022ef jal x5,80005500 +80002590: 80002580 .word 0x80002580 +80002594: 8000c91c .word 0x8000c91c +80002598: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xffffffff +8000259c: 00052f83 lw x31,0(x10) +800025a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x55555555 +800025a4: 00052b83 lw x23,0(x10) +800025a8: 00450513 addi x10,x10,4 + +800025ac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + ror x12, x31, x23 # perform operation +800025ac: 617fd633 ror x12,x31,x23 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b0: 0009a203 lw x4,0(x19) +800025b4: 00c20863 beq x4,x12,800025c4 +800025b8: 749022ef jal x5,80005500 +800025bc: 800025ac .word 0x800025ac +800025c0: 8000c97a .word 0x8000c97a +800025c4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfffffffe +800025c8: 00052103 lw x2,0(x10) +800025cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000 +800025d0: 00052183 lw x3,0(x10) +800025d4: 00450513 addi x10,x10,4 + +800025d8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + ror x28, x2, x3 # perform operation +800025d8: 60315e33 ror x28,x2,x3 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025dc: 0009a203 lw x4,0(x19) +800025e0: 01c20863 beq x4,x28,800025f0 +800025e4: 71d022ef jal x5,80005500 +800025e8: 800025d8 .word 0x800025d8 +800025ec: 8000c9d8 .word 0x8000c9d8 +800025f0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffe +800025f4: 00052c03 lw x24,0(x10) +800025f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000001 +800025fc: 00052103 lw x2,0(x10) +80002600: 00450513 addi x10,x10,4 + +80002604 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + ror x29, x24, x2 # perform operation +80002604: 602c5eb3 ror x29,x24,x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002608: 0009a203 lw x4,0(x19) +8000260c: 01d20863 beq x4,x29,8000261c +80002610: 6f1022ef jal x5,80005500 +80002614: 80002604 .word 0x80002604 +80002618: 8000ca2f .word 0x8000ca2f +8000261c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xfffffffe +80002620: 00052303 lw x6,0(x10) +80002624: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000002 +80002628: 00052183 lw x3,0(x10) +8000262c: 00450513 addi x10,x10,4 + +80002630 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + ror x25, x6, x3 # perform operation +80002630: 60335cb3 ror x25,x6,x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002634: 0009a203 lw x4,0(x19) +80002638: 01920863 beq x4,x25,80002648 +8000263c: 6c5022ef jal x5,80005500 +80002640: 80002630 .word 0x80002630 +80002644: 8000ca86 .word 0x8000ca86 +80002648: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfffffffe +8000264c: 00052e83 lw x29,0(x10) +80002650: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x80000000 +80002654: 00052103 lw x2,0(x10) +80002658: 00450513 addi x10,x10,4 + +8000265c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + ror x14, x29, x2 # perform operation +8000265c: 602ed733 ror x14,x29,x2 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002660: 0009a203 lw x4,0(x19) +80002664: 00e20863 beq x4,x14,80002674 +80002668: 699022ef jal x5,80005500 +8000266c: 8000265c .word 0x8000265c +80002670: 8000cadd .word 0x8000cadd +80002674: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xfffffffe +80002678: 00052583 lw x11,0(x10) +8000267c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x80000001 +80002680: 00052f83 lw x31,0(x10) +80002684: 00450513 addi x10,x10,4 + +80002688 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + ror x2, x11, x31 # perform operation +80002688: 61f5d133 ror x2,x11,x31 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000268c: 0009a203 lw x4,0(x19) +80002690: 00220863 beq x4,x2,800026a0 +80002694: 66d022ef jal x5,80005500 +80002698: 80002688 .word 0x80002688 +8000269c: 8000cb3b .word 0x8000cb3b +800026a0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfffffffe +800026a4: 00052803 lw x16,0(x10) +800026a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7fffffff +800026ac: 00052e03 lw x28,0(x10) +800026b0: 00450513 addi x10,x10,4 + +800026b4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + ror x24, x16, x28 # perform operation +800026b4: 61c85c33 ror x24,x16,x28 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b8: 0009a203 lw x4,0(x19) +800026bc: 01820863 beq x4,x24,800026cc +800026c0: 641022ef jal x5,80005500 +800026c4: 800026b4 .word 0x800026b4 +800026c8: 8000cb99 .word 0x8000cb99 +800026cc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xfffffffe +800026d0: 00052d03 lw x26,0(x10) +800026d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7ffffffe +800026d8: 00052783 lw x15,0(x10) +800026dc: 00450513 addi x10,x10,4 + +800026e0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + ror x22, x26, x15 # perform operation +800026e0: 60fd5b33 ror x22,x26,x15 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e4: 0009a203 lw x4,0(x19) +800026e8: 01620863 beq x4,x22,800026f8 +800026ec: 615022ef jal x5,80005500 +800026f0: 800026e0 .word 0x800026e0 +800026f4: 8000cbf7 .word 0x8000cbf7 +800026f8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xfffffffe +800026fc: 00052703 lw x14,0(x10) +80002700: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xffffffff +80002704: 00052583 lw x11,0(x10) +80002708: 00450513 addi x10,x10,4 + +8000270c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + ror x31, x14, x11 # perform operation +8000270c: 60b75fb3 ror x31,x14,x11 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002710: 0009a203 lw x4,0(x19) +80002714: 01f20863 beq x4,x31,80002724 +80002718: 5e9022ef jal x5,80005500 +8000271c: 8000270c .word 0x8000270c +80002720: 8000cc55 .word 0x8000cc55 +80002724: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xfffffffe +80002728: 00052783 lw x15,0(x10) +8000272c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xfffffffe +80002730: 00052a03 lw x20,0(x10) +80002734: 00450513 addi x10,x10,4 + +80002738 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + ror x22, x15, x20 # perform operation +80002738: 6147db33 ror x22,x15,x20 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000273c: 0009a203 lw x4,0(x19) +80002740: 01620863 beq x4,x22,80002750 +80002744: 5bd022ef jal x5,80005500 +80002748: 80002738 .word 0x80002738 +8000274c: 8000ccb3 .word 0x8000ccb3 +80002750: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xfffffffe +80002754: 00052a03 lw x20,0(x10) +80002758: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x5bbc8872 +8000275c: 00052483 lw x9,0(x10) +80002760: 00450513 addi x10,x10,4 + +80002764 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + ror x29, x20, x9 # perform operation +80002764: 609a5eb3 ror x29,x20,x9 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002768: 0009a203 lw x4,0(x19) +8000276c: 01d20863 beq x4,x29,8000277c +80002770: 591022ef jal x5,80005500 +80002774: 80002764 .word 0x80002764 +80002778: 8000cd11 .word 0x8000cd11 +8000277c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfffffffe +80002780: 00052683 lw x13,0(x10) +80002784: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaa +80002788: 00052803 lw x16,0(x10) +8000278c: 00450513 addi x10,x10,4 + +80002790 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + ror x30, x13, x16 # perform operation +80002790: 6106df33 ror x30,x13,x16 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002794: 0009a203 lw x4,0(x19) +80002798: 01e20863 beq x4,x30,800027a8 +8000279c: 565022ef jal x5,80005500 +800027a0: 80002790 .word 0x80002790 +800027a4: 8000cd6f .word 0x8000cd6f +800027a8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfffffffe +800027ac: 00052e83 lw x29,0(x10) +800027b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x55555555 +800027b4: 00052e03 lw x28,0(x10) +800027b8: 00450513 addi x10,x10,4 + +800027bc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + ror x30, x29, x28 # perform operation +800027bc: 61cedf33 ror x30,x29,x28 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c0: 0009a203 lw x4,0(x19) +800027c4: 01e20863 beq x4,x30,800027d4 +800027c8: 539022ef jal x5,80005500 +800027cc: 800027bc .word 0x800027bc +800027d0: 8000cdcd .word 0x8000cdcd +800027d4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5bbc8872 +800027d8: 00052c03 lw x24,0(x10) +800027dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x00000000 +800027e0: 00052583 lw x11,0(x10) +800027e4: 00450513 addi x10,x10,4 + +800027e8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + ror x13, x24, x11 # perform operation +800027e8: 60bc56b3 ror x13,x24,x11 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027ec: 0009a203 lw x4,0(x19) +800027f0: 00d20863 beq x4,x13,80002800 +800027f4: 50d022ef jal x5,80005500 +800027f8: 800027e8 .word 0x800027e8 +800027fc: 8000ce2b .word 0x8000ce2b +80002800: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5bbc8872 +80002804: 00052603 lw x12,0(x10) +80002808: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000001 +8000280c: 00052c83 lw x25,0(x10) +80002810: 00450513 addi x10,x10,4 + +80002814 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + ror x30, x12, x25 # perform operation +80002814: 61965f33 ror x30,x12,x25 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002818: 0009a203 lw x4,0(x19) +8000281c: 01e20863 beq x4,x30,8000282c +80002820: 4e1022ef jal x5,80005500 +80002824: 80002814 .word 0x80002814 +80002828: 8000ce82 .word 0x8000ce82 +8000282c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5bbc8872 +80002830: 00052603 lw x12,0(x10) +80002834: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000002 +80002838: 00052a03 lw x20,0(x10) +8000283c: 00450513 addi x10,x10,4 + +80002840 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + ror x2, x12, x20 # perform operation +80002840: 61465133 ror x2,x12,x20 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002844: 0009a203 lw x4,0(x19) +80002848: 00220863 beq x4,x2,80002858 +8000284c: 4b5022ef jal x5,80005500 +80002850: 80002840 .word 0x80002840 +80002854: 8000ced9 .word 0x8000ced9 +80002858: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5bbc8872 +8000285c: 00052083 lw x1,0(x10) +80002860: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x80000000 +80002864: 00052383 lw x7,0(x10) +80002868: 00450513 addi x10,x10,4 + +8000286c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + ror x25, x1, x7 # perform operation +8000286c: 6070dcb3 ror x25,x1,x7 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002870: 0009a203 lw x4,0(x19) +80002874: 01920863 beq x4,x25,80002884 +80002878: 489022ef jal x5,80005500 +8000287c: 8000286c .word 0x8000286c +80002880: 8000cf30 .word 0x8000cf30 +80002884: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5bbc8872 +80002888: 00052483 lw x9,0(x10) +8000288c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x80000001 +80002890: 00052683 lw x13,0(x10) +80002894: 00450513 addi x10,x10,4 + +80002898 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + ror x1, x9, x13 # perform operation +80002898: 60d4d0b3 ror x1,x9,x13 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000289c: 0009a203 lw x4,0(x19) +800028a0: 00120863 beq x4,x1,800028b0 +800028a4: 45d022ef jal x5,80005500 +800028a8: 80002898 .word 0x80002898 +800028ac: 8000cf8e .word 0x8000cf8e +800028b0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5bbc8872 +800028b4: 00052b03 lw x22,0(x10) +800028b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7fffffff +800028bc: 00052883 lw x17,0(x10) +800028c0: 00450513 addi x10,x10,4 + +800028c4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + ror x6, x22, x17 # perform operation +800028c4: 611b5333 ror x6,x22,x17 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c8: 0009a203 lw x4,0(x19) +800028cc: 00620863 beq x4,x6,800028dc +800028d0: 431022ef jal x5,80005500 +800028d4: 800028c4 .word 0x800028c4 +800028d8: 8000cfec .word 0x8000cfec +800028dc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x5bbc8872 +800028e0: 00052903 lw x18,0(x10) +800028e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7ffffffe +800028e8: 00052d83 lw x27,0(x10) +800028ec: 00450513 addi x10,x10,4 + +800028f0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + ror x14, x18, x27 # perform operation +800028f0: 61b95733 ror x14,x18,x27 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f4: 0009a203 lw x4,0(x19) +800028f8: 00e20863 beq x4,x14,80002908 +800028fc: 405022ef jal x5,80005500 +80002900: 800028f0 .word 0x800028f0 +80002904: 8000d04a .word 0x8000d04a +80002908: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x5bbc8872 +8000290c: 00052e83 lw x29,0(x10) +80002910: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xffffffff +80002914: 00052603 lw x12,0(x10) +80002918: 00450513 addi x10,x10,4 + +8000291c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + ror x13, x29, x12 # perform operation +8000291c: 60ced6b3 ror x13,x29,x12 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002920: 0009a203 lw x4,0(x19) +80002924: 00d20863 beq x4,x13,80002934 +80002928: 3d9022ef jal x5,80005500 +8000292c: 8000291c .word 0x8000291c +80002930: 8000d0a8 .word 0x8000d0a8 +80002934: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5bbc8872 +80002938: 00052083 lw x1,0(x10) +8000293c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xfffffffe +80002940: 00052783 lw x15,0(x10) +80002944: 00450513 addi x10,x10,4 + +80002948 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + ror x17, x1, x15 # perform operation +80002948: 60f0d8b3 ror x17,x1,x15 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000294c: 0009a203 lw x4,0(x19) +80002950: 01120863 beq x4,x17,80002960 +80002954: 3ad022ef jal x5,80005500 +80002958: 80002948 .word 0x80002948 +8000295c: 8000d106 .word 0x8000d106 +80002960: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc8872 +80002964: 00052e03 lw x28,0(x10) +80002968: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc8872 +8000296c: 00052803 lw x16,0(x10) +80002970: 00450513 addi x10,x10,4 + +80002974 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + ror x15, x28, x16 # perform operation +80002974: 610e57b3 ror x15,x28,x16 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002978: 0009a203 lw x4,0(x19) +8000297c: 00f20863 beq x4,x15,8000298c +80002980: 381022ef jal x5,80005500 +80002984: 80002974 .word 0x80002974 +80002988: 8000d164 .word 0x8000d164 +8000298c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x5bbc8872 +80002990: 00052383 lw x7,0(x10) +80002994: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xaaaaaaaa +80002998: 00052c83 lw x25,0(x10) +8000299c: 00450513 addi x10,x10,4 + +800029a0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + ror x8, x7, x25 # perform operation +800029a0: 6193d433 ror x8,x7,x25 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a4: 0009a203 lw x4,0(x19) +800029a8: 00820863 beq x4,x8,800029b8 +800029ac: 355022ef jal x5,80005500 +800029b0: 800029a0 .word 0x800029a0 +800029b4: 8000d1c2 .word 0x8000d1c2 +800029b8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5bbc8872 +800029bc: 00052683 lw x13,0(x10) +800029c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x55555555 +800029c4: 00052883 lw x17,0(x10) +800029c8: 00450513 addi x10,x10,4 + +800029cc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + ror x3, x13, x17 # perform operation +800029cc: 6116d1b3 ror x3,x13,x17 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d0: 0009a203 lw x4,0(x19) +800029d4: 00320863 beq x4,x3,800029e4 +800029d8: 329022ef jal x5,80005500 +800029dc: 800029cc .word 0x800029cc +800029e0: 8000d220 .word 0x8000d220 +800029e4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xaaaaaaaa +800029e8: 00052303 lw x6,0(x10) +800029ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000 +800029f0: 00052703 lw x14,0(x10) +800029f4: 00450513 addi x10,x10,4 + +800029f8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + ror x18, x6, x14 # perform operation +800029f8: 60e35933 ror x18,x6,x14 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029fc: 0009a203 lw x4,0(x19) +80002a00: 01220863 beq x4,x18,80002a10 +80002a04: 2fd022ef jal x5,80005500 +80002a08: 800029f8 .word 0x800029f8 +80002a0c: 8000d27e .word 0x8000d27e +80002a10: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaa +80002a14: 00052f83 lw x31,0(x10) +80002a18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000001 +80002a1c: 00052c03 lw x24,0(x10) +80002a20: 00450513 addi x10,x10,4 + +80002a24 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + ror x8, x31, x24 # perform operation +80002a24: 618fd433 ror x8,x31,x24 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a28: 0009a203 lw x4,0(x19) +80002a2c: 00820863 beq x4,x8,80002a3c +80002a30: 2d1022ef jal x5,80005500 +80002a34: 80002a24 .word 0x80002a24 +80002a38: 8000d2d5 .word 0x8000d2d5 +80002a3c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xaaaaaaaa +80002a40: 00052b03 lw x22,0(x10) +80002a44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000002 +80002a48: 00052403 lw x8,0(x10) +80002a4c: 00450513 addi x10,x10,4 + +80002a50 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + ror x20, x22, x8 # perform operation +80002a50: 608b5a33 ror x20,x22,x8 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a54: 0009a203 lw x4,0(x19) +80002a58: 01420863 beq x4,x20,80002a68 +80002a5c: 2a5022ef jal x5,80005500 +80002a60: 80002a50 .word 0x80002a50 +80002a64: 8000d32c .word 0x8000d32c +80002a68: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaa +80002a6c: 00052783 lw x15,0(x10) +80002a70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x80000000 +80002a74: 00052e83 lw x29,0(x10) +80002a78: 00450513 addi x10,x10,4 + +80002a7c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + ror x7, x15, x29 # perform operation +80002a7c: 61d7d3b3 ror x7,x15,x29 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a80: 0009a203 lw x4,0(x19) +80002a84: 00720863 beq x4,x7,80002a94 +80002a88: 279022ef jal x5,80005500 +80002a8c: 80002a7c .word 0x80002a7c +80002a90: 8000d383 .word 0x8000d383 +80002a94: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xaaaaaaaa +80002a98: 00052d83 lw x27,0(x10) +80002a9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x80000001 +80002aa0: 00052603 lw x12,0(x10) +80002aa4: 00450513 addi x10,x10,4 + +80002aa8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + ror x25, x27, x12 # perform operation +80002aa8: 60cddcb3 ror x25,x27,x12 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aac: 0009a203 lw x4,0(x19) +80002ab0: 01920863 beq x4,x25,80002ac0 +80002ab4: 24d022ef jal x5,80005500 +80002ab8: 80002aa8 .word 0x80002aa8 +80002abc: 8000d3e1 .word 0x8000d3e1 +80002ac0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xaaaaaaaa +80002ac4: 00052b03 lw x22,0(x10) +80002ac8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7fffffff +80002acc: 00052e03 lw x28,0(x10) +80002ad0: 00450513 addi x10,x10,4 + +80002ad4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + ror x15, x22, x28 # perform operation +80002ad4: 61cb57b3 ror x15,x22,x28 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad8: 0009a203 lw x4,0(x19) +80002adc: 00f20863 beq x4,x15,80002aec +80002ae0: 221022ef jal x5,80005500 +80002ae4: 80002ad4 .word 0x80002ad4 +80002ae8: 8000d43f .word 0x8000d43f +80002aec: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xaaaaaaaa +80002af0: 00052183 lw x3,0(x10) +80002af4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7ffffffe +80002af8: 00052f83 lw x31,0(x10) +80002afc: 00450513 addi x10,x10,4 + +80002b00 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + ror x21, x3, x31 # perform operation +80002b00: 61f1dab3 ror x21,x3,x31 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b04: 0009a203 lw x4,0(x19) +80002b08: 01520863 beq x4,x21,80002b18 +80002b0c: 1f5022ef jal x5,80005500 +80002b10: 80002b00 .word 0x80002b00 +80002b14: 8000d49d .word 0x8000d49d +80002b18: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xaaaaaaaa +80002b1c: 00052c03 lw x24,0(x10) +80002b20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xffffffff +80002b24: 00052083 lw x1,0(x10) +80002b28: 00450513 addi x10,x10,4 + +80002b2c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + ror x17, x24, x1 # perform operation +80002b2c: 601c58b3 ror x17,x24,x1 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b30: 0009a203 lw x4,0(x19) +80002b34: 01120863 beq x4,x17,80002b44 +80002b38: 1c9022ef jal x5,80005500 +80002b3c: 80002b2c .word 0x80002b2c +80002b40: 8000d4fb .word 0x8000d4fb +80002b44: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaa +80002b48: 00052e03 lw x28,0(x10) +80002b4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xfffffffe +80002b50: 00052783 lw x15,0(x10) +80002b54: 00450513 addi x10,x10,4 + +80002b58 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + ror x25, x28, x15 # perform operation +80002b58: 60fe5cb3 ror x25,x28,x15 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b5c: 0009a203 lw x4,0(x19) +80002b60: 01920863 beq x4,x25,80002b70 +80002b64: 19d022ef jal x5,80005500 +80002b68: 80002b58 .word 0x80002b58 +80002b6c: 8000d559 .word 0x8000d559 +80002b70: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xaaaaaaaa +80002b74: 00052403 lw x8,0(x10) +80002b78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc8872 +80002b7c: 00052c03 lw x24,0(x10) +80002b80: 00450513 addi x10,x10,4 + +80002b84 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + ror x6, x8, x24 # perform operation +80002b84: 61845333 ror x6,x8,x24 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b88: 0009a203 lw x4,0(x19) +80002b8c: 00620863 beq x4,x6,80002b9c +80002b90: 171022ef jal x5,80005500 +80002b94: 80002b84 .word 0x80002b84 +80002b98: 8000d5b7 .word 0x8000d5b7 +80002b9c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaaaaaaaa +80002ba0: 00052a83 lw x21,0(x10) +80002ba4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaaaaaaaa +80002ba8: 00052383 lw x7,0(x10) +80002bac: 00450513 addi x10,x10,4 + +80002bb0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + ror x24, x21, x7 # perform operation +80002bb0: 607adc33 ror x24,x21,x7 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb4: 0009a203 lw x4,0(x19) +80002bb8: 01820863 beq x4,x24,80002bc8 +80002bbc: 145022ef jal x5,80005500 +80002bc0: 80002bb0 .word 0x80002bb0 +80002bc4: 8000d615 .word 0x8000d615 +80002bc8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaa +80002bcc: 00052f83 lw x31,0(x10) +80002bd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x55555555 +80002bd4: 00052183 lw x3,0(x10) +80002bd8: 00450513 addi x10,x10,4 + +80002bdc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + ror x17, x31, x3 # perform operation +80002bdc: 603fd8b3 ror x17,x31,x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be0: 0009a203 lw x4,0(x19) +80002be4: 01120863 beq x4,x17,80002bf4 +80002be8: 119022ef jal x5,80005500 +80002bec: 80002bdc .word 0x80002bdc +80002bf0: 8000d673 .word 0x8000d673 +80002bf4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x55555555 +80002bf8: 00052d83 lw x27,0(x10) +80002bfc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000 +80002c00: 00052483 lw x9,0(x10) +80002c04: 00450513 addi x10,x10,4 + +80002c08 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + ror x31, x27, x9 # perform operation +80002c08: 609ddfb3 ror x31,x27,x9 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c0c: 0009a203 lw x4,0(x19) +80002c10: 01f20863 beq x4,x31,80002c20 +80002c14: 0ed022ef jal x5,80005500 +80002c18: 80002c08 .word 0x80002c08 +80002c1c: 8000d6d1 .word 0x8000d6d1 +80002c20: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x55555555 +80002c24: 00052e03 lw x28,0(x10) +80002c28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000001 +80002c2c: 00052a83 lw x21,0(x10) +80002c30: 00450513 addi x10,x10,4 + +80002c34 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + ror x29, x28, x21 # perform operation +80002c34: 615e5eb3 ror x29,x28,x21 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c38: 0009a203 lw x4,0(x19) +80002c3c: 01d20863 beq x4,x29,80002c4c +80002c40: 0c1022ef jal x5,80005500 +80002c44: 80002c34 .word 0x80002c34 +80002c48: 8000d728 .word 0x8000d728 +80002c4c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x55555555 +80002c50: 00052783 lw x15,0(x10) +80002c54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000002 +80002c58: 00052b83 lw x23,0(x10) +80002c5c: 00450513 addi x10,x10,4 + +80002c60 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + ror x27, x15, x23 # perform operation +80002c60: 6177ddb3 ror x27,x15,x23 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c64: 0009a203 lw x4,0(x19) +80002c68: 01b20863 beq x4,x27,80002c78 +80002c6c: 095022ef jal x5,80005500 +80002c70: 80002c60 .word 0x80002c60 +80002c74: 8000d77f .word 0x8000d77f +80002c78: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x55555555 +80002c7c: 00052b83 lw x23,0(x10) +80002c80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x80000000 +80002c84: 00052183 lw x3,0(x10) +80002c88: 00450513 addi x10,x10,4 + +80002c8c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + ror x13, x23, x3 # perform operation +80002c8c: 603bd6b3 ror x13,x23,x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c90: 0009a203 lw x4,0(x19) +80002c94: 00d20863 beq x4,x13,80002ca4 +80002c98: 069022ef jal x5,80005500 +80002c9c: 80002c8c .word 0x80002c8c +80002ca0: 8000d7d6 .word 0x8000d7d6 +80002ca4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x55555555 +80002ca8: 00052c03 lw x24,0(x10) +80002cac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x80000001 +80002cb0: 00052f83 lw x31,0(x10) +80002cb4: 00450513 addi x10,x10,4 + +80002cb8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + ror x9, x24, x31 # perform operation +80002cb8: 61fc54b3 ror x9,x24,x31 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cbc: 0009a203 lw x4,0(x19) +80002cc0: 00920863 beq x4,x9,80002cd0 +80002cc4: 03d022ef jal x5,80005500 +80002cc8: 80002cb8 .word 0x80002cb8 +80002ccc: 8000d834 .word 0x8000d834 +80002cd0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x55555555 +80002cd4: 00052a03 lw x20,0(x10) +80002cd8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7fffffff +80002cdc: 00052a83 lw x21,0(x10) +80002ce0: 00450513 addi x10,x10,4 + +80002ce4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + ror x11, x20, x21 # perform operation +80002ce4: 615a55b3 ror x11,x20,x21 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce8: 0009a203 lw x4,0(x19) +80002cec: 00b20863 beq x4,x11,80002cfc +80002cf0: 011022ef jal x5,80005500 +80002cf4: 80002ce4 .word 0x80002ce4 +80002cf8: 8000d892 .word 0x8000d892 +80002cfc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x55555555 +80002d00: 00052103 lw x2,0(x10) +80002d04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7ffffffe +80002d08: 00052d03 lw x26,0(x10) +80002d0c: 00450513 addi x10,x10,4 + +80002d10 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + ror x14, x2, x26 # perform operation +80002d10: 61a15733 ror x14,x2,x26 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d14: 0009a203 lw x4,0(x19) +80002d18: 00e20863 beq x4,x14,80002d28 +80002d1c: 7e4022ef jal x5,80005500 +80002d20: 80002d10 .word 0x80002d10 +80002d24: 8000d8f0 .word 0x8000d8f0 +80002d28: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x55555555 +80002d2c: 00052803 lw x16,0(x10) +80002d30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xffffffff +80002d34: 00052f83 lw x31,0(x10) +80002d38: 00450513 addi x10,x10,4 + +80002d3c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + ror x8, x16, x31 # perform operation +80002d3c: 61f85433 ror x8,x16,x31 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d40: 0009a203 lw x4,0(x19) +80002d44: 00820863 beq x4,x8,80002d54 +80002d48: 7b8022ef jal x5,80005500 +80002d4c: 80002d3c .word 0x80002d3c +80002d50: 8000d94e .word 0x8000d94e +80002d54: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x55555555 +80002d58: 00052d83 lw x27,0(x10) +80002d5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xfffffffe +80002d60: 00052583 lw x11,0(x10) +80002d64: 00450513 addi x10,x10,4 + +80002d68 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + ror x7, x27, x11 # perform operation +80002d68: 60bdd3b3 ror x7,x27,x11 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d6c: 0009a203 lw x4,0(x19) +80002d70: 00720863 beq x4,x7,80002d80 +80002d74: 78c022ef jal x5,80005500 +80002d78: 80002d68 .word 0x80002d68 +80002d7c: 8000d9ac .word 0x8000d9ac +80002d80: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x55555555 +80002d84: 00052c83 lw x25,0(x10) +80002d88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5bbc8872 +80002d8c: 00052f83 lw x31,0(x10) +80002d90: 00450513 addi x10,x10,4 + +80002d94 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + ror x15, x25, x31 # perform operation +80002d94: 61fcd7b3 ror x15,x25,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d98: 0009a203 lw x4,0(x19) +80002d9c: 00f20863 beq x4,x15,80002dac +80002da0: 760022ef jal x5,80005500 +80002da4: 80002d94 .word 0x80002d94 +80002da8: 8000da0a .word 0x8000da0a +80002dac: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x55555555 +80002db0: 00052b03 lw x22,0(x10) +80002db4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xaaaaaaaa +80002db8: 00052f03 lw x30,0(x10) +80002dbc: 00450513 addi x10,x10,4 + +80002dc0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + ror x29, x22, x30 # perform operation +80002dc0: 61eb5eb3 ror x29,x22,x30 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc4: 0009a203 lw x4,0(x19) +80002dc8: 01d20863 beq x4,x29,80002dd8 +80002dcc: 734022ef jal x5,80005500 +80002dd0: 80002dc0 .word 0x80002dc0 +80002dd4: 8000da68 .word 0x8000da68 +80002dd8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x55555555 +80002ddc: 00052f03 lw x30,0(x10) +80002de0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x55555555 +80002de4: 00052d03 lw x26,0(x10) +80002de8: 00450513 addi x10,x10,4 + +80002dec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + ror x13, x30, x26 # perform operation +80002dec: 61af56b3 ror x13,x30,x26 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df0: 0009a203 lw x4,0(x19) +80002df4: 00d20863 beq x4,x13,80002e04 +80002df8: 708022ef jal x5,80005500 +80002dfc: 80002dec .word 0x80002dec +80002e00: 8000dac6 .word 0x8000dac6 +80002e04: 00498993 addi x19,x19,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x085af8bd +80002e08: 00052003 lw x0,0(x10) +80002e0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x108473a3 +80002e10: 00052003 lw x0,0(x10) +80002e14: 00450513 addi x10,x10,4 + +80002e18 : +Zbkb_ror_cg_cmp_rs1_rs2_b0: + ror x13, x0, x0 # perform operation +80002e18: 600056b3 ror x13,x0,x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cmp_rs1_rs2_b0, Zbkb_ror_cg_cmp_rs1_rs2_b0_str) +80002e1c: 0009a203 lw x4,0(x19) +80002e20: 00d20863 beq x4,x13,80002e30 +80002e24: 6dc022ef jal x5,80005500 +80002e28: 80002e18 .word 0x80002e18 +80002e2c: 8000db24 .word 0x8000db24 +80002e30: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xc82d9ca7 +80002e34: 00052083 lw x1,0(x10) +80002e38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7fabd608 +80002e3c: 00052083 lw x1,0(x10) +80002e40: 00450513 addi x10,x10,4 + +80002e44 : +Zbkb_ror_cg_cmp_rs1_rs2_b1: + ror x8, x1, x1 # perform operation +80002e44: 6010d433 ror x8,x1,x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cmp_rs1_rs2_b1, Zbkb_ror_cg_cmp_rs1_rs2_b1_str) +80002e48: 0009a203 lw x4,0(x19) +80002e4c: 00820863 beq x4,x8,80002e5c +80002e50: 6b0022ef jal x5,80005500 +80002e54: 80002e44 .word 0x80002e44 +80002e58: 8000db5b .word 0x8000db5b +80002e5c: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x4520b937 +80002e60: 00052103 lw x2,0(x10) +80002e64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x9d211a15 +80002e68: 00052103 lw x2,0(x10) +80002e6c: 00450513 addi x10,x10,4 + +80002e70 : +Zbkb_ror_cg_cmp_rs1_rs2_b2: + ror x1, x2, x2 # perform operation +80002e70: 602150b3 ror x1,x2,x2 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_ror_cg_cmp_rs1_rs2_b2, Zbkb_ror_cg_cmp_rs1_rs2_b2_str) +80002e74: 0009a203 lw x4,0(x19) +80002e78: 00120863 beq x4,x1,80002e88 +80002e7c: 684022ef jal x5,80005500 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 8000db92 .word 0x8000db92 +80002e88: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x17f919e4 +80002e8c: 00052183 lw x3,0(x10) +80002e90: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xd2c681bb +80002e94: 00052183 lw x3,0(x10) +80002e98: 00450513 addi x10,x10,4 + +80002e9c : +Zbkb_ror_cg_cmp_rs1_rs2_b3: + ror x23, x3, x3 # perform operation +80002e9c: 6031dbb3 ror x23,x3,x3 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkb_ror_cg_cmp_rs1_rs2_b3, Zbkb_ror_cg_cmp_rs1_rs2_b3_str) +80002ea0: 0009a203 lw x4,0(x19) +80002ea4: 01720863 beq x4,x23,80002eb4 +80002ea8: 658022ef jal x5,80005500 +80002eac: 80002e9c .word 0x80002e9c +80002eb0: 8000dbc9 .word 0x8000dbc9 +80002eb4: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002eb8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002ebc: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xdc36f8a1 +80002ec0: 00052203 lw x4,0(x10) +80002ec4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xb7ad310b +80002ec8: 00052203 lw x4,0(x10) +80002ecc: 00450513 addi x10,x10,4 + +80002ed0 : +Zbkb_ror_cg_cmp_rs1_rs2_b4: + ror x20, x4, x4 # perform operation +80002ed0: 60425a33 ror x20,x4,x4 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkb_ror_cg_cmp_rs1_rs2_b4, Zbkb_ror_cg_cmp_rs1_rs2_b4_str) +80002ed4: 0009a383 lw x7,0(x19) +80002ed8: 01438863 beq x7,x20,80002ee8 +80002edc: 63c0246f jal x8,80005518 +80002ee0: 80002ed0 .word 0x80002ed0 +80002ee4: 8000dc00 .word 0x8000dc00 +80002ee8: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x1318b651 +80002eec: 00052283 lw x5,0(x10) +80002ef0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x54d95918 +80002ef4: 00052283 lw x5,0(x10) +80002ef8: 00450513 addi x10,x10,4 + +80002efc : +Zbkb_ror_cg_cmp_rs1_rs2_b5: + ror x30, x5, x5 # perform operation +80002efc: 6052df33 ror x30,x5,x5 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkb_ror_cg_cmp_rs1_rs2_b5, Zbkb_ror_cg_cmp_rs1_rs2_b5_str) +80002f00: 0009a383 lw x7,0(x19) +80002f04: 01e38863 beq x7,x30,80002f14 +80002f08: 6100246f jal x8,80005518 +80002f0c: 80002efc .word 0x80002efc +80002f10: 8000dc37 .word 0x8000dc37 +80002f14: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xb4e08a93 +80002f18: 00052303 lw x6,0(x10) +80002f1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xd5e19922 +80002f20: 00052303 lw x6,0(x10) +80002f24: 00450513 addi x10,x10,4 + +80002f28 : +Zbkb_ror_cg_cmp_rs1_rs2_b6: + ror x28, x6, x6 # perform operation +80002f28: 60635e33 ror x28,x6,x6 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkb_ror_cg_cmp_rs1_rs2_b6, Zbkb_ror_cg_cmp_rs1_rs2_b6_str) +80002f2c: 0009a383 lw x7,0(x19) +80002f30: 01c38863 beq x7,x28,80002f40 +80002f34: 5e40246f jal x8,80005518 +80002f38: 80002f28 .word 0x80002f28 +80002f3c: 8000dc6e .word 0x8000dc6e +80002f40: 00498993 addi x19,x19,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f44: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f48: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x5830574c +80002f4c: 00052383 lw x7,0(x10) +80002f50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xab2301b5 +80002f54: 00052383 lw x7,0(x10) +80002f58: 00450513 addi x10,x10,4 + +80002f5c : +Zbkb_ror_cg_cmp_rs1_rs2_b7: + ror x26, x7, x7 # perform operation +80002f5c: 6073dd33 ror x26,x7,x7 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cmp_rs1_rs2_b7, Zbkb_ror_cg_cmp_rs1_rs2_b7_str) +80002f60: 0009a203 lw x4,0(x19) +80002f64: 01a20863 beq x4,x26,80002f74 +80002f68: 598022ef jal x5,80005500 +80002f6c: 80002f5c .word 0x80002f5c +80002f70: 8000dca5 .word 0x8000dca5 +80002f74: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xf3fbea17 +80002f78: 00052403 lw x8,0(x10) +80002f7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x2e3aff8e +80002f80: 00052403 lw x8,0(x10) +80002f84: 00450513 addi x10,x10,4 + +80002f88 : +Zbkb_ror_cg_cmp_rs1_rs2_b8: + ror x14, x8, x8 # perform operation +80002f88: 60845733 ror x14,x8,x8 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_ror_cg_cmp_rs1_rs2_b8, Zbkb_ror_cg_cmp_rs1_rs2_b8_str) +80002f8c: 0009a203 lw x4,0(x19) +80002f90: 00e20863 beq x4,x14,80002fa0 +80002f94: 56c022ef jal x5,80005500 +80002f98: 80002f88 .word 0x80002f88 +80002f9c: 8000dcdc .word 0x8000dcdc +80002fa0: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xe71e1cdb +80002fa4: 00052483 lw x9,0(x10) +80002fa8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xaa97713f +80002fac: 00052483 lw x9,0(x10) +80002fb0: 00450513 addi x10,x10,4 + +80002fb4 : +Zbkb_ror_cg_cmp_rs1_rs2_b9: + ror x18, x9, x9 # perform operation +80002fb4: 6094d933 ror x18,x9,x9 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cmp_rs1_rs2_b9, Zbkb_ror_cg_cmp_rs1_rs2_b9_str) +80002fb8: 0009a203 lw x4,0(x19) +80002fbc: 01220863 beq x4,x18,80002fcc +80002fc0: 540022ef jal x5,80005500 +80002fc4: 80002fb4 .word 0x80002fb4 +80002fc8: 8000dd13 .word 0x8000dd13 +80002fcc: 00498993 addi x19,x19,4 + + mv x22, x10 # switch data pointer register to avoid conflict with test +80002fd0: 00050b13 addi x22,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xa9c1b12b +80002fd4: 000b2503 lw x10,0(x22) +80002fd8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xfefcc93a +80002fdc: 000b2503 lw x10,0(x22) +80002fe0: 004b0b13 addi x22,x22,4 + +80002fe4 : +Zbkb_ror_cg_cmp_rs1_rs2_b10: + ror x3, x10, x10 # perform operation +80002fe4: 60a551b3 ror x3,x10,x10 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_ror_cg_cmp_rs1_rs2_b10, Zbkb_ror_cg_cmp_rs1_rs2_b10_str) +80002fe8: 0009a203 lw x4,0(x19) +80002fec: 00320863 beq x4,x3,80002ffc +80002ff0: 510022ef jal x5,80005500 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 8000dd4a .word 0x8000dd4a +80002ffc: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xc26cab75 +80003000: 000b2583 lw x11,0(x22) +80003004: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x27abdd05 +80003008: 000b2583 lw x11,0(x22) +8000300c: 004b0b13 addi x22,x22,4 + +80003010 : +Zbkb_ror_cg_cmp_rs1_rs2_b11: + ror x28, x11, x11 # perform operation +80003010: 60b5de33 ror x28,x11,x11 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_ror_cg_cmp_rs1_rs2_b11, Zbkb_ror_cg_cmp_rs1_rs2_b11_str) +80003014: 0009a203 lw x4,0(x19) +80003018: 01c20863 beq x4,x28,80003028 +8000301c: 4e4022ef jal x5,80005500 +80003020: 80003010 .word 0x80003010 +80003024: 8000dd82 .word 0x8000dd82 +80003028: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xea234efb +8000302c: 000b2603 lw x12,0(x22) +80003030: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xeadf35a8 +80003034: 000b2603 lw x12,0(x22) +80003038: 004b0b13 addi x22,x22,4 + +8000303c : +Zbkb_ror_cg_cmp_rs1_rs2_b12: + ror x23, x12, x12 # perform operation +8000303c: 60c65bb3 ror x23,x12,x12 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkb_ror_cg_cmp_rs1_rs2_b12, Zbkb_ror_cg_cmp_rs1_rs2_b12_str) +80003040: 0009a203 lw x4,0(x19) +80003044: 01720863 beq x4,x23,80003054 +80003048: 4b8022ef jal x5,80005500 +8000304c: 8000303c .word 0x8000303c +80003050: 8000ddba .word 0x8000ddba +80003054: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x9d8885f9 +80003058: 000b2683 lw x13,0(x22) +8000305c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x02bd8628 +80003060: 000b2683 lw x13,0(x22) +80003064: 004b0b13 addi x22,x22,4 + +80003068 : +Zbkb_ror_cg_cmp_rs1_rs2_b13: + ror x17, x13, x13 # perform operation +80003068: 60d6d8b3 ror x17,x13,x13 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_ror_cg_cmp_rs1_rs2_b13, Zbkb_ror_cg_cmp_rs1_rs2_b13_str) +8000306c: 0009a203 lw x4,0(x19) +80003070: 01120863 beq x4,x17,80003080 +80003074: 48c022ef jal x5,80005500 +80003078: 80003068 .word 0x80003068 +8000307c: 8000ddf2 .word 0x8000ddf2 +80003080: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x61a6e33f +80003084: 000b2703 lw x14,0(x22) +80003088: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x80fa70ef +8000308c: 000b2703 lw x14,0(x22) +80003090: 004b0b13 addi x22,x22,4 + +80003094 : +Zbkb_ror_cg_cmp_rs1_rs2_b14: + ror x0, x14, x14 # perform operation +80003094: 60e75033 ror x0,x14,x14 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_ror_cg_cmp_rs1_rs2_b14, Zbkb_ror_cg_cmp_rs1_rs2_b14_str) +80003098: 0009a203 lw x4,0(x19) +8000309c: 00020863 beq x4,x0,800030ac +800030a0: 460022ef jal x5,80005500 +800030a4: 80003094 .word 0x80003094 +800030a8: 8000de2a .word 0x8000de2a +800030ac: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xb1b546e0 +800030b0: 000b2783 lw x15,0(x22) +800030b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x67eda80c +800030b8: 000b2783 lw x15,0(x22) +800030bc: 004b0b13 addi x22,x22,4 + +800030c0 : +Zbkb_ror_cg_cmp_rs1_rs2_b15: + ror x30, x15, x15 # perform operation +800030c0: 60f7df33 ror x30,x15,x15 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_ror_cg_cmp_rs1_rs2_b15, Zbkb_ror_cg_cmp_rs1_rs2_b15_str) +800030c4: 0009a203 lw x4,0(x19) +800030c8: 01e20863 beq x4,x30,800030d8 +800030cc: 434022ef jal x5,80005500 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 8000de62 .word 0x8000de62 +800030d8: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xea63be03 +800030dc: 000b2803 lw x16,0(x22) +800030e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xaffe0cd2 +800030e4: 000b2803 lw x16,0(x22) +800030e8: 004b0b13 addi x22,x22,4 + +800030ec : +Zbkb_ror_cg_cmp_rs1_rs2_b16: + ror x12, x16, x16 # perform operation +800030ec: 61085633 ror x12,x16,x16 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkb_ror_cg_cmp_rs1_rs2_b16, Zbkb_ror_cg_cmp_rs1_rs2_b16_str) +800030f0: 0009a203 lw x4,0(x19) +800030f4: 00c20863 beq x4,x12,80003104 +800030f8: 408022ef jal x5,80005500 +800030fc: 800030ec .word 0x800030ec +80003100: 8000de9a .word 0x8000de9a +80003104: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x5ab2bbec +80003108: 000b2883 lw x17,0(x22) +8000310c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x10f9c00a +80003110: 000b2883 lw x17,0(x22) +80003114: 004b0b13 addi x22,x22,4 + +80003118 : +Zbkb_ror_cg_cmp_rs1_rs2_b17: + ror x9, x17, x17 # perform operation +80003118: 6118d4b3 ror x9,x17,x17 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cmp_rs1_rs2_b17, Zbkb_ror_cg_cmp_rs1_rs2_b17_str) +8000311c: 0009a203 lw x4,0(x19) +80003120: 00920863 beq x4,x9,80003130 +80003124: 3dc022ef jal x5,80005500 +80003128: 80003118 .word 0x80003118 +8000312c: 8000ded2 .word 0x8000ded2 +80003130: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xa1203f50 +80003134: 000b2903 lw x18,0(x22) +80003138: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x566d50f1 +8000313c: 000b2903 lw x18,0(x22) +80003140: 004b0b13 addi x22,x22,4 + +80003144 : +Zbkb_ror_cg_cmp_rs1_rs2_b18: + ror x0, x18, x18 # perform operation +80003144: 61295033 ror x0,x18,x18 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_ror_cg_cmp_rs1_rs2_b18, Zbkb_ror_cg_cmp_rs1_rs2_b18_str) +80003148: 0009a203 lw x4,0(x19) +8000314c: 00020863 beq x4,x0,8000315c +80003150: 3b0022ef jal x5,80005500 +80003154: 80003144 .word 0x80003144 +80003158: 8000df0a .word 0x8000df0a +8000315c: 00498993 addi x19,x19,4 + + mv x15, x19 # switch signature pointer register to avoid conflict with test +80003160: 00098793 addi x15,x19,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x4d7a621c +80003164: 000b2983 lw x19,0(x22) +80003168: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xcc113372 +8000316c: 000b2983 lw x19,0(x22) +80003170: 004b0b13 addi x22,x22,4 + +80003174 : +Zbkb_ror_cg_cmp_rs1_rs2_b19: + ror x17, x19, x19 # perform operation +80003174: 6139d8b3 ror x17,x19,x19 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_ror_cg_cmp_rs1_rs2_b19, Zbkb_ror_cg_cmp_rs1_rs2_b19_str) +80003178: 0007a203 lw x4,0(x15) +8000317c: 01120863 beq x4,x17,8000318c +80003180: 380022ef jal x5,80005500 +80003184: 80003174 .word 0x80003174 +80003188: 8000df42 .word 0x8000df42 +8000318c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xbb59cba6 +80003190: 000b2a03 lw x20,0(x22) +80003194: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x0fe8d652 +80003198: 000b2a03 lw x20,0(x22) +8000319c: 004b0b13 addi x22,x22,4 + +800031a0 : +Zbkb_ror_cg_cmp_rs1_rs2_b20: + ror x6, x20, x20 # perform operation +800031a0: 614a5333 ror x6,x20,x20 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_ror_cg_cmp_rs1_rs2_b20, Zbkb_ror_cg_cmp_rs1_rs2_b20_str) +800031a4: 0007a203 lw x4,0(x15) +800031a8: 00620863 beq x4,x6,800031b8 +800031ac: 354022ef jal x5,80005500 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 8000df7a .word 0x8000df7a +800031b8: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xcd29dca6 +800031bc: 000b2a83 lw x21,0(x22) +800031c0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x7a91620e +800031c4: 000b2a83 lw x21,0(x22) +800031c8: 004b0b13 addi x22,x22,4 + +800031cc : +Zbkb_ror_cg_cmp_rs1_rs2_b21: + ror x20, x21, x21 # perform operation +800031cc: 615ada33 ror x20,x21,x21 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zbkb_ror_cg_cmp_rs1_rs2_b21, Zbkb_ror_cg_cmp_rs1_rs2_b21_str) +800031d0: 0007a203 lw x4,0(x15) +800031d4: 01420863 beq x4,x20,800031e4 +800031d8: 328022ef jal x5,80005500 +800031dc: 800031cc .word 0x800031cc +800031e0: 8000dfb2 .word 0x8000dfb2 +800031e4: 00478793 addi x15,x15,4 + + mv x16, x22 # switch data pointer register to avoid conflict with test +800031e8: 000b0813 addi x16,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x2f79d743 +800031ec: 00082b03 lw x22,0(x16) +800031f0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x75c64f93 +800031f4: 00082b03 lw x22,0(x16) +800031f8: 00480813 addi x16,x16,4 + +800031fc : +Zbkb_ror_cg_cmp_rs1_rs2_b22: + ror x8, x22, x22 # perform operation +800031fc: 616b5433 ror x8,x22,x22 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_ror_cg_cmp_rs1_rs2_b22, Zbkb_ror_cg_cmp_rs1_rs2_b22_str) +80003200: 0007a203 lw x4,0(x15) +80003204: 00820863 beq x4,x8,80003214 +80003208: 2f8022ef jal x5,80005500 +8000320c: 800031fc .word 0x800031fc +80003210: 8000dfea .word 0x8000dfea +80003214: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x4075bf25 +80003218: 00082b83 lw x23,0(x16) +8000321c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xed7567e4 +80003220: 00082b83 lw x23,0(x16) +80003224: 00480813 addi x16,x16,4 + +80003228 : +Zbkb_ror_cg_cmp_rs1_rs2_b23: + ror x18, x23, x23 # perform operation +80003228: 617bd933 ror x18,x23,x23 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zbkb_ror_cg_cmp_rs1_rs2_b23, Zbkb_ror_cg_cmp_rs1_rs2_b23_str) +8000322c: 0007a203 lw x4,0(x15) +80003230: 01220863 beq x4,x18,80003240 +80003234: 2cc022ef jal x5,80005500 +80003238: 80003228 .word 0x80003228 +8000323c: 8000e022 .word 0x8000e022 +80003240: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x0328fb95 +80003244: 00082c03 lw x24,0(x16) +80003248: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x52b410e3 +8000324c: 00082c03 lw x24,0(x16) +80003250: 00480813 addi x16,x16,4 + +80003254 : +Zbkb_ror_cg_cmp_rs1_rs2_b24: + ror x23, x24, x24 # perform operation +80003254: 618c5bb3 ror x23,x24,x24 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_ror_cg_cmp_rs1_rs2_b24, Zbkb_ror_cg_cmp_rs1_rs2_b24_str) +80003258: 0007a203 lw x4,0(x15) +8000325c: 01720863 beq x4,x23,8000326c +80003260: 2a0022ef jal x5,80005500 +80003264: 80003254 .word 0x80003254 +80003268: 8000e05a .word 0x8000e05a +8000326c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xf7aaf854 +80003270: 00082c83 lw x25,0(x16) +80003274: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x551160a0 +80003278: 00082c83 lw x25,0(x16) +8000327c: 00480813 addi x16,x16,4 + +80003280 : +Zbkb_ror_cg_cmp_rs1_rs2_b25: + ror x24, x25, x25 # perform operation +80003280: 619cdc33 ror x24,x25,x25 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zbkb_ror_cg_cmp_rs1_rs2_b25, Zbkb_ror_cg_cmp_rs1_rs2_b25_str) +80003284: 0007a203 lw x4,0(x15) +80003288: 01820863 beq x4,x24,80003298 +8000328c: 274022ef jal x5,80005500 +80003290: 80003280 .word 0x80003280 +80003294: 8000e092 .word 0x8000e092 +80003298: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x4d8bd62f +8000329c: 00082d03 lw x26,0(x16) +800032a0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xedc4f82a +800032a4: 00082d03 lw x26,0(x16) +800032a8: 00480813 addi x16,x16,4 + +800032ac : +Zbkb_ror_cg_cmp_rs1_rs2_b26: + ror x0, x26, x26 # perform operation +800032ac: 61ad5033 ror x0,x26,x26 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_ror_cg_cmp_rs1_rs2_b26, Zbkb_ror_cg_cmp_rs1_rs2_b26_str) +800032b0: 0007a203 lw x4,0(x15) +800032b4: 00020863 beq x4,x0,800032c4 +800032b8: 248022ef jal x5,80005500 +800032bc: 800032ac .word 0x800032ac +800032c0: 8000e0ca .word 0x8000e0ca +800032c4: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x2744eb88 +800032c8: 00082d83 lw x27,0(x16) +800032cc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x6b8d5fc8 +800032d0: 00082d83 lw x27,0(x16) +800032d4: 00480813 addi x16,x16,4 + +800032d8 : +Zbkb_ror_cg_cmp_rs1_rs2_b27: + ror x26, x27, x27 # perform operation +800032d8: 61bddd33 ror x26,x27,x27 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zbkb_ror_cg_cmp_rs1_rs2_b27, Zbkb_ror_cg_cmp_rs1_rs2_b27_str) +800032dc: 0007a203 lw x4,0(x15) +800032e0: 01a20863 beq x4,x26,800032f0 +800032e4: 21c022ef jal x5,80005500 +800032e8: 800032d8 .word 0x800032d8 +800032ec: 8000e102 .word 0x8000e102 +800032f0: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x98bfa2db +800032f4: 00082e03 lw x28,0(x16) +800032f8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xcb97797a +800032fc: 00082e03 lw x28,0(x16) +80003300: 00480813 addi x16,x16,4 + +80003304 : +Zbkb_ror_cg_cmp_rs1_rs2_b28: + ror x25, x28, x28 # perform operation +80003304: 61ce5cb3 ror x25,x28,x28 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_ror_cg_cmp_rs1_rs2_b28, Zbkb_ror_cg_cmp_rs1_rs2_b28_str) +80003308: 0007a203 lw x4,0(x15) +8000330c: 01920863 beq x4,x25,8000331c +80003310: 1f0022ef jal x5,80005500 +80003314: 80003304 .word 0x80003304 +80003318: 8000e13a .word 0x8000e13a +8000331c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x67317ec1 +80003320: 00082e83 lw x29,0(x16) +80003324: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x7d5fd9a1 +80003328: 00082e83 lw x29,0(x16) +8000332c: 00480813 addi x16,x16,4 + +80003330 : +Zbkb_ror_cg_cmp_rs1_rs2_b29: + ror x18, x29, x29 # perform operation +80003330: 61ded933 ror x18,x29,x29 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zbkb_ror_cg_cmp_rs1_rs2_b29, Zbkb_ror_cg_cmp_rs1_rs2_b29_str) +80003334: 0007a203 lw x4,0(x15) +80003338: 01220863 beq x4,x18,80003348 +8000333c: 1c4022ef jal x5,80005500 +80003340: 80003330 .word 0x80003330 +80003344: 8000e172 .word 0x8000e172 +80003348: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x71400295 +8000334c: 00082f03 lw x30,0(x16) +80003350: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x93230aa9 +80003354: 00082f03 lw x30,0(x16) +80003358: 00480813 addi x16,x16,4 + +8000335c : +Zbkb_ror_cg_cmp_rs1_rs2_b30: + ror x2, x30, x30 # perform operation +8000335c: 61ef5133 ror x2,x30,x30 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_ror_cg_cmp_rs1_rs2_b30, Zbkb_ror_cg_cmp_rs1_rs2_b30_str) +80003360: 0007a203 lw x4,0(x15) +80003364: 00220863 beq x4,x2,80003374 +80003368: 198022ef jal x5,80005500 +8000336c: 8000335c .word 0x8000335c +80003370: 8000e1aa .word 0x8000e1aa +80003374: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xf355df0b +80003378: 00082f83 lw x31,0(x16) +8000337c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x536a393e +80003380: 00082f83 lw x31,0(x16) +80003384: 00480813 addi x16,x16,4 + +80003388 : +Zbkb_ror_cg_cmp_rs1_rs2_b31: + ror x21, x31, x31 # perform operation +80003388: 61ffdab3 ror x21,x31,x31 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_ror_cg_cmp_rs1_rs2_b31, Zbkb_ror_cg_cmp_rs1_rs2_b31_str) +8000338c: 0007a203 lw x4,0(x15) +80003390: 01520863 beq x4,x21,800033a0 +80003394: 16c022ef jal x5,80005500 +80003398: 80003388 .word 0x80003388 +8000339c: 8000e1e2 .word 0x8000e1e2 +800033a0: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0xc9c408f5 +800033a4: 00082003 lw x0,0(x16) +800033a8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x8370f81b +800033ac: 00082b83 lw x23,0(x16) +800033b0: 00480813 addi x16,x16,4 + +800033b4 : +Zbkb_ror_cg_cmp_rd_rs1_b0: + ror x0, x0, x23 # perform operation +800033b4: 61705033 ror x0,x0,x23 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_ror_cg_cmp_rd_rs1_b0, Zbkb_ror_cg_cmp_rd_rs1_b0_str) +800033b8: 0007a203 lw x4,0(x15) +800033bc: 00020863 beq x4,x0,800033cc +800033c0: 140022ef jal x5,80005500 +800033c4: 800033b4 .word 0x800033b4 +800033c8: 8000e21a .word 0x8000e21a +800033cc: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x1be26f98 +800033d0: 00082083 lw x1,0(x16) +800033d4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xff80b71c +800033d8: 00082983 lw x19,0(x16) +800033dc: 00480813 addi x16,x16,4 + +800033e0 : +Zbkb_ror_cg_cmp_rd_rs1_b1: + ror x1, x1, x19 # perform operation +800033e0: 6130d0b3 ror x1,x1,x19 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_ror_cg_cmp_rd_rs1_b1, Zbkb_ror_cg_cmp_rd_rs1_b1_str) +800033e4: 0007a203 lw x4,0(x15) +800033e8: 00120863 beq x4,x1,800033f8 +800033ec: 114022ef jal x5,80005500 +800033f0: 800033e0 .word 0x800033e0 +800033f4: 8000e250 .word 0x8000e250 +800033f8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xf60b5fe2 +800033fc: 00082103 lw x2,0(x16) +80003400: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xfe454d14 +80003404: 00082e03 lw x28,0(x16) +80003408: 00480813 addi x16,x16,4 + +8000340c : +Zbkb_ror_cg_cmp_rd_rs1_b2: + ror x2, x2, x28 # perform operation +8000340c: 61c15133 ror x2,x2,x28 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_ror_cg_cmp_rd_rs1_b2, Zbkb_ror_cg_cmp_rd_rs1_b2_str) +80003410: 0007a203 lw x4,0(x15) +80003414: 00220863 beq x4,x2,80003424 +80003418: 0e8022ef jal x5,80005500 +8000341c: 8000340c .word 0x8000340c +80003420: 8000e286 .word 0x8000e286 +80003424: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xd859474e +80003428: 00082183 lw x3,0(x16) +8000342c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x37d34929 +80003430: 00082f03 lw x30,0(x16) +80003434: 00480813 addi x16,x16,4 + +80003438 : +Zbkb_ror_cg_cmp_rd_rs1_b3: + ror x3, x3, x30 # perform operation +80003438: 61e1d1b3 ror x3,x3,x30 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_ror_cg_cmp_rd_rs1_b3, Zbkb_ror_cg_cmp_rd_rs1_b3_str) +8000343c: 0007a203 lw x4,0(x15) +80003440: 00320863 beq x4,x3,80003450 +80003444: 0bc022ef jal x5,80005500 +80003448: 80003438 .word 0x80003438 +8000344c: 8000e2bc .word 0x8000e2bc +80003450: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003454: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003458: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x715a9ac9 +8000345c: 00082203 lw x4,0(x16) +80003460: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xfef13db2 +80003464: 00082f03 lw x30,0(x16) +80003468: 00480813 addi x16,x16,4 + +8000346c : +Zbkb_ror_cg_cmp_rd_rs1_b4: + ror x4, x4, x30 # perform operation +8000346c: 61e25233 ror x4,x4,x30 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zbkb_ror_cg_cmp_rd_rs1_b4, Zbkb_ror_cg_cmp_rd_rs1_b4_str) +80003470: 0007a683 lw x13,0(x15) +80003474: 00468863 beq x13,x4,80003484 +80003478: 0c80276f jal x14,80005540 +8000347c: 8000346c .word 0x8000346c +80003480: 8000e2f2 .word 0x8000e2f2 +80003484: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x3c16f8bc +80003488: 00082283 lw x5,0(x16) +8000348c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x6eacb8d9 +80003490: 00082883 lw x17,0(x16) +80003494: 00480813 addi x16,x16,4 + +80003498 : +Zbkb_ror_cg_cmp_rd_rs1_b5: + ror x5, x5, x17 # perform operation +80003498: 6112d2b3 ror x5,x5,x17 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zbkb_ror_cg_cmp_rd_rs1_b5, Zbkb_ror_cg_cmp_rd_rs1_b5_str) +8000349c: 0007a683 lw x13,0(x15) +800034a0: 00568863 beq x13,x5,800034b0 +800034a4: 09c0276f jal x14,80005540 +800034a8: 80003498 .word 0x80003498 +800034ac: 8000e328 .word 0x8000e328 +800034b0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x5b8bacd7 +800034b4: 00082303 lw x6,0(x16) +800034b8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x1e7563cb +800034bc: 00082483 lw x9,0(x16) +800034c0: 00480813 addi x16,x16,4 + +800034c4 : +Zbkb_ror_cg_cmp_rd_rs1_b6: + ror x6, x6, x9 # perform operation +800034c4: 60935333 ror x6,x6,x9 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zbkb_ror_cg_cmp_rd_rs1_b6, Zbkb_ror_cg_cmp_rd_rs1_b6_str) +800034c8: 0007a683 lw x13,0(x15) +800034cc: 00668863 beq x13,x6,800034dc +800034d0: 0700276f jal x14,80005540 +800034d4: 800034c4 .word 0x800034c4 +800034d8: 8000e35e .word 0x8000e35e +800034dc: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x5bf9c002 +800034e0: 00082383 lw x7,0(x16) +800034e4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xd142e113 +800034e8: 00082003 lw x0,0(x16) +800034ec: 00480813 addi x16,x16,4 + +800034f0 : +Zbkb_ror_cg_cmp_rd_rs1_b7: + ror x7, x7, x0 # perform operation +800034f0: 6003d3b3 ror x7,x7,x0 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_ror_cg_cmp_rd_rs1_b7, Zbkb_ror_cg_cmp_rd_rs1_b7_str) +800034f4: 0007a683 lw x13,0(x15) +800034f8: 00768863 beq x13,x7,80003508 +800034fc: 0440276f jal x14,80005540 +80003500: 800034f0 .word 0x800034f0 +80003504: 8000e394 .word 0x8000e394 +80003508: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x90d0e330 +8000350c: 00082403 lw x8,0(x16) +80003510: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xf6d5e926 +80003514: 00082103 lw x2,0(x16) +80003518: 00480813 addi x16,x16,4 + +8000351c : +Zbkb_ror_cg_cmp_rd_rs1_b8: + ror x8, x8, x2 # perform operation +8000351c: 60245433 ror x8,x8,x2 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_ror_cg_cmp_rd_rs1_b8, Zbkb_ror_cg_cmp_rd_rs1_b8_str) +80003520: 0007a683 lw x13,0(x15) +80003524: 00868863 beq x13,x8,80003534 +80003528: 0180276f jal x14,80005540 +8000352c: 8000351c .word 0x8000351c +80003530: 8000e3ca .word 0x8000e3ca +80003534: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x6677f6f2 +80003538: 00082483 lw x9,0(x16) +8000353c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0xf9a78084 +80003540: 00082203 lw x4,0(x16) +80003544: 00480813 addi x16,x16,4 + +80003548 : +Zbkb_ror_cg_cmp_rd_rs1_b9: + ror x9, x9, x4 # perform operation +80003548: 6044d4b3 ror x9,x9,x4 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_ror_cg_cmp_rd_rs1_b9, Zbkb_ror_cg_cmp_rd_rs1_b9_str) +8000354c: 0007a683 lw x13,0(x15) +80003550: 00968863 beq x13,x9,80003560 +80003554: 7ed0176f jal x14,80005540 +80003558: 80003548 .word 0x80003548 +8000355c: 8000e400 .word 0x8000e400 +80003560: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x0644c0f0 +80003564: 00082503 lw x10,0(x16) +80003568: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xc361084b +8000356c: 00082003 lw x0,0(x16) +80003570: 00480813 addi x16,x16,4 + +80003574 : +Zbkb_ror_cg_cmp_rd_rs1_b10: + ror x10, x10, x0 # perform operation +80003574: 60055533 ror x10,x10,x0 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_ror_cg_cmp_rd_rs1_b10, Zbkb_ror_cg_cmp_rd_rs1_b10_str) +80003578: 0007a683 lw x13,0(x15) +8000357c: 00a68863 beq x13,x10,8000358c +80003580: 7c10176f jal x14,80005540 +80003584: 80003574 .word 0x80003574 +80003588: 8000e436 .word 0x8000e436 +8000358c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x1bd50f46 +80003590: 00082583 lw x11,0(x16) +80003594: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xce68a226 +80003598: 00082c03 lw x24,0(x16) +8000359c: 00480813 addi x16,x16,4 + +800035a0 : +Zbkb_ror_cg_cmp_rd_rs1_b11: + ror x11, x11, x24 # perform operation +800035a0: 6185d5b3 ror x11,x11,x24 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_ror_cg_cmp_rd_rs1_b11, Zbkb_ror_cg_cmp_rd_rs1_b11_str) +800035a4: 0007a683 lw x13,0(x15) +800035a8: 00b68863 beq x13,x11,800035b8 +800035ac: 7950176f jal x14,80005540 +800035b0: 800035a0 .word 0x800035a0 +800035b4: 8000e46d .word 0x8000e46d +800035b8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xfe690387 +800035bc: 00082603 lw x12,0(x16) +800035c0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x24f04196 +800035c4: 00082b03 lw x22,0(x16) +800035c8: 00480813 addi x16,x16,4 + +800035cc : +Zbkb_ror_cg_cmp_rd_rs1_b12: + ror x12, x12, x22 # perform operation +800035cc: 61665633 ror x12,x12,x22 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_ror_cg_cmp_rd_rs1_b12, Zbkb_ror_cg_cmp_rd_rs1_b12_str) +800035d0: 0007a683 lw x13,0(x15) +800035d4: 00c68863 beq x13,x12,800035e4 +800035d8: 7690176f jal x14,80005540 +800035dc: 800035cc .word 0x800035cc +800035e0: 8000e4a4 .word 0x8000e4a4 +800035e4: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035e8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035ec: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x899f6887 +800035f0: 00082683 lw x13,0(x16) +800035f4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xf802cb39 +800035f8: 00082b03 lw x22,0(x16) +800035fc: 00480813 addi x16,x16,4 + +80003600 : +Zbkb_ror_cg_cmp_rd_rs1_b13: + ror x13, x13, x22 # perform operation +80003600: 6166d6b3 ror x13,x13,x22 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_ror_cg_cmp_rd_rs1_b13, Zbkb_ror_cg_cmp_rd_rs1_b13_str) +80003604: 0007a383 lw x7,0(x15) +80003608: 00d38863 beq x7,x13,80003618 +8000360c: 70d0146f jal x8,80005518 +80003610: 80003600 .word 0x80003600 +80003614: 8000e4db .word 0x8000e4db +80003618: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xfe98f2fa +8000361c: 00082703 lw x14,0(x16) +80003620: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x55c6c8f3 +80003624: 00082303 lw x6,0(x16) +80003628: 00480813 addi x16,x16,4 + +8000362c : +Zbkb_ror_cg_cmp_rd_rs1_b14: + ror x14, x14, x6 # perform operation +8000362c: 60675733 ror x14,x14,x6 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_ror_cg_cmp_rd_rs1_b14, Zbkb_ror_cg_cmp_rd_rs1_b14_str) +80003630: 0007a383 lw x7,0(x15) +80003634: 00e38863 beq x7,x14,80003644 +80003638: 6e10146f jal x8,80005518 +8000363c: 8000362c .word 0x8000362c +80003640: 8000e512 .word 0x8000e512 +80003644: 00478793 addi x15,x15,4 + + mv x21, x15 # switch signature pointer register to avoid conflict with test +80003648: 00078a93 addi x21,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x4c36b777 +8000364c: 00082783 lw x15,0(x16) +80003650: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x2907cbc4 +80003654: 00082203 lw x4,0(x16) +80003658: 00480813 addi x16,x16,4 + +8000365c : +Zbkb_ror_cg_cmp_rd_rs1_b15: + ror x15, x15, x4 # perform operation +8000365c: 6047d7b3 ror x15,x15,x4 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zbkb_ror_cg_cmp_rd_rs1_b15, Zbkb_ror_cg_cmp_rd_rs1_b15_str) +80003660: 000aa383 lw x7,0(x21) +80003664: 00f38863 beq x7,x15,80003674 +80003668: 6b10146f jal x8,80005518 +8000366c: 8000365c .word 0x8000365c +80003670: 8000e549 .word 0x8000e549 +80003674: 004a8a93 addi x21,x21,4 + + mv x9, x16 # switch data pointer register to avoid conflict with test +80003678: 00080493 addi x9,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xeca9fecd +8000367c: 0004a803 lw x16,0(x9) +80003680: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x21fc3103 +80003684: 0004a603 lw x12,0(x9) +80003688: 00448493 addi x9,x9,4 + +8000368c : +Zbkb_ror_cg_cmp_rd_rs1_b16: + ror x16, x16, x12 # perform operation +8000368c: 60c85833 ror x16,x16,x12 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zbkb_ror_cg_cmp_rd_rs1_b16, Zbkb_ror_cg_cmp_rd_rs1_b16_str) +80003690: 000aa383 lw x7,0(x21) +80003694: 01038863 beq x7,x16,800036a4 +80003698: 6810146f jal x8,80005518 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000e580 .word 0x8000e580 +800036a4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x83918eea +800036a8: 0004a883 lw x17,0(x9) +800036ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x6c09291a +800036b0: 0004a603 lw x12,0(x9) +800036b4: 00448493 addi x9,x9,4 + +800036b8 : +Zbkb_ror_cg_cmp_rd_rs1_b17: + ror x17, x17, x12 # perform operation +800036b8: 60c8d8b3 ror x17,x17,x12 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zbkb_ror_cg_cmp_rd_rs1_b17, Zbkb_ror_cg_cmp_rd_rs1_b17_str) +800036bc: 000aa383 lw x7,0(x21) +800036c0: 01138863 beq x7,x17,800036d0 +800036c4: 6550146f jal x8,80005518 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000e5b7 .word 0x8000e5b7 +800036d0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x5a2b73a1 +800036d4: 0004a903 lw x18,0(x9) +800036d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x03b815c0 +800036dc: 0004a283 lw x5,0(x9) +800036e0: 00448493 addi x9,x9,4 + +800036e4 : +Zbkb_ror_cg_cmp_rd_rs1_b18: + ror x18, x18, x5 # perform operation +800036e4: 60595933 ror x18,x18,x5 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zbkb_ror_cg_cmp_rd_rs1_b18, Zbkb_ror_cg_cmp_rd_rs1_b18_str) +800036e8: 000aa383 lw x7,0(x21) +800036ec: 01238863 beq x7,x18,800036fc +800036f0: 6290146f jal x8,80005518 +800036f4: 800036e4 .word 0x800036e4 +800036f8: 8000e5ee .word 0x8000e5ee +800036fc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0b30f66f +80003700: 0004a983 lw x19,0(x9) +80003704: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xa490b16a +80003708: 0004a083 lw x1,0(x9) +8000370c: 00448493 addi x9,x9,4 + +80003710 : +Zbkb_ror_cg_cmp_rd_rs1_b19: + ror x19, x19, x1 # perform operation +80003710: 6019d9b3 ror x19,x19,x1 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkb_ror_cg_cmp_rd_rs1_b19, Zbkb_ror_cg_cmp_rd_rs1_b19_str) +80003714: 000aa383 lw x7,0(x21) +80003718: 01338863 beq x7,x19,80003728 +8000371c: 5fd0146f jal x8,80005518 +80003720: 80003710 .word 0x80003710 +80003724: 8000e625 .word 0x8000e625 +80003728: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x31f1a49c +8000372c: 0004aa03 lw x20,0(x9) +80003730: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xbc04134f +80003734: 0004a783 lw x15,0(x9) +80003738: 00448493 addi x9,x9,4 + +8000373c : +Zbkb_ror_cg_cmp_rd_rs1_b20: + ror x20, x20, x15 # perform operation +8000373c: 60fa5a33 ror x20,x20,x15 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zbkb_ror_cg_cmp_rd_rs1_b20, Zbkb_ror_cg_cmp_rd_rs1_b20_str) +80003740: 000aa383 lw x7,0(x21) +80003744: 01438863 beq x7,x20,80003754 +80003748: 5d10146f jal x8,80005518 +8000374c: 8000373c .word 0x8000373c +80003750: 8000e65c .word 0x8000e65c +80003754: 004a8a93 addi x21,x21,4 + + mv x25, x21 # switch signature pointer register to avoid conflict with test +80003758: 000a8c93 addi x25,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x15e9aa40 +8000375c: 0004aa83 lw x21,0(x9) +80003760: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x6e5d6e24 +80003764: 0004a183 lw x3,0(x9) +80003768: 00448493 addi x9,x9,4 + +8000376c : +Zbkb_ror_cg_cmp_rd_rs1_b21: + ror x21, x21, x3 # perform operation +8000376c: 603adab3 ror x21,x21,x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zbkb_ror_cg_cmp_rd_rs1_b21, Zbkb_ror_cg_cmp_rd_rs1_b21_str) +80003770: 000ca383 lw x7,0(x25) +80003774: 01538863 beq x7,x21,80003784 +80003778: 5a10146f jal x8,80005518 +8000377c: 8000376c .word 0x8000376c +80003780: 8000e693 .word 0x8000e693 +80003784: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x6dc6c318 +80003788: 0004ab03 lw x22,0(x9) +8000378c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xc61d3827 +80003790: 0004af03 lw x30,0(x9) +80003794: 00448493 addi x9,x9,4 + +80003798 : +Zbkb_ror_cg_cmp_rd_rs1_b22: + ror x22, x22, x30 # perform operation +80003798: 61eb5b33 ror x22,x22,x30 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_ror_cg_cmp_rd_rs1_b22, Zbkb_ror_cg_cmp_rd_rs1_b22_str) +8000379c: 000ca383 lw x7,0(x25) +800037a0: 01638863 beq x7,x22,800037b0 +800037a4: 5750146f jal x8,80005518 +800037a8: 80003798 .word 0x80003798 +800037ac: 8000e6ca .word 0x8000e6ca +800037b0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xc8880ed8 +800037b4: 0004ab83 lw x23,0(x9) +800037b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xd5eaebb9 +800037bc: 0004a583 lw x11,0(x9) +800037c0: 00448493 addi x9,x9,4 + +800037c4 : +Zbkb_ror_cg_cmp_rd_rs1_b23: + ror x23, x23, x11 # perform operation +800037c4: 60bbdbb3 ror x23,x23,x11 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zbkb_ror_cg_cmp_rd_rs1_b23, Zbkb_ror_cg_cmp_rd_rs1_b23_str) +800037c8: 000ca383 lw x7,0(x25) +800037cc: 01738863 beq x7,x23,800037dc +800037d0: 5490146f jal x8,80005518 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000e701 .word 0x8000e701 +800037dc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x28960229 +800037e0: 0004ac03 lw x24,0(x9) +800037e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x421d4564 +800037e8: 0004ae83 lw x29,0(x9) +800037ec: 00448493 addi x9,x9,4 + +800037f0 : +Zbkb_ror_cg_cmp_rd_rs1_b24: + ror x24, x24, x29 # perform operation +800037f0: 61dc5c33 ror x24,x24,x29 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkb_ror_cg_cmp_rd_rs1_b24, Zbkb_ror_cg_cmp_rd_rs1_b24_str) +800037f4: 000ca383 lw x7,0(x25) +800037f8: 01838863 beq x7,x24,80003808 +800037fc: 51d0146f jal x8,80005518 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000e738 .word 0x8000e738 +80003808: 004c8c93 addi x25,x25,4 + + mv x3, x25 # switch signature pointer register to avoid conflict with test +8000380c: 000c8193 addi x3,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x6dd892f4 +80003810: 0004ac83 lw x25,0(x9) +80003814: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xd368cf5f +80003818: 0004ac03 lw x24,0(x9) +8000381c: 00448493 addi x9,x9,4 + +80003820 : +Zbkb_ror_cg_cmp_rd_rs1_b25: + ror x25, x25, x24 # perform operation +80003820: 618cdcb3 ror x25,x25,x24 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_ror_cg_cmp_rd_rs1_b25, Zbkb_ror_cg_cmp_rd_rs1_b25_str) +80003824: 0001a383 lw x7,0(x3) +80003828: 01938863 beq x7,x25,80003838 +8000382c: 4ed0146f jal x8,80005518 +80003830: 80003820 .word 0x80003820 +80003834: 8000e76f .word 0x8000e76f +80003838: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x50d0a080 +8000383c: 0004ad03 lw x26,0(x9) +80003840: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x287f4f1e +80003844: 0004a303 lw x6,0(x9) +80003848: 00448493 addi x9,x9,4 + +8000384c : +Zbkb_ror_cg_cmp_rd_rs1_b26: + ror x26, x26, x6 # perform operation +8000384c: 606d5d33 ror x26,x26,x6 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_ror_cg_cmp_rd_rs1_b26, Zbkb_ror_cg_cmp_rd_rs1_b26_str) +80003850: 0001a383 lw x7,0(x3) +80003854: 01a38863 beq x7,x26,80003864 +80003858: 4c10146f jal x8,80005518 +8000385c: 8000384c .word 0x8000384c +80003860: 8000e7a6 .word 0x8000e7a6 +80003864: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x214df605 +80003868: 0004ad83 lw x27,0(x9) +8000386c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xc6c1c55a +80003870: 0004af03 lw x30,0(x9) +80003874: 00448493 addi x9,x9,4 + +80003878 : +Zbkb_ror_cg_cmp_rd_rs1_b27: + ror x27, x27, x30 # perform operation +80003878: 61edddb3 ror x27,x27,x30 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_ror_cg_cmp_rd_rs1_b27, Zbkb_ror_cg_cmp_rd_rs1_b27_str) +8000387c: 0001a383 lw x7,0(x3) +80003880: 01b38863 beq x7,x27,80003890 +80003884: 4950146f jal x8,80005518 +80003888: 80003878 .word 0x80003878 +8000388c: 8000e7dd .word 0x8000e7dd +80003890: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x69e46aea +80003894: 0004ae03 lw x28,0(x9) +80003898: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xccebf8af +8000389c: 0004a903 lw x18,0(x9) +800038a0: 00448493 addi x9,x9,4 + +800038a4 : +Zbkb_ror_cg_cmp_rd_rs1_b28: + ror x28, x28, x18 # perform operation +800038a4: 612e5e33 ror x28,x28,x18 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_ror_cg_cmp_rd_rs1_b28, Zbkb_ror_cg_cmp_rd_rs1_b28_str) +800038a8: 0001a383 lw x7,0(x3) +800038ac: 01c38863 beq x7,x28,800038bc +800038b0: 4690146f jal x8,80005518 +800038b4: 800038a4 .word 0x800038a4 +800038b8: 8000e814 .word 0x8000e814 +800038bc: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xe5e0191b +800038c0: 0004ae83 lw x29,0(x9) +800038c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xf915de98 +800038c8: 0004a083 lw x1,0(x9) +800038cc: 00448493 addi x9,x9,4 + +800038d0 : +Zbkb_ror_cg_cmp_rd_rs1_b29: + ror x29, x29, x1 # perform operation +800038d0: 601edeb3 ror x29,x29,x1 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_ror_cg_cmp_rd_rs1_b29, Zbkb_ror_cg_cmp_rd_rs1_b29_str) +800038d4: 0001a383 lw x7,0(x3) +800038d8: 01d38863 beq x7,x29,800038e8 +800038dc: 43d0146f jal x8,80005518 +800038e0: 800038d0 .word 0x800038d0 +800038e4: 8000e84b .word 0x8000e84b +800038e8: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x7dd83c56 +800038ec: 0004af03 lw x30,0(x9) +800038f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0ec9d040 +800038f4: 0004a803 lw x16,0(x9) +800038f8: 00448493 addi x9,x9,4 + +800038fc : +Zbkb_ror_cg_cmp_rd_rs1_b30: + ror x30, x30, x16 # perform operation +800038fc: 610f5f33 ror x30,x30,x16 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_ror_cg_cmp_rd_rs1_b30, Zbkb_ror_cg_cmp_rd_rs1_b30_str) +80003900: 0001a383 lw x7,0(x3) +80003904: 01e38863 beq x7,x30,80003914 +80003908: 4110146f jal x8,80005518 +8000390c: 800038fc .word 0x800038fc +80003910: 8000e882 .word 0x8000e882 +80003914: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x6294e410 +80003918: 0004af83 lw x31,0(x9) +8000391c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xb19b5844 +80003920: 0004a903 lw x18,0(x9) +80003924: 00448493 addi x9,x9,4 + +80003928 : +Zbkb_ror_cg_cmp_rd_rs1_b31: + ror x31, x31, x18 # perform operation +80003928: 612fdfb3 ror x31,x31,x18 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_ror_cg_cmp_rd_rs1_b31, Zbkb_ror_cg_cmp_rd_rs1_b31_str) +8000392c: 0001a383 lw x7,0(x3) +80003930: 01f38863 beq x7,x31,80003940 +80003934: 3e50146f jal x8,80005518 +80003938: 80003928 .word 0x80003928 +8000393c: 8000e8b9 .word 0x8000e8b9 +80003940: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xbb8f7af0 +80003944: 0004a683 lw x13,0(x9) +80003948: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xb3015be3 +8000394c: 0004a003 lw x0,0(x9) +80003950: 00448493 addi x9,x9,4 + +80003954 : +Zbkb_ror_cg_cmp_rd_rs2_b0: + ror x0, x13, x0 # perform operation +80003954: 6006d033 ror x0,x13,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_ror_cg_cmp_rd_rs2_b0, Zbkb_ror_cg_cmp_rd_rs2_b0_str) +80003958: 0001a383 lw x7,0(x3) +8000395c: 00038863 beq x7,x0,8000396c +80003960: 3b90146f jal x8,80005518 +80003964: 80003954 .word 0x80003954 +80003968: 8000e8f0 .word 0x8000e8f0 +8000396c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xa441741d +80003970: 0004a683 lw x13,0(x9) +80003974: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7c0f98c0 +80003978: 0004a083 lw x1,0(x9) +8000397c: 00448493 addi x9,x9,4 + +80003980 : +Zbkb_ror_cg_cmp_rd_rs2_b1: + ror x1, x13, x1 # perform operation +80003980: 6016d0b3 ror x1,x13,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zbkb_ror_cg_cmp_rd_rs2_b1, Zbkb_ror_cg_cmp_rd_rs2_b1_str) +80003984: 0001a383 lw x7,0(x3) +80003988: 00138863 beq x7,x1,80003998 +8000398c: 38d0146f jal x8,80005518 +80003990: 80003980 .word 0x80003980 +80003994: 8000e926 .word 0x8000e926 +80003998: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xa1bc495b +8000399c: 0004af03 lw x30,0(x9) +800039a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xe5e490bd +800039a4: 0004a103 lw x2,0(x9) +800039a8: 00448493 addi x9,x9,4 + +800039ac : +Zbkb_ror_cg_cmp_rd_rs2_b2: + ror x2, x30, x2 # perform operation +800039ac: 602f5133 ror x2,x30,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_ror_cg_cmp_rd_rs2_b2, Zbkb_ror_cg_cmp_rd_rs2_b2_str) +800039b0: 0001a383 lw x7,0(x3) +800039b4: 00238863 beq x7,x2,800039c4 +800039b8: 3610146f jal x8,80005518 +800039bc: 800039ac .word 0x800039ac +800039c0: 8000e95c .word 0x8000e95c +800039c4: 00418193 addi x3,x3,4 + + mv x23, x3 # switch signature pointer register to avoid conflict with test +800039c8: 00018b93 addi x23,x3,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xfba88ba5 +800039cc: 0004a103 lw x2,0(x9) +800039d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x1a57f8db +800039d4: 0004a183 lw x3,0(x9) +800039d8: 00448493 addi x9,x9,4 + +800039dc : +Zbkb_ror_cg_cmp_rd_rs2_b3: + ror x3, x2, x3 # perform operation +800039dc: 603151b3 ror x3,x2,x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_ror_cg_cmp_rd_rs2_b3, Zbkb_ror_cg_cmp_rd_rs2_b3_str) +800039e0: 000ba383 lw x7,0(x23) +800039e4: 00338863 beq x7,x3,800039f4 +800039e8: 3310146f jal x8,80005518 +800039ec: 800039dc .word 0x800039dc +800039f0: 8000e992 .word 0x8000e992 +800039f4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x128fffa3 +800039f8: 0004a583 lw x11,0(x9) +800039fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x3c176354 +80003a00: 0004a203 lw x4,0(x9) +80003a04: 00448493 addi x9,x9,4 + +80003a08 : +Zbkb_ror_cg_cmp_rd_rs2_b4: + ror x4, x11, x4 # perform operation +80003a08: 6045d233 ror x4,x11,x4 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_ror_cg_cmp_rd_rs2_b4, Zbkb_ror_cg_cmp_rd_rs2_b4_str) +80003a0c: 000ba383 lw x7,0(x23) +80003a10: 00438863 beq x7,x4,80003a20 +80003a14: 3050146f jal x8,80005518 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 8000e9c8 .word 0x8000e9c8 +80003a20: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x4a618e40 +80003a24: 0004a203 lw x4,0(x9) +80003a28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x41f94aac +80003a2c: 0004a283 lw x5,0(x9) +80003a30: 00448493 addi x9,x9,4 + +80003a34 : +Zbkb_ror_cg_cmp_rd_rs2_b5: + ror x5, x4, x5 # perform operation +80003a34: 605252b3 ror x5,x4,x5 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_ror_cg_cmp_rd_rs2_b5, Zbkb_ror_cg_cmp_rd_rs2_b5_str) +80003a38: 000ba383 lw x7,0(x23) +80003a3c: 00538863 beq x7,x5,80003a4c +80003a40: 2d90146f jal x8,80005518 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 8000e9fe .word 0x8000e9fe +80003a4c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfa98f27e +80003a50: 0004a903 lw x18,0(x9) +80003a54: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x304b9d7e +80003a58: 0004a303 lw x6,0(x9) +80003a5c: 00448493 addi x9,x9,4 + +80003a60 : +Zbkb_ror_cg_cmp_rd_rs2_b6: + ror x6, x18, x6 # perform operation +80003a60: 60695333 ror x6,x18,x6 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_ror_cg_cmp_rd_rs2_b6, Zbkb_ror_cg_cmp_rd_rs2_b6_str) +80003a64: 000ba383 lw x7,0(x23) +80003a68: 00638863 beq x7,x6,80003a78 +80003a6c: 2ad0146f jal x8,80005518 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 8000ea34 .word 0x8000ea34 +80003a78: 004b8b93 addi x23,x23,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a7c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a80: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xa8e0c400 +80003a84: 0004ab03 lw x22,0(x9) +80003a88: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xe19b8e7a +80003a8c: 0004a383 lw x7,0(x9) +80003a90: 00448493 addi x9,x9,4 + +80003a94 : +Zbkb_ror_cg_cmp_rd_rs2_b7: + ror x7, x22, x7 # perform operation +80003a94: 607b53b3 ror x7,x22,x7 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zbkb_ror_cg_cmp_rd_rs2_b7, Zbkb_ror_cg_cmp_rd_rs2_b7_str) +80003a98: 000ba683 lw x13,0(x23) +80003a9c: 00768863 beq x13,x7,80003aac +80003aa0: 2a10176f jal x14,80005540 +80003aa4: 80003a94 .word 0x80003a94 +80003aa8: 8000ea6a .word 0x8000ea6a +80003aac: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xf1c48b38 +80003ab0: 0004a783 lw x15,0(x9) +80003ab4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xd7546a19 +80003ab8: 0004a403 lw x8,0(x9) +80003abc: 00448493 addi x9,x9,4 + +80003ac0 : +Zbkb_ror_cg_cmp_rd_rs2_b8: + ror x8, x15, x8 # perform operation +80003ac0: 6087d433 ror x8,x15,x8 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zbkb_ror_cg_cmp_rd_rs2_b8, Zbkb_ror_cg_cmp_rd_rs2_b8_str) +80003ac4: 000ba683 lw x13,0(x23) +80003ac8: 00868863 beq x13,x8,80003ad8 +80003acc: 2750176f jal x14,80005540 +80003ad0: 80003ac0 .word 0x80003ac0 +80003ad4: 8000eaa0 .word 0x8000eaa0 +80003ad8: 004b8b93 addi x23,x23,4 + + mv x27, x9 # switch data pointer register to avoid conflict with test +80003adc: 00048d93 addi x27,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0xdc3f7ab9 +80003ae0: 000da103 lw x2,0(x27) +80003ae4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0x0ccf0fff +80003ae8: 000da483 lw x9,0(x27) +80003aec: 004d8d93 addi x27,x27,4 + +80003af0 : +Zbkb_ror_cg_cmp_rd_rs2_b9: + ror x9, x2, x9 # perform operation +80003af0: 609154b3 ror x9,x2,x9 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zbkb_ror_cg_cmp_rd_rs2_b9, Zbkb_ror_cg_cmp_rd_rs2_b9_str) +80003af4: 000ba683 lw x13,0(x23) +80003af8: 00968863 beq x13,x9,80003b08 +80003afc: 2450176f jal x14,80005540 +80003b00: 80003af0 .word 0x80003af0 +80003b04: 8000ead6 .word 0x8000ead6 +80003b08: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x37550a15 +80003b0c: 000da183 lw x3,0(x27) +80003b10: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0xa107e5c9 +80003b14: 000da503 lw x10,0(x27) +80003b18: 004d8d93 addi x27,x27,4 + +80003b1c : +Zbkb_ror_cg_cmp_rd_rs2_b10: + ror x10, x3, x10 # perform operation +80003b1c: 60a1d533 ror x10,x3,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zbkb_ror_cg_cmp_rd_rs2_b10, Zbkb_ror_cg_cmp_rd_rs2_b10_str) +80003b20: 000ba683 lw x13,0(x23) +80003b24: 00a68863 beq x13,x10,80003b34 +80003b28: 2190176f jal x14,80005540 +80003b2c: 80003b1c .word 0x80003b1c +80003b30: 8000eb0c .word 0x8000eb0c +80003b34: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0xfe9f26fa +80003b38: 000dae83 lw x29,0(x27) +80003b3c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x51614a86 +80003b40: 000da583 lw x11,0(x27) +80003b44: 004d8d93 addi x27,x27,4 + +80003b48 : +Zbkb_ror_cg_cmp_rd_rs2_b11: + ror x11, x29, x11 # perform operation +80003b48: 60bed5b3 ror x11,x29,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkb_ror_cg_cmp_rd_rs2_b11, Zbkb_ror_cg_cmp_rd_rs2_b11_str) +80003b4c: 000ba683 lw x13,0(x23) +80003b50: 00b68863 beq x13,x11,80003b60 +80003b54: 1ed0176f jal x14,80005540 +80003b58: 80003b48 .word 0x80003b48 +80003b5c: 8000eb43 .word 0x8000eb43 +80003b60: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x0a1cf36c +80003b64: 000daa03 lw x20,0(x27) +80003b68: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x57921911 +80003b6c: 000da603 lw x12,0(x27) +80003b70: 004d8d93 addi x27,x27,4 + +80003b74 : +Zbkb_ror_cg_cmp_rd_rs2_b12: + ror x12, x20, x12 # perform operation +80003b74: 60ca5633 ror x12,x20,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zbkb_ror_cg_cmp_rd_rs2_b12, Zbkb_ror_cg_cmp_rd_rs2_b12_str) +80003b78: 000ba683 lw x13,0(x23) +80003b7c: 00c68863 beq x13,x12,80003b8c +80003b80: 1c10176f jal x14,80005540 +80003b84: 80003b74 .word 0x80003b74 +80003b88: 8000eb7a .word 0x8000eb7a +80003b8c: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003b90: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003b94: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xbb10c715 +80003b98: 000dad03 lw x26,0(x27) +80003b9c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xdc8437b4 +80003ba0: 000da683 lw x13,0(x27) +80003ba4: 004d8d93 addi x27,x27,4 + +80003ba8 : +Zbkb_ror_cg_cmp_rd_rs2_b13: + ror x13, x26, x13 # perform operation +80003ba8: 60dd56b3 ror x13,x26,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_ror_cg_cmp_rd_rs2_b13, Zbkb_ror_cg_cmp_rd_rs2_b13_str) +80003bac: 000ba203 lw x4,0(x23) +80003bb0: 00d20863 beq x4,x13,80003bc0 +80003bb4: 14d012ef jal x5,80005500 +80003bb8: 80003ba8 .word 0x80003ba8 +80003bbc: 8000ebb1 .word 0x8000ebb1 +80003bc0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x5888a855 +80003bc4: 000da403 lw x8,0(x27) +80003bc8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x7217395f +80003bcc: 000da703 lw x14,0(x27) +80003bd0: 004d8d93 addi x27,x27,4 + +80003bd4 : +Zbkb_ror_cg_cmp_rd_rs2_b14: + ror x14, x8, x14 # perform operation +80003bd4: 60e45733 ror x14,x8,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_ror_cg_cmp_rd_rs2_b14, Zbkb_ror_cg_cmp_rd_rs2_b14_str) +80003bd8: 000ba203 lw x4,0(x23) +80003bdc: 00e20863 beq x4,x14,80003bec +80003be0: 121012ef jal x5,80005500 +80003be4: 80003bd4 .word 0x80003bd4 +80003be8: 8000ebe8 .word 0x8000ebe8 +80003bec: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x667cb880 +80003bf0: 000daa03 lw x20,0(x27) +80003bf4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0xdf007468 +80003bf8: 000da783 lw x15,0(x27) +80003bfc: 004d8d93 addi x27,x27,4 + +80003c00 : +Zbkb_ror_cg_cmp_rd_rs2_b15: + ror x15, x20, x15 # perform operation +80003c00: 60fa57b3 ror x15,x20,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_ror_cg_cmp_rd_rs2_b15, Zbkb_ror_cg_cmp_rd_rs2_b15_str) +80003c04: 000ba203 lw x4,0(x23) +80003c08: 00f20863 beq x4,x15,80003c18 +80003c0c: 0f5012ef jal x5,80005500 +80003c10: 80003c00 .word 0x80003c00 +80003c14: 8000ec1f .word 0x8000ec1f +80003c18: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x09ad4049 +80003c1c: 000dad03 lw x26,0(x27) +80003c20: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x890f90dc +80003c24: 000da803 lw x16,0(x27) +80003c28: 004d8d93 addi x27,x27,4 + +80003c2c : +Zbkb_ror_cg_cmp_rd_rs2_b16: + ror x16, x26, x16 # perform operation +80003c2c: 610d5833 ror x16,x26,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_ror_cg_cmp_rd_rs2_b16, Zbkb_ror_cg_cmp_rd_rs2_b16_str) +80003c30: 000ba203 lw x4,0(x23) +80003c34: 01020863 beq x4,x16,80003c44 +80003c38: 0c9012ef jal x5,80005500 +80003c3c: 80003c2c .word 0x80003c2c +80003c40: 8000ec56 .word 0x8000ec56 +80003c44: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0x37f0151c +80003c48: 000da383 lw x7,0(x27) +80003c4c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x01911a1c +80003c50: 000da883 lw x17,0(x27) +80003c54: 004d8d93 addi x27,x27,4 + +80003c58 : +Zbkb_ror_cg_cmp_rd_rs2_b17: + ror x17, x7, x17 # perform operation +80003c58: 6113d8b3 ror x17,x7,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_ror_cg_cmp_rd_rs2_b17, Zbkb_ror_cg_cmp_rd_rs2_b17_str) +80003c5c: 000ba203 lw x4,0(x23) +80003c60: 01120863 beq x4,x17,80003c70 +80003c64: 09d012ef jal x5,80005500 +80003c68: 80003c58 .word 0x80003c58 +80003c6c: 8000ec8d .word 0x8000ec8d +80003c70: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x96358668 +80003c74: 000da803 lw x16,0(x27) +80003c78: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0xf6c2bacd +80003c7c: 000da903 lw x18,0(x27) +80003c80: 004d8d93 addi x27,x27,4 + +80003c84 : +Zbkb_ror_cg_cmp_rd_rs2_b18: + ror x18, x16, x18 # perform operation +80003c84: 61285933 ror x18,x16,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_ror_cg_cmp_rd_rs2_b18, Zbkb_ror_cg_cmp_rd_rs2_b18_str) +80003c88: 000ba203 lw x4,0(x23) +80003c8c: 01220863 beq x4,x18,80003c9c +80003c90: 071012ef jal x5,80005500 +80003c94: 80003c84 .word 0x80003c84 +80003c98: 8000ecc4 .word 0x8000ecc4 +80003c9c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xd78efa60 +80003ca0: 000daa83 lw x21,0(x27) +80003ca4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xef980f0e +80003ca8: 000da983 lw x19,0(x27) +80003cac: 004d8d93 addi x27,x27,4 + +80003cb0 : +Zbkb_ror_cg_cmp_rd_rs2_b19: + ror x19, x21, x19 # perform operation +80003cb0: 613ad9b3 ror x19,x21,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_ror_cg_cmp_rd_rs2_b19, Zbkb_ror_cg_cmp_rd_rs2_b19_str) +80003cb4: 000ba203 lw x4,0(x23) +80003cb8: 01320863 beq x4,x19,80003cc8 +80003cbc: 045012ef jal x5,80005500 +80003cc0: 80003cb0 .word 0x80003cb0 +80003cc4: 8000ecfb .word 0x8000ecfb +80003cc8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x5e3410df +80003ccc: 000da903 lw x18,0(x27) +80003cd0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xaefa3e6e +80003cd4: 000daa03 lw x20,0(x27) +80003cd8: 004d8d93 addi x27,x27,4 + +80003cdc : +Zbkb_ror_cg_cmp_rd_rs2_b20: + ror x20, x18, x20 # perform operation +80003cdc: 61495a33 ror x20,x18,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_ror_cg_cmp_rd_rs2_b20, Zbkb_ror_cg_cmp_rd_rs2_b20_str) +80003ce0: 000ba203 lw x4,0(x23) +80003ce4: 01420863 beq x4,x20,80003cf4 +80003ce8: 019012ef jal x5,80005500 +80003cec: 80003cdc .word 0x80003cdc +80003cf0: 8000ed32 .word 0x8000ed32 +80003cf4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0xdce89c66 +80003cf8: 000da383 lw x7,0(x27) +80003cfc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xcbf70725 +80003d00: 000daa83 lw x21,0(x27) +80003d04: 004d8d93 addi x27,x27,4 + +80003d08 : +Zbkb_ror_cg_cmp_rd_rs2_b21: + ror x21, x7, x21 # perform operation +80003d08: 6153dab3 ror x21,x7,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_ror_cg_cmp_rd_rs2_b21, Zbkb_ror_cg_cmp_rd_rs2_b21_str) +80003d0c: 000ba203 lw x4,0(x23) +80003d10: 01520863 beq x4,x21,80003d20 +80003d14: 7ec012ef jal x5,80005500 +80003d18: 80003d08 .word 0x80003d08 +80003d1c: 8000ed69 .word 0x8000ed69 +80003d20: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x4b3ade5f +80003d24: 000da403 lw x8,0(x27) +80003d28: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x2752d43b +80003d2c: 000dab03 lw x22,0(x27) +80003d30: 004d8d93 addi x27,x27,4 + +80003d34 : +Zbkb_ror_cg_cmp_rd_rs2_b22: + ror x22, x8, x22 # perform operation +80003d34: 61645b33 ror x22,x8,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_ror_cg_cmp_rd_rs2_b22, Zbkb_ror_cg_cmp_rd_rs2_b22_str) +80003d38: 000ba203 lw x4,0(x23) +80003d3c: 01620863 beq x4,x22,80003d4c +80003d40: 7c0012ef jal x5,80005500 +80003d44: 80003d34 .word 0x80003d34 +80003d48: 8000eda0 .word 0x8000eda0 +80003d4c: 004b8b93 addi x23,x23,4 + + mv x3, x23 # switch signature pointer register to avoid conflict with test +80003d50: 000b8193 addi x3,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0xa6a2c8eb +80003d54: 000daf03 lw x30,0(x27) +80003d58: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x8f6da08b +80003d5c: 000dab83 lw x23,0(x27) +80003d60: 004d8d93 addi x27,x27,4 + +80003d64 : +Zbkb_ror_cg_cmp_rd_rs2_b23: + ror x23, x30, x23 # perform operation +80003d64: 617f5bb3 ror x23,x30,x23 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkb_ror_cg_cmp_rd_rs2_b23, Zbkb_ror_cg_cmp_rd_rs2_b23_str) +80003d68: 0001a203 lw x4,0(x3) +80003d6c: 01720863 beq x4,x23,80003d7c +80003d70: 790012ef jal x5,80005500 +80003d74: 80003d64 .word 0x80003d64 +80003d78: 8000edd7 .word 0x8000edd7 +80003d7c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0xc8449d9a +80003d80: 000da483 lw x9,0(x27) +80003d84: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0xbce5b619 +80003d88: 000dac03 lw x24,0(x27) +80003d8c: 004d8d93 addi x27,x27,4 + +80003d90 : +Zbkb_ror_cg_cmp_rd_rs2_b24: + ror x24, x9, x24 # perform operation +80003d90: 6184dc33 ror x24,x9,x24 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkb_ror_cg_cmp_rd_rs2_b24, Zbkb_ror_cg_cmp_rd_rs2_b24_str) +80003d94: 0001a203 lw x4,0(x3) +80003d98: 01820863 beq x4,x24,80003da8 +80003d9c: 764012ef jal x5,80005500 +80003da0: 80003d90 .word 0x80003d90 +80003da4: 8000ee0e .word 0x8000ee0e +80003da8: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x429161a0 +80003dac: 000da103 lw x2,0(x27) +80003db0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0xe3b70b38 +80003db4: 000dac83 lw x25,0(x27) +80003db8: 004d8d93 addi x27,x27,4 + +80003dbc : +Zbkb_ror_cg_cmp_rd_rs2_b25: + ror x25, x2, x25 # perform operation +80003dbc: 61915cb3 ror x25,x2,x25 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_ror_cg_cmp_rd_rs2_b25, Zbkb_ror_cg_cmp_rd_rs2_b25_str) +80003dc0: 0001a203 lw x4,0(x3) +80003dc4: 01920863 beq x4,x25,80003dd4 +80003dc8: 738012ef jal x5,80005500 +80003dcc: 80003dbc .word 0x80003dbc +80003dd0: 8000ee45 .word 0x8000ee45 +80003dd4: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x5369d557 +80003dd8: 000da583 lw x11,0(x27) +80003ddc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x0affef72 +80003de0: 000dad03 lw x26,0(x27) +80003de4: 004d8d93 addi x27,x27,4 + +80003de8 : +Zbkb_ror_cg_cmp_rd_rs2_b26: + ror x26, x11, x26 # perform operation +80003de8: 61a5dd33 ror x26,x11,x26 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkb_ror_cg_cmp_rd_rs2_b26, Zbkb_ror_cg_cmp_rd_rs2_b26_str) +80003dec: 0001a203 lw x4,0(x3) +80003df0: 01a20863 beq x4,x26,80003e00 +80003df4: 70c012ef jal x5,80005500 +80003df8: 80003de8 .word 0x80003de8 +80003dfc: 8000ee7c .word 0x8000ee7c +80003e00: 00418193 addi x3,x3,4 + + mv x17, x27 # switch data pointer register to avoid conflict with test +80003e04: 000d8893 addi x17,x27,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x59ea924d +80003e08: 0008a803 lw x16,0(x17) +80003e0c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xa830a6da +80003e10: 0008ad83 lw x27,0(x17) +80003e14: 00488893 addi x17,x17,4 + +80003e18 : +Zbkb_ror_cg_cmp_rd_rs2_b27: + ror x27, x16, x27 # perform operation +80003e18: 61b85db3 ror x27,x16,x27 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkb_ror_cg_cmp_rd_rs2_b27, Zbkb_ror_cg_cmp_rd_rs2_b27_str) +80003e1c: 0001a203 lw x4,0(x3) +80003e20: 01b20863 beq x4,x27,80003e30 +80003e24: 6dc012ef jal x5,80005500 +80003e28: 80003e18 .word 0x80003e18 +80003e2c: 8000eeb3 .word 0x8000eeb3 +80003e30: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xc55681e7 +80003e34: 0008a783 lw x15,0(x17) +80003e38: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x4e298b25 +80003e3c: 0008ae03 lw x28,0(x17) +80003e40: 00488893 addi x17,x17,4 + +80003e44 : +Zbkb_ror_cg_cmp_rd_rs2_b28: + ror x28, x15, x28 # perform operation +80003e44: 61c7de33 ror x28,x15,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkb_ror_cg_cmp_rd_rs2_b28, Zbkb_ror_cg_cmp_rd_rs2_b28_str) +80003e48: 0001a203 lw x4,0(x3) +80003e4c: 01c20863 beq x4,x28,80003e5c +80003e50: 6b0012ef jal x5,80005500 +80003e54: 80003e44 .word 0x80003e44 +80003e58: 8000eeea .word 0x8000eeea +80003e5c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x192b0808 +80003e60: 0008a003 lw x0,0(x17) +80003e64: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x7d352c49 +80003e68: 0008ae83 lw x29,0(x17) +80003e6c: 00488893 addi x17,x17,4 + +80003e70 : +Zbkb_ror_cg_cmp_rd_rs2_b29: + ror x29, x0, x29 # perform operation +80003e70: 61d05eb3 ror x29,x0,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkb_ror_cg_cmp_rd_rs2_b29, Zbkb_ror_cg_cmp_rd_rs2_b29_str) +80003e74: 0001a203 lw x4,0(x3) +80003e78: 01d20863 beq x4,x29,80003e88 +80003e7c: 684012ef jal x5,80005500 +80003e80: 80003e70 .word 0x80003e70 +80003e84: 8000ef21 .word 0x8000ef21 +80003e88: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x9f926f32 +80003e8c: 0008a583 lw x11,0(x17) +80003e90: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x4ae30f3a +80003e94: 0008af03 lw x30,0(x17) +80003e98: 00488893 addi x17,x17,4 + +80003e9c : +Zbkb_ror_cg_cmp_rd_rs2_b30: + ror x30, x11, x30 # perform operation +80003e9c: 61e5df33 ror x30,x11,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkb_ror_cg_cmp_rd_rs2_b30, Zbkb_ror_cg_cmp_rd_rs2_b30_str) +80003ea0: 0001a203 lw x4,0(x3) +80003ea4: 01e20863 beq x4,x30,80003eb4 +80003ea8: 658012ef jal x5,80005500 +80003eac: 80003e9c .word 0x80003e9c +80003eb0: 8000ef58 .word 0x8000ef58 +80003eb4: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x7dd4f68c +80003eb8: 0008a003 lw x0,0(x17) +80003ebc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x9e27be6c +80003ec0: 0008af83 lw x31,0(x17) +80003ec4: 00488893 addi x17,x17,4 + +80003ec8 : +Zbkb_ror_cg_cmp_rd_rs2_b31: + ror x31, x0, x31 # perform operation +80003ec8: 61f05fb3 ror x31,x0,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkb_ror_cg_cmp_rd_rs2_b31, Zbkb_ror_cg_cmp_rd_rs2_b31_str) +80003ecc: 0001a203 lw x4,0(x3) +80003ed0: 01f20863 beq x4,x31,80003ee0 +80003ed4: 62c012ef jal x5,80005500 +80003ed8: 80003ec8 .word 0x80003ec8 +80003edc: 8000ef8f .word 0x8000ef8f +80003ee0: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x14a53d25 +80003ee4: 0008a003 lw x0,0(x17) +80003ee8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0xb68aa2cf +80003eec: 0008a003 lw x0,0(x17) +80003ef0: 00488893 addi x17,x17,4 + +80003ef4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b0: + ror x0, x0, x0 # perform operation +80003ef4: 60005033 ror x0,x0,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_ror_cg_cmp_rd_rs1_rs2_b0, Zbkb_ror_cg_cmp_rd_rs1_rs2_b0_str) +80003ef8: 0001a203 lw x4,0(x3) +80003efc: 00020863 beq x4,x0,80003f0c +80003f00: 600012ef jal x5,80005500 +80003f04: 80003ef4 .word 0x80003ef4 +80003f08: 8000efc6 .word 0x8000efc6 +80003f0c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x61772839 +80003f10: 0008a083 lw x1,0(x17) +80003f14: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x5e52f9c7 +80003f18: 0008a083 lw x1,0(x17) +80003f1c: 00488893 addi x17,x17,4 + +80003f20 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b1: + ror x1, x1, x1 # perform operation +80003f20: 6010d0b3 ror x1,x1,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_ror_cg_cmp_rd_rs1_rs2_b1, Zbkb_ror_cg_cmp_rd_rs1_rs2_b1_str) +80003f24: 0001a203 lw x4,0(x3) +80003f28: 00120863 beq x4,x1,80003f38 +80003f2c: 5d4012ef jal x5,80005500 +80003f30: 80003f20 .word 0x80003f20 +80003f34: 8000f000 .word 0x8000f000 +80003f38: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xcdb5593e +80003f3c: 0008a103 lw x2,0(x17) +80003f40: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x7a3db0b1 +80003f44: 0008a103 lw x2,0(x17) +80003f48: 00488893 addi x17,x17,4 + +80003f4c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b2: + ror x2, x2, x2 # perform operation +80003f4c: 60215133 ror x2,x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_ror_cg_cmp_rd_rs1_rs2_b2, Zbkb_ror_cg_cmp_rd_rs1_rs2_b2_str) +80003f50: 0001a203 lw x4,0(x3) +80003f54: 00220863 beq x4,x2,80003f64 +80003f58: 5a8012ef jal x5,80005500 +80003f5c: 80003f4c .word 0x80003f4c +80003f60: 8000f03a .word 0x8000f03a +80003f64: 00418193 addi x3,x3,4 + + mv x18, x3 # switch signature pointer register to avoid conflict with test +80003f68: 00018913 addi x18,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7a3d3a98 +80003f6c: 0008a183 lw x3,0(x17) +80003f70: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x887799a7 +80003f74: 0008a183 lw x3,0(x17) +80003f78: 00488893 addi x17,x17,4 + +80003f7c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b3: + ror x3, x3, x3 # perform operation +80003f7c: 6031d1b3 ror x3,x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_ror_cg_cmp_rd_rs1_rs2_b3, Zbkb_ror_cg_cmp_rd_rs1_rs2_b3_str) +80003f80: 00092203 lw x4,0(x18) +80003f84: 00320863 beq x4,x3,80003f94 +80003f88: 578012ef jal x5,80005500 +80003f8c: 80003f7c .word 0x80003f7c +80003f90: 8000f074 .word 0x8000f074 +80003f94: 00490913 addi x18,x18,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f98: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f9c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x003480cb +80003fa0: 0008a203 lw x4,0(x17) +80003fa4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x696e0aa6 +80003fa8: 0008a203 lw x4,0(x17) +80003fac: 00488893 addi x17,x17,4 + +80003fb0 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b4: + ror x4, x4, x4 # perform operation +80003fb0: 60425233 ror x4,x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_ror_cg_cmp_rd_rs1_rs2_b4, Zbkb_ror_cg_cmp_rd_rs1_rs2_b4_str) +80003fb4: 00092683 lw x13,0(x18) +80003fb8: 00468863 beq x13,x4,80003fc8 +80003fbc: 5840176f jal x14,80005540 +80003fc0: 80003fb0 .word 0x80003fb0 +80003fc4: 8000f0ae .word 0x8000f0ae +80003fc8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xf9c67f8f +80003fcc: 0008a283 lw x5,0(x17) +80003fd0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x901f317d +80003fd4: 0008a283 lw x5,0(x17) +80003fd8: 00488893 addi x17,x17,4 + +80003fdc : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b5: + ror x5, x5, x5 # perform operation +80003fdc: 6052d2b3 ror x5,x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_ror_cg_cmp_rd_rs1_rs2_b5, Zbkb_ror_cg_cmp_rd_rs1_rs2_b5_str) +80003fe0: 00092683 lw x13,0(x18) +80003fe4: 00568863 beq x13,x5,80003ff4 +80003fe8: 5580176f jal x14,80005540 +80003fec: 80003fdc .word 0x80003fdc +80003ff0: 8000f0e8 .word 0x8000f0e8 +80003ff4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x689c5bf1 +80003ff8: 0008a303 lw x6,0(x17) +80003ffc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x5368a99f +80004000: 0008a303 lw x6,0(x17) +80004004: 00488893 addi x17,x17,4 + +80004008 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b6: + ror x6, x6, x6 # perform operation +80004008: 60635333 ror x6,x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_ror_cg_cmp_rd_rs1_rs2_b6, Zbkb_ror_cg_cmp_rd_rs1_rs2_b6_str) +8000400c: 00092683 lw x13,0(x18) +80004010: 00668863 beq x13,x6,80004020 +80004014: 52c0176f jal x14,80005540 +80004018: 80004008 .word 0x80004008 +8000401c: 8000f122 .word 0x8000f122 +80004020: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xacebbf45 +80004024: 0008a383 lw x7,0(x17) +80004028: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x22449549 +8000402c: 0008a383 lw x7,0(x17) +80004030: 00488893 addi x17,x17,4 + +80004034 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b7: + ror x7, x7, x7 # perform operation +80004034: 6073d3b3 ror x7,x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_ror_cg_cmp_rd_rs1_rs2_b7, Zbkb_ror_cg_cmp_rd_rs1_rs2_b7_str) +80004038: 00092683 lw x13,0(x18) +8000403c: 00768863 beq x13,x7,8000404c +80004040: 5000176f jal x14,80005540 +80004044: 80004034 .word 0x80004034 +80004048: 8000f15c .word 0x8000f15c +8000404c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x865a2262 +80004050: 0008a403 lw x8,0(x17) +80004054: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xeb561509 +80004058: 0008a403 lw x8,0(x17) +8000405c: 00488893 addi x17,x17,4 + +80004060 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b8: + ror x8, x8, x8 # perform operation +80004060: 60845433 ror x8,x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_ror_cg_cmp_rd_rs1_rs2_b8, Zbkb_ror_cg_cmp_rd_rs1_rs2_b8_str) +80004064: 00092683 lw x13,0(x18) +80004068: 00868863 beq x13,x8,80004078 +8000406c: 4d40176f jal x14,80005540 +80004070: 80004060 .word 0x80004060 +80004074: 8000f196 .word 0x8000f196 +80004078: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xc39467c9 +8000407c: 0008a483 lw x9,0(x17) +80004080: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0e9e06e5 +80004084: 0008a483 lw x9,0(x17) +80004088: 00488893 addi x17,x17,4 + +8000408c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b9: + ror x9, x9, x9 # perform operation +8000408c: 6094d4b3 ror x9,x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_ror_cg_cmp_rd_rs1_rs2_b9, Zbkb_ror_cg_cmp_rd_rs1_rs2_b9_str) +80004090: 00092683 lw x13,0(x18) +80004094: 00968863 beq x13,x9,800040a4 +80004098: 4a80176f jal x14,80005540 +8000409c: 8000408c .word 0x8000408c +800040a0: 8000f1d0 .word 0x8000f1d0 +800040a4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x9e700ad1 +800040a8: 0008a503 lw x10,0(x17) +800040ac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x0e33b000 +800040b0: 0008a503 lw x10,0(x17) +800040b4: 00488893 addi x17,x17,4 + +800040b8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b10: + ror x10, x10, x10 # perform operation +800040b8: 60a55533 ror x10,x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_ror_cg_cmp_rd_rs1_rs2_b10, Zbkb_ror_cg_cmp_rd_rs1_rs2_b10_str) +800040bc: 00092683 lw x13,0(x18) +800040c0: 00a68863 beq x13,x10,800040d0 +800040c4: 47c0176f jal x14,80005540 +800040c8: 800040b8 .word 0x800040b8 +800040cc: 8000f20a .word 0x8000f20a +800040d0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x183c7734 +800040d4: 0008a583 lw x11,0(x17) +800040d8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xee4912d4 +800040dc: 0008a583 lw x11,0(x17) +800040e0: 00488893 addi x17,x17,4 + +800040e4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b11: + ror x11, x11, x11 # perform operation +800040e4: 60b5d5b3 ror x11,x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_ror_cg_cmp_rd_rs1_rs2_b11, Zbkb_ror_cg_cmp_rd_rs1_rs2_b11_str) +800040e8: 00092683 lw x13,0(x18) +800040ec: 00b68863 beq x13,x11,800040fc +800040f0: 4500176f jal x14,80005540 +800040f4: 800040e4 .word 0x800040e4 +800040f8: 8000f245 .word 0x8000f245 +800040fc: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x08970566 +80004100: 0008a603 lw x12,0(x17) +80004104: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x375396cc +80004108: 0008a603 lw x12,0(x17) +8000410c: 00488893 addi x17,x17,4 + +80004110 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b12: + ror x12, x12, x12 # perform operation +80004110: 60c65633 ror x12,x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_ror_cg_cmp_rd_rs1_rs2_b12, Zbkb_ror_cg_cmp_rd_rs1_rs2_b12_str) +80004114: 00092683 lw x13,0(x18) +80004118: 00c68863 beq x13,x12,80004128 +8000411c: 4240176f jal x14,80005540 +80004120: 80004110 .word 0x80004110 +80004124: 8000f280 .word 0x8000f280 +80004128: 00490913 addi x18,x18,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000412c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004130: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xc3b5bd4f +80004134: 0008a683 lw x13,0(x17) +80004138: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xc0b9a0d9 +8000413c: 0008a683 lw x13,0(x17) +80004140: 00488893 addi x17,x17,4 + +80004144 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b13: + ror x13, x13, x13 # perform operation +80004144: 60d6d6b3 ror x13,x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zbkb_ror_cg_cmp_rd_rs1_rs2_b13, Zbkb_ror_cg_cmp_rd_rs1_rs2_b13_str) +80004148: 00092383 lw x7,0(x18) +8000414c: 00d38863 beq x7,x13,8000415c +80004150: 3c80146f jal x8,80005518 +80004154: 80004144 .word 0x80004144 +80004158: 8000f2bb .word 0x8000f2bb +8000415c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xda844200 +80004160: 0008a703 lw x14,0(x17) +80004164: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x4ea7d2aa +80004168: 0008a703 lw x14,0(x17) +8000416c: 00488893 addi x17,x17,4 + +80004170 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b14: + ror x14, x14, x14 # perform operation +80004170: 60e75733 ror x14,x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zbkb_ror_cg_cmp_rd_rs1_rs2_b14, Zbkb_ror_cg_cmp_rd_rs1_rs2_b14_str) +80004174: 00092383 lw x7,0(x18) +80004178: 00e38863 beq x7,x14,80004188 +8000417c: 39c0146f jal x8,80005518 +80004180: 80004170 .word 0x80004170 +80004184: 8000f2f6 .word 0x8000f2f6 +80004188: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x6944ec64 +8000418c: 0008a783 lw x15,0(x17) +80004190: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x7f9c059d +80004194: 0008a783 lw x15,0(x17) +80004198: 00488893 addi x17,x17,4 + +8000419c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b15: + ror x15, x15, x15 # perform operation +8000419c: 60f7d7b3 ror x15,x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zbkb_ror_cg_cmp_rd_rs1_rs2_b15, Zbkb_ror_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 00092383 lw x7,0(x18) +800041a4: 00f38863 beq x7,x15,800041b4 +800041a8: 3700146f jal x8,80005518 +800041ac: 8000419c .word 0x8000419c +800041b0: 8000f331 .word 0x8000f331 +800041b4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xfd321a92 +800041b8: 0008a803 lw x16,0(x17) +800041bc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x4f5e61f1 +800041c0: 0008a803 lw x16,0(x17) +800041c4: 00488893 addi x17,x17,4 + +800041c8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b16: + ror x16, x16, x16 # perform operation +800041c8: 61085833 ror x16,x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_ror_cg_cmp_rd_rs1_rs2_b16, Zbkb_ror_cg_cmp_rd_rs1_rs2_b16_str) +800041cc: 00092383 lw x7,0(x18) +800041d0: 01038863 beq x7,x16,800041e0 +800041d4: 3440146f jal x8,80005518 +800041d8: 800041c8 .word 0x800041c8 +800041dc: 8000f36c .word 0x8000f36c +800041e0: 00490913 addi x18,x18,4 + + mv x12, x17 # switch data pointer register to avoid conflict with test +800041e4: 00088613 addi x12,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x7d0c80cb +800041e8: 00062883 lw x17,0(x12) +800041ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x8251cbdc +800041f0: 00062883 lw x17,0(x12) +800041f4: 00460613 addi x12,x12,4 + +800041f8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b17: + ror x17, x17, x17 # perform operation +800041f8: 6118d8b3 ror x17,x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zbkb_ror_cg_cmp_rd_rs1_rs2_b17, Zbkb_ror_cg_cmp_rd_rs1_rs2_b17_str) +800041fc: 00092383 lw x7,0(x18) +80004200: 01138863 beq x7,x17,80004210 +80004204: 3140146f jal x8,80005518 +80004208: 800041f8 .word 0x800041f8 +8000420c: 8000f3a7 .word 0x8000f3a7 +80004210: 00490913 addi x18,x18,4 + + mv x25, x18 # switch signature pointer register to avoid conflict with test +80004214: 00090c93 addi x25,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x19efd1e6 +80004218: 00062903 lw x18,0(x12) +8000421c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x65202cd5 +80004220: 00062903 lw x18,0(x12) +80004224: 00460613 addi x12,x12,4 + +80004228 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b18: + ror x18, x18, x18 # perform operation +80004228: 61295933 ror x18,x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zbkb_ror_cg_cmp_rd_rs1_rs2_b18, Zbkb_ror_cg_cmp_rd_rs1_rs2_b18_str) +8000422c: 000ca383 lw x7,0(x25) +80004230: 01238863 beq x7,x18,80004240 +80004234: 2e40146f jal x8,80005518 +80004238: 80004228 .word 0x80004228 +8000423c: 8000f3e2 .word 0x8000f3e2 +80004240: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xf0a8048a +80004244: 00062983 lw x19,0(x12) +80004248: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x165c90e0 +8000424c: 00062983 lw x19,0(x12) +80004250: 00460613 addi x12,x12,4 + +80004254 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b19: + ror x19, x19, x19 # perform operation +80004254: 6139d9b3 ror x19,x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zbkb_ror_cg_cmp_rd_rs1_rs2_b19, Zbkb_ror_cg_cmp_rd_rs1_rs2_b19_str) +80004258: 000ca383 lw x7,0(x25) +8000425c: 01338863 beq x7,x19,8000426c +80004260: 2b80146f jal x8,80005518 +80004264: 80004254 .word 0x80004254 +80004268: 8000f41d .word 0x8000f41d +8000426c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x0c79211c +80004270: 00062a03 lw x20,0(x12) +80004274: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x4dbed05f +80004278: 00062a03 lw x20,0(x12) +8000427c: 00460613 addi x12,x12,4 + +80004280 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b20: + ror x20, x20, x20 # perform operation +80004280: 614a5a33 ror x20,x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zbkb_ror_cg_cmp_rd_rs1_rs2_b20, Zbkb_ror_cg_cmp_rd_rs1_rs2_b20_str) +80004284: 000ca383 lw x7,0(x25) +80004288: 01438863 beq x7,x20,80004298 +8000428c: 28c0146f jal x8,80005518 +80004290: 80004280 .word 0x80004280 +80004294: 8000f458 .word 0x8000f458 +80004298: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xaea8ff4a +8000429c: 00062a83 lw x21,0(x12) +800042a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5bf81d56 +800042a4: 00062a83 lw x21,0(x12) +800042a8: 00460613 addi x12,x12,4 + +800042ac : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b21: + ror x21, x21, x21 # perform operation +800042ac: 615adab3 ror x21,x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zbkb_ror_cg_cmp_rd_rs1_rs2_b21, Zbkb_ror_cg_cmp_rd_rs1_rs2_b21_str) +800042b0: 000ca383 lw x7,0(x25) +800042b4: 01538863 beq x7,x21,800042c4 +800042b8: 2600146f jal x8,80005518 +800042bc: 800042ac .word 0x800042ac +800042c0: 8000f493 .word 0x8000f493 +800042c4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x2e6c9954 +800042c8: 00062b03 lw x22,0(x12) +800042cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xcaf78646 +800042d0: 00062b03 lw x22,0(x12) +800042d4: 00460613 addi x12,x12,4 + +800042d8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b22: + ror x22, x22, x22 # perform operation +800042d8: 616b5b33 ror x22,x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_ror_cg_cmp_rd_rs1_rs2_b22, Zbkb_ror_cg_cmp_rd_rs1_rs2_b22_str) +800042dc: 000ca383 lw x7,0(x25) +800042e0: 01638863 beq x7,x22,800042f0 +800042e4: 2340146f jal x8,80005518 +800042e8: 800042d8 .word 0x800042d8 +800042ec: 8000f4ce .word 0x8000f4ce +800042f0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x2d06537f +800042f4: 00062b83 lw x23,0(x12) +800042f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xd42a632b +800042fc: 00062b83 lw x23,0(x12) +80004300: 00460613 addi x12,x12,4 + +80004304 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b23: + ror x23, x23, x23 # perform operation +80004304: 617bdbb3 ror x23,x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zbkb_ror_cg_cmp_rd_rs1_rs2_b23, Zbkb_ror_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 000ca383 lw x7,0(x25) +8000430c: 01738863 beq x7,x23,8000431c +80004310: 2080146f jal x8,80005518 +80004314: 80004304 .word 0x80004304 +80004318: 8000f509 .word 0x8000f509 +8000431c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x65a19db9 +80004320: 00062c03 lw x24,0(x12) +80004324: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x21f7fb1a +80004328: 00062c03 lw x24,0(x12) +8000432c: 00460613 addi x12,x12,4 + +80004330 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b24: + ror x24, x24, x24 # perform operation +80004330: 618c5c33 ror x24,x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkb_ror_cg_cmp_rd_rs1_rs2_b24, Zbkb_ror_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 000ca383 lw x7,0(x25) +80004338: 01838863 beq x7,x24,80004348 +8000433c: 1dc0146f jal x8,80005518 +80004340: 80004330 .word 0x80004330 +80004344: 8000f544 .word 0x8000f544 +80004348: 004c8c93 addi x25,x25,4 + + mv x23, x25 # switch signature pointer register to avoid conflict with test +8000434c: 000c8b93 addi x23,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x294b4da9 +80004350: 00062c83 lw x25,0(x12) +80004354: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xc56ef553 +80004358: 00062c83 lw x25,0(x12) +8000435c: 00460613 addi x12,x12,4 + +80004360 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b25: + ror x25, x25, x25 # perform operation +80004360: 619cdcb3 ror x25,x25,x25 + # Check if x25 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x25, Zbkb_ror_cg_cmp_rd_rs1_rs2_b25, Zbkb_ror_cg_cmp_rd_rs1_rs2_b25_str) +80004364: 000ba383 lw x7,0(x23) +80004368: 01938863 beq x7,x25,80004378 +8000436c: 1ac0146f jal x8,80005518 +80004370: 80004360 .word 0x80004360 +80004374: 8000f57f .word 0x8000f57f +80004378: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x58a84645 +8000437c: 00062d03 lw x26,0(x12) +80004380: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7a173fd6 +80004384: 00062d03 lw x26,0(x12) +80004388: 00460613 addi x12,x12,4 + +8000438c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b26: + ror x26, x26, x26 # perform operation +8000438c: 61ad5d33 ror x26,x26,x26 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkb_ror_cg_cmp_rd_rs1_rs2_b26, Zbkb_ror_cg_cmp_rd_rs1_rs2_b26_str) +80004390: 000ba383 lw x7,0(x23) +80004394: 01a38863 beq x7,x26,800043a4 +80004398: 1800146f jal x8,80005518 +8000439c: 8000438c .word 0x8000438c +800043a0: 8000f5ba .word 0x8000f5ba +800043a4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x6e025a4a +800043a8: 00062d83 lw x27,0(x12) +800043ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xfe257233 +800043b0: 00062d83 lw x27,0(x12) +800043b4: 00460613 addi x12,x12,4 + +800043b8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b27: + ror x27, x27, x27 # perform operation +800043b8: 61bdddb3 ror x27,x27,x27 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkb_ror_cg_cmp_rd_rs1_rs2_b27, Zbkb_ror_cg_cmp_rd_rs1_rs2_b27_str) +800043bc: 000ba383 lw x7,0(x23) +800043c0: 01b38863 beq x7,x27,800043d0 +800043c4: 1540146f jal x8,80005518 +800043c8: 800043b8 .word 0x800043b8 +800043cc: 8000f5f5 .word 0x8000f5f5 +800043d0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x4456a511 +800043d4: 00062e03 lw x28,0(x12) +800043d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x137e0a95 +800043dc: 00062e03 lw x28,0(x12) +800043e0: 00460613 addi x12,x12,4 + +800043e4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b28: + ror x28, x28, x28 # perform operation +800043e4: 61ce5e33 ror x28,x28,x28 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkb_ror_cg_cmp_rd_rs1_rs2_b28, Zbkb_ror_cg_cmp_rd_rs1_rs2_b28_str) +800043e8: 000ba383 lw x7,0(x23) +800043ec: 01c38863 beq x7,x28,800043fc +800043f0: 1280146f jal x8,80005518 +800043f4: 800043e4 .word 0x800043e4 +800043f8: 8000f630 .word 0x8000f630 +800043fc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x62a2fb91 +80004400: 00062e83 lw x29,0(x12) +80004404: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x07b01960 +80004408: 00062e83 lw x29,0(x12) +8000440c: 00460613 addi x12,x12,4 + +80004410 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b29: + ror x29, x29, x29 # perform operation +80004410: 61dedeb3 ror x29,x29,x29 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_ror_cg_cmp_rd_rs1_rs2_b29, Zbkb_ror_cg_cmp_rd_rs1_rs2_b29_str) +80004414: 000ba383 lw x7,0(x23) +80004418: 01d38863 beq x7,x29,80004428 +8000441c: 0fc0146f jal x8,80005518 +80004420: 80004410 .word 0x80004410 +80004424: 8000f66b .word 0x8000f66b +80004428: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xc4c14c18 +8000442c: 00062f03 lw x30,0(x12) +80004430: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xea844e4b +80004434: 00062f03 lw x30,0(x12) +80004438: 00460613 addi x12,x12,4 + +8000443c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b30: + ror x30, x30, x30 # perform operation +8000443c: 61ef5f33 ror x30,x30,x30 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkb_ror_cg_cmp_rd_rs1_rs2_b30, Zbkb_ror_cg_cmp_rd_rs1_rs2_b30_str) +80004440: 000ba383 lw x7,0(x23) +80004444: 01e38863 beq x7,x30,80004454 +80004448: 0d00146f jal x8,80005518 +8000444c: 8000443c .word 0x8000443c +80004450: 8000f6a6 .word 0x8000f6a6 +80004454: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x7b1c9ff4 +80004458: 00062f83 lw x31,0(x12) +8000445c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x48010cd1 +80004460: 00062f83 lw x31,0(x12) +80004464: 00460613 addi x12,x12,4 + +80004468 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b31: + ror x31, x31, x31 # perform operation +80004468: 61ffdfb3 ror x31,x31,x31 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkb_ror_cg_cmp_rd_rs1_rs2_b31, Zbkb_ror_cg_cmp_rd_rs1_rs2_b31_str) +8000446c: 000ba383 lw x7,0(x23) +80004470: 01f38863 beq x7,x31,80004480 +80004474: 0a40146f jal x8,80005518 +80004478: 80004468 .word 0x80004468 +8000447c: 8000f6e1 .word 0x8000f6e1 +80004480: 004b8b93 addi x23,x23,4 + + mv x2, x23 # restore signature pointer to default register for teardown +80004484: 000b8113 addi x2,x23,0 + +80004488 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004488: 00000513 addi x10,x0,0 +8000448c: 00000073 ecall +80004490: fff00513 addi x10,x0,-1 +80004494: 1d800413 addi x8,x0,472 + +80004498 : +80004498: 34002373 csrrs x6,mscratch,x0 + +8000449c : +8000449c: 23832383 lw x7,568(x6) +800044a0: 23c32483 lw x9,572(x6) + +800044a4 : +800044a4: 22032383 lw x7,544(x6) + +800044a8 : +800044a8: 25032483 lw x9,592(x6) +800044ac: 34049073 csrrw x0,mscratch,x9 + +800044b0 : +800044b0: 24832483 lw x9,584(x6) +800044b4: 305493f3 csrrw x7,mtvec,x9 +800044b8: ffc4f493 andi x9,x9,-4 +800044bc: ffc3f393 andi x7,x7,-4 +800044c0: 00749e63 bne x9,x7,800044dc + +800044c4 : +800044c4: 00030493 addi x9,x6,0 + +800044c8 : +800044c8: 0004a783 lw x15,0(x9) +800044cc: 00f3a023 sw x15,0(x7) +800044d0: 00438393 addi x7,x7,4 +800044d4: 00448493 addi x9,x9,4 +800044d8: fe83c8e3 blt x7,x8,800044c8 +800044dc: 0000100f fence.i + +800044e0 : +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 87d50513 addi x10,x10,-1923 # 8000fd9d +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 87550513 addi x10,x10,-1931 # 8000fdd5 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 89550513 addi x10,x10,-1899 # 8000fe35 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000c517 auipc x10,0xc +800045e4: 40050513 addi x10,x10,1024 # 800109e0 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000d397 auipc x7,0xd +80004664: 45838393 addi x7,x7,1112 # 80011ab8 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000d417 auipc x8,0xd +800046a4: 41040413 addi x8,x8,1040 # 80011ab0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8000ff89 .word 0x8000ff89 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8000fdf7 .word 0x8000fdf7 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000b517 auipc x10,0xb +80004704: 66450513 addi x10,x10,1636 # 8000fd64 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000b517 auipc x10,0xb +80004744: 65d50513 addi x10,x10,1629 # 8000fd9d +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce9ff06f jal x0,80004488 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: cddff06f jal x0,80004488 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b8030313 addi x6,x6,-1152 # 800044e0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 8d750513 addi x10,x10,-1833 # 80011417 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: d0850513 addi x10,x10,-760 # 8000f888 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 2de50513 addi x10,x10,734 # 8000fe9e +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 19d50513 addi x10,x10,413 # 8000fd9d +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 88848493 addi x9,x9,-1912 # 8000f868 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001b417 auipc x8,0x1b +80005024: 4fc40413 addi x8,x8,1276 # 8002051c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 8000ffa0 .word 0x8000ffa0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 800100a2 .word 0x800100a2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 8001019d .word 0x8001019d +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010290 .word 0x80010290 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80010403 .word 0x80010403 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 22020213 addi x4,x4,544 # 8000f720 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 20838393 addi x7,x7,520 # 8000f720 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 1e068693 addi x13,x13,480 # 8000f720 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 1b848493 addi x9,x9,440 # 8000f720 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 1144a483 lw x9,276(x9) # 8000f720 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: da040413 addi x8,x8,-608 # 80011460 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: e2040413 addi x8,x8,-480 # 80020520 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 10848493 addi x9,x9,264 # 8000f848 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 0c848493 addi x9,x9,200 # 8000f848 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 0a880813 addi x16,x16,168 # 8000f858 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 09480813 addi x16,x16,148 # 8000f858 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000a397 auipc x7,0xa +800057d4: 7b938393 addi x7,x7,1977 # 8000ff89 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 07080813 addi x16,x16,112 # 8000f850 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000a397 auipc x7,0xa +800057f0: 7b438393 addi x7,x7,1972 # 8000ffa0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 89e38393 addi x7,x7,-1890 # 800100a2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 98138393 addi x7,x7,-1663 # 8001019d +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: a5c38393 addi x7,x7,-1444 # 80010290 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: bb738393 addi x7,x7,-1097 # 80010403 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: b2338393 addi x7,x7,-1245 # 80010387 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: b4938393 addi x7,x7,-1207 # 800103c5 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000a397 auipc x7,0xa +80005898: 74c38393 addi x7,x7,1868 # 8000ffe0 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 83438393 addi x7,x7,-1996 # 800100e0 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 91538393 addi x7,x7,-1771 # 800101d9 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 9f138393 addi x7,x7,-1551 # 800102cd +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: b4a38393 addi x7,x7,-1206 # 8001043e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000a397 auipc x7,0xa +80005910: 71438393 addi x7,x7,1812 # 80010020 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000a397 auipc x7,0xa +80005928: 7fa38393 addi x7,x7,2042 # 8001011e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 8d938393 addi x7,x7,-1831 # 80010215 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 9b638393 addi x7,x7,-1610 # 8001030a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: b0d38393 addi x7,x7,-1267 # 80010479 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000a397 auipc x7,0xa +80005988: 6dd38393 addi x7,x7,1757 # 80010061 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000a397 auipc x7,0xa +800059a0: 7c138393 addi x7,x7,1985 # 8001015d +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 89e38393 addi x7,x7,-1890 # 80010252 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 97c38393 addi x7,x7,-1668 # 80010348 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: ad138393 addi x7,x7,-1327 # 800104b5 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: af638393 addi x7,x7,-1290 # 800104f2 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: b2d38393 addi x7,x7,-1235 # 80010541 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: c1038393 addi x7,x7,-1008 # 8001063c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: cf438393 addi x7,x7,-780 # 80010738 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: dec80813 addi x16,x16,-532 # 8000f850 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: ddc80813 addi x16,x16,-548 # 8000f850 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: dd480813 addi x16,x16,-556 # 8000f854 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: dc080813 addi x16,x16,-576 # 8000f850 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 2bd50513 addi x10,x10,701 # 8000fd9d +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 2b550513 addi x10,x10,693 # 8000fdd5 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 32c50513 addi x10,x10,812 # 8000fe8c +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: cb852503 lw x10,-840(x10) # 8000f840 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 2fe50513 addi x10,x10,766 # 8000fe9e +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: b5852503 lw x10,-1192(x10) # 8000f720 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 2c050513 addi x10,x10,704 # 8000fea0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: c1852503 lw x10,-1000(x10) # 8000f820 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: c4850513 addi x10,x10,-952 # 8000f888 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 23450513 addi x10,x10,564 # 8000feb4 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: b8052503 lw x10,-1152(x10) # 8000f828 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: bc850513 addi x10,x10,-1080 # 8000f888 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: beb50513 addi x10,x10,-1045 # 800108eb +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 9f852503 lw x10,-1544(x10) # 8000f720 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: b4860613 addi x12,x12,-1208 # 8000f888 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: abc52503 lw x10,-1348(x10) # 8000f824 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: c6150513 addi x10,x10,-927 # 80010a01 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: aa860613 addi x12,x12,-1368 # 8000f888 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: a1c52503 lw x10,-1508(x10) # 8000f824 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: a6860613 addi x12,x12,-1432 # 8000f888 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 9dc52503 lw x10,-1572(x10) # 8000f824 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: a8450513 addi x10,x10,-1404 # 800108e4 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 9e850513 addi x10,x10,-1560 # 8000f888 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: a1c50513 addi x10,x10,-1508 # 800108fc +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 81852503 lw x10,-2024(x10) # 8000f720 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 91852503 lw x10,-1768(x10) # 8000f830 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 90452503 lw x10,-1788(x10) # 8000f830 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 94850513 addi x10,x10,-1720 # 8000f888 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 8e052503 lw x10,-1824(x10) # 8000f848 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 99350513 addi x10,x10,-1645 # 80010913 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 00009517 auipc x10,0x9 +80005fac: 77852503 lw x10,1912(x10) # 8000f720 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 88052503 lw x10,-1920(x10) # 8000f838 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 86c52503 lw x10,-1940(x10) # 8000f838 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 8a850513 addi x10,x10,-1880 # 8000f888 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 90a50513 addi x10,x10,-1782 # 8001092a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 00009517 auipc x10,0x9 +8000604c: 7f052503 lw x10,2032(x10) # 8000f838 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 82850513 addi x10,x10,-2008 # 8000f888 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 8e850513 addi x10,x10,-1816 # 80010988 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 00009517 auipc x10,0x9 +800060cc: 77052503 lw x10,1904(x10) # 8000f838 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 00009517 auipc x10,0x9 +800060e4: 7a850513 addi x10,x10,1960 # 8000f888 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 00009417 auipc x8,0x9 +80006110: 74442403 lw x8,1860(x8) # 8000f850 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 90d50513 addi x10,x10,-1779 # 80010a2d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 8f950513 addi x10,x10,-1799 # 80010a59 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00009817 auipc x16,0x9 +8000618c: 6d080813 addi x16,x16,1744 # 8000f858 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: cfe50513 addi x10,x10,-770 # 8000fe9e +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 88950513 addi x10,x10,-1911 # 80010a69 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 00009517 auipc x10,0x9 +8000620c: 63052503 lw x10,1584(x10) # 8000f838 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 00009517 auipc x10,0x9 +80006224: 66850513 addi x10,x10,1640 # 8000f888 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 83450513 addi x10,x10,-1996 # 80010a94 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00009517 auipc x10,0x9 +8000628c: 5a852503 lw x10,1448(x10) # 8000f830 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 00009517 auipc x10,0x9 +800062a4: 5e850513 addi x10,x10,1512 # 8000f888 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 00009317 auipc x6,0x9 +800062cc: 56832303 lw x6,1384(x6) # 8000f830 +800062d0: 00009397 auipc x7,0x9 +800062d4: 5683a383 lw x7,1384(x7) # 8000f838 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000a517 auipc x10,0xa +800062e4: 7e350513 addi x10,x10,2019 # 80010ac3 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 80b50513 addi x10,x10,-2037 # 80010b2b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00009317 auipc x6,0x9 +8000634c: 4e832303 lw x6,1256(x6) # 8000f830 +80006350: 00009397 auipc x7,0x9 +80006354: 4e83a383 lw x7,1256(x7) # 8000f838 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 00009517 auipc x10,0x9 +80006384: 50850513 addi x10,x10,1288 # 8000f888 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000a517 auipc x10,0xa +800063c4: 79250513 addi x10,x10,1938 # 80010b52 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000a517 auipc x10,0xa +80006404: 6ef50513 addi x10,x10,1775 # 80010aef +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000a517 auipc x10,0xa +80006444: 6eb50513 addi x10,x10,1771 # 80010b2b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00009317 auipc x6,0x9 +8000646c: 3d032303 lw x6,976(x6) # 8000f838 +80006470: 00009397 auipc x7,0x9 +80006474: 3c03a383 lw x7,960(x7) # 8000f830 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 00009517 auipc x10,0x9 +800064a4: 3e850513 addi x10,x10,1000 # 8000f888 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000a517 auipc x10,0xa +800064e4: 75a50513 addi x10,x10,1882 # 80010c3a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 80150513 addi x10,x10,-2047 # 80010d21 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 30c52503 lw x10,780(x10) # 8000f854 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000a517 auipc x10,0xa +80006584: 7dd50513 addi x10,x10,2013 # 80010d5d +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000a517 auipc x10,0xa +800065c4: 77b50513 addi x10,x10,1915 # 80010d3b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000a517 auipc x10,0xa +80006604: 74350513 addi x10,x10,1859 # 80010d43 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000a517 auipc x10,0xa +80006644: 70b50513 addi x10,x10,1803 # 80010d4b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000a517 auipc x10,0xa +80006684: 6d450513 addi x10,x10,1748 # 80010d54 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000a517 auipc x10,0xa +800066c4: 6a650513 addi x10,x10,1702 # 80010d66 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 16852503 lw x10,360(x10) # 8000f850 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000a517 auipc x10,0xa +80006744: 77d50513 addi x10,x10,1917 # 80010ebd +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000a517 auipc x10,0xa +80006784: 60050513 addi x10,x10,1536 # 80010d80 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000a517 auipc x10,0xa +800067c4: 5f150513 addi x10,x10,1521 # 80010db1 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000a517 auipc x10,0xa +80006804: 5d150513 addi x10,x10,1489 # 80010dd1 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000a517 auipc x10,0xa +80006844: 5af50513 addi x10,x10,1455 # 80010def +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000a517 auipc x10,0xa +80006884: 58e50513 addi x10,x10,1422 # 80010e0e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000a517 auipc x10,0xa +800068c4: 57650513 addi x10,x10,1398 # 80010e36 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000a517 auipc x10,0xa +80006904: 56250513 addi x10,x10,1378 # 80010e62 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000a517 auipc x10,0xa +80006944: 54e50513 addi x10,x10,1358 # 80010e8e +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000a517 auipc x10,0xa +80006984: 54c50513 addi x10,x10,1356 # 80010ecc +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: e9052503 lw x10,-368(x10) # 8000f838 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: ec850513 addi x10,x10,-312 # 8000f888 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000a517 auipc x10,0xa +80006a04: 4e350513 addi x10,x10,1251 # 80010ee3 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: e0852503 lw x10,-504(x10) # 8000f830 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: e4850513 addi x10,x10,-440 # 8000f888 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: de852503 lw x10,-536(x10) # 8000f850 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000a517 auipc x10,0xa +80006a84: 47a50513 addi x10,x10,1146 # 80010efa +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: d9052503 lw x10,-624(x10) # 8000f838 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 45150513 addi x10,x10,1105 # 80010f11 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: d4852503 lw x10,-696(x10) # 8000f830 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: d4c52503 lw x10,-692(x10) # 8000f850 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000a517 auipc x10,0xa +80006b24: 46750513 addi x10,x10,1127 # 80010f87 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 4fd50513 addi x10,x10,1277 # 8001105d +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 5b050513 addi x10,x10,1456 # 80011150 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000a517 auipc x10,0xa +80006be4: 66b50513 addi x10,x10,1643 # 8001124b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000a517 auipc x10,0xa +80006c24: 71250513 addi x10,x10,1810 # 80011332 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 2df50513 addi x10,x10,735 # 80010f3f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: be062603 lw x12,-1056(x12) # 8000f868 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 28850513 addi x10,x10,648 # 8000ff28 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: b8850513 addi x10,x10,-1144 # 8000f888 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: b7058593 addi x11,x11,-1168 # 8000f8b0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: ba458593 addi x11,x11,-1116 # 8000f910 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: fae50513 addi x10,x10,-82 # 8000fd4e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: c0050513 addi x10,x10,-1024 # 800109e0 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: a5060613 addi x12,x12,-1456 # 8000f860 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 12950513 addi x10,x10,297 # 8000ff49 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: a2052503 lw x10,-1504(x10) # 8000f868 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: a2850513 addi x10,x10,-1496 # 8000f888 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 0b950513 addi x10,x10,185 # 8000ff59 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 9a852503 lw x10,-1624(x10) # 8000f870 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 9a850513 addi x10,x10,-1624 # 8000f888 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 04950513 addi x10,x10,73 # 8000ff69 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 93052503 lw x10,-1744(x10) # 8000f878 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 92850513 addi x10,x10,-1752 # 8000f888 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: fd950513 addi x10,x10,-39 # 8000ff79 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 8b852503 lw x10,-1864(x10) # 8000f880 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 8a850513 addi x10,x10,-1880 # 8000f888 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: 85860613 addi x12,x12,-1960 # 8000f860 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 86860613 addi x12,x12,-1944 # 8000f888 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3ec30313 addi x6,x6,1004 # 80004488 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3d430313 addi x6,x6,980 # 80004488 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3bc30313 addi x6,x6,956 # 80004488 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 25878793 addi x15,x15,600 # 80004498 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: fc010113 addi x2,x2,-64 # 80011460 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010a09 .word 0x80010a09 +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 05828293 addi x5,x5,88 # 80020600 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 03828293 addi x5,x5,56 # 80020600 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-rori-00.elf.objdump b/riscv-tests/rv32-Zbkb-rori-00.elf.objdump new file mode 100644 index 0000000..36586df --- /dev/null +++ b/riscv-tests/rv32-Zbkb-rori-00.elf.objdump @@ -0,0 +1,6915 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rori-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-rori-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00019640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00004100 memsz 0x00004100 flags r-x + LOAD off 0x00006000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000040c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00012d40 80008000 80008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 8001ae00 8001ae00 00018e00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8001b000 8001b000 00019000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00019640 2**0 + CONTENTS, READONLY + 6 .debug_line 00000ad4 00000000 00000000 0001967b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 00000000 00000000 0001a14f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0001a1c9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0001a1ec 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0001a200 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 00000000 00000000 0001a228 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0001a2b0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +8001ae00 l d .tohost 00000000 .tohost +8001b000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccgkNqK1.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8001b0e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b0 +80002500 l .text.rvtest 00000000 failedtest_x5_x4 +800085e0 l .data 00000000 Zbkb_rori_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b1 +80008611 l .data 00000000 Zbkb_rori_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b2 +80008642 l .data 00000000 Zbkb_rori_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b3 +80008673 l .data 00000000 Zbkb_rori_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b4 +80002518 l .text.rvtest 00000000 failedtest_x8_x7 +800086a4 l .data 00000000 Zbkb_rori_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b5 +800086d5 l .data 00000000 Zbkb_rori_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b6 +80008706 l .data 00000000 Zbkb_rori_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b7 +80002540 l .text.rvtest 00000000 failedtest_x14_x13 +80008737 l .data 00000000 Zbkb_rori_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b8 +80008768 l .data 00000000 Zbkb_rori_cg_cp_rs1_b8_str +800001a4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b9 +80008799 l .data 00000000 Zbkb_rori_cg_cp_rs1_b9_str +800001c8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b10 +800087cb l .data 00000000 Zbkb_rori_cg_cp_rs1_b10_str +800001ec l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b11 +800087fe l .data 00000000 Zbkb_rori_cg_cp_rs1_b11_str +80000210 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b12 +80008831 l .data 00000000 Zbkb_rori_cg_cp_rs1_b12_str +8000023c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b13 +80008864 l .data 00000000 Zbkb_rori_cg_cp_rs1_b13_str +80000260 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b14 +80008897 l .data 00000000 Zbkb_rori_cg_cp_rs1_b14_str +80000284 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b15 +800088ca l .data 00000000 Zbkb_rori_cg_cp_rs1_b15_str +800002a8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b16 +800088fd l .data 00000000 Zbkb_rori_cg_cp_rs1_b16_str +800002cc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b17 +80008930 l .data 00000000 Zbkb_rori_cg_cp_rs1_b17_str +800002f0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b18 +80008963 l .data 00000000 Zbkb_rori_cg_cp_rs1_b18_str +80000314 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b19 +80008996 l .data 00000000 Zbkb_rori_cg_cp_rs1_b19_str +80000338 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b20 +800089c9 l .data 00000000 Zbkb_rori_cg_cp_rs1_b20_str +80000360 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b21 +800089fc l .data 00000000 Zbkb_rori_cg_cp_rs1_b21_str +80000384 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b22 +80008a2f l .data 00000000 Zbkb_rori_cg_cp_rs1_b22_str +800003a8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b23 +80008a62 l .data 00000000 Zbkb_rori_cg_cp_rs1_b23_str +800003cc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b24 +80008a95 l .data 00000000 Zbkb_rori_cg_cp_rs1_b24_str +800003f4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b25 +80008ac8 l .data 00000000 Zbkb_rori_cg_cp_rs1_b25_str +80000418 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b26 +80008afb l .data 00000000 Zbkb_rori_cg_cp_rs1_b26_str +8000043c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b27 +80008b2e l .data 00000000 Zbkb_rori_cg_cp_rs1_b27_str +80000460 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b28 +80008b61 l .data 00000000 Zbkb_rori_cg_cp_rs1_b28_str +80000484 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b29 +80008b94 l .data 00000000 Zbkb_rori_cg_cp_rs1_b29_str +800004a8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b30 +80008bc7 l .data 00000000 Zbkb_rori_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_b31 +80008bfa l .data 00000000 Zbkb_rori_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b0 +80008c2d l .data 00000000 Zbkb_rori_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b1 +80008c5e l .data 00000000 Zbkb_rori_cg_cp_rd_b1_str +80000538 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b2 +80008c8f l .data 00000000 Zbkb_rori_cg_cp_rd_b2_str +80000560 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b3 +80008cc0 l .data 00000000 Zbkb_rori_cg_cp_rd_b3_str +8000058c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b4 +80008cf1 l .data 00000000 Zbkb_rori_cg_cp_rd_b4_str +800005b0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b5 +80008d22 l .data 00000000 Zbkb_rori_cg_cp_rd_b5_str +800005d4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b6 +80008d53 l .data 00000000 Zbkb_rori_cg_cp_rd_b6_str +800005f8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b7 +80008d84 l .data 00000000 Zbkb_rori_cg_cp_rd_b7_str +8000061c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b8 +80008db5 l .data 00000000 Zbkb_rori_cg_cp_rd_b8_str +80000640 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b9 +80008de6 l .data 00000000 Zbkb_rori_cg_cp_rd_b9_str +80000664 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b10 +80008e17 l .data 00000000 Zbkb_rori_cg_cp_rd_b10_str +80000688 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b11 +80008e49 l .data 00000000 Zbkb_rori_cg_cp_rd_b11_str +800006ac l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b12 +80008e7b l .data 00000000 Zbkb_rori_cg_cp_rd_b12_str +800006d8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b13 +80008ead l .data 00000000 Zbkb_rori_cg_cp_rd_b13_str +800006fc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b14 +80008edf l .data 00000000 Zbkb_rori_cg_cp_rd_b14_str +80000720 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b15 +80008f11 l .data 00000000 Zbkb_rori_cg_cp_rd_b15_str +80000744 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b16 +80008f43 l .data 00000000 Zbkb_rori_cg_cp_rd_b16_str +80000768 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b17 +80008f75 l .data 00000000 Zbkb_rori_cg_cp_rd_b17_str +8000078c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b18 +80008fa7 l .data 00000000 Zbkb_rori_cg_cp_rd_b18_str +800007b4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b19 +80008fd9 l .data 00000000 Zbkb_rori_cg_cp_rd_b19_str +800007d8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b20 +8000900b l .data 00000000 Zbkb_rori_cg_cp_rd_b20_str +800007fc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b21 +8000903d l .data 00000000 Zbkb_rori_cg_cp_rd_b21_str +80000820 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b22 +8000906f l .data 00000000 Zbkb_rori_cg_cp_rd_b22_str +80000844 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b23 +800090a1 l .data 00000000 Zbkb_rori_cg_cp_rd_b23_str +80000868 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b24 +800090d3 l .data 00000000 Zbkb_rori_cg_cp_rd_b24_str +8000088c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b25 +80009105 l .data 00000000 Zbkb_rori_cg_cp_rd_b25_str +800008b4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b26 +80009137 l .data 00000000 Zbkb_rori_cg_cp_rd_b26_str +800008d8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b27 +80009169 l .data 00000000 Zbkb_rori_cg_cp_rd_b27_str +800008fc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b28 +8000919b l .data 00000000 Zbkb_rori_cg_cp_rd_b28_str +80000924 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b29 +800091cd l .data 00000000 Zbkb_rori_cg_cp_rd_b29_str +8000094c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b30 +800091ff l .data 00000000 Zbkb_rori_cg_cp_rd_b30_str +80000970 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rd_b31 +80009231 l .data 00000000 Zbkb_rori_cg_cp_rd_b31_str +80000994 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x0 +80009263 l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x0_str +800009b8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x1 +8000929c l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x1_str +800009dc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x2 +800092d5 l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x2_str +80000a00 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x80000000 +8000930e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x80000000_str +80000a24 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x80000001 +8000934e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x80000001_str +80000a48 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x7fffffff +8000938e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x7fffffff_str +80000a6c l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x7ffffffe +800093ce l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x7ffffffe_str +80000a90 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0xffffffff +8000940e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0xffffffff_str +80000ab4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0xfffffffe +8000944e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0xfffffffe_str +80000ad8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x5bbc8872 +8000948e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x5bbc8872_str +80000afc l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaa +800094ce l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b20 l .text.rvtest 00000000 Zbkb_rori_cg_cp_rs1_edges_0x55555555 +8000950e l .data 00000000 Zbkb_rori_cg_cp_rs1_edges_0x55555555_str +80000b44 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b0 +8000954e l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b0_str +80000b68 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b1 +80009584 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b1_str +80000b90 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b2 +800095ba l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b2_str +80000bb4 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b3 +800095f0 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b3_str +80000bd8 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b4 +80009626 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b4_str +80000bfc l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b5 +8000965c l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b5_str +80000c20 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b6 +80009692 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b6_str +80000c4c l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b7 +800096c8 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b7_str +80000c70 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b8 +800096fe l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b8_str +80000c94 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b9 +80009734 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b9_str +80000cb8 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b10 +8000976a l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b10_str +80000cdc l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b11 +800097a1 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b11_str +80000d00 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b12 +800097d8 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b12_str +80000d24 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b13 +8000980f l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b13_str +80000d48 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b14 +80009846 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b14_str +80000d6c l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b15 +8000987d l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b15_str +80000d90 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b16 +800098b4 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b16_str +80000db8 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b17 +800098eb l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b17_str +80000ddc l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b18 +80009922 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b18_str +80000e00 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b19 +80009959 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b19_str +80000e28 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b20 +80009990 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b20_str +80000e4c l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b21 +800099c7 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b21_str +80000e74 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b22 +800099fe l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b22_str +80000e98 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b23 +80009a35 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b23_str +80000ebc l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b24 +80009a6d l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b24_str +80000ee0 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b25 +80009aa5 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b25_str +80000f04 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b26 +80009add l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b26_str +80000f2c l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b27 +80009b15 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b27_str +80000f50 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b28 +80009b4d l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b28_str +80000f74 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b29 +80009b85 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b29_str +80000f98 l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b30 +80009bbd l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b30_str +80000fbc l .text.rvtest 00000000 Zbkb_rori_cg_cmp_rd_rs1_b31 +80009bf5 l .data 00000000 Zbkb_rori_cg_cmp_rd_rs1_b31_str +80000fe0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm0 +80009c2d l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm0_str +80001004 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm1 +80009c64 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm1_str +80001028 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm2 +80009c9b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm2_str +8000104c l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm3 +80009cd2 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm3_str +80001070 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm4 +80009d09 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm4_str +80001094 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm5 +80009d40 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm5_str +800010b8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm6 +80009d77 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm6_str +800010dc l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm7 +80009dae l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm7_str +80001100 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm8 +80009de5 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm8_str +80001124 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm9 +80009e1c l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm9_str +80001148 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm10 +80009e53 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm10_str +8000116c l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm11 +80009e8b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm11_str +80001190 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm12 +80009ec3 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm12_str +800011b4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm13 +80009efb l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm13_str +800011d8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm14 +80009f33 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm14_str +800011fc l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm15 +80009f6b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm15_str +80001220 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm16 +80009fa3 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm16_str +80001244 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm17 +80009fdb l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm17_str +80001268 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm18 +8000a013 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm18_str +8000128c l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm19 +8000a04b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm19_str +800012b0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm20 +8000a083 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm20_str +800012d4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm21 +8000a0bb l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm21_str +800012f8 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm22 +8000a0f3 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm22_str +8000131c l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm23 +8000a12b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm23_str +80001340 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm24 +8000a163 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm24_str +80001364 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm25 +8000a19b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm25_str +80001388 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm26 +8000a1d3 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm26_str +800013ac l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm27 +8000a20b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm27_str +800013d0 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm28 +8000a243 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm28_str +800013f4 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm29 +8000a27b l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm29_str +80001418 l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm30 +8000a2b3 l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm30_str +8000143c l .text.rvtest 00000000 Zbkb_rori_cg_cp_uimm_uimm31 +8000a2eb l .data 00000000 Zbkb_rori_cg_cp_uimm_uimm31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +8000146c l .text.rvtest 00000000 exit_Mcleanup +80001470 l .text.rvtest 00000000 resto_Medeleg +80001478 l .text.rvtest 00000000 resto_Msatp +8000147c l .text.rvtest 00000000 resto_Mscratch +80001484 l .text.rvtest 00000000 resto_Mxtvec +80001498 l .text.rvtest 00000000 resto_Mtramp +8000149c l .text.rvtest 00000000 resto_Mloop +800014b4 l .text.rvtest 00000000 check_trap_sig_overflow +80001750 l .text.rvtest 00000000 trap_sig_overflow +800015f0 l .text.rvtest 00000000 check_trap_sig_offset +8000a9ae l .data 00000000 failstr +8001b564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000a9e7 l .data 00000000 begin_debugstr +8000aa47 l .data 00000000 trap_sig_overflowstr +8000b5f2 l .data 00000000 endstr +8001b5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +8000c2d8 l .data 00000000 trap_sigptr +8000c2d0 l .data 00000000 final_trap_sig_offset +800016b4 l .text.rvtest 00000000 check_abort_test +80002568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000ab9b l .data 00000000 trap_sig_offset_mismatch +800016d0 l .text.rvtest 00000000 exit_cleanup +80001784 l .text.rvtest 00000000 abort_test +8000aa09 l .data 00000000 abortstr +8000a974 l .data 00000000 successstr +8001b5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80001840 l .text.rvtest 00000000 trap_Mhandler +80001960 l .text.rvtest 00000000 rvtest_Mendtest +80001984 l .text.rvtest 00000000 common_Mhandler +800019f0 l .text.rvtest 00000000 spcl_M2mmode_test +800019fc l .text.rvtest 00000000 spcl_Mchk4alt +80001a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80001a04 l .text.rvtest 00000000 spcl_Mparam_chk +80002490 l .text.rvtest 00000000 Mrtn2mmode +80001f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001a18 l .text.rvtest 00000000 Mgoto_mchk +80001a1c l .text.rvtest 00000000 tsbi_Mdispatch +80001a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80001a34 l .text.rvtest 00000000 tsbi_Mecall_test +80001ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80002200 l .text.rvtest 00000000 resto_Mrtn +80001a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80001a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80001a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80001aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80001c30 l .text.rvtest 00000000 tsbi_instr_table +80001ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001af4 l .text.rvtest 00000000 found_instr +80001b38 l .text.rvtest 00000000 tsbi_instr_not_found +80001b24 l .text.rvtest 00000000 tsbi_instr_rtn +8000c029 l .data 00000000 tsbi_instr_not_found_str +80004018 l .text.rvtest 00000000 failedtest_hex_to_str +8000a498 l .data 00000000 ascii_buffer +8000aab0 l .data 00000000 newlinestr +80001fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80001f9c l .text.rvtest 00000000 Mint_sig_sv +80001fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000a478 l .data 00000000 saved_xepc +8001ad3c l .data 00000000 sig_end_canary +80002048 l .text.rvtest 00000000 sv_Mvect +8000abb2 l .data 00000000 sv_Mvect_str +800020ec l .text.rvtest 00000000 sv_Mcause +8000acb4 l .data 00000000 sv_Mcause_str +80002220 l .text.rvtest 00000000 common_Mint_handler +80002114 l .text.rvtest 00000000 common_Mexcpt_handler +80002120 l .text.rvtest 00000000 vmem_adj_Mepc +80002174 l .text.rvtest 00000000 sv_Mepc +80002148 l .text.rvtest 00000000 code_adj_Mepc +80002170 l .text.rvtest 00000000 adj_Mepc +8000215c l .text.rvtest 00000000 data_adj_Mepc +8000adaf l .data 00000000 sv_Mepc_str +80002194 l .text.rvtest 00000000 skpsv_Mepc +800021bc l .text.rvtest 00000000 adj_Mepc_rtn +800021c8 l .text.rvtest 00000000 skp_adj_Mepc +800021cc l .text.rvtest 00000000 sv_Mtval +8000aea2 l .data 00000000 sv_Mtval_str +800021ec l .text.rvtest 00000000 skp_Mtval +800021f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80002258 l .text.rvtest 00000000 spcl_Mhandler +80002234 l .text.rvtest 00000000 sv_Mip +8000b015 l .data 00000000 sv_Mip_str +80002274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000228c l .text.rvtest 00000000 spcl_Mdispatch +80002290 l .text.rvtest 00000000 clrint_Mtbl +8001b000 l .text.rvmodel 00000000 Mclr_Msw_int +8001b014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8001b030 l .text.rvmodel 00000000 Mclr_Mext_int +80002390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8001b048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001b05c l .text.rvmodel 00000000 Mclr_Stmr_int +8001b068 l .text.rvmodel 00000000 Mclr_Sext_int +8001b09c l .text.rvmodel 00000000 Mclr_Vsw_int +8001b0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8001b0cc l .text.rvmodel 00000000 Mclr_Vext_int +800024e0 l .text.rvtest 00000000 rtn_fm_mmode +800024cc l .text.rvtest 00000000 from_hs_u +800024bc l .text.rvtest 00000000 from_vs +8000a330 l .data 00000000 begin_failure_scratch +8000259c l .text.rvtest 00000000 failedtest_saveregs +8000260c l .text.rvtest 00000000 failedtest_saveresults +8000a330 l .data 00000000 failure_type +800027ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000261c l .text.rvtest 00000000 failedtest_saveresults_int +80002734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000276c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000a458 l .data 00000000 failure_diag_type +8000a468 l .data 00000000 trap_diag_fail_str_ptr +80002a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000a460 l .data 00000000 trap_diag_subtype +80002a74 l .text.rvtest 00000000 trap_diag_field_identified +8000af99 l .data 00000000 sv_Mtval2_str +8000afd7 l .data 00000000 sv_Mtinst_str +8000abf2 l .data 00000000 sv_Svect_str +8000acf2 l .data 00000000 sv_Scause_str +8000adeb l .data 00000000 sv_Sepc_str +8000aedf l .data 00000000 sv_Stval_str +8000b050 l .data 00000000 sv_Sip_str +8000ac32 l .data 00000000 sv_Hvect_str +8000ad30 l .data 00000000 sv_Hcause_str +8000ae27 l .data 00000000 sv_Hepc_str +8000af1c l .data 00000000 sv_Htval_str +8000b08b l .data 00000000 sv_Hip_str +8000ac73 l .data 00000000 sv_Vvect_str +8000ad6f l .data 00000000 sv_Vcause_str +8000ae64 l .data 00000000 sv_Vepc_str +8000af5a l .data 00000000 sv_Vtval_str +8000b0c7 l .data 00000000 sv_Vip_str +8000b104 l .data 00000000 Mclr_Mext_int_str +8000b153 l .data 00000000 Mclr_Sext_int_str +8000b24e l .data 00000000 Sclr_Sext_int_str +8000b34a l .data 00000000 Hclr_Sext_int_str +80002a90 l .text.rvtest 00000000 trap_diag_generic_report +8000a464 l .data 00000000 trap_diag_mode +80002ad0 l .text.rvtest 00000000 failedtest_report +80002ad0 l .text.rvtest 00000000 print_failstr +80002b48 l .text.rvtest 00000000 print_testnamestr +8000aa9e l .data 00000000 testnamestr +80002b88 l .text.rvtest 00000000 print_failure_test_name_str +8000a450 l .data 00000000 failure_string_ptr +80002b98 l .text.rvtest 00000000 print_newline_str +8000310c l .text.rvtest 00000000 failedtest_report_trap_detailed +8000aab2 l .data 00000000 inststr +8000a430 l .data 00000000 failing_instruction +8000aac6 l .data 00000000 addrstr +8000a438 l .data 00000000 failing_addr +8000b4fd l .data 00000000 regstr +80002d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000a434 l .data 00000000 failing_reg +80004094 l .text.rvtest 00000000 failedtest_dec_to_str +80002e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80002dcc l .text.rvtest 00000000 failedtest_report_fpreg +80002e18 l .text.rvtest 00000000 failedtest_report_vecreg +80002e54 l .text.rvtest 00000000 failedtest_report_vxsat +8000b613 l .data 00000000 fflagsstr +80002ec8 l .text.rvtest 00000000 failedtest_report_after_reg +8000b4f6 l .data 00000000 vxsatstr +8000b50e l .data 00000000 badvalstr +80002f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000a440 l .data 00000000 failing_value +80002f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000300c l .text.rvtest 00000000 failedtest_report_diag +8000b525 l .data 00000000 expvalstr +80002fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000a448 l .data 00000000 expected_value +80002fdc l .text.rvtest 00000000 failedtest_report_expval_done +80003dc4 l .text.rvtest 00000000 failedtest_report_end +8000308c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80003014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8000b53c l .data 00000000 failure_diag_bad_instr_str +8000b59a l .data 00000000 failure_diag_bad_ptr_str +800031d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8000b63f l .data 00000000 trap_diag_header_str +8000b66b l .data 00000000 trap_diag_origstr_label +80003c50 l .text.rvtest 00000000 trap_report_generic +8000350c l .text.rvtest 00000000 trap_report_field_mismatch +8000b67b l .data 00000000 trap_diag_expected_offset_str +8000b6a6 l .data 00000000 trap_diag_actual_offset_str +800033ec l .text.rvtest 00000000 trap_report_missing_traps +800032dc l .text.rvtest 00000000 trap_report_extra_traps +8000b6d5 l .data 00000000 trap_diag_extra_traps_str +8000b73d l .data 00000000 trap_diag_diff_bytes_str +8000b764 l .data 00000000 trap_diag_extra_next_step_str +8000b701 l .data 00000000 trap_diag_missing_traps_str +8000b84c l .data 00000000 trap_diag_missing_next_step_str +8000b933 l .data 00000000 trap_diag_handler_mode_str +800035a4 l .text.rvtest 00000000 trap_mode_m +800035e4 l .text.rvtest 00000000 trap_mode_s +80003624 l .text.rvtest 00000000 trap_mode_h +80003664 l .text.rvtest 00000000 trap_mode_v +8000b96f l .data 00000000 trap_diag_mode_unknown_str +800036a0 l .text.rvtest 00000000 trap_mode_print +8000b94d l .data 00000000 trap_diag_mode_m_str +8000b955 l .data 00000000 trap_diag_mode_s_str +8000b95d l .data 00000000 trap_diag_mode_hs_str +8000b966 l .data 00000000 trap_diag_mode_vs_str +8000b978 l .data 00000000 trap_diag_field_str +80003764 l .text.rvtest 00000000 trap_field_vect +800037a4 l .text.rvtest 00000000 trap_field_cause +800037e4 l .text.rvtest 00000000 trap_field_epc +80003824 l .text.rvtest 00000000 trap_field_tval +80003864 l .text.rvtest 00000000 trap_field_ip +800038a4 l .text.rvtest 00000000 trap_field_tval2 +800038e4 l .text.rvtest 00000000 trap_field_tinst +80003924 l .text.rvtest 00000000 trap_field_intid +8000bacf l .data 00000000 trap_diag_field_unknown_str +80003960 l .text.rvtest 00000000 trap_field_print +8000b992 l .data 00000000 trap_diag_field_vect_str +8000b9c3 l .data 00000000 trap_diag_field_cause_str +8000b9e3 l .data 00000000 trap_diag_field_epc_str +8000ba01 l .data 00000000 trap_diag_field_tval_str +8000ba20 l .data 00000000 trap_diag_field_ip_str +8000ba48 l .data 00000000 trap_diag_field_tval2_str +8000ba74 l .data 00000000 trap_diag_field_tinst_str +8000baa0 l .data 00000000 trap_diag_field_intid_str +8000bade l .data 00000000 trap_diag_expected_str +8000baf5 l .data 00000000 trap_diag_actual_str +80003afc l .text.rvtest 00000000 trap_field_not_cause +8000bb0c l .data 00000000 trap_diag_expected_cause_name_str +80003d34 l .text.rvtest 00000000 trap_cause_to_str +8000bb23 l .data 00000000 trap_diag_actual_cause_name_str +80003afc l .text.rvtest 00000000 trap_field_not_epc +80003e10 l .text.rvtest 00000000 failedtest_print_csr_context +8000bb99 l .data 00000000 trap_diag_hint_vect_str +8000bc6f l .data 00000000 trap_diag_hint_cause_str +8000bd62 l .data 00000000 trap_diag_hint_epc_str +8000be5d l .data 00000000 trap_diag_hint_tval_str +8000bf44 l .data 00000000 trap_diag_hint_ip_str +8000bb51 l .data 00000000 trap_diag_generic_str +8000ab3a l .data 00000000 xepcinstrstr +80003d58 l .text.rvtest 00000000 trap_cause_interrupt +80003d38 l .text.rvtest 00000000 trap_cause_exception +80003d84 l .text.rvtest 00000000 trap_cause_unknown +8000a4c0 l .data 00000000 trap_excpt_name_tbl +8000a520 l .data 00000000 trap_int_name_tbl +8000a95e l .data 00000000 trap_cause_unknown_str +80003e08 l .text.rvtest 00000000 failedtest_terminate +8000a470 l .data 00000000 csr_context_ret_addr +8000ab5b l .data 00000000 mepcstr +8000ab6b l .data 00000000 mcausestr +8000a480 l .data 00000000 saved_xcause +8000ab7b l .data 00000000 mtvalstr +8000a488 l .data 00000000 saved_xtval +8000ab8b l .data 00000000 mstatusstr +8000a490 l .data 00000000 saved_xstatus +80004058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80004074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80004078 l .text.rvtest 00000000 failedtest_hex_to_str_write +8001b0e4 l .text.rvmodel 00000000 uart_init +8001b0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8001b120 l .text.rvmodel 00000000 init_Mscratch +8001b128 l .text.rvmodel 00000000 init_Mtimecmp +8001b13c l .text.rvmodel 00000000 init_Medeleg +8001b144 l .text.rvmodel 00000000 init_Msatp +8001b144 l .text.rvmodel 00000000 init_Mtvec +8001b264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8001b224 l .text.rvmodel 00000000 abortMtest +8001b17c l .text.rvmodel 00000000 init_Mtramp +8001b1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8001b1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8001b214 l .text.rvmodel 00000000 endcopy_Mtramp +8001b268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8001b324 l .text.rvmodel 00000000 rvtest_init_regs +8000c070 l .data 00000000 signature_base +8001b4c0 l .text.rvmodel 00000000 canary_check +8000b61b l .data 00000000 canary_mismatch +8001b5b0 l .text.rvmodel 00000000 write_tohost_pass +8001b5b8 l .text.rvmodel 00000000 pass +8001b5d0 l .text.rvmodel 00000000 write_tohost_fail +8001b5d8 l .text.rvmodel 00000000 fail +8001b5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8001b5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8001b600 l .text.rvmodel 00000000 rvtest_set_mext_int +8001b614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000a4c0 l .data 00000000 end_failure_scratch +8000a560 l .data 00000000 trap_excpt_name_0 +8000a580 l .data 00000000 trap_excpt_name_1 +8000a59a l .data 00000000 trap_excpt_name_2 +8000a5af l .data 00000000 trap_excpt_name_3 +8000a5bb l .data 00000000 trap_excpt_name_4 +8000a5d4 l .data 00000000 trap_excpt_name_5 +8000a5e7 l .data 00000000 trap_excpt_name_6 +8000a605 l .data 00000000 trap_excpt_name_7 +8000a61d l .data 00000000 trap_excpt_name_8 +8000a63b l .data 00000000 trap_excpt_name_9 +8000a659 l .data 00000000 trap_excpt_name_10 +8000a678 l .data 00000000 trap_excpt_name_11 +8000a696 l .data 00000000 trap_excpt_name_12 +8000a6ae l .data 00000000 trap_excpt_name_13 +8000a6bf l .data 00000000 trap_excpt_name_14 +8000a6ce l .data 00000000 trap_excpt_name_15 +8000a6e4 l .data 00000000 trap_excpt_name_16 +8000a6f1 l .data 00000000 trap_excpt_name_17 +8000a700 l .data 00000000 trap_excpt_name_18 +8000a710 l .data 00000000 trap_excpt_name_19 +8000a720 l .data 00000000 trap_excpt_name_20 +8000a73e l .data 00000000 trap_excpt_name_21 +8000a755 l .data 00000000 trap_excpt_name_22 +8000a76a l .data 00000000 trap_excpt_name_23 +8000a786 l .data 00000000 trap_int_name_0 +8000a79e l .data 00000000 trap_int_name_1 +8000a7bd l .data 00000000 trap_int_name_2 +8000a7e4 l .data 00000000 trap_int_name_3 +8000a800 l .data 00000000 trap_int_name_4 +8000a818 l .data 00000000 trap_int_name_5 +8000a834 l .data 00000000 trap_int_name_6 +8000a858 l .data 00000000 trap_int_name_7 +8000a871 l .data 00000000 trap_int_name_8 +8000a889 l .data 00000000 trap_int_name_9 +8000a8a8 l .data 00000000 trap_int_name_10 +8000a8cf l .data 00000000 trap_int_name_11 +8000a8eb l .data 00000000 trap_int_name_12 +8000a910 l .data 00000000 trap_int_name_13 +8000a92c l .data 00000000 trap_int_name_14 +8000a945 l .data 00000000 trap_int_name_15 +8000ab07 l .data 00000000 xepcstr +8000b1a5 l .data 00000000 Mclr_Vext_int_str +8000b1ff l .data 00000000 Sclr_Mext_int_str +8000b2a0 l .data 00000000 Sclr_Vext_int_str +8000b2fa l .data 00000000 Hclr_Mext_int_str +8000b39d l .data 00000000 Hclr_Vext_int_str +8000b3f8 l .data 00000000 Vclr_Mext_int_str +8000b448 l .data 00000000 Vclr_Sext_int_str +8000b49b l .data 00000000 Vclr_Vext_int_str +8000bb3a l .data 00000000 trap_diag_curr_xepc_str +8001ad40 g .data 00000000 end_signature +8001b580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +8001ad40 g .data 00000000 rvtest_sig_end +80001998 g .text.rvtest 00000000 common_Mentry +800014b4 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +8000c070 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +8000145c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +8000c070 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8000c06d g .data 00000000 rvtest_data_end +8000145c g .text.rvtest 00000000 cleanup_epilogs +8001c000 g .text.rvmodel 00000000 _end +8001af00 g .tohost 00000000 fromhost +8001ae00 g .tohost 00000000 tohost +80001710 g .text.rvtest 00000000 rvtest_fail_summary +800017c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0001b097 auipc x1,0x1b +80000004: 0e408093 addi x1,x1,228 # 8001b0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x5c3eeb32 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zbkb_rori_cg_cp_rs1_b0: + rori x23, x0, 26 # perform operation +80000048: 61a05b93 rori x23,x0,0x1a + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b0, Zbkb_rori_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01720863 beq x4,x23,80000060 +80000054: 4ac022ef jal x5,80002500 +80000058: 80000048 .word 0x80000048 +8000005c: 800085e0 .word 0x800085e0 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1405ebd4 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zbkb_rori_cg_cp_rs1_b1: + rori x28, x1, 10 # perform operation +8000006c: 60a0de13 rori x28,x1,0xa + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_rori_cg_cp_rs1_b1, Zbkb_rori_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01c20863 beq x4,x28,80000084 +80000078: 488022ef jal x5,80002500 +8000007c: 8000006c .word 0x8000006c +80000080: 80008611 .word 0x80008611 +80000084: 00410113 addi x2,x2,4 + + mv x25, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xb8faba5b +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zbkb_rori_cg_cp_rs1_b2: + rori x24, x2, 8 # perform operation +80000094: 60815c13 rori x24,x2,0x8 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rori_cg_cp_rs1_b2, Zbkb_rori_cg_cp_rs1_b2_str) +80000098: 000ca203 lw x4,0(x25) +8000009c: 01820863 beq x4,x24,800000ac +800000a0: 460022ef jal x5,80002500 +800000a4: 80000094 .word 0x80000094 +800000a8: 80008642 .word 0x80008642 +800000ac: 004c8c93 addi x25,x25,4 + + mv x21, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018a93 addi x21,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x2e43a90d +800000b4: 000aa183 lw x3,0(x21) +800000b8: 004a8a93 addi x21,x21,4 + +800000bc : +Zbkb_rori_cg_cp_rs1_b3: + rori x29, x3, 17 # perform operation +800000bc: 6111de93 rori x29,x3,0x11 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_rori_cg_cp_rs1_b3, Zbkb_rori_cg_cp_rs1_b3_str) +800000c0: 000ca203 lw x4,0(x25) +800000c4: 01d20863 beq x4,x29,800000d4 +800000c8: 438022ef jal x5,80002500 +800000cc: 800000bc .word 0x800000bc +800000d0: 80008673 .word 0x80008673 +800000d4: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x2e51a28e +800000e0: 000aa203 lw x4,0(x21) +800000e4: 004a8a93 addi x21,x21,4 + +800000e8 : +Zbkb_rori_cg_cp_rs1_b4: + rori x29, x4, 5 # perform operation +800000e8: 60525e93 rori x29,x4,0x5 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zbkb_rori_cg_cp_rs1_b4, Zbkb_rori_cg_cp_rs1_b4_str) +800000ec: 000ca383 lw x7,0(x25) +800000f0: 01d38863 beq x7,x29,80000100 +800000f4: 4240246f jal x8,80002518 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 800086a4 .word 0x800086a4 +80000100: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x675c6a4c +80000104: 000aa283 lw x5,0(x21) +80000108: 004a8a93 addi x21,x21,4 + +8000010c : +Zbkb_rori_cg_cp_rs1_b5: + rori x6, x5, 2 # perform operation +8000010c: 6022d313 rori x6,x5,0x2 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zbkb_rori_cg_cp_rs1_b5, Zbkb_rori_cg_cp_rs1_b5_str) +80000110: 000ca383 lw x7,0(x25) +80000114: 00638863 beq x7,x6,80000124 +80000118: 4000246f jal x8,80002518 +8000011c: 8000010c .word 0x8000010c +80000120: 800086d5 .word 0x800086d5 +80000124: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xc9c40cc1 +80000128: 000aa303 lw x6,0(x21) +8000012c: 004a8a93 addi x21,x21,4 + +80000130 : +Zbkb_rori_cg_cp_rs1_b6: + rori x0, x6, 31 # perform operation +80000130: 61f35013 rori x0,x6,0x1f + # Check if x0 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x0, Zbkb_rori_cg_cp_rs1_b6, Zbkb_rori_cg_cp_rs1_b6_str) +80000134: 000ca383 lw x7,0(x25) +80000138: 00038863 beq x7,x0,80000148 +8000013c: 3dc0246f jal x8,80002518 +80000140: 80000130 .word 0x80000130 +80000144: 80008706 .word 0x80008706 +80000148: 004c8c93 addi x25,x25,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000014c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000150: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x6e0ce513 +80000154: 000aa383 lw x7,0(x21) +80000158: 004a8a93 addi x21,x21,4 + +8000015c : +Zbkb_rori_cg_cp_rs1_b7: + rori x10, x7, 16 # perform operation +8000015c: 6103d513 rori x10,x7,0x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zbkb_rori_cg_cp_rs1_b7, Zbkb_rori_cg_cp_rs1_b7_str) +80000160: 000ca683 lw x13,0(x25) +80000164: 00a68863 beq x13,x10,80000174 +80000168: 3d80276f jal x14,80002540 +8000016c: 8000015c .word 0x8000015c +80000170: 80008737 .word 0x80008737 +80000174: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x20464510 +80000178: 000aa403 lw x8,0(x21) +8000017c: 004a8a93 addi x21,x21,4 + +80000180 : +Zbkb_rori_cg_cp_rs1_b8: + rori x29, x8, 2 # perform operation +80000180: 60245e93 rori x29,x8,0x2 + # Check if x29 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x29, Zbkb_rori_cg_cp_rs1_b8, Zbkb_rori_cg_cp_rs1_b8_str) +80000184: 000ca683 lw x13,0(x25) +80000188: 01d68863 beq x13,x29,80000198 +8000018c: 3b40276f jal x14,80002540 +80000190: 80000180 .word 0x80000180 +80000194: 80008768 .word 0x80008768 +80000198: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xcd0ca5d2 +8000019c: 000aa483 lw x9,0(x21) +800001a0: 004a8a93 addi x21,x21,4 + +800001a4 : +Zbkb_rori_cg_cp_rs1_b9: + rori x18, x9, 13 # perform operation +800001a4: 60d4d913 rori x18,x9,0xd + # Check if x18 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x18, Zbkb_rori_cg_cp_rs1_b9, Zbkb_rori_cg_cp_rs1_b9_str) +800001a8: 000ca683 lw x13,0(x25) +800001ac: 01268863 beq x13,x18,800001bc +800001b0: 3900276f jal x14,80002540 +800001b4: 800001a4 .word 0x800001a4 +800001b8: 80008799 .word 0x80008799 +800001bc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x6b9a42eb +800001c0: 000aa503 lw x10,0(x21) +800001c4: 004a8a93 addi x21,x21,4 + +800001c8 : +Zbkb_rori_cg_cp_rs1_b10: + rori x19, x10, 1 # perform operation +800001c8: 60155993 rori x19,x10,0x1 + # Check if x19 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x19, Zbkb_rori_cg_cp_rs1_b10, Zbkb_rori_cg_cp_rs1_b10_str) +800001cc: 000ca683 lw x13,0(x25) +800001d0: 01368863 beq x13,x19,800001e0 +800001d4: 36c0276f jal x14,80002540 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 800087cb .word 0x800087cb +800001e0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x15e4d7da +800001e4: 000aa583 lw x11,0(x21) +800001e8: 004a8a93 addi x21,x21,4 + +800001ec : +Zbkb_rori_cg_cp_rs1_b11: + rori x15, x11, 10 # perform operation +800001ec: 60a5d793 rori x15,x11,0xa + # Check if x15 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x15, Zbkb_rori_cg_cp_rs1_b11, Zbkb_rori_cg_cp_rs1_b11_str) +800001f0: 000ca683 lw x13,0(x25) +800001f4: 00f68863 beq x13,x15,80000204 +800001f8: 3480276f jal x14,80002540 +800001fc: 800001ec .word 0x800001ec +80000200: 800087fe .word 0x800087fe +80000204: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xe7693c93 +80000208: 000aa603 lw x12,0(x21) +8000020c: 004a8a93 addi x21,x21,4 + +80000210 : +Zbkb_rori_cg_cp_rs1_b12: + rori x5, x12, 21 # perform operation +80000210: 61565293 rori x5,x12,0x15 + # Check if x5 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x5, Zbkb_rori_cg_cp_rs1_b12, Zbkb_rori_cg_cp_rs1_b12_str) +80000214: 000ca683 lw x13,0(x25) +80000218: 00568863 beq x13,x5,80000228 +8000021c: 3240276f jal x14,80002540 +80000220: 80000210 .word 0x80000210 +80000224: 80008831 .word 0x80008831 +80000228: 004c8c93 addi x25,x25,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000022c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000230: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x78682a97 +80000234: 000aa683 lw x13,0(x21) +80000238: 004a8a93 addi x21,x21,4 + +8000023c : +Zbkb_rori_cg_cp_rs1_b13: + rori x23, x13, 3 # perform operation +8000023c: 6036db93 rori x23,x13,0x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b13, Zbkb_rori_cg_cp_rs1_b13_str) +80000240: 000ca203 lw x4,0(x25) +80000244: 01720863 beq x4,x23,80000254 +80000248: 2b8022ef jal x5,80002500 +8000024c: 8000023c .word 0x8000023c +80000250: 80008864 .word 0x80008864 +80000254: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x6dabf6f2 +80000258: 000aa703 lw x14,0(x21) +8000025c: 004a8a93 addi x21,x21,4 + +80000260 : +Zbkb_rori_cg_cp_rs1_b14: + rori x26, x14, 10 # perform operation +80000260: 60a75d13 rori x26,x14,0xa + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zbkb_rori_cg_cp_rs1_b14, Zbkb_rori_cg_cp_rs1_b14_str) +80000264: 000ca203 lw x4,0(x25) +80000268: 01a20863 beq x4,x26,80000278 +8000026c: 294022ef jal x5,80002500 +80000270: 80000260 .word 0x80000260 +80000274: 80008897 .word 0x80008897 +80000278: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x93e4ae47 +8000027c: 000aa783 lw x15,0(x21) +80000280: 004a8a93 addi x21,x21,4 + +80000284 : +Zbkb_rori_cg_cp_rs1_b15: + rori x10, x15, 25 # perform operation +80000284: 6197d513 rori x10,x15,0x19 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zbkb_rori_cg_cp_rs1_b15, Zbkb_rori_cg_cp_rs1_b15_str) +80000288: 000ca203 lw x4,0(x25) +8000028c: 00a20863 beq x4,x10,8000029c +80000290: 270022ef jal x5,80002500 +80000294: 80000284 .word 0x80000284 +80000298: 800088ca .word 0x800088ca +8000029c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x5ff379d2 +800002a0: 000aa803 lw x16,0(x21) +800002a4: 004a8a93 addi x21,x21,4 + +800002a8 : +Zbkb_rori_cg_cp_rs1_b16: + rori x12, x16, 29 # perform operation +800002a8: 61d85613 rori x12,x16,0x1d + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_rori_cg_cp_rs1_b16, Zbkb_rori_cg_cp_rs1_b16_str) +800002ac: 000ca203 lw x4,0(x25) +800002b0: 00c20863 beq x4,x12,800002c0 +800002b4: 24c022ef jal x5,80002500 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 800088fd .word 0x800088fd +800002c0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xf4a2ebc1 +800002c4: 000aa883 lw x17,0(x21) +800002c8: 004a8a93 addi x21,x21,4 + +800002cc : +Zbkb_rori_cg_cp_rs1_b17: + rori x19, x17, 31 # perform operation +800002cc: 61f8d993 rori x19,x17,0x1f + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkb_rori_cg_cp_rs1_b17, Zbkb_rori_cg_cp_rs1_b17_str) +800002d0: 000ca203 lw x4,0(x25) +800002d4: 01320863 beq x4,x19,800002e4 +800002d8: 228022ef jal x5,80002500 +800002dc: 800002cc .word 0x800002cc +800002e0: 80008930 .word 0x80008930 +800002e4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x8818541f +800002e8: 000aa903 lw x18,0(x21) +800002ec: 004a8a93 addi x21,x21,4 + +800002f0 : +Zbkb_rori_cg_cp_rs1_b18: + rori x24, x18, 29 # perform operation +800002f0: 61d95c13 rori x24,x18,0x1d + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rori_cg_cp_rs1_b18, Zbkb_rori_cg_cp_rs1_b18_str) +800002f4: 000ca203 lw x4,0(x25) +800002f8: 01820863 beq x4,x24,80000308 +800002fc: 204022ef jal x5,80002500 +80000300: 800002f0 .word 0x800002f0 +80000304: 80008963 .word 0x80008963 +80000308: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x28f10089 +8000030c: 000aa983 lw x19,0(x21) +80000310: 004a8a93 addi x21,x21,4 + +80000314 : +Zbkb_rori_cg_cp_rs1_b19: + rori x12, x19, 30 # perform operation +80000314: 61e9d613 rori x12,x19,0x1e + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_rori_cg_cp_rs1_b19, Zbkb_rori_cg_cp_rs1_b19_str) +80000318: 000ca203 lw x4,0(x25) +8000031c: 00c20863 beq x4,x12,8000032c +80000320: 1e0022ef jal x5,80002500 +80000324: 80000314 .word 0x80000314 +80000328: 80008996 .word 0x80008996 +8000032c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xd35bacb5 +80000330: 000aaa03 lw x20,0(x21) +80000334: 004a8a93 addi x21,x21,4 + +80000338 : +Zbkb_rori_cg_cp_rs1_b20: + rori x24, x20, 8 # perform operation +80000338: 608a5c13 rori x24,x20,0x8 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rori_cg_cp_rs1_b20, Zbkb_rori_cg_cp_rs1_b20_str) +8000033c: 000ca203 lw x4,0(x25) +80000340: 01820863 beq x4,x24,80000350 +80000344: 1bc022ef jal x5,80002500 +80000348: 80000338 .word 0x80000338 +8000034c: 800089c9 .word 0x800089c9 +80000350: 004c8c93 addi x25,x25,4 + + mv x19, x21 # switch data pointer register to avoid conflict with test +80000354: 000a8993 addi x19,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x3756d657 +80000358: 0009aa83 lw x21,0(x19) +8000035c: 00498993 addi x19,x19,4 + +80000360 : +Zbkb_rori_cg_cp_rs1_b21: + rori x2, x21, 21 # perform operation +80000360: 615ad113 rori x2,x21,0x15 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_rori_cg_cp_rs1_b21, Zbkb_rori_cg_cp_rs1_b21_str) +80000364: 000ca203 lw x4,0(x25) +80000368: 00220863 beq x4,x2,80000378 +8000036c: 194022ef jal x5,80002500 +80000370: 80000360 .word 0x80000360 +80000374: 800089fc .word 0x800089fc +80000378: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x98e7ab46 +8000037c: 0009ab03 lw x22,0(x19) +80000380: 00498993 addi x19,x19,4 + +80000384 : +Zbkb_rori_cg_cp_rs1_b22: + rori x30, x22, 28 # perform operation +80000384: 61cb5f13 rori x30,x22,0x1c + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkb_rori_cg_cp_rs1_b22, Zbkb_rori_cg_cp_rs1_b22_str) +80000388: 000ca203 lw x4,0(x25) +8000038c: 01e20863 beq x4,x30,8000039c +80000390: 170022ef jal x5,80002500 +80000394: 80000384 .word 0x80000384 +80000398: 80008a2f .word 0x80008a2f +8000039c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x3d0281f3 +800003a0: 0009ab83 lw x23,0(x19) +800003a4: 00498993 addi x19,x19,4 + +800003a8 : +Zbkb_rori_cg_cp_rs1_b23: + rori x22, x23, 13 # perform operation +800003a8: 60dbdb13 rori x22,x23,0xd + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_rori_cg_cp_rs1_b23, Zbkb_rori_cg_cp_rs1_b23_str) +800003ac: 000ca203 lw x4,0(x25) +800003b0: 01620863 beq x4,x22,800003c0 +800003b4: 14c022ef jal x5,80002500 +800003b8: 800003a8 .word 0x800003a8 +800003bc: 80008a62 .word 0x80008a62 +800003c0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x99044524 +800003c4: 0009ac03 lw x24,0(x19) +800003c8: 00498993 addi x19,x19,4 + +800003cc : +Zbkb_rori_cg_cp_rs1_b24: + rori x31, x24, 4 # perform operation +800003cc: 604c5f93 rori x31,x24,0x4 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rori_cg_cp_rs1_b24, Zbkb_rori_cg_cp_rs1_b24_str) +800003d0: 000ca203 lw x4,0(x25) +800003d4: 01f20863 beq x4,x31,800003e4 +800003d8: 128022ef jal x5,80002500 +800003dc: 800003cc .word 0x800003cc +800003e0: 80008a95 .word 0x80008a95 +800003e4: 004c8c93 addi x25,x25,4 + + mv x3, x25 # switch signature pointer register to avoid conflict with test +800003e8: 000c8193 addi x3,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0xe95f4971 +800003ec: 0009ac83 lw x25,0(x19) +800003f0: 00498993 addi x19,x19,4 + +800003f4 : +Zbkb_rori_cg_cp_rs1_b25: + rori x22, x25, 28 # perform operation +800003f4: 61ccdb13 rori x22,x25,0x1c + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkb_rori_cg_cp_rs1_b25, Zbkb_rori_cg_cp_rs1_b25_str) +800003f8: 0001a203 lw x4,0(x3) +800003fc: 01620863 beq x4,x22,8000040c +80000400: 100022ef jal x5,80002500 +80000404: 800003f4 .word 0x800003f4 +80000408: 80008ac8 .word 0x80008ac8 +8000040c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x9f317603 +80000410: 0009ad03 lw x26,0(x19) +80000414: 00498993 addi x19,x19,4 + +80000418 : +Zbkb_rori_cg_cp_rs1_b26: + rori x14, x26, 23 # perform operation +80000418: 617d5713 rori x14,x26,0x17 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkb_rori_cg_cp_rs1_b26, Zbkb_rori_cg_cp_rs1_b26_str) +8000041c: 0001a203 lw x4,0(x3) +80000420: 00e20863 beq x4,x14,80000430 +80000424: 0dc022ef jal x5,80002500 +80000428: 80000418 .word 0x80000418 +8000042c: 80008afb .word 0x80008afb +80000430: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x8d4b95a5 +80000434: 0009ad83 lw x27,0(x19) +80000438: 00498993 addi x19,x19,4 + +8000043c : +Zbkb_rori_cg_cp_rs1_b27: + rori x30, x27, 3 # perform operation +8000043c: 603ddf13 rori x30,x27,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkb_rori_cg_cp_rs1_b27, Zbkb_rori_cg_cp_rs1_b27_str) +80000440: 0001a203 lw x4,0(x3) +80000444: 01e20863 beq x4,x30,80000454 +80000448: 0b8022ef jal x5,80002500 +8000044c: 8000043c .word 0x8000043c +80000450: 80008b2e .word 0x80008b2e +80000454: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xd571727a +80000458: 0009ae03 lw x28,0(x19) +8000045c: 00498993 addi x19,x19,4 + +80000460 : +Zbkb_rori_cg_cp_rs1_b28: + rori x23, x28, 7 # perform operation +80000460: 607e5b93 rori x23,x28,0x7 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b28, Zbkb_rori_cg_cp_rs1_b28_str) +80000464: 0001a203 lw x4,0(x3) +80000468: 01720863 beq x4,x23,80000478 +8000046c: 094022ef jal x5,80002500 +80000470: 80000460 .word 0x80000460 +80000474: 80008b61 .word 0x80008b61 +80000478: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x1dc15093 +8000047c: 0009ae83 lw x29,0(x19) +80000480: 00498993 addi x19,x19,4 + +80000484 : +Zbkb_rori_cg_cp_rs1_b29: + rori x8, x29, 1 # perform operation +80000484: 601ed413 rori x8,x29,0x1 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkb_rori_cg_cp_rs1_b29, Zbkb_rori_cg_cp_rs1_b29_str) +80000488: 0001a203 lw x4,0(x3) +8000048c: 00820863 beq x4,x8,8000049c +80000490: 070022ef jal x5,80002500 +80000494: 80000484 .word 0x80000484 +80000498: 80008b94 .word 0x80008b94 +8000049c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x1552f34f +800004a0: 0009af03 lw x30,0(x19) +800004a4: 00498993 addi x19,x19,4 + +800004a8 : +Zbkb_rori_cg_cp_rs1_b30: + rori x23, x30, 15 # perform operation +800004a8: 60ff5b93 rori x23,x30,0xf + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b30, Zbkb_rori_cg_cp_rs1_b30_str) +800004ac: 0001a203 lw x4,0(x3) +800004b0: 01720863 beq x4,x23,800004c0 +800004b4: 04c022ef jal x5,80002500 +800004b8: 800004a8 .word 0x800004a8 +800004bc: 80008bc7 .word 0x80008bc7 +800004c0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x4b2d8f89 +800004c4: 0009af83 lw x31,0(x19) +800004c8: 00498993 addi x19,x19,4 + +800004cc : +Zbkb_rori_cg_cp_rs1_b31: + rori x14, x31, 8 # perform operation +800004cc: 608fd713 rori x14,x31,0x8 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkb_rori_cg_cp_rs1_b31, Zbkb_rori_cg_cp_rs1_b31_str) +800004d0: 0001a203 lw x4,0(x3) +800004d4: 00e20863 beq x4,x14,800004e4 +800004d8: 028022ef jal x5,80002500 +800004dc: 800004cc .word 0x800004cc +800004e0: 80008bfa .word 0x80008bfa +800004e4: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x078d2785 +800004e8: 0009a383 lw x7,0(x19) +800004ec: 00498993 addi x19,x19,4 + +800004f0 : +Zbkb_rori_cg_cp_rd_b0: + rori x0, x7, 7 # perform operation +800004f0: 6073d013 rori x0,x7,0x7 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_rori_cg_cp_rd_b0, Zbkb_rori_cg_cp_rd_b0_str) +800004f4: 0001a203 lw x4,0(x3) +800004f8: 00020863 beq x4,x0,80000508 +800004fc: 004022ef jal x5,80002500 +80000500: 800004f0 .word 0x800004f0 +80000504: 80008c2d .word 0x80008c2d +80000508: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x347104a6 +8000050c: 0009a483 lw x9,0(x19) +80000510: 00498993 addi x19,x19,4 + +80000514 : +Zbkb_rori_cg_cp_rd_b1: + rori x1, x9, 27 # perform operation +80000514: 61b4d093 rori x1,x9,0x1b + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_rori_cg_cp_rd_b1, Zbkb_rori_cg_cp_rd_b1_str) +80000518: 0001a203 lw x4,0(x3) +8000051c: 00120863 beq x4,x1,8000052c +80000520: 7e1012ef jal x5,80002500 +80000524: 80000514 .word 0x80000514 +80000528: 80008c5e .word 0x80008c5e +8000052c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x03d1c3e9 +80000530: 0009a303 lw x6,0(x19) +80000534: 00498993 addi x19,x19,4 + +80000538 : +Zbkb_rori_cg_cp_rd_b2: + rori x2, x6, 23 # perform operation +80000538: 61735113 rori x2,x6,0x17 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_rori_cg_cp_rd_b2, Zbkb_rori_cg_cp_rd_b2_str) +8000053c: 0001a203 lw x4,0(x3) +80000540: 00220863 beq x4,x2,80000550 +80000544: 7bd012ef jal x5,80002500 +80000548: 80000538 .word 0x80000538 +8000054c: 80008c8f .word 0x80008c8f +80000550: 00418193 addi x3,x3,4 + + mv x29, x3 # switch signature pointer register to avoid conflict with test +80000554: 00018e93 addi x29,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x2600bbd7 +80000558: 0009a003 lw x0,0(x19) +8000055c: 00498993 addi x19,x19,4 + +80000560 : +Zbkb_rori_cg_cp_rd_b3: + rori x3, x0, 21 # perform operation +80000560: 61505193 rori x3,x0,0x15 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zbkb_rori_cg_cp_rd_b3, Zbkb_rori_cg_cp_rd_b3_str) +80000564: 000ea203 lw x4,0(x29) +80000568: 00320863 beq x4,x3,80000578 +8000056c: 795012ef jal x5,80002500 +80000570: 80000560 .word 0x80000560 +80000574: 80008cc0 .word 0x80008cc0 +80000578: 004e8e93 addi x29,x29,4 + + mv x13, x4 # switch temp register to avoid conflict with test +8000057c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000580: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x277c2f7f +80000584: 0009af83 lw x31,0(x19) +80000588: 00498993 addi x19,x19,4 + +8000058c : +Zbkb_rori_cg_cp_rd_b4: + rori x4, x31, 17 # perform operation +8000058c: 611fd213 rori x4,x31,0x11 + # Check if x4 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x4, Zbkb_rori_cg_cp_rd_b4, Zbkb_rori_cg_cp_rd_b4_str) +80000590: 000ea683 lw x13,0(x29) +80000594: 00468863 beq x13,x4,800005a4 +80000598: 7a90176f jal x14,80002540 +8000059c: 8000058c .word 0x8000058c +800005a0: 80008cf1 .word 0x80008cf1 +800005a4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xd395b3d2 +800005a8: 0009a583 lw x11,0(x19) +800005ac: 00498993 addi x19,x19,4 + +800005b0 : +Zbkb_rori_cg_cp_rd_b5: + rori x5, x11, 5 # perform operation +800005b0: 6055d293 rori x5,x11,0x5 + # Check if x5 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x5, Zbkb_rori_cg_cp_rd_b5, Zbkb_rori_cg_cp_rd_b5_str) +800005b4: 000ea683 lw x13,0(x29) +800005b8: 00568863 beq x13,x5,800005c8 +800005bc: 7850176f jal x14,80002540 +800005c0: 800005b0 .word 0x800005b0 +800005c4: 80008d22 .word 0x80008d22 +800005c8: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x12bdc795 +800005cc: 0009a183 lw x3,0(x19) +800005d0: 00498993 addi x19,x19,4 + +800005d4 : +Zbkb_rori_cg_cp_rd_b6: + rori x6, x3, 2 # perform operation +800005d4: 6021d313 rori x6,x3,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x6, Zbkb_rori_cg_cp_rd_b6, Zbkb_rori_cg_cp_rd_b6_str) +800005d8: 000ea683 lw x13,0(x29) +800005dc: 00668863 beq x13,x6,800005ec +800005e0: 7610176f jal x14,80002540 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 80008d53 .word 0x80008d53 +800005ec: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xdcb78c8f +800005f0: 0009a303 lw x6,0(x19) +800005f4: 00498993 addi x19,x19,4 + +800005f8 : +Zbkb_rori_cg_cp_rd_b7: + rori x7, x6, 0 # perform operation +800005f8: 60035393 rori x7,x6,0x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x7, Zbkb_rori_cg_cp_rd_b7, Zbkb_rori_cg_cp_rd_b7_str) +800005fc: 000ea683 lw x13,0(x29) +80000600: 00768863 beq x13,x7,80000610 +80000604: 73d0176f jal x14,80002540 +80000608: 800005f8 .word 0x800005f8 +8000060c: 80008d84 .word 0x80008d84 +80000610: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xf0498c2c +80000614: 0009a183 lw x3,0(x19) +80000618: 00498993 addi x19,x19,4 + +8000061c : +Zbkb_rori_cg_cp_rd_b8: + rori x8, x3, 14 # perform operation +8000061c: 60e1d413 rori x8,x3,0xe + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zbkb_rori_cg_cp_rd_b8, Zbkb_rori_cg_cp_rd_b8_str) +80000620: 000ea683 lw x13,0(x29) +80000624: 00868863 beq x13,x8,80000634 +80000628: 7190176f jal x14,80002540 +8000062c: 8000061c .word 0x8000061c +80000630: 80008db5 .word 0x80008db5 +80000634: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xf36f8361 +80000638: 0009a203 lw x4,0(x19) +8000063c: 00498993 addi x19,x19,4 + +80000640 : +Zbkb_rori_cg_cp_rd_b9: + rori x9, x4, 26 # perform operation +80000640: 61a25493 rori x9,x4,0x1a + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zbkb_rori_cg_cp_rd_b9, Zbkb_rori_cg_cp_rd_b9_str) +80000644: 000ea683 lw x13,0(x29) +80000648: 00968863 beq x13,x9,80000658 +8000064c: 6f50176f jal x14,80002540 +80000650: 80000640 .word 0x80000640 +80000654: 80008de6 .word 0x80008de6 +80000658: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x0476a0c7 +8000065c: 0009ac83 lw x25,0(x19) +80000660: 00498993 addi x19,x19,4 + +80000664 : +Zbkb_rori_cg_cp_rd_b10: + rori x10, x25, 25 # perform operation +80000664: 619cd513 rori x10,x25,0x19 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zbkb_rori_cg_cp_rd_b10, Zbkb_rori_cg_cp_rd_b10_str) +80000668: 000ea683 lw x13,0(x29) +8000066c: 00a68863 beq x13,x10,8000067c +80000670: 6d10176f jal x14,80002540 +80000674: 80000664 .word 0x80000664 +80000678: 80008e17 .word 0x80008e17 +8000067c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xae67c6bf +80000680: 0009ab83 lw x23,0(x19) +80000684: 00498993 addi x19,x19,4 + +80000688 : +Zbkb_rori_cg_cp_rd_b11: + rori x11, x23, 27 # perform operation +80000688: 61bbd593 rori x11,x23,0x1b + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zbkb_rori_cg_cp_rd_b11, Zbkb_rori_cg_cp_rd_b11_str) +8000068c: 000ea683 lw x13,0(x29) +80000690: 00b68863 beq x13,x11,800006a0 +80000694: 6ad0176f jal x14,80002540 +80000698: 80000688 .word 0x80000688 +8000069c: 80008e49 .word 0x80008e49 +800006a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xbdbd1991 +800006a4: 0009a783 lw x15,0(x19) +800006a8: 00498993 addi x19,x19,4 + +800006ac : +Zbkb_rori_cg_cp_rd_b12: + rori x12, x15, 28 # perform operation +800006ac: 61c7d613 rori x12,x15,0x1c + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zbkb_rori_cg_cp_rd_b12, Zbkb_rori_cg_cp_rd_b12_str) +800006b0: 000ea683 lw x13,0(x29) +800006b4: 00c68863 beq x13,x12,800006c4 +800006b8: 6890176f jal x14,80002540 +800006bc: 800006ac .word 0x800006ac +800006c0: 80008e7b .word 0x80008e7b +800006c4: 004e8e93 addi x29,x29,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800006c8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800006cc: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x9d95d60b +800006d0: 0009ab03 lw x22,0(x19) +800006d4: 00498993 addi x19,x19,4 + +800006d8 : +Zbkb_rori_cg_cp_rd_b13: + rori x13, x22, 11 # perform operation +800006d8: 60bb5693 rori x13,x22,0xb + # Check if x13 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x13, Zbkb_rori_cg_cp_rd_b13, Zbkb_rori_cg_cp_rd_b13_str) +800006dc: 000ea383 lw x7,0(x29) +800006e0: 00d38863 beq x7,x13,800006f0 +800006e4: 6350146f jal x8,80002518 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80008ead .word 0x80008ead +800006f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x5925b1e4 +800006f4: 0009a783 lw x15,0(x19) +800006f8: 00498993 addi x19,x19,4 + +800006fc : +Zbkb_rori_cg_cp_rd_b14: + rori x14, x15, 4 # perform operation +800006fc: 6047d713 rori x14,x15,0x4 + # Check if x14 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x14, Zbkb_rori_cg_cp_rd_b14, Zbkb_rori_cg_cp_rd_b14_str) +80000700: 000ea383 lw x7,0(x29) +80000704: 00e38863 beq x7,x14,80000714 +80000708: 6110146f jal x8,80002518 +8000070c: 800006fc .word 0x800006fc +80000710: 80008edf .word 0x80008edf +80000714: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x1d34e1d1 +80000718: 0009a183 lw x3,0(x19) +8000071c: 00498993 addi x19,x19,4 + +80000720 : +Zbkb_rori_cg_cp_rd_b15: + rori x15, x3, 28 # perform operation +80000720: 61c1d793 rori x15,x3,0x1c + # Check if x15 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x15, Zbkb_rori_cg_cp_rd_b15, Zbkb_rori_cg_cp_rd_b15_str) +80000724: 000ea383 lw x7,0(x29) +80000728: 00f38863 beq x7,x15,80000738 +8000072c: 5ed0146f jal x8,80002518 +80000730: 80000720 .word 0x80000720 +80000734: 80008f11 .word 0x80008f11 +80000738: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x736eb635 +8000073c: 0009a683 lw x13,0(x19) +80000740: 00498993 addi x19,x19,4 + +80000744 : +Zbkb_rori_cg_cp_rd_b16: + rori x16, x13, 18 # perform operation +80000744: 6126d813 rori x16,x13,0x12 + # Check if x16 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x16, Zbkb_rori_cg_cp_rd_b16, Zbkb_rori_cg_cp_rd_b16_str) +80000748: 000ea383 lw x7,0(x29) +8000074c: 01038863 beq x7,x16,8000075c +80000750: 5c90146f jal x8,80002518 +80000754: 80000744 .word 0x80000744 +80000758: 80008f43 .word 0x80008f43 +8000075c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x5e9689d4 +80000760: 0009a803 lw x16,0(x19) +80000764: 00498993 addi x19,x19,4 + +80000768 : +Zbkb_rori_cg_cp_rd_b17: + rori x17, x16, 18 # perform operation +80000768: 61285893 rori x17,x16,0x12 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zbkb_rori_cg_cp_rd_b17, Zbkb_rori_cg_cp_rd_b17_str) +8000076c: 000ea383 lw x7,0(x29) +80000770: 01138863 beq x7,x17,80000780 +80000774: 5a50146f jal x8,80002518 +80000778: 80000768 .word 0x80000768 +8000077c: 80008f75 .word 0x80008f75 +80000780: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x36a7981f +80000784: 0009aa03 lw x20,0(x19) +80000788: 00498993 addi x19,x19,4 + +8000078c : +Zbkb_rori_cg_cp_rd_b18: + rori x18, x20, 10 # perform operation +8000078c: 60aa5913 rori x18,x20,0xa + # Check if x18 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x18, Zbkb_rori_cg_cp_rd_b18, Zbkb_rori_cg_cp_rd_b18_str) +80000790: 000ea383 lw x7,0(x29) +80000794: 01238863 beq x7,x18,800007a4 +80000798: 5810146f jal x8,80002518 +8000079c: 8000078c .word 0x8000078c +800007a0: 80008fa7 .word 0x80008fa7 +800007a4: 004e8e93 addi x29,x29,4 + + mv x26, x19 # switch data pointer register to avoid conflict with test +800007a8: 00098d13 addi x26,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xe022526c +800007ac: 000d2603 lw x12,0(x26) +800007b0: 004d0d13 addi x26,x26,4 + +800007b4 : +Zbkb_rori_cg_cp_rd_b19: + rori x19, x12, 5 # perform operation +800007b4: 60565993 rori x19,x12,0x5 + # Check if x19 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x19, Zbkb_rori_cg_cp_rd_b19, Zbkb_rori_cg_cp_rd_b19_str) +800007b8: 000ea383 lw x7,0(x29) +800007bc: 01338863 beq x7,x19,800007cc +800007c0: 5590146f jal x8,80002518 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80008fd9 .word 0x80008fd9 +800007cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xe992d444 +800007d0: 000d2c03 lw x24,0(x26) +800007d4: 004d0d13 addi x26,x26,4 + +800007d8 : +Zbkb_rori_cg_cp_rd_b20: + rori x20, x24, 16 # perform operation +800007d8: 610c5a13 rori x20,x24,0x10 + # Check if x20 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x20, Zbkb_rori_cg_cp_rd_b20, Zbkb_rori_cg_cp_rd_b20_str) +800007dc: 000ea383 lw x7,0(x29) +800007e0: 01438863 beq x7,x20,800007f0 +800007e4: 5350146f jal x8,80002518 +800007e8: 800007d8 .word 0x800007d8 +800007ec: 8000900b .word 0x8000900b +800007f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xc8f07d9d +800007f4: 000d2a03 lw x20,0(x26) +800007f8: 004d0d13 addi x26,x26,4 + +800007fc : +Zbkb_rori_cg_cp_rd_b21: + rori x21, x20, 5 # perform operation +800007fc: 605a5a93 rori x21,x20,0x5 + # Check if x21 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x21, Zbkb_rori_cg_cp_rd_b21, Zbkb_rori_cg_cp_rd_b21_str) +80000800: 000ea383 lw x7,0(x29) +80000804: 01538863 beq x7,x21,80000814 +80000808: 5110146f jal x8,80002518 +8000080c: 800007fc .word 0x800007fc +80000810: 8000903d .word 0x8000903d +80000814: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xd473b687 +80000818: 000d2883 lw x17,0(x26) +8000081c: 004d0d13 addi x26,x26,4 + +80000820 : +Zbkb_rori_cg_cp_rd_b22: + rori x22, x17, 8 # perform operation +80000820: 6088db13 rori x22,x17,0x8 + # Check if x22 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x22, Zbkb_rori_cg_cp_rd_b22, Zbkb_rori_cg_cp_rd_b22_str) +80000824: 000ea383 lw x7,0(x29) +80000828: 01638863 beq x7,x22,80000838 +8000082c: 4ed0146f jal x8,80002518 +80000830: 80000820 .word 0x80000820 +80000834: 8000906f .word 0x8000906f +80000838: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x769a4f0f +8000083c: 000d2903 lw x18,0(x26) +80000840: 004d0d13 addi x26,x26,4 + +80000844 : +Zbkb_rori_cg_cp_rd_b23: + rori x23, x18, 11 # perform operation +80000844: 60b95b93 rori x23,x18,0xb + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zbkb_rori_cg_cp_rd_b23, Zbkb_rori_cg_cp_rd_b23_str) +80000848: 000ea383 lw x7,0(x29) +8000084c: 01738863 beq x7,x23,8000085c +80000850: 4c90146f jal x8,80002518 +80000854: 80000844 .word 0x80000844 +80000858: 800090a1 .word 0x800090a1 +8000085c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x4c602094 +80000860: 000d2483 lw x9,0(x26) +80000864: 004d0d13 addi x26,x26,4 + +80000868 : +Zbkb_rori_cg_cp_rd_b24: + rori x24, x9, 14 # perform operation +80000868: 60e4dc13 rori x24,x9,0xe + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zbkb_rori_cg_cp_rd_b24, Zbkb_rori_cg_cp_rd_b24_str) +8000086c: 000ea383 lw x7,0(x29) +80000870: 01838863 beq x7,x24,80000880 +80000874: 4a50146f jal x8,80002518 +80000878: 80000868 .word 0x80000868 +8000087c: 800090d3 .word 0x800090d3 +80000880: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x9f49f6b2 +80000884: 000d2603 lw x12,0(x26) +80000888: 004d0d13 addi x26,x26,4 + +8000088c : +Zbkb_rori_cg_cp_rd_b25: + rori x25, x12, 17 # perform operation +8000088c: 61165c93 rori x25,x12,0x11 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zbkb_rori_cg_cp_rd_b25, Zbkb_rori_cg_cp_rd_b25_str) +80000890: 000ea383 lw x7,0(x29) +80000894: 01938863 beq x7,x25,800008a4 +80000898: 4810146f jal x8,80002518 +8000089c: 8000088c .word 0x8000088c +800008a0: 80009105 .word 0x80009105 +800008a4: 004e8e93 addi x29,x29,4 + + mv x2, x26 # switch data pointer register to avoid conflict with test +800008a8: 000d0113 addi x2,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x96b56ba8 +800008ac: 00012783 lw x15,0(x2) +800008b0: 00410113 addi x2,x2,4 + +800008b4 : +Zbkb_rori_cg_cp_rd_b26: + rori x26, x15, 20 # perform operation +800008b4: 6147dd13 rori x26,x15,0x14 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkb_rori_cg_cp_rd_b26, Zbkb_rori_cg_cp_rd_b26_str) +800008b8: 000ea383 lw x7,0(x29) +800008bc: 01a38863 beq x7,x26,800008cc +800008c0: 4590146f jal x8,80002518 +800008c4: 800008b4 .word 0x800008b4 +800008c8: 80009137 .word 0x80009137 +800008cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xa0a8b8da +800008d0: 00012783 lw x15,0(x2) +800008d4: 00410113 addi x2,x2,4 + +800008d8 : +Zbkb_rori_cg_cp_rd_b27: + rori x27, x15, 6 # perform operation +800008d8: 6067dd93 rori x27,x15,0x6 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zbkb_rori_cg_cp_rd_b27, Zbkb_rori_cg_cp_rd_b27_str) +800008dc: 000ea383 lw x7,0(x29) +800008e0: 01b38863 beq x7,x27,800008f0 +800008e4: 4350146f jal x8,80002518 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 80009169 .word 0x80009169 +800008f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x111dd46f +800008f4: 00012983 lw x19,0(x2) +800008f8: 00410113 addi x2,x2,4 + +800008fc : +Zbkb_rori_cg_cp_rd_b28: + rori x28, x19, 1 # perform operation +800008fc: 6019de13 rori x28,x19,0x1 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_rori_cg_cp_rd_b28, Zbkb_rori_cg_cp_rd_b28_str) +80000900: 000ea383 lw x7,0(x29) +80000904: 01c38863 beq x7,x28,80000914 +80000908: 4110146f jal x8,80002518 +8000090c: 800008fc .word 0x800008fc +80000910: 8000919b .word 0x8000919b +80000914: 004e8e93 addi x29,x29,4 + + mv x30, x29 # switch signature pointer register to avoid conflict with test +80000918: 000e8f13 addi x30,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xc9fad2d0 +8000091c: 00012e03 lw x28,0(x2) +80000920: 00410113 addi x2,x2,4 + +80000924 : +Zbkb_rori_cg_cp_rd_b29: + rori x29, x28, 11 # perform operation +80000924: 60be5e93 rori x29,x28,0xb + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkb_rori_cg_cp_rd_b29, Zbkb_rori_cg_cp_rd_b29_str) +80000928: 000f2383 lw x7,0(x30) +8000092c: 01d38863 beq x7,x29,8000093c +80000930: 3e90146f jal x8,80002518 +80000934: 80000924 .word 0x80000924 +80000938: 800091cd .word 0x800091cd +8000093c: 004f0f13 addi x30,x30,4 + + mv x17, x30 # switch signature pointer register to avoid conflict with test +80000940: 000f0893 addi x17,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x5b856647 +80000944: 00012a03 lw x20,0(x2) +80000948: 00410113 addi x2,x2,4 + +8000094c : +Zbkb_rori_cg_cp_rd_b30: + rori x30, x20, 0 # perform operation +8000094c: 600a5f13 rori x30,x20,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x30, Zbkb_rori_cg_cp_rd_b30, Zbkb_rori_cg_cp_rd_b30_str) +80000950: 0008a383 lw x7,0(x17) +80000954: 01e38863 beq x7,x30,80000964 +80000958: 3c10146f jal x8,80002518 +8000095c: 8000094c .word 0x8000094c +80000960: 800091ff .word 0x800091ff +80000964: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xd7d2543b +80000968: 00012803 lw x16,0(x2) +8000096c: 00410113 addi x2,x2,4 + +80000970 : +Zbkb_rori_cg_cp_rd_b31: + rori x31, x16, 0 # perform operation +80000970: 60085f93 rori x31,x16,0x0 + # Check if x31 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x31, Zbkb_rori_cg_cp_rd_b31, Zbkb_rori_cg_cp_rd_b31_str) +80000974: 0008a383 lw x7,0(x17) +80000978: 01f38863 beq x7,x31,80000988 +8000097c: 39d0146f jal x8,80002518 +80000980: 80000970 .word 0x80000970 +80000984: 80009231 .word 0x80009231 +80000988: 00488893 addi x17,x17,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0x00000000 +8000098c: 00012283 lw x5,0(x2) +80000990: 00410113 addi x2,x2,4 + +80000994 : +Zbkb_rori_cg_cp_rs1_edges_0x0: + rori x1, x5, 9 # perform operation +80000994: 6092d093 rori x1,x5,0x9 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zbkb_rori_cg_cp_rs1_edges_0x0, Zbkb_rori_cg_cp_rs1_edges_0x0_str) +80000998: 0008a383 lw x7,0(x17) +8000099c: 00138863 beq x7,x1,800009ac +800009a0: 3790146f jal x8,80002518 +800009a4: 80000994 .word 0x80000994 +800009a8: 80009263 .word 0x80009263 +800009ac: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000001 +800009b0: 00012e03 lw x28,0(x2) +800009b4: 00410113 addi x2,x2,4 + +800009b8 : +Zbkb_rori_cg_cp_rs1_edges_0x1: + rori x20, x28, 30 # perform operation +800009b8: 61ee5a13 rori x20,x28,0x1e + # Check if x20 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x20, Zbkb_rori_cg_cp_rs1_edges_0x1, Zbkb_rori_cg_cp_rs1_edges_0x1_str) +800009bc: 0008a383 lw x7,0(x17) +800009c0: 01438863 beq x7,x20,800009d0 +800009c4: 3550146f jal x8,80002518 +800009c8: 800009b8 .word 0x800009b8 +800009cc: 8000929c .word 0x8000929c +800009d0: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x4) # load rs1: x4 = 0x00000002 +800009d4: 00012203 lw x4,0(x2) +800009d8: 00410113 addi x2,x2,4 + +800009dc : +Zbkb_rori_cg_cp_rs1_edges_0x2: + rori x12, x4, 11 # perform operation +800009dc: 60b25613 rori x12,x4,0xb + # Check if x12 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x12, Zbkb_rori_cg_cp_rs1_edges_0x2, Zbkb_rori_cg_cp_rs1_edges_0x2_str) +800009e0: 0008a383 lw x7,0(x17) +800009e4: 00c38863 beq x7,x12,800009f4 +800009e8: 3310146f jal x8,80002518 +800009ec: 800009dc .word 0x800009dc +800009f0: 800092d5 .word 0x800092d5 +800009f4: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x80000000 +800009f8: 00012d83 lw x27,0(x2) +800009fc: 00410113 addi x2,x2,4 + +80000a00 : +Zbkb_rori_cg_cp_rs1_edges_0x80000000: + rori x10, x27, 24 # perform operation +80000a00: 618dd513 rori x10,x27,0x18 + # Check if x10 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x10, Zbkb_rori_cg_cp_rs1_edges_0x80000000, Zbkb_rori_cg_cp_rs1_edges_0x80000000_str) +80000a04: 0008a383 lw x7,0(x17) +80000a08: 00a38863 beq x7,x10,80000a18 +80000a0c: 30d0146f jal x8,80002518 +80000a10: 80000a00 .word 0x80000a00 +80000a14: 8000930e .word 0x8000930e +80000a18: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x80000001 +80000a1c: 00012483 lw x9,0(x2) +80000a20: 00410113 addi x2,x2,4 + +80000a24 : +Zbkb_rori_cg_cp_rs1_edges_0x80000001: + rori x14, x9, 27 # perform operation +80000a24: 61b4d713 rori x14,x9,0x1b + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zbkb_rori_cg_cp_rs1_edges_0x80000001, Zbkb_rori_cg_cp_rs1_edges_0x80000001_str) +80000a28: 0008a383 lw x7,0(x17) +80000a2c: 00e38863 beq x7,x14,80000a3c +80000a30: 2e90146f jal x8,80002518 +80000a34: 80000a24 .word 0x80000a24 +80000a38: 8000934e .word 0x8000934e +80000a3c: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0x7fffffff +80000a40: 00012283 lw x5,0(x2) +80000a44: 00410113 addi x2,x2,4 + +80000a48 : +Zbkb_rori_cg_cp_rs1_edges_0x7fffffff: + rori x14, x5, 19 # perform operation +80000a48: 6132d713 rori x14,x5,0x13 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zbkb_rori_cg_cp_rs1_edges_0x7fffffff, Zbkb_rori_cg_cp_rs1_edges_0x7fffffff_str) +80000a4c: 0008a383 lw x7,0(x17) +80000a50: 00e38863 beq x7,x14,80000a60 +80000a54: 2c50146f jal x8,80002518 +80000a58: 80000a48 .word 0x80000a48 +80000a5c: 8000938e .word 0x8000938e +80000a60: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x7ffffffe +80000a64: 00012903 lw x18,0(x2) +80000a68: 00410113 addi x2,x2,4 + +80000a6c : +Zbkb_rori_cg_cp_rs1_edges_0x7ffffffe: + rori x11, x18, 25 # perform operation +80000a6c: 61995593 rori x11,x18,0x19 + # Check if x11 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x11, Zbkb_rori_cg_cp_rs1_edges_0x7ffffffe, Zbkb_rori_cg_cp_rs1_edges_0x7ffffffe_str) +80000a70: 0008a383 lw x7,0(x17) +80000a74: 00b38863 beq x7,x11,80000a84 +80000a78: 2a10146f jal x8,80002518 +80000a7c: 80000a6c .word 0x80000a6c +80000a80: 800093ce .word 0x800093ce +80000a84: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xffffffff +80000a88: 00012983 lw x19,0(x2) +80000a8c: 00410113 addi x2,x2,4 + +80000a90 : +Zbkb_rori_cg_cp_rs1_edges_0xffffffff: + rori x22, x19, 23 # perform operation +80000a90: 6179db13 rori x22,x19,0x17 + # Check if x22 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x22, Zbkb_rori_cg_cp_rs1_edges_0xffffffff, Zbkb_rori_cg_cp_rs1_edges_0xffffffff_str) +80000a94: 0008a383 lw x7,0(x17) +80000a98: 01638863 beq x7,x22,80000aa8 +80000a9c: 27d0146f jal x8,80002518 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 8000940e .word 0x8000940e +80000aa8: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xfffffffe +80000aac: 00012c83 lw x25,0(x2) +80000ab0: 00410113 addi x2,x2,4 + +80000ab4 : +Zbkb_rori_cg_cp_rs1_edges_0xfffffffe: + rori x3, x25, 26 # perform operation +80000ab4: 61acd193 rori x3,x25,0x1a + # Check if x3 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x3, Zbkb_rori_cg_cp_rs1_edges_0xfffffffe, Zbkb_rori_cg_cp_rs1_edges_0xfffffffe_str) +80000ab8: 0008a383 lw x7,0(x17) +80000abc: 00338863 beq x7,x3,80000acc +80000ac0: 2590146f jal x8,80002518 +80000ac4: 80000ab4 .word 0x80000ab4 +80000ac8: 8000944e .word 0x8000944e +80000acc: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x5bbc8872 +80000ad0: 00012603 lw x12,0(x2) +80000ad4: 00410113 addi x2,x2,4 + +80000ad8 : +Zbkb_rori_cg_cp_rs1_edges_0x5bbc8872: + rori x13, x12, 5 # perform operation +80000ad8: 60565693 rori x13,x12,0x5 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zbkb_rori_cg_cp_rs1_edges_0x5bbc8872, Zbkb_rori_cg_cp_rs1_edges_0x5bbc8872_str) +80000adc: 0008a383 lw x7,0(x17) +80000ae0: 00d38863 beq x7,x13,80000af0 +80000ae4: 2350146f jal x8,80002518 +80000ae8: 80000ad8 .word 0x80000ad8 +80000aec: 8000948e .word 0x8000948e +80000af0: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xaaaaaaaa +80000af4: 00012e83 lw x29,0(x2) +80000af8: 00410113 addi x2,x2,4 + +80000afc : +Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaa: + rori x1, x29, 11 # perform operation +80000afc: 60bed093 rori x1,x29,0xb + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000b00: 0008a383 lw x7,0(x17) +80000b04: 00138863 beq x7,x1,80000b14 +80000b08: 2110146f jal x8,80002518 +80000b0c: 80000afc .word 0x80000afc +80000b10: 800094ce .word 0x800094ce +80000b14: 00488893 addi x17,x17,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x55555555 +80000b18: 00012503 lw x10,0(x2) +80000b1c: 00410113 addi x2,x2,4 + +80000b20 : +Zbkb_rori_cg_cp_rs1_edges_0x55555555: + rori x29, x10, 1 # perform operation +80000b20: 60155e93 rori x29,x10,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x29, Zbkb_rori_cg_cp_rs1_edges_0x55555555, Zbkb_rori_cg_cp_rs1_edges_0x55555555_str) +80000b24: 0008a383 lw x7,0(x17) +80000b28: 01d38863 beq x7,x29,80000b38 +80000b2c: 1ed0146f jal x8,80002518 +80000b30: 80000b20 .word 0x80000b20 +80000b34: 8000950e .word 0x8000950e +80000b38: 00488893 addi x17,x17,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x2fccc137 +80000b3c: 00012003 lw x0,0(x2) +80000b40: 00410113 addi x2,x2,4 + +80000b44 : +Zbkb_rori_cg_cmp_rd_rs1_b0: + rori x0, x0, 6 # perform operation +80000b44: 60605013 rori x0,x0,0x6 + # Check if x0 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x0, Zbkb_rori_cg_cmp_rd_rs1_b0, Zbkb_rori_cg_cmp_rd_rs1_b0_str) +80000b48: 0008a383 lw x7,0(x17) +80000b4c: 00038863 beq x7,x0,80000b5c +80000b50: 1c90146f jal x8,80002518 +80000b54: 80000b44 .word 0x80000b44 +80000b58: 8000954e .word 0x8000954e +80000b5c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x586880a4 +80000b60: 00012083 lw x1,0(x2) +80000b64: 00410113 addi x2,x2,4 + +80000b68 : +Zbkb_rori_cg_cmp_rd_rs1_b1: + rori x1, x1, 8 # perform operation +80000b68: 6080d093 rori x1,x1,0x8 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zbkb_rori_cg_cmp_rd_rs1_b1, Zbkb_rori_cg_cmp_rd_rs1_b1_str) +80000b6c: 0008a383 lw x7,0(x17) +80000b70: 00138863 beq x7,x1,80000b80 +80000b74: 1a50146f jal x8,80002518 +80000b78: 80000b68 .word 0x80000b68 +80000b7c: 80009584 .word 0x80009584 +80000b80: 00488893 addi x17,x17,4 + + mv x20, x2 # switch data pointer register to avoid conflict with test +80000b84: 00010a13 addi x20,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xa360971f +80000b88: 000a2103 lw x2,0(x20) +80000b8c: 004a0a13 addi x20,x20,4 + +80000b90 : +Zbkb_rori_cg_cmp_rd_rs1_b2: + rori x2, x2, 10 # perform operation +80000b90: 60a15113 rori x2,x2,0xa + # Check if x2 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x2, Zbkb_rori_cg_cmp_rd_rs1_b2, Zbkb_rori_cg_cmp_rd_rs1_b2_str) +80000b94: 0008a383 lw x7,0(x17) +80000b98: 00238863 beq x7,x2,80000ba8 +80000b9c: 17d0146f jal x8,80002518 +80000ba0: 80000b90 .word 0x80000b90 +80000ba4: 800095ba .word 0x800095ba +80000ba8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x17d8b2c7 +80000bac: 000a2183 lw x3,0(x20) +80000bb0: 004a0a13 addi x20,x20,4 + +80000bb4 : +Zbkb_rori_cg_cmp_rd_rs1_b3: + rori x3, x3, 25 # perform operation +80000bb4: 6191d193 rori x3,x3,0x19 + # Check if x3 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x3, Zbkb_rori_cg_cmp_rd_rs1_b3, Zbkb_rori_cg_cmp_rd_rs1_b3_str) +80000bb8: 0008a383 lw x7,0(x17) +80000bbc: 00338863 beq x7,x3,80000bcc +80000bc0: 1590146f jal x8,80002518 +80000bc4: 80000bb4 .word 0x80000bb4 +80000bc8: 800095f0 .word 0x800095f0 +80000bcc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x4d8aacfe +80000bd0: 000a2203 lw x4,0(x20) +80000bd4: 004a0a13 addi x20,x20,4 + +80000bd8 : +Zbkb_rori_cg_cmp_rd_rs1_b4: + rori x4, x4, 10 # perform operation +80000bd8: 60a25213 rori x4,x4,0xa + # Check if x4 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x4, Zbkb_rori_cg_cmp_rd_rs1_b4, Zbkb_rori_cg_cmp_rd_rs1_b4_str) +80000bdc: 0008a383 lw x7,0(x17) +80000be0: 00438863 beq x7,x4,80000bf0 +80000be4: 1350146f jal x8,80002518 +80000be8: 80000bd8 .word 0x80000bd8 +80000bec: 80009626 .word 0x80009626 +80000bf0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xba38e805 +80000bf4: 000a2283 lw x5,0(x20) +80000bf8: 004a0a13 addi x20,x20,4 + +80000bfc : +Zbkb_rori_cg_cmp_rd_rs1_b5: + rori x5, x5, 0 # perform operation +80000bfc: 6002d293 rori x5,x5,0x0 + # Check if x5 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x5, Zbkb_rori_cg_cmp_rd_rs1_b5, Zbkb_rori_cg_cmp_rd_rs1_b5_str) +80000c00: 0008a383 lw x7,0(x17) +80000c04: 00538863 beq x7,x5,80000c14 +80000c08: 1110146f jal x8,80002518 +80000c0c: 80000bfc .word 0x80000bfc +80000c10: 8000965c .word 0x8000965c +80000c14: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x9f62c90c +80000c18: 000a2303 lw x6,0(x20) +80000c1c: 004a0a13 addi x20,x20,4 + +80000c20 : +Zbkb_rori_cg_cmp_rd_rs1_b6: + rori x6, x6, 12 # perform operation +80000c20: 60c35313 rori x6,x6,0xc + # Check if x6 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x6, Zbkb_rori_cg_cmp_rd_rs1_b6, Zbkb_rori_cg_cmp_rd_rs1_b6_str) +80000c24: 0008a383 lw x7,0(x17) +80000c28: 00638863 beq x7,x6,80000c38 +80000c2c: 0ed0146f jal x8,80002518 +80000c30: 80000c20 .word 0x80000c20 +80000c34: 80009692 .word 0x80009692 +80000c38: 00488893 addi x17,x17,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c3c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c40: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xfd84ed70 +80000c44: 000a2383 lw x7,0(x20) +80000c48: 004a0a13 addi x20,x20,4 + +80000c4c : +Zbkb_rori_cg_cmp_rd_rs1_b7: + rori x7, x7, 19 # perform operation +80000c4c: 6133d393 rori x7,x7,0x13 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkb_rori_cg_cmp_rd_rs1_b7, Zbkb_rori_cg_cmp_rd_rs1_b7_str) +80000c50: 0008a203 lw x4,0(x17) +80000c54: 00720863 beq x4,x7,80000c64 +80000c58: 0a9012ef jal x5,80002500 +80000c5c: 80000c4c .word 0x80000c4c +80000c60: 800096c8 .word 0x800096c8 +80000c64: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x128228be +80000c68: 000a2403 lw x8,0(x20) +80000c6c: 004a0a13 addi x20,x20,4 + +80000c70 : +Zbkb_rori_cg_cmp_rd_rs1_b8: + rori x8, x8, 20 # perform operation +80000c70: 61445413 rori x8,x8,0x14 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_rori_cg_cmp_rd_rs1_b8, Zbkb_rori_cg_cmp_rd_rs1_b8_str) +80000c74: 0008a203 lw x4,0(x17) +80000c78: 00820863 beq x4,x8,80000c88 +80000c7c: 085012ef jal x5,80002500 +80000c80: 80000c70 .word 0x80000c70 +80000c84: 800096fe .word 0x800096fe +80000c88: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x9179d538 +80000c8c: 000a2483 lw x9,0(x20) +80000c90: 004a0a13 addi x20,x20,4 + +80000c94 : +Zbkb_rori_cg_cmp_rd_rs1_b9: + rori x9, x9, 6 # perform operation +80000c94: 6064d493 rori x9,x9,0x6 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkb_rori_cg_cmp_rd_rs1_b9, Zbkb_rori_cg_cmp_rd_rs1_b9_str) +80000c98: 0008a203 lw x4,0(x17) +80000c9c: 00920863 beq x4,x9,80000cac +80000ca0: 061012ef jal x5,80002500 +80000ca4: 80000c94 .word 0x80000c94 +80000ca8: 80009734 .word 0x80009734 +80000cac: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xe481a9b8 +80000cb0: 000a2503 lw x10,0(x20) +80000cb4: 004a0a13 addi x20,x20,4 + +80000cb8 : +Zbkb_rori_cg_cmp_rd_rs1_b10: + rori x10, x10, 29 # perform operation +80000cb8: 61d55513 rori x10,x10,0x1d + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkb_rori_cg_cmp_rd_rs1_b10, Zbkb_rori_cg_cmp_rd_rs1_b10_str) +80000cbc: 0008a203 lw x4,0(x17) +80000cc0: 00a20863 beq x4,x10,80000cd0 +80000cc4: 03d012ef jal x5,80002500 +80000cc8: 80000cb8 .word 0x80000cb8 +80000ccc: 8000976a .word 0x8000976a +80000cd0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xa0d065f0 +80000cd4: 000a2583 lw x11,0(x20) +80000cd8: 004a0a13 addi x20,x20,4 + +80000cdc : +Zbkb_rori_cg_cmp_rd_rs1_b11: + rori x11, x11, 6 # perform operation +80000cdc: 6065d593 rori x11,x11,0x6 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkb_rori_cg_cmp_rd_rs1_b11, Zbkb_rori_cg_cmp_rd_rs1_b11_str) +80000ce0: 0008a203 lw x4,0(x17) +80000ce4: 00b20863 beq x4,x11,80000cf4 +80000ce8: 019012ef jal x5,80002500 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 800097a1 .word 0x800097a1 +80000cf4: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x58c4ed96 +80000cf8: 000a2603 lw x12,0(x20) +80000cfc: 004a0a13 addi x20,x20,4 + +80000d00 : +Zbkb_rori_cg_cmp_rd_rs1_b12: + rori x12, x12, 21 # perform operation +80000d00: 61565613 rori x12,x12,0x15 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkb_rori_cg_cmp_rd_rs1_b12, Zbkb_rori_cg_cmp_rd_rs1_b12_str) +80000d04: 0008a203 lw x4,0(x17) +80000d08: 00c20863 beq x4,x12,80000d18 +80000d0c: 7f4012ef jal x5,80002500 +80000d10: 80000d00 .word 0x80000d00 +80000d14: 800097d8 .word 0x800097d8 +80000d18: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x899cd399 +80000d1c: 000a2683 lw x13,0(x20) +80000d20: 004a0a13 addi x20,x20,4 + +80000d24 : +Zbkb_rori_cg_cmp_rd_rs1_b13: + rori x13, x13, 22 # perform operation +80000d24: 6166d693 rori x13,x13,0x16 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkb_rori_cg_cmp_rd_rs1_b13, Zbkb_rori_cg_cmp_rd_rs1_b13_str) +80000d28: 0008a203 lw x4,0(x17) +80000d2c: 00d20863 beq x4,x13,80000d3c +80000d30: 7d0012ef jal x5,80002500 +80000d34: 80000d24 .word 0x80000d24 +80000d38: 8000980f .word 0x8000980f +80000d3c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x27beb37f +80000d40: 000a2703 lw x14,0(x20) +80000d44: 004a0a13 addi x20,x20,4 + +80000d48 : +Zbkb_rori_cg_cmp_rd_rs1_b14: + rori x14, x14, 18 # perform operation +80000d48: 61275713 rori x14,x14,0x12 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkb_rori_cg_cmp_rd_rs1_b14, Zbkb_rori_cg_cmp_rd_rs1_b14_str) +80000d4c: 0008a203 lw x4,0(x17) +80000d50: 00e20863 beq x4,x14,80000d60 +80000d54: 7ac012ef jal x5,80002500 +80000d58: 80000d48 .word 0x80000d48 +80000d5c: 80009846 .word 0x80009846 +80000d60: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x097b001b +80000d64: 000a2783 lw x15,0(x20) +80000d68: 004a0a13 addi x20,x20,4 + +80000d6c : +Zbkb_rori_cg_cmp_rd_rs1_b15: + rori x15, x15, 20 # perform operation +80000d6c: 6147d793 rori x15,x15,0x14 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkb_rori_cg_cmp_rd_rs1_b15, Zbkb_rori_cg_cmp_rd_rs1_b15_str) +80000d70: 0008a203 lw x4,0(x17) +80000d74: 00f20863 beq x4,x15,80000d84 +80000d78: 788012ef jal x5,80002500 +80000d7c: 80000d6c .word 0x80000d6c +80000d80: 8000987d .word 0x8000987d +80000d84: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xf392bc24 +80000d88: 000a2803 lw x16,0(x20) +80000d8c: 004a0a13 addi x20,x20,4 + +80000d90 : +Zbkb_rori_cg_cmp_rd_rs1_b16: + rori x16, x16, 21 # perform operation +80000d90: 61585813 rori x16,x16,0x15 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkb_rori_cg_cmp_rd_rs1_b16, Zbkb_rori_cg_cmp_rd_rs1_b16_str) +80000d94: 0008a203 lw x4,0(x17) +80000d98: 01020863 beq x4,x16,80000da8 +80000d9c: 764012ef jal x5,80002500 +80000da0: 80000d90 .word 0x80000d90 +80000da4: 800098b4 .word 0x800098b4 +80000da8: 00488893 addi x17,x17,4 + + mv x22, x17 # switch signature pointer register to avoid conflict with test +80000dac: 00088b13 addi x22,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x2390ac21 +80000db0: 000a2883 lw x17,0(x20) +80000db4: 004a0a13 addi x20,x20,4 + +80000db8 : +Zbkb_rori_cg_cmp_rd_rs1_b17: + rori x17, x17, 10 # perform operation +80000db8: 60a8d893 rori x17,x17,0xa + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zbkb_rori_cg_cmp_rd_rs1_b17, Zbkb_rori_cg_cmp_rd_rs1_b17_str) +80000dbc: 000b2203 lw x4,0(x22) +80000dc0: 01120863 beq x4,x17,80000dd0 +80000dc4: 73c012ef jal x5,80002500 +80000dc8: 80000db8 .word 0x80000db8 +80000dcc: 800098eb .word 0x800098eb +80000dd0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x4b092867 +80000dd4: 000a2903 lw x18,0(x20) +80000dd8: 004a0a13 addi x20,x20,4 + +80000ddc : +Zbkb_rori_cg_cmp_rd_rs1_b18: + rori x18, x18, 24 # perform operation +80000ddc: 61895913 rori x18,x18,0x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zbkb_rori_cg_cmp_rd_rs1_b18, Zbkb_rori_cg_cmp_rd_rs1_b18_str) +80000de0: 000b2203 lw x4,0(x22) +80000de4: 01220863 beq x4,x18,80000df4 +80000de8: 718012ef jal x5,80002500 +80000dec: 80000ddc .word 0x80000ddc +80000df0: 80009922 .word 0x80009922 +80000df4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xbf935f88 +80000df8: 000a2983 lw x19,0(x20) +80000dfc: 004a0a13 addi x20,x20,4 + +80000e00 : +Zbkb_rori_cg_cmp_rd_rs1_b19: + rori x19, x19, 12 # perform operation +80000e00: 60c9d993 rori x19,x19,0xc + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zbkb_rori_cg_cmp_rd_rs1_b19, Zbkb_rori_cg_cmp_rd_rs1_b19_str) +80000e04: 000b2203 lw x4,0(x22) +80000e08: 01320863 beq x4,x19,80000e18 +80000e0c: 6f4012ef jal x5,80002500 +80000e10: 80000e00 .word 0x80000e00 +80000e14: 80009959 .word 0x80009959 +80000e18: 004b0b13 addi x22,x22,4 + + mv x2, x20 # switch data pointer register to avoid conflict with test +80000e1c: 000a0113 addi x2,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xc9860f9a +80000e20: 00012a03 lw x20,0(x2) +80000e24: 00410113 addi x2,x2,4 + +80000e28 : +Zbkb_rori_cg_cmp_rd_rs1_b20: + rori x20, x20, 0 # perform operation +80000e28: 600a5a13 rori x20,x20,0x0 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkb_rori_cg_cmp_rd_rs1_b20, Zbkb_rori_cg_cmp_rd_rs1_b20_str) +80000e2c: 000b2203 lw x4,0(x22) +80000e30: 01420863 beq x4,x20,80000e40 +80000e34: 6cc012ef jal x5,80002500 +80000e38: 80000e28 .word 0x80000e28 +80000e3c: 80009990 .word 0x80009990 +80000e40: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x61e189a7 +80000e44: 00012a83 lw x21,0(x2) +80000e48: 00410113 addi x2,x2,4 + +80000e4c : +Zbkb_rori_cg_cmp_rd_rs1_b21: + rori x21, x21, 14 # perform operation +80000e4c: 60eada93 rori x21,x21,0xe + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkb_rori_cg_cmp_rd_rs1_b21, Zbkb_rori_cg_cmp_rd_rs1_b21_str) +80000e50: 000b2203 lw x4,0(x22) +80000e54: 01520863 beq x4,x21,80000e64 +80000e58: 6a8012ef jal x5,80002500 +80000e5c: 80000e4c .word 0x80000e4c +80000e60: 800099c7 .word 0x800099c7 +80000e64: 004b0b13 addi x22,x22,4 + + mv x27, x22 # switch signature pointer register to avoid conflict with test +80000e68: 000b0d93 addi x27,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xde6168f0 +80000e6c: 00012b03 lw x22,0(x2) +80000e70: 00410113 addi x2,x2,4 + +80000e74 : +Zbkb_rori_cg_cmp_rd_rs1_b22: + rori x22, x22, 12 # perform operation +80000e74: 60cb5b13 rori x22,x22,0xc + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkb_rori_cg_cmp_rd_rs1_b22, Zbkb_rori_cg_cmp_rd_rs1_b22_str) +80000e78: 000da203 lw x4,0(x27) +80000e7c: 01620863 beq x4,x22,80000e8c +80000e80: 680012ef jal x5,80002500 +80000e84: 80000e74 .word 0x80000e74 +80000e88: 800099fe .word 0x800099fe +80000e8c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x7035be03 +80000e90: 00012b83 lw x23,0(x2) +80000e94: 00410113 addi x2,x2,4 + +80000e98 : +Zbkb_rori_cg_cmp_rd_rs1_b23: + rori x23, x23, 25 # perform operation +80000e98: 619bdb93 rori x23,x23,0x19 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkb_rori_cg_cmp_rd_rs1_b23, Zbkb_rori_cg_cmp_rd_rs1_b23_str) +80000e9c: 000da203 lw x4,0(x27) +80000ea0: 01720863 beq x4,x23,80000eb0 +80000ea4: 65c012ef jal x5,80002500 +80000ea8: 80000e98 .word 0x80000e98 +80000eac: 80009a35 .word 0x80009a35 +80000eb0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x579f0d50 +80000eb4: 00012c03 lw x24,0(x2) +80000eb8: 00410113 addi x2,x2,4 + +80000ebc : +Zbkb_rori_cg_cmp_rd_rs1_b24: + rori x24, x24, 12 # perform operation +80000ebc: 60cc5c13 rori x24,x24,0xc + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zbkb_rori_cg_cmp_rd_rs1_b24, Zbkb_rori_cg_cmp_rd_rs1_b24_str) +80000ec0: 000da203 lw x4,0(x27) +80000ec4: 01820863 beq x4,x24,80000ed4 +80000ec8: 638012ef jal x5,80002500 +80000ecc: 80000ebc .word 0x80000ebc +80000ed0: 80009a6d .word 0x80009a6d +80000ed4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xa451fe5d +80000ed8: 00012c83 lw x25,0(x2) +80000edc: 00410113 addi x2,x2,4 + +80000ee0 : +Zbkb_rori_cg_cmp_rd_rs1_b25: + rori x25, x25, 16 # perform operation +80000ee0: 610cdc93 rori x25,x25,0x10 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkb_rori_cg_cmp_rd_rs1_b25, Zbkb_rori_cg_cmp_rd_rs1_b25_str) +80000ee4: 000da203 lw x4,0(x27) +80000ee8: 01920863 beq x4,x25,80000ef8 +80000eec: 614012ef jal x5,80002500 +80000ef0: 80000ee0 .word 0x80000ee0 +80000ef4: 80009aa5 .word 0x80009aa5 +80000ef8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x9de7da29 +80000efc: 00012d03 lw x26,0(x2) +80000f00: 00410113 addi x2,x2,4 + +80000f04 : +Zbkb_rori_cg_cmp_rd_rs1_b26: + rori x26, x26, 23 # perform operation +80000f04: 617d5d13 rori x26,x26,0x17 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkb_rori_cg_cmp_rd_rs1_b26, Zbkb_rori_cg_cmp_rd_rs1_b26_str) +80000f08: 000da203 lw x4,0(x27) +80000f0c: 01a20863 beq x4,x26,80000f1c +80000f10: 5f0012ef jal x5,80002500 +80000f14: 80000f04 .word 0x80000f04 +80000f18: 80009add .word 0x80009add +80000f1c: 004d8d93 addi x27,x27,4 + + mv x25, x27 # switch signature pointer register to avoid conflict with test +80000f20: 000d8c93 addi x25,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xe0f45d06 +80000f24: 00012d83 lw x27,0(x2) +80000f28: 00410113 addi x2,x2,4 + +80000f2c : +Zbkb_rori_cg_cmp_rd_rs1_b27: + rori x27, x27, 23 # perform operation +80000f2c: 617ddd93 rori x27,x27,0x17 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zbkb_rori_cg_cmp_rd_rs1_b27, Zbkb_rori_cg_cmp_rd_rs1_b27_str) +80000f30: 000ca203 lw x4,0(x25) +80000f34: 01b20863 beq x4,x27,80000f44 +80000f38: 5c8012ef jal x5,80002500 +80000f3c: 80000f2c .word 0x80000f2c +80000f40: 80009b15 .word 0x80009b15 +80000f44: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xe545b01f +80000f48: 00012e03 lw x28,0(x2) +80000f4c: 00410113 addi x2,x2,4 + +80000f50 : +Zbkb_rori_cg_cmp_rd_rs1_b28: + rori x28, x28, 5 # perform operation +80000f50: 605e5e13 rori x28,x28,0x5 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zbkb_rori_cg_cmp_rd_rs1_b28, Zbkb_rori_cg_cmp_rd_rs1_b28_str) +80000f54: 000ca203 lw x4,0(x25) +80000f58: 01c20863 beq x4,x28,80000f68 +80000f5c: 5a4012ef jal x5,80002500 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 80009b4d .word 0x80009b4d +80000f68: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x51e04372 +80000f6c: 00012e83 lw x29,0(x2) +80000f70: 00410113 addi x2,x2,4 + +80000f74 : +Zbkb_rori_cg_cmp_rd_rs1_b29: + rori x29, x29, 23 # perform operation +80000f74: 617ede93 rori x29,x29,0x17 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_rori_cg_cmp_rd_rs1_b29, Zbkb_rori_cg_cmp_rd_rs1_b29_str) +80000f78: 000ca203 lw x4,0(x25) +80000f7c: 01d20863 beq x4,x29,80000f8c +80000f80: 580012ef jal x5,80002500 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 80009b85 .word 0x80009b85 +80000f8c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xf8688a3b +80000f90: 00012f03 lw x30,0(x2) +80000f94: 00410113 addi x2,x2,4 + +80000f98 : +Zbkb_rori_cg_cmp_rd_rs1_b30: + rori x30, x30, 7 # perform operation +80000f98: 607f5f13 rori x30,x30,0x7 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkb_rori_cg_cmp_rd_rs1_b30, Zbkb_rori_cg_cmp_rd_rs1_b30_str) +80000f9c: 000ca203 lw x4,0(x25) +80000fa0: 01e20863 beq x4,x30,80000fb0 +80000fa4: 55c012ef jal x5,80002500 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 80009bbd .word 0x80009bbd +80000fb0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x3fcb74f7 +80000fb4: 00012f83 lw x31,0(x2) +80000fb8: 00410113 addi x2,x2,4 + +80000fbc : +Zbkb_rori_cg_cmp_rd_rs1_b31: + rori x31, x31, 22 # perform operation +80000fbc: 616fdf93 rori x31,x31,0x16 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rori_cg_cmp_rd_rs1_b31, Zbkb_rori_cg_cmp_rd_rs1_b31_str) +80000fc0: 000ca203 lw x4,0(x25) +80000fc4: 01f20863 beq x4,x31,80000fd4 +80000fc8: 538012ef jal x5,80002500 +80000fcc: 80000fbc .word 0x80000fbc +80000fd0: 80009bf5 .word 0x80009bf5 +80000fd4: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cp_uimm +///////////////////////////////// + +# Testcase cp_uimm: imm=0 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xbd5af9e2 +80000fd8: 00012903 lw x18,0(x2) +80000fdc: 00410113 addi x2,x2,4 + +80000fe0 : +Zbkb_rori_cg_cp_uimm_uimm0: + rori x31, x18, 0 # perform operation +80000fe0: 60095f93 rori x31,x18,0x0 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm0, Zbkb_rori_cg_cp_uimm_uimm0_str) +80000fe4: 000ca203 lw x4,0(x25) +80000fe8: 01f20863 beq x4,x31,80000ff8 +80000fec: 514012ef jal x5,80002500 +80000ff0: 80000fe0 .word 0x80000fe0 +80000ff4: 80009c2d .word 0x80009c2d +80000ff8: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=1 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xfd8ed249 +80000ffc: 00012b03 lw x22,0(x2) +80001000: 00410113 addi x2,x2,4 + +80001004 : +Zbkb_rori_cg_cp_uimm_uimm1: + rori x9, x22, 1 # perform operation +80001004: 601b5493 rori x9,x22,0x1 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zbkb_rori_cg_cp_uimm_uimm1, Zbkb_rori_cg_cp_uimm_uimm1_str) +80001008: 000ca203 lw x4,0(x25) +8000100c: 00920863 beq x4,x9,8000101c +80001010: 4f0012ef jal x5,80002500 +80001014: 80001004 .word 0x80001004 +80001018: 80009c64 .word 0x80009c64 +8000101c: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=2 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xcc473c80 +80001020: 00012683 lw x13,0(x2) +80001024: 00410113 addi x2,x2,4 + +80001028 : +Zbkb_rori_cg_cp_uimm_uimm2: + rori x21, x13, 2 # perform operation +80001028: 6026da93 rori x21,x13,0x2 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm2, Zbkb_rori_cg_cp_uimm_uimm2_str) +8000102c: 000ca203 lw x4,0(x25) +80001030: 01520863 beq x4,x21,80001040 +80001034: 4cc012ef jal x5,80002500 +80001038: 80001028 .word 0x80001028 +8000103c: 80009c9b .word 0x80009c9b +80001040: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=3 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x37e07385 +80001044: 00012603 lw x12,0(x2) +80001048: 00410113 addi x2,x2,4 + +8000104c : +Zbkb_rori_cg_cp_uimm_uimm3: + rori x13, x12, 3 # perform operation +8000104c: 60365693 rori x13,x12,0x3 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_rori_cg_cp_uimm_uimm3, Zbkb_rori_cg_cp_uimm_uimm3_str) +80001050: 000ca203 lw x4,0(x25) +80001054: 00d20863 beq x4,x13,80001064 +80001058: 4a8012ef jal x5,80002500 +8000105c: 8000104c .word 0x8000104c +80001060: 80009cd2 .word 0x80009cd2 +80001064: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xfcd1a085 +80001068: 00012483 lw x9,0(x2) +8000106c: 00410113 addi x2,x2,4 + +80001070 : +Zbkb_rori_cg_cp_uimm_uimm4: + rori x11, x9, 4 # perform operation +80001070: 6044d593 rori x11,x9,0x4 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm4, Zbkb_rori_cg_cp_uimm_uimm4_str) +80001074: 000ca203 lw x4,0(x25) +80001078: 00b20863 beq x4,x11,80001088 +8000107c: 484012ef jal x5,80002500 +80001080: 80001070 .word 0x80001070 +80001084: 80009d09 .word 0x80009d09 +80001088: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=5 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x86cf0d7e +8000108c: 00012503 lw x10,0(x2) +80001090: 00410113 addi x2,x2,4 + +80001094 : +Zbkb_rori_cg_cp_uimm_uimm5: + rori x6, x10, 5 # perform operation +80001094: 60555313 rori x6,x10,0x5 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zbkb_rori_cg_cp_uimm_uimm5, Zbkb_rori_cg_cp_uimm_uimm5_str) +80001098: 000ca203 lw x4,0(x25) +8000109c: 00620863 beq x4,x6,800010ac +800010a0: 460012ef jal x5,80002500 +800010a4: 80001094 .word 0x80001094 +800010a8: 80009d40 .word 0x80009d40 +800010ac: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=6 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x6f59086a +800010b0: 00012d83 lw x27,0(x2) +800010b4: 00410113 addi x2,x2,4 + +800010b8 : +Zbkb_rori_cg_cp_uimm_uimm6: + rori x21, x27, 6 # perform operation +800010b8: 606dda93 rori x21,x27,0x6 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm6, Zbkb_rori_cg_cp_uimm_uimm6_str) +800010bc: 000ca203 lw x4,0(x25) +800010c0: 01520863 beq x4,x21,800010d0 +800010c4: 43c012ef jal x5,80002500 +800010c8: 800010b8 .word 0x800010b8 +800010cc: 80009d77 .word 0x80009d77 +800010d0: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=7 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x4f26035e +800010d4: 00012903 lw x18,0(x2) +800010d8: 00410113 addi x2,x2,4 + +800010dc : +Zbkb_rori_cg_cp_uimm_uimm7: + rori x21, x18, 7 # perform operation +800010dc: 60795a93 rori x21,x18,0x7 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm7, Zbkb_rori_cg_cp_uimm_uimm7_str) +800010e0: 000ca203 lw x4,0(x25) +800010e4: 01520863 beq x4,x21,800010f4 +800010e8: 418012ef jal x5,80002500 +800010ec: 800010dc .word 0x800010dc +800010f0: 80009dae .word 0x80009dae +800010f4: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xe11ba016 +800010f8: 00012a83 lw x21,0(x2) +800010fc: 00410113 addi x2,x2,4 + +80001100 : +Zbkb_rori_cg_cp_uimm_uimm8: + rori x3, x21, 8 # perform operation +80001100: 608ad193 rori x3,x21,0x8 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rori_cg_cp_uimm_uimm8, Zbkb_rori_cg_cp_uimm_uimm8_str) +80001104: 000ca203 lw x4,0(x25) +80001108: 00320863 beq x4,x3,80001118 +8000110c: 3f4012ef jal x5,80002500 +80001110: 80001100 .word 0x80001100 +80001114: 80009de5 .word 0x80009de5 +80001118: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=9 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x384b3f5c +8000111c: 00012a03 lw x20,0(x2) +80001120: 00410113 addi x2,x2,4 + +80001124 : +Zbkb_rori_cg_cp_uimm_uimm9: + rori x6, x20, 9 # perform operation +80001124: 609a5313 rori x6,x20,0x9 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zbkb_rori_cg_cp_uimm_uimm9, Zbkb_rori_cg_cp_uimm_uimm9_str) +80001128: 000ca203 lw x4,0(x25) +8000112c: 00620863 beq x4,x6,8000113c +80001130: 3d0012ef jal x5,80002500 +80001134: 80001124 .word 0x80001124 +80001138: 80009e1c .word 0x80009e1c +8000113c: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=10 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x89afbbbd +80001140: 00012a83 lw x21,0(x2) +80001144: 00410113 addi x2,x2,4 + +80001148 : +Zbkb_rori_cg_cp_uimm_uimm10: + rori x13, x21, 10 # perform operation +80001148: 60aad693 rori x13,x21,0xa + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_rori_cg_cp_uimm_uimm10, Zbkb_rori_cg_cp_uimm_uimm10_str) +8000114c: 000ca203 lw x4,0(x25) +80001150: 00d20863 beq x4,x13,80001160 +80001154: 3ac012ef jal x5,80002500 +80001158: 80001148 .word 0x80001148 +8000115c: 80009e53 .word 0x80009e53 +80001160: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=11 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xc61494d0 +80001164: 00012703 lw x14,0(x2) +80001168: 00410113 addi x2,x2,4 + +8000116c : +Zbkb_rori_cg_cp_uimm_uimm11: + rori x16, x14, 11 # perform operation +8000116c: 60b75813 rori x16,x14,0xb + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_rori_cg_cp_uimm_uimm11, Zbkb_rori_cg_cp_uimm_uimm11_str) +80001170: 000ca203 lw x4,0(x25) +80001174: 01020863 beq x4,x16,80001184 +80001178: 388012ef jal x5,80002500 +8000117c: 8000116c .word 0x8000116c +80001180: 80009e8b .word 0x80009e8b +80001184: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=12 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x0806323d +80001188: 00012083 lw x1,0(x2) +8000118c: 00410113 addi x2,x2,4 + +80001190 : +Zbkb_rori_cg_cp_uimm_uimm12: + rori x31, x1, 12 # perform operation +80001190: 60c0df93 rori x31,x1,0xc + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm12, Zbkb_rori_cg_cp_uimm_uimm12_str) +80001194: 000ca203 lw x4,0(x25) +80001198: 01f20863 beq x4,x31,800011a8 +8000119c: 364012ef jal x5,80002500 +800011a0: 80001190 .word 0x80001190 +800011a4: 80009ec3 .word 0x80009ec3 +800011a8: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=13 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x96b5bfcf +800011ac: 00012003 lw x0,0(x2) +800011b0: 00410113 addi x2,x2,4 + +800011b4 : +Zbkb_rori_cg_cp_uimm_uimm13: + rori x26, x0, 13 # perform operation +800011b4: 60d05d13 rori x26,x0,0xd + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zbkb_rori_cg_cp_uimm_uimm13, Zbkb_rori_cg_cp_uimm_uimm13_str) +800011b8: 000ca203 lw x4,0(x25) +800011bc: 01a20863 beq x4,x26,800011cc +800011c0: 340012ef jal x5,80002500 +800011c4: 800011b4 .word 0x800011b4 +800011c8: 80009efb .word 0x80009efb +800011cc: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=14 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xa8ee88a0 +800011d0: 00012583 lw x11,0(x2) +800011d4: 00410113 addi x2,x2,4 + +800011d8 : +Zbkb_rori_cg_cp_uimm_uimm14: + rori x23, x11, 14 # perform operation +800011d8: 60e5db93 rori x23,x11,0xe + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_rori_cg_cp_uimm_uimm14, Zbkb_rori_cg_cp_uimm_uimm14_str) +800011dc: 000ca203 lw x4,0(x25) +800011e0: 01720863 beq x4,x23,800011f0 +800011e4: 31c012ef jal x5,80002500 +800011e8: 800011d8 .word 0x800011d8 +800011ec: 80009f33 .word 0x80009f33 +800011f0: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=15 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x7bb379c3 +800011f4: 00012483 lw x9,0(x2) +800011f8: 00410113 addi x2,x2,4 + +800011fc : +Zbkb_rori_cg_cp_uimm_uimm15: + rori x18, x9, 15 # perform operation +800011fc: 60f4d913 rori x18,x9,0xf + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_rori_cg_cp_uimm_uimm15, Zbkb_rori_cg_cp_uimm_uimm15_str) +80001200: 000ca203 lw x4,0(x25) +80001204: 01220863 beq x4,x18,80001214 +80001208: 2f8012ef jal x5,80002500 +8000120c: 800011fc .word 0x800011fc +80001210: 80009f6b .word 0x80009f6b +80001214: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=16 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xd75dc1e1 +80001218: 00012603 lw x12,0(x2) +8000121c: 00410113 addi x2,x2,4 + +80001220 : +Zbkb_rori_cg_cp_uimm_uimm16: + rori x17, x12, 16 # perform operation +80001220: 61065893 rori x17,x12,0x10 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_rori_cg_cp_uimm_uimm16, Zbkb_rori_cg_cp_uimm_uimm16_str) +80001224: 000ca203 lw x4,0(x25) +80001228: 01120863 beq x4,x17,80001238 +8000122c: 2d4012ef jal x5,80002500 +80001230: 80001220 .word 0x80001220 +80001234: 80009fa3 .word 0x80009fa3 +80001238: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=17 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xf5adf705 +8000123c: 00012f83 lw x31,0(x2) +80001240: 00410113 addi x2,x2,4 + +80001244 : +Zbkb_rori_cg_cp_uimm_uimm17: + rori x21, x31, 17 # perform operation +80001244: 611fda93 rori x21,x31,0x11 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm17, Zbkb_rori_cg_cp_uimm_uimm17_str) +80001248: 000ca203 lw x4,0(x25) +8000124c: 01520863 beq x4,x21,8000125c +80001250: 2b0012ef jal x5,80002500 +80001254: 80001244 .word 0x80001244 +80001258: 80009fdb .word 0x80009fdb +8000125c: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=18 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xdfa0430b +80001260: 00012883 lw x17,0(x2) +80001264: 00410113 addi x2,x2,4 + +80001268 : +Zbkb_rori_cg_cp_uimm_uimm18: + rori x31, x17, 18 # perform operation +80001268: 6128df93 rori x31,x17,0x12 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm18, Zbkb_rori_cg_cp_uimm_uimm18_str) +8000126c: 000ca203 lw x4,0(x25) +80001270: 01f20863 beq x4,x31,80001280 +80001274: 28c012ef jal x5,80002500 +80001278: 80001268 .word 0x80001268 +8000127c: 8000a013 .word 0x8000a013 +80001280: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=19 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x71cdcd47 +80001284: 00012883 lw x17,0(x2) +80001288: 00410113 addi x2,x2,4 + +8000128c : +Zbkb_rori_cg_cp_uimm_uimm19: + rori x14, x17, 19 # perform operation +8000128c: 6138d713 rori x14,x17,0x13 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_rori_cg_cp_uimm_uimm19, Zbkb_rori_cg_cp_uimm_uimm19_str) +80001290: 000ca203 lw x4,0(x25) +80001294: 00e20863 beq x4,x14,800012a4 +80001298: 268012ef jal x5,80002500 +8000129c: 8000128c .word 0x8000128c +800012a0: 8000a04b .word 0x8000a04b +800012a4: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=20 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x1a2265d7 +800012a8: 00012e83 lw x29,0(x2) +800012ac: 00410113 addi x2,x2,4 + +800012b0 : +Zbkb_rori_cg_cp_uimm_uimm20: + rori x1, x29, 20 # perform operation +800012b0: 614ed093 rori x1,x29,0x14 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_rori_cg_cp_uimm_uimm20, Zbkb_rori_cg_cp_uimm_uimm20_str) +800012b4: 000ca203 lw x4,0(x25) +800012b8: 00120863 beq x4,x1,800012c8 +800012bc: 244012ef jal x5,80002500 +800012c0: 800012b0 .word 0x800012b0 +800012c4: 8000a083 .word 0x8000a083 +800012c8: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=21 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x489ec03d +800012cc: 00012303 lw x6,0(x2) +800012d0: 00410113 addi x2,x2,4 + +800012d4 : +Zbkb_rori_cg_cp_uimm_uimm21: + rori x18, x6, 21 # perform operation +800012d4: 61535913 rori x18,x6,0x15 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_rori_cg_cp_uimm_uimm21, Zbkb_rori_cg_cp_uimm_uimm21_str) +800012d8: 000ca203 lw x4,0(x25) +800012dc: 01220863 beq x4,x18,800012ec +800012e0: 220012ef jal x5,80002500 +800012e4: 800012d4 .word 0x800012d4 +800012e8: 8000a0bb .word 0x8000a0bb +800012ec: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=22 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x2c18cac2 +800012f0: 00012b83 lw x23,0(x2) +800012f4: 00410113 addi x2,x2,4 + +800012f8 : +Zbkb_rori_cg_cp_uimm_uimm22: + rori x11, x23, 22 # perform operation +800012f8: 616bd593 rori x11,x23,0x16 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm22, Zbkb_rori_cg_cp_uimm_uimm22_str) +800012fc: 000ca203 lw x4,0(x25) +80001300: 00b20863 beq x4,x11,80001310 +80001304: 1fc012ef jal x5,80002500 +80001308: 800012f8 .word 0x800012f8 +8000130c: 8000a0f3 .word 0x8000a0f3 +80001310: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=23 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xbf3ac666 +80001314: 00012783 lw x15,0(x2) +80001318: 00410113 addi x2,x2,4 + +8000131c : +Zbkb_rori_cg_cp_uimm_uimm23: + rori x3, x15, 23 # perform operation +8000131c: 6177d193 rori x3,x15,0x17 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rori_cg_cp_uimm_uimm23, Zbkb_rori_cg_cp_uimm_uimm23_str) +80001320: 000ca203 lw x4,0(x25) +80001324: 00320863 beq x4,x3,80001334 +80001328: 1d8012ef jal x5,80002500 +8000132c: 8000131c .word 0x8000131c +80001330: 8000a12b .word 0x8000a12b +80001334: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=24 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x682e2888 +80001338: 00012883 lw x17,0(x2) +8000133c: 00410113 addi x2,x2,4 + +80001340 : +Zbkb_rori_cg_cp_uimm_uimm24: + rori x20, x17, 24 # perform operation +80001340: 6188da13 rori x20,x17,0x18 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm24, Zbkb_rori_cg_cp_uimm_uimm24_str) +80001344: 000ca203 lw x4,0(x25) +80001348: 01420863 beq x4,x20,80001358 +8000134c: 1b4012ef jal x5,80002500 +80001350: 80001340 .word 0x80001340 +80001354: 8000a163 .word 0x8000a163 +80001358: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=25 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x2c7def7f +8000135c: 00012003 lw x0,0(x2) +80001360: 00410113 addi x2,x2,4 + +80001364 : +Zbkb_rori_cg_cp_uimm_uimm25: + rori x11, x0, 25 # perform operation +80001364: 61905593 rori x11,x0,0x19 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm25, Zbkb_rori_cg_cp_uimm_uimm25_str) +80001368: 000ca203 lw x4,0(x25) +8000136c: 00b20863 beq x4,x11,8000137c +80001370: 190012ef jal x5,80002500 +80001374: 80001364 .word 0x80001364 +80001378: 8000a19b .word 0x8000a19b +8000137c: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=26 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x1d96532d +80001380: 00012903 lw x18,0(x2) +80001384: 00410113 addi x2,x2,4 + +80001388 : +Zbkb_rori_cg_cp_uimm_uimm26: + rori x3, x18, 26 # perform operation +80001388: 61a95193 rori x3,x18,0x1a + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rori_cg_cp_uimm_uimm26, Zbkb_rori_cg_cp_uimm_uimm26_str) +8000138c: 000ca203 lw x4,0(x25) +80001390: 00320863 beq x4,x3,800013a0 +80001394: 16c012ef jal x5,80002500 +80001398: 80001388 .word 0x80001388 +8000139c: 8000a1d3 .word 0x8000a1d3 +800013a0: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=27 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x3b25d5f4 +800013a4: 00012403 lw x8,0(x2) +800013a8: 00410113 addi x2,x2,4 + +800013ac : +Zbkb_rori_cg_cp_uimm_uimm27: + rori x20, x8, 27 # perform operation +800013ac: 61b45a13 rori x20,x8,0x1b + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm27, Zbkb_rori_cg_cp_uimm_uimm27_str) +800013b0: 000ca203 lw x4,0(x25) +800013b4: 01420863 beq x4,x20,800013c4 +800013b8: 148012ef jal x5,80002500 +800013bc: 800013ac .word 0x800013ac +800013c0: 8000a20b .word 0x8000a20b +800013c4: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=28 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xca7fcde6 +800013c8: 00012e83 lw x29,0(x2) +800013cc: 00410113 addi x2,x2,4 + +800013d0 : +Zbkb_rori_cg_cp_uimm_uimm28: + rori x7, x29, 28 # perform operation +800013d0: 61ced393 rori x7,x29,0x1c + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkb_rori_cg_cp_uimm_uimm28, Zbkb_rori_cg_cp_uimm_uimm28_str) +800013d4: 000ca203 lw x4,0(x25) +800013d8: 00720863 beq x4,x7,800013e8 +800013dc: 124012ef jal x5,80002500 +800013e0: 800013d0 .word 0x800013d0 +800013e4: 8000a243 .word 0x8000a243 +800013e8: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=29 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x37a07bdd +800013ec: 00012883 lw x17,0(x2) +800013f0: 00410113 addi x2,x2,4 + +800013f4 : +Zbkb_rori_cg_cp_uimm_uimm29: + rori x29, x17, 29 # perform operation +800013f4: 61d8de93 rori x29,x17,0x1d + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm29, Zbkb_rori_cg_cp_uimm_uimm29_str) +800013f8: 000ca203 lw x4,0(x25) +800013fc: 01d20863 beq x4,x29,8000140c +80001400: 100012ef jal x5,80002500 +80001404: 800013f4 .word 0x800013f4 +80001408: 8000a27b .word 0x8000a27b +8000140c: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=30 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x5e1751fa +80001410: 00012603 lw x12,0(x2) +80001414: 00410113 addi x2,x2,4 + +80001418 : +Zbkb_rori_cg_cp_uimm_uimm30: + rori x26, x12, 30 # perform operation +80001418: 61e65d13 rori x26,x12,0x1e + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zbkb_rori_cg_cp_uimm_uimm30, Zbkb_rori_cg_cp_uimm_uimm30_str) +8000141c: 000ca203 lw x4,0(x25) +80001420: 01a20863 beq x4,x26,80001430 +80001424: 0dc012ef jal x5,80002500 +80001428: 80001418 .word 0x80001418 +8000142c: 8000a2b3 .word 0x8000a2b3 +80001430: 004c8c93 addi x25,x25,4 + +# Testcase cp_uimm: imm=31 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x32749872 +80001434: 00012d03 lw x26,0(x2) +80001438: 00410113 addi x2,x2,4 + +8000143c : +Zbkb_rori_cg_cp_uimm_uimm31: + rori x24, x26, 31 # perform operation +8000143c: 61fd5c13 rori x24,x26,0x1f + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rori_cg_cp_uimm_uimm31, Zbkb_rori_cg_cp_uimm_uimm31_str) +80001440: 000ca203 lw x4,0(x25) +80001444: 01820863 beq x4,x24,80001454 +80001448: 0b8012ef jal x5,80002500 +8000144c: 8000143c .word 0x8000143c +80001450: 8000a2eb .word 0x8000a2eb +80001454: 004c8c93 addi x25,x25,4 + + mv x2, x25 # restore signature pointer to default register for teardown +80001458: 000c8113 addi x2,x25,0 + +8000145c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000145c: 00000513 addi x10,x0,0 +80001460: 00000073 ecall +80001464: fff00513 addi x10,x0,-1 +80001468: 1d800413 addi x8,x0,472 + +8000146c : +8000146c: 34002373 csrrs x6,mscratch,x0 + +80001470 : +80001470: 23832383 lw x7,568(x6) +80001474: 23c32483 lw x9,572(x6) + +80001478 : +80001478: 22032383 lw x7,544(x6) + +8000147c : +8000147c: 25032483 lw x9,592(x6) +80001480: 34049073 csrrw x0,mscratch,x9 + +80001484 : +80001484: 24832483 lw x9,584(x6) +80001488: 305493f3 csrrw x7,mtvec,x9 +8000148c: ffc4f493 andi x9,x9,-4 +80001490: ffc3f393 andi x7,x7,-4 +80001494: 00749e63 bne x9,x7,800014b0 + +80001498 : +80001498: 00030493 addi x9,x6,0 + +8000149c : +8000149c: 0004a783 lw x15,0(x9) +800014a0: 00f3a023 sw x15,0(x7) +800014a4: 00438393 addi x7,x7,4 +800014a8: 00448493 addi x9,x9,4 +800014ac: fe83c8e3 blt x7,x8,8000149c +800014b0: 0000100f fence.i + +800014b4 : +800014b4: 00000013 addi x0,x0,0 +800014b8: 00000013 addi x0,x0,0 +800014bc: 00000013 addi x0,x0,0 +800014c0: 00000497 auipc x9,0x0 +800014c4: 29048493 addi x9,x9,656 # 80001750 +800014c8: 00000013 addi x0,x0,0 +800014cc: 00000013 addi x0,x0,0 +800014d0: 00000013 addi x0,x0,0 +800014d4: 00000013 addi x0,x0,0 +800014d8: 00000013 addi x0,x0,0 +800014dc: 00000013 addi x0,x0,0 +800014e0: 10e49863 bne x9,x14,800015f0 +800014e4: 00000013 addi x0,x0,0 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00009517 auipc x10,0x9 +80001504: 4ae50513 addi x10,x10,1198 # 8000a9ae +80001508: 00000013 addi x0,x0,0 +8000150c: 00000013 addi x0,x0,0 +80001510: 00000013 addi x0,x0,0 +80001514: 00000013 addi x0,x0,0 +80001518: 00000013 addi x0,x0,0 +8000151c: 00000013 addi x0,x0,0 +80001520: 0001a097 auipc x1,0x1a +80001524: 044080e7 jalr x1,68(x1) # 8001b564 +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00009517 auipc x10,0x9 +80001544: 4a750513 addi x10,x10,1191 # 8000a9e7 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 0001a097 auipc x1,0x1a +80001564: 004080e7 jalr x1,4(x1) # 8001b564 +80001568: 00000013 addi x0,x0,0 +8000156c: 00000013 addi x0,x0,0 +80001570: 00000013 addi x0,x0,0 +80001574: 00000013 addi x0,x0,0 +80001578: 00000013 addi x0,x0,0 +8000157c: 00000013 addi x0,x0,0 +80001580: 00009517 auipc x10,0x9 +80001584: 4c750513 addi x10,x10,1223 # 8000aa47 +80001588: 00000013 addi x0,x0,0 +8000158c: 00000013 addi x0,x0,0 +80001590: 00000013 addi x0,x0,0 +80001594: 00000013 addi x0,x0,0 +80001598: 00000013 addi x0,x0,0 +8000159c: 00000013 addi x0,x0,0 +800015a0: 0001a097 auipc x1,0x1a +800015a4: fc4080e7 jalr x1,-60(x1) # 8001b564 +800015a8: 00000013 addi x0,x0,0 +800015ac: 00000013 addi x0,x0,0 +800015b0: 00000013 addi x0,x0,0 +800015b4: 00000013 addi x0,x0,0 +800015b8: 00000013 addi x0,x0,0 +800015bc: 00000013 addi x0,x0,0 +800015c0: 0000a517 auipc x10,0xa +800015c4: 03250513 addi x10,x10,50 # 8000b5f2 +800015c8: 00000013 addi x0,x0,0 +800015cc: 00000013 addi x0,x0,0 +800015d0: 00000013 addi x0,x0,0 +800015d4: 00000013 addi x0,x0,0 +800015d8: 00000013 addi x0,x0,0 +800015dc: 00000013 addi x0,x0,0 +800015e0: 0001a097 auipc x1,0x1a +800015e4: f84080e7 jalr x1,-124(x1) # 8001b564 +800015e8: 0001a097 auipc x1,0x1a +800015ec: fdc080e7 jalr x1,-36(x1) # 8001b5c4 + +800015f0 : +800015f0: 00000013 addi x0,x0,0 +800015f4: 00000013 addi x0,x0,0 +800015f8: 00000013 addi x0,x0,0 +800015fc: 00000013 addi x0,x0,0 +80001600: 00007317 auipc x6,0x7 +80001604: d2830313 addi x6,x6,-728 # 80008328 +80001608: 00000013 addi x0,x0,0 +8000160c: 00000013 addi x0,x0,0 +80001610: 00000013 addi x0,x0,0 +80001614: 00000013 addi x0,x0,0 +80001618: 00000013 addi x0,x0,0 +8000161c: 00000013 addi x0,x0,0 +80001620: 00032303 lw x6,0(x6) +80001624: 00000013 addi x0,x0,0 +80001628: 00000013 addi x0,x0,0 +8000162c: 00000013 addi x0,x0,0 +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 0000b397 auipc x7,0xb +80001644: c9838393 addi x7,x7,-872 # 8000c2d8 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 +80001660: 40730333 sub x6,x6,x7 +80001664: 00000013 addi x0,x0,0 +80001668: 00000013 addi x0,x0,0 +8000166c: 00000013 addi x0,x0,0 +80001670: 00000013 addi x0,x0,0 +80001674: 00000013 addi x0,x0,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 0000b417 auipc x8,0xb +80001684: c5040413 addi x8,x8,-944 # 8000c2d0 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00042203 lw x4,0(x8) +800016a4: 00620863 beq x4,x6,800016b4 +800016a8: 6c1003ef jal x7,80002568 +800016ac: 800015f0 .word 0x800015f0 +800016b0: 8000ab9b .word 0x8000ab9b + +800016b4 : +800016b4: bad0e4b7 lui x9,0xbad0e +800016b8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf1ead> +800016bc: 00e49a63 bne x9,x14,800016d0 +800016c0: 6a9003ef jal x7,80002568 +800016c4: 80001784 .word 0x80001784 +800016c8: 8000aa09 .word 0x8000aa09 +800016cc: 00000341 .word 0x00000341 + +800016d0 : +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00009517 auipc x10,0x9 +800016e4: 29450513 addi x10,x10,660 # 8000a974 +800016e8: 00000013 addi x0,x0,0 +800016ec: 00000013 addi x0,x0,0 +800016f0: 00000013 addi x0,x0,0 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 0001a097 auipc x1,0x1a +80001704: e64080e7 jalr x1,-412(x1) # 8001b564 +80001708: 0001a097 auipc x1,0x1a +8000170c: e9c080e7 jalr x1,-356(x1) # 8001b5a4 + +80001710 : +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00009517 auipc x10,0x9 +80001724: 28e50513 addi x10,x10,654 # 8000a9ae +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 0001a097 auipc x1,0x1a +80001744: e24080e7 jalr x1,-476(x1) # 8001b564 +80001748: 0001a097 auipc x1,0x1a +8000174c: e7c080e7 jalr x1,-388(x1) # 8001b5c4 + +80001750 : +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00000717 auipc x14,0x0 +80001764: ff070713 addi x14,x14,-16 # 80001750 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: cddff06f jal x0,8000145c + +80001784 : +80001784: bad0e737 lui x14,0xbad0e +80001788: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf1ead> +8000178c: cd1ff06f jal x0,8000145c +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00000013 addi x0,x0,0 +800017a4: 00000013 addi x0,x0,0 +800017a8: 00000013 addi x0,x0,0 +800017ac: 00000013 addi x0,x0,0 +800017b0: 00000013 addi x0,x0,0 +800017b4: 00000013 addi x0,x0,0 +800017b8: 00000013 addi x0,x0,0 +800017bc: 00000013 addi x0,x0,0 + +800017c0 : +800017c0: 0800006f jal x0,80001840 +800017c4: 0880006f jal x0,8000184c +800017c8: 0900006f jal x0,80001858 +800017cc: 0980006f jal x0,80001864 +800017d0: 0a00006f jal x0,80001870 +800017d4: 0a80006f jal x0,8000187c +800017d8: 0b00006f jal x0,80001888 +800017dc: 0b80006f jal x0,80001894 +800017e0: 0c00006f jal x0,800018a0 +800017e4: 0c80006f jal x0,800018ac +800017e8: 0d00006f jal x0,800018b8 +800017ec: 0d80006f jal x0,800018c4 +800017f0: 0e00006f jal x0,800018d0 +800017f4: 0e80006f jal x0,800018dc +800017f8: 0f00006f jal x0,800018e8 +800017fc: 0f80006f jal x0,800018f4 +80001800: 1000006f jal x0,80001900 +80001804: 1080006f jal x0,8000190c +80001808: 1100006f jal x0,80001918 +8000180c: 1180006f jal x0,80001924 +80001810: 1200006f jal x0,80001930 +80001814: 1280006f jal x0,8000193c +80001818: 1300006f jal x0,80001948 +8000181c: 1380006f jal x0,80001954 +80001820: 1400006f jal x0,80001960 +80001824: 13c0006f jal x0,80001960 +80001828: 1380006f jal x0,80001960 +8000182c: 1340006f jal x0,80001960 +80001830: 1300006f jal x0,80001960 +80001834: 12c0006f jal x0,80001960 +80001838: 1280006f jal x0,80001960 +8000183c: 1240006f jal x0,80001960 + +80001840 : +80001840: 34011173 csrrw x2,mscratch,x2 +80001844: 26f12823 sw x15,624(x2) +80001848: 13c007ef jal x15,80001984 +8000184c: 34011173 csrrw x2,mscratch,x2 +80001850: 26f12823 sw x15,624(x2) +80001854: 130007ef jal x15,80001984 +80001858: 34011173 csrrw x2,mscratch,x2 +8000185c: 26f12823 sw x15,624(x2) +80001860: 124007ef jal x15,80001984 +80001864: 34011173 csrrw x2,mscratch,x2 +80001868: 26f12823 sw x15,624(x2) +8000186c: 118007ef jal x15,80001984 +80001870: 34011173 csrrw x2,mscratch,x2 +80001874: 26f12823 sw x15,624(x2) +80001878: 10c007ef jal x15,80001984 +8000187c: 34011173 csrrw x2,mscratch,x2 +80001880: 26f12823 sw x15,624(x2) +80001884: 100007ef jal x15,80001984 +80001888: 34011173 csrrw x2,mscratch,x2 +8000188c: 26f12823 sw x15,624(x2) +80001890: 0f4007ef jal x15,80001984 +80001894: 34011173 csrrw x2,mscratch,x2 +80001898: 26f12823 sw x15,624(x2) +8000189c: 0e8007ef jal x15,80001984 +800018a0: 34011173 csrrw x2,mscratch,x2 +800018a4: 26f12823 sw x15,624(x2) +800018a8: 0dc007ef jal x15,80001984 +800018ac: 34011173 csrrw x2,mscratch,x2 +800018b0: 26f12823 sw x15,624(x2) +800018b4: 0d0007ef jal x15,80001984 +800018b8: 34011173 csrrw x2,mscratch,x2 +800018bc: 26f12823 sw x15,624(x2) +800018c0: 0c4007ef jal x15,80001984 +800018c4: 34011173 csrrw x2,mscratch,x2 +800018c8: 26f12823 sw x15,624(x2) +800018cc: 0b8007ef jal x15,80001984 +800018d0: 34011173 csrrw x2,mscratch,x2 +800018d4: 26f12823 sw x15,624(x2) +800018d8: 0ac007ef jal x15,80001984 +800018dc: 34011173 csrrw x2,mscratch,x2 +800018e0: 26f12823 sw x15,624(x2) +800018e4: 0a0007ef jal x15,80001984 +800018e8: 34011173 csrrw x2,mscratch,x2 +800018ec: 26f12823 sw x15,624(x2) +800018f0: 094007ef jal x15,80001984 +800018f4: 34011173 csrrw x2,mscratch,x2 +800018f8: 26f12823 sw x15,624(x2) +800018fc: 088007ef jal x15,80001984 +80001900: 34011173 csrrw x2,mscratch,x2 +80001904: 26f12823 sw x15,624(x2) +80001908: 07c007ef jal x15,80001984 +8000190c: 34011173 csrrw x2,mscratch,x2 +80001910: 26f12823 sw x15,624(x2) +80001914: 070007ef jal x15,80001984 +80001918: 34011173 csrrw x2,mscratch,x2 +8000191c: 26f12823 sw x15,624(x2) +80001920: 064007ef jal x15,80001984 +80001924: 34011173 csrrw x2,mscratch,x2 +80001928: 26f12823 sw x15,624(x2) +8000192c: 058007ef jal x15,80001984 +80001930: 34011173 csrrw x2,mscratch,x2 +80001934: 26f12823 sw x15,624(x2) +80001938: 04c007ef jal x15,80001984 +8000193c: 34011173 csrrw x2,mscratch,x2 +80001940: 26f12823 sw x15,624(x2) +80001944: 040007ef jal x15,80001984 +80001948: 34011173 csrrw x2,mscratch,x2 +8000194c: 26f12823 sw x15,624(x2) +80001950: 034007ef jal x15,80001984 +80001954: 34011173 csrrw x2,mscratch,x2 +80001958: 26f12823 sw x15,624(x2) +8000195c: 028007ef jal x15,80001984 + +80001960 : +80001960: 00000317 auipc x6,0x0 +80001964: b5430313 addi x6,x6,-1196 # 800014b4 +80001968: 00000013 addi x0,x0,0 +8000196c: 00000013 addi x0,x0,0 +80001970: 00000013 addi x0,x0,0 +80001974: 00000013 addi x0,x0,0 +80001978: 00000013 addi x0,x0,0 +8000197c: 00000013 addi x0,x0,0 +80001980: 00030067 jalr x0,0(x6) + +80001984 : +80001984: 26e12623 sw x14,620(x2) +80001988: 34011773 csrrw x14,mscratch,x2 +8000198c: 26e12a23 sw x14,628(x2) +80001990: 23012703 lw x14,560(x2) +80001994: 00070067 jalr x0,0(x14) + +80001998 : +80001998: 26912423 sw x9,616(x2) +8000199c: 26812223 sw x8,612(x2) +800019a0: 26712023 sw x7,608(x2) +800019a4: 24612e23 sw x6,604(x2) +800019a8: 00000013 addi x0,x0,0 +800019ac: 00000013 addi x0,x0,0 +800019b0: 00000013 addi x0,x0,0 +800019b4: 00000013 addi x0,x0,0 +800019b8: 00000013 addi x0,x0,0 +800019bc: 00000013 addi x0,x0,0 +800019c0: 00006317 auipc x6,0x6 +800019c4: 74830313 addi x6,x6,1864 # 80008108 +800019c8: 00000013 addi x0,x0,0 +800019cc: 00000013 addi x0,x0,0 +800019d0: 00000013 addi x0,x0,0 +800019d4: 00000013 addi x0,x0,0 +800019d8: 00000013 addi x0,x0,0 +800019dc: 00000013 addi x0,x0,0 +800019e0: 00032383 lw x7,0(x6) +800019e4: 00138393 addi x7,x7,1 +800019e8: 00732023 sw x7,0(x6) +800019ec: 34202773 csrrs x14,mcause,x0 + +800019f0 : +800019f0: 800014b7 lui x9,0x80001 +800019f4: fff48493 addi x9,x9,-1 # 80000fff +800019f8: 00e4f4b3 and x9,x9,x14 + +800019fc : +800019fc: ffe48413 addi x8,x9,-2 +80001a00: 00041663 bne x8,x0,80001a0c + +80001a04 : +80001a04: 280506e3 beq x10,x0,80002490 +80001a08: 58c0006f jal x0,80001f94 + +80001a0c : +80001a0c: ff848413 addi x8,x9,-8 +80001a10: 00245413 srli x8,x8,0x2 +80001a14: 58041063 bne x8,x0,80001f94 + +80001a18 : +80001a18: 26050ce3 beq x10,x0,80002490 + +80001a1c : +80001a1c: fff50493 addi x9,x10,-1 +80001a20: 00500393 addi x7,x0,5 +80001a24: 0274e063 bltu x9,x7,80001a44 +80001a28: 07300393 addi x7,x0,115 +80001a2c: 00750463 beq x10,x7,80001a34 +80001a30: 0800006f jal x0,80001ab0 + +80001a34 : +80001a34: 34102573 csrrs x10,mepc,x0 +80001a38: 00450413 addi x8,x10,4 +80001a3c: 34141073 csrrw x0,mepc,x8 +80001a40: 7c00006f jal x0,80002200 + +80001a44 : +80001a44: 341024f3 csrrs x9,mepc,x0 +80001a48: 00448493 addi x9,x9,4 +80001a4c: 34149073 csrrw x0,mepc,x9 +80001a50: 00100393 addi x7,x0,1 +80001a54: 00750e63 beq x10,x7,80001a70 +80001a58: 00200393 addi x7,x0,2 +80001a5c: 02750263 beq x10,x7,80001a80 +80001a60: 00300393 addi x7,x0,3 +80001a64: 02750c63 beq x10,x7,80001a9c +80001a68: fff00513 addi x10,x0,-1 +80001a6c: 7940006f jal x0,80002200 + +80001a70 : +80001a70: 000024b7 lui x9,0x2 +80001a74: 80048493 addi x9,x9,-2048 # 1800 +80001a78: 3004a073 csrrs x0,mstatus,x9 +80001a7c: 7840006f jal x0,80002200 + +80001a80 : +80001a80: 000024b7 lui x9,0x2 +80001a84: 80048493 addi x9,x9,-2048 # 1800 +80001a88: 3004b073 csrrc x0,mstatus,x9 +80001a8c: 000014b7 lui x9,0x1 +80001a90: 80048493 addi x9,x9,-2048 # 800 +80001a94: 3004a073 csrrs x0,mstatus,x9 +80001a98: 7680006f jal x0,80002200 + +80001a9c : +80001a9c: 000024b7 lui x9,0x2 +80001aa0: 80048493 addi x9,x9,-2048 # 1800 +80001aa4: 3004b073 csrrc x0,mstatus,x9 +80001aa8: 7580006f jal x0,80002200 + +80001aac : +80001aac: 00000013 addi x0,x0,0 + +80001ab0 : +80001ab0: 00000013 addi x0,x0,0 +80001ab4: 00000013 addi x0,x0,0 +80001ab8: 00000013 addi x0,x0,0 +80001abc: 00000013 addi x0,x0,0 +80001ac0: 00000397 auipc x7,0x0 +80001ac4: 17038393 addi x7,x7,368 # 80001c30 +80001ac8: 00000013 addi x0,x0,0 +80001acc: 00000013 addi x0,x0,0 +80001ad0: 00000013 addi x0,x0,0 +80001ad4: 00000013 addi x0,x0,0 +80001ad8: 00000013 addi x0,x0,0 +80001adc: 00000013 addi x0,x0,0 + +80001ae0 : +80001ae0: 0003a403 lw x8,0(x7) +80001ae4: 00a40863 beq x8,x10,80001af4 +80001ae8: 04040863 beq x8,x0,80001b38 +80001aec: 00838393 addi x7,x7,8 +80001af0: ff1ff06f jal x0,80001ae0 + +80001af4 : +80001af4: 00008493 addi x9,x1,0 +80001af8: 00000013 addi x0,x0,0 +80001afc: 00000013 addi x0,x0,0 +80001b00: 00000097 auipc x1,0x0 +80001b04: 02408093 addi x1,x1,36 # 80001b24 +80001b08: 00000013 addi x0,x0,0 +80001b0c: 00000013 addi x0,x0,0 +80001b10: 00000013 addi x0,x0,0 +80001b14: 00000013 addi x0,x0,0 +80001b18: 00000013 addi x0,x0,0 +80001b1c: 00000013 addi x0,x0,0 +80001b20: 00038067 jalr x0,0(x7) + +80001b24 : +80001b24: 00048093 addi x1,x9,0 +80001b28: 34102473 csrrs x8,mepc,x0 +80001b2c: 00440413 addi x8,x8,4 +80001b30: 34141073 csrrw x0,mepc,x8 +80001b34: 6cc0006f jal x0,80002200 + +80001b38 : +80001b38: 00050493 addi x9,x10,0 +80001b3c: 00000013 addi x0,x0,0 +80001b40: 0000a517 auipc x10,0xa +80001b44: 4e950513 addi x10,x10,1257 # 8000c029 +80001b48: 00000013 addi x0,x0,0 +80001b4c: 00000013 addi x0,x0,0 +80001b50: 00000013 addi x0,x0,0 +80001b54: 00000013 addi x0,x0,0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 0001a097 auipc x1,0x1a +80001b64: a04080e7 jalr x1,-1532(x1) # 8001b564 +80001b68: 00048513 addi x10,x9,0 +80001b6c: 02000593 addi x11,x0,32 +80001b70: 4a8020ef jal x1,80004018 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 00009517 auipc x10,0x9 +80001b84: 91850513 addi x10,x10,-1768 # 8000a498 +80001b88: 00000013 addi x0,x0,0 +80001b8c: 00000013 addi x0,x0,0 +80001b90: 00000013 addi x0,x0,0 +80001b94: 00000013 addi x0,x0,0 +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 0001a097 auipc x1,0x1a +80001ba4: 9c4080e7 jalr x1,-1596(x1) # 8001b564 +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 00009517 auipc x10,0x9 +80001bc4: ef050513 addi x10,x10,-272 # 8000aab0 +80001bc8: 00000013 addi x0,x0,0 +80001bcc: 00000013 addi x0,x0,0 +80001bd0: 00000013 addi x0,x0,0 +80001bd4: 00000013 addi x0,x0,0 +80001bd8: 00000013 addi x0,x0,0 +80001bdc: 00000013 addi x0,x0,0 +80001be0: 0001a097 auipc x1,0x1a +80001be4: 984080e7 jalr x1,-1660(x1) # 8001b564 +80001be8: 00000013 addi x0,x0,0 +80001bec: 00000013 addi x0,x0,0 +80001bf0: 00000013 addi x0,x0,0 +80001bf4: 00000013 addi x0,x0,0 +80001bf8: 00000013 addi x0,x0,0 +80001bfc: 00000013 addi x0,x0,0 +80001c00: 00009517 auipc x10,0x9 +80001c04: dae50513 addi x10,x10,-594 # 8000a9ae +80001c08: 00000013 addi x0,x0,0 +80001c0c: 00000013 addi x0,x0,0 +80001c10: 00000013 addi x0,x0,0 +80001c14: 00000013 addi x0,x0,0 +80001c18: 00000013 addi x0,x0,0 +80001c1c: 00000013 addi x0,x0,0 +80001c20: 0001a097 auipc x1,0x1a +80001c24: 944080e7 jalr x1,-1724(x1) # 8001b564 +80001c28: 0001a097 auipc x1,0x1a +80001c2c: 99c080e7 jalr x1,-1636(x1) # 8001b5c4 + +80001c30 : +80001c30: 30002573 .word 0x30002573 +80001c34: 00008067 jalr x0,0(x1) +80001c38: 30059073 .word 0x30059073 +80001c3c: 00008067 jalr x0,0(x1) +80001c40: 3005a073 .word 0x3005a073 +80001c44: 00008067 jalr x0,0(x1) +80001c48: 3005b073 .word 0x3005b073 +80001c4c: 00008067 jalr x0,0(x1) +80001c50: 30402573 .word 0x30402573 +80001c54: 00008067 jalr x0,0(x1) +80001c58: 30459073 .word 0x30459073 +80001c5c: 00008067 jalr x0,0(x1) +80001c60: 3045a073 .word 0x3045a073 +80001c64: 00008067 jalr x0,0(x1) +80001c68: 3045b073 .word 0x3045b073 +80001c6c: 00008067 jalr x0,0(x1) +80001c70: 30602573 .word 0x30602573 +80001c74: 00008067 jalr x0,0(x1) +80001c78: 30659073 .word 0x30659073 +80001c7c: 00008067 jalr x0,0(x1) +80001c80: 3065a073 .word 0x3065a073 +80001c84: 00008067 jalr x0,0(x1) +80001c88: 3065b073 .word 0x3065b073 +80001c8c: 00008067 jalr x0,0(x1) +80001c90: 30a02573 .word 0x30a02573 +80001c94: 00008067 jalr x0,0(x1) +80001c98: 30a59073 .word 0x30a59073 +80001c9c: 00008067 jalr x0,0(x1) +80001ca0: 30a5a073 .word 0x30a5a073 +80001ca4: 00008067 jalr x0,0(x1) +80001ca8: 30a5b073 .word 0x30a5b073 +80001cac: 00008067 jalr x0,0(x1) +80001cb0: 34402573 .word 0x34402573 +80001cb4: 00008067 jalr x0,0(x1) +80001cb8: 34459073 .word 0x34459073 +80001cbc: 00008067 jalr x0,0(x1) +80001cc0: 3445a073 .word 0x3445a073 +80001cc4: 00008067 jalr x0,0(x1) +80001cc8: 3445b073 .word 0x3445b073 +80001ccc: 00008067 jalr x0,0(x1) +80001cd0: 74702573 .word 0x74702573 +80001cd4: 00008067 jalr x0,0(x1) +80001cd8: 74759073 .word 0x74759073 +80001cdc: 00008067 jalr x0,0(x1) +80001ce0: 7475a073 .word 0x7475a073 +80001ce4: 00008067 jalr x0,0(x1) +80001ce8: 7475b073 .word 0x7475b073 +80001cec: 00008067 jalr x0,0(x1) +80001cf0: 32002573 .word 0x32002573 +80001cf4: 00008067 jalr x0,0(x1) +80001cf8: 32059073 .word 0x32059073 +80001cfc: 00008067 jalr x0,0(x1) +80001d00: 3205a073 .word 0x3205a073 +80001d04: 00008067 jalr x0,0(x1) +80001d08: 3205b073 .word 0x3205b073 +80001d0c: 00008067 jalr x0,0(x1) +80001d10: b0002573 .word 0xb0002573 +80001d14: 00008067 jalr x0,0(x1) +80001d18: b0059073 .word 0xb0059073 +80001d1c: 00008067 jalr x0,0(x1) +80001d20: b005a073 .word 0xb005a073 +80001d24: 00008067 jalr x0,0(x1) +80001d28: b005b073 .word 0xb005b073 +80001d2c: 00008067 jalr x0,0(x1) +80001d30: b0202573 .word 0xb0202573 +80001d34: 00008067 jalr x0,0(x1) +80001d38: b0259073 .word 0xb0259073 +80001d3c: 00008067 jalr x0,0(x1) +80001d40: b025a073 .word 0xb025a073 +80001d44: 00008067 jalr x0,0(x1) +80001d48: b025b073 .word 0xb025b073 +80001d4c: 00008067 jalr x0,0(x1) +80001d50: 10002573 .word 0x10002573 +80001d54: 00008067 jalr x0,0(x1) +80001d58: 10059073 .word 0x10059073 +80001d5c: 00008067 jalr x0,0(x1) +80001d60: 1005a073 .word 0x1005a073 +80001d64: 00008067 jalr x0,0(x1) +80001d68: 1005b073 .word 0x1005b073 +80001d6c: 00008067 jalr x0,0(x1) +80001d70: 10402573 .word 0x10402573 +80001d74: 00008067 jalr x0,0(x1) +80001d78: 10459073 .word 0x10459073 +80001d7c: 00008067 jalr x0,0(x1) +80001d80: 1045a073 .word 0x1045a073 +80001d84: 00008067 jalr x0,0(x1) +80001d88: 1045b073 .word 0x1045b073 +80001d8c: 00008067 jalr x0,0(x1) +80001d90: 10602573 .word 0x10602573 +80001d94: 00008067 jalr x0,0(x1) +80001d98: 10659073 .word 0x10659073 +80001d9c: 00008067 jalr x0,0(x1) +80001da0: 1065a073 .word 0x1065a073 +80001da4: 00008067 jalr x0,0(x1) +80001da8: 1065b073 .word 0x1065b073 +80001dac: 00008067 jalr x0,0(x1) +80001db0: 10a02573 .word 0x10a02573 +80001db4: 00008067 jalr x0,0(x1) +80001db8: 10a59073 .word 0x10a59073 +80001dbc: 00008067 jalr x0,0(x1) +80001dc0: 10a5a073 .word 0x10a5a073 +80001dc4: 00008067 jalr x0,0(x1) +80001dc8: 10a5b073 .word 0x10a5b073 +80001dcc: 00008067 jalr x0,0(x1) +80001dd0: 14402573 .word 0x14402573 +80001dd4: 00008067 jalr x0,0(x1) +80001dd8: 14459073 .word 0x14459073 +80001ddc: 00008067 jalr x0,0(x1) +80001de0: 1445a073 .word 0x1445a073 +80001de4: 00008067 jalr x0,0(x1) +80001de8: 1445b073 .word 0x1445b073 +80001dec: 00008067 jalr x0,0(x1) +80001df0: 14d02573 .word 0x14d02573 +80001df4: 00008067 jalr x0,0(x1) +80001df8: 14d59073 .word 0x14d59073 +80001dfc: 00008067 jalr x0,0(x1) +80001e00: 14d5a073 .word 0x14d5a073 +80001e04: 00008067 jalr x0,0(x1) +80001e08: 14d5b073 .word 0x14d5b073 +80001e0c: 00008067 jalr x0,0(x1) +80001e10: 18002573 .word 0x18002573 +80001e14: 00008067 jalr x0,0(x1) +80001e18: 18059073 .word 0x18059073 +80001e1c: 00008067 jalr x0,0(x1) +80001e20: 1805a073 .word 0x1805a073 +80001e24: 00008067 jalr x0,0(x1) +80001e28: 1805b073 .word 0x1805b073 +80001e2c: 00008067 jalr x0,0(x1) +80001e30: 7a002573 .word 0x7a002573 +80001e34: 00008067 jalr x0,0(x1) +80001e38: 7a059073 .word 0x7a059073 +80001e3c: 00008067 jalr x0,0(x1) +80001e40: 7a05a073 .word 0x7a05a073 +80001e44: 00008067 jalr x0,0(x1) +80001e48: 7a05b073 .word 0x7a05b073 +80001e4c: 00008067 jalr x0,0(x1) +80001e50: 7a102573 .word 0x7a102573 +80001e54: 00008067 jalr x0,0(x1) +80001e58: 7a159073 .word 0x7a159073 +80001e5c: 00008067 jalr x0,0(x1) +80001e60: 7a15a073 .word 0x7a15a073 +80001e64: 00008067 jalr x0,0(x1) +80001e68: 7a15b073 .word 0x7a15b073 +80001e6c: 00008067 jalr x0,0(x1) +80001e70: 7a202573 .word 0x7a202573 +80001e74: 00008067 jalr x0,0(x1) +80001e78: 7a259073 .word 0x7a259073 +80001e7c: 00008067 jalr x0,0(x1) +80001e80: 7a25a073 .word 0x7a25a073 +80001e84: 00008067 jalr x0,0(x1) +80001e88: 7a25b073 .word 0x7a25b073 +80001e8c: 00008067 jalr x0,0(x1) +80001e90: 7a302573 .word 0x7a302573 +80001e94: 00008067 jalr x0,0(x1) +80001e98: 7a359073 .word 0x7a359073 +80001e9c: 00008067 jalr x0,0(x1) +80001ea0: 7a35a073 .word 0x7a35a073 +80001ea4: 00008067 jalr x0,0(x1) +80001ea8: 7a35b073 .word 0x7a35b073 +80001eac: 00008067 jalr x0,0(x1) +80001eb0: 7a402573 .word 0x7a402573 +80001eb4: 00008067 jalr x0,0(x1) +80001eb8: 7a459073 .word 0x7a459073 +80001ebc: 00008067 jalr x0,0(x1) +80001ec0: 7a45a073 .word 0x7a45a073 +80001ec4: 00008067 jalr x0,0(x1) +80001ec8: 7a45b073 .word 0x7a45b073 +80001ecc: 00008067 jalr x0,0(x1) +80001ed0: 7a502573 .word 0x7a502573 +80001ed4: 00008067 jalr x0,0(x1) +80001ed8: 7a559073 .word 0x7a559073 +80001edc: 00008067 jalr x0,0(x1) +80001ee0: 7a55a073 .word 0x7a55a073 +80001ee4: 00008067 jalr x0,0(x1) +80001ee8: 7a55b073 .word 0x7a55b073 +80001eec: 00008067 jalr x0,0(x1) +80001ef0: 7a802573 .word 0x7a802573 +80001ef4: 00008067 jalr x0,0(x1) +80001ef8: 7a859073 .word 0x7a859073 +80001efc: 00008067 jalr x0,0(x1) +80001f00: 7a85a073 .word 0x7a85a073 +80001f04: 00008067 jalr x0,0(x1) +80001f08: 7a85b073 .word 0x7a85b073 +80001f0c: 00008067 jalr x0,0(x1) +80001f10: 7aa02573 .word 0x7aa02573 +80001f14: 00008067 jalr x0,0(x1) +80001f18: 7aa59073 .word 0x7aa59073 +80001f1c: 00008067 jalr x0,0(x1) +80001f20: 7aa5a073 .word 0x7aa5a073 +80001f24: 00008067 jalr x0,0(x1) +80001f28: 7aa5b073 .word 0x7aa5b073 +80001f2c: 00008067 jalr x0,0(x1) +80001f30: 5a802573 .word 0x5a802573 +80001f34: 00008067 jalr x0,0(x1) +80001f38: 5a859073 .word 0x5a859073 +80001f3c: 00008067 jalr x0,0(x1) +80001f40: 5a85a073 .word 0x5a85a073 +80001f44: 00008067 jalr x0,0(x1) +80001f48: 5a85b073 .word 0x5a85b073 +80001f4c: 00008067 jalr x0,0(x1) +80001f50: 6a802573 .word 0x6a802573 +80001f54: 00008067 jalr x0,0(x1) +80001f58: 6a859073 .word 0x6a859073 +80001f5c: 00008067 jalr x0,0(x1) +80001f60: 6a85a073 .word 0x6a85a073 +80001f64: 00008067 jalr x0,0(x1) +80001f68: 6a85b073 .word 0x6a85b073 +80001f6c: 00008067 jalr x0,0(x1) +80001f70: 0005a503 lw x10,0(x11) +80001f74: 00008067 jalr x0,0(x1) +80001f78: 0045a503 lw x10,4(x11) +80001f7c: 00008067 jalr x0,0(x1) +80001f80: 00c5a023 sw x12,0(x11) +80001f84: 00008067 jalr x0,0(x1) +80001f88: 00c5a223 sw x12,4(x11) +80001f8c: 00008067 jalr x0,0(x1) +80001f90: 00000000 .word 0x00000000 + +80001f94 : +80001f94: 01000393 addi x7,x0,16 +80001f98: 00075c63 bge x14,x0,80001fb0 + +80001f9c : +80001f9c: 00171413 slli x8,x14,0x1 +80001fa0: ff240413 addi x8,x8,-14 +80001fa4: 00045663 bge x8,x0,80001fb0 +80001fa8: 00c00393 addi x7,x0,12 +80001fac: 0040006f jal x0,80001fb0 + +80001fb0 : +80001fb0: d6810113 addi x2,x2,-664 +80001fb4: 4b012303 lw x6,1200(x2) +80001fb8: 007304b3 add x9,x6,x7 +80001fbc: 4a912823 sw x9,1200(x2) +80001fc0: 49012403 lw x8,1168(x2) +80001fc4: 40830333 sub x6,x6,x8 +80001fc8: 29810113 addi x2,x2,664 +80001fcc: 1f812403 lw x8,504(x2) +80001fd0: 00830333 add x6,x6,x8 +80001fd4: 34102473 csrrs x8,mepc,x0 +80001fd8: 00000013 addi x0,x0,0 +80001fdc: 00000013 addi x0,x0,0 +80001fe0: 00008497 auipc x9,0x8 +80001fe4: 49848493 addi x9,x9,1176 # 8000a478 +80001fe8: 00000013 addi x0,x0,0 +80001fec: 00000013 addi x0,x0,0 +80001ff0: 00000013 addi x0,x0,0 +80001ff4: 00000013 addi x0,x0,0 +80001ff8: 00000013 addi x0,x0,0 +80001ffc: 00000013 addi x0,x0,0 +80002000: 0084a023 sw x8,0(x9) +80002004: 00e4a423 sw x14,8(x9) +80002008: 34302473 csrrs x8,mtval,x0 +8000200c: 0084a823 sw x8,16(x9) +80002010: 30002473 csrrs x8,mstatus,x0 +80002014: 0084ac23 sw x8,24(x9) +80002018: 00000013 addi x0,x0,0 +8000201c: 00000013 addi x0,x0,0 +80002020: 00019417 auipc x8,0x19 +80002024: d1c40413 addi x8,x8,-740 # 8001ad3c +80002028: 00000013 addi x0,x0,0 +8000202c: 00000013 addi x0,x0,0 +80002030: 00000013 addi x0,x0,0 +80002034: 00000013 addi x0,x0,0 +80002038: 00000013 addi x0,x0,0 +8000203c: 00000013 addi x0,x0,0 +80002040: 007304b3 add x9,x6,x7 +80002044: f0946663 bltu x8,x9,80001750 + +80002048 : +80002048: 24012403 lw x8,576(x2) +8000204c: 408787b3 sub x15,x15,x8 +80002050: 00179493 slli x9,x15,0x1 +80002054: 009787b3 add x15,x15,x9 +80002058: 0057d793 srli x15,x15,0x5 +8000205c: 00679793 slli x15,x15,0x6 +80002060: 0077e7b3 or x15,x15,x7 +80002064: 00378793 addi x15,x15,3 +80002068: 02075a63 bge x14,x0,8000209c +8000206c: 00f00413 addi x8,x0,15 +80002070: 00877433 and x8,x14,x8 +80002074: 304024f3 csrrs x9,mie,x0 +80002078: 0084d4b3 srl x9,x9,x8 +8000207c: 0014f493 andi x9,x9,1 +80002080: 00b49493 slli x9,x9,0xb +80002084: 0097e7b3 or x15,x15,x9 +80002088: 344024f3 csrrs x9,mip,x0 +8000208c: 0084d4b3 srl x9,x9,x8 +80002090: 0014f493 andi x9,x9,1 +80002094: 00c49493 slli x9,x9,0xc +80002098: 0097e7b3 or x15,x15,x9 +8000209c: 300023f3 csrrs x7,mstatus,x0 +800020a0: 00f39393 slli x7,x7,0xf +800020a4: 0023d393 srli x7,x7,0x2 +800020a8: 0021a437 lui x8,0x21a +800020ac: fe540413 addi x8,x8,-27 # 219fe5 +800020b0: fff44413 xori x8,x8,-1 +800020b4: 0083f433 and x8,x7,x8 +800020b8: 0087e433 or x8,x15,x8 +800020bc: 310024f3 csrrs x9,0x310,x0 +800020c0: 1c04f493 andi x9,x9,448 +800020c4: 00849493 slli x9,x9,0x8 +800020c8: 00946433 or x8,x8,x9 +800020cc: 00032483 lw x9,0(x6) +800020d0: 00848e63 beq x9,x8,800020ec +800020d4: 00040313 addi x6,x8,0 +800020d8: 00048213 addi x4,x9,0 +800020dc: 48c003ef jal x7,80002568 +800020e0: 80002048 .word 0x80002048 +800020e4: 8000abb2 .word 0x8000abb2 +800020e8: 00000341 .word 0x00000341 + +800020ec : +800020ec: 00070413 addi x8,x14,0 +800020f0: 00432483 lw x9,4(x6) +800020f4: 00848e63 beq x9,x8,80002110 +800020f8: 00040313 addi x6,x8,0 +800020fc: 00048213 addi x4,x9,0 +80002100: 468003ef jal x7,80002568 +80002104: 800020ec .word 0x800020ec +80002108: 8000acb4 .word 0x8000acb4 +8000210c: 00000341 .word 0x00000341 +80002110: 10074863 blt x14,x0,80002220 + +80002114 : +80002114: 34102473 csrrs x8,mepc,x0 +80002118: 00010493 addi x9,x2,0 +8000211c: 0040006f jal x0,80002120 + +80002120 : +80002120: 08000393 addi x7,x0,128 +80002124: 04740863 beq x8,x7,80002174 +80002128: 00238393 addi x7,x7,2 +8000212c: 04740463 beq x8,x7,80002174 +80002130: 04040263 beq x8,x0,80002174 +80002134: 2084a383 lw x7,520(x9) +80002138: 2104a783 lw x15,528(x9) +8000213c: 007787b3 add x15,x15,x7 +80002140: 00f47463 bgeu x8,x15,80002148 +80002144: 02747663 bgeu x8,x7,80002170 + +80002148 : +80002148: 1d84a383 lw x7,472(x9) +8000214c: 1e04a783 lw x15,480(x9) +80002150: 007787b3 add x15,x15,x7 +80002154: 00f47463 bgeu x8,x15,8000215c +80002158: 00747c63 bgeu x8,x7,80002170 + +8000215c : +8000215c: 1e84a383 lw x7,488(x9) +80002160: 1f04a783 lw x15,496(x9) +80002164: 007787b3 add x15,x15,x7 +80002168: e0f47e63 bgeu x8,x15,80001784 +8000216c: e0746c63 bltu x8,x7,80001784 + +80002170 : +80002170: 40740433 sub x8,x8,x7 + +80002174 : +80002174: 00832483 lw x9,8(x6) +80002178: 00848e63 beq x9,x8,80002194 +8000217c: 00040313 addi x6,x8,0 +80002180: 00048213 addi x4,x9,0 +80002184: 3e4003ef jal x7,80002568 +80002188: 80002174 .word 0x80002174 +8000218c: 8000adaf .word 0x8000adaf +80002190: 00000341 .word 0x00000341 + +80002194 : +80002194: 34102473 csrrs x8,mepc,x0 +80002198: 342023f3 csrrs x7,mcause,x0 +8000219c: 00c00793 addi x15,x0,12 +800021a0: 00f38a63 beq x7,x15,800021b4 +800021a4: 00100793 addi x15,x0,1 +800021a8: 00f38663 beq x7,x15,800021b4 +800021ac: 01400793 addi x15,x0,20 +800021b0: 00f39663 bne x7,x15,800021bc +800021b4: 34109073 csrrw x0,mepc,x1 +800021b8: 0100006f jal x0,800021c8 + +800021bc : +800021bc: 00400393 addi x7,x0,4 +800021c0: 00740433 add x8,x8,x7 +800021c4: 34141073 csrrw x0,mepc,x8 + +800021c8 : +800021c8: 34302473 csrrs x8,mtval,x0 + +800021cc : +800021cc: 00c32483 lw x9,12(x6) +800021d0: 00848e63 beq x9,x8,800021ec +800021d4: 00040313 addi x6,x8,0 +800021d8: 00048213 addi x4,x9,0 +800021dc: 38c003ef jal x7,80002568 +800021e0: 800021cc .word 0x800021cc +800021e4: 8000aea2 .word 0x8000aea2 +800021e8: 00000341 .word 0x00000341 + +800021ec : +800021ec: 30102473 csrrs x8,misa,x0 +800021f0: 01841413 slli x8,x8,0x18 +800021f4: 00045263 bge x8,x0,800021f8 + +800021f8 : +800021f8: 10000393 addi x7,x0,256 +800021fc: 05c0006f jal x0,80002258 + +80002200 : +80002200: 25c12303 lw x6,604(x2) +80002204: 26012383 lw x7,608(x2) +80002208: 26412403 lw x8,612(x2) +8000220c: 26812483 lw x9,616(x2) +80002210: 26c12703 lw x14,620(x2) +80002214: 27012783 lw x15,624(x2) +80002218: 27412103 lw x2,628(x2) +8000221c: 30200073 mret + +80002220 : +80002220: 00100413 addi x8,x0,1 +80002224: 01f77393 andi x7,x14,31 +80002228: 00741433 sll x8,x8,x7 +8000222c: 304434f3 csrrc x9,mie,x8 +80002230: 34443473 csrrc x8,mip,x8 + +80002234 : +80002234: 00832483 lw x9,8(x6) +80002238: 00848e63 beq x9,x8,80002254 +8000223c: 00040313 addi x6,x8,0 +80002240: 00048213 addi x4,x9,0 +80002244: 324003ef jal x7,80002568 +80002248: 80002234 .word 0x80002234 +8000224c: 8000b015 .word 0x8000b015 +80002250: 00000341 .word 0x00000341 +80002254: 00000393 addi x7,x0,0 + +80002258 : +80002258: 00000417 auipc x8,0x0 +8000225c: 03c40413 addi x8,x8,60 # 80002294 +80002260: 00740433 add x8,x8,x7 +80002264: 00371393 slli x7,x14,0x3 +80002268: 00740433 add x8,x8,x7 +8000226c: ff847413 andi x8,x8,-8 +80002270: 00042403 lw x8,0(x8) + +80002274 : +80002274: 00040a63 beq x8,x0,80002288 +80002278: 01f41393 slli x7,x8,0x1f +8000227c: 0003d863 bge x7,x0,8000228c +80002280: 00145413 srli x8,x8,0x1 +80002284: f6870ee3 beq x14,x8,80002200 +80002288: cfcff06f jal x0,80001784 + +8000228c : +8000228c: 00040067 jalr x0,0(x8) + +80002290 : + ... +80002298: 00000001 .word 0x00000001 +8000229c: 00000000 .word 0x00000000 +800022a0: 00000001 .word 0x00000001 +800022a4: 00000000 .word 0x00000000 +800022a8: 8001b000 .word 0x8001b000 + ... +800022b8: 00000001 .word 0x00000001 +800022bc: 00000000 .word 0x00000000 +800022c0: 00000001 .word 0x00000001 +800022c4: 00000000 .word 0x00000000 +800022c8: 8001b014 .word 0x8001b014 + ... +800022d8: 00000001 .word 0x00000001 +800022dc: 00000000 .word 0x00000000 +800022e0: 00000001 .word 0x00000001 +800022e4: 00000000 .word 0x00000000 +800022e8: 8001b030 .word 0x8001b030 +800022ec: 00000000 .word 0x00000000 +800022f0: 00000001 .word 0x00000001 +800022f4: 00000000 .word 0x00000000 +800022f8: 00000001 .word 0x00000001 +800022fc: 00000000 .word 0x00000000 +80002300: 00000001 .word 0x00000001 +80002304: 00000000 .word 0x00000000 +80002308: 00000001 .word 0x00000001 +8000230c: 00000000 .word 0x00000000 +80002310: 00000001 .word 0x00000001 +80002314: 00000000 .word 0x00000000 +80002318: 00000001 .word 0x00000001 +8000231c: 00000000 .word 0x00000000 +80002320: 00000001 .word 0x00000001 +80002324: 00000000 .word 0x00000000 +80002328: 00000001 .word 0x00000001 +8000232c: 00000000 .word 0x00000000 +80002330: 00000001 .word 0x00000001 +80002334: 00000000 .word 0x00000000 +80002338: 00000001 .word 0x00000001 +8000233c: 00000000 .word 0x00000000 +80002340: 00000001 .word 0x00000001 +80002344: 00000000 .word 0x00000000 +80002348: 00000001 .word 0x00000001 + ... + +80002390 : +80002390: 00000001 .word 0x00000001 +80002394: 00000000 .word 0x00000000 +80002398: 00000003 .word 0x00000003 +8000239c: 00000000 .word 0x00000000 +800023a0: 00000005 .word 0x00000005 +800023a4: 00000000 .word 0x00000000 +800023a8: 00000007 .word 0x00000007 +800023ac: 00000000 .word 0x00000000 +800023b0: 00000009 .word 0x00000009 +800023b4: 00000000 .word 0x00000000 +800023b8: 0000000b .word 0x0000000b +800023bc: 00000000 .word 0x00000000 +800023c0: 0000000d .word 0x0000000d +800023c4: 00000000 .word 0x00000000 +800023c8: 0000000f .word 0x0000000f +800023cc: 00000000 .word 0x00000000 +800023d0: 00000011 .word 0x00000011 +800023d4: 00000000 .word 0x00000000 +800023d8: 00000013 .word 0x00000013 +800023dc: 00000000 .word 0x00000000 +800023e0: 00000015 .word 0x00000015 +800023e4: 00000000 .word 0x00000000 +800023e8: 00000017 .word 0x00000017 +800023ec: 00000000 .word 0x00000000 +800023f0: 00000019 .word 0x00000019 +800023f4: 00000000 .word 0x00000000 +800023f8: 0000001b .word 0x0000001b +800023fc: 00000000 .word 0x00000000 +80002400: 0000001d .word 0x0000001d +80002404: 00000000 .word 0x00000000 +80002408: 0000001f .word 0x0000001f +8000240c: 00000000 .word 0x00000000 +80002410: 00000021 .word 0x00000021 +80002414: 00000000 .word 0x00000000 +80002418: 00000023 .word 0x00000023 +8000241c: 00000000 .word 0x00000000 +80002420: 00000025 .word 0x00000025 +80002424: 00000000 .word 0x00000000 +80002428: 00000027 .word 0x00000027 +8000242c: 00000000 .word 0x00000000 +80002430: 00000029 .word 0x00000029 +80002434: 00000000 .word 0x00000000 +80002438: 0000002b .word 0x0000002b +8000243c: 00000000 .word 0x00000000 +80002440: 0000002d .word 0x0000002d +80002444: 00000000 .word 0x00000000 +80002448: 0000002f .word 0x0000002f + ... + +80002490 : +80002490: 300023f3 csrrs x7,mstatus,x0 +80002494: 00b3d493 srli x9,x7,0xb +80002498: 0034f493 andi x9,x9,3 +8000249c: ffd48413 addi x8,x9,-3 +800024a0: 341023f3 csrrs x7,mepc,x0 +800024a4: 00000493 addi x9,x0,0 +800024a8: 02040c63 beq x8,x0,800024e0 +800024ac: 29810113 addi x2,x2,664 +800024b0: 310023f3 csrrs x7,0x310,x0 +800024b4: 01839393 slli x7,x7,0x18 +800024b8: 0003da63 bge x7,x0,800024cc + +800024bc : +800024bc: 29810113 addi x2,x2,664 +800024c0: 47012783 lw x15,1136(x2) +800024c4: d6810113 addi x2,x2,-664 +800024c8: 0080006f jal x0,800024d0 + +800024cc : +800024cc: f4012783 lw x15,-192(x2) +800024d0: 341023f3 csrrs x7,mepc,x0 +800024d4: 40f383b3 sub x7,x7,x15 +800024d8: d6810113 addi x2,x2,-664 +800024dc: 1d812483 lw x9,472(x2) + +800024e0 : +800024e0: 007483b3 add x7,x9,x7 +800024e4: 25c12303 lw x6,604(x2) +800024e8: 26412403 lw x8,612(x2) +800024ec: 26812483 lw x9,616(x2) +800024f0: 26c12703 lw x14,620(x2) +800024f4: 27012783 lw x15,624(x2) +800024f8: 27412103 lw x2,628(x2) +800024fc: 00438067 jalr x0,4(x7) + +80002500 : +80002500: 00008217 auipc x4,0x8 +80002504: e3020213 addi x4,x4,-464 # 8000a330 +80002508: 02522423 sw x5,40(x4) # 28 +8000250c: 00122423 sw x1,8(x4) # 8 +80002510: 00022023 sw x0,0(x4) # 0 +80002514: 0880006f jal x0,8000259c + +80002518 : +80002518: 00008397 auipc x7,0x8 +8000251c: e1838393 addi x7,x7,-488 # 8000a330 +80002520: 0483a023 sw x8,64(x7) +80002524: 0243a023 sw x4,32(x7) +80002528: 0253a423 sw x5,40(x7) +8000252c: 0013a423 sw x1,8(x7) +80002530: 0003a023 sw x0,0(x7) +80002534: 00038213 addi x4,x7,0 +80002538: 00040293 addi x5,x8,0 +8000253c: 0600006f jal x0,8000259c + +80002540 : +80002540: 00008697 auipc x13,0x8 +80002544: df068693 addi x13,x13,-528 # 8000a330 +80002548: 06e6a823 sw x14,112(x13) +8000254c: 0246a023 sw x4,32(x13) +80002550: 0256a423 sw x5,40(x13) +80002554: 0016a423 sw x1,8(x13) +80002558: 0006a023 sw x0,0(x13) +8000255c: 00068213 addi x4,x13,0 +80002560: 00070293 addi x5,x14,0 +80002564: 0380006f jal x0,8000259c + +80002568 : +80002568: 00008497 auipc x9,0x8 +8000256c: dc848493 addi x9,x9,-568 # 8000a330 +80002570: 0674a423 sw x7,104(x9) +80002574: 0244a023 sw x4,32(x9) +80002578: 0254a423 sw x5,40(x9) +8000257c: 0014a423 sw x1,8(x9) +80002580: 00300093 addi x1,x0,3 +80002584: 0014a023 sw x1,0(x9) +80002588: 1064a823 sw x6,272(x9) +8000258c: 1044ac23 sw x4,280(x9) +80002590: 00048213 addi x4,x9,0 +80002594: 00038293 addi x5,x7,0 +80002598: 0040006f jal x0,8000259c + +8000259c : +8000259c: 00222823 sw x2,16(x4) # 10 +800025a0: 00322c23 sw x3,24(x4) # 18 +800025a4: 02622823 sw x6,48(x4) # 30 +800025a8: 02722c23 sw x7,56(x4) # 38 +800025ac: 04822023 sw x8,64(x4) # 40 +800025b0: 04922423 sw x9,72(x4) # 48 +800025b4: 04a22823 sw x10,80(x4) # 50 +800025b8: 04b22c23 sw x11,88(x4) # 58 +800025bc: 06c22023 sw x12,96(x4) # 60 +800025c0: 06d22423 sw x13,104(x4) # 68 +800025c4: 06e22823 sw x14,112(x4) # 70 +800025c8: 06f22c23 sw x15,120(x4) # 78 +800025cc: 09022023 sw x16,128(x4) # 80 +800025d0: 09122423 sw x17,136(x4) # 88 +800025d4: 09222823 sw x18,144(x4) # 90 +800025d8: 09322c23 sw x19,152(x4) # 98 +800025dc: 0b422023 sw x20,160(x4) # a0 +800025e0: 0b522423 sw x21,168(x4) # a8 +800025e4: 0b622823 sw x22,176(x4) # b0 +800025e8: 0b722c23 sw x23,184(x4) # b8 +800025ec: 0d822023 sw x24,192(x4) # c0 +800025f0: 0d922423 sw x25,200(x4) # c8 +800025f4: 0da22823 sw x26,208(x4) # d0 +800025f8: 0db22c23 sw x27,216(x4) # d8 +800025fc: 0fc22023 sw x28,224(x4) # e0 +80002600: 0fd22423 sw x29,232(x4) # e8 +80002604: 0fe22823 sw x30,240(x4) # f0 +80002608: 0ff22c23 sw x31,248(x4) # f8 + +8000260c : +8000260c: 00008497 auipc x9,0x8 +80002610: d244a483 lw x9,-732(x9) # 8000a330 +80002614: 00300513 addi x10,x0,3 +80002618: 18a48a63 beq x9,x10,800027ac + +8000261c : +8000261c: ffa2d303 lhu x6,-6(x5) +80002620: ff82d383 lhu x7,-8(x5) +80002624: 01031313 slli x6,x6,0x10 +80002628: 00736333 or x6,x6,x7 +8000262c: 00f35393 srli x7,x6,0xf +80002630: 01f3f393 andi x7,x7,31 +80002634: 01435413 srli x8,x6,0x14 +80002638: 01f47413 andi x8,x8,31 +8000263c: 10822223 sw x8,260(x4) # 104 +80002640: 00341313 slli x6,x8,0x3 +80002644: 00620333 add x6,x4,x6 +80002648: 00032303 lw x6,0(x6) +8000264c: 10622823 sw x6,272(x4) # 110 +80002650: ff62d303 lhu x6,-10(x5) +80002654: ff42d383 lhu x7,-12(x5) +80002658: 01031313 slli x6,x6,0x10 +8000265c: 00736333 or x6,x6,x7 +80002660: 00030513 addi x10,x6,0 +80002664: 07f37413 andi x8,x6,127 +80002668: 00300493 addi x9,x0,3 +8000266c: 0c941463 bne x8,x9,80002734 +80002670: 00c35413 srli x8,x6,0xc +80002674: 00747413 andi x8,x8,7 +80002678: 00200493 addi x9,x0,2 +8000267c: 0a941c63 bne x8,x9,80002734 +80002680: 41435393 srai x7,x6,0x14 +80002684: 00f35313 srli x6,x6,0xf +80002688: 01f37313 andi x6,x6,31 +8000268c: 00331313 slli x6,x6,0x3 +80002690: 00620333 add x6,x4,x6 +80002694: 00032303 lw x6,0(x6) +80002698: 00730333 add x6,x6,x7 +8000269c: 00337413 andi x8,x6,3 +800026a0: 0c041663 bne x8,x0,8000276c +800026a4: 00000013 addi x0,x0,0 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 0000a417 auipc x8,0xa +800026c4: 9b040413 addi x8,x8,-1616 # 8000c070 +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 08836663 bltu x6,x8,8000276c +800026e4: 00000013 addi x0,x0,0 +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00018417 auipc x8,0x18 +80002704: 64040413 addi x8,x8,1600 # 8001ad40 +80002708: 00000013 addi x0,x0,0 +8000270c: 00000013 addi x0,x0,0 +80002710: 00000013 addi x0,x0,0 +80002714: 00000013 addi x0,x0,0 +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: ffc40413 addi x8,x8,-4 +80002724: 04646463 bltu x8,x6,8000276c +80002728: 00032303 lw x6,0(x6) +8000272c: 10622c23 sw x6,280(x4) # 118 +80002730: 3700006f jal x0,80002aa0 + +80002734 : +80002734: 00100413 addi x8,x0,1 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00008497 auipc x9,0x8 +80002744: d1848493 addi x9,x9,-744 # 8000a458 +80002748: 00000013 addi x0,x0,0 +8000274c: 00000013 addi x0,x0,0 +80002750: 00000013 addi x0,x0,0 +80002754: 00000013 addi x0,x0,0 +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 0084a023 sw x8,0(x9) +80002764: 10a22c23 sw x10,280(x4) # 118 +80002768: 3380006f jal x0,80002aa0 + +8000276c : +8000276c: 00200413 addi x8,x0,2 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00008497 auipc x9,0x8 +80002784: cd848493 addi x9,x9,-808 # 8000a458 +80002788: 00000013 addi x0,x0,0 +8000278c: 00000013 addi x0,x0,0 +80002790: 00000013 addi x0,x0,0 +80002794: 00000013 addi x0,x0,0 +80002798: 00000013 addi x0,x0,0 +8000279c: 00000013 addi x0,x0,0 +800027a0: 0084a023 sw x8,0(x9) +800027a4: 10622c23 sw x6,280(x4) # 118 +800027a8: 2f80006f jal x0,80002aa0 + +800027ac : +800027ac: 0042a303 lw x6,4(x5) +800027b0: 00008817 auipc x16,0x8 +800027b4: cb880813 addi x16,x16,-840 # 8000a468 +800027b8: 00682023 sw x6,0(x16) +800027bc: 0002a303 lw x6,0(x5) +800027c0: 10622423 sw x6,264(x4) # 108 +800027c4: 00008817 auipc x16,0x8 +800027c8: ca480813 addi x16,x16,-860 # 8000a468 +800027cc: 00082303 lw x6,0(x16) +800027d0: 00008397 auipc x7,0x8 +800027d4: 3cb38393 addi x7,x7,971 # 8000ab9b +800027d8: 28730463 beq x6,x7,80002a60 +800027dc: 00000413 addi x8,x0,0 +800027e0: 00008817 auipc x16,0x8 +800027e4: c8080813 addi x16,x16,-896 # 8000a460 +800027e8: 00882023 sw x8,0(x16) +800027ec: 00008397 auipc x7,0x8 +800027f0: 3c638393 addi x7,x7,966 # 8000abb2 +800027f4: 00731863 bne x6,x7,80002804 +800027f8: 00100413 addi x8,x0,1 +800027fc: 00000493 addi x9,x0,0 +80002800: 2740006f jal x0,80002a74 +80002804: 00008397 auipc x7,0x8 +80002808: 4b038393 addi x7,x7,1200 # 8000acb4 +8000280c: 00731863 bne x6,x7,8000281c +80002810: 00200413 addi x8,x0,2 +80002814: 00000493 addi x9,x0,0 +80002818: 25c0006f jal x0,80002a74 +8000281c: 00008397 auipc x7,0x8 +80002820: 59338393 addi x7,x7,1427 # 8000adaf +80002824: 00731863 bne x6,x7,80002834 +80002828: 00300413 addi x8,x0,3 +8000282c: 00000493 addi x9,x0,0 +80002830: 2440006f jal x0,80002a74 +80002834: 00008397 auipc x7,0x8 +80002838: 66e38393 addi x7,x7,1646 # 8000aea2 +8000283c: 00731863 bne x6,x7,8000284c +80002840: 00400413 addi x8,x0,4 +80002844: 00000493 addi x9,x0,0 +80002848: 22c0006f jal x0,80002a74 +8000284c: 00008397 auipc x7,0x8 +80002850: 7c938393 addi x7,x7,1993 # 8000b015 +80002854: 00731863 bne x6,x7,80002864 +80002858: 00500413 addi x8,x0,5 +8000285c: 00000493 addi x9,x0,0 +80002860: 2140006f jal x0,80002a74 +80002864: 00008397 auipc x7,0x8 +80002868: 73538393 addi x7,x7,1845 # 8000af99 +8000286c: 00731863 bne x6,x7,8000287c +80002870: 00600413 addi x8,x0,6 +80002874: 00000493 addi x9,x0,0 +80002878: 1fc0006f jal x0,80002a74 +8000287c: 00008397 auipc x7,0x8 +80002880: 75b38393 addi x7,x7,1883 # 8000afd7 +80002884: 00731863 bne x6,x7,80002894 +80002888: 00700413 addi x8,x0,7 +8000288c: 00000493 addi x9,x0,0 +80002890: 1e40006f jal x0,80002a74 +80002894: 00008397 auipc x7,0x8 +80002898: 35e38393 addi x7,x7,862 # 8000abf2 +8000289c: 00731863 bne x6,x7,800028ac +800028a0: 00100413 addi x8,x0,1 +800028a4: 00100493 addi x9,x0,1 +800028a8: 1cc0006f jal x0,80002a74 +800028ac: 00008397 auipc x7,0x8 +800028b0: 44638393 addi x7,x7,1094 # 8000acf2 +800028b4: 00731863 bne x6,x7,800028c4 +800028b8: 00200413 addi x8,x0,2 +800028bc: 00100493 addi x9,x0,1 +800028c0: 1b40006f jal x0,80002a74 +800028c4: 00008397 auipc x7,0x8 +800028c8: 52738393 addi x7,x7,1319 # 8000adeb +800028cc: 00731863 bne x6,x7,800028dc +800028d0: 00300413 addi x8,x0,3 +800028d4: 00100493 addi x9,x0,1 +800028d8: 19c0006f jal x0,80002a74 +800028dc: 00008397 auipc x7,0x8 +800028e0: 60338393 addi x7,x7,1539 # 8000aedf +800028e4: 00731863 bne x6,x7,800028f4 +800028e8: 00400413 addi x8,x0,4 +800028ec: 00100493 addi x9,x0,1 +800028f0: 1840006f jal x0,80002a74 +800028f4: 00008397 auipc x7,0x8 +800028f8: 75c38393 addi x7,x7,1884 # 8000b050 +800028fc: 00731863 bne x6,x7,8000290c +80002900: 00500413 addi x8,x0,5 +80002904: 00100493 addi x9,x0,1 +80002908: 16c0006f jal x0,80002a74 +8000290c: 00008397 auipc x7,0x8 +80002910: 32638393 addi x7,x7,806 # 8000ac32 +80002914: 00731863 bne x6,x7,80002924 +80002918: 00100413 addi x8,x0,1 +8000291c: 00200493 addi x9,x0,2 +80002920: 1540006f jal x0,80002a74 +80002924: 00008397 auipc x7,0x8 +80002928: 40c38393 addi x7,x7,1036 # 8000ad30 +8000292c: 00731863 bne x6,x7,8000293c +80002930: 00200413 addi x8,x0,2 +80002934: 00200493 addi x9,x0,2 +80002938: 13c0006f jal x0,80002a74 +8000293c: 00008397 auipc x7,0x8 +80002940: 4eb38393 addi x7,x7,1259 # 8000ae27 +80002944: 00731863 bne x6,x7,80002954 +80002948: 00300413 addi x8,x0,3 +8000294c: 00200493 addi x9,x0,2 +80002950: 1240006f jal x0,80002a74 +80002954: 00008397 auipc x7,0x8 +80002958: 5c838393 addi x7,x7,1480 # 8000af1c +8000295c: 00731863 bne x6,x7,8000296c +80002960: 00400413 addi x8,x0,4 +80002964: 00200493 addi x9,x0,2 +80002968: 10c0006f jal x0,80002a74 +8000296c: 00008397 auipc x7,0x8 +80002970: 71f38393 addi x7,x7,1823 # 8000b08b +80002974: 00731863 bne x6,x7,80002984 +80002978: 00500413 addi x8,x0,5 +8000297c: 00200493 addi x9,x0,2 +80002980: 0f40006f jal x0,80002a74 +80002984: 00008397 auipc x7,0x8 +80002988: 2ef38393 addi x7,x7,751 # 8000ac73 +8000298c: 00731863 bne x6,x7,8000299c +80002990: 00100413 addi x8,x0,1 +80002994: 00300493 addi x9,x0,3 +80002998: 0dc0006f jal x0,80002a74 +8000299c: 00008397 auipc x7,0x8 +800029a0: 3d338393 addi x7,x7,979 # 8000ad6f +800029a4: 00731863 bne x6,x7,800029b4 +800029a8: 00200413 addi x8,x0,2 +800029ac: 00300493 addi x9,x0,3 +800029b0: 0c40006f jal x0,80002a74 +800029b4: 00008397 auipc x7,0x8 +800029b8: 4b038393 addi x7,x7,1200 # 8000ae64 +800029bc: 00731863 bne x6,x7,800029cc +800029c0: 00300413 addi x8,x0,3 +800029c4: 00300493 addi x9,x0,3 +800029c8: 0ac0006f jal x0,80002a74 +800029cc: 00008397 auipc x7,0x8 +800029d0: 58e38393 addi x7,x7,1422 # 8000af5a +800029d4: 00731863 bne x6,x7,800029e4 +800029d8: 00400413 addi x8,x0,4 +800029dc: 00300493 addi x9,x0,3 +800029e0: 0940006f jal x0,80002a74 +800029e4: 00008397 auipc x7,0x8 +800029e8: 6e338393 addi x7,x7,1763 # 8000b0c7 +800029ec: 00731863 bne x6,x7,800029fc +800029f0: 00500413 addi x8,x0,5 +800029f4: 00300493 addi x9,x0,3 +800029f8: 07c0006f jal x0,80002a74 +800029fc: 00008397 auipc x7,0x8 +80002a00: 70838393 addi x7,x7,1800 # 8000b104 +80002a04: 00731863 bne x6,x7,80002a14 +80002a08: 00800413 addi x8,x0,8 +80002a0c: 00000493 addi x9,x0,0 +80002a10: 0640006f jal x0,80002a74 +80002a14: 00008397 auipc x7,0x8 +80002a18: 73f38393 addi x7,x7,1855 # 8000b153 +80002a1c: 00731863 bne x6,x7,80002a2c +80002a20: 00800413 addi x8,x0,8 +80002a24: 00000493 addi x9,x0,0 +80002a28: 04c0006f jal x0,80002a74 +80002a2c: 00009397 auipc x7,0x9 +80002a30: 82238393 addi x7,x7,-2014 # 8000b24e +80002a34: 00731863 bne x6,x7,80002a44 +80002a38: 00800413 addi x8,x0,8 +80002a3c: 00100493 addi x9,x0,1 +80002a40: 0340006f jal x0,80002a74 +80002a44: 00009397 auipc x7,0x9 +80002a48: 90638393 addi x7,x7,-1786 # 8000b34a +80002a4c: 00731863 bne x6,x7,80002a5c +80002a50: 00800413 addi x8,x0,8 +80002a54: 00200493 addi x9,x0,2 +80002a58: 01c0006f jal x0,80002a74 +80002a5c: 0340006f jal x0,80002a90 + +80002a60 : +80002a60: 00900413 addi x8,x0,9 +80002a64: 00008817 auipc x16,0x8 +80002a68: 9fc80813 addi x16,x16,-1540 # 8000a460 +80002a6c: 00882023 sw x8,0(x16) +80002a70: 0300006f jal x0,80002aa0 + +80002a74 : +80002a74: 00008817 auipc x16,0x8 +80002a78: 9ec80813 addi x16,x16,-1556 # 8000a460 +80002a7c: 00882023 sw x8,0(x16) +80002a80: 00008817 auipc x16,0x8 +80002a84: 9e480813 addi x16,x16,-1564 # 8000a464 +80002a88: 00982023 sw x9,0(x16) +80002a8c: 0140006f jal x0,80002aa0 + +80002a90 : +80002a90: 00008817 auipc x16,0x8 +80002a94: 9d080813 addi x16,x16,-1584 # 8000a460 +80002a98: 00082023 sw x0,0(x16) +80002a9c: 0040006f jal x0,80002aa0 + +80002aa0 : +80002aa0: 0002a303 lw x6,0(x5) +80002aa4: 10622423 sw x6,264(x4) # 108 +80002aa8: 00035383 lhu x7,0(x6) +80002aac: 0033f413 andi x8,x7,3 +80002ab0: 00300493 addi x9,x0,3 +80002ab4: 00941863 bne x8,x9,80002ac4 +80002ab8: 00235403 lhu x8,2(x6) +80002abc: 01041413 slli x8,x8,0x10 +80002ac0: 0083e3b3 or x7,x7,x8 +80002ac4: 10722023 sw x7,256(x4) # 100 +80002ac8: 0042a303 lw x6,4(x5) +80002acc: 12622023 sw x6,288(x4) # 120 + +80002ad0 : +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00008517 auipc x10,0x8 +80002ae4: ece50513 addi x10,x10,-306 # 8000a9ae +80002ae8: 00000013 addi x0,x0,0 +80002aec: 00000013 addi x0,x0,0 +80002af0: 00000013 addi x0,x0,0 +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00019097 auipc x1,0x19 +80002b04: a64080e7 jalr x1,-1436(x1) # 8001b564 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00008517 auipc x10,0x8 +80002b24: ec750513 addi x10,x10,-313 # 8000a9e7 +80002b28: 00000013 addi x0,x0,0 +80002b2c: 00000013 addi x0,x0,0 +80002b30: 00000013 addi x0,x0,0 +80002b34: 00000013 addi x0,x0,0 +80002b38: 00000013 addi x0,x0,0 +80002b3c: 00000013 addi x0,x0,0 +80002b40: 00019097 auipc x1,0x19 +80002b44: a24080e7 jalr x1,-1500(x1) # 8001b564 + +80002b48 : +80002b48: 00000013 addi x0,x0,0 +80002b4c: 00000013 addi x0,x0,0 +80002b50: 00000013 addi x0,x0,0 +80002b54: 00000013 addi x0,x0,0 +80002b58: 00000013 addi x0,x0,0 +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00008517 auipc x10,0x8 +80002b64: f3e50513 addi x10,x10,-194 # 8000aa9e +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00019097 auipc x1,0x19 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 8001b564 + +80002b88 : +80002b88: 00008517 auipc x10,0x8 +80002b8c: 8c852503 lw x10,-1848(x10) # 8000a450 +80002b90: 00019097 auipc x1,0x19 +80002b94: 9d4080e7 jalr x1,-1580(x1) # 8001b564 + +80002b98 : +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00008517 auipc x10,0x8 +80002ba4: f1050513 addi x10,x10,-240 # 8000aab0 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00019097 auipc x1,0x19 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 8001b564 +80002bc8: 00007517 auipc x10,0x7 +80002bcc: 76852503 lw x10,1896(x10) # 8000a330 +80002bd0: 00300593 addi x11,x0,3 +80002bd4: 52b50c63 beq x10,x11,8000310c +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00008517 auipc x10,0x8 +80002be4: ed250513 addi x10,x10,-302 # 8000aab2 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00019097 auipc x1,0x19 +80002c04: 964080e7 jalr x1,-1692(x1) # 8001b564 +80002c08: 00008517 auipc x10,0x8 +80002c0c: 82852503 lw x10,-2008(x10) # 8000a430 +80002c10: 02000593 addi x11,x0,32 +80002c14: 00357613 andi x12,x10,3 +80002c18: 00300693 addi x13,x0,3 +80002c1c: 00d60463 beq x12,x13,80002c24 +80002c20: 01000593 addi x11,x0,16 +80002c24: 3f4010ef jal x1,80004018 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00008517 auipc x10,0x8 +80002c44: 85850513 addi x10,x10,-1960 # 8000a498 +80002c48: 00000013 addi x0,x0,0 +80002c4c: 00000013 addi x0,x0,0 +80002c50: 00000013 addi x0,x0,0 +80002c54: 00000013 addi x0,x0,0 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00019097 auipc x1,0x19 +80002c64: 904080e7 jalr x1,-1788(x1) # 8001b564 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00008517 auipc x10,0x8 +80002c84: e4650513 addi x10,x10,-442 # 8000aac6 +80002c88: 00000013 addi x0,x0,0 +80002c8c: 00000013 addi x0,x0,0 +80002c90: 00000013 addi x0,x0,0 +80002c94: 00000013 addi x0,x0,0 +80002c98: 00000013 addi x0,x0,0 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00019097 auipc x1,0x19 +80002ca4: 8c4080e7 jalr x1,-1852(x1) # 8001b564 +80002ca8: 00007517 auipc x10,0x7 +80002cac: 79052503 lw x10,1936(x10) # 8000a438 +80002cb0: 02000593 addi x11,x0,32 +80002cb4: 364010ef jal x1,80004018 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00007517 auipc x10,0x7 +80002cc4: 7d850513 addi x10,x10,2008 # 8000a498 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00019097 auipc x1,0x19 +80002ce4: 884080e7 jalr x1,-1916(x1) # 8001b564 +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00008517 auipc x10,0x8 +80002d04: 7fd50513 addi x10,x10,2045 # 8000b4fd +80002d08: 00000013 addi x0,x0,0 +80002d0c: 00000013 addi x0,x0,0 +80002d10: 00000013 addi x0,x0,0 +80002d14: 00000013 addi x0,x0,0 +80002d18: 00000013 addi x0,x0,0 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00019097 auipc x1,0x19 +80002d24: 844080e7 jalr x1,-1980(x1) # 8001b564 +80002d28: 00007517 auipc x10,0x7 +80002d2c: 60852503 lw x10,1544(x10) # 8000a330 +80002d30: 00050663 beq x10,x0,80002d3c +80002d34: 00300593 addi x11,x0,3 +80002d38: 04b51063 bne x10,x11,80002d78 +80002d3c: 07800593 addi x11,x0,120 +80002d40: 00007617 auipc x12,0x7 +80002d44: 75860613 addi x12,x12,1880 # 8000a498 +80002d48: 00000013 addi x0,x0,0 +80002d4c: 00000013 addi x0,x0,0 +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00b60023 sb x11,0(x12) +80002d64: 00160613 addi x12,x12,1 +80002d68: 00007517 auipc x10,0x7 +80002d6c: 6cc52503 lw x10,1740(x10) # 8000a434 +80002d70: 324010ef jal x1,80004094 +80002d74: 1180006f jal x0,80002e8c + +80002d78 : +80002d78: 00100593 addi x11,x0,1 +80002d7c: 04b50863 beq x10,x11,80002dcc +80002d80: 00400593 addi x11,x0,4 +80002d84: 08b50a63 beq x10,x11,80002e18 +80002d88: 00500593 addi x11,x0,5 +80002d8c: 0cb50463 beq x10,x11,80002e54 +80002d90: 00000013 addi x0,x0,0 +80002d94: 00000013 addi x0,x0,0 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00009517 auipc x10,0x9 +80002da4: 87350513 addi x10,x10,-1933 # 8000b613 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00018097 auipc x1,0x18 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 8001b564 +80002dc8: 1000006f jal x0,80002ec8 + +80002dcc : +80002dcc: 06600593 addi x11,x0,102 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00007617 auipc x12,0x7 +80002de4: 6b860613 addi x12,x12,1720 # 8000a498 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00b60023 sb x11,0(x12) +80002e04: 00160613 addi x12,x12,1 +80002e08: 00007517 auipc x10,0x7 +80002e0c: 62c52503 lw x10,1580(x10) # 8000a434 +80002e10: 284010ef jal x1,80004094 +80002e14: 0780006f jal x0,80002e8c + +80002e18 : +80002e18: 07600593 addi x11,x0,118 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00007617 auipc x12,0x7 +80002e24: 67860613 addi x12,x12,1656 # 8000a498 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00b60023 sb x11,0(x12) +80002e44: 00160613 addi x12,x12,1 +80002e48: 00007517 auipc x10,0x7 +80002e4c: 5ec52503 lw x10,1516(x10) # 8000a434 +80002e50: 244010ef jal x1,80004094 + +80002e54 : +80002e54: 00000013 addi x0,x0,0 +80002e58: 00000013 addi x0,x0,0 +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00008517 auipc x10,0x8 +80002e64: 69650513 addi x10,x10,1686 # 8000b4f6 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00018097 auipc x1,0x18 +80002e84: 6e4080e7 jalr x1,1764(x1) # 8001b564 +80002e88: 0400006f jal x0,80002ec8 + +80002e8c : +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00007517 auipc x10,0x7 +80002ea4: 5f850513 addi x10,x10,1528 # 8000a498 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00018097 auipc x1,0x18 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 8001b564 + +80002ec8 : +80002ec8: 00000013 addi x0,x0,0 +80002ecc: 00000013 addi x0,x0,0 +80002ed0: 00000013 addi x0,x0,0 +80002ed4: 00000013 addi x0,x0,0 +80002ed8: 00000013 addi x0,x0,0 +80002edc: 00000013 addi x0,x0,0 +80002ee0: 00008517 auipc x10,0x8 +80002ee4: 62e50513 addi x10,x10,1582 # 8000b50e +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00018097 auipc x1,0x18 +80002f04: 664080e7 jalr x1,1636(x1) # 8001b564 +80002f08: 00007517 auipc x10,0x7 +80002f0c: 42852503 lw x10,1064(x10) # 8000a330 +80002f10: 00100593 addi x11,x0,1 +80002f14: 00b51c63 bne x10,x11,80002f2c +80002f18: 00007517 auipc x10,0x7 +80002f1c: 52852503 lw x10,1320(x10) # 8000a440 +80002f20: 02000593 addi x11,x0,32 +80002f24: 0f4010ef jal x1,80004018 +80002f28: 0140006f jal x0,80002f3c + +80002f2c : +80002f2c: 00007517 auipc x10,0x7 +80002f30: 51452503 lw x10,1300(x10) # 8000a440 +80002f34: 02000593 addi x11,x0,32 +80002f38: 0e0010ef jal x1,80004018 + +80002f3c : +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00007517 auipc x10,0x7 +80002f44: 55850513 addi x10,x10,1368 # 8000a498 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00018097 auipc x1,0x18 +80002f64: 604080e7 jalr x1,1540(x1) # 8001b564 +80002f68: 00007517 auipc x10,0x7 +80002f6c: 4f052503 lw x10,1264(x10) # 8000a458 +80002f70: 08051e63 bne x10,x0,8000300c +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00008517 auipc x10,0x8 +80002f84: 5a550513 addi x10,x10,1445 # 8000b525 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00018097 auipc x1,0x18 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 8001b564 +80002fa8: 00007517 auipc x10,0x7 +80002fac: 38852503 lw x10,904(x10) # 8000a330 +80002fb0: 00100593 addi x11,x0,1 +80002fb4: 00b51c63 bne x10,x11,80002fcc +80002fb8: 00007517 auipc x10,0x7 +80002fbc: 49052503 lw x10,1168(x10) # 8000a448 +80002fc0: 02000593 addi x11,x0,32 +80002fc4: 054010ef jal x1,80004018 +80002fc8: 0140006f jal x0,80002fdc + +80002fcc : +80002fcc: 00007517 auipc x10,0x7 +80002fd0: 47c52503 lw x10,1148(x10) # 8000a448 +80002fd4: 02000593 addi x11,x0,32 +80002fd8: 040010ef jal x1,80004018 + +80002fdc : +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00007517 auipc x10,0x7 +80002fe4: 4b850513 addi x10,x10,1208 # 8000a498 +80002fe8: 00000013 addi x0,x0,0 +80002fec: 00000013 addi x0,x0,0 +80002ff0: 00000013 addi x0,x0,0 +80002ff4: 00000013 addi x0,x0,0 +80002ff8: 00000013 addi x0,x0,0 +80002ffc: 00000013 addi x0,x0,0 +80003000: 00018097 auipc x1,0x18 +80003004: 564080e7 jalr x1,1380(x1) # 8001b564 +80003008: 5bd0006f jal x0,80003dc4 + +8000300c : +8000300c: 00100593 addi x11,x0,1 +80003010: 06b51e63 bne x10,x11,8000308c + +80003014 : +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00008517 auipc x10,0x8 +80003024: 51c50513 addi x10,x10,1308 # 8000b53c +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00018097 auipc x1,0x18 +80003044: 524080e7 jalr x1,1316(x1) # 8001b564 +80003048: 00007517 auipc x10,0x7 +8000304c: 40052503 lw x10,1024(x10) # 8000a448 +80003050: 02000593 addi x11,x0,32 +80003054: 7c5000ef jal x1,80004018 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00007517 auipc x10,0x7 +80003064: 43850513 addi x10,x10,1080 # 8000a498 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00018097 auipc x1,0x18 +80003084: 4e4080e7 jalr x1,1252(x1) # 8001b564 +80003088: 53d0006f jal x0,80003dc4 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00008517 auipc x10,0x8 +800030a4: 4fa50513 addi x10,x10,1274 # 8000b59a +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00018097 auipc x1,0x18 +800030c4: 4a4080e7 jalr x1,1188(x1) # 8001b564 +800030c8: 00007517 auipc x10,0x7 +800030cc: 38052503 lw x10,896(x10) # 8000a448 +800030d0: 02000593 addi x11,x0,32 +800030d4: 745000ef jal x1,80004018 +800030d8: 00000013 addi x0,x0,0 +800030dc: 00000013 addi x0,x0,0 +800030e0: 00007517 auipc x10,0x7 +800030e4: 3b850513 addi x10,x10,952 # 8000a498 +800030e8: 00000013 addi x0,x0,0 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00018097 auipc x1,0x18 +80003104: 464080e7 jalr x1,1124(x1) # 8001b564 +80003108: 4bd0006f jal x0,80003dc4 + +8000310c : +8000310c: 00007417 auipc x8,0x7 +80003110: 35442403 lw x8,852(x8) # 8000a460 +80003114: 00900493 addi x9,x0,9 +80003118: 0a940c63 beq x8,x9,800031d0 +8000311c: 00000013 addi x0,x0,0 +80003120: 00008517 auipc x10,0x8 +80003124: 51f50513 addi x10,x10,1311 # 8000b63f +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00018097 auipc x1,0x18 +80003144: 424080e7 jalr x1,1060(x1) # 8001b564 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 00008517 auipc x10,0x8 +80003164: 50b50513 addi x10,x10,1291 # 8000b66b +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00018097 auipc x1,0x18 +80003184: 3e4080e7 jalr x1,996(x1) # 8001b564 +80003188: 00007817 auipc x16,0x7 +8000318c: 2e080813 addi x16,x16,736 # 8000a468 +80003190: 00082503 lw x10,0(x16) +80003194: 00018097 auipc x1,0x18 +80003198: 3d0080e7 jalr x1,976(x1) # 8001b564 +8000319c: 00000013 addi x0,x0,0 +800031a0: 00008517 auipc x10,0x8 +800031a4: 91050513 addi x10,x10,-1776 # 8000aab0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00018097 auipc x1,0x18 +800031c4: 3a4080e7 jalr x1,932(x1) # 8001b564 +800031c8: 280404e3 beq x8,x0,80003c50 +800031cc: 3400006f jal x0,8000350c + +800031d0 : +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 00008517 auipc x10,0x8 +800031e4: 49b50513 addi x10,x10,1179 # 8000b67b +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00018097 auipc x1,0x18 +80003204: 364080e7 jalr x1,868(x1) # 8001b564 +80003208: 00007517 auipc x10,0x7 +8000320c: 24052503 lw x10,576(x10) # 8000a448 +80003210: 02000593 addi x11,x0,32 +80003214: 605000ef jal x1,80004018 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 +80003220: 00007517 auipc x10,0x7 +80003224: 27850513 addi x10,x10,632 # 8000a498 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00018097 auipc x1,0x18 +80003244: 324080e7 jalr x1,804(x1) # 8001b564 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00008517 auipc x10,0x8 +80003264: 44650513 addi x10,x10,1094 # 8000b6a6 +80003268: 00000013 addi x0,x0,0 +8000326c: 00000013 addi x0,x0,0 +80003270: 00000013 addi x0,x0,0 +80003274: 00000013 addi x0,x0,0 +80003278: 00000013 addi x0,x0,0 +8000327c: 00000013 addi x0,x0,0 +80003280: 00018097 auipc x1,0x18 +80003284: 2e4080e7 jalr x1,740(x1) # 8001b564 +80003288: 00007517 auipc x10,0x7 +8000328c: 1b852503 lw x10,440(x10) # 8000a440 +80003290: 02000593 addi x11,x0,32 +80003294: 585000ef jal x1,80004018 +80003298: 00000013 addi x0,x0,0 +8000329c: 00000013 addi x0,x0,0 +800032a0: 00007517 auipc x10,0x7 +800032a4: 1f850513 addi x10,x10,504 # 8000a498 +800032a8: 00000013 addi x0,x0,0 +800032ac: 00000013 addi x0,x0,0 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00018097 auipc x1,0x18 +800032c4: 2a4080e7 jalr x1,676(x1) # 8001b564 +800032c8: 00007317 auipc x6,0x7 +800032cc: 17832303 lw x6,376(x6) # 8000a440 +800032d0: 00007397 auipc x7,0x7 +800032d4: 1783a383 lw x7,376(x7) # 8000a448 +800032d8: 10736a63 bltu x6,x7,800033ec + +800032dc : +800032dc: 00000013 addi x0,x0,0 +800032e0: 00008517 auipc x10,0x8 +800032e4: 3f550513 addi x10,x10,1013 # 8000b6d5 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00018097 auipc x1,0x18 +80003304: 264080e7 jalr x1,612(x1) # 8001b564 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 00008517 auipc x10,0x8 +80003324: 41d50513 addi x10,x10,1053 # 8000b73d +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00018097 auipc x1,0x18 +80003344: 224080e7 jalr x1,548(x1) # 8001b564 +80003348: 00007317 auipc x6,0x7 +8000334c: 0f832303 lw x6,248(x6) # 8000a440 +80003350: 00007397 auipc x7,0x7 +80003354: 0f83a383 lw x7,248(x7) # 8000a448 +80003358: 40730533 sub x10,x6,x7 +8000335c: 02000593 addi x11,x0,32 +80003360: 4b9000ef jal x1,80004018 +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00007517 auipc x10,0x7 +80003384: 11850513 addi x10,x10,280 # 8000a498 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 00018097 auipc x1,0x18 +800033a4: 1c4080e7 jalr x1,452(x1) # 8001b564 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00008517 auipc x10,0x8 +800033c4: 3a450513 addi x10,x10,932 # 8000b764 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 00018097 auipc x1,0x18 +800033e4: 184080e7 jalr x1,388(x1) # 8001b564 +800033e8: 1dd0006f jal x0,80003dc4 + +800033ec : +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00008517 auipc x10,0x8 +80003404: 30150513 addi x10,x10,769 # 8000b701 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 00018097 auipc x1,0x18 +80003424: 144080e7 jalr x1,324(x1) # 8001b564 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00008517 auipc x10,0x8 +80003444: 2fd50513 addi x10,x10,765 # 8000b73d +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 00018097 auipc x1,0x18 +80003464: 104080e7 jalr x1,260(x1) # 8001b564 +80003468: 00007317 auipc x6,0x7 +8000346c: fe032303 lw x6,-32(x6) # 8000a448 +80003470: 00007397 auipc x7,0x7 +80003474: fd03a383 lw x7,-48(x7) # 8000a440 +80003478: 40730533 sub x10,x6,x7 +8000347c: 02000593 addi x11,x0,32 +80003480: 399000ef jal x1,80004018 +80003484: 00000013 addi x0,x0,0 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 00007517 auipc x10,0x7 +800034a4: ff850513 addi x10,x10,-8 # 8000a498 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00018097 auipc x1,0x18 +800034c4: 0a4080e7 jalr x1,164(x1) # 8001b564 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 +800034e0: 00008517 auipc x10,0x8 +800034e4: 36c50513 addi x10,x10,876 # 8000b84c +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00018097 auipc x1,0x18 +80003504: 064080e7 jalr x1,100(x1) # 8001b564 +80003508: 0bd0006f jal x0,80003dc4 + +8000350c : +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00008517 auipc x10,0x8 +80003524: 41350513 addi x10,x10,1043 # 8000b933 +80003528: 00000013 addi x0,x0,0 +8000352c: 00000013 addi x0,x0,0 +80003530: 00000013 addi x0,x0,0 +80003534: 00000013 addi x0,x0,0 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00018097 auipc x1,0x18 +80003544: 024080e7 jalr x1,36(x1) # 8001b564 +80003548: 00007517 auipc x10,0x7 +8000354c: f1c52503 lw x10,-228(x10) # 8000a464 +80003550: 04050a63 beq x10,x0,800035a4 +80003554: 00100593 addi x11,x0,1 +80003558: 08b50663 beq x10,x11,800035e4 +8000355c: 00200593 addi x11,x0,2 +80003560: 0cb50263 beq x10,x11,80003624 +80003564: 00300593 addi x11,x0,3 +80003568: 0eb50e63 beq x10,x11,80003664 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00008517 auipc x10,0x8 +80003584: 3ef50513 addi x10,x10,1007 # 8000b96f +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 1000006f jal x0,800036a0 + +800035a4 : +800035a4: 00000013 addi x0,x0,0 +800035a8: 00000013 addi x0,x0,0 +800035ac: 00000013 addi x0,x0,0 +800035b0: 00000013 addi x0,x0,0 +800035b4: 00000013 addi x0,x0,0 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00008517 auipc x10,0x8 +800035c4: 38d50513 addi x10,x10,909 # 8000b94d +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 0c00006f jal x0,800036a0 + +800035e4 : +800035e4: 00000013 addi x0,x0,0 +800035e8: 00000013 addi x0,x0,0 +800035ec: 00000013 addi x0,x0,0 +800035f0: 00000013 addi x0,x0,0 +800035f4: 00000013 addi x0,x0,0 +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00008517 auipc x10,0x8 +80003604: 35550513 addi x10,x10,853 # 8000b955 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 0800006f jal x0,800036a0 + +80003624 : +80003624: 00000013 addi x0,x0,0 +80003628: 00000013 addi x0,x0,0 +8000362c: 00000013 addi x0,x0,0 +80003630: 00000013 addi x0,x0,0 +80003634: 00000013 addi x0,x0,0 +80003638: 00000013 addi x0,x0,0 +8000363c: 00000013 addi x0,x0,0 +80003640: 00008517 auipc x10,0x8 +80003644: 31d50513 addi x10,x10,797 # 8000b95d +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 0400006f jal x0,800036a0 + +80003664 : +80003664: 00000013 addi x0,x0,0 +80003668: 00000013 addi x0,x0,0 +8000366c: 00000013 addi x0,x0,0 +80003670: 00000013 addi x0,x0,0 +80003674: 00000013 addi x0,x0,0 +80003678: 00000013 addi x0,x0,0 +8000367c: 00000013 addi x0,x0,0 +80003680: 00008517 auipc x10,0x8 +80003684: 2e650513 addi x10,x10,742 # 8000b966 +80003688: 00000013 addi x0,x0,0 +8000368c: 00000013 addi x0,x0,0 +80003690: 00000013 addi x0,x0,0 +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 + +800036a0 : +800036a0: 00018097 auipc x1,0x18 +800036a4: ec4080e7 jalr x1,-316(x1) # 8001b564 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00008517 auipc x10,0x8 +800036c4: 2b850513 addi x10,x10,696 # 8000b978 +800036c8: 00000013 addi x0,x0,0 +800036cc: 00000013 addi x0,x0,0 +800036d0: 00000013 addi x0,x0,0 +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00018097 auipc x1,0x18 +800036e4: e84080e7 jalr x1,-380(x1) # 8001b564 +800036e8: 00007517 auipc x10,0x7 +800036ec: d7852503 lw x10,-648(x10) # 8000a460 +800036f0: 00100593 addi x11,x0,1 +800036f4: 06b50863 beq x10,x11,80003764 +800036f8: 00200593 addi x11,x0,2 +800036fc: 0ab50463 beq x10,x11,800037a4 +80003700: 00300593 addi x11,x0,3 +80003704: 0eb50063 beq x10,x11,800037e4 +80003708: 00400593 addi x11,x0,4 +8000370c: 10b50c63 beq x10,x11,80003824 +80003710: 00500593 addi x11,x0,5 +80003714: 14b50863 beq x10,x11,80003864 +80003718: 00600593 addi x11,x0,6 +8000371c: 18b50463 beq x10,x11,800038a4 +80003720: 00700593 addi x11,x0,7 +80003724: 1cb50063 beq x10,x11,800038e4 +80003728: 00800593 addi x11,x0,8 +8000372c: 1eb50c63 beq x10,x11,80003924 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00008517 auipc x10,0x8 +80003744: 38f50513 addi x10,x10,911 # 8000bacf +80003748: 00000013 addi x0,x0,0 +8000374c: 00000013 addi x0,x0,0 +80003750: 00000013 addi x0,x0,0 +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 2000006f jal x0,80003960 + +80003764 : +80003764: 00000013 addi x0,x0,0 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00008517 auipc x10,0x8 +80003784: 21250513 addi x10,x10,530 # 8000b992 +80003788: 00000013 addi x0,x0,0 +8000378c: 00000013 addi x0,x0,0 +80003790: 00000013 addi x0,x0,0 +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 1c00006f jal x0,80003960 + +800037a4 : +800037a4: 00000013 addi x0,x0,0 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00008517 auipc x10,0x8 +800037c4: 20350513 addi x10,x10,515 # 8000b9c3 +800037c8: 00000013 addi x0,x0,0 +800037cc: 00000013 addi x0,x0,0 +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 1800006f jal x0,80003960 + +800037e4 : +800037e4: 00000013 addi x0,x0,0 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00008517 auipc x10,0x8 +80003804: 1e350513 addi x10,x10,483 # 8000b9e3 +80003808: 00000013 addi x0,x0,0 +8000380c: 00000013 addi x0,x0,0 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 1400006f jal x0,80003960 + +80003824 : +80003824: 00000013 addi x0,x0,0 +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00008517 auipc x10,0x8 +80003844: 1c150513 addi x10,x10,449 # 8000ba01 +80003848: 00000013 addi x0,x0,0 +8000384c: 00000013 addi x0,x0,0 +80003850: 00000013 addi x0,x0,0 +80003854: 00000013 addi x0,x0,0 +80003858: 00000013 addi x0,x0,0 +8000385c: 00000013 addi x0,x0,0 +80003860: 1000006f jal x0,80003960 + +80003864 : +80003864: 00000013 addi x0,x0,0 +80003868: 00000013 addi x0,x0,0 +8000386c: 00000013 addi x0,x0,0 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00008517 auipc x10,0x8 +80003884: 1a050513 addi x10,x10,416 # 8000ba20 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 0c00006f jal x0,80003960 + +800038a4 : +800038a4: 00000013 addi x0,x0,0 +800038a8: 00000013 addi x0,x0,0 +800038ac: 00000013 addi x0,x0,0 +800038b0: 00000013 addi x0,x0,0 +800038b4: 00000013 addi x0,x0,0 +800038b8: 00000013 addi x0,x0,0 +800038bc: 00000013 addi x0,x0,0 +800038c0: 00008517 auipc x10,0x8 +800038c4: 18850513 addi x10,x10,392 # 8000ba48 +800038c8: 00000013 addi x0,x0,0 +800038cc: 00000013 addi x0,x0,0 +800038d0: 00000013 addi x0,x0,0 +800038d4: 00000013 addi x0,x0,0 +800038d8: 00000013 addi x0,x0,0 +800038dc: 00000013 addi x0,x0,0 +800038e0: 0800006f jal x0,80003960 + +800038e4 : +800038e4: 00000013 addi x0,x0,0 +800038e8: 00000013 addi x0,x0,0 +800038ec: 00000013 addi x0,x0,0 +800038f0: 00000013 addi x0,x0,0 +800038f4: 00000013 addi x0,x0,0 +800038f8: 00000013 addi x0,x0,0 +800038fc: 00000013 addi x0,x0,0 +80003900: 00008517 auipc x10,0x8 +80003904: 17450513 addi x10,x10,372 # 8000ba74 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 0400006f jal x0,80003960 + +80003924 : +80003924: 00000013 addi x0,x0,0 +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008517 auipc x10,0x8 +80003944: 16050513 addi x10,x10,352 # 8000baa0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 + +80003960 : +80003960: 00018097 auipc x1,0x18 +80003964: c04080e7 jalr x1,-1020(x1) # 8001b564 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00008517 auipc x10,0x8 +80003984: 15e50513 addi x10,x10,350 # 8000bade +80003988: 00000013 addi x0,x0,0 +8000398c: 00000013 addi x0,x0,0 +80003990: 00000013 addi x0,x0,0 +80003994: 00000013 addi x0,x0,0 +80003998: 00000013 addi x0,x0,0 +8000399c: 00000013 addi x0,x0,0 +800039a0: 00018097 auipc x1,0x18 +800039a4: bc4080e7 jalr x1,-1084(x1) # 8001b564 +800039a8: 00007517 auipc x10,0x7 +800039ac: aa052503 lw x10,-1376(x10) # 8000a448 +800039b0: 02000593 addi x11,x0,32 +800039b4: 664000ef jal x1,80004018 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00007517 auipc x10,0x7 +800039c4: ad850513 addi x10,x10,-1320 # 8000a498 +800039c8: 00000013 addi x0,x0,0 +800039cc: 00000013 addi x0,x0,0 +800039d0: 00000013 addi x0,x0,0 +800039d4: 00000013 addi x0,x0,0 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00018097 auipc x1,0x18 +800039e4: b84080e7 jalr x1,-1148(x1) # 8001b564 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00008517 auipc x10,0x8 +80003a04: 0f550513 addi x10,x10,245 # 8000baf5 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00018097 auipc x1,0x18 +80003a24: b44080e7 jalr x1,-1212(x1) # 8001b564 +80003a28: 00007517 auipc x10,0x7 +80003a2c: a1852503 lw x10,-1512(x10) # 8000a440 +80003a30: 02000593 addi x11,x0,32 +80003a34: 5e4000ef jal x1,80004018 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00007517 auipc x10,0x7 +80003a44: a5850513 addi x10,x10,-1448 # 8000a498 +80003a48: 00000013 addi x0,x0,0 +80003a4c: 00000013 addi x0,x0,0 +80003a50: 00000013 addi x0,x0,0 +80003a54: 00000013 addi x0,x0,0 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00018097 auipc x1,0x18 +80003a64: b04080e7 jalr x1,-1276(x1) # 8001b564 +80003a68: 00007517 auipc x10,0x7 +80003a6c: 9f852503 lw x10,-1544(x10) # 8000a460 +80003a70: 00200593 addi x11,x0,2 +80003a74: 08b51463 bne x10,x11,80003afc +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00008517 auipc x10,0x8 +80003a84: 08c50513 addi x10,x10,140 # 8000bb0c +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00018097 auipc x1,0x18 +80003aa4: ac4080e7 jalr x1,-1340(x1) # 8001b564 +80003aa8: 00007517 auipc x10,0x7 +80003aac: 9a052503 lw x10,-1632(x10) # 8000a448 +80003ab0: 284000ef jal x1,80003d34 +80003ab4: 00018097 auipc x1,0x18 +80003ab8: ab0080e7 jalr x1,-1360(x1) # 8001b564 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00008517 auipc x10,0x8 +80003ac4: 06350513 addi x10,x10,99 # 8000bb23 +80003ac8: 00000013 addi x0,x0,0 +80003acc: 00000013 addi x0,x0,0 +80003ad0: 00000013 addi x0,x0,0 +80003ad4: 00000013 addi x0,x0,0 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00018097 auipc x1,0x18 +80003ae4: a84080e7 jalr x1,-1404(x1) # 8001b564 +80003ae8: 00007517 auipc x10,0x7 +80003aec: 95852503 lw x10,-1704(x10) # 8000a440 +80003af0: 244000ef jal x1,80003d34 +80003af4: 00018097 auipc x1,0x18 +80003af8: a70080e7 jalr x1,-1424(x1) # 8001b564 + +80003afc : +80003afc: 00000097 auipc x1,0x0 +80003b00: 314080e7 jalr x1,788(x1) # 80003e10 +80003b04: 00007517 auipc x10,0x7 +80003b08: 95c52503 lw x10,-1700(x10) # 8000a460 +80003b0c: 00100593 addi x11,x0,1 +80003b10: 02b51e63 bne x10,x11,80003b4c +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00008517 auipc x10,0x8 +80003b24: 07950513 addi x10,x10,121 # 8000bb99 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00018097 auipc x1,0x18 +80003b44: a24080e7 jalr x1,-1500(x1) # 8001b564 +80003b48: 27c0006f jal x0,80003dc4 +80003b4c: 00200593 addi x11,x0,2 +80003b50: 02b51e63 bne x10,x11,80003b8c +80003b54: 00000013 addi x0,x0,0 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00008517 auipc x10,0x8 +80003b64: 10f50513 addi x10,x10,271 # 8000bc6f +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00018097 auipc x1,0x18 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 8001b564 +80003b88: 23c0006f jal x0,80003dc4 +80003b8c: 00300593 addi x11,x0,3 +80003b90: 02b51e63 bne x10,x11,80003bcc +80003b94: 00000013 addi x0,x0,0 +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00008517 auipc x10,0x8 +80003ba4: 1c250513 addi x10,x10,450 # 8000bd62 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 00018097 auipc x1,0x18 +80003bc4: 9a4080e7 jalr x1,-1628(x1) # 8001b564 +80003bc8: 1fc0006f jal x0,80003dc4 +80003bcc: 00400593 addi x11,x0,4 +80003bd0: 02b51e63 bne x10,x11,80003c0c +80003bd4: 00000013 addi x0,x0,0 +80003bd8: 00000013 addi x0,x0,0 +80003bdc: 00000013 addi x0,x0,0 +80003be0: 00008517 auipc x10,0x8 +80003be4: 27d50513 addi x10,x10,637 # 8000be5d +80003be8: 00000013 addi x0,x0,0 +80003bec: 00000013 addi x0,x0,0 +80003bf0: 00000013 addi x0,x0,0 +80003bf4: 00000013 addi x0,x0,0 +80003bf8: 00000013 addi x0,x0,0 +80003bfc: 00000013 addi x0,x0,0 +80003c00: 00018097 auipc x1,0x18 +80003c04: 964080e7 jalr x1,-1692(x1) # 8001b564 +80003c08: 1bc0006f jal x0,80003dc4 +80003c0c: 00500593 addi x11,x0,5 +80003c10: 02b51e63 bne x10,x11,80003c4c +80003c14: 00000013 addi x0,x0,0 +80003c18: 00000013 addi x0,x0,0 +80003c1c: 00000013 addi x0,x0,0 +80003c20: 00008517 auipc x10,0x8 +80003c24: 32450513 addi x10,x10,804 # 8000bf44 +80003c28: 00000013 addi x0,x0,0 +80003c2c: 00000013 addi x0,x0,0 +80003c30: 00000013 addi x0,x0,0 +80003c34: 00000013 addi x0,x0,0 +80003c38: 00000013 addi x0,x0,0 +80003c3c: 00000013 addi x0,x0,0 +80003c40: 00018097 auipc x1,0x18 +80003c44: 924080e7 jalr x1,-1756(x1) # 8001b564 +80003c48: 17c0006f jal x0,80003dc4 +80003c4c: 1780006f jal x0,80003dc4 + +80003c50 : +80003c50: 00000013 addi x0,x0,0 +80003c54: 00000013 addi x0,x0,0 +80003c58: 00000013 addi x0,x0,0 +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00008517 auipc x10,0x8 +80003c64: ef150513 addi x10,x10,-271 # 8000bb51 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 +80003c80: 00018097 auipc x1,0x18 +80003c84: 8e4080e7 jalr x1,-1820(x1) # 8001b564 +80003c88: 00006617 auipc x12,0x6 +80003c8c: 7f062603 lw x12,2032(x12) # 8000a478 +80003c90: 00000013 addi x0,x0,0 +80003c94: 00000013 addi x0,x0,0 +80003c98: 00000013 addi x0,x0,0 +80003c9c: 00000013 addi x0,x0,0 +80003ca0: 00007517 auipc x10,0x7 +80003ca4: e9a50513 addi x10,x10,-358 # 8000ab3a +80003ca8: 00000013 addi x0,x0,0 +80003cac: 00000013 addi x0,x0,0 +80003cb0: 00000013 addi x0,x0,0 +80003cb4: 00000013 addi x0,x0,0 +80003cb8: 00000013 addi x0,x0,0 +80003cbc: 00000013 addi x0,x0,0 +80003cc0: 00018097 auipc x1,0x18 +80003cc4: 8a4080e7 jalr x1,-1884(x1) # 8001b564 +80003cc8: 00065503 lhu x10,0(x12) +80003ccc: 01000593 addi x11,x0,16 +80003cd0: 00357413 andi x8,x10,3 +80003cd4: 00300493 addi x9,x0,3 +80003cd8: 00941a63 bne x8,x9,80003cec +80003cdc: 00265403 lhu x8,2(x12) +80003ce0: 01041413 slli x8,x8,0x10 +80003ce4: 00856533 or x10,x10,x8 +80003ce8: 02000593 addi x11,x0,32 +80003cec: 32c000ef jal x1,80004018 +80003cf0: 00000013 addi x0,x0,0 +80003cf4: 00000013 addi x0,x0,0 +80003cf8: 00000013 addi x0,x0,0 +80003cfc: 00000013 addi x0,x0,0 +80003d00: 00006517 auipc x10,0x6 +80003d04: 79850513 addi x10,x10,1944 # 8000a498 +80003d08: 00000013 addi x0,x0,0 +80003d0c: 00000013 addi x0,x0,0 +80003d10: 00000013 addi x0,x0,0 +80003d14: 00000013 addi x0,x0,0 +80003d18: 00000013 addi x0,x0,0 +80003d1c: 00000013 addi x0,x0,0 +80003d20: 00018097 auipc x1,0x18 +80003d24: 844080e7 jalr x1,-1980(x1) # 8001b564 +80003d28: 00000097 auipc x1,0x0 +80003d2c: 0e8080e7 jalr x1,232(x1) # 80003e10 +80003d30: 0940006f jal x0,80003dc4 + +80003d34 : +80003d34: 02054263 blt x10,x0,80003d58 + +80003d38 : +80003d38: 01800593 addi x11,x0,24 +80003d3c: 04b55463 bge x10,x11,80003d84 +80003d40: 00006597 auipc x11,0x6 +80003d44: 78058593 addi x11,x11,1920 # 8000a4c0 +80003d48: 00251613 slli x12,x10,0x2 +80003d4c: 00c585b3 add x11,x11,x12 +80003d50: 0005a503 lw x10,0(x11) +80003d54: 00008067 jalr x0,0(x1) + +80003d58 : +80003d58: 00100593 addi x11,x0,1 +80003d5c: 01f59593 slli x11,x11,0x1f +80003d60: 00b54533 xor x10,x10,x11 +80003d64: 01000593 addi x11,x0,16 +80003d68: 00b55e63 bge x10,x11,80003d84 +80003d6c: 00006597 auipc x11,0x6 +80003d70: 7b458593 addi x11,x11,1972 # 8000a520 +80003d74: 00251613 slli x12,x10,0x2 +80003d78: 00c585b3 add x11,x11,x12 +80003d7c: 0005a503 lw x10,0(x11) +80003d80: 00008067 jalr x0,0(x1) + +80003d84 : +80003d84: 00000013 addi x0,x0,0 +80003d88: 00000013 addi x0,x0,0 +80003d8c: 00000013 addi x0,x0,0 +80003d90: 00000013 addi x0,x0,0 +80003d94: 00000013 addi x0,x0,0 +80003d98: 00000013 addi x0,x0,0 +80003d9c: 00000013 addi x0,x0,0 +80003da0: 00007517 auipc x10,0x7 +80003da4: bbe50513 addi x10,x10,-1090 # 8000a95e +80003da8: 00000013 addi x0,x0,0 +80003dac: 00000013 addi x0,x0,0 +80003db0: 00000013 addi x0,x0,0 +80003db4: 00000013 addi x0,x0,0 +80003db8: 00000013 addi x0,x0,0 +80003dbc: 00000013 addi x0,x0,0 +80003dc0: 00008067 jalr x0,0(x1) + +80003dc4 : +80003dc4: 00000013 addi x0,x0,0 +80003dc8: 00000013 addi x0,x0,0 +80003dcc: 00000013 addi x0,x0,0 +80003dd0: 00000013 addi x0,x0,0 +80003dd4: 00000013 addi x0,x0,0 +80003dd8: 00000013 addi x0,x0,0 +80003ddc: 00000013 addi x0,x0,0 +80003de0: 00008517 auipc x10,0x8 +80003de4: 81250513 addi x10,x10,-2030 # 8000b5f2 +80003de8: 00000013 addi x0,x0,0 +80003dec: 00000013 addi x0,x0,0 +80003df0: 00000013 addi x0,x0,0 +80003df4: 00000013 addi x0,x0,0 +80003df8: 00000013 addi x0,x0,0 +80003dfc: 00000013 addi x0,x0,0 +80003e00: 00017097 auipc x1,0x17 +80003e04: 764080e7 jalr x1,1892(x1) # 8001b564 + +80003e08 : +80003e08: 00017097 auipc x1,0x17 +80003e0c: 7bc080e7 jalr x1,1980(x1) # 8001b5c4 + +80003e10 : +80003e10: 00006617 auipc x12,0x6 +80003e14: 66060613 addi x12,x12,1632 # 8000a470 +80003e18: 00162023 sw x1,0(x12) +80003e1c: 00000013 addi x0,x0,0 +80003e20: 00007517 auipc x10,0x7 +80003e24: d3b50513 addi x10,x10,-709 # 8000ab5b +80003e28: 00000013 addi x0,x0,0 +80003e2c: 00000013 addi x0,x0,0 +80003e30: 00000013 addi x0,x0,0 +80003e34: 00000013 addi x0,x0,0 +80003e38: 00000013 addi x0,x0,0 +80003e3c: 00000013 addi x0,x0,0 +80003e40: 00017097 auipc x1,0x17 +80003e44: 724080e7 jalr x1,1828(x1) # 8001b564 +80003e48: 00006517 auipc x10,0x6 +80003e4c: 63052503 lw x10,1584(x10) # 8000a478 +80003e50: 02000593 addi x11,x0,32 +80003e54: 1c4000ef jal x1,80004018 +80003e58: 00000013 addi x0,x0,0 +80003e5c: 00000013 addi x0,x0,0 +80003e60: 00006517 auipc x10,0x6 +80003e64: 63850513 addi x10,x10,1592 # 8000a498 +80003e68: 00000013 addi x0,x0,0 +80003e6c: 00000013 addi x0,x0,0 +80003e70: 00000013 addi x0,x0,0 +80003e74: 00000013 addi x0,x0,0 +80003e78: 00000013 addi x0,x0,0 +80003e7c: 00000013 addi x0,x0,0 +80003e80: 00017097 auipc x1,0x17 +80003e84: 6e4080e7 jalr x1,1764(x1) # 8001b564 +80003e88: 00000013 addi x0,x0,0 +80003e8c: 00000013 addi x0,x0,0 +80003e90: 00000013 addi x0,x0,0 +80003e94: 00000013 addi x0,x0,0 +80003e98: 00000013 addi x0,x0,0 +80003e9c: 00000013 addi x0,x0,0 +80003ea0: 00007517 auipc x10,0x7 +80003ea4: ccb50513 addi x10,x10,-821 # 8000ab6b +80003ea8: 00000013 addi x0,x0,0 +80003eac: 00000013 addi x0,x0,0 +80003eb0: 00000013 addi x0,x0,0 +80003eb4: 00000013 addi x0,x0,0 +80003eb8: 00000013 addi x0,x0,0 +80003ebc: 00000013 addi x0,x0,0 +80003ec0: 00017097 auipc x1,0x17 +80003ec4: 6a4080e7 jalr x1,1700(x1) # 8001b564 +80003ec8: 00006517 auipc x10,0x6 +80003ecc: 5b852503 lw x10,1464(x10) # 8000a480 +80003ed0: 02000593 addi x11,x0,32 +80003ed4: 144000ef jal x1,80004018 +80003ed8: 00000013 addi x0,x0,0 +80003edc: 00000013 addi x0,x0,0 +80003ee0: 00006517 auipc x10,0x6 +80003ee4: 5b850513 addi x10,x10,1464 # 8000a498 +80003ee8: 00000013 addi x0,x0,0 +80003eec: 00000013 addi x0,x0,0 +80003ef0: 00000013 addi x0,x0,0 +80003ef4: 00000013 addi x0,x0,0 +80003ef8: 00000013 addi x0,x0,0 +80003efc: 00000013 addi x0,x0,0 +80003f00: 00017097 auipc x1,0x17 +80003f04: 664080e7 jalr x1,1636(x1) # 8001b564 +80003f08: 00000013 addi x0,x0,0 +80003f0c: 00000013 addi x0,x0,0 +80003f10: 00000013 addi x0,x0,0 +80003f14: 00000013 addi x0,x0,0 +80003f18: 00000013 addi x0,x0,0 +80003f1c: 00000013 addi x0,x0,0 +80003f20: 00007517 auipc x10,0x7 +80003f24: c5b50513 addi x10,x10,-933 # 8000ab7b +80003f28: 00000013 addi x0,x0,0 +80003f2c: 00000013 addi x0,x0,0 +80003f30: 00000013 addi x0,x0,0 +80003f34: 00000013 addi x0,x0,0 +80003f38: 00000013 addi x0,x0,0 +80003f3c: 00000013 addi x0,x0,0 +80003f40: 00017097 auipc x1,0x17 +80003f44: 624080e7 jalr x1,1572(x1) # 8001b564 +80003f48: 00006517 auipc x10,0x6 +80003f4c: 54052503 lw x10,1344(x10) # 8000a488 +80003f50: 02000593 addi x11,x0,32 +80003f54: 0c4000ef jal x1,80004018 +80003f58: 00000013 addi x0,x0,0 +80003f5c: 00000013 addi x0,x0,0 +80003f60: 00006517 auipc x10,0x6 +80003f64: 53850513 addi x10,x10,1336 # 8000a498 +80003f68: 00000013 addi x0,x0,0 +80003f6c: 00000013 addi x0,x0,0 +80003f70: 00000013 addi x0,x0,0 +80003f74: 00000013 addi x0,x0,0 +80003f78: 00000013 addi x0,x0,0 +80003f7c: 00000013 addi x0,x0,0 +80003f80: 00017097 auipc x1,0x17 +80003f84: 5e4080e7 jalr x1,1508(x1) # 8001b564 +80003f88: 00000013 addi x0,x0,0 +80003f8c: 00000013 addi x0,x0,0 +80003f90: 00000013 addi x0,x0,0 +80003f94: 00000013 addi x0,x0,0 +80003f98: 00000013 addi x0,x0,0 +80003f9c: 00000013 addi x0,x0,0 +80003fa0: 00007517 auipc x10,0x7 +80003fa4: beb50513 addi x10,x10,-1045 # 8000ab8b +80003fa8: 00000013 addi x0,x0,0 +80003fac: 00000013 addi x0,x0,0 +80003fb0: 00000013 addi x0,x0,0 +80003fb4: 00000013 addi x0,x0,0 +80003fb8: 00000013 addi x0,x0,0 +80003fbc: 00000013 addi x0,x0,0 +80003fc0: 00017097 auipc x1,0x17 +80003fc4: 5a4080e7 jalr x1,1444(x1) # 8001b564 +80003fc8: 00006517 auipc x10,0x6 +80003fcc: 4c852503 lw x10,1224(x10) # 8000a490 +80003fd0: 02000593 addi x11,x0,32 +80003fd4: 044000ef jal x1,80004018 +80003fd8: 00000013 addi x0,x0,0 +80003fdc: 00000013 addi x0,x0,0 +80003fe0: 00006517 auipc x10,0x6 +80003fe4: 4b850513 addi x10,x10,1208 # 8000a498 +80003fe8: 00000013 addi x0,x0,0 +80003fec: 00000013 addi x0,x0,0 +80003ff0: 00000013 addi x0,x0,0 +80003ff4: 00000013 addi x0,x0,0 +80003ff8: 00000013 addi x0,x0,0 +80003ffc: 00000013 addi x0,x0,0 +80004000: 00017097 auipc x1,0x17 +80004004: 564080e7 jalr x1,1380(x1) # 8001b564 +80004008: 00006617 auipc x12,0x6 +8000400c: 46860613 addi x12,x12,1128 # 8000a470 +80004010: 00062083 lw x1,0(x12) +80004014: 00008067 jalr x0,0(x1) + +80004018 : +80004018: 00000013 addi x0,x0,0 +8000401c: 00000013 addi x0,x0,0 +80004020: 00006617 auipc x12,0x6 +80004024: 47860613 addi x12,x12,1144 # 8000a498 +80004028: 00000013 addi x0,x0,0 +8000402c: 00000013 addi x0,x0,0 +80004030: 00000013 addi x0,x0,0 +80004034: 00000013 addi x0,x0,0 +80004038: 00000013 addi x0,x0,0 +8000403c: 00000013 addi x0,x0,0 +80004040: 03000693 addi x13,x0,48 +80004044: 00d60023 sb x13,0(x12) +80004048: 07800693 addi x13,x0,120 +8000404c: 00d600a3 sb x13,1(x12) +80004050: 00260613 addi x12,x12,2 +80004054: 00058693 addi x13,x11,0 + +80004058 : +80004058: ffc68693 addi x13,x13,-4 +8000405c: 00d55733 srl x14,x10,x13 +80004060: 00f77713 andi x14,x14,15 +80004064: 00a00793 addi x15,x0,10 +80004068: 00f74663 blt x14,x15,80004074 +8000406c: 05770713 addi x14,x14,87 +80004070: 0080006f jal x0,80004078 + +80004074 : +80004074: 03070713 addi x14,x14,48 + +80004078 : +80004078: 00e60023 sb x14,0(x12) +8000407c: 00160613 addi x12,x12,1 +80004080: fc069ce3 bne x13,x0,80004058 +80004084: 00a00693 addi x13,x0,10 +80004088: 00d60023 sb x13,0(x12) +8000408c: 000600a3 sb x0,1(x12) +80004090: 00008067 jalr x0,0(x1) + +80004094 : +80004094: 00a00693 addi x13,x0,10 +80004098: 02d54663 blt x10,x13,800040c4 +8000409c: ff650513 addi x10,x10,-10 +800040a0: 03100713 addi x14,x0,49 +800040a4: 00d54c63 blt x10,x13,800040bc +800040a8: ff650513 addi x10,x10,-10 +800040ac: 03200713 addi x14,x0,50 +800040b0: 00d54663 blt x10,x13,800040bc +800040b4: ff650513 addi x10,x10,-10 +800040b8: 03300713 addi x14,x0,51 +800040bc: 00e60023 sb x14,0(x12) +800040c0: 00160613 addi x12,x12,1 +800040c4: 03050513 addi x10,x10,48 +800040c8: 00a60023 sb x10,0(x12) +800040cc: 00a00693 addi x13,x0,10 +800040d0: 00d600a3 sb x13,1(x12) +800040d4: 00060123 sb x0,2(x12) +800040d8: 00008067 jalr x0,0(x1) +800040dc: 00000013 addi x0,x0,0 +800040e0: 00000013 addi x0,x0,0 +800040e4: 00000013 addi x0,x0,0 +800040e8: 00000013 addi x0,x0,0 +800040ec: 00000013 addi x0,x0,0 +800040f0: 00000013 addi x0,x0,0 +800040f4: 00000013 addi x0,x0,0 +800040f8: 00000013 addi x0,x0,0 +800040fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8001b000 : +8001b000: 10010737 lui x14,0x10010 +8001b004: 00072023 sw x0,0(x14) # 10010000 +8001b008: fffe7397 auipc x7,0xfffe7 +8001b00c: 1f838393 addi x7,x7,504 # 80002200 +8001b010: 00038067 jalr x0,0(x7) + +8001b014 : +8001b014: fff00713 addi x14,x0,-1 +8001b018: 100143b7 lui x7,0x10014 +8001b01c: 00e3a023 sw x14,0(x7) # 10014000 +8001b020: 00e3a223 sw x14,4(x7) +8001b024: fffe7397 auipc x7,0xfffe7 +8001b028: 1dc38393 addi x7,x7,476 # 80002200 +8001b02c: 00038067 jalr x0,0(x7) + +8001b030 : +8001b030: 10000737 lui x14,0x10000 +8001b034: 01070713 addi x14,x14,16 # 10000010 +8001b038: 00070023 sb x0,0(x14) +8001b03c: fffe7397 auipc x7,0xfffe7 +8001b040: 1c438393 addi x7,x7,452 # 80002200 +8001b044: 00038067 jalr x0,0(x7) + +8001b048 : +8001b048: 00200393 addi x7,x0,2 +8001b04c: 3443b073 csrrc x0,mip,x7 +8001b050: fffe7397 auipc x7,0xfffe7 +8001b054: 1b038393 addi x7,x7,432 # 80002200 +8001b058: 00038067 jalr x0,0(x7) + +8001b05c : +8001b05c: fffe7397 auipc x7,0xfffe7 +8001b060: 1a438393 addi x7,x7,420 # 80002200 +8001b064: 00038067 jalr x0,0(x7) + +8001b068 : +8001b068: 20000413 addi x8,x0,512 +8001b06c: 34443073 csrrc x0,mip,x8 +8001b070: 34402473 csrrs x8,mip,x0 +8001b074: 00001337 lui x6,0x1 +8001b078: 80030313 addi x6,x6,-2048 # 800 +8001b07c: 00647433 and x8,x8,x6 +8001b080: 00830863 beq x6,x8,8001b090 +8001b084: 10000737 lui x14,0x10000 +8001b088: 01870713 addi x14,x14,24 # 10000018 +8001b08c: 00070023 sb x0,0(x14) +8001b090: fffe7397 auipc x7,0xfffe7 +8001b094: 17038393 addi x7,x7,368 # 80002200 +8001b098: 00038067 jalr x0,0(x7) + +8001b09c : +8001b09c: fffe6317 auipc x6,0xfffe6 +8001b0a0: 3c030313 addi x6,x6,960 # 8000145c +8001b0a4: 00030067 jalr x0,0(x6) +8001b0a8: fffe7397 auipc x7,0xfffe7 +8001b0ac: 15838393 addi x7,x7,344 # 80002200 +8001b0b0: 00038067 jalr x0,0(x7) + +8001b0b4 : +8001b0b4: fffe6317 auipc x6,0xfffe6 +8001b0b8: 3a830313 addi x6,x6,936 # 8000145c +8001b0bc: 00030067 jalr x0,0(x6) +8001b0c0: fffe7397 auipc x7,0xfffe7 +8001b0c4: 14038393 addi x7,x7,320 # 80002200 +8001b0c8: 00038067 jalr x0,0(x7) + +8001b0cc : +8001b0cc: fffe6317 auipc x6,0xfffe6 +8001b0d0: 39030313 addi x6,x6,912 # 8000145c +8001b0d4: 00030067 jalr x0,0(x6) +8001b0d8: fffe7397 auipc x7,0xfffe7 +8001b0dc: 12838393 addi x7,x7,296 # 80002200 +8001b0e0: 00038067 jalr x0,0(x7) + +8001b0e4 : +8001b0e4: 30401073 csrrw x0,mie,x0 +8001b0e8: 34401073 csrrw x0,mip,x0 +8001b0ec: 34101073 csrrw x0,mepc,x0 +8001b0f0: 34301073 csrrw x0,mtval,x0 +8001b0f4: 34201073 csrrw x0,mcause,x0 +8001b0f8: 00000013 addi x0,x0,0 +8001b0fc: 00000013 addi x0,x0,0 +8001b100: fffed317 auipc x6,0xfffed +8001b104: 01030313 addi x6,x6,16 # 80008110 +8001b108: 00000013 addi x0,x0,0 +8001b10c: 00000013 addi x0,x0,0 +8001b110: 00000013 addi x0,x0,0 +8001b114: 00000013 addi x0,x0,0 +8001b118: 00000013 addi x0,x0,0 +8001b11c: 00000013 addi x0,x0,0 + +8001b120 : +8001b120: 34031473 csrrw x8,mscratch,x6 +8001b124: 24832823 sw x8,592(x6) + +8001b128 : +8001b128: fff00393 addi x7,x0,-1 +8001b12c: 100144b7 lui x9,0x10014 +8001b130: 0074a023 sw x7,0(x9) # 10014000 +8001b134: 0074a223 sw x7,4(x9) +8001b138: 00000013 addi x0,x0,0 + +8001b13c : +8001b13c: 00000393 addi x7,x0,0 +8001b140: 22732c23 sw x7,568(x6) + +8001b144 : +8001b144: 30502473 csrrs x8,mtvec,x0 +8001b148: 24832423 sw x8,584(x6) +8001b14c: 00347393 andi x7,x8,3 +8001b150: ffc3f393 andi x7,x7,-4 +8001b154: 23032483 lw x9,560(x6) +8001b158: e2848493 addi x9,x9,-472 +8001b15c: 0074e3b3 or x7,x9,x7 +8001b160: 24732023 sw x7,576(x6) +8001b164: 30539073 csrrw x0,mtvec,x7 +8001b168: 30502773 csrrs x14,mtvec,x0 +8001b16c: 0e770c63 beq x14,x7,8001b264 +8001b170: 30541073 csrrw x0,mtvec,x8 +8001b174: 0a040863 beq x8,x0,8001b224 +8001b178: 24832023 sw x8,576(x6) + +8001b17c : +8001b17c: ffc47393 andi x7,x8,-4 +8001b180: 1d838413 addi x8,x7,472 +8001b184: 00030113 addi x2,x6,0 +8001b188: 00000013 addi x0,x0,0 +8001b18c: 00000013 addi x0,x0,0 +8001b190: 00000013 addi x0,x0,0 +8001b194: 00000013 addi x0,x0,0 +8001b198: 00000013 addi x0,x0,0 +8001b19c: 00000013 addi x0,x0,0 +8001b1a0: 00000717 auipc x14,0x0 +8001b1a4: 04c70713 addi x14,x14,76 # 8001b1ec +8001b1a8: 00000013 addi x0,x0,0 +8001b1ac: 00000013 addi x0,x0,0 +8001b1b0: 00000013 addi x0,x0,0 +8001b1b4: 00000013 addi x0,x0,0 +8001b1b8: 00000013 addi x0,x0,0 +8001b1bc: 00000013 addi x0,x0,0 +8001b1c0: 00000797 auipc x15,0x0 +8001b1c4: 0a478793 addi x15,x15,164 # 8001b264 +8001b1c8: 00000013 addi x0,x0,0 +8001b1cc: 00000013 addi x0,x0,0 +8001b1d0: 00000013 addi x0,x0,0 +8001b1d4: 00000013 addi x0,x0,0 +8001b1d8: 00000013 addi x0,x0,0 +8001b1dc: 00000013 addi x0,x0,0 +8001b1e0: 00f3f663 bgeu x7,x15,8001b1ec +8001b1e4: 00877463 bgeu x14,x8,8001b1ec +8001b1e8: 03c0006f jal x0,8001b224 + +8001b1ec : +8001b1ec: 0003a783 lw x15,0(x7) +8001b1f0: 00f32023 sw x15,0(x6) +8001b1f4: 0004a703 lw x14,0(x9) +8001b1f8: 00e3a023 sw x14,0(x7) +8001b1fc: 0003a783 lw x15,0(x7) +8001b200: 00e79a63 bne x15,x14,8001b214 +8001b204: 00438393 addi x7,x7,4 +8001b208: 00430313 addi x6,x6,4 +8001b20c: 00448493 addi x9,x9,4 +8001b210: fc741ee3 bne x8,x7,8001b1ec + +8001b214 : +8001b214: 0000100f fence.i +8001b218: 34002373 csrrs x6,mscratch,x0 +8001b21c: 22932823 sw x9,560(x6) +8001b220: 04740263 beq x8,x7,8001b264 + +8001b224 : +8001b224: 00038413 addi x8,x7,0 +8001b228: 00000013 addi x0,x0,0 +8001b22c: 00000013 addi x0,x0,0 +8001b230: 00000013 addi x0,x0,0 +8001b234: 00000013 addi x0,x0,0 +8001b238: 00000013 addi x0,x0,0 +8001b23c: 00000013 addi x0,x0,0 +8001b240: fffe6797 auipc x15,0xfffe6 +8001b244: 22c78793 addi x15,x15,556 # 8000146c +8001b248: 00000013 addi x0,x0,0 +8001b24c: 00000013 addi x0,x0,0 +8001b250: 00000013 addi x0,x0,0 +8001b254: 00000013 addi x0,x0,0 +8001b258: 00000013 addi x0,x0,0 +8001b25c: 00000013 addi x0,x0,0 +8001b260: 00078067 jalr x0,0(x15) + +8001b264 : +8001b264: 00000013 addi x0,x0,0 + +8001b268 : +8001b268: 000022b7 lui x5,0x2 +8001b26c: 80028293 addi x5,x5,-2048 # 1800 +8001b270: 30029073 csrrw x0,mstatus,x5 +8001b274: 31001073 csrrw x0,0x310,x0 +8001b278: 32001073 csrrw x0,mcountinhibit,x0 +8001b27c: 32301073 csrrw x0,mhpmevent3,x0 +8001b280: 32401073 csrrw x0,mhpmevent4,x0 +8001b284: 32501073 csrrw x0,mhpmevent5,x0 +8001b288: 32601073 csrrw x0,mhpmevent6,x0 +8001b28c: 32701073 csrrw x0,mhpmevent7,x0 +8001b290: 32801073 csrrw x0,mhpmevent8,x0 +8001b294: 32901073 csrrw x0,mhpmevent9,x0 +8001b298: 32a01073 csrrw x0,mhpmevent10,x0 +8001b29c: 32b01073 csrrw x0,mhpmevent11,x0 +8001b2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8001b2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8001b2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8001b2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8001b2b0: 33001073 csrrw x0,mhpmevent16,x0 +8001b2b4: 33101073 csrrw x0,mhpmevent17,x0 +8001b2b8: 33201073 csrrw x0,mhpmevent18,x0 +8001b2bc: 33301073 csrrw x0,mhpmevent19,x0 +8001b2c0: 33401073 csrrw x0,mhpmevent20,x0 +8001b2c4: 33501073 csrrw x0,mhpmevent21,x0 +8001b2c8: 33601073 csrrw x0,mhpmevent22,x0 +8001b2cc: 33701073 csrrw x0,mhpmevent23,x0 +8001b2d0: 33801073 csrrw x0,mhpmevent24,x0 +8001b2d4: 33901073 csrrw x0,mhpmevent25,x0 +8001b2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8001b2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8001b2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8001b2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8001b2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8001b2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8001b2f0: 00000013 addi x0,x0,0 +8001b2f4: 00000013 addi x0,x0,0 +8001b2f8: 00000013 addi x0,x0,0 +8001b2fc: 00000013 addi x0,x0,0 +8001b300: fffed317 auipc x6,0xfffed +8001b304: e0830313 addi x6,x6,-504 # 80008108 +8001b308: 00000013 addi x0,x0,0 +8001b30c: 00000013 addi x0,x0,0 +8001b310: 00000013 addi x0,x0,0 +8001b314: 00000013 addi x0,x0,0 +8001b318: 00000013 addi x0,x0,0 +8001b31c: 00000013 addi x0,x0,0 +8001b320: 00032023 sw x0,0(x6) + +8001b324 : +8001b324: feedc0b7 lui x1,0xfeedc +8001b328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eebfead> +8001b32c: 01909793 slli x15,x1,0x19 +8001b330: 0070d113 srli x2,x1,0x7 +8001b334: 00f16133 or x2,x2,x15 +8001b338: 01911793 slli x15,x2,0x19 +8001b33c: 00715193 srli x3,x2,0x7 +8001b340: 00f1e1b3 or x3,x3,x15 +8001b344: 01919793 slli x15,x3,0x19 +8001b348: 0071d213 srli x4,x3,0x7 +8001b34c: 00f26233 or x4,x4,x15 +8001b350: 01921793 slli x15,x4,0x19 +8001b354: 00725293 srli x5,x4,0x7 +8001b358: 00f2e2b3 or x5,x5,x15 +8001b35c: 01929793 slli x15,x5,0x19 +8001b360: 0072d313 srli x6,x5,0x7 +8001b364: 00f36333 or x6,x6,x15 +8001b368: 01931793 slli x15,x6,0x19 +8001b36c: 00735393 srli x7,x6,0x7 +8001b370: 00f3e3b3 or x7,x7,x15 +8001b374: 01939793 slli x15,x7,0x19 +8001b378: 0073d413 srli x8,x7,0x7 +8001b37c: 00f46433 or x8,x8,x15 +8001b380: 01941793 slli x15,x8,0x19 +8001b384: 00745493 srli x9,x8,0x7 +8001b388: 00f4e4b3 or x9,x9,x15 +8001b38c: 01949793 slli x15,x9,0x19 +8001b390: 0074d513 srli x10,x9,0x7 +8001b394: 00f56533 or x10,x10,x15 +8001b398: 01951793 slli x15,x10,0x19 +8001b39c: 00755593 srli x11,x10,0x7 +8001b3a0: 00f5e5b3 or x11,x11,x15 +8001b3a4: 01959793 slli x15,x11,0x19 +8001b3a8: 0075d613 srli x12,x11,0x7 +8001b3ac: 00f66633 or x12,x12,x15 +8001b3b0: 01961793 slli x15,x12,0x19 +8001b3b4: 00765693 srli x13,x12,0x7 +8001b3b8: 00f6e6b3 or x13,x13,x15 +8001b3bc: 01969793 slli x15,x13,0x19 +8001b3c0: 0076d713 srli x14,x13,0x7 +8001b3c4: 00f76733 or x14,x14,x15 +8001b3c8: fab807b7 lui x15,0xfab80 +8001b3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab63bb6> +8001b3d0: 7d5c0837 lui x16,0x7d5c0 +8001b3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8001b3d8: 01981793 slli x15,x16,0x19 +8001b3dc: 00785893 srli x17,x16,0x7 +8001b3e0: 00f8e8b3 or x17,x17,x15 +8001b3e4: 01989793 slli x15,x17,0x19 +8001b3e8: 0078d913 srli x18,x17,0x7 +8001b3ec: 00f96933 or x18,x18,x15 +8001b3f0: 01991793 slli x15,x18,0x19 +8001b3f4: 00795993 srli x19,x18,0x7 +8001b3f8: 00f9e9b3 or x19,x19,x15 +8001b3fc: 01999793 slli x15,x19,0x19 +8001b400: 0079da13 srli x20,x19,0x7 +8001b404: 00fa6a33 or x20,x20,x15 +8001b408: 019a1793 slli x15,x20,0x19 +8001b40c: 007a5a93 srli x21,x20,0x7 +8001b410: 00faeab3 or x21,x21,x15 +8001b414: 019a9793 slli x15,x21,0x19 +8001b418: 007adb13 srli x22,x21,0x7 +8001b41c: 00fb6b33 or x22,x22,x15 +8001b420: 019b1793 slli x15,x22,0x19 +8001b424: 007b5b93 srli x23,x22,0x7 +8001b428: 00fbebb3 or x23,x23,x15 +8001b42c: 019b9793 slli x15,x23,0x19 +8001b430: 007bdc13 srli x24,x23,0x7 +8001b434: 00fc6c33 or x24,x24,x15 +8001b438: 019c1793 slli x15,x24,0x19 +8001b43c: 007c5c93 srli x25,x24,0x7 +8001b440: 00fcecb3 or x25,x25,x15 +8001b444: 019c9793 slli x15,x25,0x19 +8001b448: 007cdd13 srli x26,x25,0x7 +8001b44c: 00fd6d33 or x26,x26,x15 +8001b450: 019d1793 slli x15,x26,0x19 +8001b454: 007d5d93 srli x27,x26,0x7 +8001b458: 00fdedb3 or x27,x27,x15 +8001b45c: 019d9793 slli x15,x27,0x19 +8001b460: 007dde13 srli x28,x27,0x7 +8001b464: 00fe6e33 or x28,x28,x15 +8001b468: 019e1793 slli x15,x28,0x19 +8001b46c: 007e5e93 srli x29,x28,0x7 +8001b470: 00feeeb3 or x29,x29,x15 +8001b474: 019e9793 slli x15,x29,0x19 +8001b478: 007edf13 srli x30,x29,0x7 +8001b47c: 00ff6f33 or x30,x30,x15 +8001b480: 019f1793 slli x15,x30,0x19 +8001b484: 007f5f93 srli x31,x30,0x7 +8001b488: 00ffefb3 or x31,x31,x15 +8001b48c: 00000013 addi x0,x0,0 +8001b490: 00000013 addi x0,x0,0 +8001b494: 00000013 addi x0,x0,0 +8001b498: 00000013 addi x0,x0,0 +8001b49c: 00000013 addi x0,x0,0 +8001b4a0: ffff1117 auipc x2,0xffff1 +8001b4a4: bd010113 addi x2,x2,-1072 # 8000c070 +8001b4a8: 00000013 addi x0,x0,0 +8001b4ac: 00000013 addi x0,x0,0 +8001b4b0: 00000013 addi x0,x0,0 +8001b4b4: 00000013 addi x0,x0,0 +8001b4b8: 00000013 addi x0,x0,0 +8001b4bc: 00000013 addi x0,x0,0 + +8001b4c0 : +8001b4c0: 6f5ca337 lui x6,0x6f5ca +8001b4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8001b4c8: 00000013 addi x0,x0,0 +8001b4cc: 00000013 addi x0,x0,0 +8001b4d0: 00000013 addi x0,x0,0 +8001b4d4: 00000013 addi x0,x0,0 +8001b4d8: 00000013 addi x0,x0,0 +8001b4dc: 00000013 addi x0,x0,0 +8001b4e0: fffe7197 auipc x3,0xfffe7 +8001b4e4: 02018193 addi x3,x3,32 # 80002500 +8001b4e8: 00000013 addi x0,x0,0 +8001b4ec: 00000013 addi x0,x0,0 +8001b4f0: 00000013 addi x0,x0,0 +8001b4f4: 00000013 addi x0,x0,0 +8001b4f8: 00000013 addi x0,x0,0 +8001b4fc: 00000013 addi x0,x0,0 +8001b500: 00012203 lw x4,0(x2) +8001b504: 00620863 beq x4,x6,8001b514 +8001b508: 000182e7 jalr x5,0(x3) +8001b50c: 8001b4c0 .word 0x8001b4c0 +8001b510: 8000b61b .word 0x8000b61b +8001b514: 00410113 addi x2,x2,4 +8001b518: 00000013 addi x0,x0,0 +8001b51c: 00000013 addi x0,x0,0 +8001b520: fffed197 auipc x3,0xfffed +8001b524: e9018193 addi x3,x3,-368 # 800083b0 +8001b528: 00000013 addi x0,x0,0 +8001b52c: 00000013 addi x0,x0,0 +8001b530: 00000013 addi x0,x0,0 +8001b534: 00000013 addi x0,x0,0 +8001b538: 00000013 addi x0,x0,0 +8001b53c: 00000013 addi x0,x0,0 +8001b540: fffe5317 auipc x6,0xfffe5 +8001b544: b0030313 addi x6,x6,-1280 # 80000040 +8001b548: 00000013 addi x0,x0,0 +8001b54c: 00000013 addi x0,x0,0 +8001b550: 00000013 addi x0,x0,0 +8001b554: 00000013 addi x0,x0,0 +8001b558: 00000013 addi x0,x0,0 +8001b55c: 00000013 addi x0,x0,0 +8001b560: 00030067 jalr x0,0(x6) + +8001b564 : +8001b564: 00054303 lbu x6,0(x10) +8001b568: 00030a63 beq x6,x0,8001b57c +8001b56c: 100003b7 lui x7,0x10000 +8001b570: 00638023 sb x6,0(x7) # 10000000 +8001b574: 00150513 addi x10,x10,1 +8001b578: fedff06f jal x0,8001b564 +8001b57c: 00008067 jalr x0,0(x1) + +8001b580 : +8001b580: ff010113 addi x2,x2,-16 +8001b584: 00112023 sw x1,0(x2) +8001b588: 00812223 sw x8,4(x2) +8001b58c: 00000097 auipc x1,0x0 +8001b590: fd8080e7 jalr x1,-40(x1) # 8001b564 +8001b594: 00412403 lw x8,4(x2) +8001b598: 00012083 lw x1,0(x2) +8001b59c: 01010113 addi x2,x2,16 +8001b5a0: 00008067 jalr x0,0(x1) + +8001b5a4 : +8001b5a4: 00100093 addi x1,x0,1 +8001b5a8: 00000297 auipc x5,0x0 +8001b5ac: 85828293 addi x5,x5,-1960 # 8001ae00 + +8001b5b0 : +8001b5b0: 0012a023 sw x1,0(x5) +8001b5b4: 0002a223 sw x0,4(x5) + +8001b5b8 : +8001b5b8: 00000013 addi x0,x0,0 +8001b5bc: ffdff06f jal x0,8001b5b8 +8001b5c0: 0000006f jal x0,8001b5c0 + +8001b5c4 : +8001b5c4: 00300093 addi x1,x0,3 +8001b5c8: 00000297 auipc x5,0x0 +8001b5cc: 83828293 addi x5,x5,-1992 # 8001ae00 + +8001b5d0 : +8001b5d0: 0012a023 sw x1,0(x5) +8001b5d4: 0002a223 sw x0,4(x5) + +8001b5d8 : +8001b5d8: 00000013 addi x0,x0,0 +8001b5dc: ffdff06f jal x0,8001b5d8 +8001b5e0: 0000006f jal x0,8001b5e0 + +8001b5e4 : +8001b5e4: 00100513 addi x10,x0,1 +8001b5e8: 100105b7 lui x11,0x10010 +8001b5ec: 00a5a023 sw x10,0(x11) # 10010000 +8001b5f0: 00008067 jalr x0,0(x1) + +8001b5f4 : +8001b5f4: 100105b7 lui x11,0x10010 +8001b5f8: 0005a023 sw x0,0(x11) # 10010000 +8001b5fc: 00008067 jalr x0,0(x1) + +8001b600 : +8001b600: 00100513 addi x10,x0,1 +8001b604: 100005b7 lui x11,0x10000 +8001b608: 01058593 addi x11,x11,16 # 10000010 +8001b60c: 00a58023 sb x10,0(x11) +8001b610: 00008067 jalr x0,0(x1) + +8001b614 : +8001b614: 100005b7 lui x11,0x10000 +8001b618: 01058593 addi x11,x11,16 # 10000010 +8001b61c: 00058023 sb x0,0(x11) +8001b620: 00008067 jalr x0,0(x1) +8001b624: 00000013 addi x0,x0,0 +8001b628: 00000013 addi x0,x0,0 +8001b62c: 00000013 addi x0,x0,0 +8001b630: 00000013 addi x0,x0,0 +8001b634: 00000013 addi x0,x0,0 +8001b638: 00000013 addi x0,x0,0 +8001b63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-unzip-00.elf.objdump b/riscv-tests/rv32-Zbkb-unzip-00.elf.objdump new file mode 100644 index 0000000..9072ec2 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-unzip-00.elf.objdump @@ -0,0 +1,6274 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-unzip-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-unzip-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000125b0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016600 80016600 00017600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 000008a0 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00018f1b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f96 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fb9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fd0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00018ff8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019081 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016600 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccOY37Oa.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b1 +80004592 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b2 +800045c4 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b3 +800045f6 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b4 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004628 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b5 +8000465a l .data 00000000 Zbkb_unzip_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b6 +8000468c l .data 00000000 Zbkb_unzip_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b7 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +800046be l .data 00000000 Zbkb_unzip_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b8 +800046f0 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b8_str +800001a4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b9 +80004722 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b9_str +800001c8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b10 +80004755 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b10_str +800001ec l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b11 +80004789 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b11_str +80000210 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b12 +800047bd l .data 00000000 Zbkb_unzip_cg_cp_rs1_b12_str +8000023c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b13 +800047f1 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b13_str +80000260 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b14 +80004825 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b14_str +80000288 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b15 +80004859 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b15_str +800002ac l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b16 +8000488d l .data 00000000 Zbkb_unzip_cg_cp_rs1_b16_str +800002d0 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b17 +800048c1 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b17_str +800002f4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b18 +800048f5 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b18_str +80000318 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b19 +80004929 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b19_str +8000033c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b20 +8000495d l .data 00000000 Zbkb_unzip_cg_cp_rs1_b20_str +80000364 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b21 +80004991 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b21_str +8000038c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b22 +800049c5 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b22_str +800003b0 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b23 +800049f9 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b23_str +800003d4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b24 +80004a2d l .data 00000000 Zbkb_unzip_cg_cp_rs1_b24_str +800003fc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b25 +80004a61 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b25_str +80000420 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b26 +80004a95 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b26_str +80000444 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b27 +80004ac9 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b27_str +8000046c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b28 +80004afd l .data 00000000 Zbkb_unzip_cg_cp_rs1_b28_str +80000490 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b29 +80004b31 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b29_str +800004b4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b30 +80004b65 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b30_str +800004d8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_b31 +80004b99 l .data 00000000 Zbkb_unzip_cg_cp_rs1_b31_str +800004fc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b0 +80004bcd l .data 00000000 Zbkb_unzip_cg_cp_rd_b0_str +80000520 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b1 +80004bff l .data 00000000 Zbkb_unzip_cg_cp_rd_b1_str +80000544 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b2 +80004c31 l .data 00000000 Zbkb_unzip_cg_cp_rd_b2_str +80000568 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b3 +80004c63 l .data 00000000 Zbkb_unzip_cg_cp_rd_b3_str +8000058c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b4 +80004c95 l .data 00000000 Zbkb_unzip_cg_cp_rd_b4_str +800005b0 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b5 +80004cc7 l .data 00000000 Zbkb_unzip_cg_cp_rd_b5_str +800005d4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b6 +80004cf9 l .data 00000000 Zbkb_unzip_cg_cp_rd_b6_str +80000600 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b7 +80004d2b l .data 00000000 Zbkb_unzip_cg_cp_rd_b7_str +80000624 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b8 +80004d5d l .data 00000000 Zbkb_unzip_cg_cp_rd_b8_str +80000648 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b9 +80004d8f l .data 00000000 Zbkb_unzip_cg_cp_rd_b9_str +8000066c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b10 +80004dc1 l .data 00000000 Zbkb_unzip_cg_cp_rd_b10_str +80000690 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b11 +80004df4 l .data 00000000 Zbkb_unzip_cg_cp_rd_b11_str +800006b4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b12 +80004e27 l .data 00000000 Zbkb_unzip_cg_cp_rd_b12_str +800006d8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b13 +80004e5a l .data 00000000 Zbkb_unzip_cg_cp_rd_b13_str +800006fc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b14 +80004e8d l .data 00000000 Zbkb_unzip_cg_cp_rd_b14_str +80000720 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b15 +80004ec0 l .data 00000000 Zbkb_unzip_cg_cp_rd_b15_str +80000744 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b16 +80004ef3 l .data 00000000 Zbkb_unzip_cg_cp_rd_b16_str +80000768 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b17 +80004f26 l .data 00000000 Zbkb_unzip_cg_cp_rd_b17_str +8000078c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b18 +80004f59 l .data 00000000 Zbkb_unzip_cg_cp_rd_b18_str +800007b4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b19 +80004f8c l .data 00000000 Zbkb_unzip_cg_cp_rd_b19_str +800007d8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b20 +80004fbf l .data 00000000 Zbkb_unzip_cg_cp_rd_b20_str +800007fc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b21 +80004ff2 l .data 00000000 Zbkb_unzip_cg_cp_rd_b21_str +80000820 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b22 +80005025 l .data 00000000 Zbkb_unzip_cg_cp_rd_b22_str +80000848 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b23 +80005058 l .data 00000000 Zbkb_unzip_cg_cp_rd_b23_str +8000086c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b24 +8000508b l .data 00000000 Zbkb_unzip_cg_cp_rd_b24_str +80000890 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b25 +800050be l .data 00000000 Zbkb_unzip_cg_cp_rd_b25_str +800008b4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b26 +800050f1 l .data 00000000 Zbkb_unzip_cg_cp_rd_b26_str +800008d8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b27 +80005124 l .data 00000000 Zbkb_unzip_cg_cp_rd_b27_str +80000900 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b28 +80005157 l .data 00000000 Zbkb_unzip_cg_cp_rd_b28_str +80000924 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b29 +8000518a l .data 00000000 Zbkb_unzip_cg_cp_rd_b29_str +80000948 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b30 +800051bd l .data 00000000 Zbkb_unzip_cg_cp_rd_b30_str +8000096c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rd_b31 +800051f0 l .data 00000000 Zbkb_unzip_cg_cp_rd_b31_str +80000990 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x0 +80005223 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x0_str +800009b4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x1 +8000525d l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x1_str +800009d8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x2 +80005297 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x2_str +800009fc l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x80000000 +800052d1 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x80000000_str +80000a20 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x80000001 +80005312 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x80000001_str +80000a44 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x7fffffff +80005353 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x7fffffff_str +80000a68 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x7ffffffe +80005394 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x7ffffffe_str +80000a8c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xffffffff +800053d5 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xffffffff_str +80000ab0 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xfffffffe +80005416 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xfffffffe_str +80000ad4 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x5bbc8872 +80005457 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x5bbc8872_str +80000af8 l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xaaaaaaaa +80005498 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b1c l .text.rvtest 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x55555555 +800054d9 l .data 00000000 Zbkb_unzip_cg_cp_rs1_edges_0x55555555_str +80000b40 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b0 +8000551a l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b0_str +80000b64 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b1 +80005551 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b1_str +80000b8c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b2 +80005588 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b2_str +80000bb0 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b3 +800055bf l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b3_str +80000bdc l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b4 +800055f6 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b4_str +80000c00 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b5 +8000562d l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b5_str +80000c24 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b6 +80005664 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b6_str +80000c50 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b7 +8000569b l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b7_str +80000c74 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b8 +800056d2 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b8_str +80000c98 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b9 +80005709 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b9_str +80000cbc l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b10 +80005740 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b10_str +80000ce0 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b11 +80005778 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b11_str +80000d04 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b12 +800057b0 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b12_str +80000d30 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b13 +800057e8 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b13_str +80000d54 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b14 +80005820 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b14_str +80000d7c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b15 +80005858 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b15_str +80000da0 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b16 +80005890 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b16_str +80000dc4 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b17 +800058c8 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b17_str +80000de8 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b18 +80005900 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b18_str +80000e0c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b19 +80005938 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b19_str +80000e30 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b20 +80005970 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b20_str +80000e54 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b21 +800059a8 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b21_str +80000e78 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b22 +800059e0 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b22_str +80000e9c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b23 +80005a18 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b23_str +80000ec0 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b24 +80005a51 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b24_str +80000ee4 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b25 +80005a8a l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b25_str +80000f08 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b26 +80005ac3 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b26_str +80000f2c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b27 +80005afc l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b27_str +80000f50 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b28 +80005b35 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b28_str +80000f74 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b29 +80005b6e l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b29_str +80000f9c l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b30 +80005ba7 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b30_str +80000fc4 l .text.rvtest 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b31 +80005be0 l .data 00000000 Zbkb_unzip_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000ff4 l .text.rvtest 00000000 exit_Mcleanup +80000ff8 l .text.rvtest 00000000 resto_Medeleg +80001000 l .text.rvtest 00000000 resto_Msatp +80001004 l .text.rvtest 00000000 resto_Mscratch +8000100c l .text.rvtest 00000000 resto_Mxtvec +80001020 l .text.rvtest 00000000 resto_Mtramp +80001024 l .text.rvtest 00000000 resto_Mloop +8000103c l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +8000629f l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +800062d9 l .data 00000000 begin_debugstr +80006339 l .data 00000000 trap_sig_overflowstr +80006ee4 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007b48 l .data 00000000 trap_sigptr +80007b40 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000648d l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +800062fb l .data 00000000 abortstr +80006264 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +8000791b l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005d88 l .data 00000000 ascii_buffer +800063a2 l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005d68 l .data 00000000 saved_xepc +800165ac l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800064a4 l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800065a6 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800066a1 l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +80006794 l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006907 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005c20 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005c20 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005d48 l .data 00000000 failure_diag_type +80005d58 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005d50 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +8000688b l .data 00000000 sv_Mtval2_str +800068c9 l .data 00000000 sv_Mtinst_str +800064e4 l .data 00000000 sv_Svect_str +800065e4 l .data 00000000 sv_Scause_str +800066dd l .data 00000000 sv_Sepc_str +800067d1 l .data 00000000 sv_Stval_str +80006942 l .data 00000000 sv_Sip_str +80006524 l .data 00000000 sv_Hvect_str +80006622 l .data 00000000 sv_Hcause_str +80006719 l .data 00000000 sv_Hepc_str +8000680e l .data 00000000 sv_Htval_str +8000697d l .data 00000000 sv_Hip_str +80006565 l .data 00000000 sv_Vvect_str +80006661 l .data 00000000 sv_Vcause_str +80006756 l .data 00000000 sv_Vepc_str +8000684c l .data 00000000 sv_Vtval_str +800069b9 l .data 00000000 sv_Vip_str +800069f6 l .data 00000000 Mclr_Mext_int_str +80006a45 l .data 00000000 Mclr_Sext_int_str +80006b40 l .data 00000000 Sclr_Sext_int_str +80006c3c l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005d54 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +80006390 l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005d40 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800063a4 l .data 00000000 inststr +80005d20 l .data 00000000 failing_instruction +800063b8 l .data 00000000 addrstr +80005d28 l .data 00000000 failing_addr +80006def l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005d24 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +80006f05 l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80006de8 l .data 00000000 vxsatstr +80006e00 l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005d30 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80006e17 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005d38 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006e2e l .data 00000000 failure_diag_bad_instr_str +80006e8c l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +80006f31 l .data 00000000 trap_diag_header_str +80006f5d l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80006f6d l .data 00000000 trap_diag_expected_offset_str +80006f98 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +80006fc7 l .data 00000000 trap_diag_extra_traps_str +8000702f l .data 00000000 trap_diag_diff_bytes_str +80007056 l .data 00000000 trap_diag_extra_next_step_str +80006ff3 l .data 00000000 trap_diag_missing_traps_str +8000713e l .data 00000000 trap_diag_missing_next_step_str +80007225 l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +80007261 l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +8000723f l .data 00000000 trap_diag_mode_m_str +80007247 l .data 00000000 trap_diag_mode_s_str +8000724f l .data 00000000 trap_diag_mode_hs_str +80007258 l .data 00000000 trap_diag_mode_vs_str +8000726a l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800073c1 l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +80007284 l .data 00000000 trap_diag_field_vect_str +800072b5 l .data 00000000 trap_diag_field_cause_str +800072d5 l .data 00000000 trap_diag_field_epc_str +800072f3 l .data 00000000 trap_diag_field_tval_str +80007312 l .data 00000000 trap_diag_field_ip_str +8000733a l .data 00000000 trap_diag_field_tval2_str +80007366 l .data 00000000 trap_diag_field_tinst_str +80007392 l .data 00000000 trap_diag_field_intid_str +800073d0 l .data 00000000 trap_diag_expected_str +800073e7 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +800073fe l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +80007415 l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +8000748b l .data 00000000 trap_diag_hint_vect_str +80007561 l .data 00000000 trap_diag_hint_cause_str +80007654 l .data 00000000 trap_diag_hint_epc_str +8000774f l .data 00000000 trap_diag_hint_tval_str +80007836 l .data 00000000 trap_diag_hint_ip_str +80007443 l .data 00000000 trap_diag_generic_str +8000642c l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005db0 l .data 00000000 trap_excpt_name_tbl +80005e10 l .data 00000000 trap_int_name_tbl +8000624e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005d60 l .data 00000000 csr_context_ret_addr +8000644d l .data 00000000 mepcstr +8000645d l .data 00000000 mcausestr +80005d70 l .data 00000000 saved_xcause +8000646d l .data 00000000 mtvalstr +80005d78 l .data 00000000 saved_xtval +8000647d l .data 00000000 mstatusstr +80005d80 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007960 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006f0d l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005db0 l .data 00000000 end_failure_scratch +80005e50 l .data 00000000 trap_excpt_name_0 +80005e70 l .data 00000000 trap_excpt_name_1 +80005e8a l .data 00000000 trap_excpt_name_2 +80005e9f l .data 00000000 trap_excpt_name_3 +80005eab l .data 00000000 trap_excpt_name_4 +80005ec4 l .data 00000000 trap_excpt_name_5 +80005ed7 l .data 00000000 trap_excpt_name_6 +80005ef5 l .data 00000000 trap_excpt_name_7 +80005f0d l .data 00000000 trap_excpt_name_8 +80005f2b l .data 00000000 trap_excpt_name_9 +80005f49 l .data 00000000 trap_excpt_name_10 +80005f68 l .data 00000000 trap_excpt_name_11 +80005f86 l .data 00000000 trap_excpt_name_12 +80005f9e l .data 00000000 trap_excpt_name_13 +80005faf l .data 00000000 trap_excpt_name_14 +80005fbe l .data 00000000 trap_excpt_name_15 +80005fd4 l .data 00000000 trap_excpt_name_16 +80005fe1 l .data 00000000 trap_excpt_name_17 +80005ff0 l .data 00000000 trap_excpt_name_18 +80006000 l .data 00000000 trap_excpt_name_19 +80006010 l .data 00000000 trap_excpt_name_20 +8000602e l .data 00000000 trap_excpt_name_21 +80006045 l .data 00000000 trap_excpt_name_22 +8000605a l .data 00000000 trap_excpt_name_23 +80006076 l .data 00000000 trap_int_name_0 +8000608e l .data 00000000 trap_int_name_1 +800060ad l .data 00000000 trap_int_name_2 +800060d4 l .data 00000000 trap_int_name_3 +800060f0 l .data 00000000 trap_int_name_4 +80006108 l .data 00000000 trap_int_name_5 +80006124 l .data 00000000 trap_int_name_6 +80006148 l .data 00000000 trap_int_name_7 +80006161 l .data 00000000 trap_int_name_8 +80006179 l .data 00000000 trap_int_name_9 +80006198 l .data 00000000 trap_int_name_10 +800061bf l .data 00000000 trap_int_name_11 +800061db l .data 00000000 trap_int_name_12 +80006200 l .data 00000000 trap_int_name_13 +8000621c l .data 00000000 trap_int_name_14 +80006235 l .data 00000000 trap_int_name_15 +800063f9 l .data 00000000 xepcstr +80006a97 l .data 00000000 Mclr_Vext_int_str +80006af1 l .data 00000000 Sclr_Mext_int_str +80006b92 l .data 00000000 Sclr_Vext_int_str +80006bec l .data 00000000 Hclr_Mext_int_str +80006c8f l .data 00000000 Hclr_Vext_int_str +80006cea l .data 00000000 Vclr_Mext_int_str +80006d3a l .data 00000000 Vclr_Sext_int_str +80006d8d l .data 00000000 Vclr_Vext_int_str +8000742c l .data 00000000 trap_diag_curr_xepc_str +800165b0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800165b0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +8000103c g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007960 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fe4 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007960 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +8000795f g .data 00000000 rvtest_data_end +80000fe4 g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016700 g .tohost 00000000 fromhost +80016600 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x20e87678 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zbkb_unzip_cg_cp_rs1_b0: + unzip x24, x0 # perform operation +80000048: 08f05c13 unzip x24,x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_unzip_cg_cp_rs1_b0, Zbkb_unzip_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01820863 beq x4,x24,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1f9b8945 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zbkb_unzip_cg_cp_rs1_b1: + unzip x24, x1 # perform operation +8000006c: 08f0dc13 unzip x24,x1 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_unzip_cg_cp_rs1_b1, Zbkb_unzip_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01820863 beq x4,x24,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004592 .word 0x80004592 +80000084: 00410113 addi x2,x2,4 + + mv x15, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010793 addi x15,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xcef2f062 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zbkb_unzip_cg_cp_rs1_b2: + unzip x0, x2 # perform operation +80000094: 08f15013 unzip x0,x2 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_unzip_cg_cp_rs1_b2, Zbkb_unzip_cg_cp_rs1_b2_str) +80000098: 0007a203 lw x4,0(x15) +8000009c: 00020863 beq x4,x0,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c4 .word 0x800045c4 +800000ac: 00478793 addi x15,x15,4 + + mv x21, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018a93 addi x21,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0xdb4333eb +800000b4: 000aa183 lw x3,0(x21) +800000b8: 004a8a93 addi x21,x21,4 + +800000bc : +Zbkb_unzip_cg_cp_rs1_b3: + unzip x6, x3 # perform operation +800000bc: 08f1d313 unzip x6,x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_unzip_cg_cp_rs1_b3, Zbkb_unzip_cg_cp_rs1_b3_str) +800000c0: 0007a203 lw x4,0(x15) +800000c4: 00620863 beq x4,x6,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f6 .word 0x800045f6 +800000d4: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x1d512ab3 +800000e0: 000aa203 lw x4,0(x21) +800000e4: 004a8a93 addi x21,x21,4 + +800000e8 : +Zbkb_unzip_cg_cp_rs1_b4: + unzip x17, x4 # perform operation +800000e8: 08f25893 unzip x17,x4 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zbkb_unzip_cg_cp_rs1_b4, Zbkb_unzip_cg_cp_rs1_b4_str) +800000ec: 0007a383 lw x7,0(x15) +800000f0: 01138863 beq x7,x17,80000100 +800000f4: 7a50146f jal x8,80002098 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004628 .word 0x80004628 +80000100: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x8e500a24 +80000104: 000aa283 lw x5,0(x21) +80000108: 004a8a93 addi x21,x21,4 + +8000010c : +Zbkb_unzip_cg_cp_rs1_b5: + unzip x14, x5 # perform operation +8000010c: 08f2d713 unzip x14,x5 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_unzip_cg_cp_rs1_b5, Zbkb_unzip_cg_cp_rs1_b5_str) +80000110: 0007a383 lw x7,0(x15) +80000114: 00e38863 beq x7,x14,80000124 +80000118: 7810146f jal x8,80002098 +8000011c: 8000010c .word 0x8000010c +80000120: 8000465a .word 0x8000465a +80000124: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xca3da189 +80000128: 000aa303 lw x6,0(x21) +8000012c: 004a8a93 addi x21,x21,4 + +80000130 : +Zbkb_unzip_cg_cp_rs1_b6: + unzip x2, x6 # perform operation +80000130: 08f35113 unzip x2,x6 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_unzip_cg_cp_rs1_b6, Zbkb_unzip_cg_cp_rs1_b6_str) +80000134: 0007a383 lw x7,0(x15) +80000138: 00238863 beq x7,x2,80000148 +8000013c: 75d0146f jal x8,80002098 +80000140: 80000130 .word 0x80000130 +80000144: 8000468c .word 0x8000468c +80000148: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000014c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000150: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xb0eb44c5 +80000154: 000aa383 lw x7,0(x21) +80000158: 004a8a93 addi x21,x21,4 + +8000015c : +Zbkb_unzip_cg_cp_rs1_b7: + unzip x12, x7 # perform operation +8000015c: 08f3d613 unzip x12,x7 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_unzip_cg_cp_rs1_b7, Zbkb_unzip_cg_cp_rs1_b7_str) +80000160: 0007a683 lw x13,0(x15) +80000164: 00c68863 beq x13,x12,80000174 +80000168: 7590176f jal x14,800020c0 +8000016c: 8000015c .word 0x8000015c +80000170: 800046be .word 0x800046be +80000174: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xcf004387 +80000178: 000aa403 lw x8,0(x21) +8000017c: 004a8a93 addi x21,x21,4 + +80000180 : +Zbkb_unzip_cg_cp_rs1_b8: + unzip x17, x8 # perform operation +80000180: 08f45893 unzip x17,x8 + # Check if x17 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x17, Zbkb_unzip_cg_cp_rs1_b8, Zbkb_unzip_cg_cp_rs1_b8_str) +80000184: 0007a683 lw x13,0(x15) +80000188: 01168863 beq x13,x17,80000198 +8000018c: 7350176f jal x14,800020c0 +80000190: 80000180 .word 0x80000180 +80000194: 800046f0 .word 0x800046f0 +80000198: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x4bd06590 +8000019c: 000aa483 lw x9,0(x21) +800001a0: 004a8a93 addi x21,x21,4 + +800001a4 : +Zbkb_unzip_cg_cp_rs1_b9: + unzip x7, x9 # perform operation +800001a4: 08f4d393 unzip x7,x9 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_unzip_cg_cp_rs1_b9, Zbkb_unzip_cg_cp_rs1_b9_str) +800001a8: 0007a683 lw x13,0(x15) +800001ac: 00768863 beq x13,x7,800001bc +800001b0: 7110176f jal x14,800020c0 +800001b4: 800001a4 .word 0x800001a4 +800001b8: 80004722 .word 0x80004722 +800001bc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x3e0c1819 +800001c0: 000aa503 lw x10,0(x21) +800001c4: 004a8a93 addi x21,x21,4 + +800001c8 : +Zbkb_unzip_cg_cp_rs1_b10: + unzip x20, x10 # perform operation +800001c8: 08f55a13 unzip x20,x10 + # Check if x20 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x20, Zbkb_unzip_cg_cp_rs1_b10, Zbkb_unzip_cg_cp_rs1_b10_str) +800001cc: 0007a683 lw x13,0(x15) +800001d0: 01468863 beq x13,x20,800001e0 +800001d4: 6ed0176f jal x14,800020c0 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80004755 .word 0x80004755 +800001e0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xd6791705 +800001e4: 000aa583 lw x11,0(x21) +800001e8: 004a8a93 addi x21,x21,4 + +800001ec : +Zbkb_unzip_cg_cp_rs1_b11: + unzip x17, x11 # perform operation +800001ec: 08f5d893 unzip x17,x11 + # Check if x17 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x17, Zbkb_unzip_cg_cp_rs1_b11, Zbkb_unzip_cg_cp_rs1_b11_str) +800001f0: 0007a683 lw x13,0(x15) +800001f4: 01168863 beq x13,x17,80000204 +800001f8: 6c90176f jal x14,800020c0 +800001fc: 800001ec .word 0x800001ec +80000200: 80004789 .word 0x80004789 +80000204: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xaf1303ed +80000208: 000aa603 lw x12,0(x21) +8000020c: 004a8a93 addi x21,x21,4 + +80000210 : +Zbkb_unzip_cg_cp_rs1_b12: + unzip x29, x12 # perform operation +80000210: 08f65e93 unzip x29,x12 + # Check if x29 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x29, Zbkb_unzip_cg_cp_rs1_b12, Zbkb_unzip_cg_cp_rs1_b12_str) +80000214: 0007a683 lw x13,0(x15) +80000218: 01d68863 beq x13,x29,80000228 +8000021c: 6a50176f jal x14,800020c0 +80000220: 80000210 .word 0x80000210 +80000224: 800047bd .word 0x800047bd +80000228: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000022c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000230: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x8f3b28e5 +80000234: 000aa683 lw x13,0(x21) +80000238: 004a8a93 addi x21,x21,4 + +8000023c : +Zbkb_unzip_cg_cp_rs1_b13: + unzip x16, x13 # perform operation +8000023c: 08f6d813 unzip x16,x13 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_unzip_cg_cp_rs1_b13, Zbkb_unzip_cg_cp_rs1_b13_str) +80000240: 0007a383 lw x7,0(x15) +80000244: 01038863 beq x7,x16,80000254 +80000248: 6510146f jal x8,80002098 +8000024c: 8000023c .word 0x8000023c +80000250: 800047f1 .word 0x800047f1 +80000254: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x8c4d2044 +80000258: 000aa703 lw x14,0(x21) +8000025c: 004a8a93 addi x21,x21,4 + +80000260 : +Zbkb_unzip_cg_cp_rs1_b14: + unzip x0, x14 # perform operation +80000260: 08f75013 unzip x0,x14 + # Check if x0 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x0, Zbkb_unzip_cg_cp_rs1_b14, Zbkb_unzip_cg_cp_rs1_b14_str) +80000264: 0007a383 lw x7,0(x15) +80000268: 00038863 beq x7,x0,80000278 +8000026c: 62d0146f jal x8,80002098 +80000270: 80000260 .word 0x80000260 +80000274: 80004825 .word 0x80004825 +80000278: 00478793 addi x15,x15,4 + + mv x28, x15 # switch signature pointer register to avoid conflict with test +8000027c: 00078e13 addi x28,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xd4754a58 +80000280: 000aa783 lw x15,0(x21) +80000284: 004a8a93 addi x21,x21,4 + +80000288 : +Zbkb_unzip_cg_cp_rs1_b15: + unzip x1, x15 # perform operation +80000288: 08f7d093 unzip x1,x15 + # Check if x1 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x1, Zbkb_unzip_cg_cp_rs1_b15, Zbkb_unzip_cg_cp_rs1_b15_str) +8000028c: 000e2383 lw x7,0(x28) +80000290: 00138863 beq x7,x1,800002a0 +80000294: 6050146f jal x8,80002098 +80000298: 80000288 .word 0x80000288 +8000029c: 80004859 .word 0x80004859 +800002a0: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x014b305d +800002a4: 000aa803 lw x16,0(x21) +800002a8: 004a8a93 addi x21,x21,4 + +800002ac : +Zbkb_unzip_cg_cp_rs1_b16: + unzip x2, x16 # perform operation +800002ac: 08f85113 unzip x2,x16 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zbkb_unzip_cg_cp_rs1_b16, Zbkb_unzip_cg_cp_rs1_b16_str) +800002b0: 000e2383 lw x7,0(x28) +800002b4: 00238863 beq x7,x2,800002c4 +800002b8: 5e10146f jal x8,80002098 +800002bc: 800002ac .word 0x800002ac +800002c0: 8000488d .word 0x8000488d +800002c4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x8435a51d +800002c8: 000aa883 lw x17,0(x21) +800002cc: 004a8a93 addi x21,x21,4 + +800002d0 : +Zbkb_unzip_cg_cp_rs1_b17: + unzip x18, x17 # perform operation +800002d0: 08f8d913 unzip x18,x17 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zbkb_unzip_cg_cp_rs1_b17, Zbkb_unzip_cg_cp_rs1_b17_str) +800002d4: 000e2383 lw x7,0(x28) +800002d8: 01238863 beq x7,x18,800002e8 +800002dc: 5bd0146f jal x8,80002098 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 800048c1 .word 0x800048c1 +800002e8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xdca2f130 +800002ec: 000aa903 lw x18,0(x21) +800002f0: 004a8a93 addi x21,x21,4 + +800002f4 : +Zbkb_unzip_cg_cp_rs1_b18: + unzip x17, x18 # perform operation +800002f4: 08f95893 unzip x17,x18 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zbkb_unzip_cg_cp_rs1_b18, Zbkb_unzip_cg_cp_rs1_b18_str) +800002f8: 000e2383 lw x7,0(x28) +800002fc: 01138863 beq x7,x17,8000030c +80000300: 5990146f jal x8,80002098 +80000304: 800002f4 .word 0x800002f4 +80000308: 800048f5 .word 0x800048f5 +8000030c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc9b10bca +80000310: 000aa983 lw x19,0(x21) +80000314: 004a8a93 addi x21,x21,4 + +80000318 : +Zbkb_unzip_cg_cp_rs1_b19: + unzip x25, x19 # perform operation +80000318: 08f9dc93 unzip x25,x19 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkb_unzip_cg_cp_rs1_b19, Zbkb_unzip_cg_cp_rs1_b19_str) +8000031c: 000e2383 lw x7,0(x28) +80000320: 01938863 beq x7,x25,80000330 +80000324: 5750146f jal x8,80002098 +80000328: 80000318 .word 0x80000318 +8000032c: 80004929 .word 0x80004929 +80000330: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x5e483f23 +80000334: 000aaa03 lw x20,0(x21) +80000338: 004a8a93 addi x21,x21,4 + +8000033c : +Zbkb_unzip_cg_cp_rs1_b20: + unzip x11, x20 # perform operation +8000033c: 08fa5593 unzip x11,x20 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zbkb_unzip_cg_cp_rs1_b20, Zbkb_unzip_cg_cp_rs1_b20_str) +80000340: 000e2383 lw x7,0(x28) +80000344: 00b38863 beq x7,x11,80000354 +80000348: 5510146f jal x8,80002098 +8000034c: 8000033c .word 0x8000033c +80000350: 8000495d .word 0x8000495d +80000354: 004e0e13 addi x28,x28,4 + + mv x22, x21 # switch data pointer register to avoid conflict with test +80000358: 000a8b13 addi x22,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xc8258ee7 +8000035c: 000b2a83 lw x21,0(x22) +80000360: 004b0b13 addi x22,x22,4 + +80000364 : +Zbkb_unzip_cg_cp_rs1_b21: + unzip x27, x21 # perform operation +80000364: 08fadd93 unzip x27,x21 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zbkb_unzip_cg_cp_rs1_b21, Zbkb_unzip_cg_cp_rs1_b21_str) +80000368: 000e2383 lw x7,0(x28) +8000036c: 01b38863 beq x7,x27,8000037c +80000370: 5290146f jal x8,80002098 +80000374: 80000364 .word 0x80000364 +80000378: 80004991 .word 0x80004991 +8000037c: 004e0e13 addi x28,x28,4 + + mv x25, x22 # switch data pointer register to avoid conflict with test +80000380: 000b0c93 addi x25,x22,0 +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xa08258ce +80000384: 000cab03 lw x22,0(x25) +80000388: 004c8c93 addi x25,x25,4 + +8000038c : +Zbkb_unzip_cg_cp_rs1_b22: + unzip x29, x22 # perform operation +8000038c: 08fb5e93 unzip x29,x22 + # Check if x29 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x29, Zbkb_unzip_cg_cp_rs1_b22, Zbkb_unzip_cg_cp_rs1_b22_str) +80000390: 000e2383 lw x7,0(x28) +80000394: 01d38863 beq x7,x29,800003a4 +80000398: 5010146f jal x8,80002098 +8000039c: 8000038c .word 0x8000038c +800003a0: 800049c5 .word 0x800049c5 +800003a4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0xfe27869d +800003a8: 000cab83 lw x23,0(x25) +800003ac: 004c8c93 addi x25,x25,4 + +800003b0 : +Zbkb_unzip_cg_cp_rs1_b23: + unzip x13, x23 # perform operation +800003b0: 08fbd693 unzip x13,x23 + # Check if x13 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x13, Zbkb_unzip_cg_cp_rs1_b23, Zbkb_unzip_cg_cp_rs1_b23_str) +800003b4: 000e2383 lw x7,0(x28) +800003b8: 00d38863 beq x7,x13,800003c8 +800003bc: 4dd0146f jal x8,80002098 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 800049f9 .word 0x800049f9 +800003c8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x7027c53a +800003cc: 000cac03 lw x24,0(x25) +800003d0: 004c8c93 addi x25,x25,4 + +800003d4 : +Zbkb_unzip_cg_cp_rs1_b24: + unzip x21, x24 # perform operation +800003d4: 08fc5a93 unzip x21,x24 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zbkb_unzip_cg_cp_rs1_b24, Zbkb_unzip_cg_cp_rs1_b24_str) +800003d8: 000e2383 lw x7,0(x28) +800003dc: 01538863 beq x7,x21,800003ec +800003e0: 4b90146f jal x8,80002098 +800003e4: 800003d4 .word 0x800003d4 +800003e8: 80004a2d .word 0x80004a2d +800003ec: 004e0e13 addi x28,x28,4 + + mv x19, x25 # switch data pointer register to avoid conflict with test +800003f0: 000c8993 addi x19,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0xf03d33c0 +800003f4: 0009ac83 lw x25,0(x19) +800003f8: 00498993 addi x19,x19,4 + +800003fc : +Zbkb_unzip_cg_cp_rs1_b25: + unzip x12, x25 # perform operation +800003fc: 08fcd613 unzip x12,x25 + # Check if x12 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x12, Zbkb_unzip_cg_cp_rs1_b25, Zbkb_unzip_cg_cp_rs1_b25_str) +80000400: 000e2383 lw x7,0(x28) +80000404: 00c38863 beq x7,x12,80000414 +80000408: 4910146f jal x8,80002098 +8000040c: 800003fc .word 0x800003fc +80000410: 80004a61 .word 0x80004a61 +80000414: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x25605779 +80000418: 0009ad03 lw x26,0(x19) +8000041c: 00498993 addi x19,x19,4 + +80000420 : +Zbkb_unzip_cg_cp_rs1_b26: + unzip x12, x26 # perform operation +80000420: 08fd5613 unzip x12,x26 + # Check if x12 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x12, Zbkb_unzip_cg_cp_rs1_b26, Zbkb_unzip_cg_cp_rs1_b26_str) +80000424: 000e2383 lw x7,0(x28) +80000428: 00c38863 beq x7,x12,80000438 +8000042c: 46d0146f jal x8,80002098 +80000430: 80000420 .word 0x80000420 +80000434: 80004a95 .word 0x80004a95 +80000438: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x3ca9039c +8000043c: 0009ad83 lw x27,0(x19) +80000440: 00498993 addi x19,x19,4 + +80000444 : +Zbkb_unzip_cg_cp_rs1_b27: + unzip x22, x27 # perform operation +80000444: 08fddb13 unzip x22,x27 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zbkb_unzip_cg_cp_rs1_b27, Zbkb_unzip_cg_cp_rs1_b27_str) +80000448: 000e2383 lw x7,0(x28) +8000044c: 01638863 beq x7,x22,8000045c +80000450: 4490146f jal x8,80002098 +80000454: 80000444 .word 0x80000444 +80000458: 80004ac9 .word 0x80004ac9 +8000045c: 004e0e13 addi x28,x28,4 + + mv x23, x28 # switch signature pointer register to avoid conflict with test +80000460: 000e0b93 addi x23,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x1786c335 +80000464: 0009ae03 lw x28,0(x19) +80000468: 00498993 addi x19,x19,4 + +8000046c : +Zbkb_unzip_cg_cp_rs1_b28: + unzip x16, x28 # perform operation +8000046c: 08fe5813 unzip x16,x28 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zbkb_unzip_cg_cp_rs1_b28, Zbkb_unzip_cg_cp_rs1_b28_str) +80000470: 000ba383 lw x7,0(x23) +80000474: 01038863 beq x7,x16,80000484 +80000478: 4210146f jal x8,80002098 +8000047c: 8000046c .word 0x8000046c +80000480: 80004afd .word 0x80004afd +80000484: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x8224f521 +80000488: 0009ae83 lw x29,0(x19) +8000048c: 00498993 addi x19,x19,4 + +80000490 : +Zbkb_unzip_cg_cp_rs1_b29: + unzip x6, x29 # perform operation +80000490: 08fed313 unzip x6,x29 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_unzip_cg_cp_rs1_b29, Zbkb_unzip_cg_cp_rs1_b29_str) +80000494: 000ba383 lw x7,0(x23) +80000498: 00638863 beq x7,x6,800004a8 +8000049c: 3fd0146f jal x8,80002098 +800004a0: 80000490 .word 0x80000490 +800004a4: 80004b31 .word 0x80004b31 +800004a8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xdcbcfa77 +800004ac: 0009af03 lw x30,0(x19) +800004b0: 00498993 addi x19,x19,4 + +800004b4 : +Zbkb_unzip_cg_cp_rs1_b30: + unzip x22, x30 # perform operation +800004b4: 08ff5b13 unzip x22,x30 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zbkb_unzip_cg_cp_rs1_b30, Zbkb_unzip_cg_cp_rs1_b30_str) +800004b8: 000ba383 lw x7,0(x23) +800004bc: 01638863 beq x7,x22,800004cc +800004c0: 3d90146f jal x8,80002098 +800004c4: 800004b4 .word 0x800004b4 +800004c8: 80004b65 .word 0x80004b65 +800004cc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xafb0c571 +800004d0: 0009af83 lw x31,0(x19) +800004d4: 00498993 addi x19,x19,4 + +800004d8 : +Zbkb_unzip_cg_cp_rs1_b31: + unzip x29, x31 # perform operation +800004d8: 08ffde93 unzip x29,x31 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkb_unzip_cg_cp_rs1_b31, Zbkb_unzip_cg_cp_rs1_b31_str) +800004dc: 000ba383 lw x7,0(x23) +800004e0: 01d38863 beq x7,x29,800004f0 +800004e4: 3b50146f jal x8,80002098 +800004e8: 800004d8 .word 0x800004d8 +800004ec: 80004b99 .word 0x80004b99 +800004f0: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xe81c52d8 +800004f4: 0009a783 lw x15,0(x19) +800004f8: 00498993 addi x19,x19,4 + +800004fc : +Zbkb_unzip_cg_cp_rd_b0: + unzip x0, x15 # perform operation +800004fc: 08f7d013 unzip x0,x15 + # Check if x0 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x0, Zbkb_unzip_cg_cp_rd_b0, Zbkb_unzip_cg_cp_rd_b0_str) +80000500: 000ba383 lw x7,0(x23) +80000504: 00038863 beq x7,x0,80000514 +80000508: 3910146f jal x8,80002098 +8000050c: 800004fc .word 0x800004fc +80000510: 80004bcd .word 0x80004bcd +80000514: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x30781093 +80000518: 0009a583 lw x11,0(x19) +8000051c: 00498993 addi x19,x19,4 + +80000520 : +Zbkb_unzip_cg_cp_rd_b1: + unzip x1, x11 # perform operation +80000520: 08f5d093 unzip x1,x11 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkb_unzip_cg_cp_rd_b1, Zbkb_unzip_cg_cp_rd_b1_str) +80000524: 000ba383 lw x7,0(x23) +80000528: 00138863 beq x7,x1,80000538 +8000052c: 36d0146f jal x8,80002098 +80000530: 80000520 .word 0x80000520 +80000534: 80004bff .word 0x80004bff +80000538: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xbee4db4e +8000053c: 0009af83 lw x31,0(x19) +80000540: 00498993 addi x19,x19,4 + +80000544 : +Zbkb_unzip_cg_cp_rd_b2: + unzip x2, x31 # perform operation +80000544: 08ffd113 unzip x2,x31 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkb_unzip_cg_cp_rd_b2, Zbkb_unzip_cg_cp_rd_b2_str) +80000548: 000ba383 lw x7,0(x23) +8000054c: 00238863 beq x7,x2,8000055c +80000550: 3490146f jal x8,80002098 +80000554: 80000544 .word 0x80000544 +80000558: 80004c31 .word 0x80004c31 +8000055c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xc3912ae8 +80000560: 0009a303 lw x6,0(x19) +80000564: 00498993 addi x19,x19,4 + +80000568 : +Zbkb_unzip_cg_cp_rd_b3: + unzip x3, x6 # perform operation +80000568: 08f35193 unzip x3,x6 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkb_unzip_cg_cp_rd_b3, Zbkb_unzip_cg_cp_rd_b3_str) +8000056c: 000ba383 lw x7,0(x23) +80000570: 00338863 beq x7,x3,80000580 +80000574: 3250146f jal x8,80002098 +80000578: 80000568 .word 0x80000568 +8000057c: 80004c63 .word 0x80004c63 +80000580: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xf83d4f4f +80000584: 0009a583 lw x11,0(x19) +80000588: 00498993 addi x19,x19,4 + +8000058c : +Zbkb_unzip_cg_cp_rd_b4: + unzip x4, x11 # perform operation +8000058c: 08f5d213 unzip x4,x11 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_unzip_cg_cp_rd_b4, Zbkb_unzip_cg_cp_rd_b4_str) +80000590: 000ba383 lw x7,0(x23) +80000594: 00438863 beq x7,x4,800005a4 +80000598: 3010146f jal x8,80002098 +8000059c: 8000058c .word 0x8000058c +800005a0: 80004c95 .word 0x80004c95 +800005a4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x708faae3 +800005a8: 0009a303 lw x6,0(x19) +800005ac: 00498993 addi x19,x19,4 + +800005b0 : +Zbkb_unzip_cg_cp_rd_b5: + unzip x5, x6 # perform operation +800005b0: 08f35293 unzip x5,x6 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_unzip_cg_cp_rd_b5, Zbkb_unzip_cg_cp_rd_b5_str) +800005b4: 000ba383 lw x7,0(x23) +800005b8: 00538863 beq x7,x5,800005c8 +800005bc: 2dd0146f jal x8,80002098 +800005c0: 800005b0 .word 0x800005b0 +800005c4: 80004cc7 .word 0x80004cc7 +800005c8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xaf2c1558 +800005cc: 0009a203 lw x4,0(x19) +800005d0: 00498993 addi x19,x19,4 + +800005d4 : +Zbkb_unzip_cg_cp_rd_b6: + unzip x6, x4 # perform operation +800005d4: 08f25313 unzip x6,x4 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_unzip_cg_cp_rd_b6, Zbkb_unzip_cg_cp_rd_b6_str) +800005d8: 000ba383 lw x7,0(x23) +800005dc: 00638863 beq x7,x6,800005ec +800005e0: 2b90146f jal x8,80002098 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 80004cf9 .word 0x80004cf9 +800005ec: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005f0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005f4: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x71ff1d7d +800005f8: 0009a783 lw x15,0(x19) +800005fc: 00498993 addi x19,x19,4 + +80000600 : +Zbkb_unzip_cg_cp_rd_b7: + unzip x7, x15 # perform operation +80000600: 08f7d393 unzip x7,x15 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_unzip_cg_cp_rd_b7, Zbkb_unzip_cg_cp_rd_b7_str) +80000604: 000ba203 lw x4,0(x23) +80000608: 00720863 beq x4,x7,80000618 +8000060c: 275012ef jal x5,80002080 +80000610: 80000600 .word 0x80000600 +80000614: 80004d2b .word 0x80004d2b +80000618: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x63b8a91c +8000061c: 0009a503 lw x10,0(x19) +80000620: 00498993 addi x19,x19,4 + +80000624 : +Zbkb_unzip_cg_cp_rd_b8: + unzip x8, x10 # perform operation +80000624: 08f55413 unzip x8,x10 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_unzip_cg_cp_rd_b8, Zbkb_unzip_cg_cp_rd_b8_str) +80000628: 000ba203 lw x4,0(x23) +8000062c: 00820863 beq x4,x8,8000063c +80000630: 251012ef jal x5,80002080 +80000634: 80000624 .word 0x80000624 +80000638: 80004d5d .word 0x80004d5d +8000063c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x7aafdc23 +80000640: 0009ad03 lw x26,0(x19) +80000644: 00498993 addi x19,x19,4 + +80000648 : +Zbkb_unzip_cg_cp_rd_b9: + unzip x9, x26 # perform operation +80000648: 08fd5493 unzip x9,x26 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_unzip_cg_cp_rd_b9, Zbkb_unzip_cg_cp_rd_b9_str) +8000064c: 000ba203 lw x4,0(x23) +80000650: 00920863 beq x4,x9,80000660 +80000654: 22d012ef jal x5,80002080 +80000658: 80000648 .word 0x80000648 +8000065c: 80004d8f .word 0x80004d8f +80000660: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x9ff71c03 +80000664: 0009a483 lw x9,0(x19) +80000668: 00498993 addi x19,x19,4 + +8000066c : +Zbkb_unzip_cg_cp_rd_b10: + unzip x10, x9 # perform operation +8000066c: 08f4d513 unzip x10,x9 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_unzip_cg_cp_rd_b10, Zbkb_unzip_cg_cp_rd_b10_str) +80000670: 000ba203 lw x4,0(x23) +80000674: 00a20863 beq x4,x10,80000684 +80000678: 209012ef jal x5,80002080 +8000067c: 8000066c .word 0x8000066c +80000680: 80004dc1 .word 0x80004dc1 +80000684: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x6da53ecf +80000688: 0009a603 lw x12,0(x19) +8000068c: 00498993 addi x19,x19,4 + +80000690 : +Zbkb_unzip_cg_cp_rd_b11: + unzip x11, x12 # perform operation +80000690: 08f65593 unzip x11,x12 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_unzip_cg_cp_rd_b11, Zbkb_unzip_cg_cp_rd_b11_str) +80000694: 000ba203 lw x4,0(x23) +80000698: 00b20863 beq x4,x11,800006a8 +8000069c: 1e5012ef jal x5,80002080 +800006a0: 80000690 .word 0x80000690 +800006a4: 80004df4 .word 0x80004df4 +800006a8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xc28c9a8e +800006ac: 0009af03 lw x30,0(x19) +800006b0: 00498993 addi x19,x19,4 + +800006b4 : +Zbkb_unzip_cg_cp_rd_b12: + unzip x12, x30 # perform operation +800006b4: 08ff5613 unzip x12,x30 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_unzip_cg_cp_rd_b12, Zbkb_unzip_cg_cp_rd_b12_str) +800006b8: 000ba203 lw x4,0(x23) +800006bc: 00c20863 beq x4,x12,800006cc +800006c0: 1c1012ef jal x5,80002080 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 80004e27 .word 0x80004e27 +800006cc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xd5f62f37 +800006d0: 0009a483 lw x9,0(x19) +800006d4: 00498993 addi x19,x19,4 + +800006d8 : +Zbkb_unzip_cg_cp_rd_b13: + unzip x13, x9 # perform operation +800006d8: 08f4d693 unzip x13,x9 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_unzip_cg_cp_rd_b13, Zbkb_unzip_cg_cp_rd_b13_str) +800006dc: 000ba203 lw x4,0(x23) +800006e0: 00d20863 beq x4,x13,800006f0 +800006e4: 19d012ef jal x5,80002080 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80004e5a .word 0x80004e5a +800006f0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x9f048b8c +800006f4: 0009ae83 lw x29,0(x19) +800006f8: 00498993 addi x19,x19,4 + +800006fc : +Zbkb_unzip_cg_cp_rd_b14: + unzip x14, x29 # perform operation +800006fc: 08fed713 unzip x14,x29 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_unzip_cg_cp_rd_b14, Zbkb_unzip_cg_cp_rd_b14_str) +80000700: 000ba203 lw x4,0(x23) +80000704: 00e20863 beq x4,x14,80000714 +80000708: 179012ef jal x5,80002080 +8000070c: 800006fc .word 0x800006fc +80000710: 80004e8d .word 0x80004e8d +80000714: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x84b3869b +80000718: 0009a383 lw x7,0(x19) +8000071c: 00498993 addi x19,x19,4 + +80000720 : +Zbkb_unzip_cg_cp_rd_b15: + unzip x15, x7 # perform operation +80000720: 08f3d793 unzip x15,x7 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_unzip_cg_cp_rd_b15, Zbkb_unzip_cg_cp_rd_b15_str) +80000724: 000ba203 lw x4,0(x23) +80000728: 00f20863 beq x4,x15,80000738 +8000072c: 155012ef jal x5,80002080 +80000730: 80000720 .word 0x80000720 +80000734: 80004ec0 .word 0x80004ec0 +80000738: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x733d9cd1 +8000073c: 0009a603 lw x12,0(x19) +80000740: 00498993 addi x19,x19,4 + +80000744 : +Zbkb_unzip_cg_cp_rd_b16: + unzip x16, x12 # perform operation +80000744: 08f65813 unzip x16,x12 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_unzip_cg_cp_rd_b16, Zbkb_unzip_cg_cp_rd_b16_str) +80000748: 000ba203 lw x4,0(x23) +8000074c: 01020863 beq x4,x16,8000075c +80000750: 131012ef jal x5,80002080 +80000754: 80000744 .word 0x80000744 +80000758: 80004ef3 .word 0x80004ef3 +8000075c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x0fdc720c +80000760: 0009ad03 lw x26,0(x19) +80000764: 00498993 addi x19,x19,4 + +80000768 : +Zbkb_unzip_cg_cp_rd_b17: + unzip x17, x26 # perform operation +80000768: 08fd5893 unzip x17,x26 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_unzip_cg_cp_rd_b17, Zbkb_unzip_cg_cp_rd_b17_str) +8000076c: 000ba203 lw x4,0(x23) +80000770: 01120863 beq x4,x17,80000780 +80000774: 10d012ef jal x5,80002080 +80000778: 80000768 .word 0x80000768 +8000077c: 80004f26 .word 0x80004f26 +80000780: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x58880e8f +80000784: 0009a083 lw x1,0(x19) +80000788: 00498993 addi x19,x19,4 + +8000078c : +Zbkb_unzip_cg_cp_rd_b18: + unzip x18, x1 # perform operation +8000078c: 08f0d913 unzip x18,x1 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_unzip_cg_cp_rd_b18, Zbkb_unzip_cg_cp_rd_b18_str) +80000790: 000ba203 lw x4,0(x23) +80000794: 01220863 beq x4,x18,800007a4 +80000798: 0e9012ef jal x5,80002080 +8000079c: 8000078c .word 0x8000078c +800007a0: 80004f59 .word 0x80004f59 +800007a4: 004b8b93 addi x23,x23,4 + + mv x28, x19 # switch data pointer register to avoid conflict with test +800007a8: 00098e13 addi x28,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x425e7880 +800007ac: 000e2a83 lw x21,0(x28) +800007b0: 004e0e13 addi x28,x28,4 + +800007b4 : +Zbkb_unzip_cg_cp_rd_b19: + unzip x19, x21 # perform operation +800007b4: 08fad993 unzip x19,x21 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_unzip_cg_cp_rd_b19, Zbkb_unzip_cg_cp_rd_b19_str) +800007b8: 000ba203 lw x4,0(x23) +800007bc: 01320863 beq x4,x19,800007cc +800007c0: 0c1012ef jal x5,80002080 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80004f8c .word 0x80004f8c +800007cc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x682fb858 +800007d0: 000e2d83 lw x27,0(x28) +800007d4: 004e0e13 addi x28,x28,4 + +800007d8 : +Zbkb_unzip_cg_cp_rd_b20: + unzip x20, x27 # perform operation +800007d8: 08fdda13 unzip x20,x27 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_unzip_cg_cp_rd_b20, Zbkb_unzip_cg_cp_rd_b20_str) +800007dc: 000ba203 lw x4,0(x23) +800007e0: 01420863 beq x4,x20,800007f0 +800007e4: 09d012ef jal x5,80002080 +800007e8: 800007d8 .word 0x800007d8 +800007ec: 80004fbf .word 0x80004fbf +800007f0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0xc79ef54d +800007f4: 000e2f83 lw x31,0(x28) +800007f8: 004e0e13 addi x28,x28,4 + +800007fc : +Zbkb_unzip_cg_cp_rd_b21: + unzip x21, x31 # perform operation +800007fc: 08ffda93 unzip x21,x31 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_unzip_cg_cp_rd_b21, Zbkb_unzip_cg_cp_rd_b21_str) +80000800: 000ba203 lw x4,0(x23) +80000804: 01520863 beq x4,x21,80000814 +80000808: 079012ef jal x5,80002080 +8000080c: 800007fc .word 0x800007fc +80000810: 80004ff2 .word 0x80004ff2 +80000814: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x39c8fe1d +80000818: 000e2f03 lw x30,0(x28) +8000081c: 004e0e13 addi x28,x28,4 + +80000820 : +Zbkb_unzip_cg_cp_rd_b22: + unzip x22, x30 # perform operation +80000820: 08ff5b13 unzip x22,x30 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_unzip_cg_cp_rd_b22, Zbkb_unzip_cg_cp_rd_b22_str) +80000824: 000ba203 lw x4,0(x23) +80000828: 01620863 beq x4,x22,80000838 +8000082c: 055012ef jal x5,80002080 +80000830: 80000820 .word 0x80000820 +80000834: 80005025 .word 0x80005025 +80000838: 004b8b93 addi x23,x23,4 + + mv x15, x23 # switch signature pointer register to avoid conflict with test +8000083c: 000b8793 addi x15,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xd0f9e64e +80000840: 000e2c83 lw x25,0(x28) +80000844: 004e0e13 addi x28,x28,4 + +80000848 : +Zbkb_unzip_cg_cp_rd_b23: + unzip x23, x25 # perform operation +80000848: 08fcdb93 unzip x23,x25 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_unzip_cg_cp_rd_b23, Zbkb_unzip_cg_cp_rd_b23_str) +8000084c: 0007a203 lw x4,0(x15) +80000850: 01720863 beq x4,x23,80000860 +80000854: 02d012ef jal x5,80002080 +80000858: 80000848 .word 0x80000848 +8000085c: 80005058 .word 0x80005058 +80000860: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0xedfe8b6b +80000864: 000e2003 lw x0,0(x28) +80000868: 004e0e13 addi x28,x28,4 + +8000086c : +Zbkb_unzip_cg_cp_rd_b24: + unzip x24, x0 # perform operation +8000086c: 08f05c13 unzip x24,x0 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zbkb_unzip_cg_cp_rd_b24, Zbkb_unzip_cg_cp_rd_b24_str) +80000870: 0007a203 lw x4,0(x15) +80000874: 01820863 beq x4,x24,80000884 +80000878: 009012ef jal x5,80002080 +8000087c: 8000086c .word 0x8000086c +80000880: 8000508b .word 0x8000508b +80000884: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0xa8d5d367 +80000888: 000e2703 lw x14,0(x28) +8000088c: 004e0e13 addi x28,x28,4 + +80000890 : +Zbkb_unzip_cg_cp_rd_b25: + unzip x25, x14 # perform operation +80000890: 08f75c93 unzip x25,x14 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_unzip_cg_cp_rd_b25, Zbkb_unzip_cg_cp_rd_b25_str) +80000894: 0007a203 lw x4,0(x15) +80000898: 01920863 beq x4,x25,800008a8 +8000089c: 7e4012ef jal x5,80002080 +800008a0: 80000890 .word 0x80000890 +800008a4: 800050be .word 0x800050be +800008a8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x84334afc +800008ac: 000e2c03 lw x24,0(x28) +800008b0: 004e0e13 addi x28,x28,4 + +800008b4 : +Zbkb_unzip_cg_cp_rd_b26: + unzip x26, x24 # perform operation +800008b4: 08fc5d13 unzip x26,x24 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zbkb_unzip_cg_cp_rd_b26, Zbkb_unzip_cg_cp_rd_b26_str) +800008b8: 0007a203 lw x4,0(x15) +800008bc: 01a20863 beq x4,x26,800008cc +800008c0: 7c0012ef jal x5,80002080 +800008c4: 800008b4 .word 0x800008b4 +800008c8: 800050f1 .word 0x800050f1 +800008cc: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0x9346c41a +800008d0: 000e2403 lw x8,0(x28) +800008d4: 004e0e13 addi x28,x28,4 + +800008d8 : +Zbkb_unzip_cg_cp_rd_b27: + unzip x27, x8 # perform operation +800008d8: 08f45d93 unzip x27,x8 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_unzip_cg_cp_rd_b27, Zbkb_unzip_cg_cp_rd_b27_str) +800008dc: 0007a203 lw x4,0(x15) +800008e0: 01b20863 beq x4,x27,800008f0 +800008e4: 79c012ef jal x5,80002080 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 80005124 .word 0x80005124 +800008f0: 00478793 addi x15,x15,4 + + mv x2, x28 # switch data pointer register to avoid conflict with test +800008f4: 000e0113 addi x2,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x468f14f4 +800008f8: 00012983 lw x19,0(x2) +800008fc: 00410113 addi x2,x2,4 + +80000900 : +Zbkb_unzip_cg_cp_rd_b28: + unzip x28, x19 # perform operation +80000900: 08f9de13 unzip x28,x19 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zbkb_unzip_cg_cp_rd_b28, Zbkb_unzip_cg_cp_rd_b28_str) +80000904: 0007a203 lw x4,0(x15) +80000908: 01c20863 beq x4,x28,80000918 +8000090c: 774012ef jal x5,80002080 +80000910: 80000900 .word 0x80000900 +80000914: 80005157 .word 0x80005157 +80000918: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xb3ea179b +8000091c: 00012483 lw x9,0(x2) +80000920: 00410113 addi x2,x2,4 + +80000924 : +Zbkb_unzip_cg_cp_rd_b29: + unzip x29, x9 # perform operation +80000924: 08f4de93 unzip x29,x9 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zbkb_unzip_cg_cp_rd_b29, Zbkb_unzip_cg_cp_rd_b29_str) +80000928: 0007a203 lw x4,0(x15) +8000092c: 01d20863 beq x4,x29,8000093c +80000930: 750012ef jal x5,80002080 +80000934: 80000924 .word 0x80000924 +80000938: 8000518a .word 0x8000518a +8000093c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7ff4db3b +80000940: 00012c83 lw x25,0(x2) +80000944: 00410113 addi x2,x2,4 + +80000948 : +Zbkb_unzip_cg_cp_rd_b30: + unzip x30, x25 # perform operation +80000948: 08fcdf13 unzip x30,x25 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_unzip_cg_cp_rd_b30, Zbkb_unzip_cg_cp_rd_b30_str) +8000094c: 0007a203 lw x4,0(x15) +80000950: 01e20863 beq x4,x30,80000960 +80000954: 72c012ef jal x5,80002080 +80000958: 80000948 .word 0x80000948 +8000095c: 800051bd .word 0x800051bd +80000960: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xd6f9c61a +80000964: 00012983 lw x19,0(x2) +80000968: 00410113 addi x2,x2,4 + +8000096c : +Zbkb_unzip_cg_cp_rd_b31: + unzip x31, x19 # perform operation +8000096c: 08f9df93 unzip x31,x19 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_unzip_cg_cp_rd_b31, Zbkb_unzip_cg_cp_rd_b31_str) +80000970: 0007a203 lw x4,0(x15) +80000974: 01f20863 beq x4,x31,80000984 +80000978: 708012ef jal x5,80002080 +8000097c: 8000096c .word 0x8000096c +80000980: 800051f0 .word 0x800051f0 +80000984: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x00000000 +80000988: 00012d03 lw x26,0(x2) +8000098c: 00410113 addi x2,x2,4 + +80000990 : +Zbkb_unzip_cg_cp_rs1_edges_0x0: + unzip x7, x26 # perform operation +80000990: 08fd5393 unzip x7,x26 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zbkb_unzip_cg_cp_rs1_edges_0x0, Zbkb_unzip_cg_cp_rs1_edges_0x0_str) +80000994: 0007a203 lw x4,0(x15) +80000998: 00720863 beq x4,x7,800009a8 +8000099c: 6e4012ef jal x5,80002080 +800009a0: 80000990 .word 0x80000990 +800009a4: 80005223 .word 0x80005223 +800009a8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000001 +800009ac: 00012403 lw x8,0(x2) +800009b0: 00410113 addi x2,x2,4 + +800009b4 : +Zbkb_unzip_cg_cp_rs1_edges_0x1: + unzip x3, x8 # perform operation +800009b4: 08f45193 unzip x3,x8 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_unzip_cg_cp_rs1_edges_0x1, Zbkb_unzip_cg_cp_rs1_edges_0x1_str) +800009b8: 0007a203 lw x4,0(x15) +800009bc: 00320863 beq x4,x3,800009cc +800009c0: 6c0012ef jal x5,80002080 +800009c4: 800009b4 .word 0x800009b4 +800009c8: 8000525d .word 0x8000525d +800009cc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000002 +800009d0: 00012e03 lw x28,0(x2) +800009d4: 00410113 addi x2,x2,4 + +800009d8 : +Zbkb_unzip_cg_cp_rs1_edges_0x2: + unzip x9, x28 # perform operation +800009d8: 08fe5493 unzip x9,x28 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zbkb_unzip_cg_cp_rs1_edges_0x2, Zbkb_unzip_cg_cp_rs1_edges_0x2_str) +800009dc: 0007a203 lw x4,0(x15) +800009e0: 00920863 beq x4,x9,800009f0 +800009e4: 69c012ef jal x5,80002080 +800009e8: 800009d8 .word 0x800009d8 +800009ec: 80005297 .word 0x80005297 +800009f0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x80000000 +800009f4: 00012683 lw x13,0(x2) +800009f8: 00410113 addi x2,x2,4 + +800009fc : +Zbkb_unzip_cg_cp_rs1_edges_0x80000000: + unzip x8, x13 # perform operation +800009fc: 08f6d413 unzip x8,x13 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_unzip_cg_cp_rs1_edges_0x80000000, Zbkb_unzip_cg_cp_rs1_edges_0x80000000_str) +80000a00: 0007a203 lw x4,0(x15) +80000a04: 00820863 beq x4,x8,80000a14 +80000a08: 678012ef jal x5,80002080 +80000a0c: 800009fc .word 0x800009fc +80000a10: 800052d1 .word 0x800052d1 +80000a14: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x80000001 +80000a18: 00012b83 lw x23,0(x2) +80000a1c: 00410113 addi x2,x2,4 + +80000a20 : +Zbkb_unzip_cg_cp_rs1_edges_0x80000001: + unzip x27, x23 # perform operation +80000a20: 08fbdd93 unzip x27,x23 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_unzip_cg_cp_rs1_edges_0x80000001, Zbkb_unzip_cg_cp_rs1_edges_0x80000001_str) +80000a24: 0007a203 lw x4,0(x15) +80000a28: 01b20863 beq x4,x27,80000a38 +80000a2c: 654012ef jal x5,80002080 +80000a30: 80000a20 .word 0x80000a20 +80000a34: 80005312 .word 0x80005312 +80000a38: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x7fffffff +80000a3c: 00012603 lw x12,0(x2) +80000a40: 00410113 addi x2,x2,4 + +80000a44 : +Zbkb_unzip_cg_cp_rs1_edges_0x7fffffff: + unzip x18, x12 # perform operation +80000a44: 08f65913 unzip x18,x12 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zbkb_unzip_cg_cp_rs1_edges_0x7fffffff, Zbkb_unzip_cg_cp_rs1_edges_0x7fffffff_str) +80000a48: 0007a203 lw x4,0(x15) +80000a4c: 01220863 beq x4,x18,80000a5c +80000a50: 630012ef jal x5,80002080 +80000a54: 80000a44 .word 0x80000a44 +80000a58: 80005353 .word 0x80005353 +80000a5c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x7ffffffe +80000a60: 00012d03 lw x26,0(x2) +80000a64: 00410113 addi x2,x2,4 + +80000a68 : +Zbkb_unzip_cg_cp_rs1_edges_0x7ffffffe: + unzip x30, x26 # perform operation +80000a68: 08fd5f13 unzip x30,x26 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_unzip_cg_cp_rs1_edges_0x7ffffffe, Zbkb_unzip_cg_cp_rs1_edges_0x7ffffffe_str) +80000a6c: 0007a203 lw x4,0(x15) +80000a70: 01e20863 beq x4,x30,80000a80 +80000a74: 60c012ef jal x5,80002080 +80000a78: 80000a68 .word 0x80000a68 +80000a7c: 80005394 .word 0x80005394 +80000a80: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xffffffff +80000a84: 00012603 lw x12,0(x2) +80000a88: 00410113 addi x2,x2,4 + +80000a8c : +Zbkb_unzip_cg_cp_rs1_edges_0xffffffff: + unzip x30, x12 # perform operation +80000a8c: 08f65f13 unzip x30,x12 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_unzip_cg_cp_rs1_edges_0xffffffff, Zbkb_unzip_cg_cp_rs1_edges_0xffffffff_str) +80000a90: 0007a203 lw x4,0(x15) +80000a94: 01e20863 beq x4,x30,80000aa4 +80000a98: 5e8012ef jal x5,80002080 +80000a9c: 80000a8c .word 0x80000a8c +80000aa0: 800053d5 .word 0x800053d5 +80000aa4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xfffffffe +80000aa8: 00012e83 lw x29,0(x2) +80000aac: 00410113 addi x2,x2,4 + +80000ab0 : +Zbkb_unzip_cg_cp_rs1_edges_0xfffffffe: + unzip x14, x29 # perform operation +80000ab0: 08fed713 unzip x14,x29 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_unzip_cg_cp_rs1_edges_0xfffffffe, Zbkb_unzip_cg_cp_rs1_edges_0xfffffffe_str) +80000ab4: 0007a203 lw x4,0(x15) +80000ab8: 00e20863 beq x4,x14,80000ac8 +80000abc: 5c4012ef jal x5,80002080 +80000ac0: 80000ab0 .word 0x80000ab0 +80000ac4: 80005416 .word 0x80005416 +80000ac8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x5bbc8872 +80000acc: 00012c03 lw x24,0(x2) +80000ad0: 00410113 addi x2,x2,4 + +80000ad4 : +Zbkb_unzip_cg_cp_rs1_edges_0x5bbc8872: + unzip x19, x24 # perform operation +80000ad4: 08fc5993 unzip x19,x24 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zbkb_unzip_cg_cp_rs1_edges_0x5bbc8872, Zbkb_unzip_cg_cp_rs1_edges_0x5bbc8872_str) +80000ad8: 0007a203 lw x4,0(x15) +80000adc: 01320863 beq x4,x19,80000aec +80000ae0: 5a0012ef jal x5,80002080 +80000ae4: 80000ad4 .word 0x80000ad4 +80000ae8: 80005457 .word 0x80005457 +80000aec: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xaaaaaaaa +80000af0: 00012603 lw x12,0(x2) +80000af4: 00410113 addi x2,x2,4 + +80000af8 : +Zbkb_unzip_cg_cp_rs1_edges_0xaaaaaaaa: + unzip x16, x12 # perform operation +80000af8: 08f65813 unzip x16,x12 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zbkb_unzip_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_unzip_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000afc: 0007a203 lw x4,0(x15) +80000b00: 01020863 beq x4,x16,80000b10 +80000b04: 57c012ef jal x5,80002080 +80000b08: 80000af8 .word 0x80000af8 +80000b0c: 80005498 .word 0x80005498 +80000b10: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x55555555 +80000b14: 00012b03 lw x22,0(x2) +80000b18: 00410113 addi x2,x2,4 + +80000b1c : +Zbkb_unzip_cg_cp_rs1_edges_0x55555555: + unzip x8, x22 # perform operation +80000b1c: 08fb5413 unzip x8,x22 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_unzip_cg_cp_rs1_edges_0x55555555, Zbkb_unzip_cg_cp_rs1_edges_0x55555555_str) +80000b20: 0007a203 lw x4,0(x15) +80000b24: 00820863 beq x4,x8,80000b34 +80000b28: 558012ef jal x5,80002080 +80000b2c: 80000b1c .word 0x80000b1c +80000b30: 800054d9 .word 0x800054d9 +80000b34: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x07a2fcd4 +80000b38: 00012003 lw x0,0(x2) +80000b3c: 00410113 addi x2,x2,4 + +80000b40 : +Zbkb_unzip_cg_cmp_rd_rs1_b0: + unzip x0, x0 # perform operation +80000b40: 08f05013 unzip x0,x0 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_unzip_cg_cmp_rd_rs1_b0, Zbkb_unzip_cg_cmp_rd_rs1_b0_str) +80000b44: 0007a203 lw x4,0(x15) +80000b48: 00020863 beq x4,x0,80000b58 +80000b4c: 534012ef jal x5,80002080 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 8000551a .word 0x8000551a +80000b58: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x3e5990e4 +80000b5c: 00012083 lw x1,0(x2) +80000b60: 00410113 addi x2,x2,4 + +80000b64 : +Zbkb_unzip_cg_cmp_rd_rs1_b1: + unzip x1, x1 # perform operation +80000b64: 08f0d093 unzip x1,x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_unzip_cg_cmp_rd_rs1_b1, Zbkb_unzip_cg_cmp_rd_rs1_b1_str) +80000b68: 0007a203 lw x4,0(x15) +80000b6c: 00120863 beq x4,x1,80000b7c +80000b70: 510012ef jal x5,80002080 +80000b74: 80000b64 .word 0x80000b64 +80000b78: 80005551 .word 0x80005551 +80000b7c: 00478793 addi x15,x15,4 + + mv x30, x2 # switch data pointer register to avoid conflict with test +80000b80: 00010f13 addi x30,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0xe9dc9c19 +80000b84: 000f2103 lw x2,0(x30) +80000b88: 004f0f13 addi x30,x30,4 + +80000b8c : +Zbkb_unzip_cg_cmp_rd_rs1_b2: + unzip x2, x2 # perform operation +80000b8c: 08f15113 unzip x2,x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_unzip_cg_cmp_rd_rs1_b2, Zbkb_unzip_cg_cmp_rd_rs1_b2_str) +80000b90: 0007a203 lw x4,0(x15) +80000b94: 00220863 beq x4,x2,80000ba4 +80000b98: 4e8012ef jal x5,80002080 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80005588 .word 0x80005588 +80000ba4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0xa29446fb +80000ba8: 000f2183 lw x3,0(x30) +80000bac: 004f0f13 addi x30,x30,4 + +80000bb0 : +Zbkb_unzip_cg_cmp_rd_rs1_b3: + unzip x3, x3 # perform operation +80000bb0: 08f1d193 unzip x3,x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_unzip_cg_cmp_rd_rs1_b3, Zbkb_unzip_cg_cmp_rd_rs1_b3_str) +80000bb4: 0007a203 lw x4,0(x15) +80000bb8: 00320863 beq x4,x3,80000bc8 +80000bbc: 4c4012ef jal x5,80002080 +80000bc0: 80000bb0 .word 0x80000bb0 +80000bc4: 800055bf .word 0x800055bf +80000bc8: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000bcc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000bd0: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0xa695f9c4 +80000bd4: 000f2203 lw x4,0(x30) +80000bd8: 004f0f13 addi x30,x30,4 + +80000bdc : +Zbkb_unzip_cg_cmp_rd_rs1_b4: + unzip x4, x4 # perform operation +80000bdc: 08f25213 unzip x4,x4 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_unzip_cg_cmp_rd_rs1_b4, Zbkb_unzip_cg_cmp_rd_rs1_b4_str) +80000be0: 0007a383 lw x7,0(x15) +80000be4: 00438863 beq x7,x4,80000bf4 +80000be8: 4b00146f jal x8,80002098 +80000bec: 80000bdc .word 0x80000bdc +80000bf0: 800055f6 .word 0x800055f6 +80000bf4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x857d866f +80000bf8: 000f2283 lw x5,0(x30) +80000bfc: 004f0f13 addi x30,x30,4 + +80000c00 : +Zbkb_unzip_cg_cmp_rd_rs1_b5: + unzip x5, x5 # perform operation +80000c00: 08f2d293 unzip x5,x5 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_unzip_cg_cmp_rd_rs1_b5, Zbkb_unzip_cg_cmp_rd_rs1_b5_str) +80000c04: 0007a383 lw x7,0(x15) +80000c08: 00538863 beq x7,x5,80000c18 +80000c0c: 48c0146f jal x8,80002098 +80000c10: 80000c00 .word 0x80000c00 +80000c14: 8000562d .word 0x8000562d +80000c18: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x67d56521 +80000c1c: 000f2303 lw x6,0(x30) +80000c20: 004f0f13 addi x30,x30,4 + +80000c24 : +Zbkb_unzip_cg_cmp_rd_rs1_b6: + unzip x6, x6 # perform operation +80000c24: 08f35313 unzip x6,x6 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_unzip_cg_cmp_rd_rs1_b6, Zbkb_unzip_cg_cmp_rd_rs1_b6_str) +80000c28: 0007a383 lw x7,0(x15) +80000c2c: 00638863 beq x7,x6,80000c3c +80000c30: 4680146f jal x8,80002098 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80005664 .word 0x80005664 +80000c3c: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000c40: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000c44: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0xee0c58d8 +80000c48: 000f2383 lw x7,0(x30) +80000c4c: 004f0f13 addi x30,x30,4 + +80000c50 : +Zbkb_unzip_cg_cmp_rd_rs1_b7: + unzip x7, x7 # perform operation +80000c50: 08f3d393 unzip x7,x7 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_unzip_cg_cmp_rd_rs1_b7, Zbkb_unzip_cg_cmp_rd_rs1_b7_str) +80000c54: 0007a683 lw x13,0(x15) +80000c58: 00768863 beq x13,x7,80000c68 +80000c5c: 4640176f jal x14,800020c0 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 8000569b .word 0x8000569b +80000c68: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0xf4958ca3 +80000c6c: 000f2403 lw x8,0(x30) +80000c70: 004f0f13 addi x30,x30,4 + +80000c74 : +Zbkb_unzip_cg_cmp_rd_rs1_b8: + unzip x8, x8 # perform operation +80000c74: 08f45413 unzip x8,x8 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_unzip_cg_cmp_rd_rs1_b8, Zbkb_unzip_cg_cmp_rd_rs1_b8_str) +80000c78: 0007a683 lw x13,0(x15) +80000c7c: 00868863 beq x13,x8,80000c8c +80000c80: 4400176f jal x14,800020c0 +80000c84: 80000c74 .word 0x80000c74 +80000c88: 800056d2 .word 0x800056d2 +80000c8c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x00c0c38a +80000c90: 000f2483 lw x9,0(x30) +80000c94: 004f0f13 addi x30,x30,4 + +80000c98 : +Zbkb_unzip_cg_cmp_rd_rs1_b9: + unzip x9, x9 # perform operation +80000c98: 08f4d493 unzip x9,x9 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_unzip_cg_cmp_rd_rs1_b9, Zbkb_unzip_cg_cmp_rd_rs1_b9_str) +80000c9c: 0007a683 lw x13,0(x15) +80000ca0: 00968863 beq x13,x9,80000cb0 +80000ca4: 41c0176f jal x14,800020c0 +80000ca8: 80000c98 .word 0x80000c98 +80000cac: 80005709 .word 0x80005709 +80000cb0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x823a2c8d +80000cb4: 000f2503 lw x10,0(x30) +80000cb8: 004f0f13 addi x30,x30,4 + +80000cbc : +Zbkb_unzip_cg_cmp_rd_rs1_b10: + unzip x10, x10 # perform operation +80000cbc: 08f55513 unzip x10,x10 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_unzip_cg_cmp_rd_rs1_b10, Zbkb_unzip_cg_cmp_rd_rs1_b10_str) +80000cc0: 0007a683 lw x13,0(x15) +80000cc4: 00a68863 beq x13,x10,80000cd4 +80000cc8: 3f80176f jal x14,800020c0 +80000ccc: 80000cbc .word 0x80000cbc +80000cd0: 80005740 .word 0x80005740 +80000cd4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x38f860bb +80000cd8: 000f2583 lw x11,0(x30) +80000cdc: 004f0f13 addi x30,x30,4 + +80000ce0 : +Zbkb_unzip_cg_cmp_rd_rs1_b11: + unzip x11, x11 # perform operation +80000ce0: 08f5d593 unzip x11,x11 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_unzip_cg_cmp_rd_rs1_b11, Zbkb_unzip_cg_cmp_rd_rs1_b11_str) +80000ce4: 0007a683 lw x13,0(x15) +80000ce8: 00b68863 beq x13,x11,80000cf8 +80000cec: 3d40176f jal x14,800020c0 +80000cf0: 80000ce0 .word 0x80000ce0 +80000cf4: 80005778 .word 0x80005778 +80000cf8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xe5f44e7a +80000cfc: 000f2603 lw x12,0(x30) +80000d00: 004f0f13 addi x30,x30,4 + +80000d04 : +Zbkb_unzip_cg_cmp_rd_rs1_b12: + unzip x12, x12 # perform operation +80000d04: 08f65613 unzip x12,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_unzip_cg_cmp_rd_rs1_b12, Zbkb_unzip_cg_cmp_rd_rs1_b12_str) +80000d08: 0007a683 lw x13,0(x15) +80000d0c: 00c68863 beq x13,x12,80000d1c +80000d10: 3b00176f jal x14,800020c0 +80000d14: 80000d04 .word 0x80000d04 +80000d18: 800057b0 .word 0x800057b0 +80000d1c: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d20: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d24: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xd23a6f51 +80000d28: 000f2683 lw x13,0(x30) +80000d2c: 004f0f13 addi x30,x30,4 + +80000d30 : +Zbkb_unzip_cg_cmp_rd_rs1_b13: + unzip x13, x13 # perform operation +80000d30: 08f6d693 unzip x13,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_unzip_cg_cmp_rd_rs1_b13, Zbkb_unzip_cg_cmp_rd_rs1_b13_str) +80000d34: 0007a383 lw x7,0(x15) +80000d38: 00d38863 beq x7,x13,80000d48 +80000d3c: 35c0146f jal x8,80002098 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 800057e8 .word 0x800057e8 +80000d48: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0xc79caefa +80000d4c: 000f2703 lw x14,0(x30) +80000d50: 004f0f13 addi x30,x30,4 + +80000d54 : +Zbkb_unzip_cg_cmp_rd_rs1_b14: + unzip x14, x14 # perform operation +80000d54: 08f75713 unzip x14,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_unzip_cg_cmp_rd_rs1_b14, Zbkb_unzip_cg_cmp_rd_rs1_b14_str) +80000d58: 0007a383 lw x7,0(x15) +80000d5c: 00e38863 beq x7,x14,80000d6c +80000d60: 3380146f jal x8,80002098 +80000d64: 80000d54 .word 0x80000d54 +80000d68: 80005820 .word 0x80005820 +80000d6c: 00478793 addi x15,x15,4 + + mv x31, x15 # switch signature pointer register to avoid conflict with test +80000d70: 00078f93 addi x31,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0xb05690e8 +80000d74: 000f2783 lw x15,0(x30) +80000d78: 004f0f13 addi x30,x30,4 + +80000d7c : +Zbkb_unzip_cg_cmp_rd_rs1_b15: + unzip x15, x15 # perform operation +80000d7c: 08f7d793 unzip x15,x15 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkb_unzip_cg_cmp_rd_rs1_b15, Zbkb_unzip_cg_cmp_rd_rs1_b15_str) +80000d80: 000fa383 lw x7,0(x31) +80000d84: 00f38863 beq x7,x15,80000d94 +80000d88: 3100146f jal x8,80002098 +80000d8c: 80000d7c .word 0x80000d7c +80000d90: 80005858 .word 0x80005858 +80000d94: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xd35cdf82 +80000d98: 000f2803 lw x16,0(x30) +80000d9c: 004f0f13 addi x30,x30,4 + +80000da0 : +Zbkb_unzip_cg_cmp_rd_rs1_b16: + unzip x16, x16 # perform operation +80000da0: 08f85813 unzip x16,x16 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zbkb_unzip_cg_cmp_rd_rs1_b16, Zbkb_unzip_cg_cmp_rd_rs1_b16_str) +80000da4: 000fa383 lw x7,0(x31) +80000da8: 01038863 beq x7,x16,80000db8 +80000dac: 2ec0146f jal x8,80002098 +80000db0: 80000da0 .word 0x80000da0 +80000db4: 80005890 .word 0x80005890 +80000db8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xc64bbdba +80000dbc: 000f2883 lw x17,0(x30) +80000dc0: 004f0f13 addi x30,x30,4 + +80000dc4 : +Zbkb_unzip_cg_cmp_rd_rs1_b17: + unzip x17, x17 # perform operation +80000dc4: 08f8d893 unzip x17,x17 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkb_unzip_cg_cmp_rd_rs1_b17, Zbkb_unzip_cg_cmp_rd_rs1_b17_str) +80000dc8: 000fa383 lw x7,0(x31) +80000dcc: 01138863 beq x7,x17,80000ddc +80000dd0: 2c80146f jal x8,80002098 +80000dd4: 80000dc4 .word 0x80000dc4 +80000dd8: 800058c8 .word 0x800058c8 +80000ddc: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x3ff9494e +80000de0: 000f2903 lw x18,0(x30) +80000de4: 004f0f13 addi x30,x30,4 + +80000de8 : +Zbkb_unzip_cg_cmp_rd_rs1_b18: + unzip x18, x18 # perform operation +80000de8: 08f95913 unzip x18,x18 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkb_unzip_cg_cmp_rd_rs1_b18, Zbkb_unzip_cg_cmp_rd_rs1_b18_str) +80000dec: 000fa383 lw x7,0(x31) +80000df0: 01238863 beq x7,x18,80000e00 +80000df4: 2a40146f jal x8,80002098 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 80005900 .word 0x80005900 +80000e00: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xf2c9e5ae +80000e04: 000f2983 lw x19,0(x30) +80000e08: 004f0f13 addi x30,x30,4 + +80000e0c : +Zbkb_unzip_cg_cmp_rd_rs1_b19: + unzip x19, x19 # perform operation +80000e0c: 08f9d993 unzip x19,x19 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkb_unzip_cg_cmp_rd_rs1_b19, Zbkb_unzip_cg_cmp_rd_rs1_b19_str) +80000e10: 000fa383 lw x7,0(x31) +80000e14: 01338863 beq x7,x19,80000e24 +80000e18: 2800146f jal x8,80002098 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 80005938 .word 0x80005938 +80000e24: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x708e5a6f +80000e28: 000f2a03 lw x20,0(x30) +80000e2c: 004f0f13 addi x30,x30,4 + +80000e30 : +Zbkb_unzip_cg_cmp_rd_rs1_b20: + unzip x20, x20 # perform operation +80000e30: 08fa5a13 unzip x20,x20 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_unzip_cg_cmp_rd_rs1_b20, Zbkb_unzip_cg_cmp_rd_rs1_b20_str) +80000e34: 000fa383 lw x7,0(x31) +80000e38: 01438863 beq x7,x20,80000e48 +80000e3c: 25c0146f jal x8,80002098 +80000e40: 80000e30 .word 0x80000e30 +80000e44: 80005970 .word 0x80005970 +80000e48: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x2cdd1af8 +80000e4c: 000f2a83 lw x21,0(x30) +80000e50: 004f0f13 addi x30,x30,4 + +80000e54 : +Zbkb_unzip_cg_cmp_rd_rs1_b21: + unzip x21, x21 # perform operation +80000e54: 08fada93 unzip x21,x21 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkb_unzip_cg_cmp_rd_rs1_b21, Zbkb_unzip_cg_cmp_rd_rs1_b21_str) +80000e58: 000fa383 lw x7,0(x31) +80000e5c: 01538863 beq x7,x21,80000e6c +80000e60: 2380146f jal x8,80002098 +80000e64: 80000e54 .word 0x80000e54 +80000e68: 800059a8 .word 0x800059a8 +80000e6c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xeb1f3d4c +80000e70: 000f2b03 lw x22,0(x30) +80000e74: 004f0f13 addi x30,x30,4 + +80000e78 : +Zbkb_unzip_cg_cmp_rd_rs1_b22: + unzip x22, x22 # perform operation +80000e78: 08fb5b13 unzip x22,x22 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkb_unzip_cg_cmp_rd_rs1_b22, Zbkb_unzip_cg_cmp_rd_rs1_b22_str) +80000e7c: 000fa383 lw x7,0(x31) +80000e80: 01638863 beq x7,x22,80000e90 +80000e84: 2140146f jal x8,80002098 +80000e88: 80000e78 .word 0x80000e78 +80000e8c: 800059e0 .word 0x800059e0 +80000e90: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x8d6509d5 +80000e94: 000f2b83 lw x23,0(x30) +80000e98: 004f0f13 addi x30,x30,4 + +80000e9c : +Zbkb_unzip_cg_cmp_rd_rs1_b23: + unzip x23, x23 # perform operation +80000e9c: 08fbdb93 unzip x23,x23 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkb_unzip_cg_cmp_rd_rs1_b23, Zbkb_unzip_cg_cmp_rd_rs1_b23_str) +80000ea0: 000fa383 lw x7,0(x31) +80000ea4: 01738863 beq x7,x23,80000eb4 +80000ea8: 1f00146f jal x8,80002098 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 80005a18 .word 0x80005a18 +80000eb4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x3cc5a3c3 +80000eb8: 000f2c03 lw x24,0(x30) +80000ebc: 004f0f13 addi x30,x30,4 + +80000ec0 : +Zbkb_unzip_cg_cmp_rd_rs1_b24: + unzip x24, x24 # perform operation +80000ec0: 08fc5c13 unzip x24,x24 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_unzip_cg_cmp_rd_rs1_b24, Zbkb_unzip_cg_cmp_rd_rs1_b24_str) +80000ec4: 000fa383 lw x7,0(x31) +80000ec8: 01838863 beq x7,x24,80000ed8 +80000ecc: 1cc0146f jal x8,80002098 +80000ed0: 80000ec0 .word 0x80000ec0 +80000ed4: 80005a51 .word 0x80005a51 +80000ed8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x171d4ba2 +80000edc: 000f2c83 lw x25,0(x30) +80000ee0: 004f0f13 addi x30,x30,4 + +80000ee4 : +Zbkb_unzip_cg_cmp_rd_rs1_b25: + unzip x25, x25 # perform operation +80000ee4: 08fcdc93 unzip x25,x25 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkb_unzip_cg_cmp_rd_rs1_b25, Zbkb_unzip_cg_cmp_rd_rs1_b25_str) +80000ee8: 000fa383 lw x7,0(x31) +80000eec: 01938863 beq x7,x25,80000efc +80000ef0: 1a80146f jal x8,80002098 +80000ef4: 80000ee4 .word 0x80000ee4 +80000ef8: 80005a8a .word 0x80005a8a +80000efc: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x7df9c1b6 +80000f00: 000f2d03 lw x26,0(x30) +80000f04: 004f0f13 addi x30,x30,4 + +80000f08 : +Zbkb_unzip_cg_cmp_rd_rs1_b26: + unzip x26, x26 # perform operation +80000f08: 08fd5d13 unzip x26,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkb_unzip_cg_cmp_rd_rs1_b26, Zbkb_unzip_cg_cmp_rd_rs1_b26_str) +80000f0c: 000fa383 lw x7,0(x31) +80000f10: 01a38863 beq x7,x26,80000f20 +80000f14: 1840146f jal x8,80002098 +80000f18: 80000f08 .word 0x80000f08 +80000f1c: 80005ac3 .word 0x80005ac3 +80000f20: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x74dd9379 +80000f24: 000f2d83 lw x27,0(x30) +80000f28: 004f0f13 addi x30,x30,4 + +80000f2c : +Zbkb_unzip_cg_cmp_rd_rs1_b27: + unzip x27, x27 # perform operation +80000f2c: 08fddd93 unzip x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_unzip_cg_cmp_rd_rs1_b27, Zbkb_unzip_cg_cmp_rd_rs1_b27_str) +80000f30: 000fa383 lw x7,0(x31) +80000f34: 01b38863 beq x7,x27,80000f44 +80000f38: 1600146f jal x8,80002098 +80000f3c: 80000f2c .word 0x80000f2c +80000f40: 80005afc .word 0x80005afc +80000f44: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x87b833c2 +80000f48: 000f2e03 lw x28,0(x30) +80000f4c: 004f0f13 addi x30,x30,4 + +80000f50 : +Zbkb_unzip_cg_cmp_rd_rs1_b28: + unzip x28, x28 # perform operation +80000f50: 08fe5e13 unzip x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_unzip_cg_cmp_rd_rs1_b28, Zbkb_unzip_cg_cmp_rd_rs1_b28_str) +80000f54: 000fa383 lw x7,0(x31) +80000f58: 01c38863 beq x7,x28,80000f68 +80000f5c: 13c0146f jal x8,80002098 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 80005b35 .word 0x80005b35 +80000f68: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x14917037 +80000f6c: 000f2e83 lw x29,0(x30) +80000f70: 004f0f13 addi x30,x30,4 + +80000f74 : +Zbkb_unzip_cg_cmp_rd_rs1_b29: + unzip x29, x29 # perform operation +80000f74: 08fede93 unzip x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkb_unzip_cg_cmp_rd_rs1_b29, Zbkb_unzip_cg_cmp_rd_rs1_b29_str) +80000f78: 000fa383 lw x7,0(x31) +80000f7c: 01d38863 beq x7,x29,80000f8c +80000f80: 1180146f jal x8,80002098 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 80005b6e .word 0x80005b6e +80000f8c: 004f8f93 addi x31,x31,4 + + mv x25, x30 # switch data pointer register to avoid conflict with test +80000f90: 000f0c93 addi x25,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x0a2140f1 +80000f94: 000caf03 lw x30,0(x25) +80000f98: 004c8c93 addi x25,x25,4 + +80000f9c : +Zbkb_unzip_cg_cmp_rd_rs1_b30: + unzip x30, x30 # perform operation +80000f9c: 08ff5f13 unzip x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkb_unzip_cg_cmp_rd_rs1_b30, Zbkb_unzip_cg_cmp_rd_rs1_b30_str) +80000fa0: 000fa383 lw x7,0(x31) +80000fa4: 01e38863 beq x7,x30,80000fb4 +80000fa8: 0f00146f jal x8,80002098 +80000fac: 80000f9c .word 0x80000f9c +80000fb0: 80005ba7 .word 0x80005ba7 +80000fb4: 004f8f93 addi x31,x31,4 + + mv x10, x31 # switch signature pointer register to avoid conflict with test +80000fb8: 000f8513 addi x10,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x4d8d1851 +80000fbc: 000caf83 lw x31,0(x25) +80000fc0: 004c8c93 addi x25,x25,4 + +80000fc4 : +Zbkb_unzip_cg_cmp_rd_rs1_b31: + unzip x31, x31 # perform operation +80000fc4: 08ffdf93 unzip x31,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zbkb_unzip_cg_cmp_rd_rs1_b31, Zbkb_unzip_cg_cmp_rd_rs1_b31_str) +80000fc8: 00052383 lw x7,0(x10) +80000fcc: 01f38863 beq x7,x31,80000fdc +80000fd0: 0c80146f jal x8,80002098 +80000fd4: 80000fc4 .word 0x80000fc4 +80000fd8: 80005be0 .word 0x80005be0 +80000fdc: 00450513 addi x10,x10,4 + + mv x2, x10 # restore signature pointer to default register for teardown +80000fe0: 00050113 addi x2,x10,0 + +80000fe4 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fe4: 00000513 addi x10,x0,0 +80000fe8: 00000073 ecall +80000fec: fff00513 addi x10,x0,-1 +80000ff0: 1d800413 addi x8,x0,472 + +80000ff4 : +80000ff4: 34002373 csrrs x6,mscratch,x0 + +80000ff8 : +80000ff8: 23832383 lw x7,568(x6) +80000ffc: 23c32483 lw x9,572(x6) + +80001000 : +80001000: 22032383 lw x7,544(x6) + +80001004 : +80001004: 25032483 lw x9,592(x6) +80001008: 34049073 csrrw x0,mscratch,x9 + +8000100c : +8000100c: 24832483 lw x9,584(x6) +80001010: 305493f3 csrrw x7,mtvec,x9 +80001014: ffc4f493 andi x9,x9,-4 +80001018: ffc3f393 andi x7,x7,-4 +8000101c: 00749e63 bne x9,x7,80001038 + +80001020 : +80001020: 00030493 addi x9,x6,0 + +80001024 : +80001024: 0004a783 lw x15,0(x9) +80001028: 00f3a023 sw x15,0(x7) +8000102c: 00438393 addi x7,x7,4 +80001030: 00448493 addi x9,x9,4 +80001034: fe83c8e3 blt x7,x8,80001024 +80001038: 0000100f fence.i + +8000103c : +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 21f50513 addi x10,x10,543 # 8000629f +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 21950513 addi x10,x10,537 # 800062d9 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 23950513 addi x10,x10,569 # 80006339 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: da450513 addi x10,x10,-604 # 80006ee4 +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: 98838393 addi x7,x7,-1656 # 80007b48 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: 94040413 addi x8,x8,-1728 # 80007b40 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 8000648d .word 0x8000648d + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 800062fb .word 0x800062fb +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 00450513 addi x10,x10,4 # 80006264 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: fff50513 addi x10,x10,-1 # 8000629f +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: ce5ff06f jal x0,80000fe4 + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cd9ff06f jal x0,80000fe4 +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b5c30313 addi x6,x6,-1188 # 8000103c +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 25b50513 addi x10,x10,603 # 8000791b +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00004517 auipc x10,0x4 +80001704: 68850513 addi x10,x10,1672 # 80005d88 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: c6250513 addi x10,x10,-926 # 800063a2 +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: b1f50513 addi x10,x10,-1249 # 8000629f +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 20848493 addi x9,x9,520 # 80005d68 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: a0c40413 addi x8,x8,-1524 # 800165ac +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800064a4 .word 0x800064a4 +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800065a6 .word 0x800065a6 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800066a1 .word 0x800066a1 +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 80006794 .word 0x80006794 +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006907 .word 0x80006907 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: ba020213 addi x4,x4,-1120 # 80005c20 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: b8838393 addi x7,x7,-1144 # 80005c20 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: b6068693 addi x13,x13,-1184 # 80005c20 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: b3848493 addi x9,x9,-1224 # 80005c20 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: a944a483 lw x9,-1388(x9) # 80005c20 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00005417 auipc x8,0x5 +80002244: 72040413 addi x8,x8,1824 # 80007960 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 33040413 addi x8,x8,816 # 800165b0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: a8848493 addi x9,x9,-1400 # 80005d48 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: a4848493 addi x9,x9,-1464 # 80005d48 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: a2880813 addi x16,x16,-1496 # 80005d58 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: a1480813 addi x16,x16,-1516 # 80005d58 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 13d38393 addi x7,x7,317 # 8000648d +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: 9f080813 addi x16,x16,-1552 # 80005d50 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 13838393 addi x7,x7,312 # 800064a4 +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 22238393 addi x7,x7,546 # 800065a6 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 30538393 addi x7,x7,773 # 800066a1 +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 3e038393 addi x7,x7,992 # 80006794 +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 53b38393 addi x7,x7,1339 # 80006907 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 4a738393 addi x7,x7,1191 # 8000688b +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 4cd38393 addi x7,x7,1229 # 800068c9 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 0d038393 addi x7,x7,208 # 800064e4 +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 1b838393 addi x7,x7,440 # 800065e4 +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 29938393 addi x7,x7,665 # 800066dd +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 37538393 addi x7,x7,885 # 800067d1 +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 4ce38393 addi x7,x7,1230 # 80006942 +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 09838393 addi x7,x7,152 # 80006524 +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 17e38393 addi x7,x7,382 # 80006622 +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 25d38393 addi x7,x7,605 # 80006719 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 33a38393 addi x7,x7,826 # 8000680e +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 49138393 addi x7,x7,1169 # 8000697d +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 06138393 addi x7,x7,97 # 80006565 +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 14538393 addi x7,x7,325 # 80006661 +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 22238393 addi x7,x7,546 # 80006756 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 30038393 addi x7,x7,768 # 8000684c +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 45538393 addi x7,x7,1109 # 800069b9 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 47a38393 addi x7,x7,1146 # 800069f6 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 4b138393 addi x7,x7,1201 # 80006a45 +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 59438393 addi x7,x7,1428 # 80006b40 +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00004397 auipc x7,0x4 +800025c8: 67838393 addi x7,x7,1656 # 80006c3c +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00003817 auipc x16,0x3 +800025e8: 76c80813 addi x16,x16,1900 # 80005d50 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00003817 auipc x16,0x3 +800025f8: 75c80813 addi x16,x16,1884 # 80005d50 +800025fc: 00882023 sw x8,0(x16) +80002600: 00003817 auipc x16,0x3 +80002604: 75480813 addi x16,x16,1876 # 80005d54 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00003817 auipc x16,0x3 +80002614: 74080813 addi x16,x16,1856 # 80005d50 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: c3f50513 addi x10,x10,-961 # 8000629f +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: c3950513 addi x10,x10,-967 # 800062d9 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: cb050513 addi x10,x10,-848 # 80006390 +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00003517 auipc x10,0x3 +8000270c: 63852503 lw x10,1592(x10) # 80005d40 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: c8250513 addi x10,x10,-894 # 800063a2 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 4d852503 lw x10,1240(x10) # 80005c20 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: c4450513 addi x10,x10,-956 # 800063a4 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 59852503 lw x10,1432(x10) # 80005d20 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 5c850513 addi x10,x10,1480 # 80005d88 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: bb850513 addi x10,x10,-1096 # 800063b8 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 50052503 lw x10,1280(x10) # 80005d28 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 54850513 addi x10,x10,1352 # 80005d88 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 56f50513 addi x10,x10,1391 # 80006def +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 37852503 lw x10,888(x10) # 80005c20 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 4c860613 addi x12,x12,1224 # 80005d88 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 43c52503 lw x10,1084(x10) # 80005d24 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00004517 auipc x10,0x4 +80002924: 5e550513 addi x10,x10,1509 # 80006f05 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 42860613 addi x12,x12,1064 # 80005d88 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 39c52503 lw x10,924(x10) # 80005d24 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 3e860613 addi x12,x12,1000 # 80005d88 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 35c52503 lw x10,860(x10) # 80005d24 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 40850513 addi x10,x10,1032 # 80006de8 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 36850513 addi x10,x10,872 # 80005d88 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 3a050513 addi x10,x10,928 # 80006e00 +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 19852503 lw x10,408(x10) # 80005c20 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 29852503 lw x10,664(x10) # 80005d30 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 28452503 lw x10,644(x10) # 80005d30 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 2c850513 addi x10,x10,712 # 80005d88 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 26052503 lw x10,608(x10) # 80005d48 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 31750513 addi x10,x10,791 # 80006e17 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 0f852503 lw x10,248(x10) # 80005c20 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 20052503 lw x10,512(x10) # 80005d38 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 1ec52503 lw x10,492(x10) # 80005d38 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 22850513 addi x10,x10,552 # 80005d88 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 28e50513 addi x10,x10,654 # 80006e2e +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 17052503 lw x10,368(x10) # 80005d38 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 1a850513 addi x10,x10,424 # 80005d88 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 26c50513 addi x10,x10,620 # 80006e8c +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 0f052503 lw x10,240(x10) # 80005d38 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 12850513 addi x10,x10,296 # 80005d88 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 0c442403 lw x8,196(x8) # 80005d50 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 29150513 addi x10,x10,657 # 80006f31 +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 27d50513 addi x10,x10,637 # 80006f5d +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 05080813 addi x16,x16,80 # 80005d58 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00003517 auipc x10,0x3 +80002d24: 68250513 addi x10,x10,1666 # 800063a2 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 20d50513 addi x10,x10,525 # 80006f6d +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: fb052503 lw x10,-80(x10) # 80005d38 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: fe850513 addi x10,x10,-24 # 80005d88 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 1b850513 addi x10,x10,440 # 80006f98 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: f2852503 lw x10,-216(x10) # 80005d30 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: f6850513 addi x10,x10,-152 # 80005d88 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: ee832303 lw x6,-280(x6) # 80005d30 +80002e50: 00003397 auipc x7,0x3 +80002e54: ee83a383 lw x7,-280(x7) # 80005d38 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 16750513 addi x10,x10,359 # 80006fc7 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 18f50513 addi x10,x10,399 # 8000702f +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: e6832303 lw x6,-408(x6) # 80005d30 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: e683a383 lw x7,-408(x7) # 80005d38 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: e8850513 addi x10,x10,-376 # 80005d88 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 11650513 addi x10,x10,278 # 80007056 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 07350513 addi x10,x10,115 # 80006ff3 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 06f50513 addi x10,x10,111 # 8000702f +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: d5032303 lw x6,-688(x6) # 80005d38 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: d403a383 lw x7,-704(x7) # 80005d30 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: d6850513 addi x10,x10,-664 # 80005d88 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 0de50513 addi x10,x10,222 # 8000713e +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 18550513 addi x10,x10,389 # 80007225 +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: c8c52503 lw x10,-884(x10) # 80005d54 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 16150513 addi x10,x10,353 # 80007261 +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 0ff50513 addi x10,x10,255 # 8000723f +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 0c750513 addi x10,x10,199 # 80007247 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 08f50513 addi x10,x10,143 # 8000724f +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 05850513 addi x10,x10,88 # 80007258 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 02a50513 addi x10,x10,42 # 8000726a +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: ae852503 lw x10,-1304(x10) # 80005d50 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 10150513 addi x10,x10,257 # 800073c1 +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: f8450513 addi x10,x10,-124 # 80007284 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: f7550513 addi x10,x10,-139 # 800072b5 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: f5550513 addi x10,x10,-171 # 800072d5 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: f3350513 addi x10,x10,-205 # 800072f3 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: f1250513 addi x10,x10,-238 # 80007312 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: efa50513 addi x10,x10,-262 # 8000733a +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: ee650513 addi x10,x10,-282 # 80007366 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: ed250513 addi x10,x10,-302 # 80007392 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: ed050513 addi x10,x10,-304 # 800073d0 +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: 81052503 lw x10,-2032(x10) # 80005d38 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: 84850513 addi x10,x10,-1976 # 80005d88 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: e6750513 addi x10,x10,-409 # 800073e7 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 78852503 lw x10,1928(x10) # 80005d30 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00002517 auipc x10,0x2 +800035c4: 7c850513 addi x10,x10,1992 # 80005d88 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 76852503 lw x10,1896(x10) # 80005d50 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: dfe50513 addi x10,x10,-514 # 800073fe +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 71052503 lw x10,1808(x10) # 80005d38 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: dd550513 addi x10,x10,-555 # 80007415 +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00002517 auipc x10,0x2 +8000366c: 6c852503 lw x10,1736(x10) # 80005d30 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00002517 auipc x10,0x2 +80003688: 6cc52503 lw x10,1740(x10) # 80005d50 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: deb50513 addi x10,x10,-533 # 8000748b +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: e8150513 addi x10,x10,-383 # 80007561 +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: f3450513 addi x10,x10,-204 # 80007654 +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: fef50513 addi x10,x10,-17 # 8000774f +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 09650513 addi x10,x10,150 # 80007836 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: c6350513 addi x10,x10,-925 # 80007443 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 56062603 lw x12,1376(x12) # 80005d68 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: c0c50513 addi x10,x10,-1012 # 8000642c +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 50850513 addi x10,x10,1288 # 80005d88 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 4f058593 addi x11,x11,1264 # 80005db0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 52458593 addi x11,x11,1316 # 80005e10 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 92e50513 addi x10,x10,-1746 # 8000624e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 58450513 addi x10,x10,1412 # 80006ee4 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 3d060613 addi x12,x12,976 # 80005d60 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: aad50513 addi x10,x10,-1363 # 8000644d +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 3a052503 lw x10,928(x10) # 80005d68 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 3a850513 addi x10,x10,936 # 80005d88 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: a3d50513 addi x10,x10,-1475 # 8000645d +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 32852503 lw x10,808(x10) # 80005d70 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 32850513 addi x10,x10,808 # 80005d88 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: 9cd50513 addi x10,x10,-1587 # 8000646d +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 2b052503 lw x10,688(x10) # 80005d78 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 2a850513 addi x10,x10,680 # 80005d88 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: 95d50513 addi x10,x10,-1699 # 8000647d +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 23852503 lw x10,568(x10) # 80005d80 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 22850513 addi x10,x10,552 # 80005d88 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 1d860613 addi x12,x12,472 # 80005d60 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 1e860613 addi x12,x12,488 # 80005d88 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f4830313 addi x6,x6,-184 # 80000fe4 +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f3030313 addi x6,x6,-208 # 80000fe4 +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f1830313 addi x6,x6,-232 # 80000fe4 +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: db478793 addi x15,x15,-588 # 80000ff4 +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 4c010113 addi x2,x2,1216 # 80007960 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006f0d .word 0x80006f0d +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 05828293 addi x5,x5,88 # 80016600 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 03828293 addi x5,x5,56 # 80016600 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-xnor-00.elf.objdump b/riscv-tests/rv32-Zbkb-xnor-00.elf.objdump new file mode 100644 index 0000000..1625929 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-xnor-00.elf.objdump @@ -0,0 +1,13217 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-xnor-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-xnor-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007140 memsz 0x00007140 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00007100 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000186b0 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020700 80020700 00021700 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002694 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 00000000 00000000 00024d0f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d89 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024dac 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024dc0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 00000000 00000000 00024de8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e70 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020700 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccVL1GW7.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b0 +80005540 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b1 +80009021 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b2 +80009052 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b3 +80009083 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b4 +80005558 l .text.rvtest 00000000 failedtest_x8_x7 +800090b4 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b5 +800090e5 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b6 +80009116 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b7 +80009147 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b8 +80009178 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b9 +800091a9 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b10 +800091db l .data 00000000 Zbkb_xnor_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b11 +8000920e l .data 00000000 Zbkb_xnor_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b12 +80009241 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b13 +80009274 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b14 +800092a7 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b15 +800092da l .data 00000000 Zbkb_xnor_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b16 +8000930d l .data 00000000 Zbkb_xnor_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b17 +80009340 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b18 +80009373 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b18_str +800003b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b19 +800093a6 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b19_str +800003e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b20 +800093d9 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b21 +8000940c l .data 00000000 Zbkb_xnor_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b22 +8000943f l .data 00000000 Zbkb_xnor_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b23 +80009472 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b24 +800094a5 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b24_str +800004c0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b25 +800094d8 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b26 +8000950b l .data 00000000 Zbkb_xnor_cg_cp_rs1_b26_str +8000051c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b27 +8000953e l .data 00000000 Zbkb_xnor_cg_cp_rs1_b27_str +80000548 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b28 +80009571 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b28_str +80000574 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b29 +800095a4 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b29_str +800005a0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b30 +800095d7 l .data 00000000 Zbkb_xnor_cg_cp_rs1_b30_str +800005cc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_b31 +8000960a l .data 00000000 Zbkb_xnor_cg_cp_rs1_b31_str +800005f8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b0 +8000963d l .data 00000000 Zbkb_xnor_cg_cp_rs2_b0_str +80000624 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b1 +8000966f l .data 00000000 Zbkb_xnor_cg_cp_rs2_b1_str +80000650 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b2 +800096a1 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b2_str +8000067c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b3 +800096d3 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b3_str +800006b0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b4 +80005580 l .text.rvtest 00000000 failedtest_x14_x13 +80009705 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b4_str +800006dc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b5 +80009737 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b5_str +80000708 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b6 +80009769 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b6_str +80000734 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b7 +8000979b l .data 00000000 Zbkb_xnor_cg_cp_rs2_b7_str +80000760 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b8 +800097cd l .data 00000000 Zbkb_xnor_cg_cp_rs2_b8_str +8000078c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b9 +800097ff l .data 00000000 Zbkb_xnor_cg_cp_rs2_b9_str +800007b8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b10 +80009831 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b10_str +800007e4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b11 +80009864 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b11_str +80000814 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b12 +80009897 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b12_str +80000848 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b13 +800098ca l .data 00000000 Zbkb_xnor_cg_cp_rs2_b13_str +80000874 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b14 +800098fd l .data 00000000 Zbkb_xnor_cg_cp_rs2_b14_str +800008a0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b15 +80009930 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b16 +80009963 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b16_str +800008fc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b17 +80009996 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b17_str +80000928 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b18 +800099c9 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b19 +800099fc l .data 00000000 Zbkb_xnor_cg_cp_rs2_b19_str +80000988 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b20 +80009a2f l .data 00000000 Zbkb_xnor_cg_cp_rs2_b20_str +800009b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b21 +80009a62 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b21_str +800009e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b22 +80009a95 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b22_str +80000a0c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b23 +80009ac8 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b23_str +80000a38 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b24 +80009afb l .data 00000000 Zbkb_xnor_cg_cp_rs2_b24_str +80000a64 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b25 +80009b2e l .data 00000000 Zbkb_xnor_cg_cp_rs2_b25_str +80000a90 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b26 +80009b61 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b26_str +80000ac0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b27 +80009b94 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b27_str +80000aec l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b28 +80009bc7 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b28_str +80000b18 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b29 +80009bfa l .data 00000000 Zbkb_xnor_cg_cp_rs2_b29_str +80000b48 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b30 +80009c2d l .data 00000000 Zbkb_xnor_cg_cp_rs2_b30_str +80000b74 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_b31 +80009c60 l .data 00000000 Zbkb_xnor_cg_cp_rs2_b31_str +80000ba0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b0 +80009c93 l .data 00000000 Zbkb_xnor_cg_cp_rd_b0_str +80000bcc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b1 +80009cc4 l .data 00000000 Zbkb_xnor_cg_cp_rd_b1_str +80000bfc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b2 +80009cf5 l .data 00000000 Zbkb_xnor_cg_cp_rd_b2_str +80000c28 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b3 +80009d26 l .data 00000000 Zbkb_xnor_cg_cp_rd_b3_str +80000c54 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b4 +80009d57 l .data 00000000 Zbkb_xnor_cg_cp_rd_b4_str +80000c80 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b5 +80009d88 l .data 00000000 Zbkb_xnor_cg_cp_rd_b5_str +80000cb0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b6 +80009db9 l .data 00000000 Zbkb_xnor_cg_cp_rd_b6_str +80000ce4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b7 +80009dea l .data 00000000 Zbkb_xnor_cg_cp_rd_b7_str +80000d10 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b8 +80009e1b l .data 00000000 Zbkb_xnor_cg_cp_rd_b8_str +80000d40 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b9 +80009e4c l .data 00000000 Zbkb_xnor_cg_cp_rd_b9_str +80000d70 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b10 +80009e7d l .data 00000000 Zbkb_xnor_cg_cp_rd_b10_str +80000d9c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b11 +80009eaf l .data 00000000 Zbkb_xnor_cg_cp_rd_b11_str +80000dc8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b12 +80009ee1 l .data 00000000 Zbkb_xnor_cg_cp_rd_b12_str +80000dfc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b13 +80009f13 l .data 00000000 Zbkb_xnor_cg_cp_rd_b13_str +80000e28 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b14 +80009f45 l .data 00000000 Zbkb_xnor_cg_cp_rd_b14_str +80000e54 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b15 +80009f77 l .data 00000000 Zbkb_xnor_cg_cp_rd_b15_str +80000e80 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b16 +80009fa9 l .data 00000000 Zbkb_xnor_cg_cp_rd_b16_str +80000eac l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b17 +80009fdb l .data 00000000 Zbkb_xnor_cg_cp_rd_b17_str +80000edc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b18 +8000a00d l .data 00000000 Zbkb_xnor_cg_cp_rd_b18_str +80000f08 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b19 +8000a03f l .data 00000000 Zbkb_xnor_cg_cp_rd_b19_str +80000f34 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b20 +8000a071 l .data 00000000 Zbkb_xnor_cg_cp_rd_b20_str +80000f60 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b21 +8000a0a3 l .data 00000000 Zbkb_xnor_cg_cp_rd_b21_str +80000f8c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b22 +8000a0d5 l .data 00000000 Zbkb_xnor_cg_cp_rd_b22_str +80000fb8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b23 +8000a107 l .data 00000000 Zbkb_xnor_cg_cp_rd_b23_str +80000fe4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b24 +8000a139 l .data 00000000 Zbkb_xnor_cg_cp_rd_b24_str +80001010 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b25 +8000a16b l .data 00000000 Zbkb_xnor_cg_cp_rd_b25_str +8000103c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b26 +8000a19d l .data 00000000 Zbkb_xnor_cg_cp_rd_b26_str +80001068 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b27 +8000a1cf l .data 00000000 Zbkb_xnor_cg_cp_rd_b27_str +80001094 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b28 +8000a201 l .data 00000000 Zbkb_xnor_cg_cp_rd_b28_str +800010c4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b29 +8000a233 l .data 00000000 Zbkb_xnor_cg_cp_rd_b29_str +800010f4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b30 +8000a265 l .data 00000000 Zbkb_xnor_cg_cp_rd_b30_str +80001120 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rd_b31 +8000a297 l .data 00000000 Zbkb_xnor_cg_cp_rd_b31_str +8000114c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x0 +8000a2c9 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x0_str +80001178 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x1 +8000a302 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x1_str +800011a4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x2 +8000a33b l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x2_str +800011d0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x80000000 +8000a374 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x80000000_str +800011fc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x80000001 +8000a3b5 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x80000001_str +80001228 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x7fffffff +8000a3f6 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x7fffffff_str +80001254 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffe +8000a437 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffe_str +80001280 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xffffffff +8000a478 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xffffffff_str +800012ac l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe +8000a4b9 l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe_str +800012d8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x5bbc8872 +8000a4fa l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x5bbc8872_str +80001304 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaa +8000a53b l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaa_str +80001330 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x55555555 +8000a57c l .data 00000000 Zbkb_xnor_cg_cp_rs1_edges_0x55555555_str +8000135c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x0 +8000a5bd l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x0_str +80001388 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x1 +8000a5f7 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x1_str +800013b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x2 +8000a631 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x2_str +800013e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x80000000 +8000a66b l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x80000000_str +8000140c l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x80000001 +8000a6ac l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x80000001_str +80001438 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x7fffffff +8000a6ed l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x7fffffff_str +80001464 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffe +8000a72e l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffe_str +80001490 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xffffffff +8000a76f l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xffffffff_str +800014bc l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe +8000a7b0 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe_str +800014e8 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x5bbc8872 +8000a7f1 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x5bbc8872_str +80001514 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaa +8000a832 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaa_str +80001540 l .text.rvtest 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x55555555 +8000a873 l .data 00000000 Zbkb_xnor_cg_cp_rs2_edges_0x55555555_str +8000156c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a8b4 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001598 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a905 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015c4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a956 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015f0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000a9a7 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +8000161c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000a9ff l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001648 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000aa57 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001674 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000aaaf l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +800016a0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ab07 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016cc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000ab5f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000abb7 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001724 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ac0f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001750 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ac67 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000177c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000acbf l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ad10 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017d4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ad61 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +80001800 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000adb2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000182c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ae0a l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001858 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000ae62 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001884 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000aeba l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018b0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000af12 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018dc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000af6a l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001908 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000afc2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001934 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b01a l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001960 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b072 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000198c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b0ca l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b11b l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019e4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b16c l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a10 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b1bd l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a3c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b215 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a68 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b26d l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a94 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b2c5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ac0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b31d l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001aec l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b375 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b18 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b3cd l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b44 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b425 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b70 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b47d l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b9c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b4d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b52d l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bf4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b585 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c20 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b5dd l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c4c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b63c l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c78 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b69b l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001ca4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b6fa l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cd0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b759 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cfc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b7b8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d28 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b817 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d54 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b876 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d80 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b8d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001dac l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b934 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000b98c l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001e04 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000b9e4 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e30 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000ba3c l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e5c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000ba9b l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e88 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bafa l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eb4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bb59 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ee0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bbb8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f0c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bc17 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f38 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bc76 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f64 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bcd5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f90 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bd34 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fbc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000bd93 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bdeb l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002014 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000be43 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002040 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000be9b l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000206c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000befa l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002098 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000bf59 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020c4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000bfb8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020f0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c017 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +8000211c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c076 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002148 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c0d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002174 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c134 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +800021a0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c193 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021cc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c1f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c24a l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002224 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c2a2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002250 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c2fa l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000227c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c359 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c3b8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022d4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c417 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +80002300 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c476 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000232c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c4d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002358 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c534 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002384 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c593 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023b0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c5f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023dc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c651 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002408 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c6a9 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002434 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c701 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002460 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c759 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000248c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c7b8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c817 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024e4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c876 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002510 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c8d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000253c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000c934 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002568 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000c993 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002594 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000c9f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025c0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000ca51 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025ec l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cab0 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002618 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000cb08 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002644 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cb60 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002670 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cbb8 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000269c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cc17 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cc76 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026f4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000ccd5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002720 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cd34 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000274c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000cd93 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002778 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cdf2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +800027a4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000ce51 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027d0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000ceb0 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027fc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000cf0f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002828 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000cf67 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002854 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000cfbf l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002880 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d017 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028ac l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d076 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d0d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +80002904 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d134 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002930 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d193 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000295c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d1f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002988 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d251 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d2b0 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d30f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a0c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d36e l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a38 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d3c6 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a64 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d41e l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a90 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d476 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002abc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d4d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d534 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b14 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d593 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b40 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d5f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b6c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d651 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b98 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d6b0 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bc4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d70f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bf0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d76e l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c1c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d7cd l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c48 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d825 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c74 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d87d l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002ca0 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d8d5 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002ccc l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000d934 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000d993 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d24 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000d9f2 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d50 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000da51 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d7c l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dab0 l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da8 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000db0f l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dd4 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000db6e l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002e00 l .text.rvtest 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dbcd l .data 00000000 Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e2c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b0 +8000dc2c l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b0_str +80002e58 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b1 +8000dc64 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b1_str +80002e84 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b2 +8000dc9c l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b2_str +80002eb4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b3 +8000dcd4 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b3_str +80002ee8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b4 +8000dd0c l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b4_str +80002f14 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b5 +8000dd44 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b5_str +80002f40 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b6 +8000dd7c l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b6_str +80002f74 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b7 +8000ddb4 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b7_str +80002fa0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b8 +8000ddec l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b8_str +80002fd0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b9 +8000de24 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b9_str +80002ffc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b10 +8000de5c l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b10_str +80003028 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b11 +8000de95 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b11_str +80003054 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b12 +8000dece l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b12_str +80003088 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b13 +8000df07 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b13_str +800030b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b14 +8000df40 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b14_str +800030e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b15 +8000df79 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b15_str +8000310c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b16 +8000dfb2 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b16_str +80003138 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b17 +8000dfeb l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b17_str +80003164 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b18 +8000e024 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b18_str +80003190 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b19 +8000e05d l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b19_str +800031bc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b20 +8000e096 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b20_str +800031e8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b21 +8000e0cf l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b21_str +80003214 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b22 +8000e108 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b22_str +80003240 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b23 +8000e141 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b23_str +8000326c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b24 +8000e17a l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b24_str +80003298 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b25 +8000e1b3 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b25_str +800032c8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b26 +8000e1ec l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b26_str +800032f4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b27 +8000e225 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b27_str +80003320 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b28 +8000e25e l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b28_str +8000334c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b29 +8000e297 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b29_str +80003378 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b30 +8000e2d0 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b30_str +800033a4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b31 +8000e309 l .data 00000000 Zbkb_xnor_cg_cmp_rs1_rs2_b31_str +800033d0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b0 +8000e342 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b0_str +800033fc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b1 +8000e379 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b1_str +80003428 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b2 +8000e3b0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b2_str +80003458 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b3 +8000e3e7 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b3_str +8000348c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b4 +8000e41e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b4_str +800034b8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b5 +8000e455 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b5_str +800034e4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b6 +8000e48c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b6_str +80003510 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b7 +8000e4c3 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b7_str +8000353c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b8 +8000e4fa l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b8_str +80003568 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b9 +8000e531 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b9_str +80003594 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b10 +8000e568 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b10_str +800035c0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b11 +8000e5a0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b11_str +800035f0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b12 +8000e5d8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b12_str +80003624 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b13 +8000e610 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b13_str +80003650 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b14 +8000e648 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b14_str +8000367c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b15 +8000e680 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b15_str +800036a8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b16 +8000e6b8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b16_str +800036d4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b17 +8000e6f0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b17_str +80003700 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b18 +8000e728 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b18_str +8000372c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b19 +8000e760 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b19_str +80003758 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b20 +8000e798 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b20_str +80003784 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b21 +8000e7d0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b21_str +800037b4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b22 +8000e808 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b22_str +800037e0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b23 +8000e840 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b23_str +80003810 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b24 +8000e878 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b24_str +8000383c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b25 +8000e8b0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b25_str +80003868 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b26 +8000e8e8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b26_str +80003894 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b27 +8000e920 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b27_str +800038c0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b28 +8000e958 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b28_str +800038ec l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b29 +8000e990 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b29_str +80003918 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b30 +8000e9c8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b30_str +80003944 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b31 +8000ea00 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_b31_str +80003970 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b0 +8000ea38 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b0_str +8000399c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b1 +8000ea6f l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b1_str +800039c8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b2 +8000eaa6 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b2_str +800039f4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b3 +8000eadd l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b3_str +80003a20 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b4 +8000eb14 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b4_str +80003a4c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b5 +8000eb4b l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b5_str +80003a78 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b6 +8000eb82 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b6_str +80003aac l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b7 +8000ebb9 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b7_str +80003ad8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b8 +8000ebf0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b8_str +80003b08 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b9 +8000ec27 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b9_str +80003b38 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b10 +8000ec5e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b10_str +80003b64 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b11 +8000ec96 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b11_str +80003b90 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b12 +8000ecce l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b12_str +80003bbc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b13 +8000ed06 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b13_str +80003be8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b14 +8000ed3e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b14_str +80003c14 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b15 +8000ed76 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b15_str +80003c40 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b16 +8000edae l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b16_str +80003c6c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b17 +8000ede6 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b17_str +80003c98 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b18 +8000ee1e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b18_str +80003cc4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b19 +8000ee56 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b19_str +80003cf4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b20 +8000ee8e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b20_str +80003d20 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b21 +8000eec6 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b21_str +80003d50 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b22 +8000eefe l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b22_str +80003d7c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b23 +8000ef36 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b23_str +80003da8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b24 +8000ef6e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b24_str +80003dd4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b25 +8000efa6 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b25_str +80003e00 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b26 +8000efde l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b26_str +80003e2c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b27 +8000f016 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b27_str +80003e5c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b28 +8000f04e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b28_str +80003e88 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b29 +8000f086 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b29_str +80003eb8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b30 +8000f0be l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b30_str +80003ee4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b31 +8000f0f6 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs2_b31_str +80003f10 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0 +8000f12e l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0_str +80003f3c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1 +8000f169 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1_str +80003f68 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2 +8000f1a4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2_str +80003f94 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3 +8000f1df l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3_str +80003fc8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4 +8000f21a l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4_str +80003ff4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5 +8000f255 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5_str +80004020 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6 +8000f290 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6_str +8000404c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7 +8000f2cb l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7_str +80004078 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8 +8000f306 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8_str +800040a4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9 +8000f341 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9_str +800040d0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10 +8000f37c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10_str +80004100 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11 +8000f3b8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11_str +8000412c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12 +8000f3f4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12_str +80004160 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13 +8000f430 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13_str +8000418c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14 +8000f46c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14_str +800041b8 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15 +8000f4a8 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15_str +800041e4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16 +8000f4e4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16_str +80004214 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17 +8000f520 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17_str +80004240 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18 +8000f55c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18_str +8000426c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19 +8000f598 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19_str +80004298 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20 +8000f5d4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20_str +800042c4 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21 +8000f610 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21_str +800042f0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22 +8000f64c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22_str +8000431c l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23 +8000f688 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23_str +80004348 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24 +8000f6c4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24_str +80004374 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25 +8000f700 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25_str +800043a0 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26 +8000f73c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26_str +800043cc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27 +8000f778 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27_str +800043fc l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28 +8000f7b4 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28_str +80004428 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29 +8000f7f0 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29_str +80004454 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30 +8000f82c l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30_str +80004480 l .text.rvtest 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31 +8000f868 l .data 00000000 Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +800044ac l .text.rvtest 00000000 exit_Mcleanup +800044b0 l .text.rvtest 00000000 resto_Medeleg +800044b8 l .text.rvtest 00000000 resto_Msatp +800044bc l .text.rvtest 00000000 resto_Mscratch +800044c4 l .text.rvtest 00000000 resto_Mxtvec +800044d8 l .text.rvtest 00000000 resto_Mtramp +800044dc l .text.rvtest 00000000 resto_Mloop +800044f4 l .text.rvtest 00000000 check_trap_sig_overflow +80004790 l .text.rvtest 00000000 trap_sig_overflow +80004630 l .text.rvtest 00000000 check_trap_sig_offset +8000ff2e l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8000ff67 l .data 00000000 begin_debugstr +8000ffc7 l .data 00000000 trap_sig_overflowstr +80010b72 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011c48 l .data 00000000 trap_sigptr +80011c40 l .data 00000000 final_trap_sig_offset +800046f4 l .text.rvtest 00000000 check_abort_test +800055a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001011b l .data 00000000 trap_sig_offset_mismatch +80004710 l .text.rvtest 00000000 exit_cleanup +800047c4 l .text.rvtest 00000000 abort_test +8000ff89 l .data 00000000 abortstr +8000fef4 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004880 l .text.rvtest 00000000 trap_Mhandler +800049a0 l .text.rvtest 00000000 rvtest_Mendtest +800049c4 l .text.rvtest 00000000 common_Mhandler +80004a30 l .text.rvtest 00000000 spcl_M2mmode_test +80004a3c l .text.rvtest 00000000 spcl_Mchk4alt +80004a4c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a44 l .text.rvtest 00000000 spcl_Mparam_chk +800054d0 l .text.rvtest 00000000 Mrtn2mmode +80004fd4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a58 l .text.rvtest 00000000 Mgoto_mchk +80004a5c l .text.rvtest 00000000 tsbi_Mdispatch +80004a84 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a74 l .text.rvtest 00000000 tsbi_Mecall_test +80004af0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005240 l .text.rvtest 00000000 resto_Mrtn +80004ab0 l .text.rvtest 00000000 tsbi_Mgoto_m +80004ac0 l .text.rvtest 00000000 tsbi_Mgoto_s +80004adc l .text.rvtest 00000000 tsbi_Mgoto_u +80004aec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c70 l .text.rvtest 00000000 tsbi_instr_table +80004b20 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004b34 l .text.rvtest 00000000 found_instr +80004b78 l .text.rvtest 00000000 tsbi_instr_not_found +80004b64 l .text.rvtest 00000000 tsbi_instr_rtn +800115a9 l .data 00000000 tsbi_instr_not_found_str +80007058 l .text.rvtest 00000000 failedtest_hex_to_str +8000fa18 l .data 00000000 ascii_buffer +80010030 l .data 00000000 newlinestr +80004ff0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004fdc l .text.rvtest 00000000 Mint_sig_sv +80004ff0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000f9f8 l .data 00000000 saved_xepc +800206ac l .data 00000000 sig_end_canary +80005088 l .text.rvtest 00000000 sv_Mvect +80010132 l .data 00000000 sv_Mvect_str +8000512c l .text.rvtest 00000000 sv_Mcause +80010234 l .data 00000000 sv_Mcause_str +80005260 l .text.rvtest 00000000 common_Mint_handler +80005154 l .text.rvtest 00000000 common_Mexcpt_handler +80005160 l .text.rvtest 00000000 vmem_adj_Mepc +800051b4 l .text.rvtest 00000000 sv_Mepc +80005188 l .text.rvtest 00000000 code_adj_Mepc +800051b0 l .text.rvtest 00000000 adj_Mepc +8000519c l .text.rvtest 00000000 data_adj_Mepc +8001032f l .data 00000000 sv_Mepc_str +800051d4 l .text.rvtest 00000000 skpsv_Mepc +800051fc l .text.rvtest 00000000 adj_Mepc_rtn +80005208 l .text.rvtest 00000000 skp_adj_Mepc +8000520c l .text.rvtest 00000000 sv_Mtval +80010422 l .data 00000000 sv_Mtval_str +8000522c l .text.rvtest 00000000 skp_Mtval +80005238 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005298 l .text.rvtest 00000000 spcl_Mhandler +80005274 l .text.rvtest 00000000 sv_Mip +80010595 l .data 00000000 sv_Mip_str +800052b4 l .text.rvtest 00000000 spcl_Mdispatch_handling +800052cc l .text.rvtest 00000000 spcl_Mdispatch +800052d0 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +800053d0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +80005520 l .text.rvtest 00000000 rtn_fm_mmode +8000550c l .text.rvtest 00000000 from_hs_u +800054fc l .text.rvtest 00000000 from_vs +8000f8b0 l .data 00000000 begin_failure_scratch +800055dc l .text.rvtest 00000000 failedtest_saveregs +8000564c l .text.rvtest 00000000 failedtest_saveresults +8000f8b0 l .data 00000000 failure_type +800057ec l .text.rvtest 00000000 failedtest_saveresults_trap +8000565c l .text.rvtest 00000000 failedtest_saveresults_int +80005774 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800057ac l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005ae0 l .text.rvtest 00000000 failedtest_saveresults_common +8000f9d8 l .data 00000000 failure_diag_type +8000f9e8 l .data 00000000 trap_diag_fail_str_ptr +80005aa0 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000f9e0 l .data 00000000 trap_diag_subtype +80005ab4 l .text.rvtest 00000000 trap_diag_field_identified +80010519 l .data 00000000 sv_Mtval2_str +80010557 l .data 00000000 sv_Mtinst_str +80010172 l .data 00000000 sv_Svect_str +80010272 l .data 00000000 sv_Scause_str +8001036b l .data 00000000 sv_Sepc_str +8001045f l .data 00000000 sv_Stval_str +800105d0 l .data 00000000 sv_Sip_str +800101b2 l .data 00000000 sv_Hvect_str +800102b0 l .data 00000000 sv_Hcause_str +800103a7 l .data 00000000 sv_Hepc_str +8001049c l .data 00000000 sv_Htval_str +8001060b l .data 00000000 sv_Hip_str +800101f3 l .data 00000000 sv_Vvect_str +800102ef l .data 00000000 sv_Vcause_str +800103e4 l .data 00000000 sv_Vepc_str +800104da l .data 00000000 sv_Vtval_str +80010647 l .data 00000000 sv_Vip_str +80010684 l .data 00000000 Mclr_Mext_int_str +800106d3 l .data 00000000 Mclr_Sext_int_str +800107ce l .data 00000000 Sclr_Sext_int_str +800108ca l .data 00000000 Hclr_Sext_int_str +80005ad0 l .text.rvtest 00000000 trap_diag_generic_report +8000f9e4 l .data 00000000 trap_diag_mode +80005b10 l .text.rvtest 00000000 failedtest_report +80005b10 l .text.rvtest 00000000 print_failstr +80005b88 l .text.rvtest 00000000 print_testnamestr +8001001e l .data 00000000 testnamestr +80005bc8 l .text.rvtest 00000000 print_failure_test_name_str +8000f9d0 l .data 00000000 failure_string_ptr +80005bd8 l .text.rvtest 00000000 print_newline_str +8000614c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010032 l .data 00000000 inststr +8000f9b0 l .data 00000000 failing_instruction +80010046 l .data 00000000 addrstr +8000f9b8 l .data 00000000 failing_addr +80010a7d l .data 00000000 regstr +80005db8 l .text.rvtest 00000000 failedtest_report_not_intreg +8000f9b4 l .data 00000000 failing_reg +800070d4 l .text.rvtest 00000000 failedtest_dec_to_str +80005ecc l .text.rvtest 00000000 failedtest_report_print_regstr +80005e0c l .text.rvtest 00000000 failedtest_report_fpreg +80005e58 l .text.rvtest 00000000 failedtest_report_vecreg +80005e94 l .text.rvtest 00000000 failedtest_report_vxsat +80010b93 l .data 00000000 fflagsstr +80005f08 l .text.rvtest 00000000 failedtest_report_after_reg +80010a76 l .data 00000000 vxsatstr +80010a8e l .data 00000000 badvalstr +80005f6c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000f9c0 l .data 00000000 failing_value +80005f7c l .text.rvtest 00000000 failedtest_report_badval_done +8000604c l .text.rvtest 00000000 failedtest_report_diag +80010aa5 l .data 00000000 expvalstr +8000600c l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000f9c8 l .data 00000000 expected_value +8000601c l .text.rvtest 00000000 failedtest_report_expval_done +80006e04 l .text.rvtest 00000000 failedtest_report_end +800060cc l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006054 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010abc l .data 00000000 failure_diag_bad_instr_str +80010b1a l .data 00000000 failure_diag_bad_ptr_str +80006210 l .text.rvtest 00000000 trap_report_offset_mismatch +80010bbf l .data 00000000 trap_diag_header_str +80010beb l .data 00000000 trap_diag_origstr_label +80006c90 l .text.rvtest 00000000 trap_report_generic +8000654c l .text.rvtest 00000000 trap_report_field_mismatch +80010bfb l .data 00000000 trap_diag_expected_offset_str +80010c26 l .data 00000000 trap_diag_actual_offset_str +8000642c l .text.rvtest 00000000 trap_report_missing_traps +8000631c l .text.rvtest 00000000 trap_report_extra_traps +80010c55 l .data 00000000 trap_diag_extra_traps_str +80010cbd l .data 00000000 trap_diag_diff_bytes_str +80010ce4 l .data 00000000 trap_diag_extra_next_step_str +80010c81 l .data 00000000 trap_diag_missing_traps_str +80010dcc l .data 00000000 trap_diag_missing_next_step_str +80010eb3 l .data 00000000 trap_diag_handler_mode_str +800065e4 l .text.rvtest 00000000 trap_mode_m +80006624 l .text.rvtest 00000000 trap_mode_s +80006664 l .text.rvtest 00000000 trap_mode_h +800066a4 l .text.rvtest 00000000 trap_mode_v +80010eef l .data 00000000 trap_diag_mode_unknown_str +800066e0 l .text.rvtest 00000000 trap_mode_print +80010ecd l .data 00000000 trap_diag_mode_m_str +80010ed5 l .data 00000000 trap_diag_mode_s_str +80010edd l .data 00000000 trap_diag_mode_hs_str +80010ee6 l .data 00000000 trap_diag_mode_vs_str +80010ef8 l .data 00000000 trap_diag_field_str +800067a4 l .text.rvtest 00000000 trap_field_vect +800067e4 l .text.rvtest 00000000 trap_field_cause +80006824 l .text.rvtest 00000000 trap_field_epc +80006864 l .text.rvtest 00000000 trap_field_tval +800068a4 l .text.rvtest 00000000 trap_field_ip +800068e4 l .text.rvtest 00000000 trap_field_tval2 +80006924 l .text.rvtest 00000000 trap_field_tinst +80006964 l .text.rvtest 00000000 trap_field_intid +8001104f l .data 00000000 trap_diag_field_unknown_str +800069a0 l .text.rvtest 00000000 trap_field_print +80010f12 l .data 00000000 trap_diag_field_vect_str +80010f43 l .data 00000000 trap_diag_field_cause_str +80010f63 l .data 00000000 trap_diag_field_epc_str +80010f81 l .data 00000000 trap_diag_field_tval_str +80010fa0 l .data 00000000 trap_diag_field_ip_str +80010fc8 l .data 00000000 trap_diag_field_tval2_str +80010ff4 l .data 00000000 trap_diag_field_tinst_str +80011020 l .data 00000000 trap_diag_field_intid_str +8001105e l .data 00000000 trap_diag_expected_str +80011075 l .data 00000000 trap_diag_actual_str +80006b3c l .text.rvtest 00000000 trap_field_not_cause +8001108c l .data 00000000 trap_diag_expected_cause_name_str +80006d74 l .text.rvtest 00000000 trap_cause_to_str +800110a3 l .data 00000000 trap_diag_actual_cause_name_str +80006b3c l .text.rvtest 00000000 trap_field_not_epc +80006e50 l .text.rvtest 00000000 failedtest_print_csr_context +80011119 l .data 00000000 trap_diag_hint_vect_str +800111ef l .data 00000000 trap_diag_hint_cause_str +800112e2 l .data 00000000 trap_diag_hint_epc_str +800113dd l .data 00000000 trap_diag_hint_tval_str +800114c4 l .data 00000000 trap_diag_hint_ip_str +800110d1 l .data 00000000 trap_diag_generic_str +800100ba l .data 00000000 xepcinstrstr +80006d98 l .text.rvtest 00000000 trap_cause_interrupt +80006d78 l .text.rvtest 00000000 trap_cause_exception +80006dc4 l .text.rvtest 00000000 trap_cause_unknown +8000fa40 l .data 00000000 trap_excpt_name_tbl +8000faa0 l .data 00000000 trap_int_name_tbl +8000fede l .data 00000000 trap_cause_unknown_str +80006e48 l .text.rvtest 00000000 failedtest_terminate +8000f9f0 l .data 00000000 csr_context_ret_addr +800100db l .data 00000000 mepcstr +800100eb l .data 00000000 mcausestr +8000fa00 l .data 00000000 saved_xcause +800100fb l .data 00000000 mtvalstr +8000fa08 l .data 00000000 saved_xtval +8001010b l .data 00000000 mstatusstr +8000fa10 l .data 00000000 saved_xstatus +80007098 l .text.rvtest 00000000 failedtest_hex_to_str_loop +800070b4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +800070b8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +800115f0 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010b9b l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fa40 l .data 00000000 end_failure_scratch +8000fae0 l .data 00000000 trap_excpt_name_0 +8000fb00 l .data 00000000 trap_excpt_name_1 +8000fb1a l .data 00000000 trap_excpt_name_2 +8000fb2f l .data 00000000 trap_excpt_name_3 +8000fb3b l .data 00000000 trap_excpt_name_4 +8000fb54 l .data 00000000 trap_excpt_name_5 +8000fb67 l .data 00000000 trap_excpt_name_6 +8000fb85 l .data 00000000 trap_excpt_name_7 +8000fb9d l .data 00000000 trap_excpt_name_8 +8000fbbb l .data 00000000 trap_excpt_name_9 +8000fbd9 l .data 00000000 trap_excpt_name_10 +8000fbf8 l .data 00000000 trap_excpt_name_11 +8000fc16 l .data 00000000 trap_excpt_name_12 +8000fc2e l .data 00000000 trap_excpt_name_13 +8000fc3f l .data 00000000 trap_excpt_name_14 +8000fc4e l .data 00000000 trap_excpt_name_15 +8000fc64 l .data 00000000 trap_excpt_name_16 +8000fc71 l .data 00000000 trap_excpt_name_17 +8000fc80 l .data 00000000 trap_excpt_name_18 +8000fc90 l .data 00000000 trap_excpt_name_19 +8000fca0 l .data 00000000 trap_excpt_name_20 +8000fcbe l .data 00000000 trap_excpt_name_21 +8000fcd5 l .data 00000000 trap_excpt_name_22 +8000fcea l .data 00000000 trap_excpt_name_23 +8000fd06 l .data 00000000 trap_int_name_0 +8000fd1e l .data 00000000 trap_int_name_1 +8000fd3d l .data 00000000 trap_int_name_2 +8000fd64 l .data 00000000 trap_int_name_3 +8000fd80 l .data 00000000 trap_int_name_4 +8000fd98 l .data 00000000 trap_int_name_5 +8000fdb4 l .data 00000000 trap_int_name_6 +8000fdd8 l .data 00000000 trap_int_name_7 +8000fdf1 l .data 00000000 trap_int_name_8 +8000fe09 l .data 00000000 trap_int_name_9 +8000fe28 l .data 00000000 trap_int_name_10 +8000fe4f l .data 00000000 trap_int_name_11 +8000fe6b l .data 00000000 trap_int_name_12 +8000fe90 l .data 00000000 trap_int_name_13 +8000feac l .data 00000000 trap_int_name_14 +8000fec5 l .data 00000000 trap_int_name_15 +80010087 l .data 00000000 xepcstr +80010725 l .data 00000000 Mclr_Vext_int_str +8001077f l .data 00000000 Sclr_Mext_int_str +80010820 l .data 00000000 Sclr_Vext_int_str +8001087a l .data 00000000 Hclr_Mext_int_str +8001091d l .data 00000000 Hclr_Vext_int_str +80010978 l .data 00000000 Vclr_Mext_int_str +800109c8 l .data 00000000 Vclr_Sext_int_str +80010a1b l .data 00000000 Vclr_Vext_int_str +800110ba l .data 00000000 trap_diag_curr_xepc_str +800206b0 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800206b0 g .data 00000000 rvtest_sig_end +800049d8 g .text.rvtest 00000000 common_Mentry +800044f4 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800115f0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +8000449c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800115f0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800115ed g .data 00000000 rvtest_data_end +8000449c g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020800 g .tohost 00000000 fromhost +80020700 g .tohost 00000000 tohost +80004750 g .text.rvtest 00000000 rvtest_fail_summary +80004800 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x826facd1 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xdc82f1cc +80000048: 0001aa83 lw x21,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkb_xnor_cg_cp_rs1_b0: + xnor x7, x0, x21 # perform operation +80000050: 415043b3 xnor x7,x0,x21 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkb_xnor_cg_cp_rs1_b0, Zbkb_xnor_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00720863 beq x4,x7,80000068 +8000005c: 4e4052ef jal x5,80005540 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x2d8969d3 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x3da58480 +80000074: 0001a003 lw x0,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkb_xnor_cg_cp_rs1_b1: + xnor x19, x1, x0 # perform operation +8000007c: 4000c9b3 xnor x19,x1,x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_xnor_cg_cp_rs1_b1, Zbkb_xnor_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01320863 beq x4,x19,80000094 +80000088: 4b8052ef jal x5,80005540 +8000008c: 8000007c .word 0x8000007c +80000090: 80009021 .word 0x80009021 +80000094: 00410113 addi x2,x2,4 + + mv x19, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010993 addi x19,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x6c313d9f +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7c04e27b +800000a4: 0001a903 lw x18,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkb_xnor_cg_cp_rs1_b2: + xnor x6, x2, x18 # perform operation +800000ac: 41214333 xnor x6,x2,x18 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_xnor_cg_cp_rs1_b2, Zbkb_xnor_cg_cp_rs1_b2_str) +800000b0: 0009a203 lw x4,0(x19) +800000b4: 00620863 beq x4,x6,800000c4 +800000b8: 488052ef jal x5,80005540 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009052 .word 0x80009052 +800000c4: 00498993 addi x19,x19,4 + + mv x11, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xbfb126ab +800000cc: 0005a183 lw x3,0(x11) +800000d0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x76dc876a +800000d4: 0005a483 lw x9,0(x11) +800000d8: 00458593 addi x11,x11,4 + +800000dc : +Zbkb_xnor_cg_cp_rs1_b3: + xnor x15, x3, x9 # perform operation +800000dc: 4091c7b3 xnor x15,x3,x9 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_xnor_cg_cp_rs1_b3, Zbkb_xnor_cg_cp_rs1_b3_str) +800000e0: 0009a203 lw x4,0(x19) +800000e4: 00f20863 beq x4,x15,800000f4 +800000e8: 458052ef jal x5,80005540 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009083 .word 0x80009083 +800000f4: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x8dfde2b4 +80000100: 0005a203 lw x4,0(x11) +80000104: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x554d62d7 +80000108: 0005a783 lw x15,0(x11) +8000010c: 00458593 addi x11,x11,4 + +80000110 : +Zbkb_xnor_cg_cp_rs1_b4: + xnor x16, x4, x15 # perform operation +80000110: 40f24833 xnor x16,x4,x15 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkb_xnor_cg_cp_rs1_b4, Zbkb_xnor_cg_cp_rs1_b4_str) +80000114: 0009a383 lw x7,0(x19) +80000118: 01038863 beq x7,x16,80000128 +8000011c: 43c0546f jal x8,80005558 +80000120: 80000110 .word 0x80000110 +80000124: 800090b4 .word 0x800090b4 +80000128: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xf2073943 +8000012c: 0005a283 lw x5,0(x11) +80000130: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0xec6a73f4 +80000134: 0005a783 lw x15,0(x11) +80000138: 00458593 addi x11,x11,4 + +8000013c : +Zbkb_xnor_cg_cp_rs1_b5: + xnor x2, x5, x15 # perform operation +8000013c: 40f2c133 xnor x2,x5,x15 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkb_xnor_cg_cp_rs1_b5, Zbkb_xnor_cg_cp_rs1_b5_str) +80000140: 0009a383 lw x7,0(x19) +80000144: 00238863 beq x7,x2,80000154 +80000148: 4100546f jal x8,80005558 +8000014c: 8000013c .word 0x8000013c +80000150: 800090e5 .word 0x800090e5 +80000154: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x82c0a162 +80000158: 0005a303 lw x6,0(x11) +8000015c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x2e9d4e1c +80000160: 0005a683 lw x13,0(x11) +80000164: 00458593 addi x11,x11,4 + +80000168 : +Zbkb_xnor_cg_cp_rs1_b6: + xnor x5, x6, x13 # perform operation +80000168: 40d342b3 xnor x5,x6,x13 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_xnor_cg_cp_rs1_b6, Zbkb_xnor_cg_cp_rs1_b6_str) +8000016c: 0009a383 lw x7,0(x19) +80000170: 00538863 beq x7,x5,80000180 +80000174: 3e40546f jal x8,80005558 +80000178: 80000168 .word 0x80000168 +8000017c: 80009116 .word 0x80009116 +80000180: 00498993 addi x19,x19,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x12fbd05d +8000018c: 0005a383 lw x7,0(x11) +80000190: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x7f9f53a0 +80000194: 0005a903 lw x18,0(x11) +80000198: 00458593 addi x11,x11,4 + +8000019c : +Zbkb_xnor_cg_cp_rs1_b7: + xnor x15, x7, x18 # perform operation +8000019c: 4123c7b3 xnor x15,x7,x18 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_xnor_cg_cp_rs1_b7, Zbkb_xnor_cg_cp_rs1_b7_str) +800001a0: 0009a203 lw x4,0(x19) +800001a4: 00f20863 beq x4,x15,800001b4 +800001a8: 398052ef jal x5,80005540 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009147 .word 0x80009147 +800001b4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0xfb153dd7 +800001b8: 0005a403 lw x8,0(x11) +800001bc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0x4344f2eb +800001c0: 0005ac03 lw x24,0(x11) +800001c4: 00458593 addi x11,x11,4 + +800001c8 : +Zbkb_xnor_cg_cp_rs1_b8: + xnor x14, x8, x24 # perform operation +800001c8: 41844733 xnor x14,x8,x24 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_xnor_cg_cp_rs1_b8, Zbkb_xnor_cg_cp_rs1_b8_str) +800001cc: 0009a203 lw x4,0(x19) +800001d0: 00e20863 beq x4,x14,800001e0 +800001d4: 36c052ef jal x5,80005540 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009178 .word 0x80009178 +800001e0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x3fadc73d +800001e4: 0005a483 lw x9,0(x11) +800001e8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0xbf857f08 +800001ec: 0005a003 lw x0,0(x11) +800001f0: 00458593 addi x11,x11,4 + +800001f4 : +Zbkb_xnor_cg_cp_rs1_b9: + xnor x22, x9, x0 # perform operation +800001f4: 4004cb33 xnor x22,x9,x0 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_xnor_cg_cp_rs1_b9, Zbkb_xnor_cg_cp_rs1_b9_str) +800001f8: 0009a203 lw x4,0(x19) +800001fc: 01620863 beq x4,x22,8000020c +80000200: 340052ef jal x5,80005540 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091a9 .word 0x800091a9 +8000020c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x8820e3ad +80000210: 0005a503 lw x10,0(x11) +80000214: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xbc81858a +80000218: 0005a403 lw x8,0(x11) +8000021c: 00458593 addi x11,x11,4 + +80000220 : +Zbkb_xnor_cg_cp_rs1_b10: + xnor x28, x10, x8 # perform operation +80000220: 40854e33 xnor x28,x10,x8 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_xnor_cg_cp_rs1_b10, Zbkb_xnor_cg_cp_rs1_b10_str) +80000224: 0009a203 lw x4,0(x19) +80000228: 01c20863 beq x4,x28,80000238 +8000022c: 314052ef jal x5,80005540 +80000230: 80000220 .word 0x80000220 +80000234: 800091db .word 0x800091db +80000238: 00498993 addi x19,x19,4 + + mv x26, x11 # switch data pointer register to avoid conflict with test +8000023c: 00058d13 addi x26,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x5f3ce5ea +80000240: 000d2583 lw x11,0(x26) +80000244: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x3f7c069a +80000248: 000d2f03 lw x30,0(x26) +8000024c: 004d0d13 addi x26,x26,4 + +80000250 : +Zbkb_xnor_cg_cp_rs1_b11: + xnor x27, x11, x30 # perform operation +80000250: 41e5cdb3 xnor x27,x11,x30 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_xnor_cg_cp_rs1_b11, Zbkb_xnor_cg_cp_rs1_b11_str) +80000254: 0009a203 lw x4,0(x19) +80000258: 01b20863 beq x4,x27,80000268 +8000025c: 2e4052ef jal x5,80005540 +80000260: 80000250 .word 0x80000250 +80000264: 8000920e .word 0x8000920e +80000268: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x925365d0 +8000026c: 000d2603 lw x12,0(x26) +80000270: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xeb84f15d +80000274: 000d2c03 lw x24,0(x26) +80000278: 004d0d13 addi x26,x26,4 + +8000027c : +Zbkb_xnor_cg_cp_rs1_b12: + xnor x17, x12, x24 # perform operation +8000027c: 418648b3 xnor x17,x12,x24 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_xnor_cg_cp_rs1_b12, Zbkb_xnor_cg_cp_rs1_b12_str) +80000280: 0009a203 lw x4,0(x19) +80000284: 01120863 beq x4,x17,80000294 +80000288: 2b8052ef jal x5,80005540 +8000028c: 8000027c .word 0x8000027c +80000290: 80009241 .word 0x80009241 +80000294: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xfd92c708 +80000298: 000d2683 lw x13,0(x26) +8000029c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x4a59b9f6 +800002a0: 000d2903 lw x18,0(x26) +800002a4: 004d0d13 addi x26,x26,4 + +800002a8 : +Zbkb_xnor_cg_cp_rs1_b13: + xnor x11, x13, x18 # perform operation +800002a8: 4126c5b3 xnor x11,x13,x18 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkb_xnor_cg_cp_rs1_b13, Zbkb_xnor_cg_cp_rs1_b13_str) +800002ac: 0009a203 lw x4,0(x19) +800002b0: 00b20863 beq x4,x11,800002c0 +800002b4: 28c052ef jal x5,80005540 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 80009274 .word 0x80009274 +800002c0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x2bbf1fd6 +800002c4: 000d2703 lw x14,0(x26) +800002c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x70397234 +800002cc: 000d2e03 lw x28,0(x26) +800002d0: 004d0d13 addi x26,x26,4 + +800002d4 : +Zbkb_xnor_cg_cp_rs1_b14: + xnor x6, x14, x28 # perform operation +800002d4: 41c74333 xnor x6,x14,x28 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_xnor_cg_cp_rs1_b14, Zbkb_xnor_cg_cp_rs1_b14_str) +800002d8: 0009a203 lw x4,0(x19) +800002dc: 00620863 beq x4,x6,800002ec +800002e0: 260052ef jal x5,80005540 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 800092a7 .word 0x800092a7 +800002ec: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x4c4eb09d +800002f0: 000d2783 lw x15,0(x26) +800002f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x112ee577 +800002f8: 000d2803 lw x16,0(x26) +800002fc: 004d0d13 addi x26,x26,4 + +80000300 : +Zbkb_xnor_cg_cp_rs1_b15: + xnor x2, x15, x16 # perform operation +80000300: 4107c133 xnor x2,x15,x16 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_xnor_cg_cp_rs1_b15, Zbkb_xnor_cg_cp_rs1_b15_str) +80000304: 0009a203 lw x4,0(x19) +80000308: 00220863 beq x4,x2,80000318 +8000030c: 234052ef jal x5,80005540 +80000310: 80000300 .word 0x80000300 +80000314: 800092da .word 0x800092da +80000318: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xaf661b63 +8000031c: 000d2803 lw x16,0(x26) +80000320: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xda4e2984 +80000324: 000d2403 lw x8,0(x26) +80000328: 004d0d13 addi x26,x26,4 + +8000032c : +Zbkb_xnor_cg_cp_rs1_b16: + xnor x13, x16, x8 # perform operation +8000032c: 408846b3 xnor x13,x16,x8 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_xnor_cg_cp_rs1_b16, Zbkb_xnor_cg_cp_rs1_b16_str) +80000330: 0009a203 lw x4,0(x19) +80000334: 00d20863 beq x4,x13,80000344 +80000338: 208052ef jal x5,80005540 +8000033c: 8000032c .word 0x8000032c +80000340: 8000930d .word 0x8000930d +80000344: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xb7d0323c +80000348: 000d2883 lw x17,0(x26) +8000034c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x926a8d5f +80000350: 000d2c83 lw x25,0(x26) +80000354: 004d0d13 addi x26,x26,4 + +80000358 : +Zbkb_xnor_cg_cp_rs1_b17: + xnor x13, x17, x25 # perform operation +80000358: 4198c6b3 xnor x13,x17,x25 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_xnor_cg_cp_rs1_b17, Zbkb_xnor_cg_cp_rs1_b17_str) +8000035c: 0009a203 lw x4,0(x19) +80000360: 00d20863 beq x4,x13,80000370 +80000364: 1dc052ef jal x5,80005540 +80000368: 80000358 .word 0x80000358 +8000036c: 80009340 .word 0x80009340 +80000370: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x43406a99 +80000374: 000d2903 lw x18,0(x26) +80000378: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xd5fef8ca +8000037c: 000d2883 lw x17,0(x26) +80000380: 004d0d13 addi x26,x26,4 + +80000384 : +Zbkb_xnor_cg_cp_rs1_b18: + xnor x2, x18, x17 # perform operation +80000384: 41194133 xnor x2,x18,x17 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_xnor_cg_cp_rs1_b18, Zbkb_xnor_cg_cp_rs1_b18_str) +80000388: 0009a203 lw x4,0(x19) +8000038c: 00220863 beq x4,x2,8000039c +80000390: 1b0052ef jal x5,80005540 +80000394: 80000384 .word 0x80000384 +80000398: 80009373 .word 0x80009373 +8000039c: 00498993 addi x19,x19,4 + + mv x25, x19 # switch signature pointer register to avoid conflict with test +800003a0: 00098c93 addi x25,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x28dc95e9 +800003a4: 000d2983 lw x19,0(x26) +800003a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x92b93dd1 +800003ac: 000d2b03 lw x22,0(x26) +800003b0: 004d0d13 addi x26,x26,4 + +800003b4 : +Zbkb_xnor_cg_cp_rs1_b19: + xnor x16, x19, x22 # perform operation +800003b4: 4169c833 xnor x16,x19,x22 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_xnor_cg_cp_rs1_b19, Zbkb_xnor_cg_cp_rs1_b19_str) +800003b8: 000ca203 lw x4,0(x25) +800003bc: 01020863 beq x4,x16,800003cc +800003c0: 180052ef jal x5,80005540 +800003c4: 800003b4 .word 0x800003b4 +800003c8: 800093a6 .word 0x800093a6 +800003cc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xd0d85e5e +800003d0: 000d2a03 lw x20,0(x26) +800003d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x4da2a5ba +800003d8: 000d2f83 lw x31,0(x26) +800003dc: 004d0d13 addi x26,x26,4 + +800003e0 : +Zbkb_xnor_cg_cp_rs1_b20: + xnor x17, x20, x31 # perform operation +800003e0: 41fa48b3 xnor x17,x20,x31 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_xnor_cg_cp_rs1_b20, Zbkb_xnor_cg_cp_rs1_b20_str) +800003e4: 000ca203 lw x4,0(x25) +800003e8: 01120863 beq x4,x17,800003f8 +800003ec: 154052ef jal x5,80005540 +800003f0: 800003e0 .word 0x800003e0 +800003f4: 800093d9 .word 0x800093d9 +800003f8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x1026c916 +800003fc: 000d2a83 lw x21,0(x26) +80000400: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xb2f8d608 +80000404: 000d2503 lw x10,0(x26) +80000408: 004d0d13 addi x26,x26,4 + +8000040c : +Zbkb_xnor_cg_cp_rs1_b21: + xnor x31, x21, x10 # perform operation +8000040c: 40aacfb3 xnor x31,x21,x10 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_xnor_cg_cp_rs1_b21, Zbkb_xnor_cg_cp_rs1_b21_str) +80000410: 000ca203 lw x4,0(x25) +80000414: 01f20863 beq x4,x31,80000424 +80000418: 128052ef jal x5,80005540 +8000041c: 8000040c .word 0x8000040c +80000420: 8000940c .word 0x8000940c +80000424: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x47b7eea9 +80000428: 000d2b03 lw x22,0(x26) +8000042c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x5e9ea395 +80000430: 000d2e83 lw x29,0(x26) +80000434: 004d0d13 addi x26,x26,4 + +80000438 : +Zbkb_xnor_cg_cp_rs1_b22: + xnor x2, x22, x29 # perform operation +80000438: 41db4133 xnor x2,x22,x29 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_xnor_cg_cp_rs1_b22, Zbkb_xnor_cg_cp_rs1_b22_str) +8000043c: 000ca203 lw x4,0(x25) +80000440: 00220863 beq x4,x2,80000450 +80000444: 0fc052ef jal x5,80005540 +80000448: 80000438 .word 0x80000438 +8000044c: 8000943f .word 0x8000943f +80000450: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x00c3e1d2 +80000454: 000d2b83 lw x23,0(x26) +80000458: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xf9697aef +8000045c: 000d2d83 lw x27,0(x26) +80000460: 004d0d13 addi x26,x26,4 + +80000464 : +Zbkb_xnor_cg_cp_rs1_b23: + xnor x1, x23, x27 # perform operation +80000464: 41bbc0b3 xnor x1,x23,x27 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_xnor_cg_cp_rs1_b23, Zbkb_xnor_cg_cp_rs1_b23_str) +80000468: 000ca203 lw x4,0(x25) +8000046c: 00120863 beq x4,x1,8000047c +80000470: 0d0052ef jal x5,80005540 +80000474: 80000464 .word 0x80000464 +80000478: 80009472 .word 0x80009472 +8000047c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x62041dc0 +80000480: 000d2c03 lw x24,0(x26) +80000484: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x910afacb +80000488: 000d2903 lw x18,0(x26) +8000048c: 004d0d13 addi x26,x26,4 + +80000490 : +Zbkb_xnor_cg_cp_rs1_b24: + xnor x16, x24, x18 # perform operation +80000490: 412c4833 xnor x16,x24,x18 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_xnor_cg_cp_rs1_b24, Zbkb_xnor_cg_cp_rs1_b24_str) +80000494: 000ca203 lw x4,0(x25) +80000498: 01020863 beq x4,x16,800004a8 +8000049c: 0a4052ef jal x5,80005540 +800004a0: 80000490 .word 0x80000490 +800004a4: 800094a5 .word 0x800094a5 +800004a8: 004c8c93 addi x25,x25,4 + + mv x12, x25 # switch signature pointer register to avoid conflict with test +800004ac: 000c8613 addi x12,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xb89b51a6 +800004b0: 000d2c83 lw x25,0(x26) +800004b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xdc39ce11 +800004b8: 000d2b83 lw x23,0(x26) +800004bc: 004d0d13 addi x26,x26,4 + +800004c0 : +Zbkb_xnor_cg_cp_rs1_b25: + xnor x18, x25, x23 # perform operation +800004c0: 417cc933 xnor x18,x25,x23 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_xnor_cg_cp_rs1_b25, Zbkb_xnor_cg_cp_rs1_b25_str) +800004c4: 00062203 lw x4,0(x12) +800004c8: 01220863 beq x4,x18,800004d8 +800004cc: 074052ef jal x5,80005540 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 800094d8 .word 0x800094d8 +800004d8: 00460613 addi x12,x12,4 + + mv x16, x26 # switch data pointer register to avoid conflict with test +800004dc: 000d0813 addi x16,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x8779f613 +800004e0: 00082d03 lw x26,0(x16) +800004e4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x0aa8348a +800004e8: 00082703 lw x14,0(x16) +800004ec: 00480813 addi x16,x16,4 + +800004f0 : +Zbkb_xnor_cg_cp_rs1_b26: + xnor x9, x26, x14 # perform operation +800004f0: 40ed44b3 xnor x9,x26,x14 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_xnor_cg_cp_rs1_b26, Zbkb_xnor_cg_cp_rs1_b26_str) +800004f4: 00062203 lw x4,0(x12) +800004f8: 00920863 beq x4,x9,80000508 +800004fc: 044052ef jal x5,80005540 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000950b .word 0x8000950b +80000508: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x07983dc3 +8000050c: 00082d83 lw x27,0(x16) +80000510: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x3c11dfff +80000514: 00082a03 lw x20,0(x16) +80000518: 00480813 addi x16,x16,4 + +8000051c : +Zbkb_xnor_cg_cp_rs1_b27: + xnor x22, x27, x20 # perform operation +8000051c: 414dcb33 xnor x22,x27,x20 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_xnor_cg_cp_rs1_b27, Zbkb_xnor_cg_cp_rs1_b27_str) +80000520: 00062203 lw x4,0(x12) +80000524: 01620863 beq x4,x22,80000534 +80000528: 018052ef jal x5,80005540 +8000052c: 8000051c .word 0x8000051c +80000530: 8000953e .word 0x8000953e +80000534: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x633263c7 +80000538: 00082e03 lw x28,0(x16) +8000053c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x1d1f446a +80000540: 00082b03 lw x22,0(x16) +80000544: 00480813 addi x16,x16,4 + +80000548 : +Zbkb_xnor_cg_cp_rs1_b28: + xnor x27, x28, x22 # perform operation +80000548: 416e4db3 xnor x27,x28,x22 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_xnor_cg_cp_rs1_b28, Zbkb_xnor_cg_cp_rs1_b28_str) +8000054c: 00062203 lw x4,0(x12) +80000550: 01b20863 beq x4,x27,80000560 +80000554: 7ed042ef jal x5,80005540 +80000558: 80000548 .word 0x80000548 +8000055c: 80009571 .word 0x80009571 +80000560: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x9af83ab0 +80000564: 00082e83 lw x29,0(x16) +80000568: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x3b5b022b +8000056c: 00082983 lw x19,0(x16) +80000570: 00480813 addi x16,x16,4 + +80000574 : +Zbkb_xnor_cg_cp_rs1_b29: + xnor x31, x29, x19 # perform operation +80000574: 413ecfb3 xnor x31,x29,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_xnor_cg_cp_rs1_b29, Zbkb_xnor_cg_cp_rs1_b29_str) +80000578: 00062203 lw x4,0(x12) +8000057c: 01f20863 beq x4,x31,8000058c +80000580: 7c1042ef jal x5,80005540 +80000584: 80000574 .word 0x80000574 +80000588: 800095a4 .word 0x800095a4 +8000058c: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x2d93e80b +80000590: 00082f03 lw x30,0(x16) +80000594: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xfdc34c5e +80000598: 00082683 lw x13,0(x16) +8000059c: 00480813 addi x16,x16,4 + +800005a0 : +Zbkb_xnor_cg_cp_rs1_b30: + xnor x14, x30, x13 # perform operation +800005a0: 40df4733 xnor x14,x30,x13 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_xnor_cg_cp_rs1_b30, Zbkb_xnor_cg_cp_rs1_b30_str) +800005a4: 00062203 lw x4,0(x12) +800005a8: 00e20863 beq x4,x14,800005b8 +800005ac: 795042ef jal x5,80005540 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 800095d7 .word 0x800095d7 +800005b8: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x972cdb41 +800005bc: 00082f83 lw x31,0(x16) +800005c0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xf7bdbe8f +800005c4: 00082403 lw x8,0(x16) +800005c8: 00480813 addi x16,x16,4 + +800005cc : +Zbkb_xnor_cg_cp_rs1_b31: + xnor x21, x31, x8 # perform operation +800005cc: 408fcab3 xnor x21,x31,x8 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_xnor_cg_cp_rs1_b31, Zbkb_xnor_cg_cp_rs1_b31_str) +800005d0: 00062203 lw x4,0(x12) +800005d4: 01520863 beq x4,x21,800005e4 +800005d8: 769042ef jal x5,80005540 +800005dc: 800005cc .word 0x800005cc +800005e0: 8000960a .word 0x8000960a +800005e4: 00460613 addi x12,x12,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xf99e8247 +800005e8: 00082083 lw x1,0(x16) +800005ec: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xd805599f +800005f0: 00082003 lw x0,0(x16) +800005f4: 00480813 addi x16,x16,4 + +800005f8 : +Zbkb_xnor_cg_cp_rs2_b0: + xnor x13, x1, x0 # perform operation +800005f8: 4000c6b3 xnor x13,x1,x0 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zbkb_xnor_cg_cp_rs2_b0, Zbkb_xnor_cg_cp_rs2_b0_str) +800005fc: 00062203 lw x4,0(x12) +80000600: 00d20863 beq x4,x13,80000610 +80000604: 73d042ef jal x5,80005540 +80000608: 800005f8 .word 0x800005f8 +8000060c: 8000963d .word 0x8000963d +80000610: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xc2d6edf6 +80000614: 00082103 lw x2,0(x16) +80000618: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x6f0c8609 +8000061c: 00082083 lw x1,0(x16) +80000620: 00480813 addi x16,x16,4 + +80000624 : +Zbkb_xnor_cg_cp_rs2_b1: + xnor x30, x2, x1 # perform operation +80000624: 40114f33 xnor x30,x2,x1 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_xnor_cg_cp_rs2_b1, Zbkb_xnor_cg_cp_rs2_b1_str) +80000628: 00062203 lw x4,0(x12) +8000062c: 01e20863 beq x4,x30,8000063c +80000630: 711042ef jal x5,80005540 +80000634: 80000624 .word 0x80000624 +80000638: 8000966f .word 0x8000966f +8000063c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x0cbcf6f0 +80000640: 00082183 lw x3,0(x16) +80000644: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x0d0f0516 +80000648: 00082103 lw x2,0(x16) +8000064c: 00480813 addi x16,x16,4 + +80000650 : +Zbkb_xnor_cg_cp_rs2_b2: + xnor x0, x3, x2 # perform operation +80000650: 4021c033 xnor x0,x3,x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkb_xnor_cg_cp_rs2_b2, Zbkb_xnor_cg_cp_rs2_b2_str) +80000654: 00062203 lw x4,0(x12) +80000658: 00020863 beq x4,x0,80000668 +8000065c: 6e5042ef jal x5,80005540 +80000660: 80000650 .word 0x80000650 +80000664: 800096a1 .word 0x800096a1 +80000668: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xae329249 +8000066c: 00082e83 lw x29,0(x16) +80000670: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x32c9f532 +80000674: 00082183 lw x3,0(x16) +80000678: 00480813 addi x16,x16,4 + +8000067c : +Zbkb_xnor_cg_cp_rs2_b3: + xnor x10, x29, x3 # perform operation +8000067c: 403ec533 xnor x10,x29,x3 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_xnor_cg_cp_rs2_b3, Zbkb_xnor_cg_cp_rs2_b3_str) +80000680: 00062203 lw x4,0(x12) +80000684: 00a20863 beq x4,x10,80000694 +80000688: 6b9042ef jal x5,80005540 +8000068c: 8000067c .word 0x8000067c +80000690: 800096d3 .word 0x800096d3 +80000694: 00460613 addi x12,x12,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000698: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +8000069c: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x7ccc1599 +800006a0: 00082503 lw x10,0(x16) +800006a4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x6888f024 +800006a8: 00082203 lw x4,0(x16) +800006ac: 00480813 addi x16,x16,4 + +800006b0 : +Zbkb_xnor_cg_cp_rs2_b4: + xnor x20, x10, x4 # perform operation +800006b0: 40454a33 xnor x20,x10,x4 + # Check if x20 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x20, Zbkb_xnor_cg_cp_rs2_b4, Zbkb_xnor_cg_cp_rs2_b4_str) +800006b4: 00062683 lw x13,0(x12) +800006b8: 01468863 beq x13,x20,800006c8 +800006bc: 6c50476f jal x14,80005580 +800006c0: 800006b0 .word 0x800006b0 +800006c4: 80009705 .word 0x80009705 +800006c8: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x72f6c525 +800006cc: 00082403 lw x8,0(x16) +800006d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x0e73ca04 +800006d4: 00082283 lw x5,0(x16) +800006d8: 00480813 addi x16,x16,4 + +800006dc : +Zbkb_xnor_cg_cp_rs2_b5: + xnor x30, x8, x5 # perform operation +800006dc: 40544f33 xnor x30,x8,x5 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zbkb_xnor_cg_cp_rs2_b5, Zbkb_xnor_cg_cp_rs2_b5_str) +800006e0: 00062683 lw x13,0(x12) +800006e4: 01e68863 beq x13,x30,800006f4 +800006e8: 6990476f jal x14,80005580 +800006ec: 800006dc .word 0x800006dc +800006f0: 80009737 .word 0x80009737 +800006f4: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x95563122 +800006f8: 00082203 lw x4,0(x16) +800006fc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xbbb433e3 +80000700: 00082303 lw x6,0(x16) +80000704: 00480813 addi x16,x16,4 + +80000708 : +Zbkb_xnor_cg_cp_rs2_b6: + xnor x23, x4, x6 # perform operation +80000708: 40624bb3 xnor x23,x4,x6 + # Check if x23 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x23, Zbkb_xnor_cg_cp_rs2_b6, Zbkb_xnor_cg_cp_rs2_b6_str) +8000070c: 00062683 lw x13,0(x12) +80000710: 01768863 beq x13,x23,80000720 +80000714: 66d0476f jal x14,80005580 +80000718: 80000708 .word 0x80000708 +8000071c: 80009769 .word 0x80009769 +80000720: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xd51769ff +80000724: 00082203 lw x4,0(x16) +80000728: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xc0173332 +8000072c: 00082383 lw x7,0(x16) +80000730: 00480813 addi x16,x16,4 + +80000734 : +Zbkb_xnor_cg_cp_rs2_b7: + xnor x29, x4, x7 # perform operation +80000734: 40724eb3 xnor x29,x4,x7 + # Check if x29 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x29, Zbkb_xnor_cg_cp_rs2_b7, Zbkb_xnor_cg_cp_rs2_b7_str) +80000738: 00062683 lw x13,0(x12) +8000073c: 01d68863 beq x13,x29,8000074c +80000740: 6410476f jal x14,80005580 +80000744: 80000734 .word 0x80000734 +80000748: 8000979b .word 0x8000979b +8000074c: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xe41a8a5c +80000750: 00082303 lw x6,0(x16) +80000754: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x7b3d9f75 +80000758: 00082403 lw x8,0(x16) +8000075c: 00480813 addi x16,x16,4 + +80000760 : +Zbkb_xnor_cg_cp_rs2_b8: + xnor x30, x6, x8 # perform operation +80000760: 40834f33 xnor x30,x6,x8 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zbkb_xnor_cg_cp_rs2_b8, Zbkb_xnor_cg_cp_rs2_b8_str) +80000764: 00062683 lw x13,0(x12) +80000768: 01e68863 beq x13,x30,80000778 +8000076c: 6150476f jal x14,80005580 +80000770: 80000760 .word 0x80000760 +80000774: 800097cd .word 0x800097cd +80000778: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xc2a6be3a +8000077c: 00082503 lw x10,0(x16) +80000780: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x8d525640 +80000784: 00082483 lw x9,0(x16) +80000788: 00480813 addi x16,x16,4 + +8000078c : +Zbkb_xnor_cg_cp_rs2_b9: + xnor x24, x10, x9 # perform operation +8000078c: 40954c33 xnor x24,x10,x9 + # Check if x24 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x24, Zbkb_xnor_cg_cp_rs2_b9, Zbkb_xnor_cg_cp_rs2_b9_str) +80000790: 00062683 lw x13,0(x12) +80000794: 01868863 beq x13,x24,800007a4 +80000798: 5e90476f jal x14,80005580 +8000079c: 8000078c .word 0x8000078c +800007a0: 800097ff .word 0x800097ff +800007a4: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x3cd61a8f +800007a8: 00082d83 lw x27,0(x16) +800007ac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xb5416f4c +800007b0: 00082503 lw x10,0(x16) +800007b4: 00480813 addi x16,x16,4 + +800007b8 : +Zbkb_xnor_cg_cp_rs2_b10: + xnor x29, x27, x10 # perform operation +800007b8: 40adceb3 xnor x29,x27,x10 + # Check if x29 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x29, Zbkb_xnor_cg_cp_rs2_b10, Zbkb_xnor_cg_cp_rs2_b10_str) +800007bc: 00062683 lw x13,0(x12) +800007c0: 01d68863 beq x13,x29,800007d0 +800007c4: 5bd0476f jal x14,80005580 +800007c8: 800007b8 .word 0x800007b8 +800007cc: 80009831 .word 0x80009831 +800007d0: 00460613 addi x12,x12,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x0a098749 +800007d4: 00082983 lw x19,0(x16) +800007d8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x3b2f1e24 +800007dc: 00082583 lw x11,0(x16) +800007e0: 00480813 addi x16,x16,4 + +800007e4 : +Zbkb_xnor_cg_cp_rs2_b11: + xnor x28, x19, x11 # perform operation +800007e4: 40b9ce33 xnor x28,x19,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x28, Zbkb_xnor_cg_cp_rs2_b11, Zbkb_xnor_cg_cp_rs2_b11_str) +800007e8: 00062683 lw x13,0(x12) +800007ec: 01c68863 beq x13,x28,800007fc +800007f0: 5910476f jal x14,80005580 +800007f4: 800007e4 .word 0x800007e4 +800007f8: 80009864 .word 0x80009864 +800007fc: 00460613 addi x12,x12,4 + + mv x20, x12 # switch signature pointer register to avoid conflict with test +80000800: 00060a13 addi x20,x12,0 +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xafa306f6 +80000804: 00082403 lw x8,0(x16) +80000808: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x6dec69fe +8000080c: 00082603 lw x12,0(x16) +80000810: 00480813 addi x16,x16,4 + +80000814 : +Zbkb_xnor_cg_cp_rs2_b12: + xnor x1, x8, x12 # perform operation +80000814: 40c440b3 xnor x1,x8,x12 + # Check if x1 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x1, Zbkb_xnor_cg_cp_rs2_b12, Zbkb_xnor_cg_cp_rs2_b12_str) +80000818: 000a2683 lw x13,0(x20) +8000081c: 00168863 beq x13,x1,8000082c +80000820: 5610476f jal x14,80005580 +80000824: 80000814 .word 0x80000814 +80000828: 80009897 .word 0x80009897 +8000082c: 004a0a13 addi x20,x20,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000830: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000834: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x776cad80 +80000838: 00082703 lw x14,0(x16) +8000083c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x90c449aa +80000840: 00082683 lw x13,0(x16) +80000844: 00480813 addi x16,x16,4 + +80000848 : +Zbkb_xnor_cg_cp_rs2_b13: + xnor x21, x14, x13 # perform operation +80000848: 40d74ab3 xnor x21,x14,x13 + # Check if x21 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x21, Zbkb_xnor_cg_cp_rs2_b13, Zbkb_xnor_cg_cp_rs2_b13_str) +8000084c: 000a2383 lw x7,0(x20) +80000850: 01538863 beq x7,x21,80000860 +80000854: 5050446f jal x8,80005558 +80000858: 80000848 .word 0x80000848 +8000085c: 800098ca .word 0x800098ca +80000860: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xec6d1bd1 +80000864: 00082583 lw x11,0(x16) +80000868: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xc7d7738d +8000086c: 00082703 lw x14,0(x16) +80000870: 00480813 addi x16,x16,4 + +80000874 : +Zbkb_xnor_cg_cp_rs2_b14: + xnor x2, x11, x14 # perform operation +80000874: 40e5c133 xnor x2,x11,x14 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_xnor_cg_cp_rs2_b14, Zbkb_xnor_cg_cp_rs2_b14_str) +80000878: 000a2383 lw x7,0(x20) +8000087c: 00238863 beq x7,x2,8000088c +80000880: 4d90446f jal x8,80005558 +80000884: 80000874 .word 0x80000874 +80000888: 800098fd .word 0x800098fd +8000088c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xbee7a57b +80000890: 00082483 lw x9,0(x16) +80000894: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xa785a0b1 +80000898: 00082783 lw x15,0(x16) +8000089c: 00480813 addi x16,x16,4 + +800008a0 : +Zbkb_xnor_cg_cp_rs2_b15: + xnor x27, x9, x15 # perform operation +800008a0: 40f4cdb3 xnor x27,x9,x15 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zbkb_xnor_cg_cp_rs2_b15, Zbkb_xnor_cg_cp_rs2_b15_str) +800008a4: 000a2383 lw x7,0(x20) +800008a8: 01b38863 beq x7,x27,800008b8 +800008ac: 4ad0446f jal x8,80005558 +800008b0: 800008a0 .word 0x800008a0 +800008b4: 80009930 .word 0x80009930 +800008b8: 004a0a13 addi x20,x20,4 + + mv x19, x16 # switch data pointer register to avoid conflict with test +800008bc: 00080993 addi x19,x16,0 +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xc3e35110 +800008c0: 0009a783 lw x15,0(x19) +800008c4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xe1897e2c +800008c8: 0009a803 lw x16,0(x19) +800008cc: 00498993 addi x19,x19,4 + +800008d0 : +Zbkb_xnor_cg_cp_rs2_b16: + xnor x28, x15, x16 # perform operation +800008d0: 4107ce33 xnor x28,x15,x16 + # Check if x28 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x28, Zbkb_xnor_cg_cp_rs2_b16, Zbkb_xnor_cg_cp_rs2_b16_str) +800008d4: 000a2383 lw x7,0(x20) +800008d8: 01c38863 beq x7,x28,800008e8 +800008dc: 47d0446f jal x8,80005558 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 80009963 .word 0x80009963 +800008e8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x07268671 +800008ec: 0009ad83 lw x27,0(x19) +800008f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xf8b0e58b +800008f4: 0009a883 lw x17,0(x19) +800008f8: 00498993 addi x19,x19,4 + +800008fc : +Zbkb_xnor_cg_cp_rs2_b17: + xnor x31, x27, x17 # perform operation +800008fc: 411dcfb3 xnor x31,x27,x17 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zbkb_xnor_cg_cp_rs2_b17, Zbkb_xnor_cg_cp_rs2_b17_str) +80000900: 000a2383 lw x7,0(x20) +80000904: 01f38863 beq x7,x31,80000914 +80000908: 4510446f jal x8,80005558 +8000090c: 800008fc .word 0x800008fc +80000910: 80009996 .word 0x80009996 +80000914: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x00aa8330 +80000918: 0009ae83 lw x29,0(x19) +8000091c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xa5592c80 +80000920: 0009a903 lw x18,0(x19) +80000924: 00498993 addi x19,x19,4 + +80000928 : +Zbkb_xnor_cg_cp_rs2_b18: + xnor x6, x29, x18 # perform operation +80000928: 412ec333 xnor x6,x29,x18 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkb_xnor_cg_cp_rs2_b18, Zbkb_xnor_cg_cp_rs2_b18_str) +8000092c: 000a2383 lw x7,0(x20) +80000930: 00638863 beq x7,x6,80000940 +80000934: 4250446f jal x8,80005558 +80000938: 80000928 .word 0x80000928 +8000093c: 800099c9 .word 0x800099c9 +80000940: 004a0a13 addi x20,x20,4 + + mv x27, x19 # switch data pointer register to avoid conflict with test +80000944: 00098d93 addi x27,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x84d24ceb +80000948: 000dac03 lw x24,0(x27) +8000094c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xd655f50c +80000950: 000da983 lw x19,0(x27) +80000954: 004d8d93 addi x27,x27,4 + +80000958 : +Zbkb_xnor_cg_cp_rs2_b19: + xnor x3, x24, x19 # perform operation +80000958: 413c41b3 xnor x3,x24,x19 + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zbkb_xnor_cg_cp_rs2_b19, Zbkb_xnor_cg_cp_rs2_b19_str) +8000095c: 000a2383 lw x7,0(x20) +80000960: 00338863 beq x7,x3,80000970 +80000964: 3f50446f jal x8,80005558 +80000968: 80000958 .word 0x80000958 +8000096c: 800099fc .word 0x800099fc +80000970: 004a0a13 addi x20,x20,4 + + mv x10, x20 # switch signature pointer register to avoid conflict with test +80000974: 000a0513 addi x10,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x0d3ce5ad +80000978: 000daa83 lw x21,0(x27) +8000097c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x0e37f41c +80000980: 000daa03 lw x20,0(x27) +80000984: 004d8d93 addi x27,x27,4 + +80000988 : +Zbkb_xnor_cg_cp_rs2_b20: + xnor x1, x21, x20 # perform operation +80000988: 414ac0b3 xnor x1,x21,x20 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_xnor_cg_cp_rs2_b20, Zbkb_xnor_cg_cp_rs2_b20_str) +8000098c: 00052383 lw x7,0(x10) +80000990: 00138863 beq x7,x1,800009a0 +80000994: 3c50446f jal x8,80005558 +80000998: 80000988 .word 0x80000988 +8000099c: 80009a2f .word 0x80009a2f +800009a0: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x667fd592 +800009a4: 000da183 lw x3,0(x27) +800009a8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xe826338e +800009ac: 000daa83 lw x21,0(x27) +800009b0: 004d8d93 addi x27,x27,4 + +800009b4 : +Zbkb_xnor_cg_cp_rs2_b21: + xnor x4, x3, x21 # perform operation +800009b4: 4151c233 xnor x4,x3,x21 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_xnor_cg_cp_rs2_b21, Zbkb_xnor_cg_cp_rs2_b21_str) +800009b8: 00052383 lw x7,0(x10) +800009bc: 00438863 beq x7,x4,800009cc +800009c0: 3990446f jal x8,80005558 +800009c4: 800009b4 .word 0x800009b4 +800009c8: 80009a62 .word 0x80009a62 +800009cc: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x069ad9da +800009d0: 000da903 lw x18,0(x27) +800009d4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x0ee391b0 +800009d8: 000dab03 lw x22,0(x27) +800009dc: 004d8d93 addi x27,x27,4 + +800009e0 : +Zbkb_xnor_cg_cp_rs2_b22: + xnor x5, x18, x22 # perform operation +800009e0: 416942b3 xnor x5,x18,x22 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_xnor_cg_cp_rs2_b22, Zbkb_xnor_cg_cp_rs2_b22_str) +800009e4: 00052383 lw x7,0(x10) +800009e8: 00538863 beq x7,x5,800009f8 +800009ec: 36d0446f jal x8,80005558 +800009f0: 800009e0 .word 0x800009e0 +800009f4: 80009a95 .word 0x80009a95 +800009f8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0xeed0469b +800009fc: 000daf03 lw x30,0(x27) +80000a00: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0xd90d7278 +80000a04: 000dab83 lw x23,0(x27) +80000a08: 004d8d93 addi x27,x27,4 + +80000a0c : +Zbkb_xnor_cg_cp_rs2_b23: + xnor x16, x30, x23 # perform operation +80000a0c: 417f4833 xnor x16,x30,x23 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zbkb_xnor_cg_cp_rs2_b23, Zbkb_xnor_cg_cp_rs2_b23_str) +80000a10: 00052383 lw x7,0(x10) +80000a14: 01038863 beq x7,x16,80000a24 +80000a18: 3410446f jal x8,80005558 +80000a1c: 80000a0c .word 0x80000a0c +80000a20: 80009ac8 .word 0x80009ac8 +80000a24: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x9fee64af +80000a28: 000dac83 lw x25,0(x27) +80000a2c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x1adb2ef7 +80000a30: 000dac03 lw x24,0(x27) +80000a34: 004d8d93 addi x27,x27,4 + +80000a38 : +Zbkb_xnor_cg_cp_rs2_b24: + xnor x14, x25, x24 # perform operation +80000a38: 418cc733 xnor x14,x25,x24 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zbkb_xnor_cg_cp_rs2_b24, Zbkb_xnor_cg_cp_rs2_b24_str) +80000a3c: 00052383 lw x7,0(x10) +80000a40: 00e38863 beq x7,x14,80000a50 +80000a44: 3150446f jal x8,80005558 +80000a48: 80000a38 .word 0x80000a38 +80000a4c: 80009afb .word 0x80009afb +80000a50: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0xc4c36bb8 +80000a54: 000da483 lw x9,0(x27) +80000a58: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0xc22f6429 +80000a5c: 000dac83 lw x25,0(x27) +80000a60: 004d8d93 addi x27,x27,4 + +80000a64 : +Zbkb_xnor_cg_cp_rs2_b25: + xnor x29, x9, x25 # perform operation +80000a64: 4194ceb3 xnor x29,x9,x25 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_xnor_cg_cp_rs2_b25, Zbkb_xnor_cg_cp_rs2_b25_str) +80000a68: 00052383 lw x7,0(x10) +80000a6c: 01d38863 beq x7,x29,80000a7c +80000a70: 2e90446f jal x8,80005558 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 80009b2e .word 0x80009b2e +80000a7c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x03c0fd2b +80000a80: 000dac83 lw x25,0(x27) +80000a84: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0xdc1f628d +80000a88: 000dad03 lw x26,0(x27) +80000a8c: 004d8d93 addi x27,x27,4 + +80000a90 : +Zbkb_xnor_cg_cp_rs2_b26: + xnor x24, x25, x26 # perform operation +80000a90: 41accc33 xnor x24,x25,x26 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zbkb_xnor_cg_cp_rs2_b26, Zbkb_xnor_cg_cp_rs2_b26_str) +80000a94: 00052383 lw x7,0(x10) +80000a98: 01838863 beq x7,x24,80000aa8 +80000a9c: 2bd0446f jal x8,80005558 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 80009b61 .word 0x80009b61 +80000aa8: 00450513 addi x10,x10,4 + + mv x30, x27 # switch data pointer register to avoid conflict with test +80000aac: 000d8f13 addi x30,x27,0 +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0x401e3386 +80000ab0: 000f2203 lw x4,0(x30) +80000ab4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x87c0ce2f +80000ab8: 000f2d83 lw x27,0(x30) +80000abc: 004f0f13 addi x30,x30,4 + +80000ac0 : +Zbkb_xnor_cg_cp_rs2_b27: + xnor x22, x4, x27 # perform operation +80000ac0: 41b24b33 xnor x22,x4,x27 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_xnor_cg_cp_rs2_b27, Zbkb_xnor_cg_cp_rs2_b27_str) +80000ac4: 00052383 lw x7,0(x10) +80000ac8: 01638863 beq x7,x22,80000ad8 +80000acc: 28d0446f jal x8,80005558 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 80009b94 .word 0x80009b94 +80000ad8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x2a87db20 +80000adc: 000f2683 lw x13,0(x30) +80000ae0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xe79c8bb1 +80000ae4: 000f2e03 lw x28,0(x30) +80000ae8: 004f0f13 addi x30,x30,4 + +80000aec : +Zbkb_xnor_cg_cp_rs2_b28: + xnor x20, x13, x28 # perform operation +80000aec: 41c6ca33 xnor x20,x13,x28 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zbkb_xnor_cg_cp_rs2_b28, Zbkb_xnor_cg_cp_rs2_b28_str) +80000af0: 00052383 lw x7,0(x10) +80000af4: 01438863 beq x7,x20,80000b04 +80000af8: 2610446f jal x8,80005558 +80000afc: 80000aec .word 0x80000aec +80000b00: 80009bc7 .word 0x80009bc7 +80000b04: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x4400bc46 +80000b08: 000f2a03 lw x20,0(x30) +80000b0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xd95c7e85 +80000b10: 000f2e83 lw x29,0(x30) +80000b14: 004f0f13 addi x30,x30,4 + +80000b18 : +Zbkb_xnor_cg_cp_rs2_b29: + xnor x19, x20, x29 # perform operation +80000b18: 41da49b3 xnor x19,x20,x29 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkb_xnor_cg_cp_rs2_b29, Zbkb_xnor_cg_cp_rs2_b29_str) +80000b1c: 00052383 lw x7,0(x10) +80000b20: 01338863 beq x7,x19,80000b30 +80000b24: 2350446f jal x8,80005558 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 80009bfa .word 0x80009bfa +80000b30: 00450513 addi x10,x10,4 + + mv x2, x30 # switch data pointer register to avoid conflict with test +80000b34: 000f0113 addi x2,x30,0 +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x03f2cfb0 +80000b38: 00012003 lw x0,0(x2) +80000b3c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x1777707c +80000b40: 00012f03 lw x30,0(x2) +80000b44: 00410113 addi x2,x2,4 + +80000b48 : +Zbkb_xnor_cg_cp_rs2_b30: + xnor x3, x0, x30 # perform operation +80000b48: 41e041b3 xnor x3,x0,x30 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_xnor_cg_cp_rs2_b30, Zbkb_xnor_cg_cp_rs2_b30_str) +80000b4c: 00052383 lw x7,0(x10) +80000b50: 00338863 beq x7,x3,80000b60 +80000b54: 2050446f jal x8,80005558 +80000b58: 80000b48 .word 0x80000b48 +80000b5c: 80009c2d .word 0x80009c2d +80000b60: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x9c5ddc3e +80000b64: 00012783 lw x15,0(x2) +80000b68: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x8d82b259 +80000b6c: 00012f83 lw x31,0(x2) +80000b70: 00410113 addi x2,x2,4 + +80000b74 : +Zbkb_xnor_cg_cp_rs2_b31: + xnor x17, x15, x31 # perform operation +80000b74: 41f7c8b3 xnor x17,x15,x31 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zbkb_xnor_cg_cp_rs2_b31, Zbkb_xnor_cg_cp_rs2_b31_str) +80000b78: 00052383 lw x7,0(x10) +80000b7c: 01138863 beq x7,x17,80000b8c +80000b80: 1d90446f jal x8,80005558 +80000b84: 80000b74 .word 0x80000b74 +80000b88: 80009c60 .word 0x80009c60 +80000b8c: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xf898fe8b +80000b90: 00012d83 lw x27,0(x2) +80000b94: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs2: x5 = 0xd952a4cb +80000b98: 00012283 lw x5,0(x2) +80000b9c: 00410113 addi x2,x2,4 + +80000ba0 : +Zbkb_xnor_cg_cp_rd_b0: + xnor x0, x27, x5 # perform operation +80000ba0: 405dc033 xnor x0,x27,x5 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkb_xnor_cg_cp_rd_b0, Zbkb_xnor_cg_cp_rd_b0_str) +80000ba4: 00052383 lw x7,0(x10) +80000ba8: 00038863 beq x7,x0,80000bb8 +80000bac: 1ad0446f jal x8,80005558 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 80009c93 .word 0x80009c93 +80000bb8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x0b82b6e8 +80000bbc: 00012003 lw x0,0(x2) +80000bc0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x89b6ebc8 +80000bc4: 00012c83 lw x25,0(x2) +80000bc8: 00410113 addi x2,x2,4 + +80000bcc : +Zbkb_xnor_cg_cp_rd_b1: + xnor x1, x0, x25 # perform operation +80000bcc: 419040b3 xnor x1,x0,x25 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_xnor_cg_cp_rd_b1, Zbkb_xnor_cg_cp_rd_b1_str) +80000bd0: 00052383 lw x7,0(x10) +80000bd4: 00138863 beq x7,x1,80000be4 +80000bd8: 1810446f jal x8,80005558 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80009cc4 .word 0x80009cc4 +80000be4: 00450513 addi x10,x10,4 + + mv x6, x2 # switch data pointer register to avoid conflict with test +80000be8: 00010313 addi x6,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xc16208cf +80000bec: 00032883 lw x17,0(x6) +80000bf0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x5dba7640 +80000bf4: 00032203 lw x4,0(x6) +80000bf8: 00430313 addi x6,x6,4 + +80000bfc : +Zbkb_xnor_cg_cp_rd_b2: + xnor x2, x17, x4 # perform operation +80000bfc: 4048c133 xnor x2,x17,x4 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkb_xnor_cg_cp_rd_b2, Zbkb_xnor_cg_cp_rd_b2_str) +80000c00: 00052383 lw x7,0(x10) +80000c04: 00238863 beq x7,x2,80000c14 +80000c08: 1510446f jal x8,80005558 +80000c0c: 80000bfc .word 0x80000bfc +80000c10: 80009cf5 .word 0x80009cf5 +80000c14: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x942a6ceb +80000c18: 00032103 lw x2,0(x6) +80000c1c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x86cc2d82 +80000c20: 00032203 lw x4,0(x6) +80000c24: 00430313 addi x6,x6,4 + +80000c28 : +Zbkb_xnor_cg_cp_rd_b3: + xnor x3, x2, x4 # perform operation +80000c28: 404141b3 xnor x3,x2,x4 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_xnor_cg_cp_rd_b3, Zbkb_xnor_cg_cp_rd_b3_str) +80000c2c: 00052383 lw x7,0(x10) +80000c30: 00338863 beq x7,x3,80000c40 +80000c34: 1250446f jal x8,80005558 +80000c38: 80000c28 .word 0x80000c28 +80000c3c: 80009d26 .word 0x80009d26 +80000c40: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x457cc46e +80000c44: 00032903 lw x18,0(x6) +80000c48: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x4b4c34b9 +80000c4c: 00032e03 lw x28,0(x6) +80000c50: 00430313 addi x6,x6,4 + +80000c54 : +Zbkb_xnor_cg_cp_rd_b4: + xnor x4, x18, x28 # perform operation +80000c54: 41c94233 xnor x4,x18,x28 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_xnor_cg_cp_rd_b4, Zbkb_xnor_cg_cp_rd_b4_str) +80000c58: 00052383 lw x7,0(x10) +80000c5c: 00438863 beq x7,x4,80000c6c +80000c60: 0f90446f jal x8,80005558 +80000c64: 80000c54 .word 0x80000c54 +80000c68: 80009d57 .word 0x80009d57 +80000c6c: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xf4ac983e +80000c70: 00032f03 lw x30,0(x6) +80000c74: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xe85e69d8 +80000c78: 00032583 lw x11,0(x6) +80000c7c: 00430313 addi x6,x6,4 + +80000c80 : +Zbkb_xnor_cg_cp_rd_b5: + xnor x5, x30, x11 # perform operation +80000c80: 40bf42b3 xnor x5,x30,x11 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_xnor_cg_cp_rd_b5, Zbkb_xnor_cg_cp_rd_b5_str) +80000c84: 00052383 lw x7,0(x10) +80000c88: 00538863 beq x7,x5,80000c98 +80000c8c: 0cd0446f jal x8,80005558 +80000c90: 80000c80 .word 0x80000c80 +80000c94: 80009d88 .word 0x80009d88 +80000c98: 00450513 addi x10,x10,4 + + mv x9, x6 # switch data pointer register to avoid conflict with test +80000c9c: 00030493 addi x9,x6,0 +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x85ccb051 +80000ca0: 0004a583 lw x11,0(x9) +80000ca4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xaffeca7f +80000ca8: 0004ad83 lw x27,0(x9) +80000cac: 00448493 addi x9,x9,4 + +80000cb0 : +Zbkb_xnor_cg_cp_rd_b6: + xnor x6, x11, x27 # perform operation +80000cb0: 41b5c333 xnor x6,x11,x27 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_xnor_cg_cp_rd_b6, Zbkb_xnor_cg_cp_rd_b6_str) +80000cb4: 00052383 lw x7,0(x10) +80000cb8: 00638863 beq x7,x6,80000cc8 +80000cbc: 09d0446f jal x8,80005558 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 80009db9 .word 0x80009db9 +80000cc8: 00450513 addi x10,x10,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000ccc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cd0: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x0c738528 +80000cd4: 0004a803 lw x16,0(x9) +80000cd8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x13e45e70 +80000cdc: 0004aa03 lw x20,0(x9) +80000ce0: 00448493 addi x9,x9,4 + +80000ce4 : +Zbkb_xnor_cg_cp_rd_b7: + xnor x7, x16, x20 # perform operation +80000ce4: 414843b3 xnor x7,x16,x20 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_xnor_cg_cp_rd_b7, Zbkb_xnor_cg_cp_rd_b7_str) +80000ce8: 00052683 lw x13,0(x10) +80000cec: 00768863 beq x13,x7,80000cfc +80000cf0: 0910476f jal x14,80005580 +80000cf4: 80000ce4 .word 0x80000ce4 +80000cf8: 80009dea .word 0x80009dea +80000cfc: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x91672c7d +80000d00: 0004a103 lw x2,0(x9) +80000d04: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xae118e26 +80000d08: 0004ae03 lw x28,0(x9) +80000d0c: 00448493 addi x9,x9,4 + +80000d10 : +Zbkb_xnor_cg_cp_rd_b8: + xnor x8, x2, x28 # perform operation +80000d10: 41c14433 xnor x8,x2,x28 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_xnor_cg_cp_rd_b8, Zbkb_xnor_cg_cp_rd_b8_str) +80000d14: 00052683 lw x13,0(x10) +80000d18: 00868863 beq x13,x8,80000d28 +80000d1c: 0650476f jal x14,80005580 +80000d20: 80000d10 .word 0x80000d10 +80000d24: 80009e1b .word 0x80009e1b +80000d28: 00450513 addi x10,x10,4 + + mv x18, x9 # switch data pointer register to avoid conflict with test +80000d2c: 00048913 addi x18,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xa37ff2e4 +80000d30: 00092383 lw x7,0(x18) +80000d34: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xaae72c04 +80000d38: 00092883 lw x17,0(x18) +80000d3c: 00490913 addi x18,x18,4 + +80000d40 : +Zbkb_xnor_cg_cp_rd_b9: + xnor x9, x7, x17 # perform operation +80000d40: 4113c4b3 xnor x9,x7,x17 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_xnor_cg_cp_rd_b9, Zbkb_xnor_cg_cp_rd_b9_str) +80000d44: 00052683 lw x13,0(x10) +80000d48: 00968863 beq x13,x9,80000d58 +80000d4c: 0350476f jal x14,80005580 +80000d50: 80000d40 .word 0x80000d40 +80000d54: 80009e4c .word 0x80009e4c +80000d58: 00450513 addi x10,x10,4 + + mv x30, x10 # switch signature pointer register to avoid conflict with test +80000d5c: 00050f13 addi x30,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x20719160 +80000d60: 00092f83 lw x31,0(x18) +80000d64: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0xd0ea7bcc +80000d68: 00092a03 lw x20,0(x18) +80000d6c: 00490913 addi x18,x18,4 + +80000d70 : +Zbkb_xnor_cg_cp_rd_b10: + xnor x10, x31, x20 # perform operation +80000d70: 414fc533 xnor x10,x31,x20 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zbkb_xnor_cg_cp_rd_b10, Zbkb_xnor_cg_cp_rd_b10_str) +80000d74: 000f2683 lw x13,0(x30) +80000d78: 00a68863 beq x13,x10,80000d88 +80000d7c: 0050476f jal x14,80005580 +80000d80: 80000d70 .word 0x80000d70 +80000d84: 80009e7d .word 0x80009e7d +80000d88: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xbd634f3f +80000d8c: 00092b83 lw x23,0(x18) +80000d90: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x108bd064 +80000d94: 00092d83 lw x27,0(x18) +80000d98: 00490913 addi x18,x18,4 + +80000d9c : +Zbkb_xnor_cg_cp_rd_b11: + xnor x11, x23, x27 # perform operation +80000d9c: 41bbc5b3 xnor x11,x23,x27 + # Check if x11 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x11, Zbkb_xnor_cg_cp_rd_b11, Zbkb_xnor_cg_cp_rd_b11_str) +80000da0: 000f2683 lw x13,0(x30) +80000da4: 00b68863 beq x13,x11,80000db4 +80000da8: 7d80476f jal x14,80005580 +80000dac: 80000d9c .word 0x80000d9c +80000db0: 80009eaf .word 0x80009eaf +80000db4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x975da1a8 +80000db8: 00092b83 lw x23,0(x18) +80000dbc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xa632e5d7 +80000dc0: 00092503 lw x10,0(x18) +80000dc4: 00490913 addi x18,x18,4 + +80000dc8 : +Zbkb_xnor_cg_cp_rd_b12: + xnor x12, x23, x10 # perform operation +80000dc8: 40abc633 xnor x12,x23,x10 + # Check if x12 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x12, Zbkb_xnor_cg_cp_rd_b12, Zbkb_xnor_cg_cp_rd_b12_str) +80000dcc: 000f2683 lw x13,0(x30) +80000dd0: 00c68863 beq x13,x12,80000de0 +80000dd4: 7ac0476f jal x14,80005580 +80000dd8: 80000dc8 .word 0x80000dc8 +80000ddc: 80009ee1 .word 0x80009ee1 +80000de0: 004f0f13 addi x30,x30,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000de4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000de8: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x4615198c +80000dec: 00092183 lw x3,0(x18) +80000df0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xf0258298 +80000df4: 00092c83 lw x25,0(x18) +80000df8: 00490913 addi x18,x18,4 + +80000dfc : +Zbkb_xnor_cg_cp_rd_b13: + xnor x13, x3, x25 # perform operation +80000dfc: 4191c6b3 xnor x13,x3,x25 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zbkb_xnor_cg_cp_rd_b13, Zbkb_xnor_cg_cp_rd_b13_str) +80000e00: 000f2203 lw x4,0(x30) +80000e04: 00d20863 beq x4,x13,80000e14 +80000e08: 738042ef jal x5,80005540 +80000e0c: 80000dfc .word 0x80000dfc +80000e10: 80009f13 .word 0x80009f13 +80000e14: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x4ff939a7 +80000e18: 00092303 lw x6,0(x18) +80000e1c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xfdc4f759 +80000e20: 00092883 lw x17,0(x18) +80000e24: 00490913 addi x18,x18,4 + +80000e28 : +Zbkb_xnor_cg_cp_rd_b14: + xnor x14, x6, x17 # perform operation +80000e28: 41134733 xnor x14,x6,x17 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zbkb_xnor_cg_cp_rd_b14, Zbkb_xnor_cg_cp_rd_b14_str) +80000e2c: 000f2203 lw x4,0(x30) +80000e30: 00e20863 beq x4,x14,80000e40 +80000e34: 70c042ef jal x5,80005540 +80000e38: 80000e28 .word 0x80000e28 +80000e3c: 80009f45 .word 0x80009f45 +80000e40: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x82a74e44 +80000e44: 00092003 lw x0,0(x18) +80000e48: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xcb872871 +80000e4c: 00092c83 lw x25,0(x18) +80000e50: 00490913 addi x18,x18,4 + +80000e54 : +Zbkb_xnor_cg_cp_rd_b15: + xnor x15, x0, x25 # perform operation +80000e54: 419047b3 xnor x15,x0,x25 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zbkb_xnor_cg_cp_rd_b15, Zbkb_xnor_cg_cp_rd_b15_str) +80000e58: 000f2203 lw x4,0(x30) +80000e5c: 00f20863 beq x4,x15,80000e6c +80000e60: 6e0042ef jal x5,80005540 +80000e64: 80000e54 .word 0x80000e54 +80000e68: 80009f77 .word 0x80009f77 +80000e6c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x6f98f7a4 +80000e70: 00092783 lw x15,0(x18) +80000e74: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x0505c09a +80000e78: 00092a03 lw x20,0(x18) +80000e7c: 00490913 addi x18,x18,4 + +80000e80 : +Zbkb_xnor_cg_cp_rd_b16: + xnor x16, x15, x20 # perform operation +80000e80: 4147c833 xnor x16,x15,x20 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zbkb_xnor_cg_cp_rd_b16, Zbkb_xnor_cg_cp_rd_b16_str) +80000e84: 000f2203 lw x4,0(x30) +80000e88: 01020863 beq x4,x16,80000e98 +80000e8c: 6b4042ef jal x5,80005540 +80000e90: 80000e80 .word 0x80000e80 +80000e94: 80009fa9 .word 0x80009fa9 +80000e98: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x8a5083ab +80000e9c: 00092d83 lw x27,0(x18) +80000ea0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xa511d3ff +80000ea4: 00092303 lw x6,0(x18) +80000ea8: 00490913 addi x18,x18,4 + +80000eac : +Zbkb_xnor_cg_cp_rd_b17: + xnor x17, x27, x6 # perform operation +80000eac: 406dc8b3 xnor x17,x27,x6 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zbkb_xnor_cg_cp_rd_b17, Zbkb_xnor_cg_cp_rd_b17_str) +80000eb0: 000f2203 lw x4,0(x30) +80000eb4: 01120863 beq x4,x17,80000ec4 +80000eb8: 688042ef jal x5,80005540 +80000ebc: 80000eac .word 0x80000eac +80000ec0: 80009fdb .word 0x80009fdb +80000ec4: 004f0f13 addi x30,x30,4 + + mv x29, x18 # switch data pointer register to avoid conflict with test +80000ec8: 00090e93 addi x29,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0xe582311a +80000ecc: 000ea383 lw x7,0(x29) +80000ed0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0xc514799f +80000ed4: 000eae03 lw x28,0(x29) +80000ed8: 004e8e93 addi x29,x29,4 + +80000edc : +Zbkb_xnor_cg_cp_rd_b18: + xnor x18, x7, x28 # perform operation +80000edc: 41c3c933 xnor x18,x7,x28 + # Check if x18 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x18, Zbkb_xnor_cg_cp_rd_b18, Zbkb_xnor_cg_cp_rd_b18_str) +80000ee0: 000f2203 lw x4,0(x30) +80000ee4: 01220863 beq x4,x18,80000ef4 +80000ee8: 658042ef jal x5,80005540 +80000eec: 80000edc .word 0x80000edc +80000ef0: 8000a00d .word 0x8000a00d +80000ef4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x1a6e51bd +80000ef8: 000eab03 lw x22,0(x29) +80000efc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x73bb3eb9 +80000f00: 000ead83 lw x27,0(x29) +80000f04: 004e8e93 addi x29,x29,4 + +80000f08 : +Zbkb_xnor_cg_cp_rd_b19: + xnor x19, x22, x27 # perform operation +80000f08: 41bb49b3 xnor x19,x22,x27 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkb_xnor_cg_cp_rd_b19, Zbkb_xnor_cg_cp_rd_b19_str) +80000f0c: 000f2203 lw x4,0(x30) +80000f10: 01320863 beq x4,x19,80000f20 +80000f14: 62c042ef jal x5,80005540 +80000f18: 80000f08 .word 0x80000f08 +80000f1c: 8000a03f .word 0x8000a03f +80000f20: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xb2168160 +80000f24: 000eab83 lw x23,0(x29) +80000f28: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0xc9ed3b19 +80000f2c: 000eaa83 lw x21,0(x29) +80000f30: 004e8e93 addi x29,x29,4 + +80000f34 : +Zbkb_xnor_cg_cp_rd_b20: + xnor x20, x23, x21 # perform operation +80000f34: 415bca33 xnor x20,x23,x21 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zbkb_xnor_cg_cp_rd_b20, Zbkb_xnor_cg_cp_rd_b20_str) +80000f38: 000f2203 lw x4,0(x30) +80000f3c: 01420863 beq x4,x20,80000f4c +80000f40: 600042ef jal x5,80005540 +80000f44: 80000f34 .word 0x80000f34 +80000f48: 8000a071 .word 0x8000a071 +80000f4c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs1: x2 = 0x5728e678 +80000f50: 000ea103 lw x2,0(x29) +80000f54: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x7937494d +80000f58: 000ea003 lw x0,0(x29) +80000f5c: 004e8e93 addi x29,x29,4 + +80000f60 : +Zbkb_xnor_cg_cp_rd_b21: + xnor x21, x2, x0 # perform operation +80000f60: 40014ab3 xnor x21,x2,x0 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkb_xnor_cg_cp_rd_b21, Zbkb_xnor_cg_cp_rd_b21_str) +80000f64: 000f2203 lw x4,0(x30) +80000f68: 01520863 beq x4,x21,80000f78 +80000f6c: 5d4042ef jal x5,80005540 +80000f70: 80000f60 .word 0x80000f60 +80000f74: 8000a0a3 .word 0x8000a0a3 +80000f78: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xa1cdc521 +80000f7c: 000ead03 lw x26,0(x29) +80000f80: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0xe76cd9f7 +80000f84: 000ea183 lw x3,0(x29) +80000f88: 004e8e93 addi x29,x29,4 + +80000f8c : +Zbkb_xnor_cg_cp_rd_b22: + xnor x22, x26, x3 # perform operation +80000f8c: 403d4b33 xnor x22,x26,x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zbkb_xnor_cg_cp_rd_b22, Zbkb_xnor_cg_cp_rd_b22_str) +80000f90: 000f2203 lw x4,0(x30) +80000f94: 01620863 beq x4,x22,80000fa4 +80000f98: 5a8042ef jal x5,80005540 +80000f9c: 80000f8c .word 0x80000f8c +80000fa0: 8000a0d5 .word 0x8000a0d5 +80000fa4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x6cc924f0 +80000fa8: 000eac03 lw x24,0(x29) +80000fac: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0xc0cd1117 +80000fb0: 000ea003 lw x0,0(x29) +80000fb4: 004e8e93 addi x29,x29,4 + +80000fb8 : +Zbkb_xnor_cg_cp_rd_b23: + xnor x23, x24, x0 # perform operation +80000fb8: 400c4bb3 xnor x23,x24,x0 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zbkb_xnor_cg_cp_rd_b23, Zbkb_xnor_cg_cp_rd_b23_str) +80000fbc: 000f2203 lw x4,0(x30) +80000fc0: 01720863 beq x4,x23,80000fd0 +80000fc4: 57c042ef jal x5,80005540 +80000fc8: 80000fb8 .word 0x80000fb8 +80000fcc: 8000a107 .word 0x8000a107 +80000fd0: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xf2dbe2e2 +80000fd4: 000ea603 lw x12,0(x29) +80000fd8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x6a95fd01 +80000fdc: 000ea903 lw x18,0(x29) +80000fe0: 004e8e93 addi x29,x29,4 + +80000fe4 : +Zbkb_xnor_cg_cp_rd_b24: + xnor x24, x12, x18 # perform operation +80000fe4: 41264c33 xnor x24,x12,x18 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkb_xnor_cg_cp_rd_b24, Zbkb_xnor_cg_cp_rd_b24_str) +80000fe8: 000f2203 lw x4,0(x30) +80000fec: 01820863 beq x4,x24,80000ffc +80000ff0: 550042ef jal x5,80005540 +80000ff4: 80000fe4 .word 0x80000fe4 +80000ff8: 8000a139 .word 0x8000a139 +80000ffc: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x1c058586 +80001000: 000ea603 lw x12,0(x29) +80001004: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0xdd8cddd9 +80001008: 000ea003 lw x0,0(x29) +8000100c: 004e8e93 addi x29,x29,4 + +80001010 : +Zbkb_xnor_cg_cp_rd_b25: + xnor x25, x12, x0 # perform operation +80001010: 40064cb3 xnor x25,x12,x0 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zbkb_xnor_cg_cp_rd_b25, Zbkb_xnor_cg_cp_rd_b25_str) +80001014: 000f2203 lw x4,0(x30) +80001018: 01920863 beq x4,x25,80001028 +8000101c: 524042ef jal x5,80005540 +80001020: 80001010 .word 0x80001010 +80001024: 8000a16b .word 0x8000a16b +80001028: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x6aefd749 +8000102c: 000ea483 lw x9,0(x29) +80001030: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0x0dbe6c6c +80001034: 000ea383 lw x7,0(x29) +80001038: 004e8e93 addi x29,x29,4 + +8000103c : +Zbkb_xnor_cg_cp_rd_b26: + xnor x26, x9, x7 # perform operation +8000103c: 4074cd33 xnor x26,x9,x7 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zbkb_xnor_cg_cp_rd_b26, Zbkb_xnor_cg_cp_rd_b26_str) +80001040: 000f2203 lw x4,0(x30) +80001044: 01a20863 beq x4,x26,80001054 +80001048: 4f8042ef jal x5,80005540 +8000104c: 8000103c .word 0x8000103c +80001050: 8000a19d .word 0x8000a19d +80001054: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs1: x0 = 0xd8297485 +80001058: 000ea003 lw x0,0(x29) +8000105c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x272528f9 +80001060: 000eac03 lw x24,0(x29) +80001064: 004e8e93 addi x29,x29,4 + +80001068 : +Zbkb_xnor_cg_cp_rd_b27: + xnor x27, x0, x24 # perform operation +80001068: 41804db3 xnor x27,x0,x24 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zbkb_xnor_cg_cp_rd_b27, Zbkb_xnor_cg_cp_rd_b27_str) +8000106c: 000f2203 lw x4,0(x30) +80001070: 01b20863 beq x4,x27,80001080 +80001074: 4cc042ef jal x5,80005540 +80001078: 80001068 .word 0x80001068 +8000107c: 8000a1cf .word 0x8000a1cf +80001080: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x9ad4be7e +80001084: 000ea783 lw x15,0(x29) +80001088: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x37c49825 +8000108c: 000eac03 lw x24,0(x29) +80001090: 004e8e93 addi x29,x29,4 + +80001094 : +Zbkb_xnor_cg_cp_rd_b28: + xnor x28, x15, x24 # perform operation +80001094: 4187ce33 xnor x28,x15,x24 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zbkb_xnor_cg_cp_rd_b28, Zbkb_xnor_cg_cp_rd_b28_str) +80001098: 000f2203 lw x4,0(x30) +8000109c: 01c20863 beq x4,x28,800010ac +800010a0: 4a0042ef jal x5,80005540 +800010a4: 80001094 .word 0x80001094 +800010a8: 8000a201 .word 0x8000a201 +800010ac: 004f0f13 addi x30,x30,4 + + mv x3, x29 # switch data pointer register to avoid conflict with test +800010b0: 000e8193 addi x3,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x36a94252 +800010b4: 0001a083 lw x1,0(x3) +800010b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xe21525fb +800010bc: 0001af83 lw x31,0(x3) +800010c0: 00418193 addi x3,x3,4 + +800010c4 : +Zbkb_xnor_cg_cp_rd_b29: + xnor x29, x1, x31 # perform operation +800010c4: 41f0ceb3 xnor x29,x1,x31 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zbkb_xnor_cg_cp_rd_b29, Zbkb_xnor_cg_cp_rd_b29_str) +800010c8: 000f2203 lw x4,0(x30) +800010cc: 01d20863 beq x4,x29,800010dc +800010d0: 470042ef jal x5,80005540 +800010d4: 800010c4 .word 0x800010c4 +800010d8: 8000a233 .word 0x8000a233 +800010dc: 004f0f13 addi x30,x30,4 + + mv x9, x30 # switch signature pointer register to avoid conflict with test +800010e0: 000f0493 addi x9,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xbd8b139b +800010e4: 0001ac83 lw x25,0(x3) +800010e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x6d18d687 +800010ec: 0001ab03 lw x22,0(x3) +800010f0: 00418193 addi x3,x3,4 + +800010f4 : +Zbkb_xnor_cg_cp_rd_b30: + xnor x30, x25, x22 # perform operation +800010f4: 416ccf33 xnor x30,x25,x22 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_xnor_cg_cp_rd_b30, Zbkb_xnor_cg_cp_rd_b30_str) +800010f8: 0004a203 lw x4,0(x9) +800010fc: 01e20863 beq x4,x30,8000110c +80001100: 440042ef jal x5,80005540 +80001104: 800010f4 .word 0x800010f4 +80001108: 8000a265 .word 0x8000a265 +8000110c: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x77ec41bc +80001110: 0001a583 lw x11,0(x3) +80001114: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xbb2f697b +80001118: 0001a903 lw x18,0(x3) +8000111c: 00418193 addi x3,x3,4 + +80001120 : +Zbkb_xnor_cg_cp_rd_b31: + xnor x31, x11, x18 # perform operation +80001120: 4125cfb3 xnor x31,x11,x18 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cp_rd_b31, Zbkb_xnor_cg_cp_rd_b31_str) +80001124: 0004a203 lw x4,0(x9) +80001128: 01f20863 beq x4,x31,80001138 +8000112c: 414042ef jal x5,80005540 +80001130: 80001120 .word 0x80001120 +80001134: 8000a297 .word 0x8000a297 +80001138: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x00000000 +8000113c: 0001a403 lw x8,0(x3) +80001140: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x4ade2ea1 +80001144: 0001a603 lw x12,0(x3) +80001148: 00418193 addi x3,x3,4 + +8000114c : +Zbkb_xnor_cg_cp_rs1_edges_0x0: + xnor x15, x8, x12 # perform operation +8000114c: 40c447b3 xnor x15,x8,x12 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_xnor_cg_cp_rs1_edges_0x0, Zbkb_xnor_cg_cp_rs1_edges_0x0_str) +80001150: 0004a203 lw x4,0(x9) +80001154: 00f20863 beq x4,x15,80001164 +80001158: 3e8042ef jal x5,80005540 +8000115c: 8000114c .word 0x8000114c +80001160: 8000a2c9 .word 0x8000a2c9 +80001164: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x00000001 +80001168: 0001a903 lw x18,0(x3) +8000116c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x1dd44f6d +80001170: 0001ac83 lw x25,0(x3) +80001174: 00418193 addi x3,x3,4 + +80001178 : +Zbkb_xnor_cg_cp_rs1_edges_0x1: + xnor x13, x18, x25 # perform operation +80001178: 419946b3 xnor x13,x18,x25 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cp_rs1_edges_0x1, Zbkb_xnor_cg_cp_rs1_edges_0x1_str) +8000117c: 0004a203 lw x4,0(x9) +80001180: 00d20863 beq x4,x13,80001190 +80001184: 3bc042ef jal x5,80005540 +80001188: 80001178 .word 0x80001178 +8000118c: 8000a302 .word 0x8000a302 +80001190: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000002 +80001194: 0001a683 lw x13,0(x3) +80001198: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x5f4af771 +8000119c: 0001a983 lw x19,0(x3) +800011a0: 00418193 addi x3,x3,4 + +800011a4 : +Zbkb_xnor_cg_cp_rs1_edges_0x2: + xnor x20, x13, x19 # perform operation +800011a4: 4136ca33 xnor x20,x13,x19 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cp_rs1_edges_0x2, Zbkb_xnor_cg_cp_rs1_edges_0x2_str) +800011a8: 0004a203 lw x4,0(x9) +800011ac: 01420863 beq x4,x20,800011bc +800011b0: 390042ef jal x5,80005540 +800011b4: 800011a4 .word 0x800011a4 +800011b8: 8000a33b .word 0x8000a33b +800011bc: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x80000000 +800011c0: 0001a403 lw x8,0(x3) +800011c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x609544e0 +800011c8: 0001a083 lw x1,0(x3) +800011cc: 00418193 addi x3,x3,4 + +800011d0 : +Zbkb_xnor_cg_cp_rs1_edges_0x80000000: + xnor x24, x8, x1 # perform operation +800011d0: 40144c33 xnor x24,x8,x1 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_xnor_cg_cp_rs1_edges_0x80000000, Zbkb_xnor_cg_cp_rs1_edges_0x80000000_str) +800011d4: 0004a203 lw x4,0(x9) +800011d8: 01820863 beq x4,x24,800011e8 +800011dc: 364042ef jal x5,80005540 +800011e0: 800011d0 .word 0x800011d0 +800011e4: 8000a374 .word 0x8000a374 +800011e8: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x80000001 +800011ec: 0001a803 lw x16,0(x3) +800011f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x5f709400 +800011f4: 0001a703 lw x14,0(x3) +800011f8: 00418193 addi x3,x3,4 + +800011fc : +Zbkb_xnor_cg_cp_rs1_edges_0x80000001: + xnor x6, x16, x14 # perform operation +800011fc: 40e84333 xnor x6,x16,x14 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cp_rs1_edges_0x80000001, Zbkb_xnor_cg_cp_rs1_edges_0x80000001_str) +80001200: 0004a203 lw x4,0(x9) +80001204: 00620863 beq x4,x6,80001214 +80001208: 338042ef jal x5,80005540 +8000120c: 800011fc .word 0x800011fc +80001210: 8000a3b5 .word 0x8000a3b5 +80001214: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x7fffffff +80001218: 0001ab03 lw x22,0(x3) +8000121c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x3dcf295e +80001220: 0001a503 lw x10,0(x3) +80001224: 00418193 addi x3,x3,4 + +80001228 : +Zbkb_xnor_cg_cp_rs1_edges_0x7fffffff: + xnor x15, x22, x10 # perform operation +80001228: 40ab47b3 xnor x15,x22,x10 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_xnor_cg_cp_rs1_edges_0x7fffffff, Zbkb_xnor_cg_cp_rs1_edges_0x7fffffff_str) +8000122c: 0004a203 lw x4,0(x9) +80001230: 00f20863 beq x4,x15,80001240 +80001234: 30c042ef jal x5,80005540 +80001238: 80001228 .word 0x80001228 +8000123c: 8000a3f6 .word 0x8000a3f6 +80001240: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x7ffffffe +80001244: 0001a383 lw x7,0(x3) +80001248: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x035a3ed1 +8000124c: 0001a883 lw x17,0(x3) +80001250: 00418193 addi x3,x3,4 + +80001254 : +Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffe: + xnor x16, x7, x17 # perform operation +80001254: 4113c833 xnor x16,x7,x17 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffe, Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffe_str) +80001258: 0004a203 lw x4,0(x9) +8000125c: 01020863 beq x4,x16,8000126c +80001260: 2e0042ef jal x5,80005540 +80001264: 80001254 .word 0x80001254 +80001268: 8000a437 .word 0x8000a437 +8000126c: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xffffffff +80001270: 0001ac03 lw x24,0(x3) +80001274: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x5f4c96e8 +80001278: 0001ab03 lw x22,0(x3) +8000127c: 00418193 addi x3,x3,4 + +80001280 : +Zbkb_xnor_cg_cp_rs1_edges_0xffffffff: + xnor x20, x24, x22 # perform operation +80001280: 416c4a33 xnor x20,x24,x22 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cp_rs1_edges_0xffffffff, Zbkb_xnor_cg_cp_rs1_edges_0xffffffff_str) +80001284: 0004a203 lw x4,0(x9) +80001288: 01420863 beq x4,x20,80001298 +8000128c: 2b4042ef jal x5,80005540 +80001290: 80001280 .word 0x80001280 +80001294: 8000a478 .word 0x8000a478 +80001298: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xfffffffe +8000129c: 0001a883 lw x17,0(x3) +800012a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xb27d38cd +800012a4: 0001a903 lw x18,0(x3) +800012a8: 00418193 addi x3,x3,4 + +800012ac : +Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe: + xnor x6, x17, x18 # perform operation +800012ac: 4128c333 xnor x6,x17,x18 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe_str) +800012b0: 0004a203 lw x4,0(x9) +800012b4: 00620863 beq x4,x6,800012c4 +800012b8: 288042ef jal x5,80005540 +800012bc: 800012ac .word 0x800012ac +800012c0: 8000a4b9 .word 0x8000a4b9 +800012c4: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x5bbc8872 +800012c8: 0001af03 lw x30,0(x3) +800012cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xd72e43b5 +800012d0: 0001a583 lw x11,0(x3) +800012d4: 00418193 addi x3,x3,4 + +800012d8 : +Zbkb_xnor_cg_cp_rs1_edges_0x5bbc8872: + xnor x16, x30, x11 # perform operation +800012d8: 40bf4833 xnor x16,x30,x11 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cp_rs1_edges_0x5bbc8872, Zbkb_xnor_cg_cp_rs1_edges_0x5bbc8872_str) +800012dc: 0004a203 lw x4,0(x9) +800012e0: 01020863 beq x4,x16,800012f0 +800012e4: 25c042ef jal x5,80005540 +800012e8: 800012d8 .word 0x800012d8 +800012ec: 8000a4fa .word 0x8000a4fa +800012f0: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xaaaaaaaa +800012f4: 0001a883 lw x17,0(x3) +800012f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x0c4c704b +800012fc: 0001a703 lw x14,0(x3) +80001300: 00418193 addi x3,x3,4 + +80001304 : +Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaa: + xnor x31, x17, x14 # perform operation +80001304: 40e8cfb3 xnor x31,x17,x14 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001308: 0004a203 lw x4,0(x9) +8000130c: 01f20863 beq x4,x31,8000131c +80001310: 230042ef jal x5,80005540 +80001314: 80001304 .word 0x80001304 +80001318: 8000a53b .word 0x8000a53b +8000131c: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x55555555 +80001320: 0001ab83 lw x23,0(x3) +80001324: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x7d8a7bbc +80001328: 0001a783 lw x15,0(x3) +8000132c: 00418193 addi x3,x3,4 + +80001330 : +Zbkb_xnor_cg_cp_rs1_edges_0x55555555: + xnor x22, x23, x15 # perform operation +80001330: 40fbcb33 xnor x22,x23,x15 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cp_rs1_edges_0x55555555, Zbkb_xnor_cg_cp_rs1_edges_0x55555555_str) +80001334: 0004a203 lw x4,0(x9) +80001338: 01620863 beq x4,x22,80001348 +8000133c: 204042ef jal x5,80005540 +80001340: 80001330 .word 0x80001330 +80001344: 8000a57c .word 0x8000a57c +80001348: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x1710537b +8000134c: 0001a983 lw x19,0(x3) +80001350: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x00000000 +80001354: 0001a403 lw x8,0(x3) +80001358: 00418193 addi x3,x3,4 + +8000135c : +Zbkb_xnor_cg_cp_rs2_edges_0x0: + xnor x13, x19, x8 # perform operation +8000135c: 4089c6b3 xnor x13,x19,x8 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cp_rs2_edges_0x0, Zbkb_xnor_cg_cp_rs2_edges_0x0_str) +80001360: 0004a203 lw x4,0(x9) +80001364: 00d20863 beq x4,x13,80001374 +80001368: 1d8042ef jal x5,80005540 +8000136c: 8000135c .word 0x8000135c +80001370: 8000a5bd .word 0x8000a5bd +80001374: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x47cbc300 +80001378: 0001ab03 lw x22,0(x3) +8000137c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x00000001 +80001380: 0001ac03 lw x24,0(x3) +80001384: 00418193 addi x3,x3,4 + +80001388 : +Zbkb_xnor_cg_cp_rs2_edges_0x1: + xnor x10, x22, x24 # perform operation +80001388: 418b4533 xnor x10,x22,x24 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cp_rs2_edges_0x1, Zbkb_xnor_cg_cp_rs2_edges_0x1_str) +8000138c: 0004a203 lw x4,0(x9) +80001390: 00a20863 beq x4,x10,800013a0 +80001394: 1ac042ef jal x5,80005540 +80001398: 80001388 .word 0x80001388 +8000139c: 8000a5f7 .word 0x8000a5f7 +800013a0: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x3786f212 +800013a4: 0001ac83 lw x25,0(x3) +800013a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x00000002 +800013ac: 0001a403 lw x8,0(x3) +800013b0: 00418193 addi x3,x3,4 + +800013b4 : +Zbkb_xnor_cg_cp_rs2_edges_0x2: + xnor x12, x25, x8 # perform operation +800013b4: 408cc633 xnor x12,x25,x8 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cp_rs2_edges_0x2, Zbkb_xnor_cg_cp_rs2_edges_0x2_str) +800013b8: 0004a203 lw x4,0(x9) +800013bc: 00c20863 beq x4,x12,800013cc +800013c0: 180042ef jal x5,80005540 +800013c4: 800013b4 .word 0x800013b4 +800013c8: 8000a631 .word 0x8000a631 +800013cc: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x26cda312 +800013d0: 0001a603 lw x12,0(x3) +800013d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x80000000 +800013d8: 0001ae03 lw x28,0(x3) +800013dc: 00418193 addi x3,x3,4 + +800013e0 : +Zbkb_xnor_cg_cp_rs2_edges_0x80000000: + xnor x21, x12, x28 # perform operation +800013e0: 41c64ab3 xnor x21,x12,x28 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_xnor_cg_cp_rs2_edges_0x80000000, Zbkb_xnor_cg_cp_rs2_edges_0x80000000_str) +800013e4: 0004a203 lw x4,0(x9) +800013e8: 01520863 beq x4,x21,800013f8 +800013ec: 154042ef jal x5,80005540 +800013f0: 800013e0 .word 0x800013e0 +800013f4: 8000a66b .word 0x8000a66b +800013f8: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xeded7694 +800013fc: 0001ab83 lw x23,0(x3) +80001400: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x80000001 +80001404: 0001ae83 lw x29,0(x3) +80001408: 00418193 addi x3,x3,4 + +8000140c : +Zbkb_xnor_cg_cp_rs2_edges_0x80000001: + xnor x17, x23, x29 # perform operation +8000140c: 41dbc8b3 xnor x17,x23,x29 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_xnor_cg_cp_rs2_edges_0x80000001, Zbkb_xnor_cg_cp_rs2_edges_0x80000001_str) +80001410: 0004a203 lw x4,0(x9) +80001414: 01120863 beq x4,x17,80001424 +80001418: 128042ef jal x5,80005540 +8000141c: 8000140c .word 0x8000140c +80001420: 8000a6ac .word 0x8000a6ac +80001424: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xfee73286 +80001428: 0001af03 lw x30,0(x3) +8000142c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x7fffffff +80001430: 0001a103 lw x2,0(x3) +80001434: 00418193 addi x3,x3,4 + +80001438 : +Zbkb_xnor_cg_cp_rs2_edges_0x7fffffff: + xnor x21, x30, x2 # perform operation +80001438: 402f4ab3 xnor x21,x30,x2 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_xnor_cg_cp_rs2_edges_0x7fffffff, Zbkb_xnor_cg_cp_rs2_edges_0x7fffffff_str) +8000143c: 0004a203 lw x4,0(x9) +80001440: 01520863 beq x4,x21,80001450 +80001444: 0fc042ef jal x5,80005540 +80001448: 80001438 .word 0x80001438 +8000144c: 8000a6ed .word 0x8000a6ed +80001450: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x6f2c3e35 +80001454: 0001ad83 lw x27,0(x3) +80001458: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7ffffffe +8000145c: 0001a883 lw x17,0(x3) +80001460: 00418193 addi x3,x3,4 + +80001464 : +Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffe: + xnor x18, x27, x17 # perform operation +80001464: 411dc933 xnor x18,x27,x17 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffe, Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffe_str) +80001468: 0004a203 lw x4,0(x9) +8000146c: 01220863 beq x4,x18,8000147c +80001470: 0d0042ef jal x5,80005540 +80001474: 80001464 .word 0x80001464 +80001478: 8000a72e .word 0x8000a72e +8000147c: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x3bfc44df +80001480: 0001ac83 lw x25,0(x3) +80001484: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xffffffff +80001488: 0001a983 lw x19,0(x3) +8000148c: 00418193 addi x3,x3,4 + +80001490 : +Zbkb_xnor_cg_cp_rs2_edges_0xffffffff: + xnor x12, x25, x19 # perform operation +80001490: 413cc633 xnor x12,x25,x19 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cp_rs2_edges_0xffffffff, Zbkb_xnor_cg_cp_rs2_edges_0xffffffff_str) +80001494: 0004a203 lw x4,0(x9) +80001498: 00c20863 beq x4,x12,800014a8 +8000149c: 0a4042ef jal x5,80005540 +800014a0: 80001490 .word 0x80001490 +800014a4: 8000a76f .word 0x8000a76f +800014a8: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x1b159987 +800014ac: 0001a603 lw x12,0(x3) +800014b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xfffffffe +800014b4: 0001a083 lw x1,0(x3) +800014b8: 00418193 addi x3,x3,4 + +800014bc : +Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe: + xnor x7, x12, x1 # perform operation +800014bc: 401643b3 xnor x7,x12,x1 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe_str) +800014c0: 0004a203 lw x4,0(x9) +800014c4: 00720863 beq x4,x7,800014d4 +800014c8: 078042ef jal x5,80005540 +800014cc: 800014bc .word 0x800014bc +800014d0: 8000a7b0 .word 0x8000a7b0 +800014d4: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xa268b313 +800014d8: 0001a683 lw x13,0(x3) +800014dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x5bbc8872 +800014e0: 0001af03 lw x30,0(x3) +800014e4: 00418193 addi x3,x3,4 + +800014e8 : +Zbkb_xnor_cg_cp_rs2_edges_0x5bbc8872: + xnor x7, x13, x30 # perform operation +800014e8: 41e6c3b3 xnor x7,x13,x30 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cp_rs2_edges_0x5bbc8872, Zbkb_xnor_cg_cp_rs2_edges_0x5bbc8872_str) +800014ec: 0004a203 lw x4,0(x9) +800014f0: 00720863 beq x4,x7,80001500 +800014f4: 04c042ef jal x5,80005540 +800014f8: 800014e8 .word 0x800014e8 +800014fc: 8000a7f1 .word 0x8000a7f1 +80001500: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x2fc58025 +80001504: 0001ab83 lw x23,0(x3) +80001508: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xaaaaaaaa +8000150c: 0001af83 lw x31,0(x3) +80001510: 00418193 addi x3,x3,4 + +80001514 : +Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaa: + xnor x13, x23, x31 # perform operation +80001514: 41fbc6b3 xnor x13,x23,x31 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaa, Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001518: 0004a203 lw x4,0(x9) +8000151c: 00d20863 beq x4,x13,8000152c +80001520: 020042ef jal x5,80005540 +80001524: 80001514 .word 0x80001514 +80001528: 8000a832 .word 0x8000a832 +8000152c: 00448493 addi x9,x9,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0xbd6c989a +80001530: 0001a383 lw x7,0(x3) +80001534: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80001538: 0001ae03 lw x28,0(x3) +8000153c: 00418193 addi x3,x3,4 + +80001540 : +Zbkb_xnor_cg_cp_rs2_edges_0x55555555: + xnor x6, x7, x28 # perform operation +80001540: 41c3c333 xnor x6,x7,x28 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cp_rs2_edges_0x55555555, Zbkb_xnor_cg_cp_rs2_edges_0x55555555_str) +80001544: 0004a203 lw x4,0(x9) +80001548: 00620863 beq x4,x6,80001558 +8000154c: 7f5032ef jal x5,80005540 +80001550: 80001540 .word 0x80001540 +80001554: 8000a873 .word 0x8000a873 +80001558: 00448493 addi x9,x9,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000000 +8000155c: 0001aa03 lw x20,0(x3) +80001560: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x00000000 +80001564: 0001ad03 lw x26,0(x3) +80001568: 00418193 addi x3,x3,4 + +8000156c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xnor x8, x20, x26 # perform operation +8000156c: 41aa4433 xnor x8,x20,x26 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001570: 0004a203 lw x4,0(x9) +80001574: 00820863 beq x4,x8,80001584 +80001578: 7c9032ef jal x5,80005540 +8000157c: 8000156c .word 0x8000156c +80001580: 8000a8b4 .word 0x8000a8b4 +80001584: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x00000000 +80001588: 0001a103 lw x2,0(x3) +8000158c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000001 +80001590: 0001ae03 lw x28,0(x3) +80001594: 00418193 addi x3,x3,4 + +80001598 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xnor x31, x2, x28 # perform operation +80001598: 41c14fb3 xnor x31,x2,x28 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000159c: 0004a203 lw x4,0(x9) +800015a0: 01f20863 beq x4,x31,800015b0 +800015a4: 79d032ef jal x5,80005540 +800015a8: 80001598 .word 0x80001598 +800015ac: 8000a905 .word 0x8000a905 +800015b0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000000 +800015b4: 0001ac03 lw x24,0(x3) +800015b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x00000002 +800015bc: 0001af03 lw x30,0(x3) +800015c0: 00418193 addi x3,x3,4 + +800015c4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xnor x18, x24, x30 # perform operation +800015c4: 41ec4933 xnor x18,x24,x30 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c8: 0004a203 lw x4,0(x9) +800015cc: 01220863 beq x4,x18,800015dc +800015d0: 771032ef jal x5,80005540 +800015d4: 800015c4 .word 0x800015c4 +800015d8: 8000a956 .word 0x8000a956 +800015dc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +800015e0: 0001af83 lw x31,0(x3) +800015e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x80000000 +800015e8: 0001a303 lw x6,0(x3) +800015ec: 00418193 addi x3,x3,4 + +800015f0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + xnor x25, x31, x6 # perform operation +800015f0: 406fccb3 xnor x25,x31,x6 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015f4: 0004a203 lw x4,0(x9) +800015f8: 01920863 beq x4,x25,80001608 +800015fc: 745032ef jal x5,80005540 +80001600: 800015f0 .word 0x800015f0 +80001604: 8000a9a7 .word 0x8000a9a7 +80001608: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000000 +8000160c: 0001ae83 lw x29,0(x3) +80001610: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x80000001 +80001614: 0001ac03 lw x24,0(x3) +80001618: 00418193 addi x3,x3,4 + +8000161c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + xnor x10, x29, x24 # perform operation +8000161c: 418ec533 xnor x10,x29,x24 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001620: 0004a203 lw x4,0(x9) +80001624: 00a20863 beq x4,x10,80001634 +80001628: 719032ef jal x5,80005540 +8000162c: 8000161c .word 0x8000161c +80001630: 8000a9ff .word 0x8000a9ff +80001634: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x00000000 +80001638: 0001a503 lw x10,0(x3) +8000163c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x7fffffff +80001640: 0001a803 lw x16,0(x3) +80001644: 00418193 addi x3,x3,4 + +80001648 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + xnor x20, x10, x16 # perform operation +80001648: 41054a33 xnor x20,x10,x16 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000164c: 0004a203 lw x4,0(x9) +80001650: 01420863 beq x4,x20,80001660 +80001654: 6ed032ef jal x5,80005540 +80001658: 80001648 .word 0x80001648 +8000165c: 8000aa57 .word 0x8000aa57 +80001660: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000000 +80001664: 0001aa03 lw x20,0(x3) +80001668: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7ffffffe +8000166c: 0001a903 lw x18,0(x3) +80001670: 00418193 addi x3,x3,4 + +80001674 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + xnor x30, x20, x18 # perform operation +80001674: 412a4f33 xnor x30,x20,x18 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001678: 0004a203 lw x4,0(x9) +8000167c: 01e20863 beq x4,x30,8000168c +80001680: 6c1032ef jal x5,80005540 +80001684: 80001674 .word 0x80001674 +80001688: 8000aaaf .word 0x8000aaaf +8000168c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000000 +80001690: 0001a983 lw x19,0(x3) +80001694: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xffffffff +80001698: 0001a083 lw x1,0(x3) +8000169c: 00418193 addi x3,x3,4 + +800016a0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xnor x20, x19, x1 # perform operation +800016a0: 4019ca33 xnor x20,x19,x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +800016a4: 0004a203 lw x4,0(x9) +800016a8: 01420863 beq x4,x20,800016b8 +800016ac: 695032ef jal x5,80005540 +800016b0: 800016a0 .word 0x800016a0 +800016b4: 8000ab07 .word 0x8000ab07 +800016b8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +800016bc: 0001af03 lw x30,0(x3) +800016c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xfffffffe +800016c4: 0001ad03 lw x26,0(x3) +800016c8: 00418193 addi x3,x3,4 + +800016cc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xnor x28, x30, x26 # perform operation +800016cc: 41af4e33 xnor x28,x30,x26 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016d0: 0004a203 lw x4,0(x9) +800016d4: 01c20863 beq x4,x28,800016e4 +800016d8: 669032ef jal x5,80005540 +800016dc: 800016cc .word 0x800016cc +800016e0: 8000ab5f .word 0x8000ab5f +800016e4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x00000000 +800016e8: 0001ad83 lw x27,0(x3) +800016ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x5bbc8872 +800016f0: 0001af83 lw x31,0(x3) +800016f4: 00418193 addi x3,x3,4 + +800016f8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + xnor x15, x27, x31 # perform operation +800016f8: 41fdc7b3 xnor x15,x27,x31 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016fc: 0004a203 lw x4,0(x9) +80001700: 00f20863 beq x4,x15,80001710 +80001704: 63d032ef jal x5,80005540 +80001708: 800016f8 .word 0x800016f8 +8000170c: 8000abb7 .word 0x8000abb7 +80001710: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +80001714: 0001af83 lw x31,0(x3) +80001718: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xaaaaaaaa +8000171c: 0001ac03 lw x24,0(x3) +80001720: 00418193 addi x3,x3,4 + +80001724 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + xnor x18, x31, x24 # perform operation +80001724: 418fc933 xnor x18,x31,x24 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001728: 0004a203 lw x4,0(x9) +8000172c: 01220863 beq x4,x18,8000173c +80001730: 611032ef jal x5,80005540 +80001734: 80001724 .word 0x80001724 +80001738: 8000ac0f .word 0x8000ac0f +8000173c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000000 +80001740: 0001ae83 lw x29,0(x3) +80001744: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x55555555 +80001748: 0001af83 lw x31,0(x3) +8000174c: 00418193 addi x3,x3,4 + +80001750 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + xnor x22, x29, x31 # perform operation +80001750: 41fecb33 xnor x22,x29,x31 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001754: 0004a203 lw x4,0(x9) +80001758: 01620863 beq x4,x22,80001768 +8000175c: 5e5032ef jal x5,80005540 +80001760: 80001750 .word 0x80001750 +80001764: 8000ac67 .word 0x8000ac67 +80001768: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000001 +8000176c: 0001a703 lw x14,0(x3) +80001770: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000000 +80001774: 0001ae03 lw x28,0(x3) +80001778: 00418193 addi x3,x3,4 + +8000177c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xnor x19, x14, x28 # perform operation +8000177c: 41c749b3 xnor x19,x14,x28 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001780: 0004a203 lw x4,0(x9) +80001784: 01320863 beq x4,x19,80001794 +80001788: 5b9032ef jal x5,80005540 +8000178c: 8000177c .word 0x8000177c +80001790: 8000acbf .word 0x8000acbf +80001794: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000001 +80001798: 0001af03 lw x30,0(x3) +8000179c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x00000001 +800017a0: 0001ac83 lw x25,0(x3) +800017a4: 00418193 addi x3,x3,4 + +800017a8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xnor x14, x30, x25 # perform operation +800017a8: 419f4733 xnor x14,x30,x25 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017ac: 0004a203 lw x4,0(x9) +800017b0: 00e20863 beq x4,x14,800017c0 +800017b4: 58d032ef jal x5,80005540 +800017b8: 800017a8 .word 0x800017a8 +800017bc: 8000ad10 .word 0x8000ad10 +800017c0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x00000001 +800017c4: 0001a103 lw x2,0(x3) +800017c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000002 +800017cc: 0001a603 lw x12,0(x3) +800017d0: 00418193 addi x3,x3,4 + +800017d4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xnor x23, x2, x12 # perform operation +800017d4: 40c14bb3 xnor x23,x2,x12 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d8: 0004a203 lw x4,0(x9) +800017dc: 01720863 beq x4,x23,800017ec +800017e0: 561032ef jal x5,80005540 +800017e4: 800017d4 .word 0x800017d4 +800017e8: 8000ad61 .word 0x8000ad61 +800017ec: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000001 +800017f0: 0001a983 lw x19,0(x3) +800017f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x80000000 +800017f8: 0001a903 lw x18,0(x3) +800017fc: 00418193 addi x3,x3,4 + +80001800 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + xnor x14, x19, x18 # perform operation +80001800: 4129c733 xnor x14,x19,x18 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +80001804: 0004a203 lw x4,0(x9) +80001808: 00e20863 beq x4,x14,80001818 +8000180c: 535032ef jal x5,80005540 +80001810: 80001800 .word 0x80001800 +80001814: 8000adb2 .word 0x8000adb2 +80001818: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x00000001 +8000181c: 0001a083 lw x1,0(x3) +80001820: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x80000001 +80001824: 0001a903 lw x18,0(x3) +80001828: 00418193 addi x3,x3,4 + +8000182c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + xnor x23, x1, x18 # perform operation +8000182c: 4120cbb3 xnor x23,x1,x18 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001830: 0004a203 lw x4,0(x9) +80001834: 01720863 beq x4,x23,80001844 +80001838: 509032ef jal x5,80005540 +8000183c: 8000182c .word 0x8000182c +80001840: 8000ae0a .word 0x8000ae0a +80001844: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000001 +80001848: 0001af03 lw x30,0(x3) +8000184c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7fffffff +80001850: 0001aa03 lw x20,0(x3) +80001854: 00418193 addi x3,x3,4 + +80001858 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + xnor x18, x30, x20 # perform operation +80001858: 414f4933 xnor x18,x30,x20 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000185c: 0004a203 lw x4,0(x9) +80001860: 01220863 beq x4,x18,80001870 +80001864: 4dd032ef jal x5,80005540 +80001868: 80001858 .word 0x80001858 +8000186c: 8000ae62 .word 0x8000ae62 +80001870: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x00000001 +80001874: 0001a903 lw x18,0(x3) +80001878: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x7ffffffe +8000187c: 0001a303 lw x6,0(x3) +80001880: 00418193 addi x3,x3,4 + +80001884 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + xnor x12, x18, x6 # perform operation +80001884: 40694633 xnor x12,x18,x6 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001888: 0004a203 lw x4,0(x9) +8000188c: 00c20863 beq x4,x12,8000189c +80001890: 4b1032ef jal x5,80005540 +80001894: 80001884 .word 0x80001884 +80001898: 8000aeba .word 0x8000aeba +8000189c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000001 +800018a0: 0001ae83 lw x29,0(x3) +800018a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xffffffff +800018a8: 0001a103 lw x2,0(x3) +800018ac: 00418193 addi x3,x3,4 + +800018b0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xnor x19, x29, x2 # perform operation +800018b0: 402ec9b3 xnor x19,x29,x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018b4: 0004a203 lw x4,0(x9) +800018b8: 01320863 beq x4,x19,800018c8 +800018bc: 485032ef jal x5,80005540 +800018c0: 800018b0 .word 0x800018b0 +800018c4: 8000af12 .word 0x8000af12 +800018c8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x00000001 +800018cc: 0001a103 lw x2,0(x3) +800018d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xfffffffe +800018d4: 0001a403 lw x8,0(x3) +800018d8: 00418193 addi x3,x3,4 + +800018dc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xnor x18, x2, x8 # perform operation +800018dc: 40814933 xnor x18,x2,x8 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018e0: 0004a203 lw x4,0(x9) +800018e4: 01220863 beq x4,x18,800018f4 +800018e8: 459032ef jal x5,80005540 +800018ec: 800018dc .word 0x800018dc +800018f0: 8000af6a .word 0x8000af6a +800018f4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x00000001 +800018f8: 0001ad03 lw x26,0(x3) +800018fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x5bbc8872 +80001900: 0001a603 lw x12,0(x3) +80001904: 00418193 addi x3,x3,4 + +80001908 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + xnor x13, x26, x12 # perform operation +80001908: 40cd46b3 xnor x13,x26,x12 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +8000190c: 0004a203 lw x4,0(x9) +80001910: 00d20863 beq x4,x13,80001920 +80001914: 42d032ef jal x5,80005540 +80001918: 80001908 .word 0x80001908 +8000191c: 8000afc2 .word 0x8000afc2 +80001920: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000001 +80001924: 0001ae83 lw x29,0(x3) +80001928: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xaaaaaaaa +8000192c: 0001aa83 lw x21,0(x3) +80001930: 00418193 addi x3,x3,4 + +80001934 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + xnor x6, x29, x21 # perform operation +80001934: 415ec333 xnor x6,x29,x21 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001938: 0004a203 lw x4,0(x9) +8000193c: 00620863 beq x4,x6,8000194c +80001940: 401032ef jal x5,80005540 +80001944: 80001934 .word 0x80001934 +80001948: 8000b01a .word 0x8000b01a +8000194c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x00000001 +80001950: 0001ae03 lw x28,0(x3) +80001954: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x55555555 +80001958: 0001a903 lw x18,0(x3) +8000195c: 00418193 addi x3,x3,4 + +80001960 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + xnor x23, x28, x18 # perform operation +80001960: 412e4bb3 xnor x23,x28,x18 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001964: 0004a203 lw x4,0(x9) +80001968: 01720863 beq x4,x23,80001978 +8000196c: 3d5032ef jal x5,80005540 +80001970: 80001960 .word 0x80001960 +80001974: 8000b072 .word 0x8000b072 +80001978: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x00000002 +8000197c: 0001a383 lw x7,0(x3) +80001980: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x00000000 +80001984: 0001a583 lw x11,0(x3) +80001988: 00418193 addi x3,x3,4 + +8000198c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xnor x6, x7, x11 # perform operation +8000198c: 40b3c333 xnor x6,x7,x11 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001990: 0004a203 lw x4,0(x9) +80001994: 00620863 beq x4,x6,800019a4 +80001998: 3a9032ef jal x5,80005540 +8000199c: 8000198c .word 0x8000198c +800019a0: 8000b0ca .word 0x8000b0ca +800019a4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000002 +800019a8: 0001ac83 lw x25,0(x3) +800019ac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000001 +800019b0: 0001a683 lw x13,0(x3) +800019b4: 00418193 addi x3,x3,4 + +800019b8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xnor x19, x25, x13 # perform operation +800019b8: 40dcc9b3 xnor x19,x25,x13 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019bc: 0004a203 lw x4,0(x9) +800019c0: 01320863 beq x4,x19,800019d0 +800019c4: 37d032ef jal x5,80005540 +800019c8: 800019b8 .word 0x800019b8 +800019cc: 8000b11b .word 0x8000b11b +800019d0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000002 +800019d4: 0001a683 lw x13,0(x3) +800019d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000002 +800019dc: 0001aa83 lw x21,0(x3) +800019e0: 00418193 addi x3,x3,4 + +800019e4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xnor x22, x13, x21 # perform operation +800019e4: 4156cb33 xnor x22,x13,x21 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e8: 0004a203 lw x4,0(x9) +800019ec: 01620863 beq x4,x22,800019fc +800019f0: 351032ef jal x5,80005540 +800019f4: 800019e4 .word 0x800019e4 +800019f8: 8000b16c .word 0x8000b16c +800019fc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x00000002 +80001a00: 0001a783 lw x15,0(x3) +80001a04: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000000 +80001a08: 0001ab03 lw x22,0(x3) +80001a0c: 00418193 addi x3,x3,4 + +80001a10 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + xnor x12, x15, x22 # perform operation +80001a10: 4167c633 xnor x12,x15,x22 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a14: 0004a203 lw x4,0(x9) +80001a18: 00c20863 beq x4,x12,80001a28 +80001a1c: 325032ef jal x5,80005540 +80001a20: 80001a10 .word 0x80001a10 +80001a24: 8000b1bd .word 0x8000b1bd +80001a28: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x00000002 +80001a2c: 0001a303 lw x6,0(x3) +80001a30: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x80000001 +80001a34: 0001ad03 lw x26,0(x3) +80001a38: 00418193 addi x3,x3,4 + +80001a3c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + xnor x29, x6, x26 # perform operation +80001a3c: 41a34eb3 xnor x29,x6,x26 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a40: 0004a203 lw x4,0(x9) +80001a44: 01d20863 beq x4,x29,80001a54 +80001a48: 2f9032ef jal x5,80005540 +80001a4c: 80001a3c .word 0x80001a3c +80001a50: 8000b215 .word 0x8000b215 +80001a54: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x00000002 +80001a58: 0001ab03 lw x22,0(x3) +80001a5c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x7fffffff +80001a60: 0001a403 lw x8,0(x3) +80001a64: 00418193 addi x3,x3,4 + +80001a68 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + xnor x28, x22, x8 # perform operation +80001a68: 408b4e33 xnor x28,x22,x8 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a6c: 0004a203 lw x4,0(x9) +80001a70: 01c20863 beq x4,x28,80001a80 +80001a74: 2cd032ef jal x5,80005540 +80001a78: 80001a68 .word 0x80001a68 +80001a7c: 8000b26d .word 0x8000b26d +80001a80: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x00000002 +80001a84: 0001a403 lw x8,0(x3) +80001a88: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7ffffffe +80001a8c: 0001a683 lw x13,0(x3) +80001a90: 00418193 addi x3,x3,4 + +80001a94 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + xnor x24, x8, x13 # perform operation +80001a94: 40d44c33 xnor x24,x8,x13 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a98: 0004a203 lw x4,0(x9) +80001a9c: 01820863 beq x4,x24,80001aac +80001aa0: 2a1032ef jal x5,80005540 +80001aa4: 80001a94 .word 0x80001a94 +80001aa8: 8000b2c5 .word 0x8000b2c5 +80001aac: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x00000002 +80001ab0: 0001ad03 lw x26,0(x3) +80001ab4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xffffffff +80001ab8: 0001a783 lw x15,0(x3) +80001abc: 00418193 addi x3,x3,4 + +80001ac0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xnor x27, x26, x15 # perform operation +80001ac0: 40fd4db3 xnor x27,x26,x15 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ac4: 0004a203 lw x4,0(x9) +80001ac8: 01b20863 beq x4,x27,80001ad8 +80001acc: 275032ef jal x5,80005540 +80001ad0: 80001ac0 .word 0x80001ac0 +80001ad4: 8000b31d .word 0x8000b31d +80001ad8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x00000002 +80001adc: 0001ad83 lw x27,0(x3) +80001ae0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xfffffffe +80001ae4: 0001ac03 lw x24,0(x3) +80001ae8: 00418193 addi x3,x3,4 + +80001aec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xnor x11, x27, x24 # perform operation +80001aec: 418dc5b3 xnor x11,x27,x24 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001af0: 0004a203 lw x4,0(x9) +80001af4: 00b20863 beq x4,x11,80001b04 +80001af8: 249032ef jal x5,80005540 +80001afc: 80001aec .word 0x80001aec +80001b00: 8000b375 .word 0x8000b375 +80001b04: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000002 +80001b08: 0001af03 lw x30,0(x3) +80001b0c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x5bbc8872 +80001b10: 0001a503 lw x10,0(x3) +80001b14: 00418193 addi x3,x3,4 + +80001b18 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + xnor x20, x30, x10 # perform operation +80001b18: 40af4a33 xnor x20,x30,x10 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b1c: 0004a203 lw x4,0(x9) +80001b20: 01420863 beq x4,x20,80001b30 +80001b24: 21d032ef jal x5,80005540 +80001b28: 80001b18 .word 0x80001b18 +80001b2c: 8000b3cd .word 0x8000b3cd +80001b30: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000002 +80001b34: 0001a983 lw x19,0(x3) +80001b38: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0xaaaaaaaa +80001b3c: 0001a303 lw x6,0(x3) +80001b40: 00418193 addi x3,x3,4 + +80001b44 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + xnor x13, x19, x6 # perform operation +80001b44: 4069c6b3 xnor x13,x19,x6 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b48: 0004a203 lw x4,0(x9) +80001b4c: 00d20863 beq x4,x13,80001b5c +80001b50: 1f1032ef jal x5,80005540 +80001b54: 80001b44 .word 0x80001b44 +80001b58: 8000b425 .word 0x8000b425 +80001b5c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000002 +80001b60: 0001ac83 lw x25,0(x3) +80001b64: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80001b68: 0001ae03 lw x28,0(x3) +80001b6c: 00418193 addi x3,x3,4 + +80001b70 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + xnor x7, x25, x28 # perform operation +80001b70: 41ccc3b3 xnor x7,x25,x28 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b74: 0004a203 lw x4,0(x9) +80001b78: 00720863 beq x4,x7,80001b88 +80001b7c: 1c5032ef jal x5,80005540 +80001b80: 80001b70 .word 0x80001b70 +80001b84: 8000b47d .word 0x8000b47d +80001b88: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x80000000 +80001b8c: 0001af03 lw x30,0(x3) +80001b90: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000000 +80001b94: 0001af83 lw x31,0(x3) +80001b98: 00418193 addi x3,x3,4 + +80001b9c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + xnor x22, x30, x31 # perform operation +80001b9c: 41ff4b33 xnor x22,x30,x31 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001ba0: 0004a203 lw x4,0(x9) +80001ba4: 01620863 beq x4,x22,80001bb4 +80001ba8: 199032ef jal x5,80005540 +80001bac: 80001b9c .word 0x80001b9c +80001bb0: 8000b4d5 .word 0x8000b4d5 +80001bb4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x80000000 +80001bb8: 0001a903 lw x18,0(x3) +80001bbc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x00000001 +80001bc0: 0001a503 lw x10,0(x3) +80001bc4: 00418193 addi x3,x3,4 + +80001bc8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + xnor x11, x18, x10 # perform operation +80001bc8: 40a945b3 xnor x11,x18,x10 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bcc: 0004a203 lw x4,0(x9) +80001bd0: 00b20863 beq x4,x11,80001be0 +80001bd4: 16d032ef jal x5,80005540 +80001bd8: 80001bc8 .word 0x80001bc8 +80001bdc: 8000b52d .word 0x8000b52d +80001be0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x80000000 +80001be4: 0001a303 lw x6,0(x3) +80001be8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000002 +80001bec: 0001aa03 lw x20,0(x3) +80001bf0: 00418193 addi x3,x3,4 + +80001bf4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + xnor x16, x6, x20 # perform operation +80001bf4: 41434833 xnor x16,x6,x20 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf8: 0004a203 lw x4,0(x9) +80001bfc: 01020863 beq x4,x16,80001c0c +80001c00: 141032ef jal x5,80005540 +80001c04: 80001bf4 .word 0x80001bf4 +80001c08: 8000b585 .word 0x8000b585 +80001c0c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x80000000 +80001c10: 0001ae03 lw x28,0(x3) +80001c14: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x80000000 +80001c18: 0001a883 lw x17,0(x3) +80001c1c: 00418193 addi x3,x3,4 + +80001c20 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + xnor x24, x28, x17 # perform operation +80001c20: 411e4c33 xnor x24,x28,x17 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c24: 0004a203 lw x4,0(x9) +80001c28: 01820863 beq x4,x24,80001c38 +80001c2c: 115032ef jal x5,80005540 +80001c30: 80001c20 .word 0x80001c20 +80001c34: 8000b5dd .word 0x8000b5dd +80001c38: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x80000000 +80001c3c: 0001a883 lw x17,0(x3) +80001c40: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000001 +80001c44: 0001ab03 lw x22,0(x3) +80001c48: 00418193 addi x3,x3,4 + +80001c4c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + xnor x24, x17, x22 # perform operation +80001c4c: 4168cc33 xnor x24,x17,x22 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c50: 0004a203 lw x4,0(x9) +80001c54: 01820863 beq x4,x24,80001c64 +80001c58: 0e9032ef jal x5,80005540 +80001c5c: 80001c4c .word 0x80001c4c +80001c60: 8000b63c .word 0x8000b63c +80001c64: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x80000000 +80001c68: 0001a903 lw x18,0(x3) +80001c6c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7fffffff +80001c70: 0001a703 lw x14,0(x3) +80001c74: 00418193 addi x3,x3,4 + +80001c78 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + xnor x20, x18, x14 # perform operation +80001c78: 40e94a33 xnor x20,x18,x14 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c7c: 0004a203 lw x4,0(x9) +80001c80: 01420863 beq x4,x20,80001c90 +80001c84: 0bd032ef jal x5,80005540 +80001c88: 80001c78 .word 0x80001c78 +80001c8c: 8000b69b .word 0x8000b69b +80001c90: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000000 +80001c94: 0001ab03 lw x22,0(x3) +80001c98: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7ffffffe +80001c9c: 0001a903 lw x18,0(x3) +80001ca0: 00418193 addi x3,x3,4 + +80001ca4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + xnor x23, x22, x18 # perform operation +80001ca4: 412b4bb3 xnor x23,x22,x18 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca8: 0004a203 lw x4,0(x9) +80001cac: 01720863 beq x4,x23,80001cbc +80001cb0: 091032ef jal x5,80005540 +80001cb4: 80001ca4 .word 0x80001ca4 +80001cb8: 8000b6fa .word 0x8000b6fa +80001cbc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x80000000 +80001cc0: 0001ad03 lw x26,0(x3) +80001cc4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xffffffff +80001cc8: 0001a903 lw x18,0(x3) +80001ccc: 00418193 addi x3,x3,4 + +80001cd0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + xnor x2, x26, x18 # perform operation +80001cd0: 412d4133 xnor x2,x26,x18 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cd4: 0004a203 lw x4,0(x9) +80001cd8: 00220863 beq x4,x2,80001ce8 +80001cdc: 065032ef jal x5,80005540 +80001ce0: 80001cd0 .word 0x80001cd0 +80001ce4: 8000b759 .word 0x8000b759 +80001ce8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x80000000 +80001cec: 0001ae03 lw x28,0(x3) +80001cf0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xfffffffe +80001cf4: 0001a883 lw x17,0(x3) +80001cf8: 00418193 addi x3,x3,4 + +80001cfc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + xnor x10, x28, x17 # perform operation +80001cfc: 411e4533 xnor x10,x28,x17 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001d00: 0004a203 lw x4,0(x9) +80001d04: 00a20863 beq x4,x10,80001d14 +80001d08: 039032ef jal x5,80005540 +80001d0c: 80001cfc .word 0x80001cfc +80001d10: 8000b7b8 .word 0x8000b7b8 +80001d14: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x80000000 +80001d18: 0001ae83 lw x29,0(x3) +80001d1c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x5bbc8872 +80001d20: 0001af83 lw x31,0(x3) +80001d24: 00418193 addi x3,x3,4 + +80001d28 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + xnor x16, x29, x31 # perform operation +80001d28: 41fec833 xnor x16,x29,x31 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d2c: 0004a203 lw x4,0(x9) +80001d30: 01020863 beq x4,x16,80001d40 +80001d34: 00d032ef jal x5,80005540 +80001d38: 80001d28 .word 0x80001d28 +80001d3c: 8000b817 .word 0x8000b817 +80001d40: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x80000000 +80001d44: 0001a503 lw x10,0(x3) +80001d48: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xaaaaaaaa +80001d4c: 0001aa03 lw x20,0(x3) +80001d50: 00418193 addi x3,x3,4 + +80001d54 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + xnor x28, x10, x20 # perform operation +80001d54: 41454e33 xnor x28,x10,x20 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d58: 0004a203 lw x4,0(x9) +80001d5c: 01c20863 beq x4,x28,80001d6c +80001d60: 7e0032ef jal x5,80005540 +80001d64: 80001d54 .word 0x80001d54 +80001d68: 8000b876 .word 0x8000b876 +80001d6c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x80000000 +80001d70: 0001a883 lw x17,0(x3) +80001d74: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x55555555 +80001d78: 0001a503 lw x10,0(x3) +80001d7c: 00418193 addi x3,x3,4 + +80001d80 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + xnor x16, x17, x10 # perform operation +80001d80: 40a8c833 xnor x16,x17,x10 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d84: 0004a203 lw x4,0(x9) +80001d88: 01020863 beq x4,x16,80001d98 +80001d8c: 7b4032ef jal x5,80005540 +80001d90: 80001d80 .word 0x80001d80 +80001d94: 8000b8d5 .word 0x8000b8d5 +80001d98: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x80000001 +80001d9c: 0001ae83 lw x29,0(x3) +80001da0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x00000000 +80001da4: 0001ac03 lw x24,0(x3) +80001da8: 00418193 addi x3,x3,4 + +80001dac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + xnor x23, x29, x24 # perform operation +80001dac: 418ecbb3 xnor x23,x29,x24 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001db0: 0004a203 lw x4,0(x9) +80001db4: 01720863 beq x4,x23,80001dc4 +80001db8: 788032ef jal x5,80005540 +80001dbc: 80001dac .word 0x80001dac +80001dc0: 8000b934 .word 0x8000b934 +80001dc4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x80000001 +80001dc8: 0001a103 lw x2,0(x3) +80001dcc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000001 +80001dd0: 0001af83 lw x31,0(x3) +80001dd4: 00418193 addi x3,x3,4 + +80001dd8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + xnor x24, x2, x31 # perform operation +80001dd8: 41f14c33 xnor x24,x2,x31 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001ddc: 0004a203 lw x4,0(x9) +80001de0: 01820863 beq x4,x24,80001df0 +80001de4: 75c032ef jal x5,80005540 +80001de8: 80001dd8 .word 0x80001dd8 +80001dec: 8000b98c .word 0x8000b98c +80001df0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000001 +80001df4: 0001ab03 lw x22,0(x3) +80001df8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000002 +80001dfc: 0001a603 lw x12,0(x3) +80001e00: 00418193 addi x3,x3,4 + +80001e04 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + xnor x27, x22, x12 # perform operation +80001e04: 40cb4db3 xnor x27,x22,x12 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e08: 0004a203 lw x4,0(x9) +80001e0c: 01b20863 beq x4,x27,80001e1c +80001e10: 730032ef jal x5,80005540 +80001e14: 80001e04 .word 0x80001e04 +80001e18: 8000b9e4 .word 0x8000b9e4 +80001e1c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x80000001 +80001e20: 0001ab83 lw x23,0(x3) +80001e24: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000000 +80001e28: 0001a783 lw x15,0(x3) +80001e2c: 00418193 addi x3,x3,4 + +80001e30 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + xnor x16, x23, x15 # perform operation +80001e30: 40fbc833 xnor x16,x23,x15 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e34: 0004a203 lw x4,0(x9) +80001e38: 01020863 beq x4,x16,80001e48 +80001e3c: 704032ef jal x5,80005540 +80001e40: 80001e30 .word 0x80001e30 +80001e44: 8000ba3c .word 0x8000ba3c +80001e48: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x80000001 +80001e4c: 0001a783 lw x15,0(x3) +80001e50: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x80000001 +80001e54: 0001ab83 lw x23,0(x3) +80001e58: 00418193 addi x3,x3,4 + +80001e5c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + xnor x30, x15, x23 # perform operation +80001e5c: 4177cf33 xnor x30,x15,x23 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e60: 0004a203 lw x4,0(x9) +80001e64: 01e20863 beq x4,x30,80001e74 +80001e68: 6d8032ef jal x5,80005540 +80001e6c: 80001e5c .word 0x80001e5c +80001e70: 8000ba9b .word 0x8000ba9b +80001e74: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000001 +80001e78: 0001ab03 lw x22,0(x3) +80001e7c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x7fffffff +80001e80: 0001a983 lw x19,0(x3) +80001e84: 00418193 addi x3,x3,4 + +80001e88 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + xnor x21, x22, x19 # perform operation +80001e88: 413b4ab3 xnor x21,x22,x19 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e8c: 0004a203 lw x4,0(x9) +80001e90: 01520863 beq x4,x21,80001ea0 +80001e94: 6ac032ef jal x5,80005540 +80001e98: 80001e88 .word 0x80001e88 +80001e9c: 8000bafa .word 0x8000bafa +80001ea0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x80000001 +80001ea4: 0001a803 lw x16,0(x3) +80001ea8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7ffffffe +80001eac: 0001a703 lw x14,0(x3) +80001eb0: 00418193 addi x3,x3,4 + +80001eb4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + xnor x28, x16, x14 # perform operation +80001eb4: 40e84e33 xnor x28,x16,x14 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb8: 0004a203 lw x4,0(x9) +80001ebc: 01c20863 beq x4,x28,80001ecc +80001ec0: 680032ef jal x5,80005540 +80001ec4: 80001eb4 .word 0x80001eb4 +80001ec8: 8000bb59 .word 0x8000bb59 +80001ecc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x80000001 +80001ed0: 0001a803 lw x16,0(x3) +80001ed4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffff +80001ed8: 0001a603 lw x12,0(x3) +80001edc: 00418193 addi x3,x3,4 + +80001ee0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + xnor x25, x16, x12 # perform operation +80001ee0: 40c84cb3 xnor x25,x16,x12 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ee4: 0004a203 lw x4,0(x9) +80001ee8: 01920863 beq x4,x25,80001ef8 +80001eec: 654032ef jal x5,80005540 +80001ef0: 80001ee0 .word 0x80001ee0 +80001ef4: 8000bbb8 .word 0x8000bbb8 +80001ef8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000001 +80001efc: 0001a583 lw x11,0(x3) +80001f00: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xfffffffe +80001f04: 0001a983 lw x19,0(x3) +80001f08: 00418193 addi x3,x3,4 + +80001f0c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + xnor x21, x11, x19 # perform operation +80001f0c: 4135cab3 xnor x21,x11,x19 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f10: 0004a203 lw x4,0(x9) +80001f14: 01520863 beq x4,x21,80001f24 +80001f18: 628032ef jal x5,80005540 +80001f1c: 80001f0c .word 0x80001f0c +80001f20: 8000bc17 .word 0x8000bc17 +80001f24: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000001 +80001f28: 0001ab03 lw x22,0(x3) +80001f2c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x5bbc8872 +80001f30: 0001a503 lw x10,0(x3) +80001f34: 00418193 addi x3,x3,4 + +80001f38 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + xnor x29, x22, x10 # perform operation +80001f38: 40ab4eb3 xnor x29,x22,x10 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f3c: 0004a203 lw x4,0(x9) +80001f40: 01d20863 beq x4,x29,80001f50 +80001f44: 5fc032ef jal x5,80005540 +80001f48: 80001f38 .word 0x80001f38 +80001f4c: 8000bc76 .word 0x8000bc76 +80001f50: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000001 +80001f54: 0001a583 lw x11,0(x3) +80001f58: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xaaaaaaaa +80001f5c: 0001a783 lw x15,0(x3) +80001f60: 00418193 addi x3,x3,4 + +80001f64 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + xnor x23, x11, x15 # perform operation +80001f64: 40f5cbb3 xnor x23,x11,x15 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f68: 0004a203 lw x4,0(x9) +80001f6c: 01720863 beq x4,x23,80001f7c +80001f70: 5d0032ef jal x5,80005540 +80001f74: 80001f64 .word 0x80001f64 +80001f78: 8000bcd5 .word 0x8000bcd5 +80001f7c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x80000001 +80001f80: 0001ac83 lw x25,0(x3) +80001f84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x55555555 +80001f88: 0001aa03 lw x20,0(x3) +80001f8c: 00418193 addi x3,x3,4 + +80001f90 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + xnor x26, x25, x20 # perform operation +80001f90: 414ccd33 xnor x26,x25,x20 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f94: 0004a203 lw x4,0(x9) +80001f98: 01a20863 beq x4,x26,80001fa8 +80001f9c: 5a4032ef jal x5,80005540 +80001fa0: 80001f90 .word 0x80001f90 +80001fa4: 8000bd34 .word 0x8000bd34 +80001fa8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x7fffffff +80001fac: 0001a903 lw x18,0(x3) +80001fb0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000000 +80001fb4: 0001a103 lw x2,0(x3) +80001fb8: 00418193 addi x3,x3,4 + +80001fbc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + xnor x23, x18, x2 # perform operation +80001fbc: 40294bb3 xnor x23,x18,x2 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fc0: 0004a203 lw x4,0(x9) +80001fc4: 01720863 beq x4,x23,80001fd4 +80001fc8: 578032ef jal x5,80005540 +80001fcc: 80001fbc .word 0x80001fbc +80001fd0: 8000bd93 .word 0x8000bd93 +80001fd4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x7fffffff +80001fd8: 0001a403 lw x8,0(x3) +80001fdc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000001 +80001fe0: 0001a303 lw x6,0(x3) +80001fe4: 00418193 addi x3,x3,4 + +80001fe8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + xnor x1, x8, x6 # perform operation +80001fe8: 406440b3 xnor x1,x8,x6 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fec: 0004a203 lw x4,0(x9) +80001ff0: 00120863 beq x4,x1,80002000 +80001ff4: 54c032ef jal x5,80005540 +80001ff8: 80001fe8 .word 0x80001fe8 +80001ffc: 8000bdeb .word 0x8000bdeb +80002000: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7fffffff +80002004: 0001ac03 lw x24,0(x3) +80002008: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x00000002 +8000200c: 0001ab83 lw x23,0(x3) +80002010: 00418193 addi x3,x3,4 + +80002014 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + xnor x7, x24, x23 # perform operation +80002014: 417c43b3 xnor x7,x24,x23 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002018: 0004a203 lw x4,0(x9) +8000201c: 00720863 beq x4,x7,8000202c +80002020: 520032ef jal x5,80005540 +80002024: 80002014 .word 0x80002014 +80002028: 8000be43 .word 0x8000be43 +8000202c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x7fffffff +80002030: 0001a903 lw x18,0(x3) +80002034: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x80000000 +80002038: 0001ad83 lw x27,0(x3) +8000203c: 00418193 addi x3,x3,4 + +80002040 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + xnor x10, x18, x27 # perform operation +80002040: 41b94533 xnor x10,x18,x27 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002044: 0004a203 lw x4,0(x9) +80002048: 00a20863 beq x4,x10,80002058 +8000204c: 4f4032ef jal x5,80005540 +80002050: 80002040 .word 0x80002040 +80002054: 8000be9b .word 0x8000be9b +80002058: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x7fffffff +8000205c: 0001a883 lw x17,0(x3) +80002060: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x80000001 +80002064: 0001aa83 lw x21,0(x3) +80002068: 00418193 addi x3,x3,4 + +8000206c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + xnor x13, x17, x21 # perform operation +8000206c: 4158c6b3 xnor x13,x17,x21 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002070: 0004a203 lw x4,0(x9) +80002074: 00d20863 beq x4,x13,80002084 +80002078: 4c8032ef jal x5,80005540 +8000207c: 8000206c .word 0x8000206c +80002080: 8000befa .word 0x8000befa +80002084: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7fffffff +80002088: 0001ac03 lw x24,0(x3) +8000208c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x7fffffff +80002090: 0001a303 lw x6,0(x3) +80002094: 00418193 addi x3,x3,4 + +80002098 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + xnor x7, x24, x6 # perform operation +80002098: 406c43b3 xnor x7,x24,x6 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000209c: 0004a203 lw x4,0(x9) +800020a0: 00720863 beq x4,x7,800020b0 +800020a4: 49c032ef jal x5,80005540 +800020a8: 80002098 .word 0x80002098 +800020ac: 8000bf59 .word 0x8000bf59 +800020b0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x7fffffff +800020b4: 0001ae03 lw x28,0(x3) +800020b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x7ffffffe +800020bc: 0001ab03 lw x22,0(x3) +800020c0: 00418193 addi x3,x3,4 + +800020c4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + xnor x13, x28, x22 # perform operation +800020c4: 416e46b3 xnor x13,x28,x22 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c8: 0004a203 lw x4,0(x9) +800020cc: 00d20863 beq x4,x13,800020dc +800020d0: 470032ef jal x5,80005540 +800020d4: 800020c4 .word 0x800020c4 +800020d8: 8000bfb8 .word 0x8000bfb8 +800020dc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x7fffffff +800020e0: 0001ae03 lw x28,0(x3) +800020e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xffffffff +800020e8: 0001aa03 lw x20,0(x3) +800020ec: 00418193 addi x3,x3,4 + +800020f0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + xnor x25, x28, x20 # perform operation +800020f0: 414e4cb3 xnor x25,x28,x20 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020f4: 0004a203 lw x4,0(x9) +800020f8: 01920863 beq x4,x25,80002108 +800020fc: 444032ef jal x5,80005540 +80002100: 800020f0 .word 0x800020f0 +80002104: 8000c017 .word 0x8000c017 +80002108: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x7fffffff +8000210c: 0001ae83 lw x29,0(x3) +80002110: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xfffffffe +80002114: 0001ac03 lw x24,0(x3) +80002118: 00418193 addi x3,x3,4 + +8000211c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + xnor x11, x29, x24 # perform operation +8000211c: 418ec5b3 xnor x11,x29,x24 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002120: 0004a203 lw x4,0(x9) +80002124: 00b20863 beq x4,x11,80002134 +80002128: 418032ef jal x5,80005540 +8000212c: 8000211c .word 0x8000211c +80002130: 8000c076 .word 0x8000c076 +80002134: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7fffffff +80002138: 0001aa83 lw x21,0(x3) +8000213c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x5bbc8872 +80002140: 0001a783 lw x15,0(x3) +80002144: 00418193 addi x3,x3,4 + +80002148 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + xnor x2, x21, x15 # perform operation +80002148: 40fac133 xnor x2,x21,x15 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000214c: 0004a203 lw x4,0(x9) +80002150: 00220863 beq x4,x2,80002160 +80002154: 3ec032ef jal x5,80005540 +80002158: 80002148 .word 0x80002148 +8000215c: 8000c0d5 .word 0x8000c0d5 +80002160: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x7fffffff +80002164: 0001ad83 lw x27,0(x3) +80002168: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaa +8000216c: 0001a883 lw x17,0(x3) +80002170: 00418193 addi x3,x3,4 + +80002174 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + xnor x10, x27, x17 # perform operation +80002174: 411dc533 xnor x10,x27,x17 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002178: 0004a203 lw x4,0(x9) +8000217c: 00a20863 beq x4,x10,8000218c +80002180: 3c0032ef jal x5,80005540 +80002184: 80002174 .word 0x80002174 +80002188: 8000c134 .word 0x8000c134 +8000218c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x7fffffff +80002190: 0001a503 lw x10,0(x3) +80002194: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x55555555 +80002198: 0001a383 lw x7,0(x3) +8000219c: 00418193 addi x3,x3,4 + +800021a0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + xnor x20, x10, x7 # perform operation +800021a0: 40754a33 xnor x20,x10,x7 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +800021a4: 0004a203 lw x4,0(x9) +800021a8: 01420863 beq x4,x20,800021b8 +800021ac: 394032ef jal x5,80005540 +800021b0: 800021a0 .word 0x800021a0 +800021b4: 8000c193 .word 0x8000c193 +800021b8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x7ffffffe +800021bc: 0001a783 lw x15,0(x3) +800021c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000000 +800021c4: 0001a983 lw x19,0(x3) +800021c8: 00418193 addi x3,x3,4 + +800021cc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + xnor x14, x15, x19 # perform operation +800021cc: 4137c733 xnor x14,x15,x19 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021d0: 0004a203 lw x4,0(x9) +800021d4: 00e20863 beq x4,x14,800021e4 +800021d8: 368032ef jal x5,80005540 +800021dc: 800021cc .word 0x800021cc +800021e0: 8000c1f2 .word 0x8000c1f2 +800021e4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7ffffffe +800021e8: 0001af83 lw x31,0(x3) +800021ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000001 +800021f0: 0001a303 lw x6,0(x3) +800021f4: 00418193 addi x3,x3,4 + +800021f8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + xnor x22, x31, x6 # perform operation +800021f8: 406fcb33 xnor x22,x31,x6 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021fc: 0004a203 lw x4,0(x9) +80002200: 01620863 beq x4,x22,80002210 +80002204: 33c032ef jal x5,80005540 +80002208: 800021f8 .word 0x800021f8 +8000220c: 8000c24a .word 0x8000c24a +80002210: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7ffffffe +80002214: 0001a583 lw x11,0(x3) +80002218: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000002 +8000221c: 0001a783 lw x15,0(x3) +80002220: 00418193 addi x3,x3,4 + +80002224 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + xnor x31, x11, x15 # perform operation +80002224: 40f5cfb3 xnor x31,x11,x15 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002228: 0004a203 lw x4,0(x9) +8000222c: 01f20863 beq x4,x31,8000223c +80002230: 310032ef jal x5,80005540 +80002234: 80002224 .word 0x80002224 +80002238: 8000c2a2 .word 0x8000c2a2 +8000223c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x7ffffffe +80002240: 0001a603 lw x12,0(x3) +80002244: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x80000000 +80002248: 0001ae83 lw x29,0(x3) +8000224c: 00418193 addi x3,x3,4 + +80002250 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + xnor x22, x12, x29 # perform operation +80002250: 41d64b33 xnor x22,x12,x29 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002254: 0004a203 lw x4,0(x9) +80002258: 01620863 beq x4,x22,80002268 +8000225c: 2e4032ef jal x5,80005540 +80002260: 80002250 .word 0x80002250 +80002264: 8000c2fa .word 0x8000c2fa +80002268: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7ffffffe +8000226c: 0001aa83 lw x21,0(x3) +80002270: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x80000001 +80002274: 0001af03 lw x30,0(x3) +80002278: 00418193 addi x3,x3,4 + +8000227c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + xnor x11, x21, x30 # perform operation +8000227c: 41eac5b3 xnor x11,x21,x30 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002280: 0004a203 lw x4,0(x9) +80002284: 00b20863 beq x4,x11,80002294 +80002288: 2b8032ef jal x5,80005540 +8000228c: 8000227c .word 0x8000227c +80002290: 8000c359 .word 0x8000c359 +80002294: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x7ffffffe +80002298: 0001a083 lw x1,0(x3) +8000229c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7fffffff +800022a0: 0001a603 lw x12,0(x3) +800022a4: 00418193 addi x3,x3,4 + +800022a8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + xnor x17, x1, x12 # perform operation +800022a8: 40c0c8b3 xnor x17,x1,x12 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022ac: 0004a203 lw x4,0(x9) +800022b0: 01120863 beq x4,x17,800022c0 +800022b4: 28c032ef jal x5,80005540 +800022b8: 800022a8 .word 0x800022a8 +800022bc: 8000c3b8 .word 0x8000c3b8 +800022c0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x7ffffffe +800022c4: 0001ab03 lw x22,0(x3) +800022c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7ffffffe +800022cc: 0001a883 lw x17,0(x3) +800022d0: 00418193 addi x3,x3,4 + +800022d4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + xnor x26, x22, x17 # perform operation +800022d4: 411b4d33 xnor x26,x22,x17 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d8: 0004a203 lw x4,0(x9) +800022dc: 01a20863 beq x4,x26,800022ec +800022e0: 260032ef jal x5,80005540 +800022e4: 800022d4 .word 0x800022d4 +800022e8: 8000c417 .word 0x8000c417 +800022ec: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7ffffffe +800022f0: 0001ad03 lw x26,0(x3) +800022f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xffffffff +800022f8: 0001a383 lw x7,0(x3) +800022fc: 00418193 addi x3,x3,4 + +80002300 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + xnor x18, x26, x7 # perform operation +80002300: 407d4933 xnor x18,x26,x7 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +80002304: 0004a203 lw x4,0(x9) +80002308: 01220863 beq x4,x18,80002318 +8000230c: 234032ef jal x5,80005540 +80002310: 80002300 .word 0x80002300 +80002314: 8000c476 .word 0x8000c476 +80002318: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x7ffffffe +8000231c: 0001ab83 lw x23,0(x3) +80002320: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xfffffffe +80002324: 0001a883 lw x17,0(x3) +80002328: 00418193 addi x3,x3,4 + +8000232c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + xnor x25, x23, x17 # perform operation +8000232c: 411bccb3 xnor x25,x23,x17 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002330: 0004a203 lw x4,0(x9) +80002334: 01920863 beq x4,x25,80002344 +80002338: 208032ef jal x5,80005540 +8000233c: 8000232c .word 0x8000232c +80002340: 8000c4d5 .word 0x8000c4d5 +80002344: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x7ffffffe +80002348: 0001a103 lw x2,0(x3) +8000234c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x5bbc8872 +80002350: 0001aa03 lw x20,0(x3) +80002354: 00418193 addi x3,x3,4 + +80002358 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + xnor x17, x2, x20 # perform operation +80002358: 414148b3 xnor x17,x2,x20 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000235c: 0004a203 lw x4,0(x9) +80002360: 01120863 beq x4,x17,80002370 +80002364: 1dc032ef jal x5,80005540 +80002368: 80002358 .word 0x80002358 +8000236c: 8000c534 .word 0x8000c534 +80002370: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x7ffffffe +80002374: 0001a703 lw x14,0(x3) +80002378: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xaaaaaaaa +8000237c: 0001ae83 lw x29,0(x3) +80002380: 00418193 addi x3,x3,4 + +80002384 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + xnor x27, x14, x29 # perform operation +80002384: 41d74db3 xnor x27,x14,x29 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002388: 0004a203 lw x4,0(x9) +8000238c: 01b20863 beq x4,x27,8000239c +80002390: 1b0032ef jal x5,80005540 +80002394: 80002384 .word 0x80002384 +80002398: 8000c593 .word 0x8000c593 +8000239c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x7ffffffe +800023a0: 0001ab83 lw x23,0(x3) +800023a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +800023a8: 0001ae03 lw x28,0(x3) +800023ac: 00418193 addi x3,x3,4 + +800023b0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + xnor x13, x23, x28 # perform operation +800023b0: 41cbc6b3 xnor x13,x23,x28 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023b4: 0004a203 lw x4,0(x9) +800023b8: 00d20863 beq x4,x13,800023c8 +800023bc: 184032ef jal x5,80005540 +800023c0: 800023b0 .word 0x800023b0 +800023c4: 8000c5f2 .word 0x8000c5f2 +800023c8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xffffffff +800023cc: 0001af03 lw x30,0(x3) +800023d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000000 +800023d4: 0001a783 lw x15,0(x3) +800023d8: 00418193 addi x3,x3,4 + +800023dc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xnor x16, x30, x15 # perform operation +800023dc: 40ff4833 xnor x16,x30,x15 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023e0: 0004a203 lw x4,0(x9) +800023e4: 01020863 beq x4,x16,800023f4 +800023e8: 158032ef jal x5,80005540 +800023ec: 800023dc .word 0x800023dc +800023f0: 8000c651 .word 0x8000c651 +800023f4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xffffffff +800023f8: 0001af03 lw x30,0(x3) +800023fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000001 +80002400: 0001a683 lw x13,0(x3) +80002404: 00418193 addi x3,x3,4 + +80002408 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xnor x15, x30, x13 # perform operation +80002408: 40df47b3 xnor x15,x30,x13 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +8000240c: 0004a203 lw x4,0(x9) +80002410: 00f20863 beq x4,x15,80002420 +80002414: 12c032ef jal x5,80005540 +80002418: 80002408 .word 0x80002408 +8000241c: 8000c6a9 .word 0x8000c6a9 +80002420: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xffffffff +80002424: 0001ac83 lw x25,0(x3) +80002428: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000002 +8000242c: 0001a683 lw x13,0(x3) +80002430: 00418193 addi x3,x3,4 + +80002434 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xnor x8, x25, x13 # perform operation +80002434: 40dcc433 xnor x8,x25,x13 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002438: 0004a203 lw x4,0(x9) +8000243c: 00820863 beq x4,x8,8000244c +80002440: 100032ef jal x5,80005540 +80002444: 80002434 .word 0x80002434 +80002448: 8000c701 .word 0x8000c701 +8000244c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xffffffff +80002450: 0001a083 lw x1,0(x3) +80002454: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x80000000 +80002458: 0001a383 lw x7,0(x3) +8000245c: 00418193 addi x3,x3,4 + +80002460 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + xnor x16, x1, x7 # perform operation +80002460: 4070c833 xnor x16,x1,x7 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002464: 0004a203 lw x4,0(x9) +80002468: 01020863 beq x4,x16,80002478 +8000246c: 0d4032ef jal x5,80005540 +80002470: 80002460 .word 0x80002460 +80002474: 8000c759 .word 0x8000c759 +80002478: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0xffffffff +8000247c: 0001a303 lw x6,0(x3) +80002480: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x80000001 +80002484: 0001a603 lw x12,0(x3) +80002488: 00418193 addi x3,x3,4 + +8000248c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + xnor x21, x6, x12 # perform operation +8000248c: 40c34ab3 xnor x21,x6,x12 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002490: 0004a203 lw x4,0(x9) +80002494: 01520863 beq x4,x21,800024a4 +80002498: 0a8032ef jal x5,80005540 +8000249c: 8000248c .word 0x8000248c +800024a0: 8000c7b8 .word 0x8000c7b8 +800024a4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xffffffff +800024a8: 0001a883 lw x17,0(x3) +800024ac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7fffffff +800024b0: 0001a683 lw x13,0(x3) +800024b4: 00418193 addi x3,x3,4 + +800024b8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + xnor x8, x17, x13 # perform operation +800024b8: 40d8c433 xnor x8,x17,x13 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024bc: 0004a203 lw x4,0(x9) +800024c0: 00820863 beq x4,x8,800024d0 +800024c4: 07c032ef jal x5,80005540 +800024c8: 800024b8 .word 0x800024b8 +800024cc: 8000c817 .word 0x8000c817 +800024d0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0xffffffff +800024d4: 0001a903 lw x18,0(x3) +800024d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7ffffffe +800024dc: 0001a603 lw x12,0(x3) +800024e0: 00418193 addi x3,x3,4 + +800024e4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + xnor x26, x18, x12 # perform operation +800024e4: 40c94d33 xnor x26,x18,x12 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e8: 0004a203 lw x4,0(x9) +800024ec: 01a20863 beq x4,x26,800024fc +800024f0: 050032ef jal x5,80005540 +800024f4: 800024e4 .word 0x800024e4 +800024f8: 8000c876 .word 0x8000c876 +800024fc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xffffffff +80002500: 0001ae03 lw x28,0(x3) +80002504: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xffffffff +80002508: 0001aa83 lw x21,0(x3) +8000250c: 00418193 addi x3,x3,4 + +80002510 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xnor x14, x28, x21 # perform operation +80002510: 415e4733 xnor x14,x28,x21 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002514: 0004a203 lw x4,0(x9) +80002518: 00e20863 beq x4,x14,80002528 +8000251c: 024032ef jal x5,80005540 +80002520: 80002510 .word 0x80002510 +80002524: 8000c8d5 .word 0x8000c8d5 +80002528: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xffffffff +8000252c: 0001a403 lw x8,0(x3) +80002530: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xfffffffe +80002534: 0001a983 lw x19,0(x3) +80002538: 00418193 addi x3,x3,4 + +8000253c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xnor x16, x8, x19 # perform operation +8000253c: 41344833 xnor x16,x8,x19 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002540: 0004a203 lw x4,0(x9) +80002544: 01020863 beq x4,x16,80002554 +80002548: 7f9022ef jal x5,80005540 +8000254c: 8000253c .word 0x8000253c +80002550: 8000c934 .word 0x8000c934 +80002554: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xffffffff +80002558: 0001a583 lw x11,0(x3) +8000255c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x5bbc8872 +80002560: 0001a403 lw x8,0(x3) +80002564: 00418193 addi x3,x3,4 + +80002568 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + xnor x1, x11, x8 # perform operation +80002568: 4085c0b3 xnor x1,x11,x8 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000256c: 0004a203 lw x4,0(x9) +80002570: 00120863 beq x4,x1,80002580 +80002574: 7cd022ef jal x5,80005540 +80002578: 80002568 .word 0x80002568 +8000257c: 8000c993 .word 0x8000c993 +80002580: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xffffffff +80002584: 0001a083 lw x1,0(x3) +80002588: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xaaaaaaaa +8000258c: 0001a983 lw x19,0(x3) +80002590: 00418193 addi x3,x3,4 + +80002594 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + xnor x11, x1, x19 # perform operation +80002594: 4130c5b3 xnor x11,x1,x19 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002598: 0004a203 lw x4,0(x9) +8000259c: 00b20863 beq x4,x11,800025ac +800025a0: 7a1022ef jal x5,80005540 +800025a4: 80002594 .word 0x80002594 +800025a8: 8000c9f2 .word 0x8000c9f2 +800025ac: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xffffffff +800025b0: 0001a803 lw x16,0(x3) +800025b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x55555555 +800025b8: 0001a383 lw x7,0(x3) +800025bc: 00418193 addi x3,x3,4 + +800025c0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + xnor x29, x16, x7 # perform operation +800025c0: 40784eb3 xnor x29,x16,x7 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025c4: 0004a203 lw x4,0(x9) +800025c8: 01d20863 beq x4,x29,800025d8 +800025cc: 775022ef jal x5,80005540 +800025d0: 800025c0 .word 0x800025c0 +800025d4: 8000ca51 .word 0x8000ca51 +800025d8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xfffffffe +800025dc: 0001aa83 lw x21,0(x3) +800025e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x00000000 +800025e4: 0001a703 lw x14,0(x3) +800025e8: 00418193 addi x3,x3,4 + +800025ec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xnor x27, x21, x14 # perform operation +800025ec: 40eacdb3 xnor x27,x21,x14 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025f0: 0004a203 lw x4,0(x9) +800025f4: 01b20863 beq x4,x27,80002604 +800025f8: 749022ef jal x5,80005540 +800025fc: 800025ec .word 0x800025ec +80002600: 8000cab0 .word 0x8000cab0 +80002604: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xfffffffe +80002608: 0001a883 lw x17,0(x3) +8000260c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x00000001 +80002610: 0001ab83 lw x23,0(x3) +80002614: 00418193 addi x3,x3,4 + +80002618 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xnor x30, x17, x23 # perform operation +80002618: 4178cf33 xnor x30,x17,x23 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +8000261c: 0004a203 lw x4,0(x9) +80002620: 01e20863 beq x4,x30,80002630 +80002624: 71d022ef jal x5,80005540 +80002628: 80002618 .word 0x80002618 +8000262c: 8000cb08 .word 0x8000cb08 +80002630: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xfffffffe +80002634: 0001ab83 lw x23,0(x3) +80002638: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000002 +8000263c: 0001aa83 lw x21,0(x3) +80002640: 00418193 addi x3,x3,4 + +80002644 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xnor x7, x23, x21 # perform operation +80002644: 415bc3b3 xnor x7,x23,x21 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002648: 0004a203 lw x4,0(x9) +8000264c: 00720863 beq x4,x7,8000265c +80002650: 6f1022ef jal x5,80005540 +80002654: 80002644 .word 0x80002644 +80002658: 8000cb60 .word 0x8000cb60 +8000265c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xfffffffe +80002660: 0001ae83 lw x29,0(x3) +80002664: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x80000000 +80002668: 0001a083 lw x1,0(x3) +8000266c: 00418193 addi x3,x3,4 + +80002670 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + xnor x26, x29, x1 # perform operation +80002670: 401ecd33 xnor x26,x29,x1 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002674: 0004a203 lw x4,0(x9) +80002678: 01a20863 beq x4,x26,80002688 +8000267c: 6c5022ef jal x5,80005540 +80002680: 80002670 .word 0x80002670 +80002684: 8000cbb8 .word 0x8000cbb8 +80002688: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xfffffffe +8000268c: 0001ac83 lw x25,0(x3) +80002690: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x80000001 +80002694: 0001ab83 lw x23,0(x3) +80002698: 00418193 addi x3,x3,4 + +8000269c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + xnor x26, x25, x23 # perform operation +8000269c: 417ccd33 xnor x26,x25,x23 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +800026a0: 0004a203 lw x4,0(x9) +800026a4: 01a20863 beq x4,x26,800026b4 +800026a8: 699022ef jal x5,80005540 +800026ac: 8000269c .word 0x8000269c +800026b0: 8000cc17 .word 0x8000cc17 +800026b4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xfffffffe +800026b8: 0001ac03 lw x24,0(x3) +800026bc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x7fffffff +800026c0: 0001ab03 lw x22,0(x3) +800026c4: 00418193 addi x3,x3,4 + +800026c8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + xnor x17, x24, x22 # perform operation +800026c8: 416c48b3 xnor x17,x24,x22 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026cc: 0004a203 lw x4,0(x9) +800026d0: 01120863 beq x4,x17,800026e0 +800026d4: 66d022ef jal x5,80005540 +800026d8: 800026c8 .word 0x800026c8 +800026dc: 8000cc76 .word 0x8000cc76 +800026e0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +800026e4: 0001af83 lw x31,0(x3) +800026e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x7ffffffe +800026ec: 0001a583 lw x11,0(x3) +800026f0: 00418193 addi x3,x3,4 + +800026f4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + xnor x8, x31, x11 # perform operation +800026f4: 40bfc433 xnor x8,x31,x11 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f8: 0004a203 lw x4,0(x9) +800026fc: 00820863 beq x4,x8,8000270c +80002700: 641022ef jal x5,80005540 +80002704: 800026f4 .word 0x800026f4 +80002708: 8000ccd5 .word 0x8000ccd5 +8000270c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xfffffffe +80002710: 0001a583 lw x11,0(x3) +80002714: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xffffffff +80002718: 0001a783 lw x15,0(x3) +8000271c: 00418193 addi x3,x3,4 + +80002720 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xnor x14, x11, x15 # perform operation +80002720: 40f5c733 xnor x14,x11,x15 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002724: 0004a203 lw x4,0(x9) +80002728: 00e20863 beq x4,x14,80002738 +8000272c: 615022ef jal x5,80005540 +80002730: 80002720 .word 0x80002720 +80002734: 8000cd34 .word 0x8000cd34 +80002738: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0xfffffffe +8000273c: 0001a903 lw x18,0(x3) +80002740: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xfffffffe +80002744: 0001a403 lw x8,0(x3) +80002748: 00418193 addi x3,x3,4 + +8000274c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xnor x10, x18, x8 # perform operation +8000274c: 40894533 xnor x10,x18,x8 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002750: 0004a203 lw x4,0(x9) +80002754: 00a20863 beq x4,x10,80002764 +80002758: 5e9022ef jal x5,80005540 +8000275c: 8000274c .word 0x8000274c +80002760: 8000cd93 .word 0x8000cd93 +80002764: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +80002768: 0001af83 lw x31,0(x3) +8000276c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5bbc8872 +80002770: 0001ae03 lw x28,0(x3) +80002774: 00418193 addi x3,x3,4 + +80002778 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + xnor x19, x31, x28 # perform operation +80002778: 41cfc9b3 xnor x19,x31,x28 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000277c: 0004a203 lw x4,0(x9) +80002780: 01320863 beq x4,x19,80002790 +80002784: 5bd022ef jal x5,80005540 +80002788: 80002778 .word 0x80002778 +8000278c: 8000cdf2 .word 0x8000cdf2 +80002790: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xfffffffe +80002794: 0001af03 lw x30,0(x3) +80002798: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xaaaaaaaa +8000279c: 0001a103 lw x2,0(x3) +800027a0: 00418193 addi x3,x3,4 + +800027a4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + xnor x7, x30, x2 # perform operation +800027a4: 402f43b3 xnor x7,x30,x2 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a8: 0004a203 lw x4,0(x9) +800027ac: 00720863 beq x4,x7,800027bc +800027b0: 591022ef jal x5,80005540 +800027b4: 800027a4 .word 0x800027a4 +800027b8: 8000ce51 .word 0x8000ce51 +800027bc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xfffffffe +800027c0: 0001aa03 lw x20,0(x3) +800027c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x55555555 +800027c8: 0001a883 lw x17,0(x3) +800027cc: 00418193 addi x3,x3,4 + +800027d0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + xnor x7, x20, x17 # perform operation +800027d0: 411a43b3 xnor x7,x20,x17 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027d4: 0004a203 lw x4,0(x9) +800027d8: 00720863 beq x4,x7,800027e8 +800027dc: 565022ef jal x5,80005540 +800027e0: 800027d0 .word 0x800027d0 +800027e4: 8000ceb0 .word 0x8000ceb0 +800027e8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x5bbc8872 +800027ec: 0001a083 lw x1,0(x3) +800027f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000000 +800027f4: 0001a883 lw x17,0(x3) +800027f8: 00418193 addi x3,x3,4 + +800027fc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + xnor x12, x1, x17 # perform operation +800027fc: 4110c633 xnor x12,x1,x17 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +80002800: 0004a203 lw x4,0(x9) +80002804: 00c20863 beq x4,x12,80002814 +80002808: 539022ef jal x5,80005540 +8000280c: 800027fc .word 0x800027fc +80002810: 8000cf0f .word 0x8000cf0f +80002814: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5bbc8872 +80002818: 0001ab03 lw x22,0(x3) +8000281c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000001 +80002820: 0001af83 lw x31,0(x3) +80002824: 00418193 addi x3,x3,4 + +80002828 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + xnor x1, x22, x31 # perform operation +80002828: 41fb40b3 xnor x1,x22,x31 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000282c: 0004a203 lw x4,0(x9) +80002830: 00120863 beq x4,x1,80002840 +80002834: 50d022ef jal x5,80005540 +80002838: 80002828 .word 0x80002828 +8000283c: 8000cf67 .word 0x8000cf67 +80002840: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x5bbc8872 +80002844: 0001a583 lw x11,0(x3) +80002848: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000002 +8000284c: 0001a303 lw x6,0(x3) +80002850: 00418193 addi x3,x3,4 + +80002854 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + xnor x8, x11, x6 # perform operation +80002854: 4065c433 xnor x8,x11,x6 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002858: 0004a203 lw x4,0(x9) +8000285c: 00820863 beq x4,x8,8000286c +80002860: 4e1022ef jal x5,80005540 +80002864: 80002854 .word 0x80002854 +80002868: 8000cfbf .word 0x8000cfbf +8000286c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x5bbc8872 +80002870: 0001ad83 lw x27,0(x3) +80002874: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x80000000 +80002878: 0001a503 lw x10,0(x3) +8000287c: 00418193 addi x3,x3,4 + +80002880 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + xnor x28, x27, x10 # perform operation +80002880: 40adce33 xnor x28,x27,x10 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002884: 0004a203 lw x4,0(x9) +80002888: 01c20863 beq x4,x28,80002898 +8000288c: 4b5022ef jal x5,80005540 +80002890: 80002880 .word 0x80002880 +80002894: 8000d017 .word 0x8000d017 +80002898: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x5bbc8872 +8000289c: 0001ae83 lw x29,0(x3) +800028a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000001 +800028a4: 0001ab03 lw x22,0(x3) +800028a8: 00418193 addi x3,x3,4 + +800028ac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + xnor x26, x29, x22 # perform operation +800028ac: 416ecd33 xnor x26,x29,x22 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028b0: 0004a203 lw x4,0(x9) +800028b4: 01a20863 beq x4,x26,800028c4 +800028b8: 489022ef jal x5,80005540 +800028bc: 800028ac .word 0x800028ac +800028c0: 8000d076 .word 0x8000d076 +800028c4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x5bbc8872 +800028c8: 0001af03 lw x30,0(x3) +800028cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7fffffff +800028d0: 0001ac03 lw x24,0(x3) +800028d4: 00418193 addi x3,x3,4 + +800028d8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + xnor x27, x30, x24 # perform operation +800028d8: 418f4db3 xnor x27,x30,x24 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028dc: 0004a203 lw x4,0(x9) +800028e0: 01b20863 beq x4,x27,800028f0 +800028e4: 45d022ef jal x5,80005540 +800028e8: 800028d8 .word 0x800028d8 +800028ec: 8000d0d5 .word 0x8000d0d5 +800028f0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x5bbc8872 +800028f4: 0001a703 lw x14,0(x3) +800028f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x7ffffffe +800028fc: 0001aa83 lw x21,0(x3) +80002900: 00418193 addi x3,x3,4 + +80002904 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + xnor x7, x14, x21 # perform operation +80002904: 415743b3 xnor x7,x14,x21 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002908: 0004a203 lw x4,0(x9) +8000290c: 00720863 beq x4,x7,8000291c +80002910: 431022ef jal x5,80005540 +80002914: 80002904 .word 0x80002904 +80002918: 8000d134 .word 0x8000d134 +8000291c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x5bbc8872 +80002920: 0001a303 lw x6,0(x3) +80002924: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xffffffff +80002928: 0001af83 lw x31,0(x3) +8000292c: 00418193 addi x3,x3,4 + +80002930 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + xnor x25, x6, x31 # perform operation +80002930: 41f34cb3 xnor x25,x6,x31 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002934: 0004a203 lw x4,0(x9) +80002938: 01920863 beq x4,x25,80002948 +8000293c: 405022ef jal x5,80005540 +80002940: 80002930 .word 0x80002930 +80002944: 8000d193 .word 0x8000d193 +80002948: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5bbc8872 +8000294c: 0001ab03 lw x22,0(x3) +80002950: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xfffffffe +80002954: 0001a583 lw x11,0(x3) +80002958: 00418193 addi x3,x3,4 + +8000295c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + xnor x15, x22, x11 # perform operation +8000295c: 40bb47b3 xnor x15,x22,x11 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002960: 0004a203 lw x4,0(x9) +80002964: 00f20863 beq x4,x15,80002974 +80002968: 3d9022ef jal x5,80005540 +8000296c: 8000295c .word 0x8000295c +80002970: 8000d1f2 .word 0x8000d1f2 +80002974: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x5bbc8872 +80002978: 0001a103 lw x2,0(x3) +8000297c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc8872 +80002980: 0001ab83 lw x23,0(x3) +80002984: 00418193 addi x3,x3,4 + +80002988 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + xnor x10, x2, x23 # perform operation +80002988: 41714533 xnor x10,x2,x23 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000298c: 0004a203 lw x4,0(x9) +80002990: 00a20863 beq x4,x10,800029a0 +80002994: 3ad022ef jal x5,80005540 +80002998: 80002988 .word 0x80002988 +8000299c: 8000d251 .word 0x8000d251 +800029a0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x5bbc8872 +800029a4: 0001aa03 lw x20,0(x3) +800029a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xaaaaaaaa +800029ac: 0001ae83 lw x29,0(x3) +800029b0: 00418193 addi x3,x3,4 + +800029b4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + xnor x19, x20, x29 # perform operation +800029b4: 41da49b3 xnor x19,x20,x29 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b8: 0004a203 lw x4,0(x9) +800029bc: 01320863 beq x4,x19,800029cc +800029c0: 381022ef jal x5,80005540 +800029c4: 800029b4 .word 0x800029b4 +800029c8: 8000d2b0 .word 0x8000d2b0 +800029cc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5bbc8872 +800029d0: 0001a503 lw x10,0(x3) +800029d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x55555555 +800029d8: 0001a703 lw x14,0(x3) +800029dc: 00418193 addi x3,x3,4 + +800029e0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + xnor x12, x10, x14 # perform operation +800029e0: 40e54633 xnor x12,x10,x14 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029e4: 0004a203 lw x4,0(x9) +800029e8: 00c20863 beq x4,x12,800029f8 +800029ec: 355022ef jal x5,80005540 +800029f0: 800029e0 .word 0x800029e0 +800029f4: 8000d30f .word 0x8000d30f +800029f8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xaaaaaaaa +800029fc: 0001af03 lw x30,0(x3) +80002a00: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000000 +80002a04: 0001aa83 lw x21,0(x3) +80002a08: 00418193 addi x3,x3,4 + +80002a0c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + xnor x11, x30, x21 # perform operation +80002a0c: 415f45b3 xnor x11,x30,x21 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a10: 0004a203 lw x4,0(x9) +80002a14: 00b20863 beq x4,x11,80002a24 +80002a18: 329022ef jal x5,80005540 +80002a1c: 80002a0c .word 0x80002a0c +80002a20: 8000d36e .word 0x8000d36e +80002a24: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaaaaaaaa +80002a28: 0001a103 lw x2,0(x3) +80002a2c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000001 +80002a30: 0001a803 lw x16,0(x3) +80002a34: 00418193 addi x3,x3,4 + +80002a38 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + xnor x18, x2, x16 # perform operation +80002a38: 41014933 xnor x18,x2,x16 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a3c: 0004a203 lw x4,0(x9) +80002a40: 01220863 beq x4,x18,80002a50 +80002a44: 2fd022ef jal x5,80005540 +80002a48: 80002a38 .word 0x80002a38 +80002a4c: 8000d3c6 .word 0x8000d3c6 +80002a50: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0xaaaaaaaa +80002a54: 0001a503 lw x10,0(x3) +80002a58: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x00000002 +80002a5c: 0001ab03 lw x22,0(x3) +80002a60: 00418193 addi x3,x3,4 + +80002a64 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + xnor x27, x10, x22 # perform operation +80002a64: 41654db3 xnor x27,x10,x22 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a68: 0004a203 lw x4,0(x9) +80002a6c: 01b20863 beq x4,x27,80002a7c +80002a70: 2d1022ef jal x5,80005540 +80002a74: 80002a64 .word 0x80002a64 +80002a78: 8000d41e .word 0x8000d41e +80002a7c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xaaaaaaaa +80002a80: 0001af03 lw x30,0(x3) +80002a84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x80000000 +80002a88: 0001ad83 lw x27,0(x3) +80002a8c: 00418193 addi x3,x3,4 + +80002a90 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + xnor x1, x30, x27 # perform operation +80002a90: 41bf40b3 xnor x1,x30,x27 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a94: 0004a203 lw x4,0(x9) +80002a98: 00120863 beq x4,x1,80002aa8 +80002a9c: 2a5022ef jal x5,80005540 +80002aa0: 80002a90 .word 0x80002a90 +80002aa4: 8000d476 .word 0x8000d476 +80002aa8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xaaaaaaaa +80002aac: 0001a403 lw x8,0(x3) +80002ab0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x80000001 +80002ab4: 0001a803 lw x16,0(x3) +80002ab8: 00418193 addi x3,x3,4 + +80002abc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + xnor x13, x8, x16 # perform operation +80002abc: 410446b3 xnor x13,x8,x16 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ac0: 0004a203 lw x4,0(x9) +80002ac4: 00d20863 beq x4,x13,80002ad4 +80002ac8: 279022ef jal x5,80005540 +80002acc: 80002abc .word 0x80002abc +80002ad0: 8000d4d5 .word 0x8000d4d5 +80002ad4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xaaaaaaaa +80002ad8: 0001a983 lw x19,0(x3) +80002adc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x7fffffff +80002ae0: 0001a383 lw x7,0(x3) +80002ae4: 00418193 addi x3,x3,4 + +80002ae8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + xnor x14, x19, x7 # perform operation +80002ae8: 4079c733 xnor x14,x19,x7 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002aec: 0004a203 lw x4,0(x9) +80002af0: 00e20863 beq x4,x14,80002b00 +80002af4: 24d022ef jal x5,80005540 +80002af8: 80002ae8 .word 0x80002ae8 +80002afc: 8000d534 .word 0x8000d534 +80002b00: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xaaaaaaaa +80002b04: 0001af83 lw x31,0(x3) +80002b08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x7ffffffe +80002b0c: 0001af03 lw x30,0(x3) +80002b10: 00418193 addi x3,x3,4 + +80002b14 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + xnor x27, x31, x30 # perform operation +80002b14: 41efcdb3 xnor x27,x31,x30 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b18: 0004a203 lw x4,0(x9) +80002b1c: 01b20863 beq x4,x27,80002b2c +80002b20: 221022ef jal x5,80005540 +80002b24: 80002b14 .word 0x80002b14 +80002b28: 8000d593 .word 0x8000d593 +80002b2c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xaaaaaaaa +80002b30: 0001a883 lw x17,0(x3) +80002b34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffff +80002b38: 0001a603 lw x12,0(x3) +80002b3c: 00418193 addi x3,x3,4 + +80002b40 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + xnor x18, x17, x12 # perform operation +80002b40: 40c8c933 xnor x18,x17,x12 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b44: 0004a203 lw x4,0(x9) +80002b48: 01220863 beq x4,x18,80002b58 +80002b4c: 1f5022ef jal x5,80005540 +80002b50: 80002b40 .word 0x80002b40 +80002b54: 8000d5f2 .word 0x8000d5f2 +80002b58: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xaaaaaaaa +80002b5c: 0001a803 lw x16,0(x3) +80002b60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xfffffffe +80002b64: 0001ad03 lw x26,0(x3) +80002b68: 00418193 addi x3,x3,4 + +80002b6c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + xnor x18, x16, x26 # perform operation +80002b6c: 41a84933 xnor x18,x16,x26 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b70: 0004a203 lw x4,0(x9) +80002b74: 01220863 beq x4,x18,80002b84 +80002b78: 1c9022ef jal x5,80005540 +80002b7c: 80002b6c .word 0x80002b6c +80002b80: 8000d651 .word 0x8000d651 +80002b84: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xaaaaaaaa +80002b88: 0001a983 lw x19,0(x3) +80002b8c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc8872 +80002b90: 0001ab83 lw x23,0(x3) +80002b94: 00418193 addi x3,x3,4 + +80002b98 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + xnor x31, x19, x23 # perform operation +80002b98: 4179cfb3 xnor x31,x19,x23 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b9c: 0004a203 lw x4,0(x9) +80002ba0: 01f20863 beq x4,x31,80002bb0 +80002ba4: 19d022ef jal x5,80005540 +80002ba8: 80002b98 .word 0x80002b98 +80002bac: 8000d6b0 .word 0x8000d6b0 +80002bb0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xaaaaaaaa +80002bb4: 0001a883 lw x17,0(x3) +80002bb8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xaaaaaaaa +80002bbc: 0001a683 lw x13,0(x3) +80002bc0: 00418193 addi x3,x3,4 + +80002bc4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + xnor x7, x17, x13 # perform operation +80002bc4: 40d8c3b3 xnor x7,x17,x13 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc8: 0004a203 lw x4,0(x9) +80002bcc: 00720863 beq x4,x7,80002bdc +80002bd0: 171022ef jal x5,80005540 +80002bd4: 80002bc4 .word 0x80002bc4 +80002bd8: 8000d70f .word 0x8000d70f +80002bdc: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xaaaaaaaa +80002be0: 0001a683 lw x13,0(x3) +80002be4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x55555555 +80002be8: 0001ab83 lw x23,0(x3) +80002bec: 00418193 addi x3,x3,4 + +80002bf0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + xnor x20, x13, x23 # perform operation +80002bf0: 4176ca33 xnor x20,x13,x23 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bf4: 0004a203 lw x4,0(x9) +80002bf8: 01420863 beq x4,x20,80002c08 +80002bfc: 145022ef jal x5,80005540 +80002c00: 80002bf0 .word 0x80002bf0 +80002c04: 8000d76e .word 0x8000d76e +80002c08: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x55555555 +80002c0c: 0001a583 lw x11,0(x3) +80002c10: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000000 +80002c14: 0001a783 lw x15,0(x3) +80002c18: 00418193 addi x3,x3,4 + +80002c1c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + xnor x14, x11, x15 # perform operation +80002c1c: 40f5c733 xnor x14,x11,x15 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c20: 0004a203 lw x4,0(x9) +80002c24: 00e20863 beq x4,x14,80002c34 +80002c28: 119022ef jal x5,80005540 +80002c2c: 80002c1c .word 0x80002c1c +80002c30: 8000d7cd .word 0x8000d7cd +80002c34: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x55555555 +80002c38: 0001a583 lw x11,0(x3) +80002c3c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x00000001 +80002c40: 0001a403 lw x8,0(x3) +80002c44: 00418193 addi x3,x3,4 + +80002c48 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + xnor x25, x11, x8 # perform operation +80002c48: 4085ccb3 xnor x25,x11,x8 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c4c: 0004a203 lw x4,0(x9) +80002c50: 01920863 beq x4,x25,80002c60 +80002c54: 0ed022ef jal x5,80005540 +80002c58: 80002c48 .word 0x80002c48 +80002c5c: 8000d825 .word 0x8000d825 +80002c60: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x55555555 +80002c64: 0001a903 lw x18,0(x3) +80002c68: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000002 +80002c6c: 0001a803 lw x16,0(x3) +80002c70: 00418193 addi x3,x3,4 + +80002c74 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + xnor x10, x18, x16 # perform operation +80002c74: 41094533 xnor x10,x18,x16 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c78: 0004a203 lw x4,0(x9) +80002c7c: 00a20863 beq x4,x10,80002c8c +80002c80: 0c1022ef jal x5,80005540 +80002c84: 80002c74 .word 0x80002c74 +80002c88: 8000d87d .word 0x8000d87d +80002c8c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x55555555 +80002c90: 0001a783 lw x15,0(x3) +80002c94: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x80000000 +80002c98: 0001ae03 lw x28,0(x3) +80002c9c: 00418193 addi x3,x3,4 + +80002ca0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + xnor x11, x15, x28 # perform operation +80002ca0: 41c7c5b3 xnor x11,x15,x28 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002ca4: 0004a203 lw x4,0(x9) +80002ca8: 00b20863 beq x4,x11,80002cb8 +80002cac: 095022ef jal x5,80005540 +80002cb0: 80002ca0 .word 0x80002ca0 +80002cb4: 8000d8d5 .word 0x8000d8d5 +80002cb8: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x55555555 +80002cbc: 0001ad03 lw x26,0(x3) +80002cc0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x80000001 +80002cc4: 0001ac83 lw x25,0(x3) +80002cc8: 00418193 addi x3,x3,4 + +80002ccc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + xnor x10, x26, x25 # perform operation +80002ccc: 419d4533 xnor x10,x26,x25 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cd0: 0004a203 lw x4,0(x9) +80002cd4: 00a20863 beq x4,x10,80002ce4 +80002cd8: 069022ef jal x5,80005540 +80002cdc: 80002ccc .word 0x80002ccc +80002ce0: 8000d934 .word 0x8000d934 +80002ce4: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x55555555 +80002ce8: 0001a603 lw x12,0(x3) +80002cec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x7fffffff +80002cf0: 0001a803 lw x16,0(x3) +80002cf4: 00418193 addi x3,x3,4 + +80002cf8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + xnor x6, x12, x16 # perform operation +80002cf8: 41064333 xnor x6,x12,x16 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cfc: 0004a203 lw x4,0(x9) +80002d00: 00620863 beq x4,x6,80002d10 +80002d04: 03d022ef jal x5,80005540 +80002d08: 80002cf8 .word 0x80002cf8 +80002d0c: 8000d993 .word 0x8000d993 +80002d10: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x55555555 +80002d14: 0001a703 lw x14,0(x3) +80002d18: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x7ffffffe +80002d1c: 0001a383 lw x7,0(x3) +80002d20: 00418193 addi x3,x3,4 + +80002d24 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + xnor x25, x14, x7 # perform operation +80002d24: 40774cb3 xnor x25,x14,x7 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d28: 0004a203 lw x4,0(x9) +80002d2c: 01920863 beq x4,x25,80002d3c +80002d30: 011022ef jal x5,80005540 +80002d34: 80002d24 .word 0x80002d24 +80002d38: 8000d9f2 .word 0x8000d9f2 +80002d3c: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x55555555 +80002d40: 0001a503 lw x10,0(x3) +80002d44: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0xffffffff +80002d48: 0001a303 lw x6,0(x3) +80002d4c: 00418193 addi x3,x3,4 + +80002d50 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + xnor x23, x10, x6 # perform operation +80002d50: 40654bb3 xnor x23,x10,x6 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d54: 0004a203 lw x4,0(x9) +80002d58: 01720863 beq x4,x23,80002d68 +80002d5c: 7e4022ef jal x5,80005540 +80002d60: 80002d50 .word 0x80002d50 +80002d64: 8000da51 .word 0x8000da51 +80002d68: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x55555555 +80002d6c: 0001a103 lw x2,0(x3) +80002d70: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0xfffffffe +80002d74: 0001a303 lw x6,0(x3) +80002d78: 00418193 addi x3,x3,4 + +80002d7c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + xnor x7, x2, x6 # perform operation +80002d7c: 406143b3 xnor x7,x2,x6 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d80: 0004a203 lw x4,0(x9) +80002d84: 00720863 beq x4,x7,80002d94 +80002d88: 7b8022ef jal x5,80005540 +80002d8c: 80002d7c .word 0x80002d7c +80002d90: 8000dab0 .word 0x8000dab0 +80002d94: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x55555555 +80002d98: 0001ad83 lw x27,0(x3) +80002d9c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x5bbc8872 +80002da0: 0001a083 lw x1,0(x3) +80002da4: 00418193 addi x3,x3,4 + +80002da8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + xnor x29, x27, x1 # perform operation +80002da8: 401dceb3 xnor x29,x27,x1 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002dac: 0004a203 lw x4,0(x9) +80002db0: 01d20863 beq x4,x29,80002dc0 +80002db4: 78c022ef jal x5,80005540 +80002db8: 80002da8 .word 0x80002da8 +80002dbc: 8000db0f .word 0x8000db0f +80002dc0: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x55555555 +80002dc4: 0001a683 lw x13,0(x3) +80002dc8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xaaaaaaaa +80002dcc: 0001af03 lw x30,0(x3) +80002dd0: 00418193 addi x3,x3,4 + +80002dd4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + xnor x2, x13, x30 # perform operation +80002dd4: 41e6c133 xnor x2,x13,x30 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd8: 0004a203 lw x4,0(x9) +80002ddc: 00220863 beq x4,x2,80002dec +80002de0: 760022ef jal x5,80005540 +80002de4: 80002dd4 .word 0x80002dd4 +80002de8: 8000db6e .word 0x8000db6e +80002dec: 00448493 addi x9,x9,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x55555555 +80002df0: 0001aa03 lw x20,0(x3) +80002df4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x55555555 +80002df8: 0001a583 lw x11,0(x3) +80002dfc: 00418193 addi x3,x3,4 + +80002e00 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + xnor x22, x20, x11 # perform operation +80002e00: 40ba4b33 xnor x22,x20,x11 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002e04: 0004a203 lw x4,0(x9) +80002e08: 01620863 beq x4,x22,80002e18 +80002e0c: 734022ef jal x5,80005540 +80002e10: 80002e00 .word 0x80002e00 +80002e14: 8000dbcd .word 0x8000dbcd +80002e18: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x6de2d3d4 +80002e1c: 0001a003 lw x0,0(x3) +80002e20: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x057ff315 +80002e24: 0001a003 lw x0,0(x3) +80002e28: 00418193 addi x3,x3,4 + +80002e2c : +Zbkb_xnor_cg_cmp_rs1_rs2_b0: + xnor x11, x0, x0 # perform operation +80002e2c: 400045b3 xnor x11,x0,x0 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_xnor_cg_cmp_rs1_rs2_b0, Zbkb_xnor_cg_cmp_rs1_rs2_b0_str) +80002e30: 0004a203 lw x4,0(x9) +80002e34: 00b20863 beq x4,x11,80002e44 +80002e38: 708022ef jal x5,80005540 +80002e3c: 80002e2c .word 0x80002e2c +80002e40: 8000dc2c .word 0x8000dc2c +80002e44: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x3ec5b3e0 +80002e48: 0001a083 lw x1,0(x3) +80002e4c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x92449339 +80002e50: 0001a083 lw x1,0(x3) +80002e54: 00418193 addi x3,x3,4 + +80002e58 : +Zbkb_xnor_cg_cmp_rs1_rs2_b1: + xnor x7, x1, x1 # perform operation +80002e58: 4010c3b3 xnor x7,x1,x1 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_xnor_cg_cmp_rs1_rs2_b1, Zbkb_xnor_cg_cmp_rs1_rs2_b1_str) +80002e5c: 0004a203 lw x4,0(x9) +80002e60: 00720863 beq x4,x7,80002e70 +80002e64: 6dc022ef jal x5,80005540 +80002e68: 80002e58 .word 0x80002e58 +80002e6c: 8000dc64 .word 0x8000dc64 +80002e70: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xad6a690b +80002e74: 0001a103 lw x2,0(x3) +80002e78: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x43b2dee7 +80002e7c: 0001a103 lw x2,0(x3) +80002e80: 00418193 addi x3,x3,4 + +80002e84 : +Zbkb_xnor_cg_cmp_rs1_rs2_b2: + xnor x27, x2, x2 # perform operation +80002e84: 40214db3 xnor x27,x2,x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_xnor_cg_cmp_rs1_rs2_b2, Zbkb_xnor_cg_cmp_rs1_rs2_b2_str) +80002e88: 0004a203 lw x4,0(x9) +80002e8c: 01b20863 beq x4,x27,80002e9c +80002e90: 6b0022ef jal x5,80005540 +80002e94: 80002e84 .word 0x80002e84 +80002e98: 8000dc9c .word 0x8000dc9c +80002e9c: 00448493 addi x9,x9,4 + + mv x26, x3 # switch data pointer register to avoid conflict with test +80002ea0: 00018d13 addi x26,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x8f5d77d9 +80002ea4: 000d2183 lw x3,0(x26) +80002ea8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x0e84a4e4 +80002eac: 000d2183 lw x3,0(x26) +80002eb0: 004d0d13 addi x26,x26,4 + +80002eb4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b3: + xnor x31, x3, x3 # perform operation +80002eb4: 4031cfb3 xnor x31,x3,x3 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_xnor_cg_cmp_rs1_rs2_b3, Zbkb_xnor_cg_cmp_rs1_rs2_b3_str) +80002eb8: 0004a203 lw x4,0(x9) +80002ebc: 01f20863 beq x4,x31,80002ecc +80002ec0: 680022ef jal x5,80005540 +80002ec4: 80002eb4 .word 0x80002eb4 +80002ec8: 8000dcd4 .word 0x8000dcd4 +80002ecc: 00448493 addi x9,x9,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002ed0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002ed4: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x72dc434d +80002ed8: 000d2203 lw x4,0(x26) +80002edc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0xc02b9ab6 +80002ee0: 000d2203 lw x4,0(x26) +80002ee4: 004d0d13 addi x26,x26,4 + +80002ee8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b4: + xnor x30, x4, x4 # perform operation +80002ee8: 40424f33 xnor x30,x4,x4 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_xnor_cg_cmp_rs1_rs2_b4, Zbkb_xnor_cg_cmp_rs1_rs2_b4_str) +80002eec: 0004a383 lw x7,0(x9) +80002ef0: 01e38863 beq x7,x30,80002f00 +80002ef4: 6640246f jal x8,80005558 +80002ef8: 80002ee8 .word 0x80002ee8 +80002efc: 8000dd0c .word 0x8000dd0c +80002f00: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xb8b4868d +80002f04: 000d2283 lw x5,0(x26) +80002f08: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0x08335237 +80002f0c: 000d2283 lw x5,0(x26) +80002f10: 004d0d13 addi x26,x26,4 + +80002f14 : +Zbkb_xnor_cg_cmp_rs1_rs2_b5: + xnor x19, x5, x5 # perform operation +80002f14: 4052c9b3 xnor x19,x5,x5 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_xnor_cg_cmp_rs1_rs2_b5, Zbkb_xnor_cg_cmp_rs1_rs2_b5_str) +80002f18: 0004a383 lw x7,0(x9) +80002f1c: 01338863 beq x7,x19,80002f2c +80002f20: 6380246f jal x8,80005558 +80002f24: 80002f14 .word 0x80002f14 +80002f28: 8000dd44 .word 0x8000dd44 +80002f2c: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x435cd0ef +80002f30: 000d2303 lw x6,0(x26) +80002f34: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xa6d2657d +80002f38: 000d2303 lw x6,0(x26) +80002f3c: 004d0d13 addi x26,x26,4 + +80002f40 : +Zbkb_xnor_cg_cmp_rs1_rs2_b6: + xnor x28, x6, x6 # perform operation +80002f40: 40634e33 xnor x28,x6,x6 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_xnor_cg_cmp_rs1_rs2_b6, Zbkb_xnor_cg_cmp_rs1_rs2_b6_str) +80002f44: 0004a383 lw x7,0(x9) +80002f48: 01c38863 beq x7,x28,80002f58 +80002f4c: 60c0246f jal x8,80005558 +80002f50: 80002f40 .word 0x80002f40 +80002f54: 8000dd7c .word 0x8000dd7c +80002f58: 00448493 addi x9,x9,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80002f5c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80002f60: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x4215fc62 +80002f64: 000d2383 lw x7,0(x26) +80002f68: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x0749d37d +80002f6c: 000d2383 lw x7,0(x26) +80002f70: 004d0d13 addi x26,x26,4 + +80002f74 : +Zbkb_xnor_cg_cmp_rs1_rs2_b7: + xnor x20, x7, x7 # perform operation +80002f74: 4073ca33 xnor x20,x7,x7 + # Check if x20 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x20, Zbkb_xnor_cg_cmp_rs1_rs2_b7, Zbkb_xnor_cg_cmp_rs1_rs2_b7_str) +80002f78: 0004a683 lw x13,0(x9) +80002f7c: 01468863 beq x13,x20,80002f8c +80002f80: 6000276f jal x14,80005580 +80002f84: 80002f74 .word 0x80002f74 +80002f88: 8000ddb4 .word 0x8000ddb4 +80002f8c: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x44ceabfd +80002f90: 000d2403 lw x8,0(x26) +80002f94: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x65937e85 +80002f98: 000d2403 lw x8,0(x26) +80002f9c: 004d0d13 addi x26,x26,4 + +80002fa0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b8: + xnor x7, x8, x8 # perform operation +80002fa0: 408443b3 xnor x7,x8,x8 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkb_xnor_cg_cmp_rs1_rs2_b8, Zbkb_xnor_cg_cmp_rs1_rs2_b8_str) +80002fa4: 0004a683 lw x13,0(x9) +80002fa8: 00768863 beq x13,x7,80002fb8 +80002fac: 5d40276f jal x14,80005580 +80002fb0: 80002fa0 .word 0x80002fa0 +80002fb4: 8000ddec .word 0x8000ddec +80002fb8: 00448493 addi x9,x9,4 + + mv x3, x9 # switch signature pointer register to avoid conflict with test +80002fbc: 00048193 addi x3,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x065a3a21 +80002fc0: 000d2483 lw x9,0(x26) +80002fc4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xb6ac9543 +80002fc8: 000d2483 lw x9,0(x26) +80002fcc: 004d0d13 addi x26,x26,4 + +80002fd0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b9: + xnor x7, x9, x9 # perform operation +80002fd0: 4094c3b3 xnor x7,x9,x9 + # Check if x7 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x7, Zbkb_xnor_cg_cmp_rs1_rs2_b9, Zbkb_xnor_cg_cmp_rs1_rs2_b9_str) +80002fd4: 0001a683 lw x13,0(x3) +80002fd8: 00768863 beq x13,x7,80002fe8 +80002fdc: 5a40276f jal x14,80005580 +80002fe0: 80002fd0 .word 0x80002fd0 +80002fe4: 8000de24 .word 0x8000de24 +80002fe8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x8bfaf7ad +80002fec: 000d2503 lw x10,0(x26) +80002ff0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xc34dcb0e +80002ff4: 000d2503 lw x10,0(x26) +80002ff8: 004d0d13 addi x26,x26,4 + +80002ffc : +Zbkb_xnor_cg_cmp_rs1_rs2_b10: + xnor x24, x10, x10 # perform operation +80002ffc: 40a54c33 xnor x24,x10,x10 + # Check if x24 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x24, Zbkb_xnor_cg_cmp_rs1_rs2_b10, Zbkb_xnor_cg_cmp_rs1_rs2_b10_str) +80003000: 0001a683 lw x13,0(x3) +80003004: 01868863 beq x13,x24,80003014 +80003008: 5780276f jal x14,80005580 +8000300c: 80002ffc .word 0x80002ffc +80003010: 8000de5c .word 0x8000de5c +80003014: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x50261d3f +80003018: 000d2583 lw x11,0(x26) +8000301c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x3508cf10 +80003020: 000d2583 lw x11,0(x26) +80003024: 004d0d13 addi x26,x26,4 + +80003028 : +Zbkb_xnor_cg_cmp_rs1_rs2_b11: + xnor x4, x11, x11 # perform operation +80003028: 40b5c233 xnor x4,x11,x11 + # Check if x4 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x4, Zbkb_xnor_cg_cmp_rs1_rs2_b11, Zbkb_xnor_cg_cmp_rs1_rs2_b11_str) +8000302c: 0001a683 lw x13,0(x3) +80003030: 00468863 beq x13,x4,80003040 +80003034: 54c0276f jal x14,80005580 +80003038: 80003028 .word 0x80003028 +8000303c: 8000de95 .word 0x8000de95 +80003040: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xd4284915 +80003044: 000d2603 lw x12,0(x26) +80003048: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x928ab627 +8000304c: 000d2603 lw x12,0(x26) +80003050: 004d0d13 addi x26,x26,4 + +80003054 : +Zbkb_xnor_cg_cmp_rs1_rs2_b12: + xnor x27, x12, x12 # perform operation +80003054: 40c64db3 xnor x27,x12,x12 + # Check if x27 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x27, Zbkb_xnor_cg_cmp_rs1_rs2_b12, Zbkb_xnor_cg_cmp_rs1_rs2_b12_str) +80003058: 0001a683 lw x13,0(x3) +8000305c: 01b68863 beq x13,x27,8000306c +80003060: 5200276f jal x14,80005580 +80003064: 80003054 .word 0x80003054 +80003068: 8000dece .word 0x8000dece +8000306c: 00418193 addi x3,x3,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003070: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003074: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xfd214a10 +80003078: 000d2683 lw x13,0(x26) +8000307c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x816f1bf6 +80003080: 000d2683 lw x13,0(x26) +80003084: 004d0d13 addi x26,x26,4 + +80003088 : +Zbkb_xnor_cg_cmp_rs1_rs2_b13: + xnor x16, x13, x13 # perform operation +80003088: 40d6c833 xnor x16,x13,x13 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkb_xnor_cg_cmp_rs1_rs2_b13, Zbkb_xnor_cg_cmp_rs1_rs2_b13_str) +8000308c: 0001a203 lw x4,0(x3) +80003090: 01020863 beq x4,x16,800030a0 +80003094: 4ac022ef jal x5,80005540 +80003098: 80003088 .word 0x80003088 +8000309c: 8000df07 .word 0x8000df07 +800030a0: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x3b592886 +800030a4: 000d2703 lw x14,0(x26) +800030a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x9005aa91 +800030ac: 000d2703 lw x14,0(x26) +800030b0: 004d0d13 addi x26,x26,4 + +800030b4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b14: + xnor x29, x14, x14 # perform operation +800030b4: 40e74eb3 xnor x29,x14,x14 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkb_xnor_cg_cmp_rs1_rs2_b14, Zbkb_xnor_cg_cmp_rs1_rs2_b14_str) +800030b8: 0001a203 lw x4,0(x3) +800030bc: 01d20863 beq x4,x29,800030cc +800030c0: 480022ef jal x5,80005540 +800030c4: 800030b4 .word 0x800030b4 +800030c8: 8000df40 .word 0x8000df40 +800030cc: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xc9dde447 +800030d0: 000d2783 lw x15,0(x26) +800030d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x05eab01f +800030d8: 000d2783 lw x15,0(x26) +800030dc: 004d0d13 addi x26,x26,4 + +800030e0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b15: + xnor x0, x15, x15 # perform operation +800030e0: 40f7c033 xnor x0,x15,x15 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_xnor_cg_cmp_rs1_rs2_b15, Zbkb_xnor_cg_cmp_rs1_rs2_b15_str) +800030e4: 0001a203 lw x4,0(x3) +800030e8: 00020863 beq x4,x0,800030f8 +800030ec: 454022ef jal x5,80005540 +800030f0: 800030e0 .word 0x800030e0 +800030f4: 8000df79 .word 0x8000df79 +800030f8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xc6194f6a +800030fc: 000d2803 lw x16,0(x26) +80003100: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xb19f2020 +80003104: 000d2803 lw x16,0(x26) +80003108: 004d0d13 addi x26,x26,4 + +8000310c : +Zbkb_xnor_cg_cmp_rs1_rs2_b16: + xnor x21, x16, x16 # perform operation +8000310c: 41084ab3 xnor x21,x16,x16 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkb_xnor_cg_cmp_rs1_rs2_b16, Zbkb_xnor_cg_cmp_rs1_rs2_b16_str) +80003110: 0001a203 lw x4,0(x3) +80003114: 01520863 beq x4,x21,80003124 +80003118: 428022ef jal x5,80005540 +8000311c: 8000310c .word 0x8000310c +80003120: 8000dfb2 .word 0x8000dfb2 +80003124: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xa29cdcbf +80003128: 000d2883 lw x17,0(x26) +8000312c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x9b3f5663 +80003130: 000d2883 lw x17,0(x26) +80003134: 004d0d13 addi x26,x26,4 + +80003138 : +Zbkb_xnor_cg_cmp_rs1_rs2_b17: + xnor x28, x17, x17 # perform operation +80003138: 4118ce33 xnor x28,x17,x17 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkb_xnor_cg_cmp_rs1_rs2_b17, Zbkb_xnor_cg_cmp_rs1_rs2_b17_str) +8000313c: 0001a203 lw x4,0(x3) +80003140: 01c20863 beq x4,x28,80003150 +80003144: 3fc022ef jal x5,80005540 +80003148: 80003138 .word 0x80003138 +8000314c: 8000dfeb .word 0x8000dfeb +80003150: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xdf503ae1 +80003154: 000d2903 lw x18,0(x26) +80003158: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x0f517fed +8000315c: 000d2903 lw x18,0(x26) +80003160: 004d0d13 addi x26,x26,4 + +80003164 : +Zbkb_xnor_cg_cmp_rs1_rs2_b18: + xnor x8, x18, x18 # perform operation +80003164: 41294433 xnor x8,x18,x18 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkb_xnor_cg_cmp_rs1_rs2_b18, Zbkb_xnor_cg_cmp_rs1_rs2_b18_str) +80003168: 0001a203 lw x4,0(x3) +8000316c: 00820863 beq x4,x8,8000317c +80003170: 3d0022ef jal x5,80005540 +80003174: 80003164 .word 0x80003164 +80003178: 8000e024 .word 0x8000e024 +8000317c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xf6d2a0cf +80003180: 000d2983 lw x19,0(x26) +80003184: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x4e7e1b9f +80003188: 000d2983 lw x19,0(x26) +8000318c: 004d0d13 addi x26,x26,4 + +80003190 : +Zbkb_xnor_cg_cmp_rs1_rs2_b19: + xnor x25, x19, x19 # perform operation +80003190: 4139ccb3 xnor x25,x19,x19 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_xnor_cg_cmp_rs1_rs2_b19, Zbkb_xnor_cg_cmp_rs1_rs2_b19_str) +80003194: 0001a203 lw x4,0(x3) +80003198: 01920863 beq x4,x25,800031a8 +8000319c: 3a4022ef jal x5,80005540 +800031a0: 80003190 .word 0x80003190 +800031a4: 8000e05d .word 0x8000e05d +800031a8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xa6f9dc62 +800031ac: 000d2a03 lw x20,0(x26) +800031b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x5b5304c0 +800031b4: 000d2a03 lw x20,0(x26) +800031b8: 004d0d13 addi x26,x26,4 + +800031bc : +Zbkb_xnor_cg_cmp_rs1_rs2_b20: + xnor x0, x20, x20 # perform operation +800031bc: 414a4033 xnor x0,x20,x20 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_xnor_cg_cmp_rs1_rs2_b20, Zbkb_xnor_cg_cmp_rs1_rs2_b20_str) +800031c0: 0001a203 lw x4,0(x3) +800031c4: 00020863 beq x4,x0,800031d4 +800031c8: 378022ef jal x5,80005540 +800031cc: 800031bc .word 0x800031bc +800031d0: 8000e096 .word 0x8000e096 +800031d4: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x9fc03462 +800031d8: 000d2a83 lw x21,0(x26) +800031dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x827e6a39 +800031e0: 000d2a83 lw x21,0(x26) +800031e4: 004d0d13 addi x26,x26,4 + +800031e8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b21: + xnor x25, x21, x21 # perform operation +800031e8: 415accb3 xnor x25,x21,x21 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_xnor_cg_cmp_rs1_rs2_b21, Zbkb_xnor_cg_cmp_rs1_rs2_b21_str) +800031ec: 0001a203 lw x4,0(x3) +800031f0: 01920863 beq x4,x25,80003200 +800031f4: 34c022ef jal x5,80005540 +800031f8: 800031e8 .word 0x800031e8 +800031fc: 8000e0cf .word 0x8000e0cf +80003200: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x88420617 +80003204: 000d2b03 lw x22,0(x26) +80003208: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x5aff6172 +8000320c: 000d2b03 lw x22,0(x26) +80003210: 004d0d13 addi x26,x26,4 + +80003214 : +Zbkb_xnor_cg_cmp_rs1_rs2_b22: + xnor x16, x22, x22 # perform operation +80003214: 416b4833 xnor x16,x22,x22 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkb_xnor_cg_cmp_rs1_rs2_b22, Zbkb_xnor_cg_cmp_rs1_rs2_b22_str) +80003218: 0001a203 lw x4,0(x3) +8000321c: 01020863 beq x4,x16,8000322c +80003220: 320022ef jal x5,80005540 +80003224: 80003214 .word 0x80003214 +80003228: 8000e108 .word 0x8000e108 +8000322c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xcab18763 +80003230: 000d2b83 lw x23,0(x26) +80003234: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x23073b99 +80003238: 000d2b83 lw x23,0(x26) +8000323c: 004d0d13 addi x26,x26,4 + +80003240 : +Zbkb_xnor_cg_cmp_rs1_rs2_b23: + xnor x25, x23, x23 # perform operation +80003240: 417bccb3 xnor x25,x23,x23 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_xnor_cg_cmp_rs1_rs2_b23, Zbkb_xnor_cg_cmp_rs1_rs2_b23_str) +80003244: 0001a203 lw x4,0(x3) +80003248: 01920863 beq x4,x25,80003258 +8000324c: 2f4022ef jal x5,80005540 +80003250: 80003240 .word 0x80003240 +80003254: 8000e141 .word 0x8000e141 +80003258: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x49b87fae +8000325c: 000d2c03 lw x24,0(x26) +80003260: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x6198155a +80003264: 000d2c03 lw x24,0(x26) +80003268: 004d0d13 addi x26,x26,4 + +8000326c : +Zbkb_xnor_cg_cmp_rs1_rs2_b24: + xnor x7, x24, x24 # perform operation +8000326c: 418c43b3 xnor x7,x24,x24 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkb_xnor_cg_cmp_rs1_rs2_b24, Zbkb_xnor_cg_cmp_rs1_rs2_b24_str) +80003270: 0001a203 lw x4,0(x3) +80003274: 00720863 beq x4,x7,80003284 +80003278: 2c8022ef jal x5,80005540 +8000327c: 8000326c .word 0x8000326c +80003280: 8000e17a .word 0x8000e17a +80003284: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x5ff0cebb +80003288: 000d2c83 lw x25,0(x26) +8000328c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xeaabfb0f +80003290: 000d2c83 lw x25,0(x26) +80003294: 004d0d13 addi x26,x26,4 + +80003298 : +Zbkb_xnor_cg_cmp_rs1_rs2_b25: + xnor x23, x25, x25 # perform operation +80003298: 419ccbb3 xnor x23,x25,x25 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkb_xnor_cg_cmp_rs1_rs2_b25, Zbkb_xnor_cg_cmp_rs1_rs2_b25_str) +8000329c: 0001a203 lw x4,0(x3) +800032a0: 01720863 beq x4,x23,800032b0 +800032a4: 29c022ef jal x5,80005540 +800032a8: 80003298 .word 0x80003298 +800032ac: 8000e1b3 .word 0x8000e1b3 +800032b0: 00418193 addi x3,x3,4 + + mv x12, x26 # switch data pointer register to avoid conflict with test +800032b4: 000d0613 addi x12,x26,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x3be438d6 +800032b8: 00062d03 lw x26,0(x12) +800032bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xe2d772fc +800032c0: 00062d03 lw x26,0(x12) +800032c4: 00460613 addi x12,x12,4 + +800032c8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b26: + xnor x9, x26, x26 # perform operation +800032c8: 41ad44b3 xnor x9,x26,x26 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkb_xnor_cg_cmp_rs1_rs2_b26, Zbkb_xnor_cg_cmp_rs1_rs2_b26_str) +800032cc: 0001a203 lw x4,0(x3) +800032d0: 00920863 beq x4,x9,800032e0 +800032d4: 26c022ef jal x5,80005540 +800032d8: 800032c8 .word 0x800032c8 +800032dc: 8000e1ec .word 0x8000e1ec +800032e0: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xf9c60135 +800032e4: 00062d83 lw x27,0(x12) +800032e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x1f7547b1 +800032ec: 00062d83 lw x27,0(x12) +800032f0: 00460613 addi x12,x12,4 + +800032f4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b27: + xnor x20, x27, x27 # perform operation +800032f4: 41bdca33 xnor x20,x27,x27 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkb_xnor_cg_cmp_rs1_rs2_b27, Zbkb_xnor_cg_cmp_rs1_rs2_b27_str) +800032f8: 0001a203 lw x4,0(x3) +800032fc: 01420863 beq x4,x20,8000330c +80003300: 240022ef jal x5,80005540 +80003304: 800032f4 .word 0x800032f4 +80003308: 8000e225 .word 0x8000e225 +8000330c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x97818dd5 +80003310: 00062e03 lw x28,0(x12) +80003314: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x6d5a4c94 +80003318: 00062e03 lw x28,0(x12) +8000331c: 00460613 addi x12,x12,4 + +80003320 : +Zbkb_xnor_cg_cmp_rs1_rs2_b28: + xnor x30, x28, x28 # perform operation +80003320: 41ce4f33 xnor x30,x28,x28 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkb_xnor_cg_cmp_rs1_rs2_b28, Zbkb_xnor_cg_cmp_rs1_rs2_b28_str) +80003324: 0001a203 lw x4,0(x3) +80003328: 01e20863 beq x4,x30,80003338 +8000332c: 214022ef jal x5,80005540 +80003330: 80003320 .word 0x80003320 +80003334: 8000e25e .word 0x8000e25e +80003338: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x590ab5c4 +8000333c: 00062e83 lw x29,0(x12) +80003340: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xb5412637 +80003344: 00062e83 lw x29,0(x12) +80003348: 00460613 addi x12,x12,4 + +8000334c : +Zbkb_xnor_cg_cmp_rs1_rs2_b29: + xnor x9, x29, x29 # perform operation +8000334c: 41dec4b3 xnor x9,x29,x29 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkb_xnor_cg_cmp_rs1_rs2_b29, Zbkb_xnor_cg_cmp_rs1_rs2_b29_str) +80003350: 0001a203 lw x4,0(x3) +80003354: 00920863 beq x4,x9,80003364 +80003358: 1e8022ef jal x5,80005540 +8000335c: 8000334c .word 0x8000334c +80003360: 8000e297 .word 0x8000e297 +80003364: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x44b71cc2 +80003368: 00062f03 lw x30,0(x12) +8000336c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7309c068 +80003370: 00062f03 lw x30,0(x12) +80003374: 00460613 addi x12,x12,4 + +80003378 : +Zbkb_xnor_cg_cmp_rs1_rs2_b30: + xnor x31, x30, x30 # perform operation +80003378: 41ef4fb3 xnor x31,x30,x30 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkb_xnor_cg_cmp_rs1_rs2_b30, Zbkb_xnor_cg_cmp_rs1_rs2_b30_str) +8000337c: 0001a203 lw x4,0(x3) +80003380: 01f20863 beq x4,x31,80003390 +80003384: 1bc022ef jal x5,80005540 +80003388: 80003378 .word 0x80003378 +8000338c: 8000e2d0 .word 0x8000e2d0 +80003390: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x38ec252d +80003394: 00062f83 lw x31,0(x12) +80003398: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x8f31f8af +8000339c: 00062f83 lw x31,0(x12) +800033a0: 00460613 addi x12,x12,4 + +800033a4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b31: + xnor x17, x31, x31 # perform operation +800033a4: 41ffc8b3 xnor x17,x31,x31 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkb_xnor_cg_cmp_rs1_rs2_b31, Zbkb_xnor_cg_cmp_rs1_rs2_b31_str) +800033a8: 0001a203 lw x4,0(x3) +800033ac: 01120863 beq x4,x17,800033bc +800033b0: 190022ef jal x5,80005540 +800033b4: 800033a4 .word 0x800033a4 +800033b8: 8000e309 .word 0x8000e309 +800033bc: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xb2b4439e +800033c0: 00062003 lw x0,0(x12) +800033c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x23d2a0e8 +800033c8: 00062b83 lw x23,0(x12) +800033cc: 00460613 addi x12,x12,4 + +800033d0 : +Zbkb_xnor_cg_cmp_rd_rs1_b0: + xnor x0, x0, x23 # perform operation +800033d0: 41704033 xnor x0,x0,x23 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_xnor_cg_cmp_rd_rs1_b0, Zbkb_xnor_cg_cmp_rd_rs1_b0_str) +800033d4: 0001a203 lw x4,0(x3) +800033d8: 00020863 beq x4,x0,800033e8 +800033dc: 164022ef jal x5,80005540 +800033e0: 800033d0 .word 0x800033d0 +800033e4: 8000e342 .word 0x8000e342 +800033e8: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xf604b941 +800033ec: 00062083 lw x1,0(x12) +800033f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xdd9c7b0c +800033f4: 00062d83 lw x27,0(x12) +800033f8: 00460613 addi x12,x12,4 + +800033fc : +Zbkb_xnor_cg_cmp_rd_rs1_b1: + xnor x1, x1, x27 # perform operation +800033fc: 41b0c0b3 xnor x1,x1,x27 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_xnor_cg_cmp_rd_rs1_b1, Zbkb_xnor_cg_cmp_rd_rs1_b1_str) +80003400: 0001a203 lw x4,0(x3) +80003404: 00120863 beq x4,x1,80003414 +80003408: 138022ef jal x5,80005540 +8000340c: 800033fc .word 0x800033fc +80003410: 8000e379 .word 0x8000e379 +80003414: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xa0db3def +80003418: 00062103 lw x2,0(x12) +8000341c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x1249e102 +80003420: 00062b03 lw x22,0(x12) +80003424: 00460613 addi x12,x12,4 + +80003428 : +Zbkb_xnor_cg_cmp_rd_rs1_b2: + xnor x2, x2, x22 # perform operation +80003428: 41614133 xnor x2,x2,x22 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_xnor_cg_cmp_rd_rs1_b2, Zbkb_xnor_cg_cmp_rd_rs1_b2_str) +8000342c: 0001a203 lw x4,0(x3) +80003430: 00220863 beq x4,x2,80003440 +80003434: 10c022ef jal x5,80005540 +80003438: 80003428 .word 0x80003428 +8000343c: 8000e3b0 .word 0x8000e3b0 +80003440: 00418193 addi x3,x3,4 + + mv x22, x3 # switch signature pointer register to avoid conflict with test +80003444: 00018b13 addi x22,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xa1349e46 +80003448: 00062183 lw x3,0(x12) +8000344c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x7e487c5e +80003450: 00062f83 lw x31,0(x12) +80003454: 00460613 addi x12,x12,4 + +80003458 : +Zbkb_xnor_cg_cmp_rd_rs1_b3: + xnor x3, x3, x31 # perform operation +80003458: 41f1c1b3 xnor x3,x3,x31 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zbkb_xnor_cg_cmp_rd_rs1_b3, Zbkb_xnor_cg_cmp_rd_rs1_b3_str) +8000345c: 000b2203 lw x4,0(x22) +80003460: 00320863 beq x4,x3,80003470 +80003464: 0dc022ef jal x5,80005540 +80003468: 80003458 .word 0x80003458 +8000346c: 8000e3e7 .word 0x8000e3e7 +80003470: 004b0b13 addi x22,x22,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003474: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003478: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xa5ca70f7 +8000347c: 00062203 lw x4,0(x12) +80003480: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xaf3843ff +80003484: 00062403 lw x8,0(x12) +80003488: 00460613 addi x12,x12,4 + +8000348c : +Zbkb_xnor_cg_cmp_rd_rs1_b4: + xnor x4, x4, x8 # perform operation +8000348c: 40824233 xnor x4,x4,x8 + # Check if x4 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x4, Zbkb_xnor_cg_cmp_rd_rs1_b4, Zbkb_xnor_cg_cmp_rd_rs1_b4_str) +80003490: 000b2683 lw x13,0(x22) +80003494: 00468863 beq x13,x4,800034a4 +80003498: 0e80276f jal x14,80005580 +8000349c: 8000348c .word 0x8000348c +800034a0: 8000e41e .word 0x8000e41e +800034a4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x7a542510 +800034a8: 00062283 lw x5,0(x12) +800034ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x23da914c +800034b0: 00062203 lw x4,0(x12) +800034b4: 00460613 addi x12,x12,4 + +800034b8 : +Zbkb_xnor_cg_cmp_rd_rs1_b5: + xnor x5, x5, x4 # perform operation +800034b8: 4042c2b3 xnor x5,x5,x4 + # Check if x5 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x5, Zbkb_xnor_cg_cmp_rd_rs1_b5, Zbkb_xnor_cg_cmp_rd_rs1_b5_str) +800034bc: 000b2683 lw x13,0(x22) +800034c0: 00568863 beq x13,x5,800034d0 +800034c4: 0bc0276f jal x14,80005580 +800034c8: 800034b8 .word 0x800034b8 +800034cc: 8000e455 .word 0x8000e455 +800034d0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x41d06737 +800034d4: 00062303 lw x6,0(x12) +800034d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xe22e36f3 +800034dc: 00062d83 lw x27,0(x12) +800034e0: 00460613 addi x12,x12,4 + +800034e4 : +Zbkb_xnor_cg_cmp_rd_rs1_b6: + xnor x6, x6, x27 # perform operation +800034e4: 41b34333 xnor x6,x6,x27 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zbkb_xnor_cg_cmp_rd_rs1_b6, Zbkb_xnor_cg_cmp_rd_rs1_b6_str) +800034e8: 000b2683 lw x13,0(x22) +800034ec: 00668863 beq x13,x6,800034fc +800034f0: 0900276f jal x14,80005580 +800034f4: 800034e4 .word 0x800034e4 +800034f8: 8000e48c .word 0x8000e48c +800034fc: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xea2fac96 +80003500: 00062383 lw x7,0(x12) +80003504: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xf7d20c07 +80003508: 00062f03 lw x30,0(x12) +8000350c: 00460613 addi x12,x12,4 + +80003510 : +Zbkb_xnor_cg_cmp_rd_rs1_b7: + xnor x7, x7, x30 # perform operation +80003510: 41e3c3b3 xnor x7,x7,x30 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zbkb_xnor_cg_cmp_rd_rs1_b7, Zbkb_xnor_cg_cmp_rd_rs1_b7_str) +80003514: 000b2683 lw x13,0(x22) +80003518: 00768863 beq x13,x7,80003528 +8000351c: 0640276f jal x14,80005580 +80003520: 80003510 .word 0x80003510 +80003524: 8000e4c3 .word 0x8000e4c3 +80003528: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x6087b94d +8000352c: 00062403 lw x8,0(x12) +80003530: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xf1c10d80 +80003534: 00062503 lw x10,0(x12) +80003538: 00460613 addi x12,x12,4 + +8000353c : +Zbkb_xnor_cg_cmp_rd_rs1_b8: + xnor x8, x8, x10 # perform operation +8000353c: 40a44433 xnor x8,x8,x10 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zbkb_xnor_cg_cmp_rd_rs1_b8, Zbkb_xnor_cg_cmp_rd_rs1_b8_str) +80003540: 000b2683 lw x13,0(x22) +80003544: 00868863 beq x13,x8,80003554 +80003548: 0380276f jal x14,80005580 +8000354c: 8000353c .word 0x8000353c +80003550: 8000e4fa .word 0x8000e4fa +80003554: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7655c6e3 +80003558: 00062483 lw x9,0(x12) +8000355c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x2ee456a3 +80003560: 00062983 lw x19,0(x12) +80003564: 00460613 addi x12,x12,4 + +80003568 : +Zbkb_xnor_cg_cmp_rd_rs1_b9: + xnor x9, x9, x19 # perform operation +80003568: 4134c4b3 xnor x9,x9,x19 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zbkb_xnor_cg_cmp_rd_rs1_b9, Zbkb_xnor_cg_cmp_rd_rs1_b9_str) +8000356c: 000b2683 lw x13,0(x22) +80003570: 00968863 beq x13,x9,80003580 +80003574: 00c0276f jal x14,80005580 +80003578: 80003568 .word 0x80003568 +8000357c: 8000e531 .word 0x8000e531 +80003580: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x87c4695b +80003584: 00062503 lw x10,0(x12) +80003588: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x1470ade8 +8000358c: 00062203 lw x4,0(x12) +80003590: 00460613 addi x12,x12,4 + +80003594 : +Zbkb_xnor_cg_cmp_rd_rs1_b10: + xnor x10, x10, x4 # perform operation +80003594: 40454533 xnor x10,x10,x4 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zbkb_xnor_cg_cmp_rd_rs1_b10, Zbkb_xnor_cg_cmp_rd_rs1_b10_str) +80003598: 000b2683 lw x13,0(x22) +8000359c: 00a68863 beq x13,x10,800035ac +800035a0: 7e10176f jal x14,80005580 +800035a4: 80003594 .word 0x80003594 +800035a8: 8000e568 .word 0x8000e568 +800035ac: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x9bd9ae03 +800035b0: 00062583 lw x11,0(x12) +800035b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x59570c60 +800035b8: 00062183 lw x3,0(x12) +800035bc: 00460613 addi x12,x12,4 + +800035c0 : +Zbkb_xnor_cg_cmp_rd_rs1_b11: + xnor x11, x11, x3 # perform operation +800035c0: 4035c5b3 xnor x11,x11,x3 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zbkb_xnor_cg_cmp_rd_rs1_b11, Zbkb_xnor_cg_cmp_rd_rs1_b11_str) +800035c4: 000b2683 lw x13,0(x22) +800035c8: 00b68863 beq x13,x11,800035d8 +800035cc: 7b50176f jal x14,80005580 +800035d0: 800035c0 .word 0x800035c0 +800035d4: 8000e5a0 .word 0x8000e5a0 +800035d8: 004b0b13 addi x22,x22,4 + + mv x9, x12 # switch data pointer register to avoid conflict with test +800035dc: 00060493 addi x9,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x22b5eb1e +800035e0: 0004a603 lw x12,0(x9) +800035e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xfc8d440b +800035e8: 0004a783 lw x15,0(x9) +800035ec: 00448493 addi x9,x9,4 + +800035f0 : +Zbkb_xnor_cg_cmp_rd_rs1_b12: + xnor x12, x12, x15 # perform operation +800035f0: 40f64633 xnor x12,x12,x15 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zbkb_xnor_cg_cmp_rd_rs1_b12, Zbkb_xnor_cg_cmp_rd_rs1_b12_str) +800035f4: 000b2683 lw x13,0(x22) +800035f8: 00c68863 beq x13,x12,80003608 +800035fc: 7850176f jal x14,80005580 +80003600: 800035f0 .word 0x800035f0 +80003604: 8000e5d8 .word 0x8000e5d8 +80003608: 004b0b13 addi x22,x22,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000360c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003610: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x753724af +80003614: 0004a683 lw x13,0(x9) +80003618: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xe9ffcebb +8000361c: 0004a083 lw x1,0(x9) +80003620: 00448493 addi x9,x9,4 + +80003624 : +Zbkb_xnor_cg_cmp_rd_rs1_b13: + xnor x13, x13, x1 # perform operation +80003624: 4016c6b3 xnor x13,x13,x1 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zbkb_xnor_cg_cmp_rd_rs1_b13, Zbkb_xnor_cg_cmp_rd_rs1_b13_str) +80003628: 000b2383 lw x7,0(x22) +8000362c: 00d38863 beq x7,x13,8000363c +80003630: 7290146f jal x8,80005558 +80003634: 80003624 .word 0x80003624 +80003638: 8000e610 .word 0x8000e610 +8000363c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7a017939 +80003640: 0004a703 lw x14,0(x9) +80003644: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x263e51e8 +80003648: 0004aa03 lw x20,0(x9) +8000364c: 00448493 addi x9,x9,4 + +80003650 : +Zbkb_xnor_cg_cmp_rd_rs1_b14: + xnor x14, x14, x20 # perform operation +80003650: 41474733 xnor x14,x14,x20 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zbkb_xnor_cg_cmp_rd_rs1_b14, Zbkb_xnor_cg_cmp_rd_rs1_b14_str) +80003654: 000b2383 lw x7,0(x22) +80003658: 00e38863 beq x7,x14,80003668 +8000365c: 6fd0146f jal x8,80005558 +80003660: 80003650 .word 0x80003650 +80003664: 8000e648 .word 0x8000e648 +80003668: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x5e416861 +8000366c: 0004a783 lw x15,0(x9) +80003670: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xce0a7767 +80003674: 0004ad83 lw x27,0(x9) +80003678: 00448493 addi x9,x9,4 + +8000367c : +Zbkb_xnor_cg_cmp_rd_rs1_b15: + xnor x15, x15, x27 # perform operation +8000367c: 41b7c7b3 xnor x15,x15,x27 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zbkb_xnor_cg_cmp_rd_rs1_b15, Zbkb_xnor_cg_cmp_rd_rs1_b15_str) +80003680: 000b2383 lw x7,0(x22) +80003684: 00f38863 beq x7,x15,80003694 +80003688: 6d10146f jal x8,80005558 +8000368c: 8000367c .word 0x8000367c +80003690: 8000e680 .word 0x8000e680 +80003694: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xde960bcb +80003698: 0004a803 lw x16,0(x9) +8000369c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x7d0ddc71 +800036a0: 0004a103 lw x2,0(x9) +800036a4: 00448493 addi x9,x9,4 + +800036a8 : +Zbkb_xnor_cg_cmp_rd_rs1_b16: + xnor x16, x16, x2 # perform operation +800036a8: 40284833 xnor x16,x16,x2 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zbkb_xnor_cg_cmp_rd_rs1_b16, Zbkb_xnor_cg_cmp_rd_rs1_b16_str) +800036ac: 000b2383 lw x7,0(x22) +800036b0: 01038863 beq x7,x16,800036c0 +800036b4: 6a50146f jal x8,80005558 +800036b8: 800036a8 .word 0x800036a8 +800036bc: 8000e6b8 .word 0x8000e6b8 +800036c0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x9e064956 +800036c4: 0004a883 lw x17,0(x9) +800036c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xb21487e1 +800036cc: 0004a683 lw x13,0(x9) +800036d0: 00448493 addi x9,x9,4 + +800036d4 : +Zbkb_xnor_cg_cmp_rd_rs1_b17: + xnor x17, x17, x13 # perform operation +800036d4: 40d8c8b3 xnor x17,x17,x13 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zbkb_xnor_cg_cmp_rd_rs1_b17, Zbkb_xnor_cg_cmp_rd_rs1_b17_str) +800036d8: 000b2383 lw x7,0(x22) +800036dc: 01138863 beq x7,x17,800036ec +800036e0: 6790146f jal x8,80005558 +800036e4: 800036d4 .word 0x800036d4 +800036e8: 8000e6f0 .word 0x8000e6f0 +800036ec: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x48c5ca3b +800036f0: 0004a903 lw x18,0(x9) +800036f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x3668b999 +800036f8: 0004ae83 lw x29,0(x9) +800036fc: 00448493 addi x9,x9,4 + +80003700 : +Zbkb_xnor_cg_cmp_rd_rs1_b18: + xnor x18, x18, x29 # perform operation +80003700: 41d94933 xnor x18,x18,x29 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zbkb_xnor_cg_cmp_rd_rs1_b18, Zbkb_xnor_cg_cmp_rd_rs1_b18_str) +80003704: 000b2383 lw x7,0(x22) +80003708: 01238863 beq x7,x18,80003718 +8000370c: 64d0146f jal x8,80005558 +80003710: 80003700 .word 0x80003700 +80003714: 8000e728 .word 0x8000e728 +80003718: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x98319f3f +8000371c: 0004a983 lw x19,0(x9) +80003720: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xbbf8b88f +80003724: 0004a503 lw x10,0(x9) +80003728: 00448493 addi x9,x9,4 + +8000372c : +Zbkb_xnor_cg_cmp_rd_rs1_b19: + xnor x19, x19, x10 # perform operation +8000372c: 40a9c9b3 xnor x19,x19,x10 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zbkb_xnor_cg_cmp_rd_rs1_b19, Zbkb_xnor_cg_cmp_rd_rs1_b19_str) +80003730: 000b2383 lw x7,0(x22) +80003734: 01338863 beq x7,x19,80003744 +80003738: 6210146f jal x8,80005558 +8000373c: 8000372c .word 0x8000372c +80003740: 8000e760 .word 0x8000e760 +80003744: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x4ad1e044 +80003748: 0004aa03 lw x20,0(x9) +8000374c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xcae79aa4 +80003750: 0004a683 lw x13,0(x9) +80003754: 00448493 addi x9,x9,4 + +80003758 : +Zbkb_xnor_cg_cmp_rd_rs1_b20: + xnor x20, x20, x13 # perform operation +80003758: 40da4a33 xnor x20,x20,x13 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zbkb_xnor_cg_cmp_rd_rs1_b20, Zbkb_xnor_cg_cmp_rd_rs1_b20_str) +8000375c: 000b2383 lw x7,0(x22) +80003760: 01438863 beq x7,x20,80003770 +80003764: 5f50146f jal x8,80005558 +80003768: 80003758 .word 0x80003758 +8000376c: 8000e798 .word 0x8000e798 +80003770: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7a91eeee +80003774: 0004aa83 lw x21,0(x9) +80003778: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x513e0714 +8000377c: 0004a983 lw x19,0(x9) +80003780: 00448493 addi x9,x9,4 + +80003784 : +Zbkb_xnor_cg_cmp_rd_rs1_b21: + xnor x21, x21, x19 # perform operation +80003784: 413acab3 xnor x21,x21,x19 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zbkb_xnor_cg_cmp_rd_rs1_b21, Zbkb_xnor_cg_cmp_rd_rs1_b21_str) +80003788: 000b2383 lw x7,0(x22) +8000378c: 01538863 beq x7,x21,8000379c +80003790: 5c90146f jal x8,80005558 +80003794: 80003784 .word 0x80003784 +80003798: 8000e7d0 .word 0x8000e7d0 +8000379c: 004b0b13 addi x22,x22,4 + + mv x24, x22 # switch signature pointer register to avoid conflict with test +800037a0: 000b0c13 addi x24,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x1327cc95 +800037a4: 0004ab03 lw x22,0(x9) +800037a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x6723c992 +800037ac: 0004a203 lw x4,0(x9) +800037b0: 00448493 addi x9,x9,4 + +800037b4 : +Zbkb_xnor_cg_cmp_rd_rs1_b22: + xnor x22, x22, x4 # perform operation +800037b4: 404b4b33 xnor x22,x22,x4 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zbkb_xnor_cg_cmp_rd_rs1_b22, Zbkb_xnor_cg_cmp_rd_rs1_b22_str) +800037b8: 000c2383 lw x7,0(x24) +800037bc: 01638863 beq x7,x22,800037cc +800037c0: 5990146f jal x8,80005558 +800037c4: 800037b4 .word 0x800037b4 +800037c8: 8000e808 .word 0x8000e808 +800037cc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xac009a7e +800037d0: 0004ab83 lw x23,0(x9) +800037d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xf3ad9b27 +800037d8: 0004a503 lw x10,0(x9) +800037dc: 00448493 addi x9,x9,4 + +800037e0 : +Zbkb_xnor_cg_cmp_rd_rs1_b23: + xnor x23, x23, x10 # perform operation +800037e0: 40abcbb3 xnor x23,x23,x10 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zbkb_xnor_cg_cmp_rd_rs1_b23, Zbkb_xnor_cg_cmp_rd_rs1_b23_str) +800037e4: 000c2383 lw x7,0(x24) +800037e8: 01738863 beq x7,x23,800037f8 +800037ec: 56d0146f jal x8,80005558 +800037f0: 800037e0 .word 0x800037e0 +800037f4: 8000e840 .word 0x8000e840 +800037f8: 004c0c13 addi x24,x24,4 + + mv x10, x24 # switch signature pointer register to avoid conflict with test +800037fc: 000c0513 addi x10,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x997781fb +80003800: 0004ac03 lw x24,0(x9) +80003804: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x800f81b0 +80003808: 0004ab83 lw x23,0(x9) +8000380c: 00448493 addi x9,x9,4 + +80003810 : +Zbkb_xnor_cg_cmp_rd_rs1_b24: + xnor x24, x24, x23 # perform operation +80003810: 417c4c33 xnor x24,x24,x23 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zbkb_xnor_cg_cmp_rd_rs1_b24, Zbkb_xnor_cg_cmp_rd_rs1_b24_str) +80003814: 00052383 lw x7,0(x10) +80003818: 01838863 beq x7,x24,80003828 +8000381c: 53d0146f jal x8,80005558 +80003820: 80003810 .word 0x80003810 +80003824: 8000e878 .word 0x8000e878 +80003828: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x31642aa0 +8000382c: 0004ac83 lw x25,0(x9) +80003830: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xd559413e +80003834: 0004a283 lw x5,0(x9) +80003838: 00448493 addi x9,x9,4 + +8000383c : +Zbkb_xnor_cg_cmp_rd_rs1_b25: + xnor x25, x25, x5 # perform operation +8000383c: 405cccb3 xnor x25,x25,x5 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkb_xnor_cg_cmp_rd_rs1_b25, Zbkb_xnor_cg_cmp_rd_rs1_b25_str) +80003840: 00052383 lw x7,0(x10) +80003844: 01938863 beq x7,x25,80003854 +80003848: 5110146f jal x8,80005558 +8000384c: 8000383c .word 0x8000383c +80003850: 8000e8b0 .word 0x8000e8b0 +80003854: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0c1a1d8e +80003858: 0004ad03 lw x26,0(x9) +8000385c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x6992907d +80003860: 0004ae83 lw x29,0(x9) +80003864: 00448493 addi x9,x9,4 + +80003868 : +Zbkb_xnor_cg_cmp_rd_rs1_b26: + xnor x26, x26, x29 # perform operation +80003868: 41dd4d33 xnor x26,x26,x29 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zbkb_xnor_cg_cmp_rd_rs1_b26, Zbkb_xnor_cg_cmp_rd_rs1_b26_str) +8000386c: 00052383 lw x7,0(x10) +80003870: 01a38863 beq x7,x26,80003880 +80003874: 4e50146f jal x8,80005558 +80003878: 80003868 .word 0x80003868 +8000387c: 8000e8e8 .word 0x8000e8e8 +80003880: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x93b45d73 +80003884: 0004ad83 lw x27,0(x9) +80003888: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x487e945b +8000388c: 0004a683 lw x13,0(x9) +80003890: 00448493 addi x9,x9,4 + +80003894 : +Zbkb_xnor_cg_cmp_rd_rs1_b27: + xnor x27, x27, x13 # perform operation +80003894: 40ddcdb3 xnor x27,x27,x13 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zbkb_xnor_cg_cmp_rd_rs1_b27, Zbkb_xnor_cg_cmp_rd_rs1_b27_str) +80003898: 00052383 lw x7,0(x10) +8000389c: 01b38863 beq x7,x27,800038ac +800038a0: 4b90146f jal x8,80005558 +800038a4: 80003894 .word 0x80003894 +800038a8: 8000e920 .word 0x8000e920 +800038ac: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xb3326ed2 +800038b0: 0004ae03 lw x28,0(x9) +800038b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xd2632041 +800038b8: 0004ae83 lw x29,0(x9) +800038bc: 00448493 addi x9,x9,4 + +800038c0 : +Zbkb_xnor_cg_cmp_rd_rs1_b28: + xnor x28, x28, x29 # perform operation +800038c0: 41de4e33 xnor x28,x28,x29 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zbkb_xnor_cg_cmp_rd_rs1_b28, Zbkb_xnor_cg_cmp_rd_rs1_b28_str) +800038c4: 00052383 lw x7,0(x10) +800038c8: 01c38863 beq x7,x28,800038d8 +800038cc: 48d0146f jal x8,80005558 +800038d0: 800038c0 .word 0x800038c0 +800038d4: 8000e958 .word 0x8000e958 +800038d8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xeeb1800d +800038dc: 0004ae83 lw x29,0(x9) +800038e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x3c99da83 +800038e4: 0004aa83 lw x21,0(x9) +800038e8: 00448493 addi x9,x9,4 + +800038ec : +Zbkb_xnor_cg_cmp_rd_rs1_b29: + xnor x29, x29, x21 # perform operation +800038ec: 415eceb3 xnor x29,x29,x21 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_xnor_cg_cmp_rd_rs1_b29, Zbkb_xnor_cg_cmp_rd_rs1_b29_str) +800038f0: 00052383 lw x7,0(x10) +800038f4: 01d38863 beq x7,x29,80003904 +800038f8: 4610146f jal x8,80005558 +800038fc: 800038ec .word 0x800038ec +80003900: 8000e990 .word 0x8000e990 +80003904: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x670d21b5 +80003908: 0004af03 lw x30,0(x9) +8000390c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0xc3d6ef55 +80003910: 0004ab83 lw x23,0(x9) +80003914: 00448493 addi x9,x9,4 + +80003918 : +Zbkb_xnor_cg_cmp_rd_rs1_b30: + xnor x30, x30, x23 # perform operation +80003918: 417f4f33 xnor x30,x30,x23 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zbkb_xnor_cg_cmp_rd_rs1_b30, Zbkb_xnor_cg_cmp_rd_rs1_b30_str) +8000391c: 00052383 lw x7,0(x10) +80003920: 01e38863 beq x7,x30,80003930 +80003924: 4350146f jal x8,80005558 +80003928: 80003918 .word 0x80003918 +8000392c: 8000e9c8 .word 0x8000e9c8 +80003930: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xba071a08 +80003934: 0004af83 lw x31,0(x9) +80003938: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x9a2b60a9 +8000393c: 0004ac83 lw x25,0(x9) +80003940: 00448493 addi x9,x9,4 + +80003944 : +Zbkb_xnor_cg_cmp_rd_rs1_b31: + xnor x31, x31, x25 # perform operation +80003944: 419fcfb3 xnor x31,x31,x25 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zbkb_xnor_cg_cmp_rd_rs1_b31, Zbkb_xnor_cg_cmp_rd_rs1_b31_str) +80003948: 00052383 lw x7,0(x10) +8000394c: 01f38863 beq x7,x31,8000395c +80003950: 4090146f jal x8,80005558 +80003954: 80003944 .word 0x80003944 +80003958: 8000ea00 .word 0x8000ea00 +8000395c: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x4d54cb7a +80003960: 0004a583 lw x11,0(x9) +80003964: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x14f34ba2 +80003968: 0004a003 lw x0,0(x9) +8000396c: 00448493 addi x9,x9,4 + +80003970 : +Zbkb_xnor_cg_cmp_rd_rs2_b0: + xnor x0, x11, x0 # perform operation +80003970: 4005c033 xnor x0,x11,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkb_xnor_cg_cmp_rd_rs2_b0, Zbkb_xnor_cg_cmp_rd_rs2_b0_str) +80003974: 00052383 lw x7,0(x10) +80003978: 00038863 beq x7,x0,80003988 +8000397c: 3dd0146f jal x8,80005558 +80003980: 80003970 .word 0x80003970 +80003984: 8000ea38 .word 0x8000ea38 +80003988: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xdbc3a15b +8000398c: 0004a603 lw x12,0(x9) +80003990: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xa6e1c28c +80003994: 0004a083 lw x1,0(x9) +80003998: 00448493 addi x9,x9,4 + +8000399c : +Zbkb_xnor_cg_cmp_rd_rs2_b1: + xnor x1, x12, x1 # perform operation +8000399c: 401640b3 xnor x1,x12,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_xnor_cg_cmp_rd_rs2_b1, Zbkb_xnor_cg_cmp_rd_rs2_b1_str) +800039a0: 00052383 lw x7,0(x10) +800039a4: 00138863 beq x7,x1,800039b4 +800039a8: 3b10146f jal x8,80005558 +800039ac: 8000399c .word 0x8000399c +800039b0: 8000ea6f .word 0x8000ea6f +800039b4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x9011f751 +800039b8: 0004ad03 lw x26,0(x9) +800039bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x6d0a3060 +800039c0: 0004a103 lw x2,0(x9) +800039c4: 00448493 addi x9,x9,4 + +800039c8 : +Zbkb_xnor_cg_cmp_rd_rs2_b2: + xnor x2, x26, x2 # perform operation +800039c8: 402d4133 xnor x2,x26,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkb_xnor_cg_cmp_rd_rs2_b2, Zbkb_xnor_cg_cmp_rd_rs2_b2_str) +800039cc: 00052383 lw x7,0(x10) +800039d0: 00238863 beq x7,x2,800039e0 +800039d4: 3850146f jal x8,80005558 +800039d8: 800039c8 .word 0x800039c8 +800039dc: 8000eaa6 .word 0x8000eaa6 +800039e0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x91015dcf +800039e4: 0004a203 lw x4,0(x9) +800039e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x8b9b79dc +800039ec: 0004a183 lw x3,0(x9) +800039f0: 00448493 addi x9,x9,4 + +800039f4 : +Zbkb_xnor_cg_cmp_rd_rs2_b3: + xnor x3, x4, x3 # perform operation +800039f4: 403241b3 xnor x3,x4,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_xnor_cg_cmp_rd_rs2_b3, Zbkb_xnor_cg_cmp_rd_rs2_b3_str) +800039f8: 00052383 lw x7,0(x10) +800039fc: 00338863 beq x7,x3,80003a0c +80003a00: 3590146f jal x8,80005558 +80003a04: 800039f4 .word 0x800039f4 +80003a08: 8000eadd .word 0x8000eadd +80003a0c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x6e7816f1 +80003a10: 0004a683 lw x13,0(x9) +80003a14: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xa8f7cf39 +80003a18: 0004a203 lw x4,0(x9) +80003a1c: 00448493 addi x9,x9,4 + +80003a20 : +Zbkb_xnor_cg_cmp_rd_rs2_b4: + xnor x4, x13, x4 # perform operation +80003a20: 4046c233 xnor x4,x13,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_xnor_cg_cmp_rd_rs2_b4, Zbkb_xnor_cg_cmp_rd_rs2_b4_str) +80003a24: 00052383 lw x7,0(x10) +80003a28: 00438863 beq x7,x4,80003a38 +80003a2c: 32d0146f jal x8,80005558 +80003a30: 80003a20 .word 0x80003a20 +80003a34: 8000eb14 .word 0x8000eb14 +80003a38: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xf082d100 +80003a3c: 0004ab83 lw x23,0(x9) +80003a40: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0xcd86ab48 +80003a44: 0004a283 lw x5,0(x9) +80003a48: 00448493 addi x9,x9,4 + +80003a4c : +Zbkb_xnor_cg_cmp_rd_rs2_b5: + xnor x5, x23, x5 # perform operation +80003a4c: 405bc2b3 xnor x5,x23,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_xnor_cg_cmp_rd_rs2_b5, Zbkb_xnor_cg_cmp_rd_rs2_b5_str) +80003a50: 00052383 lw x7,0(x10) +80003a54: 00538863 beq x7,x5,80003a64 +80003a58: 3010146f jal x8,80005558 +80003a5c: 80003a4c .word 0x80003a4c +80003a60: 8000eb4b .word 0x8000eb4b +80003a64: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xb76bef27 +80003a68: 0004a683 lw x13,0(x9) +80003a6c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xbf625d0e +80003a70: 0004a303 lw x6,0(x9) +80003a74: 00448493 addi x9,x9,4 + +80003a78 : +Zbkb_xnor_cg_cmp_rd_rs2_b6: + xnor x6, x13, x6 # perform operation +80003a78: 4066c333 xnor x6,x13,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_xnor_cg_cmp_rd_rs2_b6, Zbkb_xnor_cg_cmp_rd_rs2_b6_str) +80003a7c: 00052383 lw x7,0(x10) +80003a80: 00638863 beq x7,x6,80003a90 +80003a84: 2d50146f jal x8,80005558 +80003a88: 80003a78 .word 0x80003a78 +80003a8c: 8000eb82 .word 0x8000eb82 +80003a90: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a94: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a98: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x9aa09efc +80003a9c: 0004a883 lw x17,0(x9) +80003aa0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xa93386be +80003aa4: 0004a383 lw x7,0(x9) +80003aa8: 00448493 addi x9,x9,4 + +80003aac : +Zbkb_xnor_cg_cmp_rd_rs2_b7: + xnor x7, x17, x7 # perform operation +80003aac: 4078c3b3 xnor x7,x17,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkb_xnor_cg_cmp_rd_rs2_b7, Zbkb_xnor_cg_cmp_rd_rs2_b7_str) +80003ab0: 00052203 lw x4,0(x10) +80003ab4: 00720863 beq x4,x7,80003ac4 +80003ab8: 289012ef jal x5,80005540 +80003abc: 80003aac .word 0x80003aac +80003ac0: 8000ebb9 .word 0x8000ebb9 +80003ac4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xc53f0523 +80003ac8: 0004a083 lw x1,0(x9) +80003acc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x21e16643 +80003ad0: 0004a403 lw x8,0(x9) +80003ad4: 00448493 addi x9,x9,4 + +80003ad8 : +Zbkb_xnor_cg_cmp_rd_rs2_b8: + xnor x8, x1, x8 # perform operation +80003ad8: 4080c433 xnor x8,x1,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkb_xnor_cg_cmp_rd_rs2_b8, Zbkb_xnor_cg_cmp_rd_rs2_b8_str) +80003adc: 00052203 lw x4,0(x10) +80003ae0: 00820863 beq x4,x8,80003af0 +80003ae4: 25d012ef jal x5,80005540 +80003ae8: 80003ad8 .word 0x80003ad8 +80003aec: 8000ebf0 .word 0x8000ebf0 +80003af0: 00450513 addi x10,x10,4 + + mv x28, x9 # switch data pointer register to avoid conflict with test +80003af4: 00048e13 addi x28,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0xab54978a +80003af8: 000e2983 lw x19,0(x28) +80003afc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xf224305b +80003b00: 000e2483 lw x9,0(x28) +80003b04: 004e0e13 addi x28,x28,4 + +80003b08 : +Zbkb_xnor_cg_cmp_rd_rs2_b9: + xnor x9, x19, x9 # perform operation +80003b08: 4099c4b3 xnor x9,x19,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zbkb_xnor_cg_cmp_rd_rs2_b9, Zbkb_xnor_cg_cmp_rd_rs2_b9_str) +80003b0c: 00052203 lw x4,0(x10) +80003b10: 00920863 beq x4,x9,80003b20 +80003b14: 22d012ef jal x5,80005540 +80003b18: 80003b08 .word 0x80003b08 +80003b1c: 8000ec27 .word 0x8000ec27 +80003b20: 00450513 addi x10,x10,4 + + mv x20, x10 # switch signature pointer register to avoid conflict with test +80003b24: 00050a13 addi x20,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x29694dce +80003b28: 000e2a83 lw x21,0(x28) +80003b2c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x888061ec +80003b30: 000e2503 lw x10,0(x28) +80003b34: 004e0e13 addi x28,x28,4 + +80003b38 : +Zbkb_xnor_cg_cmp_rd_rs2_b10: + xnor x10, x21, x10 # perform operation +80003b38: 40aac533 xnor x10,x21,x10 + # Check if x10 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x10, Zbkb_xnor_cg_cmp_rd_rs2_b10, Zbkb_xnor_cg_cmp_rd_rs2_b10_str) +80003b3c: 000a2203 lw x4,0(x20) +80003b40: 00a20863 beq x4,x10,80003b50 +80003b44: 1fd012ef jal x5,80005540 +80003b48: 80003b38 .word 0x80003b38 +80003b4c: 8000ec5e .word 0x8000ec5e +80003b50: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xf575eeec +80003b54: 000e2603 lw x12,0(x28) +80003b58: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0x85e993b1 +80003b5c: 000e2583 lw x11,0(x28) +80003b60: 004e0e13 addi x28,x28,4 + +80003b64 : +Zbkb_xnor_cg_cmp_rd_rs2_b11: + xnor x11, x12, x11 # perform operation +80003b64: 40b645b3 xnor x11,x12,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x11, Zbkb_xnor_cg_cmp_rd_rs2_b11, Zbkb_xnor_cg_cmp_rd_rs2_b11_str) +80003b68: 000a2203 lw x4,0(x20) +80003b6c: 00b20863 beq x4,x11,80003b7c +80003b70: 1d1012ef jal x5,80005540 +80003b74: 80003b64 .word 0x80003b64 +80003b78: 8000ec96 .word 0x8000ec96 +80003b7c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x4003461b +80003b80: 000e2583 lw x11,0(x28) +80003b84: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x2b23e71b +80003b88: 000e2603 lw x12,0(x28) +80003b8c: 004e0e13 addi x28,x28,4 + +80003b90 : +Zbkb_xnor_cg_cmp_rd_rs2_b12: + xnor x12, x11, x12 # perform operation +80003b90: 40c5c633 xnor x12,x11,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zbkb_xnor_cg_cmp_rd_rs2_b12, Zbkb_xnor_cg_cmp_rd_rs2_b12_str) +80003b94: 000a2203 lw x4,0(x20) +80003b98: 00c20863 beq x4,x12,80003ba8 +80003b9c: 1a5012ef jal x5,80005540 +80003ba0: 80003b90 .word 0x80003b90 +80003ba4: 8000ecce .word 0x8000ecce +80003ba8: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0x57a24f93 +80003bac: 000e2003 lw x0,0(x28) +80003bb0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0xd668bf77 +80003bb4: 000e2683 lw x13,0(x28) +80003bb8: 004e0e13 addi x28,x28,4 + +80003bbc : +Zbkb_xnor_cg_cmp_rd_rs2_b13: + xnor x13, x0, x13 # perform operation +80003bbc: 40d046b3 xnor x13,x0,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkb_xnor_cg_cmp_rd_rs2_b13, Zbkb_xnor_cg_cmp_rd_rs2_b13_str) +80003bc0: 000a2203 lw x4,0(x20) +80003bc4: 00d20863 beq x4,x13,80003bd4 +80003bc8: 179012ef jal x5,80005540 +80003bcc: 80003bbc .word 0x80003bbc +80003bd0: 8000ed06 .word 0x8000ed06 +80003bd4: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xe2fbb45f +80003bd8: 000e2d03 lw x26,0(x28) +80003bdc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x339c16f6 +80003be0: 000e2703 lw x14,0(x28) +80003be4: 004e0e13 addi x28,x28,4 + +80003be8 : +Zbkb_xnor_cg_cmp_rd_rs2_b14: + xnor x14, x26, x14 # perform operation +80003be8: 40ed4733 xnor x14,x26,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkb_xnor_cg_cmp_rd_rs2_b14, Zbkb_xnor_cg_cmp_rd_rs2_b14_str) +80003bec: 000a2203 lw x4,0(x20) +80003bf0: 00e20863 beq x4,x14,80003c00 +80003bf4: 14d012ef jal x5,80005540 +80003bf8: 80003be8 .word 0x80003be8 +80003bfc: 8000ed3e .word 0x8000ed3e +80003c00: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x2bc769f6 +80003c04: 000e2883 lw x17,0(x28) +80003c08: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0xf7d6505a +80003c0c: 000e2783 lw x15,0(x28) +80003c10: 004e0e13 addi x28,x28,4 + +80003c14 : +Zbkb_xnor_cg_cmp_rd_rs2_b15: + xnor x15, x17, x15 # perform operation +80003c14: 40f8c7b3 xnor x15,x17,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkb_xnor_cg_cmp_rd_rs2_b15, Zbkb_xnor_cg_cmp_rd_rs2_b15_str) +80003c18: 000a2203 lw x4,0(x20) +80003c1c: 00f20863 beq x4,x15,80003c2c +80003c20: 121012ef jal x5,80005540 +80003c24: 80003c14 .word 0x80003c14 +80003c28: 8000ed76 .word 0x8000ed76 +80003c2c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xf4c8009a +80003c30: 000e2603 lw x12,0(x28) +80003c34: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xe07ac1ce +80003c38: 000e2803 lw x16,0(x28) +80003c3c: 004e0e13 addi x28,x28,4 + +80003c40 : +Zbkb_xnor_cg_cmp_rd_rs2_b16: + xnor x16, x12, x16 # perform operation +80003c40: 41064833 xnor x16,x12,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkb_xnor_cg_cmp_rd_rs2_b16, Zbkb_xnor_cg_cmp_rd_rs2_b16_str) +80003c44: 000a2203 lw x4,0(x20) +80003c48: 01020863 beq x4,x16,80003c58 +80003c4c: 0f5012ef jal x5,80005540 +80003c50: 80003c40 .word 0x80003c40 +80003c54: 8000edae .word 0x8000edae +80003c58: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0xce3fc4ba +80003c5c: 000e2e83 lw x29,0(x28) +80003c60: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0xa29c5725 +80003c64: 000e2883 lw x17,0(x28) +80003c68: 004e0e13 addi x28,x28,4 + +80003c6c : +Zbkb_xnor_cg_cmp_rd_rs2_b17: + xnor x17, x29, x17 # perform operation +80003c6c: 411ec8b3 xnor x17,x29,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkb_xnor_cg_cmp_rd_rs2_b17, Zbkb_xnor_cg_cmp_rd_rs2_b17_str) +80003c70: 000a2203 lw x4,0(x20) +80003c74: 01120863 beq x4,x17,80003c84 +80003c78: 0c9012ef jal x5,80005540 +80003c7c: 80003c6c .word 0x80003c6c +80003c80: 8000ede6 .word 0x8000ede6 +80003c84: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x06181f5a +80003c88: 000e2983 lw x19,0(x28) +80003c8c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x813f550a +80003c90: 000e2903 lw x18,0(x28) +80003c94: 004e0e13 addi x28,x28,4 + +80003c98 : +Zbkb_xnor_cg_cmp_rd_rs2_b18: + xnor x18, x19, x18 # perform operation +80003c98: 4129c933 xnor x18,x19,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkb_xnor_cg_cmp_rd_rs2_b18, Zbkb_xnor_cg_cmp_rd_rs2_b18_str) +80003c9c: 000a2203 lw x4,0(x20) +80003ca0: 01220863 beq x4,x18,80003cb0 +80003ca4: 09d012ef jal x5,80005540 +80003ca8: 80003c98 .word 0x80003c98 +80003cac: 8000ee1e .word 0x8000ee1e +80003cb0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xaf797915 +80003cb4: 000e2783 lw x15,0(x28) +80003cb8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xc43f720e +80003cbc: 000e2983 lw x19,0(x28) +80003cc0: 004e0e13 addi x28,x28,4 + +80003cc4 : +Zbkb_xnor_cg_cmp_rd_rs2_b19: + xnor x19, x15, x19 # perform operation +80003cc4: 4137c9b3 xnor x19,x15,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zbkb_xnor_cg_cmp_rd_rs2_b19, Zbkb_xnor_cg_cmp_rd_rs2_b19_str) +80003cc8: 000a2203 lw x4,0(x20) +80003ccc: 01320863 beq x4,x19,80003cdc +80003cd0: 071012ef jal x5,80005540 +80003cd4: 80003cc4 .word 0x80003cc4 +80003cd8: 8000ee56 .word 0x8000ee56 +80003cdc: 004a0a13 addi x20,x20,4 + + mv x22, x20 # switch signature pointer register to avoid conflict with test +80003ce0: 000a0b13 addi x22,x20,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x86ab8f38 +80003ce4: 000e2e83 lw x29,0(x28) +80003ce8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xad0a7a55 +80003cec: 000e2a03 lw x20,0(x28) +80003cf0: 004e0e13 addi x28,x28,4 + +80003cf4 : +Zbkb_xnor_cg_cmp_rd_rs2_b20: + xnor x20, x29, x20 # perform operation +80003cf4: 414eca33 xnor x20,x29,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkb_xnor_cg_cmp_rd_rs2_b20, Zbkb_xnor_cg_cmp_rd_rs2_b20_str) +80003cf8: 000b2203 lw x4,0(x22) +80003cfc: 01420863 beq x4,x20,80003d0c +80003d00: 041012ef jal x5,80005540 +80003d04: 80003cf4 .word 0x80003cf4 +80003d08: 8000ee8e .word 0x8000ee8e +80003d0c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xe5f71e58 +80003d10: 000e2583 lw x11,0(x28) +80003d14: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0xa1a38f9b +80003d18: 000e2a83 lw x21,0(x28) +80003d1c: 004e0e13 addi x28,x28,4 + +80003d20 : +Zbkb_xnor_cg_cmp_rd_rs2_b21: + xnor x21, x11, x21 # perform operation +80003d20: 4155cab3 xnor x21,x11,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkb_xnor_cg_cmp_rd_rs2_b21, Zbkb_xnor_cg_cmp_rd_rs2_b21_str) +80003d24: 000b2203 lw x4,0(x22) +80003d28: 01520863 beq x4,x21,80003d38 +80003d2c: 015012ef jal x5,80005540 +80003d30: 80003d20 .word 0x80003d20 +80003d34: 8000eec6 .word 0x8000eec6 +80003d38: 004b0b13 addi x22,x22,4 + + mv x30, x22 # switch signature pointer register to avoid conflict with test +80003d3c: 000b0f13 addi x30,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x0eae0c24 +80003d40: 000e2483 lw x9,0(x28) +80003d44: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xcb3ee234 +80003d48: 000e2b03 lw x22,0(x28) +80003d4c: 004e0e13 addi x28,x28,4 + +80003d50 : +Zbkb_xnor_cg_cmp_rd_rs2_b22: + xnor x22, x9, x22 # perform operation +80003d50: 4164cb33 xnor x22,x9,x22 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zbkb_xnor_cg_cmp_rd_rs2_b22, Zbkb_xnor_cg_cmp_rd_rs2_b22_str) +80003d54: 000f2203 lw x4,0(x30) +80003d58: 01620863 beq x4,x22,80003d68 +80003d5c: 7e4012ef jal x5,80005540 +80003d60: 80003d50 .word 0x80003d50 +80003d64: 8000eefe .word 0x8000eefe +80003d68: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xc8dd81fc +80003d6c: 000e2a03 lw x20,0(x28) +80003d70: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xf89b03ac +80003d74: 000e2b83 lw x23,0(x28) +80003d78: 004e0e13 addi x28,x28,4 + +80003d7c : +Zbkb_xnor_cg_cmp_rd_rs2_b23: + xnor x23, x20, x23 # perform operation +80003d7c: 417a4bb3 xnor x23,x20,x23 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zbkb_xnor_cg_cmp_rd_rs2_b23, Zbkb_xnor_cg_cmp_rd_rs2_b23_str) +80003d80: 000f2203 lw x4,0(x30) +80003d84: 01720863 beq x4,x23,80003d94 +80003d88: 7b8012ef jal x5,80005540 +80003d8c: 80003d7c .word 0x80003d7c +80003d90: 8000ef36 .word 0x8000ef36 +80003d94: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x2a6dee14 +80003d98: 000e2c83 lw x25,0(x28) +80003d9c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xe872687e +80003da0: 000e2c03 lw x24,0(x28) +80003da4: 004e0e13 addi x28,x28,4 + +80003da8 : +Zbkb_xnor_cg_cmp_rd_rs2_b24: + xnor x24, x25, x24 # perform operation +80003da8: 418ccc33 xnor x24,x25,x24 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkb_xnor_cg_cmp_rd_rs2_b24, Zbkb_xnor_cg_cmp_rd_rs2_b24_str) +80003dac: 000f2203 lw x4,0(x30) +80003db0: 01820863 beq x4,x24,80003dc0 +80003db4: 78c012ef jal x5,80005540 +80003db8: 80003da8 .word 0x80003da8 +80003dbc: 8000ef6e .word 0x8000ef6e +80003dc0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x5ed412db +80003dc4: 000e2c03 lw x24,0(x28) +80003dc8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xdb0dd8a8 +80003dcc: 000e2c83 lw x25,0(x28) +80003dd0: 004e0e13 addi x28,x28,4 + +80003dd4 : +Zbkb_xnor_cg_cmp_rd_rs2_b25: + xnor x25, x24, x25 # perform operation +80003dd4: 419c4cb3 xnor x25,x24,x25 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zbkb_xnor_cg_cmp_rd_rs2_b25, Zbkb_xnor_cg_cmp_rd_rs2_b25_str) +80003dd8: 000f2203 lw x4,0(x30) +80003ddc: 01920863 beq x4,x25,80003dec +80003de0: 760012ef jal x5,80005540 +80003de4: 80003dd4 .word 0x80003dd4 +80003de8: 8000efa6 .word 0x8000efa6 +80003dec: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xbb8d27eb +80003df0: 000e2c83 lw x25,0(x28) +80003df4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x47639b45 +80003df8: 000e2d03 lw x26,0(x28) +80003dfc: 004e0e13 addi x28,x28,4 + +80003e00 : +Zbkb_xnor_cg_cmp_rd_rs2_b26: + xnor x26, x25, x26 # perform operation +80003e00: 41accd33 xnor x26,x25,x26 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zbkb_xnor_cg_cmp_rd_rs2_b26, Zbkb_xnor_cg_cmp_rd_rs2_b26_str) +80003e04: 000f2203 lw x4,0(x30) +80003e08: 01a20863 beq x4,x26,80003e18 +80003e0c: 734012ef jal x5,80005540 +80003e10: 80003e00 .word 0x80003e00 +80003e14: 8000efde .word 0x8000efde +80003e18: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x27a13cac +80003e1c: 000e2883 lw x17,0(x28) +80003e20: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x52477910 +80003e24: 000e2d83 lw x27,0(x28) +80003e28: 004e0e13 addi x28,x28,4 + +80003e2c : +Zbkb_xnor_cg_cmp_rd_rs2_b27: + xnor x27, x17, x27 # perform operation +80003e2c: 41b8cdb3 xnor x27,x17,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zbkb_xnor_cg_cmp_rd_rs2_b27, Zbkb_xnor_cg_cmp_rd_rs2_b27_str) +80003e30: 000f2203 lw x4,0(x30) +80003e34: 01b20863 beq x4,x27,80003e44 +80003e38: 708012ef jal x5,80005540 +80003e3c: 80003e2c .word 0x80003e2c +80003e40: 8000f016 .word 0x8000f016 +80003e44: 004f0f13 addi x30,x30,4 + + mv x17, x28 # switch data pointer register to avoid conflict with test +80003e48: 000e0893 addi x17,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x4ec8b73e +80003e4c: 0008a503 lw x10,0(x17) +80003e50: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7b528118 +80003e54: 0008ae03 lw x28,0(x17) +80003e58: 00488893 addi x17,x17,4 + +80003e5c : +Zbkb_xnor_cg_cmp_rd_rs2_b28: + xnor x28, x10, x28 # perform operation +80003e5c: 41c54e33 xnor x28,x10,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zbkb_xnor_cg_cmp_rd_rs2_b28, Zbkb_xnor_cg_cmp_rd_rs2_b28_str) +80003e60: 000f2203 lw x4,0(x30) +80003e64: 01c20863 beq x4,x28,80003e74 +80003e68: 6d8012ef jal x5,80005540 +80003e6c: 80003e5c .word 0x80003e5c +80003e70: 8000f04e .word 0x8000f04e +80003e74: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x49011fa8 +80003e78: 0008ac83 lw x25,0(x17) +80003e7c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x056c3d78 +80003e80: 0008ae83 lw x29,0(x17) +80003e84: 00488893 addi x17,x17,4 + +80003e88 : +Zbkb_xnor_cg_cmp_rd_rs2_b29: + xnor x29, x25, x29 # perform operation +80003e88: 41dcceb3 xnor x29,x25,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zbkb_xnor_cg_cmp_rd_rs2_b29, Zbkb_xnor_cg_cmp_rd_rs2_b29_str) +80003e8c: 000f2203 lw x4,0(x30) +80003e90: 01d20863 beq x4,x29,80003ea0 +80003e94: 6ac012ef jal x5,80005540 +80003e98: 80003e88 .word 0x80003e88 +80003e9c: 8000f086 .word 0x8000f086 +80003ea0: 004f0f13 addi x30,x30,4 + + mv x11, x30 # switch signature pointer register to avoid conflict with test +80003ea4: 000f0593 addi x11,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xbd3fb9a9 +80003ea8: 0008a103 lw x2,0(x17) +80003eac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x29da4841 +80003eb0: 0008af03 lw x30,0(x17) +80003eb4: 00488893 addi x17,x17,4 + +80003eb8 : +Zbkb_xnor_cg_cmp_rd_rs2_b30: + xnor x30, x2, x30 # perform operation +80003eb8: 41e14f33 xnor x30,x2,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cmp_rd_rs2_b30, Zbkb_xnor_cg_cmp_rd_rs2_b30_str) +80003ebc: 0005a203 lw x4,0(x11) +80003ec0: 01e20863 beq x4,x30,80003ed0 +80003ec4: 67c012ef jal x5,80005540 +80003ec8: 80003eb8 .word 0x80003eb8 +80003ecc: 8000f0be .word 0x8000f0be +80003ed0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x9653a507 +80003ed4: 0008aa83 lw x21,0(x17) +80003ed8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x617450e1 +80003edc: 0008af83 lw x31,0(x17) +80003ee0: 00488893 addi x17,x17,4 + +80003ee4 : +Zbkb_xnor_cg_cmp_rd_rs2_b31: + xnor x31, x21, x31 # perform operation +80003ee4: 41facfb3 xnor x31,x21,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cmp_rd_rs2_b31, Zbkb_xnor_cg_cmp_rd_rs2_b31_str) +80003ee8: 0005a203 lw x4,0(x11) +80003eec: 01f20863 beq x4,x31,80003efc +80003ef0: 650012ef jal x5,80005540 +80003ef4: 80003ee4 .word 0x80003ee4 +80003ef8: 8000f0f6 .word 0x8000f0f6 +80003efc: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x4c5e2135 +80003f00: 0008a003 lw x0,0(x17) +80003f04: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0xfcfccb71 +80003f08: 0008a003 lw x0,0(x17) +80003f0c: 00488893 addi x17,x17,4 + +80003f10 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0: + xnor x0, x0, x0 # perform operation +80003f10: 40004033 xnor x0,x0,x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0_str) +80003f14: 0005a203 lw x4,0(x11) +80003f18: 00020863 beq x4,x0,80003f28 +80003f1c: 624012ef jal x5,80005540 +80003f20: 80003f10 .word 0x80003f10 +80003f24: 8000f12e .word 0x8000f12e +80003f28: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x28526e0a +80003f2c: 0008a083 lw x1,0(x17) +80003f30: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xbcd86cba +80003f34: 0008a083 lw x1,0(x17) +80003f38: 00488893 addi x17,x17,4 + +80003f3c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1: + xnor x1, x1, x1 # perform operation +80003f3c: 4010c0b3 xnor x1,x1,x1 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1_str) +80003f40: 0005a203 lw x4,0(x11) +80003f44: 00120863 beq x4,x1,80003f54 +80003f48: 5f8012ef jal x5,80005540 +80003f4c: 80003f3c .word 0x80003f3c +80003f50: 8000f169 .word 0x8000f169 +80003f54: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x5aea0922 +80003f58: 0008a103 lw x2,0(x17) +80003f5c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xb93e6a2a +80003f60: 0008a103 lw x2,0(x17) +80003f64: 00488893 addi x17,x17,4 + +80003f68 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2: + xnor x2, x2, x2 # perform operation +80003f68: 40214133 xnor x2,x2,x2 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2_str) +80003f6c: 0005a203 lw x4,0(x11) +80003f70: 00220863 beq x4,x2,80003f80 +80003f74: 5cc012ef jal x5,80005540 +80003f78: 80003f68 .word 0x80003f68 +80003f7c: 8000f1a4 .word 0x8000f1a4 +80003f80: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xeb29ab97 +80003f84: 0008a183 lw x3,0(x17) +80003f88: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xb31fb4a2 +80003f8c: 0008a183 lw x3,0(x17) +80003f90: 00488893 addi x17,x17,4 + +80003f94 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3: + xnor x3, x3, x3 # perform operation +80003f94: 4031c1b3 xnor x3,x3,x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3_str) +80003f98: 0005a203 lw x4,0(x11) +80003f9c: 00320863 beq x4,x3,80003fac +80003fa0: 5a0012ef jal x5,80005540 +80003fa4: 80003f94 .word 0x80003f94 +80003fa8: 8000f1df .word 0x8000f1df +80003fac: 00458593 addi x11,x11,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003fb0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003fb4: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x6a538b0f +80003fb8: 0008a203 lw x4,0(x17) +80003fbc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x4a3f79c9 +80003fc0: 0008a203 lw x4,0(x17) +80003fc4: 00488893 addi x17,x17,4 + +80003fc8 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4: + xnor x4, x4, x4 # perform operation +80003fc8: 40424233 xnor x4,x4,x4 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4_str) +80003fcc: 0005a683 lw x13,0(x11) +80003fd0: 00468863 beq x13,x4,80003fe0 +80003fd4: 5ac0176f jal x14,80005580 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 8000f21a .word 0x8000f21a +80003fe0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x2d1f6f67 +80003fe4: 0008a283 lw x5,0(x17) +80003fe8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x7e4b5874 +80003fec: 0008a283 lw x5,0(x17) +80003ff0: 00488893 addi x17,x17,4 + +80003ff4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5: + xnor x5, x5, x5 # perform operation +80003ff4: 4052c2b3 xnor x5,x5,x5 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5_str) +80003ff8: 0005a683 lw x13,0(x11) +80003ffc: 00568863 beq x13,x5,8000400c +80004000: 5800176f jal x14,80005580 +80004004: 80003ff4 .word 0x80003ff4 +80004008: 8000f255 .word 0x8000f255 +8000400c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xab7fb23d +80004010: 0008a303 lw x6,0(x17) +80004014: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x1338a460 +80004018: 0008a303 lw x6,0(x17) +8000401c: 00488893 addi x17,x17,4 + +80004020 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6: + xnor x6, x6, x6 # perform operation +80004020: 40634333 xnor x6,x6,x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x6, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6_str) +80004024: 0005a683 lw x13,0(x11) +80004028: 00668863 beq x13,x6,80004038 +8000402c: 5540176f jal x14,80005580 +80004030: 80004020 .word 0x80004020 +80004034: 8000f290 .word 0x8000f290 +80004038: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xfede5ae2 +8000403c: 0008a383 lw x7,0(x17) +80004040: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x7c55a990 +80004044: 0008a383 lw x7,0(x17) +80004048: 00488893 addi x17,x17,4 + +8000404c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7: + xnor x7, x7, x7 # perform operation +8000404c: 4073c3b3 xnor x7,x7,x7 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7_str) +80004050: 0005a683 lw x13,0(x11) +80004054: 00768863 beq x13,x7,80004064 +80004058: 5280176f jal x14,80005580 +8000405c: 8000404c .word 0x8000404c +80004060: 8000f2cb .word 0x8000f2cb +80004064: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x3ba69f80 +80004068: 0008a403 lw x8,0(x17) +8000406c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x42db9cdc +80004070: 0008a403 lw x8,0(x17) +80004074: 00488893 addi x17,x17,4 + +80004078 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8: + xnor x8, x8, x8 # perform operation +80004078: 40844433 xnor x8,x8,x8 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8_str) +8000407c: 0005a683 lw x13,0(x11) +80004080: 00868863 beq x13,x8,80004090 +80004084: 4fc0176f jal x14,80005580 +80004088: 80004078 .word 0x80004078 +8000408c: 8000f306 .word 0x8000f306 +80004090: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x6dac4fdd +80004094: 0008a483 lw x9,0(x17) +80004098: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xf8648bfd +8000409c: 0008a483 lw x9,0(x17) +800040a0: 00488893 addi x17,x17,4 + +800040a4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9: + xnor x9, x9, x9 # perform operation +800040a4: 4094c4b3 xnor x9,x9,x9 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9_str) +800040a8: 0005a683 lw x13,0(x11) +800040ac: 00968863 beq x13,x9,800040bc +800040b0: 4d00176f jal x14,80005580 +800040b4: 800040a4 .word 0x800040a4 +800040b8: 8000f341 .word 0x8000f341 +800040bc: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x060f20f9 +800040c0: 0008a503 lw x10,0(x17) +800040c4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x61fbe28d +800040c8: 0008a503 lw x10,0(x17) +800040cc: 00488893 addi x17,x17,4 + +800040d0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10: + xnor x10, x10, x10 # perform operation +800040d0: 40a54533 xnor x10,x10,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10_str) +800040d4: 0005a683 lw x13,0(x11) +800040d8: 00a68863 beq x13,x10,800040e8 +800040dc: 4a40176f jal x14,80005580 +800040e0: 800040d0 .word 0x800040d0 +800040e4: 8000f37c .word 0x8000f37c +800040e8: 00458593 addi x11,x11,4 + + mv x2, x11 # switch signature pointer register to avoid conflict with test +800040ec: 00058113 addi x2,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x1ace8261 +800040f0: 0008a583 lw x11,0(x17) +800040f4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x92f0bc31 +800040f8: 0008a583 lw x11,0(x17) +800040fc: 00488893 addi x17,x17,4 + +80004100 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11: + xnor x11, x11, x11 # perform operation +80004100: 40b5c5b3 xnor x11,x11,x11 + # Check if x11 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x11, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11_str) +80004104: 00012683 lw x13,0(x2) +80004108: 00b68863 beq x13,x11,80004118 +8000410c: 4740176f jal x14,80005580 +80004110: 80004100 .word 0x80004100 +80004114: 8000f3b8 .word 0x8000f3b8 +80004118: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x89a18a39 +8000411c: 0008a603 lw x12,0(x17) +80004120: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x53c4f93c +80004124: 0008a603 lw x12,0(x17) +80004128: 00488893 addi x17,x17,4 + +8000412c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12: + xnor x12, x12, x12 # perform operation +8000412c: 40c64633 xnor x12,x12,x12 + # Check if x12 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x12, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12_str) +80004130: 00012683 lw x13,0(x2) +80004134: 00c68863 beq x13,x12,80004144 +80004138: 4480176f jal x14,80005580 +8000413c: 8000412c .word 0x8000412c +80004140: 8000f3f4 .word 0x8000f3f4 +80004144: 00410113 addi x2,x2,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80004148: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000414c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x1a8d047b +80004150: 0008a683 lw x13,0(x17) +80004154: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x9c410d14 +80004158: 0008a683 lw x13,0(x17) +8000415c: 00488893 addi x17,x17,4 + +80004160 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13: + xnor x13, x13, x13 # perform operation +80004160: 40d6c6b3 xnor x13,x13,x13 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13_str) +80004164: 00012383 lw x7,0(x2) +80004168: 00d38863 beq x7,x13,80004178 +8000416c: 3ec0146f jal x8,80005558 +80004170: 80004160 .word 0x80004160 +80004174: 8000f430 .word 0x8000f430 +80004178: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xd349b7c0 +8000417c: 0008a703 lw x14,0(x17) +80004180: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x87d281be +80004184: 0008a703 lw x14,0(x17) +80004188: 00488893 addi x17,x17,4 + +8000418c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14: + xnor x14, x14, x14 # perform operation +8000418c: 40e74733 xnor x14,x14,x14 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14_str) +80004190: 00012383 lw x7,0(x2) +80004194: 00e38863 beq x7,x14,800041a4 +80004198: 3c00146f jal x8,80005558 +8000419c: 8000418c .word 0x8000418c +800041a0: 8000f46c .word 0x8000f46c +800041a4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x52354891 +800041a8: 0008a783 lw x15,0(x17) +800041ac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x2c0e22fc +800041b0: 0008a783 lw x15,0(x17) +800041b4: 00488893 addi x17,x17,4 + +800041b8 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15: + xnor x15, x15, x15 # perform operation +800041b8: 40f7c7b3 xnor x15,x15,x15 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15_str) +800041bc: 00012383 lw x7,0(x2) +800041c0: 00f38863 beq x7,x15,800041d0 +800041c4: 3940146f jal x8,80005558 +800041c8: 800041b8 .word 0x800041b8 +800041cc: 8000f4a8 .word 0x8000f4a8 +800041d0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x49e4f9a0 +800041d4: 0008a803 lw x16,0(x17) +800041d8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x37f58049 +800041dc: 0008a803 lw x16,0(x17) +800041e0: 00488893 addi x17,x17,4 + +800041e4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16: + xnor x16, x16, x16 # perform operation +800041e4: 41084833 xnor x16,x16,x16 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16_str) +800041e8: 00012383 lw x7,0(x2) +800041ec: 01038863 beq x7,x16,800041fc +800041f0: 3680146f jal x8,80005558 +800041f4: 800041e4 .word 0x800041e4 +800041f8: 8000f4e4 .word 0x8000f4e4 +800041fc: 00410113 addi x2,x2,4 + + mv x28, x17 # switch data pointer register to avoid conflict with test +80004200: 00088e13 addi x28,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x386e7f73 +80004204: 000e2883 lw x17,0(x28) +80004208: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x3747be95 +8000420c: 000e2883 lw x17,0(x28) +80004210: 004e0e13 addi x28,x28,4 + +80004214 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17: + xnor x17, x17, x17 # perform operation +80004214: 4118c8b3 xnor x17,x17,x17 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17_str) +80004218: 00012383 lw x7,0(x2) +8000421c: 01138863 beq x7,x17,8000422c +80004220: 3380146f jal x8,80005558 +80004224: 80004214 .word 0x80004214 +80004228: 8000f520 .word 0x8000f520 +8000422c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x7a5e1c65 +80004230: 000e2903 lw x18,0(x28) +80004234: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x06c97edd +80004238: 000e2903 lw x18,0(x28) +8000423c: 004e0e13 addi x28,x28,4 + +80004240 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18: + xnor x18, x18, x18 # perform operation +80004240: 41294933 xnor x18,x18,x18 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18_str) +80004244: 00012383 lw x7,0(x2) +80004248: 01238863 beq x7,x18,80004258 +8000424c: 30c0146f jal x8,80005558 +80004250: 80004240 .word 0x80004240 +80004254: 8000f55c .word 0x8000f55c +80004258: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x7967a25a +8000425c: 000e2983 lw x19,0(x28) +80004260: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xc5cf4f67 +80004264: 000e2983 lw x19,0(x28) +80004268: 004e0e13 addi x28,x28,4 + +8000426c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19: + xnor x19, x19, x19 # perform operation +8000426c: 4139c9b3 xnor x19,x19,x19 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19_str) +80004270: 00012383 lw x7,0(x2) +80004274: 01338863 beq x7,x19,80004284 +80004278: 2e00146f jal x8,80005558 +8000427c: 8000426c .word 0x8000426c +80004280: 8000f598 .word 0x8000f598 +80004284: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x5f07483d +80004288: 000e2a03 lw x20,0(x28) +8000428c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x95a49690 +80004290: 000e2a03 lw x20,0(x28) +80004294: 004e0e13 addi x28,x28,4 + +80004298 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20: + xnor x20, x20, x20 # perform operation +80004298: 414a4a33 xnor x20,x20,x20 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20_str) +8000429c: 00012383 lw x7,0(x2) +800042a0: 01438863 beq x7,x20,800042b0 +800042a4: 2b40146f jal x8,80005558 +800042a8: 80004298 .word 0x80004298 +800042ac: 8000f5d4 .word 0x8000f5d4 +800042b0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x819475da +800042b4: 000e2a83 lw x21,0(x28) +800042b8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x022b6824 +800042bc: 000e2a83 lw x21,0(x28) +800042c0: 004e0e13 addi x28,x28,4 + +800042c4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21: + xnor x21, x21, x21 # perform operation +800042c4: 415acab3 xnor x21,x21,x21 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21_str) +800042c8: 00012383 lw x7,0(x2) +800042cc: 01538863 beq x7,x21,800042dc +800042d0: 2880146f jal x8,80005558 +800042d4: 800042c4 .word 0x800042c4 +800042d8: 8000f610 .word 0x8000f610 +800042dc: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xc22df999 +800042e0: 000e2b03 lw x22,0(x28) +800042e4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xa08f567e +800042e8: 000e2b03 lw x22,0(x28) +800042ec: 004e0e13 addi x28,x28,4 + +800042f0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22: + xnor x22, x22, x22 # perform operation +800042f0: 416b4b33 xnor x22,x22,x22 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22_str) +800042f4: 00012383 lw x7,0(x2) +800042f8: 01638863 beq x7,x22,80004308 +800042fc: 25c0146f jal x8,80005558 +80004300: 800042f0 .word 0x800042f0 +80004304: 8000f64c .word 0x8000f64c +80004308: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x6d5c1581 +8000430c: 000e2b83 lw x23,0(x28) +80004310: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x5d022ea8 +80004314: 000e2b83 lw x23,0(x28) +80004318: 004e0e13 addi x28,x28,4 + +8000431c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23: + xnor x23, x23, x23 # perform operation +8000431c: 417bcbb3 xnor x23,x23,x23 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23_str) +80004320: 00012383 lw x7,0(x2) +80004324: 01738863 beq x7,x23,80004334 +80004328: 2300146f jal x8,80005558 +8000432c: 8000431c .word 0x8000431c +80004330: 8000f688 .word 0x8000f688 +80004334: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xef2a8f7f +80004338: 000e2c03 lw x24,0(x28) +8000433c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xc15ad51b +80004340: 000e2c03 lw x24,0(x28) +80004344: 004e0e13 addi x28,x28,4 + +80004348 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24: + xnor x24, x24, x24 # perform operation +80004348: 418c4c33 xnor x24,x24,x24 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24_str) +8000434c: 00012383 lw x7,0(x2) +80004350: 01838863 beq x7,x24,80004360 +80004354: 2040146f jal x8,80005558 +80004358: 80004348 .word 0x80004348 +8000435c: 8000f6c4 .word 0x8000f6c4 +80004360: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x794c210f +80004364: 000e2c83 lw x25,0(x28) +80004368: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xd8cab290 +8000436c: 000e2c83 lw x25,0(x28) +80004370: 004e0e13 addi x28,x28,4 + +80004374 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25: + xnor x25, x25, x25 # perform operation +80004374: 419cccb3 xnor x25,x25,x25 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25_str) +80004378: 00012383 lw x7,0(x2) +8000437c: 01938863 beq x7,x25,8000438c +80004380: 1d80146f jal x8,80005558 +80004384: 80004374 .word 0x80004374 +80004388: 8000f700 .word 0x8000f700 +8000438c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x0d206069 +80004390: 000e2d03 lw x26,0(x28) +80004394: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x693a2300 +80004398: 000e2d03 lw x26,0(x28) +8000439c: 004e0e13 addi x28,x28,4 + +800043a0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26: + xnor x26, x26, x26 # perform operation +800043a0: 41ad4d33 xnor x26,x26,x26 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26_str) +800043a4: 00012383 lw x7,0(x2) +800043a8: 01a38863 beq x7,x26,800043b8 +800043ac: 1ac0146f jal x8,80005558 +800043b0: 800043a0 .word 0x800043a0 +800043b4: 8000f73c .word 0x8000f73c +800043b8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0xef154da3 +800043bc: 000e2d83 lw x27,0(x28) +800043c0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x9ebc8cfa +800043c4: 000e2d83 lw x27,0(x28) +800043c8: 004e0e13 addi x28,x28,4 + +800043cc : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27: + xnor x27, x27, x27 # perform operation +800043cc: 41bdcdb3 xnor x27,x27,x27 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27_str) +800043d0: 00012383 lw x7,0(x2) +800043d4: 01b38863 beq x7,x27,800043e4 +800043d8: 1800146f jal x8,80005558 +800043dc: 800043cc .word 0x800043cc +800043e0: 8000f778 .word 0x8000f778 +800043e4: 00410113 addi x2,x2,4 + + mv x19, x28 # switch data pointer register to avoid conflict with test +800043e8: 000e0993 addi x19,x28,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x857d2eee +800043ec: 0009ae03 lw x28,0(x19) +800043f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x9f821981 +800043f4: 0009ae03 lw x28,0(x19) +800043f8: 00498993 addi x19,x19,4 + +800043fc : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28: + xnor x28, x28, x28 # perform operation +800043fc: 41ce4e33 xnor x28,x28,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28_str) +80004400: 00012383 lw x7,0(x2) +80004404: 01c38863 beq x7,x28,80004414 +80004408: 1500146f jal x8,80005558 +8000440c: 800043fc .word 0x800043fc +80004410: 8000f7b4 .word 0x8000f7b4 +80004414: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xbd3c1bf6 +80004418: 0009ae83 lw x29,0(x19) +8000441c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0xd2cbfd19 +80004420: 0009ae83 lw x29,0(x19) +80004424: 00498993 addi x19,x19,4 + +80004428 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29: + xnor x29, x29, x29 # perform operation +80004428: 41deceb3 xnor x29,x29,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29_str) +8000442c: 00012383 lw x7,0(x2) +80004430: 01d38863 beq x7,x29,80004440 +80004434: 1240146f jal x8,80005558 +80004438: 80004428 .word 0x80004428 +8000443c: 8000f7f0 .word 0x8000f7f0 +80004440: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x567138e4 +80004444: 0009af03 lw x30,0(x19) +80004448: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xb3dd89eb +8000444c: 0009af03 lw x30,0(x19) +80004450: 00498993 addi x19,x19,4 + +80004454 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30: + xnor x30, x30, x30 # perform operation +80004454: 41ef4f33 xnor x30,x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30_str) +80004458: 00012383 lw x7,0(x2) +8000445c: 01e38863 beq x7,x30,8000446c +80004460: 0f80146f jal x8,80005558 +80004464: 80004454 .word 0x80004454 +80004468: 8000f82c .word 0x8000f82c +8000446c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x31ab9384 +80004470: 0009af83 lw x31,0(x19) +80004474: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0xa36b1b88 +80004478: 0009af83 lw x31,0(x19) +8000447c: 00498993 addi x19,x19,4 + +80004480 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31: + xnor x31, x31, x31 # perform operation +80004480: 41ffcfb3 xnor x31,x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31_str) +80004484: 00012383 lw x7,0(x2) +80004488: 01f38863 beq x7,x31,80004498 +8000448c: 0cc0146f jal x8,80005558 +80004490: 80004480 .word 0x80004480 +80004494: 8000f868 .word 0x8000f868 +80004498: 00410113 addi x2,x2,4 + +8000449c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000449c: 00000513 addi x10,x0,0 +800044a0: 00000073 ecall +800044a4: fff00513 addi x10,x0,-1 +800044a8: 1d800413 addi x8,x0,472 + +800044ac : +800044ac: 34002373 csrrs x6,mscratch,x0 + +800044b0 : +800044b0: 23832383 lw x7,568(x6) +800044b4: 23c32483 lw x9,572(x6) + +800044b8 : +800044b8: 22032383 lw x7,544(x6) + +800044bc : +800044bc: 25032483 lw x9,592(x6) +800044c0: 34049073 csrrw x0,mscratch,x9 + +800044c4 : +800044c4: 24832483 lw x9,584(x6) +800044c8: 305493f3 csrrw x7,mtvec,x9 +800044cc: ffc4f493 andi x9,x9,-4 +800044d0: ffc3f393 andi x7,x7,-4 +800044d4: 00749e63 bne x9,x7,800044f0 + +800044d8 : +800044d8: 00030493 addi x9,x6,0 + +800044dc : +800044dc: 0004a783 lw x15,0(x9) +800044e0: 00f3a023 sw x15,0(x7) +800044e4: 00438393 addi x7,x7,4 +800044e8: 00448493 addi x9,x9,4 +800044ec: fe83c8e3 blt x7,x8,800044dc +800044f0: 0000100f fence.i + +800044f4 : +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 00000497 auipc x9,0x0 +80004504: 29048493 addi x9,x9,656 # 80004790 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 10e49863 bne x9,x14,80004630 +80004524: 00000013 addi x0,x0,0 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000c517 auipc x10,0xc +80004544: 9ee50513 addi x10,x10,-1554 # 8000ff2e +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001d097 auipc x1,0x1d +80004564: 004080e7 jalr x1,4(x1) # 80021564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000c517 auipc x10,0xc +80004584: 9e750513 addi x10,x10,-1561 # 8000ff67 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001d097 auipc x1,0x1d +800045a4: fc4080e7 jalr x1,-60(x1) # 80021564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000c517 auipc x10,0xc +800045c4: a0750513 addi x10,x10,-1529 # 8000ffc7 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001d097 auipc x1,0x1d +800045e4: f84080e7 jalr x1,-124(x1) # 80021564 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0000c517 auipc x10,0xc +80004604: 57250513 addi x10,x10,1394 # 80010b72 +80004608: 00000013 addi x0,x0,0 +8000460c: 00000013 addi x0,x0,0 +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 0001d097 auipc x1,0x1d +80004624: f44080e7 jalr x1,-188(x1) # 80021564 +80004628: 0001d097 auipc x1,0x1d +8000462c: f9c080e7 jalr x1,-100(x1) # 800215c4 + +80004630 : +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00004317 auipc x6,0x4 +80004644: ce830313 addi x6,x6,-792 # 80008328 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 00032303 lw x6,0(x6) +80004664: 00000013 addi x0,x0,0 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 0000d397 auipc x7,0xd +80004684: 5c838393 addi x7,x7,1480 # 80011c48 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 40730333 sub x6,x6,x7 +800046a4: 00000013 addi x0,x0,0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 0000d417 auipc x8,0xd +800046c4: 58040413 addi x8,x8,1408 # 80011c40 +800046c8: 00000013 addi x0,x0,0 +800046cc: 00000013 addi x0,x0,0 +800046d0: 00000013 addi x0,x0,0 +800046d4: 00000013 addi x0,x0,0 +800046d8: 00000013 addi x0,x0,0 +800046dc: 00000013 addi x0,x0,0 +800046e0: 00042203 lw x4,0(x8) +800046e4: 00620863 beq x4,x6,800046f4 +800046e8: 6c1003ef jal x7,800055a8 +800046ec: 80004630 .word 0x80004630 +800046f0: 8001011b .word 0x8001011b + +800046f4 : +800046f4: bad0e4b7 lui x9,0xbad0e +800046f8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046fc: 00e49a63 bne x9,x14,80004710 +80004700: 6a9003ef jal x7,800055a8 +80004704: 800047c4 .word 0x800047c4 +80004708: 8000ff89 .word 0x8000ff89 +8000470c: 00000341 .word 0x00000341 + +80004710 : +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0000b517 auipc x10,0xb +80004724: 7d450513 addi x10,x10,2004 # 8000fef4 +80004728: 00000013 addi x0,x0,0 +8000472c: 00000013 addi x0,x0,0 +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0001d097 auipc x1,0x1d +80004744: e24080e7 jalr x1,-476(x1) # 80021564 +80004748: 0001d097 auipc x1,0x1d +8000474c: e5c080e7 jalr x1,-420(x1) # 800215a4 + +80004750 : +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0000b517 auipc x10,0xb +80004764: 7ce50513 addi x10,x10,1998 # 8000ff2e +80004768: 00000013 addi x0,x0,0 +8000476c: 00000013 addi x0,x0,0 +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 0001d097 auipc x1,0x1d +80004784: de4080e7 jalr x1,-540(x1) # 80021564 +80004788: 0001d097 auipc x1,0x1d +8000478c: e3c080e7 jalr x1,-452(x1) # 800215c4 + +80004790 : +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: 00000717 auipc x14,0x0 +800047a4: ff070713 addi x14,x14,-16 # 80004790 +800047a8: 00000013 addi x0,x0,0 +800047ac: 00000013 addi x0,x0,0 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 +800047c0: cddff06f jal x0,8000449c + +800047c4 : +800047c4: bad0e737 lui x14,0xbad0e +800047c8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047cc: cd1ff06f jal x0,8000449c +800047d0: 00000013 addi x0,x0,0 +800047d4: 00000013 addi x0,x0,0 +800047d8: 00000013 addi x0,x0,0 +800047dc: 00000013 addi x0,x0,0 +800047e0: 00000013 addi x0,x0,0 +800047e4: 00000013 addi x0,x0,0 +800047e8: 00000013 addi x0,x0,0 +800047ec: 00000013 addi x0,x0,0 +800047f0: 00000013 addi x0,x0,0 +800047f4: 00000013 addi x0,x0,0 +800047f8: 00000013 addi x0,x0,0 +800047fc: 00000013 addi x0,x0,0 + +80004800 : +80004800: 0800006f jal x0,80004880 +80004804: 0880006f jal x0,8000488c +80004808: 0900006f jal x0,80004898 +8000480c: 0980006f jal x0,800048a4 +80004810: 0a00006f jal x0,800048b0 +80004814: 0a80006f jal x0,800048bc +80004818: 0b00006f jal x0,800048c8 +8000481c: 0b80006f jal x0,800048d4 +80004820: 0c00006f jal x0,800048e0 +80004824: 0c80006f jal x0,800048ec +80004828: 0d00006f jal x0,800048f8 +8000482c: 0d80006f jal x0,80004904 +80004830: 0e00006f jal x0,80004910 +80004834: 0e80006f jal x0,8000491c +80004838: 0f00006f jal x0,80004928 +8000483c: 0f80006f jal x0,80004934 +80004840: 1000006f jal x0,80004940 +80004844: 1080006f jal x0,8000494c +80004848: 1100006f jal x0,80004958 +8000484c: 1180006f jal x0,80004964 +80004850: 1200006f jal x0,80004970 +80004854: 1280006f jal x0,8000497c +80004858: 1300006f jal x0,80004988 +8000485c: 1380006f jal x0,80004994 +80004860: 1400006f jal x0,800049a0 +80004864: 13c0006f jal x0,800049a0 +80004868: 1380006f jal x0,800049a0 +8000486c: 1340006f jal x0,800049a0 +80004870: 1300006f jal x0,800049a0 +80004874: 12c0006f jal x0,800049a0 +80004878: 1280006f jal x0,800049a0 +8000487c: 1240006f jal x0,800049a0 + +80004880 : +80004880: 34011173 csrrw x2,mscratch,x2 +80004884: 26f12823 sw x15,624(x2) +80004888: 13c007ef jal x15,800049c4 +8000488c: 34011173 csrrw x2,mscratch,x2 +80004890: 26f12823 sw x15,624(x2) +80004894: 130007ef jal x15,800049c4 +80004898: 34011173 csrrw x2,mscratch,x2 +8000489c: 26f12823 sw x15,624(x2) +800048a0: 124007ef jal x15,800049c4 +800048a4: 34011173 csrrw x2,mscratch,x2 +800048a8: 26f12823 sw x15,624(x2) +800048ac: 118007ef jal x15,800049c4 +800048b0: 34011173 csrrw x2,mscratch,x2 +800048b4: 26f12823 sw x15,624(x2) +800048b8: 10c007ef jal x15,800049c4 +800048bc: 34011173 csrrw x2,mscratch,x2 +800048c0: 26f12823 sw x15,624(x2) +800048c4: 100007ef jal x15,800049c4 +800048c8: 34011173 csrrw x2,mscratch,x2 +800048cc: 26f12823 sw x15,624(x2) +800048d0: 0f4007ef jal x15,800049c4 +800048d4: 34011173 csrrw x2,mscratch,x2 +800048d8: 26f12823 sw x15,624(x2) +800048dc: 0e8007ef jal x15,800049c4 +800048e0: 34011173 csrrw x2,mscratch,x2 +800048e4: 26f12823 sw x15,624(x2) +800048e8: 0dc007ef jal x15,800049c4 +800048ec: 34011173 csrrw x2,mscratch,x2 +800048f0: 26f12823 sw x15,624(x2) +800048f4: 0d0007ef jal x15,800049c4 +800048f8: 34011173 csrrw x2,mscratch,x2 +800048fc: 26f12823 sw x15,624(x2) +80004900: 0c4007ef jal x15,800049c4 +80004904: 34011173 csrrw x2,mscratch,x2 +80004908: 26f12823 sw x15,624(x2) +8000490c: 0b8007ef jal x15,800049c4 +80004910: 34011173 csrrw x2,mscratch,x2 +80004914: 26f12823 sw x15,624(x2) +80004918: 0ac007ef jal x15,800049c4 +8000491c: 34011173 csrrw x2,mscratch,x2 +80004920: 26f12823 sw x15,624(x2) +80004924: 0a0007ef jal x15,800049c4 +80004928: 34011173 csrrw x2,mscratch,x2 +8000492c: 26f12823 sw x15,624(x2) +80004930: 094007ef jal x15,800049c4 +80004934: 34011173 csrrw x2,mscratch,x2 +80004938: 26f12823 sw x15,624(x2) +8000493c: 088007ef jal x15,800049c4 +80004940: 34011173 csrrw x2,mscratch,x2 +80004944: 26f12823 sw x15,624(x2) +80004948: 07c007ef jal x15,800049c4 +8000494c: 34011173 csrrw x2,mscratch,x2 +80004950: 26f12823 sw x15,624(x2) +80004954: 070007ef jal x15,800049c4 +80004958: 34011173 csrrw x2,mscratch,x2 +8000495c: 26f12823 sw x15,624(x2) +80004960: 064007ef jal x15,800049c4 +80004964: 34011173 csrrw x2,mscratch,x2 +80004968: 26f12823 sw x15,624(x2) +8000496c: 058007ef jal x15,800049c4 +80004970: 34011173 csrrw x2,mscratch,x2 +80004974: 26f12823 sw x15,624(x2) +80004978: 04c007ef jal x15,800049c4 +8000497c: 34011173 csrrw x2,mscratch,x2 +80004980: 26f12823 sw x15,624(x2) +80004984: 040007ef jal x15,800049c4 +80004988: 34011173 csrrw x2,mscratch,x2 +8000498c: 26f12823 sw x15,624(x2) +80004990: 034007ef jal x15,800049c4 +80004994: 34011173 csrrw x2,mscratch,x2 +80004998: 26f12823 sw x15,624(x2) +8000499c: 028007ef jal x15,800049c4 + +800049a0 : +800049a0: 00000317 auipc x6,0x0 +800049a4: b5430313 addi x6,x6,-1196 # 800044f4 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00030067 jalr x0,0(x6) + +800049c4 : +800049c4: 26e12623 sw x14,620(x2) +800049c8: 34011773 csrrw x14,mscratch,x2 +800049cc: 26e12a23 sw x14,628(x2) +800049d0: 23012703 lw x14,560(x2) +800049d4: 00070067 jalr x0,0(x14) + +800049d8 : +800049d8: 26912423 sw x9,616(x2) +800049dc: 26812223 sw x8,612(x2) +800049e0: 26712023 sw x7,608(x2) +800049e4: 24612e23 sw x6,604(x2) +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 00003317 auipc x6,0x3 +80004a04: 70830313 addi x6,x6,1800 # 80008108 +80004a08: 00000013 addi x0,x0,0 +80004a0c: 00000013 addi x0,x0,0 +80004a10: 00000013 addi x0,x0,0 +80004a14: 00000013 addi x0,x0,0 +80004a18: 00000013 addi x0,x0,0 +80004a1c: 00000013 addi x0,x0,0 +80004a20: 00032383 lw x7,0(x6) +80004a24: 00138393 addi x7,x7,1 +80004a28: 00732023 sw x7,0(x6) +80004a2c: 34202773 csrrs x14,mcause,x0 + +80004a30 : +80004a30: 800014b7 lui x9,0x80001 +80004a34: fff48493 addi x9,x9,-1 # 80000fff +80004a38: 00e4f4b3 and x9,x9,x14 + +80004a3c : +80004a3c: ffe48413 addi x8,x9,-2 +80004a40: 00041663 bne x8,x0,80004a4c + +80004a44 : +80004a44: 280506e3 beq x10,x0,800054d0 +80004a48: 58c0006f jal x0,80004fd4 + +80004a4c : +80004a4c: ff848413 addi x8,x9,-8 +80004a50: 00245413 srli x8,x8,0x2 +80004a54: 58041063 bne x8,x0,80004fd4 + +80004a58 : +80004a58: 26050ce3 beq x10,x0,800054d0 + +80004a5c : +80004a5c: fff50493 addi x9,x10,-1 +80004a60: 00500393 addi x7,x0,5 +80004a64: 0274e063 bltu x9,x7,80004a84 +80004a68: 07300393 addi x7,x0,115 +80004a6c: 00750463 beq x10,x7,80004a74 +80004a70: 0800006f jal x0,80004af0 + +80004a74 : +80004a74: 34102573 csrrs x10,mepc,x0 +80004a78: 00450413 addi x8,x10,4 +80004a7c: 34141073 csrrw x0,mepc,x8 +80004a80: 7c00006f jal x0,80005240 + +80004a84 : +80004a84: 341024f3 csrrs x9,mepc,x0 +80004a88: 00448493 addi x9,x9,4 +80004a8c: 34149073 csrrw x0,mepc,x9 +80004a90: 00100393 addi x7,x0,1 +80004a94: 00750e63 beq x10,x7,80004ab0 +80004a98: 00200393 addi x7,x0,2 +80004a9c: 02750263 beq x10,x7,80004ac0 +80004aa0: 00300393 addi x7,x0,3 +80004aa4: 02750c63 beq x10,x7,80004adc +80004aa8: fff00513 addi x10,x0,-1 +80004aac: 7940006f jal x0,80005240 + +80004ab0 : +80004ab0: 000024b7 lui x9,0x2 +80004ab4: 80048493 addi x9,x9,-2048 # 1800 +80004ab8: 3004a073 csrrs x0,mstatus,x9 +80004abc: 7840006f jal x0,80005240 + +80004ac0 : +80004ac0: 000024b7 lui x9,0x2 +80004ac4: 80048493 addi x9,x9,-2048 # 1800 +80004ac8: 3004b073 csrrc x0,mstatus,x9 +80004acc: 000014b7 lui x9,0x1 +80004ad0: 80048493 addi x9,x9,-2048 # 800 +80004ad4: 3004a073 csrrs x0,mstatus,x9 +80004ad8: 7680006f jal x0,80005240 + +80004adc : +80004adc: 000024b7 lui x9,0x2 +80004ae0: 80048493 addi x9,x9,-2048 # 1800 +80004ae4: 3004b073 csrrc x0,mstatus,x9 +80004ae8: 7580006f jal x0,80005240 + +80004aec : +80004aec: 00000013 addi x0,x0,0 + +80004af0 : +80004af0: 00000013 addi x0,x0,0 +80004af4: 00000013 addi x0,x0,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000397 auipc x7,0x0 +80004b04: 17038393 addi x7,x7,368 # 80004c70 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 + +80004b20 : +80004b20: 0003a403 lw x8,0(x7) +80004b24: 00a40863 beq x8,x10,80004b34 +80004b28: 04040863 beq x8,x0,80004b78 +80004b2c: 00838393 addi x7,x7,8 +80004b30: ff1ff06f jal x0,80004b20 + +80004b34 : +80004b34: 00008493 addi x9,x1,0 +80004b38: 00000013 addi x0,x0,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 00000097 auipc x1,0x0 +80004b44: 02408093 addi x1,x1,36 # 80004b64 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 00038067 jalr x0,0(x7) + +80004b64 : +80004b64: 00048093 addi x1,x9,0 +80004b68: 34102473 csrrs x8,mepc,x0 +80004b6c: 00440413 addi x8,x8,4 +80004b70: 34141073 csrrw x0,mepc,x8 +80004b74: 6cc0006f jal x0,80005240 + +80004b78 : +80004b78: 00050493 addi x9,x10,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000d517 auipc x10,0xd +80004b84: a2950513 addi x10,x10,-1495 # 800115a9 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00048513 addi x10,x9,0 +80004bac: 02000593 addi x11,x0,32 +80004bb0: 4a8020ef jal x1,80007058 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: e5850513 addi x10,x10,-424 # 8000fa18 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 43050513 addi x10,x10,1072 # 80010030 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 00000013 addi x0,x0,0 +80004c2c: 00000013 addi x0,x0,0 +80004c30: 00000013 addi x0,x0,0 +80004c34: 00000013 addi x0,x0,0 +80004c38: 00000013 addi x0,x0,0 +80004c3c: 00000013 addi x0,x0,0 +80004c40: 0000b517 auipc x10,0xb +80004c44: 2ee50513 addi x10,x10,750 # 8000ff2e +80004c48: 00000013 addi x0,x0,0 +80004c4c: 00000013 addi x0,x0,0 +80004c50: 00000013 addi x0,x0,0 +80004c54: 00000013 addi x0,x0,0 +80004c58: 00000013 addi x0,x0,0 +80004c5c: 00000013 addi x0,x0,0 +80004c60: 0001d097 auipc x1,0x1d +80004c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80004c68: 0001d097 auipc x1,0x1d +80004c6c: 95c080e7 jalr x1,-1700(x1) # 800215c4 + +80004c70 : +80004c70: 30002573 .word 0x30002573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30059073 .word 0x30059073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3005a073 .word 0x3005a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3005b073 .word 0x3005b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30402573 .word 0x30402573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30459073 .word 0x30459073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 3045a073 .word 0x3045a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 3045b073 .word 0x3045b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 30602573 .word 0x30602573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 30659073 .word 0x30659073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3065a073 .word 0x3065a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3065b073 .word 0x3065b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 30a02573 .word 0x30a02573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 30a59073 .word 0x30a59073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 30a5a073 .word 0x30a5a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 30a5b073 .word 0x30a5b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 34402573 .word 0x34402573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 34459073 .word 0x34459073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3445a073 .word 0x3445a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3445b073 .word 0x3445b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: 74702573 .word 0x74702573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: 74759073 .word 0x74759073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: 7475a073 .word 0x7475a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: 7475b073 .word 0x7475b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: 32002573 .word 0x32002573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: 32059073 .word 0x32059073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: 3205a073 .word 0x3205a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: 3205b073 .word 0x3205b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: b0002573 .word 0xb0002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: b0059073 .word 0xb0059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: b005a073 .word 0xb005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: b005b073 .word 0xb005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: b0202573 .word 0xb0202573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: b0259073 .word 0xb0259073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: b025a073 .word 0xb025a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: b025b073 .word 0xb025b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10002573 .word 0x10002573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10059073 .word 0x10059073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1005a073 .word 0x1005a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1005b073 .word 0x1005b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10402573 .word 0x10402573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10459073 .word 0x10459073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 1045a073 .word 0x1045a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 1045b073 .word 0x1045b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 10602573 .word 0x10602573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 10659073 .word 0x10659073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1065a073 .word 0x1065a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1065b073 .word 0x1065b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 10a02573 .word 0x10a02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 10a59073 .word 0x10a59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 10a5a073 .word 0x10a5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 10a5b073 .word 0x10a5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 14402573 .word 0x14402573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 14459073 .word 0x14459073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1445a073 .word 0x1445a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1445b073 .word 0x1445b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 14d02573 .word 0x14d02573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 14d59073 .word 0x14d59073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 14d5a073 .word 0x14d5a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 14d5b073 .word 0x14d5b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 18002573 .word 0x18002573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 18059073 .word 0x18059073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 1805a073 .word 0x1805a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 1805b073 .word 0x1805b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a002573 .word 0x7a002573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a059073 .word 0x7a059073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a05a073 .word 0x7a05a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a05b073 .word 0x7a05b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a102573 .word 0x7a102573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a159073 .word 0x7a159073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a15a073 .word 0x7a15a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a15b073 .word 0x7a15b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a202573 .word 0x7a202573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a259073 .word 0x7a259073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a25a073 .word 0x7a25a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a25b073 .word 0x7a25b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a302573 .word 0x7a302573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a359073 .word 0x7a359073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a35a073 .word 0x7a35a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a35b073 .word 0x7a35b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a402573 .word 0x7a402573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a459073 .word 0x7a459073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a45a073 .word 0x7a45a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a45b073 .word 0x7a45b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7a502573 .word 0x7a502573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7a559073 .word 0x7a559073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7a55a073 .word 0x7a55a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7a55b073 .word 0x7a55b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 7a802573 .word 0x7a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 7a859073 .word 0x7a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 7a85a073 .word 0x7a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 7a85b073 .word 0x7a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 7aa02573 .word 0x7aa02573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 7aa59073 .word 0x7aa59073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 7aa5a073 .word 0x7aa5a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 7aa5b073 .word 0x7aa5b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 5a802573 .word 0x5a802573 +80004f74: 00008067 jalr x0,0(x1) +80004f78: 5a859073 .word 0x5a859073 +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 5a85a073 .word 0x5a85a073 +80004f84: 00008067 jalr x0,0(x1) +80004f88: 5a85b073 .word 0x5a85b073 +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 6a802573 .word 0x6a802573 +80004f94: 00008067 jalr x0,0(x1) +80004f98: 6a859073 .word 0x6a859073 +80004f9c: 00008067 jalr x0,0(x1) +80004fa0: 6a85a073 .word 0x6a85a073 +80004fa4: 00008067 jalr x0,0(x1) +80004fa8: 6a85b073 .word 0x6a85b073 +80004fac: 00008067 jalr x0,0(x1) +80004fb0: 0005a503 lw x10,0(x11) +80004fb4: 00008067 jalr x0,0(x1) +80004fb8: 0045a503 lw x10,4(x11) +80004fbc: 00008067 jalr x0,0(x1) +80004fc0: 00c5a023 sw x12,0(x11) +80004fc4: 00008067 jalr x0,0(x1) +80004fc8: 00c5a223 sw x12,4(x11) +80004fcc: 00008067 jalr x0,0(x1) +80004fd0: 00000000 .word 0x00000000 + +80004fd4 : +80004fd4: 01000393 addi x7,x0,16 +80004fd8: 00075c63 bge x14,x0,80004ff0 + +80004fdc : +80004fdc: 00171413 slli x8,x14,0x1 +80004fe0: ff240413 addi x8,x8,-14 +80004fe4: 00045663 bge x8,x0,80004ff0 +80004fe8: 00c00393 addi x7,x0,12 +80004fec: 0040006f jal x0,80004ff0 + +80004ff0 : +80004ff0: d6810113 addi x2,x2,-664 +80004ff4: 4b012303 lw x6,1200(x2) +80004ff8: 007304b3 add x9,x6,x7 +80004ffc: 4a912823 sw x9,1200(x2) +80005000: 49012403 lw x8,1168(x2) +80005004: 40830333 sub x6,x6,x8 +80005008: 29810113 addi x2,x2,664 +8000500c: 1f812403 lw x8,504(x2) +80005010: 00830333 add x6,x6,x8 +80005014: 34102473 csrrs x8,mepc,x0 +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0000b497 auipc x9,0xb +80005024: 9d848493 addi x9,x9,-1576 # 8000f9f8 +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 0084a023 sw x8,0(x9) +80005044: 00e4a423 sw x14,8(x9) +80005048: 34302473 csrrs x8,mtval,x0 +8000504c: 0084a823 sw x8,16(x9) +80005050: 30002473 csrrs x8,mstatus,x0 +80005054: 0084ac23 sw x8,24(x9) +80005058: 00000013 addi x0,x0,0 +8000505c: 00000013 addi x0,x0,0 +80005060: 0001b417 auipc x8,0x1b +80005064: 64c40413 addi x8,x8,1612 # 800206ac +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 007304b3 add x9,x6,x7 +80005084: f0946663 bltu x8,x9,80004790 + +80005088 : +80005088: 24012403 lw x8,576(x2) +8000508c: 408787b3 sub x15,x15,x8 +80005090: 00179493 slli x9,x15,0x1 +80005094: 009787b3 add x15,x15,x9 +80005098: 0057d793 srli x15,x15,0x5 +8000509c: 00679793 slli x15,x15,0x6 +800050a0: 0077e7b3 or x15,x15,x7 +800050a4: 00378793 addi x15,x15,3 +800050a8: 02075a63 bge x14,x0,800050dc +800050ac: 00f00413 addi x8,x0,15 +800050b0: 00877433 and x8,x14,x8 +800050b4: 304024f3 csrrs x9,mie,x0 +800050b8: 0084d4b3 srl x9,x9,x8 +800050bc: 0014f493 andi x9,x9,1 +800050c0: 00b49493 slli x9,x9,0xb +800050c4: 0097e7b3 or x15,x15,x9 +800050c8: 344024f3 csrrs x9,mip,x0 +800050cc: 0084d4b3 srl x9,x9,x8 +800050d0: 0014f493 andi x9,x9,1 +800050d4: 00c49493 slli x9,x9,0xc +800050d8: 0097e7b3 or x15,x15,x9 +800050dc: 300023f3 csrrs x7,mstatus,x0 +800050e0: 00f39393 slli x7,x7,0xf +800050e4: 0023d393 srli x7,x7,0x2 +800050e8: 0021a437 lui x8,0x21a +800050ec: fe540413 addi x8,x8,-27 # 219fe5 +800050f0: fff44413 xori x8,x8,-1 +800050f4: 0083f433 and x8,x7,x8 +800050f8: 0087e433 or x8,x15,x8 +800050fc: 310024f3 csrrs x9,0x310,x0 +80005100: 1c04f493 andi x9,x9,448 +80005104: 00849493 slli x9,x9,0x8 +80005108: 00946433 or x8,x8,x9 +8000510c: 00032483 lw x9,0(x6) +80005110: 00848e63 beq x9,x8,8000512c +80005114: 00040313 addi x6,x8,0 +80005118: 00048213 addi x4,x9,0 +8000511c: 48c003ef jal x7,800055a8 +80005120: 80005088 .word 0x80005088 +80005124: 80010132 .word 0x80010132 +80005128: 00000341 .word 0x00000341 + +8000512c : +8000512c: 00070413 addi x8,x14,0 +80005130: 00432483 lw x9,4(x6) +80005134: 00848e63 beq x9,x8,80005150 +80005138: 00040313 addi x6,x8,0 +8000513c: 00048213 addi x4,x9,0 +80005140: 468003ef jal x7,800055a8 +80005144: 8000512c .word 0x8000512c +80005148: 80010234 .word 0x80010234 +8000514c: 00000341 .word 0x00000341 +80005150: 10074863 blt x14,x0,80005260 + +80005154 : +80005154: 34102473 csrrs x8,mepc,x0 +80005158: 00010493 addi x9,x2,0 +8000515c: 0040006f jal x0,80005160 + +80005160 : +80005160: 08000393 addi x7,x0,128 +80005164: 04740863 beq x8,x7,800051b4 +80005168: 00238393 addi x7,x7,2 +8000516c: 04740463 beq x8,x7,800051b4 +80005170: 04040263 beq x8,x0,800051b4 +80005174: 2084a383 lw x7,520(x9) +80005178: 2104a783 lw x15,528(x9) +8000517c: 007787b3 add x15,x15,x7 +80005180: 00f47463 bgeu x8,x15,80005188 +80005184: 02747663 bgeu x8,x7,800051b0 + +80005188 : +80005188: 1d84a383 lw x7,472(x9) +8000518c: 1e04a783 lw x15,480(x9) +80005190: 007787b3 add x15,x15,x7 +80005194: 00f47463 bgeu x8,x15,8000519c +80005198: 00747c63 bgeu x8,x7,800051b0 + +8000519c : +8000519c: 1e84a383 lw x7,488(x9) +800051a0: 1f04a783 lw x15,496(x9) +800051a4: 007787b3 add x15,x15,x7 +800051a8: e0f47e63 bgeu x8,x15,800047c4 +800051ac: e0746c63 bltu x8,x7,800047c4 + +800051b0 : +800051b0: 40740433 sub x8,x8,x7 + +800051b4 : +800051b4: 00832483 lw x9,8(x6) +800051b8: 00848e63 beq x9,x8,800051d4 +800051bc: 00040313 addi x6,x8,0 +800051c0: 00048213 addi x4,x9,0 +800051c4: 3e4003ef jal x7,800055a8 +800051c8: 800051b4 .word 0x800051b4 +800051cc: 8001032f .word 0x8001032f +800051d0: 00000341 .word 0x00000341 + +800051d4 : +800051d4: 34102473 csrrs x8,mepc,x0 +800051d8: 342023f3 csrrs x7,mcause,x0 +800051dc: 00c00793 addi x15,x0,12 +800051e0: 00f38a63 beq x7,x15,800051f4 +800051e4: 00100793 addi x15,x0,1 +800051e8: 00f38663 beq x7,x15,800051f4 +800051ec: 01400793 addi x15,x0,20 +800051f0: 00f39663 bne x7,x15,800051fc +800051f4: 34109073 csrrw x0,mepc,x1 +800051f8: 0100006f jal x0,80005208 + +800051fc : +800051fc: 00400393 addi x7,x0,4 +80005200: 00740433 add x8,x8,x7 +80005204: 34141073 csrrw x0,mepc,x8 + +80005208 : +80005208: 34302473 csrrs x8,mtval,x0 + +8000520c : +8000520c: 00c32483 lw x9,12(x6) +80005210: 00848e63 beq x9,x8,8000522c +80005214: 00040313 addi x6,x8,0 +80005218: 00048213 addi x4,x9,0 +8000521c: 38c003ef jal x7,800055a8 +80005220: 8000520c .word 0x8000520c +80005224: 80010422 .word 0x80010422 +80005228: 00000341 .word 0x00000341 + +8000522c : +8000522c: 30102473 csrrs x8,misa,x0 +80005230: 01841413 slli x8,x8,0x18 +80005234: 00045263 bge x8,x0,80005238 + +80005238 : +80005238: 10000393 addi x7,x0,256 +8000523c: 05c0006f jal x0,80005298 + +80005240 : +80005240: 25c12303 lw x6,604(x2) +80005244: 26012383 lw x7,608(x2) +80005248: 26412403 lw x8,612(x2) +8000524c: 26812483 lw x9,616(x2) +80005250: 26c12703 lw x14,620(x2) +80005254: 27012783 lw x15,624(x2) +80005258: 27412103 lw x2,628(x2) +8000525c: 30200073 mret + +80005260 : +80005260: 00100413 addi x8,x0,1 +80005264: 01f77393 andi x7,x14,31 +80005268: 00741433 sll x8,x8,x7 +8000526c: 304434f3 csrrc x9,mie,x8 +80005270: 34443473 csrrc x8,mip,x8 + +80005274 : +80005274: 00832483 lw x9,8(x6) +80005278: 00848e63 beq x9,x8,80005294 +8000527c: 00040313 addi x6,x8,0 +80005280: 00048213 addi x4,x9,0 +80005284: 324003ef jal x7,800055a8 +80005288: 80005274 .word 0x80005274 +8000528c: 80010595 .word 0x80010595 +80005290: 00000341 .word 0x00000341 +80005294: 00000393 addi x7,x0,0 + +80005298 : +80005298: 00000417 auipc x8,0x0 +8000529c: 03c40413 addi x8,x8,60 # 800052d4 +800052a0: 00740433 add x8,x8,x7 +800052a4: 00371393 slli x7,x14,0x3 +800052a8: 00740433 add x8,x8,x7 +800052ac: ff847413 andi x8,x8,-8 +800052b0: 00042403 lw x8,0(x8) + +800052b4 : +800052b4: 00040a63 beq x8,x0,800052c8 +800052b8: 01f41393 slli x7,x8,0x1f +800052bc: 0003d863 bge x7,x0,800052cc +800052c0: 00145413 srli x8,x8,0x1 +800052c4: f6870ee3 beq x14,x8,80005240 +800052c8: cfcff06f jal x0,800047c4 + +800052cc : +800052cc: 00040067 jalr x0,0(x8) + +800052d0 : + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021000 .word 0x80021000 + ... +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 80021014 .word 0x80021014 + ... +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 80021030 .word 0x80021030 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 +8000534c: 00000000 .word 0x00000000 +80005350: 00000001 .word 0x00000001 +80005354: 00000000 .word 0x00000000 +80005358: 00000001 .word 0x00000001 +8000535c: 00000000 .word 0x00000000 +80005360: 00000001 .word 0x00000001 +80005364: 00000000 .word 0x00000000 +80005368: 00000001 .word 0x00000001 +8000536c: 00000000 .word 0x00000000 +80005370: 00000001 .word 0x00000001 +80005374: 00000000 .word 0x00000000 +80005378: 00000001 .word 0x00000001 +8000537c: 00000000 .word 0x00000000 +80005380: 00000001 .word 0x00000001 +80005384: 00000000 .word 0x00000000 +80005388: 00000001 .word 0x00000001 + ... + +800053d0 : +800053d0: 00000001 .word 0x00000001 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000003 .word 0x00000003 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000005 .word 0x00000005 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000007 .word 0x00000007 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000009 .word 0x00000009 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000000b .word 0x0000000b +800053fc: 00000000 .word 0x00000000 +80005400: 0000000d .word 0x0000000d +80005404: 00000000 .word 0x00000000 +80005408: 0000000f .word 0x0000000f +8000540c: 00000000 .word 0x00000000 +80005410: 00000011 .word 0x00000011 +80005414: 00000000 .word 0x00000000 +80005418: 00000013 .word 0x00000013 +8000541c: 00000000 .word 0x00000000 +80005420: 00000015 .word 0x00000015 +80005424: 00000000 .word 0x00000000 +80005428: 00000017 .word 0x00000017 +8000542c: 00000000 .word 0x00000000 +80005430: 00000019 .word 0x00000019 +80005434: 00000000 .word 0x00000000 +80005438: 0000001b .word 0x0000001b +8000543c: 00000000 .word 0x00000000 +80005440: 0000001d .word 0x0000001d +80005444: 00000000 .word 0x00000000 +80005448: 0000001f .word 0x0000001f +8000544c: 00000000 .word 0x00000000 +80005450: 00000021 .word 0x00000021 +80005454: 00000000 .word 0x00000000 +80005458: 00000023 .word 0x00000023 +8000545c: 00000000 .word 0x00000000 +80005460: 00000025 .word 0x00000025 +80005464: 00000000 .word 0x00000000 +80005468: 00000027 .word 0x00000027 +8000546c: 00000000 .word 0x00000000 +80005470: 00000029 .word 0x00000029 +80005474: 00000000 .word 0x00000000 +80005478: 0000002b .word 0x0000002b +8000547c: 00000000 .word 0x00000000 +80005480: 0000002d .word 0x0000002d +80005484: 00000000 .word 0x00000000 +80005488: 0000002f .word 0x0000002f + ... + +800054d0 : +800054d0: 300023f3 csrrs x7,mstatus,x0 +800054d4: 00b3d493 srli x9,x7,0xb +800054d8: 0034f493 andi x9,x9,3 +800054dc: ffd48413 addi x8,x9,-3 +800054e0: 341023f3 csrrs x7,mepc,x0 +800054e4: 00000493 addi x9,x0,0 +800054e8: 02040c63 beq x8,x0,80005520 +800054ec: 29810113 addi x2,x2,664 +800054f0: 310023f3 csrrs x7,0x310,x0 +800054f4: 01839393 slli x7,x7,0x18 +800054f8: 0003da63 bge x7,x0,8000550c + +800054fc : +800054fc: 29810113 addi x2,x2,664 +80005500: 47012783 lw x15,1136(x2) +80005504: d6810113 addi x2,x2,-664 +80005508: 0080006f jal x0,80005510 + +8000550c : +8000550c: f4012783 lw x15,-192(x2) +80005510: 341023f3 csrrs x7,mepc,x0 +80005514: 40f383b3 sub x7,x7,x15 +80005518: d6810113 addi x2,x2,-664 +8000551c: 1d812483 lw x9,472(x2) + +80005520 : +80005520: 007483b3 add x7,x9,x7 +80005524: 25c12303 lw x6,604(x2) +80005528: 26412403 lw x8,612(x2) +8000552c: 26812483 lw x9,616(x2) +80005530: 26c12703 lw x14,620(x2) +80005534: 27012783 lw x15,624(x2) +80005538: 27412103 lw x2,628(x2) +8000553c: 00438067 jalr x0,4(x7) + +80005540 : +80005540: 0000a217 auipc x4,0xa +80005544: 37020213 addi x4,x4,880 # 8000f8b0 +80005548: 02522423 sw x5,40(x4) # 28 +8000554c: 00122423 sw x1,8(x4) # 8 +80005550: 00022023 sw x0,0(x4) # 0 +80005554: 0880006f jal x0,800055dc + +80005558 : +80005558: 0000a397 auipc x7,0xa +8000555c: 35838393 addi x7,x7,856 # 8000f8b0 +80005560: 0483a023 sw x8,64(x7) +80005564: 0243a023 sw x4,32(x7) +80005568: 0253a423 sw x5,40(x7) +8000556c: 0013a423 sw x1,8(x7) +80005570: 0003a023 sw x0,0(x7) +80005574: 00038213 addi x4,x7,0 +80005578: 00040293 addi x5,x8,0 +8000557c: 0600006f jal x0,800055dc + +80005580 : +80005580: 0000a697 auipc x13,0xa +80005584: 33068693 addi x13,x13,816 # 8000f8b0 +80005588: 06e6a823 sw x14,112(x13) +8000558c: 0246a023 sw x4,32(x13) +80005590: 0256a423 sw x5,40(x13) +80005594: 0016a423 sw x1,8(x13) +80005598: 0006a023 sw x0,0(x13) +8000559c: 00068213 addi x4,x13,0 +800055a0: 00070293 addi x5,x14,0 +800055a4: 0380006f jal x0,800055dc + +800055a8 : +800055a8: 0000a497 auipc x9,0xa +800055ac: 30848493 addi x9,x9,776 # 8000f8b0 +800055b0: 0674a423 sw x7,104(x9) +800055b4: 0244a023 sw x4,32(x9) +800055b8: 0254a423 sw x5,40(x9) +800055bc: 0014a423 sw x1,8(x9) +800055c0: 00300093 addi x1,x0,3 +800055c4: 0014a023 sw x1,0(x9) +800055c8: 1064a823 sw x6,272(x9) +800055cc: 1044ac23 sw x4,280(x9) +800055d0: 00048213 addi x4,x9,0 +800055d4: 00038293 addi x5,x7,0 +800055d8: 0040006f jal x0,800055dc + +800055dc : +800055dc: 00222823 sw x2,16(x4) # 10 +800055e0: 00322c23 sw x3,24(x4) # 18 +800055e4: 02622823 sw x6,48(x4) # 30 +800055e8: 02722c23 sw x7,56(x4) # 38 +800055ec: 04822023 sw x8,64(x4) # 40 +800055f0: 04922423 sw x9,72(x4) # 48 +800055f4: 04a22823 sw x10,80(x4) # 50 +800055f8: 04b22c23 sw x11,88(x4) # 58 +800055fc: 06c22023 sw x12,96(x4) # 60 +80005600: 06d22423 sw x13,104(x4) # 68 +80005604: 06e22823 sw x14,112(x4) # 70 +80005608: 06f22c23 sw x15,120(x4) # 78 +8000560c: 09022023 sw x16,128(x4) # 80 +80005610: 09122423 sw x17,136(x4) # 88 +80005614: 09222823 sw x18,144(x4) # 90 +80005618: 09322c23 sw x19,152(x4) # 98 +8000561c: 0b422023 sw x20,160(x4) # a0 +80005620: 0b522423 sw x21,168(x4) # a8 +80005624: 0b622823 sw x22,176(x4) # b0 +80005628: 0b722c23 sw x23,184(x4) # b8 +8000562c: 0d822023 sw x24,192(x4) # c0 +80005630: 0d922423 sw x25,200(x4) # c8 +80005634: 0da22823 sw x26,208(x4) # d0 +80005638: 0db22c23 sw x27,216(x4) # d8 +8000563c: 0fc22023 sw x28,224(x4) # e0 +80005640: 0fd22423 sw x29,232(x4) # e8 +80005644: 0fe22823 sw x30,240(x4) # f0 +80005648: 0ff22c23 sw x31,248(x4) # f8 + +8000564c : +8000564c: 0000a497 auipc x9,0xa +80005650: 2644a483 lw x9,612(x9) # 8000f8b0 +80005654: 00300513 addi x10,x0,3 +80005658: 18a48a63 beq x9,x10,800057ec + +8000565c : +8000565c: ffa2d303 lhu x6,-6(x5) +80005660: ff82d383 lhu x7,-8(x5) +80005664: 01031313 slli x6,x6,0x10 +80005668: 00736333 or x6,x6,x7 +8000566c: 00f35393 srli x7,x6,0xf +80005670: 01f3f393 andi x7,x7,31 +80005674: 01435413 srli x8,x6,0x14 +80005678: 01f47413 andi x8,x8,31 +8000567c: 10822223 sw x8,260(x4) # 104 +80005680: 00341313 slli x6,x8,0x3 +80005684: 00620333 add x6,x4,x6 +80005688: 00032303 lw x6,0(x6) +8000568c: 10622823 sw x6,272(x4) # 110 +80005690: ff62d303 lhu x6,-10(x5) +80005694: ff42d383 lhu x7,-12(x5) +80005698: 01031313 slli x6,x6,0x10 +8000569c: 00736333 or x6,x6,x7 +800056a0: 00030513 addi x10,x6,0 +800056a4: 07f37413 andi x8,x6,127 +800056a8: 00300493 addi x9,x0,3 +800056ac: 0c941463 bne x8,x9,80005774 +800056b0: 00c35413 srli x8,x6,0xc +800056b4: 00747413 andi x8,x8,7 +800056b8: 00200493 addi x9,x0,2 +800056bc: 0a941c63 bne x8,x9,80005774 +800056c0: 41435393 srai x7,x6,0x14 +800056c4: 00f35313 srli x6,x6,0xf +800056c8: 01f37313 andi x6,x6,31 +800056cc: 00331313 slli x6,x6,0x3 +800056d0: 00620333 add x6,x4,x6 +800056d4: 00032303 lw x6,0(x6) +800056d8: 00730333 add x6,x6,x7 +800056dc: 00337413 andi x8,x6,3 +800056e0: 0c041663 bne x8,x0,800057ac +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0000c417 auipc x8,0xc +80005704: ef040413 addi x8,x8,-272 # 800115f0 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 08836663 bltu x6,x8,800057ac +80005724: 00000013 addi x0,x0,0 +80005728: 00000013 addi x0,x0,0 +8000572c: 00000013 addi x0,x0,0 +80005730: 00000013 addi x0,x0,0 +80005734: 00000013 addi x0,x0,0 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0001b417 auipc x8,0x1b +80005744: f7040413 addi x8,x8,-144 # 800206b0 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: ffc40413 addi x8,x8,-4 +80005764: 04646463 bltu x8,x6,800057ac +80005768: 00032303 lw x6,0(x6) +8000576c: 10622c23 sw x6,280(x4) # 118 +80005770: 3700006f jal x0,80005ae0 + +80005774 : +80005774: 00100413 addi x8,x0,1 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 25848493 addi x9,x9,600 # 8000f9d8 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10a22c23 sw x10,280(x4) # 118 +800057a8: 3380006f jal x0,80005ae0 + +800057ac : +800057ac: 00200413 addi x8,x0,2 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 0000a497 auipc x9,0xa +800057c4: 21848493 addi x9,x9,536 # 8000f9d8 +800057c8: 00000013 addi x0,x0,0 +800057cc: 00000013 addi x0,x0,0 +800057d0: 00000013 addi x0,x0,0 +800057d4: 00000013 addi x0,x0,0 +800057d8: 00000013 addi x0,x0,0 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0084a023 sw x8,0(x9) +800057e4: 10622c23 sw x6,280(x4) # 118 +800057e8: 2f80006f jal x0,80005ae0 + +800057ec : +800057ec: 0042a303 lw x6,4(x5) +800057f0: 0000a817 auipc x16,0xa +800057f4: 1f880813 addi x16,x16,504 # 8000f9e8 +800057f8: 00682023 sw x6,0(x16) +800057fc: 0002a303 lw x6,0(x5) +80005800: 10622423 sw x6,264(x4) # 108 +80005804: 0000a817 auipc x16,0xa +80005808: 1e480813 addi x16,x16,484 # 8000f9e8 +8000580c: 00082303 lw x6,0(x16) +80005810: 0000b397 auipc x7,0xb +80005814: 90b38393 addi x7,x7,-1781 # 8001011b +80005818: 28730463 beq x6,x7,80005aa0 +8000581c: 00000413 addi x8,x0,0 +80005820: 0000a817 auipc x16,0xa +80005824: 1c080813 addi x16,x16,448 # 8000f9e0 +80005828: 00882023 sw x8,0(x16) +8000582c: 0000b397 auipc x7,0xb +80005830: 90638393 addi x7,x7,-1786 # 80010132 +80005834: 00731863 bne x6,x7,80005844 +80005838: 00100413 addi x8,x0,1 +8000583c: 00000493 addi x9,x0,0 +80005840: 2740006f jal x0,80005ab4 +80005844: 0000b397 auipc x7,0xb +80005848: 9f038393 addi x7,x7,-1552 # 80010234 +8000584c: 00731863 bne x6,x7,8000585c +80005850: 00200413 addi x8,x0,2 +80005854: 00000493 addi x9,x0,0 +80005858: 25c0006f jal x0,80005ab4 +8000585c: 0000b397 auipc x7,0xb +80005860: ad338393 addi x7,x7,-1325 # 8001032f +80005864: 00731863 bne x6,x7,80005874 +80005868: 00300413 addi x8,x0,3 +8000586c: 00000493 addi x9,x0,0 +80005870: 2440006f jal x0,80005ab4 +80005874: 0000b397 auipc x7,0xb +80005878: bae38393 addi x7,x7,-1106 # 80010422 +8000587c: 00731863 bne x6,x7,8000588c +80005880: 00400413 addi x8,x0,4 +80005884: 00000493 addi x9,x0,0 +80005888: 22c0006f jal x0,80005ab4 +8000588c: 0000b397 auipc x7,0xb +80005890: d0938393 addi x7,x7,-759 # 80010595 +80005894: 00731863 bne x6,x7,800058a4 +80005898: 00500413 addi x8,x0,5 +8000589c: 00000493 addi x9,x0,0 +800058a0: 2140006f jal x0,80005ab4 +800058a4: 0000b397 auipc x7,0xb +800058a8: c7538393 addi x7,x7,-907 # 80010519 +800058ac: 00731863 bne x6,x7,800058bc +800058b0: 00600413 addi x8,x0,6 +800058b4: 00000493 addi x9,x0,0 +800058b8: 1fc0006f jal x0,80005ab4 +800058bc: 0000b397 auipc x7,0xb +800058c0: c9b38393 addi x7,x7,-869 # 80010557 +800058c4: 00731863 bne x6,x7,800058d4 +800058c8: 00700413 addi x8,x0,7 +800058cc: 00000493 addi x9,x0,0 +800058d0: 1e40006f jal x0,80005ab4 +800058d4: 0000b397 auipc x7,0xb +800058d8: 89e38393 addi x7,x7,-1890 # 80010172 +800058dc: 00731863 bne x6,x7,800058ec +800058e0: 00100413 addi x8,x0,1 +800058e4: 00100493 addi x9,x0,1 +800058e8: 1cc0006f jal x0,80005ab4 +800058ec: 0000b397 auipc x7,0xb +800058f0: 98638393 addi x7,x7,-1658 # 80010272 +800058f4: 00731863 bne x6,x7,80005904 +800058f8: 00200413 addi x8,x0,2 +800058fc: 00100493 addi x9,x0,1 +80005900: 1b40006f jal x0,80005ab4 +80005904: 0000b397 auipc x7,0xb +80005908: a6738393 addi x7,x7,-1433 # 8001036b +8000590c: 00731863 bne x6,x7,8000591c +80005910: 00300413 addi x8,x0,3 +80005914: 00100493 addi x9,x0,1 +80005918: 19c0006f jal x0,80005ab4 +8000591c: 0000b397 auipc x7,0xb +80005920: b4338393 addi x7,x7,-1213 # 8001045f +80005924: 00731863 bne x6,x7,80005934 +80005928: 00400413 addi x8,x0,4 +8000592c: 00100493 addi x9,x0,1 +80005930: 1840006f jal x0,80005ab4 +80005934: 0000b397 auipc x7,0xb +80005938: c9c38393 addi x7,x7,-868 # 800105d0 +8000593c: 00731863 bne x6,x7,8000594c +80005940: 00500413 addi x8,x0,5 +80005944: 00100493 addi x9,x0,1 +80005948: 16c0006f jal x0,80005ab4 +8000594c: 0000b397 auipc x7,0xb +80005950: 86638393 addi x7,x7,-1946 # 800101b2 +80005954: 00731863 bne x6,x7,80005964 +80005958: 00100413 addi x8,x0,1 +8000595c: 00200493 addi x9,x0,2 +80005960: 1540006f jal x0,80005ab4 +80005964: 0000b397 auipc x7,0xb +80005968: 94c38393 addi x7,x7,-1716 # 800102b0 +8000596c: 00731863 bne x6,x7,8000597c +80005970: 00200413 addi x8,x0,2 +80005974: 00200493 addi x9,x0,2 +80005978: 13c0006f jal x0,80005ab4 +8000597c: 0000b397 auipc x7,0xb +80005980: a2b38393 addi x7,x7,-1493 # 800103a7 +80005984: 00731863 bne x6,x7,80005994 +80005988: 00300413 addi x8,x0,3 +8000598c: 00200493 addi x9,x0,2 +80005990: 1240006f jal x0,80005ab4 +80005994: 0000b397 auipc x7,0xb +80005998: b0838393 addi x7,x7,-1272 # 8001049c +8000599c: 00731863 bne x6,x7,800059ac +800059a0: 00400413 addi x8,x0,4 +800059a4: 00200493 addi x9,x0,2 +800059a8: 10c0006f jal x0,80005ab4 +800059ac: 0000b397 auipc x7,0xb +800059b0: c5f38393 addi x7,x7,-929 # 8001060b +800059b4: 00731863 bne x6,x7,800059c4 +800059b8: 00500413 addi x8,x0,5 +800059bc: 00200493 addi x9,x0,2 +800059c0: 0f40006f jal x0,80005ab4 +800059c4: 0000b397 auipc x7,0xb +800059c8: 82f38393 addi x7,x7,-2001 # 800101f3 +800059cc: 00731863 bne x6,x7,800059dc +800059d0: 00100413 addi x8,x0,1 +800059d4: 00300493 addi x9,x0,3 +800059d8: 0dc0006f jal x0,80005ab4 +800059dc: 0000b397 auipc x7,0xb +800059e0: 91338393 addi x7,x7,-1773 # 800102ef +800059e4: 00731863 bne x6,x7,800059f4 +800059e8: 00200413 addi x8,x0,2 +800059ec: 00300493 addi x9,x0,3 +800059f0: 0c40006f jal x0,80005ab4 +800059f4: 0000b397 auipc x7,0xb +800059f8: 9f038393 addi x7,x7,-1552 # 800103e4 +800059fc: 00731863 bne x6,x7,80005a0c +80005a00: 00300413 addi x8,x0,3 +80005a04: 00300493 addi x9,x0,3 +80005a08: 0ac0006f jal x0,80005ab4 +80005a0c: 0000b397 auipc x7,0xb +80005a10: ace38393 addi x7,x7,-1330 # 800104da +80005a14: 00731863 bne x6,x7,80005a24 +80005a18: 00400413 addi x8,x0,4 +80005a1c: 00300493 addi x9,x0,3 +80005a20: 0940006f jal x0,80005ab4 +80005a24: 0000b397 auipc x7,0xb +80005a28: c2338393 addi x7,x7,-989 # 80010647 +80005a2c: 00731863 bne x6,x7,80005a3c +80005a30: 00500413 addi x8,x0,5 +80005a34: 00300493 addi x9,x0,3 +80005a38: 07c0006f jal x0,80005ab4 +80005a3c: 0000b397 auipc x7,0xb +80005a40: c4838393 addi x7,x7,-952 # 80010684 +80005a44: 00731863 bne x6,x7,80005a54 +80005a48: 00800413 addi x8,x0,8 +80005a4c: 00000493 addi x9,x0,0 +80005a50: 0640006f jal x0,80005ab4 +80005a54: 0000b397 auipc x7,0xb +80005a58: c7f38393 addi x7,x7,-897 # 800106d3 +80005a5c: 00731863 bne x6,x7,80005a6c +80005a60: 00800413 addi x8,x0,8 +80005a64: 00000493 addi x9,x0,0 +80005a68: 04c0006f jal x0,80005ab4 +80005a6c: 0000b397 auipc x7,0xb +80005a70: d6238393 addi x7,x7,-670 # 800107ce +80005a74: 00731863 bne x6,x7,80005a84 +80005a78: 00800413 addi x8,x0,8 +80005a7c: 00100493 addi x9,x0,1 +80005a80: 0340006f jal x0,80005ab4 +80005a84: 0000b397 auipc x7,0xb +80005a88: e4638393 addi x7,x7,-442 # 800108ca +80005a8c: 00731863 bne x6,x7,80005a9c +80005a90: 00800413 addi x8,x0,8 +80005a94: 00200493 addi x9,x0,2 +80005a98: 01c0006f jal x0,80005ab4 +80005a9c: 0340006f jal x0,80005ad0 + +80005aa0 : +80005aa0: 00900413 addi x8,x0,9 +80005aa4: 0000a817 auipc x16,0xa +80005aa8: f3c80813 addi x16,x16,-196 # 8000f9e0 +80005aac: 00882023 sw x8,0(x16) +80005ab0: 0300006f jal x0,80005ae0 + +80005ab4 : +80005ab4: 0000a817 auipc x16,0xa +80005ab8: f2c80813 addi x16,x16,-212 # 8000f9e0 +80005abc: 00882023 sw x8,0(x16) +80005ac0: 0000a817 auipc x16,0xa +80005ac4: f2480813 addi x16,x16,-220 # 8000f9e4 +80005ac8: 00982023 sw x9,0(x16) +80005acc: 0140006f jal x0,80005ae0 + +80005ad0 : +80005ad0: 0000a817 auipc x16,0xa +80005ad4: f1080813 addi x16,x16,-240 # 8000f9e0 +80005ad8: 00082023 sw x0,0(x16) +80005adc: 0040006f jal x0,80005ae0 + +80005ae0 : +80005ae0: 0002a303 lw x6,0(x5) +80005ae4: 10622423 sw x6,264(x4) # 108 +80005ae8: 00035383 lhu x7,0(x6) +80005aec: 0033f413 andi x8,x7,3 +80005af0: 00300493 addi x9,x0,3 +80005af4: 00941863 bne x8,x9,80005b04 +80005af8: 00235403 lhu x8,2(x6) +80005afc: 01041413 slli x8,x8,0x10 +80005b00: 0083e3b3 or x7,x7,x8 +80005b04: 10722023 sw x7,256(x4) # 100 +80005b08: 0042a303 lw x6,4(x5) +80005b0c: 12622023 sw x6,288(x4) # 120 + +80005b10 : +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 40e50513 addi x10,x10,1038 # 8000ff2e +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 40750513 addi x10,x10,1031 # 8000ff67 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 00000013 addi x0,x0,0 +80005b8c: 00000013 addi x0,x0,0 +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 47e50513 addi x10,x10,1150 # 8001001e +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 + +80005bc8 : +80005bc8: 0000a517 auipc x10,0xa +80005bcc: e0852503 lw x10,-504(x10) # 8000f9d0 +80005bd0: 0001c097 auipc x1,0x1c +80005bd4: 994080e7 jalr x1,-1644(x1) # 80021564 + +80005bd8 : +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 45050513 addi x10,x10,1104 # 80010030 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: ca852503 lw x10,-856(x10) # 8000f8b0 +80005c10: 00300593 addi x11,x0,3 +80005c14: 52b50c63 beq x10,x11,8000614c +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000a517 auipc x10,0xa +80005c24: 41250513 addi x10,x10,1042 # 80010032 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001c097 auipc x1,0x1c +80005c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80005c48: 0000a517 auipc x10,0xa +80005c4c: d6852503 lw x10,-664(x10) # 8000f9b0 +80005c50: 02000593 addi x11,x0,32 +80005c54: 00357613 andi x12,x10,3 +80005c58: 00300693 addi x13,x0,3 +80005c5c: 00d60463 beq x12,x13,80005c64 +80005c60: 01000593 addi x11,x0,16 +80005c64: 3f4010ef jal x1,80007058 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: d9850513 addi x10,x10,-616 # 8000fa18 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 38650513 addi x10,x10,902 # 80010046 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 0000a517 auipc x10,0xa +80005cec: cd052503 lw x10,-816(x10) # 8000f9b8 +80005cf0: 02000593 addi x11,x0,32 +80005cf4: 364010ef jal x1,80007058 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000a517 auipc x10,0xa +80005d04: d1850513 addi x10,x10,-744 # 8000fa18 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 0000b517 auipc x10,0xb +80005d44: d3d50513 addi x10,x10,-707 # 80010a7d +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001c097 auipc x1,0x1c +80005d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80005d68: 0000a517 auipc x10,0xa +80005d6c: b4852503 lw x10,-1208(x10) # 8000f8b0 +80005d70: 00050663 beq x10,x0,80005d7c +80005d74: 00300593 addi x11,x0,3 +80005d78: 04b51063 bne x10,x11,80005db8 +80005d7c: 07800593 addi x11,x0,120 +80005d80: 0000a617 auipc x12,0xa +80005d84: c9860613 addi x12,x12,-872 # 8000fa18 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 00b60023 sb x11,0(x12) +80005da4: 00160613 addi x12,x12,1 +80005da8: 0000a517 auipc x10,0xa +80005dac: c0c52503 lw x10,-1012(x10) # 8000f9b4 +80005db0: 324010ef jal x1,800070d4 +80005db4: 1180006f jal x0,80005ecc + +80005db8 : +80005db8: 00100593 addi x11,x0,1 +80005dbc: 04b50863 beq x10,x11,80005e0c +80005dc0: 00400593 addi x11,x0,4 +80005dc4: 08b50a63 beq x10,x11,80005e58 +80005dc8: 00500593 addi x11,x0,5 +80005dcc: 0cb50463 beq x10,x11,80005e94 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000b517 auipc x10,0xb +80005de4: db350513 addi x10,x10,-589 # 80010b93 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0001b097 auipc x1,0x1b +80005e04: 764080e7 jalr x1,1892(x1) # 80021564 +80005e08: 1000006f jal x0,80005f08 + +80005e0c : +80005e0c: 06600593 addi x11,x0,102 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: bf860613 addi x12,x12,-1032 # 8000fa18 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: b6c52503 lw x10,-1172(x10) # 8000f9b4 +80005e50: 284010ef jal x1,800070d4 +80005e54: 0780006f jal x0,80005ecc + +80005e58 : +80005e58: 07600593 addi x11,x0,118 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000a617 auipc x12,0xa +80005e64: bb860613 addi x12,x12,-1096 # 8000fa18 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 00b60023 sb x11,0(x12) +80005e84: 00160613 addi x12,x12,1 +80005e88: 0000a517 auipc x10,0xa +80005e8c: b2c52503 lw x10,-1236(x10) # 8000f9b4 +80005e90: 244010ef jal x1,800070d4 + +80005e94 : +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: bd650513 addi x10,x10,-1066 # 80010a76 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80005ec8: 0400006f jal x0,80005f08 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000a517 auipc x10,0xa +80005ee4: b3850513 addi x10,x10,-1224 # 8000fa18 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 + +80005f08 : +80005f08: 00000013 addi x0,x0,0 +80005f0c: 00000013 addi x0,x0,0 +80005f10: 00000013 addi x0,x0,0 +80005f14: 00000013 addi x0,x0,0 +80005f18: 00000013 addi x0,x0,0 +80005f1c: 00000013 addi x0,x0,0 +80005f20: 0000b517 auipc x10,0xb +80005f24: b6e50513 addi x10,x10,-1170 # 80010a8e +80005f28: 00000013 addi x0,x0,0 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0001b097 auipc x1,0x1b +80005f44: 624080e7 jalr x1,1572(x1) # 80021564 +80005f48: 0000a517 auipc x10,0xa +80005f4c: 96852503 lw x10,-1688(x10) # 8000f8b0 +80005f50: 00100593 addi x11,x0,1 +80005f54: 00b51c63 bne x10,x11,80005f6c +80005f58: 0000a517 auipc x10,0xa +80005f5c: a6852503 lw x10,-1432(x10) # 8000f9c0 +80005f60: 02000593 addi x11,x0,32 +80005f64: 0f4010ef jal x1,80007058 +80005f68: 0140006f jal x0,80005f7c + +80005f6c : +80005f6c: 0000a517 auipc x10,0xa +80005f70: a5452503 lw x10,-1452(x10) # 8000f9c0 +80005f74: 02000593 addi x11,x0,32 +80005f78: 0e0010ef jal x1,80007058 + +80005f7c : +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000a517 auipc x10,0xa +80005f84: a9850513 addi x10,x10,-1384 # 8000fa18 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: a3052503 lw x10,-1488(x10) # 8000f9d8 +80005fb0: 08051e63 bne x10,x0,8000604c +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: ae550513 addi x10,x10,-1307 # 80010aa5 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0001b097 auipc x1,0x1b +80005fe4: 584080e7 jalr x1,1412(x1) # 80021564 +80005fe8: 0000a517 auipc x10,0xa +80005fec: 8c852503 lw x10,-1848(x10) # 8000f8b0 +80005ff0: 00100593 addi x11,x0,1 +80005ff4: 00b51c63 bne x10,x11,8000600c +80005ff8: 0000a517 auipc x10,0xa +80005ffc: 9d052503 lw x10,-1584(x10) # 8000f9c8 +80006000: 02000593 addi x11,x0,32 +80006004: 054010ef jal x1,80007058 +80006008: 0140006f jal x0,8000601c + +8000600c : +8000600c: 0000a517 auipc x10,0xa +80006010: 9bc52503 lw x10,-1604(x10) # 8000f9c8 +80006014: 02000593 addi x11,x0,32 +80006018: 040010ef jal x1,80007058 + +8000601c : +8000601c: 00000013 addi x0,x0,0 +80006020: 0000a517 auipc x10,0xa +80006024: 9f850513 addi x10,x10,-1544 # 8000fa18 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 5bd0006f jal x0,80006e04 + +8000604c : +8000604c: 00100593 addi x11,x0,1 +80006050: 06b51e63 bne x10,x11,800060cc + +80006054 : +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000b517 auipc x10,0xb +80006064: a5c50513 addi x10,x10,-1444 # 80010abc +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 0000a517 auipc x10,0xa +8000608c: 94052503 lw x10,-1728(x10) # 8000f9c8 +80006090: 02000593 addi x11,x0,32 +80006094: 7c5000ef jal x1,80007058 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000a517 auipc x10,0xa +800060a4: 97850513 addi x10,x10,-1672 # 8000fa18 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 53d0006f jal x0,80006e04 + +800060cc : +800060cc: 00000013 addi x0,x0,0 +800060d0: 00000013 addi x0,x0,0 +800060d4: 00000013 addi x0,x0,0 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000b517 auipc x10,0xb +800060e4: a3a50513 addi x10,x10,-1478 # 80010b1a +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 0000a517 auipc x10,0xa +8000610c: 8c052503 lw x10,-1856(x10) # 8000f9c8 +80006110: 02000593 addi x11,x0,32 +80006114: 745000ef jal x1,80007058 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000a517 auipc x10,0xa +80006124: 8f850513 addi x10,x10,-1800 # 8000fa18 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 4bd0006f jal x0,80006e04 + +8000614c : +8000614c: 0000a417 auipc x8,0xa +80006150: 89442403 lw x8,-1900(x8) # 8000f9e0 +80006154: 00900493 addi x9,x0,9 +80006158: 0a940c63 beq x8,x9,80006210 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: a5f50513 addi x10,x10,-1441 # 80010bbf +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: a4b50513 addi x10,x10,-1461 # 80010beb +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 0000a817 auipc x16,0xa +800061cc: 82080813 addi x16,x16,-2016 # 8000f9e8 +800061d0: 00082503 lw x10,0(x16) +800061d4: 0001b097 auipc x1,0x1b +800061d8: 390080e7 jalr x1,912(x1) # 80021564 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000a517 auipc x10,0xa +800061e4: e5050513 addi x10,x10,-432 # 80010030 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 280404e3 beq x8,x0,80006c90 +8000620c: 3400006f jal x0,8000654c + +80006210 : +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000b517 auipc x10,0xb +80006224: 9db50513 addi x10,x10,-1573 # 80010bfb +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00009517 auipc x10,0x9 +8000624c: 78052503 lw x10,1920(x10) # 8000f9c8 +80006250: 02000593 addi x11,x0,32 +80006254: 605000ef jal x1,80007058 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 00009517 auipc x10,0x9 +80006264: 7b850513 addi x10,x10,1976 # 8000fa18 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000b517 auipc x10,0xb +800062a4: 98650513 addi x10,x10,-1658 # 80010c26 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 00009517 auipc x10,0x9 +800062cc: 6f852503 lw x10,1784(x10) # 8000f9c0 +800062d0: 02000593 addi x11,x0,32 +800062d4: 585000ef jal x1,80007058 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 00009517 auipc x10,0x9 +800062e4: 73850513 addi x10,x10,1848 # 8000fa18 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00009317 auipc x6,0x9 +8000630c: 6b832303 lw x6,1720(x6) # 8000f9c0 +80006310: 00009397 auipc x7,0x9 +80006314: 6b83a383 lw x7,1720(x7) # 8000f9c8 +80006318: 10736a63 bltu x6,x7,8000642c + +8000631c : +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 93550513 addi x10,x10,-1739 # 80010c55 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0000b517 auipc x10,0xb +80006364: 95d50513 addi x10,x10,-1699 # 80010cbd +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0001b097 auipc x1,0x1b +80006384: 1e4080e7 jalr x1,484(x1) # 80021564 +80006388: 00009317 auipc x6,0x9 +8000638c: 63832303 lw x6,1592(x6) # 8000f9c0 +80006390: 00009397 auipc x7,0x9 +80006394: 6383a383 lw x7,1592(x7) # 8000f9c8 +80006398: 40730533 sub x10,x6,x7 +8000639c: 02000593 addi x11,x0,32 +800063a0: 4b9000ef jal x1,80007058 +800063a4: 00000013 addi x0,x0,0 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 00009517 auipc x10,0x9 +800063c4: 65850513 addi x10,x10,1624 # 8000fa18 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 00000013 addi x0,x0,0 +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 8e450513 addi x10,x10,-1820 # 80010ce4 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 1dd0006f jal x0,80006e04 + +8000642c : +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 84150513 addi x10,x10,-1983 # 80010c81 +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00000013 addi x0,x0,0 +8000646c: 00000013 addi x0,x0,0 +80006470: 00000013 addi x0,x0,0 +80006474: 00000013 addi x0,x0,0 +80006478: 00000013 addi x0,x0,0 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000b517 auipc x10,0xb +80006484: 83d50513 addi x10,x10,-1987 # 80010cbd +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001b097 auipc x1,0x1b +800064a4: 0c4080e7 jalr x1,196(x1) # 80021564 +800064a8: 00009317 auipc x6,0x9 +800064ac: 52032303 lw x6,1312(x6) # 8000f9c8 +800064b0: 00009397 auipc x7,0x9 +800064b4: 5103a383 lw x7,1296(x7) # 8000f9c0 +800064b8: 40730533 sub x10,x6,x7 +800064bc: 02000593 addi x11,x0,32 +800064c0: 399000ef jal x1,80007058 +800064c4: 00000013 addi x0,x0,0 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 00009517 auipc x10,0x9 +800064e4: 53850513 addi x10,x10,1336 # 8000fa18 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 00000013 addi x0,x0,0 +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 8ac50513 addi x10,x10,-1876 # 80010dcc +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 0bd0006f jal x0,80006e04 + +8000654c : +8000654c: 00000013 addi x0,x0,0 +80006550: 00000013 addi x0,x0,0 +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000b517 auipc x10,0xb +80006564: 95350513 addi x10,x10,-1709 # 80010eb3 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001b097 auipc x1,0x1b +80006584: fe4080e7 jalr x1,-28(x1) # 80021564 +80006588: 00009517 auipc x10,0x9 +8000658c: 45c52503 lw x10,1116(x10) # 8000f9e4 +80006590: 04050a63 beq x10,x0,800065e4 +80006594: 00100593 addi x11,x0,1 +80006598: 08b50663 beq x10,x11,80006624 +8000659c: 00200593 addi x11,x0,2 +800065a0: 0cb50263 beq x10,x11,80006664 +800065a4: 00300593 addi x11,x0,3 +800065a8: 0eb50e63 beq x10,x11,800066a4 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 92f50513 addi x10,x10,-1745 # 80010eef +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 1000006f jal x0,800066e0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 8cd50513 addi x10,x10,-1843 # 80010ecd +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0c00006f jal x0,800066e0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 89550513 addi x10,x10,-1899 # 80010ed5 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0800006f jal x0,800066e0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 85d50513 addi x10,x10,-1955 # 80010edd +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 +800066a0: 0400006f jal x0,800066e0 + +800066a4 : +800066a4: 00000013 addi x0,x0,0 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 82650513 addi x10,x10,-2010 # 80010ee6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 + +800066e0 : +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00000013 addi x0,x0,0 +800066ec: 00000013 addi x0,x0,0 +800066f0: 00000013 addi x0,x0,0 +800066f4: 00000013 addi x0,x0,0 +800066f8: 00000013 addi x0,x0,0 +800066fc: 00000013 addi x0,x0,0 +80006700: 0000a517 auipc x10,0xa +80006704: 7f850513 addi x10,x10,2040 # 80010ef8 +80006708: 00000013 addi x0,x0,0 +8000670c: 00000013 addi x0,x0,0 +80006710: 00000013 addi x0,x0,0 +80006714: 00000013 addi x0,x0,0 +80006718: 00000013 addi x0,x0,0 +8000671c: 00000013 addi x0,x0,0 +80006720: 0001b097 auipc x1,0x1b +80006724: e44080e7 jalr x1,-444(x1) # 80021564 +80006728: 00009517 auipc x10,0x9 +8000672c: 2b852503 lw x10,696(x10) # 8000f9e0 +80006730: 00100593 addi x11,x0,1 +80006734: 06b50863 beq x10,x11,800067a4 +80006738: 00200593 addi x11,x0,2 +8000673c: 0ab50463 beq x10,x11,800067e4 +80006740: 00300593 addi x11,x0,3 +80006744: 0eb50063 beq x10,x11,80006824 +80006748: 00400593 addi x11,x0,4 +8000674c: 10b50c63 beq x10,x11,80006864 +80006750: 00500593 addi x11,x0,5 +80006754: 14b50863 beq x10,x11,800068a4 +80006758: 00600593 addi x11,x0,6 +8000675c: 18b50463 beq x10,x11,800068e4 +80006760: 00700593 addi x11,x0,7 +80006764: 1cb50063 beq x10,x11,80006924 +80006768: 00800593 addi x11,x0,8 +8000676c: 1eb50c63 beq x10,x11,80006964 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 8cf50513 addi x10,x10,-1841 # 8001104f +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 2000006f jal x0,800069a0 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000a517 auipc x10,0xa +800067c4: 75250513 addi x10,x10,1874 # 80010f12 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1c00006f jal x0,800069a0 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000a517 auipc x10,0xa +80006804: 74350513 addi x10,x10,1859 # 80010f43 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1800006f jal x0,800069a0 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000a517 auipc x10,0xa +80006844: 72350513 addi x10,x10,1827 # 80010f63 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1400006f jal x0,800069a0 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000a517 auipc x10,0xa +80006884: 70150513 addi x10,x10,1793 # 80010f81 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 1000006f jal x0,800069a0 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000a517 auipc x10,0xa +800068c4: 6e050513 addi x10,x10,1760 # 80010fa0 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0c00006f jal x0,800069a0 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000a517 auipc x10,0xa +80006904: 6c850513 addi x10,x10,1736 # 80010fc8 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0800006f jal x0,800069a0 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000a517 auipc x10,0xa +80006944: 6b450513 addi x10,x10,1716 # 80010ff4 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 0400006f jal x0,800069a0 + +80006964 : +80006964: 00000013 addi x0,x0,0 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000a517 auipc x10,0xa +80006984: 6a050513 addi x10,x10,1696 # 80011020 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 + +800069a0 : +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: 69e50513 addi x10,x10,1694 # 8001105e +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00009517 auipc x10,0x9 +800069ec: fe052503 lw x10,-32(x10) # 8000f9c8 +800069f0: 02000593 addi x11,x0,32 +800069f4: 664000ef jal x1,80007058 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 00009517 auipc x10,0x9 +80006a04: 01850513 addi x10,x10,24 # 8000fa18 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00000013 addi x0,x0,0 +80006a2c: 00000013 addi x0,x0,0 +80006a30: 00000013 addi x0,x0,0 +80006a34: 00000013 addi x0,x0,0 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: 63550513 addi x10,x10,1589 # 80011075 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: f5852503 lw x10,-168(x10) # 8000f9c0 +80006a70: 02000593 addi x11,x0,32 +80006a74: 5e4000ef jal x1,80007058 +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 00009517 auipc x10,0x9 +80006a84: f9850513 addi x10,x10,-104 # 8000fa18 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: f3852503 lw x10,-200(x10) # 8000f9e0 +80006ab0: 00200593 addi x11,x0,2 +80006ab4: 08b51463 bne x10,x11,80006b3c +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 5cc50513 addi x10,x10,1484 # 8001108c +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: ee052503 lw x10,-288(x10) # 8000f9c8 +80006af0: 284000ef jal x1,80006d74 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 +80006afc: 00000013 addi x0,x0,0 +80006b00: 0000a517 auipc x10,0xa +80006b04: 5a350513 addi x10,x10,1443 # 800110a3 +80006b08: 00000013 addi x0,x0,0 +80006b0c: 00000013 addi x0,x0,0 +80006b10: 00000013 addi x0,x0,0 +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0001b097 auipc x1,0x1b +80006b24: a44080e7 jalr x1,-1468(x1) # 80021564 +80006b28: 00009517 auipc x10,0x9 +80006b2c: e9852503 lw x10,-360(x10) # 8000f9c0 +80006b30: 244000ef jal x1,80006d74 +80006b34: 0001b097 auipc x1,0x1b +80006b38: a30080e7 jalr x1,-1488(x1) # 80021564 + +80006b3c : +80006b3c: 00000097 auipc x1,0x0 +80006b40: 314080e7 jalr x1,788(x1) # 80006e50 +80006b44: 00009517 auipc x10,0x9 +80006b48: e9c52503 lw x10,-356(x10) # 8000f9e0 +80006b4c: 00100593 addi x11,x0,1 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000a517 auipc x10,0xa +80006b64: 5b950513 addi x10,x10,1465 # 80011119 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 27c0006f jal x0,80006e04 +80006b8c: 00200593 addi x11,x0,2 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000a517 auipc x10,0xa +80006ba4: 64f50513 addi x10,x10,1615 # 800111ef +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 23c0006f jal x0,80006e04 +80006bcc: 00300593 addi x11,x0,3 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000a517 auipc x10,0xa +80006be4: 70250513 addi x10,x10,1794 # 800112e2 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1fc0006f jal x0,80006e04 +80006c0c: 00400593 addi x11,x0,4 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000a517 auipc x10,0xa +80006c24: 7bd50513 addi x10,x10,1981 # 800113dd +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 1bc0006f jal x0,80006e04 +80006c4c: 00500593 addi x11,x0,5 +80006c50: 02b51e63 bne x10,x11,80006c8c +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: 86450513 addi x10,x10,-1948 # 800114c4 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 17c0006f jal x0,80006e04 +80006c8c: 1780006f jal x0,80006e04 + +80006c90 : +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: 43150513 addi x10,x10,1073 # 800110d1 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00009617 auipc x12,0x9 +80006ccc: d3062603 lw x12,-720(x12) # 8000f9f8 +80006cd0: 00000013 addi x0,x0,0 +80006cd4: 00000013 addi x0,x0,0 +80006cd8: 00000013 addi x0,x0,0 +80006cdc: 00000013 addi x0,x0,0 +80006ce0: 00009517 auipc x10,0x9 +80006ce4: 3da50513 addi x10,x10,986 # 800100ba +80006ce8: 00000013 addi x0,x0,0 +80006cec: 00000013 addi x0,x0,0 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 0001b097 auipc x1,0x1b +80006d04: 864080e7 jalr x1,-1948(x1) # 80021564 +80006d08: 00065503 lhu x10,0(x12) +80006d0c: 01000593 addi x11,x0,16 +80006d10: 00357413 andi x8,x10,3 +80006d14: 00300493 addi x9,x0,3 +80006d18: 00941a63 bne x8,x9,80006d2c +80006d1c: 00265403 lhu x8,2(x12) +80006d20: 01041413 slli x8,x8,0x10 +80006d24: 00856533 or x10,x10,x8 +80006d28: 02000593 addi x11,x0,32 +80006d2c: 32c000ef jal x1,80007058 +80006d30: 00000013 addi x0,x0,0 +80006d34: 00000013 addi x0,x0,0 +80006d38: 00000013 addi x0,x0,0 +80006d3c: 00000013 addi x0,x0,0 +80006d40: 00009517 auipc x10,0x9 +80006d44: cd850513 addi x10,x10,-808 # 8000fa18 +80006d48: 00000013 addi x0,x0,0 +80006d4c: 00000013 addi x0,x0,0 +80006d50: 00000013 addi x0,x0,0 +80006d54: 00000013 addi x0,x0,0 +80006d58: 00000013 addi x0,x0,0 +80006d5c: 00000013 addi x0,x0,0 +80006d60: 0001b097 auipc x1,0x1b +80006d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80006d68: 00000097 auipc x1,0x0 +80006d6c: 0e8080e7 jalr x1,232(x1) # 80006e50 +80006d70: 0940006f jal x0,80006e04 + +80006d74 : +80006d74: 02054263 blt x10,x0,80006d98 + +80006d78 : +80006d78: 01800593 addi x11,x0,24 +80006d7c: 04b55463 bge x10,x11,80006dc4 +80006d80: 00009597 auipc x11,0x9 +80006d84: cc058593 addi x11,x11,-832 # 8000fa40 +80006d88: 00251613 slli x12,x10,0x2 +80006d8c: 00c585b3 add x11,x11,x12 +80006d90: 0005a503 lw x10,0(x11) +80006d94: 00008067 jalr x0,0(x1) + +80006d98 : +80006d98: 00100593 addi x11,x0,1 +80006d9c: 01f59593 slli x11,x11,0x1f +80006da0: 00b54533 xor x10,x10,x11 +80006da4: 01000593 addi x11,x0,16 +80006da8: 00b55e63 bge x10,x11,80006dc4 +80006dac: 00009597 auipc x11,0x9 +80006db0: cf458593 addi x11,x11,-780 # 8000faa0 +80006db4: 00251613 slli x12,x10,0x2 +80006db8: 00c585b3 add x11,x11,x12 +80006dbc: 0005a503 lw x10,0(x11) +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 00009517 auipc x10,0x9 +80006de4: 0fe50513 addi x10,x10,254 # 8000fede +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 00008067 jalr x0,0(x1) + +80006e04 : +80006e04: 00000013 addi x0,x0,0 +80006e08: 00000013 addi x0,x0,0 +80006e0c: 00000013 addi x0,x0,0 +80006e10: 00000013 addi x0,x0,0 +80006e14: 00000013 addi x0,x0,0 +80006e18: 00000013 addi x0,x0,0 +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d5250513 addi x10,x10,-686 # 80010b72 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 + +80006e48 : +80006e48: 0001a097 auipc x1,0x1a +80006e4c: 77c080e7 jalr x1,1916(x1) # 800215c4 + +80006e50 : +80006e50: 00009617 auipc x12,0x9 +80006e54: ba060613 addi x12,x12,-1120 # 8000f9f0 +80006e58: 00162023 sw x1,0(x12) +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 27b50513 addi x10,x10,635 # 800100db +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00009517 auipc x10,0x9 +80006e8c: b7052503 lw x10,-1168(x10) # 8000f9f8 +80006e90: 02000593 addi x11,x0,32 +80006e94: 1c4000ef jal x1,80007058 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: b7850513 addi x10,x10,-1160 # 8000fa18 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00000013 addi x0,x0,0 +80006ecc: 00000013 addi x0,x0,0 +80006ed0: 00000013 addi x0,x0,0 +80006ed4: 00000013 addi x0,x0,0 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 20b50513 addi x10,x10,523 # 800100eb +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00009517 auipc x10,0x9 +80006f0c: af852503 lw x10,-1288(x10) # 8000fa00 +80006f10: 02000593 addi x11,x0,32 +80006f14: 144000ef jal x1,80007058 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: af850513 addi x10,x10,-1288 # 8000fa18 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00000013 addi x0,x0,0 +80006f4c: 00000013 addi x0,x0,0 +80006f50: 00000013 addi x0,x0,0 +80006f54: 00000013 addi x0,x0,0 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 19b50513 addi x10,x10,411 # 800100fb +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00009517 auipc x10,0x9 +80006f8c: a8052503 lw x10,-1408(x10) # 8000fa08 +80006f90: 02000593 addi x11,x0,32 +80006f94: 0c4000ef jal x1,80007058 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: a7850513 addi x10,x10,-1416 # 8000fa18 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00000013 addi x0,x0,0 +80006fcc: 00000013 addi x0,x0,0 +80006fd0: 00000013 addi x0,x0,0 +80006fd4: 00000013 addi x0,x0,0 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 12b50513 addi x10,x10,299 # 8001010b +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009517 auipc x10,0x9 +8000700c: a0852503 lw x10,-1528(x10) # 8000fa10 +80007010: 02000593 addi x11,x0,32 +80007014: 044000ef jal x1,80007058 +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009517 auipc x10,0x9 +80007024: 9f850513 addi x10,x10,-1544 # 8000fa18 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 0001a097 auipc x1,0x1a +80007044: 524080e7 jalr x1,1316(x1) # 80021564 +80007048: 00009617 auipc x12,0x9 +8000704c: 9a860613 addi x12,x12,-1624 # 8000f9f0 +80007050: 00062083 lw x1,0(x12) +80007054: 00008067 jalr x0,0(x1) + +80007058 : +80007058: 00000013 addi x0,x0,0 +8000705c: 00000013 addi x0,x0,0 +80007060: 00009617 auipc x12,0x9 +80007064: 9b860613 addi x12,x12,-1608 # 8000fa18 +80007068: 00000013 addi x0,x0,0 +8000706c: 00000013 addi x0,x0,0 +80007070: 00000013 addi x0,x0,0 +80007074: 00000013 addi x0,x0,0 +80007078: 00000013 addi x0,x0,0 +8000707c: 00000013 addi x0,x0,0 +80007080: 03000693 addi x13,x0,48 +80007084: 00d60023 sb x13,0(x12) +80007088: 07800693 addi x13,x0,120 +8000708c: 00d600a3 sb x13,1(x12) +80007090: 00260613 addi x12,x12,2 +80007094: 00058693 addi x13,x11,0 + +80007098 : +80007098: ffc68693 addi x13,x13,-4 +8000709c: 00d55733 srl x14,x10,x13 +800070a0: 00f77713 andi x14,x14,15 +800070a4: 00a00793 addi x15,x0,10 +800070a8: 00f74663 blt x14,x15,800070b4 +800070ac: 05770713 addi x14,x14,87 +800070b0: 0080006f jal x0,800070b8 + +800070b4 : +800070b4: 03070713 addi x14,x14,48 + +800070b8 : +800070b8: 00e60023 sb x14,0(x12) +800070bc: 00160613 addi x12,x12,1 +800070c0: fc069ce3 bne x13,x0,80007098 +800070c4: 00a00693 addi x13,x0,10 +800070c8: 00d60023 sb x13,0(x12) +800070cc: 000600a3 sb x0,1(x12) +800070d0: 00008067 jalr x0,0(x1) + +800070d4 : +800070d4: 00a00693 addi x13,x0,10 +800070d8: 02d54663 blt x10,x13,80007104 +800070dc: ff650513 addi x10,x10,-10 +800070e0: 03100713 addi x14,x0,49 +800070e4: 00d54c63 blt x10,x13,800070fc +800070e8: ff650513 addi x10,x10,-10 +800070ec: 03200713 addi x14,x0,50 +800070f0: 00d54663 blt x10,x13,800070fc +800070f4: ff650513 addi x10,x10,-10 +800070f8: 03300713 addi x14,x0,51 +800070fc: 00e60023 sb x14,0(x12) +80007100: 00160613 addi x12,x12,1 +80007104: 03050513 addi x10,x10,48 +80007108: 00a60023 sb x10,0(x12) +8000710c: 00a00693 addi x13,x0,10 +80007110: 00d600a3 sb x13,1(x12) +80007114: 00060123 sb x0,2(x12) +80007118: 00008067 jalr x0,0(x1) +8000711c: 00000013 addi x0,x0,0 +80007120: 00000013 addi x0,x0,0 +80007124: 00000013 addi x0,x0,0 +80007128: 00000013 addi x0,x0,0 +8000712c: 00000013 addi x0,x0,0 +80007130: 00000013 addi x0,x0,0 +80007134: 00000013 addi x0,x0,0 +80007138: 00000013 addi x0,x0,0 +8000713c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 23838393 addi x7,x7,568 # 80005240 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 21c38393 addi x7,x7,540 # 80005240 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 20438393 addi x7,x7,516 # 80005240 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1f038393 addi x7,x7,496 # 80005240 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1e438393 addi x7,x7,484 # 80005240 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 1b038393 addi x7,x7,432 # 80005240 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 40030313 addi x6,x6,1024 # 8000449c +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 19838393 addi x7,x7,408 # 80005240 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3e830313 addi x6,x6,1000 # 8000449c +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 18038393 addi x7,x7,384 # 80005240 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3d030313 addi x6,x6,976 # 8000449c +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 16838393 addi x7,x7,360 # 80005240 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 26c78793 addi x15,x15,620 # 800044ac +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 15010113 addi x2,x2,336 # 800115f0 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 06018193 addi x3,x3,96 # 80005540 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010b9b .word 0x80010b9b +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 15828293 addi x5,x5,344 # 80020700 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 13828293 addi x5,x5,312 # 80020700 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkb-zip-00.elf.objdump b/riscv-tests/rv32-Zbkb-zip-00.elf.objdump new file mode 100644 index 0000000..0a526c8 --- /dev/null +++ b/riscv-tests/rv32-Zbkb-zip-00.elf.objdump @@ -0,0 +1,6248 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-zip-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkb/Zbkb-zip-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c40 memsz 0x00003c40 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c00 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000124e0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016500 80016500 00017500 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000086a 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000079 00000000 00000000 00018ee5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f5e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018f81 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018f98 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000087 00000000 00000000 00018fc0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019047 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016500 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccJoazFe.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b0 +80002040 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zbkb_zip_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b1 +80004590 l .data 00000000 Zbkb_zip_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b2 +800045c0 l .data 00000000 Zbkb_zip_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b3 +800045f0 l .data 00000000 Zbkb_zip_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b4 +80002080 l .text.rvtest 00000000 failedtest_x14_x13 +80004620 l .data 00000000 Zbkb_zip_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b5 +80004650 l .data 00000000 Zbkb_zip_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b6 +80004680 l .data 00000000 Zbkb_zip_cg_cp_rs1_b6_str +80000154 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b7 +800046b0 l .data 00000000 Zbkb_zip_cg_cp_rs1_b7_str +80000178 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b8 +800046e0 l .data 00000000 Zbkb_zip_cg_cp_rs1_b8_str +8000019c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b9 +80004710 l .data 00000000 Zbkb_zip_cg_cp_rs1_b9_str +800001c0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b10 +80004741 l .data 00000000 Zbkb_zip_cg_cp_rs1_b10_str +800001e8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b11 +80004773 l .data 00000000 Zbkb_zip_cg_cp_rs1_b11_str +8000020c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b12 +800047a5 l .data 00000000 Zbkb_zip_cg_cp_rs1_b12_str +80000238 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b13 +80002058 l .text.rvtest 00000000 failedtest_x8_x7 +800047d7 l .data 00000000 Zbkb_zip_cg_cp_rs1_b13_str +8000025c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b14 +80004809 l .data 00000000 Zbkb_zip_cg_cp_rs1_b14_str +80000280 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b15 +8000483b l .data 00000000 Zbkb_zip_cg_cp_rs1_b15_str +800002a4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b16 +8000486d l .data 00000000 Zbkb_zip_cg_cp_rs1_b16_str +800002c8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b17 +8000489f l .data 00000000 Zbkb_zip_cg_cp_rs1_b17_str +800002ec l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b18 +800048d1 l .data 00000000 Zbkb_zip_cg_cp_rs1_b18_str +80000310 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b19 +80004903 l .data 00000000 Zbkb_zip_cg_cp_rs1_b19_str +80000334 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b20 +80004935 l .data 00000000 Zbkb_zip_cg_cp_rs1_b20_str +80000358 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b21 +80004967 l .data 00000000 Zbkb_zip_cg_cp_rs1_b21_str +8000037c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b22 +80004999 l .data 00000000 Zbkb_zip_cg_cp_rs1_b22_str +800003a0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b23 +800049cb l .data 00000000 Zbkb_zip_cg_cp_rs1_b23_str +800003c8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b24 +800049fd l .data 00000000 Zbkb_zip_cg_cp_rs1_b24_str +800003ec l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b25 +80004a2f l .data 00000000 Zbkb_zip_cg_cp_rs1_b25_str +80000414 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b26 +80004a61 l .data 00000000 Zbkb_zip_cg_cp_rs1_b26_str +80000438 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b27 +80004a93 l .data 00000000 Zbkb_zip_cg_cp_rs1_b27_str +8000045c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b28 +80004ac5 l .data 00000000 Zbkb_zip_cg_cp_rs1_b28_str +80000480 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b29 +80004af7 l .data 00000000 Zbkb_zip_cg_cp_rs1_b29_str +800004a4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b30 +80004b29 l .data 00000000 Zbkb_zip_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_b31 +80004b5b l .data 00000000 Zbkb_zip_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b0 +80004b8d l .data 00000000 Zbkb_zip_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b1 +80004bbd l .data 00000000 Zbkb_zip_cg_cp_rd_b1_str +80000538 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b2 +80004bed l .data 00000000 Zbkb_zip_cg_cp_rd_b2_str +8000055c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b3 +80004c1d l .data 00000000 Zbkb_zip_cg_cp_rd_b3_str +80000580 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b4 +80004c4d l .data 00000000 Zbkb_zip_cg_cp_rd_b4_str +800005a4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b5 +80004c7d l .data 00000000 Zbkb_zip_cg_cp_rd_b5_str +800005c8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b6 +80004cad l .data 00000000 Zbkb_zip_cg_cp_rd_b6_str +800005f4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b7 +80004cdd l .data 00000000 Zbkb_zip_cg_cp_rd_b7_str +80000618 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b8 +80004d0d l .data 00000000 Zbkb_zip_cg_cp_rd_b8_str +8000063c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b9 +80004d3d l .data 00000000 Zbkb_zip_cg_cp_rd_b9_str +80000660 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b10 +80004d6d l .data 00000000 Zbkb_zip_cg_cp_rd_b10_str +80000684 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b11 +80004d9e l .data 00000000 Zbkb_zip_cg_cp_rd_b11_str +800006a8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b12 +80004dcf l .data 00000000 Zbkb_zip_cg_cp_rd_b12_str +800006cc l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b13 +80004e00 l .data 00000000 Zbkb_zip_cg_cp_rd_b13_str +800006f0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b14 +80004e31 l .data 00000000 Zbkb_zip_cg_cp_rd_b14_str +80000714 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b15 +80004e62 l .data 00000000 Zbkb_zip_cg_cp_rd_b15_str +80000738 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b16 +80004e93 l .data 00000000 Zbkb_zip_cg_cp_rd_b16_str +80000760 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b17 +80004ec4 l .data 00000000 Zbkb_zip_cg_cp_rd_b17_str +80000788 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b18 +80004ef5 l .data 00000000 Zbkb_zip_cg_cp_rd_b18_str +800007ac l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b19 +80004f26 l .data 00000000 Zbkb_zip_cg_cp_rd_b19_str +800007d0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b20 +80004f57 l .data 00000000 Zbkb_zip_cg_cp_rd_b20_str +800007f4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b21 +80004f88 l .data 00000000 Zbkb_zip_cg_cp_rd_b21_str +80000818 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b22 +80004fb9 l .data 00000000 Zbkb_zip_cg_cp_rd_b22_str +8000083c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b23 +80004fea l .data 00000000 Zbkb_zip_cg_cp_rd_b23_str +80000860 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b24 +8000501b l .data 00000000 Zbkb_zip_cg_cp_rd_b24_str +80000884 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b25 +8000504c l .data 00000000 Zbkb_zip_cg_cp_rd_b25_str +800008a8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b26 +8000507d l .data 00000000 Zbkb_zip_cg_cp_rd_b26_str +800008cc l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b27 +800050ae l .data 00000000 Zbkb_zip_cg_cp_rd_b27_str +800008f0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b28 +800050df l .data 00000000 Zbkb_zip_cg_cp_rd_b28_str +80000914 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b29 +80005110 l .data 00000000 Zbkb_zip_cg_cp_rd_b29_str +80000938 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b30 +80005141 l .data 00000000 Zbkb_zip_cg_cp_rd_b30_str +8000095c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rd_b31 +80005172 l .data 00000000 Zbkb_zip_cg_cp_rd_b31_str +80000980 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x0 +800051a3 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x0_str +800009a4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x1 +800051db l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x1_str +800009c8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x2 +80005213 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x2_str +800009ec l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x80000000 +8000524b l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x80000000_str +80000a10 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x80000001 +8000528a l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x80000001_str +80000a34 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x7fffffff +800052c9 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x7fffffff_str +80000a58 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x7ffffffe +80005308 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x7ffffffe_str +80000a7c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0xffffffff +80005347 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0xffffffff_str +80000aa0 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0xfffffffe +80005386 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0xfffffffe_str +80000ac4 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x5bbc8872 +800053c5 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x5bbc8872_str +80000ae8 l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0xaaaaaaaa +80005404 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b0c l .text.rvtest 00000000 Zbkb_zip_cg_cp_rs1_edges_0x55555555 +80005443 l .data 00000000 Zbkb_zip_cg_cp_rs1_edges_0x55555555_str +80000b30 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b0 +80005482 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b0_str +80000b54 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b1 +800054b7 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b1_str +80000b78 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b2 +800054ec l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b2_str +80000b9c l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b3 +80005521 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b3_str +80000bc8 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b4 +80005556 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b4_str +80000bec l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b5 +8000558b l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b5_str +80000c10 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b6 +800055c0 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b6_str +80000c3c l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b7 +800055f5 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b7_str +80000c60 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b8 +8000562a l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b8_str +80000c84 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b9 +8000565f l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b9_str +80000ca8 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b10 +80005694 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b10_str +80000ccc l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b11 +800056ca l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b11_str +80000cf0 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b12 +80005700 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b12_str +80000d14 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b13 +80005736 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b13_str +80000d38 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b14 +8000576c l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b14_str +80000d60 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b15 +800057a2 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b15_str +80000d88 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b16 +800057d8 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b16_str +80000dac l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b17 +8000580e l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b17_str +80000dd0 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b18 +80005844 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b18_str +80000df4 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b19 +8000587a l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b19_str +80000e18 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b20 +800058b0 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b20_str +80000e3c l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b21 +800058e6 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b21_str +80000e60 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b22 +8000591c l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b22_str +80000e84 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b23 +80005952 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b23_str +80000ea8 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b24 +80005989 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b24_str +80000ecc l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b25 +800059c0 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b25_str +80000ef0 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b26 +800059f7 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b26_str +80000f14 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b27 +80005a2e l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b27_str +80000f38 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b28 +80005a65 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b28_str +80000f5c l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b29 +80005a9c l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b29_str +80000f80 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b30 +80005ad3 l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b30_str +80000fa4 l .text.rvtest 00000000 Zbkb_zip_cg_cmp_rd_rs1_b31 +80005b0a l .data 00000000 Zbkb_zip_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fd0 l .text.rvtest 00000000 exit_Mcleanup +80000fd4 l .text.rvtest 00000000 resto_Medeleg +80000fdc l .text.rvtest 00000000 resto_Msatp +80000fe0 l .text.rvtest 00000000 resto_Mscratch +80000fe8 l .text.rvtest 00000000 resto_Mxtvec +80000ffc l .text.rvtest 00000000 resto_Mtramp +80001000 l .text.rvtest 00000000 resto_Mloop +80001018 l .text.rvtest 00000000 check_trap_sig_overflow +800012b0 l .text.rvtest 00000000 trap_sig_overflow +80001150 l .text.rvtest 00000000 check_trap_sig_offset +800061cd l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006205 l .data 00000000 begin_debugstr +80006265 l .data 00000000 trap_sig_overflowstr +80006e10 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007a78 l .data 00000000 trap_sigptr +80007a70 l .data 00000000 final_trap_sig_offset +80001214 l .text.rvtest 00000000 check_abort_test +800020a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800063b9 l .data 00000000 trap_sig_offset_mismatch +80001230 l .text.rvtest 00000000 exit_cleanup +800012e4 l .text.rvtest 00000000 abort_test +80006227 l .data 00000000 abortstr +80006194 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80001380 l .text.rvtest 00000000 trap_Mhandler +800014a0 l .text.rvtest 00000000 rvtest_Mendtest +800014c4 l .text.rvtest 00000000 common_Mhandler +80001530 l .text.rvtest 00000000 spcl_M2mmode_test +8000153c l .text.rvtest 00000000 spcl_Mchk4alt +8000154c l .text.rvtest 00000000 spcl_Mchk4ecall +80001544 l .text.rvtest 00000000 spcl_Mparam_chk +80001fd0 l .text.rvtest 00000000 Mrtn2mmode +80001ad4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001558 l .text.rvtest 00000000 Mgoto_mchk +8000155c l .text.rvtest 00000000 tsbi_Mdispatch +80001584 l .text.rvtest 00000000 tsbi_Mgoto_mode +80001574 l .text.rvtest 00000000 tsbi_Mecall_test +800015f0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d40 l .text.rvtest 00000000 resto_Mrtn +800015b0 l .text.rvtest 00000000 tsbi_Mgoto_m +800015c0 l .text.rvtest 00000000 tsbi_Mgoto_s +800015dc l .text.rvtest 00000000 tsbi_Mgoto_u +800015ec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80001770 l .text.rvtest 00000000 tsbi_instr_table +80001620 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001634 l .text.rvtest 00000000 found_instr +80001678 l .text.rvtest 00000000 tsbi_instr_not_found +80001664 l .text.rvtest 00000000 tsbi_instr_rtn +80007847 l .data 00000000 tsbi_instr_not_found_str +80003b58 l .text.rvtest 00000000 failedtest_hex_to_str +80005cb8 l .data 00000000 ascii_buffer +800062ce l .data 00000000 newlinestr +80001af0 l .text.rvtest 00000000 Mxcpt_sig_sv +80001adc l .text.rvtest 00000000 Mint_sig_sv +80001af0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005c98 l .data 00000000 saved_xepc +800164dc l .data 00000000 sig_end_canary +80001b88 l .text.rvtest 00000000 sv_Mvect +800063d0 l .data 00000000 sv_Mvect_str +80001c2c l .text.rvtest 00000000 sv_Mcause +800064d2 l .data 00000000 sv_Mcause_str +80001d60 l .text.rvtest 00000000 common_Mint_handler +80001c54 l .text.rvtest 00000000 common_Mexcpt_handler +80001c60 l .text.rvtest 00000000 vmem_adj_Mepc +80001cb4 l .text.rvtest 00000000 sv_Mepc +80001c88 l .text.rvtest 00000000 code_adj_Mepc +80001cb0 l .text.rvtest 00000000 adj_Mepc +80001c9c l .text.rvtest 00000000 data_adj_Mepc +800065cd l .data 00000000 sv_Mepc_str +80001cd4 l .text.rvtest 00000000 skpsv_Mepc +80001cfc l .text.rvtest 00000000 adj_Mepc_rtn +80001d08 l .text.rvtest 00000000 skp_adj_Mepc +80001d0c l .text.rvtest 00000000 sv_Mtval +800066c0 l .data 00000000 sv_Mtval_str +80001d2c l .text.rvtest 00000000 skp_Mtval +80001d38 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001d98 l .text.rvtest 00000000 spcl_Mhandler +80001d74 l .text.rvtest 00000000 sv_Mip +80006833 l .data 00000000 sv_Mip_str +80001db4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001dcc l .text.rvtest 00000000 spcl_Mdispatch +80001dd0 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001ed0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002020 l .text.rvtest 00000000 rtn_fm_mmode +8000200c l .text.rvtest 00000000 from_hs_u +80001ffc l .text.rvtest 00000000 from_vs +80005b50 l .data 00000000 begin_failure_scratch +800020dc l .text.rvtest 00000000 failedtest_saveregs +8000214c l .text.rvtest 00000000 failedtest_saveresults +80005b50 l .data 00000000 failure_type +800022ec l .text.rvtest 00000000 failedtest_saveresults_trap +8000215c l .text.rvtest 00000000 failedtest_saveresults_int +80002274 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ac l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +800025e0 l .text.rvtest 00000000 failedtest_saveresults_common +80005c78 l .data 00000000 failure_diag_type +80005c88 l .data 00000000 trap_diag_fail_str_ptr +800025a0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005c80 l .data 00000000 trap_diag_subtype +800025b4 l .text.rvtest 00000000 trap_diag_field_identified +800067b7 l .data 00000000 sv_Mtval2_str +800067f5 l .data 00000000 sv_Mtinst_str +80006410 l .data 00000000 sv_Svect_str +80006510 l .data 00000000 sv_Scause_str +80006609 l .data 00000000 sv_Sepc_str +800066fd l .data 00000000 sv_Stval_str +8000686e l .data 00000000 sv_Sip_str +80006450 l .data 00000000 sv_Hvect_str +8000654e l .data 00000000 sv_Hcause_str +80006645 l .data 00000000 sv_Hepc_str +8000673a l .data 00000000 sv_Htval_str +800068a9 l .data 00000000 sv_Hip_str +80006491 l .data 00000000 sv_Vvect_str +8000658d l .data 00000000 sv_Vcause_str +80006682 l .data 00000000 sv_Vepc_str +80006778 l .data 00000000 sv_Vtval_str +800068e5 l .data 00000000 sv_Vip_str +80006922 l .data 00000000 Mclr_Mext_int_str +80006971 l .data 00000000 Mclr_Sext_int_str +80006a6c l .data 00000000 Sclr_Sext_int_str +80006b68 l .data 00000000 Hclr_Sext_int_str +800025d0 l .text.rvtest 00000000 trap_diag_generic_report +80005c84 l .data 00000000 trap_diag_mode +80002610 l .text.rvtest 00000000 failedtest_report +80002610 l .text.rvtest 00000000 print_failstr +80002688 l .text.rvtest 00000000 print_testnamestr +800062bc l .data 00000000 testnamestr +800026c8 l .text.rvtest 00000000 print_failure_test_name_str +80005c70 l .data 00000000 failure_string_ptr +800026d8 l .text.rvtest 00000000 print_newline_str +80002c4c l .text.rvtest 00000000 failedtest_report_trap_detailed +800062d0 l .data 00000000 inststr +80005c50 l .data 00000000 failing_instruction +800062e4 l .data 00000000 addrstr +80005c58 l .data 00000000 failing_addr +80006d1b l .data 00000000 regstr +800028b8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005c54 l .data 00000000 failing_reg +80003bd4 l .text.rvtest 00000000 failedtest_dec_to_str +800029cc l .text.rvtest 00000000 failedtest_report_print_regstr +8000290c l .text.rvtest 00000000 failedtest_report_fpreg +80002958 l .text.rvtest 00000000 failedtest_report_vecreg +80002994 l .text.rvtest 00000000 failedtest_report_vxsat +80006e31 l .data 00000000 fflagsstr +80002a08 l .text.rvtest 00000000 failedtest_report_after_reg +80006d14 l .data 00000000 vxsatstr +80006d2c l .data 00000000 badvalstr +80002a6c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005c60 l .data 00000000 failing_value +80002a7c l .text.rvtest 00000000 failedtest_report_badval_done +80002b4c l .text.rvtest 00000000 failedtest_report_diag +80006d43 l .data 00000000 expvalstr +80002b0c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005c68 l .data 00000000 expected_value +80002b1c l .text.rvtest 00000000 failedtest_report_expval_done +80003904 l .text.rvtest 00000000 failedtest_report_end +80002bcc l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b54 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006d5a l .data 00000000 failure_diag_bad_instr_str +80006db8 l .data 00000000 failure_diag_bad_ptr_str +80002d10 l .text.rvtest 00000000 trap_report_offset_mismatch +80006e5d l .data 00000000 trap_diag_header_str +80006e89 l .data 00000000 trap_diag_origstr_label +80003790 l .text.rvtest 00000000 trap_report_generic +8000304c l .text.rvtest 00000000 trap_report_field_mismatch +80006e99 l .data 00000000 trap_diag_expected_offset_str +80006ec4 l .data 00000000 trap_diag_actual_offset_str +80002f2c l .text.rvtest 00000000 trap_report_missing_traps +80002e1c l .text.rvtest 00000000 trap_report_extra_traps +80006ef3 l .data 00000000 trap_diag_extra_traps_str +80006f5b l .data 00000000 trap_diag_diff_bytes_str +80006f82 l .data 00000000 trap_diag_extra_next_step_str +80006f1f l .data 00000000 trap_diag_missing_traps_str +8000706a l .data 00000000 trap_diag_missing_next_step_str +80007151 l .data 00000000 trap_diag_handler_mode_str +800030e4 l .text.rvtest 00000000 trap_mode_m +80003124 l .text.rvtest 00000000 trap_mode_s +80003164 l .text.rvtest 00000000 trap_mode_h +800031a4 l .text.rvtest 00000000 trap_mode_v +8000718d l .data 00000000 trap_diag_mode_unknown_str +800031e0 l .text.rvtest 00000000 trap_mode_print +8000716b l .data 00000000 trap_diag_mode_m_str +80007173 l .data 00000000 trap_diag_mode_s_str +8000717b l .data 00000000 trap_diag_mode_hs_str +80007184 l .data 00000000 trap_diag_mode_vs_str +80007196 l .data 00000000 trap_diag_field_str +800032a4 l .text.rvtest 00000000 trap_field_vect +800032e4 l .text.rvtest 00000000 trap_field_cause +80003324 l .text.rvtest 00000000 trap_field_epc +80003364 l .text.rvtest 00000000 trap_field_tval +800033a4 l .text.rvtest 00000000 trap_field_ip +800033e4 l .text.rvtest 00000000 trap_field_tval2 +80003424 l .text.rvtest 00000000 trap_field_tinst +80003464 l .text.rvtest 00000000 trap_field_intid +800072ed l .data 00000000 trap_diag_field_unknown_str +800034a0 l .text.rvtest 00000000 trap_field_print +800071b0 l .data 00000000 trap_diag_field_vect_str +800071e1 l .data 00000000 trap_diag_field_cause_str +80007201 l .data 00000000 trap_diag_field_epc_str +8000721f l .data 00000000 trap_diag_field_tval_str +8000723e l .data 00000000 trap_diag_field_ip_str +80007266 l .data 00000000 trap_diag_field_tval2_str +80007292 l .data 00000000 trap_diag_field_tinst_str +800072be l .data 00000000 trap_diag_field_intid_str +800072fc l .data 00000000 trap_diag_expected_str +80007313 l .data 00000000 trap_diag_actual_str +8000363c l .text.rvtest 00000000 trap_field_not_cause +8000732a l .data 00000000 trap_diag_expected_cause_name_str +80003874 l .text.rvtest 00000000 trap_cause_to_str +80007341 l .data 00000000 trap_diag_actual_cause_name_str +8000363c l .text.rvtest 00000000 trap_field_not_epc +80003950 l .text.rvtest 00000000 failedtest_print_csr_context +800073b7 l .data 00000000 trap_diag_hint_vect_str +8000748d l .data 00000000 trap_diag_hint_cause_str +80007580 l .data 00000000 trap_diag_hint_epc_str +8000767b l .data 00000000 trap_diag_hint_tval_str +80007762 l .data 00000000 trap_diag_hint_ip_str +8000736f l .data 00000000 trap_diag_generic_str +80006358 l .data 00000000 xepcinstrstr +80003898 l .text.rvtest 00000000 trap_cause_interrupt +80003878 l .text.rvtest 00000000 trap_cause_exception +800038c4 l .text.rvtest 00000000 trap_cause_unknown +80005ce0 l .data 00000000 trap_excpt_name_tbl +80005d40 l .data 00000000 trap_int_name_tbl +8000617e l .data 00000000 trap_cause_unknown_str +80003948 l .text.rvtest 00000000 failedtest_terminate +80005c90 l .data 00000000 csr_context_ret_addr +80006379 l .data 00000000 mepcstr +80006389 l .data 00000000 mcausestr +80005ca0 l .data 00000000 saved_xcause +80006399 l .data 00000000 mtvalstr +80005ca8 l .data 00000000 saved_xtval +800063a9 l .data 00000000 mstatusstr +80005cb0 l .data 00000000 saved_xstatus +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bb4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bb8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007890 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006e39 l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005ce0 l .data 00000000 end_failure_scratch +80005d80 l .data 00000000 trap_excpt_name_0 +80005da0 l .data 00000000 trap_excpt_name_1 +80005dba l .data 00000000 trap_excpt_name_2 +80005dcf l .data 00000000 trap_excpt_name_3 +80005ddb l .data 00000000 trap_excpt_name_4 +80005df4 l .data 00000000 trap_excpt_name_5 +80005e07 l .data 00000000 trap_excpt_name_6 +80005e25 l .data 00000000 trap_excpt_name_7 +80005e3d l .data 00000000 trap_excpt_name_8 +80005e5b l .data 00000000 trap_excpt_name_9 +80005e79 l .data 00000000 trap_excpt_name_10 +80005e98 l .data 00000000 trap_excpt_name_11 +80005eb6 l .data 00000000 trap_excpt_name_12 +80005ece l .data 00000000 trap_excpt_name_13 +80005edf l .data 00000000 trap_excpt_name_14 +80005eee l .data 00000000 trap_excpt_name_15 +80005f04 l .data 00000000 trap_excpt_name_16 +80005f11 l .data 00000000 trap_excpt_name_17 +80005f20 l .data 00000000 trap_excpt_name_18 +80005f30 l .data 00000000 trap_excpt_name_19 +80005f40 l .data 00000000 trap_excpt_name_20 +80005f5e l .data 00000000 trap_excpt_name_21 +80005f75 l .data 00000000 trap_excpt_name_22 +80005f8a l .data 00000000 trap_excpt_name_23 +80005fa6 l .data 00000000 trap_int_name_0 +80005fbe l .data 00000000 trap_int_name_1 +80005fdd l .data 00000000 trap_int_name_2 +80006004 l .data 00000000 trap_int_name_3 +80006020 l .data 00000000 trap_int_name_4 +80006038 l .data 00000000 trap_int_name_5 +80006054 l .data 00000000 trap_int_name_6 +80006078 l .data 00000000 trap_int_name_7 +80006091 l .data 00000000 trap_int_name_8 +800060a9 l .data 00000000 trap_int_name_9 +800060c8 l .data 00000000 trap_int_name_10 +800060ef l .data 00000000 trap_int_name_11 +8000610b l .data 00000000 trap_int_name_12 +80006130 l .data 00000000 trap_int_name_13 +8000614c l .data 00000000 trap_int_name_14 +80006165 l .data 00000000 trap_int_name_15 +80006325 l .data 00000000 xepcstr +800069c3 l .data 00000000 Mclr_Vext_int_str +80006a1d l .data 00000000 Sclr_Mext_int_str +80006abe l .data 00000000 Sclr_Vext_int_str +80006b18 l .data 00000000 Hclr_Mext_int_str +80006bbb l .data 00000000 Hclr_Vext_int_str +80006c16 l .data 00000000 Vclr_Mext_int_str +80006c66 l .data 00000000 Vclr_Sext_int_str +80006cb9 l .data 00000000 Vclr_Vext_int_str +80007358 l .data 00000000 trap_diag_curr_xepc_str +800164e0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800164e0 g .data 00000000 rvtest_sig_end +800014d8 g .text.rvtest 00000000 common_Mentry +80001018 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007890 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fc0 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007890 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +8000788b g .data 00000000 rvtest_data_end +80000fc0 g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016600 g .tohost 00000000 fromhost +80016500 g .tohost 00000000 tohost +80001270 g .text.rvtest 00000000 rvtest_fail_summary +80001300 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x23909d3b +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zbkb_zip_cg_cp_rs1_b0: + zip x25, x0 # perform operation +80000048: 08f01c93 zip x25,x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_zip_cg_cp_rs1_b0, Zbkb_zip_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01920863 beq x4,x25,80000060 +80000054: 7ed012ef jal x5,80002040 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x30291ada +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zbkb_zip_cg_cp_rs1_b1: + zip x11, x1 # perform operation +8000006c: 08f09593 zip x11,x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_zip_cg_cp_rs1_b1, Zbkb_zip_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 00b20863 beq x4,x11,80000084 +80000078: 7c9012ef jal x5,80002040 +8000007c: 8000006c .word 0x8000006c +80000080: 80004590 .word 0x80004590 +80000084: 00410113 addi x2,x2,4 + + mv x11, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010593 addi x11,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0d797d1b +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zbkb_zip_cg_cp_rs1_b2: + zip x25, x2 # perform operation +80000094: 08f11c93 zip x25,x2 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_zip_cg_cp_rs1_b2, Zbkb_zip_cg_cp_rs1_b2_str) +80000098: 0005a203 lw x4,0(x11) +8000009c: 01920863 beq x4,x25,800000ac +800000a0: 7a1012ef jal x5,80002040 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c0 .word 0x800045c0 +800000ac: 00458593 addi x11,x11,4 + + mv x24, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018c13 addi x24,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x854373f1 +800000b4: 000c2183 lw x3,0(x24) +800000b8: 004c0c13 addi x24,x24,4 + +800000bc : +Zbkb_zip_cg_cp_rs1_b3: + zip x20, x3 # perform operation +800000bc: 08f19a13 zip x20,x3 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_zip_cg_cp_rs1_b3, Zbkb_zip_cg_cp_rs1_b3_str) +800000c0: 0005a203 lw x4,0(x11) +800000c4: 01420863 beq x4,x20,800000d4 +800000c8: 779012ef jal x5,80002040 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f0 .word 0x800045f0 +800000d4: 00458593 addi x11,x11,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000d8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xb2da2483 +800000e0: 000c2203 lw x4,0(x24) +800000e4: 004c0c13 addi x24,x24,4 + +800000e8 : +Zbkb_zip_cg_cp_rs1_b4: + zip x9, x4 # perform operation +800000e8: 08f21493 zip x9,x4 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zbkb_zip_cg_cp_rs1_b4, Zbkb_zip_cg_cp_rs1_b4_str) +800000ec: 0005a683 lw x13,0(x11) +800000f0: 00968863 beq x13,x9,80000100 +800000f4: 78d0176f jal x14,80002080 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004620 .word 0x80004620 +80000100: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x44abb08f +80000104: 000c2283 lw x5,0(x24) +80000108: 004c0c13 addi x24,x24,4 + +8000010c : +Zbkb_zip_cg_cp_rs1_b5: + zip x10, x5 # perform operation +8000010c: 08f29513 zip x10,x5 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zbkb_zip_cg_cp_rs1_b5, Zbkb_zip_cg_cp_rs1_b5_str) +80000110: 0005a683 lw x13,0(x11) +80000114: 00a68863 beq x13,x10,80000124 +80000118: 7690176f jal x14,80002080 +8000011c: 8000010c .word 0x8000010c +80000120: 80004650 .word 0x80004650 +80000124: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x44eb493f +80000128: 000c2303 lw x6,0(x24) +8000012c: 004c0c13 addi x24,x24,4 + +80000130 : +Zbkb_zip_cg_cp_rs1_b6: + zip x30, x6 # perform operation +80000130: 08f31f13 zip x30,x6 + # Check if x30 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x30, Zbkb_zip_cg_cp_rs1_b6, Zbkb_zip_cg_cp_rs1_b6_str) +80000134: 0005a683 lw x13,0(x11) +80000138: 01e68863 beq x13,x30,80000148 +8000013c: 7450176f jal x14,80002080 +80000140: 80000130 .word 0x80000130 +80000144: 80004680 .word 0x80004680 +80000148: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x969b2f1c +8000014c: 000c2383 lw x7,0(x24) +80000150: 004c0c13 addi x24,x24,4 + +80000154 : +Zbkb_zip_cg_cp_rs1_b7: + zip x20, x7 # perform operation +80000154: 08f39a13 zip x20,x7 + # Check if x20 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x20, Zbkb_zip_cg_cp_rs1_b7, Zbkb_zip_cg_cp_rs1_b7_str) +80000158: 0005a683 lw x13,0(x11) +8000015c: 01468863 beq x13,x20,8000016c +80000160: 7210176f jal x14,80002080 +80000164: 80000154 .word 0x80000154 +80000168: 800046b0 .word 0x800046b0 +8000016c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x079d05fd +80000170: 000c2403 lw x8,0(x24) +80000174: 004c0c13 addi x24,x24,4 + +80000178 : +Zbkb_zip_cg_cp_rs1_b8: + zip x20, x8 # perform operation +80000178: 08f41a13 zip x20,x8 + # Check if x20 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x20, Zbkb_zip_cg_cp_rs1_b8, Zbkb_zip_cg_cp_rs1_b8_str) +8000017c: 0005a683 lw x13,0(x11) +80000180: 01468863 beq x13,x20,80000190 +80000184: 6fd0176f jal x14,80002080 +80000188: 80000178 .word 0x80000178 +8000018c: 800046e0 .word 0x800046e0 +80000190: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x3d2741bd +80000194: 000c2483 lw x9,0(x24) +80000198: 004c0c13 addi x24,x24,4 + +8000019c : +Zbkb_zip_cg_cp_rs1_b9: + zip x5, x9 # perform operation +8000019c: 08f49293 zip x5,x9 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zbkb_zip_cg_cp_rs1_b9, Zbkb_zip_cg_cp_rs1_b9_str) +800001a0: 0005a683 lw x13,0(x11) +800001a4: 00568863 beq x13,x5,800001b4 +800001a8: 6d90176f jal x14,80002080 +800001ac: 8000019c .word 0x8000019c +800001b0: 80004710 .word 0x80004710 +800001b4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x03cc1c0f +800001b8: 000c2503 lw x10,0(x24) +800001bc: 004c0c13 addi x24,x24,4 + +800001c0 : +Zbkb_zip_cg_cp_rs1_b10: + zip x28, x10 # perform operation +800001c0: 08f51e13 zip x28,x10 + # Check if x28 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x28, Zbkb_zip_cg_cp_rs1_b10, Zbkb_zip_cg_cp_rs1_b10_str) +800001c4: 0005a683 lw x13,0(x11) +800001c8: 01c68863 beq x13,x28,800001d8 +800001cc: 6b50176f jal x14,80002080 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80004741 .word 0x80004741 +800001d8: 00458593 addi x11,x11,4 + + mv x26, x11 # switch signature pointer register to avoid conflict with test +800001dc: 00058d13 addi x26,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x0828a943 +800001e0: 000c2583 lw x11,0(x24) +800001e4: 004c0c13 addi x24,x24,4 + +800001e8 : +Zbkb_zip_cg_cp_rs1_b11: + zip x1, x11 # perform operation +800001e8: 08f59093 zip x1,x11 + # Check if x1 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x1, Zbkb_zip_cg_cp_rs1_b11, Zbkb_zip_cg_cp_rs1_b11_str) +800001ec: 000d2683 lw x13,0(x26) +800001f0: 00168863 beq x13,x1,80000200 +800001f4: 68d0176f jal x14,80002080 +800001f8: 800001e8 .word 0x800001e8 +800001fc: 80004773 .word 0x80004773 +80000200: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xc19f7e9d +80000204: 000c2603 lw x12,0(x24) +80000208: 004c0c13 addi x24,x24,4 + +8000020c : +Zbkb_zip_cg_cp_rs1_b12: + zip x4, x12 # perform operation +8000020c: 08f61213 zip x4,x12 + # Check if x4 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x4, Zbkb_zip_cg_cp_rs1_b12, Zbkb_zip_cg_cp_rs1_b12_str) +80000210: 000d2683 lw x13,0(x26) +80000214: 00468863 beq x13,x4,80000224 +80000218: 6690176f jal x14,80002080 +8000021c: 8000020c .word 0x8000020c +80000220: 800047a5 .word 0x800047a5 +80000224: 004d0d13 addi x26,x26,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000228: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000022c: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x13ac0fac +80000230: 000c2683 lw x13,0(x24) +80000234: 004c0c13 addi x24,x24,4 + +80000238 : +Zbkb_zip_cg_cp_rs1_b13: + zip x3, x13 # perform operation +80000238: 08f69193 zip x3,x13 + # Check if x3 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x3, Zbkb_zip_cg_cp_rs1_b13, Zbkb_zip_cg_cp_rs1_b13_str) +8000023c: 000d2383 lw x7,0(x26) +80000240: 00338863 beq x7,x3,80000250 +80000244: 6150146f jal x8,80002058 +80000248: 80000238 .word 0x80000238 +8000024c: 800047d7 .word 0x800047d7 +80000250: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xcf8134e7 +80000254: 000c2703 lw x14,0(x24) +80000258: 004c0c13 addi x24,x24,4 + +8000025c : +Zbkb_zip_cg_cp_rs1_b14: + zip x2, x14 # perform operation +8000025c: 08f71113 zip x2,x14 + # Check if x2 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x2, Zbkb_zip_cg_cp_rs1_b14, Zbkb_zip_cg_cp_rs1_b14_str) +80000260: 000d2383 lw x7,0(x26) +80000264: 00238863 beq x7,x2,80000274 +80000268: 5f10146f jal x8,80002058 +8000026c: 8000025c .word 0x8000025c +80000270: 80004809 .word 0x80004809 +80000274: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x49947232 +80000278: 000c2783 lw x15,0(x24) +8000027c: 004c0c13 addi x24,x24,4 + +80000280 : +Zbkb_zip_cg_cp_rs1_b15: + zip x29, x15 # perform operation +80000280: 08f79e93 zip x29,x15 + # Check if x29 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x29, Zbkb_zip_cg_cp_rs1_b15, Zbkb_zip_cg_cp_rs1_b15_str) +80000284: 000d2383 lw x7,0(x26) +80000288: 01d38863 beq x7,x29,80000298 +8000028c: 5cd0146f jal x8,80002058 +80000290: 80000280 .word 0x80000280 +80000294: 8000483b .word 0x8000483b +80000298: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xd21f1f53 +8000029c: 000c2803 lw x16,0(x24) +800002a0: 004c0c13 addi x24,x24,4 + +800002a4 : +Zbkb_zip_cg_cp_rs1_b16: + zip x28, x16 # perform operation +800002a4: 08f81e13 zip x28,x16 + # Check if x28 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x28, Zbkb_zip_cg_cp_rs1_b16, Zbkb_zip_cg_cp_rs1_b16_str) +800002a8: 000d2383 lw x7,0(x26) +800002ac: 01c38863 beq x7,x28,800002bc +800002b0: 5a90146f jal x8,80002058 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 8000486d .word 0x8000486d +800002bc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x837773f2 +800002c0: 000c2883 lw x17,0(x24) +800002c4: 004c0c13 addi x24,x24,4 + +800002c8 : +Zbkb_zip_cg_cp_rs1_b17: + zip x0, x17 # perform operation +800002c8: 08f89013 zip x0,x17 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zbkb_zip_cg_cp_rs1_b17, Zbkb_zip_cg_cp_rs1_b17_str) +800002cc: 000d2383 lw x7,0(x26) +800002d0: 00038863 beq x7,x0,800002e0 +800002d4: 5850146f jal x8,80002058 +800002d8: 800002c8 .word 0x800002c8 +800002dc: 8000489f .word 0x8000489f +800002e0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xb8bf706e +800002e4: 000c2903 lw x18,0(x24) +800002e8: 004c0c13 addi x24,x24,4 + +800002ec : +Zbkb_zip_cg_cp_rs1_b18: + zip x4, x18 # perform operation +800002ec: 08f91213 zip x4,x18 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zbkb_zip_cg_cp_rs1_b18, Zbkb_zip_cg_cp_rs1_b18_str) +800002f0: 000d2383 lw x7,0(x26) +800002f4: 00438863 beq x7,x4,80000304 +800002f8: 5610146f jal x8,80002058 +800002fc: 800002ec .word 0x800002ec +80000300: 800048d1 .word 0x800048d1 +80000304: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xed70b146 +80000308: 000c2983 lw x19,0(x24) +8000030c: 004c0c13 addi x24,x24,4 + +80000310 : +Zbkb_zip_cg_cp_rs1_b19: + zip x2, x19 # perform operation +80000310: 08f99113 zip x2,x19 + # Check if x2 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x2, Zbkb_zip_cg_cp_rs1_b19, Zbkb_zip_cg_cp_rs1_b19_str) +80000314: 000d2383 lw x7,0(x26) +80000318: 00238863 beq x7,x2,80000328 +8000031c: 53d0146f jal x8,80002058 +80000320: 80000310 .word 0x80000310 +80000324: 80004903 .word 0x80004903 +80000328: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x9e7cc339 +8000032c: 000c2a03 lw x20,0(x24) +80000330: 004c0c13 addi x24,x24,4 + +80000334 : +Zbkb_zip_cg_cp_rs1_b20: + zip x10, x20 # perform operation +80000334: 08fa1513 zip x10,x20 + # Check if x10 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x10, Zbkb_zip_cg_cp_rs1_b20, Zbkb_zip_cg_cp_rs1_b20_str) +80000338: 000d2383 lw x7,0(x26) +8000033c: 00a38863 beq x7,x10,8000034c +80000340: 5190146f jal x8,80002058 +80000344: 80000334 .word 0x80000334 +80000348: 80004935 .word 0x80004935 +8000034c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x243973f0 +80000350: 000c2a83 lw x21,0(x24) +80000354: 004c0c13 addi x24,x24,4 + +80000358 : +Zbkb_zip_cg_cp_rs1_b21: + zip x1, x21 # perform operation +80000358: 08fa9093 zip x1,x21 + # Check if x1 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x1, Zbkb_zip_cg_cp_rs1_b21, Zbkb_zip_cg_cp_rs1_b21_str) +8000035c: 000d2383 lw x7,0(x26) +80000360: 00138863 beq x7,x1,80000370 +80000364: 4f50146f jal x8,80002058 +80000368: 80000358 .word 0x80000358 +8000036c: 80004967 .word 0x80004967 +80000370: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x3a403f88 +80000374: 000c2b03 lw x22,0(x24) +80000378: 004c0c13 addi x24,x24,4 + +8000037c : +Zbkb_zip_cg_cp_rs1_b22: + zip x5, x22 # perform operation +8000037c: 08fb1293 zip x5,x22 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zbkb_zip_cg_cp_rs1_b22, Zbkb_zip_cg_cp_rs1_b22_str) +80000380: 000d2383 lw x7,0(x26) +80000384: 00538863 beq x7,x5,80000394 +80000388: 4d10146f jal x8,80002058 +8000038c: 8000037c .word 0x8000037c +80000390: 80004999 .word 0x80004999 +80000394: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x83dda29c +80000398: 000c2b83 lw x23,0(x24) +8000039c: 004c0c13 addi x24,x24,4 + +800003a0 : +Zbkb_zip_cg_cp_rs1_b23: + zip x0, x23 # perform operation +800003a0: 08fb9013 zip x0,x23 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zbkb_zip_cg_cp_rs1_b23, Zbkb_zip_cg_cp_rs1_b23_str) +800003a4: 000d2383 lw x7,0(x26) +800003a8: 00038863 beq x7,x0,800003b8 +800003ac: 4ad0146f jal x8,80002058 +800003b0: 800003a0 .word 0x800003a0 +800003b4: 800049cb .word 0x800049cb +800003b8: 004d0d13 addi x26,x26,4 + + mv x18, x24 # switch data pointer register to avoid conflict with test +800003bc: 000c0913 addi x18,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x2a66f392 +800003c0: 00092c03 lw x24,0(x18) +800003c4: 00490913 addi x18,x18,4 + +800003c8 : +Zbkb_zip_cg_cp_rs1_b24: + zip x31, x24 # perform operation +800003c8: 08fc1f93 zip x31,x24 + # Check if x31 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x31, Zbkb_zip_cg_cp_rs1_b24, Zbkb_zip_cg_cp_rs1_b24_str) +800003cc: 000d2383 lw x7,0(x26) +800003d0: 01f38863 beq x7,x31,800003e0 +800003d4: 4850146f jal x8,80002058 +800003d8: 800003c8 .word 0x800003c8 +800003dc: 800049fd .word 0x800049fd +800003e0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x716daea1 +800003e4: 00092c83 lw x25,0(x18) +800003e8: 00490913 addi x18,x18,4 + +800003ec : +Zbkb_zip_cg_cp_rs1_b25: + zip x14, x25 # perform operation +800003ec: 08fc9713 zip x14,x25 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zbkb_zip_cg_cp_rs1_b25, Zbkb_zip_cg_cp_rs1_b25_str) +800003f0: 000d2383 lw x7,0(x26) +800003f4: 00e38863 beq x7,x14,80000404 +800003f8: 4610146f jal x8,80002058 +800003fc: 800003ec .word 0x800003ec +80000400: 80004a2f .word 0x80004a2f +80000404: 004d0d13 addi x26,x26,4 + + mv x31, x26 # switch signature pointer register to avoid conflict with test +80000408: 000d0f93 addi x31,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x32d94895 +8000040c: 00092d03 lw x26,0(x18) +80000410: 00490913 addi x18,x18,4 + +80000414 : +Zbkb_zip_cg_cp_rs1_b26: + zip x27, x26 # perform operation +80000414: 08fd1d93 zip x27,x26 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_zip_cg_cp_rs1_b26, Zbkb_zip_cg_cp_rs1_b26_str) +80000418: 000fa383 lw x7,0(x31) +8000041c: 01b38863 beq x7,x27,8000042c +80000420: 4390146f jal x8,80002058 +80000424: 80000414 .word 0x80000414 +80000428: 80004a61 .word 0x80004a61 +8000042c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x562b6d9e +80000430: 00092d83 lw x27,0(x18) +80000434: 00490913 addi x18,x18,4 + +80000438 : +Zbkb_zip_cg_cp_rs1_b27: + zip x6, x27 # perform operation +80000438: 08fd9313 zip x6,x27 + # Check if x6 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x6, Zbkb_zip_cg_cp_rs1_b27, Zbkb_zip_cg_cp_rs1_b27_str) +8000043c: 000fa383 lw x7,0(x31) +80000440: 00638863 beq x7,x6,80000450 +80000444: 4150146f jal x8,80002058 +80000448: 80000438 .word 0x80000438 +8000044c: 80004a93 .word 0x80004a93 +80000450: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x9cd87b9a +80000454: 00092e03 lw x28,0(x18) +80000458: 00490913 addi x18,x18,4 + +8000045c : +Zbkb_zip_cg_cp_rs1_b28: + zip x3, x28 # perform operation +8000045c: 08fe1193 zip x3,x28 + # Check if x3 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x3, Zbkb_zip_cg_cp_rs1_b28, Zbkb_zip_cg_cp_rs1_b28_str) +80000460: 000fa383 lw x7,0(x31) +80000464: 00338863 beq x7,x3,80000474 +80000468: 3f10146f jal x8,80002058 +8000046c: 8000045c .word 0x8000045c +80000470: 80004ac5 .word 0x80004ac5 +80000474: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x69b854e4 +80000478: 00092e83 lw x29,0(x18) +8000047c: 00490913 addi x18,x18,4 + +80000480 : +Zbkb_zip_cg_cp_rs1_b29: + zip x6, x29 # perform operation +80000480: 08fe9313 zip x6,x29 + # Check if x6 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x6, Zbkb_zip_cg_cp_rs1_b29, Zbkb_zip_cg_cp_rs1_b29_str) +80000484: 000fa383 lw x7,0(x31) +80000488: 00638863 beq x7,x6,80000498 +8000048c: 3cd0146f jal x8,80002058 +80000490: 80000480 .word 0x80000480 +80000494: 80004af7 .word 0x80004af7 +80000498: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x315caa66 +8000049c: 00092f03 lw x30,0(x18) +800004a0: 00490913 addi x18,x18,4 + +800004a4 : +Zbkb_zip_cg_cp_rs1_b30: + zip x24, x30 # perform operation +800004a4: 08ff1c13 zip x24,x30 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_zip_cg_cp_rs1_b30, Zbkb_zip_cg_cp_rs1_b30_str) +800004a8: 000fa383 lw x7,0(x31) +800004ac: 01838863 beq x7,x24,800004bc +800004b0: 3a90146f jal x8,80002058 +800004b4: 800004a4 .word 0x800004a4 +800004b8: 80004b29 .word 0x80004b29 +800004bc: 004f8f93 addi x31,x31,4 + + mv x17, x31 # switch signature pointer register to avoid conflict with test +800004c0: 000f8893 addi x17,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xecf0ef6e +800004c4: 00092f83 lw x31,0(x18) +800004c8: 00490913 addi x18,x18,4 + +800004cc : +Zbkb_zip_cg_cp_rs1_b31: + zip x5, x31 # perform operation +800004cc: 08ff9293 zip x5,x31 + # Check if x5 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x5, Zbkb_zip_cg_cp_rs1_b31, Zbkb_zip_cg_cp_rs1_b31_str) +800004d0: 0008a383 lw x7,0(x17) +800004d4: 00538863 beq x7,x5,800004e4 +800004d8: 3810146f jal x8,80002058 +800004dc: 800004cc .word 0x800004cc +800004e0: 80004b5b .word 0x80004b5b +800004e4: 00488893 addi x17,x17,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x50b4e36d +800004e8: 00092c03 lw x24,0(x18) +800004ec: 00490913 addi x18,x18,4 + +800004f0 : +Zbkb_zip_cg_cp_rd_b0: + zip x0, x24 # perform operation +800004f0: 08fc1013 zip x0,x24 + # Check if x0 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x0, Zbkb_zip_cg_cp_rd_b0, Zbkb_zip_cg_cp_rd_b0_str) +800004f4: 0008a383 lw x7,0(x17) +800004f8: 00038863 beq x7,x0,80000508 +800004fc: 35d0146f jal x8,80002058 +80000500: 800004f0 .word 0x800004f0 +80000504: 80004b8d .word 0x80004b8d +80000508: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x6ee42cb8 +8000050c: 00092c03 lw x24,0(x18) +80000510: 00490913 addi x18,x18,4 + +80000514 : +Zbkb_zip_cg_cp_rd_b1: + zip x1, x24 # perform operation +80000514: 08fc1093 zip x1,x24 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zbkb_zip_cg_cp_rd_b1, Zbkb_zip_cg_cp_rd_b1_str) +80000518: 0008a383 lw x7,0(x17) +8000051c: 00138863 beq x7,x1,8000052c +80000520: 3390146f jal x8,80002058 +80000524: 80000514 .word 0x80000514 +80000528: 80004bbd .word 0x80004bbd +8000052c: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x22a92d3d +80000530: 00092503 lw x10,0(x18) +80000534: 00490913 addi x18,x18,4 + +80000538 : +Zbkb_zip_cg_cp_rd_b2: + zip x2, x10 # perform operation +80000538: 08f51113 zip x2,x10 + # Check if x2 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x2, Zbkb_zip_cg_cp_rd_b2, Zbkb_zip_cg_cp_rd_b2_str) +8000053c: 0008a383 lw x7,0(x17) +80000540: 00238863 beq x7,x2,80000550 +80000544: 3150146f jal x8,80002058 +80000548: 80000538 .word 0x80000538 +8000054c: 80004bed .word 0x80004bed +80000550: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x4eec1c9f +80000554: 00092283 lw x5,0(x18) +80000558: 00490913 addi x18,x18,4 + +8000055c : +Zbkb_zip_cg_cp_rd_b3: + zip x3, x5 # perform operation +8000055c: 08f29193 zip x3,x5 + # Check if x3 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x3, Zbkb_zip_cg_cp_rd_b3, Zbkb_zip_cg_cp_rd_b3_str) +80000560: 0008a383 lw x7,0(x17) +80000564: 00338863 beq x7,x3,80000574 +80000568: 2f10146f jal x8,80002058 +8000056c: 8000055c .word 0x8000055c +80000570: 80004c1d .word 0x80004c1d +80000574: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x509983d9 +80000578: 00092583 lw x11,0(x18) +8000057c: 00490913 addi x18,x18,4 + +80000580 : +Zbkb_zip_cg_cp_rd_b4: + zip x4, x11 # perform operation +80000580: 08f59213 zip x4,x11 + # Check if x4 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x4, Zbkb_zip_cg_cp_rd_b4, Zbkb_zip_cg_cp_rd_b4_str) +80000584: 0008a383 lw x7,0(x17) +80000588: 00438863 beq x7,x4,80000598 +8000058c: 2cd0146f jal x8,80002058 +80000590: 80000580 .word 0x80000580 +80000594: 80004c4d .word 0x80004c4d +80000598: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xa0f2638b +8000059c: 00092603 lw x12,0(x18) +800005a0: 00490913 addi x18,x18,4 + +800005a4 : +Zbkb_zip_cg_cp_rd_b5: + zip x5, x12 # perform operation +800005a4: 08f61293 zip x5,x12 + # Check if x5 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x5, Zbkb_zip_cg_cp_rd_b5, Zbkb_zip_cg_cp_rd_b5_str) +800005a8: 0008a383 lw x7,0(x17) +800005ac: 00538863 beq x7,x5,800005bc +800005b0: 2a90146f jal x8,80002058 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 80004c7d .word 0x80004c7d +800005bc: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x1ba62139 +800005c0: 00092c03 lw x24,0(x18) +800005c4: 00490913 addi x18,x18,4 + +800005c8 : +Zbkb_zip_cg_cp_rd_b6: + zip x6, x24 # perform operation +800005c8: 08fc1313 zip x6,x24 + # Check if x6 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x6, Zbkb_zip_cg_cp_rd_b6, Zbkb_zip_cg_cp_rd_b6_str) +800005cc: 0008a383 lw x7,0(x17) +800005d0: 00638863 beq x7,x6,800005e0 +800005d4: 2850146f jal x8,80002058 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 80004cad .word 0x80004cad +800005e0: 00488893 addi x17,x17,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005e4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005e8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xf5c99cee +800005ec: 00092403 lw x8,0(x18) +800005f0: 00490913 addi x18,x18,4 + +800005f4 : +Zbkb_zip_cg_cp_rd_b7: + zip x7, x8 # perform operation +800005f4: 08f41393 zip x7,x8 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkb_zip_cg_cp_rd_b7, Zbkb_zip_cg_cp_rd_b7_str) +800005f8: 0008a203 lw x4,0(x17) +800005fc: 00720863 beq x4,x7,8000060c +80000600: 241012ef jal x5,80002040 +80000604: 800005f4 .word 0x800005f4 +80000608: 80004cdd .word 0x80004cdd +8000060c: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xc7195be5 +80000610: 00092b03 lw x22,0(x18) +80000614: 00490913 addi x18,x18,4 + +80000618 : +Zbkb_zip_cg_cp_rd_b8: + zip x8, x22 # perform operation +80000618: 08fb1413 zip x8,x22 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_zip_cg_cp_rd_b8, Zbkb_zip_cg_cp_rd_b8_str) +8000061c: 0008a203 lw x4,0(x17) +80000620: 00820863 beq x4,x8,80000630 +80000624: 21d012ef jal x5,80002040 +80000628: 80000618 .word 0x80000618 +8000062c: 80004d0d .word 0x80004d0d +80000630: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x1fc1446b +80000634: 00092603 lw x12,0(x18) +80000638: 00490913 addi x18,x18,4 + +8000063c : +Zbkb_zip_cg_cp_rd_b9: + zip x9, x12 # perform operation +8000063c: 08f61493 zip x9,x12 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkb_zip_cg_cp_rd_b9, Zbkb_zip_cg_cp_rd_b9_str) +80000640: 0008a203 lw x4,0(x17) +80000644: 00920863 beq x4,x9,80000654 +80000648: 1f9012ef jal x5,80002040 +8000064c: 8000063c .word 0x8000063c +80000650: 80004d3d .word 0x80004d3d +80000654: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x732f2fa0 +80000658: 00092c83 lw x25,0(x18) +8000065c: 00490913 addi x18,x18,4 + +80000660 : +Zbkb_zip_cg_cp_rd_b10: + zip x10, x25 # perform operation +80000660: 08fc9513 zip x10,x25 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkb_zip_cg_cp_rd_b10, Zbkb_zip_cg_cp_rd_b10_str) +80000664: 0008a203 lw x4,0(x17) +80000668: 00a20863 beq x4,x10,80000678 +8000066c: 1d5012ef jal x5,80002040 +80000670: 80000660 .word 0x80000660 +80000674: 80004d6d .word 0x80004d6d +80000678: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xd54e4736 +8000067c: 00092d03 lw x26,0(x18) +80000680: 00490913 addi x18,x18,4 + +80000684 : +Zbkb_zip_cg_cp_rd_b11: + zip x11, x26 # perform operation +80000684: 08fd1593 zip x11,x26 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkb_zip_cg_cp_rd_b11, Zbkb_zip_cg_cp_rd_b11_str) +80000688: 0008a203 lw x4,0(x17) +8000068c: 00b20863 beq x4,x11,8000069c +80000690: 1b1012ef jal x5,80002040 +80000694: 80000684 .word 0x80000684 +80000698: 80004d9e .word 0x80004d9e +8000069c: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x7dc46409 +800006a0: 00092983 lw x19,0(x18) +800006a4: 00490913 addi x18,x18,4 + +800006a8 : +Zbkb_zip_cg_cp_rd_b12: + zip x12, x19 # perform operation +800006a8: 08f99613 zip x12,x19 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkb_zip_cg_cp_rd_b12, Zbkb_zip_cg_cp_rd_b12_str) +800006ac: 0008a203 lw x4,0(x17) +800006b0: 00c20863 beq x4,x12,800006c0 +800006b4: 18d012ef jal x5,80002040 +800006b8: 800006a8 .word 0x800006a8 +800006bc: 80004dcf .word 0x80004dcf +800006c0: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x7e0f734d +800006c4: 00092d03 lw x26,0(x18) +800006c8: 00490913 addi x18,x18,4 + +800006cc : +Zbkb_zip_cg_cp_rd_b13: + zip x13, x26 # perform operation +800006cc: 08fd1693 zip x13,x26 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkb_zip_cg_cp_rd_b13, Zbkb_zip_cg_cp_rd_b13_str) +800006d0: 0008a203 lw x4,0(x17) +800006d4: 00d20863 beq x4,x13,800006e4 +800006d8: 169012ef jal x5,80002040 +800006dc: 800006cc .word 0x800006cc +800006e0: 80004e00 .word 0x80004e00 +800006e4: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x2c04c68e +800006e8: 00092d03 lw x26,0(x18) +800006ec: 00490913 addi x18,x18,4 + +800006f0 : +Zbkb_zip_cg_cp_rd_b14: + zip x14, x26 # perform operation +800006f0: 08fd1713 zip x14,x26 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkb_zip_cg_cp_rd_b14, Zbkb_zip_cg_cp_rd_b14_str) +800006f4: 0008a203 lw x4,0(x17) +800006f8: 00e20863 beq x4,x14,80000708 +800006fc: 145012ef jal x5,80002040 +80000700: 800006f0 .word 0x800006f0 +80000704: 80004e31 .word 0x80004e31 +80000708: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x0cefeb87 +8000070c: 00092403 lw x8,0(x18) +80000710: 00490913 addi x18,x18,4 + +80000714 : +Zbkb_zip_cg_cp_rd_b15: + zip x15, x8 # perform operation +80000714: 08f41793 zip x15,x8 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkb_zip_cg_cp_rd_b15, Zbkb_zip_cg_cp_rd_b15_str) +80000718: 0008a203 lw x4,0(x17) +8000071c: 00f20863 beq x4,x15,8000072c +80000720: 121012ef jal x5,80002040 +80000724: 80000714 .word 0x80000714 +80000728: 80004e62 .word 0x80004e62 +8000072c: 00488893 addi x17,x17,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x0eba661c +80000730: 00092e83 lw x29,0(x18) +80000734: 00490913 addi x18,x18,4 + +80000738 : +Zbkb_zip_cg_cp_rd_b16: + zip x16, x29 # perform operation +80000738: 08fe9813 zip x16,x29 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkb_zip_cg_cp_rd_b16, Zbkb_zip_cg_cp_rd_b16_str) +8000073c: 0008a203 lw x4,0(x17) +80000740: 01020863 beq x4,x16,80000750 +80000744: 0fd012ef jal x5,80002040 +80000748: 80000738 .word 0x80000738 +8000074c: 80004e93 .word 0x80004e93 +80000750: 00488893 addi x17,x17,4 + + mv x15, x17 # switch signature pointer register to avoid conflict with test +80000754: 00088793 addi x15,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xeb22faec +80000758: 00092483 lw x9,0(x18) +8000075c: 00490913 addi x18,x18,4 + +80000760 : +Zbkb_zip_cg_cp_rd_b17: + zip x17, x9 # perform operation +80000760: 08f49893 zip x17,x9 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_zip_cg_cp_rd_b17, Zbkb_zip_cg_cp_rd_b17_str) +80000764: 0007a203 lw x4,0(x15) +80000768: 01120863 beq x4,x17,80000778 +8000076c: 0d5012ef jal x5,80002040 +80000770: 80000760 .word 0x80000760 +80000774: 80004ec4 .word 0x80004ec4 +80000778: 00478793 addi x15,x15,4 + + mv x16, x18 # switch data pointer register to avoid conflict with test +8000077c: 00090813 addi x16,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xd542d6ca +80000780: 00082b03 lw x22,0(x16) +80000784: 00480813 addi x16,x16,4 + +80000788 : +Zbkb_zip_cg_cp_rd_b18: + zip x18, x22 # perform operation +80000788: 08fb1913 zip x18,x22 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zbkb_zip_cg_cp_rd_b18, Zbkb_zip_cg_cp_rd_b18_str) +8000078c: 0007a203 lw x4,0(x15) +80000790: 01220863 beq x4,x18,800007a0 +80000794: 0ad012ef jal x5,80002040 +80000798: 80000788 .word 0x80000788 +8000079c: 80004ef5 .word 0x80004ef5 +800007a0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x9852cfa0 +800007a4: 00082103 lw x2,0(x16) +800007a8: 00480813 addi x16,x16,4 + +800007ac : +Zbkb_zip_cg_cp_rd_b19: + zip x19, x2 # perform operation +800007ac: 08f11993 zip x19,x2 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zbkb_zip_cg_cp_rd_b19, Zbkb_zip_cg_cp_rd_b19_str) +800007b0: 0007a203 lw x4,0(x15) +800007b4: 01320863 beq x4,x19,800007c4 +800007b8: 089012ef jal x5,80002040 +800007bc: 800007ac .word 0x800007ac +800007c0: 80004f26 .word 0x80004f26 +800007c4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xb8e05d36 +800007c8: 00082483 lw x9,0(x16) +800007cc: 00480813 addi x16,x16,4 + +800007d0 : +Zbkb_zip_cg_cp_rd_b20: + zip x20, x9 # perform operation +800007d0: 08f49a13 zip x20,x9 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zbkb_zip_cg_cp_rd_b20, Zbkb_zip_cg_cp_rd_b20_str) +800007d4: 0007a203 lw x4,0(x15) +800007d8: 01420863 beq x4,x20,800007e8 +800007dc: 065012ef jal x5,80002040 +800007e0: 800007d0 .word 0x800007d0 +800007e4: 80004f57 .word 0x80004f57 +800007e8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x0238e304 +800007ec: 00082703 lw x14,0(x16) +800007f0: 00480813 addi x16,x16,4 + +800007f4 : +Zbkb_zip_cg_cp_rd_b21: + zip x21, x14 # perform operation +800007f4: 08f71a93 zip x21,x14 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_zip_cg_cp_rd_b21, Zbkb_zip_cg_cp_rd_b21_str) +800007f8: 0007a203 lw x4,0(x15) +800007fc: 01520863 beq x4,x21,8000080c +80000800: 041012ef jal x5,80002040 +80000804: 800007f4 .word 0x800007f4 +80000808: 80004f88 .word 0x80004f88 +8000080c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x7d0add7c +80000810: 00082983 lw x19,0(x16) +80000814: 00480813 addi x16,x16,4 + +80000818 : +Zbkb_zip_cg_cp_rd_b22: + zip x22, x19 # perform operation +80000818: 08f99b13 zip x22,x19 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_zip_cg_cp_rd_b22, Zbkb_zip_cg_cp_rd_b22_str) +8000081c: 0007a203 lw x4,0(x15) +80000820: 01620863 beq x4,x22,80000830 +80000824: 01d012ef jal x5,80002040 +80000828: 80000818 .word 0x80000818 +8000082c: 80004fb9 .word 0x80004fb9 +80000830: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x7b75912e +80000834: 00082083 lw x1,0(x16) +80000838: 00480813 addi x16,x16,4 + +8000083c : +Zbkb_zip_cg_cp_rd_b23: + zip x23, x1 # perform operation +8000083c: 08f09b93 zip x23,x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_zip_cg_cp_rd_b23, Zbkb_zip_cg_cp_rd_b23_str) +80000840: 0007a203 lw x4,0(x15) +80000844: 01720863 beq x4,x23,80000854 +80000848: 7f8012ef jal x5,80002040 +8000084c: 8000083c .word 0x8000083c +80000850: 80004fea .word 0x80004fea +80000854: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x826f2b64 +80000858: 00082483 lw x9,0(x16) +8000085c: 00480813 addi x16,x16,4 + +80000860 : +Zbkb_zip_cg_cp_rd_b24: + zip x24, x9 # perform operation +80000860: 08f49c13 zip x24,x9 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zbkb_zip_cg_cp_rd_b24, Zbkb_zip_cg_cp_rd_b24_str) +80000864: 0007a203 lw x4,0(x15) +80000868: 01820863 beq x4,x24,80000878 +8000086c: 7d4012ef jal x5,80002040 +80000870: 80000860 .word 0x80000860 +80000874: 8000501b .word 0x8000501b +80000878: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x305dd437 +8000087c: 00082983 lw x19,0(x16) +80000880: 00480813 addi x16,x16,4 + +80000884 : +Zbkb_zip_cg_cp_rd_b25: + zip x25, x19 # perform operation +80000884: 08f99c93 zip x25,x19 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_zip_cg_cp_rd_b25, Zbkb_zip_cg_cp_rd_b25_str) +80000888: 0007a203 lw x4,0(x15) +8000088c: 01920863 beq x4,x25,8000089c +80000890: 7b0012ef jal x5,80002040 +80000894: 80000884 .word 0x80000884 +80000898: 8000504c .word 0x8000504c +8000089c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x276b35ca +800008a0: 00082e03 lw x28,0(x16) +800008a4: 00480813 addi x16,x16,4 + +800008a8 : +Zbkb_zip_cg_cp_rd_b26: + zip x26, x28 # perform operation +800008a8: 08fe1d13 zip x26,x28 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zbkb_zip_cg_cp_rd_b26, Zbkb_zip_cg_cp_rd_b26_str) +800008ac: 0007a203 lw x4,0(x15) +800008b0: 01a20863 beq x4,x26,800008c0 +800008b4: 78c012ef jal x5,80002040 +800008b8: 800008a8 .word 0x800008a8 +800008bc: 8000507d .word 0x8000507d +800008c0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xa31aa7d4 +800008c4: 00082483 lw x9,0(x16) +800008c8: 00480813 addi x16,x16,4 + +800008cc : +Zbkb_zip_cg_cp_rd_b27: + zip x27, x9 # perform operation +800008cc: 08f49d93 zip x27,x9 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_zip_cg_cp_rd_b27, Zbkb_zip_cg_cp_rd_b27_str) +800008d0: 0007a203 lw x4,0(x15) +800008d4: 01b20863 beq x4,x27,800008e4 +800008d8: 768012ef jal x5,80002040 +800008dc: 800008cc .word 0x800008cc +800008e0: 800050ae .word 0x800050ae +800008e4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x69c06376 +800008e8: 00082303 lw x6,0(x16) +800008ec: 00480813 addi x16,x16,4 + +800008f0 : +Zbkb_zip_cg_cp_rd_b28: + zip x28, x6 # perform operation +800008f0: 08f31e13 zip x28,x6 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zbkb_zip_cg_cp_rd_b28, Zbkb_zip_cg_cp_rd_b28_str) +800008f4: 0007a203 lw x4,0(x15) +800008f8: 01c20863 beq x4,x28,80000908 +800008fc: 744012ef jal x5,80002040 +80000900: 800008f0 .word 0x800008f0 +80000904: 800050df .word 0x800050df +80000908: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x3c4c6a8e +8000090c: 00082103 lw x2,0(x16) +80000910: 00480813 addi x16,x16,4 + +80000914 : +Zbkb_zip_cg_cp_rd_b29: + zip x29, x2 # perform operation +80000914: 08f11e93 zip x29,x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zbkb_zip_cg_cp_rd_b29, Zbkb_zip_cg_cp_rd_b29_str) +80000918: 0007a203 lw x4,0(x15) +8000091c: 01d20863 beq x4,x29,8000092c +80000920: 720012ef jal x5,80002040 +80000924: 80000914 .word 0x80000914 +80000928: 80005110 .word 0x80005110 +8000092c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x1599ab28 +80000930: 00082583 lw x11,0(x16) +80000934: 00480813 addi x16,x16,4 + +80000938 : +Zbkb_zip_cg_cp_rd_b30: + zip x30, x11 # perform operation +80000938: 08f59f13 zip x30,x11 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_zip_cg_cp_rd_b30, Zbkb_zip_cg_cp_rd_b30_str) +8000093c: 0007a203 lw x4,0(x15) +80000940: 01e20863 beq x4,x30,80000950 +80000944: 6fc012ef jal x5,80002040 +80000948: 80000938 .word 0x80000938 +8000094c: 80005141 .word 0x80005141 +80000950: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x746490c6 +80000954: 00082b03 lw x22,0(x16) +80000958: 00480813 addi x16,x16,4 + +8000095c : +Zbkb_zip_cg_cp_rd_b31: + zip x31, x22 # perform operation +8000095c: 08fb1f93 zip x31,x22 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_zip_cg_cp_rd_b31, Zbkb_zip_cg_cp_rd_b31_str) +80000960: 0007a203 lw x4,0(x15) +80000964: 01f20863 beq x4,x31,80000974 +80000968: 6d8012ef jal x5,80002040 +8000096c: 8000095c .word 0x8000095c +80000970: 80005172 .word 0x80005172 +80000974: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x00000000 +80000978: 00082103 lw x2,0(x16) +8000097c: 00480813 addi x16,x16,4 + +80000980 : +Zbkb_zip_cg_cp_rs1_edges_0x0: + zip x10, x2 # perform operation +80000980: 08f11513 zip x10,x2 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zbkb_zip_cg_cp_rs1_edges_0x0, Zbkb_zip_cg_cp_rs1_edges_0x0_str) +80000984: 0007a203 lw x4,0(x15) +80000988: 00a20863 beq x4,x10,80000998 +8000098c: 6b4012ef jal x5,80002040 +80000990: 80000980 .word 0x80000980 +80000994: 800051a3 .word 0x800051a3 +80000998: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x00000001 +8000099c: 00082583 lw x11,0(x16) +800009a0: 00480813 addi x16,x16,4 + +800009a4 : +Zbkb_zip_cg_cp_rs1_edges_0x1: + zip x1, x11 # perform operation +800009a4: 08f59093 zip x1,x11 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_zip_cg_cp_rs1_edges_0x1, Zbkb_zip_cg_cp_rs1_edges_0x1_str) +800009a8: 0007a203 lw x4,0(x15) +800009ac: 00120863 beq x4,x1,800009bc +800009b0: 690012ef jal x5,80002040 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 800051db .word 0x800051db +800009bc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x00000002 +800009c0: 00082703 lw x14,0(x16) +800009c4: 00480813 addi x16,x16,4 + +800009c8 : +Zbkb_zip_cg_cp_rs1_edges_0x2: + zip x13, x14 # perform operation +800009c8: 08f71693 zip x13,x14 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zbkb_zip_cg_cp_rs1_edges_0x2, Zbkb_zip_cg_cp_rs1_edges_0x2_str) +800009cc: 0007a203 lw x4,0(x15) +800009d0: 00d20863 beq x4,x13,800009e0 +800009d4: 66c012ef jal x5,80002040 +800009d8: 800009c8 .word 0x800009c8 +800009dc: 80005213 .word 0x80005213 +800009e0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x80000000 +800009e4: 00082683 lw x13,0(x16) +800009e8: 00480813 addi x16,x16,4 + +800009ec : +Zbkb_zip_cg_cp_rs1_edges_0x80000000: + zip x9, x13 # perform operation +800009ec: 08f69493 zip x9,x13 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zbkb_zip_cg_cp_rs1_edges_0x80000000, Zbkb_zip_cg_cp_rs1_edges_0x80000000_str) +800009f0: 0007a203 lw x4,0(x15) +800009f4: 00920863 beq x4,x9,80000a04 +800009f8: 648012ef jal x5,80002040 +800009fc: 800009ec .word 0x800009ec +80000a00: 8000524b .word 0x8000524b +80000a04: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x80000001 +80000a08: 00082303 lw x6,0(x16) +80000a0c: 00480813 addi x16,x16,4 + +80000a10 : +Zbkb_zip_cg_cp_rs1_edges_0x80000001: + zip x31, x6 # perform operation +80000a10: 08f31f93 zip x31,x6 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_zip_cg_cp_rs1_edges_0x80000001, Zbkb_zip_cg_cp_rs1_edges_0x80000001_str) +80000a14: 0007a203 lw x4,0(x15) +80000a18: 01f20863 beq x4,x31,80000a28 +80000a1c: 624012ef jal x5,80002040 +80000a20: 80000a10 .word 0x80000a10 +80000a24: 8000528a .word 0x8000528a +80000a28: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x7fffffff +80000a2c: 00082103 lw x2,0(x16) +80000a30: 00480813 addi x16,x16,4 + +80000a34 : +Zbkb_zip_cg_cp_rs1_edges_0x7fffffff: + zip x17, x2 # perform operation +80000a34: 08f11893 zip x17,x2 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_zip_cg_cp_rs1_edges_0x7fffffff, Zbkb_zip_cg_cp_rs1_edges_0x7fffffff_str) +80000a38: 0007a203 lw x4,0(x15) +80000a3c: 01120863 beq x4,x17,80000a4c +80000a40: 600012ef jal x5,80002040 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 800052c9 .word 0x800052c9 +80000a4c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x7ffffffe +80000a50: 00082903 lw x18,0(x16) +80000a54: 00480813 addi x16,x16,4 + +80000a58 : +Zbkb_zip_cg_cp_rs1_edges_0x7ffffffe: + zip x8, x18 # perform operation +80000a58: 08f91413 zip x8,x18 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_zip_cg_cp_rs1_edges_0x7ffffffe, Zbkb_zip_cg_cp_rs1_edges_0x7ffffffe_str) +80000a5c: 0007a203 lw x4,0(x15) +80000a60: 00820863 beq x4,x8,80000a70 +80000a64: 5dc012ef jal x5,80002040 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 80005308 .word 0x80005308 +80000a70: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xffffffff +80000a74: 00082b83 lw x23,0(x16) +80000a78: 00480813 addi x16,x16,4 + +80000a7c : +Zbkb_zip_cg_cp_rs1_edges_0xffffffff: + zip x22, x23 # perform operation +80000a7c: 08fb9b13 zip x22,x23 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_zip_cg_cp_rs1_edges_0xffffffff, Zbkb_zip_cg_cp_rs1_edges_0xffffffff_str) +80000a80: 0007a203 lw x4,0(x15) +80000a84: 01620863 beq x4,x22,80000a94 +80000a88: 5b8012ef jal x5,80002040 +80000a8c: 80000a7c .word 0x80000a7c +80000a90: 80005347 .word 0x80005347 +80000a94: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xfffffffe +80000a98: 00082083 lw x1,0(x16) +80000a9c: 00480813 addi x16,x16,4 + +80000aa0 : +Zbkb_zip_cg_cp_rs1_edges_0xfffffffe: + zip x17, x1 # perform operation +80000aa0: 08f09893 zip x17,x1 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_zip_cg_cp_rs1_edges_0xfffffffe, Zbkb_zip_cg_cp_rs1_edges_0xfffffffe_str) +80000aa4: 0007a203 lw x4,0(x15) +80000aa8: 01120863 beq x4,x17,80000ab8 +80000aac: 594012ef jal x5,80002040 +80000ab0: 80000aa0 .word 0x80000aa0 +80000ab4: 80005386 .word 0x80005386 +80000ab8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x5bbc8872 +80000abc: 00082483 lw x9,0(x16) +80000ac0: 00480813 addi x16,x16,4 + +80000ac4 : +Zbkb_zip_cg_cp_rs1_edges_0x5bbc8872: + zip x25, x9 # perform operation +80000ac4: 08f49c93 zip x25,x9 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_zip_cg_cp_rs1_edges_0x5bbc8872, Zbkb_zip_cg_cp_rs1_edges_0x5bbc8872_str) +80000ac8: 0007a203 lw x4,0(x15) +80000acc: 01920863 beq x4,x25,80000adc +80000ad0: 570012ef jal x5,80002040 +80000ad4: 80000ac4 .word 0x80000ac4 +80000ad8: 800053c5 .word 0x800053c5 +80000adc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xaaaaaaaa +80000ae0: 00082103 lw x2,0(x16) +80000ae4: 00480813 addi x16,x16,4 + +80000ae8 : +Zbkb_zip_cg_cp_rs1_edges_0xaaaaaaaa: + zip x20, x2 # perform operation +80000ae8: 08f11a13 zip x20,x2 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zbkb_zip_cg_cp_rs1_edges_0xaaaaaaaa, Zbkb_zip_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000aec: 0007a203 lw x4,0(x15) +80000af0: 01420863 beq x4,x20,80000b00 +80000af4: 54c012ef jal x5,80002040 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 80005404 .word 0x80005404 +80000b00: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x55555555 +80000b04: 00082683 lw x13,0(x16) +80000b08: 00480813 addi x16,x16,4 + +80000b0c : +Zbkb_zip_cg_cp_rs1_edges_0x55555555: + zip x29, x13 # perform operation +80000b0c: 08f69e93 zip x29,x13 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zbkb_zip_cg_cp_rs1_edges_0x55555555, Zbkb_zip_cg_cp_rs1_edges_0x55555555_str) +80000b10: 0007a203 lw x4,0(x15) +80000b14: 01d20863 beq x4,x29,80000b24 +80000b18: 528012ef jal x5,80002040 +80000b1c: 80000b0c .word 0x80000b0c +80000b20: 80005443 .word 0x80005443 +80000b24: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x6ee48b8c +80000b28: 00082003 lw x0,0(x16) +80000b2c: 00480813 addi x16,x16,4 + +80000b30 : +Zbkb_zip_cg_cmp_rd_rs1_b0: + zip x0, x0 # perform operation +80000b30: 08f01013 zip x0,x0 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_zip_cg_cmp_rd_rs1_b0, Zbkb_zip_cg_cmp_rd_rs1_b0_str) +80000b34: 0007a203 lw x4,0(x15) +80000b38: 00020863 beq x4,x0,80000b48 +80000b3c: 504012ef jal x5,80002040 +80000b40: 80000b30 .word 0x80000b30 +80000b44: 80005482 .word 0x80005482 +80000b48: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x780bc74b +80000b4c: 00082083 lw x1,0(x16) +80000b50: 00480813 addi x16,x16,4 + +80000b54 : +Zbkb_zip_cg_cmp_rd_rs1_b1: + zip x1, x1 # perform operation +80000b54: 08f09093 zip x1,x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_zip_cg_cmp_rd_rs1_b1, Zbkb_zip_cg_cmp_rd_rs1_b1_str) +80000b58: 0007a203 lw x4,0(x15) +80000b5c: 00120863 beq x4,x1,80000b6c +80000b60: 4e0012ef jal x5,80002040 +80000b64: 80000b54 .word 0x80000b54 +80000b68: 800054b7 .word 0x800054b7 +80000b6c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x9e3fb3de +80000b70: 00082103 lw x2,0(x16) +80000b74: 00480813 addi x16,x16,4 + +80000b78 : +Zbkb_zip_cg_cmp_rd_rs1_b2: + zip x2, x2 # perform operation +80000b78: 08f11113 zip x2,x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_zip_cg_cmp_rd_rs1_b2, Zbkb_zip_cg_cmp_rd_rs1_b2_str) +80000b7c: 0007a203 lw x4,0(x15) +80000b80: 00220863 beq x4,x2,80000b90 +80000b84: 4bc012ef jal x5,80002040 +80000b88: 80000b78 .word 0x80000b78 +80000b8c: 800054ec .word 0x800054ec +80000b90: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xa52834bf +80000b94: 00082183 lw x3,0(x16) +80000b98: 00480813 addi x16,x16,4 + +80000b9c : +Zbkb_zip_cg_cmp_rd_rs1_b3: + zip x3, x3 # perform operation +80000b9c: 08f19193 zip x3,x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_zip_cg_cmp_rd_rs1_b3, Zbkb_zip_cg_cmp_rd_rs1_b3_str) +80000ba0: 0007a203 lw x4,0(x15) +80000ba4: 00320863 beq x4,x3,80000bb4 +80000ba8: 498012ef jal x5,80002040 +80000bac: 80000b9c .word 0x80000b9c +80000bb0: 80005521 .word 0x80005521 +80000bb4: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000bb8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000bbc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x06900f93 +80000bc0: 00082203 lw x4,0(x16) +80000bc4: 00480813 addi x16,x16,4 + +80000bc8 : +Zbkb_zip_cg_cmp_rd_rs1_b4: + zip x4, x4 # perform operation +80000bc8: 08f21213 zip x4,x4 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_zip_cg_cmp_rd_rs1_b4, Zbkb_zip_cg_cmp_rd_rs1_b4_str) +80000bcc: 0007a383 lw x7,0(x15) +80000bd0: 00438863 beq x7,x4,80000be0 +80000bd4: 4840146f jal x8,80002058 +80000bd8: 80000bc8 .word 0x80000bc8 +80000bdc: 80005556 .word 0x80005556 +80000be0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0xbe926809 +80000be4: 00082283 lw x5,0(x16) +80000be8: 00480813 addi x16,x16,4 + +80000bec : +Zbkb_zip_cg_cmp_rd_rs1_b5: + zip x5, x5 # perform operation +80000bec: 08f29293 zip x5,x5 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_zip_cg_cmp_rd_rs1_b5, Zbkb_zip_cg_cmp_rd_rs1_b5_str) +80000bf0: 0007a383 lw x7,0(x15) +80000bf4: 00538863 beq x7,x5,80000c04 +80000bf8: 4600146f jal x8,80002058 +80000bfc: 80000bec .word 0x80000bec +80000c00: 8000558b .word 0x8000558b +80000c04: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x798e21f8 +80000c08: 00082303 lw x6,0(x16) +80000c0c: 00480813 addi x16,x16,4 + +80000c10 : +Zbkb_zip_cg_cmp_rd_rs1_b6: + zip x6, x6 # perform operation +80000c10: 08f31313 zip x6,x6 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_zip_cg_cmp_rd_rs1_b6, Zbkb_zip_cg_cmp_rd_rs1_b6_str) +80000c14: 0007a383 lw x7,0(x15) +80000c18: 00638863 beq x7,x6,80000c28 +80000c1c: 43c0146f jal x8,80002058 +80000c20: 80000c10 .word 0x80000c10 +80000c24: 800055c0 .word 0x800055c0 +80000c28: 00478793 addi x15,x15,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c2c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c30: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xa303ea9d +80000c34: 00082383 lw x7,0(x16) +80000c38: 00480813 addi x16,x16,4 + +80000c3c : +Zbkb_zip_cg_cmp_rd_rs1_b7: + zip x7, x7 # perform operation +80000c3c: 08f39393 zip x7,x7 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zbkb_zip_cg_cmp_rd_rs1_b7, Zbkb_zip_cg_cmp_rd_rs1_b7_str) +80000c40: 0007a203 lw x4,0(x15) +80000c44: 00720863 beq x4,x7,80000c54 +80000c48: 3f8012ef jal x5,80002040 +80000c4c: 80000c3c .word 0x80000c3c +80000c50: 800055f5 .word 0x800055f5 +80000c54: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xb82df915 +80000c58: 00082403 lw x8,0(x16) +80000c5c: 00480813 addi x16,x16,4 + +80000c60 : +Zbkb_zip_cg_cmp_rd_rs1_b8: + zip x8, x8 # perform operation +80000c60: 08f41413 zip x8,x8 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_zip_cg_cmp_rd_rs1_b8, Zbkb_zip_cg_cmp_rd_rs1_b8_str) +80000c64: 0007a203 lw x4,0(x15) +80000c68: 00820863 beq x4,x8,80000c78 +80000c6c: 3d4012ef jal x5,80002040 +80000c70: 80000c60 .word 0x80000c60 +80000c74: 8000562a .word 0x8000562a +80000c78: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xab9a9896 +80000c7c: 00082483 lw x9,0(x16) +80000c80: 00480813 addi x16,x16,4 + +80000c84 : +Zbkb_zip_cg_cmp_rd_rs1_b9: + zip x9, x9 # perform operation +80000c84: 08f49493 zip x9,x9 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zbkb_zip_cg_cmp_rd_rs1_b9, Zbkb_zip_cg_cmp_rd_rs1_b9_str) +80000c88: 0007a203 lw x4,0(x15) +80000c8c: 00920863 beq x4,x9,80000c9c +80000c90: 3b0012ef jal x5,80002040 +80000c94: 80000c84 .word 0x80000c84 +80000c98: 8000565f .word 0x8000565f +80000c9c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x9577e6ef +80000ca0: 00082503 lw x10,0(x16) +80000ca4: 00480813 addi x16,x16,4 + +80000ca8 : +Zbkb_zip_cg_cmp_rd_rs1_b10: + zip x10, x10 # perform operation +80000ca8: 08f51513 zip x10,x10 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zbkb_zip_cg_cmp_rd_rs1_b10, Zbkb_zip_cg_cmp_rd_rs1_b10_str) +80000cac: 0007a203 lw x4,0(x15) +80000cb0: 00a20863 beq x4,x10,80000cc0 +80000cb4: 38c012ef jal x5,80002040 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 80005694 .word 0x80005694 +80000cc0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xa7c7efcb +80000cc4: 00082583 lw x11,0(x16) +80000cc8: 00480813 addi x16,x16,4 + +80000ccc : +Zbkb_zip_cg_cmp_rd_rs1_b11: + zip x11, x11 # perform operation +80000ccc: 08f59593 zip x11,x11 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zbkb_zip_cg_cmp_rd_rs1_b11, Zbkb_zip_cg_cmp_rd_rs1_b11_str) +80000cd0: 0007a203 lw x4,0(x15) +80000cd4: 00b20863 beq x4,x11,80000ce4 +80000cd8: 368012ef jal x5,80002040 +80000cdc: 80000ccc .word 0x80000ccc +80000ce0: 800056ca .word 0x800056ca +80000ce4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x83141e39 +80000ce8: 00082603 lw x12,0(x16) +80000cec: 00480813 addi x16,x16,4 + +80000cf0 : +Zbkb_zip_cg_cmp_rd_rs1_b12: + zip x12, x12 # perform operation +80000cf0: 08f61613 zip x12,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zbkb_zip_cg_cmp_rd_rs1_b12, Zbkb_zip_cg_cmp_rd_rs1_b12_str) +80000cf4: 0007a203 lw x4,0(x15) +80000cf8: 00c20863 beq x4,x12,80000d08 +80000cfc: 344012ef jal x5,80002040 +80000d00: 80000cf0 .word 0x80000cf0 +80000d04: 80005700 .word 0x80005700 +80000d08: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x9d619252 +80000d0c: 00082683 lw x13,0(x16) +80000d10: 00480813 addi x16,x16,4 + +80000d14 : +Zbkb_zip_cg_cmp_rd_rs1_b13: + zip x13, x13 # perform operation +80000d14: 08f69693 zip x13,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zbkb_zip_cg_cmp_rd_rs1_b13, Zbkb_zip_cg_cmp_rd_rs1_b13_str) +80000d18: 0007a203 lw x4,0(x15) +80000d1c: 00d20863 beq x4,x13,80000d2c +80000d20: 320012ef jal x5,80002040 +80000d24: 80000d14 .word 0x80000d14 +80000d28: 80005736 .word 0x80005736 +80000d2c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xa1d75dab +80000d30: 00082703 lw x14,0(x16) +80000d34: 00480813 addi x16,x16,4 + +80000d38 : +Zbkb_zip_cg_cmp_rd_rs1_b14: + zip x14, x14 # perform operation +80000d38: 08f71713 zip x14,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_zip_cg_cmp_rd_rs1_b14, Zbkb_zip_cg_cmp_rd_rs1_b14_str) +80000d3c: 0007a203 lw x4,0(x15) +80000d40: 00e20863 beq x4,x14,80000d50 +80000d44: 2fc012ef jal x5,80002040 +80000d48: 80000d38 .word 0x80000d38 +80000d4c: 8000576c .word 0x8000576c +80000d50: 00478793 addi x15,x15,4 + + mv x2, x15 # switch signature pointer register to avoid conflict with test +80000d54: 00078113 addi x2,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x97e7e0e5 +80000d58: 00082783 lw x15,0(x16) +80000d5c: 00480813 addi x16,x16,4 + +80000d60 : +Zbkb_zip_cg_cmp_rd_rs1_b15: + zip x15, x15 # perform operation +80000d60: 08f79793 zip x15,x15 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zbkb_zip_cg_cmp_rd_rs1_b15, Zbkb_zip_cg_cmp_rd_rs1_b15_str) +80000d64: 00012203 lw x4,0(x2) +80000d68: 00f20863 beq x4,x15,80000d78 +80000d6c: 2d4012ef jal x5,80002040 +80000d70: 80000d60 .word 0x80000d60 +80000d74: 800057a2 .word 0x800057a2 +80000d78: 00410113 addi x2,x2,4 + + mv x9, x16 # switch data pointer register to avoid conflict with test +80000d7c: 00080493 addi x9,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xdccfe491 +80000d80: 0004a803 lw x16,0(x9) +80000d84: 00448493 addi x9,x9,4 + +80000d88 : +Zbkb_zip_cg_cmp_rd_rs1_b16: + zip x16, x16 # perform operation +80000d88: 08f81813 zip x16,x16 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkb_zip_cg_cmp_rd_rs1_b16, Zbkb_zip_cg_cmp_rd_rs1_b16_str) +80000d8c: 00012203 lw x4,0(x2) +80000d90: 01020863 beq x4,x16,80000da0 +80000d94: 2ac012ef jal x5,80002040 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 800057d8 .word 0x800057d8 +80000da0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x2cee7f25 +80000da4: 0004a883 lw x17,0(x9) +80000da8: 00448493 addi x9,x9,4 + +80000dac : +Zbkb_zip_cg_cmp_rd_rs1_b17: + zip x17, x17 # perform operation +80000dac: 08f89893 zip x17,x17 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkb_zip_cg_cmp_rd_rs1_b17, Zbkb_zip_cg_cmp_rd_rs1_b17_str) +80000db0: 00012203 lw x4,0(x2) +80000db4: 01120863 beq x4,x17,80000dc4 +80000db8: 288012ef jal x5,80002040 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 8000580e .word 0x8000580e +80000dc4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x52527790 +80000dc8: 0004a903 lw x18,0(x9) +80000dcc: 00448493 addi x9,x9,4 + +80000dd0 : +Zbkb_zip_cg_cmp_rd_rs1_b18: + zip x18, x18 # perform operation +80000dd0: 08f91913 zip x18,x18 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zbkb_zip_cg_cmp_rd_rs1_b18, Zbkb_zip_cg_cmp_rd_rs1_b18_str) +80000dd4: 00012203 lw x4,0(x2) +80000dd8: 01220863 beq x4,x18,80000de8 +80000ddc: 264012ef jal x5,80002040 +80000de0: 80000dd0 .word 0x80000dd0 +80000de4: 80005844 .word 0x80005844 +80000de8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xbe1931ed +80000dec: 0004a983 lw x19,0(x9) +80000df0: 00448493 addi x9,x9,4 + +80000df4 : +Zbkb_zip_cg_cmp_rd_rs1_b19: + zip x19, x19 # perform operation +80000df4: 08f99993 zip x19,x19 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_zip_cg_cmp_rd_rs1_b19, Zbkb_zip_cg_cmp_rd_rs1_b19_str) +80000df8: 00012203 lw x4,0(x2) +80000dfc: 01320863 beq x4,x19,80000e0c +80000e00: 240012ef jal x5,80002040 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 8000587a .word 0x8000587a +80000e0c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x1b5db3c6 +80000e10: 0004aa03 lw x20,0(x9) +80000e14: 00448493 addi x9,x9,4 + +80000e18 : +Zbkb_zip_cg_cmp_rd_rs1_b20: + zip x20, x20 # perform operation +80000e18: 08fa1a13 zip x20,x20 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkb_zip_cg_cmp_rd_rs1_b20, Zbkb_zip_cg_cmp_rd_rs1_b20_str) +80000e1c: 00012203 lw x4,0(x2) +80000e20: 01420863 beq x4,x20,80000e30 +80000e24: 21c012ef jal x5,80002040 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 800058b0 .word 0x800058b0 +80000e30: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7035e9de +80000e34: 0004aa83 lw x21,0(x9) +80000e38: 00448493 addi x9,x9,4 + +80000e3c : +Zbkb_zip_cg_cmp_rd_rs1_b21: + zip x21, x21 # perform operation +80000e3c: 08fa9a93 zip x21,x21 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zbkb_zip_cg_cmp_rd_rs1_b21, Zbkb_zip_cg_cmp_rd_rs1_b21_str) +80000e40: 00012203 lw x4,0(x2) +80000e44: 01520863 beq x4,x21,80000e54 +80000e48: 1f8012ef jal x5,80002040 +80000e4c: 80000e3c .word 0x80000e3c +80000e50: 800058e6 .word 0x800058e6 +80000e54: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x032c1676 +80000e58: 0004ab03 lw x22,0(x9) +80000e5c: 00448493 addi x9,x9,4 + +80000e60 : +Zbkb_zip_cg_cmp_rd_rs1_b22: + zip x22, x22 # perform operation +80000e60: 08fb1b13 zip x22,x22 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkb_zip_cg_cmp_rd_rs1_b22, Zbkb_zip_cg_cmp_rd_rs1_b22_str) +80000e64: 00012203 lw x4,0(x2) +80000e68: 01620863 beq x4,x22,80000e78 +80000e6c: 1d4012ef jal x5,80002040 +80000e70: 80000e60 .word 0x80000e60 +80000e74: 8000591c .word 0x8000591c +80000e78: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xd45fcb4f +80000e7c: 0004ab83 lw x23,0(x9) +80000e80: 00448493 addi x9,x9,4 + +80000e84 : +Zbkb_zip_cg_cmp_rd_rs1_b23: + zip x23, x23 # perform operation +80000e84: 08fb9b93 zip x23,x23 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkb_zip_cg_cmp_rd_rs1_b23, Zbkb_zip_cg_cmp_rd_rs1_b23_str) +80000e88: 00012203 lw x4,0(x2) +80000e8c: 01720863 beq x4,x23,80000e9c +80000e90: 1b0012ef jal x5,80002040 +80000e94: 80000e84 .word 0x80000e84 +80000e98: 80005952 .word 0x80005952 +80000e9c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xdfd5edcf +80000ea0: 0004ac03 lw x24,0(x9) +80000ea4: 00448493 addi x9,x9,4 + +80000ea8 : +Zbkb_zip_cg_cmp_rd_rs1_b24: + zip x24, x24 # perform operation +80000ea8: 08fc1c13 zip x24,x24 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_zip_cg_cmp_rd_rs1_b24, Zbkb_zip_cg_cmp_rd_rs1_b24_str) +80000eac: 00012203 lw x4,0(x2) +80000eb0: 01820863 beq x4,x24,80000ec0 +80000eb4: 18c012ef jal x5,80002040 +80000eb8: 80000ea8 .word 0x80000ea8 +80000ebc: 80005989 .word 0x80005989 +80000ec0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x90547932 +80000ec4: 0004ac83 lw x25,0(x9) +80000ec8: 00448493 addi x9,x9,4 + +80000ecc : +Zbkb_zip_cg_cmp_rd_rs1_b25: + zip x25, x25 # perform operation +80000ecc: 08fc9c93 zip x25,x25 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_zip_cg_cmp_rd_rs1_b25, Zbkb_zip_cg_cmp_rd_rs1_b25_str) +80000ed0: 00012203 lw x4,0(x2) +80000ed4: 01920863 beq x4,x25,80000ee4 +80000ed8: 168012ef jal x5,80002040 +80000edc: 80000ecc .word 0x80000ecc +80000ee0: 800059c0 .word 0x800059c0 +80000ee4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x6a62f434 +80000ee8: 0004ad03 lw x26,0(x9) +80000eec: 00448493 addi x9,x9,4 + +80000ef0 : +Zbkb_zip_cg_cmp_rd_rs1_b26: + zip x26, x26 # perform operation +80000ef0: 08fd1d13 zip x26,x26 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_zip_cg_cmp_rd_rs1_b26, Zbkb_zip_cg_cmp_rd_rs1_b26_str) +80000ef4: 00012203 lw x4,0(x2) +80000ef8: 01a20863 beq x4,x26,80000f08 +80000efc: 144012ef jal x5,80002040 +80000f00: 80000ef0 .word 0x80000ef0 +80000f04: 800059f7 .word 0x800059f7 +80000f08: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xf566ef47 +80000f0c: 0004ad83 lw x27,0(x9) +80000f10: 00448493 addi x9,x9,4 + +80000f14 : +Zbkb_zip_cg_cmp_rd_rs1_b27: + zip x27, x27 # perform operation +80000f14: 08fd9d93 zip x27,x27 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkb_zip_cg_cmp_rd_rs1_b27, Zbkb_zip_cg_cmp_rd_rs1_b27_str) +80000f18: 00012203 lw x4,0(x2) +80000f1c: 01b20863 beq x4,x27,80000f2c +80000f20: 120012ef jal x5,80002040 +80000f24: 80000f14 .word 0x80000f14 +80000f28: 80005a2e .word 0x80005a2e +80000f2c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xc4fc45bb +80000f30: 0004ae03 lw x28,0(x9) +80000f34: 00448493 addi x9,x9,4 + +80000f38 : +Zbkb_zip_cg_cmp_rd_rs1_b28: + zip x28, x28 # perform operation +80000f38: 08fe1e13 zip x28,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_zip_cg_cmp_rd_rs1_b28, Zbkb_zip_cg_cmp_rd_rs1_b28_str) +80000f3c: 00012203 lw x4,0(x2) +80000f40: 01c20863 beq x4,x28,80000f50 +80000f44: 0fc012ef jal x5,80002040 +80000f48: 80000f38 .word 0x80000f38 +80000f4c: 80005a65 .word 0x80005a65 +80000f50: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xa42dc88a +80000f54: 0004ae83 lw x29,0(x9) +80000f58: 00448493 addi x9,x9,4 + +80000f5c : +Zbkb_zip_cg_cmp_rd_rs1_b29: + zip x29, x29 # perform operation +80000f5c: 08fe9e93 zip x29,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_zip_cg_cmp_rd_rs1_b29, Zbkb_zip_cg_cmp_rd_rs1_b29_str) +80000f60: 00012203 lw x4,0(x2) +80000f64: 01d20863 beq x4,x29,80000f74 +80000f68: 0d8012ef jal x5,80002040 +80000f6c: 80000f5c .word 0x80000f5c +80000f70: 80005a9c .word 0x80005a9c +80000f74: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x1cfc667b +80000f78: 0004af03 lw x30,0(x9) +80000f7c: 00448493 addi x9,x9,4 + +80000f80 : +Zbkb_zip_cg_cmp_rd_rs1_b30: + zip x30, x30 # perform operation +80000f80: 08ff1f13 zip x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_zip_cg_cmp_rd_rs1_b30, Zbkb_zip_cg_cmp_rd_rs1_b30_str) +80000f84: 00012203 lw x4,0(x2) +80000f88: 01e20863 beq x4,x30,80000f98 +80000f8c: 0b4012ef jal x5,80002040 +80000f90: 80000f80 .word 0x80000f80 +80000f94: 80005ad3 .word 0x80005ad3 +80000f98: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x3c92a6c1 +80000f9c: 0004af83 lw x31,0(x9) +80000fa0: 00448493 addi x9,x9,4 + +80000fa4 : +Zbkb_zip_cg_cmp_rd_rs1_b31: + zip x31, x31 # perform operation +80000fa4: 08ff9f93 zip x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_zip_cg_cmp_rd_rs1_b31, Zbkb_zip_cg_cmp_rd_rs1_b31_str) +80000fa8: 00012203 lw x4,0(x2) +80000fac: 01f20863 beq x4,x31,80000fbc +80000fb0: 090012ef jal x5,80002040 +80000fb4: 80000fa4 .word 0x80000fa4 +80000fb8: 80005b0a .word 0x80005b0a +80000fbc: 00410113 addi x2,x2,4 + +80000fc0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fc0: 00000513 addi x10,x0,0 +80000fc4: 00000073 ecall +80000fc8: fff00513 addi x10,x0,-1 +80000fcc: 1d800413 addi x8,x0,472 + +80000fd0 : +80000fd0: 34002373 csrrs x6,mscratch,x0 + +80000fd4 : +80000fd4: 23832383 lw x7,568(x6) +80000fd8: 23c32483 lw x9,572(x6) + +80000fdc : +80000fdc: 22032383 lw x7,544(x6) + +80000fe0 : +80000fe0: 25032483 lw x9,592(x6) +80000fe4: 34049073 csrrw x0,mscratch,x9 + +80000fe8 : +80000fe8: 24832483 lw x9,584(x6) +80000fec: 305493f3 csrrw x7,mtvec,x9 +80000ff0: ffc4f493 andi x9,x9,-4 +80000ff4: ffc3f393 andi x7,x7,-4 +80000ff8: 00749e63 bne x9,x7,80001014 + +80000ffc : +80000ffc: 00030493 addi x9,x6,0 + +80001000 : +80001000: 0004a783 lw x15,0(x9) +80001004: 00f3a023 sw x15,0(x7) +80001008: 00438393 addi x7,x7,4 +8000100c: 00448493 addi x9,x9,4 +80001010: fe83c8e3 blt x7,x8,80001000 +80001014: 0000100f fence.i + +80001018 : +80001018: 00000013 addi x0,x0,0 +8000101c: 00000013 addi x0,x0,0 +80001020: 00000497 auipc x9,0x0 +80001024: 29048493 addi x9,x9,656 # 800012b0 +80001028: 00000013 addi x0,x0,0 +8000102c: 00000013 addi x0,x0,0 +80001030: 00000013 addi x0,x0,0 +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 10e49863 bne x9,x14,80001150 +80001044: 00000013 addi x0,x0,0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 00005517 auipc x10,0x5 +80001064: 16d50513 addi x10,x10,365 # 800061cd +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00016097 auipc x1,0x16 +80001084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00005517 auipc x10,0x5 +800010a4: 16550513 addi x10,x10,357 # 80006205 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00016097 auipc x1,0x16 +800010c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00005517 auipc x10,0x5 +800010e4: 18550513 addi x10,x10,389 # 80006265 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00016097 auipc x1,0x16 +80001104: 464080e7 jalr x1,1124(x1) # 80017564 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00006517 auipc x10,0x6 +80001124: cf050513 addi x10,x10,-784 # 80006e10 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00016097 auipc x1,0x16 +80001144: 424080e7 jalr x1,1060(x1) # 80017564 +80001148: 00016097 auipc x1,0x16 +8000114c: 47c080e7 jalr x1,1148(x1) # 800175c4 + +80001150 : +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00003317 auipc x6,0x3 +80001164: 1c830313 addi x6,x6,456 # 80004328 +80001168: 00000013 addi x0,x0,0 +8000116c: 00000013 addi x0,x0,0 +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00032303 lw x6,0(x6) +80001184: 00000013 addi x0,x0,0 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00007397 auipc x7,0x7 +800011a4: 8d838393 addi x7,x7,-1832 # 80007a78 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 40730333 sub x6,x6,x7 +800011c4: 00000013 addi x0,x0,0 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 00007417 auipc x8,0x7 +800011e4: 89040413 addi x8,x8,-1904 # 80007a70 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00042203 lw x4,0(x8) +80001204: 00620863 beq x4,x6,80001214 +80001208: 6a1003ef jal x7,800020a8 +8000120c: 80001150 .word 0x80001150 +80001210: 800063b9 .word 0x800063b9 + +80001214 : +80001214: bad0e4b7 lui x9,0xbad0e +80001218: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000121c: 00e49a63 bne x9,x14,80001230 +80001220: 689003ef jal x7,800020a8 +80001224: 800012e4 .word 0x800012e4 +80001228: 80006227 .word 0x80006227 +8000122c: 00000341 .word 0x00000341 + +80001230 : +80001230: 00000013 addi x0,x0,0 +80001234: 00000013 addi x0,x0,0 +80001238: 00000013 addi x0,x0,0 +8000123c: 00000013 addi x0,x0,0 +80001240: 00005517 auipc x10,0x5 +80001244: f5450513 addi x10,x10,-172 # 80006194 +80001248: 00000013 addi x0,x0,0 +8000124c: 00000013 addi x0,x0,0 +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00016097 auipc x1,0x16 +80001264: 304080e7 jalr x1,772(x1) # 80017564 +80001268: 00016097 auipc x1,0x16 +8000126c: 33c080e7 jalr x1,828(x1) # 800175a4 + +80001270 : +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00005517 auipc x10,0x5 +80001284: f4d50513 addi x10,x10,-179 # 800061cd +80001288: 00000013 addi x0,x0,0 +8000128c: 00000013 addi x0,x0,0 +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00016097 auipc x1,0x16 +800012a4: 2c4080e7 jalr x1,708(x1) # 80017564 +800012a8: 00016097 auipc x1,0x16 +800012ac: 31c080e7 jalr x1,796(x1) # 800175c4 + +800012b0 : +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00000717 auipc x14,0x0 +800012c4: ff070713 addi x14,x14,-16 # 800012b0 +800012c8: 00000013 addi x0,x0,0 +800012cc: 00000013 addi x0,x0,0 +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: ce1ff06f jal x0,80000fc0 + +800012e4 : +800012e4: bad0e737 lui x14,0xbad0e +800012e8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +800012ec: cd5ff06f jal x0,80000fc0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 + +80001300 : +80001300: 0800006f jal x0,80001380 +80001304: 0880006f jal x0,8000138c +80001308: 0900006f jal x0,80001398 +8000130c: 0980006f jal x0,800013a4 +80001310: 0a00006f jal x0,800013b0 +80001314: 0a80006f jal x0,800013bc +80001318: 0b00006f jal x0,800013c8 +8000131c: 0b80006f jal x0,800013d4 +80001320: 0c00006f jal x0,800013e0 +80001324: 0c80006f jal x0,800013ec +80001328: 0d00006f jal x0,800013f8 +8000132c: 0d80006f jal x0,80001404 +80001330: 0e00006f jal x0,80001410 +80001334: 0e80006f jal x0,8000141c +80001338: 0f00006f jal x0,80001428 +8000133c: 0f80006f jal x0,80001434 +80001340: 1000006f jal x0,80001440 +80001344: 1080006f jal x0,8000144c +80001348: 1100006f jal x0,80001458 +8000134c: 1180006f jal x0,80001464 +80001350: 1200006f jal x0,80001470 +80001354: 1280006f jal x0,8000147c +80001358: 1300006f jal x0,80001488 +8000135c: 1380006f jal x0,80001494 +80001360: 1400006f jal x0,800014a0 +80001364: 13c0006f jal x0,800014a0 +80001368: 1380006f jal x0,800014a0 +8000136c: 1340006f jal x0,800014a0 +80001370: 1300006f jal x0,800014a0 +80001374: 12c0006f jal x0,800014a0 +80001378: 1280006f jal x0,800014a0 +8000137c: 1240006f jal x0,800014a0 + +80001380 : +80001380: 34011173 csrrw x2,mscratch,x2 +80001384: 26f12823 sw x15,624(x2) +80001388: 13c007ef jal x15,800014c4 +8000138c: 34011173 csrrw x2,mscratch,x2 +80001390: 26f12823 sw x15,624(x2) +80001394: 130007ef jal x15,800014c4 +80001398: 34011173 csrrw x2,mscratch,x2 +8000139c: 26f12823 sw x15,624(x2) +800013a0: 124007ef jal x15,800014c4 +800013a4: 34011173 csrrw x2,mscratch,x2 +800013a8: 26f12823 sw x15,624(x2) +800013ac: 118007ef jal x15,800014c4 +800013b0: 34011173 csrrw x2,mscratch,x2 +800013b4: 26f12823 sw x15,624(x2) +800013b8: 10c007ef jal x15,800014c4 +800013bc: 34011173 csrrw x2,mscratch,x2 +800013c0: 26f12823 sw x15,624(x2) +800013c4: 100007ef jal x15,800014c4 +800013c8: 34011173 csrrw x2,mscratch,x2 +800013cc: 26f12823 sw x15,624(x2) +800013d0: 0f4007ef jal x15,800014c4 +800013d4: 34011173 csrrw x2,mscratch,x2 +800013d8: 26f12823 sw x15,624(x2) +800013dc: 0e8007ef jal x15,800014c4 +800013e0: 34011173 csrrw x2,mscratch,x2 +800013e4: 26f12823 sw x15,624(x2) +800013e8: 0dc007ef jal x15,800014c4 +800013ec: 34011173 csrrw x2,mscratch,x2 +800013f0: 26f12823 sw x15,624(x2) +800013f4: 0d0007ef jal x15,800014c4 +800013f8: 34011173 csrrw x2,mscratch,x2 +800013fc: 26f12823 sw x15,624(x2) +80001400: 0c4007ef jal x15,800014c4 +80001404: 34011173 csrrw x2,mscratch,x2 +80001408: 26f12823 sw x15,624(x2) +8000140c: 0b8007ef jal x15,800014c4 +80001410: 34011173 csrrw x2,mscratch,x2 +80001414: 26f12823 sw x15,624(x2) +80001418: 0ac007ef jal x15,800014c4 +8000141c: 34011173 csrrw x2,mscratch,x2 +80001420: 26f12823 sw x15,624(x2) +80001424: 0a0007ef jal x15,800014c4 +80001428: 34011173 csrrw x2,mscratch,x2 +8000142c: 26f12823 sw x15,624(x2) +80001430: 094007ef jal x15,800014c4 +80001434: 34011173 csrrw x2,mscratch,x2 +80001438: 26f12823 sw x15,624(x2) +8000143c: 088007ef jal x15,800014c4 +80001440: 34011173 csrrw x2,mscratch,x2 +80001444: 26f12823 sw x15,624(x2) +80001448: 07c007ef jal x15,800014c4 +8000144c: 34011173 csrrw x2,mscratch,x2 +80001450: 26f12823 sw x15,624(x2) +80001454: 070007ef jal x15,800014c4 +80001458: 34011173 csrrw x2,mscratch,x2 +8000145c: 26f12823 sw x15,624(x2) +80001460: 064007ef jal x15,800014c4 +80001464: 34011173 csrrw x2,mscratch,x2 +80001468: 26f12823 sw x15,624(x2) +8000146c: 058007ef jal x15,800014c4 +80001470: 34011173 csrrw x2,mscratch,x2 +80001474: 26f12823 sw x15,624(x2) +80001478: 04c007ef jal x15,800014c4 +8000147c: 34011173 csrrw x2,mscratch,x2 +80001480: 26f12823 sw x15,624(x2) +80001484: 040007ef jal x15,800014c4 +80001488: 34011173 csrrw x2,mscratch,x2 +8000148c: 26f12823 sw x15,624(x2) +80001490: 034007ef jal x15,800014c4 +80001494: 34011173 csrrw x2,mscratch,x2 +80001498: 26f12823 sw x15,624(x2) +8000149c: 028007ef jal x15,800014c4 + +800014a0 : +800014a0: 00000317 auipc x6,0x0 +800014a4: b7830313 addi x6,x6,-1160 # 80001018 +800014a8: 00000013 addi x0,x0,0 +800014ac: 00000013 addi x0,x0,0 +800014b0: 00000013 addi x0,x0,0 +800014b4: 00000013 addi x0,x0,0 +800014b8: 00000013 addi x0,x0,0 +800014bc: 00000013 addi x0,x0,0 +800014c0: 00030067 jalr x0,0(x6) + +800014c4 : +800014c4: 26e12623 sw x14,620(x2) +800014c8: 34011773 csrrw x14,mscratch,x2 +800014cc: 26e12a23 sw x14,628(x2) +800014d0: 23012703 lw x14,560(x2) +800014d4: 00070067 jalr x0,0(x14) + +800014d8 : +800014d8: 26912423 sw x9,616(x2) +800014dc: 26812223 sw x8,612(x2) +800014e0: 26712023 sw x7,608(x2) +800014e4: 24612e23 sw x6,604(x2) +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00003317 auipc x6,0x3 +80001504: c0830313 addi x6,x6,-1016 # 80004108 +80001508: 00000013 addi x0,x0,0 +8000150c: 00000013 addi x0,x0,0 +80001510: 00000013 addi x0,x0,0 +80001514: 00000013 addi x0,x0,0 +80001518: 00000013 addi x0,x0,0 +8000151c: 00000013 addi x0,x0,0 +80001520: 00032383 lw x7,0(x6) +80001524: 00138393 addi x7,x7,1 +80001528: 00732023 sw x7,0(x6) +8000152c: 34202773 csrrs x14,mcause,x0 + +80001530 : +80001530: 800014b7 lui x9,0x80001 +80001534: fff48493 addi x9,x9,-1 # 80000fff +80001538: 00e4f4b3 and x9,x9,x14 + +8000153c : +8000153c: ffe48413 addi x8,x9,-2 +80001540: 00041663 bne x8,x0,8000154c + +80001544 : +80001544: 280506e3 beq x10,x0,80001fd0 +80001548: 58c0006f jal x0,80001ad4 + +8000154c : +8000154c: ff848413 addi x8,x9,-8 +80001550: 00245413 srli x8,x8,0x2 +80001554: 58041063 bne x8,x0,80001ad4 + +80001558 : +80001558: 26050ce3 beq x10,x0,80001fd0 + +8000155c : +8000155c: fff50493 addi x9,x10,-1 +80001560: 00500393 addi x7,x0,5 +80001564: 0274e063 bltu x9,x7,80001584 +80001568: 07300393 addi x7,x0,115 +8000156c: 00750463 beq x10,x7,80001574 +80001570: 0800006f jal x0,800015f0 + +80001574 : +80001574: 34102573 csrrs x10,mepc,x0 +80001578: 00450413 addi x8,x10,4 +8000157c: 34141073 csrrw x0,mepc,x8 +80001580: 7c00006f jal x0,80001d40 + +80001584 : +80001584: 341024f3 csrrs x9,mepc,x0 +80001588: 00448493 addi x9,x9,4 +8000158c: 34149073 csrrw x0,mepc,x9 +80001590: 00100393 addi x7,x0,1 +80001594: 00750e63 beq x10,x7,800015b0 +80001598: 00200393 addi x7,x0,2 +8000159c: 02750263 beq x10,x7,800015c0 +800015a0: 00300393 addi x7,x0,3 +800015a4: 02750c63 beq x10,x7,800015dc +800015a8: fff00513 addi x10,x0,-1 +800015ac: 7940006f jal x0,80001d40 + +800015b0 : +800015b0: 000024b7 lui x9,0x2 +800015b4: 80048493 addi x9,x9,-2048 # 1800 +800015b8: 3004a073 csrrs x0,mstatus,x9 +800015bc: 7840006f jal x0,80001d40 + +800015c0 : +800015c0: 000024b7 lui x9,0x2 +800015c4: 80048493 addi x9,x9,-2048 # 1800 +800015c8: 3004b073 csrrc x0,mstatus,x9 +800015cc: 000014b7 lui x9,0x1 +800015d0: 80048493 addi x9,x9,-2048 # 800 +800015d4: 3004a073 csrrs x0,mstatus,x9 +800015d8: 7680006f jal x0,80001d40 + +800015dc : +800015dc: 000024b7 lui x9,0x2 +800015e0: 80048493 addi x9,x9,-2048 # 1800 +800015e4: 3004b073 csrrc x0,mstatus,x9 +800015e8: 7580006f jal x0,80001d40 + +800015ec : +800015ec: 00000013 addi x0,x0,0 + +800015f0 : +800015f0: 00000013 addi x0,x0,0 +800015f4: 00000013 addi x0,x0,0 +800015f8: 00000013 addi x0,x0,0 +800015fc: 00000013 addi x0,x0,0 +80001600: 00000397 auipc x7,0x0 +80001604: 17038393 addi x7,x7,368 # 80001770 +80001608: 00000013 addi x0,x0,0 +8000160c: 00000013 addi x0,x0,0 +80001610: 00000013 addi x0,x0,0 +80001614: 00000013 addi x0,x0,0 +80001618: 00000013 addi x0,x0,0 +8000161c: 00000013 addi x0,x0,0 + +80001620 : +80001620: 0003a403 lw x8,0(x7) +80001624: 00a40863 beq x8,x10,80001634 +80001628: 04040863 beq x8,x0,80001678 +8000162c: 00838393 addi x7,x7,8 +80001630: ff1ff06f jal x0,80001620 + +80001634 : +80001634: 00008493 addi x9,x1,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000097 auipc x1,0x0 +80001644: 02408093 addi x1,x1,36 # 80001664 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 +80001660: 00038067 jalr x0,0(x7) + +80001664 : +80001664: 00048093 addi x1,x9,0 +80001668: 34102473 csrrs x8,mepc,x0 +8000166c: 00440413 addi x8,x8,4 +80001670: 34141073 csrrw x0,mepc,x8 +80001674: 6cc0006f jal x0,80001d40 + +80001678 : +80001678: 00050493 addi x9,x10,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00006517 auipc x10,0x6 +80001684: 1c750513 addi x10,x10,455 # 80007847 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00016097 auipc x1,0x16 +800016a4: ec4080e7 jalr x1,-316(x1) # 80017564 +800016a8: 00048513 addi x10,x9,0 +800016ac: 02000593 addi x11,x0,32 +800016b0: 4a8020ef jal x1,80003b58 +800016b4: 00000013 addi x0,x0,0 +800016b8: 00000013 addi x0,x0,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00004517 auipc x10,0x4 +800016c4: 5f850513 addi x10,x10,1528 # 80005cb8 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00000013 addi x0,x0,0 +800016ec: 00000013 addi x0,x0,0 +800016f0: 00000013 addi x0,x0,0 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00005517 auipc x10,0x5 +80001704: bce50513 addi x10,x10,-1074 # 800062ce +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: a8d50513 addi x10,x10,-1395 # 800061cd +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00016097 auipc x1,0x16 +8000176c: e5c080e7 jalr x1,-420(x1) # 800175c4 + +80001770 : +80001770: 30002573 .word 0x30002573 +80001774: 00008067 jalr x0,0(x1) +80001778: 30059073 .word 0x30059073 +8000177c: 00008067 jalr x0,0(x1) +80001780: 3005a073 .word 0x3005a073 +80001784: 00008067 jalr x0,0(x1) +80001788: 3005b073 .word 0x3005b073 +8000178c: 00008067 jalr x0,0(x1) +80001790: 30402573 .word 0x30402573 +80001794: 00008067 jalr x0,0(x1) +80001798: 30459073 .word 0x30459073 +8000179c: 00008067 jalr x0,0(x1) +800017a0: 3045a073 .word 0x3045a073 +800017a4: 00008067 jalr x0,0(x1) +800017a8: 3045b073 .word 0x3045b073 +800017ac: 00008067 jalr x0,0(x1) +800017b0: 30602573 .word 0x30602573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30659073 .word 0x30659073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3065a073 .word 0x3065a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3065b073 .word 0x3065b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30a02573 .word 0x30a02573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30a59073 .word 0x30a59073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 30a5a073 .word 0x30a5a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 30a5b073 .word 0x30a5b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 34402573 .word 0x34402573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 34459073 .word 0x34459073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3445a073 .word 0x3445a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3445b073 .word 0x3445b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 74702573 .word 0x74702573 +80001814: 00008067 jalr x0,0(x1) +80001818: 74759073 .word 0x74759073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 7475a073 .word 0x7475a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 7475b073 .word 0x7475b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 32002573 .word 0x32002573 +80001834: 00008067 jalr x0,0(x1) +80001838: 32059073 .word 0x32059073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3205a073 .word 0x3205a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3205b073 .word 0x3205b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: b0002573 .word 0xb0002573 +80001854: 00008067 jalr x0,0(x1) +80001858: b0059073 .word 0xb0059073 +8000185c: 00008067 jalr x0,0(x1) +80001860: b005a073 .word 0xb005a073 +80001864: 00008067 jalr x0,0(x1) +80001868: b005b073 .word 0xb005b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: b0202573 .word 0xb0202573 +80001874: 00008067 jalr x0,0(x1) +80001878: b0259073 .word 0xb0259073 +8000187c: 00008067 jalr x0,0(x1) +80001880: b025a073 .word 0xb025a073 +80001884: 00008067 jalr x0,0(x1) +80001888: b025b073 .word 0xb025b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: 10002573 .word 0x10002573 +80001894: 00008067 jalr x0,0(x1) +80001898: 10059073 .word 0x10059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: 1005a073 .word 0x1005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: 1005b073 .word 0x1005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: 10402573 .word 0x10402573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: 10459073 .word 0x10459073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: 1045a073 .word 0x1045a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: 1045b073 .word 0x1045b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10602573 .word 0x10602573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10659073 .word 0x10659073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1065a073 .word 0x1065a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1065b073 .word 0x1065b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10a02573 .word 0x10a02573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10a59073 .word 0x10a59073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 10a5a073 .word 0x10a5a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 10a5b073 .word 0x10a5b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 14402573 .word 0x14402573 +80001914: 00008067 jalr x0,0(x1) +80001918: 14459073 .word 0x14459073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1445a073 .word 0x1445a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1445b073 .word 0x1445b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 14d02573 .word 0x14d02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 14d59073 .word 0x14d59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 14d5a073 .word 0x14d5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 14d5b073 .word 0x14d5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 18002573 .word 0x18002573 +80001954: 00008067 jalr x0,0(x1) +80001958: 18059073 .word 0x18059073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1805a073 .word 0x1805a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1805b073 .word 0x1805b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 7a002573 .word 0x7a002573 +80001974: 00008067 jalr x0,0(x1) +80001978: 7a059073 .word 0x7a059073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 7a05a073 .word 0x7a05a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 7a05b073 .word 0x7a05b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 7a102573 .word 0x7a102573 +80001994: 00008067 jalr x0,0(x1) +80001998: 7a159073 .word 0x7a159073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 7a15a073 .word 0x7a15a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 7a15b073 .word 0x7a15b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a202573 .word 0x7a202573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a259073 .word 0x7a259073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a25a073 .word 0x7a25a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a25b073 .word 0x7a25b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a302573 .word 0x7a302573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a359073 .word 0x7a359073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a35a073 .word 0x7a35a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a35b073 .word 0x7a35b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a402573 .word 0x7a402573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a459073 .word 0x7a459073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a45a073 .word 0x7a45a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a45b073 .word 0x7a45b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a502573 .word 0x7a502573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a559073 .word 0x7a559073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a55a073 .word 0x7a55a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a55b073 .word 0x7a55b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a802573 .word 0x7a802573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a859073 .word 0x7a859073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a85a073 .word 0x7a85a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a85b073 .word 0x7a85b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7aa02573 .word 0x7aa02573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7aa59073 .word 0x7aa59073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7aa5a073 .word 0x7aa5a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7aa5b073 .word 0x7aa5b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 5a802573 .word 0x5a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 5a859073 .word 0x5a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 5a85a073 .word 0x5a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 5a85b073 .word 0x5a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 6a802573 .word 0x6a802573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 6a859073 .word 0x6a859073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 6a85a073 .word 0x6a85a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 6a85b073 .word 0x6a85b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 0005a503 lw x10,0(x11) +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 0045a503 lw x10,4(x11) +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 00c5a023 sw x12,0(x11) +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 00c5a223 sw x12,4(x11) +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 00000000 .word 0x00000000 + +80001ad4 : +80001ad4: 01000393 addi x7,x0,16 +80001ad8: 00075c63 bge x14,x0,80001af0 + +80001adc : +80001adc: 00171413 slli x8,x14,0x1 +80001ae0: ff240413 addi x8,x8,-14 +80001ae4: 00045663 bge x8,x0,80001af0 +80001ae8: 00c00393 addi x7,x0,12 +80001aec: 0040006f jal x0,80001af0 + +80001af0 : +80001af0: d6810113 addi x2,x2,-664 +80001af4: 4b012303 lw x6,1200(x2) +80001af8: 007304b3 add x9,x6,x7 +80001afc: 4a912823 sw x9,1200(x2) +80001b00: 49012403 lw x8,1168(x2) +80001b04: 40830333 sub x6,x6,x8 +80001b08: 29810113 addi x2,x2,664 +80001b0c: 1f812403 lw x8,504(x2) +80001b10: 00830333 add x6,x6,x8 +80001b14: 34102473 csrrs x8,mepc,x0 +80001b18: 00000013 addi x0,x0,0 +80001b1c: 00000013 addi x0,x0,0 +80001b20: 00004497 auipc x9,0x4 +80001b24: 17848493 addi x9,x9,376 # 80005c98 +80001b28: 00000013 addi x0,x0,0 +80001b2c: 00000013 addi x0,x0,0 +80001b30: 00000013 addi x0,x0,0 +80001b34: 00000013 addi x0,x0,0 +80001b38: 00000013 addi x0,x0,0 +80001b3c: 00000013 addi x0,x0,0 +80001b40: 0084a023 sw x8,0(x9) +80001b44: 00e4a423 sw x14,8(x9) +80001b48: 34302473 csrrs x8,mtval,x0 +80001b4c: 0084a823 sw x8,16(x9) +80001b50: 30002473 csrrs x8,mstatus,x0 +80001b54: 0084ac23 sw x8,24(x9) +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00015417 auipc x8,0x15 +80001b64: 97c40413 addi x8,x8,-1668 # 800164dc +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 007304b3 add x9,x6,x7 +80001b84: f2946663 bltu x8,x9,800012b0 + +80001b88 : +80001b88: 24012403 lw x8,576(x2) +80001b8c: 408787b3 sub x15,x15,x8 +80001b90: 00179493 slli x9,x15,0x1 +80001b94: 009787b3 add x15,x15,x9 +80001b98: 0057d793 srli x15,x15,0x5 +80001b9c: 00679793 slli x15,x15,0x6 +80001ba0: 0077e7b3 or x15,x15,x7 +80001ba4: 00378793 addi x15,x15,3 +80001ba8: 02075a63 bge x14,x0,80001bdc +80001bac: 00f00413 addi x8,x0,15 +80001bb0: 00877433 and x8,x14,x8 +80001bb4: 304024f3 csrrs x9,mie,x0 +80001bb8: 0084d4b3 srl x9,x9,x8 +80001bbc: 0014f493 andi x9,x9,1 +80001bc0: 00b49493 slli x9,x9,0xb +80001bc4: 0097e7b3 or x15,x15,x9 +80001bc8: 344024f3 csrrs x9,mip,x0 +80001bcc: 0084d4b3 srl x9,x9,x8 +80001bd0: 0014f493 andi x9,x9,1 +80001bd4: 00c49493 slli x9,x9,0xc +80001bd8: 0097e7b3 or x15,x15,x9 +80001bdc: 300023f3 csrrs x7,mstatus,x0 +80001be0: 00f39393 slli x7,x7,0xf +80001be4: 0023d393 srli x7,x7,0x2 +80001be8: 0021a437 lui x8,0x21a +80001bec: fe540413 addi x8,x8,-27 # 219fe5 +80001bf0: fff44413 xori x8,x8,-1 +80001bf4: 0083f433 and x8,x7,x8 +80001bf8: 0087e433 or x8,x15,x8 +80001bfc: 310024f3 csrrs x9,0x310,x0 +80001c00: 1c04f493 andi x9,x9,448 +80001c04: 00849493 slli x9,x9,0x8 +80001c08: 00946433 or x8,x8,x9 +80001c0c: 00032483 lw x9,0(x6) +80001c10: 00848e63 beq x9,x8,80001c2c +80001c14: 00040313 addi x6,x8,0 +80001c18: 00048213 addi x4,x9,0 +80001c1c: 48c003ef jal x7,800020a8 +80001c20: 80001b88 .word 0x80001b88 +80001c24: 800063d0 .word 0x800063d0 +80001c28: 00000341 .word 0x00000341 + +80001c2c : +80001c2c: 00070413 addi x8,x14,0 +80001c30: 00432483 lw x9,4(x6) +80001c34: 00848e63 beq x9,x8,80001c50 +80001c38: 00040313 addi x6,x8,0 +80001c3c: 00048213 addi x4,x9,0 +80001c40: 468003ef jal x7,800020a8 +80001c44: 80001c2c .word 0x80001c2c +80001c48: 800064d2 .word 0x800064d2 +80001c4c: 00000341 .word 0x00000341 +80001c50: 10074863 blt x14,x0,80001d60 + +80001c54 : +80001c54: 34102473 csrrs x8,mepc,x0 +80001c58: 00010493 addi x9,x2,0 +80001c5c: 0040006f jal x0,80001c60 + +80001c60 : +80001c60: 08000393 addi x7,x0,128 +80001c64: 04740863 beq x8,x7,80001cb4 +80001c68: 00238393 addi x7,x7,2 +80001c6c: 04740463 beq x8,x7,80001cb4 +80001c70: 04040263 beq x8,x0,80001cb4 +80001c74: 2084a383 lw x7,520(x9) +80001c78: 2104a783 lw x15,528(x9) +80001c7c: 007787b3 add x15,x15,x7 +80001c80: 00f47463 bgeu x8,x15,80001c88 +80001c84: 02747663 bgeu x8,x7,80001cb0 + +80001c88 : +80001c88: 1d84a383 lw x7,472(x9) +80001c8c: 1e04a783 lw x15,480(x9) +80001c90: 007787b3 add x15,x15,x7 +80001c94: 00f47463 bgeu x8,x15,80001c9c +80001c98: 00747c63 bgeu x8,x7,80001cb0 + +80001c9c : +80001c9c: 1e84a383 lw x7,488(x9) +80001ca0: 1f04a783 lw x15,496(x9) +80001ca4: 007787b3 add x15,x15,x7 +80001ca8: e2f47e63 bgeu x8,x15,800012e4 +80001cac: e2746c63 bltu x8,x7,800012e4 + +80001cb0 : +80001cb0: 40740433 sub x8,x8,x7 + +80001cb4 : +80001cb4: 00832483 lw x9,8(x6) +80001cb8: 00848e63 beq x9,x8,80001cd4 +80001cbc: 00040313 addi x6,x8,0 +80001cc0: 00048213 addi x4,x9,0 +80001cc4: 3e4003ef jal x7,800020a8 +80001cc8: 80001cb4 .word 0x80001cb4 +80001ccc: 800065cd .word 0x800065cd +80001cd0: 00000341 .word 0x00000341 + +80001cd4 : +80001cd4: 34102473 csrrs x8,mepc,x0 +80001cd8: 342023f3 csrrs x7,mcause,x0 +80001cdc: 00c00793 addi x15,x0,12 +80001ce0: 00f38a63 beq x7,x15,80001cf4 +80001ce4: 00100793 addi x15,x0,1 +80001ce8: 00f38663 beq x7,x15,80001cf4 +80001cec: 01400793 addi x15,x0,20 +80001cf0: 00f39663 bne x7,x15,80001cfc +80001cf4: 34109073 csrrw x0,mepc,x1 +80001cf8: 0100006f jal x0,80001d08 + +80001cfc : +80001cfc: 00400393 addi x7,x0,4 +80001d00: 00740433 add x8,x8,x7 +80001d04: 34141073 csrrw x0,mepc,x8 + +80001d08 : +80001d08: 34302473 csrrs x8,mtval,x0 + +80001d0c : +80001d0c: 00c32483 lw x9,12(x6) +80001d10: 00848e63 beq x9,x8,80001d2c +80001d14: 00040313 addi x6,x8,0 +80001d18: 00048213 addi x4,x9,0 +80001d1c: 38c003ef jal x7,800020a8 +80001d20: 80001d0c .word 0x80001d0c +80001d24: 800066c0 .word 0x800066c0 +80001d28: 00000341 .word 0x00000341 + +80001d2c : +80001d2c: 30102473 csrrs x8,misa,x0 +80001d30: 01841413 slli x8,x8,0x18 +80001d34: 00045263 bge x8,x0,80001d38 + +80001d38 : +80001d38: 10000393 addi x7,x0,256 +80001d3c: 05c0006f jal x0,80001d98 + +80001d40 : +80001d40: 25c12303 lw x6,604(x2) +80001d44: 26012383 lw x7,608(x2) +80001d48: 26412403 lw x8,612(x2) +80001d4c: 26812483 lw x9,616(x2) +80001d50: 26c12703 lw x14,620(x2) +80001d54: 27012783 lw x15,624(x2) +80001d58: 27412103 lw x2,628(x2) +80001d5c: 30200073 mret + +80001d60 : +80001d60: 00100413 addi x8,x0,1 +80001d64: 01f77393 andi x7,x14,31 +80001d68: 00741433 sll x8,x8,x7 +80001d6c: 304434f3 csrrc x9,mie,x8 +80001d70: 34443473 csrrc x8,mip,x8 + +80001d74 : +80001d74: 00832483 lw x9,8(x6) +80001d78: 00848e63 beq x9,x8,80001d94 +80001d7c: 00040313 addi x6,x8,0 +80001d80: 00048213 addi x4,x9,0 +80001d84: 324003ef jal x7,800020a8 +80001d88: 80001d74 .word 0x80001d74 +80001d8c: 80006833 .word 0x80006833 +80001d90: 00000341 .word 0x00000341 +80001d94: 00000393 addi x7,x0,0 + +80001d98 : +80001d98: 00000417 auipc x8,0x0 +80001d9c: 03c40413 addi x8,x8,60 # 80001dd4 +80001da0: 00740433 add x8,x8,x7 +80001da4: 00371393 slli x7,x14,0x3 +80001da8: 00740433 add x8,x8,x7 +80001dac: ff847413 andi x8,x8,-8 +80001db0: 00042403 lw x8,0(x8) + +80001db4 : +80001db4: 00040a63 beq x8,x0,80001dc8 +80001db8: 01f41393 slli x7,x8,0x1f +80001dbc: 0003d863 bge x7,x0,80001dcc +80001dc0: 00145413 srli x8,x8,0x1 +80001dc4: f6870ee3 beq x14,x8,80001d40 +80001dc8: d1cff06f jal x0,800012e4 + +80001dcc : +80001dcc: 00040067 jalr x0,0(x8) + +80001dd0 : + ... +80001dd8: 00000001 .word 0x00000001 +80001ddc: 00000000 .word 0x00000000 +80001de0: 00000001 .word 0x00000001 +80001de4: 00000000 .word 0x00000000 +80001de8: 80017000 .word 0x80017000 + ... +80001df8: 00000001 .word 0x00000001 +80001dfc: 00000000 .word 0x00000000 +80001e00: 00000001 .word 0x00000001 +80001e04: 00000000 .word 0x00000000 +80001e08: 80017014 .word 0x80017014 + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017030 .word 0x80017030 +80001e2c: 00000000 .word 0x00000000 +80001e30: 00000001 .word 0x00000001 +80001e34: 00000000 .word 0x00000000 +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 00000001 .word 0x00000001 +80001e4c: 00000000 .word 0x00000000 +80001e50: 00000001 .word 0x00000001 +80001e54: 00000000 .word 0x00000000 +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 00000001 .word 0x00000001 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 + ... + +80001ed0 : +80001ed0: 00000001 .word 0x00000001 +80001ed4: 00000000 .word 0x00000000 +80001ed8: 00000003 .word 0x00000003 +80001edc: 00000000 .word 0x00000000 +80001ee0: 00000005 .word 0x00000005 +80001ee4: 00000000 .word 0x00000000 +80001ee8: 00000007 .word 0x00000007 +80001eec: 00000000 .word 0x00000000 +80001ef0: 00000009 .word 0x00000009 +80001ef4: 00000000 .word 0x00000000 +80001ef8: 0000000b .word 0x0000000b +80001efc: 00000000 .word 0x00000000 +80001f00: 0000000d .word 0x0000000d +80001f04: 00000000 .word 0x00000000 +80001f08: 0000000f .word 0x0000000f +80001f0c: 00000000 .word 0x00000000 +80001f10: 00000011 .word 0x00000011 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000013 .word 0x00000013 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000015 .word 0x00000015 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000017 .word 0x00000017 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000019 .word 0x00000019 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000001b .word 0x0000001b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000001d .word 0x0000001d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000001f .word 0x0000001f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000021 .word 0x00000021 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000023 .word 0x00000023 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000025 .word 0x00000025 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000027 .word 0x00000027 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000029 .word 0x00000029 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000002b .word 0x0000002b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000002d .word 0x0000002d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000002f .word 0x0000002f + ... + +80001fd0 : +80001fd0: 300023f3 csrrs x7,mstatus,x0 +80001fd4: 00b3d493 srli x9,x7,0xb +80001fd8: 0034f493 andi x9,x9,3 +80001fdc: ffd48413 addi x8,x9,-3 +80001fe0: 341023f3 csrrs x7,mepc,x0 +80001fe4: 00000493 addi x9,x0,0 +80001fe8: 02040c63 beq x8,x0,80002020 +80001fec: 29810113 addi x2,x2,664 +80001ff0: 310023f3 csrrs x7,0x310,x0 +80001ff4: 01839393 slli x7,x7,0x18 +80001ff8: 0003da63 bge x7,x0,8000200c + +80001ffc : +80001ffc: 29810113 addi x2,x2,664 +80002000: 47012783 lw x15,1136(x2) +80002004: d6810113 addi x2,x2,-664 +80002008: 0080006f jal x0,80002010 + +8000200c : +8000200c: f4012783 lw x15,-192(x2) +80002010: 341023f3 csrrs x7,mepc,x0 +80002014: 40f383b3 sub x7,x7,x15 +80002018: d6810113 addi x2,x2,-664 +8000201c: 1d812483 lw x9,472(x2) + +80002020 : +80002020: 007483b3 add x7,x9,x7 +80002024: 25c12303 lw x6,604(x2) +80002028: 26412403 lw x8,612(x2) +8000202c: 26812483 lw x9,616(x2) +80002030: 26c12703 lw x14,620(x2) +80002034: 27012783 lw x15,624(x2) +80002038: 27412103 lw x2,628(x2) +8000203c: 00438067 jalr x0,4(x7) + +80002040 : +80002040: 00004217 auipc x4,0x4 +80002044: b1020213 addi x4,x4,-1264 # 80005b50 +80002048: 02522423 sw x5,40(x4) # 28 +8000204c: 00122423 sw x1,8(x4) # 8 +80002050: 00022023 sw x0,0(x4) # 0 +80002054: 0880006f jal x0,800020dc + +80002058 : +80002058: 00004397 auipc x7,0x4 +8000205c: af838393 addi x7,x7,-1288 # 80005b50 +80002060: 0483a023 sw x8,64(x7) +80002064: 0243a023 sw x4,32(x7) +80002068: 0253a423 sw x5,40(x7) +8000206c: 0013a423 sw x1,8(x7) +80002070: 0003a023 sw x0,0(x7) +80002074: 00038213 addi x4,x7,0 +80002078: 00040293 addi x5,x8,0 +8000207c: 0600006f jal x0,800020dc + +80002080 : +80002080: 00004697 auipc x13,0x4 +80002084: ad068693 addi x13,x13,-1328 # 80005b50 +80002088: 06e6a823 sw x14,112(x13) +8000208c: 0246a023 sw x4,32(x13) +80002090: 0256a423 sw x5,40(x13) +80002094: 0016a423 sw x1,8(x13) +80002098: 0006a023 sw x0,0(x13) +8000209c: 00068213 addi x4,x13,0 +800020a0: 00070293 addi x5,x14,0 +800020a4: 0380006f jal x0,800020dc + +800020a8 : +800020a8: 00004497 auipc x9,0x4 +800020ac: aa848493 addi x9,x9,-1368 # 80005b50 +800020b0: 0674a423 sw x7,104(x9) +800020b4: 0244a023 sw x4,32(x9) +800020b8: 0254a423 sw x5,40(x9) +800020bc: 0014a423 sw x1,8(x9) +800020c0: 00300093 addi x1,x0,3 +800020c4: 0014a023 sw x1,0(x9) +800020c8: 1064a823 sw x6,272(x9) +800020cc: 1044ac23 sw x4,280(x9) +800020d0: 00048213 addi x4,x9,0 +800020d4: 00038293 addi x5,x7,0 +800020d8: 0040006f jal x0,800020dc + +800020dc : +800020dc: 00222823 sw x2,16(x4) # 10 +800020e0: 00322c23 sw x3,24(x4) # 18 +800020e4: 02622823 sw x6,48(x4) # 30 +800020e8: 02722c23 sw x7,56(x4) # 38 +800020ec: 04822023 sw x8,64(x4) # 40 +800020f0: 04922423 sw x9,72(x4) # 48 +800020f4: 04a22823 sw x10,80(x4) # 50 +800020f8: 04b22c23 sw x11,88(x4) # 58 +800020fc: 06c22023 sw x12,96(x4) # 60 +80002100: 06d22423 sw x13,104(x4) # 68 +80002104: 06e22823 sw x14,112(x4) # 70 +80002108: 06f22c23 sw x15,120(x4) # 78 +8000210c: 09022023 sw x16,128(x4) # 80 +80002110: 09122423 sw x17,136(x4) # 88 +80002114: 09222823 sw x18,144(x4) # 90 +80002118: 09322c23 sw x19,152(x4) # 98 +8000211c: 0b422023 sw x20,160(x4) # a0 +80002120: 0b522423 sw x21,168(x4) # a8 +80002124: 0b622823 sw x22,176(x4) # b0 +80002128: 0b722c23 sw x23,184(x4) # b8 +8000212c: 0d822023 sw x24,192(x4) # c0 +80002130: 0d922423 sw x25,200(x4) # c8 +80002134: 0da22823 sw x26,208(x4) # d0 +80002138: 0db22c23 sw x27,216(x4) # d8 +8000213c: 0fc22023 sw x28,224(x4) # e0 +80002140: 0fd22423 sw x29,232(x4) # e8 +80002144: 0fe22823 sw x30,240(x4) # f0 +80002148: 0ff22c23 sw x31,248(x4) # f8 + +8000214c : +8000214c: 00004497 auipc x9,0x4 +80002150: a044a483 lw x9,-1532(x9) # 80005b50 +80002154: 00300513 addi x10,x0,3 +80002158: 18a48a63 beq x9,x10,800022ec + +8000215c : +8000215c: ffa2d303 lhu x6,-6(x5) +80002160: ff82d383 lhu x7,-8(x5) +80002164: 01031313 slli x6,x6,0x10 +80002168: 00736333 or x6,x6,x7 +8000216c: 00f35393 srli x7,x6,0xf +80002170: 01f3f393 andi x7,x7,31 +80002174: 01435413 srli x8,x6,0x14 +80002178: 01f47413 andi x8,x8,31 +8000217c: 10822223 sw x8,260(x4) # 104 +80002180: 00341313 slli x6,x8,0x3 +80002184: 00620333 add x6,x4,x6 +80002188: 00032303 lw x6,0(x6) +8000218c: 10622823 sw x6,272(x4) # 110 +80002190: ff62d303 lhu x6,-10(x5) +80002194: ff42d383 lhu x7,-12(x5) +80002198: 01031313 slli x6,x6,0x10 +8000219c: 00736333 or x6,x6,x7 +800021a0: 00030513 addi x10,x6,0 +800021a4: 07f37413 andi x8,x6,127 +800021a8: 00300493 addi x9,x0,3 +800021ac: 0c941463 bne x8,x9,80002274 +800021b0: 00c35413 srli x8,x6,0xc +800021b4: 00747413 andi x8,x8,7 +800021b8: 00200493 addi x9,x0,2 +800021bc: 0a941c63 bne x8,x9,80002274 +800021c0: 41435393 srai x7,x6,0x14 +800021c4: 00f35313 srli x6,x6,0xf +800021c8: 01f37313 andi x6,x6,31 +800021cc: 00331313 slli x6,x6,0x3 +800021d0: 00620333 add x6,x4,x6 +800021d4: 00032303 lw x6,0(x6) +800021d8: 00730333 add x6,x6,x7 +800021dc: 00337413 andi x8,x6,3 +800021e0: 0c041663 bne x8,x0,800022ac +800021e4: 00000013 addi x0,x0,0 +800021e8: 00000013 addi x0,x0,0 +800021ec: 00000013 addi x0,x0,0 +800021f0: 00000013 addi x0,x0,0 +800021f4: 00000013 addi x0,x0,0 +800021f8: 00000013 addi x0,x0,0 +800021fc: 00000013 addi x0,x0,0 +80002200: 00005417 auipc x8,0x5 +80002204: 69040413 addi x8,x8,1680 # 80007890 +80002208: 00000013 addi x0,x0,0 +8000220c: 00000013 addi x0,x0,0 +80002210: 00000013 addi x0,x0,0 +80002214: 00000013 addi x0,x0,0 +80002218: 00000013 addi x0,x0,0 +8000221c: 00000013 addi x0,x0,0 +80002220: 08836663 bltu x6,x8,800022ac +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00014417 auipc x8,0x14 +80002244: 2a040413 addi x8,x8,672 # 800164e0 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: ffc40413 addi x8,x8,-4 +80002264: 04646463 bltu x8,x6,800022ac +80002268: 00032303 lw x6,0(x6) +8000226c: 10622c23 sw x6,280(x4) # 118 +80002270: 3700006f jal x0,800025e0 + +80002274 : +80002274: 00100413 addi x8,x0,1 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00004497 auipc x9,0x4 +80002284: 9f848493 addi x9,x9,-1544 # 80005c78 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: 0084a023 sw x8,0(x9) +800022a4: 10a22c23 sw x10,280(x4) # 118 +800022a8: 3380006f jal x0,800025e0 + +800022ac : +800022ac: 00200413 addi x8,x0,2 +800022b0: 00000013 addi x0,x0,0 +800022b4: 00000013 addi x0,x0,0 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: 9b848493 addi x9,x9,-1608 # 80005c78 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10622c23 sw x6,280(x4) # 118 +800022e8: 2f80006f jal x0,800025e0 + +800022ec : +800022ec: 0042a303 lw x6,4(x5) +800022f0: 00004817 auipc x16,0x4 +800022f4: 99880813 addi x16,x16,-1640 # 80005c88 +800022f8: 00682023 sw x6,0(x16) +800022fc: 0002a303 lw x6,0(x5) +80002300: 10622423 sw x6,264(x4) # 108 +80002304: 00004817 auipc x16,0x4 +80002308: 98480813 addi x16,x16,-1660 # 80005c88 +8000230c: 00082303 lw x6,0(x16) +80002310: 00004397 auipc x7,0x4 +80002314: 0a938393 addi x7,x7,169 # 800063b9 +80002318: 28730463 beq x6,x7,800025a0 +8000231c: 00000413 addi x8,x0,0 +80002320: 00004817 auipc x16,0x4 +80002324: 96080813 addi x16,x16,-1696 # 80005c80 +80002328: 00882023 sw x8,0(x16) +8000232c: 00004397 auipc x7,0x4 +80002330: 0a438393 addi x7,x7,164 # 800063d0 +80002334: 00731863 bne x6,x7,80002344 +80002338: 00100413 addi x8,x0,1 +8000233c: 00000493 addi x9,x0,0 +80002340: 2740006f jal x0,800025b4 +80002344: 00004397 auipc x7,0x4 +80002348: 18e38393 addi x7,x7,398 # 800064d2 +8000234c: 00731863 bne x6,x7,8000235c +80002350: 00200413 addi x8,x0,2 +80002354: 00000493 addi x9,x0,0 +80002358: 25c0006f jal x0,800025b4 +8000235c: 00004397 auipc x7,0x4 +80002360: 27138393 addi x7,x7,625 # 800065cd +80002364: 00731863 bne x6,x7,80002374 +80002368: 00300413 addi x8,x0,3 +8000236c: 00000493 addi x9,x0,0 +80002370: 2440006f jal x0,800025b4 +80002374: 00004397 auipc x7,0x4 +80002378: 34c38393 addi x7,x7,844 # 800066c0 +8000237c: 00731863 bne x6,x7,8000238c +80002380: 00400413 addi x8,x0,4 +80002384: 00000493 addi x9,x0,0 +80002388: 22c0006f jal x0,800025b4 +8000238c: 00004397 auipc x7,0x4 +80002390: 4a738393 addi x7,x7,1191 # 80006833 +80002394: 00731863 bne x6,x7,800023a4 +80002398: 00500413 addi x8,x0,5 +8000239c: 00000493 addi x9,x0,0 +800023a0: 2140006f jal x0,800025b4 +800023a4: 00004397 auipc x7,0x4 +800023a8: 41338393 addi x7,x7,1043 # 800067b7 +800023ac: 00731863 bne x6,x7,800023bc +800023b0: 00600413 addi x8,x0,6 +800023b4: 00000493 addi x9,x0,0 +800023b8: 1fc0006f jal x0,800025b4 +800023bc: 00004397 auipc x7,0x4 +800023c0: 43938393 addi x7,x7,1081 # 800067f5 +800023c4: 00731863 bne x6,x7,800023d4 +800023c8: 00700413 addi x8,x0,7 +800023cc: 00000493 addi x9,x0,0 +800023d0: 1e40006f jal x0,800025b4 +800023d4: 00004397 auipc x7,0x4 +800023d8: 03c38393 addi x7,x7,60 # 80006410 +800023dc: 00731863 bne x6,x7,800023ec +800023e0: 00100413 addi x8,x0,1 +800023e4: 00100493 addi x9,x0,1 +800023e8: 1cc0006f jal x0,800025b4 +800023ec: 00004397 auipc x7,0x4 +800023f0: 12438393 addi x7,x7,292 # 80006510 +800023f4: 00731863 bne x6,x7,80002404 +800023f8: 00200413 addi x8,x0,2 +800023fc: 00100493 addi x9,x0,1 +80002400: 1b40006f jal x0,800025b4 +80002404: 00004397 auipc x7,0x4 +80002408: 20538393 addi x7,x7,517 # 80006609 +8000240c: 00731863 bne x6,x7,8000241c +80002410: 00300413 addi x8,x0,3 +80002414: 00100493 addi x9,x0,1 +80002418: 19c0006f jal x0,800025b4 +8000241c: 00004397 auipc x7,0x4 +80002420: 2e138393 addi x7,x7,737 # 800066fd +80002424: 00731863 bne x6,x7,80002434 +80002428: 00400413 addi x8,x0,4 +8000242c: 00100493 addi x9,x0,1 +80002430: 1840006f jal x0,800025b4 +80002434: 00004397 auipc x7,0x4 +80002438: 43a38393 addi x7,x7,1082 # 8000686e +8000243c: 00731863 bne x6,x7,8000244c +80002440: 00500413 addi x8,x0,5 +80002444: 00100493 addi x9,x0,1 +80002448: 16c0006f jal x0,800025b4 +8000244c: 00004397 auipc x7,0x4 +80002450: 00438393 addi x7,x7,4 # 80006450 +80002454: 00731863 bne x6,x7,80002464 +80002458: 00100413 addi x8,x0,1 +8000245c: 00200493 addi x9,x0,2 +80002460: 1540006f jal x0,800025b4 +80002464: 00004397 auipc x7,0x4 +80002468: 0ea38393 addi x7,x7,234 # 8000654e +8000246c: 00731863 bne x6,x7,8000247c +80002470: 00200413 addi x8,x0,2 +80002474: 00200493 addi x9,x0,2 +80002478: 13c0006f jal x0,800025b4 +8000247c: 00004397 auipc x7,0x4 +80002480: 1c938393 addi x7,x7,457 # 80006645 +80002484: 00731863 bne x6,x7,80002494 +80002488: 00300413 addi x8,x0,3 +8000248c: 00200493 addi x9,x0,2 +80002490: 1240006f jal x0,800025b4 +80002494: 00004397 auipc x7,0x4 +80002498: 2a638393 addi x7,x7,678 # 8000673a +8000249c: 00731863 bne x6,x7,800024ac +800024a0: 00400413 addi x8,x0,4 +800024a4: 00200493 addi x9,x0,2 +800024a8: 10c0006f jal x0,800025b4 +800024ac: 00004397 auipc x7,0x4 +800024b0: 3fd38393 addi x7,x7,1021 # 800068a9 +800024b4: 00731863 bne x6,x7,800024c4 +800024b8: 00500413 addi x8,x0,5 +800024bc: 00200493 addi x9,x0,2 +800024c0: 0f40006f jal x0,800025b4 +800024c4: 00004397 auipc x7,0x4 +800024c8: fcd38393 addi x7,x7,-51 # 80006491 +800024cc: 00731863 bne x6,x7,800024dc +800024d0: 00100413 addi x8,x0,1 +800024d4: 00300493 addi x9,x0,3 +800024d8: 0dc0006f jal x0,800025b4 +800024dc: 00004397 auipc x7,0x4 +800024e0: 0b138393 addi x7,x7,177 # 8000658d +800024e4: 00731863 bne x6,x7,800024f4 +800024e8: 00200413 addi x8,x0,2 +800024ec: 00300493 addi x9,x0,3 +800024f0: 0c40006f jal x0,800025b4 +800024f4: 00004397 auipc x7,0x4 +800024f8: 18e38393 addi x7,x7,398 # 80006682 +800024fc: 00731863 bne x6,x7,8000250c +80002500: 00300413 addi x8,x0,3 +80002504: 00300493 addi x9,x0,3 +80002508: 0ac0006f jal x0,800025b4 +8000250c: 00004397 auipc x7,0x4 +80002510: 26c38393 addi x7,x7,620 # 80006778 +80002514: 00731863 bne x6,x7,80002524 +80002518: 00400413 addi x8,x0,4 +8000251c: 00300493 addi x9,x0,3 +80002520: 0940006f jal x0,800025b4 +80002524: 00004397 auipc x7,0x4 +80002528: 3c138393 addi x7,x7,961 # 800068e5 +8000252c: 00731863 bne x6,x7,8000253c +80002530: 00500413 addi x8,x0,5 +80002534: 00300493 addi x9,x0,3 +80002538: 07c0006f jal x0,800025b4 +8000253c: 00004397 auipc x7,0x4 +80002540: 3e638393 addi x7,x7,998 # 80006922 +80002544: 00731863 bne x6,x7,80002554 +80002548: 00800413 addi x8,x0,8 +8000254c: 00000493 addi x9,x0,0 +80002550: 0640006f jal x0,800025b4 +80002554: 00004397 auipc x7,0x4 +80002558: 41d38393 addi x7,x7,1053 # 80006971 +8000255c: 00731863 bne x6,x7,8000256c +80002560: 00800413 addi x8,x0,8 +80002564: 00000493 addi x9,x0,0 +80002568: 04c0006f jal x0,800025b4 +8000256c: 00004397 auipc x7,0x4 +80002570: 50038393 addi x7,x7,1280 # 80006a6c +80002574: 00731863 bne x6,x7,80002584 +80002578: 00800413 addi x8,x0,8 +8000257c: 00100493 addi x9,x0,1 +80002580: 0340006f jal x0,800025b4 +80002584: 00004397 auipc x7,0x4 +80002588: 5e438393 addi x7,x7,1508 # 80006b68 +8000258c: 00731863 bne x6,x7,8000259c +80002590: 00800413 addi x8,x0,8 +80002594: 00200493 addi x9,x0,2 +80002598: 01c0006f jal x0,800025b4 +8000259c: 0340006f jal x0,800025d0 + +800025a0 : +800025a0: 00900413 addi x8,x0,9 +800025a4: 00003817 auipc x16,0x3 +800025a8: 6dc80813 addi x16,x16,1756 # 80005c80 +800025ac: 00882023 sw x8,0(x16) +800025b0: 0300006f jal x0,800025e0 + +800025b4 : +800025b4: 00003817 auipc x16,0x3 +800025b8: 6cc80813 addi x16,x16,1740 # 80005c80 +800025bc: 00882023 sw x8,0(x16) +800025c0: 00003817 auipc x16,0x3 +800025c4: 6c480813 addi x16,x16,1732 # 80005c84 +800025c8: 00982023 sw x9,0(x16) +800025cc: 0140006f jal x0,800025e0 + +800025d0 : +800025d0: 00003817 auipc x16,0x3 +800025d4: 6b080813 addi x16,x16,1712 # 80005c80 +800025d8: 00082023 sw x0,0(x16) +800025dc: 0040006f jal x0,800025e0 + +800025e0 : +800025e0: 0002a303 lw x6,0(x5) +800025e4: 10622423 sw x6,264(x4) # 108 +800025e8: 00035383 lhu x7,0(x6) +800025ec: 0033f413 andi x8,x7,3 +800025f0: 00300493 addi x9,x0,3 +800025f4: 00941863 bne x8,x9,80002604 +800025f8: 00235403 lhu x8,2(x6) +800025fc: 01041413 slli x8,x8,0x10 +80002600: 0083e3b3 or x7,x7,x8 +80002604: 10722023 sw x7,256(x4) # 100 +80002608: 0042a303 lw x6,4(x5) +8000260c: 12622023 sw x6,288(x4) # 120 + +80002610 : +80002610: 00000013 addi x0,x0,0 +80002614: 00000013 addi x0,x0,0 +80002618: 00000013 addi x0,x0,0 +8000261c: 00000013 addi x0,x0,0 +80002620: 00004517 auipc x10,0x4 +80002624: bad50513 addi x10,x10,-1107 # 800061cd +80002628: 00000013 addi x0,x0,0 +8000262c: 00000013 addi x0,x0,0 +80002630: 00000013 addi x0,x0,0 +80002634: 00000013 addi x0,x0,0 +80002638: 00000013 addi x0,x0,0 +8000263c: 00000013 addi x0,x0,0 +80002640: 00015097 auipc x1,0x15 +80002644: f24080e7 jalr x1,-220(x1) # 80017564 +80002648: 00000013 addi x0,x0,0 +8000264c: 00000013 addi x0,x0,0 +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: ba550513 addi x10,x10,-1115 # 80006205 +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 + +80002688 : +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: c1c50513 addi x10,x10,-996 # 800062bc +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00003517 auipc x10,0x3 +800026cc: 5a852503 lw x10,1448(x10) # 80005c70 +800026d0: 00015097 auipc x1,0x15 +800026d4: e94080e7 jalr x1,-364(x1) # 80017564 + +800026d8 : +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: bee50513 addi x10,x10,-1042 # 800062ce +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 +80002708: 00003517 auipc x10,0x3 +8000270c: 44852503 lw x10,1096(x10) # 80005b50 +80002710: 00300593 addi x11,x0,3 +80002714: 52b50c63 beq x10,x11,80002c4c +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: bb050513 addi x10,x10,-1104 # 800062d0 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 50852503 lw x10,1288(x10) # 80005c50 +80002750: 02000593 addi x11,x0,32 +80002754: 00357613 andi x12,x10,3 +80002758: 00300693 addi x13,x0,3 +8000275c: 00d60463 beq x12,x13,80002764 +80002760: 01000593 addi x11,x0,16 +80002764: 3f4010ef jal x1,80003b58 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00003517 auipc x10,0x3 +80002784: 53850513 addi x10,x10,1336 # 80005cb8 +80002788: 00000013 addi x0,x0,0 +8000278c: 00000013 addi x0,x0,0 +80002790: 00000013 addi x0,x0,0 +80002794: 00000013 addi x0,x0,0 +80002798: 00000013 addi x0,x0,0 +8000279c: 00000013 addi x0,x0,0 +800027a0: 00015097 auipc x1,0x15 +800027a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00004517 auipc x10,0x4 +800027c4: b2450513 addi x10,x10,-1244 # 800062e4 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00003517 auipc x10,0x3 +800027ec: 47052503 lw x10,1136(x10) # 80005c58 +800027f0: 02000593 addi x11,x0,32 +800027f4: 364010ef jal x1,80003b58 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00003517 auipc x10,0x3 +80002804: 4b850513 addi x10,x10,1208 # 80005cb8 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00000013 addi x0,x0,0 +8000282c: 00000013 addi x0,x0,0 +80002830: 00000013 addi x0,x0,0 +80002834: 00000013 addi x0,x0,0 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00004517 auipc x10,0x4 +80002844: 4db50513 addi x10,x10,1243 # 80006d1b +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00003517 auipc x10,0x3 +8000286c: 2e852503 lw x10,744(x10) # 80005b50 +80002870: 00050663 beq x10,x0,8000287c +80002874: 00300593 addi x11,x0,3 +80002878: 04b51063 bne x10,x11,800028b8 +8000287c: 07800593 addi x11,x0,120 +80002880: 00003617 auipc x12,0x3 +80002884: 43860613 addi x12,x12,1080 # 80005cb8 +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00b60023 sb x11,0(x12) +800028a4: 00160613 addi x12,x12,1 +800028a8: 00003517 auipc x10,0x3 +800028ac: 3ac52503 lw x10,940(x10) # 80005c54 +800028b0: 324010ef jal x1,80003bd4 +800028b4: 1180006f jal x0,800029cc + +800028b8 : +800028b8: 00100593 addi x11,x0,1 +800028bc: 04b50863 beq x10,x11,8000290c +800028c0: 00400593 addi x11,x0,4 +800028c4: 08b50a63 beq x10,x11,80002958 +800028c8: 00500593 addi x11,x0,5 +800028cc: 0cb50463 beq x10,x11,80002994 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00004517 auipc x10,0x4 +800028e4: 55150513 addi x10,x10,1361 # 80006e31 +800028e8: 00000013 addi x0,x0,0 +800028ec: 00000013 addi x0,x0,0 +800028f0: 00000013 addi x0,x0,0 +800028f4: 00000013 addi x0,x0,0 +800028f8: 00000013 addi x0,x0,0 +800028fc: 00000013 addi x0,x0,0 +80002900: 00015097 auipc x1,0x15 +80002904: c64080e7 jalr x1,-924(x1) # 80017564 +80002908: 1000006f jal x0,80002a08 + +8000290c : +8000290c: 06600593 addi x11,x0,102 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00003617 auipc x12,0x3 +80002924: 39860613 addi x12,x12,920 # 80005cb8 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00b60023 sb x11,0(x12) +80002944: 00160613 addi x12,x12,1 +80002948: 00003517 auipc x10,0x3 +8000294c: 30c52503 lw x10,780(x10) # 80005c54 +80002950: 284010ef jal x1,80003bd4 +80002954: 0780006f jal x0,800029cc + +80002958 : +80002958: 07600593 addi x11,x0,118 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 35860613 addi x12,x12,856 # 80005cb8 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 2cc52503 lw x10,716(x10) # 80005c54 +80002990: 244010ef jal x1,80003bd4 + +80002994 : +80002994: 00000013 addi x0,x0,0 +80002998: 00000013 addi x0,x0,0 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00004517 auipc x10,0x4 +800029a4: 37450513 addi x10,x10,884 # 80006d14 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00015097 auipc x1,0x15 +800029c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800029c8: 0400006f jal x0,80002a08 + +800029cc : +800029cc: 00000013 addi x0,x0,0 +800029d0: 00000013 addi x0,x0,0 +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00003517 auipc x10,0x3 +800029e4: 2d850513 addi x10,x10,728 # 80005cb8 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 + +80002a08 : +80002a08: 00000013 addi x0,x0,0 +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00004517 auipc x10,0x4 +80002a24: 30c50513 addi x10,x10,780 # 80006d2c +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80002a48: 00003517 auipc x10,0x3 +80002a4c: 10852503 lw x10,264(x10) # 80005b50 +80002a50: 00100593 addi x11,x0,1 +80002a54: 00b51c63 bne x10,x11,80002a6c +80002a58: 00003517 auipc x10,0x3 +80002a5c: 20852503 lw x10,520(x10) # 80005c60 +80002a60: 02000593 addi x11,x0,32 +80002a64: 0f4010ef jal x1,80003b58 +80002a68: 0140006f jal x0,80002a7c + +80002a6c : +80002a6c: 00003517 auipc x10,0x3 +80002a70: 1f452503 lw x10,500(x10) # 80005c60 +80002a74: 02000593 addi x11,x0,32 +80002a78: 0e0010ef jal x1,80003b58 + +80002a7c : +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00003517 auipc x10,0x3 +80002a84: 23850513 addi x10,x10,568 # 80005cb8 +80002a88: 00000013 addi x0,x0,0 +80002a8c: 00000013 addi x0,x0,0 +80002a90: 00000013 addi x0,x0,0 +80002a94: 00000013 addi x0,x0,0 +80002a98: 00000013 addi x0,x0,0 +80002a9c: 00000013 addi x0,x0,0 +80002aa0: 00015097 auipc x1,0x15 +80002aa4: ac4080e7 jalr x1,-1340(x1) # 80017564 +80002aa8: 00003517 auipc x10,0x3 +80002aac: 1d052503 lw x10,464(x10) # 80005c78 +80002ab0: 08051e63 bne x10,x0,80002b4c +80002ab4: 00000013 addi x0,x0,0 +80002ab8: 00000013 addi x0,x0,0 +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00004517 auipc x10,0x4 +80002ac4: 28350513 addi x10,x10,643 # 80006d43 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 06852503 lw x10,104(x10) # 80005b50 +80002af0: 00100593 addi x11,x0,1 +80002af4: 00b51c63 bne x10,x11,80002b0c +80002af8: 00003517 auipc x10,0x3 +80002afc: 17052503 lw x10,368(x10) # 80005c68 +80002b00: 02000593 addi x11,x0,32 +80002b04: 054010ef jal x1,80003b58 +80002b08: 0140006f jal x0,80002b1c + +80002b0c : +80002b0c: 00003517 auipc x10,0x3 +80002b10: 15c52503 lw x10,348(x10) # 80005c68 +80002b14: 02000593 addi x11,x0,32 +80002b18: 040010ef jal x1,80003b58 + +80002b1c : +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00003517 auipc x10,0x3 +80002b24: 19850513 addi x10,x10,408 # 80005cb8 +80002b28: 00000013 addi x0,x0,0 +80002b2c: 00000013 addi x0,x0,0 +80002b30: 00000013 addi x0,x0,0 +80002b34: 00000013 addi x0,x0,0 +80002b38: 00000013 addi x0,x0,0 +80002b3c: 00000013 addi x0,x0,0 +80002b40: 00015097 auipc x1,0x15 +80002b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80002b48: 5bd0006f jal x0,80003904 + +80002b4c : +80002b4c: 00100593 addi x11,x0,1 +80002b50: 06b51e63 bne x10,x11,80002bcc + +80002b54 : +80002b54: 00000013 addi x0,x0,0 +80002b58: 00000013 addi x0,x0,0 +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00004517 auipc x10,0x4 +80002b64: 1fa50513 addi x10,x10,506 # 80006d5a +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 00003517 auipc x10,0x3 +80002b8c: 0e052503 lw x10,224(x10) # 80005c68 +80002b90: 02000593 addi x11,x0,32 +80002b94: 7c5000ef jal x1,80003b58 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00003517 auipc x10,0x3 +80002ba4: 11850513 addi x10,x10,280 # 80005cb8 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 53d0006f jal x0,80003904 + +80002bcc : +80002bcc: 00000013 addi x0,x0,0 +80002bd0: 00000013 addi x0,x0,0 +80002bd4: 00000013 addi x0,x0,0 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00004517 auipc x10,0x4 +80002be4: 1d850513 addi x10,x10,472 # 80006db8 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 00003517 auipc x10,0x3 +80002c0c: 06052503 lw x10,96(x10) # 80005c68 +80002c10: 02000593 addi x11,x0,32 +80002c14: 745000ef jal x1,80003b58 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00003517 auipc x10,0x3 +80002c24: 09850513 addi x10,x10,152 # 80005cb8 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 4bd0006f jal x0,80003904 + +80002c4c : +80002c4c: 00003417 auipc x8,0x3 +80002c50: 03442403 lw x8,52(x8) # 80005c80 +80002c54: 00900493 addi x9,x0,9 +80002c58: 0a940c63 beq x8,x9,80002d10 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00004517 auipc x10,0x4 +80002c64: 1fd50513 addi x10,x10,509 # 80006e5d +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 00000013 addi x0,x0,0 +80002c8c: 00000013 addi x0,x0,0 +80002c90: 00000013 addi x0,x0,0 +80002c94: 00000013 addi x0,x0,0 +80002c98: 00000013 addi x0,x0,0 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 1e950513 addi x10,x10,489 # 80006e89 +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00003817 auipc x16,0x3 +80002ccc: fc080813 addi x16,x16,-64 # 80005c88 +80002cd0: 00082503 lw x10,0(x16) +80002cd4: 00015097 auipc x1,0x15 +80002cd8: 890080e7 jalr x1,-1904(x1) # 80017564 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00003517 auipc x10,0x3 +80002ce4: 5ee50513 addi x10,x10,1518 # 800062ce +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 280404e3 beq x8,x0,80003790 +80002d0c: 3400006f jal x0,8000304c + +80002d10 : +80002d10: 00000013 addi x0,x0,0 +80002d14: 00000013 addi x0,x0,0 +80002d18: 00000013 addi x0,x0,0 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00004517 auipc x10,0x4 +80002d24: 17950513 addi x10,x10,377 # 80006e99 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 00003517 auipc x10,0x3 +80002d4c: f2052503 lw x10,-224(x10) # 80005c68 +80002d50: 02000593 addi x11,x0,32 +80002d54: 605000ef jal x1,80003b58 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00003517 auipc x10,0x3 +80002d64: f5850513 addi x10,x10,-168 # 80005cb8 +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00000013 addi x0,x0,0 +80002d8c: 00000013 addi x0,x0,0 +80002d90: 00000013 addi x0,x0,0 +80002d94: 00000013 addi x0,x0,0 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00004517 auipc x10,0x4 +80002da4: 12450513 addi x10,x10,292 # 80006ec4 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00003517 auipc x10,0x3 +80002dcc: e9852503 lw x10,-360(x10) # 80005c60 +80002dd0: 02000593 addi x11,x0,32 +80002dd4: 585000ef jal x1,80003b58 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00003517 auipc x10,0x3 +80002de4: ed850513 addi x10,x10,-296 # 80005cb8 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003317 auipc x6,0x3 +80002e0c: e5832303 lw x6,-424(x6) # 80005c60 +80002e10: 00003397 auipc x7,0x3 +80002e14: e583a383 lw x7,-424(x7) # 80005c68 +80002e18: 10736a63 bltu x6,x7,80002f2c + +80002e1c : +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00004517 auipc x10,0x4 +80002e24: 0d350513 addi x10,x10,211 # 80006ef3 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00000013 addi x0,x0,0 +80002e4c: 00000013 addi x0,x0,0 +80002e50: 00000013 addi x0,x0,0 +80002e54: 00000013 addi x0,x0,0 +80002e58: 00000013 addi x0,x0,0 +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 0fb50513 addi x10,x10,251 # 80006f5b +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00003317 auipc x6,0x3 +80002e8c: dd832303 lw x6,-552(x6) # 80005c60 +80002e90: 00003397 auipc x7,0x3 +80002e94: dd83a383 lw x7,-552(x7) # 80005c68 +80002e98: 40730533 sub x10,x6,x7 +80002e9c: 02000593 addi x11,x0,32 +80002ea0: 4b9000ef jal x1,80003b58 +80002ea4: 00000013 addi x0,x0,0 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00003517 auipc x10,0x3 +80002ec4: df850513 addi x10,x10,-520 # 80005cb8 +80002ec8: 00000013 addi x0,x0,0 +80002ecc: 00000013 addi x0,x0,0 +80002ed0: 00000013 addi x0,x0,0 +80002ed4: 00000013 addi x0,x0,0 +80002ed8: 00000013 addi x0,x0,0 +80002edc: 00000013 addi x0,x0,0 +80002ee0: 00014097 auipc x1,0x14 +80002ee4: 684080e7 jalr x1,1668(x1) # 80017564 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00004517 auipc x10,0x4 +80002f04: 08250513 addi x10,x10,130 # 80006f82 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 1dd0006f jal x0,80003904 + +80002f2c : +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: fdf50513 addi x10,x10,-33 # 80006f1f +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 00000013 addi x0,x0,0 +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: fdb50513 addi x10,x10,-37 # 80006f5b +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00003317 auipc x6,0x3 +80002fac: cc032303 lw x6,-832(x6) # 80005c68 +80002fb0: 00003397 auipc x7,0x3 +80002fb4: cb03a383 lw x7,-848(x7) # 80005c60 +80002fb8: 40730533 sub x10,x6,x7 +80002fbc: 02000593 addi x11,x0,32 +80002fc0: 399000ef jal x1,80003b58 +80002fc4: 00000013 addi x0,x0,0 +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00003517 auipc x10,0x3 +80002fe4: cd850513 addi x10,x10,-808 # 80005cb8 +80002fe8: 00000013 addi x0,x0,0 +80002fec: 00000013 addi x0,x0,0 +80002ff0: 00000013 addi x0,x0,0 +80002ff4: 00000013 addi x0,x0,0 +80002ff8: 00000013 addi x0,x0,0 +80002ffc: 00000013 addi x0,x0,0 +80003000: 00014097 auipc x1,0x14 +80003004: 564080e7 jalr x1,1380(x1) # 80017564 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00004517 auipc x10,0x4 +80003024: 04a50513 addi x10,x10,74 # 8000706a +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 0bd0006f jal x0,80003904 + +8000304c : +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 0f150513 addi x10,x10,241 # 80007151 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 00003517 auipc x10,0x3 +8000308c: bfc52503 lw x10,-1028(x10) # 80005c84 +80003090: 04050a63 beq x10,x0,800030e4 +80003094: 00100593 addi x11,x0,1 +80003098: 08b50663 beq x10,x11,80003124 +8000309c: 00200593 addi x11,x0,2 +800030a0: 0cb50263 beq x10,x11,80003164 +800030a4: 00300593 addi x11,x0,3 +800030a8: 0eb50e63 beq x10,x11,800031a4 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00004517 auipc x10,0x4 +800030c4: 0cd50513 addi x10,x10,205 # 8000718d +800030c8: 00000013 addi x0,x0,0 +800030cc: 00000013 addi x0,x0,0 +800030d0: 00000013 addi x0,x0,0 +800030d4: 00000013 addi x0,x0,0 +800030d8: 00000013 addi x0,x0,0 +800030dc: 00000013 addi x0,x0,0 +800030e0: 1000006f jal x0,800031e0 + +800030e4 : +800030e4: 00000013 addi x0,x0,0 +800030e8: 00000013 addi x0,x0,0 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 06b50513 addi x10,x10,107 # 8000716b +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 0c00006f jal x0,800031e0 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 03350513 addi x10,x10,51 # 80007173 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0800006f jal x0,800031e0 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: ffb50513 addi x10,x10,-5 # 8000717b +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0400006f jal x0,800031e0 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: fc450513 addi x10,x10,-60 # 80007184 +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 + +800031e0 : +800031e0: 00014097 auipc x1,0x14 +800031e4: 384080e7 jalr x1,900(x1) # 80017564 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: f9650513 addi x10,x10,-106 # 80007196 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00003517 auipc x10,0x3 +8000322c: a5852503 lw x10,-1448(x10) # 80005c80 +80003230: 00100593 addi x11,x0,1 +80003234: 06b50863 beq x10,x11,800032a4 +80003238: 00200593 addi x11,x0,2 +8000323c: 0ab50463 beq x10,x11,800032e4 +80003240: 00300593 addi x11,x0,3 +80003244: 0eb50063 beq x10,x11,80003324 +80003248: 00400593 addi x11,x0,4 +8000324c: 10b50c63 beq x10,x11,80003364 +80003250: 00500593 addi x11,x0,5 +80003254: 14b50863 beq x10,x11,800033a4 +80003258: 00600593 addi x11,x0,6 +8000325c: 18b50463 beq x10,x11,800033e4 +80003260: 00700593 addi x11,x0,7 +80003264: 1cb50063 beq x10,x11,80003424 +80003268: 00800593 addi x11,x0,8 +8000326c: 1eb50c63 beq x10,x11,80003464 +80003270: 00000013 addi x0,x0,0 +80003274: 00000013 addi x0,x0,0 +80003278: 00000013 addi x0,x0,0 +8000327c: 00000013 addi x0,x0,0 +80003280: 00004517 auipc x10,0x4 +80003284: 06d50513 addi x10,x10,109 # 800072ed +80003288: 00000013 addi x0,x0,0 +8000328c: 00000013 addi x0,x0,0 +80003290: 00000013 addi x0,x0,0 +80003294: 00000013 addi x0,x0,0 +80003298: 00000013 addi x0,x0,0 +8000329c: 00000013 addi x0,x0,0 +800032a0: 2000006f jal x0,800034a0 + +800032a4 : +800032a4: 00000013 addi x0,x0,0 +800032a8: 00000013 addi x0,x0,0 +800032ac: 00000013 addi x0,x0,0 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: ef050513 addi x10,x10,-272 # 800071b0 +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 1c00006f jal x0,800034a0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: ee150513 addi x10,x10,-287 # 800071e1 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1800006f jal x0,800034a0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: ec150513 addi x10,x10,-319 # 80007201 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1400006f jal x0,800034a0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: e9f50513 addi x10,x10,-353 # 8000721f +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1000006f jal x0,800034a0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: e7e50513 addi x10,x10,-386 # 8000723e +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 0c00006f jal x0,800034a0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: e6650513 addi x10,x10,-410 # 80007266 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0800006f jal x0,800034a0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: e5250513 addi x10,x10,-430 # 80007292 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0400006f jal x0,800034a0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: e3e50513 addi x10,x10,-450 # 800072be +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 + +800034a0 : +800034a0: 00014097 auipc x1,0x14 +800034a4: 0c4080e7 jalr x1,196(x1) # 80017564 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: e3c50513 addi x10,x10,-452 # 800072fc +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00002517 auipc x10,0x2 +800034ec: 78052503 lw x10,1920(x10) # 80005c68 +800034f0: 02000593 addi x11,x0,32 +800034f4: 664000ef jal x1,80003b58 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00002517 auipc x10,0x2 +80003504: 7b850513 addi x10,x10,1976 # 80005cb8 +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00000013 addi x0,x0,0 +8000352c: 00000013 addi x0,x0,0 +80003530: 00000013 addi x0,x0,0 +80003534: 00000013 addi x0,x0,0 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00004517 auipc x10,0x4 +80003544: dd350513 addi x10,x10,-557 # 80007313 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00002517 auipc x10,0x2 +8000356c: 6f852503 lw x10,1784(x10) # 80005c60 +80003570: 02000593 addi x11,x0,32 +80003574: 5e4000ef jal x1,80003b58 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00002517 auipc x10,0x2 +80003584: 73850513 addi x10,x10,1848 # 80005cb8 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 6d852503 lw x10,1752(x10) # 80005c80 +800035b0: 00200593 addi x11,x0,2 +800035b4: 08b51463 bne x10,x11,8000363c +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00004517 auipc x10,0x4 +800035c4: d6a50513 addi x10,x10,-662 # 8000732a +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 68052503 lw x10,1664(x10) # 80005c68 +800035f0: 284000ef jal x1,80003874 +800035f4: 00014097 auipc x1,0x14 +800035f8: f70080e7 jalr x1,-144(x1) # 80017564 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: d4150513 addi x10,x10,-703 # 80007341 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 63852503 lw x10,1592(x10) # 80005c60 +80003630: 244000ef jal x1,80003874 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 + +8000363c : +8000363c: 00000097 auipc x1,0x0 +80003640: 314080e7 jalr x1,788(x1) # 80003950 +80003644: 00002517 auipc x10,0x2 +80003648: 63c52503 lw x10,1596(x10) # 80005c80 +8000364c: 00100593 addi x11,x0,1 +80003650: 02b51e63 bne x10,x11,8000368c +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00004517 auipc x10,0x4 +80003664: d5750513 addi x10,x10,-681 # 800073b7 +80003668: 00000013 addi x0,x0,0 +8000366c: 00000013 addi x0,x0,0 +80003670: 00000013 addi x0,x0,0 +80003674: 00000013 addi x0,x0,0 +80003678: 00000013 addi x0,x0,0 +8000367c: 00000013 addi x0,x0,0 +80003680: 00014097 auipc x1,0x14 +80003684: ee4080e7 jalr x1,-284(x1) # 80017564 +80003688: 27c0006f jal x0,80003904 +8000368c: 00200593 addi x11,x0,2 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: ded50513 addi x10,x10,-531 # 8000748d +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 23c0006f jal x0,80003904 +800036cc: 00300593 addi x11,x0,3 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: ea050513 addi x10,x10,-352 # 80007580 +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 1fc0006f jal x0,80003904 +8000370c: 00400593 addi x11,x0,4 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: f5b50513 addi x10,x10,-165 # 8000767b +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1bc0006f jal x0,80003904 +8000374c: 00500593 addi x11,x0,5 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: 00250513 addi x10,x10,2 # 80007762 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 17c0006f jal x0,80003904 +8000378c: 1780006f jal x0,80003904 + +80003790 : +80003790: 00000013 addi x0,x0,0 +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: bcf50513 addi x10,x10,-1073 # 8000736f +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 00002617 auipc x12,0x2 +800037cc: 4d062603 lw x12,1232(x12) # 80005c98 +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00003517 auipc x10,0x3 +800037e4: b7850513 addi x10,x10,-1160 # 80006358 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00065503 lhu x10,0(x12) +8000380c: 01000593 addi x11,x0,16 +80003810: 00357413 andi x8,x10,3 +80003814: 00300493 addi x9,x0,3 +80003818: 00941a63 bne x8,x9,8000382c +8000381c: 00265403 lhu x8,2(x12) +80003820: 01041413 slli x8,x8,0x10 +80003824: 00856533 or x10,x10,x8 +80003828: 02000593 addi x11,x0,32 +8000382c: 32c000ef jal x1,80003b58 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00002517 auipc x10,0x2 +80003844: 47850513 addi x10,x10,1144 # 80005cb8 +80003848: 00000013 addi x0,x0,0 +8000384c: 00000013 addi x0,x0,0 +80003850: 00000013 addi x0,x0,0 +80003854: 00000013 addi x0,x0,0 +80003858: 00000013 addi x0,x0,0 +8000385c: 00000013 addi x0,x0,0 +80003860: 00014097 auipc x1,0x14 +80003864: d04080e7 jalr x1,-764(x1) # 80017564 +80003868: 00000097 auipc x1,0x0 +8000386c: 0e8080e7 jalr x1,232(x1) # 80003950 +80003870: 0940006f jal x0,80003904 + +80003874 : +80003874: 02054263 blt x10,x0,80003898 + +80003878 : +80003878: 01800593 addi x11,x0,24 +8000387c: 04b55463 bge x10,x11,800038c4 +80003880: 00002597 auipc x11,0x2 +80003884: 46058593 addi x11,x11,1120 # 80005ce0 +80003888: 00251613 slli x12,x10,0x2 +8000388c: 00c585b3 add x11,x11,x12 +80003890: 0005a503 lw x10,0(x11) +80003894: 00008067 jalr x0,0(x1) + +80003898 : +80003898: 00100593 addi x11,x0,1 +8000389c: 01f59593 slli x11,x11,0x1f +800038a0: 00b54533 xor x10,x10,x11 +800038a4: 01000593 addi x11,x0,16 +800038a8: 00b55e63 bge x10,x11,800038c4 +800038ac: 00002597 auipc x11,0x2 +800038b0: 49458593 addi x11,x11,1172 # 80005d40 +800038b4: 00251613 slli x12,x10,0x2 +800038b8: 00c585b3 add x11,x11,x12 +800038bc: 0005a503 lw x10,0(x11) +800038c0: 00008067 jalr x0,0(x1) + +800038c4 : +800038c4: 00000013 addi x0,x0,0 +800038c8: 00000013 addi x0,x0,0 +800038cc: 00000013 addi x0,x0,0 +800038d0: 00000013 addi x0,x0,0 +800038d4: 00000013 addi x0,x0,0 +800038d8: 00000013 addi x0,x0,0 +800038dc: 00000013 addi x0,x0,0 +800038e0: 00003517 auipc x10,0x3 +800038e4: 89e50513 addi x10,x10,-1890 # 8000617e +800038e8: 00000013 addi x0,x0,0 +800038ec: 00000013 addi x0,x0,0 +800038f0: 00000013 addi x0,x0,0 +800038f4: 00000013 addi x0,x0,0 +800038f8: 00000013 addi x0,x0,0 +800038fc: 00000013 addi x0,x0,0 +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 4f050513 addi x10,x10,1264 # 80006e10 +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00014097 auipc x1,0x14 +80003944: c24080e7 jalr x1,-988(x1) # 80017564 + +80003948 : +80003948: 00014097 auipc x1,0x14 +8000394c: c7c080e7 jalr x1,-900(x1) # 800175c4 + +80003950 : +80003950: 00002617 auipc x12,0x2 +80003954: 34060613 addi x12,x12,832 # 80005c90 +80003958: 00162023 sw x1,0(x12) +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: a1950513 addi x10,x10,-1511 # 80006379 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 +80003988: 00002517 auipc x10,0x2 +8000398c: 31052503 lw x10,784(x10) # 80005c98 +80003990: 02000593 addi x11,x0,32 +80003994: 1c4000ef jal x1,80003b58 +80003998: 00000013 addi x0,x0,0 +8000399c: 00000013 addi x0,x0,0 +800039a0: 00002517 auipc x10,0x2 +800039a4: 31850513 addi x10,x10,792 # 80005cb8 +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00000013 addi x0,x0,0 +800039cc: 00000013 addi x0,x0,0 +800039d0: 00000013 addi x0,x0,0 +800039d4: 00000013 addi x0,x0,0 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00003517 auipc x10,0x3 +800039e4: 9a950513 addi x10,x10,-1623 # 80006389 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00002517 auipc x10,0x2 +80003a0c: 29852503 lw x10,664(x10) # 80005ca0 +80003a10: 02000593 addi x11,x0,32 +80003a14: 144000ef jal x1,80003b58 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00002517 auipc x10,0x2 +80003a24: 29850513 addi x10,x10,664 # 80005cb8 +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00000013 addi x0,x0,0 +80003a4c: 00000013 addi x0,x0,0 +80003a50: 00000013 addi x0,x0,0 +80003a54: 00000013 addi x0,x0,0 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00003517 auipc x10,0x3 +80003a64: 93950513 addi x10,x10,-1735 # 80006399 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00002517 auipc x10,0x2 +80003a8c: 22052503 lw x10,544(x10) # 80005ca8 +80003a90: 02000593 addi x11,x0,32 +80003a94: 0c4000ef jal x1,80003b58 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00002517 auipc x10,0x2 +80003aa4: 21850513 addi x10,x10,536 # 80005cb8 +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00000013 addi x0,x0,0 +80003acc: 00000013 addi x0,x0,0 +80003ad0: 00000013 addi x0,x0,0 +80003ad4: 00000013 addi x0,x0,0 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00003517 auipc x10,0x3 +80003ae4: 8c950513 addi x10,x10,-1847 # 800063a9 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00002517 auipc x10,0x2 +80003b0c: 1a852503 lw x10,424(x10) # 80005cb0 +80003b10: 02000593 addi x11,x0,32 +80003b14: 044000ef jal x1,80003b58 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00002517 auipc x10,0x2 +80003b24: 19850513 addi x10,x10,408 # 80005cb8 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002617 auipc x12,0x2 +80003b4c: 14860613 addi x12,x12,328 # 80005c90 +80003b50: 00062083 lw x1,0(x12) +80003b54: 00008067 jalr x0,0(x1) + +80003b58 : +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002617 auipc x12,0x2 +80003b64: 15860613 addi x12,x12,344 # 80005cb8 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 03000693 addi x13,x0,48 +80003b84: 00d60023 sb x13,0(x12) +80003b88: 07800693 addi x13,x0,120 +80003b8c: 00d600a3 sb x13,1(x12) +80003b90: 00260613 addi x12,x12,2 +80003b94: 00058693 addi x13,x11,0 + +80003b98 : +80003b98: ffc68693 addi x13,x13,-4 +80003b9c: 00d55733 srl x14,x10,x13 +80003ba0: 00f77713 andi x14,x14,15 +80003ba4: 00a00793 addi x15,x0,10 +80003ba8: 00f74663 blt x14,x15,80003bb4 +80003bac: 05770713 addi x14,x14,87 +80003bb0: 0080006f jal x0,80003bb8 + +80003bb4 : +80003bb4: 03070713 addi x14,x14,48 + +80003bb8 : +80003bb8: 00e60023 sb x14,0(x12) +80003bbc: 00160613 addi x12,x12,1 +80003bc0: fc069ce3 bne x13,x0,80003b98 +80003bc4: 00a00693 addi x13,x0,10 +80003bc8: 00d60023 sb x13,0(x12) +80003bcc: 000600a3 sb x0,1(x12) +80003bd0: 00008067 jalr x0,0(x1) + +80003bd4 : +80003bd4: 00a00693 addi x13,x0,10 +80003bd8: 02d54663 blt x10,x13,80003c04 +80003bdc: ff650513 addi x10,x10,-10 +80003be0: 03100713 addi x14,x0,49 +80003be4: 00d54c63 blt x10,x13,80003bfc +80003be8: ff650513 addi x10,x10,-10 +80003bec: 03200713 addi x14,x0,50 +80003bf0: 00d54663 blt x10,x13,80003bfc +80003bf4: ff650513 addi x10,x10,-10 +80003bf8: 03300713 addi x14,x0,51 +80003bfc: 00e60023 sb x14,0(x12) +80003c00: 00160613 addi x12,x12,1 +80003c04: 03050513 addi x10,x10,48 +80003c08: 00a60023 sb x10,0(x12) +80003c0c: 00a00693 addi x13,x0,10 +80003c10: 00d600a3 sb x13,1(x12) +80003c14: 00060123 sb x0,2(x12) +80003c18: 00008067 jalr x0,0(x1) +80003c1c: 00000013 addi x0,x0,0 +80003c20: 00000013 addi x0,x0,0 +80003c24: 00000013 addi x0,x0,0 +80003c28: 00000013 addi x0,x0,0 +80003c2c: 00000013 addi x0,x0,0 +80003c30: 00000013 addi x0,x0,0 +80003c34: 00000013 addi x0,x0,0 +80003c38: 00000013 addi x0,x0,0 +80003c3c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d3838393 addi x7,x7,-712 # 80001d40 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d1c38393 addi x7,x7,-740 # 80001d40 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d0438393 addi x7,x7,-764 # 80001d40 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: cf038393 addi x7,x7,-784 # 80001d40 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: ce438393 addi x7,x7,-796 # 80001d40 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cb038393 addi x7,x7,-848 # 80001d40 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f2430313 addi x6,x6,-220 # 80000fc0 +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: c9838393 addi x7,x7,-872 # 80001d40 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f0c30313 addi x6,x6,-244 # 80000fc0 +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: c8038393 addi x7,x7,-896 # 80001d40 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: ef430313 addi x6,x6,-268 # 80000fc0 +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: c6838393 addi x7,x7,-920 # 80001d40 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: d9078793 addi x15,x15,-624 # 80000fd0 +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 3f010113 addi x2,x2,1008 # 80007890 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: b6018193 addi x3,x3,-1184 # 80002040 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006e39 .word 0x80006e39 +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: f5828293 addi x5,x5,-168 # 80016500 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: f3828293 addi x5,x5,-200 # 80016500 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkc-clmul-00.elf.objdump b/riscv-tests/rv32-Zbkc-clmul-00.elf.objdump new file mode 100644 index 0000000..aea0be5 --- /dev/null +++ b/riscv-tests/rv32-Zbkc-clmul-00.elf.objdump @@ -0,0 +1,13196 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkc/Zbkc-clmul-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkc/Zbkc-clmul-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00018830 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020900 80020900 00021900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002670 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00024ceb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d66 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d89 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024da0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00024dc8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e51 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020900 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccgoGHjh.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b1 +80009022 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b2 +80009054 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b3 +80009086 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +800090b8 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b5 +800090ea l .data 00000000 Zbkc_clmul_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b6 +8000911c l .data 00000000 Zbkc_clmul_cg_cp_rs1_b6_str +80000194 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b7 +8000914e l .data 00000000 Zbkc_clmul_cg_cp_rs1_b7_str +800001c0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b8 +80009180 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b8_str +800001ec l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b9 +800091b2 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b9_str +8000021c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b10 +800091e5 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b10_str +80000248 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b11 +80009219 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b11_str +80000274 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b12 +8000924d l .data 00000000 Zbkc_clmul_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b13 +80009281 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b14 +800092b5 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b15 +800092e9 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b16 +8000931d l .data 00000000 Zbkc_clmul_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b17 +80009351 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b18 +80009385 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b19 +800093b9 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b20 +800093ed l .data 00000000 Zbkc_clmul_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b21 +80009421 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b22 +80009455 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b23 +80009489 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b24 +800094bd l .data 00000000 Zbkc_clmul_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b25 +800094f1 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b26 +80009525 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b27 +80009559 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b28 +8000958d l .data 00000000 Zbkc_clmul_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b29 +800095c1 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b30 +800095f5 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_b31 +80009629 l .data 00000000 Zbkc_clmul_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b0 +8000965d l .data 00000000 Zbkc_clmul_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b1 +80009690 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b2 +800096c3 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b3 +800096f6 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +80009729 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b5 +8000975c l .data 00000000 Zbkc_clmul_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b6 +8000978f l .data 00000000 Zbkc_clmul_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b7 +800097c2 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b8 +800097f5 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b9 +80009828 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b9_str +800007bc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b10 +8000985b l .data 00000000 Zbkc_clmul_cg_cp_rs2_b10_str +800007e8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b11 +8000988f l .data 00000000 Zbkc_clmul_cg_cp_rs2_b11_str +80000814 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b12 +800098c3 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b12_str +80000848 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b13 +800098f7 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b13_str +80000874 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b14 +8000992b l .data 00000000 Zbkc_clmul_cg_cp_rs2_b14_str +800008a4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b15 +8000995f l .data 00000000 Zbkc_clmul_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b16 +80009993 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b16_str +800008fc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b17 +800099c7 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b17_str +8000092c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b18 +800099fb l .data 00000000 Zbkc_clmul_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b19 +80009a2f l .data 00000000 Zbkc_clmul_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b20 +80009a63 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b21 +80009a97 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b21_str +800009dc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b22 +80009acb l .data 00000000 Zbkc_clmul_cg_cp_rs2_b22_str +80000a08 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b23 +80009aff l .data 00000000 Zbkc_clmul_cg_cp_rs2_b23_str +80000a34 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b24 +80009b33 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b24_str +80000a60 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b25 +80009b67 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b25_str +80000a8c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b26 +80009b9b l .data 00000000 Zbkc_clmul_cg_cp_rs2_b26_str +80000ab8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b27 +80009bcf l .data 00000000 Zbkc_clmul_cg_cp_rs2_b27_str +80000ae4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b28 +80009c03 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b28_str +80000b10 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b29 +80009c37 l .data 00000000 Zbkc_clmul_cg_cp_rs2_b29_str +80000b3c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b30 +80009c6b l .data 00000000 Zbkc_clmul_cg_cp_rs2_b30_str +80000b68 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_b31 +80009c9f l .data 00000000 Zbkc_clmul_cg_cp_rs2_b31_str +80000b94 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b0 +80009cd3 l .data 00000000 Zbkc_clmul_cg_cp_rd_b0_str +80000bc0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b1 +80009d05 l .data 00000000 Zbkc_clmul_cg_cp_rd_b1_str +80000bec l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b2 +80009d37 l .data 00000000 Zbkc_clmul_cg_cp_rd_b2_str +80000c1c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b3 +80009d69 l .data 00000000 Zbkc_clmul_cg_cp_rd_b3_str +80000c48 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b4 +80009d9b l .data 00000000 Zbkc_clmul_cg_cp_rd_b4_str +80000c74 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b5 +80009dcd l .data 00000000 Zbkc_clmul_cg_cp_rd_b5_str +80000ca0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b6 +80009dff l .data 00000000 Zbkc_clmul_cg_cp_rd_b6_str +80000cd4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b7 +80009e31 l .data 00000000 Zbkc_clmul_cg_cp_rd_b7_str +80000d00 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b8 +80009e63 l .data 00000000 Zbkc_clmul_cg_cp_rd_b8_str +80000d30 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b9 +80009e95 l .data 00000000 Zbkc_clmul_cg_cp_rd_b9_str +80000d5c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b10 +80009ec7 l .data 00000000 Zbkc_clmul_cg_cp_rd_b10_str +80000d88 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b11 +80009efa l .data 00000000 Zbkc_clmul_cg_cp_rd_b11_str +80000db4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b12 +80009f2d l .data 00000000 Zbkc_clmul_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b13 +80009f60 l .data 00000000 Zbkc_clmul_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b14 +80009f93 l .data 00000000 Zbkc_clmul_cg_cp_rd_b14_str +80000e44 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b15 +80009fc6 l .data 00000000 Zbkc_clmul_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b16 +80009ff9 l .data 00000000 Zbkc_clmul_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b17 +8000a02c l .data 00000000 Zbkc_clmul_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b18 +8000a05f l .data 00000000 Zbkc_clmul_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b19 +8000a092 l .data 00000000 Zbkc_clmul_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b20 +8000a0c5 l .data 00000000 Zbkc_clmul_cg_cp_rd_b20_str +80000f4c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b21 +8000a0f8 l .data 00000000 Zbkc_clmul_cg_cp_rd_b21_str +80000f78 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b22 +8000a12b l .data 00000000 Zbkc_clmul_cg_cp_rd_b22_str +80000fa4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b23 +8000a15e l .data 00000000 Zbkc_clmul_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b24 +8000a191 l .data 00000000 Zbkc_clmul_cg_cp_rd_b24_str +80001004 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b25 +8000a1c4 l .data 00000000 Zbkc_clmul_cg_cp_rd_b25_str +80001030 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b26 +8000a1f7 l .data 00000000 Zbkc_clmul_cg_cp_rd_b26_str +8000105c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b27 +8000a22a l .data 00000000 Zbkc_clmul_cg_cp_rd_b27_str +80001088 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b28 +8000a25d l .data 00000000 Zbkc_clmul_cg_cp_rd_b28_str +800010b4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b29 +8000a290 l .data 00000000 Zbkc_clmul_cg_cp_rd_b29_str +800010e0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b30 +8000a2c3 l .data 00000000 Zbkc_clmul_cg_cp_rd_b30_str +8000110c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rd_b31 +8000a2f6 l .data 00000000 Zbkc_clmul_cg_cp_rd_b31_str +80001138 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x0 +8000a329 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x0_str +80001164 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x1 +8000a363 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x1_str +80001190 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x2 +8000a39d l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x2_str +800011bc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x80000000 +8000a3d7 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x80000000_str +800011e8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x80000001 +8000a419 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x80000001_str +80001214 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x7fffffff +8000a45b l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x7fffffff_str +80001240 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffe +8000a49d l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffe_str +8000126c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xffffffff +8000a4df l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xffffffff_str +80001298 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe +8000a521 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe_str +800012c4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x5bbc8872 +8000a563 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x5bbc8872_str +800012f0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaa +8000a5a5 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaa_str +8000131c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x55555555 +8000a5e7 l .data 00000000 Zbkc_clmul_cg_cp_rs1_edges_0x55555555_str +80001348 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x0 +8000a629 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x0_str +80001374 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x1 +8000a664 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x1_str +800013a0 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x2 +8000a69f l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x2_str +800013cc l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x80000000 +8000a6da l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x80000000_str +800013f8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x80000001 +8000a71c l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x80000001_str +80001424 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x7fffffff +8000a75e l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x7fffffff_str +80001450 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffe +8000a7a0 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffe_str +8000147c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xffffffff +8000a7e2 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xffffffff_str +800014a8 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe +8000a824 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe_str +800014d4 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x5bbc8872 +8000a866 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x5bbc8872_str +80001500 l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaa +8000a8a8 l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaa_str +8000152c l .text.rvtest 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x55555555 +8000a8ea l .data 00000000 Zbkc_clmul_cg_cp_rs2_edges_0x55555555_str +80001558 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a92c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001584 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a97e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000a9d0 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015dc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000aa22 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001608 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000aa7b l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001634 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000aad4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001660 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ab2d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000168c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ab86 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000abdf l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000ac38 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001710 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ac91 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000173c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000acea l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001768 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000ad43 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001794 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ad95 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ade7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017ec l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000ae39 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001818 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000ae92 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001844 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000aeeb l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001870 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000af44 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000189c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000af9d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000aff6 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b04f l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001920 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b0a8 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000194c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b101 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001978 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b15a l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b1ac l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b1fe l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019fc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b250 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a28 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b2a9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a54 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b302 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a80 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b35b l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aac l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b3b4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b40d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b04 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b466 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b30 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b4bf l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b5c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b518 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b88 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b571 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b5ca l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b623 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c0c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b67c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c38 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b6dc l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c64 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b73c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c90 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b79c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cbc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b7fc l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b85c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d14 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b8bc l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d40 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b91c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d6c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000b97c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d98 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000b9dc l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000ba35 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000ba8e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e1c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bae7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e48 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bb47 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e74 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bba7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bc07 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ecc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bc67 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bcc7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f24 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bd27 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f50 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000bd87 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f7c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000bde7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000be47 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bea0 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002000 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bef9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000202c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000bf52 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002058 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000bfb2 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002084 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c012 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c072 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020dc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c0d2 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002108 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c132 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002134 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c192 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002160 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c1f2 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000218c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c252 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c2b2 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c30b l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002210 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c364 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000223c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c3bd l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002268 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c41d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002294 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c47d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c4dd l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022ec l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c53d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002318 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c59d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002344 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c5fd l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002370 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c65d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000239c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c6bd l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c71d l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c776 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002420 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c7cf l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000244c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c828 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002478 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c888 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c8e8 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000c948 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024fc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000c9a8 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002528 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000ca08 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002554 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000ca68 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002580 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cac8 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025ac l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000cb28 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cb88 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002604 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000cbe1 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002630 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cc3a l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000265c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cc93 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002688 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000ccf3 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000cd53 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000cdb3 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000270c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000ce13 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002738 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000ce73 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002764 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000ced3 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002790 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000cf33 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027bc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000cf93 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000cff3 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002814 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d04c l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002840 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d0a5 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000286c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d0fe l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002898 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d15e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d1be l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d21e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000291c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d27e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002948 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d2de l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002974 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d33e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d39e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029cc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d3fe l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d45e l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a24 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d4b7 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a50 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d510 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a7c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d569 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d5c9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d629 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b00 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d689 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b2c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d6e9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b58 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d749 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b84 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d7a9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d809 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bdc l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d869 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c08 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d8c9 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c34 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000d922 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c60 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000d97b l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c8c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000d9d4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb8 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000da34 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce4 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000da94 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d10 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000daf4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d3c l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000db54 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d68 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dbb4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d94 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000dc14 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc0 l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000dc74 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dec l .text.rvtest 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dcd4 l .data 00000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e18 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b0 +8000dd34 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b0_str +80002e44 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b1 +8000dd6d l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b2 +8000dda6 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b2_str +80002ea0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b3 +8000dddf l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b3_str +80002ed4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b4 +8000de18 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b4_str +80002f00 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b5 +8000de51 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b5_str +80002f2c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b6 +8000de8a l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b6_str +80002f58 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b7 +8000dec3 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b7_str +80002f84 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b8 +8000defc l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b8_str +80002fb0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b9 +8000df35 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b9_str +80002fe0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b10 +8000df6e l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b11 +8000dfa8 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b12 +8000dfe2 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b12_str +80003070 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b13 +8000e01c l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b13_str +8000309c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b14 +8000e056 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b14_str +800030c8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b15 +8000e090 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b15_str +800030f8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b16 +8000e0ca l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b16_str +80003124 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b17 +8000e104 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b17_str +80003150 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b18 +8000e13e l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b18_str +8000317c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b19 +8000e178 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b19_str +800031a8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b20 +8000e1b2 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b20_str +800031d4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b21 +8000e1ec l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b21_str +80003200 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b22 +8000e226 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b22_str +8000322c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b23 +8000e260 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b23_str +80003258 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b24 +8000e29a l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b24_str +80003284 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b25 +8000e2d4 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b25_str +800032b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b26 +8000e30e l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b26_str +800032e0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b27 +8000e348 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b27_str +8000330c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b28 +8000e382 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b28_str +80003338 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b29 +8000e3bc l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b29_str +80003364 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b30 +8000e3f6 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b30_str +80003390 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b31 +8000e430 l .data 00000000 Zbkc_clmul_cg_cmp_rs1_rs2_b31_str +800033bc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b0 +8000e46a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b0_str +800033e8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b1 +8000e4a2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b1_str +80003414 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b2 +8000e4da l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b2_str +80003440 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b3 +8000e512 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b3_str +8000346c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b4 +8000e54a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b4_str +80003498 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b5 +8000e582 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b5_str +800034c4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b6 +8000e5ba l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b6_str +800034f8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b7 +8000e5f2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b7_str +80003524 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b8 +8000e62a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b8_str +80003554 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b9 +8000e662 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b9_str +80003580 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b10 +8000e69a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b10_str +800035ac l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b11 +8000e6d3 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b11_str +800035d8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b12 +8000e70c l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b12_str +80003604 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b13 +8000e745 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b13_str +80003630 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b14 +8000e77e l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b14_str +8000365c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b15 +8000e7b7 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b15_str +80003688 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b16 +8000e7f0 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b16_str +800036b4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b17 +8000e829 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b17_str +800036e0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b18 +8000e862 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b18_str +80003710 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b19 +8000e89b l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b19_str +8000373c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b20 +8000e8d4 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b21 +8000e90d l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b22 +8000e946 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b23 +8000e97f l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b24 +8000e9b8 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b25 +8000e9f1 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b25_str +80003848 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b26 +8000ea2a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b27 +8000ea63 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b27_str +800038a4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b28 +8000ea9c l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b28_str +800038d0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b29 +8000ead5 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b29_str +800038fc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b30 +8000eb0e l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b30_str +8000392c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b31 +8000eb47 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_b31_str +80003958 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b0 +8000eb80 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b0_str +80003984 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b1 +8000ebb8 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b1_str +800039b0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b2 +8000ebf0 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b2_str +800039dc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b3 +8000ec28 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b3_str +80003a10 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b4 +8000ec60 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b4_str +80003a3c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b5 +8000ec98 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b5_str +80003a68 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b6 +8000ecd0 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b6_str +80003a94 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b7 +8000ed08 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b7_str +80003ac0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b8 +8000ed40 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b8_str +80003aec l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b9 +8000ed78 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b9_str +80003b18 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b10 +8000edb0 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b10_str +80003b44 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b11 +8000ede9 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b11_str +80003b70 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b12 +8000ee22 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b12_str +80003ba4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b13 +8000ee5b l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b13_str +80003bd0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b14 +8000ee94 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b14_str +80003bfc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b15 +8000eecd l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b15_str +80003c28 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b16 +8000ef06 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b16_str +80003c58 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b17 +8000ef3f l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b17_str +80003c84 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b18 +8000ef78 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b18_str +80003cb0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b19 +8000efb1 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b19_str +80003cdc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b20 +8000efea l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b20_str +80003d08 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b21 +8000f023 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b21_str +80003d38 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b22 +8000f05c l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b22_str +80003d64 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b23 +8000f095 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b23_str +80003d90 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b24 +8000f0ce l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b24_str +80003dbc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b25 +8000f107 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b25_str +80003de8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b26 +8000f140 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b26_str +80003e14 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b27 +8000f179 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b27_str +80003e40 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b28 +8000f1b2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b28_str +80003e6c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b29 +8000f1eb l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b29_str +80003e98 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b30 +8000f224 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b30_str +80003ec4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b31 +8000f25d l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs2_b31_str +80003ef0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0 +8000f296 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0_str +80003f1c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1 +8000f2d2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1_str +80003f48 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2 +8000f30e l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2_str +80003f78 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3 +8000f34a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3_str +80003fac l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4 +8000f386 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4_str +80003fd8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5 +8000f3c2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5_str +80004004 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6 +8000f3fe l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6_str +80004030 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7 +8000f43a l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7_str +8000405c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8 +8000f476 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8_str +8000408c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9 +8000f4b2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9_str +800040b8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10 +8000f4ee l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10_str +800040e4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11 +8000f52b l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11_str +80004114 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12 +8000f568 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12_str +80004148 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13 +8000f5a5 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13_str +80004174 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14 +8000f5e2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14_str +800041a0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15 +8000f61f l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15_str +800041cc l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16 +8000f65c l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16_str +800041f8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17 +8000f699 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17_str +80004224 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18 +8000f6d6 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18_str +80004250 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19 +8000f713 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19_str +8000427c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20 +8000f750 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20_str +800042a8 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21 +8000f78d l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21_str +800042d4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22 +8000f7ca l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23 +8000f807 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24 +8000f844 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25 +8000f881 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26 +8000f8be l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26_str +800043b4 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27 +8000f8fb l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27_str +800043e0 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28 +8000f938 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28_str +8000440c l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29 +8000f975 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29_str +80004438 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30 +8000f9b2 l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30_str +80004464 l .text.rvtest 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31 +8000f9ef l .data 00000000 Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004494 l .text.rvtest 00000000 exit_Mcleanup +80004498 l .text.rvtest 00000000 resto_Medeleg +800044a0 l .text.rvtest 00000000 resto_Msatp +800044a4 l .text.rvtest 00000000 resto_Mscratch +800044ac l .text.rvtest 00000000 resto_Mxtvec +800044c0 l .text.rvtest 00000000 resto_Mtramp +800044c4 l .text.rvtest 00000000 resto_Mloop +800044dc l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800100af l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +800100e9 l .data 00000000 begin_debugstr +80010149 l .data 00000000 trap_sig_overflowstr +80010cf4 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011dc8 l .data 00000000 trap_sigptr +80011dc0 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001029d l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8001010b l .data 00000000 abortstr +80010074 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +8001172b l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000fb98 l .data 00000000 ascii_buffer +800101b2 l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000fb78 l .data 00000000 saved_xepc +8002082c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +800102b4 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +800103b6 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +800104b1 l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +800105a4 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80010717 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000fa30 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000fa30 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000fb58 l .data 00000000 failure_diag_type +8000fb68 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000fb60 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +8001069b l .data 00000000 sv_Mtval2_str +800106d9 l .data 00000000 sv_Mtinst_str +800102f4 l .data 00000000 sv_Svect_str +800103f4 l .data 00000000 sv_Scause_str +800104ed l .data 00000000 sv_Sepc_str +800105e1 l .data 00000000 sv_Stval_str +80010752 l .data 00000000 sv_Sip_str +80010334 l .data 00000000 sv_Hvect_str +80010432 l .data 00000000 sv_Hcause_str +80010529 l .data 00000000 sv_Hepc_str +8001061e l .data 00000000 sv_Htval_str +8001078d l .data 00000000 sv_Hip_str +80010375 l .data 00000000 sv_Vvect_str +80010471 l .data 00000000 sv_Vcause_str +80010566 l .data 00000000 sv_Vepc_str +8001065c l .data 00000000 sv_Vtval_str +800107c9 l .data 00000000 sv_Vip_str +80010806 l .data 00000000 Mclr_Mext_int_str +80010855 l .data 00000000 Mclr_Sext_int_str +80010950 l .data 00000000 Sclr_Sext_int_str +80010a4c l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000fb64 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +800101a0 l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000fb50 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +800101b4 l .data 00000000 inststr +8000fb30 l .data 00000000 failing_instruction +800101c8 l .data 00000000 addrstr +8000fb38 l .data 00000000 failing_addr +80010bff l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000fb34 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010d15 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80010bf8 l .data 00000000 vxsatstr +80010c10 l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000fb40 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010c27 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000fb48 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010c3e l .data 00000000 failure_diag_bad_instr_str +80010c9c l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010d41 l .data 00000000 trap_diag_header_str +80010d6d l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010d7d l .data 00000000 trap_diag_expected_offset_str +80010da8 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010dd7 l .data 00000000 trap_diag_extra_traps_str +80010e3f l .data 00000000 trap_diag_diff_bytes_str +80010e66 l .data 00000000 trap_diag_extra_next_step_str +80010e03 l .data 00000000 trap_diag_missing_traps_str +80010f4e l .data 00000000 trap_diag_missing_next_step_str +80011035 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80011071 l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +8001104f l .data 00000000 trap_diag_mode_m_str +80011057 l .data 00000000 trap_diag_mode_s_str +8001105f l .data 00000000 trap_diag_mode_hs_str +80011068 l .data 00000000 trap_diag_mode_vs_str +8001107a l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +800111d1 l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +80011094 l .data 00000000 trap_diag_field_vect_str +800110c5 l .data 00000000 trap_diag_field_cause_str +800110e5 l .data 00000000 trap_diag_field_epc_str +80011103 l .data 00000000 trap_diag_field_tval_str +80011122 l .data 00000000 trap_diag_field_ip_str +8001114a l .data 00000000 trap_diag_field_tval2_str +80011176 l .data 00000000 trap_diag_field_tinst_str +800111a2 l .data 00000000 trap_diag_field_intid_str +800111e0 l .data 00000000 trap_diag_expected_str +800111f7 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +8001120e l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80011225 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +8001129b l .data 00000000 trap_diag_hint_vect_str +80011371 l .data 00000000 trap_diag_hint_cause_str +80011464 l .data 00000000 trap_diag_hint_epc_str +8001155f l .data 00000000 trap_diag_hint_tval_str +80011646 l .data 00000000 trap_diag_hint_ip_str +80011253 l .data 00000000 trap_diag_generic_str +8001023c l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000fbc0 l .data 00000000 trap_excpt_name_tbl +8000fc20 l .data 00000000 trap_int_name_tbl +8001005e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000fb70 l .data 00000000 csr_context_ret_addr +8001025d l .data 00000000 mepcstr +8001026d l .data 00000000 mcausestr +8000fb80 l .data 00000000 saved_xcause +8001027d l .data 00000000 mtvalstr +8000fb88 l .data 00000000 saved_xtval +8001028d l .data 00000000 mstatusstr +8000fb90 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011770 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010d1d l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fbc0 l .data 00000000 end_failure_scratch +8000fc60 l .data 00000000 trap_excpt_name_0 +8000fc80 l .data 00000000 trap_excpt_name_1 +8000fc9a l .data 00000000 trap_excpt_name_2 +8000fcaf l .data 00000000 trap_excpt_name_3 +8000fcbb l .data 00000000 trap_excpt_name_4 +8000fcd4 l .data 00000000 trap_excpt_name_5 +8000fce7 l .data 00000000 trap_excpt_name_6 +8000fd05 l .data 00000000 trap_excpt_name_7 +8000fd1d l .data 00000000 trap_excpt_name_8 +8000fd3b l .data 00000000 trap_excpt_name_9 +8000fd59 l .data 00000000 trap_excpt_name_10 +8000fd78 l .data 00000000 trap_excpt_name_11 +8000fd96 l .data 00000000 trap_excpt_name_12 +8000fdae l .data 00000000 trap_excpt_name_13 +8000fdbf l .data 00000000 trap_excpt_name_14 +8000fdce l .data 00000000 trap_excpt_name_15 +8000fde4 l .data 00000000 trap_excpt_name_16 +8000fdf1 l .data 00000000 trap_excpt_name_17 +8000fe00 l .data 00000000 trap_excpt_name_18 +8000fe10 l .data 00000000 trap_excpt_name_19 +8000fe20 l .data 00000000 trap_excpt_name_20 +8000fe3e l .data 00000000 trap_excpt_name_21 +8000fe55 l .data 00000000 trap_excpt_name_22 +8000fe6a l .data 00000000 trap_excpt_name_23 +8000fe86 l .data 00000000 trap_int_name_0 +8000fe9e l .data 00000000 trap_int_name_1 +8000febd l .data 00000000 trap_int_name_2 +8000fee4 l .data 00000000 trap_int_name_3 +8000ff00 l .data 00000000 trap_int_name_4 +8000ff18 l .data 00000000 trap_int_name_5 +8000ff34 l .data 00000000 trap_int_name_6 +8000ff58 l .data 00000000 trap_int_name_7 +8000ff71 l .data 00000000 trap_int_name_8 +8000ff89 l .data 00000000 trap_int_name_9 +8000ffa8 l .data 00000000 trap_int_name_10 +8000ffcf l .data 00000000 trap_int_name_11 +8000ffeb l .data 00000000 trap_int_name_12 +80010010 l .data 00000000 trap_int_name_13 +8001002c l .data 00000000 trap_int_name_14 +80010045 l .data 00000000 trap_int_name_15 +80010209 l .data 00000000 xepcstr +800108a7 l .data 00000000 Mclr_Vext_int_str +80010901 l .data 00000000 Sclr_Mext_int_str +800109a2 l .data 00000000 Sclr_Vext_int_str +800109fc l .data 00000000 Hclr_Mext_int_str +80010a9f l .data 00000000 Hclr_Vext_int_str +80010afa l .data 00000000 Vclr_Mext_int_str +80010b4a l .data 00000000 Vclr_Sext_int_str +80010b9d l .data 00000000 Vclr_Vext_int_str +8001123c l .data 00000000 trap_diag_curr_xepc_str +80020830 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80020830 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044dc g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011770 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004484 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011770 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +8001176f g .data 00000000 rvtest_data_end +80004484 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020a00 g .tohost 00000000 fromhost +80020900 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x02b5512f +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x12fb1c09 +80000048: 0001ad83 lw x27,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkc_clmul_cg_cp_rs1_b0: + clmul x26, x0, x27 # perform operation +80000050: 0bb01d33 clmul x26,x0,x27 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_b0, Zbkc_clmul_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01a20863 beq x4,x26,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x707f937a +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x90464b62 +80000074: 0001ab03 lw x22,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkc_clmul_cg_cp_rs1_b1: + clmul x30, x1, x22 # perform operation +8000007c: 0b609f33 clmul x30,x1,x22 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkc_clmul_cg_cp_rs1_b1, Zbkc_clmul_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01e20863 beq x4,x30,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009022 .word 0x80009022 +80000094: 00410113 addi x2,x2,4 + + mv x23, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010b93 addi x23,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x677dd0c5 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x930d3a30 +800000a4: 0001ad83 lw x27,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkc_clmul_cg_cp_rs1_b2: + clmul x6, x2, x27 # perform operation +800000ac: 0bb11333 clmul x6,x2,x27 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkc_clmul_cg_cp_rs1_b2, Zbkc_clmul_cg_cp_rs1_b2_str) +800000b0: 000ba203 lw x4,0(x23) +800000b4: 00620863 beq x4,x6,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009054 .word 0x80009054 +800000c4: 004b8b93 addi x23,x23,4 + + mv x10, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x16c6aa63 +800000cc: 00052183 lw x3,0(x10) +800000d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x759a3a93 +800000d4: 00052c83 lw x25,0(x10) +800000d8: 00450513 addi x10,x10,4 + +800000dc : +Zbkc_clmul_cg_cp_rs1_b3: + clmul x20, x3, x25 # perform operation +800000dc: 0b919a33 clmul x20,x3,x25 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkc_clmul_cg_cp_rs1_b3, Zbkc_clmul_cg_cp_rs1_b3_str) +800000e0: 000ba203 lw x4,0(x23) +800000e4: 01420863 beq x4,x20,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009086 .word 0x80009086 +800000f4: 004b8b93 addi x23,x23,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xbdb7533f +80000100: 00052203 lw x4,0(x10) +80000104: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x05bcc306 +80000108: 00052383 lw x7,0(x10) +8000010c: 00450513 addi x10,x10,4 + +80000110 : +Zbkc_clmul_cg_cp_rs1_b4: + clmul x0, x4, x7 # perform operation +80000110: 0a721033 clmul x0,x4,x7 + # Check if x0 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x0, Zbkc_clmul_cg_cp_rs1_b4, Zbkc_clmul_cg_cp_rs1_b4_str) +80000114: 000ba683 lw x13,0(x23) +80000118: 00068863 beq x13,x0,80000128 +8000011c: 4240576f jal x14,80005540 +80000120: 80000110 .word 0x80000110 +80000124: 800090b8 .word 0x800090b8 +80000128: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x47d41a60 +8000012c: 00052283 lw x5,0(x10) +80000130: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xb4a3f370 +80000134: 00052183 lw x3,0(x10) +80000138: 00450513 addi x10,x10,4 + +8000013c : +Zbkc_clmul_cg_cp_rs1_b5: + clmul x19, x5, x3 # perform operation +8000013c: 0a3299b3 clmul x19,x5,x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x19, Zbkc_clmul_cg_cp_rs1_b5, Zbkc_clmul_cg_cp_rs1_b5_str) +80000140: 000ba683 lw x13,0(x23) +80000144: 01368863 beq x13,x19,80000154 +80000148: 3f80576f jal x14,80005540 +8000014c: 8000013c .word 0x8000013c +80000150: 800090ea .word 0x800090ea +80000154: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xc65f6fae +80000158: 00052303 lw x6,0(x10) +8000015c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x32cd9341 +80000160: 00052883 lw x17,0(x10) +80000164: 00450513 addi x10,x10,4 + +80000168 : +Zbkc_clmul_cg_cp_rs1_b6: + clmul x22, x6, x17 # perform operation +80000168: 0b131b33 clmul x22,x6,x17 + # Check if x22 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x22, Zbkc_clmul_cg_cp_rs1_b6, Zbkc_clmul_cg_cp_rs1_b6_str) +8000016c: 000ba683 lw x13,0(x23) +80000170: 01668863 beq x13,x22,80000180 +80000174: 3cc0576f jal x14,80005540 +80000178: 80000168 .word 0x80000168 +8000017c: 8000911c .word 0x8000911c +80000180: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7d39daec +80000184: 00052383 lw x7,0(x10) +80000188: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7cd92813 +8000018c: 00052583 lw x11,0(x10) +80000190: 00450513 addi x10,x10,4 + +80000194 : +Zbkc_clmul_cg_cp_rs1_b7: + clmul x20, x7, x11 # perform operation +80000194: 0ab39a33 clmul x20,x7,x11 + # Check if x20 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x20, Zbkc_clmul_cg_cp_rs1_b7, Zbkc_clmul_cg_cp_rs1_b7_str) +80000198: 000ba683 lw x13,0(x23) +8000019c: 01468863 beq x13,x20,800001ac +800001a0: 3a00576f jal x14,80005540 +800001a4: 80000194 .word 0x80000194 +800001a8: 8000914e .word 0x8000914e +800001ac: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x281f81fd +800001b0: 00052403 lw x8,0(x10) +800001b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xe465422f +800001b8: 00052e83 lw x29,0(x10) +800001bc: 00450513 addi x10,x10,4 + +800001c0 : +Zbkc_clmul_cg_cp_rs1_b8: + clmul x11, x8, x29 # perform operation +800001c0: 0bd415b3 clmul x11,x8,x29 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkc_clmul_cg_cp_rs1_b8, Zbkc_clmul_cg_cp_rs1_b8_str) +800001c4: 000ba683 lw x13,0(x23) +800001c8: 00b68863 beq x13,x11,800001d8 +800001cc: 3740576f jal x14,80005540 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80009180 .word 0x80009180 +800001d8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xf09d3c69 +800001dc: 00052483 lw x9,0(x10) +800001e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x3591a377 +800001e4: 00052b03 lw x22,0(x10) +800001e8: 00450513 addi x10,x10,4 + +800001ec : +Zbkc_clmul_cg_cp_rs1_b9: + clmul x21, x9, x22 # perform operation +800001ec: 0b649ab3 clmul x21,x9,x22 + # Check if x21 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x21, Zbkc_clmul_cg_cp_rs1_b9, Zbkc_clmul_cg_cp_rs1_b9_str) +800001f0: 000ba683 lw x13,0(x23) +800001f4: 01568863 beq x13,x21,80000204 +800001f8: 3480576f jal x14,80005540 +800001fc: 800001ec .word 0x800001ec +80000200: 800091b2 .word 0x800091b2 +80000204: 004b8b93 addi x23,x23,4 + + mv x31, x10 # switch data pointer register to avoid conflict with test +80000208: 00050f93 addi x31,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xe292b7e4 +8000020c: 000fa503 lw x10,0(x31) +80000210: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x3fedb1d8 +80000214: 000faf03 lw x30,0(x31) +80000218: 004f8f93 addi x31,x31,4 + +8000021c : +Zbkc_clmul_cg_cp_rs1_b10: + clmul x4, x10, x30 # perform operation +8000021c: 0be51233 clmul x4,x10,x30 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zbkc_clmul_cg_cp_rs1_b10, Zbkc_clmul_cg_cp_rs1_b10_str) +80000220: 000ba683 lw x13,0(x23) +80000224: 00468863 beq x13,x4,80000234 +80000228: 3180576f jal x14,80005540 +8000022c: 8000021c .word 0x8000021c +80000230: 800091e5 .word 0x800091e5 +80000234: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0xb110a473 +80000238: 000fa583 lw x11,0(x31) +8000023c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x329b0f2c +80000240: 000fa383 lw x7,0(x31) +80000244: 004f8f93 addi x31,x31,4 + +80000248 : +Zbkc_clmul_cg_cp_rs1_b11: + clmul x27, x11, x7 # perform operation +80000248: 0a759db3 clmul x27,x11,x7 + # Check if x27 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x27, Zbkc_clmul_cg_cp_rs1_b11, Zbkc_clmul_cg_cp_rs1_b11_str) +8000024c: 000ba683 lw x13,0(x23) +80000250: 01b68863 beq x13,x27,80000260 +80000254: 2ec0576f jal x14,80005540 +80000258: 80000248 .word 0x80000248 +8000025c: 80009219 .word 0x80009219 +80000260: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0xd4659c8a +80000264: 000fa603 lw x12,0(x31) +80000268: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x912786ca +8000026c: 000fa803 lw x16,0(x31) +80000270: 004f8f93 addi x31,x31,4 + +80000274 : +Zbkc_clmul_cg_cp_rs1_b12: + clmul x6, x12, x16 # perform operation +80000274: 0b061333 clmul x6,x12,x16 + # Check if x6 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x6, Zbkc_clmul_cg_cp_rs1_b12, Zbkc_clmul_cg_cp_rs1_b12_str) +80000278: 000ba683 lw x13,0(x23) +8000027c: 00668863 beq x13,x6,8000028c +80000280: 2c00576f jal x14,80005540 +80000284: 80000274 .word 0x80000274 +80000288: 8000924d .word 0x8000924d +8000028c: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000290: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000294: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xa9fd77e1 +80000298: 000fa683 lw x13,0(x31) +8000029c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0x9075ff66 +800002a0: 000fa883 lw x17,0(x31) +800002a4: 004f8f93 addi x31,x31,4 + +800002a8 : +Zbkc_clmul_cg_cp_rs1_b13: + clmul x8, x13, x17 # perform operation +800002a8: 0b169433 clmul x8,x13,x17 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkc_clmul_cg_cp_rs1_b13, Zbkc_clmul_cg_cp_rs1_b13_str) +800002ac: 000ba203 lw x4,0(x23) +800002b0: 00820863 beq x4,x8,800002c0 +800002b4: 24c052ef jal x5,80005500 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 80009281 .word 0x80009281 +800002c0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x51b140cb +800002c4: 000fa703 lw x14,0(x31) +800002c8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0xcdb1bc91 +800002cc: 000fa483 lw x9,0(x31) +800002d0: 004f8f93 addi x31,x31,4 + +800002d4 : +Zbkc_clmul_cg_cp_rs1_b14: + clmul x18, x14, x9 # perform operation +800002d4: 0a971933 clmul x18,x14,x9 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkc_clmul_cg_cp_rs1_b14, Zbkc_clmul_cg_cp_rs1_b14_str) +800002d8: 000ba203 lw x4,0(x23) +800002dc: 01220863 beq x4,x18,800002ec +800002e0: 220052ef jal x5,80005500 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 800092b5 .word 0x800092b5 +800002ec: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x1df2b9c4 +800002f0: 000fa783 lw x15,0(x31) +800002f4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xb8ed56c3 +800002f8: 000fa983 lw x19,0(x31) +800002fc: 004f8f93 addi x31,x31,4 + +80000300 : +Zbkc_clmul_cg_cp_rs1_b15: + clmul x17, x15, x19 # perform operation +80000300: 0b3798b3 clmul x17,x15,x19 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkc_clmul_cg_cp_rs1_b15, Zbkc_clmul_cg_cp_rs1_b15_str) +80000304: 000ba203 lw x4,0(x23) +80000308: 01120863 beq x4,x17,80000318 +8000030c: 1f4052ef jal x5,80005500 +80000310: 80000300 .word 0x80000300 +80000314: 800092e9 .word 0x800092e9 +80000318: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0xc8a7e3ee +8000031c: 000fa803 lw x16,0(x31) +80000320: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0xcdd9b5a3 +80000324: 000fa183 lw x3,0(x31) +80000328: 004f8f93 addi x31,x31,4 + +8000032c : +Zbkc_clmul_cg_cp_rs1_b16: + clmul x9, x16, x3 # perform operation +8000032c: 0a3814b3 clmul x9,x16,x3 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkc_clmul_cg_cp_rs1_b16, Zbkc_clmul_cg_cp_rs1_b16_str) +80000330: 000ba203 lw x4,0(x23) +80000334: 00920863 beq x4,x9,80000344 +80000338: 1c8052ef jal x5,80005500 +8000033c: 8000032c .word 0x8000032c +80000340: 8000931d .word 0x8000931d +80000344: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xd6e92205 +80000348: 000fa883 lw x17,0(x31) +8000034c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x983ffebb +80000350: 000fa983 lw x19,0(x31) +80000354: 004f8f93 addi x31,x31,4 + +80000358 : +Zbkc_clmul_cg_cp_rs1_b17: + clmul x18, x17, x19 # perform operation +80000358: 0b389933 clmul x18,x17,x19 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkc_clmul_cg_cp_rs1_b17, Zbkc_clmul_cg_cp_rs1_b17_str) +8000035c: 000ba203 lw x4,0(x23) +80000360: 01220863 beq x4,x18,80000370 +80000364: 19c052ef jal x5,80005500 +80000368: 80000358 .word 0x80000358 +8000036c: 80009351 .word 0x80009351 +80000370: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0xc7423f9c +80000374: 000fa903 lw x18,0(x31) +80000378: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xcf2f66fa +8000037c: 000fa783 lw x15,0(x31) +80000380: 004f8f93 addi x31,x31,4 + +80000384 : +Zbkc_clmul_cg_cp_rs1_b18: + clmul x24, x18, x15 # perform operation +80000384: 0af91c33 clmul x24,x18,x15 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkc_clmul_cg_cp_rs1_b18, Zbkc_clmul_cg_cp_rs1_b18_str) +80000388: 000ba203 lw x4,0(x23) +8000038c: 01820863 beq x4,x24,8000039c +80000390: 170052ef jal x5,80005500 +80000394: 80000384 .word 0x80000384 +80000398: 80009385 .word 0x80009385 +8000039c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x233af9ed +800003a0: 000fa983 lw x19,0(x31) +800003a4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0x833dac5e +800003a8: 000fa783 lw x15,0(x31) +800003ac: 004f8f93 addi x31,x31,4 + +800003b0 : +Zbkc_clmul_cg_cp_rs1_b19: + clmul x21, x19, x15 # perform operation +800003b0: 0af99ab3 clmul x21,x19,x15 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkc_clmul_cg_cp_rs1_b19, Zbkc_clmul_cg_cp_rs1_b19_str) +800003b4: 000ba203 lw x4,0(x23) +800003b8: 01520863 beq x4,x21,800003c8 +800003bc: 144052ef jal x5,80005500 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 800093b9 .word 0x800093b9 +800003c8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xae91eb8d +800003cc: 000faa03 lw x20,0(x31) +800003d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0x9bd06bda +800003d4: 000fa683 lw x13,0(x31) +800003d8: 004f8f93 addi x31,x31,4 + +800003dc : +Zbkc_clmul_cg_cp_rs1_b20: + clmul x7, x20, x13 # perform operation +800003dc: 0ada13b3 clmul x7,x20,x13 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkc_clmul_cg_cp_rs1_b20, Zbkc_clmul_cg_cp_rs1_b20_str) +800003e0: 000ba203 lw x4,0(x23) +800003e4: 00720863 beq x4,x7,800003f4 +800003e8: 118052ef jal x5,80005500 +800003ec: 800003dc .word 0x800003dc +800003f0: 800093ed .word 0x800093ed +800003f4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xfda10eee +800003f8: 000faa83 lw x21,0(x31) +800003fc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x1cfde70a +80000400: 000fa983 lw x19,0(x31) +80000404: 004f8f93 addi x31,x31,4 + +80000408 : +Zbkc_clmul_cg_cp_rs1_b21: + clmul x10, x21, x19 # perform operation +80000408: 0b3a9533 clmul x10,x21,x19 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkc_clmul_cg_cp_rs1_b21, Zbkc_clmul_cg_cp_rs1_b21_str) +8000040c: 000ba203 lw x4,0(x23) +80000410: 00a20863 beq x4,x10,80000420 +80000414: 0ec052ef jal x5,80005500 +80000418: 80000408 .word 0x80000408 +8000041c: 80009421 .word 0x80009421 +80000420: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x62b1e35f +80000424: 000fab03 lw x22,0(x31) +80000428: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0x8e612fdf +8000042c: 000fa403 lw x8,0(x31) +80000430: 004f8f93 addi x31,x31,4 + +80000434 : +Zbkc_clmul_cg_cp_rs1_b22: + clmul x6, x22, x8 # perform operation +80000434: 0a8b1333 clmul x6,x22,x8 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkc_clmul_cg_cp_rs1_b22, Zbkc_clmul_cg_cp_rs1_b22_str) +80000438: 000ba203 lw x4,0(x23) +8000043c: 00620863 beq x4,x6,8000044c +80000440: 0c0052ef jal x5,80005500 +80000444: 80000434 .word 0x80000434 +80000448: 80009455 .word 0x80009455 +8000044c: 004b8b93 addi x23,x23,4 + + mv x18, x23 # switch signature pointer register to avoid conflict with test +80000450: 000b8913 addi x18,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x63b93081 +80000454: 000fab83 lw x23,0(x31) +80000458: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0xf541fe1a +8000045c: 000fa403 lw x8,0(x31) +80000460: 004f8f93 addi x31,x31,4 + +80000464 : +Zbkc_clmul_cg_cp_rs1_b23: + clmul x28, x23, x8 # perform operation +80000464: 0a8b9e33 clmul x28,x23,x8 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zbkc_clmul_cg_cp_rs1_b23, Zbkc_clmul_cg_cp_rs1_b23_str) +80000468: 00092203 lw x4,0(x18) +8000046c: 01c20863 beq x4,x28,8000047c +80000470: 090052ef jal x5,80005500 +80000474: 80000464 .word 0x80000464 +80000478: 80009489 .word 0x80009489 +8000047c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xe51a8823 +80000480: 000fac03 lw x24,0(x31) +80000484: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x6c2f70f9 +80000488: 000fa183 lw x3,0(x31) +8000048c: 004f8f93 addi x31,x31,4 + +80000490 : +Zbkc_clmul_cg_cp_rs1_b24: + clmul x14, x24, x3 # perform operation +80000490: 0a3c1733 clmul x14,x24,x3 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkc_clmul_cg_cp_rs1_b24, Zbkc_clmul_cg_cp_rs1_b24_str) +80000494: 00092203 lw x4,0(x18) +80000498: 00e20863 beq x4,x14,800004a8 +8000049c: 064052ef jal x5,80005500 +800004a0: 80000490 .word 0x80000490 +800004a4: 800094bd .word 0x800094bd +800004a8: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xcb28e1a3 +800004ac: 000fac83 lw x25,0(x31) +800004b0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs2: x0 = 0x50077ca5 +800004b4: 000fa003 lw x0,0(x31) +800004b8: 004f8f93 addi x31,x31,4 + +800004bc : +Zbkc_clmul_cg_cp_rs1_b25: + clmul x13, x25, x0 # perform operation +800004bc: 0a0c96b3 clmul x13,x25,x0 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkc_clmul_cg_cp_rs1_b25, Zbkc_clmul_cg_cp_rs1_b25_str) +800004c0: 00092203 lw x4,0(x18) +800004c4: 00d20863 beq x4,x13,800004d4 +800004c8: 038052ef jal x5,80005500 +800004cc: 800004bc .word 0x800004bc +800004d0: 800094f1 .word 0x800094f1 +800004d4: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x9c0c85f6 +800004d8: 000fad03 lw x26,0(x31) +800004dc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x50e779d4 +800004e0: 000fae03 lw x28,0(x31) +800004e4: 004f8f93 addi x31,x31,4 + +800004e8 : +Zbkc_clmul_cg_cp_rs1_b26: + clmul x8, x26, x28 # perform operation +800004e8: 0bcd1433 clmul x8,x26,x28 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkc_clmul_cg_cp_rs1_b26, Zbkc_clmul_cg_cp_rs1_b26_str) +800004ec: 00092203 lw x4,0(x18) +800004f0: 00820863 beq x4,x8,80000500 +800004f4: 00c052ef jal x5,80005500 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 80009525 .word 0x80009525 +80000500: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x24621875 +80000504: 000fad83 lw x27,0(x31) +80000508: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0xbd8504f0 +8000050c: 000fa583 lw x11,0(x31) +80000510: 004f8f93 addi x31,x31,4 + +80000514 : +Zbkc_clmul_cg_cp_rs1_b27: + clmul x25, x27, x11 # perform operation +80000514: 0abd9cb3 clmul x25,x27,x11 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zbkc_clmul_cg_cp_rs1_b27, Zbkc_clmul_cg_cp_rs1_b27_str) +80000518: 00092203 lw x4,0(x18) +8000051c: 01920863 beq x4,x25,8000052c +80000520: 7e1042ef jal x5,80005500 +80000524: 80000514 .word 0x80000514 +80000528: 80009559 .word 0x80009559 +8000052c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xed9f558b +80000530: 000fae03 lw x28,0(x31) +80000534: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x4b82fef1 +80000538: 000fa383 lw x7,0(x31) +8000053c: 004f8f93 addi x31,x31,4 + +80000540 : +Zbkc_clmul_cg_cp_rs1_b28: + clmul x9, x28, x7 # perform operation +80000540: 0a7e14b3 clmul x9,x28,x7 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zbkc_clmul_cg_cp_rs1_b28, Zbkc_clmul_cg_cp_rs1_b28_str) +80000544: 00092203 lw x4,0(x18) +80000548: 00920863 beq x4,x9,80000558 +8000054c: 7b5042ef jal x5,80005500 +80000550: 80000540 .word 0x80000540 +80000554: 8000958d .word 0x8000958d +80000558: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x3ed70743 +8000055c: 000fae83 lw x29,0(x31) +80000560: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xfa51d8a7 +80000564: 000fa983 lw x19,0(x31) +80000568: 004f8f93 addi x31,x31,4 + +8000056c : +Zbkc_clmul_cg_cp_rs1_b29: + clmul x27, x29, x19 # perform operation +8000056c: 0b3e9db3 clmul x27,x29,x19 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zbkc_clmul_cg_cp_rs1_b29, Zbkc_clmul_cg_cp_rs1_b29_str) +80000570: 00092203 lw x4,0(x18) +80000574: 01b20863 beq x4,x27,80000584 +80000578: 789042ef jal x5,80005500 +8000057c: 8000056c .word 0x8000056c +80000580: 800095c1 .word 0x800095c1 +80000584: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x9fce9cd1 +80000588: 000faf03 lw x30,0(x31) +8000058c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x02ce8819 +80000590: 000faa03 lw x20,0(x31) +80000594: 004f8f93 addi x31,x31,4 + +80000598 : +Zbkc_clmul_cg_cp_rs1_b30: + clmul x6, x30, x20 # perform operation +80000598: 0b4f1333 clmul x6,x30,x20 + # Check if x6 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x6, Zbkc_clmul_cg_cp_rs1_b30, Zbkc_clmul_cg_cp_rs1_b30_str) +8000059c: 00092203 lw x4,0(x18) +800005a0: 00620863 beq x4,x6,800005b0 +800005a4: 75d042ef jal x5,80005500 +800005a8: 80000598 .word 0x80000598 +800005ac: 800095f5 .word 0x800095f5 +800005b0: 00490913 addi x18,x18,4 + + mv x15, x31 # switch data pointer register to avoid conflict with test +800005b4: 000f8793 addi x15,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xd9433b5a +800005b8: 0007af83 lw x31,0(x15) +800005bc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x5352a186 +800005c0: 0007a703 lw x14,0(x15) +800005c4: 00478793 addi x15,x15,4 + +800005c8 : +Zbkc_clmul_cg_cp_rs1_b31: + clmul x26, x31, x14 # perform operation +800005c8: 0aef9d33 clmul x26,x31,x14 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_b31, Zbkc_clmul_cg_cp_rs1_b31_str) +800005cc: 00092203 lw x4,0(x18) +800005d0: 01a20863 beq x4,x26,800005e0 +800005d4: 72d042ef jal x5,80005500 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 80009629 .word 0x80009629 +800005e0: 00490913 addi x18,x18,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xf8473f76 +800005e4: 0007a583 lw x11,0(x15) +800005e8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x0b70caed +800005ec: 0007a003 lw x0,0(x15) +800005f0: 00478793 addi x15,x15,4 + +800005f4 : +Zbkc_clmul_cg_cp_rs2_b0: + clmul x1, x11, x0 # perform operation +800005f4: 0a0590b3 clmul x1,x11,x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkc_clmul_cg_cp_rs2_b0, Zbkc_clmul_cg_cp_rs2_b0_str) +800005f8: 00092203 lw x4,0(x18) +800005fc: 00120863 beq x4,x1,8000060c +80000600: 701042ef jal x5,80005500 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000965d .word 0x8000965d +8000060c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x060e0999 +80000610: 0007a103 lw x2,0(x15) +80000614: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x34d6b1ae +80000618: 0007a083 lw x1,0(x15) +8000061c: 00478793 addi x15,x15,4 + +80000620 : +Zbkc_clmul_cg_cp_rs2_b1: + clmul x0, x2, x1 # perform operation +80000620: 0a111033 clmul x0,x2,x1 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkc_clmul_cg_cp_rs2_b1, Zbkc_clmul_cg_cp_rs2_b1_str) +80000624: 00092203 lw x4,0(x18) +80000628: 00020863 beq x4,x0,80000638 +8000062c: 6d5042ef jal x5,80005500 +80000630: 80000620 .word 0x80000620 +80000634: 80009690 .word 0x80009690 +80000638: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x763037b9 +8000063c: 0007a403 lw x8,0(x15) +80000640: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x2c1baa01 +80000644: 0007a103 lw x2,0(x15) +80000648: 00478793 addi x15,x15,4 + +8000064c : +Zbkc_clmul_cg_cp_rs2_b2: + clmul x7, x8, x2 # perform operation +8000064c: 0a2413b3 clmul x7,x8,x2 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zbkc_clmul_cg_cp_rs2_b2, Zbkc_clmul_cg_cp_rs2_b2_str) +80000650: 00092203 lw x4,0(x18) +80000654: 00720863 beq x4,x7,80000664 +80000658: 6a9042ef jal x5,80005500 +8000065c: 8000064c .word 0x8000064c +80000660: 800096c3 .word 0x800096c3 +80000664: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xfc3312fc +80000668: 0007a503 lw x10,0(x15) +8000066c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x16ad9071 +80000670: 0007a183 lw x3,0(x15) +80000674: 00478793 addi x15,x15,4 + +80000678 : +Zbkc_clmul_cg_cp_rs2_b3: + clmul x8, x10, x3 # perform operation +80000678: 0a351433 clmul x8,x10,x3 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkc_clmul_cg_cp_rs2_b3, Zbkc_clmul_cg_cp_rs2_b3_str) +8000067c: 00092203 lw x4,0(x18) +80000680: 00820863 beq x4,x8,80000690 +80000684: 67d042ef jal x5,80005500 +80000688: 80000678 .word 0x80000678 +8000068c: 800096f6 .word 0x800096f6 +80000690: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000694: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000698: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x57ef0cef +8000069c: 0007af83 lw x31,0(x15) +800006a0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x3060dde3 +800006a4: 0007a203 lw x4,0(x15) +800006a8: 00478793 addi x15,x15,4 + +800006ac : +Zbkc_clmul_cg_cp_rs2_b4: + clmul x11, x31, x4 # perform operation +800006ac: 0a4f95b3 clmul x11,x31,x4 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zbkc_clmul_cg_cp_rs2_b4, Zbkc_clmul_cg_cp_rs2_b4_str) +800006b0: 00092383 lw x7,0(x18) +800006b4: 00b38863 beq x7,x11,800006c4 +800006b8: 6610446f jal x8,80005518 +800006bc: 800006ac .word 0x800006ac +800006c0: 80009729 .word 0x80009729 +800006c4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xb9edf920 +800006c8: 0007aa03 lw x20,0(x15) +800006cc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x3a51f4ec +800006d0: 0007a283 lw x5,0(x15) +800006d4: 00478793 addi x15,x15,4 + +800006d8 : +Zbkc_clmul_cg_cp_rs2_b5: + clmul x16, x20, x5 # perform operation +800006d8: 0a5a1833 clmul x16,x20,x5 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkc_clmul_cg_cp_rs2_b5, Zbkc_clmul_cg_cp_rs2_b5_str) +800006dc: 00092383 lw x7,0(x18) +800006e0: 01038863 beq x7,x16,800006f0 +800006e4: 6350446f jal x8,80005518 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000975c .word 0x8000975c +800006f0: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x060f910c +800006f4: 0007a483 lw x9,0(x15) +800006f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xec8e4cd9 +800006fc: 0007a303 lw x6,0(x15) +80000700: 00478793 addi x15,x15,4 + +80000704 : +Zbkc_clmul_cg_cp_rs2_b6: + clmul x20, x9, x6 # perform operation +80000704: 0a649a33 clmul x20,x9,x6 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zbkc_clmul_cg_cp_rs2_b6, Zbkc_clmul_cg_cp_rs2_b6_str) +80000708: 00092383 lw x7,0(x18) +8000070c: 01438863 beq x7,x20,8000071c +80000710: 6090446f jal x8,80005518 +80000714: 80000704 .word 0x80000704 +80000718: 8000978f .word 0x8000978f +8000071c: 00490913 addi x18,x18,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000720: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000724: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xf2a864c1 +80000728: 0007a583 lw x11,0(x15) +8000072c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xe78c6534 +80000730: 0007a383 lw x7,0(x15) +80000734: 00478793 addi x15,x15,4 + +80000738 : +Zbkc_clmul_cg_cp_rs2_b7: + clmul x31, x11, x7 # perform operation +80000738: 0a759fb3 clmul x31,x11,x7 + # Check if x31 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x31, Zbkc_clmul_cg_cp_rs2_b7, Zbkc_clmul_cg_cp_rs2_b7_str) +8000073c: 00092683 lw x13,0(x18) +80000740: 01f68863 beq x13,x31,80000750 +80000744: 5fd0476f jal x14,80005540 +80000748: 80000738 .word 0x80000738 +8000074c: 800097c2 .word 0x800097c2 +80000750: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7d9acfb9 +80000754: 0007a883 lw x17,0(x15) +80000758: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xa3892c25 +8000075c: 0007a403 lw x8,0(x15) +80000760: 00478793 addi x15,x15,4 + +80000764 : +Zbkc_clmul_cg_cp_rs2_b8: + clmul x21, x17, x8 # perform operation +80000764: 0a889ab3 clmul x21,x17,x8 + # Check if x21 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x21, Zbkc_clmul_cg_cp_rs2_b8, Zbkc_clmul_cg_cp_rs2_b8_str) +80000768: 00092683 lw x13,0(x18) +8000076c: 01568863 beq x13,x21,8000077c +80000770: 5d10476f jal x14,80005540 +80000774: 80000764 .word 0x80000764 +80000778: 800097f5 .word 0x800097f5 +8000077c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x612a8a53 +80000780: 0007ab83 lw x23,0(x15) +80000784: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xfec67da3 +80000788: 0007a483 lw x9,0(x15) +8000078c: 00478793 addi x15,x15,4 + +80000790 : +Zbkc_clmul_cg_cp_rs2_b9: + clmul x20, x23, x9 # perform operation +80000790: 0a9b9a33 clmul x20,x23,x9 + # Check if x20 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x20, Zbkc_clmul_cg_cp_rs2_b9, Zbkc_clmul_cg_cp_rs2_b9_str) +80000794: 00092683 lw x13,0(x18) +80000798: 01468863 beq x13,x20,800007a8 +8000079c: 5a50476f jal x14,80005540 +800007a0: 80000790 .word 0x80000790 +800007a4: 80009828 .word 0x80009828 +800007a8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x9c85d923 +800007ac: 0007a083 lw x1,0(x15) +800007b0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x2f0f2520 +800007b4: 0007a503 lw x10,0(x15) +800007b8: 00478793 addi x15,x15,4 + +800007bc : +Zbkc_clmul_cg_cp_rs2_b10: + clmul x31, x1, x10 # perform operation +800007bc: 0aa09fb3 clmul x31,x1,x10 + # Check if x31 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x31, Zbkc_clmul_cg_cp_rs2_b10, Zbkc_clmul_cg_cp_rs2_b10_str) +800007c0: 00092683 lw x13,0(x18) +800007c4: 01f68863 beq x13,x31,800007d4 +800007c8: 5790476f jal x14,80005540 +800007cc: 800007bc .word 0x800007bc +800007d0: 8000985b .word 0x8000985b +800007d4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xca86e7c1 +800007d8: 0007ac03 lw x24,0(x15) +800007dc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x3a36e7d7 +800007e0: 0007a583 lw x11,0(x15) +800007e4: 00478793 addi x15,x15,4 + +800007e8 : +Zbkc_clmul_cg_cp_rs2_b11: + clmul x9, x24, x11 # perform operation +800007e8: 0abc14b3 clmul x9,x24,x11 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkc_clmul_cg_cp_rs2_b11, Zbkc_clmul_cg_cp_rs2_b11_str) +800007ec: 00092683 lw x13,0(x18) +800007f0: 00968863 beq x13,x9,80000800 +800007f4: 54d0476f jal x14,80005540 +800007f8: 800007e8 .word 0x800007e8 +800007fc: 8000988f .word 0x8000988f +80000800: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x3a538961 +80000804: 0007a003 lw x0,0(x15) +80000808: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xa8255220 +8000080c: 0007a603 lw x12,0(x15) +80000810: 00478793 addi x15,x15,4 + +80000814 : +Zbkc_clmul_cg_cp_rs2_b12: + clmul x2, x0, x12 # perform operation +80000814: 0ac01133 clmul x2,x0,x12 + # Check if x2 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x2, Zbkc_clmul_cg_cp_rs2_b12, Zbkc_clmul_cg_cp_rs2_b12_str) +80000818: 00092683 lw x13,0(x18) +8000081c: 00268863 beq x13,x2,8000082c +80000820: 5210476f jal x14,80005540 +80000824: 80000814 .word 0x80000814 +80000828: 800098c3 .word 0x800098c3 +8000082c: 00490913 addi x18,x18,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000830: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000834: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xa919ea4b +80000838: 0007a803 lw x16,0(x15) +8000083c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x18ecde41 +80000840: 0007a683 lw x13,0(x15) +80000844: 00478793 addi x15,x15,4 + +80000848 : +Zbkc_clmul_cg_cp_rs2_b13: + clmul x25, x16, x13 # perform operation +80000848: 0ad81cb3 clmul x25,x16,x13 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zbkc_clmul_cg_cp_rs2_b13, Zbkc_clmul_cg_cp_rs2_b13_str) +8000084c: 00092383 lw x7,0(x18) +80000850: 01938863 beq x7,x25,80000860 +80000854: 4c50446f jal x8,80005518 +80000858: 80000848 .word 0x80000848 +8000085c: 800098f7 .word 0x800098f7 +80000860: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x17a610f3 +80000864: 0007a303 lw x6,0(x15) +80000868: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x61572a38 +8000086c: 0007a703 lw x14,0(x15) +80000870: 00478793 addi x15,x15,4 + +80000874 : +Zbkc_clmul_cg_cp_rs2_b14: + clmul x2, x6, x14 # perform operation +80000874: 0ae31133 clmul x2,x6,x14 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zbkc_clmul_cg_cp_rs2_b14, Zbkc_clmul_cg_cp_rs2_b14_str) +80000878: 00092383 lw x7,0(x18) +8000087c: 00238863 beq x7,x2,8000088c +80000880: 4990446f jal x8,80005518 +80000884: 80000874 .word 0x80000874 +80000888: 8000992b .word 0x8000992b +8000088c: 00490913 addi x18,x18,4 + + mv x3, x15 # switch data pointer register to avoid conflict with test +80000890: 00078193 addi x3,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0xb9d2c3ab +80000894: 0001a283 lw x5,0(x3) +80000898: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x3b7d7744 +8000089c: 0001a783 lw x15,0(x3) +800008a0: 00418193 addi x3,x3,4 + +800008a4 : +Zbkc_clmul_cg_cp_rs2_b15: + clmul x24, x5, x15 # perform operation +800008a4: 0af29c33 clmul x24,x5,x15 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zbkc_clmul_cg_cp_rs2_b15, Zbkc_clmul_cg_cp_rs2_b15_str) +800008a8: 00092383 lw x7,0(x18) +800008ac: 01838863 beq x7,x24,800008bc +800008b0: 4690446f jal x8,80005518 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 8000995f .word 0x8000995f +800008bc: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xd901db60 +800008c0: 0001ac83 lw x25,0(x3) +800008c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xe5b978f7 +800008c8: 0001a803 lw x16,0(x3) +800008cc: 00418193 addi x3,x3,4 + +800008d0 : +Zbkc_clmul_cg_cp_rs2_b16: + clmul x14, x25, x16 # perform operation +800008d0: 0b0c9733 clmul x14,x25,x16 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zbkc_clmul_cg_cp_rs2_b16, Zbkc_clmul_cg_cp_rs2_b16_str) +800008d4: 00092383 lw x7,0(x18) +800008d8: 00e38863 beq x7,x14,800008e8 +800008dc: 43d0446f jal x8,80005518 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 80009993 .word 0x80009993 +800008e8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x83348ca1 +800008ec: 0001aa03 lw x20,0(x3) +800008f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x64665e5c +800008f4: 0001a883 lw x17,0(x3) +800008f8: 00418193 addi x3,x3,4 + +800008fc : +Zbkc_clmul_cg_cp_rs2_b17: + clmul x4, x20, x17 # perform operation +800008fc: 0b1a1233 clmul x4,x20,x17 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zbkc_clmul_cg_cp_rs2_b17, Zbkc_clmul_cg_cp_rs2_b17_str) +80000900: 00092383 lw x7,0(x18) +80000904: 00438863 beq x7,x4,80000914 +80000908: 4110446f jal x8,80005518 +8000090c: 800008fc .word 0x800008fc +80000910: 800099c7 .word 0x800099c7 +80000914: 00490913 addi x18,x18,4 + + mv x15, x18 # switch signature pointer register to avoid conflict with test +80000918: 00090793 addi x15,x18,0 +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x25a96477 +8000091c: 0001ad83 lw x27,0(x3) +80000920: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xb53cb24b +80000924: 0001a903 lw x18,0(x3) +80000928: 00418193 addi x3,x3,4 + +8000092c : +Zbkc_clmul_cg_cp_rs2_b18: + clmul x22, x27, x18 # perform operation +8000092c: 0b2d9b33 clmul x22,x27,x18 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkc_clmul_cg_cp_rs2_b18, Zbkc_clmul_cg_cp_rs2_b18_str) +80000930: 0007a383 lw x7,0(x15) +80000934: 01638863 beq x7,x22,80000944 +80000938: 3e10446f jal x8,80005518 +8000093c: 8000092c .word 0x8000092c +80000940: 800099fb .word 0x800099fb +80000944: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x401daa82 +80000948: 0001a803 lw x16,0(x3) +8000094c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x739ef45f +80000950: 0001a983 lw x19,0(x3) +80000954: 00418193 addi x3,x3,4 + +80000958 : +Zbkc_clmul_cg_cp_rs2_b19: + clmul x18, x16, x19 # perform operation +80000958: 0b381933 clmul x18,x16,x19 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkc_clmul_cg_cp_rs2_b19, Zbkc_clmul_cg_cp_rs2_b19_str) +8000095c: 0007a383 lw x7,0(x15) +80000960: 01238863 beq x7,x18,80000970 +80000964: 3b50446f jal x8,80005518 +80000968: 80000958 .word 0x80000958 +8000096c: 80009a2f .word 0x80009a2f +80000970: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1d3bb207 +80000974: 0001a083 lw x1,0(x3) +80000978: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x32a34626 +8000097c: 0001aa03 lw x20,0(x3) +80000980: 00418193 addi x3,x3,4 + +80000984 : +Zbkc_clmul_cg_cp_rs2_b20: + clmul x18, x1, x20 # perform operation +80000984: 0b409933 clmul x18,x1,x20 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkc_clmul_cg_cp_rs2_b20, Zbkc_clmul_cg_cp_rs2_b20_str) +80000988: 0007a383 lw x7,0(x15) +8000098c: 01238863 beq x7,x18,8000099c +80000990: 3890446f jal x8,80005518 +80000994: 80000984 .word 0x80000984 +80000998: 80009a63 .word 0x80009a63 +8000099c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x514a58fb +800009a0: 0001a503 lw x10,0(x3) +800009a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x04fe283c +800009a8: 0001aa83 lw x21,0(x3) +800009ac: 00418193 addi x3,x3,4 + +800009b0 : +Zbkc_clmul_cg_cp_rs2_b21: + clmul x6, x10, x21 # perform operation +800009b0: 0b551333 clmul x6,x10,x21 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkc_clmul_cg_cp_rs2_b21, Zbkc_clmul_cg_cp_rs2_b21_str) +800009b4: 0007a383 lw x7,0(x15) +800009b8: 00638863 beq x7,x6,800009c8 +800009bc: 35d0446f jal x8,80005518 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 80009a97 .word 0x80009a97 +800009c8: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x99260324 +800009cc: 0001ac83 lw x25,0(x3) +800009d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xaa056331 +800009d4: 0001ab03 lw x22,0(x3) +800009d8: 00418193 addi x3,x3,4 + +800009dc : +Zbkc_clmul_cg_cp_rs2_b22: + clmul x6, x25, x22 # perform operation +800009dc: 0b6c9333 clmul x6,x25,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkc_clmul_cg_cp_rs2_b22, Zbkc_clmul_cg_cp_rs2_b22_str) +800009e0: 0007a383 lw x7,0(x15) +800009e4: 00638863 beq x7,x6,800009f4 +800009e8: 3310446f jal x8,80005518 +800009ec: 800009dc .word 0x800009dc +800009f0: 80009acb .word 0x80009acb +800009f4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xa0a7628b +800009f8: 0001aa83 lw x21,0(x3) +800009fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x0b8c1561 +80000a00: 0001ab83 lw x23,0(x3) +80000a04: 00418193 addi x3,x3,4 + +80000a08 : +Zbkc_clmul_cg_cp_rs2_b23: + clmul x29, x21, x23 # perform operation +80000a08: 0b7a9eb3 clmul x29,x21,x23 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkc_clmul_cg_cp_rs2_b23, Zbkc_clmul_cg_cp_rs2_b23_str) +80000a0c: 0007a383 lw x7,0(x15) +80000a10: 01d38863 beq x7,x29,80000a20 +80000a14: 3050446f jal x8,80005518 +80000a18: 80000a08 .word 0x80000a08 +80000a1c: 80009aff .word 0x80009aff +80000a20: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x2e18c3f9 +80000a24: 0001a703 lw x14,0(x3) +80000a28: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xb84b124d +80000a2c: 0001ac03 lw x24,0(x3) +80000a30: 00418193 addi x3,x3,4 + +80000a34 : +Zbkc_clmul_cg_cp_rs2_b24: + clmul x11, x14, x24 # perform operation +80000a34: 0b8715b3 clmul x11,x14,x24 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkc_clmul_cg_cp_rs2_b24, Zbkc_clmul_cg_cp_rs2_b24_str) +80000a38: 0007a383 lw x7,0(x15) +80000a3c: 00b38863 beq x7,x11,80000a4c +80000a40: 2d90446f jal x8,80005518 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 80009b33 .word 0x80009b33 +80000a4c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xe2f1a61a +80000a50: 0001a983 lw x19,0(x3) +80000a54: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x6f4abf48 +80000a58: 0001ac83 lw x25,0(x3) +80000a5c: 00418193 addi x3,x3,4 + +80000a60 : +Zbkc_clmul_cg_cp_rs2_b25: + clmul x21, x19, x25 # perform operation +80000a60: 0b999ab3 clmul x21,x19,x25 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkc_clmul_cg_cp_rs2_b25, Zbkc_clmul_cg_cp_rs2_b25_str) +80000a64: 0007a383 lw x7,0(x15) +80000a68: 01538863 beq x7,x21,80000a78 +80000a6c: 2ad0446f jal x8,80005518 +80000a70: 80000a60 .word 0x80000a60 +80000a74: 80009b67 .word 0x80009b67 +80000a78: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x54d764c5 +80000a7c: 0001a483 lw x9,0(x3) +80000a80: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xdd230b9d +80000a84: 0001ad03 lw x26,0(x3) +80000a88: 00418193 addi x3,x3,4 + +80000a8c : +Zbkc_clmul_cg_cp_rs2_b26: + clmul x23, x9, x26 # perform operation +80000a8c: 0ba49bb3 clmul x23,x9,x26 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkc_clmul_cg_cp_rs2_b26, Zbkc_clmul_cg_cp_rs2_b26_str) +80000a90: 0007a383 lw x7,0(x15) +80000a94: 01738863 beq x7,x23,80000aa4 +80000a98: 2810446f jal x8,80005518 +80000a9c: 80000a8c .word 0x80000a8c +80000aa0: 80009b9b .word 0x80009b9b +80000aa4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x722bdc8e +80000aa8: 0001a303 lw x6,0(x3) +80000aac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xf30694cb +80000ab0: 0001ad83 lw x27,0(x3) +80000ab4: 00418193 addi x3,x3,4 + +80000ab8 : +Zbkc_clmul_cg_cp_rs2_b27: + clmul x28, x6, x27 # perform operation +80000ab8: 0bb31e33 clmul x28,x6,x27 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkc_clmul_cg_cp_rs2_b27, Zbkc_clmul_cg_cp_rs2_b27_str) +80000abc: 0007a383 lw x7,0(x15) +80000ac0: 01c38863 beq x7,x28,80000ad0 +80000ac4: 2550446f jal x8,80005518 +80000ac8: 80000ab8 .word 0x80000ab8 +80000acc: 80009bcf .word 0x80009bcf +80000ad0: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xe6fcd934 +80000ad4: 0001aa03 lw x20,0(x3) +80000ad8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x3d9be5ed +80000adc: 0001ae03 lw x28,0(x3) +80000ae0: 00418193 addi x3,x3,4 + +80000ae4 : +Zbkc_clmul_cg_cp_rs2_b28: + clmul x27, x20, x28 # perform operation +80000ae4: 0bca1db3 clmul x27,x20,x28 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkc_clmul_cg_cp_rs2_b28, Zbkc_clmul_cg_cp_rs2_b28_str) +80000ae8: 0007a383 lw x7,0(x15) +80000aec: 01b38863 beq x7,x27,80000afc +80000af0: 2290446f jal x8,80005518 +80000af4: 80000ae4 .word 0x80000ae4 +80000af8: 80009c03 .word 0x80009c03 +80000afc: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0xf6c40a6a +80000b00: 0001a303 lw x6,0(x3) +80000b04: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x41f19408 +80000b08: 0001ae83 lw x29,0(x3) +80000b0c: 00418193 addi x3,x3,4 + +80000b10 : +Zbkc_clmul_cg_cp_rs2_b29: + clmul x0, x6, x29 # perform operation +80000b10: 0bd31033 clmul x0,x6,x29 + # Check if x0 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x0, Zbkc_clmul_cg_cp_rs2_b29, Zbkc_clmul_cg_cp_rs2_b29_str) +80000b14: 0007a383 lw x7,0(x15) +80000b18: 00038863 beq x7,x0,80000b28 +80000b1c: 1fd0446f jal x8,80005518 +80000b20: 80000b10 .word 0x80000b10 +80000b24: 80009c37 .word 0x80009c37 +80000b28: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x858a311a +80000b2c: 0001a003 lw x0,0(x3) +80000b30: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x9a6dcade +80000b34: 0001af03 lw x30,0(x3) +80000b38: 00418193 addi x3,x3,4 + +80000b3c : +Zbkc_clmul_cg_cp_rs2_b30: + clmul x11, x0, x30 # perform operation +80000b3c: 0be015b3 clmul x11,x0,x30 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkc_clmul_cg_cp_rs2_b30, Zbkc_clmul_cg_cp_rs2_b30_str) +80000b40: 0007a383 lw x7,0(x15) +80000b44: 00b38863 beq x7,x11,80000b54 +80000b48: 1d10446f jal x8,80005518 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 80009c6b .word 0x80009c6b +80000b54: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xfb7594ec +80000b58: 0001a103 lw x2,0(x3) +80000b5c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xd626e863 +80000b60: 0001af83 lw x31,0(x3) +80000b64: 00418193 addi x3,x3,4 + +80000b68 : +Zbkc_clmul_cg_cp_rs2_b31: + clmul x23, x2, x31 # perform operation +80000b68: 0bf11bb3 clmul x23,x2,x31 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkc_clmul_cg_cp_rs2_b31, Zbkc_clmul_cg_cp_rs2_b31_str) +80000b6c: 0007a383 lw x7,0(x15) +80000b70: 01738863 beq x7,x23,80000b80 +80000b74: 1a50446f jal x8,80005518 +80000b78: 80000b68 .word 0x80000b68 +80000b7c: 80009c9f .word 0x80009c9f +80000b80: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x25043277 +80000b84: 0001ac03 lw x24,0(x3) +80000b88: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xe9bafe2e +80000b8c: 0001a903 lw x18,0(x3) +80000b90: 00418193 addi x3,x3,4 + +80000b94 : +Zbkc_clmul_cg_cp_rd_b0: + clmul x0, x24, x18 # perform operation +80000b94: 0b2c1033 clmul x0,x24,x18 + # Check if x0 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x0, Zbkc_clmul_cg_cp_rd_b0, Zbkc_clmul_cg_cp_rd_b0_str) +80000b98: 0007a383 lw x7,0(x15) +80000b9c: 00038863 beq x7,x0,80000bac +80000ba0: 1790446f jal x8,80005518 +80000ba4: 80000b94 .word 0x80000b94 +80000ba8: 80009cd3 .word 0x80009cd3 +80000bac: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x9e2f5242 +80000bb0: 0001a803 lw x16,0(x3) +80000bb4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x68a0489e +80000bb8: 0001af03 lw x30,0(x3) +80000bbc: 00418193 addi x3,x3,4 + +80000bc0 : +Zbkc_clmul_cg_cp_rd_b1: + clmul x1, x16, x30 # perform operation +80000bc0: 0be810b3 clmul x1,x16,x30 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkc_clmul_cg_cp_rd_b1, Zbkc_clmul_cg_cp_rd_b1_str) +80000bc4: 0007a383 lw x7,0(x15) +80000bc8: 00138863 beq x7,x1,80000bd8 +80000bcc: 14d0446f jal x8,80005518 +80000bd0: 80000bc0 .word 0x80000bc0 +80000bd4: 80009d05 .word 0x80009d05 +80000bd8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x8976e833 +80000bdc: 0001a003 lw x0,0(x3) +80000be0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x38df5cde +80000be4: 0001ab83 lw x23,0(x3) +80000be8: 00418193 addi x3,x3,4 + +80000bec : +Zbkc_clmul_cg_cp_rd_b2: + clmul x2, x0, x23 # perform operation +80000bec: 0b701133 clmul x2,x0,x23 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkc_clmul_cg_cp_rd_b2, Zbkc_clmul_cg_cp_rd_b2_str) +80000bf0: 0007a383 lw x7,0(x15) +80000bf4: 00238863 beq x7,x2,80000c04 +80000bf8: 1210446f jal x8,80005518 +80000bfc: 80000bec .word 0x80000bec +80000c00: 80009d37 .word 0x80009d37 +80000c04: 00478793 addi x15,x15,4 + + mv x9, x3 # switch data pointer register to avoid conflict with test +80000c08: 00018493 addi x9,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x50836d6e +80000c0c: 0004ac03 lw x24,0(x9) +80000c10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x9abf9d01 +80000c14: 0004a603 lw x12,0(x9) +80000c18: 00448493 addi x9,x9,4 + +80000c1c : +Zbkc_clmul_cg_cp_rd_b3: + clmul x3, x24, x12 # perform operation +80000c1c: 0acc11b3 clmul x3,x24,x12 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkc_clmul_cg_cp_rd_b3, Zbkc_clmul_cg_cp_rd_b3_str) +80000c20: 0007a383 lw x7,0(x15) +80000c24: 00338863 beq x7,x3,80000c34 +80000c28: 0f10446f jal x8,80005518 +80000c2c: 80000c1c .word 0x80000c1c +80000c30: 80009d69 .word 0x80009d69 +80000c34: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x2580a8b4 +80000c38: 0004a583 lw x11,0(x9) +80000c3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x2cc7e279 +80000c40: 0004ac83 lw x25,0(x9) +80000c44: 00448493 addi x9,x9,4 + +80000c48 : +Zbkc_clmul_cg_cp_rd_b4: + clmul x4, x11, x25 # perform operation +80000c48: 0b959233 clmul x4,x11,x25 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkc_clmul_cg_cp_rd_b4, Zbkc_clmul_cg_cp_rd_b4_str) +80000c4c: 0007a383 lw x7,0(x15) +80000c50: 00438863 beq x7,x4,80000c60 +80000c54: 0c50446f jal x8,80005518 +80000c58: 80000c48 .word 0x80000c48 +80000c5c: 80009d9b .word 0x80009d9b +80000c60: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x49b60559 +80000c64: 0004aa03 lw x20,0(x9) +80000c68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x2a4fc2af +80000c6c: 0004af03 lw x30,0(x9) +80000c70: 00448493 addi x9,x9,4 + +80000c74 : +Zbkc_clmul_cg_cp_rd_b5: + clmul x5, x20, x30 # perform operation +80000c74: 0bea12b3 clmul x5,x20,x30 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkc_clmul_cg_cp_rd_b5, Zbkc_clmul_cg_cp_rd_b5_str) +80000c78: 0007a383 lw x7,0(x15) +80000c7c: 00538863 beq x7,x5,80000c8c +80000c80: 0990446f jal x8,80005518 +80000c84: 80000c74 .word 0x80000c74 +80000c88: 80009dcd .word 0x80009dcd +80000c8c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xbb5c9cc9 +80000c90: 0004aa03 lw x20,0(x9) +80000c94: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xde9df7d4 +80000c98: 0004a183 lw x3,0(x9) +80000c9c: 00448493 addi x9,x9,4 + +80000ca0 : +Zbkc_clmul_cg_cp_rd_b6: + clmul x6, x20, x3 # perform operation +80000ca0: 0a3a1333 clmul x6,x20,x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkc_clmul_cg_cp_rd_b6, Zbkc_clmul_cg_cp_rd_b6_str) +80000ca4: 0007a383 lw x7,0(x15) +80000ca8: 00638863 beq x7,x6,80000cb8 +80000cac: 06d0446f jal x8,80005518 +80000cb0: 80000ca0 .word 0x80000ca0 +80000cb4: 80009dff .word 0x80009dff +80000cb8: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cbc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cc0: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x456f9ada +80000cc4: 0004af83 lw x31,0(x9) +80000cc8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x2d5d3b8d +80000ccc: 0004a403 lw x8,0(x9) +80000cd0: 00448493 addi x9,x9,4 + +80000cd4 : +Zbkc_clmul_cg_cp_rd_b7: + clmul x7, x31, x8 # perform operation +80000cd4: 0a8f93b3 clmul x7,x31,x8 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkc_clmul_cg_cp_rd_b7, Zbkc_clmul_cg_cp_rd_b7_str) +80000cd8: 0007a683 lw x13,0(x15) +80000cdc: 00768863 beq x13,x7,80000cec +80000ce0: 0610476f jal x14,80005540 +80000ce4: 80000cd4 .word 0x80000cd4 +80000ce8: 80009e31 .word 0x80009e31 +80000cec: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xff0c2052 +80000cf0: 0004ad83 lw x27,0(x9) +80000cf4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xe01506bb +80000cf8: 0004ad03 lw x26,0(x9) +80000cfc: 00448493 addi x9,x9,4 + +80000d00 : +Zbkc_clmul_cg_cp_rd_b8: + clmul x8, x27, x26 # perform operation +80000d00: 0bad9433 clmul x8,x27,x26 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkc_clmul_cg_cp_rd_b8, Zbkc_clmul_cg_cp_rd_b8_str) +80000d04: 0007a683 lw x13,0(x15) +80000d08: 00868863 beq x13,x8,80000d18 +80000d0c: 0350476f jal x14,80005540 +80000d10: 80000d00 .word 0x80000d00 +80000d14: 80009e63 .word 0x80009e63 +80000d18: 00478793 addi x15,x15,4 + + mv x24, x9 # switch data pointer register to avoid conflict with test +80000d1c: 00048c13 addi x24,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x851c1790 +80000d20: 000c2403 lw x8,0(x24) +80000d24: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x88671ecf +80000d28: 000c2003 lw x0,0(x24) +80000d2c: 004c0c13 addi x24,x24,4 + +80000d30 : +Zbkc_clmul_cg_cp_rd_b9: + clmul x9, x8, x0 # perform operation +80000d30: 0a0414b3 clmul x9,x8,x0 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkc_clmul_cg_cp_rd_b9, Zbkc_clmul_cg_cp_rd_b9_str) +80000d34: 0007a683 lw x13,0(x15) +80000d38: 00968863 beq x13,x9,80000d48 +80000d3c: 0050476f jal x14,80005540 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 80009e95 .word 0x80009e95 +80000d48: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x37d26656 +80000d4c: 000c2483 lw x9,0(x24) +80000d50: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xd1326bed +80000d54: 000c2b03 lw x22,0(x24) +80000d58: 004c0c13 addi x24,x24,4 + +80000d5c : +Zbkc_clmul_cg_cp_rd_b10: + clmul x10, x9, x22 # perform operation +80000d5c: 0b649533 clmul x10,x9,x22 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkc_clmul_cg_cp_rd_b10, Zbkc_clmul_cg_cp_rd_b10_str) +80000d60: 0007a683 lw x13,0(x15) +80000d64: 00a68863 beq x13,x10,80000d74 +80000d68: 7d80476f jal x14,80005540 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 80009ec7 .word 0x80009ec7 +80000d74: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x46d31421 +80000d78: 000c2983 lw x19,0(x24) +80000d7c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x27c59b14 +80000d80: 000c2483 lw x9,0(x24) +80000d84: 004c0c13 addi x24,x24,4 + +80000d88 : +Zbkc_clmul_cg_cp_rd_b11: + clmul x11, x19, x9 # perform operation +80000d88: 0a9995b3 clmul x11,x19,x9 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkc_clmul_cg_cp_rd_b11, Zbkc_clmul_cg_cp_rd_b11_str) +80000d8c: 0007a683 lw x13,0(x15) +80000d90: 00b68863 beq x13,x11,80000da0 +80000d94: 7ac0476f jal x14,80005540 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80009efa .word 0x80009efa +80000da0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x233172a8 +80000da4: 000c2483 lw x9,0(x24) +80000da8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x985f29a0 +80000dac: 000c2a83 lw x21,0(x24) +80000db0: 004c0c13 addi x24,x24,4 + +80000db4 : +Zbkc_clmul_cg_cp_rd_b12: + clmul x12, x9, x21 # perform operation +80000db4: 0b549633 clmul x12,x9,x21 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkc_clmul_cg_cp_rd_b12, Zbkc_clmul_cg_cp_rd_b12_str) +80000db8: 0007a683 lw x13,0(x15) +80000dbc: 00c68863 beq x13,x12,80000dcc +80000dc0: 7800476f jal x14,80005540 +80000dc4: 80000db4 .word 0x80000db4 +80000dc8: 80009f2d .word 0x80009f2d +80000dcc: 00478793 addi x15,x15,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dd0: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dd4: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x503fce56 +80000dd8: 000c2c83 lw x25,0(x24) +80000ddc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0d111c36 +80000de0: 000c2483 lw x9,0(x24) +80000de4: 004c0c13 addi x24,x24,4 + +80000de8 : +Zbkc_clmul_cg_cp_rd_b13: + clmul x13, x25, x9 # perform operation +80000de8: 0a9c96b3 clmul x13,x25,x9 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zbkc_clmul_cg_cp_rd_b13, Zbkc_clmul_cg_cp_rd_b13_str) +80000dec: 0007a203 lw x4,0(x15) +80000df0: 00d20863 beq x4,x13,80000e00 +80000df4: 70c042ef jal x5,80005500 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 80009f60 .word 0x80009f60 +80000e00: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x06f7fff8 +80000e04: 000c2e83 lw x29,0(x24) +80000e08: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x46d52d7e +80000e0c: 000c2c83 lw x25,0(x24) +80000e10: 004c0c13 addi x24,x24,4 + +80000e14 : +Zbkc_clmul_cg_cp_rd_b14: + clmul x14, x29, x25 # perform operation +80000e14: 0b9e9733 clmul x14,x29,x25 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkc_clmul_cg_cp_rd_b14, Zbkc_clmul_cg_cp_rd_b14_str) +80000e18: 0007a203 lw x4,0(x15) +80000e1c: 00e20863 beq x4,x14,80000e2c +80000e20: 6e0042ef jal x5,80005500 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 80009f93 .word 0x80009f93 +80000e2c: 00478793 addi x15,x15,4 + + mv x25, x15 # switch signature pointer register to avoid conflict with test +80000e30: 00078c93 addi x25,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x696a03ba +80000e34: 000c2e83 lw x29,0(x24) +80000e38: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x26ab129a +80000e3c: 000c2103 lw x2,0(x24) +80000e40: 004c0c13 addi x24,x24,4 + +80000e44 : +Zbkc_clmul_cg_cp_rd_b15: + clmul x15, x29, x2 # perform operation +80000e44: 0a2e97b3 clmul x15,x29,x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkc_clmul_cg_cp_rd_b15, Zbkc_clmul_cg_cp_rd_b15_str) +80000e48: 000ca203 lw x4,0(x25) +80000e4c: 00f20863 beq x4,x15,80000e5c +80000e50: 6b0042ef jal x5,80005500 +80000e54: 80000e44 .word 0x80000e44 +80000e58: 80009fc6 .word 0x80009fc6 +80000e5c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x2092f472 +80000e60: 000c2e03 lw x28,0(x24) +80000e64: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xebb250d6 +80000e68: 000c2783 lw x15,0(x24) +80000e6c: 004c0c13 addi x24,x24,4 + +80000e70 : +Zbkc_clmul_cg_cp_rd_b16: + clmul x16, x28, x15 # perform operation +80000e70: 0afe1833 clmul x16,x28,x15 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkc_clmul_cg_cp_rd_b16, Zbkc_clmul_cg_cp_rd_b16_str) +80000e74: 000ca203 lw x4,0(x25) +80000e78: 01020863 beq x4,x16,80000e88 +80000e7c: 684042ef jal x5,80005500 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 80009ff9 .word 0x80009ff9 +80000e88: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x2f8d0aef +80000e8c: 000c2703 lw x14,0(x24) +80000e90: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x9fd4f141 +80000e94: 000c2d83 lw x27,0(x24) +80000e98: 004c0c13 addi x24,x24,4 + +80000e9c : +Zbkc_clmul_cg_cp_rd_b17: + clmul x17, x14, x27 # perform operation +80000e9c: 0bb718b3 clmul x17,x14,x27 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkc_clmul_cg_cp_rd_b17, Zbkc_clmul_cg_cp_rd_b17_str) +80000ea0: 000ca203 lw x4,0(x25) +80000ea4: 01120863 beq x4,x17,80000eb4 +80000ea8: 658042ef jal x5,80005500 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 8000a02c .word 0x8000a02c +80000eb4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x4b3bf370 +80000eb8: 000c2b03 lw x22,0(x24) +80000ebc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x60ebf058 +80000ec0: 000c2a83 lw x21,0(x24) +80000ec4: 004c0c13 addi x24,x24,4 + +80000ec8 : +Zbkc_clmul_cg_cp_rd_b18: + clmul x18, x22, x21 # perform operation +80000ec8: 0b5b1933 clmul x18,x22,x21 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkc_clmul_cg_cp_rd_b18, Zbkc_clmul_cg_cp_rd_b18_str) +80000ecc: 000ca203 lw x4,0(x25) +80000ed0: 01220863 beq x4,x18,80000ee0 +80000ed4: 62c042ef jal x5,80005500 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000a05f .word 0x8000a05f +80000ee0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x61f932fe +80000ee4: 000c2e03 lw x28,0(x24) +80000ee8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x2b63f445 +80000eec: 000c2403 lw x8,0(x24) +80000ef0: 004c0c13 addi x24,x24,4 + +80000ef4 : +Zbkc_clmul_cg_cp_rd_b19: + clmul x19, x28, x8 # perform operation +80000ef4: 0a8e19b3 clmul x19,x28,x8 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkc_clmul_cg_cp_rd_b19, Zbkc_clmul_cg_cp_rd_b19_str) +80000ef8: 000ca203 lw x4,0(x25) +80000efc: 01320863 beq x4,x19,80000f0c +80000f00: 600042ef jal x5,80005500 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000a092 .word 0x8000a092 +80000f0c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0xc46d1641 +80000f10: 000c2d03 lw x26,0(x24) +80000f14: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x2e1d1537 +80000f18: 000c2b83 lw x23,0(x24) +80000f1c: 004c0c13 addi x24,x24,4 + +80000f20 : +Zbkc_clmul_cg_cp_rd_b20: + clmul x20, x26, x23 # perform operation +80000f20: 0b7d1a33 clmul x20,x26,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkc_clmul_cg_cp_rd_b20, Zbkc_clmul_cg_cp_rd_b20_str) +80000f24: 000ca203 lw x4,0(x25) +80000f28: 01420863 beq x4,x20,80000f38 +80000f2c: 5d4042ef jal x5,80005500 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000a0c5 .word 0x8000a0c5 +80000f38: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xa649f102 +80000f3c: 000c2a03 lw x20,0(x24) +80000f40: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x80e9b736 +80000f44: 000c2503 lw x10,0(x24) +80000f48: 004c0c13 addi x24,x24,4 + +80000f4c : +Zbkc_clmul_cg_cp_rd_b21: + clmul x21, x20, x10 # perform operation +80000f4c: 0aaa1ab3 clmul x21,x20,x10 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkc_clmul_cg_cp_rd_b21, Zbkc_clmul_cg_cp_rd_b21_str) +80000f50: 000ca203 lw x4,0(x25) +80000f54: 01520863 beq x4,x21,80000f64 +80000f58: 5a8042ef jal x5,80005500 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 8000a0f8 .word 0x8000a0f8 +80000f64: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xee1e7a0b +80000f68: 000c2703 lw x14,0(x24) +80000f6c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x19194d0a +80000f70: 000c2003 lw x0,0(x24) +80000f74: 004c0c13 addi x24,x24,4 + +80000f78 : +Zbkc_clmul_cg_cp_rd_b22: + clmul x22, x14, x0 # perform operation +80000f78: 0a071b33 clmul x22,x14,x0 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkc_clmul_cg_cp_rd_b22, Zbkc_clmul_cg_cp_rd_b22_str) +80000f7c: 000ca203 lw x4,0(x25) +80000f80: 01620863 beq x4,x22,80000f90 +80000f84: 57c042ef jal x5,80005500 +80000f88: 80000f78 .word 0x80000f78 +80000f8c: 8000a12b .word 0x8000a12b +80000f90: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xae1f32e1 +80000f94: 000c2303 lw x6,0(x24) +80000f98: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0xa9b1f150 +80000f9c: 000c2383 lw x7,0(x24) +80000fa0: 004c0c13 addi x24,x24,4 + +80000fa4 : +Zbkc_clmul_cg_cp_rd_b23: + clmul x23, x6, x7 # perform operation +80000fa4: 0a731bb3 clmul x23,x6,x7 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkc_clmul_cg_cp_rd_b23, Zbkc_clmul_cg_cp_rd_b23_str) +80000fa8: 000ca203 lw x4,0(x25) +80000fac: 01720863 beq x4,x23,80000fbc +80000fb0: 550042ef jal x5,80005500 +80000fb4: 80000fa4 .word 0x80000fa4 +80000fb8: 8000a15e .word 0x8000a15e +80000fbc: 004c8c93 addi x25,x25,4 + + mv x10, x24 # switch data pointer register to avoid conflict with test +80000fc0: 000c0513 addi x10,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x072eaae8 +80000fc4: 00052e83 lw x29,0(x10) +80000fc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x61d3a222 +80000fcc: 00052103 lw x2,0(x10) +80000fd0: 00450513 addi x10,x10,4 + +80000fd4 : +Zbkc_clmul_cg_cp_rd_b24: + clmul x24, x29, x2 # perform operation +80000fd4: 0a2e9c33 clmul x24,x29,x2 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkc_clmul_cg_cp_rd_b24, Zbkc_clmul_cg_cp_rd_b24_str) +80000fd8: 000ca203 lw x4,0(x25) +80000fdc: 01820863 beq x4,x24,80000fec +80000fe0: 520042ef jal x5,80005500 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000a191 .word 0x8000a191 +80000fec: 004c8c93 addi x25,x25,4 + + mv x3, x25 # switch signature pointer register to avoid conflict with test +80000ff0: 000c8193 addi x3,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x3208d66a +80000ff4: 00052703 lw x14,0(x10) +80000ff8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x797e8b00 +80000ffc: 00052f03 lw x30,0(x10) +80001000: 00450513 addi x10,x10,4 + +80001004 : +Zbkc_clmul_cg_cp_rd_b25: + clmul x25, x14, x30 # perform operation +80001004: 0be71cb3 clmul x25,x14,x30 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cp_rd_b25, Zbkc_clmul_cg_cp_rd_b25_str) +80001008: 0001a203 lw x4,0(x3) +8000100c: 01920863 beq x4,x25,8000101c +80001010: 4f0042ef jal x5,80005500 +80001014: 80001004 .word 0x80001004 +80001018: 8000a1c4 .word 0x8000a1c4 +8000101c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x9bbd5590 +80001020: 00052303 lw x6,0(x10) +80001024: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xe1953542 +80001028: 00052383 lw x7,0(x10) +8000102c: 00450513 addi x10,x10,4 + +80001030 : +Zbkc_clmul_cg_cp_rd_b26: + clmul x26, x6, x7 # perform operation +80001030: 0a731d33 clmul x26,x6,x7 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cp_rd_b26, Zbkc_clmul_cg_cp_rd_b26_str) +80001034: 0001a203 lw x4,0(x3) +80001038: 01a20863 beq x4,x26,80001048 +8000103c: 4c4042ef jal x5,80005500 +80001040: 80001030 .word 0x80001030 +80001044: 8000a1f7 .word 0x8000a1f7 +80001048: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xc6804917 +8000104c: 00052603 lw x12,0(x10) +80001050: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5d3b7b7d +80001054: 00052803 lw x16,0(x10) +80001058: 00450513 addi x10,x10,4 + +8000105c : +Zbkc_clmul_cg_cp_rd_b27: + clmul x27, x12, x16 # perform operation +8000105c: 0b061db3 clmul x27,x12,x16 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cp_rd_b27, Zbkc_clmul_cg_cp_rd_b27_str) +80001060: 0001a203 lw x4,0(x3) +80001064: 01b20863 beq x4,x27,80001074 +80001068: 498042ef jal x5,80005500 +8000106c: 8000105c .word 0x8000105c +80001070: 8000a22a .word 0x8000a22a +80001074: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x22cf0335 +80001078: 00052d83 lw x27,0(x10) +8000107c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xd6c0923d +80001080: 00052103 lw x2,0(x10) +80001084: 00450513 addi x10,x10,4 + +80001088 : +Zbkc_clmul_cg_cp_rd_b28: + clmul x28, x27, x2 # perform operation +80001088: 0a2d9e33 clmul x28,x27,x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkc_clmul_cg_cp_rd_b28, Zbkc_clmul_cg_cp_rd_b28_str) +8000108c: 0001a203 lw x4,0(x3) +80001090: 01c20863 beq x4,x28,800010a0 +80001094: 46c042ef jal x5,80005500 +80001098: 80001088 .word 0x80001088 +8000109c: 8000a25d .word 0x8000a25d +800010a0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7f04aff8 +800010a4: 00052703 lw x14,0(x10) +800010a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x53a6ade7 +800010ac: 00052d83 lw x27,0(x10) +800010b0: 00450513 addi x10,x10,4 + +800010b4 : +Zbkc_clmul_cg_cp_rd_b29: + clmul x29, x14, x27 # perform operation +800010b4: 0bb71eb3 clmul x29,x14,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cp_rd_b29, Zbkc_clmul_cg_cp_rd_b29_str) +800010b8: 0001a203 lw x4,0(x3) +800010bc: 01d20863 beq x4,x29,800010cc +800010c0: 440042ef jal x5,80005500 +800010c4: 800010b4 .word 0x800010b4 +800010c8: 8000a290 .word 0x8000a290 +800010cc: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xc8f5d2ec +800010d0: 00052a03 lw x20,0(x10) +800010d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xab2d0fcf +800010d8: 00052303 lw x6,0(x10) +800010dc: 00450513 addi x10,x10,4 + +800010e0 : +Zbkc_clmul_cg_cp_rd_b30: + clmul x30, x20, x6 # perform operation +800010e0: 0a6a1f33 clmul x30,x20,x6 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cp_rd_b30, Zbkc_clmul_cg_cp_rd_b30_str) +800010e4: 0001a203 lw x4,0(x3) +800010e8: 01e20863 beq x4,x30,800010f8 +800010ec: 414042ef jal x5,80005500 +800010f0: 800010e0 .word 0x800010e0 +800010f4: 8000a2c3 .word 0x8000a2c3 +800010f8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfc325d2e +800010fc: 00052b03 lw x22,0(x10) +80001100: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5427fdb8 +80001104: 00052403 lw x8,0(x10) +80001108: 00450513 addi x10,x10,4 + +8000110c : +Zbkc_clmul_cg_cp_rd_b31: + clmul x31, x22, x8 # perform operation +8000110c: 0a8b1fb3 clmul x31,x22,x8 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cp_rd_b31, Zbkc_clmul_cg_cp_rd_b31_str) +80001110: 0001a203 lw x4,0(x3) +80001114: 01f20863 beq x4,x31,80001124 +80001118: 3e8042ef jal x5,80005500 +8000111c: 8000110c .word 0x8000110c +80001120: 8000a2f6 .word 0x8000a2f6 +80001124: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000 +80001128: 00052f83 lw x31,0(x10) +8000112c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x048552a8 +80001130: 00052803 lw x16,0(x10) +80001134: 00450513 addi x10,x10,4 + +80001138 : +Zbkc_clmul_cg_cp_rs1_edges_0x0: + clmul x17, x31, x16 # perform operation +80001138: 0b0f98b3 clmul x17,x31,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cp_rs1_edges_0x0, Zbkc_clmul_cg_cp_rs1_edges_0x0_str) +8000113c: 0001a203 lw x4,0(x3) +80001140: 01120863 beq x4,x17,80001150 +80001144: 3bc042ef jal x5,80005500 +80001148: 80001138 .word 0x80001138 +8000114c: 8000a329 .word 0x8000a329 +80001150: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000001 +80001154: 00052c83 lw x25,0(x10) +80001158: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x044316ba +8000115c: 00052b03 lw x22,0(x10) +80001160: 00450513 addi x10,x10,4 + +80001164 : +Zbkc_clmul_cg_cp_rs1_edges_0x1: + clmul x18, x25, x22 # perform operation +80001164: 0b6c9933 clmul x18,x25,x22 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cp_rs1_edges_0x1, Zbkc_clmul_cg_cp_rs1_edges_0x1_str) +80001168: 0001a203 lw x4,0(x3) +8000116c: 01220863 beq x4,x18,8000117c +80001170: 390042ef jal x5,80005500 +80001174: 80001164 .word 0x80001164 +80001178: 8000a363 .word 0x8000a363 +8000117c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x00000002 +80001180: 00052403 lw x8,0(x10) +80001184: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x90fbe464 +80001188: 00052583 lw x11,0(x10) +8000118c: 00450513 addi x10,x10,4 + +80001190 : +Zbkc_clmul_cg_cp_rs1_edges_0x2: + clmul x15, x8, x11 # perform operation +80001190: 0ab417b3 clmul x15,x8,x11 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cp_rs1_edges_0x2, Zbkc_clmul_cg_cp_rs1_edges_0x2_str) +80001194: 0001a203 lw x4,0(x3) +80001198: 00f20863 beq x4,x15,800011a8 +8000119c: 364042ef jal x5,80005500 +800011a0: 80001190 .word 0x80001190 +800011a4: 8000a39d .word 0x8000a39d +800011a8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x80000000 +800011ac: 00052583 lw x11,0(x10) +800011b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x2b025d75 +800011b4: 00052d03 lw x26,0(x10) +800011b8: 00450513 addi x10,x10,4 + +800011bc : +Zbkc_clmul_cg_cp_rs1_edges_0x80000000: + clmul x31, x11, x26 # perform operation +800011bc: 0ba59fb3 clmul x31,x11,x26 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cp_rs1_edges_0x80000000, Zbkc_clmul_cg_cp_rs1_edges_0x80000000_str) +800011c0: 0001a203 lw x4,0(x3) +800011c4: 01f20863 beq x4,x31,800011d4 +800011c8: 338042ef jal x5,80005500 +800011cc: 800011bc .word 0x800011bc +800011d0: 8000a3d7 .word 0x8000a3d7 +800011d4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x80000001 +800011d8: 00052383 lw x7,0(x10) +800011dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xdd3cbbfc +800011e0: 00052483 lw x9,0(x10) +800011e4: 00450513 addi x10,x10,4 + +800011e8 : +Zbkc_clmul_cg_cp_rs1_edges_0x80000001: + clmul x26, x7, x9 # perform operation +800011e8: 0a939d33 clmul x26,x7,x9 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_edges_0x80000001, Zbkc_clmul_cg_cp_rs1_edges_0x80000001_str) +800011ec: 0001a203 lw x4,0(x3) +800011f0: 01a20863 beq x4,x26,80001200 +800011f4: 30c042ef jal x5,80005500 +800011f8: 800011e8 .word 0x800011e8 +800011fc: 8000a419 .word 0x8000a419 +80001200: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7fffffff +80001204: 00052583 lw x11,0(x10) +80001208: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xded8b1d2 +8000120c: 00052d03 lw x26,0(x10) +80001210: 00450513 addi x10,x10,4 + +80001214 : +Zbkc_clmul_cg_cp_rs1_edges_0x7fffffff: + clmul x14, x11, x26 # perform operation +80001214: 0ba59733 clmul x14,x11,x26 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cp_rs1_edges_0x7fffffff, Zbkc_clmul_cg_cp_rs1_edges_0x7fffffff_str) +80001218: 0001a203 lw x4,0(x3) +8000121c: 00e20863 beq x4,x14,8000122c +80001220: 2e0042ef jal x5,80005500 +80001224: 80001214 .word 0x80001214 +80001228: 8000a45b .word 0x8000a45b +8000122c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7ffffffe +80001230: 00052d83 lw x27,0(x10) +80001234: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xc5c15a55 +80001238: 00052583 lw x11,0(x10) +8000123c: 00450513 addi x10,x10,4 + +80001240 : +Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffe: + clmul x9, x27, x11 # perform operation +80001240: 0abd94b3 clmul x9,x27,x11 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffe, Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffe_str) +80001244: 0001a203 lw x4,0(x3) +80001248: 00920863 beq x4,x9,80001258 +8000124c: 2b4042ef jal x5,80005500 +80001250: 80001240 .word 0x80001240 +80001254: 8000a49d .word 0x8000a49d +80001258: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xffffffff +8000125c: 00052e03 lw x28,0(x10) +80001260: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x52b924f7 +80001264: 00052a83 lw x21,0(x10) +80001268: 00450513 addi x10,x10,4 + +8000126c : +Zbkc_clmul_cg_cp_rs1_edges_0xffffffff: + clmul x26, x28, x21 # perform operation +8000126c: 0b5e1d33 clmul x26,x28,x21 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_edges_0xffffffff, Zbkc_clmul_cg_cp_rs1_edges_0xffffffff_str) +80001270: 0001a203 lw x4,0(x3) +80001274: 01a20863 beq x4,x26,80001284 +80001278: 288042ef jal x5,80005500 +8000127c: 8000126c .word 0x8000126c +80001280: 8000a4df .word 0x8000a4df +80001284: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfffffffe +80001288: 00052a83 lw x21,0(x10) +8000128c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xba35aa48 +80001290: 00052a03 lw x20,0(x10) +80001294: 00450513 addi x10,x10,4 + +80001298 : +Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe: + clmul x24, x21, x20 # perform operation +80001298: 0b4a9c33 clmul x24,x21,x20 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe_str) +8000129c: 0001a203 lw x4,0(x3) +800012a0: 01820863 beq x4,x24,800012b0 +800012a4: 25c042ef jal x5,80005500 +800012a8: 80001298 .word 0x80001298 +800012ac: 8000a521 .word 0x8000a521 +800012b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5bbc8872 +800012b4: 00052b03 lw x22,0(x10) +800012b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x331530bb +800012bc: 00052f83 lw x31,0(x10) +800012c0: 00450513 addi x10,x10,4 + +800012c4 : +Zbkc_clmul_cg_cp_rs1_edges_0x5bbc8872: + clmul x16, x22, x31 # perform operation +800012c4: 0bfb1833 clmul x16,x22,x31 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmul_cg_cp_rs1_edges_0x5bbc8872, Zbkc_clmul_cg_cp_rs1_edges_0x5bbc8872_str) +800012c8: 0001a203 lw x4,0(x3) +800012cc: 01020863 beq x4,x16,800012dc +800012d0: 230042ef jal x5,80005500 +800012d4: 800012c4 .word 0x800012c4 +800012d8: 8000a563 .word 0x8000a563 +800012dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xaaaaaaaa +800012e0: 00052403 lw x8,0(x10) +800012e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x9962d34a +800012e8: 00052483 lw x9,0(x10) +800012ec: 00450513 addi x10,x10,4 + +800012f0 : +Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaa: + clmul x12, x8, x9 # perform operation +800012f0: 0a941633 clmul x12,x8,x9 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaa, Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f4: 0001a203 lw x4,0(x3) +800012f8: 00c20863 beq x4,x12,80001308 +800012fc: 204042ef jal x5,80005500 +80001300: 800012f0 .word 0x800012f0 +80001304: 8000a5a5 .word 0x8000a5a5 +80001308: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x55555555 +8000130c: 00052d83 lw x27,0(x10) +80001310: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xa577a2e9 +80001314: 00052883 lw x17,0(x10) +80001318: 00450513 addi x10,x10,4 + +8000131c : +Zbkc_clmul_cg_cp_rs1_edges_0x55555555: + clmul x20, x27, x17 # perform operation +8000131c: 0b1d9a33 clmul x20,x27,x17 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cp_rs1_edges_0x55555555, Zbkc_clmul_cg_cp_rs1_edges_0x55555555_str) +80001320: 0001a203 lw x4,0(x3) +80001324: 01420863 beq x4,x20,80001334 +80001328: 1d8042ef jal x5,80005500 +8000132c: 8000131c .word 0x8000131c +80001330: 8000a5e7 .word 0x8000a5e7 +80001334: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfe7840b0 +80001338: 00052103 lw x2,0(x10) +8000133c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000000 +80001340: 00052083 lw x1,0(x10) +80001344: 00450513 addi x10,x10,4 + +80001348 : +Zbkc_clmul_cg_cp_rs2_edges_0x0: + clmul x20, x2, x1 # perform operation +80001348: 0a111a33 clmul x20,x2,x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_edges_0x0, Zbkc_clmul_cg_cp_rs2_edges_0x0_str) +8000134c: 0001a203 lw x4,0(x3) +80001350: 01420863 beq x4,x20,80001360 +80001354: 1ac042ef jal x5,80005500 +80001358: 80001348 .word 0x80001348 +8000135c: 8000a629 .word 0x8000a629 +80001360: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x1df7132c +80001364: 00052a03 lw x20,0(x10) +80001368: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000001 +8000136c: 00052a83 lw x21,0(x10) +80001370: 00450513 addi x10,x10,4 + +80001374 : +Zbkc_clmul_cg_cp_rs2_edges_0x1: + clmul x16, x20, x21 # perform operation +80001374: 0b5a1833 clmul x16,x20,x21 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmul_cg_cp_rs2_edges_0x1, Zbkc_clmul_cg_cp_rs2_edges_0x1_str) +80001378: 0001a203 lw x4,0(x3) +8000137c: 01020863 beq x4,x16,8000138c +80001380: 180042ef jal x5,80005500 +80001384: 80001374 .word 0x80001374 +80001388: 8000a664 .word 0x8000a664 +8000138c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x76878e63 +80001390: 00052783 lw x15,0(x10) +80001394: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000002 +80001398: 00052803 lw x16,0(x10) +8000139c: 00450513 addi x10,x10,4 + +800013a0 : +Zbkc_clmul_cg_cp_rs2_edges_0x2: + clmul x7, x15, x16 # perform operation +800013a0: 0b0793b3 clmul x7,x15,x16 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cp_rs2_edges_0x2, Zbkc_clmul_cg_cp_rs2_edges_0x2_str) +800013a4: 0001a203 lw x4,0(x3) +800013a8: 00720863 beq x4,x7,800013b8 +800013ac: 154042ef jal x5,80005500 +800013b0: 800013a0 .word 0x800013a0 +800013b4: 8000a69f .word 0x8000a69f +800013b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x1453f37c +800013bc: 00052c83 lw x25,0(x10) +800013c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x80000000 +800013c4: 00052d03 lw x26,0(x10) +800013c8: 00450513 addi x10,x10,4 + +800013cc : +Zbkc_clmul_cg_cp_rs2_edges_0x80000000: + clmul x31, x25, x26 # perform operation +800013cc: 0bac9fb3 clmul x31,x25,x26 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cp_rs2_edges_0x80000000, Zbkc_clmul_cg_cp_rs2_edges_0x80000000_str) +800013d0: 0001a203 lw x4,0(x3) +800013d4: 01f20863 beq x4,x31,800013e4 +800013d8: 128042ef jal x5,80005500 +800013dc: 800013cc .word 0x800013cc +800013e0: 8000a6da .word 0x8000a6da +800013e4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x55ad5bd3 +800013e8: 00052803 lw x16,0(x10) +800013ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x80000001 +800013f0: 00052983 lw x19,0(x10) +800013f4: 00450513 addi x10,x10,4 + +800013f8 : +Zbkc_clmul_cg_cp_rs2_edges_0x80000001: + clmul x14, x16, x19 # perform operation +800013f8: 0b381733 clmul x14,x16,x19 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cp_rs2_edges_0x80000001, Zbkc_clmul_cg_cp_rs2_edges_0x80000001_str) +800013fc: 0001a203 lw x4,0(x3) +80001400: 00e20863 beq x4,x14,80001410 +80001404: 0fc042ef jal x5,80005500 +80001408: 800013f8 .word 0x800013f8 +8000140c: 8000a71c .word 0x8000a71c +80001410: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xe38077e9 +80001414: 00052b83 lw x23,0(x10) +80001418: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7fffffff +8000141c: 00052383 lw x7,0(x10) +80001420: 00450513 addi x10,x10,4 + +80001424 : +Zbkc_clmul_cg_cp_rs2_edges_0x7fffffff: + clmul x21, x23, x7 # perform operation +80001424: 0a7b9ab3 clmul x21,x23,x7 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cp_rs2_edges_0x7fffffff, Zbkc_clmul_cg_cp_rs2_edges_0x7fffffff_str) +80001428: 0001a203 lw x4,0(x3) +8000142c: 01520863 beq x4,x21,8000143c +80001430: 0d0042ef jal x5,80005500 +80001434: 80001424 .word 0x80001424 +80001438: 8000a75e .word 0x8000a75e +8000143c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x3fd0f8e6 +80001440: 00052b83 lw x23,0(x10) +80001444: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7ffffffe +80001448: 00052783 lw x15,0(x10) +8000144c: 00450513 addi x10,x10,4 + +80001450 : +Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffe: + clmul x28, x23, x15 # perform operation +80001450: 0afb9e33 clmul x28,x23,x15 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffe, Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffe_str) +80001454: 0001a203 lw x4,0(x3) +80001458: 01c20863 beq x4,x28,80001468 +8000145c: 0a4042ef jal x5,80005500 +80001460: 80001450 .word 0x80001450 +80001464: 8000a7a0 .word 0x8000a7a0 +80001468: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x144be3c7 +8000146c: 00052e03 lw x28,0(x10) +80001470: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xffffffff +80001474: 00052c83 lw x25,0(x10) +80001478: 00450513 addi x10,x10,4 + +8000147c : +Zbkc_clmul_cg_cp_rs2_edges_0xffffffff: + clmul x12, x28, x25 # perform operation +8000147c: 0b9e1633 clmul x12,x28,x25 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cp_rs2_edges_0xffffffff, Zbkc_clmul_cg_cp_rs2_edges_0xffffffff_str) +80001480: 0001a203 lw x4,0(x3) +80001484: 00c20863 beq x4,x12,80001494 +80001488: 078042ef jal x5,80005500 +8000148c: 8000147c .word 0x8000147c +80001490: 8000a7e2 .word 0x8000a7e2 +80001494: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x672da2f2 +80001498: 00052483 lw x9,0(x10) +8000149c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xfffffffe +800014a0: 00052e03 lw x28,0(x10) +800014a4: 00450513 addi x10,x10,4 + +800014a8 : +Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe: + clmul x8, x9, x28 # perform operation +800014a8: 0bc49433 clmul x8,x9,x28 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe_str) +800014ac: 0001a203 lw x4,0(x3) +800014b0: 00820863 beq x4,x8,800014c0 +800014b4: 04c042ef jal x5,80005500 +800014b8: 800014a8 .word 0x800014a8 +800014bc: 8000a824 .word 0x8000a824 +800014c0: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xd445b47d +800014c4: 00052e03 lw x28,0(x10) +800014c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x5bbc8872 +800014cc: 00052383 lw x7,0(x10) +800014d0: 00450513 addi x10,x10,4 + +800014d4 : +Zbkc_clmul_cg_cp_rs2_edges_0x5bbc8872: + clmul x15, x28, x7 # perform operation +800014d4: 0a7e17b3 clmul x15,x28,x7 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cp_rs2_edges_0x5bbc8872, Zbkc_clmul_cg_cp_rs2_edges_0x5bbc8872_str) +800014d8: 0001a203 lw x4,0(x3) +800014dc: 00f20863 beq x4,x15,800014ec +800014e0: 020042ef jal x5,80005500 +800014e4: 800014d4 .word 0x800014d4 +800014e8: 8000a866 .word 0x8000a866 +800014ec: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x17c52a0f +800014f0: 00052d83 lw x27,0(x10) +800014f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaa +800014f8: 00052a83 lw x21,0(x10) +800014fc: 00450513 addi x10,x10,4 + +80001500 : +Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaa: + clmul x15, x27, x21 # perform operation +80001500: 0b5d97b3 clmul x15,x27,x21 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaa, Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001504: 0001a203 lw x4,0(x3) +80001508: 00f20863 beq x4,x15,80001518 +8000150c: 7f5032ef jal x5,80005500 +80001510: 80001500 .word 0x80001500 +80001514: 8000a8a8 .word 0x8000a8a8 +80001518: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x9d0142f3 +8000151c: 00052c03 lw x24,0(x10) +80001520: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x55555555 +80001524: 00052103 lw x2,0(x10) +80001528: 00450513 addi x10,x10,4 + +8000152c : +Zbkc_clmul_cg_cp_rs2_edges_0x55555555: + clmul x18, x24, x2 # perform operation +8000152c: 0a2c1933 clmul x18,x24,x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cp_rs2_edges_0x55555555, Zbkc_clmul_cg_cp_rs2_edges_0x55555555_str) +80001530: 0001a203 lw x4,0(x3) +80001534: 01220863 beq x4,x18,80001544 +80001538: 7c9032ef jal x5,80005500 +8000153c: 8000152c .word 0x8000152c +80001540: 8000a8ea .word 0x8000a8ea +80001544: 00418193 addi x3,x3,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000 +80001548: 00052f03 lw x30,0(x10) +8000154c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000 +80001550: 00052703 lw x14,0(x10) +80001554: 00450513 addi x10,x10,4 + +80001558 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + clmul x19, x30, x14 # perform operation +80001558: 0aef19b3 clmul x19,x30,x14 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000155c: 0001a203 lw x4,0(x3) +80001560: 01320863 beq x4,x19,80001570 +80001564: 79d032ef jal x5,80005500 +80001568: 80001558 .word 0x80001558 +8000156c: 8000a92c .word 0x8000a92c +80001570: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000 +80001574: 00052a83 lw x21,0(x10) +80001578: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000001 +8000157c: 00052103 lw x2,0(x10) +80001580: 00450513 addi x10,x10,4 + +80001584 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + clmul x19, x21, x2 # perform operation +80001584: 0a2a99b3 clmul x19,x21,x2 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001588: 0001a203 lw x4,0(x3) +8000158c: 01320863 beq x4,x19,8000159c +80001590: 771032ef jal x5,80005500 +80001594: 80001584 .word 0x80001584 +80001598: 8000a97e .word 0x8000a97e +8000159c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000 +800015a0: 00052483 lw x9,0(x10) +800015a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000002 +800015a8: 00052e03 lw x28,0(x10) +800015ac: 00450513 addi x10,x10,4 + +800015b0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + clmul x23, x9, x28 # perform operation +800015b0: 0bc49bb3 clmul x23,x9,x28 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b4: 0001a203 lw x4,0(x3) +800015b8: 01720863 beq x4,x23,800015c8 +800015bc: 745032ef jal x5,80005500 +800015c0: 800015b0 .word 0x800015b0 +800015c4: 8000a9d0 .word 0x8000a9d0 +800015c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000 +800015cc: 00052f03 lw x30,0(x10) +800015d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x80000000 +800015d4: 00052b03 lw x22,0(x10) +800015d8: 00450513 addi x10,x10,4 + +800015dc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + clmul x27, x30, x22 # perform operation +800015dc: 0b6f1db3 clmul x27,x30,x22 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e0: 0001a203 lw x4,0(x3) +800015e4: 01b20863 beq x4,x27,800015f4 +800015e8: 719032ef jal x5,80005500 +800015ec: 800015dc .word 0x800015dc +800015f0: 8000aa22 .word 0x8000aa22 +800015f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000 +800015f8: 00052c03 lw x24,0(x10) +800015fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x80000001 +80001600: 00052403 lw x8,0(x10) +80001604: 00450513 addi x10,x10,4 + +80001608 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + clmul x31, x24, x8 # perform operation +80001608: 0a8c1fb3 clmul x31,x24,x8 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000160c: 0001a203 lw x4,0(x3) +80001610: 01f20863 beq x4,x31,80001620 +80001614: 6ed032ef jal x5,80005500 +80001618: 80001608 .word 0x80001608 +8000161c: 8000aa7b .word 0x8000aa7b +80001620: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000 +80001624: 00052603 lw x12,0(x10) +80001628: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7fffffff +8000162c: 00052083 lw x1,0(x10) +80001630: 00450513 addi x10,x10,4 + +80001634 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + clmul x15, x12, x1 # perform operation +80001634: 0a1617b3 clmul x15,x12,x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001638: 0001a203 lw x4,0(x3) +8000163c: 00f20863 beq x4,x15,8000164c +80001640: 6c1032ef jal x5,80005500 +80001644: 80001634 .word 0x80001634 +80001648: 8000aad4 .word 0x8000aad4 +8000164c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000000 +80001650: 00052583 lw x11,0(x10) +80001654: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffe +80001658: 00052c03 lw x24,0(x10) +8000165c: 00450513 addi x10,x10,4 + +80001660 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + clmul x1, x11, x24 # perform operation +80001660: 0b8590b3 clmul x1,x11,x24 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001664: 0001a203 lw x4,0(x3) +80001668: 00120863 beq x4,x1,80001678 +8000166c: 695032ef jal x5,80005500 +80001670: 80001660 .word 0x80001660 +80001674: 8000ab2d .word 0x8000ab2d +80001678: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000000 +8000167c: 00052103 lw x2,0(x10) +80001680: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffff +80001684: 00052b83 lw x23,0(x10) +80001688: 00450513 addi x10,x10,4 + +8000168c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + clmul x13, x2, x23 # perform operation +8000168c: 0b7116b3 clmul x13,x2,x23 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001690: 0001a203 lw x4,0(x3) +80001694: 00d20863 beq x4,x13,800016a4 +80001698: 669032ef jal x5,80005500 +8000169c: 8000168c .word 0x8000168c +800016a0: 8000ab86 .word 0x8000ab86 +800016a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000000 +800016a8: 00052c83 lw x25,0(x10) +800016ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xfffffffe +800016b0: 00052383 lw x7,0(x10) +800016b4: 00450513 addi x10,x10,4 + +800016b8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + clmul x20, x25, x7 # perform operation +800016b8: 0a7c9a33 clmul x20,x25,x7 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016bc: 0001a203 lw x4,0(x3) +800016c0: 01420863 beq x4,x20,800016d0 +800016c4: 63d032ef jal x5,80005500 +800016c8: 800016b8 .word 0x800016b8 +800016cc: 8000abdf .word 0x8000abdf +800016d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000 +800016d4: 00052e83 lw x29,0(x10) +800016d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc8872 +800016dc: 00052e03 lw x28,0(x10) +800016e0: 00450513 addi x10,x10,4 + +800016e4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + clmul x7, x29, x28 # perform operation +800016e4: 0bce93b3 clmul x7,x29,x28 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e8: 0001a203 lw x4,0(x3) +800016ec: 00720863 beq x4,x7,800016fc +800016f0: 611032ef jal x5,80005500 +800016f4: 800016e4 .word 0x800016e4 +800016f8: 8000ac38 .word 0x8000ac38 +800016fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000 +80001700: 00052e83 lw x29,0(x10) +80001704: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaa +80001708: 00052a83 lw x21,0(x10) +8000170c: 00450513 addi x10,x10,4 + +80001710 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + clmul x26, x29, x21 # perform operation +80001710: 0b5e9d33 clmul x26,x29,x21 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001714: 0001a203 lw x4,0(x3) +80001718: 01a20863 beq x4,x26,80001728 +8000171c: 5e5032ef jal x5,80005500 +80001720: 80001710 .word 0x80001710 +80001724: 8000ac91 .word 0x8000ac91 +80001728: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000 +8000172c: 00052803 lw x16,0(x10) +80001730: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x55555555 +80001734: 00052a83 lw x21,0(x10) +80001738: 00450513 addi x10,x10,4 + +8000173c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + clmul x20, x16, x21 # perform operation +8000173c: 0b581a33 clmul x20,x16,x21 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001740: 0001a203 lw x4,0(x3) +80001744: 01420863 beq x4,x20,80001754 +80001748: 5b9032ef jal x5,80005500 +8000174c: 8000173c .word 0x8000173c +80001750: 8000acea .word 0x8000acea +80001754: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x00000001 +80001758: 00052e03 lw x28,0(x10) +8000175c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000 +80001760: 00052483 lw x9,0(x10) +80001764: 00450513 addi x10,x10,4 + +80001768 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + clmul x14, x28, x9 # perform operation +80001768: 0a9e1733 clmul x14,x28,x9 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000176c: 0001a203 lw x4,0(x3) +80001770: 00e20863 beq x4,x14,80001780 +80001774: 58d032ef jal x5,80005500 +80001778: 80001768 .word 0x80001768 +8000177c: 8000ad43 .word 0x8000ad43 +80001780: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000001 +80001784: 00052c83 lw x25,0(x10) +80001788: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x00000001 +8000178c: 00052f03 lw x30,0(x10) +80001790: 00450513 addi x10,x10,4 + +80001794 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + clmul x21, x25, x30 # perform operation +80001794: 0bec9ab3 clmul x21,x25,x30 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001798: 0001a203 lw x4,0(x3) +8000179c: 01520863 beq x4,x21,800017ac +800017a0: 561032ef jal x5,80005500 +800017a4: 80001794 .word 0x80001794 +800017a8: 8000ad95 .word 0x8000ad95 +800017ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000001 +800017b0: 00052f83 lw x31,0(x10) +800017b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000002 +800017b8: 00052c83 lw x25,0(x10) +800017bc: 00450513 addi x10,x10,4 + +800017c0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + clmul x21, x31, x25 # perform operation +800017c0: 0b9f9ab3 clmul x21,x31,x25 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c4: 0001a203 lw x4,0(x3) +800017c8: 01520863 beq x4,x21,800017d8 +800017cc: 535032ef jal x5,80005500 +800017d0: 800017c0 .word 0x800017c0 +800017d4: 8000ade7 .word 0x8000ade7 +800017d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000001 +800017dc: 00052583 lw x11,0(x10) +800017e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x80000000 +800017e4: 00052d03 lw x26,0(x10) +800017e8: 00450513 addi x10,x10,4 + +800017ec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + clmul x27, x11, x26 # perform operation +800017ec: 0ba59db3 clmul x27,x11,x26 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f0: 0001a203 lw x4,0(x3) +800017f4: 01b20863 beq x4,x27,80001804 +800017f8: 509032ef jal x5,80005500 +800017fc: 800017ec .word 0x800017ec +80001800: 8000ae39 .word 0x8000ae39 +80001804: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000001 +80001808: 00052383 lw x7,0(x10) +8000180c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x80000001 +80001810: 00052b83 lw x23,0(x10) +80001814: 00450513 addi x10,x10,4 + +80001818 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + clmul x27, x7, x23 # perform operation +80001818: 0b739db3 clmul x27,x7,x23 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000181c: 0001a203 lw x4,0(x3) +80001820: 01b20863 beq x4,x27,80001830 +80001824: 4dd032ef jal x5,80005500 +80001828: 80001818 .word 0x80001818 +8000182c: 8000ae92 .word 0x8000ae92 +80001830: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000001 +80001834: 00052e83 lw x29,0(x10) +80001838: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7fffffff +8000183c: 00052a83 lw x21,0(x10) +80001840: 00450513 addi x10,x10,4 + +80001844 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + clmul x13, x29, x21 # perform operation +80001844: 0b5e96b3 clmul x13,x29,x21 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001848: 0001a203 lw x4,0(x3) +8000184c: 00d20863 beq x4,x13,8000185c +80001850: 4b1032ef jal x5,80005500 +80001854: 80001844 .word 0x80001844 +80001858: 8000aeeb .word 0x8000aeeb +8000185c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000001 +80001860: 00052683 lw x13,0(x10) +80001864: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7ffffffe +80001868: 00052a03 lw x20,0(x10) +8000186c: 00450513 addi x10,x10,4 + +80001870 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + clmul x31, x13, x20 # perform operation +80001870: 0b469fb3 clmul x31,x13,x20 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001874: 0001a203 lw x4,0(x3) +80001878: 01f20863 beq x4,x31,80001888 +8000187c: 485032ef jal x5,80005500 +80001880: 80001870 .word 0x80001870 +80001884: 8000af44 .word 0x8000af44 +80001888: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000001 +8000188c: 00052483 lw x9,0(x10) +80001890: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffff +80001894: 00052b03 lw x22,0(x10) +80001898: 00450513 addi x10,x10,4 + +8000189c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + clmul x23, x9, x22 # perform operation +8000189c: 0b649bb3 clmul x23,x9,x22 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a0: 0001a203 lw x4,0(x3) +800018a4: 01720863 beq x4,x23,800018b4 +800018a8: 459032ef jal x5,80005500 +800018ac: 8000189c .word 0x8000189c +800018b0: 8000af9d .word 0x8000af9d +800018b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000001 +800018b8: 00052103 lw x2,0(x10) +800018bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xfffffffe +800018c0: 00052703 lw x14,0(x10) +800018c4: 00450513 addi x10,x10,4 + +800018c8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + clmul x21, x2, x14 # perform operation +800018c8: 0ae11ab3 clmul x21,x2,x14 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018cc: 0001a203 lw x4,0(x3) +800018d0: 01520863 beq x4,x21,800018e0 +800018d4: 42d032ef jal x5,80005500 +800018d8: 800018c8 .word 0x800018c8 +800018dc: 8000aff6 .word 0x8000aff6 +800018e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000001 +800018e4: 00052d83 lw x27,0(x10) +800018e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5bbc8872 +800018ec: 00052f83 lw x31,0(x10) +800018f0: 00450513 addi x10,x10,4 + +800018f4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + clmul x14, x27, x31 # perform operation +800018f4: 0bfd9733 clmul x14,x27,x31 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f8: 0001a203 lw x4,0(x3) +800018fc: 00e20863 beq x4,x14,8000190c +80001900: 401032ef jal x5,80005500 +80001904: 800018f4 .word 0x800018f4 +80001908: 8000b04f .word 0x8000b04f +8000190c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000001 +80001910: 00052f03 lw x30,0(x10) +80001914: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xaaaaaaaa +80001918: 00052e03 lw x28,0(x10) +8000191c: 00450513 addi x10,x10,4 + +80001920 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + clmul x1, x30, x28 # perform operation +80001920: 0bcf10b3 clmul x1,x30,x28 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001924: 0001a203 lw x4,0(x3) +80001928: 00120863 beq x4,x1,80001938 +8000192c: 3d5032ef jal x5,80005500 +80001930: 80001920 .word 0x80001920 +80001934: 8000b0a8 .word 0x8000b0a8 +80001938: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x00000001 +8000193c: 00052903 lw x18,0(x10) +80001940: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x55555555 +80001944: 00052403 lw x8,0(x10) +80001948: 00450513 addi x10,x10,4 + +8000194c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + clmul x7, x18, x8 # perform operation +8000194c: 0a8913b3 clmul x7,x18,x8 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001950: 0001a203 lw x4,0(x3) +80001954: 00720863 beq x4,x7,80001964 +80001958: 3a9032ef jal x5,80005500 +8000195c: 8000194c .word 0x8000194c +80001960: 8000b101 .word 0x8000b101 +80001964: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000002 +80001968: 00052e83 lw x29,0(x10) +8000196c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x00000000 +80001970: 00052d03 lw x26,0(x10) +80001974: 00450513 addi x10,x10,4 + +80001978 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + clmul x31, x29, x26 # perform operation +80001978: 0bae9fb3 clmul x31,x29,x26 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000197c: 0001a203 lw x4,0(x3) +80001980: 01f20863 beq x4,x31,80001990 +80001984: 37d032ef jal x5,80005500 +80001988: 80001978 .word 0x80001978 +8000198c: 8000b15a .word 0x8000b15a +80001990: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000002 +80001994: 00052b83 lw x23,0(x10) +80001998: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000001 +8000199c: 00052c83 lw x25,0(x10) +800019a0: 00450513 addi x10,x10,4 + +800019a4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + clmul x27, x23, x25 # perform operation +800019a4: 0b9b9db3 clmul x27,x23,x25 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a8: 0001a203 lw x4,0(x3) +800019ac: 01b20863 beq x4,x27,800019bc +800019b0: 351032ef jal x5,80005500 +800019b4: 800019a4 .word 0x800019a4 +800019b8: 8000b1ac .word 0x8000b1ac +800019bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000002 +800019c0: 00052a83 lw x21,0(x10) +800019c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000002 +800019c8: 00052483 lw x9,0(x10) +800019cc: 00450513 addi x10,x10,4 + +800019d0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + clmul x29, x21, x9 # perform operation +800019d0: 0a9a9eb3 clmul x29,x21,x9 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d4: 0001a203 lw x4,0(x3) +800019d8: 01d20863 beq x4,x29,800019e8 +800019dc: 325032ef jal x5,80005500 +800019e0: 800019d0 .word 0x800019d0 +800019e4: 8000b1fe .word 0x8000b1fe +800019e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000002 +800019ec: 00052803 lw x16,0(x10) +800019f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x80000000 +800019f4: 00052e03 lw x28,0(x10) +800019f8: 00450513 addi x10,x10,4 + +800019fc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + clmul x21, x16, x28 # perform operation +800019fc: 0bc81ab3 clmul x21,x16,x28 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a00: 0001a203 lw x4,0(x3) +80001a04: 01520863 beq x4,x21,80001a14 +80001a08: 2f9032ef jal x5,80005500 +80001a0c: 800019fc .word 0x800019fc +80001a10: 8000b250 .word 0x8000b250 +80001a14: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000002 +80001a18: 00052a03 lw x20,0(x10) +80001a1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x80000001 +80001a20: 00052383 lw x7,0(x10) +80001a24: 00450513 addi x10,x10,4 + +80001a28 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + clmul x11, x20, x7 # perform operation +80001a28: 0a7a15b3 clmul x11,x20,x7 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a2c: 0001a203 lw x4,0(x3) +80001a30: 00b20863 beq x4,x11,80001a40 +80001a34: 2cd032ef jal x5,80005500 +80001a38: 80001a28 .word 0x80001a28 +80001a3c: 8000b2a9 .word 0x8000b2a9 +80001a40: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000002 +80001a44: 00052e83 lw x29,0(x10) +80001a48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7fffffff +80001a4c: 00052783 lw x15,0(x10) +80001a50: 00450513 addi x10,x10,4 + +80001a54 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + clmul x21, x29, x15 # perform operation +80001a54: 0afe9ab3 clmul x21,x29,x15 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a58: 0001a203 lw x4,0(x3) +80001a5c: 01520863 beq x4,x21,80001a6c +80001a60: 2a1032ef jal x5,80005500 +80001a64: 80001a54 .word 0x80001a54 +80001a68: 8000b302 .word 0x8000b302 +80001a6c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000002 +80001a70: 00052c83 lw x25,0(x10) +80001a74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x7ffffffe +80001a78: 00052f03 lw x30,0(x10) +80001a7c: 00450513 addi x10,x10,4 + +80001a80 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + clmul x26, x25, x30 # perform operation +80001a80: 0bec9d33 clmul x26,x25,x30 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a84: 0001a203 lw x4,0(x3) +80001a88: 01a20863 beq x4,x26,80001a98 +80001a8c: 275032ef jal x5,80005500 +80001a90: 80001a80 .word 0x80001a80 +80001a94: 8000b35b .word 0x8000b35b +80001a98: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000002 +80001a9c: 00052883 lw x17,0(x10) +80001aa0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xffffffff +80001aa4: 00052a03 lw x20,0(x10) +80001aa8: 00450513 addi x10,x10,4 + +80001aac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + clmul x12, x17, x20 # perform operation +80001aac: 0b489633 clmul x12,x17,x20 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab0: 0001a203 lw x4,0(x3) +80001ab4: 00c20863 beq x4,x12,80001ac4 +80001ab8: 249032ef jal x5,80005500 +80001abc: 80001aac .word 0x80001aac +80001ac0: 8000b3b4 .word 0x8000b3b4 +80001ac4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000002 +80001ac8: 00052b83 lw x23,0(x10) +80001acc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xfffffffe +80001ad0: 00052d83 lw x27,0(x10) +80001ad4: 00450513 addi x10,x10,4 + +80001ad8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + clmul x2, x23, x27 # perform operation +80001ad8: 0bbb9133 clmul x2,x23,x27 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001adc: 0001a203 lw x4,0(x3) +80001ae0: 00220863 beq x4,x2,80001af0 +80001ae4: 21d032ef jal x5,80005500 +80001ae8: 80001ad8 .word 0x80001ad8 +80001aec: 8000b40d .word 0x8000b40d +80001af0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000002 +80001af4: 00052c03 lw x24,0(x10) +80001af8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x5bbc8872 +80001afc: 00052383 lw x7,0(x10) +80001b00: 00450513 addi x10,x10,4 + +80001b04 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + clmul x18, x24, x7 # perform operation +80001b04: 0a7c1933 clmul x18,x24,x7 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b08: 0001a203 lw x4,0(x3) +80001b0c: 01220863 beq x4,x18,80001b1c +80001b10: 1f1032ef jal x5,80005500 +80001b14: 80001b04 .word 0x80001b04 +80001b18: 8000b466 .word 0x8000b466 +80001b1c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000002 +80001b20: 00052e83 lw x29,0(x10) +80001b24: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xaaaaaaaa +80001b28: 00052f83 lw x31,0(x10) +80001b2c: 00450513 addi x10,x10,4 + +80001b30 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + clmul x20, x29, x31 # perform operation +80001b30: 0bfe9a33 clmul x20,x29,x31 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b34: 0001a203 lw x4,0(x3) +80001b38: 01420863 beq x4,x20,80001b48 +80001b3c: 1c5032ef jal x5,80005500 +80001b40: 80001b30 .word 0x80001b30 +80001b44: 8000b4bf .word 0x8000b4bf +80001b48: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000002 +80001b4c: 00052683 lw x13,0(x10) +80001b50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x55555555 +80001b54: 00052c03 lw x24,0(x10) +80001b58: 00450513 addi x10,x10,4 + +80001b5c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + clmul x14, x13, x24 # perform operation +80001b5c: 0b869733 clmul x14,x13,x24 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b60: 0001a203 lw x4,0(x3) +80001b64: 00e20863 beq x4,x14,80001b74 +80001b68: 199032ef jal x5,80005500 +80001b6c: 80001b5c .word 0x80001b5c +80001b70: 8000b518 .word 0x8000b518 +80001b74: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x80000000 +80001b78: 00052783 lw x15,0(x10) +80001b7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000000 +80001b80: 00052103 lw x2,0(x10) +80001b84: 00450513 addi x10,x10,4 + +80001b88 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + clmul x30, x15, x2 # perform operation +80001b88: 0a279f33 clmul x30,x15,x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b8c: 0001a203 lw x4,0(x3) +80001b90: 01e20863 beq x4,x30,80001ba0 +80001b94: 16d032ef jal x5,80005500 +80001b98: 80001b88 .word 0x80001b88 +80001b9c: 8000b571 .word 0x8000b571 +80001ba0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x80000000 +80001ba4: 00052403 lw x8,0(x10) +80001ba8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000001 +80001bac: 00052303 lw x6,0(x10) +80001bb0: 00450513 addi x10,x10,4 + +80001bb4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + clmul x1, x8, x6 # perform operation +80001bb4: 0a6410b3 clmul x1,x8,x6 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb8: 0001a203 lw x4,0(x3) +80001bbc: 00120863 beq x4,x1,80001bcc +80001bc0: 141032ef jal x5,80005500 +80001bc4: 80001bb4 .word 0x80001bb4 +80001bc8: 8000b5ca .word 0x8000b5ca +80001bcc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x80000000 +80001bd0: 00052803 lw x16,0(x10) +80001bd4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000002 +80001bd8: 00052e03 lw x28,0(x10) +80001bdc: 00450513 addi x10,x10,4 + +80001be0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + clmul x11, x16, x28 # perform operation +80001be0: 0bc815b3 clmul x11,x16,x28 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be4: 0001a203 lw x4,0(x3) +80001be8: 00b20863 beq x4,x11,80001bf8 +80001bec: 115032ef jal x5,80005500 +80001bf0: 80001be0 .word 0x80001be0 +80001bf4: 8000b623 .word 0x8000b623 +80001bf8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x80000000 +80001bfc: 00052083 lw x1,0(x10) +80001c00: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x80000000 +80001c04: 00052703 lw x14,0(x10) +80001c08: 00450513 addi x10,x10,4 + +80001c0c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + clmul x30, x1, x14 # perform operation +80001c0c: 0ae09f33 clmul x30,x1,x14 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c10: 0001a203 lw x4,0(x3) +80001c14: 01e20863 beq x4,x30,80001c24 +80001c18: 0e9032ef jal x5,80005500 +80001c1c: 80001c0c .word 0x80001c0c +80001c20: 8000b67c .word 0x8000b67c +80001c24: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x80000000 +80001c28: 00052483 lw x9,0(x10) +80001c2c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x80000001 +80001c30: 00052c83 lw x25,0(x10) +80001c34: 00450513 addi x10,x10,4 + +80001c38 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + clmul x28, x9, x25 # perform operation +80001c38: 0b949e33 clmul x28,x9,x25 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c3c: 0001a203 lw x4,0(x3) +80001c40: 01c20863 beq x4,x28,80001c50 +80001c44: 0bd032ef jal x5,80005500 +80001c48: 80001c38 .word 0x80001c38 +80001c4c: 8000b6dc .word 0x8000b6dc +80001c50: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x80000000 +80001c54: 00052603 lw x12,0(x10) +80001c58: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7fffffff +80001c5c: 00052803 lw x16,0(x10) +80001c60: 00450513 addi x10,x10,4 + +80001c64 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + clmul x29, x12, x16 # perform operation +80001c64: 0b061eb3 clmul x29,x12,x16 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c68: 0001a203 lw x4,0(x3) +80001c6c: 01d20863 beq x4,x29,80001c7c +80001c70: 091032ef jal x5,80005500 +80001c74: 80001c64 .word 0x80001c64 +80001c78: 8000b73c .word 0x8000b73c +80001c7c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x80000000 +80001c80: 00052f83 lw x31,0(x10) +80001c84: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7ffffffe +80001c88: 00052383 lw x7,0(x10) +80001c8c: 00450513 addi x10,x10,4 + +80001c90 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + clmul x26, x31, x7 # perform operation +80001c90: 0a7f9d33 clmul x26,x31,x7 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c94: 0001a203 lw x4,0(x3) +80001c98: 01a20863 beq x4,x26,80001ca8 +80001c9c: 065032ef jal x5,80005500 +80001ca0: 80001c90 .word 0x80001c90 +80001ca4: 8000b79c .word 0x8000b79c +80001ca8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x80000000 +80001cac: 00052103 lw x2,0(x10) +80001cb0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xffffffff +80001cb4: 00052f83 lw x31,0(x10) +80001cb8: 00450513 addi x10,x10,4 + +80001cbc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + clmul x12, x2, x31 # perform operation +80001cbc: 0bf11633 clmul x12,x2,x31 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc0: 0001a203 lw x4,0(x3) +80001cc4: 00c20863 beq x4,x12,80001cd4 +80001cc8: 039032ef jal x5,80005500 +80001ccc: 80001cbc .word 0x80001cbc +80001cd0: 8000b7fc .word 0x8000b7fc +80001cd4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x80000000 +80001cd8: 00052e83 lw x29,0(x10) +80001cdc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xfffffffe +80001ce0: 00052583 lw x11,0(x10) +80001ce4: 00450513 addi x10,x10,4 + +80001ce8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + clmul x30, x29, x11 # perform operation +80001ce8: 0abe9f33 clmul x30,x29,x11 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cec: 0001a203 lw x4,0(x3) +80001cf0: 01e20863 beq x4,x30,80001d00 +80001cf4: 00d032ef jal x5,80005500 +80001cf8: 80001ce8 .word 0x80001ce8 +80001cfc: 8000b85c .word 0x8000b85c +80001d00: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x80000000 +80001d04: 00052e03 lw x28,0(x10) +80001d08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc8872 +80001d0c: 00052c03 lw x24,0(x10) +80001d10: 00450513 addi x10,x10,4 + +80001d14 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + clmul x21, x28, x24 # perform operation +80001d14: 0b8e1ab3 clmul x21,x28,x24 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d18: 0001a203 lw x4,0(x3) +80001d1c: 01520863 beq x4,x21,80001d2c +80001d20: 7e0032ef jal x5,80005500 +80001d24: 80001d14 .word 0x80001d14 +80001d28: 8000b8bc .word 0x8000b8bc +80001d2c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x80000000 +80001d30: 00052703 lw x14,0(x10) +80001d34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xaaaaaaaa +80001d38: 00052e03 lw x28,0(x10) +80001d3c: 00450513 addi x10,x10,4 + +80001d40 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + clmul x21, x14, x28 # perform operation +80001d40: 0bc71ab3 clmul x21,x14,x28 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d44: 0001a203 lw x4,0(x3) +80001d48: 01520863 beq x4,x21,80001d58 +80001d4c: 7b4032ef jal x5,80005500 +80001d50: 80001d40 .word 0x80001d40 +80001d54: 8000b91c .word 0x8000b91c +80001d58: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x80000000 +80001d5c: 00052903 lw x18,0(x10) +80001d60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x55555555 +80001d64: 00052e83 lw x29,0(x10) +80001d68: 00450513 addi x10,x10,4 + +80001d6c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + clmul x30, x18, x29 # perform operation +80001d6c: 0bd91f33 clmul x30,x18,x29 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d70: 0001a203 lw x4,0(x3) +80001d74: 01e20863 beq x4,x30,80001d84 +80001d78: 788032ef jal x5,80005500 +80001d7c: 80001d6c .word 0x80001d6c +80001d80: 8000b97c .word 0x8000b97c +80001d84: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x80000001 +80001d88: 00052d83 lw x27,0(x10) +80001d8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000 +80001d90: 00052903 lw x18,0(x10) +80001d94: 00450513 addi x10,x10,4 + +80001d98 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + clmul x17, x27, x18 # perform operation +80001d98: 0b2d98b3 clmul x17,x27,x18 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d9c: 0001a203 lw x4,0(x3) +80001da0: 01120863 beq x4,x17,80001db0 +80001da4: 75c032ef jal x5,80005500 +80001da8: 80001d98 .word 0x80001d98 +80001dac: 8000b9dc .word 0x8000b9dc +80001db0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x80000001 +80001db4: 00052083 lw x1,0(x10) +80001db8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000001 +80001dbc: 00052603 lw x12,0(x10) +80001dc0: 00450513 addi x10,x10,4 + +80001dc4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + clmul x29, x1, x12 # perform operation +80001dc4: 0ac09eb3 clmul x29,x1,x12 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc8: 0001a203 lw x4,0(x3) +80001dcc: 01d20863 beq x4,x29,80001ddc +80001dd0: 730032ef jal x5,80005500 +80001dd4: 80001dc4 .word 0x80001dc4 +80001dd8: 8000ba35 .word 0x8000ba35 +80001ddc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x80000001 +80001de0: 00052683 lw x13,0(x10) +80001de4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000002 +80001de8: 00052b03 lw x22,0(x10) +80001dec: 00450513 addi x10,x10,4 + +80001df0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + clmul x9, x13, x22 # perform operation +80001df0: 0b6694b3 clmul x9,x13,x22 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df4: 0001a203 lw x4,0(x3) +80001df8: 00920863 beq x4,x9,80001e08 +80001dfc: 704032ef jal x5,80005500 +80001e00: 80001df0 .word 0x80001df0 +80001e04: 8000ba8e .word 0x8000ba8e +80001e08: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x80000001 +80001e0c: 00052603 lw x12,0(x10) +80001e10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x80000000 +80001e14: 00052f83 lw x31,0(x10) +80001e18: 00450513 addi x10,x10,4 + +80001e1c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + clmul x1, x12, x31 # perform operation +80001e1c: 0bf610b3 clmul x1,x12,x31 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e20: 0001a203 lw x4,0(x3) +80001e24: 00120863 beq x4,x1,80001e34 +80001e28: 6d8032ef jal x5,80005500 +80001e2c: 80001e1c .word 0x80001e1c +80001e30: 8000bae7 .word 0x8000bae7 +80001e34: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x80000001 +80001e38: 00052b03 lw x22,0(x10) +80001e3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x80000001 +80001e40: 00052c03 lw x24,0(x10) +80001e44: 00450513 addi x10,x10,4 + +80001e48 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + clmul x20, x22, x24 # perform operation +80001e48: 0b8b1a33 clmul x20,x22,x24 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e4c: 0001a203 lw x4,0(x3) +80001e50: 01420863 beq x4,x20,80001e60 +80001e54: 6ac032ef jal x5,80005500 +80001e58: 80001e48 .word 0x80001e48 +80001e5c: 8000bb47 .word 0x8000bb47 +80001e60: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x80000001 +80001e64: 00052883 lw x17,0(x10) +80001e68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffff +80001e6c: 00052d83 lw x27,0(x10) +80001e70: 00450513 addi x10,x10,4 + +80001e74 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + clmul x20, x17, x27 # perform operation +80001e74: 0bb89a33 clmul x20,x17,x27 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e78: 0001a203 lw x4,0(x3) +80001e7c: 01420863 beq x4,x20,80001e8c +80001e80: 680032ef jal x5,80005500 +80001e84: 80001e74 .word 0x80001e74 +80001e88: 8000bba7 .word 0x8000bba7 +80001e8c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x80000001 +80001e90: 00052483 lw x9,0(x10) +80001e94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7ffffffe +80001e98: 00052a83 lw x21,0(x10) +80001e9c: 00450513 addi x10,x10,4 + +80001ea0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + clmul x26, x9, x21 # perform operation +80001ea0: 0b549d33 clmul x26,x9,x21 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea4: 0001a203 lw x4,0(x3) +80001ea8: 01a20863 beq x4,x26,80001eb8 +80001eac: 654032ef jal x5,80005500 +80001eb0: 80001ea0 .word 0x80001ea0 +80001eb4: 8000bc07 .word 0x8000bc07 +80001eb8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x80000001 +80001ebc: 00052103 lw x2,0(x10) +80001ec0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffff +80001ec4: 00052b03 lw x22,0(x10) +80001ec8: 00450513 addi x10,x10,4 + +80001ecc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + clmul x29, x2, x22 # perform operation +80001ecc: 0b611eb3 clmul x29,x2,x22 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed0: 0001a203 lw x4,0(x3) +80001ed4: 01d20863 beq x4,x29,80001ee4 +80001ed8: 628032ef jal x5,80005500 +80001edc: 80001ecc .word 0x80001ecc +80001ee0: 8000bc67 .word 0x8000bc67 +80001ee4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x80000001 +80001ee8: 00052a03 lw x20,0(x10) +80001eec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xfffffffe +80001ef0: 00052a83 lw x21,0(x10) +80001ef4: 00450513 addi x10,x10,4 + +80001ef8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + clmul x29, x20, x21 # perform operation +80001ef8: 0b5a1eb3 clmul x29,x20,x21 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001efc: 0001a203 lw x4,0(x3) +80001f00: 01d20863 beq x4,x29,80001f10 +80001f04: 5fc032ef jal x5,80005500 +80001f08: 80001ef8 .word 0x80001ef8 +80001f0c: 8000bcc7 .word 0x8000bcc7 +80001f10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x80000001 +80001f14: 00052583 lw x11,0(x10) +80001f18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5bbc8872 +80001f1c: 00052c83 lw x25,0(x10) +80001f20: 00450513 addi x10,x10,4 + +80001f24 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + clmul x27, x11, x25 # perform operation +80001f24: 0b959db3 clmul x27,x11,x25 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f28: 0001a203 lw x4,0(x3) +80001f2c: 01b20863 beq x4,x27,80001f3c +80001f30: 5d0032ef jal x5,80005500 +80001f34: 80001f24 .word 0x80001f24 +80001f38: 8000bd27 .word 0x8000bd27 +80001f3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x80000001 +80001f40: 00052883 lw x17,0(x10) +80001f44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaa +80001f48: 00052c03 lw x24,0(x10) +80001f4c: 00450513 addi x10,x10,4 + +80001f50 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + clmul x7, x17, x24 # perform operation +80001f50: 0b8893b3 clmul x7,x17,x24 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f54: 0001a203 lw x4,0(x3) +80001f58: 00720863 beq x4,x7,80001f68 +80001f5c: 5a4032ef jal x5,80005500 +80001f60: 80001f50 .word 0x80001f50 +80001f64: 8000bd87 .word 0x8000bd87 +80001f68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x80000001 +80001f6c: 00052b83 lw x23,0(x10) +80001f70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x55555555 +80001f74: 00052e03 lw x28,0(x10) +80001f78: 00450513 addi x10,x10,4 + +80001f7c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + clmul x14, x23, x28 # perform operation +80001f7c: 0bcb9733 clmul x14,x23,x28 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f80: 0001a203 lw x4,0(x3) +80001f84: 00e20863 beq x4,x14,80001f94 +80001f88: 578032ef jal x5,80005500 +80001f8c: 80001f7c .word 0x80001f7c +80001f90: 8000bde7 .word 0x8000bde7 +80001f94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7fffffff +80001f98: 00052d83 lw x27,0(x10) +80001f9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000 +80001fa0: 00052483 lw x9,0(x10) +80001fa4: 00450513 addi x10,x10,4 + +80001fa8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + clmul x30, x27, x9 # perform operation +80001fa8: 0a9d9f33 clmul x30,x27,x9 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fac: 0001a203 lw x4,0(x3) +80001fb0: 01e20863 beq x4,x30,80001fc0 +80001fb4: 54c032ef jal x5,80005500 +80001fb8: 80001fa8 .word 0x80001fa8 +80001fbc: 8000be47 .word 0x8000be47 +80001fc0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7fffffff +80001fc4: 00052583 lw x11,0(x10) +80001fc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000001 +80001fcc: 00052a83 lw x21,0(x10) +80001fd0: 00450513 addi x10,x10,4 + +80001fd4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + clmul x16, x11, x21 # perform operation +80001fd4: 0b559833 clmul x16,x11,x21 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd8: 0001a203 lw x4,0(x3) +80001fdc: 01020863 beq x4,x16,80001fec +80001fe0: 520032ef jal x5,80005500 +80001fe4: 80001fd4 .word 0x80001fd4 +80001fe8: 8000bea0 .word 0x8000bea0 +80001fec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffff +80001ff0: 00052a83 lw x21,0(x10) +80001ff4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000002 +80001ff8: 00052883 lw x17,0(x10) +80001ffc: 00450513 addi x10,x10,4 + +80002000 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + clmul x25, x21, x17 # perform operation +80002000: 0b1a9cb3 clmul x25,x21,x17 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002004: 0001a203 lw x4,0(x3) +80002008: 01920863 beq x4,x25,80002018 +8000200c: 4f4032ef jal x5,80005500 +80002010: 80002000 .word 0x80002000 +80002014: 8000bef9 .word 0x8000bef9 +80002018: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7fffffff +8000201c: 00052f03 lw x30,0(x10) +80002020: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x80000000 +80002024: 00052883 lw x17,0(x10) +80002028: 00450513 addi x10,x10,4 + +8000202c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + clmul x24, x30, x17 # perform operation +8000202c: 0b1f1c33 clmul x24,x30,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002030: 0001a203 lw x4,0(x3) +80002034: 01820863 beq x4,x24,80002044 +80002038: 4c8032ef jal x5,80005500 +8000203c: 8000202c .word 0x8000202c +80002040: 8000bf52 .word 0x8000bf52 +80002044: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffff +80002048: 00052c83 lw x25,0(x10) +8000204c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x80000001 +80002050: 00052e83 lw x29,0(x10) +80002054: 00450513 addi x10,x10,4 + +80002058 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + clmul x1, x25, x29 # perform operation +80002058: 0bdc90b3 clmul x1,x25,x29 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000205c: 0001a203 lw x4,0(x3) +80002060: 00120863 beq x4,x1,80002070 +80002064: 49c032ef jal x5,80005500 +80002068: 80002058 .word 0x80002058 +8000206c: 8000bfb2 .word 0x8000bfb2 +80002070: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7fffffff +80002074: 00052b03 lw x22,0(x10) +80002078: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7fffffff +8000207c: 00052303 lw x6,0(x10) +80002080: 00450513 addi x10,x10,4 + +80002084 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + clmul x24, x22, x6 # perform operation +80002084: 0a6b1c33 clmul x24,x22,x6 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002088: 0001a203 lw x4,0(x3) +8000208c: 01820863 beq x4,x24,8000209c +80002090: 470032ef jal x5,80005500 +80002094: 80002084 .word 0x80002084 +80002098: 8000c012 .word 0x8000c012 +8000209c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffff +800020a0: 00052a83 lw x21,0(x10) +800020a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffe +800020a8: 00052683 lw x13,0(x10) +800020ac: 00450513 addi x10,x10,4 + +800020b0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + clmul x1, x21, x13 # perform operation +800020b0: 0ada90b3 clmul x1,x21,x13 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b4: 0001a203 lw x4,0(x3) +800020b8: 00120863 beq x4,x1,800020c8 +800020bc: 444032ef jal x5,80005500 +800020c0: 800020b0 .word 0x800020b0 +800020c4: 8000c072 .word 0x8000c072 +800020c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7fffffff +800020cc: 00052603 lw x12,0(x10) +800020d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xffffffff +800020d4: 00052103 lw x2,0(x10) +800020d8: 00450513 addi x10,x10,4 + +800020dc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + clmul x13, x12, x2 # perform operation +800020dc: 0a2616b3 clmul x13,x12,x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e0: 0001a203 lw x4,0(x3) +800020e4: 00d20863 beq x4,x13,800020f4 +800020e8: 418032ef jal x5,80005500 +800020ec: 800020dc .word 0x800020dc +800020f0: 8000c0d2 .word 0x8000c0d2 +800020f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffff +800020f8: 00052c83 lw x25,0(x10) +800020fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xfffffffe +80002100: 00052d03 lw x26,0(x10) +80002104: 00450513 addi x10,x10,4 + +80002108 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + clmul x14, x25, x26 # perform operation +80002108: 0bac9733 clmul x14,x25,x26 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000210c: 0001a203 lw x4,0(x3) +80002110: 00e20863 beq x4,x14,80002120 +80002114: 3ec032ef jal x5,80005500 +80002118: 80002108 .word 0x80002108 +8000211c: 8000c132 .word 0x8000c132 +80002120: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffff +80002124: 00052e83 lw x29,0(x10) +80002128: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc8872 +8000212c: 00052803 lw x16,0(x10) +80002130: 00450513 addi x10,x10,4 + +80002134 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + clmul x14, x29, x16 # perform operation +80002134: 0b0e9733 clmul x14,x29,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002138: 0001a203 lw x4,0(x3) +8000213c: 00e20863 beq x4,x14,8000214c +80002140: 3c0032ef jal x5,80005500 +80002144: 80002134 .word 0x80002134 +80002148: 8000c192 .word 0x8000c192 +8000214c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffff +80002150: 00052783 lw x15,0(x10) +80002154: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xaaaaaaaa +80002158: 00052b03 lw x22,0(x10) +8000215c: 00450513 addi x10,x10,4 + +80002160 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + clmul x16, x15, x22 # perform operation +80002160: 0b679833 clmul x16,x15,x22 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002164: 0001a203 lw x4,0(x3) +80002168: 01020863 beq x4,x16,80002178 +8000216c: 394032ef jal x5,80005500 +80002170: 80002160 .word 0x80002160 +80002174: 8000c1f2 .word 0x8000c1f2 +80002178: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7fffffff +8000217c: 00052683 lw x13,0(x10) +80002180: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x55555555 +80002184: 00052483 lw x9,0(x10) +80002188: 00450513 addi x10,x10,4 + +8000218c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + clmul x21, x13, x9 # perform operation +8000218c: 0a969ab3 clmul x21,x13,x9 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002190: 0001a203 lw x4,0(x3) +80002194: 01520863 beq x4,x21,800021a4 +80002198: 368032ef jal x5,80005500 +8000219c: 8000218c .word 0x8000218c +800021a0: 8000c252 .word 0x8000c252 +800021a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7ffffffe +800021a8: 00052e83 lw x29,0(x10) +800021ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000 +800021b0: 00052e03 lw x28,0(x10) +800021b4: 00450513 addi x10,x10,4 + +800021b8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + clmul x20, x29, x28 # perform operation +800021b8: 0bce9a33 clmul x20,x29,x28 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021bc: 0001a203 lw x4,0(x3) +800021c0: 01420863 beq x4,x20,800021d0 +800021c4: 33c032ef jal x5,80005500 +800021c8: 800021b8 .word 0x800021b8 +800021cc: 8000c2b2 .word 0x8000c2b2 +800021d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7ffffffe +800021d4: 00052e83 lw x29,0(x10) +800021d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000001 +800021dc: 00052d83 lw x27,0(x10) +800021e0: 00450513 addi x10,x10,4 + +800021e4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + clmul x11, x29, x27 # perform operation +800021e4: 0bbe95b3 clmul x11,x29,x27 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e8: 0001a203 lw x4,0(x3) +800021ec: 00b20863 beq x4,x11,800021fc +800021f0: 310032ef jal x5,80005500 +800021f4: 800021e4 .word 0x800021e4 +800021f8: 8000c30b .word 0x8000c30b +800021fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x7ffffffe +80002200: 00052903 lw x18,0(x10) +80002204: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000002 +80002208: 00052b03 lw x22,0(x10) +8000220c: 00450513 addi x10,x10,4 + +80002210 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + clmul x21, x18, x22 # perform operation +80002210: 0b691ab3 clmul x21,x18,x22 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002214: 0001a203 lw x4,0(x3) +80002218: 01520863 beq x4,x21,80002228 +8000221c: 2e4032ef jal x5,80005500 +80002220: 80002210 .word 0x80002210 +80002224: 8000c364 .word 0x8000c364 +80002228: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7ffffffe +8000222c: 00052083 lw x1,0(x10) +80002230: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x80000000 +80002234: 00052803 lw x16,0(x10) +80002238: 00450513 addi x10,x10,4 + +8000223c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + clmul x17, x1, x16 # perform operation +8000223c: 0b0098b3 clmul x17,x1,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002240: 0001a203 lw x4,0(x3) +80002244: 01120863 beq x4,x17,80002254 +80002248: 2b8032ef jal x5,80005500 +8000224c: 8000223c .word 0x8000223c +80002250: 8000c3bd .word 0x8000c3bd +80002254: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7ffffffe +80002258: 00052603 lw x12,0(x10) +8000225c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x80000001 +80002260: 00052383 lw x7,0(x10) +80002264: 00450513 addi x10,x10,4 + +80002268 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + clmul x17, x12, x7 # perform operation +80002268: 0a7618b3 clmul x17,x12,x7 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000226c: 0001a203 lw x4,0(x3) +80002270: 01120863 beq x4,x17,80002280 +80002274: 28c032ef jal x5,80005500 +80002278: 80002268 .word 0x80002268 +8000227c: 8000c41d .word 0x8000c41d +80002280: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7ffffffe +80002284: 00052103 lw x2,0(x10) +80002288: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7fffffff +8000228c: 00052e03 lw x28,0(x10) +80002290: 00450513 addi x10,x10,4 + +80002294 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + clmul x23, x2, x28 # perform operation +80002294: 0bc11bb3 clmul x23,x2,x28 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002298: 0001a203 lw x4,0(x3) +8000229c: 01720863 beq x4,x23,800022ac +800022a0: 260032ef jal x5,80005500 +800022a4: 80002294 .word 0x80002294 +800022a8: 8000c47d .word 0x8000c47d +800022ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7ffffffe +800022b0: 00052783 lw x15,0(x10) +800022b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7ffffffe +800022b8: 00052a03 lw x20,0(x10) +800022bc: 00450513 addi x10,x10,4 + +800022c0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + clmul x11, x15, x20 # perform operation +800022c0: 0b4795b3 clmul x11,x15,x20 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c4: 0001a203 lw x4,0(x3) +800022c8: 00b20863 beq x4,x11,800022d8 +800022cc: 234032ef jal x5,80005500 +800022d0: 800022c0 .word 0x800022c0 +800022d4: 8000c4dd .word 0x8000c4dd +800022d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7ffffffe +800022dc: 00052583 lw x11,0(x10) +800022e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xffffffff +800022e4: 00052483 lw x9,0(x10) +800022e8: 00450513 addi x10,x10,4 + +800022ec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + clmul x29, x11, x9 # perform operation +800022ec: 0a959eb3 clmul x29,x11,x9 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f0: 0001a203 lw x4,0(x3) +800022f4: 01d20863 beq x4,x29,80002304 +800022f8: 208032ef jal x5,80005500 +800022fc: 800022ec .word 0x800022ec +80002300: 8000c53d .word 0x8000c53d +80002304: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7ffffffe +80002308: 00052d83 lw x27,0(x10) +8000230c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffe +80002310: 00052983 lw x19,0(x10) +80002314: 00450513 addi x10,x10,4 + +80002318 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + clmul x29, x27, x19 # perform operation +80002318: 0b3d9eb3 clmul x29,x27,x19 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000231c: 0001a203 lw x4,0(x3) +80002320: 01d20863 beq x4,x29,80002330 +80002324: 1dc032ef jal x5,80005500 +80002328: 80002318 .word 0x80002318 +8000232c: 8000c59d .word 0x8000c59d +80002330: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7ffffffe +80002334: 00052e83 lw x29,0(x10) +80002338: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x5bbc8872 +8000233c: 00052883 lw x17,0(x10) +80002340: 00450513 addi x10,x10,4 + +80002344 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + clmul x15, x29, x17 # perform operation +80002344: 0b1e97b3 clmul x15,x29,x17 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002348: 0001a203 lw x4,0(x3) +8000234c: 00f20863 beq x4,x15,8000235c +80002350: 1b0032ef jal x5,80005500 +80002354: 80002344 .word 0x80002344 +80002358: 8000c5fd .word 0x8000c5fd +8000235c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7ffffffe +80002360: 00052083 lw x1,0(x10) +80002364: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xaaaaaaaa +80002368: 00052a03 lw x20,0(x10) +8000236c: 00450513 addi x10,x10,4 + +80002370 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + clmul x21, x1, x20 # perform operation +80002370: 0b409ab3 clmul x21,x1,x20 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002374: 0001a203 lw x4,0(x3) +80002378: 01520863 beq x4,x21,80002388 +8000237c: 184032ef jal x5,80005500 +80002380: 80002370 .word 0x80002370 +80002384: 8000c65d .word 0x8000c65d +80002388: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7ffffffe +8000238c: 00052c83 lw x25,0(x10) +80002390: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x55555555 +80002394: 00052d03 lw x26,0(x10) +80002398: 00450513 addi x10,x10,4 + +8000239c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + clmul x11, x25, x26 # perform operation +8000239c: 0bac95b3 clmul x11,x25,x26 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a0: 0001a203 lw x4,0(x3) +800023a4: 00b20863 beq x4,x11,800023b4 +800023a8: 158032ef jal x5,80005500 +800023ac: 8000239c .word 0x8000239c +800023b0: 8000c6bd .word 0x8000c6bd +800023b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xffffffff +800023b8: 00052603 lw x12,0(x10) +800023bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000 +800023c0: 00052403 lw x8,0(x10) +800023c4: 00450513 addi x10,x10,4 + +800023c8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + clmul x15, x12, x8 # perform operation +800023c8: 0a8617b3 clmul x15,x12,x8 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023cc: 0001a203 lw x4,0(x3) +800023d0: 00f20863 beq x4,x15,800023e0 +800023d4: 12c032ef jal x5,80005500 +800023d8: 800023c8 .word 0x800023c8 +800023dc: 8000c71d .word 0x8000c71d +800023e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xffffffff +800023e4: 00052783 lw x15,0(x10) +800023e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x00000001 +800023ec: 00052f03 lw x30,0(x10) +800023f0: 00450513 addi x10,x10,4 + +800023f4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + clmul x1, x15, x30 # perform operation +800023f4: 0be790b3 clmul x1,x15,x30 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f8: 0001a203 lw x4,0(x3) +800023fc: 00120863 beq x4,x1,8000240c +80002400: 100032ef jal x5,80005500 +80002404: 800023f4 .word 0x800023f4 +80002408: 8000c776 .word 0x8000c776 +8000240c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xffffffff +80002410: 00052a03 lw x20,0(x10) +80002414: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000002 +80002418: 00052683 lw x13,0(x10) +8000241c: 00450513 addi x10,x10,4 + +80002420 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + clmul x2, x20, x13 # perform operation +80002420: 0ada1133 clmul x2,x20,x13 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002424: 0001a203 lw x4,0(x3) +80002428: 00220863 beq x4,x2,80002438 +8000242c: 0d4032ef jal x5,80005500 +80002430: 80002420 .word 0x80002420 +80002434: 8000c7cf .word 0x8000c7cf +80002438: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xffffffff +8000243c: 00052303 lw x6,0(x10) +80002440: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x80000000 +80002444: 00052b03 lw x22,0(x10) +80002448: 00450513 addi x10,x10,4 + +8000244c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + clmul x29, x6, x22 # perform operation +8000244c: 0b631eb3 clmul x29,x6,x22 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002450: 0001a203 lw x4,0(x3) +80002454: 01d20863 beq x4,x29,80002464 +80002458: 0a8032ef jal x5,80005500 +8000245c: 8000244c .word 0x8000244c +80002460: 8000c828 .word 0x8000c828 +80002464: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xffffffff +80002468: 00052583 lw x11,0(x10) +8000246c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x80000001 +80002470: 00052803 lw x16,0(x10) +80002474: 00450513 addi x10,x10,4 + +80002478 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + clmul x20, x11, x16 # perform operation +80002478: 0b059a33 clmul x20,x11,x16 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000247c: 0001a203 lw x4,0(x3) +80002480: 01420863 beq x4,x20,80002490 +80002484: 07c032ef jal x5,80005500 +80002488: 80002478 .word 0x80002478 +8000248c: 8000c888 .word 0x8000c888 +80002490: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xffffffff +80002494: 00052d03 lw x26,0(x10) +80002498: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7fffffff +8000249c: 00052c03 lw x24,0(x10) +800024a0: 00450513 addi x10,x10,4 + +800024a4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + clmul x27, x26, x24 # perform operation +800024a4: 0b8d1db3 clmul x27,x26,x24 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a8: 0001a203 lw x4,0(x3) +800024ac: 01b20863 beq x4,x27,800024bc +800024b0: 050032ef jal x5,80005500 +800024b4: 800024a4 .word 0x800024a4 +800024b8: 8000c8e8 .word 0x8000c8e8 +800024bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffff +800024c0: 00052e83 lw x29,0(x10) +800024c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffe +800024c8: 00052e03 lw x28,0(x10) +800024cc: 00450513 addi x10,x10,4 + +800024d0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + clmul x27, x29, x28 # perform operation +800024d0: 0bce9db3 clmul x27,x29,x28 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d4: 0001a203 lw x4,0(x3) +800024d8: 01b20863 beq x4,x27,800024e8 +800024dc: 024032ef jal x5,80005500 +800024e0: 800024d0 .word 0x800024d0 +800024e4: 8000c948 .word 0x8000c948 +800024e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xffffffff +800024ec: 00052d03 lw x26,0(x10) +800024f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xffffffff +800024f4: 00052f83 lw x31,0(x10) +800024f8: 00450513 addi x10,x10,4 + +800024fc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + clmul x25, x26, x31 # perform operation +800024fc: 0bfd1cb3 clmul x25,x26,x31 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002500: 0001a203 lw x4,0(x3) +80002504: 01920863 beq x4,x25,80002514 +80002508: 7f9022ef jal x5,80005500 +8000250c: 800024fc .word 0x800024fc +80002510: 8000c9a8 .word 0x8000c9a8 +80002514: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffff +80002518: 00052e83 lw x29,0(x10) +8000251c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xfffffffe +80002520: 00052d83 lw x27,0(x10) +80002524: 00450513 addi x10,x10,4 + +80002528 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + clmul x13, x29, x27 # perform operation +80002528: 0bbe96b3 clmul x13,x29,x27 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000252c: 0001a203 lw x4,0(x3) +80002530: 00d20863 beq x4,x13,80002540 +80002534: 7cd022ef jal x5,80005500 +80002538: 80002528 .word 0x80002528 +8000253c: 8000ca08 .word 0x8000ca08 +80002540: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffff +80002544: 00052e83 lw x29,0(x10) +80002548: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5bbc8872 +8000254c: 00052303 lw x6,0(x10) +80002550: 00450513 addi x10,x10,4 + +80002554 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + clmul x18, x29, x6 # perform operation +80002554: 0a6e9933 clmul x18,x29,x6 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002558: 0001a203 lw x4,0(x3) +8000255c: 01220863 beq x4,x18,8000256c +80002560: 7a1022ef jal x5,80005500 +80002564: 80002554 .word 0x80002554 +80002568: 8000ca68 .word 0x8000ca68 +8000256c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xffffffff +80002570: 00052c03 lw x24,0(x10) +80002574: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaaaaaaaa +80002578: 00052383 lw x7,0(x10) +8000257c: 00450513 addi x10,x10,4 + +80002580 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + clmul x14, x24, x7 # perform operation +80002580: 0a7c1733 clmul x14,x24,x7 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002584: 0001a203 lw x4,0(x3) +80002588: 00e20863 beq x4,x14,80002598 +8000258c: 775022ef jal x5,80005500 +80002590: 80002580 .word 0x80002580 +80002594: 8000cac8 .word 0x8000cac8 +80002598: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xffffffff +8000259c: 00052d83 lw x27,0(x10) +800025a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x55555555 +800025a4: 00052a83 lw x21,0(x10) +800025a8: 00450513 addi x10,x10,4 + +800025ac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + clmul x12, x27, x21 # perform operation +800025ac: 0b5d9633 clmul x12,x27,x21 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b0: 0001a203 lw x4,0(x3) +800025b4: 00c20863 beq x4,x12,800025c4 +800025b8: 749022ef jal x5,80005500 +800025bc: 800025ac .word 0x800025ac +800025c0: 8000cb28 .word 0x8000cb28 +800025c4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfffffffe +800025c8: 00052683 lw x13,0(x10) +800025cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000 +800025d0: 00052e83 lw x29,0(x10) +800025d4: 00450513 addi x10,x10,4 + +800025d8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + clmul x8, x13, x29 # perform operation +800025d8: 0bd69433 clmul x8,x13,x29 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025dc: 0001a203 lw x4,0(x3) +800025e0: 00820863 beq x4,x8,800025f0 +800025e4: 71d022ef jal x5,80005500 +800025e8: 800025d8 .word 0x800025d8 +800025ec: 8000cb88 .word 0x8000cb88 +800025f0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffe +800025f4: 00052483 lw x9,0(x10) +800025f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000001 +800025fc: 00052103 lw x2,0(x10) +80002600: 00450513 addi x10,x10,4 + +80002604 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + clmul x31, x9, x2 # perform operation +80002604: 0a249fb3 clmul x31,x9,x2 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002608: 0001a203 lw x4,0(x3) +8000260c: 01f20863 beq x4,x31,8000261c +80002610: 6f1022ef jal x5,80005500 +80002614: 80002604 .word 0x80002604 +80002618: 8000cbe1 .word 0x8000cbe1 +8000261c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffe +80002620: 00052483 lw x9,0(x10) +80002624: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000002 +80002628: 00052a03 lw x20,0(x10) +8000262c: 00450513 addi x10,x10,4 + +80002630 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + clmul x12, x9, x20 # perform operation +80002630: 0b449633 clmul x12,x9,x20 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002634: 0001a203 lw x4,0(x3) +80002638: 00c20863 beq x4,x12,80002648 +8000263c: 6c5022ef jal x5,80005500 +80002640: 80002630 .word 0x80002630 +80002644: 8000cc3a .word 0x8000cc3a +80002648: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffe +8000264c: 00052883 lw x17,0(x10) +80002650: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x80000000 +80002654: 00052783 lw x15,0(x10) +80002658: 00450513 addi x10,x10,4 + +8000265c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + clmul x22, x17, x15 # perform operation +8000265c: 0af89b33 clmul x22,x17,x15 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002660: 0001a203 lw x4,0(x3) +80002664: 01620863 beq x4,x22,80002674 +80002668: 699022ef jal x5,80005500 +8000266c: 8000265c .word 0x8000265c +80002670: 8000cc93 .word 0x8000cc93 +80002674: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfffffffe +80002678: 00052683 lw x13,0(x10) +8000267c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x80000001 +80002680: 00052e83 lw x29,0(x10) +80002684: 00450513 addi x10,x10,4 + +80002688 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + clmul x14, x13, x29 # perform operation +80002688: 0bd69733 clmul x14,x13,x29 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000268c: 0001a203 lw x4,0(x3) +80002690: 00e20863 beq x4,x14,800026a0 +80002694: 66d022ef jal x5,80005500 +80002698: 80002688 .word 0x80002688 +8000269c: 8000ccf3 .word 0x8000ccf3 +800026a0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfffffffe +800026a4: 00052b03 lw x22,0(x10) +800026a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffff +800026ac: 00052d83 lw x27,0(x10) +800026b0: 00450513 addi x10,x10,4 + +800026b4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + clmul x29, x22, x27 # perform operation +800026b4: 0bbb1eb3 clmul x29,x22,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b8: 0001a203 lw x4,0(x3) +800026bc: 01d20863 beq x4,x29,800026cc +800026c0: 641022ef jal x5,80005500 +800026c4: 800026b4 .word 0x800026b4 +800026c8: 8000cd53 .word 0x8000cd53 +800026cc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xfffffffe +800026d0: 00052383 lw x7,0(x10) +800026d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffe +800026d8: 00052103 lw x2,0(x10) +800026dc: 00450513 addi x10,x10,4 + +800026e0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + clmul x30, x7, x2 # perform operation +800026e0: 0a239f33 clmul x30,x7,x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e4: 0001a203 lw x4,0(x3) +800026e8: 01e20863 beq x4,x30,800026f8 +800026ec: 615022ef jal x5,80005500 +800026f0: 800026e0 .word 0x800026e0 +800026f4: 8000cdb3 .word 0x8000cdb3 +800026f8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfffffffe +800026fc: 00052803 lw x16,0(x10) +80002700: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xffffffff +80002704: 00052703 lw x14,0(x10) +80002708: 00450513 addi x10,x10,4 + +8000270c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + clmul x15, x16, x14 # perform operation +8000270c: 0ae817b3 clmul x15,x16,x14 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002710: 0001a203 lw x4,0(x3) +80002714: 00f20863 beq x4,x15,80002724 +80002718: 5e9022ef jal x5,80005500 +8000271c: 8000270c .word 0x8000270c +80002720: 8000ce13 .word 0x8000ce13 +80002724: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xfffffffe +80002728: 00052083 lw x1,0(x10) +8000272c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffe +80002730: 00052883 lw x17,0(x10) +80002734: 00450513 addi x10,x10,4 + +80002738 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + clmul x27, x1, x17 # perform operation +80002738: 0b109db3 clmul x27,x1,x17 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000273c: 0001a203 lw x4,0(x3) +80002740: 01b20863 beq x4,x27,80002750 +80002744: 5bd022ef jal x5,80005500 +80002748: 80002738 .word 0x80002738 +8000274c: 8000ce73 .word 0x8000ce73 +80002750: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xfffffffe +80002754: 00052303 lw x6,0(x10) +80002758: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc8872 +8000275c: 00052e03 lw x28,0(x10) +80002760: 00450513 addi x10,x10,4 + +80002764 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + clmul x23, x6, x28 # perform operation +80002764: 0bc31bb3 clmul x23,x6,x28 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002768: 0001a203 lw x4,0(x3) +8000276c: 01720863 beq x4,x23,8000277c +80002770: 591022ef jal x5,80005500 +80002774: 80002764 .word 0x80002764 +80002778: 8000ced3 .word 0x8000ced3 +8000277c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffe +80002780: 00052883 lw x17,0(x10) +80002784: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaa +80002788: 00052c03 lw x24,0(x10) +8000278c: 00450513 addi x10,x10,4 + +80002790 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + clmul x11, x17, x24 # perform operation +80002790: 0b8895b3 clmul x11,x17,x24 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002794: 0001a203 lw x4,0(x3) +80002798: 00b20863 beq x4,x11,800027a8 +8000279c: 565022ef jal x5,80005500 +800027a0: 80002790 .word 0x80002790 +800027a4: 8000cf33 .word 0x8000cf33 +800027a8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xfffffffe +800027ac: 00052703 lw x14,0(x10) +800027b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x55555555 +800027b4: 00052b83 lw x23,0(x10) +800027b8: 00450513 addi x10,x10,4 + +800027bc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + clmul x15, x14, x23 # perform operation +800027bc: 0b7717b3 clmul x15,x14,x23 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c0: 0001a203 lw x4,0(x3) +800027c4: 00f20863 beq x4,x15,800027d4 +800027c8: 539022ef jal x5,80005500 +800027cc: 800027bc .word 0x800027bc +800027d0: 8000cf93 .word 0x8000cf93 +800027d4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5bbc8872 +800027d8: 00052803 lw x16,0(x10) +800027dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000000 +800027e0: 00052083 lw x1,0(x10) +800027e4: 00450513 addi x10,x10,4 + +800027e8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + clmul x29, x16, x1 # perform operation +800027e8: 0a181eb3 clmul x29,x16,x1 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027ec: 0001a203 lw x4,0(x3) +800027f0: 01d20863 beq x4,x29,80002800 +800027f4: 50d022ef jal x5,80005500 +800027f8: 800027e8 .word 0x800027e8 +800027fc: 8000cff3 .word 0x8000cff3 +80002800: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5bbc8872 +80002804: 00052803 lw x16,0(x10) +80002808: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x00000001 +8000280c: 00052583 lw x11,0(x10) +80002810: 00450513 addi x10,x10,4 + +80002814 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + clmul x20, x16, x11 # perform operation +80002814: 0ab81a33 clmul x20,x16,x11 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002818: 0001a203 lw x4,0(x3) +8000281c: 01420863 beq x4,x20,8000282c +80002820: 4e1022ef jal x5,80005500 +80002824: 80002814 .word 0x80002814 +80002828: 8000d04c .word 0x8000d04c +8000282c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5bbc8872 +80002830: 00052a03 lw x20,0(x10) +80002834: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000002 +80002838: 00052603 lw x12,0(x10) +8000283c: 00450513 addi x10,x10,4 + +80002840 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + clmul x14, x20, x12 # perform operation +80002840: 0aca1733 clmul x14,x20,x12 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002844: 0001a203 lw x4,0(x3) +80002848: 00e20863 beq x4,x14,80002858 +8000284c: 4b5022ef jal x5,80005500 +80002850: 80002840 .word 0x80002840 +80002854: 8000d0a5 .word 0x8000d0a5 +80002858: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc8872 +8000285c: 00052e03 lw x28,0(x10) +80002860: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x80000000 +80002864: 00052a83 lw x21,0(x10) +80002868: 00450513 addi x10,x10,4 + +8000286c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + clmul x12, x28, x21 # perform operation +8000286c: 0b5e1633 clmul x12,x28,x21 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002870: 0001a203 lw x4,0(x3) +80002874: 00c20863 beq x4,x12,80002884 +80002878: 489022ef jal x5,80005500 +8000287c: 8000286c .word 0x8000286c +80002880: 8000d0fe .word 0x8000d0fe +80002884: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5bbc8872 +80002888: 00052783 lw x15,0(x10) +8000288c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x80000001 +80002890: 00052383 lw x7,0(x10) +80002894: 00450513 addi x10,x10,4 + +80002898 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + clmul x25, x15, x7 # perform operation +80002898: 0a779cb3 clmul x25,x15,x7 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000289c: 0001a203 lw x4,0(x3) +800028a0: 01920863 beq x4,x25,800028b0 +800028a4: 45d022ef jal x5,80005500 +800028a8: 80002898 .word 0x80002898 +800028ac: 8000d15e .word 0x8000d15e +800028b0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc8872 +800028b4: 00052b83 lw x23,0(x10) +800028b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7fffffff +800028bc: 00052d03 lw x26,0(x10) +800028c0: 00450513 addi x10,x10,4 + +800028c4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + clmul x1, x23, x26 # perform operation +800028c4: 0bab90b3 clmul x1,x23,x26 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c8: 0001a203 lw x4,0(x3) +800028cc: 00120863 beq x4,x1,800028dc +800028d0: 431022ef jal x5,80005500 +800028d4: 800028c4 .word 0x800028c4 +800028d8: 8000d1be .word 0x8000d1be +800028dc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5bbc8872 +800028e0: 00052483 lw x9,0(x10) +800028e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7ffffffe +800028e8: 00052083 lw x1,0(x10) +800028ec: 00450513 addi x10,x10,4 + +800028f0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + clmul x18, x9, x1 # perform operation +800028f0: 0a149933 clmul x18,x9,x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f4: 0001a203 lw x4,0(x3) +800028f8: 01220863 beq x4,x18,80002908 +800028fc: 405022ef jal x5,80005500 +80002900: 800028f0 .word 0x800028f0 +80002904: 8000d21e .word 0x8000d21e +80002908: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5bbc8872 +8000290c: 00052a83 lw x21,0(x10) +80002910: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xffffffff +80002914: 00052f83 lw x31,0(x10) +80002918: 00450513 addi x10,x10,4 + +8000291c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + clmul x12, x21, x31 # perform operation +8000291c: 0bfa9633 clmul x12,x21,x31 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002920: 0001a203 lw x4,0(x3) +80002924: 00c20863 beq x4,x12,80002934 +80002928: 3d9022ef jal x5,80005500 +8000292c: 8000291c .word 0x8000291c +80002930: 8000d27e .word 0x8000d27e +80002934: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5bbc8872 +80002938: 00052783 lw x15,0(x10) +8000293c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xfffffffe +80002940: 00052603 lw x12,0(x10) +80002944: 00450513 addi x10,x10,4 + +80002948 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + clmul x25, x15, x12 # perform operation +80002948: 0ac79cb3 clmul x25,x15,x12 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000294c: 0001a203 lw x4,0(x3) +80002950: 01920863 beq x4,x25,80002960 +80002954: 3ad022ef jal x5,80005500 +80002958: 80002948 .word 0x80002948 +8000295c: 8000d2de .word 0x8000d2de +80002960: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5bbc8872 +80002964: 00052403 lw x8,0(x10) +80002968: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5bbc8872 +8000296c: 00052d03 lw x26,0(x10) +80002970: 00450513 addi x10,x10,4 + +80002974 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + clmul x30, x8, x26 # perform operation +80002974: 0ba41f33 clmul x30,x8,x26 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002978: 0001a203 lw x4,0(x3) +8000297c: 01e20863 beq x4,x30,8000298c +80002980: 381022ef jal x5,80005500 +80002984: 80002974 .word 0x80002974 +80002988: 8000d33e .word 0x8000d33e +8000298c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5bbc8872 +80002990: 00052c03 lw x24,0(x10) +80002994: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xaaaaaaaa +80002998: 00052883 lw x17,0(x10) +8000299c: 00450513 addi x10,x10,4 + +800029a0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + clmul x13, x24, x17 # perform operation +800029a0: 0b1c16b3 clmul x13,x24,x17 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a4: 0001a203 lw x4,0(x3) +800029a8: 00d20863 beq x4,x13,800029b8 +800029ac: 355022ef jal x5,80005500 +800029b0: 800029a0 .word 0x800029a0 +800029b4: 8000d39e .word 0x8000d39e +800029b8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5bbc8872 +800029bc: 00052c83 lw x25,0(x10) +800029c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x55555555 +800029c4: 00052803 lw x16,0(x10) +800029c8: 00450513 addi x10,x10,4 + +800029cc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + clmul x20, x25, x16 # perform operation +800029cc: 0b0c9a33 clmul x20,x25,x16 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d0: 0001a203 lw x4,0(x3) +800029d4: 01420863 beq x4,x20,800029e4 +800029d8: 329022ef jal x5,80005500 +800029dc: 800029cc .word 0x800029cc +800029e0: 8000d3fe .word 0x8000d3fe +800029e4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xaaaaaaaa +800029e8: 00052383 lw x7,0(x10) +800029ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000 +800029f0: 00052f83 lw x31,0(x10) +800029f4: 00450513 addi x10,x10,4 + +800029f8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + clmul x11, x7, x31 # perform operation +800029f8: 0bf395b3 clmul x11,x7,x31 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029fc: 0001a203 lw x4,0(x3) +80002a00: 00b20863 beq x4,x11,80002a10 +80002a04: 2fd022ef jal x5,80005500 +80002a08: 800029f8 .word 0x800029f8 +80002a0c: 8000d45e .word 0x8000d45e +80002a10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xaaaaaaaa +80002a14: 00052e83 lw x29,0(x10) +80002a18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000001 +80002a1c: 00052483 lw x9,0(x10) +80002a20: 00450513 addi x10,x10,4 + +80002a24 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + clmul x12, x29, x9 # perform operation +80002a24: 0a9e9633 clmul x12,x29,x9 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a28: 0001a203 lw x4,0(x3) +80002a2c: 00c20863 beq x4,x12,80002a3c +80002a30: 2d1022ef jal x5,80005500 +80002a34: 80002a24 .word 0x80002a24 +80002a38: 8000d4b7 .word 0x8000d4b7 +80002a3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xaaaaaaaa +80002a40: 00052403 lw x8,0(x10) +80002a44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000002 +80002a48: 00052683 lw x13,0(x10) +80002a4c: 00450513 addi x10,x10,4 + +80002a50 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + clmul x11, x8, x13 # perform operation +80002a50: 0ad415b3 clmul x11,x8,x13 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a54: 0001a203 lw x4,0(x3) +80002a58: 00b20863 beq x4,x11,80002a68 +80002a5c: 2a5022ef jal x5,80005500 +80002a60: 80002a50 .word 0x80002a50 +80002a64: 8000d510 .word 0x8000d510 +80002a68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xaaaaaaaa +80002a6c: 00052583 lw x11,0(x10) +80002a70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x80000000 +80002a74: 00052c83 lw x25,0(x10) +80002a78: 00450513 addi x10,x10,4 + +80002a7c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + clmul x17, x11, x25 # perform operation +80002a7c: 0b9598b3 clmul x17,x11,x25 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a80: 0001a203 lw x4,0(x3) +80002a84: 01120863 beq x4,x17,80002a94 +80002a88: 279022ef jal x5,80005500 +80002a8c: 80002a7c .word 0x80002a7c +80002a90: 8000d569 .word 0x8000d569 +80002a94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xaaaaaaaa +80002a98: 00052b83 lw x23,0(x10) +80002a9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x80000001 +80002aa0: 00052703 lw x14,0(x10) +80002aa4: 00450513 addi x10,x10,4 + +80002aa8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + clmul x12, x23, x14 # perform operation +80002aa8: 0aeb9633 clmul x12,x23,x14 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aac: 0001a203 lw x4,0(x3) +80002ab0: 00c20863 beq x4,x12,80002ac0 +80002ab4: 24d022ef jal x5,80005500 +80002ab8: 80002aa8 .word 0x80002aa8 +80002abc: 8000d5c9 .word 0x8000d5c9 +80002ac0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xaaaaaaaa +80002ac4: 00052983 lw x19,0(x10) +80002ac8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7fffffff +80002acc: 00052e83 lw x29,0(x10) +80002ad0: 00450513 addi x10,x10,4 + +80002ad4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + clmul x2, x19, x29 # perform operation +80002ad4: 0bd99133 clmul x2,x19,x29 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad8: 0001a203 lw x4,0(x3) +80002adc: 00220863 beq x4,x2,80002aec +80002ae0: 221022ef jal x5,80005500 +80002ae4: 80002ad4 .word 0x80002ad4 +80002ae8: 8000d629 .word 0x8000d629 +80002aec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xaaaaaaaa +80002af0: 00052583 lw x11,0(x10) +80002af4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x7ffffffe +80002af8: 00052603 lw x12,0(x10) +80002afc: 00450513 addi x10,x10,4 + +80002b00 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + clmul x23, x11, x12 # perform operation +80002b00: 0ac59bb3 clmul x23,x11,x12 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b04: 0001a203 lw x4,0(x3) +80002b08: 01720863 beq x4,x23,80002b18 +80002b0c: 1f5022ef jal x5,80005500 +80002b10: 80002b00 .word 0x80002b00 +80002b14: 8000d689 .word 0x8000d689 +80002b18: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xaaaaaaaa +80002b1c: 00052603 lw x12,0(x10) +80002b20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffff +80002b24: 00052b83 lw x23,0(x10) +80002b28: 00450513 addi x10,x10,4 + +80002b2c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + clmul x26, x12, x23 # perform operation +80002b2c: 0b761d33 clmul x26,x12,x23 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b30: 0001a203 lw x4,0(x3) +80002b34: 01a20863 beq x4,x26,80002b44 +80002b38: 1c9022ef jal x5,80005500 +80002b3c: 80002b2c .word 0x80002b2c +80002b40: 8000d6e9 .word 0x8000d6e9 +80002b44: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xaaaaaaaa +80002b48: 00052d03 lw x26,0(x10) +80002b4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xfffffffe +80002b50: 00052403 lw x8,0(x10) +80002b54: 00450513 addi x10,x10,4 + +80002b58 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + clmul x9, x26, x8 # perform operation +80002b58: 0a8d14b3 clmul x9,x26,x8 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b5c: 0001a203 lw x4,0(x3) +80002b60: 00920863 beq x4,x9,80002b70 +80002b64: 19d022ef jal x5,80005500 +80002b68: 80002b58 .word 0x80002b58 +80002b6c: 8000d749 .word 0x8000d749 +80002b70: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xaaaaaaaa +80002b74: 00052583 lw x11,0(x10) +80002b78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5bbc8872 +80002b7c: 00052983 lw x19,0(x10) +80002b80: 00450513 addi x10,x10,4 + +80002b84 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + clmul x18, x11, x19 # perform operation +80002b84: 0b359933 clmul x18,x11,x19 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b88: 0001a203 lw x4,0(x3) +80002b8c: 01220863 beq x4,x18,80002b9c +80002b90: 171022ef jal x5,80005500 +80002b94: 80002b84 .word 0x80002b84 +80002b98: 8000d7a9 .word 0x8000d7a9 +80002b9c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xaaaaaaaa +80002ba0: 00052103 lw x2,0(x10) +80002ba4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xaaaaaaaa +80002ba8: 00052d03 lw x26,0(x10) +80002bac: 00450513 addi x10,x10,4 + +80002bb0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + clmul x13, x2, x26 # perform operation +80002bb0: 0ba116b3 clmul x13,x2,x26 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb4: 0001a203 lw x4,0(x3) +80002bb8: 00d20863 beq x4,x13,80002bc8 +80002bbc: 145022ef jal x5,80005500 +80002bc0: 80002bb0 .word 0x80002bb0 +80002bc4: 8000d809 .word 0x8000d809 +80002bc8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaa +80002bcc: 00052e03 lw x28,0(x10) +80002bd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x55555555 +80002bd4: 00052a83 lw x21,0(x10) +80002bd8: 00450513 addi x10,x10,4 + +80002bdc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + clmul x7, x28, x21 # perform operation +80002bdc: 0b5e13b3 clmul x7,x28,x21 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be0: 0001a203 lw x4,0(x3) +80002be4: 00720863 beq x4,x7,80002bf4 +80002be8: 119022ef jal x5,80005500 +80002bec: 80002bdc .word 0x80002bdc +80002bf0: 8000d869 .word 0x8000d869 +80002bf4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x55555555 +80002bf8: 00052683 lw x13,0(x10) +80002bfc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000 +80002c00: 00052c83 lw x25,0(x10) +80002c04: 00450513 addi x10,x10,4 + +80002c08 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + clmul x22, x13, x25 # perform operation +80002c08: 0b969b33 clmul x22,x13,x25 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c0c: 0001a203 lw x4,0(x3) +80002c10: 01620863 beq x4,x22,80002c20 +80002c14: 0ed022ef jal x5,80005500 +80002c18: 80002c08 .word 0x80002c08 +80002c1c: 8000d8c9 .word 0x8000d8c9 +80002c20: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x55555555 +80002c24: 00052603 lw x12,0(x10) +80002c28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000001 +80002c2c: 00052703 lw x14,0(x10) +80002c30: 00450513 addi x10,x10,4 + +80002c34 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + clmul x25, x12, x14 # perform operation +80002c34: 0ae61cb3 clmul x25,x12,x14 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c38: 0001a203 lw x4,0(x3) +80002c3c: 01920863 beq x4,x25,80002c4c +80002c40: 0c1022ef jal x5,80005500 +80002c44: 80002c34 .word 0x80002c34 +80002c48: 8000d922 .word 0x8000d922 +80002c4c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x55555555 +80002c50: 00052c03 lw x24,0(x10) +80002c54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000002 +80002c58: 00052103 lw x2,0(x10) +80002c5c: 00450513 addi x10,x10,4 + +80002c60 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + clmul x16, x24, x2 # perform operation +80002c60: 0a2c1833 clmul x16,x24,x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c64: 0001a203 lw x4,0(x3) +80002c68: 01020863 beq x4,x16,80002c78 +80002c6c: 095022ef jal x5,80005500 +80002c70: 80002c60 .word 0x80002c60 +80002c74: 8000d97b .word 0x8000d97b +80002c78: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x55555555 +80002c7c: 00052e83 lw x29,0(x10) +80002c80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x80000000 +80002c84: 00052a83 lw x21,0(x10) +80002c88: 00450513 addi x10,x10,4 + +80002c8c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + clmul x13, x29, x21 # perform operation +80002c8c: 0b5e96b3 clmul x13,x29,x21 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c90: 0001a203 lw x4,0(x3) +80002c94: 00d20863 beq x4,x13,80002ca4 +80002c98: 069022ef jal x5,80005500 +80002c9c: 80002c8c .word 0x80002c8c +80002ca0: 8000d9d4 .word 0x8000d9d4 +80002ca4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x55555555 +80002ca8: 00052883 lw x17,0(x10) +80002cac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x80000001 +80002cb0: 00052103 lw x2,0(x10) +80002cb4: 00450513 addi x10,x10,4 + +80002cb8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + clmul x9, x17, x2 # perform operation +80002cb8: 0a2894b3 clmul x9,x17,x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cbc: 0001a203 lw x4,0(x3) +80002cc0: 00920863 beq x4,x9,80002cd0 +80002cc4: 03d022ef jal x5,80005500 +80002cc8: 80002cb8 .word 0x80002cb8 +80002ccc: 8000da34 .word 0x8000da34 +80002cd0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x55555555 +80002cd4: 00052d83 lw x27,0(x10) +80002cd8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7fffffff +80002cdc: 00052b03 lw x22,0(x10) +80002ce0: 00450513 addi x10,x10,4 + +80002ce4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + clmul x14, x27, x22 # perform operation +80002ce4: 0b6d9733 clmul x14,x27,x22 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce8: 0001a203 lw x4,0(x3) +80002cec: 00e20863 beq x4,x14,80002cfc +80002cf0: 011022ef jal x5,80005500 +80002cf4: 80002ce4 .word 0x80002ce4 +80002cf8: 8000da94 .word 0x8000da94 +80002cfc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x55555555 +80002d00: 00052c03 lw x24,0(x10) +80002d04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffe +80002d08: 00052683 lw x13,0(x10) +80002d0c: 00450513 addi x10,x10,4 + +80002d10 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + clmul x17, x24, x13 # perform operation +80002d10: 0adc18b3 clmul x17,x24,x13 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d14: 0001a203 lw x4,0(x3) +80002d18: 01120863 beq x4,x17,80002d28 +80002d1c: 7e4022ef jal x5,80005500 +80002d20: 80002d10 .word 0x80002d10 +80002d24: 8000daf4 .word 0x8000daf4 +80002d28: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x55555555 +80002d2c: 00052903 lw x18,0(x10) +80002d30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xffffffff +80002d34: 00052103 lw x2,0(x10) +80002d38: 00450513 addi x10,x10,4 + +80002d3c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + clmul x9, x18, x2 # perform operation +80002d3c: 0a2914b3 clmul x9,x18,x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d40: 0001a203 lw x4,0(x3) +80002d44: 00920863 beq x4,x9,80002d54 +80002d48: 7b8022ef jal x5,80005500 +80002d4c: 80002d3c .word 0x80002d3c +80002d50: 8000db54 .word 0x8000db54 +80002d54: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x55555555 +80002d58: 00052783 lw x15,0(x10) +80002d5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xfffffffe +80002d60: 00052e03 lw x28,0(x10) +80002d64: 00450513 addi x10,x10,4 + +80002d68 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + clmul x12, x15, x28 # perform operation +80002d68: 0bc79633 clmul x12,x15,x28 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d6c: 0001a203 lw x4,0(x3) +80002d70: 00c20863 beq x4,x12,80002d80 +80002d74: 78c022ef jal x5,80005500 +80002d78: 80002d68 .word 0x80002d68 +80002d7c: 8000dbb4 .word 0x8000dbb4 +80002d80: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x55555555 +80002d84: 00052583 lw x11,0(x10) +80002d88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5bbc8872 +80002d8c: 00052903 lw x18,0(x10) +80002d90: 00450513 addi x10,x10,4 + +80002d94 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + clmul x15, x11, x18 # perform operation +80002d94: 0b2597b3 clmul x15,x11,x18 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d98: 0001a203 lw x4,0(x3) +80002d9c: 00f20863 beq x4,x15,80002dac +80002da0: 760022ef jal x5,80005500 +80002da4: 80002d94 .word 0x80002d94 +80002da8: 8000dc14 .word 0x8000dc14 +80002dac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x55555555 +80002db0: 00052703 lw x14,0(x10) +80002db4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xaaaaaaaa +80002db8: 00052903 lw x18,0(x10) +80002dbc: 00450513 addi x10,x10,4 + +80002dc0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + clmul x9, x14, x18 # perform operation +80002dc0: 0b2714b3 clmul x9,x14,x18 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc4: 0001a203 lw x4,0(x3) +80002dc8: 00920863 beq x4,x9,80002dd8 +80002dcc: 734022ef jal x5,80005500 +80002dd0: 80002dc0 .word 0x80002dc0 +80002dd4: 8000dc74 .word 0x8000dc74 +80002dd8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x55555555 +80002ddc: 00052c03 lw x24,0(x10) +80002de0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x55555555 +80002de4: 00052b03 lw x22,0(x10) +80002de8: 00450513 addi x10,x10,4 + +80002dec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + clmul x8, x24, x22 # perform operation +80002dec: 0b6c1433 clmul x8,x24,x22 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df0: 0001a203 lw x4,0(x3) +80002df4: 00820863 beq x4,x8,80002e04 +80002df8: 708022ef jal x5,80005500 +80002dfc: 80002dec .word 0x80002dec +80002e00: 8000dcd4 .word 0x8000dcd4 +80002e04: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x81476a32 +80002e08: 00052003 lw x0,0(x10) +80002e0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x3d778d84 +80002e10: 00052003 lw x0,0(x10) +80002e14: 00450513 addi x10,x10,4 + +80002e18 : +Zbkc_clmul_cg_cmp_rs1_rs2_b0: + clmul x13, x0, x0 # perform operation +80002e18: 0a0016b3 clmul x13,x0,x0 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmul_cg_cmp_rs1_rs2_b0, Zbkc_clmul_cg_cmp_rs1_rs2_b0_str) +80002e1c: 0001a203 lw x4,0(x3) +80002e20: 00d20863 beq x4,x13,80002e30 +80002e24: 6dc022ef jal x5,80005500 +80002e28: 80002e18 .word 0x80002e18 +80002e2c: 8000dd34 .word 0x8000dd34 +80002e30: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xb2b00b12 +80002e34: 00052083 lw x1,0(x10) +80002e38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x234b4635 +80002e3c: 00052083 lw x1,0(x10) +80002e40: 00450513 addi x10,x10,4 + +80002e44 : +Zbkc_clmul_cg_cmp_rs1_rs2_b1: + clmul x7, x1, x1 # perform operation +80002e44: 0a1093b3 clmul x7,x1,x1 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkc_clmul_cg_cmp_rs1_rs2_b1, Zbkc_clmul_cg_cmp_rs1_rs2_b1_str) +80002e48: 0001a203 lw x4,0(x3) +80002e4c: 00720863 beq x4,x7,80002e5c +80002e50: 6b0022ef jal x5,80005500 +80002e54: 80002e44 .word 0x80002e44 +80002e58: 8000dd6d .word 0x8000dd6d +80002e5c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x461bd6e1 +80002e60: 00052103 lw x2,0(x10) +80002e64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x45b87ae7 +80002e68: 00052103 lw x2,0(x10) +80002e6c: 00450513 addi x10,x10,4 + +80002e70 : +Zbkc_clmul_cg_cmp_rs1_rs2_b2: + clmul x24, x2, x2 # perform operation +80002e70: 0a211c33 clmul x24,x2,x2 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkc_clmul_cg_cmp_rs1_rs2_b2, Zbkc_clmul_cg_cmp_rs1_rs2_b2_str) +80002e74: 0001a203 lw x4,0(x3) +80002e78: 01820863 beq x4,x24,80002e88 +80002e7c: 684022ef jal x5,80005500 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 8000dda6 .word 0x8000dda6 +80002e88: 00418193 addi x3,x3,4 + + mv x16, x3 # switch signature pointer register to avoid conflict with test +80002e8c: 00018813 addi x16,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5fbe77fd +80002e90: 00052183 lw x3,0(x10) +80002e94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xcc56cd62 +80002e98: 00052183 lw x3,0(x10) +80002e9c: 00450513 addi x10,x10,4 + +80002ea0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b3: + clmul x31, x3, x3 # perform operation +80002ea0: 0a319fb3 clmul x31,x3,x3 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkc_clmul_cg_cmp_rs1_rs2_b3, Zbkc_clmul_cg_cmp_rs1_rs2_b3_str) +80002ea4: 00082203 lw x4,0(x16) +80002ea8: 01f20863 beq x4,x31,80002eb8 +80002eac: 654022ef jal x5,80005500 +80002eb0: 80002ea0 .word 0x80002ea0 +80002eb4: 8000dddf .word 0x8000dddf +80002eb8: 00480813 addi x16,x16,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002ebc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002ec0: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x506e2aff +80002ec4: 00052203 lw x4,0(x10) +80002ec8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xd987a6b0 +80002ecc: 00052203 lw x4,0(x10) +80002ed0: 00450513 addi x10,x10,4 + +80002ed4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b4: + clmul x18, x4, x4 # perform operation +80002ed4: 0a421933 clmul x18,x4,x4 + # Check if x18 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x18, Zbkc_clmul_cg_cmp_rs1_rs2_b4, Zbkc_clmul_cg_cmp_rs1_rs2_b4_str) +80002ed8: 00082683 lw x13,0(x16) +80002edc: 01268863 beq x13,x18,80002eec +80002ee0: 6600276f jal x14,80005540 +80002ee4: 80002ed4 .word 0x80002ed4 +80002ee8: 8000de18 .word 0x8000de18 +80002eec: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x7da7a70e +80002ef0: 00052283 lw x5,0(x10) +80002ef4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xfe35f508 +80002ef8: 00052283 lw x5,0(x10) +80002efc: 00450513 addi x10,x10,4 + +80002f00 : +Zbkc_clmul_cg_cmp_rs1_rs2_b5: + clmul x12, x5, x5 # perform operation +80002f00: 0a529633 clmul x12,x5,x5 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zbkc_clmul_cg_cmp_rs1_rs2_b5, Zbkc_clmul_cg_cmp_rs1_rs2_b5_str) +80002f04: 00082683 lw x13,0(x16) +80002f08: 00c68863 beq x13,x12,80002f18 +80002f0c: 6340276f jal x14,80005540 +80002f10: 80002f00 .word 0x80002f00 +80002f14: 8000de51 .word 0x8000de51 +80002f18: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x2b0f607f +80002f1c: 00052303 lw x6,0(x10) +80002f20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x95e8dde1 +80002f24: 00052303 lw x6,0(x10) +80002f28: 00450513 addi x10,x10,4 + +80002f2c : +Zbkc_clmul_cg_cmp_rs1_rs2_b6: + clmul x5, x6, x6 # perform operation +80002f2c: 0a6312b3 clmul x5,x6,x6 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zbkc_clmul_cg_cmp_rs1_rs2_b6, Zbkc_clmul_cg_cmp_rs1_rs2_b6_str) +80002f30: 00082683 lw x13,0(x16) +80002f34: 00568863 beq x13,x5,80002f44 +80002f38: 6080276f jal x14,80005540 +80002f3c: 80002f2c .word 0x80002f2c +80002f40: 8000de8a .word 0x8000de8a +80002f44: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x6caf6a4c +80002f48: 00052383 lw x7,0(x10) +80002f4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x745e343f +80002f50: 00052383 lw x7,0(x10) +80002f54: 00450513 addi x10,x10,4 + +80002f58 : +Zbkc_clmul_cg_cmp_rs1_rs2_b7: + clmul x27, x7, x7 # perform operation +80002f58: 0a739db3 clmul x27,x7,x7 + # Check if x27 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x27, Zbkc_clmul_cg_cmp_rs1_rs2_b7, Zbkc_clmul_cg_cmp_rs1_rs2_b7_str) +80002f5c: 00082683 lw x13,0(x16) +80002f60: 01b68863 beq x13,x27,80002f70 +80002f64: 5dc0276f jal x14,80005540 +80002f68: 80002f58 .word 0x80002f58 +80002f6c: 8000dec3 .word 0x8000dec3 +80002f70: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xd13954f5 +80002f74: 00052403 lw x8,0(x10) +80002f78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x302967ea +80002f7c: 00052403 lw x8,0(x10) +80002f80: 00450513 addi x10,x10,4 + +80002f84 : +Zbkc_clmul_cg_cmp_rs1_rs2_b8: + clmul x24, x8, x8 # perform operation +80002f84: 0a841c33 clmul x24,x8,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x24, Zbkc_clmul_cg_cmp_rs1_rs2_b8, Zbkc_clmul_cg_cmp_rs1_rs2_b8_str) +80002f88: 00082683 lw x13,0(x16) +80002f8c: 01868863 beq x13,x24,80002f9c +80002f90: 5b00276f jal x14,80005540 +80002f94: 80002f84 .word 0x80002f84 +80002f98: 8000defc .word 0x8000defc +80002f9c: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x916412df +80002fa0: 00052483 lw x9,0(x10) +80002fa4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x9d49a6ff +80002fa8: 00052483 lw x9,0(x10) +80002fac: 00450513 addi x10,x10,4 + +80002fb0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b9: + clmul x30, x9, x9 # perform operation +80002fb0: 0a949f33 clmul x30,x9,x9 + # Check if x30 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x30, Zbkc_clmul_cg_cmp_rs1_rs2_b9, Zbkc_clmul_cg_cmp_rs1_rs2_b9_str) +80002fb4: 00082683 lw x13,0(x16) +80002fb8: 01e68863 beq x13,x30,80002fc8 +80002fbc: 5840276f jal x14,80005540 +80002fc0: 80002fb0 .word 0x80002fb0 +80002fc4: 8000df35 .word 0x8000df35 +80002fc8: 00480813 addi x16,x16,4 + + mv x11, x10 # switch data pointer register to avoid conflict with test +80002fcc: 00050593 addi x11,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x2b80c7cc +80002fd0: 0005a503 lw x10,0(x11) +80002fd4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x7148a22a +80002fd8: 0005a503 lw x10,0(x11) +80002fdc: 00458593 addi x11,x11,4 + +80002fe0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b10: + clmul x2, x10, x10 # perform operation +80002fe0: 0aa51133 clmul x2,x10,x10 + # Check if x2 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x2, Zbkc_clmul_cg_cmp_rs1_rs2_b10, Zbkc_clmul_cg_cmp_rs1_rs2_b10_str) +80002fe4: 00082683 lw x13,0(x16) +80002fe8: 00268863 beq x13,x2,80002ff8 +80002fec: 5540276f jal x14,80005540 +80002ff0: 80002fe0 .word 0x80002fe0 +80002ff4: 8000df6e .word 0x8000df6e +80002ff8: 00480813 addi x16,x16,4 + + mv x27, x11 # switch data pointer register to avoid conflict with test +80002ffc: 00058d93 addi x27,x11,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x25de19bd +80003000: 000da583 lw x11,0(x27) +80003004: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x3dc478e3 +80003008: 000da583 lw x11,0(x27) +8000300c: 004d8d93 addi x27,x27,4 + +80003010 : +Zbkc_clmul_cg_cmp_rs1_rs2_b11: + clmul x23, x11, x11 # perform operation +80003010: 0ab59bb3 clmul x23,x11,x11 + # Check if x23 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x23, Zbkc_clmul_cg_cmp_rs1_rs2_b11, Zbkc_clmul_cg_cmp_rs1_rs2_b11_str) +80003014: 00082683 lw x13,0(x16) +80003018: 01768863 beq x13,x23,80003028 +8000301c: 5240276f jal x14,80005540 +80003020: 80003010 .word 0x80003010 +80003024: 8000dfa8 .word 0x8000dfa8 +80003028: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xd8077f71 +8000302c: 000da603 lw x12,0(x27) +80003030: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x163d3776 +80003034: 000da603 lw x12,0(x27) +80003038: 004d8d93 addi x27,x27,4 + +8000303c : +Zbkc_clmul_cg_cmp_rs1_rs2_b12: + clmul x25, x12, x12 # perform operation +8000303c: 0ac61cb3 clmul x25,x12,x12 + # Check if x25 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b12, Zbkc_clmul_cg_cmp_rs1_rs2_b12_str) +80003040: 00082683 lw x13,0(x16) +80003044: 01968863 beq x13,x25,80003054 +80003048: 4f80276f jal x14,80005540 +8000304c: 8000303c .word 0x8000303c +80003050: 8000dfe2 .word 0x8000dfe2 +80003054: 00480813 addi x16,x16,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003058: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000305c: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x869dd306 +80003060: 000da683 lw x13,0(x27) +80003064: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xbf2a5ed9 +80003068: 000da683 lw x13,0(x27) +8000306c: 004d8d93 addi x27,x27,4 + +80003070 : +Zbkc_clmul_cg_cmp_rs1_rs2_b13: + clmul x28, x13, x13 # perform operation +80003070: 0ad69e33 clmul x28,x13,x13 + # Check if x28 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x28, Zbkc_clmul_cg_cmp_rs1_rs2_b13, Zbkc_clmul_cg_cmp_rs1_rs2_b13_str) +80003074: 00082383 lw x7,0(x16) +80003078: 01c38863 beq x7,x28,80003088 +8000307c: 49c0246f jal x8,80005518 +80003080: 80003070 .word 0x80003070 +80003084: 8000e01c .word 0x8000e01c +80003088: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x7b4ab52b +8000308c: 000da703 lw x14,0(x27) +80003090: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x36192361 +80003094: 000da703 lw x14,0(x27) +80003098: 004d8d93 addi x27,x27,4 + +8000309c : +Zbkc_clmul_cg_cmp_rs1_rs2_b14: + clmul x11, x14, x14 # perform operation +8000309c: 0ae715b3 clmul x11,x14,x14 + # Check if x11 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x11, Zbkc_clmul_cg_cmp_rs1_rs2_b14, Zbkc_clmul_cg_cmp_rs1_rs2_b14_str) +800030a0: 00082383 lw x7,0(x16) +800030a4: 00b38863 beq x7,x11,800030b4 +800030a8: 4700246f jal x8,80005518 +800030ac: 8000309c .word 0x8000309c +800030b0: 8000e056 .word 0x8000e056 +800030b4: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x241ff5c9 +800030b8: 000da783 lw x15,0(x27) +800030bc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x7875b30a +800030c0: 000da783 lw x15,0(x27) +800030c4: 004d8d93 addi x27,x27,4 + +800030c8 : +Zbkc_clmul_cg_cmp_rs1_rs2_b15: + clmul x31, x15, x15 # perform operation +800030c8: 0af79fb3 clmul x31,x15,x15 + # Check if x31 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x31, Zbkc_clmul_cg_cmp_rs1_rs2_b15, Zbkc_clmul_cg_cmp_rs1_rs2_b15_str) +800030cc: 00082383 lw x7,0(x16) +800030d0: 01f38863 beq x7,x31,800030e0 +800030d4: 4440246f jal x8,80005518 +800030d8: 800030c8 .word 0x800030c8 +800030dc: 8000e090 .word 0x8000e090 +800030e0: 00480813 addi x16,x16,4 + + mv x9, x16 # switch signature pointer register to avoid conflict with test +800030e4: 00080493 addi x9,x16,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x3cffbb56 +800030e8: 000da803 lw x16,0(x27) +800030ec: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0xcf229522 +800030f0: 000da803 lw x16,0(x27) +800030f4: 004d8d93 addi x27,x27,4 + +800030f8 : +Zbkc_clmul_cg_cmp_rs1_rs2_b16: + clmul x25, x16, x16 # perform operation +800030f8: 0b081cb3 clmul x25,x16,x16 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b16, Zbkc_clmul_cg_cmp_rs1_rs2_b16_str) +800030fc: 0004a383 lw x7,0(x9) +80003100: 01938863 beq x7,x25,80003110 +80003104: 4140246f jal x8,80005518 +80003108: 800030f8 .word 0x800030f8 +8000310c: 8000e0ca .word 0x8000e0ca +80003110: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xcfce4e20 +80003114: 000da883 lw x17,0(x27) +80003118: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x1d9a192e +8000311c: 000da883 lw x17,0(x27) +80003120: 004d8d93 addi x27,x27,4 + +80003124 : +Zbkc_clmul_cg_cmp_rs1_rs2_b17: + clmul x25, x17, x17 # perform operation +80003124: 0b189cb3 clmul x25,x17,x17 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b17, Zbkc_clmul_cg_cmp_rs1_rs2_b17_str) +80003128: 0004a383 lw x7,0(x9) +8000312c: 01938863 beq x7,x25,8000313c +80003130: 3e80246f jal x8,80005518 +80003134: 80003124 .word 0x80003124 +80003138: 8000e104 .word 0x8000e104 +8000313c: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x72d88126 +80003140: 000da903 lw x18,0(x27) +80003144: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x91141f2f +80003148: 000da903 lw x18,0(x27) +8000314c: 004d8d93 addi x27,x27,4 + +80003150 : +Zbkc_clmul_cg_cmp_rs1_rs2_b18: + clmul x13, x18, x18 # perform operation +80003150: 0b2916b3 clmul x13,x18,x18 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkc_clmul_cg_cmp_rs1_rs2_b18, Zbkc_clmul_cg_cmp_rs1_rs2_b18_str) +80003154: 0004a383 lw x7,0(x9) +80003158: 00d38863 beq x7,x13,80003168 +8000315c: 3bc0246f jal x8,80005518 +80003160: 80003150 .word 0x80003150 +80003164: 8000e13e .word 0x8000e13e +80003168: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x70c7bb10 +8000316c: 000da983 lw x19,0(x27) +80003170: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0x5469f0c3 +80003174: 000da983 lw x19,0(x27) +80003178: 004d8d93 addi x27,x27,4 + +8000317c : +Zbkc_clmul_cg_cmp_rs1_rs2_b19: + clmul x21, x19, x19 # perform operation +8000317c: 0b399ab3 clmul x21,x19,x19 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkc_clmul_cg_cmp_rs1_rs2_b19, Zbkc_clmul_cg_cmp_rs1_rs2_b19_str) +80003180: 0004a383 lw x7,0(x9) +80003184: 01538863 beq x7,x21,80003194 +80003188: 3900246f jal x8,80005518 +8000318c: 8000317c .word 0x8000317c +80003190: 8000e178 .word 0x8000e178 +80003194: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x5ebf77ea +80003198: 000daa03 lw x20,0(x27) +8000319c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xf4f651e7 +800031a0: 000daa03 lw x20,0(x27) +800031a4: 004d8d93 addi x27,x27,4 + +800031a8 : +Zbkc_clmul_cg_cmp_rs1_rs2_b20: + clmul x29, x20, x20 # perform operation +800031a8: 0b4a1eb3 clmul x29,x20,x20 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkc_clmul_cg_cmp_rs1_rs2_b20, Zbkc_clmul_cg_cmp_rs1_rs2_b20_str) +800031ac: 0004a383 lw x7,0(x9) +800031b0: 01d38863 beq x7,x29,800031c0 +800031b4: 3640246f jal x8,80005518 +800031b8: 800031a8 .word 0x800031a8 +800031bc: 8000e1b2 .word 0x8000e1b2 +800031c0: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xd42db4aa +800031c4: 000daa83 lw x21,0(x27) +800031c8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xea93d8d3 +800031cc: 000daa83 lw x21,0(x27) +800031d0: 004d8d93 addi x27,x27,4 + +800031d4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b21: + clmul x6, x21, x21 # perform operation +800031d4: 0b5a9333 clmul x6,x21,x21 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkc_clmul_cg_cmp_rs1_rs2_b21, Zbkc_clmul_cg_cmp_rs1_rs2_b21_str) +800031d8: 0004a383 lw x7,0(x9) +800031dc: 00638863 beq x7,x6,800031ec +800031e0: 3380246f jal x8,80005518 +800031e4: 800031d4 .word 0x800031d4 +800031e8: 8000e1ec .word 0x8000e1ec +800031ec: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x8a55cfb3 +800031f0: 000dab03 lw x22,0(x27) +800031f4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xc2854207 +800031f8: 000dab03 lw x22,0(x27) +800031fc: 004d8d93 addi x27,x27,4 + +80003200 : +Zbkc_clmul_cg_cmp_rs1_rs2_b22: + clmul x1, x22, x22 # perform operation +80003200: 0b6b10b3 clmul x1,x22,x22 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkc_clmul_cg_cmp_rs1_rs2_b22, Zbkc_clmul_cg_cmp_rs1_rs2_b22_str) +80003204: 0004a383 lw x7,0(x9) +80003208: 00138863 beq x7,x1,80003218 +8000320c: 30c0246f jal x8,80005518 +80003210: 80003200 .word 0x80003200 +80003214: 8000e226 .word 0x8000e226 +80003218: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x99655032 +8000321c: 000dab83 lw x23,0(x27) +80003220: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x3f69c050 +80003224: 000dab83 lw x23,0(x27) +80003228: 004d8d93 addi x27,x27,4 + +8000322c : +Zbkc_clmul_cg_cmp_rs1_rs2_b23: + clmul x25, x23, x23 # perform operation +8000322c: 0b7b9cb3 clmul x25,x23,x23 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b23, Zbkc_clmul_cg_cmp_rs1_rs2_b23_str) +80003230: 0004a383 lw x7,0(x9) +80003234: 01938863 beq x7,x25,80003244 +80003238: 2e00246f jal x8,80005518 +8000323c: 8000322c .word 0x8000322c +80003240: 8000e260 .word 0x8000e260 +80003244: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xe470b6d2 +80003248: 000dac03 lw x24,0(x27) +8000324c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x48e0518c +80003250: 000dac03 lw x24,0(x27) +80003254: 004d8d93 addi x27,x27,4 + +80003258 : +Zbkc_clmul_cg_cmp_rs1_rs2_b24: + clmul x30, x24, x24 # perform operation +80003258: 0b8c1f33 clmul x30,x24,x24 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkc_clmul_cg_cmp_rs1_rs2_b24, Zbkc_clmul_cg_cmp_rs1_rs2_b24_str) +8000325c: 0004a383 lw x7,0(x9) +80003260: 01e38863 beq x7,x30,80003270 +80003264: 2b40246f jal x8,80005518 +80003268: 80003258 .word 0x80003258 +8000326c: 8000e29a .word 0x8000e29a +80003270: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xc1fe95ca +80003274: 000dac83 lw x25,0(x27) +80003278: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0xea98f831 +8000327c: 000dac83 lw x25,0(x27) +80003280: 004d8d93 addi x27,x27,4 + +80003284 : +Zbkc_clmul_cg_cmp_rs1_rs2_b25: + clmul x0, x25, x25 # perform operation +80003284: 0b9c9033 clmul x0,x25,x25 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zbkc_clmul_cg_cmp_rs1_rs2_b25, Zbkc_clmul_cg_cmp_rs1_rs2_b25_str) +80003288: 0004a383 lw x7,0(x9) +8000328c: 00038863 beq x7,x0,8000329c +80003290: 2880246f jal x8,80005518 +80003294: 80003284 .word 0x80003284 +80003298: 8000e2d4 .word 0x8000e2d4 +8000329c: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x9db1f74b +800032a0: 000dad03 lw x26,0(x27) +800032a4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x6b94264d +800032a8: 000dad03 lw x26,0(x27) +800032ac: 004d8d93 addi x27,x27,4 + +800032b0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b26: + clmul x0, x26, x26 # perform operation +800032b0: 0bad1033 clmul x0,x26,x26 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zbkc_clmul_cg_cmp_rs1_rs2_b26, Zbkc_clmul_cg_cmp_rs1_rs2_b26_str) +800032b4: 0004a383 lw x7,0(x9) +800032b8: 00038863 beq x7,x0,800032c8 +800032bc: 25c0246f jal x8,80005518 +800032c0: 800032b0 .word 0x800032b0 +800032c4: 8000e30e .word 0x8000e30e +800032c8: 00448493 addi x9,x9,4 + + mv x19, x27 # switch data pointer register to avoid conflict with test +800032cc: 000d8993 addi x19,x27,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0xef804875 +800032d0: 0009ad83 lw x27,0(x19) +800032d4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xf04ca59a +800032d8: 0009ad83 lw x27,0(x19) +800032dc: 00498993 addi x19,x19,4 + +800032e0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b27: + clmul x18, x27, x27 # perform operation +800032e0: 0bbd9933 clmul x18,x27,x27 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkc_clmul_cg_cmp_rs1_rs2_b27, Zbkc_clmul_cg_cmp_rs1_rs2_b27_str) +800032e4: 0004a383 lw x7,0(x9) +800032e8: 01238863 beq x7,x18,800032f8 +800032ec: 22c0246f jal x8,80005518 +800032f0: 800032e0 .word 0x800032e0 +800032f4: 8000e348 .word 0x8000e348 +800032f8: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x626c0e5d +800032fc: 0009ae03 lw x28,0(x19) +80003300: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x1b6f7108 +80003304: 0009ae03 lw x28,0(x19) +80003308: 00498993 addi x19,x19,4 + +8000330c : +Zbkc_clmul_cg_cmp_rs1_rs2_b28: + clmul x22, x28, x28 # perform operation +8000330c: 0bce1b33 clmul x22,x28,x28 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkc_clmul_cg_cmp_rs1_rs2_b28, Zbkc_clmul_cg_cmp_rs1_rs2_b28_str) +80003310: 0004a383 lw x7,0(x9) +80003314: 01638863 beq x7,x22,80003324 +80003318: 2000246f jal x8,80005518 +8000331c: 8000330c .word 0x8000330c +80003320: 8000e382 .word 0x8000e382 +80003324: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xe938b344 +80003328: 0009ae83 lw x29,0(x19) +8000332c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x1a9b2bd0 +80003330: 0009ae83 lw x29,0(x19) +80003334: 00498993 addi x19,x19,4 + +80003338 : +Zbkc_clmul_cg_cmp_rs1_rs2_b29: + clmul x25, x29, x29 # perform operation +80003338: 0bde9cb3 clmul x25,x29,x29 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b29, Zbkc_clmul_cg_cmp_rs1_rs2_b29_str) +8000333c: 0004a383 lw x7,0(x9) +80003340: 01938863 beq x7,x25,80003350 +80003344: 1d40246f jal x8,80005518 +80003348: 80003338 .word 0x80003338 +8000334c: 8000e3bc .word 0x8000e3bc +80003350: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x462693c4 +80003354: 0009af03 lw x30,0(x19) +80003358: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xf8dc1e28 +8000335c: 0009af03 lw x30,0(x19) +80003360: 00498993 addi x19,x19,4 + +80003364 : +Zbkc_clmul_cg_cmp_rs1_rs2_b30: + clmul x12, x30, x30 # perform operation +80003364: 0bef1633 clmul x12,x30,x30 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkc_clmul_cg_cmp_rs1_rs2_b30, Zbkc_clmul_cg_cmp_rs1_rs2_b30_str) +80003368: 0004a383 lw x7,0(x9) +8000336c: 00c38863 beq x7,x12,8000337c +80003370: 1a80246f jal x8,80005518 +80003374: 80003364 .word 0x80003364 +80003378: 8000e3f6 .word 0x8000e3f6 +8000337c: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xc40dfc52 +80003380: 0009af83 lw x31,0(x19) +80003384: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x58e6a26d +80003388: 0009af83 lw x31,0(x19) +8000338c: 00498993 addi x19,x19,4 + +80003390 : +Zbkc_clmul_cg_cmp_rs1_rs2_b31: + clmul x4, x31, x31 # perform operation +80003390: 0bff9233 clmul x4,x31,x31 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkc_clmul_cg_cmp_rs1_rs2_b31, Zbkc_clmul_cg_cmp_rs1_rs2_b31_str) +80003394: 0004a383 lw x7,0(x9) +80003398: 00438863 beq x7,x4,800033a8 +8000339c: 17c0246f jal x8,80005518 +800033a0: 80003390 .word 0x80003390 +800033a4: 8000e430 .word 0x8000e430 +800033a8: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0xd26a27c8 +800033ac: 0009a003 lw x0,0(x19) +800033b0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xa4261c3a +800033b4: 0009a603 lw x12,0(x19) +800033b8: 00498993 addi x19,x19,4 + +800033bc : +Zbkc_clmul_cg_cmp_rd_rs1_b0: + clmul x0, x0, x12 # perform operation +800033bc: 0ac01033 clmul x0,x0,x12 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zbkc_clmul_cg_cmp_rd_rs1_b0, Zbkc_clmul_cg_cmp_rd_rs1_b0_str) +800033c0: 0004a383 lw x7,0(x9) +800033c4: 00038863 beq x7,x0,800033d4 +800033c8: 1500246f jal x8,80005518 +800033cc: 800033bc .word 0x800033bc +800033d0: 8000e46a .word 0x8000e46a +800033d4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0xc5781e13 +800033d8: 0009a083 lw x1,0(x19) +800033dc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x901e2753 +800033e0: 0009a603 lw x12,0(x19) +800033e4: 00498993 addi x19,x19,4 + +800033e8 : +Zbkc_clmul_cg_cmp_rd_rs1_b1: + clmul x1, x1, x12 # perform operation +800033e8: 0ac090b3 clmul x1,x1,x12 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkc_clmul_cg_cmp_rd_rs1_b1, Zbkc_clmul_cg_cmp_rd_rs1_b1_str) +800033ec: 0004a383 lw x7,0(x9) +800033f0: 00138863 beq x7,x1,80003400 +800033f4: 1240246f jal x8,80005518 +800033f8: 800033e8 .word 0x800033e8 +800033fc: 8000e4a2 .word 0x8000e4a2 +80003400: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0x6f315434 +80003404: 0009a103 lw x2,0(x19) +80003408: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x291d8244 +8000340c: 0009ae03 lw x28,0(x19) +80003410: 00498993 addi x19,x19,4 + +80003414 : +Zbkc_clmul_cg_cmp_rd_rs1_b2: + clmul x2, x2, x28 # perform operation +80003414: 0bc11133 clmul x2,x2,x28 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkc_clmul_cg_cmp_rd_rs1_b2, Zbkc_clmul_cg_cmp_rd_rs1_b2_str) +80003418: 0004a383 lw x7,0(x9) +8000341c: 00238863 beq x7,x2,8000342c +80003420: 0f80246f jal x8,80005518 +80003424: 80003414 .word 0x80003414 +80003428: 8000e4da .word 0x8000e4da +8000342c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xba78c2ad +80003430: 0009a183 lw x3,0(x19) +80003434: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x819aa837 +80003438: 0009ab03 lw x22,0(x19) +8000343c: 00498993 addi x19,x19,4 + +80003440 : +Zbkc_clmul_cg_cmp_rd_rs1_b3: + clmul x3, x3, x22 # perform operation +80003440: 0b6191b3 clmul x3,x3,x22 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkc_clmul_cg_cmp_rd_rs1_b3, Zbkc_clmul_cg_cmp_rd_rs1_b3_str) +80003444: 0004a383 lw x7,0(x9) +80003448: 00338863 beq x7,x3,80003458 +8000344c: 0cc0246f jal x8,80005518 +80003450: 80003440 .word 0x80003440 +80003454: 8000e512 .word 0x8000e512 +80003458: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x7aa54974 +8000345c: 0009a203 lw x4,0(x19) +80003460: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x4367f8e4 +80003464: 0009aa83 lw x21,0(x19) +80003468: 00498993 addi x19,x19,4 + +8000346c : +Zbkc_clmul_cg_cmp_rd_rs1_b4: + clmul x4, x4, x21 # perform operation +8000346c: 0b521233 clmul x4,x4,x21 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkc_clmul_cg_cmp_rd_rs1_b4, Zbkc_clmul_cg_cmp_rd_rs1_b4_str) +80003470: 0004a383 lw x7,0(x9) +80003474: 00438863 beq x7,x4,80003484 +80003478: 0a00246f jal x8,80005518 +8000347c: 8000346c .word 0x8000346c +80003480: 8000e54a .word 0x8000e54a +80003484: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0xfc32cb1b +80003488: 0009a283 lw x5,0(x19) +8000348c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x5ff806d9 +80003490: 0009a603 lw x12,0(x19) +80003494: 00498993 addi x19,x19,4 + +80003498 : +Zbkc_clmul_cg_cmp_rd_rs1_b5: + clmul x5, x5, x12 # perform operation +80003498: 0ac292b3 clmul x5,x5,x12 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkc_clmul_cg_cmp_rd_rs1_b5, Zbkc_clmul_cg_cmp_rd_rs1_b5_str) +8000349c: 0004a383 lw x7,0(x9) +800034a0: 00538863 beq x7,x5,800034b0 +800034a4: 0740246f jal x8,80005518 +800034a8: 80003498 .word 0x80003498 +800034ac: 8000e582 .word 0x8000e582 +800034b0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x1d5af134 +800034b4: 0009a303 lw x6,0(x19) +800034b8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x9c7b001a +800034bc: 0009a083 lw x1,0(x19) +800034c0: 00498993 addi x19,x19,4 + +800034c4 : +Zbkc_clmul_cg_cmp_rd_rs1_b6: + clmul x6, x6, x1 # perform operation +800034c4: 0a131333 clmul x6,x6,x1 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkc_clmul_cg_cmp_rd_rs1_b6, Zbkc_clmul_cg_cmp_rd_rs1_b6_str) +800034c8: 0004a383 lw x7,0(x9) +800034cc: 00638863 beq x7,x6,800034dc +800034d0: 0480246f jal x8,80005518 +800034d4: 800034c4 .word 0x800034c4 +800034d8: 8000e5ba .word 0x8000e5ba +800034dc: 00448493 addi x9,x9,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800034e0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800034e4: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0xf36dc606 +800034e8: 0009a383 lw x7,0(x19) +800034ec: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xb443f267 +800034f0: 0009a683 lw x13,0(x19) +800034f4: 00498993 addi x19,x19,4 + +800034f8 : +Zbkc_clmul_cg_cmp_rd_rs1_b7: + clmul x7, x7, x13 # perform operation +800034f8: 0ad393b3 clmul x7,x7,x13 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkc_clmul_cg_cmp_rd_rs1_b7, Zbkc_clmul_cg_cmp_rd_rs1_b7_str) +800034fc: 0004a203 lw x4,0(x9) +80003500: 00720863 beq x4,x7,80003510 +80003504: 7fd012ef jal x5,80005500 +80003508: 800034f8 .word 0x800034f8 +8000350c: 8000e5f2 .word 0x8000e5f2 +80003510: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xe6712bfc +80003514: 0009a403 lw x8,0(x19) +80003518: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0xc475d8f8 +8000351c: 0009ac03 lw x24,0(x19) +80003520: 00498993 addi x19,x19,4 + +80003524 : +Zbkc_clmul_cg_cmp_rd_rs1_b8: + clmul x8, x8, x24 # perform operation +80003524: 0b841433 clmul x8,x8,x24 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkc_clmul_cg_cmp_rd_rs1_b8, Zbkc_clmul_cg_cmp_rd_rs1_b8_str) +80003528: 0004a203 lw x4,0(x9) +8000352c: 00820863 beq x4,x8,8000353c +80003530: 7d1012ef jal x5,80005500 +80003534: 80003524 .word 0x80003524 +80003538: 8000e62a .word 0x8000e62a +8000353c: 00448493 addi x9,x9,4 + + mv x21, x9 # switch signature pointer register to avoid conflict with test +80003540: 00048a93 addi x21,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x0866dc83 +80003544: 0009a483 lw x9,0(x19) +80003548: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0x5baa7bcc +8000354c: 0009a383 lw x7,0(x19) +80003550: 00498993 addi x19,x19,4 + +80003554 : +Zbkc_clmul_cg_cmp_rd_rs1_b9: + clmul x9, x9, x7 # perform operation +80003554: 0a7494b3 clmul x9,x9,x7 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zbkc_clmul_cg_cmp_rd_rs1_b9, Zbkc_clmul_cg_cmp_rd_rs1_b9_str) +80003558: 000aa203 lw x4,0(x21) +8000355c: 00920863 beq x4,x9,8000356c +80003560: 7a1012ef jal x5,80005500 +80003564: 80003554 .word 0x80003554 +80003568: 8000e662 .word 0x8000e662 +8000356c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x5e266933 +80003570: 0009a503 lw x10,0(x19) +80003574: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x26bcdc69 +80003578: 0009ae03 lw x28,0(x19) +8000357c: 00498993 addi x19,x19,4 + +80003580 : +Zbkc_clmul_cg_cmp_rd_rs1_b10: + clmul x10, x10, x28 # perform operation +80003580: 0bc51533 clmul x10,x10,x28 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zbkc_clmul_cg_cmp_rd_rs1_b10, Zbkc_clmul_cg_cmp_rd_rs1_b10_str) +80003584: 000aa203 lw x4,0(x21) +80003588: 00a20863 beq x4,x10,80003598 +8000358c: 775012ef jal x5,80005500 +80003590: 80003580 .word 0x80003580 +80003594: 8000e69a .word 0x8000e69a +80003598: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xda89d250 +8000359c: 0009a583 lw x11,0(x19) +800035a0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xc6f04e39 +800035a4: 0009a003 lw x0,0(x19) +800035a8: 00498993 addi x19,x19,4 + +800035ac : +Zbkc_clmul_cg_cmp_rd_rs1_b11: + clmul x11, x11, x0 # perform operation +800035ac: 0a0595b3 clmul x11,x11,x0 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zbkc_clmul_cg_cmp_rd_rs1_b11, Zbkc_clmul_cg_cmp_rd_rs1_b11_str) +800035b0: 000aa203 lw x4,0(x21) +800035b4: 00b20863 beq x4,x11,800035c4 +800035b8: 749012ef jal x5,80005500 +800035bc: 800035ac .word 0x800035ac +800035c0: 8000e6d3 .word 0x8000e6d3 +800035c4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x330865a5 +800035c8: 0009a603 lw x12,0(x19) +800035cc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x5eed2b56 +800035d0: 0009ac83 lw x25,0(x19) +800035d4: 00498993 addi x19,x19,4 + +800035d8 : +Zbkc_clmul_cg_cmp_rd_rs1_b12: + clmul x12, x12, x25 # perform operation +800035d8: 0b961633 clmul x12,x12,x25 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zbkc_clmul_cg_cmp_rd_rs1_b12, Zbkc_clmul_cg_cmp_rd_rs1_b12_str) +800035dc: 000aa203 lw x4,0(x21) +800035e0: 00c20863 beq x4,x12,800035f0 +800035e4: 71d012ef jal x5,80005500 +800035e8: 800035d8 .word 0x800035d8 +800035ec: 8000e70c .word 0x8000e70c +800035f0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xdf1606eb +800035f4: 0009a683 lw x13,0(x19) +800035f8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0xb8ecf795 +800035fc: 0009af83 lw x31,0(x19) +80003600: 00498993 addi x19,x19,4 + +80003604 : +Zbkc_clmul_cg_cmp_rd_rs1_b13: + clmul x13, x13, x31 # perform operation +80003604: 0bf696b3 clmul x13,x13,x31 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zbkc_clmul_cg_cmp_rd_rs1_b13, Zbkc_clmul_cg_cmp_rd_rs1_b13_str) +80003608: 000aa203 lw x4,0(x21) +8000360c: 00d20863 beq x4,x13,8000361c +80003610: 6f1012ef jal x5,80005500 +80003614: 80003604 .word 0x80003604 +80003618: 8000e745 .word 0x8000e745 +8000361c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x7fdb8de2 +80003620: 0009a703 lw x14,0(x19) +80003624: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x5cd62ffc +80003628: 0009a883 lw x17,0(x19) +8000362c: 00498993 addi x19,x19,4 + +80003630 : +Zbkc_clmul_cg_cmp_rd_rs1_b14: + clmul x14, x14, x17 # perform operation +80003630: 0b171733 clmul x14,x14,x17 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zbkc_clmul_cg_cmp_rd_rs1_b14, Zbkc_clmul_cg_cmp_rd_rs1_b14_str) +80003634: 000aa203 lw x4,0(x21) +80003638: 00e20863 beq x4,x14,80003648 +8000363c: 6c5012ef jal x5,80005500 +80003640: 80003630 .word 0x80003630 +80003644: 8000e77e .word 0x8000e77e +80003648: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xd14c8c78 +8000364c: 0009a783 lw x15,0(x19) +80003650: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x79aacd27 +80003654: 0009a583 lw x11,0(x19) +80003658: 00498993 addi x19,x19,4 + +8000365c : +Zbkc_clmul_cg_cmp_rd_rs1_b15: + clmul x15, x15, x11 # perform operation +8000365c: 0ab797b3 clmul x15,x15,x11 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zbkc_clmul_cg_cmp_rd_rs1_b15, Zbkc_clmul_cg_cmp_rd_rs1_b15_str) +80003660: 000aa203 lw x4,0(x21) +80003664: 00f20863 beq x4,x15,80003674 +80003668: 699012ef jal x5,80005500 +8000366c: 8000365c .word 0x8000365c +80003670: 8000e7b7 .word 0x8000e7b7 +80003674: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0xeee369f3 +80003678: 0009a803 lw x16,0(x19) +8000367c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xe58d2388 +80003680: 0009a683 lw x13,0(x19) +80003684: 00498993 addi x19,x19,4 + +80003688 : +Zbkc_clmul_cg_cmp_rd_rs1_b16: + clmul x16, x16, x13 # perform operation +80003688: 0ad81833 clmul x16,x16,x13 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zbkc_clmul_cg_cmp_rd_rs1_b16, Zbkc_clmul_cg_cmp_rd_rs1_b16_str) +8000368c: 000aa203 lw x4,0(x21) +80003690: 01020863 beq x4,x16,800036a0 +80003694: 66d012ef jal x5,80005500 +80003698: 80003688 .word 0x80003688 +8000369c: 8000e7f0 .word 0x8000e7f0 +800036a0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x7c63f1e9 +800036a4: 0009a883 lw x17,0(x19) +800036a8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xa019945c +800036ac: 0009a003 lw x0,0(x19) +800036b0: 00498993 addi x19,x19,4 + +800036b4 : +Zbkc_clmul_cg_cmp_rd_rs1_b17: + clmul x17, x17, x0 # perform operation +800036b4: 0a0898b3 clmul x17,x17,x0 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zbkc_clmul_cg_cmp_rd_rs1_b17, Zbkc_clmul_cg_cmp_rd_rs1_b17_str) +800036b8: 000aa203 lw x4,0(x21) +800036bc: 01120863 beq x4,x17,800036cc +800036c0: 641012ef jal x5,80005500 +800036c4: 800036b4 .word 0x800036b4 +800036c8: 8000e829 .word 0x8000e829 +800036cc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x0174679b +800036d0: 0009a903 lw x18,0(x19) +800036d4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x8e478d8a +800036d8: 0009a803 lw x16,0(x19) +800036dc: 00498993 addi x19,x19,4 + +800036e0 : +Zbkc_clmul_cg_cmp_rd_rs1_b18: + clmul x18, x18, x16 # perform operation +800036e0: 0b091933 clmul x18,x18,x16 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkc_clmul_cg_cmp_rd_rs1_b18, Zbkc_clmul_cg_cmp_rd_rs1_b18_str) +800036e4: 000aa203 lw x4,0(x21) +800036e8: 01220863 beq x4,x18,800036f8 +800036ec: 615012ef jal x5,80005500 +800036f0: 800036e0 .word 0x800036e0 +800036f4: 8000e862 .word 0x8000e862 +800036f8: 004a8a93 addi x21,x21,4 + + mv x31, x19 # switch data pointer register to avoid conflict with test +800036fc: 00098f93 addi x31,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x48e613d4 +80003700: 000fa983 lw x19,0(x31) +80003704: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x2bd7c6b9 +80003708: 000fad83 lw x27,0(x31) +8000370c: 004f8f93 addi x31,x31,4 + +80003710 : +Zbkc_clmul_cg_cmp_rd_rs1_b19: + clmul x19, x19, x27 # perform operation +80003710: 0bb999b3 clmul x19,x19,x27 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zbkc_clmul_cg_cmp_rd_rs1_b19, Zbkc_clmul_cg_cmp_rd_rs1_b19_str) +80003714: 000aa203 lw x4,0(x21) +80003718: 01320863 beq x4,x19,80003728 +8000371c: 5e5012ef jal x5,80005500 +80003720: 80003710 .word 0x80003710 +80003724: 8000e89b .word 0x8000e89b +80003728: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x4f8efd80 +8000372c: 000faa03 lw x20,0(x31) +80003730: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0xaa8a91cf +80003734: 000fa803 lw x16,0(x31) +80003738: 004f8f93 addi x31,x31,4 + +8000373c : +Zbkc_clmul_cg_cmp_rd_rs1_b20: + clmul x20, x20, x16 # perform operation +8000373c: 0b0a1a33 clmul x20,x20,x16 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkc_clmul_cg_cmp_rd_rs1_b20, Zbkc_clmul_cg_cmp_rd_rs1_b20_str) +80003740: 000aa203 lw x4,0(x21) +80003744: 01420863 beq x4,x20,80003754 +80003748: 5b9012ef jal x5,80005500 +8000374c: 8000373c .word 0x8000373c +80003750: 8000e8d4 .word 0x8000e8d4 +80003754: 004a8a93 addi x21,x21,4 + + mv x27, x21 # switch signature pointer register to avoid conflict with test +80003758: 000a8d93 addi x27,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x3c4c8d27 +8000375c: 000faa83 lw x21,0(x31) +80003760: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0x08fb8aad +80003764: 000fa483 lw x9,0(x31) +80003768: 004f8f93 addi x31,x31,4 + +8000376c : +Zbkc_clmul_cg_cmp_rd_rs1_b21: + clmul x21, x21, x9 # perform operation +8000376c: 0a9a9ab3 clmul x21,x21,x9 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkc_clmul_cg_cmp_rd_rs1_b21, Zbkc_clmul_cg_cmp_rd_rs1_b21_str) +80003770: 000da203 lw x4,0(x27) +80003774: 01520863 beq x4,x21,80003784 +80003778: 589012ef jal x5,80005500 +8000377c: 8000376c .word 0x8000376c +80003780: 8000e90d .word 0x8000e90d +80003784: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x6b3ea221 +80003788: 000fab03 lw x22,0(x31) +8000378c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0xcd8a7616 +80003790: 000fa603 lw x12,0(x31) +80003794: 004f8f93 addi x31,x31,4 + +80003798 : +Zbkc_clmul_cg_cmp_rd_rs1_b22: + clmul x22, x22, x12 # perform operation +80003798: 0acb1b33 clmul x22,x22,x12 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkc_clmul_cg_cmp_rd_rs1_b22, Zbkc_clmul_cg_cmp_rd_rs1_b22_str) +8000379c: 000da203 lw x4,0(x27) +800037a0: 01620863 beq x4,x22,800037b0 +800037a4: 55d012ef jal x5,80005500 +800037a8: 80003798 .word 0x80003798 +800037ac: 8000e946 .word 0x8000e946 +800037b0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x973b6da4 +800037b4: 000fab83 lw x23,0(x31) +800037b8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x84f1abd7 +800037bc: 000fab03 lw x22,0(x31) +800037c0: 004f8f93 addi x31,x31,4 + +800037c4 : +Zbkc_clmul_cg_cmp_rd_rs1_b23: + clmul x23, x23, x22 # perform operation +800037c4: 0b6b9bb3 clmul x23,x23,x22 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkc_clmul_cg_cmp_rd_rs1_b23, Zbkc_clmul_cg_cmp_rd_rs1_b23_str) +800037c8: 000da203 lw x4,0(x27) +800037cc: 01720863 beq x4,x23,800037dc +800037d0: 531012ef jal x5,80005500 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000e97f .word 0x8000e97f +800037dc: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x456a83f8 +800037e0: 000fac03 lw x24,0(x31) +800037e4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0x090536ed +800037e8: 000fa783 lw x15,0(x31) +800037ec: 004f8f93 addi x31,x31,4 + +800037f0 : +Zbkc_clmul_cg_cmp_rd_rs1_b24: + clmul x24, x24, x15 # perform operation +800037f0: 0afc1c33 clmul x24,x24,x15 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zbkc_clmul_cg_cmp_rd_rs1_b24, Zbkc_clmul_cg_cmp_rd_rs1_b24_str) +800037f4: 000da203 lw x4,0(x27) +800037f8: 01820863 beq x4,x24,80003808 +800037fc: 505012ef jal x5,80005500 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000e9b8 .word 0x8000e9b8 +80003808: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x450d2c3c +8000380c: 000fac83 lw x25,0(x31) +80003810: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x6e525642 +80003814: 000faa03 lw x20,0(x31) +80003818: 004f8f93 addi x31,x31,4 + +8000381c : +Zbkc_clmul_cg_cmp_rd_rs1_b25: + clmul x25, x25, x20 # perform operation +8000381c: 0b4c9cb3 clmul x25,x25,x20 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkc_clmul_cg_cmp_rd_rs1_b25, Zbkc_clmul_cg_cmp_rd_rs1_b25_str) +80003820: 000da203 lw x4,0(x27) +80003824: 01920863 beq x4,x25,80003834 +80003828: 4d9012ef jal x5,80005500 +8000382c: 8000381c .word 0x8000381c +80003830: 8000e9f1 .word 0x8000e9f1 +80003834: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x0c82491a +80003838: 000fad03 lw x26,0(x31) +8000383c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x078bf27a +80003840: 000fa803 lw x16,0(x31) +80003844: 004f8f93 addi x31,x31,4 + +80003848 : +Zbkc_clmul_cg_cmp_rd_rs1_b26: + clmul x26, x26, x16 # perform operation +80003848: 0b0d1d33 clmul x26,x26,x16 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkc_clmul_cg_cmp_rd_rs1_b26, Zbkc_clmul_cg_cmp_rd_rs1_b26_str) +8000384c: 000da203 lw x4,0(x27) +80003850: 01a20863 beq x4,x26,80003860 +80003854: 4ad012ef jal x5,80005500 +80003858: 80003848 .word 0x80003848 +8000385c: 8000ea2a .word 0x8000ea2a +80003860: 004d8d93 addi x27,x27,4 + + mv x17, x27 # switch signature pointer register to avoid conflict with test +80003864: 000d8893 addi x17,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xfbcfcdd5 +80003868: 000fad83 lw x27,0(x31) +8000386c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x8e6df894 +80003870: 000fa183 lw x3,0(x31) +80003874: 004f8f93 addi x31,x31,4 + +80003878 : +Zbkc_clmul_cg_cmp_rd_rs1_b27: + clmul x27, x27, x3 # perform operation +80003878: 0a3d9db3 clmul x27,x27,x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkc_clmul_cg_cmp_rd_rs1_b27, Zbkc_clmul_cg_cmp_rd_rs1_b27_str) +8000387c: 0008a203 lw x4,0(x17) +80003880: 01b20863 beq x4,x27,80003890 +80003884: 47d012ef jal x5,80005500 +80003888: 80003878 .word 0x80003878 +8000388c: 8000ea63 .word 0x8000ea63 +80003890: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x464b2eef +80003894: 000fae03 lw x28,0(x31) +80003898: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x04fe4e2e +8000389c: 000fac83 lw x25,0(x31) +800038a0: 004f8f93 addi x31,x31,4 + +800038a4 : +Zbkc_clmul_cg_cmp_rd_rs1_b28: + clmul x28, x28, x25 # perform operation +800038a4: 0b9e1e33 clmul x28,x28,x25 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkc_clmul_cg_cmp_rd_rs1_b28, Zbkc_clmul_cg_cmp_rd_rs1_b28_str) +800038a8: 0008a203 lw x4,0(x17) +800038ac: 01c20863 beq x4,x28,800038bc +800038b0: 451012ef jal x5,80005500 +800038b4: 800038a4 .word 0x800038a4 +800038b8: 8000ea9c .word 0x8000ea9c +800038bc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xc18c5ac4 +800038c0: 000fae83 lw x29,0(x31) +800038c4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0x7119e38e +800038c8: 000fa783 lw x15,0(x31) +800038cc: 004f8f93 addi x31,x31,4 + +800038d0 : +Zbkc_clmul_cg_cmp_rd_rs1_b29: + clmul x29, x29, x15 # perform operation +800038d0: 0afe9eb3 clmul x29,x29,x15 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkc_clmul_cg_cmp_rd_rs1_b29, Zbkc_clmul_cg_cmp_rd_rs1_b29_str) +800038d4: 0008a203 lw x4,0(x17) +800038d8: 01d20863 beq x4,x29,800038e8 +800038dc: 425012ef jal x5,80005500 +800038e0: 800038d0 .word 0x800038d0 +800038e4: 8000ead5 .word 0x8000ead5 +800038e8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x006812e6 +800038ec: 000faf03 lw x30,0(x31) +800038f0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x746e69e8 +800038f4: 000fae03 lw x28,0(x31) +800038f8: 004f8f93 addi x31,x31,4 + +800038fc : +Zbkc_clmul_cg_cmp_rd_rs1_b30: + clmul x30, x30, x28 # perform operation +800038fc: 0bcf1f33 clmul x30,x30,x28 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkc_clmul_cg_cmp_rd_rs1_b30, Zbkc_clmul_cg_cmp_rd_rs1_b30_str) +80003900: 0008a203 lw x4,0(x17) +80003904: 01e20863 beq x4,x30,80003914 +80003908: 3f9012ef jal x5,80005500 +8000390c: 800038fc .word 0x800038fc +80003910: 8000eb0e .word 0x8000eb0e +80003914: 00488893 addi x17,x17,4 + + mv x22, x31 # switch data pointer register to avoid conflict with test +80003918: 000f8b13 addi x22,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xe1fbc679 +8000391c: 000b2f83 lw x31,0(x22) +80003920: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x7f083aab +80003924: 000b2f03 lw x30,0(x22) +80003928: 004b0b13 addi x22,x22,4 + +8000392c : +Zbkc_clmul_cg_cmp_rd_rs1_b31: + clmul x31, x31, x30 # perform operation +8000392c: 0bef9fb3 clmul x31,x31,x30 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkc_clmul_cg_cmp_rd_rs1_b31, Zbkc_clmul_cg_cmp_rd_rs1_b31_str) +80003930: 0008a203 lw x4,0(x17) +80003934: 01f20863 beq x4,x31,80003944 +80003938: 3c9012ef jal x5,80005500 +8000393c: 8000392c .word 0x8000392c +80003940: 8000eb47 .word 0x8000eb47 +80003944: 00488893 addi x17,x17,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x848ee7a2 +80003948: 000b2d03 lw x26,0(x22) +8000394c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x86b0664f +80003950: 000b2003 lw x0,0(x22) +80003954: 004b0b13 addi x22,x22,4 + +80003958 : +Zbkc_clmul_cg_cmp_rd_rs2_b0: + clmul x0, x26, x0 # perform operation +80003958: 0a0d1033 clmul x0,x26,x0 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zbkc_clmul_cg_cmp_rd_rs2_b0, Zbkc_clmul_cg_cmp_rd_rs2_b0_str) +8000395c: 0008a203 lw x4,0(x17) +80003960: 00020863 beq x4,x0,80003970 +80003964: 39d012ef jal x5,80005500 +80003968: 80003958 .word 0x80003958 +8000396c: 8000eb80 .word 0x8000eb80 +80003970: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x613614be +80003974: 000b2f03 lw x30,0(x22) +80003978: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x5464d382 +8000397c: 000b2083 lw x1,0(x22) +80003980: 004b0b13 addi x22,x22,4 + +80003984 : +Zbkc_clmul_cg_cmp_rd_rs2_b1: + clmul x1, x30, x1 # perform operation +80003984: 0a1f10b3 clmul x1,x30,x1 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkc_clmul_cg_cmp_rd_rs2_b1, Zbkc_clmul_cg_cmp_rd_rs2_b1_str) +80003988: 0008a203 lw x4,0(x17) +8000398c: 00120863 beq x4,x1,8000399c +80003990: 371012ef jal x5,80005500 +80003994: 80003984 .word 0x80003984 +80003998: 8000ebb8 .word 0x8000ebb8 +8000399c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x1fcce3fa +800039a0: 000b2c03 lw x24,0(x22) +800039a4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0xc404eea5 +800039a8: 000b2103 lw x2,0(x22) +800039ac: 004b0b13 addi x22,x22,4 + +800039b0 : +Zbkc_clmul_cg_cmp_rd_rs2_b2: + clmul x2, x24, x2 # perform operation +800039b0: 0a2c1133 clmul x2,x24,x2 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkc_clmul_cg_cmp_rd_rs2_b2, Zbkc_clmul_cg_cmp_rd_rs2_b2_str) +800039b4: 0008a203 lw x4,0(x17) +800039b8: 00220863 beq x4,x2,800039c8 +800039bc: 345012ef jal x5,80005500 +800039c0: 800039b0 .word 0x800039b0 +800039c4: 8000ebf0 .word 0x8000ebf0 +800039c8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xb801d1cd +800039cc: 000b2783 lw x15,0(x22) +800039d0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x89e0a283 +800039d4: 000b2183 lw x3,0(x22) +800039d8: 004b0b13 addi x22,x22,4 + +800039dc : +Zbkc_clmul_cg_cmp_rd_rs2_b3: + clmul x3, x15, x3 # perform operation +800039dc: 0a3791b3 clmul x3,x15,x3 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkc_clmul_cg_cmp_rd_rs2_b3, Zbkc_clmul_cg_cmp_rd_rs2_b3_str) +800039e0: 0008a203 lw x4,0(x17) +800039e4: 00320863 beq x4,x3,800039f4 +800039e8: 319012ef jal x5,80005500 +800039ec: 800039dc .word 0x800039dc +800039f0: 8000ec28 .word 0x8000ec28 +800039f4: 00488893 addi x17,x17,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800039f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800039fc: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xfbf11276 +80003a00: 000b2f03 lw x30,0(x22) +80003a04: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xa05c9104 +80003a08: 000b2203 lw x4,0(x22) +80003a0c: 004b0b13 addi x22,x22,4 + +80003a10 : +Zbkc_clmul_cg_cmp_rd_rs2_b4: + clmul x4, x30, x4 # perform operation +80003a10: 0a4f1233 clmul x4,x30,x4 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zbkc_clmul_cg_cmp_rd_rs2_b4, Zbkc_clmul_cg_cmp_rd_rs2_b4_str) +80003a14: 0008a683 lw x13,0(x17) +80003a18: 00468863 beq x13,x4,80003a28 +80003a1c: 3250176f jal x14,80005540 +80003a20: 80003a10 .word 0x80003a10 +80003a24: 8000ec60 .word 0x8000ec60 +80003a28: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x3355ae14 +80003a2c: 000b2003 lw x0,0(x22) +80003a30: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0xd1a8dc51 +80003a34: 000b2283 lw x5,0(x22) +80003a38: 004b0b13 addi x22,x22,4 + +80003a3c : +Zbkc_clmul_cg_cmp_rd_rs2_b5: + clmul x5, x0, x5 # perform operation +80003a3c: 0a5012b3 clmul x5,x0,x5 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zbkc_clmul_cg_cmp_rd_rs2_b5, Zbkc_clmul_cg_cmp_rd_rs2_b5_str) +80003a40: 0008a683 lw x13,0(x17) +80003a44: 00568863 beq x13,x5,80003a54 +80003a48: 2f90176f jal x14,80005540 +80003a4c: 80003a3c .word 0x80003a3c +80003a50: 8000ec98 .word 0x8000ec98 +80003a54: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x01267923 +80003a58: 000b2c03 lw x24,0(x22) +80003a5c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0xb44c4a50 +80003a60: 000b2303 lw x6,0(x22) +80003a64: 004b0b13 addi x22,x22,4 + +80003a68 : +Zbkc_clmul_cg_cmp_rd_rs2_b6: + clmul x6, x24, x6 # perform operation +80003a68: 0a6c1333 clmul x6,x24,x6 + # Check if x6 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x6, Zbkc_clmul_cg_cmp_rd_rs2_b6, Zbkc_clmul_cg_cmp_rd_rs2_b6_str) +80003a6c: 0008a683 lw x13,0(x17) +80003a70: 00668863 beq x13,x6,80003a80 +80003a74: 2cd0176f jal x14,80005540 +80003a78: 80003a68 .word 0x80003a68 +80003a7c: 8000ecd0 .word 0x8000ecd0 +80003a80: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x200c7191 +80003a84: 000b2a83 lw x21,0(x22) +80003a88: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x7021e31f +80003a8c: 000b2383 lw x7,0(x22) +80003a90: 004b0b13 addi x22,x22,4 + +80003a94 : +Zbkc_clmul_cg_cmp_rd_rs2_b7: + clmul x7, x21, x7 # perform operation +80003a94: 0a7a93b3 clmul x7,x21,x7 + # Check if x7 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x7, Zbkc_clmul_cg_cmp_rd_rs2_b7, Zbkc_clmul_cg_cmp_rd_rs2_b7_str) +80003a98: 0008a683 lw x13,0(x17) +80003a9c: 00768863 beq x13,x7,80003aac +80003aa0: 2a10176f jal x14,80005540 +80003aa4: 80003a94 .word 0x80003a94 +80003aa8: 8000ed08 .word 0x8000ed08 +80003aac: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x8c1a2322 +80003ab0: 000b2003 lw x0,0(x22) +80003ab4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x657be7df +80003ab8: 000b2403 lw x8,0(x22) +80003abc: 004b0b13 addi x22,x22,4 + +80003ac0 : +Zbkc_clmul_cg_cmp_rd_rs2_b8: + clmul x8, x0, x8 # perform operation +80003ac0: 0a801433 clmul x8,x0,x8 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zbkc_clmul_cg_cmp_rd_rs2_b8, Zbkc_clmul_cg_cmp_rd_rs2_b8_str) +80003ac4: 0008a683 lw x13,0(x17) +80003ac8: 00868863 beq x13,x8,80003ad8 +80003acc: 2750176f jal x14,80005540 +80003ad0: 80003ac0 .word 0x80003ac0 +80003ad4: 8000ed40 .word 0x8000ed40 +80003ad8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xcb7b4f80 +80003adc: 000b2b83 lw x23,0(x22) +80003ae0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x74251364 +80003ae4: 000b2483 lw x9,0(x22) +80003ae8: 004b0b13 addi x22,x22,4 + +80003aec : +Zbkc_clmul_cg_cmp_rd_rs2_b9: + clmul x9, x23, x9 # perform operation +80003aec: 0a9b94b3 clmul x9,x23,x9 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zbkc_clmul_cg_cmp_rd_rs2_b9, Zbkc_clmul_cg_cmp_rd_rs2_b9_str) +80003af0: 0008a683 lw x13,0(x17) +80003af4: 00968863 beq x13,x9,80003b04 +80003af8: 2490176f jal x14,80005540 +80003afc: 80003aec .word 0x80003aec +80003b00: 8000ed78 .word 0x8000ed78 +80003b04: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x53b04356 +80003b08: 000b2083 lw x1,0(x22) +80003b0c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xf752deea +80003b10: 000b2503 lw x10,0(x22) +80003b14: 004b0b13 addi x22,x22,4 + +80003b18 : +Zbkc_clmul_cg_cmp_rd_rs2_b10: + clmul x10, x1, x10 # perform operation +80003b18: 0aa09533 clmul x10,x1,x10 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zbkc_clmul_cg_cmp_rd_rs2_b10, Zbkc_clmul_cg_cmp_rd_rs2_b10_str) +80003b1c: 0008a683 lw x13,0(x17) +80003b20: 00a68863 beq x13,x10,80003b30 +80003b24: 21d0176f jal x14,80005540 +80003b28: 80003b18 .word 0x80003b18 +80003b2c: 8000edb0 .word 0x8000edb0 +80003b30: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x20d608ac +80003b34: 000b2c03 lw x24,0(x22) +80003b38: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x7daaec0b +80003b3c: 000b2583 lw x11,0(x22) +80003b40: 004b0b13 addi x22,x22,4 + +80003b44 : +Zbkc_clmul_cg_cmp_rd_rs2_b11: + clmul x11, x24, x11 # perform operation +80003b44: 0abc15b3 clmul x11,x24,x11 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zbkc_clmul_cg_cmp_rd_rs2_b11, Zbkc_clmul_cg_cmp_rd_rs2_b11_str) +80003b48: 0008a683 lw x13,0(x17) +80003b4c: 00b68863 beq x13,x11,80003b5c +80003b50: 1f10176f jal x14,80005540 +80003b54: 80003b44 .word 0x80003b44 +80003b58: 8000ede9 .word 0x8000ede9 +80003b5c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xa02cbfd8 +80003b60: 000b2783 lw x15,0(x22) +80003b64: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x2013f037 +80003b68: 000b2603 lw x12,0(x22) +80003b6c: 004b0b13 addi x22,x22,4 + +80003b70 : +Zbkc_clmul_cg_cmp_rd_rs2_b12: + clmul x12, x15, x12 # perform operation +80003b70: 0ac79633 clmul x12,x15,x12 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zbkc_clmul_cg_cmp_rd_rs2_b12, Zbkc_clmul_cg_cmp_rd_rs2_b12_str) +80003b74: 0008a683 lw x13,0(x17) +80003b78: 00c68863 beq x13,x12,80003b88 +80003b7c: 1c50176f jal x14,80005540 +80003b80: 80003b70 .word 0x80003b70 +80003b84: 8000ee22 .word 0x8000ee22 +80003b88: 00488893 addi x17,x17,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003b8c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003b90: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x57f0728d +80003b94: 000b2303 lw x6,0(x22) +80003b98: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xc82ece3d +80003b9c: 000b2683 lw x13,0(x22) +80003ba0: 004b0b13 addi x22,x22,4 + +80003ba4 : +Zbkc_clmul_cg_cmp_rd_rs2_b13: + clmul x13, x6, x13 # perform operation +80003ba4: 0ad316b3 clmul x13,x6,x13 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkc_clmul_cg_cmp_rd_rs2_b13, Zbkc_clmul_cg_cmp_rd_rs2_b13_str) +80003ba8: 0008a203 lw x4,0(x17) +80003bac: 00d20863 beq x4,x13,80003bbc +80003bb0: 151012ef jal x5,80005500 +80003bb4: 80003ba4 .word 0x80003ba4 +80003bb8: 8000ee5b .word 0x8000ee5b +80003bbc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x5dcae38c +80003bc0: 000b2903 lw x18,0(x22) +80003bc4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x1aea523b +80003bc8: 000b2703 lw x14,0(x22) +80003bcc: 004b0b13 addi x22,x22,4 + +80003bd0 : +Zbkc_clmul_cg_cmp_rd_rs2_b14: + clmul x14, x18, x14 # perform operation +80003bd0: 0ae91733 clmul x14,x18,x14 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkc_clmul_cg_cmp_rd_rs2_b14, Zbkc_clmul_cg_cmp_rd_rs2_b14_str) +80003bd4: 0008a203 lw x4,0(x17) +80003bd8: 00e20863 beq x4,x14,80003be8 +80003bdc: 125012ef jal x5,80005500 +80003be0: 80003bd0 .word 0x80003bd0 +80003be4: 8000ee94 .word 0x8000ee94 +80003be8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x1db564cf +80003bec: 000b2303 lw x6,0(x22) +80003bf0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0xcdc7b10b +80003bf4: 000b2783 lw x15,0(x22) +80003bf8: 004b0b13 addi x22,x22,4 + +80003bfc : +Zbkc_clmul_cg_cmp_rd_rs2_b15: + clmul x15, x6, x15 # perform operation +80003bfc: 0af317b3 clmul x15,x6,x15 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkc_clmul_cg_cmp_rd_rs2_b15, Zbkc_clmul_cg_cmp_rd_rs2_b15_str) +80003c00: 0008a203 lw x4,0(x17) +80003c04: 00f20863 beq x4,x15,80003c14 +80003c08: 0f9012ef jal x5,80005500 +80003c0c: 80003bfc .word 0x80003bfc +80003c10: 8000eecd .word 0x8000eecd +80003c14: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xe34fe6f6 +80003c18: 000b2783 lw x15,0(x22) +80003c1c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x4bbf2ecf +80003c20: 000b2803 lw x16,0(x22) +80003c24: 004b0b13 addi x22,x22,4 + +80003c28 : +Zbkc_clmul_cg_cmp_rd_rs2_b16: + clmul x16, x15, x16 # perform operation +80003c28: 0b079833 clmul x16,x15,x16 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkc_clmul_cg_cmp_rd_rs2_b16, Zbkc_clmul_cg_cmp_rd_rs2_b16_str) +80003c2c: 0008a203 lw x4,0(x17) +80003c30: 01020863 beq x4,x16,80003c40 +80003c34: 0cd012ef jal x5,80005500 +80003c38: 80003c28 .word 0x80003c28 +80003c3c: 8000ef06 .word 0x8000ef06 +80003c40: 00488893 addi x17,x17,4 + + mv x12, x17 # switch signature pointer register to avoid conflict with test +80003c44: 00088613 addi x12,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x50a2ecc7 +80003c48: 000b2e03 lw x28,0(x22) +80003c4c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x38d5196c +80003c50: 000b2883 lw x17,0(x22) +80003c54: 004b0b13 addi x22,x22,4 + +80003c58 : +Zbkc_clmul_cg_cmp_rd_rs2_b17: + clmul x17, x28, x17 # perform operation +80003c58: 0b1e18b3 clmul x17,x28,x17 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkc_clmul_cg_cmp_rd_rs2_b17, Zbkc_clmul_cg_cmp_rd_rs2_b17_str) +80003c5c: 00062203 lw x4,0(x12) +80003c60: 01120863 beq x4,x17,80003c70 +80003c64: 09d012ef jal x5,80005500 +80003c68: 80003c58 .word 0x80003c58 +80003c6c: 8000ef3f .word 0x8000ef3f +80003c70: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0x64bf3d31 +80003c74: 000b2103 lw x2,0(x22) +80003c78: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x5dc3b679 +80003c7c: 000b2903 lw x18,0(x22) +80003c80: 004b0b13 addi x22,x22,4 + +80003c84 : +Zbkc_clmul_cg_cmp_rd_rs2_b18: + clmul x18, x2, x18 # perform operation +80003c84: 0b211933 clmul x18,x2,x18 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkc_clmul_cg_cmp_rd_rs2_b18, Zbkc_clmul_cg_cmp_rd_rs2_b18_str) +80003c88: 00062203 lw x4,0(x12) +80003c8c: 01220863 beq x4,x18,80003c9c +80003c90: 071012ef jal x5,80005500 +80003c94: 80003c84 .word 0x80003c84 +80003c98: 8000ef78 .word 0x8000ef78 +80003c9c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xf5665719 +80003ca0: 000b2883 lw x17,0(x22) +80003ca4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xa28ff410 +80003ca8: 000b2983 lw x19,0(x22) +80003cac: 004b0b13 addi x22,x22,4 + +80003cb0 : +Zbkc_clmul_cg_cmp_rd_rs2_b19: + clmul x19, x17, x19 # perform operation +80003cb0: 0b3899b3 clmul x19,x17,x19 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkc_clmul_cg_cmp_rd_rs2_b19, Zbkc_clmul_cg_cmp_rd_rs2_b19_str) +80003cb4: 00062203 lw x4,0(x12) +80003cb8: 01320863 beq x4,x19,80003cc8 +80003cbc: 045012ef jal x5,80005500 +80003cc0: 80003cb0 .word 0x80003cb0 +80003cc4: 8000efb1 .word 0x8000efb1 +80003cc8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x254e10fb +80003ccc: 000b2983 lw x19,0(x22) +80003cd0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xbf2b9789 +80003cd4: 000b2a03 lw x20,0(x22) +80003cd8: 004b0b13 addi x22,x22,4 + +80003cdc : +Zbkc_clmul_cg_cmp_rd_rs2_b20: + clmul x20, x19, x20 # perform operation +80003cdc: 0b499a33 clmul x20,x19,x20 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkc_clmul_cg_cmp_rd_rs2_b20, Zbkc_clmul_cg_cmp_rd_rs2_b20_str) +80003ce0: 00062203 lw x4,0(x12) +80003ce4: 01420863 beq x4,x20,80003cf4 +80003ce8: 019012ef jal x5,80005500 +80003cec: 80003cdc .word 0x80003cdc +80003cf0: 8000efea .word 0x8000efea +80003cf4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x8011f3c8 +80003cf8: 000b2703 lw x14,0(x22) +80003cfc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xc71b9702 +80003d00: 000b2a83 lw x21,0(x22) +80003d04: 004b0b13 addi x22,x22,4 + +80003d08 : +Zbkc_clmul_cg_cmp_rd_rs2_b21: + clmul x21, x14, x21 # perform operation +80003d08: 0b571ab3 clmul x21,x14,x21 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkc_clmul_cg_cmp_rd_rs2_b21, Zbkc_clmul_cg_cmp_rd_rs2_b21_str) +80003d0c: 00062203 lw x4,0(x12) +80003d10: 01520863 beq x4,x21,80003d20 +80003d14: 7ec012ef jal x5,80005500 +80003d18: 80003d08 .word 0x80003d08 +80003d1c: 8000f023 .word 0x8000f023 +80003d20: 00460613 addi x12,x12,4 + + mv x3, x22 # switch data pointer register to avoid conflict with test +80003d24: 000b0193 addi x3,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x5c1fdd0b +80003d28: 0001ad03 lw x26,0(x3) +80003d2c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xf507d255 +80003d30: 0001ab03 lw x22,0(x3) +80003d34: 00418193 addi x3,x3,4 + +80003d38 : +Zbkc_clmul_cg_cmp_rd_rs2_b22: + clmul x22, x26, x22 # perform operation +80003d38: 0b6d1b33 clmul x22,x26,x22 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkc_clmul_cg_cmp_rd_rs2_b22, Zbkc_clmul_cg_cmp_rd_rs2_b22_str) +80003d3c: 00062203 lw x4,0(x12) +80003d40: 01620863 beq x4,x22,80003d50 +80003d44: 7bc012ef jal x5,80005500 +80003d48: 80003d38 .word 0x80003d38 +80003d4c: 8000f05c .word 0x8000f05c +80003d50: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xdee2c1fb +80003d54: 0001ab03 lw x22,0(x3) +80003d58: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7206146d +80003d5c: 0001ab83 lw x23,0(x3) +80003d60: 00418193 addi x3,x3,4 + +80003d64 : +Zbkc_clmul_cg_cmp_rd_rs2_b23: + clmul x23, x22, x23 # perform operation +80003d64: 0b7b1bb3 clmul x23,x22,x23 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkc_clmul_cg_cmp_rd_rs2_b23, Zbkc_clmul_cg_cmp_rd_rs2_b23_str) +80003d68: 00062203 lw x4,0(x12) +80003d6c: 01720863 beq x4,x23,80003d7c +80003d70: 790012ef jal x5,80005500 +80003d74: 80003d64 .word 0x80003d64 +80003d78: 8000f095 .word 0x8000f095 +80003d7c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x1dcca35a +80003d80: 0001aa83 lw x21,0(x3) +80003d84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x8c46cd75 +80003d88: 0001ac03 lw x24,0(x3) +80003d8c: 00418193 addi x3,x3,4 + +80003d90 : +Zbkc_clmul_cg_cmp_rd_rs2_b24: + clmul x24, x21, x24 # perform operation +80003d90: 0b8a9c33 clmul x24,x21,x24 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkc_clmul_cg_cmp_rd_rs2_b24, Zbkc_clmul_cg_cmp_rd_rs2_b24_str) +80003d94: 00062203 lw x4,0(x12) +80003d98: 01820863 beq x4,x24,80003da8 +80003d9c: 764012ef jal x5,80005500 +80003da0: 80003d90 .word 0x80003d90 +80003da4: 8000f0ce .word 0x8000f0ce +80003da8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x6f1b61e7 +80003dac: 0001a683 lw x13,0(x3) +80003db0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x128b90ca +80003db4: 0001ac83 lw x25,0(x3) +80003db8: 00418193 addi x3,x3,4 + +80003dbc : +Zbkc_clmul_cg_cmp_rd_rs2_b25: + clmul x25, x13, x25 # perform operation +80003dbc: 0b969cb3 clmul x25,x13,x25 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkc_clmul_cg_cmp_rd_rs2_b25, Zbkc_clmul_cg_cmp_rd_rs2_b25_str) +80003dc0: 00062203 lw x4,0(x12) +80003dc4: 01920863 beq x4,x25,80003dd4 +80003dc8: 738012ef jal x5,80005500 +80003dcc: 80003dbc .word 0x80003dbc +80003dd0: 8000f107 .word 0x8000f107 +80003dd4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xb3c2845c +80003dd8: 0001a703 lw x14,0(x3) +80003ddc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xeb310b3a +80003de0: 0001ad03 lw x26,0(x3) +80003de4: 00418193 addi x3,x3,4 + +80003de8 : +Zbkc_clmul_cg_cmp_rd_rs2_b26: + clmul x26, x14, x26 # perform operation +80003de8: 0ba71d33 clmul x26,x14,x26 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkc_clmul_cg_cmp_rd_rs2_b26, Zbkc_clmul_cg_cmp_rd_rs2_b26_str) +80003dec: 00062203 lw x4,0(x12) +80003df0: 01a20863 beq x4,x26,80003e00 +80003df4: 70c012ef jal x5,80005500 +80003df8: 80003de8 .word 0x80003de8 +80003dfc: 8000f140 .word 0x8000f140 +80003e00: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xf5ffc247 +80003e04: 0001ae83 lw x29,0(x3) +80003e08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xddae9b20 +80003e0c: 0001ad83 lw x27,0(x3) +80003e10: 00418193 addi x3,x3,4 + +80003e14 : +Zbkc_clmul_cg_cmp_rd_rs2_b27: + clmul x27, x29, x27 # perform operation +80003e14: 0bbe9db3 clmul x27,x29,x27 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkc_clmul_cg_cmp_rd_rs2_b27, Zbkc_clmul_cg_cmp_rd_rs2_b27_str) +80003e18: 00062203 lw x4,0(x12) +80003e1c: 01b20863 beq x4,x27,80003e2c +80003e20: 6e0012ef jal x5,80005500 +80003e24: 80003e14 .word 0x80003e14 +80003e28: 8000f179 .word 0x8000f179 +80003e2c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x6dd5232b +80003e30: 0001a703 lw x14,0(x3) +80003e34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x2f2d7655 +80003e38: 0001ae03 lw x28,0(x3) +80003e3c: 00418193 addi x3,x3,4 + +80003e40 : +Zbkc_clmul_cg_cmp_rd_rs2_b28: + clmul x28, x14, x28 # perform operation +80003e40: 0bc71e33 clmul x28,x14,x28 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkc_clmul_cg_cmp_rd_rs2_b28, Zbkc_clmul_cg_cmp_rd_rs2_b28_str) +80003e44: 00062203 lw x4,0(x12) +80003e48: 01c20863 beq x4,x28,80003e58 +80003e4c: 6b4012ef jal x5,80005500 +80003e50: 80003e40 .word 0x80003e40 +80003e54: 8000f1b2 .word 0x8000f1b2 +80003e58: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x3cb0953b +80003e5c: 0001a403 lw x8,0(x3) +80003e60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xdab4ddbb +80003e64: 0001ae83 lw x29,0(x3) +80003e68: 00418193 addi x3,x3,4 + +80003e6c : +Zbkc_clmul_cg_cmp_rd_rs2_b29: + clmul x29, x8, x29 # perform operation +80003e6c: 0bd41eb3 clmul x29,x8,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkc_clmul_cg_cmp_rd_rs2_b29, Zbkc_clmul_cg_cmp_rd_rs2_b29_str) +80003e70: 00062203 lw x4,0(x12) +80003e74: 01d20863 beq x4,x29,80003e84 +80003e78: 688012ef jal x5,80005500 +80003e7c: 80003e6c .word 0x80003e6c +80003e80: 8000f1eb .word 0x8000f1eb +80003e84: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x5875cc45 +80003e88: 0001a383 lw x7,0(x3) +80003e8c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x2447bb32 +80003e90: 0001af03 lw x30,0(x3) +80003e94: 00418193 addi x3,x3,4 + +80003e98 : +Zbkc_clmul_cg_cmp_rd_rs2_b30: + clmul x30, x7, x30 # perform operation +80003e98: 0be39f33 clmul x30,x7,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkc_clmul_cg_cmp_rd_rs2_b30, Zbkc_clmul_cg_cmp_rd_rs2_b30_str) +80003e9c: 00062203 lw x4,0(x12) +80003ea0: 01e20863 beq x4,x30,80003eb0 +80003ea4: 65c012ef jal x5,80005500 +80003ea8: 80003e98 .word 0x80003e98 +80003eac: 8000f224 .word 0x8000f224 +80003eb0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xa1213d57 +80003eb4: 0001af03 lw x30,0(x3) +80003eb8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x709b4f53 +80003ebc: 0001af83 lw x31,0(x3) +80003ec0: 00418193 addi x3,x3,4 + +80003ec4 : +Zbkc_clmul_cg_cmp_rd_rs2_b31: + clmul x31, x30, x31 # perform operation +80003ec4: 0bff1fb3 clmul x31,x30,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkc_clmul_cg_cmp_rd_rs2_b31, Zbkc_clmul_cg_cmp_rd_rs2_b31_str) +80003ec8: 00062203 lw x4,0(x12) +80003ecc: 01f20863 beq x4,x31,80003edc +80003ed0: 630012ef jal x5,80005500 +80003ed4: 80003ec4 .word 0x80003ec4 +80003ed8: 8000f25d .word 0x8000f25d +80003edc: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xe4a2ca01 +80003ee0: 0001a003 lw x0,0(x3) +80003ee4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0xb84bac44 +80003ee8: 0001a003 lw x0,0(x3) +80003eec: 00418193 addi x3,x3,4 + +80003ef0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0: + clmul x0, x0, x0 # perform operation +80003ef0: 0a001033 clmul x0,x0,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0_str) +80003ef4: 00062203 lw x4,0(x12) +80003ef8: 00020863 beq x4,x0,80003f08 +80003efc: 604012ef jal x5,80005500 +80003f00: 80003ef0 .word 0x80003ef0 +80003f04: 8000f296 .word 0x8000f296 +80003f08: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xddda788f +80003f0c: 0001a083 lw x1,0(x3) +80003f10: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x7f1ee6ab +80003f14: 0001a083 lw x1,0(x3) +80003f18: 00418193 addi x3,x3,4 + +80003f1c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1: + clmul x1, x1, x1 # perform operation +80003f1c: 0a1090b3 clmul x1,x1,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1_str) +80003f20: 00062203 lw x4,0(x12) +80003f24: 00120863 beq x4,x1,80003f34 +80003f28: 5d8012ef jal x5,80005500 +80003f2c: 80003f1c .word 0x80003f1c +80003f30: 8000f2d2 .word 0x8000f2d2 +80003f34: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xe2ad8df8 +80003f38: 0001a103 lw x2,0(x3) +80003f3c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x16330eef +80003f40: 0001a103 lw x2,0(x3) +80003f44: 00418193 addi x3,x3,4 + +80003f48 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2: + clmul x2, x2, x2 # perform operation +80003f48: 0a211133 clmul x2,x2,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2_str) +80003f4c: 00062203 lw x4,0(x12) +80003f50: 00220863 beq x4,x2,80003f60 +80003f54: 5ac012ef jal x5,80005500 +80003f58: 80003f48 .word 0x80003f48 +80003f5c: 8000f30e .word 0x8000f30e +80003f60: 00460613 addi x12,x12,4 + + mv x9, x3 # switch data pointer register to avoid conflict with test +80003f64: 00018493 addi x9,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xac3e61b1 +80003f68: 0004a183 lw x3,0(x9) +80003f6c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xe542a3b7 +80003f70: 0004a183 lw x3,0(x9) +80003f74: 00448493 addi x9,x9,4 + +80003f78 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3: + clmul x3, x3, x3 # perform operation +80003f78: 0a3191b3 clmul x3,x3,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3_str) +80003f7c: 00062203 lw x4,0(x12) +80003f80: 00320863 beq x4,x3,80003f90 +80003f84: 57c012ef jal x5,80005500 +80003f88: 80003f78 .word 0x80003f78 +80003f8c: 8000f34a .word 0x8000f34a +80003f90: 00460613 addi x12,x12,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f94: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f98: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x8c198c6d +80003f9c: 0004a203 lw x4,0(x9) +80003fa0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x9f257d11 +80003fa4: 0004a203 lw x4,0(x9) +80003fa8: 00448493 addi x9,x9,4 + +80003fac : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4: + clmul x4, x4, x4 # perform operation +80003fac: 0a421233 clmul x4,x4,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4_str) +80003fb0: 00062683 lw x13,0(x12) +80003fb4: 00468863 beq x13,x4,80003fc4 +80003fb8: 5880176f jal x14,80005540 +80003fbc: 80003fac .word 0x80003fac +80003fc0: 8000f386 .word 0x8000f386 +80003fc4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xa93c9dc6 +80003fc8: 0004a283 lw x5,0(x9) +80003fcc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x3e9696ab +80003fd0: 0004a283 lw x5,0(x9) +80003fd4: 00448493 addi x9,x9,4 + +80003fd8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5: + clmul x5, x5, x5 # perform operation +80003fd8: 0a5292b3 clmul x5,x5,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5_str) +80003fdc: 00062683 lw x13,0(x12) +80003fe0: 00568863 beq x13,x5,80003ff0 +80003fe4: 55c0176f jal x14,80005540 +80003fe8: 80003fd8 .word 0x80003fd8 +80003fec: 8000f3c2 .word 0x8000f3c2 +80003ff0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x76522deb +80003ff4: 0004a303 lw x6,0(x9) +80003ff8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x3bde94af +80003ffc: 0004a303 lw x6,0(x9) +80004000: 00448493 addi x9,x9,4 + +80004004 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6: + clmul x6, x6, x6 # perform operation +80004004: 0a631333 clmul x6,x6,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6_str) +80004008: 00062683 lw x13,0(x12) +8000400c: 00668863 beq x13,x6,8000401c +80004010: 5300176f jal x14,80005540 +80004014: 80004004 .word 0x80004004 +80004018: 8000f3fe .word 0x8000f3fe +8000401c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x8c294666 +80004020: 0004a383 lw x7,0(x9) +80004024: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x23dcd366 +80004028: 0004a383 lw x7,0(x9) +8000402c: 00448493 addi x9,x9,4 + +80004030 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7: + clmul x7, x7, x7 # perform operation +80004030: 0a7393b3 clmul x7,x7,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7_str) +80004034: 00062683 lw x13,0(x12) +80004038: 00768863 beq x13,x7,80004048 +8000403c: 5040176f jal x14,80005540 +80004040: 80004030 .word 0x80004030 +80004044: 8000f43a .word 0x8000f43a +80004048: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x7e6379f4 +8000404c: 0004a403 lw x8,0(x9) +80004050: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xbbfb7ed1 +80004054: 0004a403 lw x8,0(x9) +80004058: 00448493 addi x9,x9,4 + +8000405c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8: + clmul x8, x8, x8 # perform operation +8000405c: 0a841433 clmul x8,x8,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8_str) +80004060: 00062683 lw x13,0(x12) +80004064: 00868863 beq x13,x8,80004074 +80004068: 4d80176f jal x14,80005540 +8000406c: 8000405c .word 0x8000405c +80004070: 8000f476 .word 0x8000f476 +80004074: 00460613 addi x12,x12,4 + + mv x23, x9 # switch data pointer register to avoid conflict with test +80004078: 00048b93 addi x23,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xbe0f9b2c +8000407c: 000ba483 lw x9,0(x23) +80004080: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x5e7d44fc +80004084: 000ba483 lw x9,0(x23) +80004088: 004b8b93 addi x23,x23,4 + +8000408c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9: + clmul x9, x9, x9 # perform operation +8000408c: 0a9494b3 clmul x9,x9,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9_str) +80004090: 00062683 lw x13,0(x12) +80004094: 00968863 beq x13,x9,800040a4 +80004098: 4a80176f jal x14,80005540 +8000409c: 8000408c .word 0x8000408c +800040a0: 8000f4b2 .word 0x8000f4b2 +800040a4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xba8f656a +800040a8: 000ba503 lw x10,0(x23) +800040ac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x9a85444b +800040b0: 000ba503 lw x10,0(x23) +800040b4: 004b8b93 addi x23,x23,4 + +800040b8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10: + clmul x10, x10, x10 # perform operation +800040b8: 0aa51533 clmul x10,x10,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10_str) +800040bc: 00062683 lw x13,0(x12) +800040c0: 00a68863 beq x13,x10,800040d0 +800040c4: 47c0176f jal x14,80005540 +800040c8: 800040b8 .word 0x800040b8 +800040cc: 8000f4ee .word 0x8000f4ee +800040d0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x55096db4 +800040d4: 000ba583 lw x11,0(x23) +800040d8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xfd337cc7 +800040dc: 000ba583 lw x11,0(x23) +800040e0: 004b8b93 addi x23,x23,4 + +800040e4 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11: + clmul x11, x11, x11 # perform operation +800040e4: 0ab595b3 clmul x11,x11,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11_str) +800040e8: 00062683 lw x13,0(x12) +800040ec: 00b68863 beq x13,x11,800040fc +800040f0: 4500176f jal x14,80005540 +800040f4: 800040e4 .word 0x800040e4 +800040f8: 8000f52b .word 0x8000f52b +800040fc: 00460613 addi x12,x12,4 + + mv x9, x12 # switch signature pointer register to avoid conflict with test +80004100: 00060493 addi x9,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xdbd29ab5 +80004104: 000ba603 lw x12,0(x23) +80004108: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x1f7eefc6 +8000410c: 000ba603 lw x12,0(x23) +80004110: 004b8b93 addi x23,x23,4 + +80004114 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12: + clmul x12, x12, x12 # perform operation +80004114: 0ac61633 clmul x12,x12,x12 + # Check if x12 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x12, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12_str) +80004118: 0004a683 lw x13,0(x9) +8000411c: 00c68863 beq x13,x12,8000412c +80004120: 4200176f jal x14,80005540 +80004124: 80004114 .word 0x80004114 +80004128: 8000f568 .word 0x8000f568 +8000412c: 00448493 addi x9,x9,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80004130: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004134: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x2868916c +80004138: 000ba683 lw x13,0(x23) +8000413c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xab74b234 +80004140: 000ba683 lw x13,0(x23) +80004144: 004b8b93 addi x23,x23,4 + +80004148 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13: + clmul x13, x13, x13 # perform operation +80004148: 0ad696b3 clmul x13,x13,x13 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13_str) +8000414c: 0004a383 lw x7,0(x9) +80004150: 00d38863 beq x7,x13,80004160 +80004154: 3c40146f jal x8,80005518 +80004158: 80004148 .word 0x80004148 +8000415c: 8000f5a5 .word 0x8000f5a5 +80004160: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xe722f4eb +80004164: 000ba703 lw x14,0(x23) +80004168: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x152c248d +8000416c: 000ba703 lw x14,0(x23) +80004170: 004b8b93 addi x23,x23,4 + +80004174 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14: + clmul x14, x14, x14 # perform operation +80004174: 0ae71733 clmul x14,x14,x14 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14_str) +80004178: 0004a383 lw x7,0(x9) +8000417c: 00e38863 beq x7,x14,8000418c +80004180: 3980146f jal x8,80005518 +80004184: 80004174 .word 0x80004174 +80004188: 8000f5e2 .word 0x8000f5e2 +8000418c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x6f39b323 +80004190: 000ba783 lw x15,0(x23) +80004194: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x2a310a34 +80004198: 000ba783 lw x15,0(x23) +8000419c: 004b8b93 addi x23,x23,4 + +800041a0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15: + clmul x15, x15, x15 # perform operation +800041a0: 0af797b3 clmul x15,x15,x15 + # Check if x15 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x15, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15_str) +800041a4: 0004a383 lw x7,0(x9) +800041a8: 00f38863 beq x7,x15,800041b8 +800041ac: 36c0146f jal x8,80005518 +800041b0: 800041a0 .word 0x800041a0 +800041b4: 8000f61f .word 0x8000f61f +800041b8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xe701726a +800041bc: 000ba803 lw x16,0(x23) +800041c0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xa8b6e7d9 +800041c4: 000ba803 lw x16,0(x23) +800041c8: 004b8b93 addi x23,x23,4 + +800041cc : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16: + clmul x16, x16, x16 # perform operation +800041cc: 0b081833 clmul x16,x16,x16 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16_str) +800041d0: 0004a383 lw x7,0(x9) +800041d4: 01038863 beq x7,x16,800041e4 +800041d8: 3400146f jal x8,80005518 +800041dc: 800041cc .word 0x800041cc +800041e0: 8000f65c .word 0x8000f65c +800041e4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x33a1cf68 +800041e8: 000ba883 lw x17,0(x23) +800041ec: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x2b8d1e6b +800041f0: 000ba883 lw x17,0(x23) +800041f4: 004b8b93 addi x23,x23,4 + +800041f8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17: + clmul x17, x17, x17 # perform operation +800041f8: 0b1898b3 clmul x17,x17,x17 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17_str) +800041fc: 0004a383 lw x7,0(x9) +80004200: 01138863 beq x7,x17,80004210 +80004204: 3140146f jal x8,80005518 +80004208: 800041f8 .word 0x800041f8 +8000420c: 8000f699 .word 0x8000f699 +80004210: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x535aebe9 +80004214: 000ba903 lw x18,0(x23) +80004218: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xee791ccf +8000421c: 000ba903 lw x18,0(x23) +80004220: 004b8b93 addi x23,x23,4 + +80004224 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18: + clmul x18, x18, x18 # perform operation +80004224: 0b291933 clmul x18,x18,x18 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18_str) +80004228: 0004a383 lw x7,0(x9) +8000422c: 01238863 beq x7,x18,8000423c +80004230: 2e80146f jal x8,80005518 +80004234: 80004224 .word 0x80004224 +80004238: 8000f6d6 .word 0x8000f6d6 +8000423c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xc0bef444 +80004240: 000ba983 lw x19,0(x23) +80004244: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xd4a8b466 +80004248: 000ba983 lw x19,0(x23) +8000424c: 004b8b93 addi x23,x23,4 + +80004250 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19: + clmul x19, x19, x19 # perform operation +80004250: 0b3999b3 clmul x19,x19,x19 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19_str) +80004254: 0004a383 lw x7,0(x9) +80004258: 01338863 beq x7,x19,80004268 +8000425c: 2bc0146f jal x8,80005518 +80004260: 80004250 .word 0x80004250 +80004264: 8000f713 .word 0x8000f713 +80004268: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xd0e92c7b +8000426c: 000baa03 lw x20,0(x23) +80004270: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xb7883aa0 +80004274: 000baa03 lw x20,0(x23) +80004278: 004b8b93 addi x23,x23,4 + +8000427c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20: + clmul x20, x20, x20 # perform operation +8000427c: 0b4a1a33 clmul x20,x20,x20 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20_str) +80004280: 0004a383 lw x7,0(x9) +80004284: 01438863 beq x7,x20,80004294 +80004288: 2900146f jal x8,80005518 +8000428c: 8000427c .word 0x8000427c +80004290: 8000f750 .word 0x8000f750 +80004294: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x243b1889 +80004298: 000baa83 lw x21,0(x23) +8000429c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x7f44b83e +800042a0: 000baa83 lw x21,0(x23) +800042a4: 004b8b93 addi x23,x23,4 + +800042a8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21: + clmul x21, x21, x21 # perform operation +800042a8: 0b5a9ab3 clmul x21,x21,x21 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21_str) +800042ac: 0004a383 lw x7,0(x9) +800042b0: 01538863 beq x7,x21,800042c0 +800042b4: 2640146f jal x8,80005518 +800042b8: 800042a8 .word 0x800042a8 +800042bc: 8000f78d .word 0x8000f78d +800042c0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xcec7bcad +800042c4: 000bab03 lw x22,0(x23) +800042c8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xdf4f53a2 +800042cc: 000bab03 lw x22,0(x23) +800042d0: 004b8b93 addi x23,x23,4 + +800042d4 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22: + clmul x22, x22, x22 # perform operation +800042d4: 0b6b1b33 clmul x22,x22,x22 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22_str) +800042d8: 0004a383 lw x7,0(x9) +800042dc: 01638863 beq x7,x22,800042ec +800042e0: 2380146f jal x8,80005518 +800042e4: 800042d4 .word 0x800042d4 +800042e8: 8000f7ca .word 0x8000f7ca +800042ec: 00448493 addi x9,x9,4 + + mv x18, x23 # switch data pointer register to avoid conflict with test +800042f0: 000b8913 addi x18,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x43a0b777 +800042f4: 00092b83 lw x23,0(x18) +800042f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x1913d4b3 +800042fc: 00092b83 lw x23,0(x18) +80004300: 00490913 addi x18,x18,4 + +80004304 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23: + clmul x23, x23, x23 # perform operation +80004304: 0b7b9bb3 clmul x23,x23,x23 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 0004a383 lw x7,0(x9) +8000430c: 01738863 beq x7,x23,8000431c +80004310: 2080146f jal x8,80005518 +80004314: 80004304 .word 0x80004304 +80004318: 8000f807 .word 0x8000f807 +8000431c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x5690d731 +80004320: 00092c03 lw x24,0(x18) +80004324: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xb17e72c9 +80004328: 00092c03 lw x24,0(x18) +8000432c: 00490913 addi x18,x18,4 + +80004330 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24: + clmul x24, x24, x24 # perform operation +80004330: 0b8c1c33 clmul x24,x24,x24 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 0004a383 lw x7,0(x9) +80004338: 01838863 beq x7,x24,80004348 +8000433c: 1dc0146f jal x8,80005518 +80004340: 80004330 .word 0x80004330 +80004344: 8000f844 .word 0x8000f844 +80004348: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x83420f59 +8000434c: 00092c83 lw x25,0(x18) +80004350: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x288f3c71 +80004354: 00092c83 lw x25,0(x18) +80004358: 00490913 addi x18,x18,4 + +8000435c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25: + clmul x25, x25, x25 # perform operation +8000435c: 0b9c9cb3 clmul x25,x25,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 0004a383 lw x7,0(x9) +80004364: 01938863 beq x7,x25,80004374 +80004368: 1b00146f jal x8,80005518 +8000436c: 8000435c .word 0x8000435c +80004370: 8000f881 .word 0x8000f881 +80004374: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x989e46dd +80004378: 00092d03 lw x26,0(x18) +8000437c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x42d439d3 +80004380: 00092d03 lw x26,0(x18) +80004384: 00490913 addi x18,x18,4 + +80004388 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26: + clmul x26, x26, x26 # perform operation +80004388: 0bad1d33 clmul x26,x26,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 0004a383 lw x7,0(x9) +80004390: 01a38863 beq x7,x26,800043a0 +80004394: 1840146f jal x8,80005518 +80004398: 80004388 .word 0x80004388 +8000439c: 8000f8be .word 0x8000f8be +800043a0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x9f8ebf95 +800043a4: 00092d83 lw x27,0(x18) +800043a8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x0a998dcc +800043ac: 00092d83 lw x27,0(x18) +800043b0: 00490913 addi x18,x18,4 + +800043b4 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27: + clmul x27, x27, x27 # perform operation +800043b4: 0bbd9db3 clmul x27,x27,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27_str) +800043b8: 0004a383 lw x7,0(x9) +800043bc: 01b38863 beq x7,x27,800043cc +800043c0: 1580146f jal x8,80005518 +800043c4: 800043b4 .word 0x800043b4 +800043c8: 8000f8fb .word 0x8000f8fb +800043cc: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x4bf9501a +800043d0: 00092e03 lw x28,0(x18) +800043d4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x90c45c89 +800043d8: 00092e03 lw x28,0(x18) +800043dc: 00490913 addi x18,x18,4 + +800043e0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28: + clmul x28, x28, x28 # perform operation +800043e0: 0bce1e33 clmul x28,x28,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28_str) +800043e4: 0004a383 lw x7,0(x9) +800043e8: 01c38863 beq x7,x28,800043f8 +800043ec: 12c0146f jal x8,80005518 +800043f0: 800043e0 .word 0x800043e0 +800043f4: 8000f938 .word 0x8000f938 +800043f8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xc469077a +800043fc: 00092e83 lw x29,0(x18) +80004400: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x56c57e78 +80004404: 00092e83 lw x29,0(x18) +80004408: 00490913 addi x18,x18,4 + +8000440c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29: + clmul x29, x29, x29 # perform operation +8000440c: 0bde9eb3 clmul x29,x29,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29_str) +80004410: 0004a383 lw x7,0(x9) +80004414: 01d38863 beq x7,x29,80004424 +80004418: 1000146f jal x8,80005518 +8000441c: 8000440c .word 0x8000440c +80004420: 8000f975 .word 0x8000f975 +80004424: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x4ba00c92 +80004428: 00092f03 lw x30,0(x18) +8000442c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x4dfcb6df +80004430: 00092f03 lw x30,0(x18) +80004434: 00490913 addi x18,x18,4 + +80004438 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30: + clmul x30, x30, x30 # perform operation +80004438: 0bef1f33 clmul x30,x30,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30_str) +8000443c: 0004a383 lw x7,0(x9) +80004440: 01e38863 beq x7,x30,80004450 +80004444: 0d40146f jal x8,80005518 +80004448: 80004438 .word 0x80004438 +8000444c: 8000f9b2 .word 0x8000f9b2 +80004450: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x05270fd8 +80004454: 00092f83 lw x31,0(x18) +80004458: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x8b2cd3f6 +8000445c: 00092f83 lw x31,0(x18) +80004460: 00490913 addi x18,x18,4 + +80004464 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31: + clmul x31, x31, x31 # perform operation +80004464: 0bff9fb3 clmul x31,x31,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31_str) +80004468: 0004a383 lw x7,0(x9) +8000446c: 01f38863 beq x7,x31,8000447c +80004470: 0a80146f jal x8,80005518 +80004474: 80004464 .word 0x80004464 +80004478: 8000f9ef .word 0x8000f9ef +8000447c: 00448493 addi x9,x9,4 + + mv x2, x9 # restore signature pointer to default register for teardown +80004480: 00048113 addi x2,x9,0 + +80004484 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004484: 00000513 addi x10,x0,0 +80004488: 00000073 ecall +8000448c: fff00513 addi x10,x0,-1 +80004490: 1d800413 addi x8,x0,472 + +80004494 : +80004494: 34002373 csrrs x6,mscratch,x0 + +80004498 : +80004498: 23832383 lw x7,568(x6) +8000449c: 23c32483 lw x9,572(x6) + +800044a0 : +800044a0: 22032383 lw x7,544(x6) + +800044a4 : +800044a4: 25032483 lw x9,592(x6) +800044a8: 34049073 csrrw x0,mscratch,x9 + +800044ac : +800044ac: 24832483 lw x9,584(x6) +800044b0: 305493f3 csrrw x7,mtvec,x9 +800044b4: ffc4f493 andi x9,x9,-4 +800044b8: ffc3f393 andi x7,x7,-4 +800044bc: 00749e63 bne x9,x7,800044d8 + +800044c0 : +800044c0: 00030493 addi x9,x6,0 + +800044c4 : +800044c4: 0004a783 lw x15,0(x9) +800044c8: 00f3a023 sw x15,0(x7) +800044cc: 00438393 addi x7,x7,4 +800044d0: 00448493 addi x9,x9,4 +800044d4: fe83c8e3 blt x7,x8,800044c4 +800044d8: 0000100f fence.i + +800044dc : +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: b8f50513 addi x10,x10,-1137 # 800100af +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: b8950513 addi x10,x10,-1143 # 800100e9 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: ba950513 addi x10,x10,-1111 # 80010149 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000c517 auipc x10,0xc +800045e4: 71450513 addi x10,x10,1812 # 80010cf4 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000d397 auipc x7,0xd +80004664: 76838393 addi x7,x7,1896 # 80011dc8 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000d417 auipc x8,0xd +800046a4: 72040413 addi x8,x8,1824 # 80011dc0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8001029d .word 0x8001029d + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8001010b .word 0x8001010b +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 97450513 addi x10,x10,-1676 # 80010074 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 96f50513 addi x10,x10,-1681 # 800100af +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce5ff06f jal x0,80004484 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: cd9ff06f jal x0,80004484 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7c30313 addi x6,x6,-1156 # 800044dc +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: beb50513 addi x10,x10,-1045 # 8001172b +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: 01850513 addi x10,x10,24 # 8000fb98 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 5f250513 addi x10,x10,1522 # 800101b2 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 4af50513 addi x10,x10,1199 # 800100af +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: b9848493 addi x9,x9,-1128 # 8000fb78 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 80c40413 addi x8,x8,-2036 # 8002082c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 800102b4 .word 0x800102b4 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 800103b6 .word 0x800103b6 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 800104b1 .word 0x800104b1 +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 800105a4 .word 0x800105a4 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80010717 .word 0x80010717 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 53020213 addi x4,x4,1328 # 8000fa30 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 51838393 addi x7,x7,1304 # 8000fa30 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 4f068693 addi x13,x13,1264 # 8000fa30 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 4c848493 addi x9,x9,1224 # 8000fa30 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 4244a483 lw x9,1060(x9) # 8000fa30 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: 0b040413 addi x8,x8,176 # 80011770 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: 13040413 addi x8,x8,304 # 80020830 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 41848493 addi x9,x9,1048 # 8000fb58 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 3d848493 addi x9,x9,984 # 8000fb58 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 3b880813 addi x16,x16,952 # 8000fb68 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 3a480813 addi x16,x16,932 # 8000fb68 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: acd38393 addi x7,x7,-1331 # 8001029d +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 38080813 addi x16,x16,896 # 8000fb60 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: ac838393 addi x7,x7,-1336 # 800102b4 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: bb238393 addi x7,x7,-1102 # 800103b6 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: c9538393 addi x7,x7,-875 # 800104b1 +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: d7038393 addi x7,x7,-656 # 800105a4 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: ecb38393 addi x7,x7,-309 # 80010717 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: e3738393 addi x7,x7,-457 # 8001069b +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: e5d38393 addi x7,x7,-419 # 800106d9 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: a6038393 addi x7,x7,-1440 # 800102f4 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: b4838393 addi x7,x7,-1208 # 800103f4 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: c2938393 addi x7,x7,-983 # 800104ed +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: d0538393 addi x7,x7,-763 # 800105e1 +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: e5e38393 addi x7,x7,-418 # 80010752 +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: a2838393 addi x7,x7,-1496 # 80010334 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: b0e38393 addi x7,x7,-1266 # 80010432 +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: bed38393 addi x7,x7,-1043 # 80010529 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: cca38393 addi x7,x7,-822 # 8001061e +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: e2138393 addi x7,x7,-479 # 8001078d +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 9f138393 addi x7,x7,-1551 # 80010375 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: ad538393 addi x7,x7,-1323 # 80010471 +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: bb238393 addi x7,x7,-1102 # 80010566 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: c9038393 addi x7,x7,-880 # 8001065c +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: de538393 addi x7,x7,-539 # 800107c9 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: e0a38393 addi x7,x7,-502 # 80010806 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: e4138393 addi x7,x7,-447 # 80010855 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: f2438393 addi x7,x7,-220 # 80010950 +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: 00838393 addi x7,x7,8 # 80010a4c +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: 0fc80813 addi x16,x16,252 # 8000fb60 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: 0ec80813 addi x16,x16,236 # 8000fb60 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: 0e480813 addi x16,x16,228 # 8000fb64 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: 0d080813 addi x16,x16,208 # 8000fb60 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 5cf50513 addi x10,x10,1487 # 800100af +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 5c950513 addi x10,x10,1481 # 800100e9 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 64050513 addi x10,x10,1600 # 800101a0 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: fc852503 lw x10,-56(x10) # 8000fb50 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 61250513 addi x10,x10,1554 # 800101b2 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: e6852503 lw x10,-408(x10) # 8000fa30 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 5d450513 addi x10,x10,1492 # 800101b4 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: f2852503 lw x10,-216(x10) # 8000fb30 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: f5850513 addi x10,x10,-168 # 8000fb98 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 54850513 addi x10,x10,1352 # 800101c8 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: e9052503 lw x10,-368(x10) # 8000fb38 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: ed850513 addi x10,x10,-296 # 8000fb98 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: eff50513 addi x10,x10,-257 # 80010bff +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: d0852503 lw x10,-760(x10) # 8000fa30 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: e5860613 addi x12,x12,-424 # 8000fb98 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: dcc52503 lw x10,-564(x10) # 8000fb34 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: f7550513 addi x10,x10,-139 # 80010d15 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: db860613 addi x12,x12,-584 # 8000fb98 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: d2c52503 lw x10,-724(x10) # 8000fb34 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: d7860613 addi x12,x12,-648 # 8000fb98 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: cec52503 lw x10,-788(x10) # 8000fb34 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: d9850513 addi x10,x10,-616 # 80010bf8 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: cf850513 addi x10,x10,-776 # 8000fb98 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: d3050513 addi x10,x10,-720 # 80010c10 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: b2852503 lw x10,-1240(x10) # 8000fa30 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: c2852503 lw x10,-984(x10) # 8000fb40 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: c1452503 lw x10,-1004(x10) # 8000fb40 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: c5850513 addi x10,x10,-936 # 8000fb98 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: bf052503 lw x10,-1040(x10) # 8000fb58 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: ca750513 addi x10,x10,-857 # 80010c27 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: a8852503 lw x10,-1400(x10) # 8000fa30 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: b9052503 lw x10,-1136(x10) # 8000fb48 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: b7c52503 lw x10,-1156(x10) # 8000fb48 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: bb850513 addi x10,x10,-1096 # 8000fb98 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: c1e50513 addi x10,x10,-994 # 80010c3e +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 0000a517 auipc x10,0xa +8000604c: b0052503 lw x10,-1280(x10) # 8000fb48 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: b3850513 addi x10,x10,-1224 # 8000fb98 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: bfc50513 addi x10,x10,-1028 # 80010c9c +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 0000a517 auipc x10,0xa +800060cc: a8052503 lw x10,-1408(x10) # 8000fb48 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: ab850513 addi x10,x10,-1352 # 8000fb98 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: a5442403 lw x8,-1452(x8) # 8000fb60 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: c2150513 addi x10,x10,-991 # 80010d41 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: c0d50513 addi x10,x10,-1011 # 80010d6d +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 0000a817 auipc x16,0xa +8000618c: 9e080813 addi x16,x16,-1568 # 8000fb68 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: 01250513 addi x10,x10,18 # 800101b2 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: b9d50513 addi x10,x10,-1123 # 80010d7d +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 0000a517 auipc x10,0xa +8000620c: 94052503 lw x10,-1728(x10) # 8000fb48 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 97850513 addi x10,x10,-1672 # 8000fb98 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: b4850513 addi x10,x10,-1208 # 80010da8 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 0000a517 auipc x10,0xa +8000628c: 8b852503 lw x10,-1864(x10) # 8000fb40 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 8f850513 addi x10,x10,-1800 # 8000fb98 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 87832303 lw x6,-1928(x6) # 8000fb40 +800062d0: 0000a397 auipc x7,0xa +800062d4: 8783a383 lw x7,-1928(x7) # 8000fb48 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: af750513 addi x10,x10,-1289 # 80010dd7 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: b1f50513 addi x10,x10,-1249 # 80010e3f +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00009317 auipc x6,0x9 +8000634c: 7f832303 lw x6,2040(x6) # 8000fb40 +80006350: 00009397 auipc x7,0x9 +80006354: 7f83a383 lw x7,2040(x7) # 8000fb48 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 81850513 addi x10,x10,-2024 # 8000fb98 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: aa650513 addi x10,x10,-1370 # 80010e66 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: a0350513 addi x10,x10,-1533 # 80010e03 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 9ff50513 addi x10,x10,-1537 # 80010e3f +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00009317 auipc x6,0x9 +8000646c: 6e032303 lw x6,1760(x6) # 8000fb48 +80006470: 00009397 auipc x7,0x9 +80006474: 6d03a383 lw x7,1744(x7) # 8000fb40 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 00009517 auipc x10,0x9 +800064a4: 6f850513 addi x10,x10,1784 # 8000fb98 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: a6e50513 addi x10,x10,-1426 # 80010f4e +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: b1550513 addi x10,x10,-1259 # 80011035 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 61c52503 lw x10,1564(x10) # 8000fb64 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: af150513 addi x10,x10,-1295 # 80011071 +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: a8f50513 addi x10,x10,-1393 # 8001104f +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: a5750513 addi x10,x10,-1449 # 80011057 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: a1f50513 addi x10,x10,-1505 # 8001105f +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 9e850513 addi x10,x10,-1560 # 80011068 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 9ba50513 addi x10,x10,-1606 # 8001107a +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 47852503 lw x10,1144(x10) # 8000fb60 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: a9150513 addi x10,x10,-1391 # 800111d1 +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 91450513 addi x10,x10,-1772 # 80011094 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 90550513 addi x10,x10,-1787 # 800110c5 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 8e550513 addi x10,x10,-1819 # 800110e5 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 8c350513 addi x10,x10,-1853 # 80011103 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 8a250513 addi x10,x10,-1886 # 80011122 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 88a50513 addi x10,x10,-1910 # 8001114a +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 87650513 addi x10,x10,-1930 # 80011176 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 86250513 addi x10,x10,-1950 # 800111a2 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 86050513 addi x10,x10,-1952 # 800111e0 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: 1a052503 lw x10,416(x10) # 8000fb48 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: 1d850513 addi x10,x10,472 # 8000fb98 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000a517 auipc x10,0xa +80006a04: 7f750513 addi x10,x10,2039 # 800111f7 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: 11852503 lw x10,280(x10) # 8000fb40 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: 15850513 addi x10,x10,344 # 8000fb98 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: 0f852503 lw x10,248(x10) # 8000fb60 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000a517 auipc x10,0xa +80006a84: 78e50513 addi x10,x10,1934 # 8001120e +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: 0a052503 lw x10,160(x10) # 8000fb48 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000a517 auipc x10,0xa +80006ac4: 76550513 addi x10,x10,1893 # 80011225 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: 05852503 lw x10,88(x10) # 8000fb40 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: 05c52503 lw x10,92(x10) # 8000fb60 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000a517 auipc x10,0xa +80006b24: 77b50513 addi x10,x10,1915 # 8001129b +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 81150513 addi x10,x10,-2031 # 80011371 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 8c450513 addi x10,x10,-1852 # 80011464 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 97f50513 addi x10,x10,-1665 # 8001155f +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: a2650513 addi x10,x10,-1498 # 80011646 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 5f350513 addi x10,x10,1523 # 80011253 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: ef062603 lw x12,-272(x12) # 8000fb78 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 59c50513 addi x10,x10,1436 # 8001023c +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: e9850513 addi x10,x10,-360 # 8000fb98 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: e8058593 addi x11,x11,-384 # 8000fbc0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: eb458593 addi x11,x11,-332 # 8000fc20 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: 2be50513 addi x10,x10,702 # 8001005e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: f1450513 addi x10,x10,-236 # 80010cf4 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: d6060613 addi x12,x12,-672 # 8000fb70 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 43d50513 addi x10,x10,1085 # 8001025d +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: d3052503 lw x10,-720(x10) # 8000fb78 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: d3850513 addi x10,x10,-712 # 8000fb98 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 3cd50513 addi x10,x10,973 # 8001026d +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: cb852503 lw x10,-840(x10) # 8000fb80 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: cb850513 addi x10,x10,-840 # 8000fb98 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 35d50513 addi x10,x10,861 # 8001027d +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: c4052503 lw x10,-960(x10) # 8000fb88 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: c3850513 addi x10,x10,-968 # 8000fb98 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 2ed50513 addi x10,x10,749 # 8001028d +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: bc852503 lw x10,-1080(x10) # 8000fb90 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: bb850513 addi x10,x10,-1096 # 8000fb98 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: b6860613 addi x12,x12,-1176 # 8000fb70 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: b7860613 addi x12,x12,-1160 # 8000fb98 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3e830313 addi x6,x6,1000 # 80004484 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3d030313 addi x6,x6,976 # 80004484 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3b830313 addi x6,x6,952 # 80004484 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 25478793 addi x15,x15,596 # 80004494 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 2d010113 addi x2,x2,720 # 80011770 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010d1d .word 0x80010d1d +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 35828293 addi x5,x5,856 # 80020900 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 33828293 addi x5,x5,824 # 80020900 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkc-clmulh-00.elf.objdump b/riscv-tests/rv32-Zbkc-clmulh-00.elf.objdump new file mode 100644 index 0000000..d9cec3d --- /dev/null +++ b/riscv-tests/rv32-Zbkc-clmulh-00.elf.objdump @@ -0,0 +1,13193 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkc/Zbkc-clmulh-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkc/Zbkc-clmulh-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000189d0 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020a00 80020a00 00021a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000265e 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 00000000 00000000 00024cd9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d55 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d78 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024d90 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 00000000 00000000 00024db8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e42 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020a00 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc1DztE3.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b1 +80009023 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b2 +80009056 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b3 +80009089 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090bc l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b5 +800090ef l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b6 +80009122 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b7 +80009155 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b8 +80009188 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b9 +800091bb l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b10 +800091ef l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b11 +80009224 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b12 +80009259 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b13 +8000928e l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b14 +800092c3 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b15 +800092f8 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b16 +8000932d l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b17 +80009362 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b18 +80009397 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b19 +800093cc l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b20 +80009401 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b21 +80009436 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b22 +8000946b l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b22_str +80000460 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b23 +800094a0 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b23_str +8000048c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b24 +800094d5 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b24_str +800004b8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b25 +8000950a l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b25_str +800004e4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b26 +8000953f l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b27 +80009574 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b28 +800095a9 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b28_str +80000570 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b29 +800095de l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b29_str +8000059c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b30 +80009613 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_b31 +80009648 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b0 +8000967d l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b1 +800096b1 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b2 +800096e5 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b3 +80009719 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +8000974d l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b5 +80009781 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b6 +800097b5 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b6_str +80000730 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b7 +800097e9 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b7_str +8000075c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b8 +8000981d l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b8_str +80000788 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b9 +80009851 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b9_str +800007b4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b10 +80009885 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b10_str +800007e0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b11 +800098ba l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b11_str +8000080c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b12 +800098ef l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b12_str +80000840 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b13 +80009924 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b13_str +8000086c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b14 +80009959 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b14_str +80000898 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b15 +8000998e l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b15_str +800008c4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b16 +800099c3 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b16_str +800008f0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b17 +800099f8 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b17_str +8000091c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b18 +80009a2d l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b18_str +8000094c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b19 +80009a62 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b19_str +80000978 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b20 +80009a97 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b21 +80009acc l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b21_str +800009d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b22 +80009b01 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b22_str +80000a00 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b23 +80009b36 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b23_str +80000a2c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b24 +80009b6b l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b24_str +80000a5c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b25 +80009ba0 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b25_str +80000a88 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b26 +80009bd5 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b26_str +80000ab8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b27 +80009c0a l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b27_str +80000ae4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b28 +80009c3f l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b28_str +80000b10 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b29 +80009c74 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b29_str +80000b3c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b30 +80009ca9 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b30_str +80000b68 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_b31 +80009cde l .data 00000000 Zbkc_clmulh_cg_cp_rs2_b31_str +80000b94 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b0 +80009d13 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b0_str +80000bc0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b1 +80009d46 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b1_str +80000bec l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b2 +80009d79 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b2_str +80000c18 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b3 +80009dac l .data 00000000 Zbkc_clmulh_cg_cp_rd_b3_str +80000c4c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b4 +80009ddf l .data 00000000 Zbkc_clmulh_cg_cp_rd_b4_str +80000c78 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b5 +80009e12 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b5_str +80000ca4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b6 +80009e45 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b6_str +80000cd8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b7 +80009e78 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b7_str +80000d04 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b8 +80009eab l .data 00000000 Zbkc_clmulh_cg_cp_rd_b8_str +80000d30 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b9 +80009ede l .data 00000000 Zbkc_clmulh_cg_cp_rd_b9_str +80000d5c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b10 +80009f11 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b10_str +80000d88 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b11 +80009f45 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b11_str +80000db8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b12 +80009f79 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b12_str +80000dec l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b13 +80009fad l .data 00000000 Zbkc_clmulh_cg_cp_rd_b13_str +80000e18 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b14 +80009fe1 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b14_str +80000e44 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b15 +8000a015 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b16 +8000a049 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b17 +8000a07d l .data 00000000 Zbkc_clmulh_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b18 +8000a0b1 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b19 +8000a0e5 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b19_str +80000f24 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b20 +8000a119 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b20_str +80000f54 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b21 +8000a14d l .data 00000000 Zbkc_clmulh_cg_cp_rd_b21_str +80000f84 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b22 +8000a181 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b22_str +80000fb0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b23 +8000a1b5 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b23_str +80000fdc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b24 +8000a1e9 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b24_str +80001008 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b25 +8000a21d l .data 00000000 Zbkc_clmulh_cg_cp_rd_b25_str +80001034 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b26 +8000a251 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b26_str +80001060 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b27 +8000a285 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b27_str +80001090 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b28 +8000a2b9 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b28_str +800010bc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b29 +8000a2ed l .data 00000000 Zbkc_clmulh_cg_cp_rd_b29_str +800010e8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b30 +8000a321 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b30_str +80001114 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rd_b31 +8000a355 l .data 00000000 Zbkc_clmulh_cg_cp_rd_b31_str +80001140 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x0 +8000a389 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x0_str +8000116c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x1 +8000a3c4 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x1_str +80001198 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x2 +8000a3ff l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x2_str +800011c4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x80000000 +8000a43a l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x80000000_str +800011f0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x80000001 +8000a47d l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x80000001_str +8000121c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffff +8000a4c0 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffff_str +80001248 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffe +8000a503 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffe_str +80001274 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff +8000a546 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff_str +800012a0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe +8000a589 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe_str +800012cc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc8872 +8000a5cc l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc8872_str +800012f8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaa +8000a60f l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaa_str +80001324 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x55555555 +8000a652 l .data 00000000 Zbkc_clmulh_cg_cp_rs1_edges_0x55555555_str +80001350 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x0 +8000a695 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x0_str +8000137c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x1 +8000a6d1 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x1_str +800013a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x2 +8000a70d l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x2_str +800013d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x80000000 +8000a749 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x80000000_str +80001400 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x80000001 +8000a78c l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x80000001_str +8000142c l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffff +8000a7cf l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffff_str +80001458 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffe +8000a812 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffe_str +80001484 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff +8000a855 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff_str +800014b0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe +8000a898 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe_str +800014dc l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc8872 +8000a8db l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc8872_str +80001508 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaa +8000a91e l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaa_str +80001534 l .text.rvtest 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x55555555 +8000a961 l .data 00000000 Zbkc_clmulh_cg_cp_rs2_edges_0x55555555_str +80001560 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a9a4 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +8000158c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a9f7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000aa4a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000aa9d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001610 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000aaf7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +8000163c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000ab51 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001668 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000abab l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001694 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ac05 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016c0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000ac5f l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016ec l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000acb9 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001718 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ad13 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001744 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ad6d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001770 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000adc7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +8000179c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ae1a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ae6d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000aec0 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001820 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000af1a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +8000184c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000af74 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001878 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000afce l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b028 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018d0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b082 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018fc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b0dc l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001928 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b136 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001954 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b190 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001980 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b1ea l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019ac l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b23d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b290 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a04 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b2e3 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a30 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b33d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a5c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b397 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a88 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b3f1 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b44b l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ae0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b4a5 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b0c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b4ff l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b38 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b559 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b64 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b5b3 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b90 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b60d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bbc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b667 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b6c1 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c14 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b71b l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c40 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b77c l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c6c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b7dd l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c98 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b83e l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b89f l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cf0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b900 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d1c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b961 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d48 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b9c2 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d74 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000ba23 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001da0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000ba84 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dcc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000bade l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000bb38 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e24 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bb92 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e50 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bbf3 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e7c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bc54 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bcb5 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bd16 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f00 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bd77 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f2c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bdd8 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f58 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000be39 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f84 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000be9a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fb0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000befb l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fdc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bf55 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002008 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bfaf l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002034 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c009 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002060 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c06a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +8000208c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c0cb l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c12c l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c18d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002110 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c1ee l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +8000213c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c24f l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002168 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c2b0 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002194 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c311 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021c0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c372 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021ec l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c3cc l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002218 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c426 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002244 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c480 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002270 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c4e1 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +8000229c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c542 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c5a3 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c604 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002320 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c665 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +8000234c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c6c6 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002378 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c727 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c788 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023d0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c7e9 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023fc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c843 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002428 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c89d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002454 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c8f7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002480 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c958 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024ac l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c9b9 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ca1a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002504 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ca7b l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002530 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cadc l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +8000255c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cb3d l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002588 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cb9e l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000cbff l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025e0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cc60 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +8000260c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ccba l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002638 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cd14 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002664 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cd6e l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002690 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cdcf l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026bc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000ce30 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000ce91 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002714 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cef2 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002740 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000cf53 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +8000276c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cfb4 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002798 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d015 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d076 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027f0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d0d7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +8000281c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d131 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002848 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d18b l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002874 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d1e5 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028a0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d246 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028cc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d2a7 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d308 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002924 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d369 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002950 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d3ca l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +8000297c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d42b l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d48c l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d4ed l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a00 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d54e l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a2c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d5a8 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a58 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d602 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a84 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d65c l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ab0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d6bd l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002adc l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d71e l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b08 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d77f l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b34 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d7e0 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b60 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d841 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b8c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d8a2 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d903 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d964 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c10 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d9c5 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c3c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000da1f l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c68 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000da79 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c94 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dad3 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cc0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000db34 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cec l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000db95 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d18 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000dbf6 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d44 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000dc57 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d70 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dcb8 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d9c l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000dd19 l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000dd7a l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dddb l .data 00000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e20 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b0 +8000de3c l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b0_str +80002e4c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b1 +8000de76 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b1_str +80002e7c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b2 +8000deb0 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b2_str +80002ea8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b3 +8000deea l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b3_str +80002ed4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b4 +8000df24 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b4_str +80002f00 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b5 +8000df5e l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b5_str +80002f2c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b6 +8000df98 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b7 +8000dfd2 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b8 +8000e00c l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b8_str +80002fb8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b9 +8000e046 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b10 +8000e080 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b10_str +80003014 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b11 +8000e0bb l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b11_str +80003040 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b12 +8000e0f6 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b12_str +8000306c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b13 +8000e131 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b13_str +80003098 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b14 +8000e16c l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b14_str +800030c4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b15 +8000e1a7 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b15_str +800030f0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b16 +8000e1e2 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b16_str +8000311c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b17 +8000e21d l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b17_str +80003148 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b18 +8000e258 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b18_str +80003174 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b19 +8000e293 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b19_str +800031a0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b20 +8000e2ce l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b20_str +800031cc l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b21 +8000e309 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b21_str +800031f8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b22 +8000e344 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b22_str +80003224 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b23 +8000e37f l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b23_str +80003250 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b24 +8000e3ba l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b24_str +8000327c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b25 +8000e3f5 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b25_str +800032a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b26 +8000e430 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b26_str +800032d8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b27 +8000e46b l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b27_str +80003304 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b28 +8000e4a6 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b28_str +80003330 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b29 +8000e4e1 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b29_str +8000335c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b30 +8000e51c l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b30_str +80003388 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b31 +8000e557 l .data 00000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b31_str +800033b4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b0 +8000e592 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b0_str +800033e0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b1 +8000e5cb l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b1_str +8000340c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b2 +8000e604 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b2_str +8000343c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b3 +8000e63d l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b3_str +80003470 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b4 +8000e676 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b4_str +8000349c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b5 +8000e6af l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b5_str +800034c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b6 +8000e6e8 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b6_str +800034f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b7 +8000e721 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b7_str +80003520 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b8 +8000e75a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b8_str +8000354c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b9 +8000e793 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b9_str +80003578 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b10 +8000e7cc l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b10_str +800035a4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b11 +8000e806 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b11_str +800035d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b12 +8000e840 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b12_str +80003608 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b13 +8000e87a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b13_str +80003634 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b14 +8000e8b4 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b14_str +80003660 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b15 +8000e8ee l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b16 +8000e928 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b17 +8000e962 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b17_str +800036e4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b18 +8000e99c l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b18_str +80003714 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b19 +8000e9d6 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b19_str +80003740 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b20 +8000ea10 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b21 +8000ea4a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b22 +8000ea84 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b23 +8000eabe l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b24 +8000eaf8 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b25 +8000eb32 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b25_str +80003848 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b26 +8000eb6c l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b26_str +80003874 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b27 +8000eba6 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b27_str +800038a0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b28 +8000ebe0 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b28_str +800038cc l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b29 +8000ec1a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b29_str +800038f8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b30 +8000ec54 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b30_str +80003924 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b31 +8000ec8e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_b31_str +80003950 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b0 +8000ecc8 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b0_str +8000397c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b1 +8000ed01 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b1_str +800039a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b2 +8000ed3a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b2_str +800039d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b3 +8000ed73 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b3_str +80003a00 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b4 +8000edac l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b4_str +80003a2c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b5 +8000ede5 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b5_str +80003a58 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b6 +8000ee1e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b6_str +80003a8c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b7 +8000ee57 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b7_str +80003ab8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b8 +8000ee90 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b8_str +80003ae4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b9 +8000eec9 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b9_str +80003b10 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b10 +8000ef02 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b10_str +80003b40 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b11 +8000ef3c l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b11_str +80003b6c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b12 +8000ef76 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b12_str +80003b98 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b13 +8000efb0 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b13_str +80003bc4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b14 +8000efea l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b14_str +80003bf0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b15 +8000f024 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b15_str +80003c1c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b16 +8000f05e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b16_str +80003c4c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b17 +8000f098 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b17_str +80003c78 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b18 +8000f0d2 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b18_str +80003ca4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b19 +8000f10c l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b19_str +80003cd0 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b20 +8000f146 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b20_str +80003cfc l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b21 +8000f180 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b21_str +80003d28 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b22 +8000f1ba l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b22_str +80003d54 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b23 +8000f1f4 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b23_str +80003d80 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b24 +8000f22e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b24_str +80003dac l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b25 +8000f268 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b25_str +80003dd8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b26 +8000f2a2 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b26_str +80003e04 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b27 +8000f2dc l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b27_str +80003e30 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b28 +8000f316 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b28_str +80003e5c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b29 +8000f350 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b29_str +80003e88 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b30 +8000f38a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b30_str +80003eb8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b31 +8000f3c4 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs2_b31_str +80003ee4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0 +8000f3fe l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0_str +80003f10 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1 +8000f43b l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1_str +80003f3c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2 +8000f478 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2_str +80003f68 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3 +8000f4b5 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3_str +80003f9c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4 +8000f4f2 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4_str +80003fc8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5 +8000f52f l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5_str +80003ff8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6 +8000f56c l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6_str +80004024 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7 +8000f5a9 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7_str +80004050 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8 +8000f5e6 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8_str +8000407c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9 +8000f623 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9_str +800040a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10 +8000f660 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10_str +800040d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11 +8000f69e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11_str +80004100 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12 +8000f6dc l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12_str +80004134 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13 +8000f71a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13_str +80004160 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14 +8000f758 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14_str +8000418c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15 +8000f796 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15_str +800041b8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16 +8000f7d4 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16_str +800041e4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17 +8000f812 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17_str +80004210 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18 +8000f850 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18_str +8000423c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19 +8000f88e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19_str +8000426c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20 +8000f8cc l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20_str +80004298 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21 +8000f90a l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21_str +800042c8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22 +8000f948 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22_str +800042f4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23 +8000f986 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23_str +80004320 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24 +8000f9c4 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24_str +8000434c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25 +8000fa02 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25_str +8000437c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26 +8000fa40 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26_str +800043a8 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27 +8000fa7e l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27_str +800043d4 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28 +8000fabc l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28_str +80004400 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29 +8000fafa l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29_str +8000442c l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30 +8000fb38 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30_str +80004458 l .text.rvtest 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31 +8000fb76 l .data 00000000 Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004488 l .text.rvtest 00000000 exit_Mcleanup +8000448c l .text.rvtest 00000000 resto_Medeleg +80004494 l .text.rvtest 00000000 resto_Msatp +80004498 l .text.rvtest 00000000 resto_Mscratch +800044a0 l .text.rvtest 00000000 resto_Mxtvec +800044b4 l .text.rvtest 00000000 resto_Mtramp +800044b8 l .text.rvtest 00000000 resto_Mloop +800044d0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +80010240 l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8001027b l .data 00000000 begin_debugstr +800102db l .data 00000000 trap_sig_overflowstr +80010e86 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011f68 l .data 00000000 trap_sigptr +80011f60 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001042f l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8001029d l .data 00000000 abortstr +80010204 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +800118bd l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000fd28 l .data 00000000 ascii_buffer +80010344 l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000fd08 l .data 00000000 saved_xepc +800209cc l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010446 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010548 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010643 l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010736 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +800108a9 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000fbc0 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000fbc0 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000fce8 l .data 00000000 failure_diag_type +8000fcf8 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000fcf0 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +8001082d l .data 00000000 sv_Mtval2_str +8001086b l .data 00000000 sv_Mtinst_str +80010486 l .data 00000000 sv_Svect_str +80010586 l .data 00000000 sv_Scause_str +8001067f l .data 00000000 sv_Sepc_str +80010773 l .data 00000000 sv_Stval_str +800108e4 l .data 00000000 sv_Sip_str +800104c6 l .data 00000000 sv_Hvect_str +800105c4 l .data 00000000 sv_Hcause_str +800106bb l .data 00000000 sv_Hepc_str +800107b0 l .data 00000000 sv_Htval_str +8001091f l .data 00000000 sv_Hip_str +80010507 l .data 00000000 sv_Vvect_str +80010603 l .data 00000000 sv_Vcause_str +800106f8 l .data 00000000 sv_Vepc_str +800107ee l .data 00000000 sv_Vtval_str +8001095b l .data 00000000 sv_Vip_str +80010998 l .data 00000000 Mclr_Mext_int_str +800109e7 l .data 00000000 Mclr_Sext_int_str +80010ae2 l .data 00000000 Sclr_Sext_int_str +80010bde l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000fcf4 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010332 l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000fce0 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010346 l .data 00000000 inststr +8000fcc0 l .data 00000000 failing_instruction +8001035a l .data 00000000 addrstr +8000fcc8 l .data 00000000 failing_addr +80010d91 l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000fcc4 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010ea7 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80010d8a l .data 00000000 vxsatstr +80010da2 l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000fcd0 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010db9 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000fcd8 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010dd0 l .data 00000000 failure_diag_bad_instr_str +80010e2e l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010ed3 l .data 00000000 trap_diag_header_str +80010eff l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010f0f l .data 00000000 trap_diag_expected_offset_str +80010f3a l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010f69 l .data 00000000 trap_diag_extra_traps_str +80010fd1 l .data 00000000 trap_diag_diff_bytes_str +80010ff8 l .data 00000000 trap_diag_extra_next_step_str +80010f95 l .data 00000000 trap_diag_missing_traps_str +800110e0 l .data 00000000 trap_diag_missing_next_step_str +800111c7 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80011203 l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +800111e1 l .data 00000000 trap_diag_mode_m_str +800111e9 l .data 00000000 trap_diag_mode_s_str +800111f1 l .data 00000000 trap_diag_mode_hs_str +800111fa l .data 00000000 trap_diag_mode_vs_str +8001120c l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011363 l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +80011226 l .data 00000000 trap_diag_field_vect_str +80011257 l .data 00000000 trap_diag_field_cause_str +80011277 l .data 00000000 trap_diag_field_epc_str +80011295 l .data 00000000 trap_diag_field_tval_str +800112b4 l .data 00000000 trap_diag_field_ip_str +800112dc l .data 00000000 trap_diag_field_tval2_str +80011308 l .data 00000000 trap_diag_field_tinst_str +80011334 l .data 00000000 trap_diag_field_intid_str +80011372 l .data 00000000 trap_diag_expected_str +80011389 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +800113a0 l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +800113b7 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +8001142d l .data 00000000 trap_diag_hint_vect_str +80011503 l .data 00000000 trap_diag_hint_cause_str +800115f6 l .data 00000000 trap_diag_hint_epc_str +800116f1 l .data 00000000 trap_diag_hint_tval_str +800117d8 l .data 00000000 trap_diag_hint_ip_str +800113e5 l .data 00000000 trap_diag_generic_str +800103ce l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000fd50 l .data 00000000 trap_excpt_name_tbl +8000fdb0 l .data 00000000 trap_int_name_tbl +800101ee l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000fd00 l .data 00000000 csr_context_ret_addr +800103ef l .data 00000000 mepcstr +800103ff l .data 00000000 mcausestr +8000fd10 l .data 00000000 saved_xcause +8001040f l .data 00000000 mtvalstr +8000fd18 l .data 00000000 saved_xtval +8001041f l .data 00000000 mstatusstr +8000fd20 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011910 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010eaf l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fd50 l .data 00000000 end_failure_scratch +8000fdf0 l .data 00000000 trap_excpt_name_0 +8000fe10 l .data 00000000 trap_excpt_name_1 +8000fe2a l .data 00000000 trap_excpt_name_2 +8000fe3f l .data 00000000 trap_excpt_name_3 +8000fe4b l .data 00000000 trap_excpt_name_4 +8000fe64 l .data 00000000 trap_excpt_name_5 +8000fe77 l .data 00000000 trap_excpt_name_6 +8000fe95 l .data 00000000 trap_excpt_name_7 +8000fead l .data 00000000 trap_excpt_name_8 +8000fecb l .data 00000000 trap_excpt_name_9 +8000fee9 l .data 00000000 trap_excpt_name_10 +8000ff08 l .data 00000000 trap_excpt_name_11 +8000ff26 l .data 00000000 trap_excpt_name_12 +8000ff3e l .data 00000000 trap_excpt_name_13 +8000ff4f l .data 00000000 trap_excpt_name_14 +8000ff5e l .data 00000000 trap_excpt_name_15 +8000ff74 l .data 00000000 trap_excpt_name_16 +8000ff81 l .data 00000000 trap_excpt_name_17 +8000ff90 l .data 00000000 trap_excpt_name_18 +8000ffa0 l .data 00000000 trap_excpt_name_19 +8000ffb0 l .data 00000000 trap_excpt_name_20 +8000ffce l .data 00000000 trap_excpt_name_21 +8000ffe5 l .data 00000000 trap_excpt_name_22 +8000fffa l .data 00000000 trap_excpt_name_23 +80010016 l .data 00000000 trap_int_name_0 +8001002e l .data 00000000 trap_int_name_1 +8001004d l .data 00000000 trap_int_name_2 +80010074 l .data 00000000 trap_int_name_3 +80010090 l .data 00000000 trap_int_name_4 +800100a8 l .data 00000000 trap_int_name_5 +800100c4 l .data 00000000 trap_int_name_6 +800100e8 l .data 00000000 trap_int_name_7 +80010101 l .data 00000000 trap_int_name_8 +80010119 l .data 00000000 trap_int_name_9 +80010138 l .data 00000000 trap_int_name_10 +8001015f l .data 00000000 trap_int_name_11 +8001017b l .data 00000000 trap_int_name_12 +800101a0 l .data 00000000 trap_int_name_13 +800101bc l .data 00000000 trap_int_name_14 +800101d5 l .data 00000000 trap_int_name_15 +8001039b l .data 00000000 xepcstr +80010a39 l .data 00000000 Mclr_Vext_int_str +80010a93 l .data 00000000 Sclr_Mext_int_str +80010b34 l .data 00000000 Sclr_Vext_int_str +80010b8e l .data 00000000 Hclr_Mext_int_str +80010c31 l .data 00000000 Hclr_Vext_int_str +80010c8c l .data 00000000 Vclr_Mext_int_str +80010cdc l .data 00000000 Vclr_Sext_int_str +80010d2f l .data 00000000 Vclr_Vext_int_str +800113ce l .data 00000000 trap_diag_curr_xepc_str +800209d0 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800209d0 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044d0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011910 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004478 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011910 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +80011901 g .data 00000000 rvtest_data_end +80004478 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020b00 g .tohost 00000000 fromhost +80020a00 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x2e210fbc +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x3ab97895 +80000048: 0001a883 lw x17,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkc_clmulh_cg_cp_rs1_b0: + clmulh x28, x0, x17 # perform operation +80000050: 0b103e33 clmulh x28,x0,x17 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkc_clmulh_cg_cp_rs1_b0, Zbkc_clmulh_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01c20863 beq x4,x28,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1fb20202 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x619dbb17 +80000074: 0001aa03 lw x20,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkc_clmulh_cg_cp_rs1_b1: + clmulh x9, x1, x20 # perform operation +8000007c: 0b40b4b3 clmulh x9,x1,x20 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkc_clmulh_cg_cp_rs1_b1, Zbkc_clmulh_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00920863 beq x4,x9,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009023 .word 0x80009023 +80000094: 00410113 addi x2,x2,4 + + mv x11, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010593 addi x11,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x35333750 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xfb6f225e +800000a4: 0001a083 lw x1,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkc_clmulh_cg_cp_rs1_b2: + clmulh x19, x2, x1 # perform operation +800000ac: 0a1139b3 clmulh x19,x2,x1 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmulh_cg_cp_rs1_b2, Zbkc_clmulh_cg_cp_rs1_b2_str) +800000b0: 0005a203 lw x4,0(x11) +800000b4: 01320863 beq x4,x19,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009056 .word 0x80009056 +800000c4: 00458593 addi x11,x11,4 + + mv x29, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018e93 addi x29,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0x3dc82f87 +800000cc: 000ea183 lw x3,0(x29) +800000d0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x213bc9f2 +800000d4: 000ea503 lw x10,0(x29) +800000d8: 004e8e93 addi x29,x29,4 + +800000dc : +Zbkc_clmulh_cg_cp_rs1_b3: + clmulh x19, x3, x10 # perform operation +800000dc: 0aa1b9b3 clmulh x19,x3,x10 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmulh_cg_cp_rs1_b3, Zbkc_clmulh_cg_cp_rs1_b3_str) +800000e0: 0005a203 lw x4,0(x11) +800000e4: 01320863 beq x4,x19,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009089 .word 0x80009089 +800000f4: 00458593 addi x11,x11,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x90879b16 +80000100: 000ea203 lw x4,0(x29) +80000104: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0xf13b64b4 +80000108: 000ea983 lw x19,0(x29) +8000010c: 004e8e93 addi x29,x29,4 + +80000110 : +Zbkc_clmulh_cg_cp_rs1_b4: + clmulh x5, x4, x19 # perform operation +80000110: 0b3232b3 clmulh x5,x4,x19 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkc_clmulh_cg_cp_rs1_b4, Zbkc_clmulh_cg_cp_rs1_b4_str) +80000114: 0005a383 lw x7,0(x11) +80000118: 00538863 beq x7,x5,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090bc .word 0x800090bc +80000128: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0x60475d9e +8000012c: 000ea283 lw x5,0(x29) +80000130: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xcecfce49 +80000134: 000ea903 lw x18,0(x29) +80000138: 004e8e93 addi x29,x29,4 + +8000013c : +Zbkc_clmulh_cg_cp_rs1_b5: + clmulh x27, x5, x18 # perform operation +8000013c: 0b22bdb3 clmulh x27,x5,x18 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkc_clmulh_cg_cp_rs1_b5, Zbkc_clmulh_cg_cp_rs1_b5_str) +80000140: 0005a383 lw x7,0(x11) +80000144: 01b38863 beq x7,x27,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 800090ef .word 0x800090ef +80000154: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0xb7d33784 +80000158: 000ea303 lw x6,0(x29) +8000015c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0xcf29a79f +80000160: 000ea683 lw x13,0(x29) +80000164: 004e8e93 addi x29,x29,4 + +80000168 : +Zbkc_clmulh_cg_cp_rs1_b6: + clmulh x1, x6, x13 # perform operation +80000168: 0ad330b3 clmulh x1,x6,x13 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zbkc_clmulh_cg_cp_rs1_b6, Zbkc_clmulh_cg_cp_rs1_b6_str) +8000016c: 0005a383 lw x7,0(x11) +80000170: 00138863 beq x7,x1,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009122 .word 0x80009122 +80000180: 00458593 addi x11,x11,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0x1ad0f954 +8000018c: 000ea383 lw x7,0(x29) +80000190: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x56ee1468 +80000194: 000ea103 lw x2,0(x29) +80000198: 004e8e93 addi x29,x29,4 + +8000019c : +Zbkc_clmulh_cg_cp_rs1_b7: + clmulh x0, x7, x2 # perform operation +8000019c: 0a23b033 clmulh x0,x7,x2 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zbkc_clmulh_cg_cp_rs1_b7, Zbkc_clmulh_cg_cp_rs1_b7_str) +800001a0: 0005a203 lw x4,0(x11) +800001a4: 00020863 beq x4,x0,800001b4 +800001a8: 358052ef jal x5,80005500 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009155 .word 0x80009155 +800001b4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0xba6f193b +800001b8: 000ea403 lw x8,0(x29) +800001bc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0xf754a216 +800001c0: 000eab83 lw x23,0(x29) +800001c4: 004e8e93 addi x29,x29,4 + +800001c8 : +Zbkc_clmulh_cg_cp_rs1_b8: + clmulh x24, x8, x23 # perform operation +800001c8: 0b743c33 clmulh x24,x8,x23 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmulh_cg_cp_rs1_b8, Zbkc_clmulh_cg_cp_rs1_b8_str) +800001cc: 0005a203 lw x4,0(x11) +800001d0: 01820863 beq x4,x24,800001e0 +800001d4: 32c052ef jal x5,80005500 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009188 .word 0x80009188 +800001e0: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x67efe585 +800001e4: 000ea483 lw x9,0(x29) +800001e8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x38cc2915 +800001ec: 000ea983 lw x19,0(x29) +800001f0: 004e8e93 addi x29,x29,4 + +800001f4 : +Zbkc_clmulh_cg_cp_rs1_b9: + clmulh x2, x9, x19 # perform operation +800001f4: 0b34b133 clmulh x2,x9,x19 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmulh_cg_cp_rs1_b9, Zbkc_clmulh_cg_cp_rs1_b9_str) +800001f8: 0005a203 lw x4,0(x11) +800001fc: 00220863 beq x4,x2,8000020c +80000200: 300052ef jal x5,80005500 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091bb .word 0x800091bb +8000020c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xe6d41bed +80000210: 000ea503 lw x10,0(x29) +80000214: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x3094358c +80000218: 000ea003 lw x0,0(x29) +8000021c: 004e8e93 addi x29,x29,4 + +80000220 : +Zbkc_clmulh_cg_cp_rs1_b10: + clmulh x15, x10, x0 # perform operation +80000220: 0a0537b3 clmulh x15,x10,x0 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmulh_cg_cp_rs1_b10, Zbkc_clmulh_cg_cp_rs1_b10_str) +80000224: 0005a203 lw x4,0(x11) +80000228: 00f20863 beq x4,x15,80000238 +8000022c: 2d4052ef jal x5,80005500 +80000230: 80000220 .word 0x80000220 +80000234: 800091ef .word 0x800091ef +80000238: 00458593 addi x11,x11,4 + + mv x27, x11 # switch signature pointer register to avoid conflict with test +8000023c: 00058d93 addi x27,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0xbaf6b304 +80000240: 000ea583 lw x11,0(x29) +80000244: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xf68d4369 +80000248: 000eaf03 lw x30,0(x29) +8000024c: 004e8e93 addi x29,x29,4 + +80000250 : +Zbkc_clmulh_cg_cp_rs1_b11: + clmulh x18, x11, x30 # perform operation +80000250: 0be5b933 clmulh x18,x11,x30 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkc_clmulh_cg_cp_rs1_b11, Zbkc_clmulh_cg_cp_rs1_b11_str) +80000254: 000da203 lw x4,0(x27) +80000258: 01220863 beq x4,x18,80000268 +8000025c: 2a4052ef jal x5,80005500 +80000260: 80000250 .word 0x80000250 +80000264: 80009224 .word 0x80009224 +80000268: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x488e7b31 +8000026c: 000ea603 lw x12,0(x29) +80000270: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xb9ed20a3 +80000274: 000ead03 lw x26,0(x29) +80000278: 004e8e93 addi x29,x29,4 + +8000027c : +Zbkc_clmulh_cg_cp_rs1_b12: + clmulh x11, x12, x26 # perform operation +8000027c: 0ba635b3 clmulh x11,x12,x26 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkc_clmulh_cg_cp_rs1_b12, Zbkc_clmulh_cg_cp_rs1_b12_str) +80000280: 000da203 lw x4,0(x27) +80000284: 00b20863 beq x4,x11,80000294 +80000288: 278052ef jal x5,80005500 +8000028c: 8000027c .word 0x8000027c +80000290: 80009259 .word 0x80009259 +80000294: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x5d5ba9c0 +80000298: 000ea683 lw x13,0(x29) +8000029c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x321619c9 +800002a0: 000eaa83 lw x21,0(x29) +800002a4: 004e8e93 addi x29,x29,4 + +800002a8 : +Zbkc_clmulh_cg_cp_rs1_b13: + clmulh x3, x13, x21 # perform operation +800002a8: 0b56b1b3 clmulh x3,x13,x21 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkc_clmulh_cg_cp_rs1_b13, Zbkc_clmulh_cg_cp_rs1_b13_str) +800002ac: 000da203 lw x4,0(x27) +800002b0: 00320863 beq x4,x3,800002c0 +800002b4: 24c052ef jal x5,80005500 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 8000928e .word 0x8000928e +800002c0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0xb2a47e5f +800002c4: 000ea703 lw x14,0(x29) +800002c8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x39084824 +800002cc: 000eab83 lw x23,0(x29) +800002d0: 004e8e93 addi x29,x29,4 + +800002d4 : +Zbkc_clmulh_cg_cp_rs1_b14: + clmulh x11, x14, x23 # perform operation +800002d4: 0b7735b3 clmulh x11,x14,x23 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkc_clmulh_cg_cp_rs1_b14, Zbkc_clmulh_cg_cp_rs1_b14_str) +800002d8: 000da203 lw x4,0(x27) +800002dc: 00b20863 beq x4,x11,800002ec +800002e0: 220052ef jal x5,80005500 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 800092c3 .word 0x800092c3 +800002ec: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x2fc0f942 +800002f0: 000ea783 lw x15,0(x29) +800002f4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0x81a7f1ca +800002f8: 000ea183 lw x3,0(x29) +800002fc: 004e8e93 addi x29,x29,4 + +80000300 : +Zbkc_clmulh_cg_cp_rs1_b15: + clmulh x23, x15, x3 # perform operation +80000300: 0a37bbb3 clmulh x23,x15,x3 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkc_clmulh_cg_cp_rs1_b15, Zbkc_clmulh_cg_cp_rs1_b15_str) +80000304: 000da203 lw x4,0(x27) +80000308: 01720863 beq x4,x23,80000318 +8000030c: 1f4052ef jal x5,80005500 +80000310: 80000300 .word 0x80000300 +80000314: 800092f8 .word 0x800092f8 +80000318: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0xc2090702 +8000031c: 000ea803 lw x16,0(x29) +80000320: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x79ad3133 +80000324: 000ea903 lw x18,0(x29) +80000328: 004e8e93 addi x29,x29,4 + +8000032c : +Zbkc_clmulh_cg_cp_rs1_b16: + clmulh x26, x16, x18 # perform operation +8000032c: 0b283d33 clmulh x26,x16,x18 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkc_clmulh_cg_cp_rs1_b16, Zbkc_clmulh_cg_cp_rs1_b16_str) +80000330: 000da203 lw x4,0(x27) +80000334: 01a20863 beq x4,x26,80000344 +80000338: 1c8052ef jal x5,80005500 +8000033c: 8000032c .word 0x8000032c +80000340: 8000932d .word 0x8000932d +80000344: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x7d745785 +80000348: 000ea883 lw x17,0(x29) +8000034c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x2beea932 +80000350: 000ea103 lw x2,0(x29) +80000354: 004e8e93 addi x29,x29,4 + +80000358 : +Zbkc_clmulh_cg_cp_rs1_b17: + clmulh x8, x17, x2 # perform operation +80000358: 0a28b433 clmulh x8,x17,x2 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkc_clmulh_cg_cp_rs1_b17, Zbkc_clmulh_cg_cp_rs1_b17_str) +8000035c: 000da203 lw x4,0(x27) +80000360: 00820863 beq x4,x8,80000370 +80000364: 19c052ef jal x5,80005500 +80000368: 80000358 .word 0x80000358 +8000036c: 80009362 .word 0x80009362 +80000370: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x02f2b0c4 +80000374: 000ea903 lw x18,0(x29) +80000378: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0x312c849c +8000037c: 000ea683 lw x13,0(x29) +80000380: 004e8e93 addi x29,x29,4 + +80000384 : +Zbkc_clmulh_cg_cp_rs1_b18: + clmulh x30, x18, x13 # perform operation +80000384: 0ad93f33 clmulh x30,x18,x13 + # Check if x30 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x30, Zbkc_clmulh_cg_cp_rs1_b18, Zbkc_clmulh_cg_cp_rs1_b18_str) +80000388: 000da203 lw x4,0(x27) +8000038c: 01e20863 beq x4,x30,8000039c +80000390: 170052ef jal x5,80005500 +80000394: 80000384 .word 0x80000384 +80000398: 80009397 .word 0x80009397 +8000039c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x4f7202fe +800003a0: 000ea983 lw x19,0(x29) +800003a4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0x0db50859 +800003a8: 000ea783 lw x15,0(x29) +800003ac: 004e8e93 addi x29,x29,4 + +800003b0 : +Zbkc_clmulh_cg_cp_rs1_b19: + clmulh x20, x19, x15 # perform operation +800003b0: 0af9ba33 clmulh x20,x19,x15 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zbkc_clmulh_cg_cp_rs1_b19, Zbkc_clmulh_cg_cp_rs1_b19_str) +800003b4: 000da203 lw x4,0(x27) +800003b8: 01420863 beq x4,x20,800003c8 +800003bc: 144052ef jal x5,80005500 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 800093cc .word 0x800093cc +800003c8: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x793c2967 +800003cc: 000eaa03 lw x20,0(x29) +800003d0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0x883ff8e2 +800003d4: 000eab03 lw x22,0(x29) +800003d8: 004e8e93 addi x29,x29,4 + +800003dc : +Zbkc_clmulh_cg_cp_rs1_b20: + clmulh x8, x20, x22 # perform operation +800003dc: 0b6a3433 clmulh x8,x20,x22 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkc_clmulh_cg_cp_rs1_b20, Zbkc_clmulh_cg_cp_rs1_b20_str) +800003e0: 000da203 lw x4,0(x27) +800003e4: 00820863 beq x4,x8,800003f4 +800003e8: 118052ef jal x5,80005500 +800003ec: 800003dc .word 0x800003dc +800003f0: 80009401 .word 0x80009401 +800003f4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x08dcb445 +800003f8: 000eaa83 lw x21,0(x29) +800003fc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x115d865c +80000400: 000ea803 lw x16,0(x29) +80000404: 004e8e93 addi x29,x29,4 + +80000408 : +Zbkc_clmulh_cg_cp_rs1_b21: + clmulh x7, x21, x16 # perform operation +80000408: 0b0ab3b3 clmulh x7,x21,x16 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkc_clmulh_cg_cp_rs1_b21, Zbkc_clmulh_cg_cp_rs1_b21_str) +8000040c: 000da203 lw x4,0(x27) +80000410: 00720863 beq x4,x7,80000420 +80000414: 0ec052ef jal x5,80005500 +80000418: 80000408 .word 0x80000408 +8000041c: 80009436 .word 0x80009436 +80000420: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0xc713184a +80000424: 000eab03 lw x22,0(x29) +80000428: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0xa4a070f2 +8000042c: 000ea503 lw x10,0(x29) +80000430: 004e8e93 addi x29,x29,4 + +80000434 : +Zbkc_clmulh_cg_cp_rs1_b22: + clmulh x9, x22, x10 # perform operation +80000434: 0aab34b3 clmulh x9,x22,x10 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkc_clmulh_cg_cp_rs1_b22, Zbkc_clmulh_cg_cp_rs1_b22_str) +80000438: 000da203 lw x4,0(x27) +8000043c: 00920863 beq x4,x9,8000044c +80000440: 0c0052ef jal x5,80005500 +80000444: 80000434 .word 0x80000434 +80000448: 8000946b .word 0x8000946b +8000044c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x393ea0e6 +80000450: 000eab83 lw x23,0(x29) +80000454: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xda4ced42 +80000458: 000eaf03 lw x30,0(x29) +8000045c: 004e8e93 addi x29,x29,4 + +80000460 : +Zbkc_clmulh_cg_cp_rs1_b23: + clmulh x6, x23, x30 # perform operation +80000460: 0bebb333 clmulh x6,x23,x30 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkc_clmulh_cg_cp_rs1_b23, Zbkc_clmulh_cg_cp_rs1_b23_str) +80000464: 000da203 lw x4,0(x27) +80000468: 00620863 beq x4,x6,80000478 +8000046c: 094052ef jal x5,80005500 +80000470: 80000460 .word 0x80000460 +80000474: 800094a0 .word 0x800094a0 +80000478: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x38dd6fb4 +8000047c: 000eac03 lw x24,0(x29) +80000480: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x21d0d61a +80000484: 000eab83 lw x23,0(x29) +80000488: 004e8e93 addi x29,x29,4 + +8000048c : +Zbkc_clmulh_cg_cp_rs1_b24: + clmulh x9, x24, x23 # perform operation +8000048c: 0b7c34b3 clmulh x9,x24,x23 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkc_clmulh_cg_cp_rs1_b24, Zbkc_clmulh_cg_cp_rs1_b24_str) +80000490: 000da203 lw x4,0(x27) +80000494: 00920863 beq x4,x9,800004a4 +80000498: 068052ef jal x5,80005500 +8000049c: 8000048c .word 0x8000048c +800004a0: 800094d5 .word 0x800094d5 +800004a4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0xb5381ea9 +800004a8: 000eac83 lw x25,0(x29) +800004ac: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x47c96b06 +800004b0: 000ea003 lw x0,0(x29) +800004b4: 004e8e93 addi x29,x29,4 + +800004b8 : +Zbkc_clmulh_cg_cp_rs1_b25: + clmulh x1, x25, x0 # perform operation +800004b8: 0a0cb0b3 clmulh x1,x25,x0 + # Check if x1 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x1, Zbkc_clmulh_cg_cp_rs1_b25, Zbkc_clmulh_cg_cp_rs1_b25_str) +800004bc: 000da203 lw x4,0(x27) +800004c0: 00120863 beq x4,x1,800004d0 +800004c4: 03c052ef jal x5,80005500 +800004c8: 800004b8 .word 0x800004b8 +800004cc: 8000950a .word 0x8000950a +800004d0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x9a6547f4 +800004d4: 000ead03 lw x26,0(x29) +800004d8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x30fe44cc +800004dc: 000ea583 lw x11,0(x29) +800004e0: 004e8e93 addi x29,x29,4 + +800004e4 : +Zbkc_clmulh_cg_cp_rs1_b26: + clmulh x30, x26, x11 # perform operation +800004e4: 0abd3f33 clmulh x30,x26,x11 + # Check if x30 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x30, Zbkc_clmulh_cg_cp_rs1_b26, Zbkc_clmulh_cg_cp_rs1_b26_str) +800004e8: 000da203 lw x4,0(x27) +800004ec: 01e20863 beq x4,x30,800004fc +800004f0: 010052ef jal x5,80005500 +800004f4: 800004e4 .word 0x800004e4 +800004f8: 8000953f .word 0x8000953f +800004fc: 004d8d93 addi x27,x27,4 + + mv x19, x27 # switch signature pointer register to avoid conflict with test +80000500: 000d8993 addi x19,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x434ff8d9 +80000504: 000ead83 lw x27,0(x29) +80000508: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0x5ab43536 +8000050c: 000ea303 lw x6,0(x29) +80000510: 004e8e93 addi x29,x29,4 + +80000514 : +Zbkc_clmulh_cg_cp_rs1_b27: + clmulh x21, x27, x6 # perform operation +80000514: 0a6dbab3 clmulh x21,x27,x6 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkc_clmulh_cg_cp_rs1_b27, Zbkc_clmulh_cg_cp_rs1_b27_str) +80000518: 0009a203 lw x4,0(x19) +8000051c: 01520863 beq x4,x21,8000052c +80000520: 7e1042ef jal x5,80005500 +80000524: 80000514 .word 0x80000514 +80000528: 80009574 .word 0x80009574 +8000052c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x8e38cdc3 +80000530: 000eae03 lw x28,0(x29) +80000534: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x7c3e59f2 +80000538: 000ead83 lw x27,0(x29) +8000053c: 004e8e93 addi x29,x29,4 + +80000540 : +Zbkc_clmulh_cg_cp_rs1_b28: + clmulh x21, x28, x27 # perform operation +80000540: 0bbe3ab3 clmulh x21,x28,x27 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkc_clmulh_cg_cp_rs1_b28, Zbkc_clmulh_cg_cp_rs1_b28_str) +80000544: 0009a203 lw x4,0(x19) +80000548: 01520863 beq x4,x21,80000558 +8000054c: 7b5042ef jal x5,80005500 +80000550: 80000540 .word 0x80000540 +80000554: 800095a9 .word 0x800095a9 +80000558: 00498993 addi x19,x19,4 + + mv x25, x29 # switch data pointer register to avoid conflict with test +8000055c: 000e8c93 addi x25,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x9dfbc96e +80000560: 000cae83 lw x29,0(x25) +80000564: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x0) # load rs2: x0 = 0xea0178ca +80000568: 000ca003 lw x0,0(x25) +8000056c: 004c8c93 addi x25,x25,4 + +80000570 : +Zbkc_clmulh_cg_cp_rs1_b29: + clmulh x11, x29, x0 # perform operation +80000570: 0a0eb5b3 clmulh x11,x29,x0 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zbkc_clmulh_cg_cp_rs1_b29, Zbkc_clmulh_cg_cp_rs1_b29_str) +80000574: 0009a203 lw x4,0(x19) +80000578: 00b20863 beq x4,x11,80000588 +8000057c: 785042ef jal x5,80005500 +80000580: 80000570 .word 0x80000570 +80000584: 800095de .word 0x800095de +80000588: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x7efe4cc9 +8000058c: 000caf03 lw x30,0(x25) +80000590: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0xbfde3d1b +80000594: 000ca703 lw x14,0(x25) +80000598: 004c8c93 addi x25,x25,4 + +8000059c : +Zbkc_clmulh_cg_cp_rs1_b30: + clmulh x0, x30, x14 # perform operation +8000059c: 0aef3033 clmulh x0,x30,x14 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkc_clmulh_cg_cp_rs1_b30, Zbkc_clmulh_cg_cp_rs1_b30_str) +800005a0: 0009a203 lw x4,0(x19) +800005a4: 00020863 beq x4,x0,800005b4 +800005a8: 759042ef jal x5,80005500 +800005ac: 8000059c .word 0x8000059c +800005b0: 80009613 .word 0x80009613 +800005b4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xead9c381 +800005b8: 000caf83 lw x31,0(x25) +800005bc: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x8849bb4c +800005c0: 000ca683 lw x13,0(x25) +800005c4: 004c8c93 addi x25,x25,4 + +800005c8 : +Zbkc_clmulh_cg_cp_rs1_b31: + clmulh x1, x31, x13 # perform operation +800005c8: 0adfb0b3 clmulh x1,x31,x13 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkc_clmulh_cg_cp_rs1_b31, Zbkc_clmulh_cg_cp_rs1_b31_str) +800005cc: 0009a203 lw x4,0(x19) +800005d0: 00120863 beq x4,x1,800005e0 +800005d4: 72d042ef jal x5,80005500 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 80009648 .word 0x80009648 +800005e0: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xe1cf8d27 +800005e4: 000caa03 lw x20,0(x25) +800005e8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x0) # load rs2: x0 = 0x00ee1535 +800005ec: 000ca003 lw x0,0(x25) +800005f0: 004c8c93 addi x25,x25,4 + +800005f4 : +Zbkc_clmulh_cg_cp_rs2_b0: + clmulh x9, x20, x0 # perform operation +800005f4: 0a0a34b3 clmulh x9,x20,x0 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkc_clmulh_cg_cp_rs2_b0, Zbkc_clmulh_cg_cp_rs2_b0_str) +800005f8: 0009a203 lw x4,0(x19) +800005fc: 00920863 beq x4,x9,8000060c +80000600: 701042ef jal x5,80005500 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000967d .word 0x8000967d +8000060c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xb3a90192 +80000610: 000ca583 lw x11,0(x25) +80000614: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x40e647ed +80000618: 000ca083 lw x1,0(x25) +8000061c: 004c8c93 addi x25,x25,4 + +80000620 : +Zbkc_clmulh_cg_cp_rs2_b1: + clmulh x23, x11, x1 # perform operation +80000620: 0a15bbb3 clmulh x23,x11,x1 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zbkc_clmulh_cg_cp_rs2_b1, Zbkc_clmulh_cg_cp_rs2_b1_str) +80000624: 0009a203 lw x4,0(x19) +80000628: 01720863 beq x4,x23,80000638 +8000062c: 6d5042ef jal x5,80005500 +80000630: 80000620 .word 0x80000620 +80000634: 800096b1 .word 0x800096b1 +80000638: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xd4617943 +8000063c: 000cad03 lw x26,0(x25) +80000640: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xf360456d +80000644: 000ca103 lw x2,0(x25) +80000648: 004c8c93 addi x25,x25,4 + +8000064c : +Zbkc_clmulh_cg_cp_rs2_b2: + clmulh x22, x26, x2 # perform operation +8000064c: 0a2d3b33 clmulh x22,x26,x2 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkc_clmulh_cg_cp_rs2_b2, Zbkc_clmulh_cg_cp_rs2_b2_str) +80000650: 0009a203 lw x4,0(x19) +80000654: 01620863 beq x4,x22,80000664 +80000658: 6a9042ef jal x5,80005500 +8000065c: 8000064c .word 0x8000064c +80000660: 800096e5 .word 0x800096e5 +80000664: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x8f81ee70 +80000668: 000ca803 lw x16,0(x25) +8000066c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0xe7e6d855 +80000670: 000ca183 lw x3,0(x25) +80000674: 004c8c93 addi x25,x25,4 + +80000678 : +Zbkc_clmulh_cg_cp_rs2_b3: + clmulh x14, x16, x3 # perform operation +80000678: 0a383733 clmulh x14,x16,x3 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkc_clmulh_cg_cp_rs2_b3, Zbkc_clmulh_cg_cp_rs2_b3_str) +8000067c: 0009a203 lw x4,0(x19) +80000680: 00e20863 beq x4,x14,80000690 +80000684: 67d042ef jal x5,80005500 +80000688: 80000678 .word 0x80000678 +8000068c: 80009719 .word 0x80009719 +80000690: 00498993 addi x19,x19,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000694: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000698: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x5be66d63 +8000069c: 000ca103 lw x2,0(x25) +800006a0: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x4) # load rs2: x4 = 0x561ab6a1 +800006a4: 000ca203 lw x4,0(x25) +800006a8: 004c8c93 addi x25,x25,4 + +800006ac : +Zbkc_clmulh_cg_cp_rs2_b4: + clmulh x1, x2, x4 # perform operation +800006ac: 0a4130b3 clmulh x1,x2,x4 + # Check if x1 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x1, Zbkc_clmulh_cg_cp_rs2_b4, Zbkc_clmulh_cg_cp_rs2_b4_str) +800006b0: 0009a683 lw x13,0(x19) +800006b4: 00168863 beq x13,x1,800006c4 +800006b8: 6890476f jal x14,80005540 +800006bc: 800006ac .word 0x800006ac +800006c0: 8000974d .word 0x8000974d +800006c4: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x6b8ad0bd +800006c8: 000ca483 lw x9,0(x25) +800006cc: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x5) # load rs2: x5 = 0x58bec05e +800006d0: 000ca283 lw x5,0(x25) +800006d4: 004c8c93 addi x25,x25,4 + +800006d8 : +Zbkc_clmulh_cg_cp_rs2_b5: + clmulh x3, x9, x5 # perform operation +800006d8: 0a54b1b3 clmulh x3,x9,x5 + # Check if x3 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x3, Zbkc_clmulh_cg_cp_rs2_b5, Zbkc_clmulh_cg_cp_rs2_b5_str) +800006dc: 0009a683 lw x13,0(x19) +800006e0: 00368863 beq x13,x3,800006f0 +800006e4: 65d0476f jal x14,80005540 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 80009781 .word 0x80009781 +800006f0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x8c8fef8f +800006f4: 000ca603 lw x12,0(x25) +800006f8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xae3d4dce +800006fc: 000ca303 lw x6,0(x25) +80000700: 004c8c93 addi x25,x25,4 + +80000704 : +Zbkc_clmulh_cg_cp_rs2_b6: + clmulh x15, x12, x6 # perform operation +80000704: 0a6637b3 clmulh x15,x12,x6 + # Check if x15 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x15, Zbkc_clmulh_cg_cp_rs2_b6, Zbkc_clmulh_cg_cp_rs2_b6_str) +80000708: 0009a683 lw x13,0(x19) +8000070c: 00f68863 beq x13,x15,8000071c +80000710: 6310476f jal x14,80005540 +80000714: 80000704 .word 0x80000704 +80000718: 800097b5 .word 0x800097b5 +8000071c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x856817de +80000720: 000cad83 lw x27,0(x25) +80000724: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x1a987bfd +80000728: 000ca383 lw x7,0(x25) +8000072c: 004c8c93 addi x25,x25,4 + +80000730 : +Zbkc_clmulh_cg_cp_rs2_b7: + clmulh x11, x27, x7 # perform operation +80000730: 0a7db5b3 clmulh x11,x27,x7 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkc_clmulh_cg_cp_rs2_b7, Zbkc_clmulh_cg_cp_rs2_b7_str) +80000734: 0009a683 lw x13,0(x19) +80000738: 00b68863 beq x13,x11,80000748 +8000073c: 6050476f jal x14,80005540 +80000740: 80000730 .word 0x80000730 +80000744: 800097e9 .word 0x800097e9 +80000748: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0xb3175d17 +8000074c: 000ca603 lw x12,0(x25) +80000750: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x2b712bb0 +80000754: 000ca403 lw x8,0(x25) +80000758: 004c8c93 addi x25,x25,4 + +8000075c : +Zbkc_clmulh_cg_cp_rs2_b8: + clmulh x1, x12, x8 # perform operation +8000075c: 0a8630b3 clmulh x1,x12,x8 + # Check if x1 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x1, Zbkc_clmulh_cg_cp_rs2_b8, Zbkc_clmulh_cg_cp_rs2_b8_str) +80000760: 0009a683 lw x13,0(x19) +80000764: 00168863 beq x13,x1,80000774 +80000768: 5d90476f jal x14,80005540 +8000076c: 8000075c .word 0x8000075c +80000770: 8000981d .word 0x8000981d +80000774: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xb1d4c16c +80000778: 000ca903 lw x18,0(x25) +8000077c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x64d15f9d +80000780: 000ca483 lw x9,0(x25) +80000784: 004c8c93 addi x25,x25,4 + +80000788 : +Zbkc_clmulh_cg_cp_rs2_b9: + clmulh x16, x18, x9 # perform operation +80000788: 0a993833 clmulh x16,x18,x9 + # Check if x16 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x16, Zbkc_clmulh_cg_cp_rs2_b9, Zbkc_clmulh_cg_cp_rs2_b9_str) +8000078c: 0009a683 lw x13,0(x19) +80000790: 01068863 beq x13,x16,800007a0 +80000794: 5ad0476f jal x14,80005540 +80000798: 80000788 .word 0x80000788 +8000079c: 80009851 .word 0x80009851 +800007a0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x25, x0) # load rs1: x0 = 0xc85e031c +800007a4: 000ca003 lw x0,0(x25) +800007a8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x8da5a213 +800007ac: 000ca503 lw x10,0(x25) +800007b0: 004c8c93 addi x25,x25,4 + +800007b4 : +Zbkc_clmulh_cg_cp_rs2_b10: + clmulh x15, x0, x10 # perform operation +800007b4: 0aa037b3 clmulh x15,x0,x10 + # Check if x15 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x15, Zbkc_clmulh_cg_cp_rs2_b10, Zbkc_clmulh_cg_cp_rs2_b10_str) +800007b8: 0009a683 lw x13,0(x19) +800007bc: 00f68863 beq x13,x15,800007cc +800007c0: 5810476f jal x14,80005540 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80009885 .word 0x80009885 +800007cc: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x627f7c09 +800007d0: 000cae83 lw x29,0(x25) +800007d4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x240d1e59 +800007d8: 000ca583 lw x11,0(x25) +800007dc: 004c8c93 addi x25,x25,4 + +800007e0 : +Zbkc_clmulh_cg_cp_rs2_b11: + clmulh x1, x29, x11 # perform operation +800007e0: 0abeb0b3 clmulh x1,x29,x11 + # Check if x1 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x1, Zbkc_clmulh_cg_cp_rs2_b11, Zbkc_clmulh_cg_cp_rs2_b11_str) +800007e4: 0009a683 lw x13,0(x19) +800007e8: 00168863 beq x13,x1,800007f8 +800007ec: 5550476f jal x14,80005540 +800007f0: 800007e0 .word 0x800007e0 +800007f4: 800098ba .word 0x800098ba +800007f8: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x883acf98 +800007fc: 000cae83 lw x29,0(x25) +80000800: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xf452cf41 +80000804: 000ca603 lw x12,0(x25) +80000808: 004c8c93 addi x25,x25,4 + +8000080c : +Zbkc_clmulh_cg_cp_rs2_b12: + clmulh x2, x29, x12 # perform operation +8000080c: 0aceb133 clmulh x2,x29,x12 + # Check if x2 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x2, Zbkc_clmulh_cg_cp_rs2_b12, Zbkc_clmulh_cg_cp_rs2_b12_str) +80000810: 0009a683 lw x13,0(x19) +80000814: 00268863 beq x13,x2,80000824 +80000818: 5290476f jal x14,80005540 +8000081c: 8000080c .word 0x8000080c +80000820: 800098ef .word 0x800098ef +80000824: 00498993 addi x19,x19,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000828: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000082c: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x913ecedd +80000830: 000ca383 lw x7,0(x25) +80000834: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x767fa508 +80000838: 000ca683 lw x13,0(x25) +8000083c: 004c8c93 addi x25,x25,4 + +80000840 : +Zbkc_clmulh_cg_cp_rs2_b13: + clmulh x16, x7, x13 # perform operation +80000840: 0ad3b833 clmulh x16,x7,x13 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkc_clmulh_cg_cp_rs2_b13, Zbkc_clmulh_cg_cp_rs2_b13_str) +80000844: 0009a203 lw x4,0(x19) +80000848: 01020863 beq x4,x16,80000858 +8000084c: 4b5042ef jal x5,80005500 +80000850: 80000840 .word 0x80000840 +80000854: 80009924 .word 0x80009924 +80000858: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x271d38c0 +8000085c: 000cab03 lw x22,0(x25) +80000860: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x517a79e0 +80000864: 000ca703 lw x14,0(x25) +80000868: 004c8c93 addi x25,x25,4 + +8000086c : +Zbkc_clmulh_cg_cp_rs2_b14: + clmulh x15, x22, x14 # perform operation +8000086c: 0aeb37b3 clmulh x15,x22,x14 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkc_clmulh_cg_cp_rs2_b14, Zbkc_clmulh_cg_cp_rs2_b14_str) +80000870: 0009a203 lw x4,0(x19) +80000874: 00f20863 beq x4,x15,80000884 +80000878: 489042ef jal x5,80005500 +8000087c: 8000086c .word 0x8000086c +80000880: 80009959 .word 0x80009959 +80000884: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xb7b2ad90 +80000888: 000cad83 lw x27,0(x25) +8000088c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0xa03cb4b3 +80000890: 000ca783 lw x15,0(x25) +80000894: 004c8c93 addi x25,x25,4 + +80000898 : +Zbkc_clmulh_cg_cp_rs2_b15: + clmulh x7, x27, x15 # perform operation +80000898: 0afdb3b3 clmulh x7,x27,x15 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkc_clmulh_cg_cp_rs2_b15, Zbkc_clmulh_cg_cp_rs2_b15_str) +8000089c: 0009a203 lw x4,0(x19) +800008a0: 00720863 beq x4,x7,800008b0 +800008a4: 45d042ef jal x5,80005500 +800008a8: 80000898 .word 0x80000898 +800008ac: 8000998e .word 0x8000998e +800008b0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x81142f1a +800008b4: 000ca503 lw x10,0(x25) +800008b8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0x03f57c71 +800008bc: 000ca803 lw x16,0(x25) +800008c0: 004c8c93 addi x25,x25,4 + +800008c4 : +Zbkc_clmulh_cg_cp_rs2_b16: + clmulh x12, x10, x16 # perform operation +800008c4: 0b053633 clmulh x12,x10,x16 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkc_clmulh_cg_cp_rs2_b16, Zbkc_clmulh_cg_cp_rs2_b16_str) +800008c8: 0009a203 lw x4,0(x19) +800008cc: 00c20863 beq x4,x12,800008dc +800008d0: 431042ef jal x5,80005500 +800008d4: 800008c4 .word 0x800008c4 +800008d8: 800099c3 .word 0x800099c3 +800008dc: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x6d95bfc7 +800008e0: 000ca403 lw x8,0(x25) +800008e4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xb5ba6f49 +800008e8: 000ca883 lw x17,0(x25) +800008ec: 004c8c93 addi x25,x25,4 + +800008f0 : +Zbkc_clmulh_cg_cp_rs2_b17: + clmulh x10, x8, x17 # perform operation +800008f0: 0b143533 clmulh x10,x8,x17 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zbkc_clmulh_cg_cp_rs2_b17, Zbkc_clmulh_cg_cp_rs2_b17_str) +800008f4: 0009a203 lw x4,0(x19) +800008f8: 00a20863 beq x4,x10,80000908 +800008fc: 405042ef jal x5,80005500 +80000900: 800008f0 .word 0x800008f0 +80000904: 800099f8 .word 0x800099f8 +80000908: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x2b0553cf +8000090c: 000ca303 lw x6,0(x25) +80000910: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x0ed61ff9 +80000914: 000ca903 lw x18,0(x25) +80000918: 004c8c93 addi x25,x25,4 + +8000091c : +Zbkc_clmulh_cg_cp_rs2_b18: + clmulh x12, x6, x18 # perform operation +8000091c: 0b233633 clmulh x12,x6,x18 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkc_clmulh_cg_cp_rs2_b18, Zbkc_clmulh_cg_cp_rs2_b18_str) +80000920: 0009a203 lw x4,0(x19) +80000924: 00c20863 beq x4,x12,80000934 +80000928: 3d9042ef jal x5,80005500 +8000092c: 8000091c .word 0x8000091c +80000930: 80009a2d .word 0x80009a2d +80000934: 00498993 addi x19,x19,4 + + mv x22, x19 # switch signature pointer register to avoid conflict with test +80000938: 00098b13 addi x22,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x9100e161 +8000093c: 000ca103 lw x2,0(x25) +80000940: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x338e2a31 +80000944: 000ca983 lw x19,0(x25) +80000948: 004c8c93 addi x25,x25,4 + +8000094c : +Zbkc_clmulh_cg_cp_rs2_b19: + clmulh x0, x2, x19 # perform operation +8000094c: 0b313033 clmulh x0,x2,x19 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zbkc_clmulh_cg_cp_rs2_b19, Zbkc_clmulh_cg_cp_rs2_b19_str) +80000950: 000b2203 lw x4,0(x22) +80000954: 00020863 beq x4,x0,80000964 +80000958: 3a9042ef jal x5,80005500 +8000095c: 8000094c .word 0x8000094c +80000960: 80009a62 .word 0x80009a62 +80000964: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xed511246 +80000968: 000cae03 lw x28,0(x25) +8000096c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xfd749bf9 +80000970: 000caa03 lw x20,0(x25) +80000974: 004c8c93 addi x25,x25,4 + +80000978 : +Zbkc_clmulh_cg_cp_rs2_b20: + clmulh x23, x28, x20 # perform operation +80000978: 0b4e3bb3 clmulh x23,x28,x20 + # Check if x23 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x23, Zbkc_clmulh_cg_cp_rs2_b20, Zbkc_clmulh_cg_cp_rs2_b20_str) +8000097c: 000b2203 lw x4,0(x22) +80000980: 01720863 beq x4,x23,80000990 +80000984: 37d042ef jal x5,80005500 +80000988: 80000978 .word 0x80000978 +8000098c: 80009a97 .word 0x80009a97 +80000990: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x570eaed7 +80000994: 000ca103 lw x2,0(x25) +80000998: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x5b64299e +8000099c: 000caa83 lw x21,0(x25) +800009a0: 004c8c93 addi x25,x25,4 + +800009a4 : +Zbkc_clmulh_cg_cp_rs2_b21: + clmulh x9, x2, x21 # perform operation +800009a4: 0b5134b3 clmulh x9,x2,x21 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zbkc_clmulh_cg_cp_rs2_b21, Zbkc_clmulh_cg_cp_rs2_b21_str) +800009a8: 000b2203 lw x4,0(x22) +800009ac: 00920863 beq x4,x9,800009bc +800009b0: 351042ef jal x5,80005500 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 80009acc .word 0x80009acc +800009bc: 004b0b13 addi x22,x22,4 + + mv x20, x22 # switch signature pointer register to avoid conflict with test +800009c0: 000b0a13 addi x20,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x02672cf9 +800009c4: 000ca783 lw x15,0(x25) +800009c8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0xdc367477 +800009cc: 000cab03 lw x22,0(x25) +800009d0: 004c8c93 addi x25,x25,4 + +800009d4 : +Zbkc_clmulh_cg_cp_rs2_b22: + clmulh x30, x15, x22 # perform operation +800009d4: 0b67bf33 clmulh x30,x15,x22 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zbkc_clmulh_cg_cp_rs2_b22, Zbkc_clmulh_cg_cp_rs2_b22_str) +800009d8: 000a2203 lw x4,0(x20) +800009dc: 01e20863 beq x4,x30,800009ec +800009e0: 321042ef jal x5,80005500 +800009e4: 800009d4 .word 0x800009d4 +800009e8: 80009b01 .word 0x80009b01 +800009ec: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xbe4439be +800009f0: 000ca983 lw x19,0(x25) +800009f4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xedcd161d +800009f8: 000cab83 lw x23,0(x25) +800009fc: 004c8c93 addi x25,x25,4 + +80000a00 : +Zbkc_clmulh_cg_cp_rs2_b23: + clmulh x2, x19, x23 # perform operation +80000a00: 0b79b133 clmulh x2,x19,x23 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zbkc_clmulh_cg_cp_rs2_b23, Zbkc_clmulh_cg_cp_rs2_b23_str) +80000a04: 000a2203 lw x4,0(x20) +80000a08: 00220863 beq x4,x2,80000a18 +80000a0c: 2f5042ef jal x5,80005500 +80000a10: 80000a00 .word 0x80000a00 +80000a14: 80009b36 .word 0x80009b36 +80000a18: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x7803f963 +80000a1c: 000caf83 lw x31,0(x25) +80000a20: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xbd9b8478 +80000a24: 000cac03 lw x24,0(x25) +80000a28: 004c8c93 addi x25,x25,4 + +80000a2c : +Zbkc_clmulh_cg_cp_rs2_b24: + clmulh x30, x31, x24 # perform operation +80000a2c: 0b8fbf33 clmulh x30,x31,x24 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zbkc_clmulh_cg_cp_rs2_b24, Zbkc_clmulh_cg_cp_rs2_b24_str) +80000a30: 000a2203 lw x4,0(x20) +80000a34: 01e20863 beq x4,x30,80000a44 +80000a38: 2c9042ef jal x5,80005500 +80000a3c: 80000a2c .word 0x80000a2c +80000a40: 80009b6b .word 0x80009b6b +80000a44: 004a0a13 addi x20,x20,4 + + mv x27, x25 # switch data pointer register to avoid conflict with test +80000a48: 000c8d93 addi x27,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0xfe06faa5 +80000a4c: 000da383 lw x7,0(x27) +80000a50: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x71d9242d +80000a54: 000dac83 lw x25,0(x27) +80000a58: 004d8d93 addi x27,x27,4 + +80000a5c : +Zbkc_clmulh_cg_cp_rs2_b25: + clmulh x21, x7, x25 # perform operation +80000a5c: 0b93bab3 clmulh x21,x7,x25 + # Check if x21 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x21, Zbkc_clmulh_cg_cp_rs2_b25, Zbkc_clmulh_cg_cp_rs2_b25_str) +80000a60: 000a2203 lw x4,0(x20) +80000a64: 01520863 beq x4,x21,80000a74 +80000a68: 299042ef jal x5,80005500 +80000a6c: 80000a5c .word 0x80000a5c +80000a70: 80009ba0 .word 0x80009ba0 +80000a74: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0xbebbe010 +80000a78: 000dae03 lw x28,0(x27) +80000a7c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0xa60ce2bd +80000a80: 000dad03 lw x26,0(x27) +80000a84: 004d8d93 addi x27,x27,4 + +80000a88 : +Zbkc_clmulh_cg_cp_rs2_b26: + clmulh x10, x28, x26 # perform operation +80000a88: 0bae3533 clmulh x10,x28,x26 + # Check if x10 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x10, Zbkc_clmulh_cg_cp_rs2_b26, Zbkc_clmulh_cg_cp_rs2_b26_str) +80000a8c: 000a2203 lw x4,0(x20) +80000a90: 00a20863 beq x4,x10,80000aa0 +80000a94: 26d042ef jal x5,80005500 +80000a98: 80000a88 .word 0x80000a88 +80000a9c: 80009bd5 .word 0x80009bd5 +80000aa0: 004a0a13 addi x20,x20,4 + + mv x12, x27 # switch data pointer register to avoid conflict with test +80000aa4: 000d8613 addi x12,x27,0 +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x6644b679 +80000aa8: 00062f03 lw x30,0(x12) +80000aac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xa42a9ee5 +80000ab0: 00062d83 lw x27,0(x12) +80000ab4: 00460613 addi x12,x12,4 + +80000ab8 : +Zbkc_clmulh_cg_cp_rs2_b27: + clmulh x2, x30, x27 # perform operation +80000ab8: 0bbf3133 clmulh x2,x30,x27 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zbkc_clmulh_cg_cp_rs2_b27, Zbkc_clmulh_cg_cp_rs2_b27_str) +80000abc: 000a2203 lw x4,0(x20) +80000ac0: 00220863 beq x4,x2,80000ad0 +80000ac4: 23d042ef jal x5,80005500 +80000ac8: 80000ab8 .word 0x80000ab8 +80000acc: 80009c0a .word 0x80009c0a +80000ad0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x767cf8fe +80000ad4: 00062a83 lw x21,0(x12) +80000ad8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xf0b71d7c +80000adc: 00062e03 lw x28,0(x12) +80000ae0: 00460613 addi x12,x12,4 + +80000ae4 : +Zbkc_clmulh_cg_cp_rs2_b28: + clmulh x25, x21, x28 # perform operation +80000ae4: 0bcabcb3 clmulh x25,x21,x28 + # Check if x25 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x25, Zbkc_clmulh_cg_cp_rs2_b28, Zbkc_clmulh_cg_cp_rs2_b28_str) +80000ae8: 000a2203 lw x4,0(x20) +80000aec: 01920863 beq x4,x25,80000afc +80000af0: 211042ef jal x5,80005500 +80000af4: 80000ae4 .word 0x80000ae4 +80000af8: 80009c3f .word 0x80009c3f +80000afc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xf7126ac4 +80000b00: 00062c83 lw x25,0(x12) +80000b04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x2a40f9e0 +80000b08: 00062e83 lw x29,0(x12) +80000b0c: 00460613 addi x12,x12,4 + +80000b10 : +Zbkc_clmulh_cg_cp_rs2_b29: + clmulh x31, x25, x29 # perform operation +80000b10: 0bdcbfb3 clmulh x31,x25,x29 + # Check if x31 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x31, Zbkc_clmulh_cg_cp_rs2_b29, Zbkc_clmulh_cg_cp_rs2_b29_str) +80000b14: 000a2203 lw x4,0(x20) +80000b18: 01f20863 beq x4,x31,80000b28 +80000b1c: 1e5042ef jal x5,80005500 +80000b20: 80000b10 .word 0x80000b10 +80000b24: 80009c74 .word 0x80009c74 +80000b28: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xbc5b010a +80000b2c: 00062583 lw x11,0(x12) +80000b30: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x5a6ff576 +80000b34: 00062f03 lw x30,0(x12) +80000b38: 00460613 addi x12,x12,4 + +80000b3c : +Zbkc_clmulh_cg_cp_rs2_b30: + clmulh x6, x11, x30 # perform operation +80000b3c: 0be5b333 clmulh x6,x11,x30 + # Check if x6 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x6, Zbkc_clmulh_cg_cp_rs2_b30, Zbkc_clmulh_cg_cp_rs2_b30_str) +80000b40: 000a2203 lw x4,0(x20) +80000b44: 00620863 beq x4,x6,80000b54 +80000b48: 1b9042ef jal x5,80005500 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 80009ca9 .word 0x80009ca9 +80000b54: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xa40dc761 +80000b58: 00062103 lw x2,0(x12) +80000b5c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xe97ef793 +80000b60: 00062f83 lw x31,0(x12) +80000b64: 00460613 addi x12,x12,4 + +80000b68 : +Zbkc_clmulh_cg_cp_rs2_b31: + clmulh x24, x2, x31 # perform operation +80000b68: 0bf13c33 clmulh x24,x2,x31 + # Check if x24 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x24, Zbkc_clmulh_cg_cp_rs2_b31, Zbkc_clmulh_cg_cp_rs2_b31_str) +80000b6c: 000a2203 lw x4,0(x20) +80000b70: 01820863 beq x4,x24,80000b80 +80000b74: 18d042ef jal x5,80005500 +80000b78: 80000b68 .word 0x80000b68 +80000b7c: 80009cde .word 0x80009cde +80000b80: 004a0a13 addi x20,x20,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xb2b4bb21 +80000b84: 00062883 lw x17,0(x12) +80000b88: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xa758073f +80000b8c: 00062383 lw x7,0(x12) +80000b90: 00460613 addi x12,x12,4 + +80000b94 : +Zbkc_clmulh_cg_cp_rd_b0: + clmulh x0, x17, x7 # perform operation +80000b94: 0a78b033 clmulh x0,x17,x7 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zbkc_clmulh_cg_cp_rd_b0, Zbkc_clmulh_cg_cp_rd_b0_str) +80000b98: 000a2203 lw x4,0(x20) +80000b9c: 00020863 beq x4,x0,80000bac +80000ba0: 161042ef jal x5,80005500 +80000ba4: 80000b94 .word 0x80000b94 +80000ba8: 80009d13 .word 0x80009d13 +80000bac: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x97573fed +80000bb0: 00062b03 lw x22,0(x12) +80000bb4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x69022098 +80000bb8: 00062003 lw x0,0(x12) +80000bbc: 00460613 addi x12,x12,4 + +80000bc0 : +Zbkc_clmulh_cg_cp_rd_b1: + clmulh x1, x22, x0 # perform operation +80000bc0: 0a0b30b3 clmulh x1,x22,x0 + # Check if x1 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x1, Zbkc_clmulh_cg_cp_rd_b1, Zbkc_clmulh_cg_cp_rd_b1_str) +80000bc4: 000a2203 lw x4,0(x20) +80000bc8: 00120863 beq x4,x1,80000bd8 +80000bcc: 135042ef jal x5,80005500 +80000bd0: 80000bc0 .word 0x80000bc0 +80000bd4: 80009d46 .word 0x80009d46 +80000bd8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xc421d148 +80000bdc: 00062303 lw x6,0(x12) +80000be0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x7a85a4cc +80000be4: 00062983 lw x19,0(x12) +80000be8: 00460613 addi x12,x12,4 + +80000bec : +Zbkc_clmulh_cg_cp_rd_b2: + clmulh x2, x6, x19 # perform operation +80000bec: 0b333133 clmulh x2,x6,x19 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zbkc_clmulh_cg_cp_rd_b2, Zbkc_clmulh_cg_cp_rd_b2_str) +80000bf0: 000a2203 lw x4,0(x20) +80000bf4: 00220863 beq x4,x2,80000c04 +80000bf8: 109042ef jal x5,80005500 +80000bfc: 80000bec .word 0x80000bec +80000c00: 80009d79 .word 0x80009d79 +80000c04: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xe09d94fc +80000c08: 00062583 lw x11,0(x12) +80000c0c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x28753fc4 +80000c10: 00062b83 lw x23,0(x12) +80000c14: 00460613 addi x12,x12,4 + +80000c18 : +Zbkc_clmulh_cg_cp_rd_b3: + clmulh x3, x11, x23 # perform operation +80000c18: 0b75b1b3 clmulh x3,x11,x23 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zbkc_clmulh_cg_cp_rd_b3, Zbkc_clmulh_cg_cp_rd_b3_str) +80000c1c: 000a2203 lw x4,0(x20) +80000c20: 00320863 beq x4,x3,80000c30 +80000c24: 0dd042ef jal x5,80005500 +80000c28: 80000c18 .word 0x80000c18 +80000c2c: 80009dac .word 0x80009dac +80000c30: 004a0a13 addi x20,x20,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c34: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c38: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xc5a8240b +80000c3c: 00062783 lw x15,0(x12) +80000c40: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xfac19877 +80000c44: 00062e03 lw x28,0(x12) +80000c48: 00460613 addi x12,x12,4 + +80000c4c : +Zbkc_clmulh_cg_cp_rd_b4: + clmulh x4, x15, x28 # perform operation +80000c4c: 0bc7b233 clmulh x4,x15,x28 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zbkc_clmulh_cg_cp_rd_b4, Zbkc_clmulh_cg_cp_rd_b4_str) +80000c50: 000a2383 lw x7,0(x20) +80000c54: 00438863 beq x7,x4,80000c64 +80000c58: 0c10446f jal x8,80005518 +80000c5c: 80000c4c .word 0x80000c4c +80000c60: 80009ddf .word 0x80009ddf +80000c64: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xe3cb4c78 +80000c68: 00062583 lw x11,0(x12) +80000c6c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x57dda1c9 +80000c70: 00062c83 lw x25,0(x12) +80000c74: 00460613 addi x12,x12,4 + +80000c78 : +Zbkc_clmulh_cg_cp_rd_b5: + clmulh x5, x11, x25 # perform operation +80000c78: 0b95b2b3 clmulh x5,x11,x25 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zbkc_clmulh_cg_cp_rd_b5, Zbkc_clmulh_cg_cp_rd_b5_str) +80000c7c: 000a2383 lw x7,0(x20) +80000c80: 00538863 beq x7,x5,80000c90 +80000c84: 0950446f jal x8,80005518 +80000c88: 80000c78 .word 0x80000c78 +80000c8c: 80009e12 .word 0x80009e12 +80000c90: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x9b728918 +80000c94: 00062183 lw x3,0(x12) +80000c98: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x45b88a57 +80000c9c: 00062e83 lw x29,0(x12) +80000ca0: 00460613 addi x12,x12,4 + +80000ca4 : +Zbkc_clmulh_cg_cp_rd_b6: + clmulh x6, x3, x29 # perform operation +80000ca4: 0bd1b333 clmulh x6,x3,x29 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkc_clmulh_cg_cp_rd_b6, Zbkc_clmulh_cg_cp_rd_b6_str) +80000ca8: 000a2383 lw x7,0(x20) +80000cac: 00638863 beq x7,x6,80000cbc +80000cb0: 0690446f jal x8,80005518 +80000cb4: 80000ca4 .word 0x80000ca4 +80000cb8: 80009e45 .word 0x80009e45 +80000cbc: 004a0a13 addi x20,x20,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cc0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cc4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x79195e8e +80000cc8: 00062103 lw x2,0(x12) +80000ccc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x34749c45 +80000cd0: 00062783 lw x15,0(x12) +80000cd4: 00460613 addi x12,x12,4 + +80000cd8 : +Zbkc_clmulh_cg_cp_rd_b7: + clmulh x7, x2, x15 # perform operation +80000cd8: 0af133b3 clmulh x7,x2,x15 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zbkc_clmulh_cg_cp_rd_b7, Zbkc_clmulh_cg_cp_rd_b7_str) +80000cdc: 000a2683 lw x13,0(x20) +80000ce0: 00768863 beq x13,x7,80000cf0 +80000ce4: 05d0476f jal x14,80005540 +80000ce8: 80000cd8 .word 0x80000cd8 +80000cec: 80009e78 .word 0x80009e78 +80000cf0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xc0daaca8 +80000cf4: 00062c83 lw x25,0(x12) +80000cf8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xe15054da +80000cfc: 00062b83 lw x23,0(x12) +80000d00: 00460613 addi x12,x12,4 + +80000d04 : +Zbkc_clmulh_cg_cp_rd_b8: + clmulh x8, x25, x23 # perform operation +80000d04: 0b7cb433 clmulh x8,x25,x23 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zbkc_clmulh_cg_cp_rd_b8, Zbkc_clmulh_cg_cp_rd_b8_str) +80000d08: 000a2683 lw x13,0(x20) +80000d0c: 00868863 beq x13,x8,80000d1c +80000d10: 0310476f jal x14,80005540 +80000d14: 80000d04 .word 0x80000d04 +80000d18: 80009eab .word 0x80009eab +80000d1c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x1b547c7e +80000d20: 00062e83 lw x29,0(x12) +80000d24: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x5ea0224f +80000d28: 00062b83 lw x23,0(x12) +80000d2c: 00460613 addi x12,x12,4 + +80000d30 : +Zbkc_clmulh_cg_cp_rd_b9: + clmulh x9, x29, x23 # perform operation +80000d30: 0b7eb4b3 clmulh x9,x29,x23 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zbkc_clmulh_cg_cp_rd_b9, Zbkc_clmulh_cg_cp_rd_b9_str) +80000d34: 000a2683 lw x13,0(x20) +80000d38: 00968863 beq x13,x9,80000d48 +80000d3c: 0050476f jal x14,80005540 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 80009ede .word 0x80009ede +80000d48: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x57cc9631 +80000d4c: 00062b03 lw x22,0(x12) +80000d50: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x63fa1b47 +80000d54: 00062983 lw x19,0(x12) +80000d58: 00460613 addi x12,x12,4 + +80000d5c : +Zbkc_clmulh_cg_cp_rd_b10: + clmulh x10, x22, x19 # perform operation +80000d5c: 0b3b3533 clmulh x10,x22,x19 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkc_clmulh_cg_cp_rd_b10, Zbkc_clmulh_cg_cp_rd_b10_str) +80000d60: 000a2683 lw x13,0(x20) +80000d64: 00a68863 beq x13,x10,80000d74 +80000d68: 7d80476f jal x14,80005540 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 80009f11 .word 0x80009f11 +80000d74: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x0bacd0f6 +80000d78: 00062e03 lw x28,0(x12) +80000d7c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xadedc923 +80000d80: 00062f83 lw x31,0(x12) +80000d84: 00460613 addi x12,x12,4 + +80000d88 : +Zbkc_clmulh_cg_cp_rd_b11: + clmulh x11, x28, x31 # perform operation +80000d88: 0bfe35b3 clmulh x11,x28,x31 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkc_clmulh_cg_cp_rd_b11, Zbkc_clmulh_cg_cp_rd_b11_str) +80000d8c: 000a2683 lw x13,0(x20) +80000d90: 00b68863 beq x13,x11,80000da0 +80000d94: 7ac0476f jal x14,80005540 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80009f45 .word 0x80009f45 +80000da0: 004a0a13 addi x20,x20,4 + + mv x11, x12 # switch data pointer register to avoid conflict with test +80000da4: 00060593 addi x11,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0xb4926c3e +80000da8: 0005a983 lw x19,0(x11) +80000dac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x1d7fb440 +80000db0: 0005af83 lw x31,0(x11) +80000db4: 00458593 addi x11,x11,4 + +80000db8 : +Zbkc_clmulh_cg_cp_rd_b12: + clmulh x12, x19, x31 # perform operation +80000db8: 0bf9b633 clmulh x12,x19,x31 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkc_clmulh_cg_cp_rd_b12, Zbkc_clmulh_cg_cp_rd_b12_str) +80000dbc: 000a2683 lw x13,0(x20) +80000dc0: 00c68863 beq x13,x12,80000dd0 +80000dc4: 77c0476f jal x14,80005540 +80000dc8: 80000db8 .word 0x80000db8 +80000dcc: 80009f79 .word 0x80009f79 +80000dd0: 004a0a13 addi x20,x20,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dd4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dd8: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x59464309 +80000ddc: 0005a983 lw x19,0(x11) +80000de0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0xe56e4553 +80000de4: 0005a483 lw x9,0(x11) +80000de8: 00458593 addi x11,x11,4 + +80000dec : +Zbkc_clmulh_cg_cp_rd_b13: + clmulh x13, x19, x9 # perform operation +80000dec: 0a99b6b3 clmulh x13,x19,x9 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zbkc_clmulh_cg_cp_rd_b13, Zbkc_clmulh_cg_cp_rd_b13_str) +80000df0: 000a2383 lw x7,0(x20) +80000df4: 00d38863 beq x7,x13,80000e04 +80000df8: 7200446f jal x8,80005518 +80000dfc: 80000dec .word 0x80000dec +80000e00: 80009fad .word 0x80009fad +80000e04: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x13dec7b0 +80000e08: 0005a983 lw x19,0(x11) +80000e0c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x9e85d8cc +80000e10: 0005ab03 lw x22,0(x11) +80000e14: 00458593 addi x11,x11,4 + +80000e18 : +Zbkc_clmulh_cg_cp_rd_b14: + clmulh x14, x19, x22 # perform operation +80000e18: 0b69b733 clmulh x14,x19,x22 + # Check if x14 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x14, Zbkc_clmulh_cg_cp_rd_b14, Zbkc_clmulh_cg_cp_rd_b14_str) +80000e1c: 000a2383 lw x7,0(x20) +80000e20: 00e38863 beq x7,x14,80000e30 +80000e24: 6f40446f jal x8,80005518 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80009fe1 .word 0x80009fe1 +80000e30: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x762864c7 +80000e34: 0005a883 lw x17,0(x11) +80000e38: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x472fbee4 +80000e3c: 0005a103 lw x2,0(x11) +80000e40: 00458593 addi x11,x11,4 + +80000e44 : +Zbkc_clmulh_cg_cp_rd_b15: + clmulh x15, x17, x2 # perform operation +80000e44: 0a28b7b3 clmulh x15,x17,x2 + # Check if x15 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x15, Zbkc_clmulh_cg_cp_rd_b15, Zbkc_clmulh_cg_cp_rd_b15_str) +80000e48: 000a2383 lw x7,0(x20) +80000e4c: 00f38863 beq x7,x15,80000e5c +80000e50: 6c80446f jal x8,80005518 +80000e54: 80000e44 .word 0x80000e44 +80000e58: 8000a015 .word 0x8000a015 +80000e5c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0x74ce1d0c +80000e60: 0005a783 lw x15,0(x11) +80000e64: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xce5a6a58 +80000e68: 0005a903 lw x18,0(x11) +80000e6c: 00458593 addi x11,x11,4 + +80000e70 : +Zbkc_clmulh_cg_cp_rd_b16: + clmulh x16, x15, x18 # perform operation +80000e70: 0b27b833 clmulh x16,x15,x18 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zbkc_clmulh_cg_cp_rd_b16, Zbkc_clmulh_cg_cp_rd_b16_str) +80000e74: 000a2383 lw x7,0(x20) +80000e78: 01038863 beq x7,x16,80000e88 +80000e7c: 69c0446f jal x8,80005518 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 8000a049 .word 0x8000a049 +80000e88: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x5c88d1d0 +80000e8c: 0005ab83 lw x23,0(x11) +80000e90: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x69c0ab18 +80000e94: 0005af03 lw x30,0(x11) +80000e98: 00458593 addi x11,x11,4 + +80000e9c : +Zbkc_clmulh_cg_cp_rd_b17: + clmulh x17, x23, x30 # perform operation +80000e9c: 0bebb8b3 clmulh x17,x23,x30 + # Check if x17 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x17, Zbkc_clmulh_cg_cp_rd_b17, Zbkc_clmulh_cg_cp_rd_b17_str) +80000ea0: 000a2383 lw x7,0(x20) +80000ea4: 01138863 beq x7,x17,80000eb4 +80000ea8: 6700446f jal x8,80005518 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 8000a07d .word 0x8000a07d +80000eb4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0xf01623c6 +80000eb8: 0005a603 lw x12,0(x11) +80000ebc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x53104bfe +80000ec0: 0005a683 lw x13,0(x11) +80000ec4: 00458593 addi x11,x11,4 + +80000ec8 : +Zbkc_clmulh_cg_cp_rd_b18: + clmulh x18, x12, x13 # perform operation +80000ec8: 0ad63933 clmulh x18,x12,x13 + # Check if x18 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x18, Zbkc_clmulh_cg_cp_rd_b18, Zbkc_clmulh_cg_cp_rd_b18_str) +80000ecc: 000a2383 lw x7,0(x20) +80000ed0: 01238863 beq x7,x18,80000ee0 +80000ed4: 6440446f jal x8,80005518 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000a0b1 .word 0x8000a0b1 +80000ee0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x87cb6e4d +80000ee4: 0005a903 lw x18,0(x11) +80000ee8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0xa82d384c +80000eec: 0005a003 lw x0,0(x11) +80000ef0: 00458593 addi x11,x11,4 + +80000ef4 : +Zbkc_clmulh_cg_cp_rd_b19: + clmulh x19, x18, x0 # perform operation +80000ef4: 0a0939b3 clmulh x19,x18,x0 + # Check if x19 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x19, Zbkc_clmulh_cg_cp_rd_b19, Zbkc_clmulh_cg_cp_rd_b19_str) +80000ef8: 000a2383 lw x7,0(x20) +80000efc: 01338863 beq x7,x19,80000f0c +80000f00: 6180446f jal x8,80005518 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000a0e5 .word 0x8000a0e5 +80000f0c: 004a0a13 addi x20,x20,4 + + mv x21, x20 # switch signature pointer register to avoid conflict with test +80000f10: 000a0a93 addi x21,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x45d75ff8 +80000f14: 0005af83 lw x31,0(x11) +80000f18: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x3e035c40 +80000f1c: 0005ac83 lw x25,0(x11) +80000f20: 00458593 addi x11,x11,4 + +80000f24 : +Zbkc_clmulh_cg_cp_rd_b20: + clmulh x20, x31, x25 # perform operation +80000f24: 0b9fba33 clmulh x20,x31,x25 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zbkc_clmulh_cg_cp_rd_b20, Zbkc_clmulh_cg_cp_rd_b20_str) +80000f28: 000aa383 lw x7,0(x21) +80000f2c: 01438863 beq x7,x20,80000f3c +80000f30: 5e80446f jal x8,80005518 +80000f34: 80000f24 .word 0x80000f24 +80000f38: 8000a119 .word 0x8000a119 +80000f3c: 004a8a93 addi x21,x21,4 + + mv x22, x21 # switch signature pointer register to avoid conflict with test +80000f40: 000a8b13 addi x22,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x7d46bb27 +80000f44: 0005a483 lw x9,0(x11) +80000f48: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x2293a23d +80000f4c: 0005a303 lw x6,0(x11) +80000f50: 00458593 addi x11,x11,4 + +80000f54 : +Zbkc_clmulh_cg_cp_rd_b21: + clmulh x21, x9, x6 # perform operation +80000f54: 0a64bab3 clmulh x21,x9,x6 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zbkc_clmulh_cg_cp_rd_b21, Zbkc_clmulh_cg_cp_rd_b21_str) +80000f58: 000b2383 lw x7,0(x22) +80000f5c: 01538863 beq x7,x21,80000f6c +80000f60: 5b80446f jal x8,80005518 +80000f64: 80000f54 .word 0x80000f54 +80000f68: 8000a14d .word 0x8000a14d +80000f6c: 004b0b13 addi x22,x22,4 + + mv x28, x22 # switch signature pointer register to avoid conflict with test +80000f70: 000b0e13 addi x28,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0xb23c24c3 +80000f74: 0005ad83 lw x27,0(x11) +80000f78: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x119f4559 +80000f7c: 0005a603 lw x12,0(x11) +80000f80: 00458593 addi x11,x11,4 + +80000f84 : +Zbkc_clmulh_cg_cp_rd_b22: + clmulh x22, x27, x12 # perform operation +80000f84: 0acdbb33 clmulh x22,x27,x12 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zbkc_clmulh_cg_cp_rd_b22, Zbkc_clmulh_cg_cp_rd_b22_str) +80000f88: 000e2383 lw x7,0(x28) +80000f8c: 01638863 beq x7,x22,80000f9c +80000f90: 5880446f jal x8,80005518 +80000f94: 80000f84 .word 0x80000f84 +80000f98: 8000a181 .word 0x8000a181 +80000f9c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0xae5be6ab +80000fa0: 0005a703 lw x14,0(x11) +80000fa4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xae0216e4 +80000fa8: 0005af83 lw x31,0(x11) +80000fac: 00458593 addi x11,x11,4 + +80000fb0 : +Zbkc_clmulh_cg_cp_rd_b23: + clmulh x23, x14, x31 # perform operation +80000fb0: 0bf73bb3 clmulh x23,x14,x31 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zbkc_clmulh_cg_cp_rd_b23, Zbkc_clmulh_cg_cp_rd_b23_str) +80000fb4: 000e2383 lw x7,0(x28) +80000fb8: 01738863 beq x7,x23,80000fc8 +80000fbc: 55c0446f jal x8,80005518 +80000fc0: 80000fb0 .word 0x80000fb0 +80000fc4: 8000a1b5 .word 0x8000a1b5 +80000fc8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0x9bdcb5ba +80000fcc: 0005a103 lw x2,0(x11) +80000fd0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x3b2d5265 +80000fd4: 0005a083 lw x1,0(x11) +80000fd8: 00458593 addi x11,x11,4 + +80000fdc : +Zbkc_clmulh_cg_cp_rd_b24: + clmulh x24, x2, x1 # perform operation +80000fdc: 0a113c33 clmulh x24,x2,x1 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zbkc_clmulh_cg_cp_rd_b24, Zbkc_clmulh_cg_cp_rd_b24_str) +80000fe0: 000e2383 lw x7,0(x28) +80000fe4: 01838863 beq x7,x24,80000ff4 +80000fe8: 5300446f jal x8,80005518 +80000fec: 80000fdc .word 0x80000fdc +80000ff0: 8000a1e9 .word 0x8000a1e9 +80000ff4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x654d563d +80000ff8: 0005ab03 lw x22,0(x11) +80000ffc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x1b9462dc +80001000: 0005ad83 lw x27,0(x11) +80001004: 00458593 addi x11,x11,4 + +80001008 : +Zbkc_clmulh_cg_cp_rd_b25: + clmulh x25, x22, x27 # perform operation +80001008: 0bbb3cb3 clmulh x25,x22,x27 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkc_clmulh_cg_cp_rd_b25, Zbkc_clmulh_cg_cp_rd_b25_str) +8000100c: 000e2383 lw x7,0(x28) +80001010: 01938863 beq x7,x25,80001020 +80001014: 5040446f jal x8,80005518 +80001018: 80001008 .word 0x80001008 +8000101c: 8000a21d .word 0x8000a21d +80001020: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0xe9dd1dd0 +80001024: 0005ac83 lw x25,0(x11) +80001028: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x0c5c4a9f +8000102c: 0005a703 lw x14,0(x11) +80001030: 00458593 addi x11,x11,4 + +80001034 : +Zbkc_clmulh_cg_cp_rd_b26: + clmulh x26, x25, x14 # perform operation +80001034: 0aecbd33 clmulh x26,x25,x14 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkc_clmulh_cg_cp_rd_b26, Zbkc_clmulh_cg_cp_rd_b26_str) +80001038: 000e2383 lw x7,0(x28) +8000103c: 01a38863 beq x7,x26,8000104c +80001040: 4d80446f jal x8,80005518 +80001044: 80001034 .word 0x80001034 +80001048: 8000a251 .word 0x8000a251 +8000104c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xd43e2995 +80001050: 0005a203 lw x4,0(x11) +80001054: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x87385b05 +80001058: 0005ab83 lw x23,0(x11) +8000105c: 00458593 addi x11,x11,4 + +80001060 : +Zbkc_clmulh_cg_cp_rd_b27: + clmulh x27, x4, x23 # perform operation +80001060: 0b723db3 clmulh x27,x4,x23 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zbkc_clmulh_cg_cp_rd_b27, Zbkc_clmulh_cg_cp_rd_b27_str) +80001064: 000e2383 lw x7,0(x28) +80001068: 01b38863 beq x7,x27,80001078 +8000106c: 4ac0446f jal x8,80005518 +80001070: 80001060 .word 0x80001060 +80001074: 8000a285 .word 0x8000a285 +80001078: 004e0e13 addi x28,x28,4 + + mv x2, x28 # switch signature pointer register to avoid conflict with test +8000107c: 000e0113 addi x2,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x98f26162 +80001080: 0005ab03 lw x22,0(x11) +80001084: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xe274ee7e +80001088: 0005ad83 lw x27,0(x11) +8000108c: 00458593 addi x11,x11,4 + +80001090 : +Zbkc_clmulh_cg_cp_rd_b28: + clmulh x28, x22, x27 # perform operation +80001090: 0bbb3e33 clmulh x28,x22,x27 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkc_clmulh_cg_cp_rd_b28, Zbkc_clmulh_cg_cp_rd_b28_str) +80001094: 00012383 lw x7,0(x2) +80001098: 01c38863 beq x7,x28,800010a8 +8000109c: 47c0446f jal x8,80005518 +800010a0: 80001090 .word 0x80001090 +800010a4: 8000a2b9 .word 0x8000a2b9 +800010a8: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x38df398f +800010ac: 0005ac83 lw x25,0(x11) +800010b0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0xa2e58708 +800010b4: 0005a303 lw x6,0(x11) +800010b8: 00458593 addi x11,x11,4 + +800010bc : +Zbkc_clmulh_cg_cp_rd_b29: + clmulh x29, x25, x6 # perform operation +800010bc: 0a6cbeb3 clmulh x29,x25,x6 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cp_rd_b29, Zbkc_clmulh_cg_cp_rd_b29_str) +800010c0: 00012383 lw x7,0(x2) +800010c4: 01d38863 beq x7,x29,800010d4 +800010c8: 4500446f jal x8,80005518 +800010cc: 800010bc .word 0x800010bc +800010d0: 8000a2ed .word 0x8000a2ed +800010d4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0xfa6f4222 +800010d8: 0005a883 lw x17,0(x11) +800010dc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x2f6f4209 +800010e0: 0005ab03 lw x22,0(x11) +800010e4: 00458593 addi x11,x11,4 + +800010e8 : +Zbkc_clmulh_cg_cp_rd_b30: + clmulh x30, x17, x22 # perform operation +800010e8: 0b68bf33 clmulh x30,x17,x22 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cp_rd_b30, Zbkc_clmulh_cg_cp_rd_b30_str) +800010ec: 00012383 lw x7,0(x2) +800010f0: 01e38863 beq x7,x30,80001100 +800010f4: 4240446f jal x8,80005518 +800010f8: 800010e8 .word 0x800010e8 +800010fc: 8000a321 .word 0x8000a321 +80001100: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x5f34ef7a +80001104: 0005a703 lw x14,0(x11) +80001108: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0xc0322061 +8000110c: 0005a003 lw x0,0(x11) +80001110: 00458593 addi x11,x11,4 + +80001114 : +Zbkc_clmulh_cg_cp_rd_b31: + clmulh x31, x14, x0 # perform operation +80001114: 0a073fb3 clmulh x31,x14,x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cp_rd_b31, Zbkc_clmulh_cg_cp_rd_b31_str) +80001118: 00012383 lw x7,0(x2) +8000111c: 01f38863 beq x7,x31,8000112c +80001120: 3f80446f jal x8,80005518 +80001124: 80001114 .word 0x80001114 +80001128: 8000a355 .word 0x8000a355 +8000112c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x00000000 +80001130: 0005ae03 lw x28,0(x11) +80001134: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x0d4479ac +80001138: 0005a303 lw x6,0(x11) +8000113c: 00458593 addi x11,x11,4 + +80001140 : +Zbkc_clmulh_cg_cp_rs1_edges_0x0: + clmulh x15, x28, x6 # perform operation +80001140: 0a6e37b3 clmulh x15,x28,x6 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cp_rs1_edges_0x0, Zbkc_clmulh_cg_cp_rs1_edges_0x0_str) +80001144: 00012383 lw x7,0(x2) +80001148: 00f38863 beq x7,x15,80001158 +8000114c: 3cc0446f jal x8,80005518 +80001150: 80001140 .word 0x80001140 +80001154: 8000a389 .word 0x8000a389 +80001158: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000001 +8000115c: 0005a603 lw x12,0(x11) +80001160: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x62438849 +80001164: 0005a703 lw x14,0(x11) +80001168: 00458593 addi x11,x11,4 + +8000116c : +Zbkc_clmulh_cg_cp_rs1_edges_0x1: + clmulh x10, x12, x14 # perform operation +8000116c: 0ae63533 clmulh x10,x12,x14 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cp_rs1_edges_0x1, Zbkc_clmulh_cg_cp_rs1_edges_0x1_str) +80001170: 00012383 lw x7,0(x2) +80001174: 00a38863 beq x7,x10,80001184 +80001178: 3a00446f jal x8,80005518 +8000117c: 8000116c .word 0x8000116c +80001180: 8000a3c4 .word 0x8000a3c4 +80001184: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000002 +80001188: 0005a603 lw x12,0(x11) +8000118c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xfb798b66 +80001190: 0005a203 lw x4,0(x11) +80001194: 00458593 addi x11,x11,4 + +80001198 : +Zbkc_clmulh_cg_cp_rs1_edges_0x2: + clmulh x30, x12, x4 # perform operation +80001198: 0a463f33 clmulh x30,x12,x4 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cp_rs1_edges_0x2, Zbkc_clmulh_cg_cp_rs1_edges_0x2_str) +8000119c: 00012383 lw x7,0(x2) +800011a0: 01e38863 beq x7,x30,800011b0 +800011a4: 3740446f jal x8,80005518 +800011a8: 80001198 .word 0x80001198 +800011ac: 8000a3ff .word 0x8000a3ff +800011b0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x80000000 +800011b4: 0005a203 lw x4,0(x11) +800011b8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x6c42d890 +800011bc: 0005aa83 lw x21,0(x11) +800011c0: 00458593 addi x11,x11,4 + +800011c4 : +Zbkc_clmulh_cg_cp_rs1_edges_0x80000000: + clmulh x9, x4, x21 # perform operation +800011c4: 0b5234b3 clmulh x9,x4,x21 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zbkc_clmulh_cg_cp_rs1_edges_0x80000000, Zbkc_clmulh_cg_cp_rs1_edges_0x80000000_str) +800011c8: 00012383 lw x7,0(x2) +800011cc: 00938863 beq x7,x9,800011dc +800011d0: 3480446f jal x8,80005518 +800011d4: 800011c4 .word 0x800011c4 +800011d8: 8000a43a .word 0x8000a43a +800011dc: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x80000001 +800011e0: 0005a983 lw x19,0(x11) +800011e4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0x2eb1895b +800011e8: 0005ac03 lw x24,0(x11) +800011ec: 00458593 addi x11,x11,4 + +800011f0 : +Zbkc_clmulh_cg_cp_rs1_edges_0x80000001: + clmulh x31, x19, x24 # perform operation +800011f0: 0b89bfb3 clmulh x31,x19,x24 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cp_rs1_edges_0x80000001, Zbkc_clmulh_cg_cp_rs1_edges_0x80000001_str) +800011f4: 00012383 lw x7,0(x2) +800011f8: 01f38863 beq x7,x31,80001208 +800011fc: 31c0446f jal x8,80005518 +80001200: 800011f0 .word 0x800011f0 +80001204: 8000a47d .word 0x8000a47d +80001208: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x7fffffff +8000120c: 0005a683 lw x13,0(x11) +80001210: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x0e6f7883 +80001214: 0005aa03 lw x20,0(x11) +80001218: 00458593 addi x11,x11,4 + +8000121c : +Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffff: + clmulh x21, x13, x20 # perform operation +8000121c: 0b46bab3 clmulh x21,x13,x20 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffff, Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffff_str) +80001220: 00012383 lw x7,0(x2) +80001224: 01538863 beq x7,x21,80001234 +80001228: 2f00446f jal x8,80005518 +8000122c: 8000121c .word 0x8000121c +80001230: 8000a4c0 .word 0x8000a4c0 +80001234: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x7ffffffe +80001238: 0005ae83 lw x29,0(x11) +8000123c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0xa4cec5d4 +80001240: 0005ab03 lw x22,0(x11) +80001244: 00458593 addi x11,x11,4 + +80001248 : +Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffe: + clmulh x23, x29, x22 # perform operation +80001248: 0b6ebbb3 clmulh x23,x29,x22 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffe, Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffe_str) +8000124c: 00012383 lw x7,0(x2) +80001250: 01738863 beq x7,x23,80001260 +80001254: 2c40446f jal x8,80005518 +80001258: 80001248 .word 0x80001248 +8000125c: 8000a503 .word 0x8000a503 +80001260: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xffffffff +80001264: 0005ae83 lw x29,0(x11) +80001268: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x801bc8d4 +8000126c: 0005a083 lw x1,0(x11) +80001270: 00458593 addi x11,x11,4 + +80001274 : +Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff: + clmulh x18, x29, x1 # perform operation +80001274: 0a1eb933 clmulh x18,x29,x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff_str) +80001278: 00012383 lw x7,0(x2) +8000127c: 01238863 beq x7,x18,8000128c +80001280: 2980446f jal x8,80005518 +80001284: 80001274 .word 0x80001274 +80001288: 8000a546 .word 0x8000a546 +8000128c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xfffffffe +80001290: 0005a303 lw x6,0(x11) +80001294: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xbced3cc3 +80001298: 0005a203 lw x4,0(x11) +8000129c: 00458593 addi x11,x11,4 + +800012a0 : +Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe: + clmulh x15, x6, x4 # perform operation +800012a0: 0a4337b3 clmulh x15,x6,x4 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe_str) +800012a4: 00012383 lw x7,0(x2) +800012a8: 00f38863 beq x7,x15,800012b8 +800012ac: 26c0446f jal x8,80005518 +800012b0: 800012a0 .word 0x800012a0 +800012b4: 8000a589 .word 0x8000a589 +800012b8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x5bbc8872 +800012bc: 0005a883 lw x17,0(x11) +800012c0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x1709ffce +800012c4: 0005a203 lw x4,0(x11) +800012c8: 00458593 addi x11,x11,4 + +800012cc : +Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc8872: + clmulh x3, x17, x4 # perform operation +800012cc: 0a48b1b3 clmulh x3,x17,x4 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc8872, Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc8872_str) +800012d0: 00012383 lw x7,0(x2) +800012d4: 00338863 beq x7,x3,800012e4 +800012d8: 2400446f jal x8,80005518 +800012dc: 800012cc .word 0x800012cc +800012e0: 8000a5cc .word 0x8000a5cc +800012e4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0xaaaaaaaa +800012e8: 0005a803 lw x16,0(x11) +800012ec: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0xd8f965f5 +800012f0: 0005a303 lw x6,0(x11) +800012f4: 00458593 addi x11,x11,4 + +800012f8 : +Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaa: + clmulh x27, x16, x6 # perform operation +800012f8: 0a683db3 clmulh x27,x16,x6 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaa, Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012fc: 00012383 lw x7,0(x2) +80001300: 01b38863 beq x7,x27,80001310 +80001304: 2140446f jal x8,80005518 +80001308: 800012f8 .word 0x800012f8 +8000130c: 8000a60f .word 0x8000a60f +80001310: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x55555555 +80001314: 0005a803 lw x16,0(x11) +80001318: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xd1acca18 +8000131c: 0005a503 lw x10,0(x11) +80001320: 00458593 addi x11,x11,4 + +80001324 : +Zbkc_clmulh_cg_cp_rs1_edges_0x55555555: + clmulh x27, x16, x10 # perform operation +80001324: 0aa83db3 clmulh x27,x16,x10 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cp_rs1_edges_0x55555555, Zbkc_clmulh_cg_cp_rs1_edges_0x55555555_str) +80001328: 00012383 lw x7,0(x2) +8000132c: 01b38863 beq x7,x27,8000133c +80001330: 1e80446f jal x8,80005518 +80001334: 80001324 .word 0x80001324 +80001338: 8000a652 .word 0x8000a652 +8000133c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0xefa8bb44 +80001340: 0005ac83 lw x25,0(x11) +80001344: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x00000000 +80001348: 0005a303 lw x6,0(x11) +8000134c: 00458593 addi x11,x11,4 + +80001350 : +Zbkc_clmulh_cg_cp_rs2_edges_0x0: + clmulh x17, x25, x6 # perform operation +80001350: 0a6cb8b3 clmulh x17,x25,x6 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cp_rs2_edges_0x0, Zbkc_clmulh_cg_cp_rs2_edges_0x0_str) +80001354: 00012383 lw x7,0(x2) +80001358: 01138863 beq x7,x17,80001368 +8000135c: 1bc0446f jal x8,80005518 +80001360: 80001350 .word 0x80001350 +80001364: 8000a695 .word 0x8000a695 +80001368: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x2270d10a +8000136c: 0005a283 lw x5,0(x11) +80001370: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x00000001 +80001374: 0005ab03 lw x22,0(x11) +80001378: 00458593 addi x11,x11,4 + +8000137c : +Zbkc_clmulh_cg_cp_rs2_edges_0x1: + clmulh x21, x5, x22 # perform operation +8000137c: 0b62bab3 clmulh x21,x5,x22 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cp_rs2_edges_0x1, Zbkc_clmulh_cg_cp_rs2_edges_0x1_str) +80001380: 00012383 lw x7,0(x2) +80001384: 01538863 beq x7,x21,80001394 +80001388: 1900446f jal x8,80005518 +8000138c: 8000137c .word 0x8000137c +80001390: 8000a6d1 .word 0x8000a6d1 +80001394: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x47c90b65 +80001398: 0005a903 lw x18,0(x11) +8000139c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x00000002 +800013a0: 0005a883 lw x17,0(x11) +800013a4: 00458593 addi x11,x11,4 + +800013a8 : +Zbkc_clmulh_cg_cp_rs2_edges_0x2: + clmulh x21, x18, x17 # perform operation +800013a8: 0b193ab3 clmulh x21,x18,x17 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cp_rs2_edges_0x2, Zbkc_clmulh_cg_cp_rs2_edges_0x2_str) +800013ac: 00012383 lw x7,0(x2) +800013b0: 01538863 beq x7,x21,800013c0 +800013b4: 1640446f jal x8,80005518 +800013b8: 800013a8 .word 0x800013a8 +800013bc: 8000a70d .word 0x8000a70d +800013c0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xcf0a612e +800013c4: 0005a083 lw x1,0(x11) +800013c8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x80000000 +800013cc: 0005af03 lw x30,0(x11) +800013d0: 00458593 addi x11,x11,4 + +800013d4 : +Zbkc_clmulh_cg_cp_rs2_edges_0x80000000: + clmulh x23, x1, x30 # perform operation +800013d4: 0be0bbb3 clmulh x23,x1,x30 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cp_rs2_edges_0x80000000, Zbkc_clmulh_cg_cp_rs2_edges_0x80000000_str) +800013d8: 00012383 lw x7,0(x2) +800013dc: 01738863 beq x7,x23,800013ec +800013e0: 1380446f jal x8,80005518 +800013e4: 800013d4 .word 0x800013d4 +800013e8: 8000a749 .word 0x8000a749 +800013ec: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x6ec75151 +800013f0: 0005a503 lw x10,0(x11) +800013f4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x80000001 +800013f8: 0005a483 lw x9,0(x11) +800013fc: 00458593 addi x11,x11,4 + +80001400 : +Zbkc_clmulh_cg_cp_rs2_edges_0x80000001: + clmulh x6, x10, x9 # perform operation +80001400: 0a953333 clmulh x6,x10,x9 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cp_rs2_edges_0x80000001, Zbkc_clmulh_cg_cp_rs2_edges_0x80000001_str) +80001404: 00012383 lw x7,0(x2) +80001408: 00638863 beq x7,x6,80001418 +8000140c: 10c0446f jal x8,80005518 +80001410: 80001400 .word 0x80001400 +80001414: 8000a78c .word 0x8000a78c +80001418: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x76f416cd +8000141c: 0005aa03 lw x20,0(x11) +80001420: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x7fffffff +80001424: 0005a283 lw x5,0(x11) +80001428: 00458593 addi x11,x11,4 + +8000142c : +Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffff: + clmulh x27, x20, x5 # perform operation +8000142c: 0a5a3db3 clmulh x27,x20,x5 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffff, Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffff_str) +80001430: 00012383 lw x7,0(x2) +80001434: 01b38863 beq x7,x27,80001444 +80001438: 0e00446f jal x8,80005518 +8000143c: 8000142c .word 0x8000142c +80001440: 8000a7cf .word 0x8000a7cf +80001444: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xe7a03b1b +80001448: 0005ac03 lw x24,0(x11) +8000144c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x7ffffffe +80001450: 0005af83 lw x31,0(x11) +80001454: 00458593 addi x11,x11,4 + +80001458 : +Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffe: + clmulh x9, x24, x31 # perform operation +80001458: 0bfc34b3 clmulh x9,x24,x31 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffe, Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffe_str) +8000145c: 00012383 lw x7,0(x2) +80001460: 00938863 beq x7,x9,80001470 +80001464: 0b40446f jal x8,80005518 +80001468: 80001458 .word 0x80001458 +8000146c: 8000a812 .word 0x8000a812 +80001470: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0xf60d9070 +80001474: 0005a703 lw x14,0(x11) +80001478: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xffffffff +8000147c: 0005a503 lw x10,0(x11) +80001480: 00458593 addi x11,x11,4 + +80001484 : +Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff: + clmulh x17, x14, x10 # perform operation +80001484: 0aa738b3 clmulh x17,x14,x10 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff_str) +80001488: 00012383 lw x7,0(x2) +8000148c: 01138863 beq x7,x17,8000149c +80001490: 0880446f jal x8,80005518 +80001494: 80001484 .word 0x80001484 +80001498: 8000a855 .word 0x8000a855 +8000149c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x00344293 +800014a0: 0005aa83 lw x21,0(x11) +800014a4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0xfffffffe +800014a8: 0005a303 lw x6,0(x11) +800014ac: 00458593 addi x11,x11,4 + +800014b0 : +Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe: + clmulh x24, x21, x6 # perform operation +800014b0: 0a6abc33 clmulh x24,x21,x6 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe_str) +800014b4: 00012383 lw x7,0(x2) +800014b8: 01838863 beq x7,x24,800014c8 +800014bc: 05c0446f jal x8,80005518 +800014c0: 800014b0 .word 0x800014b0 +800014c4: 8000a898 .word 0x8000a898 +800014c8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x4305866e +800014cc: 0005a183 lw x3,0(x11) +800014d0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x5bbc8872 +800014d4: 0005a283 lw x5,0(x11) +800014d8: 00458593 addi x11,x11,4 + +800014dc : +Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc8872: + clmulh x27, x3, x5 # perform operation +800014dc: 0a51bdb3 clmulh x27,x3,x5 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc8872, Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc8872_str) +800014e0: 00012383 lw x7,0(x2) +800014e4: 01b38863 beq x7,x27,800014f4 +800014e8: 0300446f jal x8,80005518 +800014ec: 800014dc .word 0x800014dc +800014f0: 8000a8db .word 0x8000a8db +800014f4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xf38f3c10 +800014f8: 0005a783 lw x15,0(x11) +800014fc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xaaaaaaaa +80001500: 0005ad83 lw x27,0(x11) +80001504: 00458593 addi x11,x11,4 + +80001508 : +Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaa: + clmulh x29, x15, x27 # perform operation +80001508: 0bb7beb3 clmulh x29,x15,x27 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaa, Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaa_str) +8000150c: 00012383 lw x7,0(x2) +80001510: 01d38863 beq x7,x29,80001520 +80001514: 0040446f jal x8,80005518 +80001518: 80001508 .word 0x80001508 +8000151c: 8000a91e .word 0x8000a91e +80001520: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x35241bc1 +80001524: 0005a903 lw x18,0(x11) +80001528: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x55555555 +8000152c: 0005ad83 lw x27,0(x11) +80001530: 00458593 addi x11,x11,4 + +80001534 : +Zbkc_clmulh_cg_cp_rs2_edges_0x55555555: + clmulh x25, x18, x27 # perform operation +80001534: 0bb93cb3 clmulh x25,x18,x27 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkc_clmulh_cg_cp_rs2_edges_0x55555555, Zbkc_clmulh_cg_cp_rs2_edges_0x55555555_str) +80001538: 00012383 lw x7,0(x2) +8000153c: 01938863 beq x7,x25,8000154c +80001540: 7d90346f jal x8,80005518 +80001544: 80001534 .word 0x80001534 +80001548: 8000a961 .word 0x8000a961 +8000154c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x00000000 +80001550: 0005ab83 lw x23,0(x11) +80001554: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x00000000 +80001558: 0005a883 lw x17,0(x11) +8000155c: 00458593 addi x11,x11,4 + +80001560 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + clmulh x15, x23, x17 # perform operation +80001560: 0b1bb7b3 clmulh x15,x23,x17 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001564: 00012383 lw x7,0(x2) +80001568: 00f38863 beq x7,x15,80001578 +8000156c: 7ad0346f jal x8,80005518 +80001570: 80001560 .word 0x80001560 +80001574: 8000a9a4 .word 0x8000a9a4 +80001578: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x00000000 +8000157c: 0005a883 lw x17,0(x11) +80001580: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x00000001 +80001584: 0005ab03 lw x22,0(x11) +80001588: 00458593 addi x11,x11,4 + +8000158c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + clmulh x19, x17, x22 # perform operation +8000158c: 0b68b9b3 clmulh x19,x17,x22 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001590: 00012383 lw x7,0(x2) +80001594: 01338863 beq x7,x19,800015a4 +80001598: 7810346f jal x8,80005518 +8000159c: 8000158c .word 0x8000158c +800015a0: 8000a9f7 .word 0x8000a9f7 +800015a4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x00000000 +800015a8: 0005a183 lw x3,0(x11) +800015ac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x00000002 +800015b0: 0005a683 lw x13,0(x11) +800015b4: 00458593 addi x11,x11,4 + +800015b8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + clmulh x29, x3, x13 # perform operation +800015b8: 0ad1beb3 clmulh x29,x3,x13 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015bc: 00012383 lw x7,0(x2) +800015c0: 01d38863 beq x7,x29,800015d0 +800015c4: 7550346f jal x8,80005518 +800015c8: 800015b8 .word 0x800015b8 +800015cc: 8000aa4a .word 0x8000aa4a +800015d0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x00000000 +800015d4: 0005ab03 lw x22,0(x11) +800015d8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x80000000 +800015dc: 0005aa83 lw x21,0(x11) +800015e0: 00458593 addi x11,x11,4 + +800015e4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + clmulh x10, x22, x21 # perform operation +800015e4: 0b5b3533 clmulh x10,x22,x21 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e8: 00012383 lw x7,0(x2) +800015ec: 00a38863 beq x7,x10,800015fc +800015f0: 7290346f jal x8,80005518 +800015f4: 800015e4 .word 0x800015e4 +800015f8: 8000aa9d .word 0x8000aa9d +800015fc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x00000000 +80001600: 0005aa03 lw x20,0(x11) +80001604: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x80000001 +80001608: 0005a083 lw x1,0(x11) +8000160c: 00458593 addi x11,x11,4 + +80001610 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + clmulh x29, x20, x1 # perform operation +80001610: 0a1a3eb3 clmulh x29,x20,x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001614: 00012383 lw x7,0(x2) +80001618: 01d38863 beq x7,x29,80001628 +8000161c: 6fd0346f jal x8,80005518 +80001620: 80001610 .word 0x80001610 +80001624: 8000aaf7 .word 0x8000aaf7 +80001628: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x00000000 +8000162c: 0005ad03 lw x26,0(x11) +80001630: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x7fffffff +80001634: 0005aa03 lw x20,0(x11) +80001638: 00458593 addi x11,x11,4 + +8000163c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + clmulh x16, x26, x20 # perform operation +8000163c: 0b4d3833 clmulh x16,x26,x20 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001640: 00012383 lw x7,0(x2) +80001644: 01038863 beq x7,x16,80001654 +80001648: 6d10346f jal x8,80005518 +8000164c: 8000163c .word 0x8000163c +80001650: 8000ab51 .word 0x8000ab51 +80001654: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x00000000 +80001658: 0005ab83 lw x23,0(x11) +8000165c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x7ffffffe +80001660: 0005a283 lw x5,0(x11) +80001664: 00458593 addi x11,x11,4 + +80001668 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + clmulh x16, x23, x5 # perform operation +80001668: 0a5bb833 clmulh x16,x23,x5 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +8000166c: 00012383 lw x7,0(x2) +80001670: 01038863 beq x7,x16,80001680 +80001674: 6a50346f jal x8,80005518 +80001678: 80001668 .word 0x80001668 +8000167c: 8000abab .word 0x8000abab +80001680: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x00000000 +80001684: 0005ac03 lw x24,0(x11) +80001688: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0xffffffff +8000168c: 0005a883 lw x17,0(x11) +80001690: 00458593 addi x11,x11,4 + +80001694 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + clmulh x26, x24, x17 # perform operation +80001694: 0b1c3d33 clmulh x26,x24,x17 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001698: 00012383 lw x7,0(x2) +8000169c: 01a38863 beq x7,x26,800016ac +800016a0: 6790346f jal x8,80005518 +800016a4: 80001694 .word 0x80001694 +800016a8: 8000ac05 .word 0x8000ac05 +800016ac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x00000000 +800016b0: 0005a683 lw x13,0(x11) +800016b4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xfffffffe +800016b8: 0005ac83 lw x25,0(x11) +800016bc: 00458593 addi x11,x11,4 + +800016c0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + clmulh x5, x13, x25 # perform operation +800016c0: 0b96b2b3 clmulh x5,x13,x25 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c4: 00012383 lw x7,0(x2) +800016c8: 00538863 beq x7,x5,800016d8 +800016cc: 64d0346f jal x8,80005518 +800016d0: 800016c0 .word 0x800016c0 +800016d4: 8000ac5f .word 0x8000ac5f +800016d8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x00000000 +800016dc: 0005a183 lw x3,0(x11) +800016e0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x5bbc8872 +800016e4: 0005a683 lw x13,0(x11) +800016e8: 00458593 addi x11,x11,4 + +800016ec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + clmulh x5, x3, x13 # perform operation +800016ec: 0ad1b2b3 clmulh x5,x3,x13 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016f0: 00012383 lw x7,0(x2) +800016f4: 00538863 beq x7,x5,80001704 +800016f8: 6210346f jal x8,80005518 +800016fc: 800016ec .word 0x800016ec +80001700: 8000acb9 .word 0x8000acb9 +80001704: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000000 +80001708: 0005a603 lw x12,0(x11) +8000170c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xaaaaaaaa +80001710: 0005af03 lw x30,0(x11) +80001714: 00458593 addi x11,x11,4 + +80001718 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + clmulh x16, x12, x30 # perform operation +80001718: 0be63833 clmulh x16,x12,x30 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +8000171c: 00012383 lw x7,0(x2) +80001720: 01038863 beq x7,x16,80001730 +80001724: 5f50346f jal x8,80005518 +80001728: 80001718 .word 0x80001718 +8000172c: 8000ad13 .word 0x8000ad13 +80001730: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x00000000 +80001734: 0005a903 lw x18,0(x11) +80001738: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x55555555 +8000173c: 0005a683 lw x13,0(x11) +80001740: 00458593 addi x11,x11,4 + +80001744 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + clmulh x23, x18, x13 # perform operation +80001744: 0ad93bb3 clmulh x23,x18,x13 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001748: 00012383 lw x7,0(x2) +8000174c: 01738863 beq x7,x23,8000175c +80001750: 5c90346f jal x8,80005518 +80001754: 80001744 .word 0x80001744 +80001758: 8000ad6d .word 0x8000ad6d +8000175c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x00000001 +80001760: 0005a203 lw x4,0(x11) +80001764: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x00000000 +80001768: 0005a703 lw x14,0(x11) +8000176c: 00458593 addi x11,x11,4 + +80001770 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + clmulh x31, x4, x14 # perform operation +80001770: 0ae23fb3 clmulh x31,x4,x14 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001774: 00012383 lw x7,0(x2) +80001778: 01f38863 beq x7,x31,80001788 +8000177c: 59d0346f jal x8,80005518 +80001780: 80001770 .word 0x80001770 +80001784: 8000adc7 .word 0x8000adc7 +80001788: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x00000001 +8000178c: 0005aa83 lw x21,0(x11) +80001790: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x00000001 +80001794: 0005af83 lw x31,0(x11) +80001798: 00458593 addi x11,x11,4 + +8000179c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + clmulh x29, x21, x31 # perform operation +8000179c: 0bfabeb3 clmulh x29,x21,x31 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017a0: 00012383 lw x7,0(x2) +800017a4: 01d38863 beq x7,x29,800017b4 +800017a8: 5710346f jal x8,80005518 +800017ac: 8000179c .word 0x8000179c +800017b0: 8000ae1a .word 0x8000ae1a +800017b4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000001 +800017b8: 0005a603 lw x12,0(x11) +800017bc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x00000002 +800017c0: 0005ad03 lw x26,0(x11) +800017c4: 00458593 addi x11,x11,4 + +800017c8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + clmulh x18, x12, x26 # perform operation +800017c8: 0ba63933 clmulh x18,x12,x26 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017cc: 00012383 lw x7,0(x2) +800017d0: 01238863 beq x7,x18,800017e0 +800017d4: 5450346f jal x8,80005518 +800017d8: 800017c8 .word 0x800017c8 +800017dc: 8000ae6d .word 0x8000ae6d +800017e0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x00000001 +800017e4: 0005ab03 lw x22,0(x11) +800017e8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x80000000 +800017ec: 0005aa03 lw x20,0(x11) +800017f0: 00458593 addi x11,x11,4 + +800017f4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + clmulh x16, x22, x20 # perform operation +800017f4: 0b4b3833 clmulh x16,x22,x20 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f8: 00012383 lw x7,0(x2) +800017fc: 01038863 beq x7,x16,8000180c +80001800: 5190346f jal x8,80005518 +80001804: 800017f4 .word 0x800017f4 +80001808: 8000aec0 .word 0x8000aec0 +8000180c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x00000001 +80001810: 0005a283 lw x5,0(x11) +80001814: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x80000001 +80001818: 0005a083 lw x1,0(x11) +8000181c: 00458593 addi x11,x11,4 + +80001820 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + clmulh x22, x5, x1 # perform operation +80001820: 0a12bb33 clmulh x22,x5,x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001824: 00012383 lw x7,0(x2) +80001828: 01638863 beq x7,x22,80001838 +8000182c: 4ed0346f jal x8,80005518 +80001830: 80001820 .word 0x80001820 +80001834: 8000af1a .word 0x8000af1a +80001838: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x00000001 +8000183c: 0005ac83 lw x25,0(x11) +80001840: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x7fffffff +80001844: 0005ad83 lw x27,0(x11) +80001848: 00458593 addi x11,x11,4 + +8000184c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + clmulh x5, x25, x27 # perform operation +8000184c: 0bbcb2b3 clmulh x5,x25,x27 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001850: 00012383 lw x7,0(x2) +80001854: 00538863 beq x7,x5,80001864 +80001858: 4c10346f jal x8,80005518 +8000185c: 8000184c .word 0x8000184c +80001860: 8000af74 .word 0x8000af74 +80001864: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x00000001 +80001868: 0005ac83 lw x25,0(x11) +8000186c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x7ffffffe +80001870: 0005a683 lw x13,0(x11) +80001874: 00458593 addi x11,x11,4 + +80001878 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + clmulh x26, x25, x13 # perform operation +80001878: 0adcbd33 clmulh x26,x25,x13 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +8000187c: 00012383 lw x7,0(x2) +80001880: 01a38863 beq x7,x26,80001890 +80001884: 4950346f jal x8,80005518 +80001888: 80001878 .word 0x80001878 +8000188c: 8000afce .word 0x8000afce +80001890: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x00000001 +80001894: 0005aa03 lw x20,0(x11) +80001898: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0xffffffff +8000189c: 0005a603 lw x12,0(x11) +800018a0: 00458593 addi x11,x11,4 + +800018a4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + clmulh x6, x20, x12 # perform operation +800018a4: 0aca3333 clmulh x6,x20,x12 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a8: 00012383 lw x7,0(x2) +800018ac: 00638863 beq x7,x6,800018bc +800018b0: 4690346f jal x8,80005518 +800018b4: 800018a4 .word 0x800018a4 +800018b8: 8000b028 .word 0x8000b028 +800018bc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x00000001 +800018c0: 0005ae03 lw x28,0(x11) +800018c4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0xfffffffe +800018c8: 0005a783 lw x15,0(x11) +800018cc: 00458593 addi x11,x11,4 + +800018d0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + clmulh x31, x28, x15 # perform operation +800018d0: 0afe3fb3 clmulh x31,x28,x15 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d4: 00012383 lw x7,0(x2) +800018d8: 01f38863 beq x7,x31,800018e8 +800018dc: 43d0346f jal x8,80005518 +800018e0: 800018d0 .word 0x800018d0 +800018e4: 8000b082 .word 0x8000b082 +800018e8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x00000001 +800018ec: 0005ad03 lw x26,0(x11) +800018f0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x5bbc8872 +800018f4: 0005a683 lw x13,0(x11) +800018f8: 00458593 addi x11,x11,4 + +800018fc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + clmulh x27, x26, x13 # perform operation +800018fc: 0add3db3 clmulh x27,x26,x13 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001900: 00012383 lw x7,0(x2) +80001904: 01b38863 beq x7,x27,80001914 +80001908: 4110346f jal x8,80005518 +8000190c: 800018fc .word 0x800018fc +80001910: 8000b0dc .word 0x8000b0dc +80001914: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x00000001 +80001918: 0005ab83 lw x23,0(x11) +8000191c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xaaaaaaaa +80001920: 0005a283 lw x5,0(x11) +80001924: 00458593 addi x11,x11,4 + +80001928 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + clmulh x3, x23, x5 # perform operation +80001928: 0a5bb1b3 clmulh x3,x23,x5 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +8000192c: 00012383 lw x7,0(x2) +80001930: 00338863 beq x7,x3,80001940 +80001934: 3e50346f jal x8,80005518 +80001938: 80001928 .word 0x80001928 +8000193c: 8000b136 .word 0x8000b136 +80001940: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x00000001 +80001944: 0005a483 lw x9,0(x11) +80001948: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x55555555 +8000194c: 0005a703 lw x14,0(x11) +80001950: 00458593 addi x11,x11,4 + +80001954 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + clmulh x23, x9, x14 # perform operation +80001954: 0ae4bbb3 clmulh x23,x9,x14 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001958: 00012383 lw x7,0(x2) +8000195c: 01738863 beq x7,x23,8000196c +80001960: 3b90346f jal x8,80005518 +80001964: 80001954 .word 0x80001954 +80001968: 8000b190 .word 0x8000b190 +8000196c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000002 +80001970: 0005a603 lw x12,0(x11) +80001974: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x00000000 +80001978: 0005a303 lw x6,0(x11) +8000197c: 00458593 addi x11,x11,4 + +80001980 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + clmulh x30, x12, x6 # perform operation +80001980: 0a663f33 clmulh x30,x12,x6 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001984: 00012383 lw x7,0(x2) +80001988: 01e38863 beq x7,x30,80001998 +8000198c: 38d0346f jal x8,80005518 +80001990: 80001980 .word 0x80001980 +80001994: 8000b1ea .word 0x8000b1ea +80001998: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x00000002 +8000199c: 0005a803 lw x16,0(x11) +800019a0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x00000001 +800019a4: 0005ad83 lw x27,0(x11) +800019a8: 00458593 addi x11,x11,4 + +800019ac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + clmulh x23, x16, x27 # perform operation +800019ac: 0bb83bb3 clmulh x23,x16,x27 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019b0: 00012383 lw x7,0(x2) +800019b4: 01738863 beq x7,x23,800019c4 +800019b8: 3610346f jal x8,80005518 +800019bc: 800019ac .word 0x800019ac +800019c0: 8000b23d .word 0x8000b23d +800019c4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x00000002 +800019c8: 0005af83 lw x31,0(x11) +800019cc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x00000002 +800019d0: 0005a903 lw x18,0(x11) +800019d4: 00458593 addi x11,x11,4 + +800019d8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + clmulh x29, x31, x18 # perform operation +800019d8: 0b2fbeb3 clmulh x29,x31,x18 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019dc: 00012383 lw x7,0(x2) +800019e0: 01d38863 beq x7,x29,800019f0 +800019e4: 3350346f jal x8,80005518 +800019e8: 800019d8 .word 0x800019d8 +800019ec: 8000b290 .word 0x8000b290 +800019f0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x00000002 +800019f4: 0005a503 lw x10,0(x11) +800019f8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x80000000 +800019fc: 0005ab03 lw x22,0(x11) +80001a00: 00458593 addi x11,x11,4 + +80001a04 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + clmulh x17, x10, x22 # perform operation +80001a04: 0b6538b3 clmulh x17,x10,x22 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a08: 00012383 lw x7,0(x2) +80001a0c: 01138863 beq x7,x17,80001a1c +80001a10: 3090346f jal x8,80005518 +80001a14: 80001a04 .word 0x80001a04 +80001a18: 8000b2e3 .word 0x8000b2e3 +80001a1c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x00000002 +80001a20: 0005a183 lw x3,0(x11) +80001a24: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x80000001 +80001a28: 0005ad03 lw x26,0(x11) +80001a2c: 00458593 addi x11,x11,4 + +80001a30 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + clmulh x12, x3, x26 # perform operation +80001a30: 0ba1b633 clmulh x12,x3,x26 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a34: 00012383 lw x7,0(x2) +80001a38: 00c38863 beq x7,x12,80001a48 +80001a3c: 2dd0346f jal x8,80005518 +80001a40: 80001a30 .word 0x80001a30 +80001a44: 8000b33d .word 0x8000b33d +80001a48: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x00000002 +80001a4c: 0005a883 lw x17,0(x11) +80001a50: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x7fffffff +80001a54: 0005a683 lw x13,0(x11) +80001a58: 00458593 addi x11,x11,4 + +80001a5c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + clmulh x6, x17, x13 # perform operation +80001a5c: 0ad8b333 clmulh x6,x17,x13 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a60: 00012383 lw x7,0(x2) +80001a64: 00638863 beq x7,x6,80001a74 +80001a68: 2b10346f jal x8,80005518 +80001a6c: 80001a5c .word 0x80001a5c +80001a70: 8000b397 .word 0x8000b397 +80001a74: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x00000002 +80001a78: 0005a183 lw x3,0(x11) +80001a7c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x7ffffffe +80001a80: 0005aa03 lw x20,0(x11) +80001a84: 00458593 addi x11,x11,4 + +80001a88 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + clmulh x23, x3, x20 # perform operation +80001a88: 0b41bbb3 clmulh x23,x3,x20 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a8c: 00012383 lw x7,0(x2) +80001a90: 01738863 beq x7,x23,80001aa0 +80001a94: 2850346f jal x8,80005518 +80001a98: 80001a88 .word 0x80001a88 +80001a9c: 8000b3f1 .word 0x8000b3f1 +80001aa0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x00000002 +80001aa4: 0005ae83 lw x29,0(x11) +80001aa8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0xffffffff +80001aac: 0005ac03 lw x24,0(x11) +80001ab0: 00458593 addi x11,x11,4 + +80001ab4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + clmulh x26, x29, x24 # perform operation +80001ab4: 0b8ebd33 clmulh x26,x29,x24 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab8: 00012383 lw x7,0(x2) +80001abc: 01a38863 beq x7,x26,80001acc +80001ac0: 2590346f jal x8,80005518 +80001ac4: 80001ab4 .word 0x80001ab4 +80001ac8: 8000b44b .word 0x8000b44b +80001acc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x00000002 +80001ad0: 0005af83 lw x31,0(x11) +80001ad4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xfffffffe +80001ad8: 0005aa83 lw x21,0(x11) +80001adc: 00458593 addi x11,x11,4 + +80001ae0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + clmulh x23, x31, x21 # perform operation +80001ae0: 0b5fbbb3 clmulh x23,x31,x21 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae4: 00012383 lw x7,0(x2) +80001ae8: 01738863 beq x7,x23,80001af8 +80001aec: 22d0346f jal x8,80005518 +80001af0: 80001ae0 .word 0x80001ae0 +80001af4: 8000b4a5 .word 0x8000b4a5 +80001af8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x00000002 +80001afc: 0005a983 lw x19,0(x11) +80001b00: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x5bbc8872 +80001b04: 0005ab83 lw x23,0(x11) +80001b08: 00458593 addi x11,x11,4 + +80001b0c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + clmulh x24, x19, x23 # perform operation +80001b0c: 0b79bc33 clmulh x24,x19,x23 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b10: 00012383 lw x7,0(x2) +80001b14: 01838863 beq x7,x24,80001b24 +80001b18: 2010346f jal x8,80005518 +80001b1c: 80001b0c .word 0x80001b0c +80001b20: 8000b4ff .word 0x8000b4ff +80001b24: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x00000002 +80001b28: 0005ad03 lw x26,0(x11) +80001b2c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0xaaaaaaaa +80001b30: 0005ab83 lw x23,0(x11) +80001b34: 00458593 addi x11,x11,4 + +80001b38 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + clmulh x27, x26, x23 # perform operation +80001b38: 0b7d3db3 clmulh x27,x26,x23 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b3c: 00012383 lw x7,0(x2) +80001b40: 01b38863 beq x7,x27,80001b50 +80001b44: 1d50346f jal x8,80005518 +80001b48: 80001b38 .word 0x80001b38 +80001b4c: 8000b559 .word 0x8000b559 +80001b50: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x00000002 +80001b54: 0005a603 lw x12,0(x11) +80001b58: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x55555555 +80001b5c: 0005af03 lw x30,0(x11) +80001b60: 00458593 addi x11,x11,4 + +80001b64 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + clmulh x5, x12, x30 # perform operation +80001b64: 0be632b3 clmulh x5,x12,x30 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b68: 00012383 lw x7,0(x2) +80001b6c: 00538863 beq x7,x5,80001b7c +80001b70: 1a90346f jal x8,80005518 +80001b74: 80001b64 .word 0x80001b64 +80001b78: 8000b5b3 .word 0x8000b5b3 +80001b7c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x80000000 +80001b80: 0005a483 lw x9,0(x11) +80001b84: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x00000000 +80001b88: 0005af03 lw x30,0(x11) +80001b8c: 00458593 addi x11,x11,4 + +80001b90 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + clmulh x28, x9, x30 # perform operation +80001b90: 0be4be33 clmulh x28,x9,x30 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b94: 00012383 lw x7,0(x2) +80001b98: 01c38863 beq x7,x28,80001ba8 +80001b9c: 17d0346f jal x8,80005518 +80001ba0: 80001b90 .word 0x80001b90 +80001ba4: 8000b60d .word 0x8000b60d +80001ba8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x80000000 +80001bac: 0005a183 lw x3,0(x11) +80001bb0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x00000001 +80001bb4: 0005a283 lw x5,0(x11) +80001bb8: 00458593 addi x11,x11,4 + +80001bbc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + clmulh x12, x3, x5 # perform operation +80001bbc: 0a51b633 clmulh x12,x3,x5 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bc0: 00012383 lw x7,0(x2) +80001bc4: 00c38863 beq x7,x12,80001bd4 +80001bc8: 1510346f jal x8,80005518 +80001bcc: 80001bbc .word 0x80001bbc +80001bd0: 8000b667 .word 0x8000b667 +80001bd4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x80000000 +80001bd8: 0005aa03 lw x20,0(x11) +80001bdc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x00000002 +80001be0: 0005a083 lw x1,0(x11) +80001be4: 00458593 addi x11,x11,4 + +80001be8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + clmulh x4, x20, x1 # perform operation +80001be8: 0a1a3233 clmulh x4,x20,x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bec: 00012383 lw x7,0(x2) +80001bf0: 00438863 beq x7,x4,80001c00 +80001bf4: 1250346f jal x8,80005518 +80001bf8: 80001be8 .word 0x80001be8 +80001bfc: 8000b6c1 .word 0x8000b6c1 +80001c00: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x80000000 +80001c04: 0005a603 lw x12,0(x11) +80001c08: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x80000000 +80001c0c: 0005a503 lw x10,0(x11) +80001c10: 00458593 addi x11,x11,4 + +80001c14 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + clmulh x3, x12, x10 # perform operation +80001c14: 0aa631b3 clmulh x3,x12,x10 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c18: 00012383 lw x7,0(x2) +80001c1c: 00338863 beq x7,x3,80001c2c +80001c20: 0f90346f jal x8,80005518 +80001c24: 80001c14 .word 0x80001c14 +80001c28: 8000b71b .word 0x8000b71b +80001c2c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x80000000 +80001c30: 0005a483 lw x9,0(x11) +80001c34: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x80000001 +80001c38: 0005a983 lw x19,0(x11) +80001c3c: 00458593 addi x11,x11,4 + +80001c40 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + clmulh x27, x9, x19 # perform operation +80001c40: 0b34bdb3 clmulh x27,x9,x19 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c44: 00012383 lw x7,0(x2) +80001c48: 01b38863 beq x7,x27,80001c58 +80001c4c: 0cd0346f jal x8,80005518 +80001c50: 80001c40 .word 0x80001c40 +80001c54: 8000b77c .word 0x8000b77c +80001c58: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x80000000 +80001c5c: 0005a483 lw x9,0(x11) +80001c60: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x7fffffff +80001c64: 0005ae83 lw x29,0(x11) +80001c68: 00458593 addi x11,x11,4 + +80001c6c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + clmulh x3, x9, x29 # perform operation +80001c6c: 0bd4b1b3 clmulh x3,x9,x29 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c70: 00012383 lw x7,0(x2) +80001c74: 00338863 beq x7,x3,80001c84 +80001c78: 0a10346f jal x8,80005518 +80001c7c: 80001c6c .word 0x80001c6c +80001c80: 8000b7dd .word 0x8000b7dd +80001c84: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x80000000 +80001c88: 0005ae03 lw x28,0(x11) +80001c8c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x7ffffffe +80001c90: 0005a083 lw x1,0(x11) +80001c94: 00458593 addi x11,x11,4 + +80001c98 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + clmulh x5, x28, x1 # perform operation +80001c98: 0a1e32b3 clmulh x5,x28,x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c9c: 00012383 lw x7,0(x2) +80001ca0: 00538863 beq x7,x5,80001cb0 +80001ca4: 0750346f jal x8,80005518 +80001ca8: 80001c98 .word 0x80001c98 +80001cac: 8000b83e .word 0x8000b83e +80001cb0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x80000000 +80001cb4: 0005a283 lw x5,0(x11) +80001cb8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0xffffffff +80001cbc: 0005a983 lw x19,0(x11) +80001cc0: 00458593 addi x11,x11,4 + +80001cc4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + clmulh x12, x5, x19 # perform operation +80001cc4: 0b32b633 clmulh x12,x5,x19 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc8: 00012383 lw x7,0(x2) +80001ccc: 00c38863 beq x7,x12,80001cdc +80001cd0: 0490346f jal x8,80005518 +80001cd4: 80001cc4 .word 0x80001cc4 +80001cd8: 8000b89f .word 0x8000b89f +80001cdc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x80000000 +80001ce0: 0005a683 lw x13,0(x11) +80001ce4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xfffffffe +80001ce8: 0005ac83 lw x25,0(x11) +80001cec: 00458593 addi x11,x11,4 + +80001cf0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + clmulh x1, x13, x25 # perform operation +80001cf0: 0b96b0b3 clmulh x1,x13,x25 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf4: 00012383 lw x7,0(x2) +80001cf8: 00138863 beq x7,x1,80001d08 +80001cfc: 01d0346f jal x8,80005518 +80001d00: 80001cf0 .word 0x80001cf0 +80001d04: 8000b900 .word 0x8000b900 +80001d08: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x80000000 +80001d0c: 0005ad83 lw x27,0(x11) +80001d10: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x5bbc8872 +80001d14: 0005af83 lw x31,0(x11) +80001d18: 00458593 addi x11,x11,4 + +80001d1c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + clmulh x6, x27, x31 # perform operation +80001d1c: 0bfdb333 clmulh x6,x27,x31 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d20: 00012383 lw x7,0(x2) +80001d24: 00638863 beq x7,x6,80001d34 +80001d28: 7f00346f jal x8,80005518 +80001d2c: 80001d1c .word 0x80001d1c +80001d30: 8000b961 .word 0x8000b961 +80001d34: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x80000000 +80001d38: 0005ae83 lw x29,0(x11) +80001d3c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xaaaaaaaa +80001d40: 0005a503 lw x10,0(x11) +80001d44: 00458593 addi x11,x11,4 + +80001d48 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + clmulh x31, x29, x10 # perform operation +80001d48: 0aaebfb3 clmulh x31,x29,x10 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d4c: 00012383 lw x7,0(x2) +80001d50: 01f38863 beq x7,x31,80001d60 +80001d54: 7c40346f jal x8,80005518 +80001d58: 80001d48 .word 0x80001d48 +80001d5c: 8000b9c2 .word 0x8000b9c2 +80001d60: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x80000000 +80001d64: 0005a183 lw x3,0(x11) +80001d68: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x55555555 +80001d6c: 0005a603 lw x12,0(x11) +80001d70: 00458593 addi x11,x11,4 + +80001d74 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + clmulh x23, x3, x12 # perform operation +80001d74: 0ac1bbb3 clmulh x23,x3,x12 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d78: 00012383 lw x7,0(x2) +80001d7c: 01738863 beq x7,x23,80001d8c +80001d80: 7980346f jal x8,80005518 +80001d84: 80001d74 .word 0x80001d74 +80001d88: 8000ba23 .word 0x8000ba23 +80001d8c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x80000001 +80001d90: 0005ab83 lw x23,0(x11) +80001d94: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x00000000 +80001d98: 0005a283 lw x5,0(x11) +80001d9c: 00458593 addi x11,x11,4 + +80001da0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + clmulh x12, x23, x5 # perform operation +80001da0: 0a5bb633 clmulh x12,x23,x5 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da4: 00012383 lw x7,0(x2) +80001da8: 00c38863 beq x7,x12,80001db8 +80001dac: 76c0346f jal x8,80005518 +80001db0: 80001da0 .word 0x80001da0 +80001db4: 8000ba84 .word 0x8000ba84 +80001db8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x80000001 +80001dbc: 0005a803 lw x16,0(x11) +80001dc0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x00000001 +80001dc4: 0005a603 lw x12,0(x11) +80001dc8: 00458593 addi x11,x11,4 + +80001dcc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + clmulh x4, x16, x12 # perform operation +80001dcc: 0ac83233 clmulh x4,x16,x12 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dd0: 00012383 lw x7,0(x2) +80001dd4: 00438863 beq x7,x4,80001de4 +80001dd8: 7400346f jal x8,80005518 +80001ddc: 80001dcc .word 0x80001dcc +80001de0: 8000bade .word 0x8000bade +80001de4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x80000001 +80001de8: 0005af03 lw x30,0(x11) +80001dec: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x00000002 +80001df0: 0005a803 lw x16,0(x11) +80001df4: 00458593 addi x11,x11,4 + +80001df8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + clmulh x9, x30, x16 # perform operation +80001df8: 0b0f34b3 clmulh x9,x30,x16 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001dfc: 00012383 lw x7,0(x2) +80001e00: 00938863 beq x7,x9,80001e10 +80001e04: 7140346f jal x8,80005518 +80001e08: 80001df8 .word 0x80001df8 +80001e0c: 8000bb38 .word 0x8000bb38 +80001e10: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x80000001 +80001e14: 0005a603 lw x12,0(x11) +80001e18: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x80000000 +80001e1c: 0005a803 lw x16,0(x11) +80001e20: 00458593 addi x11,x11,4 + +80001e24 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + clmulh x14, x12, x16 # perform operation +80001e24: 0b063733 clmulh x14,x12,x16 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e28: 00012383 lw x7,0(x2) +80001e2c: 00e38863 beq x7,x14,80001e3c +80001e30: 6e80346f jal x8,80005518 +80001e34: 80001e24 .word 0x80001e24 +80001e38: 8000bb92 .word 0x8000bb92 +80001e3c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x80000001 +80001e40: 0005ab83 lw x23,0(x11) +80001e44: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x80000001 +80001e48: 0005ad83 lw x27,0(x11) +80001e4c: 00458593 addi x11,x11,4 + +80001e50 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + clmulh x15, x23, x27 # perform operation +80001e50: 0bbbb7b3 clmulh x15,x23,x27 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e54: 00012383 lw x7,0(x2) +80001e58: 00f38863 beq x7,x15,80001e68 +80001e5c: 6bc0346f jal x8,80005518 +80001e60: 80001e50 .word 0x80001e50 +80001e64: 8000bbf3 .word 0x8000bbf3 +80001e68: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x80000001 +80001e6c: 0005ae03 lw x28,0(x11) +80001e70: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x7fffffff +80001e74: 0005ac83 lw x25,0(x11) +80001e78: 00458593 addi x11,x11,4 + +80001e7c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + clmulh x21, x28, x25 # perform operation +80001e7c: 0b9e3ab3 clmulh x21,x28,x25 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e80: 00012383 lw x7,0(x2) +80001e84: 01538863 beq x7,x21,80001e94 +80001e88: 6900346f jal x8,80005518 +80001e8c: 80001e7c .word 0x80001e7c +80001e90: 8000bc54 .word 0x8000bc54 +80001e94: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x80000001 +80001e98: 0005ad03 lw x26,0(x11) +80001e9c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x7ffffffe +80001ea0: 0005a903 lw x18,0(x11) +80001ea4: 00458593 addi x11,x11,4 + +80001ea8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + clmulh x13, x26, x18 # perform operation +80001ea8: 0b2d36b3 clmulh x13,x26,x18 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eac: 00012383 lw x7,0(x2) +80001eb0: 00d38863 beq x7,x13,80001ec0 +80001eb4: 6640346f jal x8,80005518 +80001eb8: 80001ea8 .word 0x80001ea8 +80001ebc: 8000bcb5 .word 0x8000bcb5 +80001ec0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x80000001 +80001ec4: 0005ac83 lw x25,0(x11) +80001ec8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0xffffffff +80001ecc: 0005a883 lw x17,0(x11) +80001ed0: 00458593 addi x11,x11,4 + +80001ed4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + clmulh x30, x25, x17 # perform operation +80001ed4: 0b1cbf33 clmulh x30,x25,x17 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed8: 00012383 lw x7,0(x2) +80001edc: 01e38863 beq x7,x30,80001eec +80001ee0: 6380346f jal x8,80005518 +80001ee4: 80001ed4 .word 0x80001ed4 +80001ee8: 8000bd16 .word 0x8000bd16 +80001eec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x80000001 +80001ef0: 0005a983 lw x19,0(x11) +80001ef4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xfffffffe +80001ef8: 0005aa83 lw x21,0(x11) +80001efc: 00458593 addi x11,x11,4 + +80001f00 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + clmulh x6, x19, x21 # perform operation +80001f00: 0b59b333 clmulh x6,x19,x21 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f04: 00012383 lw x7,0(x2) +80001f08: 00638863 beq x7,x6,80001f18 +80001f0c: 60c0346f jal x8,80005518 +80001f10: 80001f00 .word 0x80001f00 +80001f14: 8000bd77 .word 0x8000bd77 +80001f18: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x80000001 +80001f1c: 0005a983 lw x19,0(x11) +80001f20: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x5bbc8872 +80001f24: 0005a783 lw x15,0(x11) +80001f28: 00458593 addi x11,x11,4 + +80001f2c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + clmulh x30, x19, x15 # perform operation +80001f2c: 0af9bf33 clmulh x30,x19,x15 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f30: 00012383 lw x7,0(x2) +80001f34: 01e38863 beq x7,x30,80001f44 +80001f38: 5e00346f jal x8,80005518 +80001f3c: 80001f2c .word 0x80001f2c +80001f40: 8000bdd8 .word 0x8000bdd8 +80001f44: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x80000001 +80001f48: 0005aa83 lw x21,0(x11) +80001f4c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xaaaaaaaa +80001f50: 0005a183 lw x3,0(x11) +80001f54: 00458593 addi x11,x11,4 + +80001f58 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + clmulh x16, x21, x3 # perform operation +80001f58: 0a3ab833 clmulh x16,x21,x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f5c: 00012383 lw x7,0(x2) +80001f60: 01038863 beq x7,x16,80001f70 +80001f64: 5b40346f jal x8,80005518 +80001f68: 80001f58 .word 0x80001f58 +80001f6c: 8000be39 .word 0x8000be39 +80001f70: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x80000001 +80001f74: 0005ad83 lw x27,0(x11) +80001f78: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x55555555 +80001f7c: 0005a903 lw x18,0(x11) +80001f80: 00458593 addi x11,x11,4 + +80001f84 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + clmulh x31, x27, x18 # perform operation +80001f84: 0b2dbfb3 clmulh x31,x27,x18 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f88: 00012383 lw x7,0(x2) +80001f8c: 01f38863 beq x7,x31,80001f9c +80001f90: 5880346f jal x8,80005518 +80001f94: 80001f84 .word 0x80001f84 +80001f98: 8000be9a .word 0x8000be9a +80001f9c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x7fffffff +80001fa0: 0005a883 lw x17,0(x11) +80001fa4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x00000000 +80001fa8: 0005ae03 lw x28,0(x11) +80001fac: 00458593 addi x11,x11,4 + +80001fb0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + clmulh x26, x17, x28 # perform operation +80001fb0: 0bc8bd33 clmulh x26,x17,x28 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb4: 00012383 lw x7,0(x2) +80001fb8: 01a38863 beq x7,x26,80001fc8 +80001fbc: 55c0346f jal x8,80005518 +80001fc0: 80001fb0 .word 0x80001fb0 +80001fc4: 8000befb .word 0x8000befb +80001fc8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x7fffffff +80001fcc: 0005ad83 lw x27,0(x11) +80001fd0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x00000001 +80001fd4: 0005a603 lw x12,0(x11) +80001fd8: 00458593 addi x11,x11,4 + +80001fdc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + clmulh x13, x27, x12 # perform operation +80001fdc: 0acdb6b3 clmulh x13,x27,x12 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fe0: 00012383 lw x7,0(x2) +80001fe4: 00d38863 beq x7,x13,80001ff4 +80001fe8: 5300346f jal x8,80005518 +80001fec: 80001fdc .word 0x80001fdc +80001ff0: 8000bf55 .word 0x8000bf55 +80001ff4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x7fffffff +80001ff8: 0005a703 lw x14,0(x11) +80001ffc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x00000002 +80002000: 0005ab83 lw x23,0(x11) +80002004: 00458593 addi x11,x11,4 + +80002008 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + clmulh x18, x14, x23 # perform operation +80002008: 0b773933 clmulh x18,x14,x23 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +8000200c: 00012383 lw x7,0(x2) +80002010: 01238863 beq x7,x18,80002020 +80002014: 5040346f jal x8,80005518 +80002018: 80002008 .word 0x80002008 +8000201c: 8000bfaf .word 0x8000bfaf +80002020: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x7fffffff +80002024: 0005a503 lw x10,0(x11) +80002028: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x80000000 +8000202c: 0005aa03 lw x20,0(x11) +80002030: 00458593 addi x11,x11,4 + +80002034 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + clmulh x31, x10, x20 # perform operation +80002034: 0b453fb3 clmulh x31,x10,x20 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002038: 00012383 lw x7,0(x2) +8000203c: 01f38863 beq x7,x31,8000204c +80002040: 4d80346f jal x8,80005518 +80002044: 80002034 .word 0x80002034 +80002048: 8000c009 .word 0x8000c009 +8000204c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x7fffffff +80002050: 0005ac03 lw x24,0(x11) +80002054: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x80000001 +80002058: 0005a183 lw x3,0(x11) +8000205c: 00458593 addi x11,x11,4 + +80002060 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + clmulh x17, x24, x3 # perform operation +80002060: 0a3c38b3 clmulh x17,x24,x3 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002064: 00012383 lw x7,0(x2) +80002068: 01138863 beq x7,x17,80002078 +8000206c: 4ac0346f jal x8,80005518 +80002070: 80002060 .word 0x80002060 +80002074: 8000c06a .word 0x8000c06a +80002078: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x7fffffff +8000207c: 0005ac03 lw x24,0(x11) +80002080: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x7fffffff +80002084: 0005af83 lw x31,0(x11) +80002088: 00458593 addi x11,x11,4 + +8000208c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + clmulh x20, x24, x31 # perform operation +8000208c: 0bfc3a33 clmulh x20,x24,x31 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002090: 00012383 lw x7,0(x2) +80002094: 01438863 beq x7,x20,800020a4 +80002098: 4800346f jal x8,80005518 +8000209c: 8000208c .word 0x8000208c +800020a0: 8000c0cb .word 0x8000c0cb +800020a4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x7fffffff +800020a8: 0005aa03 lw x20,0(x11) +800020ac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x7ffffffe +800020b0: 0005a983 lw x19,0(x11) +800020b4: 00458593 addi x11,x11,4 + +800020b8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + clmulh x18, x20, x19 # perform operation +800020b8: 0b3a3933 clmulh x18,x20,x19 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020bc: 00012383 lw x7,0(x2) +800020c0: 01238863 beq x7,x18,800020d0 +800020c4: 4540346f jal x8,80005518 +800020c8: 800020b8 .word 0x800020b8 +800020cc: 8000c12c .word 0x8000c12c +800020d0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x7fffffff +800020d4: 0005ad03 lw x26,0(x11) +800020d8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xffffffff +800020dc: 0005a903 lw x18,0(x11) +800020e0: 00458593 addi x11,x11,4 + +800020e4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + clmulh x28, x26, x18 # perform operation +800020e4: 0b2d3e33 clmulh x28,x26,x18 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e8: 00012383 lw x7,0(x2) +800020ec: 01c38863 beq x7,x28,800020fc +800020f0: 4280346f jal x8,80005518 +800020f4: 800020e4 .word 0x800020e4 +800020f8: 8000c18d .word 0x8000c18d +800020fc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x7fffffff +80002100: 0005ad83 lw x27,0(x11) +80002104: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0xfffffffe +80002108: 0005a783 lw x15,0(x11) +8000210c: 00458593 addi x11,x11,4 + +80002110 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + clmulh x5, x27, x15 # perform operation +80002110: 0afdb2b3 clmulh x5,x27,x15 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002114: 00012383 lw x7,0(x2) +80002118: 00538863 beq x7,x5,80002128 +8000211c: 3fc0346f jal x8,80005518 +80002120: 80002110 .word 0x80002110 +80002124: 8000c1ee .word 0x8000c1ee +80002128: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x7fffffff +8000212c: 0005a303 lw x6,0(x11) +80002130: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x5bbc8872 +80002134: 0005aa83 lw x21,0(x11) +80002138: 00458593 addi x11,x11,4 + +8000213c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + clmulh x20, x6, x21 # perform operation +8000213c: 0b533a33 clmulh x20,x6,x21 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002140: 00012383 lw x7,0(x2) +80002144: 01438863 beq x7,x20,80002154 +80002148: 3d00346f jal x8,80005518 +8000214c: 8000213c .word 0x8000213c +80002150: 8000c24f .word 0x8000c24f +80002154: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x7fffffff +80002158: 0005a503 lw x10,0(x11) +8000215c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0xaaaaaaaa +80002160: 0005ab03 lw x22,0(x11) +80002164: 00458593 addi x11,x11,4 + +80002168 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + clmulh x12, x10, x22 # perform operation +80002168: 0b653633 clmulh x12,x10,x22 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +8000216c: 00012383 lw x7,0(x2) +80002170: 00c38863 beq x7,x12,80002180 +80002174: 3a40346f jal x8,80005518 +80002178: 80002168 .word 0x80002168 +8000217c: 8000c2b0 .word 0x8000c2b0 +80002180: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x7fffffff +80002184: 0005a683 lw x13,0(x11) +80002188: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x55555555 +8000218c: 0005a603 lw x12,0(x11) +80002190: 00458593 addi x11,x11,4 + +80002194 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + clmulh x5, x13, x12 # perform operation +80002194: 0ac6b2b3 clmulh x5,x13,x12 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002198: 00012383 lw x7,0(x2) +8000219c: 00538863 beq x7,x5,800021ac +800021a0: 3780346f jal x8,80005518 +800021a4: 80002194 .word 0x80002194 +800021a8: 8000c311 .word 0x8000c311 +800021ac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x7ffffffe +800021b0: 0005a803 lw x16,0(x11) +800021b4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x00000000 +800021b8: 0005a503 lw x10,0(x11) +800021bc: 00458593 addi x11,x11,4 + +800021c0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + clmulh x26, x16, x10 # perform operation +800021c0: 0aa83d33 clmulh x26,x16,x10 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c4: 00012383 lw x7,0(x2) +800021c8: 01a38863 beq x7,x26,800021d8 +800021cc: 34c0346f jal x8,80005518 +800021d0: 800021c0 .word 0x800021c0 +800021d4: 8000c372 .word 0x8000c372 +800021d8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x7ffffffe +800021dc: 0005ac03 lw x24,0(x11) +800021e0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x00000001 +800021e4: 0005a683 lw x13,0(x11) +800021e8: 00458593 addi x11,x11,4 + +800021ec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + clmulh x5, x24, x13 # perform operation +800021ec: 0adc32b3 clmulh x5,x24,x13 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021f0: 00012383 lw x7,0(x2) +800021f4: 00538863 beq x7,x5,80002204 +800021f8: 3200346f jal x8,80005518 +800021fc: 800021ec .word 0x800021ec +80002200: 8000c3cc .word 0x8000c3cc +80002204: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x7ffffffe +80002208: 0005aa83 lw x21,0(x11) +8000220c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x00000002 +80002210: 0005a683 lw x13,0(x11) +80002214: 00458593 addi x11,x11,4 + +80002218 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + clmulh x30, x21, x13 # perform operation +80002218: 0adabf33 clmulh x30,x21,x13 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +8000221c: 00012383 lw x7,0(x2) +80002220: 01e38863 beq x7,x30,80002230 +80002224: 2f40346f jal x8,80005518 +80002228: 80002218 .word 0x80002218 +8000222c: 8000c426 .word 0x8000c426 +80002230: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x7ffffffe +80002234: 0005a483 lw x9,0(x11) +80002238: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x80000000 +8000223c: 0005af83 lw x31,0(x11) +80002240: 00458593 addi x11,x11,4 + +80002244 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + clmulh x4, x9, x31 # perform operation +80002244: 0bf4b233 clmulh x4,x9,x31 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002248: 00012383 lw x7,0(x2) +8000224c: 00438863 beq x7,x4,8000225c +80002250: 2c80346f jal x8,80005518 +80002254: 80002244 .word 0x80002244 +80002258: 8000c480 .word 0x8000c480 +8000225c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x7ffffffe +80002260: 0005ae03 lw x28,0(x11) +80002264: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x80000001 +80002268: 0005ac83 lw x25,0(x11) +8000226c: 00458593 addi x11,x11,4 + +80002270 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + clmulh x20, x28, x25 # perform operation +80002270: 0b9e3a33 clmulh x20,x28,x25 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002274: 00012383 lw x7,0(x2) +80002278: 01438863 beq x7,x20,80002288 +8000227c: 29c0346f jal x8,80005518 +80002280: 80002270 .word 0x80002270 +80002284: 8000c4e1 .word 0x8000c4e1 +80002288: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x7ffffffe +8000228c: 0005a683 lw x13,0(x11) +80002290: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x7fffffff +80002294: 0005a083 lw x1,0(x11) +80002298: 00458593 addi x11,x11,4 + +8000229c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + clmulh x20, x13, x1 # perform operation +8000229c: 0a16ba33 clmulh x20,x13,x1 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022a0: 00012383 lw x7,0(x2) +800022a4: 01438863 beq x7,x20,800022b4 +800022a8: 2700346f jal x8,80005518 +800022ac: 8000229c .word 0x8000229c +800022b0: 8000c542 .word 0x8000c542 +800022b4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x7ffffffe +800022b8: 0005a703 lw x14,0(x11) +800022bc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x7ffffffe +800022c0: 0005ab83 lw x23,0(x11) +800022c4: 00458593 addi x11,x11,4 + +800022c8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + clmulh x18, x14, x23 # perform operation +800022c8: 0b773933 clmulh x18,x14,x23 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022cc: 00012383 lw x7,0(x2) +800022d0: 01238863 beq x7,x18,800022e0 +800022d4: 2440346f jal x8,80005518 +800022d8: 800022c8 .word 0x800022c8 +800022dc: 8000c5a3 .word 0x8000c5a3 +800022e0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x7ffffffe +800022e4: 0005ae03 lw x28,0(x11) +800022e8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xffffffff +800022ec: 0005aa03 lw x20,0(x11) +800022f0: 00458593 addi x11,x11,4 + +800022f4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + clmulh x29, x28, x20 # perform operation +800022f4: 0b4e3eb3 clmulh x29,x28,x20 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f8: 00012383 lw x7,0(x2) +800022fc: 01d38863 beq x7,x29,8000230c +80002300: 2180346f jal x8,80005518 +80002304: 800022f4 .word 0x800022f4 +80002308: 8000c604 .word 0x8000c604 +8000230c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x7ffffffe +80002310: 0005aa03 lw x20,0(x11) +80002314: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0xfffffffe +80002318: 0005a703 lw x14,0(x11) +8000231c: 00458593 addi x11,x11,4 + +80002320 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + clmulh x19, x20, x14 # perform operation +80002320: 0aea39b3 clmulh x19,x20,x14 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002324: 00012383 lw x7,0(x2) +80002328: 01338863 beq x7,x19,80002338 +8000232c: 1ec0346f jal x8,80005518 +80002330: 80002320 .word 0x80002320 +80002334: 8000c665 .word 0x8000c665 +80002338: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x7ffffffe +8000233c: 0005a803 lw x16,0(x11) +80002340: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x5bbc8872 +80002344: 0005ad03 lw x26,0(x11) +80002348: 00458593 addi x11,x11,4 + +8000234c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + clmulh x21, x16, x26 # perform operation +8000234c: 0ba83ab3 clmulh x21,x16,x26 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002350: 00012383 lw x7,0(x2) +80002354: 01538863 beq x7,x21,80002364 +80002358: 1c00346f jal x8,80005518 +8000235c: 8000234c .word 0x8000234c +80002360: 8000c6c6 .word 0x8000c6c6 +80002364: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x7ffffffe +80002368: 0005a983 lw x19,0(x11) +8000236c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xaaaaaaaa +80002370: 0005aa03 lw x20,0(x11) +80002374: 00458593 addi x11,x11,4 + +80002378 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + clmulh x22, x19, x20 # perform operation +80002378: 0b49bb33 clmulh x22,x19,x20 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +8000237c: 00012383 lw x7,0(x2) +80002380: 01638863 beq x7,x22,80002390 +80002384: 1940346f jal x8,80005518 +80002388: 80002378 .word 0x80002378 +8000238c: 8000c727 .word 0x8000c727 +80002390: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x7ffffffe +80002394: 0005a683 lw x13,0(x11) +80002398: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x55555555 +8000239c: 0005a803 lw x16,0(x11) +800023a0: 00458593 addi x11,x11,4 + +800023a4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + clmulh x6, x13, x16 # perform operation +800023a4: 0b06b333 clmulh x6,x13,x16 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a8: 00012383 lw x7,0(x2) +800023ac: 00638863 beq x7,x6,800023bc +800023b0: 1680346f jal x8,80005518 +800023b4: 800023a4 .word 0x800023a4 +800023b8: 8000c788 .word 0x8000c788 +800023bc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xffffffff +800023c0: 0005a083 lw x1,0(x11) +800023c4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x00000000 +800023c8: 0005ae03 lw x28,0(x11) +800023cc: 00458593 addi x11,x11,4 + +800023d0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + clmulh x23, x1, x28 # perform operation +800023d0: 0bc0bbb3 clmulh x23,x1,x28 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d4: 00012383 lw x7,0(x2) +800023d8: 01738863 beq x7,x23,800023e8 +800023dc: 13c0346f jal x8,80005518 +800023e0: 800023d0 .word 0x800023d0 +800023e4: 8000c7e9 .word 0x8000c7e9 +800023e8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xffffffff +800023ec: 0005a783 lw x15,0(x11) +800023f0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x00000001 +800023f4: 0005a203 lw x4,0(x11) +800023f8: 00458593 addi x11,x11,4 + +800023fc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + clmulh x26, x15, x4 # perform operation +800023fc: 0a47bd33 clmulh x26,x15,x4 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002400: 00012383 lw x7,0(x2) +80002404: 01a38863 beq x7,x26,80002414 +80002408: 1100346f jal x8,80005518 +8000240c: 800023fc .word 0x800023fc +80002410: 8000c843 .word 0x8000c843 +80002414: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xffffffff +80002418: 0005a303 lw x6,0(x11) +8000241c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x00000002 +80002420: 0005af83 lw x31,0(x11) +80002424: 00458593 addi x11,x11,4 + +80002428 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + clmulh x10, x6, x31 # perform operation +80002428: 0bf33533 clmulh x10,x6,x31 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +8000242c: 00012383 lw x7,0(x2) +80002430: 00a38863 beq x7,x10,80002440 +80002434: 0e40346f jal x8,80005518 +80002438: 80002428 .word 0x80002428 +8000243c: 8000c89d .word 0x8000c89d +80002440: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0xffffffff +80002444: 0005af03 lw x30,0(x11) +80002448: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x80000000 +8000244c: 0005a703 lw x14,0(x11) +80002450: 00458593 addi x11,x11,4 + +80002454 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + clmulh x6, x30, x14 # perform operation +80002454: 0aef3333 clmulh x6,x30,x14 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002458: 00012383 lw x7,0(x2) +8000245c: 00638863 beq x7,x6,8000246c +80002460: 0b80346f jal x8,80005518 +80002464: 80002454 .word 0x80002454 +80002468: 8000c8f7 .word 0x8000c8f7 +8000246c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0xffffffff +80002470: 0005a703 lw x14,0(x11) +80002474: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x80000001 +80002478: 0005ae83 lw x29,0(x11) +8000247c: 00458593 addi x11,x11,4 + +80002480 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + clmulh x13, x14, x29 # perform operation +80002480: 0bd736b3 clmulh x13,x14,x29 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002484: 00012383 lw x7,0(x2) +80002488: 00d38863 beq x7,x13,80002498 +8000248c: 08c0346f jal x8,80005518 +80002490: 80002480 .word 0x80002480 +80002494: 8000c958 .word 0x8000c958 +80002498: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0xffffffff +8000249c: 0005a883 lw x17,0(x11) +800024a0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0x7fffffff +800024a4: 0005ac03 lw x24,0(x11) +800024a8: 00458593 addi x11,x11,4 + +800024ac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + clmulh x1, x17, x24 # perform operation +800024ac: 0b88b0b3 clmulh x1,x17,x24 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024b0: 00012383 lw x7,0(x2) +800024b4: 00138863 beq x7,x1,800024c4 +800024b8: 0600346f jal x8,80005518 +800024bc: 800024ac .word 0x800024ac +800024c0: 8000c9b9 .word 0x8000c9b9 +800024c4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xffffffff +800024c8: 0005a083 lw x1,0(x11) +800024cc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x7ffffffe +800024d0: 0005ab83 lw x23,0(x11) +800024d4: 00458593 addi x11,x11,4 + +800024d8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + clmulh x4, x1, x23 # perform operation +800024d8: 0b70b233 clmulh x4,x1,x23 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024dc: 00012383 lw x7,0(x2) +800024e0: 00438863 beq x7,x4,800024f0 +800024e4: 0340346f jal x8,80005518 +800024e8: 800024d8 .word 0x800024d8 +800024ec: 8000ca1a .word 0x8000ca1a +800024f0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0xffffffff +800024f4: 0005a803 lw x16,0(x11) +800024f8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xffffffff +800024fc: 0005af03 lw x30,0(x11) +80002500: 00458593 addi x11,x11,4 + +80002504 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + clmulh x25, x16, x30 # perform operation +80002504: 0be83cb3 clmulh x25,x16,x30 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002508: 00012383 lw x7,0(x2) +8000250c: 01938863 beq x7,x25,8000251c +80002510: 0080346f jal x8,80005518 +80002514: 80002504 .word 0x80002504 +80002518: 8000ca7b .word 0x8000ca7b +8000251c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xffffffff +80002520: 0005a183 lw x3,0(x11) +80002524: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xfffffffe +80002528: 0005a503 lw x10,0(x11) +8000252c: 00458593 addi x11,x11,4 + +80002530 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + clmulh x28, x3, x10 # perform operation +80002530: 0aa1be33 clmulh x28,x3,x10 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002534: 00012383 lw x7,0(x2) +80002538: 01c38863 beq x7,x28,80002548 +8000253c: 7dd0246f jal x8,80005518 +80002540: 80002530 .word 0x80002530 +80002544: 8000cadc .word 0x8000cadc +80002548: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xffffffff +8000254c: 0005a303 lw x6,0(x11) +80002550: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x5bbc8872 +80002554: 0005ad03 lw x26,0(x11) +80002558: 00458593 addi x11,x11,4 + +8000255c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + clmulh x19, x6, x26 # perform operation +8000255c: 0ba339b3 clmulh x19,x6,x26 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002560: 00012383 lw x7,0(x2) +80002564: 01338863 beq x7,x19,80002574 +80002568: 7b10246f jal x8,80005518 +8000256c: 8000255c .word 0x8000255c +80002570: 8000cb3d .word 0x8000cb3d +80002574: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xffffffff +80002578: 0005ae83 lw x29,0(x11) +8000257c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xaaaaaaaa +80002580: 0005a283 lw x5,0(x11) +80002584: 00458593 addi x11,x11,4 + +80002588 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + clmulh x27, x29, x5 # perform operation +80002588: 0a5ebdb3 clmulh x27,x29,x5 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +8000258c: 00012383 lw x7,0(x2) +80002590: 01b38863 beq x7,x27,800025a0 +80002594: 7850246f jal x8,80005518 +80002598: 80002588 .word 0x80002588 +8000259c: 8000cb9e .word 0x8000cb9e +800025a0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0xffffffff +800025a4: 0005a983 lw x19,0(x11) +800025a8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x55555555 +800025ac: 0005a503 lw x10,0(x11) +800025b0: 00458593 addi x11,x11,4 + +800025b4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + clmulh x6, x19, x10 # perform operation +800025b4: 0aa9b333 clmulh x6,x19,x10 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b8: 00012383 lw x7,0(x2) +800025bc: 00638863 beq x7,x6,800025cc +800025c0: 7590246f jal x8,80005518 +800025c4: 800025b4 .word 0x800025b4 +800025c8: 8000cbff .word 0x8000cbff +800025cc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xfffffffe +800025d0: 0005af83 lw x31,0(x11) +800025d4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x00000000 +800025d8: 0005ab03 lw x22,0(x11) +800025dc: 00458593 addi x11,x11,4 + +800025e0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + clmulh x30, x31, x22 # perform operation +800025e0: 0b6fbf33 clmulh x30,x31,x22 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e4: 00012383 lw x7,0(x2) +800025e8: 01e38863 beq x7,x30,800025f8 +800025ec: 72d0246f jal x8,80005518 +800025f0: 800025e0 .word 0x800025e0 +800025f4: 8000cc60 .word 0x8000cc60 +800025f8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0xfffffffe +800025fc: 0005ad03 lw x26,0(x11) +80002600: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x00000001 +80002604: 0005aa83 lw x21,0(x11) +80002608: 00458593 addi x11,x11,4 + +8000260c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + clmulh x13, x26, x21 # perform operation +8000260c: 0b5d36b3 clmulh x13,x26,x21 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002610: 00012383 lw x7,0(x2) +80002614: 00d38863 beq x7,x13,80002624 +80002618: 7010246f jal x8,80005518 +8000261c: 8000260c .word 0x8000260c +80002620: 8000ccba .word 0x8000ccba +80002624: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0xfffffffe +80002628: 0005a803 lw x16,0(x11) +8000262c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x00000002 +80002630: 0005af03 lw x30,0(x11) +80002634: 00458593 addi x11,x11,4 + +80002638 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + clmulh x19, x16, x30 # perform operation +80002638: 0be839b3 clmulh x19,x16,x30 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +8000263c: 00012383 lw x7,0(x2) +80002640: 01338863 beq x7,x19,80002650 +80002644: 6d50246f jal x8,80005518 +80002648: 80002638 .word 0x80002638 +8000264c: 8000cd14 .word 0x8000cd14 +80002650: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0xfffffffe +80002654: 0005a803 lw x16,0(x11) +80002658: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x80000000 +8000265c: 0005ab83 lw x23,0(x11) +80002660: 00458593 addi x11,x11,4 + +80002664 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + clmulh x10, x16, x23 # perform operation +80002664: 0b783533 clmulh x10,x16,x23 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002668: 00012383 lw x7,0(x2) +8000266c: 00a38863 beq x7,x10,8000267c +80002670: 6a90246f jal x8,80005518 +80002674: 80002664 .word 0x80002664 +80002678: 8000cd6e .word 0x8000cd6e +8000267c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xfffffffe +80002680: 0005a183 lw x3,0(x11) +80002684: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x80000001 +80002688: 0005a083 lw x1,0(x11) +8000268c: 00458593 addi x11,x11,4 + +80002690 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + clmulh x28, x3, x1 # perform operation +80002690: 0a11be33 clmulh x28,x3,x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002694: 00012383 lw x7,0(x2) +80002698: 01c38863 beq x7,x28,800026a8 +8000269c: 67d0246f jal x8,80005518 +800026a0: 80002690 .word 0x80002690 +800026a4: 8000cdcf .word 0x8000cdcf +800026a8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xfffffffe +800026ac: 0005ae83 lw x29,0(x11) +800026b0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x7fffffff +800026b4: 0005a983 lw x19,0(x11) +800026b8: 00458593 addi x11,x11,4 + +800026bc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + clmulh x3, x29, x19 # perform operation +800026bc: 0b3eb1b3 clmulh x3,x29,x19 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026c0: 00012383 lw x7,0(x2) +800026c4: 00338863 beq x7,x3,800026d4 +800026c8: 6510246f jal x8,80005518 +800026cc: 800026bc .word 0x800026bc +800026d0: 8000ce30 .word 0x8000ce30 +800026d4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0xfffffffe +800026d8: 0005a903 lw x18,0(x11) +800026dc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x7ffffffe +800026e0: 0005ad03 lw x26,0(x11) +800026e4: 00458593 addi x11,x11,4 + +800026e8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + clmulh x22, x18, x26 # perform operation +800026e8: 0ba93b33 clmulh x22,x18,x26 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026ec: 00012383 lw x7,0(x2) +800026f0: 01638863 beq x7,x22,80002700 +800026f4: 6250246f jal x8,80005518 +800026f8: 800026e8 .word 0x800026e8 +800026fc: 8000ce91 .word 0x8000ce91 +80002700: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xfffffffe +80002704: 0005a503 lw x10,0(x11) +80002708: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0xffffffff +8000270c: 0005ae03 lw x28,0(x11) +80002710: 00458593 addi x11,x11,4 + +80002714 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + clmulh x14, x10, x28 # perform operation +80002714: 0bc53733 clmulh x14,x10,x28 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002718: 00012383 lw x7,0(x2) +8000271c: 00e38863 beq x7,x14,8000272c +80002720: 5f90246f jal x8,80005518 +80002724: 80002714 .word 0x80002714 +80002728: 8000cef2 .word 0x8000cef2 +8000272c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0xfffffffe +80002730: 0005a683 lw x13,0(x11) +80002734: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xfffffffe +80002738: 0005aa83 lw x21,0(x11) +8000273c: 00458593 addi x11,x11,4 + +80002740 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + clmulh x12, x13, x21 # perform operation +80002740: 0b56b633 clmulh x12,x13,x21 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002744: 00012383 lw x7,0(x2) +80002748: 00c38863 beq x7,x12,80002758 +8000274c: 5cd0246f jal x8,80005518 +80002750: 80002740 .word 0x80002740 +80002754: 8000cf53 .word 0x8000cf53 +80002758: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xfffffffe +8000275c: 0005a283 lw x5,0(x11) +80002760: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x5bbc8872 +80002764: 0005af03 lw x30,0(x11) +80002768: 00458593 addi x11,x11,4 + +8000276c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + clmulh x1, x5, x30 # perform operation +8000276c: 0be2b0b3 clmulh x1,x5,x30 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002770: 00012383 lw x7,0(x2) +80002774: 00138863 beq x7,x1,80002784 +80002778: 5a10246f jal x8,80005518 +8000277c: 8000276c .word 0x8000276c +80002780: 8000cfb4 .word 0x8000cfb4 +80002784: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0xfffffffe +80002788: 0005ab03 lw x22,0(x11) +8000278c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0xaaaaaaaa +80002790: 0005ae83 lw x29,0(x11) +80002794: 00458593 addi x11,x11,4 + +80002798 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + clmulh x31, x22, x29 # perform operation +80002798: 0bdb3fb3 clmulh x31,x22,x29 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +8000279c: 00012383 lw x7,0(x2) +800027a0: 01f38863 beq x7,x31,800027b0 +800027a4: 5750246f jal x8,80005518 +800027a8: 80002798 .word 0x80002798 +800027ac: 8000d015 .word 0x8000d015 +800027b0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xfffffffe +800027b4: 0005a203 lw x4,0(x11) +800027b8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x55555555 +800027bc: 0005ac83 lw x25,0(x11) +800027c0: 00458593 addi x11,x11,4 + +800027c4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + clmulh x17, x4, x25 # perform operation +800027c4: 0b9238b3 clmulh x17,x4,x25 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c8: 00012383 lw x7,0(x2) +800027cc: 01138863 beq x7,x17,800027dc +800027d0: 5490246f jal x8,80005518 +800027d4: 800027c4 .word 0x800027c4 +800027d8: 8000d076 .word 0x8000d076 +800027dc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x5bbc8872 +800027e0: 0005a203 lw x4,0(x11) +800027e4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x00000000 +800027e8: 0005a983 lw x19,0(x11) +800027ec: 00458593 addi x11,x11,4 + +800027f0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + clmulh x27, x4, x19 # perform operation +800027f0: 0b323db3 clmulh x27,x4,x19 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f4: 00012383 lw x7,0(x2) +800027f8: 01b38863 beq x7,x27,80002808 +800027fc: 51d0246f jal x8,80005518 +80002800: 800027f0 .word 0x800027f0 +80002804: 8000d0d7 .word 0x8000d0d7 +80002808: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x5bbc8872 +8000280c: 0005a303 lw x6,0(x11) +80002810: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x00000001 +80002814: 0005a803 lw x16,0(x11) +80002818: 00458593 addi x11,x11,4 + +8000281c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + clmulh x15, x6, x16 # perform operation +8000281c: 0b0337b3 clmulh x15,x6,x16 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002820: 00012383 lw x7,0(x2) +80002824: 00f38863 beq x7,x15,80002834 +80002828: 4f10246f jal x8,80005518 +8000282c: 8000281c .word 0x8000281c +80002830: 8000d131 .word 0x8000d131 +80002834: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x5bbc8872 +80002838: 0005a983 lw x19,0(x11) +8000283c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x00000002 +80002840: 0005af83 lw x31,0(x11) +80002844: 00458593 addi x11,x11,4 + +80002848 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + clmulh x15, x19, x31 # perform operation +80002848: 0bf9b7b3 clmulh x15,x19,x31 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +8000284c: 00012383 lw x7,0(x2) +80002850: 00f38863 beq x7,x15,80002860 +80002854: 4c50246f jal x8,80005518 +80002858: 80002848 .word 0x80002848 +8000285c: 8000d18b .word 0x8000d18b +80002860: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x5bbc8872 +80002864: 0005a683 lw x13,0(x11) +80002868: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x80000000 +8000286c: 0005ac83 lw x25,0(x11) +80002870: 00458593 addi x11,x11,4 + +80002874 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + clmulh x9, x13, x25 # perform operation +80002874: 0b96b4b3 clmulh x9,x13,x25 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002878: 00012383 lw x7,0(x2) +8000287c: 00938863 beq x7,x9,8000288c +80002880: 4990246f jal x8,80005518 +80002884: 80002874 .word 0x80002874 +80002888: 8000d1e5 .word 0x8000d1e5 +8000288c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x5bbc8872 +80002890: 0005a683 lw x13,0(x11) +80002894: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x80000001 +80002898: 0005af03 lw x30,0(x11) +8000289c: 00458593 addi x11,x11,4 + +800028a0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + clmulh x29, x13, x30 # perform operation +800028a0: 0be6beb3 clmulh x29,x13,x30 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a4: 00012383 lw x7,0(x2) +800028a8: 01d38863 beq x7,x29,800028b8 +800028ac: 46d0246f jal x8,80005518 +800028b0: 800028a0 .word 0x800028a0 +800028b4: 8000d246 .word 0x8000d246 +800028b8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x5bbc8872 +800028bc: 0005aa03 lw x20,0(x11) +800028c0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x7fffffff +800028c4: 0005af83 lw x31,0(x11) +800028c8: 00458593 addi x11,x11,4 + +800028cc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + clmulh x23, x20, x31 # perform operation +800028cc: 0bfa3bb3 clmulh x23,x20,x31 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028d0: 00012383 lw x7,0(x2) +800028d4: 01738863 beq x7,x23,800028e4 +800028d8: 4410246f jal x8,80005518 +800028dc: 800028cc .word 0x800028cc +800028e0: 8000d2a7 .word 0x8000d2a7 +800028e4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x5bbc8872 +800028e8: 0005a183 lw x3,0(x11) +800028ec: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x7ffffffe +800028f0: 0005a483 lw x9,0(x11) +800028f4: 00458593 addi x11,x11,4 + +800028f8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + clmulh x25, x3, x9 # perform operation +800028f8: 0a91bcb3 clmulh x25,x3,x9 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028fc: 00012383 lw x7,0(x2) +80002900: 01938863 beq x7,x25,80002910 +80002904: 4150246f jal x8,80005518 +80002908: 800028f8 .word 0x800028f8 +8000290c: 8000d308 .word 0x8000d308 +80002910: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x5bbc8872 +80002914: 0005ac03 lw x24,0(x11) +80002918: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xffffffff +8000291c: 0005ad03 lw x26,0(x11) +80002920: 00458593 addi x11,x11,4 + +80002924 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + clmulh x6, x24, x26 # perform operation +80002924: 0bac3333 clmulh x6,x24,x26 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002928: 00012383 lw x7,0(x2) +8000292c: 00638863 beq x7,x6,8000293c +80002930: 3e90246f jal x8,80005518 +80002934: 80002924 .word 0x80002924 +80002938: 8000d369 .word 0x8000d369 +8000293c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x5bbc8872 +80002940: 0005a183 lw x3,0(x11) +80002944: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0xfffffffe +80002948: 0005a683 lw x13,0(x11) +8000294c: 00458593 addi x11,x11,4 + +80002950 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + clmulh x19, x3, x13 # perform operation +80002950: 0ad1b9b3 clmulh x19,x3,x13 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002954: 00012383 lw x7,0(x2) +80002958: 01338863 beq x7,x19,80002968 +8000295c: 3bd0246f jal x8,80005518 +80002960: 80002950 .word 0x80002950 +80002964: 8000d3ca .word 0x8000d3ca +80002968: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x5bbc8872 +8000296c: 0005af83 lw x31,0(x11) +80002970: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x5bbc8872 +80002974: 0005a183 lw x3,0(x11) +80002978: 00458593 addi x11,x11,4 + +8000297c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + clmulh x5, x31, x3 # perform operation +8000297c: 0a3fb2b3 clmulh x5,x31,x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002980: 00012383 lw x7,0(x2) +80002984: 00538863 beq x7,x5,80002994 +80002988: 3910246f jal x8,80005518 +8000298c: 8000297c .word 0x8000297c +80002990: 8000d42b .word 0x8000d42b +80002994: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x5bbc8872 +80002998: 0005a483 lw x9,0(x11) +8000299c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xaaaaaaaa +800029a0: 0005a503 lw x10,0(x11) +800029a4: 00458593 addi x11,x11,4 + +800029a8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + clmulh x1, x9, x10 # perform operation +800029a8: 0aa4b0b3 clmulh x1,x9,x10 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029ac: 00012383 lw x7,0(x2) +800029b0: 00138863 beq x7,x1,800029c0 +800029b4: 3650246f jal x8,80005518 +800029b8: 800029a8 .word 0x800029a8 +800029bc: 8000d48c .word 0x8000d48c +800029c0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0x5bbc8872 +800029c4: 0005a783 lw x15,0(x11) +800029c8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x55555555 +800029cc: 0005aa83 lw x21,0(x11) +800029d0: 00458593 addi x11,x11,4 + +800029d4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + clmulh x13, x15, x21 # perform operation +800029d4: 0b57b6b3 clmulh x13,x15,x21 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d8: 00012383 lw x7,0(x2) +800029dc: 00d38863 beq x7,x13,800029ec +800029e0: 3390246f jal x8,80005518 +800029e4: 800029d4 .word 0x800029d4 +800029e8: 8000d4ed .word 0x8000d4ed +800029ec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xaaaaaaaa +800029f0: 0005a503 lw x10,0(x11) +800029f4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x00000000 +800029f8: 0005aa03 lw x20,0(x11) +800029fc: 00458593 addi x11,x11,4 + +80002a00 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + clmulh x24, x10, x20 # perform operation +80002a00: 0b453c33 clmulh x24,x10,x20 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a04: 00012383 lw x7,0(x2) +80002a08: 01838863 beq x7,x24,80002a18 +80002a0c: 30d0246f jal x8,80005518 +80002a10: 80002a00 .word 0x80002a00 +80002a14: 8000d54e .word 0x8000d54e +80002a18: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xaaaaaaaa +80002a1c: 0005a783 lw x15,0(x11) +80002a20: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x00000001 +80002a24: 0005af03 lw x30,0(x11) +80002a28: 00458593 addi x11,x11,4 + +80002a2c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + clmulh x17, x15, x30 # perform operation +80002a2c: 0be7b8b3 clmulh x17,x15,x30 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a30: 00012383 lw x7,0(x2) +80002a34: 01138863 beq x7,x17,80002a44 +80002a38: 2e10246f jal x8,80005518 +80002a3c: 80002a2c .word 0x80002a2c +80002a40: 8000d5a8 .word 0x8000d5a8 +80002a44: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xaaaaaaaa +80002a48: 0005a503 lw x10,0(x11) +80002a4c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x00000002 +80002a50: 0005a883 lw x17,0(x11) +80002a54: 00458593 addi x11,x11,4 + +80002a58 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + clmulh x21, x10, x17 # perform operation +80002a58: 0b153ab3 clmulh x21,x10,x17 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a5c: 00012383 lw x7,0(x2) +80002a60: 01538863 beq x7,x21,80002a70 +80002a64: 2b50246f jal x8,80005518 +80002a68: 80002a58 .word 0x80002a58 +80002a6c: 8000d602 .word 0x8000d602 +80002a70: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xaaaaaaaa +80002a74: 0005a203 lw x4,0(x11) +80002a78: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x80000000 +80002a7c: 0005ad83 lw x27,0(x11) +80002a80: 00458593 addi x11,x11,4 + +80002a84 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + clmulh x5, x4, x27 # perform operation +80002a84: 0bb232b3 clmulh x5,x4,x27 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a88: 00012383 lw x7,0(x2) +80002a8c: 00538863 beq x7,x5,80002a9c +80002a90: 2890246f jal x8,80005518 +80002a94: 80002a84 .word 0x80002a84 +80002a98: 8000d65c .word 0x8000d65c +80002a9c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xaaaaaaaa +80002aa0: 0005a083 lw x1,0(x11) +80002aa4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x80000001 +80002aa8: 0005a803 lw x16,0(x11) +80002aac: 00458593 addi x11,x11,4 + +80002ab0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + clmulh x27, x1, x16 # perform operation +80002ab0: 0b00bdb3 clmulh x27,x1,x16 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab4: 00012383 lw x7,0(x2) +80002ab8: 01b38863 beq x7,x27,80002ac8 +80002abc: 25d0246f jal x8,80005518 +80002ac0: 80002ab0 .word 0x80002ab0 +80002ac4: 8000d6bd .word 0x8000d6bd +80002ac8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xaaaaaaaa +80002acc: 0005a283 lw x5,0(x11) +80002ad0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x7fffffff +80002ad4: 0005a783 lw x15,0(x11) +80002ad8: 00458593 addi x11,x11,4 + +80002adc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + clmulh x14, x5, x15 # perform operation +80002adc: 0af2b733 clmulh x14,x5,x15 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ae0: 00012383 lw x7,0(x2) +80002ae4: 00e38863 beq x7,x14,80002af4 +80002ae8: 2310246f jal x8,80005518 +80002aec: 80002adc .word 0x80002adc +80002af0: 8000d71e .word 0x8000d71e +80002af4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0xaaaaaaaa +80002af8: 0005aa83 lw x21,0(x11) +80002afc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x7ffffffe +80002b00: 0005a203 lw x4,0(x11) +80002b04: 00458593 addi x11,x11,4 + +80002b08 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + clmulh x14, x21, x4 # perform operation +80002b08: 0a4ab733 clmulh x14,x21,x4 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b0c: 00012383 lw x7,0(x2) +80002b10: 00e38863 beq x7,x14,80002b20 +80002b14: 2050246f jal x8,80005518 +80002b18: 80002b08 .word 0x80002b08 +80002b1c: 8000d77f .word 0x8000d77f +80002b20: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xaaaaaaaa +80002b24: 0005ae03 lw x28,0(x11) +80002b28: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xffffffff +80002b2c: 0005a903 lw x18,0(x11) +80002b30: 00458593 addi x11,x11,4 + +80002b34 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + clmulh x10, x28, x18 # perform operation +80002b34: 0b2e3533 clmulh x10,x28,x18 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b38: 00012383 lw x7,0(x2) +80002b3c: 00a38863 beq x7,x10,80002b4c +80002b40: 1d90246f jal x8,80005518 +80002b44: 80002b34 .word 0x80002b34 +80002b48: 8000d7e0 .word 0x8000d7e0 +80002b4c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0xaaaaaaaa +80002b50: 0005ad83 lw x27,0(x11) +80002b54: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xfffffffe +80002b58: 0005a203 lw x4,0(x11) +80002b5c: 00458593 addi x11,x11,4 + +80002b60 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + clmulh x17, x27, x4 # perform operation +80002b60: 0a4db8b3 clmulh x17,x27,x4 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b64: 00012383 lw x7,0(x2) +80002b68: 01138863 beq x7,x17,80002b78 +80002b6c: 1ad0246f jal x8,80005518 +80002b70: 80002b60 .word 0x80002b60 +80002b74: 8000d841 .word 0x8000d841 +80002b78: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xaaaaaaaa +80002b7c: 0005a303 lw x6,0(x11) +80002b80: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x5bbc8872 +80002b84: 0005a883 lw x17,0(x11) +80002b88: 00458593 addi x11,x11,4 + +80002b8c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + clmulh x15, x6, x17 # perform operation +80002b8c: 0b1337b3 clmulh x15,x6,x17 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b90: 00012383 lw x7,0(x2) +80002b94: 00f38863 beq x7,x15,80002ba4 +80002b98: 1810246f jal x8,80005518 +80002b9c: 80002b8c .word 0x80002b8c +80002ba0: 8000d8a2 .word 0x8000d8a2 +80002ba4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xaaaaaaaa +80002ba8: 0005ae83 lw x29,0(x11) +80002bac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xaaaaaaaa +80002bb0: 0005a183 lw x3,0(x11) +80002bb4: 00458593 addi x11,x11,4 + +80002bb8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + clmulh x15, x29, x3 # perform operation +80002bb8: 0a3eb7b3 clmulh x15,x29,x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bbc: 00012383 lw x7,0(x2) +80002bc0: 00f38863 beq x7,x15,80002bd0 +80002bc4: 1550246f jal x8,80005518 +80002bc8: 80002bb8 .word 0x80002bb8 +80002bcc: 8000d903 .word 0x8000d903 +80002bd0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0xaaaaaaaa +80002bd4: 0005aa83 lw x21,0(x11) +80002bd8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x55555555 +80002bdc: 0005ad83 lw x27,0(x11) +80002be0: 00458593 addi x11,x11,4 + +80002be4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + clmulh x19, x21, x27 # perform operation +80002be4: 0bbab9b3 clmulh x19,x21,x27 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be8: 00012383 lw x7,0(x2) +80002bec: 01338863 beq x7,x19,80002bfc +80002bf0: 1290246f jal x8,80005518 +80002bf4: 80002be4 .word 0x80002be4 +80002bf8: 8000d964 .word 0x8000d964 +80002bfc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x55555555 +80002c00: 0005a903 lw x18,0(x11) +80002c04: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x00000000 +80002c08: 0005ab03 lw x22,0(x11) +80002c0c: 00458593 addi x11,x11,4 + +80002c10 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + clmulh x23, x18, x22 # perform operation +80002c10: 0b693bb3 clmulh x23,x18,x22 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c14: 00012383 lw x7,0(x2) +80002c18: 01738863 beq x7,x23,80002c28 +80002c1c: 0fd0246f jal x8,80005518 +80002c20: 80002c10 .word 0x80002c10 +80002c24: 8000d9c5 .word 0x8000d9c5 +80002c28: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x55555555 +80002c2c: 0005ad83 lw x27,0(x11) +80002c30: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x00000001 +80002c34: 0005ab03 lw x22,0(x11) +80002c38: 00458593 addi x11,x11,4 + +80002c3c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + clmulh x21, x27, x22 # perform operation +80002c3c: 0b6dbab3 clmulh x21,x27,x22 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c40: 00012383 lw x7,0(x2) +80002c44: 01538863 beq x7,x21,80002c54 +80002c48: 0d10246f jal x8,80005518 +80002c4c: 80002c3c .word 0x80002c3c +80002c50: 8000da1f .word 0x8000da1f +80002c54: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x55555555 +80002c58: 0005ab03 lw x22,0(x11) +80002c5c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x00000002 +80002c60: 0005a503 lw x10,0(x11) +80002c64: 00458593 addi x11,x11,4 + +80002c68 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + clmulh x25, x22, x10 # perform operation +80002c68: 0aab3cb3 clmulh x25,x22,x10 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c6c: 00012383 lw x7,0(x2) +80002c70: 01938863 beq x7,x25,80002c80 +80002c74: 0a50246f jal x8,80005518 +80002c78: 80002c68 .word 0x80002c68 +80002c7c: 8000da79 .word 0x8000da79 +80002c80: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x55555555 +80002c84: 0005a983 lw x19,0(x11) +80002c88: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x80000000 +80002c8c: 0005ad83 lw x27,0(x11) +80002c90: 00458593 addi x11,x11,4 + +80002c94 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + clmulh x5, x19, x27 # perform operation +80002c94: 0bb9b2b3 clmulh x5,x19,x27 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c98: 00012383 lw x7,0(x2) +80002c9c: 00538863 beq x7,x5,80002cac +80002ca0: 0790246f jal x8,80005518 +80002ca4: 80002c94 .word 0x80002c94 +80002ca8: 8000dad3 .word 0x8000dad3 +80002cac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x55555555 +80002cb0: 0005ad03 lw x26,0(x11) +80002cb4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x80000001 +80002cb8: 0005a083 lw x1,0(x11) +80002cbc: 00458593 addi x11,x11,4 + +80002cc0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + clmulh x12, x26, x1 # perform operation +80002cc0: 0a1d3633 clmulh x12,x26,x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc4: 00012383 lw x7,0(x2) +80002cc8: 00c38863 beq x7,x12,80002cd8 +80002ccc: 04d0246f jal x8,80005518 +80002cd0: 80002cc0 .word 0x80002cc0 +80002cd4: 8000db34 .word 0x8000db34 +80002cd8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x55555555 +80002cdc: 0005ab83 lw x23,0(x11) +80002ce0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x7fffffff +80002ce4: 0005a703 lw x14,0(x11) +80002ce8: 00458593 addi x11,x11,4 + +80002cec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + clmulh x24, x23, x14 # perform operation +80002cec: 0aebbc33 clmulh x24,x23,x14 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cf0: 00012383 lw x7,0(x2) +80002cf4: 01838863 beq x7,x24,80002d04 +80002cf8: 0210246f jal x8,80005518 +80002cfc: 80002cec .word 0x80002cec +80002d00: 8000db95 .word 0x8000db95 +80002d04: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x55555555 +80002d08: 0005a303 lw x6,0(x11) +80002d0c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x7ffffffe +80002d10: 0005a283 lw x5,0(x11) +80002d14: 00458593 addi x11,x11,4 + +80002d18 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + clmulh x29, x6, x5 # perform operation +80002d18: 0a533eb3 clmulh x29,x6,x5 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d1c: 00012383 lw x7,0(x2) +80002d20: 01d38863 beq x7,x29,80002d30 +80002d24: 7f40246f jal x8,80005518 +80002d28: 80002d18 .word 0x80002d18 +80002d2c: 8000dbf6 .word 0x8000dbf6 +80002d30: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x55555555 +80002d34: 0005ad03 lw x26,0(x11) +80002d38: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xffffffff +80002d3c: 0005a203 lw x4,0(x11) +80002d40: 00458593 addi x11,x11,4 + +80002d44 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + clmulh x10, x26, x4 # perform operation +80002d44: 0a4d3533 clmulh x10,x26,x4 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d48: 00012383 lw x7,0(x2) +80002d4c: 00a38863 beq x7,x10,80002d5c +80002d50: 7c80246f jal x8,80005518 +80002d54: 80002d44 .word 0x80002d44 +80002d58: 8000dc57 .word 0x8000dc57 +80002d5c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x55555555 +80002d60: 0005a883 lw x17,0(x11) +80002d64: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xfffffffe +80002d68: 0005aa03 lw x20,0(x11) +80002d6c: 00458593 addi x11,x11,4 + +80002d70 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + clmulh x1, x17, x20 # perform operation +80002d70: 0b48b0b3 clmulh x1,x17,x20 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d74: 00012383 lw x7,0(x2) +80002d78: 00138863 beq x7,x1,80002d88 +80002d7c: 79c0246f jal x8,80005518 +80002d80: 80002d70 .word 0x80002d70 +80002d84: 8000dcb8 .word 0x8000dcb8 +80002d88: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x55555555 +80002d8c: 0005a683 lw x13,0(x11) +80002d90: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x5bbc8872 +80002d94: 0005a983 lw x19,0(x11) +80002d98: 00458593 addi x11,x11,4 + +80002d9c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + clmulh x10, x13, x19 # perform operation +80002d9c: 0b36b533 clmulh x10,x13,x19 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002da0: 00012383 lw x7,0(x2) +80002da4: 00a38863 beq x7,x10,80002db4 +80002da8: 7700246f jal x8,80005518 +80002dac: 80002d9c .word 0x80002d9c +80002db0: 8000dd19 .word 0x8000dd19 +80002db4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x55555555 +80002db8: 0005a483 lw x9,0(x11) +80002dbc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0xaaaaaaaa +80002dc0: 0005ae03 lw x28,0(x11) +80002dc4: 00458593 addi x11,x11,4 + +80002dc8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + clmulh x10, x9, x28 # perform operation +80002dc8: 0bc4b533 clmulh x10,x9,x28 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dcc: 00012383 lw x7,0(x2) +80002dd0: 00a38863 beq x7,x10,80002de0 +80002dd4: 7440246f jal x8,80005518 +80002dd8: 80002dc8 .word 0x80002dc8 +80002ddc: 8000dd7a .word 0x8000dd7a +80002de0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x55555555 +80002de4: 0005a503 lw x10,0(x11) +80002de8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x55555555 +80002dec: 0005a883 lw x17,0(x11) +80002df0: 00458593 addi x11,x11,4 + +80002df4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + clmulh x25, x10, x17 # perform operation +80002df4: 0b153cb3 clmulh x25,x10,x17 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df8: 00012383 lw x7,0(x2) +80002dfc: 01938863 beq x7,x25,80002e0c +80002e00: 7180246f jal x8,80005518 +80002e04: 80002df4 .word 0x80002df4 +80002e08: 8000dddb .word 0x8000dddb +80002e0c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0x4f36fd09 +80002e10: 0005a003 lw x0,0(x11) +80002e14: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x853abf9b +80002e18: 0005a003 lw x0,0(x11) +80002e1c: 00458593 addi x11,x11,4 + +80002e20 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b0: + clmulh x6, x0, x0 # perform operation +80002e20: 0a003333 clmulh x6,x0,x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkc_clmulh_cg_cmp_rs1_rs2_b0, Zbkc_clmulh_cg_cmp_rs1_rs2_b0_str) +80002e24: 00012383 lw x7,0(x2) +80002e28: 00638863 beq x7,x6,80002e38 +80002e2c: 6ec0246f jal x8,80005518 +80002e30: 80002e20 .word 0x80002e20 +80002e34: 8000de3c .word 0x8000de3c +80002e38: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x7c36d5a8 +80002e3c: 0005a083 lw x1,0(x11) +80002e40: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x5ea658e8 +80002e44: 0005a083 lw x1,0(x11) +80002e48: 00458593 addi x11,x11,4 + +80002e4c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b1: + clmulh x10, x1, x1 # perform operation +80002e4c: 0a10b533 clmulh x10,x1,x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zbkc_clmulh_cg_cmp_rs1_rs2_b1, Zbkc_clmulh_cg_cmp_rs1_rs2_b1_str) +80002e50: 00012383 lw x7,0(x2) +80002e54: 00a38863 beq x7,x10,80002e64 +80002e58: 6c00246f jal x8,80005518 +80002e5c: 80002e4c .word 0x80002e4c +80002e60: 8000de76 .word 0x8000de76 +80002e64: 00410113 addi x2,x2,4 + + mv x27, x2 # switch signature pointer register to avoid conflict with test +80002e68: 00010d93 addi x27,x2,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0xd7408acc +80002e6c: 0005a103 lw x2,0(x11) +80002e70: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x9240fba2 +80002e74: 0005a103 lw x2,0(x11) +80002e78: 00458593 addi x11,x11,4 + +80002e7c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b2: + clmulh x31, x2, x2 # perform operation +80002e7c: 0a213fb3 clmulh x31,x2,x2 + # Check if x31 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x31, Zbkc_clmulh_cg_cmp_rs1_rs2_b2, Zbkc_clmulh_cg_cmp_rs1_rs2_b2_str) +80002e80: 000da383 lw x7,0(x27) +80002e84: 01f38863 beq x7,x31,80002e94 +80002e88: 6900246f jal x8,80005518 +80002e8c: 80002e7c .word 0x80002e7c +80002e90: 8000deb0 .word 0x8000deb0 +80002e94: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x12e5af89 +80002e98: 0005a183 lw x3,0(x11) +80002e9c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x0067e8db +80002ea0: 0005a183 lw x3,0(x11) +80002ea4: 00458593 addi x11,x11,4 + +80002ea8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b3: + clmulh x28, x3, x3 # perform operation +80002ea8: 0a31be33 clmulh x28,x3,x3 + # Check if x28 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x28, Zbkc_clmulh_cg_cmp_rs1_rs2_b3, Zbkc_clmulh_cg_cmp_rs1_rs2_b3_str) +80002eac: 000da383 lw x7,0(x27) +80002eb0: 01c38863 beq x7,x28,80002ec0 +80002eb4: 6640246f jal x8,80005518 +80002eb8: 80002ea8 .word 0x80002ea8 +80002ebc: 8000deea .word 0x8000deea +80002ec0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x6d34a7ec +80002ec4: 0005a203 lw x4,0(x11) +80002ec8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x1e69ab36 +80002ecc: 0005a203 lw x4,0(x11) +80002ed0: 00458593 addi x11,x11,4 + +80002ed4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b4: + clmulh x23, x4, x4 # perform operation +80002ed4: 0a423bb3 clmulh x23,x4,x4 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkc_clmulh_cg_cmp_rs1_rs2_b4, Zbkc_clmulh_cg_cmp_rs1_rs2_b4_str) +80002ed8: 000da383 lw x7,0(x27) +80002edc: 01738863 beq x7,x23,80002eec +80002ee0: 6380246f jal x8,80005518 +80002ee4: 80002ed4 .word 0x80002ed4 +80002ee8: 8000df24 .word 0x8000df24 +80002eec: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x7204838e +80002ef0: 0005a283 lw x5,0(x11) +80002ef4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x67741e74 +80002ef8: 0005a283 lw x5,0(x11) +80002efc: 00458593 addi x11,x11,4 + +80002f00 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b5: + clmulh x23, x5, x5 # perform operation +80002f00: 0a52bbb3 clmulh x23,x5,x5 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkc_clmulh_cg_cmp_rs1_rs2_b5, Zbkc_clmulh_cg_cmp_rs1_rs2_b5_str) +80002f04: 000da383 lw x7,0(x27) +80002f08: 01738863 beq x7,x23,80002f18 +80002f0c: 60c0246f jal x8,80005518 +80002f10: 80002f00 .word 0x80002f00 +80002f14: 8000df5e .word 0x8000df5e +80002f18: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x3b00d753 +80002f1c: 0005a303 lw x6,0(x11) +80002f20: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0xe4709b8b +80002f24: 0005a303 lw x6,0(x11) +80002f28: 00458593 addi x11,x11,4 + +80002f2c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b6: + clmulh x9, x6, x6 # perform operation +80002f2c: 0a6334b3 clmulh x9,x6,x6 + # Check if x9 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x9, Zbkc_clmulh_cg_cmp_rs1_rs2_b6, Zbkc_clmulh_cg_cmp_rs1_rs2_b6_str) +80002f30: 000da383 lw x7,0(x27) +80002f34: 00938863 beq x7,x9,80002f44 +80002f38: 5e00246f jal x8,80005518 +80002f3c: 80002f2c .word 0x80002f2c +80002f40: 8000df98 .word 0x8000df98 +80002f44: 004d8d93 addi x27,x27,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f48: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f4c: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x6d3a3662 +80002f50: 0005a383 lw x7,0(x11) +80002f54: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x258588bc +80002f58: 0005a383 lw x7,0(x11) +80002f5c: 00458593 addi x11,x11,4 + +80002f60 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b7: + clmulh x29, x7, x7 # perform operation +80002f60: 0a73beb3 clmulh x29,x7,x7 + # Check if x29 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x29, Zbkc_clmulh_cg_cmp_rs1_rs2_b7, Zbkc_clmulh_cg_cmp_rs1_rs2_b7_str) +80002f64: 000da203 lw x4,0(x27) +80002f68: 01d20863 beq x4,x29,80002f78 +80002f6c: 594022ef jal x5,80005500 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 8000dfd2 .word 0x8000dfd2 +80002f78: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x4742c8cb +80002f7c: 0005a403 lw x8,0(x11) +80002f80: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xa5bf53e2 +80002f84: 0005a403 lw x8,0(x11) +80002f88: 00458593 addi x11,x11,4 + +80002f8c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b8: + clmulh x18, x8, x8 # perform operation +80002f8c: 0a843933 clmulh x18,x8,x8 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkc_clmulh_cg_cmp_rs1_rs2_b8, Zbkc_clmulh_cg_cmp_rs1_rs2_b8_str) +80002f90: 000da203 lw x4,0(x27) +80002f94: 01220863 beq x4,x18,80002fa4 +80002f98: 568022ef jal x5,80005500 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 8000e00c .word 0x8000e00c +80002fa4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0xed3ae410 +80002fa8: 0005a483 lw x9,0(x11) +80002fac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x5fdd903d +80002fb0: 0005a483 lw x9,0(x11) +80002fb4: 00458593 addi x11,x11,4 + +80002fb8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b9: + clmulh x12, x9, x9 # perform operation +80002fb8: 0a94b633 clmulh x12,x9,x9 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zbkc_clmulh_cg_cmp_rs1_rs2_b9, Zbkc_clmulh_cg_cmp_rs1_rs2_b9_str) +80002fbc: 000da203 lw x4,0(x27) +80002fc0: 00c20863 beq x4,x12,80002fd0 +80002fc4: 53c022ef jal x5,80005500 +80002fc8: 80002fb8 .word 0x80002fb8 +80002fcc: 8000e046 .word 0x8000e046 +80002fd0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x9e2f87d3 +80002fd4: 0005a503 lw x10,0(x11) +80002fd8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x4c5d60b2 +80002fdc: 0005a503 lw x10,0(x11) +80002fe0: 00458593 addi x11,x11,4 + +80002fe4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b10: + clmulh x21, x10, x10 # perform operation +80002fe4: 0aa53ab3 clmulh x21,x10,x10 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkc_clmulh_cg_cmp_rs1_rs2_b10, Zbkc_clmulh_cg_cmp_rs1_rs2_b10_str) +80002fe8: 000da203 lw x4,0(x27) +80002fec: 01520863 beq x4,x21,80002ffc +80002ff0: 510022ef jal x5,80005500 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 8000e080 .word 0x8000e080 +80002ffc: 004d8d93 addi x27,x27,4 + + mv x3, x11 # switch data pointer register to avoid conflict with test +80003000: 00058193 addi x3,x11,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x766b66a5 +80003004: 0001a583 lw x11,0(x3) +80003008: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x35089ae3 +8000300c: 0001a583 lw x11,0(x3) +80003010: 00418193 addi x3,x3,4 + +80003014 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b11: + clmulh x23, x11, x11 # perform operation +80003014: 0ab5bbb3 clmulh x23,x11,x11 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkc_clmulh_cg_cmp_rs1_rs2_b11, Zbkc_clmulh_cg_cmp_rs1_rs2_b11_str) +80003018: 000da203 lw x4,0(x27) +8000301c: 01720863 beq x4,x23,8000302c +80003020: 4e0022ef jal x5,80005500 +80003024: 80003014 .word 0x80003014 +80003028: 8000e0bb .word 0x8000e0bb +8000302c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0745b35c +80003030: 0001a603 lw x12,0(x3) +80003034: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x6d7d8466 +80003038: 0001a603 lw x12,0(x3) +8000303c: 00418193 addi x3,x3,4 + +80003040 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b12: + clmulh x2, x12, x12 # perform operation +80003040: 0ac63133 clmulh x2,x12,x12 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkc_clmulh_cg_cmp_rs1_rs2_b12, Zbkc_clmulh_cg_cmp_rs1_rs2_b12_str) +80003044: 000da203 lw x4,0(x27) +80003048: 00220863 beq x4,x2,80003058 +8000304c: 4b4022ef jal x5,80005500 +80003050: 80003040 .word 0x80003040 +80003054: 8000e0f6 .word 0x8000e0f6 +80003058: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x8e092c3c +8000305c: 0001a683 lw x13,0(x3) +80003060: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xfd7caf6e +80003064: 0001a683 lw x13,0(x3) +80003068: 00418193 addi x3,x3,4 + +8000306c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b13: + clmulh x10, x13, x13 # perform operation +8000306c: 0ad6b533 clmulh x10,x13,x13 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkc_clmulh_cg_cmp_rs1_rs2_b13, Zbkc_clmulh_cg_cmp_rs1_rs2_b13_str) +80003070: 000da203 lw x4,0(x27) +80003074: 00a20863 beq x4,x10,80003084 +80003078: 488022ef jal x5,80005500 +8000307c: 8000306c .word 0x8000306c +80003080: 8000e131 .word 0x8000e131 +80003084: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xa0629a9b +80003088: 0001a703 lw x14,0(x3) +8000308c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x6dfff82a +80003090: 0001a703 lw x14,0(x3) +80003094: 00418193 addi x3,x3,4 + +80003098 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b14: + clmulh x10, x14, x14 # perform operation +80003098: 0ae73533 clmulh x10,x14,x14 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkc_clmulh_cg_cmp_rs1_rs2_b14, Zbkc_clmulh_cg_cmp_rs1_rs2_b14_str) +8000309c: 000da203 lw x4,0(x27) +800030a0: 00a20863 beq x4,x10,800030b0 +800030a4: 45c022ef jal x5,80005500 +800030a8: 80003098 .word 0x80003098 +800030ac: 8000e16c .word 0x8000e16c +800030b0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x1dfe08be +800030b4: 0001a783 lw x15,0(x3) +800030b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x1efbbf75 +800030bc: 0001a783 lw x15,0(x3) +800030c0: 00418193 addi x3,x3,4 + +800030c4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b15: + clmulh x2, x15, x15 # perform operation +800030c4: 0af7b133 clmulh x2,x15,x15 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkc_clmulh_cg_cmp_rs1_rs2_b15, Zbkc_clmulh_cg_cmp_rs1_rs2_b15_str) +800030c8: 000da203 lw x4,0(x27) +800030cc: 00220863 beq x4,x2,800030dc +800030d0: 430022ef jal x5,80005500 +800030d4: 800030c4 .word 0x800030c4 +800030d8: 8000e1a7 .word 0x8000e1a7 +800030dc: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xb206f869 +800030e0: 0001a803 lw x16,0(x3) +800030e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x43351e0c +800030e8: 0001a803 lw x16,0(x3) +800030ec: 00418193 addi x3,x3,4 + +800030f0 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b16: + clmulh x6, x16, x16 # perform operation +800030f0: 0b083333 clmulh x6,x16,x16 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkc_clmulh_cg_cmp_rs1_rs2_b16, Zbkc_clmulh_cg_cmp_rs1_rs2_b16_str) +800030f4: 000da203 lw x4,0(x27) +800030f8: 00620863 beq x4,x6,80003108 +800030fc: 404022ef jal x5,80005500 +80003100: 800030f0 .word 0x800030f0 +80003104: 8000e1e2 .word 0x8000e1e2 +80003108: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xb9de0727 +8000310c: 0001a883 lw x17,0(x3) +80003110: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xed60dab9 +80003114: 0001a883 lw x17,0(x3) +80003118: 00418193 addi x3,x3,4 + +8000311c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b17: + clmulh x2, x17, x17 # perform operation +8000311c: 0b18b133 clmulh x2,x17,x17 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkc_clmulh_cg_cmp_rs1_rs2_b17, Zbkc_clmulh_cg_cmp_rs1_rs2_b17_str) +80003120: 000da203 lw x4,0(x27) +80003124: 00220863 beq x4,x2,80003134 +80003128: 3d8022ef jal x5,80005500 +8000312c: 8000311c .word 0x8000311c +80003130: 8000e21d .word 0x8000e21d +80003134: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x08b72d77 +80003138: 0001a903 lw x18,0(x3) +8000313c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x985abd1e +80003140: 0001a903 lw x18,0(x3) +80003144: 00418193 addi x3,x3,4 + +80003148 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b18: + clmulh x13, x18, x18 # perform operation +80003148: 0b2936b3 clmulh x13,x18,x18 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zbkc_clmulh_cg_cmp_rs1_rs2_b18, Zbkc_clmulh_cg_cmp_rs1_rs2_b18_str) +8000314c: 000da203 lw x4,0(x27) +80003150: 00d20863 beq x4,x13,80003160 +80003154: 3ac022ef jal x5,80005500 +80003158: 80003148 .word 0x80003148 +8000315c: 8000e258 .word 0x8000e258 +80003160: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x1fd1739c +80003164: 0001a983 lw x19,0(x3) +80003168: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x3c989189 +8000316c: 0001a983 lw x19,0(x3) +80003170: 00418193 addi x3,x3,4 + +80003174 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b19: + clmulh x18, x19, x19 # perform operation +80003174: 0b39b933 clmulh x18,x19,x19 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkc_clmulh_cg_cmp_rs1_rs2_b19, Zbkc_clmulh_cg_cmp_rs1_rs2_b19_str) +80003178: 000da203 lw x4,0(x27) +8000317c: 01220863 beq x4,x18,8000318c +80003180: 380022ef jal x5,80005500 +80003184: 80003174 .word 0x80003174 +80003188: 8000e293 .word 0x8000e293 +8000318c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x3e72cea8 +80003190: 0001aa03 lw x20,0(x3) +80003194: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xa9ec4a20 +80003198: 0001aa03 lw x20,0(x3) +8000319c: 00418193 addi x3,x3,4 + +800031a0 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b20: + clmulh x23, x20, x20 # perform operation +800031a0: 0b4a3bb3 clmulh x23,x20,x20 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkc_clmulh_cg_cmp_rs1_rs2_b20, Zbkc_clmulh_cg_cmp_rs1_rs2_b20_str) +800031a4: 000da203 lw x4,0(x27) +800031a8: 01720863 beq x4,x23,800031b8 +800031ac: 354022ef jal x5,80005500 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 8000e2ce .word 0x8000e2ce +800031b8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xaa1f1ae2 +800031bc: 0001aa83 lw x21,0(x3) +800031c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x8c86a06f +800031c4: 0001aa83 lw x21,0(x3) +800031c8: 00418193 addi x3,x3,4 + +800031cc : +Zbkc_clmulh_cg_cmp_rs1_rs2_b21: + clmulh x15, x21, x21 # perform operation +800031cc: 0b5ab7b3 clmulh x15,x21,x21 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zbkc_clmulh_cg_cmp_rs1_rs2_b21, Zbkc_clmulh_cg_cmp_rs1_rs2_b21_str) +800031d0: 000da203 lw x4,0(x27) +800031d4: 00f20863 beq x4,x15,800031e4 +800031d8: 328022ef jal x5,80005500 +800031dc: 800031cc .word 0x800031cc +800031e0: 8000e309 .word 0x8000e309 +800031e4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5416449c +800031e8: 0001ab03 lw x22,0(x3) +800031ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x3d67b7d3 +800031f0: 0001ab03 lw x22,0(x3) +800031f4: 00418193 addi x3,x3,4 + +800031f8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b22: + clmulh x9, x22, x22 # perform operation +800031f8: 0b6b34b3 clmulh x9,x22,x22 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkc_clmulh_cg_cmp_rs1_rs2_b22, Zbkc_clmulh_cg_cmp_rs1_rs2_b22_str) +800031fc: 000da203 lw x4,0(x27) +80003200: 00920863 beq x4,x9,80003210 +80003204: 2fc022ef jal x5,80005500 +80003208: 800031f8 .word 0x800031f8 +8000320c: 8000e344 .word 0x8000e344 +80003210: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xfcdbc61c +80003214: 0001ab83 lw x23,0(x3) +80003218: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x467ebf66 +8000321c: 0001ab83 lw x23,0(x3) +80003220: 00418193 addi x3,x3,4 + +80003224 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b23: + clmulh x2, x23, x23 # perform operation +80003224: 0b7bb133 clmulh x2,x23,x23 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkc_clmulh_cg_cmp_rs1_rs2_b23, Zbkc_clmulh_cg_cmp_rs1_rs2_b23_str) +80003228: 000da203 lw x4,0(x27) +8000322c: 00220863 beq x4,x2,8000323c +80003230: 2d0022ef jal x5,80005500 +80003234: 80003224 .word 0x80003224 +80003238: 8000e37f .word 0x8000e37f +8000323c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x2beed325 +80003240: 0001ac03 lw x24,0(x3) +80003244: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x4cda9bb1 +80003248: 0001ac03 lw x24,0(x3) +8000324c: 00418193 addi x3,x3,4 + +80003250 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b24: + clmulh x26, x24, x24 # perform operation +80003250: 0b8c3d33 clmulh x26,x24,x24 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkc_clmulh_cg_cmp_rs1_rs2_b24, Zbkc_clmulh_cg_cmp_rs1_rs2_b24_str) +80003254: 000da203 lw x4,0(x27) +80003258: 01a20863 beq x4,x26,80003268 +8000325c: 2a4022ef jal x5,80005500 +80003260: 80003250 .word 0x80003250 +80003264: 8000e3ba .word 0x8000e3ba +80003268: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x6b4ef33b +8000326c: 0001ac83 lw x25,0(x3) +80003270: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x1a7571a6 +80003274: 0001ac83 lw x25,0(x3) +80003278: 00418193 addi x3,x3,4 + +8000327c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b25: + clmulh x20, x25, x25 # perform operation +8000327c: 0b9cba33 clmulh x20,x25,x25 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zbkc_clmulh_cg_cmp_rs1_rs2_b25, Zbkc_clmulh_cg_cmp_rs1_rs2_b25_str) +80003280: 000da203 lw x4,0(x27) +80003284: 01420863 beq x4,x20,80003294 +80003288: 278022ef jal x5,80005500 +8000328c: 8000327c .word 0x8000327c +80003290: 8000e3f5 .word 0x8000e3f5 +80003294: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xd8787b29 +80003298: 0001ad03 lw x26,0(x3) +8000329c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x8d49a89f +800032a0: 0001ad03 lw x26,0(x3) +800032a4: 00418193 addi x3,x3,4 + +800032a8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b26: + clmulh x9, x26, x26 # perform operation +800032a8: 0bad34b3 clmulh x9,x26,x26 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkc_clmulh_cg_cmp_rs1_rs2_b26, Zbkc_clmulh_cg_cmp_rs1_rs2_b26_str) +800032ac: 000da203 lw x4,0(x27) +800032b0: 00920863 beq x4,x9,800032c0 +800032b4: 24c022ef jal x5,80005500 +800032b8: 800032a8 .word 0x800032a8 +800032bc: 8000e430 .word 0x8000e430 +800032c0: 004d8d93 addi x27,x27,4 + + mv x12, x27 # switch signature pointer register to avoid conflict with test +800032c4: 000d8613 addi x12,x27,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x143217c1 +800032c8: 0001ad83 lw x27,0(x3) +800032cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x27d79821 +800032d0: 0001ad83 lw x27,0(x3) +800032d4: 00418193 addi x3,x3,4 + +800032d8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b27: + clmulh x18, x27, x27 # perform operation +800032d8: 0bbdb933 clmulh x18,x27,x27 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkc_clmulh_cg_cmp_rs1_rs2_b27, Zbkc_clmulh_cg_cmp_rs1_rs2_b27_str) +800032dc: 00062203 lw x4,0(x12) +800032e0: 01220863 beq x4,x18,800032f0 +800032e4: 21c022ef jal x5,80005500 +800032e8: 800032d8 .word 0x800032d8 +800032ec: 8000e46b .word 0x8000e46b +800032f0: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x8baca486 +800032f4: 0001ae03 lw x28,0(x3) +800032f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xc23d38cf +800032fc: 0001ae03 lw x28,0(x3) +80003300: 00418193 addi x3,x3,4 + +80003304 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b28: + clmulh x31, x28, x28 # perform operation +80003304: 0bce3fb3 clmulh x31,x28,x28 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkc_clmulh_cg_cmp_rs1_rs2_b28, Zbkc_clmulh_cg_cmp_rs1_rs2_b28_str) +80003308: 00062203 lw x4,0(x12) +8000330c: 01f20863 beq x4,x31,8000331c +80003310: 1f0022ef jal x5,80005500 +80003314: 80003304 .word 0x80003304 +80003318: 8000e4a6 .word 0x8000e4a6 +8000331c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x779e82d8 +80003320: 0001ae83 lw x29,0(x3) +80003324: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x9b1f7a41 +80003328: 0001ae83 lw x29,0(x3) +8000332c: 00418193 addi x3,x3,4 + +80003330 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b29: + clmulh x19, x29, x29 # perform operation +80003330: 0bdeb9b3 clmulh x19,x29,x29 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkc_clmulh_cg_cmp_rs1_rs2_b29, Zbkc_clmulh_cg_cmp_rs1_rs2_b29_str) +80003334: 00062203 lw x4,0(x12) +80003338: 01320863 beq x4,x19,80003348 +8000333c: 1c4022ef jal x5,80005500 +80003340: 80003330 .word 0x80003330 +80003344: 8000e4e1 .word 0x8000e4e1 +80003348: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x9e7521d5 +8000334c: 0001af03 lw x30,0(x3) +80003350: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xf577eae2 +80003354: 0001af03 lw x30,0(x3) +80003358: 00418193 addi x3,x3,4 + +8000335c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b30: + clmulh x23, x30, x30 # perform operation +8000335c: 0bef3bb3 clmulh x23,x30,x30 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkc_clmulh_cg_cmp_rs1_rs2_b30, Zbkc_clmulh_cg_cmp_rs1_rs2_b30_str) +80003360: 00062203 lw x4,0(x12) +80003364: 01720863 beq x4,x23,80003374 +80003368: 198022ef jal x5,80005500 +8000336c: 8000335c .word 0x8000335c +80003370: 8000e51c .word 0x8000e51c +80003374: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x4b8c572e +80003378: 0001af83 lw x31,0(x3) +8000337c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xf2f55a1a +80003380: 0001af83 lw x31,0(x3) +80003384: 00418193 addi x3,x3,4 + +80003388 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b31: + clmulh x9, x31, x31 # perform operation +80003388: 0bffb4b3 clmulh x9,x31,x31 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkc_clmulh_cg_cmp_rs1_rs2_b31, Zbkc_clmulh_cg_cmp_rs1_rs2_b31_str) +8000338c: 00062203 lw x4,0(x12) +80003390: 00920863 beq x4,x9,800033a0 +80003394: 16c022ef jal x5,80005500 +80003398: 80003388 .word 0x80003388 +8000339c: 8000e557 .word 0x8000e557 +800033a0: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x24d75c15 +800033a4: 0001a003 lw x0,0(x3) +800033a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xec4dd487 +800033ac: 0001a103 lw x2,0(x3) +800033b0: 00418193 addi x3,x3,4 + +800033b4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b0: + clmulh x0, x0, x2 # perform operation +800033b4: 0a203033 clmulh x0,x0,x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkc_clmulh_cg_cmp_rd_rs1_b0, Zbkc_clmulh_cg_cmp_rd_rs1_b0_str) +800033b8: 00062203 lw x4,0(x12) +800033bc: 00020863 beq x4,x0,800033cc +800033c0: 140022ef jal x5,80005500 +800033c4: 800033b4 .word 0x800033b4 +800033c8: 8000e592 .word 0x8000e592 +800033cc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x549dd6ae +800033d0: 0001a083 lw x1,0(x3) +800033d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x67b46967 +800033d8: 0001a503 lw x10,0(x3) +800033dc: 00418193 addi x3,x3,4 + +800033e0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b1: + clmulh x1, x1, x10 # perform operation +800033e0: 0aa0b0b3 clmulh x1,x1,x10 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkc_clmulh_cg_cmp_rd_rs1_b1, Zbkc_clmulh_cg_cmp_rd_rs1_b1_str) +800033e4: 00062203 lw x4,0(x12) +800033e8: 00120863 beq x4,x1,800033f8 +800033ec: 114022ef jal x5,80005500 +800033f0: 800033e0 .word 0x800033e0 +800033f4: 8000e5cb .word 0x8000e5cb +800033f8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x302002cf +800033fc: 0001a103 lw x2,0(x3) +80003400: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x3efdcdef +80003404: 0001a583 lw x11,0(x3) +80003408: 00418193 addi x3,x3,4 + +8000340c : +Zbkc_clmulh_cg_cmp_rd_rs1_b2: + clmulh x2, x2, x11 # perform operation +8000340c: 0ab13133 clmulh x2,x2,x11 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkc_clmulh_cg_cmp_rd_rs1_b2, Zbkc_clmulh_cg_cmp_rd_rs1_b2_str) +80003410: 00062203 lw x4,0(x12) +80003414: 00220863 beq x4,x2,80003424 +80003418: 0e8022ef jal x5,80005500 +8000341c: 8000340c .word 0x8000340c +80003420: 8000e604 .word 0x8000e604 +80003424: 00460613 addi x12,x12,4 + + mv x19, x3 # switch data pointer register to avoid conflict with test +80003428: 00018993 addi x19,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x2bdae213 +8000342c: 0009a183 lw x3,0(x19) +80003430: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xd02351ca +80003434: 0009a503 lw x10,0(x19) +80003438: 00498993 addi x19,x19,4 + +8000343c : +Zbkc_clmulh_cg_cmp_rd_rs1_b3: + clmulh x3, x3, x10 # perform operation +8000343c: 0aa1b1b3 clmulh x3,x3,x10 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkc_clmulh_cg_cmp_rd_rs1_b3, Zbkc_clmulh_cg_cmp_rd_rs1_b3_str) +80003440: 00062203 lw x4,0(x12) +80003444: 00320863 beq x4,x3,80003454 +80003448: 0b8022ef jal x5,80005500 +8000344c: 8000343c .word 0x8000343c +80003450: 8000e63d .word 0x8000e63d +80003454: 00460613 addi x12,x12,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003458: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +8000345c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xef1ceb62 +80003460: 0009a203 lw x4,0(x19) +80003464: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0xff3c571c +80003468: 0009af83 lw x31,0(x19) +8000346c: 00498993 addi x19,x19,4 + +80003470 : +Zbkc_clmulh_cg_cmp_rd_rs1_b4: + clmulh x4, x4, x31 # perform operation +80003470: 0bf23233 clmulh x4,x4,x31 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zbkc_clmulh_cg_cmp_rd_rs1_b4, Zbkc_clmulh_cg_cmp_rd_rs1_b4_str) +80003474: 00062683 lw x13,0(x12) +80003478: 00468863 beq x13,x4,80003488 +8000347c: 0c40276f jal x14,80005540 +80003480: 80003470 .word 0x80003470 +80003484: 8000e676 .word 0x8000e676 +80003488: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0xb47e818a +8000348c: 0009a283 lw x5,0(x19) +80003490: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x7b1e56e8 +80003494: 0009a583 lw x11,0(x19) +80003498: 00498993 addi x19,x19,4 + +8000349c : +Zbkc_clmulh_cg_cmp_rd_rs1_b5: + clmulh x5, x5, x11 # perform operation +8000349c: 0ab2b2b3 clmulh x5,x5,x11 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zbkc_clmulh_cg_cmp_rd_rs1_b5, Zbkc_clmulh_cg_cmp_rd_rs1_b5_str) +800034a0: 00062683 lw x13,0(x12) +800034a4: 00568863 beq x13,x5,800034b4 +800034a8: 0980276f jal x14,80005540 +800034ac: 8000349c .word 0x8000349c +800034b0: 8000e6af .word 0x8000e6af +800034b4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xbb58f462 +800034b8: 0009a303 lw x6,0(x19) +800034bc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xa3532e05 +800034c0: 0009a903 lw x18,0(x19) +800034c4: 00498993 addi x19,x19,4 + +800034c8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b6: + clmulh x6, x6, x18 # perform operation +800034c8: 0b233333 clmulh x6,x6,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zbkc_clmulh_cg_cmp_rd_rs1_b6, Zbkc_clmulh_cg_cmp_rd_rs1_b6_str) +800034cc: 00062683 lw x13,0(x12) +800034d0: 00668863 beq x13,x6,800034e0 +800034d4: 06c0276f jal x14,80005540 +800034d8: 800034c8 .word 0x800034c8 +800034dc: 8000e6e8 .word 0x8000e6e8 +800034e0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x41cad014 +800034e4: 0009a383 lw x7,0(x19) +800034e8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0xaf2ed31c +800034ec: 0009ad03 lw x26,0(x19) +800034f0: 00498993 addi x19,x19,4 + +800034f4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b7: + clmulh x7, x7, x26 # perform operation +800034f4: 0ba3b3b3 clmulh x7,x7,x26 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkc_clmulh_cg_cmp_rd_rs1_b7, Zbkc_clmulh_cg_cmp_rd_rs1_b7_str) +800034f8: 00062683 lw x13,0(x12) +800034fc: 00768863 beq x13,x7,8000350c +80003500: 0400276f jal x14,80005540 +80003504: 800034f4 .word 0x800034f4 +80003508: 8000e721 .word 0x8000e721 +8000350c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0x11ad43b5 +80003510: 0009a403 lw x8,0(x19) +80003514: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xe301eafd +80003518: 0009a383 lw x7,0(x19) +8000351c: 00498993 addi x19,x19,4 + +80003520 : +Zbkc_clmulh_cg_cmp_rd_rs1_b8: + clmulh x8, x8, x7 # perform operation +80003520: 0a743433 clmulh x8,x8,x7 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkc_clmulh_cg_cmp_rd_rs1_b8, Zbkc_clmulh_cg_cmp_rd_rs1_b8_str) +80003524: 00062683 lw x13,0(x12) +80003528: 00868863 beq x13,x8,80003538 +8000352c: 0140276f jal x14,80005540 +80003530: 80003520 .word 0x80003520 +80003534: 8000e75a .word 0x8000e75a +80003538: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xe324f19c +8000353c: 0009a483 lw x9,0(x19) +80003540: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x4814e37b +80003544: 0009ac03 lw x24,0(x19) +80003548: 00498993 addi x19,x19,4 + +8000354c : +Zbkc_clmulh_cg_cmp_rd_rs1_b9: + clmulh x9, x9, x24 # perform operation +8000354c: 0b84b4b3 clmulh x9,x9,x24 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkc_clmulh_cg_cmp_rd_rs1_b9, Zbkc_clmulh_cg_cmp_rd_rs1_b9_str) +80003550: 00062683 lw x13,0(x12) +80003554: 00968863 beq x13,x9,80003564 +80003558: 7e90176f jal x14,80005540 +8000355c: 8000354c .word 0x8000354c +80003560: 8000e793 .word 0x8000e793 +80003564: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x382da7d1 +80003568: 0009a503 lw x10,0(x19) +8000356c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x824e8a04 +80003570: 0009ae03 lw x28,0(x19) +80003574: 00498993 addi x19,x19,4 + +80003578 : +Zbkc_clmulh_cg_cmp_rd_rs1_b10: + clmulh x10, x10, x28 # perform operation +80003578: 0bc53533 clmulh x10,x10,x28 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkc_clmulh_cg_cmp_rd_rs1_b10, Zbkc_clmulh_cg_cmp_rd_rs1_b10_str) +8000357c: 00062683 lw x13,0(x12) +80003580: 00a68863 beq x13,x10,80003590 +80003584: 7bd0176f jal x14,80005540 +80003588: 80003578 .word 0x80003578 +8000358c: 8000e7cc .word 0x8000e7cc +80003590: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xff17f4a9 +80003594: 0009a583 lw x11,0(x19) +80003598: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0xad75de72 +8000359c: 0009a403 lw x8,0(x19) +800035a0: 00498993 addi x19,x19,4 + +800035a4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b11: + clmulh x11, x11, x8 # perform operation +800035a4: 0a85b5b3 clmulh x11,x11,x8 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkc_clmulh_cg_cmp_rd_rs1_b11, Zbkc_clmulh_cg_cmp_rd_rs1_b11_str) +800035a8: 00062683 lw x13,0(x12) +800035ac: 00b68863 beq x13,x11,800035bc +800035b0: 7910176f jal x14,80005540 +800035b4: 800035a4 .word 0x800035a4 +800035b8: 8000e806 .word 0x8000e806 +800035bc: 00460613 addi x12,x12,4 + + mv x11, x12 # switch signature pointer register to avoid conflict with test +800035c0: 00060593 addi x11,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xf4cfc002 +800035c4: 0009a603 lw x12,0(x19) +800035c8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x2315db46 +800035cc: 0009aa03 lw x20,0(x19) +800035d0: 00498993 addi x19,x19,4 + +800035d4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b12: + clmulh x12, x12, x20 # perform operation +800035d4: 0b463633 clmulh x12,x12,x20 + # Check if x12 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x12, Zbkc_clmulh_cg_cmp_rd_rs1_b12, Zbkc_clmulh_cg_cmp_rd_rs1_b12_str) +800035d8: 0005a683 lw x13,0(x11) +800035dc: 00c68863 beq x13,x12,800035ec +800035e0: 7610176f jal x14,80005540 +800035e4: 800035d4 .word 0x800035d4 +800035e8: 8000e840 .word 0x8000e840 +800035ec: 00458593 addi x11,x11,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035f0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035f4: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xb4b73c1f +800035f8: 0009a683 lw x13,0(x19) +800035fc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x45dff563 +80003600: 0009a603 lw x12,0(x19) +80003604: 00498993 addi x19,x19,4 + +80003608 : +Zbkc_clmulh_cg_cmp_rd_rs1_b13: + clmulh x13, x13, x12 # perform operation +80003608: 0ac6b6b3 clmulh x13,x13,x12 + # Check if x13 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x13, Zbkc_clmulh_cg_cmp_rd_rs1_b13, Zbkc_clmulh_cg_cmp_rd_rs1_b13_str) +8000360c: 0005a383 lw x7,0(x11) +80003610: 00d38863 beq x7,x13,80003620 +80003614: 7050146f jal x8,80005518 +80003618: 80003608 .word 0x80003608 +8000361c: 8000e87a .word 0x8000e87a +80003620: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x75f31270 +80003624: 0009a703 lw x14,0(x19) +80003628: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xef6cfb7e +8000362c: 0009af03 lw x30,0(x19) +80003630: 00498993 addi x19,x19,4 + +80003634 : +Zbkc_clmulh_cg_cmp_rd_rs1_b14: + clmulh x14, x14, x30 # perform operation +80003634: 0be73733 clmulh x14,x14,x30 + # Check if x14 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x14, Zbkc_clmulh_cg_cmp_rd_rs1_b14, Zbkc_clmulh_cg_cmp_rd_rs1_b14_str) +80003638: 0005a383 lw x7,0(x11) +8000363c: 00e38863 beq x7,x14,8000364c +80003640: 6d90146f jal x8,80005518 +80003644: 80003634 .word 0x80003634 +80003648: 8000e8b4 .word 0x8000e8b4 +8000364c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x57c7616d +80003650: 0009a783 lw x15,0(x19) +80003654: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xf4c33518 +80003658: 0009a803 lw x16,0(x19) +8000365c: 00498993 addi x19,x19,4 + +80003660 : +Zbkc_clmulh_cg_cmp_rd_rs1_b15: + clmulh x15, x15, x16 # perform operation +80003660: 0b07b7b3 clmulh x15,x15,x16 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zbkc_clmulh_cg_cmp_rd_rs1_b15, Zbkc_clmulh_cg_cmp_rd_rs1_b15_str) +80003664: 0005a383 lw x7,0(x11) +80003668: 00f38863 beq x7,x15,80003678 +8000366c: 6ad0146f jal x8,80005518 +80003670: 80003660 .word 0x80003660 +80003674: 8000e8ee .word 0x8000e8ee +80003678: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x7822abf0 +8000367c: 0009a803 lw x16,0(x19) +80003680: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0xc18988b9 +80003684: 0009aa03 lw x20,0(x19) +80003688: 00498993 addi x19,x19,4 + +8000368c : +Zbkc_clmulh_cg_cmp_rd_rs1_b16: + clmulh x16, x16, x20 # perform operation +8000368c: 0b483833 clmulh x16,x16,x20 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zbkc_clmulh_cg_cmp_rd_rs1_b16, Zbkc_clmulh_cg_cmp_rd_rs1_b16_str) +80003690: 0005a383 lw x7,0(x11) +80003694: 01038863 beq x7,x16,800036a4 +80003698: 6810146f jal x8,80005518 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000e928 .word 0x8000e928 +800036a4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x6b97eb76 +800036a8: 0009a883 lw x17,0(x19) +800036ac: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xc0e4c2d5 +800036b0: 0009a803 lw x16,0(x19) +800036b4: 00498993 addi x19,x19,4 + +800036b8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b17: + clmulh x17, x17, x16 # perform operation +800036b8: 0b08b8b3 clmulh x17,x17,x16 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zbkc_clmulh_cg_cmp_rd_rs1_b17, Zbkc_clmulh_cg_cmp_rd_rs1_b17_str) +800036bc: 0005a383 lw x7,0(x11) +800036c0: 01138863 beq x7,x17,800036d0 +800036c4: 6550146f jal x8,80005518 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000e962 .word 0x8000e962 +800036d0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xcae02957 +800036d4: 0009a903 lw x18,0(x19) +800036d8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x17f284fb +800036dc: 0009a503 lw x10,0(x19) +800036e0: 00498993 addi x19,x19,4 + +800036e4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b18: + clmulh x18, x18, x10 # perform operation +800036e4: 0aa93933 clmulh x18,x18,x10 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkc_clmulh_cg_cmp_rd_rs1_b18, Zbkc_clmulh_cg_cmp_rd_rs1_b18_str) +800036e8: 0005a383 lw x7,0(x11) +800036ec: 01238863 beq x7,x18,800036fc +800036f0: 6290146f jal x8,80005518 +800036f4: 800036e4 .word 0x800036e4 +800036f8: 8000e99c .word 0x8000e99c +800036fc: 00458593 addi x11,x11,4 + + mv x17, x19 # switch data pointer register to avoid conflict with test +80003700: 00098893 addi x17,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0314d677 +80003704: 0008a983 lw x19,0(x17) +80003708: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xe7513fdf +8000370c: 0008a203 lw x4,0(x17) +80003710: 00488893 addi x17,x17,4 + +80003714 : +Zbkc_clmulh_cg_cmp_rd_rs1_b19: + clmulh x19, x19, x4 # perform operation +80003714: 0a49b9b3 clmulh x19,x19,x4 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zbkc_clmulh_cg_cmp_rd_rs1_b19, Zbkc_clmulh_cg_cmp_rd_rs1_b19_str) +80003718: 0005a383 lw x7,0(x11) +8000371c: 01338863 beq x7,x19,8000372c +80003720: 5f90146f jal x8,80005518 +80003724: 80003714 .word 0x80003714 +80003728: 8000e9d6 .word 0x8000e9d6 +8000372c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x8dc87ec6 +80003730: 0008aa03 lw x20,0(x17) +80003734: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x58ea1ddb +80003738: 0008a503 lw x10,0(x17) +8000373c: 00488893 addi x17,x17,4 + +80003740 : +Zbkc_clmulh_cg_cmp_rd_rs1_b20: + clmulh x20, x20, x10 # perform operation +80003740: 0aaa3a33 clmulh x20,x20,x10 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zbkc_clmulh_cg_cmp_rd_rs1_b20, Zbkc_clmulh_cg_cmp_rd_rs1_b20_str) +80003744: 0005a383 lw x7,0(x11) +80003748: 01438863 beq x7,x20,80003758 +8000374c: 5cd0146f jal x8,80005518 +80003750: 80003740 .word 0x80003740 +80003754: 8000ea10 .word 0x8000ea10 +80003758: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x071b8021 +8000375c: 0008aa83 lw x21,0(x17) +80003760: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xec2e44fa +80003764: 0008a183 lw x3,0(x17) +80003768: 00488893 addi x17,x17,4 + +8000376c : +Zbkc_clmulh_cg_cmp_rd_rs1_b21: + clmulh x21, x21, x3 # perform operation +8000376c: 0a3abab3 clmulh x21,x21,x3 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zbkc_clmulh_cg_cmp_rd_rs1_b21, Zbkc_clmulh_cg_cmp_rd_rs1_b21_str) +80003770: 0005a383 lw x7,0(x11) +80003774: 01538863 beq x7,x21,80003784 +80003778: 5a10146f jal x8,80005518 +8000377c: 8000376c .word 0x8000376c +80003780: 8000ea4a .word 0x8000ea4a +80003784: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xc8843480 +80003788: 0008ab03 lw x22,0(x17) +8000378c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xa2fd8d0e +80003790: 0008a203 lw x4,0(x17) +80003794: 00488893 addi x17,x17,4 + +80003798 : +Zbkc_clmulh_cg_cmp_rd_rs1_b22: + clmulh x22, x22, x4 # perform operation +80003798: 0a4b3b33 clmulh x22,x22,x4 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zbkc_clmulh_cg_cmp_rd_rs1_b22, Zbkc_clmulh_cg_cmp_rd_rs1_b22_str) +8000379c: 0005a383 lw x7,0(x11) +800037a0: 01638863 beq x7,x22,800037b0 +800037a4: 5750146f jal x8,80005518 +800037a8: 80003798 .word 0x80003798 +800037ac: 8000ea84 .word 0x8000ea84 +800037b0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x108a7e9a +800037b4: 0008ab83 lw x23,0(x17) +800037b8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xc74a806f +800037bc: 0008a983 lw x19,0(x17) +800037c0: 00488893 addi x17,x17,4 + +800037c4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b23: + clmulh x23, x23, x19 # perform operation +800037c4: 0b3bbbb3 clmulh x23,x23,x19 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zbkc_clmulh_cg_cmp_rd_rs1_b23, Zbkc_clmulh_cg_cmp_rd_rs1_b23_str) +800037c8: 0005a383 lw x7,0(x11) +800037cc: 01738863 beq x7,x23,800037dc +800037d0: 5490146f jal x8,80005518 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000eabe .word 0x8000eabe +800037dc: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x203c3731 +800037e0: 0008ac03 lw x24,0(x17) +800037e4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xe34cc6eb +800037e8: 0008ac83 lw x25,0(x17) +800037ec: 00488893 addi x17,x17,4 + +800037f0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b24: + clmulh x24, x24, x25 # perform operation +800037f0: 0b9c3c33 clmulh x24,x24,x25 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zbkc_clmulh_cg_cmp_rd_rs1_b24, Zbkc_clmulh_cg_cmp_rd_rs1_b24_str) +800037f4: 0005a383 lw x7,0(x11) +800037f8: 01838863 beq x7,x24,80003808 +800037fc: 51d0146f jal x8,80005518 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000eaf8 .word 0x8000eaf8 +80003808: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x4af875da +8000380c: 0008ac83 lw x25,0(x17) +80003810: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xb4179e20 +80003814: 0008a283 lw x5,0(x17) +80003818: 00488893 addi x17,x17,4 + +8000381c : +Zbkc_clmulh_cg_cmp_rd_rs1_b25: + clmulh x25, x25, x5 # perform operation +8000381c: 0a5cbcb3 clmulh x25,x25,x5 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zbkc_clmulh_cg_cmp_rd_rs1_b25, Zbkc_clmulh_cg_cmp_rd_rs1_b25_str) +80003820: 0005a383 lw x7,0(x11) +80003824: 01938863 beq x7,x25,80003834 +80003828: 4f10146f jal x8,80005518 +8000382c: 8000381c .word 0x8000381c +80003830: 8000eb32 .word 0x8000eb32 +80003834: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xc6bf3b37 +80003838: 0008ad03 lw x26,0(x17) +8000383c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x76d344d9 +80003840: 0008a003 lw x0,0(x17) +80003844: 00488893 addi x17,x17,4 + +80003848 : +Zbkc_clmulh_cg_cmp_rd_rs1_b26: + clmulh x26, x26, x0 # perform operation +80003848: 0a0d3d33 clmulh x26,x26,x0 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zbkc_clmulh_cg_cmp_rd_rs1_b26, Zbkc_clmulh_cg_cmp_rd_rs1_b26_str) +8000384c: 0005a383 lw x7,0(x11) +80003850: 01a38863 beq x7,x26,80003860 +80003854: 4c50146f jal x8,80005518 +80003858: 80003848 .word 0x80003848 +8000385c: 8000eb6c .word 0x8000eb6c +80003860: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xebb49d83 +80003864: 0008ad83 lw x27,0(x17) +80003868: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x085c4926 +8000386c: 0008ab03 lw x22,0(x17) +80003870: 00488893 addi x17,x17,4 + +80003874 : +Zbkc_clmulh_cg_cmp_rd_rs1_b27: + clmulh x27, x27, x22 # perform operation +80003874: 0b6dbdb3 clmulh x27,x27,x22 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zbkc_clmulh_cg_cmp_rd_rs1_b27, Zbkc_clmulh_cg_cmp_rd_rs1_b27_str) +80003878: 0005a383 lw x7,0(x11) +8000387c: 01b38863 beq x7,x27,8000388c +80003880: 4990146f jal x8,80005518 +80003884: 80003874 .word 0x80003874 +80003888: 8000eba6 .word 0x8000eba6 +8000388c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xa0752fa7 +80003890: 0008ae03 lw x28,0(x17) +80003894: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x99ab9778 +80003898: 0008ad83 lw x27,0(x17) +8000389c: 00488893 addi x17,x17,4 + +800038a0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b28: + clmulh x28, x28, x27 # perform operation +800038a0: 0bbe3e33 clmulh x28,x28,x27 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zbkc_clmulh_cg_cmp_rd_rs1_b28, Zbkc_clmulh_cg_cmp_rd_rs1_b28_str) +800038a4: 0005a383 lw x7,0(x11) +800038a8: 01c38863 beq x7,x28,800038b8 +800038ac: 46d0146f jal x8,80005518 +800038b0: 800038a0 .word 0x800038a0 +800038b4: 8000ebe0 .word 0x8000ebe0 +800038b8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x88ba22af +800038bc: 0008ae83 lw x29,0(x17) +800038c0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x4da170e0 +800038c4: 0008ab03 lw x22,0(x17) +800038c8: 00488893 addi x17,x17,4 + +800038cc : +Zbkc_clmulh_cg_cmp_rd_rs1_b29: + clmulh x29, x29, x22 # perform operation +800038cc: 0b6ebeb3 clmulh x29,x29,x22 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkc_clmulh_cg_cmp_rd_rs1_b29, Zbkc_clmulh_cg_cmp_rd_rs1_b29_str) +800038d0: 0005a383 lw x7,0(x11) +800038d4: 01d38863 beq x7,x29,800038e4 +800038d8: 4410146f jal x8,80005518 +800038dc: 800038cc .word 0x800038cc +800038e0: 8000ec1a .word 0x8000ec1a +800038e4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x41feb040 +800038e8: 0008af03 lw x30,0(x17) +800038ec: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x8815c51c +800038f0: 0008a783 lw x15,0(x17) +800038f4: 00488893 addi x17,x17,4 + +800038f8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b30: + clmulh x30, x30, x15 # perform operation +800038f8: 0aff3f33 clmulh x30,x30,x15 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zbkc_clmulh_cg_cmp_rd_rs1_b30, Zbkc_clmulh_cg_cmp_rd_rs1_b30_str) +800038fc: 0005a383 lw x7,0(x11) +80003900: 01e38863 beq x7,x30,80003910 +80003904: 4150146f jal x8,80005518 +80003908: 800038f8 .word 0x800038f8 +8000390c: 8000ec54 .word 0x8000ec54 +80003910: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xdd06546f +80003914: 0008af83 lw x31,0(x17) +80003918: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x19b25038 +8000391c: 0008a283 lw x5,0(x17) +80003920: 00488893 addi x17,x17,4 + +80003924 : +Zbkc_clmulh_cg_cmp_rd_rs1_b31: + clmulh x31, x31, x5 # perform operation +80003924: 0a5fbfb3 clmulh x31,x31,x5 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zbkc_clmulh_cg_cmp_rd_rs1_b31, Zbkc_clmulh_cg_cmp_rd_rs1_b31_str) +80003928: 0005a383 lw x7,0(x11) +8000392c: 01f38863 beq x7,x31,8000393c +80003930: 3e90146f jal x8,80005518 +80003934: 80003924 .word 0x80003924 +80003938: 8000ec8e .word 0x8000ec8e +8000393c: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xc89fc810 +80003940: 0008af83 lw x31,0(x17) +80003944: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0xdcbda8d2 +80003948: 0008a003 lw x0,0(x17) +8000394c: 00488893 addi x17,x17,4 + +80003950 : +Zbkc_clmulh_cg_cmp_rd_rs2_b0: + clmulh x0, x31, x0 # perform operation +80003950: 0a0fb033 clmulh x0,x31,x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zbkc_clmulh_cg_cmp_rd_rs2_b0, Zbkc_clmulh_cg_cmp_rd_rs2_b0_str) +80003954: 0005a383 lw x7,0(x11) +80003958: 00038863 beq x7,x0,80003968 +8000395c: 3bd0146f jal x8,80005518 +80003960: 80003950 .word 0x80003950 +80003964: 8000ecc8 .word 0x8000ecc8 +80003968: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x37b9aeba +8000396c: 0008ad03 lw x26,0(x17) +80003970: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xdbe03570 +80003974: 0008a083 lw x1,0(x17) +80003978: 00488893 addi x17,x17,4 + +8000397c : +Zbkc_clmulh_cg_cmp_rd_rs2_b1: + clmulh x1, x26, x1 # perform operation +8000397c: 0a1d30b3 clmulh x1,x26,x1 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zbkc_clmulh_cg_cmp_rd_rs2_b1, Zbkc_clmulh_cg_cmp_rd_rs2_b1_str) +80003980: 0005a383 lw x7,0(x11) +80003984: 00138863 beq x7,x1,80003994 +80003988: 3910146f jal x8,80005518 +8000398c: 8000397c .word 0x8000397c +80003990: 8000ed01 .word 0x8000ed01 +80003994: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xdc84c719 +80003998: 0008a003 lw x0,0(x17) +8000399c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x16af3f05 +800039a0: 0008a103 lw x2,0(x17) +800039a4: 00488893 addi x17,x17,4 + +800039a8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b2: + clmulh x2, x0, x2 # perform operation +800039a8: 0a203133 clmulh x2,x0,x2 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zbkc_clmulh_cg_cmp_rd_rs2_b2, Zbkc_clmulh_cg_cmp_rd_rs2_b2_str) +800039ac: 0005a383 lw x7,0(x11) +800039b0: 00238863 beq x7,x2,800039c0 +800039b4: 3650146f jal x8,80005518 +800039b8: 800039a8 .word 0x800039a8 +800039bc: 8000ed3a .word 0x8000ed3a +800039c0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x24b3109b +800039c4: 0008a203 lw x4,0(x17) +800039c8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0ab0a74c +800039cc: 0008a183 lw x3,0(x17) +800039d0: 00488893 addi x17,x17,4 + +800039d4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b3: + clmulh x3, x4, x3 # perform operation +800039d4: 0a3231b3 clmulh x3,x4,x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zbkc_clmulh_cg_cmp_rd_rs2_b3, Zbkc_clmulh_cg_cmp_rd_rs2_b3_str) +800039d8: 0005a383 lw x7,0(x11) +800039dc: 00338863 beq x7,x3,800039ec +800039e0: 3390146f jal x8,80005518 +800039e4: 800039d4 .word 0x800039d4 +800039e8: 8000ed73 .word 0x8000ed73 +800039ec: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x033684c9 +800039f0: 0008ab83 lw x23,0(x17) +800039f4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xfb7d78d8 +800039f8: 0008a203 lw x4,0(x17) +800039fc: 00488893 addi x17,x17,4 + +80003a00 : +Zbkc_clmulh_cg_cmp_rd_rs2_b4: + clmulh x4, x23, x4 # perform operation +80003a00: 0a4bb233 clmulh x4,x23,x4 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkc_clmulh_cg_cmp_rd_rs2_b4, Zbkc_clmulh_cg_cmp_rd_rs2_b4_str) +80003a04: 0005a383 lw x7,0(x11) +80003a08: 00438863 beq x7,x4,80003a18 +80003a0c: 30d0146f jal x8,80005518 +80003a10: 80003a00 .word 0x80003a00 +80003a14: 8000edac .word 0x8000edac +80003a18: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xd339b379 +80003a1c: 0008ab03 lw x22,0(x17) +80003a20: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x5cac827d +80003a24: 0008a283 lw x5,0(x17) +80003a28: 00488893 addi x17,x17,4 + +80003a2c : +Zbkc_clmulh_cg_cmp_rd_rs2_b5: + clmulh x5, x22, x5 # perform operation +80003a2c: 0a5b32b3 clmulh x5,x22,x5 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkc_clmulh_cg_cmp_rd_rs2_b5, Zbkc_clmulh_cg_cmp_rd_rs2_b5_str) +80003a30: 0005a383 lw x7,0(x11) +80003a34: 00538863 beq x7,x5,80003a44 +80003a38: 2e10146f jal x8,80005518 +80003a3c: 80003a2c .word 0x80003a2c +80003a40: 8000ede5 .word 0x8000ede5 +80003a44: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xb660acd6 +80003a48: 0008a483 lw x9,0(x17) +80003a4c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x087bda26 +80003a50: 0008a303 lw x6,0(x17) +80003a54: 00488893 addi x17,x17,4 + +80003a58 : +Zbkc_clmulh_cg_cmp_rd_rs2_b6: + clmulh x6, x9, x6 # perform operation +80003a58: 0a64b333 clmulh x6,x9,x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkc_clmulh_cg_cmp_rd_rs2_b6, Zbkc_clmulh_cg_cmp_rd_rs2_b6_str) +80003a5c: 0005a383 lw x7,0(x11) +80003a60: 00638863 beq x7,x6,80003a70 +80003a64: 2b50146f jal x8,80005518 +80003a68: 80003a58 .word 0x80003a58 +80003a6c: 8000ee1e .word 0x8000ee1e +80003a70: 00458593 addi x11,x11,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a74: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a78: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xfdf519f1 +80003a7c: 0008a483 lw x9,0(x17) +80003a80: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xdb3bab16 +80003a84: 0008a383 lw x7,0(x17) +80003a88: 00488893 addi x17,x17,4 + +80003a8c : +Zbkc_clmulh_cg_cmp_rd_rs2_b7: + clmulh x7, x9, x7 # perform operation +80003a8c: 0a74b3b3 clmulh x7,x9,x7 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmulh_cg_cmp_rd_rs2_b7, Zbkc_clmulh_cg_cmp_rd_rs2_b7_str) +80003a90: 0005a203 lw x4,0(x11) +80003a94: 00720863 beq x4,x7,80003aa4 +80003a98: 269012ef jal x5,80005500 +80003a9c: 80003a8c .word 0x80003a8c +80003aa0: 8000ee57 .word 0x8000ee57 +80003aa4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x5b1b87f7 +80003aa8: 0008aa03 lw x20,0(x17) +80003aac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x0872b1a0 +80003ab0: 0008a403 lw x8,0(x17) +80003ab4: 00488893 addi x17,x17,4 + +80003ab8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b8: + clmulh x8, x20, x8 # perform operation +80003ab8: 0a8a3433 clmulh x8,x20,x8 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmulh_cg_cmp_rd_rs2_b8, Zbkc_clmulh_cg_cmp_rd_rs2_b8_str) +80003abc: 0005a203 lw x4,0(x11) +80003ac0: 00820863 beq x4,x8,80003ad0 +80003ac4: 23d012ef jal x5,80005500 +80003ac8: 80003ab8 .word 0x80003ab8 +80003acc: 8000ee90 .word 0x8000ee90 +80003ad0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x4d012a3f +80003ad4: 0008aa83 lw x21,0(x17) +80003ad8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xbddcd31e +80003adc: 0008a483 lw x9,0(x17) +80003ae0: 00488893 addi x17,x17,4 + +80003ae4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b9: + clmulh x9, x21, x9 # perform operation +80003ae4: 0a9ab4b3 clmulh x9,x21,x9 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmulh_cg_cmp_rd_rs2_b9, Zbkc_clmulh_cg_cmp_rd_rs2_b9_str) +80003ae8: 0005a203 lw x4,0(x11) +80003aec: 00920863 beq x4,x9,80003afc +80003af0: 211012ef jal x5,80005500 +80003af4: 80003ae4 .word 0x80003ae4 +80003af8: 8000eec9 .word 0x8000eec9 +80003afc: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0e56f351 +80003b00: 0008ac83 lw x25,0(x17) +80003b04: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x6512efef +80003b08: 0008a503 lw x10,0(x17) +80003b0c: 00488893 addi x17,x17,4 + +80003b10 : +Zbkc_clmulh_cg_cmp_rd_rs2_b10: + clmulh x10, x25, x10 # perform operation +80003b10: 0aacb533 clmulh x10,x25,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkc_clmulh_cg_cmp_rd_rs2_b10, Zbkc_clmulh_cg_cmp_rd_rs2_b10_str) +80003b14: 0005a203 lw x4,0(x11) +80003b18: 00a20863 beq x4,x10,80003b28 +80003b1c: 1e5012ef jal x5,80005500 +80003b20: 80003b10 .word 0x80003b10 +80003b24: 8000ef02 .word 0x8000ef02 +80003b28: 00458593 addi x11,x11,4 + + mv x6, x11 # switch signature pointer register to avoid conflict with test +80003b2c: 00058313 addi x6,x11,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x61c648d6 +80003b30: 0008ae83 lw x29,0(x17) +80003b34: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x08ecb063 +80003b38: 0008a583 lw x11,0(x17) +80003b3c: 00488893 addi x17,x17,4 + +80003b40 : +Zbkc_clmulh_cg_cmp_rd_rs2_b11: + clmulh x11, x29, x11 # perform operation +80003b40: 0abeb5b3 clmulh x11,x29,x11 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkc_clmulh_cg_cmp_rd_rs2_b11, Zbkc_clmulh_cg_cmp_rd_rs2_b11_str) +80003b44: 00032203 lw x4,0(x6) +80003b48: 00b20863 beq x4,x11,80003b58 +80003b4c: 1b5012ef jal x5,80005500 +80003b50: 80003b40 .word 0x80003b40 +80003b54: 8000ef3c .word 0x8000ef3c +80003b58: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x9505a53a +80003b5c: 0008a583 lw x11,0(x17) +80003b60: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x9dfca7c3 +80003b64: 0008a603 lw x12,0(x17) +80003b68: 00488893 addi x17,x17,4 + +80003b6c : +Zbkc_clmulh_cg_cmp_rd_rs2_b12: + clmulh x12, x11, x12 # perform operation +80003b6c: 0ac5b633 clmulh x12,x11,x12 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkc_clmulh_cg_cmp_rd_rs2_b12, Zbkc_clmulh_cg_cmp_rd_rs2_b12_str) +80003b70: 00032203 lw x4,0(x6) +80003b74: 00c20863 beq x4,x12,80003b84 +80003b78: 189012ef jal x5,80005500 +80003b7c: 80003b6c .word 0x80003b6c +80003b80: 8000ef76 .word 0x8000ef76 +80003b84: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x56cfb1ee +80003b88: 0008a383 lw x7,0(x17) +80003b8c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xfa27a2ac +80003b90: 0008a683 lw x13,0(x17) +80003b94: 00488893 addi x17,x17,4 + +80003b98 : +Zbkc_clmulh_cg_cmp_rd_rs2_b13: + clmulh x13, x7, x13 # perform operation +80003b98: 0ad3b6b3 clmulh x13,x7,x13 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zbkc_clmulh_cg_cmp_rd_rs2_b13, Zbkc_clmulh_cg_cmp_rd_rs2_b13_str) +80003b9c: 00032203 lw x4,0(x6) +80003ba0: 00d20863 beq x4,x13,80003bb0 +80003ba4: 15d012ef jal x5,80005500 +80003ba8: 80003b98 .word 0x80003b98 +80003bac: 8000efb0 .word 0x8000efb0 +80003bb0: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0xb88ef73e +80003bb4: 0008ac03 lw x24,0(x17) +80003bb8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x35fccc11 +80003bbc: 0008a703 lw x14,0(x17) +80003bc0: 00488893 addi x17,x17,4 + +80003bc4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b14: + clmulh x14, x24, x14 # perform operation +80003bc4: 0aec3733 clmulh x14,x24,x14 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkc_clmulh_cg_cmp_rd_rs2_b14, Zbkc_clmulh_cg_cmp_rd_rs2_b14_str) +80003bc8: 00032203 lw x4,0(x6) +80003bcc: 00e20863 beq x4,x14,80003bdc +80003bd0: 131012ef jal x5,80005500 +80003bd4: 80003bc4 .word 0x80003bc4 +80003bd8: 8000efea .word 0x8000efea +80003bdc: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x4d17240b +80003be0: 0008ac03 lw x24,0(x17) +80003be4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x152f1c47 +80003be8: 0008a783 lw x15,0(x17) +80003bec: 00488893 addi x17,x17,4 + +80003bf0 : +Zbkc_clmulh_cg_cmp_rd_rs2_b15: + clmulh x15, x24, x15 # perform operation +80003bf0: 0afc37b3 clmulh x15,x24,x15 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkc_clmulh_cg_cmp_rd_rs2_b15, Zbkc_clmulh_cg_cmp_rd_rs2_b15_str) +80003bf4: 00032203 lw x4,0(x6) +80003bf8: 00f20863 beq x4,x15,80003c08 +80003bfc: 105012ef jal x5,80005500 +80003c00: 80003bf0 .word 0x80003bf0 +80003c04: 8000f024 .word 0x8000f024 +80003c08: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x3dc5c3b9 +80003c0c: 0008ae03 lw x28,0(x17) +80003c10: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xf5f3f81e +80003c14: 0008a803 lw x16,0(x17) +80003c18: 00488893 addi x17,x17,4 + +80003c1c : +Zbkc_clmulh_cg_cmp_rd_rs2_b16: + clmulh x16, x28, x16 # perform operation +80003c1c: 0b0e3833 clmulh x16,x28,x16 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkc_clmulh_cg_cmp_rd_rs2_b16, Zbkc_clmulh_cg_cmp_rd_rs2_b16_str) +80003c20: 00032203 lw x4,0(x6) +80003c24: 01020863 beq x4,x16,80003c34 +80003c28: 0d9012ef jal x5,80005500 +80003c2c: 80003c1c .word 0x80003c1c +80003c30: 8000f05e .word 0x8000f05e +80003c34: 00430313 addi x6,x6,4 + + mv x31, x17 # switch data pointer register to avoid conflict with test +80003c38: 00088f93 addi x31,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0xee358641 +80003c3c: 000fa383 lw x7,0(x31) +80003c40: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0xe57101b0 +80003c44: 000fa883 lw x17,0(x31) +80003c48: 004f8f93 addi x31,x31,4 + +80003c4c : +Zbkc_clmulh_cg_cmp_rd_rs2_b17: + clmulh x17, x7, x17 # perform operation +80003c4c: 0b13b8b3 clmulh x17,x7,x17 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkc_clmulh_cg_cmp_rd_rs2_b17, Zbkc_clmulh_cg_cmp_rd_rs2_b17_str) +80003c50: 00032203 lw x4,0(x6) +80003c54: 01120863 beq x4,x17,80003c64 +80003c58: 0a9012ef jal x5,80005500 +80003c5c: 80003c4c .word 0x80003c4c +80003c60: 8000f098 .word 0x8000f098 +80003c64: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x54c6b19d +80003c68: 000fae03 lw x28,0(x31) +80003c6c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x776a03ff +80003c70: 000fa903 lw x18,0(x31) +80003c74: 004f8f93 addi x31,x31,4 + +80003c78 : +Zbkc_clmulh_cg_cmp_rd_rs2_b18: + clmulh x18, x28, x18 # perform operation +80003c78: 0b2e3933 clmulh x18,x28,x18 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkc_clmulh_cg_cmp_rd_rs2_b18, Zbkc_clmulh_cg_cmp_rd_rs2_b18_str) +80003c7c: 00032203 lw x4,0(x6) +80003c80: 01220863 beq x4,x18,80003c90 +80003c84: 07d012ef jal x5,80005500 +80003c88: 80003c78 .word 0x80003c78 +80003c8c: 8000f0d2 .word 0x8000f0d2 +80003c90: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xe75f0660 +80003c94: 000fab03 lw x22,0(x31) +80003c98: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x74025137 +80003c9c: 000fa983 lw x19,0(x31) +80003ca0: 004f8f93 addi x31,x31,4 + +80003ca4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b19: + clmulh x19, x22, x19 # perform operation +80003ca4: 0b3b39b3 clmulh x19,x22,x19 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkc_clmulh_cg_cmp_rd_rs2_b19, Zbkc_clmulh_cg_cmp_rd_rs2_b19_str) +80003ca8: 00032203 lw x4,0(x6) +80003cac: 01320863 beq x4,x19,80003cbc +80003cb0: 051012ef jal x5,80005500 +80003cb4: 80003ca4 .word 0x80003ca4 +80003cb8: 8000f10c .word 0x8000f10c +80003cbc: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x82d48bd5 +80003cc0: 000fad83 lw x27,0(x31) +80003cc4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x529f4cc0 +80003cc8: 000faa03 lw x20,0(x31) +80003ccc: 004f8f93 addi x31,x31,4 + +80003cd0 : +Zbkc_clmulh_cg_cmp_rd_rs2_b20: + clmulh x20, x27, x20 # perform operation +80003cd0: 0b4dba33 clmulh x20,x27,x20 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkc_clmulh_cg_cmp_rd_rs2_b20, Zbkc_clmulh_cg_cmp_rd_rs2_b20_str) +80003cd4: 00032203 lw x4,0(x6) +80003cd8: 01420863 beq x4,x20,80003ce8 +80003cdc: 025012ef jal x5,80005500 +80003ce0: 80003cd0 .word 0x80003cd0 +80003ce4: 8000f146 .word 0x8000f146 +80003ce8: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x06969ff2 +80003cec: 000fab83 lw x23,0(x31) +80003cf0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xafd285bd +80003cf4: 000faa83 lw x21,0(x31) +80003cf8: 004f8f93 addi x31,x31,4 + +80003cfc : +Zbkc_clmulh_cg_cmp_rd_rs2_b21: + clmulh x21, x23, x21 # perform operation +80003cfc: 0b5bbab3 clmulh x21,x23,x21 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkc_clmulh_cg_cmp_rd_rs2_b21, Zbkc_clmulh_cg_cmp_rd_rs2_b21_str) +80003d00: 00032203 lw x4,0(x6) +80003d04: 01520863 beq x4,x21,80003d14 +80003d08: 7f8012ef jal x5,80005500 +80003d0c: 80003cfc .word 0x80003cfc +80003d10: 8000f180 .word 0x8000f180 +80003d14: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xf24a0bf2 +80003d18: 000fab83 lw x23,0(x31) +80003d1c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x939dccad +80003d20: 000fab03 lw x22,0(x31) +80003d24: 004f8f93 addi x31,x31,4 + +80003d28 : +Zbkc_clmulh_cg_cmp_rd_rs2_b22: + clmulh x22, x23, x22 # perform operation +80003d28: 0b6bbb33 clmulh x22,x23,x22 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkc_clmulh_cg_cmp_rd_rs2_b22, Zbkc_clmulh_cg_cmp_rd_rs2_b22_str) +80003d2c: 00032203 lw x4,0(x6) +80003d30: 01620863 beq x4,x22,80003d40 +80003d34: 7cc012ef jal x5,80005500 +80003d38: 80003d28 .word 0x80003d28 +80003d3c: 8000f1ba .word 0x8000f1ba +80003d40: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xcfed1b03 +80003d44: 000fad83 lw x27,0(x31) +80003d48: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x01a70261 +80003d4c: 000fab83 lw x23,0(x31) +80003d50: 004f8f93 addi x31,x31,4 + +80003d54 : +Zbkc_clmulh_cg_cmp_rd_rs2_b23: + clmulh x23, x27, x23 # perform operation +80003d54: 0b7dbbb3 clmulh x23,x27,x23 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkc_clmulh_cg_cmp_rd_rs2_b23, Zbkc_clmulh_cg_cmp_rd_rs2_b23_str) +80003d58: 00032203 lw x4,0(x6) +80003d5c: 01720863 beq x4,x23,80003d6c +80003d60: 7a0012ef jal x5,80005500 +80003d64: 80003d54 .word 0x80003d54 +80003d68: 8000f1f4 .word 0x8000f1f4 +80003d6c: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x18fa3ea5 +80003d70: 000fa483 lw x9,0(x31) +80003d74: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x5fb4e359 +80003d78: 000fac03 lw x24,0(x31) +80003d7c: 004f8f93 addi x31,x31,4 + +80003d80 : +Zbkc_clmulh_cg_cmp_rd_rs2_b24: + clmulh x24, x9, x24 # perform operation +80003d80: 0b84bc33 clmulh x24,x9,x24 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkc_clmulh_cg_cmp_rd_rs2_b24, Zbkc_clmulh_cg_cmp_rd_rs2_b24_str) +80003d84: 00032203 lw x4,0(x6) +80003d88: 01820863 beq x4,x24,80003d98 +80003d8c: 774012ef jal x5,80005500 +80003d90: 80003d80 .word 0x80003d80 +80003d94: 8000f22e .word 0x8000f22e +80003d98: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x92eeed4f +80003d9c: 000fa683 lw x13,0(x31) +80003da0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x7fa4b2dc +80003da4: 000fac83 lw x25,0(x31) +80003da8: 004f8f93 addi x31,x31,4 + +80003dac : +Zbkc_clmulh_cg_cmp_rd_rs2_b25: + clmulh x25, x13, x25 # perform operation +80003dac: 0b96bcb3 clmulh x25,x13,x25 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkc_clmulh_cg_cmp_rd_rs2_b25, Zbkc_clmulh_cg_cmp_rd_rs2_b25_str) +80003db0: 00032203 lw x4,0(x6) +80003db4: 01920863 beq x4,x25,80003dc4 +80003db8: 748012ef jal x5,80005500 +80003dbc: 80003dac .word 0x80003dac +80003dc0: 8000f268 .word 0x8000f268 +80003dc4: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0xf6ecf82f +80003dc8: 000fa383 lw x7,0(x31) +80003dcc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x047dc5f6 +80003dd0: 000fad03 lw x26,0(x31) +80003dd4: 004f8f93 addi x31,x31,4 + +80003dd8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b26: + clmulh x26, x7, x26 # perform operation +80003dd8: 0ba3bd33 clmulh x26,x7,x26 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkc_clmulh_cg_cmp_rd_rs2_b26, Zbkc_clmulh_cg_cmp_rd_rs2_b26_str) +80003ddc: 00032203 lw x4,0(x6) +80003de0: 01a20863 beq x4,x26,80003df0 +80003de4: 71c012ef jal x5,80005500 +80003de8: 80003dd8 .word 0x80003dd8 +80003dec: 8000f2a2 .word 0x8000f2a2 +80003df0: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0xd59b72ef +80003df4: 000fa583 lw x11,0(x31) +80003df8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xafa887d1 +80003dfc: 000fad83 lw x27,0(x31) +80003e00: 004f8f93 addi x31,x31,4 + +80003e04 : +Zbkc_clmulh_cg_cmp_rd_rs2_b27: + clmulh x27, x11, x27 # perform operation +80003e04: 0bb5bdb3 clmulh x27,x11,x27 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkc_clmulh_cg_cmp_rd_rs2_b27, Zbkc_clmulh_cg_cmp_rd_rs2_b27_str) +80003e08: 00032203 lw x4,0(x6) +80003e0c: 01b20863 beq x4,x27,80003e1c +80003e10: 6f0012ef jal x5,80005500 +80003e14: 80003e04 .word 0x80003e04 +80003e18: 8000f2dc .word 0x8000f2dc +80003e1c: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xe78a93f5 +80003e20: 000fac83 lw x25,0(x31) +80003e24: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0xdcf4fcf8 +80003e28: 000fae03 lw x28,0(x31) +80003e2c: 004f8f93 addi x31,x31,4 + +80003e30 : +Zbkc_clmulh_cg_cmp_rd_rs2_b28: + clmulh x28, x25, x28 # perform operation +80003e30: 0bccbe33 clmulh x28,x25,x28 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkc_clmulh_cg_cmp_rd_rs2_b28, Zbkc_clmulh_cg_cmp_rd_rs2_b28_str) +80003e34: 00032203 lw x4,0(x6) +80003e38: 01c20863 beq x4,x28,80003e48 +80003e3c: 6c4012ef jal x5,80005500 +80003e40: 80003e30 .word 0x80003e30 +80003e44: 8000f316 .word 0x8000f316 +80003e48: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xd27a67b3 +80003e4c: 000faa03 lw x20,0(x31) +80003e50: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xf73e83da +80003e54: 000fae83 lw x29,0(x31) +80003e58: 004f8f93 addi x31,x31,4 + +80003e5c : +Zbkc_clmulh_cg_cmp_rd_rs2_b29: + clmulh x29, x20, x29 # perform operation +80003e5c: 0bda3eb3 clmulh x29,x20,x29 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkc_clmulh_cg_cmp_rd_rs2_b29, Zbkc_clmulh_cg_cmp_rd_rs2_b29_str) +80003e60: 00032203 lw x4,0(x6) +80003e64: 01d20863 beq x4,x29,80003e74 +80003e68: 698012ef jal x5,80005500 +80003e6c: 80003e5c .word 0x80003e5c +80003e70: 8000f350 .word 0x8000f350 +80003e74: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xb220ba0f +80003e78: 000fac83 lw x25,0(x31) +80003e7c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x1e8f556d +80003e80: 000faf03 lw x30,0(x31) +80003e84: 004f8f93 addi x31,x31,4 + +80003e88 : +Zbkc_clmulh_cg_cmp_rd_rs2_b30: + clmulh x30, x25, x30 # perform operation +80003e88: 0becbf33 clmulh x30,x25,x30 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkc_clmulh_cg_cmp_rd_rs2_b30, Zbkc_clmulh_cg_cmp_rd_rs2_b30_str) +80003e8c: 00032203 lw x4,0(x6) +80003e90: 01e20863 beq x4,x30,80003ea0 +80003e94: 66c012ef jal x5,80005500 +80003e98: 80003e88 .word 0x80003e88 +80003e9c: 8000f38a .word 0x8000f38a +80003ea0: 00430313 addi x6,x6,4 + + mv x26, x31 # switch data pointer register to avoid conflict with test +80003ea4: 000f8d13 addi x26,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x77573ee4 +80003ea8: 000d2483 lw x9,0(x26) +80003eac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x83941930 +80003eb0: 000d2f83 lw x31,0(x26) +80003eb4: 004d0d13 addi x26,x26,4 + +80003eb8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b31: + clmulh x31, x9, x31 # perform operation +80003eb8: 0bf4bfb3 clmulh x31,x9,x31 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkc_clmulh_cg_cmp_rd_rs2_b31, Zbkc_clmulh_cg_cmp_rd_rs2_b31_str) +80003ebc: 00032203 lw x4,0(x6) +80003ec0: 01f20863 beq x4,x31,80003ed0 +80003ec4: 63c012ef jal x5,80005500 +80003ec8: 80003eb8 .word 0x80003eb8 +80003ecc: 8000f3c4 .word 0x8000f3c4 +80003ed0: 00430313 addi x6,x6,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0xf592b8e1 +80003ed4: 000d2003 lw x0,0(x26) +80003ed8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0x6ef64623 +80003edc: 000d2003 lw x0,0(x26) +80003ee0: 004d0d13 addi x26,x26,4 + +80003ee4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0: + clmulh x0, x0, x0 # perform operation +80003ee4: 0a003033 clmulh x0,x0,x0 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0_str) +80003ee8: 00032203 lw x4,0(x6) +80003eec: 00020863 beq x4,x0,80003efc +80003ef0: 610012ef jal x5,80005500 +80003ef4: 80003ee4 .word 0x80003ee4 +80003ef8: 8000f3fe .word 0x8000f3fe +80003efc: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x8fbcdf15 +80003f00: 000d2083 lw x1,0(x26) +80003f04: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x1ea1433d +80003f08: 000d2083 lw x1,0(x26) +80003f0c: 004d0d13 addi x26,x26,4 + +80003f10 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1: + clmulh x1, x1, x1 # perform operation +80003f10: 0a10b0b3 clmulh x1,x1,x1 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1_str) +80003f14: 00032203 lw x4,0(x6) +80003f18: 00120863 beq x4,x1,80003f28 +80003f1c: 5e4012ef jal x5,80005500 +80003f20: 80003f10 .word 0x80003f10 +80003f24: 8000f43b .word 0x8000f43b +80003f28: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x136041e1 +80003f2c: 000d2103 lw x2,0(x26) +80003f30: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xb1e82bb9 +80003f34: 000d2103 lw x2,0(x26) +80003f38: 004d0d13 addi x26,x26,4 + +80003f3c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2: + clmulh x2, x2, x2 # perform operation +80003f3c: 0a213133 clmulh x2,x2,x2 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2_str) +80003f40: 00032203 lw x4,0(x6) +80003f44: 00220863 beq x4,x2,80003f54 +80003f48: 5b8012ef jal x5,80005500 +80003f4c: 80003f3c .word 0x80003f3c +80003f50: 8000f478 .word 0x8000f478 +80003f54: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x4c0a05f5 +80003f58: 000d2183 lw x3,0(x26) +80003f5c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x75353c87 +80003f60: 000d2183 lw x3,0(x26) +80003f64: 004d0d13 addi x26,x26,4 + +80003f68 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3: + clmulh x3, x3, x3 # perform operation +80003f68: 0a31b1b3 clmulh x3,x3,x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3_str) +80003f6c: 00032203 lw x4,0(x6) +80003f70: 00320863 beq x4,x3,80003f80 +80003f74: 58c012ef jal x5,80005500 +80003f78: 80003f68 .word 0x80003f68 +80003f7c: 8000f4b5 .word 0x8000f4b5 +80003f80: 00430313 addi x6,x6,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f84: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f88: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xc663c8e7 +80003f8c: 000d2203 lw x4,0(x26) +80003f90: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x06c3e529 +80003f94: 000d2203 lw x4,0(x26) +80003f98: 004d0d13 addi x26,x26,4 + +80003f9c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4: + clmulh x4, x4, x4 # perform operation +80003f9c: 0a423233 clmulh x4,x4,x4 + # Check if x4 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x4, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4_str) +80003fa0: 00032683 lw x13,0(x6) +80003fa4: 00468863 beq x13,x4,80003fb4 +80003fa8: 5980176f jal x14,80005540 +80003fac: 80003f9c .word 0x80003f9c +80003fb0: 8000f4f2 .word 0x8000f4f2 +80003fb4: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xf4e9a8b4 +80003fb8: 000d2283 lw x5,0(x26) +80003fbc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0xb276a840 +80003fc0: 000d2283 lw x5,0(x26) +80003fc4: 004d0d13 addi x26,x26,4 + +80003fc8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5: + clmulh x5, x5, x5 # perform operation +80003fc8: 0a52b2b3 clmulh x5,x5,x5 + # Check if x5 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x5, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5_str) +80003fcc: 00032683 lw x13,0(x6) +80003fd0: 00568863 beq x13,x5,80003fe0 +80003fd4: 56c0176f jal x14,80005540 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 8000f52f .word 0x8000f52f +80003fe0: 00430313 addi x6,x6,4 + + mv x20, x6 # switch signature pointer register to avoid conflict with test +80003fe4: 00030a13 addi x20,x6,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xd9700b9f +80003fe8: 000d2303 lw x6,0(x26) +80003fec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xc09226a8 +80003ff0: 000d2303 lw x6,0(x26) +80003ff4: 004d0d13 addi x26,x26,4 + +80003ff8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6: + clmulh x6, x6, x6 # perform operation +80003ff8: 0a633333 clmulh x6,x6,x6 + # Check if x6 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x6, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6_str) +80003ffc: 000a2683 lw x13,0(x20) +80004000: 00668863 beq x13,x6,80004010 +80004004: 53c0176f jal x14,80005540 +80004008: 80003ff8 .word 0x80003ff8 +8000400c: 8000f56c .word 0x8000f56c +80004010: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x7d163ef3 +80004014: 000d2383 lw x7,0(x26) +80004018: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xf3d6ef62 +8000401c: 000d2383 lw x7,0(x26) +80004020: 004d0d13 addi x26,x26,4 + +80004024 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7: + clmulh x7, x7, x7 # perform operation +80004024: 0a73b3b3 clmulh x7,x7,x7 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7_str) +80004028: 000a2683 lw x13,0(x20) +8000402c: 00768863 beq x13,x7,8000403c +80004030: 5100176f jal x14,80005540 +80004034: 80004024 .word 0x80004024 +80004038: 8000f5a9 .word 0x8000f5a9 +8000403c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xc8eb7d26 +80004040: 000d2403 lw x8,0(x26) +80004044: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xd6ecd28c +80004048: 000d2403 lw x8,0(x26) +8000404c: 004d0d13 addi x26,x26,4 + +80004050 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8: + clmulh x8, x8, x8 # perform operation +80004050: 0a843433 clmulh x8,x8,x8 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8_str) +80004054: 000a2683 lw x13,0(x20) +80004058: 00868863 beq x13,x8,80004068 +8000405c: 4e40176f jal x14,80005540 +80004060: 80004050 .word 0x80004050 +80004064: 8000f5e6 .word 0x8000f5e6 +80004068: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xd7398cdc +8000406c: 000d2483 lw x9,0(x26) +80004070: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x218f12c2 +80004074: 000d2483 lw x9,0(x26) +80004078: 004d0d13 addi x26,x26,4 + +8000407c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9: + clmulh x9, x9, x9 # perform operation +8000407c: 0a94b4b3 clmulh x9,x9,x9 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9_str) +80004080: 000a2683 lw x13,0(x20) +80004084: 00968863 beq x13,x9,80004094 +80004088: 4b80176f jal x14,80005540 +8000408c: 8000407c .word 0x8000407c +80004090: 8000f623 .word 0x8000f623 +80004094: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x170d8226 +80004098: 000d2503 lw x10,0(x26) +8000409c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xb36bd978 +800040a0: 000d2503 lw x10,0(x26) +800040a4: 004d0d13 addi x26,x26,4 + +800040a8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10: + clmulh x10, x10, x10 # perform operation +800040a8: 0aa53533 clmulh x10,x10,x10 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10_str) +800040ac: 000a2683 lw x13,0(x20) +800040b0: 00a68863 beq x13,x10,800040c0 +800040b4: 48c0176f jal x14,80005540 +800040b8: 800040a8 .word 0x800040a8 +800040bc: 8000f660 .word 0x8000f660 +800040c0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x23574b29 +800040c4: 000d2583 lw x11,0(x26) +800040c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x72e266dd +800040cc: 000d2583 lw x11,0(x26) +800040d0: 004d0d13 addi x26,x26,4 + +800040d4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11: + clmulh x11, x11, x11 # perform operation +800040d4: 0ab5b5b3 clmulh x11,x11,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11_str) +800040d8: 000a2683 lw x13,0(x20) +800040dc: 00b68863 beq x13,x11,800040ec +800040e0: 4600176f jal x14,80005540 +800040e4: 800040d4 .word 0x800040d4 +800040e8: 8000f69e .word 0x8000f69e +800040ec: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xd7d486ae +800040f0: 000d2603 lw x12,0(x26) +800040f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x717ea983 +800040f8: 000d2603 lw x12,0(x26) +800040fc: 004d0d13 addi x26,x26,4 + +80004100 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12: + clmulh x12, x12, x12 # perform operation +80004100: 0ac63633 clmulh x12,x12,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12_str) +80004104: 000a2683 lw x13,0(x20) +80004108: 00c68863 beq x13,x12,80004118 +8000410c: 4340176f jal x14,80005540 +80004110: 80004100 .word 0x80004100 +80004114: 8000f6dc .word 0x8000f6dc +80004118: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000411c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80004120: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xa03e3d47 +80004124: 000d2683 lw x13,0(x26) +80004128: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x17b4a35a +8000412c: 000d2683 lw x13,0(x26) +80004130: 004d0d13 addi x26,x26,4 + +80004134 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13: + clmulh x13, x13, x13 # perform operation +80004134: 0ad6b6b3 clmulh x13,x13,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13_str) +80004138: 000a2203 lw x4,0(x20) +8000413c: 00d20863 beq x4,x13,8000414c +80004140: 3c0012ef jal x5,80005500 +80004144: 80004134 .word 0x80004134 +80004148: 8000f71a .word 0x8000f71a +8000414c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x0cde58df +80004150: 000d2703 lw x14,0(x26) +80004154: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x2fd421db +80004158: 000d2703 lw x14,0(x26) +8000415c: 004d0d13 addi x26,x26,4 + +80004160 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14: + clmulh x14, x14, x14 # perform operation +80004160: 0ae73733 clmulh x14,x14,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14_str) +80004164: 000a2203 lw x4,0(x20) +80004168: 00e20863 beq x4,x14,80004178 +8000416c: 394012ef jal x5,80005500 +80004170: 80004160 .word 0x80004160 +80004174: 8000f758 .word 0x8000f758 +80004178: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x7116bb25 +8000417c: 000d2783 lw x15,0(x26) +80004180: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x0f4a2992 +80004184: 000d2783 lw x15,0(x26) +80004188: 004d0d13 addi x26,x26,4 + +8000418c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15: + clmulh x15, x15, x15 # perform operation +8000418c: 0af7b7b3 clmulh x15,x15,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15_str) +80004190: 000a2203 lw x4,0(x20) +80004194: 00f20863 beq x4,x15,800041a4 +80004198: 368012ef jal x5,80005500 +8000419c: 8000418c .word 0x8000418c +800041a0: 8000f796 .word 0x8000f796 +800041a4: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xe9bdb834 +800041a8: 000d2803 lw x16,0(x26) +800041ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xe33382f2 +800041b0: 000d2803 lw x16,0(x26) +800041b4: 004d0d13 addi x26,x26,4 + +800041b8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16: + clmulh x16, x16, x16 # perform operation +800041b8: 0b083833 clmulh x16,x16,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16_str) +800041bc: 000a2203 lw x4,0(x20) +800041c0: 01020863 beq x4,x16,800041d0 +800041c4: 33c012ef jal x5,80005500 +800041c8: 800041b8 .word 0x800041b8 +800041cc: 8000f7d4 .word 0x8000f7d4 +800041d0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xef78b870 +800041d4: 000d2883 lw x17,0(x26) +800041d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x44b5a211 +800041dc: 000d2883 lw x17,0(x26) +800041e0: 004d0d13 addi x26,x26,4 + +800041e4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17: + clmulh x17, x17, x17 # perform operation +800041e4: 0b18b8b3 clmulh x17,x17,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17_str) +800041e8: 000a2203 lw x4,0(x20) +800041ec: 01120863 beq x4,x17,800041fc +800041f0: 310012ef jal x5,80005500 +800041f4: 800041e4 .word 0x800041e4 +800041f8: 8000f812 .word 0x8000f812 +800041fc: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x4747be3a +80004200: 000d2903 lw x18,0(x26) +80004204: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xb1fa5cef +80004208: 000d2903 lw x18,0(x26) +8000420c: 004d0d13 addi x26,x26,4 + +80004210 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18: + clmulh x18, x18, x18 # perform operation +80004210: 0b293933 clmulh x18,x18,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18_str) +80004214: 000a2203 lw x4,0(x20) +80004218: 01220863 beq x4,x18,80004228 +8000421c: 2e4012ef jal x5,80005500 +80004220: 80004210 .word 0x80004210 +80004224: 8000f850 .word 0x8000f850 +80004228: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xc3bd78d5 +8000422c: 000d2983 lw x19,0(x26) +80004230: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x6eb71d95 +80004234: 000d2983 lw x19,0(x26) +80004238: 004d0d13 addi x26,x26,4 + +8000423c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19: + clmulh x19, x19, x19 # perform operation +8000423c: 0b39b9b3 clmulh x19,x19,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19_str) +80004240: 000a2203 lw x4,0(x20) +80004244: 01320863 beq x4,x19,80004254 +80004248: 2b8012ef jal x5,80005500 +8000424c: 8000423c .word 0x8000423c +80004250: 8000f88e .word 0x8000f88e +80004254: 004a0a13 addi x20,x20,4 + + mv x22, x20 # switch signature pointer register to avoid conflict with test +80004258: 000a0b13 addi x22,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x021c023e +8000425c: 000d2a03 lw x20,0(x26) +80004260: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x202155de +80004264: 000d2a03 lw x20,0(x26) +80004268: 004d0d13 addi x26,x26,4 + +8000426c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20: + clmulh x20, x20, x20 # perform operation +8000426c: 0b4a3a33 clmulh x20,x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20_str) +80004270: 000b2203 lw x4,0(x22) +80004274: 01420863 beq x4,x20,80004284 +80004278: 288012ef jal x5,80005500 +8000427c: 8000426c .word 0x8000426c +80004280: 8000f8cc .word 0x8000f8cc +80004284: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x71c49a04 +80004288: 000d2a83 lw x21,0(x26) +8000428c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x2b62faaa +80004290: 000d2a83 lw x21,0(x26) +80004294: 004d0d13 addi x26,x26,4 + +80004298 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21: + clmulh x21, x21, x21 # perform operation +80004298: 0b5abab3 clmulh x21,x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21_str) +8000429c: 000b2203 lw x4,0(x22) +800042a0: 01520863 beq x4,x21,800042b0 +800042a4: 25c012ef jal x5,80005500 +800042a8: 80004298 .word 0x80004298 +800042ac: 8000f90a .word 0x8000f90a +800042b0: 004b0b13 addi x22,x22,4 + + mv x16, x22 # switch signature pointer register to avoid conflict with test +800042b4: 000b0813 addi x16,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xbfaffb2c +800042b8: 000d2b03 lw x22,0(x26) +800042bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xd5ef8070 +800042c0: 000d2b03 lw x22,0(x26) +800042c4: 004d0d13 addi x26,x26,4 + +800042c8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22: + clmulh x22, x22, x22 # perform operation +800042c8: 0b6b3b33 clmulh x22,x22,x22 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22_str) +800042cc: 00082203 lw x4,0(x16) +800042d0: 01620863 beq x4,x22,800042e0 +800042d4: 22c012ef jal x5,80005500 +800042d8: 800042c8 .word 0x800042c8 +800042dc: 8000f948 .word 0x8000f948 +800042e0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xa5aa059e +800042e4: 000d2b83 lw x23,0(x26) +800042e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x94e79d9d +800042ec: 000d2b83 lw x23,0(x26) +800042f0: 004d0d13 addi x26,x26,4 + +800042f4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23: + clmulh x23, x23, x23 # perform operation +800042f4: 0b7bbbb3 clmulh x23,x23,x23 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23_str) +800042f8: 00082203 lw x4,0(x16) +800042fc: 01720863 beq x4,x23,8000430c +80004300: 200012ef jal x5,80005500 +80004304: 800042f4 .word 0x800042f4 +80004308: 8000f986 .word 0x8000f986 +8000430c: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xf51ed681 +80004310: 000d2c03 lw x24,0(x26) +80004314: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xd36c99f3 +80004318: 000d2c03 lw x24,0(x26) +8000431c: 004d0d13 addi x26,x26,4 + +80004320 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24: + clmulh x24, x24, x24 # perform operation +80004320: 0b8c3c33 clmulh x24,x24,x24 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24_str) +80004324: 00082203 lw x4,0(x16) +80004328: 01820863 beq x4,x24,80004338 +8000432c: 1d4012ef jal x5,80005500 +80004330: 80004320 .word 0x80004320 +80004334: 8000f9c4 .word 0x8000f9c4 +80004338: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xdc8e6baa +8000433c: 000d2c83 lw x25,0(x26) +80004340: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x497fad7b +80004344: 000d2c83 lw x25,0(x26) +80004348: 004d0d13 addi x26,x26,4 + +8000434c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25: + clmulh x25, x25, x25 # perform operation +8000434c: 0b9cbcb3 clmulh x25,x25,x25 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25_str) +80004350: 00082203 lw x4,0(x16) +80004354: 01920863 beq x4,x25,80004364 +80004358: 1a8012ef jal x5,80005500 +8000435c: 8000434c .word 0x8000434c +80004360: 8000fa02 .word 0x8000fa02 +80004364: 00480813 addi x16,x16,4 + + mv x2, x26 # switch data pointer register to avoid conflict with test +80004368: 000d0113 addi x2,x26,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x8b9375dd +8000436c: 00012d03 lw x26,0(x2) +80004370: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0c1ff2ec +80004374: 00012d03 lw x26,0(x2) +80004378: 00410113 addi x2,x2,4 + +8000437c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26: + clmulh x26, x26, x26 # perform operation +8000437c: 0bad3d33 clmulh x26,x26,x26 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26_str) +80004380: 00082203 lw x4,0(x16) +80004384: 01a20863 beq x4,x26,80004394 +80004388: 178012ef jal x5,80005500 +8000438c: 8000437c .word 0x8000437c +80004390: 8000fa40 .word 0x8000fa40 +80004394: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xcd076399 +80004398: 00012d83 lw x27,0(x2) +8000439c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x955502c7 +800043a0: 00012d83 lw x27,0(x2) +800043a4: 00410113 addi x2,x2,4 + +800043a8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27: + clmulh x27, x27, x27 # perform operation +800043a8: 0bbdbdb3 clmulh x27,x27,x27 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27_str) +800043ac: 00082203 lw x4,0(x16) +800043b0: 01b20863 beq x4,x27,800043c0 +800043b4: 14c012ef jal x5,80005500 +800043b8: 800043a8 .word 0x800043a8 +800043bc: 8000fa7e .word 0x8000fa7e +800043c0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x5f4470c0 +800043c4: 00012e03 lw x28,0(x2) +800043c8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x40a85892 +800043cc: 00012e03 lw x28,0(x2) +800043d0: 00410113 addi x2,x2,4 + +800043d4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28: + clmulh x28, x28, x28 # perform operation +800043d4: 0bce3e33 clmulh x28,x28,x28 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28_str) +800043d8: 00082203 lw x4,0(x16) +800043dc: 01c20863 beq x4,x28,800043ec +800043e0: 120012ef jal x5,80005500 +800043e4: 800043d4 .word 0x800043d4 +800043e8: 8000fabc .word 0x8000fabc +800043ec: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xe28b50df +800043f0: 00012e83 lw x29,0(x2) +800043f4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x2548b361 +800043f8: 00012e83 lw x29,0(x2) +800043fc: 00410113 addi x2,x2,4 + +80004400 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29: + clmulh x29, x29, x29 # perform operation +80004400: 0bdebeb3 clmulh x29,x29,x29 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29_str) +80004404: 00082203 lw x4,0(x16) +80004408: 01d20863 beq x4,x29,80004418 +8000440c: 0f4012ef jal x5,80005500 +80004410: 80004400 .word 0x80004400 +80004414: 8000fafa .word 0x8000fafa +80004418: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x942ba359 +8000441c: 00012f03 lw x30,0(x2) +80004420: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xc5eb96da +80004424: 00012f03 lw x30,0(x2) +80004428: 00410113 addi x2,x2,4 + +8000442c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30: + clmulh x30, x30, x30 # perform operation +8000442c: 0bef3f33 clmulh x30,x30,x30 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30_str) +80004430: 00082203 lw x4,0(x16) +80004434: 01e20863 beq x4,x30,80004444 +80004438: 0c8012ef jal x5,80005500 +8000443c: 8000442c .word 0x8000442c +80004440: 8000fb38 .word 0x8000fb38 +80004444: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x72216ea8 +80004448: 00012f83 lw x31,0(x2) +8000444c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xab80d374 +80004450: 00012f83 lw x31,0(x2) +80004454: 00410113 addi x2,x2,4 + +80004458 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31: + clmulh x31, x31, x31 # perform operation +80004458: 0bffbfb3 clmulh x31,x31,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31_str) +8000445c: 00082203 lw x4,0(x16) +80004460: 01f20863 beq x4,x31,80004470 +80004464: 09c012ef jal x5,80005500 +80004468: 80004458 .word 0x80004458 +8000446c: 8000fb76 .word 0x8000fb76 +80004470: 00480813 addi x16,x16,4 + + mv x2, x16 # restore signature pointer to default register for teardown +80004474: 00080113 addi x2,x16,0 + +80004478 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004478: 00000513 addi x10,x0,0 +8000447c: 00000073 ecall +80004480: fff00513 addi x10,x0,-1 +80004484: 1d800413 addi x8,x0,472 + +80004488 : +80004488: 34002373 csrrs x6,mscratch,x0 + +8000448c : +8000448c: 23832383 lw x7,568(x6) +80004490: 23c32483 lw x9,572(x6) + +80004494 : +80004494: 22032383 lw x7,544(x6) + +80004498 : +80004498: 25032483 lw x9,592(x6) +8000449c: 34049073 csrrw x0,mscratch,x9 + +800044a0 : +800044a0: 24832483 lw x9,584(x6) +800044a4: 305493f3 csrrw x7,mtvec,x9 +800044a8: ffc4f493 andi x9,x9,-4 +800044ac: ffc3f393 andi x7,x7,-4 +800044b0: 00749e63 bne x9,x7,800044cc + +800044b4 : +800044b4: 00030493 addi x9,x6,0 + +800044b8 : +800044b8: 0004a783 lw x15,0(x9) +800044bc: 00f3a023 sw x15,0(x7) +800044c0: 00438393 addi x7,x7,4 +800044c4: 00448493 addi x9,x9,4 +800044c8: fe83c8e3 blt x7,x8,800044b8 +800044cc: 0000100f fence.i + +800044d0 : +800044d0: 00000013 addi x0,x0,0 +800044d4: 00000013 addi x0,x0,0 +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: d2050513 addi x10,x10,-736 # 80010240 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: d1b50513 addi x10,x10,-741 # 8001027b +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: d3b50513 addi x10,x10,-709 # 800102db +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 8a650513 addi x10,x10,-1882 # 80010e86 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 90838393 addi x7,x7,-1784 # 80011f68 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 8c040413 addi x8,x8,-1856 # 80011f60 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8001042f .word 0x8001042f + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8001029d .word 0x8001029d +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: b0450513 addi x10,x10,-1276 # 80010204 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: b0050513 addi x10,x10,-1280 # 80010240 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: cd9ff06f jal x0,80004478 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: ccdff06f jal x0,80004478 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7030313 addi x6,x6,-1168 # 800044d0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: d7d50513 addi x10,x10,-643 # 800118bd +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: 1a850513 addi x10,x10,424 # 8000fd28 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 78450513 addi x10,x10,1924 # 80010344 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 64050513 addi x10,x10,1600 # 80010240 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: d2848493 addi x9,x9,-728 # 8000fd08 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 9ac40413 addi x8,x8,-1620 # 800209cc +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010446 .word 0x80010446 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010548 .word 0x80010548 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010643 .word 0x80010643 +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010736 .word 0x80010736 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 800108a9 .word 0x800108a9 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 6c020213 addi x4,x4,1728 # 8000fbc0 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 6a838393 addi x7,x7,1704 # 8000fbc0 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 68068693 addi x13,x13,1664 # 8000fbc0 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 65848493 addi x9,x9,1624 # 8000fbc0 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 5b44a483 lw x9,1460(x9) # 8000fbc0 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: 25040413 addi x8,x8,592 # 80011910 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: 2d040413 addi x8,x8,720 # 800209d0 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 5a848493 addi x9,x9,1448 # 8000fce8 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 56848493 addi x9,x9,1384 # 8000fce8 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 54880813 addi x16,x16,1352 # 8000fcf8 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 53480813 addi x16,x16,1332 # 8000fcf8 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: c5f38393 addi x7,x7,-929 # 8001042f +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 51080813 addi x16,x16,1296 # 8000fcf0 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: c5a38393 addi x7,x7,-934 # 80010446 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: d4438393 addi x7,x7,-700 # 80010548 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: e2738393 addi x7,x7,-473 # 80010643 +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: f0238393 addi x7,x7,-254 # 80010736 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: 05d38393 addi x7,x7,93 # 800108a9 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: fc938393 addi x7,x7,-55 # 8001082d +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: fef38393 addi x7,x7,-17 # 8001086b +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: bf238393 addi x7,x7,-1038 # 80010486 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: cda38393 addi x7,x7,-806 # 80010586 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: dbb38393 addi x7,x7,-581 # 8001067f +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: e9738393 addi x7,x7,-361 # 80010773 +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: ff038393 addi x7,x7,-16 # 800108e4 +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: bba38393 addi x7,x7,-1094 # 800104c6 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: ca038393 addi x7,x7,-864 # 800105c4 +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: d7f38393 addi x7,x7,-641 # 800106bb +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: e5c38393 addi x7,x7,-420 # 800107b0 +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: fb338393 addi x7,x7,-77 # 8001091f +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: b8338393 addi x7,x7,-1149 # 80010507 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: c6738393 addi x7,x7,-921 # 80010603 +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: d4438393 addi x7,x7,-700 # 800106f8 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: e2238393 addi x7,x7,-478 # 800107ee +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: f7738393 addi x7,x7,-137 # 8001095b +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: f9c38393 addi x7,x7,-100 # 80010998 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: fd338393 addi x7,x7,-45 # 800109e7 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: 0b638393 addi x7,x7,182 # 80010ae2 +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: 19a38393 addi x7,x7,410 # 80010bde +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: 28c80813 addi x16,x16,652 # 8000fcf0 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: 27c80813 addi x16,x16,636 # 8000fcf0 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: 27480813 addi x16,x16,628 # 8000fcf4 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: 26080813 addi x16,x16,608 # 8000fcf0 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 76050513 addi x10,x10,1888 # 80010240 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 75b50513 addi x10,x10,1883 # 8001027b +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 7d250513 addi x10,x10,2002 # 80010332 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: 15852503 lw x10,344(x10) # 8000fce0 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 7a450513 addi x10,x10,1956 # 80010344 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: ff852503 lw x10,-8(x10) # 8000fbc0 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 76650513 addi x10,x10,1894 # 80010346 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: 0b852503 lw x10,184(x10) # 8000fcc0 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: 0e850513 addi x10,x10,232 # 8000fd28 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 6da50513 addi x10,x10,1754 # 8001035a +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 02052503 lw x10,32(x10) # 8000fcc8 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 06850513 addi x10,x10,104 # 8000fd28 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: 09150513 addi x10,x10,145 # 80010d91 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: e9852503 lw x10,-360(x10) # 8000fbc0 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: fe860613 addi x12,x12,-24 # 8000fd28 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: f5c52503 lw x10,-164(x10) # 8000fcc4 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: 10750513 addi x10,x10,263 # 80010ea7 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: f4860613 addi x12,x12,-184 # 8000fd28 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: ebc52503 lw x10,-324(x10) # 8000fcc4 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: f0860613 addi x12,x12,-248 # 8000fd28 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: e7c52503 lw x10,-388(x10) # 8000fcc4 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: f2a50513 addi x10,x10,-214 # 80010d8a +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: e8850513 addi x10,x10,-376 # 8000fd28 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: ec250513 addi x10,x10,-318 # 80010da2 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: cb852503 lw x10,-840(x10) # 8000fbc0 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: db852503 lw x10,-584(x10) # 8000fcd0 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: da452503 lw x10,-604(x10) # 8000fcd0 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: de850513 addi x10,x10,-536 # 8000fd28 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: d8052503 lw x10,-640(x10) # 8000fce8 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: e3950513 addi x10,x10,-455 # 80010db9 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: c1852503 lw x10,-1000(x10) # 8000fbc0 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: d2052503 lw x10,-736(x10) # 8000fcd8 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: d0c52503 lw x10,-756(x10) # 8000fcd8 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: d4850513 addi x10,x10,-696 # 8000fd28 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: db050513 addi x10,x10,-592 # 80010dd0 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 0000a517 auipc x10,0xa +8000604c: c9052503 lw x10,-880(x10) # 8000fcd8 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: cc850513 addi x10,x10,-824 # 8000fd28 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: d8e50513 addi x10,x10,-626 # 80010e2e +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 0000a517 auipc x10,0xa +800060cc: c1052503 lw x10,-1008(x10) # 8000fcd8 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: c4850513 addi x10,x10,-952 # 8000fd28 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: be442403 lw x8,-1052(x8) # 8000fcf0 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: db350513 addi x10,x10,-589 # 80010ed3 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: d9f50513 addi x10,x10,-609 # 80010eff +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 0000a817 auipc x16,0xa +8000618c: b7080813 addi x16,x16,-1168 # 8000fcf8 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: 1a450513 addi x10,x10,420 # 80010344 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: d2f50513 addi x10,x10,-721 # 80010f0f +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 0000a517 auipc x10,0xa +8000620c: ad052503 lw x10,-1328(x10) # 8000fcd8 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: b0850513 addi x10,x10,-1272 # 8000fd28 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: cda50513 addi x10,x10,-806 # 80010f3a +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 0000a517 auipc x10,0xa +8000628c: a4852503 lw x10,-1464(x10) # 8000fcd0 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: a8850513 addi x10,x10,-1400 # 8000fd28 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 0000a317 auipc x6,0xa +800062cc: a0832303 lw x6,-1528(x6) # 8000fcd0 +800062d0: 0000a397 auipc x7,0xa +800062d4: a083a383 lw x7,-1528(x7) # 8000fcd8 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: c8950513 addi x10,x10,-887 # 80010f69 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: cb150513 addi x10,x10,-847 # 80010fd1 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 0000a317 auipc x6,0xa +8000634c: 98832303 lw x6,-1656(x6) # 8000fcd0 +80006350: 0000a397 auipc x7,0xa +80006354: 9883a383 lw x7,-1656(x7) # 8000fcd8 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 9a850513 addi x10,x10,-1624 # 8000fd28 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: c3850513 addi x10,x10,-968 # 80010ff8 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: b9550513 addi x10,x10,-1131 # 80010f95 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: b9150513 addi x10,x10,-1135 # 80010fd1 +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 0000a317 auipc x6,0xa +8000646c: 87032303 lw x6,-1936(x6) # 8000fcd8 +80006470: 0000a397 auipc x7,0xa +80006474: 8603a383 lw x7,-1952(x7) # 8000fcd0 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 88850513 addi x10,x10,-1912 # 8000fd28 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: c0050513 addi x10,x10,-1024 # 800110e0 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: ca750513 addi x10,x10,-857 # 800111c7 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 7ac52503 lw x10,1964(x10) # 8000fcf4 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: c8350513 addi x10,x10,-893 # 80011203 +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: c2150513 addi x10,x10,-991 # 800111e1 +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: be950513 addi x10,x10,-1047 # 800111e9 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: bb150513 addi x10,x10,-1103 # 800111f1 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: b7a50513 addi x10,x10,-1158 # 800111fa +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: b4c50513 addi x10,x10,-1204 # 8001120c +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 60852503 lw x10,1544(x10) # 8000fcf0 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: c2350513 addi x10,x10,-989 # 80011363 +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: aa650513 addi x10,x10,-1370 # 80011226 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: a9750513 addi x10,x10,-1385 # 80011257 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: a7750513 addi x10,x10,-1417 # 80011277 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: a5550513 addi x10,x10,-1451 # 80011295 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: a3450513 addi x10,x10,-1484 # 800112b4 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: a1c50513 addi x10,x10,-1508 # 800112dc +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: a0850513 addi x10,x10,-1528 # 80011308 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 9f450513 addi x10,x10,-1548 # 80011334 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 9f250513 addi x10,x10,-1550 # 80011372 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: 33052503 lw x10,816(x10) # 8000fcd8 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: 36850513 addi x10,x10,872 # 8000fd28 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 98950513 addi x10,x10,-1655 # 80011389 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: 2a852503 lw x10,680(x10) # 8000fcd0 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: 2e850513 addi x10,x10,744 # 8000fd28 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: 28852503 lw x10,648(x10) # 8000fcf0 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 92050513 addi x10,x10,-1760 # 800113a0 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: 23052503 lw x10,560(x10) # 8000fcd8 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 8f750513 addi x10,x10,-1801 # 800113b7 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: 1e852503 lw x10,488(x10) # 8000fcd0 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: 1ec52503 lw x10,492(x10) # 8000fcf0 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 90d50513 addi x10,x10,-1779 # 8001142d +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 9a350513 addi x10,x10,-1629 # 80011503 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: a5650513 addi x10,x10,-1450 # 800115f6 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: b1150513 addi x10,x10,-1263 # 800116f1 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: bb850513 addi x10,x10,-1096 # 800117d8 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 78550513 addi x10,x10,1925 # 800113e5 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: 08062603 lw x12,128(x12) # 8000fd08 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 72e50513 addi x10,x10,1838 # 800103ce +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 02850513 addi x10,x10,40 # 8000fd28 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 01058593 addi x11,x11,16 # 8000fd50 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 04458593 addi x11,x11,68 # 8000fdb0 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: 44e50513 addi x10,x10,1102 # 800101ee +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: 0a650513 addi x10,x10,166 # 80010e86 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: ef060613 addi x12,x12,-272 # 8000fd00 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 5cf50513 addi x10,x10,1487 # 800103ef +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: ec052503 lw x10,-320(x10) # 8000fd08 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: ec850513 addi x10,x10,-312 # 8000fd28 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 55f50513 addi x10,x10,1375 # 800103ff +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: e4852503 lw x10,-440(x10) # 8000fd10 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: e4850513 addi x10,x10,-440 # 8000fd28 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 4ef50513 addi x10,x10,1263 # 8001040f +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: dd052503 lw x10,-560(x10) # 8000fd18 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: dc850513 addi x10,x10,-568 # 8000fd28 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 47f50513 addi x10,x10,1151 # 8001041f +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: d5852503 lw x10,-680(x10) # 8000fd20 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: d4850513 addi x10,x10,-696 # 8000fd28 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: cf860613 addi x12,x12,-776 # 8000fd00 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: d0860613 addi x12,x12,-760 # 8000fd28 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3dc30313 addi x6,x6,988 # 80004478 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3c430313 addi x6,x6,964 # 80004478 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3ac30313 addi x6,x6,940 # 80004478 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 24878793 addi x15,x15,584 # 80004488 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 47010113 addi x2,x2,1136 # 80011910 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010eaf .word 0x80010eaf +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 45828293 addi x5,x5,1112 # 80020a00 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 43828293 addi x5,x5,1080 # 80020a00 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkx-xperm4-00.elf.objdump b/riscv-tests/rv32-Zbkx-xperm4-00.elf.objdump new file mode 100644 index 0000000..5af8a5e --- /dev/null +++ b/riscv-tests/rv32-Zbkx-xperm4-00.elf.objdump @@ -0,0 +1,13221 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkx/Zbkx-xperm4-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkx/Zbkx-xperm4-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007140 memsz 0x00007140 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00007100 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000189d0 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020a00 80020a00 00021a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 000026a6 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 00000000 00000000 00024d21 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d9d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024dc0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024dd8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 00000000 00000000 00024e00 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e8a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020a00 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccmepuEC.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b0 +80005540 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b1 +80009023 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b2 +80009056 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b3 +80009089 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b4 +80005558 l .text.rvtest 00000000 failedtest_x8_x7 +800090bc l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b5 +800090ef l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b5_str +8000016c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b6 +80009122 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b6_str +800001a0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b7 +80009155 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b7_str +800001cc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b8 +80009188 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b8_str +800001fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b9 +800091bb l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b9_str +8000022c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b10 +800091ef l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b10_str +80000258 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b11 +80009224 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b11_str +80000284 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b12 +80009259 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b12_str +800002b0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b13 +8000928e l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b13_str +800002dc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b14 +800092c3 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b14_str +80000308 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b15 +800092f8 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b15_str +80000338 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b16 +8000932d l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b16_str +80000364 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b17 +80009362 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b17_str +80000390 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b18 +80009397 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b18_str +800003bc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b19 +800093cc l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b19_str +800003e8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b20 +80009401 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b20_str +80000414 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b21 +80009436 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b21_str +80000444 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b22 +8000946b l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b22_str +80000470 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b23 +800094a0 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b23_str +8000049c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b24 +800094d5 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b24_str +800004cc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b25 +8000950a l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b25_str +800004f8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b26 +8000953f l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b26_str +80000524 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b27 +80009574 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b27_str +80000550 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b28 +800095a9 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b28_str +80000580 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b29 +800095de l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b29_str +800005ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b30 +80009613 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b30_str +800005d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_b31 +80009648 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_b31_str +80000604 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b0 +8000967d l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b0_str +80000630 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b1 +800096b1 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b1_str +8000065c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b2 +800096e5 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b2_str +80000688 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b3 +80009719 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b3_str +800006bc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b4 +80005580 l .text.rvtest 00000000 failedtest_x14_x13 +8000974d l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b4_str +800006e8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b5 +80009781 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b5_str +80000718 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b6 +800097b5 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b6_str +80000744 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b7 +800097e9 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b7_str +80000770 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b8 +8000981d l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b8_str +8000079c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b9 +80009851 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b9_str +800007c8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b10 +80009885 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b10_str +800007f4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b11 +800098ba l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b11_str +80000820 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b12 +800098ef l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b12_str +80000854 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b13 +80009924 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b13_str +80000880 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b14 +80009959 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b14_str +800008ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b15 +8000998e l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b15_str +800008d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b16 +800099c3 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b16_str +80000904 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b17 +800099f8 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b17_str +80000930 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b18 +80009a2d l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b18_str +8000095c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b19 +80009a62 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b19_str +8000098c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b20 +80009a97 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b20_str +800009bc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b21 +80009acc l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b21_str +800009e8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b22 +80009b01 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b22_str +80000a14 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b23 +80009b36 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b23_str +80000a44 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b24 +80009b6b l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b24_str +80000a70 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b25 +80009ba0 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b25_str +80000a9c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b26 +80009bd5 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b26_str +80000ac8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b27 +80009c0a l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b27_str +80000af4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b28 +80009c3f l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b28_str +80000b20 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b29 +80009c74 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b29_str +80000b4c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b30 +80009ca9 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b30_str +80000b78 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_b31 +80009cde l .data 00000000 Zbkx_xperm4_cg_cp_rs2_b31_str +80000ba4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b0 +80009d13 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b0_str +80000bd0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b1 +80009d46 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b1_str +80000c00 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b2 +80009d79 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b2_str +80000c2c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b3 +80009dac l .data 00000000 Zbkx_xperm4_cg_cp_rd_b3_str +80000c60 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b4 +80009ddf l .data 00000000 Zbkx_xperm4_cg_cp_rd_b4_str +80000c8c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b5 +80009e12 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b5_str +80000cb8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b6 +80009e45 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b6_str +80000ce4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b7 +80009e78 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b7_str +80000d10 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b8 +80009eab l .data 00000000 Zbkx_xperm4_cg_cp_rd_b8_str +80000d3c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b9 +80009ede l .data 00000000 Zbkx_xperm4_cg_cp_rd_b9_str +80000d68 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b10 +80009f11 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b10_str +80000d94 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b11 +80009f45 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b11_str +80000dc0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b12 +80009f79 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b12_str +80000df4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b13 +80009fad l .data 00000000 Zbkx_xperm4_cg_cp_rd_b13_str +80000e20 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b14 +80009fe1 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b14_str +80000e4c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b15 +8000a015 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b15_str +80000e7c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b16 +8000a049 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b16_str +80000ea8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b17 +8000a07d l .data 00000000 Zbkx_xperm4_cg_cp_rd_b17_str +80000ed8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b18 +8000a0b1 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b18_str +80000f04 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b19 +8000a0e5 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b19_str +80000f30 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b20 +8000a119 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b20_str +80000f5c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b21 +8000a14d l .data 00000000 Zbkx_xperm4_cg_cp_rd_b21_str +80000f88 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b22 +8000a181 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b22_str +80000fb8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b23 +8000a1b5 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b23_str +80000fe4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b24 +8000a1e9 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b24_str +80001010 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b25 +8000a21d l .data 00000000 Zbkx_xperm4_cg_cp_rd_b25_str +8000103c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b26 +8000a251 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b26_str +80001068 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b27 +8000a285 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b27_str +80001094 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b28 +8000a2b9 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b28_str +800010c0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b29 +8000a2ed l .data 00000000 Zbkx_xperm4_cg_cp_rd_b29_str +800010ec l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b30 +8000a321 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b30_str +80001118 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rd_b31 +8000a355 l .data 00000000 Zbkx_xperm4_cg_cp_rd_b31_str +80001144 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x0 +8000a389 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x0_str +80001170 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x1 +8000a3c4 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x1_str +8000119c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x2 +8000a3ff l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x2_str +800011c8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x80000000 +8000a43a l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x80000000_str +800011f4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x80000001 +8000a47d l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x80000001_str +80001220 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffff +8000a4c0 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffff_str +8000124c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffe +8000a503 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffe_str +80001278 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff +8000a546 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff_str +800012a4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe +8000a589 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe_str +800012d0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc8872 +8000a5cc l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc8872_str +800012fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaa +8000a60f l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaa_str +80001328 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x55555555 +8000a652 l .data 00000000 Zbkx_xperm4_cg_cp_rs1_edges_0x55555555_str +80001354 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x0 +8000a695 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x0_str +80001380 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x1 +8000a6d1 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x1_str +800013ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x2 +8000a70d l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x2_str +800013d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x80000000 +8000a749 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x80000000_str +80001404 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x80000001 +8000a78c l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x80000001_str +80001430 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffff +8000a7cf l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffff_str +8000145c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffe +8000a812 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffe_str +80001488 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff +8000a855 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff_str +800014b4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe +8000a898 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe_str +800014e0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc8872 +8000a8db l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc8872_str +8000150c l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaa +8000a91e l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaa_str +80001538 l .text.rvtest 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x55555555 +8000a961 l .data 00000000 Zbkx_xperm4_cg_cp_rs2_edges_0x55555555_str +80001564 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a9a4 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001590 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a9f7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015bc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000aa4a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000aa9d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001614 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000aaf7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001640 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000ab51 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000166c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000abab l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001698 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ac05 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016c4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000ac5f l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000acb9 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +8000171c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ad13 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001748 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ad6d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001774 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000adc7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ae1a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017cc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ae6d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000aec0 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001824 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000af1a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001850 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000af74 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000187c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000afce l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b028 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018d4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b082 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001900 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b0dc l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000192c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b136 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001958 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b190 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001984 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b1ea l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b23d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019dc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b290 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a08 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b2e3 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a34 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b33d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a60 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b397 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a8c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b3f1 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b44b l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ae4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b4a5 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b10 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b4ff l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b3c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b559 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b68 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b5b3 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b94 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b60d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b667 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bec l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b6c1 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c18 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b71b l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c44 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b77c l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c70 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b7dd l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c9c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b83e l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b89f l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cf4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b900 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d20 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b961 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d4c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b9c2 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d78 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000ba23 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001da4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000ba84 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000bade l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001dfc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000bb38 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e28 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bb92 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e54 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bbf3 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e80 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bc54 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eac l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bcb5 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bd16 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f04 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bd77 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f30 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bdd8 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f5c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000be39 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f88 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000be9a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fb4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000befb l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bf55 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +8000200c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bfaf l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002038 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c009 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002064 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c06a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002090 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c0cb l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020bc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c12c l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c18d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002114 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c1ee l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002140 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c24f l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000216c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c2b0 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002198 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c311 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021c4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c372 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c3cc l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +8000221c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c426 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002248 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c480 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002274 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c4e1 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c542 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022cc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c5a3 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c604 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002324 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c665 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002350 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c6c6 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000237c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c727 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c788 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023d4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c7e9 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002400 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c843 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000242c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c89d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002458 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c8f7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002484 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c958 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c9b9 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024dc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ca1a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002508 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ca7b l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002534 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cadc l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002560 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cb3d l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000258c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cb9e l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000cbff l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025e4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cc60 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002610 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ccba l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000263c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cd14 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002668 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cd6e l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002694 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cdcf l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000ce30 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026ec l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000ce91 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002718 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cef2 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002744 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000cf53 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002770 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cfb4 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000279c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d015 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d076 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027f4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d0d7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002820 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d131 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000284c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d18b l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002878 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d1e5 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028a4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d246 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d2a7 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d308 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002928 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d369 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002954 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d3ca l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002980 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d42b l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d48c l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d4ed l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a04 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d54e l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a30 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d5a8 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a5c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d602 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a88 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d65c l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ab4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d6bd l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d71e l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b0c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d77f l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b38 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d7e0 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b64 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d841 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b90 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d8a2 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bbc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d903 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d964 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c14 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d9c5 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c40 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000da1f l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c6c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000da79 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c98 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dad3 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cc4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000db34 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000db95 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d1c l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000dbf6 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d48 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000dc57 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d74 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dcb8 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000dd19 l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dcc l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000dd7a l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dddb l .data 00000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e24 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b0 +8000de3c l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b0_str +80002e50 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b1 +8000de76 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b1_str +80002e7c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b2 +8000deb0 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b2_str +80002ea8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b3 +8000deea l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b3_str +80002edc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b4 +8000df24 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b4_str +80002f08 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b5 +8000df5e l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b5_str +80002f34 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b6 +8000df98 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b7 +8000dfd2 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b8 +8000e00c l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b8_str +80002fbc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b9 +8000e046 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b9_str +80002fec l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b10 +8000e080 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b10_str +80003018 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b11 +8000e0bb l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b11_str +80003044 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b12 +8000e0f6 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b12_str +80003078 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b13 +8000e131 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b13_str +800030a4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b14 +8000e16c l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b14_str +800030d0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b15 +8000e1a7 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b15_str +800030fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b16 +8000e1e2 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b16_str +80003128 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b17 +8000e21d l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b17_str +80003154 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b18 +8000e258 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b18_str +80003180 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b19 +8000e293 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b19_str +800031ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b20 +8000e2ce l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b20_str +800031d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b21 +8000e309 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b21_str +80003208 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b22 +8000e344 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b22_str +80003234 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b23 +8000e37f l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b23_str +80003264 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b24 +8000e3ba l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b24_str +80003294 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b25 +8000e3f5 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b25_str +800032c0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b26 +8000e430 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b26_str +800032ec l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b27 +8000e46b l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b27_str +80003318 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b28 +8000e4a6 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b28_str +80003344 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b29 +8000e4e1 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b29_str +80003370 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b30 +8000e51c l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b30_str +8000339c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b31 +8000e557 l .data 00000000 Zbkx_xperm4_cg_cmp_rs1_rs2_b31_str +800033c8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b0 +8000e592 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b0_str +800033f4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b1 +8000e5cb l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b1_str +80003424 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b2 +8000e604 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b2_str +80003450 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b3 +8000e63d l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b3_str +80003484 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b4 +8000e676 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b4_str +800034b0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b5 +8000e6af l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b5_str +800034dc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b6 +8000e6e8 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b6_str +80003510 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b7 +8000e721 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b7_str +8000353c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b8 +8000e75a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b8_str +80003568 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b9 +8000e793 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b9_str +80003594 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b10 +8000e7cc l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b10_str +800035c0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b11 +8000e806 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b11_str +800035ec l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b12 +8000e840 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b12_str +80003618 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b13 +8000e87a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b13_str +80003644 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b14 +8000e8b4 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b14_str +80003670 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b15 +8000e8ee l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b15_str +8000369c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b16 +8000e928 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b16_str +800036c8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b17 +8000e962 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b17_str +800036f8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b18 +8000e99c l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b18_str +80003724 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b19 +8000e9d6 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b19_str +80003750 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b20 +8000ea10 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b20_str +8000377c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b21 +8000ea4a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b21_str +800037ac l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b22 +8000ea84 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b22_str +800037d8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b23 +8000eabe l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b23_str +80003804 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b24 +8000eaf8 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b24_str +80003830 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b25 +8000eb32 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b25_str +8000385c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b26 +8000eb6c l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b26_str +8000388c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b27 +8000eba6 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b27_str +800038b8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b28 +8000ebe0 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b28_str +800038e4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b29 +8000ec1a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b29_str +80003910 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b30 +8000ec54 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b30_str +8000393c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b31 +8000ec8e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_b31_str +80003968 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b0 +8000ecc8 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b0_str +80003994 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b1 +8000ed01 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b1_str +800039c0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b2 +8000ed3a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b2_str +800039ec l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b3 +8000ed73 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b3_str +80003a20 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b4 +8000edac l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b4_str +80003a4c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b5 +8000ede5 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b5_str +80003a78 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b6 +8000ee1e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b6_str +80003aac l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b7 +8000ee57 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b7_str +80003ad8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b8 +8000ee90 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b8_str +80003b04 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b9 +8000eec9 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b9_str +80003b30 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b10 +8000ef02 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b10_str +80003b5c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b11 +8000ef3c l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b11_str +80003b88 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b12 +8000ef76 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b12_str +80003bb4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b13 +8000efb0 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b13_str +80003be0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b14 +8000efea l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b14_str +80003c0c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b15 +8000f024 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b15_str +80003c38 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b16 +8000f05e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b16_str +80003c68 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b17 +8000f098 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b17_str +80003c94 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b18 +8000f0d2 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b18_str +80003cc0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b19 +8000f10c l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b19_str +80003cec l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b20 +8000f146 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b20_str +80003d18 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b21 +8000f180 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b21_str +80003d44 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b22 +8000f1ba l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b22_str +80003d70 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b23 +8000f1f4 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b23_str +80003d9c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b24 +8000f22e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b24_str +80003dcc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b25 +8000f268 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b25_str +80003dfc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b26 +8000f2a2 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b26_str +80003e28 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b27 +8000f2dc l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b27_str +80003e54 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b28 +8000f316 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b28_str +80003e80 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b29 +8000f350 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b29_str +80003eac l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b30 +8000f38a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b30_str +80003ed8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b31 +8000f3c4 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs2_b31_str +80003f04 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0 +8000f3fe l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0_str +80003f30 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1 +8000f43b l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1_str +80003f5c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2 +8000f478 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2_str +80003f88 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3 +8000f4b5 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3_str +80003fbc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4 +8000f4f2 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4_str +80003fe8 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5 +8000f52f l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5_str +80004014 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6 +8000f56c l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6_str +80004048 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7 +8000f5a9 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7_str +80004074 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8 +8000f5e6 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8_str +800040a0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9 +8000f623 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9_str +800040cc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10 +8000f660 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10_str +800040fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11 +8000f69e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11_str +80004128 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12 +8000f6dc l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12_str +8000415c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13 +8000f71a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13_str +80004188 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14 +8000f758 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14_str +800041b4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15 +8000f796 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15_str +800041e0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16 +8000f7d4 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16_str +8000420c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17 +8000f812 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17_str +80004238 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18 +8000f850 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18_str +80004268 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19 +8000f88e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19_str +80004298 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20 +8000f8cc l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20_str +800042c4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21 +8000f90a l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21_str +800042f4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22 +8000f948 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22_str +80004320 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23 +8000f986 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23_str +8000434c l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24 +8000f9c4 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24_str +80004378 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25 +8000fa02 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25_str +800043a4 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26 +8000fa40 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26_str +800043d0 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27 +8000fa7e l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27_str +800043fc l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28 +8000fabc l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28_str +80004428 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29 +8000fafa l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29_str +80004458 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30 +8000fb38 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30_str +80004488 l .text.rvtest 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31 +8000fb76 l .data 00000000 Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +800044b8 l .text.rvtest 00000000 exit_Mcleanup +800044bc l .text.rvtest 00000000 resto_Medeleg +800044c4 l .text.rvtest 00000000 resto_Msatp +800044c8 l .text.rvtest 00000000 resto_Mscratch +800044d0 l .text.rvtest 00000000 resto_Mxtvec +800044e4 l .text.rvtest 00000000 resto_Mtramp +800044e8 l .text.rvtest 00000000 resto_Mloop +80004500 l .text.rvtest 00000000 check_trap_sig_overflow +80004790 l .text.rvtest 00000000 trap_sig_overflow +80004630 l .text.rvtest 00000000 check_trap_sig_offset +80010240 l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8001027b l .data 00000000 begin_debugstr +800102db l .data 00000000 trap_sig_overflowstr +80010e86 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011f68 l .data 00000000 trap_sigptr +80011f60 l .data 00000000 final_trap_sig_offset +800046f4 l .text.rvtest 00000000 check_abort_test +800055a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001042f l .data 00000000 trap_sig_offset_mismatch +80004710 l .text.rvtest 00000000 exit_cleanup +800047c4 l .text.rvtest 00000000 abort_test +8001029d l .data 00000000 abortstr +80010204 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004880 l .text.rvtest 00000000 trap_Mhandler +800049a0 l .text.rvtest 00000000 rvtest_Mendtest +800049c4 l .text.rvtest 00000000 common_Mhandler +80004a30 l .text.rvtest 00000000 spcl_M2mmode_test +80004a3c l .text.rvtest 00000000 spcl_Mchk4alt +80004a4c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a44 l .text.rvtest 00000000 spcl_Mparam_chk +800054d0 l .text.rvtest 00000000 Mrtn2mmode +80004fd4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a58 l .text.rvtest 00000000 Mgoto_mchk +80004a5c l .text.rvtest 00000000 tsbi_Mdispatch +80004a84 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a74 l .text.rvtest 00000000 tsbi_Mecall_test +80004af0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005240 l .text.rvtest 00000000 resto_Mrtn +80004ab0 l .text.rvtest 00000000 tsbi_Mgoto_m +80004ac0 l .text.rvtest 00000000 tsbi_Mgoto_s +80004adc l .text.rvtest 00000000 tsbi_Mgoto_u +80004aec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c70 l .text.rvtest 00000000 tsbi_instr_table +80004b20 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004b34 l .text.rvtest 00000000 found_instr +80004b78 l .text.rvtest 00000000 tsbi_instr_not_found +80004b64 l .text.rvtest 00000000 tsbi_instr_rtn +800118bd l .data 00000000 tsbi_instr_not_found_str +80007058 l .text.rvtest 00000000 failedtest_hex_to_str +8000fd28 l .data 00000000 ascii_buffer +80010344 l .data 00000000 newlinestr +80004ff0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004fdc l .text.rvtest 00000000 Mint_sig_sv +80004ff0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000fd08 l .data 00000000 saved_xepc +800209cc l .data 00000000 sig_end_canary +80005088 l .text.rvtest 00000000 sv_Mvect +80010446 l .data 00000000 sv_Mvect_str +8000512c l .text.rvtest 00000000 sv_Mcause +80010548 l .data 00000000 sv_Mcause_str +80005260 l .text.rvtest 00000000 common_Mint_handler +80005154 l .text.rvtest 00000000 common_Mexcpt_handler +80005160 l .text.rvtest 00000000 vmem_adj_Mepc +800051b4 l .text.rvtest 00000000 sv_Mepc +80005188 l .text.rvtest 00000000 code_adj_Mepc +800051b0 l .text.rvtest 00000000 adj_Mepc +8000519c l .text.rvtest 00000000 data_adj_Mepc +80010643 l .data 00000000 sv_Mepc_str +800051d4 l .text.rvtest 00000000 skpsv_Mepc +800051fc l .text.rvtest 00000000 adj_Mepc_rtn +80005208 l .text.rvtest 00000000 skp_adj_Mepc +8000520c l .text.rvtest 00000000 sv_Mtval +80010736 l .data 00000000 sv_Mtval_str +8000522c l .text.rvtest 00000000 skp_Mtval +80005238 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005298 l .text.rvtest 00000000 spcl_Mhandler +80005274 l .text.rvtest 00000000 sv_Mip +800108a9 l .data 00000000 sv_Mip_str +800052b4 l .text.rvtest 00000000 spcl_Mdispatch_handling +800052cc l .text.rvtest 00000000 spcl_Mdispatch +800052d0 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +800053d0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +80005520 l .text.rvtest 00000000 rtn_fm_mmode +8000550c l .text.rvtest 00000000 from_hs_u +800054fc l .text.rvtest 00000000 from_vs +8000fbc0 l .data 00000000 begin_failure_scratch +800055dc l .text.rvtest 00000000 failedtest_saveregs +8000564c l .text.rvtest 00000000 failedtest_saveresults +8000fbc0 l .data 00000000 failure_type +800057ec l .text.rvtest 00000000 failedtest_saveresults_trap +8000565c l .text.rvtest 00000000 failedtest_saveresults_int +80005774 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800057ac l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005ae0 l .text.rvtest 00000000 failedtest_saveresults_common +8000fce8 l .data 00000000 failure_diag_type +8000fcf8 l .data 00000000 trap_diag_fail_str_ptr +80005aa0 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000fcf0 l .data 00000000 trap_diag_subtype +80005ab4 l .text.rvtest 00000000 trap_diag_field_identified +8001082d l .data 00000000 sv_Mtval2_str +8001086b l .data 00000000 sv_Mtinst_str +80010486 l .data 00000000 sv_Svect_str +80010586 l .data 00000000 sv_Scause_str +8001067f l .data 00000000 sv_Sepc_str +80010773 l .data 00000000 sv_Stval_str +800108e4 l .data 00000000 sv_Sip_str +800104c6 l .data 00000000 sv_Hvect_str +800105c4 l .data 00000000 sv_Hcause_str +800106bb l .data 00000000 sv_Hepc_str +800107b0 l .data 00000000 sv_Htval_str +8001091f l .data 00000000 sv_Hip_str +80010507 l .data 00000000 sv_Vvect_str +80010603 l .data 00000000 sv_Vcause_str +800106f8 l .data 00000000 sv_Vepc_str +800107ee l .data 00000000 sv_Vtval_str +8001095b l .data 00000000 sv_Vip_str +80010998 l .data 00000000 Mclr_Mext_int_str +800109e7 l .data 00000000 Mclr_Sext_int_str +80010ae2 l .data 00000000 Sclr_Sext_int_str +80010bde l .data 00000000 Hclr_Sext_int_str +80005ad0 l .text.rvtest 00000000 trap_diag_generic_report +8000fcf4 l .data 00000000 trap_diag_mode +80005b10 l .text.rvtest 00000000 failedtest_report +80005b10 l .text.rvtest 00000000 print_failstr +80005b88 l .text.rvtest 00000000 print_testnamestr +80010332 l .data 00000000 testnamestr +80005bc8 l .text.rvtest 00000000 print_failure_test_name_str +8000fce0 l .data 00000000 failure_string_ptr +80005bd8 l .text.rvtest 00000000 print_newline_str +8000614c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010346 l .data 00000000 inststr +8000fcc0 l .data 00000000 failing_instruction +8001035a l .data 00000000 addrstr +8000fcc8 l .data 00000000 failing_addr +80010d91 l .data 00000000 regstr +80005db8 l .text.rvtest 00000000 failedtest_report_not_intreg +8000fcc4 l .data 00000000 failing_reg +800070d4 l .text.rvtest 00000000 failedtest_dec_to_str +80005ecc l .text.rvtest 00000000 failedtest_report_print_regstr +80005e0c l .text.rvtest 00000000 failedtest_report_fpreg +80005e58 l .text.rvtest 00000000 failedtest_report_vecreg +80005e94 l .text.rvtest 00000000 failedtest_report_vxsat +80010ea7 l .data 00000000 fflagsstr +80005f08 l .text.rvtest 00000000 failedtest_report_after_reg +80010d8a l .data 00000000 vxsatstr +80010da2 l .data 00000000 badvalstr +80005f6c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000fcd0 l .data 00000000 failing_value +80005f7c l .text.rvtest 00000000 failedtest_report_badval_done +8000604c l .text.rvtest 00000000 failedtest_report_diag +80010db9 l .data 00000000 expvalstr +8000600c l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000fcd8 l .data 00000000 expected_value +8000601c l .text.rvtest 00000000 failedtest_report_expval_done +80006e04 l .text.rvtest 00000000 failedtest_report_end +800060cc l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006054 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010dd0 l .data 00000000 failure_diag_bad_instr_str +80010e2e l .data 00000000 failure_diag_bad_ptr_str +80006210 l .text.rvtest 00000000 trap_report_offset_mismatch +80010ed3 l .data 00000000 trap_diag_header_str +80010eff l .data 00000000 trap_diag_origstr_label +80006c90 l .text.rvtest 00000000 trap_report_generic +8000654c l .text.rvtest 00000000 trap_report_field_mismatch +80010f0f l .data 00000000 trap_diag_expected_offset_str +80010f3a l .data 00000000 trap_diag_actual_offset_str +8000642c l .text.rvtest 00000000 trap_report_missing_traps +8000631c l .text.rvtest 00000000 trap_report_extra_traps +80010f69 l .data 00000000 trap_diag_extra_traps_str +80010fd1 l .data 00000000 trap_diag_diff_bytes_str +80010ff8 l .data 00000000 trap_diag_extra_next_step_str +80010f95 l .data 00000000 trap_diag_missing_traps_str +800110e0 l .data 00000000 trap_diag_missing_next_step_str +800111c7 l .data 00000000 trap_diag_handler_mode_str +800065e4 l .text.rvtest 00000000 trap_mode_m +80006624 l .text.rvtest 00000000 trap_mode_s +80006664 l .text.rvtest 00000000 trap_mode_h +800066a4 l .text.rvtest 00000000 trap_mode_v +80011203 l .data 00000000 trap_diag_mode_unknown_str +800066e0 l .text.rvtest 00000000 trap_mode_print +800111e1 l .data 00000000 trap_diag_mode_m_str +800111e9 l .data 00000000 trap_diag_mode_s_str +800111f1 l .data 00000000 trap_diag_mode_hs_str +800111fa l .data 00000000 trap_diag_mode_vs_str +8001120c l .data 00000000 trap_diag_field_str +800067a4 l .text.rvtest 00000000 trap_field_vect +800067e4 l .text.rvtest 00000000 trap_field_cause +80006824 l .text.rvtest 00000000 trap_field_epc +80006864 l .text.rvtest 00000000 trap_field_tval +800068a4 l .text.rvtest 00000000 trap_field_ip +800068e4 l .text.rvtest 00000000 trap_field_tval2 +80006924 l .text.rvtest 00000000 trap_field_tinst +80006964 l .text.rvtest 00000000 trap_field_intid +80011363 l .data 00000000 trap_diag_field_unknown_str +800069a0 l .text.rvtest 00000000 trap_field_print +80011226 l .data 00000000 trap_diag_field_vect_str +80011257 l .data 00000000 trap_diag_field_cause_str +80011277 l .data 00000000 trap_diag_field_epc_str +80011295 l .data 00000000 trap_diag_field_tval_str +800112b4 l .data 00000000 trap_diag_field_ip_str +800112dc l .data 00000000 trap_diag_field_tval2_str +80011308 l .data 00000000 trap_diag_field_tinst_str +80011334 l .data 00000000 trap_diag_field_intid_str +80011372 l .data 00000000 trap_diag_expected_str +80011389 l .data 00000000 trap_diag_actual_str +80006b3c l .text.rvtest 00000000 trap_field_not_cause +800113a0 l .data 00000000 trap_diag_expected_cause_name_str +80006d74 l .text.rvtest 00000000 trap_cause_to_str +800113b7 l .data 00000000 trap_diag_actual_cause_name_str +80006b3c l .text.rvtest 00000000 trap_field_not_epc +80006e50 l .text.rvtest 00000000 failedtest_print_csr_context +8001142d l .data 00000000 trap_diag_hint_vect_str +80011503 l .data 00000000 trap_diag_hint_cause_str +800115f6 l .data 00000000 trap_diag_hint_epc_str +800116f1 l .data 00000000 trap_diag_hint_tval_str +800117d8 l .data 00000000 trap_diag_hint_ip_str +800113e5 l .data 00000000 trap_diag_generic_str +800103ce l .data 00000000 xepcinstrstr +80006d98 l .text.rvtest 00000000 trap_cause_interrupt +80006d78 l .text.rvtest 00000000 trap_cause_exception +80006dc4 l .text.rvtest 00000000 trap_cause_unknown +8000fd50 l .data 00000000 trap_excpt_name_tbl +8000fdb0 l .data 00000000 trap_int_name_tbl +800101ee l .data 00000000 trap_cause_unknown_str +80006e48 l .text.rvtest 00000000 failedtest_terminate +8000fd00 l .data 00000000 csr_context_ret_addr +800103ef l .data 00000000 mepcstr +800103ff l .data 00000000 mcausestr +8000fd10 l .data 00000000 saved_xcause +8001040f l .data 00000000 mtvalstr +8000fd18 l .data 00000000 saved_xtval +8001041f l .data 00000000 mstatusstr +8000fd20 l .data 00000000 saved_xstatus +80007098 l .text.rvtest 00000000 failedtest_hex_to_str_loop +800070b4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +800070b8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011910 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010eaf l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fd50 l .data 00000000 end_failure_scratch +8000fdf0 l .data 00000000 trap_excpt_name_0 +8000fe10 l .data 00000000 trap_excpt_name_1 +8000fe2a l .data 00000000 trap_excpt_name_2 +8000fe3f l .data 00000000 trap_excpt_name_3 +8000fe4b l .data 00000000 trap_excpt_name_4 +8000fe64 l .data 00000000 trap_excpt_name_5 +8000fe77 l .data 00000000 trap_excpt_name_6 +8000fe95 l .data 00000000 trap_excpt_name_7 +8000fead l .data 00000000 trap_excpt_name_8 +8000fecb l .data 00000000 trap_excpt_name_9 +8000fee9 l .data 00000000 trap_excpt_name_10 +8000ff08 l .data 00000000 trap_excpt_name_11 +8000ff26 l .data 00000000 trap_excpt_name_12 +8000ff3e l .data 00000000 trap_excpt_name_13 +8000ff4f l .data 00000000 trap_excpt_name_14 +8000ff5e l .data 00000000 trap_excpt_name_15 +8000ff74 l .data 00000000 trap_excpt_name_16 +8000ff81 l .data 00000000 trap_excpt_name_17 +8000ff90 l .data 00000000 trap_excpt_name_18 +8000ffa0 l .data 00000000 trap_excpt_name_19 +8000ffb0 l .data 00000000 trap_excpt_name_20 +8000ffce l .data 00000000 trap_excpt_name_21 +8000ffe5 l .data 00000000 trap_excpt_name_22 +8000fffa l .data 00000000 trap_excpt_name_23 +80010016 l .data 00000000 trap_int_name_0 +8001002e l .data 00000000 trap_int_name_1 +8001004d l .data 00000000 trap_int_name_2 +80010074 l .data 00000000 trap_int_name_3 +80010090 l .data 00000000 trap_int_name_4 +800100a8 l .data 00000000 trap_int_name_5 +800100c4 l .data 00000000 trap_int_name_6 +800100e8 l .data 00000000 trap_int_name_7 +80010101 l .data 00000000 trap_int_name_8 +80010119 l .data 00000000 trap_int_name_9 +80010138 l .data 00000000 trap_int_name_10 +8001015f l .data 00000000 trap_int_name_11 +8001017b l .data 00000000 trap_int_name_12 +800101a0 l .data 00000000 trap_int_name_13 +800101bc l .data 00000000 trap_int_name_14 +800101d5 l .data 00000000 trap_int_name_15 +8001039b l .data 00000000 xepcstr +80010a39 l .data 00000000 Mclr_Vext_int_str +80010a93 l .data 00000000 Sclr_Mext_int_str +80010b34 l .data 00000000 Sclr_Vext_int_str +80010b8e l .data 00000000 Hclr_Mext_int_str +80010c31 l .data 00000000 Hclr_Vext_int_str +80010c8c l .data 00000000 Vclr_Mext_int_str +80010cdc l .data 00000000 Vclr_Sext_int_str +80010d2f l .data 00000000 Vclr_Vext_int_str +800113ce l .data 00000000 trap_diag_curr_xepc_str +800209d0 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800209d0 g .data 00000000 rvtest_sig_end +800049d8 g .text.rvtest 00000000 common_Mentry +80004500 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011910 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +800044a8 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011910 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +80011901 g .data 00000000 rvtest_data_end +800044a8 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020b00 g .tohost 00000000 fromhost +80020a00 g .tohost 00000000 tohost +80004750 g .text.rvtest 00000000 rvtest_fail_summary +80004800 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xc82666a5 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xf1772e8c +80000048: 0001a403 lw x8,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkx_xperm4_cg_cp_rs1_b0: + xperm4 x20, x0, x8 # perform operation +80000050: 28802a33 xperm4 x20,x0,x8 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkx_xperm4_cg_cp_rs1_b0, Zbkx_xperm4_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01420863 beq x4,x20,80000068 +8000005c: 4e4052ef jal x5,80005540 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x535b96b6 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x32a9f09c +80000074: 0001a303 lw x6,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkx_xperm4_cg_cp_rs1_b1: + xperm4 x29, x1, x6 # perform operation +8000007c: 2860aeb3 xperm4 x29,x1,x6 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkx_xperm4_cg_cp_rs1_b1, Zbkx_xperm4_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01d20863 beq x4,x29,80000094 +80000088: 4b8052ef jal x5,80005540 +8000008c: 8000007c .word 0x8000007c +80000090: 80009023 .word 0x80009023 +80000094: 00410113 addi x2,x2,4 + + mv x6, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010313 addi x6,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x9677fa7c +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xe7dcabcc +800000a4: 0001aa03 lw x20,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkx_xperm4_cg_cp_rs1_b2: + xperm4 x28, x2, x20 # perform operation +800000ac: 29412e33 xperm4 x28,x2,x20 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_b2, Zbkx_xperm4_cg_cp_rs1_b2_str) +800000b0: 00032203 lw x4,0(x6) +800000b4: 01c20863 beq x4,x28,800000c4 +800000b8: 488052ef jal x5,80005540 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009056 .word 0x80009056 +800000c4: 00430313 addi x6,x6,4 + + mv x9, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018493 addi x9,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x8409c5ac +800000cc: 0004a183 lw x3,0(x9) +800000d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x09c5a1a0 +800000d4: 0004a503 lw x10,0(x9) +800000d8: 00448493 addi x9,x9,4 + +800000dc : +Zbkx_xperm4_cg_cp_rs1_b3: + xperm4 x12, x3, x10 # perform operation +800000dc: 28a1a633 xperm4 x12,x3,x10 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkx_xperm4_cg_cp_rs1_b3, Zbkx_xperm4_cg_cp_rs1_b3_str) +800000e0: 00032203 lw x4,0(x6) +800000e4: 00c20863 beq x4,x12,800000f4 +800000e8: 458052ef jal x5,80005540 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009089 .word 0x80009089 +800000f4: 00430313 addi x6,x6,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xf592b63d +80000100: 0004a203 lw x4,0(x9) +80000104: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xce5604e2 +80000108: 0004a183 lw x3,0(x9) +8000010c: 00448493 addi x9,x9,4 + +80000110 : +Zbkx_xperm4_cg_cp_rs1_b4: + xperm4 x26, x4, x3 # perform operation +80000110: 28322d33 xperm4 x26,x4,x3 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkx_xperm4_cg_cp_rs1_b4, Zbkx_xperm4_cg_cp_rs1_b4_str) +80000114: 00032383 lw x7,0(x6) +80000118: 01a38863 beq x7,x26,80000128 +8000011c: 43c0546f jal x8,80005558 +80000120: 80000110 .word 0x80000110 +80000124: 800090bc .word 0x800090bc +80000128: 00430313 addi x6,x6,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x1cfcdac1 +8000012c: 0004a283 lw x5,0(x9) +80000130: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x4963a7f5 +80000134: 0004a703 lw x14,0(x9) +80000138: 00448493 addi x9,x9,4 + +8000013c : +Zbkx_xperm4_cg_cp_rs1_b5: + xperm4 x15, x5, x14 # perform operation +8000013c: 28e2a7b3 xperm4 x15,x5,x14 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkx_xperm4_cg_cp_rs1_b5, Zbkx_xperm4_cg_cp_rs1_b5_str) +80000140: 00032383 lw x7,0(x6) +80000144: 00f38863 beq x7,x15,80000154 +80000148: 4100546f jal x8,80005558 +8000014c: 8000013c .word 0x8000013c +80000150: 800090ef .word 0x800090ef +80000154: 00430313 addi x6,x6,4 + + mv x10, x6 # switch signature pointer register to avoid conflict with test +80000158: 00030513 addi x10,x6,0 +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xaeae2066 +8000015c: 0004a303 lw x6,0(x9) +80000160: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xffbfcbc9 +80000164: 0004ac03 lw x24,0(x9) +80000168: 00448493 addi x9,x9,4 + +8000016c : +Zbkx_xperm4_cg_cp_rs1_b6: + xperm4 x23, x6, x24 # perform operation +8000016c: 29832bb3 xperm4 x23,x6,x24 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zbkx_xperm4_cg_cp_rs1_b6, Zbkx_xperm4_cg_cp_rs1_b6_str) +80000170: 00052383 lw x7,0(x10) +80000174: 01738863 beq x7,x23,80000184 +80000178: 3e00546f jal x8,80005558 +8000017c: 8000016c .word 0x8000016c +80000180: 80009122 .word 0x80009122 +80000184: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000188: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +8000018c: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0c158af2 +80000190: 0004a383 lw x7,0(x9) +80000194: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xff755f2a +80000198: 0004a903 lw x18,0(x9) +8000019c: 00448493 addi x9,x9,4 + +800001a0 : +Zbkx_xperm4_cg_cp_rs1_b7: + xperm4 x22, x7, x18 # perform operation +800001a0: 2923ab33 xperm4 x22,x7,x18 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cp_rs1_b7, Zbkx_xperm4_cg_cp_rs1_b7_str) +800001a4: 00052203 lw x4,0(x10) +800001a8: 01620863 beq x4,x22,800001b8 +800001ac: 394052ef jal x5,80005540 +800001b0: 800001a0 .word 0x800001a0 +800001b4: 80009155 .word 0x80009155 +800001b8: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x254cfefb +800001bc: 0004a403 lw x8,0(x9) +800001c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x54192df8 +800001c4: 0004a003 lw x0,0(x9) +800001c8: 00448493 addi x9,x9,4 + +800001cc : +Zbkx_xperm4_cg_cp_rs1_b8: + xperm4 x16, x8, x0 # perform operation +800001cc: 28042833 xperm4 x16,x8,x0 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cp_rs1_b8, Zbkx_xperm4_cg_cp_rs1_b8_str) +800001d0: 00052203 lw x4,0(x10) +800001d4: 01020863 beq x4,x16,800001e4 +800001d8: 368052ef jal x5,80005540 +800001dc: 800001cc .word 0x800001cc +800001e0: 80009188 .word 0x80009188 +800001e4: 00450513 addi x10,x10,4 + + mv x16, x9 # switch data pointer register to avoid conflict with test +800001e8: 00048813 addi x16,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xfad654cd +800001ec: 00082483 lw x9,0(x16) +800001f0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x1ad3d95d +800001f4: 00082f03 lw x30,0(x16) +800001f8: 00480813 addi x16,x16,4 + +800001fc : +Zbkx_xperm4_cg_cp_rs1_b9: + xperm4 x11, x9, x30 # perform operation +800001fc: 29e4a5b3 xperm4 x11,x9,x30 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cp_rs1_b9, Zbkx_xperm4_cg_cp_rs1_b9_str) +80000200: 00052203 lw x4,0(x10) +80000204: 00b20863 beq x4,x11,80000214 +80000208: 338052ef jal x5,80005540 +8000020c: 800001fc .word 0x800001fc +80000210: 800091bb .word 0x800091bb +80000214: 00450513 addi x10,x10,4 + + mv x29, x10 # switch signature pointer register to avoid conflict with test +80000218: 00050e93 addi x29,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xfe0308eb +8000021c: 00082503 lw x10,0(x16) +80000220: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x2312325f +80000224: 00082b83 lw x23,0(x16) +80000228: 00480813 addi x16,x16,4 + +8000022c : +Zbkx_xperm4_cg_cp_rs1_b10: + xperm4 x28, x10, x23 # perform operation +8000022c: 29752e33 xperm4 x28,x10,x23 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_b10, Zbkx_xperm4_cg_cp_rs1_b10_str) +80000230: 000ea203 lw x4,0(x29) +80000234: 01c20863 beq x4,x28,80000244 +80000238: 308052ef jal x5,80005540 +8000023c: 8000022c .word 0x8000022c +80000240: 800091ef .word 0x800091ef +80000244: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x4821dacd +80000248: 00082583 lw x11,0(x16) +8000024c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xd7df791d +80000250: 00082983 lw x19,0(x16) +80000254: 00480813 addi x16,x16,4 + +80000258 : +Zbkx_xperm4_cg_cp_rs1_b11: + xperm4 x15, x11, x19 # perform operation +80000258: 2935a7b3 xperm4 x15,x11,x19 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zbkx_xperm4_cg_cp_rs1_b11, Zbkx_xperm4_cg_cp_rs1_b11_str) +8000025c: 000ea203 lw x4,0(x29) +80000260: 00f20863 beq x4,x15,80000270 +80000264: 2dc052ef jal x5,80005540 +80000268: 80000258 .word 0x80000258 +8000026c: 80009224 .word 0x80009224 +80000270: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xd74be1ed +80000274: 00082603 lw x12,0(x16) +80000278: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xeaec2ac7 +8000027c: 00082383 lw x7,0(x16) +80000280: 00480813 addi x16,x16,4 + +80000284 : +Zbkx_xperm4_cg_cp_rs1_b12: + xperm4 x19, x12, x7 # perform operation +80000284: 287629b3 xperm4 x19,x12,x7 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zbkx_xperm4_cg_cp_rs1_b12, Zbkx_xperm4_cg_cp_rs1_b12_str) +80000288: 000ea203 lw x4,0(x29) +8000028c: 01320863 beq x4,x19,8000029c +80000290: 2b0052ef jal x5,80005540 +80000294: 80000284 .word 0x80000284 +80000298: 80009259 .word 0x80009259 +8000029c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x8a8d4b2b +800002a0: 00082683 lw x13,0(x16) +800002a4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xcc676e81 +800002a8: 00082783 lw x15,0(x16) +800002ac: 00480813 addi x16,x16,4 + +800002b0 : +Zbkx_xperm4_cg_cp_rs1_b13: + xperm4 x17, x13, x15 # perform operation +800002b0: 28f6a8b3 xperm4 x17,x13,x15 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zbkx_xperm4_cg_cp_rs1_b13, Zbkx_xperm4_cg_cp_rs1_b13_str) +800002b4: 000ea203 lw x4,0(x29) +800002b8: 01120863 beq x4,x17,800002c8 +800002bc: 284052ef jal x5,80005540 +800002c0: 800002b0 .word 0x800002b0 +800002c4: 8000928e .word 0x8000928e +800002c8: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x2a8ac57d +800002cc: 00082703 lw x14,0(x16) +800002d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xccb4befa +800002d4: 00082903 lw x18,0(x16) +800002d8: 00480813 addi x16,x16,4 + +800002dc : +Zbkx_xperm4_cg_cp_rs1_b14: + xperm4 x19, x14, x18 # perform operation +800002dc: 292729b3 xperm4 x19,x14,x18 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zbkx_xperm4_cg_cp_rs1_b14, Zbkx_xperm4_cg_cp_rs1_b14_str) +800002e0: 000ea203 lw x4,0(x29) +800002e4: 01320863 beq x4,x19,800002f4 +800002e8: 258052ef jal x5,80005540 +800002ec: 800002dc .word 0x800002dc +800002f0: 800092c3 .word 0x800092c3 +800002f4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x7969d9ed +800002f8: 00082783 lw x15,0(x16) +800002fc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xcaa4bad5 +80000300: 00082f03 lw x30,0(x16) +80000304: 00480813 addi x16,x16,4 + +80000308 : +Zbkx_xperm4_cg_cp_rs1_b15: + xperm4 x6, x15, x30 # perform operation +80000308: 29e7a333 xperm4 x6,x15,x30 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zbkx_xperm4_cg_cp_rs1_b15, Zbkx_xperm4_cg_cp_rs1_b15_str) +8000030c: 000ea203 lw x4,0(x29) +80000310: 00620863 beq x4,x6,80000320 +80000314: 22c052ef jal x5,80005540 +80000318: 80000308 .word 0x80000308 +8000031c: 800092f8 .word 0x800092f8 +80000320: 004e8e93 addi x29,x29,4 + + mv x22, x16 # switch data pointer register to avoid conflict with test +80000324: 00080b13 addi x22,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x4f86fa16 +80000328: 000b2803 lw x16,0(x22) +8000032c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x4b25a413 +80000330: 000b2603 lw x12,0(x22) +80000334: 004b0b13 addi x22,x22,4 + +80000338 : +Zbkx_xperm4_cg_cp_rs1_b16: + xperm4 x9, x16, x12 # perform operation +80000338: 28c824b3 xperm4 x9,x16,x12 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zbkx_xperm4_cg_cp_rs1_b16, Zbkx_xperm4_cg_cp_rs1_b16_str) +8000033c: 000ea203 lw x4,0(x29) +80000340: 00920863 beq x4,x9,80000350 +80000344: 1fc052ef jal x5,80005540 +80000348: 80000338 .word 0x80000338 +8000034c: 8000932d .word 0x8000932d +80000350: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x4f620435 +80000354: 000b2883 lw x17,0(x22) +80000358: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xe06fec67 +8000035c: 000b2503 lw x10,0(x22) +80000360: 004b0b13 addi x22,x22,4 + +80000364 : +Zbkx_xperm4_cg_cp_rs1_b17: + xperm4 x16, x17, x10 # perform operation +80000364: 28a8a833 xperm4 x16,x17,x10 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zbkx_xperm4_cg_cp_rs1_b17, Zbkx_xperm4_cg_cp_rs1_b17_str) +80000368: 000ea203 lw x4,0(x29) +8000036c: 01020863 beq x4,x16,8000037c +80000370: 1d0052ef jal x5,80005540 +80000374: 80000364 .word 0x80000364 +80000378: 80009362 .word 0x80009362 +8000037c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x4057a202 +80000380: 000b2903 lw x18,0(x22) +80000384: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0xd6e35a92 +80000388: 000b2d83 lw x27,0(x22) +8000038c: 004b0b13 addi x22,x22,4 + +80000390 : +Zbkx_xperm4_cg_cp_rs1_b18: + xperm4 x10, x18, x27 # perform operation +80000390: 29b92533 xperm4 x10,x18,x27 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zbkx_xperm4_cg_cp_rs1_b18, Zbkx_xperm4_cg_cp_rs1_b18_str) +80000394: 000ea203 lw x4,0(x29) +80000398: 00a20863 beq x4,x10,800003a8 +8000039c: 1a4052ef jal x5,80005540 +800003a0: 80000390 .word 0x80000390 +800003a4: 80009397 .word 0x80009397 +800003a8: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xa1bf8b75 +800003ac: 000b2983 lw x19,0(x22) +800003b0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x4d545bf0 +800003b4: 000b2403 lw x8,0(x22) +800003b8: 004b0b13 addi x22,x22,4 + +800003bc : +Zbkx_xperm4_cg_cp_rs1_b19: + xperm4 x26, x19, x8 # perform operation +800003bc: 2889ad33 xperm4 x26,x19,x8 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkx_xperm4_cg_cp_rs1_b19, Zbkx_xperm4_cg_cp_rs1_b19_str) +800003c0: 000ea203 lw x4,0(x29) +800003c4: 01a20863 beq x4,x26,800003d4 +800003c8: 178052ef jal x5,80005540 +800003cc: 800003bc .word 0x800003bc +800003d0: 800093cc .word 0x800093cc +800003d4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xc8413cc8 +800003d8: 000b2a03 lw x20,0(x22) +800003dc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x87d33713 +800003e0: 000b2f03 lw x30,0(x22) +800003e4: 004b0b13 addi x22,x22,4 + +800003e8 : +Zbkx_xperm4_cg_cp_rs1_b20: + xperm4 x21, x20, x30 # perform operation +800003e8: 29ea2ab3 xperm4 x21,x20,x30 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zbkx_xperm4_cg_cp_rs1_b20, Zbkx_xperm4_cg_cp_rs1_b20_str) +800003ec: 000ea203 lw x4,0(x29) +800003f0: 01520863 beq x4,x21,80000400 +800003f4: 14c052ef jal x5,80005540 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 80009401 .word 0x80009401 +80000400: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xc81aaa21 +80000404: 000b2a83 lw x21,0(x22) +80000408: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x73136c50 +8000040c: 000b2303 lw x6,0(x22) +80000410: 004b0b13 addi x22,x22,4 + +80000414 : +Zbkx_xperm4_cg_cp_rs1_b21: + xperm4 x15, x21, x6 # perform operation +80000414: 286aa7b3 xperm4 x15,x21,x6 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zbkx_xperm4_cg_cp_rs1_b21, Zbkx_xperm4_cg_cp_rs1_b21_str) +80000418: 000ea203 lw x4,0(x29) +8000041c: 00f20863 beq x4,x15,8000042c +80000420: 120052ef jal x5,80005540 +80000424: 80000414 .word 0x80000414 +80000428: 80009436 .word 0x80009436 +8000042c: 004e8e93 addi x29,x29,4 + + mv x25, x22 # switch data pointer register to avoid conflict with test +80000430: 000b0c93 addi x25,x22,0 +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xdf4c6763 +80000434: 000cab03 lw x22,0(x25) +80000438: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x7a7e56f3 +8000043c: 000cad83 lw x27,0(x25) +80000440: 004c8c93 addi x25,x25,4 + +80000444 : +Zbkx_xperm4_cg_cp_rs1_b22: + xperm4 x12, x22, x27 # perform operation +80000444: 29bb2633 xperm4 x12,x22,x27 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zbkx_xperm4_cg_cp_rs1_b22, Zbkx_xperm4_cg_cp_rs1_b22_str) +80000448: 000ea203 lw x4,0(x29) +8000044c: 00c20863 beq x4,x12,8000045c +80000450: 0f0052ef jal x5,80005540 +80000454: 80000444 .word 0x80000444 +80000458: 8000946b .word 0x8000946b +8000045c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x5b36dc69 +80000460: 000cab83 lw x23,0(x25) +80000464: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x86aefa12 +80000468: 000ca603 lw x12,0(x25) +8000046c: 004c8c93 addi x25,x25,4 + +80000470 : +Zbkx_xperm4_cg_cp_rs1_b23: + xperm4 x1, x23, x12 # perform operation +80000470: 28cba0b3 xperm4 x1,x23,x12 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zbkx_xperm4_cg_cp_rs1_b23, Zbkx_xperm4_cg_cp_rs1_b23_str) +80000474: 000ea203 lw x4,0(x29) +80000478: 00120863 beq x4,x1,80000488 +8000047c: 0c4052ef jal x5,80005540 +80000480: 80000470 .word 0x80000470 +80000484: 800094a0 .word 0x800094a0 +80000488: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xc34b0f3c +8000048c: 000cac03 lw x24,0(x25) +80000490: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0xc05ef979 +80000494: 000cad03 lw x26,0(x25) +80000498: 004c8c93 addi x25,x25,4 + +8000049c : +Zbkx_xperm4_cg_cp_rs1_b24: + xperm4 x2, x24, x26 # perform operation +8000049c: 29ac2133 xperm4 x2,x24,x26 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zbkx_xperm4_cg_cp_rs1_b24, Zbkx_xperm4_cg_cp_rs1_b24_str) +800004a0: 000ea203 lw x4,0(x29) +800004a4: 00220863 beq x4,x2,800004b4 +800004a8: 098052ef jal x5,80005540 +800004ac: 8000049c .word 0x8000049c +800004b0: 800094d5 .word 0x800094d5 +800004b4: 004e8e93 addi x29,x29,4 + + mv x20, x25 # switch data pointer register to avoid conflict with test +800004b8: 000c8a13 addi x20,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x846b32fc +800004bc: 000a2c83 lw x25,0(x20) +800004c0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x2587caa2 +800004c4: 000a2d03 lw x26,0(x20) +800004c8: 004a0a13 addi x20,x20,4 + +800004cc : +Zbkx_xperm4_cg_cp_rs1_b25: + xperm4 x28, x25, x26 # perform operation +800004cc: 29acae33 xperm4 x28,x25,x26 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_b25, Zbkx_xperm4_cg_cp_rs1_b25_str) +800004d0: 000ea203 lw x4,0(x29) +800004d4: 01c20863 beq x4,x28,800004e4 +800004d8: 068052ef jal x5,80005540 +800004dc: 800004cc .word 0x800004cc +800004e0: 8000950a .word 0x8000950a +800004e4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x2bf80b70 +800004e8: 000a2d03 lw x26,0(x20) +800004ec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x728b5ebb +800004f0: 000a2783 lw x15,0(x20) +800004f4: 004a0a13 addi x20,x20,4 + +800004f8 : +Zbkx_xperm4_cg_cp_rs1_b26: + xperm4 x0, x26, x15 # perform operation +800004f8: 28fd2033 xperm4 x0,x26,x15 + # Check if x0 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x0, Zbkx_xperm4_cg_cp_rs1_b26, Zbkx_xperm4_cg_cp_rs1_b26_str) +800004fc: 000ea203 lw x4,0(x29) +80000500: 00020863 beq x4,x0,80000510 +80000504: 03c052ef jal x5,80005540 +80000508: 800004f8 .word 0x800004f8 +8000050c: 8000953f .word 0x8000953f +80000510: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0xf2141278 +80000514: 000a2d83 lw x27,0(x20) +80000518: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x38111e4a +8000051c: 000a2483 lw x9,0(x20) +80000520: 004a0a13 addi x20,x20,4 + +80000524 : +Zbkx_xperm4_cg_cp_rs1_b27: + xperm4 x11, x27, x9 # perform operation +80000524: 289da5b3 xperm4 x11,x27,x9 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zbkx_xperm4_cg_cp_rs1_b27, Zbkx_xperm4_cg_cp_rs1_b27_str) +80000528: 000ea203 lw x4,0(x29) +8000052c: 00b20863 beq x4,x11,8000053c +80000530: 010052ef jal x5,80005540 +80000534: 80000524 .word 0x80000524 +80000538: 80009574 .word 0x80009574 +8000053c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xf63817aa +80000540: 000a2e03 lw x28,0(x20) +80000544: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xfa8321fa +80000548: 000a2583 lw x11,0(x20) +8000054c: 004a0a13 addi x20,x20,4 + +80000550 : +Zbkx_xperm4_cg_cp_rs1_b28: + xperm4 x3, x28, x11 # perform operation +80000550: 28be21b3 xperm4 x3,x28,x11 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zbkx_xperm4_cg_cp_rs1_b28, Zbkx_xperm4_cg_cp_rs1_b28_str) +80000554: 000ea203 lw x4,0(x29) +80000558: 00320863 beq x4,x3,80000568 +8000055c: 7e5042ef jal x5,80005540 +80000560: 80000550 .word 0x80000550 +80000564: 800095a9 .word 0x800095a9 +80000568: 004e8e93 addi x29,x29,4 + + mv x6, x29 # switch signature pointer register to avoid conflict with test +8000056c: 000e8313 addi x6,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x665ac43c +80000570: 000a2e83 lw x29,0(x20) +80000574: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xffa29bc7 +80000578: 000a2403 lw x8,0(x20) +8000057c: 004a0a13 addi x20,x20,4 + +80000580 : +Zbkx_xperm4_cg_cp_rs1_b29: + xperm4 x12, x29, x8 # perform operation +80000580: 288ea633 xperm4 x12,x29,x8 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkx_xperm4_cg_cp_rs1_b29, Zbkx_xperm4_cg_cp_rs1_b29_str) +80000584: 00032203 lw x4,0(x6) +80000588: 00c20863 beq x4,x12,80000598 +8000058c: 7b5042ef jal x5,80005540 +80000590: 80000580 .word 0x80000580 +80000594: 800095de .word 0x800095de +80000598: 00430313 addi x6,x6,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x547ee7c1 +8000059c: 000a2f03 lw x30,0(x20) +800005a0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x48043f20 +800005a4: 000a2c83 lw x25,0(x20) +800005a8: 004a0a13 addi x20,x20,4 + +800005ac : +Zbkx_xperm4_cg_cp_rs1_b30: + xperm4 x29, x30, x25 # perform operation +800005ac: 299f2eb3 xperm4 x29,x30,x25 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkx_xperm4_cg_cp_rs1_b30, Zbkx_xperm4_cg_cp_rs1_b30_str) +800005b0: 00032203 lw x4,0(x6) +800005b4: 01d20863 beq x4,x29,800005c4 +800005b8: 789042ef jal x5,80005540 +800005bc: 800005ac .word 0x800005ac +800005c0: 80009613 .word 0x80009613 +800005c4: 00430313 addi x6,x6,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xb0fc3d9e +800005c8: 000a2f83 lw x31,0(x20) +800005cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x55c79ecf +800005d0: 000a2603 lw x12,0(x20) +800005d4: 004a0a13 addi x20,x20,4 + +800005d8 : +Zbkx_xperm4_cg_cp_rs1_b31: + xperm4 x16, x31, x12 # perform operation +800005d8: 28cfa833 xperm4 x16,x31,x12 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkx_xperm4_cg_cp_rs1_b31, Zbkx_xperm4_cg_cp_rs1_b31_str) +800005dc: 00032203 lw x4,0(x6) +800005e0: 01020863 beq x4,x16,800005f0 +800005e4: 75d042ef jal x5,80005540 +800005e8: 800005d8 .word 0x800005d8 +800005ec: 80009648 .word 0x80009648 +800005f0: 00430313 addi x6,x6,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x999c9661 +800005f4: 000a2803 lw x16,0(x20) +800005f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x78b3e560 +800005fc: 000a2003 lw x0,0(x20) +80000600: 004a0a13 addi x20,x20,4 + +80000604 : +Zbkx_xperm4_cg_cp_rs2_b0: + xperm4 x30, x16, x0 # perform operation +80000604: 28082f33 xperm4 x30,x16,x0 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkx_xperm4_cg_cp_rs2_b0, Zbkx_xperm4_cg_cp_rs2_b0_str) +80000608: 00032203 lw x4,0(x6) +8000060c: 01e20863 beq x4,x30,8000061c +80000610: 731042ef jal x5,80005540 +80000614: 80000604 .word 0x80000604 +80000618: 8000967d .word 0x8000967d +8000061c: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x7a63dadd +80000620: 000a2403 lw x8,0(x20) +80000624: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x5dde6398 +80000628: 000a2083 lw x1,0(x20) +8000062c: 004a0a13 addi x20,x20,4 + +80000630 : +Zbkx_xperm4_cg_cp_rs2_b1: + xperm4 x3, x8, x1 # perform operation +80000630: 281421b3 xperm4 x3,x8,x1 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zbkx_xperm4_cg_cp_rs2_b1, Zbkx_xperm4_cg_cp_rs2_b1_str) +80000634: 00032203 lw x4,0(x6) +80000638: 00320863 beq x4,x3,80000648 +8000063c: 705042ef jal x5,80005540 +80000640: 80000630 .word 0x80000630 +80000644: 800096b1 .word 0x800096b1 +80000648: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x180e2680 +8000064c: 000a2783 lw x15,0(x20) +80000650: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xd9b48b3b +80000654: 000a2103 lw x2,0(x20) +80000658: 004a0a13 addi x20,x20,4 + +8000065c : +Zbkx_xperm4_cg_cp_rs2_b2: + xperm4 x29, x15, x2 # perform operation +8000065c: 2827aeb3 xperm4 x29,x15,x2 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkx_xperm4_cg_cp_rs2_b2, Zbkx_xperm4_cg_cp_rs2_b2_str) +80000660: 00032203 lw x4,0(x6) +80000664: 01d20863 beq x4,x29,80000674 +80000668: 6d9042ef jal x5,80005540 +8000066c: 8000065c .word 0x8000065c +80000670: 800096e5 .word 0x800096e5 +80000674: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x84f58bfc +80000678: 000a2003 lw x0,0(x20) +8000067c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xb61df650 +80000680: 000a2183 lw x3,0(x20) +80000684: 004a0a13 addi x20,x20,4 + +80000688 : +Zbkx_xperm4_cg_cp_rs2_b3: + xperm4 x13, x0, x3 # perform operation +80000688: 283026b3 xperm4 x13,x0,x3 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zbkx_xperm4_cg_cp_rs2_b3, Zbkx_xperm4_cg_cp_rs2_b3_str) +8000068c: 00032203 lw x4,0(x6) +80000690: 00d20863 beq x4,x13,800006a0 +80000694: 6ad042ef jal x5,80005540 +80000698: 80000688 .word 0x80000688 +8000069c: 80009719 .word 0x80009719 +800006a0: 00430313 addi x6,x6,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800006a4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800006a8: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x40c383f8 +800006ac: 000a2803 lw x16,0(x20) +800006b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x653a9b15 +800006b4: 000a2203 lw x4,0(x20) +800006b8: 004a0a13 addi x20,x20,4 + +800006bc : +Zbkx_xperm4_cg_cp_rs2_b4: + xperm4 x8, x16, x4 # perform operation +800006bc: 28482433 xperm4 x8,x16,x4 + # Check if x8 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x8, Zbkx_xperm4_cg_cp_rs2_b4, Zbkx_xperm4_cg_cp_rs2_b4_str) +800006c0: 00032683 lw x13,0(x6) +800006c4: 00868863 beq x13,x8,800006d4 +800006c8: 6b90476f jal x14,80005580 +800006cc: 800006bc .word 0x800006bc +800006d0: 8000974d .word 0x8000974d +800006d4: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x61686017 +800006d8: 000a2583 lw x11,0(x20) +800006dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x587b4e29 +800006e0: 000a2283 lw x5,0(x20) +800006e4: 004a0a13 addi x20,x20,4 + +800006e8 : +Zbkx_xperm4_cg_cp_rs2_b5: + xperm4 x2, x11, x5 # perform operation +800006e8: 2855a133 xperm4 x2,x11,x5 + # Check if x2 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x2, Zbkx_xperm4_cg_cp_rs2_b5, Zbkx_xperm4_cg_cp_rs2_b5_str) +800006ec: 00032683 lw x13,0(x6) +800006f0: 00268863 beq x13,x2,80000700 +800006f4: 68d0476f jal x14,80005580 +800006f8: 800006e8 .word 0x800006e8 +800006fc: 80009781 .word 0x80009781 +80000700: 00430313 addi x6,x6,4 + + mv x24, x6 # switch signature pointer register to avoid conflict with test +80000704: 00030c13 addi x24,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x3d81524d +80000708: 000a2a83 lw x21,0(x20) +8000070c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xd7a00df8 +80000710: 000a2303 lw x6,0(x20) +80000714: 004a0a13 addi x20,x20,4 + +80000718 : +Zbkx_xperm4_cg_cp_rs2_b6: + xperm4 x16, x21, x6 # perform operation +80000718: 286aa833 xperm4 x16,x21,x6 + # Check if x16 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x16, Zbkx_xperm4_cg_cp_rs2_b6, Zbkx_xperm4_cg_cp_rs2_b6_str) +8000071c: 000c2683 lw x13,0(x24) +80000720: 01068863 beq x13,x16,80000730 +80000724: 65d0476f jal x14,80005580 +80000728: 80000718 .word 0x80000718 +8000072c: 800097b5 .word 0x800097b5 +80000730: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xa220e5d3 +80000734: 000a2b83 lw x23,0(x20) +80000738: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x1ab5f89e +8000073c: 000a2383 lw x7,0(x20) +80000740: 004a0a13 addi x20,x20,4 + +80000744 : +Zbkx_xperm4_cg_cp_rs2_b7: + xperm4 x4, x23, x7 # perform operation +80000744: 287ba233 xperm4 x4,x23,x7 + # Check if x4 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x4, Zbkx_xperm4_cg_cp_rs2_b7, Zbkx_xperm4_cg_cp_rs2_b7_str) +80000748: 000c2683 lw x13,0(x24) +8000074c: 00468863 beq x13,x4,8000075c +80000750: 6310476f jal x14,80005580 +80000754: 80000744 .word 0x80000744 +80000758: 800097e9 .word 0x800097e9 +8000075c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x23ded22a +80000760: 000a2e03 lw x28,0(x20) +80000764: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xd62c70d0 +80000768: 000a2403 lw x8,0(x20) +8000076c: 004a0a13 addi x20,x20,4 + +80000770 : +Zbkx_xperm4_cg_cp_rs2_b8: + xperm4 x31, x28, x8 # perform operation +80000770: 288e2fb3 xperm4 x31,x28,x8 + # Check if x31 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x31, Zbkx_xperm4_cg_cp_rs2_b8, Zbkx_xperm4_cg_cp_rs2_b8_str) +80000774: 000c2683 lw x13,0(x24) +80000778: 01f68863 beq x13,x31,80000788 +8000077c: 6050476f jal x14,80005580 +80000780: 80000770 .word 0x80000770 +80000784: 8000981d .word 0x8000981d +80000788: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0xe4f8a189 +8000078c: 000a2d03 lw x26,0(x20) +80000790: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xe66d9fce +80000794: 000a2483 lw x9,0(x20) +80000798: 004a0a13 addi x20,x20,4 + +8000079c : +Zbkx_xperm4_cg_cp_rs2_b9: + xperm4 x5, x26, x9 # perform operation +8000079c: 289d22b3 xperm4 x5,x26,x9 + # Check if x5 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x5, Zbkx_xperm4_cg_cp_rs2_b9, Zbkx_xperm4_cg_cp_rs2_b9_str) +800007a0: 000c2683 lw x13,0(x24) +800007a4: 00568863 beq x13,x5,800007b4 +800007a8: 5d90476f jal x14,80005580 +800007ac: 8000079c .word 0x8000079c +800007b0: 80009851 .word 0x80009851 +800007b4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x55f99536 +800007b8: 000a2c83 lw x25,0(x20) +800007bc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xdf492204 +800007c0: 000a2503 lw x10,0(x20) +800007c4: 004a0a13 addi x20,x20,4 + +800007c8 : +Zbkx_xperm4_cg_cp_rs2_b10: + xperm4 x28, x25, x10 # perform operation +800007c8: 28acae33 xperm4 x28,x25,x10 + # Check if x28 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x28, Zbkx_xperm4_cg_cp_rs2_b10, Zbkx_xperm4_cg_cp_rs2_b10_str) +800007cc: 000c2683 lw x13,0(x24) +800007d0: 01c68863 beq x13,x28,800007e0 +800007d4: 5ad0476f jal x14,80005580 +800007d8: 800007c8 .word 0x800007c8 +800007dc: 80009885 .word 0x80009885 +800007e0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xfc35d7a0 +800007e4: 000a2c83 lw x25,0(x20) +800007e8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x7e43d487 +800007ec: 000a2583 lw x11,0(x20) +800007f0: 004a0a13 addi x20,x20,4 + +800007f4 : +Zbkx_xperm4_cg_cp_rs2_b11: + xperm4 x18, x25, x11 # perform operation +800007f4: 28bca933 xperm4 x18,x25,x11 + # Check if x18 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x18, Zbkx_xperm4_cg_cp_rs2_b11, Zbkx_xperm4_cg_cp_rs2_b11_str) +800007f8: 000c2683 lw x13,0(x24) +800007fc: 01268863 beq x13,x18,8000080c +80000800: 5810476f jal x14,80005580 +80000804: 800007f4 .word 0x800007f4 +80000808: 800098ba .word 0x800098ba +8000080c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x94628c67 +80000810: 000a2f83 lw x31,0(x20) +80000814: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xc6a192d3 +80000818: 000a2603 lw x12,0(x20) +8000081c: 004a0a13 addi x20,x20,4 + +80000820 : +Zbkx_xperm4_cg_cp_rs2_b12: + xperm4 x18, x31, x12 # perform operation +80000820: 28cfa933 xperm4 x18,x31,x12 + # Check if x18 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x18, Zbkx_xperm4_cg_cp_rs2_b12, Zbkx_xperm4_cg_cp_rs2_b12_str) +80000824: 000c2683 lw x13,0(x24) +80000828: 01268863 beq x13,x18,80000838 +8000082c: 5550476f jal x14,80005580 +80000830: 80000820 .word 0x80000820 +80000834: 800098ef .word 0x800098ef +80000838: 004c0c13 addi x24,x24,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000083c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000840: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x80e4411f +80000844: 000a2e83 lw x29,0(x20) +80000848: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x58397e35 +8000084c: 000a2683 lw x13,0(x20) +80000850: 004a0a13 addi x20,x20,4 + +80000854 : +Zbkx_xperm4_cg_cp_rs2_b13: + xperm4 x10, x29, x13 # perform operation +80000854: 28dea533 xperm4 x10,x29,x13 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zbkx_xperm4_cg_cp_rs2_b13, Zbkx_xperm4_cg_cp_rs2_b13_str) +80000858: 000c2203 lw x4,0(x24) +8000085c: 00a20863 beq x4,x10,8000086c +80000860: 4e1042ef jal x5,80005540 +80000864: 80000854 .word 0x80000854 +80000868: 80009924 .word 0x80009924 +8000086c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x1109bbea +80000870: 000a2903 lw x18,0(x20) +80000874: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xef4f70cd +80000878: 000a2703 lw x14,0(x20) +8000087c: 004a0a13 addi x20,x20,4 + +80000880 : +Zbkx_xperm4_cg_cp_rs2_b14: + xperm4 x2, x18, x14 # perform operation +80000880: 28e92133 xperm4 x2,x18,x14 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zbkx_xperm4_cg_cp_rs2_b14, Zbkx_xperm4_cg_cp_rs2_b14_str) +80000884: 000c2203 lw x4,0(x24) +80000888: 00220863 beq x4,x2,80000898 +8000088c: 4b5042ef jal x5,80005540 +80000890: 80000880 .word 0x80000880 +80000894: 80009959 .word 0x80009959 +80000898: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xe68c0a8e +8000089c: 000a2583 lw x11,0(x20) +800008a0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xc4f533f2 +800008a4: 000a2783 lw x15,0(x20) +800008a8: 004a0a13 addi x20,x20,4 + +800008ac : +Zbkx_xperm4_cg_cp_rs2_b15: + xperm4 x7, x11, x15 # perform operation +800008ac: 28f5a3b3 xperm4 x7,x11,x15 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zbkx_xperm4_cg_cp_rs2_b15, Zbkx_xperm4_cg_cp_rs2_b15_str) +800008b0: 000c2203 lw x4,0(x24) +800008b4: 00720863 beq x4,x7,800008c4 +800008b8: 489042ef jal x5,80005540 +800008bc: 800008ac .word 0x800008ac +800008c0: 8000998e .word 0x8000998e +800008c4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xc6e42417 +800008c8: 000a2e03 lw x28,0(x20) +800008cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x53e1d321 +800008d0: 000a2803 lw x16,0(x20) +800008d4: 004a0a13 addi x20,x20,4 + +800008d8 : +Zbkx_xperm4_cg_cp_rs2_b16: + xperm4 x14, x28, x16 # perform operation +800008d8: 290e2733 xperm4 x14,x28,x16 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zbkx_xperm4_cg_cp_rs2_b16, Zbkx_xperm4_cg_cp_rs2_b16_str) +800008dc: 000c2203 lw x4,0(x24) +800008e0: 00e20863 beq x4,x14,800008f0 +800008e4: 45d042ef jal x5,80005540 +800008e8: 800008d8 .word 0x800008d8 +800008ec: 800099c3 .word 0x800099c3 +800008f0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x60f79242 +800008f4: 000a2983 lw x19,0(x20) +800008f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xd12db713 +800008fc: 000a2883 lw x17,0(x20) +80000900: 004a0a13 addi x20,x20,4 + +80000904 : +Zbkx_xperm4_cg_cp_rs2_b17: + xperm4 x12, x19, x17 # perform operation +80000904: 2919a633 xperm4 x12,x19,x17 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zbkx_xperm4_cg_cp_rs2_b17, Zbkx_xperm4_cg_cp_rs2_b17_str) +80000908: 000c2203 lw x4,0(x24) +8000090c: 00c20863 beq x4,x12,8000091c +80000910: 431042ef jal x5,80005540 +80000914: 80000904 .word 0x80000904 +80000918: 800099f8 .word 0x800099f8 +8000091c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xab7d2d38 +80000920: 000a2503 lw x10,0(x20) +80000924: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x9e88492f +80000928: 000a2903 lw x18,0(x20) +8000092c: 004a0a13 addi x20,x20,4 + +80000930 : +Zbkx_xperm4_cg_cp_rs2_b18: + xperm4 x28, x10, x18 # perform operation +80000930: 29252e33 xperm4 x28,x10,x18 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zbkx_xperm4_cg_cp_rs2_b18, Zbkx_xperm4_cg_cp_rs2_b18_str) +80000934: 000c2203 lw x4,0(x24) +80000938: 01c20863 beq x4,x28,80000948 +8000093c: 405042ef jal x5,80005540 +80000940: 80000930 .word 0x80000930 +80000944: 80009a2d .word 0x80009a2d +80000948: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x8dc5779c +8000094c: 000a2f83 lw x31,0(x20) +80000950: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x1bdac343 +80000954: 000a2983 lw x19,0(x20) +80000958: 004a0a13 addi x20,x20,4 + +8000095c : +Zbkx_xperm4_cg_cp_rs2_b19: + xperm4 x2, x31, x19 # perform operation +8000095c: 293fa133 xperm4 x2,x31,x19 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zbkx_xperm4_cg_cp_rs2_b19, Zbkx_xperm4_cg_cp_rs2_b19_str) +80000960: 000c2203 lw x4,0(x24) +80000964: 00220863 beq x4,x2,80000974 +80000968: 3d9042ef jal x5,80005540 +8000096c: 8000095c .word 0x8000095c +80000970: 80009a62 .word 0x80009a62 +80000974: 004c0c13 addi x24,x24,4 + + mv x21, x20 # switch data pointer register to avoid conflict with test +80000978: 000a0a93 addi x21,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x59850653 +8000097c: 000aab03 lw x22,0(x21) +80000980: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xb044dc2a +80000984: 000aaa03 lw x20,0(x21) +80000988: 004a8a93 addi x21,x21,4 + +8000098c : +Zbkx_xperm4_cg_cp_rs2_b20: + xperm4 x7, x22, x20 # perform operation +8000098c: 294b23b3 xperm4 x7,x22,x20 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zbkx_xperm4_cg_cp_rs2_b20, Zbkx_xperm4_cg_cp_rs2_b20_str) +80000990: 000c2203 lw x4,0(x24) +80000994: 00720863 beq x4,x7,800009a4 +80000998: 3a9042ef jal x5,80005540 +8000099c: 8000098c .word 0x8000098c +800009a0: 80009a97 .word 0x80009a97 +800009a4: 004c0c13 addi x24,x24,4 + + mv x16, x21 # switch data pointer register to avoid conflict with test +800009a8: 000a8813 addi x16,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x97455b5e +800009ac: 00082d03 lw x26,0(x16) +800009b0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x2c183cb1 +800009b4: 00082a83 lw x21,0(x16) +800009b8: 00480813 addi x16,x16,4 + +800009bc : +Zbkx_xperm4_cg_cp_rs2_b21: + xperm4 x0, x26, x21 # perform operation +800009bc: 295d2033 xperm4 x0,x26,x21 + # Check if x0 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x0, Zbkx_xperm4_cg_cp_rs2_b21, Zbkx_xperm4_cg_cp_rs2_b21_str) +800009c0: 000c2203 lw x4,0(x24) +800009c4: 00020863 beq x4,x0,800009d4 +800009c8: 379042ef jal x5,80005540 +800009cc: 800009bc .word 0x800009bc +800009d0: 80009acc .word 0x80009acc +800009d4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x602d874a +800009d8: 00082f83 lw x31,0(x16) +800009dc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x76b155bc +800009e0: 00082b03 lw x22,0(x16) +800009e4: 00480813 addi x16,x16,4 + +800009e8 : +Zbkx_xperm4_cg_cp_rs2_b22: + xperm4 x30, x31, x22 # perform operation +800009e8: 296faf33 xperm4 x30,x31,x22 + # Check if x30 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x30, Zbkx_xperm4_cg_cp_rs2_b22, Zbkx_xperm4_cg_cp_rs2_b22_str) +800009ec: 000c2203 lw x4,0(x24) +800009f0: 01e20863 beq x4,x30,80000a00 +800009f4: 34d042ef jal x5,80005540 +800009f8: 800009e8 .word 0x800009e8 +800009fc: 80009b01 .word 0x80009b01 +80000a00: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x8a092fa2 +80000a04: 00082603 lw x12,0(x16) +80000a08: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xb0c21af5 +80000a0c: 00082b83 lw x23,0(x16) +80000a10: 00480813 addi x16,x16,4 + +80000a14 : +Zbkx_xperm4_cg_cp_rs2_b23: + xperm4 x19, x12, x23 # perform operation +80000a14: 297629b3 xperm4 x19,x12,x23 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zbkx_xperm4_cg_cp_rs2_b23, Zbkx_xperm4_cg_cp_rs2_b23_str) +80000a18: 000c2203 lw x4,0(x24) +80000a1c: 01320863 beq x4,x19,80000a2c +80000a20: 321042ef jal x5,80005540 +80000a24: 80000a14 .word 0x80000a14 +80000a28: 80009b36 .word 0x80009b36 +80000a2c: 004c0c13 addi x24,x24,4 + + mv x2, x24 # switch signature pointer register to avoid conflict with test +80000a30: 000c0113 addi x2,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x4e82b125 +80000a34: 00082583 lw x11,0(x16) +80000a38: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x7ff6db6e +80000a3c: 00082c03 lw x24,0(x16) +80000a40: 00480813 addi x16,x16,4 + +80000a44 : +Zbkx_xperm4_cg_cp_rs2_b24: + xperm4 x31, x11, x24 # perform operation +80000a44: 2985afb3 xperm4 x31,x11,x24 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkx_xperm4_cg_cp_rs2_b24, Zbkx_xperm4_cg_cp_rs2_b24_str) +80000a48: 00012203 lw x4,0(x2) +80000a4c: 01f20863 beq x4,x31,80000a5c +80000a50: 2f1042ef jal x5,80005540 +80000a54: 80000a44 .word 0x80000a44 +80000a58: 80009b6b .word 0x80009b6b +80000a5c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x314cf838 +80000a60: 00082d03 lw x26,0(x16) +80000a64: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xe6923789 +80000a68: 00082c83 lw x25,0(x16) +80000a6c: 00480813 addi x16,x16,4 + +80000a70 : +Zbkx_xperm4_cg_cp_rs2_b25: + xperm4 x28, x26, x25 # perform operation +80000a70: 299d2e33 xperm4 x28,x26,x25 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkx_xperm4_cg_cp_rs2_b25, Zbkx_xperm4_cg_cp_rs2_b25_str) +80000a74: 00012203 lw x4,0(x2) +80000a78: 01c20863 beq x4,x28,80000a88 +80000a7c: 2c5042ef jal x5,80005540 +80000a80: 80000a70 .word 0x80000a70 +80000a84: 80009ba0 .word 0x80009ba0 +80000a88: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x75f68ced +80000a8c: 00082f03 lw x30,0(x16) +80000a90: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x9f2006ad +80000a94: 00082d03 lw x26,0(x16) +80000a98: 00480813 addi x16,x16,4 + +80000a9c : +Zbkx_xperm4_cg_cp_rs2_b26: + xperm4 x22, x30, x26 # perform operation +80000a9c: 29af2b33 xperm4 x22,x30,x26 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkx_xperm4_cg_cp_rs2_b26, Zbkx_xperm4_cg_cp_rs2_b26_str) +80000aa0: 00012203 lw x4,0(x2) +80000aa4: 01620863 beq x4,x22,80000ab4 +80000aa8: 299042ef jal x5,80005540 +80000aac: 80000a9c .word 0x80000a9c +80000ab0: 80009bd5 .word 0x80009bd5 +80000ab4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xd38adbd4 +80000ab8: 00082f03 lw x30,0(x16) +80000abc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x37d8b6b0 +80000ac0: 00082d83 lw x27,0(x16) +80000ac4: 00480813 addi x16,x16,4 + +80000ac8 : +Zbkx_xperm4_cg_cp_rs2_b27: + xperm4 x23, x30, x27 # perform operation +80000ac8: 29bf2bb3 xperm4 x23,x30,x27 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkx_xperm4_cg_cp_rs2_b27, Zbkx_xperm4_cg_cp_rs2_b27_str) +80000acc: 00012203 lw x4,0(x2) +80000ad0: 01720863 beq x4,x23,80000ae0 +80000ad4: 26d042ef jal x5,80005540 +80000ad8: 80000ac8 .word 0x80000ac8 +80000adc: 80009c0a .word 0x80009c0a +80000ae0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x49041308 +80000ae4: 00082503 lw x10,0(x16) +80000ae8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x5756357e +80000aec: 00082e03 lw x28,0(x16) +80000af0: 00480813 addi x16,x16,4 + +80000af4 : +Zbkx_xperm4_cg_cp_rs2_b28: + xperm4 x23, x10, x28 # perform operation +80000af4: 29c52bb3 xperm4 x23,x10,x28 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkx_xperm4_cg_cp_rs2_b28, Zbkx_xperm4_cg_cp_rs2_b28_str) +80000af8: 00012203 lw x4,0(x2) +80000afc: 01720863 beq x4,x23,80000b0c +80000b00: 241042ef jal x5,80005540 +80000b04: 80000af4 .word 0x80000af4 +80000b08: 80009c3f .word 0x80009c3f +80000b0c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x88760a1e +80000b10: 00082303 lw x6,0(x16) +80000b14: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x31adec96 +80000b18: 00082e83 lw x29,0(x16) +80000b1c: 00480813 addi x16,x16,4 + +80000b20 : +Zbkx_xperm4_cg_cp_rs2_b29: + xperm4 x26, x6, x29 # perform operation +80000b20: 29d32d33 xperm4 x26,x6,x29 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkx_xperm4_cg_cp_rs2_b29, Zbkx_xperm4_cg_cp_rs2_b29_str) +80000b24: 00012203 lw x4,0(x2) +80000b28: 01a20863 beq x4,x26,80000b38 +80000b2c: 215042ef jal x5,80005540 +80000b30: 80000b20 .word 0x80000b20 +80000b34: 80009c74 .word 0x80009c74 +80000b38: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x78e94cb7 +80000b3c: 00082583 lw x11,0(x16) +80000b40: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xbcc53887 +80000b44: 00082f03 lw x30,0(x16) +80000b48: 00480813 addi x16,x16,4 + +80000b4c : +Zbkx_xperm4_cg_cp_rs2_b30: + xperm4 x10, x11, x30 # perform operation +80000b4c: 29e5a533 xperm4 x10,x11,x30 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zbkx_xperm4_cg_cp_rs2_b30, Zbkx_xperm4_cg_cp_rs2_b30_str) +80000b50: 00012203 lw x4,0(x2) +80000b54: 00a20863 beq x4,x10,80000b64 +80000b58: 1e9042ef jal x5,80005540 +80000b5c: 80000b4c .word 0x80000b4c +80000b60: 80009ca9 .word 0x80009ca9 +80000b64: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xd2df9305 +80000b68: 00082483 lw x9,0(x16) +80000b6c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xbd33e037 +80000b70: 00082f83 lw x31,0(x16) +80000b74: 00480813 addi x16,x16,4 + +80000b78 : +Zbkx_xperm4_cg_cp_rs2_b31: + xperm4 x23, x9, x31 # perform operation +80000b78: 29f4abb3 xperm4 x23,x9,x31 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkx_xperm4_cg_cp_rs2_b31, Zbkx_xperm4_cg_cp_rs2_b31_str) +80000b7c: 00012203 lw x4,0(x2) +80000b80: 01720863 beq x4,x23,80000b90 +80000b84: 1bd042ef jal x5,80005540 +80000b88: 80000b78 .word 0x80000b78 +80000b8c: 80009cde .word 0x80009cde +80000b90: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x28d214f0 +80000b94: 00082683 lw x13,0(x16) +80000b98: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x9a2e6517 +80000b9c: 00082c83 lw x25,0(x16) +80000ba0: 00480813 addi x16,x16,4 + +80000ba4 : +Zbkx_xperm4_cg_cp_rd_b0: + xperm4 x0, x13, x25 # perform operation +80000ba4: 2996a033 xperm4 x0,x13,x25 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkx_xperm4_cg_cp_rd_b0, Zbkx_xperm4_cg_cp_rd_b0_str) +80000ba8: 00012203 lw x4,0(x2) +80000bac: 00020863 beq x4,x0,80000bbc +80000bb0: 191042ef jal x5,80005540 +80000bb4: 80000ba4 .word 0x80000ba4 +80000bb8: 80009d13 .word 0x80009d13 +80000bbc: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x126932dc +80000bc0: 00082e03 lw x28,0(x16) +80000bc4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x6d540704 +80000bc8: 00082603 lw x12,0(x16) +80000bcc: 00480813 addi x16,x16,4 + +80000bd0 : +Zbkx_xperm4_cg_cp_rd_b1: + xperm4 x1, x28, x12 # perform operation +80000bd0: 28ce20b3 xperm4 x1,x28,x12 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkx_xperm4_cg_cp_rd_b1, Zbkx_xperm4_cg_cp_rd_b1_str) +80000bd4: 00012203 lw x4,0(x2) +80000bd8: 00120863 beq x4,x1,80000be8 +80000bdc: 165042ef jal x5,80005540 +80000be0: 80000bd0 .word 0x80000bd0 +80000be4: 80009d46 .word 0x80009d46 +80000be8: 00410113 addi x2,x2,4 + + mv x18, x2 # switch signature pointer register to avoid conflict with test +80000bec: 00010913 addi x18,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xeb249f5a +80000bf0: 00082583 lw x11,0(x16) +80000bf4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x3e4e89db +80000bf8: 00082a03 lw x20,0(x16) +80000bfc: 00480813 addi x16,x16,4 + +80000c00 : +Zbkx_xperm4_cg_cp_rd_b2: + xperm4 x2, x11, x20 # perform operation +80000c00: 2945a133 xperm4 x2,x11,x20 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkx_xperm4_cg_cp_rd_b2, Zbkx_xperm4_cg_cp_rd_b2_str) +80000c04: 00092203 lw x4,0(x18) +80000c08: 00220863 beq x4,x2,80000c18 +80000c0c: 135042ef jal x5,80005540 +80000c10: 80000c00 .word 0x80000c00 +80000c14: 80009d79 .word 0x80009d79 +80000c18: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x028cbc3d +80000c1c: 00082603 lw x12,0(x16) +80000c20: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x3fbb2047 +80000c24: 00082a03 lw x20,0(x16) +80000c28: 00480813 addi x16,x16,4 + +80000c2c : +Zbkx_xperm4_cg_cp_rd_b3: + xperm4 x3, x12, x20 # perform operation +80000c2c: 294621b3 xperm4 x3,x12,x20 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkx_xperm4_cg_cp_rd_b3, Zbkx_xperm4_cg_cp_rd_b3_str) +80000c30: 00092203 lw x4,0(x18) +80000c34: 00320863 beq x4,x3,80000c44 +80000c38: 109042ef jal x5,80005540 +80000c3c: 80000c2c .word 0x80000c2c +80000c40: 80009dac .word 0x80009dac +80000c44: 00490913 addi x18,x18,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c48: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c4c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x3191c2d3 +80000c50: 00082b03 lw x22,0(x16) +80000c54: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xa29537c5 +80000c58: 00082c83 lw x25,0(x16) +80000c5c: 00480813 addi x16,x16,4 + +80000c60 : +Zbkx_xperm4_cg_cp_rd_b4: + xperm4 x4, x22, x25 # perform operation +80000c60: 299b2233 xperm4 x4,x22,x25 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkx_xperm4_cg_cp_rd_b4, Zbkx_xperm4_cg_cp_rd_b4_str) +80000c64: 00092683 lw x13,0(x18) +80000c68: 00468863 beq x13,x4,80000c78 +80000c6c: 1150476f jal x14,80005580 +80000c70: 80000c60 .word 0x80000c60 +80000c74: 80009ddf .word 0x80009ddf +80000c78: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xc1a11d6b +80000c7c: 00082083 lw x1,0(x16) +80000c80: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x80bd7658 +80000c84: 00082183 lw x3,0(x16) +80000c88: 00480813 addi x16,x16,4 + +80000c8c : +Zbkx_xperm4_cg_cp_rd_b5: + xperm4 x5, x1, x3 # perform operation +80000c8c: 2830a2b3 xperm4 x5,x1,x3 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkx_xperm4_cg_cp_rd_b5, Zbkx_xperm4_cg_cp_rd_b5_str) +80000c90: 00092683 lw x13,0(x18) +80000c94: 00568863 beq x13,x5,80000ca4 +80000c98: 0e90476f jal x14,80005580 +80000c9c: 80000c8c .word 0x80000c8c +80000ca0: 80009e12 .word 0x80009e12 +80000ca4: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xf0c26d9c +80000ca8: 00082b03 lw x22,0(x16) +80000cac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x910e60f7 +80000cb0: 00082503 lw x10,0(x16) +80000cb4: 00480813 addi x16,x16,4 + +80000cb8 : +Zbkx_xperm4_cg_cp_rd_b6: + xperm4 x6, x22, x10 # perform operation +80000cb8: 28ab2333 xperm4 x6,x22,x10 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkx_xperm4_cg_cp_rd_b6, Zbkx_xperm4_cg_cp_rd_b6_str) +80000cbc: 00092683 lw x13,0(x18) +80000cc0: 00668863 beq x13,x6,80000cd0 +80000cc4: 0bd0476f jal x14,80005580 +80000cc8: 80000cb8 .word 0x80000cb8 +80000ccc: 80009e45 .word 0x80009e45 +80000cd0: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x30aa436f +80000cd4: 00082183 lw x3,0(x16) +80000cd8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x2af60291 +80000cdc: 00082003 lw x0,0(x16) +80000ce0: 00480813 addi x16,x16,4 + +80000ce4 : +Zbkx_xperm4_cg_cp_rd_b7: + xperm4 x7, x3, x0 # perform operation +80000ce4: 2801a3b3 xperm4 x7,x3,x0 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkx_xperm4_cg_cp_rd_b7, Zbkx_xperm4_cg_cp_rd_b7_str) +80000ce8: 00092683 lw x13,0(x18) +80000cec: 00768863 beq x13,x7,80000cfc +80000cf0: 0910476f jal x14,80005580 +80000cf4: 80000ce4 .word 0x80000ce4 +80000cf8: 80009e78 .word 0x80009e78 +80000cfc: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x79102423 +80000d00: 00082103 lw x2,0(x16) +80000d04: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xef72a83e +80000d08: 00082c03 lw x24,0(x16) +80000d0c: 00480813 addi x16,x16,4 + +80000d10 : +Zbkx_xperm4_cg_cp_rd_b8: + xperm4 x8, x2, x24 # perform operation +80000d10: 29812433 xperm4 x8,x2,x24 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkx_xperm4_cg_cp_rd_b8, Zbkx_xperm4_cg_cp_rd_b8_str) +80000d14: 00092683 lw x13,0(x18) +80000d18: 00868863 beq x13,x8,80000d28 +80000d1c: 0650476f jal x14,80005580 +80000d20: 80000d10 .word 0x80000d10 +80000d24: 80009eab .word 0x80009eab +80000d28: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x231220af +80000d2c: 00082b83 lw x23,0(x16) +80000d30: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x78378eb8 +80000d34: 00082503 lw x10,0(x16) +80000d38: 00480813 addi x16,x16,4 + +80000d3c : +Zbkx_xperm4_cg_cp_rd_b9: + xperm4 x9, x23, x10 # perform operation +80000d3c: 28aba4b3 xperm4 x9,x23,x10 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkx_xperm4_cg_cp_rd_b9, Zbkx_xperm4_cg_cp_rd_b9_str) +80000d40: 00092683 lw x13,0(x18) +80000d44: 00968863 beq x13,x9,80000d54 +80000d48: 0390476f jal x14,80005580 +80000d4c: 80000d3c .word 0x80000d3c +80000d50: 80009ede .word 0x80009ede +80000d54: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x77e23811 +80000d58: 00082f83 lw x31,0(x16) +80000d5c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x2292637c +80000d60: 00082a83 lw x21,0(x16) +80000d64: 00480813 addi x16,x16,4 + +80000d68 : +Zbkx_xperm4_cg_cp_rd_b10: + xperm4 x10, x31, x21 # perform operation +80000d68: 295fa533 xperm4 x10,x31,x21 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkx_xperm4_cg_cp_rd_b10, Zbkx_xperm4_cg_cp_rd_b10_str) +80000d6c: 00092683 lw x13,0(x18) +80000d70: 00a68863 beq x13,x10,80000d80 +80000d74: 00d0476f jal x14,80005580 +80000d78: 80000d68 .word 0x80000d68 +80000d7c: 80009f11 .word 0x80009f11 +80000d80: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xc6ab30e8 +80000d84: 00082983 lw x19,0(x16) +80000d88: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x313264b5 +80000d8c: 00082a83 lw x21,0(x16) +80000d90: 00480813 addi x16,x16,4 + +80000d94 : +Zbkx_xperm4_cg_cp_rd_b11: + xperm4 x11, x19, x21 # perform operation +80000d94: 2959a5b3 xperm4 x11,x19,x21 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkx_xperm4_cg_cp_rd_b11, Zbkx_xperm4_cg_cp_rd_b11_str) +80000d98: 00092683 lw x13,0(x18) +80000d9c: 00b68863 beq x13,x11,80000dac +80000da0: 7e00476f jal x14,80005580 +80000da4: 80000d94 .word 0x80000d94 +80000da8: 80009f45 .word 0x80009f45 +80000dac: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x2df704b2 +80000db0: 00082d83 lw x27,0(x16) +80000db4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x072affef +80000db8: 00082c03 lw x24,0(x16) +80000dbc: 00480813 addi x16,x16,4 + +80000dc0 : +Zbkx_xperm4_cg_cp_rd_b12: + xperm4 x12, x27, x24 # perform operation +80000dc0: 298da633 xperm4 x12,x27,x24 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkx_xperm4_cg_cp_rd_b12, Zbkx_xperm4_cg_cp_rd_b12_str) +80000dc4: 00092683 lw x13,0(x18) +80000dc8: 00c68863 beq x13,x12,80000dd8 +80000dcc: 7b40476f jal x14,80005580 +80000dd0: 80000dc0 .word 0x80000dc0 +80000dd4: 80009f79 .word 0x80009f79 +80000dd8: 00490913 addi x18,x18,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000ddc: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000de0: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xcee0cd29 +80000de4: 00082183 lw x3,0(x16) +80000de8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xb5d7174b +80000dec: 00082b83 lw x23,0(x16) +80000df0: 00480813 addi x16,x16,4 + +80000df4 : +Zbkx_xperm4_cg_cp_rd_b13: + xperm4 x13, x3, x23 # perform operation +80000df4: 2971a6b3 xperm4 x13,x3,x23 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkx_xperm4_cg_cp_rd_b13, Zbkx_xperm4_cg_cp_rd_b13_str) +80000df8: 00092203 lw x4,0(x18) +80000dfc: 00d20863 beq x4,x13,80000e0c +80000e00: 740042ef jal x5,80005540 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80009fad .word 0x80009fad +80000e0c: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x7b86fcf5 +80000e10: 00082f03 lw x30,0(x16) +80000e14: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xf46376f9 +80000e18: 00082083 lw x1,0(x16) +80000e1c: 00480813 addi x16,x16,4 + +80000e20 : +Zbkx_xperm4_cg_cp_rd_b14: + xperm4 x14, x30, x1 # perform operation +80000e20: 281f2733 xperm4 x14,x30,x1 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkx_xperm4_cg_cp_rd_b14, Zbkx_xperm4_cg_cp_rd_b14_str) +80000e24: 00092203 lw x4,0(x18) +80000e28: 00e20863 beq x4,x14,80000e38 +80000e2c: 714042ef jal x5,80005540 +80000e30: 80000e20 .word 0x80000e20 +80000e34: 80009fe1 .word 0x80009fe1 +80000e38: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x9bd7f4b1 +80000e3c: 00082b83 lw x23,0(x16) +80000e40: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x3dc67639 +80000e44: 00082d83 lw x27,0(x16) +80000e48: 00480813 addi x16,x16,4 + +80000e4c : +Zbkx_xperm4_cg_cp_rd_b15: + xperm4 x15, x23, x27 # perform operation +80000e4c: 29bba7b3 xperm4 x15,x23,x27 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkx_xperm4_cg_cp_rd_b15, Zbkx_xperm4_cg_cp_rd_b15_str) +80000e50: 00092203 lw x4,0(x18) +80000e54: 00f20863 beq x4,x15,80000e64 +80000e58: 6e8042ef jal x5,80005540 +80000e5c: 80000e4c .word 0x80000e4c +80000e60: 8000a015 .word 0x8000a015 +80000e64: 00490913 addi x18,x18,4 + + mv x9, x16 # switch data pointer register to avoid conflict with test +80000e68: 00080493 addi x9,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xab29e24e +80000e6c: 0004ac03 lw x24,0(x9) +80000e70: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x339086d7 +80000e74: 0004ac83 lw x25,0(x9) +80000e78: 00448493 addi x9,x9,4 + +80000e7c : +Zbkx_xperm4_cg_cp_rd_b16: + xperm4 x16, x24, x25 # perform operation +80000e7c: 299c2833 xperm4 x16,x24,x25 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkx_xperm4_cg_cp_rd_b16, Zbkx_xperm4_cg_cp_rd_b16_str) +80000e80: 00092203 lw x4,0(x18) +80000e84: 01020863 beq x4,x16,80000e94 +80000e88: 6b8042ef jal x5,80005540 +80000e8c: 80000e7c .word 0x80000e7c +80000e90: 8000a049 .word 0x8000a049 +80000e94: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x6cc69eff +80000e98: 0004ae83 lw x29,0(x9) +80000e9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x415da661 +80000ea0: 0004a583 lw x11,0(x9) +80000ea4: 00448493 addi x9,x9,4 + +80000ea8 : +Zbkx_xperm4_cg_cp_rd_b17: + xperm4 x17, x29, x11 # perform operation +80000ea8: 28bea8b3 xperm4 x17,x29,x11 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkx_xperm4_cg_cp_rd_b17, Zbkx_xperm4_cg_cp_rd_b17_str) +80000eac: 00092203 lw x4,0(x18) +80000eb0: 01120863 beq x4,x17,80000ec0 +80000eb4: 68c042ef jal x5,80005540 +80000eb8: 80000ea8 .word 0x80000ea8 +80000ebc: 8000a07d .word 0x8000a07d +80000ec0: 00490913 addi x18,x18,4 + + mv x23, x18 # switch signature pointer register to avoid conflict with test +80000ec4: 00090b93 addi x23,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x3441590d +80000ec8: 0004a183 lw x3,0(x9) +80000ecc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x05e6aa28 +80000ed0: 0004a403 lw x8,0(x9) +80000ed4: 00448493 addi x9,x9,4 + +80000ed8 : +Zbkx_xperm4_cg_cp_rd_b18: + xperm4 x18, x3, x8 # perform operation +80000ed8: 2881a933 xperm4 x18,x3,x8 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkx_xperm4_cg_cp_rd_b18, Zbkx_xperm4_cg_cp_rd_b18_str) +80000edc: 000ba203 lw x4,0(x23) +80000ee0: 01220863 beq x4,x18,80000ef0 +80000ee4: 65c042ef jal x5,80005540 +80000ee8: 80000ed8 .word 0x80000ed8 +80000eec: 8000a0b1 .word 0x8000a0b1 +80000ef0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x64313da7 +80000ef4: 0004a783 lw x15,0(x9) +80000ef8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xd4921765 +80000efc: 0004ac03 lw x24,0(x9) +80000f00: 00448493 addi x9,x9,4 + +80000f04 : +Zbkx_xperm4_cg_cp_rd_b19: + xperm4 x19, x15, x24 # perform operation +80000f04: 2987a9b3 xperm4 x19,x15,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkx_xperm4_cg_cp_rd_b19, Zbkx_xperm4_cg_cp_rd_b19_str) +80000f08: 000ba203 lw x4,0(x23) +80000f0c: 01320863 beq x4,x19,80000f1c +80000f10: 630042ef jal x5,80005540 +80000f14: 80000f04 .word 0x80000f04 +80000f18: 8000a0e5 .word 0x8000a0e5 +80000f1c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x26737120 +80000f20: 0004a783 lw x15,0(x9) +80000f24: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x51e94824 +80000f28: 0004a503 lw x10,0(x9) +80000f2c: 00448493 addi x9,x9,4 + +80000f30 : +Zbkx_xperm4_cg_cp_rd_b20: + xperm4 x20, x15, x10 # perform operation +80000f30: 28a7aa33 xperm4 x20,x15,x10 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkx_xperm4_cg_cp_rd_b20, Zbkx_xperm4_cg_cp_rd_b20_str) +80000f34: 000ba203 lw x4,0(x23) +80000f38: 01420863 beq x4,x20,80000f48 +80000f3c: 604042ef jal x5,80005540 +80000f40: 80000f30 .word 0x80000f30 +80000f44: 8000a119 .word 0x8000a119 +80000f48: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xb27c83f3 +80000f4c: 0004a803 lw x16,0(x9) +80000f50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xe0229424 +80000f54: 0004a083 lw x1,0(x9) +80000f58: 00448493 addi x9,x9,4 + +80000f5c : +Zbkx_xperm4_cg_cp_rd_b21: + xperm4 x21, x16, x1 # perform operation +80000f5c: 28182ab3 xperm4 x21,x16,x1 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkx_xperm4_cg_cp_rd_b21, Zbkx_xperm4_cg_cp_rd_b21_str) +80000f60: 000ba203 lw x4,0(x23) +80000f64: 01520863 beq x4,x21,80000f74 +80000f68: 5d8042ef jal x5,80005540 +80000f6c: 80000f5c .word 0x80000f5c +80000f70: 8000a14d .word 0x8000a14d +80000f74: 004b8b93 addi x23,x23,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x27fdf06e +80000f78: 0004a803 lw x16,0(x9) +80000f7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x8ed9f4f2 +80000f80: 0004a603 lw x12,0(x9) +80000f84: 00448493 addi x9,x9,4 + +80000f88 : +Zbkx_xperm4_cg_cp_rd_b22: + xperm4 x22, x16, x12 # perform operation +80000f88: 28c82b33 xperm4 x22,x16,x12 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkx_xperm4_cg_cp_rd_b22, Zbkx_xperm4_cg_cp_rd_b22_str) +80000f8c: 000ba203 lw x4,0(x23) +80000f90: 01620863 beq x4,x22,80000fa0 +80000f94: 5ac042ef jal x5,80005540 +80000f98: 80000f88 .word 0x80000f88 +80000f9c: 8000a181 .word 0x8000a181 +80000fa0: 004b8b93 addi x23,x23,4 + + mv x10, x23 # switch signature pointer register to avoid conflict with test +80000fa4: 000b8513 addi x10,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x116c9cf3 +80000fa8: 0004ae03 lw x28,0(x9) +80000fac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x78c2c2f2 +80000fb0: 0004a183 lw x3,0(x9) +80000fb4: 00448493 addi x9,x9,4 + +80000fb8 : +Zbkx_xperm4_cg_cp_rd_b23: + xperm4 x23, x28, x3 # perform operation +80000fb8: 283e2bb3 xperm4 x23,x28,x3 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cp_rd_b23, Zbkx_xperm4_cg_cp_rd_b23_str) +80000fbc: 00052203 lw x4,0(x10) +80000fc0: 01720863 beq x4,x23,80000fd0 +80000fc4: 57c042ef jal x5,80005540 +80000fc8: 80000fb8 .word 0x80000fb8 +80000fcc: 8000a1b5 .word 0x8000a1b5 +80000fd0: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x3acf2ee1 +80000fd4: 0004af03 lw x30,0(x9) +80000fd8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xc64d8aa3 +80000fdc: 0004a983 lw x19,0(x9) +80000fe0: 00448493 addi x9,x9,4 + +80000fe4 : +Zbkx_xperm4_cg_cp_rd_b24: + xperm4 x24, x30, x19 # perform operation +80000fe4: 293f2c33 xperm4 x24,x30,x19 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cp_rd_b24, Zbkx_xperm4_cg_cp_rd_b24_str) +80000fe8: 00052203 lw x4,0(x10) +80000fec: 01820863 beq x4,x24,80000ffc +80000ff0: 550042ef jal x5,80005540 +80000ff4: 80000fe4 .word 0x80000fe4 +80000ff8: 8000a1e9 .word 0x8000a1e9 +80000ffc: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x6dbe2b58 +80001000: 0004a583 lw x11,0(x9) +80001004: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0xfb77445e +80001008: 0004a803 lw x16,0(x9) +8000100c: 00448493 addi x9,x9,4 + +80001010 : +Zbkx_xperm4_cg_cp_rd_b25: + xperm4 x25, x11, x16 # perform operation +80001010: 2905acb3 xperm4 x25,x11,x16 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cp_rd_b25, Zbkx_xperm4_cg_cp_rd_b25_str) +80001014: 00052203 lw x4,0(x10) +80001018: 01920863 beq x4,x25,80001028 +8000101c: 524042ef jal x5,80005540 +80001020: 80001010 .word 0x80001010 +80001024: 8000a21d .word 0x8000a21d +80001028: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x679a381a +8000102c: 0004a403 lw x8,0(x9) +80001030: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xa6b7619d +80001034: 0004a883 lw x17,0(x9) +80001038: 00448493 addi x9,x9,4 + +8000103c : +Zbkx_xperm4_cg_cp_rd_b26: + xperm4 x26, x8, x17 # perform operation +8000103c: 29142d33 xperm4 x26,x8,x17 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkx_xperm4_cg_cp_rd_b26, Zbkx_xperm4_cg_cp_rd_b26_str) +80001040: 00052203 lw x4,0(x10) +80001044: 01a20863 beq x4,x26,80001054 +80001048: 4f8042ef jal x5,80005540 +8000104c: 8000103c .word 0x8000103c +80001050: 8000a251 .word 0x8000a251 +80001054: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x06199179 +80001058: 0004a903 lw x18,0(x9) +8000105c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x6092c341 +80001060: 0004af83 lw x31,0(x9) +80001064: 00448493 addi x9,x9,4 + +80001068 : +Zbkx_xperm4_cg_cp_rd_b27: + xperm4 x27, x18, x31 # perform operation +80001068: 29f92db3 xperm4 x27,x18,x31 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cp_rd_b27, Zbkx_xperm4_cg_cp_rd_b27_str) +8000106c: 00052203 lw x4,0(x10) +80001070: 01b20863 beq x4,x27,80001080 +80001074: 4cc042ef jal x5,80005540 +80001078: 80001068 .word 0x80001068 +8000107c: 8000a285 .word 0x8000a285 +80001080: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xba0e3a8c +80001084: 0004a003 lw x0,0(x9) +80001088: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xcb93be21 +8000108c: 0004a983 lw x19,0(x9) +80001090: 00448493 addi x9,x9,4 + +80001094 : +Zbkx_xperm4_cg_cp_rd_b28: + xperm4 x28, x0, x19 # perform operation +80001094: 29302e33 xperm4 x28,x0,x19 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkx_xperm4_cg_cp_rd_b28, Zbkx_xperm4_cg_cp_rd_b28_str) +80001098: 00052203 lw x4,0(x10) +8000109c: 01c20863 beq x4,x28,800010ac +800010a0: 4a0042ef jal x5,80005540 +800010a4: 80001094 .word 0x80001094 +800010a8: 8000a2b9 .word 0x8000a2b9 +800010ac: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0771628d +800010b0: 0004ac03 lw x24,0(x9) +800010b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x805b42ac +800010b8: 0004a603 lw x12,0(x9) +800010bc: 00448493 addi x9,x9,4 + +800010c0 : +Zbkx_xperm4_cg_cp_rd_b29: + xperm4 x29, x24, x12 # perform operation +800010c0: 28cc2eb3 xperm4 x29,x24,x12 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cp_rd_b29, Zbkx_xperm4_cg_cp_rd_b29_str) +800010c4: 00052203 lw x4,0(x10) +800010c8: 01d20863 beq x4,x29,800010d8 +800010cc: 474042ef jal x5,80005540 +800010d0: 800010c0 .word 0x800010c0 +800010d4: 8000a2ed .word 0x8000a2ed +800010d8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x8cebb1d1 +800010dc: 0004a403 lw x8,0(x9) +800010e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xd8686181 +800010e4: 0004aa03 lw x20,0(x9) +800010e8: 00448493 addi x9,x9,4 + +800010ec : +Zbkx_xperm4_cg_cp_rd_b30: + xperm4 x30, x8, x20 # perform operation +800010ec: 29442f33 xperm4 x30,x8,x20 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkx_xperm4_cg_cp_rd_b30, Zbkx_xperm4_cg_cp_rd_b30_str) +800010f0: 00052203 lw x4,0(x10) +800010f4: 01e20863 beq x4,x30,80001104 +800010f8: 448042ef jal x5,80005540 +800010fc: 800010ec .word 0x800010ec +80001100: 8000a321 .word 0x8000a321 +80001104: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x91f5fd39 +80001108: 0004a883 lw x17,0(x9) +8000110c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x7b25f3fc +80001110: 0004ab03 lw x22,0(x9) +80001114: 00448493 addi x9,x9,4 + +80001118 : +Zbkx_xperm4_cg_cp_rd_b31: + xperm4 x31, x17, x22 # perform operation +80001118: 2968afb3 xperm4 x31,x17,x22 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cp_rd_b31, Zbkx_xperm4_cg_cp_rd_b31_str) +8000111c: 00052203 lw x4,0(x10) +80001120: 01f20863 beq x4,x31,80001130 +80001124: 41c042ef jal x5,80005540 +80001128: 80001118 .word 0x80001118 +8000112c: 8000a355 .word 0x8000a355 +80001130: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000000 +80001134: 0004a983 lw x19,0(x9) +80001138: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x3ad8e6b1 +8000113c: 0004ad03 lw x26,0(x9) +80001140: 00448493 addi x9,x9,4 + +80001144 : +Zbkx_xperm4_cg_cp_rs1_edges_0x0: + xperm4 x24, x19, x26 # perform operation +80001144: 29a9ac33 xperm4 x24,x19,x26 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cp_rs1_edges_0x0, Zbkx_xperm4_cg_cp_rs1_edges_0x0_str) +80001148: 00052203 lw x4,0(x10) +8000114c: 01820863 beq x4,x24,8000115c +80001150: 3f0042ef jal x5,80005540 +80001154: 80001144 .word 0x80001144 +80001158: 8000a389 .word 0x8000a389 +8000115c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000001 +80001160: 0004ae83 lw x29,0(x9) +80001164: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xbe7661e9 +80001168: 0004a303 lw x6,0(x9) +8000116c: 00448493 addi x9,x9,4 + +80001170 : +Zbkx_xperm4_cg_cp_rs1_edges_0x1: + xperm4 x19, x29, x6 # perform operation +80001170: 286ea9b3 xperm4 x19,x29,x6 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cp_rs1_edges_0x1, Zbkx_xperm4_cg_cp_rs1_edges_0x1_str) +80001174: 00052203 lw x4,0(x10) +80001178: 01320863 beq x4,x19,80001188 +8000117c: 3c4042ef jal x5,80005540 +80001180: 80001170 .word 0x80001170 +80001184: 8000a3c4 .word 0x8000a3c4 +80001188: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000002 +8000118c: 0004a583 lw x11,0(x9) +80001190: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xbdc08306 +80001194: 0004aa83 lw x21,0(x9) +80001198: 00448493 addi x9,x9,4 + +8000119c : +Zbkx_xperm4_cg_cp_rs1_edges_0x2: + xperm4 x14, x11, x21 # perform operation +8000119c: 2955a733 xperm4 x14,x11,x21 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cp_rs1_edges_0x2, Zbkx_xperm4_cg_cp_rs1_edges_0x2_str) +800011a0: 00052203 lw x4,0(x10) +800011a4: 00e20863 beq x4,x14,800011b4 +800011a8: 398042ef jal x5,80005540 +800011ac: 8000119c .word 0x8000119c +800011b0: 8000a3ff .word 0x8000a3ff +800011b4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x80000000 +800011b8: 0004a883 lw x17,0(x9) +800011bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x532d7d8f +800011c0: 0004ac83 lw x25,0(x9) +800011c4: 00448493 addi x9,x9,4 + +800011c8 : +Zbkx_xperm4_cg_cp_rs1_edges_0x80000000: + xperm4 x21, x17, x25 # perform operation +800011c8: 2998aab3 xperm4 x21,x17,x25 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cp_rs1_edges_0x80000000, Zbkx_xperm4_cg_cp_rs1_edges_0x80000000_str) +800011cc: 00052203 lw x4,0(x10) +800011d0: 01520863 beq x4,x21,800011e0 +800011d4: 36c042ef jal x5,80005540 +800011d8: 800011c8 .word 0x800011c8 +800011dc: 8000a43a .word 0x8000a43a +800011e0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x80000001 +800011e4: 0004a583 lw x11,0(x9) +800011e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfc0f0047 +800011ec: 0004ad03 lw x26,0(x9) +800011f0: 00448493 addi x9,x9,4 + +800011f4 : +Zbkx_xperm4_cg_cp_rs1_edges_0x80000001: + xperm4 x15, x11, x26 # perform operation +800011f4: 29a5a7b3 xperm4 x15,x11,x26 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cp_rs1_edges_0x80000001, Zbkx_xperm4_cg_cp_rs1_edges_0x80000001_str) +800011f8: 00052203 lw x4,0(x10) +800011fc: 00f20863 beq x4,x15,8000120c +80001200: 340042ef jal x5,80005540 +80001204: 800011f4 .word 0x800011f4 +80001208: 8000a47d .word 0x8000a47d +8000120c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x7fffffff +80001210: 0004ac03 lw x24,0(x9) +80001214: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x97fd4539 +80001218: 0004a303 lw x6,0(x9) +8000121c: 00448493 addi x9,x9,4 + +80001220 : +Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffff: + xperm4 x13, x24, x6 # perform operation +80001220: 286c26b3 xperm4 x13,x24,x6 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffff, Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffff_str) +80001224: 00052203 lw x4,0(x10) +80001228: 00d20863 beq x4,x13,80001238 +8000122c: 314042ef jal x5,80005540 +80001230: 80001220 .word 0x80001220 +80001234: 8000a4c0 .word 0x8000a4c0 +80001238: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffe +8000123c: 0004aa83 lw x21,0(x9) +80001240: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x4336f0ab +80001244: 0004ac83 lw x25,0(x9) +80001248: 00448493 addi x9,x9,4 + +8000124c : +Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffe: + xperm4 x22, x21, x25 # perform operation +8000124c: 299aab33 xperm4 x22,x21,x25 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffe, Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffe_str) +80001250: 00052203 lw x4,0(x10) +80001254: 01620863 beq x4,x22,80001264 +80001258: 2e8042ef jal x5,80005540 +8000125c: 8000124c .word 0x8000124c +80001260: 8000a503 .word 0x8000a503 +80001264: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xffffffff +80001268: 0004a983 lw x19,0(x9) +8000126c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfd208255 +80001270: 0004a583 lw x11,0(x9) +80001274: 00448493 addi x9,x9,4 + +80001278 : +Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff: + xperm4 x28, x19, x11 # perform operation +80001278: 28b9ae33 xperm4 x28,x19,x11 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff_str) +8000127c: 00052203 lw x4,0(x10) +80001280: 01c20863 beq x4,x28,80001290 +80001284: 2bc042ef jal x5,80005540 +80001288: 80001278 .word 0x80001278 +8000128c: 8000a546 .word 0x8000a546 +80001290: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xfffffffe +80001294: 0004a583 lw x11,0(x9) +80001298: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x1fe374ee +8000129c: 0004af03 lw x30,0(x9) +800012a0: 00448493 addi x9,x9,4 + +800012a4 : +Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe: + xperm4 x16, x11, x30 # perform operation +800012a4: 29e5a833 xperm4 x16,x11,x30 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe_str) +800012a8: 00052203 lw x4,0(x10) +800012ac: 01020863 beq x4,x16,800012bc +800012b0: 290042ef jal x5,80005540 +800012b4: 800012a4 .word 0x800012a4 +800012b8: 8000a589 .word 0x8000a589 +800012bc: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x5bbc8872 +800012c0: 0004ad83 lw x27,0(x9) +800012c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xebb8a47f +800012c8: 0004a883 lw x17,0(x9) +800012cc: 00448493 addi x9,x9,4 + +800012d0 : +Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc8872: + xperm4 x22, x27, x17 # perform operation +800012d0: 291dab33 xperm4 x22,x27,x17 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc8872, Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc8872_str) +800012d4: 00052203 lw x4,0(x10) +800012d8: 01620863 beq x4,x22,800012e8 +800012dc: 264042ef jal x5,80005540 +800012e0: 800012d0 .word 0x800012d0 +800012e4: 8000a5cc .word 0x8000a5cc +800012e8: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaa +800012ec: 0004ab03 lw x22,0(x9) +800012f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x1d6db4a4 +800012f4: 0004a783 lw x15,0(x9) +800012f8: 00448493 addi x9,x9,4 + +800012fc : +Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaa: + xperm4 x8, x22, x15 # perform operation +800012fc: 28fb2433 xperm4 x8,x22,x15 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaa, Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001300: 00052203 lw x4,0(x10) +80001304: 00820863 beq x4,x8,80001314 +80001308: 238042ef jal x5,80005540 +8000130c: 800012fc .word 0x800012fc +80001310: 8000a60f .word 0x8000a60f +80001314: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x55555555 +80001318: 0004a583 lw x11,0(x9) +8000131c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xbc5c0272 +80001320: 0004a903 lw x18,0(x9) +80001324: 00448493 addi x9,x9,4 + +80001328 : +Zbkx_xperm4_cg_cp_rs1_edges_0x55555555: + xperm4 x27, x11, x18 # perform operation +80001328: 2925adb3 xperm4 x27,x11,x18 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cp_rs1_edges_0x55555555, Zbkx_xperm4_cg_cp_rs1_edges_0x55555555_str) +8000132c: 00052203 lw x4,0(x10) +80001330: 01b20863 beq x4,x27,80001340 +80001334: 20c042ef jal x5,80005540 +80001338: 80001328 .word 0x80001328 +8000133c: 8000a652 .word 0x8000a652 +80001340: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xce06d9e8 +80001344: 0004aa03 lw x20,0(x9) +80001348: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000000 +8000134c: 0004a803 lw x16,0(x9) +80001350: 00448493 addi x9,x9,4 + +80001354 : +Zbkx_xperm4_cg_cp_rs2_edges_0x0: + xperm4 x19, x20, x16 # perform operation +80001354: 290a29b3 xperm4 x19,x20,x16 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cp_rs2_edges_0x0, Zbkx_xperm4_cg_cp_rs2_edges_0x0_str) +80001358: 00052203 lw x4,0(x10) +8000135c: 01320863 beq x4,x19,8000136c +80001360: 1e0042ef jal x5,80005540 +80001364: 80001354 .word 0x80001354 +80001368: 8000a695 .word 0x8000a695 +8000136c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x6ce7d8e8 +80001370: 0004ab03 lw x22,0(x9) +80001374: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000001 +80001378: 0004a983 lw x19,0(x9) +8000137c: 00448493 addi x9,x9,4 + +80001380 : +Zbkx_xperm4_cg_cp_rs2_edges_0x1: + xperm4 x17, x22, x19 # perform operation +80001380: 293b28b3 xperm4 x17,x22,x19 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cp_rs2_edges_0x1, Zbkx_xperm4_cg_cp_rs2_edges_0x1_str) +80001384: 00052203 lw x4,0(x10) +80001388: 01120863 beq x4,x17,80001398 +8000138c: 1b4042ef jal x5,80005540 +80001390: 80001380 .word 0x80001380 +80001394: 8000a6d1 .word 0x8000a6d1 +80001398: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xa290fd50 +8000139c: 0004af03 lw x30,0(x9) +800013a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000002 +800013a4: 0004aa03 lw x20,0(x9) +800013a8: 00448493 addi x9,x9,4 + +800013ac : +Zbkx_xperm4_cg_cp_rs2_edges_0x2: + xperm4 x21, x30, x20 # perform operation +800013ac: 294f2ab3 xperm4 x21,x30,x20 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cp_rs2_edges_0x2, Zbkx_xperm4_cg_cp_rs2_edges_0x2_str) +800013b0: 00052203 lw x4,0(x10) +800013b4: 01520863 beq x4,x21,800013c4 +800013b8: 188042ef jal x5,80005540 +800013bc: 800013ac .word 0x800013ac +800013c0: 8000a70d .word 0x8000a70d +800013c4: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x16353247 +800013c8: 0004ab83 lw x23,0(x9) +800013cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x80000000 +800013d0: 0004a983 lw x19,0(x9) +800013d4: 00448493 addi x9,x9,4 + +800013d8 : +Zbkx_xperm4_cg_cp_rs2_edges_0x80000000: + xperm4 x17, x23, x19 # perform operation +800013d8: 293ba8b3 xperm4 x17,x23,x19 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cp_rs2_edges_0x80000000, Zbkx_xperm4_cg_cp_rs2_edges_0x80000000_str) +800013dc: 00052203 lw x4,0(x10) +800013e0: 01120863 beq x4,x17,800013f0 +800013e4: 15c042ef jal x5,80005540 +800013e8: 800013d8 .word 0x800013d8 +800013ec: 8000a749 .word 0x8000a749 +800013f0: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xf54105c7 +800013f4: 0004ad03 lw x26,0(x9) +800013f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x80000001 +800013fc: 0004a683 lw x13,0(x9) +80001400: 00448493 addi x9,x9,4 + +80001404 : +Zbkx_xperm4_cg_cp_rs2_edges_0x80000001: + xperm4 x20, x26, x13 # perform operation +80001404: 28dd2a33 xperm4 x20,x26,x13 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cp_rs2_edges_0x80000001, Zbkx_xperm4_cg_cp_rs2_edges_0x80000001_str) +80001408: 00052203 lw x4,0(x10) +8000140c: 01420863 beq x4,x20,8000141c +80001410: 130042ef jal x5,80005540 +80001414: 80001404 .word 0x80001404 +80001418: 8000a78c .word 0x8000a78c +8000141c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x05c071cc +80001420: 0004a703 lw x14,0(x9) +80001424: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7fffffff +80001428: 0004af03 lw x30,0(x9) +8000142c: 00448493 addi x9,x9,4 + +80001430 : +Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffff: + xperm4 x12, x14, x30 # perform operation +80001430: 29e72633 xperm4 x12,x14,x30 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffff, Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffff_str) +80001434: 00052203 lw x4,0(x10) +80001438: 00c20863 beq x4,x12,80001448 +8000143c: 104042ef jal x5,80005540 +80001440: 80001430 .word 0x80001430 +80001444: 8000a7cf .word 0x8000a7cf +80001448: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0ceda5d7 +8000144c: 0004af83 lw x31,0(x9) +80001450: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x7ffffffe +80001454: 0004ac83 lw x25,0(x9) +80001458: 00448493 addi x9,x9,4 + +8000145c : +Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffe: + xperm4 x16, x31, x25 # perform operation +8000145c: 299fa833 xperm4 x16,x31,x25 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffe, Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffe_str) +80001460: 00052203 lw x4,0(x10) +80001464: 01020863 beq x4,x16,80001474 +80001468: 0d8042ef jal x5,80005540 +8000146c: 8000145c .word 0x8000145c +80001470: 8000a812 .word 0x8000a812 +80001474: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5cb53602 +80001478: 0004a303 lw x6,0(x9) +8000147c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xffffffff +80001480: 0004a083 lw x1,0(x9) +80001484: 00448493 addi x9,x9,4 + +80001488 : +Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff: + xperm4 x14, x6, x1 # perform operation +80001488: 28132733 xperm4 x14,x6,x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff_str) +8000148c: 00052203 lw x4,0(x10) +80001490: 00e20863 beq x4,x14,800014a0 +80001494: 0ac042ef jal x5,80005540 +80001498: 80001488 .word 0x80001488 +8000149c: 8000a855 .word 0x8000a855 +800014a0: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x819aaac1 +800014a4: 0004ac83 lw x25,0(x9) +800014a8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfffffffe +800014ac: 0004a583 lw x11,0(x9) +800014b0: 00448493 addi x9,x9,4 + +800014b4 : +Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe: + xperm4 x15, x25, x11 # perform operation +800014b4: 28bca7b3 xperm4 x15,x25,x11 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe_str) +800014b8: 00052203 lw x4,0(x10) +800014bc: 00f20863 beq x4,x15,800014cc +800014c0: 080042ef jal x5,80005540 +800014c4: 800014b4 .word 0x800014b4 +800014c8: 8000a898 .word 0x8000a898 +800014cc: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x89209261 +800014d0: 0004a583 lw x11,0(x9) +800014d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5bbc8872 +800014d8: 0004ab03 lw x22,0(x9) +800014dc: 00448493 addi x9,x9,4 + +800014e0 : +Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc8872: + xperm4 x19, x11, x22 # perform operation +800014e0: 2965a9b3 xperm4 x19,x11,x22 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc8872, Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc8872_str) +800014e4: 00052203 lw x4,0(x10) +800014e8: 01320863 beq x4,x19,800014f8 +800014ec: 054042ef jal x5,80005540 +800014f0: 800014e0 .word 0x800014e0 +800014f4: 8000a8db .word 0x8000a8db +800014f8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xc55bcdbb +800014fc: 0004a803 lw x16,0(x9) +80001500: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xaaaaaaaa +80001504: 0004ac83 lw x25,0(x9) +80001508: 00448493 addi x9,x9,4 + +8000150c : +Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaa: + xperm4 x3, x16, x25 # perform operation +8000150c: 299821b3 xperm4 x3,x16,x25 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaa, Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001510: 00052203 lw x4,0(x10) +80001514: 00320863 beq x4,x3,80001524 +80001518: 028042ef jal x5,80005540 +8000151c: 8000150c .word 0x8000150c +80001520: 8000a91e .word 0x8000a91e +80001524: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x079798ed +80001528: 0004ae03 lw x28,0(x9) +8000152c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x55555555 +80001530: 0004a183 lw x3,0(x9) +80001534: 00448493 addi x9,x9,4 + +80001538 : +Zbkx_xperm4_cg_cp_rs2_edges_0x55555555: + xperm4 x12, x28, x3 # perform operation +80001538: 283e2633 xperm4 x12,x28,x3 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cp_rs2_edges_0x55555555, Zbkx_xperm4_cg_cp_rs2_edges_0x55555555_str) +8000153c: 00052203 lw x4,0(x10) +80001540: 00c20863 beq x4,x12,80001550 +80001544: 7fd032ef jal x5,80005540 +80001548: 80001538 .word 0x80001538 +8000154c: 8000a961 .word 0x8000a961 +80001550: 00450513 addi x10,x10,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000000 +80001554: 0004aa83 lw x21,0(x9) +80001558: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x00000000 +8000155c: 0004a703 lw x14,0(x9) +80001560: 00448493 addi x9,x9,4 + +80001564 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xperm4 x17, x21, x14 # perform operation +80001564: 28eaa8b3 xperm4 x17,x21,x14 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001568: 00052203 lw x4,0(x10) +8000156c: 01120863 beq x4,x17,8000157c +80001570: 7d1032ef jal x5,80005540 +80001574: 80001564 .word 0x80001564 +80001578: 8000a9a4 .word 0x8000a9a4 +8000157c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000000 +80001580: 0004ac03 lw x24,0(x9) +80001584: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000001 +80001588: 0004aa83 lw x21,0(x9) +8000158c: 00448493 addi x9,x9,4 + +80001590 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xperm4 x30, x24, x21 # perform operation +80001590: 295c2f33 xperm4 x30,x24,x21 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001594: 00052203 lw x4,0(x10) +80001598: 01e20863 beq x4,x30,800015a8 +8000159c: 7a5032ef jal x5,80005540 +800015a0: 80001590 .word 0x80001590 +800015a4: 8000a9f7 .word 0x8000a9f7 +800015a8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000 +800015ac: 0004ad83 lw x27,0(x9) +800015b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000002 +800015b4: 0004ab03 lw x22,0(x9) +800015b8: 00448493 addi x9,x9,4 + +800015bc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xperm4 x3, x27, x22 # perform operation +800015bc: 296da1b3 xperm4 x3,x27,x22 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c0: 00052203 lw x4,0(x10) +800015c4: 00320863 beq x4,x3,800015d4 +800015c8: 779032ef jal x5,80005540 +800015cc: 800015bc .word 0x800015bc +800015d0: 8000aa4a .word 0x8000aa4a +800015d4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000 +800015d8: 0004a183 lw x3,0(x9) +800015dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +800015e0: 0004ab03 lw x22,0(x9) +800015e4: 00448493 addi x9,x9,4 + +800015e8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + xperm4 x14, x3, x22 # perform operation +800015e8: 2961a733 xperm4 x14,x3,x22 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015ec: 00052203 lw x4,0(x10) +800015f0: 00e20863 beq x4,x14,80001600 +800015f4: 74d032ef jal x5,80005540 +800015f8: 800015e8 .word 0x800015e8 +800015fc: 8000aa9d .word 0x8000aa9d +80001600: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000 +80001604: 0004ad83 lw x27,0(x9) +80001608: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x80000001 +8000160c: 0004a303 lw x6,0(x9) +80001610: 00448493 addi x9,x9,4 + +80001614 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + xperm4 x24, x27, x6 # perform operation +80001614: 286dac33 xperm4 x24,x27,x6 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001618: 00052203 lw x4,0(x10) +8000161c: 01820863 beq x4,x24,8000162c +80001620: 721032ef jal x5,80005540 +80001624: 80001614 .word 0x80001614 +80001628: 8000aaf7 .word 0x8000aaf7 +8000162c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000 +80001630: 0004a183 lw x3,0(x9) +80001634: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7fffffff +80001638: 0004a583 lw x11,0(x9) +8000163c: 00448493 addi x9,x9,4 + +80001640 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + xperm4 x26, x3, x11 # perform operation +80001640: 28b1ad33 xperm4 x26,x3,x11 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001644: 00052203 lw x4,0(x10) +80001648: 01a20863 beq x4,x26,80001658 +8000164c: 6f5032ef jal x5,80005540 +80001650: 80001640 .word 0x80001640 +80001654: 8000ab51 .word 0x8000ab51 +80001658: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000000 +8000165c: 0004a583 lw x11,0(x9) +80001660: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x7ffffffe +80001664: 0004ab03 lw x22,0(x9) +80001668: 00448493 addi x9,x9,4 + +8000166c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + xperm4 x15, x11, x22 # perform operation +8000166c: 2965a7b3 xperm4 x15,x11,x22 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001670: 00052203 lw x4,0(x10) +80001674: 00f20863 beq x4,x15,80001684 +80001678: 6c9032ef jal x5,80005540 +8000167c: 8000166c .word 0x8000166c +80001680: 8000abab .word 0x8000abab +80001684: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000000 +80001688: 0004a983 lw x19,0(x9) +8000168c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xffffffff +80001690: 0004a703 lw x14,0(x9) +80001694: 00448493 addi x9,x9,4 + +80001698 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xperm4 x29, x19, x14 # perform operation +80001698: 28e9aeb3 xperm4 x29,x19,x14 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000169c: 00052203 lw x4,0(x10) +800016a0: 01d20863 beq x4,x29,800016b0 +800016a4: 69d032ef jal x5,80005540 +800016a8: 80001698 .word 0x80001698 +800016ac: 8000ac05 .word 0x8000ac05 +800016b0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000000 +800016b4: 0004a883 lw x17,0(x9) +800016b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xfffffffe +800016bc: 0004ad03 lw x26,0(x9) +800016c0: 00448493 addi x9,x9,4 + +800016c4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xperm4 x8, x17, x26 # perform operation +800016c4: 29a8a433 xperm4 x8,x17,x26 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c8: 00052203 lw x4,0(x10) +800016cc: 00820863 beq x4,x8,800016dc +800016d0: 671032ef jal x5,80005540 +800016d4: 800016c4 .word 0x800016c4 +800016d8: 8000ac5f .word 0x8000ac5f +800016dc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000 +800016e0: 0004ae83 lw x29,0(x9) +800016e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x5bbc8872 +800016e8: 0004ad83 lw x27,0(x9) +800016ec: 00448493 addi x9,x9,4 + +800016f0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + xperm4 x19, x29, x27 # perform operation +800016f0: 29bea9b3 xperm4 x19,x29,x27 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016f4: 00052203 lw x4,0(x10) +800016f8: 01320863 beq x4,x19,80001708 +800016fc: 645032ef jal x5,80005540 +80001700: 800016f0 .word 0x800016f0 +80001704: 8000acb9 .word 0x8000acb9 +80001708: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000000 +8000170c: 0004a983 lw x19,0(x9) +80001710: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xaaaaaaaa +80001714: 0004a583 lw x11,0(x9) +80001718: 00448493 addi x9,x9,4 + +8000171c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + xperm4 x31, x19, x11 # perform operation +8000171c: 28b9afb3 xperm4 x31,x19,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001720: 00052203 lw x4,0(x10) +80001724: 01f20863 beq x4,x31,80001734 +80001728: 619032ef jal x5,80005540 +8000172c: 8000171c .word 0x8000171c +80001730: 8000ad13 .word 0x8000ad13 +80001734: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000000 +80001738: 0004aa03 lw x20,0(x9) +8000173c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x55555555 +80001740: 0004a783 lw x15,0(x9) +80001744: 00448493 addi x9,x9,4 + +80001748 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + xperm4 x14, x20, x15 # perform operation +80001748: 28fa2733 xperm4 x14,x20,x15 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000174c: 00052203 lw x4,0(x10) +80001750: 00e20863 beq x4,x14,80001760 +80001754: 5ed032ef jal x5,80005540 +80001758: 80001748 .word 0x80001748 +8000175c: 8000ad6d .word 0x8000ad6d +80001760: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000001 +80001764: 0004a883 lw x17,0(x9) +80001768: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000 +8000176c: 0004a103 lw x2,0(x9) +80001770: 00448493 addi x9,x9,4 + +80001774 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xperm4 x16, x17, x2 # perform operation +80001774: 2828a833 xperm4 x16,x17,x2 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001778: 00052203 lw x4,0(x10) +8000177c: 01020863 beq x4,x16,8000178c +80001780: 5c1032ef jal x5,80005540 +80001784: 80001774 .word 0x80001774 +80001788: 8000adc7 .word 0x8000adc7 +8000178c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x00000001 +80001790: 0004ad03 lw x26,0(x9) +80001794: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x00000001 +80001798: 0004a703 lw x14,0(x9) +8000179c: 00448493 addi x9,x9,4 + +800017a0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xperm4 x2, x26, x14 # perform operation +800017a0: 28ed2133 xperm4 x2,x26,x14 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017a4: 00052203 lw x4,0(x10) +800017a8: 00220863 beq x4,x2,800017b8 +800017ac: 595032ef jal x5,80005540 +800017b0: 800017a0 .word 0x800017a0 +800017b4: 8000ae1a .word 0x8000ae1a +800017b8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000001 +800017bc: 0004ac03 lw x24,0(x9) +800017c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x00000002 +800017c4: 0004a383 lw x7,0(x9) +800017c8: 00448493 addi x9,x9,4 + +800017cc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xperm4 x13, x24, x7 # perform operation +800017cc: 287c26b3 xperm4 x13,x24,x7 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d0: 00052203 lw x4,0(x10) +800017d4: 00d20863 beq x4,x13,800017e4 +800017d8: 569032ef jal x5,80005540 +800017dc: 800017cc .word 0x800017cc +800017e0: 8000ae6d .word 0x8000ae6d +800017e4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000001 +800017e8: 0004a903 lw x18,0(x9) +800017ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x80000000 +800017f0: 0004ac03 lw x24,0(x9) +800017f4: 00448493 addi x9,x9,4 + +800017f8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + xperm4 x20, x18, x24 # perform operation +800017f8: 29892a33 xperm4 x20,x18,x24 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017fc: 00052203 lw x4,0(x10) +80001800: 01420863 beq x4,x20,80001810 +80001804: 53d032ef jal x5,80005540 +80001808: 800017f8 .word 0x800017f8 +8000180c: 8000aec0 .word 0x8000aec0 +80001810: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000001 +80001814: 0004ae83 lw x29,0(x9) +80001818: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x80000001 +8000181c: 0004ab83 lw x23,0(x9) +80001820: 00448493 addi x9,x9,4 + +80001824 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + xperm4 x3, x29, x23 # perform operation +80001824: 297ea1b3 xperm4 x3,x29,x23 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001828: 00052203 lw x4,0(x10) +8000182c: 00320863 beq x4,x3,8000183c +80001830: 511032ef jal x5,80005540 +80001834: 80001824 .word 0x80001824 +80001838: 8000af1a .word 0x8000af1a +8000183c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000001 +80001840: 0004ac03 lw x24,0(x9) +80001844: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7fffffff +80001848: 0004a903 lw x18,0(x9) +8000184c: 00448493 addi x9,x9,4 + +80001850 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + xperm4 x25, x24, x18 # perform operation +80001850: 292c2cb3 xperm4 x25,x24,x18 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001854: 00052203 lw x4,0(x10) +80001858: 01920863 beq x4,x25,80001868 +8000185c: 4e5032ef jal x5,80005540 +80001860: 80001850 .word 0x80001850 +80001864: 8000af74 .word 0x8000af74 +80001868: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000001 +8000186c: 0004a583 lw x11,0(x9) +80001870: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x7ffffffe +80001874: 0004af83 lw x31,0(x9) +80001878: 00448493 addi x9,x9,4 + +8000187c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + xperm4 x14, x11, x31 # perform operation +8000187c: 29f5a733 xperm4 x14,x11,x31 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001880: 00052203 lw x4,0(x10) +80001884: 00e20863 beq x4,x14,80001894 +80001888: 4b9032ef jal x5,80005540 +8000188c: 8000187c .word 0x8000187c +80001890: 8000afce .word 0x8000afce +80001894: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000001 +80001898: 0004a703 lw x14,0(x9) +8000189c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xffffffff +800018a0: 0004a583 lw x11,0(x9) +800018a4: 00448493 addi x9,x9,4 + +800018a8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xperm4 x27, x14, x11 # perform operation +800018a8: 28b72db3 xperm4 x27,x14,x11 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018ac: 00052203 lw x4,0(x10) +800018b0: 01b20863 beq x4,x27,800018c0 +800018b4: 48d032ef jal x5,80005540 +800018b8: 800018a8 .word 0x800018a8 +800018bc: 8000b028 .word 0x8000b028 +800018c0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000001 +800018c4: 0004af83 lw x31,0(x9) +800018c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xfffffffe +800018cc: 0004a183 lw x3,0(x9) +800018d0: 00448493 addi x9,x9,4 + +800018d4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xperm4 x15, x31, x3 # perform operation +800018d4: 283fa7b3 xperm4 x15,x31,x3 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d8: 00052203 lw x4,0(x10) +800018dc: 00f20863 beq x4,x15,800018ec +800018e0: 461032ef jal x5,80005540 +800018e4: 800018d4 .word 0x800018d4 +800018e8: 8000b082 .word 0x8000b082 +800018ec: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x00000001 +800018f0: 0004ac83 lw x25,0(x9) +800018f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x5bbc8872 +800018f8: 0004ad03 lw x26,0(x9) +800018fc: 00448493 addi x9,x9,4 + +80001900 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + xperm4 x13, x25, x26 # perform operation +80001900: 29aca6b3 xperm4 x13,x25,x26 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001904: 00052203 lw x4,0(x10) +80001908: 00d20863 beq x4,x13,80001918 +8000190c: 435032ef jal x5,80005540 +80001910: 80001900 .word 0x80001900 +80001914: 8000b0dc .word 0x8000b0dc +80001918: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x00000001 +8000191c: 0004a083 lw x1,0(x9) +80001920: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xaaaaaaaa +80001924: 0004a183 lw x3,0(x9) +80001928: 00448493 addi x9,x9,4 + +8000192c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + xperm4 x11, x1, x3 # perform operation +8000192c: 2830a5b3 xperm4 x11,x1,x3 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001930: 00052203 lw x4,0(x10) +80001934: 00b20863 beq x4,x11,80001944 +80001938: 409032ef jal x5,80005540 +8000193c: 8000192c .word 0x8000192c +80001940: 8000b136 .word 0x8000b136 +80001944: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000001 +80001948: 0004aa83 lw x21,0(x9) +8000194c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x55555555 +80001950: 0004ac83 lw x25,0(x9) +80001954: 00448493 addi x9,x9,4 + +80001958 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + xperm4 x3, x21, x25 # perform operation +80001958: 299aa1b3 xperm4 x3,x21,x25 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000195c: 00052203 lw x4,0(x10) +80001960: 00320863 beq x4,x3,80001970 +80001964: 3dd032ef jal x5,80005540 +80001968: 80001958 .word 0x80001958 +8000196c: 8000b190 .word 0x8000b190 +80001970: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x00000002 +80001974: 0004a103 lw x2,0(x9) +80001978: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x00000000 +8000197c: 0004ab83 lw x23,0(x9) +80001980: 00448493 addi x9,x9,4 + +80001984 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xperm4 x31, x2, x23 # perform operation +80001984: 29712fb3 xperm4 x31,x2,x23 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001988: 00052203 lw x4,0(x10) +8000198c: 01f20863 beq x4,x31,8000199c +80001990: 3b1032ef jal x5,80005540 +80001994: 80001984 .word 0x80001984 +80001998: 8000b1ea .word 0x8000b1ea +8000199c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000002 +800019a0: 0004a703 lw x14,0(x9) +800019a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000001 +800019a8: 0004aa83 lw x21,0(x9) +800019ac: 00448493 addi x9,x9,4 + +800019b0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xperm4 x16, x14, x21 # perform operation +800019b0: 29572833 xperm4 x16,x14,x21 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019b4: 00052203 lw x4,0(x10) +800019b8: 01020863 beq x4,x16,800019c8 +800019bc: 385032ef jal x5,80005540 +800019c0: 800019b0 .word 0x800019b0 +800019c4: 8000b23d .word 0x8000b23d +800019c8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000002 +800019cc: 0004a383 lw x7,0(x9) +800019d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000002 +800019d4: 0004a803 lw x16,0(x9) +800019d8: 00448493 addi x9,x9,4 + +800019dc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xperm4 x28, x7, x16 # perform operation +800019dc: 2903ae33 xperm4 x28,x7,x16 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e0: 00052203 lw x4,0(x10) +800019e4: 01c20863 beq x4,x28,800019f4 +800019e8: 359032ef jal x5,80005540 +800019ec: 800019dc .word 0x800019dc +800019f0: 8000b290 .word 0x8000b290 +800019f4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000002 +800019f8: 0004a783 lw x15,0(x9) +800019fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x80000000 +80001a00: 0004aa03 lw x20,0(x9) +80001a04: 00448493 addi x9,x9,4 + +80001a08 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + xperm4 x29, x15, x20 # perform operation +80001a08: 2947aeb3 xperm4 x29,x15,x20 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a0c: 00052203 lw x4,0(x10) +80001a10: 01d20863 beq x4,x29,80001a20 +80001a14: 32d032ef jal x5,80005540 +80001a18: 80001a08 .word 0x80001a08 +80001a1c: 8000b2e3 .word 0x8000b2e3 +80001a20: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x00000002 +80001a24: 0004a603 lw x12,0(x9) +80001a28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x80000001 +80001a2c: 0004ae83 lw x29,0(x9) +80001a30: 00448493 addi x9,x9,4 + +80001a34 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + xperm4 x21, x12, x29 # perform operation +80001a34: 29d62ab3 xperm4 x21,x12,x29 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a38: 00052203 lw x4,0(x10) +80001a3c: 01520863 beq x4,x21,80001a4c +80001a40: 301032ef jal x5,80005540 +80001a44: 80001a34 .word 0x80001a34 +80001a48: 8000b33d .word 0x8000b33d +80001a4c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000002 +80001a50: 0004aa83 lw x21,0(x9) +80001a54: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x7fffffff +80001a58: 0004a103 lw x2,0(x9) +80001a5c: 00448493 addi x9,x9,4 + +80001a60 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + xperm4 x22, x21, x2 # perform operation +80001a60: 282aab33 xperm4 x22,x21,x2 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a64: 00052203 lw x4,0(x10) +80001a68: 01620863 beq x4,x22,80001a78 +80001a6c: 2d5032ef jal x5,80005540 +80001a70: 80001a60 .word 0x80001a60 +80001a74: 8000b397 .word 0x8000b397 +80001a78: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x00000002 +80001a7c: 0004af03 lw x30,0(x9) +80001a80: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x7ffffffe +80001a84: 0004ad83 lw x27,0(x9) +80001a88: 00448493 addi x9,x9,4 + +80001a8c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + xperm4 x20, x30, x27 # perform operation +80001a8c: 29bf2a33 xperm4 x20,x30,x27 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a90: 00052203 lw x4,0(x10) +80001a94: 01420863 beq x4,x20,80001aa4 +80001a98: 2a9032ef jal x5,80005540 +80001a9c: 80001a8c .word 0x80001a8c +80001aa0: 8000b3f1 .word 0x8000b3f1 +80001aa4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x00000002 +80001aa8: 0004af03 lw x30,0(x9) +80001aac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xffffffff +80001ab0: 0004a103 lw x2,0(x9) +80001ab4: 00448493 addi x9,x9,4 + +80001ab8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xperm4 x15, x30, x2 # perform operation +80001ab8: 282f27b3 xperm4 x15,x30,x2 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001abc: 00052203 lw x4,0(x10) +80001ac0: 00f20863 beq x4,x15,80001ad0 +80001ac4: 27d032ef jal x5,80005540 +80001ac8: 80001ab8 .word 0x80001ab8 +80001acc: 8000b44b .word 0x8000b44b +80001ad0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000002 +80001ad4: 0004a983 lw x19,0(x9) +80001ad8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xfffffffe +80001adc: 0004a083 lw x1,0(x9) +80001ae0: 00448493 addi x9,x9,4 + +80001ae4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xperm4 x12, x19, x1 # perform operation +80001ae4: 2819a633 xperm4 x12,x19,x1 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae8: 00052203 lw x4,0(x10) +80001aec: 00c20863 beq x4,x12,80001afc +80001af0: 251032ef jal x5,80005540 +80001af4: 80001ae4 .word 0x80001ae4 +80001af8: 8000b4a5 .word 0x8000b4a5 +80001afc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x00000002 +80001b00: 0004a403 lw x8,0(x9) +80001b04: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x5bbc8872 +80001b08: 0004ac83 lw x25,0(x9) +80001b0c: 00448493 addi x9,x9,4 + +80001b10 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + xperm4 x30, x8, x25 # perform operation +80001b10: 29942f33 xperm4 x30,x8,x25 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b14: 00052203 lw x4,0(x10) +80001b18: 01e20863 beq x4,x30,80001b28 +80001b1c: 225032ef jal x5,80005540 +80001b20: 80001b10 .word 0x80001b10 +80001b24: 8000b4ff .word 0x8000b4ff +80001b28: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000002 +80001b2c: 0004ad83 lw x27,0(x9) +80001b30: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xaaaaaaaa +80001b34: 0004a103 lw x2,0(x9) +80001b38: 00448493 addi x9,x9,4 + +80001b3c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + xperm4 x3, x27, x2 # perform operation +80001b3c: 282da1b3 xperm4 x3,x27,x2 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b40: 00052203 lw x4,0(x10) +80001b44: 00320863 beq x4,x3,80001b54 +80001b48: 1f9032ef jal x5,80005540 +80001b4c: 80001b3c .word 0x80001b3c +80001b50: 8000b559 .word 0x8000b559 +80001b54: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000002 +80001b58: 0004a883 lw x17,0(x9) +80001b5c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x55555555 +80001b60: 0004af83 lw x31,0(x9) +80001b64: 00448493 addi x9,x9,4 + +80001b68 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + xperm4 x23, x17, x31 # perform operation +80001b68: 29f8abb3 xperm4 x23,x17,x31 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b6c: 00052203 lw x4,0(x10) +80001b70: 01720863 beq x4,x23,80001b80 +80001b74: 1cd032ef jal x5,80005540 +80001b78: 80001b68 .word 0x80001b68 +80001b7c: 8000b5b3 .word 0x8000b5b3 +80001b80: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x80000000 +80001b84: 0004af83 lw x31,0(x9) +80001b88: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000000 +80001b8c: 0004a303 lw x6,0(x9) +80001b90: 00448493 addi x9,x9,4 + +80001b94 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + xperm4 x22, x31, x6 # perform operation +80001b94: 286fab33 xperm4 x22,x31,x6 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b98: 00052203 lw x4,0(x10) +80001b9c: 01620863 beq x4,x22,80001bac +80001ba0: 1a1032ef jal x5,80005540 +80001ba4: 80001b94 .word 0x80001b94 +80001ba8: 8000b60d .word 0x8000b60d +80001bac: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x80000000 +80001bb0: 0004a583 lw x11,0(x9) +80001bb4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x00000001 +80001bb8: 0004a903 lw x18,0(x9) +80001bbc: 00448493 addi x9,x9,4 + +80001bc0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + xperm4 x30, x11, x18 # perform operation +80001bc0: 2925af33 xperm4 x30,x11,x18 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bc4: 00052203 lw x4,0(x10) +80001bc8: 01e20863 beq x4,x30,80001bd8 +80001bcc: 175032ef jal x5,80005540 +80001bd0: 80001bc0 .word 0x80001bc0 +80001bd4: 8000b667 .word 0x8000b667 +80001bd8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x80000000 +80001bdc: 0004ac83 lw x25,0(x9) +80001be0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000002 +80001be4: 0004a783 lw x15,0(x9) +80001be8: 00448493 addi x9,x9,4 + +80001bec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + xperm4 x16, x25, x15 # perform operation +80001bec: 28fca833 xperm4 x16,x25,x15 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf0: 00052203 lw x4,0(x10) +80001bf4: 01020863 beq x4,x16,80001c04 +80001bf8: 149032ef jal x5,80005540 +80001bfc: 80001bec .word 0x80001bec +80001c00: 8000b6c1 .word 0x8000b6c1 +80001c04: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x80000000 +80001c08: 0004a103 lw x2,0(x9) +80001c0c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x80000000 +80001c10: 0004a883 lw x17,0(x9) +80001c14: 00448493 addi x9,x9,4 + +80001c18 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + xperm4 x24, x2, x17 # perform operation +80001c18: 29112c33 xperm4 x24,x2,x17 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c1c: 00052203 lw x4,0(x10) +80001c20: 01820863 beq x4,x24,80001c30 +80001c24: 11d032ef jal x5,80005540 +80001c28: 80001c18 .word 0x80001c18 +80001c2c: 8000b71b .word 0x8000b71b +80001c30: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x80000000 +80001c34: 0004a683 lw x13,0(x9) +80001c38: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x80000001 +80001c3c: 0004a803 lw x16,0(x9) +80001c40: 00448493 addi x9,x9,4 + +80001c44 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + xperm4 x15, x13, x16 # perform operation +80001c44: 2906a7b3 xperm4 x15,x13,x16 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c48: 00052203 lw x4,0(x10) +80001c4c: 00f20863 beq x4,x15,80001c5c +80001c50: 0f1032ef jal x5,80005540 +80001c54: 80001c44 .word 0x80001c44 +80001c58: 8000b77c .word 0x8000b77c +80001c5c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x80000000 +80001c60: 0004aa83 lw x21,0(x9) +80001c64: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7fffffff +80001c68: 0004a903 lw x18,0(x9) +80001c6c: 00448493 addi x9,x9,4 + +80001c70 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + xperm4 x16, x21, x18 # perform operation +80001c70: 292aa833 xperm4 x16,x21,x18 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c74: 00052203 lw x4,0(x10) +80001c78: 01020863 beq x4,x16,80001c88 +80001c7c: 0c5032ef jal x5,80005540 +80001c80: 80001c70 .word 0x80001c70 +80001c84: 8000b7dd .word 0x8000b7dd +80001c88: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x80000000 +80001c8c: 0004a583 lw x11,0(x9) +80001c90: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x7ffffffe +80001c94: 0004a683 lw x13,0(x9) +80001c98: 00448493 addi x9,x9,4 + +80001c9c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + xperm4 x20, x11, x13 # perform operation +80001c9c: 28d5aa33 xperm4 x20,x11,x13 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca0: 00052203 lw x4,0(x10) +80001ca4: 01420863 beq x4,x20,80001cb4 +80001ca8: 099032ef jal x5,80005540 +80001cac: 80001c9c .word 0x80001c9c +80001cb0: 8000b83e .word 0x8000b83e +80001cb4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x80000000 +80001cb8: 0004af83 lw x31,0(x9) +80001cbc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xffffffff +80001cc0: 0004a183 lw x3,0(x9) +80001cc4: 00448493 addi x9,x9,4 + +80001cc8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + xperm4 x14, x31, x3 # perform operation +80001cc8: 283fa733 xperm4 x14,x31,x3 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001ccc: 00052203 lw x4,0(x10) +80001cd0: 00e20863 beq x4,x14,80001ce0 +80001cd4: 06d032ef jal x5,80005540 +80001cd8: 80001cc8 .word 0x80001cc8 +80001cdc: 8000b89f .word 0x8000b89f +80001ce0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x80000000 +80001ce4: 0004ad83 lw x27,0(x9) +80001ce8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffe +80001cec: 0004ae83 lw x29,0(x9) +80001cf0: 00448493 addi x9,x9,4 + +80001cf4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + xperm4 x2, x27, x29 # perform operation +80001cf4: 29dda133 xperm4 x2,x27,x29 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf8: 00052203 lw x4,0(x10) +80001cfc: 00220863 beq x4,x2,80001d0c +80001d00: 041032ef jal x5,80005540 +80001d04: 80001cf4 .word 0x80001cf4 +80001d08: 8000b900 .word 0x8000b900 +80001d0c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x80000000 +80001d10: 0004ac03 lw x24,0(x9) +80001d14: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc8872 +80001d18: 0004a703 lw x14,0(x9) +80001d1c: 00448493 addi x9,x9,4 + +80001d20 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + xperm4 x6, x24, x14 # perform operation +80001d20: 28ec2333 xperm4 x6,x24,x14 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d24: 00052203 lw x4,0(x10) +80001d28: 00620863 beq x4,x6,80001d38 +80001d2c: 015032ef jal x5,80005540 +80001d30: 80001d20 .word 0x80001d20 +80001d34: 8000b961 .word 0x8000b961 +80001d38: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x80000000 +80001d3c: 0004aa83 lw x21,0(x9) +80001d40: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xaaaaaaaa +80001d44: 0004a303 lw x6,0(x9) +80001d48: 00448493 addi x9,x9,4 + +80001d4c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + xperm4 x23, x21, x6 # perform operation +80001d4c: 286aabb3 xperm4 x23,x21,x6 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d50: 00052203 lw x4,0(x10) +80001d54: 01720863 beq x4,x23,80001d64 +80001d58: 7e8032ef jal x5,80005540 +80001d5c: 80001d4c .word 0x80001d4c +80001d60: 8000b9c2 .word 0x8000b9c2 +80001d64: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000000 +80001d68: 0004aa03 lw x20,0(x9) +80001d6c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x55555555 +80001d70: 0004a783 lw x15,0(x9) +80001d74: 00448493 addi x9,x9,4 + +80001d78 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + xperm4 x27, x20, x15 # perform operation +80001d78: 28fa2db3 xperm4 x27,x20,x15 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d7c: 00052203 lw x4,0(x10) +80001d80: 01b20863 beq x4,x27,80001d90 +80001d84: 7bc032ef jal x5,80005540 +80001d88: 80001d78 .word 0x80001d78 +80001d8c: 8000ba23 .word 0x8000ba23 +80001d90: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x80000001 +80001d94: 0004af03 lw x30,0(x9) +80001d98: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x00000000 +80001d9c: 0004a403 lw x8,0(x9) +80001da0: 00448493 addi x9,x9,4 + +80001da4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + xperm4 x16, x30, x8 # perform operation +80001da4: 288f2833 xperm4 x16,x30,x8 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da8: 00052203 lw x4,0(x10) +80001dac: 01020863 beq x4,x16,80001dbc +80001db0: 790032ef jal x5,80005540 +80001db4: 80001da4 .word 0x80001da4 +80001db8: 8000ba84 .word 0x8000ba84 +80001dbc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x80000001 +80001dc0: 0004ad03 lw x26,0(x9) +80001dc4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x00000001 +80001dc8: 0004a183 lw x3,0(x9) +80001dcc: 00448493 addi x9,x9,4 + +80001dd0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + xperm4 x2, x26, x3 # perform operation +80001dd0: 283d2133 xperm4 x2,x26,x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dd4: 00052203 lw x4,0(x10) +80001dd8: 00220863 beq x4,x2,80001de8 +80001ddc: 764032ef jal x5,80005540 +80001de0: 80001dd0 .word 0x80001dd0 +80001de4: 8000bade .word 0x8000bade +80001de8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x80000001 +80001dec: 0004aa83 lw x21,0(x9) +80001df0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x00000002 +80001df4: 0004a603 lw x12,0(x9) +80001df8: 00448493 addi x9,x9,4 + +80001dfc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + xperm4 x16, x21, x12 # perform operation +80001dfc: 28caa833 xperm4 x16,x21,x12 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e00: 00052203 lw x4,0(x10) +80001e04: 01020863 beq x4,x16,80001e14 +80001e08: 738032ef jal x5,80005540 +80001e0c: 80001dfc .word 0x80001dfc +80001e10: 8000bb38 .word 0x8000bb38 +80001e14: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x80000001 +80001e18: 0004a903 lw x18,0(x9) +80001e1c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x80000000 +80001e20: 0004a083 lw x1,0(x9) +80001e24: 00448493 addi x9,x9,4 + +80001e28 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + xperm4 x19, x18, x1 # perform operation +80001e28: 281929b3 xperm4 x19,x18,x1 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e2c: 00052203 lw x4,0(x10) +80001e30: 01320863 beq x4,x19,80001e40 +80001e34: 70c032ef jal x5,80005540 +80001e38: 80001e28 .word 0x80001e28 +80001e3c: 8000bb92 .word 0x8000bb92 +80001e40: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000001 +80001e44: 0004a603 lw x12,0(x9) +80001e48: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x80000001 +80001e4c: 0004a383 lw x7,0(x9) +80001e50: 00448493 addi x9,x9,4 + +80001e54 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + xperm4 x13, x12, x7 # perform operation +80001e54: 287626b3 xperm4 x13,x12,x7 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e58: 00052203 lw x4,0(x10) +80001e5c: 00d20863 beq x4,x13,80001e6c +80001e60: 6e0032ef jal x5,80005540 +80001e64: 80001e54 .word 0x80001e54 +80001e68: 8000bbf3 .word 0x8000bbf3 +80001e6c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x80000001 +80001e70: 0004ae83 lw x29,0(x9) +80001e74: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7fffffff +80001e78: 0004a583 lw x11,0(x9) +80001e7c: 00448493 addi x9,x9,4 + +80001e80 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + xperm4 x15, x29, x11 # perform operation +80001e80: 28bea7b3 xperm4 x15,x29,x11 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e84: 00052203 lw x4,0(x10) +80001e88: 00f20863 beq x4,x15,80001e98 +80001e8c: 6b4032ef jal x5,80005540 +80001e90: 80001e80 .word 0x80001e80 +80001e94: 8000bc54 .word 0x8000bc54 +80001e98: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x80000001 +80001e9c: 0004a183 lw x3,0(x9) +80001ea0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7ffffffe +80001ea4: 0004a583 lw x11,0(x9) +80001ea8: 00448493 addi x9,x9,4 + +80001eac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + xperm4 x31, x3, x11 # perform operation +80001eac: 28b1afb3 xperm4 x31,x3,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb0: 00052203 lw x4,0(x10) +80001eb4: 01f20863 beq x4,x31,80001ec4 +80001eb8: 688032ef jal x5,80005540 +80001ebc: 80001eac .word 0x80001eac +80001ec0: 8000bcb5 .word 0x8000bcb5 +80001ec4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x80000001 +80001ec8: 0004a683 lw x13,0(x9) +80001ecc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xffffffff +80001ed0: 0004a603 lw x12,0(x9) +80001ed4: 00448493 addi x9,x9,4 + +80001ed8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + xperm4 x27, x13, x12 # perform operation +80001ed8: 28c6adb3 xperm4 x27,x13,x12 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001edc: 00052203 lw x4,0(x10) +80001ee0: 01b20863 beq x4,x27,80001ef0 +80001ee4: 65c032ef jal x5,80005540 +80001ee8: 80001ed8 .word 0x80001ed8 +80001eec: 8000bd16 .word 0x8000bd16 +80001ef0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x80000001 +80001ef4: 0004af83 lw x31,0(x9) +80001ef8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xfffffffe +80001efc: 0004aa83 lw x21,0(x9) +80001f00: 00448493 addi x9,x9,4 + +80001f04 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + xperm4 x29, x31, x21 # perform operation +80001f04: 295faeb3 xperm4 x29,x31,x21 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f08: 00052203 lw x4,0(x10) +80001f0c: 01d20863 beq x4,x29,80001f1c +80001f10: 630032ef jal x5,80005540 +80001f14: 80001f04 .word 0x80001f04 +80001f18: 8000bd77 .word 0x8000bd77 +80001f1c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000001 +80001f20: 0004a603 lw x12,0(x9) +80001f24: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc8872 +80001f28: 0004a703 lw x14,0(x9) +80001f2c: 00448493 addi x9,x9,4 + +80001f30 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + xperm4 x1, x12, x14 # perform operation +80001f30: 28e620b3 xperm4 x1,x12,x14 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f34: 00052203 lw x4,0(x10) +80001f38: 00120863 beq x4,x1,80001f48 +80001f3c: 604032ef jal x5,80005540 +80001f40: 80001f30 .word 0x80001f30 +80001f44: 8000bdd8 .word 0x8000bdd8 +80001f48: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x80000001 +80001f4c: 0004a603 lw x12,0(x9) +80001f50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xaaaaaaaa +80001f54: 0004af03 lw x30,0(x9) +80001f58: 00448493 addi x9,x9,4 + +80001f5c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + xperm4 x25, x12, x30 # perform operation +80001f5c: 29e62cb3 xperm4 x25,x12,x30 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f60: 00052203 lw x4,0(x10) +80001f64: 01920863 beq x4,x25,80001f74 +80001f68: 5d8032ef jal x5,80005540 +80001f6c: 80001f5c .word 0x80001f5c +80001f70: 8000be39 .word 0x8000be39 +80001f74: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x80000001 +80001f78: 0004a783 lw x15,0(x9) +80001f7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x55555555 +80001f80: 0004ab03 lw x22,0(x9) +80001f84: 00448493 addi x9,x9,4 + +80001f88 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + xperm4 x12, x15, x22 # perform operation +80001f88: 2967a633 xperm4 x12,x15,x22 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f8c: 00052203 lw x4,0(x10) +80001f90: 00c20863 beq x4,x12,80001fa0 +80001f94: 5ac032ef jal x5,80005540 +80001f98: 80001f88 .word 0x80001f88 +80001f9c: 8000be9a .word 0x8000be9a +80001fa0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x7fffffff +80001fa4: 0004a603 lw x12,0(x9) +80001fa8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x00000000 +80001fac: 0004ab83 lw x23,0(x9) +80001fb0: 00448493 addi x9,x9,4 + +80001fb4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + xperm4 x19, x12, x23 # perform operation +80001fb4: 297629b3 xperm4 x19,x12,x23 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb8: 00052203 lw x4,0(x10) +80001fbc: 01320863 beq x4,x19,80001fcc +80001fc0: 580032ef jal x5,80005540 +80001fc4: 80001fb4 .word 0x80001fb4 +80001fc8: 8000befb .word 0x8000befb +80001fcc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7fffffff +80001fd0: 0004a983 lw x19,0(x9) +80001fd4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000001 +80001fd8: 0004a103 lw x2,0(x9) +80001fdc: 00448493 addi x9,x9,4 + +80001fe0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + xperm4 x7, x19, x2 # perform operation +80001fe0: 2829a3b3 xperm4 x7,x19,x2 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fe4: 00052203 lw x4,0(x10) +80001fe8: 00720863 beq x4,x7,80001ff8 +80001fec: 554032ef jal x5,80005540 +80001ff0: 80001fe0 .word 0x80001fe0 +80001ff4: 8000bf55 .word 0x8000bf55 +80001ff8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7fffffff +80001ffc: 0004ad83 lw x27,0(x9) +80002000: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000002 +80002004: 0004ae03 lw x28,0(x9) +80002008: 00448493 addi x9,x9,4 + +8000200c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + xperm4 x15, x27, x28 # perform operation +8000200c: 29cda7b3 xperm4 x15,x27,x28 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002010: 00052203 lw x4,0(x10) +80002014: 00f20863 beq x4,x15,80002024 +80002018: 528032ef jal x5,80005540 +8000201c: 8000200c .word 0x8000200c +80002020: 8000bfaf .word 0x8000bfaf +80002024: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x7fffffff +80002028: 0004a603 lw x12,0(x9) +8000202c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x80000000 +80002030: 0004a803 lw x16,0(x9) +80002034: 00448493 addi x9,x9,4 + +80002038 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + xperm4 x15, x12, x16 # perform operation +80002038: 290627b3 xperm4 x15,x12,x16 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000203c: 00052203 lw x4,0(x10) +80002040: 00f20863 beq x4,x15,80002050 +80002044: 4fc032ef jal x5,80005540 +80002048: 80002038 .word 0x80002038 +8000204c: 8000c009 .word 0x8000c009 +80002050: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7fffffff +80002054: 0004ad83 lw x27,0(x9) +80002058: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x80000001 +8000205c: 0004a783 lw x15,0(x9) +80002060: 00448493 addi x9,x9,4 + +80002064 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + xperm4 x21, x27, x15 # perform operation +80002064: 28fdaab3 xperm4 x21,x27,x15 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002068: 00052203 lw x4,0(x10) +8000206c: 01520863 beq x4,x21,8000207c +80002070: 4d0032ef jal x5,80005540 +80002074: 80002064 .word 0x80002064 +80002078: 8000c06a .word 0x8000c06a +8000207c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x7fffffff +80002080: 0004a903 lw x18,0(x9) +80002084: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x7fffffff +80002088: 0004a383 lw x7,0(x9) +8000208c: 00448493 addi x9,x9,4 + +80002090 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + xperm4 x2, x18, x7 # perform operation +80002090: 28792133 xperm4 x2,x18,x7 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002094: 00052203 lw x4,0(x10) +80002098: 00220863 beq x4,x2,800020a8 +8000209c: 4a4032ef jal x5,80005540 +800020a0: 80002090 .word 0x80002090 +800020a4: 8000c0cb .word 0x8000c0cb +800020a8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x7fffffff +800020ac: 0004a583 lw x11,0(x9) +800020b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x7ffffffe +800020b4: 0004ab03 lw x22,0(x9) +800020b8: 00448493 addi x9,x9,4 + +800020bc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + xperm4 x13, x11, x22 # perform operation +800020bc: 2965a6b3 xperm4 x13,x11,x22 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c0: 00052203 lw x4,0(x10) +800020c4: 00d20863 beq x4,x13,800020d4 +800020c8: 478032ef jal x5,80005540 +800020cc: 800020bc .word 0x800020bc +800020d0: 8000c12c .word 0x8000c12c +800020d4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7fffffff +800020d8: 0004aa03 lw x20,0(x9) +800020dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xffffffff +800020e0: 0004ac83 lw x25,0(x9) +800020e4: 00448493 addi x9,x9,4 + +800020e8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + xperm4 x13, x20, x25 # perform operation +800020e8: 299a26b3 xperm4 x13,x20,x25 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020ec: 00052203 lw x4,0(x10) +800020f0: 00d20863 beq x4,x13,80002100 +800020f4: 44c032ef jal x5,80005540 +800020f8: 800020e8 .word 0x800020e8 +800020fc: 8000c18d .word 0x8000c18d +80002100: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7fffffff +80002104: 0004aa03 lw x20,0(x9) +80002108: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xfffffffe +8000210c: 0004a303 lw x6,0(x9) +80002110: 00448493 addi x9,x9,4 + +80002114 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + xperm4 x21, x20, x6 # perform operation +80002114: 286a2ab3 xperm4 x21,x20,x6 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002118: 00052203 lw x4,0(x10) +8000211c: 01520863 beq x4,x21,8000212c +80002120: 420032ef jal x5,80005540 +80002124: 80002114 .word 0x80002114 +80002128: 8000c1ee .word 0x8000c1ee +8000212c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x7fffffff +80002130: 0004a683 lw x13,0(x9) +80002134: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x5bbc8872 +80002138: 0004a083 lw x1,0(x9) +8000213c: 00448493 addi x9,x9,4 + +80002140 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + xperm4 x15, x13, x1 # perform operation +80002140: 2816a7b3 xperm4 x15,x13,x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002144: 00052203 lw x4,0(x10) +80002148: 00f20863 beq x4,x15,80002158 +8000214c: 3f4032ef jal x5,80005540 +80002150: 80002140 .word 0x80002140 +80002154: 8000c24f .word 0x8000c24f +80002158: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7fffffff +8000215c: 0004ad83 lw x27,0(x9) +80002160: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xaaaaaaaa +80002164: 0004a383 lw x7,0(x9) +80002168: 00448493 addi x9,x9,4 + +8000216c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + xperm4 x25, x27, x7 # perform operation +8000216c: 287dacb3 xperm4 x25,x27,x7 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002170: 00052203 lw x4,0(x10) +80002174: 01920863 beq x4,x25,80002184 +80002178: 3c8032ef jal x5,80005540 +8000217c: 8000216c .word 0x8000216c +80002180: 8000c2b0 .word 0x8000c2b0 +80002184: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7fffffff +80002188: 0004a983 lw x19,0(x9) +8000218c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x55555555 +80002190: 0004ac83 lw x25,0(x9) +80002194: 00448493 addi x9,x9,4 + +80002198 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + xperm4 x15, x19, x25 # perform operation +80002198: 2999a7b3 xperm4 x15,x19,x25 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000219c: 00052203 lw x4,0(x10) +800021a0: 00f20863 beq x4,x15,800021b0 +800021a4: 39c032ef jal x5,80005540 +800021a8: 80002198 .word 0x80002198 +800021ac: 8000c311 .word 0x8000c311 +800021b0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffe +800021b4: 0004aa83 lw x21,0(x9) +800021b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000000 +800021bc: 0004ab03 lw x22,0(x9) +800021c0: 00448493 addi x9,x9,4 + +800021c4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + xperm4 x15, x21, x22 # perform operation +800021c4: 296aa7b3 xperm4 x15,x21,x22 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c8: 00052203 lw x4,0(x10) +800021cc: 00f20863 beq x4,x15,800021dc +800021d0: 370032ef jal x5,80005540 +800021d4: 800021c4 .word 0x800021c4 +800021d8: 8000c372 .word 0x8000c372 +800021dc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7ffffffe +800021e0: 0004a703 lw x14,0(x9) +800021e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000001 +800021e8: 0004af03 lw x30,0(x9) +800021ec: 00448493 addi x9,x9,4 + +800021f0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + xperm4 x16, x14, x30 # perform operation +800021f0: 29e72833 xperm4 x16,x14,x30 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021f4: 00052203 lw x4,0(x10) +800021f8: 01020863 beq x4,x16,80002208 +800021fc: 344032ef jal x5,80005540 +80002200: 800021f0 .word 0x800021f0 +80002204: 8000c3cc .word 0x8000c3cc +80002208: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x7ffffffe +8000220c: 0004ad03 lw x26,0(x9) +80002210: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000002 +80002214: 0004af03 lw x30,0(x9) +80002218: 00448493 addi x9,x9,4 + +8000221c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + xperm4 x16, x26, x30 # perform operation +8000221c: 29ed2833 xperm4 x16,x26,x30 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002220: 00052203 lw x4,0(x10) +80002224: 01020863 beq x4,x16,80002234 +80002228: 318032ef jal x5,80005540 +8000222c: 8000221c .word 0x8000221c +80002230: 8000c426 .word 0x8000c426 +80002234: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7ffffffe +80002238: 0004af83 lw x31,0(x9) +8000223c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x80000000 +80002240: 0004aa83 lw x21,0(x9) +80002244: 00448493 addi x9,x9,4 + +80002248 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + xperm4 x6, x31, x21 # perform operation +80002248: 295fa333 xperm4 x6,x31,x21 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000224c: 00052203 lw x4,0(x10) +80002250: 00620863 beq x4,x6,80002260 +80002254: 2ec032ef jal x5,80005540 +80002258: 80002248 .word 0x80002248 +8000225c: 8000c480 .word 0x8000c480 +80002260: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x7ffffffe +80002264: 0004a103 lw x2,0(x9) +80002268: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x80000001 +8000226c: 0004aa83 lw x21,0(x9) +80002270: 00448493 addi x9,x9,4 + +80002274 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + xperm4 x27, x2, x21 # perform operation +80002274: 29512db3 xperm4 x27,x2,x21 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002278: 00052203 lw x4,0(x10) +8000227c: 01b20863 beq x4,x27,8000228c +80002280: 2c0032ef jal x5,80005540 +80002284: 80002274 .word 0x80002274 +80002288: 8000c4e1 .word 0x8000c4e1 +8000228c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7ffffffe +80002290: 0004a183 lw x3,0(x9) +80002294: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x7fffffff +80002298: 0004ae03 lw x28,0(x9) +8000229c: 00448493 addi x9,x9,4 + +800022a0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + xperm4 x19, x3, x28 # perform operation +800022a0: 29c1a9b3 xperm4 x19,x3,x28 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022a4: 00052203 lw x4,0(x10) +800022a8: 01320863 beq x4,x19,800022b8 +800022ac: 294032ef jal x5,80005540 +800022b0: 800022a0 .word 0x800022a0 +800022b4: 8000c542 .word 0x8000c542 +800022b8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffe +800022bc: 0004aa83 lw x21,0(x9) +800022c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x7ffffffe +800022c4: 0004ad83 lw x27,0(x9) +800022c8: 00448493 addi x9,x9,4 + +800022cc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + xperm4 x31, x21, x27 # perform operation +800022cc: 29baafb3 xperm4 x31,x21,x27 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d0: 00052203 lw x4,0(x10) +800022d4: 01f20863 beq x4,x31,800022e4 +800022d8: 268032ef jal x5,80005540 +800022dc: 800022cc .word 0x800022cc +800022e0: 8000c5a3 .word 0x8000c5a3 +800022e4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7ffffffe +800022e8: 0004a703 lw x14,0(x9) +800022ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffff +800022f0: 0004ad03 lw x26,0(x9) +800022f4: 00448493 addi x9,x9,4 + +800022f8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + xperm4 x3, x14, x26 # perform operation +800022f8: 29a721b3 xperm4 x3,x14,x26 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022fc: 00052203 lw x4,0(x10) +80002300: 00320863 beq x4,x3,80002310 +80002304: 23c032ef jal x5,80005540 +80002308: 800022f8 .word 0x800022f8 +8000230c: 8000c604 .word 0x8000c604 +80002310: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7ffffffe +80002314: 0004ab03 lw x22,0(x9) +80002318: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffe +8000231c: 0004ac83 lw x25,0(x9) +80002320: 00448493 addi x9,x9,4 + +80002324 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + xperm4 x21, x22, x25 # perform operation +80002324: 299b2ab3 xperm4 x21,x22,x25 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002328: 00052203 lw x4,0(x10) +8000232c: 01520863 beq x4,x21,8000233c +80002330: 210032ef jal x5,80005540 +80002334: 80002324 .word 0x80002324 +80002338: 8000c665 .word 0x8000c665 +8000233c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x7ffffffe +80002340: 0004a303 lw x6,0(x9) +80002344: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x5bbc8872 +80002348: 0004a403 lw x8,0(x9) +8000234c: 00448493 addi x9,x9,4 + +80002350 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + xperm4 x21, x6, x8 # perform operation +80002350: 28832ab3 xperm4 x21,x6,x8 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002354: 00052203 lw x4,0(x10) +80002358: 01520863 beq x4,x21,80002368 +8000235c: 1e4032ef jal x5,80005540 +80002360: 80002350 .word 0x80002350 +80002364: 8000c6c6 .word 0x8000c6c6 +80002368: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +8000236c: 0004ae83 lw x29,0(x9) +80002370: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaa +80002374: 0004aa03 lw x20,0(x9) +80002378: 00448493 addi x9,x9,4 + +8000237c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + xperm4 x6, x29, x20 # perform operation +8000237c: 294ea333 xperm4 x6,x29,x20 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002380: 00052203 lw x4,0(x10) +80002384: 00620863 beq x4,x6,80002394 +80002388: 1b8032ef jal x5,80005540 +8000238c: 8000237c .word 0x8000237c +80002390: 8000c727 .word 0x8000c727 +80002394: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x7ffffffe +80002398: 0004a383 lw x7,0(x9) +8000239c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x55555555 +800023a0: 0004a083 lw x1,0(x9) +800023a4: 00448493 addi x9,x9,4 + +800023a8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + xperm4 x8, x7, x1 # perform operation +800023a8: 2813a433 xperm4 x8,x7,x1 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023ac: 00052203 lw x4,0(x10) +800023b0: 00820863 beq x4,x8,800023c0 +800023b4: 18c032ef jal x5,80005540 +800023b8: 800023a8 .word 0x800023a8 +800023bc: 8000c788 .word 0x8000c788 +800023c0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffff +800023c4: 0004a703 lw x14,0(x9) +800023c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000000 +800023cc: 0004a683 lw x13,0(x9) +800023d0: 00448493 addi x9,x9,4 + +800023d4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xperm4 x28, x14, x13 # perform operation +800023d4: 28d72e33 xperm4 x28,x14,x13 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d8: 00052203 lw x4,0(x10) +800023dc: 01c20863 beq x4,x28,800023ec +800023e0: 160032ef jal x5,80005540 +800023e4: 800023d4 .word 0x800023d4 +800023e8: 8000c7e9 .word 0x8000c7e9 +800023ec: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffff +800023f0: 0004a703 lw x14,0(x9) +800023f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000001 +800023f8: 0004a103 lw x2,0(x9) +800023fc: 00448493 addi x9,x9,4 + +80002400 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xperm4 x18, x14, x2 # perform operation +80002400: 28272933 xperm4 x18,x14,x2 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002404: 00052203 lw x4,0(x10) +80002408: 01220863 beq x4,x18,80002418 +8000240c: 134032ef jal x5,80005540 +80002410: 80002400 .word 0x80002400 +80002414: 8000c843 .word 0x8000c843 +80002418: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffff +8000241c: 0004a083 lw x1,0(x9) +80002420: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000002 +80002424: 0004ae83 lw x29,0(x9) +80002428: 00448493 addi x9,x9,4 + +8000242c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xperm4 x23, x1, x29 # perform operation +8000242c: 29d0abb3 xperm4 x23,x1,x29 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002430: 00052203 lw x4,0(x10) +80002434: 01720863 beq x4,x23,80002444 +80002438: 108032ef jal x5,80005540 +8000243c: 8000242c .word 0x8000242c +80002440: 8000c89d .word 0x8000c89d +80002444: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xffffffff +80002448: 0004aa83 lw x21,0(x9) +8000244c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x80000000 +80002450: 0004ab03 lw x22,0(x9) +80002454: 00448493 addi x9,x9,4 + +80002458 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + xperm4 x2, x21, x22 # perform operation +80002458: 296aa133 xperm4 x2,x21,x22 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000245c: 00052203 lw x4,0(x10) +80002460: 00220863 beq x4,x2,80002470 +80002464: 0dc032ef jal x5,80005540 +80002468: 80002458 .word 0x80002458 +8000246c: 8000c8f7 .word 0x8000c8f7 +80002470: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xffffffff +80002474: 0004a583 lw x11,0(x9) +80002478: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x80000001 +8000247c: 0004aa03 lw x20,0(x9) +80002480: 00448493 addi x9,x9,4 + +80002484 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + xperm4 x1, x11, x20 # perform operation +80002484: 2945a0b3 xperm4 x1,x11,x20 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002488: 00052203 lw x4,0(x10) +8000248c: 00120863 beq x4,x1,8000249c +80002490: 0b0032ef jal x5,80005540 +80002494: 80002484 .word 0x80002484 +80002498: 8000c958 .word 0x8000c958 +8000249c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xffffffff +800024a0: 0004af83 lw x31,0(x9) +800024a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x7fffffff +800024a8: 0004a303 lw x6,0(x9) +800024ac: 00448493 addi x9,x9,4 + +800024b0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + xperm4 x12, x31, x6 # perform operation +800024b0: 286fa633 xperm4 x12,x31,x6 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024b4: 00052203 lw x4,0(x10) +800024b8: 00c20863 beq x4,x12,800024c8 +800024bc: 084032ef jal x5,80005540 +800024c0: 800024b0 .word 0x800024b0 +800024c4: 8000c9b9 .word 0x8000c9b9 +800024c8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xffffffff +800024cc: 0004a403 lw x8,0(x9) +800024d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffe +800024d4: 0004a883 lw x17,0(x9) +800024d8: 00448493 addi x9,x9,4 + +800024dc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + xperm4 x24, x8, x17 # perform operation +800024dc: 29142c33 xperm4 x24,x8,x17 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e0: 00052203 lw x4,0(x10) +800024e4: 01820863 beq x4,x24,800024f4 +800024e8: 058032ef jal x5,80005540 +800024ec: 800024dc .word 0x800024dc +800024f0: 8000ca1a .word 0x8000ca1a +800024f4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xffffffff +800024f8: 0004ac83 lw x25,0(x9) +800024fc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffff +80002500: 0004ad03 lw x26,0(x9) +80002504: 00448493 addi x9,x9,4 + +80002508 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xperm4 x29, x25, x26 # perform operation +80002508: 29acaeb3 xperm4 x29,x25,x26 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +8000250c: 00052203 lw x4,0(x10) +80002510: 01d20863 beq x4,x29,80002520 +80002514: 02c032ef jal x5,80005540 +80002518: 80002508 .word 0x80002508 +8000251c: 8000ca7b .word 0x8000ca7b +80002520: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xffffffff +80002524: 0004a783 lw x15,0(x9) +80002528: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xfffffffe +8000252c: 0004a603 lw x12,0(x9) +80002530: 00448493 addi x9,x9,4 + +80002534 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xperm4 x11, x15, x12 # perform operation +80002534: 28c7a5b3 xperm4 x11,x15,x12 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002538: 00052203 lw x4,0(x10) +8000253c: 00b20863 beq x4,x11,8000254c +80002540: 000032ef jal x5,80005540 +80002544: 80002534 .word 0x80002534 +80002548: 8000cadc .word 0x8000cadc +8000254c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xffffffff +80002550: 0004ab03 lw x22,0(x9) +80002554: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x5bbc8872 +80002558: 0004a383 lw x7,0(x9) +8000255c: 00448493 addi x9,x9,4 + +80002560 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + xperm4 x24, x22, x7 # perform operation +80002560: 287b2c33 xperm4 x24,x22,x7 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002564: 00052203 lw x4,0(x10) +80002568: 01820863 beq x4,x24,80002578 +8000256c: 7d5022ef jal x5,80005540 +80002570: 80002560 .word 0x80002560 +80002574: 8000cb3d .word 0x8000cb3d +80002578: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xffffffff +8000257c: 0004ac83 lw x25,0(x9) +80002580: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xaaaaaaaa +80002584: 0004a183 lw x3,0(x9) +80002588: 00448493 addi x9,x9,4 + +8000258c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + xperm4 x8, x25, x3 # perform operation +8000258c: 283ca433 xperm4 x8,x25,x3 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002590: 00052203 lw x4,0(x10) +80002594: 00820863 beq x4,x8,800025a4 +80002598: 7a9022ef jal x5,80005540 +8000259c: 8000258c .word 0x8000258c +800025a0: 8000cb9e .word 0x8000cb9e +800025a4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xffffffff +800025a8: 0004a683 lw x13,0(x9) +800025ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x55555555 +800025b0: 0004a883 lw x17,0(x9) +800025b4: 00448493 addi x9,x9,4 + +800025b8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + xperm4 x7, x13, x17 # perform operation +800025b8: 2916a3b3 xperm4 x7,x13,x17 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025bc: 00052203 lw x4,0(x10) +800025c0: 00720863 beq x4,x7,800025d0 +800025c4: 77d022ef jal x5,80005540 +800025c8: 800025b8 .word 0x800025b8 +800025cc: 8000cbff .word 0x8000cbff +800025d0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xfffffffe +800025d4: 0004a103 lw x2,0(x9) +800025d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000 +800025dc: 0004ac83 lw x25,0(x9) +800025e0: 00448493 addi x9,x9,4 + +800025e4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xperm4 x20, x2, x25 # perform operation +800025e4: 29912a33 xperm4 x20,x2,x25 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e8: 00052203 lw x4,0(x10) +800025ec: 01420863 beq x4,x20,800025fc +800025f0: 751022ef jal x5,80005540 +800025f4: 800025e4 .word 0x800025e4 +800025f8: 8000cc60 .word 0x8000cc60 +800025fc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xfffffffe +80002600: 0004af03 lw x30,0(x9) +80002604: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000001 +80002608: 0004a883 lw x17,0(x9) +8000260c: 00448493 addi x9,x9,4 + +80002610 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xperm4 x20, x30, x17 # perform operation +80002610: 291f2a33 xperm4 x20,x30,x17 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002614: 00052203 lw x4,0(x10) +80002618: 01420863 beq x4,x20,80002628 +8000261c: 725022ef jal x5,80005540 +80002620: 80002610 .word 0x80002610 +80002624: 8000ccba .word 0x8000ccba +80002628: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xfffffffe +8000262c: 0004aa03 lw x20,0(x9) +80002630: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x00000002 +80002634: 0004a683 lw x13,0(x9) +80002638: 00448493 addi x9,x9,4 + +8000263c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xperm4 x25, x20, x13 # perform operation +8000263c: 28da2cb3 xperm4 x25,x20,x13 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002640: 00052203 lw x4,0(x10) +80002644: 01920863 beq x4,x25,80002654 +80002648: 6f9022ef jal x5,80005540 +8000264c: 8000263c .word 0x8000263c +80002650: 8000cd14 .word 0x8000cd14 +80002654: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xfffffffe +80002658: 0004a603 lw x12,0(x9) +8000265c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x80000000 +80002660: 0004a903 lw x18,0(x9) +80002664: 00448493 addi x9,x9,4 + +80002668 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + xperm4 x14, x12, x18 # perform operation +80002668: 29262733 xperm4 x14,x12,x18 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000266c: 00052203 lw x4,0(x10) +80002670: 00e20863 beq x4,x14,80002680 +80002674: 6cd022ef jal x5,80005540 +80002678: 80002668 .word 0x80002668 +8000267c: 8000cd6e .word 0x8000cd6e +80002680: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xfffffffe +80002684: 0004aa83 lw x21,0(x9) +80002688: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x80000001 +8000268c: 0004ad03 lw x26,0(x9) +80002690: 00448493 addi x9,x9,4 + +80002694 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + xperm4 x16, x21, x26 # perform operation +80002694: 29aaa833 xperm4 x16,x21,x26 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002698: 00052203 lw x4,0(x10) +8000269c: 01020863 beq x4,x16,800026ac +800026a0: 6a1022ef jal x5,80005540 +800026a4: 80002694 .word 0x80002694 +800026a8: 8000cdcf .word 0x8000cdcf +800026ac: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xfffffffe +800026b0: 0004ad83 lw x27,0(x9) +800026b4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7fffffff +800026b8: 0004ab83 lw x23,0(x9) +800026bc: 00448493 addi x9,x9,4 + +800026c0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + xperm4 x25, x27, x23 # perform operation +800026c0: 297dacb3 xperm4 x25,x27,x23 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026c4: 00052203 lw x4,0(x10) +800026c8: 01920863 beq x4,x25,800026d8 +800026cc: 675022ef jal x5,80005540 +800026d0: 800026c0 .word 0x800026c0 +800026d4: 8000ce30 .word 0x8000ce30 +800026d8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xfffffffe +800026dc: 0004ae83 lw x29,0(x9) +800026e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffe +800026e4: 0004a883 lw x17,0(x9) +800026e8: 00448493 addi x9,x9,4 + +800026ec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + xperm4 x23, x29, x17 # perform operation +800026ec: 291eabb3 xperm4 x23,x29,x17 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f0: 00052203 lw x4,0(x10) +800026f4: 01720863 beq x4,x23,80002704 +800026f8: 649022ef jal x5,80005540 +800026fc: 800026ec .word 0x800026ec +80002700: 8000ce91 .word 0x8000ce91 +80002704: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffe +80002708: 0004a083 lw x1,0(x9) +8000270c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xffffffff +80002710: 0004a683 lw x13,0(x9) +80002714: 00448493 addi x9,x9,4 + +80002718 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xperm4 x19, x1, x13 # perform operation +80002718: 28d0a9b3 xperm4 x19,x1,x13 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +8000271c: 00052203 lw x4,0(x10) +80002720: 01320863 beq x4,x19,80002730 +80002724: 61d022ef jal x5,80005540 +80002728: 80002718 .word 0x80002718 +8000272c: 8000cef2 .word 0x8000cef2 +80002730: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xfffffffe +80002734: 0004a583 lw x11,0(x9) +80002738: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xfffffffe +8000273c: 0004a603 lw x12,0(x9) +80002740: 00448493 addi x9,x9,4 + +80002744 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xperm4 x17, x11, x12 # perform operation +80002744: 28c5a8b3 xperm4 x17,x11,x12 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002748: 00052203 lw x4,0(x10) +8000274c: 01120863 beq x4,x17,8000275c +80002750: 5f1022ef jal x5,80005540 +80002754: 80002744 .word 0x80002744 +80002758: 8000cf53 .word 0x8000cf53 +8000275c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xfffffffe +80002760: 0004ac83 lw x25,0(x9) +80002764: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x5bbc8872 +80002768: 0004ae83 lw x29,0(x9) +8000276c: 00448493 addi x9,x9,4 + +80002770 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + xperm4 x14, x25, x29 # perform operation +80002770: 29dca733 xperm4 x14,x25,x29 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002774: 00052203 lw x4,0(x10) +80002778: 00e20863 beq x4,x14,80002788 +8000277c: 5c5022ef jal x5,80005540 +80002780: 80002770 .word 0x80002770 +80002784: 8000cfb4 .word 0x8000cfb4 +80002788: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xfffffffe +8000278c: 0004a683 lw x13,0(x9) +80002790: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xaaaaaaaa +80002794: 0004ac83 lw x25,0(x9) +80002798: 00448493 addi x9,x9,4 + +8000279c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + xperm4 x12, x13, x25 # perform operation +8000279c: 2996a633 xperm4 x12,x13,x25 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a0: 00052203 lw x4,0(x10) +800027a4: 00c20863 beq x4,x12,800027b4 +800027a8: 599022ef jal x5,80005540 +800027ac: 8000279c .word 0x8000279c +800027b0: 8000d015 .word 0x8000d015 +800027b4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xfffffffe +800027b8: 0004aa83 lw x21,0(x9) +800027bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x55555555 +800027c0: 0004a683 lw x13,0(x9) +800027c4: 00448493 addi x9,x9,4 + +800027c8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + xperm4 x8, x21, x13 # perform operation +800027c8: 28daa433 xperm4 x8,x21,x13 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027cc: 00052203 lw x4,0(x10) +800027d0: 00820863 beq x4,x8,800027e0 +800027d4: 56d022ef jal x5,80005540 +800027d8: 800027c8 .word 0x800027c8 +800027dc: 8000d076 .word 0x8000d076 +800027e0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x5bbc8872 +800027e4: 0004a103 lw x2,0(x9) +800027e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x00000000 +800027ec: 0004a403 lw x8,0(x9) +800027f0: 00448493 addi x9,x9,4 + +800027f4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + xperm4 x17, x2, x8 # perform operation +800027f4: 288128b3 xperm4 x17,x2,x8 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f8: 00052203 lw x4,0(x10) +800027fc: 01120863 beq x4,x17,8000280c +80002800: 541022ef jal x5,80005540 +80002804: 800027f4 .word 0x800027f4 +80002808: 8000d0d7 .word 0x8000d0d7 +8000280c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5bbc8872 +80002810: 0004a703 lw x14,0(x9) +80002814: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000001 +80002818: 0004ac83 lw x25,0(x9) +8000281c: 00448493 addi x9,x9,4 + +80002820 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + xperm4 x2, x14, x25 # perform operation +80002820: 29972133 xperm4 x2,x14,x25 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002824: 00052203 lw x4,0(x10) +80002828: 00220863 beq x4,x2,80002838 +8000282c: 515022ef jal x5,80005540 +80002830: 80002820 .word 0x80002820 +80002834: 8000d131 .word 0x8000d131 +80002838: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5bbc8872 +8000283c: 0004a703 lw x14,0(x9) +80002840: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000002 +80002844: 0004a883 lw x17,0(x9) +80002848: 00448493 addi x9,x9,4 + +8000284c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + xperm4 x20, x14, x17 # perform operation +8000284c: 29172a33 xperm4 x20,x14,x17 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002850: 00052203 lw x4,0(x10) +80002854: 01420863 beq x4,x20,80002864 +80002858: 4e9022ef jal x5,80005540 +8000285c: 8000284c .word 0x8000284c +80002860: 8000d18b .word 0x8000d18b +80002864: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5bbc8872 +80002868: 0004aa83 lw x21,0(x9) +8000286c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x80000000 +80002870: 0004a883 lw x17,0(x9) +80002874: 00448493 addi x9,x9,4 + +80002878 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + xperm4 x29, x21, x17 # perform operation +80002878: 291aaeb3 xperm4 x29,x21,x17 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000287c: 00052203 lw x4,0(x10) +80002880: 01d20863 beq x4,x29,80002890 +80002884: 4bd022ef jal x5,80005540 +80002888: 80002878 .word 0x80002878 +8000288c: 8000d1e5 .word 0x8000d1e5 +80002890: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x5bbc8872 +80002894: 0004a403 lw x8,0(x9) +80002898: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x80000001 +8000289c: 0004af83 lw x31,0(x9) +800028a0: 00448493 addi x9,x9,4 + +800028a4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + xperm4 x11, x8, x31 # perform operation +800028a4: 29f425b3 xperm4 x11,x8,x31 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a8: 00052203 lw x4,0(x10) +800028ac: 00b20863 beq x4,x11,800028bc +800028b0: 491022ef jal x5,80005540 +800028b4: 800028a4 .word 0x800028a4 +800028b8: 8000d246 .word 0x8000d246 +800028bc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x5bbc8872 +800028c0: 0004a083 lw x1,0(x9) +800028c4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x7fffffff +800028c8: 0004ac03 lw x24,0(x9) +800028cc: 00448493 addi x9,x9,4 + +800028d0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + xperm4 x17, x1, x24 # perform operation +800028d0: 2980a8b3 xperm4 x17,x1,x24 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028d4: 00052203 lw x4,0(x10) +800028d8: 01120863 beq x4,x17,800028e8 +800028dc: 465022ef jal x5,80005540 +800028e0: 800028d0 .word 0x800028d0 +800028e4: 8000d2a7 .word 0x8000d2a7 +800028e8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x5bbc8872 +800028ec: 0004a603 lw x12,0(x9) +800028f0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x7ffffffe +800028f4: 0004ac03 lw x24,0(x9) +800028f8: 00448493 addi x9,x9,4 + +800028fc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + xperm4 x22, x12, x24 # perform operation +800028fc: 29862b33 xperm4 x22,x12,x24 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002900: 00052203 lw x4,0(x10) +80002904: 01620863 beq x4,x22,80002914 +80002908: 439022ef jal x5,80005540 +8000290c: 800028fc .word 0x800028fc +80002910: 8000d308 .word 0x8000d308 +80002914: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x5bbc8872 +80002918: 0004ab83 lw x23,0(x9) +8000291c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xffffffff +80002920: 0004a903 lw x18,0(x9) +80002924: 00448493 addi x9,x9,4 + +80002928 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + xperm4 x24, x23, x18 # perform operation +80002928: 292bac33 xperm4 x24,x23,x18 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000292c: 00052203 lw x4,0(x10) +80002930: 01820863 beq x4,x24,80002940 +80002934: 40d022ef jal x5,80005540 +80002938: 80002928 .word 0x80002928 +8000293c: 8000d369 .word 0x8000d369 +80002940: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x5bbc8872 +80002944: 0004ad03 lw x26,0(x9) +80002948: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xfffffffe +8000294c: 0004a783 lw x15,0(x9) +80002950: 00448493 addi x9,x9,4 + +80002954 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + xperm4 x7, x26, x15 # perform operation +80002954: 28fd23b3 xperm4 x7,x26,x15 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002958: 00052203 lw x4,0(x10) +8000295c: 00720863 beq x4,x7,8000296c +80002960: 3e1022ef jal x5,80005540 +80002964: 80002954 .word 0x80002954 +80002968: 8000d3ca .word 0x8000d3ca +8000296c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x5bbc8872 +80002970: 0004a883 lw x17,0(x9) +80002974: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x5bbc8872 +80002978: 0004ac83 lw x25,0(x9) +8000297c: 00448493 addi x9,x9,4 + +80002980 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + xperm4 x20, x17, x25 # perform operation +80002980: 2998aa33 xperm4 x20,x17,x25 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002984: 00052203 lw x4,0(x10) +80002988: 01420863 beq x4,x20,80002998 +8000298c: 3b5022ef jal x5,80005540 +80002990: 80002980 .word 0x80002980 +80002994: 8000d42b .word 0x8000d42b +80002998: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x5bbc8872 +8000299c: 0004a403 lw x8,0(x9) +800029a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xaaaaaaaa +800029a4: 0004af83 lw x31,0(x9) +800029a8: 00448493 addi x9,x9,4 + +800029ac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + xperm4 x27, x8, x31 # perform operation +800029ac: 29f42db3 xperm4 x27,x8,x31 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b0: 00052203 lw x4,0(x10) +800029b4: 01b20863 beq x4,x27,800029c4 +800029b8: 389022ef jal x5,80005540 +800029bc: 800029ac .word 0x800029ac +800029c0: 8000d48c .word 0x8000d48c +800029c4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x5bbc8872 +800029c8: 0004aa03 lw x20,0(x9) +800029cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x55555555 +800029d0: 0004ab83 lw x23,0(x9) +800029d4: 00448493 addi x9,x9,4 + +800029d8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + xperm4 x24, x20, x23 # perform operation +800029d8: 297a2c33 xperm4 x24,x20,x23 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029dc: 00052203 lw x4,0(x10) +800029e0: 01820863 beq x4,x24,800029f0 +800029e4: 35d022ef jal x5,80005540 +800029e8: 800029d8 .word 0x800029d8 +800029ec: 8000d4ed .word 0x8000d4ed +800029f0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaa +800029f4: 0004aa83 lw x21,0(x9) +800029f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000 +800029fc: 0004a103 lw x2,0(x9) +80002a00: 00448493 addi x9,x9,4 + +80002a04 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + xperm4 x26, x21, x2 # perform operation +80002a04: 282aad33 xperm4 x26,x21,x2 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a08: 00052203 lw x4,0(x10) +80002a0c: 01a20863 beq x4,x26,80002a1c +80002a10: 331022ef jal x5,80005540 +80002a14: 80002a04 .word 0x80002a04 +80002a18: 8000d54e .word 0x8000d54e +80002a1c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xaaaaaaaa +80002a20: 0004a903 lw x18,0(x9) +80002a24: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000001 +80002a28: 0004a103 lw x2,0(x9) +80002a2c: 00448493 addi x9,x9,4 + +80002a30 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + xperm4 x13, x18, x2 # perform operation +80002a30: 282926b3 xperm4 x13,x18,x2 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a34: 00052203 lw x4,0(x10) +80002a38: 00d20863 beq x4,x13,80002a48 +80002a3c: 305022ef jal x5,80005540 +80002a40: 80002a30 .word 0x80002a30 +80002a44: 8000d5a8 .word 0x8000d5a8 +80002a48: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xaaaaaaaa +80002a4c: 0004a883 lw x17,0(x9) +80002a50: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x00000002 +80002a54: 0004ab83 lw x23,0(x9) +80002a58: 00448493 addi x9,x9,4 + +80002a5c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + xperm4 x30, x17, x23 # perform operation +80002a5c: 2978af33 xperm4 x30,x17,x23 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a60: 00052203 lw x4,0(x10) +80002a64: 01e20863 beq x4,x30,80002a74 +80002a68: 2d9022ef jal x5,80005540 +80002a6c: 80002a5c .word 0x80002a5c +80002a70: 8000d602 .word 0x8000d602 +80002a74: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xaaaaaaaa +80002a78: 0004af03 lw x30,0(x9) +80002a7c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x80000000 +80002a80: 0004a583 lw x11,0(x9) +80002a84: 00448493 addi x9,x9,4 + +80002a88 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + xperm4 x14, x30, x11 # perform operation +80002a88: 28bf2733 xperm4 x14,x30,x11 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a8c: 00052203 lw x4,0(x10) +80002a90: 00e20863 beq x4,x14,80002aa0 +80002a94: 2ad022ef jal x5,80005540 +80002a98: 80002a88 .word 0x80002a88 +80002a9c: 8000d65c .word 0x8000d65c +80002aa0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaa +80002aa4: 0004ab03 lw x22,0(x9) +80002aa8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x80000001 +80002aac: 0004a883 lw x17,0(x9) +80002ab0: 00448493 addi x9,x9,4 + +80002ab4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + xperm4 x23, x22, x17 # perform operation +80002ab4: 291b2bb3 xperm4 x23,x22,x17 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab8: 00052203 lw x4,0(x10) +80002abc: 01720863 beq x4,x23,80002acc +80002ac0: 281022ef jal x5,80005540 +80002ac4: 80002ab4 .word 0x80002ab4 +80002ac8: 8000d6bd .word 0x8000d6bd +80002acc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xaaaaaaaa +80002ad0: 0004ac03 lw x24,0(x9) +80002ad4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffff +80002ad8: 0004aa03 lw x20,0(x9) +80002adc: 00448493 addi x9,x9,4 + +80002ae0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + xperm4 x14, x24, x20 # perform operation +80002ae0: 294c2733 xperm4 x14,x24,x20 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ae4: 00052203 lw x4,0(x10) +80002ae8: 00e20863 beq x4,x14,80002af8 +80002aec: 255022ef jal x5,80005540 +80002af0: 80002ae0 .word 0x80002ae0 +80002af4: 8000d71e .word 0x8000d71e +80002af8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xaaaaaaaa +80002afc: 0004a983 lw x19,0(x9) +80002b00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffe +80002b04: 0004ae83 lw x29,0(x9) +80002b08: 00448493 addi x9,x9,4 + +80002b0c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + xperm4 x18, x19, x29 # perform operation +80002b0c: 29d9a933 xperm4 x18,x19,x29 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b10: 00052203 lw x4,0(x10) +80002b14: 01220863 beq x4,x18,80002b24 +80002b18: 229022ef jal x5,80005540 +80002b1c: 80002b0c .word 0x80002b0c +80002b20: 8000d77f .word 0x8000d77f +80002b24: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xaaaaaaaa +80002b28: 0004a583 lw x11,0(x9) +80002b2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xffffffff +80002b30: 0004a983 lw x19,0(x9) +80002b34: 00448493 addi x9,x9,4 + +80002b38 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + xperm4 x29, x11, x19 # perform operation +80002b38: 2935aeb3 xperm4 x29,x11,x19 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b3c: 00052203 lw x4,0(x10) +80002b40: 01d20863 beq x4,x29,80002b50 +80002b44: 1fd022ef jal x5,80005540 +80002b48: 80002b38 .word 0x80002b38 +80002b4c: 8000d7e0 .word 0x8000d7e0 +80002b50: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xaaaaaaaa +80002b54: 0004a903 lw x18,0(x9) +80002b58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xfffffffe +80002b5c: 0004af83 lw x31,0(x9) +80002b60: 00448493 addi x9,x9,4 + +80002b64 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + xperm4 x2, x18, x31 # perform operation +80002b64: 29f92133 xperm4 x2,x18,x31 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b68: 00052203 lw x4,0(x10) +80002b6c: 00220863 beq x4,x2,80002b7c +80002b70: 1d1022ef jal x5,80005540 +80002b74: 80002b64 .word 0x80002b64 +80002b78: 8000d841 .word 0x8000d841 +80002b7c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xaaaaaaaa +80002b80: 0004a383 lw x7,0(x9) +80002b84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5bbc8872 +80002b88: 0004ab03 lw x22,0(x9) +80002b8c: 00448493 addi x9,x9,4 + +80002b90 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + xperm4 x6, x7, x22 # perform operation +80002b90: 2963a333 xperm4 x6,x7,x22 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b94: 00052203 lw x4,0(x10) +80002b98: 00620863 beq x4,x6,80002ba8 +80002b9c: 1a5022ef jal x5,80005540 +80002ba0: 80002b90 .word 0x80002b90 +80002ba4: 8000d8a2 .word 0x8000d8a2 +80002ba8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xaaaaaaaa +80002bac: 0004a983 lw x19,0(x9) +80002bb0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xaaaaaaaa +80002bb4: 0004a303 lw x6,0(x9) +80002bb8: 00448493 addi x9,x9,4 + +80002bbc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + xperm4 x14, x19, x6 # perform operation +80002bbc: 2869a733 xperm4 x14,x19,x6 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc0: 00052203 lw x4,0(x10) +80002bc4: 00e20863 beq x4,x14,80002bd4 +80002bc8: 179022ef jal x5,80005540 +80002bcc: 80002bbc .word 0x80002bbc +80002bd0: 8000d903 .word 0x8000d903 +80002bd4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xaaaaaaaa +80002bd8: 0004a783 lw x15,0(x9) +80002bdc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x55555555 +80002be0: 0004a583 lw x11,0(x9) +80002be4: 00448493 addi x9,x9,4 + +80002be8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + xperm4 x17, x15, x11 # perform operation +80002be8: 28b7a8b3 xperm4 x17,x15,x11 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bec: 00052203 lw x4,0(x10) +80002bf0: 01120863 beq x4,x17,80002c00 +80002bf4: 14d022ef jal x5,80005540 +80002bf8: 80002be8 .word 0x80002be8 +80002bfc: 8000d964 .word 0x8000d964 +80002c00: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x55555555 +80002c04: 0004af03 lw x30,0(x9) +80002c08: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x00000000 +80002c0c: 0004a583 lw x11,0(x9) +80002c10: 00448493 addi x9,x9,4 + +80002c14 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + xperm4 x31, x30, x11 # perform operation +80002c14: 28bf2fb3 xperm4 x31,x30,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c18: 00052203 lw x4,0(x10) +80002c1c: 01f20863 beq x4,x31,80002c2c +80002c20: 121022ef jal x5,80005540 +80002c24: 80002c14 .word 0x80002c14 +80002c28: 8000d9c5 .word 0x8000d9c5 +80002c2c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x55555555 +80002c30: 0004af03 lw x30,0(x9) +80002c34: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000001 +80002c38: 0004ae83 lw x29,0(x9) +80002c3c: 00448493 addi x9,x9,4 + +80002c40 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + xperm4 x14, x30, x29 # perform operation +80002c40: 29df2733 xperm4 x14,x30,x29 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c44: 00052203 lw x4,0(x10) +80002c48: 00e20863 beq x4,x14,80002c58 +80002c4c: 0f5022ef jal x5,80005540 +80002c50: 80002c40 .word 0x80002c40 +80002c54: 8000da1f .word 0x8000da1f +80002c58: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x55555555 +80002c5c: 0004af03 lw x30,0(x9) +80002c60: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000002 +80002c64: 0004aa83 lw x21,0(x9) +80002c68: 00448493 addi x9,x9,4 + +80002c6c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + xperm4 x7, x30, x21 # perform operation +80002c6c: 295f23b3 xperm4 x7,x30,x21 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c70: 00052203 lw x4,0(x10) +80002c74: 00720863 beq x4,x7,80002c84 +80002c78: 0c9022ef jal x5,80005540 +80002c7c: 80002c6c .word 0x80002c6c +80002c80: 8000da79 .word 0x8000da79 +80002c84: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x55555555 +80002c88: 0004a683 lw x13,0(x9) +80002c8c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x80000000 +80002c90: 0004a183 lw x3,0(x9) +80002c94: 00448493 addi x9,x9,4 + +80002c98 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + xperm4 x7, x13, x3 # perform operation +80002c98: 2836a3b3 xperm4 x7,x13,x3 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c9c: 00052203 lw x4,0(x10) +80002ca0: 00720863 beq x4,x7,80002cb0 +80002ca4: 09d022ef jal x5,80005540 +80002ca8: 80002c98 .word 0x80002c98 +80002cac: 8000dad3 .word 0x8000dad3 +80002cb0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x55555555 +80002cb4: 0004a303 lw x6,0(x9) +80002cb8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x80000001 +80002cbc: 0004a783 lw x15,0(x9) +80002cc0: 00448493 addi x9,x9,4 + +80002cc4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + xperm4 x1, x6, x15 # perform operation +80002cc4: 28f320b3 xperm4 x1,x6,x15 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc8: 00052203 lw x4,0(x10) +80002ccc: 00120863 beq x4,x1,80002cdc +80002cd0: 071022ef jal x5,80005540 +80002cd4: 80002cc4 .word 0x80002cc4 +80002cd8: 8000db34 .word 0x8000db34 +80002cdc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x55555555 +80002ce0: 0004ae83 lw x29,0(x9) +80002ce4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fffffff +80002ce8: 0004a803 lw x16,0(x9) +80002cec: 00448493 addi x9,x9,4 + +80002cf0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + xperm4 x24, x29, x16 # perform operation +80002cf0: 290eac33 xperm4 x24,x29,x16 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cf4: 00052203 lw x4,0(x10) +80002cf8: 01820863 beq x4,x24,80002d08 +80002cfc: 045022ef jal x5,80005540 +80002d00: 80002cf0 .word 0x80002cf0 +80002d04: 8000db95 .word 0x8000db95 +80002d08: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x55555555 +80002d0c: 0004ad03 lw x26,0(x9) +80002d10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7ffffffe +80002d14: 0004a703 lw x14,0(x9) +80002d18: 00448493 addi x9,x9,4 + +80002d1c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + xperm4 x28, x26, x14 # perform operation +80002d1c: 28ed2e33 xperm4 x28,x26,x14 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d20: 00052203 lw x4,0(x10) +80002d24: 01c20863 beq x4,x28,80002d34 +80002d28: 019022ef jal x5,80005540 +80002d2c: 80002d1c .word 0x80002d1c +80002d30: 8000dbf6 .word 0x8000dbf6 +80002d34: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x55555555 +80002d38: 0004a803 lw x16,0(x9) +80002d3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xffffffff +80002d40: 0004a703 lw x14,0(x9) +80002d44: 00448493 addi x9,x9,4 + +80002d48 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + xperm4 x11, x16, x14 # perform operation +80002d48: 28e825b3 xperm4 x11,x16,x14 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d4c: 00052203 lw x4,0(x10) +80002d50: 00b20863 beq x4,x11,80002d60 +80002d54: 7ec022ef jal x5,80005540 +80002d58: 80002d48 .word 0x80002d48 +80002d5c: 8000dc57 .word 0x8000dc57 +80002d60: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x55555555 +80002d64: 0004a083 lw x1,0(x9) +80002d68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffe +80002d6c: 0004ae83 lw x29,0(x9) +80002d70: 00448493 addi x9,x9,4 + +80002d74 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + xperm4 x11, x1, x29 # perform operation +80002d74: 29d0a5b3 xperm4 x11,x1,x29 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d78: 00052203 lw x4,0(x10) +80002d7c: 00b20863 beq x4,x11,80002d8c +80002d80: 7c0022ef jal x5,80005540 +80002d84: 80002d74 .word 0x80002d74 +80002d88: 8000dcb8 .word 0x8000dcb8 +80002d8c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x55555555 +80002d90: 0004ae83 lw x29,0(x9) +80002d94: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x5bbc8872 +80002d98: 0004ac83 lw x25,0(x9) +80002d9c: 00448493 addi x9,x9,4 + +80002da0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + xperm4 x13, x29, x25 # perform operation +80002da0: 299ea6b3 xperm4 x13,x29,x25 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002da4: 00052203 lw x4,0(x10) +80002da8: 00d20863 beq x4,x13,80002db8 +80002dac: 794022ef jal x5,80005540 +80002db0: 80002da0 .word 0x80002da0 +80002db4: 8000dd19 .word 0x8000dd19 +80002db8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x55555555 +80002dbc: 0004a403 lw x8,0(x9) +80002dc0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xaaaaaaaa +80002dc4: 0004a583 lw x11,0(x9) +80002dc8: 00448493 addi x9,x9,4 + +80002dcc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + xperm4 x2, x8, x11 # perform operation +80002dcc: 28b42133 xperm4 x2,x8,x11 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd0: 00052203 lw x4,0(x10) +80002dd4: 00220863 beq x4,x2,80002de4 +80002dd8: 768022ef jal x5,80005540 +80002ddc: 80002dcc .word 0x80002dcc +80002de0: 8000dd7a .word 0x8000dd7a +80002de4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x55555555 +80002de8: 0004a603 lw x12,0(x9) +80002dec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x55555555 +80002df0: 0004a883 lw x17,0(x9) +80002df4: 00448493 addi x9,x9,4 + +80002df8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + xperm4 x25, x12, x17 # perform operation +80002df8: 29162cb3 xperm4 x25,x12,x17 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002dfc: 00052203 lw x4,0(x10) +80002e00: 01920863 beq x4,x25,80002e10 +80002e04: 73c022ef jal x5,80005540 +80002e08: 80002df8 .word 0x80002df8 +80002e0c: 8000dddb .word 0x8000dddb +80002e10: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x8b84278a +80002e14: 0004a003 lw x0,0(x9) +80002e18: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x88229a6d +80002e1c: 0004a003 lw x0,0(x9) +80002e20: 00448493 addi x9,x9,4 + +80002e24 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b0: + xperm4 x2, x0, x0 # perform operation +80002e24: 28002133 xperm4 x2,x0,x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkx_xperm4_cg_cmp_rs1_rs2_b0, Zbkx_xperm4_cg_cmp_rs1_rs2_b0_str) +80002e28: 00052203 lw x4,0(x10) +80002e2c: 00220863 beq x4,x2,80002e3c +80002e30: 710022ef jal x5,80005540 +80002e34: 80002e24 .word 0x80002e24 +80002e38: 8000de3c .word 0x8000de3c +80002e3c: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xeebd86a5 +80002e40: 0004a083 lw x1,0(x9) +80002e44: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xbd97510c +80002e48: 0004a083 lw x1,0(x9) +80002e4c: 00448493 addi x9,x9,4 + +80002e50 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b1: + xperm4 x13, x1, x1 # perform operation +80002e50: 2810a6b3 xperm4 x13,x1,x1 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zbkx_xperm4_cg_cmp_rs1_rs2_b1, Zbkx_xperm4_cg_cmp_rs1_rs2_b1_str) +80002e54: 00052203 lw x4,0(x10) +80002e58: 00d20863 beq x4,x13,80002e68 +80002e5c: 6e4022ef jal x5,80005540 +80002e60: 80002e50 .word 0x80002e50 +80002e64: 8000de76 .word 0x8000de76 +80002e68: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8611f857 +80002e6c: 0004a103 lw x2,0(x9) +80002e70: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x56999b2c +80002e74: 0004a103 lw x2,0(x9) +80002e78: 00448493 addi x9,x9,4 + +80002e7c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b2: + xperm4 x0, x2, x2 # perform operation +80002e7c: 28212033 xperm4 x0,x2,x2 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zbkx_xperm4_cg_cmp_rs1_rs2_b2, Zbkx_xperm4_cg_cmp_rs1_rs2_b2_str) +80002e80: 00052203 lw x4,0(x10) +80002e84: 00020863 beq x4,x0,80002e94 +80002e88: 6b8022ef jal x5,80005540 +80002e8c: 80002e7c .word 0x80002e7c +80002e90: 8000deb0 .word 0x8000deb0 +80002e94: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x17a89f8e +80002e98: 0004a183 lw x3,0(x9) +80002e9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x2ae10d23 +80002ea0: 0004a183 lw x3,0(x9) +80002ea4: 00448493 addi x9,x9,4 + +80002ea8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b3: + xperm4 x12, x3, x3 # perform operation +80002ea8: 2831a633 xperm4 x12,x3,x3 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkx_xperm4_cg_cmp_rs1_rs2_b3, Zbkx_xperm4_cg_cmp_rs1_rs2_b3_str) +80002eac: 00052203 lw x4,0(x10) +80002eb0: 00c20863 beq x4,x12,80002ec0 +80002eb4: 68c022ef jal x5,80005540 +80002eb8: 80002ea8 .word 0x80002ea8 +80002ebc: 8000deea .word 0x8000deea +80002ec0: 00450513 addi x10,x10,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002ec4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002ec8: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x26b5b5c6 +80002ecc: 0004a203 lw x4,0(x9) +80002ed0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x553ea0de +80002ed4: 0004a203 lw x4,0(x9) +80002ed8: 00448493 addi x9,x9,4 + +80002edc : +Zbkx_xperm4_cg_cmp_rs1_rs2_b4: + xperm4 x18, x4, x4 # perform operation +80002edc: 28422933 xperm4 x18,x4,x4 + # Check if x18 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x18, Zbkx_xperm4_cg_cmp_rs1_rs2_b4, Zbkx_xperm4_cg_cmp_rs1_rs2_b4_str) +80002ee0: 00052683 lw x13,0(x10) +80002ee4: 01268863 beq x13,x18,80002ef4 +80002ee8: 6980276f jal x14,80005580 +80002eec: 80002edc .word 0x80002edc +80002ef0: 8000df24 .word 0x8000df24 +80002ef4: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x3023a4e7 +80002ef8: 0004a283 lw x5,0(x9) +80002efc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x0ecfc59e +80002f00: 0004a283 lw x5,0(x9) +80002f04: 00448493 addi x9,x9,4 + +80002f08 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b5: + xperm4 x19, x5, x5 # perform operation +80002f08: 2852a9b3 xperm4 x19,x5,x5 + # Check if x19 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x19, Zbkx_xperm4_cg_cmp_rs1_rs2_b5, Zbkx_xperm4_cg_cmp_rs1_rs2_b5_str) +80002f0c: 00052683 lw x13,0(x10) +80002f10: 01368863 beq x13,x19,80002f20 +80002f14: 66c0276f jal x14,80005580 +80002f18: 80002f08 .word 0x80002f08 +80002f1c: 8000df5e .word 0x8000df5e +80002f20: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x7d253618 +80002f24: 0004a303 lw x6,0(x9) +80002f28: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xc565e1c9 +80002f2c: 0004a303 lw x6,0(x9) +80002f30: 00448493 addi x9,x9,4 + +80002f34 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b6: + xperm4 x24, x6, x6 # perform operation +80002f34: 28632c33 xperm4 x24,x6,x6 + # Check if x24 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x24, Zbkx_xperm4_cg_cmp_rs1_rs2_b6, Zbkx_xperm4_cg_cmp_rs1_rs2_b6_str) +80002f38: 00052683 lw x13,0(x10) +80002f3c: 01868863 beq x13,x24,80002f4c +80002f40: 6400276f jal x14,80005580 +80002f44: 80002f34 .word 0x80002f34 +80002f48: 8000df98 .word 0x8000df98 +80002f4c: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x8f06f7de +80002f50: 0004a383 lw x7,0(x9) +80002f54: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xbb61810a +80002f58: 0004a383 lw x7,0(x9) +80002f5c: 00448493 addi x9,x9,4 + +80002f60 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b7: + xperm4 x5, x7, x7 # perform operation +80002f60: 2873a2b3 xperm4 x5,x7,x7 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zbkx_xperm4_cg_cmp_rs1_rs2_b7, Zbkx_xperm4_cg_cmp_rs1_rs2_b7_str) +80002f64: 00052683 lw x13,0(x10) +80002f68: 00568863 beq x13,x5,80002f78 +80002f6c: 6140276f jal x14,80005580 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 8000dfd2 .word 0x8000dfd2 +80002f78: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x78798f42 +80002f7c: 0004a403 lw x8,0(x9) +80002f80: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x5cf82b0f +80002f84: 0004a403 lw x8,0(x9) +80002f88: 00448493 addi x9,x9,4 + +80002f8c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b8: + xperm4 x20, x8, x8 # perform operation +80002f8c: 28842a33 xperm4 x20,x8,x8 + # Check if x20 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x20, Zbkx_xperm4_cg_cmp_rs1_rs2_b8, Zbkx_xperm4_cg_cmp_rs1_rs2_b8_str) +80002f90: 00052683 lw x13,0(x10) +80002f94: 01468863 beq x13,x20,80002fa4 +80002f98: 5e80276f jal x14,80005580 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 8000e00c .word 0x8000e00c +80002fa4: 00450513 addi x10,x10,4 + + mv x24, x9 # switch data pointer register to avoid conflict with test +80002fa8: 00048c13 addi x24,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x41c3c2bb +80002fac: 000c2483 lw x9,0(x24) +80002fb0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x6b07000a +80002fb4: 000c2483 lw x9,0(x24) +80002fb8: 004c0c13 addi x24,x24,4 + +80002fbc : +Zbkx_xperm4_cg_cmp_rs1_rs2_b9: + xperm4 x4, x9, x9 # perform operation +80002fbc: 2894a233 xperm4 x4,x9,x9 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zbkx_xperm4_cg_cmp_rs1_rs2_b9, Zbkx_xperm4_cg_cmp_rs1_rs2_b9_str) +80002fc0: 00052683 lw x13,0(x10) +80002fc4: 00468863 beq x13,x4,80002fd4 +80002fc8: 5b80276f jal x14,80005580 +80002fcc: 80002fbc .word 0x80002fbc +80002fd0: 8000e046 .word 0x8000e046 +80002fd4: 00450513 addi x10,x10,4 + + mv x22, x10 # switch signature pointer register to avoid conflict with test +80002fd8: 00050b13 addi x22,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x8d7ab877 +80002fdc: 000c2503 lw x10,0(x24) +80002fe0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x4bd635d9 +80002fe4: 000c2503 lw x10,0(x24) +80002fe8: 004c0c13 addi x24,x24,4 + +80002fec : +Zbkx_xperm4_cg_cmp_rs1_rs2_b10: + xperm4 x3, x10, x10 # perform operation +80002fec: 28a521b3 xperm4 x3,x10,x10 + # Check if x3 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x3, Zbkx_xperm4_cg_cmp_rs1_rs2_b10, Zbkx_xperm4_cg_cmp_rs1_rs2_b10_str) +80002ff0: 000b2683 lw x13,0(x22) +80002ff4: 00368863 beq x13,x3,80003004 +80002ff8: 5880276f jal x14,80005580 +80002ffc: 80002fec .word 0x80002fec +80003000: 8000e080 .word 0x8000e080 +80003004: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xab239a98 +80003008: 000c2583 lw x11,0(x24) +8000300c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x907c4a6f +80003010: 000c2583 lw x11,0(x24) +80003014: 004c0c13 addi x24,x24,4 + +80003018 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b11: + xperm4 x9, x11, x11 # perform operation +80003018: 28b5a4b3 xperm4 x9,x11,x11 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zbkx_xperm4_cg_cmp_rs1_rs2_b11, Zbkx_xperm4_cg_cmp_rs1_rs2_b11_str) +8000301c: 000b2683 lw x13,0(x22) +80003020: 00968863 beq x13,x9,80003030 +80003024: 55c0276f jal x14,80005580 +80003028: 80003018 .word 0x80003018 +8000302c: 8000e0bb .word 0x8000e0bb +80003030: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x743c1c09 +80003034: 000c2603 lw x12,0(x24) +80003038: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0x9aa38ef4 +8000303c: 000c2603 lw x12,0(x24) +80003040: 004c0c13 addi x24,x24,4 + +80003044 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b12: + xperm4 x28, x12, x12 # perform operation +80003044: 28c62e33 xperm4 x28,x12,x12 + # Check if x28 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x28, Zbkx_xperm4_cg_cmp_rs1_rs2_b12, Zbkx_xperm4_cg_cmp_rs1_rs2_b12_str) +80003048: 000b2683 lw x13,0(x22) +8000304c: 01c68863 beq x13,x28,8000305c +80003050: 5300276f jal x14,80005580 +80003054: 80003044 .word 0x80003044 +80003058: 8000e0f6 .word 0x8000e0f6 +8000305c: 004b0b13 addi x22,x22,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003060: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003064: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x3ef0c34b +80003068: 000c2683 lw x13,0(x24) +8000306c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xe85adf31 +80003070: 000c2683 lw x13,0(x24) +80003074: 004c0c13 addi x24,x24,4 + +80003078 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b13: + xperm4 x23, x13, x13 # perform operation +80003078: 28d6abb3 xperm4 x23,x13,x13 + # Check if x23 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x23, Zbkx_xperm4_cg_cmp_rs1_rs2_b13, Zbkx_xperm4_cg_cmp_rs1_rs2_b13_str) +8000307c: 000b2203 lw x4,0(x22) +80003080: 01720863 beq x4,x23,80003090 +80003084: 4bc022ef jal x5,80005540 +80003088: 80003078 .word 0x80003078 +8000308c: 8000e131 .word 0x8000e131 +80003090: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xa4616462 +80003094: 000c2703 lw x14,0(x24) +80003098: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xaee3acdc +8000309c: 000c2703 lw x14,0(x24) +800030a0: 004c0c13 addi x24,x24,4 + +800030a4 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b14: + xperm4 x15, x14, x14 # perform operation +800030a4: 28e727b3 xperm4 x15,x14,x14 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zbkx_xperm4_cg_cmp_rs1_rs2_b14, Zbkx_xperm4_cg_cmp_rs1_rs2_b14_str) +800030a8: 000b2203 lw x4,0(x22) +800030ac: 00f20863 beq x4,x15,800030bc +800030b0: 490022ef jal x5,80005540 +800030b4: 800030a4 .word 0x800030a4 +800030b8: 8000e16c .word 0x8000e16c +800030bc: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x827eb56f +800030c0: 000c2783 lw x15,0(x24) +800030c4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x98e61e19 +800030c8: 000c2783 lw x15,0(x24) +800030cc: 004c0c13 addi x24,x24,4 + +800030d0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b15: + xperm4 x18, x15, x15 # perform operation +800030d0: 28f7a933 xperm4 x18,x15,x15 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zbkx_xperm4_cg_cmp_rs1_rs2_b15, Zbkx_xperm4_cg_cmp_rs1_rs2_b15_str) +800030d4: 000b2203 lw x4,0(x22) +800030d8: 01220863 beq x4,x18,800030e8 +800030dc: 464022ef jal x5,80005540 +800030e0: 800030d0 .word 0x800030d0 +800030e4: 8000e1a7 .word 0x8000e1a7 +800030e8: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xe20c8242 +800030ec: 000c2803 lw x16,0(x24) +800030f0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xf81b73e7 +800030f4: 000c2803 lw x16,0(x24) +800030f8: 004c0c13 addi x24,x24,4 + +800030fc : +Zbkx_xperm4_cg_cmp_rs1_rs2_b16: + xperm4 x11, x16, x16 # perform operation +800030fc: 290825b3 xperm4 x11,x16,x16 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zbkx_xperm4_cg_cmp_rs1_rs2_b16, Zbkx_xperm4_cg_cmp_rs1_rs2_b16_str) +80003100: 000b2203 lw x4,0(x22) +80003104: 00b20863 beq x4,x11,80003114 +80003108: 438022ef jal x5,80005540 +8000310c: 800030fc .word 0x800030fc +80003110: 8000e1e2 .word 0x8000e1e2 +80003114: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x284f7a0f +80003118: 000c2883 lw x17,0(x24) +8000311c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xb85198d0 +80003120: 000c2883 lw x17,0(x24) +80003124: 004c0c13 addi x24,x24,4 + +80003128 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b17: + xperm4 x14, x17, x17 # perform operation +80003128: 2918a733 xperm4 x14,x17,x17 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zbkx_xperm4_cg_cmp_rs1_rs2_b17, Zbkx_xperm4_cg_cmp_rs1_rs2_b17_str) +8000312c: 000b2203 lw x4,0(x22) +80003130: 00e20863 beq x4,x14,80003140 +80003134: 40c022ef jal x5,80005540 +80003138: 80003128 .word 0x80003128 +8000313c: 8000e21d .word 0x8000e21d +80003140: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x51462bc0 +80003144: 000c2903 lw x18,0(x24) +80003148: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xe97ced0c +8000314c: 000c2903 lw x18,0(x24) +80003150: 004c0c13 addi x24,x24,4 + +80003154 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b18: + xperm4 x31, x18, x18 # perform operation +80003154: 29292fb3 xperm4 x31,x18,x18 + # Check if x31 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x31, Zbkx_xperm4_cg_cmp_rs1_rs2_b18, Zbkx_xperm4_cg_cmp_rs1_rs2_b18_str) +80003158: 000b2203 lw x4,0(x22) +8000315c: 01f20863 beq x4,x31,8000316c +80003160: 3e0022ef jal x5,80005540 +80003164: 80003154 .word 0x80003154 +80003168: 8000e258 .word 0x8000e258 +8000316c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x36e5674d +80003170: 000c2983 lw x19,0(x24) +80003174: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x603dcda7 +80003178: 000c2983 lw x19,0(x24) +8000317c: 004c0c13 addi x24,x24,4 + +80003180 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b19: + xperm4 x8, x19, x19 # perform operation +80003180: 2939a433 xperm4 x8,x19,x19 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zbkx_xperm4_cg_cmp_rs1_rs2_b19, Zbkx_xperm4_cg_cmp_rs1_rs2_b19_str) +80003184: 000b2203 lw x4,0(x22) +80003188: 00820863 beq x4,x8,80003198 +8000318c: 3b4022ef jal x5,80005540 +80003190: 80003180 .word 0x80003180 +80003194: 8000e293 .word 0x8000e293 +80003198: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x34a608b4 +8000319c: 000c2a03 lw x20,0(x24) +800031a0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x18b66e6f +800031a4: 000c2a03 lw x20,0(x24) +800031a8: 004c0c13 addi x24,x24,4 + +800031ac : +Zbkx_xperm4_cg_cmp_rs1_rs2_b20: + xperm4 x6, x20, x20 # perform operation +800031ac: 294a2333 xperm4 x6,x20,x20 + # Check if x6 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x6, Zbkx_xperm4_cg_cmp_rs1_rs2_b20, Zbkx_xperm4_cg_cmp_rs1_rs2_b20_str) +800031b0: 000b2203 lw x4,0(x22) +800031b4: 00620863 beq x4,x6,800031c4 +800031b8: 388022ef jal x5,80005540 +800031bc: 800031ac .word 0x800031ac +800031c0: 8000e2ce .word 0x8000e2ce +800031c4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x338d473c +800031c8: 000c2a83 lw x21,0(x24) +800031cc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x04dff7bc +800031d0: 000c2a83 lw x21,0(x24) +800031d4: 004c0c13 addi x24,x24,4 + +800031d8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b21: + xperm4 x1, x21, x21 # perform operation +800031d8: 295aa0b3 xperm4 x1,x21,x21 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zbkx_xperm4_cg_cmp_rs1_rs2_b21, Zbkx_xperm4_cg_cmp_rs1_rs2_b21_str) +800031dc: 000b2203 lw x4,0(x22) +800031e0: 00120863 beq x4,x1,800031f0 +800031e4: 35c022ef jal x5,80005540 +800031e8: 800031d8 .word 0x800031d8 +800031ec: 8000e309 .word 0x8000e309 +800031f0: 004b0b13 addi x22,x22,4 + + mv x25, x22 # switch signature pointer register to avoid conflict with test +800031f4: 000b0c93 addi x25,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x4e39986c +800031f8: 000c2b03 lw x22,0(x24) +800031fc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xbd3050ab +80003200: 000c2b03 lw x22,0(x24) +80003204: 004c0c13 addi x24,x24,4 + +80003208 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b22: + xperm4 x19, x22, x22 # perform operation +80003208: 296b29b3 xperm4 x19,x22,x22 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkx_xperm4_cg_cmp_rs1_rs2_b22, Zbkx_xperm4_cg_cmp_rs1_rs2_b22_str) +8000320c: 000ca203 lw x4,0(x25) +80003210: 01320863 beq x4,x19,80003220 +80003214: 32c022ef jal x5,80005540 +80003218: 80003208 .word 0x80003208 +8000321c: 8000e344 .word 0x8000e344 +80003220: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xeb4b59d3 +80003224: 000c2b83 lw x23,0(x24) +80003228: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x605f6f13 +8000322c: 000c2b83 lw x23,0(x24) +80003230: 004c0c13 addi x24,x24,4 + +80003234 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b23: + xperm4 x11, x23, x23 # perform operation +80003234: 297ba5b3 xperm4 x11,x23,x23 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkx_xperm4_cg_cmp_rs1_rs2_b23, Zbkx_xperm4_cg_cmp_rs1_rs2_b23_str) +80003238: 000ca203 lw x4,0(x25) +8000323c: 00b20863 beq x4,x11,8000324c +80003240: 300022ef jal x5,80005540 +80003244: 80003234 .word 0x80003234 +80003248: 8000e37f .word 0x8000e37f +8000324c: 004c8c93 addi x25,x25,4 + + mv x18, x24 # switch data pointer register to avoid conflict with test +80003250: 000c0913 addi x18,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x5b0b8c03 +80003254: 00092c03 lw x24,0(x18) +80003258: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xe405bdab +8000325c: 00092c03 lw x24,0(x18) +80003260: 00490913 addi x18,x18,4 + +80003264 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b24: + xperm4 x15, x24, x24 # perform operation +80003264: 298c27b3 xperm4 x15,x24,x24 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkx_xperm4_cg_cmp_rs1_rs2_b24, Zbkx_xperm4_cg_cmp_rs1_rs2_b24_str) +80003268: 000ca203 lw x4,0(x25) +8000326c: 00f20863 beq x4,x15,8000327c +80003270: 2d0022ef jal x5,80005540 +80003274: 80003264 .word 0x80003264 +80003278: 8000e3ba .word 0x8000e3ba +8000327c: 004c8c93 addi x25,x25,4 + + mv x2, x25 # switch signature pointer register to avoid conflict with test +80003280: 000c8113 addi x2,x25,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x58ae3baa +80003284: 00092c83 lw x25,0(x18) +80003288: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x90d22d80 +8000328c: 00092c83 lw x25,0(x18) +80003290: 00490913 addi x18,x18,4 + +80003294 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b25: + xperm4 x1, x25, x25 # perform operation +80003294: 299ca0b3 xperm4 x1,x25,x25 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkx_xperm4_cg_cmp_rs1_rs2_b25, Zbkx_xperm4_cg_cmp_rs1_rs2_b25_str) +80003298: 00012203 lw x4,0(x2) +8000329c: 00120863 beq x4,x1,800032ac +800032a0: 2a0022ef jal x5,80005540 +800032a4: 80003294 .word 0x80003294 +800032a8: 8000e3f5 .word 0x8000e3f5 +800032ac: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x91d5bac1 +800032b0: 00092d03 lw x26,0(x18) +800032b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xd18530c4 +800032b8: 00092d03 lw x26,0(x18) +800032bc: 00490913 addi x18,x18,4 + +800032c0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b26: + xperm4 x25, x26, x26 # perform operation +800032c0: 29ad2cb3 xperm4 x25,x26,x26 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkx_xperm4_cg_cmp_rs1_rs2_b26, Zbkx_xperm4_cg_cmp_rs1_rs2_b26_str) +800032c4: 00012203 lw x4,0(x2) +800032c8: 01920863 beq x4,x25,800032d8 +800032cc: 274022ef jal x5,80005540 +800032d0: 800032c0 .word 0x800032c0 +800032d4: 8000e430 .word 0x8000e430 +800032d8: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x3c215859 +800032dc: 00092d83 lw x27,0(x18) +800032e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xc092914b +800032e4: 00092d83 lw x27,0(x18) +800032e8: 00490913 addi x18,x18,4 + +800032ec : +Zbkx_xperm4_cg_cmp_rs1_rs2_b27: + xperm4 x7, x27, x27 # perform operation +800032ec: 29bda3b3 xperm4 x7,x27,x27 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkx_xperm4_cg_cmp_rs1_rs2_b27, Zbkx_xperm4_cg_cmp_rs1_rs2_b27_str) +800032f0: 00012203 lw x4,0(x2) +800032f4: 00720863 beq x4,x7,80003304 +800032f8: 248022ef jal x5,80005540 +800032fc: 800032ec .word 0x800032ec +80003300: 8000e46b .word 0x8000e46b +80003304: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xabd48475 +80003308: 00092e03 lw x28,0(x18) +8000330c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xb1c2e792 +80003310: 00092e03 lw x28,0(x18) +80003314: 00490913 addi x18,x18,4 + +80003318 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b28: + xperm4 x0, x28, x28 # perform operation +80003318: 29ce2033 xperm4 x0,x28,x28 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkx_xperm4_cg_cmp_rs1_rs2_b28, Zbkx_xperm4_cg_cmp_rs1_rs2_b28_str) +8000331c: 00012203 lw x4,0(x2) +80003320: 00020863 beq x4,x0,80003330 +80003324: 21c022ef jal x5,80005540 +80003328: 80003318 .word 0x80003318 +8000332c: 8000e4a6 .word 0x8000e4a6 +80003330: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x2a038cfd +80003334: 00092e83 lw x29,0(x18) +80003338: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x8b4c8e59 +8000333c: 00092e83 lw x29,0(x18) +80003340: 00490913 addi x18,x18,4 + +80003344 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b29: + xperm4 x16, x29, x29 # perform operation +80003344: 29dea833 xperm4 x16,x29,x29 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkx_xperm4_cg_cmp_rs1_rs2_b29, Zbkx_xperm4_cg_cmp_rs1_rs2_b29_str) +80003348: 00012203 lw x4,0(x2) +8000334c: 01020863 beq x4,x16,8000335c +80003350: 1f0022ef jal x5,80005540 +80003354: 80003344 .word 0x80003344 +80003358: 8000e4e1 .word 0x8000e4e1 +8000335c: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0xaf60ac90 +80003360: 00092f03 lw x30,0(x18) +80003364: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x6ea9ec8d +80003368: 00092f03 lw x30,0(x18) +8000336c: 00490913 addi x18,x18,4 + +80003370 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b30: + xperm4 x28, x30, x30 # perform operation +80003370: 29ef2e33 xperm4 x28,x30,x30 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkx_xperm4_cg_cmp_rs1_rs2_b30, Zbkx_xperm4_cg_cmp_rs1_rs2_b30_str) +80003374: 00012203 lw x4,0(x2) +80003378: 01c20863 beq x4,x28,80003388 +8000337c: 1c4022ef jal x5,80005540 +80003380: 80003370 .word 0x80003370 +80003384: 8000e51c .word 0x8000e51c +80003388: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x9e04e4b4 +8000338c: 00092f83 lw x31,0(x18) +80003390: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xcaaad801 +80003394: 00092f83 lw x31,0(x18) +80003398: 00490913 addi x18,x18,4 + +8000339c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b31: + xperm4 x0, x31, x31 # perform operation +8000339c: 29ffa033 xperm4 x0,x31,x31 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkx_xperm4_cg_cmp_rs1_rs2_b31, Zbkx_xperm4_cg_cmp_rs1_rs2_b31_str) +800033a0: 00012203 lw x4,0(x2) +800033a4: 00020863 beq x4,x0,800033b4 +800033a8: 198022ef jal x5,80005540 +800033ac: 8000339c .word 0x8000339c +800033b0: 8000e557 .word 0x8000e557 +800033b4: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x7a99659c +800033b8: 00092003 lw x0,0(x18) +800033bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x050050eb +800033c0: 00092c83 lw x25,0(x18) +800033c4: 00490913 addi x18,x18,4 + +800033c8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b0: + xperm4 x0, x0, x25 # perform operation +800033c8: 29902033 xperm4 x0,x0,x25 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkx_xperm4_cg_cmp_rd_rs1_b0, Zbkx_xperm4_cg_cmp_rd_rs1_b0_str) +800033cc: 00012203 lw x4,0(x2) +800033d0: 00020863 beq x4,x0,800033e0 +800033d4: 16c022ef jal x5,80005540 +800033d8: 800033c8 .word 0x800033c8 +800033dc: 8000e592 .word 0x8000e592 +800033e0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xab39934c +800033e4: 00092083 lw x1,0(x18) +800033e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0xee8acbc4 +800033ec: 00092b03 lw x22,0(x18) +800033f0: 00490913 addi x18,x18,4 + +800033f4 : +Zbkx_xperm4_cg_cmp_rd_rs1_b1: + xperm4 x1, x1, x22 # perform operation +800033f4: 2960a0b3 xperm4 x1,x1,x22 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkx_xperm4_cg_cmp_rd_rs1_b1, Zbkx_xperm4_cg_cmp_rd_rs1_b1_str) +800033f8: 00012203 lw x4,0(x2) +800033fc: 00120863 beq x4,x1,8000340c +80003400: 140022ef jal x5,80005540 +80003404: 800033f4 .word 0x800033f4 +80003408: 8000e5cb .word 0x8000e5cb +8000340c: 00410113 addi x2,x2,4 + + mv x27, x2 # switch signature pointer register to avoid conflict with test +80003410: 00010d93 addi x27,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xe1c5e6e8 +80003414: 00092103 lw x2,0(x18) +80003418: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x0cc8c49a +8000341c: 00092483 lw x9,0(x18) +80003420: 00490913 addi x18,x18,4 + +80003424 : +Zbkx_xperm4_cg_cmp_rd_rs1_b2: + xperm4 x2, x2, x9 # perform operation +80003424: 28912133 xperm4 x2,x2,x9 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkx_xperm4_cg_cmp_rd_rs1_b2, Zbkx_xperm4_cg_cmp_rd_rs1_b2_str) +80003428: 000da203 lw x4,0(x27) +8000342c: 00220863 beq x4,x2,8000343c +80003430: 110022ef jal x5,80005540 +80003434: 80003424 .word 0x80003424 +80003438: 8000e604 .word 0x8000e604 +8000343c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xce9ed8ad +80003440: 00092183 lw x3,0(x18) +80003444: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x1f0a120c +80003448: 00092583 lw x11,0(x18) +8000344c: 00490913 addi x18,x18,4 + +80003450 : +Zbkx_xperm4_cg_cmp_rd_rs1_b3: + xperm4 x3, x3, x11 # perform operation +80003450: 28b1a1b3 xperm4 x3,x3,x11 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkx_xperm4_cg_cmp_rd_rs1_b3, Zbkx_xperm4_cg_cmp_rd_rs1_b3_str) +80003454: 000da203 lw x4,0(x27) +80003458: 00320863 beq x4,x3,80003468 +8000345c: 0e4022ef jal x5,80005540 +80003460: 80003450 .word 0x80003450 +80003464: 8000e63d .word 0x8000e63d +80003468: 004d8d93 addi x27,x27,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000346c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003470: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x1aa48bad +80003474: 00092203 lw x4,0(x18) +80003478: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x03b2ce51 +8000347c: 00092003 lw x0,0(x18) +80003480: 00490913 addi x18,x18,4 + +80003484 : +Zbkx_xperm4_cg_cmp_rd_rs1_b4: + xperm4 x4, x4, x0 # perform operation +80003484: 28022233 xperm4 x4,x4,x0 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs1_b4, Zbkx_xperm4_cg_cmp_rd_rs1_b4_str) +80003488: 000da383 lw x7,0(x27) +8000348c: 00438863 beq x7,x4,8000349c +80003490: 0c80246f jal x8,80005558 +80003494: 80003484 .word 0x80003484 +80003498: 8000e676 .word 0x8000e676 +8000349c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xd3cec658 +800034a0: 00092283 lw x5,0(x18) +800034a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x00ecaf8f +800034a8: 00092c83 lw x25,0(x18) +800034ac: 00490913 addi x18,x18,4 + +800034b0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b5: + xperm4 x5, x5, x25 # perform operation +800034b0: 2992a2b3 xperm4 x5,x5,x25 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs1_b5, Zbkx_xperm4_cg_cmp_rd_rs1_b5_str) +800034b4: 000da383 lw x7,0(x27) +800034b8: 00538863 beq x7,x5,800034c8 +800034bc: 09c0246f jal x8,80005558 +800034c0: 800034b0 .word 0x800034b0 +800034c4: 8000e6af .word 0x8000e6af +800034c8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xaf49ba9b +800034cc: 00092303 lw x6,0(x18) +800034d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x0625d891 +800034d4: 00092283 lw x5,0(x18) +800034d8: 00490913 addi x18,x18,4 + +800034dc : +Zbkx_xperm4_cg_cmp_rd_rs1_b6: + xperm4 x6, x6, x5 # perform operation +800034dc: 28532333 xperm4 x6,x6,x5 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs1_b6, Zbkx_xperm4_cg_cmp_rd_rs1_b6_str) +800034e0: 000da383 lw x7,0(x27) +800034e4: 00638863 beq x7,x6,800034f4 +800034e8: 0700246f jal x8,80005558 +800034ec: 800034dc .word 0x800034dc +800034f0: 8000e6e8 .word 0x8000e6e8 +800034f4: 004d8d93 addi x27,x27,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800034f8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800034fc: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x097fbe3d +80003500: 00092383 lw x7,0(x18) +80003504: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xcd9ecbc8 +80003508: 00092403 lw x8,0(x18) +8000350c: 00490913 addi x18,x18,4 + +80003510 : +Zbkx_xperm4_cg_cmp_rd_rs1_b7: + xperm4 x7, x7, x8 # perform operation +80003510: 2883a3b3 xperm4 x7,x7,x8 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkx_xperm4_cg_cmp_rd_rs1_b7, Zbkx_xperm4_cg_cmp_rd_rs1_b7_str) +80003514: 000da203 lw x4,0(x27) +80003518: 00720863 beq x4,x7,80003528 +8000351c: 024022ef jal x5,80005540 +80003520: 80003510 .word 0x80003510 +80003524: 8000e721 .word 0x8000e721 +80003528: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x4b6ec11d +8000352c: 00092403 lw x8,0(x18) +80003530: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x6f0ac004 +80003534: 00092a03 lw x20,0(x18) +80003538: 00490913 addi x18,x18,4 + +8000353c : +Zbkx_xperm4_cg_cmp_rd_rs1_b8: + xperm4 x8, x8, x20 # perform operation +8000353c: 29442433 xperm4 x8,x8,x20 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkx_xperm4_cg_cmp_rd_rs1_b8, Zbkx_xperm4_cg_cmp_rd_rs1_b8_str) +80003540: 000da203 lw x4,0(x27) +80003544: 00820863 beq x4,x8,80003554 +80003548: 7f9012ef jal x5,80005540 +8000354c: 8000353c .word 0x8000353c +80003550: 8000e75a .word 0x8000e75a +80003554: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x57bb46e2 +80003558: 00092483 lw x9,0(x18) +8000355c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xcff36588 +80003560: 00092703 lw x14,0(x18) +80003564: 00490913 addi x18,x18,4 + +80003568 : +Zbkx_xperm4_cg_cmp_rd_rs1_b9: + xperm4 x9, x9, x14 # perform operation +80003568: 28e4a4b3 xperm4 x9,x9,x14 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkx_xperm4_cg_cmp_rd_rs1_b9, Zbkx_xperm4_cg_cmp_rd_rs1_b9_str) +8000356c: 000da203 lw x4,0(x27) +80003570: 00920863 beq x4,x9,80003580 +80003574: 7cd012ef jal x5,80005540 +80003578: 80003568 .word 0x80003568 +8000357c: 8000e793 .word 0x8000e793 +80003580: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x339f2f90 +80003584: 00092503 lw x10,0(x18) +80003588: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xf262d67d +8000358c: 00092103 lw x2,0(x18) +80003590: 00490913 addi x18,x18,4 + +80003594 : +Zbkx_xperm4_cg_cmp_rd_rs1_b10: + xperm4 x10, x10, x2 # perform operation +80003594: 28252533 xperm4 x10,x10,x2 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkx_xperm4_cg_cmp_rd_rs1_b10, Zbkx_xperm4_cg_cmp_rd_rs1_b10_str) +80003598: 000da203 lw x4,0(x27) +8000359c: 00a20863 beq x4,x10,800035ac +800035a0: 7a1012ef jal x5,80005540 +800035a4: 80003594 .word 0x80003594 +800035a8: 8000e7cc .word 0x8000e7cc +800035ac: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xe8ad7594 +800035b0: 00092583 lw x11,0(x18) +800035b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x61d7116f +800035b8: 00092983 lw x19,0(x18) +800035bc: 00490913 addi x18,x18,4 + +800035c0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b11: + xperm4 x11, x11, x19 # perform operation +800035c0: 2935a5b3 xperm4 x11,x11,x19 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkx_xperm4_cg_cmp_rd_rs1_b11, Zbkx_xperm4_cg_cmp_rd_rs1_b11_str) +800035c4: 000da203 lw x4,0(x27) +800035c8: 00b20863 beq x4,x11,800035d8 +800035cc: 775012ef jal x5,80005540 +800035d0: 800035c0 .word 0x800035c0 +800035d4: 8000e806 .word 0x8000e806 +800035d8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x2a535b1a +800035dc: 00092603 lw x12,0(x18) +800035e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x5c206736 +800035e4: 00092783 lw x15,0(x18) +800035e8: 00490913 addi x18,x18,4 + +800035ec : +Zbkx_xperm4_cg_cmp_rd_rs1_b12: + xperm4 x12, x12, x15 # perform operation +800035ec: 28f62633 xperm4 x12,x12,x15 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zbkx_xperm4_cg_cmp_rd_rs1_b12, Zbkx_xperm4_cg_cmp_rd_rs1_b12_str) +800035f0: 000da203 lw x4,0(x27) +800035f4: 00c20863 beq x4,x12,80003604 +800035f8: 749012ef jal x5,80005540 +800035fc: 800035ec .word 0x800035ec +80003600: 8000e840 .word 0x8000e840 +80003604: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x9eec8dc5 +80003608: 00092683 lw x13,0(x18) +8000360c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x40b65daa +80003610: 00092883 lw x17,0(x18) +80003614: 00490913 addi x18,x18,4 + +80003618 : +Zbkx_xperm4_cg_cmp_rd_rs1_b13: + xperm4 x13, x13, x17 # perform operation +80003618: 2916a6b3 xperm4 x13,x13,x17 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zbkx_xperm4_cg_cmp_rd_rs1_b13, Zbkx_xperm4_cg_cmp_rd_rs1_b13_str) +8000361c: 000da203 lw x4,0(x27) +80003620: 00d20863 beq x4,x13,80003630 +80003624: 71d012ef jal x5,80005540 +80003628: 80003618 .word 0x80003618 +8000362c: 8000e87a .word 0x8000e87a +80003630: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x820ea036 +80003634: 00092703 lw x14,0(x18) +80003638: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x61093f3a +8000363c: 00092583 lw x11,0(x18) +80003640: 00490913 addi x18,x18,4 + +80003644 : +Zbkx_xperm4_cg_cmp_rd_rs1_b14: + xperm4 x14, x14, x11 # perform operation +80003644: 28b72733 xperm4 x14,x14,x11 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zbkx_xperm4_cg_cmp_rd_rs1_b14, Zbkx_xperm4_cg_cmp_rd_rs1_b14_str) +80003648: 000da203 lw x4,0(x27) +8000364c: 00e20863 beq x4,x14,8000365c +80003650: 6f1012ef jal x5,80005540 +80003654: 80003644 .word 0x80003644 +80003658: 8000e8b4 .word 0x8000e8b4 +8000365c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xbf2789da +80003660: 00092783 lw x15,0(x18) +80003664: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x6e672808 +80003668: 00092b83 lw x23,0(x18) +8000366c: 00490913 addi x18,x18,4 + +80003670 : +Zbkx_xperm4_cg_cmp_rd_rs1_b15: + xperm4 x15, x15, x23 # perform operation +80003670: 2977a7b3 xperm4 x15,x15,x23 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zbkx_xperm4_cg_cmp_rd_rs1_b15, Zbkx_xperm4_cg_cmp_rd_rs1_b15_str) +80003674: 000da203 lw x4,0(x27) +80003678: 00f20863 beq x4,x15,80003688 +8000367c: 6c5012ef jal x5,80005540 +80003680: 80003670 .word 0x80003670 +80003684: 8000e8ee .word 0x8000e8ee +80003688: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0xdc11cf6d +8000368c: 00092803 lw x16,0(x18) +80003690: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xab2a62bc +80003694: 00092783 lw x15,0(x18) +80003698: 00490913 addi x18,x18,4 + +8000369c : +Zbkx_xperm4_cg_cmp_rd_rs1_b16: + xperm4 x16, x16, x15 # perform operation +8000369c: 28f82833 xperm4 x16,x16,x15 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zbkx_xperm4_cg_cmp_rd_rs1_b16, Zbkx_xperm4_cg_cmp_rd_rs1_b16_str) +800036a0: 000da203 lw x4,0(x27) +800036a4: 01020863 beq x4,x16,800036b4 +800036a8: 699012ef jal x5,80005540 +800036ac: 8000369c .word 0x8000369c +800036b0: 8000e928 .word 0x8000e928 +800036b4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xa7b560c5 +800036b8: 00092883 lw x17,0(x18) +800036bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x536d427c +800036c0: 00092603 lw x12,0(x18) +800036c4: 00490913 addi x18,x18,4 + +800036c8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b17: + xperm4 x17, x17, x12 # perform operation +800036c8: 28c8a8b3 xperm4 x17,x17,x12 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkx_xperm4_cg_cmp_rd_rs1_b17, Zbkx_xperm4_cg_cmp_rd_rs1_b17_str) +800036cc: 000da203 lw x4,0(x27) +800036d0: 01120863 beq x4,x17,800036e0 +800036d4: 66d012ef jal x5,80005540 +800036d8: 800036c8 .word 0x800036c8 +800036dc: 8000e962 .word 0x8000e962 +800036e0: 004d8d93 addi x27,x27,4 + + mv x22, x18 # switch data pointer register to avoid conflict with test +800036e4: 00090b13 addi x22,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x398671c2 +800036e8: 000b2903 lw x18,0(x22) +800036ec: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x019d4c69 +800036f0: 000b2683 lw x13,0(x22) +800036f4: 004b0b13 addi x22,x22,4 + +800036f8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b18: + xperm4 x18, x18, x13 # perform operation +800036f8: 28d92933 xperm4 x18,x18,x13 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkx_xperm4_cg_cmp_rd_rs1_b18, Zbkx_xperm4_cg_cmp_rd_rs1_b18_str) +800036fc: 000da203 lw x4,0(x27) +80003700: 01220863 beq x4,x18,80003710 +80003704: 63d012ef jal x5,80005540 +80003708: 800036f8 .word 0x800036f8 +8000370c: 8000e99c .word 0x8000e99c +80003710: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x739e40fe +80003714: 000b2983 lw x19,0(x22) +80003718: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x03fcb92d +8000371c: 000b2e83 lw x29,0(x22) +80003720: 004b0b13 addi x22,x22,4 + +80003724 : +Zbkx_xperm4_cg_cmp_rd_rs1_b19: + xperm4 x19, x19, x29 # perform operation +80003724: 29d9a9b3 xperm4 x19,x19,x29 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zbkx_xperm4_cg_cmp_rd_rs1_b19, Zbkx_xperm4_cg_cmp_rd_rs1_b19_str) +80003728: 000da203 lw x4,0(x27) +8000372c: 01320863 beq x4,x19,8000373c +80003730: 611012ef jal x5,80005540 +80003734: 80003724 .word 0x80003724 +80003738: 8000e9d6 .word 0x8000e9d6 +8000373c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x6b805073 +80003740: 000b2a03 lw x20,0(x22) +80003744: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x0526e280 +80003748: 000b2c03 lw x24,0(x22) +8000374c: 004b0b13 addi x22,x22,4 + +80003750 : +Zbkx_xperm4_cg_cmp_rd_rs1_b20: + xperm4 x20, x20, x24 # perform operation +80003750: 298a2a33 xperm4 x20,x20,x24 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zbkx_xperm4_cg_cmp_rd_rs1_b20, Zbkx_xperm4_cg_cmp_rd_rs1_b20_str) +80003754: 000da203 lw x4,0(x27) +80003758: 01420863 beq x4,x20,80003768 +8000375c: 5e5012ef jal x5,80005540 +80003760: 80003750 .word 0x80003750 +80003764: 8000ea10 .word 0x8000ea10 +80003768: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xff44ed43 +8000376c: 000b2a83 lw x21,0(x22) +80003770: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0xb9b1451d +80003774: 000b2f03 lw x30,0(x22) +80003778: 004b0b13 addi x22,x22,4 + +8000377c : +Zbkx_xperm4_cg_cmp_rd_rs1_b21: + xperm4 x21, x21, x30 # perform operation +8000377c: 29eaaab3 xperm4 x21,x21,x30 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkx_xperm4_cg_cmp_rd_rs1_b21, Zbkx_xperm4_cg_cmp_rd_rs1_b21_str) +80003780: 000da203 lw x4,0(x27) +80003784: 01520863 beq x4,x21,80003794 +80003788: 5b9012ef jal x5,80005540 +8000378c: 8000377c .word 0x8000377c +80003790: 8000ea4a .word 0x8000ea4a +80003794: 004d8d93 addi x27,x27,4 + + mv x17, x22 # switch data pointer register to avoid conflict with test +80003798: 000b0893 addi x17,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x3e1f0a8c +8000379c: 0008ab03 lw x22,0(x17) +800037a0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xd3b4710c +800037a4: 0008ac83 lw x25,0(x17) +800037a8: 00488893 addi x17,x17,4 + +800037ac : +Zbkx_xperm4_cg_cmp_rd_rs1_b22: + xperm4 x22, x22, x25 # perform operation +800037ac: 299b2b33 xperm4 x22,x22,x25 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkx_xperm4_cg_cmp_rd_rs1_b22, Zbkx_xperm4_cg_cmp_rd_rs1_b22_str) +800037b0: 000da203 lw x4,0(x27) +800037b4: 01620863 beq x4,x22,800037c4 +800037b8: 589012ef jal x5,80005540 +800037bc: 800037ac .word 0x800037ac +800037c0: 8000ea84 .word 0x8000ea84 +800037c4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x121e69ff +800037c8: 0008ab83 lw x23,0(x17) +800037cc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x3d3bc904 +800037d0: 0008a503 lw x10,0(x17) +800037d4: 00488893 addi x17,x17,4 + +800037d8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b23: + xperm4 x23, x23, x10 # perform operation +800037d8: 28ababb3 xperm4 x23,x23,x10 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkx_xperm4_cg_cmp_rd_rs1_b23, Zbkx_xperm4_cg_cmp_rd_rs1_b23_str) +800037dc: 000da203 lw x4,0(x27) +800037e0: 01720863 beq x4,x23,800037f0 +800037e4: 55d012ef jal x5,80005540 +800037e8: 800037d8 .word 0x800037d8 +800037ec: 8000eabe .word 0x8000eabe +800037f0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x716001a9 +800037f4: 0008ac03 lw x24,0(x17) +800037f8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x24404829 +800037fc: 0008a583 lw x11,0(x17) +80003800: 00488893 addi x17,x17,4 + +80003804 : +Zbkx_xperm4_cg_cmp_rd_rs1_b24: + xperm4 x24, x24, x11 # perform operation +80003804: 28bc2c33 xperm4 x24,x24,x11 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zbkx_xperm4_cg_cmp_rd_rs1_b24, Zbkx_xperm4_cg_cmp_rd_rs1_b24_str) +80003808: 000da203 lw x4,0(x27) +8000380c: 01820863 beq x4,x24,8000381c +80003810: 531012ef jal x5,80005540 +80003814: 80003804 .word 0x80003804 +80003818: 8000eaf8 .word 0x8000eaf8 +8000381c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xa4c1c74a +80003820: 0008ac83 lw x25,0(x17) +80003824: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x4ffa460d +80003828: 0008af03 lw x30,0(x17) +8000382c: 00488893 addi x17,x17,4 + +80003830 : +Zbkx_xperm4_cg_cmp_rd_rs1_b25: + xperm4 x25, x25, x30 # perform operation +80003830: 29ecacb3 xperm4 x25,x25,x30 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkx_xperm4_cg_cmp_rd_rs1_b25, Zbkx_xperm4_cg_cmp_rd_rs1_b25_str) +80003834: 000da203 lw x4,0(x27) +80003838: 01920863 beq x4,x25,80003848 +8000383c: 505012ef jal x5,80005540 +80003840: 80003830 .word 0x80003830 +80003844: 8000eb32 .word 0x8000eb32 +80003848: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x9a714194 +8000384c: 0008ad03 lw x26,0(x17) +80003850: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0844c5cb +80003854: 0008ae03 lw x28,0(x17) +80003858: 00488893 addi x17,x17,4 + +8000385c : +Zbkx_xperm4_cg_cmp_rd_rs1_b26: + xperm4 x26, x26, x28 # perform operation +8000385c: 29cd2d33 xperm4 x26,x26,x28 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkx_xperm4_cg_cmp_rd_rs1_b26, Zbkx_xperm4_cg_cmp_rd_rs1_b26_str) +80003860: 000da203 lw x4,0(x27) +80003864: 01a20863 beq x4,x26,80003874 +80003868: 4d9012ef jal x5,80005540 +8000386c: 8000385c .word 0x8000385c +80003870: 8000eb6c .word 0x8000eb6c +80003874: 004d8d93 addi x27,x27,4 + + mv x25, x27 # switch signature pointer register to avoid conflict with test +80003878: 000d8c93 addi x25,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xca26a42e +8000387c: 0008ad83 lw x27,0(x17) +80003880: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xda3761b3 +80003884: 0008a703 lw x14,0(x17) +80003888: 00488893 addi x17,x17,4 + +8000388c : +Zbkx_xperm4_cg_cmp_rd_rs1_b27: + xperm4 x27, x27, x14 # perform operation +8000388c: 28edadb3 xperm4 x27,x27,x14 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zbkx_xperm4_cg_cmp_rd_rs1_b27, Zbkx_xperm4_cg_cmp_rd_rs1_b27_str) +80003890: 000ca203 lw x4,0(x25) +80003894: 01b20863 beq x4,x27,800038a4 +80003898: 4a9012ef jal x5,80005540 +8000389c: 8000388c .word 0x8000388c +800038a0: 8000eba6 .word 0x8000eba6 +800038a4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x6d08dedb +800038a8: 0008ae03 lw x28,0(x17) +800038ac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8d99b4a1 +800038b0: 0008ab03 lw x22,0(x17) +800038b4: 00488893 addi x17,x17,4 + +800038b8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b28: + xperm4 x28, x28, x22 # perform operation +800038b8: 296e2e33 xperm4 x28,x28,x22 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zbkx_xperm4_cg_cmp_rd_rs1_b28, Zbkx_xperm4_cg_cmp_rd_rs1_b28_str) +800038bc: 000ca203 lw x4,0(x25) +800038c0: 01c20863 beq x4,x28,800038d0 +800038c4: 47d012ef jal x5,80005540 +800038c8: 800038b8 .word 0x800038b8 +800038cc: 8000ebe0 .word 0x8000ebe0 +800038d0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x76b98958 +800038d4: 0008ae83 lw x29,0(x17) +800038d8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x5a7bfca2 +800038dc: 0008a783 lw x15,0(x17) +800038e0: 00488893 addi x17,x17,4 + +800038e4 : +Zbkx_xperm4_cg_cmp_rd_rs1_b29: + xperm4 x29, x29, x15 # perform operation +800038e4: 28feaeb3 xperm4 x29,x29,x15 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkx_xperm4_cg_cmp_rd_rs1_b29, Zbkx_xperm4_cg_cmp_rd_rs1_b29_str) +800038e8: 000ca203 lw x4,0(x25) +800038ec: 01d20863 beq x4,x29,800038fc +800038f0: 451012ef jal x5,80005540 +800038f4: 800038e4 .word 0x800038e4 +800038f8: 8000ec1a .word 0x8000ec1a +800038fc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x33a78b71 +80003900: 0008af03 lw x30,0(x17) +80003904: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xa900205f +80003908: 0008a683 lw x13,0(x17) +8000390c: 00488893 addi x17,x17,4 + +80003910 : +Zbkx_xperm4_cg_cmp_rd_rs1_b30: + xperm4 x30, x30, x13 # perform operation +80003910: 28df2f33 xperm4 x30,x30,x13 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkx_xperm4_cg_cmp_rd_rs1_b30, Zbkx_xperm4_cg_cmp_rd_rs1_b30_str) +80003914: 000ca203 lw x4,0(x25) +80003918: 01e20863 beq x4,x30,80003928 +8000391c: 425012ef jal x5,80005540 +80003920: 80003910 .word 0x80003910 +80003924: 8000ec54 .word 0x8000ec54 +80003928: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x5100e79b +8000392c: 0008af83 lw x31,0(x17) +80003930: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xdb3efeea +80003934: 0008a083 lw x1,0(x17) +80003938: 00488893 addi x17,x17,4 + +8000393c : +Zbkx_xperm4_cg_cmp_rd_rs1_b31: + xperm4 x31, x31, x1 # perform operation +8000393c: 281fafb3 xperm4 x31,x31,x1 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkx_xperm4_cg_cmp_rd_rs1_b31, Zbkx_xperm4_cg_cmp_rd_rs1_b31_str) +80003940: 000ca203 lw x4,0(x25) +80003944: 01f20863 beq x4,x31,80003954 +80003948: 3f9012ef jal x5,80005540 +8000394c: 8000393c .word 0x8000393c +80003950: 8000ec8e .word 0x8000ec8e +80003954: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x65acce99 +80003958: 0008a603 lw x12,0(x17) +8000395c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x8a12c417 +80003960: 0008a003 lw x0,0(x17) +80003964: 00488893 addi x17,x17,4 + +80003968 : +Zbkx_xperm4_cg_cmp_rd_rs2_b0: + xperm4 x0, x12, x0 # perform operation +80003968: 28062033 xperm4 x0,x12,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zbkx_xperm4_cg_cmp_rd_rs2_b0, Zbkx_xperm4_cg_cmp_rd_rs2_b0_str) +8000396c: 000ca203 lw x4,0(x25) +80003970: 00020863 beq x4,x0,80003980 +80003974: 3cd012ef jal x5,80005540 +80003978: 80003968 .word 0x80003968 +8000397c: 8000ecc8 .word 0x8000ecc8 +80003980: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x123106c6 +80003984: 0008a603 lw x12,0(x17) +80003988: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0fe8b4b3 +8000398c: 0008a083 lw x1,0(x17) +80003990: 00488893 addi x17,x17,4 + +80003994 : +Zbkx_xperm4_cg_cmp_rd_rs2_b1: + xperm4 x1, x12, x1 # perform operation +80003994: 281620b3 xperm4 x1,x12,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkx_xperm4_cg_cmp_rd_rs2_b1, Zbkx_xperm4_cg_cmp_rd_rs2_b1_str) +80003998: 000ca203 lw x4,0(x25) +8000399c: 00120863 beq x4,x1,800039ac +800039a0: 3a1012ef jal x5,80005540 +800039a4: 80003994 .word 0x80003994 +800039a8: 8000ed01 .word 0x8000ed01 +800039ac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xa393e0c2 +800039b0: 0008a483 lw x9,0(x17) +800039b4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x5fb666f8 +800039b8: 0008a103 lw x2,0(x17) +800039bc: 00488893 addi x17,x17,4 + +800039c0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b2: + xperm4 x2, x9, x2 # perform operation +800039c0: 2824a133 xperm4 x2,x9,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkx_xperm4_cg_cmp_rd_rs2_b2, Zbkx_xperm4_cg_cmp_rd_rs2_b2_str) +800039c4: 000ca203 lw x4,0(x25) +800039c8: 00220863 beq x4,x2,800039d8 +800039cc: 375012ef jal x5,80005540 +800039d0: 800039c0 .word 0x800039c0 +800039d4: 8000ed3a .word 0x8000ed3a +800039d8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x595f99db +800039dc: 0008a103 lw x2,0(x17) +800039e0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xbb744924 +800039e4: 0008a183 lw x3,0(x17) +800039e8: 00488893 addi x17,x17,4 + +800039ec : +Zbkx_xperm4_cg_cmp_rd_rs2_b3: + xperm4 x3, x2, x3 # perform operation +800039ec: 283121b3 xperm4 x3,x2,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkx_xperm4_cg_cmp_rd_rs2_b3, Zbkx_xperm4_cg_cmp_rd_rs2_b3_str) +800039f0: 000ca203 lw x4,0(x25) +800039f4: 00320863 beq x4,x3,80003a04 +800039f8: 349012ef jal x5,80005540 +800039fc: 800039ec .word 0x800039ec +80003a00: 8000ed73 .word 0x8000ed73 +80003a04: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003a08: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003a0c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xadf3d52e +80003a10: 0008a503 lw x10,0(x17) +80003a14: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xb40729c5 +80003a18: 0008a203 lw x4,0(x17) +80003a1c: 00488893 addi x17,x17,4 + +80003a20 : +Zbkx_xperm4_cg_cmp_rd_rs2_b4: + xperm4 x4, x10, x4 # perform operation +80003a20: 28452233 xperm4 x4,x10,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs2_b4, Zbkx_xperm4_cg_cmp_rd_rs2_b4_str) +80003a24: 000ca383 lw x7,0(x25) +80003a28: 00438863 beq x7,x4,80003a38 +80003a2c: 32d0146f jal x8,80005558 +80003a30: 80003a20 .word 0x80003a20 +80003a34: 8000edac .word 0x8000edac +80003a38: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x6978af99 +80003a3c: 0008af03 lw x30,0(x17) +80003a40: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xdc0137a5 +80003a44: 0008a283 lw x5,0(x17) +80003a48: 00488893 addi x17,x17,4 + +80003a4c : +Zbkx_xperm4_cg_cmp_rd_rs2_b5: + xperm4 x5, x30, x5 # perform operation +80003a4c: 285f22b3 xperm4 x5,x30,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs2_b5, Zbkx_xperm4_cg_cmp_rd_rs2_b5_str) +80003a50: 000ca383 lw x7,0(x25) +80003a54: 00538863 beq x7,x5,80003a64 +80003a58: 3010146f jal x8,80005558 +80003a5c: 80003a4c .word 0x80003a4c +80003a60: 8000ede5 .word 0x8000ede5 +80003a64: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xfdf7fcee +80003a68: 0008a683 lw x13,0(x17) +80003a6c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x55e62580 +80003a70: 0008a303 lw x6,0(x17) +80003a74: 00488893 addi x17,x17,4 + +80003a78 : +Zbkx_xperm4_cg_cmp_rd_rs2_b6: + xperm4 x6, x13, x6 # perform operation +80003a78: 2866a333 xperm4 x6,x13,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs2_b6, Zbkx_xperm4_cg_cmp_rd_rs2_b6_str) +80003a7c: 000ca383 lw x7,0(x25) +80003a80: 00638863 beq x7,x6,80003a90 +80003a84: 2d50146f jal x8,80005558 +80003a88: 80003a78 .word 0x80003a78 +80003a8c: 8000ee1e .word 0x8000ee1e +80003a90: 004c8c93 addi x25,x25,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a94: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a98: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xd14297f0 +80003a9c: 0008ad83 lw x27,0(x17) +80003aa0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xd761b92a +80003aa4: 0008a383 lw x7,0(x17) +80003aa8: 00488893 addi x17,x17,4 + +80003aac : +Zbkx_xperm4_cg_cmp_rd_rs2_b7: + xperm4 x7, x27, x7 # perform operation +80003aac: 287da3b3 xperm4 x7,x27,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkx_xperm4_cg_cmp_rd_rs2_b7, Zbkx_xperm4_cg_cmp_rd_rs2_b7_str) +80003ab0: 000ca203 lw x4,0(x25) +80003ab4: 00720863 beq x4,x7,80003ac4 +80003ab8: 289012ef jal x5,80005540 +80003abc: 80003aac .word 0x80003aac +80003ac0: 8000ee57 .word 0x8000ee57 +80003ac4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xdcf3dbce +80003ac8: 0008ab03 lw x22,0(x17) +80003acc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x6073563e +80003ad0: 0008a403 lw x8,0(x17) +80003ad4: 00488893 addi x17,x17,4 + +80003ad8 : +Zbkx_xperm4_cg_cmp_rd_rs2_b8: + xperm4 x8, x22, x8 # perform operation +80003ad8: 288b2433 xperm4 x8,x22,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zbkx_xperm4_cg_cmp_rd_rs2_b8, Zbkx_xperm4_cg_cmp_rd_rs2_b8_str) +80003adc: 000ca203 lw x4,0(x25) +80003ae0: 00820863 beq x4,x8,80003af0 +80003ae4: 25d012ef jal x5,80005540 +80003ae8: 80003ad8 .word 0x80003ad8 +80003aec: 8000ee90 .word 0x8000ee90 +80003af0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xa8b2c416 +80003af4: 0008af03 lw x30,0(x17) +80003af8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x4e161ef0 +80003afc: 0008a483 lw x9,0(x17) +80003b00: 00488893 addi x17,x17,4 + +80003b04 : +Zbkx_xperm4_cg_cmp_rd_rs2_b9: + xperm4 x9, x30, x9 # perform operation +80003b04: 289f24b3 xperm4 x9,x30,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zbkx_xperm4_cg_cmp_rd_rs2_b9, Zbkx_xperm4_cg_cmp_rd_rs2_b9_str) +80003b08: 000ca203 lw x4,0(x25) +80003b0c: 00920863 beq x4,x9,80003b1c +80003b10: 231012ef jal x5,80005540 +80003b14: 80003b04 .word 0x80003b04 +80003b18: 8000eec9 .word 0x8000eec9 +80003b1c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xfc7d6055 +80003b20: 0008a703 lw x14,0(x17) +80003b24: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x61005309 +80003b28: 0008a503 lw x10,0(x17) +80003b2c: 00488893 addi x17,x17,4 + +80003b30 : +Zbkx_xperm4_cg_cmp_rd_rs2_b10: + xperm4 x10, x14, x10 # perform operation +80003b30: 28a72533 xperm4 x10,x14,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zbkx_xperm4_cg_cmp_rd_rs2_b10, Zbkx_xperm4_cg_cmp_rd_rs2_b10_str) +80003b34: 000ca203 lw x4,0(x25) +80003b38: 00a20863 beq x4,x10,80003b48 +80003b3c: 205012ef jal x5,80005540 +80003b40: 80003b30 .word 0x80003b30 +80003b44: 8000ef02 .word 0x8000ef02 +80003b48: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x3b1ff0f6 +80003b4c: 0008ae83 lw x29,0(x17) +80003b50: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x47cadd62 +80003b54: 0008a583 lw x11,0(x17) +80003b58: 00488893 addi x17,x17,4 + +80003b5c : +Zbkx_xperm4_cg_cmp_rd_rs2_b11: + xperm4 x11, x29, x11 # perform operation +80003b5c: 28bea5b3 xperm4 x11,x29,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkx_xperm4_cg_cmp_rd_rs2_b11, Zbkx_xperm4_cg_cmp_rd_rs2_b11_str) +80003b60: 000ca203 lw x4,0(x25) +80003b64: 00b20863 beq x4,x11,80003b74 +80003b68: 1d9012ef jal x5,80005540 +80003b6c: 80003b5c .word 0x80003b5c +80003b70: 8000ef3c .word 0x8000ef3c +80003b74: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xad997f76 +80003b78: 0008ad83 lw x27,0(x17) +80003b7c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x813fc661 +80003b80: 0008a603 lw x12,0(x17) +80003b84: 00488893 addi x17,x17,4 + +80003b88 : +Zbkx_xperm4_cg_cmp_rd_rs2_b12: + xperm4 x12, x27, x12 # perform operation +80003b88: 28cda633 xperm4 x12,x27,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkx_xperm4_cg_cmp_rd_rs2_b12, Zbkx_xperm4_cg_cmp_rd_rs2_b12_str) +80003b8c: 000ca203 lw x4,0(x25) +80003b90: 00c20863 beq x4,x12,80003ba0 +80003b94: 1ad012ef jal x5,80005540 +80003b98: 80003b88 .word 0x80003b88 +80003b9c: 8000ef76 .word 0x8000ef76 +80003ba0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xdc6315eb +80003ba4: 0008a703 lw x14,0(x17) +80003ba8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xc22e7102 +80003bac: 0008a683 lw x13,0(x17) +80003bb0: 00488893 addi x17,x17,4 + +80003bb4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b13: + xperm4 x13, x14, x13 # perform operation +80003bb4: 28d726b3 xperm4 x13,x14,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkx_xperm4_cg_cmp_rd_rs2_b13, Zbkx_xperm4_cg_cmp_rd_rs2_b13_str) +80003bb8: 000ca203 lw x4,0(x25) +80003bbc: 00d20863 beq x4,x13,80003bcc +80003bc0: 181012ef jal x5,80005540 +80003bc4: 80003bb4 .word 0x80003bb4 +80003bc8: 8000efb0 .word 0x8000efb0 +80003bcc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x76e5631c +80003bd0: 0008ab03 lw x22,0(x17) +80003bd4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x6eed9f4c +80003bd8: 0008a703 lw x14,0(x17) +80003bdc: 00488893 addi x17,x17,4 + +80003be0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b14: + xperm4 x14, x22, x14 # perform operation +80003be0: 28eb2733 xperm4 x14,x22,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkx_xperm4_cg_cmp_rd_rs2_b14, Zbkx_xperm4_cg_cmp_rd_rs2_b14_str) +80003be4: 000ca203 lw x4,0(x25) +80003be8: 00e20863 beq x4,x14,80003bf8 +80003bec: 155012ef jal x5,80005540 +80003bf0: 80003be0 .word 0x80003be0 +80003bf4: 8000efea .word 0x8000efea +80003bf8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x28c1cebc +80003bfc: 0008ab03 lw x22,0(x17) +80003c00: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x7d935abd +80003c04: 0008a783 lw x15,0(x17) +80003c08: 00488893 addi x17,x17,4 + +80003c0c : +Zbkx_xperm4_cg_cmp_rd_rs2_b15: + xperm4 x15, x22, x15 # perform operation +80003c0c: 28fb27b3 xperm4 x15,x22,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkx_xperm4_cg_cmp_rd_rs2_b15, Zbkx_xperm4_cg_cmp_rd_rs2_b15_str) +80003c10: 000ca203 lw x4,0(x25) +80003c14: 00f20863 beq x4,x15,80003c24 +80003c18: 129012ef jal x5,80005540 +80003c1c: 80003c0c .word 0x80003c0c +80003c20: 8000f024 .word 0x8000f024 +80003c24: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x2a0bd203 +80003c28: 0008a083 lw x1,0(x17) +80003c2c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xe778763e +80003c30: 0008a803 lw x16,0(x17) +80003c34: 00488893 addi x17,x17,4 + +80003c38 : +Zbkx_xperm4_cg_cmp_rd_rs2_b16: + xperm4 x16, x1, x16 # perform operation +80003c38: 2900a833 xperm4 x16,x1,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkx_xperm4_cg_cmp_rd_rs2_b16, Zbkx_xperm4_cg_cmp_rd_rs2_b16_str) +80003c3c: 000ca203 lw x4,0(x25) +80003c40: 01020863 beq x4,x16,80003c50 +80003c44: 0fd012ef jal x5,80005540 +80003c48: 80003c38 .word 0x80003c38 +80003c4c: 8000f05e .word 0x8000f05e +80003c50: 004c8c93 addi x25,x25,4 + + mv x26, x17 # switch data pointer register to avoid conflict with test +80003c54: 00088d13 addi x26,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xe56c53be +80003c58: 000d2483 lw x9,0(x26) +80003c5c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xc71ec8db +80003c60: 000d2883 lw x17,0(x26) +80003c64: 004d0d13 addi x26,x26,4 + +80003c68 : +Zbkx_xperm4_cg_cmp_rd_rs2_b17: + xperm4 x17, x9, x17 # perform operation +80003c68: 2914a8b3 xperm4 x17,x9,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkx_xperm4_cg_cmp_rd_rs2_b17, Zbkx_xperm4_cg_cmp_rd_rs2_b17_str) +80003c6c: 000ca203 lw x4,0(x25) +80003c70: 01120863 beq x4,x17,80003c80 +80003c74: 0cd012ef jal x5,80005540 +80003c78: 80003c68 .word 0x80003c68 +80003c7c: 8000f098 .word 0x8000f098 +80003c80: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x836cd55e +80003c84: 000d2f03 lw x30,0(x26) +80003c88: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x2eb8b7e9 +80003c8c: 000d2903 lw x18,0(x26) +80003c90: 004d0d13 addi x26,x26,4 + +80003c94 : +Zbkx_xperm4_cg_cmp_rd_rs2_b18: + xperm4 x18, x30, x18 # perform operation +80003c94: 292f2933 xperm4 x18,x30,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkx_xperm4_cg_cmp_rd_rs2_b18, Zbkx_xperm4_cg_cmp_rd_rs2_b18_str) +80003c98: 000ca203 lw x4,0(x25) +80003c9c: 01220863 beq x4,x18,80003cac +80003ca0: 0a1012ef jal x5,80005540 +80003ca4: 80003c94 .word 0x80003c94 +80003ca8: 8000f0d2 .word 0x8000f0d2 +80003cac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xe63a9d09 +80003cb0: 000d2483 lw x9,0(x26) +80003cb4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xc2b0fbd5 +80003cb8: 000d2983 lw x19,0(x26) +80003cbc: 004d0d13 addi x26,x26,4 + +80003cc0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b19: + xperm4 x19, x9, x19 # perform operation +80003cc0: 2934a9b3 xperm4 x19,x9,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkx_xperm4_cg_cmp_rd_rs2_b19, Zbkx_xperm4_cg_cmp_rd_rs2_b19_str) +80003cc4: 000ca203 lw x4,0(x25) +80003cc8: 01320863 beq x4,x19,80003cd8 +80003ccc: 075012ef jal x5,80005540 +80003cd0: 80003cc0 .word 0x80003cc0 +80003cd4: 8000f10c .word 0x8000f10c +80003cd8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x0800c923 +80003cdc: 000d2f03 lw x30,0(x26) +80003ce0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x36080d88 +80003ce4: 000d2a03 lw x20,0(x26) +80003ce8: 004d0d13 addi x26,x26,4 + +80003cec : +Zbkx_xperm4_cg_cmp_rd_rs2_b20: + xperm4 x20, x30, x20 # perform operation +80003cec: 294f2a33 xperm4 x20,x30,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkx_xperm4_cg_cmp_rd_rs2_b20, Zbkx_xperm4_cg_cmp_rd_rs2_b20_str) +80003cf0: 000ca203 lw x4,0(x25) +80003cf4: 01420863 beq x4,x20,80003d04 +80003cf8: 049012ef jal x5,80005540 +80003cfc: 80003cec .word 0x80003cec +80003d00: 8000f146 .word 0x8000f146 +80003d04: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x406d1020 +80003d08: 000d2703 lw x14,0(x26) +80003d0c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xca0049ae +80003d10: 000d2a83 lw x21,0(x26) +80003d14: 004d0d13 addi x26,x26,4 + +80003d18 : +Zbkx_xperm4_cg_cmp_rd_rs2_b21: + xperm4 x21, x14, x21 # perform operation +80003d18: 29572ab3 xperm4 x21,x14,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkx_xperm4_cg_cmp_rd_rs2_b21, Zbkx_xperm4_cg_cmp_rd_rs2_b21_str) +80003d1c: 000ca203 lw x4,0(x25) +80003d20: 01520863 beq x4,x21,80003d30 +80003d24: 01d012ef jal x5,80005540 +80003d28: 80003d18 .word 0x80003d18 +80003d2c: 8000f180 .word 0x8000f180 +80003d30: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x37c9e11d +80003d34: 000d2a83 lw x21,0(x26) +80003d38: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xa3caed0a +80003d3c: 000d2b03 lw x22,0(x26) +80003d40: 004d0d13 addi x26,x26,4 + +80003d44 : +Zbkx_xperm4_cg_cmp_rd_rs2_b22: + xperm4 x22, x21, x22 # perform operation +80003d44: 296aab33 xperm4 x22,x21,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkx_xperm4_cg_cmp_rd_rs2_b22, Zbkx_xperm4_cg_cmp_rd_rs2_b22_str) +80003d48: 000ca203 lw x4,0(x25) +80003d4c: 01620863 beq x4,x22,80003d5c +80003d50: 7f0012ef jal x5,80005540 +80003d54: 80003d44 .word 0x80003d44 +80003d58: 8000f1ba .word 0x8000f1ba +80003d5c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xdb43321f +80003d60: 000d2e03 lw x28,0(x26) +80003d64: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x5f4e40ed +80003d68: 000d2b83 lw x23,0(x26) +80003d6c: 004d0d13 addi x26,x26,4 + +80003d70 : +Zbkx_xperm4_cg_cmp_rd_rs2_b23: + xperm4 x23, x28, x23 # perform operation +80003d70: 297e2bb3 xperm4 x23,x28,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkx_xperm4_cg_cmp_rd_rs2_b23, Zbkx_xperm4_cg_cmp_rd_rs2_b23_str) +80003d74: 000ca203 lw x4,0(x25) +80003d78: 01720863 beq x4,x23,80003d88 +80003d7c: 7c4012ef jal x5,80005540 +80003d80: 80003d70 .word 0x80003d70 +80003d84: 8000f1f4 .word 0x8000f1f4 +80003d88: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x0338ddf5 +80003d8c: 000d2903 lw x18,0(x26) +80003d90: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x1fad2d5c +80003d94: 000d2c03 lw x24,0(x26) +80003d98: 004d0d13 addi x26,x26,4 + +80003d9c : +Zbkx_xperm4_cg_cmp_rd_rs2_b24: + xperm4 x24, x18, x24 # perform operation +80003d9c: 29892c33 xperm4 x24,x18,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkx_xperm4_cg_cmp_rd_rs2_b24, Zbkx_xperm4_cg_cmp_rd_rs2_b24_str) +80003da0: 000ca203 lw x4,0(x25) +80003da4: 01820863 beq x4,x24,80003db4 +80003da8: 798012ef jal x5,80005540 +80003dac: 80003d9c .word 0x80003d9c +80003db0: 8000f22e .word 0x8000f22e +80003db4: 004c8c93 addi x25,x25,4 + + mv x11, x25 # switch signature pointer register to avoid conflict with test +80003db8: 000c8593 addi x11,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x30e8b276 +80003dbc: 000d2e83 lw x29,0(x26) +80003dc0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x8cac83d5 +80003dc4: 000d2c83 lw x25,0(x26) +80003dc8: 004d0d13 addi x26,x26,4 + +80003dcc : +Zbkx_xperm4_cg_cmp_rd_rs2_b25: + xperm4 x25, x29, x25 # perform operation +80003dcc: 299eacb3 xperm4 x25,x29,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkx_xperm4_cg_cmp_rd_rs2_b25, Zbkx_xperm4_cg_cmp_rd_rs2_b25_str) +80003dd0: 0005a203 lw x4,0(x11) +80003dd4: 01920863 beq x4,x25,80003de4 +80003dd8: 768012ef jal x5,80005540 +80003ddc: 80003dcc .word 0x80003dcc +80003de0: 8000f268 .word 0x8000f268 +80003de4: 00458593 addi x11,x11,4 + + mv x19, x26 # switch data pointer register to avoid conflict with test +80003de8: 000d0993 addi x19,x26,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x18c607a9 +80003dec: 0009aa83 lw x21,0(x19) +80003df0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x826c3d64 +80003df4: 0009ad03 lw x26,0(x19) +80003df8: 00498993 addi x19,x19,4 + +80003dfc : +Zbkx_xperm4_cg_cmp_rd_rs2_b26: + xperm4 x26, x21, x26 # perform operation +80003dfc: 29aaad33 xperm4 x26,x21,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkx_xperm4_cg_cmp_rd_rs2_b26, Zbkx_xperm4_cg_cmp_rd_rs2_b26_str) +80003e00: 0005a203 lw x4,0(x11) +80003e04: 01a20863 beq x4,x26,80003e14 +80003e08: 738012ef jal x5,80005540 +80003e0c: 80003dfc .word 0x80003dfc +80003e10: 8000f2a2 .word 0x8000f2a2 +80003e14: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xc5700f42 +80003e18: 0009ad03 lw x26,0(x19) +80003e1c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x6f72c1f9 +80003e20: 0009ad83 lw x27,0(x19) +80003e24: 00498993 addi x19,x19,4 + +80003e28 : +Zbkx_xperm4_cg_cmp_rd_rs2_b27: + xperm4 x27, x26, x27 # perform operation +80003e28: 29bd2db3 xperm4 x27,x26,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkx_xperm4_cg_cmp_rd_rs2_b27, Zbkx_xperm4_cg_cmp_rd_rs2_b27_str) +80003e2c: 0005a203 lw x4,0(x11) +80003e30: 01b20863 beq x4,x27,80003e40 +80003e34: 70c012ef jal x5,80005540 +80003e38: 80003e28 .word 0x80003e28 +80003e3c: 8000f2dc .word 0x8000f2dc +80003e40: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xcd3477f7 +80003e44: 0009af83 lw x31,0(x19) +80003e48: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x34767e1b +80003e4c: 0009ae03 lw x28,0(x19) +80003e50: 00498993 addi x19,x19,4 + +80003e54 : +Zbkx_xperm4_cg_cmp_rd_rs2_b28: + xperm4 x28, x31, x28 # perform operation +80003e54: 29cfae33 xperm4 x28,x31,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkx_xperm4_cg_cmp_rd_rs2_b28, Zbkx_xperm4_cg_cmp_rd_rs2_b28_str) +80003e58: 0005a203 lw x4,0(x11) +80003e5c: 01c20863 beq x4,x28,80003e6c +80003e60: 6e0012ef jal x5,80005540 +80003e64: 80003e54 .word 0x80003e54 +80003e68: 8000f316 .word 0x8000f316 +80003e6c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x06e5601f +80003e70: 0009af03 lw x30,0(x19) +80003e74: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0xe908d695 +80003e78: 0009ae83 lw x29,0(x19) +80003e7c: 00498993 addi x19,x19,4 + +80003e80 : +Zbkx_xperm4_cg_cmp_rd_rs2_b29: + xperm4 x29, x30, x29 # perform operation +80003e80: 29df2eb3 xperm4 x29,x30,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkx_xperm4_cg_cmp_rd_rs2_b29, Zbkx_xperm4_cg_cmp_rd_rs2_b29_str) +80003e84: 0005a203 lw x4,0(x11) +80003e88: 01d20863 beq x4,x29,80003e98 +80003e8c: 6b4012ef jal x5,80005540 +80003e90: 80003e80 .word 0x80003e80 +80003e94: 8000f350 .word 0x8000f350 +80003e98: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xc0157f0e +80003e9c: 0009aa03 lw x20,0(x19) +80003ea0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xa62036ad +80003ea4: 0009af03 lw x30,0(x19) +80003ea8: 00498993 addi x19,x19,4 + +80003eac : +Zbkx_xperm4_cg_cmp_rd_rs2_b30: + xperm4 x30, x20, x30 # perform operation +80003eac: 29ea2f33 xperm4 x30,x20,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkx_xperm4_cg_cmp_rd_rs2_b30, Zbkx_xperm4_cg_cmp_rd_rs2_b30_str) +80003eb0: 0005a203 lw x4,0(x11) +80003eb4: 01e20863 beq x4,x30,80003ec4 +80003eb8: 688012ef jal x5,80005540 +80003ebc: 80003eac .word 0x80003eac +80003ec0: 8000f38a .word 0x8000f38a +80003ec4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xe0810133 +80003ec8: 0009a403 lw x8,0(x19) +80003ecc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x0e84565e +80003ed0: 0009af83 lw x31,0(x19) +80003ed4: 00498993 addi x19,x19,4 + +80003ed8 : +Zbkx_xperm4_cg_cmp_rd_rs2_b31: + xperm4 x31, x8, x31 # perform operation +80003ed8: 29f42fb3 xperm4 x31,x8,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkx_xperm4_cg_cmp_rd_rs2_b31, Zbkx_xperm4_cg_cmp_rd_rs2_b31_str) +80003edc: 0005a203 lw x4,0(x11) +80003ee0: 01f20863 beq x4,x31,80003ef0 +80003ee4: 65c012ef jal x5,80005540 +80003ee8: 80003ed8 .word 0x80003ed8 +80003eec: 8000f3c4 .word 0x8000f3c4 +80003ef0: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x8307a853 +80003ef4: 0009a003 lw x0,0(x19) +80003ef8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xb70b209b +80003efc: 0009a003 lw x0,0(x19) +80003f00: 00498993 addi x19,x19,4 + +80003f04 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0: + xperm4 x0, x0, x0 # perform operation +80003f04: 28002033 xperm4 x0,x0,x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0_str) +80003f08: 0005a203 lw x4,0(x11) +80003f0c: 00020863 beq x4,x0,80003f1c +80003f10: 630012ef jal x5,80005540 +80003f14: 80003f04 .word 0x80003f04 +80003f18: 8000f3fe .word 0x8000f3fe +80003f1c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0xeef42417 +80003f20: 0009a083 lw x1,0(x19) +80003f24: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xad7ecf14 +80003f28: 0009a083 lw x1,0(x19) +80003f2c: 00498993 addi x19,x19,4 + +80003f30 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1: + xperm4 x1, x1, x1 # perform operation +80003f30: 2810a0b3 xperm4 x1,x1,x1 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1_str) +80003f34: 0005a203 lw x4,0(x11) +80003f38: 00120863 beq x4,x1,80003f48 +80003f3c: 604012ef jal x5,80005540 +80003f40: 80003f30 .word 0x80003f30 +80003f44: 8000f43b .word 0x8000f43b +80003f48: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0xb89744be +80003f4c: 0009a103 lw x2,0(x19) +80003f50: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x92815849 +80003f54: 0009a103 lw x2,0(x19) +80003f58: 00498993 addi x19,x19,4 + +80003f5c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2: + xperm4 x2, x2, x2 # perform operation +80003f5c: 28212133 xperm4 x2,x2,x2 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2_str) +80003f60: 0005a203 lw x4,0(x11) +80003f64: 00220863 beq x4,x2,80003f74 +80003f68: 5d8012ef jal x5,80005540 +80003f6c: 80003f5c .word 0x80003f5c +80003f70: 8000f478 .word 0x8000f478 +80003f74: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x305898f8 +80003f78: 0009a183 lw x3,0(x19) +80003f7c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x335b5f71 +80003f80: 0009a183 lw x3,0(x19) +80003f84: 00498993 addi x19,x19,4 + +80003f88 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3: + xperm4 x3, x3, x3 # perform operation +80003f88: 2831a1b3 xperm4 x3,x3,x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3_str) +80003f8c: 0005a203 lw x4,0(x11) +80003f90: 00320863 beq x4,x3,80003fa0 +80003f94: 5ac012ef jal x5,80005540 +80003f98: 80003f88 .word 0x80003f88 +80003f9c: 8000f4b5 .word 0x8000f4b5 +80003fa0: 00458593 addi x11,x11,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003fa4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003fa8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xa91d71d4 +80003fac: 0009a203 lw x4,0(x19) +80003fb0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0xb9429d0f +80003fb4: 0009a203 lw x4,0(x19) +80003fb8: 00498993 addi x19,x19,4 + +80003fbc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4: + xperm4 x4, x4, x4 # perform operation +80003fbc: 28422233 xperm4 x4,x4,x4 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4_str) +80003fc0: 0005a383 lw x7,0(x11) +80003fc4: 00438863 beq x7,x4,80003fd4 +80003fc8: 5900146f jal x8,80005558 +80003fcc: 80003fbc .word 0x80003fbc +80003fd0: 8000f4f2 .word 0x8000f4f2 +80003fd4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0xe3c4ba1a +80003fd8: 0009a283 lw x5,0(x19) +80003fdc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x77a4d502 +80003fe0: 0009a283 lw x5,0(x19) +80003fe4: 00498993 addi x19,x19,4 + +80003fe8 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5: + xperm4 x5, x5, x5 # perform operation +80003fe8: 2852a2b3 xperm4 x5,x5,x5 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5_str) +80003fec: 0005a383 lw x7,0(x11) +80003ff0: 00538863 beq x7,x5,80004000 +80003ff4: 5640146f jal x8,80005558 +80003ff8: 80003fe8 .word 0x80003fe8 +80003ffc: 8000f52f .word 0x8000f52f +80004000: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x7f8c0181 +80004004: 0009a303 lw x6,0(x19) +80004008: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0xd7ee8093 +8000400c: 0009a303 lw x6,0(x19) +80004010: 00498993 addi x19,x19,4 + +80004014 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6: + xperm4 x6, x6, x6 # perform operation +80004014: 28632333 xperm4 x6,x6,x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6_str) +80004018: 0005a383 lw x7,0(x11) +8000401c: 00638863 beq x7,x6,8000402c +80004020: 5380146f jal x8,80005558 +80004024: 80004014 .word 0x80004014 +80004028: 8000f56c .word 0x8000f56c +8000402c: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80004030: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80004034: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0xd927f92a +80004038: 0009a383 lw x7,0(x19) +8000403c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0x5c3f01e6 +80004040: 0009a383 lw x7,0(x19) +80004044: 00498993 addi x19,x19,4 + +80004048 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7: + xperm4 x7, x7, x7 # perform operation +80004048: 2873a3b3 xperm4 x7,x7,x7 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7_str) +8000404c: 0005a683 lw x13,0(x11) +80004050: 00768863 beq x13,x7,80004060 +80004054: 52c0176f jal x14,80005580 +80004058: 80004048 .word 0x80004048 +8000405c: 8000f5a9 .word 0x8000f5a9 +80004060: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0x897abeb3 +80004064: 0009a403 lw x8,0(x19) +80004068: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x4440259f +8000406c: 0009a403 lw x8,0(x19) +80004070: 00498993 addi x19,x19,4 + +80004074 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8: + xperm4 x8, x8, x8 # perform operation +80004074: 28842433 xperm4 x8,x8,x8 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8_str) +80004078: 0005a683 lw x13,0(x11) +8000407c: 00868863 beq x13,x8,8000408c +80004080: 5000176f jal x14,80005580 +80004084: 80004074 .word 0x80004074 +80004088: 8000f5e6 .word 0x8000f5e6 +8000408c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x8dde0c9c +80004090: 0009a483 lw x9,0(x19) +80004094: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x331213aa +80004098: 0009a483 lw x9,0(x19) +8000409c: 00498993 addi x19,x19,4 + +800040a0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9: + xperm4 x9, x9, x9 # perform operation +800040a0: 2894a4b3 xperm4 x9,x9,x9 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9_str) +800040a4: 0005a683 lw x13,0(x11) +800040a8: 00968863 beq x13,x9,800040b8 +800040ac: 4d40176f jal x14,80005580 +800040b0: 800040a0 .word 0x800040a0 +800040b4: 8000f623 .word 0x8000f623 +800040b8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xbc6fe61a +800040bc: 0009a503 lw x10,0(x19) +800040c0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x63952dac +800040c4: 0009a503 lw x10,0(x19) +800040c8: 00498993 addi x19,x19,4 + +800040cc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10: + xperm4 x10, x10, x10 # perform operation +800040cc: 28a52533 xperm4 x10,x10,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10_str) +800040d0: 0005a683 lw x13,0(x11) +800040d4: 00a68863 beq x13,x10,800040e4 +800040d8: 4a80176f jal x14,80005580 +800040dc: 800040cc .word 0x800040cc +800040e0: 8000f660 .word 0x8000f660 +800040e4: 00458593 addi x11,x11,4 + + mv x20, x11 # switch signature pointer register to avoid conflict with test +800040e8: 00058a13 addi x20,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x99e3b04c +800040ec: 0009a583 lw x11,0(x19) +800040f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xf3ec83dc +800040f4: 0009a583 lw x11,0(x19) +800040f8: 00498993 addi x19,x19,4 + +800040fc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11: + xperm4 x11, x11, x11 # perform operation +800040fc: 28b5a5b3 xperm4 x11,x11,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11_str) +80004100: 000a2683 lw x13,0(x20) +80004104: 00b68863 beq x13,x11,80004114 +80004108: 4780176f jal x14,80005580 +8000410c: 800040fc .word 0x800040fc +80004110: 8000f69e .word 0x8000f69e +80004114: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xb5811f16 +80004118: 0009a603 lw x12,0(x19) +8000411c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x707e1107 +80004120: 0009a603 lw x12,0(x19) +80004124: 00498993 addi x19,x19,4 + +80004128 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12: + xperm4 x12, x12, x12 # perform operation +80004128: 28c62633 xperm4 x12,x12,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12_str) +8000412c: 000a2683 lw x13,0(x20) +80004130: 00c68863 beq x13,x12,80004140 +80004134: 44c0176f jal x14,80005580 +80004138: 80004128 .word 0x80004128 +8000413c: 8000f6dc .word 0x8000f6dc +80004140: 004a0a13 addi x20,x20,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80004144: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004148: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x4aefbd00 +8000414c: 0009a683 lw x13,0(x19) +80004150: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x7907cb43 +80004154: 0009a683 lw x13,0(x19) +80004158: 00498993 addi x19,x19,4 + +8000415c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13: + xperm4 x13, x13, x13 # perform operation +8000415c: 28d6a6b3 xperm4 x13,x13,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13_str) +80004160: 000a2383 lw x7,0(x20) +80004164: 00d38863 beq x7,x13,80004174 +80004168: 3f00146f jal x8,80005558 +8000416c: 8000415c .word 0x8000415c +80004170: 8000f71a .word 0x8000f71a +80004174: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xfb01c2c1 +80004178: 0009a703 lw x14,0(x19) +8000417c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xcf660efd +80004180: 0009a703 lw x14,0(x19) +80004184: 00498993 addi x19,x19,4 + +80004188 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14: + xperm4 x14, x14, x14 # perform operation +80004188: 28e72733 xperm4 x14,x14,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x14, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14_str) +8000418c: 000a2383 lw x7,0(x20) +80004190: 00e38863 beq x7,x14,800041a0 +80004194: 3c40146f jal x8,80005558 +80004198: 80004188 .word 0x80004188 +8000419c: 8000f758 .word 0x8000f758 +800041a0: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x3a13f0ad +800041a4: 0009a783 lw x15,0(x19) +800041a8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0xf59149e8 +800041ac: 0009a783 lw x15,0(x19) +800041b0: 00498993 addi x19,x19,4 + +800041b4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15: + xperm4 x15, x15, x15 # perform operation +800041b4: 28f7a7b3 xperm4 x15,x15,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x15, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15_str) +800041b8: 000a2383 lw x7,0(x20) +800041bc: 00f38863 beq x7,x15,800041cc +800041c0: 3980146f jal x8,80005558 +800041c4: 800041b4 .word 0x800041b4 +800041c8: 8000f796 .word 0x8000f796 +800041cc: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x60c1d799 +800041d0: 0009a803 lw x16,0(x19) +800041d4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x35ef9af6 +800041d8: 0009a803 lw x16,0(x19) +800041dc: 00498993 addi x19,x19,4 + +800041e0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16: + xperm4 x16, x16, x16 # perform operation +800041e0: 29082833 xperm4 x16,x16,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16_str) +800041e4: 000a2383 lw x7,0(x20) +800041e8: 01038863 beq x7,x16,800041f8 +800041ec: 36c0146f jal x8,80005558 +800041f0: 800041e0 .word 0x800041e0 +800041f4: 8000f7d4 .word 0x8000f7d4 +800041f8: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xee7c137c +800041fc: 0009a883 lw x17,0(x19) +80004200: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x5ac27cc1 +80004204: 0009a883 lw x17,0(x19) +80004208: 00498993 addi x19,x19,4 + +8000420c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17: + xperm4 x17, x17, x17 # perform operation +8000420c: 2918a8b3 xperm4 x17,x17,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x17, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17_str) +80004210: 000a2383 lw x7,0(x20) +80004214: 01138863 beq x7,x17,80004224 +80004218: 3400146f jal x8,80005558 +8000421c: 8000420c .word 0x8000420c +80004220: 8000f812 .word 0x8000f812 +80004224: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xa434c085 +80004228: 0009a903 lw x18,0(x19) +8000422c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x2506711e +80004230: 0009a903 lw x18,0(x19) +80004234: 00498993 addi x19,x19,4 + +80004238 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18: + xperm4 x18, x18, x18 # perform operation +80004238: 29292933 xperm4 x18,x18,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x18, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18_str) +8000423c: 000a2383 lw x7,0(x20) +80004240: 01238863 beq x7,x18,80004250 +80004244: 3140146f jal x8,80005558 +80004248: 80004238 .word 0x80004238 +8000424c: 8000f850 .word 0x8000f850 +80004250: 004a0a13 addi x20,x20,4 + + mv x22, x19 # switch data pointer register to avoid conflict with test +80004254: 00098b13 addi x22,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xcdc55edb +80004258: 000b2983 lw x19,0(x22) +8000425c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xcf8640f9 +80004260: 000b2983 lw x19,0(x22) +80004264: 004b0b13 addi x22,x22,4 + +80004268 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19: + xperm4 x19, x19, x19 # perform operation +80004268: 2939a9b3 xperm4 x19,x19,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x19, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19_str) +8000426c: 000a2383 lw x7,0(x20) +80004270: 01338863 beq x7,x19,80004280 +80004274: 2e40146f jal x8,80005558 +80004278: 80004268 .word 0x80004268 +8000427c: 8000f88e .word 0x8000f88e +80004280: 004a0a13 addi x20,x20,4 + + mv x16, x20 # switch signature pointer register to avoid conflict with test +80004284: 000a0813 addi x16,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x306812f4 +80004288: 000b2a03 lw x20,0(x22) +8000428c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xe3453b13 +80004290: 000b2a03 lw x20,0(x22) +80004294: 004b0b13 addi x22,x22,4 + +80004298 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20: + xperm4 x20, x20, x20 # perform operation +80004298: 294a2a33 xperm4 x20,x20,x20 + # Check if x20 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x20, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20_str) +8000429c: 00082383 lw x7,0(x16) +800042a0: 01438863 beq x7,x20,800042b0 +800042a4: 2b40146f jal x8,80005558 +800042a8: 80004298 .word 0x80004298 +800042ac: 8000f8cc .word 0x8000f8cc +800042b0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x6522a5d6 +800042b4: 000b2a83 lw x21,0(x22) +800042b8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xf976157e +800042bc: 000b2a83 lw x21,0(x22) +800042c0: 004b0b13 addi x22,x22,4 + +800042c4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21: + xperm4 x21, x21, x21 # perform operation +800042c4: 295aaab3 xperm4 x21,x21,x21 + # Check if x21 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x21, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21_str) +800042c8: 00082383 lw x7,0(x16) +800042cc: 01538863 beq x7,x21,800042dc +800042d0: 2880146f jal x8,80005558 +800042d4: 800042c4 .word 0x800042c4 +800042d8: 8000f90a .word 0x8000f90a +800042dc: 00480813 addi x16,x16,4 + + mv x30, x22 # switch data pointer register to avoid conflict with test +800042e0: 000b0f13 addi x30,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x8166ade7 +800042e4: 000f2b03 lw x22,0(x30) +800042e8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x94f11b21 +800042ec: 000f2b03 lw x22,0(x30) +800042f0: 004f0f13 addi x30,x30,4 + +800042f4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22: + xperm4 x22, x22, x22 # perform operation +800042f4: 296b2b33 xperm4 x22,x22,x22 + # Check if x22 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x22, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22_str) +800042f8: 00082383 lw x7,0(x16) +800042fc: 01638863 beq x7,x22,8000430c +80004300: 2580146f jal x8,80005558 +80004304: 800042f4 .word 0x800042f4 +80004308: 8000f948 .word 0x8000f948 +8000430c: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x87b12ffd +80004310: 000f2b83 lw x23,0(x30) +80004314: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xb6f341fd +80004318: 000f2b83 lw x23,0(x30) +8000431c: 004f0f13 addi x30,x30,4 + +80004320 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23: + xperm4 x23, x23, x23 # perform operation +80004320: 297babb3 xperm4 x23,x23,x23 + # Check if x23 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x23, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23_str) +80004324: 00082383 lw x7,0(x16) +80004328: 01738863 beq x7,x23,80004338 +8000432c: 22c0146f jal x8,80005558 +80004330: 80004320 .word 0x80004320 +80004334: 8000f986 .word 0x8000f986 +80004338: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x023c1ec8 +8000433c: 000f2c03 lw x24,0(x30) +80004340: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xb0d3fc5a +80004344: 000f2c03 lw x24,0(x30) +80004348: 004f0f13 addi x30,x30,4 + +8000434c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24: + xperm4 x24, x24, x24 # perform operation +8000434c: 298c2c33 xperm4 x24,x24,x24 + # Check if x24 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x24, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24_str) +80004350: 00082383 lw x7,0(x16) +80004354: 01838863 beq x7,x24,80004364 +80004358: 2000146f jal x8,80005558 +8000435c: 8000434c .word 0x8000434c +80004360: 8000f9c4 .word 0x8000f9c4 +80004364: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x9e36ee5f +80004368: 000f2c83 lw x25,0(x30) +8000436c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x51a94d9c +80004370: 000f2c83 lw x25,0(x30) +80004374: 004f0f13 addi x30,x30,4 + +80004378 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25: + xperm4 x25, x25, x25 # perform operation +80004378: 299cacb3 xperm4 x25,x25,x25 + # Check if x25 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x25, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25_str) +8000437c: 00082383 lw x7,0(x16) +80004380: 01938863 beq x7,x25,80004390 +80004384: 1d40146f jal x8,80005558 +80004388: 80004378 .word 0x80004378 +8000438c: 8000fa02 .word 0x8000fa02 +80004390: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x2c1ab6d0 +80004394: 000f2d03 lw x26,0(x30) +80004398: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x78513965 +8000439c: 000f2d03 lw x26,0(x30) +800043a0: 004f0f13 addi x30,x30,4 + +800043a4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26: + xperm4 x26, x26, x26 # perform operation +800043a4: 29ad2d33 xperm4 x26,x26,x26 + # Check if x26 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x26, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26_str) +800043a8: 00082383 lw x7,0(x16) +800043ac: 01a38863 beq x7,x26,800043bc +800043b0: 1a80146f jal x8,80005558 +800043b4: 800043a4 .word 0x800043a4 +800043b8: 8000fa40 .word 0x8000fa40 +800043bc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x483b5e97 +800043c0: 000f2d83 lw x27,0(x30) +800043c4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xd032c13d +800043c8: 000f2d83 lw x27,0(x30) +800043cc: 004f0f13 addi x30,x30,4 + +800043d0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27: + xperm4 x27, x27, x27 # perform operation +800043d0: 29bdadb3 xperm4 x27,x27,x27 + # Check if x27 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x27, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27_str) +800043d4: 00082383 lw x7,0(x16) +800043d8: 01b38863 beq x7,x27,800043e8 +800043dc: 17c0146f jal x8,80005558 +800043e0: 800043d0 .word 0x800043d0 +800043e4: 8000fa7e .word 0x8000fa7e +800043e8: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x63a647b9 +800043ec: 000f2e03 lw x28,0(x30) +800043f0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xa422c854 +800043f4: 000f2e03 lw x28,0(x30) +800043f8: 004f0f13 addi x30,x30,4 + +800043fc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28: + xperm4 x28, x28, x28 # perform operation +800043fc: 29ce2e33 xperm4 x28,x28,x28 + # Check if x28 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x28, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28_str) +80004400: 00082383 lw x7,0(x16) +80004404: 01c38863 beq x7,x28,80004414 +80004408: 1500146f jal x8,80005558 +8000440c: 800043fc .word 0x800043fc +80004410: 8000fabc .word 0x8000fabc +80004414: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x124d6b7b +80004418: 000f2e83 lw x29,0(x30) +8000441c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x8a520faa +80004420: 000f2e83 lw x29,0(x30) +80004424: 004f0f13 addi x30,x30,4 + +80004428 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29: + xperm4 x29, x29, x29 # perform operation +80004428: 29deaeb3 xperm4 x29,x29,x29 + # Check if x29 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x29, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29_str) +8000442c: 00082383 lw x7,0(x16) +80004430: 01d38863 beq x7,x29,80004440 +80004434: 1240146f jal x8,80005558 +80004438: 80004428 .word 0x80004428 +8000443c: 8000fafa .word 0x8000fafa +80004440: 00480813 addi x16,x16,4 + + mv x31, x30 # switch data pointer register to avoid conflict with test +80004444: 000f0f93 addi x31,x30,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x848f0a4f +80004448: 000faf03 lw x30,0(x31) +8000444c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x48923819 +80004450: 000faf03 lw x30,0(x31) +80004454: 004f8f93 addi x31,x31,4 + +80004458 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30: + xperm4 x30, x30, x30 # perform operation +80004458: 29ef2f33 xperm4 x30,x30,x30 + # Check if x30 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x30, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30_str) +8000445c: 00082383 lw x7,0(x16) +80004460: 01e38863 beq x7,x30,80004470 +80004464: 0f40146f jal x8,80005558 +80004468: 80004458 .word 0x80004458 +8000446c: 8000fb38 .word 0x8000fb38 +80004470: 00480813 addi x16,x16,4 + + mv x25, x31 # switch data pointer register to avoid conflict with test +80004474: 000f8c93 addi x25,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xd561da64 +80004478: 000caf83 lw x31,0(x25) +8000447c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x26fd6773 +80004480: 000caf83 lw x31,0(x25) +80004484: 004c8c93 addi x25,x25,4 + +80004488 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31: + xperm4 x31, x31, x31 # perform operation +80004488: 29ffafb3 xperm4 x31,x31,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x31, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31_str) +8000448c: 00082383 lw x7,0(x16) +80004490: 01f38863 beq x7,x31,800044a0 +80004494: 0c40146f jal x8,80005558 +80004498: 80004488 .word 0x80004488 +8000449c: 8000fb76 .word 0x8000fb76 +800044a0: 00480813 addi x16,x16,4 + + mv x2, x16 # restore signature pointer to default register for teardown +800044a4: 00080113 addi x2,x16,0 + +800044a8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +800044a8: 00000513 addi x10,x0,0 +800044ac: 00000073 ecall +800044b0: fff00513 addi x10,x0,-1 +800044b4: 1d800413 addi x8,x0,472 + +800044b8 : +800044b8: 34002373 csrrs x6,mscratch,x0 + +800044bc : +800044bc: 23832383 lw x7,568(x6) +800044c0: 23c32483 lw x9,572(x6) + +800044c4 : +800044c4: 22032383 lw x7,544(x6) + +800044c8 : +800044c8: 25032483 lw x9,592(x6) +800044cc: 34049073 csrrw x0,mscratch,x9 + +800044d0 : +800044d0: 24832483 lw x9,584(x6) +800044d4: 305493f3 csrrw x7,mtvec,x9 +800044d8: ffc4f493 andi x9,x9,-4 +800044dc: ffc3f393 andi x7,x7,-4 +800044e0: 00749e63 bne x9,x7,800044fc + +800044e4 : +800044e4: 00030493 addi x9,x6,0 + +800044e8 : +800044e8: 0004a783 lw x15,0(x9) +800044ec: 00f3a023 sw x15,0(x7) +800044f0: 00438393 addi x7,x7,4 +800044f4: 00448493 addi x9,x9,4 +800044f8: fe83c8e3 blt x7,x8,800044e8 +800044fc: 0000100f fence.i + +80004500 : +80004500: 00000497 auipc x9,0x0 +80004504: 29048493 addi x9,x9,656 # 80004790 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 10e49863 bne x9,x14,80004630 +80004524: 00000013 addi x0,x0,0 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000c517 auipc x10,0xc +80004544: d0050513 addi x10,x10,-768 # 80010240 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001d097 auipc x1,0x1d +80004564: 004080e7 jalr x1,4(x1) # 80021564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000c517 auipc x10,0xc +80004584: cfb50513 addi x10,x10,-773 # 8001027b +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001d097 auipc x1,0x1d +800045a4: fc4080e7 jalr x1,-60(x1) # 80021564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000c517 auipc x10,0xc +800045c4: d1b50513 addi x10,x10,-741 # 800102db +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001d097 auipc x1,0x1d +800045e4: f84080e7 jalr x1,-124(x1) # 80021564 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0000d517 auipc x10,0xd +80004604: 88650513 addi x10,x10,-1914 # 80010e86 +80004608: 00000013 addi x0,x0,0 +8000460c: 00000013 addi x0,x0,0 +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 0001d097 auipc x1,0x1d +80004624: f44080e7 jalr x1,-188(x1) # 80021564 +80004628: 0001d097 auipc x1,0x1d +8000462c: f9c080e7 jalr x1,-100(x1) # 800215c4 + +80004630 : +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00004317 auipc x6,0x4 +80004644: ce830313 addi x6,x6,-792 # 80008328 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 00032303 lw x6,0(x6) +80004664: 00000013 addi x0,x0,0 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 0000e397 auipc x7,0xe +80004684: 8e838393 addi x7,x7,-1816 # 80011f68 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 40730333 sub x6,x6,x7 +800046a4: 00000013 addi x0,x0,0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 0000e417 auipc x8,0xe +800046c4: 8a040413 addi x8,x8,-1888 # 80011f60 +800046c8: 00000013 addi x0,x0,0 +800046cc: 00000013 addi x0,x0,0 +800046d0: 00000013 addi x0,x0,0 +800046d4: 00000013 addi x0,x0,0 +800046d8: 00000013 addi x0,x0,0 +800046dc: 00000013 addi x0,x0,0 +800046e0: 00042203 lw x4,0(x8) +800046e4: 00620863 beq x4,x6,800046f4 +800046e8: 6c1003ef jal x7,800055a8 +800046ec: 80004630 .word 0x80004630 +800046f0: 8001042f .word 0x8001042f + +800046f4 : +800046f4: bad0e4b7 lui x9,0xbad0e +800046f8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046fc: 00e49a63 bne x9,x14,80004710 +80004700: 6a9003ef jal x7,800055a8 +80004704: 800047c4 .word 0x800047c4 +80004708: 8001029d .word 0x8001029d +8000470c: 00000341 .word 0x00000341 + +80004710 : +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0000c517 auipc x10,0xc +80004724: ae450513 addi x10,x10,-1308 # 80010204 +80004728: 00000013 addi x0,x0,0 +8000472c: 00000013 addi x0,x0,0 +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0001d097 auipc x1,0x1d +80004744: e24080e7 jalr x1,-476(x1) # 80021564 +80004748: 0001d097 auipc x1,0x1d +8000474c: e5c080e7 jalr x1,-420(x1) # 800215a4 + +80004750 : +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0000c517 auipc x10,0xc +80004764: ae050513 addi x10,x10,-1312 # 80010240 +80004768: 00000013 addi x0,x0,0 +8000476c: 00000013 addi x0,x0,0 +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 0001d097 auipc x1,0x1d +80004784: de4080e7 jalr x1,-540(x1) # 80021564 +80004788: 0001d097 auipc x1,0x1d +8000478c: e3c080e7 jalr x1,-452(x1) # 800215c4 + +80004790 : +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: 00000717 auipc x14,0x0 +800047a4: ff070713 addi x14,x14,-16 # 80004790 +800047a8: 00000013 addi x0,x0,0 +800047ac: 00000013 addi x0,x0,0 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 +800047c0: ce9ff06f jal x0,800044a8 + +800047c4 : +800047c4: bad0e737 lui x14,0xbad0e +800047c8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047cc: cddff06f jal x0,800044a8 +800047d0: 00000013 addi x0,x0,0 +800047d4: 00000013 addi x0,x0,0 +800047d8: 00000013 addi x0,x0,0 +800047dc: 00000013 addi x0,x0,0 +800047e0: 00000013 addi x0,x0,0 +800047e4: 00000013 addi x0,x0,0 +800047e8: 00000013 addi x0,x0,0 +800047ec: 00000013 addi x0,x0,0 +800047f0: 00000013 addi x0,x0,0 +800047f4: 00000013 addi x0,x0,0 +800047f8: 00000013 addi x0,x0,0 +800047fc: 00000013 addi x0,x0,0 + +80004800 : +80004800: 0800006f jal x0,80004880 +80004804: 0880006f jal x0,8000488c +80004808: 0900006f jal x0,80004898 +8000480c: 0980006f jal x0,800048a4 +80004810: 0a00006f jal x0,800048b0 +80004814: 0a80006f jal x0,800048bc +80004818: 0b00006f jal x0,800048c8 +8000481c: 0b80006f jal x0,800048d4 +80004820: 0c00006f jal x0,800048e0 +80004824: 0c80006f jal x0,800048ec +80004828: 0d00006f jal x0,800048f8 +8000482c: 0d80006f jal x0,80004904 +80004830: 0e00006f jal x0,80004910 +80004834: 0e80006f jal x0,8000491c +80004838: 0f00006f jal x0,80004928 +8000483c: 0f80006f jal x0,80004934 +80004840: 1000006f jal x0,80004940 +80004844: 1080006f jal x0,8000494c +80004848: 1100006f jal x0,80004958 +8000484c: 1180006f jal x0,80004964 +80004850: 1200006f jal x0,80004970 +80004854: 1280006f jal x0,8000497c +80004858: 1300006f jal x0,80004988 +8000485c: 1380006f jal x0,80004994 +80004860: 1400006f jal x0,800049a0 +80004864: 13c0006f jal x0,800049a0 +80004868: 1380006f jal x0,800049a0 +8000486c: 1340006f jal x0,800049a0 +80004870: 1300006f jal x0,800049a0 +80004874: 12c0006f jal x0,800049a0 +80004878: 1280006f jal x0,800049a0 +8000487c: 1240006f jal x0,800049a0 + +80004880 : +80004880: 34011173 csrrw x2,mscratch,x2 +80004884: 26f12823 sw x15,624(x2) +80004888: 13c007ef jal x15,800049c4 +8000488c: 34011173 csrrw x2,mscratch,x2 +80004890: 26f12823 sw x15,624(x2) +80004894: 130007ef jal x15,800049c4 +80004898: 34011173 csrrw x2,mscratch,x2 +8000489c: 26f12823 sw x15,624(x2) +800048a0: 124007ef jal x15,800049c4 +800048a4: 34011173 csrrw x2,mscratch,x2 +800048a8: 26f12823 sw x15,624(x2) +800048ac: 118007ef jal x15,800049c4 +800048b0: 34011173 csrrw x2,mscratch,x2 +800048b4: 26f12823 sw x15,624(x2) +800048b8: 10c007ef jal x15,800049c4 +800048bc: 34011173 csrrw x2,mscratch,x2 +800048c0: 26f12823 sw x15,624(x2) +800048c4: 100007ef jal x15,800049c4 +800048c8: 34011173 csrrw x2,mscratch,x2 +800048cc: 26f12823 sw x15,624(x2) +800048d0: 0f4007ef jal x15,800049c4 +800048d4: 34011173 csrrw x2,mscratch,x2 +800048d8: 26f12823 sw x15,624(x2) +800048dc: 0e8007ef jal x15,800049c4 +800048e0: 34011173 csrrw x2,mscratch,x2 +800048e4: 26f12823 sw x15,624(x2) +800048e8: 0dc007ef jal x15,800049c4 +800048ec: 34011173 csrrw x2,mscratch,x2 +800048f0: 26f12823 sw x15,624(x2) +800048f4: 0d0007ef jal x15,800049c4 +800048f8: 34011173 csrrw x2,mscratch,x2 +800048fc: 26f12823 sw x15,624(x2) +80004900: 0c4007ef jal x15,800049c4 +80004904: 34011173 csrrw x2,mscratch,x2 +80004908: 26f12823 sw x15,624(x2) +8000490c: 0b8007ef jal x15,800049c4 +80004910: 34011173 csrrw x2,mscratch,x2 +80004914: 26f12823 sw x15,624(x2) +80004918: 0ac007ef jal x15,800049c4 +8000491c: 34011173 csrrw x2,mscratch,x2 +80004920: 26f12823 sw x15,624(x2) +80004924: 0a0007ef jal x15,800049c4 +80004928: 34011173 csrrw x2,mscratch,x2 +8000492c: 26f12823 sw x15,624(x2) +80004930: 094007ef jal x15,800049c4 +80004934: 34011173 csrrw x2,mscratch,x2 +80004938: 26f12823 sw x15,624(x2) +8000493c: 088007ef jal x15,800049c4 +80004940: 34011173 csrrw x2,mscratch,x2 +80004944: 26f12823 sw x15,624(x2) +80004948: 07c007ef jal x15,800049c4 +8000494c: 34011173 csrrw x2,mscratch,x2 +80004950: 26f12823 sw x15,624(x2) +80004954: 070007ef jal x15,800049c4 +80004958: 34011173 csrrw x2,mscratch,x2 +8000495c: 26f12823 sw x15,624(x2) +80004960: 064007ef jal x15,800049c4 +80004964: 34011173 csrrw x2,mscratch,x2 +80004968: 26f12823 sw x15,624(x2) +8000496c: 058007ef jal x15,800049c4 +80004970: 34011173 csrrw x2,mscratch,x2 +80004974: 26f12823 sw x15,624(x2) +80004978: 04c007ef jal x15,800049c4 +8000497c: 34011173 csrrw x2,mscratch,x2 +80004980: 26f12823 sw x15,624(x2) +80004984: 040007ef jal x15,800049c4 +80004988: 34011173 csrrw x2,mscratch,x2 +8000498c: 26f12823 sw x15,624(x2) +80004990: 034007ef jal x15,800049c4 +80004994: 34011173 csrrw x2,mscratch,x2 +80004998: 26f12823 sw x15,624(x2) +8000499c: 028007ef jal x15,800049c4 + +800049a0 : +800049a0: 00000317 auipc x6,0x0 +800049a4: b6030313 addi x6,x6,-1184 # 80004500 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00030067 jalr x0,0(x6) + +800049c4 : +800049c4: 26e12623 sw x14,620(x2) +800049c8: 34011773 csrrw x14,mscratch,x2 +800049cc: 26e12a23 sw x14,628(x2) +800049d0: 23012703 lw x14,560(x2) +800049d4: 00070067 jalr x0,0(x14) + +800049d8 : +800049d8: 26912423 sw x9,616(x2) +800049dc: 26812223 sw x8,612(x2) +800049e0: 26712023 sw x7,608(x2) +800049e4: 24612e23 sw x6,604(x2) +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 00003317 auipc x6,0x3 +80004a04: 70830313 addi x6,x6,1800 # 80008108 +80004a08: 00000013 addi x0,x0,0 +80004a0c: 00000013 addi x0,x0,0 +80004a10: 00000013 addi x0,x0,0 +80004a14: 00000013 addi x0,x0,0 +80004a18: 00000013 addi x0,x0,0 +80004a1c: 00000013 addi x0,x0,0 +80004a20: 00032383 lw x7,0(x6) +80004a24: 00138393 addi x7,x7,1 +80004a28: 00732023 sw x7,0(x6) +80004a2c: 34202773 csrrs x14,mcause,x0 + +80004a30 : +80004a30: 800014b7 lui x9,0x80001 +80004a34: fff48493 addi x9,x9,-1 # 80000fff +80004a38: 00e4f4b3 and x9,x9,x14 + +80004a3c : +80004a3c: ffe48413 addi x8,x9,-2 +80004a40: 00041663 bne x8,x0,80004a4c + +80004a44 : +80004a44: 280506e3 beq x10,x0,800054d0 +80004a48: 58c0006f jal x0,80004fd4 + +80004a4c : +80004a4c: ff848413 addi x8,x9,-8 +80004a50: 00245413 srli x8,x8,0x2 +80004a54: 58041063 bne x8,x0,80004fd4 + +80004a58 : +80004a58: 26050ce3 beq x10,x0,800054d0 + +80004a5c : +80004a5c: fff50493 addi x9,x10,-1 +80004a60: 00500393 addi x7,x0,5 +80004a64: 0274e063 bltu x9,x7,80004a84 +80004a68: 07300393 addi x7,x0,115 +80004a6c: 00750463 beq x10,x7,80004a74 +80004a70: 0800006f jal x0,80004af0 + +80004a74 : +80004a74: 34102573 csrrs x10,mepc,x0 +80004a78: 00450413 addi x8,x10,4 +80004a7c: 34141073 csrrw x0,mepc,x8 +80004a80: 7c00006f jal x0,80005240 + +80004a84 : +80004a84: 341024f3 csrrs x9,mepc,x0 +80004a88: 00448493 addi x9,x9,4 +80004a8c: 34149073 csrrw x0,mepc,x9 +80004a90: 00100393 addi x7,x0,1 +80004a94: 00750e63 beq x10,x7,80004ab0 +80004a98: 00200393 addi x7,x0,2 +80004a9c: 02750263 beq x10,x7,80004ac0 +80004aa0: 00300393 addi x7,x0,3 +80004aa4: 02750c63 beq x10,x7,80004adc +80004aa8: fff00513 addi x10,x0,-1 +80004aac: 7940006f jal x0,80005240 + +80004ab0 : +80004ab0: 000024b7 lui x9,0x2 +80004ab4: 80048493 addi x9,x9,-2048 # 1800 +80004ab8: 3004a073 csrrs x0,mstatus,x9 +80004abc: 7840006f jal x0,80005240 + +80004ac0 : +80004ac0: 000024b7 lui x9,0x2 +80004ac4: 80048493 addi x9,x9,-2048 # 1800 +80004ac8: 3004b073 csrrc x0,mstatus,x9 +80004acc: 000014b7 lui x9,0x1 +80004ad0: 80048493 addi x9,x9,-2048 # 800 +80004ad4: 3004a073 csrrs x0,mstatus,x9 +80004ad8: 7680006f jal x0,80005240 + +80004adc : +80004adc: 000024b7 lui x9,0x2 +80004ae0: 80048493 addi x9,x9,-2048 # 1800 +80004ae4: 3004b073 csrrc x0,mstatus,x9 +80004ae8: 7580006f jal x0,80005240 + +80004aec : +80004aec: 00000013 addi x0,x0,0 + +80004af0 : +80004af0: 00000013 addi x0,x0,0 +80004af4: 00000013 addi x0,x0,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000397 auipc x7,0x0 +80004b04: 17038393 addi x7,x7,368 # 80004c70 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 + +80004b20 : +80004b20: 0003a403 lw x8,0(x7) +80004b24: 00a40863 beq x8,x10,80004b34 +80004b28: 04040863 beq x8,x0,80004b78 +80004b2c: 00838393 addi x7,x7,8 +80004b30: ff1ff06f jal x0,80004b20 + +80004b34 : +80004b34: 00008493 addi x9,x1,0 +80004b38: 00000013 addi x0,x0,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 00000097 auipc x1,0x0 +80004b44: 02408093 addi x1,x1,36 # 80004b64 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 00038067 jalr x0,0(x7) + +80004b64 : +80004b64: 00048093 addi x1,x9,0 +80004b68: 34102473 csrrs x8,mepc,x0 +80004b6c: 00440413 addi x8,x8,4 +80004b70: 34141073 csrrw x0,mepc,x8 +80004b74: 6cc0006f jal x0,80005240 + +80004b78 : +80004b78: 00050493 addi x9,x10,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000d517 auipc x10,0xd +80004b84: d3d50513 addi x10,x10,-707 # 800118bd +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00048513 addi x10,x9,0 +80004bac: 02000593 addi x11,x0,32 +80004bb0: 4a8020ef jal x1,80007058 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 16850513 addi x10,x10,360 # 8000fd28 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 74450513 addi x10,x10,1860 # 80010344 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 00000013 addi x0,x0,0 +80004c2c: 00000013 addi x0,x0,0 +80004c30: 00000013 addi x0,x0,0 +80004c34: 00000013 addi x0,x0,0 +80004c38: 00000013 addi x0,x0,0 +80004c3c: 00000013 addi x0,x0,0 +80004c40: 0000b517 auipc x10,0xb +80004c44: 60050513 addi x10,x10,1536 # 80010240 +80004c48: 00000013 addi x0,x0,0 +80004c4c: 00000013 addi x0,x0,0 +80004c50: 00000013 addi x0,x0,0 +80004c54: 00000013 addi x0,x0,0 +80004c58: 00000013 addi x0,x0,0 +80004c5c: 00000013 addi x0,x0,0 +80004c60: 0001d097 auipc x1,0x1d +80004c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80004c68: 0001d097 auipc x1,0x1d +80004c6c: 95c080e7 jalr x1,-1700(x1) # 800215c4 + +80004c70 : +80004c70: 30002573 .word 0x30002573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30059073 .word 0x30059073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3005a073 .word 0x3005a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3005b073 .word 0x3005b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30402573 .word 0x30402573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30459073 .word 0x30459073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 3045a073 .word 0x3045a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 3045b073 .word 0x3045b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 30602573 .word 0x30602573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 30659073 .word 0x30659073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3065a073 .word 0x3065a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3065b073 .word 0x3065b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 30a02573 .word 0x30a02573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 30a59073 .word 0x30a59073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 30a5a073 .word 0x30a5a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 30a5b073 .word 0x30a5b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 34402573 .word 0x34402573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 34459073 .word 0x34459073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3445a073 .word 0x3445a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3445b073 .word 0x3445b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: 74702573 .word 0x74702573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: 74759073 .word 0x74759073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: 7475a073 .word 0x7475a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: 7475b073 .word 0x7475b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: 32002573 .word 0x32002573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: 32059073 .word 0x32059073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: 3205a073 .word 0x3205a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: 3205b073 .word 0x3205b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: b0002573 .word 0xb0002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: b0059073 .word 0xb0059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: b005a073 .word 0xb005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: b005b073 .word 0xb005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: b0202573 .word 0xb0202573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: b0259073 .word 0xb0259073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: b025a073 .word 0xb025a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: b025b073 .word 0xb025b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10002573 .word 0x10002573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10059073 .word 0x10059073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1005a073 .word 0x1005a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1005b073 .word 0x1005b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10402573 .word 0x10402573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10459073 .word 0x10459073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 1045a073 .word 0x1045a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 1045b073 .word 0x1045b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 10602573 .word 0x10602573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 10659073 .word 0x10659073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1065a073 .word 0x1065a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1065b073 .word 0x1065b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 10a02573 .word 0x10a02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 10a59073 .word 0x10a59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 10a5a073 .word 0x10a5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 10a5b073 .word 0x10a5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 14402573 .word 0x14402573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 14459073 .word 0x14459073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1445a073 .word 0x1445a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1445b073 .word 0x1445b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 14d02573 .word 0x14d02573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 14d59073 .word 0x14d59073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 14d5a073 .word 0x14d5a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 14d5b073 .word 0x14d5b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 18002573 .word 0x18002573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 18059073 .word 0x18059073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 1805a073 .word 0x1805a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 1805b073 .word 0x1805b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a002573 .word 0x7a002573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a059073 .word 0x7a059073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a05a073 .word 0x7a05a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a05b073 .word 0x7a05b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a102573 .word 0x7a102573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a159073 .word 0x7a159073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a15a073 .word 0x7a15a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a15b073 .word 0x7a15b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a202573 .word 0x7a202573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a259073 .word 0x7a259073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a25a073 .word 0x7a25a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a25b073 .word 0x7a25b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a302573 .word 0x7a302573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a359073 .word 0x7a359073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a35a073 .word 0x7a35a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a35b073 .word 0x7a35b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a402573 .word 0x7a402573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a459073 .word 0x7a459073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a45a073 .word 0x7a45a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a45b073 .word 0x7a45b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7a502573 .word 0x7a502573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7a559073 .word 0x7a559073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7a55a073 .word 0x7a55a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7a55b073 .word 0x7a55b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 7a802573 .word 0x7a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 7a859073 .word 0x7a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 7a85a073 .word 0x7a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 7a85b073 .word 0x7a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 7aa02573 .word 0x7aa02573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 7aa59073 .word 0x7aa59073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 7aa5a073 .word 0x7aa5a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 7aa5b073 .word 0x7aa5b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 5a802573 .word 0x5a802573 +80004f74: 00008067 jalr x0,0(x1) +80004f78: 5a859073 .word 0x5a859073 +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 5a85a073 .word 0x5a85a073 +80004f84: 00008067 jalr x0,0(x1) +80004f88: 5a85b073 .word 0x5a85b073 +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 6a802573 .word 0x6a802573 +80004f94: 00008067 jalr x0,0(x1) +80004f98: 6a859073 .word 0x6a859073 +80004f9c: 00008067 jalr x0,0(x1) +80004fa0: 6a85a073 .word 0x6a85a073 +80004fa4: 00008067 jalr x0,0(x1) +80004fa8: 6a85b073 .word 0x6a85b073 +80004fac: 00008067 jalr x0,0(x1) +80004fb0: 0005a503 lw x10,0(x11) +80004fb4: 00008067 jalr x0,0(x1) +80004fb8: 0045a503 lw x10,4(x11) +80004fbc: 00008067 jalr x0,0(x1) +80004fc0: 00c5a023 sw x12,0(x11) +80004fc4: 00008067 jalr x0,0(x1) +80004fc8: 00c5a223 sw x12,4(x11) +80004fcc: 00008067 jalr x0,0(x1) +80004fd0: 00000000 .word 0x00000000 + +80004fd4 : +80004fd4: 01000393 addi x7,x0,16 +80004fd8: 00075c63 bge x14,x0,80004ff0 + +80004fdc : +80004fdc: 00171413 slli x8,x14,0x1 +80004fe0: ff240413 addi x8,x8,-14 +80004fe4: 00045663 bge x8,x0,80004ff0 +80004fe8: 00c00393 addi x7,x0,12 +80004fec: 0040006f jal x0,80004ff0 + +80004ff0 : +80004ff0: d6810113 addi x2,x2,-664 +80004ff4: 4b012303 lw x6,1200(x2) +80004ff8: 007304b3 add x9,x6,x7 +80004ffc: 4a912823 sw x9,1200(x2) +80005000: 49012403 lw x8,1168(x2) +80005004: 40830333 sub x6,x6,x8 +80005008: 29810113 addi x2,x2,664 +8000500c: 1f812403 lw x8,504(x2) +80005010: 00830333 add x6,x6,x8 +80005014: 34102473 csrrs x8,mepc,x0 +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0000b497 auipc x9,0xb +80005024: ce848493 addi x9,x9,-792 # 8000fd08 +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 0084a023 sw x8,0(x9) +80005044: 00e4a423 sw x14,8(x9) +80005048: 34302473 csrrs x8,mtval,x0 +8000504c: 0084a823 sw x8,16(x9) +80005050: 30002473 csrrs x8,mstatus,x0 +80005054: 0084ac23 sw x8,24(x9) +80005058: 00000013 addi x0,x0,0 +8000505c: 00000013 addi x0,x0,0 +80005060: 0001c417 auipc x8,0x1c +80005064: 96c40413 addi x8,x8,-1684 # 800209cc +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 007304b3 add x9,x6,x7 +80005084: f0946663 bltu x8,x9,80004790 + +80005088 : +80005088: 24012403 lw x8,576(x2) +8000508c: 408787b3 sub x15,x15,x8 +80005090: 00179493 slli x9,x15,0x1 +80005094: 009787b3 add x15,x15,x9 +80005098: 0057d793 srli x15,x15,0x5 +8000509c: 00679793 slli x15,x15,0x6 +800050a0: 0077e7b3 or x15,x15,x7 +800050a4: 00378793 addi x15,x15,3 +800050a8: 02075a63 bge x14,x0,800050dc +800050ac: 00f00413 addi x8,x0,15 +800050b0: 00877433 and x8,x14,x8 +800050b4: 304024f3 csrrs x9,mie,x0 +800050b8: 0084d4b3 srl x9,x9,x8 +800050bc: 0014f493 andi x9,x9,1 +800050c0: 00b49493 slli x9,x9,0xb +800050c4: 0097e7b3 or x15,x15,x9 +800050c8: 344024f3 csrrs x9,mip,x0 +800050cc: 0084d4b3 srl x9,x9,x8 +800050d0: 0014f493 andi x9,x9,1 +800050d4: 00c49493 slli x9,x9,0xc +800050d8: 0097e7b3 or x15,x15,x9 +800050dc: 300023f3 csrrs x7,mstatus,x0 +800050e0: 00f39393 slli x7,x7,0xf +800050e4: 0023d393 srli x7,x7,0x2 +800050e8: 0021a437 lui x8,0x21a +800050ec: fe540413 addi x8,x8,-27 # 219fe5 +800050f0: fff44413 xori x8,x8,-1 +800050f4: 0083f433 and x8,x7,x8 +800050f8: 0087e433 or x8,x15,x8 +800050fc: 310024f3 csrrs x9,0x310,x0 +80005100: 1c04f493 andi x9,x9,448 +80005104: 00849493 slli x9,x9,0x8 +80005108: 00946433 or x8,x8,x9 +8000510c: 00032483 lw x9,0(x6) +80005110: 00848e63 beq x9,x8,8000512c +80005114: 00040313 addi x6,x8,0 +80005118: 00048213 addi x4,x9,0 +8000511c: 48c003ef jal x7,800055a8 +80005120: 80005088 .word 0x80005088 +80005124: 80010446 .word 0x80010446 +80005128: 00000341 .word 0x00000341 + +8000512c : +8000512c: 00070413 addi x8,x14,0 +80005130: 00432483 lw x9,4(x6) +80005134: 00848e63 beq x9,x8,80005150 +80005138: 00040313 addi x6,x8,0 +8000513c: 00048213 addi x4,x9,0 +80005140: 468003ef jal x7,800055a8 +80005144: 8000512c .word 0x8000512c +80005148: 80010548 .word 0x80010548 +8000514c: 00000341 .word 0x00000341 +80005150: 10074863 blt x14,x0,80005260 + +80005154 : +80005154: 34102473 csrrs x8,mepc,x0 +80005158: 00010493 addi x9,x2,0 +8000515c: 0040006f jal x0,80005160 + +80005160 : +80005160: 08000393 addi x7,x0,128 +80005164: 04740863 beq x8,x7,800051b4 +80005168: 00238393 addi x7,x7,2 +8000516c: 04740463 beq x8,x7,800051b4 +80005170: 04040263 beq x8,x0,800051b4 +80005174: 2084a383 lw x7,520(x9) +80005178: 2104a783 lw x15,528(x9) +8000517c: 007787b3 add x15,x15,x7 +80005180: 00f47463 bgeu x8,x15,80005188 +80005184: 02747663 bgeu x8,x7,800051b0 + +80005188 : +80005188: 1d84a383 lw x7,472(x9) +8000518c: 1e04a783 lw x15,480(x9) +80005190: 007787b3 add x15,x15,x7 +80005194: 00f47463 bgeu x8,x15,8000519c +80005198: 00747c63 bgeu x8,x7,800051b0 + +8000519c : +8000519c: 1e84a383 lw x7,488(x9) +800051a0: 1f04a783 lw x15,496(x9) +800051a4: 007787b3 add x15,x15,x7 +800051a8: e0f47e63 bgeu x8,x15,800047c4 +800051ac: e0746c63 bltu x8,x7,800047c4 + +800051b0 : +800051b0: 40740433 sub x8,x8,x7 + +800051b4 : +800051b4: 00832483 lw x9,8(x6) +800051b8: 00848e63 beq x9,x8,800051d4 +800051bc: 00040313 addi x6,x8,0 +800051c0: 00048213 addi x4,x9,0 +800051c4: 3e4003ef jal x7,800055a8 +800051c8: 800051b4 .word 0x800051b4 +800051cc: 80010643 .word 0x80010643 +800051d0: 00000341 .word 0x00000341 + +800051d4 : +800051d4: 34102473 csrrs x8,mepc,x0 +800051d8: 342023f3 csrrs x7,mcause,x0 +800051dc: 00c00793 addi x15,x0,12 +800051e0: 00f38a63 beq x7,x15,800051f4 +800051e4: 00100793 addi x15,x0,1 +800051e8: 00f38663 beq x7,x15,800051f4 +800051ec: 01400793 addi x15,x0,20 +800051f0: 00f39663 bne x7,x15,800051fc +800051f4: 34109073 csrrw x0,mepc,x1 +800051f8: 0100006f jal x0,80005208 + +800051fc : +800051fc: 00400393 addi x7,x0,4 +80005200: 00740433 add x8,x8,x7 +80005204: 34141073 csrrw x0,mepc,x8 + +80005208 : +80005208: 34302473 csrrs x8,mtval,x0 + +8000520c : +8000520c: 00c32483 lw x9,12(x6) +80005210: 00848e63 beq x9,x8,8000522c +80005214: 00040313 addi x6,x8,0 +80005218: 00048213 addi x4,x9,0 +8000521c: 38c003ef jal x7,800055a8 +80005220: 8000520c .word 0x8000520c +80005224: 80010736 .word 0x80010736 +80005228: 00000341 .word 0x00000341 + +8000522c : +8000522c: 30102473 csrrs x8,misa,x0 +80005230: 01841413 slli x8,x8,0x18 +80005234: 00045263 bge x8,x0,80005238 + +80005238 : +80005238: 10000393 addi x7,x0,256 +8000523c: 05c0006f jal x0,80005298 + +80005240 : +80005240: 25c12303 lw x6,604(x2) +80005244: 26012383 lw x7,608(x2) +80005248: 26412403 lw x8,612(x2) +8000524c: 26812483 lw x9,616(x2) +80005250: 26c12703 lw x14,620(x2) +80005254: 27012783 lw x15,624(x2) +80005258: 27412103 lw x2,628(x2) +8000525c: 30200073 mret + +80005260 : +80005260: 00100413 addi x8,x0,1 +80005264: 01f77393 andi x7,x14,31 +80005268: 00741433 sll x8,x8,x7 +8000526c: 304434f3 csrrc x9,mie,x8 +80005270: 34443473 csrrc x8,mip,x8 + +80005274 : +80005274: 00832483 lw x9,8(x6) +80005278: 00848e63 beq x9,x8,80005294 +8000527c: 00040313 addi x6,x8,0 +80005280: 00048213 addi x4,x9,0 +80005284: 324003ef jal x7,800055a8 +80005288: 80005274 .word 0x80005274 +8000528c: 800108a9 .word 0x800108a9 +80005290: 00000341 .word 0x00000341 +80005294: 00000393 addi x7,x0,0 + +80005298 : +80005298: 00000417 auipc x8,0x0 +8000529c: 03c40413 addi x8,x8,60 # 800052d4 +800052a0: 00740433 add x8,x8,x7 +800052a4: 00371393 slli x7,x14,0x3 +800052a8: 00740433 add x8,x8,x7 +800052ac: ff847413 andi x8,x8,-8 +800052b0: 00042403 lw x8,0(x8) + +800052b4 : +800052b4: 00040a63 beq x8,x0,800052c8 +800052b8: 01f41393 slli x7,x8,0x1f +800052bc: 0003d863 bge x7,x0,800052cc +800052c0: 00145413 srli x8,x8,0x1 +800052c4: f6870ee3 beq x14,x8,80005240 +800052c8: cfcff06f jal x0,800047c4 + +800052cc : +800052cc: 00040067 jalr x0,0(x8) + +800052d0 : + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021000 .word 0x80021000 + ... +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 80021014 .word 0x80021014 + ... +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 80021030 .word 0x80021030 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 +8000534c: 00000000 .word 0x00000000 +80005350: 00000001 .word 0x00000001 +80005354: 00000000 .word 0x00000000 +80005358: 00000001 .word 0x00000001 +8000535c: 00000000 .word 0x00000000 +80005360: 00000001 .word 0x00000001 +80005364: 00000000 .word 0x00000000 +80005368: 00000001 .word 0x00000001 +8000536c: 00000000 .word 0x00000000 +80005370: 00000001 .word 0x00000001 +80005374: 00000000 .word 0x00000000 +80005378: 00000001 .word 0x00000001 +8000537c: 00000000 .word 0x00000000 +80005380: 00000001 .word 0x00000001 +80005384: 00000000 .word 0x00000000 +80005388: 00000001 .word 0x00000001 + ... + +800053d0 : +800053d0: 00000001 .word 0x00000001 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000003 .word 0x00000003 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000005 .word 0x00000005 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000007 .word 0x00000007 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000009 .word 0x00000009 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000000b .word 0x0000000b +800053fc: 00000000 .word 0x00000000 +80005400: 0000000d .word 0x0000000d +80005404: 00000000 .word 0x00000000 +80005408: 0000000f .word 0x0000000f +8000540c: 00000000 .word 0x00000000 +80005410: 00000011 .word 0x00000011 +80005414: 00000000 .word 0x00000000 +80005418: 00000013 .word 0x00000013 +8000541c: 00000000 .word 0x00000000 +80005420: 00000015 .word 0x00000015 +80005424: 00000000 .word 0x00000000 +80005428: 00000017 .word 0x00000017 +8000542c: 00000000 .word 0x00000000 +80005430: 00000019 .word 0x00000019 +80005434: 00000000 .word 0x00000000 +80005438: 0000001b .word 0x0000001b +8000543c: 00000000 .word 0x00000000 +80005440: 0000001d .word 0x0000001d +80005444: 00000000 .word 0x00000000 +80005448: 0000001f .word 0x0000001f +8000544c: 00000000 .word 0x00000000 +80005450: 00000021 .word 0x00000021 +80005454: 00000000 .word 0x00000000 +80005458: 00000023 .word 0x00000023 +8000545c: 00000000 .word 0x00000000 +80005460: 00000025 .word 0x00000025 +80005464: 00000000 .word 0x00000000 +80005468: 00000027 .word 0x00000027 +8000546c: 00000000 .word 0x00000000 +80005470: 00000029 .word 0x00000029 +80005474: 00000000 .word 0x00000000 +80005478: 0000002b .word 0x0000002b +8000547c: 00000000 .word 0x00000000 +80005480: 0000002d .word 0x0000002d +80005484: 00000000 .word 0x00000000 +80005488: 0000002f .word 0x0000002f + ... + +800054d0 : +800054d0: 300023f3 csrrs x7,mstatus,x0 +800054d4: 00b3d493 srli x9,x7,0xb +800054d8: 0034f493 andi x9,x9,3 +800054dc: ffd48413 addi x8,x9,-3 +800054e0: 341023f3 csrrs x7,mepc,x0 +800054e4: 00000493 addi x9,x0,0 +800054e8: 02040c63 beq x8,x0,80005520 +800054ec: 29810113 addi x2,x2,664 +800054f0: 310023f3 csrrs x7,0x310,x0 +800054f4: 01839393 slli x7,x7,0x18 +800054f8: 0003da63 bge x7,x0,8000550c + +800054fc : +800054fc: 29810113 addi x2,x2,664 +80005500: 47012783 lw x15,1136(x2) +80005504: d6810113 addi x2,x2,-664 +80005508: 0080006f jal x0,80005510 + +8000550c : +8000550c: f4012783 lw x15,-192(x2) +80005510: 341023f3 csrrs x7,mepc,x0 +80005514: 40f383b3 sub x7,x7,x15 +80005518: d6810113 addi x2,x2,-664 +8000551c: 1d812483 lw x9,472(x2) + +80005520 : +80005520: 007483b3 add x7,x9,x7 +80005524: 25c12303 lw x6,604(x2) +80005528: 26412403 lw x8,612(x2) +8000552c: 26812483 lw x9,616(x2) +80005530: 26c12703 lw x14,620(x2) +80005534: 27012783 lw x15,624(x2) +80005538: 27412103 lw x2,628(x2) +8000553c: 00438067 jalr x0,4(x7) + +80005540 : +80005540: 0000a217 auipc x4,0xa +80005544: 68020213 addi x4,x4,1664 # 8000fbc0 +80005548: 02522423 sw x5,40(x4) # 28 +8000554c: 00122423 sw x1,8(x4) # 8 +80005550: 00022023 sw x0,0(x4) # 0 +80005554: 0880006f jal x0,800055dc + +80005558 : +80005558: 0000a397 auipc x7,0xa +8000555c: 66838393 addi x7,x7,1640 # 8000fbc0 +80005560: 0483a023 sw x8,64(x7) +80005564: 0243a023 sw x4,32(x7) +80005568: 0253a423 sw x5,40(x7) +8000556c: 0013a423 sw x1,8(x7) +80005570: 0003a023 sw x0,0(x7) +80005574: 00038213 addi x4,x7,0 +80005578: 00040293 addi x5,x8,0 +8000557c: 0600006f jal x0,800055dc + +80005580 : +80005580: 0000a697 auipc x13,0xa +80005584: 64068693 addi x13,x13,1600 # 8000fbc0 +80005588: 06e6a823 sw x14,112(x13) +8000558c: 0246a023 sw x4,32(x13) +80005590: 0256a423 sw x5,40(x13) +80005594: 0016a423 sw x1,8(x13) +80005598: 0006a023 sw x0,0(x13) +8000559c: 00068213 addi x4,x13,0 +800055a0: 00070293 addi x5,x14,0 +800055a4: 0380006f jal x0,800055dc + +800055a8 : +800055a8: 0000a497 auipc x9,0xa +800055ac: 61848493 addi x9,x9,1560 # 8000fbc0 +800055b0: 0674a423 sw x7,104(x9) +800055b4: 0244a023 sw x4,32(x9) +800055b8: 0254a423 sw x5,40(x9) +800055bc: 0014a423 sw x1,8(x9) +800055c0: 00300093 addi x1,x0,3 +800055c4: 0014a023 sw x1,0(x9) +800055c8: 1064a823 sw x6,272(x9) +800055cc: 1044ac23 sw x4,280(x9) +800055d0: 00048213 addi x4,x9,0 +800055d4: 00038293 addi x5,x7,0 +800055d8: 0040006f jal x0,800055dc + +800055dc : +800055dc: 00222823 sw x2,16(x4) # 10 +800055e0: 00322c23 sw x3,24(x4) # 18 +800055e4: 02622823 sw x6,48(x4) # 30 +800055e8: 02722c23 sw x7,56(x4) # 38 +800055ec: 04822023 sw x8,64(x4) # 40 +800055f0: 04922423 sw x9,72(x4) # 48 +800055f4: 04a22823 sw x10,80(x4) # 50 +800055f8: 04b22c23 sw x11,88(x4) # 58 +800055fc: 06c22023 sw x12,96(x4) # 60 +80005600: 06d22423 sw x13,104(x4) # 68 +80005604: 06e22823 sw x14,112(x4) # 70 +80005608: 06f22c23 sw x15,120(x4) # 78 +8000560c: 09022023 sw x16,128(x4) # 80 +80005610: 09122423 sw x17,136(x4) # 88 +80005614: 09222823 sw x18,144(x4) # 90 +80005618: 09322c23 sw x19,152(x4) # 98 +8000561c: 0b422023 sw x20,160(x4) # a0 +80005620: 0b522423 sw x21,168(x4) # a8 +80005624: 0b622823 sw x22,176(x4) # b0 +80005628: 0b722c23 sw x23,184(x4) # b8 +8000562c: 0d822023 sw x24,192(x4) # c0 +80005630: 0d922423 sw x25,200(x4) # c8 +80005634: 0da22823 sw x26,208(x4) # d0 +80005638: 0db22c23 sw x27,216(x4) # d8 +8000563c: 0fc22023 sw x28,224(x4) # e0 +80005640: 0fd22423 sw x29,232(x4) # e8 +80005644: 0fe22823 sw x30,240(x4) # f0 +80005648: 0ff22c23 sw x31,248(x4) # f8 + +8000564c : +8000564c: 0000a497 auipc x9,0xa +80005650: 5744a483 lw x9,1396(x9) # 8000fbc0 +80005654: 00300513 addi x10,x0,3 +80005658: 18a48a63 beq x9,x10,800057ec + +8000565c : +8000565c: ffa2d303 lhu x6,-6(x5) +80005660: ff82d383 lhu x7,-8(x5) +80005664: 01031313 slli x6,x6,0x10 +80005668: 00736333 or x6,x6,x7 +8000566c: 00f35393 srli x7,x6,0xf +80005670: 01f3f393 andi x7,x7,31 +80005674: 01435413 srli x8,x6,0x14 +80005678: 01f47413 andi x8,x8,31 +8000567c: 10822223 sw x8,260(x4) # 104 +80005680: 00341313 slli x6,x8,0x3 +80005684: 00620333 add x6,x4,x6 +80005688: 00032303 lw x6,0(x6) +8000568c: 10622823 sw x6,272(x4) # 110 +80005690: ff62d303 lhu x6,-10(x5) +80005694: ff42d383 lhu x7,-12(x5) +80005698: 01031313 slli x6,x6,0x10 +8000569c: 00736333 or x6,x6,x7 +800056a0: 00030513 addi x10,x6,0 +800056a4: 07f37413 andi x8,x6,127 +800056a8: 00300493 addi x9,x0,3 +800056ac: 0c941463 bne x8,x9,80005774 +800056b0: 00c35413 srli x8,x6,0xc +800056b4: 00747413 andi x8,x8,7 +800056b8: 00200493 addi x9,x0,2 +800056bc: 0a941c63 bne x8,x9,80005774 +800056c0: 41435393 srai x7,x6,0x14 +800056c4: 00f35313 srli x6,x6,0xf +800056c8: 01f37313 andi x6,x6,31 +800056cc: 00331313 slli x6,x6,0x3 +800056d0: 00620333 add x6,x4,x6 +800056d4: 00032303 lw x6,0(x6) +800056d8: 00730333 add x6,x6,x7 +800056dc: 00337413 andi x8,x6,3 +800056e0: 0c041663 bne x8,x0,800057ac +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0000c417 auipc x8,0xc +80005704: 21040413 addi x8,x8,528 # 80011910 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 08836663 bltu x6,x8,800057ac +80005724: 00000013 addi x0,x0,0 +80005728: 00000013 addi x0,x0,0 +8000572c: 00000013 addi x0,x0,0 +80005730: 00000013 addi x0,x0,0 +80005734: 00000013 addi x0,x0,0 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0001b417 auipc x8,0x1b +80005744: 29040413 addi x8,x8,656 # 800209d0 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: ffc40413 addi x8,x8,-4 +80005764: 04646463 bltu x8,x6,800057ac +80005768: 00032303 lw x6,0(x6) +8000576c: 10622c23 sw x6,280(x4) # 118 +80005770: 3700006f jal x0,80005ae0 + +80005774 : +80005774: 00100413 addi x8,x0,1 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 56848493 addi x9,x9,1384 # 8000fce8 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10a22c23 sw x10,280(x4) # 118 +800057a8: 3380006f jal x0,80005ae0 + +800057ac : +800057ac: 00200413 addi x8,x0,2 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 0000a497 auipc x9,0xa +800057c4: 52848493 addi x9,x9,1320 # 8000fce8 +800057c8: 00000013 addi x0,x0,0 +800057cc: 00000013 addi x0,x0,0 +800057d0: 00000013 addi x0,x0,0 +800057d4: 00000013 addi x0,x0,0 +800057d8: 00000013 addi x0,x0,0 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0084a023 sw x8,0(x9) +800057e4: 10622c23 sw x6,280(x4) # 118 +800057e8: 2f80006f jal x0,80005ae0 + +800057ec : +800057ec: 0042a303 lw x6,4(x5) +800057f0: 0000a817 auipc x16,0xa +800057f4: 50880813 addi x16,x16,1288 # 8000fcf8 +800057f8: 00682023 sw x6,0(x16) +800057fc: 0002a303 lw x6,0(x5) +80005800: 10622423 sw x6,264(x4) # 108 +80005804: 0000a817 auipc x16,0xa +80005808: 4f480813 addi x16,x16,1268 # 8000fcf8 +8000580c: 00082303 lw x6,0(x16) +80005810: 0000b397 auipc x7,0xb +80005814: c1f38393 addi x7,x7,-993 # 8001042f +80005818: 28730463 beq x6,x7,80005aa0 +8000581c: 00000413 addi x8,x0,0 +80005820: 0000a817 auipc x16,0xa +80005824: 4d080813 addi x16,x16,1232 # 8000fcf0 +80005828: 00882023 sw x8,0(x16) +8000582c: 0000b397 auipc x7,0xb +80005830: c1a38393 addi x7,x7,-998 # 80010446 +80005834: 00731863 bne x6,x7,80005844 +80005838: 00100413 addi x8,x0,1 +8000583c: 00000493 addi x9,x0,0 +80005840: 2740006f jal x0,80005ab4 +80005844: 0000b397 auipc x7,0xb +80005848: d0438393 addi x7,x7,-764 # 80010548 +8000584c: 00731863 bne x6,x7,8000585c +80005850: 00200413 addi x8,x0,2 +80005854: 00000493 addi x9,x0,0 +80005858: 25c0006f jal x0,80005ab4 +8000585c: 0000b397 auipc x7,0xb +80005860: de738393 addi x7,x7,-537 # 80010643 +80005864: 00731863 bne x6,x7,80005874 +80005868: 00300413 addi x8,x0,3 +8000586c: 00000493 addi x9,x0,0 +80005870: 2440006f jal x0,80005ab4 +80005874: 0000b397 auipc x7,0xb +80005878: ec238393 addi x7,x7,-318 # 80010736 +8000587c: 00731863 bne x6,x7,8000588c +80005880: 00400413 addi x8,x0,4 +80005884: 00000493 addi x9,x0,0 +80005888: 22c0006f jal x0,80005ab4 +8000588c: 0000b397 auipc x7,0xb +80005890: 01d38393 addi x7,x7,29 # 800108a9 +80005894: 00731863 bne x6,x7,800058a4 +80005898: 00500413 addi x8,x0,5 +8000589c: 00000493 addi x9,x0,0 +800058a0: 2140006f jal x0,80005ab4 +800058a4: 0000b397 auipc x7,0xb +800058a8: f8938393 addi x7,x7,-119 # 8001082d +800058ac: 00731863 bne x6,x7,800058bc +800058b0: 00600413 addi x8,x0,6 +800058b4: 00000493 addi x9,x0,0 +800058b8: 1fc0006f jal x0,80005ab4 +800058bc: 0000b397 auipc x7,0xb +800058c0: faf38393 addi x7,x7,-81 # 8001086b +800058c4: 00731863 bne x6,x7,800058d4 +800058c8: 00700413 addi x8,x0,7 +800058cc: 00000493 addi x9,x0,0 +800058d0: 1e40006f jal x0,80005ab4 +800058d4: 0000b397 auipc x7,0xb +800058d8: bb238393 addi x7,x7,-1102 # 80010486 +800058dc: 00731863 bne x6,x7,800058ec +800058e0: 00100413 addi x8,x0,1 +800058e4: 00100493 addi x9,x0,1 +800058e8: 1cc0006f jal x0,80005ab4 +800058ec: 0000b397 auipc x7,0xb +800058f0: c9a38393 addi x7,x7,-870 # 80010586 +800058f4: 00731863 bne x6,x7,80005904 +800058f8: 00200413 addi x8,x0,2 +800058fc: 00100493 addi x9,x0,1 +80005900: 1b40006f jal x0,80005ab4 +80005904: 0000b397 auipc x7,0xb +80005908: d7b38393 addi x7,x7,-645 # 8001067f +8000590c: 00731863 bne x6,x7,8000591c +80005910: 00300413 addi x8,x0,3 +80005914: 00100493 addi x9,x0,1 +80005918: 19c0006f jal x0,80005ab4 +8000591c: 0000b397 auipc x7,0xb +80005920: e5738393 addi x7,x7,-425 # 80010773 +80005924: 00731863 bne x6,x7,80005934 +80005928: 00400413 addi x8,x0,4 +8000592c: 00100493 addi x9,x0,1 +80005930: 1840006f jal x0,80005ab4 +80005934: 0000b397 auipc x7,0xb +80005938: fb038393 addi x7,x7,-80 # 800108e4 +8000593c: 00731863 bne x6,x7,8000594c +80005940: 00500413 addi x8,x0,5 +80005944: 00100493 addi x9,x0,1 +80005948: 16c0006f jal x0,80005ab4 +8000594c: 0000b397 auipc x7,0xb +80005950: b7a38393 addi x7,x7,-1158 # 800104c6 +80005954: 00731863 bne x6,x7,80005964 +80005958: 00100413 addi x8,x0,1 +8000595c: 00200493 addi x9,x0,2 +80005960: 1540006f jal x0,80005ab4 +80005964: 0000b397 auipc x7,0xb +80005968: c6038393 addi x7,x7,-928 # 800105c4 +8000596c: 00731863 bne x6,x7,8000597c +80005970: 00200413 addi x8,x0,2 +80005974: 00200493 addi x9,x0,2 +80005978: 13c0006f jal x0,80005ab4 +8000597c: 0000b397 auipc x7,0xb +80005980: d3f38393 addi x7,x7,-705 # 800106bb +80005984: 00731863 bne x6,x7,80005994 +80005988: 00300413 addi x8,x0,3 +8000598c: 00200493 addi x9,x0,2 +80005990: 1240006f jal x0,80005ab4 +80005994: 0000b397 auipc x7,0xb +80005998: e1c38393 addi x7,x7,-484 # 800107b0 +8000599c: 00731863 bne x6,x7,800059ac +800059a0: 00400413 addi x8,x0,4 +800059a4: 00200493 addi x9,x0,2 +800059a8: 10c0006f jal x0,80005ab4 +800059ac: 0000b397 auipc x7,0xb +800059b0: f7338393 addi x7,x7,-141 # 8001091f +800059b4: 00731863 bne x6,x7,800059c4 +800059b8: 00500413 addi x8,x0,5 +800059bc: 00200493 addi x9,x0,2 +800059c0: 0f40006f jal x0,80005ab4 +800059c4: 0000b397 auipc x7,0xb +800059c8: b4338393 addi x7,x7,-1213 # 80010507 +800059cc: 00731863 bne x6,x7,800059dc +800059d0: 00100413 addi x8,x0,1 +800059d4: 00300493 addi x9,x0,3 +800059d8: 0dc0006f jal x0,80005ab4 +800059dc: 0000b397 auipc x7,0xb +800059e0: c2738393 addi x7,x7,-985 # 80010603 +800059e4: 00731863 bne x6,x7,800059f4 +800059e8: 00200413 addi x8,x0,2 +800059ec: 00300493 addi x9,x0,3 +800059f0: 0c40006f jal x0,80005ab4 +800059f4: 0000b397 auipc x7,0xb +800059f8: d0438393 addi x7,x7,-764 # 800106f8 +800059fc: 00731863 bne x6,x7,80005a0c +80005a00: 00300413 addi x8,x0,3 +80005a04: 00300493 addi x9,x0,3 +80005a08: 0ac0006f jal x0,80005ab4 +80005a0c: 0000b397 auipc x7,0xb +80005a10: de238393 addi x7,x7,-542 # 800107ee +80005a14: 00731863 bne x6,x7,80005a24 +80005a18: 00400413 addi x8,x0,4 +80005a1c: 00300493 addi x9,x0,3 +80005a20: 0940006f jal x0,80005ab4 +80005a24: 0000b397 auipc x7,0xb +80005a28: f3738393 addi x7,x7,-201 # 8001095b +80005a2c: 00731863 bne x6,x7,80005a3c +80005a30: 00500413 addi x8,x0,5 +80005a34: 00300493 addi x9,x0,3 +80005a38: 07c0006f jal x0,80005ab4 +80005a3c: 0000b397 auipc x7,0xb +80005a40: f5c38393 addi x7,x7,-164 # 80010998 +80005a44: 00731863 bne x6,x7,80005a54 +80005a48: 00800413 addi x8,x0,8 +80005a4c: 00000493 addi x9,x0,0 +80005a50: 0640006f jal x0,80005ab4 +80005a54: 0000b397 auipc x7,0xb +80005a58: f9338393 addi x7,x7,-109 # 800109e7 +80005a5c: 00731863 bne x6,x7,80005a6c +80005a60: 00800413 addi x8,x0,8 +80005a64: 00000493 addi x9,x0,0 +80005a68: 04c0006f jal x0,80005ab4 +80005a6c: 0000b397 auipc x7,0xb +80005a70: 07638393 addi x7,x7,118 # 80010ae2 +80005a74: 00731863 bne x6,x7,80005a84 +80005a78: 00800413 addi x8,x0,8 +80005a7c: 00100493 addi x9,x0,1 +80005a80: 0340006f jal x0,80005ab4 +80005a84: 0000b397 auipc x7,0xb +80005a88: 15a38393 addi x7,x7,346 # 80010bde +80005a8c: 00731863 bne x6,x7,80005a9c +80005a90: 00800413 addi x8,x0,8 +80005a94: 00200493 addi x9,x0,2 +80005a98: 01c0006f jal x0,80005ab4 +80005a9c: 0340006f jal x0,80005ad0 + +80005aa0 : +80005aa0: 00900413 addi x8,x0,9 +80005aa4: 0000a817 auipc x16,0xa +80005aa8: 24c80813 addi x16,x16,588 # 8000fcf0 +80005aac: 00882023 sw x8,0(x16) +80005ab0: 0300006f jal x0,80005ae0 + +80005ab4 : +80005ab4: 0000a817 auipc x16,0xa +80005ab8: 23c80813 addi x16,x16,572 # 8000fcf0 +80005abc: 00882023 sw x8,0(x16) +80005ac0: 0000a817 auipc x16,0xa +80005ac4: 23480813 addi x16,x16,564 # 8000fcf4 +80005ac8: 00982023 sw x9,0(x16) +80005acc: 0140006f jal x0,80005ae0 + +80005ad0 : +80005ad0: 0000a817 auipc x16,0xa +80005ad4: 22080813 addi x16,x16,544 # 8000fcf0 +80005ad8: 00082023 sw x0,0(x16) +80005adc: 0040006f jal x0,80005ae0 + +80005ae0 : +80005ae0: 0002a303 lw x6,0(x5) +80005ae4: 10622423 sw x6,264(x4) # 108 +80005ae8: 00035383 lhu x7,0(x6) +80005aec: 0033f413 andi x8,x7,3 +80005af0: 00300493 addi x9,x0,3 +80005af4: 00941863 bne x8,x9,80005b04 +80005af8: 00235403 lhu x8,2(x6) +80005afc: 01041413 slli x8,x8,0x10 +80005b00: 0083e3b3 or x7,x7,x8 +80005b04: 10722023 sw x7,256(x4) # 100 +80005b08: 0042a303 lw x6,4(x5) +80005b0c: 12622023 sw x6,288(x4) # 120 + +80005b10 : +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 72050513 addi x10,x10,1824 # 80010240 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 71b50513 addi x10,x10,1819 # 8001027b +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 00000013 addi x0,x0,0 +80005b8c: 00000013 addi x0,x0,0 +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 79250513 addi x10,x10,1938 # 80010332 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 + +80005bc8 : +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 11852503 lw x10,280(x10) # 8000fce0 +80005bd0: 0001c097 auipc x1,0x1c +80005bd4: 994080e7 jalr x1,-1644(x1) # 80021564 + +80005bd8 : +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 76450513 addi x10,x10,1892 # 80010344 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: fb852503 lw x10,-72(x10) # 8000fbc0 +80005c10: 00300593 addi x11,x0,3 +80005c14: 52b50c63 beq x10,x11,8000614c +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000a517 auipc x10,0xa +80005c24: 72650513 addi x10,x10,1830 # 80010346 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001c097 auipc x1,0x1c +80005c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80005c48: 0000a517 auipc x10,0xa +80005c4c: 07852503 lw x10,120(x10) # 8000fcc0 +80005c50: 02000593 addi x11,x0,32 +80005c54: 00357613 andi x12,x10,3 +80005c58: 00300693 addi x13,x0,3 +80005c5c: 00d60463 beq x12,x13,80005c64 +80005c60: 01000593 addi x11,x0,16 +80005c64: 3f4010ef jal x1,80007058 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 0a850513 addi x10,x10,168 # 8000fd28 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 69a50513 addi x10,x10,1690 # 8001035a +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 0000a517 auipc x10,0xa +80005cec: fe052503 lw x10,-32(x10) # 8000fcc8 +80005cf0: 02000593 addi x11,x0,32 +80005cf4: 364010ef jal x1,80007058 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000a517 auipc x10,0xa +80005d04: 02850513 addi x10,x10,40 # 8000fd28 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 0000b517 auipc x10,0xb +80005d44: 05150513 addi x10,x10,81 # 80010d91 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001c097 auipc x1,0x1c +80005d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80005d68: 0000a517 auipc x10,0xa +80005d6c: e5852503 lw x10,-424(x10) # 8000fbc0 +80005d70: 00050663 beq x10,x0,80005d7c +80005d74: 00300593 addi x11,x0,3 +80005d78: 04b51063 bne x10,x11,80005db8 +80005d7c: 07800593 addi x11,x0,120 +80005d80: 0000a617 auipc x12,0xa +80005d84: fa860613 addi x12,x12,-88 # 8000fd28 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 00b60023 sb x11,0(x12) +80005da4: 00160613 addi x12,x12,1 +80005da8: 0000a517 auipc x10,0xa +80005dac: f1c52503 lw x10,-228(x10) # 8000fcc4 +80005db0: 324010ef jal x1,800070d4 +80005db4: 1180006f jal x0,80005ecc + +80005db8 : +80005db8: 00100593 addi x11,x0,1 +80005dbc: 04b50863 beq x10,x11,80005e0c +80005dc0: 00400593 addi x11,x0,4 +80005dc4: 08b50a63 beq x10,x11,80005e58 +80005dc8: 00500593 addi x11,x0,5 +80005dcc: 0cb50463 beq x10,x11,80005e94 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000b517 auipc x10,0xb +80005de4: 0c750513 addi x10,x10,199 # 80010ea7 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0001b097 auipc x1,0x1b +80005e04: 764080e7 jalr x1,1892(x1) # 80021564 +80005e08: 1000006f jal x0,80005f08 + +80005e0c : +80005e0c: 06600593 addi x11,x0,102 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: f0860613 addi x12,x12,-248 # 8000fd28 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: e7c52503 lw x10,-388(x10) # 8000fcc4 +80005e50: 284010ef jal x1,800070d4 +80005e54: 0780006f jal x0,80005ecc + +80005e58 : +80005e58: 07600593 addi x11,x0,118 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000a617 auipc x12,0xa +80005e64: ec860613 addi x12,x12,-312 # 8000fd28 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 00b60023 sb x11,0(x12) +80005e84: 00160613 addi x12,x12,1 +80005e88: 0000a517 auipc x10,0xa +80005e8c: e3c52503 lw x10,-452(x10) # 8000fcc4 +80005e90: 244010ef jal x1,800070d4 + +80005e94 : +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: eea50513 addi x10,x10,-278 # 80010d8a +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80005ec8: 0400006f jal x0,80005f08 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000a517 auipc x10,0xa +80005ee4: e4850513 addi x10,x10,-440 # 8000fd28 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 + +80005f08 : +80005f08: 00000013 addi x0,x0,0 +80005f0c: 00000013 addi x0,x0,0 +80005f10: 00000013 addi x0,x0,0 +80005f14: 00000013 addi x0,x0,0 +80005f18: 00000013 addi x0,x0,0 +80005f1c: 00000013 addi x0,x0,0 +80005f20: 0000b517 auipc x10,0xb +80005f24: e8250513 addi x10,x10,-382 # 80010da2 +80005f28: 00000013 addi x0,x0,0 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0001b097 auipc x1,0x1b +80005f44: 624080e7 jalr x1,1572(x1) # 80021564 +80005f48: 0000a517 auipc x10,0xa +80005f4c: c7852503 lw x10,-904(x10) # 8000fbc0 +80005f50: 00100593 addi x11,x0,1 +80005f54: 00b51c63 bne x10,x11,80005f6c +80005f58: 0000a517 auipc x10,0xa +80005f5c: d7852503 lw x10,-648(x10) # 8000fcd0 +80005f60: 02000593 addi x11,x0,32 +80005f64: 0f4010ef jal x1,80007058 +80005f68: 0140006f jal x0,80005f7c + +80005f6c : +80005f6c: 0000a517 auipc x10,0xa +80005f70: d6452503 lw x10,-668(x10) # 8000fcd0 +80005f74: 02000593 addi x11,x0,32 +80005f78: 0e0010ef jal x1,80007058 + +80005f7c : +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000a517 auipc x10,0xa +80005f84: da850513 addi x10,x10,-600 # 8000fd28 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: d4052503 lw x10,-704(x10) # 8000fce8 +80005fb0: 08051e63 bne x10,x0,8000604c +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: df950513 addi x10,x10,-519 # 80010db9 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0001b097 auipc x1,0x1b +80005fe4: 584080e7 jalr x1,1412(x1) # 80021564 +80005fe8: 0000a517 auipc x10,0xa +80005fec: bd852503 lw x10,-1064(x10) # 8000fbc0 +80005ff0: 00100593 addi x11,x0,1 +80005ff4: 00b51c63 bne x10,x11,8000600c +80005ff8: 0000a517 auipc x10,0xa +80005ffc: ce052503 lw x10,-800(x10) # 8000fcd8 +80006000: 02000593 addi x11,x0,32 +80006004: 054010ef jal x1,80007058 +80006008: 0140006f jal x0,8000601c + +8000600c : +8000600c: 0000a517 auipc x10,0xa +80006010: ccc52503 lw x10,-820(x10) # 8000fcd8 +80006014: 02000593 addi x11,x0,32 +80006018: 040010ef jal x1,80007058 + +8000601c : +8000601c: 00000013 addi x0,x0,0 +80006020: 0000a517 auipc x10,0xa +80006024: d0850513 addi x10,x10,-760 # 8000fd28 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 5bd0006f jal x0,80006e04 + +8000604c : +8000604c: 00100593 addi x11,x0,1 +80006050: 06b51e63 bne x10,x11,800060cc + +80006054 : +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000b517 auipc x10,0xb +80006064: d7050513 addi x10,x10,-656 # 80010dd0 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 0000a517 auipc x10,0xa +8000608c: c5052503 lw x10,-944(x10) # 8000fcd8 +80006090: 02000593 addi x11,x0,32 +80006094: 7c5000ef jal x1,80007058 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000a517 auipc x10,0xa +800060a4: c8850513 addi x10,x10,-888 # 8000fd28 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 53d0006f jal x0,80006e04 + +800060cc : +800060cc: 00000013 addi x0,x0,0 +800060d0: 00000013 addi x0,x0,0 +800060d4: 00000013 addi x0,x0,0 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000b517 auipc x10,0xb +800060e4: d4e50513 addi x10,x10,-690 # 80010e2e +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 0000a517 auipc x10,0xa +8000610c: bd052503 lw x10,-1072(x10) # 8000fcd8 +80006110: 02000593 addi x11,x0,32 +80006114: 745000ef jal x1,80007058 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000a517 auipc x10,0xa +80006124: c0850513 addi x10,x10,-1016 # 8000fd28 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 4bd0006f jal x0,80006e04 + +8000614c : +8000614c: 0000a417 auipc x8,0xa +80006150: ba442403 lw x8,-1116(x8) # 8000fcf0 +80006154: 00900493 addi x9,x0,9 +80006158: 0a940c63 beq x8,x9,80006210 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: d7350513 addi x10,x10,-653 # 80010ed3 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: d5f50513 addi x10,x10,-673 # 80010eff +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 0000a817 auipc x16,0xa +800061cc: b3080813 addi x16,x16,-1232 # 8000fcf8 +800061d0: 00082503 lw x10,0(x16) +800061d4: 0001b097 auipc x1,0x1b +800061d8: 390080e7 jalr x1,912(x1) # 80021564 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000a517 auipc x10,0xa +800061e4: 16450513 addi x10,x10,356 # 80010344 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 280404e3 beq x8,x0,80006c90 +8000620c: 3400006f jal x0,8000654c + +80006210 : +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000b517 auipc x10,0xb +80006224: cef50513 addi x10,x10,-785 # 80010f0f +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 0000a517 auipc x10,0xa +8000624c: a9052503 lw x10,-1392(x10) # 8000fcd8 +80006250: 02000593 addi x11,x0,32 +80006254: 605000ef jal x1,80007058 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000a517 auipc x10,0xa +80006264: ac850513 addi x10,x10,-1336 # 8000fd28 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000b517 auipc x10,0xb +800062a4: c9a50513 addi x10,x10,-870 # 80010f3a +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 0000a517 auipc x10,0xa +800062cc: a0852503 lw x10,-1528(x10) # 8000fcd0 +800062d0: 02000593 addi x11,x0,32 +800062d4: 585000ef jal x1,80007058 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000a517 auipc x10,0xa +800062e4: a4850513 addi x10,x10,-1464 # 8000fd28 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 0000a317 auipc x6,0xa +8000630c: 9c832303 lw x6,-1592(x6) # 8000fcd0 +80006310: 0000a397 auipc x7,0xa +80006314: 9c83a383 lw x7,-1592(x7) # 8000fcd8 +80006318: 10736a63 bltu x6,x7,8000642c + +8000631c : +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: c4950513 addi x10,x10,-951 # 80010f69 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0000b517 auipc x10,0xb +80006364: c7150513 addi x10,x10,-911 # 80010fd1 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0001b097 auipc x1,0x1b +80006384: 1e4080e7 jalr x1,484(x1) # 80021564 +80006388: 0000a317 auipc x6,0xa +8000638c: 94832303 lw x6,-1720(x6) # 8000fcd0 +80006390: 0000a397 auipc x7,0xa +80006394: 9483a383 lw x7,-1720(x7) # 8000fcd8 +80006398: 40730533 sub x10,x6,x7 +8000639c: 02000593 addi x11,x0,32 +800063a0: 4b9000ef jal x1,80007058 +800063a4: 00000013 addi x0,x0,0 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000a517 auipc x10,0xa +800063c4: 96850513 addi x10,x10,-1688 # 8000fd28 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 00000013 addi x0,x0,0 +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: bf850513 addi x10,x10,-1032 # 80010ff8 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 1dd0006f jal x0,80006e04 + +8000642c : +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: b5550513 addi x10,x10,-1195 # 80010f95 +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 00000013 addi x0,x0,0 +8000646c: 00000013 addi x0,x0,0 +80006470: 00000013 addi x0,x0,0 +80006474: 00000013 addi x0,x0,0 +80006478: 00000013 addi x0,x0,0 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000b517 auipc x10,0xb +80006484: b5150513 addi x10,x10,-1199 # 80010fd1 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001b097 auipc x1,0x1b +800064a4: 0c4080e7 jalr x1,196(x1) # 80021564 +800064a8: 0000a317 auipc x6,0xa +800064ac: 83032303 lw x6,-2000(x6) # 8000fcd8 +800064b0: 0000a397 auipc x7,0xa +800064b4: 8203a383 lw x7,-2016(x7) # 8000fcd0 +800064b8: 40730533 sub x10,x6,x7 +800064bc: 02000593 addi x11,x0,32 +800064c0: 399000ef jal x1,80007058 +800064c4: 00000013 addi x0,x0,0 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000a517 auipc x10,0xa +800064e4: 84850513 addi x10,x10,-1976 # 8000fd28 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 00000013 addi x0,x0,0 +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: bc050513 addi x10,x10,-1088 # 800110e0 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 0bd0006f jal x0,80006e04 + +8000654c : +8000654c: 00000013 addi x0,x0,0 +80006550: 00000013 addi x0,x0,0 +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000b517 auipc x10,0xb +80006564: c6750513 addi x10,x10,-921 # 800111c7 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001b097 auipc x1,0x1b +80006584: fe4080e7 jalr x1,-28(x1) # 80021564 +80006588: 00009517 auipc x10,0x9 +8000658c: 76c52503 lw x10,1900(x10) # 8000fcf4 +80006590: 04050a63 beq x10,x0,800065e4 +80006594: 00100593 addi x11,x0,1 +80006598: 08b50663 beq x10,x11,80006624 +8000659c: 00200593 addi x11,x0,2 +800065a0: 0cb50263 beq x10,x11,80006664 +800065a4: 00300593 addi x11,x0,3 +800065a8: 0eb50e63 beq x10,x11,800066a4 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: c4350513 addi x10,x10,-957 # 80011203 +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 1000006f jal x0,800066e0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: be150513 addi x10,x10,-1055 # 800111e1 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0c00006f jal x0,800066e0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: ba950513 addi x10,x10,-1111 # 800111e9 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0800006f jal x0,800066e0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: b7150513 addi x10,x10,-1167 # 800111f1 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 +800066a0: 0400006f jal x0,800066e0 + +800066a4 : +800066a4: 00000013 addi x0,x0,0 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: b3a50513 addi x10,x10,-1222 # 800111fa +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 + +800066e0 : +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00000013 addi x0,x0,0 +800066ec: 00000013 addi x0,x0,0 +800066f0: 00000013 addi x0,x0,0 +800066f4: 00000013 addi x0,x0,0 +800066f8: 00000013 addi x0,x0,0 +800066fc: 00000013 addi x0,x0,0 +80006700: 0000b517 auipc x10,0xb +80006704: b0c50513 addi x10,x10,-1268 # 8001120c +80006708: 00000013 addi x0,x0,0 +8000670c: 00000013 addi x0,x0,0 +80006710: 00000013 addi x0,x0,0 +80006714: 00000013 addi x0,x0,0 +80006718: 00000013 addi x0,x0,0 +8000671c: 00000013 addi x0,x0,0 +80006720: 0001b097 auipc x1,0x1b +80006724: e44080e7 jalr x1,-444(x1) # 80021564 +80006728: 00009517 auipc x10,0x9 +8000672c: 5c852503 lw x10,1480(x10) # 8000fcf0 +80006730: 00100593 addi x11,x0,1 +80006734: 06b50863 beq x10,x11,800067a4 +80006738: 00200593 addi x11,x0,2 +8000673c: 0ab50463 beq x10,x11,800067e4 +80006740: 00300593 addi x11,x0,3 +80006744: 0eb50063 beq x10,x11,80006824 +80006748: 00400593 addi x11,x0,4 +8000674c: 10b50c63 beq x10,x11,80006864 +80006750: 00500593 addi x11,x0,5 +80006754: 14b50863 beq x10,x11,800068a4 +80006758: 00600593 addi x11,x0,6 +8000675c: 18b50463 beq x10,x11,800068e4 +80006760: 00700593 addi x11,x0,7 +80006764: 1cb50063 beq x10,x11,80006924 +80006768: 00800593 addi x11,x0,8 +8000676c: 1eb50c63 beq x10,x11,80006964 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: be350513 addi x10,x10,-1053 # 80011363 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 2000006f jal x0,800069a0 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: a6650513 addi x10,x10,-1434 # 80011226 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1c00006f jal x0,800069a0 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: a5750513 addi x10,x10,-1449 # 80011257 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1800006f jal x0,800069a0 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: a3750513 addi x10,x10,-1481 # 80011277 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1400006f jal x0,800069a0 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: a1550513 addi x10,x10,-1515 # 80011295 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 1000006f jal x0,800069a0 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 9f450513 addi x10,x10,-1548 # 800112b4 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0c00006f jal x0,800069a0 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 9dc50513 addi x10,x10,-1572 # 800112dc +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0800006f jal x0,800069a0 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 9c850513 addi x10,x10,-1592 # 80011308 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 0400006f jal x0,800069a0 + +80006964 : +80006964: 00000013 addi x0,x0,0 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 9b450513 addi x10,x10,-1612 # 80011334 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 + +800069a0 : +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000b517 auipc x10,0xb +800069c4: 9b250513 addi x10,x10,-1614 # 80011372 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00009517 auipc x10,0x9 +800069ec: 2f052503 lw x10,752(x10) # 8000fcd8 +800069f0: 02000593 addi x11,x0,32 +800069f4: 664000ef jal x1,80007058 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 00009517 auipc x10,0x9 +80006a04: 32850513 addi x10,x10,808 # 8000fd28 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00000013 addi x0,x0,0 +80006a2c: 00000013 addi x0,x0,0 +80006a30: 00000013 addi x0,x0,0 +80006a34: 00000013 addi x0,x0,0 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000b517 auipc x10,0xb +80006a44: 94950513 addi x10,x10,-1719 # 80011389 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: 26852503 lw x10,616(x10) # 8000fcd0 +80006a70: 02000593 addi x11,x0,32 +80006a74: 5e4000ef jal x1,80007058 +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 00009517 auipc x10,0x9 +80006a84: 2a850513 addi x10,x10,680 # 8000fd28 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: 24852503 lw x10,584(x10) # 8000fcf0 +80006ab0: 00200593 addi x11,x0,2 +80006ab4: 08b51463 bne x10,x11,80006b3c +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 8e050513 addi x10,x10,-1824 # 800113a0 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: 1f052503 lw x10,496(x10) # 8000fcd8 +80006af0: 284000ef jal x1,80006d74 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 +80006afc: 00000013 addi x0,x0,0 +80006b00: 0000b517 auipc x10,0xb +80006b04: 8b750513 addi x10,x10,-1865 # 800113b7 +80006b08: 00000013 addi x0,x0,0 +80006b0c: 00000013 addi x0,x0,0 +80006b10: 00000013 addi x0,x0,0 +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0001b097 auipc x1,0x1b +80006b24: a44080e7 jalr x1,-1468(x1) # 80021564 +80006b28: 00009517 auipc x10,0x9 +80006b2c: 1a852503 lw x10,424(x10) # 8000fcd0 +80006b30: 244000ef jal x1,80006d74 +80006b34: 0001b097 auipc x1,0x1b +80006b38: a30080e7 jalr x1,-1488(x1) # 80021564 + +80006b3c : +80006b3c: 00000097 auipc x1,0x0 +80006b40: 314080e7 jalr x1,788(x1) # 80006e50 +80006b44: 00009517 auipc x10,0x9 +80006b48: 1ac52503 lw x10,428(x10) # 8000fcf0 +80006b4c: 00100593 addi x11,x0,1 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 8cd50513 addi x10,x10,-1843 # 8001142d +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 27c0006f jal x0,80006e04 +80006b8c: 00200593 addi x11,x0,2 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 96350513 addi x10,x10,-1693 # 80011503 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 23c0006f jal x0,80006e04 +80006bcc: 00300593 addi x11,x0,3 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: a1650513 addi x10,x10,-1514 # 800115f6 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1fc0006f jal x0,80006e04 +80006c0c: 00400593 addi x11,x0,4 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: ad150513 addi x10,x10,-1327 # 800116f1 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 1bc0006f jal x0,80006e04 +80006c4c: 00500593 addi x11,x0,5 +80006c50: 02b51e63 bne x10,x11,80006c8c +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: b7850513 addi x10,x10,-1160 # 800117d8 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 17c0006f jal x0,80006e04 +80006c8c: 1780006f jal x0,80006e04 + +80006c90 : +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: 74550513 addi x10,x10,1861 # 800113e5 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00009617 auipc x12,0x9 +80006ccc: 04062603 lw x12,64(x12) # 8000fd08 +80006cd0: 00000013 addi x0,x0,0 +80006cd4: 00000013 addi x0,x0,0 +80006cd8: 00000013 addi x0,x0,0 +80006cdc: 00000013 addi x0,x0,0 +80006ce0: 00009517 auipc x10,0x9 +80006ce4: 6ee50513 addi x10,x10,1774 # 800103ce +80006ce8: 00000013 addi x0,x0,0 +80006cec: 00000013 addi x0,x0,0 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 0001b097 auipc x1,0x1b +80006d04: 864080e7 jalr x1,-1948(x1) # 80021564 +80006d08: 00065503 lhu x10,0(x12) +80006d0c: 01000593 addi x11,x0,16 +80006d10: 00357413 andi x8,x10,3 +80006d14: 00300493 addi x9,x0,3 +80006d18: 00941a63 bne x8,x9,80006d2c +80006d1c: 00265403 lhu x8,2(x12) +80006d20: 01041413 slli x8,x8,0x10 +80006d24: 00856533 or x10,x10,x8 +80006d28: 02000593 addi x11,x0,32 +80006d2c: 32c000ef jal x1,80007058 +80006d30: 00000013 addi x0,x0,0 +80006d34: 00000013 addi x0,x0,0 +80006d38: 00000013 addi x0,x0,0 +80006d3c: 00000013 addi x0,x0,0 +80006d40: 00009517 auipc x10,0x9 +80006d44: fe850513 addi x10,x10,-24 # 8000fd28 +80006d48: 00000013 addi x0,x0,0 +80006d4c: 00000013 addi x0,x0,0 +80006d50: 00000013 addi x0,x0,0 +80006d54: 00000013 addi x0,x0,0 +80006d58: 00000013 addi x0,x0,0 +80006d5c: 00000013 addi x0,x0,0 +80006d60: 0001b097 auipc x1,0x1b +80006d64: 804080e7 jalr x1,-2044(x1) # 80021564 +80006d68: 00000097 auipc x1,0x0 +80006d6c: 0e8080e7 jalr x1,232(x1) # 80006e50 +80006d70: 0940006f jal x0,80006e04 + +80006d74 : +80006d74: 02054263 blt x10,x0,80006d98 + +80006d78 : +80006d78: 01800593 addi x11,x0,24 +80006d7c: 04b55463 bge x10,x11,80006dc4 +80006d80: 00009597 auipc x11,0x9 +80006d84: fd058593 addi x11,x11,-48 # 8000fd50 +80006d88: 00251613 slli x12,x10,0x2 +80006d8c: 00c585b3 add x11,x11,x12 +80006d90: 0005a503 lw x10,0(x11) +80006d94: 00008067 jalr x0,0(x1) + +80006d98 : +80006d98: 00100593 addi x11,x0,1 +80006d9c: 01f59593 slli x11,x11,0x1f +80006da0: 00b54533 xor x10,x10,x11 +80006da4: 01000593 addi x11,x0,16 +80006da8: 00b55e63 bge x10,x11,80006dc4 +80006dac: 00009597 auipc x11,0x9 +80006db0: 00458593 addi x11,x11,4 # 8000fdb0 +80006db4: 00251613 slli x12,x10,0x2 +80006db8: 00c585b3 add x11,x11,x12 +80006dbc: 0005a503 lw x10,0(x11) +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 00009517 auipc x10,0x9 +80006de4: 40e50513 addi x10,x10,1038 # 800101ee +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 00008067 jalr x0,0(x1) + +80006e04 : +80006e04: 00000013 addi x0,x0,0 +80006e08: 00000013 addi x0,x0,0 +80006e0c: 00000013 addi x0,x0,0 +80006e10: 00000013 addi x0,x0,0 +80006e14: 00000013 addi x0,x0,0 +80006e18: 00000013 addi x0,x0,0 +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: 06650513 addi x10,x10,102 # 80010e86 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 + +80006e48 : +80006e48: 0001a097 auipc x1,0x1a +80006e4c: 77c080e7 jalr x1,1916(x1) # 800215c4 + +80006e50 : +80006e50: 00009617 auipc x12,0x9 +80006e54: eb060613 addi x12,x12,-336 # 8000fd00 +80006e58: 00162023 sw x1,0(x12) +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 58f50513 addi x10,x10,1423 # 800103ef +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00009517 auipc x10,0x9 +80006e8c: e8052503 lw x10,-384(x10) # 8000fd08 +80006e90: 02000593 addi x11,x0,32 +80006e94: 1c4000ef jal x1,80007058 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: e8850513 addi x10,x10,-376 # 8000fd28 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00000013 addi x0,x0,0 +80006ecc: 00000013 addi x0,x0,0 +80006ed0: 00000013 addi x0,x0,0 +80006ed4: 00000013 addi x0,x0,0 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 51f50513 addi x10,x10,1311 # 800103ff +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00009517 auipc x10,0x9 +80006f0c: e0852503 lw x10,-504(x10) # 8000fd10 +80006f10: 02000593 addi x11,x0,32 +80006f14: 144000ef jal x1,80007058 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: e0850513 addi x10,x10,-504 # 8000fd28 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00000013 addi x0,x0,0 +80006f4c: 00000013 addi x0,x0,0 +80006f50: 00000013 addi x0,x0,0 +80006f54: 00000013 addi x0,x0,0 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 4af50513 addi x10,x10,1199 # 8001040f +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00009517 auipc x10,0x9 +80006f8c: d9052503 lw x10,-624(x10) # 8000fd18 +80006f90: 02000593 addi x11,x0,32 +80006f94: 0c4000ef jal x1,80007058 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: d8850513 addi x10,x10,-632 # 8000fd28 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00000013 addi x0,x0,0 +80006fcc: 00000013 addi x0,x0,0 +80006fd0: 00000013 addi x0,x0,0 +80006fd4: 00000013 addi x0,x0,0 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 43f50513 addi x10,x10,1087 # 8001041f +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009517 auipc x10,0x9 +8000700c: d1852503 lw x10,-744(x10) # 8000fd20 +80007010: 02000593 addi x11,x0,32 +80007014: 044000ef jal x1,80007058 +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009517 auipc x10,0x9 +80007024: d0850513 addi x10,x10,-760 # 8000fd28 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 0001a097 auipc x1,0x1a +80007044: 524080e7 jalr x1,1316(x1) # 80021564 +80007048: 00009617 auipc x12,0x9 +8000704c: cb860613 addi x12,x12,-840 # 8000fd00 +80007050: 00062083 lw x1,0(x12) +80007054: 00008067 jalr x0,0(x1) + +80007058 : +80007058: 00000013 addi x0,x0,0 +8000705c: 00000013 addi x0,x0,0 +80007060: 00009617 auipc x12,0x9 +80007064: cc860613 addi x12,x12,-824 # 8000fd28 +80007068: 00000013 addi x0,x0,0 +8000706c: 00000013 addi x0,x0,0 +80007070: 00000013 addi x0,x0,0 +80007074: 00000013 addi x0,x0,0 +80007078: 00000013 addi x0,x0,0 +8000707c: 00000013 addi x0,x0,0 +80007080: 03000693 addi x13,x0,48 +80007084: 00d60023 sb x13,0(x12) +80007088: 07800693 addi x13,x0,120 +8000708c: 00d600a3 sb x13,1(x12) +80007090: 00260613 addi x12,x12,2 +80007094: 00058693 addi x13,x11,0 + +80007098 : +80007098: ffc68693 addi x13,x13,-4 +8000709c: 00d55733 srl x14,x10,x13 +800070a0: 00f77713 andi x14,x14,15 +800070a4: 00a00793 addi x15,x0,10 +800070a8: 00f74663 blt x14,x15,800070b4 +800070ac: 05770713 addi x14,x14,87 +800070b0: 0080006f jal x0,800070b8 + +800070b4 : +800070b4: 03070713 addi x14,x14,48 + +800070b8 : +800070b8: 00e60023 sb x14,0(x12) +800070bc: 00160613 addi x12,x12,1 +800070c0: fc069ce3 bne x13,x0,80007098 +800070c4: 00a00693 addi x13,x0,10 +800070c8: 00d60023 sb x13,0(x12) +800070cc: 000600a3 sb x0,1(x12) +800070d0: 00008067 jalr x0,0(x1) + +800070d4 : +800070d4: 00a00693 addi x13,x0,10 +800070d8: 02d54663 blt x10,x13,80007104 +800070dc: ff650513 addi x10,x10,-10 +800070e0: 03100713 addi x14,x0,49 +800070e4: 00d54c63 blt x10,x13,800070fc +800070e8: ff650513 addi x10,x10,-10 +800070ec: 03200713 addi x14,x0,50 +800070f0: 00d54663 blt x10,x13,800070fc +800070f4: ff650513 addi x10,x10,-10 +800070f8: 03300713 addi x14,x0,51 +800070fc: 00e60023 sb x14,0(x12) +80007100: 00160613 addi x12,x12,1 +80007104: 03050513 addi x10,x10,48 +80007108: 00a60023 sb x10,0(x12) +8000710c: 00a00693 addi x13,x0,10 +80007110: 00d600a3 sb x13,1(x12) +80007114: 00060123 sb x0,2(x12) +80007118: 00008067 jalr x0,0(x1) +8000711c: 00000013 addi x0,x0,0 +80007120: 00000013 addi x0,x0,0 +80007124: 00000013 addi x0,x0,0 +80007128: 00000013 addi x0,x0,0 +8000712c: 00000013 addi x0,x0,0 +80007130: 00000013 addi x0,x0,0 +80007134: 00000013 addi x0,x0,0 +80007138: 00000013 addi x0,x0,0 +8000713c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 23838393 addi x7,x7,568 # 80005240 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 21c38393 addi x7,x7,540 # 80005240 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 20438393 addi x7,x7,516 # 80005240 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1f038393 addi x7,x7,496 # 80005240 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1e438393 addi x7,x7,484 # 80005240 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 1b038393 addi x7,x7,432 # 80005240 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 40c30313 addi x6,x6,1036 # 800044a8 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 19838393 addi x7,x7,408 # 80005240 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3f430313 addi x6,x6,1012 # 800044a8 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 18038393 addi x7,x7,384 # 80005240 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3dc30313 addi x6,x6,988 # 800044a8 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 16838393 addi x7,x7,360 # 80005240 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 27878793 addi x15,x15,632 # 800044b8 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 47010113 addi x2,x2,1136 # 80011910 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 06018193 addi x3,x3,96 # 80005540 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010eaf .word 0x80010eaf +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 45828293 addi x5,x5,1112 # 80020a00 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 43828293 addi x5,x5,1080 # 80020a00 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zbkx-xperm8-00.elf.objdump b/riscv-tests/rv32-Zbkx-xperm8-00.elf.objdump new file mode 100644 index 0000000..7d323bc --- /dev/null +++ b/riscv-tests/rv32-Zbkx-xperm8-00.elf.objdump @@ -0,0 +1,13196 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkx/Zbkx-xperm8-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zbkx/Zbkx-xperm8-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00022640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x00019640 memsz 0x00019640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000189d0 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80020a00 80020a00 00021a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80021000 80021000 00022000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00022640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002670 00000000 00000000 0002267b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 00000000 00000000 00024ceb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00024d67 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00024d8a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00024da0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 00000000 00000000 00024dc8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00024e52 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80020a00 l d .tohost 00000000 .tohost +80021000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccrszLYr.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800210e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b1 +80009023 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b2 +80009056 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b3 +80009089 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090bc l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b5 +800090ef l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b6 +80009122 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b7 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +80009155 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b8 +80009188 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b9 +800091bb l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b10 +800091ef l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b11 +80009224 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b12 +80009259 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b12_str +800002b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b13 +8000928e l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b13_str +800002dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b14 +800092c3 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b14_str +80000308 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b15 +800092f8 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b15_str +80000338 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b16 +8000932d l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b16_str +80000364 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b17 +80009362 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b17_str +80000390 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b18 +80009397 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b18_str +800003bc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b19 +800093cc l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b19_str +800003e8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b20 +80009401 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b20_str +80000414 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b21 +80009436 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b21_str +80000440 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b22 +8000946b l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b22_str +8000046c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b23 +800094a0 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b23_str +80000498 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b24 +800094d5 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b24_str +800004c4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b25 +8000950a l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b26 +8000953f l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b26_str +80000520 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b27 +80009574 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b27_str +80000550 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b28 +800095a9 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b28_str +8000057c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b29 +800095de l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b29_str +800005a8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b30 +80009613 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b30_str +800005d4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_b31 +80009648 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_b31_str +80000600 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b0 +8000967d l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b0_str +8000062c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b1 +800096b1 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b1_str +80000658 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b2 +800096e5 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b2_str +80000684 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b3 +80009719 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b3_str +800006b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b4 +8000974d l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b4_str +800006dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b5 +80009781 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b5_str +80000708 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b6 +800097b5 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b6_str +8000073c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b7 +800097e9 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b7_str +80000768 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b8 +8000981d l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b8_str +80000794 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b9 +80009851 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b9_str +800007c4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b10 +80009885 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b10_str +800007f0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b11 +800098ba l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b11_str +8000081c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b12 +800098ef l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b12_str +80000850 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b13 +80009924 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b13_str +8000087c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b14 +80009959 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b14_str +800008a8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b15 +8000998e l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b15_str +800008d4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b16 +800099c3 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b16_str +80000900 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b17 +800099f8 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b17_str +8000092c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b18 +80009a2d l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b19 +80009a62 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b20 +80009a97 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b21 +80009acc l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b21_str +800009dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b22 +80009b01 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b22_str +80000a08 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b23 +80009b36 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b23_str +80000a34 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b24 +80009b6b l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b24_str +80000a60 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b25 +80009ba0 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b25_str +80000a90 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b26 +80009bd5 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b26_str +80000abc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b27 +80009c0a l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b27_str +80000ae8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b28 +80009c3f l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b28_str +80000b14 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b29 +80009c74 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b29_str +80000b40 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b30 +80009ca9 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b30_str +80000b6c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_b31 +80009cde l .data 00000000 Zbkx_xperm8_cg_cp_rs2_b31_str +80000b98 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b0 +80009d13 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b0_str +80000bc4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b1 +80009d46 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b1_str +80000bf4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b2 +80009d79 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b2_str +80000c24 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b3 +80009dac l .data 00000000 Zbkx_xperm8_cg_cp_rd_b3_str +80000c58 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b4 +80009ddf l .data 00000000 Zbkx_xperm8_cg_cp_rd_b4_str +80000c84 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b5 +80009e12 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b5_str +80000cb0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b6 +80009e45 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b6_str +80000cdc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b7 +80009e78 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b7_str +80000d08 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b8 +80009eab l .data 00000000 Zbkx_xperm8_cg_cp_rd_b8_str +80000d34 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b9 +80009ede l .data 00000000 Zbkx_xperm8_cg_cp_rd_b9_str +80000d60 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b10 +80009f11 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b10_str +80000d8c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b11 +80009f45 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b11_str +80000db8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b12 +80009f79 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b12_str +80000dec l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b13 +80009fad l .data 00000000 Zbkx_xperm8_cg_cp_rd_b13_str +80000e18 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b14 +80009fe1 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b14_str +80000e44 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b15 +8000a015 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b16 +8000a049 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b17 +8000a07d l .data 00000000 Zbkx_xperm8_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b18 +8000a0b1 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b19 +8000a0e5 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b20 +8000a119 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b20_str +80000f4c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b21 +8000a14d l .data 00000000 Zbkx_xperm8_cg_cp_rd_b21_str +80000f78 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b22 +8000a181 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b22_str +80000fa4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b23 +8000a1b5 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b24 +8000a1e9 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b24_str +80001004 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b25 +8000a21d l .data 00000000 Zbkx_xperm8_cg_cp_rd_b25_str +80001030 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b26 +8000a251 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b26_str +8000105c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b27 +8000a285 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b27_str +8000108c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b28 +8000a2b9 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b28_str +800010bc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b29 +8000a2ed l .data 00000000 Zbkx_xperm8_cg_cp_rd_b29_str +800010ec l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b30 +8000a321 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b30_str +80001118 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rd_b31 +8000a355 l .data 00000000 Zbkx_xperm8_cg_cp_rd_b31_str +80001144 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x0 +8000a389 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x0_str +80001170 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x1 +8000a3c4 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x1_str +8000119c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x2 +8000a3ff l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x2_str +800011c8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x80000000 +8000a43a l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x80000000_str +800011f4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x80000001 +8000a47d l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x80000001_str +80001220 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffff +8000a4c0 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffff_str +8000124c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffe +8000a503 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffe_str +80001278 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff +8000a546 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff_str +800012a4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe +8000a589 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe_str +800012d0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc8872 +8000a5cc l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc8872_str +800012fc l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaa +8000a60f l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaa_str +80001328 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x55555555 +8000a652 l .data 00000000 Zbkx_xperm8_cg_cp_rs1_edges_0x55555555_str +80001354 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x0 +8000a695 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x0_str +80001380 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x1 +8000a6d1 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x1_str +800013ac l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x2 +8000a70d l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x2_str +800013d8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x80000000 +8000a749 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x80000000_str +80001404 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x80000001 +8000a78c l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x80000001_str +80001430 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffff +8000a7cf l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffff_str +8000145c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffe +8000a812 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffe_str +80001488 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff +8000a855 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff_str +800014b4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe +8000a898 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe_str +800014e0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc8872 +8000a8db l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc8872_str +8000150c l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaa +8000a91e l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaa_str +80001538 l .text.rvtest 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x55555555 +8000a961 l .data 00000000 Zbkx_xperm8_cg_cp_rs2_edges_0x55555555_str +80001564 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000a9a4 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001590 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000a9f7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015bc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000aa4a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000aa9d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001614 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000aaf7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001640 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000ab51 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000166c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000abab l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001698 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ac05 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016c4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000ac5f l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000acb9 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +8000171c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000ad13 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001748 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000ad6d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001774 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000adc7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000ae1a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000ae6d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000aec0 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001824 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000af1a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001850 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000af74 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000187c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000afce l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b028 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018d4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b082 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001900 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b0dc l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000192c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b136 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001958 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b190 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001984 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b1ea l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b23d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b290 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a08 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b2e3 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a34 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b33d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a60 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b397 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a8c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b3f1 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b44b l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ae4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b4a5 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b10 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b4ff l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b3c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b559 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b68 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b5b3 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b94 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b60d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b667 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bec l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b6c1 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c18 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000b71b l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c44 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000b77c l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c70 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000b7dd l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c9c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000b83e l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000b89f l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cf4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000b900 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d20 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000b961 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d4c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000b9c2 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d78 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000ba23 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001da4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000ba84 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000bade l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001dfc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000bb38 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e28 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bb92 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e54 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bbf3 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e80 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bc54 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eac l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000bcb5 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000bd16 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f04 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000bd77 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f30 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000bdd8 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f5c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000be39 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f88 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000be9a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fb4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000befb l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000bf55 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +8000200c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000bfaf l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002038 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c009 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002064 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c06a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002090 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c0cb l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020bc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c12c l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c18d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002114 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c1ee l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002140 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c24f l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000216c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c2b0 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002198 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c311 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021c4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c372 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c3cc l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +8000221c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c426 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002248 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c480 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002274 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c4e1 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c542 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c5a3 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c604 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002324 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000c665 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002350 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000c6c6 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000237c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000c727 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000c788 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023d4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000c7e9 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002400 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000c843 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000242c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000c89d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002458 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000c8f7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002484 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000c958 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000c9b9 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ca1a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002508 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ca7b l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002534 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cadc l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002560 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cb3d l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000258c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cb9e l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000cbff l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025e4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000cc60 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002610 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000ccba l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000263c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000cd14 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002668 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000cd6e l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002694 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000cdcf l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000ce30 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026ec l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000ce91 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002718 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000cef2 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002744 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000cf53 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002770 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000cfb4 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000279c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d015 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d076 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027f4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d0d7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002820 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d131 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000284c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d18b l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002878 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d1e5 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028a4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d246 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d2a7 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028fc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d308 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002928 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d369 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002954 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d3ca l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002980 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d42b l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029ac l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d48c l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d4ed l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a04 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d54e l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a30 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000d5a8 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a5c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000d602 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a88 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000d65c l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ab4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000d6bd l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000d71e l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b0c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000d77f l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b38 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000d7e0 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b64 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000d841 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b90 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000d8a2 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bbc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000d903 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000d964 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c14 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000d9c5 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c40 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000da1f l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c6c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000da79 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c98 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dad3 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cc4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000db34 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000db95 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d1c l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000dbf6 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d48 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000dc57 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d74 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000dcb8 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000dd19 l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dcc l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000dd7a l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000dddb l .data 00000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e24 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b0 +8000de3c l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b0_str +80002e50 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b1 +8000de76 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b1_str +80002e7c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b2 +8000deb0 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b2_str +80002ea8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b3 +8000deea l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b3_str +80002ed4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b4 +8000df24 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b4_str +80002f00 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b5 +8000df5e l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b5_str +80002f2c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b6 +8000df98 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b7 +8000dfd2 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b8 +8000e00c l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b8_str +80002fb8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b9 +8000e046 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b10 +8000e080 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b11 +8000e0bb l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b12 +8000e0f6 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b12_str +80003068 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b13 +8000e131 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b13_str +80003094 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b14 +8000e16c l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b14_str +800030c0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b15 +8000e1a7 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b15_str +800030ec l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b16 +8000e1e2 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b17 +8000e21d l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b18 +8000e258 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b18_str +80003174 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b19 +8000e293 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b19_str +800031a0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b20 +8000e2ce l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b20_str +800031cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b21 +8000e309 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b21_str +800031f8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b22 +8000e344 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b22_str +80003224 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b23 +8000e37f l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b23_str +80003250 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b24 +8000e3ba l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b24_str +8000327c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b25 +8000e3f5 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b25_str +800032ac l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b26 +8000e430 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b26_str +800032d8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b27 +8000e46b l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b27_str +80003304 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b28 +8000e4a6 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b28_str +80003330 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b29 +8000e4e1 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b29_str +80003360 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b30 +8000e51c l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b30_str +8000338c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b31 +8000e557 l .data 00000000 Zbkx_xperm8_cg_cmp_rs1_rs2_b31_str +800033b8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b0 +8000e592 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b0_str +800033e4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b1 +8000e5cb l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b1_str +80003410 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b2 +8000e604 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b2_str +80003440 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b3 +8000e63d l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b3_str +80003474 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b4 +8000e676 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b4_str +800034a0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b5 +8000e6af l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b5_str +800034cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b6 +8000e6e8 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b6_str +80003500 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b7 +8000e721 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b7_str +8000352c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b8 +8000e75a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b8_str +80003558 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b9 +8000e793 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b9_str +80003584 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b10 +8000e7cc l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b10_str +800035b0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b11 +8000e806 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b11_str +800035dc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b12 +8000e840 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b12_str +80003608 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b13 +8000e87a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b13_str +80003634 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b14 +8000e8b4 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b14_str +80003660 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b15 +8000e8ee l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b16 +8000e928 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b17 +8000e962 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b17_str +800036e8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b18 +8000e99c l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b18_str +80003714 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b19 +8000e9d6 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b19_str +80003740 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b20 +8000ea10 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b21 +8000ea4a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b22 +8000ea84 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b23 +8000eabe l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b24 +8000eaf8 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b25 +8000eb32 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b25_str +80003848 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b26 +8000eb6c l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b26_str +80003874 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b27 +8000eba6 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b27_str +800038a0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b28 +8000ebe0 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b28_str +800038cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b29 +8000ec1a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b29_str +800038f8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b30 +8000ec54 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b30_str +80003924 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b31 +8000ec8e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_b31_str +80003950 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b0 +8000ecc8 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b0_str +8000397c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b1 +8000ed01 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b1_str +800039ac l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b2 +8000ed3a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b2_str +800039d8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b3 +8000ed73 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b3_str +80003a0c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b4 +8000edac l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b4_str +80003a38 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b5 +8000ede5 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b5_str +80003a64 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b6 +8000ee1e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b6_str +80003a98 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b7 +8000ee57 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b7_str +80003ac4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b8 +8000ee90 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b8_str +80003af4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b9 +8000eec9 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b9_str +80003b20 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b10 +8000ef02 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b10_str +80003b4c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b11 +8000ef3c l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b11_str +80003b78 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b12 +8000ef76 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b12_str +80003bac l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b13 +8000efb0 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b13_str +80003bd8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b14 +8000efea l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b14_str +80003c04 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b15 +8000f024 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b15_str +80003c30 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b16 +8000f05e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b16_str +80003c5c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b17 +8000f098 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b17_str +80003c88 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b18 +8000f0d2 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b18_str +80003cb4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b19 +8000f10c l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b19_str +80003ce0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b20 +8000f146 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b20_str +80003d0c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b21 +8000f180 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b21_str +80003d3c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b22 +8000f1ba l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b22_str +80003d6c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b23 +8000f1f4 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b23_str +80003d98 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b24 +8000f22e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b24_str +80003dc4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b25 +8000f268 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b25_str +80003df4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b26 +8000f2a2 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b26_str +80003e20 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b27 +8000f2dc l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b27_str +80003e4c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b28 +8000f316 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b28_str +80003e78 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b29 +8000f350 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b29_str +80003ea4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b30 +8000f38a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b30_str +80003ed0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b31 +8000f3c4 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs2_b31_str +80003efc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0 +8000f3fe l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0_str +80003f28 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1 +8000f43b l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1_str +80003f54 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2 +8000f478 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2_str +80003f80 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3 +8000f4b5 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3_str +80003fac l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4 +8000f4f2 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4_str +80003fd8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5 +8000f52f l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5_str +80004004 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6 +8000f56c l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6_str +80004038 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7 +8000f5a9 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7_str +80004064 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8 +8000f5e6 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8_str +80004090 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9 +8000f623 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9_str +800040c0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10 +8000f660 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10_str +800040ec l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11 +8000f69e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11_str +80004118 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12 +8000f6dc l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12_str +80004144 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13 +8000f71a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13_str +80004170 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14 +8000f758 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15 +8000f796 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15_str +800041cc l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16 +8000f7d4 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16_str +800041f8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17 +8000f812 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17_str +80004224 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18 +8000f850 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18_str +80004250 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19 +8000f88e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19_str +8000427c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20 +8000f8cc l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20_str +800042a8 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21 +8000f90a l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21_str +800042d4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22 +8000f948 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23 +8000f986 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24 +8000f9c4 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25 +8000fa02 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26 +8000fa40 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26_str +800043b4 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27 +8000fa7e l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27_str +800043e0 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28 +8000fabc l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28_str +8000440c l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29 +8000fafa l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29_str +80004438 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30 +8000fb38 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30_str +80004464 l .text.rvtest 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31 +8000fb76 l .data 00000000 Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004494 l .text.rvtest 00000000 exit_Mcleanup +80004498 l .text.rvtest 00000000 resto_Medeleg +800044a0 l .text.rvtest 00000000 resto_Msatp +800044a4 l .text.rvtest 00000000 resto_Mscratch +800044ac l .text.rvtest 00000000 resto_Mxtvec +800044c0 l .text.rvtest 00000000 resto_Mtramp +800044c4 l .text.rvtest 00000000 resto_Mloop +800044dc l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +80010240 l .data 00000000 failstr +80021564 l .text.rvmodel 00000000 rvmodel_io_write_str +8001027b l .data 00000000 begin_debugstr +800102db l .data 00000000 trap_sig_overflowstr +80010e86 l .data 00000000 endstr +800215c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80011f68 l .data 00000000 trap_sigptr +80011f60 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8001042f l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +8001029d l .data 00000000 abortstr +80010204 l .data 00000000 successstr +800215a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +800118bd l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +8000fd28 l .data 00000000 ascii_buffer +80010344 l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +8000fd08 l .data 00000000 saved_xepc +800209cc l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010446 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010548 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010643 l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010736 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +800108a9 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80021000 l .text.rvmodel 00000000 Mclr_Msw_int +80021014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80021030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80021048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002105c l .text.rvmodel 00000000 Mclr_Stmr_int +80021068 l .text.rvmodel 00000000 Mclr_Sext_int +8002109c l .text.rvmodel 00000000 Mclr_Vsw_int +800210b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800210cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +8000fbc0 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +8000fbc0 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +8000fce8 l .data 00000000 failure_diag_type +8000fcf8 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +8000fcf0 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +8001082d l .data 00000000 sv_Mtval2_str +8001086b l .data 00000000 sv_Mtinst_str +80010486 l .data 00000000 sv_Svect_str +80010586 l .data 00000000 sv_Scause_str +8001067f l .data 00000000 sv_Sepc_str +80010773 l .data 00000000 sv_Stval_str +800108e4 l .data 00000000 sv_Sip_str +800104c6 l .data 00000000 sv_Hvect_str +800105c4 l .data 00000000 sv_Hcause_str +800106bb l .data 00000000 sv_Hepc_str +800107b0 l .data 00000000 sv_Htval_str +8001091f l .data 00000000 sv_Hip_str +80010507 l .data 00000000 sv_Vvect_str +80010603 l .data 00000000 sv_Vcause_str +800106f8 l .data 00000000 sv_Vepc_str +800107ee l .data 00000000 sv_Vtval_str +8001095b l .data 00000000 sv_Vip_str +80010998 l .data 00000000 Mclr_Mext_int_str +800109e7 l .data 00000000 Mclr_Sext_int_str +80010ae2 l .data 00000000 Sclr_Sext_int_str +80010bde l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +8000fcf4 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010332 l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +8000fce0 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010346 l .data 00000000 inststr +8000fcc0 l .data 00000000 failing_instruction +8001035a l .data 00000000 addrstr +8000fcc8 l .data 00000000 failing_addr +80010d91 l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +8000fcc4 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80010ea7 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80010d8a l .data 00000000 vxsatstr +80010da2 l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +8000fcd0 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80010db9 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +8000fcd8 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80010dd0 l .data 00000000 failure_diag_bad_instr_str +80010e2e l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +80010ed3 l .data 00000000 trap_diag_header_str +80010eff l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +80010f0f l .data 00000000 trap_diag_expected_offset_str +80010f3a l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80010f69 l .data 00000000 trap_diag_extra_traps_str +80010fd1 l .data 00000000 trap_diag_diff_bytes_str +80010ff8 l .data 00000000 trap_diag_extra_next_step_str +80010f95 l .data 00000000 trap_diag_missing_traps_str +800110e0 l .data 00000000 trap_diag_missing_next_step_str +800111c7 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +80011203 l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +800111e1 l .data 00000000 trap_diag_mode_m_str +800111e9 l .data 00000000 trap_diag_mode_s_str +800111f1 l .data 00000000 trap_diag_mode_hs_str +800111fa l .data 00000000 trap_diag_mode_vs_str +8001120c l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011363 l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +80011226 l .data 00000000 trap_diag_field_vect_str +80011257 l .data 00000000 trap_diag_field_cause_str +80011277 l .data 00000000 trap_diag_field_epc_str +80011295 l .data 00000000 trap_diag_field_tval_str +800112b4 l .data 00000000 trap_diag_field_ip_str +800112dc l .data 00000000 trap_diag_field_tval2_str +80011308 l .data 00000000 trap_diag_field_tinst_str +80011334 l .data 00000000 trap_diag_field_intid_str +80011372 l .data 00000000 trap_diag_expected_str +80011389 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +800113a0 l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +800113b7 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +8001142d l .data 00000000 trap_diag_hint_vect_str +80011503 l .data 00000000 trap_diag_hint_cause_str +800115f6 l .data 00000000 trap_diag_hint_epc_str +800116f1 l .data 00000000 trap_diag_hint_tval_str +800117d8 l .data 00000000 trap_diag_hint_ip_str +800113e5 l .data 00000000 trap_diag_generic_str +800103ce l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +8000fd50 l .data 00000000 trap_excpt_name_tbl +8000fdb0 l .data 00000000 trap_int_name_tbl +800101ee l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +8000fd00 l .data 00000000 csr_context_ret_addr +800103ef l .data 00000000 mepcstr +800103ff l .data 00000000 mcausestr +8000fd10 l .data 00000000 saved_xcause +8001040f l .data 00000000 mtvalstr +8000fd18 l .data 00000000 saved_xtval +8001041f l .data 00000000 mstatusstr +8000fd20 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800210e4 l .text.rvmodel 00000000 uart_init +800210e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80021120 l .text.rvmodel 00000000 init_Mscratch +80021128 l .text.rvmodel 00000000 init_Mtimecmp +8002113c l .text.rvmodel 00000000 init_Medeleg +80021144 l .text.rvmodel 00000000 init_Msatp +80021144 l .text.rvmodel 00000000 init_Mtvec +80021264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80021224 l .text.rvmodel 00000000 abortMtest +8002117c l .text.rvmodel 00000000 init_Mtramp +800211ec l .text.rvmodel 00000000 overwt_tt_Mloop +800211ec l .text.rvmodel 00000000 ovlpok_Mtramp +80021214 l .text.rvmodel 00000000 endcopy_Mtramp +80021268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80021324 l .text.rvmodel 00000000 rvtest_init_regs +80011910 l .data 00000000 signature_base +800214c0 l .text.rvmodel 00000000 canary_check +80010eaf l .data 00000000 canary_mismatch +800215b0 l .text.rvmodel 00000000 write_tohost_pass +800215b8 l .text.rvmodel 00000000 pass +800215d0 l .text.rvmodel 00000000 write_tohost_fail +800215d8 l .text.rvmodel 00000000 fail +800215e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800215f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80021600 l .text.rvmodel 00000000 rvtest_set_mext_int +80021614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +8000fd50 l .data 00000000 end_failure_scratch +8000fdf0 l .data 00000000 trap_excpt_name_0 +8000fe10 l .data 00000000 trap_excpt_name_1 +8000fe2a l .data 00000000 trap_excpt_name_2 +8000fe3f l .data 00000000 trap_excpt_name_3 +8000fe4b l .data 00000000 trap_excpt_name_4 +8000fe64 l .data 00000000 trap_excpt_name_5 +8000fe77 l .data 00000000 trap_excpt_name_6 +8000fe95 l .data 00000000 trap_excpt_name_7 +8000fead l .data 00000000 trap_excpt_name_8 +8000fecb l .data 00000000 trap_excpt_name_9 +8000fee9 l .data 00000000 trap_excpt_name_10 +8000ff08 l .data 00000000 trap_excpt_name_11 +8000ff26 l .data 00000000 trap_excpt_name_12 +8000ff3e l .data 00000000 trap_excpt_name_13 +8000ff4f l .data 00000000 trap_excpt_name_14 +8000ff5e l .data 00000000 trap_excpt_name_15 +8000ff74 l .data 00000000 trap_excpt_name_16 +8000ff81 l .data 00000000 trap_excpt_name_17 +8000ff90 l .data 00000000 trap_excpt_name_18 +8000ffa0 l .data 00000000 trap_excpt_name_19 +8000ffb0 l .data 00000000 trap_excpt_name_20 +8000ffce l .data 00000000 trap_excpt_name_21 +8000ffe5 l .data 00000000 trap_excpt_name_22 +8000fffa l .data 00000000 trap_excpt_name_23 +80010016 l .data 00000000 trap_int_name_0 +8001002e l .data 00000000 trap_int_name_1 +8001004d l .data 00000000 trap_int_name_2 +80010074 l .data 00000000 trap_int_name_3 +80010090 l .data 00000000 trap_int_name_4 +800100a8 l .data 00000000 trap_int_name_5 +800100c4 l .data 00000000 trap_int_name_6 +800100e8 l .data 00000000 trap_int_name_7 +80010101 l .data 00000000 trap_int_name_8 +80010119 l .data 00000000 trap_int_name_9 +80010138 l .data 00000000 trap_int_name_10 +8001015f l .data 00000000 trap_int_name_11 +8001017b l .data 00000000 trap_int_name_12 +800101a0 l .data 00000000 trap_int_name_13 +800101bc l .data 00000000 trap_int_name_14 +800101d5 l .data 00000000 trap_int_name_15 +8001039b l .data 00000000 xepcstr +80010a39 l .data 00000000 Mclr_Vext_int_str +80010a93 l .data 00000000 Sclr_Mext_int_str +80010b34 l .data 00000000 Sclr_Vext_int_str +80010b8e l .data 00000000 Hclr_Mext_int_str +80010c31 l .data 00000000 Hclr_Vext_int_str +80010c8c l .data 00000000 Vclr_Mext_int_str +80010cdc l .data 00000000 Vclr_Sext_int_str +80010d2f l .data 00000000 Vclr_Vext_int_str +800113ce l .data 00000000 trap_diag_curr_xepc_str +800209d0 g .data 00000000 end_signature +80021580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800209d0 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044dc g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80011910 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004484 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80011910 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +80011901 g .data 00000000 rvtest_data_end +80004484 g .text.rvtest 00000000 cleanup_epilogs +80022000 g .text.rvmodel 00000000 _end +80020b00 g .tohost 00000000 fromhost +80020a00 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00021097 auipc x1,0x21 +80000004: 0e408093 addi x1,x1,228 # 800210e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xf8598968 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xb75a1843 +80000048: 0001ac03 lw x24,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zbkx_xperm8_cg_cp_rs1_b0: + xperm8 x25, x0, x24 # perform operation +80000050: 29804cb3 xperm8 x25,x0,x24 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkx_xperm8_cg_cp_rs1_b0, Zbkx_xperm8_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01920863 beq x4,x25,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6bb9f309 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x27d3c8b1 +80000074: 0001a503 lw x10,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zbkx_xperm8_cg_cp_rs1_b1: + xperm8 x11, x1, x10 # perform operation +8000007c: 28a0c5b3 xperm8 x11,x1,x10 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkx_xperm8_cg_cp_rs1_b1, Zbkx_xperm8_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00b20863 beq x4,x11,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009023 .word 0x80009023 +80000094: 00410113 addi x2,x2,4 + + mv x11, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010593 addi x11,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x06ae7ef7 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x229052d6 +800000a4: 0001a003 lw x0,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zbkx_xperm8_cg_cp_rs1_b2: + xperm8 x1, x2, x0 # perform operation +800000ac: 280140b3 xperm8 x1,x2,x0 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkx_xperm8_cg_cp_rs1_b2, Zbkx_xperm8_cg_cp_rs1_b2_str) +800000b0: 0005a203 lw x4,0(x11) +800000b4: 00120863 beq x4,x1,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009056 .word 0x80009056 +800000c4: 00458593 addi x11,x11,4 + + mv x16, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018813 addi x16,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x35402d17 +800000cc: 00082183 lw x3,0(x16) +800000d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xff58eb51 +800000d4: 00082b83 lw x23,0(x16) +800000d8: 00480813 addi x16,x16,4 + +800000dc : +Zbkx_xperm8_cg_cp_rs1_b3: + xperm8 x29, x3, x23 # perform operation +800000dc: 2971ceb3 xperm8 x29,x3,x23 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkx_xperm8_cg_cp_rs1_b3, Zbkx_xperm8_cg_cp_rs1_b3_str) +800000e0: 0005a203 lw x4,0(x11) +800000e4: 01d20863 beq x4,x29,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009089 .word 0x80009089 +800000f4: 00458593 addi x11,x11,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x2f27ea5b +80000100: 00082203 lw x4,0(x16) +80000104: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x6c02541c +80000108: 00082783 lw x15,0(x16) +8000010c: 00480813 addi x16,x16,4 + +80000110 : +Zbkx_xperm8_cg_cp_rs1_b4: + xperm8 x18, x4, x15 # perform operation +80000110: 28f24933 xperm8 x18,x4,x15 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zbkx_xperm8_cg_cp_rs1_b4, Zbkx_xperm8_cg_cp_rs1_b4_str) +80000114: 0005a383 lw x7,0(x11) +80000118: 01238863 beq x7,x18,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090bc .word 0x800090bc +80000128: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x4267678e +8000012c: 00082283 lw x5,0(x16) +80000130: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x6681a0cc +80000134: 00082483 lw x9,0(x16) +80000138: 00480813 addi x16,x16,4 + +8000013c : +Zbkx_xperm8_cg_cp_rs1_b5: + xperm8 x29, x5, x9 # perform operation +8000013c: 2892ceb3 xperm8 x29,x5,x9 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkx_xperm8_cg_cp_rs1_b5, Zbkx_xperm8_cg_cp_rs1_b5_str) +80000140: 0005a383 lw x7,0(x11) +80000144: 01d38863 beq x7,x29,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 800090ef .word 0x800090ef +80000154: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x6b6ae4f9 +80000158: 00082303 lw x6,0(x16) +8000015c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x34c1c2ca +80000160: 00082d83 lw x27,0(x16) +80000164: 00480813 addi x16,x16,4 + +80000168 : +Zbkx_xperm8_cg_cp_rs1_b6: + xperm8 x29, x6, x27 # perform operation +80000168: 29b34eb3 xperm8 x29,x6,x27 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zbkx_xperm8_cg_cp_rs1_b6, Zbkx_xperm8_cg_cp_rs1_b6_str) +8000016c: 0005a383 lw x7,0(x11) +80000170: 01d38863 beq x7,x29,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009122 .word 0x80009122 +80000180: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xb27aa2ec +8000018c: 00082383 lw x7,0(x16) +80000190: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xaf7bbe26 +80000194: 00082603 lw x12,0(x16) +80000198: 00480813 addi x16,x16,4 + +8000019c : +Zbkx_xperm8_cg_cp_rs1_b7: + xperm8 x18, x7, x12 # perform operation +8000019c: 28c3c933 xperm8 x18,x7,x12 + # Check if x18 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x18, Zbkx_xperm8_cg_cp_rs1_b7, Zbkx_xperm8_cg_cp_rs1_b7_str) +800001a0: 0005a683 lw x13,0(x11) +800001a4: 01268863 beq x13,x18,800001b4 +800001a8: 3980576f jal x14,80005540 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009155 .word 0x80009155 +800001b4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x197ac845 +800001b8: 00082403 lw x8,0(x16) +800001bc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x5f5ba255 +800001c0: 00082a83 lw x21,0(x16) +800001c4: 00480813 addi x16,x16,4 + +800001c8 : +Zbkx_xperm8_cg_cp_rs1_b8: + xperm8 x29, x8, x21 # perform operation +800001c8: 29544eb3 xperm8 x29,x8,x21 + # Check if x29 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x29, Zbkx_xperm8_cg_cp_rs1_b8, Zbkx_xperm8_cg_cp_rs1_b8_str) +800001cc: 0005a683 lw x13,0(x11) +800001d0: 01d68863 beq x13,x29,800001e0 +800001d4: 36c0576f jal x14,80005540 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80009188 .word 0x80009188 +800001e0: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xcdb0b82d +800001e4: 00082483 lw x9,0(x16) +800001e8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xa280d001 +800001ec: 00082903 lw x18,0(x16) +800001f0: 00480813 addi x16,x16,4 + +800001f4 : +Zbkx_xperm8_cg_cp_rs1_b9: + xperm8 x23, x9, x18 # perform operation +800001f4: 2924cbb3 xperm8 x23,x9,x18 + # Check if x23 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x23, Zbkx_xperm8_cg_cp_rs1_b9, Zbkx_xperm8_cg_cp_rs1_b9_str) +800001f8: 0005a683 lw x13,0(x11) +800001fc: 01768863 beq x13,x23,8000020c +80000200: 3400576f jal x14,80005540 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091bb .word 0x800091bb +8000020c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x405ed479 +80000210: 00082503 lw x10,0(x16) +80000214: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x617dcaef +80000218: 00082403 lw x8,0(x16) +8000021c: 00480813 addi x16,x16,4 + +80000220 : +Zbkx_xperm8_cg_cp_rs1_b10: + xperm8 x26, x10, x8 # perform operation +80000220: 28854d33 xperm8 x26,x10,x8 + # Check if x26 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x26, Zbkx_xperm8_cg_cp_rs1_b10, Zbkx_xperm8_cg_cp_rs1_b10_str) +80000224: 0005a683 lw x13,0(x11) +80000228: 01a68863 beq x13,x26,80000238 +8000022c: 3140576f jal x14,80005540 +80000230: 80000220 .word 0x80000220 +80000234: 800091ef .word 0x800091ef +80000238: 00458593 addi x11,x11,4 + + mv x28, x11 # switch signature pointer register to avoid conflict with test +8000023c: 00058e13 addi x28,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x1a504299 +80000240: 00082583 lw x11,0(x16) +80000244: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0xfd5c384a +80000248: 00082883 lw x17,0(x16) +8000024c: 00480813 addi x16,x16,4 + +80000250 : +Zbkx_xperm8_cg_cp_rs1_b11: + xperm8 x29, x11, x17 # perform operation +80000250: 2915ceb3 xperm8 x29,x11,x17 + # Check if x29 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x29, Zbkx_xperm8_cg_cp_rs1_b11, Zbkx_xperm8_cg_cp_rs1_b11_str) +80000254: 000e2683 lw x13,0(x28) +80000258: 01d68863 beq x13,x29,80000268 +8000025c: 2e40576f jal x14,80005540 +80000260: 80000250 .word 0x80000250 +80000264: 80009224 .word 0x80009224 +80000268: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x18603424 +8000026c: 00082603 lw x12,0(x16) +80000270: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x0181aa16 +80000274: 00082383 lw x7,0(x16) +80000278: 00480813 addi x16,x16,4 + +8000027c : +Zbkx_xperm8_cg_cp_rs1_b12: + xperm8 x1, x12, x7 # perform operation +8000027c: 287640b3 xperm8 x1,x12,x7 + # Check if x1 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x1, Zbkx_xperm8_cg_cp_rs1_b12, Zbkx_xperm8_cg_cp_rs1_b12_str) +80000280: 000e2683 lw x13,0(x28) +80000284: 00168863 beq x13,x1,80000294 +80000288: 2b80576f jal x14,80005540 +8000028c: 8000027c .word 0x8000027c +80000290: 80009259 .word 0x80009259 +80000294: 004e0e13 addi x28,x28,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000298: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000029c: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xf21ae77d +800002a0: 00082683 lw x13,0(x16) +800002a4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x82322972 +800002a8: 00082d03 lw x26,0(x16) +800002ac: 00480813 addi x16,x16,4 + +800002b0 : +Zbkx_xperm8_cg_cp_rs1_b13: + xperm8 x18, x13, x26 # perform operation +800002b0: 29a6c933 xperm8 x18,x13,x26 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zbkx_xperm8_cg_cp_rs1_b13, Zbkx_xperm8_cg_cp_rs1_b13_str) +800002b4: 000e2383 lw x7,0(x28) +800002b8: 01238863 beq x7,x18,800002c8 +800002bc: 25c0546f jal x8,80005518 +800002c0: 800002b0 .word 0x800002b0 +800002c4: 8000928e .word 0x8000928e +800002c8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x9a746ec0 +800002cc: 00082703 lw x14,0(x16) +800002d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x289cbb47 +800002d4: 00082783 lw x15,0(x16) +800002d8: 00480813 addi x16,x16,4 + +800002dc : +Zbkx_xperm8_cg_cp_rs1_b14: + xperm8 x13, x14, x15 # perform operation +800002dc: 28f746b3 xperm8 x13,x14,x15 + # Check if x13 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_b14, Zbkx_xperm8_cg_cp_rs1_b14_str) +800002e0: 000e2383 lw x7,0(x28) +800002e4: 00d38863 beq x7,x13,800002f4 +800002e8: 2300546f jal x8,80005518 +800002ec: 800002dc .word 0x800002dc +800002f0: 800092c3 .word 0x800092c3 +800002f4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xd9c1d01d +800002f8: 00082783 lw x15,0(x16) +800002fc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0xd6df0393 +80000300: 00082a03 lw x20,0(x16) +80000304: 00480813 addi x16,x16,4 + +80000308 : +Zbkx_xperm8_cg_cp_rs1_b15: + xperm8 x9, x15, x20 # perform operation +80000308: 2947c4b3 xperm8 x9,x15,x20 + # Check if x9 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x9, Zbkx_xperm8_cg_cp_rs1_b15, Zbkx_xperm8_cg_cp_rs1_b15_str) +8000030c: 000e2383 lw x7,0(x28) +80000310: 00938863 beq x7,x9,80000320 +80000314: 2040546f jal x8,80005518 +80000318: 80000308 .word 0x80000308 +8000031c: 800092f8 .word 0x800092f8 +80000320: 004e0e13 addi x28,x28,4 + + mv x27, x16 # switch data pointer register to avoid conflict with test +80000324: 00080d93 addi x27,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x85bae6ba +80000328: 000da803 lw x16,0(x27) +8000032c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs2: x30 = 0x630eaa46 +80000330: 000daf03 lw x30,0(x27) +80000334: 004d8d93 addi x27,x27,4 + +80000338 : +Zbkx_xperm8_cg_cp_rs1_b16: + xperm8 x13, x16, x30 # perform operation +80000338: 29e846b3 xperm8 x13,x16,x30 + # Check if x13 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_b16, Zbkx_xperm8_cg_cp_rs1_b16_str) +8000033c: 000e2383 lw x7,0(x28) +80000340: 00d38863 beq x7,x13,80000350 +80000344: 1d40546f jal x8,80005518 +80000348: 80000338 .word 0x80000338 +8000034c: 8000932d .word 0x8000932d +80000350: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x9ca50efb +80000354: 000da883 lw x17,0(x27) +80000358: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xbe4b8a3f +8000035c: 000daa03 lw x20,0(x27) +80000360: 004d8d93 addi x27,x27,4 + +80000364 : +Zbkx_xperm8_cg_cp_rs1_b17: + xperm8 x5, x17, x20 # perform operation +80000364: 2948c2b3 xperm8 x5,x17,x20 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zbkx_xperm8_cg_cp_rs1_b17, Zbkx_xperm8_cg_cp_rs1_b17_str) +80000368: 000e2383 lw x7,0(x28) +8000036c: 00538863 beq x7,x5,8000037c +80000370: 1a80546f jal x8,80005518 +80000374: 80000364 .word 0x80000364 +80000378: 80009362 .word 0x80009362 +8000037c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0xacb3ce58 +80000380: 000da903 lw x18,0(x27) +80000384: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0x85229969 +80000388: 000da283 lw x5,0(x27) +8000038c: 004d8d93 addi x27,x27,4 + +80000390 : +Zbkx_xperm8_cg_cp_rs1_b18: + xperm8 x25, x18, x5 # perform operation +80000390: 28594cb3 xperm8 x25,x18,x5 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkx_xperm8_cg_cp_rs1_b18, Zbkx_xperm8_cg_cp_rs1_b18_str) +80000394: 000e2383 lw x7,0(x28) +80000398: 01938863 beq x7,x25,800003a8 +8000039c: 17c0546f jal x8,80005518 +800003a0: 80000390 .word 0x80000390 +800003a4: 80009397 .word 0x80009397 +800003a8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0xe166c40a +800003ac: 000da983 lw x19,0(x27) +800003b0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs2: x29 = 0xdc46d197 +800003b4: 000dae83 lw x29,0(x27) +800003b8: 004d8d93 addi x27,x27,4 + +800003bc : +Zbkx_xperm8_cg_cp_rs1_b19: + xperm8 x26, x19, x29 # perform operation +800003bc: 29d9cd33 xperm8 x26,x19,x29 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkx_xperm8_cg_cp_rs1_b19, Zbkx_xperm8_cg_cp_rs1_b19_str) +800003c0: 000e2383 lw x7,0(x28) +800003c4: 01a38863 beq x7,x26,800003d4 +800003c8: 1500546f jal x8,80005518 +800003cc: 800003bc .word 0x800003bc +800003d0: 800093cc .word 0x800093cc +800003d4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x6cbe30d6 +800003d8: 000daa03 lw x20,0(x27) +800003dc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0xdd1459c4 +800003e0: 000da503 lw x10,0(x27) +800003e4: 004d8d93 addi x27,x27,4 + +800003e8 : +Zbkx_xperm8_cg_cp_rs1_b20: + xperm8 x5, x20, x10 # perform operation +800003e8: 28aa42b3 xperm8 x5,x20,x10 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zbkx_xperm8_cg_cp_rs1_b20, Zbkx_xperm8_cg_cp_rs1_b20_str) +800003ec: 000e2383 lw x7,0(x28) +800003f0: 00538863 beq x7,x5,80000400 +800003f4: 1240546f jal x8,80005518 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 80009401 .word 0x80009401 +80000400: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xc3da6751 +80000404: 000daa83 lw x21,0(x27) +80000408: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0x3e8f6bd6 +8000040c: 000da483 lw x9,0(x27) +80000410: 004d8d93 addi x27,x27,4 + +80000414 : +Zbkx_xperm8_cg_cp_rs1_b21: + xperm8 x26, x21, x9 # perform operation +80000414: 289acd33 xperm8 x26,x21,x9 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkx_xperm8_cg_cp_rs1_b21, Zbkx_xperm8_cg_cp_rs1_b21_str) +80000418: 000e2383 lw x7,0(x28) +8000041c: 01a38863 beq x7,x26,8000042c +80000420: 0f80546f jal x8,80005518 +80000424: 80000414 .word 0x80000414 +80000428: 80009436 .word 0x80009436 +8000042c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x6265efe2 +80000430: 000dab03 lw x22,0(x27) +80000434: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0x87763998 +80000438: 000da303 lw x6,0(x27) +8000043c: 004d8d93 addi x27,x27,4 + +80000440 : +Zbkx_xperm8_cg_cp_rs1_b22: + xperm8 x16, x22, x6 # perform operation +80000440: 286b4833 xperm8 x16,x22,x6 + # Check if x16 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_b22, Zbkx_xperm8_cg_cp_rs1_b22_str) +80000444: 000e2383 lw x7,0(x28) +80000448: 01038863 beq x7,x16,80000458 +8000044c: 0cc0546f jal x8,80005518 +80000450: 80000440 .word 0x80000440 +80000454: 8000946b .word 0x8000946b +80000458: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x77d9d350 +8000045c: 000dab83 lw x23,0(x27) +80000460: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x0775b0fd +80000464: 000da703 lw x14,0(x27) +80000468: 004d8d93 addi x27,x27,4 + +8000046c : +Zbkx_xperm8_cg_cp_rs1_b23: + xperm8 x13, x23, x14 # perform operation +8000046c: 28ebc6b3 xperm8 x13,x23,x14 + # Check if x13 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_b23, Zbkx_xperm8_cg_cp_rs1_b23_str) +80000470: 000e2383 lw x7,0(x28) +80000474: 00d38863 beq x7,x13,80000484 +80000478: 0a00546f jal x8,80005518 +8000047c: 8000046c .word 0x8000046c +80000480: 800094a0 .word 0x800094a0 +80000484: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xd2cd2aef +80000488: 000dac03 lw x24,0(x27) +8000048c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x1d8d1772 +80000490: 000dab03 lw x22,0(x27) +80000494: 004d8d93 addi x27,x27,4 + +80000498 : +Zbkx_xperm8_cg_cp_rs1_b24: + xperm8 x26, x24, x22 # perform operation +80000498: 296c4d33 xperm8 x26,x24,x22 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkx_xperm8_cg_cp_rs1_b24, Zbkx_xperm8_cg_cp_rs1_b24_str) +8000049c: 000e2383 lw x7,0(x28) +800004a0: 01a38863 beq x7,x26,800004b0 +800004a4: 0740546f jal x8,80005518 +800004a8: 80000498 .word 0x80000498 +800004ac: 800094d5 .word 0x800094d5 +800004b0: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x6f301f90 +800004b4: 000dac83 lw x25,0(x27) +800004b8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x8c010dbc +800004bc: 000da883 lw x17,0(x27) +800004c0: 004d8d93 addi x27,x27,4 + +800004c4 : +Zbkx_xperm8_cg_cp_rs1_b25: + xperm8 x20, x25, x17 # perform operation +800004c4: 291cca33 xperm8 x20,x25,x17 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zbkx_xperm8_cg_cp_rs1_b25, Zbkx_xperm8_cg_cp_rs1_b25_str) +800004c8: 000e2383 lw x7,0(x28) +800004cc: 01438863 beq x7,x20,800004dc +800004d0: 0480546f jal x8,80005518 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 8000950a .word 0x8000950a +800004dc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xf7aa36e6 +800004e0: 000dad03 lw x26,0(x27) +800004e4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x4abf9f26 +800004e8: 000da803 lw x16,0(x27) +800004ec: 004d8d93 addi x27,x27,4 + +800004f0 : +Zbkx_xperm8_cg_cp_rs1_b26: + xperm8 x11, x26, x16 # perform operation +800004f0: 290d45b3 xperm8 x11,x26,x16 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zbkx_xperm8_cg_cp_rs1_b26, Zbkx_xperm8_cg_cp_rs1_b26_str) +800004f4: 000e2383 lw x7,0(x28) +800004f8: 00b38863 beq x7,x11,80000508 +800004fc: 01c0546f jal x8,80005518 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000953f .word 0x8000953f +80000508: 004e0e13 addi x28,x28,4 + + mv x26, x27 # switch data pointer register to avoid conflict with test +8000050c: 000d8d13 addi x26,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x2344b6f1 +80000510: 000d2d83 lw x27,0(x26) +80000514: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x3168ab92 +80000518: 000d2503 lw x10,0(x26) +8000051c: 004d0d13 addi x26,x26,4 + +80000520 : +Zbkx_xperm8_cg_cp_rs1_b27: + xperm8 x17, x27, x10 # perform operation +80000520: 28adc8b3 xperm8 x17,x27,x10 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zbkx_xperm8_cg_cp_rs1_b27, Zbkx_xperm8_cg_cp_rs1_b27_str) +80000524: 000e2383 lw x7,0(x28) +80000528: 01138863 beq x7,x17,80000538 +8000052c: 7ed0446f jal x8,80005518 +80000530: 80000520 .word 0x80000520 +80000534: 80009574 .word 0x80009574 +80000538: 004e0e13 addi x28,x28,4 + + mv x10, x28 # switch signature pointer register to avoid conflict with test +8000053c: 000e0513 addi x10,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x076a8c1e +80000540: 000d2e03 lw x28,0(x26) +80000544: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x45cced07 +80000548: 000d2603 lw x12,0(x26) +8000054c: 004d0d13 addi x26,x26,4 + +80000550 : +Zbkx_xperm8_cg_cp_rs1_b28: + xperm8 x0, x28, x12 # perform operation +80000550: 28ce4033 xperm8 x0,x28,x12 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkx_xperm8_cg_cp_rs1_b28, Zbkx_xperm8_cg_cp_rs1_b28_str) +80000554: 00052383 lw x7,0(x10) +80000558: 00038863 beq x7,x0,80000568 +8000055c: 7bd0446f jal x8,80005518 +80000560: 80000550 .word 0x80000550 +80000564: 800095a9 .word 0x800095a9 +80000568: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x9271cd85 +8000056c: 000d2e83 lw x29,0(x26) +80000570: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x32c5b0ca +80000574: 000d2b03 lw x22,0(x26) +80000578: 004d0d13 addi x26,x26,4 + +8000057c : +Zbkx_xperm8_cg_cp_rs1_b29: + xperm8 x15, x29, x22 # perform operation +8000057c: 296ec7b3 xperm8 x15,x29,x22 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zbkx_xperm8_cg_cp_rs1_b29, Zbkx_xperm8_cg_cp_rs1_b29_str) +80000580: 00052383 lw x7,0(x10) +80000584: 00f38863 beq x7,x15,80000594 +80000588: 7910446f jal x8,80005518 +8000058c: 8000057c .word 0x8000057c +80000590: 800095de .word 0x800095de +80000594: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x0792edf7 +80000598: 000d2f03 lw x30,0(x26) +8000059c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x08da7370 +800005a0: 000d2b03 lw x22,0(x26) +800005a4: 004d0d13 addi x26,x26,4 + +800005a8 : +Zbkx_xperm8_cg_cp_rs1_b30: + xperm8 x16, x30, x22 # perform operation +800005a8: 296f4833 xperm8 x16,x30,x22 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_b30, Zbkx_xperm8_cg_cp_rs1_b30_str) +800005ac: 00052383 lw x7,0(x10) +800005b0: 01038863 beq x7,x16,800005c0 +800005b4: 7650446f jal x8,80005518 +800005b8: 800005a8 .word 0x800005a8 +800005bc: 80009613 .word 0x80009613 +800005c0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xa37044e0 +800005c4: 000d2f83 lw x31,0(x26) +800005c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x08e8eb05 +800005cc: 000d2903 lw x18,0(x26) +800005d0: 004d0d13 addi x26,x26,4 + +800005d4 : +Zbkx_xperm8_cg_cp_rs1_b31: + xperm8 x15, x31, x18 # perform operation +800005d4: 292fc7b3 xperm8 x15,x31,x18 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zbkx_xperm8_cg_cp_rs1_b31, Zbkx_xperm8_cg_cp_rs1_b31_str) +800005d8: 00052383 lw x7,0(x10) +800005dc: 00f38863 beq x7,x15,800005ec +800005e0: 7390446f jal x8,80005518 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 80009648 .word 0x80009648 +800005ec: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x9adcb3f4 +800005f0: 000d2c83 lw x25,0(x26) +800005f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0x264329d7 +800005f8: 000d2003 lw x0,0(x26) +800005fc: 004d0d13 addi x26,x26,4 + +80000600 : +Zbkx_xperm8_cg_cp_rs2_b0: + xperm8 x21, x25, x0 # perform operation +80000600: 280ccab3 xperm8 x21,x25,x0 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zbkx_xperm8_cg_cp_rs2_b0, Zbkx_xperm8_cg_cp_rs2_b0_str) +80000604: 00052383 lw x7,0(x10) +80000608: 01538863 beq x7,x21,80000618 +8000060c: 70d0446f jal x8,80005518 +80000610: 80000600 .word 0x80000600 +80000614: 8000967d .word 0x8000967d +80000618: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xf1723612 +8000061c: 000d2103 lw x2,0(x26) +80000620: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xc2bf5d6b +80000624: 000d2083 lw x1,0(x26) +80000628: 004d0d13 addi x26,x26,4 + +8000062c : +Zbkx_xperm8_cg_cp_rs2_b1: + xperm8 x4, x2, x1 # perform operation +8000062c: 28114233 xperm8 x4,x2,x1 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkx_xperm8_cg_cp_rs2_b1, Zbkx_xperm8_cg_cp_rs2_b1_str) +80000630: 00052383 lw x7,0(x10) +80000634: 00438863 beq x7,x4,80000644 +80000638: 6e10446f jal x8,80005518 +8000063c: 8000062c .word 0x8000062c +80000640: 800096b1 .word 0x800096b1 +80000644: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x1900a650 +80000648: 000d2183 lw x3,0(x26) +8000064c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xd49bd2c3 +80000650: 000d2103 lw x2,0(x26) +80000654: 004d0d13 addi x26,x26,4 + +80000658 : +Zbkx_xperm8_cg_cp_rs2_b2: + xperm8 x19, x3, x2 # perform operation +80000658: 2821c9b3 xperm8 x19,x3,x2 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkx_xperm8_cg_cp_rs2_b2, Zbkx_xperm8_cg_cp_rs2_b2_str) +8000065c: 00052383 lw x7,0(x10) +80000660: 01338863 beq x7,x19,80000670 +80000664: 6b50446f jal x8,80005518 +80000668: 80000658 .word 0x80000658 +8000066c: 800096e5 .word 0x800096e5 +80000670: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x966cd0f4 +80000674: 000d2a83 lw x21,0(x26) +80000678: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x4f6f50a5 +8000067c: 000d2183 lw x3,0(x26) +80000680: 004d0d13 addi x26,x26,4 + +80000684 : +Zbkx_xperm8_cg_cp_rs2_b3: + xperm8 x25, x21, x3 # perform operation +80000684: 283accb3 xperm8 x25,x21,x3 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkx_xperm8_cg_cp_rs2_b3, Zbkx_xperm8_cg_cp_rs2_b3_str) +80000688: 00052383 lw x7,0(x10) +8000068c: 01938863 beq x7,x25,8000069c +80000690: 6890446f jal x8,80005518 +80000694: 80000684 .word 0x80000684 +80000698: 80009719 .word 0x80009719 +8000069c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x85a6887e +800006a0: 000d2983 lw x19,0(x26) +800006a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x56f84553 +800006a8: 000d2203 lw x4,0(x26) +800006ac: 004d0d13 addi x26,x26,4 + +800006b0 : +Zbkx_xperm8_cg_cp_rs2_b4: + xperm8 x2, x19, x4 # perform operation +800006b0: 2849c133 xperm8 x2,x19,x4 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkx_xperm8_cg_cp_rs2_b4, Zbkx_xperm8_cg_cp_rs2_b4_str) +800006b4: 00052383 lw x7,0(x10) +800006b8: 00238863 beq x7,x2,800006c8 +800006bc: 65d0446f jal x8,80005518 +800006c0: 800006b0 .word 0x800006b0 +800006c4: 8000974d .word 0x8000974d +800006c8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xd810e436 +800006cc: 000d2683 lw x13,0(x26) +800006d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0x89c15e23 +800006d4: 000d2283 lw x5,0(x26) +800006d8: 004d0d13 addi x26,x26,4 + +800006dc : +Zbkx_xperm8_cg_cp_rs2_b5: + xperm8 x29, x13, x5 # perform operation +800006dc: 2856ceb3 xperm8 x29,x13,x5 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkx_xperm8_cg_cp_rs2_b5, Zbkx_xperm8_cg_cp_rs2_b5_str) +800006e0: 00052383 lw x7,0(x10) +800006e4: 01d38863 beq x7,x29,800006f4 +800006e8: 6310446f jal x8,80005518 +800006ec: 800006dc .word 0x800006dc +800006f0: 80009781 .word 0x80009781 +800006f4: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xf96f4532 +800006f8: 000d2c03 lw x24,0(x26) +800006fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x1ec8d48b +80000700: 000d2303 lw x6,0(x26) +80000704: 004d0d13 addi x26,x26,4 + +80000708 : +Zbkx_xperm8_cg_cp_rs2_b6: + xperm8 x14, x24, x6 # perform operation +80000708: 286c4733 xperm8 x14,x24,x6 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zbkx_xperm8_cg_cp_rs2_b6, Zbkx_xperm8_cg_cp_rs2_b6_str) +8000070c: 00052383 lw x7,0(x10) +80000710: 00e38863 beq x7,x14,80000720 +80000714: 6050446f jal x8,80005518 +80000718: 80000708 .word 0x80000708 +8000071c: 800097b5 .word 0x800097b5 +80000720: 00450513 addi x10,x10,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000724: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000728: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xa7625600 +8000072c: 000d2a03 lw x20,0(x26) +80000730: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x55c9bb70 +80000734: 000d2383 lw x7,0(x26) +80000738: 004d0d13 addi x26,x26,4 + +8000073c : +Zbkx_xperm8_cg_cp_rs2_b7: + xperm8 x19, x20, x7 # perform operation +8000073c: 287a49b3 xperm8 x19,x20,x7 + # Check if x19 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x19, Zbkx_xperm8_cg_cp_rs2_b7, Zbkx_xperm8_cg_cp_rs2_b7_str) +80000740: 00052683 lw x13,0(x10) +80000744: 01368863 beq x13,x19,80000754 +80000748: 5f90476f jal x14,80005540 +8000074c: 8000073c .word 0x8000073c +80000750: 800097e9 .word 0x800097e9 +80000754: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x7bdc4313 +80000758: 000d2d83 lw x27,0(x26) +8000075c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x3eea40fa +80000760: 000d2403 lw x8,0(x26) +80000764: 004d0d13 addi x26,x26,4 + +80000768 : +Zbkx_xperm8_cg_cp_rs2_b8: + xperm8 x18, x27, x8 # perform operation +80000768: 288dc933 xperm8 x18,x27,x8 + # Check if x18 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x18, Zbkx_xperm8_cg_cp_rs2_b8, Zbkx_xperm8_cg_cp_rs2_b8_str) +8000076c: 00052683 lw x13,0(x10) +80000770: 01268863 beq x13,x18,80000780 +80000774: 5cd0476f jal x14,80005540 +80000778: 80000768 .word 0x80000768 +8000077c: 8000981d .word 0x8000981d +80000780: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xd9798f21 +80000784: 000d2a03 lw x20,0(x26) +80000788: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x800d77cb +8000078c: 000d2483 lw x9,0(x26) +80000790: 004d0d13 addi x26,x26,4 + +80000794 : +Zbkx_xperm8_cg_cp_rs2_b9: + xperm8 x4, x20, x9 # perform operation +80000794: 289a4233 xperm8 x4,x20,x9 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zbkx_xperm8_cg_cp_rs2_b9, Zbkx_xperm8_cg_cp_rs2_b9_str) +80000798: 00052683 lw x13,0(x10) +8000079c: 00468863 beq x13,x4,800007ac +800007a0: 5a10476f jal x14,80005540 +800007a4: 80000794 .word 0x80000794 +800007a8: 80009851 .word 0x80009851 +800007ac: 00450513 addi x10,x10,4 + + mv x3, x10 # switch signature pointer register to avoid conflict with test +800007b0: 00050193 addi x3,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x15c0ed66 +800007b4: 000d2283 lw x5,0(x26) +800007b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xa6eab8a7 +800007bc: 000d2503 lw x10,0(x26) +800007c0: 004d0d13 addi x26,x26,4 + +800007c4 : +Zbkx_xperm8_cg_cp_rs2_b10: + xperm8 x2, x5, x10 # perform operation +800007c4: 28a2c133 xperm8 x2,x5,x10 + # Check if x2 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x2, Zbkx_xperm8_cg_cp_rs2_b10, Zbkx_xperm8_cg_cp_rs2_b10_str) +800007c8: 0001a683 lw x13,0(x3) +800007cc: 00268863 beq x13,x2,800007dc +800007d0: 5710476f jal x14,80005540 +800007d4: 800007c4 .word 0x800007c4 +800007d8: 80009885 .word 0x80009885 +800007dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x8f8a51b6 +800007e0: 000d2b83 lw x23,0(x26) +800007e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x49b521a0 +800007e8: 000d2583 lw x11,0(x26) +800007ec: 004d0d13 addi x26,x26,4 + +800007f0 : +Zbkx_xperm8_cg_cp_rs2_b11: + xperm8 x12, x23, x11 # perform operation +800007f0: 28bbc633 xperm8 x12,x23,x11 + # Check if x12 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x12, Zbkx_xperm8_cg_cp_rs2_b11, Zbkx_xperm8_cg_cp_rs2_b11_str) +800007f4: 0001a683 lw x13,0(x3) +800007f8: 00c68863 beq x13,x12,80000808 +800007fc: 5450476f jal x14,80005540 +80000800: 800007f0 .word 0x800007f0 +80000804: 800098ba .word 0x800098ba +80000808: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xb64630a5 +8000080c: 000d2783 lw x15,0(x26) +80000810: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x2ce12259 +80000814: 000d2603 lw x12,0(x26) +80000818: 004d0d13 addi x26,x26,4 + +8000081c : +Zbkx_xperm8_cg_cp_rs2_b12: + xperm8 x1, x15, x12 # perform operation +8000081c: 28c7c0b3 xperm8 x1,x15,x12 + # Check if x1 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x1, Zbkx_xperm8_cg_cp_rs2_b12, Zbkx_xperm8_cg_cp_rs2_b12_str) +80000820: 0001a683 lw x13,0(x3) +80000824: 00168863 beq x13,x1,80000834 +80000828: 5190476f jal x14,80005540 +8000082c: 8000081c .word 0x8000081c +80000830: 800098ef .word 0x800098ef +80000834: 00418193 addi x3,x3,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000838: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000083c: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x3b9e58c8 +80000840: 000d2c03 lw x24,0(x26) +80000844: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x617d45be +80000848: 000d2683 lw x13,0(x26) +8000084c: 004d0d13 addi x26,x26,4 + +80000850 : +Zbkx_xperm8_cg_cp_rs2_b13: + xperm8 x10, x24, x13 # perform operation +80000850: 28dc4533 xperm8 x10,x24,x13 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zbkx_xperm8_cg_cp_rs2_b13, Zbkx_xperm8_cg_cp_rs2_b13_str) +80000854: 0001a203 lw x4,0(x3) +80000858: 00a20863 beq x4,x10,80000868 +8000085c: 4a5042ef jal x5,80005500 +80000860: 80000850 .word 0x80000850 +80000864: 80009924 .word 0x80009924 +80000868: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xd950708d +8000086c: 000d2583 lw x11,0(x26) +80000870: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xbd127ff4 +80000874: 000d2703 lw x14,0(x26) +80000878: 004d0d13 addi x26,x26,4 + +8000087c : +Zbkx_xperm8_cg_cp_rs2_b14: + xperm8 x8, x11, x14 # perform operation +8000087c: 28e5c433 xperm8 x8,x11,x14 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zbkx_xperm8_cg_cp_rs2_b14, Zbkx_xperm8_cg_cp_rs2_b14_str) +80000880: 0001a203 lw x4,0(x3) +80000884: 00820863 beq x4,x8,80000894 +80000888: 479042ef jal x5,80005500 +8000088c: 8000087c .word 0x8000087c +80000890: 80009959 .word 0x80009959 +80000894: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x453ff97d +80000898: 000d2b83 lw x23,0(x26) +8000089c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xa0984260 +800008a0: 000d2783 lw x15,0(x26) +800008a4: 004d0d13 addi x26,x26,4 + +800008a8 : +Zbkx_xperm8_cg_cp_rs2_b15: + xperm8 x14, x23, x15 # perform operation +800008a8: 28fbc733 xperm8 x14,x23,x15 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkx_xperm8_cg_cp_rs2_b15, Zbkx_xperm8_cg_cp_rs2_b15_str) +800008ac: 0001a203 lw x4,0(x3) +800008b0: 00e20863 beq x4,x14,800008c0 +800008b4: 44d042ef jal x5,80005500 +800008b8: 800008a8 .word 0x800008a8 +800008bc: 8000998e .word 0x8000998e +800008c0: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xdd91cf93 +800008c4: 000d2683 lw x13,0(x26) +800008c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x28aad856 +800008cc: 000d2803 lw x16,0(x26) +800008d0: 004d0d13 addi x26,x26,4 + +800008d4 : +Zbkx_xperm8_cg_cp_rs2_b16: + xperm8 x14, x13, x16 # perform operation +800008d4: 2906c733 xperm8 x14,x13,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkx_xperm8_cg_cp_rs2_b16, Zbkx_xperm8_cg_cp_rs2_b16_str) +800008d8: 0001a203 lw x4,0(x3) +800008dc: 00e20863 beq x4,x14,800008ec +800008e0: 421042ef jal x5,80005500 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 800099c3 .word 0x800099c3 +800008ec: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x6513a8de +800008f0: 000d2a03 lw x20,0(x26) +800008f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x21a06036 +800008f8: 000d2883 lw x17,0(x26) +800008fc: 004d0d13 addi x26,x26,4 + +80000900 : +Zbkx_xperm8_cg_cp_rs2_b17: + xperm8 x24, x20, x17 # perform operation +80000900: 291a4c33 xperm8 x24,x20,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkx_xperm8_cg_cp_rs2_b17, Zbkx_xperm8_cg_cp_rs2_b17_str) +80000904: 0001a203 lw x4,0(x3) +80000908: 01820863 beq x4,x24,80000918 +8000090c: 3f5042ef jal x5,80005500 +80000910: 80000900 .word 0x80000900 +80000914: 800099f8 .word 0x800099f8 +80000918: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x88e2b57e +8000091c: 000d2083 lw x1,0(x26) +80000920: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x229d94d8 +80000924: 000d2903 lw x18,0(x26) +80000928: 004d0d13 addi x26,x26,4 + +8000092c : +Zbkx_xperm8_cg_cp_rs2_b18: + xperm8 x20, x1, x18 # perform operation +8000092c: 2920ca33 xperm8 x20,x1,x18 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkx_xperm8_cg_cp_rs2_b18, Zbkx_xperm8_cg_cp_rs2_b18_str) +80000930: 0001a203 lw x4,0(x3) +80000934: 01420863 beq x4,x20,80000944 +80000938: 3c9042ef jal x5,80005500 +8000093c: 8000092c .word 0x8000092c +80000940: 80009a2d .word 0x80009a2d +80000944: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xbd6d793f +80000948: 000d2303 lw x6,0(x26) +8000094c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x2a9598b2 +80000950: 000d2983 lw x19,0(x26) +80000954: 004d0d13 addi x26,x26,4 + +80000958 : +Zbkx_xperm8_cg_cp_rs2_b19: + xperm8 x16, x6, x19 # perform operation +80000958: 29334833 xperm8 x16,x6,x19 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkx_xperm8_cg_cp_rs2_b19, Zbkx_xperm8_cg_cp_rs2_b19_str) +8000095c: 0001a203 lw x4,0(x3) +80000960: 01020863 beq x4,x16,80000970 +80000964: 39d042ef jal x5,80005500 +80000968: 80000958 .word 0x80000958 +8000096c: 80009a62 .word 0x80009a62 +80000970: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x6d3140e9 +80000974: 000d2f03 lw x30,0(x26) +80000978: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x6378369a +8000097c: 000d2a03 lw x20,0(x26) +80000980: 004d0d13 addi x26,x26,4 + +80000984 : +Zbkx_xperm8_cg_cp_rs2_b20: + xperm8 x13, x30, x20 # perform operation +80000984: 294f46b3 xperm8 x13,x30,x20 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkx_xperm8_cg_cp_rs2_b20, Zbkx_xperm8_cg_cp_rs2_b20_str) +80000988: 0001a203 lw x4,0(x3) +8000098c: 00d20863 beq x4,x13,8000099c +80000990: 371042ef jal x5,80005500 +80000994: 80000984 .word 0x80000984 +80000998: 80009a97 .word 0x80009a97 +8000099c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x278264a6 +800009a0: 000d2603 lw x12,0(x26) +800009a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xd1950bdb +800009a8: 000d2a83 lw x21,0(x26) +800009ac: 004d0d13 addi x26,x26,4 + +800009b0 : +Zbkx_xperm8_cg_cp_rs2_b21: + xperm8 x18, x12, x21 # perform operation +800009b0: 29564933 xperm8 x18,x12,x21 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkx_xperm8_cg_cp_rs2_b21, Zbkx_xperm8_cg_cp_rs2_b21_str) +800009b4: 0001a203 lw x4,0(x3) +800009b8: 01220863 beq x4,x18,800009c8 +800009bc: 345042ef jal x5,80005500 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 80009acc .word 0x80009acc +800009c8: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x7da48baa +800009cc: 000d2903 lw x18,0(x26) +800009d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x53d92c46 +800009d4: 000d2b03 lw x22,0(x26) +800009d8: 004d0d13 addi x26,x26,4 + +800009dc : +Zbkx_xperm8_cg_cp_rs2_b22: + xperm8 x17, x18, x22 # perform operation +800009dc: 296948b3 xperm8 x17,x18,x22 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkx_xperm8_cg_cp_rs2_b22, Zbkx_xperm8_cg_cp_rs2_b22_str) +800009e0: 0001a203 lw x4,0(x3) +800009e4: 01120863 beq x4,x17,800009f4 +800009e8: 319042ef jal x5,80005500 +800009ec: 800009dc .word 0x800009dc +800009f0: 80009b01 .word 0x80009b01 +800009f4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x3196e6f5 +800009f8: 000d2683 lw x13,0(x26) +800009fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x587f3314 +80000a00: 000d2b83 lw x23,0(x26) +80000a04: 004d0d13 addi x26,x26,4 + +80000a08 : +Zbkx_xperm8_cg_cp_rs2_b23: + xperm8 x25, x13, x23 # perform operation +80000a08: 2976ccb3 xperm8 x25,x13,x23 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkx_xperm8_cg_cp_rs2_b23, Zbkx_xperm8_cg_cp_rs2_b23_str) +80000a0c: 0001a203 lw x4,0(x3) +80000a10: 01920863 beq x4,x25,80000a20 +80000a14: 2ed042ef jal x5,80005500 +80000a18: 80000a08 .word 0x80000a08 +80000a1c: 80009b36 .word 0x80009b36 +80000a20: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xe422f67b +80000a24: 000d2a03 lw x20,0(x26) +80000a28: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xf4bbab71 +80000a2c: 000d2c03 lw x24,0(x26) +80000a30: 004d0d13 addi x26,x26,4 + +80000a34 : +Zbkx_xperm8_cg_cp_rs2_b24: + xperm8 x16, x20, x24 # perform operation +80000a34: 298a4833 xperm8 x16,x20,x24 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkx_xperm8_cg_cp_rs2_b24, Zbkx_xperm8_cg_cp_rs2_b24_str) +80000a38: 0001a203 lw x4,0(x3) +80000a3c: 01020863 beq x4,x16,80000a4c +80000a40: 2c1042ef jal x5,80005500 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 80009b6b .word 0x80009b6b +80000a4c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xeabc6561 +80000a50: 000d2603 lw x12,0(x26) +80000a54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xacad291f +80000a58: 000d2c83 lw x25,0(x26) +80000a5c: 004d0d13 addi x26,x26,4 + +80000a60 : +Zbkx_xperm8_cg_cp_rs2_b25: + xperm8 x22, x12, x25 # perform operation +80000a60: 29964b33 xperm8 x22,x12,x25 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkx_xperm8_cg_cp_rs2_b25, Zbkx_xperm8_cg_cp_rs2_b25_str) +80000a64: 0001a203 lw x4,0(x3) +80000a68: 01620863 beq x4,x22,80000a78 +80000a6c: 295042ef jal x5,80005500 +80000a70: 80000a60 .word 0x80000a60 +80000a74: 80009ba0 .word 0x80009ba0 +80000a78: 00418193 addi x3,x3,4 + + mv x2, x26 # switch data pointer register to avoid conflict with test +80000a7c: 000d0113 addi x2,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xe1e8d3f9 +80000a80: 00012e83 lw x29,0(x2) +80000a84: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xbdf2433d +80000a88: 00012d03 lw x26,0(x2) +80000a8c: 00410113 addi x2,x2,4 + +80000a90 : +Zbkx_xperm8_cg_cp_rs2_b26: + xperm8 x28, x29, x26 # perform operation +80000a90: 29aece33 xperm8 x28,x29,x26 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkx_xperm8_cg_cp_rs2_b26, Zbkx_xperm8_cg_cp_rs2_b26_str) +80000a94: 0001a203 lw x4,0(x3) +80000a98: 01c20863 beq x4,x28,80000aa8 +80000a9c: 265042ef jal x5,80005500 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 80009bd5 .word 0x80009bd5 +80000aa8: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x644bd3bb +80000aac: 00012e03 lw x28,0(x2) +80000ab0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xf4cd33c5 +80000ab4: 00012d83 lw x27,0(x2) +80000ab8: 00410113 addi x2,x2,4 + +80000abc : +Zbkx_xperm8_cg_cp_rs2_b27: + xperm8 x31, x28, x27 # perform operation +80000abc: 29be4fb3 xperm8 x31,x28,x27 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkx_xperm8_cg_cp_rs2_b27, Zbkx_xperm8_cg_cp_rs2_b27_str) +80000ac0: 0001a203 lw x4,0(x3) +80000ac4: 01f20863 beq x4,x31,80000ad4 +80000ac8: 239042ef jal x5,80005500 +80000acc: 80000abc .word 0x80000abc +80000ad0: 80009c0a .word 0x80009c0a +80000ad4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xe91fe218 +80000ad8: 00012783 lw x15,0(x2) +80000adc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x871db793 +80000ae0: 00012e03 lw x28,0(x2) +80000ae4: 00410113 addi x2,x2,4 + +80000ae8 : +Zbkx_xperm8_cg_cp_rs2_b28: + xperm8 x27, x15, x28 # perform operation +80000ae8: 29c7cdb3 xperm8 x27,x15,x28 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkx_xperm8_cg_cp_rs2_b28, Zbkx_xperm8_cg_cp_rs2_b28_str) +80000aec: 0001a203 lw x4,0(x3) +80000af0: 01b20863 beq x4,x27,80000b00 +80000af4: 20d042ef jal x5,80005500 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 80009c3f .word 0x80009c3f +80000b00: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x2ddb54ad +80000b04: 00012b83 lw x23,0(x2) +80000b08: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x4b645302 +80000b0c: 00012e83 lw x29,0(x2) +80000b10: 00410113 addi x2,x2,4 + +80000b14 : +Zbkx_xperm8_cg_cp_rs2_b29: + xperm8 x20, x23, x29 # perform operation +80000b14: 29dbca33 xperm8 x20,x23,x29 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkx_xperm8_cg_cp_rs2_b29, Zbkx_xperm8_cg_cp_rs2_b29_str) +80000b18: 0001a203 lw x4,0(x3) +80000b1c: 01420863 beq x4,x20,80000b2c +80000b20: 1e1042ef jal x5,80005500 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 80009c74 .word 0x80009c74 +80000b2c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x9106c626 +80000b30: 00012903 lw x18,0(x2) +80000b34: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xbf556cfa +80000b38: 00012f03 lw x30,0(x2) +80000b3c: 00410113 addi x2,x2,4 + +80000b40 : +Zbkx_xperm8_cg_cp_rs2_b30: + xperm8 x29, x18, x30 # perform operation +80000b40: 29e94eb3 xperm8 x29,x18,x30 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkx_xperm8_cg_cp_rs2_b30, Zbkx_xperm8_cg_cp_rs2_b30_str) +80000b44: 0001a203 lw x4,0(x3) +80000b48: 01d20863 beq x4,x29,80000b58 +80000b4c: 1b5042ef jal x5,80005500 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 80009ca9 .word 0x80009ca9 +80000b58: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x3aaaadb8 +80000b5c: 00012083 lw x1,0(x2) +80000b60: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xf9b4055f +80000b64: 00012f83 lw x31,0(x2) +80000b68: 00410113 addi x2,x2,4 + +80000b6c : +Zbkx_xperm8_cg_cp_rs2_b31: + xperm8 x28, x1, x31 # perform operation +80000b6c: 29f0ce33 xperm8 x28,x1,x31 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkx_xperm8_cg_cp_rs2_b31, Zbkx_xperm8_cg_cp_rs2_b31_str) +80000b70: 0001a203 lw x4,0(x3) +80000b74: 01c20863 beq x4,x28,80000b84 +80000b78: 189042ef jal x5,80005500 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 80009cde .word 0x80009cde +80000b84: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x92c96a3b +80000b88: 00012703 lw x14,0(x2) +80000b8c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x5285a4df +80000b90: 00012783 lw x15,0(x2) +80000b94: 00410113 addi x2,x2,4 + +80000b98 : +Zbkx_xperm8_cg_cp_rd_b0: + xperm8 x0, x14, x15 # perform operation +80000b98: 28f74033 xperm8 x0,x14,x15 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkx_xperm8_cg_cp_rd_b0, Zbkx_xperm8_cg_cp_rd_b0_str) +80000b9c: 0001a203 lw x4,0(x3) +80000ba0: 00020863 beq x4,x0,80000bb0 +80000ba4: 15d042ef jal x5,80005500 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 80009d13 .word 0x80009d13 +80000bb0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x385c1a3d +80000bb4: 00012583 lw x11,0(x2) +80000bb8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x030469a7 +80000bbc: 00012f03 lw x30,0(x2) +80000bc0: 00410113 addi x2,x2,4 + +80000bc4 : +Zbkx_xperm8_cg_cp_rd_b1: + xperm8 x1, x11, x30 # perform operation +80000bc4: 29e5c0b3 xperm8 x1,x11,x30 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkx_xperm8_cg_cp_rd_b1, Zbkx_xperm8_cg_cp_rd_b1_str) +80000bc8: 0001a203 lw x4,0(x3) +80000bcc: 00120863 beq x4,x1,80000bdc +80000bd0: 131042ef jal x5,80005500 +80000bd4: 80000bc4 .word 0x80000bc4 +80000bd8: 80009d46 .word 0x80009d46 +80000bdc: 00418193 addi x3,x3,4 + + mv x28, x2 # switch data pointer register to avoid conflict with test +80000be0: 00010e13 addi x28,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0x33346985 +80000be4: 000e2f83 lw x31,0(x28) +80000be8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x03e44322 +80000bec: 000e2e83 lw x29,0(x28) +80000bf0: 004e0e13 addi x28,x28,4 + +80000bf4 : +Zbkx_xperm8_cg_cp_rd_b2: + xperm8 x2, x31, x29 # perform operation +80000bf4: 29dfc133 xperm8 x2,x31,x29 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkx_xperm8_cg_cp_rd_b2, Zbkx_xperm8_cg_cp_rd_b2_str) +80000bf8: 0001a203 lw x4,0(x3) +80000bfc: 00220863 beq x4,x2,80000c0c +80000c00: 101042ef jal x5,80005500 +80000c04: 80000bf4 .word 0x80000bf4 +80000c08: 80009d79 .word 0x80009d79 +80000c0c: 00418193 addi x3,x3,4 + + mv x24, x3 # switch signature pointer register to avoid conflict with test +80000c10: 00018c13 addi x24,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0x8338060c +80000c14: 000e2103 lw x2,0(x28) +80000c18: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x40908b70 +80000c1c: 000e2a03 lw x20,0(x28) +80000c20: 004e0e13 addi x28,x28,4 + +80000c24 : +Zbkx_xperm8_cg_cp_rd_b3: + xperm8 x3, x2, x20 # perform operation +80000c24: 294141b3 xperm8 x3,x2,x20 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zbkx_xperm8_cg_cp_rd_b3, Zbkx_xperm8_cg_cp_rd_b3_str) +80000c28: 000c2203 lw x4,0(x24) +80000c2c: 00320863 beq x4,x3,80000c3c +80000c30: 0d1042ef jal x5,80005500 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80009dac .word 0x80009dac +80000c3c: 004c0c13 addi x24,x24,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c40: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c44: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x5d09bcca +80000c48: 000e2f03 lw x30,0(x28) +80000c4c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0xc55bd810 +80000c50: 000e2d03 lw x26,0(x28) +80000c54: 004e0e13 addi x28,x28,4 + +80000c58 : +Zbkx_xperm8_cg_cp_rd_b4: + xperm8 x4, x30, x26 # perform operation +80000c58: 29af4233 xperm8 x4,x30,x26 + # Check if x4 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x4, Zbkx_xperm8_cg_cp_rd_b4, Zbkx_xperm8_cg_cp_rd_b4_str) +80000c5c: 000c2683 lw x13,0(x24) +80000c60: 00468863 beq x13,x4,80000c70 +80000c64: 0dd0476f jal x14,80005540 +80000c68: 80000c58 .word 0x80000c58 +80000c6c: 80009ddf .word 0x80009ddf +80000c70: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0x45a45c34 +80000c74: 000e2003 lw x0,0(x28) +80000c78: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs2: x8 = 0xfc966a5b +80000c7c: 000e2403 lw x8,0(x28) +80000c80: 004e0e13 addi x28,x28,4 + +80000c84 : +Zbkx_xperm8_cg_cp_rd_b5: + xperm8 x5, x0, x8 # perform operation +80000c84: 288042b3 xperm8 x5,x0,x8 + # Check if x5 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x5, Zbkx_xperm8_cg_cp_rd_b5, Zbkx_xperm8_cg_cp_rd_b5_str) +80000c88: 000c2683 lw x13,0(x24) +80000c8c: 00568863 beq x13,x5,80000c9c +80000c90: 0b10476f jal x14,80005540 +80000c94: 80000c84 .word 0x80000c84 +80000c98: 80009e12 .word 0x80009e12 +80000c9c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x18f6cf8a +80000ca0: 000e2583 lw x11,0(x28) +80000ca4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x50940b30 +80000ca8: 000e2903 lw x18,0(x28) +80000cac: 004e0e13 addi x28,x28,4 + +80000cb0 : +Zbkx_xperm8_cg_cp_rd_b6: + xperm8 x6, x11, x18 # perform operation +80000cb0: 2925c333 xperm8 x6,x11,x18 + # Check if x6 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x6, Zbkx_xperm8_cg_cp_rd_b6, Zbkx_xperm8_cg_cp_rd_b6_str) +80000cb4: 000c2683 lw x13,0(x24) +80000cb8: 00668863 beq x13,x6,80000cc8 +80000cbc: 0850476f jal x14,80005540 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 80009e45 .word 0x80009e45 +80000cc8: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x95afc3e9 +80000ccc: 000e2983 lw x19,0(x28) +80000cd0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x3be72742 +80000cd4: 000e2183 lw x3,0(x28) +80000cd8: 004e0e13 addi x28,x28,4 + +80000cdc : +Zbkx_xperm8_cg_cp_rd_b7: + xperm8 x7, x19, x3 # perform operation +80000cdc: 2839c3b3 xperm8 x7,x19,x3 + # Check if x7 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x7, Zbkx_xperm8_cg_cp_rd_b7, Zbkx_xperm8_cg_cp_rd_b7_str) +80000ce0: 000c2683 lw x13,0(x24) +80000ce4: 00768863 beq x13,x7,80000cf4 +80000ce8: 0590476f jal x14,80005540 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 80009e78 .word 0x80009e78 +80000cf4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x3d30ecf7 +80000cf8: 000e2e83 lw x29,0(x28) +80000cfc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x9a3a0ff1 +80000d00: 000e2d83 lw x27,0(x28) +80000d04: 004e0e13 addi x28,x28,4 + +80000d08 : +Zbkx_xperm8_cg_cp_rd_b8: + xperm8 x8, x29, x27 # perform operation +80000d08: 29bec433 xperm8 x8,x29,x27 + # Check if x8 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x8, Zbkx_xperm8_cg_cp_rd_b8, Zbkx_xperm8_cg_cp_rd_b8_str) +80000d0c: 000c2683 lw x13,0(x24) +80000d10: 00868863 beq x13,x8,80000d20 +80000d14: 02d0476f jal x14,80005540 +80000d18: 80000d08 .word 0x80000d08 +80000d1c: 80009eab .word 0x80009eab +80000d20: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0xac169fb2 +80000d24: 000e2083 lw x1,0(x28) +80000d28: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xeea6787a +80000d2c: 000e2c83 lw x25,0(x28) +80000d30: 004e0e13 addi x28,x28,4 + +80000d34 : +Zbkx_xperm8_cg_cp_rd_b9: + xperm8 x9, x1, x25 # perform operation +80000d34: 2990c4b3 xperm8 x9,x1,x25 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zbkx_xperm8_cg_cp_rd_b9, Zbkx_xperm8_cg_cp_rd_b9_str) +80000d38: 000c2683 lw x13,0(x24) +80000d3c: 00968863 beq x13,x9,80000d4c +80000d40: 0010476f jal x14,80005540 +80000d44: 80000d34 .word 0x80000d34 +80000d48: 80009ede .word 0x80009ede +80000d4c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x97c9682c +80000d50: 000e2a03 lw x20,0(x28) +80000d54: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x75fc6c02 +80000d58: 000e2e83 lw x29,0(x28) +80000d5c: 004e0e13 addi x28,x28,4 + +80000d60 : +Zbkx_xperm8_cg_cp_rd_b10: + xperm8 x10, x20, x29 # perform operation +80000d60: 29da4533 xperm8 x10,x20,x29 + # Check if x10 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x10, Zbkx_xperm8_cg_cp_rd_b10, Zbkx_xperm8_cg_cp_rd_b10_str) +80000d64: 000c2683 lw x13,0(x24) +80000d68: 00a68863 beq x13,x10,80000d78 +80000d6c: 7d40476f jal x14,80005540 +80000d70: 80000d60 .word 0x80000d60 +80000d74: 80009f11 .word 0x80009f11 +80000d78: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x80591da4 +80000d7c: 000e2883 lw x17,0(x28) +80000d80: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x5b606a95 +80000d84: 000e2183 lw x3,0(x28) +80000d88: 004e0e13 addi x28,x28,4 + +80000d8c : +Zbkx_xperm8_cg_cp_rd_b11: + xperm8 x11, x17, x3 # perform operation +80000d8c: 2838c5b3 xperm8 x11,x17,x3 + # Check if x11 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x11, Zbkx_xperm8_cg_cp_rd_b11, Zbkx_xperm8_cg_cp_rd_b11_str) +80000d90: 000c2683 lw x13,0(x24) +80000d94: 00b68863 beq x13,x11,80000da4 +80000d98: 7a80476f jal x14,80005540 +80000d9c: 80000d8c .word 0x80000d8c +80000da0: 80009f45 .word 0x80009f45 +80000da4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0x62c4360b +80000da8: 000e2503 lw x10,0(x28) +80000dac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xaf5ed9c7 +80000db0: 000e2483 lw x9,0(x28) +80000db4: 004e0e13 addi x28,x28,4 + +80000db8 : +Zbkx_xperm8_cg_cp_rd_b12: + xperm8 x12, x10, x9 # perform operation +80000db8: 28954633 xperm8 x12,x10,x9 + # Check if x12 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x12, Zbkx_xperm8_cg_cp_rd_b12, Zbkx_xperm8_cg_cp_rd_b12_str) +80000dbc: 000c2683 lw x13,0(x24) +80000dc0: 00c68863 beq x13,x12,80000dd0 +80000dc4: 77c0476f jal x14,80005540 +80000dc8: 80000db8 .word 0x80000db8 +80000dcc: 80009f79 .word 0x80009f79 +80000dd0: 004c0c13 addi x24,x24,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dd4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dd8: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x5786d9ce +80000ddc: 000e2183 lw x3,0(x28) +80000de0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs2: x6 = 0x651054b5 +80000de4: 000e2303 lw x6,0(x28) +80000de8: 004e0e13 addi x28,x28,4 + +80000dec : +Zbkx_xperm8_cg_cp_rd_b13: + xperm8 x13, x3, x6 # perform operation +80000dec: 2861c6b3 xperm8 x13,x3,x6 + # Check if x13 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x13, Zbkx_xperm8_cg_cp_rd_b13, Zbkx_xperm8_cg_cp_rd_b13_str) +80000df0: 000c2383 lw x7,0(x24) +80000df4: 00d38863 beq x7,x13,80000e04 +80000df8: 7200446f jal x8,80005518 +80000dfc: 80000dec .word 0x80000dec +80000e00: 80009fad .word 0x80009fad +80000e04: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x930c4118 +80000e08: 000e2f03 lw x30,0(x28) +80000e0c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x0f59d843 +80000e10: 000e2e83 lw x29,0(x28) +80000e14: 004e0e13 addi x28,x28,4 + +80000e18 : +Zbkx_xperm8_cg_cp_rd_b14: + xperm8 x14, x30, x29 # perform operation +80000e18: 29df4733 xperm8 x14,x30,x29 + # Check if x14 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x14, Zbkx_xperm8_cg_cp_rd_b14, Zbkx_xperm8_cg_cp_rd_b14_str) +80000e1c: 000c2383 lw x7,0(x24) +80000e20: 00e38863 beq x7,x14,80000e30 +80000e24: 6f40446f jal x8,80005518 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80009fe1 .word 0x80009fe1 +80000e30: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xb474f496 +80000e34: 000e2d03 lw x26,0(x28) +80000e38: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xe6e89a2c +80000e3c: 000e2483 lw x9,0(x28) +80000e40: 004e0e13 addi x28,x28,4 + +80000e44 : +Zbkx_xperm8_cg_cp_rd_b15: + xperm8 x15, x26, x9 # perform operation +80000e44: 289d47b3 xperm8 x15,x26,x9 + # Check if x15 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x15, Zbkx_xperm8_cg_cp_rd_b15, Zbkx_xperm8_cg_cp_rd_b15_str) +80000e48: 000c2383 lw x7,0(x24) +80000e4c: 00f38863 beq x7,x15,80000e5c +80000e50: 6c80446f jal x8,80005518 +80000e54: 80000e44 .word 0x80000e44 +80000e58: 8000a015 .word 0x8000a015 +80000e5c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x6259f50a +80000e60: 000e2483 lw x9,0(x28) +80000e64: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0xcc0f0c8d +80000e68: 000e2503 lw x10,0(x28) +80000e6c: 004e0e13 addi x28,x28,4 + +80000e70 : +Zbkx_xperm8_cg_cp_rd_b16: + xperm8 x16, x9, x10 # perform operation +80000e70: 28a4c833 xperm8 x16,x9,x10 + # Check if x16 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x16, Zbkx_xperm8_cg_cp_rd_b16, Zbkx_xperm8_cg_cp_rd_b16_str) +80000e74: 000c2383 lw x7,0(x24) +80000e78: 01038863 beq x7,x16,80000e88 +80000e7c: 69c0446f jal x8,80005518 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 8000a049 .word 0x8000a049 +80000e88: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0x2e1e34ff +80000e8c: 000e2103 lw x2,0(x28) +80000e90: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0xf242d8e7 +80000e94: 000e2783 lw x15,0(x28) +80000e98: 004e0e13 addi x28,x28,4 + +80000e9c : +Zbkx_xperm8_cg_cp_rd_b17: + xperm8 x17, x2, x15 # perform operation +80000e9c: 28f148b3 xperm8 x17,x2,x15 + # Check if x17 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x17, Zbkx_xperm8_cg_cp_rd_b17, Zbkx_xperm8_cg_cp_rd_b17_str) +80000ea0: 000c2383 lw x7,0(x24) +80000ea4: 01138863 beq x7,x17,80000eb4 +80000ea8: 6700446f jal x8,80005518 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 8000a07d .word 0x8000a07d +80000eb4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x8af74863 +80000eb8: 000e2d83 lw x27,0(x28) +80000ebc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs2: x1 = 0x2b1689d0 +80000ec0: 000e2083 lw x1,0(x28) +80000ec4: 004e0e13 addi x28,x28,4 + +80000ec8 : +Zbkx_xperm8_cg_cp_rd_b18: + xperm8 x18, x27, x1 # perform operation +80000ec8: 281dc933 xperm8 x18,x27,x1 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zbkx_xperm8_cg_cp_rd_b18, Zbkx_xperm8_cg_cp_rd_b18_str) +80000ecc: 000c2383 lw x7,0(x24) +80000ed0: 01238863 beq x7,x18,80000ee0 +80000ed4: 6440446f jal x8,80005518 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000a0b1 .word 0x8000a0b1 +80000ee0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x8dc9934c +80000ee4: 000e2883 lw x17,0(x28) +80000ee8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x5f16f6f7 +80000eec: 000e2a03 lw x20,0(x28) +80000ef0: 004e0e13 addi x28,x28,4 + +80000ef4 : +Zbkx_xperm8_cg_cp_rd_b19: + xperm8 x19, x17, x20 # perform operation +80000ef4: 2948c9b3 xperm8 x19,x17,x20 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zbkx_xperm8_cg_cp_rd_b19, Zbkx_xperm8_cg_cp_rd_b19_str) +80000ef8: 000c2383 lw x7,0(x24) +80000efc: 01338863 beq x7,x19,80000f0c +80000f00: 6180446f jal x8,80005518 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000a0e5 .word 0x8000a0e5 +80000f0c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs1: x5 = 0xa3a06d10 +80000f10: 000e2283 lw x5,0(x28) +80000f14: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x3c118841 +80000f18: 000e2b03 lw x22,0(x28) +80000f1c: 004e0e13 addi x28,x28,4 + +80000f20 : +Zbkx_xperm8_cg_cp_rd_b20: + xperm8 x20, x5, x22 # perform operation +80000f20: 2962ca33 xperm8 x20,x5,x22 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zbkx_xperm8_cg_cp_rd_b20, Zbkx_xperm8_cg_cp_rd_b20_str) +80000f24: 000c2383 lw x7,0(x24) +80000f28: 01438863 beq x7,x20,80000f38 +80000f2c: 5ec0446f jal x8,80005518 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000a119 .word 0x8000a119 +80000f38: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0xde8d97f7 +80000f3c: 000e2903 lw x18,0(x28) +80000f40: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x924b2224 +80000f44: 000e2e83 lw x29,0(x28) +80000f48: 004e0e13 addi x28,x28,4 + +80000f4c : +Zbkx_xperm8_cg_cp_rd_b21: + xperm8 x21, x18, x29 # perform operation +80000f4c: 29d94ab3 xperm8 x21,x18,x29 + # Check if x21 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x21, Zbkx_xperm8_cg_cp_rd_b21, Zbkx_xperm8_cg_cp_rd_b21_str) +80000f50: 000c2383 lw x7,0(x24) +80000f54: 01538863 beq x7,x21,80000f64 +80000f58: 5c00446f jal x8,80005518 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 8000a14d .word 0x8000a14d +80000f64: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xa9ed65ca +80000f68: 000e2d03 lw x26,0(x28) +80000f6c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x4) # load rs2: x4 = 0x44e1cd19 +80000f70: 000e2203 lw x4,0(x28) +80000f74: 004e0e13 addi x28,x28,4 + +80000f78 : +Zbkx_xperm8_cg_cp_rd_b22: + xperm8 x22, x26, x4 # perform operation +80000f78: 284d4b33 xperm8 x22,x26,x4 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zbkx_xperm8_cg_cp_rd_b22, Zbkx_xperm8_cg_cp_rd_b22_str) +80000f7c: 000c2383 lw x7,0(x24) +80000f80: 01638863 beq x7,x22,80000f90 +80000f84: 5940446f jal x8,80005518 +80000f88: 80000f78 .word 0x80000f78 +80000f8c: 8000a181 .word 0x8000a181 +80000f90: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0xc4b21b6a +80000f94: 000e2483 lw x9,0(x28) +80000f98: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0x7557693f +80000f9c: 000e2f83 lw x31,0(x28) +80000fa0: 004e0e13 addi x28,x28,4 + +80000fa4 : +Zbkx_xperm8_cg_cp_rd_b23: + xperm8 x23, x9, x31 # perform operation +80000fa4: 29f4cbb3 xperm8 x23,x9,x31 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zbkx_xperm8_cg_cp_rd_b23, Zbkx_xperm8_cg_cp_rd_b23_str) +80000fa8: 000c2383 lw x7,0(x24) +80000fac: 01738863 beq x7,x23,80000fbc +80000fb0: 5680446f jal x8,80005518 +80000fb4: 80000fa4 .word 0x80000fa4 +80000fb8: 8000a1b5 .word 0x8000a1b5 +80000fbc: 004c0c13 addi x24,x24,4 + + mv x25, x24 # switch signature pointer register to avoid conflict with test +80000fc0: 000c0c93 addi x25,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0x53bcc116 +80000fc4: 000e2803 lw x16,0(x28) +80000fc8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0x4a691d1b +80000fcc: 000e2583 lw x11,0(x28) +80000fd0: 004e0e13 addi x28,x28,4 + +80000fd4 : +Zbkx_xperm8_cg_cp_rd_b24: + xperm8 x24, x16, x11 # perform operation +80000fd4: 28b84c33 xperm8 x24,x16,x11 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkx_xperm8_cg_cp_rd_b24, Zbkx_xperm8_cg_cp_rd_b24_str) +80000fd8: 000ca383 lw x7,0(x25) +80000fdc: 01838863 beq x7,x24,80000fec +80000fe0: 5380446f jal x8,80005518 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000a1e9 .word 0x8000a1e9 +80000fec: 004c8c93 addi x25,x25,4 + + mv x29, x25 # switch signature pointer register to avoid conflict with test +80000ff0: 000c8e93 addi x29,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x12647113 +80000ff4: 000e2883 lw x17,0(x28) +80000ff8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x4b6ac153 +80000ffc: 000e2a03 lw x20,0(x28) +80001000: 004e0e13 addi x28,x28,4 + +80001004 : +Zbkx_xperm8_cg_cp_rd_b25: + xperm8 x25, x17, x20 # perform operation +80001004: 2948ccb3 xperm8 x25,x17,x20 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zbkx_xperm8_cg_cp_rd_b25, Zbkx_xperm8_cg_cp_rd_b25_str) +80001008: 000ea383 lw x7,0(x29) +8000100c: 01938863 beq x7,x25,8000101c +80001010: 5080446f jal x8,80005518 +80001014: 80001004 .word 0x80001004 +80001018: 8000a21d .word 0x8000a21d +8000101c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x1060a68a +80001020: 000e2703 lw x14,0(x28) +80001024: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs2: x5 = 0x84067d00 +80001028: 000e2283 lw x5,0(x28) +8000102c: 004e0e13 addi x28,x28,4 + +80001030 : +Zbkx_xperm8_cg_cp_rd_b26: + xperm8 x26, x14, x5 # perform operation +80001030: 28574d33 xperm8 x26,x14,x5 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkx_xperm8_cg_cp_rd_b26, Zbkx_xperm8_cg_cp_rd_b26_str) +80001034: 000ea383 lw x7,0(x29) +80001038: 01a38863 beq x7,x26,80001048 +8000103c: 4dc0446f jal x8,80005518 +80001040: 80001030 .word 0x80001030 +80001044: 8000a251 .word 0x8000a251 +80001048: 004e8e93 addi x29,x29,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x3edc9f9b +8000104c: 000e2483 lw x9,0(x28) +80001050: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x859b37fe +80001054: 000e2503 lw x10,0(x28) +80001058: 004e0e13 addi x28,x28,4 + +8000105c : +Zbkx_xperm8_cg_cp_rd_b27: + xperm8 x27, x9, x10 # perform operation +8000105c: 28a4cdb3 xperm8 x27,x9,x10 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zbkx_xperm8_cg_cp_rd_b27, Zbkx_xperm8_cg_cp_rd_b27_str) +80001060: 000ea383 lw x7,0(x29) +80001064: 01b38863 beq x7,x27,80001074 +80001068: 4b00446f jal x8,80005518 +8000106c: 8000105c .word 0x8000105c +80001070: 8000a285 .word 0x8000a285 +80001074: 004e8e93 addi x29,x29,4 + + mv x26, x28 # switch data pointer register to avoid conflict with test +80001078: 000e0d13 addi x26,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xbb7d6cdc +8000107c: 000d2f03 lw x30,0(x26) +80001080: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x247026e7 +80001084: 000d2f83 lw x31,0(x26) +80001088: 004d0d13 addi x26,x26,4 + +8000108c : +Zbkx_xperm8_cg_cp_rd_b28: + xperm8 x28, x30, x31 # perform operation +8000108c: 29ff4e33 xperm8 x28,x30,x31 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkx_xperm8_cg_cp_rd_b28, Zbkx_xperm8_cg_cp_rd_b28_str) +80001090: 000ea383 lw x7,0(x29) +80001094: 01c38863 beq x7,x28,800010a4 +80001098: 4800446f jal x8,80005518 +8000109c: 8000108c .word 0x8000108c +800010a0: 8000a2b9 .word 0x8000a2b9 +800010a4: 004e8e93 addi x29,x29,4 + + mv x30, x29 # switch signature pointer register to avoid conflict with test +800010a8: 000e8f13 addi x30,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x828fdc8f +800010ac: 000d2883 lw x17,0(x26) +800010b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x21d68a18 +800010b4: 000d2b03 lw x22,0(x26) +800010b8: 004d0d13 addi x26,x26,4 + +800010bc : +Zbkx_xperm8_cg_cp_rd_b29: + xperm8 x29, x17, x22 # perform operation +800010bc: 2968ceb3 xperm8 x29,x17,x22 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cp_rd_b29, Zbkx_xperm8_cg_cp_rd_b29_str) +800010c0: 000f2383 lw x7,0(x30) +800010c4: 01d38863 beq x7,x29,800010d4 +800010c8: 4500446f jal x8,80005518 +800010cc: 800010bc .word 0x800010bc +800010d0: 8000a2ed .word 0x8000a2ed +800010d4: 004f0f13 addi x30,x30,4 + + mv x19, x30 # switch signature pointer register to avoid conflict with test +800010d8: 000f0993 addi x19,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xe6d0a615 +800010dc: 000d2883 lw x17,0(x26) +800010e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x46cca9a5 +800010e4: 000d2483 lw x9,0(x26) +800010e8: 004d0d13 addi x26,x26,4 + +800010ec : +Zbkx_xperm8_cg_cp_rd_b30: + xperm8 x30, x17, x9 # perform operation +800010ec: 2898cf33 xperm8 x30,x17,x9 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cp_rd_b30, Zbkx_xperm8_cg_cp_rd_b30_str) +800010f0: 0009a383 lw x7,0(x19) +800010f4: 01e38863 beq x7,x30,80001104 +800010f8: 4200446f jal x8,80005518 +800010fc: 800010ec .word 0x800010ec +80001100: 8000a321 .word 0x8000a321 +80001104: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x0581185d +80001108: 000d2d83 lw x27,0(x26) +8000110c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x892c84ff +80001110: 000d2c83 lw x25,0(x26) +80001114: 004d0d13 addi x26,x26,4 + +80001118 : +Zbkx_xperm8_cg_cp_rd_b31: + xperm8 x31, x27, x25 # perform operation +80001118: 299dcfb3 xperm8 x31,x27,x25 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cp_rd_b31, Zbkx_xperm8_cg_cp_rd_b31_str) +8000111c: 0009a383 lw x7,0(x19) +80001120: 01f38863 beq x7,x31,80001130 +80001124: 3f40446f jal x8,80005518 +80001128: 80001118 .word 0x80001118 +8000112c: 8000a355 .word 0x8000a355 +80001130: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x00000000 +80001134: 000d2b83 lw x23,0(x26) +80001138: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x95022acc +8000113c: 000d2503 lw x10,0(x26) +80001140: 004d0d13 addi x26,x26,4 + +80001144 : +Zbkx_xperm8_cg_cp_rs1_edges_0x0: + xperm8 x22, x23, x10 # perform operation +80001144: 28abcb33 xperm8 x22,x23,x10 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cp_rs1_edges_0x0, Zbkx_xperm8_cg_cp_rs1_edges_0x0_str) +80001148: 0009a383 lw x7,0(x19) +8000114c: 01638863 beq x7,x22,8000115c +80001150: 3c80446f jal x8,80005518 +80001154: 80001144 .word 0x80001144 +80001158: 8000a389 .word 0x8000a389 +8000115c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x00000001 +80001160: 000d2183 lw x3,0(x26) +80001164: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xebf8fec4 +80001168: 000d2f83 lw x31,0(x26) +8000116c: 004d0d13 addi x26,x26,4 + +80001170 : +Zbkx_xperm8_cg_cp_rs1_edges_0x1: + xperm8 x18, x3, x31 # perform operation +80001170: 29f1c933 xperm8 x18,x3,x31 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cp_rs1_edges_0x1, Zbkx_xperm8_cg_cp_rs1_edges_0x1_str) +80001174: 0009a383 lw x7,0(x19) +80001178: 01238863 beq x7,x18,80001188 +8000117c: 39c0446f jal x8,80005518 +80001180: 80001170 .word 0x80001170 +80001184: 8000a3c4 .word 0x8000a3c4 +80001188: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x00000002 +8000118c: 000d2703 lw x14,0(x26) +80001190: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xc39cd8d4 +80001194: 000d2803 lw x16,0(x26) +80001198: 004d0d13 addi x26,x26,4 + +8000119c : +Zbkx_xperm8_cg_cp_rs1_edges_0x2: + xperm8 x15, x14, x16 # perform operation +8000119c: 290747b3 xperm8 x15,x14,x16 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cp_rs1_edges_0x2, Zbkx_xperm8_cg_cp_rs1_edges_0x2_str) +800011a0: 0009a383 lw x7,0(x19) +800011a4: 00f38863 beq x7,x15,800011b4 +800011a8: 3700446f jal x8,80005518 +800011ac: 8000119c .word 0x8000119c +800011b0: 8000a3ff .word 0x8000a3ff +800011b4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x80000000 +800011b8: 000d2783 lw x15,0(x26) +800011bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x005a77b3 +800011c0: 000d2703 lw x14,0(x26) +800011c4: 004d0d13 addi x26,x26,4 + +800011c8 : +Zbkx_xperm8_cg_cp_rs1_edges_0x80000000: + xperm8 x4, x15, x14 # perform operation +800011c8: 28e7c233 xperm8 x4,x15,x14 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cp_rs1_edges_0x80000000, Zbkx_xperm8_cg_cp_rs1_edges_0x80000000_str) +800011cc: 0009a383 lw x7,0(x19) +800011d0: 00438863 beq x7,x4,800011e0 +800011d4: 3440446f jal x8,80005518 +800011d8: 800011c8 .word 0x800011c8 +800011dc: 8000a43a .word 0x8000a43a +800011e0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x80000001 +800011e4: 000d2e03 lw x28,0(x26) +800011e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x5a10bc05 +800011ec: 000d2503 lw x10,0(x26) +800011f0: 004d0d13 addi x26,x26,4 + +800011f4 : +Zbkx_xperm8_cg_cp_rs1_edges_0x80000001: + xperm8 x6, x28, x10 # perform operation +800011f4: 28ae4333 xperm8 x6,x28,x10 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cp_rs1_edges_0x80000001, Zbkx_xperm8_cg_cp_rs1_edges_0x80000001_str) +800011f8: 0009a383 lw x7,0(x19) +800011fc: 00638863 beq x7,x6,8000120c +80001200: 3180446f jal x8,80005518 +80001204: 800011f4 .word 0x800011f4 +80001208: 8000a47d .word 0x8000a47d +8000120c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x7fffffff +80001210: 000d2a03 lw x20,0(x26) +80001214: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x7bc59f31 +80001218: 000d2e03 lw x28,0(x26) +8000121c: 004d0d13 addi x26,x26,4 + +80001220 : +Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffff: + xperm8 x6, x20, x28 # perform operation +80001220: 29ca4333 xperm8 x6,x20,x28 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffff, Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffff_str) +80001224: 0009a383 lw x7,0(x19) +80001228: 00638863 beq x7,x6,80001238 +8000122c: 2ec0446f jal x8,80005518 +80001230: 80001220 .word 0x80001220 +80001234: 8000a4c0 .word 0x8000a4c0 +80001238: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x7ffffffe +8000123c: 000d2603 lw x12,0(x26) +80001240: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x9842cdd7 +80001244: 000d2783 lw x15,0(x26) +80001248: 004d0d13 addi x26,x26,4 + +8000124c : +Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffe: + xperm8 x11, x12, x15 # perform operation +8000124c: 28f645b3 xperm8 x11,x12,x15 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffe, Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffe_str) +80001250: 0009a383 lw x7,0(x19) +80001254: 00b38863 beq x7,x11,80001264 +80001258: 2c00446f jal x8,80005518 +8000125c: 8000124c .word 0x8000124c +80001260: 8000a503 .word 0x8000a503 +80001264: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xffffffff +80001268: 000d2083 lw x1,0(x26) +8000126c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xf39441b8 +80001270: 000d2e83 lw x29,0(x26) +80001274: 004d0d13 addi x26,x26,4 + +80001278 : +Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff: + xperm8 x25, x1, x29 # perform operation +80001278: 29d0ccb3 xperm8 x25,x1,x29 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff_str) +8000127c: 0009a383 lw x7,0(x19) +80001280: 01938863 beq x7,x25,80001290 +80001284: 2940446f jal x8,80005518 +80001288: 80001278 .word 0x80001278 +8000128c: 8000a546 .word 0x8000a546 +80001290: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xfffffffe +80001294: 000d2303 lw x6,0(x26) +80001298: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x4302d20f +8000129c: 000d2903 lw x18,0(x26) +800012a0: 004d0d13 addi x26,x26,4 + +800012a4 : +Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe: + xperm8 x31, x6, x18 # perform operation +800012a4: 29234fb3 xperm8 x31,x6,x18 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe_str) +800012a8: 0009a383 lw x7,0(x19) +800012ac: 01f38863 beq x7,x31,800012bc +800012b0: 2680446f jal x8,80005518 +800012b4: 800012a4 .word 0x800012a4 +800012b8: 8000a589 .word 0x8000a589 +800012bc: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x5bbc8872 +800012c0: 000d2f03 lw x30,0(x26) +800012c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xc539dfa4 +800012c8: 000d2c03 lw x24,0(x26) +800012cc: 004d0d13 addi x26,x26,4 + +800012d0 : +Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc8872: + xperm8 x13, x30, x24 # perform operation +800012d0: 298f46b3 xperm8 x13,x30,x24 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc8872, Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc8872_str) +800012d4: 0009a383 lw x7,0(x19) +800012d8: 00d38863 beq x7,x13,800012e8 +800012dc: 23c0446f jal x8,80005518 +800012e0: 800012d0 .word 0x800012d0 +800012e4: 8000a5cc .word 0x8000a5cc +800012e8: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xaaaaaaaa +800012ec: 000d2e03 lw x28,0(x26) +800012f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xce329768 +800012f4: 000d2f83 lw x31,0(x26) +800012f8: 004d0d13 addi x26,x26,4 + +800012fc : +Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaa: + xperm8 x10, x28, x31 # perform operation +800012fc: 29fe4533 xperm8 x10,x28,x31 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaa, Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001300: 0009a383 lw x7,0(x19) +80001304: 00a38863 beq x7,x10,80001314 +80001308: 2100446f jal x8,80005518 +8000130c: 800012fc .word 0x800012fc +80001310: 8000a60f .word 0x8000a60f +80001314: 00498993 addi x19,x19,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x55555555 +80001318: 000d2183 lw x3,0(x26) +8000131c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x874dccb7 +80001320: 000d2503 lw x10,0(x26) +80001324: 004d0d13 addi x26,x26,4 + +80001328 : +Zbkx_xperm8_cg_cp_rs1_edges_0x55555555: + xperm8 x16, x3, x10 # perform operation +80001328: 28a1c833 xperm8 x16,x3,x10 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_edges_0x55555555, Zbkx_xperm8_cg_cp_rs1_edges_0x55555555_str) +8000132c: 0009a383 lw x7,0(x19) +80001330: 01038863 beq x7,x16,80001340 +80001334: 1e40446f jal x8,80005518 +80001338: 80001328 .word 0x80001328 +8000133c: 8000a652 .word 0x8000a652 +80001340: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x5e03959c +80001344: 000d2283 lw x5,0(x26) +80001348: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x00000000 +8000134c: 000d2803 lw x16,0(x26) +80001350: 004d0d13 addi x26,x26,4 + +80001354 : +Zbkx_xperm8_cg_cp_rs2_edges_0x0: + xperm8 x6, x5, x16 # perform operation +80001354: 2902c333 xperm8 x6,x5,x16 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cp_rs2_edges_0x0, Zbkx_xperm8_cg_cp_rs2_edges_0x0_str) +80001358: 0009a383 lw x7,0(x19) +8000135c: 00638863 beq x7,x6,8000136c +80001360: 1b80446f jal x8,80005518 +80001364: 80001354 .word 0x80001354 +80001368: 8000a695 .word 0x8000a695 +8000136c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xcec45f4f +80001370: 000d2a83 lw x21,0(x26) +80001374: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x00000001 +80001378: 000d2a03 lw x20,0(x26) +8000137c: 004d0d13 addi x26,x26,4 + +80001380 : +Zbkx_xperm8_cg_cp_rs2_edges_0x1: + xperm8 x10, x21, x20 # perform operation +80001380: 294ac533 xperm8 x10,x21,x20 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cp_rs2_edges_0x1, Zbkx_xperm8_cg_cp_rs2_edges_0x1_str) +80001384: 0009a383 lw x7,0(x19) +80001388: 00a38863 beq x7,x10,80001398 +8000138c: 18c0446f jal x8,80005518 +80001390: 80001380 .word 0x80001380 +80001394: 8000a6d1 .word 0x8000a6d1 +80001398: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x1ed0fc20 +8000139c: 000d2a83 lw x21,0(x26) +800013a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x00000002 +800013a4: 000d2183 lw x3,0(x26) +800013a8: 004d0d13 addi x26,x26,4 + +800013ac : +Zbkx_xperm8_cg_cp_rs2_edges_0x2: + xperm8 x12, x21, x3 # perform operation +800013ac: 283ac633 xperm8 x12,x21,x3 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cp_rs2_edges_0x2, Zbkx_xperm8_cg_cp_rs2_edges_0x2_str) +800013b0: 0009a383 lw x7,0(x19) +800013b4: 00c38863 beq x7,x12,800013c4 +800013b8: 1600446f jal x8,80005518 +800013bc: 800013ac .word 0x800013ac +800013c0: 8000a70d .word 0x8000a70d +800013c4: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x139a11c5 +800013c8: 000d2083 lw x1,0(x26) +800013cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x80000000 +800013d0: 000d2c83 lw x25,0(x26) +800013d4: 004d0d13 addi x26,x26,4 + +800013d8 : +Zbkx_xperm8_cg_cp_rs2_edges_0x80000000: + xperm8 x30, x1, x25 # perform operation +800013d8: 2990cf33 xperm8 x30,x1,x25 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cp_rs2_edges_0x80000000, Zbkx_xperm8_cg_cp_rs2_edges_0x80000000_str) +800013dc: 0009a383 lw x7,0(x19) +800013e0: 01e38863 beq x7,x30,800013f0 +800013e4: 1340446f jal x8,80005518 +800013e8: 800013d8 .word 0x800013d8 +800013ec: 8000a749 .word 0x8000a749 +800013f0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xcab4bbc6 +800013f4: 000d2203 lw x4,0(x26) +800013f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x80000001 +800013fc: 000d2583 lw x11,0(x26) +80001400: 004d0d13 addi x26,x26,4 + +80001404 : +Zbkx_xperm8_cg_cp_rs2_edges_0x80000001: + xperm8 x27, x4, x11 # perform operation +80001404: 28b24db3 xperm8 x27,x4,x11 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkx_xperm8_cg_cp_rs2_edges_0x80000001, Zbkx_xperm8_cg_cp_rs2_edges_0x80000001_str) +80001408: 0009a383 lw x7,0(x19) +8000140c: 01b38863 beq x7,x27,8000141c +80001410: 1080446f jal x8,80005518 +80001414: 80001404 .word 0x80001404 +80001418: 8000a78c .word 0x8000a78c +8000141c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xa14872f5 +80001420: 000d2b83 lw x23,0(x26) +80001424: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x7fffffff +80001428: 000d2d83 lw x27,0(x26) +8000142c: 004d0d13 addi x26,x26,4 + +80001430 : +Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffff: + xperm8 x12, x23, x27 # perform operation +80001430: 29bbc633 xperm8 x12,x23,x27 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffff, Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffff_str) +80001434: 0009a383 lw x7,0(x19) +80001438: 00c38863 beq x7,x12,80001448 +8000143c: 0dc0446f jal x8,80005518 +80001440: 80001430 .word 0x80001430 +80001444: 8000a7cf .word 0x8000a7cf +80001448: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x69d3e5ea +8000144c: 000d2b83 lw x23,0(x26) +80001450: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x7ffffffe +80001454: 000d2103 lw x2,0(x26) +80001458: 004d0d13 addi x26,x26,4 + +8000145c : +Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffe: + xperm8 x15, x23, x2 # perform operation +8000145c: 282bc7b3 xperm8 x15,x23,x2 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffe, Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffe_str) +80001460: 0009a383 lw x7,0(x19) +80001464: 00f38863 beq x7,x15,80001474 +80001468: 0b00446f jal x8,80005518 +8000146c: 8000145c .word 0x8000145c +80001470: 8000a812 .word 0x8000a812 +80001474: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x17d9c616 +80001478: 000d2b03 lw x22,0(x26) +8000147c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xffffffff +80001480: 000d2703 lw x14,0(x26) +80001484: 004d0d13 addi x26,x26,4 + +80001488 : +Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff: + xperm8 x24, x22, x14 # perform operation +80001488: 28eb4c33 xperm8 x24,x22,x14 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff_str) +8000148c: 0009a383 lw x7,0(x19) +80001490: 01838863 beq x7,x24,800014a0 +80001494: 0840446f jal x8,80005518 +80001498: 80001488 .word 0x80001488 +8000149c: 8000a855 .word 0x8000a855 +800014a0: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x2e786a4d +800014a4: 000d2603 lw x12,0(x26) +800014a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xfffffffe +800014ac: 000d2f83 lw x31,0(x26) +800014b0: 004d0d13 addi x26,x26,4 + +800014b4 : +Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe: + xperm8 x28, x12, x31 # perform operation +800014b4: 29f64e33 xperm8 x28,x12,x31 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe_str) +800014b8: 0009a383 lw x7,0(x19) +800014bc: 01c38863 beq x7,x28,800014cc +800014c0: 0580446f jal x8,80005518 +800014c4: 800014b4 .word 0x800014b4 +800014c8: 8000a898 .word 0x8000a898 +800014cc: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x38df1b9c +800014d0: 000d2e03 lw x28,0(x26) +800014d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x5bbc8872 +800014d8: 000d2c03 lw x24,0(x26) +800014dc: 004d0d13 addi x26,x26,4 + +800014e0 : +Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc8872: + xperm8 x10, x28, x24 # perform operation +800014e0: 298e4533 xperm8 x10,x28,x24 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc8872, Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc8872_str) +800014e4: 0009a383 lw x7,0(x19) +800014e8: 00a38863 beq x7,x10,800014f8 +800014ec: 02c0446f jal x8,80005518 +800014f0: 800014e0 .word 0x800014e0 +800014f4: 8000a8db .word 0x8000a8db +800014f8: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xdb56bdde +800014fc: 000d2203 lw x4,0(x26) +80001500: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xaaaaaaaa +80001504: 000d2c83 lw x25,0(x26) +80001508: 004d0d13 addi x26,x26,4 + +8000150c : +Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaa: + xperm8 x3, x4, x25 # perform operation +8000150c: 299241b3 xperm8 x3,x4,x25 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaa, Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001510: 0009a383 lw x7,0(x19) +80001514: 00338863 beq x7,x3,80001524 +80001518: 0000446f jal x8,80005518 +8000151c: 8000150c .word 0x8000150c +80001520: 8000a91e .word 0x8000a91e +80001524: 00498993 addi x19,x19,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x7853f15d +80001528: 000d2583 lw x11,0(x26) +8000152c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x55555555 +80001530: 000d2b03 lw x22,0(x26) +80001534: 004d0d13 addi x26,x26,4 + +80001538 : +Zbkx_xperm8_cg_cp_rs2_edges_0x55555555: + xperm8 x20, x11, x22 # perform operation +80001538: 2965ca33 xperm8 x20,x11,x22 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cp_rs2_edges_0x55555555, Zbkx_xperm8_cg_cp_rs2_edges_0x55555555_str) +8000153c: 0009a383 lw x7,0(x19) +80001540: 01438863 beq x7,x20,80001550 +80001544: 7d50346f jal x8,80005518 +80001548: 80001538 .word 0x80001538 +8000154c: 8000a961 .word 0x8000a961 +80001550: 00498993 addi x19,x19,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x00000000 +80001554: 000d2f03 lw x30,0(x26) +80001558: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x00000000 +8000155c: 000d2803 lw x16,0(x26) +80001560: 004d0d13 addi x26,x26,4 + +80001564 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xperm8 x28, x30, x16 # perform operation +80001564: 290f4e33 xperm8 x28,x30,x16 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001568: 0009a383 lw x7,0(x19) +8000156c: 01c38863 beq x7,x28,8000157c +80001570: 7a90346f jal x8,80005518 +80001574: 80001564 .word 0x80001564 +80001578: 8000a9a4 .word 0x8000a9a4 +8000157c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x00000000 +80001580: 000d2203 lw x4,0(x26) +80001584: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x00000001 +80001588: 000d2603 lw x12,0(x26) +8000158c: 004d0d13 addi x26,x26,4 + +80001590 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xperm8 x28, x4, x12 # perform operation +80001590: 28c24e33 xperm8 x28,x4,x12 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001594: 0009a383 lw x7,0(x19) +80001598: 01c38863 beq x7,x28,800015a8 +8000159c: 77d0346f jal x8,80005518 +800015a0: 80001590 .word 0x80001590 +800015a4: 8000a9f7 .word 0x8000a9f7 +800015a8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x00000000 +800015ac: 000d2903 lw x18,0(x26) +800015b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x00000002 +800015b4: 000d2583 lw x11,0(x26) +800015b8: 004d0d13 addi x26,x26,4 + +800015bc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xperm8 x20, x18, x11 # perform operation +800015bc: 28b94a33 xperm8 x20,x18,x11 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c0: 0009a383 lw x7,0(x19) +800015c4: 01438863 beq x7,x20,800015d4 +800015c8: 7510346f jal x8,80005518 +800015cc: 800015bc .word 0x800015bc +800015d0: 8000aa4a .word 0x8000aa4a +800015d4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x00000000 +800015d8: 000d2f83 lw x31,0(x26) +800015dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x80000000 +800015e0: 000d2783 lw x15,0(x26) +800015e4: 004d0d13 addi x26,x26,4 + +800015e8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + xperm8 x30, x31, x15 # perform operation +800015e8: 28ffcf33 xperm8 x30,x31,x15 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015ec: 0009a383 lw x7,0(x19) +800015f0: 01e38863 beq x7,x30,80001600 +800015f4: 7250346f jal x8,80005518 +800015f8: 800015e8 .word 0x800015e8 +800015fc: 8000aa9d .word 0x8000aa9d +80001600: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x00000000 +80001604: 000d2b03 lw x22,0(x26) +80001608: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x80000001 +8000160c: 000d2903 lw x18,0(x26) +80001610: 004d0d13 addi x26,x26,4 + +80001614 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + xperm8 x14, x22, x18 # perform operation +80001614: 292b4733 xperm8 x14,x22,x18 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001618: 0009a383 lw x7,0(x19) +8000161c: 00e38863 beq x7,x14,8000162c +80001620: 6f90346f jal x8,80005518 +80001624: 80001614 .word 0x80001614 +80001628: 8000aaf7 .word 0x8000aaf7 +8000162c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x00000000 +80001630: 000d2e03 lw x28,0(x26) +80001634: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x7fffffff +80001638: 000d2b83 lw x23,0(x26) +8000163c: 004d0d13 addi x26,x26,4 + +80001640 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + xperm8 x18, x28, x23 # perform operation +80001640: 297e4933 xperm8 x18,x28,x23 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001644: 0009a383 lw x7,0(x19) +80001648: 01238863 beq x7,x18,80001658 +8000164c: 6cd0346f jal x8,80005518 +80001650: 80001640 .word 0x80001640 +80001654: 8000ab51 .word 0x8000ab51 +80001658: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x00000000 +8000165c: 000d2503 lw x10,0(x26) +80001660: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x7ffffffe +80001664: 000d2c83 lw x25,0(x26) +80001668: 004d0d13 addi x26,x26,4 + +8000166c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + xperm8 x5, x10, x25 # perform operation +8000166c: 299542b3 xperm8 x5,x10,x25 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001670: 0009a383 lw x7,0(x19) +80001674: 00538863 beq x7,x5,80001684 +80001678: 6a10346f jal x8,80005518 +8000167c: 8000166c .word 0x8000166c +80001680: 8000abab .word 0x8000abab +80001684: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x00000000 +80001688: 000d2783 lw x15,0(x26) +8000168c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xffffffff +80001690: 000d2e83 lw x29,0(x26) +80001694: 004d0d13 addi x26,x26,4 + +80001698 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xperm8 x20, x15, x29 # perform operation +80001698: 29d7ca33 xperm8 x20,x15,x29 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000169c: 0009a383 lw x7,0(x19) +800016a0: 01438863 beq x7,x20,800016b0 +800016a4: 6750346f jal x8,80005518 +800016a8: 80001698 .word 0x80001698 +800016ac: 8000ac05 .word 0x8000ac05 +800016b0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x00000000 +800016b4: 000d2703 lw x14,0(x26) +800016b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xfffffffe +800016bc: 000d2783 lw x15,0(x26) +800016c0: 004d0d13 addi x26,x26,4 + +800016c4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xperm8 x24, x14, x15 # perform operation +800016c4: 28f74c33 xperm8 x24,x14,x15 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c8: 0009a383 lw x7,0(x19) +800016cc: 01838863 beq x7,x24,800016dc +800016d0: 6490346f jal x8,80005518 +800016d4: 800016c4 .word 0x800016c4 +800016d8: 8000ac5f .word 0x8000ac5f +800016dc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x00000000 +800016e0: 000d2c03 lw x24,0(x26) +800016e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x5bbc8872 +800016e8: 000d2703 lw x14,0(x26) +800016ec: 004d0d13 addi x26,x26,4 + +800016f0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + xperm8 x30, x24, x14 # perform operation +800016f0: 28ec4f33 xperm8 x30,x24,x14 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016f4: 0009a383 lw x7,0(x19) +800016f8: 01e38863 beq x7,x30,80001708 +800016fc: 61d0346f jal x8,80005518 +80001700: 800016f0 .word 0x800016f0 +80001704: 8000acb9 .word 0x8000acb9 +80001708: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x00000000 +8000170c: 000d2903 lw x18,0(x26) +80001710: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xaaaaaaaa +80001714: 000d2f03 lw x30,0(x26) +80001718: 004d0d13 addi x26,x26,4 + +8000171c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + xperm8 x28, x18, x30 # perform operation +8000171c: 29e94e33 xperm8 x28,x18,x30 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001720: 0009a383 lw x7,0(x19) +80001724: 01c38863 beq x7,x28,80001734 +80001728: 5f10346f jal x8,80005518 +8000172c: 8000171c .word 0x8000171c +80001730: 8000ad13 .word 0x8000ad13 +80001734: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x00000000 +80001738: 000d2103 lw x2,0(x26) +8000173c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x55555555 +80001740: 000d2783 lw x15,0(x26) +80001744: 004d0d13 addi x26,x26,4 + +80001748 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + xperm8 x12, x2, x15 # perform operation +80001748: 28f14633 xperm8 x12,x2,x15 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000174c: 0009a383 lw x7,0(x19) +80001750: 00c38863 beq x7,x12,80001760 +80001754: 5c50346f jal x8,80005518 +80001758: 80001748 .word 0x80001748 +8000175c: 8000ad6d .word 0x8000ad6d +80001760: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x00000001 +80001764: 000d2203 lw x4,0(x26) +80001768: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x00000000 +8000176c: 000d2783 lw x15,0(x26) +80001770: 004d0d13 addi x26,x26,4 + +80001774 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xperm8 x16, x4, x15 # perform operation +80001774: 28f24833 xperm8 x16,x4,x15 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001778: 0009a383 lw x7,0(x19) +8000177c: 01038863 beq x7,x16,8000178c +80001780: 5990346f jal x8,80005518 +80001784: 80001774 .word 0x80001774 +80001788: 8000adc7 .word 0x8000adc7 +8000178c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x00000001 +80001790: 000d2703 lw x14,0(x26) +80001794: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x00000001 +80001798: 000d2b03 lw x22,0(x26) +8000179c: 004d0d13 addi x26,x26,4 + +800017a0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xperm8 x3, x14, x22 # perform operation +800017a0: 296741b3 xperm8 x3,x14,x22 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017a4: 0009a383 lw x7,0(x19) +800017a8: 00338863 beq x7,x3,800017b8 +800017ac: 56d0346f jal x8,80005518 +800017b0: 800017a0 .word 0x800017a0 +800017b4: 8000ae1a .word 0x8000ae1a +800017b8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x00000001 +800017bc: 000d2103 lw x2,0(x26) +800017c0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x00000002 +800017c4: 000d2483 lw x9,0(x26) +800017c8: 004d0d13 addi x26,x26,4 + +800017cc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xperm8 x22, x2, x9 # perform operation +800017cc: 28914b33 xperm8 x22,x2,x9 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d0: 0009a383 lw x7,0(x19) +800017d4: 01638863 beq x7,x22,800017e4 +800017d8: 5410346f jal x8,80005518 +800017dc: 800017cc .word 0x800017cc +800017e0: 8000ae6d .word 0x8000ae6d +800017e4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x00000001 +800017e8: 000d2a03 lw x20,0(x26) +800017ec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x80000000 +800017f0: 000d2d83 lw x27,0(x26) +800017f4: 004d0d13 addi x26,x26,4 + +800017f8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + xperm8 x14, x20, x27 # perform operation +800017f8: 29ba4733 xperm8 x14,x20,x27 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017fc: 0009a383 lw x7,0(x19) +80001800: 00e38863 beq x7,x14,80001810 +80001804: 5150346f jal x8,80005518 +80001808: 800017f8 .word 0x800017f8 +8000180c: 8000aec0 .word 0x8000aec0 +80001810: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x00000001 +80001814: 000d2a83 lw x21,0(x26) +80001818: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x80000001 +8000181c: 000d2d83 lw x27,0(x26) +80001820: 004d0d13 addi x26,x26,4 + +80001824 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + xperm8 x28, x21, x27 # perform operation +80001824: 29bace33 xperm8 x28,x21,x27 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001828: 0009a383 lw x7,0(x19) +8000182c: 01c38863 beq x7,x28,8000183c +80001830: 4e90346f jal x8,80005518 +80001834: 80001824 .word 0x80001824 +80001838: 8000af1a .word 0x8000af1a +8000183c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x00000001 +80001840: 000d2683 lw x13,0(x26) +80001844: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x7fffffff +80001848: 000d2483 lw x9,0(x26) +8000184c: 004d0d13 addi x26,x26,4 + +80001850 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + xperm8 x3, x13, x9 # perform operation +80001850: 2896c1b3 xperm8 x3,x13,x9 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001854: 0009a383 lw x7,0(x19) +80001858: 00338863 beq x7,x3,80001868 +8000185c: 4bd0346f jal x8,80005518 +80001860: 80001850 .word 0x80001850 +80001864: 8000af74 .word 0x8000af74 +80001868: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x00000001 +8000186c: 000d2883 lw x17,0(x26) +80001870: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x7ffffffe +80001874: 000d2903 lw x18,0(x26) +80001878: 004d0d13 addi x26,x26,4 + +8000187c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + xperm8 x1, x17, x18 # perform operation +8000187c: 2928c0b3 xperm8 x1,x17,x18 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001880: 0009a383 lw x7,0(x19) +80001884: 00138863 beq x7,x1,80001894 +80001888: 4910346f jal x8,80005518 +8000188c: 8000187c .word 0x8000187c +80001890: 8000afce .word 0x8000afce +80001894: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x00000001 +80001898: 000d2603 lw x12,0(x26) +8000189c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xffffffff +800018a0: 000d2303 lw x6,0(x26) +800018a4: 004d0d13 addi x26,x26,4 + +800018a8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xperm8 x14, x12, x6 # perform operation +800018a8: 28664733 xperm8 x14,x12,x6 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018ac: 0009a383 lw x7,0(x19) +800018b0: 00e38863 beq x7,x14,800018c0 +800018b4: 4650346f jal x8,80005518 +800018b8: 800018a8 .word 0x800018a8 +800018bc: 8000b028 .word 0x8000b028 +800018c0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x00000001 +800018c4: 000d2b03 lw x22,0(x26) +800018c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xfffffffe +800018cc: 000d2303 lw x6,0(x26) +800018d0: 004d0d13 addi x26,x26,4 + +800018d4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xperm8 x31, x22, x6 # perform operation +800018d4: 286b4fb3 xperm8 x31,x22,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d8: 0009a383 lw x7,0(x19) +800018dc: 01f38863 beq x7,x31,800018ec +800018e0: 4390346f jal x8,80005518 +800018e4: 800018d4 .word 0x800018d4 +800018e8: 8000b082 .word 0x8000b082 +800018ec: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x00000001 +800018f0: 000d2803 lw x16,0(x26) +800018f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x5bbc8872 +800018f8: 000d2183 lw x3,0(x26) +800018fc: 004d0d13 addi x26,x26,4 + +80001900 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + xperm8 x20, x16, x3 # perform operation +80001900: 28384a33 xperm8 x20,x16,x3 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001904: 0009a383 lw x7,0(x19) +80001908: 01438863 beq x7,x20,80001918 +8000190c: 40d0346f jal x8,80005518 +80001910: 80001900 .word 0x80001900 +80001914: 8000b0dc .word 0x8000b0dc +80001918: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x00000001 +8000191c: 000d2283 lw x5,0(x26) +80001920: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xaaaaaaaa +80001924: 000d2603 lw x12,0(x26) +80001928: 004d0d13 addi x26,x26,4 + +8000192c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + xperm8 x11, x5, x12 # perform operation +8000192c: 28c2c5b3 xperm8 x11,x5,x12 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001930: 0009a383 lw x7,0(x19) +80001934: 00b38863 beq x7,x11,80001944 +80001938: 3e10346f jal x8,80005518 +8000193c: 8000192c .word 0x8000192c +80001940: 8000b136 .word 0x8000b136 +80001944: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x00000001 +80001948: 000d2483 lw x9,0(x26) +8000194c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x55555555 +80001950: 000d2a83 lw x21,0(x26) +80001954: 004d0d13 addi x26,x26,4 + +80001958 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + xperm8 x12, x9, x21 # perform operation +80001958: 2954c633 xperm8 x12,x9,x21 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000195c: 0009a383 lw x7,0(x19) +80001960: 00c38863 beq x7,x12,80001970 +80001964: 3b50346f jal x8,80005518 +80001968: 80001958 .word 0x80001958 +8000196c: 8000b190 .word 0x8000b190 +80001970: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x00000002 +80001974: 000d2303 lw x6,0(x26) +80001978: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x00000000 +8000197c: 000d2b83 lw x23,0(x26) +80001980: 004d0d13 addi x26,x26,4 + +80001984 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xperm8 x28, x6, x23 # perform operation +80001984: 29734e33 xperm8 x28,x6,x23 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001988: 0009a383 lw x7,0(x19) +8000198c: 01c38863 beq x7,x28,8000199c +80001990: 3890346f jal x8,80005518 +80001994: 80001984 .word 0x80001984 +80001998: 8000b1ea .word 0x8000b1ea +8000199c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x00000002 +800019a0: 000d2703 lw x14,0(x26) +800019a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x00000001 +800019a8: 000d2d83 lw x27,0(x26) +800019ac: 004d0d13 addi x26,x26,4 + +800019b0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xperm8 x10, x14, x27 # perform operation +800019b0: 29b74533 xperm8 x10,x14,x27 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019b4: 0009a383 lw x7,0(x19) +800019b8: 00a38863 beq x7,x10,800019c8 +800019bc: 35d0346f jal x8,80005518 +800019c0: 800019b0 .word 0x800019b0 +800019c4: 8000b23d .word 0x8000b23d +800019c8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x00000002 +800019cc: 000d2b03 lw x22,0(x26) +800019d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x00000002 +800019d4: 000d2803 lw x16,0(x26) +800019d8: 004d0d13 addi x26,x26,4 + +800019dc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xperm8 x17, x22, x16 # perform operation +800019dc: 290b48b3 xperm8 x17,x22,x16 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e0: 0009a383 lw x7,0(x19) +800019e4: 01138863 beq x7,x17,800019f4 +800019e8: 3310346f jal x8,80005518 +800019ec: 800019dc .word 0x800019dc +800019f0: 8000b290 .word 0x8000b290 +800019f4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x00000002 +800019f8: 000d2c83 lw x25,0(x26) +800019fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x80000000 +80001a00: 000d2303 lw x6,0(x26) +80001a04: 004d0d13 addi x26,x26,4 + +80001a08 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + xperm8 x28, x25, x6 # perform operation +80001a08: 286cce33 xperm8 x28,x25,x6 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a0c: 0009a383 lw x7,0(x19) +80001a10: 01c38863 beq x7,x28,80001a20 +80001a14: 3050346f jal x8,80005518 +80001a18: 80001a08 .word 0x80001a08 +80001a1c: 8000b2e3 .word 0x8000b2e3 +80001a20: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x00000002 +80001a24: 000d2483 lw x9,0(x26) +80001a28: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x80000001 +80001a2c: 000d2183 lw x3,0(x26) +80001a30: 004d0d13 addi x26,x26,4 + +80001a34 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + xperm8 x4, x9, x3 # perform operation +80001a34: 2834c233 xperm8 x4,x9,x3 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a38: 0009a383 lw x7,0(x19) +80001a3c: 00438863 beq x7,x4,80001a4c +80001a40: 2d90346f jal x8,80005518 +80001a44: 80001a34 .word 0x80001a34 +80001a48: 8000b33d .word 0x8000b33d +80001a4c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x00000002 +80001a50: 000d2483 lw x9,0(x26) +80001a54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x7fffffff +80001a58: 000d2a83 lw x21,0(x26) +80001a5c: 004d0d13 addi x26,x26,4 + +80001a60 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + xperm8 x16, x9, x21 # perform operation +80001a60: 2954c833 xperm8 x16,x9,x21 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a64: 0009a383 lw x7,0(x19) +80001a68: 01038863 beq x7,x16,80001a78 +80001a6c: 2ad0346f jal x8,80005518 +80001a70: 80001a60 .word 0x80001a60 +80001a74: 8000b397 .word 0x8000b397 +80001a78: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x00000002 +80001a7c: 000d2e83 lw x29,0(x26) +80001a80: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x7ffffffe +80001a84: 000d2303 lw x6,0(x26) +80001a88: 004d0d13 addi x26,x26,4 + +80001a8c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + xperm8 x31, x29, x6 # perform operation +80001a8c: 286ecfb3 xperm8 x31,x29,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a90: 0009a383 lw x7,0(x19) +80001a94: 01f38863 beq x7,x31,80001aa4 +80001a98: 2810346f jal x8,80005518 +80001a9c: 80001a8c .word 0x80001a8c +80001aa0: 8000b3f1 .word 0x8000b3f1 +80001aa4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x00000002 +80001aa8: 000d2b03 lw x22,0(x26) +80001aac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xffffffff +80001ab0: 000d2483 lw x9,0(x26) +80001ab4: 004d0d13 addi x26,x26,4 + +80001ab8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xperm8 x21, x22, x9 # perform operation +80001ab8: 289b4ab3 xperm8 x21,x22,x9 + # Check if x21 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001abc: 0009a383 lw x7,0(x19) +80001ac0: 01538863 beq x7,x21,80001ad0 +80001ac4: 2550346f jal x8,80005518 +80001ac8: 80001ab8 .word 0x80001ab8 +80001acc: 8000b44b .word 0x8000b44b +80001ad0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x00000002 +80001ad4: 000d2283 lw x5,0(x26) +80001ad8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xfffffffe +80001adc: 000d2103 lw x2,0(x26) +80001ae0: 004d0d13 addi x26,x26,4 + +80001ae4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xperm8 x10, x5, x2 # perform operation +80001ae4: 2822c533 xperm8 x10,x5,x2 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae8: 0009a383 lw x7,0(x19) +80001aec: 00a38863 beq x7,x10,80001afc +80001af0: 2290346f jal x8,80005518 +80001af4: 80001ae4 .word 0x80001ae4 +80001af8: 8000b4a5 .word 0x8000b4a5 +80001afc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x00000002 +80001b00: 000d2c83 lw x25,0(x26) +80001b04: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x5bbc8872 +80001b08: 000d2703 lw x14,0(x26) +80001b0c: 004d0d13 addi x26,x26,4 + +80001b10 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + xperm8 x1, x25, x14 # perform operation +80001b10: 28ecc0b3 xperm8 x1,x25,x14 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b14: 0009a383 lw x7,0(x19) +80001b18: 00138863 beq x7,x1,80001b28 +80001b1c: 1fd0346f jal x8,80005518 +80001b20: 80001b10 .word 0x80001b10 +80001b24: 8000b4ff .word 0x8000b4ff +80001b28: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x00000002 +80001b2c: 000d2703 lw x14,0(x26) +80001b30: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xaaaaaaaa +80001b34: 000d2d83 lw x27,0(x26) +80001b38: 004d0d13 addi x26,x26,4 + +80001b3c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + xperm8 x25, x14, x27 # perform operation +80001b3c: 29b74cb3 xperm8 x25,x14,x27 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b40: 0009a383 lw x7,0(x19) +80001b44: 01938863 beq x7,x25,80001b54 +80001b48: 1d10346f jal x8,80005518 +80001b4c: 80001b3c .word 0x80001b3c +80001b50: 8000b559 .word 0x8000b559 +80001b54: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x00000002 +80001b58: 000d2f03 lw x30,0(x26) +80001b5c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x55555555 +80001b60: 000d2f83 lw x31,0(x26) +80001b64: 004d0d13 addi x26,x26,4 + +80001b68 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + xperm8 x3, x30, x31 # perform operation +80001b68: 29ff41b3 xperm8 x3,x30,x31 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b6c: 0009a383 lw x7,0(x19) +80001b70: 00338863 beq x7,x3,80001b80 +80001b74: 1a50346f jal x8,80005518 +80001b78: 80001b68 .word 0x80001b68 +80001b7c: 8000b5b3 .word 0x8000b5b3 +80001b80: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x80000000 +80001b84: 000d2e03 lw x28,0(x26) +80001b88: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000000 +80001b8c: 000d2a83 lw x21,0(x26) +80001b90: 004d0d13 addi x26,x26,4 + +80001b94 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + xperm8 x20, x28, x21 # perform operation +80001b94: 295e4a33 xperm8 x20,x28,x21 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b98: 0009a383 lw x7,0(x19) +80001b9c: 01438863 beq x7,x20,80001bac +80001ba0: 1790346f jal x8,80005518 +80001ba4: 80001b94 .word 0x80001b94 +80001ba8: 8000b60d .word 0x8000b60d +80001bac: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x80000000 +80001bb0: 000d2f03 lw x30,0(x26) +80001bb4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x00000001 +80001bb8: 000d2c03 lw x24,0(x26) +80001bbc: 004d0d13 addi x26,x26,4 + +80001bc0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + xperm8 x9, x30, x24 # perform operation +80001bc0: 298f44b3 xperm8 x9,x30,x24 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bc4: 0009a383 lw x7,0(x19) +80001bc8: 00938863 beq x7,x9,80001bd8 +80001bcc: 14d0346f jal x8,80005518 +80001bd0: 80001bc0 .word 0x80001bc0 +80001bd4: 8000b667 .word 0x8000b667 +80001bd8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x80000000 +80001bdc: 000d2b03 lw x22,0(x26) +80001be0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x00000002 +80001be4: 000d2b83 lw x23,0(x26) +80001be8: 004d0d13 addi x26,x26,4 + +80001bec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + xperm8 x6, x22, x23 # perform operation +80001bec: 297b4333 xperm8 x6,x22,x23 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf0: 0009a383 lw x7,0(x19) +80001bf4: 00638863 beq x7,x6,80001c04 +80001bf8: 1210346f jal x8,80005518 +80001bfc: 80001bec .word 0x80001bec +80001c00: 8000b6c1 .word 0x8000b6c1 +80001c04: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x80000000 +80001c08: 000d2503 lw x10,0(x26) +80001c0c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x80000000 +80001c10: 000d2583 lw x11,0(x26) +80001c14: 004d0d13 addi x26,x26,4 + +80001c18 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + xperm8 x15, x10, x11 # perform operation +80001c18: 28b547b3 xperm8 x15,x10,x11 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c1c: 0009a383 lw x7,0(x19) +80001c20: 00f38863 beq x7,x15,80001c30 +80001c24: 0f50346f jal x8,80005518 +80001c28: 80001c18 .word 0x80001c18 +80001c2c: 8000b71b .word 0x8000b71b +80001c30: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x80000000 +80001c34: 000d2483 lw x9,0(x26) +80001c38: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0x80000001 +80001c3c: 000d2283 lw x5,0(x26) +80001c40: 004d0d13 addi x26,x26,4 + +80001c44 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + xperm8 x4, x9, x5 # perform operation +80001c44: 2854c233 xperm8 x4,x9,x5 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c48: 0009a383 lw x7,0(x19) +80001c4c: 00438863 beq x7,x4,80001c5c +80001c50: 0c90346f jal x8,80005518 +80001c54: 80001c44 .word 0x80001c44 +80001c58: 8000b77c .word 0x8000b77c +80001c5c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x80000000 +80001c60: 000d2283 lw x5,0(x26) +80001c64: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x7fffffff +80001c68: 000d2883 lw x17,0(x26) +80001c6c: 004d0d13 addi x26,x26,4 + +80001c70 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + xperm8 x14, x5, x17 # perform operation +80001c70: 2912c733 xperm8 x14,x5,x17 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c74: 0009a383 lw x7,0(x19) +80001c78: 00e38863 beq x7,x14,80001c88 +80001c7c: 09d0346f jal x8,80005518 +80001c80: 80001c70 .word 0x80001c70 +80001c84: 8000b7dd .word 0x8000b7dd +80001c88: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x80000000 +80001c8c: 000d2f03 lw x30,0(x26) +80001c90: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x7ffffffe +80001c94: 000d2883 lw x17,0(x26) +80001c98: 004d0d13 addi x26,x26,4 + +80001c9c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + xperm8 x18, x30, x17 # perform operation +80001c9c: 291f4933 xperm8 x18,x30,x17 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca0: 0009a383 lw x7,0(x19) +80001ca4: 01238863 beq x7,x18,80001cb4 +80001ca8: 0710346f jal x8,80005518 +80001cac: 80001c9c .word 0x80001c9c +80001cb0: 8000b83e .word 0x8000b83e +80001cb4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x80000000 +80001cb8: 000d2283 lw x5,0(x26) +80001cbc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xffffffff +80001cc0: 000d2903 lw x18,0(x26) +80001cc4: 004d0d13 addi x26,x26,4 + +80001cc8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + xperm8 x31, x5, x18 # perform operation +80001cc8: 2922cfb3 xperm8 x31,x5,x18 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001ccc: 0009a383 lw x7,0(x19) +80001cd0: 01f38863 beq x7,x31,80001ce0 +80001cd4: 0450346f jal x8,80005518 +80001cd8: 80001cc8 .word 0x80001cc8 +80001cdc: 8000b89f .word 0x8000b89f +80001ce0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x80000000 +80001ce4: 000d2f03 lw x30,0(x26) +80001ce8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xfffffffe +80001cec: 000d2483 lw x9,0(x26) +80001cf0: 004d0d13 addi x26,x26,4 + +80001cf4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + xperm8 x2, x30, x9 # perform operation +80001cf4: 289f4133 xperm8 x2,x30,x9 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf8: 0009a383 lw x7,0(x19) +80001cfc: 00238863 beq x7,x2,80001d0c +80001d00: 0190346f jal x8,80005518 +80001d04: 80001cf4 .word 0x80001cf4 +80001d08: 8000b900 .word 0x8000b900 +80001d0c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x80000000 +80001d10: 000d2083 lw x1,0(x26) +80001d14: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x5bbc8872 +80001d18: 000d2483 lw x9,0(x26) +80001d1c: 004d0d13 addi x26,x26,4 + +80001d20 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + xperm8 x12, x1, x9 # perform operation +80001d20: 2890c633 xperm8 x12,x1,x9 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d24: 0009a383 lw x7,0(x19) +80001d28: 00c38863 beq x7,x12,80001d38 +80001d2c: 7ec0346f jal x8,80005518 +80001d30: 80001d20 .word 0x80001d20 +80001d34: 8000b961 .word 0x8000b961 +80001d38: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x80000000 +80001d3c: 000d2f03 lw x30,0(x26) +80001d40: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0xaaaaaaaa +80001d44: 000d2683 lw x13,0(x26) +80001d48: 004d0d13 addi x26,x26,4 + +80001d4c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + xperm8 x24, x30, x13 # perform operation +80001d4c: 28df4c33 xperm8 x24,x30,x13 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d50: 0009a383 lw x7,0(x19) +80001d54: 01838863 beq x7,x24,80001d64 +80001d58: 7c00346f jal x8,80005518 +80001d5c: 80001d4c .word 0x80001d4c +80001d60: 8000b9c2 .word 0x8000b9c2 +80001d64: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x80000000 +80001d68: 000d2803 lw x16,0(x26) +80001d6c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x55555555 +80001d70: 000d2083 lw x1,0(x26) +80001d74: 004d0d13 addi x26,x26,4 + +80001d78 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + xperm8 x29, x16, x1 # perform operation +80001d78: 28184eb3 xperm8 x29,x16,x1 + # Check if x29 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d7c: 0009a383 lw x7,0(x19) +80001d80: 01d38863 beq x7,x29,80001d90 +80001d84: 7940346f jal x8,80005518 +80001d88: 80001d78 .word 0x80001d78 +80001d8c: 8000ba23 .word 0x8000ba23 +80001d90: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x80000001 +80001d94: 000d2f03 lw x30,0(x26) +80001d98: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x00000000 +80001d9c: 000d2d83 lw x27,0(x26) +80001da0: 004d0d13 addi x26,x26,4 + +80001da4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + xperm8 x10, x30, x27 # perform operation +80001da4: 29bf4533 xperm8 x10,x30,x27 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da8: 0009a383 lw x7,0(x19) +80001dac: 00a38863 beq x7,x10,80001dbc +80001db0: 7680346f jal x8,80005518 +80001db4: 80001da4 .word 0x80001da4 +80001db8: 8000ba84 .word 0x8000ba84 +80001dbc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x80000001 +80001dc0: 000d2903 lw x18,0(x26) +80001dc4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000001 +80001dc8: 000d2a83 lw x21,0(x26) +80001dcc: 004d0d13 addi x26,x26,4 + +80001dd0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + xperm8 x10, x18, x21 # perform operation +80001dd0: 29594533 xperm8 x10,x18,x21 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dd4: 0009a383 lw x7,0(x19) +80001dd8: 00a38863 beq x7,x10,80001de8 +80001ddc: 73c0346f jal x8,80005518 +80001de0: 80001dd0 .word 0x80001dd0 +80001de4: 8000bade .word 0x8000bade +80001de8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x80000001 +80001dec: 000d2283 lw x5,0(x26) +80001df0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x00000002 +80001df4: 000d2603 lw x12,0(x26) +80001df8: 004d0d13 addi x26,x26,4 + +80001dfc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + xperm8 x14, x5, x12 # perform operation +80001dfc: 28c2c733 xperm8 x14,x5,x12 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e00: 0009a383 lw x7,0(x19) +80001e04: 00e38863 beq x7,x14,80001e14 +80001e08: 7100346f jal x8,80005518 +80001e0c: 80001dfc .word 0x80001dfc +80001e10: 8000bb38 .word 0x8000bb38 +80001e14: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x80000001 +80001e18: 000d2783 lw x15,0(x26) +80001e1c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x80000000 +80001e20: 000d2903 lw x18,0(x26) +80001e24: 004d0d13 addi x26,x26,4 + +80001e28 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + xperm8 x1, x15, x18 # perform operation +80001e28: 2927c0b3 xperm8 x1,x15,x18 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e2c: 0009a383 lw x7,0(x19) +80001e30: 00138863 beq x7,x1,80001e40 +80001e34: 6e40346f jal x8,80005518 +80001e38: 80001e28 .word 0x80001e28 +80001e3c: 8000bb92 .word 0x8000bb92 +80001e40: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x80000001 +80001e44: 000d2d83 lw x27,0(x26) +80001e48: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x80000001 +80001e4c: 000d2603 lw x12,0(x26) +80001e50: 004d0d13 addi x26,x26,4 + +80001e54 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + xperm8 x20, x27, x12 # perform operation +80001e54: 28cdca33 xperm8 x20,x27,x12 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e58: 0009a383 lw x7,0(x19) +80001e5c: 01438863 beq x7,x20,80001e6c +80001e60: 6b80346f jal x8,80005518 +80001e64: 80001e54 .word 0x80001e54 +80001e68: 8000bbf3 .word 0x8000bbf3 +80001e6c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x80000001 +80001e70: 000d2103 lw x2,0(x26) +80001e74: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x7fffffff +80001e78: 000d2c03 lw x24,0(x26) +80001e7c: 004d0d13 addi x26,x26,4 + +80001e80 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + xperm8 x22, x2, x24 # perform operation +80001e80: 29814b33 xperm8 x22,x2,x24 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e84: 0009a383 lw x7,0(x19) +80001e88: 01638863 beq x7,x22,80001e98 +80001e8c: 68c0346f jal x8,80005518 +80001e90: 80001e80 .word 0x80001e80 +80001e94: 8000bc54 .word 0x8000bc54 +80001e98: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x80000001 +80001e9c: 000d2303 lw x6,0(x26) +80001ea0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x7ffffffe +80001ea4: 000d2c03 lw x24,0(x26) +80001ea8: 004d0d13 addi x26,x26,4 + +80001eac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + xperm8 x5, x6, x24 # perform operation +80001eac: 298342b3 xperm8 x5,x6,x24 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb0: 0009a383 lw x7,0(x19) +80001eb4: 00538863 beq x7,x5,80001ec4 +80001eb8: 6600346f jal x8,80005518 +80001ebc: 80001eac .word 0x80001eac +80001ec0: 8000bcb5 .word 0x8000bcb5 +80001ec4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x80000001 +80001ec8: 000d2e83 lw x29,0(x26) +80001ecc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0xffffffff +80001ed0: 000d2183 lw x3,0(x26) +80001ed4: 004d0d13 addi x26,x26,4 + +80001ed8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + xperm8 x1, x29, x3 # perform operation +80001ed8: 283ec0b3 xperm8 x1,x29,x3 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001edc: 0009a383 lw x7,0(x19) +80001ee0: 00138863 beq x7,x1,80001ef0 +80001ee4: 6340346f jal x8,80005518 +80001ee8: 80001ed8 .word 0x80001ed8 +80001eec: 8000bd16 .word 0x8000bd16 +80001ef0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x80000001 +80001ef4: 000d2703 lw x14,0(x26) +80001ef8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0xfffffffe +80001efc: 000d2203 lw x4,0(x26) +80001f00: 004d0d13 addi x26,x26,4 + +80001f04 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + xperm8 x16, x14, x4 # perform operation +80001f04: 28474833 xperm8 x16,x14,x4 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f08: 0009a383 lw x7,0(x19) +80001f0c: 01038863 beq x7,x16,80001f1c +80001f10: 6080346f jal x8,80005518 +80001f14: 80001f04 .word 0x80001f04 +80001f18: 8000bd77 .word 0x8000bd77 +80001f1c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x80000001 +80001f20: 000d2a83 lw x21,0(x26) +80001f24: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x5bbc8872 +80001f28: 000d2183 lw x3,0(x26) +80001f2c: 004d0d13 addi x26,x26,4 + +80001f30 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + xperm8 x25, x21, x3 # perform operation +80001f30: 283accb3 xperm8 x25,x21,x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f34: 0009a383 lw x7,0(x19) +80001f38: 01938863 beq x7,x25,80001f48 +80001f3c: 5dc0346f jal x8,80005518 +80001f40: 80001f30 .word 0x80001f30 +80001f44: 8000bdd8 .word 0x8000bdd8 +80001f48: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x80000001 +80001f4c: 000d2603 lw x12,0(x26) +80001f50: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xaaaaaaaa +80001f54: 000d2303 lw x6,0(x26) +80001f58: 004d0d13 addi x26,x26,4 + +80001f5c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + xperm8 x31, x12, x6 # perform operation +80001f5c: 28664fb3 xperm8 x31,x12,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f60: 0009a383 lw x7,0(x19) +80001f64: 01f38863 beq x7,x31,80001f74 +80001f68: 5b00346f jal x8,80005518 +80001f6c: 80001f5c .word 0x80001f5c +80001f70: 8000be39 .word 0x8000be39 +80001f74: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x80000001 +80001f78: 000d2b83 lw x23,0(x26) +80001f7c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x55555555 +80001f80: 000d2603 lw x12,0(x26) +80001f84: 004d0d13 addi x26,x26,4 + +80001f88 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + xperm8 x20, x23, x12 # perform operation +80001f88: 28cbca33 xperm8 x20,x23,x12 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f8c: 0009a383 lw x7,0(x19) +80001f90: 01438863 beq x7,x20,80001fa0 +80001f94: 5840346f jal x8,80005518 +80001f98: 80001f88 .word 0x80001f88 +80001f9c: 8000be9a .word 0x8000be9a +80001fa0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x7fffffff +80001fa4: 000d2683 lw x13,0(x26) +80001fa8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x00000000 +80001fac: 000d2783 lw x15,0(x26) +80001fb0: 004d0d13 addi x26,x26,4 + +80001fb4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + xperm8 x5, x13, x15 # perform operation +80001fb4: 28f6c2b3 xperm8 x5,x13,x15 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb8: 0009a383 lw x7,0(x19) +80001fbc: 00538863 beq x7,x5,80001fcc +80001fc0: 5580346f jal x8,80005518 +80001fc4: 80001fb4 .word 0x80001fb4 +80001fc8: 8000befb .word 0x8000befb +80001fcc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x7fffffff +80001fd0: 000d2f83 lw x31,0(x26) +80001fd4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x00000001 +80001fd8: 000d2c83 lw x25,0(x26) +80001fdc: 004d0d13 addi x26,x26,4 + +80001fe0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + xperm8 x11, x31, x25 # perform operation +80001fe0: 299fc5b3 xperm8 x11,x31,x25 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fe4: 0009a383 lw x7,0(x19) +80001fe8: 00b38863 beq x7,x11,80001ff8 +80001fec: 52c0346f jal x8,80005518 +80001ff0: 80001fe0 .word 0x80001fe0 +80001ff4: 8000bf55 .word 0x8000bf55 +80001ff8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x7fffffff +80001ffc: 000d2a03 lw x20,0(x26) +80002000: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x00000002 +80002004: 000d2783 lw x15,0(x26) +80002008: 004d0d13 addi x26,x26,4 + +8000200c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + xperm8 x6, x20, x15 # perform operation +8000200c: 28fa4333 xperm8 x6,x20,x15 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002010: 0009a383 lw x7,0(x19) +80002014: 00638863 beq x7,x6,80002024 +80002018: 5000346f jal x8,80005518 +8000201c: 8000200c .word 0x8000200c +80002020: 8000bfaf .word 0x8000bfaf +80002024: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x7fffffff +80002028: 000d2183 lw x3,0(x26) +8000202c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x80000000 +80002030: 000d2e03 lw x28,0(x26) +80002034: 004d0d13 addi x26,x26,4 + +80002038 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + xperm8 x20, x3, x28 # perform operation +80002038: 29c1ca33 xperm8 x20,x3,x28 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000203c: 0009a383 lw x7,0(x19) +80002040: 01438863 beq x7,x20,80002050 +80002044: 4d40346f jal x8,80005518 +80002048: 80002038 .word 0x80002038 +8000204c: 8000c009 .word 0x8000c009 +80002050: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x7fffffff +80002054: 000d2083 lw x1,0(x26) +80002058: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x80000001 +8000205c: 000d2303 lw x6,0(x26) +80002060: 004d0d13 addi x26,x26,4 + +80002064 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + xperm8 x16, x1, x6 # perform operation +80002064: 2860c833 xperm8 x16,x1,x6 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002068: 0009a383 lw x7,0(x19) +8000206c: 01038863 beq x7,x16,8000207c +80002070: 4a80346f jal x8,80005518 +80002074: 80002064 .word 0x80002064 +80002078: 8000c06a .word 0x8000c06a +8000207c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x7fffffff +80002080: 000d2f83 lw x31,0(x26) +80002084: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x7fffffff +80002088: 000d2683 lw x13,0(x26) +8000208c: 004d0d13 addi x26,x26,4 + +80002090 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + xperm8 x15, x31, x13 # perform operation +80002090: 28dfc7b3 xperm8 x15,x31,x13 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002094: 0009a383 lw x7,0(x19) +80002098: 00f38863 beq x7,x15,800020a8 +8000209c: 47c0346f jal x8,80005518 +800020a0: 80002090 .word 0x80002090 +800020a4: 8000c0cb .word 0x8000c0cb +800020a8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x7fffffff +800020ac: 000d2303 lw x6,0(x26) +800020b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x7ffffffe +800020b4: 000d2783 lw x15,0(x26) +800020b8: 004d0d13 addi x26,x26,4 + +800020bc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + xperm8 x9, x6, x15 # perform operation +800020bc: 28f344b3 xperm8 x9,x6,x15 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c0: 0009a383 lw x7,0(x19) +800020c4: 00938863 beq x7,x9,800020d4 +800020c8: 4500346f jal x8,80005518 +800020cc: 800020bc .word 0x800020bc +800020d0: 8000c12c .word 0x8000c12c +800020d4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x7fffffff +800020d8: 000d2d83 lw x27,0(x26) +800020dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xffffffff +800020e0: 000d2483 lw x9,0(x26) +800020e4: 004d0d13 addi x26,x26,4 + +800020e8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + xperm8 x17, x27, x9 # perform operation +800020e8: 289dc8b3 xperm8 x17,x27,x9 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020ec: 0009a383 lw x7,0(x19) +800020f0: 01138863 beq x7,x17,80002100 +800020f4: 4240346f jal x8,80005518 +800020f8: 800020e8 .word 0x800020e8 +800020fc: 8000c18d .word 0x8000c18d +80002100: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x7fffffff +80002104: 000d2303 lw x6,0(x26) +80002108: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xfffffffe +8000210c: 000d2783 lw x15,0(x26) +80002110: 004d0d13 addi x26,x26,4 + +80002114 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + xperm8 x27, x6, x15 # perform operation +80002114: 28f34db3 xperm8 x27,x6,x15 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002118: 0009a383 lw x7,0(x19) +8000211c: 01b38863 beq x7,x27,8000212c +80002120: 3f80346f jal x8,80005518 +80002124: 80002114 .word 0x80002114 +80002128: 8000c1ee .word 0x8000c1ee +8000212c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x7fffffff +80002130: 000d2203 lw x4,0(x26) +80002134: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x5bbc8872 +80002138: 000d2803 lw x16,0(x26) +8000213c: 004d0d13 addi x26,x26,4 + +80002140 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + xperm8 x15, x4, x16 # perform operation +80002140: 290247b3 xperm8 x15,x4,x16 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002144: 0009a383 lw x7,0(x19) +80002148: 00f38863 beq x7,x15,80002158 +8000214c: 3cc0346f jal x8,80005518 +80002150: 80002140 .word 0x80002140 +80002154: 8000c24f .word 0x8000c24f +80002158: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x7fffffff +8000215c: 000d2c03 lw x24,0(x26) +80002160: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0xaaaaaaaa +80002164: 000d2283 lw x5,0(x26) +80002168: 004d0d13 addi x26,x26,4 + +8000216c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + xperm8 x9, x24, x5 # perform operation +8000216c: 285c44b3 xperm8 x9,x24,x5 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002170: 0009a383 lw x7,0(x19) +80002174: 00938863 beq x7,x9,80002184 +80002178: 3a00346f jal x8,80005518 +8000217c: 8000216c .word 0x8000216c +80002180: 8000c2b0 .word 0x8000c2b0 +80002184: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x7fffffff +80002188: 000d2903 lw x18,0(x26) +8000218c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x55555555 +80002190: 000d2d83 lw x27,0(x26) +80002194: 004d0d13 addi x26,x26,4 + +80002198 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + xperm8 x25, x18, x27 # perform operation +80002198: 29b94cb3 xperm8 x25,x18,x27 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000219c: 0009a383 lw x7,0(x19) +800021a0: 01938863 beq x7,x25,800021b0 +800021a4: 3740346f jal x8,80005518 +800021a8: 80002198 .word 0x80002198 +800021ac: 8000c311 .word 0x8000c311 +800021b0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x7ffffffe +800021b4: 000d2083 lw x1,0(x26) +800021b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x00000000 +800021bc: 000d2303 lw x6,0(x26) +800021c0: 004d0d13 addi x26,x26,4 + +800021c4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + xperm8 x10, x1, x6 # perform operation +800021c4: 2860c533 xperm8 x10,x1,x6 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c8: 0009a383 lw x7,0(x19) +800021cc: 00a38863 beq x7,x10,800021dc +800021d0: 3480346f jal x8,80005518 +800021d4: 800021c4 .word 0x800021c4 +800021d8: 8000c372 .word 0x8000c372 +800021dc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x7ffffffe +800021e0: 000d2503 lw x10,0(x26) +800021e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x00000001 +800021e8: 000d2903 lw x18,0(x26) +800021ec: 004d0d13 addi x26,x26,4 + +800021f0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + xperm8 x22, x10, x18 # perform operation +800021f0: 29254b33 xperm8 x22,x10,x18 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021f4: 0009a383 lw x7,0(x19) +800021f8: 01638863 beq x7,x22,80002208 +800021fc: 31c0346f jal x8,80005518 +80002200: 800021f0 .word 0x800021f0 +80002204: 8000c3cc .word 0x8000c3cc +80002208: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x7ffffffe +8000220c: 000d2103 lw x2,0(x26) +80002210: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x00000002 +80002214: 000d2583 lw x11,0(x26) +80002218: 004d0d13 addi x26,x26,4 + +8000221c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + xperm8 x14, x2, x11 # perform operation +8000221c: 28b14733 xperm8 x14,x2,x11 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002220: 0009a383 lw x7,0(x19) +80002224: 00e38863 beq x7,x14,80002234 +80002228: 2f00346f jal x8,80005518 +8000222c: 8000221c .word 0x8000221c +80002230: 8000c426 .word 0x8000c426 +80002234: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x7ffffffe +80002238: 000d2203 lw x4,0(x26) +8000223c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x80000000 +80002240: 000d2583 lw x11,0(x26) +80002244: 004d0d13 addi x26,x26,4 + +80002248 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + xperm8 x14, x4, x11 # perform operation +80002248: 28b24733 xperm8 x14,x4,x11 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000224c: 0009a383 lw x7,0(x19) +80002250: 00e38863 beq x7,x14,80002260 +80002254: 2c40346f jal x8,80005518 +80002258: 80002248 .word 0x80002248 +8000225c: 8000c480 .word 0x8000c480 +80002260: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x7ffffffe +80002264: 000d2903 lw x18,0(x26) +80002268: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0x80000001 +8000226c: 000d2283 lw x5,0(x26) +80002270: 004d0d13 addi x26,x26,4 + +80002274 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + xperm8 x13, x18, x5 # perform operation +80002274: 285946b3 xperm8 x13,x18,x5 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002278: 0009a383 lw x7,0(x19) +8000227c: 00d38863 beq x7,x13,8000228c +80002280: 2980346f jal x8,80005518 +80002284: 80002274 .word 0x80002274 +80002288: 8000c4e1 .word 0x8000c4e1 +8000228c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x7ffffffe +80002290: 000d2e03 lw x28,0(x26) +80002294: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x7fffffff +80002298: 000d2683 lw x13,0(x26) +8000229c: 004d0d13 addi x26,x26,4 + +800022a0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + xperm8 x22, x28, x13 # perform operation +800022a0: 28de4b33 xperm8 x22,x28,x13 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022a4: 0009a383 lw x7,0(x19) +800022a8: 01638863 beq x7,x22,800022b8 +800022ac: 26c0346f jal x8,80005518 +800022b0: 800022a0 .word 0x800022a0 +800022b4: 8000c542 .word 0x8000c542 +800022b8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x7ffffffe +800022bc: 000d2083 lw x1,0(x26) +800022c0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x7ffffffe +800022c4: 000d2703 lw x14,0(x26) +800022c8: 004d0d13 addi x26,x26,4 + +800022cc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + xperm8 x31, x1, x14 # perform operation +800022cc: 28e0cfb3 xperm8 x31,x1,x14 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d0: 0009a383 lw x7,0(x19) +800022d4: 01f38863 beq x7,x31,800022e4 +800022d8: 2400346f jal x8,80005518 +800022dc: 800022cc .word 0x800022cc +800022e0: 8000c5a3 .word 0x8000c5a3 +800022e4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x7ffffffe +800022e8: 000d2a03 lw x20,0(x26) +800022ec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xffffffff +800022f0: 000d2a83 lw x21,0(x26) +800022f4: 004d0d13 addi x26,x26,4 + +800022f8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + xperm8 x23, x20, x21 # perform operation +800022f8: 295a4bb3 xperm8 x23,x20,x21 + # Check if x23 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022fc: 0009a383 lw x7,0(x19) +80002300: 01738863 beq x7,x23,80002310 +80002304: 2140346f jal x8,80005518 +80002308: 800022f8 .word 0x800022f8 +8000230c: 8000c604 .word 0x8000c604 +80002310: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x7ffffffe +80002314: 000d2b83 lw x23,0(x26) +80002318: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xfffffffe +8000231c: 000d2803 lw x16,0(x26) +80002320: 004d0d13 addi x26,x26,4 + +80002324 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + xperm8 x21, x23, x16 # perform operation +80002324: 290bcab3 xperm8 x21,x23,x16 + # Check if x21 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002328: 0009a383 lw x7,0(x19) +8000232c: 01538863 beq x7,x21,8000233c +80002330: 1e80346f jal x8,80005518 +80002334: 80002324 .word 0x80002324 +80002338: 8000c665 .word 0x8000c665 +8000233c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x7ffffffe +80002340: 000d2e83 lw x29,0(x26) +80002344: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x5bbc8872 +80002348: 000d2183 lw x3,0(x26) +8000234c: 004d0d13 addi x26,x26,4 + +80002350 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + xperm8 x27, x29, x3 # perform operation +80002350: 283ecdb3 xperm8 x27,x29,x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002354: 0009a383 lw x7,0(x19) +80002358: 01b38863 beq x7,x27,80002368 +8000235c: 1bc0346f jal x8,80005518 +80002360: 80002350 .word 0x80002350 +80002364: 8000c6c6 .word 0x8000c6c6 +80002368: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x7ffffffe +8000236c: 000d2683 lw x13,0(x26) +80002370: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xaaaaaaaa +80002374: 000d2903 lw x18,0(x26) +80002378: 004d0d13 addi x26,x26,4 + +8000237c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + xperm8 x3, x13, x18 # perform operation +8000237c: 2926c1b3 xperm8 x3,x13,x18 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002380: 0009a383 lw x7,0(x19) +80002384: 00338863 beq x7,x3,80002394 +80002388: 1900346f jal x8,80005518 +8000238c: 8000237c .word 0x8000237c +80002390: 8000c727 .word 0x8000c727 +80002394: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x7ffffffe +80002398: 000d2203 lw x4,0(x26) +8000239c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x55555555 +800023a0: 000d2883 lw x17,0(x26) +800023a4: 004d0d13 addi x26,x26,4 + +800023a8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + xperm8 x16, x4, x17 # perform operation +800023a8: 29124833 xperm8 x16,x4,x17 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023ac: 0009a383 lw x7,0(x19) +800023b0: 01038863 beq x7,x16,800023c0 +800023b4: 1640346f jal x8,80005518 +800023b8: 800023a8 .word 0x800023a8 +800023bc: 8000c788 .word 0x8000c788 +800023c0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xffffffff +800023c4: 000d2c83 lw x25,0(x26) +800023c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x00000000 +800023cc: 000d2c03 lw x24,0(x26) +800023d0: 004d0d13 addi x26,x26,4 + +800023d4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xperm8 x6, x25, x24 # perform operation +800023d4: 298cc333 xperm8 x6,x25,x24 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d8: 0009a383 lw x7,0(x19) +800023dc: 00638863 beq x7,x6,800023ec +800023e0: 1380346f jal x8,80005518 +800023e4: 800023d4 .word 0x800023d4 +800023e8: 8000c7e9 .word 0x8000c7e9 +800023ec: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xffffffff +800023f0: 000d2b83 lw x23,0(x26) +800023f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x00000001 +800023f8: 000d2803 lw x16,0(x26) +800023fc: 004d0d13 addi x26,x26,4 + +80002400 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xperm8 x27, x23, x16 # perform operation +80002400: 290bcdb3 xperm8 x27,x23,x16 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002404: 0009a383 lw x7,0(x19) +80002408: 01b38863 beq x7,x27,80002418 +8000240c: 10c0346f jal x8,80005518 +80002410: 80002400 .word 0x80002400 +80002414: 8000c843 .word 0x8000c843 +80002418: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xffffffff +8000241c: 000d2c03 lw x24,0(x26) +80002420: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x00000002 +80002424: 000d2883 lw x17,0(x26) +80002428: 004d0d13 addi x26,x26,4 + +8000242c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xperm8 x12, x24, x17 # perform operation +8000242c: 291c4633 xperm8 x12,x24,x17 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002430: 0009a383 lw x7,0(x19) +80002434: 00c38863 beq x7,x12,80002444 +80002438: 0e00346f jal x8,80005518 +8000243c: 8000242c .word 0x8000242c +80002440: 8000c89d .word 0x8000c89d +80002444: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xffffffff +80002448: 000d2503 lw x10,0(x26) +8000244c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x80000000 +80002450: 000d2e83 lw x29,0(x26) +80002454: 004d0d13 addi x26,x26,4 + +80002458 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + xperm8 x3, x10, x29 # perform operation +80002458: 29d541b3 xperm8 x3,x10,x29 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000245c: 0009a383 lw x7,0(x19) +80002460: 00338863 beq x7,x3,80002470 +80002464: 0b40346f jal x8,80005518 +80002468: 80002458 .word 0x80002458 +8000246c: 8000c8f7 .word 0x8000c8f7 +80002470: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xffffffff +80002474: 000d2603 lw x12,0(x26) +80002478: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x80000001 +8000247c: 000d2f83 lw x31,0(x26) +80002480: 004d0d13 addi x26,x26,4 + +80002484 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + xperm8 x11, x12, x31 # perform operation +80002484: 29f645b3 xperm8 x11,x12,x31 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002488: 0009a383 lw x7,0(x19) +8000248c: 00b38863 beq x7,x11,8000249c +80002490: 0880346f jal x8,80005518 +80002494: 80002484 .word 0x80002484 +80002498: 8000c958 .word 0x8000c958 +8000249c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xffffffff +800024a0: 000d2903 lw x18,0(x26) +800024a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x7fffffff +800024a8: 000d2783 lw x15,0(x26) +800024ac: 004d0d13 addi x26,x26,4 + +800024b0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + xperm8 x22, x18, x15 # perform operation +800024b0: 28f94b33 xperm8 x22,x18,x15 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024b4: 0009a383 lw x7,0(x19) +800024b8: 01638863 beq x7,x22,800024c8 +800024bc: 05c0346f jal x8,80005518 +800024c0: 800024b0 .word 0x800024b0 +800024c4: 8000c9b9 .word 0x8000c9b9 +800024c8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xffffffff +800024cc: 000d2f83 lw x31,0(x26) +800024d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x7ffffffe +800024d4: 000d2883 lw x17,0(x26) +800024d8: 004d0d13 addi x26,x26,4 + +800024dc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + xperm8 x28, x31, x17 # perform operation +800024dc: 291fce33 xperm8 x28,x31,x17 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e0: 0009a383 lw x7,0(x19) +800024e4: 01c38863 beq x7,x28,800024f4 +800024e8: 0300346f jal x8,80005518 +800024ec: 800024dc .word 0x800024dc +800024f0: 8000ca1a .word 0x8000ca1a +800024f4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xffffffff +800024f8: 000d2903 lw x18,0(x26) +800024fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xffffffff +80002500: 000d2b03 lw x22,0(x26) +80002504: 004d0d13 addi x26,x26,4 + +80002508 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xperm8 x4, x18, x22 # perform operation +80002508: 29694233 xperm8 x4,x18,x22 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +8000250c: 0009a383 lw x7,0(x19) +80002510: 00438863 beq x7,x4,80002520 +80002514: 0040346f jal x8,80005518 +80002518: 80002508 .word 0x80002508 +8000251c: 8000ca7b .word 0x8000ca7b +80002520: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xffffffff +80002524: 000d2703 lw x14,0(x26) +80002528: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xfffffffe +8000252c: 000d2b83 lw x23,0(x26) +80002530: 004d0d13 addi x26,x26,4 + +80002534 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xperm8 x12, x14, x23 # perform operation +80002534: 29774633 xperm8 x12,x14,x23 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002538: 0009a383 lw x7,0(x19) +8000253c: 00c38863 beq x7,x12,8000254c +80002540: 7d90246f jal x8,80005518 +80002544: 80002534 .word 0x80002534 +80002548: 8000cadc .word 0x8000cadc +8000254c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xffffffff +80002550: 000d2583 lw x11,0(x26) +80002554: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x5bbc8872 +80002558: 000d2803 lw x16,0(x26) +8000255c: 004d0d13 addi x26,x26,4 + +80002560 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + xperm8 x9, x11, x16 # perform operation +80002560: 2905c4b3 xperm8 x9,x11,x16 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002564: 0009a383 lw x7,0(x19) +80002568: 00938863 beq x7,x9,80002578 +8000256c: 7ad0246f jal x8,80005518 +80002570: 80002560 .word 0x80002560 +80002574: 8000cb3d .word 0x8000cb3d +80002578: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xffffffff +8000257c: 000d2083 lw x1,0(x26) +80002580: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xaaaaaaaa +80002584: 000d2703 lw x14,0(x26) +80002588: 004d0d13 addi x26,x26,4 + +8000258c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + xperm8 x31, x1, x14 # perform operation +8000258c: 28e0cfb3 xperm8 x31,x1,x14 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002590: 0009a383 lw x7,0(x19) +80002594: 01f38863 beq x7,x31,800025a4 +80002598: 7810246f jal x8,80005518 +8000259c: 8000258c .word 0x8000258c +800025a0: 8000cb9e .word 0x8000cb9e +800025a4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xffffffff +800025a8: 000d2083 lw x1,0(x26) +800025ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x55555555 +800025b0: 000d2c83 lw x25,0(x26) +800025b4: 004d0d13 addi x26,x26,4 + +800025b8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + xperm8 x6, x1, x25 # perform operation +800025b8: 2990c333 xperm8 x6,x1,x25 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025bc: 0009a383 lw x7,0(x19) +800025c0: 00638863 beq x7,x6,800025d0 +800025c4: 7550246f jal x8,80005518 +800025c8: 800025b8 .word 0x800025b8 +800025cc: 8000cbff .word 0x8000cbff +800025d0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xfffffffe +800025d4: 000d2703 lw x14,0(x26) +800025d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x00000000 +800025dc: 000d2083 lw x1,0(x26) +800025e0: 004d0d13 addi x26,x26,4 + +800025e4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xperm8 x2, x14, x1 # perform operation +800025e4: 28174133 xperm8 x2,x14,x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e8: 0009a383 lw x7,0(x19) +800025ec: 00238863 beq x7,x2,800025fc +800025f0: 7290246f jal x8,80005518 +800025f4: 800025e4 .word 0x800025e4 +800025f8: 8000cc60 .word 0x8000cc60 +800025fc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xfffffffe +80002600: 000d2703 lw x14,0(x26) +80002604: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x00000001 +80002608: 000d2483 lw x9,0(x26) +8000260c: 004d0d13 addi x26,x26,4 + +80002610 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xperm8 x5, x14, x9 # perform operation +80002610: 289742b3 xperm8 x5,x14,x9 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002614: 0009a383 lw x7,0(x19) +80002618: 00538863 beq x7,x5,80002628 +8000261c: 6fd0246f jal x8,80005518 +80002620: 80002610 .word 0x80002610 +80002624: 8000ccba .word 0x8000ccba +80002628: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xfffffffe +8000262c: 000d2e83 lw x29,0(x26) +80002630: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x00000002 +80002634: 000d2f83 lw x31,0(x26) +80002638: 004d0d13 addi x26,x26,4 + +8000263c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xperm8 x28, x29, x31 # perform operation +8000263c: 29fece33 xperm8 x28,x29,x31 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002640: 0009a383 lw x7,0(x19) +80002644: 01c38863 beq x7,x28,80002654 +80002648: 6d10246f jal x8,80005518 +8000264c: 8000263c .word 0x8000263c +80002650: 8000cd14 .word 0x8000cd14 +80002654: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xfffffffe +80002658: 000d2803 lw x16,0(x26) +8000265c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x80000000 +80002660: 000d2703 lw x14,0(x26) +80002664: 004d0d13 addi x26,x26,4 + +80002668 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + xperm8 x5, x16, x14 # perform operation +80002668: 28e842b3 xperm8 x5,x16,x14 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000266c: 0009a383 lw x7,0(x19) +80002670: 00538863 beq x7,x5,80002680 +80002674: 6a50246f jal x8,80005518 +80002678: 80002668 .word 0x80002668 +8000267c: 8000cd6e .word 0x8000cd6e +80002680: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xfffffffe +80002684: 000d2203 lw x4,0(x26) +80002688: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x80000001 +8000268c: 000d2c03 lw x24,0(x26) +80002690: 004d0d13 addi x26,x26,4 + +80002694 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + xperm8 x31, x4, x24 # perform operation +80002694: 29824fb3 xperm8 x31,x4,x24 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002698: 0009a383 lw x7,0(x19) +8000269c: 01f38863 beq x7,x31,800026ac +800026a0: 6790246f jal x8,80005518 +800026a4: 80002694 .word 0x80002694 +800026a8: 8000cdcf .word 0x8000cdcf +800026ac: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xfffffffe +800026b0: 000d2203 lw x4,0(x26) +800026b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x7fffffff +800026b8: 000d2f83 lw x31,0(x26) +800026bc: 004d0d13 addi x26,x26,4 + +800026c0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + xperm8 x5, x4, x31 # perform operation +800026c0: 29f242b3 xperm8 x5,x4,x31 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026c4: 0009a383 lw x7,0(x19) +800026c8: 00538863 beq x7,x5,800026d8 +800026cc: 64d0246f jal x8,80005518 +800026d0: 800026c0 .word 0x800026c0 +800026d4: 8000ce30 .word 0x8000ce30 +800026d8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xfffffffe +800026dc: 000d2503 lw x10,0(x26) +800026e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x7ffffffe +800026e4: 000d2483 lw x9,0(x26) +800026e8: 004d0d13 addi x26,x26,4 + +800026ec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + xperm8 x14, x10, x9 # perform operation +800026ec: 28954733 xperm8 x14,x10,x9 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f0: 0009a383 lw x7,0(x19) +800026f4: 00e38863 beq x7,x14,80002704 +800026f8: 6210246f jal x8,80005518 +800026fc: 800026ec .word 0x800026ec +80002700: 8000ce91 .word 0x8000ce91 +80002704: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xfffffffe +80002708: 000d2683 lw x13,0(x26) +8000270c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xffffffff +80002710: 000d2503 lw x10,0(x26) +80002714: 004d0d13 addi x26,x26,4 + +80002718 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xperm8 x5, x13, x10 # perform operation +80002718: 28a6c2b3 xperm8 x5,x13,x10 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +8000271c: 0009a383 lw x7,0(x19) +80002720: 00538863 beq x7,x5,80002730 +80002724: 5f50246f jal x8,80005518 +80002728: 80002718 .word 0x80002718 +8000272c: 8000cef2 .word 0x8000cef2 +80002730: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xfffffffe +80002734: 000d2303 lw x6,0(x26) +80002738: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xfffffffe +8000273c: 000d2103 lw x2,0(x26) +80002740: 004d0d13 addi x26,x26,4 + +80002744 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xperm8 x5, x6, x2 # perform operation +80002744: 282342b3 xperm8 x5,x6,x2 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002748: 0009a383 lw x7,0(x19) +8000274c: 00538863 beq x7,x5,8000275c +80002750: 5c90246f jal x8,80005518 +80002754: 80002744 .word 0x80002744 +80002758: 8000cf53 .word 0x8000cf53 +8000275c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xfffffffe +80002760: 000d2e83 lw x29,0(x26) +80002764: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x5bbc8872 +80002768: 000d2103 lw x2,0(x26) +8000276c: 004d0d13 addi x26,x26,4 + +80002770 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + xperm8 x30, x29, x2 # perform operation +80002770: 282ecf33 xperm8 x30,x29,x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002774: 0009a383 lw x7,0(x19) +80002778: 01e38863 beq x7,x30,80002788 +8000277c: 59d0246f jal x8,80005518 +80002780: 80002770 .word 0x80002770 +80002784: 8000cfb4 .word 0x8000cfb4 +80002788: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xfffffffe +8000278c: 000d2603 lw x12,0(x26) +80002790: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xaaaaaaaa +80002794: 000d2703 lw x14,0(x26) +80002798: 004d0d13 addi x26,x26,4 + +8000279c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + xperm8 x17, x12, x14 # perform operation +8000279c: 28e648b3 xperm8 x17,x12,x14 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a0: 0009a383 lw x7,0(x19) +800027a4: 01138863 beq x7,x17,800027b4 +800027a8: 5710246f jal x8,80005518 +800027ac: 8000279c .word 0x8000279c +800027b0: 8000d015 .word 0x8000d015 +800027b4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0xfffffffe +800027b8: 000d2d83 lw x27,0(x26) +800027bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x55555555 +800027c0: 000d2e83 lw x29,0(x26) +800027c4: 004d0d13 addi x26,x26,4 + +800027c8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + xperm8 x12, x27, x29 # perform operation +800027c8: 29ddc633 xperm8 x12,x27,x29 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027cc: 0009a383 lw x7,0(x19) +800027d0: 00c38863 beq x7,x12,800027e0 +800027d4: 5450246f jal x8,80005518 +800027d8: 800027c8 .word 0x800027c8 +800027dc: 8000d076 .word 0x8000d076 +800027e0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x5bbc8872 +800027e4: 000d2683 lw x13,0(x26) +800027e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x00000000 +800027ec: 000d2f03 lw x30,0(x26) +800027f0: 004d0d13 addi x26,x26,4 + +800027f4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + xperm8 x31, x13, x30 # perform operation +800027f4: 29e6cfb3 xperm8 x31,x13,x30 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f8: 0009a383 lw x7,0(x19) +800027fc: 01f38863 beq x7,x31,8000280c +80002800: 5190246f jal x8,80005518 +80002804: 800027f4 .word 0x800027f4 +80002808: 8000d0d7 .word 0x8000d0d7 +8000280c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x5bbc8872 +80002810: 000d2c83 lw x25,0(x26) +80002814: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000001 +80002818: 000d2a83 lw x21,0(x26) +8000281c: 004d0d13 addi x26,x26,4 + +80002820 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + xperm8 x11, x25, x21 # perform operation +80002820: 295cc5b3 xperm8 x11,x25,x21 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002824: 0009a383 lw x7,0(x19) +80002828: 00b38863 beq x7,x11,80002838 +8000282c: 4ed0246f jal x8,80005518 +80002830: 80002820 .word 0x80002820 +80002834: 8000d131 .word 0x8000d131 +80002838: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x5bbc8872 +8000283c: 000d2b83 lw x23,0(x26) +80002840: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000002 +80002844: 000d2a83 lw x21,0(x26) +80002848: 004d0d13 addi x26,x26,4 + +8000284c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + xperm8 x30, x23, x21 # perform operation +8000284c: 295bcf33 xperm8 x30,x23,x21 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002850: 0009a383 lw x7,0(x19) +80002854: 01e38863 beq x7,x30,80002864 +80002858: 4c10246f jal x8,80005518 +8000285c: 8000284c .word 0x8000284c +80002860: 8000d18b .word 0x8000d18b +80002864: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x5bbc8872 +80002868: 000d2a83 lw x21,0(x26) +8000286c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x80000000 +80002870: 000d2303 lw x6,0(x26) +80002874: 004d0d13 addi x26,x26,4 + +80002878 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + xperm8 x3, x21, x6 # perform operation +80002878: 286ac1b3 xperm8 x3,x21,x6 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000287c: 0009a383 lw x7,0(x19) +80002880: 00338863 beq x7,x3,80002890 +80002884: 4950246f jal x8,80005518 +80002888: 80002878 .word 0x80002878 +8000288c: 8000d1e5 .word 0x8000d1e5 +80002890: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x5bbc8872 +80002894: 000d2903 lw x18,0(x26) +80002898: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x80000001 +8000289c: 000d2703 lw x14,0(x26) +800028a0: 004d0d13 addi x26,x26,4 + +800028a4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + xperm8 x12, x18, x14 # perform operation +800028a4: 28e94633 xperm8 x12,x18,x14 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a8: 0009a383 lw x7,0(x19) +800028ac: 00c38863 beq x7,x12,800028bc +800028b0: 4690246f jal x8,80005518 +800028b4: 800028a4 .word 0x800028a4 +800028b8: 8000d246 .word 0x8000d246 +800028bc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x5bbc8872 +800028c0: 000d2c83 lw x25,0(x26) +800028c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x7fffffff +800028c8: 000d2203 lw x4,0(x26) +800028cc: 004d0d13 addi x26,x26,4 + +800028d0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + xperm8 x5, x25, x4 # perform operation +800028d0: 284cc2b3 xperm8 x5,x25,x4 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028d4: 0009a383 lw x7,0(x19) +800028d8: 00538863 beq x7,x5,800028e8 +800028dc: 43d0246f jal x8,80005518 +800028e0: 800028d0 .word 0x800028d0 +800028e4: 8000d2a7 .word 0x8000d2a7 +800028e8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x5bbc8872 +800028ec: 000d2b83 lw x23,0(x26) +800028f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x7ffffffe +800028f4: 000d2883 lw x17,0(x26) +800028f8: 004d0d13 addi x26,x26,4 + +800028fc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + xperm8 x4, x23, x17 # perform operation +800028fc: 291bc233 xperm8 x4,x23,x17 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002900: 0009a383 lw x7,0(x19) +80002904: 00438863 beq x7,x4,80002914 +80002908: 4110246f jal x8,80005518 +8000290c: 800028fc .word 0x800028fc +80002910: 8000d308 .word 0x8000d308 +80002914: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x5bbc8872 +80002918: 000d2083 lw x1,0(x26) +8000291c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xffffffff +80002920: 000d2d83 lw x27,0(x26) +80002924: 004d0d13 addi x26,x26,4 + +80002928 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + xperm8 x31, x1, x27 # perform operation +80002928: 29b0cfb3 xperm8 x31,x1,x27 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000292c: 0009a383 lw x7,0(x19) +80002930: 01f38863 beq x7,x31,80002940 +80002934: 3e50246f jal x8,80005518 +80002938: 80002928 .word 0x80002928 +8000293c: 8000d369 .word 0x8000d369 +80002940: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x5bbc8872 +80002944: 000d2a03 lw x20,0(x26) +80002948: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xfffffffe +8000294c: 000d2303 lw x6,0(x26) +80002950: 004d0d13 addi x26,x26,4 + +80002954 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + xperm8 x4, x20, x6 # perform operation +80002954: 286a4233 xperm8 x4,x20,x6 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002958: 0009a383 lw x7,0(x19) +8000295c: 00438863 beq x7,x4,8000296c +80002960: 3b90246f jal x8,80005518 +80002964: 80002954 .word 0x80002954 +80002968: 8000d3ca .word 0x8000d3ca +8000296c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x5bbc8872 +80002970: 000d2b83 lw x23,0(x26) +80002974: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x5bbc8872 +80002978: 000d2a03 lw x20,0(x26) +8000297c: 004d0d13 addi x26,x26,4 + +80002980 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + xperm8 x31, x23, x20 # perform operation +80002980: 294bcfb3 xperm8 x31,x23,x20 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002984: 0009a383 lw x7,0(x19) +80002988: 01f38863 beq x7,x31,80002998 +8000298c: 38d0246f jal x8,80005518 +80002990: 80002980 .word 0x80002980 +80002994: 8000d42b .word 0x8000d42b +80002998: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x5bbc8872 +8000299c: 000d2603 lw x12,0(x26) +800029a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xaaaaaaaa +800029a4: 000d2583 lw x11,0(x26) +800029a8: 004d0d13 addi x26,x26,4 + +800029ac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + xperm8 x3, x12, x11 # perform operation +800029ac: 28b641b3 xperm8 x3,x12,x11 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b0: 0009a383 lw x7,0(x19) +800029b4: 00338863 beq x7,x3,800029c4 +800029b8: 3610246f jal x8,80005518 +800029bc: 800029ac .word 0x800029ac +800029c0: 8000d48c .word 0x8000d48c +800029c4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x5bbc8872 +800029c8: 000d2f03 lw x30,0(x26) +800029cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x55555555 +800029d0: 000d2803 lw x16,0(x26) +800029d4: 004d0d13 addi x26,x26,4 + +800029d8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + xperm8 x24, x30, x16 # perform operation +800029d8: 290f4c33 xperm8 x24,x30,x16 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029dc: 0009a383 lw x7,0(x19) +800029e0: 01838863 beq x7,x24,800029f0 +800029e4: 3350246f jal x8,80005518 +800029e8: 800029d8 .word 0x800029d8 +800029ec: 8000d4ed .word 0x8000d4ed +800029f0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xaaaaaaaa +800029f4: 000d2f03 lw x30,0(x26) +800029f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x00000000 +800029fc: 000d2703 lw x14,0(x26) +80002a00: 004d0d13 addi x26,x26,4 + +80002a04 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + xperm8 x18, x30, x14 # perform operation +80002a04: 28ef4933 xperm8 x18,x30,x14 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a08: 0009a383 lw x7,0(x19) +80002a0c: 01238863 beq x7,x18,80002a1c +80002a10: 3090246f jal x8,80005518 +80002a14: 80002a04 .word 0x80002a04 +80002a18: 8000d54e .word 0x8000d54e +80002a1c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xaaaaaaaa +80002a20: 000d2683 lw x13,0(x26) +80002a24: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x00000001 +80002a28: 000d2883 lw x17,0(x26) +80002a2c: 004d0d13 addi x26,x26,4 + +80002a30 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + xperm8 x12, x13, x17 # perform operation +80002a30: 2916c633 xperm8 x12,x13,x17 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a34: 0009a383 lw x7,0(x19) +80002a38: 00c38863 beq x7,x12,80002a48 +80002a3c: 2dd0246f jal x8,80005518 +80002a40: 80002a30 .word 0x80002a30 +80002a44: 8000d5a8 .word 0x8000d5a8 +80002a48: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xaaaaaaaa +80002a4c: 000d2583 lw x11,0(x26) +80002a50: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000002 +80002a54: 000d2a83 lw x21,0(x26) +80002a58: 004d0d13 addi x26,x26,4 + +80002a5c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + xperm8 x20, x11, x21 # perform operation +80002a5c: 2955ca33 xperm8 x20,x11,x21 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a60: 0009a383 lw x7,0(x19) +80002a64: 01438863 beq x7,x20,80002a74 +80002a68: 2b10246f jal x8,80005518 +80002a6c: 80002a5c .word 0x80002a5c +80002a70: 8000d602 .word 0x8000d602 +80002a74: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xaaaaaaaa +80002a78: 000d2283 lw x5,0(x26) +80002a7c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x80000000 +80002a80: 000d2683 lw x13,0(x26) +80002a84: 004d0d13 addi x26,x26,4 + +80002a88 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + xperm8 x6, x5, x13 # perform operation +80002a88: 28d2c333 xperm8 x6,x5,x13 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a8c: 0009a383 lw x7,0(x19) +80002a90: 00638863 beq x7,x6,80002aa0 +80002a94: 2850246f jal x8,80005518 +80002a98: 80002a88 .word 0x80002a88 +80002a9c: 8000d65c .word 0x8000d65c +80002aa0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xaaaaaaaa +80002aa4: 000d2183 lw x3,0(x26) +80002aa8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x80000001 +80002aac: 000d2483 lw x9,0(x26) +80002ab0: 004d0d13 addi x26,x26,4 + +80002ab4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + xperm8 x17, x3, x9 # perform operation +80002ab4: 2891c8b3 xperm8 x17,x3,x9 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab8: 0009a383 lw x7,0(x19) +80002abc: 01138863 beq x7,x17,80002acc +80002ac0: 2590246f jal x8,80005518 +80002ac4: 80002ab4 .word 0x80002ab4 +80002ac8: 8000d6bd .word 0x8000d6bd +80002acc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xaaaaaaaa +80002ad0: 000d2683 lw x13,0(x26) +80002ad4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x7fffffff +80002ad8: 000d2a83 lw x21,0(x26) +80002adc: 004d0d13 addi x26,x26,4 + +80002ae0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + xperm8 x9, x13, x21 # perform operation +80002ae0: 2956c4b3 xperm8 x9,x13,x21 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ae4: 0009a383 lw x7,0(x19) +80002ae8: 00938863 beq x7,x9,80002af8 +80002aec: 22d0246f jal x8,80005518 +80002af0: 80002ae0 .word 0x80002ae0 +80002af4: 8000d71e .word 0x8000d71e +80002af8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xaaaaaaaa +80002afc: 000d2803 lw x16,0(x26) +80002b00: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x7ffffffe +80002b04: 000d2703 lw x14,0(x26) +80002b08: 004d0d13 addi x26,x26,4 + +80002b0c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + xperm8 x25, x16, x14 # perform operation +80002b0c: 28e84cb3 xperm8 x25,x16,x14 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b10: 0009a383 lw x7,0(x19) +80002b14: 01938863 beq x7,x25,80002b24 +80002b18: 2010246f jal x8,80005518 +80002b1c: 80002b0c .word 0x80002b0c +80002b20: 8000d77f .word 0x8000d77f +80002b24: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xaaaaaaaa +80002b28: 000d2683 lw x13,0(x26) +80002b2c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xffffffff +80002b30: 000d2c83 lw x25,0(x26) +80002b34: 004d0d13 addi x26,x26,4 + +80002b38 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + xperm8 x10, x13, x25 # perform operation +80002b38: 2996c533 xperm8 x10,x13,x25 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b3c: 0009a383 lw x7,0(x19) +80002b40: 00a38863 beq x7,x10,80002b50 +80002b44: 1d50246f jal x8,80005518 +80002b48: 80002b38 .word 0x80002b38 +80002b4c: 8000d7e0 .word 0x8000d7e0 +80002b50: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xaaaaaaaa +80002b54: 000d2803 lw x16,0(x26) +80002b58: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0xfffffffe +80002b5c: 000d2183 lw x3,0(x26) +80002b60: 004d0d13 addi x26,x26,4 + +80002b64 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + xperm8 x13, x16, x3 # perform operation +80002b64: 283846b3 xperm8 x13,x16,x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b68: 0009a383 lw x7,0(x19) +80002b6c: 00d38863 beq x7,x13,80002b7c +80002b70: 1a90246f jal x8,80005518 +80002b74: 80002b64 .word 0x80002b64 +80002b78: 8000d841 .word 0x8000d841 +80002b7c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xaaaaaaaa +80002b80: 000d2c03 lw x24,0(x26) +80002b84: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x5bbc8872 +80002b88: 000d2c83 lw x25,0(x26) +80002b8c: 004d0d13 addi x26,x26,4 + +80002b90 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + xperm8 x13, x24, x25 # perform operation +80002b90: 299c46b3 xperm8 x13,x24,x25 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b94: 0009a383 lw x7,0(x19) +80002b98: 00d38863 beq x7,x13,80002ba8 +80002b9c: 17d0246f jal x8,80005518 +80002ba0: 80002b90 .word 0x80002b90 +80002ba4: 8000d8a2 .word 0x8000d8a2 +80002ba8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xaaaaaaaa +80002bac: 000d2783 lw x15,0(x26) +80002bb0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xaaaaaaaa +80002bb4: 000d2303 lw x6,0(x26) +80002bb8: 004d0d13 addi x26,x26,4 + +80002bbc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + xperm8 x23, x15, x6 # perform operation +80002bbc: 2867cbb3 xperm8 x23,x15,x6 + # Check if x23 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc0: 0009a383 lw x7,0(x19) +80002bc4: 01738863 beq x7,x23,80002bd4 +80002bc8: 1510246f jal x8,80005518 +80002bcc: 80002bbc .word 0x80002bbc +80002bd0: 8000d903 .word 0x8000d903 +80002bd4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xaaaaaaaa +80002bd8: 000d2283 lw x5,0(x26) +80002bdc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x55555555 +80002be0: 000d2b03 lw x22,0(x26) +80002be4: 004d0d13 addi x26,x26,4 + +80002be8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + xperm8 x25, x5, x22 # perform operation +80002be8: 2962ccb3 xperm8 x25,x5,x22 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bec: 0009a383 lw x7,0(x19) +80002bf0: 01938863 beq x7,x25,80002c00 +80002bf4: 1250246f jal x8,80005518 +80002bf8: 80002be8 .word 0x80002be8 +80002bfc: 8000d964 .word 0x8000d964 +80002c00: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x55555555 +80002c04: 000d2783 lw x15,0(x26) +80002c08: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x00000000 +80002c0c: 000d2d83 lw x27,0(x26) +80002c10: 004d0d13 addi x26,x26,4 + +80002c14 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + xperm8 x23, x15, x27 # perform operation +80002c14: 29b7cbb3 xperm8 x23,x15,x27 + # Check if x23 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c18: 0009a383 lw x7,0(x19) +80002c1c: 01738863 beq x7,x23,80002c2c +80002c20: 0f90246f jal x8,80005518 +80002c24: 80002c14 .word 0x80002c14 +80002c28: 8000d9c5 .word 0x8000d9c5 +80002c2c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x55555555 +80002c30: 000d2a03 lw x20,0(x26) +80002c34: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x00000001 +80002c38: 000d2583 lw x11,0(x26) +80002c3c: 004d0d13 addi x26,x26,4 + +80002c40 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + xperm8 x9, x20, x11 # perform operation +80002c40: 28ba44b3 xperm8 x9,x20,x11 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c44: 0009a383 lw x7,0(x19) +80002c48: 00938863 beq x7,x9,80002c58 +80002c4c: 0cd0246f jal x8,80005518 +80002c50: 80002c40 .word 0x80002c40 +80002c54: 8000da1f .word 0x8000da1f +80002c58: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x55555555 +80002c5c: 000d2e03 lw x28,0(x26) +80002c60: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x00000002 +80002c64: 000d2503 lw x10,0(x26) +80002c68: 004d0d13 addi x26,x26,4 + +80002c6c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + xperm8 x18, x28, x10 # perform operation +80002c6c: 28ae4933 xperm8 x18,x28,x10 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c70: 0009a383 lw x7,0(x19) +80002c74: 01238863 beq x7,x18,80002c84 +80002c78: 0a10246f jal x8,80005518 +80002c7c: 80002c6c .word 0x80002c6c +80002c80: 8000da79 .word 0x8000da79 +80002c84: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x55555555 +80002c88: 000d2183 lw x3,0(x26) +80002c8c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x80000000 +80002c90: 000d2c83 lw x25,0(x26) +80002c94: 004d0d13 addi x26,x26,4 + +80002c98 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + xperm8 x4, x3, x25 # perform operation +80002c98: 2991c233 xperm8 x4,x3,x25 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c9c: 0009a383 lw x7,0(x19) +80002ca0: 00438863 beq x7,x4,80002cb0 +80002ca4: 0750246f jal x8,80005518 +80002ca8: 80002c98 .word 0x80002c98 +80002cac: 8000dad3 .word 0x8000dad3 +80002cb0: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x55555555 +80002cb4: 000d2f83 lw x31,0(x26) +80002cb8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x80000001 +80002cbc: 000d2103 lw x2,0(x26) +80002cc0: 004d0d13 addi x26,x26,4 + +80002cc4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + xperm8 x4, x31, x2 # perform operation +80002cc4: 282fc233 xperm8 x4,x31,x2 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc8: 0009a383 lw x7,0(x19) +80002ccc: 00438863 beq x7,x4,80002cdc +80002cd0: 0490246f jal x8,80005518 +80002cd4: 80002cc4 .word 0x80002cc4 +80002cd8: 8000db34 .word 0x8000db34 +80002cdc: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x55555555 +80002ce0: 000d2803 lw x16,0(x26) +80002ce4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x7fffffff +80002ce8: 000d2c03 lw x24,0(x26) +80002cec: 004d0d13 addi x26,x26,4 + +80002cf0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + xperm8 x18, x16, x24 # perform operation +80002cf0: 29884933 xperm8 x18,x16,x24 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cf4: 0009a383 lw x7,0(x19) +80002cf8: 01238863 beq x7,x18,80002d08 +80002cfc: 01d0246f jal x8,80005518 +80002d00: 80002cf0 .word 0x80002cf0 +80002d04: 8000db95 .word 0x8000db95 +80002d08: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x55555555 +80002d0c: 000d2a83 lw x21,0(x26) +80002d10: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x7ffffffe +80002d14: 000d2303 lw x6,0(x26) +80002d18: 004d0d13 addi x26,x26,4 + +80002d1c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + xperm8 x14, x21, x6 # perform operation +80002d1c: 286ac733 xperm8 x14,x21,x6 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d20: 0009a383 lw x7,0(x19) +80002d24: 00e38863 beq x7,x14,80002d34 +80002d28: 7f00246f jal x8,80005518 +80002d2c: 80002d1c .word 0x80002d1c +80002d30: 8000dbf6 .word 0x8000dbf6 +80002d34: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x55555555 +80002d38: 000d2f83 lw x31,0(x26) +80002d3c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0xffffffff +80002d40: 000d2203 lw x4,0(x26) +80002d44: 004d0d13 addi x26,x26,4 + +80002d48 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + xperm8 x10, x31, x4 # perform operation +80002d48: 284fc533 xperm8 x10,x31,x4 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d4c: 0009a383 lw x7,0(x19) +80002d50: 00a38863 beq x7,x10,80002d60 +80002d54: 7c40246f jal x8,80005518 +80002d58: 80002d48 .word 0x80002d48 +80002d5c: 8000dc57 .word 0x8000dc57 +80002d60: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x55555555 +80002d64: 000d2183 lw x3,0(x26) +80002d68: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xfffffffe +80002d6c: 000d2583 lw x11,0(x26) +80002d70: 004d0d13 addi x26,x26,4 + +80002d74 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + xperm8 x22, x3, x11 # perform operation +80002d74: 28b1cb33 xperm8 x22,x3,x11 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d78: 0009a383 lw x7,0(x19) +80002d7c: 01638863 beq x7,x22,80002d8c +80002d80: 7980246f jal x8,80005518 +80002d84: 80002d74 .word 0x80002d74 +80002d88: 8000dcb8 .word 0x8000dcb8 +80002d8c: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x55555555 +80002d90: 000d2e83 lw x29,0(x26) +80002d94: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x5bbc8872 +80002d98: 000d2c83 lw x25,0(x26) +80002d9c: 004d0d13 addi x26,x26,4 + +80002da0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + xperm8 x3, x29, x25 # perform operation +80002da0: 299ec1b3 xperm8 x3,x29,x25 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002da4: 0009a383 lw x7,0(x19) +80002da8: 00338863 beq x7,x3,80002db8 +80002dac: 76c0246f jal x8,80005518 +80002db0: 80002da0 .word 0x80002da0 +80002db4: 8000dd19 .word 0x8000dd19 +80002db8: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x55555555 +80002dbc: 000d2583 lw x11,0(x26) +80002dc0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xaaaaaaaa +80002dc4: 000d2b03 lw x22,0(x26) +80002dc8: 004d0d13 addi x26,x26,4 + +80002dcc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + xperm8 x15, x11, x22 # perform operation +80002dcc: 2965c7b3 xperm8 x15,x11,x22 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd0: 0009a383 lw x7,0(x19) +80002dd4: 00f38863 beq x7,x15,80002de4 +80002dd8: 7400246f jal x8,80005518 +80002ddc: 80002dcc .word 0x80002dcc +80002de0: 8000dd7a .word 0x8000dd7a +80002de4: 00498993 addi x19,x19,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x55555555 +80002de8: 000d2803 lw x16,0(x26) +80002dec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x55555555 +80002df0: 000d2f83 lw x31,0(x26) +80002df4: 004d0d13 addi x26,x26,4 + +80002df8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + xperm8 x21, x16, x31 # perform operation +80002df8: 29f84ab3 xperm8 x21,x16,x31 + # Check if x21 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002dfc: 0009a383 lw x7,0(x19) +80002e00: 01538863 beq x7,x21,80002e10 +80002e04: 7140246f jal x8,80005518 +80002e08: 80002df8 .word 0x80002df8 +80002e0c: 8000dddb .word 0x8000dddb +80002e10: 00498993 addi x19,x19,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x03daf434 +80002e14: 000d2003 lw x0,0(x26) +80002e18: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0xa65bee2d +80002e1c: 000d2003 lw x0,0(x26) +80002e20: 004d0d13 addi x26,x26,4 + +80002e24 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b0: + xperm8 x28, x0, x0 # perform operation +80002e24: 28004e33 xperm8 x28,x0,x0 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkx_xperm8_cg_cmp_rs1_rs2_b0, Zbkx_xperm8_cg_cmp_rs1_rs2_b0_str) +80002e28: 0009a383 lw x7,0(x19) +80002e2c: 01c38863 beq x7,x28,80002e3c +80002e30: 6e80246f jal x8,80005518 +80002e34: 80002e24 .word 0x80002e24 +80002e38: 8000de3c .word 0x8000de3c +80002e3c: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x4f473d04 +80002e40: 000d2083 lw x1,0(x26) +80002e44: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xed4ac6b9 +80002e48: 000d2083 lw x1,0(x26) +80002e4c: 004d0d13 addi x26,x26,4 + +80002e50 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b1: + xperm8 x3, x1, x1 # perform operation +80002e50: 2810c1b3 xperm8 x3,x1,x1 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b1, Zbkx_xperm8_cg_cmp_rs1_rs2_b1_str) +80002e54: 0009a383 lw x7,0(x19) +80002e58: 00338863 beq x7,x3,80002e68 +80002e5c: 6bc0246f jal x8,80005518 +80002e60: 80002e50 .word 0x80002e50 +80002e64: 8000de76 .word 0x8000de76 +80002e68: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xc716e732 +80002e6c: 000d2103 lw x2,0(x26) +80002e70: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x23b1b232 +80002e74: 000d2103 lw x2,0(x26) +80002e78: 004d0d13 addi x26,x26,4 + +80002e7c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b2: + xperm8 x30, x2, x2 # perform operation +80002e7c: 28214f33 xperm8 x30,x2,x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkx_xperm8_cg_cmp_rs1_rs2_b2, Zbkx_xperm8_cg_cmp_rs1_rs2_b2_str) +80002e80: 0009a383 lw x7,0(x19) +80002e84: 01e38863 beq x7,x30,80002e94 +80002e88: 6900246f jal x8,80005518 +80002e8c: 80002e7c .word 0x80002e7c +80002e90: 8000deb0 .word 0x8000deb0 +80002e94: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xe03e9478 +80002e98: 000d2183 lw x3,0(x26) +80002e9c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x51262d7d +80002ea0: 000d2183 lw x3,0(x26) +80002ea4: 004d0d13 addi x26,x26,4 + +80002ea8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b3: + xperm8 x27, x3, x3 # perform operation +80002ea8: 2831cdb3 xperm8 x27,x3,x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkx_xperm8_cg_cmp_rs1_rs2_b3, Zbkx_xperm8_cg_cmp_rs1_rs2_b3_str) +80002eac: 0009a383 lw x7,0(x19) +80002eb0: 01b38863 beq x7,x27,80002ec0 +80002eb4: 6640246f jal x8,80005518 +80002eb8: 80002ea8 .word 0x80002ea8 +80002ebc: 8000deea .word 0x8000deea +80002ec0: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x5d42b9b0 +80002ec4: 000d2203 lw x4,0(x26) +80002ec8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0xd3ece73e +80002ecc: 000d2203 lw x4,0(x26) +80002ed0: 004d0d13 addi x26,x26,4 + +80002ed4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b4: + xperm8 x2, x4, x4 # perform operation +80002ed4: 28424133 xperm8 x2,x4,x4 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkx_xperm8_cg_cmp_rs1_rs2_b4, Zbkx_xperm8_cg_cmp_rs1_rs2_b4_str) +80002ed8: 0009a383 lw x7,0(x19) +80002edc: 00238863 beq x7,x2,80002eec +80002ee0: 6380246f jal x8,80005518 +80002ee4: 80002ed4 .word 0x80002ed4 +80002ee8: 8000df24 .word 0x8000df24 +80002eec: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x29a07e9d +80002ef0: 000d2283 lw x5,0(x26) +80002ef4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0xf3917b9e +80002ef8: 000d2283 lw x5,0(x26) +80002efc: 004d0d13 addi x26,x26,4 + +80002f00 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b5: + xperm8 x6, x5, x5 # perform operation +80002f00: 2852c333 xperm8 x6,x5,x5 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkx_xperm8_cg_cmp_rs1_rs2_b5, Zbkx_xperm8_cg_cmp_rs1_rs2_b5_str) +80002f04: 0009a383 lw x7,0(x19) +80002f08: 00638863 beq x7,x6,80002f18 +80002f0c: 60c0246f jal x8,80005518 +80002f10: 80002f00 .word 0x80002f00 +80002f14: 8000df5e .word 0x8000df5e +80002f18: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x70d9bd13 +80002f1c: 000d2303 lw x6,0(x26) +80002f20: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x4c02b1e9 +80002f24: 000d2303 lw x6,0(x26) +80002f28: 004d0d13 addi x26,x26,4 + +80002f2c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b6: + xperm8 x20, x6, x6 # perform operation +80002f2c: 28634a33 xperm8 x20,x6,x6 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b6, Zbkx_xperm8_cg_cmp_rs1_rs2_b6_str) +80002f30: 0009a383 lw x7,0(x19) +80002f34: 01438863 beq x7,x20,80002f44 +80002f38: 5e00246f jal x8,80005518 +80002f3c: 80002f2c .word 0x80002f2c +80002f40: 8000df98 .word 0x8000df98 +80002f44: 00498993 addi x19,x19,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f48: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f4c: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x6f4d1f2e +80002f50: 000d2383 lw x7,0(x26) +80002f54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x720306c5 +80002f58: 000d2383 lw x7,0(x26) +80002f5c: 004d0d13 addi x26,x26,4 + +80002f60 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b7: + xperm8 x6, x7, x7 # perform operation +80002f60: 2873c333 xperm8 x6,x7,x7 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkx_xperm8_cg_cmp_rs1_rs2_b7, Zbkx_xperm8_cg_cmp_rs1_rs2_b7_str) +80002f64: 0009a203 lw x4,0(x19) +80002f68: 00620863 beq x4,x6,80002f78 +80002f6c: 594022ef jal x5,80005500 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 8000dfd2 .word 0x8000dfd2 +80002f78: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xa62a06f6 +80002f7c: 000d2403 lw x8,0(x26) +80002f80: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x2ae932a9 +80002f84: 000d2403 lw x8,0(x26) +80002f88: 004d0d13 addi x26,x26,4 + +80002f8c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b8: + xperm8 x13, x8, x8 # perform operation +80002f8c: 288446b3 xperm8 x13,x8,x8 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkx_xperm8_cg_cmp_rs1_rs2_b8, Zbkx_xperm8_cg_cmp_rs1_rs2_b8_str) +80002f90: 0009a203 lw x4,0(x19) +80002f94: 00d20863 beq x4,x13,80002fa4 +80002f98: 568022ef jal x5,80005500 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 8000e00c .word 0x8000e00c +80002fa4: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xf691e2f6 +80002fa8: 000d2483 lw x9,0(x26) +80002fac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xe3ed6f41 +80002fb0: 000d2483 lw x9,0(x26) +80002fb4: 004d0d13 addi x26,x26,4 + +80002fb8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b9: + xperm8 x30, x9, x9 # perform operation +80002fb8: 2894cf33 xperm8 x30,x9,x9 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkx_xperm8_cg_cmp_rs1_rs2_b9, Zbkx_xperm8_cg_cmp_rs1_rs2_b9_str) +80002fbc: 0009a203 lw x4,0(x19) +80002fc0: 01e20863 beq x4,x30,80002fd0 +80002fc4: 53c022ef jal x5,80005500 +80002fc8: 80002fb8 .word 0x80002fb8 +80002fcc: 8000e046 .word 0x8000e046 +80002fd0: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xaa300f43 +80002fd4: 000d2503 lw x10,0(x26) +80002fd8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x6f9d4a7b +80002fdc: 000d2503 lw x10,0(x26) +80002fe0: 004d0d13 addi x26,x26,4 + +80002fe4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b10: + xperm8 x29, x10, x10 # perform operation +80002fe4: 28a54eb3 xperm8 x29,x10,x10 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkx_xperm8_cg_cmp_rs1_rs2_b10, Zbkx_xperm8_cg_cmp_rs1_rs2_b10_str) +80002fe8: 0009a203 lw x4,0(x19) +80002fec: 01d20863 beq x4,x29,80002ffc +80002ff0: 510022ef jal x5,80005500 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 8000e080 .word 0x8000e080 +80002ffc: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xd359706e +80003000: 000d2583 lw x11,0(x26) +80003004: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xe18f1083 +80003008: 000d2583 lw x11,0(x26) +8000300c: 004d0d13 addi x26,x26,4 + +80003010 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b11: + xperm8 x14, x11, x11 # perform operation +80003010: 28b5c733 xperm8 x14,x11,x11 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkx_xperm8_cg_cmp_rs1_rs2_b11, Zbkx_xperm8_cg_cmp_rs1_rs2_b11_str) +80003014: 0009a203 lw x4,0(x19) +80003018: 00e20863 beq x4,x14,80003028 +8000301c: 4e4022ef jal x5,80005500 +80003020: 80003010 .word 0x80003010 +80003024: 8000e0bb .word 0x8000e0bb +80003028: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x05909bcf +8000302c: 000d2603 lw x12,0(x26) +80003030: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x6ce53a19 +80003034: 000d2603 lw x12,0(x26) +80003038: 004d0d13 addi x26,x26,4 + +8000303c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b12: + xperm8 x3, x12, x12 # perform operation +8000303c: 28c641b3 xperm8 x3,x12,x12 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b12, Zbkx_xperm8_cg_cmp_rs1_rs2_b12_str) +80003040: 0009a203 lw x4,0(x19) +80003044: 00320863 beq x4,x3,80003054 +80003048: 4b8022ef jal x5,80005500 +8000304c: 8000303c .word 0x8000303c +80003050: 8000e0f6 .word 0x8000e0f6 +80003054: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xf0b1dbdd +80003058: 000d2683 lw x13,0(x26) +8000305c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x3806f0eb +80003060: 000d2683 lw x13,0(x26) +80003064: 004d0d13 addi x26,x26,4 + +80003068 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b13: + xperm8 x30, x13, x13 # perform operation +80003068: 28d6cf33 xperm8 x30,x13,x13 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkx_xperm8_cg_cmp_rs1_rs2_b13, Zbkx_xperm8_cg_cmp_rs1_rs2_b13_str) +8000306c: 0009a203 lw x4,0(x19) +80003070: 01e20863 beq x4,x30,80003080 +80003074: 48c022ef jal x5,80005500 +80003078: 80003068 .word 0x80003068 +8000307c: 8000e131 .word 0x8000e131 +80003080: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x053bc0f4 +80003084: 000d2703 lw x14,0(x26) +80003088: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xecf01001 +8000308c: 000d2703 lw x14,0(x26) +80003090: 004d0d13 addi x26,x26,4 + +80003094 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b14: + xperm8 x15, x14, x14 # perform operation +80003094: 28e747b3 xperm8 x15,x14,x14 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkx_xperm8_cg_cmp_rs1_rs2_b14, Zbkx_xperm8_cg_cmp_rs1_rs2_b14_str) +80003098: 0009a203 lw x4,0(x19) +8000309c: 00f20863 beq x4,x15,800030ac +800030a0: 460022ef jal x5,80005500 +800030a4: 80003094 .word 0x80003094 +800030a8: 8000e16c .word 0x8000e16c +800030ac: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x24bd0ed4 +800030b0: 000d2783 lw x15,0(x26) +800030b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x5b808b86 +800030b8: 000d2783 lw x15,0(x26) +800030bc: 004d0d13 addi x26,x26,4 + +800030c0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b15: + xperm8 x20, x15, x15 # perform operation +800030c0: 28f7ca33 xperm8 x20,x15,x15 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b15, Zbkx_xperm8_cg_cmp_rs1_rs2_b15_str) +800030c4: 0009a203 lw x4,0(x19) +800030c8: 01420863 beq x4,x20,800030d8 +800030cc: 434022ef jal x5,80005500 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 8000e1a7 .word 0x8000e1a7 +800030d8: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xc8da1863 +800030dc: 000d2803 lw x16,0(x26) +800030e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x3bbf70c9 +800030e4: 000d2803 lw x16,0(x26) +800030e8: 004d0d13 addi x26,x26,4 + +800030ec : +Zbkx_xperm8_cg_cmp_rs1_rs2_b16: + xperm8 x22, x16, x16 # perform operation +800030ec: 29084b33 xperm8 x22,x16,x16 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkx_xperm8_cg_cmp_rs1_rs2_b16, Zbkx_xperm8_cg_cmp_rs1_rs2_b16_str) +800030f0: 0009a203 lw x4,0(x19) +800030f4: 01620863 beq x4,x22,80003104 +800030f8: 408022ef jal x5,80005500 +800030fc: 800030ec .word 0x800030ec +80003100: 8000e1e2 .word 0x8000e1e2 +80003104: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x71b8ee9f +80003108: 000d2883 lw x17,0(x26) +8000310c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xa09f1480 +80003110: 000d2883 lw x17,0(x26) +80003114: 004d0d13 addi x26,x26,4 + +80003118 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b17: + xperm8 x27, x17, x17 # perform operation +80003118: 2918cdb3 xperm8 x27,x17,x17 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkx_xperm8_cg_cmp_rs1_rs2_b17, Zbkx_xperm8_cg_cmp_rs1_rs2_b17_str) +8000311c: 0009a203 lw x4,0(x19) +80003120: 01b20863 beq x4,x27,80003130 +80003124: 3dc022ef jal x5,80005500 +80003128: 80003118 .word 0x80003118 +8000312c: 8000e21d .word 0x8000e21d +80003130: 00498993 addi x19,x19,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xf09b7291 +80003134: 000d2903 lw x18,0(x26) +80003138: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x3aca4a4e +8000313c: 000d2903 lw x18,0(x26) +80003140: 004d0d13 addi x26,x26,4 + +80003144 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b18: + xperm8 x21, x18, x18 # perform operation +80003144: 29294ab3 xperm8 x21,x18,x18 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b18, Zbkx_xperm8_cg_cmp_rs1_rs2_b18_str) +80003148: 0009a203 lw x4,0(x19) +8000314c: 01520863 beq x4,x21,8000315c +80003150: 3b0022ef jal x5,80005500 +80003154: 80003144 .word 0x80003144 +80003158: 8000e258 .word 0x8000e258 +8000315c: 00498993 addi x19,x19,4 + + mv x30, x19 # switch signature pointer register to avoid conflict with test +80003160: 00098f13 addi x30,x19,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x9b585989 +80003164: 000d2983 lw x19,0(x26) +80003168: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x66deb709 +8000316c: 000d2983 lw x19,0(x26) +80003170: 004d0d13 addi x26,x26,4 + +80003174 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b19: + xperm8 x24, x19, x19 # perform operation +80003174: 2939cc33 xperm8 x24,x19,x19 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkx_xperm8_cg_cmp_rs1_rs2_b19, Zbkx_xperm8_cg_cmp_rs1_rs2_b19_str) +80003178: 000f2203 lw x4,0(x30) +8000317c: 01820863 beq x4,x24,8000318c +80003180: 380022ef jal x5,80005500 +80003184: 80003174 .word 0x80003174 +80003188: 8000e293 .word 0x8000e293 +8000318c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x54b82414 +80003190: 000d2a03 lw x20,0(x26) +80003194: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x615fe514 +80003198: 000d2a03 lw x20,0(x26) +8000319c: 004d0d13 addi x26,x26,4 + +800031a0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b20: + xperm8 x16, x20, x20 # perform operation +800031a0: 294a4833 xperm8 x16,x20,x20 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zbkx_xperm8_cg_cmp_rs1_rs2_b20, Zbkx_xperm8_cg_cmp_rs1_rs2_b20_str) +800031a4: 000f2203 lw x4,0(x30) +800031a8: 01020863 beq x4,x16,800031b8 +800031ac: 354022ef jal x5,80005500 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 8000e2ce .word 0x8000e2ce +800031b8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x462b4c83 +800031bc: 000d2a83 lw x21,0(x26) +800031c0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x59352c05 +800031c4: 000d2a83 lw x21,0(x26) +800031c8: 004d0d13 addi x26,x26,4 + +800031cc : +Zbkx_xperm8_cg_cmp_rs1_rs2_b21: + xperm8 x31, x21, x21 # perform operation +800031cc: 295acfb3 xperm8 x31,x21,x21 + # Check if x31 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x31, Zbkx_xperm8_cg_cmp_rs1_rs2_b21, Zbkx_xperm8_cg_cmp_rs1_rs2_b21_str) +800031d0: 000f2203 lw x4,0(x30) +800031d4: 01f20863 beq x4,x31,800031e4 +800031d8: 328022ef jal x5,80005500 +800031dc: 800031cc .word 0x800031cc +800031e0: 8000e309 .word 0x8000e309 +800031e4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x8f95757b +800031e8: 000d2b03 lw x22,0(x26) +800031ec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x084aae03 +800031f0: 000d2b03 lw x22,0(x26) +800031f4: 004d0d13 addi x26,x26,4 + +800031f8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b22: + xperm8 x21, x22, x22 # perform operation +800031f8: 296b4ab3 xperm8 x21,x22,x22 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b22, Zbkx_xperm8_cg_cmp_rs1_rs2_b22_str) +800031fc: 000f2203 lw x4,0(x30) +80003200: 01520863 beq x4,x21,80003210 +80003204: 2fc022ef jal x5,80005500 +80003208: 800031f8 .word 0x800031f8 +8000320c: 8000e344 .word 0x8000e344 +80003210: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xbbca7ef7 +80003214: 000d2b83 lw x23,0(x26) +80003218: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x21bd3a77 +8000321c: 000d2b83 lw x23,0(x26) +80003220: 004d0d13 addi x26,x26,4 + +80003224 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b23: + xperm8 x19, x23, x23 # perform operation +80003224: 297bc9b3 xperm8 x19,x23,x23 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkx_xperm8_cg_cmp_rs1_rs2_b23, Zbkx_xperm8_cg_cmp_rs1_rs2_b23_str) +80003228: 000f2203 lw x4,0(x30) +8000322c: 01320863 beq x4,x19,8000323c +80003230: 2d0022ef jal x5,80005500 +80003234: 80003224 .word 0x80003224 +80003238: 8000e37f .word 0x8000e37f +8000323c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x606516cd +80003240: 000d2c03 lw x24,0(x26) +80003244: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xc8acbc14 +80003248: 000d2c03 lw x24,0(x26) +8000324c: 004d0d13 addi x26,x26,4 + +80003250 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b24: + xperm8 x19, x24, x24 # perform operation +80003250: 298c49b3 xperm8 x19,x24,x24 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkx_xperm8_cg_cmp_rs1_rs2_b24, Zbkx_xperm8_cg_cmp_rs1_rs2_b24_str) +80003254: 000f2203 lw x4,0(x30) +80003258: 01320863 beq x4,x19,80003268 +8000325c: 2a4022ef jal x5,80005500 +80003260: 80003250 .word 0x80003250 +80003264: 8000e3ba .word 0x8000e3ba +80003268: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x074c9e4c +8000326c: 000d2c83 lw x25,0(x26) +80003270: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x34ef5cc9 +80003274: 000d2c83 lw x25,0(x26) +80003278: 004d0d13 addi x26,x26,4 + +8000327c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b25: + xperm8 x23, x25, x25 # perform operation +8000327c: 299ccbb3 xperm8 x23,x25,x25 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zbkx_xperm8_cg_cmp_rs1_rs2_b25, Zbkx_xperm8_cg_cmp_rs1_rs2_b25_str) +80003280: 000f2203 lw x4,0(x30) +80003284: 01720863 beq x4,x23,80003294 +80003288: 278022ef jal x5,80005500 +8000328c: 8000327c .word 0x8000327c +80003290: 8000e3f5 .word 0x8000e3f5 +80003294: 004f0f13 addi x30,x30,4 + + mv x18, x26 # switch data pointer register to avoid conflict with test +80003298: 000d0913 addi x18,x26,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x6253acd1 +8000329c: 00092d03 lw x26,0(x18) +800032a0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x3c7f5a03 +800032a4: 00092d03 lw x26,0(x18) +800032a8: 00490913 addi x18,x18,4 + +800032ac : +Zbkx_xperm8_cg_cmp_rs1_rs2_b26: + xperm8 x1, x26, x26 # perform operation +800032ac: 29ad40b3 xperm8 x1,x26,x26 + # Check if x1 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x1, Zbkx_xperm8_cg_cmp_rs1_rs2_b26, Zbkx_xperm8_cg_cmp_rs1_rs2_b26_str) +800032b0: 000f2203 lw x4,0(x30) +800032b4: 00120863 beq x4,x1,800032c4 +800032b8: 248022ef jal x5,80005500 +800032bc: 800032ac .word 0x800032ac +800032c0: 8000e430 .word 0x8000e430 +800032c4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x46258d5d +800032c8: 00092d83 lw x27,0(x18) +800032cc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x18d13b23 +800032d0: 00092d83 lw x27,0(x18) +800032d4: 00490913 addi x18,x18,4 + +800032d8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b27: + xperm8 x26, x27, x27 # perform operation +800032d8: 29bdcd33 xperm8 x26,x27,x27 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zbkx_xperm8_cg_cmp_rs1_rs2_b27, Zbkx_xperm8_cg_cmp_rs1_rs2_b27_str) +800032dc: 000f2203 lw x4,0(x30) +800032e0: 01a20863 beq x4,x26,800032f0 +800032e4: 21c022ef jal x5,80005500 +800032e8: 800032d8 .word 0x800032d8 +800032ec: 8000e46b .word 0x8000e46b +800032f0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xdb25be69 +800032f4: 00092e03 lw x28,0(x18) +800032f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x683cebb0 +800032fc: 00092e03 lw x28,0(x18) +80003300: 00490913 addi x18,x18,4 + +80003304 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b28: + xperm8 x21, x28, x28 # perform operation +80003304: 29ce4ab3 xperm8 x21,x28,x28 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b28, Zbkx_xperm8_cg_cmp_rs1_rs2_b28_str) +80003308: 000f2203 lw x4,0(x30) +8000330c: 01520863 beq x4,x21,8000331c +80003310: 1f0022ef jal x5,80005500 +80003314: 80003304 .word 0x80003304 +80003318: 8000e4a6 .word 0x8000e4a6 +8000331c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x1a5fc99d +80003320: 00092e83 lw x29,0(x18) +80003324: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xabe2ce75 +80003328: 00092e83 lw x29,0(x18) +8000332c: 00490913 addi x18,x18,4 + +80003330 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b29: + xperm8 x21, x29, x29 # perform operation +80003330: 29decab3 xperm8 x21,x29,x29 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b29, Zbkx_xperm8_cg_cmp_rs1_rs2_b29_str) +80003334: 000f2203 lw x4,0(x30) +80003338: 01520863 beq x4,x21,80003348 +8000333c: 1c4022ef jal x5,80005500 +80003340: 80003330 .word 0x80003330 +80003344: 8000e4e1 .word 0x8000e4e1 +80003348: 004f0f13 addi x30,x30,4 + + mv x3, x30 # switch signature pointer register to avoid conflict with test +8000334c: 000f0193 addi x3,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x34f7047f +80003350: 00092f03 lw x30,0(x18) +80003354: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x46bd6317 +80003358: 00092f03 lw x30,0(x18) +8000335c: 00490913 addi x18,x18,4 + +80003360 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b30: + xperm8 x17, x30, x30 # perform operation +80003360: 29ef48b3 xperm8 x17,x30,x30 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkx_xperm8_cg_cmp_rs1_rs2_b30, Zbkx_xperm8_cg_cmp_rs1_rs2_b30_str) +80003364: 0001a203 lw x4,0(x3) +80003368: 01120863 beq x4,x17,80003378 +8000336c: 194022ef jal x5,80005500 +80003370: 80003360 .word 0x80003360 +80003374: 8000e51c .word 0x8000e51c +80003378: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xb6af48ee +8000337c: 00092f83 lw x31,0(x18) +80003380: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x1897dd1f +80003384: 00092f83 lw x31,0(x18) +80003388: 00490913 addi x18,x18,4 + +8000338c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b31: + xperm8 x11, x31, x31 # perform operation +8000338c: 29ffc5b3 xperm8 x11,x31,x31 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zbkx_xperm8_cg_cmp_rs1_rs2_b31, Zbkx_xperm8_cg_cmp_rs1_rs2_b31_str) +80003390: 0001a203 lw x4,0(x3) +80003394: 00b20863 beq x4,x11,800033a4 +80003398: 168022ef jal x5,80005500 +8000339c: 8000338c .word 0x8000338c +800033a0: 8000e557 .word 0x8000e557 +800033a4: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x6c497a46 +800033a8: 00092003 lw x0,0(x18) +800033ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xa02db2da +800033b0: 00092603 lw x12,0(x18) +800033b4: 00490913 addi x18,x18,4 + +800033b8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b0: + xperm8 x0, x0, x12 # perform operation +800033b8: 28c04033 xperm8 x0,x0,x12 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkx_xperm8_cg_cmp_rd_rs1_b0, Zbkx_xperm8_cg_cmp_rd_rs1_b0_str) +800033bc: 0001a203 lw x4,0(x3) +800033c0: 00020863 beq x4,x0,800033d0 +800033c4: 13c022ef jal x5,80005500 +800033c8: 800033b8 .word 0x800033b8 +800033cc: 8000e592 .word 0x8000e592 +800033d0: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xe9a9e54e +800033d4: 00092083 lw x1,0(x18) +800033d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x5e6903a2 +800033dc: 00092883 lw x17,0(x18) +800033e0: 00490913 addi x18,x18,4 + +800033e4 : +Zbkx_xperm8_cg_cmp_rd_rs1_b1: + xperm8 x1, x1, x17 # perform operation +800033e4: 2910c0b3 xperm8 x1,x1,x17 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkx_xperm8_cg_cmp_rd_rs1_b1, Zbkx_xperm8_cg_cmp_rd_rs1_b1_str) +800033e8: 0001a203 lw x4,0(x3) +800033ec: 00120863 beq x4,x1,800033fc +800033f0: 110022ef jal x5,80005500 +800033f4: 800033e4 .word 0x800033e4 +800033f8: 8000e5cb .word 0x8000e5cb +800033fc: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x4b085bd9 +80003400: 00092103 lw x2,0(x18) +80003404: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x5bdb4c9d +80003408: 00092403 lw x8,0(x18) +8000340c: 00490913 addi x18,x18,4 + +80003410 : +Zbkx_xperm8_cg_cmp_rd_rs1_b2: + xperm8 x2, x2, x8 # perform operation +80003410: 28814133 xperm8 x2,x2,x8 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkx_xperm8_cg_cmp_rd_rs1_b2, Zbkx_xperm8_cg_cmp_rd_rs1_b2_str) +80003414: 0001a203 lw x4,0(x3) +80003418: 00220863 beq x4,x2,80003428 +8000341c: 0e4022ef jal x5,80005500 +80003420: 80003410 .word 0x80003410 +80003424: 8000e604 .word 0x8000e604 +80003428: 00418193 addi x3,x3,4 + + mv x2, x3 # switch signature pointer register to avoid conflict with test +8000342c: 00018113 addi x2,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x23eaea9a +80003430: 00092183 lw x3,0(x18) +80003434: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xf63d95b2 +80003438: 00092d83 lw x27,0(x18) +8000343c: 00490913 addi x18,x18,4 + +80003440 : +Zbkx_xperm8_cg_cmp_rd_rs1_b3: + xperm8 x3, x3, x27 # perform operation +80003440: 29b1c1b3 xperm8 x3,x3,x27 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zbkx_xperm8_cg_cmp_rd_rs1_b3, Zbkx_xperm8_cg_cmp_rd_rs1_b3_str) +80003444: 00012203 lw x4,0(x2) +80003448: 00320863 beq x4,x3,80003458 +8000344c: 0b4022ef jal x5,80005500 +80003450: 80003440 .word 0x80003440 +80003454: 8000e63d .word 0x8000e63d +80003458: 00410113 addi x2,x2,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000345c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003460: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x8931b02c +80003464: 00092203 lw x4,0(x18) +80003468: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x343622a5 +8000346c: 00092303 lw x6,0(x18) +80003470: 00490913 addi x18,x18,4 + +80003474 : +Zbkx_xperm8_cg_cmp_rd_rs1_b4: + xperm8 x4, x4, x6 # perform operation +80003474: 28624233 xperm8 x4,x4,x6 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zbkx_xperm8_cg_cmp_rd_rs1_b4, Zbkx_xperm8_cg_cmp_rd_rs1_b4_str) +80003478: 00012383 lw x7,0(x2) +8000347c: 00438863 beq x7,x4,8000348c +80003480: 0980246f jal x8,80005518 +80003484: 80003474 .word 0x80003474 +80003488: 8000e676 .word 0x8000e676 +8000348c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x4b06d515 +80003490: 00092283 lw x5,0(x18) +80003494: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x8f002508 +80003498: 00092f03 lw x30,0(x18) +8000349c: 00490913 addi x18,x18,4 + +800034a0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b5: + xperm8 x5, x5, x30 # perform operation +800034a0: 29e2c2b3 xperm8 x5,x5,x30 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zbkx_xperm8_cg_cmp_rd_rs1_b5, Zbkx_xperm8_cg_cmp_rd_rs1_b5_str) +800034a4: 00012383 lw x7,0(x2) +800034a8: 00538863 beq x7,x5,800034b8 +800034ac: 06c0246f jal x8,80005518 +800034b0: 800034a0 .word 0x800034a0 +800034b4: 8000e6af .word 0x8000e6af +800034b8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x3c7e5c81 +800034bc: 00092303 lw x6,0(x18) +800034c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x232d5c99 +800034c4: 00092083 lw x1,0(x18) +800034c8: 00490913 addi x18,x18,4 + +800034cc : +Zbkx_xperm8_cg_cmp_rd_rs1_b6: + xperm8 x6, x6, x1 # perform operation +800034cc: 28134333 xperm8 x6,x6,x1 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zbkx_xperm8_cg_cmp_rd_rs1_b6, Zbkx_xperm8_cg_cmp_rd_rs1_b6_str) +800034d0: 00012383 lw x7,0(x2) +800034d4: 00638863 beq x7,x6,800034e4 +800034d8: 0400246f jal x8,80005518 +800034dc: 800034cc .word 0x800034cc +800034e0: 8000e6e8 .word 0x8000e6e8 +800034e4: 00410113 addi x2,x2,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800034e8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800034ec: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x0aaa593a +800034f0: 00092383 lw x7,0(x18) +800034f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x2e6d70df +800034f8: 00092d03 lw x26,0(x18) +800034fc: 00490913 addi x18,x18,4 + +80003500 : +Zbkx_xperm8_cg_cmp_rd_rs1_b7: + xperm8 x7, x7, x26 # perform operation +80003500: 29a3c3b3 xperm8 x7,x7,x26 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkx_xperm8_cg_cmp_rd_rs1_b7, Zbkx_xperm8_cg_cmp_rd_rs1_b7_str) +80003504: 00012203 lw x4,0(x2) +80003508: 00720863 beq x4,x7,80003518 +8000350c: 7f5012ef jal x5,80005500 +80003510: 80003500 .word 0x80003500 +80003514: 8000e721 .word 0x8000e721 +80003518: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x1c6d14f9 +8000351c: 00092403 lw x8,0(x18) +80003520: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x1fc8dae8 +80003524: 00092383 lw x7,0(x18) +80003528: 00490913 addi x18,x18,4 + +8000352c : +Zbkx_xperm8_cg_cmp_rd_rs1_b8: + xperm8 x8, x8, x7 # perform operation +8000352c: 28744433 xperm8 x8,x8,x7 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zbkx_xperm8_cg_cmp_rd_rs1_b8, Zbkx_xperm8_cg_cmp_rd_rs1_b8_str) +80003530: 00012203 lw x4,0(x2) +80003534: 00820863 beq x4,x8,80003544 +80003538: 7c9012ef jal x5,80005500 +8000353c: 8000352c .word 0x8000352c +80003540: 8000e75a .word 0x8000e75a +80003544: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xbf305946 +80003548: 00092483 lw x9,0(x18) +8000354c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x7830b0f9 +80003550: 00092d83 lw x27,0(x18) +80003554: 00490913 addi x18,x18,4 + +80003558 : +Zbkx_xperm8_cg_cmp_rd_rs1_b9: + xperm8 x9, x9, x27 # perform operation +80003558: 29b4c4b3 xperm8 x9,x9,x27 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkx_xperm8_cg_cmp_rd_rs1_b9, Zbkx_xperm8_cg_cmp_rd_rs1_b9_str) +8000355c: 00012203 lw x4,0(x2) +80003560: 00920863 beq x4,x9,80003570 +80003564: 79d012ef jal x5,80005500 +80003568: 80003558 .word 0x80003558 +8000356c: 8000e793 .word 0x8000e793 +80003570: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x0bebaf59 +80003574: 00092503 lw x10,0(x18) +80003578: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xa1c995ce +8000357c: 00092683 lw x13,0(x18) +80003580: 00490913 addi x18,x18,4 + +80003584 : +Zbkx_xperm8_cg_cmp_rd_rs1_b10: + xperm8 x10, x10, x13 # perform operation +80003584: 28d54533 xperm8 x10,x10,x13 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zbkx_xperm8_cg_cmp_rd_rs1_b10, Zbkx_xperm8_cg_cmp_rd_rs1_b10_str) +80003588: 00012203 lw x4,0(x2) +8000358c: 00a20863 beq x4,x10,8000359c +80003590: 771012ef jal x5,80005500 +80003594: 80003584 .word 0x80003584 +80003598: 8000e7cc .word 0x8000e7cc +8000359c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x30680329 +800035a0: 00092583 lw x11,0(x18) +800035a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x31a1e32c +800035a8: 00092703 lw x14,0(x18) +800035ac: 00490913 addi x18,x18,4 + +800035b0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b11: + xperm8 x11, x11, x14 # perform operation +800035b0: 28e5c5b3 xperm8 x11,x11,x14 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkx_xperm8_cg_cmp_rd_rs1_b11, Zbkx_xperm8_cg_cmp_rd_rs1_b11_str) +800035b4: 00012203 lw x4,0(x2) +800035b8: 00b20863 beq x4,x11,800035c8 +800035bc: 745012ef jal x5,80005500 +800035c0: 800035b0 .word 0x800035b0 +800035c4: 8000e806 .word 0x8000e806 +800035c8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xab06f13d +800035cc: 00092603 lw x12,0(x18) +800035d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x8706e235 +800035d4: 00092883 lw x17,0(x18) +800035d8: 00490913 addi x18,x18,4 + +800035dc : +Zbkx_xperm8_cg_cmp_rd_rs1_b12: + xperm8 x12, x12, x17 # perform operation +800035dc: 29164633 xperm8 x12,x12,x17 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkx_xperm8_cg_cmp_rd_rs1_b12, Zbkx_xperm8_cg_cmp_rd_rs1_b12_str) +800035e0: 00012203 lw x4,0(x2) +800035e4: 00c20863 beq x4,x12,800035f4 +800035e8: 719012ef jal x5,80005500 +800035ec: 800035dc .word 0x800035dc +800035f0: 8000e840 .word 0x8000e840 +800035f4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x8f5c5e21 +800035f8: 00092683 lw x13,0(x18) +800035fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x9de8d515 +80003600: 00092e03 lw x28,0(x18) +80003604: 00490913 addi x18,x18,4 + +80003608 : +Zbkx_xperm8_cg_cmp_rd_rs1_b13: + xperm8 x13, x13, x28 # perform operation +80003608: 29c6c6b3 xperm8 x13,x13,x28 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkx_xperm8_cg_cmp_rd_rs1_b13, Zbkx_xperm8_cg_cmp_rd_rs1_b13_str) +8000360c: 00012203 lw x4,0(x2) +80003610: 00d20863 beq x4,x13,80003620 +80003614: 6ed012ef jal x5,80005500 +80003618: 80003608 .word 0x80003608 +8000361c: 8000e87a .word 0x8000e87a +80003620: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x0f98d09f +80003624: 00092703 lw x14,0(x18) +80003628: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xf162fdb3 +8000362c: 00092403 lw x8,0(x18) +80003630: 00490913 addi x18,x18,4 + +80003634 : +Zbkx_xperm8_cg_cmp_rd_rs1_b14: + xperm8 x14, x14, x8 # perform operation +80003634: 28874733 xperm8 x14,x14,x8 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zbkx_xperm8_cg_cmp_rd_rs1_b14, Zbkx_xperm8_cg_cmp_rd_rs1_b14_str) +80003638: 00012203 lw x4,0(x2) +8000363c: 00e20863 beq x4,x14,8000364c +80003640: 6c1012ef jal x5,80005500 +80003644: 80003634 .word 0x80003634 +80003648: 8000e8b4 .word 0x8000e8b4 +8000364c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x2fbf5af4 +80003650: 00092783 lw x15,0(x18) +80003654: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x9b690af6 +80003658: 00092d03 lw x26,0(x18) +8000365c: 00490913 addi x18,x18,4 + +80003660 : +Zbkx_xperm8_cg_cmp_rd_rs1_b15: + xperm8 x15, x15, x26 # perform operation +80003660: 29a7c7b3 xperm8 x15,x15,x26 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zbkx_xperm8_cg_cmp_rd_rs1_b15, Zbkx_xperm8_cg_cmp_rd_rs1_b15_str) +80003664: 00012203 lw x4,0(x2) +80003668: 00f20863 beq x4,x15,80003678 +8000366c: 695012ef jal x5,80005500 +80003670: 80003660 .word 0x80003660 +80003674: 8000e8ee .word 0x8000e8ee +80003678: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0xb46be577 +8000367c: 00092803 lw x16,0(x18) +80003680: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0xa783cb6b +80003684: 00092083 lw x1,0(x18) +80003688: 00490913 addi x18,x18,4 + +8000368c : +Zbkx_xperm8_cg_cmp_rd_rs1_b16: + xperm8 x16, x16, x1 # perform operation +8000368c: 28184833 xperm8 x16,x16,x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkx_xperm8_cg_cmp_rd_rs1_b16, Zbkx_xperm8_cg_cmp_rd_rs1_b16_str) +80003690: 00012203 lw x4,0(x2) +80003694: 01020863 beq x4,x16,800036a4 +80003698: 669012ef jal x5,80005500 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000e928 .word 0x8000e928 +800036a4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7544eb0c +800036a8: 00092883 lw x17,0(x18) +800036ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x3a54a153 +800036b0: 00092483 lw x9,0(x18) +800036b4: 00490913 addi x18,x18,4 + +800036b8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b17: + xperm8 x17, x17, x9 # perform operation +800036b8: 2898c8b3 xperm8 x17,x17,x9 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkx_xperm8_cg_cmp_rd_rs1_b17, Zbkx_xperm8_cg_cmp_rd_rs1_b17_str) +800036bc: 00012203 lw x4,0(x2) +800036c0: 01120863 beq x4,x17,800036d0 +800036c4: 63d012ef jal x5,80005500 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000e962 .word 0x8000e962 +800036d0: 00410113 addi x2,x2,4 + + mv x9, x18 # switch data pointer register to avoid conflict with test +800036d4: 00090493 addi x9,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x4ee6691b +800036d8: 0004a903 lw x18,0(x9) +800036dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7160e66a +800036e0: 0004af03 lw x30,0(x9) +800036e4: 00448493 addi x9,x9,4 + +800036e8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b18: + xperm8 x18, x18, x30 # perform operation +800036e8: 29e94933 xperm8 x18,x18,x30 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zbkx_xperm8_cg_cmp_rd_rs1_b18, Zbkx_xperm8_cg_cmp_rd_rs1_b18_str) +800036ec: 00012203 lw x4,0(x2) +800036f0: 01220863 beq x4,x18,80003700 +800036f4: 60d012ef jal x5,80005500 +800036f8: 800036e8 .word 0x800036e8 +800036fc: 8000e99c .word 0x8000e99c +80003700: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x8bf324dc +80003704: 0004a983 lw x19,0(x9) +80003708: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x77bc8980 +8000370c: 0004ab03 lw x22,0(x9) +80003710: 00448493 addi x9,x9,4 + +80003714 : +Zbkx_xperm8_cg_cmp_rd_rs1_b19: + xperm8 x19, x19, x22 # perform operation +80003714: 2969c9b3 xperm8 x19,x19,x22 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkx_xperm8_cg_cmp_rd_rs1_b19, Zbkx_xperm8_cg_cmp_rd_rs1_b19_str) +80003718: 00012203 lw x4,0(x2) +8000371c: 01320863 beq x4,x19,8000372c +80003720: 5e1012ef jal x5,80005500 +80003724: 80003714 .word 0x80003714 +80003728: 8000e9d6 .word 0x8000e9d6 +8000372c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xb918e564 +80003730: 0004aa03 lw x20,0(x9) +80003734: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x14b6028c +80003738: 0004ad03 lw x26,0(x9) +8000373c: 00448493 addi x9,x9,4 + +80003740 : +Zbkx_xperm8_cg_cmp_rd_rs1_b20: + xperm8 x20, x20, x26 # perform operation +80003740: 29aa4a33 xperm8 x20,x20,x26 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkx_xperm8_cg_cmp_rd_rs1_b20, Zbkx_xperm8_cg_cmp_rd_rs1_b20_str) +80003744: 00012203 lw x4,0(x2) +80003748: 01420863 beq x4,x20,80003758 +8000374c: 5b5012ef jal x5,80005500 +80003750: 80003740 .word 0x80003740 +80003754: 8000ea10 .word 0x8000ea10 +80003758: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x1f35599a +8000375c: 0004aa83 lw x21,0(x9) +80003760: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xb2d95777 +80003764: 0004a583 lw x11,0(x9) +80003768: 00448493 addi x9,x9,4 + +8000376c : +Zbkx_xperm8_cg_cmp_rd_rs1_b21: + xperm8 x21, x21, x11 # perform operation +8000376c: 28bacab3 xperm8 x21,x21,x11 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zbkx_xperm8_cg_cmp_rd_rs1_b21, Zbkx_xperm8_cg_cmp_rd_rs1_b21_str) +80003770: 00012203 lw x4,0(x2) +80003774: 01520863 beq x4,x21,80003784 +80003778: 589012ef jal x5,80005500 +8000377c: 8000376c .word 0x8000376c +80003780: 8000ea4a .word 0x8000ea4a +80003784: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x097583ad +80003788: 0004ab03 lw x22,0(x9) +8000378c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x623c2777 +80003790: 0004a703 lw x14,0(x9) +80003794: 00448493 addi x9,x9,4 + +80003798 : +Zbkx_xperm8_cg_cmp_rd_rs1_b22: + xperm8 x22, x22, x14 # perform operation +80003798: 28eb4b33 xperm8 x22,x22,x14 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zbkx_xperm8_cg_cmp_rd_rs1_b22, Zbkx_xperm8_cg_cmp_rd_rs1_b22_str) +8000379c: 00012203 lw x4,0(x2) +800037a0: 01620863 beq x4,x22,800037b0 +800037a4: 55d012ef jal x5,80005500 +800037a8: 80003798 .word 0x80003798 +800037ac: 8000ea84 .word 0x8000ea84 +800037b0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0c92c219 +800037b4: 0004ab83 lw x23,0(x9) +800037b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x7a5d9128 +800037bc: 0004ac83 lw x25,0(x9) +800037c0: 00448493 addi x9,x9,4 + +800037c4 : +Zbkx_xperm8_cg_cmp_rd_rs1_b23: + xperm8 x23, x23, x25 # perform operation +800037c4: 299bcbb3 xperm8 x23,x23,x25 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkx_xperm8_cg_cmp_rd_rs1_b23, Zbkx_xperm8_cg_cmp_rd_rs1_b23_str) +800037c8: 00012203 lw x4,0(x2) +800037cc: 01720863 beq x4,x23,800037dc +800037d0: 531012ef jal x5,80005500 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000eabe .word 0x8000eabe +800037dc: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x52066abe +800037e0: 0004ac03 lw x24,0(x9) +800037e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xd52fccf2 +800037e8: 0004a003 lw x0,0(x9) +800037ec: 00448493 addi x9,x9,4 + +800037f0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b24: + xperm8 x24, x24, x0 # perform operation +800037f0: 280c4c33 xperm8 x24,x24,x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkx_xperm8_cg_cmp_rd_rs1_b24, Zbkx_xperm8_cg_cmp_rd_rs1_b24_str) +800037f4: 00012203 lw x4,0(x2) +800037f8: 01820863 beq x4,x24,80003808 +800037fc: 505012ef jal x5,80005500 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000eaf8 .word 0x8000eaf8 +80003808: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xf4012a9c +8000380c: 0004ac83 lw x25,0(x9) +80003810: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x99b7bdb0 +80003814: 0004ae83 lw x29,0(x9) +80003818: 00448493 addi x9,x9,4 + +8000381c : +Zbkx_xperm8_cg_cmp_rd_rs1_b25: + xperm8 x25, x25, x29 # perform operation +8000381c: 29dcccb3 xperm8 x25,x25,x29 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkx_xperm8_cg_cmp_rd_rs1_b25, Zbkx_xperm8_cg_cmp_rd_rs1_b25_str) +80003820: 00012203 lw x4,0(x2) +80003824: 01920863 beq x4,x25,80003834 +80003828: 4d9012ef jal x5,80005500 +8000382c: 8000381c .word 0x8000381c +80003830: 8000eb32 .word 0x8000eb32 +80003834: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x111d1cf9 +80003838: 0004ad03 lw x26,0(x9) +8000383c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xdcb38dec +80003840: 0004ae03 lw x28,0(x9) +80003844: 00448493 addi x9,x9,4 + +80003848 : +Zbkx_xperm8_cg_cmp_rd_rs1_b26: + xperm8 x26, x26, x28 # perform operation +80003848: 29cd4d33 xperm8 x26,x26,x28 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkx_xperm8_cg_cmp_rd_rs1_b26, Zbkx_xperm8_cg_cmp_rd_rs1_b26_str) +8000384c: 00012203 lw x4,0(x2) +80003850: 01a20863 beq x4,x26,80003860 +80003854: 4ad012ef jal x5,80005500 +80003858: 80003848 .word 0x80003848 +8000385c: 8000eb6c .word 0x8000eb6c +80003860: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xa1104aa4 +80003864: 0004ad83 lw x27,0(x9) +80003868: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xf5925a08 +8000386c: 0004af83 lw x31,0(x9) +80003870: 00448493 addi x9,x9,4 + +80003874 : +Zbkx_xperm8_cg_cmp_rd_rs1_b27: + xperm8 x27, x27, x31 # perform operation +80003874: 29fdcdb3 xperm8 x27,x27,x31 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zbkx_xperm8_cg_cmp_rd_rs1_b27, Zbkx_xperm8_cg_cmp_rd_rs1_b27_str) +80003878: 00012203 lw x4,0(x2) +8000387c: 01b20863 beq x4,x27,8000388c +80003880: 481012ef jal x5,80005500 +80003884: 80003874 .word 0x80003874 +80003888: 8000eba6 .word 0x8000eba6 +8000388c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x6d5a4d27 +80003890: 0004ae03 lw x28,0(x9) +80003894: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x76f38aa4 +80003898: 0004ac83 lw x25,0(x9) +8000389c: 00448493 addi x9,x9,4 + +800038a0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b28: + xperm8 x28, x28, x25 # perform operation +800038a0: 299e4e33 xperm8 x28,x28,x25 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkx_xperm8_cg_cmp_rd_rs1_b28, Zbkx_xperm8_cg_cmp_rd_rs1_b28_str) +800038a4: 00012203 lw x4,0(x2) +800038a8: 01c20863 beq x4,x28,800038b8 +800038ac: 455012ef jal x5,80005500 +800038b0: 800038a0 .word 0x800038a0 +800038b4: 8000ebe0 .word 0x8000ebe0 +800038b8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7e3ec42d +800038bc: 0004ae83 lw x29,0(x9) +800038c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xcffb036d +800038c4: 0004a503 lw x10,0(x9) +800038c8: 00448493 addi x9,x9,4 + +800038cc : +Zbkx_xperm8_cg_cmp_rd_rs1_b29: + xperm8 x29, x29, x10 # perform operation +800038cc: 28aeceb3 xperm8 x29,x29,x10 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkx_xperm8_cg_cmp_rd_rs1_b29, Zbkx_xperm8_cg_cmp_rd_rs1_b29_str) +800038d0: 00012203 lw x4,0(x2) +800038d4: 01d20863 beq x4,x29,800038e4 +800038d8: 429012ef jal x5,80005500 +800038dc: 800038cc .word 0x800038cc +800038e0: 8000ec1a .word 0x8000ec1a +800038e4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x182ebd5a +800038e8: 0004af03 lw x30,0(x9) +800038ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xee910f1a +800038f0: 0004ae03 lw x28,0(x9) +800038f4: 00448493 addi x9,x9,4 + +800038f8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b30: + xperm8 x30, x30, x28 # perform operation +800038f8: 29cf4f33 xperm8 x30,x30,x28 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkx_xperm8_cg_cmp_rd_rs1_b30, Zbkx_xperm8_cg_cmp_rd_rs1_b30_str) +800038fc: 00012203 lw x4,0(x2) +80003900: 01e20863 beq x4,x30,80003910 +80003904: 3fd012ef jal x5,80005500 +80003908: 800038f8 .word 0x800038f8 +8000390c: 8000ec54 .word 0x8000ec54 +80003910: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xbc3346f6 +80003914: 0004af83 lw x31,0(x9) +80003918: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x3a612dec +8000391c: 0004a403 lw x8,0(x9) +80003920: 00448493 addi x9,x9,4 + +80003924 : +Zbkx_xperm8_cg_cmp_rd_rs1_b31: + xperm8 x31, x31, x8 # perform operation +80003924: 288fcfb3 xperm8 x31,x31,x8 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkx_xperm8_cg_cmp_rd_rs1_b31, Zbkx_xperm8_cg_cmp_rd_rs1_b31_str) +80003928: 00012203 lw x4,0(x2) +8000392c: 01f20863 beq x4,x31,8000393c +80003930: 3d1012ef jal x5,80005500 +80003934: 80003924 .word 0x80003924 +80003938: 8000ec8e .word 0x8000ec8e +8000393c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2be27582 +80003940: 0004ad03 lw x26,0(x9) +80003944: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xe11a7626 +80003948: 0004a003 lw x0,0(x9) +8000394c: 00448493 addi x9,x9,4 + +80003950 : +Zbkx_xperm8_cg_cmp_rd_rs2_b0: + xperm8 x0, x26, x0 # perform operation +80003950: 280d4033 xperm8 x0,x26,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkx_xperm8_cg_cmp_rd_rs2_b0, Zbkx_xperm8_cg_cmp_rd_rs2_b0_str) +80003954: 00012203 lw x4,0(x2) +80003958: 00020863 beq x4,x0,80003968 +8000395c: 3a5012ef jal x5,80005500 +80003960: 80003950 .word 0x80003950 +80003964: 8000ecc8 .word 0x8000ecc8 +80003968: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xdd2e9ff1 +8000396c: 0004ab83 lw x23,0(x9) +80003970: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xc41ed2be +80003974: 0004a083 lw x1,0(x9) +80003978: 00448493 addi x9,x9,4 + +8000397c : +Zbkx_xperm8_cg_cmp_rd_rs2_b1: + xperm8 x1, x23, x1 # perform operation +8000397c: 281bc0b3 xperm8 x1,x23,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkx_xperm8_cg_cmp_rd_rs2_b1, Zbkx_xperm8_cg_cmp_rd_rs2_b1_str) +80003980: 00012203 lw x4,0(x2) +80003984: 00120863 beq x4,x1,80003994 +80003988: 379012ef jal x5,80005500 +8000398c: 8000397c .word 0x8000397c +80003990: 8000ed01 .word 0x8000ed01 +80003994: 00410113 addi x2,x2,4 + + mv x26, x2 # switch signature pointer register to avoid conflict with test +80003998: 00010d13 addi x26,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xebca06da +8000399c: 0004ac83 lw x25,0(x9) +800039a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x8fd7607a +800039a4: 0004a103 lw x2,0(x9) +800039a8: 00448493 addi x9,x9,4 + +800039ac : +Zbkx_xperm8_cg_cmp_rd_rs2_b2: + xperm8 x2, x25, x2 # perform operation +800039ac: 282cc133 xperm8 x2,x25,x2 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zbkx_xperm8_cg_cmp_rd_rs2_b2, Zbkx_xperm8_cg_cmp_rd_rs2_b2_str) +800039b0: 000d2203 lw x4,0(x26) +800039b4: 00220863 beq x4,x2,800039c4 +800039b8: 349012ef jal x5,80005500 +800039bc: 800039ac .word 0x800039ac +800039c0: 8000ed3a .word 0x8000ed3a +800039c4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xa30dd965 +800039c8: 0004a883 lw x17,0(x9) +800039cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x74314b9b +800039d0: 0004a183 lw x3,0(x9) +800039d4: 00448493 addi x9,x9,4 + +800039d8 : +Zbkx_xperm8_cg_cmp_rd_rs2_b3: + xperm8 x3, x17, x3 # perform operation +800039d8: 2838c1b3 xperm8 x3,x17,x3 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zbkx_xperm8_cg_cmp_rd_rs2_b3, Zbkx_xperm8_cg_cmp_rd_rs2_b3_str) +800039dc: 000d2203 lw x4,0(x26) +800039e0: 00320863 beq x4,x3,800039f0 +800039e4: 31d012ef jal x5,80005500 +800039e8: 800039d8 .word 0x800039d8 +800039ec: 8000ed73 .word 0x8000ed73 +800039f0: 004d0d13 addi x26,x26,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800039f4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800039f8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xaf1d183a +800039fc: 0004ab83 lw x23,0(x9) +80003a00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xa557b7b7 +80003a04: 0004a203 lw x4,0(x9) +80003a08: 00448493 addi x9,x9,4 + +80003a0c : +Zbkx_xperm8_cg_cmp_rd_rs2_b4: + xperm8 x4, x23, x4 # perform operation +80003a0c: 284bc233 xperm8 x4,x23,x4 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zbkx_xperm8_cg_cmp_rd_rs2_b4, Zbkx_xperm8_cg_cmp_rd_rs2_b4_str) +80003a10: 000d2383 lw x7,0(x26) +80003a14: 00438863 beq x7,x4,80003a24 +80003a18: 3010146f jal x8,80005518 +80003a1c: 80003a0c .word 0x80003a0c +80003a20: 8000edac .word 0x8000edac +80003a24: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xded51cd6 +80003a28: 0004ac03 lw x24,0(x9) +80003a2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x81a30202 +80003a30: 0004a283 lw x5,0(x9) +80003a34: 00448493 addi x9,x9,4 + +80003a38 : +Zbkx_xperm8_cg_cmp_rd_rs2_b5: + xperm8 x5, x24, x5 # perform operation +80003a38: 285c42b3 xperm8 x5,x24,x5 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zbkx_xperm8_cg_cmp_rd_rs2_b5, Zbkx_xperm8_cg_cmp_rd_rs2_b5_str) +80003a3c: 000d2383 lw x7,0(x26) +80003a40: 00538863 beq x7,x5,80003a50 +80003a44: 2d50146f jal x8,80005518 +80003a48: 80003a38 .word 0x80003a38 +80003a4c: 8000ede5 .word 0x8000ede5 +80003a50: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x73c57b81 +80003a54: 0004af03 lw x30,0(x9) +80003a58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x9762184b +80003a5c: 0004a303 lw x6,0(x9) +80003a60: 00448493 addi x9,x9,4 + +80003a64 : +Zbkx_xperm8_cg_cmp_rd_rs2_b6: + xperm8 x6, x30, x6 # perform operation +80003a64: 286f4333 xperm8 x6,x30,x6 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zbkx_xperm8_cg_cmp_rd_rs2_b6, Zbkx_xperm8_cg_cmp_rd_rs2_b6_str) +80003a68: 000d2383 lw x7,0(x26) +80003a6c: 00638863 beq x7,x6,80003a7c +80003a70: 2a90146f jal x8,80005518 +80003a74: 80003a64 .word 0x80003a64 +80003a78: 8000ee1e .word 0x8000ee1e +80003a7c: 004d0d13 addi x26,x26,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a80: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a84: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x119446b4 +80003a88: 0004a103 lw x2,0(x9) +80003a8c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xa90556f6 +80003a90: 0004a383 lw x7,0(x9) +80003a94: 00448493 addi x9,x9,4 + +80003a98 : +Zbkx_xperm8_cg_cmp_rd_rs2_b7: + xperm8 x7, x2, x7 # perform operation +80003a98: 287143b3 xperm8 x7,x2,x7 + # Check if x7 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x7, Zbkx_xperm8_cg_cmp_rd_rs2_b7, Zbkx_xperm8_cg_cmp_rd_rs2_b7_str) +80003a9c: 000d2683 lw x13,0(x26) +80003aa0: 00768863 beq x13,x7,80003ab0 +80003aa4: 29d0176f jal x14,80005540 +80003aa8: 80003a98 .word 0x80003a98 +80003aac: 8000ee57 .word 0x8000ee57 +80003ab0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xaf764ef3 +80003ab4: 0004ad83 lw x27,0(x9) +80003ab8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x6134afbd +80003abc: 0004a403 lw x8,0(x9) +80003ac0: 00448493 addi x9,x9,4 + +80003ac4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b8: + xperm8 x8, x27, x8 # perform operation +80003ac4: 288dc433 xperm8 x8,x27,x8 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zbkx_xperm8_cg_cmp_rd_rs2_b8, Zbkx_xperm8_cg_cmp_rd_rs2_b8_str) +80003ac8: 000d2683 lw x13,0(x26) +80003acc: 00868863 beq x13,x8,80003adc +80003ad0: 2710176f jal x14,80005540 +80003ad4: 80003ac4 .word 0x80003ac4 +80003ad8: 8000ee90 .word 0x8000ee90 +80003adc: 004d0d13 addi x26,x26,4 + + mv x22, x9 # switch data pointer register to avoid conflict with test +80003ae0: 00048b13 addi x22,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x9fef4b37 +80003ae4: 000b2783 lw x15,0(x22) +80003ae8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0xc6d4d73b +80003aec: 000b2483 lw x9,0(x22) +80003af0: 004b0b13 addi x22,x22,4 + +80003af4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b9: + xperm8 x9, x15, x9 # perform operation +80003af4: 2897c4b3 xperm8 x9,x15,x9 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zbkx_xperm8_cg_cmp_rd_rs2_b9, Zbkx_xperm8_cg_cmp_rd_rs2_b9_str) +80003af8: 000d2683 lw x13,0(x26) +80003afc: 00968863 beq x13,x9,80003b0c +80003b00: 2410176f jal x14,80005540 +80003b04: 80003af4 .word 0x80003af4 +80003b08: 8000eec9 .word 0x8000eec9 +80003b0c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x7be27cd5 +80003b10: 000b2f03 lw x30,0(x22) +80003b14: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x1af47d55 +80003b18: 000b2503 lw x10,0(x22) +80003b1c: 004b0b13 addi x22,x22,4 + +80003b20 : +Zbkx_xperm8_cg_cmp_rd_rs2_b10: + xperm8 x10, x30, x10 # perform operation +80003b20: 28af4533 xperm8 x10,x30,x10 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zbkx_xperm8_cg_cmp_rd_rs2_b10, Zbkx_xperm8_cg_cmp_rd_rs2_b10_str) +80003b24: 000d2683 lw x13,0(x26) +80003b28: 00a68863 beq x13,x10,80003b38 +80003b2c: 2150176f jal x14,80005540 +80003b30: 80003b20 .word 0x80003b20 +80003b34: 8000ef02 .word 0x8000ef02 +80003b38: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xc2152dea +80003b3c: 000b2b83 lw x23,0(x22) +80003b40: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xd7546389 +80003b44: 000b2583 lw x11,0(x22) +80003b48: 004b0b13 addi x22,x22,4 + +80003b4c : +Zbkx_xperm8_cg_cmp_rd_rs2_b11: + xperm8 x11, x23, x11 # perform operation +80003b4c: 28bbc5b3 xperm8 x11,x23,x11 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zbkx_xperm8_cg_cmp_rd_rs2_b11, Zbkx_xperm8_cg_cmp_rd_rs2_b11_str) +80003b50: 000d2683 lw x13,0(x26) +80003b54: 00b68863 beq x13,x11,80003b64 +80003b58: 1e90176f jal x14,80005540 +80003b5c: 80003b4c .word 0x80003b4c +80003b60: 8000ef3c .word 0x8000ef3c +80003b64: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x2a13179a +80003b68: 000b2c83 lw x25,0(x22) +80003b6c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xb7550a69 +80003b70: 000b2603 lw x12,0(x22) +80003b74: 004b0b13 addi x22,x22,4 + +80003b78 : +Zbkx_xperm8_cg_cmp_rd_rs2_b12: + xperm8 x12, x25, x12 # perform operation +80003b78: 28ccc633 xperm8 x12,x25,x12 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zbkx_xperm8_cg_cmp_rd_rs2_b12, Zbkx_xperm8_cg_cmp_rd_rs2_b12_str) +80003b7c: 000d2683 lw x13,0(x26) +80003b80: 00c68863 beq x13,x12,80003b90 +80003b84: 1bd0176f jal x14,80005540 +80003b88: 80003b78 .word 0x80003b78 +80003b8c: 8000ef76 .word 0x8000ef76 +80003b90: 004d0d13 addi x26,x26,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b94: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003b98: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x22f5e6b3 +80003b9c: 000b2283 lw x5,0(x22) +80003ba0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x1427d870 +80003ba4: 000b2683 lw x13,0(x22) +80003ba8: 004b0b13 addi x22,x22,4 + +80003bac : +Zbkx_xperm8_cg_cmp_rd_rs2_b13: + xperm8 x13, x5, x13 # perform operation +80003bac: 28d2c6b3 xperm8 x13,x5,x13 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zbkx_xperm8_cg_cmp_rd_rs2_b13, Zbkx_xperm8_cg_cmp_rd_rs2_b13_str) +80003bb0: 000d2383 lw x7,0(x26) +80003bb4: 00d38863 beq x7,x13,80003bc4 +80003bb8: 1610146f jal x8,80005518 +80003bbc: 80003bac .word 0x80003bac +80003bc0: 8000efb0 .word 0x8000efb0 +80003bc4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xd62469ff +80003bc8: 000b2883 lw x17,0(x22) +80003bcc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x5202da75 +80003bd0: 000b2703 lw x14,0(x22) +80003bd4: 004b0b13 addi x22,x22,4 + +80003bd8 : +Zbkx_xperm8_cg_cmp_rd_rs2_b14: + xperm8 x14, x17, x14 # perform operation +80003bd8: 28e8c733 xperm8 x14,x17,x14 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zbkx_xperm8_cg_cmp_rd_rs2_b14, Zbkx_xperm8_cg_cmp_rd_rs2_b14_str) +80003bdc: 000d2383 lw x7,0(x26) +80003be0: 00e38863 beq x7,x14,80003bf0 +80003be4: 1350146f jal x8,80005518 +80003be8: 80003bd8 .word 0x80003bd8 +80003bec: 8000efea .word 0x8000efea +80003bf0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x6c46a77b +80003bf4: 000b2f03 lw x30,0(x22) +80003bf8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x29161e07 +80003bfc: 000b2783 lw x15,0(x22) +80003c00: 004b0b13 addi x22,x22,4 + +80003c04 : +Zbkx_xperm8_cg_cmp_rd_rs2_b15: + xperm8 x15, x30, x15 # perform operation +80003c04: 28ff47b3 xperm8 x15,x30,x15 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zbkx_xperm8_cg_cmp_rd_rs2_b15, Zbkx_xperm8_cg_cmp_rd_rs2_b15_str) +80003c08: 000d2383 lw x7,0(x26) +80003c0c: 00f38863 beq x7,x15,80003c1c +80003c10: 1090146f jal x8,80005518 +80003c14: 80003c04 .word 0x80003c04 +80003c18: 8000f024 .word 0x8000f024 +80003c1c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xa11b8ad9 +80003c20: 000b2103 lw x2,0(x22) +80003c24: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x3f810635 +80003c28: 000b2803 lw x16,0(x22) +80003c2c: 004b0b13 addi x22,x22,4 + +80003c30 : +Zbkx_xperm8_cg_cmp_rd_rs2_b16: + xperm8 x16, x2, x16 # perform operation +80003c30: 29014833 xperm8 x16,x2,x16 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zbkx_xperm8_cg_cmp_rd_rs2_b16, Zbkx_xperm8_cg_cmp_rd_rs2_b16_str) +80003c34: 000d2383 lw x7,0(x26) +80003c38: 01038863 beq x7,x16,80003c48 +80003c3c: 0dd0146f jal x8,80005518 +80003c40: 80003c30 .word 0x80003c30 +80003c44: 8000f05e .word 0x8000f05e +80003c48: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0x9cd5cbae +80003c4c: 000b2103 lw x2,0(x22) +80003c50: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x7a1248db +80003c54: 000b2883 lw x17,0(x22) +80003c58: 004b0b13 addi x22,x22,4 + +80003c5c : +Zbkx_xperm8_cg_cmp_rd_rs2_b17: + xperm8 x17, x2, x17 # perform operation +80003c5c: 291148b3 xperm8 x17,x2,x17 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zbkx_xperm8_cg_cmp_rd_rs2_b17, Zbkx_xperm8_cg_cmp_rd_rs2_b17_str) +80003c60: 000d2383 lw x7,0(x26) +80003c64: 01138863 beq x7,x17,80003c74 +80003c68: 0b10146f jal x8,80005518 +80003c6c: 80003c5c .word 0x80003c5c +80003c70: 8000f098 .word 0x8000f098 +80003c74: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x7c1524af +80003c78: 000b2283 lw x5,0(x22) +80003c7c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x0f4699dd +80003c80: 000b2903 lw x18,0(x22) +80003c84: 004b0b13 addi x22,x22,4 + +80003c88 : +Zbkx_xperm8_cg_cmp_rd_rs2_b18: + xperm8 x18, x5, x18 # perform operation +80003c88: 2922c933 xperm8 x18,x5,x18 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zbkx_xperm8_cg_cmp_rd_rs2_b18, Zbkx_xperm8_cg_cmp_rd_rs2_b18_str) +80003c8c: 000d2383 lw x7,0(x26) +80003c90: 01238863 beq x7,x18,80003ca0 +80003c94: 0850146f jal x8,80005518 +80003c98: 80003c88 .word 0x80003c88 +80003c9c: 8000f0d2 .word 0x8000f0d2 +80003ca0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x6ba189dc +80003ca4: 000b2683 lw x13,0(x22) +80003ca8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x1ab62f50 +80003cac: 000b2983 lw x19,0(x22) +80003cb0: 004b0b13 addi x22,x22,4 + +80003cb4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b19: + xperm8 x19, x13, x19 # perform operation +80003cb4: 2936c9b3 xperm8 x19,x13,x19 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zbkx_xperm8_cg_cmp_rd_rs2_b19, Zbkx_xperm8_cg_cmp_rd_rs2_b19_str) +80003cb8: 000d2383 lw x7,0(x26) +80003cbc: 01338863 beq x7,x19,80003ccc +80003cc0: 0590146f jal x8,80005518 +80003cc4: 80003cb4 .word 0x80003cb4 +80003cc8: 8000f10c .word 0x8000f10c +80003ccc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x2c462809 +80003cd0: 000b2183 lw x3,0(x22) +80003cd4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x8848231a +80003cd8: 000b2a03 lw x20,0(x22) +80003cdc: 004b0b13 addi x22,x22,4 + +80003ce0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b20: + xperm8 x20, x3, x20 # perform operation +80003ce0: 2941ca33 xperm8 x20,x3,x20 + # Check if x20 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x20, Zbkx_xperm8_cg_cmp_rd_rs2_b20, Zbkx_xperm8_cg_cmp_rd_rs2_b20_str) +80003ce4: 000d2383 lw x7,0(x26) +80003ce8: 01438863 beq x7,x20,80003cf8 +80003cec: 02d0146f jal x8,80005518 +80003cf0: 80003ce0 .word 0x80003ce0 +80003cf4: 8000f146 .word 0x8000f146 +80003cf8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x77b65036 +80003cfc: 000b2603 lw x12,0(x22) +80003d00: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xda5d8213 +80003d04: 000b2a83 lw x21,0(x22) +80003d08: 004b0b13 addi x22,x22,4 + +80003d0c : +Zbkx_xperm8_cg_cmp_rd_rs2_b21: + xperm8 x21, x12, x21 # perform operation +80003d0c: 29564ab3 xperm8 x21,x12,x21 + # Check if x21 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x21, Zbkx_xperm8_cg_cmp_rd_rs2_b21, Zbkx_xperm8_cg_cmp_rd_rs2_b21_str) +80003d10: 000d2383 lw x7,0(x26) +80003d14: 01538863 beq x7,x21,80003d24 +80003d18: 0010146f jal x8,80005518 +80003d1c: 80003d0c .word 0x80003d0c +80003d20: 8000f180 .word 0x8000f180 +80003d24: 004d0d13 addi x26,x26,4 + + mv x23, x22 # switch data pointer register to avoid conflict with test +80003d28: 000b0b93 addi x23,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x4a38bdd4 +80003d2c: 000ba883 lw x17,0(x23) +80003d30: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xcfa09f3b +80003d34: 000bab03 lw x22,0(x23) +80003d38: 004b8b93 addi x23,x23,4 + +80003d3c : +Zbkx_xperm8_cg_cmp_rd_rs2_b22: + xperm8 x22, x17, x22 # perform operation +80003d3c: 2968cb33 xperm8 x22,x17,x22 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zbkx_xperm8_cg_cmp_rd_rs2_b22, Zbkx_xperm8_cg_cmp_rd_rs2_b22_str) +80003d40: 000d2383 lw x7,0(x26) +80003d44: 01638863 beq x7,x22,80003d54 +80003d48: 7d00146f jal x8,80005518 +80003d4c: 80003d3c .word 0x80003d3c +80003d50: 8000f1ba .word 0x8000f1ba +80003d54: 004d0d13 addi x26,x26,4 + + mv x10, x23 # switch data pointer register to avoid conflict with test +80003d58: 000b8513 addi x10,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfcd5ca0e +80003d5c: 00052483 lw x9,0(x10) +80003d60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5cabd362 +80003d64: 00052b83 lw x23,0(x10) +80003d68: 00450513 addi x10,x10,4 + +80003d6c : +Zbkx_xperm8_cg_cmp_rd_rs2_b23: + xperm8 x23, x9, x23 # perform operation +80003d6c: 2974cbb3 xperm8 x23,x9,x23 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zbkx_xperm8_cg_cmp_rd_rs2_b23, Zbkx_xperm8_cg_cmp_rd_rs2_b23_str) +80003d70: 000d2383 lw x7,0(x26) +80003d74: 01738863 beq x7,x23,80003d84 +80003d78: 7a00146f jal x8,80005518 +80003d7c: 80003d6c .word 0x80003d6c +80003d80: 8000f1f4 .word 0x8000f1f4 +80003d84: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xfbf25a6e +80003d88: 00052283 lw x5,0(x10) +80003d8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5d25cad5 +80003d90: 00052c03 lw x24,0(x10) +80003d94: 00450513 addi x10,x10,4 + +80003d98 : +Zbkx_xperm8_cg_cmp_rd_rs2_b24: + xperm8 x24, x5, x24 # perform operation +80003d98: 2982cc33 xperm8 x24,x5,x24 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zbkx_xperm8_cg_cmp_rd_rs2_b24, Zbkx_xperm8_cg_cmp_rd_rs2_b24_str) +80003d9c: 000d2383 lw x7,0(x26) +80003da0: 01838863 beq x7,x24,80003db0 +80003da4: 7740146f jal x8,80005518 +80003da8: 80003d98 .word 0x80003d98 +80003dac: 8000f22e .word 0x8000f22e +80003db0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x1782b0ef +80003db4: 00052483 lw x9,0(x10) +80003db8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xe3e08ed9 +80003dbc: 00052c83 lw x25,0(x10) +80003dc0: 00450513 addi x10,x10,4 + +80003dc4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b25: + xperm8 x25, x9, x25 # perform operation +80003dc4: 2994ccb3 xperm8 x25,x9,x25 + # Check if x25 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x25, Zbkx_xperm8_cg_cmp_rd_rs2_b25, Zbkx_xperm8_cg_cmp_rd_rs2_b25_str) +80003dc8: 000d2383 lw x7,0(x26) +80003dcc: 01938863 beq x7,x25,80003ddc +80003dd0: 7480146f jal x8,80005518 +80003dd4: 80003dc4 .word 0x80003dc4 +80003dd8: 8000f268 .word 0x8000f268 +80003ddc: 004d0d13 addi x26,x26,4 + + mv x23, x26 # switch signature pointer register to avoid conflict with test +80003de0: 000d0b93 addi x23,x26,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x13ec05ad +80003de4: 00052a03 lw x20,0(x10) +80003de8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x9dc61732 +80003dec: 00052d03 lw x26,0(x10) +80003df0: 00450513 addi x10,x10,4 + +80003df4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b26: + xperm8 x26, x20, x26 # perform operation +80003df4: 29aa4d33 xperm8 x26,x20,x26 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zbkx_xperm8_cg_cmp_rd_rs2_b26, Zbkx_xperm8_cg_cmp_rd_rs2_b26_str) +80003df8: 000ba383 lw x7,0(x23) +80003dfc: 01a38863 beq x7,x26,80003e0c +80003e00: 7180146f jal x8,80005518 +80003e04: 80003df4 .word 0x80003df4 +80003e08: 8000f2a2 .word 0x8000f2a2 +80003e0c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x30849b17 +80003e10: 00052983 lw x19,0(x10) +80003e14: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x1b0632db +80003e18: 00052d83 lw x27,0(x10) +80003e1c: 00450513 addi x10,x10,4 + +80003e20 : +Zbkx_xperm8_cg_cmp_rd_rs2_b27: + xperm8 x27, x19, x27 # perform operation +80003e20: 29b9cdb3 xperm8 x27,x19,x27 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zbkx_xperm8_cg_cmp_rd_rs2_b27, Zbkx_xperm8_cg_cmp_rd_rs2_b27_str) +80003e24: 000ba383 lw x7,0(x23) +80003e28: 01b38863 beq x7,x27,80003e38 +80003e2c: 6ec0146f jal x8,80005518 +80003e30: 80003e20 .word 0x80003e20 +80003e34: 8000f2dc .word 0x8000f2dc +80003e38: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x82e7486b +80003e3c: 00052783 lw x15,0(x10) +80003e40: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xdedfb77e +80003e44: 00052e03 lw x28,0(x10) +80003e48: 00450513 addi x10,x10,4 + +80003e4c : +Zbkx_xperm8_cg_cmp_rd_rs2_b28: + xperm8 x28, x15, x28 # perform operation +80003e4c: 29c7ce33 xperm8 x28,x15,x28 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zbkx_xperm8_cg_cmp_rd_rs2_b28, Zbkx_xperm8_cg_cmp_rd_rs2_b28_str) +80003e50: 000ba383 lw x7,0(x23) +80003e54: 01c38863 beq x7,x28,80003e64 +80003e58: 6c00146f jal x8,80005518 +80003e5c: 80003e4c .word 0x80003e4c +80003e60: 8000f316 .word 0x8000f316 +80003e64: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x4bed3059 +80003e68: 00052f03 lw x30,0(x10) +80003e6c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x012bd8a2 +80003e70: 00052e83 lw x29,0(x10) +80003e74: 00450513 addi x10,x10,4 + +80003e78 : +Zbkx_xperm8_cg_cmp_rd_rs2_b29: + xperm8 x29, x30, x29 # perform operation +80003e78: 29df4eb3 xperm8 x29,x30,x29 + # Check if x29 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x29, Zbkx_xperm8_cg_cmp_rd_rs2_b29, Zbkx_xperm8_cg_cmp_rd_rs2_b29_str) +80003e7c: 000ba383 lw x7,0(x23) +80003e80: 01d38863 beq x7,x29,80003e90 +80003e84: 6940146f jal x8,80005518 +80003e88: 80003e78 .word 0x80003e78 +80003e8c: 8000f350 .word 0x8000f350 +80003e90: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x4faabf4a +80003e94: 00052683 lw x13,0(x10) +80003e98: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x8cb222af +80003e9c: 00052f03 lw x30,0(x10) +80003ea0: 00450513 addi x10,x10,4 + +80003ea4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b30: + xperm8 x30, x13, x30 # perform operation +80003ea4: 29e6cf33 xperm8 x30,x13,x30 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zbkx_xperm8_cg_cmp_rd_rs2_b30, Zbkx_xperm8_cg_cmp_rd_rs2_b30_str) +80003ea8: 000ba383 lw x7,0(x23) +80003eac: 01e38863 beq x7,x30,80003ebc +80003eb0: 6680146f jal x8,80005518 +80003eb4: 80003ea4 .word 0x80003ea4 +80003eb8: 8000f38a .word 0x8000f38a +80003ebc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x02861303 +80003ec0: 00052c83 lw x25,0(x10) +80003ec4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x982c0a75 +80003ec8: 00052f83 lw x31,0(x10) +80003ecc: 00450513 addi x10,x10,4 + +80003ed0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b31: + xperm8 x31, x25, x31 # perform operation +80003ed0: 29fccfb3 xperm8 x31,x25,x31 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkx_xperm8_cg_cmp_rd_rs2_b31, Zbkx_xperm8_cg_cmp_rd_rs2_b31_str) +80003ed4: 000ba383 lw x7,0(x23) +80003ed8: 01f38863 beq x7,x31,80003ee8 +80003edc: 63c0146f jal x8,80005518 +80003ee0: 80003ed0 .word 0x80003ed0 +80003ee4: 8000f3c4 .word 0x8000f3c4 +80003ee8: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xc7475e50 +80003eec: 00052003 lw x0,0(x10) +80003ef0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xb75717bf +80003ef4: 00052003 lw x0,0(x10) +80003ef8: 00450513 addi x10,x10,4 + +80003efc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0: + xperm8 x0, x0, x0 # perform operation +80003efc: 28004033 xperm8 x0,x0,x0 + # Check if x0 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x0, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0_str) +80003f00: 000ba383 lw x7,0(x23) +80003f04: 00038863 beq x7,x0,80003f14 +80003f08: 6100146f jal x8,80005518 +80003f0c: 80003efc .word 0x80003efc +80003f10: 8000f3fe .word 0x8000f3fe +80003f14: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x45893b2d +80003f18: 00052083 lw x1,0(x10) +80003f1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xb9753f22 +80003f20: 00052083 lw x1,0(x10) +80003f24: 00450513 addi x10,x10,4 + +80003f28 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1: + xperm8 x1, x1, x1 # perform operation +80003f28: 2810c0b3 xperm8 x1,x1,x1 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1_str) +80003f2c: 000ba383 lw x7,0(x23) +80003f30: 00138863 beq x7,x1,80003f40 +80003f34: 5e40146f jal x8,80005518 +80003f38: 80003f28 .word 0x80003f28 +80003f3c: 8000f43b .word 0x8000f43b +80003f40: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x09970c81 +80003f44: 00052103 lw x2,0(x10) +80003f48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xbf95993e +80003f4c: 00052103 lw x2,0(x10) +80003f50: 00450513 addi x10,x10,4 + +80003f54 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2: + xperm8 x2, x2, x2 # perform operation +80003f54: 28214133 xperm8 x2,x2,x2 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2_str) +80003f58: 000ba383 lw x7,0(x23) +80003f5c: 00238863 beq x7,x2,80003f6c +80003f60: 5b80146f jal x8,80005518 +80003f64: 80003f54 .word 0x80003f54 +80003f68: 8000f478 .word 0x8000f478 +80003f6c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x16089f07 +80003f70: 00052183 lw x3,0(x10) +80003f74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x041b0853 +80003f78: 00052183 lw x3,0(x10) +80003f7c: 00450513 addi x10,x10,4 + +80003f80 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3: + xperm8 x3, x3, x3 # perform operation +80003f80: 2831c1b3 xperm8 x3,x3,x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3_str) +80003f84: 000ba383 lw x7,0(x23) +80003f88: 00338863 beq x7,x3,80003f98 +80003f8c: 58c0146f jal x8,80005518 +80003f90: 80003f80 .word 0x80003f80 +80003f94: 8000f4b5 .word 0x8000f4b5 +80003f98: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x22b52b97 +80003f9c: 00052203 lw x4,0(x10) +80003fa0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x4cc8c91d +80003fa4: 00052203 lw x4,0(x10) +80003fa8: 00450513 addi x10,x10,4 + +80003fac : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4: + xperm8 x4, x4, x4 # perform operation +80003fac: 28424233 xperm8 x4,x4,x4 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4_str) +80003fb0: 000ba383 lw x7,0(x23) +80003fb4: 00438863 beq x7,x4,80003fc4 +80003fb8: 5600146f jal x8,80005518 +80003fbc: 80003fac .word 0x80003fac +80003fc0: 8000f4f2 .word 0x8000f4f2 +80003fc4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xd4e08527 +80003fc8: 00052283 lw x5,0(x10) +80003fcc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x8f19e36e +80003fd0: 00052283 lw x5,0(x10) +80003fd4: 00450513 addi x10,x10,4 + +80003fd8 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5: + xperm8 x5, x5, x5 # perform operation +80003fd8: 2852c2b3 xperm8 x5,x5,x5 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5_str) +80003fdc: 000ba383 lw x7,0(x23) +80003fe0: 00538863 beq x7,x5,80003ff0 +80003fe4: 5340146f jal x8,80005518 +80003fe8: 80003fd8 .word 0x80003fd8 +80003fec: 8000f52f .word 0x8000f52f +80003ff0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xb2c9ce81 +80003ff4: 00052303 lw x6,0(x10) +80003ff8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xc33f4c70 +80003ffc: 00052303 lw x6,0(x10) +80004000: 00450513 addi x10,x10,4 + +80004004 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6: + xperm8 x6, x6, x6 # perform operation +80004004: 28634333 xperm8 x6,x6,x6 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6_str) +80004008: 000ba383 lw x7,0(x23) +8000400c: 00638863 beq x7,x6,8000401c +80004010: 5080146f jal x8,80005518 +80004014: 80004004 .word 0x80004004 +80004018: 8000f56c .word 0x8000f56c +8000401c: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004020: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80004024: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x496e7e5f +80004028: 00052383 lw x7,0(x10) +8000402c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xac206740 +80004030: 00052383 lw x7,0(x10) +80004034: 00450513 addi x10,x10,4 + +80004038 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7: + xperm8 x7, x7, x7 # perform operation +80004038: 2873c3b3 xperm8 x7,x7,x7 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7_str) +8000403c: 000ba203 lw x4,0(x23) +80004040: 00720863 beq x4,x7,80004050 +80004044: 4bc012ef jal x5,80005500 +80004048: 80004038 .word 0x80004038 +8000404c: 8000f5a9 .word 0x8000f5a9 +80004050: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x3c9e39bf +80004054: 00052403 lw x8,0(x10) +80004058: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x4d93322c +8000405c: 00052403 lw x8,0(x10) +80004060: 00450513 addi x10,x10,4 + +80004064 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8: + xperm8 x8, x8, x8 # perform operation +80004064: 28844433 xperm8 x8,x8,x8 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8_str) +80004068: 000ba203 lw x4,0(x23) +8000406c: 00820863 beq x4,x8,8000407c +80004070: 490012ef jal x5,80005500 +80004074: 80004064 .word 0x80004064 +80004078: 8000f5e6 .word 0x8000f5e6 +8000407c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x217d69cf +80004080: 00052483 lw x9,0(x10) +80004084: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x4ed805eb +80004088: 00052483 lw x9,0(x10) +8000408c: 00450513 addi x10,x10,4 + +80004090 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9: + xperm8 x9, x9, x9 # perform operation +80004090: 2894c4b3 xperm8 x9,x9,x9 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9_str) +80004094: 000ba203 lw x4,0(x23) +80004098: 00920863 beq x4,x9,800040a8 +8000409c: 464012ef jal x5,80005500 +800040a0: 80004090 .word 0x80004090 +800040a4: 8000f623 .word 0x8000f623 +800040a8: 004b8b93 addi x23,x23,4 + + mv x16, x10 # switch data pointer register to avoid conflict with test +800040ac: 00050813 addi x16,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x849b7fca +800040b0: 00082503 lw x10,0(x16) +800040b4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x48d3fe51 +800040b8: 00082503 lw x10,0(x16) +800040bc: 00480813 addi x16,x16,4 + +800040c0 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10: + xperm8 x10, x10, x10 # perform operation +800040c0: 28a54533 xperm8 x10,x10,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10_str) +800040c4: 000ba203 lw x4,0(x23) +800040c8: 00a20863 beq x4,x10,800040d8 +800040cc: 434012ef jal x5,80005500 +800040d0: 800040c0 .word 0x800040c0 +800040d4: 8000f660 .word 0x8000f660 +800040d8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x4f212b9c +800040dc: 00082583 lw x11,0(x16) +800040e0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x6a8ca006 +800040e4: 00082583 lw x11,0(x16) +800040e8: 00480813 addi x16,x16,4 + +800040ec : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11: + xperm8 x11, x11, x11 # perform operation +800040ec: 28b5c5b3 xperm8 x11,x11,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11_str) +800040f0: 000ba203 lw x4,0(x23) +800040f4: 00b20863 beq x4,x11,80004104 +800040f8: 408012ef jal x5,80005500 +800040fc: 800040ec .word 0x800040ec +80004100: 8000f69e .word 0x8000f69e +80004104: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xd90ba56f +80004108: 00082603 lw x12,0(x16) +8000410c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x644bbaa8 +80004110: 00082603 lw x12,0(x16) +80004114: 00480813 addi x16,x16,4 + +80004118 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12: + xperm8 x12, x12, x12 # perform operation +80004118: 28c64633 xperm8 x12,x12,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12_str) +8000411c: 000ba203 lw x4,0(x23) +80004120: 00c20863 beq x4,x12,80004130 +80004124: 3dc012ef jal x5,80005500 +80004128: 80004118 .word 0x80004118 +8000412c: 8000f6dc .word 0x8000f6dc +80004130: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x766e6cd2 +80004134: 00082683 lw x13,0(x16) +80004138: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xf04239f9 +8000413c: 00082683 lw x13,0(x16) +80004140: 00480813 addi x16,x16,4 + +80004144 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13: + xperm8 x13, x13, x13 # perform operation +80004144: 28d6c6b3 xperm8 x13,x13,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13_str) +80004148: 000ba203 lw x4,0(x23) +8000414c: 00d20863 beq x4,x13,8000415c +80004150: 3b0012ef jal x5,80005500 +80004154: 80004144 .word 0x80004144 +80004158: 8000f71a .word 0x8000f71a +8000415c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xbb5a171c +80004160: 00082703 lw x14,0(x16) +80004164: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x6d76816b +80004168: 00082703 lw x14,0(x16) +8000416c: 00480813 addi x16,x16,4 + +80004170 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14: + xperm8 x14, x14, x14 # perform operation +80004170: 28e74733 xperm8 x14,x14,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14_str) +80004174: 000ba203 lw x4,0(x23) +80004178: 00e20863 beq x4,x14,80004188 +8000417c: 384012ef jal x5,80005500 +80004180: 80004170 .word 0x80004170 +80004184: 8000f758 .word 0x8000f758 +80004188: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x78795618 +8000418c: 00082783 lw x15,0(x16) +80004190: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x7d517a3d +80004194: 00082783 lw x15,0(x16) +80004198: 00480813 addi x16,x16,4 + +8000419c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15: + xperm8 x15, x15, x15 # perform operation +8000419c: 28f7c7b3 xperm8 x15,x15,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 000ba203 lw x4,0(x23) +800041a4: 00f20863 beq x4,x15,800041b4 +800041a8: 358012ef jal x5,80005500 +800041ac: 8000419c .word 0x8000419c +800041b0: 8000f796 .word 0x8000f796 +800041b4: 004b8b93 addi x23,x23,4 + + mv x15, x16 # switch data pointer register to avoid conflict with test +800041b8: 00080793 addi x15,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xd921b1dd +800041bc: 0007a803 lw x16,0(x15) +800041c0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xf8f91a9e +800041c4: 0007a803 lw x16,0(x15) +800041c8: 00478793 addi x15,x15,4 + +800041cc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16: + xperm8 x16, x16, x16 # perform operation +800041cc: 29084833 xperm8 x16,x16,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16_str) +800041d0: 000ba203 lw x4,0(x23) +800041d4: 01020863 beq x4,x16,800041e4 +800041d8: 328012ef jal x5,80005500 +800041dc: 800041cc .word 0x800041cc +800041e0: 8000f7d4 .word 0x8000f7d4 +800041e4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaf022def +800041e8: 0007a883 lw x17,0(x15) +800041ec: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xfe9ee97d +800041f0: 0007a883 lw x17,0(x15) +800041f4: 00478793 addi x15,x15,4 + +800041f8 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17: + xperm8 x17, x17, x17 # perform operation +800041f8: 2918c8b3 xperm8 x17,x17,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17_str) +800041fc: 000ba203 lw x4,0(x23) +80004200: 01120863 beq x4,x17,80004210 +80004204: 2fc012ef jal x5,80005500 +80004208: 800041f8 .word 0x800041f8 +8000420c: 8000f812 .word 0x8000f812 +80004210: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xd97cedab +80004214: 0007a903 lw x18,0(x15) +80004218: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x5ed362eb +8000421c: 0007a903 lw x18,0(x15) +80004220: 00478793 addi x15,x15,4 + +80004224 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18: + xperm8 x18, x18, x18 # perform operation +80004224: 29294933 xperm8 x18,x18,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18_str) +80004228: 000ba203 lw x4,0(x23) +8000422c: 01220863 beq x4,x18,8000423c +80004230: 2d0012ef jal x5,80005500 +80004234: 80004224 .word 0x80004224 +80004238: 8000f850 .word 0x8000f850 +8000423c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x2a50fe05 +80004240: 0007a983 lw x19,0(x15) +80004244: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x85cad9b3 +80004248: 0007a983 lw x19,0(x15) +8000424c: 00478793 addi x15,x15,4 + +80004250 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19: + xperm8 x19, x19, x19 # perform operation +80004250: 2939c9b3 xperm8 x19,x19,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19_str) +80004254: 000ba203 lw x4,0(x23) +80004258: 01320863 beq x4,x19,80004268 +8000425c: 2a4012ef jal x5,80005500 +80004260: 80004250 .word 0x80004250 +80004264: 8000f88e .word 0x8000f88e +80004268: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x276885e4 +8000426c: 0007aa03 lw x20,0(x15) +80004270: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x674873b7 +80004274: 0007aa03 lw x20,0(x15) +80004278: 00478793 addi x15,x15,4 + +8000427c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20: + xperm8 x20, x20, x20 # perform operation +8000427c: 294a4a33 xperm8 x20,x20,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20_str) +80004280: 000ba203 lw x4,0(x23) +80004284: 01420863 beq x4,x20,80004294 +80004288: 278012ef jal x5,80005500 +8000428c: 8000427c .word 0x8000427c +80004290: 8000f8cc .word 0x8000f8cc +80004294: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x9f8e114e +80004298: 0007aa83 lw x21,0(x15) +8000429c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x791f9e86 +800042a0: 0007aa83 lw x21,0(x15) +800042a4: 00478793 addi x15,x15,4 + +800042a8 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21: + xperm8 x21, x21, x21 # perform operation +800042a8: 295acab3 xperm8 x21,x21,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21_str) +800042ac: 000ba203 lw x4,0(x23) +800042b0: 01520863 beq x4,x21,800042c0 +800042b4: 24c012ef jal x5,80005500 +800042b8: 800042a8 .word 0x800042a8 +800042bc: 8000f90a .word 0x8000f90a +800042c0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0xfcee11bf +800042c4: 0007ab03 lw x22,0(x15) +800042c8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xdd86cb65 +800042cc: 0007ab03 lw x22,0(x15) +800042d0: 00478793 addi x15,x15,4 + +800042d4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22: + xperm8 x22, x22, x22 # perform operation +800042d4: 296b4b33 xperm8 x22,x22,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22_str) +800042d8: 000ba203 lw x4,0(x23) +800042dc: 01620863 beq x4,x22,800042ec +800042e0: 220012ef jal x5,80005500 +800042e4: 800042d4 .word 0x800042d4 +800042e8: 8000f948 .word 0x8000f948 +800042ec: 004b8b93 addi x23,x23,4 + + mv x11, x23 # switch signature pointer register to avoid conflict with test +800042f0: 000b8593 addi x11,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x5fbf16e7 +800042f4: 0007ab83 lw x23,0(x15) +800042f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x1b1c720c +800042fc: 0007ab83 lw x23,0(x15) +80004300: 00478793 addi x15,x15,4 + +80004304 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23: + xperm8 x23, x23, x23 # perform operation +80004304: 297bcbb3 xperm8 x23,x23,x23 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 0005a203 lw x4,0(x11) +8000430c: 01720863 beq x4,x23,8000431c +80004310: 1f0012ef jal x5,80005500 +80004314: 80004304 .word 0x80004304 +80004318: 8000f986 .word 0x8000f986 +8000431c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x3da35121 +80004320: 0007ac03 lw x24,0(x15) +80004324: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xeb616e55 +80004328: 0007ac03 lw x24,0(x15) +8000432c: 00478793 addi x15,x15,4 + +80004330 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24: + xperm8 x24, x24, x24 # perform operation +80004330: 298c4c33 xperm8 x24,x24,x24 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 0005a203 lw x4,0(x11) +80004338: 01820863 beq x4,x24,80004348 +8000433c: 1c4012ef jal x5,80005500 +80004340: 80004330 .word 0x80004330 +80004344: 8000f9c4 .word 0x8000f9c4 +80004348: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x2aec27ce +8000434c: 0007ac83 lw x25,0(x15) +80004350: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xbba8864a +80004354: 0007ac83 lw x25,0(x15) +80004358: 00478793 addi x15,x15,4 + +8000435c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25: + xperm8 x25, x25, x25 # perform operation +8000435c: 299cccb3 xperm8 x25,x25,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 0005a203 lw x4,0(x11) +80004364: 01920863 beq x4,x25,80004374 +80004368: 198012ef jal x5,80005500 +8000436c: 8000435c .word 0x8000435c +80004370: 8000fa02 .word 0x8000fa02 +80004374: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x3ab03dcd +80004378: 0007ad03 lw x26,0(x15) +8000437c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x529c9579 +80004380: 0007ad03 lw x26,0(x15) +80004384: 00478793 addi x15,x15,4 + +80004388 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26: + xperm8 x26, x26, x26 # perform operation +80004388: 29ad4d33 xperm8 x26,x26,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 0005a203 lw x4,0(x11) +80004390: 01a20863 beq x4,x26,800043a0 +80004394: 16c012ef jal x5,80005500 +80004398: 80004388 .word 0x80004388 +8000439c: 8000fa40 .word 0x8000fa40 +800043a0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x8e76181a +800043a4: 0007ad83 lw x27,0(x15) +800043a8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x8d26ce9c +800043ac: 0007ad83 lw x27,0(x15) +800043b0: 00478793 addi x15,x15,4 + +800043b4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27: + xperm8 x27, x27, x27 # perform operation +800043b4: 29bdcdb3 xperm8 x27,x27,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27_str) +800043b8: 0005a203 lw x4,0(x11) +800043bc: 01b20863 beq x4,x27,800043cc +800043c0: 140012ef jal x5,80005500 +800043c4: 800043b4 .word 0x800043b4 +800043c8: 8000fa7e .word 0x8000fa7e +800043cc: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7d6bf1fb +800043d0: 0007ae03 lw x28,0(x15) +800043d4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x2ef15907 +800043d8: 0007ae03 lw x28,0(x15) +800043dc: 00478793 addi x15,x15,4 + +800043e0 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28: + xperm8 x28, x28, x28 # perform operation +800043e0: 29ce4e33 xperm8 x28,x28,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28_str) +800043e4: 0005a203 lw x4,0(x11) +800043e8: 01c20863 beq x4,x28,800043f8 +800043ec: 114012ef jal x5,80005500 +800043f0: 800043e0 .word 0x800043e0 +800043f4: 8000fabc .word 0x8000fabc +800043f8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x3c702147 +800043fc: 0007ae83 lw x29,0(x15) +80004400: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xa5ef0378 +80004404: 0007ae83 lw x29,0(x15) +80004408: 00478793 addi x15,x15,4 + +8000440c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29: + xperm8 x29, x29, x29 # perform operation +8000440c: 29deceb3 xperm8 x29,x29,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29_str) +80004410: 0005a203 lw x4,0(x11) +80004414: 01d20863 beq x4,x29,80004424 +80004418: 0e8012ef jal x5,80005500 +8000441c: 8000440c .word 0x8000440c +80004420: 8000fafa .word 0x8000fafa +80004424: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xffae61e3 +80004428: 0007af03 lw x30,0(x15) +8000442c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x98d61595 +80004430: 0007af03 lw x30,0(x15) +80004434: 00478793 addi x15,x15,4 + +80004438 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30: + xperm8 x30, x30, x30 # perform operation +80004438: 29ef4f33 xperm8 x30,x30,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30_str) +8000443c: 0005a203 lw x4,0(x11) +80004440: 01e20863 beq x4,x30,80004450 +80004444: 0bc012ef jal x5,80005500 +80004448: 80004438 .word 0x80004438 +8000444c: 8000fb38 .word 0x8000fb38 +80004450: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xfc52fe04 +80004454: 0007af83 lw x31,0(x15) +80004458: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x4e9c2648 +8000445c: 0007af83 lw x31,0(x15) +80004460: 00478793 addi x15,x15,4 + +80004464 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31: + xperm8 x31, x31, x31 # perform operation +80004464: 29ffcfb3 xperm8 x31,x31,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31_str) +80004468: 0005a203 lw x4,0(x11) +8000446c: 01f20863 beq x4,x31,8000447c +80004470: 090012ef jal x5,80005500 +80004474: 80004464 .word 0x80004464 +80004478: 8000fb76 .word 0x8000fb76 +8000447c: 00458593 addi x11,x11,4 + + mv x2, x11 # restore signature pointer to default register for teardown +80004480: 00058113 addi x2,x11,0 + +80004484 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004484: 00000513 addi x10,x0,0 +80004488: 00000073 ecall +8000448c: fff00513 addi x10,x0,-1 +80004490: 1d800413 addi x8,x0,472 + +80004494 : +80004494: 34002373 csrrs x6,mscratch,x0 + +80004498 : +80004498: 23832383 lw x7,568(x6) +8000449c: 23c32483 lw x9,572(x6) + +800044a0 : +800044a0: 22032383 lw x7,544(x6) + +800044a4 : +800044a4: 25032483 lw x9,592(x6) +800044a8: 34049073 csrrw x0,mscratch,x9 + +800044ac : +800044ac: 24832483 lw x9,584(x6) +800044b0: 305493f3 csrrw x7,mtvec,x9 +800044b4: ffc4f493 andi x9,x9,-4 +800044b8: ffc3f393 andi x7,x7,-4 +800044bc: 00749e63 bne x9,x7,800044d8 + +800044c0 : +800044c0: 00030493 addi x9,x6,0 + +800044c4 : +800044c4: 0004a783 lw x15,0(x9) +800044c8: 00f3a023 sw x15,0(x7) +800044cc: 00438393 addi x7,x7,4 +800044d0: 00448493 addi x9,x9,4 +800044d4: fe83c8e3 blt x7,x8,800044c4 +800044d8: 0000100f fence.i + +800044dc : +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: d2050513 addi x10,x10,-736 # 80010240 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001d097 auipc x1,0x1d +80004544: 024080e7 jalr x1,36(x1) # 80021564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: d1b50513 addi x10,x10,-741 # 8001027b +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001d097 auipc x1,0x1d +80004584: fe4080e7 jalr x1,-28(x1) # 80021564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: d3b50513 addi x10,x10,-709 # 800102db +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001d097 auipc x1,0x1d +800045c4: fa4080e7 jalr x1,-92(x1) # 80021564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 8a650513 addi x10,x10,-1882 # 80010e86 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001d097 auipc x1,0x1d +80004604: f64080e7 jalr x1,-156(x1) # 80021564 +80004608: 0001d097 auipc x1,0x1d +8000460c: fbc080e7 jalr x1,-68(x1) # 800215c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 90838393 addi x7,x7,-1784 # 80011f68 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 8c040413 addi x8,x8,-1856 # 80011f60 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 8001042f .word 0x8001042f + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acebead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 8001029d .word 0x8001029d +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: b0450513 addi x10,x10,-1276 # 80010204 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001d097 auipc x1,0x1d +80004724: e44080e7 jalr x1,-444(x1) # 80021564 +80004728: 0001d097 auipc x1,0x1d +8000472c: e7c080e7 jalr x1,-388(x1) # 800215a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: b0050513 addi x10,x10,-1280 # 80010240 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001d097 auipc x1,0x1d +80004764: e04080e7 jalr x1,-508(x1) # 80021564 +80004768: 0001d097 auipc x1,0x1d +8000476c: e5c080e7 jalr x1,-420(x1) # 800215c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce5ff06f jal x0,80004484 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acebead> +800047ac: cd9ff06f jal x0,80004484 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7c30313 addi x6,x6,-1156 # 800044dc +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: d7d50513 addi x10,x10,-643 # 800118bd +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001d097 auipc x1,0x1d +80004b64: a04080e7 jalr x1,-1532(x1) # 80021564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000b517 auipc x10,0xb +80004b84: 1a850513 addi x10,x10,424 # 8000fd28 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001d097 auipc x1,0x1d +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80021564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000b517 auipc x10,0xb +80004bc4: 78450513 addi x10,x10,1924 # 80010344 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001d097 auipc x1,0x1d +80004be4: 984080e7 jalr x1,-1660(x1) # 80021564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000b517 auipc x10,0xb +80004c04: 64050513 addi x10,x10,1600 # 80010240 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001d097 auipc x1,0x1d +80004c24: 944080e7 jalr x1,-1724(x1) # 80021564 +80004c28: 0001d097 auipc x1,0x1d +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800215c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: d2848493 addi x9,x9,-728 # 8000fd08 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 9ac40413 addi x8,x8,-1620 # 800209cc +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010446 .word 0x80010446 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010548 .word 0x80010548 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010643 .word 0x80010643 +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010736 .word 0x80010736 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 800108a9 .word 0x800108a9 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80021000 .word 0x80021000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80021014 .word 0x80021014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80021030 .word 0x80021030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000a217 auipc x4,0xa +80005504: 6c020213 addi x4,x4,1728 # 8000fbc0 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000a397 auipc x7,0xa +8000551c: 6a838393 addi x7,x7,1704 # 8000fbc0 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000a697 auipc x13,0xa +80005544: 68068693 addi x13,x13,1664 # 8000fbc0 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000a497 auipc x9,0xa +8000556c: 65848493 addi x9,x9,1624 # 8000fbc0 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000a497 auipc x9,0xa +80005610: 5b44a483 lw x9,1460(x9) # 8000fbc0 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000c417 auipc x8,0xc +800056c4: 25040413 addi x8,x8,592 # 80011910 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001b417 auipc x8,0x1b +80005704: 2d040413 addi x8,x8,720 # 800209d0 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000a497 auipc x9,0xa +80005744: 5a848493 addi x9,x9,1448 # 8000fce8 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000a497 auipc x9,0xa +80005784: 56848493 addi x9,x9,1384 # 8000fce8 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000a817 auipc x16,0xa +800057b4: 54880813 addi x16,x16,1352 # 8000fcf8 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000a817 auipc x16,0xa +800057c8: 53480813 addi x16,x16,1332 # 8000fcf8 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: c5f38393 addi x7,x7,-929 # 8001042f +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000a817 auipc x16,0xa +800057e4: 51080813 addi x16,x16,1296 # 8000fcf0 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: c5a38393 addi x7,x7,-934 # 80010446 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: d4438393 addi x7,x7,-700 # 80010548 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: e2738393 addi x7,x7,-473 # 80010643 +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: f0238393 addi x7,x7,-254 # 80010736 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000b397 auipc x7,0xb +80005850: 05d38393 addi x7,x7,93 # 800108a9 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: fc938393 addi x7,x7,-55 # 8001082d +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: fef38393 addi x7,x7,-17 # 8001086b +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: bf238393 addi x7,x7,-1038 # 80010486 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: cda38393 addi x7,x7,-806 # 80010586 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: dbb38393 addi x7,x7,-581 # 8001067f +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: e9738393 addi x7,x7,-361 # 80010773 +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: ff038393 addi x7,x7,-16 # 800108e4 +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: bba38393 addi x7,x7,-1094 # 800104c6 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: ca038393 addi x7,x7,-864 # 800105c4 +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: d7f38393 addi x7,x7,-641 # 800106bb +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: e5c38393 addi x7,x7,-420 # 800107b0 +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: fb338393 addi x7,x7,-77 # 8001091f +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: b8338393 addi x7,x7,-1149 # 80010507 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: c6738393 addi x7,x7,-921 # 80010603 +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: d4438393 addi x7,x7,-700 # 800106f8 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: e2238393 addi x7,x7,-478 # 800107ee +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: f7738393 addi x7,x7,-137 # 8001095b +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: f9c38393 addi x7,x7,-100 # 80010998 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: fd338393 addi x7,x7,-45 # 800109e7 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000b397 auipc x7,0xb +80005a30: 0b638393 addi x7,x7,182 # 80010ae2 +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000b397 auipc x7,0xb +80005a48: 19a38393 addi x7,x7,410 # 80010bde +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000a817 auipc x16,0xa +80005a68: 28c80813 addi x16,x16,652 # 8000fcf0 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000a817 auipc x16,0xa +80005a78: 27c80813 addi x16,x16,636 # 8000fcf0 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000a817 auipc x16,0xa +80005a84: 27480813 addi x16,x16,628 # 8000fcf4 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000a817 auipc x16,0xa +80005a94: 26080813 addi x16,x16,608 # 8000fcf0 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000a517 auipc x10,0xa +80005ae4: 76050513 addi x10,x10,1888 # 80010240 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001c097 auipc x1,0x1c +80005b04: a64080e7 jalr x1,-1436(x1) # 80021564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000a517 auipc x10,0xa +80005b24: 75b50513 addi x10,x10,1883 # 8001027b +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001c097 auipc x1,0x1c +80005b44: a24080e7 jalr x1,-1500(x1) # 80021564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000a517 auipc x10,0xa +80005b64: 7d250513 addi x10,x10,2002 # 80010332 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001c097 auipc x1,0x1c +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 + +80005b88 : +80005b88: 0000a517 auipc x10,0xa +80005b8c: 15852503 lw x10,344(x10) # 8000fce0 +80005b90: 0001c097 auipc x1,0x1c +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80021564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000a517 auipc x10,0xa +80005ba4: 7a450513 addi x10,x10,1956 # 80010344 +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001c097 auipc x1,0x1c +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: ff852503 lw x10,-8(x10) # 8000fbc0 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000a517 auipc x10,0xa +80005be4: 76650513 addi x10,x10,1894 # 80010346 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001c097 auipc x1,0x1c +80005c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: 0b852503 lw x10,184(x10) # 8000fcc0 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000a517 auipc x10,0xa +80005c44: 0e850513 addi x10,x10,232 # 8000fd28 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001c097 auipc x1,0x1c +80005c64: 904080e7 jalr x1,-1788(x1) # 80021564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000a517 auipc x10,0xa +80005c84: 6da50513 addi x10,x10,1754 # 8001035a +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001c097 auipc x1,0x1c +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80021564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 02052503 lw x10,32(x10) # 8000fcc8 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000a517 auipc x10,0xa +80005cc4: 06850513 addi x10,x10,104 # 8000fd28 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001c097 auipc x1,0x1c +80005ce4: 884080e7 jalr x1,-1916(x1) # 80021564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000b517 auipc x10,0xb +80005d04: 09150513 addi x10,x10,145 # 80010d91 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001c097 auipc x1,0x1c +80005d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: e9852503 lw x10,-360(x10) # 8000fbc0 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: fe860613 addi x12,x12,-24 # 8000fd28 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: f5c52503 lw x10,-164(x10) # 8000fcc4 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000b517 auipc x10,0xb +80005da4: 10750513 addi x10,x10,263 # 80010ea7 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001b097 auipc x1,0x1b +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80021564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: f4860613 addi x12,x12,-184 # 8000fd28 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: ebc52503 lw x10,-324(x10) # 8000fcc4 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: f0860613 addi x12,x12,-248 # 8000fd28 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: e7c52503 lw x10,-388(x10) # 8000fcc4 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: f2a50513 addi x10,x10,-214 # 80010d8a +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001b097 auipc x1,0x1b +80005e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: e8850513 addi x10,x10,-376 # 8000fd28 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001b097 auipc x1,0x1b +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: ec250513 addi x10,x10,-318 # 80010da2 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001b097 auipc x1,0x1b +80005f04: 664080e7 jalr x1,1636(x1) # 80021564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: cb852503 lw x10,-840(x10) # 8000fbc0 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: db852503 lw x10,-584(x10) # 8000fcd0 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: da452503 lw x10,-604(x10) # 8000fcd0 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: de850513 addi x10,x10,-536 # 8000fd28 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001b097 auipc x1,0x1b +80005f64: 604080e7 jalr x1,1540(x1) # 80021564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: d8052503 lw x10,-640(x10) # 8000fce8 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: e3950513 addi x10,x10,-455 # 80010db9 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001b097 auipc x1,0x1b +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80021564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: c1852503 lw x10,-1000(x10) # 8000fbc0 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: d2052503 lw x10,-736(x10) # 8000fcd8 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: d0c52503 lw x10,-756(x10) # 8000fcd8 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: d4850513 addi x10,x10,-696 # 8000fd28 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001b097 auipc x1,0x1b +80006004: 564080e7 jalr x1,1380(x1) # 80021564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: db050513 addi x10,x10,-592 # 80010dd0 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001b097 auipc x1,0x1b +80006044: 524080e7 jalr x1,1316(x1) # 80021564 +80006048: 0000a517 auipc x10,0xa +8000604c: c9052503 lw x10,-880(x10) # 8000fcd8 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: cc850513 addi x10,x10,-824 # 8000fd28 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001b097 auipc x1,0x1b +80006084: 4e4080e7 jalr x1,1252(x1) # 80021564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: d8e50513 addi x10,x10,-626 # 80010e2e +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001b097 auipc x1,0x1b +800060c4: 4a4080e7 jalr x1,1188(x1) # 80021564 +800060c8: 0000a517 auipc x10,0xa +800060cc: c1052503 lw x10,-1008(x10) # 8000fcd8 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: c4850513 addi x10,x10,-952 # 8000fd28 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001b097 auipc x1,0x1b +80006104: 464080e7 jalr x1,1124(x1) # 80021564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: be442403 lw x8,-1052(x8) # 8000fcf0 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: db350513 addi x10,x10,-589 # 80010ed3 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001b097 auipc x1,0x1b +80006144: 424080e7 jalr x1,1060(x1) # 80021564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: d9f50513 addi x10,x10,-609 # 80010eff +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001b097 auipc x1,0x1b +80006184: 3e4080e7 jalr x1,996(x1) # 80021564 +80006188: 0000a817 auipc x16,0xa +8000618c: b7080813 addi x16,x16,-1168 # 8000fcf8 +80006190: 00082503 lw x10,0(x16) +80006194: 0001b097 auipc x1,0x1b +80006198: 3d0080e7 jalr x1,976(x1) # 80021564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000a517 auipc x10,0xa +800061a4: 1a450513 addi x10,x10,420 # 80010344 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001b097 auipc x1,0x1b +800061c4: 3a4080e7 jalr x1,932(x1) # 80021564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: d2f50513 addi x10,x10,-721 # 80010f0f +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001b097 auipc x1,0x1b +80006204: 364080e7 jalr x1,868(x1) # 80021564 +80006208: 0000a517 auipc x10,0xa +8000620c: ad052503 lw x10,-1328(x10) # 8000fcd8 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: b0850513 addi x10,x10,-1272 # 8000fd28 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001b097 auipc x1,0x1b +80006244: 324080e7 jalr x1,804(x1) # 80021564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: cda50513 addi x10,x10,-806 # 80010f3a +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001b097 auipc x1,0x1b +80006284: 2e4080e7 jalr x1,740(x1) # 80021564 +80006288: 0000a517 auipc x10,0xa +8000628c: a4852503 lw x10,-1464(x10) # 8000fcd0 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: a8850513 addi x10,x10,-1400 # 8000fd28 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001b097 auipc x1,0x1b +800062c4: 2a4080e7 jalr x1,676(x1) # 80021564 +800062c8: 0000a317 auipc x6,0xa +800062cc: a0832303 lw x6,-1528(x6) # 8000fcd0 +800062d0: 0000a397 auipc x7,0xa +800062d4: a083a383 lw x7,-1528(x7) # 8000fcd8 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: c8950513 addi x10,x10,-887 # 80010f69 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001b097 auipc x1,0x1b +80006304: 264080e7 jalr x1,612(x1) # 80021564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: cb150513 addi x10,x10,-847 # 80010fd1 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001b097 auipc x1,0x1b +80006344: 224080e7 jalr x1,548(x1) # 80021564 +80006348: 0000a317 auipc x6,0xa +8000634c: 98832303 lw x6,-1656(x6) # 8000fcd0 +80006350: 0000a397 auipc x7,0xa +80006354: 9883a383 lw x7,-1656(x7) # 8000fcd8 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 9a850513 addi x10,x10,-1624 # 8000fd28 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001b097 auipc x1,0x1b +800063a4: 1c4080e7 jalr x1,452(x1) # 80021564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: c3850513 addi x10,x10,-968 # 80010ff8 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001b097 auipc x1,0x1b +800063e4: 184080e7 jalr x1,388(x1) # 80021564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: b9550513 addi x10,x10,-1131 # 80010f95 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001b097 auipc x1,0x1b +80006424: 144080e7 jalr x1,324(x1) # 80021564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: b9150513 addi x10,x10,-1135 # 80010fd1 +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001b097 auipc x1,0x1b +80006464: 104080e7 jalr x1,260(x1) # 80021564 +80006468: 0000a317 auipc x6,0xa +8000646c: 87032303 lw x6,-1936(x6) # 8000fcd8 +80006470: 0000a397 auipc x7,0xa +80006474: 8603a383 lw x7,-1952(x7) # 8000fcd0 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 88850513 addi x10,x10,-1912 # 8000fd28 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001b097 auipc x1,0x1b +800064c4: 0a4080e7 jalr x1,164(x1) # 80021564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: c0050513 addi x10,x10,-1024 # 800110e0 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001b097 auipc x1,0x1b +80006504: 064080e7 jalr x1,100(x1) # 80021564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: ca750513 addi x10,x10,-857 # 800111c7 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001b097 auipc x1,0x1b +80006544: 024080e7 jalr x1,36(x1) # 80021564 +80006548: 00009517 auipc x10,0x9 +8000654c: 7ac52503 lw x10,1964(x10) # 8000fcf4 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: c8350513 addi x10,x10,-893 # 80011203 +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: c2150513 addi x10,x10,-991 # 800111e1 +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: be950513 addi x10,x10,-1047 # 800111e9 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: bb150513 addi x10,x10,-1103 # 800111f1 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: b7a50513 addi x10,x10,-1158 # 800111fa +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001b097 auipc x1,0x1b +800066a4: ec4080e7 jalr x1,-316(x1) # 80021564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: b4c50513 addi x10,x10,-1204 # 8001120c +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001b097 auipc x1,0x1b +800066e4: e84080e7 jalr x1,-380(x1) # 80021564 +800066e8: 00009517 auipc x10,0x9 +800066ec: 60852503 lw x10,1544(x10) # 8000fcf0 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: c2350513 addi x10,x10,-989 # 80011363 +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: aa650513 addi x10,x10,-1370 # 80011226 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: a9750513 addi x10,x10,-1385 # 80011257 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: a7750513 addi x10,x10,-1417 # 80011277 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: a5550513 addi x10,x10,-1451 # 80011295 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: a3450513 addi x10,x10,-1484 # 800112b4 +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: a1c50513 addi x10,x10,-1508 # 800112dc +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: a0850513 addi x10,x10,-1528 # 80011308 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 9f450513 addi x10,x10,-1548 # 80011334 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001b097 auipc x1,0x1b +80006964: c04080e7 jalr x1,-1020(x1) # 80021564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 9f250513 addi x10,x10,-1550 # 80011372 +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001b097 auipc x1,0x1b +800069a4: bc4080e7 jalr x1,-1084(x1) # 80021564 +800069a8: 00009517 auipc x10,0x9 +800069ac: 33052503 lw x10,816(x10) # 8000fcd8 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 00009517 auipc x10,0x9 +800069c4: 36850513 addi x10,x10,872 # 8000fd28 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001b097 auipc x1,0x1b +800069e4: b84080e7 jalr x1,-1148(x1) # 80021564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 98950513 addi x10,x10,-1655 # 80011389 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001b097 auipc x1,0x1b +80006a24: b44080e7 jalr x1,-1212(x1) # 80021564 +80006a28: 00009517 auipc x10,0x9 +80006a2c: 2a852503 lw x10,680(x10) # 8000fcd0 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 00009517 auipc x10,0x9 +80006a44: 2e850513 addi x10,x10,744 # 8000fd28 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001b097 auipc x1,0x1b +80006a64: b04080e7 jalr x1,-1276(x1) # 80021564 +80006a68: 00009517 auipc x10,0x9 +80006a6c: 28852503 lw x10,648(x10) # 8000fcf0 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 92050513 addi x10,x10,-1760 # 800113a0 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001b097 auipc x1,0x1b +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80021564 +80006aa8: 00009517 auipc x10,0x9 +80006aac: 23052503 lw x10,560(x10) # 8000fcd8 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001b097 auipc x1,0x1b +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80021564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 8f750513 addi x10,x10,-1801 # 800113b7 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001b097 auipc x1,0x1b +80006ae4: a84080e7 jalr x1,-1404(x1) # 80021564 +80006ae8: 00009517 auipc x10,0x9 +80006aec: 1e852503 lw x10,488(x10) # 8000fcd0 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001b097 auipc x1,0x1b +80006af8: a70080e7 jalr x1,-1424(x1) # 80021564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 00009517 auipc x10,0x9 +80006b08: 1ec52503 lw x10,492(x10) # 8000fcf0 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 90d50513 addi x10,x10,-1779 # 8001142d +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001b097 auipc x1,0x1b +80006b44: a24080e7 jalr x1,-1500(x1) # 80021564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 9a350513 addi x10,x10,-1629 # 80011503 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001b097 auipc x1,0x1b +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80021564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: a5650513 addi x10,x10,-1450 # 800115f6 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001b097 auipc x1,0x1b +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80021564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: b1150513 addi x10,x10,-1263 # 800116f1 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001b097 auipc x1,0x1b +80006c04: 964080e7 jalr x1,-1692(x1) # 80021564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: bb850513 addi x10,x10,-1096 # 800117d8 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001b097 auipc x1,0x1b +80006c44: 924080e7 jalr x1,-1756(x1) # 80021564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000a517 auipc x10,0xa +80006c64: 78550513 addi x10,x10,1925 # 800113e5 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001b097 auipc x1,0x1b +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80021564 +80006c88: 00009617 auipc x12,0x9 +80006c8c: 08062603 lw x12,128(x12) # 8000fd08 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 00009517 auipc x10,0x9 +80006ca4: 72e50513 addi x10,x10,1838 # 800103ce +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001b097 auipc x1,0x1b +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80021564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 02850513 addi x10,x10,40 # 8000fd28 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001b097 auipc x1,0x1b +80006d24: 844080e7 jalr x1,-1980(x1) # 80021564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 01058593 addi x11,x11,16 # 8000fd50 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 04458593 addi x11,x11,68 # 8000fdb0 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 00009517 auipc x10,0x9 +80006da4: 44e50513 addi x10,x10,1102 # 800101ee +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: 0a650513 addi x10,x10,166 # 80010e86 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001a097 auipc x1,0x1a +80006e04: 764080e7 jalr x1,1892(x1) # 80021564 + +80006e08 : +80006e08: 0001a097 auipc x1,0x1a +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800215c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: ef060613 addi x12,x12,-272 # 8000fd00 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 00009517 auipc x10,0x9 +80006e24: 5cf50513 addi x10,x10,1487 # 800103ef +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001a097 auipc x1,0x1a +80006e44: 724080e7 jalr x1,1828(x1) # 80021564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: ec052503 lw x10,-320(x10) # 8000fd08 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: ec850513 addi x10,x10,-312 # 8000fd28 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001a097 auipc x1,0x1a +80006e84: 6e4080e7 jalr x1,1764(x1) # 80021564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 55f50513 addi x10,x10,1375 # 800103ff +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001a097 auipc x1,0x1a +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80021564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: e4852503 lw x10,-440(x10) # 8000fd10 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: e4850513 addi x10,x10,-440 # 8000fd28 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001a097 auipc x1,0x1a +80006f04: 664080e7 jalr x1,1636(x1) # 80021564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 4ef50513 addi x10,x10,1263 # 8001040f +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001a097 auipc x1,0x1a +80006f44: 624080e7 jalr x1,1572(x1) # 80021564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: dd052503 lw x10,-560(x10) # 8000fd18 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: dc850513 addi x10,x10,-568 # 8000fd28 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001a097 auipc x1,0x1a +80006f84: 5e4080e7 jalr x1,1508(x1) # 80021564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 47f50513 addi x10,x10,1151 # 8001041f +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001a097 auipc x1,0x1a +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80021564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: d5852503 lw x10,-680(x10) # 8000fd20 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: d4850513 addi x10,x10,-696 # 8000fd28 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001a097 auipc x1,0x1a +80007004: 564080e7 jalr x1,1380(x1) # 80021564 +80007008: 00009617 auipc x12,0x9 +8000700c: cf860613 addi x12,x12,-776 # 8000fd00 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: d0860613 addi x12,x12,-760 # 8000fd28 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80021000 : +80021000: 10010737 lui x14,0x10010 +80021004: 00072023 sw x0,0(x14) # 10010000 +80021008: fffe4397 auipc x7,0xfffe4 +8002100c: 1f838393 addi x7,x7,504 # 80005200 +80021010: 00038067 jalr x0,0(x7) + +80021014 : +80021014: fff00713 addi x14,x0,-1 +80021018: 100143b7 lui x7,0x10014 +8002101c: 00e3a023 sw x14,0(x7) # 10014000 +80021020: 00e3a223 sw x14,4(x7) +80021024: fffe4397 auipc x7,0xfffe4 +80021028: 1dc38393 addi x7,x7,476 # 80005200 +8002102c: 00038067 jalr x0,0(x7) + +80021030 : +80021030: 10000737 lui x14,0x10000 +80021034: 01070713 addi x14,x14,16 # 10000010 +80021038: 00070023 sb x0,0(x14) +8002103c: fffe4397 auipc x7,0xfffe4 +80021040: 1c438393 addi x7,x7,452 # 80005200 +80021044: 00038067 jalr x0,0(x7) + +80021048 : +80021048: 00200393 addi x7,x0,2 +8002104c: 3443b073 csrrc x0,mip,x7 +80021050: fffe4397 auipc x7,0xfffe4 +80021054: 1b038393 addi x7,x7,432 # 80005200 +80021058: 00038067 jalr x0,0(x7) + +8002105c : +8002105c: fffe4397 auipc x7,0xfffe4 +80021060: 1a438393 addi x7,x7,420 # 80005200 +80021064: 00038067 jalr x0,0(x7) + +80021068 : +80021068: 20000413 addi x8,x0,512 +8002106c: 34443073 csrrc x0,mip,x8 +80021070: 34402473 csrrs x8,mip,x0 +80021074: 00001337 lui x6,0x1 +80021078: 80030313 addi x6,x6,-2048 # 800 +8002107c: 00647433 and x8,x8,x6 +80021080: 00830863 beq x6,x8,80021090 +80021084: 10000737 lui x14,0x10000 +80021088: 01870713 addi x14,x14,24 # 10000018 +8002108c: 00070023 sb x0,0(x14) +80021090: fffe4397 auipc x7,0xfffe4 +80021094: 17038393 addi x7,x7,368 # 80005200 +80021098: 00038067 jalr x0,0(x7) + +8002109c : +8002109c: fffe3317 auipc x6,0xfffe3 +800210a0: 3e830313 addi x6,x6,1000 # 80004484 +800210a4: 00030067 jalr x0,0(x6) +800210a8: fffe4397 auipc x7,0xfffe4 +800210ac: 15838393 addi x7,x7,344 # 80005200 +800210b0: 00038067 jalr x0,0(x7) + +800210b4 : +800210b4: fffe3317 auipc x6,0xfffe3 +800210b8: 3d030313 addi x6,x6,976 # 80004484 +800210bc: 00030067 jalr x0,0(x6) +800210c0: fffe4397 auipc x7,0xfffe4 +800210c4: 14038393 addi x7,x7,320 # 80005200 +800210c8: 00038067 jalr x0,0(x7) + +800210cc : +800210cc: fffe3317 auipc x6,0xfffe3 +800210d0: 3b830313 addi x6,x6,952 # 80004484 +800210d4: 00030067 jalr x0,0(x6) +800210d8: fffe4397 auipc x7,0xfffe4 +800210dc: 12838393 addi x7,x7,296 # 80005200 +800210e0: 00038067 jalr x0,0(x7) + +800210e4 : +800210e4: 30401073 csrrw x0,mie,x0 +800210e8: 34401073 csrrw x0,mip,x0 +800210ec: 34101073 csrrw x0,mepc,x0 +800210f0: 34301073 csrrw x0,mtval,x0 +800210f4: 34201073 csrrw x0,mcause,x0 +800210f8: 00000013 addi x0,x0,0 +800210fc: 00000013 addi x0,x0,0 +80021100: fffe7317 auipc x6,0xfffe7 +80021104: 01030313 addi x6,x6,16 # 80008110 +80021108: 00000013 addi x0,x0,0 +8002110c: 00000013 addi x0,x0,0 +80021110: 00000013 addi x0,x0,0 +80021114: 00000013 addi x0,x0,0 +80021118: 00000013 addi x0,x0,0 +8002111c: 00000013 addi x0,x0,0 + +80021120 : +80021120: 34031473 csrrw x8,mscratch,x6 +80021124: 24832823 sw x8,592(x6) + +80021128 : +80021128: fff00393 addi x7,x0,-1 +8002112c: 100144b7 lui x9,0x10014 +80021130: 0074a023 sw x7,0(x9) # 10014000 +80021134: 0074a223 sw x7,4(x9) +80021138: 00000013 addi x0,x0,0 + +8002113c : +8002113c: 00000393 addi x7,x0,0 +80021140: 22732c23 sw x7,568(x6) + +80021144 : +80021144: 30502473 csrrs x8,mtvec,x0 +80021148: 24832423 sw x8,584(x6) +8002114c: 00347393 andi x7,x8,3 +80021150: ffc3f393 andi x7,x7,-4 +80021154: 23032483 lw x9,560(x6) +80021158: e2848493 addi x9,x9,-472 +8002115c: 0074e3b3 or x7,x9,x7 +80021160: 24732023 sw x7,576(x6) +80021164: 30539073 csrrw x0,mtvec,x7 +80021168: 30502773 csrrs x14,mtvec,x0 +8002116c: 0e770c63 beq x14,x7,80021264 +80021170: 30541073 csrrw x0,mtvec,x8 +80021174: 0a040863 beq x8,x0,80021224 +80021178: 24832023 sw x8,576(x6) + +8002117c : +8002117c: ffc47393 andi x7,x8,-4 +80021180: 1d838413 addi x8,x7,472 +80021184: 00030113 addi x2,x6,0 +80021188: 00000013 addi x0,x0,0 +8002118c: 00000013 addi x0,x0,0 +80021190: 00000013 addi x0,x0,0 +80021194: 00000013 addi x0,x0,0 +80021198: 00000013 addi x0,x0,0 +8002119c: 00000013 addi x0,x0,0 +800211a0: 00000717 auipc x14,0x0 +800211a4: 04c70713 addi x14,x14,76 # 800211ec +800211a8: 00000013 addi x0,x0,0 +800211ac: 00000013 addi x0,x0,0 +800211b0: 00000013 addi x0,x0,0 +800211b4: 00000013 addi x0,x0,0 +800211b8: 00000013 addi x0,x0,0 +800211bc: 00000013 addi x0,x0,0 +800211c0: 00000797 auipc x15,0x0 +800211c4: 0a478793 addi x15,x15,164 # 80021264 +800211c8: 00000013 addi x0,x0,0 +800211cc: 00000013 addi x0,x0,0 +800211d0: 00000013 addi x0,x0,0 +800211d4: 00000013 addi x0,x0,0 +800211d8: 00000013 addi x0,x0,0 +800211dc: 00000013 addi x0,x0,0 +800211e0: 00f3f663 bgeu x7,x15,800211ec +800211e4: 00877463 bgeu x14,x8,800211ec +800211e8: 03c0006f jal x0,80021224 + +800211ec : +800211ec: 0003a783 lw x15,0(x7) +800211f0: 00f32023 sw x15,0(x6) +800211f4: 0004a703 lw x14,0(x9) +800211f8: 00e3a023 sw x14,0(x7) +800211fc: 0003a783 lw x15,0(x7) +80021200: 00e79a63 bne x15,x14,80021214 +80021204: 00438393 addi x7,x7,4 +80021208: 00430313 addi x6,x6,4 +8002120c: 00448493 addi x9,x9,4 +80021210: fc741ee3 bne x8,x7,800211ec + +80021214 : +80021214: 0000100f fence.i +80021218: 34002373 csrrs x6,mscratch,x0 +8002121c: 22932823 sw x9,560(x6) +80021220: 04740263 beq x8,x7,80021264 + +80021224 : +80021224: 00038413 addi x8,x7,0 +80021228: 00000013 addi x0,x0,0 +8002122c: 00000013 addi x0,x0,0 +80021230: 00000013 addi x0,x0,0 +80021234: 00000013 addi x0,x0,0 +80021238: 00000013 addi x0,x0,0 +8002123c: 00000013 addi x0,x0,0 +80021240: fffe3797 auipc x15,0xfffe3 +80021244: 25478793 addi x15,x15,596 # 80004494 +80021248: 00000013 addi x0,x0,0 +8002124c: 00000013 addi x0,x0,0 +80021250: 00000013 addi x0,x0,0 +80021254: 00000013 addi x0,x0,0 +80021258: 00000013 addi x0,x0,0 +8002125c: 00000013 addi x0,x0,0 +80021260: 00078067 jalr x0,0(x15) + +80021264 : +80021264: 00000013 addi x0,x0,0 + +80021268 : +80021268: 000022b7 lui x5,0x2 +8002126c: 80028293 addi x5,x5,-2048 # 1800 +80021270: 30029073 csrrw x0,mstatus,x5 +80021274: 31001073 csrrw x0,0x310,x0 +80021278: 32001073 csrrw x0,mcountinhibit,x0 +8002127c: 32301073 csrrw x0,mhpmevent3,x0 +80021280: 32401073 csrrw x0,mhpmevent4,x0 +80021284: 32501073 csrrw x0,mhpmevent5,x0 +80021288: 32601073 csrrw x0,mhpmevent6,x0 +8002128c: 32701073 csrrw x0,mhpmevent7,x0 +80021290: 32801073 csrrw x0,mhpmevent8,x0 +80021294: 32901073 csrrw x0,mhpmevent9,x0 +80021298: 32a01073 csrrw x0,mhpmevent10,x0 +8002129c: 32b01073 csrrw x0,mhpmevent11,x0 +800212a0: 32c01073 csrrw x0,mhpmevent12,x0 +800212a4: 32d01073 csrrw x0,mhpmevent13,x0 +800212a8: 32e01073 csrrw x0,mhpmevent14,x0 +800212ac: 32f01073 csrrw x0,mhpmevent15,x0 +800212b0: 33001073 csrrw x0,mhpmevent16,x0 +800212b4: 33101073 csrrw x0,mhpmevent17,x0 +800212b8: 33201073 csrrw x0,mhpmevent18,x0 +800212bc: 33301073 csrrw x0,mhpmevent19,x0 +800212c0: 33401073 csrrw x0,mhpmevent20,x0 +800212c4: 33501073 csrrw x0,mhpmevent21,x0 +800212c8: 33601073 csrrw x0,mhpmevent22,x0 +800212cc: 33701073 csrrw x0,mhpmevent23,x0 +800212d0: 33801073 csrrw x0,mhpmevent24,x0 +800212d4: 33901073 csrrw x0,mhpmevent25,x0 +800212d8: 33a01073 csrrw x0,mhpmevent26,x0 +800212dc: 33b01073 csrrw x0,mhpmevent27,x0 +800212e0: 33c01073 csrrw x0,mhpmevent28,x0 +800212e4: 33d01073 csrrw x0,mhpmevent29,x0 +800212e8: 33e01073 csrrw x0,mhpmevent30,x0 +800212ec: 33f01073 csrrw x0,mhpmevent31,x0 +800212f0: 00000013 addi x0,x0,0 +800212f4: 00000013 addi x0,x0,0 +800212f8: 00000013 addi x0,x0,0 +800212fc: 00000013 addi x0,x0,0 +80021300: fffe7317 auipc x6,0xfffe7 +80021304: e0830313 addi x6,x6,-504 # 80008108 +80021308: 00000013 addi x0,x0,0 +8002130c: 00000013 addi x0,x0,0 +80021310: 00000013 addi x0,x0,0 +80021314: 00000013 addi x0,x0,0 +80021318: 00000013 addi x0,x0,0 +8002131c: 00000013 addi x0,x0,0 +80021320: 00032023 sw x0,0(x6) + +80021324 : +80021324: feedc0b7 lui x1,0xfeedc +80021328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb9ead> +8002132c: 01909793 slli x15,x1,0x19 +80021330: 0070d113 srli x2,x1,0x7 +80021334: 00f16133 or x2,x2,x15 +80021338: 01911793 slli x15,x2,0x19 +8002133c: 00715193 srli x3,x2,0x7 +80021340: 00f1e1b3 or x3,x3,x15 +80021344: 01919793 slli x15,x3,0x19 +80021348: 0071d213 srli x4,x3,0x7 +8002134c: 00f26233 or x4,x4,x15 +80021350: 01921793 slli x15,x4,0x19 +80021354: 00725293 srli x5,x4,0x7 +80021358: 00f2e2b3 or x5,x5,x15 +8002135c: 01929793 slli x15,x5,0x19 +80021360: 0072d313 srli x6,x5,0x7 +80021364: 00f36333 or x6,x6,x15 +80021368: 01931793 slli x15,x6,0x19 +8002136c: 00735393 srli x7,x6,0x7 +80021370: 00f3e3b3 or x7,x7,x15 +80021374: 01939793 slli x15,x7,0x19 +80021378: 0073d413 srli x8,x7,0x7 +8002137c: 00f46433 or x8,x8,x15 +80021380: 01941793 slli x15,x8,0x19 +80021384: 00745493 srli x9,x8,0x7 +80021388: 00f4e4b3 or x9,x9,x15 +8002138c: 01949793 slli x15,x9,0x19 +80021390: 0074d513 srli x10,x9,0x7 +80021394: 00f56533 or x10,x10,x15 +80021398: 01951793 slli x15,x10,0x19 +8002139c: 00755593 srli x11,x10,0x7 +800213a0: 00f5e5b3 or x11,x11,x15 +800213a4: 01959793 slli x15,x11,0x19 +800213a8: 0075d613 srli x12,x11,0x7 +800213ac: 00f66633 or x12,x12,x15 +800213b0: 01961793 slli x15,x12,0x19 +800213b4: 00765693 srli x13,x12,0x7 +800213b8: 00f6e6b3 or x13,x13,x15 +800213bc: 01969793 slli x15,x13,0x19 +800213c0: 0076d713 srli x14,x13,0x7 +800213c4: 00f76733 or x14,x14,x15 +800213c8: fab807b7 lui x15,0xfab80 +800213cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5dbb6> +800213d0: 7d5c0837 lui x16,0x7d5c0 +800213d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800213d8: 01981793 slli x15,x16,0x19 +800213dc: 00785893 srli x17,x16,0x7 +800213e0: 00f8e8b3 or x17,x17,x15 +800213e4: 01989793 slli x15,x17,0x19 +800213e8: 0078d913 srli x18,x17,0x7 +800213ec: 00f96933 or x18,x18,x15 +800213f0: 01991793 slli x15,x18,0x19 +800213f4: 00795993 srli x19,x18,0x7 +800213f8: 00f9e9b3 or x19,x19,x15 +800213fc: 01999793 slli x15,x19,0x19 +80021400: 0079da13 srli x20,x19,0x7 +80021404: 00fa6a33 or x20,x20,x15 +80021408: 019a1793 slli x15,x20,0x19 +8002140c: 007a5a93 srli x21,x20,0x7 +80021410: 00faeab3 or x21,x21,x15 +80021414: 019a9793 slli x15,x21,0x19 +80021418: 007adb13 srli x22,x21,0x7 +8002141c: 00fb6b33 or x22,x22,x15 +80021420: 019b1793 slli x15,x22,0x19 +80021424: 007b5b93 srli x23,x22,0x7 +80021428: 00fbebb3 or x23,x23,x15 +8002142c: 019b9793 slli x15,x23,0x19 +80021430: 007bdc13 srli x24,x23,0x7 +80021434: 00fc6c33 or x24,x24,x15 +80021438: 019c1793 slli x15,x24,0x19 +8002143c: 007c5c93 srli x25,x24,0x7 +80021440: 00fcecb3 or x25,x25,x15 +80021444: 019c9793 slli x15,x25,0x19 +80021448: 007cdd13 srli x26,x25,0x7 +8002144c: 00fd6d33 or x26,x26,x15 +80021450: 019d1793 slli x15,x26,0x19 +80021454: 007d5d93 srli x27,x26,0x7 +80021458: 00fdedb3 or x27,x27,x15 +8002145c: 019d9793 slli x15,x27,0x19 +80021460: 007dde13 srli x28,x27,0x7 +80021464: 00fe6e33 or x28,x28,x15 +80021468: 019e1793 slli x15,x28,0x19 +8002146c: 007e5e93 srli x29,x28,0x7 +80021470: 00feeeb3 or x29,x29,x15 +80021474: 019e9793 slli x15,x29,0x19 +80021478: 007edf13 srli x30,x29,0x7 +8002147c: 00ff6f33 or x30,x30,x15 +80021480: 019f1793 slli x15,x30,0x19 +80021484: 007f5f93 srli x31,x30,0x7 +80021488: 00ffefb3 or x31,x31,x15 +8002148c: 00000013 addi x0,x0,0 +80021490: 00000013 addi x0,x0,0 +80021494: 00000013 addi x0,x0,0 +80021498: 00000013 addi x0,x0,0 +8002149c: 00000013 addi x0,x0,0 +800214a0: ffff0117 auipc x2,0xffff0 +800214a4: 47010113 addi x2,x2,1136 # 80011910 +800214a8: 00000013 addi x0,x0,0 +800214ac: 00000013 addi x0,x0,0 +800214b0: 00000013 addi x0,x0,0 +800214b4: 00000013 addi x0,x0,0 +800214b8: 00000013 addi x0,x0,0 +800214bc: 00000013 addi x0,x0,0 + +800214c0 : +800214c0: 6f5ca337 lui x6,0x6f5ca +800214c4: 30930313 addi x6,x6,777 # 6f5ca309 +800214c8: 00000013 addi x0,x0,0 +800214cc: 00000013 addi x0,x0,0 +800214d0: 00000013 addi x0,x0,0 +800214d4: 00000013 addi x0,x0,0 +800214d8: 00000013 addi x0,x0,0 +800214dc: 00000013 addi x0,x0,0 +800214e0: fffe4197 auipc x3,0xfffe4 +800214e4: 02018193 addi x3,x3,32 # 80005500 +800214e8: 00000013 addi x0,x0,0 +800214ec: 00000013 addi x0,x0,0 +800214f0: 00000013 addi x0,x0,0 +800214f4: 00000013 addi x0,x0,0 +800214f8: 00000013 addi x0,x0,0 +800214fc: 00000013 addi x0,x0,0 +80021500: 00012203 lw x4,0(x2) +80021504: 00620863 beq x4,x6,80021514 +80021508: 000182e7 jalr x5,0(x3) +8002150c: 800214c0 .word 0x800214c0 +80021510: 80010eaf .word 0x80010eaf +80021514: 00410113 addi x2,x2,4 +80021518: 00000013 addi x0,x0,0 +8002151c: 00000013 addi x0,x0,0 +80021520: fffe7197 auipc x3,0xfffe7 +80021524: e9018193 addi x3,x3,-368 # 800083b0 +80021528: 00000013 addi x0,x0,0 +8002152c: 00000013 addi x0,x0,0 +80021530: 00000013 addi x0,x0,0 +80021534: 00000013 addi x0,x0,0 +80021538: 00000013 addi x0,x0,0 +8002153c: 00000013 addi x0,x0,0 +80021540: fffdf317 auipc x6,0xfffdf +80021544: b0030313 addi x6,x6,-1280 # 80000040 +80021548: 00000013 addi x0,x0,0 +8002154c: 00000013 addi x0,x0,0 +80021550: 00000013 addi x0,x0,0 +80021554: 00000013 addi x0,x0,0 +80021558: 00000013 addi x0,x0,0 +8002155c: 00000013 addi x0,x0,0 +80021560: 00030067 jalr x0,0(x6) + +80021564 : +80021564: 00054303 lbu x6,0(x10) +80021568: 00030a63 beq x6,x0,8002157c +8002156c: 100003b7 lui x7,0x10000 +80021570: 00638023 sb x6,0(x7) # 10000000 +80021574: 00150513 addi x10,x10,1 +80021578: fedff06f jal x0,80021564 +8002157c: 00008067 jalr x0,0(x1) + +80021580 : +80021580: ff010113 addi x2,x2,-16 +80021584: 00112023 sw x1,0(x2) +80021588: 00812223 sw x8,4(x2) +8002158c: 00000097 auipc x1,0x0 +80021590: fd8080e7 jalr x1,-40(x1) # 80021564 +80021594: 00412403 lw x8,4(x2) +80021598: 00012083 lw x1,0(x2) +8002159c: 01010113 addi x2,x2,16 +800215a0: 00008067 jalr x0,0(x1) + +800215a4 : +800215a4: 00100093 addi x1,x0,1 +800215a8: fffff297 auipc x5,0xfffff +800215ac: 45828293 addi x5,x5,1112 # 80020a00 + +800215b0 : +800215b0: 0012a023 sw x1,0(x5) +800215b4: 0002a223 sw x0,4(x5) + +800215b8 : +800215b8: 00000013 addi x0,x0,0 +800215bc: ffdff06f jal x0,800215b8 +800215c0: 0000006f jal x0,800215c0 + +800215c4 : +800215c4: 00300093 addi x1,x0,3 +800215c8: fffff297 auipc x5,0xfffff +800215cc: 43828293 addi x5,x5,1080 # 80020a00 + +800215d0 : +800215d0: 0012a023 sw x1,0(x5) +800215d4: 0002a223 sw x0,4(x5) + +800215d8 : +800215d8: 00000013 addi x0,x0,0 +800215dc: ffdff06f jal x0,800215d8 +800215e0: 0000006f jal x0,800215e0 + +800215e4 : +800215e4: 00100513 addi x10,x0,1 +800215e8: 100105b7 lui x11,0x10010 +800215ec: 00a5a023 sw x10,0(x11) # 10010000 +800215f0: 00008067 jalr x0,0(x1) + +800215f4 : +800215f4: 100105b7 lui x11,0x10010 +800215f8: 0005a023 sw x0,0(x11) # 10010000 +800215fc: 00008067 jalr x0,0(x1) + +80021600 : +80021600: 00100513 addi x10,x0,1 +80021604: 100005b7 lui x11,0x10000 +80021608: 01058593 addi x11,x11,16 # 10000010 +8002160c: 00a58023 sb x10,0(x11) +80021610: 00008067 jalr x0,0(x1) + +80021614 : +80021614: 100005b7 lui x11,0x10000 +80021618: 01058593 addi x11,x11,16 # 10000010 +8002161c: 00058023 sb x0,0(x11) +80021620: 00008067 jalr x0,0(x1) +80021624: 00000013 addi x0,x0,0 +80021628: 00000013 addi x0,x0,0 +8002162c: 00000013 addi x0,x0,0 +80021630: 00000013 addi x0,x0,0 +80021634: 00000013 addi x0,x0,0 +80021638: 00000013 addi x0,x0,0 +8002163c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknd-aes32dsi-00.elf.objdump b/riscv-tests/rv32-Zknd-aes32dsi-00.elf.objdump new file mode 100644 index 0000000..33f47dd --- /dev/null +++ b/riscv-tests/rv32-Zknd-aes32dsi-00.elf.objdump @@ -0,0 +1,19209 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknd/Zknd-aes32dsi-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknd/Zknd-aes32dsi-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009e00 memsz 0x00009e00 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009dc0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001d370 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80029400 80029400 00028400 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003efa 00000000 00000000 0002967b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 00000000 00000000 0002d575 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5f3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d616 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d628 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 00000000 00000000 0002d650 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d6dc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80029400 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccWRE6yn.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b0 +80008200 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b1 +8000d845 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b2 +8000d87a l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b3 +8000d8af l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b4 +80008218 l .text.rvtest 00000000 failedtest_x8_x7 +8000d8e4 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b5 +8000d919 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b5_str +8000016c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b6 +8000d94e l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b6_str +800001a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b7 +80008240 l .text.rvtest 00000000 failedtest_x14_x13 +8000d983 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b7_str +800001cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b8 +8000d9b8 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b8_str +800001fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b9 +8000d9ed l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b9_str +80000228 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b10 +8000da23 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b10_str +80000254 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b11 +8000da5a l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b11_str +80000280 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b12 +8000da91 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b12_str +800002b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b13 +8000dac8 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b13_str +800002e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b14 +8000daff l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b14_str +8000030c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b15 +8000db36 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b15_str +80000338 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b16 +8000db6d l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b16_str +80000364 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b17 +8000dba4 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b17_str +80000390 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b18 +8000dbdb l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b18_str +800003bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b19 +8000dc12 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b19_str +800003e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b20 +8000dc49 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b20_str +80000414 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b21 +8000dc80 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b21_str +80000440 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b22 +8000dcb7 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b22_str +8000046c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b23 +8000dcee l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b23_str +80000498 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b24 +8000dd25 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b24_str +800004c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b25 +8000dd5c l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b26 +8000dd93 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b26_str +8000051c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b27 +8000ddca l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b27_str +80000548 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b28 +8000de01 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b28_str +80000574 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b29 +8000de38 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b29_str +800005a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b30 +8000de6f l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b30_str +800005d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_b31 +8000dea6 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_b31_str +800005fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b0 +8000dedd l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b0_str +80000628 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b1 +8000df13 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b1_str +80000658 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b2 +8000df49 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b2_str +80000684 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b3 +8000df7f l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b3_str +800006b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b4 +8000dfb5 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b4_str +800006e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b5 +8000dfeb l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b5_str +80000710 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b6 +8000e021 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b6_str +80000744 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b7 +8000e057 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b7_str +80000770 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b8 +8000e08d l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b8_str +8000079c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b9 +8000e0c3 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b9_str +800007c8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b10 +8000e0f9 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b10_str +800007f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b11 +8000e130 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b11_str +80000824 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b12 +8000e167 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b12_str +80000858 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b13 +8000e19e l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b13_str +80000884 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b14 +8000e1d5 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b14_str +800008b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b15 +8000e20c l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b15_str +800008e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b16 +8000e243 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b16_str +8000090c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b17 +8000e27a l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b17_str +80000938 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b18 +8000e2b1 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b18_str +80000964 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b19 +8000e2e8 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b19_str +80000990 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b20 +8000e31f l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b20_str +800009bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b21 +8000e356 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b21_str +800009e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b22 +8000e38d l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b22_str +80000a14 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b23 +8000e3c4 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b23_str +80000a40 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b24 +8000e3fb l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b24_str +80000a6c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b25 +8000e432 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b25_str +80000a9c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b26 +8000e469 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b26_str +80000ac8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b27 +8000e4a0 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b27_str +80000af4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b28 +8000e4d7 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b28_str +80000b20 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b29 +8000e50e l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b29_str +80000b4c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b30 +8000e545 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b30_str +80000b78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_b31 +8000e57c l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_b31_str +80000ba4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b0 +8000e5b3 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b0_str +80000bd4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b1 +8000e5e8 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b1_str +80000c00 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b2 +8000e61d l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b2_str +80000c2c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b3 +8000e652 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b3_str +80000c60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b4 +8000e687 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b4_str +80000c8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b5 +8000e6bc l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b5_str +80000cbc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b6 +8000e6f1 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b6_str +80000cf0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b7 +8000e726 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b7_str +80000d1c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b8 +8000e75b l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b8_str +80000d48 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b9 +8000e790 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b9_str +80000d74 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b10 +8000e7c5 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b10_str +80000da0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b11 +8000e7fb l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b11_str +80000dd0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b12 +8000e831 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b12_str +80000e04 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b13 +8000e867 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b13_str +80000e30 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b14 +8000e89d l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b14_str +80000e5c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b15 +8000e8d3 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b15_str +80000e8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b16 +8000e909 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b16_str +80000eb8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b17 +8000e93f l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b17_str +80000ee4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b18 +8000e975 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b18_str +80000f14 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b19 +8000e9ab l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b19_str +80000f40 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b20 +8000e9e1 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b20_str +80000f6c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b21 +8000ea17 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b21_str +80000f9c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b22 +8000ea4d l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b22_str +80000fc8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b23 +8000ea83 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b23_str +80000ff4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b24 +8000eab9 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b24_str +80001020 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b25 +8000eaef l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b25_str +8000104c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b26 +8000eb25 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b26_str +80001078 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b27 +8000eb5b l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b27_str +800010a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b28 +8000eb91 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b28_str +800010d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b29 +8000ebc7 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b29_str +800010fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b30 +8000ebfd l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b30_str +80001128 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rd_b31 +8000ec33 l .data 00000000 Zknd_aes32dsi_cg_cp_rd_b31_str +80001154 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x0 +8000ec69 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x0_str +80001180 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x1 +8000eca6 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x1_str +800011ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x2 +8000ece3 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x2_str +800011d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x80000000 +8000ed20 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x80000000_str +80001204 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x80000001 +8000ed65 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x80000001_str +80001230 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x7fffffff +8000edaa l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x7fffffff_str +8000125c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x7ffffffe +8000edef l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x7ffffffe_str +80001288 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xffffffff +8000ee34 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xffffffff_str +800012b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xfffffffe +8000ee79 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xfffffffe_str +800012e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x5bbc8872 +8000eebe l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x5bbc8872_str +8000130c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xaaaaaaaa +8000ef03 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0xaaaaaaaa_str +80001338 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x55555555 +8000ef48 l .data 00000000 Zknd_aes32dsi_cg_cp_rs1_edges_0x55555555_str +80001364 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x0 +8000ef8d l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x0_str +80001390 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x1 +8000efcb l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x1_str +800013bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x2 +8000f009 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x2_str +800013e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x80000000 +8000f047 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x80000000_str +80001414 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x80000001 +8000f08c l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x80000001_str +80001440 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x7fffffff +8000f0d1 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x7fffffff_str +8000146c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x7ffffffe +8000f116 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x7ffffffe_str +80001498 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xffffffff +8000f15b l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xffffffff_str +800014c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xfffffffe +8000f1a0 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xfffffffe_str +800014f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x5bbc8872 +8000f1e5 l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x5bbc8872_str +8000151c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xaaaaaaaa +8000f22a l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0xaaaaaaaa_str +80001548 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x55555555 +8000f26f l .data 00000000 Zknd_aes32dsi_cg_cp_rs2_edges_0x55555555_str +80001574 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f2b4 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +800015a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f309 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f35e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f3b3 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001624 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f40f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001650 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f46b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000167c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f4c7 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +800016a8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f523 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016d4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f57f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +80001700 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f5db l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +8000172c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f637 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001758 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f693 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001784 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f6ef l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017b0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f744 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f799 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +80001808 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f7ee l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001834 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f84a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001860 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f8a6 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000188c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f902 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f95e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000f9ba l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001910 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000fa16 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000193c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000fa72 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001968 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000face l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001994 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fb2a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fb7f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fbd4 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a18 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fc29 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a44 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fc85 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a70 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fce1 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a9c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fd3d l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ac8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fd99 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001af4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fdf5 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b20 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000fe51 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b4c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000fead l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000ff09 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001ba4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000ff65 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bd0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000ffc1 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bfc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8001001d l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c28 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +80010079 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c54 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +800100dc l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c80 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8001013f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001cac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +800101a2 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cd8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +80010205 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001d04 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +80010268 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d30 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +800102cb l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d5c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8001032e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d88 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010391 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001db4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +800103f4 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001de0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +80010450 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001e0c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +800104ac l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e38 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +80010508 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e64 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8001056b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e90 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +800105ce l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ebc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +80010631 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ee8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010694 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f14 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +800106f7 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f40 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8001075a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f6c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +800107bd l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f98 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +80010820 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fc4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +80010883 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001ff0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +800108df l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +8000201c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8001093b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002048 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010997 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002074 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +800109fa l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +800020a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +80010a5d l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +80010ac0 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +80010b23 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002124 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010b86 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002150 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010be9 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000217c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010c4c l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +800021a8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010caf l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021d4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010d12 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +80002200 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010d6e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +8000222c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010dca l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002258 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010e26 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002284 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010e89 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022b0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010eec l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80010f4f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +80002308 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80010fb2 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002334 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +80011015 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002360 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80011078 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000238c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +800110db l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8001113e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +800111a1 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002410 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +800111fd l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000243c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +80011259 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002468 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +800112b5 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002494 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +80011318 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8001137b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +800113de l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002518 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +80011441 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002544 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +800114a4 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002570 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +80011507 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000259c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8001156a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025c8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +800115cd l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025f4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011630 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002620 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8001168c l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000264c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +800116e8 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002678 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +80011744 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +800026a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +800117a7 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8001180a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8001186d l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002728 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +800118d0 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002754 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011933 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002780 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +80011996 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +800027ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +800119f9 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011a5c l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +80002804 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +80011abf l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002830 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011b1b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000285c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +80011b77 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002888 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011bd3 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011c36 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011c99 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +8000290c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011cfc l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002938 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011d5f l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002964 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011dc2 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002990 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011e25 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011e88 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011eeb l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a14 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +80011f4e l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a40 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +80011faa l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a6c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +80012006 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a98 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80012062 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ac4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +800120c5 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002af0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +80012128 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b1c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8001218b l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b48 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +800121ee l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b74 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012251 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002ba0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800122b4 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bcc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012317 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bf8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8001237a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c24 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800123dd l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c50 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +80012439 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c7c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012495 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002ca8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800124f1 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cd4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012554 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002d00 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800125b7 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d2c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8001261a l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d58 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8001267d l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d84 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800126e0 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002db0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012743 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002ddc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +800127a6 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002e08 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +80012809 l .data 00000000 Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e34 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b0 +8001286c l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b0_str +80002e60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b1 +800128a8 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b1_str +80002e90 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b2 +800128e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b2_str +80002ec0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b3 +80012920 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b3_str +80002eec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b4 +8001295c l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b4_str +80002f18 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b5 +80012998 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b5_str +80002f44 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b6 +800129d4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b6_str +80002f78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b7 +80012a10 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b7_str +80002fa4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b8 +80012a4c l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b8_str +80002fd0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b9 +80012a88 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b9_str +80002ffc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b10 +80012ac4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b10_str +80003028 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b11 +80012b01 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b11_str +80003054 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b12 +80012b3e l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b12_str +80003080 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b13 +80012b7b l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b13_str +800030ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b14 +80012bb8 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b14_str +800030d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b15 +80012bf5 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b15_str +80003104 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b16 +80012c32 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b16_str +80003130 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b17 +80012c6f l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b17_str +8000315c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b18 +80012cac l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b18_str +80003188 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b19 +80012ce9 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b19_str +800031b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b20 +80012d26 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b20_str +800031e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b21 +80012d63 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b21_str +8000320c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b22 +80012da0 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b22_str +80003238 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b23 +80012ddd l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b23_str +80003264 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b24 +80012e1a l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b24_str +80003290 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b25 +80012e57 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b25_str +800032c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b26 +80012e94 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b26_str +800032ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b27 +80012ed1 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b27_str +80003318 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b28 +80012f0e l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b28_str +80003344 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b29 +80012f4b l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b29_str +80003374 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b30 +80012f88 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b30_str +800033a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b31 +80012fc5 l .data 00000000 Zknd_aes32dsi_cg_cmp_rs1_rs2_b31_str +800033d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b0 +80013002 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b0_str +800033fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b1 +8001303d l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b1_str +80003428 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b2 +80013078 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b2_str +80003454 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b3 +800130b3 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b3_str +80003488 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b4 +800130ee l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b4_str +800034b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b5 +80013129 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b5_str +800034e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b6 +80013164 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b6_str +8000350c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b7 +8001319f l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b7_str +80003538 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b8 +800131da l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b8_str +80003564 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b9 +80013215 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b9_str +80003594 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b10 +80013250 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b10_str +800035c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b11 +8001328c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b11_str +800035ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b12 +800132c8 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b12_str +80003620 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b13 +80013304 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b13_str +8000364c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b14 +80013340 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b14_str +80003678 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b15 +8001337c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b15_str +800036a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b16 +800133b8 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b16_str +800036d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b17 +800133f4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b17_str +800036fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b18 +80013430 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b18_str +80003728 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b19 +8001346c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b19_str +80003754 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b20 +800134a8 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b20_str +80003780 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b21 +800134e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b21_str +800037ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b22 +80013520 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b22_str +800037dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b23 +8001355c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b23_str +80003808 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b24 +80013598 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b24_str +80003834 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b25 +800135d4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b25_str +80003860 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b26 +80013610 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b26_str +8000388c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b27 +8001364c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b27_str +800038b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b28 +80013688 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b28_str +800038e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b29 +800136c4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b29_str +80003914 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b30 +80013700 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b30_str +80003940 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b31 +8001373c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_b31_str +8000396c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b0 +80013778 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b0_str +80003998 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b1 +800137b3 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b1_str +800039c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b2 +800137ee l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b2_str +800039f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b3 +80013829 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b3_str +80003a1c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b4 +80013864 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b4_str +80003a48 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b5 +8001389f l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b5_str +80003a74 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b6 +800138da l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b6_str +80003aa8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b7 +80013915 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b7_str +80003ad4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b8 +80013950 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b8_str +80003b04 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b9 +8001398b l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b9_str +80003b34 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b10 +800139c6 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b10_str +80003b60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b11 +80013a02 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b11_str +80003b8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b12 +80013a3e l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b12_str +80003bb8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b13 +80013a7a l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b13_str +80003be4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b14 +80013ab6 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b14_str +80003c10 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b15 +80013af2 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b15_str +80003c3c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b16 +80013b2e l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b16_str +80003c68 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b17 +80013b6a l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b17_str +80003c98 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b18 +80013ba6 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b18_str +80003cc4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b19 +80013be2 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b19_str +80003cf0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b20 +80013c1e l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b20_str +80003d20 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b21 +80013c5a l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b21_str +80003d4c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b22 +80013c96 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b22_str +80003d78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b23 +80013cd2 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b23_str +80003da4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b24 +80013d0e l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b24_str +80003dd0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b25 +80013d4a l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b25_str +80003dfc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b26 +80013d86 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b26_str +80003e28 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b27 +80013dc2 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b27_str +80003e58 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b28 +80013dfe l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b28_str +80003e84 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b29 +80013e3a l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b29_str +80003eb0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b30 +80013e76 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b30_str +80003edc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b31 +80013eb2 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs2_b31_str +80003f08 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b0 +80013eee l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b0_str +80003f34 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b1 +80013f2d l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b1_str +80003f60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b2 +80013f6c l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b2_str +80003f8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b3 +80013fab l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b3_str +80003fc0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b4 +80013fea l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b4_str +80003fec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b5 +80014029 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b5_str +80004018 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b6 +80014068 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b6_str +80004044 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b7 +800140a7 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b7_str +80004070 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b8 +800140e6 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b8_str +8000409c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b9 +80014125 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b9_str +800040c8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b10 +80014164 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b10_str +800040f4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b11 +800141a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b11_str +80004120 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b12 +800141e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b12_str +80004154 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b13 +80014224 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b13_str +80004180 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b14 +80014264 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b14_str +800041ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b15 +800142a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b15_str +800041d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b16 +800142e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b16_str +80004208 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b17 +80014324 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b17_str +80004234 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b18 +80014364 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b18_str +80004260 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b19 +800143a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b19_str +8000428c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b20 +800143e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b20_str +800042b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b21 +80014424 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b21_str +800042e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b22 +80014464 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b22_str +80004314 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b23 +800144a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b23_str +80004340 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b24 +800144e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b24_str +80004370 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b25 +80014524 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b25_str +800043a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b26 +80014564 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b26_str +800043cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b27 +800145a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b27_str +800043f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b28 +800145e4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b28_str +80004424 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b29 +80014624 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b29_str +80004450 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b30 +80014664 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b30_str +80004480 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b31 +800146a4 l .data 00000000 Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b31_str +800044ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_bs_b0 +800146e4 l .data 00000000 Zknd_aes32dsi_cg_cp_bs_b0_str +800044d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_bs_b1 +8001471a l .data 00000000 Zknd_aes32dsi_cg_cp_bs_b1_str +80004504 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_bs_b2 +80014750 l .data 00000000 Zknd_aes32dsi_cg_cp_bs_b2_str +80004530 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_bs_b3 +80014786 l .data 00000000 Zknd_aes32dsi_cg_cp_bs_b3_str +8000455c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b0 +800147bc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b0_str +80004588 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b1 +800147f4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b1_str +800045b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b2 +8001482c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b2_str +800045e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b3 +80014864 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b3_str +8000460c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b4 +8001489c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b4_str +80004638 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b5 +800148d4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b5_str +80004664 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b6 +8001490c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b6_str +80004690 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b7 +80014944 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b7_str +800046bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b8 +8001497c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b8_str +800046e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b9 +800149b4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b9_str +80004714 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b10 +800149ec l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b10_str +80004740 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b11 +80014a25 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b11_str +8000476c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b12 +80014a5e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b12_str +80004798 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b13 +80014a97 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b13_str +800047c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b14 +80014ad0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b14_str +800047f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b15 +80014b09 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b15_str +8000481c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b16 +80014b42 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b16_str +80004848 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b17 +80014b7b l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b17_str +80004874 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b18 +80014bb4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b18_str +800048a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b19 +80014bed l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b19_str +800048cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b20 +80014c26 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b20_str +800048f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b21 +80014c5f l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b21_str +80004924 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b22 +80014c98 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b22_str +80004950 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b23 +80014cd1 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b23_str +8000497c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b24 +80014d0a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b24_str +800049a8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b25 +80014d43 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b25_str +800049d4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b26 +80014d7c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b26_str +80004a00 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b27 +80014db5 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b27_str +80004a2c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b28 +80014dee l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b28_str +80004a58 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b29 +80014e27 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b29_str +80004a84 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b30 +80014e60 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b30_str +80004ab0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b31 +80014e99 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b31_str +80004adc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b32 +80014ed2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b32_str +80004b08 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b33 +80014f0b l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b33_str +80004b34 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b34 +80014f44 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b34_str +80004b60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b35 +80014f7d l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b35_str +80004b8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b36 +80014fb6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b36_str +80004bb8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b37 +80014fef l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b37_str +80004be4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b38 +80015028 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b38_str +80004c10 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b39 +80015061 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b39_str +80004c3c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b40 +8001509a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b40_str +80004c68 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b41 +800150d3 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b41_str +80004c94 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b42 +8001510c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b42_str +80004cc0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b43 +80015145 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b43_str +80004cec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b44 +8001517e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b44_str +80004d18 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b45 +800151b7 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b45_str +80004d44 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b46 +800151f0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b46_str +80004d70 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b47 +80015229 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b47_str +80004d9c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b48 +80015262 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b48_str +80004dc8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b49 +8001529b l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b49_str +80004df4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b50 +800152d4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b50_str +80004e20 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b51 +8001530d l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b51_str +80004e4c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b52 +80015346 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b52_str +80004e78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b53 +8001537f l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b53_str +80004ea4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b54 +800153b8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b54_str +80004ed0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b55 +800153f1 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b55_str +80004efc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b56 +8001542a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b56_str +80004f28 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b57 +80015463 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b57_str +80004f54 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b58 +8001549c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b58_str +80004f80 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b59 +800154d5 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b59_str +80004fac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b60 +8001550e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b60_str +80004fd8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b61 +80015547 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b61_str +80005004 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b62 +80015580 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b62_str +80005030 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b63 +800155b9 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b63_str +8000505c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b64 +800155f2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b64_str +80005088 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b65 +8001562b l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b65_str +800050b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b66 +80015664 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b66_str +800050e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b67 +8001569d l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b67_str +8000510c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b68 +800156d6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b68_str +80005138 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b69 +8001570f l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b69_str +80005164 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b70 +80015748 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b70_str +80005190 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b71 +80015781 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b71_str +800051bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b72 +800157ba l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b72_str +800051e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b73 +800157f3 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b73_str +80005214 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b74 +8001582c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b74_str +80005240 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b75 +80015865 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b75_str +8000526c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b76 +8001589e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b76_str +80005298 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b77 +800158d7 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b77_str +800052c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b78 +80015910 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b78_str +800052f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b79 +80015949 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b79_str +8000531c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b80 +80015982 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b80_str +80005348 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b81 +800159bb l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b81_str +80005374 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b82 +800159f4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b82_str +800053a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b83 +80015a2d l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b83_str +800053cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b84 +80015a66 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b84_str +800053f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b85 +80015a9f l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b85_str +80005424 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b86 +80015ad8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b86_str +80005450 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b87 +80015b11 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b87_str +8000547c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b88 +80015b4a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b88_str +800054a8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b89 +80015b83 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b89_str +800054d4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b90 +80015bbc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b90_str +80005500 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b91 +80015bf5 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b91_str +8000552c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b92 +80015c2e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b92_str +80005558 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b93 +80015c67 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b93_str +80005584 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b94 +80015ca0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b94_str +800055b0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b95 +80015cd9 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b95_str +800055dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b96 +80015d12 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b96_str +80005608 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b97 +80015d4b l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b97_str +80005634 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b98 +80015d84 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b98_str +80005660 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b99 +80015dbd l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b99_str +8000568c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b100 +80015df6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b100_str +800056b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b101 +80015e30 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b101_str +800056e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b102 +80015e6a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b102_str +80005710 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b103 +80015ea4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b103_str +8000573c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b104 +80015ede l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b104_str +80005768 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b105 +80015f18 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b105_str +80005794 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b106 +80015f52 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b106_str +800057c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b107 +80015f8c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b107_str +800057ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b108 +80015fc6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b108_str +80005818 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b109 +80016000 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b109_str +80005844 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b110 +8001603a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b110_str +80005870 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b111 +80016074 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b111_str +8000589c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b112 +800160ae l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b112_str +800058c8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b113 +800160e8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b113_str +800058f4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b114 +80016122 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b114_str +80005920 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b115 +8001615c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b115_str +8000594c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b116 +80016196 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b116_str +80005978 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b117 +800161d0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b117_str +800059a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b118 +8001620a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b118_str +800059d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b119 +80016244 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b119_str +800059fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b120 +8001627e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b120_str +80005a28 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b121 +800162b8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b121_str +80005a54 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b122 +800162f2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b122_str +80005a80 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b123 +8001632c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b123_str +80005aac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b124 +80016366 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b124_str +80005ad8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b125 +800163a0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b125_str +80005b04 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b126 +800163da l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b126_str +80005b30 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b127 +80016414 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b127_str +80005b5c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b128 +8001644e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b128_str +80005b88 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b129 +80016488 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b129_str +80005bb4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b130 +800164c2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b130_str +80005be0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b131 +800164fc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b131_str +80005c0c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b132 +80016536 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b132_str +80005c38 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b133 +80016570 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b133_str +80005c64 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b134 +800165aa l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b134_str +80005c90 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b135 +800165e4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b135_str +80005cbc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b136 +8001661e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b136_str +80005ce8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b137 +80016658 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b137_str +80005d14 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b138 +80016692 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b138_str +80005d40 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b139 +800166cc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b139_str +80005d6c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b140 +80016706 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b140_str +80005d98 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b141 +80016740 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b141_str +80005dc4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b142 +8001677a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b142_str +80005df0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b143 +800167b4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b143_str +80005e1c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b144 +800167ee l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b144_str +80005e48 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b145 +80016828 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b145_str +80005e74 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b146 +80016862 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b146_str +80005ea0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b147 +8001689c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b147_str +80005ecc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b148 +800168d6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b148_str +80005ef8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b149 +80016910 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b149_str +80005f24 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b150 +8001694a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b150_str +80005f50 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b151 +80016984 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b151_str +80005f7c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b152 +800169be l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b152_str +80005fa8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b153 +800169f8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b153_str +80005fd4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b154 +80016a32 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b154_str +80006000 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b155 +80016a6c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b155_str +8000602c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b156 +80016aa6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b156_str +80006058 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b157 +80016ae0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b157_str +80006084 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b158 +80016b1a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b158_str +800060b0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b159 +80016b54 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b159_str +800060dc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b160 +80016b8e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b160_str +80006108 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b161 +80016bc8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b161_str +80006134 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b162 +80016c02 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b162_str +80006160 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b163 +80016c3c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b163_str +8000618c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b164 +80016c76 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b164_str +800061b8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b165 +80016cb0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b165_str +800061e4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b166 +80016cea l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b166_str +80006210 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b167 +80016d24 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b167_str +8000623c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b168 +80016d5e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b168_str +80006268 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b169 +80016d98 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b169_str +80006294 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b170 +80016dd2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b170_str +800062c0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b171 +80016e0c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b171_str +800062ec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b172 +80016e46 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b172_str +80006318 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b173 +80016e80 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b173_str +80006344 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b174 +80016eba l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b174_str +80006370 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b175 +80016ef4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b175_str +8000639c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b176 +80016f2e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b176_str +800063c8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b177 +80016f68 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b177_str +800063f4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b178 +80016fa2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b178_str +80006420 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b179 +80016fdc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b179_str +8000644c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b180 +80017016 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b180_str +80006478 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b181 +80017050 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b181_str +800064a4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b182 +8001708a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b182_str +800064d0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b183 +800170c4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b183_str +800064fc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b184 +800170fe l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b184_str +80006528 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b185 +80017138 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b185_str +80006554 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b186 +80017172 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b186_str +80006580 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b187 +800171ac l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b187_str +800065ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b188 +800171e6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b188_str +800065d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b189 +80017220 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b189_str +80006604 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b190 +8001725a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b190_str +80006630 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b191 +80017294 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b191_str +8000665c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b192 +800172ce l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b192_str +80006688 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b193 +80017308 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b193_str +800066b4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b194 +80017342 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b194_str +800066e0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b195 +8001737c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b195_str +8000670c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b196 +800173b6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b196_str +80006738 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b197 +800173f0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b197_str +80006764 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b198 +8001742a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b198_str +80006790 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b199 +80017464 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b199_str +800067bc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b200 +8001749e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b200_str +800067e8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b201 +800174d8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b201_str +80006814 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b202 +80017512 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b202_str +80006840 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b203 +8001754c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b203_str +8000686c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b204 +80017586 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b204_str +80006898 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b205 +800175c0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b205_str +800068c4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b206 +800175fa l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b206_str +800068f0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b207 +80017634 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b207_str +8000691c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b208 +8001766e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b208_str +80006948 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b209 +800176a8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b209_str +80006974 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b210 +800176e2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b210_str +800069a0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b211 +8001771c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b211_str +800069cc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b212 +80017756 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b212_str +800069f8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b213 +80017790 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b213_str +80006a24 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b214 +800177ca l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b214_str +80006a50 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b215 +80017804 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b215_str +80006a7c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b216 +8001783e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b216_str +80006aa8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b217 +80017878 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b217_str +80006ad4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b218 +800178b2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b218_str +80006b00 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b219 +800178ec l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b219_str +80006b2c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b220 +80017926 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b220_str +80006b58 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b221 +80017960 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b221_str +80006b84 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b222 +8001799a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b222_str +80006bb0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b223 +800179d4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b223_str +80006bdc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b224 +80017a0e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b224_str +80006c08 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b225 +80017a48 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b225_str +80006c34 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b226 +80017a82 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b226_str +80006c60 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b227 +80017abc l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b227_str +80006c8c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b228 +80017af6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b228_str +80006cb8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b229 +80017b30 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b229_str +80006ce4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b230 +80017b6a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b230_str +80006d10 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b231 +80017ba4 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b231_str +80006d3c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b232 +80017bde l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b232_str +80006d68 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b233 +80017c18 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b233_str +80006d94 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b234 +80017c52 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b234_str +80006dc0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b235 +80017c8c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b235_str +80006dec l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b236 +80017cc6 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b236_str +80006e18 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b237 +80017d00 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b237_str +80006e44 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b238 +80017d3a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b238_str +80006e70 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b239 +80017d74 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b239_str +80006e9c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b240 +80017dae l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b240_str +80006ec8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b241 +80017de8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b241_str +80006ef4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b242 +80017e22 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b242_str +80006f20 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b243 +80017e5c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b243_str +80006f4c l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b244 +80017e96 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b244_str +80006f78 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b245 +80017ed0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b245_str +80006fa4 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b246 +80017f0a l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b246_str +80006fd0 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b247 +80017f44 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b247_str +80006ffc l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b248 +80017f7e l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b248_str +80007028 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b249 +80017fb8 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b249_str +80007054 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b250 +80017ff2 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b250_str +80007080 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b251 +8001802c l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b251_str +800070ac l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b252 +80018066 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b252_str +800070d8 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b253 +800180a0 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b253_str +80007104 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b254 +800180da l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b254_str +80007130 l .text.rvtest 00000000 Zknd_aes32dsi_cg_cp_sbox_b255 +80018114 l .data 00000000 Zknd_aes32dsi_cg_cp_sbox_b255_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80007160 l .text.rvtest 00000000 exit_Mcleanup +80007164 l .text.rvtest 00000000 resto_Medeleg +8000716c l .text.rvtest 00000000 resto_Msatp +80007170 l .text.rvtest 00000000 resto_Mscratch +80007178 l .text.rvtest 00000000 resto_Mxtvec +8000718c l .text.rvtest 00000000 resto_Mtramp +80007190 l .text.rvtest 00000000 resto_Mloop +800071a8 l .text.rvtest 00000000 check_trap_sig_overflow +80007450 l .text.rvtest 00000000 trap_sig_overflow +800072f0 l .text.rvtest 00000000 check_trap_sig_offset +800187d2 l .data 00000000 failstr +8002a564 l .text.rvmodel 00000000 rvmodel_io_write_str +8001880f l .data 00000000 begin_debugstr +8001886f l .data 00000000 trap_sig_overflowstr +8001941a l .data 00000000 endstr +8002a5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +8000c328 l .data 00000000 Mtrap_sig +8001a908 l .data 00000000 trap_sigptr +8001a900 l .data 00000000 final_trap_sig_offset +800073b4 l .text.rvtest 00000000 check_abort_test +80008268 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800189c3 l .data 00000000 trap_sig_offset_mismatch +800073d0 l .text.rvtest 00000000 exit_cleanup +80007484 l .text.rvtest 00000000 abort_test +80018831 l .data 00000000 abortstr +80018794 l .data 00000000 successstr +8002a5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80007540 l .text.rvtest 00000000 trap_Mhandler +80007660 l .text.rvtest 00000000 rvtest_Mendtest +80007684 l .text.rvtest 00000000 common_Mhandler +800076f0 l .text.rvtest 00000000 spcl_M2mmode_test +800076fc l .text.rvtest 00000000 spcl_Mchk4alt +8000770c l .text.rvtest 00000000 spcl_Mchk4ecall +80007704 l .text.rvtest 00000000 spcl_Mparam_chk +80008190 l .text.rvtest 00000000 Mrtn2mmode +80007c94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80007718 l .text.rvtest 00000000 Mgoto_mchk +8000771c l .text.rvtest 00000000 tsbi_Mdispatch +80007744 l .text.rvtest 00000000 tsbi_Mgoto_mode +80007734 l .text.rvtest 00000000 tsbi_Mecall_test +800077b0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007f00 l .text.rvtest 00000000 resto_Mrtn +80007770 l .text.rvtest 00000000 tsbi_Mgoto_m +80007780 l .text.rvtest 00000000 tsbi_Mgoto_s +8000779c l .text.rvtest 00000000 tsbi_Mgoto_u +800077ac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80007930 l .text.rvtest 00000000 tsbi_instr_table +800077e0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800077f4 l .text.rvtest 00000000 found_instr +80007838 l .text.rvtest 00000000 tsbi_instr_not_found +80007824 l .text.rvtest 00000000 tsbi_instr_rtn +80019e51 l .data 00000000 tsbi_instr_not_found_str +80009d18 l .text.rvtest 00000000 failedtest_hex_to_str +800182b8 l .data 00000000 ascii_buffer +800188d8 l .data 00000000 newlinestr +80007cb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80007c9c l .text.rvtest 00000000 Mint_sig_sv +80007cb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80018298 l .data 00000000 saved_xepc +8002936c l .data 00000000 sig_end_canary +80007d48 l .text.rvtest 00000000 sv_Mvect +800189da l .data 00000000 sv_Mvect_str +80007dec l .text.rvtest 00000000 sv_Mcause +80018adc l .data 00000000 sv_Mcause_str +80007f20 l .text.rvtest 00000000 common_Mint_handler +80007e14 l .text.rvtest 00000000 common_Mexcpt_handler +80007e20 l .text.rvtest 00000000 vmem_adj_Mepc +80007e74 l .text.rvtest 00000000 sv_Mepc +80007e48 l .text.rvtest 00000000 code_adj_Mepc +80007e70 l .text.rvtest 00000000 adj_Mepc +80007e5c l .text.rvtest 00000000 data_adj_Mepc +80018bd7 l .data 00000000 sv_Mepc_str +80007e94 l .text.rvtest 00000000 skpsv_Mepc +80007ebc l .text.rvtest 00000000 adj_Mepc_rtn +80007ec8 l .text.rvtest 00000000 skp_adj_Mepc +80007ecc l .text.rvtest 00000000 sv_Mtval +80018cca l .data 00000000 sv_Mtval_str +80007eec l .text.rvtest 00000000 skp_Mtval +80007ef8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80007f58 l .text.rvtest 00000000 spcl_Mhandler +80007f34 l .text.rvtest 00000000 sv_Mip +80018e3d l .data 00000000 sv_Mip_str +80007f74 l .text.rvtest 00000000 spcl_Mdispatch_handling +80007f8c l .text.rvtest 00000000 spcl_Mdispatch +80007f90 l .text.rvtest 00000000 clrint_Mtbl +8002a000 l .text.rvmodel 00000000 Mclr_Msw_int +8002a014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8002a030 l .text.rvmodel 00000000 Mclr_Mext_int +80008090 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081e0 l .text.rvtest 00000000 rtn_fm_mmode +800081cc l .text.rvtest 00000000 from_hs_u +800081bc l .text.rvtest 00000000 from_vs +80018150 l .data 00000000 begin_failure_scratch +8000829c l .text.rvtest 00000000 failedtest_saveregs +8000830c l .text.rvtest 00000000 failedtest_saveresults +80018150 l .data 00000000 failure_type +800084ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000831c l .text.rvtest 00000000 failedtest_saveresults_int +80008434 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000846c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +800087a0 l .text.rvtest 00000000 failedtest_saveresults_common +80018278 l .data 00000000 failure_diag_type +80018288 l .data 00000000 trap_diag_fail_str_ptr +80008760 l .text.rvtest 00000000 trap_diag_offset_mismatch +80018280 l .data 00000000 trap_diag_subtype +80008774 l .text.rvtest 00000000 trap_diag_field_identified +80018dc1 l .data 00000000 sv_Mtval2_str +80018dff l .data 00000000 sv_Mtinst_str +80018a1a l .data 00000000 sv_Svect_str +80018b1a l .data 00000000 sv_Scause_str +80018c13 l .data 00000000 sv_Sepc_str +80018d07 l .data 00000000 sv_Stval_str +80018e78 l .data 00000000 sv_Sip_str +80018a5a l .data 00000000 sv_Hvect_str +80018b58 l .data 00000000 sv_Hcause_str +80018c4f l .data 00000000 sv_Hepc_str +80018d44 l .data 00000000 sv_Htval_str +80018eb3 l .data 00000000 sv_Hip_str +80018a9b l .data 00000000 sv_Vvect_str +80018b97 l .data 00000000 sv_Vcause_str +80018c8c l .data 00000000 sv_Vepc_str +80018d82 l .data 00000000 sv_Vtval_str +80018eef l .data 00000000 sv_Vip_str +80018f2c l .data 00000000 Mclr_Mext_int_str +80018f7b l .data 00000000 Mclr_Sext_int_str +80019076 l .data 00000000 Sclr_Sext_int_str +80019172 l .data 00000000 Hclr_Sext_int_str +80008790 l .text.rvtest 00000000 trap_diag_generic_report +80018284 l .data 00000000 trap_diag_mode +800087d0 l .text.rvtest 00000000 failedtest_report +800087d0 l .text.rvtest 00000000 print_failstr +80008848 l .text.rvtest 00000000 print_testnamestr +800188c6 l .data 00000000 testnamestr +80008888 l .text.rvtest 00000000 print_failure_test_name_str +80018270 l .data 00000000 failure_string_ptr +80008898 l .text.rvtest 00000000 print_newline_str +80008e0c l .text.rvtest 00000000 failedtest_report_trap_detailed +800188da l .data 00000000 inststr +80018250 l .data 00000000 failing_instruction +800188ee l .data 00000000 addrstr +80018258 l .data 00000000 failing_addr +80019325 l .data 00000000 regstr +80008a78 l .text.rvtest 00000000 failedtest_report_not_intreg +80018254 l .data 00000000 failing_reg +80009d94 l .text.rvtest 00000000 failedtest_dec_to_str +80008b8c l .text.rvtest 00000000 failedtest_report_print_regstr +80008acc l .text.rvtest 00000000 failedtest_report_fpreg +80008b18 l .text.rvtest 00000000 failedtest_report_vecreg +80008b54 l .text.rvtest 00000000 failedtest_report_vxsat +8001943b l .data 00000000 fflagsstr +80008bc8 l .text.rvtest 00000000 failedtest_report_after_reg +8001931e l .data 00000000 vxsatstr +80019336 l .data 00000000 badvalstr +80008c2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80018260 l .data 00000000 failing_value +80008c3c l .text.rvtest 00000000 failedtest_report_badval_done +80008d0c l .text.rvtest 00000000 failedtest_report_diag +8001934d l .data 00000000 expvalstr +80008ccc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80018268 l .data 00000000 expected_value +80008cdc l .text.rvtest 00000000 failedtest_report_expval_done +80009ac4 l .text.rvtest 00000000 failedtest_report_end +80008d8c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80008d14 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80019364 l .data 00000000 failure_diag_bad_instr_str +800193c2 l .data 00000000 failure_diag_bad_ptr_str +80008ed0 l .text.rvtest 00000000 trap_report_offset_mismatch +80019467 l .data 00000000 trap_diag_header_str +80019493 l .data 00000000 trap_diag_origstr_label +80009950 l .text.rvtest 00000000 trap_report_generic +8000920c l .text.rvtest 00000000 trap_report_field_mismatch +800194a3 l .data 00000000 trap_diag_expected_offset_str +800194ce l .data 00000000 trap_diag_actual_offset_str +800090ec l .text.rvtest 00000000 trap_report_missing_traps +80008fdc l .text.rvtest 00000000 trap_report_extra_traps +800194fd l .data 00000000 trap_diag_extra_traps_str +80019565 l .data 00000000 trap_diag_diff_bytes_str +8001958c l .data 00000000 trap_diag_extra_next_step_str +80019529 l .data 00000000 trap_diag_missing_traps_str +80019674 l .data 00000000 trap_diag_missing_next_step_str +8001975b l .data 00000000 trap_diag_handler_mode_str +800092a4 l .text.rvtest 00000000 trap_mode_m +800092e4 l .text.rvtest 00000000 trap_mode_s +80009324 l .text.rvtest 00000000 trap_mode_h +80009364 l .text.rvtest 00000000 trap_mode_v +80019797 l .data 00000000 trap_diag_mode_unknown_str +800093a0 l .text.rvtest 00000000 trap_mode_print +80019775 l .data 00000000 trap_diag_mode_m_str +8001977d l .data 00000000 trap_diag_mode_s_str +80019785 l .data 00000000 trap_diag_mode_hs_str +8001978e l .data 00000000 trap_diag_mode_vs_str +800197a0 l .data 00000000 trap_diag_field_str +80009464 l .text.rvtest 00000000 trap_field_vect +800094a4 l .text.rvtest 00000000 trap_field_cause +800094e4 l .text.rvtest 00000000 trap_field_epc +80009524 l .text.rvtest 00000000 trap_field_tval +80009564 l .text.rvtest 00000000 trap_field_ip +800095a4 l .text.rvtest 00000000 trap_field_tval2 +800095e4 l .text.rvtest 00000000 trap_field_tinst +80009624 l .text.rvtest 00000000 trap_field_intid +800198f7 l .data 00000000 trap_diag_field_unknown_str +80009660 l .text.rvtest 00000000 trap_field_print +800197ba l .data 00000000 trap_diag_field_vect_str +800197eb l .data 00000000 trap_diag_field_cause_str +8001980b l .data 00000000 trap_diag_field_epc_str +80019829 l .data 00000000 trap_diag_field_tval_str +80019848 l .data 00000000 trap_diag_field_ip_str +80019870 l .data 00000000 trap_diag_field_tval2_str +8001989c l .data 00000000 trap_diag_field_tinst_str +800198c8 l .data 00000000 trap_diag_field_intid_str +80019906 l .data 00000000 trap_diag_expected_str +8001991d l .data 00000000 trap_diag_actual_str +800097fc l .text.rvtest 00000000 trap_field_not_cause +80019934 l .data 00000000 trap_diag_expected_cause_name_str +80009a34 l .text.rvtest 00000000 trap_cause_to_str +8001994b l .data 00000000 trap_diag_actual_cause_name_str +800097fc l .text.rvtest 00000000 trap_field_not_epc +80009b10 l .text.rvtest 00000000 failedtest_print_csr_context +800199c1 l .data 00000000 trap_diag_hint_vect_str +80019a97 l .data 00000000 trap_diag_hint_cause_str +80019b8a l .data 00000000 trap_diag_hint_epc_str +80019c85 l .data 00000000 trap_diag_hint_tval_str +80019d6c l .data 00000000 trap_diag_hint_ip_str +80019979 l .data 00000000 trap_diag_generic_str +80018962 l .data 00000000 xepcinstrstr +80009a58 l .text.rvtest 00000000 trap_cause_interrupt +80009a38 l .text.rvtest 00000000 trap_cause_exception +80009a84 l .text.rvtest 00000000 trap_cause_unknown +800182e0 l .data 00000000 trap_excpt_name_tbl +80018340 l .data 00000000 trap_int_name_tbl +8001877e l .data 00000000 trap_cause_unknown_str +80009b08 l .text.rvtest 00000000 failedtest_terminate +80018290 l .data 00000000 csr_context_ret_addr +80018983 l .data 00000000 mepcstr +80018993 l .data 00000000 mcausestr +800182a0 l .data 00000000 saved_xcause +800189a3 l .data 00000000 mtvalstr +800182a8 l .data 00000000 saved_xtval +800189b3 l .data 00000000 mstatusstr +800182b0 l .data 00000000 saved_xstatus +80009d58 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80009d74 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80009d78 l .text.rvtest 00000000 failedtest_hex_to_str_write +8002a0e4 l .text.rvmodel 00000000 uart_init +8002a0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8002a120 l .text.rvmodel 00000000 init_Mscratch +8002a128 l .text.rvmodel 00000000 init_Mtimecmp +8002a13c l .text.rvmodel 00000000 init_Medeleg +8002a144 l .text.rvmodel 00000000 init_Msatp +8002a144 l .text.rvmodel 00000000 init_Mtvec +8002a264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8002a224 l .text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +80019ea0 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +80019443 l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +800182e0 l .data 00000000 end_failure_scratch +80018380 l .data 00000000 trap_excpt_name_0 +800183a0 l .data 00000000 trap_excpt_name_1 +800183ba l .data 00000000 trap_excpt_name_2 +800183cf l .data 00000000 trap_excpt_name_3 +800183db l .data 00000000 trap_excpt_name_4 +800183f4 l .data 00000000 trap_excpt_name_5 +80018407 l .data 00000000 trap_excpt_name_6 +80018425 l .data 00000000 trap_excpt_name_7 +8001843d l .data 00000000 trap_excpt_name_8 +8001845b l .data 00000000 trap_excpt_name_9 +80018479 l .data 00000000 trap_excpt_name_10 +80018498 l .data 00000000 trap_excpt_name_11 +800184b6 l .data 00000000 trap_excpt_name_12 +800184ce l .data 00000000 trap_excpt_name_13 +800184df l .data 00000000 trap_excpt_name_14 +800184ee l .data 00000000 trap_excpt_name_15 +80018504 l .data 00000000 trap_excpt_name_16 +80018511 l .data 00000000 trap_excpt_name_17 +80018520 l .data 00000000 trap_excpt_name_18 +80018530 l .data 00000000 trap_excpt_name_19 +80018540 l .data 00000000 trap_excpt_name_20 +8001855e l .data 00000000 trap_excpt_name_21 +80018575 l .data 00000000 trap_excpt_name_22 +8001858a l .data 00000000 trap_excpt_name_23 +800185a6 l .data 00000000 trap_int_name_0 +800185be l .data 00000000 trap_int_name_1 +800185dd l .data 00000000 trap_int_name_2 +80018604 l .data 00000000 trap_int_name_3 +80018620 l .data 00000000 trap_int_name_4 +80018638 l .data 00000000 trap_int_name_5 +80018654 l .data 00000000 trap_int_name_6 +80018678 l .data 00000000 trap_int_name_7 +80018691 l .data 00000000 trap_int_name_8 +800186a9 l .data 00000000 trap_int_name_9 +800186c8 l .data 00000000 trap_int_name_10 +800186ef l .data 00000000 trap_int_name_11 +8001870b l .data 00000000 trap_int_name_12 +80018730 l .data 00000000 trap_int_name_13 +8001874c l .data 00000000 trap_int_name_14 +80018765 l .data 00000000 trap_int_name_15 +8001892f l .data 00000000 xepcstr +80018fcd l .data 00000000 Mclr_Vext_int_str +80019027 l .data 00000000 Sclr_Mext_int_str +800190c8 l .data 00000000 Sclr_Vext_int_str +80019122 l .data 00000000 Hclr_Mext_int_str +800191c5 l .data 00000000 Hclr_Vext_int_str +80019220 l .data 00000000 Vclr_Mext_int_str +80019270 l .data 00000000 Vclr_Sext_int_str +800192c3 l .data 00000000 Vclr_Vext_int_str +80019962 l .data 00000000 trap_diag_curr_xepc_str +80029370 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80029370 g .data 00000000 rvtest_sig_end +80007698 g .text.rvtest 00000000 common_Mentry +800071a8 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80019ea0 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +80007150 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80019ea0 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +80019e95 g .data 00000000 rvtest_data_end +80007150 g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029500 g .tohost 00000000 fromhost +80029400 g .tohost 00000000 tohost +80007410 g .text.rvtest 00000000 rvtest_fail_summary +800074c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x5fbf82a6 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x84871211 +80000048: 0001a303 lw x6,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknd_aes32dsi_cg_cp_rs1_b0: + aes32dsi x9, x0, x6, 3 # perform operation +80000050: ea6004b3 aes32dsi x9,x0,x6,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b0, Zknd_aes32dsi_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00920863 beq x4,x9,80000068 +8000005c: 1a4082ef jal x5,80008200 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x756cee38 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x4dd06068 +80000074: 0001ad83 lw x27,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknd_aes32dsi_cg_cp_rs1_b1: + aes32dsi x18, x1, x27, 1 # perform operation +8000007c: 6bb08933 aes32dsi x18,x1,x27,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknd_aes32dsi_cg_cp_rs1_b1, Zknd_aes32dsi_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01220863 beq x4,x18,80000094 +80000088: 178082ef jal x5,80008200 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d845 .word 0x8000d845 +80000094: 00410113 addi x2,x2,4 + + mv x6, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010313 addi x6,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xbcd99c8c +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x95b3c933 +800000a4: 0001ab83 lw x23,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknd_aes32dsi_cg_cp_rs1_b2: + aes32dsi x31, x2, x23, 2 # perform operation +800000ac: ab710fb3 aes32dsi x31,x2,x23,0x2 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zknd_aes32dsi_cg_cp_rs1_b2, Zknd_aes32dsi_cg_cp_rs1_b2_str) +800000b0: 00032203 lw x4,0(x6) +800000b4: 01f20863 beq x4,x31,800000c4 +800000b8: 148082ef jal x5,80008200 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d87a .word 0x8000d87a +800000c4: 00430313 addi x6,x6,4 + + mv x9, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018493 addi x9,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x33a5c49b +800000cc: 0004a183 lw x3,0(x9) +800000d0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x83a30df7 +800000d4: 0004aa83 lw x21,0(x9) +800000d8: 00448493 addi x9,x9,4 + +800000dc : +Zknd_aes32dsi_cg_cp_rs1_b3: + aes32dsi x31, x3, x21, 3 # perform operation +800000dc: eb518fb3 aes32dsi x31,x3,x21,0x3 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zknd_aes32dsi_cg_cp_rs1_b3, Zknd_aes32dsi_cg_cp_rs1_b3_str) +800000e0: 00032203 lw x4,0(x6) +800000e4: 01f20863 beq x4,x31,800000f4 +800000e8: 118082ef jal x5,80008200 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8af .word 0x8000d8af +800000f4: 00430313 addi x6,x6,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xc1316ad3 +80000100: 0004a203 lw x4,0(x9) +80000104: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x03e87dac +80000108: 0004a983 lw x19,0(x9) +8000010c: 00448493 addi x9,x9,4 + +80000110 : +Zknd_aes32dsi_cg_cp_rs1_b4: + aes32dsi x15, x4, x19, 2 # perform operation +80000110: ab3207b3 aes32dsi x15,x4,x19,0x2 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zknd_aes32dsi_cg_cp_rs1_b4, Zknd_aes32dsi_cg_cp_rs1_b4_str) +80000114: 00032383 lw x7,0(x6) +80000118: 00f38863 beq x7,x15,80000128 +8000011c: 0fc0846f jal x8,80008218 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8e4 .word 0x8000d8e4 +80000128: 00430313 addi x6,x6,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x55cad68c +8000012c: 0004a283 lw x5,0(x9) +80000130: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xdd0d235b +80000134: 0004ae03 lw x28,0(x9) +80000138: 00448493 addi x9,x9,4 + +8000013c : +Zknd_aes32dsi_cg_cp_rs1_b5: + aes32dsi x4, x5, x28, 3 # perform operation +8000013c: ebc28233 aes32dsi x4,x5,x28,0x3 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zknd_aes32dsi_cg_cp_rs1_b5, Zknd_aes32dsi_cg_cp_rs1_b5_str) +80000140: 00032383 lw x7,0(x6) +80000144: 00438863 beq x7,x4,80000154 +80000148: 0d00846f jal x8,80008218 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d919 .word 0x8000d919 +80000154: 00430313 addi x6,x6,4 + + mv x2, x6 # switch signature pointer register to avoid conflict with test +80000158: 00030113 addi x2,x6,0 +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xee731a28 +8000015c: 0004a303 lw x6,0(x9) +80000160: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x0e62b453 +80000164: 0004aa83 lw x21,0(x9) +80000168: 00448493 addi x9,x9,4 + +8000016c : +Zknd_aes32dsi_cg_cp_rs1_b6: + aes32dsi x11, x6, x21, 1 # perform operation +8000016c: 6b5305b3 aes32dsi x11,x6,x21,0x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cp_rs1_b6, Zknd_aes32dsi_cg_cp_rs1_b6_str) +80000170: 00012383 lw x7,0(x2) +80000174: 00b38863 beq x7,x11,80000184 +80000178: 0a00846f jal x8,80008218 +8000017c: 8000016c .word 0x8000016c +80000180: 8000d94e .word 0x8000d94e +80000184: 00410113 addi x2,x2,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000188: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +8000018c: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xc52e4785 +80000190: 0004a383 lw x7,0(x9) +80000194: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x130e16d0 +80000198: 0004a503 lw x10,0(x9) +8000019c: 00448493 addi x9,x9,4 + +800001a0 : +Zknd_aes32dsi_cg_cp_rs1_b7: + aes32dsi x5, x7, x10, 1 # perform operation +800001a0: 6aa382b3 aes32dsi x5,x7,x10,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x5, Zknd_aes32dsi_cg_cp_rs1_b7, Zknd_aes32dsi_cg_cp_rs1_b7_str) +800001a4: 00012683 lw x13,0(x2) +800001a8: 00568863 beq x13,x5,800001b8 +800001ac: 0940876f jal x14,80008240 +800001b0: 800001a0 .word 0x800001a0 +800001b4: 8000d983 .word 0x8000d983 +800001b8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x98462357 +800001bc: 0004a403 lw x8,0(x9) +800001c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x8c4da23d +800001c4: 0004aa83 lw x21,0(x9) +800001c8: 00448493 addi x9,x9,4 + +800001cc : +Zknd_aes32dsi_cg_cp_rs1_b8: + aes32dsi x17, x8, x21, 1 # perform operation +800001cc: 6b5408b3 aes32dsi x17,x8,x21,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x17, Zknd_aes32dsi_cg_cp_rs1_b8, Zknd_aes32dsi_cg_cp_rs1_b8_str) +800001d0: 00012683 lw x13,0(x2) +800001d4: 01168863 beq x13,x17,800001e4 +800001d8: 0680876f jal x14,80008240 +800001dc: 800001cc .word 0x800001cc +800001e0: 8000d9b8 .word 0x8000d9b8 +800001e4: 00410113 addi x2,x2,4 + + mv x31, x9 # switch data pointer register to avoid conflict with test +800001e8: 00048f93 addi x31,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x869aaa93 +800001ec: 000fa483 lw x9,0(x31) +800001f0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0xc49f6a8e +800001f4: 000fa903 lw x18,0(x31) +800001f8: 004f8f93 addi x31,x31,4 + +800001fc : +Zknd_aes32dsi_cg_cp_rs1_b9: + aes32dsi x8, x9, x18, 0 # perform operation +800001fc: 2b248433 aes32dsi x8,x9,x18,0x0 + # Check if x8 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x8, Zknd_aes32dsi_cg_cp_rs1_b9, Zknd_aes32dsi_cg_cp_rs1_b9_str) +80000200: 00012683 lw x13,0(x2) +80000204: 00868863 beq x13,x8,80000214 +80000208: 0380876f jal x14,80008240 +8000020c: 800001fc .word 0x800001fc +80000210: 8000d9ed .word 0x8000d9ed +80000214: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x9da9faec +80000218: 000fa503 lw x10,0(x31) +8000021c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x38e7abc7 +80000220: 000fa903 lw x18,0(x31) +80000224: 004f8f93 addi x31,x31,4 + +80000228 : +Zknd_aes32dsi_cg_cp_rs1_b10: + aes32dsi x20, x10, x18, 0 # perform operation +80000228: 2b250a33 aes32dsi x20,x10,x18,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x20, Zknd_aes32dsi_cg_cp_rs1_b10, Zknd_aes32dsi_cg_cp_rs1_b10_str) +8000022c: 00012683 lw x13,0(x2) +80000230: 01468863 beq x13,x20,80000240 +80000234: 00c0876f jal x14,80008240 +80000238: 80000228 .word 0x80000228 +8000023c: 8000da23 .word 0x8000da23 +80000240: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x14e9493c +80000244: 000fa583 lw x11,0(x31) +80000248: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x1078547a +8000024c: 000fab03 lw x22,0(x31) +80000250: 004f8f93 addi x31,x31,4 + +80000254 : +Zknd_aes32dsi_cg_cp_rs1_b11: + aes32dsi x5, x11, x22, 2 # perform operation +80000254: ab6582b3 aes32dsi x5,x11,x22,0x2 + # Check if x5 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x5, Zknd_aes32dsi_cg_cp_rs1_b11, Zknd_aes32dsi_cg_cp_rs1_b11_str) +80000258: 00012683 lw x13,0(x2) +8000025c: 00568863 beq x13,x5,8000026c +80000260: 7e10776f jal x14,80008240 +80000264: 80000254 .word 0x80000254 +80000268: 8000da5a .word 0x8000da5a +8000026c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x3150f532 +80000270: 000fa603 lw x12,0(x31) +80000274: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x98480d0d +80000278: 000fa583 lw x11,0(x31) +8000027c: 004f8f93 addi x31,x31,4 + +80000280 : +Zknd_aes32dsi_cg_cp_rs1_b12: + aes32dsi x26, x12, x11, 0 # perform operation +80000280: 2ab60d33 aes32dsi x26,x12,x11,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x26, Zknd_aes32dsi_cg_cp_rs1_b12, Zknd_aes32dsi_cg_cp_rs1_b12_str) +80000284: 00012683 lw x13,0(x2) +80000288: 01a68863 beq x13,x26,80000298 +8000028c: 7b50776f jal x14,80008240 +80000290: 80000280 .word 0x80000280 +80000294: 8000da91 .word 0x8000da91 +80000298: 00410113 addi x2,x2,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000029c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800002a0: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x148b2ba8 +800002a4: 000fa683 lw x13,0(x31) +800002a8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0xda8a939f +800002ac: 000fa703 lw x14,0(x31) +800002b0: 004f8f93 addi x31,x31,4 + +800002b4 : +Zknd_aes32dsi_cg_cp_rs1_b13: + aes32dsi x24, x13, x14, 1 # perform operation +800002b4: 6ae68c33 aes32dsi x24,x13,x14,0x1 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknd_aes32dsi_cg_cp_rs1_b13, Zknd_aes32dsi_cg_cp_rs1_b13_str) +800002b8: 00012203 lw x4,0(x2) +800002bc: 01820863 beq x4,x24,800002cc +800002c0: 741072ef jal x5,80008200 +800002c4: 800002b4 .word 0x800002b4 +800002c8: 8000dac8 .word 0x8000dac8 +800002cc: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x42a87aec +800002d0: 000fa703 lw x14,0(x31) +800002d4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0xe09aae47 +800002d8: 000fa803 lw x16,0(x31) +800002dc: 004f8f93 addi x31,x31,4 + +800002e0 : +Zknd_aes32dsi_cg_cp_rs1_b14: + aes32dsi x29, x14, x16, 0 # perform operation +800002e0: 2b070eb3 aes32dsi x29,x14,x16,0x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes32dsi_cg_cp_rs1_b14, Zknd_aes32dsi_cg_cp_rs1_b14_str) +800002e4: 00012203 lw x4,0(x2) +800002e8: 01d20863 beq x4,x29,800002f8 +800002ec: 715072ef jal x5,80008200 +800002f0: 800002e0 .word 0x800002e0 +800002f4: 8000daff .word 0x8000daff +800002f8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x54303c24 +800002fc: 000fa783 lw x15,0(x31) +80000300: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x81536d7f +80000304: 000fab83 lw x23,0(x31) +80000308: 004f8f93 addi x31,x31,4 + +8000030c : +Zknd_aes32dsi_cg_cp_rs1_b15: + aes32dsi x9, x15, x23, 1 # perform operation +8000030c: 6b7784b3 aes32dsi x9,x15,x23,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b15, Zknd_aes32dsi_cg_cp_rs1_b15_str) +80000310: 00012203 lw x4,0(x2) +80000314: 00920863 beq x4,x9,80000324 +80000318: 6e9072ef jal x5,80008200 +8000031c: 8000030c .word 0x8000030c +80000320: 8000db36 .word 0x8000db36 +80000324: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x3a2b4ca1 +80000328: 000fa803 lw x16,0(x31) +8000032c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x375628ab +80000330: 000fa383 lw x7,0(x31) +80000334: 004f8f93 addi x31,x31,4 + +80000338 : +Zknd_aes32dsi_cg_cp_rs1_b16: + aes32dsi x12, x16, x7, 0 # perform operation +80000338: 2a780633 aes32dsi x12,x16,x7,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknd_aes32dsi_cg_cp_rs1_b16, Zknd_aes32dsi_cg_cp_rs1_b16_str) +8000033c: 00012203 lw x4,0(x2) +80000340: 00c20863 beq x4,x12,80000350 +80000344: 6bd072ef jal x5,80008200 +80000348: 80000338 .word 0x80000338 +8000034c: 8000db6d .word 0x8000db6d +80000350: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x98b43c36 +80000354: 000fa883 lw x17,0(x31) +80000358: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0xeed02c6b +8000035c: 000fa383 lw x7,0(x31) +80000360: 004f8f93 addi x31,x31,4 + +80000364 : +Zknd_aes32dsi_cg_cp_rs1_b17: + aes32dsi x29, x17, x7, 1 # perform operation +80000364: 6a788eb3 aes32dsi x29,x17,x7,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes32dsi_cg_cp_rs1_b17, Zknd_aes32dsi_cg_cp_rs1_b17_str) +80000368: 00012203 lw x4,0(x2) +8000036c: 01d20863 beq x4,x29,8000037c +80000370: 691072ef jal x5,80008200 +80000374: 80000364 .word 0x80000364 +80000378: 8000dba4 .word 0x8000dba4 +8000037c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x4af99a6c +80000380: 000fa903 lw x18,0(x31) +80000384: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x2e8f0dd4 +80000388: 000fae03 lw x28,0(x31) +8000038c: 004f8f93 addi x31,x31,4 + +80000390 : +Zknd_aes32dsi_cg_cp_rs1_b18: + aes32dsi x13, x18, x28, 1 # perform operation +80000390: 6bc906b3 aes32dsi x13,x18,x28,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknd_aes32dsi_cg_cp_rs1_b18, Zknd_aes32dsi_cg_cp_rs1_b18_str) +80000394: 00012203 lw x4,0(x2) +80000398: 00d20863 beq x4,x13,800003a8 +8000039c: 665072ef jal x5,80008200 +800003a0: 80000390 .word 0x80000390 +800003a4: 8000dbdb .word 0x8000dbdb +800003a8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x16085049 +800003ac: 000fa983 lw x19,0(x31) +800003b0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0xfef5c1d3 +800003b4: 000fa303 lw x6,0(x31) +800003b8: 004f8f93 addi x31,x31,4 + +800003bc : +Zknd_aes32dsi_cg_cp_rs1_b19: + aes32dsi x17, x19, x6, 1 # perform operation +800003bc: 6a6988b3 aes32dsi x17,x19,x6,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zknd_aes32dsi_cg_cp_rs1_b19, Zknd_aes32dsi_cg_cp_rs1_b19_str) +800003c0: 00012203 lw x4,0(x2) +800003c4: 01120863 beq x4,x17,800003d4 +800003c8: 639072ef jal x5,80008200 +800003cc: 800003bc .word 0x800003bc +800003d0: 8000dc12 .word 0x8000dc12 +800003d4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xca1b7581 +800003d8: 000faa03 lw x20,0(x31) +800003dc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x2923d6e0 +800003e0: 000fa803 lw x16,0(x31) +800003e4: 004f8f93 addi x31,x31,4 + +800003e8 : +Zknd_aes32dsi_cg_cp_rs1_b20: + aes32dsi x25, x20, x16, 2 # perform operation +800003e8: ab0a0cb3 aes32dsi x25,x20,x16,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknd_aes32dsi_cg_cp_rs1_b20, Zknd_aes32dsi_cg_cp_rs1_b20_str) +800003ec: 00012203 lw x4,0(x2) +800003f0: 01920863 beq x4,x25,80000400 +800003f4: 60d072ef jal x5,80008200 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 8000dc49 .word 0x8000dc49 +80000400: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xf4d450d9 +80000404: 000faa83 lw x21,0(x31) +80000408: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x8efb8251 +8000040c: 000fab03 lw x22,0(x31) +80000410: 004f8f93 addi x31,x31,4 + +80000414 : +Zknd_aes32dsi_cg_cp_rs1_b21: + aes32dsi x13, x21, x22, 2 # perform operation +80000414: ab6a86b3 aes32dsi x13,x21,x22,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknd_aes32dsi_cg_cp_rs1_b21, Zknd_aes32dsi_cg_cp_rs1_b21_str) +80000418: 00012203 lw x4,0(x2) +8000041c: 00d20863 beq x4,x13,8000042c +80000420: 5e1072ef jal x5,80008200 +80000424: 80000414 .word 0x80000414 +80000428: 8000dc80 .word 0x8000dc80 +8000042c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x269adb16 +80000430: 000fab03 lw x22,0(x31) +80000434: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x76736eeb +80000438: 000fac83 lw x25,0(x31) +8000043c: 004f8f93 addi x31,x31,4 + +80000440 : +Zknd_aes32dsi_cg_cp_rs1_b22: + aes32dsi x15, x22, x25, 2 # perform operation +80000440: ab9b07b3 aes32dsi x15,x22,x25,0x2 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zknd_aes32dsi_cg_cp_rs1_b22, Zknd_aes32dsi_cg_cp_rs1_b22_str) +80000444: 00012203 lw x4,0(x2) +80000448: 00f20863 beq x4,x15,80000458 +8000044c: 5b5072ef jal x5,80008200 +80000450: 80000440 .word 0x80000440 +80000454: 8000dcb7 .word 0x8000dcb7 +80000458: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x44627c5c +8000045c: 000fab83 lw x23,0(x31) +80000460: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x9310e43f +80000464: 000fa803 lw x16,0(x31) +80000468: 004f8f93 addi x31,x31,4 + +8000046c : +Zknd_aes32dsi_cg_cp_rs1_b23: + aes32dsi x19, x23, x16, 0 # perform operation +8000046c: 2b0b89b3 aes32dsi x19,x23,x16,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknd_aes32dsi_cg_cp_rs1_b23, Zknd_aes32dsi_cg_cp_rs1_b23_str) +80000470: 00012203 lw x4,0(x2) +80000474: 01320863 beq x4,x19,80000484 +80000478: 589072ef jal x5,80008200 +8000047c: 8000046c .word 0x8000046c +80000480: 8000dcee .word 0x8000dcee +80000484: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xf5846e09 +80000488: 000fac03 lw x24,0(x31) +8000048c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x78a3734e +80000490: 000fad03 lw x26,0(x31) +80000494: 004f8f93 addi x31,x31,4 + +80000498 : +Zknd_aes32dsi_cg_cp_rs1_b24: + aes32dsi x9, x24, x26, 0 # perform operation +80000498: 2bac04b3 aes32dsi x9,x24,x26,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b24, Zknd_aes32dsi_cg_cp_rs1_b24_str) +8000049c: 00012203 lw x4,0(x2) +800004a0: 00920863 beq x4,x9,800004b0 +800004a4: 55d072ef jal x5,80008200 +800004a8: 80000498 .word 0x80000498 +800004ac: 8000dd25 .word 0x8000dd25 +800004b0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x7db6efdf +800004b4: 000fac83 lw x25,0(x31) +800004b8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x00d5769b +800004bc: 000fa083 lw x1,0(x31) +800004c0: 004f8f93 addi x31,x31,4 + +800004c4 : +Zknd_aes32dsi_cg_cp_rs1_b25: + aes32dsi x9, x25, x1, 1 # perform operation +800004c4: 6a1c84b3 aes32dsi x9,x25,x1,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b25, Zknd_aes32dsi_cg_cp_rs1_b25_str) +800004c8: 00012203 lw x4,0(x2) +800004cc: 00920863 beq x4,x9,800004dc +800004d0: 531072ef jal x5,80008200 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 8000dd5c .word 0x8000dd5c +800004dc: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x7016847f +800004e0: 000fad03 lw x26,0(x31) +800004e4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xb1b0ca6b +800004e8: 000fad83 lw x27,0(x31) +800004ec: 004f8f93 addi x31,x31,4 + +800004f0 : +Zknd_aes32dsi_cg_cp_rs1_b26: + aes32dsi x16, x26, x27, 1 # perform operation +800004f0: 6bbd0833 aes32dsi x16,x26,x27,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknd_aes32dsi_cg_cp_rs1_b26, Zknd_aes32dsi_cg_cp_rs1_b26_str) +800004f4: 00012203 lw x4,0(x2) +800004f8: 01020863 beq x4,x16,80000508 +800004fc: 505072ef jal x5,80008200 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000dd93 .word 0x8000dd93 +80000508: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x8b964ed5 +8000050c: 000fad83 lw x27,0(x31) +80000510: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x01a2de84 +80000514: 000fae83 lw x29,0(x31) +80000518: 004f8f93 addi x31,x31,4 + +8000051c : +Zknd_aes32dsi_cg_cp_rs1_b27: + aes32dsi x9, x27, x29, 3 # perform operation +8000051c: ebdd84b3 aes32dsi x9,x27,x29,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b27, Zknd_aes32dsi_cg_cp_rs1_b27_str) +80000520: 00012203 lw x4,0(x2) +80000524: 00920863 beq x4,x9,80000534 +80000528: 4d9072ef jal x5,80008200 +8000052c: 8000051c .word 0x8000051c +80000530: 8000ddca .word 0x8000ddca +80000534: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x3eb678fd +80000538: 000fae03 lw x28,0(x31) +8000053c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x40b69d2d +80000540: 000fa803 lw x16,0(x31) +80000544: 004f8f93 addi x31,x31,4 + +80000548 : +Zknd_aes32dsi_cg_cp_rs1_b28: + aes32dsi x25, x28, x16, 3 # perform operation +80000548: eb0e0cb3 aes32dsi x25,x28,x16,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknd_aes32dsi_cg_cp_rs1_b28, Zknd_aes32dsi_cg_cp_rs1_b28_str) +8000054c: 00012203 lw x4,0(x2) +80000550: 01920863 beq x4,x25,80000560 +80000554: 4ad072ef jal x5,80008200 +80000558: 80000548 .word 0x80000548 +8000055c: 8000de01 .word 0x8000de01 +80000560: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xb1e80ab3 +80000564: 000fae83 lw x29,0(x31) +80000568: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x7026dd04 +8000056c: 000fa303 lw x6,0(x31) +80000570: 004f8f93 addi x31,x31,4 + +80000574 : +Zknd_aes32dsi_cg_cp_rs1_b29: + aes32dsi x7, x29, x6, 1 # perform operation +80000574: 6a6e83b3 aes32dsi x7,x29,x6,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zknd_aes32dsi_cg_cp_rs1_b29, Zknd_aes32dsi_cg_cp_rs1_b29_str) +80000578: 00012203 lw x4,0(x2) +8000057c: 00720863 beq x4,x7,8000058c +80000580: 481072ef jal x5,80008200 +80000584: 80000574 .word 0x80000574 +80000588: 8000de38 .word 0x8000de38 +8000058c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x7707c8ac +80000590: 000faf03 lw x30,0(x31) +80000594: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x9ce429ec +80000598: 000fa583 lw x11,0(x31) +8000059c: 004f8f93 addi x31,x31,4 + +800005a0 : +Zknd_aes32dsi_cg_cp_rs1_b30: + aes32dsi x9, x30, x11, 2 # perform operation +800005a0: aabf04b3 aes32dsi x9,x30,x11,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs1_b30, Zknd_aes32dsi_cg_cp_rs1_b30_str) +800005a4: 00012203 lw x4,0(x2) +800005a8: 00920863 beq x4,x9,800005b8 +800005ac: 455072ef jal x5,80008200 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 8000de6f .word 0x8000de6f +800005b8: 00410113 addi x2,x2,4 + + mv x11, x31 # switch data pointer register to avoid conflict with test +800005bc: 000f8593 addi x11,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xcdc01b58 +800005c0: 0005af83 lw x31,0(x11) +800005c4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x63be2080 +800005c8: 0005a883 lw x17,0(x11) +800005cc: 00458593 addi x11,x11,4 + +800005d0 : +Zknd_aes32dsi_cg_cp_rs1_b31: + aes32dsi x29, x31, x17, 2 # perform operation +800005d0: ab1f8eb3 aes32dsi x29,x31,x17,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes32dsi_cg_cp_rs1_b31, Zknd_aes32dsi_cg_cp_rs1_b31_str) +800005d4: 00012203 lw x4,0(x2) +800005d8: 01d20863 beq x4,x29,800005e8 +800005dc: 425072ef jal x5,80008200 +800005e0: 800005d0 .word 0x800005d0 +800005e4: 8000dea6 .word 0x8000dea6 +800005e8: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0xbc172925 +800005ec: 0005a403 lw x8,0(x11) +800005f0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x433557ca +800005f4: 0005a003 lw x0,0(x11) +800005f8: 00458593 addi x11,x11,4 + +800005fc : +Zknd_aes32dsi_cg_cp_rs2_b0: + aes32dsi x30, x8, x0, 3 # perform operation +800005fc: ea040f33 aes32dsi x30,x8,x0,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknd_aes32dsi_cg_cp_rs2_b0, Zknd_aes32dsi_cg_cp_rs2_b0_str) +80000600: 00012203 lw x4,0(x2) +80000604: 01e20863 beq x4,x30,80000614 +80000608: 3f9072ef jal x5,80008200 +8000060c: 800005fc .word 0x800005fc +80000610: 8000dedd .word 0x8000dedd +80000614: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x9449a0a7 +80000618: 0005aa03 lw x20,0(x11) +8000061c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x96aafb50 +80000620: 0005a083 lw x1,0(x11) +80000624: 00458593 addi x11,x11,4 + +80000628 : +Zknd_aes32dsi_cg_cp_rs2_b1: + aes32dsi x12, x20, x1, 2 # perform operation +80000628: aa1a0633 aes32dsi x12,x20,x1,0x2 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknd_aes32dsi_cg_cp_rs2_b1, Zknd_aes32dsi_cg_cp_rs2_b1_str) +8000062c: 00012203 lw x4,0(x2) +80000630: 00c20863 beq x4,x12,80000640 +80000634: 3cd072ef jal x5,80008200 +80000638: 80000628 .word 0x80000628 +8000063c: 8000df13 .word 0x8000df13 +80000640: 00410113 addi x2,x2,4 + + mv x26, x2 # switch signature pointer register to avoid conflict with test +80000644: 00010d13 addi x26,x2,0 +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x7870948b +80000648: 0005a903 lw x18,0(x11) +8000064c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x4a475a71 +80000650: 0005a103 lw x2,0(x11) +80000654: 00458593 addi x11,x11,4 + +80000658 : +Zknd_aes32dsi_cg_cp_rs2_b2: + aes32dsi x0, x18, x2, 2 # perform operation +80000658: aa290033 aes32dsi x0,x18,x2,0x2 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknd_aes32dsi_cg_cp_rs2_b2, Zknd_aes32dsi_cg_cp_rs2_b2_str) +8000065c: 000d2203 lw x4,0(x26) +80000660: 00020863 beq x4,x0,80000670 +80000664: 39d072ef jal x5,80008200 +80000668: 80000658 .word 0x80000658 +8000066c: 8000df49 .word 0x8000df49 +80000670: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x88a8959c +80000674: 0005ab03 lw x22,0(x11) +80000678: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x885002ee +8000067c: 0005a183 lw x3,0(x11) +80000680: 00458593 addi x11,x11,4 + +80000684 : +Zknd_aes32dsi_cg_cp_rs2_b3: + aes32dsi x15, x22, x3, 2 # perform operation +80000684: aa3b07b3 aes32dsi x15,x22,x3,0x2 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknd_aes32dsi_cg_cp_rs2_b3, Zknd_aes32dsi_cg_cp_rs2_b3_str) +80000688: 000d2203 lw x4,0(x26) +8000068c: 00f20863 beq x4,x15,8000069c +80000690: 371072ef jal x5,80008200 +80000694: 80000684 .word 0x80000684 +80000698: 8000df7f .word 0x8000df7f +8000069c: 004d0d13 addi x26,x26,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800006a0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800006a4: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x22ddbf51 +800006a8: 0005a683 lw x13,0(x11) +800006ac: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x9c08707a +800006b0: 0005a203 lw x4,0(x11) +800006b4: 00458593 addi x11,x11,4 + +800006b8 : +Zknd_aes32dsi_cg_cp_rs2_b4: + aes32dsi x21, x13, x4, 3 # perform operation +800006b8: ea468ab3 aes32dsi x21,x13,x4,0x3 + # Check if x21 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x21, Zknd_aes32dsi_cg_cp_rs2_b4, Zknd_aes32dsi_cg_cp_rs2_b4_str) +800006bc: 000d2383 lw x7,0(x26) +800006c0: 01538863 beq x7,x21,800006d0 +800006c4: 3550746f jal x8,80008218 +800006c8: 800006b8 .word 0x800006b8 +800006cc: 8000dfb5 .word 0x8000dfb5 +800006d0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x4836088c +800006d4: 0005a503 lw x10,0(x11) +800006d8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xe4a2da62 +800006dc: 0005a283 lw x5,0(x11) +800006e0: 00458593 addi x11,x11,4 + +800006e4 : +Zknd_aes32dsi_cg_cp_rs2_b5: + aes32dsi x24, x10, x5, 3 # perform operation +800006e4: ea550c33 aes32dsi x24,x10,x5,0x3 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zknd_aes32dsi_cg_cp_rs2_b5, Zknd_aes32dsi_cg_cp_rs2_b5_str) +800006e8: 000d2383 lw x7,0(x26) +800006ec: 01838863 beq x7,x24,800006fc +800006f0: 3290746f jal x8,80008218 +800006f4: 800006e4 .word 0x800006e4 +800006f8: 8000dfeb .word 0x8000dfeb +800006fc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0xdae8ef8b +80000700: 0005af03 lw x30,0(x11) +80000704: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x91d6166e +80000708: 0005a303 lw x6,0(x11) +8000070c: 00458593 addi x11,x11,4 + +80000710 : +Zknd_aes32dsi_cg_cp_rs2_b6: + aes32dsi x12, x30, x6, 1 # perform operation +80000710: 6a6f0633 aes32dsi x12,x30,x6,0x1 + # Check if x12 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x12, Zknd_aes32dsi_cg_cp_rs2_b6, Zknd_aes32dsi_cg_cp_rs2_b6_str) +80000714: 000d2383 lw x7,0(x26) +80000718: 00c38863 beq x7,x12,80000728 +8000071c: 2fd0746f jal x8,80008218 +80000720: 80000710 .word 0x80000710 +80000724: 8000e021 .word 0x8000e021 +80000728: 004d0d13 addi x26,x26,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000072c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000730: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x87fa040a +80000734: 0005a083 lw x1,0(x11) +80000738: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0xa7f38ea2 +8000073c: 0005a383 lw x7,0(x11) +80000740: 00458593 addi x11,x11,4 + +80000744 : +Zknd_aes32dsi_cg_cp_rs2_b7: + aes32dsi x23, x1, x7, 3 # perform operation +80000744: ea708bb3 aes32dsi x23,x1,x7,0x3 + # Check if x23 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x23, Zknd_aes32dsi_cg_cp_rs2_b7, Zknd_aes32dsi_cg_cp_rs2_b7_str) +80000748: 000d2683 lw x13,0(x26) +8000074c: 01768863 beq x13,x23,8000075c +80000750: 2f10776f jal x14,80008240 +80000754: 80000744 .word 0x80000744 +80000758: 8000e057 .word 0x8000e057 +8000075c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0xc9a0ad4f +80000760: 0005ab83 lw x23,0(x11) +80000764: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0x564d095d +80000768: 0005a403 lw x8,0(x11) +8000076c: 00458593 addi x11,x11,4 + +80000770 : +Zknd_aes32dsi_cg_cp_rs2_b8: + aes32dsi x19, x23, x8, 1 # perform operation +80000770: 6a8b89b3 aes32dsi x19,x23,x8,0x1 + # Check if x19 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x19, Zknd_aes32dsi_cg_cp_rs2_b8, Zknd_aes32dsi_cg_cp_rs2_b8_str) +80000774: 000d2683 lw x13,0(x26) +80000778: 01368863 beq x13,x19,80000788 +8000077c: 2c50776f jal x14,80008240 +80000780: 80000770 .word 0x80000770 +80000784: 8000e08d .word 0x8000e08d +80000788: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0x6e587c3d +8000078c: 0005a003 lw x0,0(x11) +80000790: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0xe50c7b1d +80000794: 0005a483 lw x9,0(x11) +80000798: 00458593 addi x11,x11,4 + +8000079c : +Zknd_aes32dsi_cg_cp_rs2_b9: + aes32dsi x17, x0, x9, 2 # perform operation +8000079c: aa9008b3 aes32dsi x17,x0,x9,0x2 + # Check if x17 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x17, Zknd_aes32dsi_cg_cp_rs2_b9, Zknd_aes32dsi_cg_cp_rs2_b9_str) +800007a0: 000d2683 lw x13,0(x26) +800007a4: 01168863 beq x13,x17,800007b4 +800007a8: 2990776f jal x14,80008240 +800007ac: 8000079c .word 0x8000079c +800007b0: 8000e0c3 .word 0x8000e0c3 +800007b4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x121c85c5 +800007b8: 0005a403 lw x8,0(x11) +800007bc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x81b6916e +800007c0: 0005a503 lw x10,0(x11) +800007c4: 00458593 addi x11,x11,4 + +800007c8 : +Zknd_aes32dsi_cg_cp_rs2_b10: + aes32dsi x0, x8, x10, 2 # perform operation +800007c8: aaa40033 aes32dsi x0,x8,x10,0x2 + # Check if x0 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x0, Zknd_aes32dsi_cg_cp_rs2_b10, Zknd_aes32dsi_cg_cp_rs2_b10_str) +800007cc: 000d2683 lw x13,0(x26) +800007d0: 00068863 beq x13,x0,800007e0 +800007d4: 26d0776f jal x14,80008240 +800007d8: 800007c8 .word 0x800007c8 +800007dc: 8000e0f9 .word 0x8000e0f9 +800007e0: 004d0d13 addi x26,x26,4 + + mv x15, x11 # switch data pointer register to avoid conflict with test +800007e4: 00058793 addi x15,x11,0 +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x09d24cca +800007e8: 0007a383 lw x7,0(x15) +800007ec: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x05c5ba2c +800007f0: 0007a583 lw x11,0(x15) +800007f4: 00478793 addi x15,x15,4 + +800007f8 : +Zknd_aes32dsi_cg_cp_rs2_b11: + aes32dsi x20, x7, x11, 0 # perform operation +800007f8: 2ab38a33 aes32dsi x20,x7,x11,0x0 + # Check if x20 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x20, Zknd_aes32dsi_cg_cp_rs2_b11, Zknd_aes32dsi_cg_cp_rs2_b11_str) +800007fc: 000d2683 lw x13,0(x26) +80000800: 01468863 beq x13,x20,80000810 +80000804: 23d0776f jal x14,80008240 +80000808: 800007f8 .word 0x800007f8 +8000080c: 8000e130 .word 0x8000e130 +80000810: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xd6b6bf99 +80000814: 0007a083 lw x1,0(x15) +80000818: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xbaff2883 +8000081c: 0007a603 lw x12,0(x15) +80000820: 00478793 addi x15,x15,4 + +80000824 : +Zknd_aes32dsi_cg_cp_rs2_b12: + aes32dsi x22, x1, x12, 0 # perform operation +80000824: 2ac08b33 aes32dsi x22,x1,x12,0x0 + # Check if x22 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x22, Zknd_aes32dsi_cg_cp_rs2_b12, Zknd_aes32dsi_cg_cp_rs2_b12_str) +80000828: 000d2683 lw x13,0(x26) +8000082c: 01668863 beq x13,x22,8000083c +80000830: 2110776f jal x14,80008240 +80000834: 80000824 .word 0x80000824 +80000838: 8000e167 .word 0x8000e167 +8000083c: 004d0d13 addi x26,x26,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000840: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000844: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x09728c21 +80000848: 0007a483 lw x9,0(x15) +8000084c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xd69cc5ad +80000850: 0007a683 lw x13,0(x15) +80000854: 00478793 addi x15,x15,4 + +80000858 : +Zknd_aes32dsi_cg_cp_rs2_b13: + aes32dsi x14, x9, x13, 0 # perform operation +80000858: 2ad48733 aes32dsi x14,x9,x13,0x0 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zknd_aes32dsi_cg_cp_rs2_b13, Zknd_aes32dsi_cg_cp_rs2_b13_str) +8000085c: 000d2203 lw x4,0(x26) +80000860: 00e20863 beq x4,x14,80000870 +80000864: 19d072ef jal x5,80008200 +80000868: 80000858 .word 0x80000858 +8000086c: 8000e19e .word 0x8000e19e +80000870: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x6fb6a27f +80000874: 0007a183 lw x3,0(x15) +80000878: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x6f7da182 +8000087c: 0007a703 lw x14,0(x15) +80000880: 00478793 addi x15,x15,4 + +80000884 : +Zknd_aes32dsi_cg_cp_rs2_b14: + aes32dsi x12, x3, x14, 3 # perform operation +80000884: eae18633 aes32dsi x12,x3,x14,0x3 + # Check if x12 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x12, Zknd_aes32dsi_cg_cp_rs2_b14, Zknd_aes32dsi_cg_cp_rs2_b14_str) +80000888: 000d2203 lw x4,0(x26) +8000088c: 00c20863 beq x4,x12,8000089c +80000890: 171072ef jal x5,80008200 +80000894: 80000884 .word 0x80000884 +80000898: 8000e1d5 .word 0x8000e1d5 +8000089c: 004d0d13 addi x26,x26,4 + + mv x6, x15 # switch data pointer register to avoid conflict with test +800008a0: 00078313 addi x6,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x14af599e +800008a4: 00032c03 lw x24,0(x6) +800008a8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xc0cdacb5 +800008ac: 00032783 lw x15,0(x6) +800008b0: 00430313 addi x6,x6,4 + +800008b4 : +Zknd_aes32dsi_cg_cp_rs2_b15: + aes32dsi x8, x24, x15, 3 # perform operation +800008b4: eafc0433 aes32dsi x8,x24,x15,0x3 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zknd_aes32dsi_cg_cp_rs2_b15, Zknd_aes32dsi_cg_cp_rs2_b15_str) +800008b8: 000d2203 lw x4,0(x26) +800008bc: 00820863 beq x4,x8,800008cc +800008c0: 141072ef jal x5,80008200 +800008c4: 800008b4 .word 0x800008b4 +800008c8: 8000e20c .word 0x8000e20c +800008cc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x1544b9f1 +800008d0: 00032883 lw x17,0(x6) +800008d4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xaa56c9f8 +800008d8: 00032803 lw x16,0(x6) +800008dc: 00430313 addi x6,x6,4 + +800008e0 : +Zknd_aes32dsi_cg_cp_rs2_b16: + aes32dsi x1, x17, x16, 3 # perform operation +800008e0: eb0880b3 aes32dsi x1,x17,x16,0x3 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zknd_aes32dsi_cg_cp_rs2_b16, Zknd_aes32dsi_cg_cp_rs2_b16_str) +800008e4: 000d2203 lw x4,0(x26) +800008e8: 00120863 beq x4,x1,800008f8 +800008ec: 115072ef jal x5,80008200 +800008f0: 800008e0 .word 0x800008e0 +800008f4: 8000e243 .word 0x8000e243 +800008f8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0598e1b8 +800008fc: 00032e03 lw x28,0(x6) +80000900: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x8da9de2b +80000904: 00032883 lw x17,0(x6) +80000908: 00430313 addi x6,x6,4 + +8000090c : +Zknd_aes32dsi_cg_cp_rs2_b17: + aes32dsi x14, x28, x17, 0 # perform operation +8000090c: 2b1e0733 aes32dsi x14,x28,x17,0x0 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zknd_aes32dsi_cg_cp_rs2_b17, Zknd_aes32dsi_cg_cp_rs2_b17_str) +80000910: 000d2203 lw x4,0(x26) +80000914: 00e20863 beq x4,x14,80000924 +80000918: 0e9072ef jal x5,80008200 +8000091c: 8000090c .word 0x8000090c +80000920: 8000e27a .word 0x8000e27a +80000924: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x485a6410 +80000928: 00032983 lw x19,0(x6) +8000092c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xe5b35489 +80000930: 00032903 lw x18,0(x6) +80000934: 00430313 addi x6,x6,4 + +80000938 : +Zknd_aes32dsi_cg_cp_rs2_b18: + aes32dsi x29, x19, x18, 1 # perform operation +80000938: 6b298eb3 aes32dsi x29,x19,x18,0x1 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zknd_aes32dsi_cg_cp_rs2_b18, Zknd_aes32dsi_cg_cp_rs2_b18_str) +8000093c: 000d2203 lw x4,0(x26) +80000940: 01d20863 beq x4,x29,80000950 +80000944: 0bd072ef jal x5,80008200 +80000948: 80000938 .word 0x80000938 +8000094c: 8000e2b1 .word 0x8000e2b1 +80000950: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xc9eb85b3 +80000954: 00032403 lw x8,0(x6) +80000958: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xac009bc1 +8000095c: 00032983 lw x19,0(x6) +80000960: 00430313 addi x6,x6,4 + +80000964 : +Zknd_aes32dsi_cg_cp_rs2_b19: + aes32dsi x29, x8, x19, 3 # perform operation +80000964: eb340eb3 aes32dsi x29,x8,x19,0x3 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zknd_aes32dsi_cg_cp_rs2_b19, Zknd_aes32dsi_cg_cp_rs2_b19_str) +80000968: 000d2203 lw x4,0(x26) +8000096c: 01d20863 beq x4,x29,8000097c +80000970: 091072ef jal x5,80008200 +80000974: 80000964 .word 0x80000964 +80000978: 8000e2e8 .word 0x8000e2e8 +8000097c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xafbebb80 +80000980: 00032683 lw x13,0(x6) +80000984: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x3c39da49 +80000988: 00032a03 lw x20,0(x6) +8000098c: 00430313 addi x6,x6,4 + +80000990 : +Zknd_aes32dsi_cg_cp_rs2_b20: + aes32dsi x17, x13, x20, 3 # perform operation +80000990: eb4688b3 aes32dsi x17,x13,x20,0x3 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknd_aes32dsi_cg_cp_rs2_b20, Zknd_aes32dsi_cg_cp_rs2_b20_str) +80000994: 000d2203 lw x4,0(x26) +80000998: 01120863 beq x4,x17,800009a8 +8000099c: 065072ef jal x5,80008200 +800009a0: 80000990 .word 0x80000990 +800009a4: 8000e31f .word 0x8000e31f +800009a8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xe9582765 +800009ac: 00032803 lw x16,0(x6) +800009b0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x96270e7e +800009b4: 00032a83 lw x21,0(x6) +800009b8: 00430313 addi x6,x6,4 + +800009bc : +Zknd_aes32dsi_cg_cp_rs2_b21: + aes32dsi x15, x16, x21, 0 # perform operation +800009bc: 2b5807b3 aes32dsi x15,x16,x21,0x0 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknd_aes32dsi_cg_cp_rs2_b21, Zknd_aes32dsi_cg_cp_rs2_b21_str) +800009c0: 000d2203 lw x4,0(x26) +800009c4: 00f20863 beq x4,x15,800009d4 +800009c8: 039072ef jal x5,80008200 +800009cc: 800009bc .word 0x800009bc +800009d0: 8000e356 .word 0x8000e356 +800009d4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x5cc00ad9 +800009d8: 00032083 lw x1,0(x6) +800009dc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x3d933390 +800009e0: 00032b03 lw x22,0(x6) +800009e4: 00430313 addi x6,x6,4 + +800009e8 : +Zknd_aes32dsi_cg_cp_rs2_b22: + aes32dsi x28, x1, x22, 3 # perform operation +800009e8: eb608e33 aes32dsi x28,x1,x22,0x3 + # Check if x28 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x28, Zknd_aes32dsi_cg_cp_rs2_b22, Zknd_aes32dsi_cg_cp_rs2_b22_str) +800009ec: 000d2203 lw x4,0(x26) +800009f0: 01c20863 beq x4,x28,80000a00 +800009f4: 00d072ef jal x5,80008200 +800009f8: 800009e8 .word 0x800009e8 +800009fc: 8000e38d .word 0x8000e38d +80000a00: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xbc009585 +80000a04: 00032f03 lw x30,0(x6) +80000a08: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xaed2b6ef +80000a0c: 00032b83 lw x23,0(x6) +80000a10: 00430313 addi x6,x6,4 + +80000a14 : +Zknd_aes32dsi_cg_cp_rs2_b23: + aes32dsi x25, x30, x23, 0 # perform operation +80000a14: 2b7f0cb3 aes32dsi x25,x30,x23,0x0 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknd_aes32dsi_cg_cp_rs2_b23, Zknd_aes32dsi_cg_cp_rs2_b23_str) +80000a18: 000d2203 lw x4,0(x26) +80000a1c: 01920863 beq x4,x25,80000a2c +80000a20: 7e0072ef jal x5,80008200 +80000a24: 80000a14 .word 0x80000a14 +80000a28: 8000e3c4 .word 0x8000e3c4 +80000a2c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xad9967e8 +80000a30: 00032983 lw x19,0(x6) +80000a34: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xe3d587e5 +80000a38: 00032c03 lw x24,0(x6) +80000a3c: 00430313 addi x6,x6,4 + +80000a40 : +Zknd_aes32dsi_cg_cp_rs2_b24: + aes32dsi x15, x19, x24, 2 # perform operation +80000a40: ab8987b3 aes32dsi x15,x19,x24,0x2 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknd_aes32dsi_cg_cp_rs2_b24, Zknd_aes32dsi_cg_cp_rs2_b24_str) +80000a44: 000d2203 lw x4,0(x26) +80000a48: 00f20863 beq x4,x15,80000a58 +80000a4c: 7b4072ef jal x5,80008200 +80000a50: 80000a40 .word 0x80000a40 +80000a54: 8000e3fb .word 0x8000e3fb +80000a58: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x9afc3895 +80000a5c: 00032783 lw x15,0(x6) +80000a60: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x332a6e26 +80000a64: 00032c83 lw x25,0(x6) +80000a68: 00430313 addi x6,x6,4 + +80000a6c : +Zknd_aes32dsi_cg_cp_rs2_b25: + aes32dsi x21, x15, x25, 2 # perform operation +80000a6c: ab978ab3 aes32dsi x21,x15,x25,0x2 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zknd_aes32dsi_cg_cp_rs2_b25, Zknd_aes32dsi_cg_cp_rs2_b25_str) +80000a70: 000d2203 lw x4,0(x26) +80000a74: 01520863 beq x4,x21,80000a84 +80000a78: 788072ef jal x5,80008200 +80000a7c: 80000a6c .word 0x80000a6c +80000a80: 8000e432 .word 0x8000e432 +80000a84: 004d0d13 addi x26,x26,4 + + mv x1, x26 # switch signature pointer register to avoid conflict with test +80000a88: 000d0093 addi x1,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xdfaf53e7 +80000a8c: 00032b03 lw x22,0(x6) +80000a90: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x370d31ab +80000a94: 00032d03 lw x26,0(x6) +80000a98: 00430313 addi x6,x6,4 + +80000a9c : +Zknd_aes32dsi_cg_cp_rs2_b26: + aes32dsi x15, x22, x26, 2 # perform operation +80000a9c: abab07b3 aes32dsi x15,x22,x26,0x2 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsi_cg_cp_rs2_b26, Zknd_aes32dsi_cg_cp_rs2_b26_str) +80000aa0: 0000a203 lw x4,0(x1) +80000aa4: 00f20863 beq x4,x15,80000ab4 +80000aa8: 758072ef jal x5,80008200 +80000aac: 80000a9c .word 0x80000a9c +80000ab0: 8000e469 .word 0x8000e469 +80000ab4: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0c29123c +80000ab8: 00032c83 lw x25,0(x6) +80000abc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x28d63ff1 +80000ac0: 00032d83 lw x27,0(x6) +80000ac4: 00430313 addi x6,x6,4 + +80000ac8 : +Zknd_aes32dsi_cg_cp_rs2_b27: + aes32dsi x11, x25, x27, 2 # perform operation +80000ac8: abbc85b3 aes32dsi x11,x25,x27,0x2 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsi_cg_cp_rs2_b27, Zknd_aes32dsi_cg_cp_rs2_b27_str) +80000acc: 0000a203 lw x4,0(x1) +80000ad0: 00b20863 beq x4,x11,80000ae0 +80000ad4: 72c072ef jal x5,80008200 +80000ad8: 80000ac8 .word 0x80000ac8 +80000adc: 8000e4a0 .word 0x8000e4a0 +80000ae0: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xa17feea6 +80000ae4: 00032483 lw x9,0(x6) +80000ae8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xf8c1f2ee +80000aec: 00032e03 lw x28,0(x6) +80000af0: 00430313 addi x6,x6,4 + +80000af4 : +Zknd_aes32dsi_cg_cp_rs2_b28: + aes32dsi x21, x9, x28, 1 # perform operation +80000af4: 6bc48ab3 aes32dsi x21,x9,x28,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsi_cg_cp_rs2_b28, Zknd_aes32dsi_cg_cp_rs2_b28_str) +80000af8: 0000a203 lw x4,0(x1) +80000afc: 01520863 beq x4,x21,80000b0c +80000b00: 700072ef jal x5,80008200 +80000b04: 80000af4 .word 0x80000af4 +80000b08: 8000e4d7 .word 0x8000e4d7 +80000b0c: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xbd03b426 +80000b10: 00032403 lw x8,0(x6) +80000b14: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x07a2a626 +80000b18: 00032e83 lw x29,0(x6) +80000b1c: 00430313 addi x6,x6,4 + +80000b20 : +Zknd_aes32dsi_cg_cp_rs2_b29: + aes32dsi x23, x8, x29, 1 # perform operation +80000b20: 6bd40bb3 aes32dsi x23,x8,x29,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsi_cg_cp_rs2_b29, Zknd_aes32dsi_cg_cp_rs2_b29_str) +80000b24: 0000a203 lw x4,0(x1) +80000b28: 01720863 beq x4,x23,80000b38 +80000b2c: 6d4072ef jal x5,80008200 +80000b30: 80000b20 .word 0x80000b20 +80000b34: 8000e50e .word 0x8000e50e +80000b38: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x724d50b2 +80000b3c: 00032783 lw x15,0(x6) +80000b40: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x71d4f4de +80000b44: 00032f03 lw x30,0(x6) +80000b48: 00430313 addi x6,x6,4 + +80000b4c : +Zknd_aes32dsi_cg_cp_rs2_b30: + aes32dsi x9, x15, x30, 1 # perform operation +80000b4c: 6be784b3 aes32dsi x9,x15,x30,0x1 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs2_b30, Zknd_aes32dsi_cg_cp_rs2_b30_str) +80000b50: 0000a203 lw x4,0(x1) +80000b54: 00920863 beq x4,x9,80000b64 +80000b58: 6a8072ef jal x5,80008200 +80000b5c: 80000b4c .word 0x80000b4c +80000b60: 8000e545 .word 0x8000e545 +80000b64: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x2c0c5f2c +80000b68: 00032c03 lw x24,0(x6) +80000b6c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0771cbe3 +80000b70: 00032f83 lw x31,0(x6) +80000b74: 00430313 addi x6,x6,4 + +80000b78 : +Zknd_aes32dsi_cg_cp_rs2_b31: + aes32dsi x9, x24, x31, 1 # perform operation +80000b78: 6bfc04b3 aes32dsi x9,x24,x31,0x1 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsi_cg_cp_rs2_b31, Zknd_aes32dsi_cg_cp_rs2_b31_str) +80000b7c: 0000a203 lw x4,0(x1) +80000b80: 00920863 beq x4,x9,80000b90 +80000b84: 67c072ef jal x5,80008200 +80000b88: 80000b78 .word 0x80000b78 +80000b8c: 8000e57c .word 0x8000e57c +80000b90: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x5cb84798 +80000b94: 00032483 lw x9,0(x6) +80000b98: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x4126ae17 +80000b9c: 00032c03 lw x24,0(x6) +80000ba0: 00430313 addi x6,x6,4 + +80000ba4 : +Zknd_aes32dsi_cg_cp_rd_b0: + aes32dsi x0, x9, x24, 2 # perform operation +80000ba4: ab848033 aes32dsi x0,x9,x24,0x2 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zknd_aes32dsi_cg_cp_rd_b0, Zknd_aes32dsi_cg_cp_rd_b0_str) +80000ba8: 0000a203 lw x4,0(x1) +80000bac: 00020863 beq x4,x0,80000bbc +80000bb0: 650072ef jal x5,80008200 +80000bb4: 80000ba4 .word 0x80000ba4 +80000bb8: 8000e5b3 .word 0x8000e5b3 +80000bbc: 00408093 addi x1,x1,4 + + mv x16, x1 # switch signature pointer register to avoid conflict with test +80000bc0: 00008813 addi x16,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xacca66e6 +80000bc4: 00032103 lw x2,0(x6) +80000bc8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0xb7e67928 +80000bcc: 00032003 lw x0,0(x6) +80000bd0: 00430313 addi x6,x6,4 + +80000bd4 : +Zknd_aes32dsi_cg_cp_rd_b1: + aes32dsi x1, x2, x0, 1 # perform operation +80000bd4: 6a0100b3 aes32dsi x1,x2,x0,0x1 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes32dsi_cg_cp_rd_b1, Zknd_aes32dsi_cg_cp_rd_b1_str) +80000bd8: 00082203 lw x4,0(x16) +80000bdc: 00120863 beq x4,x1,80000bec +80000be0: 620072ef jal x5,80008200 +80000be4: 80000bd4 .word 0x80000bd4 +80000be8: 8000e5e8 .word 0x8000e5e8 +80000bec: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x89f163dd +80000bf0: 00032a83 lw x21,0(x6) +80000bf4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x1646ed44 +80000bf8: 00032503 lw x10,0(x6) +80000bfc: 00430313 addi x6,x6,4 + +80000c00 : +Zknd_aes32dsi_cg_cp_rd_b2: + aes32dsi x2, x21, x10, 3 # perform operation +80000c00: eaaa8133 aes32dsi x2,x21,x10,0x3 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknd_aes32dsi_cg_cp_rd_b2, Zknd_aes32dsi_cg_cp_rd_b2_str) +80000c04: 00082203 lw x4,0(x16) +80000c08: 00220863 beq x4,x2,80000c18 +80000c0c: 5f4072ef jal x5,80008200 +80000c10: 80000c00 .word 0x80000c00 +80000c14: 8000e61d .word 0x8000e61d +80000c18: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x9ad7edac +80000c1c: 00032983 lw x19,0(x6) +80000c20: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0xfc7ddc56 +80000c24: 00032003 lw x0,0(x6) +80000c28: 00430313 addi x6,x6,4 + +80000c2c : +Zknd_aes32dsi_cg_cp_rd_b3: + aes32dsi x3, x19, x0, 0 # perform operation +80000c2c: 2a0981b3 aes32dsi x3,x19,x0,0x0 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes32dsi_cg_cp_rd_b3, Zknd_aes32dsi_cg_cp_rd_b3_str) +80000c30: 00082203 lw x4,0(x16) +80000c34: 00320863 beq x4,x3,80000c44 +80000c38: 5c8072ef jal x5,80008200 +80000c3c: 80000c2c .word 0x80000c2c +80000c40: 8000e652 .word 0x8000e652 +80000c44: 00480813 addi x16,x16,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c48: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c4c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x4607265f +80000c50: 00032083 lw x1,0(x6) +80000c54: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xbb051929 +80000c58: 00032503 lw x10,0(x6) +80000c5c: 00430313 addi x6,x6,4 + +80000c60 : +Zknd_aes32dsi_cg_cp_rd_b4: + aes32dsi x4, x1, x10, 2 # perform operation +80000c60: aaa08233 aes32dsi x4,x1,x10,0x2 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zknd_aes32dsi_cg_cp_rd_b4, Zknd_aes32dsi_cg_cp_rd_b4_str) +80000c64: 00082383 lw x7,0(x16) +80000c68: 00438863 beq x7,x4,80000c78 +80000c6c: 5ac0746f jal x8,80008218 +80000c70: 80000c60 .word 0x80000c60 +80000c74: 8000e687 .word 0x8000e687 +80000c78: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0xd32c5c1a +80000c7c: 00032003 lw x0,0(x6) +80000c80: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xf37cdc52 +80000c84: 00032d83 lw x27,0(x6) +80000c88: 00430313 addi x6,x6,4 + +80000c8c : +Zknd_aes32dsi_cg_cp_rd_b5: + aes32dsi x5, x0, x27, 1 # perform operation +80000c8c: 6bb002b3 aes32dsi x5,x0,x27,0x1 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zknd_aes32dsi_cg_cp_rd_b5, Zknd_aes32dsi_cg_cp_rd_b5_str) +80000c90: 00082383 lw x7,0(x16) +80000c94: 00538863 beq x7,x5,80000ca4 +80000c98: 5800746f jal x8,80008218 +80000c9c: 80000c8c .word 0x80000c8c +80000ca0: 8000e6bc .word 0x8000e6bc +80000ca4: 00480813 addi x16,x16,4 + + mv x12, x6 # switch data pointer register to avoid conflict with test +80000ca8: 00030613 addi x12,x6,0 +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xd1908413 +80000cac: 00062483 lw x9,0(x12) +80000cb0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x4643900b +80000cb4: 00062703 lw x14,0(x12) +80000cb8: 00460613 addi x12,x12,4 + +80000cbc : +Zknd_aes32dsi_cg_cp_rd_b6: + aes32dsi x6, x9, x14, 0 # perform operation +80000cbc: 2ae48333 aes32dsi x6,x9,x14,0x0 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zknd_aes32dsi_cg_cp_rd_b6, Zknd_aes32dsi_cg_cp_rd_b6_str) +80000cc0: 00082383 lw x7,0(x16) +80000cc4: 00638863 beq x7,x6,80000cd4 +80000cc8: 5500746f jal x8,80008218 +80000ccc: 80000cbc .word 0x80000cbc +80000cd0: 8000e6f1 .word 0x8000e6f1 +80000cd4: 00480813 addi x16,x16,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cd8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cdc: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xac65e74b +80000ce0: 00062183 lw x3,0(x12) +80000ce4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x9c559ec6 +80000ce8: 00062583 lw x11,0(x12) +80000cec: 00460613 addi x12,x12,4 + +80000cf0 : +Zknd_aes32dsi_cg_cp_rd_b7: + aes32dsi x7, x3, x11, 1 # perform operation +80000cf0: 6ab183b3 aes32dsi x7,x3,x11,0x1 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zknd_aes32dsi_cg_cp_rd_b7, Zknd_aes32dsi_cg_cp_rd_b7_str) +80000cf4: 00082683 lw x13,0(x16) +80000cf8: 00768863 beq x13,x7,80000d08 +80000cfc: 5440776f jal x14,80008240 +80000d00: 80000cf0 .word 0x80000cf0 +80000d04: 8000e726 .word 0x8000e726 +80000d08: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x7e2f4ff9 +80000d0c: 00062c03 lw x24,0(x12) +80000d10: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x3edf70e2 +80000d14: 00062203 lw x4,0(x12) +80000d18: 00460613 addi x12,x12,4 + +80000d1c : +Zknd_aes32dsi_cg_cp_rd_b8: + aes32dsi x8, x24, x4, 0 # perform operation +80000d1c: 2a4c0433 aes32dsi x8,x24,x4,0x0 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zknd_aes32dsi_cg_cp_rd_b8, Zknd_aes32dsi_cg_cp_rd_b8_str) +80000d20: 00082683 lw x13,0(x16) +80000d24: 00868863 beq x13,x8,80000d34 +80000d28: 5180776f jal x14,80008240 +80000d2c: 80000d1c .word 0x80000d1c +80000d30: 8000e75b .word 0x8000e75b +80000d34: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x6ef507dd +80000d38: 00062083 lw x1,0(x12) +80000d3c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x0175a615 +80000d40: 00062f03 lw x30,0(x12) +80000d44: 00460613 addi x12,x12,4 + +80000d48 : +Zknd_aes32dsi_cg_cp_rd_b9: + aes32dsi x9, x1, x30, 2 # perform operation +80000d48: abe084b3 aes32dsi x9,x1,x30,0x2 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zknd_aes32dsi_cg_cp_rd_b9, Zknd_aes32dsi_cg_cp_rd_b9_str) +80000d4c: 00082683 lw x13,0(x16) +80000d50: 00968863 beq x13,x9,80000d60 +80000d54: 4ec0776f jal x14,80008240 +80000d58: 80000d48 .word 0x80000d48 +80000d5c: 8000e790 .word 0x8000e790 +80000d60: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xc7bd4062 +80000d64: 00062283 lw x5,0(x12) +80000d68: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xeed35d2a +80000d6c: 00062d83 lw x27,0(x12) +80000d70: 00460613 addi x12,x12,4 + +80000d74 : +Zknd_aes32dsi_cg_cp_rd_b10: + aes32dsi x10, x5, x27, 0 # perform operation +80000d74: 2bb28533 aes32dsi x10,x5,x27,0x0 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zknd_aes32dsi_cg_cp_rd_b10, Zknd_aes32dsi_cg_cp_rd_b10_str) +80000d78: 00082683 lw x13,0(x16) +80000d7c: 00a68863 beq x13,x10,80000d8c +80000d80: 4c00776f jal x14,80008240 +80000d84: 80000d74 .word 0x80000d74 +80000d88: 8000e7c5 .word 0x8000e7c5 +80000d8c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xa1ee938e +80000d90: 00062503 lw x10,0(x12) +80000d94: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xb1abe54d +80000d98: 00062a03 lw x20,0(x12) +80000d9c: 00460613 addi x12,x12,4 + +80000da0 : +Zknd_aes32dsi_cg_cp_rd_b11: + aes32dsi x11, x10, x20, 3 # perform operation +80000da0: eb4505b3 aes32dsi x11,x10,x20,0x3 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zknd_aes32dsi_cg_cp_rd_b11, Zknd_aes32dsi_cg_cp_rd_b11_str) +80000da4: 00082683 lw x13,0(x16) +80000da8: 00b68863 beq x13,x11,80000db8 +80000dac: 4940776f jal x14,80008240 +80000db0: 80000da0 .word 0x80000da0 +80000db4: 8000e7fb .word 0x8000e7fb +80000db8: 00480813 addi x16,x16,4 + + mv x19, x12 # switch data pointer register to avoid conflict with test +80000dbc: 00060993 addi x19,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x75de5369 +80000dc0: 0009a183 lw x3,0(x19) +80000dc4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xab3a5ea2 +80000dc8: 0009ad83 lw x27,0(x19) +80000dcc: 00498993 addi x19,x19,4 + +80000dd0 : +Zknd_aes32dsi_cg_cp_rd_b12: + aes32dsi x12, x3, x27, 2 # perform operation +80000dd0: abb18633 aes32dsi x12,x3,x27,0x2 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zknd_aes32dsi_cg_cp_rd_b12, Zknd_aes32dsi_cg_cp_rd_b12_str) +80000dd4: 00082683 lw x13,0(x16) +80000dd8: 00c68863 beq x13,x12,80000de8 +80000ddc: 4640776f jal x14,80008240 +80000de0: 80000dd0 .word 0x80000dd0 +80000de4: 8000e831 .word 0x8000e831 +80000de8: 00480813 addi x16,x16,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dec: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000df0: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xd2915f79 +80000df4: 0009a783 lw x15,0(x19) +80000df8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0xdafd0711 +80000dfc: 0009ac03 lw x24,0(x19) +80000e00: 00498993 addi x19,x19,4 + +80000e04 : +Zknd_aes32dsi_cg_cp_rd_b13: + aes32dsi x13, x15, x24, 2 # perform operation +80000e04: ab8786b3 aes32dsi x13,x15,x24,0x2 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zknd_aes32dsi_cg_cp_rd_b13, Zknd_aes32dsi_cg_cp_rd_b13_str) +80000e08: 00082383 lw x7,0(x16) +80000e0c: 00d38863 beq x7,x13,80000e1c +80000e10: 4080746f jal x8,80008218 +80000e14: 80000e04 .word 0x80000e04 +80000e18: 8000e867 .word 0x8000e867 +80000e1c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x995f0e0d +80000e20: 0009a603 lw x12,0(x19) +80000e24: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x004f878d +80000e28: 0009ac83 lw x25,0(x19) +80000e2c: 00498993 addi x19,x19,4 + +80000e30 : +Zknd_aes32dsi_cg_cp_rd_b14: + aes32dsi x14, x12, x25, 2 # perform operation +80000e30: ab960733 aes32dsi x14,x12,x25,0x2 + # Check if x14 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x14, Zknd_aes32dsi_cg_cp_rd_b14, Zknd_aes32dsi_cg_cp_rd_b14_str) +80000e34: 00082383 lw x7,0(x16) +80000e38: 00e38863 beq x7,x14,80000e48 +80000e3c: 3dc0746f jal x8,80008218 +80000e40: 80000e30 .word 0x80000e30 +80000e44: 8000e89d .word 0x8000e89d +80000e48: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x2327693c +80000e4c: 0009a003 lw x0,0(x19) +80000e50: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0xf58d5c12 +80000e54: 0009ad03 lw x26,0(x19) +80000e58: 00498993 addi x19,x19,4 + +80000e5c : +Zknd_aes32dsi_cg_cp_rd_b15: + aes32dsi x15, x0, x26, 0 # perform operation +80000e5c: 2ba007b3 aes32dsi x15,x0,x26,0x0 + # Check if x15 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x15, Zknd_aes32dsi_cg_cp_rd_b15, Zknd_aes32dsi_cg_cp_rd_b15_str) +80000e60: 00082383 lw x7,0(x16) +80000e64: 00f38863 beq x7,x15,80000e74 +80000e68: 3b00746f jal x8,80008218 +80000e6c: 80000e5c .word 0x80000e5c +80000e70: 8000e8d3 .word 0x8000e8d3 +80000e74: 00480813 addi x16,x16,4 + + mv x22, x16 # switch signature pointer register to avoid conflict with test +80000e78: 00080b13 addi x22,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x130179d8 +80000e7c: 0009a683 lw x13,0(x19) +80000e80: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xf54618d1 +80000e84: 0009a483 lw x9,0(x19) +80000e88: 00498993 addi x19,x19,4 + +80000e8c : +Zknd_aes32dsi_cg_cp_rd_b16: + aes32dsi x16, x13, x9, 3 # perform operation +80000e8c: ea968833 aes32dsi x16,x13,x9,0x3 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zknd_aes32dsi_cg_cp_rd_b16, Zknd_aes32dsi_cg_cp_rd_b16_str) +80000e90: 000b2383 lw x7,0(x22) +80000e94: 01038863 beq x7,x16,80000ea4 +80000e98: 3800746f jal x8,80008218 +80000e9c: 80000e8c .word 0x80000e8c +80000ea0: 8000e909 .word 0x8000e909 +80000ea4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x2c300f24 +80000ea8: 0009a703 lw x14,0(x19) +80000eac: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x37a5d7e4 +80000eb0: 0009af83 lw x31,0(x19) +80000eb4: 00498993 addi x19,x19,4 + +80000eb8 : +Zknd_aes32dsi_cg_cp_rd_b17: + aes32dsi x17, x14, x31, 0 # perform operation +80000eb8: 2bf708b3 aes32dsi x17,x14,x31,0x0 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknd_aes32dsi_cg_cp_rd_b17, Zknd_aes32dsi_cg_cp_rd_b17_str) +80000ebc: 000b2383 lw x7,0(x22) +80000ec0: 01138863 beq x7,x17,80000ed0 +80000ec4: 3540746f jal x8,80008218 +80000ec8: 80000eb8 .word 0x80000eb8 +80000ecc: 8000e93f .word 0x8000e93f +80000ed0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x48b6eb17 +80000ed4: 0009af83 lw x31,0(x19) +80000ed8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x45cc250e +80000edc: 0009a483 lw x9,0(x19) +80000ee0: 00498993 addi x19,x19,4 + +80000ee4 : +Zknd_aes32dsi_cg_cp_rd_b18: + aes32dsi x18, x31, x9, 2 # perform operation +80000ee4: aa9f8933 aes32dsi x18,x31,x9,0x2 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknd_aes32dsi_cg_cp_rd_b18, Zknd_aes32dsi_cg_cp_rd_b18_str) +80000ee8: 000b2383 lw x7,0(x22) +80000eec: 01238863 beq x7,x18,80000efc +80000ef0: 3280746f jal x8,80008218 +80000ef4: 80000ee4 .word 0x80000ee4 +80000ef8: 8000e975 .word 0x8000e975 +80000efc: 004b0b13 addi x22,x22,4 + + mv x3, x19 # switch data pointer register to avoid conflict with test +80000f00: 00098193 addi x3,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x30c59e25 +80000f04: 0001a503 lw x10,0(x3) +80000f08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0xc87ad2e8 +80000f0c: 0001a003 lw x0,0(x3) +80000f10: 00418193 addi x3,x3,4 + +80000f14 : +Zknd_aes32dsi_cg_cp_rd_b19: + aes32dsi x19, x10, x0, 1 # perform operation +80000f14: 6a0509b3 aes32dsi x19,x10,x0,0x1 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zknd_aes32dsi_cg_cp_rd_b19, Zknd_aes32dsi_cg_cp_rd_b19_str) +80000f18: 000b2383 lw x7,0(x22) +80000f1c: 01338863 beq x7,x19,80000f2c +80000f20: 2f80746f jal x8,80008218 +80000f24: 80000f14 .word 0x80000f14 +80000f28: 8000e9ab .word 0x8000e9ab +80000f2c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x50aa33dd +80000f30: 0001a503 lw x10,0(x3) +80000f34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x588a8ebb +80000f38: 0001a283 lw x5,0(x3) +80000f3c: 00418193 addi x3,x3,4 + +80000f40 : +Zknd_aes32dsi_cg_cp_rd_b20: + aes32dsi x20, x10, x5, 2 # perform operation +80000f40: aa550a33 aes32dsi x20,x10,x5,0x2 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zknd_aes32dsi_cg_cp_rd_b20, Zknd_aes32dsi_cg_cp_rd_b20_str) +80000f44: 000b2383 lw x7,0(x22) +80000f48: 01438863 beq x7,x20,80000f58 +80000f4c: 2cc0746f jal x8,80008218 +80000f50: 80000f40 .word 0x80000f40 +80000f54: 8000e9e1 .word 0x8000e9e1 +80000f58: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xfdd497de +80000f5c: 0001a783 lw x15,0(x3) +80000f60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x8de954fd +80000f64: 0001a903 lw x18,0(x3) +80000f68: 00418193 addi x3,x3,4 + +80000f6c : +Zknd_aes32dsi_cg_cp_rd_b21: + aes32dsi x21, x15, x18, 0 # perform operation +80000f6c: 2b278ab3 aes32dsi x21,x15,x18,0x0 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zknd_aes32dsi_cg_cp_rd_b21, Zknd_aes32dsi_cg_cp_rd_b21_str) +80000f70: 000b2383 lw x7,0(x22) +80000f74: 01538863 beq x7,x21,80000f84 +80000f78: 2a00746f jal x8,80008218 +80000f7c: 80000f6c .word 0x80000f6c +80000f80: 8000ea17 .word 0x8000ea17 +80000f84: 004b0b13 addi x22,x22,4 + + mv x2, x22 # switch signature pointer register to avoid conflict with test +80000f88: 000b0113 addi x2,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x60b0821b +80000f8c: 0001a883 lw x17,0(x3) +80000f90: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xede37258 +80000f94: 0001a283 lw x5,0(x3) +80000f98: 00418193 addi x3,x3,4 + +80000f9c : +Zknd_aes32dsi_cg_cp_rd_b22: + aes32dsi x22, x17, x5, 0 # perform operation +80000f9c: 2a588b33 aes32dsi x22,x17,x5,0x0 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknd_aes32dsi_cg_cp_rd_b22, Zknd_aes32dsi_cg_cp_rd_b22_str) +80000fa0: 00012383 lw x7,0(x2) +80000fa4: 01638863 beq x7,x22,80000fb4 +80000fa8: 2700746f jal x8,80008218 +80000fac: 80000f9c .word 0x80000f9c +80000fb0: 8000ea4d .word 0x8000ea4d +80000fb4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x67dafdf0 +80000fb8: 0001af03 lw x30,0(x3) +80000fbc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x92e46f3d +80000fc0: 0001a903 lw x18,0(x3) +80000fc4: 00418193 addi x3,x3,4 + +80000fc8 : +Zknd_aes32dsi_cg_cp_rd_b23: + aes32dsi x23, x30, x18, 1 # perform operation +80000fc8: 6b2f0bb3 aes32dsi x23,x30,x18,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cp_rd_b23, Zknd_aes32dsi_cg_cp_rd_b23_str) +80000fcc: 00012383 lw x7,0(x2) +80000fd0: 01738863 beq x7,x23,80000fe0 +80000fd4: 2440746f jal x8,80008218 +80000fd8: 80000fc8 .word 0x80000fc8 +80000fdc: 8000ea83 .word 0x8000ea83 +80000fe0: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x2c5eefc0 +80000fe4: 0001aa83 lw x21,0(x3) +80000fe8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x31763dcb +80000fec: 0001ae83 lw x29,0(x3) +80000ff0: 00418193 addi x3,x3,4 + +80000ff4 : +Zknd_aes32dsi_cg_cp_rd_b24: + aes32dsi x24, x21, x29, 2 # perform operation +80000ff4: abda8c33 aes32dsi x24,x21,x29,0x2 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsi_cg_cp_rd_b24, Zknd_aes32dsi_cg_cp_rd_b24_str) +80000ff8: 00012383 lw x7,0(x2) +80000ffc: 01838863 beq x7,x24,8000100c +80001000: 2180746f jal x8,80008218 +80001004: 80000ff4 .word 0x80000ff4 +80001008: 8000eab9 .word 0x8000eab9 +8000100c: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x3369e01d +80001010: 0001a683 lw x13,0(x3) +80001014: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x10c74895 +80001018: 0001aa03 lw x20,0(x3) +8000101c: 00418193 addi x3,x3,4 + +80001020 : +Zknd_aes32dsi_cg_cp_rd_b25: + aes32dsi x25, x13, x20, 3 # perform operation +80001020: eb468cb3 aes32dsi x25,x13,x20,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cp_rd_b25, Zknd_aes32dsi_cg_cp_rd_b25_str) +80001024: 00012383 lw x7,0(x2) +80001028: 01938863 beq x7,x25,80001038 +8000102c: 1ec0746f jal x8,80008218 +80001030: 80001020 .word 0x80001020 +80001034: 8000eaef .word 0x8000eaef +80001038: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x4509957a +8000103c: 0001a683 lw x13,0(x3) +80001040: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0xc774cc0c +80001044: 0001a203 lw x4,0(x3) +80001048: 00418193 addi x3,x3,4 + +8000104c : +Zknd_aes32dsi_cg_cp_rd_b26: + aes32dsi x26, x13, x4, 3 # perform operation +8000104c: ea468d33 aes32dsi x26,x13,x4,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cp_rd_b26, Zknd_aes32dsi_cg_cp_rd_b26_str) +80001050: 00012383 lw x7,0(x2) +80001054: 01a38863 beq x7,x26,80001064 +80001058: 1c00746f jal x8,80008218 +8000105c: 8000104c .word 0x8000104c +80001060: 8000eb25 .word 0x8000eb25 +80001064: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x724e6c28 +80001068: 0001a483 lw x9,0(x3) +8000106c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x15d48048 +80001070: 0001ac83 lw x25,0(x3) +80001074: 00418193 addi x3,x3,4 + +80001078 : +Zknd_aes32dsi_cg_cp_rd_b27: + aes32dsi x27, x9, x25, 0 # perform operation +80001078: 2b948db3 aes32dsi x27,x9,x25,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsi_cg_cp_rd_b27, Zknd_aes32dsi_cg_cp_rd_b27_str) +8000107c: 00012383 lw x7,0(x2) +80001080: 01b38863 beq x7,x27,80001090 +80001084: 1940746f jal x8,80008218 +80001088: 80001078 .word 0x80001078 +8000108c: 8000eb5b .word 0x8000eb5b +80001090: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xda5745f2 +80001094: 0001ab03 lw x22,0(x3) +80001098: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x9bcb82ea +8000109c: 0001ac83 lw x25,0(x3) +800010a0: 00418193 addi x3,x3,4 + +800010a4 : +Zknd_aes32dsi_cg_cp_rd_b28: + aes32dsi x28, x22, x25, 2 # perform operation +800010a4: ab9b0e33 aes32dsi x28,x22,x25,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cp_rd_b28, Zknd_aes32dsi_cg_cp_rd_b28_str) +800010a8: 00012383 lw x7,0(x2) +800010ac: 01c38863 beq x7,x28,800010bc +800010b0: 1680746f jal x8,80008218 +800010b4: 800010a4 .word 0x800010a4 +800010b8: 8000eb91 .word 0x8000eb91 +800010bc: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x277c97f3 +800010c0: 0001ab83 lw x23,0(x3) +800010c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x83f99c72 +800010c8: 0001ac83 lw x25,0(x3) +800010cc: 00418193 addi x3,x3,4 + +800010d0 : +Zknd_aes32dsi_cg_cp_rd_b29: + aes32dsi x29, x23, x25, 1 # perform operation +800010d0: 6b9b8eb3 aes32dsi x29,x23,x25,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cp_rd_b29, Zknd_aes32dsi_cg_cp_rd_b29_str) +800010d4: 00012383 lw x7,0(x2) +800010d8: 01d38863 beq x7,x29,800010e8 +800010dc: 13c0746f jal x8,80008218 +800010e0: 800010d0 .word 0x800010d0 +800010e4: 8000ebc7 .word 0x8000ebc7 +800010e8: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x105c1841 +800010ec: 0001ab83 lw x23,0(x3) +800010f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7db7d1a7 +800010f4: 0001a683 lw x13,0(x3) +800010f8: 00418193 addi x3,x3,4 + +800010fc : +Zknd_aes32dsi_cg_cp_rd_b30: + aes32dsi x30, x23, x13, 1 # perform operation +800010fc: 6adb8f33 aes32dsi x30,x23,x13,0x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cp_rd_b30, Zknd_aes32dsi_cg_cp_rd_b30_str) +80001100: 00012383 lw x7,0(x2) +80001104: 01e38863 beq x7,x30,80001114 +80001108: 1100746f jal x8,80008218 +8000110c: 800010fc .word 0x800010fc +80001110: 8000ebfd .word 0x8000ebfd +80001114: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xb598f983 +80001118: 0001ad03 lw x26,0(x3) +8000111c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x4893f5e2 +80001120: 0001a783 lw x15,0(x3) +80001124: 00418193 addi x3,x3,4 + +80001128 : +Zknd_aes32dsi_cg_cp_rd_b31: + aes32dsi x31, x26, x15, 2 # perform operation +80001128: aafd0fb3 aes32dsi x31,x26,x15,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cp_rd_b31, Zknd_aes32dsi_cg_cp_rd_b31_str) +8000112c: 00012383 lw x7,0(x2) +80001130: 01f38863 beq x7,x31,80001140 +80001134: 0e40746f jal x8,80008218 +80001138: 80001128 .word 0x80001128 +8000113c: 8000ec33 .word 0x8000ec33 +80001140: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x00000000 +80001144: 0001a203 lw x4,0(x3) +80001148: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xc6fc3514 +8000114c: 0001ab03 lw x22,0(x3) +80001150: 00418193 addi x3,x3,4 + +80001154 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x0: + aes32dsi x25, x4, x22, 2 # perform operation +80001154: ab620cb3 aes32dsi x25,x4,x22,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cp_rs1_edges_0x0, Zknd_aes32dsi_cg_cp_rs1_edges_0x0_str) +80001158: 00012383 lw x7,0(x2) +8000115c: 01938863 beq x7,x25,8000116c +80001160: 0b80746f jal x8,80008218 +80001164: 80001154 .word 0x80001154 +80001168: 8000ec69 .word 0x8000ec69 +8000116c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x00000001 +80001170: 0001a603 lw x12,0(x3) +80001174: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xffb8f8f0 +80001178: 0001ad83 lw x27,0(x3) +8000117c: 00418193 addi x3,x3,4 + +80001180 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x1: + aes32dsi x17, x12, x27, 2 # perform operation +80001180: abb608b3 aes32dsi x17,x12,x27,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsi_cg_cp_rs1_edges_0x1, Zknd_aes32dsi_cg_cp_rs1_edges_0x1_str) +80001184: 00012383 lw x7,0(x2) +80001188: 01138863 beq x7,x17,80001198 +8000118c: 08c0746f jal x8,80008218 +80001190: 80001180 .word 0x80001180 +80001194: 8000eca6 .word 0x8000eca6 +80001198: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000002 +8000119c: 0001a703 lw x14,0(x3) +800011a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5552ae65 +800011a4: 0001ab83 lw x23,0(x3) +800011a8: 00418193 addi x3,x3,4 + +800011ac : +Zknd_aes32dsi_cg_cp_rs1_edges_0x2: + aes32dsi x26, x14, x23, 0 # perform operation +800011ac: 2b770d33 aes32dsi x26,x14,x23,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cp_rs1_edges_0x2, Zknd_aes32dsi_cg_cp_rs1_edges_0x2_str) +800011b0: 00012383 lw x7,0(x2) +800011b4: 01a38863 beq x7,x26,800011c4 +800011b8: 0600746f jal x8,80008218 +800011bc: 800011ac .word 0x800011ac +800011c0: 8000ece3 .word 0x8000ece3 +800011c4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x80000000 +800011c8: 0001a883 lw x17,0(x3) +800011cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x8a755e8b +800011d0: 0001a703 lw x14,0(x3) +800011d4: 00418193 addi x3,x3,4 + +800011d8 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x80000000: + aes32dsi x19, x17, x14, 3 # perform operation +800011d8: eae889b3 aes32dsi x19,x17,x14,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cp_rs1_edges_0x80000000, Zknd_aes32dsi_cg_cp_rs1_edges_0x80000000_str) +800011dc: 00012383 lw x7,0(x2) +800011e0: 01338863 beq x7,x19,800011f0 +800011e4: 0340746f jal x8,80008218 +800011e8: 800011d8 .word 0x800011d8 +800011ec: 8000ed20 .word 0x8000ed20 +800011f0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x80000001 +800011f4: 0001a503 lw x10,0(x3) +800011f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xd11d24d8 +800011fc: 0001ae03 lw x28,0(x3) +80001200: 00418193 addi x3,x3,4 + +80001204 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x80000001: + aes32dsi x13, x10, x28, 3 # perform operation +80001204: ebc506b3 aes32dsi x13,x10,x28,0x3 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsi_cg_cp_rs1_edges_0x80000001, Zknd_aes32dsi_cg_cp_rs1_edges_0x80000001_str) +80001208: 00012383 lw x7,0(x2) +8000120c: 00d38863 beq x7,x13,8000121c +80001210: 0080746f jal x8,80008218 +80001214: 80001204 .word 0x80001204 +80001218: 8000ed65 .word 0x8000ed65 +8000121c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x7fffffff +80001220: 0001af03 lw x30,0(x3) +80001224: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x49c14b8a +80001228: 0001ad83 lw x27,0(x3) +8000122c: 00418193 addi x3,x3,4 + +80001230 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x7fffffff: + aes32dsi x31, x30, x27, 2 # perform operation +80001230: abbf0fb3 aes32dsi x31,x30,x27,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cp_rs1_edges_0x7fffffff, Zknd_aes32dsi_cg_cp_rs1_edges_0x7fffffff_str) +80001234: 00012383 lw x7,0(x2) +80001238: 01f38863 beq x7,x31,80001248 +8000123c: 7dd0646f jal x8,80008218 +80001240: 80001230 .word 0x80001230 +80001244: 8000edaa .word 0x8000edaa +80001248: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x7ffffffe +8000124c: 0001a983 lw x19,0(x3) +80001250: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xabe7542a +80001254: 0001ae83 lw x29,0(x3) +80001258: 00418193 addi x3,x3,4 + +8000125c : +Zknd_aes32dsi_cg_cp_rs1_edges_0x7ffffffe: + aes32dsi x18, x19, x29, 2 # perform operation +8000125c: abd98933 aes32dsi x18,x19,x29,0x2 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cp_rs1_edges_0x7ffffffe, Zknd_aes32dsi_cg_cp_rs1_edges_0x7ffffffe_str) +80001260: 00012383 lw x7,0(x2) +80001264: 01238863 beq x7,x18,80001274 +80001268: 7b10646f jal x8,80008218 +8000126c: 8000125c .word 0x8000125c +80001270: 8000edef .word 0x8000edef +80001274: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0xffffffff +80001278: 0001a303 lw x6,0(x3) +8000127c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7be56b5f +80001280: 0001a883 lw x17,0(x3) +80001284: 00418193 addi x3,x3,4 + +80001288 : +Zknd_aes32dsi_cg_cp_rs1_edges_0xffffffff: + aes32dsi x31, x6, x17, 0 # perform operation +80001288: 2b130fb3 aes32dsi x31,x6,x17,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cp_rs1_edges_0xffffffff, Zknd_aes32dsi_cg_cp_rs1_edges_0xffffffff_str) +8000128c: 00012383 lw x7,0(x2) +80001290: 01f38863 beq x7,x31,800012a0 +80001294: 7850646f jal x8,80008218 +80001298: 80001288 .word 0x80001288 +8000129c: 8000ee34 .word 0x8000ee34 +800012a0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xfffffffe +800012a4: 0001a603 lw x12,0(x3) +800012a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x2af2ae01 +800012ac: 0001a483 lw x9,0(x3) +800012b0: 00418193 addi x3,x3,4 + +800012b4 : +Zknd_aes32dsi_cg_cp_rs1_edges_0xfffffffe: + aes32dsi x11, x12, x9, 0 # perform operation +800012b4: 2a9605b3 aes32dsi x11,x12,x9,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cp_rs1_edges_0xfffffffe, Zknd_aes32dsi_cg_cp_rs1_edges_0xfffffffe_str) +800012b8: 00012383 lw x7,0(x2) +800012bc: 00b38863 beq x7,x11,800012cc +800012c0: 7590646f jal x8,80008218 +800012c4: 800012b4 .word 0x800012b4 +800012c8: 8000ee79 .word 0x8000ee79 +800012cc: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x5bbc8872 +800012d0: 0001a983 lw x19,0(x3) +800012d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xf0bbbfbb +800012d8: 0001ac03 lw x24,0(x3) +800012dc: 00418193 addi x3,x3,4 + +800012e0 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x5bbc8872: + aes32dsi x31, x19, x24, 2 # perform operation +800012e0: ab898fb3 aes32dsi x31,x19,x24,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cp_rs1_edges_0x5bbc8872, Zknd_aes32dsi_cg_cp_rs1_edges_0x5bbc8872_str) +800012e4: 00012383 lw x7,0(x2) +800012e8: 01f38863 beq x7,x31,800012f8 +800012ec: 72d0646f jal x8,80008218 +800012f0: 800012e0 .word 0x800012e0 +800012f4: 8000eebe .word 0x8000eebe +800012f8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xaaaaaaaa +800012fc: 0001ad03 lw x26,0(x3) +80001300: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x01df092a +80001304: 0001ad83 lw x27,0(x3) +80001308: 00418193 addi x3,x3,4 + +8000130c : +Zknd_aes32dsi_cg_cp_rs1_edges_0xaaaaaaaa: + aes32dsi x18, x26, x27, 3 # perform operation +8000130c: ebbd0933 aes32dsi x18,x26,x27,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cp_rs1_edges_0xaaaaaaaa, Zknd_aes32dsi_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001310: 00012383 lw x7,0(x2) +80001314: 01238863 beq x7,x18,80001324 +80001318: 7010646f jal x8,80008218 +8000131c: 8000130c .word 0x8000130c +80001320: 8000ef03 .word 0x8000ef03 +80001324: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x55555555 +80001328: 0001a583 lw x11,0(x3) +8000132c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xc50283ce +80001330: 0001a683 lw x13,0(x3) +80001334: 00418193 addi x3,x3,4 + +80001338 : +Zknd_aes32dsi_cg_cp_rs1_edges_0x55555555: + aes32dsi x26, x11, x13, 1 # perform operation +80001338: 6ad58d33 aes32dsi x26,x11,x13,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cp_rs1_edges_0x55555555, Zknd_aes32dsi_cg_cp_rs1_edges_0x55555555_str) +8000133c: 00012383 lw x7,0(x2) +80001340: 01a38863 beq x7,x26,80001350 +80001344: 6d50646f jal x8,80008218 +80001348: 80001338 .word 0x80001338 +8000134c: 8000ef48 .word 0x8000ef48 +80001350: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x6190ad7e +80001354: 0001a803 lw x16,0(x3) +80001358: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x00000000 +8000135c: 0001a503 lw x10,0(x3) +80001360: 00418193 addi x3,x3,4 + +80001364 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x0: + aes32dsi x17, x16, x10, 0 # perform operation +80001364: 2aa808b3 aes32dsi x17,x16,x10,0x0 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsi_cg_cp_rs2_edges_0x0, Zknd_aes32dsi_cg_cp_rs2_edges_0x0_str) +80001368: 00012383 lw x7,0(x2) +8000136c: 01138863 beq x7,x17,8000137c +80001370: 6a90646f jal x8,80008218 +80001374: 80001364 .word 0x80001364 +80001378: 8000ef8d .word 0x8000ef8d +8000137c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xcda64af4 +80001380: 0001a803 lw x16,0(x3) +80001384: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x00000001 +80001388: 0001af03 lw x30,0(x3) +8000138c: 00418193 addi x3,x3,4 + +80001390 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x1: + aes32dsi x26, x16, x30, 1 # perform operation +80001390: 6be80d33 aes32dsi x26,x16,x30,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cp_rs2_edges_0x1, Zknd_aes32dsi_cg_cp_rs2_edges_0x1_str) +80001394: 00012383 lw x7,0(x2) +80001398: 01a38863 beq x7,x26,800013a8 +8000139c: 67d0646f jal x8,80008218 +800013a0: 80001390 .word 0x80001390 +800013a4: 8000efcb .word 0x8000efcb +800013a8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x6c2ecfb4 +800013ac: 0001af83 lw x31,0(x3) +800013b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000002 +800013b4: 0001a303 lw x6,0(x3) +800013b8: 00418193 addi x3,x3,4 + +800013bc : +Zknd_aes32dsi_cg_cp_rs2_edges_0x2: + aes32dsi x14, x31, x6, 3 # perform operation +800013bc: ea6f8733 aes32dsi x14,x31,x6,0x3 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cp_rs2_edges_0x2, Zknd_aes32dsi_cg_cp_rs2_edges_0x2_str) +800013c0: 00012383 lw x7,0(x2) +800013c4: 00e38863 beq x7,x14,800013d4 +800013c8: 6510646f jal x8,80008218 +800013cc: 800013bc .word 0x800013bc +800013d0: 8000f009 .word 0x8000f009 +800013d4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x549ecbd4 +800013d8: 0001ad03 lw x26,0(x3) +800013dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x80000000 +800013e0: 0001aa83 lw x21,0(x3) +800013e4: 00418193 addi x3,x3,4 + +800013e8 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x80000000: + aes32dsi x6, x26, x21, 3 # perform operation +800013e8: eb5d0333 aes32dsi x6,x26,x21,0x3 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cp_rs2_edges_0x80000000, Zknd_aes32dsi_cg_cp_rs2_edges_0x80000000_str) +800013ec: 00012383 lw x7,0(x2) +800013f0: 00638863 beq x7,x6,80001400 +800013f4: 6250646f jal x8,80008218 +800013f8: 800013e8 .word 0x800013e8 +800013fc: 8000f047 .word 0x8000f047 +80001400: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xfe9267dd +80001404: 0001aa03 lw x20,0(x3) +80001408: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x80000001 +8000140c: 0001a083 lw x1,0(x3) +80001410: 00418193 addi x3,x3,4 + +80001414 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x80000001: + aes32dsi x12, x20, x1, 1 # perform operation +80001414: 6a1a0633 aes32dsi x12,x20,x1,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cp_rs2_edges_0x80000001, Zknd_aes32dsi_cg_cp_rs2_edges_0x80000001_str) +80001418: 00012383 lw x7,0(x2) +8000141c: 00c38863 beq x7,x12,8000142c +80001420: 5f90646f jal x8,80008218 +80001424: 80001414 .word 0x80001414 +80001428: 8000f08c .word 0x8000f08c +8000142c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xa43569ed +80001430: 0001a683 lw x13,0(x3) +80001434: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x7fffffff +80001438: 0001ad83 lw x27,0(x3) +8000143c: 00418193 addi x3,x3,4 + +80001440 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x7fffffff: + aes32dsi x29, x13, x27, 2 # perform operation +80001440: abb68eb3 aes32dsi x29,x13,x27,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cp_rs2_edges_0x7fffffff, Zknd_aes32dsi_cg_cp_rs2_edges_0x7fffffff_str) +80001444: 00012383 lw x7,0(x2) +80001448: 01d38863 beq x7,x29,80001458 +8000144c: 5cd0646f jal x8,80008218 +80001450: 80001440 .word 0x80001440 +80001454: 8000f0d1 .word 0x8000f0d1 +80001458: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x3c864ff1 +8000145c: 0001ae03 lw x28,0(x3) +80001460: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x7ffffffe +80001464: 0001a303 lw x6,0(x3) +80001468: 00418193 addi x3,x3,4 + +8000146c : +Zknd_aes32dsi_cg_cp_rs2_edges_0x7ffffffe: + aes32dsi x4, x28, x6, 2 # perform operation +8000146c: aa6e0233 aes32dsi x4,x28,x6,0x2 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cp_rs2_edges_0x7ffffffe, Zknd_aes32dsi_cg_cp_rs2_edges_0x7ffffffe_str) +80001470: 00012383 lw x7,0(x2) +80001474: 00438863 beq x7,x4,80001484 +80001478: 5a10646f jal x8,80008218 +8000147c: 8000146c .word 0x8000146c +80001480: 8000f116 .word 0x8000f116 +80001484: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7b9a3013 +80001488: 0001ac83 lw x25,0(x3) +8000148c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xffffffff +80001490: 0001a803 lw x16,0(x3) +80001494: 00418193 addi x3,x3,4 + +80001498 : +Zknd_aes32dsi_cg_cp_rs2_edges_0xffffffff: + aes32dsi x14, x25, x16, 2 # perform operation +80001498: ab0c8733 aes32dsi x14,x25,x16,0x2 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cp_rs2_edges_0xffffffff, Zknd_aes32dsi_cg_cp_rs2_edges_0xffffffff_str) +8000149c: 00012383 lw x7,0(x2) +800014a0: 00e38863 beq x7,x14,800014b0 +800014a4: 5750646f jal x8,80008218 +800014a8: 80001498 .word 0x80001498 +800014ac: 8000f15b .word 0x8000f15b +800014b0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x13d132bb +800014b4: 0001a203 lw x4,0(x3) +800014b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xfffffffe +800014bc: 0001ab03 lw x22,0(x3) +800014c0: 00418193 addi x3,x3,4 + +800014c4 : +Zknd_aes32dsi_cg_cp_rs2_edges_0xfffffffe: + aes32dsi x1, x4, x22, 0 # perform operation +800014c4: 2b6200b3 aes32dsi x1,x4,x22,0x0 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cp_rs2_edges_0xfffffffe, Zknd_aes32dsi_cg_cp_rs2_edges_0xfffffffe_str) +800014c8: 00012383 lw x7,0(x2) +800014cc: 00138863 beq x7,x1,800014dc +800014d0: 5490646f jal x8,80008218 +800014d4: 800014c4 .word 0x800014c4 +800014d8: 8000f1a0 .word 0x8000f1a0 +800014dc: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xccc33e8e +800014e0: 0001a603 lw x12,0(x3) +800014e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x5bbc8872 +800014e8: 0001a483 lw x9,0(x3) +800014ec: 00418193 addi x3,x3,4 + +800014f0 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x5bbc8872: + aes32dsi x22, x12, x9, 1 # perform operation +800014f0: 6a960b33 aes32dsi x22,x12,x9,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknd_aes32dsi_cg_cp_rs2_edges_0x5bbc8872, Zknd_aes32dsi_cg_cp_rs2_edges_0x5bbc8872_str) +800014f4: 00012383 lw x7,0(x2) +800014f8: 01638863 beq x7,x22,80001508 +800014fc: 51d0646f jal x8,80008218 +80001500: 800014f0 .word 0x800014f0 +80001504: 8000f1e5 .word 0x8000f1e5 +80001508: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0xd64d5a53 +8000150c: 0001a503 lw x10,0(x3) +80001510: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xaaaaaaaa +80001514: 0001ad83 lw x27,0(x3) +80001518: 00418193 addi x3,x3,4 + +8000151c : +Zknd_aes32dsi_cg_cp_rs2_edges_0xaaaaaaaa: + aes32dsi x15, x10, x27, 0 # perform operation +8000151c: 2bb507b3 aes32dsi x15,x10,x27,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsi_cg_cp_rs2_edges_0xaaaaaaaa, Zknd_aes32dsi_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001520: 00012383 lw x7,0(x2) +80001524: 00f38863 beq x7,x15,80001534 +80001528: 4f10646f jal x8,80008218 +8000152c: 8000151c .word 0x8000151c +80001530: 8000f22a .word 0x8000f22a +80001534: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xfbecab9a +80001538: 0001ad03 lw x26,0(x3) +8000153c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x55555555 +80001540: 0001a683 lw x13,0(x3) +80001544: 00418193 addi x3,x3,4 + +80001548 : +Zknd_aes32dsi_cg_cp_rs2_edges_0x55555555: + aes32dsi x19, x26, x13, 3 # perform operation +80001548: eadd09b3 aes32dsi x19,x26,x13,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cp_rs2_edges_0x55555555, Zknd_aes32dsi_cg_cp_rs2_edges_0x55555555_str) +8000154c: 00012383 lw x7,0(x2) +80001550: 01338863 beq x7,x19,80001560 +80001554: 4c50646f jal x8,80008218 +80001558: 80001548 .word 0x80001548 +8000155c: 8000f26f .word 0x8000f26f +80001560: 00410113 addi x2,x2,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000000 +80001564: 0001ac83 lw x25,0(x3) +80001568: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x00000000 +8000156c: 0001ad03 lw x26,0(x3) +80001570: 00418193 addi x3,x3,4 + +80001574 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes32dsi x29, x25, x26, 2 # perform operation +80001574: abac8eb3 aes32dsi x29,x25,x26,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001578: 00012383 lw x7,0(x2) +8000157c: 01d38863 beq x7,x29,8000158c +80001580: 4990646f jal x8,80008218 +80001584: 80001574 .word 0x80001574 +80001588: 8000f2b4 .word 0x8000f2b4 +8000158c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x00000000 +80001590: 0001ad03 lw x26,0(x3) +80001594: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000001 +80001598: 0001aa03 lw x20,0(x3) +8000159c: 00418193 addi x3,x3,4 + +800015a0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes32dsi x28, x26, x20, 0 # perform operation +800015a0: 2b4d0e33 aes32dsi x28,x26,x20,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +800015a4: 00012383 lw x7,0(x2) +800015a8: 01c38863 beq x7,x28,800015b8 +800015ac: 46d0646f jal x8,80008218 +800015b0: 800015a0 .word 0x800015a0 +800015b4: 8000f309 .word 0x8000f309 +800015b8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000000 +800015bc: 0001ac83 lw x25,0(x3) +800015c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000002 +800015c4: 0001a883 lw x17,0(x3) +800015c8: 00418193 addi x3,x3,4 + +800015cc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes32dsi x29, x25, x17, 1 # perform operation +800015cc: 6b1c8eb3 aes32dsi x29,x25,x17,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015d0: 00012383 lw x7,0(x2) +800015d4: 01d38863 beq x7,x29,800015e4 +800015d8: 4410646f jal x8,80008218 +800015dc: 800015cc .word 0x800015cc +800015e0: 8000f35e .word 0x8000f35e +800015e4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x00000000 +800015e8: 0001ae03 lw x28,0(x3) +800015ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x80000000 +800015f0: 0001ac83 lw x25,0(x3) +800015f4: 00418193 addi x3,x3,4 + +800015f8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + aes32dsi x12, x28, x25, 1 # perform operation +800015f8: 6b9e0633 aes32dsi x12,x28,x25,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015fc: 00012383 lw x7,0(x2) +80001600: 00c38863 beq x7,x12,80001610 +80001604: 4150646f jal x8,80008218 +80001608: 800015f8 .word 0x800015f8 +8000160c: 8000f3b3 .word 0x8000f3b3 +80001610: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +80001614: 0001af83 lw x31,0(x3) +80001618: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x80000001 +8000161c: 0001ac03 lw x24,0(x3) +80001620: 00418193 addi x3,x3,4 + +80001624 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + aes32dsi x23, x31, x24, 2 # perform operation +80001624: ab8f8bb3 aes32dsi x23,x31,x24,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001628: 00012383 lw x7,0(x2) +8000162c: 01738863 beq x7,x23,8000163c +80001630: 3e90646f jal x8,80008218 +80001634: 80001624 .word 0x80001624 +80001638: 8000f40f .word 0x8000f40f +8000163c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +80001640: 0001af03 lw x30,0(x3) +80001644: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7fffffff +80001648: 0001a703 lw x14,0(x3) +8000164c: 00418193 addi x3,x3,4 + +80001650 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + aes32dsi x16, x30, x14, 3 # perform operation +80001650: eaef0833 aes32dsi x16,x30,x14,0x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001654: 00012383 lw x7,0(x2) +80001658: 01038863 beq x7,x16,80001668 +8000165c: 3bd0646f jal x8,80008218 +80001660: 80001650 .word 0x80001650 +80001664: 8000f46b .word 0x8000f46b +80001668: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x00000000 +8000166c: 0001a883 lw x17,0(x3) +80001670: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x7ffffffe +80001674: 0001a283 lw x5,0(x3) +80001678: 00418193 addi x3,x3,4 + +8000167c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + aes32dsi x16, x17, x5, 2 # perform operation +8000167c: aa588833 aes32dsi x16,x17,x5,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001680: 00012383 lw x7,0(x2) +80001684: 01038863 beq x7,x16,80001694 +80001688: 3910646f jal x8,80008218 +8000168c: 8000167c .word 0x8000167c +80001690: 8000f4c7 .word 0x8000f4c7 +80001694: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x00000000 +80001698: 0001a583 lw x11,0(x3) +8000169c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xffffffff +800016a0: 0001a803 lw x16,0(x3) +800016a4: 00418193 addi x3,x3,4 + +800016a8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes32dsi x31, x11, x16, 0 # perform operation +800016a8: 2b058fb3 aes32dsi x31,x11,x16,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +800016ac: 00012383 lw x7,0(x2) +800016b0: 01f38863 beq x7,x31,800016c0 +800016b4: 3650646f jal x8,80008218 +800016b8: 800016a8 .word 0x800016a8 +800016bc: 8000f523 .word 0x8000f523 +800016c0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +800016c4: 0001af03 lw x30,0(x3) +800016c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xfffffffe +800016cc: 0001ad03 lw x26,0(x3) +800016d0: 00418193 addi x3,x3,4 + +800016d4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes32dsi x15, x30, x26, 1 # perform operation +800016d4: 6baf07b3 aes32dsi x15,x30,x26,0x1 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016d8: 00012383 lw x7,0(x2) +800016dc: 00f38863 beq x7,x15,800016ec +800016e0: 3390646f jal x8,80008218 +800016e4: 800016d4 .word 0x800016d4 +800016e8: 8000f57f .word 0x8000f57f +800016ec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x00000000 +800016f0: 0001a203 lw x4,0(x3) +800016f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5bbc8872 +800016f8: 0001ae03 lw x28,0(x3) +800016fc: 00418193 addi x3,x3,4 + +80001700 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + aes32dsi x23, x4, x28, 2 # perform operation +80001700: abc20bb3 aes32dsi x23,x4,x28,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +80001704: 00012383 lw x7,0(x2) +80001708: 01738863 beq x7,x23,80001718 +8000170c: 30d0646f jal x8,80008218 +80001710: 80001700 .word 0x80001700 +80001714: 8000f5db .word 0x8000f5db +80001718: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +8000171c: 0001af83 lw x31,0(x3) +80001720: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xaaaaaaaa +80001724: 0001a803 lw x16,0(x3) +80001728: 00418193 addi x3,x3,4 + +8000172c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + aes32dsi x17, x31, x16, 0 # perform operation +8000172c: 2b0f88b3 aes32dsi x17,x31,x16,0x0 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001730: 00012383 lw x7,0(x2) +80001734: 01138863 beq x7,x17,80001744 +80001738: 2e10646f jal x8,80008218 +8000173c: 8000172c .word 0x8000172c +80001740: 8000f637 .word 0x8000f637 +80001744: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +80001748: 0001af83 lw x31,0(x3) +8000174c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x55555555 +80001750: 0001ab83 lw x23,0(x3) +80001754: 00418193 addi x3,x3,4 + +80001758 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + aes32dsi x1, x31, x23, 1 # perform operation +80001758: 6b7f80b3 aes32dsi x1,x31,x23,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000175c: 00012383 lw x7,0(x2) +80001760: 00138863 beq x7,x1,80001770 +80001764: 2b50646f jal x8,80008218 +80001768: 80001758 .word 0x80001758 +8000176c: 8000f693 .word 0x8000f693 +80001770: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000001 +80001774: 0001ae83 lw x29,0(x3) +80001778: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000000 +8000177c: 0001af83 lw x31,0(x3) +80001780: 00418193 addi x3,x3,4 + +80001784 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes32dsi x27, x29, x31, 2 # perform operation +80001784: abfe8db3 aes32dsi x27,x29,x31,0x2 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001788: 00012383 lw x7,0(x2) +8000178c: 01b38863 beq x7,x27,8000179c +80001790: 2890646f jal x8,80008218 +80001794: 80001784 .word 0x80001784 +80001798: 8000f6ef .word 0x8000f6ef +8000179c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000001 +800017a0: 0001ae83 lw x29,0(x3) +800017a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x00000001 +800017a8: 0001a203 lw x4,0(x3) +800017ac: 00418193 addi x3,x3,4 + +800017b0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes32dsi x15, x29, x4, 2 # perform operation +800017b0: aa4e87b3 aes32dsi x15,x29,x4,0x2 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017b4: 00012383 lw x7,0(x2) +800017b8: 00f38863 beq x7,x15,800017c8 +800017bc: 25d0646f jal x8,80008218 +800017c0: 800017b0 .word 0x800017b0 +800017c4: 8000f744 .word 0x8000f744 +800017c8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x00000001 +800017cc: 0001a503 lw x10,0(x3) +800017d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000002 +800017d4: 0001a803 lw x16,0(x3) +800017d8: 00418193 addi x3,x3,4 + +800017dc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes32dsi x30, x10, x16, 1 # perform operation +800017dc: 6b050f33 aes32dsi x30,x10,x16,0x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017e0: 00012383 lw x7,0(x2) +800017e4: 01e38863 beq x7,x30,800017f4 +800017e8: 2310646f jal x8,80008218 +800017ec: 800017dc .word 0x800017dc +800017f0: 8000f799 .word 0x8000f799 +800017f4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x00000001 +800017f8: 0001ae83 lw x29,0(x3) +800017fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x80000000 +80001800: 0001a603 lw x12,0(x3) +80001804: 00418193 addi x3,x3,4 + +80001808 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + aes32dsi x6, x29, x12, 1 # perform operation +80001808: 6ace8333 aes32dsi x6,x29,x12,0x1 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +8000180c: 00012383 lw x7,0(x2) +80001810: 00638863 beq x7,x6,80001820 +80001814: 2050646f jal x8,80008218 +80001818: 80001808 .word 0x80001808 +8000181c: 8000f7ee .word 0x8000f7ee +80001820: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x00000001 +80001824: 0001ab83 lw x23,0(x3) +80001828: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x80000001 +8000182c: 0001ad03 lw x26,0(x3) +80001830: 00418193 addi x3,x3,4 + +80001834 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + aes32dsi x25, x23, x26, 3 # perform operation +80001834: ebab8cb3 aes32dsi x25,x23,x26,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001838: 00012383 lw x7,0(x2) +8000183c: 01938863 beq x7,x25,8000184c +80001840: 1d90646f jal x8,80008218 +80001844: 80001834 .word 0x80001834 +80001848: 8000f84a .word 0x8000f84a +8000184c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x00000001 +80001850: 0001a203 lw x4,0(x3) +80001854: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7fffffff +80001858: 0001a703 lw x14,0(x3) +8000185c: 00418193 addi x3,x3,4 + +80001860 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + aes32dsi x10, x4, x14, 3 # perform operation +80001860: eae20533 aes32dsi x10,x4,x14,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001864: 00012383 lw x7,0(x2) +80001868: 00a38863 beq x7,x10,80001878 +8000186c: 1ad0646f jal x8,80008218 +80001870: 80001860 .word 0x80001860 +80001874: 8000f8a6 .word 0x8000f8a6 +80001878: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x00000001 +8000187c: 0001a483 lw x9,0(x3) +80001880: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7ffffffe +80001884: 0001a903 lw x18,0(x3) +80001888: 00418193 addi x3,x3,4 + +8000188c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + aes32dsi x10, x9, x18, 0 # perform operation +8000188c: 2b248533 aes32dsi x10,x9,x18,0x0 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001890: 00012383 lw x7,0(x2) +80001894: 00a38863 beq x7,x10,800018a4 +80001898: 1810646f jal x8,80008218 +8000189c: 8000188c .word 0x8000188c +800018a0: 8000f902 .word 0x8000f902 +800018a4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000001 +800018a8: 0001ac03 lw x24,0(x3) +800018ac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xffffffff +800018b0: 0001a703 lw x14,0(x3) +800018b4: 00418193 addi x3,x3,4 + +800018b8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes32dsi x23, x24, x14, 3 # perform operation +800018b8: eaec0bb3 aes32dsi x23,x24,x14,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018bc: 00012383 lw x7,0(x2) +800018c0: 01738863 beq x7,x23,800018d0 +800018c4: 1550646f jal x8,80008218 +800018c8: 800018b8 .word 0x800018b8 +800018cc: 8000f95e .word 0x8000f95e +800018d0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x00000001 +800018d4: 0001a303 lw x6,0(x3) +800018d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xfffffffe +800018dc: 0001a803 lw x16,0(x3) +800018e0: 00418193 addi x3,x3,4 + +800018e4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes32dsi x25, x6, x16, 3 # perform operation +800018e4: eb030cb3 aes32dsi x25,x6,x16,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018e8: 00012383 lw x7,0(x2) +800018ec: 01938863 beq x7,x25,800018fc +800018f0: 1290646f jal x8,80008218 +800018f4: 800018e4 .word 0x800018e4 +800018f8: 8000f9ba .word 0x8000f9ba +800018fc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000001 +80001900: 0001aa03 lw x20,0(x3) +80001904: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc8872 +80001908: 0001ab83 lw x23,0(x3) +8000190c: 00418193 addi x3,x3,4 + +80001910 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + aes32dsi x12, x20, x23, 3 # perform operation +80001910: eb7a0633 aes32dsi x12,x20,x23,0x3 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001914: 00012383 lw x7,0(x2) +80001918: 00c38863 beq x7,x12,80001928 +8000191c: 0fd0646f jal x8,80008218 +80001920: 80001910 .word 0x80001910 +80001924: 8000fa16 .word 0x8000fa16 +80001928: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000001 +8000192c: 0001a683 lw x13,0(x3) +80001930: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xaaaaaaaa +80001934: 0001ad03 lw x26,0(x3) +80001938: 00418193 addi x3,x3,4 + +8000193c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + aes32dsi x16, x13, x26, 1 # perform operation +8000193c: 6ba68833 aes32dsi x16,x13,x26,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001940: 00012383 lw x7,0(x2) +80001944: 01038863 beq x7,x16,80001954 +80001948: 0d10646f jal x8,80008218 +8000194c: 8000193c .word 0x8000193c +80001950: 8000fa72 .word 0x8000fa72 +80001954: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x00000001 +80001958: 0001a203 lw x4,0(x3) +8000195c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x55555555 +80001960: 0001a083 lw x1,0(x3) +80001964: 00418193 addi x3,x3,4 + +80001968 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + aes32dsi x26, x4, x1, 3 # perform operation +80001968: ea120d33 aes32dsi x26,x4,x1,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000196c: 00012383 lw x7,0(x2) +80001970: 01a38863 beq x7,x26,80001980 +80001974: 0a50646f jal x8,80008218 +80001978: 80001968 .word 0x80001968 +8000197c: 8000face .word 0x8000face +80001980: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000002 +80001984: 0001a983 lw x19,0(x3) +80001988: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x00000000 +8000198c: 0001a083 lw x1,0(x3) +80001990: 00418193 addi x3,x3,4 + +80001994 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes32dsi x16, x19, x1, 2 # perform operation +80001994: aa198833 aes32dsi x16,x19,x1,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001998: 00012383 lw x7,0(x2) +8000199c: 01038863 beq x7,x16,800019ac +800019a0: 0790646f jal x8,80008218 +800019a4: 80001994 .word 0x80001994 +800019a8: 8000fb2a .word 0x8000fb2a +800019ac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000002 +800019b0: 0001ac03 lw x24,0(x3) +800019b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x00000001 +800019b8: 0001a583 lw x11,0(x3) +800019bc: 00418193 addi x3,x3,4 + +800019c0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes32dsi x5, x24, x11, 3 # perform operation +800019c0: eabc02b3 aes32dsi x5,x24,x11,0x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019c4: 00012383 lw x7,0(x2) +800019c8: 00538863 beq x7,x5,800019d8 +800019cc: 04d0646f jal x8,80008218 +800019d0: 800019c0 .word 0x800019c0 +800019d4: 8000fb7f .word 0x8000fb7f +800019d8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x00000002 +800019dc: 0001ab83 lw x23,0(x3) +800019e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000002 +800019e4: 0001a603 lw x12,0(x3) +800019e8: 00418193 addi x3,x3,4 + +800019ec : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes32dsi x30, x23, x12, 3 # perform operation +800019ec: eacb8f33 aes32dsi x30,x23,x12,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019f0: 00012383 lw x7,0(x2) +800019f4: 01e38863 beq x7,x30,80001a04 +800019f8: 0210646f jal x8,80008218 +800019fc: 800019ec .word 0x800019ec +80001a00: 8000fbd4 .word 0x8000fbd4 +80001a04: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x00000002 +80001a08: 0001a483 lw x9,0(x3) +80001a0c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x80000000 +80001a10: 0001a303 lw x6,0(x3) +80001a14: 00418193 addi x3,x3,4 + +80001a18 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + aes32dsi x18, x9, x6, 3 # perform operation +80001a18: ea648933 aes32dsi x18,x9,x6,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a1c: 00012383 lw x7,0(x2) +80001a20: 01238863 beq x7,x18,80001a30 +80001a24: 7f40646f jal x8,80008218 +80001a28: 80001a18 .word 0x80001a18 +80001a2c: 8000fc29 .word 0x8000fc29 +80001a30: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000002 +80001a34: 0001a703 lw x14,0(x3) +80001a38: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x80000001 +80001a3c: 0001a283 lw x5,0(x3) +80001a40: 00418193 addi x3,x3,4 + +80001a44 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + aes32dsi x16, x14, x5, 0 # perform operation +80001a44: 2a570833 aes32dsi x16,x14,x5,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a48: 00012383 lw x7,0(x2) +80001a4c: 01038863 beq x7,x16,80001a5c +80001a50: 7c80646f jal x8,80008218 +80001a54: 80001a44 .word 0x80001a44 +80001a58: 8000fc85 .word 0x8000fc85 +80001a5c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x00000002 +80001a60: 0001a283 lw x5,0(x3) +80001a64: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7fffffff +80001a68: 0001a883 lw x17,0(x3) +80001a6c: 00418193 addi x3,x3,4 + +80001a70 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + aes32dsi x18, x5, x17, 1 # perform operation +80001a70: 6b128933 aes32dsi x18,x5,x17,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a74: 00012383 lw x7,0(x2) +80001a78: 01238863 beq x7,x18,80001a88 +80001a7c: 79c0646f jal x8,80008218 +80001a80: 80001a70 .word 0x80001a70 +80001a84: 8000fce1 .word 0x8000fce1 +80001a88: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000002 +80001a8c: 0001a683 lw x13,0(x3) +80001a90: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7ffffffe +80001a94: 0001ab83 lw x23,0(x3) +80001a98: 00418193 addi x3,x3,4 + +80001a9c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + aes32dsi x1, x13, x23, 2 # perform operation +80001a9c: ab7680b3 aes32dsi x1,x13,x23,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001aa0: 00012383 lw x7,0(x2) +80001aa4: 00138863 beq x7,x1,80001ab4 +80001aa8: 7700646f jal x8,80008218 +80001aac: 80001a9c .word 0x80001a9c +80001ab0: 8000fd3d .word 0x8000fd3d +80001ab4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000002 +80001ab8: 0001aa03 lw x20,0(x3) +80001abc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xffffffff +80001ac0: 0001a283 lw x5,0(x3) +80001ac4: 00418193 addi x3,x3,4 + +80001ac8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes32dsi x25, x20, x5, 3 # perform operation +80001ac8: ea5a0cb3 aes32dsi x25,x20,x5,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001acc: 00012383 lw x7,0(x2) +80001ad0: 01938863 beq x7,x25,80001ae0 +80001ad4: 7440646f jal x8,80008218 +80001ad8: 80001ac8 .word 0x80001ac8 +80001adc: 8000fd99 .word 0x8000fd99 +80001ae0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000002 +80001ae4: 0001a983 lw x19,0(x3) +80001ae8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffe +80001aec: 0001ab83 lw x23,0(x3) +80001af0: 00418193 addi x3,x3,4 + +80001af4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes32dsi x18, x19, x23, 1 # perform operation +80001af4: 6b798933 aes32dsi x18,x19,x23,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001af8: 00012383 lw x7,0(x2) +80001afc: 01238863 beq x7,x18,80001b0c +80001b00: 7180646f jal x8,80008218 +80001b04: 80001af4 .word 0x80001af4 +80001b08: 8000fdf5 .word 0x8000fdf5 +80001b0c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x00000002 +80001b10: 0001a883 lw x17,0(x3) +80001b14: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x5bbc8872 +80001b18: 0001a803 lw x16,0(x3) +80001b1c: 00418193 addi x3,x3,4 + +80001b20 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + aes32dsi x10, x17, x16, 2 # perform operation +80001b20: ab088533 aes32dsi x10,x17,x16,0x2 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b24: 00012383 lw x7,0(x2) +80001b28: 00a38863 beq x7,x10,80001b38 +80001b2c: 6ec0646f jal x8,80008218 +80001b30: 80001b20 .word 0x80001b20 +80001b34: 8000fe51 .word 0x8000fe51 +80001b38: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000002 +80001b3c: 0001af03 lw x30,0(x3) +80001b40: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xaaaaaaaa +80001b44: 0001a503 lw x10,0(x3) +80001b48: 00418193 addi x3,x3,4 + +80001b4c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + aes32dsi x19, x30, x10, 0 # perform operation +80001b4c: 2aaf09b3 aes32dsi x19,x30,x10,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b50: 00012383 lw x7,0(x2) +80001b54: 01338863 beq x7,x19,80001b64 +80001b58: 6c00646f jal x8,80008218 +80001b5c: 80001b4c .word 0x80001b4c +80001b60: 8000fead .word 0x8000fead +80001b64: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x00000002 +80001b68: 0001ae03 lw x28,0(x3) +80001b6c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x55555555 +80001b70: 0001a483 lw x9,0(x3) +80001b74: 00418193 addi x3,x3,4 + +80001b78 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + aes32dsi x19, x28, x9, 2 # perform operation +80001b78: aa9e09b3 aes32dsi x19,x28,x9,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b7c: 00012383 lw x7,0(x2) +80001b80: 01338863 beq x7,x19,80001b90 +80001b84: 6940646f jal x8,80008218 +80001b88: 80001b78 .word 0x80001b78 +80001b8c: 8000ff09 .word 0x8000ff09 +80001b90: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x80000000 +80001b94: 0001aa03 lw x20,0(x3) +80001b98: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x00000000 +80001b9c: 0001a203 lw x4,0(x3) +80001ba0: 00418193 addi x3,x3,4 + +80001ba4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + aes32dsi x15, x20, x4, 3 # perform operation +80001ba4: ea4a07b3 aes32dsi x15,x20,x4,0x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001ba8: 00012383 lw x7,0(x2) +80001bac: 00f38863 beq x7,x15,80001bbc +80001bb0: 6680646f jal x8,80008218 +80001bb4: 80001ba4 .word 0x80001ba4 +80001bb8: 8000ff65 .word 0x8000ff65 +80001bbc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x80000000 +80001bc0: 0001a203 lw x4,0(x3) +80001bc4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000001 +80001bc8: 0001aa03 lw x20,0(x3) +80001bcc: 00418193 addi x3,x3,4 + +80001bd0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + aes32dsi x28, x4, x20, 1 # perform operation +80001bd0: 6b420e33 aes32dsi x28,x4,x20,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bd4: 00012383 lw x7,0(x2) +80001bd8: 01c38863 beq x7,x28,80001be8 +80001bdc: 63c0646f jal x8,80008218 +80001be0: 80001bd0 .word 0x80001bd0 +80001be4: 8000ffc1 .word 0x8000ffc1 +80001be8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x80000000 +80001bec: 0001ae83 lw x29,0(x3) +80001bf0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000002 +80001bf4: 0001a883 lw x17,0(x3) +80001bf8: 00418193 addi x3,x3,4 + +80001bfc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + aes32dsi x28, x29, x17, 1 # perform operation +80001bfc: 6b1e8e33 aes32dsi x28,x29,x17,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001c00: 00012383 lw x7,0(x2) +80001c04: 01c38863 beq x7,x28,80001c14 +80001c08: 6100646f jal x8,80008218 +80001c0c: 80001bfc .word 0x80001bfc +80001c10: 8001001d .word 0x8001001d +80001c14: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000000 +80001c18: 0001ab03 lw x22,0(x3) +80001c1c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x80000000 +80001c20: 0001a603 lw x12,0(x3) +80001c24: 00418193 addi x3,x3,4 + +80001c28 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + aes32dsi x26, x22, x12, 1 # perform operation +80001c28: 6acb0d33 aes32dsi x26,x22,x12,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c2c: 00012383 lw x7,0(x2) +80001c30: 01a38863 beq x7,x26,80001c40 +80001c34: 5e40646f jal x8,80008218 +80001c38: 80001c28 .word 0x80001c28 +80001c3c: 80010079 .word 0x80010079 +80001c40: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x80000000 +80001c44: 0001a503 lw x10,0(x3) +80001c48: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x80000001 +80001c4c: 0001a583 lw x11,0(x3) +80001c50: 00418193 addi x3,x3,4 + +80001c54 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + aes32dsi x25, x10, x11, 2 # perform operation +80001c54: aab50cb3 aes32dsi x25,x10,x11,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c58: 00012383 lw x7,0(x2) +80001c5c: 01938863 beq x7,x25,80001c6c +80001c60: 5b80646f jal x8,80008218 +80001c64: 80001c54 .word 0x80001c54 +80001c68: 800100dc .word 0x800100dc +80001c6c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x80000000 +80001c70: 0001a083 lw x1,0(x3) +80001c74: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7fffffff +80001c78: 0001a683 lw x13,0(x3) +80001c7c: 00418193 addi x3,x3,4 + +80001c80 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + aes32dsi x11, x1, x13, 0 # perform operation +80001c80: 2ad085b3 aes32dsi x11,x1,x13,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c84: 00012383 lw x7,0(x2) +80001c88: 00b38863 beq x7,x11,80001c98 +80001c8c: 58c0646f jal x8,80008218 +80001c90: 80001c80 .word 0x80001c80 +80001c94: 8001013f .word 0x8001013f +80001c98: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x80000000 +80001c9c: 0001a483 lw x9,0(x3) +80001ca0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x7ffffffe +80001ca4: 0001af83 lw x31,0(x3) +80001ca8: 00418193 addi x3,x3,4 + +80001cac : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + aes32dsi x14, x9, x31, 0 # perform operation +80001cac: 2bf48733 aes32dsi x14,x9,x31,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001cb0: 00012383 lw x7,0(x2) +80001cb4: 00e38863 beq x7,x14,80001cc4 +80001cb8: 5600646f jal x8,80008218 +80001cbc: 80001cac .word 0x80001cac +80001cc0: 800101a2 .word 0x800101a2 +80001cc4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000000 +80001cc8: 0001ab03 lw x22,0(x3) +80001ccc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xffffffff +80001cd0: 0001af03 lw x30,0(x3) +80001cd4: 00418193 addi x3,x3,4 + +80001cd8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + aes32dsi x23, x22, x30, 2 # perform operation +80001cd8: abeb0bb3 aes32dsi x23,x22,x30,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cdc: 00012383 lw x7,0(x2) +80001ce0: 01738863 beq x7,x23,80001cf0 +80001ce4: 5340646f jal x8,80008218 +80001ce8: 80001cd8 .word 0x80001cd8 +80001cec: 80010205 .word 0x80010205 +80001cf0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x80000000 +80001cf4: 0001a083 lw x1,0(x3) +80001cf8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xfffffffe +80001cfc: 0001a883 lw x17,0(x3) +80001d00: 00418193 addi x3,x3,4 + +80001d04 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + aes32dsi x25, x1, x17, 1 # perform operation +80001d04: 6b108cb3 aes32dsi x25,x1,x17,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001d08: 00012383 lw x7,0(x2) +80001d0c: 01938863 beq x7,x25,80001d1c +80001d10: 5080646f jal x8,80008218 +80001d14: 80001d04 .word 0x80001d04 +80001d18: 80010268 .word 0x80010268 +80001d1c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000000 +80001d20: 0001a583 lw x11,0(x3) +80001d24: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x5bbc8872 +80001d28: 0001ac03 lw x24,0(x3) +80001d2c: 00418193 addi x3,x3,4 + +80001d30 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + aes32dsi x12, x11, x24, 1 # perform operation +80001d30: 6b858633 aes32dsi x12,x11,x24,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d34: 00012383 lw x7,0(x2) +80001d38: 00c38863 beq x7,x12,80001d48 +80001d3c: 4dc0646f jal x8,80008218 +80001d40: 80001d30 .word 0x80001d30 +80001d44: 800102cb .word 0x800102cb +80001d48: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x80000000 +80001d4c: 0001a703 lw x14,0(x3) +80001d50: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xaaaaaaaa +80001d54: 0001ae83 lw x29,0(x3) +80001d58: 00418193 addi x3,x3,4 + +80001d5c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + aes32dsi x26, x14, x29, 2 # perform operation +80001d5c: abd70d33 aes32dsi x26,x14,x29,0x2 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d60: 00012383 lw x7,0(x2) +80001d64: 01a38863 beq x7,x26,80001d74 +80001d68: 4b00646f jal x8,80008218 +80001d6c: 80001d5c .word 0x80001d5c +80001d70: 8001032e .word 0x8001032e +80001d74: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x80000000 +80001d78: 0001a483 lw x9,0(x3) +80001d7c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80001d80: 0001ae03 lw x28,0(x3) +80001d84: 00418193 addi x3,x3,4 + +80001d88 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + aes32dsi x25, x9, x28, 2 # perform operation +80001d88: abc48cb3 aes32dsi x25,x9,x28,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d8c: 00012383 lw x7,0(x2) +80001d90: 01938863 beq x7,x25,80001da0 +80001d94: 4840646f jal x8,80008218 +80001d98: 80001d88 .word 0x80001d88 +80001d9c: 80010391 .word 0x80010391 +80001da0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x80000001 +80001da4: 0001af83 lw x31,0(x3) +80001da8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x00000000 +80001dac: 0001a903 lw x18,0(x3) +80001db0: 00418193 addi x3,x3,4 + +80001db4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + aes32dsi x5, x31, x18, 1 # perform operation +80001db4: 6b2f82b3 aes32dsi x5,x31,x18,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001db8: 00012383 lw x7,0(x2) +80001dbc: 00538863 beq x7,x5,80001dcc +80001dc0: 4580646f jal x8,80008218 +80001dc4: 80001db4 .word 0x80001db4 +80001dc8: 800103f4 .word 0x800103f4 +80001dcc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x80000001 +80001dd0: 0001a883 lw x17,0(x3) +80001dd4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000001 +80001dd8: 0001ae03 lw x28,0(x3) +80001ddc: 00418193 addi x3,x3,4 + +80001de0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + aes32dsi x16, x17, x28, 0 # perform operation +80001de0: 2bc88833 aes32dsi x16,x17,x28,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001de4: 00012383 lw x7,0(x2) +80001de8: 01038863 beq x7,x16,80001df8 +80001dec: 42c0646f jal x8,80008218 +80001df0: 80001de0 .word 0x80001de0 +80001df4: 80010450 .word 0x80010450 +80001df8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x80000001 +80001dfc: 0001a083 lw x1,0(x3) +80001e00: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000002 +80001e04: 0001ae03 lw x28,0(x3) +80001e08: 00418193 addi x3,x3,4 + +80001e0c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + aes32dsi x25, x1, x28, 0 # perform operation +80001e0c: 2bc08cb3 aes32dsi x25,x1,x28,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e10: 00012383 lw x7,0(x2) +80001e14: 01938863 beq x7,x25,80001e24 +80001e18: 4000646f jal x8,80008218 +80001e1c: 80001e0c .word 0x80001e0c +80001e20: 800104ac .word 0x800104ac +80001e24: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x80000001 +80001e28: 0001a803 lw x16,0(x3) +80001e2c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x80000000 +80001e30: 0001ad03 lw x26,0(x3) +80001e34: 00418193 addi x3,x3,4 + +80001e38 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + aes32dsi x31, x16, x26, 2 # perform operation +80001e38: aba80fb3 aes32dsi x31,x16,x26,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e3c: 00012383 lw x7,0(x2) +80001e40: 01f38863 beq x7,x31,80001e50 +80001e44: 3d40646f jal x8,80008218 +80001e48: 80001e38 .word 0x80001e38 +80001e4c: 80010508 .word 0x80010508 +80001e50: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x80000001 +80001e54: 0001a603 lw x12,0(x3) +80001e58: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x80000001 +80001e5c: 0001aa03 lw x20,0(x3) +80001e60: 00418193 addi x3,x3,4 + +80001e64 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + aes32dsi x30, x12, x20, 2 # perform operation +80001e64: ab460f33 aes32dsi x30,x12,x20,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e68: 00012383 lw x7,0(x2) +80001e6c: 01e38863 beq x7,x30,80001e7c +80001e70: 3a80646f jal x8,80008218 +80001e74: 80001e64 .word 0x80001e64 +80001e78: 8001056b .word 0x8001056b +80001e7c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x80000001 +80001e80: 0001ae83 lw x29,0(x3) +80001e84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7fffffff +80001e88: 0001a603 lw x12,0(x3) +80001e8c: 00418193 addi x3,x3,4 + +80001e90 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + aes32dsi x4, x29, x12, 3 # perform operation +80001e90: eace8233 aes32dsi x4,x29,x12,0x3 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e94: 00012383 lw x7,0(x2) +80001e98: 00438863 beq x7,x4,80001ea8 +80001e9c: 37c0646f jal x8,80008218 +80001ea0: 80001e90 .word 0x80001e90 +80001ea4: 800105ce .word 0x800105ce +80001ea8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x80000001 +80001eac: 0001af03 lw x30,0(x3) +80001eb0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x7ffffffe +80001eb4: 0001a483 lw x9,0(x3) +80001eb8: 00418193 addi x3,x3,4 + +80001ebc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + aes32dsi x31, x30, x9, 2 # perform operation +80001ebc: aa9f0fb3 aes32dsi x31,x30,x9,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ec0: 00012383 lw x7,0(x2) +80001ec4: 01f38863 beq x7,x31,80001ed4 +80001ec8: 3500646f jal x8,80008218 +80001ecc: 80001ebc .word 0x80001ebc +80001ed0: 80010631 .word 0x80010631 +80001ed4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x80000001 +80001ed8: 0001a903 lw x18,0(x3) +80001edc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xffffffff +80001ee0: 0001a283 lw x5,0(x3) +80001ee4: 00418193 addi x3,x3,4 + +80001ee8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + aes32dsi x13, x18, x5, 1 # perform operation +80001ee8: 6a5906b3 aes32dsi x13,x18,x5,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001eec: 00012383 lw x7,0(x2) +80001ef0: 00d38863 beq x7,x13,80001f00 +80001ef4: 3240646f jal x8,80008218 +80001ef8: 80001ee8 .word 0x80001ee8 +80001efc: 80010694 .word 0x80010694 +80001f00: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x80000001 +80001f04: 0001ae03 lw x28,0(x3) +80001f08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xfffffffe +80001f0c: 0001af83 lw x31,0(x3) +80001f10: 00418193 addi x3,x3,4 + +80001f14 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + aes32dsi x20, x28, x31, 1 # perform operation +80001f14: 6bfe0a33 aes32dsi x20,x28,x31,0x1 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f18: 00012383 lw x7,0(x2) +80001f1c: 01438863 beq x7,x20,80001f2c +80001f20: 2f80646f jal x8,80008218 +80001f24: 80001f14 .word 0x80001f14 +80001f28: 800106f7 .word 0x800106f7 +80001f2c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000001 +80001f30: 0001a583 lw x11,0(x3) +80001f34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x5bbc8872 +80001f38: 0001a683 lw x13,0(x3) +80001f3c: 00418193 addi x3,x3,4 + +80001f40 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + aes32dsi x10, x11, x13, 3 # perform operation +80001f40: ead58533 aes32dsi x10,x11,x13,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f44: 00012383 lw x7,0(x2) +80001f48: 00a38863 beq x7,x10,80001f58 +80001f4c: 2cc0646f jal x8,80008218 +80001f50: 80001f40 .word 0x80001f40 +80001f54: 8001075a .word 0x8001075a +80001f58: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x80000001 +80001f5c: 0001ae03 lw x28,0(x3) +80001f60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xaaaaaaaa +80001f64: 0001a683 lw x13,0(x3) +80001f68: 00418193 addi x3,x3,4 + +80001f6c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + aes32dsi x20, x28, x13, 0 # perform operation +80001f6c: 2ade0a33 aes32dsi x20,x28,x13,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f70: 00012383 lw x7,0(x2) +80001f74: 01438863 beq x7,x20,80001f84 +80001f78: 2a00646f jal x8,80008218 +80001f7c: 80001f6c .word 0x80001f6c +80001f80: 800107bd .word 0x800107bd +80001f84: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x80000001 +80001f88: 0001af83 lw x31,0(x3) +80001f8c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80001f90: 0001ae03 lw x28,0(x3) +80001f94: 00418193 addi x3,x3,4 + +80001f98 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + aes32dsi x4, x31, x28, 2 # perform operation +80001f98: abcf8233 aes32dsi x4,x31,x28,0x2 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f9c: 00012383 lw x7,0(x2) +80001fa0: 00438863 beq x7,x4,80001fb0 +80001fa4: 2740646f jal x8,80008218 +80001fa8: 80001f98 .word 0x80001f98 +80001fac: 80010820 .word 0x80010820 +80001fb0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x7fffffff +80001fb4: 0001ab03 lw x22,0(x3) +80001fb8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000000 +80001fbc: 0001aa83 lw x21,0(x3) +80001fc0: 00418193 addi x3,x3,4 + +80001fc4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + aes32dsi x31, x22, x21, 0 # perform operation +80001fc4: 2b5b0fb3 aes32dsi x31,x22,x21,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fc8: 00012383 lw x7,0(x2) +80001fcc: 01f38863 beq x7,x31,80001fdc +80001fd0: 2480646f jal x8,80008218 +80001fd4: 80001fc4 .word 0x80001fc4 +80001fd8: 80010883 .word 0x80010883 +80001fdc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7fffffff +80001fe0: 0001af83 lw x31,0(x3) +80001fe4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x00000001 +80001fe8: 0001a483 lw x9,0(x3) +80001fec: 00418193 addi x3,x3,4 + +80001ff0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + aes32dsi x10, x31, x9, 1 # perform operation +80001ff0: 6a9f8533 aes32dsi x10,x31,x9,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001ff4: 00012383 lw x7,0(x2) +80001ff8: 00a38863 beq x7,x10,80002008 +80001ffc: 21c0646f jal x8,80008218 +80002000: 80001ff0 .word 0x80001ff0 +80002004: 800108df .word 0x800108df +80002008: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7fffffff +8000200c: 0001ad03 lw x26,0(x3) +80002010: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000002 +80002014: 0001a883 lw x17,0(x3) +80002018: 00418193 addi x3,x3,4 + +8000201c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + aes32dsi x20, x26, x17, 0 # perform operation +8000201c: 2b1d0a33 aes32dsi x20,x26,x17,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002020: 00012383 lw x7,0(x2) +80002024: 01438863 beq x7,x20,80002034 +80002028: 1f00646f jal x8,80008218 +8000202c: 8000201c .word 0x8000201c +80002030: 8001093b .word 0x8001093b +80002034: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x7fffffff +80002038: 0001a483 lw x9,0(x3) +8000203c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x80000000 +80002040: 0001aa03 lw x20,0(x3) +80002044: 00418193 addi x3,x3,4 + +80002048 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + aes32dsi x10, x9, x20, 3 # perform operation +80002048: eb448533 aes32dsi x10,x9,x20,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000204c: 00012383 lw x7,0(x2) +80002050: 00a38863 beq x7,x10,80002060 +80002054: 1c40646f jal x8,80008218 +80002058: 80002048 .word 0x80002048 +8000205c: 80010997 .word 0x80010997 +80002060: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7fffffff +80002064: 0001ad03 lw x26,0(x3) +80002068: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x80000001 +8000206c: 0001a303 lw x6,0(x3) +80002070: 00418193 addi x3,x3,4 + +80002074 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + aes32dsi x9, x26, x6, 1 # perform operation +80002074: 6a6d04b3 aes32dsi x9,x26,x6,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002078: 00012383 lw x7,0(x2) +8000207c: 00938863 beq x7,x9,8000208c +80002080: 1980646f jal x8,80008218 +80002084: 80002074 .word 0x80002074 +80002088: 800109fa .word 0x800109fa +8000208c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7fffffff +80002090: 0001ad03 lw x26,0(x3) +80002094: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7fffffff +80002098: 0001aa03 lw x20,0(x3) +8000209c: 00418193 addi x3,x3,4 + +800020a0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + aes32dsi x19, x26, x20, 0 # perform operation +800020a0: 2b4d09b3 aes32dsi x19,x26,x20,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +800020a4: 00012383 lw x7,0(x2) +800020a8: 01338863 beq x7,x19,800020b8 +800020ac: 16c0646f jal x8,80008218 +800020b0: 800020a0 .word 0x800020a0 +800020b4: 80010a5d .word 0x80010a5d +800020b8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x7fffffff +800020bc: 0001a803 lw x16,0(x3) +800020c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x7ffffffe +800020c4: 0001a983 lw x19,0(x3) +800020c8: 00418193 addi x3,x3,4 + +800020cc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + aes32dsi x18, x16, x19, 0 # perform operation +800020cc: 2b380933 aes32dsi x18,x16,x19,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020d0: 00012383 lw x7,0(x2) +800020d4: 01238863 beq x7,x18,800020e4 +800020d8: 1400646f jal x8,80008218 +800020dc: 800020cc .word 0x800020cc +800020e0: 80010ac0 .word 0x80010ac0 +800020e4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x7fffffff +800020e8: 0001a483 lw x9,0(x3) +800020ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xffffffff +800020f0: 0001a083 lw x1,0(x3) +800020f4: 00418193 addi x3,x3,4 + +800020f8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + aes32dsi x6, x9, x1, 2 # perform operation +800020f8: aa148333 aes32dsi x6,x9,x1,0x2 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020fc: 00012383 lw x7,0(x2) +80002100: 00638863 beq x7,x6,80002110 +80002104: 1140646f jal x8,80008218 +80002108: 800020f8 .word 0x800020f8 +8000210c: 80010b23 .word 0x80010b23 +80002110: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x7fffffff +80002114: 0001a283 lw x5,0(x3) +80002118: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xfffffffe +8000211c: 0001af83 lw x31,0(x3) +80002120: 00418193 addi x3,x3,4 + +80002124 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + aes32dsi x29, x5, x31, 2 # perform operation +80002124: abf28eb3 aes32dsi x29,x5,x31,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002128: 00012383 lw x7,0(x2) +8000212c: 01d38863 beq x7,x29,8000213c +80002130: 0e80646f jal x8,80008218 +80002134: 80002124 .word 0x80002124 +80002138: 80010b86 .word 0x80010b86 +8000213c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7fffffff +80002140: 0001af83 lw x31,0(x3) +80002144: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x5bbc8872 +80002148: 0001ac83 lw x25,0(x3) +8000214c: 00418193 addi x3,x3,4 + +80002150 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + aes32dsi x26, x31, x25, 0 # perform operation +80002150: 2b9f8d33 aes32dsi x26,x31,x25,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002154: 00012383 lw x7,0(x2) +80002158: 01a38863 beq x7,x26,80002168 +8000215c: 0bc0646f jal x8,80008218 +80002160: 80002150 .word 0x80002150 +80002164: 80010be9 .word 0x80010be9 +80002168: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x7fffffff +8000216c: 0001a083 lw x1,0(x3) +80002170: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xaaaaaaaa +80002174: 0001a583 lw x11,0(x3) +80002178: 00418193 addi x3,x3,4 + +8000217c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + aes32dsi x12, x1, x11, 1 # perform operation +8000217c: 6ab08633 aes32dsi x12,x1,x11,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002180: 00012383 lw x7,0(x2) +80002184: 00c38863 beq x7,x12,80002194 +80002188: 0900646f jal x8,80008218 +8000218c: 8000217c .word 0x8000217c +80002190: 80010c4c .word 0x80010c4c +80002194: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x7fffffff +80002198: 0001ab03 lw x22,0(x3) +8000219c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x55555555 +800021a0: 0001a803 lw x16,0(x3) +800021a4: 00418193 addi x3,x3,4 + +800021a8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + aes32dsi x28, x22, x16, 1 # perform operation +800021a8: 6b0b0e33 aes32dsi x28,x22,x16,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +800021ac: 00012383 lw x7,0(x2) +800021b0: 01c38863 beq x7,x28,800021c0 +800021b4: 0640646f jal x8,80008218 +800021b8: 800021a8 .word 0x800021a8 +800021bc: 80010caf .word 0x80010caf +800021c0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7ffffffe +800021c4: 0001ad03 lw x26,0(x3) +800021c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000000 +800021cc: 0001af83 lw x31,0(x3) +800021d0: 00418193 addi x3,x3,4 + +800021d4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + aes32dsi x23, x26, x31, 0 # perform operation +800021d4: 2bfd0bb3 aes32dsi x23,x26,x31,0x0 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021d8: 00012383 lw x7,0(x2) +800021dc: 01738863 beq x7,x23,800021ec +800021e0: 0380646f jal x8,80008218 +800021e4: 800021d4 .word 0x800021d4 +800021e8: 80010d12 .word 0x80010d12 +800021ec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x7ffffffe +800021f0: 0001a683 lw x13,0(x3) +800021f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x00000001 +800021f8: 0001ae83 lw x29,0(x3) +800021fc: 00418193 addi x3,x3,4 + +80002200 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + aes32dsi x21, x13, x29, 1 # perform operation +80002200: 6bd68ab3 aes32dsi x21,x13,x29,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +80002204: 00012383 lw x7,0(x2) +80002208: 01538863 beq x7,x21,80002218 +8000220c: 00c0646f jal x8,80008218 +80002210: 80002200 .word 0x80002200 +80002214: 80010d6e .word 0x80010d6e +80002218: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x7ffffffe +8000221c: 0001a983 lw x19,0(x3) +80002220: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000002 +80002224: 0001a303 lw x6,0(x3) +80002228: 00418193 addi x3,x3,4 + +8000222c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + aes32dsi x16, x19, x6, 0 # perform operation +8000222c: 2a698833 aes32dsi x16,x19,x6,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002230: 00012383 lw x7,0(x2) +80002234: 01038863 beq x7,x16,80002244 +80002238: 7e10546f jal x8,80008218 +8000223c: 8000222c .word 0x8000222c +80002240: 80010dca .word 0x80010dca +80002244: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7ffffffe +80002248: 0001ac83 lw x25,0(x3) +8000224c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x80000000 +80002250: 0001a203 lw x4,0(x3) +80002254: 00418193 addi x3,x3,4 + +80002258 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + aes32dsi x1, x25, x4, 3 # perform operation +80002258: ea4c80b3 aes32dsi x1,x25,x4,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000225c: 00012383 lw x7,0(x2) +80002260: 00138863 beq x7,x1,80002270 +80002264: 7b50546f jal x8,80008218 +80002268: 80002258 .word 0x80002258 +8000226c: 80010e26 .word 0x80010e26 +80002270: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7ffffffe +80002274: 0001aa83 lw x21,0(x3) +80002278: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x80000001 +8000227c: 0001a983 lw x19,0(x3) +80002280: 00418193 addi x3,x3,4 + +80002284 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + aes32dsi x25, x21, x19, 2 # perform operation +80002284: ab3a8cb3 aes32dsi x25,x21,x19,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002288: 00012383 lw x7,0(x2) +8000228c: 01938863 beq x7,x25,8000229c +80002290: 7890546f jal x8,80008218 +80002294: 80002284 .word 0x80002284 +80002298: 80010e89 .word 0x80010e89 +8000229c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x7ffffffe +800022a0: 0001a303 lw x6,0(x3) +800022a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x7fffffff +800022a8: 0001a083 lw x1,0(x3) +800022ac: 00418193 addi x3,x3,4 + +800022b0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + aes32dsi x9, x6, x1, 2 # perform operation +800022b0: aa1304b3 aes32dsi x9,x6,x1,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022b4: 00012383 lw x7,0(x2) +800022b8: 00938863 beq x7,x9,800022c8 +800022bc: 75d0546f jal x8,80008218 +800022c0: 800022b0 .word 0x800022b0 +800022c4: 80010eec .word 0x80010eec +800022c8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x7ffffffe +800022cc: 0001ab83 lw x23,0(x3) +800022d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x7ffffffe +800022d4: 0001ae03 lw x28,0(x3) +800022d8: 00418193 addi x3,x3,4 + +800022dc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + aes32dsi x10, x23, x28, 3 # perform operation +800022dc: ebcb8533 aes32dsi x10,x23,x28,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022e0: 00012383 lw x7,0(x2) +800022e4: 00a38863 beq x7,x10,800022f4 +800022e8: 7310546f jal x8,80008218 +800022ec: 800022dc .word 0x800022dc +800022f0: 80010f4f .word 0x80010f4f +800022f4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7ffffffe +800022f8: 0001ac83 lw x25,0(x3) +800022fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0xffffffff +80002300: 0001a203 lw x4,0(x3) +80002304: 00418193 addi x3,x3,4 + +80002308 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + aes32dsi x31, x25, x4, 1 # perform operation +80002308: 6a4c8fb3 aes32dsi x31,x25,x4,0x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +8000230c: 00012383 lw x7,0(x2) +80002310: 01f38863 beq x7,x31,80002320 +80002314: 7050546f jal x8,80008218 +80002318: 80002308 .word 0x80002308 +8000231c: 80010fb2 .word 0x80010fb2 +80002320: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7ffffffe +80002324: 0001af83 lw x31,0(x3) +80002328: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xfffffffe +8000232c: 0001a603 lw x12,0(x3) +80002330: 00418193 addi x3,x3,4 + +80002334 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + aes32dsi x6, x31, x12, 2 # perform operation +80002334: aacf8333 aes32dsi x6,x31,x12,0x2 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002338: 00012383 lw x7,0(x2) +8000233c: 00638863 beq x7,x6,8000234c +80002340: 6d90546f jal x8,80008218 +80002344: 80002334 .word 0x80002334 +80002348: 80011015 .word 0x80011015 +8000234c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x7ffffffe +80002350: 0001a283 lw x5,0(x3) +80002354: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x5bbc8872 +80002358: 0001a503 lw x10,0(x3) +8000235c: 00418193 addi x3,x3,4 + +80002360 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + aes32dsi x28, x5, x10, 0 # perform operation +80002360: 2aa28e33 aes32dsi x28,x5,x10,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002364: 00012383 lw x7,0(x2) +80002368: 01c38863 beq x7,x28,80002378 +8000236c: 6ad0546f jal x8,80008218 +80002370: 80002360 .word 0x80002360 +80002374: 80011078 .word 0x80011078 +80002378: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7ffffffe +8000237c: 0001a583 lw x11,0(x3) +80002380: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xaaaaaaaa +80002384: 0001aa83 lw x21,0(x3) +80002388: 00418193 addi x3,x3,4 + +8000238c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + aes32dsi x20, x11, x21, 0 # perform operation +8000238c: 2b558a33 aes32dsi x20,x11,x21,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002390: 00012383 lw x7,0(x2) +80002394: 01438863 beq x7,x20,800023a4 +80002398: 6810546f jal x8,80008218 +8000239c: 8000238c .word 0x8000238c +800023a0: 800110db .word 0x800110db +800023a4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7ffffffe +800023a8: 0001ac83 lw x25,0(x3) +800023ac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x55555555 +800023b0: 0001ae83 lw x29,0(x3) +800023b4: 00418193 addi x3,x3,4 + +800023b8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + aes32dsi x13, x25, x29, 0 # perform operation +800023b8: 2bdc86b3 aes32dsi x13,x25,x29,0x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023bc: 00012383 lw x7,0(x2) +800023c0: 00d38863 beq x7,x13,800023d0 +800023c4: 6550546f jal x8,80008218 +800023c8: 800023b8 .word 0x800023b8 +800023cc: 8001113e .word 0x8001113e +800023d0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xffffffff +800023d4: 0001ab03 lw x22,0(x3) +800023d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000000 +800023dc: 0001a983 lw x19,0(x3) +800023e0: 00418193 addi x3,x3,4 + +800023e4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes32dsi x28, x22, x19, 2 # perform operation +800023e4: ab3b0e33 aes32dsi x28,x22,x19,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023e8: 00012383 lw x7,0(x2) +800023ec: 01c38863 beq x7,x28,800023fc +800023f0: 6290546f jal x8,80008218 +800023f4: 800023e4 .word 0x800023e4 +800023f8: 800111a1 .word 0x800111a1 +800023fc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xffffffff +80002400: 0001a983 lw x19,0(x3) +80002404: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000001 +80002408: 0001a883 lw x17,0(x3) +8000240c: 00418193 addi x3,x3,4 + +80002410 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes32dsi x1, x19, x17, 1 # perform operation +80002410: 6b1980b3 aes32dsi x1,x19,x17,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002414: 00012383 lw x7,0(x2) +80002418: 00138863 beq x7,x1,80002428 +8000241c: 5fd0546f jal x8,80008218 +80002420: 80002410 .word 0x80002410 +80002424: 800111fd .word 0x800111fd +80002428: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xffffffff +8000242c: 0001ad83 lw x27,0(x3) +80002430: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x00000002 +80002434: 0001a583 lw x11,0(x3) +80002438: 00418193 addi x3,x3,4 + +8000243c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes32dsi x13, x27, x11, 1 # perform operation +8000243c: 6abd86b3 aes32dsi x13,x27,x11,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002440: 00012383 lw x7,0(x2) +80002444: 00d38863 beq x7,x13,80002454 +80002448: 5d10546f jal x8,80008218 +8000244c: 8000243c .word 0x8000243c +80002450: 80011259 .word 0x80011259 +80002454: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xffffffff +80002458: 0001ae03 lw x28,0(x3) +8000245c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x80000000 +80002460: 0001af03 lw x30,0(x3) +80002464: 00418193 addi x3,x3,4 + +80002468 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + aes32dsi x24, x28, x30, 1 # perform operation +80002468: 6bee0c33 aes32dsi x24,x28,x30,0x1 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000246c: 00012383 lw x7,0(x2) +80002470: 01838863 beq x7,x24,80002480 +80002474: 5a50546f jal x8,80008218 +80002478: 80002468 .word 0x80002468 +8000247c: 800112b5 .word 0x800112b5 +80002480: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xffffffff +80002484: 0001a883 lw x17,0(x3) +80002488: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x80000001 +8000248c: 0001a803 lw x16,0(x3) +80002490: 00418193 addi x3,x3,4 + +80002494 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + aes32dsi x22, x17, x16, 3 # perform operation +80002494: eb088b33 aes32dsi x22,x17,x16,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002498: 00012383 lw x7,0(x2) +8000249c: 01638863 beq x7,x22,800024ac +800024a0: 5790546f jal x8,80008218 +800024a4: 80002494 .word 0x80002494 +800024a8: 80011318 .word 0x80011318 +800024ac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xffffffff +800024b0: 0001a683 lw x13,0(x3) +800024b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7fffffff +800024b8: 0001a703 lw x14,0(x3) +800024bc: 00418193 addi x3,x3,4 + +800024c0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + aes32dsi x16, x13, x14, 0 # perform operation +800024c0: 2ae68833 aes32dsi x16,x13,x14,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024c4: 00012383 lw x7,0(x2) +800024c8: 01038863 beq x7,x16,800024d8 +800024cc: 54d0546f jal x8,80008218 +800024d0: 800024c0 .word 0x800024c0 +800024d4: 8001137b .word 0x8001137b +800024d8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xffffffff +800024dc: 0001a603 lw x12,0(x3) +800024e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7ffffffe +800024e4: 0001ac03 lw x24,0(x3) +800024e8: 00418193 addi x3,x3,4 + +800024ec : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + aes32dsi x26, x12, x24, 0 # perform operation +800024ec: 2b860d33 aes32dsi x26,x12,x24,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024f0: 00012383 lw x7,0(x2) +800024f4: 01a38863 beq x7,x26,80002504 +800024f8: 5210546f jal x8,80008218 +800024fc: 800024ec .word 0x800024ec +80002500: 800113de .word 0x800113de +80002504: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xffffffff +80002508: 0001ad83 lw x27,0(x3) +8000250c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xffffffff +80002510: 0001a683 lw x13,0(x3) +80002514: 00418193 addi x3,x3,4 + +80002518 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes32dsi x25, x27, x13, 3 # perform operation +80002518: eadd8cb3 aes32dsi x25,x27,x13,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +8000251c: 00012383 lw x7,0(x2) +80002520: 01938863 beq x7,x25,80002530 +80002524: 4f50546f jal x8,80008218 +80002528: 80002518 .word 0x80002518 +8000252c: 80011441 .word 0x80011441 +80002530: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xffffffff +80002534: 0001a583 lw x11,0(x3) +80002538: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xfffffffe +8000253c: 0001a983 lw x19,0(x3) +80002540: 00418193 addi x3,x3,4 + +80002544 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes32dsi x29, x11, x19, 0 # perform operation +80002544: 2b358eb3 aes32dsi x29,x11,x19,0x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002548: 00012383 lw x7,0(x2) +8000254c: 01d38863 beq x7,x29,8000255c +80002550: 4c90546f jal x8,80008218 +80002554: 80002544 .word 0x80002544 +80002558: 800114a4 .word 0x800114a4 +8000255c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0xffffffff +80002560: 0001a203 lw x4,0(x3) +80002564: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x5bbc8872 +80002568: 0001ac83 lw x25,0(x3) +8000256c: 00418193 addi x3,x3,4 + +80002570 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + aes32dsi x5, x4, x25, 0 # perform operation +80002570: 2b9202b3 aes32dsi x5,x4,x25,0x0 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002574: 00012383 lw x7,0(x2) +80002578: 00538863 beq x7,x5,80002588 +8000257c: 49d0546f jal x8,80008218 +80002580: 80002570 .word 0x80002570 +80002584: 80011507 .word 0x80011507 +80002588: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xffffffff +8000258c: 0001ab03 lw x22,0(x3) +80002590: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xaaaaaaaa +80002594: 0001a583 lw x11,0(x3) +80002598: 00418193 addi x3,x3,4 + +8000259c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + aes32dsi x31, x22, x11, 3 # perform operation +8000259c: eabb0fb3 aes32dsi x31,x22,x11,0x3 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +800025a0: 00012383 lw x7,0(x2) +800025a4: 01f38863 beq x7,x31,800025b4 +800025a8: 4710546f jal x8,80008218 +800025ac: 8000259c .word 0x8000259c +800025b0: 8001156a .word 0x8001156a +800025b4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xffffffff +800025b8: 0001ae83 lw x29,0(x3) +800025bc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x55555555 +800025c0: 0001a703 lw x14,0(x3) +800025c4: 00418193 addi x3,x3,4 + +800025c8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + aes32dsi x19, x29, x14, 1 # perform operation +800025c8: 6aee89b3 aes32dsi x19,x29,x14,0x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025cc: 00012383 lw x7,0(x2) +800025d0: 01338863 beq x7,x19,800025e0 +800025d4: 4450546f jal x8,80008218 +800025d8: 800025c8 .word 0x800025c8 +800025dc: 800115cd .word 0x800115cd +800025e0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xfffffffe +800025e4: 0001ad83 lw x27,0(x3) +800025e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000000 +800025ec: 0001aa03 lw x20,0(x3) +800025f0: 00418193 addi x3,x3,4 + +800025f4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes32dsi x26, x27, x20, 1 # perform operation +800025f4: 6b4d8d33 aes32dsi x26,x27,x20,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025f8: 00012383 lw x7,0(x2) +800025fc: 01a38863 beq x7,x26,8000260c +80002600: 4190546f jal x8,80008218 +80002604: 800025f4 .word 0x800025f4 +80002608: 80011630 .word 0x80011630 +8000260c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xfffffffe +80002610: 0001ac83 lw x25,0(x3) +80002614: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000001 +80002618: 0001aa83 lw x21,0(x3) +8000261c: 00418193 addi x3,x3,4 + +80002620 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes32dsi x29, x25, x21, 2 # perform operation +80002620: ab5c8eb3 aes32dsi x29,x25,x21,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002624: 00012383 lw x7,0(x2) +80002628: 01d38863 beq x7,x29,80002638 +8000262c: 3ed0546f jal x8,80008218 +80002630: 80002620 .word 0x80002620 +80002634: 8001168c .word 0x8001168c +80002638: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +8000263c: 0001af83 lw x31,0(x3) +80002640: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000002 +80002644: 0001ae03 lw x28,0(x3) +80002648: 00418193 addi x3,x3,4 + +8000264c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes32dsi x22, x31, x28, 0 # perform operation +8000264c: 2bcf8b33 aes32dsi x22,x31,x28,0x0 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002650: 00012383 lw x7,0(x2) +80002654: 01638863 beq x7,x22,80002664 +80002658: 3c10546f jal x8,80008218 +8000265c: 8000264c .word 0x8000264c +80002660: 800116e8 .word 0x800116e8 +80002664: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +80002668: 0001af83 lw x31,0(x3) +8000266c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x80000000 +80002670: 0001a583 lw x11,0(x3) +80002674: 00418193 addi x3,x3,4 + +80002678 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + aes32dsi x27, x31, x11, 1 # perform operation +80002678: 6abf8db3 aes32dsi x27,x31,x11,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000267c: 00012383 lw x7,0(x2) +80002680: 01b38863 beq x7,x27,80002690 +80002684: 3950546f jal x8,80008218 +80002688: 80002678 .word 0x80002678 +8000268c: 80011744 .word 0x80011744 +80002690: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xfffffffe +80002694: 0001ae03 lw x28,0(x3) +80002698: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000001 +8000269c: 0001a783 lw x15,0(x3) +800026a0: 00418193 addi x3,x3,4 + +800026a4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + aes32dsi x23, x28, x15, 0 # perform operation +800026a4: 2afe0bb3 aes32dsi x23,x28,x15,0x0 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +800026a8: 00012383 lw x7,0(x2) +800026ac: 01738863 beq x7,x23,800026bc +800026b0: 3690546f jal x8,80008218 +800026b4: 800026a4 .word 0x800026a4 +800026b8: 800117a7 .word 0x800117a7 +800026bc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xfffffffe +800026c0: 0001a683 lw x13,0(x3) +800026c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7fffffff +800026c8: 0001ab83 lw x23,0(x3) +800026cc: 00418193 addi x3,x3,4 + +800026d0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + aes32dsi x18, x13, x23, 3 # perform operation +800026d0: eb768933 aes32dsi x18,x13,x23,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026d4: 00012383 lw x7,0(x2) +800026d8: 01238863 beq x7,x18,800026e8 +800026dc: 33d0546f jal x8,80008218 +800026e0: 800026d0 .word 0x800026d0 +800026e4: 8001180a .word 0x8001180a +800026e8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xfffffffe +800026ec: 0001ab03 lw x22,0(x3) +800026f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x7ffffffe +800026f4: 0001a583 lw x11,0(x3) +800026f8: 00418193 addi x3,x3,4 + +800026fc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + aes32dsi x9, x22, x11, 2 # perform operation +800026fc: aabb04b3 aes32dsi x9,x22,x11,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +80002700: 00012383 lw x7,0(x2) +80002704: 00938863 beq x7,x9,80002714 +80002708: 3110546f jal x8,80008218 +8000270c: 800026fc .word 0x800026fc +80002710: 8001186d .word 0x8001186d +80002714: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xfffffffe +80002718: 0001ac03 lw x24,0(x3) +8000271c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xffffffff +80002720: 0001a703 lw x14,0(x3) +80002724: 00418193 addi x3,x3,4 + +80002728 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes32dsi x30, x24, x14, 3 # perform operation +80002728: eaec0f33 aes32dsi x30,x24,x14,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +8000272c: 00012383 lw x7,0(x2) +80002730: 01e38863 beq x7,x30,80002740 +80002734: 2e50546f jal x8,80008218 +80002738: 80002728 .word 0x80002728 +8000273c: 800118d0 .word 0x800118d0 +80002740: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xfffffffe +80002744: 0001a083 lw x1,0(x3) +80002748: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xfffffffe +8000274c: 0001ac83 lw x25,0(x3) +80002750: 00418193 addi x3,x3,4 + +80002754 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes32dsi x31, x1, x25, 0 # perform operation +80002754: 2b908fb3 aes32dsi x31,x1,x25,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002758: 00012383 lw x7,0(x2) +8000275c: 01f38863 beq x7,x31,8000276c +80002760: 2b90546f jal x8,80008218 +80002764: 80002754 .word 0x80002754 +80002768: 80011933 .word 0x80011933 +8000276c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xfffffffe +80002770: 0001a703 lw x14,0(x3) +80002774: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x5bbc8872 +80002778: 0001a303 lw x6,0(x3) +8000277c: 00418193 addi x3,x3,4 + +80002780 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + aes32dsi x5, x14, x6, 1 # perform operation +80002780: 6a6702b3 aes32dsi x5,x14,x6,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002784: 00012383 lw x7,0(x2) +80002788: 00538863 beq x7,x5,80002798 +8000278c: 28d0546f jal x8,80008218 +80002790: 80002780 .word 0x80002780 +80002794: 80011996 .word 0x80011996 +80002798: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xfffffffe +8000279c: 0001ab83 lw x23,0(x3) +800027a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xaaaaaaaa +800027a4: 0001a583 lw x11,0(x3) +800027a8: 00418193 addi x3,x3,4 + +800027ac : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + aes32dsi x20, x23, x11, 3 # perform operation +800027ac: eabb8a33 aes32dsi x20,x23,x11,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027b0: 00012383 lw x7,0(x2) +800027b4: 01438863 beq x7,x20,800027c4 +800027b8: 2610546f jal x8,80008218 +800027bc: 800027ac .word 0x800027ac +800027c0: 800119f9 .word 0x800119f9 +800027c4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xfffffffe +800027c8: 0001ab03 lw x22,0(x3) +800027cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x55555555 +800027d0: 0001a283 lw x5,0(x3) +800027d4: 00418193 addi x3,x3,4 + +800027d8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + aes32dsi x23, x22, x5, 3 # perform operation +800027d8: ea5b0bb3 aes32dsi x23,x22,x5,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027dc: 00012383 lw x7,0(x2) +800027e0: 01738863 beq x7,x23,800027f0 +800027e4: 2350546f jal x8,80008218 +800027e8: 800027d8 .word 0x800027d8 +800027ec: 80011a5c .word 0x80011a5c +800027f0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5bbc8872 +800027f4: 0001a503 lw x10,0(x3) +800027f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000000 +800027fc: 0001a883 lw x17,0(x3) +80002800: 00418193 addi x3,x3,4 + +80002804 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + aes32dsi x4, x10, x17, 1 # perform operation +80002804: 6b150233 aes32dsi x4,x10,x17,0x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +80002808: 00012383 lw x7,0(x2) +8000280c: 00438863 beq x7,x4,8000281c +80002810: 2090546f jal x8,80008218 +80002814: 80002804 .word 0x80002804 +80002818: 80011abf .word 0x80011abf +8000281c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x5bbc8872 +80002820: 0001ae03 lw x28,0(x3) +80002824: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000001 +80002828: 0001a803 lw x16,0(x3) +8000282c: 00418193 addi x3,x3,4 + +80002830 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + aes32dsi x31, x28, x16, 0 # perform operation +80002830: 2b0e0fb3 aes32dsi x31,x28,x16,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002834: 00012383 lw x7,0(x2) +80002838: 01f38863 beq x7,x31,80002848 +8000283c: 1dd0546f jal x8,80008218 +80002840: 80002830 .word 0x80002830 +80002844: 80011b1b .word 0x80011b1b +80002848: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5bbc8872 +8000284c: 0001ac83 lw x25,0(x3) +80002850: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x00000002 +80002854: 0001a903 lw x18,0(x3) +80002858: 00418193 addi x3,x3,4 + +8000285c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + aes32dsi x20, x25, x18, 0 # perform operation +8000285c: 2b2c8a33 aes32dsi x20,x25,x18,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002860: 00012383 lw x7,0(x2) +80002864: 01438863 beq x7,x20,80002874 +80002868: 1b10546f jal x8,80008218 +8000286c: 8000285c .word 0x8000285c +80002870: 80011b77 .word 0x80011b77 +80002874: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x5bbc8872 +80002878: 0001ad03 lw x26,0(x3) +8000287c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x80000000 +80002880: 0001aa03 lw x20,0(x3) +80002884: 00418193 addi x3,x3,4 + +80002888 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + aes32dsi x18, x26, x20, 1 # perform operation +80002888: 6b4d0933 aes32dsi x18,x26,x20,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000288c: 00012383 lw x7,0(x2) +80002890: 01238863 beq x7,x18,800028a0 +80002894: 1850546f jal x8,80008218 +80002898: 80002888 .word 0x80002888 +8000289c: 80011bd3 .word 0x80011bd3 +800028a0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5bbc8872 +800028a4: 0001ab03 lw x22,0(x3) +800028a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x80000001 +800028ac: 0001ae83 lw x29,0(x3) +800028b0: 00418193 addi x3,x3,4 + +800028b4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + aes32dsi x11, x22, x29, 0 # perform operation +800028b4: 2bdb05b3 aes32dsi x11,x22,x29,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028b8: 00012383 lw x7,0(x2) +800028bc: 00b38863 beq x7,x11,800028cc +800028c0: 1590546f jal x8,80008218 +800028c4: 800028b4 .word 0x800028b4 +800028c8: 80011c36 .word 0x80011c36 +800028cc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x5bbc8872 +800028d0: 0001ae03 lw x28,0(x3) +800028d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7fffffff +800028d8: 0001a883 lw x17,0(x3) +800028dc: 00418193 addi x3,x3,4 + +800028e0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + aes32dsi x12, x28, x17, 1 # perform operation +800028e0: 6b1e0633 aes32dsi x12,x28,x17,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028e4: 00012383 lw x7,0(x2) +800028e8: 00c38863 beq x7,x12,800028f8 +800028ec: 12d0546f jal x8,80008218 +800028f0: 800028e0 .word 0x800028e0 +800028f4: 80011c99 .word 0x80011c99 +800028f8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5bbc8872 +800028fc: 0001a603 lw x12,0(x3) +80002900: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x7ffffffe +80002904: 0001a803 lw x16,0(x3) +80002908: 00418193 addi x3,x3,4 + +8000290c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + aes32dsi x18, x12, x16, 1 # perform operation +8000290c: 6b060933 aes32dsi x18,x12,x16,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002910: 00012383 lw x7,0(x2) +80002914: 01238863 beq x7,x18,80002924 +80002918: 1010546f jal x8,80008218 +8000291c: 8000290c .word 0x8000290c +80002920: 80011cfc .word 0x80011cfc +80002924: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x5bbc8872 +80002928: 0001aa83 lw x21,0(x3) +8000292c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xffffffff +80002930: 0001ab03 lw x22,0(x3) +80002934: 00418193 addi x3,x3,4 + +80002938 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + aes32dsi x14, x21, x22, 0 # perform operation +80002938: 2b6a8733 aes32dsi x14,x21,x22,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000293c: 00012383 lw x7,0(x2) +80002940: 00e38863 beq x7,x14,80002950 +80002944: 0d50546f jal x8,80008218 +80002948: 80002938 .word 0x80002938 +8000294c: 80011d5f .word 0x80011d5f +80002950: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x5bbc8872 +80002954: 0001a483 lw x9,0(x3) +80002958: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xfffffffe +8000295c: 0001a803 lw x16,0(x3) +80002960: 00418193 addi x3,x3,4 + +80002964 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + aes32dsi x15, x9, x16, 1 # perform operation +80002964: 6b0487b3 aes32dsi x15,x9,x16,0x1 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002968: 00012383 lw x7,0(x2) +8000296c: 00f38863 beq x7,x15,8000297c +80002970: 0a90546f jal x8,80008218 +80002974: 80002964 .word 0x80002964 +80002978: 80011dc2 .word 0x80011dc2 +8000297c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x5bbc8872 +80002980: 0001a803 lw x16,0(x3) +80002984: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x5bbc8872 +80002988: 0001af83 lw x31,0(x3) +8000298c: 00418193 addi x3,x3,4 + +80002990 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + aes32dsi x24, x16, x31, 0 # perform operation +80002990: 2bf80c33 aes32dsi x24,x16,x31,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002994: 00012383 lw x7,0(x2) +80002998: 01838863 beq x7,x24,800029a8 +8000299c: 07d0546f jal x8,80008218 +800029a0: 80002990 .word 0x80002990 +800029a4: 80011e25 .word 0x80011e25 +800029a8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x5bbc8872 +800029ac: 0001ad03 lw x26,0(x3) +800029b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaa +800029b4: 0001a883 lw x17,0(x3) +800029b8: 00418193 addi x3,x3,4 + +800029bc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + aes32dsi x14, x26, x17, 1 # perform operation +800029bc: 6b1d0733 aes32dsi x14,x26,x17,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029c0: 00012383 lw x7,0(x2) +800029c4: 00e38863 beq x7,x14,800029d4 +800029c8: 0510546f jal x8,80008218 +800029cc: 800029bc .word 0x800029bc +800029d0: 80011e88 .word 0x80011e88 +800029d4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5bbc8872 +800029d8: 0001a503 lw x10,0(x3) +800029dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x55555555 +800029e0: 0001a803 lw x16,0(x3) +800029e4: 00418193 addi x3,x3,4 + +800029e8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + aes32dsi x21, x10, x16, 2 # perform operation +800029e8: ab050ab3 aes32dsi x21,x10,x16,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029ec: 00012383 lw x7,0(x2) +800029f0: 01538863 beq x7,x21,80002a00 +800029f4: 0250546f jal x8,80008218 +800029f8: 800029e8 .word 0x800029e8 +800029fc: 80011eeb .word 0x80011eeb +80002a00: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xaaaaaaaa +80002a04: 0001aa83 lw x21,0(x3) +80002a08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x00000000 +80002a0c: 0001a283 lw x5,0(x3) +80002a10: 00418193 addi x3,x3,4 + +80002a14 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + aes32dsi x30, x21, x5, 3 # perform operation +80002a14: ea5a8f33 aes32dsi x30,x21,x5,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a18: 00012383 lw x7,0(x2) +80002a1c: 01e38863 beq x7,x30,80002a2c +80002a20: 7f80546f jal x8,80008218 +80002a24: 80002a14 .word 0x80002a14 +80002a28: 80011f4e .word 0x80011f4e +80002a2c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaaaaaaaa +80002a30: 0001a483 lw x9,0(x3) +80002a34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000001 +80002a38: 0001af83 lw x31,0(x3) +80002a3c: 00418193 addi x3,x3,4 + +80002a40 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + aes32dsi x26, x9, x31, 1 # perform operation +80002a40: 6bf48d33 aes32dsi x26,x9,x31,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a44: 00012383 lw x7,0(x2) +80002a48: 01a38863 beq x7,x26,80002a58 +80002a4c: 7cc0546f jal x8,80008218 +80002a50: 80002a40 .word 0x80002a40 +80002a54: 80011faa .word 0x80011faa +80002a58: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0xaaaaaaaa +80002a5c: 0001a903 lw x18,0(x3) +80002a60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000002 +80002a64: 0001a983 lw x19,0(x3) +80002a68: 00418193 addi x3,x3,4 + +80002a6c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + aes32dsi x1, x18, x19, 3 # perform operation +80002a6c: eb3900b3 aes32dsi x1,x18,x19,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a70: 00012383 lw x7,0(x2) +80002a74: 00138863 beq x7,x1,80002a84 +80002a78: 7a00546f jal x8,80008218 +80002a7c: 80002a6c .word 0x80002a6c +80002a80: 80012006 .word 0x80012006 +80002a84: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xaaaaaaaa +80002a88: 0001a583 lw x11,0(x3) +80002a8c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x80000000 +80002a90: 0001a803 lw x16,0(x3) +80002a94: 00418193 addi x3,x3,4 + +80002a98 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + aes32dsi x20, x11, x16, 0 # perform operation +80002a98: 2b058a33 aes32dsi x20,x11,x16,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a9c: 00012383 lw x7,0(x2) +80002aa0: 01438863 beq x7,x20,80002ab0 +80002aa4: 7740546f jal x8,80008218 +80002aa8: 80002a98 .word 0x80002a98 +80002aac: 80012062 .word 0x80012062 +80002ab0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xaaaaaaaa +80002ab4: 0001ad03 lw x26,0(x3) +80002ab8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x80000001 +80002abc: 0001aa03 lw x20,0(x3) +80002ac0: 00418193 addi x3,x3,4 + +80002ac4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + aes32dsi x29, x26, x20, 3 # perform operation +80002ac4: eb4d0eb3 aes32dsi x29,x26,x20,0x3 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ac8: 00012383 lw x7,0(x2) +80002acc: 01d38863 beq x7,x29,80002adc +80002ad0: 7480546f jal x8,80008218 +80002ad4: 80002ac4 .word 0x80002ac4 +80002ad8: 800120c5 .word 0x800120c5 +80002adc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xaaaaaaaa +80002ae0: 0001a603 lw x12,0(x3) +80002ae4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x7fffffff +80002ae8: 0001ae83 lw x29,0(x3) +80002aec: 00418193 addi x3,x3,4 + +80002af0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + aes32dsi x19, x12, x29, 3 # perform operation +80002af0: ebd609b3 aes32dsi x19,x12,x29,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002af4: 00012383 lw x7,0(x2) +80002af8: 01338863 beq x7,x19,80002b08 +80002afc: 71c0546f jal x8,80008218 +80002b00: 80002af0 .word 0x80002af0 +80002b04: 80012128 .word 0x80012128 +80002b08: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xaaaaaaaa +80002b0c: 0001af03 lw x30,0(x3) +80002b10: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7ffffffe +80002b14: 0001a703 lw x14,0(x3) +80002b18: 00418193 addi x3,x3,4 + +80002b1c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + aes32dsi x27, x30, x14, 3 # perform operation +80002b1c: eaef0db3 aes32dsi x27,x30,x14,0x3 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b20: 00012383 lw x7,0(x2) +80002b24: 01b38863 beq x7,x27,80002b34 +80002b28: 6f00546f jal x8,80008218 +80002b2c: 80002b1c .word 0x80002b1c +80002b30: 8001218b .word 0x8001218b +80002b34: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xaaaaaaaa +80002b38: 0001ab83 lw x23,0(x3) +80002b3c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0xffffffff +80002b40: 0001a303 lw x6,0(x3) +80002b44: 00418193 addi x3,x3,4 + +80002b48 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + aes32dsi x24, x23, x6, 3 # perform operation +80002b48: ea6b8c33 aes32dsi x24,x23,x6,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b4c: 00012383 lw x7,0(x2) +80002b50: 01838863 beq x7,x24,80002b60 +80002b54: 6c40546f jal x8,80008218 +80002b58: 80002b48 .word 0x80002b48 +80002b5c: 800121ee .word 0x800121ee +80002b60: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xaaaaaaaa +80002b64: 0001ac83 lw x25,0(x3) +80002b68: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xfffffffe +80002b6c: 0001a083 lw x1,0(x3) +80002b70: 00418193 addi x3,x3,4 + +80002b74 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + aes32dsi x4, x25, x1, 1 # perform operation +80002b74: 6a1c8233 aes32dsi x4,x25,x1,0x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b78: 00012383 lw x7,0(x2) +80002b7c: 00438863 beq x7,x4,80002b8c +80002b80: 6980546f jal x8,80008218 +80002b84: 80002b74 .word 0x80002b74 +80002b88: 80012251 .word 0x80012251 +80002b8c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xaaaaaaaa +80002b90: 0001ad83 lw x27,0(x3) +80002b94: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x5bbc8872 +80002b98: 0001af83 lw x31,0(x3) +80002b9c: 00418193 addi x3,x3,4 + +80002ba0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + aes32dsi x12, x27, x31, 0 # perform operation +80002ba0: 2bfd8633 aes32dsi x12,x27,x31,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002ba4: 00012383 lw x7,0(x2) +80002ba8: 00c38863 beq x7,x12,80002bb8 +80002bac: 66c0546f jal x8,80008218 +80002bb0: 80002ba0 .word 0x80002ba0 +80002bb4: 800122b4 .word 0x800122b4 +80002bb8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xaaaaaaaa +80002bbc: 0001a583 lw x11,0(x3) +80002bc0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xaaaaaaaa +80002bc4: 0001aa03 lw x20,0(x3) +80002bc8: 00418193 addi x3,x3,4 + +80002bcc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + aes32dsi x14, x11, x20, 0 # perform operation +80002bcc: 2b458733 aes32dsi x14,x11,x20,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bd0: 00012383 lw x7,0(x2) +80002bd4: 00e38863 beq x7,x14,80002be4 +80002bd8: 6400546f jal x8,80008218 +80002bdc: 80002bcc .word 0x80002bcc +80002be0: 80012317 .word 0x80012317 +80002be4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xaaaaaaaa +80002be8: 0001af03 lw x30,0(x3) +80002bec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x55555555 +80002bf0: 0001a683 lw x13,0(x3) +80002bf4: 00418193 addi x3,x3,4 + +80002bf8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + aes32dsi x4, x30, x13, 0 # perform operation +80002bf8: 2adf0233 aes32dsi x4,x30,x13,0x0 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bfc: 00012383 lw x7,0(x2) +80002c00: 00438863 beq x7,x4,80002c10 +80002c04: 6140546f jal x8,80008218 +80002c08: 80002bf8 .word 0x80002bf8 +80002c0c: 8001237a .word 0x8001237a +80002c10: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x55555555 +80002c14: 0001a603 lw x12,0(x3) +80002c18: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x00000000 +80002c1c: 0001af03 lw x30,0(x3) +80002c20: 00418193 addi x3,x3,4 + +80002c24 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + aes32dsi x6, x12, x30, 3 # perform operation +80002c24: ebe60333 aes32dsi x6,x12,x30,0x3 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c28: 00012383 lw x7,0(x2) +80002c2c: 00638863 beq x7,x6,80002c3c +80002c30: 5e80546f jal x8,80008218 +80002c34: 80002c24 .word 0x80002c24 +80002c38: 800123dd .word 0x800123dd +80002c3c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x55555555 +80002c40: 0001a503 lw x10,0(x3) +80002c44: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000001 +80002c48: 0001a803 lw x16,0(x3) +80002c4c: 00418193 addi x3,x3,4 + +80002c50 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + aes32dsi x18, x10, x16, 0 # perform operation +80002c50: 2b050933 aes32dsi x18,x10,x16,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c54: 00012383 lw x7,0(x2) +80002c58: 01238863 beq x7,x18,80002c68 +80002c5c: 5bc0546f jal x8,80008218 +80002c60: 80002c50 .word 0x80002c50 +80002c64: 80012439 .word 0x80012439 +80002c68: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x55555555 +80002c6c: 0001ab03 lw x22,0(x3) +80002c70: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x00000002 +80002c74: 0001a583 lw x11,0(x3) +80002c78: 00418193 addi x3,x3,4 + +80002c7c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + aes32dsi x14, x22, x11, 0 # perform operation +80002c7c: 2abb0733 aes32dsi x14,x22,x11,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c80: 00012383 lw x7,0(x2) +80002c84: 00e38863 beq x7,x14,80002c94 +80002c88: 5900546f jal x8,80008218 +80002c8c: 80002c7c .word 0x80002c7c +80002c90: 80012495 .word 0x80012495 +80002c94: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x55555555 +80002c98: 0001a983 lw x19,0(x3) +80002c9c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000000 +80002ca0: 0001a783 lw x15,0(x3) +80002ca4: 00418193 addi x3,x3,4 + +80002ca8 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + aes32dsi x11, x19, x15, 3 # perform operation +80002ca8: eaf985b3 aes32dsi x11,x19,x15,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002cac: 00012383 lw x7,0(x2) +80002cb0: 00b38863 beq x7,x11,80002cc0 +80002cb4: 5640546f jal x8,80008218 +80002cb8: 80002ca8 .word 0x80002ca8 +80002cbc: 800124f1 .word 0x800124f1 +80002cc0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x55555555 +80002cc4: 0001af03 lw x30,0(x3) +80002cc8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000001 +80002ccc: 0001a783 lw x15,0(x3) +80002cd0: 00418193 addi x3,x3,4 + +80002cd4 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + aes32dsi x11, x30, x15, 3 # perform operation +80002cd4: eaff05b3 aes32dsi x11,x30,x15,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cd8: 00012383 lw x7,0(x2) +80002cdc: 00b38863 beq x7,x11,80002cec +80002ce0: 5380546f jal x8,80008218 +80002ce4: 80002cd4 .word 0x80002cd4 +80002ce8: 80012554 .word 0x80012554 +80002cec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x55555555 +80002cf0: 0001a483 lw x9,0(x3) +80002cf4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x7fffffff +80002cf8: 0001a283 lw x5,0(x3) +80002cfc: 00418193 addi x3,x3,4 + +80002d00 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + aes32dsi x6, x9, x5, 0 # perform operation +80002d00: 2a548333 aes32dsi x6,x9,x5,0x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002d04: 00012383 lw x7,0(x2) +80002d08: 00638863 beq x7,x6,80002d18 +80002d0c: 50c0546f jal x8,80008218 +80002d10: 80002d00 .word 0x80002d00 +80002d14: 800125b7 .word 0x800125b7 +80002d18: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x55555555 +80002d1c: 0001a203 lw x4,0(x3) +80002d20: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x7ffffffe +80002d24: 0001a283 lw x5,0(x3) +80002d28: 00418193 addi x3,x3,4 + +80002d2c : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + aes32dsi x9, x4, x5, 0 # perform operation +80002d2c: 2a5204b3 aes32dsi x9,x4,x5,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d30: 00012383 lw x7,0(x2) +80002d34: 00938863 beq x7,x9,80002d44 +80002d38: 4e00546f jal x8,80008218 +80002d3c: 80002d2c .word 0x80002d2c +80002d40: 8001261a .word 0x8001261a +80002d44: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x55555555 +80002d48: 0001a783 lw x15,0(x3) +80002d4c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffff +80002d50: 0001a603 lw x12,0(x3) +80002d54: 00418193 addi x3,x3,4 + +80002d58 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + aes32dsi x6, x15, x12, 1 # perform operation +80002d58: 6ac78333 aes32dsi x6,x15,x12,0x1 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d5c: 00012383 lw x7,0(x2) +80002d60: 00638863 beq x7,x6,80002d70 +80002d64: 4b40546f jal x8,80008218 +80002d68: 80002d58 .word 0x80002d58 +80002d6c: 8001267d .word 0x8001267d +80002d70: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x55555555 +80002d74: 0001a803 lw x16,0(x3) +80002d78: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xfffffffe +80002d7c: 0001a083 lw x1,0(x3) +80002d80: 00418193 addi x3,x3,4 + +80002d84 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + aes32dsi x21, x16, x1, 2 # perform operation +80002d84: aa180ab3 aes32dsi x21,x16,x1,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d88: 00012383 lw x7,0(x2) +80002d8c: 01538863 beq x7,x21,80002d9c +80002d90: 4880546f jal x8,80008218 +80002d94: 80002d84 .word 0x80002d84 +80002d98: 800126e0 .word 0x800126e0 +80002d9c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x55555555 +80002da0: 0001af03 lw x30,0(x3) +80002da4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x5bbc8872 +80002da8: 0001a703 lw x14,0(x3) +80002dac: 00418193 addi x3,x3,4 + +80002db0 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + aes32dsi x5, x30, x14, 2 # perform operation +80002db0: aaef02b3 aes32dsi x5,x30,x14,0x2 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002db4: 00012383 lw x7,0(x2) +80002db8: 00538863 beq x7,x5,80002dc8 +80002dbc: 45c0546f jal x8,80008218 +80002dc0: 80002db0 .word 0x80002db0 +80002dc4: 80012743 .word 0x80012743 +80002dc8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x55555555 +80002dcc: 0001a283 lw x5,0(x3) +80002dd0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xaaaaaaaa +80002dd4: 0001a703 lw x14,0(x3) +80002dd8: 00418193 addi x3,x3,4 + +80002ddc : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + aes32dsi x28, x5, x14, 3 # perform operation +80002ddc: eae28e33 aes32dsi x28,x5,x14,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002de0: 00012383 lw x7,0(x2) +80002de4: 01c38863 beq x7,x28,80002df4 +80002de8: 4300546f jal x8,80008218 +80002dec: 80002ddc .word 0x80002ddc +80002df0: 800127a6 .word 0x800127a6 +80002df4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x55555555 +80002df8: 0001a703 lw x14,0(x3) +80002dfc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x55555555 +80002e00: 0001ab03 lw x22,0(x3) +80002e04: 00418193 addi x3,x3,4 + +80002e08 : +Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + aes32dsi x24, x14, x22, 2 # perform operation +80002e08: ab670c33 aes32dsi x24,x14,x22,0x2 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknd_aes32dsi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002e0c: 00012383 lw x7,0(x2) +80002e10: 01838863 beq x7,x24,80002e20 +80002e14: 4040546f jal x8,80008218 +80002e18: 80002e08 .word 0x80002e08 +80002e1c: 80012809 .word 0x80012809 +80002e20: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x5cc9a36b +80002e24: 0001a003 lw x0,0(x3) +80002e28: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x2648306a +80002e2c: 0001a003 lw x0,0(x3) +80002e30: 00418193 addi x3,x3,4 + +80002e34 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b0: + aes32dsi x5, x0, x0, 1 # perform operation +80002e34: 6a0002b3 aes32dsi x5,x0,x0,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsi_cg_cmp_rs1_rs2_b0, Zknd_aes32dsi_cg_cmp_rs1_rs2_b0_str) +80002e38: 00012383 lw x7,0(x2) +80002e3c: 00538863 beq x7,x5,80002e4c +80002e40: 3d80546f jal x8,80008218 +80002e44: 80002e34 .word 0x80002e34 +80002e48: 8001286c .word 0x8001286c +80002e4c: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xf8a29850 +80002e50: 0001a083 lw x1,0(x3) +80002e54: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x006a3a5a +80002e58: 0001a083 lw x1,0(x3) +80002e5c: 00418193 addi x3,x3,4 + +80002e60 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b1: + aes32dsi x4, x1, x1, 0 # perform operation +80002e60: 2a108233 aes32dsi x4,x1,x1,0x0 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsi_cg_cmp_rs1_rs2_b1, Zknd_aes32dsi_cg_cmp_rs1_rs2_b1_str) +80002e64: 00012383 lw x7,0(x2) +80002e68: 00438863 beq x7,x4,80002e78 +80002e6c: 3ac0546f jal x8,80008218 +80002e70: 80002e60 .word 0x80002e60 +80002e74: 800128a8 .word 0x800128a8 +80002e78: 00410113 addi x2,x2,4 + + mv x26, x2 # switch signature pointer register to avoid conflict with test +80002e7c: 00010d13 addi x26,x2,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x346adfca +80002e80: 0001a103 lw x2,0(x3) +80002e84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xb9e013e9 +80002e88: 0001a103 lw x2,0(x3) +80002e8c: 00418193 addi x3,x3,4 + +80002e90 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b2: + aes32dsi x1, x2, x2, 2 # perform operation +80002e90: aa2100b3 aes32dsi x1,x2,x2,0x2 + # Check if x1 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x1, Zknd_aes32dsi_cg_cmp_rs1_rs2_b2, Zknd_aes32dsi_cg_cmp_rs1_rs2_b2_str) +80002e94: 000d2383 lw x7,0(x26) +80002e98: 00138863 beq x7,x1,80002ea8 +80002e9c: 37c0546f jal x8,80008218 +80002ea0: 80002e90 .word 0x80002e90 +80002ea4: 800128e4 .word 0x800128e4 +80002ea8: 004d0d13 addi x26,x26,4 + + mv x30, x3 # switch data pointer register to avoid conflict with test +80002eac: 00018f13 addi x30,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x248d1ee6 +80002eb0: 000f2183 lw x3,0(x30) +80002eb4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0xe173ffe9 +80002eb8: 000f2183 lw x3,0(x30) +80002ebc: 004f0f13 addi x30,x30,4 + +80002ec0 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b3: + aes32dsi x6, x3, x3, 3 # perform operation +80002ec0: ea318333 aes32dsi x6,x3,x3,0x3 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zknd_aes32dsi_cg_cmp_rs1_rs2_b3, Zknd_aes32dsi_cg_cmp_rs1_rs2_b3_str) +80002ec4: 000d2383 lw x7,0(x26) +80002ec8: 00638863 beq x7,x6,80002ed8 +80002ecc: 34c0546f jal x8,80008218 +80002ed0: 80002ec0 .word 0x80002ec0 +80002ed4: 80012920 .word 0x80012920 +80002ed8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0x5d60d445 +80002edc: 000f2203 lw x4,0(x30) +80002ee0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs2: x4 = 0xe7371548 +80002ee4: 000f2203 lw x4,0(x30) +80002ee8: 004f0f13 addi x30,x30,4 + +80002eec : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b4: + aes32dsi x6, x4, x4, 2 # perform operation +80002eec: aa420333 aes32dsi x6,x4,x4,0x2 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zknd_aes32dsi_cg_cmp_rs1_rs2_b4, Zknd_aes32dsi_cg_cmp_rs1_rs2_b4_str) +80002ef0: 000d2383 lw x7,0(x26) +80002ef4: 00638863 beq x7,x6,80002f04 +80002ef8: 3200546f jal x8,80008218 +80002efc: 80002eec .word 0x80002eec +80002f00: 8001295c .word 0x8001295c +80002f04: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x33154a02 +80002f08: 000f2283 lw x5,0(x30) +80002f0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs2: x5 = 0xe334eb25 +80002f10: 000f2283 lw x5,0(x30) +80002f14: 004f0f13 addi x30,x30,4 + +80002f18 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b5: + aes32dsi x19, x5, x5, 2 # perform operation +80002f18: aa5289b3 aes32dsi x19,x5,x5,0x2 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zknd_aes32dsi_cg_cmp_rs1_rs2_b5, Zknd_aes32dsi_cg_cmp_rs1_rs2_b5_str) +80002f1c: 000d2383 lw x7,0(x26) +80002f20: 01338863 beq x7,x19,80002f30 +80002f24: 2f40546f jal x8,80008218 +80002f28: 80002f18 .word 0x80002f18 +80002f2c: 80012998 .word 0x80012998 +80002f30: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x95fced58 +80002f34: 000f2303 lw x6,0(x30) +80002f38: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0xf0e2f342 +80002f3c: 000f2303 lw x6,0(x30) +80002f40: 004f0f13 addi x30,x30,4 + +80002f44 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b6: + aes32dsi x11, x6, x6, 0 # perform operation +80002f44: 2a6305b3 aes32dsi x11,x6,x6,0x0 + # Check if x11 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x11, Zknd_aes32dsi_cg_cmp_rs1_rs2_b6, Zknd_aes32dsi_cg_cmp_rs1_rs2_b6_str) +80002f48: 000d2383 lw x7,0(x26) +80002f4c: 00b38863 beq x7,x11,80002f5c +80002f50: 2c80546f jal x8,80008218 +80002f54: 80002f44 .word 0x80002f44 +80002f58: 800129d4 .word 0x800129d4 +80002f5c: 004d0d13 addi x26,x26,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f60: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f64: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0xa73a6787 +80002f68: 000f2383 lw x7,0(x30) +80002f6c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs2: x7 = 0x2d5353ef +80002f70: 000f2383 lw x7,0(x30) +80002f74: 004f0f13 addi x30,x30,4 + +80002f78 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b7: + aes32dsi x3, x7, x7, 3 # perform operation +80002f78: ea7381b3 aes32dsi x3,x7,x7,0x3 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zknd_aes32dsi_cg_cmp_rs1_rs2_b7, Zknd_aes32dsi_cg_cmp_rs1_rs2_b7_str) +80002f7c: 000d2203 lw x4,0(x26) +80002f80: 00320863 beq x4,x3,80002f90 +80002f84: 27c052ef jal x5,80008200 +80002f88: 80002f78 .word 0x80002f78 +80002f8c: 80012a10 .word 0x80012a10 +80002f90: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0xc4a9312e +80002f94: 000f2403 lw x8,0(x30) +80002f98: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0xa190af44 +80002f9c: 000f2403 lw x8,0(x30) +80002fa0: 004f0f13 addi x30,x30,4 + +80002fa4 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b8: + aes32dsi x15, x8, x8, 3 # perform operation +80002fa4: ea8407b3 aes32dsi x15,x8,x8,0x3 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknd_aes32dsi_cg_cmp_rs1_rs2_b8, Zknd_aes32dsi_cg_cmp_rs1_rs2_b8_str) +80002fa8: 000d2203 lw x4,0(x26) +80002fac: 00f20863 beq x4,x15,80002fbc +80002fb0: 250052ef jal x5,80008200 +80002fb4: 80002fa4 .word 0x80002fa4 +80002fb8: 80012a4c .word 0x80012a4c +80002fbc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0xf73c1b20 +80002fc0: 000f2483 lw x9,0(x30) +80002fc4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0xd34110bd +80002fc8: 000f2483 lw x9,0(x30) +80002fcc: 004f0f13 addi x30,x30,4 + +80002fd0 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b9: + aes32dsi x17, x9, x9, 2 # perform operation +80002fd0: aa9488b3 aes32dsi x17,x9,x9,0x2 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknd_aes32dsi_cg_cmp_rs1_rs2_b9, Zknd_aes32dsi_cg_cmp_rs1_rs2_b9_str) +80002fd4: 000d2203 lw x4,0(x26) +80002fd8: 01120863 beq x4,x17,80002fe8 +80002fdc: 224052ef jal x5,80008200 +80002fe0: 80002fd0 .word 0x80002fd0 +80002fe4: 80012a88 .word 0x80012a88 +80002fe8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0xab2e4982 +80002fec: 000f2503 lw x10,0(x30) +80002ff0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0x4b84ac9d +80002ff4: 000f2503 lw x10,0(x30) +80002ff8: 004f0f13 addi x30,x30,4 + +80002ffc : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b10: + aes32dsi x0, x10, x10, 1 # perform operation +80002ffc: 6aa50033 aes32dsi x0,x10,x10,0x1 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknd_aes32dsi_cg_cmp_rs1_rs2_b10, Zknd_aes32dsi_cg_cmp_rs1_rs2_b10_str) +80003000: 000d2203 lw x4,0(x26) +80003004: 00020863 beq x4,x0,80003014 +80003008: 1f8052ef jal x5,80008200 +8000300c: 80002ffc .word 0x80002ffc +80003010: 80012ac4 .word 0x80012ac4 +80003014: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x122362bf +80003018: 000f2583 lw x11,0(x30) +8000301c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x8a9cb611 +80003020: 000f2583 lw x11,0(x30) +80003024: 004f0f13 addi x30,x30,4 + +80003028 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b11: + aes32dsi x19, x11, x11, 3 # perform operation +80003028: eab589b3 aes32dsi x19,x11,x11,0x3 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zknd_aes32dsi_cg_cmp_rs1_rs2_b11, Zknd_aes32dsi_cg_cmp_rs1_rs2_b11_str) +8000302c: 000d2203 lw x4,0(x26) +80003030: 01320863 beq x4,x19,80003040 +80003034: 1cc052ef jal x5,80008200 +80003038: 80003028 .word 0x80003028 +8000303c: 80012b01 .word 0x80012b01 +80003040: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x932692d5 +80003044: 000f2603 lw x12,0(x30) +80003048: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0x0f496e78 +8000304c: 000f2603 lw x12,0(x30) +80003050: 004f0f13 addi x30,x30,4 + +80003054 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b12: + aes32dsi x1, x12, x12, 3 # perform operation +80003054: eac600b3 aes32dsi x1,x12,x12,0x3 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zknd_aes32dsi_cg_cmp_rs1_rs2_b12, Zknd_aes32dsi_cg_cmp_rs1_rs2_b12_str) +80003058: 000d2203 lw x4,0(x26) +8000305c: 00120863 beq x4,x1,8000306c +80003060: 1a0052ef jal x5,80008200 +80003064: 80003054 .word 0x80003054 +80003068: 80012b3e .word 0x80012b3e +8000306c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xb3e38691 +80003070: 000f2683 lw x13,0(x30) +80003074: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0x708be474 +80003078: 000f2683 lw x13,0(x30) +8000307c: 004f0f13 addi x30,x30,4 + +80003080 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b13: + aes32dsi x20, x13, x13, 2 # perform operation +80003080: aad68a33 aes32dsi x20,x13,x13,0x2 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zknd_aes32dsi_cg_cmp_rs1_rs2_b13, Zknd_aes32dsi_cg_cmp_rs1_rs2_b13_str) +80003084: 000d2203 lw x4,0(x26) +80003088: 01420863 beq x4,x20,80003098 +8000308c: 174052ef jal x5,80008200 +80003090: 80003080 .word 0x80003080 +80003094: 80012b7b .word 0x80012b7b +80003098: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x64cf053c +8000309c: 000f2703 lw x14,0(x30) +800030a0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x5f90d445 +800030a4: 000f2703 lw x14,0(x30) +800030a8: 004f0f13 addi x30,x30,4 + +800030ac : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b14: + aes32dsi x17, x14, x14, 2 # perform operation +800030ac: aae708b3 aes32dsi x17,x14,x14,0x2 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknd_aes32dsi_cg_cmp_rs1_rs2_b14, Zknd_aes32dsi_cg_cmp_rs1_rs2_b14_str) +800030b0: 000d2203 lw x4,0(x26) +800030b4: 01120863 beq x4,x17,800030c4 +800030b8: 148052ef jal x5,80008200 +800030bc: 800030ac .word 0x800030ac +800030c0: 80012bb8 .word 0x80012bb8 +800030c4: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x6440a406 +800030c8: 000f2783 lw x15,0(x30) +800030cc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x2043b2e0 +800030d0: 000f2783 lw x15,0(x30) +800030d4: 004f0f13 addi x30,x30,4 + +800030d8 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b15: + aes32dsi x23, x15, x15, 2 # perform operation +800030d8: aaf78bb3 aes32dsi x23,x15,x15,0x2 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zknd_aes32dsi_cg_cmp_rs1_rs2_b15, Zknd_aes32dsi_cg_cmp_rs1_rs2_b15_str) +800030dc: 000d2203 lw x4,0(x26) +800030e0: 01720863 beq x4,x23,800030f0 +800030e4: 11c052ef jal x5,80008200 +800030e8: 800030d8 .word 0x800030d8 +800030ec: 80012bf5 .word 0x80012bf5 +800030f0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x2f66603d +800030f4: 000f2803 lw x16,0(x30) +800030f8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0xfbdcad00 +800030fc: 000f2803 lw x16,0(x30) +80003100: 004f0f13 addi x30,x30,4 + +80003104 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b16: + aes32dsi x27, x16, x16, 2 # perform operation +80003104: ab080db3 aes32dsi x27,x16,x16,0x2 + # Check if x27 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x27, Zknd_aes32dsi_cg_cmp_rs1_rs2_b16, Zknd_aes32dsi_cg_cmp_rs1_rs2_b16_str) +80003108: 000d2203 lw x4,0(x26) +8000310c: 01b20863 beq x4,x27,8000311c +80003110: 0f0052ef jal x5,80008200 +80003114: 80003104 .word 0x80003104 +80003118: 80012c32 .word 0x80012c32 +8000311c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xb7381e8c +80003120: 000f2883 lw x17,0(x30) +80003124: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x66ee04b1 +80003128: 000f2883 lw x17,0(x30) +8000312c: 004f0f13 addi x30,x30,4 + +80003130 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b17: + aes32dsi x8, x17, x17, 1 # perform operation +80003130: 6b188433 aes32dsi x8,x17,x17,0x1 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zknd_aes32dsi_cg_cmp_rs1_rs2_b17, Zknd_aes32dsi_cg_cmp_rs1_rs2_b17_str) +80003134: 000d2203 lw x4,0(x26) +80003138: 00820863 beq x4,x8,80003148 +8000313c: 0c4052ef jal x5,80008200 +80003140: 80003130 .word 0x80003130 +80003144: 80012c6f .word 0x80012c6f +80003148: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x950c24ea +8000314c: 000f2903 lw x18,0(x30) +80003150: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x0d347fb1 +80003154: 000f2903 lw x18,0(x30) +80003158: 004f0f13 addi x30,x30,4 + +8000315c : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b18: + aes32dsi x25, x18, x18, 0 # perform operation +8000315c: 2b290cb3 aes32dsi x25,x18,x18,0x0 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknd_aes32dsi_cg_cmp_rs1_rs2_b18, Zknd_aes32dsi_cg_cmp_rs1_rs2_b18_str) +80003160: 000d2203 lw x4,0(x26) +80003164: 01920863 beq x4,x25,80003174 +80003168: 098052ef jal x5,80008200 +8000316c: 8000315c .word 0x8000315c +80003170: 80012cac .word 0x80012cac +80003174: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xc516a3d9 +80003178: 000f2983 lw x19,0(x30) +8000317c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x357d6ddd +80003180: 000f2983 lw x19,0(x30) +80003184: 004f0f13 addi x30,x30,4 + +80003188 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b19: + aes32dsi x11, x19, x19, 2 # perform operation +80003188: ab3985b3 aes32dsi x11,x19,x19,0x2 + # Check if x11 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x11, Zknd_aes32dsi_cg_cmp_rs1_rs2_b19, Zknd_aes32dsi_cg_cmp_rs1_rs2_b19_str) +8000318c: 000d2203 lw x4,0(x26) +80003190: 00b20863 beq x4,x11,800031a0 +80003194: 06c052ef jal x5,80008200 +80003198: 80003188 .word 0x80003188 +8000319c: 80012ce9 .word 0x80012ce9 +800031a0: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x019449e6 +800031a4: 000f2a03 lw x20,0(x30) +800031a8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x7cb32d9b +800031ac: 000f2a03 lw x20,0(x30) +800031b0: 004f0f13 addi x30,x30,4 + +800031b4 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b20: + aes32dsi x31, x20, x20, 2 # perform operation +800031b4: ab4a0fb3 aes32dsi x31,x20,x20,0x2 + # Check if x31 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x31, Zknd_aes32dsi_cg_cmp_rs1_rs2_b20, Zknd_aes32dsi_cg_cmp_rs1_rs2_b20_str) +800031b8: 000d2203 lw x4,0(x26) +800031bc: 01f20863 beq x4,x31,800031cc +800031c0: 040052ef jal x5,80008200 +800031c4: 800031b4 .word 0x800031b4 +800031c8: 80012d26 .word 0x80012d26 +800031cc: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xb8fd55df +800031d0: 000f2a83 lw x21,0(x30) +800031d4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x4c0c7638 +800031d8: 000f2a83 lw x21,0(x30) +800031dc: 004f0f13 addi x30,x30,4 + +800031e0 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b21: + aes32dsi x18, x21, x21, 1 # perform operation +800031e0: 6b5a8933 aes32dsi x18,x21,x21,0x1 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zknd_aes32dsi_cg_cmp_rs1_rs2_b21, Zknd_aes32dsi_cg_cmp_rs1_rs2_b21_str) +800031e4: 000d2203 lw x4,0(x26) +800031e8: 01220863 beq x4,x18,800031f8 +800031ec: 014052ef jal x5,80008200 +800031f0: 800031e0 .word 0x800031e0 +800031f4: 80012d63 .word 0x80012d63 +800031f8: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xe546c518 +800031fc: 000f2b03 lw x22,0(x30) +80003200: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x84f4446b +80003204: 000f2b03 lw x22,0(x30) +80003208: 004f0f13 addi x30,x30,4 + +8000320c : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b22: + aes32dsi x9, x22, x22, 0 # perform operation +8000320c: 2b6b04b3 aes32dsi x9,x22,x22,0x0 + # Check if x9 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x9, Zknd_aes32dsi_cg_cmp_rs1_rs2_b22, Zknd_aes32dsi_cg_cmp_rs1_rs2_b22_str) +80003210: 000d2203 lw x4,0(x26) +80003214: 00920863 beq x4,x9,80003224 +80003218: 7e9042ef jal x5,80008200 +8000321c: 8000320c .word 0x8000320c +80003220: 80012da0 .word 0x80012da0 +80003224: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x809588ea +80003228: 000f2b83 lw x23,0(x30) +8000322c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x0b0e2776 +80003230: 000f2b83 lw x23,0(x30) +80003234: 004f0f13 addi x30,x30,4 + +80003238 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b23: + aes32dsi x31, x23, x23, 1 # perform operation +80003238: 6b7b8fb3 aes32dsi x31,x23,x23,0x1 + # Check if x31 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x31, Zknd_aes32dsi_cg_cmp_rs1_rs2_b23, Zknd_aes32dsi_cg_cmp_rs1_rs2_b23_str) +8000323c: 000d2203 lw x4,0(x26) +80003240: 01f20863 beq x4,x31,80003250 +80003244: 7bd042ef jal x5,80008200 +80003248: 80003238 .word 0x80003238 +8000324c: 80012ddd .word 0x80012ddd +80003250: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0xbe79fa64 +80003254: 000f2c03 lw x24,0(x30) +80003258: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x489c13c0 +8000325c: 000f2c03 lw x24,0(x30) +80003260: 004f0f13 addi x30,x30,4 + +80003264 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b24: + aes32dsi x0, x24, x24, 3 # perform operation +80003264: eb8c0033 aes32dsi x0,x24,x24,0x3 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknd_aes32dsi_cg_cmp_rs1_rs2_b24, Zknd_aes32dsi_cg_cmp_rs1_rs2_b24_str) +80003268: 000d2203 lw x4,0(x26) +8000326c: 00020863 beq x4,x0,8000327c +80003270: 791042ef jal x5,80008200 +80003274: 80003264 .word 0x80003264 +80003278: 80012e1a .word 0x80012e1a +8000327c: 004d0d13 addi x26,x26,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x3503e29b +80003280: 000f2c83 lw x25,0(x30) +80003284: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x17a2b01c +80003288: 000f2c83 lw x25,0(x30) +8000328c: 004f0f13 addi x30,x30,4 + +80003290 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b25: + aes32dsi x3, x25, x25, 1 # perform operation +80003290: 6b9c81b3 aes32dsi x3,x25,x25,0x1 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zknd_aes32dsi_cg_cmp_rs1_rs2_b25, Zknd_aes32dsi_cg_cmp_rs1_rs2_b25_str) +80003294: 000d2203 lw x4,0(x26) +80003298: 00320863 beq x4,x3,800032a8 +8000329c: 765042ef jal x5,80008200 +800032a0: 80003290 .word 0x80003290 +800032a4: 80012e57 .word 0x80012e57 +800032a8: 004d0d13 addi x26,x26,4 + + mv x31, x26 # switch signature pointer register to avoid conflict with test +800032ac: 000d0f93 addi x31,x26,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x5a5fb15f +800032b0: 000f2d03 lw x26,0(x30) +800032b4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xd0c12cd7 +800032b8: 000f2d03 lw x26,0(x30) +800032bc: 004f0f13 addi x30,x30,4 + +800032c0 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b26: + aes32dsi x23, x26, x26, 2 # perform operation +800032c0: abad0bb3 aes32dsi x23,x26,x26,0x2 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zknd_aes32dsi_cg_cmp_rs1_rs2_b26, Zknd_aes32dsi_cg_cmp_rs1_rs2_b26_str) +800032c4: 000fa203 lw x4,0(x31) +800032c8: 01720863 beq x4,x23,800032d8 +800032cc: 735042ef jal x5,80008200 +800032d0: 800032c0 .word 0x800032c0 +800032d4: 80012e94 .word 0x80012e94 +800032d8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0xa7b6a91c +800032dc: 000f2d83 lw x27,0(x30) +800032e0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x495c8f12 +800032e4: 000f2d83 lw x27,0(x30) +800032e8: 004f0f13 addi x30,x30,4 + +800032ec : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b27: + aes32dsi x8, x27, x27, 1 # perform operation +800032ec: 6bbd8433 aes32dsi x8,x27,x27,0x1 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zknd_aes32dsi_cg_cmp_rs1_rs2_b27, Zknd_aes32dsi_cg_cmp_rs1_rs2_b27_str) +800032f0: 000fa203 lw x4,0(x31) +800032f4: 00820863 beq x4,x8,80003304 +800032f8: 709042ef jal x5,80008200 +800032fc: 800032ec .word 0x800032ec +80003300: 80012ed1 .word 0x80012ed1 +80003304: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x178c3150 +80003308: 000f2e03 lw x28,0(x30) +8000330c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x98cd8aec +80003310: 000f2e03 lw x28,0(x30) +80003314: 004f0f13 addi x30,x30,4 + +80003318 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b28: + aes32dsi x7, x28, x28, 1 # perform operation +80003318: 6bce03b3 aes32dsi x7,x28,x28,0x1 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zknd_aes32dsi_cg_cmp_rs1_rs2_b28, Zknd_aes32dsi_cg_cmp_rs1_rs2_b28_str) +8000331c: 000fa203 lw x4,0(x31) +80003320: 00720863 beq x4,x7,80003330 +80003324: 6dd042ef jal x5,80008200 +80003328: 80003318 .word 0x80003318 +8000332c: 80012f0e .word 0x80012f0e +80003330: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x36be9af8 +80003334: 000f2e83 lw x29,0(x30) +80003338: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x1c7ebc73 +8000333c: 000f2e83 lw x29,0(x30) +80003340: 004f0f13 addi x30,x30,4 + +80003344 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b29: + aes32dsi x14, x29, x29, 0 # perform operation +80003344: 2bde8733 aes32dsi x14,x29,x29,0x0 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknd_aes32dsi_cg_cmp_rs1_rs2_b29, Zknd_aes32dsi_cg_cmp_rs1_rs2_b29_str) +80003348: 000fa203 lw x4,0(x31) +8000334c: 00e20863 beq x4,x14,8000335c +80003350: 6b1042ef jal x5,80008200 +80003354: 80003344 .word 0x80003344 +80003358: 80012f4b .word 0x80012f4b +8000335c: 004f8f93 addi x31,x31,4 + + mv x29, x30 # switch data pointer register to avoid conflict with test +80003360: 000f0e93 addi x29,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs1: x30 = 0xc91adb95 +80003364: 000eaf03 lw x30,0(x29) +80003368: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x8833b3d9 +8000336c: 000eaf03 lw x30,0(x29) +80003370: 004e8e93 addi x29,x29,4 + +80003374 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b30: + aes32dsi x25, x30, x30, 0 # perform operation +80003374: 2bef0cb3 aes32dsi x25,x30,x30,0x0 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknd_aes32dsi_cg_cmp_rs1_rs2_b30, Zknd_aes32dsi_cg_cmp_rs1_rs2_b30_str) +80003378: 000fa203 lw x4,0(x31) +8000337c: 01920863 beq x4,x25,8000338c +80003380: 681042ef jal x5,80008200 +80003384: 80003374 .word 0x80003374 +80003388: 80012f88 .word 0x80012f88 +8000338c: 004f8f93 addi x31,x31,4 + + mv x10, x31 # switch signature pointer register to avoid conflict with test +80003390: 000f8513 addi x10,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs1: x31 = 0x4d9a2184 +80003394: 000eaf83 lw x31,0(x29) +80003398: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x091d1057 +8000339c: 000eaf83 lw x31,0(x29) +800033a0: 004e8e93 addi x29,x29,4 + +800033a4 : +Zknd_aes32dsi_cg_cmp_rs1_rs2_b31: + aes32dsi x9, x31, x31, 2 # perform operation +800033a4: abff84b3 aes32dsi x9,x31,x31,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknd_aes32dsi_cg_cmp_rs1_rs2_b31, Zknd_aes32dsi_cg_cmp_rs1_rs2_b31_str) +800033a8: 00052203 lw x4,0(x10) +800033ac: 00920863 beq x4,x9,800033bc +800033b0: 651042ef jal x5,80008200 +800033b4: 800033a4 .word 0x800033a4 +800033b8: 80012fc5 .word 0x80012fc5 +800033bc: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs1: x0 = 0x6b96a3eb +800033c0: 000ea003 lw x0,0(x29) +800033c4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x7e5463c7 +800033c8: 000eaf03 lw x30,0(x29) +800033cc: 004e8e93 addi x29,x29,4 + +800033d0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b0: + aes32dsi x0, x0, x30, 1 # perform operation +800033d0: 6be00033 aes32dsi x0,x0,x30,0x1 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zknd_aes32dsi_cg_cmp_rd_rs1_b0, Zknd_aes32dsi_cg_cmp_rd_rs1_b0_str) +800033d4: 00052203 lw x4,0(x10) +800033d8: 00020863 beq x4,x0,800033e8 +800033dc: 625042ef jal x5,80008200 +800033e0: 800033d0 .word 0x800033d0 +800033e4: 80013002 .word 0x80013002 +800033e8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs1: x1 = 0x37e6a052 +800033ec: 000ea083 lw x1,0(x29) +800033f0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs2: x9 = 0x41330f1b +800033f4: 000ea483 lw x9,0(x29) +800033f8: 004e8e93 addi x29,x29,4 + +800033fc : +Zknd_aes32dsi_cg_cmp_rd_rs1_b1: + aes32dsi x1, x1, x9, 2 # perform operation +800033fc: aa9080b3 aes32dsi x1,x1,x9,0x2 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknd_aes32dsi_cg_cmp_rd_rs1_b1, Zknd_aes32dsi_cg_cmp_rd_rs1_b1_str) +80003400: 00052203 lw x4,0(x10) +80003404: 00120863 beq x4,x1,80003414 +80003408: 5f9042ef jal x5,80008200 +8000340c: 800033fc .word 0x800033fc +80003410: 8001303d .word 0x8001303d +80003414: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs1: x2 = 0xe86e00e7 +80003418: 000ea103 lw x2,0(x29) +8000341c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x2a28f0c9 +80003420: 000ead83 lw x27,0(x29) +80003424: 004e8e93 addi x29,x29,4 + +80003428 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b2: + aes32dsi x2, x2, x27, 3 # perform operation +80003428: ebb10133 aes32dsi x2,x2,x27,0x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknd_aes32dsi_cg_cmp_rd_rs1_b2, Zknd_aes32dsi_cg_cmp_rd_rs1_b2_str) +8000342c: 00052203 lw x4,0(x10) +80003430: 00220863 beq x4,x2,80003440 +80003434: 5cd042ef jal x5,80008200 +80003438: 80003428 .word 0x80003428 +8000343c: 80013078 .word 0x80013078 +80003440: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0xc2996129 +80003444: 000ea183 lw x3,0(x29) +80003448: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xe4349a2c +8000344c: 000ea583 lw x11,0(x29) +80003450: 004e8e93 addi x29,x29,4 + +80003454 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b3: + aes32dsi x3, x3, x11, 2 # perform operation +80003454: aab181b3 aes32dsi x3,x3,x11,0x2 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknd_aes32dsi_cg_cmp_rd_rs1_b3, Zknd_aes32dsi_cg_cmp_rd_rs1_b3_str) +80003458: 00052203 lw x4,0(x10) +8000345c: 00320863 beq x4,x3,8000346c +80003460: 5a1042ef jal x5,80008200 +80003464: 80003454 .word 0x80003454 +80003468: 800130b3 .word 0x800130b3 +8000346c: 00450513 addi x10,x10,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003470: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003474: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x72c0ba3e +80003478: 000ea203 lw x4,0(x29) +8000347c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0xc1967d8a +80003480: 000ea603 lw x12,0(x29) +80003484: 004e8e93 addi x29,x29,4 + +80003488 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b4: + aes32dsi x4, x4, x12, 2 # perform operation +80003488: aac20233 aes32dsi x4,x4,x12,0x2 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zknd_aes32dsi_cg_cmp_rd_rs1_b4, Zknd_aes32dsi_cg_cmp_rd_rs1_b4_str) +8000348c: 00052683 lw x13,0(x10) +80003490: 00468863 beq x13,x4,800034a0 +80003494: 5ad0476f jal x14,80008240 +80003498: 80003488 .word 0x80003488 +8000349c: 800130ee .word 0x800130ee +800034a0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0xf3d86821 +800034a4: 000ea283 lw x5,0(x29) +800034a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x7bcef731 +800034ac: 000eaf83 lw x31,0(x29) +800034b0: 004e8e93 addi x29,x29,4 + +800034b4 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b5: + aes32dsi x5, x5, x31, 2 # perform operation +800034b4: abf282b3 aes32dsi x5,x5,x31,0x2 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zknd_aes32dsi_cg_cmp_rd_rs1_b5, Zknd_aes32dsi_cg_cmp_rd_rs1_b5_str) +800034b8: 00052683 lw x13,0(x10) +800034bc: 00568863 beq x13,x5,800034cc +800034c0: 5810476f jal x14,80008240 +800034c4: 800034b4 .word 0x800034b4 +800034c8: 80013129 .word 0x80013129 +800034cc: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x8b4c092f +800034d0: 000ea303 lw x6,0(x29) +800034d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0xe6735df6 +800034d8: 000ea803 lw x16,0(x29) +800034dc: 004e8e93 addi x29,x29,4 + +800034e0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b6: + aes32dsi x6, x6, x16, 1 # perform operation +800034e0: 6b030333 aes32dsi x6,x6,x16,0x1 + # Check if x6 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x6, Zknd_aes32dsi_cg_cmp_rd_rs1_b6, Zknd_aes32dsi_cg_cmp_rd_rs1_b6_str) +800034e4: 00052683 lw x13,0(x10) +800034e8: 00668863 beq x13,x6,800034f8 +800034ec: 5550476f jal x14,80008240 +800034f0: 800034e0 .word 0x800034e0 +800034f4: 80013164 .word 0x80013164 +800034f8: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0x4c21b4c2 +800034fc: 000ea383 lw x7,0(x29) +80003500: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0xff1629c1 +80003504: 000ea183 lw x3,0(x29) +80003508: 004e8e93 addi x29,x29,4 + +8000350c : +Zknd_aes32dsi_cg_cmp_rd_rs1_b7: + aes32dsi x7, x7, x3, 0 # perform operation +8000350c: 2a3383b3 aes32dsi x7,x7,x3,0x0 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zknd_aes32dsi_cg_cmp_rd_rs1_b7, Zknd_aes32dsi_cg_cmp_rd_rs1_b7_str) +80003510: 00052683 lw x13,0(x10) +80003514: 00768863 beq x13,x7,80003524 +80003518: 5290476f jal x14,80008240 +8000351c: 8000350c .word 0x8000350c +80003520: 8001319f .word 0x8001319f +80003524: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x9ec60137 +80003528: 000ea403 lw x8,0(x29) +8000352c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs2: x4 = 0xeedadbad +80003530: 000ea203 lw x4,0(x29) +80003534: 004e8e93 addi x29,x29,4 + +80003538 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b8: + aes32dsi x8, x8, x4, 1 # perform operation +80003538: 6a440433 aes32dsi x8,x8,x4,0x1 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zknd_aes32dsi_cg_cmp_rd_rs1_b8, Zknd_aes32dsi_cg_cmp_rd_rs1_b8_str) +8000353c: 00052683 lw x13,0(x10) +80003540: 00868863 beq x13,x8,80003550 +80003544: 4fd0476f jal x14,80008240 +80003548: 80003538 .word 0x80003538 +8000354c: 800131da .word 0x800131da +80003550: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x2252596a +80003554: 000ea483 lw x9,0(x29) +80003558: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0xefca6311 +8000355c: 000ea803 lw x16,0(x29) +80003560: 004e8e93 addi x29,x29,4 + +80003564 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b9: + aes32dsi x9, x9, x16, 3 # perform operation +80003564: eb0484b3 aes32dsi x9,x9,x16,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zknd_aes32dsi_cg_cmp_rd_rs1_b9, Zknd_aes32dsi_cg_cmp_rd_rs1_b9_str) +80003568: 00052683 lw x13,0(x10) +8000356c: 00968863 beq x13,x9,8000357c +80003570: 4d10476f jal x14,80008240 +80003574: 80003564 .word 0x80003564 +80003578: 80013215 .word 0x80013215 +8000357c: 00450513 addi x10,x10,4 + + mv x23, x10 # switch signature pointer register to avoid conflict with test +80003580: 00050b93 addi x23,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0x72bdf261 +80003584: 000ea503 lw x10,0(x29) +80003588: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x520afb82 +8000358c: 000eac03 lw x24,0(x29) +80003590: 004e8e93 addi x29,x29,4 + +80003594 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b10: + aes32dsi x10, x10, x24, 2 # perform operation +80003594: ab850533 aes32dsi x10,x10,x24,0x2 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknd_aes32dsi_cg_cmp_rd_rs1_b10, Zknd_aes32dsi_cg_cmp_rd_rs1_b10_str) +80003598: 000ba683 lw x13,0(x23) +8000359c: 00a68863 beq x13,x10,800035ac +800035a0: 4a10476f jal x14,80008240 +800035a4: 80003594 .word 0x80003594 +800035a8: 80013250 .word 0x80013250 +800035ac: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0x64212e99 +800035b0: 000ea583 lw x11,0(x29) +800035b4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0xc3fd6982 +800035b8: 000ead83 lw x27,0(x29) +800035bc: 004e8e93 addi x29,x29,4 + +800035c0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b11: + aes32dsi x11, x11, x27, 1 # perform operation +800035c0: 6bb585b3 aes32dsi x11,x11,x27,0x1 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknd_aes32dsi_cg_cmp_rd_rs1_b11, Zknd_aes32dsi_cg_cmp_rd_rs1_b11_str) +800035c4: 000ba683 lw x13,0(x23) +800035c8: 00b68863 beq x13,x11,800035d8 +800035cc: 4750476f jal x14,80008240 +800035d0: 800035c0 .word 0x800035c0 +800035d4: 8001328c .word 0x8001328c +800035d8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xc6ae2ecc +800035dc: 000ea603 lw x12,0(x29) +800035e0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs2: x4 = 0x1938d1fc +800035e4: 000ea203 lw x4,0(x29) +800035e8: 004e8e93 addi x29,x29,4 + +800035ec : +Zknd_aes32dsi_cg_cmp_rd_rs1_b12: + aes32dsi x12, x12, x4, 0 # perform operation +800035ec: 2a460633 aes32dsi x12,x12,x4,0x0 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zknd_aes32dsi_cg_cmp_rd_rs1_b12, Zknd_aes32dsi_cg_cmp_rd_rs1_b12_str) +800035f0: 000ba683 lw x13,0(x23) +800035f4: 00c68863 beq x13,x12,80003604 +800035f8: 4490476f jal x14,80008240 +800035fc: 800035ec .word 0x800035ec +80003600: 800132c8 .word 0x800132c8 +80003604: 004b8b93 addi x23,x23,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003608: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000360c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0xee2c3286 +80003610: 000ea683 lw x13,0(x29) +80003614: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xc496b98f +80003618: 000eaf03 lw x30,0(x29) +8000361c: 004e8e93 addi x29,x29,4 + +80003620 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b13: + aes32dsi x13, x13, x30, 0 # perform operation +80003620: 2be686b3 aes32dsi x13,x13,x30,0x0 + # Check if x13 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x13, Zknd_aes32dsi_cg_cmp_rd_rs1_b13, Zknd_aes32dsi_cg_cmp_rd_rs1_b13_str) +80003624: 000ba383 lw x7,0(x23) +80003628: 00d38863 beq x7,x13,80003638 +8000362c: 3ed0446f jal x8,80008218 +80003630: 80003620 .word 0x80003620 +80003634: 80013304 .word 0x80013304 +80003638: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x6d10b489 +8000363c: 000ea703 lw x14,0(x29) +80003640: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0xb2469afa +80003644: 000ea103 lw x2,0(x29) +80003648: 004e8e93 addi x29,x29,4 + +8000364c : +Zknd_aes32dsi_cg_cmp_rd_rs1_b14: + aes32dsi x14, x14, x2, 1 # perform operation +8000364c: 6a270733 aes32dsi x14,x14,x2,0x1 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zknd_aes32dsi_cg_cmp_rd_rs1_b14, Zknd_aes32dsi_cg_cmp_rd_rs1_b14_str) +80003650: 000ba383 lw x7,0(x23) +80003654: 00e38863 beq x7,x14,80003664 +80003658: 3c10446f jal x8,80008218 +8000365c: 8000364c .word 0x8000364c +80003660: 80013340 .word 0x80013340 +80003664: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x351b142b +80003668: 000ea783 lw x15,0(x29) +8000366c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x9e7d508e +80003670: 000ea903 lw x18,0(x29) +80003674: 004e8e93 addi x29,x29,4 + +80003678 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b15: + aes32dsi x15, x15, x18, 3 # perform operation +80003678: eb2787b3 aes32dsi x15,x15,x18,0x3 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zknd_aes32dsi_cg_cmp_rd_rs1_b15, Zknd_aes32dsi_cg_cmp_rd_rs1_b15_str) +8000367c: 000ba383 lw x7,0(x23) +80003680: 00f38863 beq x7,x15,80003690 +80003684: 3950446f jal x8,80008218 +80003688: 80003678 .word 0x80003678 +8000368c: 8001337c .word 0x8001337c +80003690: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x8a340b22 +80003694: 000ea803 lw x16,0(x29) +80003698: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0xdf801e32 +8000369c: 000ea683 lw x13,0(x29) +800036a0: 004e8e93 addi x29,x29,4 + +800036a4 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b16: + aes32dsi x16, x16, x13, 2 # perform operation +800036a4: aad80833 aes32dsi x16,x16,x13,0x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x16, Zknd_aes32dsi_cg_cmp_rd_rs1_b16, Zknd_aes32dsi_cg_cmp_rd_rs1_b16_str) +800036a8: 000ba383 lw x7,0(x23) +800036ac: 01038863 beq x7,x16,800036bc +800036b0: 3690446f jal x8,80008218 +800036b4: 800036a4 .word 0x800036a4 +800036b8: 800133b8 .word 0x800133b8 +800036bc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xa0297a6b +800036c0: 000ea883 lw x17,0(x29) +800036c4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x249cdda3 +800036c8: 000eaa83 lw x21,0(x29) +800036cc: 004e8e93 addi x29,x29,4 + +800036d0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b17: + aes32dsi x17, x17, x21, 1 # perform operation +800036d0: 6b5888b3 aes32dsi x17,x17,x21,0x1 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zknd_aes32dsi_cg_cmp_rd_rs1_b17, Zknd_aes32dsi_cg_cmp_rd_rs1_b17_str) +800036d4: 000ba383 lw x7,0(x23) +800036d8: 01138863 beq x7,x17,800036e8 +800036dc: 33d0446f jal x8,80008218 +800036e0: 800036d0 .word 0x800036d0 +800036e4: 800133f4 .word 0x800133f4 +800036e8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x2aa0f98f +800036ec: 000ea903 lw x18,0(x29) +800036f0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x82abd014 +800036f4: 000ead83 lw x27,0(x29) +800036f8: 004e8e93 addi x29,x29,4 + +800036fc : +Zknd_aes32dsi_cg_cmp_rd_rs1_b18: + aes32dsi x18, x18, x27, 0 # perform operation +800036fc: 2bb90933 aes32dsi x18,x18,x27,0x0 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zknd_aes32dsi_cg_cmp_rd_rs1_b18, Zknd_aes32dsi_cg_cmp_rd_rs1_b18_str) +80003700: 000ba383 lw x7,0(x23) +80003704: 01238863 beq x7,x18,80003714 +80003708: 3110446f jal x8,80008218 +8000370c: 800036fc .word 0x800036fc +80003710: 80013430 .word 0x80013430 +80003714: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xfe44b4ee +80003718: 000ea983 lw x19,0(x29) +8000371c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x827d5c87 +80003720: 000eae03 lw x28,0(x29) +80003724: 004e8e93 addi x29,x29,4 + +80003728 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b19: + aes32dsi x19, x19, x28, 3 # perform operation +80003728: ebc989b3 aes32dsi x19,x19,x28,0x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zknd_aes32dsi_cg_cmp_rd_rs1_b19, Zknd_aes32dsi_cg_cmp_rd_rs1_b19_str) +8000372c: 000ba383 lw x7,0(x23) +80003730: 01338863 beq x7,x19,80003740 +80003734: 2e50446f jal x8,80008218 +80003738: 80003728 .word 0x80003728 +8000373c: 8001346c .word 0x8001346c +80003740: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xb7c9f56b +80003744: 000eaa03 lw x20,0(x29) +80003748: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x257c2583 +8000374c: 000eaf03 lw x30,0(x29) +80003750: 004e8e93 addi x29,x29,4 + +80003754 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b20: + aes32dsi x20, x20, x30, 3 # perform operation +80003754: ebea0a33 aes32dsi x20,x20,x30,0x3 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zknd_aes32dsi_cg_cmp_rd_rs1_b20, Zknd_aes32dsi_cg_cmp_rd_rs1_b20_str) +80003758: 000ba383 lw x7,0(x23) +8000375c: 01438863 beq x7,x20,8000376c +80003760: 2b90446f jal x8,80008218 +80003764: 80003754 .word 0x80003754 +80003768: 800134a8 .word 0x800134a8 +8000376c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x1a8ff58b +80003770: 000eaa83 lw x21,0(x29) +80003774: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x9cfa811a +80003778: 000ea883 lw x17,0(x29) +8000377c: 004e8e93 addi x29,x29,4 + +80003780 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b21: + aes32dsi x21, x21, x17, 3 # perform operation +80003780: eb1a8ab3 aes32dsi x21,x21,x17,0x3 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zknd_aes32dsi_cg_cmp_rd_rs1_b21, Zknd_aes32dsi_cg_cmp_rd_rs1_b21_str) +80003784: 000ba383 lw x7,0(x23) +80003788: 01538863 beq x7,x21,80003798 +8000378c: 28d0446f jal x8,80008218 +80003790: 80003780 .word 0x80003780 +80003794: 800134e4 .word 0x800134e4 +80003798: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x9b365a42 +8000379c: 000eab03 lw x22,0(x29) +800037a0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0xcadb7735 +800037a4: 000ea983 lw x19,0(x29) +800037a8: 004e8e93 addi x29,x29,4 + +800037ac : +Zknd_aes32dsi_cg_cmp_rd_rs1_b22: + aes32dsi x22, x22, x19, 1 # perform operation +800037ac: 6b3b0b33 aes32dsi x22,x22,x19,0x1 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zknd_aes32dsi_cg_cmp_rd_rs1_b22, Zknd_aes32dsi_cg_cmp_rd_rs1_b22_str) +800037b0: 000ba383 lw x7,0(x23) +800037b4: 01638863 beq x7,x22,800037c4 +800037b8: 2610446f jal x8,80008218 +800037bc: 800037ac .word 0x800037ac +800037c0: 80013520 .word 0x80013520 +800037c4: 004b8b93 addi x23,x23,4 + + mv x10, x23 # switch signature pointer register to avoid conflict with test +800037c8: 000b8513 addi x10,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xb39d29ee +800037cc: 000eab83 lw x23,0(x29) +800037d0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xe830ff64 +800037d4: 000eab03 lw x22,0(x29) +800037d8: 004e8e93 addi x29,x29,4 + +800037dc : +Zknd_aes32dsi_cg_cmp_rd_rs1_b23: + aes32dsi x23, x23, x22, 1 # perform operation +800037dc: 6b6b8bb3 aes32dsi x23,x23,x22,0x1 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cmp_rd_rs1_b23, Zknd_aes32dsi_cg_cmp_rd_rs1_b23_str) +800037e0: 00052383 lw x7,0(x10) +800037e4: 01738863 beq x7,x23,800037f4 +800037e8: 2310446f jal x8,80008218 +800037ec: 800037dc .word 0x800037dc +800037f0: 8001355c .word 0x8001355c +800037f4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xf6e33fd7 +800037f8: 000eac03 lw x24,0(x29) +800037fc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x3065afe4 +80003800: 000eaf83 lw x31,0(x29) +80003804: 004e8e93 addi x29,x29,4 + +80003808 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b24: + aes32dsi x24, x24, x31, 0 # perform operation +80003808: 2bfc0c33 aes32dsi x24,x24,x31,0x0 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cmp_rd_rs1_b24, Zknd_aes32dsi_cg_cmp_rd_rs1_b24_str) +8000380c: 00052383 lw x7,0(x10) +80003810: 01838863 beq x7,x24,80003820 +80003814: 2050446f jal x8,80008218 +80003818: 80003808 .word 0x80003808 +8000381c: 80013598 .word 0x80013598 +80003820: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x694f3650 +80003824: 000eac83 lw x25,0(x29) +80003828: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0xa9fbe259 +8000382c: 000eae03 lw x28,0(x29) +80003830: 004e8e93 addi x29,x29,4 + +80003834 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b25: + aes32dsi x25, x25, x28, 0 # perform operation +80003834: 2bcc8cb3 aes32dsi x25,x25,x28,0x0 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cmp_rd_rs1_b25, Zknd_aes32dsi_cg_cmp_rd_rs1_b25_str) +80003838: 00052383 lw x7,0(x10) +8000383c: 01938863 beq x7,x25,8000384c +80003840: 1d90446f jal x8,80008218 +80003844: 80003834 .word 0x80003834 +80003848: 800135d4 .word 0x800135d4 +8000384c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x32b162ca +80003850: 000ead03 lw x26,0(x29) +80003854: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x15eae5ed +80003858: 000ea083 lw x1,0(x29) +8000385c: 004e8e93 addi x29,x29,4 + +80003860 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b26: + aes32dsi x26, x26, x1, 0 # perform operation +80003860: 2a1d0d33 aes32dsi x26,x26,x1,0x0 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknd_aes32dsi_cg_cmp_rd_rs1_b26, Zknd_aes32dsi_cg_cmp_rd_rs1_b26_str) +80003864: 00052383 lw x7,0(x10) +80003868: 01a38863 beq x7,x26,80003878 +8000386c: 1ad0446f jal x8,80008218 +80003870: 80003860 .word 0x80003860 +80003874: 80013610 .word 0x80013610 +80003878: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x32cadd2b +8000387c: 000ead83 lw x27,0(x29) +80003880: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xb77fd9ca +80003884: 000ea903 lw x18,0(x29) +80003888: 004e8e93 addi x29,x29,4 + +8000388c : +Zknd_aes32dsi_cg_cmp_rd_rs1_b27: + aes32dsi x27, x27, x18, 3 # perform operation +8000388c: eb2d8db3 aes32dsi x27,x27,x18,0x3 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cmp_rd_rs1_b27, Zknd_aes32dsi_cg_cmp_rd_rs1_b27_str) +80003890: 00052383 lw x7,0(x10) +80003894: 01b38863 beq x7,x27,800038a4 +80003898: 1810446f jal x8,80008218 +8000389c: 8000388c .word 0x8000388c +800038a0: 8001364c .word 0x8001364c +800038a4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xd55e04b1 +800038a8: 000eae03 lw x28,0(x29) +800038ac: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x3ce117d4 +800038b0: 000eac83 lw x25,0(x29) +800038b4: 004e8e93 addi x29,x29,4 + +800038b8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b28: + aes32dsi x28, x28, x25, 3 # perform operation +800038b8: eb9e0e33 aes32dsi x28,x28,x25,0x3 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cmp_rd_rs1_b28, Zknd_aes32dsi_cg_cmp_rd_rs1_b28_str) +800038bc: 00052383 lw x7,0(x10) +800038c0: 01c38863 beq x7,x28,800038d0 +800038c4: 1550446f jal x8,80008218 +800038c8: 800038b8 .word 0x800038b8 +800038cc: 80013688 .word 0x80013688 +800038d0: 00450513 addi x10,x10,4 + + mv x9, x29 # switch data pointer register to avoid conflict with test +800038d4: 000e8493 addi x9,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xb018bcc4 +800038d8: 0004ae83 lw x29,0(x9) +800038dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xdb3ba7b3 +800038e0: 0004a903 lw x18,0(x9) +800038e4: 00448493 addi x9,x9,4 + +800038e8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b29: + aes32dsi x29, x29, x18, 1 # perform operation +800038e8: 6b2e8eb3 aes32dsi x29,x29,x18,0x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cmp_rd_rs1_b29, Zknd_aes32dsi_cg_cmp_rd_rs1_b29_str) +800038ec: 00052383 lw x7,0(x10) +800038f0: 01d38863 beq x7,x29,80003900 +800038f4: 1250446f jal x8,80008218 +800038f8: 800038e8 .word 0x800038e8 +800038fc: 800136c4 .word 0x800136c4 +80003900: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x63527a1f +80003904: 0004af03 lw x30,0(x9) +80003908: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xc7894a37 +8000390c: 0004a983 lw x19,0(x9) +80003910: 00448493 addi x9,x9,4 + +80003914 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b30: + aes32dsi x30, x30, x19, 1 # perform operation +80003914: 6b3f0f33 aes32dsi x30,x30,x19,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cmp_rd_rs1_b30, Zknd_aes32dsi_cg_cmp_rd_rs1_b30_str) +80003918: 00052383 lw x7,0(x10) +8000391c: 01e38863 beq x7,x30,8000392c +80003920: 0f90446f jal x8,80008218 +80003924: 80003914 .word 0x80003914 +80003928: 80013700 .word 0x80013700 +8000392c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x4d8c31f0 +80003930: 0004af83 lw x31,0(x9) +80003934: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0xdaab2d71 +80003938: 0004a803 lw x16,0(x9) +8000393c: 00448493 addi x9,x9,4 + +80003940 : +Zknd_aes32dsi_cg_cmp_rd_rs1_b31: + aes32dsi x31, x31, x16, 1 # perform operation +80003940: 6b0f8fb3 aes32dsi x31,x31,x16,0x1 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cmp_rd_rs1_b31, Zknd_aes32dsi_cg_cmp_rd_rs1_b31_str) +80003944: 00052383 lw x7,0(x10) +80003948: 01f38863 beq x7,x31,80003958 +8000394c: 0cd0446f jal x8,80008218 +80003950: 80003940 .word 0x80003940 +80003954: 8001373c .word 0x8001373c +80003958: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2f76f838 +8000395c: 0004ad03 lw x26,0(x9) +80003960: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xad82a027 +80003964: 0004a003 lw x0,0(x9) +80003968: 00448493 addi x9,x9,4 + +8000396c : +Zknd_aes32dsi_cg_cmp_rd_rs2_b0: + aes32dsi x0, x26, x0, 0 # perform operation +8000396c: 2a0d0033 aes32dsi x0,x26,x0,0x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zknd_aes32dsi_cg_cmp_rd_rs2_b0, Zknd_aes32dsi_cg_cmp_rd_rs2_b0_str) +80003970: 00052383 lw x7,0(x10) +80003974: 00038863 beq x7,x0,80003984 +80003978: 0a10446f jal x8,80008218 +8000397c: 8000396c .word 0x8000396c +80003980: 80013778 .word 0x80013778 +80003984: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7e3ebfd1 +80003988: 0004ae83 lw x29,0(x9) +8000398c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x4f1546ec +80003990: 0004a083 lw x1,0(x9) +80003994: 00448493 addi x9,x9,4 + +80003998 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b1: + aes32dsi x1, x29, x1, 3 # perform operation +80003998: ea1e80b3 aes32dsi x1,x29,x1,0x3 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zknd_aes32dsi_cg_cmp_rd_rs2_b1, Zknd_aes32dsi_cg_cmp_rd_rs2_b1_str) +8000399c: 00052383 lw x7,0(x10) +800039a0: 00138863 beq x7,x1,800039b0 +800039a4: 0750446f jal x8,80008218 +800039a8: 80003998 .word 0x80003998 +800039ac: 800137b3 .word 0x800137b3 +800039b0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x1b967280 +800039b4: 0004a603 lw x12,0(x9) +800039b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x5669cded +800039bc: 0004a103 lw x2,0(x9) +800039c0: 00448493 addi x9,x9,4 + +800039c4 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b2: + aes32dsi x2, x12, x2, 1 # perform operation +800039c4: 6a260133 aes32dsi x2,x12,x2,0x1 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cmp_rd_rs2_b2, Zknd_aes32dsi_cg_cmp_rd_rs2_b2_str) +800039c8: 00052383 lw x7,0(x10) +800039cc: 00238863 beq x7,x2,800039dc +800039d0: 0490446f jal x8,80008218 +800039d4: 800039c4 .word 0x800039c4 +800039d8: 800137ee .word 0x800137ee +800039dc: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x839d3ba9 +800039e0: 0004a103 lw x2,0(x9) +800039e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x0512b5b4 +800039e8: 0004a183 lw x3,0(x9) +800039ec: 00448493 addi x9,x9,4 + +800039f0 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b3: + aes32dsi x3, x2, x3, 0 # perform operation +800039f0: 2a3101b3 aes32dsi x3,x2,x3,0x0 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cmp_rd_rs2_b3, Zknd_aes32dsi_cg_cmp_rd_rs2_b3_str) +800039f4: 00052383 lw x7,0(x10) +800039f8: 00338863 beq x7,x3,80003a08 +800039fc: 01d0446f jal x8,80008218 +80003a00: 800039f0 .word 0x800039f0 +80003a04: 80013829 .word 0x80013829 +80003a08: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x234d8e96 +80003a0c: 0004a083 lw x1,0(x9) +80003a10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xb4e6c70c +80003a14: 0004a203 lw x4,0(x9) +80003a18: 00448493 addi x9,x9,4 + +80003a1c : +Zknd_aes32dsi_cg_cmp_rd_rs2_b4: + aes32dsi x4, x1, x4, 2 # perform operation +80003a1c: aa408233 aes32dsi x4,x1,x4,0x2 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cmp_rd_rs2_b4, Zknd_aes32dsi_cg_cmp_rd_rs2_b4_str) +80003a20: 00052383 lw x7,0(x10) +80003a24: 00438863 beq x7,x4,80003a34 +80003a28: 7f00446f jal x8,80008218 +80003a2c: 80003a1c .word 0x80003a1c +80003a30: 80013864 .word 0x80013864 +80003a34: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xc9afef18 +80003a38: 0004a983 lw x19,0(x9) +80003a3c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x535faffc +80003a40: 0004a283 lw x5,0(x9) +80003a44: 00448493 addi x9,x9,4 + +80003a48 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b5: + aes32dsi x5, x19, x5, 1 # perform operation +80003a48: 6a5982b3 aes32dsi x5,x19,x5,0x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cmp_rd_rs2_b5, Zknd_aes32dsi_cg_cmp_rd_rs2_b5_str) +80003a4c: 00052383 lw x7,0(x10) +80003a50: 00538863 beq x7,x5,80003a60 +80003a54: 7c40446f jal x8,80008218 +80003a58: 80003a48 .word 0x80003a48 +80003a5c: 8001389f .word 0x8001389f +80003a60: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x062f7244 +80003a64: 0004a103 lw x2,0(x9) +80003a68: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x4b03a500 +80003a6c: 0004a303 lw x6,0(x9) +80003a70: 00448493 addi x9,x9,4 + +80003a74 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b6: + aes32dsi x6, x2, x6, 1 # perform operation +80003a74: 6a610333 aes32dsi x6,x2,x6,0x1 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cmp_rd_rs2_b6, Zknd_aes32dsi_cg_cmp_rd_rs2_b6_str) +80003a78: 00052383 lw x7,0(x10) +80003a7c: 00638863 beq x7,x6,80003a8c +80003a80: 7980446f jal x8,80008218 +80003a84: 80003a74 .word 0x80003a74 +80003a88: 800138da .word 0x800138da +80003a8c: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a90: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a94: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xc25f0ab3 +80003a98: 0004a703 lw x14,0(x9) +80003a9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x6543187d +80003aa0: 0004a383 lw x7,0(x9) +80003aa4: 00448493 addi x9,x9,4 + +80003aa8 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b7: + aes32dsi x7, x14, x7, 2 # perform operation +80003aa8: aa7703b3 aes32dsi x7,x14,x7,0x2 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknd_aes32dsi_cg_cmp_rd_rs2_b7, Zknd_aes32dsi_cg_cmp_rd_rs2_b7_str) +80003aac: 00052203 lw x4,0(x10) +80003ab0: 00720863 beq x4,x7,80003ac0 +80003ab4: 74c042ef jal x5,80008200 +80003ab8: 80003aa8 .word 0x80003aa8 +80003abc: 80013915 .word 0x80013915 +80003ac0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xea2577ec +80003ac4: 0004a803 lw x16,0(x9) +80003ac8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x11fd9dcf +80003acc: 0004a403 lw x8,0(x9) +80003ad0: 00448493 addi x9,x9,4 + +80003ad4 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b8: + aes32dsi x8, x16, x8, 0 # perform operation +80003ad4: 2a880433 aes32dsi x8,x16,x8,0x0 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknd_aes32dsi_cg_cmp_rd_rs2_b8, Zknd_aes32dsi_cg_cmp_rd_rs2_b8_str) +80003ad8: 00052203 lw x4,0(x10) +80003adc: 00820863 beq x4,x8,80003aec +80003ae0: 720042ef jal x5,80008200 +80003ae4: 80003ad4 .word 0x80003ad4 +80003ae8: 80013950 .word 0x80013950 +80003aec: 00450513 addi x10,x10,4 + + mv x28, x9 # switch data pointer register to avoid conflict with test +80003af0: 00048e13 addi x28,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xc97c4593 +80003af4: 000e2d03 lw x26,0(x28) +80003af8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xa20bf2ff +80003afc: 000e2483 lw x9,0(x28) +80003b00: 004e0e13 addi x28,x28,4 + +80003b04 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b9: + aes32dsi x9, x26, x9, 3 # perform operation +80003b04: ea9d04b3 aes32dsi x9,x26,x9,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknd_aes32dsi_cg_cmp_rd_rs2_b9, Zknd_aes32dsi_cg_cmp_rd_rs2_b9_str) +80003b08: 00052203 lw x4,0(x10) +80003b0c: 00920863 beq x4,x9,80003b1c +80003b10: 6f0042ef jal x5,80008200 +80003b14: 80003b04 .word 0x80003b04 +80003b18: 8001398b .word 0x8001398b +80003b1c: 00450513 addi x10,x10,4 + + mv x18, x10 # switch signature pointer register to avoid conflict with test +80003b20: 00050913 addi x18,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0x6e14a414 +80003b24: 000e2083 lw x1,0(x28) +80003b28: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x5f5b110c +80003b2c: 000e2503 lw x10,0(x28) +80003b30: 004e0e13 addi x28,x28,4 + +80003b34 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b10: + aes32dsi x10, x1, x10, 0 # perform operation +80003b34: 2aa08533 aes32dsi x10,x1,x10,0x0 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zknd_aes32dsi_cg_cmp_rd_rs2_b10, Zknd_aes32dsi_cg_cmp_rd_rs2_b10_str) +80003b38: 00092203 lw x4,0(x18) +80003b3c: 00a20863 beq x4,x10,80003b4c +80003b40: 6c0042ef jal x5,80008200 +80003b44: 80003b34 .word 0x80003b34 +80003b48: 800139c6 .word 0x800139c6 +80003b4c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0xcf439b26 +80003b50: 000e2403 lw x8,0(x28) +80003b54: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0xaa4f04b4 +80003b58: 000e2583 lw x11,0(x28) +80003b5c: 004e0e13 addi x28,x28,4 + +80003b60 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b11: + aes32dsi x11, x8, x11, 0 # perform operation +80003b60: 2ab405b3 aes32dsi x11,x8,x11,0x0 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zknd_aes32dsi_cg_cmp_rd_rs2_b11, Zknd_aes32dsi_cg_cmp_rd_rs2_b11_str) +80003b64: 00092203 lw x4,0(x18) +80003b68: 00b20863 beq x4,x11,80003b78 +80003b6c: 694042ef jal x5,80008200 +80003b70: 80003b60 .word 0x80003b60 +80003b74: 80013a02 .word 0x80013a02 +80003b78: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0xd240719d +80003b7c: 000e2083 lw x1,0(x28) +80003b80: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0xd1c8626f +80003b84: 000e2603 lw x12,0(x28) +80003b88: 004e0e13 addi x28,x28,4 + +80003b8c : +Zknd_aes32dsi_cg_cmp_rd_rs2_b12: + aes32dsi x12, x1, x12, 3 # perform operation +80003b8c: eac08633 aes32dsi x12,x1,x12,0x3 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zknd_aes32dsi_cg_cmp_rd_rs2_b12, Zknd_aes32dsi_cg_cmp_rd_rs2_b12_str) +80003b90: 00092203 lw x4,0(x18) +80003b94: 00c20863 beq x4,x12,80003ba4 +80003b98: 668042ef jal x5,80008200 +80003b9c: 80003b8c .word 0x80003b8c +80003ba0: 80013a3e .word 0x80013a3e +80003ba4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xfaed16f5 +80003ba8: 000e2d03 lw x26,0(x28) +80003bac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0x91f26c20 +80003bb0: 000e2683 lw x13,0(x28) +80003bb4: 004e0e13 addi x28,x28,4 + +80003bb8 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b13: + aes32dsi x13, x26, x13, 3 # perform operation +80003bb8: eadd06b3 aes32dsi x13,x26,x13,0x3 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zknd_aes32dsi_cg_cmp_rd_rs2_b13, Zknd_aes32dsi_cg_cmp_rd_rs2_b13_str) +80003bbc: 00092203 lw x4,0(x18) +80003bc0: 00d20863 beq x4,x13,80003bd0 +80003bc4: 63c042ef jal x5,80008200 +80003bc8: 80003bb8 .word 0x80003bb8 +80003bcc: 80013a7a .word 0x80013a7a +80003bd0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xd438a382 +80003bd4: 000e2583 lw x11,0(x28) +80003bd8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x2331b4b5 +80003bdc: 000e2703 lw x14,0(x28) +80003be0: 004e0e13 addi x28,x28,4 + +80003be4 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b14: + aes32dsi x14, x11, x14, 0 # perform operation +80003be4: 2ae58733 aes32dsi x14,x11,x14,0x0 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zknd_aes32dsi_cg_cmp_rd_rs2_b14, Zknd_aes32dsi_cg_cmp_rd_rs2_b14_str) +80003be8: 00092203 lw x4,0(x18) +80003bec: 00e20863 beq x4,x14,80003bfc +80003bf0: 610042ef jal x5,80008200 +80003bf4: 80003be4 .word 0x80003be4 +80003bf8: 80013ab6 .word 0x80013ab6 +80003bfc: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0xa390fb94 +80003c00: 000e2183 lw x3,0(x28) +80003c04: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0x1563bb86 +80003c08: 000e2783 lw x15,0(x28) +80003c0c: 004e0e13 addi x28,x28,4 + +80003c10 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b15: + aes32dsi x15, x3, x15, 2 # perform operation +80003c10: aaf187b3 aes32dsi x15,x3,x15,0x2 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zknd_aes32dsi_cg_cmp_rd_rs2_b15, Zknd_aes32dsi_cg_cmp_rd_rs2_b15_str) +80003c14: 00092203 lw x4,0(x18) +80003c18: 00f20863 beq x4,x15,80003c28 +80003c1c: 5e4042ef jal x5,80008200 +80003c20: 80003c10 .word 0x80003c10 +80003c24: 80013af2 .word 0x80013af2 +80003c28: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0xef68f66b +80003c2c: 000e2403 lw x8,0(x28) +80003c30: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xdd1546db +80003c34: 000e2803 lw x16,0(x28) +80003c38: 004e0e13 addi x28,x28,4 + +80003c3c : +Zknd_aes32dsi_cg_cmp_rd_rs2_b16: + aes32dsi x16, x8, x16, 3 # perform operation +80003c3c: eb040833 aes32dsi x16,x8,x16,0x3 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zknd_aes32dsi_cg_cmp_rd_rs2_b16, Zknd_aes32dsi_cg_cmp_rd_rs2_b16_str) +80003c40: 00092203 lw x4,0(x18) +80003c44: 01020863 beq x4,x16,80003c54 +80003c48: 5b8042ef jal x5,80008200 +80003c4c: 80003c3c .word 0x80003c3c +80003c50: 80013b2e .word 0x80013b2e +80003c54: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0xb094fdbb +80003c58: 000e2a83 lw x21,0(x28) +80003c5c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0xea822a09 +80003c60: 000e2883 lw x17,0(x28) +80003c64: 004e0e13 addi x28,x28,4 + +80003c68 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b17: + aes32dsi x17, x21, x17, 2 # perform operation +80003c68: ab1a88b3 aes32dsi x17,x21,x17,0x2 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zknd_aes32dsi_cg_cmp_rd_rs2_b17, Zknd_aes32dsi_cg_cmp_rd_rs2_b17_str) +80003c6c: 00092203 lw x4,0(x18) +80003c70: 01120863 beq x4,x17,80003c80 +80003c74: 58c042ef jal x5,80008200 +80003c78: 80003c68 .word 0x80003c68 +80003c7c: 80013b6a .word 0x80013b6a +80003c80: 00490913 addi x18,x18,4 + + mv x21, x18 # switch signature pointer register to avoid conflict with test +80003c84: 00090a93 addi x21,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xb4ec5d08 +80003c88: 000e2a03 lw x20,0(x28) +80003c8c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x45ea08c1 +80003c90: 000e2903 lw x18,0(x28) +80003c94: 004e0e13 addi x28,x28,4 + +80003c98 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b18: + aes32dsi x18, x20, x18, 3 # perform operation +80003c98: eb2a0933 aes32dsi x18,x20,x18,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknd_aes32dsi_cg_cmp_rd_rs2_b18, Zknd_aes32dsi_cg_cmp_rd_rs2_b18_str) +80003c9c: 000aa203 lw x4,0(x21) +80003ca0: 01220863 beq x4,x18,80003cb0 +80003ca4: 55c042ef jal x5,80008200 +80003ca8: 80003c98 .word 0x80003c98 +80003cac: 80013ba6 .word 0x80013ba6 +80003cb0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0x4bd95421 +80003cb4: 000e2783 lw x15,0(x28) +80003cb8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xd2975fe0 +80003cbc: 000e2983 lw x19,0(x28) +80003cc0: 004e0e13 addi x28,x28,4 + +80003cc4 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b19: + aes32dsi x19, x15, x19, 2 # perform operation +80003cc4: ab3789b3 aes32dsi x19,x15,x19,0x2 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknd_aes32dsi_cg_cmp_rd_rs2_b19, Zknd_aes32dsi_cg_cmp_rd_rs2_b19_str) +80003cc8: 000aa203 lw x4,0(x21) +80003ccc: 01320863 beq x4,x19,80003cdc +80003cd0: 530042ef jal x5,80008200 +80003cd4: 80003cc4 .word 0x80003cc4 +80003cd8: 80013be2 .word 0x80013be2 +80003cdc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0x6af17a44 +80003ce0: 000e2403 lw x8,0(x28) +80003ce4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x02395bbe +80003ce8: 000e2a03 lw x20,0(x28) +80003cec: 004e0e13 addi x28,x28,4 + +80003cf0 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b20: + aes32dsi x20, x8, x20, 2 # perform operation +80003cf0: ab440a33 aes32dsi x20,x8,x20,0x2 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknd_aes32dsi_cg_cmp_rd_rs2_b20, Zknd_aes32dsi_cg_cmp_rd_rs2_b20_str) +80003cf4: 000aa203 lw x4,0(x21) +80003cf8: 01420863 beq x4,x20,80003d08 +80003cfc: 504042ef jal x5,80008200 +80003d00: 80003cf0 .word 0x80003cf0 +80003d04: 80013c1e .word 0x80013c1e +80003d08: 004a8a93 addi x21,x21,4 + + mv x17, x21 # switch signature pointer register to avoid conflict with test +80003d0c: 000a8893 addi x17,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0x56cf0f94 +80003d10: 000e2403 lw x8,0(x28) +80003d14: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0xdc372e0a +80003d18: 000e2a83 lw x21,0(x28) +80003d1c: 004e0e13 addi x28,x28,4 + +80003d20 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b21: + aes32dsi x21, x8, x21, 1 # perform operation +80003d20: 6b540ab3 aes32dsi x21,x8,x21,0x1 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes32dsi_cg_cmp_rd_rs2_b21, Zknd_aes32dsi_cg_cmp_rd_rs2_b21_str) +80003d24: 0008a203 lw x4,0(x17) +80003d28: 01520863 beq x4,x21,80003d38 +80003d2c: 4d4042ef jal x5,80008200 +80003d30: 80003d20 .word 0x80003d20 +80003d34: 80013c5a .word 0x80013c5a +80003d38: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x304ba221 +80003d3c: 000e2583 lw x11,0(x28) +80003d40: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x7409bb3b +80003d44: 000e2b03 lw x22,0(x28) +80003d48: 004e0e13 addi x28,x28,4 + +80003d4c : +Zknd_aes32dsi_cg_cmp_rd_rs2_b22: + aes32dsi x22, x11, x22, 3 # perform operation +80003d4c: eb658b33 aes32dsi x22,x11,x22,0x3 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes32dsi_cg_cmp_rd_rs2_b22, Zknd_aes32dsi_cg_cmp_rd_rs2_b22_str) +80003d50: 0008a203 lw x4,0(x17) +80003d54: 01620863 beq x4,x22,80003d64 +80003d58: 4a8042ef jal x5,80008200 +80003d5c: 80003d4c .word 0x80003d4c +80003d60: 80013c96 .word 0x80013c96 +80003d64: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0xada60a5a +80003d68: 000e2403 lw x8,0(x28) +80003d6c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xd2e48609 +80003d70: 000e2b83 lw x23,0(x28) +80003d74: 004e0e13 addi x28,x28,4 + +80003d78 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b23: + aes32dsi x23, x8, x23, 3 # perform operation +80003d78: eb740bb3 aes32dsi x23,x8,x23,0x3 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes32dsi_cg_cmp_rd_rs2_b23, Zknd_aes32dsi_cg_cmp_rd_rs2_b23_str) +80003d7c: 0008a203 lw x4,0(x17) +80003d80: 01720863 beq x4,x23,80003d90 +80003d84: 47c042ef jal x5,80008200 +80003d88: 80003d78 .word 0x80003d78 +80003d8c: 80013cd2 .word 0x80013cd2 +80003d90: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x02b9f3fc +80003d94: 000e2183 lw x3,0(x28) +80003d98: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xdb8ad5d4 +80003d9c: 000e2c03 lw x24,0(x28) +80003da0: 004e0e13 addi x28,x28,4 + +80003da4 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b24: + aes32dsi x24, x3, x24, 1 # perform operation +80003da4: 6b818c33 aes32dsi x24,x3,x24,0x1 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes32dsi_cg_cmp_rd_rs2_b24, Zknd_aes32dsi_cg_cmp_rd_rs2_b24_str) +80003da8: 0008a203 lw x4,0(x17) +80003dac: 01820863 beq x4,x24,80003dbc +80003db0: 450042ef jal x5,80008200 +80003db4: 80003da4 .word 0x80003da4 +80003db8: 80013d0e .word 0x80013d0e +80003dbc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x1f1fc892 +80003dc0: 000e2f03 lw x30,0(x28) +80003dc4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x082a7a17 +80003dc8: 000e2c83 lw x25,0(x28) +80003dcc: 004e0e13 addi x28,x28,4 + +80003dd0 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b25: + aes32dsi x25, x30, x25, 0 # perform operation +80003dd0: 2b9f0cb3 aes32dsi x25,x30,x25,0x0 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes32dsi_cg_cmp_rd_rs2_b25, Zknd_aes32dsi_cg_cmp_rd_rs2_b25_str) +80003dd4: 0008a203 lw x4,0(x17) +80003dd8: 01920863 beq x4,x25,80003de8 +80003ddc: 424042ef jal x5,80008200 +80003de0: 80003dd0 .word 0x80003dd0 +80003de4: 80013d4a .word 0x80013d4a +80003de8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x7a5452df +80003dec: 000e2703 lw x14,0(x28) +80003df0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0xe85672d2 +80003df4: 000e2d03 lw x26,0(x28) +80003df8: 004e0e13 addi x28,x28,4 + +80003dfc : +Zknd_aes32dsi_cg_cmp_rd_rs2_b26: + aes32dsi x26, x14, x26, 1 # perform operation +80003dfc: 6ba70d33 aes32dsi x26,x14,x26,0x1 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes32dsi_cg_cmp_rd_rs2_b26, Zknd_aes32dsi_cg_cmp_rd_rs2_b26_str) +80003e00: 0008a203 lw x4,0(x17) +80003e04: 01a20863 beq x4,x26,80003e14 +80003e08: 3f8042ef jal x5,80008200 +80003e0c: 80003dfc .word 0x80003dfc +80003e10: 80013d86 .word 0x80013d86 +80003e14: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xa5e0d5e0 +80003e18: 000e2583 lw x11,0(x28) +80003e1c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0xd8833d2f +80003e20: 000e2d83 lw x27,0(x28) +80003e24: 004e0e13 addi x28,x28,4 + +80003e28 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b27: + aes32dsi x27, x11, x27, 0 # perform operation +80003e28: 2bb58db3 aes32dsi x27,x11,x27,0x0 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes32dsi_cg_cmp_rd_rs2_b27, Zknd_aes32dsi_cg_cmp_rd_rs2_b27_str) +80003e2c: 0008a203 lw x4,0(x17) +80003e30: 01b20863 beq x4,x27,80003e40 +80003e34: 3cc042ef jal x5,80008200 +80003e38: 80003e28 .word 0x80003e28 +80003e3c: 80013dc2 .word 0x80013dc2 +80003e40: 00488893 addi x17,x17,4 + + mv x23, x28 # switch data pointer register to avoid conflict with test +80003e44: 000e0b93 addi x23,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xdb97f179 +80003e48: 000ba183 lw x3,0(x23) +80003e4c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xe65d07d4 +80003e50: 000bae03 lw x28,0(x23) +80003e54: 004b8b93 addi x23,x23,4 + +80003e58 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b28: + aes32dsi x28, x3, x28, 1 # perform operation +80003e58: 6bc18e33 aes32dsi x28,x3,x28,0x1 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes32dsi_cg_cmp_rd_rs2_b28, Zknd_aes32dsi_cg_cmp_rd_rs2_b28_str) +80003e5c: 0008a203 lw x4,0(x17) +80003e60: 01c20863 beq x4,x28,80003e70 +80003e64: 39c042ef jal x5,80008200 +80003e68: 80003e58 .word 0x80003e58 +80003e6c: 80013dfe .word 0x80013dfe +80003e70: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x8dfdd8e9 +80003e74: 000baa03 lw x20,0(x23) +80003e78: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x7871a2d9 +80003e7c: 000bae83 lw x29,0(x23) +80003e80: 004b8b93 addi x23,x23,4 + +80003e84 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b29: + aes32dsi x29, x20, x29, 1 # perform operation +80003e84: 6bda0eb3 aes32dsi x29,x20,x29,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes32dsi_cg_cmp_rd_rs2_b29, Zknd_aes32dsi_cg_cmp_rd_rs2_b29_str) +80003e88: 0008a203 lw x4,0(x17) +80003e8c: 01d20863 beq x4,x29,80003e9c +80003e90: 370042ef jal x5,80008200 +80003e94: 80003e84 .word 0x80003e84 +80003e98: 80013e3a .word 0x80013e3a +80003e9c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0xf245d102 +80003ea0: 000ba003 lw x0,0(x23) +80003ea4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0xe3a0965d +80003ea8: 000baf03 lw x30,0(x23) +80003eac: 004b8b93 addi x23,x23,4 + +80003eb0 : +Zknd_aes32dsi_cg_cmp_rd_rs2_b30: + aes32dsi x30, x0, x30, 1 # perform operation +80003eb0: 6be00f33 aes32dsi x30,x0,x30,0x1 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes32dsi_cg_cmp_rd_rs2_b30, Zknd_aes32dsi_cg_cmp_rd_rs2_b30_str) +80003eb4: 0008a203 lw x4,0(x17) +80003eb8: 01e20863 beq x4,x30,80003ec8 +80003ebc: 344042ef jal x5,80008200 +80003ec0: 80003eb0 .word 0x80003eb0 +80003ec4: 80013e76 .word 0x80013e76 +80003ec8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x05d2b0a1 +80003ecc: 000bad03 lw x26,0(x23) +80003ed0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x36d82af9 +80003ed4: 000baf83 lw x31,0(x23) +80003ed8: 004b8b93 addi x23,x23,4 + +80003edc : +Zknd_aes32dsi_cg_cmp_rd_rs2_b31: + aes32dsi x31, x26, x31, 1 # perform operation +80003edc: 6bfd0fb3 aes32dsi x31,x26,x31,0x1 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes32dsi_cg_cmp_rd_rs2_b31, Zknd_aes32dsi_cg_cmp_rd_rs2_b31_str) +80003ee0: 0008a203 lw x4,0(x17) +80003ee4: 01f20863 beq x4,x31,80003ef4 +80003ee8: 318042ef jal x5,80008200 +80003eec: 80003edc .word 0x80003edc +80003ef0: 80013eb2 .word 0x80013eb2 +80003ef4: 00488893 addi x17,x17,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x9533946e +80003ef8: 000ba003 lw x0,0(x23) +80003efc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x087430ab +80003f00: 000ba003 lw x0,0(x23) +80003f04: 004b8b93 addi x23,x23,4 + +80003f08 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b0: + aes32dsi x0, x0, x0, 0 # perform operation +80003f08: 2a000033 aes32dsi x0,x0,x0,0x0 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b0, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b0_str) +80003f0c: 0008a203 lw x4,0(x17) +80003f10: 00020863 beq x4,x0,80003f20 +80003f14: 2ec042ef jal x5,80008200 +80003f18: 80003f08 .word 0x80003f08 +80003f1c: 80013eee .word 0x80013eee +80003f20: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x3f3fef35 +80003f24: 000ba083 lw x1,0(x23) +80003f28: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x5d0a85e5 +80003f2c: 000ba083 lw x1,0(x23) +80003f30: 004b8b93 addi x23,x23,4 + +80003f34 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b1: + aes32dsi x1, x1, x1, 2 # perform operation +80003f34: aa1080b3 aes32dsi x1,x1,x1,0x2 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b1, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b1_str) +80003f38: 0008a203 lw x4,0(x17) +80003f3c: 00120863 beq x4,x1,80003f4c +80003f40: 2c0042ef jal x5,80008200 +80003f44: 80003f34 .word 0x80003f34 +80003f48: 80013f2d .word 0x80013f2d +80003f4c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xdae8cd86 +80003f50: 000ba103 lw x2,0(x23) +80003f54: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x5b2e40cf +80003f58: 000ba103 lw x2,0(x23) +80003f5c: 004b8b93 addi x23,x23,4 + +80003f60 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b2: + aes32dsi x2, x2, x2, 3 # perform operation +80003f60: ea210133 aes32dsi x2,x2,x2,0x3 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b2, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b2_str) +80003f64: 0008a203 lw x4,0(x17) +80003f68: 00220863 beq x4,x2,80003f78 +80003f6c: 294042ef jal x5,80008200 +80003f70: 80003f60 .word 0x80003f60 +80003f74: 80013f6c .word 0x80013f6c +80003f78: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x6eb06711 +80003f7c: 000ba183 lw x3,0(x23) +80003f80: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xfe7586b9 +80003f84: 000ba183 lw x3,0(x23) +80003f88: 004b8b93 addi x23,x23,4 + +80003f8c : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b3: + aes32dsi x3, x3, x3, 1 # perform operation +80003f8c: 6a3181b3 aes32dsi x3,x3,x3,0x1 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b3, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b3_str) +80003f90: 0008a203 lw x4,0(x17) +80003f94: 00320863 beq x4,x3,80003fa4 +80003f98: 268042ef jal x5,80008200 +80003f9c: 80003f8c .word 0x80003f8c +80003fa0: 80013fab .word 0x80013fab +80003fa4: 00488893 addi x17,x17,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003fa8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003fac: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x1a49e89b +80003fb0: 000ba203 lw x4,0(x23) +80003fb4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xd3352b34 +80003fb8: 000ba203 lw x4,0(x23) +80003fbc: 004b8b93 addi x23,x23,4 + +80003fc0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b4: + aes32dsi x4, x4, x4, 0 # perform operation +80003fc0: 2a420233 aes32dsi x4,x4,x4,0x0 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b4, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b4_str) +80003fc4: 0008a683 lw x13,0(x17) +80003fc8: 00468863 beq x13,x4,80003fd8 +80003fcc: 2740476f jal x14,80008240 +80003fd0: 80003fc0 .word 0x80003fc0 +80003fd4: 80013fea .word 0x80013fea +80003fd8: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0xbda2c175 +80003fdc: 000ba283 lw x5,0(x23) +80003fe0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x608a9059 +80003fe4: 000ba283 lw x5,0(x23) +80003fe8: 004b8b93 addi x23,x23,4 + +80003fec : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b5: + aes32dsi x5, x5, x5, 3 # perform operation +80003fec: ea5282b3 aes32dsi x5,x5,x5,0x3 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b5, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b5_str) +80003ff0: 0008a683 lw x13,0(x17) +80003ff4: 00568863 beq x13,x5,80004004 +80003ff8: 2480476f jal x14,80008240 +80003ffc: 80003fec .word 0x80003fec +80004000: 80014029 .word 0x80014029 +80004004: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x4e4ce327 +80004008: 000ba303 lw x6,0(x23) +8000400c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xc29c5026 +80004010: 000ba303 lw x6,0(x23) +80004014: 004b8b93 addi x23,x23,4 + +80004018 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b6: + aes32dsi x6, x6, x6, 3 # perform operation +80004018: ea630333 aes32dsi x6,x6,x6,0x3 + # Check if x6 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x6, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b6, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b6_str) +8000401c: 0008a683 lw x13,0(x17) +80004020: 00668863 beq x13,x6,80004030 +80004024: 21c0476f jal x14,80008240 +80004028: 80004018 .word 0x80004018 +8000402c: 80014068 .word 0x80014068 +80004030: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xad3d3996 +80004034: 000ba383 lw x7,0(x23) +80004038: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xcce92ab6 +8000403c: 000ba383 lw x7,0(x23) +80004040: 004b8b93 addi x23,x23,4 + +80004044 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b7: + aes32dsi x7, x7, x7, 1 # perform operation +80004044: 6a7383b3 aes32dsi x7,x7,x7,0x1 + # Check if x7 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x7, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b7, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b7_str) +80004048: 0008a683 lw x13,0(x17) +8000404c: 00768863 beq x13,x7,8000405c +80004050: 1f00476f jal x14,80008240 +80004054: 80004044 .word 0x80004044 +80004058: 800140a7 .word 0x800140a7 +8000405c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xeb39c72e +80004060: 000ba403 lw x8,0(x23) +80004064: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xdca44c86 +80004068: 000ba403 lw x8,0(x23) +8000406c: 004b8b93 addi x23,x23,4 + +80004070 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b8: + aes32dsi x8, x8, x8, 0 # perform operation +80004070: 2a840433 aes32dsi x8,x8,x8,0x0 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b8, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b8_str) +80004074: 0008a683 lw x13,0(x17) +80004078: 00868863 beq x13,x8,80004088 +8000407c: 1c40476f jal x14,80008240 +80004080: 80004070 .word 0x80004070 +80004084: 800140e6 .word 0x800140e6 +80004088: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x32bf523e +8000408c: 000ba483 lw x9,0(x23) +80004090: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x6f45ad66 +80004094: 000ba483 lw x9,0(x23) +80004098: 004b8b93 addi x23,x23,4 + +8000409c : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b9: + aes32dsi x9, x9, x9, 3 # perform operation +8000409c: ea9484b3 aes32dsi x9,x9,x9,0x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b9, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b9_str) +800040a0: 0008a683 lw x13,0(x17) +800040a4: 00968863 beq x13,x9,800040b4 +800040a8: 1980476f jal x14,80008240 +800040ac: 8000409c .word 0x8000409c +800040b0: 80014125 .word 0x80014125 +800040b4: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xb7aa290e +800040b8: 000ba503 lw x10,0(x23) +800040bc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xeb0b0388 +800040c0: 000ba503 lw x10,0(x23) +800040c4: 004b8b93 addi x23,x23,4 + +800040c8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b10: + aes32dsi x10, x10, x10, 1 # perform operation +800040c8: 6aa50533 aes32dsi x10,x10,x10,0x1 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b10, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b10_str) +800040cc: 0008a683 lw x13,0(x17) +800040d0: 00a68863 beq x13,x10,800040e0 +800040d4: 16c0476f jal x14,80008240 +800040d8: 800040c8 .word 0x800040c8 +800040dc: 80014164 .word 0x80014164 +800040e0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xdc5e1a8b +800040e4: 000ba583 lw x11,0(x23) +800040e8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x7a7de3a1 +800040ec: 000ba583 lw x11,0(x23) +800040f0: 004b8b93 addi x23,x23,4 + +800040f4 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b11: + aes32dsi x11, x11, x11, 1 # perform operation +800040f4: 6ab585b3 aes32dsi x11,x11,x11,0x1 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b11, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b11_str) +800040f8: 0008a683 lw x13,0(x17) +800040fc: 00b68863 beq x13,x11,8000410c +80004100: 1400476f jal x14,80008240 +80004104: 800040f4 .word 0x800040f4 +80004108: 800141a4 .word 0x800141a4 +8000410c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x482f6ab7 +80004110: 000ba603 lw x12,0(x23) +80004114: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x697355dc +80004118: 000ba603 lw x12,0(x23) +8000411c: 004b8b93 addi x23,x23,4 + +80004120 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b12: + aes32dsi x12, x12, x12, 3 # perform operation +80004120: eac60633 aes32dsi x12,x12,x12,0x3 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b12, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b12_str) +80004124: 0008a683 lw x13,0(x17) +80004128: 00c68863 beq x13,x12,80004138 +8000412c: 1140476f jal x14,80008240 +80004130: 80004120 .word 0x80004120 +80004134: 800141e4 .word 0x800141e4 +80004138: 00488893 addi x17,x17,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000413c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004140: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x40dfa8da +80004144: 000ba683 lw x13,0(x23) +80004148: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x9e168bb9 +8000414c: 000ba683 lw x13,0(x23) +80004150: 004b8b93 addi x23,x23,4 + +80004154 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b13: + aes32dsi x13, x13, x13, 2 # perform operation +80004154: aad686b3 aes32dsi x13,x13,x13,0x2 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b13, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b13_str) +80004158: 0008a383 lw x7,0(x17) +8000415c: 00d38863 beq x7,x13,8000416c +80004160: 0b80446f jal x8,80008218 +80004164: 80004154 .word 0x80004154 +80004168: 80014224 .word 0x80014224 +8000416c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xa1bba7db +80004170: 000ba703 lw x14,0(x23) +80004174: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xf3517757 +80004178: 000ba703 lw x14,0(x23) +8000417c: 004b8b93 addi x23,x23,4 + +80004180 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b14: + aes32dsi x14, x14, x14, 0 # perform operation +80004180: 2ae70733 aes32dsi x14,x14,x14,0x0 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b14, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b14_str) +80004184: 0008a383 lw x7,0(x17) +80004188: 00e38863 beq x7,x14,80004198 +8000418c: 08c0446f jal x8,80008218 +80004190: 80004180 .word 0x80004180 +80004194: 80014264 .word 0x80014264 +80004198: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xaf8d7e53 +8000419c: 000ba783 lw x15,0(x23) +800041a0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x6e3bde90 +800041a4: 000ba783 lw x15,0(x23) +800041a8: 004b8b93 addi x23,x23,4 + +800041ac : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b15: + aes32dsi x15, x15, x15, 0 # perform operation +800041ac: 2af787b3 aes32dsi x15,x15,x15,0x0 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b15, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b15_str) +800041b0: 0008a383 lw x7,0(x17) +800041b4: 00f38863 beq x7,x15,800041c4 +800041b8: 0600446f jal x8,80008218 +800041bc: 800041ac .word 0x800041ac +800041c0: 800142a4 .word 0x800142a4 +800041c4: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xa520b3dd +800041c8: 000ba803 lw x16,0(x23) +800041cc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xa241856b +800041d0: 000ba803 lw x16,0(x23) +800041d4: 004b8b93 addi x23,x23,4 + +800041d8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b16: + aes32dsi x16, x16, x16, 1 # perform operation +800041d8: 6b080833 aes32dsi x16,x16,x16,0x1 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b16, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b16_str) +800041dc: 0008a383 lw x7,0(x17) +800041e0: 01038863 beq x7,x16,800041f0 +800041e4: 0340446f jal x8,80008218 +800041e8: 800041d8 .word 0x800041d8 +800041ec: 800142e4 .word 0x800142e4 +800041f0: 00488893 addi x17,x17,4 + + mv x31, x17 # switch signature pointer register to avoid conflict with test +800041f4: 00088f93 addi x31,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x5c09792b +800041f8: 000ba883 lw x17,0(x23) +800041fc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x4d79fdd6 +80004200: 000ba883 lw x17,0(x23) +80004204: 004b8b93 addi x23,x23,4 + +80004208 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b17: + aes32dsi x17, x17, x17, 2 # perform operation +80004208: ab1888b3 aes32dsi x17,x17,x17,0x2 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b17, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b17_str) +8000420c: 000fa383 lw x7,0(x31) +80004210: 01138863 beq x7,x17,80004220 +80004214: 0040446f jal x8,80008218 +80004218: 80004208 .word 0x80004208 +8000421c: 80014324 .word 0x80014324 +80004220: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xb1d47e48 +80004224: 000ba903 lw x18,0(x23) +80004228: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x502abce5 +8000422c: 000ba903 lw x18,0(x23) +80004230: 004b8b93 addi x23,x23,4 + +80004234 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b18: + aes32dsi x18, x18, x18, 1 # perform operation +80004234: 6b290933 aes32dsi x18,x18,x18,0x1 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b18, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b18_str) +80004238: 000fa383 lw x7,0(x31) +8000423c: 01238863 beq x7,x18,8000424c +80004240: 7d90346f jal x8,80008218 +80004244: 80004234 .word 0x80004234 +80004248: 80014364 .word 0x80014364 +8000424c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x9e97e4bc +80004250: 000ba983 lw x19,0(x23) +80004254: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x9cf7ccc1 +80004258: 000ba983 lw x19,0(x23) +8000425c: 004b8b93 addi x23,x23,4 + +80004260 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b19: + aes32dsi x19, x19, x19, 3 # perform operation +80004260: eb3989b3 aes32dsi x19,x19,x19,0x3 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b19, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b19_str) +80004264: 000fa383 lw x7,0(x31) +80004268: 01338863 beq x7,x19,80004278 +8000426c: 7ad0346f jal x8,80008218 +80004270: 80004260 .word 0x80004260 +80004274: 800143a4 .word 0x800143a4 +80004278: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xb4caf499 +8000427c: 000baa03 lw x20,0(x23) +80004280: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x05afbb36 +80004284: 000baa03 lw x20,0(x23) +80004288: 004b8b93 addi x23,x23,4 + +8000428c : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b20: + aes32dsi x20, x20, x20, 1 # perform operation +8000428c: 6b4a0a33 aes32dsi x20,x20,x20,0x1 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b20, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b20_str) +80004290: 000fa383 lw x7,0(x31) +80004294: 01438863 beq x7,x20,800042a4 +80004298: 7810346f jal x8,80008218 +8000429c: 8000428c .word 0x8000428c +800042a0: 800143e4 .word 0x800143e4 +800042a4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xf066c07a +800042a8: 000baa83 lw x21,0(x23) +800042ac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x246e69f6 +800042b0: 000baa83 lw x21,0(x23) +800042b4: 004b8b93 addi x23,x23,4 + +800042b8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b21: + aes32dsi x21, x21, x21, 2 # perform operation +800042b8: ab5a8ab3 aes32dsi x21,x21,x21,0x2 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b21, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b21_str) +800042bc: 000fa383 lw x7,0(x31) +800042c0: 01538863 beq x7,x21,800042d0 +800042c4: 7550346f jal x8,80008218 +800042c8: 800042b8 .word 0x800042b8 +800042cc: 80014424 .word 0x80014424 +800042d0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xb576e3e0 +800042d4: 000bab03 lw x22,0(x23) +800042d8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xaa1b1ee0 +800042dc: 000bab03 lw x22,0(x23) +800042e0: 004b8b93 addi x23,x23,4 + +800042e4 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b22: + aes32dsi x22, x22, x22, 0 # perform operation +800042e4: 2b6b0b33 aes32dsi x22,x22,x22,0x0 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b22, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b22_str) +800042e8: 000fa383 lw x7,0(x31) +800042ec: 01638863 beq x7,x22,800042fc +800042f0: 7290346f jal x8,80008218 +800042f4: 800042e4 .word 0x800042e4 +800042f8: 80014464 .word 0x80014464 +800042fc: 004f8f93 addi x31,x31,4 + + mv x25, x23 # switch data pointer register to avoid conflict with test +80004300: 000b8c93 addi x25,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x01e48f39 +80004304: 000cab83 lw x23,0(x25) +80004308: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x248cefca +8000430c: 000cab83 lw x23,0(x25) +80004310: 004c8c93 addi x25,x25,4 + +80004314 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b23: + aes32dsi x23, x23, x23, 2 # perform operation +80004314: ab7b8bb3 aes32dsi x23,x23,x23,0x2 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b23, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b23_str) +80004318: 000fa383 lw x7,0(x31) +8000431c: 01738863 beq x7,x23,8000432c +80004320: 6f90346f jal x8,80008218 +80004324: 80004314 .word 0x80004314 +80004328: 800144a4 .word 0x800144a4 +8000432c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x92ec71f4 +80004330: 000cac03 lw x24,0(x25) +80004334: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x93141abc +80004338: 000cac03 lw x24,0(x25) +8000433c: 004c8c93 addi x25,x25,4 + +80004340 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b24: + aes32dsi x24, x24, x24, 3 # perform operation +80004340: eb8c0c33 aes32dsi x24,x24,x24,0x3 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b24, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b24_str) +80004344: 000fa383 lw x7,0(x31) +80004348: 01838863 beq x7,x24,80004358 +8000434c: 6cd0346f jal x8,80008218 +80004350: 80004340 .word 0x80004340 +80004354: 800144e4 .word 0x800144e4 +80004358: 004f8f93 addi x31,x31,4 + + mv x26, x25 # switch data pointer register to avoid conflict with test +8000435c: 000c8d13 addi x26,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x13230440 +80004360: 000d2c83 lw x25,0(x26) +80004364: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x170428da +80004368: 000d2c83 lw x25,0(x26) +8000436c: 004d0d13 addi x26,x26,4 + +80004370 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b25: + aes32dsi x25, x25, x25, 0 # perform operation +80004370: 2b9c8cb3 aes32dsi x25,x25,x25,0x0 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b25, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b25_str) +80004374: 000fa383 lw x7,0(x31) +80004378: 01938863 beq x7,x25,80004388 +8000437c: 69d0346f jal x8,80008218 +80004380: 80004370 .word 0x80004370 +80004384: 80014524 .word 0x80014524 +80004388: 004f8f93 addi x31,x31,4 + + mv x1, x26 # switch data pointer register to avoid conflict with test +8000438c: 000d0093 addi x1,x26,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x05cd7d87 +80004390: 0000ad03 lw x26,0(x1) +80004394: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x064826ce +80004398: 0000ad03 lw x26,0(x1) +8000439c: 00408093 addi x1,x1,4 + +800043a0 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b26: + aes32dsi x26, x26, x26, 3 # perform operation +800043a0: ebad0d33 aes32dsi x26,x26,x26,0x3 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b26, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b26_str) +800043a4: 000fa383 lw x7,0(x31) +800043a8: 01a38863 beq x7,x26,800043b8 +800043ac: 66d0346f jal x8,80008218 +800043b0: 800043a0 .word 0x800043a0 +800043b4: 80014564 .word 0x80014564 +800043b8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xd64cd8ee +800043bc: 0000ad83 lw x27,0(x1) +800043c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x6e752b00 +800043c4: 0000ad83 lw x27,0(x1) +800043c8: 00408093 addi x1,x1,4 + +800043cc : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b27: + aes32dsi x27, x27, x27, 2 # perform operation +800043cc: abbd8db3 aes32dsi x27,x27,x27,0x2 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b27, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b27_str) +800043d0: 000fa383 lw x7,0(x31) +800043d4: 01b38863 beq x7,x27,800043e4 +800043d8: 6410346f jal x8,80008218 +800043dc: 800043cc .word 0x800043cc +800043e0: 800145a4 .word 0x800145a4 +800043e4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5a95a82a +800043e8: 0000ae03 lw x28,0(x1) +800043ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x040d4cbe +800043f0: 0000ae03 lw x28,0(x1) +800043f4: 00408093 addi x1,x1,4 + +800043f8 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b28: + aes32dsi x28, x28, x28, 1 # perform operation +800043f8: 6bce0e33 aes32dsi x28,x28,x28,0x1 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b28, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b28_str) +800043fc: 000fa383 lw x7,0(x31) +80004400: 01c38863 beq x7,x28,80004410 +80004404: 6150346f jal x8,80008218 +80004408: 800043f8 .word 0x800043f8 +8000440c: 800145e4 .word 0x800145e4 +80004410: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x6c12249d +80004414: 0000ae83 lw x29,0(x1) +80004418: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x6ba679c5 +8000441c: 0000ae83 lw x29,0(x1) +80004420: 00408093 addi x1,x1,4 + +80004424 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b29: + aes32dsi x29, x29, x29, 3 # perform operation +80004424: ebde8eb3 aes32dsi x29,x29,x29,0x3 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b29, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b29_str) +80004428: 000fa383 lw x7,0(x31) +8000442c: 01d38863 beq x7,x29,8000443c +80004430: 5e90346f jal x8,80008218 +80004434: 80004424 .word 0x80004424 +80004438: 80014624 .word 0x80014624 +8000443c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xd1771e02 +80004440: 0000af03 lw x30,0(x1) +80004444: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xa4f4d782 +80004448: 0000af03 lw x30,0(x1) +8000444c: 00408093 addi x1,x1,4 + +80004450 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b30: + aes32dsi x30, x30, x30, 1 # perform operation +80004450: 6bef0f33 aes32dsi x30,x30,x30,0x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b30, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b30_str) +80004454: 000fa383 lw x7,0(x31) +80004458: 01e38863 beq x7,x30,80004468 +8000445c: 5bd0346f jal x8,80008218 +80004460: 80004450 .word 0x80004450 +80004464: 80014664 .word 0x80014664 +80004468: 004f8f93 addi x31,x31,4 + + mv x10, x31 # switch signature pointer register to avoid conflict with test +8000446c: 000f8513 addi x10,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x4ee58d67 +80004470: 0000af83 lw x31,0(x1) +80004474: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x674958d6 +80004478: 0000af83 lw x31,0(x1) +8000447c: 00408093 addi x1,x1,4 + +80004480 : +Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b31: + aes32dsi x31, x31, x31, 3 # perform operation +80004480: ebff8fb3 aes32dsi x31,x31,x31,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b31, Zknd_aes32dsi_cg_cmp_rd_rs1_rs2_b31_str) +80004484: 00052383 lw x7,0(x10) +80004488: 01f38863 beq x7,x31,80004498 +8000448c: 58d0346f jal x8,80008218 +80004490: 80004480 .word 0x80004480 +80004494: 800146a4 .word 0x800146a4 +80004498: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xaac90014 +8000449c: 0000a303 lw x6,0(x1) +800044a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5075b1ed +800044a4: 0000a603 lw x12,0(x1) +800044a8: 00408093 addi x1,x1,4 + +800044ac : +Zknd_aes32dsi_cg_cp_bs_b0: + aes32dsi x26, x6, x12, 0 # perform operation +800044ac: 2ac30d33 aes32dsi x26,x6,x12,0x0 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknd_aes32dsi_cg_cp_bs_b0, Zknd_aes32dsi_cg_cp_bs_b0_str) +800044b0: 00052383 lw x7,0(x10) +800044b4: 01a38863 beq x7,x26,800044c4 +800044b8: 5610346f jal x8,80008218 +800044bc: 800044ac .word 0x800044ac +800044c0: 800146e4 .word 0x800146e4 +800044c4: 00450513 addi x10,x10,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xd1bed39b +800044c8: 0000a583 lw x11,0(x1) +800044cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x549f2f7e +800044d0: 0000a603 lw x12,0(x1) +800044d4: 00408093 addi x1,x1,4 + +800044d8 : +Zknd_aes32dsi_cg_cp_bs_b1: + aes32dsi x30, x11, x12, 1 # perform operation +800044d8: 6ac58f33 aes32dsi x30,x11,x12,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_bs_b1, Zknd_aes32dsi_cg_cp_bs_b1_str) +800044dc: 00052383 lw x7,0(x10) +800044e0: 01e38863 beq x7,x30,800044f0 +800044e4: 5350346f jal x8,80008218 +800044e8: 800044d8 .word 0x800044d8 +800044ec: 8001471a .word 0x8001471a +800044f0: 00450513 addi x10,x10,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xad62eff6 +800044f4: 0000ac83 lw x25,0(x1) +800044f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xfa1143a2 +800044fc: 0000a983 lw x19,0(x1) +80004500: 00408093 addi x1,x1,4 + +80004504 : +Zknd_aes32dsi_cg_cp_bs_b2: + aes32dsi x13, x25, x19, 2 # perform operation +80004504: ab3c86b3 aes32dsi x13,x25,x19,0x2 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_bs_b2, Zknd_aes32dsi_cg_cp_bs_b2_str) +80004508: 00052383 lw x7,0(x10) +8000450c: 00d38863 beq x7,x13,8000451c +80004510: 5090346f jal x8,80008218 +80004514: 80004504 .word 0x80004504 +80004518: 80014750 .word 0x80014750 +8000451c: 00450513 addi x10,x10,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xb1ecdd8e +80004520: 0000a483 lw x9,0(x1) +80004524: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x9226e86f +80004528: 0000a803 lw x16,0(x1) +8000452c: 00408093 addi x1,x1,4 + +80004530 : +Zknd_aes32dsi_cg_cp_bs_b3: + aes32dsi x11, x9, x16, 3 # perform operation +80004530: eb0485b3 aes32dsi x11,x9,x16,0x3 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_bs_b3, Zknd_aes32dsi_cg_cp_bs_b3_str) +80004534: 00052383 lw x7,0(x10) +80004538: 00b38863 beq x7,x11,80004548 +8000453c: 4dd0346f jal x8,80008218 +80004540: 80004530 .word 0x80004530 +80004544: 80014786 .word 0x80014786 +80004548: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000000 +8000454c: 0000aa83 lw x21,0(x1) +80004550: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x00000000 +80004554: 0000a103 lw x2,0(x1) +80004558: 00408093 addi x1,x1,4 + +8000455c : +Zknd_aes32dsi_cg_cp_sbox_b0: + aes32dsi x18, x21, x2, 1 # perform operation +8000455c: 6a2a8933 aes32dsi x18,x21,x2,0x1 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b0, Zknd_aes32dsi_cg_cp_sbox_b0_str) +80004560: 00052383 lw x7,0(x10) +80004564: 01238863 beq x7,x18,80004574 +80004568: 4b10346f jal x8,80008218 +8000456c: 8000455c .word 0x8000455c +80004570: 800147bc .word 0x800147bc +80004574: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x01010101 +80004578: 0000a903 lw x18,0(x1) +8000457c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x01010101 +80004580: 0000a983 lw x19,0(x1) +80004584: 00408093 addi x1,x1,4 + +80004588 : +Zknd_aes32dsi_cg_cp_sbox_b1: + aes32dsi x20, x18, x19, 0 # perform operation +80004588: 2b390a33 aes32dsi x20,x18,x19,0x0 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b1, Zknd_aes32dsi_cg_cp_sbox_b1_str) +8000458c: 00052383 lw x7,0(x10) +80004590: 01438863 beq x7,x20,800045a0 +80004594: 4850346f jal x8,80008218 +80004598: 80004588 .word 0x80004588 +8000459c: 800147f4 .word 0x800147f4 +800045a0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x02020202 +800045a4: 0000a483 lw x9,0(x1) +800045a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x02020202 +800045ac: 0000a983 lw x19,0(x1) +800045b0: 00408093 addi x1,x1,4 + +800045b4 : +Zknd_aes32dsi_cg_cp_sbox_b2: + aes32dsi x11, x9, x19, 1 # perform operation +800045b4: 6b3485b3 aes32dsi x11,x9,x19,0x1 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b2, Zknd_aes32dsi_cg_cp_sbox_b2_str) +800045b8: 00052383 lw x7,0(x10) +800045bc: 00b38863 beq x7,x11,800045cc +800045c0: 4590346f jal x8,80008218 +800045c4: 800045b4 .word 0x800045b4 +800045c8: 8001482c .word 0x8001482c +800045cc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x03030303 +800045d0: 0000ac03 lw x24,0(x1) +800045d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x03030303 +800045d8: 0000ad83 lw x27,0(x1) +800045dc: 00408093 addi x1,x1,4 + +800045e0 : +Zknd_aes32dsi_cg_cp_sbox_b3: + aes32dsi x11, x24, x27, 2 # perform operation +800045e0: abbc05b3 aes32dsi x11,x24,x27,0x2 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b3, Zknd_aes32dsi_cg_cp_sbox_b3_str) +800045e4: 00052383 lw x7,0(x10) +800045e8: 00b38863 beq x7,x11,800045f8 +800045ec: 42d0346f jal x8,80008218 +800045f0: 800045e0 .word 0x800045e0 +800045f4: 80014864 .word 0x80014864 +800045f8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x04040404 +800045fc: 0000a483 lw x9,0(x1) +80004600: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x04040404 +80004604: 0000aa03 lw x20,0(x1) +80004608: 00408093 addi x1,x1,4 + +8000460c : +Zknd_aes32dsi_cg_cp_sbox_b4: + aes32dsi x16, x9, x20, 2 # perform operation +8000460c: ab448833 aes32dsi x16,x9,x20,0x2 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b4, Zknd_aes32dsi_cg_cp_sbox_b4_str) +80004610: 00052383 lw x7,0(x10) +80004614: 01038863 beq x7,x16,80004624 +80004618: 4010346f jal x8,80008218 +8000461c: 8000460c .word 0x8000460c +80004620: 8001489c .word 0x8001489c +80004624: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x05050505 +80004628: 0000a783 lw x15,0(x1) +8000462c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x05050505 +80004630: 0000ad03 lw x26,0(x1) +80004634: 00408093 addi x1,x1,4 + +80004638 : +Zknd_aes32dsi_cg_cp_sbox_b5: + aes32dsi x5, x15, x26, 3 # perform operation +80004638: eba782b3 aes32dsi x5,x15,x26,0x3 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b5, Zknd_aes32dsi_cg_cp_sbox_b5_str) +8000463c: 00052383 lw x7,0(x10) +80004640: 00538863 beq x7,x5,80004650 +80004644: 3d50346f jal x8,80008218 +80004648: 80004638 .word 0x80004638 +8000464c: 800148d4 .word 0x800148d4 +80004650: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x06060606 +80004654: 0000a303 lw x6,0(x1) +80004658: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x06060606 +8000465c: 0000aa03 lw x20,0(x1) +80004660: 00408093 addi x1,x1,4 + +80004664 : +Zknd_aes32dsi_cg_cp_sbox_b6: + aes32dsi x12, x6, x20, 3 # perform operation +80004664: eb430633 aes32dsi x12,x6,x20,0x3 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b6, Zknd_aes32dsi_cg_cp_sbox_b6_str) +80004668: 00052383 lw x7,0(x10) +8000466c: 00c38863 beq x7,x12,8000467c +80004670: 3a90346f jal x8,80008218 +80004674: 80004664 .word 0x80004664 +80004678: 8001490c .word 0x8001490c +8000467c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x07070707 +80004680: 0000a303 lw x6,0(x1) +80004684: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x07070707 +80004688: 0000aa83 lw x21,0(x1) +8000468c: 00408093 addi x1,x1,4 + +80004690 : +Zknd_aes32dsi_cg_cp_sbox_b7: + aes32dsi x12, x6, x21, 1 # perform operation +80004690: 6b530633 aes32dsi x12,x6,x21,0x1 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b7, Zknd_aes32dsi_cg_cp_sbox_b7_str) +80004694: 00052383 lw x7,0(x10) +80004698: 00c38863 beq x7,x12,800046a8 +8000469c: 37d0346f jal x8,80008218 +800046a0: 80004690 .word 0x80004690 +800046a4: 80014944 .word 0x80014944 +800046a8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x08080808 +800046ac: 0000a903 lw x18,0(x1) +800046b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x08080808 +800046b4: 0000a803 lw x16,0(x1) +800046b8: 00408093 addi x1,x1,4 + +800046bc : +Zknd_aes32dsi_cg_cp_sbox_b8: + aes32dsi x15, x18, x16, 0 # perform operation +800046bc: 2b0907b3 aes32dsi x15,x18,x16,0x0 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b8, Zknd_aes32dsi_cg_cp_sbox_b8_str) +800046c0: 00052383 lw x7,0(x10) +800046c4: 00f38863 beq x7,x15,800046d4 +800046c8: 3510346f jal x8,80008218 +800046cc: 800046bc .word 0x800046bc +800046d0: 8001497c .word 0x8001497c +800046d4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x09090909 +800046d8: 0000a703 lw x14,0(x1) +800046dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x09090909 +800046e0: 0000a783 lw x15,0(x1) +800046e4: 00408093 addi x1,x1,4 + +800046e8 : +Zknd_aes32dsi_cg_cp_sbox_b9: + aes32dsi x9, x14, x15, 3 # perform operation +800046e8: eaf704b3 aes32dsi x9,x14,x15,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b9, Zknd_aes32dsi_cg_cp_sbox_b9_str) +800046ec: 00052383 lw x7,0(x10) +800046f0: 00938863 beq x7,x9,80004700 +800046f4: 3250346f jal x8,80008218 +800046f8: 800046e8 .word 0x800046e8 +800046fc: 800149b4 .word 0x800149b4 +80004700: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0a0a0a0a +80004704: 0000ae03 lw x28,0(x1) +80004708: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0a0a0a0a +8000470c: 0000a603 lw x12,0(x1) +80004710: 00408093 addi x1,x1,4 + +80004714 : +Zknd_aes32dsi_cg_cp_sbox_b10: + aes32dsi x24, x28, x12, 2 # perform operation +80004714: aace0c33 aes32dsi x24,x28,x12,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b10, Zknd_aes32dsi_cg_cp_sbox_b10_str) +80004718: 00052383 lw x7,0(x10) +8000471c: 01838863 beq x7,x24,8000472c +80004720: 2f90346f jal x8,80008218 +80004724: 80004714 .word 0x80004714 +80004728: 800149ec .word 0x800149ec +8000472c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0b0b0b0b +80004730: 0000aa03 lw x20,0(x1) +80004734: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x0b0b0b0b +80004738: 0000a483 lw x9,0(x1) +8000473c: 00408093 addi x1,x1,4 + +80004740 : +Zknd_aes32dsi_cg_cp_sbox_b11: + aes32dsi x15, x20, x9, 0 # perform operation +80004740: 2a9a07b3 aes32dsi x15,x20,x9,0x0 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b11, Zknd_aes32dsi_cg_cp_sbox_b11_str) +80004744: 00052383 lw x7,0(x10) +80004748: 00f38863 beq x7,x15,80004758 +8000474c: 2cd0346f jal x8,80008218 +80004750: 80004740 .word 0x80004740 +80004754: 80014a25 .word 0x80014a25 +80004758: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x0c0c0c0c +8000475c: 0000a203 lw x4,0(x1) +80004760: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0c0c0c0c +80004764: 0000ae83 lw x29,0(x1) +80004768: 00408093 addi x1,x1,4 + +8000476c : +Zknd_aes32dsi_cg_cp_sbox_b12: + aes32dsi x22, x4, x29, 3 # perform operation +8000476c: ebd20b33 aes32dsi x22,x4,x29,0x3 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b12, Zknd_aes32dsi_cg_cp_sbox_b12_str) +80004770: 00052383 lw x7,0(x10) +80004774: 01638863 beq x7,x22,80004784 +80004778: 2a10346f jal x8,80008218 +8000477c: 8000476c .word 0x8000476c +80004780: 80014a5e .word 0x80014a5e +80004784: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0d0d0d0d +80004788: 0000a983 lw x19,0(x1) +8000478c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x0d0d0d0d +80004790: 0000a203 lw x4,0(x1) +80004794: 00408093 addi x1,x1,4 + +80004798 : +Zknd_aes32dsi_cg_cp_sbox_b13: + aes32dsi x5, x19, x4, 2 # perform operation +80004798: aa4982b3 aes32dsi x5,x19,x4,0x2 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b13, Zknd_aes32dsi_cg_cp_sbox_b13_str) +8000479c: 00052383 lw x7,0(x10) +800047a0: 00538863 beq x7,x5,800047b0 +800047a4: 2750346f jal x8,80008218 +800047a8: 80004798 .word 0x80004798 +800047ac: 80014a97 .word 0x80014a97 +800047b0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0e0e0e0e +800047b4: 0000a483 lw x9,0(x1) +800047b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x0e0e0e0e +800047bc: 0000a983 lw x19,0(x1) +800047c0: 00408093 addi x1,x1,4 + +800047c4 : +Zknd_aes32dsi_cg_cp_sbox_b14: + aes32dsi x11, x9, x19, 2 # perform operation +800047c4: ab3485b3 aes32dsi x11,x9,x19,0x2 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b14, Zknd_aes32dsi_cg_cp_sbox_b14_str) +800047c8: 00052383 lw x7,0(x10) +800047cc: 00b38863 beq x7,x11,800047dc +800047d0: 2490346f jal x8,80008218 +800047d4: 800047c4 .word 0x800047c4 +800047d8: 80014ad0 .word 0x80014ad0 +800047dc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0f0f0f0f +800047e0: 0000a883 lw x17,0(x1) +800047e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x0f0f0f0f +800047e8: 0000a983 lw x19,0(x1) +800047ec: 00408093 addi x1,x1,4 + +800047f0 : +Zknd_aes32dsi_cg_cp_sbox_b15: + aes32dsi x21, x17, x19, 3 # perform operation +800047f0: eb388ab3 aes32dsi x21,x17,x19,0x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b15, Zknd_aes32dsi_cg_cp_sbox_b15_str) +800047f4: 00052383 lw x7,0(x10) +800047f8: 01538863 beq x7,x21,80004808 +800047fc: 21d0346f jal x8,80008218 +80004800: 800047f0 .word 0x800047f0 +80004804: 80014b09 .word 0x80014b09 +80004808: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x10101010 +8000480c: 0000a803 lw x16,0(x1) +80004810: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x10101010 +80004814: 0000a103 lw x2,0(x1) +80004818: 00408093 addi x1,x1,4 + +8000481c : +Zknd_aes32dsi_cg_cp_sbox_b16: + aes32dsi x20, x16, x2, 0 # perform operation +8000481c: 2a280a33 aes32dsi x20,x16,x2,0x0 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b16, Zknd_aes32dsi_cg_cp_sbox_b16_str) +80004820: 00052383 lw x7,0(x10) +80004824: 01438863 beq x7,x20,80004834 +80004828: 1f10346f jal x8,80008218 +8000482c: 8000481c .word 0x8000481c +80004830: 80014b42 .word 0x80014b42 +80004834: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x11111111 +80004838: 0000a483 lw x9,0(x1) +8000483c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x11111111 +80004840: 0000ac83 lw x25,0(x1) +80004844: 00408093 addi x1,x1,4 + +80004848 : +Zknd_aes32dsi_cg_cp_sbox_b17: + aes32dsi x5, x9, x25, 1 # perform operation +80004848: 6b9482b3 aes32dsi x5,x9,x25,0x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b17, Zknd_aes32dsi_cg_cp_sbox_b17_str) +8000484c: 00052383 lw x7,0(x10) +80004850: 00538863 beq x7,x5,80004860 +80004854: 1c50346f jal x8,80008218 +80004858: 80004848 .word 0x80004848 +8000485c: 80014b7b .word 0x80014b7b +80004860: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x12121212 +80004864: 0000ab83 lw x23,0(x1) +80004868: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x12121212 +8000486c: 0000aa83 lw x21,0(x1) +80004870: 00408093 addi x1,x1,4 + +80004874 : +Zknd_aes32dsi_cg_cp_sbox_b18: + aes32dsi x14, x23, x21, 1 # perform operation +80004874: 6b5b8733 aes32dsi x14,x23,x21,0x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b18, Zknd_aes32dsi_cg_cp_sbox_b18_str) +80004878: 00052383 lw x7,0(x10) +8000487c: 00e38863 beq x7,x14,8000488c +80004880: 1990346f jal x8,80008218 +80004884: 80004874 .word 0x80004874 +80004888: 80014bb4 .word 0x80014bb4 +8000488c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x13131313 +80004890: 0000a783 lw x15,0(x1) +80004894: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x13131313 +80004898: 0000aa83 lw x21,0(x1) +8000489c: 00408093 addi x1,x1,4 + +800048a0 : +Zknd_aes32dsi_cg_cp_sbox_b19: + aes32dsi x31, x15, x21, 0 # perform operation +800048a0: 2b578fb3 aes32dsi x31,x15,x21,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b19, Zknd_aes32dsi_cg_cp_sbox_b19_str) +800048a4: 00052383 lw x7,0(x10) +800048a8: 01f38863 beq x7,x31,800048b8 +800048ac: 16d0346f jal x8,80008218 +800048b0: 800048a0 .word 0x800048a0 +800048b4: 80014bed .word 0x80014bed +800048b8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x14141414 +800048bc: 0000a103 lw x2,0(x1) +800048c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x14141414 +800048c4: 0000a483 lw x9,0(x1) +800048c8: 00408093 addi x1,x1,4 + +800048cc : +Zknd_aes32dsi_cg_cp_sbox_b20: + aes32dsi x11, x2, x9, 3 # perform operation +800048cc: ea9105b3 aes32dsi x11,x2,x9,0x3 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b20, Zknd_aes32dsi_cg_cp_sbox_b20_str) +800048d0: 00052383 lw x7,0(x10) +800048d4: 00b38863 beq x7,x11,800048e4 +800048d8: 1410346f jal x8,80008218 +800048dc: 800048cc .word 0x800048cc +800048e0: 80014c26 .word 0x80014c26 +800048e4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x15151515 +800048e8: 0000af03 lw x30,0(x1) +800048ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x15151515 +800048f0: 0000aa83 lw x21,0(x1) +800048f4: 00408093 addi x1,x1,4 + +800048f8 : +Zknd_aes32dsi_cg_cp_sbox_b21: + aes32dsi x24, x30, x21, 1 # perform operation +800048f8: 6b5f0c33 aes32dsi x24,x30,x21,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b21, Zknd_aes32dsi_cg_cp_sbox_b21_str) +800048fc: 00052383 lw x7,0(x10) +80004900: 01838863 beq x7,x24,80004910 +80004904: 1150346f jal x8,80008218 +80004908: 800048f8 .word 0x800048f8 +8000490c: 80014c5f .word 0x80014c5f +80004910: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x16161616 +80004914: 0000a703 lw x14,0(x1) +80004918: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x16161616 +8000491c: 0000a903 lw x18,0(x1) +80004920: 00408093 addi x1,x1,4 + +80004924 : +Zknd_aes32dsi_cg_cp_sbox_b22: + aes32dsi x30, x14, x18, 2 # perform operation +80004924: ab270f33 aes32dsi x30,x14,x18,0x2 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b22, Zknd_aes32dsi_cg_cp_sbox_b22_str) +80004928: 00052383 lw x7,0(x10) +8000492c: 01e38863 beq x7,x30,8000493c +80004930: 0e90346f jal x8,80008218 +80004934: 80004924 .word 0x80004924 +80004938: 80014c98 .word 0x80014c98 +8000493c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x17171717 +80004940: 0000a483 lw x9,0(x1) +80004944: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x17171717 +80004948: 0000a783 lw x15,0(x1) +8000494c: 00408093 addi x1,x1,4 + +80004950 : +Zknd_aes32dsi_cg_cp_sbox_b23: + aes32dsi x28, x9, x15, 2 # perform operation +80004950: aaf48e33 aes32dsi x28,x9,x15,0x2 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cp_sbox_b23, Zknd_aes32dsi_cg_cp_sbox_b23_str) +80004954: 00052383 lw x7,0(x10) +80004958: 01c38863 beq x7,x28,80004968 +8000495c: 0bd0346f jal x8,80008218 +80004960: 80004950 .word 0x80004950 +80004964: 80014cd1 .word 0x80014cd1 +80004968: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x18181818 +8000496c: 0000a883 lw x17,0(x1) +80004970: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x18181818 +80004974: 0000aa03 lw x20,0(x1) +80004978: 00408093 addi x1,x1,4 + +8000497c : +Zknd_aes32dsi_cg_cp_sbox_b24: + aes32dsi x12, x17, x20, 2 # perform operation +8000497c: ab488633 aes32dsi x12,x17,x20,0x2 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b24, Zknd_aes32dsi_cg_cp_sbox_b24_str) +80004980: 00052383 lw x7,0(x10) +80004984: 00c38863 beq x7,x12,80004994 +80004988: 0910346f jal x8,80008218 +8000498c: 8000497c .word 0x8000497c +80004990: 80014d0a .word 0x80014d0a +80004994: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x19191919 +80004998: 0000a283 lw x5,0(x1) +8000499c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x19191919 +800049a0: 0000ad03 lw x26,0(x1) +800049a4: 00408093 addi x1,x1,4 + +800049a8 : +Zknd_aes32dsi_cg_cp_sbox_b25: + aes32dsi x25, x5, x26, 1 # perform operation +800049a8: 6ba28cb3 aes32dsi x25,x5,x26,0x1 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b25, Zknd_aes32dsi_cg_cp_sbox_b25_str) +800049ac: 00052383 lw x7,0(x10) +800049b0: 01938863 beq x7,x25,800049c0 +800049b4: 0650346f jal x8,80008218 +800049b8: 800049a8 .word 0x800049a8 +800049bc: 80014d43 .word 0x80014d43 +800049c0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x1a1a1a1a +800049c4: 0000a183 lw x3,0(x1) +800049c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x1a1a1a1a +800049cc: 0000a803 lw x16,0(x1) +800049d0: 00408093 addi x1,x1,4 + +800049d4 : +Zknd_aes32dsi_cg_cp_sbox_b26: + aes32dsi x5, x3, x16, 3 # perform operation +800049d4: eb0182b3 aes32dsi x5,x3,x16,0x3 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b26, Zknd_aes32dsi_cg_cp_sbox_b26_str) +800049d8: 00052383 lw x7,0(x10) +800049dc: 00538863 beq x7,x5,800049ec +800049e0: 0390346f jal x8,80008218 +800049e4: 800049d4 .word 0x800049d4 +800049e8: 80014d7c .word 0x80014d7c +800049ec: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x1b1b1b1b +800049f0: 0000a783 lw x15,0(x1) +800049f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x1b1b1b1b +800049f8: 0000ab03 lw x22,0(x1) +800049fc: 00408093 addi x1,x1,4 + +80004a00 : +Zknd_aes32dsi_cg_cp_sbox_b27: + aes32dsi x9, x15, x22, 2 # perform operation +80004a00: ab6784b3 aes32dsi x9,x15,x22,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b27, Zknd_aes32dsi_cg_cp_sbox_b27_str) +80004a04: 00052383 lw x7,0(x10) +80004a08: 00938863 beq x7,x9,80004a18 +80004a0c: 00d0346f jal x8,80008218 +80004a10: 80004a00 .word 0x80004a00 +80004a14: 80014db5 .word 0x80014db5 +80004a18: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x1c1c1c1c +80004a1c: 0000ad83 lw x27,0(x1) +80004a20: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x1c1c1c1c +80004a24: 0000ac83 lw x25,0(x1) +80004a28: 00408093 addi x1,x1,4 + +80004a2c : +Zknd_aes32dsi_cg_cp_sbox_b28: + aes32dsi x17, x27, x25, 2 # perform operation +80004a2c: ab9d88b3 aes32dsi x17,x27,x25,0x2 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b28, Zknd_aes32dsi_cg_cp_sbox_b28_str) +80004a30: 00052383 lw x7,0(x10) +80004a34: 01138863 beq x7,x17,80004a44 +80004a38: 7e00346f jal x8,80008218 +80004a3c: 80004a2c .word 0x80004a2c +80004a40: 80014dee .word 0x80014dee +80004a44: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x1d1d1d1d +80004a48: 0000aa83 lw x21,0(x1) +80004a4c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x1d1d1d1d +80004a50: 0000a303 lw x6,0(x1) +80004a54: 00408093 addi x1,x1,4 + +80004a58 : +Zknd_aes32dsi_cg_cp_sbox_b29: + aes32dsi x29, x21, x6, 1 # perform operation +80004a58: 6a6a8eb3 aes32dsi x29,x21,x6,0x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b29, Zknd_aes32dsi_cg_cp_sbox_b29_str) +80004a5c: 00052383 lw x7,0(x10) +80004a60: 01d38863 beq x7,x29,80004a70 +80004a64: 7b40346f jal x8,80008218 +80004a68: 80004a58 .word 0x80004a58 +80004a6c: 80014e27 .word 0x80014e27 +80004a70: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x1e1e1e1e +80004a74: 0000ae83 lw x29,0(x1) +80004a78: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x1e1e1e1e +80004a7c: 0000af83 lw x31,0(x1) +80004a80: 00408093 addi x1,x1,4 + +80004a84 : +Zknd_aes32dsi_cg_cp_sbox_b30: + aes32dsi x21, x29, x31, 1 # perform operation +80004a84: 6bfe8ab3 aes32dsi x21,x29,x31,0x1 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b30, Zknd_aes32dsi_cg_cp_sbox_b30_str) +80004a88: 00052383 lw x7,0(x10) +80004a8c: 01538863 beq x7,x21,80004a9c +80004a90: 7880346f jal x8,80008218 +80004a94: 80004a84 .word 0x80004a84 +80004a98: 80014e60 .word 0x80014e60 +80004a9c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x1f1f1f1f +80004aa0: 0000a883 lw x17,0(x1) +80004aa4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x1f1f1f1f +80004aa8: 0000a183 lw x3,0(x1) +80004aac: 00408093 addi x1,x1,4 + +80004ab0 : +Zknd_aes32dsi_cg_cp_sbox_b31: + aes32dsi x21, x17, x3, 3 # perform operation +80004ab0: ea388ab3 aes32dsi x21,x17,x3,0x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b31, Zknd_aes32dsi_cg_cp_sbox_b31_str) +80004ab4: 00052383 lw x7,0(x10) +80004ab8: 01538863 beq x7,x21,80004ac8 +80004abc: 75c0346f jal x8,80008218 +80004ac0: 80004ab0 .word 0x80004ab0 +80004ac4: 80014e99 .word 0x80014e99 +80004ac8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x20202020 +80004acc: 0000aa03 lw x20,0(x1) +80004ad0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x20202020 +80004ad4: 0000a283 lw x5,0(x1) +80004ad8: 00408093 addi x1,x1,4 + +80004adc : +Zknd_aes32dsi_cg_cp_sbox_b32: + aes32dsi x11, x20, x5, 0 # perform operation +80004adc: 2a5a05b3 aes32dsi x11,x20,x5,0x0 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b32, Zknd_aes32dsi_cg_cp_sbox_b32_str) +80004ae0: 00052383 lw x7,0(x10) +80004ae4: 00b38863 beq x7,x11,80004af4 +80004ae8: 7300346f jal x8,80008218 +80004aec: 80004adc .word 0x80004adc +80004af0: 80014ed2 .word 0x80014ed2 +80004af4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x21212121 +80004af8: 0000a883 lw x17,0(x1) +80004afc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x21212121 +80004b00: 0000a683 lw x13,0(x1) +80004b04: 00408093 addi x1,x1,4 + +80004b08 : +Zknd_aes32dsi_cg_cp_sbox_b33: + aes32dsi x31, x17, x13, 1 # perform operation +80004b08: 6ad88fb3 aes32dsi x31,x17,x13,0x1 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b33, Zknd_aes32dsi_cg_cp_sbox_b33_str) +80004b0c: 00052383 lw x7,0(x10) +80004b10: 01f38863 beq x7,x31,80004b20 +80004b14: 7040346f jal x8,80008218 +80004b18: 80004b08 .word 0x80004b08 +80004b1c: 80014f0b .word 0x80014f0b +80004b20: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x22222222 +80004b24: 0000a303 lw x6,0(x1) +80004b28: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x22222222 +80004b2c: 0000a683 lw x13,0(x1) +80004b30: 00408093 addi x1,x1,4 + +80004b34 : +Zknd_aes32dsi_cg_cp_sbox_b34: + aes32dsi x16, x6, x13, 0 # perform operation +80004b34: 2ad30833 aes32dsi x16,x6,x13,0x0 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b34, Zknd_aes32dsi_cg_cp_sbox_b34_str) +80004b38: 00052383 lw x7,0(x10) +80004b3c: 01038863 beq x7,x16,80004b4c +80004b40: 6d80346f jal x8,80008218 +80004b44: 80004b34 .word 0x80004b34 +80004b48: 80014f44 .word 0x80014f44 +80004b4c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x23232323 +80004b50: 0000a903 lw x18,0(x1) +80004b54: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x23232323 +80004b58: 0000aa03 lw x20,0(x1) +80004b5c: 00408093 addi x1,x1,4 + +80004b60 : +Zknd_aes32dsi_cg_cp_sbox_b35: + aes32dsi x21, x18, x20, 1 # perform operation +80004b60: 6b490ab3 aes32dsi x21,x18,x20,0x1 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b35, Zknd_aes32dsi_cg_cp_sbox_b35_str) +80004b64: 00052383 lw x7,0(x10) +80004b68: 01538863 beq x7,x21,80004b78 +80004b6c: 6ac0346f jal x8,80008218 +80004b70: 80004b60 .word 0x80004b60 +80004b74: 80014f7d .word 0x80014f7d +80004b78: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x24242424 +80004b7c: 0000a903 lw x18,0(x1) +80004b80: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x24242424 +80004b84: 0000a803 lw x16,0(x1) +80004b88: 00408093 addi x1,x1,4 + +80004b8c : +Zknd_aes32dsi_cg_cp_sbox_b36: + aes32dsi x9, x18, x16, 3 # perform operation +80004b8c: eb0904b3 aes32dsi x9,x18,x16,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b36, Zknd_aes32dsi_cg_cp_sbox_b36_str) +80004b90: 00052383 lw x7,0(x10) +80004b94: 00938863 beq x7,x9,80004ba4 +80004b98: 6800346f jal x8,80008218 +80004b9c: 80004b8c .word 0x80004b8c +80004ba0: 80014fb6 .word 0x80014fb6 +80004ba4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x25252525 +80004ba8: 0000a983 lw x19,0(x1) +80004bac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x25252525 +80004bb0: 0000ad03 lw x26,0(x1) +80004bb4: 00408093 addi x1,x1,4 + +80004bb8 : +Zknd_aes32dsi_cg_cp_sbox_b37: + aes32dsi x24, x19, x26, 1 # perform operation +80004bb8: 6ba98c33 aes32dsi x24,x19,x26,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b37, Zknd_aes32dsi_cg_cp_sbox_b37_str) +80004bbc: 00052383 lw x7,0(x10) +80004bc0: 01838863 beq x7,x24,80004bd0 +80004bc4: 6540346f jal x8,80008218 +80004bc8: 80004bb8 .word 0x80004bb8 +80004bcc: 80014fef .word 0x80014fef +80004bd0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x26262626 +80004bd4: 0000a103 lw x2,0(x1) +80004bd8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x26262626 +80004bdc: 0000ab03 lw x22,0(x1) +80004be0: 00408093 addi x1,x1,4 + +80004be4 : +Zknd_aes32dsi_cg_cp_sbox_b38: + aes32dsi x24, x2, x22, 1 # perform operation +80004be4: 6b610c33 aes32dsi x24,x2,x22,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b38, Zknd_aes32dsi_cg_cp_sbox_b38_str) +80004be8: 00052383 lw x7,0(x10) +80004bec: 01838863 beq x7,x24,80004bfc +80004bf0: 6280346f jal x8,80008218 +80004bf4: 80004be4 .word 0x80004be4 +80004bf8: 80015028 .word 0x80015028 +80004bfc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x27272727 +80004c00: 0000a483 lw x9,0(x1) +80004c04: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x27272727 +80004c08: 0000ae03 lw x28,0(x1) +80004c0c: 00408093 addi x1,x1,4 + +80004c10 : +Zknd_aes32dsi_cg_cp_sbox_b39: + aes32dsi x16, x9, x28, 1 # perform operation +80004c10: 6bc48833 aes32dsi x16,x9,x28,0x1 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b39, Zknd_aes32dsi_cg_cp_sbox_b39_str) +80004c14: 00052383 lw x7,0(x10) +80004c18: 01038863 beq x7,x16,80004c28 +80004c1c: 5fc0346f jal x8,80008218 +80004c20: 80004c10 .word 0x80004c10 +80004c24: 80015061 .word 0x80015061 +80004c28: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x28282828 +80004c2c: 0000a983 lw x19,0(x1) +80004c30: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x28282828 +80004c34: 0000ad83 lw x27,0(x1) +80004c38: 00408093 addi x1,x1,4 + +80004c3c : +Zknd_aes32dsi_cg_cp_sbox_b40: + aes32dsi x12, x19, x27, 1 # perform operation +80004c3c: 6bb98633 aes32dsi x12,x19,x27,0x1 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b40, Zknd_aes32dsi_cg_cp_sbox_b40_str) +80004c40: 00052383 lw x7,0(x10) +80004c44: 00c38863 beq x7,x12,80004c54 +80004c48: 5d00346f jal x8,80008218 +80004c4c: 80004c3c .word 0x80004c3c +80004c50: 8001509a .word 0x8001509a +80004c54: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x29292929 +80004c58: 0000a183 lw x3,0(x1) +80004c5c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x29292929 +80004c60: 0000a683 lw x13,0(x1) +80004c64: 00408093 addi x1,x1,4 + +80004c68 : +Zknd_aes32dsi_cg_cp_sbox_b41: + aes32dsi x29, x3, x13, 1 # perform operation +80004c68: 6ad18eb3 aes32dsi x29,x3,x13,0x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b41, Zknd_aes32dsi_cg_cp_sbox_b41_str) +80004c6c: 00052383 lw x7,0(x10) +80004c70: 01d38863 beq x7,x29,80004c80 +80004c74: 5a40346f jal x8,80008218 +80004c78: 80004c68 .word 0x80004c68 +80004c7c: 800150d3 .word 0x800150d3 +80004c80: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x2a2a2a2a +80004c84: 0000a583 lw x11,0(x1) +80004c88: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x2a2a2a2a +80004c8c: 0000a303 lw x6,0(x1) +80004c90: 00408093 addi x1,x1,4 + +80004c94 : +Zknd_aes32dsi_cg_cp_sbox_b42: + aes32dsi x2, x11, x6, 2 # perform operation +80004c94: aa658133 aes32dsi x2,x11,x6,0x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b42, Zknd_aes32dsi_cg_cp_sbox_b42_str) +80004c98: 00052383 lw x7,0(x10) +80004c9c: 00238863 beq x7,x2,80004cac +80004ca0: 5780346f jal x8,80008218 +80004ca4: 80004c94 .word 0x80004c94 +80004ca8: 8001510c .word 0x8001510c +80004cac: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x2b2b2b2b +80004cb0: 0000a303 lw x6,0(x1) +80004cb4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x2b2b2b2b +80004cb8: 0000a483 lw x9,0(x1) +80004cbc: 00408093 addi x1,x1,4 + +80004cc0 : +Zknd_aes32dsi_cg_cp_sbox_b43: + aes32dsi x31, x6, x9, 0 # perform operation +80004cc0: 2a930fb3 aes32dsi x31,x6,x9,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b43, Zknd_aes32dsi_cg_cp_sbox_b43_str) +80004cc4: 00052383 lw x7,0(x10) +80004cc8: 01f38863 beq x7,x31,80004cd8 +80004ccc: 54c0346f jal x8,80008218 +80004cd0: 80004cc0 .word 0x80004cc0 +80004cd4: 80015145 .word 0x80015145 +80004cd8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x2c2c2c2c +80004cdc: 0000ac83 lw x25,0(x1) +80004ce0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x2c2c2c2c +80004ce4: 0000a203 lw x4,0(x1) +80004ce8: 00408093 addi x1,x1,4 + +80004cec : +Zknd_aes32dsi_cg_cp_sbox_b44: + aes32dsi x31, x25, x4, 3 # perform operation +80004cec: ea4c8fb3 aes32dsi x31,x25,x4,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b44, Zknd_aes32dsi_cg_cp_sbox_b44_str) +80004cf0: 00052383 lw x7,0(x10) +80004cf4: 01f38863 beq x7,x31,80004d04 +80004cf8: 5200346f jal x8,80008218 +80004cfc: 80004cec .word 0x80004cec +80004d00: 8001517e .word 0x8001517e +80004d04: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x2d2d2d2d +80004d08: 0000a283 lw x5,0(x1) +80004d0c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x2d2d2d2d +80004d10: 0000ac83 lw x25,0(x1) +80004d14: 00408093 addi x1,x1,4 + +80004d18 : +Zknd_aes32dsi_cg_cp_sbox_b45: + aes32dsi x18, x5, x25, 0 # perform operation +80004d18: 2b928933 aes32dsi x18,x5,x25,0x0 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b45, Zknd_aes32dsi_cg_cp_sbox_b45_str) +80004d1c: 00052383 lw x7,0(x10) +80004d20: 01238863 beq x7,x18,80004d30 +80004d24: 4f40346f jal x8,80008218 +80004d28: 80004d18 .word 0x80004d18 +80004d2c: 800151b7 .word 0x800151b7 +80004d30: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x2e2e2e2e +80004d34: 0000ab83 lw x23,0(x1) +80004d38: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x2e2e2e2e +80004d3c: 0000a583 lw x11,0(x1) +80004d40: 00408093 addi x1,x1,4 + +80004d44 : +Zknd_aes32dsi_cg_cp_sbox_b46: + aes32dsi x12, x23, x11, 0 # perform operation +80004d44: 2abb8633 aes32dsi x12,x23,x11,0x0 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b46, Zknd_aes32dsi_cg_cp_sbox_b46_str) +80004d48: 00052383 lw x7,0(x10) +80004d4c: 00c38863 beq x7,x12,80004d5c +80004d50: 4c80346f jal x8,80008218 +80004d54: 80004d44 .word 0x80004d44 +80004d58: 800151f0 .word 0x800151f0 +80004d5c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x2f2f2f2f +80004d60: 0000a603 lw x12,0(x1) +80004d64: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x2f2f2f2f +80004d68: 0000ae03 lw x28,0(x1) +80004d6c: 00408093 addi x1,x1,4 + +80004d70 : +Zknd_aes32dsi_cg_cp_sbox_b47: + aes32dsi x2, x12, x28, 3 # perform operation +80004d70: ebc60133 aes32dsi x2,x12,x28,0x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b47, Zknd_aes32dsi_cg_cp_sbox_b47_str) +80004d74: 00052383 lw x7,0(x10) +80004d78: 00238863 beq x7,x2,80004d88 +80004d7c: 49c0346f jal x8,80008218 +80004d80: 80004d70 .word 0x80004d70 +80004d84: 80015229 .word 0x80015229 +80004d88: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x30303030 +80004d8c: 0000a183 lw x3,0(x1) +80004d90: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x30303030 +80004d94: 0000af83 lw x31,0(x1) +80004d98: 00408093 addi x1,x1,4 + +80004d9c : +Zknd_aes32dsi_cg_cp_sbox_b48: + aes32dsi x22, x3, x31, 3 # perform operation +80004d9c: ebf18b33 aes32dsi x22,x3,x31,0x3 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b48, Zknd_aes32dsi_cg_cp_sbox_b48_str) +80004da0: 00052383 lw x7,0(x10) +80004da4: 01638863 beq x7,x22,80004db4 +80004da8: 4700346f jal x8,80008218 +80004dac: 80004d9c .word 0x80004d9c +80004db0: 80015262 .word 0x80015262 +80004db4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x31313131 +80004db8: 0000af83 lw x31,0(x1) +80004dbc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x31313131 +80004dc0: 0000ae83 lw x29,0(x1) +80004dc4: 00408093 addi x1,x1,4 + +80004dc8 : +Zknd_aes32dsi_cg_cp_sbox_b49: + aes32dsi x21, x31, x29, 0 # perform operation +80004dc8: 2bdf8ab3 aes32dsi x21,x31,x29,0x0 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b49, Zknd_aes32dsi_cg_cp_sbox_b49_str) +80004dcc: 00052383 lw x7,0(x10) +80004dd0: 01538863 beq x7,x21,80004de0 +80004dd4: 4440346f jal x8,80008218 +80004dd8: 80004dc8 .word 0x80004dc8 +80004ddc: 8001529b .word 0x8001529b +80004de0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x32323232 +80004de4: 0000ad03 lw x26,0(x1) +80004de8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x32323232 +80004dec: 0000ad83 lw x27,0(x1) +80004df0: 00408093 addi x1,x1,4 + +80004df4 : +Zknd_aes32dsi_cg_cp_sbox_b50: + aes32dsi x24, x26, x27, 1 # perform operation +80004df4: 6bbd0c33 aes32dsi x24,x26,x27,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b50, Zknd_aes32dsi_cg_cp_sbox_b50_str) +80004df8: 00052383 lw x7,0(x10) +80004dfc: 01838863 beq x7,x24,80004e0c +80004e00: 4180346f jal x8,80008218 +80004e04: 80004df4 .word 0x80004df4 +80004e08: 800152d4 .word 0x800152d4 +80004e0c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x33333333 +80004e10: 0000a903 lw x18,0(x1) +80004e14: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x33333333 +80004e18: 0000a983 lw x19,0(x1) +80004e1c: 00408093 addi x1,x1,4 + +80004e20 : +Zknd_aes32dsi_cg_cp_sbox_b51: + aes32dsi x5, x18, x19, 0 # perform operation +80004e20: 2b3902b3 aes32dsi x5,x18,x19,0x0 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b51, Zknd_aes32dsi_cg_cp_sbox_b51_str) +80004e24: 00052383 lw x7,0(x10) +80004e28: 00538863 beq x7,x5,80004e38 +80004e2c: 3ec0346f jal x8,80008218 +80004e30: 80004e20 .word 0x80004e20 +80004e34: 8001530d .word 0x8001530d +80004e38: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x34343434 +80004e3c: 0000a483 lw x9,0(x1) +80004e40: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x34343434 +80004e44: 0000a103 lw x2,0(x1) +80004e48: 00408093 addi x1,x1,4 + +80004e4c : +Zknd_aes32dsi_cg_cp_sbox_b52: + aes32dsi x24, x9, x2, 3 # perform operation +80004e4c: ea248c33 aes32dsi x24,x9,x2,0x3 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b52, Zknd_aes32dsi_cg_cp_sbox_b52_str) +80004e50: 00052383 lw x7,0(x10) +80004e54: 01838863 beq x7,x24,80004e64 +80004e58: 3c00346f jal x8,80008218 +80004e5c: 80004e4c .word 0x80004e4c +80004e60: 80015346 .word 0x80015346 +80004e64: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x35353535 +80004e68: 0000a103 lw x2,0(x1) +80004e6c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x35353535 +80004e70: 0000a283 lw x5,0(x1) +80004e74: 00408093 addi x1,x1,4 + +80004e78 : +Zknd_aes32dsi_cg_cp_sbox_b53: + aes32dsi x27, x2, x5, 0 # perform operation +80004e78: 2a510db3 aes32dsi x27,x2,x5,0x0 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b53, Zknd_aes32dsi_cg_cp_sbox_b53_str) +80004e7c: 00052383 lw x7,0(x10) +80004e80: 01b38863 beq x7,x27,80004e90 +80004e84: 3940346f jal x8,80008218 +80004e88: 80004e78 .word 0x80004e78 +80004e8c: 8001537f .word 0x8001537f +80004e90: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x36363636 +80004e94: 0000ae83 lw x29,0(x1) +80004e98: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x36363636 +80004e9c: 0000ad83 lw x27,0(x1) +80004ea0: 00408093 addi x1,x1,4 + +80004ea4 : +Zknd_aes32dsi_cg_cp_sbox_b54: + aes32dsi x15, x29, x27, 0 # perform operation +80004ea4: 2bbe87b3 aes32dsi x15,x29,x27,0x0 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b54, Zknd_aes32dsi_cg_cp_sbox_b54_str) +80004ea8: 00052383 lw x7,0(x10) +80004eac: 00f38863 beq x7,x15,80004ebc +80004eb0: 3680346f jal x8,80008218 +80004eb4: 80004ea4 .word 0x80004ea4 +80004eb8: 800153b8 .word 0x800153b8 +80004ebc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x37373737 +80004ec0: 0000ac83 lw x25,0(x1) +80004ec4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x37373737 +80004ec8: 0000ab03 lw x22,0(x1) +80004ecc: 00408093 addi x1,x1,4 + +80004ed0 : +Zknd_aes32dsi_cg_cp_sbox_b55: + aes32dsi x2, x25, x22, 0 # perform operation +80004ed0: 2b6c8133 aes32dsi x2,x25,x22,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b55, Zknd_aes32dsi_cg_cp_sbox_b55_str) +80004ed4: 00052383 lw x7,0(x10) +80004ed8: 00238863 beq x7,x2,80004ee8 +80004edc: 33c0346f jal x8,80008218 +80004ee0: 80004ed0 .word 0x80004ed0 +80004ee4: 800153f1 .word 0x800153f1 +80004ee8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x38383838 +80004eec: 0000a183 lw x3,0(x1) +80004ef0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x38383838 +80004ef4: 0000a583 lw x11,0(x1) +80004ef8: 00408093 addi x1,x1,4 + +80004efc : +Zknd_aes32dsi_cg_cp_sbox_b56: + aes32dsi x17, x3, x11, 3 # perform operation +80004efc: eab188b3 aes32dsi x17,x3,x11,0x3 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b56, Zknd_aes32dsi_cg_cp_sbox_b56_str) +80004f00: 00052383 lw x7,0(x10) +80004f04: 01138863 beq x7,x17,80004f14 +80004f08: 3100346f jal x8,80008218 +80004f0c: 80004efc .word 0x80004efc +80004f10: 8001542a .word 0x8001542a +80004f14: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x39393939 +80004f18: 0000aa83 lw x21,0(x1) +80004f1c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x39393939 +80004f20: 0000a803 lw x16,0(x1) +80004f24: 00408093 addi x1,x1,4 + +80004f28 : +Zknd_aes32dsi_cg_cp_sbox_b57: + aes32dsi x14, x21, x16, 2 # perform operation +80004f28: ab0a8733 aes32dsi x14,x21,x16,0x2 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b57, Zknd_aes32dsi_cg_cp_sbox_b57_str) +80004f2c: 00052383 lw x7,0(x10) +80004f30: 00e38863 beq x7,x14,80004f40 +80004f34: 2e40346f jal x8,80008218 +80004f38: 80004f28 .word 0x80004f28 +80004f3c: 80015463 .word 0x80015463 +80004f40: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x3a3a3a3a +80004f44: 0000ad83 lw x27,0(x1) +80004f48: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x3a3a3a3a +80004f4c: 0000a183 lw x3,0(x1) +80004f50: 00408093 addi x1,x1,4 + +80004f54 : +Zknd_aes32dsi_cg_cp_sbox_b58: + aes32dsi x12, x27, x3, 3 # perform operation +80004f54: ea3d8633 aes32dsi x12,x27,x3,0x3 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b58, Zknd_aes32dsi_cg_cp_sbox_b58_str) +80004f58: 00052383 lw x7,0(x10) +80004f5c: 00c38863 beq x7,x12,80004f6c +80004f60: 2b80346f jal x8,80008218 +80004f64: 80004f54 .word 0x80004f54 +80004f68: 8001549c .word 0x8001549c +80004f6c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x3b3b3b3b +80004f70: 0000a903 lw x18,0(x1) +80004f74: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x3b3b3b3b +80004f78: 0000ab83 lw x23,0(x1) +80004f7c: 00408093 addi x1,x1,4 + +80004f80 : +Zknd_aes32dsi_cg_cp_sbox_b59: + aes32dsi x31, x18, x23, 3 # perform operation +80004f80: eb790fb3 aes32dsi x31,x18,x23,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b59, Zknd_aes32dsi_cg_cp_sbox_b59_str) +80004f84: 00052383 lw x7,0(x10) +80004f88: 01f38863 beq x7,x31,80004f98 +80004f8c: 28c0346f jal x8,80008218 +80004f90: 80004f80 .word 0x80004f80 +80004f94: 800154d5 .word 0x800154d5 +80004f98: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x3c3c3c3c +80004f9c: 0000a783 lw x15,0(x1) +80004fa0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x3c3c3c3c +80004fa4: 0000af03 lw x30,0(x1) +80004fa8: 00408093 addi x1,x1,4 + +80004fac : +Zknd_aes32dsi_cg_cp_sbox_b60: + aes32dsi x9, x15, x30, 2 # perform operation +80004fac: abe784b3 aes32dsi x9,x15,x30,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b60, Zknd_aes32dsi_cg_cp_sbox_b60_str) +80004fb0: 00052383 lw x7,0(x10) +80004fb4: 00938863 beq x7,x9,80004fc4 +80004fb8: 2600346f jal x8,80008218 +80004fbc: 80004fac .word 0x80004fac +80004fc0: 8001550e .word 0x8001550e +80004fc4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x3d3d3d3d +80004fc8: 0000a303 lw x6,0(x1) +80004fcc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x3d3d3d3d +80004fd0: 0000a483 lw x9,0(x1) +80004fd4: 00408093 addi x1,x1,4 + +80004fd8 : +Zknd_aes32dsi_cg_cp_sbox_b61: + aes32dsi x22, x6, x9, 2 # perform operation +80004fd8: aa930b33 aes32dsi x22,x6,x9,0x2 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b61, Zknd_aes32dsi_cg_cp_sbox_b61_str) +80004fdc: 00052383 lw x7,0(x10) +80004fe0: 01638863 beq x7,x22,80004ff0 +80004fe4: 2340346f jal x8,80008218 +80004fe8: 80004fd8 .word 0x80004fd8 +80004fec: 80015547 .word 0x80015547 +80004ff0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x3e3e3e3e +80004ff4: 0000a783 lw x15,0(x1) +80004ff8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x3e3e3e3e +80004ffc: 0000ae83 lw x29,0(x1) +80005000: 00408093 addi x1,x1,4 + +80005004 : +Zknd_aes32dsi_cg_cp_sbox_b62: + aes32dsi x30, x15, x29, 0 # perform operation +80005004: 2bd78f33 aes32dsi x30,x15,x29,0x0 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b62, Zknd_aes32dsi_cg_cp_sbox_b62_str) +80005008: 00052383 lw x7,0(x10) +8000500c: 01e38863 beq x7,x30,8000501c +80005010: 2080346f jal x8,80008218 +80005014: 80005004 .word 0x80005004 +80005018: 80015580 .word 0x80015580 +8000501c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x3f3f3f3f +80005020: 0000a283 lw x5,0(x1) +80005024: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x3f3f3f3f +80005028: 0000a483 lw x9,0(x1) +8000502c: 00408093 addi x1,x1,4 + +80005030 : +Zknd_aes32dsi_cg_cp_sbox_b63: + aes32dsi x13, x5, x9, 1 # perform operation +80005030: 6a9286b3 aes32dsi x13,x5,x9,0x1 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b63, Zknd_aes32dsi_cg_cp_sbox_b63_str) +80005034: 00052383 lw x7,0(x10) +80005038: 00d38863 beq x7,x13,80005048 +8000503c: 1dc0346f jal x8,80008218 +80005040: 80005030 .word 0x80005030 +80005044: 800155b9 .word 0x800155b9 +80005048: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x40404040 +8000504c: 0000aa03 lw x20,0(x1) +80005050: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x40404040 +80005054: 0000a103 lw x2,0(x1) +80005058: 00408093 addi x1,x1,4 + +8000505c : +Zknd_aes32dsi_cg_cp_sbox_b64: + aes32dsi x30, x20, x2, 2 # perform operation +8000505c: aa2a0f33 aes32dsi x30,x20,x2,0x2 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b64, Zknd_aes32dsi_cg_cp_sbox_b64_str) +80005060: 00052383 lw x7,0(x10) +80005064: 01e38863 beq x7,x30,80005074 +80005068: 1b00346f jal x8,80008218 +8000506c: 8000505c .word 0x8000505c +80005070: 800155f2 .word 0x800155f2 +80005074: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x41414141 +80005078: 0000a283 lw x5,0(x1) +8000507c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x41414141 +80005080: 0000ae83 lw x29,0(x1) +80005084: 00408093 addi x1,x1,4 + +80005088 : +Zknd_aes32dsi_cg_cp_sbox_b65: + aes32dsi x6, x5, x29, 3 # perform operation +80005088: ebd28333 aes32dsi x6,x5,x29,0x3 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b65, Zknd_aes32dsi_cg_cp_sbox_b65_str) +8000508c: 00052383 lw x7,0(x10) +80005090: 00638863 beq x7,x6,800050a0 +80005094: 1840346f jal x8,80008218 +80005098: 80005088 .word 0x80005088 +8000509c: 8001562b .word 0x8001562b +800050a0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x42424242 +800050a4: 0000a183 lw x3,0(x1) +800050a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x42424242 +800050ac: 0000a683 lw x13,0(x1) +800050b0: 00408093 addi x1,x1,4 + +800050b4 : +Zknd_aes32dsi_cg_cp_sbox_b66: + aes32dsi x26, x3, x13, 3 # perform operation +800050b4: ead18d33 aes32dsi x26,x3,x13,0x3 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknd_aes32dsi_cg_cp_sbox_b66, Zknd_aes32dsi_cg_cp_sbox_b66_str) +800050b8: 00052383 lw x7,0(x10) +800050bc: 01a38863 beq x7,x26,800050cc +800050c0: 1580346f jal x8,80008218 +800050c4: 800050b4 .word 0x800050b4 +800050c8: 80015664 .word 0x80015664 +800050cc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x43434343 +800050d0: 0000a303 lw x6,0(x1) +800050d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x43434343 +800050d8: 0000a703 lw x14,0(x1) +800050dc: 00408093 addi x1,x1,4 + +800050e0 : +Zknd_aes32dsi_cg_cp_sbox_b67: + aes32dsi x17, x6, x14, 2 # perform operation +800050e0: aae308b3 aes32dsi x17,x6,x14,0x2 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b67, Zknd_aes32dsi_cg_cp_sbox_b67_str) +800050e4: 00052383 lw x7,0(x10) +800050e8: 01138863 beq x7,x17,800050f8 +800050ec: 12c0346f jal x8,80008218 +800050f0: 800050e0 .word 0x800050e0 +800050f4: 8001569d .word 0x8001569d +800050f8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x44444444 +800050fc: 0000a303 lw x6,0(x1) +80005100: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x44444444 +80005104: 0000a783 lw x15,0(x1) +80005108: 00408093 addi x1,x1,4 + +8000510c : +Zknd_aes32dsi_cg_cp_sbox_b68: + aes32dsi x31, x6, x15, 0 # perform operation +8000510c: 2af30fb3 aes32dsi x31,x6,x15,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b68, Zknd_aes32dsi_cg_cp_sbox_b68_str) +80005110: 00052383 lw x7,0(x10) +80005114: 01f38863 beq x7,x31,80005124 +80005118: 1000346f jal x8,80008218 +8000511c: 8000510c .word 0x8000510c +80005120: 800156d6 .word 0x800156d6 +80005124: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x45454545 +80005128: 0000a703 lw x14,0(x1) +8000512c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x45454545 +80005130: 0000a883 lw x17,0(x1) +80005134: 00408093 addi x1,x1,4 + +80005138 : +Zknd_aes32dsi_cg_cp_sbox_b69: + aes32dsi x9, x14, x17, 3 # perform operation +80005138: eb1704b3 aes32dsi x9,x14,x17,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b69, Zknd_aes32dsi_cg_cp_sbox_b69_str) +8000513c: 00052383 lw x7,0(x10) +80005140: 00938863 beq x7,x9,80005150 +80005144: 0d40346f jal x8,80008218 +80005148: 80005138 .word 0x80005138 +8000514c: 8001570f .word 0x8001570f +80005150: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x46464646 +80005154: 0000ac03 lw x24,0(x1) +80005158: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x46464646 +8000515c: 0000a583 lw x11,0(x1) +80005160: 00408093 addi x1,x1,4 + +80005164 : +Zknd_aes32dsi_cg_cp_sbox_b70: + aes32dsi x4, x24, x11, 1 # perform operation +80005164: 6abc0233 aes32dsi x4,x24,x11,0x1 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cp_sbox_b70, Zknd_aes32dsi_cg_cp_sbox_b70_str) +80005168: 00052383 lw x7,0(x10) +8000516c: 00438863 beq x7,x4,8000517c +80005170: 0a80346f jal x8,80008218 +80005174: 80005164 .word 0x80005164 +80005178: 80015748 .word 0x80015748 +8000517c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x47474747 +80005180: 0000a683 lw x13,0(x1) +80005184: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x47474747 +80005188: 0000a783 lw x15,0(x1) +8000518c: 00408093 addi x1,x1,4 + +80005190 : +Zknd_aes32dsi_cg_cp_sbox_b71: + aes32dsi x14, x13, x15, 0 # perform operation +80005190: 2af68733 aes32dsi x14,x13,x15,0x0 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b71, Zknd_aes32dsi_cg_cp_sbox_b71_str) +80005194: 00052383 lw x7,0(x10) +80005198: 00e38863 beq x7,x14,800051a8 +8000519c: 07c0346f jal x8,80008218 +800051a0: 80005190 .word 0x80005190 +800051a4: 80015781 .word 0x80015781 +800051a8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x48484848 +800051ac: 0000af83 lw x31,0(x1) +800051b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x48484848 +800051b4: 0000a903 lw x18,0(x1) +800051b8: 00408093 addi x1,x1,4 + +800051bc : +Zknd_aes32dsi_cg_cp_sbox_b72: + aes32dsi x3, x31, x18, 2 # perform operation +800051bc: ab2f81b3 aes32dsi x3,x31,x18,0x2 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b72, Zknd_aes32dsi_cg_cp_sbox_b72_str) +800051c0: 00052383 lw x7,0(x10) +800051c4: 00338863 beq x7,x3,800051d4 +800051c8: 0500346f jal x8,80008218 +800051cc: 800051bc .word 0x800051bc +800051d0: 800157ba .word 0x800157ba +800051d4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x49494949 +800051d8: 0000a903 lw x18,0(x1) +800051dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x49494949 +800051e0: 0000a103 lw x2,0(x1) +800051e4: 00408093 addi x1,x1,4 + +800051e8 : +Zknd_aes32dsi_cg_cp_sbox_b73: + aes32dsi x30, x18, x2, 3 # perform operation +800051e8: ea290f33 aes32dsi x30,x18,x2,0x3 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b73, Zknd_aes32dsi_cg_cp_sbox_b73_str) +800051ec: 00052383 lw x7,0(x10) +800051f0: 01e38863 beq x7,x30,80005200 +800051f4: 0240346f jal x8,80008218 +800051f8: 800051e8 .word 0x800051e8 +800051fc: 800157f3 .word 0x800157f3 +80005200: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x4a4a4a4a +80005204: 0000a283 lw x5,0(x1) +80005208: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x4a4a4a4a +8000520c: 0000a883 lw x17,0(x1) +80005210: 00408093 addi x1,x1,4 + +80005214 : +Zknd_aes32dsi_cg_cp_sbox_b74: + aes32dsi x9, x5, x17, 3 # perform operation +80005214: eb1284b3 aes32dsi x9,x5,x17,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b74, Zknd_aes32dsi_cg_cp_sbox_b74_str) +80005218: 00052383 lw x7,0(x10) +8000521c: 00938863 beq x7,x9,8000522c +80005220: 7f90246f jal x8,80008218 +80005224: 80005214 .word 0x80005214 +80005228: 8001582c .word 0x8001582c +8000522c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x4b4b4b4b +80005230: 0000aa03 lw x20,0(x1) +80005234: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x4b4b4b4b +80005238: 0000a483 lw x9,0(x1) +8000523c: 00408093 addi x1,x1,4 + +80005240 : +Zknd_aes32dsi_cg_cp_sbox_b75: + aes32dsi x23, x20, x9, 0 # perform operation +80005240: 2a9a0bb3 aes32dsi x23,x20,x9,0x0 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b75, Zknd_aes32dsi_cg_cp_sbox_b75_str) +80005244: 00052383 lw x7,0(x10) +80005248: 01738863 beq x7,x23,80005258 +8000524c: 7cd0246f jal x8,80008218 +80005250: 80005240 .word 0x80005240 +80005254: 80015865 .word 0x80015865 +80005258: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x4c4c4c4c +8000525c: 0000a603 lw x12,0(x1) +80005260: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x4c4c4c4c +80005264: 0000a783 lw x15,0(x1) +80005268: 00408093 addi x1,x1,4 + +8000526c : +Zknd_aes32dsi_cg_cp_sbox_b76: + aes32dsi x30, x12, x15, 3 # perform operation +8000526c: eaf60f33 aes32dsi x30,x12,x15,0x3 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b76, Zknd_aes32dsi_cg_cp_sbox_b76_str) +80005270: 00052383 lw x7,0(x10) +80005274: 01e38863 beq x7,x30,80005284 +80005278: 7a10246f jal x8,80008218 +8000527c: 8000526c .word 0x8000526c +80005280: 8001589e .word 0x8001589e +80005284: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x4d4d4d4d +80005288: 0000a583 lw x11,0(x1) +8000528c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x4d4d4d4d +80005290: 0000a103 lw x2,0(x1) +80005294: 00408093 addi x1,x1,4 + +80005298 : +Zknd_aes32dsi_cg_cp_sbox_b77: + aes32dsi x29, x11, x2, 3 # perform operation +80005298: ea258eb3 aes32dsi x29,x11,x2,0x3 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b77, Zknd_aes32dsi_cg_cp_sbox_b77_str) +8000529c: 00052383 lw x7,0(x10) +800052a0: 01d38863 beq x7,x29,800052b0 +800052a4: 7750246f jal x8,80008218 +800052a8: 80005298 .word 0x80005298 +800052ac: 800158d7 .word 0x800158d7 +800052b0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x4e4e4e4e +800052b4: 0000ae03 lw x28,0(x1) +800052b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x4e4e4e4e +800052bc: 0000a203 lw x4,0(x1) +800052c0: 00408093 addi x1,x1,4 + +800052c4 : +Zknd_aes32dsi_cg_cp_sbox_b78: + aes32dsi x20, x28, x4, 1 # perform operation +800052c4: 6a4e0a33 aes32dsi x20,x28,x4,0x1 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b78, Zknd_aes32dsi_cg_cp_sbox_b78_str) +800052c8: 00052383 lw x7,0(x10) +800052cc: 01438863 beq x7,x20,800052dc +800052d0: 7490246f jal x8,80008218 +800052d4: 800052c4 .word 0x800052c4 +800052d8: 80015910 .word 0x80015910 +800052dc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x4f4f4f4f +800052e0: 0000a683 lw x13,0(x1) +800052e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x4f4f4f4f +800052e8: 0000a883 lw x17,0(x1) +800052ec: 00408093 addi x1,x1,4 + +800052f0 : +Zknd_aes32dsi_cg_cp_sbox_b79: + aes32dsi x23, x13, x17, 0 # perform operation +800052f0: 2b168bb3 aes32dsi x23,x13,x17,0x0 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b79, Zknd_aes32dsi_cg_cp_sbox_b79_str) +800052f4: 00052383 lw x7,0(x10) +800052f8: 01738863 beq x7,x23,80005308 +800052fc: 71d0246f jal x8,80008218 +80005300: 800052f0 .word 0x800052f0 +80005304: 80015949 .word 0x80015949 +80005308: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x50505050 +8000530c: 0000ab03 lw x22,0(x1) +80005310: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x50505050 +80005314: 0000a203 lw x4,0(x1) +80005318: 00408093 addi x1,x1,4 + +8000531c : +Zknd_aes32dsi_cg_cp_sbox_b80: + aes32dsi x18, x22, x4, 2 # perform operation +8000531c: aa4b0933 aes32dsi x18,x22,x4,0x2 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b80, Zknd_aes32dsi_cg_cp_sbox_b80_str) +80005320: 00052383 lw x7,0(x10) +80005324: 01238863 beq x7,x18,80005334 +80005328: 6f10246f jal x8,80008218 +8000532c: 8000531c .word 0x8000531c +80005330: 80015982 .word 0x80015982 +80005334: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x51515151 +80005338: 0000a603 lw x12,0(x1) +8000533c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x51515151 +80005340: 0000ac83 lw x25,0(x1) +80005344: 00408093 addi x1,x1,4 + +80005348 : +Zknd_aes32dsi_cg_cp_sbox_b81: + aes32dsi x3, x12, x25, 2 # perform operation +80005348: ab9601b3 aes32dsi x3,x12,x25,0x2 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b81, Zknd_aes32dsi_cg_cp_sbox_b81_str) +8000534c: 00052383 lw x7,0(x10) +80005350: 00338863 beq x7,x3,80005360 +80005354: 6c50246f jal x8,80008218 +80005358: 80005348 .word 0x80005348 +8000535c: 800159bb .word 0x800159bb +80005360: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x52525252 +80005364: 0000a903 lw x18,0(x1) +80005368: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x52525252 +8000536c: 0000a203 lw x4,0(x1) +80005370: 00408093 addi x1,x1,4 + +80005374 : +Zknd_aes32dsi_cg_cp_sbox_b82: + aes32dsi x3, x18, x4, 1 # perform operation +80005374: 6a4901b3 aes32dsi x3,x18,x4,0x1 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b82, Zknd_aes32dsi_cg_cp_sbox_b82_str) +80005378: 00052383 lw x7,0(x10) +8000537c: 00338863 beq x7,x3,8000538c +80005380: 6990246f jal x8,80008218 +80005384: 80005374 .word 0x80005374 +80005388: 800159f4 .word 0x800159f4 +8000538c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x53535353 +80005390: 0000ae03 lw x28,0(x1) +80005394: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x53535353 +80005398: 0000a603 lw x12,0(x1) +8000539c: 00408093 addi x1,x1,4 + +800053a0 : +Zknd_aes32dsi_cg_cp_sbox_b83: + aes32dsi x24, x28, x12, 2 # perform operation +800053a0: aace0c33 aes32dsi x24,x28,x12,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b83, Zknd_aes32dsi_cg_cp_sbox_b83_str) +800053a4: 00052383 lw x7,0(x10) +800053a8: 01838863 beq x7,x24,800053b8 +800053ac: 66d0246f jal x8,80008218 +800053b0: 800053a0 .word 0x800053a0 +800053b4: 80015a2d .word 0x80015a2d +800053b8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x54545454 +800053bc: 0000a303 lw x6,0(x1) +800053c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x54545454 +800053c4: 0000a903 lw x18,0(x1) +800053c8: 00408093 addi x1,x1,4 + +800053cc : +Zknd_aes32dsi_cg_cp_sbox_b84: + aes32dsi x15, x6, x18, 3 # perform operation +800053cc: eb2307b3 aes32dsi x15,x6,x18,0x3 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b84, Zknd_aes32dsi_cg_cp_sbox_b84_str) +800053d0: 00052383 lw x7,0(x10) +800053d4: 00f38863 beq x7,x15,800053e4 +800053d8: 6410246f jal x8,80008218 +800053dc: 800053cc .word 0x800053cc +800053e0: 80015a66 .word 0x80015a66 +800053e4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x55555555 +800053e8: 0000aa03 lw x20,0(x1) +800053ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x55555555 +800053f0: 0000ab83 lw x23,0(x1) +800053f4: 00408093 addi x1,x1,4 + +800053f8 : +Zknd_aes32dsi_cg_cp_sbox_b85: + aes32dsi x17, x20, x23, 0 # perform operation +800053f8: 2b7a08b3 aes32dsi x17,x20,x23,0x0 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b85, Zknd_aes32dsi_cg_cp_sbox_b85_str) +800053fc: 00052383 lw x7,0(x10) +80005400: 01138863 beq x7,x17,80005410 +80005404: 6150246f jal x8,80008218 +80005408: 800053f8 .word 0x800053f8 +8000540c: 80015a9f .word 0x80015a9f +80005410: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x56565656 +80005414: 0000af03 lw x30,0(x1) +80005418: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x56565656 +8000541c: 0000a983 lw x19,0(x1) +80005420: 00408093 addi x1,x1,4 + +80005424 : +Zknd_aes32dsi_cg_cp_sbox_b86: + aes32dsi x17, x30, x19, 1 # perform operation +80005424: 6b3f08b3 aes32dsi x17,x30,x19,0x1 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b86, Zknd_aes32dsi_cg_cp_sbox_b86_str) +80005428: 00052383 lw x7,0(x10) +8000542c: 01138863 beq x7,x17,8000543c +80005430: 5e90246f jal x8,80008218 +80005434: 80005424 .word 0x80005424 +80005438: 80015ad8 .word 0x80015ad8 +8000543c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x57575757 +80005440: 0000ac83 lw x25,0(x1) +80005444: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x57575757 +80005448: 0000a603 lw x12,0(x1) +8000544c: 00408093 addi x1,x1,4 + +80005450 : +Zknd_aes32dsi_cg_cp_sbox_b87: + aes32dsi x26, x25, x12, 2 # perform operation +80005450: aacc8d33 aes32dsi x26,x25,x12,0x2 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknd_aes32dsi_cg_cp_sbox_b87, Zknd_aes32dsi_cg_cp_sbox_b87_str) +80005454: 00052383 lw x7,0(x10) +80005458: 01a38863 beq x7,x26,80005468 +8000545c: 5bd0246f jal x8,80008218 +80005460: 80005450 .word 0x80005450 +80005464: 80015b11 .word 0x80015b11 +80005468: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x58585858 +8000546c: 0000aa83 lw x21,0(x1) +80005470: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x58585858 +80005474: 0000ac83 lw x25,0(x1) +80005478: 00408093 addi x1,x1,4 + +8000547c : +Zknd_aes32dsi_cg_cp_sbox_b88: + aes32dsi x16, x21, x25, 2 # perform operation +8000547c: ab9a8833 aes32dsi x16,x21,x25,0x2 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b88, Zknd_aes32dsi_cg_cp_sbox_b88_str) +80005480: 00052383 lw x7,0(x10) +80005484: 01038863 beq x7,x16,80005494 +80005488: 5910246f jal x8,80008218 +8000548c: 8000547c .word 0x8000547c +80005490: 80015b4a .word 0x80015b4a +80005494: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x59595959 +80005498: 0000af03 lw x30,0(x1) +8000549c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x59595959 +800054a0: 0000a983 lw x19,0(x1) +800054a4: 00408093 addi x1,x1,4 + +800054a8 : +Zknd_aes32dsi_cg_cp_sbox_b89: + aes32dsi x18, x30, x19, 1 # perform operation +800054a8: 6b3f0933 aes32dsi x18,x30,x19,0x1 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b89, Zknd_aes32dsi_cg_cp_sbox_b89_str) +800054ac: 00052383 lw x7,0(x10) +800054b0: 01238863 beq x7,x18,800054c0 +800054b4: 5650246f jal x8,80008218 +800054b8: 800054a8 .word 0x800054a8 +800054bc: 80015b83 .word 0x80015b83 +800054c0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x5a5a5a5a +800054c4: 0000a183 lw x3,0(x1) +800054c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x5a5a5a5a +800054cc: 0000ae83 lw x29,0(x1) +800054d0: 00408093 addi x1,x1,4 + +800054d4 : +Zknd_aes32dsi_cg_cp_sbox_b90: + aes32dsi x24, x3, x29, 3 # perform operation +800054d4: ebd18c33 aes32dsi x24,x3,x29,0x3 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b90, Zknd_aes32dsi_cg_cp_sbox_b90_str) +800054d8: 00052383 lw x7,0(x10) +800054dc: 01838863 beq x7,x24,800054ec +800054e0: 5390246f jal x8,80008218 +800054e4: 800054d4 .word 0x800054d4 +800054e8: 80015bbc .word 0x80015bbc +800054ec: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x5b5b5b5b +800054f0: 0000ad03 lw x26,0(x1) +800054f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x5b5b5b5b +800054f8: 0000a283 lw x5,0(x1) +800054fc: 00408093 addi x1,x1,4 + +80005500 : +Zknd_aes32dsi_cg_cp_sbox_b91: + aes32dsi x9, x26, x5, 0 # perform operation +80005500: 2a5d04b3 aes32dsi x9,x26,x5,0x0 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b91, Zknd_aes32dsi_cg_cp_sbox_b91_str) +80005504: 00052383 lw x7,0(x10) +80005508: 00938863 beq x7,x9,80005518 +8000550c: 50d0246f jal x8,80008218 +80005510: 80005500 .word 0x80005500 +80005514: 80015bf5 .word 0x80015bf5 +80005518: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5c5c5c5c +8000551c: 0000ad83 lw x27,0(x1) +80005520: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x5c5c5c5c +80005524: 0000a983 lw x19,0(x1) +80005528: 00408093 addi x1,x1,4 + +8000552c : +Zknd_aes32dsi_cg_cp_sbox_b92: + aes32dsi x20, x27, x19, 1 # perform operation +8000552c: 6b3d8a33 aes32dsi x20,x27,x19,0x1 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b92, Zknd_aes32dsi_cg_cp_sbox_b92_str) +80005530: 00052383 lw x7,0(x10) +80005534: 01438863 beq x7,x20,80005544 +80005538: 4e10246f jal x8,80008218 +8000553c: 8000552c .word 0x8000552c +80005540: 80015c2e .word 0x80015c2e +80005544: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5d5d5d5d +80005548: 0000a583 lw x11,0(x1) +8000554c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x5d5d5d5d +80005550: 0000a683 lw x13,0(x1) +80005554: 00408093 addi x1,x1,4 + +80005558 : +Zknd_aes32dsi_cg_cp_sbox_b93: + aes32dsi x31, x11, x13, 0 # perform operation +80005558: 2ad58fb3 aes32dsi x31,x11,x13,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b93, Zknd_aes32dsi_cg_cp_sbox_b93_str) +8000555c: 00052383 lw x7,0(x10) +80005560: 01f38863 beq x7,x31,80005570 +80005564: 4b50246f jal x8,80008218 +80005568: 80005558 .word 0x80005558 +8000556c: 80015c67 .word 0x80015c67 +80005570: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x5e5e5e5e +80005574: 0000a183 lw x3,0(x1) +80005578: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5e5e5e5e +8000557c: 0000a483 lw x9,0(x1) +80005580: 00408093 addi x1,x1,4 + +80005584 : +Zknd_aes32dsi_cg_cp_sbox_b94: + aes32dsi x22, x3, x9, 2 # perform operation +80005584: aa918b33 aes32dsi x22,x3,x9,0x2 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b94, Zknd_aes32dsi_cg_cp_sbox_b94_str) +80005588: 00052383 lw x7,0(x10) +8000558c: 01638863 beq x7,x22,8000559c +80005590: 4890246f jal x8,80008218 +80005594: 80005584 .word 0x80005584 +80005598: 80015ca0 .word 0x80015ca0 +8000559c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x5f5f5f5f +800055a0: 0000a783 lw x15,0(x1) +800055a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x5f5f5f5f +800055a8: 0000a903 lw x18,0(x1) +800055ac: 00408093 addi x1,x1,4 + +800055b0 : +Zknd_aes32dsi_cg_cp_sbox_b95: + aes32dsi x31, x15, x18, 3 # perform operation +800055b0: eb278fb3 aes32dsi x31,x15,x18,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b95, Zknd_aes32dsi_cg_cp_sbox_b95_str) +800055b4: 00052383 lw x7,0(x10) +800055b8: 01f38863 beq x7,x31,800055c8 +800055bc: 45d0246f jal x8,80008218 +800055c0: 800055b0 .word 0x800055b0 +800055c4: 80015cd9 .word 0x80015cd9 +800055c8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x60606060 +800055cc: 0000aa83 lw x21,0(x1) +800055d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x60606060 +800055d4: 0000ab03 lw x22,0(x1) +800055d8: 00408093 addi x1,x1,4 + +800055dc : +Zknd_aes32dsi_cg_cp_sbox_b96: + aes32dsi x27, x21, x22, 2 # perform operation +800055dc: ab6a8db3 aes32dsi x27,x21,x22,0x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b96, Zknd_aes32dsi_cg_cp_sbox_b96_str) +800055e0: 00052383 lw x7,0(x10) +800055e4: 01b38863 beq x7,x27,800055f4 +800055e8: 4310246f jal x8,80008218 +800055ec: 800055dc .word 0x800055dc +800055f0: 80015d12 .word 0x80015d12 +800055f4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x61616161 +800055f8: 0000a303 lw x6,0(x1) +800055fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x61616161 +80005600: 0000a283 lw x5,0(x1) +80005604: 00408093 addi x1,x1,4 + +80005608 : +Zknd_aes32dsi_cg_cp_sbox_b97: + aes32dsi x11, x6, x5, 2 # perform operation +80005608: aa5305b3 aes32dsi x11,x6,x5,0x2 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b97, Zknd_aes32dsi_cg_cp_sbox_b97_str) +8000560c: 00052383 lw x7,0(x10) +80005610: 00b38863 beq x7,x11,80005620 +80005614: 4050246f jal x8,80008218 +80005618: 80005608 .word 0x80005608 +8000561c: 80015d4b .word 0x80015d4b +80005620: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x62626262 +80005624: 0000ad83 lw x27,0(x1) +80005628: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x62626262 +8000562c: 0000a483 lw x9,0(x1) +80005630: 00408093 addi x1,x1,4 + +80005634 : +Zknd_aes32dsi_cg_cp_sbox_b98: + aes32dsi x24, x27, x9, 2 # perform operation +80005634: aa9d8c33 aes32dsi x24,x27,x9,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b98, Zknd_aes32dsi_cg_cp_sbox_b98_str) +80005638: 00052383 lw x7,0(x10) +8000563c: 01838863 beq x7,x24,8000564c +80005640: 3d90246f jal x8,80008218 +80005644: 80005634 .word 0x80005634 +80005648: 80015d84 .word 0x80015d84 +8000564c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x63636363 +80005650: 0000a103 lw x2,0(x1) +80005654: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x63636363 +80005658: 0000a683 lw x13,0(x1) +8000565c: 00408093 addi x1,x1,4 + +80005660 : +Zknd_aes32dsi_cg_cp_sbox_b99: + aes32dsi x5, x2, x13, 3 # perform operation +80005660: ead102b3 aes32dsi x5,x2,x13,0x3 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b99, Zknd_aes32dsi_cg_cp_sbox_b99_str) +80005664: 00052383 lw x7,0(x10) +80005668: 00538863 beq x7,x5,80005678 +8000566c: 3ad0246f jal x8,80008218 +80005670: 80005660 .word 0x80005660 +80005674: 80015dbd .word 0x80015dbd +80005678: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x64646464 +8000567c: 0000ac03 lw x24,0(x1) +80005680: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x64646464 +80005684: 0000a983 lw x19,0(x1) +80005688: 00408093 addi x1,x1,4 + +8000568c : +Zknd_aes32dsi_cg_cp_sbox_b100: + aes32dsi x13, x24, x19, 3 # perform operation +8000568c: eb3c06b3 aes32dsi x13,x24,x19,0x3 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b100, Zknd_aes32dsi_cg_cp_sbox_b100_str) +80005690: 00052383 lw x7,0(x10) +80005694: 00d38863 beq x7,x13,800056a4 +80005698: 3810246f jal x8,80008218 +8000569c: 8000568c .word 0x8000568c +800056a0: 80015df6 .word 0x80015df6 +800056a4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x65656565 +800056a8: 0000a583 lw x11,0(x1) +800056ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x65656565 +800056b0: 0000a103 lw x2,0(x1) +800056b4: 00408093 addi x1,x1,4 + +800056b8 : +Zknd_aes32dsi_cg_cp_sbox_b101: + aes32dsi x6, x11, x2, 2 # perform operation +800056b8: aa258333 aes32dsi x6,x11,x2,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b101, Zknd_aes32dsi_cg_cp_sbox_b101_str) +800056bc: 00052383 lw x7,0(x10) +800056c0: 00638863 beq x7,x6,800056d0 +800056c4: 3550246f jal x8,80008218 +800056c8: 800056b8 .word 0x800056b8 +800056cc: 80015e30 .word 0x80015e30 +800056d0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x66666666 +800056d4: 0000a283 lw x5,0(x1) +800056d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x66666666 +800056dc: 0000ac83 lw x25,0(x1) +800056e0: 00408093 addi x1,x1,4 + +800056e4 : +Zknd_aes32dsi_cg_cp_sbox_b102: + aes32dsi x27, x5, x25, 3 # perform operation +800056e4: eb928db3 aes32dsi x27,x5,x25,0x3 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b102, Zknd_aes32dsi_cg_cp_sbox_b102_str) +800056e8: 00052383 lw x7,0(x10) +800056ec: 01b38863 beq x7,x27,800056fc +800056f0: 3290246f jal x8,80008218 +800056f4: 800056e4 .word 0x800056e4 +800056f8: 80015e6a .word 0x80015e6a +800056fc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x67676767 +80005700: 0000a903 lw x18,0(x1) +80005704: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x67676767 +80005708: 0000a303 lw x6,0(x1) +8000570c: 00408093 addi x1,x1,4 + +80005710 : +Zknd_aes32dsi_cg_cp_sbox_b103: + aes32dsi x21, x18, x6, 1 # perform operation +80005710: 6a690ab3 aes32dsi x21,x18,x6,0x1 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b103, Zknd_aes32dsi_cg_cp_sbox_b103_str) +80005714: 00052383 lw x7,0(x10) +80005718: 01538863 beq x7,x21,80005728 +8000571c: 2fd0246f jal x8,80008218 +80005720: 80005710 .word 0x80005710 +80005724: 80015ea4 .word 0x80015ea4 +80005728: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x68686868 +8000572c: 0000ae83 lw x29,0(x1) +80005730: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x68686868 +80005734: 0000ac83 lw x25,0(x1) +80005738: 00408093 addi x1,x1,4 + +8000573c : +Zknd_aes32dsi_cg_cp_sbox_b104: + aes32dsi x14, x29, x25, 1 # perform operation +8000573c: 6b9e8733 aes32dsi x14,x29,x25,0x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b104, Zknd_aes32dsi_cg_cp_sbox_b104_str) +80005740: 00052383 lw x7,0(x10) +80005744: 00e38863 beq x7,x14,80005754 +80005748: 2d10246f jal x8,80008218 +8000574c: 8000573c .word 0x8000573c +80005750: 80015ede .word 0x80015ede +80005754: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x69696969 +80005758: 0000ad83 lw x27,0(x1) +8000575c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x69696969 +80005760: 0000aa83 lw x21,0(x1) +80005764: 00408093 addi x1,x1,4 + +80005768 : +Zknd_aes32dsi_cg_cp_sbox_b105: + aes32dsi x30, x27, x21, 1 # perform operation +80005768: 6b5d8f33 aes32dsi x30,x27,x21,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b105, Zknd_aes32dsi_cg_cp_sbox_b105_str) +8000576c: 00052383 lw x7,0(x10) +80005770: 01e38863 beq x7,x30,80005780 +80005774: 2a50246f jal x8,80008218 +80005778: 80005768 .word 0x80005768 +8000577c: 80015f18 .word 0x80015f18 +80005780: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x6a6a6a6a +80005784: 0000ae03 lw x28,0(x1) +80005788: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x6a6a6a6a +8000578c: 0000a703 lw x14,0(x1) +80005790: 00408093 addi x1,x1,4 + +80005794 : +Zknd_aes32dsi_cg_cp_sbox_b106: + aes32dsi x24, x28, x14, 2 # perform operation +80005794: aaee0c33 aes32dsi x24,x28,x14,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b106, Zknd_aes32dsi_cg_cp_sbox_b106_str) +80005798: 00052383 lw x7,0(x10) +8000579c: 01838863 beq x7,x24,800057ac +800057a0: 2790246f jal x8,80008218 +800057a4: 80005794 .word 0x80005794 +800057a8: 80015f52 .word 0x80015f52 +800057ac: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x6b6b6b6b +800057b0: 0000ad83 lw x27,0(x1) +800057b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x6b6b6b6b +800057b8: 0000ae83 lw x29,0(x1) +800057bc: 00408093 addi x1,x1,4 + +800057c0 : +Zknd_aes32dsi_cg_cp_sbox_b107: + aes32dsi x3, x27, x29, 3 # perform operation +800057c0: ebdd81b3 aes32dsi x3,x27,x29,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b107, Zknd_aes32dsi_cg_cp_sbox_b107_str) +800057c4: 00052383 lw x7,0(x10) +800057c8: 00338863 beq x7,x3,800057d8 +800057cc: 24d0246f jal x8,80008218 +800057d0: 800057c0 .word 0x800057c0 +800057d4: 80015f8c .word 0x80015f8c +800057d8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x6c6c6c6c +800057dc: 0000aa83 lw x21,0(x1) +800057e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x6c6c6c6c +800057e4: 0000a283 lw x5,0(x1) +800057e8: 00408093 addi x1,x1,4 + +800057ec : +Zknd_aes32dsi_cg_cp_sbox_b108: + aes32dsi x25, x21, x5, 0 # perform operation +800057ec: 2a5a8cb3 aes32dsi x25,x21,x5,0x0 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b108, Zknd_aes32dsi_cg_cp_sbox_b108_str) +800057f0: 00052383 lw x7,0(x10) +800057f4: 01938863 beq x7,x25,80005804 +800057f8: 2210246f jal x8,80008218 +800057fc: 800057ec .word 0x800057ec +80005800: 80015fc6 .word 0x80015fc6 +80005804: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x6d6d6d6d +80005808: 0000ae83 lw x29,0(x1) +8000580c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x6d6d6d6d +80005810: 0000a683 lw x13,0(x1) +80005814: 00408093 addi x1,x1,4 + +80005818 : +Zknd_aes32dsi_cg_cp_sbox_b109: + aes32dsi x19, x29, x13, 0 # perform operation +80005818: 2ade89b3 aes32dsi x19,x29,x13,0x0 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b109, Zknd_aes32dsi_cg_cp_sbox_b109_str) +8000581c: 00052383 lw x7,0(x10) +80005820: 01338863 beq x7,x19,80005830 +80005824: 1f50246f jal x8,80008218 +80005828: 80005818 .word 0x80005818 +8000582c: 80016000 .word 0x80016000 +80005830: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x6e6e6e6e +80005834: 0000a483 lw x9,0(x1) +80005838: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x6e6e6e6e +8000583c: 0000a303 lw x6,0(x1) +80005840: 00408093 addi x1,x1,4 + +80005844 : +Zknd_aes32dsi_cg_cp_sbox_b110: + aes32dsi x16, x9, x6, 2 # perform operation +80005844: aa648833 aes32dsi x16,x9,x6,0x2 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b110, Zknd_aes32dsi_cg_cp_sbox_b110_str) +80005848: 00052383 lw x7,0(x10) +8000584c: 01038863 beq x7,x16,8000585c +80005850: 1c90246f jal x8,80008218 +80005854: 80005844 .word 0x80005844 +80005858: 8001603a .word 0x8001603a +8000585c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x6f6f6f6f +80005860: 0000af03 lw x30,0(x1) +80005864: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x6f6f6f6f +80005868: 0000a483 lw x9,0(x1) +8000586c: 00408093 addi x1,x1,4 + +80005870 : +Zknd_aes32dsi_cg_cp_sbox_b111: + aes32dsi x14, x30, x9, 2 # perform operation +80005870: aa9f0733 aes32dsi x14,x30,x9,0x2 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b111, Zknd_aes32dsi_cg_cp_sbox_b111_str) +80005874: 00052383 lw x7,0(x10) +80005878: 00e38863 beq x7,x14,80005888 +8000587c: 19d0246f jal x8,80008218 +80005880: 80005870 .word 0x80005870 +80005884: 80016074 .word 0x80016074 +80005888: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x70707070 +8000588c: 0000ab83 lw x23,0(x1) +80005890: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x70707070 +80005894: 0000aa83 lw x21,0(x1) +80005898: 00408093 addi x1,x1,4 + +8000589c : +Zknd_aes32dsi_cg_cp_sbox_b112: + aes32dsi x15, x23, x21, 3 # perform operation +8000589c: eb5b87b3 aes32dsi x15,x23,x21,0x3 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b112, Zknd_aes32dsi_cg_cp_sbox_b112_str) +800058a0: 00052383 lw x7,0(x10) +800058a4: 00f38863 beq x7,x15,800058b4 +800058a8: 1710246f jal x8,80008218 +800058ac: 8000589c .word 0x8000589c +800058b0: 800160ae .word 0x800160ae +800058b4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x71717171 +800058b8: 0000af03 lw x30,0(x1) +800058bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x71717171 +800058c0: 0000a803 lw x16,0(x1) +800058c4: 00408093 addi x1,x1,4 + +800058c8 : +Zknd_aes32dsi_cg_cp_sbox_b113: + aes32dsi x6, x30, x16, 0 # perform operation +800058c8: 2b0f0333 aes32dsi x6,x30,x16,0x0 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b113, Zknd_aes32dsi_cg_cp_sbox_b113_str) +800058cc: 00052383 lw x7,0(x10) +800058d0: 00638863 beq x7,x6,800058e0 +800058d4: 1450246f jal x8,80008218 +800058d8: 800058c8 .word 0x800058c8 +800058dc: 800160e8 .word 0x800160e8 +800058e0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x72727272 +800058e4: 0000a103 lw x2,0(x1) +800058e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x72727272 +800058ec: 0000ae03 lw x28,0(x1) +800058f0: 00408093 addi x1,x1,4 + +800058f4 : +Zknd_aes32dsi_cg_cp_sbox_b114: + aes32dsi x31, x2, x28, 0 # perform operation +800058f4: 2bc10fb3 aes32dsi x31,x2,x28,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b114, Zknd_aes32dsi_cg_cp_sbox_b114_str) +800058f8: 00052383 lw x7,0(x10) +800058fc: 01f38863 beq x7,x31,8000590c +80005900: 1190246f jal x8,80008218 +80005904: 800058f4 .word 0x800058f4 +80005908: 80016122 .word 0x80016122 +8000590c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x73737373 +80005910: 0000a983 lw x19,0(x1) +80005914: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x73737373 +80005918: 0000ad83 lw x27,0(x1) +8000591c: 00408093 addi x1,x1,4 + +80005920 : +Zknd_aes32dsi_cg_cp_sbox_b115: + aes32dsi x22, x19, x27, 1 # perform operation +80005920: 6bb98b33 aes32dsi x22,x19,x27,0x1 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b115, Zknd_aes32dsi_cg_cp_sbox_b115_str) +80005924: 00052383 lw x7,0(x10) +80005928: 01638863 beq x7,x22,80005938 +8000592c: 0ed0246f jal x8,80008218 +80005930: 80005920 .word 0x80005920 +80005934: 8001615c .word 0x8001615c +80005938: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x74747474 +8000593c: 0000ae03 lw x28,0(x1) +80005940: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x74747474 +80005944: 0000a703 lw x14,0(x1) +80005948: 00408093 addi x1,x1,4 + +8000594c : +Zknd_aes32dsi_cg_cp_sbox_b116: + aes32dsi x21, x28, x14, 0 # perform operation +8000594c: 2aee0ab3 aes32dsi x21,x28,x14,0x0 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b116, Zknd_aes32dsi_cg_cp_sbox_b116_str) +80005950: 00052383 lw x7,0(x10) +80005954: 01538863 beq x7,x21,80005964 +80005958: 0c10246f jal x8,80008218 +8000595c: 8000594c .word 0x8000594c +80005960: 80016196 .word 0x80016196 +80005964: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x75757575 +80005968: 0000a183 lw x3,0(x1) +8000596c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x75757575 +80005970: 0000a483 lw x9,0(x1) +80005974: 00408093 addi x1,x1,4 + +80005978 : +Zknd_aes32dsi_cg_cp_sbox_b117: + aes32dsi x2, x3, x9, 0 # perform operation +80005978: 2a918133 aes32dsi x2,x3,x9,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b117, Zknd_aes32dsi_cg_cp_sbox_b117_str) +8000597c: 00052383 lw x7,0(x10) +80005980: 00238863 beq x7,x2,80005990 +80005984: 0950246f jal x8,80008218 +80005988: 80005978 .word 0x80005978 +8000598c: 800161d0 .word 0x800161d0 +80005990: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x76767676 +80005994: 0000a983 lw x19,0(x1) +80005998: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x76767676 +8000599c: 0000a603 lw x12,0(x1) +800059a0: 00408093 addi x1,x1,4 + +800059a4 : +Zknd_aes32dsi_cg_cp_sbox_b118: + aes32dsi x30, x19, x12, 1 # perform operation +800059a4: 6ac98f33 aes32dsi x30,x19,x12,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b118, Zknd_aes32dsi_cg_cp_sbox_b118_str) +800059a8: 00052383 lw x7,0(x10) +800059ac: 01e38863 beq x7,x30,800059bc +800059b0: 0690246f jal x8,80008218 +800059b4: 800059a4 .word 0x800059a4 +800059b8: 8001620a .word 0x8001620a +800059bc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x77777777 +800059c0: 0000a703 lw x14,0(x1) +800059c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x77777777 +800059c8: 0000a783 lw x15,0(x1) +800059cc: 00408093 addi x1,x1,4 + +800059d0 : +Zknd_aes32dsi_cg_cp_sbox_b119: + aes32dsi x16, x14, x15, 3 # perform operation +800059d0: eaf70833 aes32dsi x16,x14,x15,0x3 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b119, Zknd_aes32dsi_cg_cp_sbox_b119_str) +800059d4: 00052383 lw x7,0(x10) +800059d8: 01038863 beq x7,x16,800059e8 +800059dc: 03d0246f jal x8,80008218 +800059e0: 800059d0 .word 0x800059d0 +800059e4: 80016244 .word 0x80016244 +800059e8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x78787878 +800059ec: 0000a983 lw x19,0(x1) +800059f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x78787878 +800059f4: 0000a303 lw x6,0(x1) +800059f8: 00408093 addi x1,x1,4 + +800059fc : +Zknd_aes32dsi_cg_cp_sbox_b120: + aes32dsi x29, x19, x6, 3 # perform operation +800059fc: ea698eb3 aes32dsi x29,x19,x6,0x3 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b120, Zknd_aes32dsi_cg_cp_sbox_b120_str) +80005a00: 00052383 lw x7,0(x10) +80005a04: 01d38863 beq x7,x29,80005a14 +80005a08: 0110246f jal x8,80008218 +80005a0c: 800059fc .word 0x800059fc +80005a10: 8001627e .word 0x8001627e +80005a14: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x79797979 +80005a18: 0000a483 lw x9,0(x1) +80005a1c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x79797979 +80005a20: 0000ac03 lw x24,0(x1) +80005a24: 00408093 addi x1,x1,4 + +80005a28 : +Zknd_aes32dsi_cg_cp_sbox_b121: + aes32dsi x21, x9, x24, 0 # perform operation +80005a28: 2b848ab3 aes32dsi x21,x9,x24,0x0 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b121, Zknd_aes32dsi_cg_cp_sbox_b121_str) +80005a2c: 00052383 lw x7,0(x10) +80005a30: 01538863 beq x7,x21,80005a40 +80005a34: 7e40246f jal x8,80008218 +80005a38: 80005a28 .word 0x80005a28 +80005a3c: 800162b8 .word 0x800162b8 +80005a40: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7a7a7a7a +80005a44: 0000ac03 lw x24,0(x1) +80005a48: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x7a7a7a7a +80005a4c: 0000ad03 lw x26,0(x1) +80005a50: 00408093 addi x1,x1,4 + +80005a54 : +Zknd_aes32dsi_cg_cp_sbox_b122: + aes32dsi x13, x24, x26, 0 # perform operation +80005a54: 2bac06b3 aes32dsi x13,x24,x26,0x0 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b122, Zknd_aes32dsi_cg_cp_sbox_b122_str) +80005a58: 00052383 lw x7,0(x10) +80005a5c: 00d38863 beq x7,x13,80005a6c +80005a60: 7b80246f jal x8,80008218 +80005a64: 80005a54 .word 0x80005a54 +80005a68: 800162f2 .word 0x800162f2 +80005a6c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7b7b7b7b +80005a70: 0000a903 lw x18,0(x1) +80005a74: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7b7b7b7b +80005a78: 0000af03 lw x30,0(x1) +80005a7c: 00408093 addi x1,x1,4 + +80005a80 : +Zknd_aes32dsi_cg_cp_sbox_b123: + aes32dsi x26, x18, x30, 0 # perform operation +80005a80: 2be90d33 aes32dsi x26,x18,x30,0x0 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknd_aes32dsi_cg_cp_sbox_b123, Zknd_aes32dsi_cg_cp_sbox_b123_str) +80005a84: 00052383 lw x7,0(x10) +80005a88: 01a38863 beq x7,x26,80005a98 +80005a8c: 78c0246f jal x8,80008218 +80005a90: 80005a80 .word 0x80005a80 +80005a94: 8001632c .word 0x8001632c +80005a98: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7c7c7c7c +80005a9c: 0000a683 lw x13,0(x1) +80005aa0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x7c7c7c7c +80005aa4: 0000a483 lw x9,0(x1) +80005aa8: 00408093 addi x1,x1,4 + +80005aac : +Zknd_aes32dsi_cg_cp_sbox_b124: + aes32dsi x27, x13, x9, 3 # perform operation +80005aac: ea968db3 aes32dsi x27,x13,x9,0x3 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b124, Zknd_aes32dsi_cg_cp_sbox_b124_str) +80005ab0: 00052383 lw x7,0(x10) +80005ab4: 01b38863 beq x7,x27,80005ac4 +80005ab8: 7600246f jal x8,80008218 +80005abc: 80005aac .word 0x80005aac +80005ac0: 80016366 .word 0x80016366 +80005ac4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7d7d7d7d +80005ac8: 0000a103 lw x2,0(x1) +80005acc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7d7d7d7d +80005ad0: 0000ad83 lw x27,0(x1) +80005ad4: 00408093 addi x1,x1,4 + +80005ad8 : +Zknd_aes32dsi_cg_cp_sbox_b125: + aes32dsi x17, x2, x27, 0 # perform operation +80005ad8: 2bb108b3 aes32dsi x17,x2,x27,0x0 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b125, Zknd_aes32dsi_cg_cp_sbox_b125_str) +80005adc: 00052383 lw x7,0(x10) +80005ae0: 01138863 beq x7,x17,80005af0 +80005ae4: 7340246f jal x8,80008218 +80005ae8: 80005ad8 .word 0x80005ad8 +80005aec: 800163a0 .word 0x800163a0 +80005af0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x7e7e7e7e +80005af4: 0000af03 lw x30,0(x1) +80005af8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x7e7e7e7e +80005afc: 0000a203 lw x4,0(x1) +80005b00: 00408093 addi x1,x1,4 + +80005b04 : +Zknd_aes32dsi_cg_cp_sbox_b126: + aes32dsi x27, x30, x4, 1 # perform operation +80005b04: 6a4f0db3 aes32dsi x27,x30,x4,0x1 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b126, Zknd_aes32dsi_cg_cp_sbox_b126_str) +80005b08: 00052383 lw x7,0(x10) +80005b0c: 01b38863 beq x7,x27,80005b1c +80005b10: 7080246f jal x8,80008218 +80005b14: 80005b04 .word 0x80005b04 +80005b18: 800163da .word 0x800163da +80005b1c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7f7f7f7f +80005b20: 0000a303 lw x6,0(x1) +80005b24: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7f7f7f7f +80005b28: 0000ad83 lw x27,0(x1) +80005b2c: 00408093 addi x1,x1,4 + +80005b30 : +Zknd_aes32dsi_cg_cp_sbox_b127: + aes32dsi x24, x6, x27, 2 # perform operation +80005b30: abb30c33 aes32dsi x24,x6,x27,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b127, Zknd_aes32dsi_cg_cp_sbox_b127_str) +80005b34: 00052383 lw x7,0(x10) +80005b38: 01838863 beq x7,x24,80005b48 +80005b3c: 6dc0246f jal x8,80008218 +80005b40: 80005b30 .word 0x80005b30 +80005b44: 80016414 .word 0x80016414 +80005b48: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x80808080 +80005b4c: 0000af83 lw x31,0(x1) +80005b50: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x80808080 +80005b54: 0000a103 lw x2,0(x1) +80005b58: 00408093 addi x1,x1,4 + +80005b5c : +Zknd_aes32dsi_cg_cp_sbox_b128: + aes32dsi x25, x31, x2, 0 # perform operation +80005b5c: 2a2f8cb3 aes32dsi x25,x31,x2,0x0 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b128, Zknd_aes32dsi_cg_cp_sbox_b128_str) +80005b60: 00052383 lw x7,0(x10) +80005b64: 01938863 beq x7,x25,80005b74 +80005b68: 6b00246f jal x8,80008218 +80005b6c: 80005b5c .word 0x80005b5c +80005b70: 8001644e .word 0x8001644e +80005b74: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x81818181 +80005b78: 0000a203 lw x4,0(x1) +80005b7c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x81818181 +80005b80: 0000aa83 lw x21,0(x1) +80005b84: 00408093 addi x1,x1,4 + +80005b88 : +Zknd_aes32dsi_cg_cp_sbox_b129: + aes32dsi x22, x4, x21, 1 # perform operation +80005b88: 6b520b33 aes32dsi x22,x4,x21,0x1 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b129, Zknd_aes32dsi_cg_cp_sbox_b129_str) +80005b8c: 00052383 lw x7,0(x10) +80005b90: 01638863 beq x7,x22,80005ba0 +80005b94: 6840246f jal x8,80008218 +80005b98: 80005b88 .word 0x80005b88 +80005b9c: 80016488 .word 0x80016488 +80005ba0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x82828282 +80005ba4: 0000a303 lw x6,0(x1) +80005ba8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x82828282 +80005bac: 0000aa83 lw x21,0(x1) +80005bb0: 00408093 addi x1,x1,4 + +80005bb4 : +Zknd_aes32dsi_cg_cp_sbox_b130: + aes32dsi x15, x6, x21, 0 # perform operation +80005bb4: 2b5307b3 aes32dsi x15,x6,x21,0x0 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b130, Zknd_aes32dsi_cg_cp_sbox_b130_str) +80005bb8: 00052383 lw x7,0(x10) +80005bbc: 00f38863 beq x7,x15,80005bcc +80005bc0: 6580246f jal x8,80008218 +80005bc4: 80005bb4 .word 0x80005bb4 +80005bc8: 800164c2 .word 0x800164c2 +80005bcc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x83838383 +80005bd0: 0000a103 lw x2,0(x1) +80005bd4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x83838383 +80005bd8: 0000ae03 lw x28,0(x1) +80005bdc: 00408093 addi x1,x1,4 + +80005be0 : +Zknd_aes32dsi_cg_cp_sbox_b131: + aes32dsi x17, x2, x28, 2 # perform operation +80005be0: abc108b3 aes32dsi x17,x2,x28,0x2 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b131, Zknd_aes32dsi_cg_cp_sbox_b131_str) +80005be4: 00052383 lw x7,0(x10) +80005be8: 01138863 beq x7,x17,80005bf8 +80005bec: 62c0246f jal x8,80008218 +80005bf0: 80005be0 .word 0x80005be0 +80005bf4: 800164fc .word 0x800164fc +80005bf8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x84848484 +80005bfc: 0000a283 lw x5,0(x1) +80005c00: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x84848484 +80005c04: 0000a303 lw x6,0(x1) +80005c08: 00408093 addi x1,x1,4 + +80005c0c : +Zknd_aes32dsi_cg_cp_sbox_b132: + aes32dsi x13, x5, x6, 3 # perform operation +80005c0c: ea6286b3 aes32dsi x13,x5,x6,0x3 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b132, Zknd_aes32dsi_cg_cp_sbox_b132_str) +80005c10: 00052383 lw x7,0(x10) +80005c14: 00d38863 beq x7,x13,80005c24 +80005c18: 6000246f jal x8,80008218 +80005c1c: 80005c0c .word 0x80005c0c +80005c20: 80016536 .word 0x80016536 +80005c24: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x85858585 +80005c28: 0000ad03 lw x26,0(x1) +80005c2c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x85858585 +80005c30: 0000a103 lw x2,0(x1) +80005c34: 00408093 addi x1,x1,4 + +80005c38 : +Zknd_aes32dsi_cg_cp_sbox_b133: + aes32dsi x6, x26, x2, 1 # perform operation +80005c38: 6a2d0333 aes32dsi x6,x26,x2,0x1 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b133, Zknd_aes32dsi_cg_cp_sbox_b133_str) +80005c3c: 00052383 lw x7,0(x10) +80005c40: 00638863 beq x7,x6,80005c50 +80005c44: 5d40246f jal x8,80008218 +80005c48: 80005c38 .word 0x80005c38 +80005c4c: 80016570 .word 0x80016570 +80005c50: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x86868686 +80005c54: 0000a603 lw x12,0(x1) +80005c58: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x86868686 +80005c5c: 0000a483 lw x9,0(x1) +80005c60: 00408093 addi x1,x1,4 + +80005c64 : +Zknd_aes32dsi_cg_cp_sbox_b134: + aes32dsi x17, x12, x9, 2 # perform operation +80005c64: aa9608b3 aes32dsi x17,x12,x9,0x2 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b134, Zknd_aes32dsi_cg_cp_sbox_b134_str) +80005c68: 00052383 lw x7,0(x10) +80005c6c: 01138863 beq x7,x17,80005c7c +80005c70: 5a80246f jal x8,80008218 +80005c74: 80005c64 .word 0x80005c64 +80005c78: 800165aa .word 0x800165aa +80005c7c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x87878787 +80005c80: 0000aa83 lw x21,0(x1) +80005c84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x87878787 +80005c88: 0000a903 lw x18,0(x1) +80005c8c: 00408093 addi x1,x1,4 + +80005c90 : +Zknd_aes32dsi_cg_cp_sbox_b135: + aes32dsi x30, x21, x18, 1 # perform operation +80005c90: 6b2a8f33 aes32dsi x30,x21,x18,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b135, Zknd_aes32dsi_cg_cp_sbox_b135_str) +80005c94: 00052383 lw x7,0(x10) +80005c98: 01e38863 beq x7,x30,80005ca8 +80005c9c: 57c0246f jal x8,80008218 +80005ca0: 80005c90 .word 0x80005c90 +80005ca4: 800165e4 .word 0x800165e4 +80005ca8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x88888888 +80005cac: 0000aa03 lw x20,0(x1) +80005cb0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x88888888 +80005cb4: 0000ae83 lw x29,0(x1) +80005cb8: 00408093 addi x1,x1,4 + +80005cbc : +Zknd_aes32dsi_cg_cp_sbox_b136: + aes32dsi x3, x20, x29, 3 # perform operation +80005cbc: ebda01b3 aes32dsi x3,x20,x29,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b136, Zknd_aes32dsi_cg_cp_sbox_b136_str) +80005cc0: 00052383 lw x7,0(x10) +80005cc4: 00338863 beq x7,x3,80005cd4 +80005cc8: 5500246f jal x8,80008218 +80005ccc: 80005cbc .word 0x80005cbc +80005cd0: 8001661e .word 0x8001661e +80005cd4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x89898989 +80005cd8: 0000af03 lw x30,0(x1) +80005cdc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x89898989 +80005ce0: 0000ac83 lw x25,0(x1) +80005ce4: 00408093 addi x1,x1,4 + +80005ce8 : +Zknd_aes32dsi_cg_cp_sbox_b137: + aes32dsi x16, x30, x25, 0 # perform operation +80005ce8: 2b9f0833 aes32dsi x16,x30,x25,0x0 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b137, Zknd_aes32dsi_cg_cp_sbox_b137_str) +80005cec: 00052383 lw x7,0(x10) +80005cf0: 01038863 beq x7,x16,80005d00 +80005cf4: 5240246f jal x8,80008218 +80005cf8: 80005ce8 .word 0x80005ce8 +80005cfc: 80016658 .word 0x80016658 +80005d00: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x8a8a8a8a +80005d04: 0000a683 lw x13,0(x1) +80005d08: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x8a8a8a8a +80005d0c: 0000a783 lw x15,0(x1) +80005d10: 00408093 addi x1,x1,4 + +80005d14 : +Zknd_aes32dsi_cg_cp_sbox_b138: + aes32dsi x9, x13, x15, 0 # perform operation +80005d14: 2af684b3 aes32dsi x9,x13,x15,0x0 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b138, Zknd_aes32dsi_cg_cp_sbox_b138_str) +80005d18: 00052383 lw x7,0(x10) +80005d1c: 00938863 beq x7,x9,80005d2c +80005d20: 4f80246f jal x8,80008218 +80005d24: 80005d14 .word 0x80005d14 +80005d28: 80016692 .word 0x80016692 +80005d2c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8b8b8b8b +80005d30: 0000a483 lw x9,0(x1) +80005d34: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8b8b8b8b +80005d38: 0000ac83 lw x25,0(x1) +80005d3c: 00408093 addi x1,x1,4 + +80005d40 : +Zknd_aes32dsi_cg_cp_sbox_b139: + aes32dsi x21, x9, x25, 2 # perform operation +80005d40: ab948ab3 aes32dsi x21,x9,x25,0x2 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b139, Zknd_aes32dsi_cg_cp_sbox_b139_str) +80005d44: 00052383 lw x7,0(x10) +80005d48: 01538863 beq x7,x21,80005d58 +80005d4c: 4cc0246f jal x8,80008218 +80005d50: 80005d40 .word 0x80005d40 +80005d54: 800166cc .word 0x800166cc +80005d58: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x8c8c8c8c +80005d5c: 0000a603 lw x12,0(x1) +80005d60: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x8c8c8c8c +80005d64: 0000a883 lw x17,0(x1) +80005d68: 00408093 addi x1,x1,4 + +80005d6c : +Zknd_aes32dsi_cg_cp_sbox_b140: + aes32dsi x5, x12, x17, 1 # perform operation +80005d6c: 6b1602b3 aes32dsi x5,x12,x17,0x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes32dsi_cg_cp_sbox_b140, Zknd_aes32dsi_cg_cp_sbox_b140_str) +80005d70: 00052383 lw x7,0(x10) +80005d74: 00538863 beq x7,x5,80005d84 +80005d78: 4a00246f jal x8,80008218 +80005d7c: 80005d6c .word 0x80005d6c +80005d80: 80016706 .word 0x80016706 +80005d84: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8d8d8d8d +80005d88: 0000a103 lw x2,0(x1) +80005d8c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x8d8d8d8d +80005d90: 0000ae03 lw x28,0(x1) +80005d94: 00408093 addi x1,x1,4 + +80005d98 : +Zknd_aes32dsi_cg_cp_sbox_b141: + aes32dsi x24, x2, x28, 1 # perform operation +80005d98: 6bc10c33 aes32dsi x24,x2,x28,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b141, Zknd_aes32dsi_cg_cp_sbox_b141_str) +80005d9c: 00052383 lw x7,0(x10) +80005da0: 01838863 beq x7,x24,80005db0 +80005da4: 4740246f jal x8,80008218 +80005da8: 80005d98 .word 0x80005d98 +80005dac: 80016740 .word 0x80016740 +80005db0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x8e8e8e8e +80005db4: 0000a183 lw x3,0(x1) +80005db8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8e8e8e8e +80005dbc: 0000a803 lw x16,0(x1) +80005dc0: 00408093 addi x1,x1,4 + +80005dc4 : +Zknd_aes32dsi_cg_cp_sbox_b142: + aes32dsi x28, x3, x16, 3 # perform operation +80005dc4: eb018e33 aes32dsi x28,x3,x16,0x3 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cp_sbox_b142, Zknd_aes32dsi_cg_cp_sbox_b142_str) +80005dc8: 00052383 lw x7,0(x10) +80005dcc: 01c38863 beq x7,x28,80005ddc +80005dd0: 4480246f jal x8,80008218 +80005dd4: 80005dc4 .word 0x80005dc4 +80005dd8: 8001677a .word 0x8001677a +80005ddc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x8f8f8f8f +80005de0: 0000a703 lw x14,0(x1) +80005de4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x8f8f8f8f +80005de8: 0000af83 lw x31,0(x1) +80005dec: 00408093 addi x1,x1,4 + +80005df0 : +Zknd_aes32dsi_cg_cp_sbox_b143: + aes32dsi x18, x14, x31, 1 # perform operation +80005df0: 6bf70933 aes32dsi x18,x14,x31,0x1 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b143, Zknd_aes32dsi_cg_cp_sbox_b143_str) +80005df4: 00052383 lw x7,0(x10) +80005df8: 01238863 beq x7,x18,80005e08 +80005dfc: 41c0246f jal x8,80008218 +80005e00: 80005df0 .word 0x80005df0 +80005e04: 800167b4 .word 0x800167b4 +80005e08: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x90909090 +80005e0c: 0000aa83 lw x21,0(x1) +80005e10: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x90909090 +80005e14: 0000ad83 lw x27,0(x1) +80005e18: 00408093 addi x1,x1,4 + +80005e1c : +Zknd_aes32dsi_cg_cp_sbox_b144: + aes32dsi x15, x21, x27, 1 # perform operation +80005e1c: 6bba87b3 aes32dsi x15,x21,x27,0x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b144, Zknd_aes32dsi_cg_cp_sbox_b144_str) +80005e20: 00052383 lw x7,0(x10) +80005e24: 00f38863 beq x7,x15,80005e34 +80005e28: 3f00246f jal x8,80008218 +80005e2c: 80005e1c .word 0x80005e1c +80005e30: 800167ee .word 0x800167ee +80005e34: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x91919191 +80005e38: 0000aa83 lw x21,0(x1) +80005e3c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x91919191 +80005e40: 0000a803 lw x16,0(x1) +80005e44: 00408093 addi x1,x1,4 + +80005e48 : +Zknd_aes32dsi_cg_cp_sbox_b145: + aes32dsi x23, x21, x16, 0 # perform operation +80005e48: 2b0a8bb3 aes32dsi x23,x21,x16,0x0 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b145, Zknd_aes32dsi_cg_cp_sbox_b145_str) +80005e4c: 00052383 lw x7,0(x10) +80005e50: 01738863 beq x7,x23,80005e60 +80005e54: 3c40246f jal x8,80008218 +80005e58: 80005e48 .word 0x80005e48 +80005e5c: 80016828 .word 0x80016828 +80005e60: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x92929292 +80005e64: 0000a803 lw x16,0(x1) +80005e68: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x92929292 +80005e6c: 0000ae03 lw x28,0(x1) +80005e70: 00408093 addi x1,x1,4 + +80005e74 : +Zknd_aes32dsi_cg_cp_sbox_b146: + aes32dsi x22, x16, x28, 0 # perform operation +80005e74: 2bc80b33 aes32dsi x22,x16,x28,0x0 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b146, Zknd_aes32dsi_cg_cp_sbox_b146_str) +80005e78: 00052383 lw x7,0(x10) +80005e7c: 01638863 beq x7,x22,80005e8c +80005e80: 3980246f jal x8,80008218 +80005e84: 80005e74 .word 0x80005e74 +80005e88: 80016862 .word 0x80016862 +80005e8c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x93939393 +80005e90: 0000a103 lw x2,0(x1) +80005e94: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x93939393 +80005e98: 0000a703 lw x14,0(x1) +80005e9c: 00408093 addi x1,x1,4 + +80005ea0 : +Zknd_aes32dsi_cg_cp_sbox_b147: + aes32dsi x28, x2, x14, 3 # perform operation +80005ea0: eae10e33 aes32dsi x28,x2,x14,0x3 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cp_sbox_b147, Zknd_aes32dsi_cg_cp_sbox_b147_str) +80005ea4: 00052383 lw x7,0(x10) +80005ea8: 01c38863 beq x7,x28,80005eb8 +80005eac: 36c0246f jal x8,80008218 +80005eb0: 80005ea0 .word 0x80005ea0 +80005eb4: 8001689c .word 0x8001689c +80005eb8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x94949494 +80005ebc: 0000a603 lw x12,0(x1) +80005ec0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x94949494 +80005ec4: 0000a203 lw x4,0(x1) +80005ec8: 00408093 addi x1,x1,4 + +80005ecc : +Zknd_aes32dsi_cg_cp_sbox_b148: + aes32dsi x11, x12, x4, 3 # perform operation +80005ecc: ea4605b3 aes32dsi x11,x12,x4,0x3 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b148, Zknd_aes32dsi_cg_cp_sbox_b148_str) +80005ed0: 00052383 lw x7,0(x10) +80005ed4: 00b38863 beq x7,x11,80005ee4 +80005ed8: 3400246f jal x8,80008218 +80005edc: 80005ecc .word 0x80005ecc +80005ee0: 800168d6 .word 0x800168d6 +80005ee4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x95959595 +80005ee8: 0000a183 lw x3,0(x1) +80005eec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x95959595 +80005ef0: 0000a483 lw x9,0(x1) +80005ef4: 00408093 addi x1,x1,4 + +80005ef8 : +Zknd_aes32dsi_cg_cp_sbox_b149: + aes32dsi x24, x3, x9, 0 # perform operation +80005ef8: 2a918c33 aes32dsi x24,x3,x9,0x0 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b149, Zknd_aes32dsi_cg_cp_sbox_b149_str) +80005efc: 00052383 lw x7,0(x10) +80005f00: 01838863 beq x7,x24,80005f10 +80005f04: 3140246f jal x8,80008218 +80005f08: 80005ef8 .word 0x80005ef8 +80005f0c: 80016910 .word 0x80016910 +80005f10: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x96969696 +80005f14: 0000ac03 lw x24,0(x1) +80005f18: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x96969696 +80005f1c: 0000af03 lw x30,0(x1) +80005f20: 00408093 addi x1,x1,4 + +80005f24 : +Zknd_aes32dsi_cg_cp_sbox_b150: + aes32dsi x13, x24, x30, 0 # perform operation +80005f24: 2bec06b3 aes32dsi x13,x24,x30,0x0 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b150, Zknd_aes32dsi_cg_cp_sbox_b150_str) +80005f28: 00052383 lw x7,0(x10) +80005f2c: 00d38863 beq x7,x13,80005f3c +80005f30: 2e80246f jal x8,80008218 +80005f34: 80005f24 .word 0x80005f24 +80005f38: 8001694a .word 0x8001694a +80005f3c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x97979797 +80005f40: 0000a103 lw x2,0(x1) +80005f44: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x97979797 +80005f48: 0000ab83 lw x23,0(x1) +80005f4c: 00408093 addi x1,x1,4 + +80005f50 : +Zknd_aes32dsi_cg_cp_sbox_b151: + aes32dsi x14, x2, x23, 0 # perform operation +80005f50: 2b710733 aes32dsi x14,x2,x23,0x0 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b151, Zknd_aes32dsi_cg_cp_sbox_b151_str) +80005f54: 00052383 lw x7,0(x10) +80005f58: 00e38863 beq x7,x14,80005f68 +80005f5c: 2bc0246f jal x8,80008218 +80005f60: 80005f50 .word 0x80005f50 +80005f64: 80016984 .word 0x80016984 +80005f68: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x98989898 +80005f6c: 0000a183 lw x3,0(x1) +80005f70: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x98989898 +80005f74: 0000a603 lw x12,0(x1) +80005f78: 00408093 addi x1,x1,4 + +80005f7c : +Zknd_aes32dsi_cg_cp_sbox_b152: + aes32dsi x28, x3, x12, 0 # perform operation +80005f7c: 2ac18e33 aes32dsi x28,x3,x12,0x0 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cp_sbox_b152, Zknd_aes32dsi_cg_cp_sbox_b152_str) +80005f80: 00052383 lw x7,0(x10) +80005f84: 01c38863 beq x7,x28,80005f94 +80005f88: 2900246f jal x8,80008218 +80005f8c: 80005f7c .word 0x80005f7c +80005f90: 800169be .word 0x800169be +80005f94: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x99999999 +80005f98: 0000a683 lw x13,0(x1) +80005f9c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x99999999 +80005fa0: 0000ad03 lw x26,0(x1) +80005fa4: 00408093 addi x1,x1,4 + +80005fa8 : +Zknd_aes32dsi_cg_cp_sbox_b153: + aes32dsi x12, x13, x26, 3 # perform operation +80005fa8: eba68633 aes32dsi x12,x13,x26,0x3 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b153, Zknd_aes32dsi_cg_cp_sbox_b153_str) +80005fac: 00052383 lw x7,0(x10) +80005fb0: 00c38863 beq x7,x12,80005fc0 +80005fb4: 2640246f jal x8,80008218 +80005fb8: 80005fa8 .word 0x80005fa8 +80005fbc: 800169f8 .word 0x800169f8 +80005fc0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x9a9a9a9a +80005fc4: 0000ac03 lw x24,0(x1) +80005fc8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x9a9a9a9a +80005fcc: 0000a583 lw x11,0(x1) +80005fd0: 00408093 addi x1,x1,4 + +80005fd4 : +Zknd_aes32dsi_cg_cp_sbox_b154: + aes32dsi x3, x24, x11, 3 # perform operation +80005fd4: eabc01b3 aes32dsi x3,x24,x11,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b154, Zknd_aes32dsi_cg_cp_sbox_b154_str) +80005fd8: 00052383 lw x7,0(x10) +80005fdc: 00338863 beq x7,x3,80005fec +80005fe0: 2380246f jal x8,80008218 +80005fe4: 80005fd4 .word 0x80005fd4 +80005fe8: 80016a32 .word 0x80016a32 +80005fec: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x9b9b9b9b +80005ff0: 0000a803 lw x16,0(x1) +80005ff4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x9b9b9b9b +80005ff8: 0000a683 lw x13,0(x1) +80005ffc: 00408093 addi x1,x1,4 + +80006000 : +Zknd_aes32dsi_cg_cp_sbox_b155: + aes32dsi x4, x16, x13, 2 # perform operation +80006000: aad80233 aes32dsi x4,x16,x13,0x2 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cp_sbox_b155, Zknd_aes32dsi_cg_cp_sbox_b155_str) +80006004: 00052383 lw x7,0(x10) +80006008: 00438863 beq x7,x4,80006018 +8000600c: 20c0246f jal x8,80008218 +80006010: 80006000 .word 0x80006000 +80006014: 80016a6c .word 0x80016a6c +80006018: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x9c9c9c9c +8000601c: 0000a883 lw x17,0(x1) +80006020: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x9c9c9c9c +80006024: 0000ab03 lw x22,0(x1) +80006028: 00408093 addi x1,x1,4 + +8000602c : +Zknd_aes32dsi_cg_cp_sbox_b156: + aes32dsi x20, x17, x22, 2 # perform operation +8000602c: ab688a33 aes32dsi x20,x17,x22,0x2 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b156, Zknd_aes32dsi_cg_cp_sbox_b156_str) +80006030: 00052383 lw x7,0(x10) +80006034: 01438863 beq x7,x20,80006044 +80006038: 1e00246f jal x8,80008218 +8000603c: 8000602c .word 0x8000602c +80006040: 80016aa6 .word 0x80016aa6 +80006044: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x9d9d9d9d +80006048: 0000a583 lw x11,0(x1) +8000604c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x9d9d9d9d +80006050: 0000ae03 lw x28,0(x1) +80006054: 00408093 addi x1,x1,4 + +80006058 : +Zknd_aes32dsi_cg_cp_sbox_b157: + aes32dsi x15, x11, x28, 1 # perform operation +80006058: 6bc587b3 aes32dsi x15,x11,x28,0x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b157, Zknd_aes32dsi_cg_cp_sbox_b157_str) +8000605c: 00052383 lw x7,0(x10) +80006060: 00f38863 beq x7,x15,80006070 +80006064: 1b40246f jal x8,80008218 +80006068: 80006058 .word 0x80006058 +8000606c: 80016ae0 .word 0x80016ae0 +80006070: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x9e9e9e9e +80006074: 0000a883 lw x17,0(x1) +80006078: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x9e9e9e9e +8000607c: 0000aa83 lw x21,0(x1) +80006080: 00408093 addi x1,x1,4 + +80006084 : +Zknd_aes32dsi_cg_cp_sbox_b158: + aes32dsi x14, x17, x21, 3 # perform operation +80006084: eb588733 aes32dsi x14,x17,x21,0x3 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b158, Zknd_aes32dsi_cg_cp_sbox_b158_str) +80006088: 00052383 lw x7,0(x10) +8000608c: 00e38863 beq x7,x14,8000609c +80006090: 1880246f jal x8,80008218 +80006094: 80006084 .word 0x80006084 +80006098: 80016b1a .word 0x80016b1a +8000609c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x9f9f9f9f +800060a0: 0000ac03 lw x24,0(x1) +800060a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x9f9f9f9f +800060a8: 0000ae03 lw x28,0(x1) +800060ac: 00408093 addi x1,x1,4 + +800060b0 : +Zknd_aes32dsi_cg_cp_sbox_b159: + aes32dsi x25, x24, x28, 1 # perform operation +800060b0: 6bcc0cb3 aes32dsi x25,x24,x28,0x1 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b159, Zknd_aes32dsi_cg_cp_sbox_b159_str) +800060b4: 00052383 lw x7,0(x10) +800060b8: 01938863 beq x7,x25,800060c8 +800060bc: 15c0246f jal x8,80008218 +800060c0: 800060b0 .word 0x800060b0 +800060c4: 80016b54 .word 0x80016b54 +800060c8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xa0a0a0a0 +800060cc: 0000aa03 lw x20,0(x1) +800060d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xa0a0a0a0 +800060d4: 0000ac83 lw x25,0(x1) +800060d8: 00408093 addi x1,x1,4 + +800060dc : +Zknd_aes32dsi_cg_cp_sbox_b160: + aes32dsi x18, x20, x25, 0 # perform operation +800060dc: 2b9a0933 aes32dsi x18,x20,x25,0x0 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b160, Zknd_aes32dsi_cg_cp_sbox_b160_str) +800060e0: 00052383 lw x7,0(x10) +800060e4: 01238863 beq x7,x18,800060f4 +800060e8: 1300246f jal x8,80008218 +800060ec: 800060dc .word 0x800060dc +800060f0: 80016b8e .word 0x80016b8e +800060f4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xa1a1a1a1 +800060f8: 0000a583 lw x11,0(x1) +800060fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xa1a1a1a1 +80006100: 0000a103 lw x2,0(x1) +80006104: 00408093 addi x1,x1,4 + +80006108 : +Zknd_aes32dsi_cg_cp_sbox_b161: + aes32dsi x6, x11, x2, 2 # perform operation +80006108: aa258333 aes32dsi x6,x11,x2,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b161, Zknd_aes32dsi_cg_cp_sbox_b161_str) +8000610c: 00052383 lw x7,0(x10) +80006110: 00638863 beq x7,x6,80006120 +80006114: 1040246f jal x8,80008218 +80006118: 80006108 .word 0x80006108 +8000611c: 80016bc8 .word 0x80016bc8 +80006120: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xa2a2a2a2 +80006124: 0000af03 lw x30,0(x1) +80006128: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xa2a2a2a2 +8000612c: 0000ad83 lw x27,0(x1) +80006130: 00408093 addi x1,x1,4 + +80006134 : +Zknd_aes32dsi_cg_cp_sbox_b162: + aes32dsi x9, x30, x27, 1 # perform operation +80006134: 6bbf04b3 aes32dsi x9,x30,x27,0x1 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b162, Zknd_aes32dsi_cg_cp_sbox_b162_str) +80006138: 00052383 lw x7,0(x10) +8000613c: 00938863 beq x7,x9,8000614c +80006140: 0d80246f jal x8,80008218 +80006144: 80006134 .word 0x80006134 +80006148: 80016c02 .word 0x80016c02 +8000614c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xa3a3a3a3 +80006150: 0000ac03 lw x24,0(x1) +80006154: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xa3a3a3a3 +80006158: 0000a603 lw x12,0(x1) +8000615c: 00408093 addi x1,x1,4 + +80006160 : +Zknd_aes32dsi_cg_cp_sbox_b163: + aes32dsi x16, x24, x12, 2 # perform operation +80006160: aacc0833 aes32dsi x16,x24,x12,0x2 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b163, Zknd_aes32dsi_cg_cp_sbox_b163_str) +80006164: 00052383 lw x7,0(x10) +80006168: 01038863 beq x7,x16,80006178 +8000616c: 0ac0246f jal x8,80008218 +80006170: 80006160 .word 0x80006160 +80006174: 80016c3c .word 0x80016c3c +80006178: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xa4a4a4a4 +8000617c: 0000a283 lw x5,0(x1) +80006180: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xa4a4a4a4 +80006184: 0000a603 lw x12,0(x1) +80006188: 00408093 addi x1,x1,4 + +8000618c : +Zknd_aes32dsi_cg_cp_sbox_b164: + aes32dsi x24, x5, x12, 1 # perform operation +8000618c: 6ac28c33 aes32dsi x24,x5,x12,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b164, Zknd_aes32dsi_cg_cp_sbox_b164_str) +80006190: 00052383 lw x7,0(x10) +80006194: 01838863 beq x7,x24,800061a4 +80006198: 0800246f jal x8,80008218 +8000619c: 8000618c .word 0x8000618c +800061a0: 80016c76 .word 0x80016c76 +800061a4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xa5a5a5a5 +800061a8: 0000a283 lw x5,0(x1) +800061ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xa5a5a5a5 +800061b0: 0000a203 lw x4,0(x1) +800061b4: 00408093 addi x1,x1,4 + +800061b8 : +Zknd_aes32dsi_cg_cp_sbox_b165: + aes32dsi x17, x5, x4, 1 # perform operation +800061b8: 6a4288b3 aes32dsi x17,x5,x4,0x1 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b165, Zknd_aes32dsi_cg_cp_sbox_b165_str) +800061bc: 00052383 lw x7,0(x10) +800061c0: 01138863 beq x7,x17,800061d0 +800061c4: 0540246f jal x8,80008218 +800061c8: 800061b8 .word 0x800061b8 +800061cc: 80016cb0 .word 0x80016cb0 +800061d0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xa6a6a6a6 +800061d4: 0000ad83 lw x27,0(x1) +800061d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xa6a6a6a6 +800061dc: 0000a683 lw x13,0(x1) +800061e0: 00408093 addi x1,x1,4 + +800061e4 : +Zknd_aes32dsi_cg_cp_sbox_b166: + aes32dsi x2, x27, x13, 0 # perform operation +800061e4: 2add8133 aes32dsi x2,x27,x13,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b166, Zknd_aes32dsi_cg_cp_sbox_b166_str) +800061e8: 00052383 lw x7,0(x10) +800061ec: 00238863 beq x7,x2,800061fc +800061f0: 0280246f jal x8,80008218 +800061f4: 800061e4 .word 0x800061e4 +800061f8: 80016cea .word 0x80016cea +800061fc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xa7a7a7a7 +80006200: 0000ac03 lw x24,0(x1) +80006204: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xa7a7a7a7 +80006208: 0000a803 lw x16,0(x1) +8000620c: 00408093 addi x1,x1,4 + +80006210 : +Zknd_aes32dsi_cg_cp_sbox_b167: + aes32dsi x4, x24, x16, 1 # perform operation +80006210: 6b0c0233 aes32dsi x4,x24,x16,0x1 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cp_sbox_b167, Zknd_aes32dsi_cg_cp_sbox_b167_str) +80006214: 00052383 lw x7,0(x10) +80006218: 00438863 beq x7,x4,80006228 +8000621c: 7fd0146f jal x8,80008218 +80006220: 80006210 .word 0x80006210 +80006224: 80016d24 .word 0x80016d24 +80006228: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xa8a8a8a8 +8000622c: 0000a203 lw x4,0(x1) +80006230: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xa8a8a8a8 +80006234: 0000a483 lw x9,0(x1) +80006238: 00408093 addi x1,x1,4 + +8000623c : +Zknd_aes32dsi_cg_cp_sbox_b168: + aes32dsi x3, x4, x9, 0 # perform operation +8000623c: 2a9201b3 aes32dsi x3,x4,x9,0x0 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b168, Zknd_aes32dsi_cg_cp_sbox_b168_str) +80006240: 00052383 lw x7,0(x10) +80006244: 00338863 beq x7,x3,80006254 +80006248: 7d10146f jal x8,80008218 +8000624c: 8000623c .word 0x8000623c +80006250: 80016d5e .word 0x80016d5e +80006254: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xa9a9a9a9 +80006258: 0000a103 lw x2,0(x1) +8000625c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xa9a9a9a9 +80006260: 0000a183 lw x3,0(x1) +80006264: 00408093 addi x1,x1,4 + +80006268 : +Zknd_aes32dsi_cg_cp_sbox_b169: + aes32dsi x6, x2, x3, 3 # perform operation +80006268: ea310333 aes32dsi x6,x2,x3,0x3 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b169, Zknd_aes32dsi_cg_cp_sbox_b169_str) +8000626c: 00052383 lw x7,0(x10) +80006270: 00638863 beq x7,x6,80006280 +80006274: 7a50146f jal x8,80008218 +80006278: 80006268 .word 0x80006268 +8000627c: 80016d98 .word 0x80016d98 +80006280: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xaaaaaaaa +80006284: 0000a183 lw x3,0(x1) +80006288: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xaaaaaaaa +8000628c: 0000ad83 lw x27,0(x1) +80006290: 00408093 addi x1,x1,4 + +80006294 : +Zknd_aes32dsi_cg_cp_sbox_b170: + aes32dsi x11, x3, x27, 2 # perform operation +80006294: abb185b3 aes32dsi x11,x3,x27,0x2 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b170, Zknd_aes32dsi_cg_cp_sbox_b170_str) +80006298: 00052383 lw x7,0(x10) +8000629c: 00b38863 beq x7,x11,800062ac +800062a0: 7790146f jal x8,80008218 +800062a4: 80006294 .word 0x80006294 +800062a8: 80016dd2 .word 0x80016dd2 +800062ac: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xabababab +800062b0: 0000a883 lw x17,0(x1) +800062b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xabababab +800062b8: 0000ad83 lw x27,0(x1) +800062bc: 00408093 addi x1,x1,4 + +800062c0 : +Zknd_aes32dsi_cg_cp_sbox_b171: + aes32dsi x31, x17, x27, 3 # perform operation +800062c0: ebb88fb3 aes32dsi x31,x17,x27,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b171, Zknd_aes32dsi_cg_cp_sbox_b171_str) +800062c4: 00052383 lw x7,0(x10) +800062c8: 01f38863 beq x7,x31,800062d8 +800062cc: 74d0146f jal x8,80008218 +800062d0: 800062c0 .word 0x800062c0 +800062d4: 80016e0c .word 0x80016e0c +800062d8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xacacacac +800062dc: 0000ae83 lw x29,0(x1) +800062e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xacacacac +800062e4: 0000ab03 lw x22,0(x1) +800062e8: 00408093 addi x1,x1,4 + +800062ec : +Zknd_aes32dsi_cg_cp_sbox_b172: + aes32dsi x17, x29, x22, 3 # perform operation +800062ec: eb6e88b3 aes32dsi x17,x29,x22,0x3 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b172, Zknd_aes32dsi_cg_cp_sbox_b172_str) +800062f0: 00052383 lw x7,0(x10) +800062f4: 01138863 beq x7,x17,80006304 +800062f8: 7210146f jal x8,80008218 +800062fc: 800062ec .word 0x800062ec +80006300: 80016e46 .word 0x80016e46 +80006304: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xadadadad +80006308: 0000a983 lw x19,0(x1) +8000630c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xadadadad +80006310: 0000ac83 lw x25,0(x1) +80006314: 00408093 addi x1,x1,4 + +80006318 : +Zknd_aes32dsi_cg_cp_sbox_b173: + aes32dsi x11, x19, x25, 1 # perform operation +80006318: 6b9985b3 aes32dsi x11,x19,x25,0x1 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b173, Zknd_aes32dsi_cg_cp_sbox_b173_str) +8000631c: 00052383 lw x7,0(x10) +80006320: 00b38863 beq x7,x11,80006330 +80006324: 6f50146f jal x8,80008218 +80006328: 80006318 .word 0x80006318 +8000632c: 80016e80 .word 0x80016e80 +80006330: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xaeaeaeae +80006334: 0000a583 lw x11,0(x1) +80006338: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xaeaeaeae +8000633c: 0000a103 lw x2,0(x1) +80006340: 00408093 addi x1,x1,4 + +80006344 : +Zknd_aes32dsi_cg_cp_sbox_b174: + aes32dsi x24, x11, x2, 1 # perform operation +80006344: 6a258c33 aes32dsi x24,x11,x2,0x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b174, Zknd_aes32dsi_cg_cp_sbox_b174_str) +80006348: 00052383 lw x7,0(x10) +8000634c: 01838863 beq x7,x24,8000635c +80006350: 6c90146f jal x8,80008218 +80006354: 80006344 .word 0x80006344 +80006358: 80016eba .word 0x80016eba +8000635c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xafafafaf +80006360: 0000a203 lw x4,0(x1) +80006364: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0xafafafaf +80006368: 0000a283 lw x5,0(x1) +8000636c: 00408093 addi x1,x1,4 + +80006370 : +Zknd_aes32dsi_cg_cp_sbox_b175: + aes32dsi x6, x4, x5, 2 # perform operation +80006370: aa520333 aes32dsi x6,x4,x5,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b175, Zknd_aes32dsi_cg_cp_sbox_b175_str) +80006374: 00052383 lw x7,0(x10) +80006378: 00638863 beq x7,x6,80006388 +8000637c: 69d0146f jal x8,80008218 +80006380: 80006370 .word 0x80006370 +80006384: 80016ef4 .word 0x80016ef4 +80006388: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xb0b0b0b0 +8000638c: 0000a203 lw x4,0(x1) +80006390: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xb0b0b0b0 +80006394: 0000a183 lw x3,0(x1) +80006398: 00408093 addi x1,x1,4 + +8000639c : +Zknd_aes32dsi_cg_cp_sbox_b176: + aes32dsi x14, x4, x3, 0 # perform operation +8000639c: 2a320733 aes32dsi x14,x4,x3,0x0 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b176, Zknd_aes32dsi_cg_cp_sbox_b176_str) +800063a0: 00052383 lw x7,0(x10) +800063a4: 00e38863 beq x7,x14,800063b4 +800063a8: 6710146f jal x8,80008218 +800063ac: 8000639c .word 0x8000639c +800063b0: 80016f2e .word 0x80016f2e +800063b4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xb1b1b1b1 +800063b8: 0000a803 lw x16,0(x1) +800063bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xb1b1b1b1 +800063c0: 0000a303 lw x6,0(x1) +800063c4: 00408093 addi x1,x1,4 + +800063c8 : +Zknd_aes32dsi_cg_cp_sbox_b177: + aes32dsi x31, x16, x6, 3 # perform operation +800063c8: ea680fb3 aes32dsi x31,x16,x6,0x3 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b177, Zknd_aes32dsi_cg_cp_sbox_b177_str) +800063cc: 00052383 lw x7,0(x10) +800063d0: 01f38863 beq x7,x31,800063e0 +800063d4: 6450146f jal x8,80008218 +800063d8: 800063c8 .word 0x800063c8 +800063dc: 80016f68 .word 0x80016f68 +800063e0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xb2b2b2b2 +800063e4: 0000af03 lw x30,0(x1) +800063e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xb2b2b2b2 +800063ec: 0000ac03 lw x24,0(x1) +800063f0: 00408093 addi x1,x1,4 + +800063f4 : +Zknd_aes32dsi_cg_cp_sbox_b178: + aes32dsi x6, x30, x24, 1 # perform operation +800063f4: 6b8f0333 aes32dsi x6,x30,x24,0x1 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b178, Zknd_aes32dsi_cg_cp_sbox_b178_str) +800063f8: 00052383 lw x7,0(x10) +800063fc: 00638863 beq x7,x6,8000640c +80006400: 6190146f jal x8,80008218 +80006404: 800063f4 .word 0x800063f4 +80006408: 80016fa2 .word 0x80016fa2 +8000640c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xb3b3b3b3 +80006410: 0000ae03 lw x28,0(x1) +80006414: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xb3b3b3b3 +80006418: 0000a783 lw x15,0(x1) +8000641c: 00408093 addi x1,x1,4 + +80006420 : +Zknd_aes32dsi_cg_cp_sbox_b179: + aes32dsi x27, x28, x15, 0 # perform operation +80006420: 2afe0db3 aes32dsi x27,x28,x15,0x0 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b179, Zknd_aes32dsi_cg_cp_sbox_b179_str) +80006424: 00052383 lw x7,0(x10) +80006428: 01b38863 beq x7,x27,80006438 +8000642c: 5ed0146f jal x8,80008218 +80006430: 80006420 .word 0x80006420 +80006434: 80016fdc .word 0x80016fdc +80006438: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xb4b4b4b4 +8000643c: 0000a803 lw x16,0(x1) +80006440: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xb4b4b4b4 +80006444: 0000ac83 lw x25,0(x1) +80006448: 00408093 addi x1,x1,4 + +8000644c : +Zknd_aes32dsi_cg_cp_sbox_b180: + aes32dsi x14, x16, x25, 1 # perform operation +8000644c: 6b980733 aes32dsi x14,x16,x25,0x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b180, Zknd_aes32dsi_cg_cp_sbox_b180_str) +80006450: 00052383 lw x7,0(x10) +80006454: 00e38863 beq x7,x14,80006464 +80006458: 5c10146f jal x8,80008218 +8000645c: 8000644c .word 0x8000644c +80006460: 80017016 .word 0x80017016 +80006464: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xb5b5b5b5 +80006468: 0000a783 lw x15,0(x1) +8000646c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xb5b5b5b5 +80006470: 0000ae03 lw x28,0(x1) +80006474: 00408093 addi x1,x1,4 + +80006478 : +Zknd_aes32dsi_cg_cp_sbox_b181: + aes32dsi x2, x15, x28, 0 # perform operation +80006478: 2bc78133 aes32dsi x2,x15,x28,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b181, Zknd_aes32dsi_cg_cp_sbox_b181_str) +8000647c: 00052383 lw x7,0(x10) +80006480: 00238863 beq x7,x2,80006490 +80006484: 5950146f jal x8,80008218 +80006488: 80006478 .word 0x80006478 +8000648c: 80017050 .word 0x80017050 +80006490: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xb6b6b6b6 +80006494: 0000ae83 lw x29,0(x1) +80006498: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xb6b6b6b6 +8000649c: 0000a983 lw x19,0(x1) +800064a0: 00408093 addi x1,x1,4 + +800064a4 : +Zknd_aes32dsi_cg_cp_sbox_b182: + aes32dsi x13, x29, x19, 3 # perform operation +800064a4: eb3e86b3 aes32dsi x13,x29,x19,0x3 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b182, Zknd_aes32dsi_cg_cp_sbox_b182_str) +800064a8: 00052383 lw x7,0(x10) +800064ac: 00d38863 beq x7,x13,800064bc +800064b0: 5690146f jal x8,80008218 +800064b4: 800064a4 .word 0x800064a4 +800064b8: 8001708a .word 0x8001708a +800064bc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xb7b7b7b7 +800064c0: 0000a203 lw x4,0(x1) +800064c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xb7b7b7b7 +800064c8: 0000af83 lw x31,0(x1) +800064cc: 00408093 addi x1,x1,4 + +800064d0 : +Zknd_aes32dsi_cg_cp_sbox_b183: + aes32dsi x2, x4, x31, 3 # perform operation +800064d0: ebf20133 aes32dsi x2,x4,x31,0x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b183, Zknd_aes32dsi_cg_cp_sbox_b183_str) +800064d4: 00052383 lw x7,0(x10) +800064d8: 00238863 beq x7,x2,800064e8 +800064dc: 53d0146f jal x8,80008218 +800064e0: 800064d0 .word 0x800064d0 +800064e4: 800170c4 .word 0x800170c4 +800064e8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xb8b8b8b8 +800064ec: 0000ae03 lw x28,0(x1) +800064f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xb8b8b8b8 +800064f4: 0000ab83 lw x23,0(x1) +800064f8: 00408093 addi x1,x1,4 + +800064fc : +Zknd_aes32dsi_cg_cp_sbox_b184: + aes32dsi x24, x28, x23, 3 # perform operation +800064fc: eb7e0c33 aes32dsi x24,x28,x23,0x3 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b184, Zknd_aes32dsi_cg_cp_sbox_b184_str) +80006500: 00052383 lw x7,0(x10) +80006504: 01838863 beq x7,x24,80006514 +80006508: 5110146f jal x8,80008218 +8000650c: 800064fc .word 0x800064fc +80006510: 800170fe .word 0x800170fe +80006514: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xb9b9b9b9 +80006518: 0000a683 lw x13,0(x1) +8000651c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xb9b9b9b9 +80006520: 0000a203 lw x4,0(x1) +80006524: 00408093 addi x1,x1,4 + +80006528 : +Zknd_aes32dsi_cg_cp_sbox_b185: + aes32dsi x19, x13, x4, 1 # perform operation +80006528: 6a4689b3 aes32dsi x19,x13,x4,0x1 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b185, Zknd_aes32dsi_cg_cp_sbox_b185_str) +8000652c: 00052383 lw x7,0(x10) +80006530: 01338863 beq x7,x19,80006540 +80006534: 4e50146f jal x8,80008218 +80006538: 80006528 .word 0x80006528 +8000653c: 80017138 .word 0x80017138 +80006540: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xbabababa +80006544: 0000a883 lw x17,0(x1) +80006548: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xbabababa +8000654c: 0000a203 lw x4,0(x1) +80006550: 00408093 addi x1,x1,4 + +80006554 : +Zknd_aes32dsi_cg_cp_sbox_b186: + aes32dsi x25, x17, x4, 0 # perform operation +80006554: 2a488cb3 aes32dsi x25,x17,x4,0x0 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b186, Zknd_aes32dsi_cg_cp_sbox_b186_str) +80006558: 00052383 lw x7,0(x10) +8000655c: 01938863 beq x7,x25,8000656c +80006560: 4b90146f jal x8,80008218 +80006564: 80006554 .word 0x80006554 +80006568: 80017172 .word 0x80017172 +8000656c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xbbbbbbbb +80006570: 0000aa83 lw x21,0(x1) +80006574: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xbbbbbbbb +80006578: 0000a883 lw x17,0(x1) +8000657c: 00408093 addi x1,x1,4 + +80006580 : +Zknd_aes32dsi_cg_cp_sbox_b187: + aes32dsi x20, x21, x17, 0 # perform operation +80006580: 2b1a8a33 aes32dsi x20,x21,x17,0x0 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b187, Zknd_aes32dsi_cg_cp_sbox_b187_str) +80006584: 00052383 lw x7,0(x10) +80006588: 01438863 beq x7,x20,80006598 +8000658c: 48d0146f jal x8,80008218 +80006590: 80006580 .word 0x80006580 +80006594: 800171ac .word 0x800171ac +80006598: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xbcbcbcbc +8000659c: 0000ac03 lw x24,0(x1) +800065a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xbcbcbcbc +800065a4: 0000a883 lw x17,0(x1) +800065a8: 00408093 addi x1,x1,4 + +800065ac : +Zknd_aes32dsi_cg_cp_sbox_b188: + aes32dsi x11, x24, x17, 2 # perform operation +800065ac: ab1c05b3 aes32dsi x11,x24,x17,0x2 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b188, Zknd_aes32dsi_cg_cp_sbox_b188_str) +800065b0: 00052383 lw x7,0(x10) +800065b4: 00b38863 beq x7,x11,800065c4 +800065b8: 4610146f jal x8,80008218 +800065bc: 800065ac .word 0x800065ac +800065c0: 800171e6 .word 0x800171e6 +800065c4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xbdbdbdbd +800065c8: 0000aa83 lw x21,0(x1) +800065cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xbdbdbdbd +800065d0: 0000a683 lw x13,0(x1) +800065d4: 00408093 addi x1,x1,4 + +800065d8 : +Zknd_aes32dsi_cg_cp_sbox_b189: + aes32dsi x18, x21, x13, 1 # perform operation +800065d8: 6ada8933 aes32dsi x18,x21,x13,0x1 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b189, Zknd_aes32dsi_cg_cp_sbox_b189_str) +800065dc: 00052383 lw x7,0(x10) +800065e0: 01238863 beq x7,x18,800065f0 +800065e4: 4350146f jal x8,80008218 +800065e8: 800065d8 .word 0x800065d8 +800065ec: 80017220 .word 0x80017220 +800065f0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xbebebebe +800065f4: 0000ac03 lw x24,0(x1) +800065f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xbebebebe +800065fc: 0000a203 lw x4,0(x1) +80006600: 00408093 addi x1,x1,4 + +80006604 : +Zknd_aes32dsi_cg_cp_sbox_b190: + aes32dsi x2, x24, x4, 3 # perform operation +80006604: ea4c0133 aes32dsi x2,x24,x4,0x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b190, Zknd_aes32dsi_cg_cp_sbox_b190_str) +80006608: 00052383 lw x7,0(x10) +8000660c: 00238863 beq x7,x2,8000661c +80006610: 4090146f jal x8,80008218 +80006614: 80006604 .word 0x80006604 +80006618: 8001725a .word 0x8001725a +8000661c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xbfbfbfbf +80006620: 0000ac03 lw x24,0(x1) +80006624: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xbfbfbfbf +80006628: 0000ae83 lw x29,0(x1) +8000662c: 00408093 addi x1,x1,4 + +80006630 : +Zknd_aes32dsi_cg_cp_sbox_b191: + aes32dsi x6, x24, x29, 3 # perform operation +80006630: ebdc0333 aes32dsi x6,x24,x29,0x3 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b191, Zknd_aes32dsi_cg_cp_sbox_b191_str) +80006634: 00052383 lw x7,0(x10) +80006638: 00638863 beq x7,x6,80006648 +8000663c: 3dd0146f jal x8,80008218 +80006640: 80006630 .word 0x80006630 +80006644: 80017294 .word 0x80017294 +80006648: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xc0c0c0c0 +8000664c: 0000a683 lw x13,0(x1) +80006650: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xc0c0c0c0 +80006654: 0000a483 lw x9,0(x1) +80006658: 00408093 addi x1,x1,4 + +8000665c : +Zknd_aes32dsi_cg_cp_sbox_b192: + aes32dsi x23, x13, x9, 1 # perform operation +8000665c: 6a968bb3 aes32dsi x23,x13,x9,0x1 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b192, Zknd_aes32dsi_cg_cp_sbox_b192_str) +80006660: 00052383 lw x7,0(x10) +80006664: 01738863 beq x7,x23,80006674 +80006668: 3b10146f jal x8,80008218 +8000666c: 8000665c .word 0x8000665c +80006670: 800172ce .word 0x800172ce +80006674: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xc1c1c1c1 +80006678: 0000a203 lw x4,0(x1) +8000667c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xc1c1c1c1 +80006680: 0000a803 lw x16,0(x1) +80006684: 00408093 addi x1,x1,4 + +80006688 : +Zknd_aes32dsi_cg_cp_sbox_b193: + aes32dsi x14, x4, x16, 3 # perform operation +80006688: eb020733 aes32dsi x14,x4,x16,0x3 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b193, Zknd_aes32dsi_cg_cp_sbox_b193_str) +8000668c: 00052383 lw x7,0(x10) +80006690: 00e38863 beq x7,x14,800066a0 +80006694: 3850146f jal x8,80008218 +80006698: 80006688 .word 0x80006688 +8000669c: 80017308 .word 0x80017308 +800066a0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xc2c2c2c2 +800066a4: 0000ab03 lw x22,0(x1) +800066a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xc2c2c2c2 +800066ac: 0000a783 lw x15,0(x1) +800066b0: 00408093 addi x1,x1,4 + +800066b4 : +Zknd_aes32dsi_cg_cp_sbox_b194: + aes32dsi x6, x22, x15, 2 # perform operation +800066b4: aafb0333 aes32dsi x6,x22,x15,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b194, Zknd_aes32dsi_cg_cp_sbox_b194_str) +800066b8: 00052383 lw x7,0(x10) +800066bc: 00638863 beq x7,x6,800066cc +800066c0: 3590146f jal x8,80008218 +800066c4: 800066b4 .word 0x800066b4 +800066c8: 80017342 .word 0x80017342 +800066cc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xc3c3c3c3 +800066d0: 0000a103 lw x2,0(x1) +800066d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xc3c3c3c3 +800066d8: 0000a483 lw x9,0(x1) +800066dc: 00408093 addi x1,x1,4 + +800066e0 : +Zknd_aes32dsi_cg_cp_sbox_b195: + aes32dsi x22, x2, x9, 1 # perform operation +800066e0: 6a910b33 aes32dsi x22,x2,x9,0x1 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b195, Zknd_aes32dsi_cg_cp_sbox_b195_str) +800066e4: 00052383 lw x7,0(x10) +800066e8: 01638863 beq x7,x22,800066f8 +800066ec: 32d0146f jal x8,80008218 +800066f0: 800066e0 .word 0x800066e0 +800066f4: 8001737c .word 0x8001737c +800066f8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xc4c4c4c4 +800066fc: 0000a583 lw x11,0(x1) +80006700: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xc4c4c4c4 +80006704: 0000ab83 lw x23,0(x1) +80006708: 00408093 addi x1,x1,4 + +8000670c : +Zknd_aes32dsi_cg_cp_sbox_b196: + aes32dsi x15, x11, x23, 1 # perform operation +8000670c: 6b7587b3 aes32dsi x15,x11,x23,0x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b196, Zknd_aes32dsi_cg_cp_sbox_b196_str) +80006710: 00052383 lw x7,0(x10) +80006714: 00f38863 beq x7,x15,80006724 +80006718: 3010146f jal x8,80008218 +8000671c: 8000670c .word 0x8000670c +80006720: 800173b6 .word 0x800173b6 +80006724: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xc5c5c5c5 +80006728: 0000ab83 lw x23,0(x1) +8000672c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xc5c5c5c5 +80006730: 0000ac03 lw x24,0(x1) +80006734: 00408093 addi x1,x1,4 + +80006738 : +Zknd_aes32dsi_cg_cp_sbox_b197: + aes32dsi x15, x23, x24, 1 # perform operation +80006738: 6b8b87b3 aes32dsi x15,x23,x24,0x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b197, Zknd_aes32dsi_cg_cp_sbox_b197_str) +8000673c: 00052383 lw x7,0(x10) +80006740: 00f38863 beq x7,x15,80006750 +80006744: 2d50146f jal x8,80008218 +80006748: 80006738 .word 0x80006738 +8000674c: 800173f0 .word 0x800173f0 +80006750: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xc6c6c6c6 +80006754: 0000a983 lw x19,0(x1) +80006758: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xc6c6c6c6 +8000675c: 0000a303 lw x6,0(x1) +80006760: 00408093 addi x1,x1,4 + +80006764 : +Zknd_aes32dsi_cg_cp_sbox_b198: + aes32dsi x12, x19, x6, 2 # perform operation +80006764: aa698633 aes32dsi x12,x19,x6,0x2 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknd_aes32dsi_cg_cp_sbox_b198, Zknd_aes32dsi_cg_cp_sbox_b198_str) +80006768: 00052383 lw x7,0(x10) +8000676c: 00c38863 beq x7,x12,8000677c +80006770: 2a90146f jal x8,80008218 +80006774: 80006764 .word 0x80006764 +80006778: 8001742a .word 0x8001742a +8000677c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xc7c7c7c7 +80006780: 0000a783 lw x15,0(x1) +80006784: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xc7c7c7c7 +80006788: 0000ab03 lw x22,0(x1) +8000678c: 00408093 addi x1,x1,4 + +80006790 : +Zknd_aes32dsi_cg_cp_sbox_b199: + aes32dsi x4, x15, x22, 3 # perform operation +80006790: eb678233 aes32dsi x4,x15,x22,0x3 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cp_sbox_b199, Zknd_aes32dsi_cg_cp_sbox_b199_str) +80006794: 00052383 lw x7,0(x10) +80006798: 00438863 beq x7,x4,800067a8 +8000679c: 27d0146f jal x8,80008218 +800067a0: 80006790 .word 0x80006790 +800067a4: 80017464 .word 0x80017464 +800067a8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xc8c8c8c8 +800067ac: 0000aa83 lw x21,0(x1) +800067b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xc8c8c8c8 +800067b4: 0000af03 lw x30,0(x1) +800067b8: 00408093 addi x1,x1,4 + +800067bc : +Zknd_aes32dsi_cg_cp_sbox_b200: + aes32dsi x16, x21, x30, 0 # perform operation +800067bc: 2bea8833 aes32dsi x16,x21,x30,0x0 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b200, Zknd_aes32dsi_cg_cp_sbox_b200_str) +800067c0: 00052383 lw x7,0(x10) +800067c4: 01038863 beq x7,x16,800067d4 +800067c8: 2510146f jal x8,80008218 +800067cc: 800067bc .word 0x800067bc +800067d0: 8001749e .word 0x8001749e +800067d4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xc9c9c9c9 +800067d8: 0000a483 lw x9,0(x1) +800067dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xc9c9c9c9 +800067e0: 0000a983 lw x19,0(x1) +800067e4: 00408093 addi x1,x1,4 + +800067e8 : +Zknd_aes32dsi_cg_cp_sbox_b201: + aes32dsi x21, x9, x19, 3 # perform operation +800067e8: eb348ab3 aes32dsi x21,x9,x19,0x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b201, Zknd_aes32dsi_cg_cp_sbox_b201_str) +800067ec: 00052383 lw x7,0(x10) +800067f0: 01538863 beq x7,x21,80006800 +800067f4: 2250146f jal x8,80008218 +800067f8: 800067e8 .word 0x800067e8 +800067fc: 800174d8 .word 0x800174d8 +80006800: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xcacacaca +80006804: 0000ad83 lw x27,0(x1) +80006808: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xcacacaca +8000680c: 0000a983 lw x19,0(x1) +80006810: 00408093 addi x1,x1,4 + +80006814 : +Zknd_aes32dsi_cg_cp_sbox_b202: + aes32dsi x14, x27, x19, 3 # perform operation +80006814: eb3d8733 aes32dsi x14,x27,x19,0x3 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b202, Zknd_aes32dsi_cg_cp_sbox_b202_str) +80006818: 00052383 lw x7,0(x10) +8000681c: 00e38863 beq x7,x14,8000682c +80006820: 1f90146f jal x8,80008218 +80006824: 80006814 .word 0x80006814 +80006828: 80017512 .word 0x80017512 +8000682c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xcbcbcbcb +80006830: 0000a983 lw x19,0(x1) +80006834: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xcbcbcbcb +80006838: 0000ae03 lw x28,0(x1) +8000683c: 00408093 addi x1,x1,4 + +80006840 : +Zknd_aes32dsi_cg_cp_sbox_b203: + aes32dsi x23, x19, x28, 1 # perform operation +80006840: 6bc98bb3 aes32dsi x23,x19,x28,0x1 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b203, Zknd_aes32dsi_cg_cp_sbox_b203_str) +80006844: 00052383 lw x7,0(x10) +80006848: 01738863 beq x7,x23,80006858 +8000684c: 1cd0146f jal x8,80008218 +80006850: 80006840 .word 0x80006840 +80006854: 8001754c .word 0x8001754c +80006858: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xcccccccc +8000685c: 0000a703 lw x14,0(x1) +80006860: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xcccccccc +80006864: 0000ab03 lw x22,0(x1) +80006868: 00408093 addi x1,x1,4 + +8000686c : +Zknd_aes32dsi_cg_cp_sbox_b204: + aes32dsi x25, x14, x22, 1 # perform operation +8000686c: 6b670cb3 aes32dsi x25,x14,x22,0x1 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b204, Zknd_aes32dsi_cg_cp_sbox_b204_str) +80006870: 00052383 lw x7,0(x10) +80006874: 01938863 beq x7,x25,80006884 +80006878: 1a10146f jal x8,80008218 +8000687c: 8000686c .word 0x8000686c +80006880: 80017586 .word 0x80017586 +80006884: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xcdcdcdcd +80006888: 0000ac03 lw x24,0(x1) +8000688c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xcdcdcdcd +80006890: 0000a483 lw x9,0(x1) +80006894: 00408093 addi x1,x1,4 + +80006898 : +Zknd_aes32dsi_cg_cp_sbox_b205: + aes32dsi x23, x24, x9, 2 # perform operation +80006898: aa9c0bb3 aes32dsi x23,x24,x9,0x2 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b205, Zknd_aes32dsi_cg_cp_sbox_b205_str) +8000689c: 00052383 lw x7,0(x10) +800068a0: 01738863 beq x7,x23,800068b0 +800068a4: 1750146f jal x8,80008218 +800068a8: 80006898 .word 0x80006898 +800068ac: 800175c0 .word 0x800175c0 +800068b0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xcececece +800068b4: 0000ae03 lw x28,0(x1) +800068b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xcececece +800068bc: 0000a303 lw x6,0(x1) +800068c0: 00408093 addi x1,x1,4 + +800068c4 : +Zknd_aes32dsi_cg_cp_sbox_b206: + aes32dsi x19, x28, x6, 3 # perform operation +800068c4: ea6e09b3 aes32dsi x19,x28,x6,0x3 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b206, Zknd_aes32dsi_cg_cp_sbox_b206_str) +800068c8: 00052383 lw x7,0(x10) +800068cc: 01338863 beq x7,x19,800068dc +800068d0: 1490146f jal x8,80008218 +800068d4: 800068c4 .word 0x800068c4 +800068d8: 800175fa .word 0x800175fa +800068dc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xcfcfcfcf +800068e0: 0000a303 lw x6,0(x1) +800068e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xcfcfcfcf +800068e8: 0000af83 lw x31,0(x1) +800068ec: 00408093 addi x1,x1,4 + +800068f0 : +Zknd_aes32dsi_cg_cp_sbox_b207: + aes32dsi x29, x6, x31, 3 # perform operation +800068f0: ebf30eb3 aes32dsi x29,x6,x31,0x3 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b207, Zknd_aes32dsi_cg_cp_sbox_b207_str) +800068f4: 00052383 lw x7,0(x10) +800068f8: 01d38863 beq x7,x29,80006908 +800068fc: 11d0146f jal x8,80008218 +80006900: 800068f0 .word 0x800068f0 +80006904: 80017634 .word 0x80017634 +80006908: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xd0d0d0d0 +8000690c: 0000a783 lw x15,0(x1) +80006910: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xd0d0d0d0 +80006914: 0000a903 lw x18,0(x1) +80006918: 00408093 addi x1,x1,4 + +8000691c : +Zknd_aes32dsi_cg_cp_sbox_b208: + aes32dsi x24, x15, x18, 3 # perform operation +8000691c: eb278c33 aes32dsi x24,x15,x18,0x3 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b208, Zknd_aes32dsi_cg_cp_sbox_b208_str) +80006920: 00052383 lw x7,0(x10) +80006924: 01838863 beq x7,x24,80006934 +80006928: 0f10146f jal x8,80008218 +8000692c: 8000691c .word 0x8000691c +80006930: 8001766e .word 0x8001766e +80006934: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xd1d1d1d1 +80006938: 0000af83 lw x31,0(x1) +8000693c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xd1d1d1d1 +80006940: 0000a783 lw x15,0(x1) +80006944: 00408093 addi x1,x1,4 + +80006948 : +Zknd_aes32dsi_cg_cp_sbox_b209: + aes32dsi x25, x31, x15, 1 # perform operation +80006948: 6aff8cb3 aes32dsi x25,x31,x15,0x1 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b209, Zknd_aes32dsi_cg_cp_sbox_b209_str) +8000694c: 00052383 lw x7,0(x10) +80006950: 01938863 beq x7,x25,80006960 +80006954: 0c50146f jal x8,80008218 +80006958: 80006948 .word 0x80006948 +8000695c: 800176a8 .word 0x800176a8 +80006960: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xd2d2d2d2 +80006964: 0000a483 lw x9,0(x1) +80006968: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xd2d2d2d2 +8000696c: 0000a803 lw x16,0(x1) +80006970: 00408093 addi x1,x1,4 + +80006974 : +Zknd_aes32dsi_cg_cp_sbox_b210: + aes32dsi x29, x9, x16, 1 # perform operation +80006974: 6b048eb3 aes32dsi x29,x9,x16,0x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b210, Zknd_aes32dsi_cg_cp_sbox_b210_str) +80006978: 00052383 lw x7,0(x10) +8000697c: 01d38863 beq x7,x29,8000698c +80006980: 0990146f jal x8,80008218 +80006984: 80006974 .word 0x80006974 +80006988: 800176e2 .word 0x800176e2 +8000698c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xd3d3d3d3 +80006990: 0000a183 lw x3,0(x1) +80006994: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xd3d3d3d3 +80006998: 0000aa03 lw x20,0(x1) +8000699c: 00408093 addi x1,x1,4 + +800069a0 : +Zknd_aes32dsi_cg_cp_sbox_b211: + aes32dsi x2, x3, x20, 0 # perform operation +800069a0: 2b418133 aes32dsi x2,x3,x20,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b211, Zknd_aes32dsi_cg_cp_sbox_b211_str) +800069a4: 00052383 lw x7,0(x10) +800069a8: 00238863 beq x7,x2,800069b8 +800069ac: 06d0146f jal x8,80008218 +800069b0: 800069a0 .word 0x800069a0 +800069b4: 8001771c .word 0x8001771c +800069b8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xd4d4d4d4 +800069bc: 0000ab83 lw x23,0(x1) +800069c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xd4d4d4d4 +800069c4: 0000ac03 lw x24,0(x1) +800069c8: 00408093 addi x1,x1,4 + +800069cc : +Zknd_aes32dsi_cg_cp_sbox_b212: + aes32dsi x18, x23, x24, 0 # perform operation +800069cc: 2b8b8933 aes32dsi x18,x23,x24,0x0 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknd_aes32dsi_cg_cp_sbox_b212, Zknd_aes32dsi_cg_cp_sbox_b212_str) +800069d0: 00052383 lw x7,0(x10) +800069d4: 01238863 beq x7,x18,800069e4 +800069d8: 0410146f jal x8,80008218 +800069dc: 800069cc .word 0x800069cc +800069e0: 80017756 .word 0x80017756 +800069e4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xd5d5d5d5 +800069e8: 0000a283 lw x5,0(x1) +800069ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xd5d5d5d5 +800069f0: 0000af03 lw x30,0(x1) +800069f4: 00408093 addi x1,x1,4 + +800069f8 : +Zknd_aes32dsi_cg_cp_sbox_b213: + aes32dsi x24, x5, x30, 2 # perform operation +800069f8: abe28c33 aes32dsi x24,x5,x30,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b213, Zknd_aes32dsi_cg_cp_sbox_b213_str) +800069fc: 00052383 lw x7,0(x10) +80006a00: 01838863 beq x7,x24,80006a10 +80006a04: 0150146f jal x8,80008218 +80006a08: 800069f8 .word 0x800069f8 +80006a0c: 80017790 .word 0x80017790 +80006a10: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xd6d6d6d6 +80006a14: 0000a203 lw x4,0(x1) +80006a18: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xd6d6d6d6 +80006a1c: 0000a903 lw x18,0(x1) +80006a20: 00408093 addi x1,x1,4 + +80006a24 : +Zknd_aes32dsi_cg_cp_sbox_b214: + aes32dsi x3, x4, x18, 3 # perform operation +80006a24: eb2201b3 aes32dsi x3,x4,x18,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b214, Zknd_aes32dsi_cg_cp_sbox_b214_str) +80006a28: 00052383 lw x7,0(x10) +80006a2c: 00338863 beq x7,x3,80006a3c +80006a30: 7e80146f jal x8,80008218 +80006a34: 80006a24 .word 0x80006a24 +80006a38: 800177ca .word 0x800177ca +80006a3c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xd7d7d7d7 +80006a40: 0000a703 lw x14,0(x1) +80006a44: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xd7d7d7d7 +80006a48: 0000aa83 lw x21,0(x1) +80006a4c: 00408093 addi x1,x1,4 + +80006a50 : +Zknd_aes32dsi_cg_cp_sbox_b215: + aes32dsi x29, x14, x21, 3 # perform operation +80006a50: eb570eb3 aes32dsi x29,x14,x21,0x3 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknd_aes32dsi_cg_cp_sbox_b215, Zknd_aes32dsi_cg_cp_sbox_b215_str) +80006a54: 00052383 lw x7,0(x10) +80006a58: 01d38863 beq x7,x29,80006a68 +80006a5c: 7bc0146f jal x8,80008218 +80006a60: 80006a50 .word 0x80006a50 +80006a64: 80017804 .word 0x80017804 +80006a68: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xd8d8d8d8 +80006a6c: 0000ab03 lw x22,0(x1) +80006a70: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xd8d8d8d8 +80006a74: 0000a883 lw x17,0(x1) +80006a78: 00408093 addi x1,x1,4 + +80006a7c : +Zknd_aes32dsi_cg_cp_sbox_b216: + aes32dsi x14, x22, x17, 1 # perform operation +80006a7c: 6b1b0733 aes32dsi x14,x22,x17,0x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b216, Zknd_aes32dsi_cg_cp_sbox_b216_str) +80006a80: 00052383 lw x7,0(x10) +80006a84: 00e38863 beq x7,x14,80006a94 +80006a88: 7900146f jal x8,80008218 +80006a8c: 80006a7c .word 0x80006a7c +80006a90: 8001783e .word 0x8001783e +80006a94: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xd9d9d9d9 +80006a98: 0000a683 lw x13,0(x1) +80006a9c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xd9d9d9d9 +80006aa0: 0000a583 lw x11,0(x1) +80006aa4: 00408093 addi x1,x1,4 + +80006aa8 : +Zknd_aes32dsi_cg_cp_sbox_b217: + aes32dsi x28, x13, x11, 2 # perform operation +80006aa8: aab68e33 aes32dsi x28,x13,x11,0x2 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknd_aes32dsi_cg_cp_sbox_b217, Zknd_aes32dsi_cg_cp_sbox_b217_str) +80006aac: 00052383 lw x7,0(x10) +80006ab0: 01c38863 beq x7,x28,80006ac0 +80006ab4: 7640146f jal x8,80008218 +80006ab8: 80006aa8 .word 0x80006aa8 +80006abc: 80017878 .word 0x80017878 +80006ac0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xdadadada +80006ac4: 0000ad03 lw x26,0(x1) +80006ac8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xdadadada +80006acc: 0000ac83 lw x25,0(x1) +80006ad0: 00408093 addi x1,x1,4 + +80006ad4 : +Zknd_aes32dsi_cg_cp_sbox_b218: + aes32dsi x22, x26, x25, 0 # perform operation +80006ad4: 2b9d0b33 aes32dsi x22,x26,x25,0x0 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknd_aes32dsi_cg_cp_sbox_b218, Zknd_aes32dsi_cg_cp_sbox_b218_str) +80006ad8: 00052383 lw x7,0(x10) +80006adc: 01638863 beq x7,x22,80006aec +80006ae0: 7380146f jal x8,80008218 +80006ae4: 80006ad4 .word 0x80006ad4 +80006ae8: 800178b2 .word 0x800178b2 +80006aec: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xdbdbdbdb +80006af0: 0000a203 lw x4,0(x1) +80006af4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xdbdbdbdb +80006af8: 0000a903 lw x18,0(x1) +80006afc: 00408093 addi x1,x1,4 + +80006b00 : +Zknd_aes32dsi_cg_cp_sbox_b219: + aes32dsi x21, x4, x18, 3 # perform operation +80006b00: eb220ab3 aes32dsi x21,x4,x18,0x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknd_aes32dsi_cg_cp_sbox_b219, Zknd_aes32dsi_cg_cp_sbox_b219_str) +80006b04: 00052383 lw x7,0(x10) +80006b08: 01538863 beq x7,x21,80006b18 +80006b0c: 70c0146f jal x8,80008218 +80006b10: 80006b00 .word 0x80006b00 +80006b14: 800178ec .word 0x800178ec +80006b18: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xdcdcdcdc +80006b1c: 0000a283 lw x5,0(x1) +80006b20: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xdcdcdcdc +80006b24: 0000ad83 lw x27,0(x1) +80006b28: 00408093 addi x1,x1,4 + +80006b2c : +Zknd_aes32dsi_cg_cp_sbox_b220: + aes32dsi x9, x5, x27, 3 # perform operation +80006b2c: ebb284b3 aes32dsi x9,x5,x27,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b220, Zknd_aes32dsi_cg_cp_sbox_b220_str) +80006b30: 00052383 lw x7,0(x10) +80006b34: 00938863 beq x7,x9,80006b44 +80006b38: 6e00146f jal x8,80008218 +80006b3c: 80006b2c .word 0x80006b2c +80006b40: 80017926 .word 0x80017926 +80006b44: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xdddddddd +80006b48: 0000ac83 lw x25,0(x1) +80006b4c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xdddddddd +80006b50: 0000a983 lw x19,0(x1) +80006b54: 00408093 addi x1,x1,4 + +80006b58 : +Zknd_aes32dsi_cg_cp_sbox_b221: + aes32dsi x30, x25, x19, 2 # perform operation +80006b58: ab3c8f33 aes32dsi x30,x25,x19,0x2 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b221, Zknd_aes32dsi_cg_cp_sbox_b221_str) +80006b5c: 00052383 lw x7,0(x10) +80006b60: 01e38863 beq x7,x30,80006b70 +80006b64: 6b40146f jal x8,80008218 +80006b68: 80006b58 .word 0x80006b58 +80006b6c: 80017960 .word 0x80017960 +80006b70: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xdededede +80006b74: 0000af03 lw x30,0(x1) +80006b78: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xdededede +80006b7c: 0000a303 lw x6,0(x1) +80006b80: 00408093 addi x1,x1,4 + +80006b84 : +Zknd_aes32dsi_cg_cp_sbox_b222: + aes32dsi x23, x30, x6, 0 # perform operation +80006b84: 2a6f0bb3 aes32dsi x23,x30,x6,0x0 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b222, Zknd_aes32dsi_cg_cp_sbox_b222_str) +80006b88: 00052383 lw x7,0(x10) +80006b8c: 01738863 beq x7,x23,80006b9c +80006b90: 6880146f jal x8,80008218 +80006b94: 80006b84 .word 0x80006b84 +80006b98: 8001799a .word 0x8001799a +80006b9c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xdfdfdfdf +80006ba0: 0000a203 lw x4,0(x1) +80006ba4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xdfdfdfdf +80006ba8: 0000a903 lw x18,0(x1) +80006bac: 00408093 addi x1,x1,4 + +80006bb0 : +Zknd_aes32dsi_cg_cp_sbox_b223: + aes32dsi x3, x4, x18, 0 # perform operation +80006bb0: 2b2201b3 aes32dsi x3,x4,x18,0x0 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b223, Zknd_aes32dsi_cg_cp_sbox_b223_str) +80006bb4: 00052383 lw x7,0(x10) +80006bb8: 00338863 beq x7,x3,80006bc8 +80006bbc: 65c0146f jal x8,80008218 +80006bc0: 80006bb0 .word 0x80006bb0 +80006bc4: 800179d4 .word 0x800179d4 +80006bc8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xe0e0e0e0 +80006bcc: 0000a303 lw x6,0(x1) +80006bd0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xe0e0e0e0 +80006bd4: 0000af83 lw x31,0(x1) +80006bd8: 00408093 addi x1,x1,4 + +80006bdc : +Zknd_aes32dsi_cg_cp_sbox_b224: + aes32dsi x24, x6, x31, 2 # perform operation +80006bdc: abf30c33 aes32dsi x24,x6,x31,0x2 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zknd_aes32dsi_cg_cp_sbox_b224, Zknd_aes32dsi_cg_cp_sbox_b224_str) +80006be0: 00052383 lw x7,0(x10) +80006be4: 01838863 beq x7,x24,80006bf4 +80006be8: 6300146f jal x8,80008218 +80006bec: 80006bdc .word 0x80006bdc +80006bf0: 80017a0e .word 0x80017a0e +80006bf4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xe1e1e1e1 +80006bf8: 0000a283 lw x5,0(x1) +80006bfc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xe1e1e1e1 +80006c00: 0000ad83 lw x27,0(x1) +80006c04: 00408093 addi x1,x1,4 + +80006c08 : +Zknd_aes32dsi_cg_cp_sbox_b225: + aes32dsi x11, x5, x27, 3 # perform operation +80006c08: ebb285b3 aes32dsi x11,x5,x27,0x3 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknd_aes32dsi_cg_cp_sbox_b225, Zknd_aes32dsi_cg_cp_sbox_b225_str) +80006c0c: 00052383 lw x7,0(x10) +80006c10: 00b38863 beq x7,x11,80006c20 +80006c14: 6040146f jal x8,80008218 +80006c18: 80006c08 .word 0x80006c08 +80006c1c: 80017a48 .word 0x80017a48 +80006c20: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xe2e2e2e2 +80006c24: 0000af03 lw x30,0(x1) +80006c28: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xe2e2e2e2 +80006c2c: 0000ae03 lw x28,0(x1) +80006c30: 00408093 addi x1,x1,4 + +80006c34 : +Zknd_aes32dsi_cg_cp_sbox_b226: + aes32dsi x19, x30, x28, 3 # perform operation +80006c34: ebcf09b3 aes32dsi x19,x30,x28,0x3 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b226, Zknd_aes32dsi_cg_cp_sbox_b226_str) +80006c38: 00052383 lw x7,0(x10) +80006c3c: 01338863 beq x7,x19,80006c4c +80006c40: 5d80146f jal x8,80008218 +80006c44: 80006c34 .word 0x80006c34 +80006c48: 80017a82 .word 0x80017a82 +80006c4c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xe3e3e3e3 +80006c50: 0000ab03 lw x22,0(x1) +80006c54: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xe3e3e3e3 +80006c58: 0000a203 lw x4,0(x1) +80006c5c: 00408093 addi x1,x1,4 + +80006c60 : +Zknd_aes32dsi_cg_cp_sbox_b227: + aes32dsi x17, x22, x4, 1 # perform operation +80006c60: 6a4b08b3 aes32dsi x17,x22,x4,0x1 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b227, Zknd_aes32dsi_cg_cp_sbox_b227_str) +80006c64: 00052383 lw x7,0(x10) +80006c68: 01138863 beq x7,x17,80006c78 +80006c6c: 5ac0146f jal x8,80008218 +80006c70: 80006c60 .word 0x80006c60 +80006c74: 80017abc .word 0x80017abc +80006c78: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xe4e4e4e4 +80006c7c: 0000aa03 lw x20,0(x1) +80006c80: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xe4e4e4e4 +80006c84: 0000ac83 lw x25,0(x1) +80006c88: 00408093 addi x1,x1,4 + +80006c8c : +Zknd_aes32dsi_cg_cp_sbox_b228: + aes32dsi x3, x20, x25, 0 # perform operation +80006c8c: 2b9a01b3 aes32dsi x3,x20,x25,0x0 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknd_aes32dsi_cg_cp_sbox_b228, Zknd_aes32dsi_cg_cp_sbox_b228_str) +80006c90: 00052383 lw x7,0(x10) +80006c94: 00338863 beq x7,x3,80006ca4 +80006c98: 5800146f jal x8,80008218 +80006c9c: 80006c8c .word 0x80006c8c +80006ca0: 80017af6 .word 0x80017af6 +80006ca4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xe5e5e5e5 +80006ca8: 0000aa03 lw x20,0(x1) +80006cac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xe5e5e5e5 +80006cb0: 0000ab03 lw x22,0(x1) +80006cb4: 00408093 addi x1,x1,4 + +80006cb8 : +Zknd_aes32dsi_cg_cp_sbox_b229: + aes32dsi x14, x20, x22, 3 # perform operation +80006cb8: eb6a0733 aes32dsi x14,x20,x22,0x3 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknd_aes32dsi_cg_cp_sbox_b229, Zknd_aes32dsi_cg_cp_sbox_b229_str) +80006cbc: 00052383 lw x7,0(x10) +80006cc0: 00e38863 beq x7,x14,80006cd0 +80006cc4: 5540146f jal x8,80008218 +80006cc8: 80006cb8 .word 0x80006cb8 +80006ccc: 80017b30 .word 0x80017b30 +80006cd0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xe6e6e6e6 +80006cd4: 0000a483 lw x9,0(x1) +80006cd8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xe6e6e6e6 +80006cdc: 0000ae83 lw x29,0(x1) +80006ce0: 00408093 addi x1,x1,4 + +80006ce4 : +Zknd_aes32dsi_cg_cp_sbox_b230: + aes32dsi x19, x9, x29, 0 # perform operation +80006ce4: 2bd489b3 aes32dsi x19,x9,x29,0x0 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b230, Zknd_aes32dsi_cg_cp_sbox_b230_str) +80006ce8: 00052383 lw x7,0(x10) +80006cec: 01338863 beq x7,x19,80006cfc +80006cf0: 5280146f jal x8,80008218 +80006cf4: 80006ce4 .word 0x80006ce4 +80006cf8: 80017b6a .word 0x80017b6a +80006cfc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xe7e7e7e7 +80006d00: 0000a483 lw x9,0(x1) +80006d04: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xe7e7e7e7 +80006d08: 0000ae83 lw x29,0(x1) +80006d0c: 00408093 addi x1,x1,4 + +80006d10 : +Zknd_aes32dsi_cg_cp_sbox_b231: + aes32dsi x30, x9, x29, 1 # perform operation +80006d10: 6bd48f33 aes32dsi x30,x9,x29,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b231, Zknd_aes32dsi_cg_cp_sbox_b231_str) +80006d14: 00052383 lw x7,0(x10) +80006d18: 01e38863 beq x7,x30,80006d28 +80006d1c: 4fc0146f jal x8,80008218 +80006d20: 80006d10 .word 0x80006d10 +80006d24: 80017ba4 .word 0x80017ba4 +80006d28: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xe8e8e8e8 +80006d2c: 0000ac03 lw x24,0(x1) +80006d30: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xe8e8e8e8 +80006d34: 0000a703 lw x14,0(x1) +80006d38: 00408093 addi x1,x1,4 + +80006d3c : +Zknd_aes32dsi_cg_cp_sbox_b232: + aes32dsi x27, x24, x14, 3 # perform operation +80006d3c: eaec0db3 aes32dsi x27,x24,x14,0x3 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b232, Zknd_aes32dsi_cg_cp_sbox_b232_str) +80006d40: 00052383 lw x7,0(x10) +80006d44: 01b38863 beq x7,x27,80006d54 +80006d48: 4d00146f jal x8,80008218 +80006d4c: 80006d3c .word 0x80006d3c +80006d50: 80017bde .word 0x80017bde +80006d54: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xe9e9e9e9 +80006d58: 0000ab83 lw x23,0(x1) +80006d5c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xe9e9e9e9 +80006d60: 0000a103 lw x2,0(x1) +80006d64: 00408093 addi x1,x1,4 + +80006d68 : +Zknd_aes32dsi_cg_cp_sbox_b233: + aes32dsi x27, x23, x2, 2 # perform operation +80006d68: aa2b8db3 aes32dsi x27,x23,x2,0x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b233, Zknd_aes32dsi_cg_cp_sbox_b233_str) +80006d6c: 00052383 lw x7,0(x10) +80006d70: 01b38863 beq x7,x27,80006d80 +80006d74: 4a40146f jal x8,80008218 +80006d78: 80006d68 .word 0x80006d68 +80006d7c: 80017c18 .word 0x80017c18 +80006d80: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xeaeaeaea +80006d84: 0000a303 lw x6,0(x1) +80006d88: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xeaeaeaea +80006d8c: 0000a983 lw x19,0(x1) +80006d90: 00408093 addi x1,x1,4 + +80006d94 : +Zknd_aes32dsi_cg_cp_sbox_b234: + aes32dsi x15, x6, x19, 2 # perform operation +80006d94: ab3307b3 aes32dsi x15,x6,x19,0x2 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zknd_aes32dsi_cg_cp_sbox_b234, Zknd_aes32dsi_cg_cp_sbox_b234_str) +80006d98: 00052383 lw x7,0(x10) +80006d9c: 00f38863 beq x7,x15,80006dac +80006da0: 4780146f jal x8,80008218 +80006da4: 80006d94 .word 0x80006d94 +80006da8: 80017c52 .word 0x80017c52 +80006dac: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xebebebeb +80006db0: 0000a303 lw x6,0(x1) +80006db4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xebebebeb +80006db8: 0000ae03 lw x28,0(x1) +80006dbc: 00408093 addi x1,x1,4 + +80006dc0 : +Zknd_aes32dsi_cg_cp_sbox_b235: + aes32dsi x20, x6, x28, 1 # perform operation +80006dc0: 6bc30a33 aes32dsi x20,x6,x28,0x1 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b235, Zknd_aes32dsi_cg_cp_sbox_b235_str) +80006dc4: 00052383 lw x7,0(x10) +80006dc8: 01438863 beq x7,x20,80006dd8 +80006dcc: 44c0146f jal x8,80008218 +80006dd0: 80006dc0 .word 0x80006dc0 +80006dd4: 80017c8c .word 0x80017c8c +80006dd8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xecececec +80006ddc: 0000a683 lw x13,0(x1) +80006de0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xecececec +80006de4: 0000aa83 lw x21,0(x1) +80006de8: 00408093 addi x1,x1,4 + +80006dec : +Zknd_aes32dsi_cg_cp_sbox_b236: + aes32dsi x9, x13, x21, 3 # perform operation +80006dec: eb5684b3 aes32dsi x9,x13,x21,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknd_aes32dsi_cg_cp_sbox_b236, Zknd_aes32dsi_cg_cp_sbox_b236_str) +80006df0: 00052383 lw x7,0(x10) +80006df4: 00938863 beq x7,x9,80006e04 +80006df8: 4200146f jal x8,80008218 +80006dfc: 80006dec .word 0x80006dec +80006e00: 80017cc6 .word 0x80017cc6 +80006e04: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xedededed +80006e08: 0000ad03 lw x26,0(x1) +80006e0c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xedededed +80006e10: 0000a703 lw x14,0(x1) +80006e14: 00408093 addi x1,x1,4 + +80006e18 : +Zknd_aes32dsi_cg_cp_sbox_b237: + aes32dsi x20, x26, x14, 3 # perform operation +80006e18: eaed0a33 aes32dsi x20,x26,x14,0x3 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b237, Zknd_aes32dsi_cg_cp_sbox_b237_str) +80006e1c: 00052383 lw x7,0(x10) +80006e20: 01438863 beq x7,x20,80006e30 +80006e24: 3f40146f jal x8,80008218 +80006e28: 80006e18 .word 0x80006e18 +80006e2c: 80017d00 .word 0x80017d00 +80006e30: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xeeeeeeee +80006e34: 0000ab83 lw x23,0(x1) +80006e38: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xeeeeeeee +80006e3c: 0000ae03 lw x28,0(x1) +80006e40: 00408093 addi x1,x1,4 + +80006e44 : +Zknd_aes32dsi_cg_cp_sbox_b238: + aes32dsi x27, x23, x28, 2 # perform operation +80006e44: abcb8db3 aes32dsi x27,x23,x28,0x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b238, Zknd_aes32dsi_cg_cp_sbox_b238_str) +80006e48: 00052383 lw x7,0(x10) +80006e4c: 01b38863 beq x7,x27,80006e5c +80006e50: 3c80146f jal x8,80008218 +80006e54: 80006e44 .word 0x80006e44 +80006e58: 80017d3a .word 0x80017d3a +80006e5c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xefefefef +80006e60: 0000ae83 lw x29,0(x1) +80006e64: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xefefefef +80006e68: 0000af03 lw x30,0(x1) +80006e6c: 00408093 addi x1,x1,4 + +80006e70 : +Zknd_aes32dsi_cg_cp_sbox_b239: + aes32dsi x4, x29, x30, 2 # perform operation +80006e70: abee8233 aes32dsi x4,x29,x30,0x2 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes32dsi_cg_cp_sbox_b239, Zknd_aes32dsi_cg_cp_sbox_b239_str) +80006e74: 00052383 lw x7,0(x10) +80006e78: 00438863 beq x7,x4,80006e88 +80006e7c: 39c0146f jal x8,80008218 +80006e80: 80006e70 .word 0x80006e70 +80006e84: 80017d74 .word 0x80017d74 +80006e88: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xf0f0f0f0 +80006e8c: 0000af03 lw x30,0(x1) +80006e90: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xf0f0f0f0 +80006e94: 0000ad03 lw x26,0(x1) +80006e98: 00408093 addi x1,x1,4 + +80006e9c : +Zknd_aes32dsi_cg_cp_sbox_b240: + aes32dsi x2, x30, x26, 1 # perform operation +80006e9c: 6baf0133 aes32dsi x2,x30,x26,0x1 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknd_aes32dsi_cg_cp_sbox_b240, Zknd_aes32dsi_cg_cp_sbox_b240_str) +80006ea0: 00052383 lw x7,0(x10) +80006ea4: 00238863 beq x7,x2,80006eb4 +80006ea8: 3700146f jal x8,80008218 +80006eac: 80006e9c .word 0x80006e9c +80006eb0: 80017dae .word 0x80017dae +80006eb4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xf1f1f1f1 +80006eb8: 0000af03 lw x30,0(x1) +80006ebc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xf1f1f1f1 +80006ec0: 0000ad03 lw x26,0(x1) +80006ec4: 00408093 addi x1,x1,4 + +80006ec8 : +Zknd_aes32dsi_cg_cp_sbox_b241: + aes32dsi x13, x30, x26, 2 # perform operation +80006ec8: abaf06b3 aes32dsi x13,x30,x26,0x2 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b241, Zknd_aes32dsi_cg_cp_sbox_b241_str) +80006ecc: 00052383 lw x7,0(x10) +80006ed0: 00d38863 beq x7,x13,80006ee0 +80006ed4: 3440146f jal x8,80008218 +80006ed8: 80006ec8 .word 0x80006ec8 +80006edc: 80017de8 .word 0x80017de8 +80006ee0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xf2f2f2f2 +80006ee4: 0000ad03 lw x26,0(x1) +80006ee8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xf2f2f2f2 +80006eec: 0000ab03 lw x22,0(x1) +80006ef0: 00408093 addi x1,x1,4 + +80006ef4 : +Zknd_aes32dsi_cg_cp_sbox_b242: + aes32dsi x27, x26, x22, 2 # perform operation +80006ef4: ab6d0db3 aes32dsi x27,x26,x22,0x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknd_aes32dsi_cg_cp_sbox_b242, Zknd_aes32dsi_cg_cp_sbox_b242_str) +80006ef8: 00052383 lw x7,0(x10) +80006efc: 01b38863 beq x7,x27,80006f0c +80006f00: 3180146f jal x8,80008218 +80006f04: 80006ef4 .word 0x80006ef4 +80006f08: 80017e22 .word 0x80017e22 +80006f0c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xf3f3f3f3 +80006f10: 0000ad03 lw x26,0(x1) +80006f14: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xf3f3f3f3 +80006f18: 0000aa03 lw x20,0(x1) +80006f1c: 00408093 addi x1,x1,4 + +80006f20 : +Zknd_aes32dsi_cg_cp_sbox_b243: + aes32dsi x17, x26, x20, 1 # perform operation +80006f20: 6b4d08b3 aes32dsi x17,x26,x20,0x1 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b243, Zknd_aes32dsi_cg_cp_sbox_b243_str) +80006f24: 00052383 lw x7,0(x10) +80006f28: 01138863 beq x7,x17,80006f38 +80006f2c: 2ec0146f jal x8,80008218 +80006f30: 80006f20 .word 0x80006f20 +80006f34: 80017e5c .word 0x80017e5c +80006f38: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xf4f4f4f4 +80006f3c: 0000af03 lw x30,0(x1) +80006f40: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xf4f4f4f4 +80006f44: 0000a683 lw x13,0(x1) +80006f48: 00408093 addi x1,x1,4 + +80006f4c : +Zknd_aes32dsi_cg_cp_sbox_b244: + aes32dsi x17, x30, x13, 2 # perform operation +80006f4c: aadf08b3 aes32dsi x17,x30,x13,0x2 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zknd_aes32dsi_cg_cp_sbox_b244, Zknd_aes32dsi_cg_cp_sbox_b244_str) +80006f50: 00052383 lw x7,0(x10) +80006f54: 01138863 beq x7,x17,80006f64 +80006f58: 2c00146f jal x8,80008218 +80006f5c: 80006f4c .word 0x80006f4c +80006f60: 80017e96 .word 0x80017e96 +80006f64: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xf5f5f5f5 +80006f68: 0000ae03 lw x28,0(x1) +80006f6c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0xf5f5f5f5 +80006f70: 0000a283 lw x5,0(x1) +80006f74: 00408093 addi x1,x1,4 + +80006f78 : +Zknd_aes32dsi_cg_cp_sbox_b245: + aes32dsi x30, x28, x5, 1 # perform operation +80006f78: 6a5e0f33 aes32dsi x30,x28,x5,0x1 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknd_aes32dsi_cg_cp_sbox_b245, Zknd_aes32dsi_cg_cp_sbox_b245_str) +80006f7c: 00052383 lw x7,0(x10) +80006f80: 01e38863 beq x7,x30,80006f90 +80006f84: 2940146f jal x8,80008218 +80006f88: 80006f78 .word 0x80006f78 +80006f8c: 80017ed0 .word 0x80017ed0 +80006f90: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xf6f6f6f6 +80006f94: 0000ab03 lw x22,0(x1) +80006f98: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xf6f6f6f6 +80006f9c: 0000a103 lw x2,0(x1) +80006fa0: 00408093 addi x1,x1,4 + +80006fa4 : +Zknd_aes32dsi_cg_cp_sbox_b246: + aes32dsi x13, x22, x2, 1 # perform operation +80006fa4: 6a2b06b3 aes32dsi x13,x22,x2,0x1 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b246, Zknd_aes32dsi_cg_cp_sbox_b246_str) +80006fa8: 00052383 lw x7,0(x10) +80006fac: 00d38863 beq x7,x13,80006fbc +80006fb0: 2680146f jal x8,80008218 +80006fb4: 80006fa4 .word 0x80006fa4 +80006fb8: 80017f0a .word 0x80017f0a +80006fbc: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xf7f7f7f7 +80006fc0: 0000ac03 lw x24,0(x1) +80006fc4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xf7f7f7f7 +80006fc8: 0000ac83 lw x25,0(x1) +80006fcc: 00408093 addi x1,x1,4 + +80006fd0 : +Zknd_aes32dsi_cg_cp_sbox_b247: + aes32dsi x19, x24, x25, 1 # perform operation +80006fd0: 6b9c09b3 aes32dsi x19,x24,x25,0x1 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknd_aes32dsi_cg_cp_sbox_b247, Zknd_aes32dsi_cg_cp_sbox_b247_str) +80006fd4: 00052383 lw x7,0(x10) +80006fd8: 01338863 beq x7,x19,80006fe8 +80006fdc: 23c0146f jal x8,80008218 +80006fe0: 80006fd0 .word 0x80006fd0 +80006fe4: 80017f44 .word 0x80017f44 +80006fe8: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xf8f8f8f8 +80006fec: 0000ad83 lw x27,0(x1) +80006ff0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xf8f8f8f8 +80006ff4: 0000ae83 lw x29,0(x1) +80006ff8: 00408093 addi x1,x1,4 + +80006ffc : +Zknd_aes32dsi_cg_cp_sbox_b248: + aes32dsi x13, x27, x29, 2 # perform operation +80006ffc: abdd86b3 aes32dsi x13,x27,x29,0x2 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknd_aes32dsi_cg_cp_sbox_b248, Zknd_aes32dsi_cg_cp_sbox_b248_str) +80007000: 00052383 lw x7,0(x10) +80007004: 00d38863 beq x7,x13,80007014 +80007008: 2100146f jal x8,80008218 +8000700c: 80006ffc .word 0x80006ffc +80007010: 80017f7e .word 0x80017f7e +80007014: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xf9f9f9f9 +80007018: 0000ae03 lw x28,0(x1) +8000701c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xf9f9f9f9 +80007020: 0000ad03 lw x26,0(x1) +80007024: 00408093 addi x1,x1,4 + +80007028 : +Zknd_aes32dsi_cg_cp_sbox_b249: + aes32dsi x31, x28, x26, 1 # perform operation +80007028: 6bae0fb3 aes32dsi x31,x28,x26,0x1 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b249, Zknd_aes32dsi_cg_cp_sbox_b249_str) +8000702c: 00052383 lw x7,0(x10) +80007030: 01f38863 beq x7,x31,80007040 +80007034: 1e40146f jal x8,80008218 +80007038: 80007028 .word 0x80007028 +8000703c: 80017fb8 .word 0x80017fb8 +80007040: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xfafafafa +80007044: 0000a983 lw x19,0(x1) +80007048: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xfafafafa +8000704c: 0000ad83 lw x27,0(x1) +80007050: 00408093 addi x1,x1,4 + +80007054 : +Zknd_aes32dsi_cg_cp_sbox_b250: + aes32dsi x6, x19, x27, 2 # perform operation +80007054: abb98333 aes32dsi x6,x19,x27,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes32dsi_cg_cp_sbox_b250, Zknd_aes32dsi_cg_cp_sbox_b250_str) +80007058: 00052383 lw x7,0(x10) +8000705c: 00638863 beq x7,x6,8000706c +80007060: 1b80146f jal x8,80008218 +80007064: 80007054 .word 0x80007054 +80007068: 80017ff2 .word 0x80017ff2 +8000706c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xfbfbfbfb +80007070: 0000a283 lw x5,0(x1) +80007074: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xfbfbfbfb +80007078: 0000a903 lw x18,0(x1) +8000707c: 00408093 addi x1,x1,4 + +80007080 : +Zknd_aes32dsi_cg_cp_sbox_b251: + aes32dsi x31, x5, x18, 0 # perform operation +80007080: 2b228fb3 aes32dsi x31,x5,x18,0x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknd_aes32dsi_cg_cp_sbox_b251, Zknd_aes32dsi_cg_cp_sbox_b251_str) +80007084: 00052383 lw x7,0(x10) +80007088: 01f38863 beq x7,x31,80007098 +8000708c: 18c0146f jal x8,80008218 +80007090: 80007080 .word 0x80007080 +80007094: 8001802c .word 0x8001802c +80007098: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfcfcfcfc +8000709c: 0000ae03 lw x28,0(x1) +800070a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0xfcfcfcfc +800070a4: 0000a283 lw x5,0(x1) +800070a8: 00408093 addi x1,x1,4 + +800070ac : +Zknd_aes32dsi_cg_cp_sbox_b252: + aes32dsi x16, x28, x5, 3 # perform operation +800070ac: ea5e0833 aes32dsi x16,x28,x5,0x3 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zknd_aes32dsi_cg_cp_sbox_b252, Zknd_aes32dsi_cg_cp_sbox_b252_str) +800070b0: 00052383 lw x7,0(x10) +800070b4: 01038863 beq x7,x16,800070c4 +800070b8: 1600146f jal x8,80008218 +800070bc: 800070ac .word 0x800070ac +800070c0: 80018066 .word 0x80018066 +800070c4: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xfdfdfdfd +800070c8: 0000af83 lw x31,0(x1) +800070cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xfdfdfdfd +800070d0: 0000a883 lw x17,0(x1) +800070d4: 00408093 addi x1,x1,4 + +800070d8 : +Zknd_aes32dsi_cg_cp_sbox_b253: + aes32dsi x20, x31, x17, 1 # perform operation +800070d8: 6b1f8a33 aes32dsi x20,x31,x17,0x1 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknd_aes32dsi_cg_cp_sbox_b253, Zknd_aes32dsi_cg_cp_sbox_b253_str) +800070dc: 00052383 lw x7,0(x10) +800070e0: 01438863 beq x7,x20,800070f0 +800070e4: 1340146f jal x8,80008218 +800070e8: 800070d8 .word 0x800070d8 +800070ec: 800180a0 .word 0x800180a0 +800070f0: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfefefefe +800070f4: 0000ad03 lw x26,0(x1) +800070f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xfefefefe +800070fc: 0000aa83 lw x21,0(x1) +80007100: 00408093 addi x1,x1,4 + +80007104 : +Zknd_aes32dsi_cg_cp_sbox_b254: + aes32dsi x25, x26, x21, 2 # perform operation +80007104: ab5d0cb3 aes32dsi x25,x26,x21,0x2 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknd_aes32dsi_cg_cp_sbox_b254, Zknd_aes32dsi_cg_cp_sbox_b254_str) +80007108: 00052383 lw x7,0(x10) +8000710c: 01938863 beq x7,x25,8000711c +80007110: 1080146f jal x8,80008218 +80007114: 80007104 .word 0x80007104 +80007118: 800180da .word 0x800180da +8000711c: 00450513 addi x10,x10,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xffffffff +80007120: 0000a603 lw x12,0(x1) +80007124: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffff +80007128: 0000a183 lw x3,0(x1) +8000712c: 00408093 addi x1,x1,4 + +80007130 : +Zknd_aes32dsi_cg_cp_sbox_b255: + aes32dsi x23, x12, x3, 0 # perform operation +80007130: 2a360bb3 aes32dsi x23,x12,x3,0x0 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknd_aes32dsi_cg_cp_sbox_b255, Zknd_aes32dsi_cg_cp_sbox_b255_str) +80007134: 00052383 lw x7,0(x10) +80007138: 01738863 beq x7,x23,80007148 +8000713c: 0dc0146f jal x8,80008218 +80007140: 80007130 .word 0x80007130 +80007144: 80018114 .word 0x80018114 +80007148: 00450513 addi x10,x10,4 + + mv x2, x10 # restore signature pointer to default register for teardown +8000714c: 00050113 addi x2,x10,0 + +80007150 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80007150: 00000513 addi x10,x0,0 +80007154: 00000073 ecall +80007158: fff00513 addi x10,x0,-1 +8000715c: 1d800413 addi x8,x0,472 + +80007160 : +80007160: 34002373 csrrs x6,mscratch,x0 + +80007164 : +80007164: 23832383 lw x7,568(x6) +80007168: 23c32483 lw x9,572(x6) + +8000716c : +8000716c: 22032383 lw x7,544(x6) + +80007170 : +80007170: 25032483 lw x9,592(x6) +80007174: 34049073 csrrw x0,mscratch,x9 + +80007178 : +80007178: 24832483 lw x9,584(x6) +8000717c: 305493f3 csrrw x7,mtvec,x9 +80007180: ffc4f493 andi x9,x9,-4 +80007184: ffc3f393 andi x7,x7,-4 +80007188: 00749e63 bne x9,x7,800071a4 + +8000718c : +8000718c: 00030493 addi x9,x6,0 + +80007190 : +80007190: 0004a783 lw x15,0(x9) +80007194: 00f3a023 sw x15,0(x7) +80007198: 00438393 addi x7,x7,4 +8000719c: 00448493 addi x9,x9,4 +800071a0: fe83c8e3 blt x7,x8,80007190 +800071a4: 0000100f fence.i + +800071a8 : +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 00000497 auipc x9,0x0 +800071c4: 29048493 addi x9,x9,656 # 80007450 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 10e49863 bne x9,x14,800072f0 +800071e4: 00000013 addi x0,x0,0 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00011517 auipc x10,0x11 +80007204: 5d250513 addi x10,x10,1490 # 800187d2 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00023097 auipc x1,0x23 +80007224: 344080e7 jalr x1,836(x1) # 8002a564 +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00011517 auipc x10,0x11 +80007244: 5cf50513 addi x10,x10,1487 # 8001880f +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00023097 auipc x1,0x23 +80007264: 304080e7 jalr x1,772(x1) # 8002a564 +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00011517 auipc x10,0x11 +80007284: 5ef50513 addi x10,x10,1519 # 8001886f +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00023097 auipc x1,0x23 +800072a4: 2c4080e7 jalr x1,708(x1) # 8002a564 +800072a8: 00000013 addi x0,x0,0 +800072ac: 00000013 addi x0,x0,0 +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00012517 auipc x10,0x12 +800072c4: 15a50513 addi x10,x10,346 # 8001941a +800072c8: 00000013 addi x0,x0,0 +800072cc: 00000013 addi x0,x0,0 +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00023097 auipc x1,0x23 +800072e4: 284080e7 jalr x1,644(x1) # 8002a564 +800072e8: 00023097 auipc x1,0x23 +800072ec: 2dc080e7 jalr x1,732(x1) # 8002a5c4 + +800072f0 : +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00005317 auipc x6,0x5 +80007304: 02830313 addi x6,x6,40 # 8000c328 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 00032303 lw x6,0(x6) +80007324: 00000013 addi x0,x0,0 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 00013397 auipc x7,0x13 +80007344: 5c838393 addi x7,x7,1480 # 8001a908 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 40730333 sub x6,x6,x7 +80007364: 00000013 addi x0,x0,0 +80007368: 00000013 addi x0,x0,0 +8000736c: 00000013 addi x0,x0,0 +80007370: 00000013 addi x0,x0,0 +80007374: 00000013 addi x0,x0,0 +80007378: 00000013 addi x0,x0,0 +8000737c: 00000013 addi x0,x0,0 +80007380: 00013417 auipc x8,0x13 +80007384: 58040413 addi x8,x8,1408 # 8001a900 +80007388: 00000013 addi x0,x0,0 +8000738c: 00000013 addi x0,x0,0 +80007390: 00000013 addi x0,x0,0 +80007394: 00000013 addi x0,x0,0 +80007398: 00000013 addi x0,x0,0 +8000739c: 00000013 addi x0,x0,0 +800073a0: 00042203 lw x4,0(x8) +800073a4: 00620863 beq x4,x6,800073b4 +800073a8: 6c1003ef jal x7,80008268 +800073ac: 800072f0 .word 0x800072f0 +800073b0: 800189c3 .word 0x800189c3 + +800073b4 : +800073b4: bad0e4b7 lui x9,0xbad0e +800073b8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +800073bc: 00e49a63 bne x9,x14,800073d0 +800073c0: 6a9003ef jal x7,80008268 +800073c4: 80007484 .word 0x80007484 +800073c8: 80018831 .word 0x80018831 +800073cc: 00000341 .word 0x00000341 + +800073d0 : +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00011517 auipc x10,0x11 +800073e4: 3b450513 addi x10,x10,948 # 80018794 +800073e8: 00000013 addi x0,x0,0 +800073ec: 00000013 addi x0,x0,0 +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00023097 auipc x1,0x23 +80007404: 164080e7 jalr x1,356(x1) # 8002a564 +80007408: 00023097 auipc x1,0x23 +8000740c: 19c080e7 jalr x1,412(x1) # 8002a5a4 + +80007410 : +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00011517 auipc x10,0x11 +80007424: 3b250513 addi x10,x10,946 # 800187d2 +80007428: 00000013 addi x0,x0,0 +8000742c: 00000013 addi x0,x0,0 +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: 00023097 auipc x1,0x23 +80007444: 124080e7 jalr x1,292(x1) # 8002a564 +80007448: 00023097 auipc x1,0x23 +8000744c: 17c080e7 jalr x1,380(x1) # 8002a5c4 + +80007450 : +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: 00000717 auipc x14,0x0 +80007464: ff070713 addi x14,x14,-16 # 80007450 +80007468: 00000013 addi x0,x0,0 +8000746c: 00000013 addi x0,x0,0 +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 +80007480: cd1ff06f jal x0,80007150 + +80007484 : +80007484: bad0e737 lui x14,0xbad0e +80007488: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000748c: cc5ff06f jal x0,80007150 +80007490: 00000013 addi x0,x0,0 +80007494: 00000013 addi x0,x0,0 +80007498: 00000013 addi x0,x0,0 +8000749c: 00000013 addi x0,x0,0 +800074a0: 00000013 addi x0,x0,0 +800074a4: 00000013 addi x0,x0,0 +800074a8: 00000013 addi x0,x0,0 +800074ac: 00000013 addi x0,x0,0 +800074b0: 00000013 addi x0,x0,0 +800074b4: 00000013 addi x0,x0,0 +800074b8: 00000013 addi x0,x0,0 +800074bc: 00000013 addi x0,x0,0 + +800074c0 : +800074c0: 0800006f jal x0,80007540 +800074c4: 0880006f jal x0,8000754c +800074c8: 0900006f jal x0,80007558 +800074cc: 0980006f jal x0,80007564 +800074d0: 0a00006f jal x0,80007570 +800074d4: 0a80006f jal x0,8000757c +800074d8: 0b00006f jal x0,80007588 +800074dc: 0b80006f jal x0,80007594 +800074e0: 0c00006f jal x0,800075a0 +800074e4: 0c80006f jal x0,800075ac +800074e8: 0d00006f jal x0,800075b8 +800074ec: 0d80006f jal x0,800075c4 +800074f0: 0e00006f jal x0,800075d0 +800074f4: 0e80006f jal x0,800075dc +800074f8: 0f00006f jal x0,800075e8 +800074fc: 0f80006f jal x0,800075f4 +80007500: 1000006f jal x0,80007600 +80007504: 1080006f jal x0,8000760c +80007508: 1100006f jal x0,80007618 +8000750c: 1180006f jal x0,80007624 +80007510: 1200006f jal x0,80007630 +80007514: 1280006f jal x0,8000763c +80007518: 1300006f jal x0,80007648 +8000751c: 1380006f jal x0,80007654 +80007520: 1400006f jal x0,80007660 +80007524: 13c0006f jal x0,80007660 +80007528: 1380006f jal x0,80007660 +8000752c: 1340006f jal x0,80007660 +80007530: 1300006f jal x0,80007660 +80007534: 12c0006f jal x0,80007660 +80007538: 1280006f jal x0,80007660 +8000753c: 1240006f jal x0,80007660 + +80007540 : +80007540: 34011173 csrrw x2,mscratch,x2 +80007544: 26f12823 sw x15,624(x2) +80007548: 13c007ef jal x15,80007684 +8000754c: 34011173 csrrw x2,mscratch,x2 +80007550: 26f12823 sw x15,624(x2) +80007554: 130007ef jal x15,80007684 +80007558: 34011173 csrrw x2,mscratch,x2 +8000755c: 26f12823 sw x15,624(x2) +80007560: 124007ef jal x15,80007684 +80007564: 34011173 csrrw x2,mscratch,x2 +80007568: 26f12823 sw x15,624(x2) +8000756c: 118007ef jal x15,80007684 +80007570: 34011173 csrrw x2,mscratch,x2 +80007574: 26f12823 sw x15,624(x2) +80007578: 10c007ef jal x15,80007684 +8000757c: 34011173 csrrw x2,mscratch,x2 +80007580: 26f12823 sw x15,624(x2) +80007584: 100007ef jal x15,80007684 +80007588: 34011173 csrrw x2,mscratch,x2 +8000758c: 26f12823 sw x15,624(x2) +80007590: 0f4007ef jal x15,80007684 +80007594: 34011173 csrrw x2,mscratch,x2 +80007598: 26f12823 sw x15,624(x2) +8000759c: 0e8007ef jal x15,80007684 +800075a0: 34011173 csrrw x2,mscratch,x2 +800075a4: 26f12823 sw x15,624(x2) +800075a8: 0dc007ef jal x15,80007684 +800075ac: 34011173 csrrw x2,mscratch,x2 +800075b0: 26f12823 sw x15,624(x2) +800075b4: 0d0007ef jal x15,80007684 +800075b8: 34011173 csrrw x2,mscratch,x2 +800075bc: 26f12823 sw x15,624(x2) +800075c0: 0c4007ef jal x15,80007684 +800075c4: 34011173 csrrw x2,mscratch,x2 +800075c8: 26f12823 sw x15,624(x2) +800075cc: 0b8007ef jal x15,80007684 +800075d0: 34011173 csrrw x2,mscratch,x2 +800075d4: 26f12823 sw x15,624(x2) +800075d8: 0ac007ef jal x15,80007684 +800075dc: 34011173 csrrw x2,mscratch,x2 +800075e0: 26f12823 sw x15,624(x2) +800075e4: 0a0007ef jal x15,80007684 +800075e8: 34011173 csrrw x2,mscratch,x2 +800075ec: 26f12823 sw x15,624(x2) +800075f0: 094007ef jal x15,80007684 +800075f4: 34011173 csrrw x2,mscratch,x2 +800075f8: 26f12823 sw x15,624(x2) +800075fc: 088007ef jal x15,80007684 +80007600: 34011173 csrrw x2,mscratch,x2 +80007604: 26f12823 sw x15,624(x2) +80007608: 07c007ef jal x15,80007684 +8000760c: 34011173 csrrw x2,mscratch,x2 +80007610: 26f12823 sw x15,624(x2) +80007614: 070007ef jal x15,80007684 +80007618: 34011173 csrrw x2,mscratch,x2 +8000761c: 26f12823 sw x15,624(x2) +80007620: 064007ef jal x15,80007684 +80007624: 34011173 csrrw x2,mscratch,x2 +80007628: 26f12823 sw x15,624(x2) +8000762c: 058007ef jal x15,80007684 +80007630: 34011173 csrrw x2,mscratch,x2 +80007634: 26f12823 sw x15,624(x2) +80007638: 04c007ef jal x15,80007684 +8000763c: 34011173 csrrw x2,mscratch,x2 +80007640: 26f12823 sw x15,624(x2) +80007644: 040007ef jal x15,80007684 +80007648: 34011173 csrrw x2,mscratch,x2 +8000764c: 26f12823 sw x15,624(x2) +80007650: 034007ef jal x15,80007684 +80007654: 34011173 csrrw x2,mscratch,x2 +80007658: 26f12823 sw x15,624(x2) +8000765c: 028007ef jal x15,80007684 + +80007660 : +80007660: 00000317 auipc x6,0x0 +80007664: b4830313 addi x6,x6,-1208 # 800071a8 +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00030067 jalr x0,0(x6) + +80007684 : +80007684: 26e12623 sw x14,620(x2) +80007688: 34011773 csrrw x14,mscratch,x2 +8000768c: 26e12a23 sw x14,628(x2) +80007690: 23012703 lw x14,560(x2) +80007694: 00070067 jalr x0,0(x14) + +80007698 : +80007698: 26912423 sw x9,616(x2) +8000769c: 26812223 sw x8,612(x2) +800076a0: 26712023 sw x7,608(x2) +800076a4: 24612e23 sw x6,604(x2) +800076a8: 00000013 addi x0,x0,0 +800076ac: 00000013 addi x0,x0,0 +800076b0: 00000013 addi x0,x0,0 +800076b4: 00000013 addi x0,x0,0 +800076b8: 00000013 addi x0,x0,0 +800076bc: 00000013 addi x0,x0,0 +800076c0: 00005317 auipc x6,0x5 +800076c4: a4830313 addi x6,x6,-1464 # 8000c108 +800076c8: 00000013 addi x0,x0,0 +800076cc: 00000013 addi x0,x0,0 +800076d0: 00000013 addi x0,x0,0 +800076d4: 00000013 addi x0,x0,0 +800076d8: 00000013 addi x0,x0,0 +800076dc: 00000013 addi x0,x0,0 +800076e0: 00032383 lw x7,0(x6) +800076e4: 00138393 addi x7,x7,1 +800076e8: 00732023 sw x7,0(x6) +800076ec: 34202773 csrrs x14,mcause,x0 + +800076f0 : +800076f0: 800014b7 lui x9,0x80001 +800076f4: fff48493 addi x9,x9,-1 # 80000fff +800076f8: 00e4f4b3 and x9,x9,x14 + +800076fc : +800076fc: ffe48413 addi x8,x9,-2 +80007700: 00041663 bne x8,x0,8000770c + +80007704 : +80007704: 280506e3 beq x10,x0,80008190 +80007708: 58c0006f jal x0,80007c94 + +8000770c : +8000770c: ff848413 addi x8,x9,-8 +80007710: 00245413 srli x8,x8,0x2 +80007714: 58041063 bne x8,x0,80007c94 + +80007718 : +80007718: 26050ce3 beq x10,x0,80008190 + +8000771c : +8000771c: fff50493 addi x9,x10,-1 +80007720: 00500393 addi x7,x0,5 +80007724: 0274e063 bltu x9,x7,80007744 +80007728: 07300393 addi x7,x0,115 +8000772c: 00750463 beq x10,x7,80007734 +80007730: 0800006f jal x0,800077b0 + +80007734 : +80007734: 34102573 csrrs x10,mepc,x0 +80007738: 00450413 addi x8,x10,4 +8000773c: 34141073 csrrw x0,mepc,x8 +80007740: 7c00006f jal x0,80007f00 + +80007744 : +80007744: 341024f3 csrrs x9,mepc,x0 +80007748: 00448493 addi x9,x9,4 +8000774c: 34149073 csrrw x0,mepc,x9 +80007750: 00100393 addi x7,x0,1 +80007754: 00750e63 beq x10,x7,80007770 +80007758: 00200393 addi x7,x0,2 +8000775c: 02750263 beq x10,x7,80007780 +80007760: 00300393 addi x7,x0,3 +80007764: 02750c63 beq x10,x7,8000779c +80007768: fff00513 addi x10,x0,-1 +8000776c: 7940006f jal x0,80007f00 + +80007770 : +80007770: 000024b7 lui x9,0x2 +80007774: 80048493 addi x9,x9,-2048 # 1800 +80007778: 3004a073 csrrs x0,mstatus,x9 +8000777c: 7840006f jal x0,80007f00 + +80007780 : +80007780: 000024b7 lui x9,0x2 +80007784: 80048493 addi x9,x9,-2048 # 1800 +80007788: 3004b073 csrrc x0,mstatus,x9 +8000778c: 000014b7 lui x9,0x1 +80007790: 80048493 addi x9,x9,-2048 # 800 +80007794: 3004a073 csrrs x0,mstatus,x9 +80007798: 7680006f jal x0,80007f00 + +8000779c : +8000779c: 000024b7 lui x9,0x2 +800077a0: 80048493 addi x9,x9,-2048 # 1800 +800077a4: 3004b073 csrrc x0,mstatus,x9 +800077a8: 7580006f jal x0,80007f00 + +800077ac : +800077ac: 00000013 addi x0,x0,0 + +800077b0 : +800077b0: 00000013 addi x0,x0,0 +800077b4: 00000013 addi x0,x0,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000397 auipc x7,0x0 +800077c4: 17038393 addi x7,x7,368 # 80007930 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 + +800077e0 : +800077e0: 0003a403 lw x8,0(x7) +800077e4: 00a40863 beq x8,x10,800077f4 +800077e8: 04040863 beq x8,x0,80007838 +800077ec: 00838393 addi x7,x7,8 +800077f0: ff1ff06f jal x0,800077e0 + +800077f4 : +800077f4: 00008493 addi x9,x1,0 +800077f8: 00000013 addi x0,x0,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00000097 auipc x1,0x0 +80007804: 02408093 addi x1,x1,36 # 80007824 +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00038067 jalr x0,0(x7) + +80007824 : +80007824: 00048093 addi x1,x9,0 +80007828: 34102473 csrrs x8,mepc,x0 +8000782c: 00440413 addi x8,x8,4 +80007830: 34141073 csrrw x0,mepc,x8 +80007834: 6cc0006f jal x0,80007f00 + +80007838 : +80007838: 00050493 addi x9,x10,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00012517 auipc x10,0x12 +80007844: 61150513 addi x10,x10,1553 # 80019e51 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00048513 addi x10,x9,0 +8000786c: 02000593 addi x11,x0,32 +80007870: 4a8020ef jal x1,80009d18 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: a3850513 addi x10,x10,-1480 # 800182b8 +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: 01850513 addi x10,x10,24 # 800188d8 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00000013 addi x0,x0,0 +800078ec: 00000013 addi x0,x0,0 +800078f0: 00000013 addi x0,x0,0 +800078f4: 00000013 addi x0,x0,0 +800078f8: 00000013 addi x0,x0,0 +800078fc: 00000013 addi x0,x0,0 +80007900: 00011517 auipc x10,0x11 +80007904: ed250513 addi x10,x10,-302 # 800187d2 +80007908: 00000013 addi x0,x0,0 +8000790c: 00000013 addi x0,x0,0 +80007910: 00000013 addi x0,x0,0 +80007914: 00000013 addi x0,x0,0 +80007918: 00000013 addi x0,x0,0 +8000791c: 00000013 addi x0,x0,0 +80007920: 00023097 auipc x1,0x23 +80007924: c44080e7 jalr x1,-956(x1) # 8002a564 +80007928: 00023097 auipc x1,0x23 +8000792c: c9c080e7 jalr x1,-868(x1) # 8002a5c4 + +80007930 : +80007930: 30002573 .word 0x30002573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30059073 .word 0x30059073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3005a073 .word 0x3005a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3005b073 .word 0x3005b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30402573 .word 0x30402573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30459073 .word 0x30459073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 3045a073 .word 0x3045a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 3045b073 .word 0x3045b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 30602573 .word 0x30602573 +80007974: 00008067 jalr x0,0(x1) +80007978: 30659073 .word 0x30659073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3065a073 .word 0x3065a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3065b073 .word 0x3065b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 30a02573 .word 0x30a02573 +80007994: 00008067 jalr x0,0(x1) +80007998: 30a59073 .word 0x30a59073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 30a5a073 .word 0x30a5a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 30a5b073 .word 0x30a5b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 34402573 .word 0x34402573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 34459073 .word 0x34459073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3445a073 .word 0x3445a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3445b073 .word 0x3445b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: 74702573 .word 0x74702573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: 74759073 .word 0x74759073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: 7475a073 .word 0x7475a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: 7475b073 .word 0x7475b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: 32002573 .word 0x32002573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: 32059073 .word 0x32059073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: 3205a073 .word 0x3205a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: 3205b073 .word 0x3205b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: b0002573 .word 0xb0002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: b0059073 .word 0xb0059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: b005a073 .word 0xb005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: b005b073 .word 0xb005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: b0202573 .word 0xb0202573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: b0259073 .word 0xb0259073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: b025a073 .word 0xb025a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: b025b073 .word 0xb025b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10002573 .word 0x10002573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10059073 .word 0x10059073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1005a073 .word 0x1005a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1005b073 .word 0x1005b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10402573 .word 0x10402573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10459073 .word 0x10459073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 1045a073 .word 0x1045a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 1045b073 .word 0x1045b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 10602573 .word 0x10602573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 10659073 .word 0x10659073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1065a073 .word 0x1065a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1065b073 .word 0x1065b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 10a02573 .word 0x10a02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 10a59073 .word 0x10a59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 10a5a073 .word 0x10a5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 10a5b073 .word 0x10a5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 14402573 .word 0x14402573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 14459073 .word 0x14459073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1445a073 .word 0x1445a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1445b073 .word 0x1445b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 14d02573 .word 0x14d02573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 14d59073 .word 0x14d59073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 14d5a073 .word 0x14d5a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 14d5b073 .word 0x14d5b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 18002573 .word 0x18002573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 18059073 .word 0x18059073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 1805a073 .word 0x1805a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 1805b073 .word 0x1805b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a002573 .word 0x7a002573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a059073 .word 0x7a059073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a05a073 .word 0x7a05a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a05b073 .word 0x7a05b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a102573 .word 0x7a102573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a159073 .word 0x7a159073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a15a073 .word 0x7a15a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a15b073 .word 0x7a15b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a202573 .word 0x7a202573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a259073 .word 0x7a259073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a25a073 .word 0x7a25a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a25b073 .word 0x7a25b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a302573 .word 0x7a302573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a359073 .word 0x7a359073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a35a073 .word 0x7a35a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a35b073 .word 0x7a35b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a402573 .word 0x7a402573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a459073 .word 0x7a459073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a45a073 .word 0x7a45a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a45b073 .word 0x7a45b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7a502573 .word 0x7a502573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7a559073 .word 0x7a559073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7a55a073 .word 0x7a55a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7a55b073 .word 0x7a55b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 7a802573 .word 0x7a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 7a859073 .word 0x7a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 7a85a073 .word 0x7a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 7a85b073 .word 0x7a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 7aa02573 .word 0x7aa02573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 7aa59073 .word 0x7aa59073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 7aa5a073 .word 0x7aa5a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 7aa5b073 .word 0x7aa5b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 5a802573 .word 0x5a802573 +80007c34: 00008067 jalr x0,0(x1) +80007c38: 5a859073 .word 0x5a859073 +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 5a85a073 .word 0x5a85a073 +80007c44: 00008067 jalr x0,0(x1) +80007c48: 5a85b073 .word 0x5a85b073 +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 6a802573 .word 0x6a802573 +80007c54: 00008067 jalr x0,0(x1) +80007c58: 6a859073 .word 0x6a859073 +80007c5c: 00008067 jalr x0,0(x1) +80007c60: 6a85a073 .word 0x6a85a073 +80007c64: 00008067 jalr x0,0(x1) +80007c68: 6a85b073 .word 0x6a85b073 +80007c6c: 00008067 jalr x0,0(x1) +80007c70: 0005a503 lw x10,0(x11) +80007c74: 00008067 jalr x0,0(x1) +80007c78: 0045a503 lw x10,4(x11) +80007c7c: 00008067 jalr x0,0(x1) +80007c80: 00c5a023 sw x12,0(x11) +80007c84: 00008067 jalr x0,0(x1) +80007c88: 00c5a223 sw x12,4(x11) +80007c8c: 00008067 jalr x0,0(x1) +80007c90: 00000000 .word 0x00000000 + +80007c94 : +80007c94: 01000393 addi x7,x0,16 +80007c98: 00075c63 bge x14,x0,80007cb0 + +80007c9c : +80007c9c: 00171413 slli x8,x14,0x1 +80007ca0: ff240413 addi x8,x8,-14 +80007ca4: 00045663 bge x8,x0,80007cb0 +80007ca8: 00c00393 addi x7,x0,12 +80007cac: 0040006f jal x0,80007cb0 + +80007cb0 : +80007cb0: d6810113 addi x2,x2,-664 +80007cb4: 4b012303 lw x6,1200(x2) +80007cb8: 007304b3 add x9,x6,x7 +80007cbc: 4a912823 sw x9,1200(x2) +80007cc0: 49012403 lw x8,1168(x2) +80007cc4: 40830333 sub x6,x6,x8 +80007cc8: 29810113 addi x2,x2,664 +80007ccc: 1f812403 lw x8,504(x2) +80007cd0: 00830333 add x6,x6,x8 +80007cd4: 34102473 csrrs x8,mepc,x0 +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00010497 auipc x9,0x10 +80007ce4: 5b848493 addi x9,x9,1464 # 80018298 +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 0084a023 sw x8,0(x9) +80007d04: 00e4a423 sw x14,8(x9) +80007d08: 34302473 csrrs x8,mtval,x0 +80007d0c: 0084a823 sw x8,16(x9) +80007d10: 30002473 csrrs x8,mstatus,x0 +80007d14: 0084ac23 sw x8,24(x9) +80007d18: 00000013 addi x0,x0,0 +80007d1c: 00000013 addi x0,x0,0 +80007d20: 00021417 auipc x8,0x21 +80007d24: 64c40413 addi x8,x8,1612 # 8002936c +80007d28: 00000013 addi x0,x0,0 +80007d2c: 00000013 addi x0,x0,0 +80007d30: 00000013 addi x0,x0,0 +80007d34: 00000013 addi x0,x0,0 +80007d38: 00000013 addi x0,x0,0 +80007d3c: 00000013 addi x0,x0,0 +80007d40: 007304b3 add x9,x6,x7 +80007d44: f0946663 bltu x8,x9,80007450 + +80007d48 : +80007d48: 24012403 lw x8,576(x2) +80007d4c: 408787b3 sub x15,x15,x8 +80007d50: 00179493 slli x9,x15,0x1 +80007d54: 009787b3 add x15,x15,x9 +80007d58: 0057d793 srli x15,x15,0x5 +80007d5c: 00679793 slli x15,x15,0x6 +80007d60: 0077e7b3 or x15,x15,x7 +80007d64: 00378793 addi x15,x15,3 +80007d68: 02075a63 bge x14,x0,80007d9c +80007d6c: 00f00413 addi x8,x0,15 +80007d70: 00877433 and x8,x14,x8 +80007d74: 304024f3 csrrs x9,mie,x0 +80007d78: 0084d4b3 srl x9,x9,x8 +80007d7c: 0014f493 andi x9,x9,1 +80007d80: 00b49493 slli x9,x9,0xb +80007d84: 0097e7b3 or x15,x15,x9 +80007d88: 344024f3 csrrs x9,mip,x0 +80007d8c: 0084d4b3 srl x9,x9,x8 +80007d90: 0014f493 andi x9,x9,1 +80007d94: 00c49493 slli x9,x9,0xc +80007d98: 0097e7b3 or x15,x15,x9 +80007d9c: 300023f3 csrrs x7,mstatus,x0 +80007da0: 00f39393 slli x7,x7,0xf +80007da4: 0023d393 srli x7,x7,0x2 +80007da8: 0021a437 lui x8,0x21a +80007dac: fe540413 addi x8,x8,-27 # 219fe5 +80007db0: fff44413 xori x8,x8,-1 +80007db4: 0083f433 and x8,x7,x8 +80007db8: 0087e433 or x8,x15,x8 +80007dbc: 310024f3 csrrs x9,0x310,x0 +80007dc0: 1c04f493 andi x9,x9,448 +80007dc4: 00849493 slli x9,x9,0x8 +80007dc8: 00946433 or x8,x8,x9 +80007dcc: 00032483 lw x9,0(x6) +80007dd0: 00848e63 beq x9,x8,80007dec +80007dd4: 00040313 addi x6,x8,0 +80007dd8: 00048213 addi x4,x9,0 +80007ddc: 48c003ef jal x7,80008268 +80007de0: 80007d48 .word 0x80007d48 +80007de4: 800189da .word 0x800189da +80007de8: 00000341 .word 0x00000341 + +80007dec : +80007dec: 00070413 addi x8,x14,0 +80007df0: 00432483 lw x9,4(x6) +80007df4: 00848e63 beq x9,x8,80007e10 +80007df8: 00040313 addi x6,x8,0 +80007dfc: 00048213 addi x4,x9,0 +80007e00: 468003ef jal x7,80008268 +80007e04: 80007dec .word 0x80007dec +80007e08: 80018adc .word 0x80018adc +80007e0c: 00000341 .word 0x00000341 +80007e10: 10074863 blt x14,x0,80007f20 + +80007e14 : +80007e14: 34102473 csrrs x8,mepc,x0 +80007e18: 00010493 addi x9,x2,0 +80007e1c: 0040006f jal x0,80007e20 + +80007e20 : +80007e20: 08000393 addi x7,x0,128 +80007e24: 04740863 beq x8,x7,80007e74 +80007e28: 00238393 addi x7,x7,2 +80007e2c: 04740463 beq x8,x7,80007e74 +80007e30: 04040263 beq x8,x0,80007e74 +80007e34: 2084a383 lw x7,520(x9) +80007e38: 2104a783 lw x15,528(x9) +80007e3c: 007787b3 add x15,x15,x7 +80007e40: 00f47463 bgeu x8,x15,80007e48 +80007e44: 02747663 bgeu x8,x7,80007e70 + +80007e48 : +80007e48: 1d84a383 lw x7,472(x9) +80007e4c: 1e04a783 lw x15,480(x9) +80007e50: 007787b3 add x15,x15,x7 +80007e54: 00f47463 bgeu x8,x15,80007e5c +80007e58: 00747c63 bgeu x8,x7,80007e70 + +80007e5c : +80007e5c: 1e84a383 lw x7,488(x9) +80007e60: 1f04a783 lw x15,496(x9) +80007e64: 007787b3 add x15,x15,x7 +80007e68: e0f47e63 bgeu x8,x15,80007484 +80007e6c: e0746c63 bltu x8,x7,80007484 + +80007e70 : +80007e70: 40740433 sub x8,x8,x7 + +80007e74 : +80007e74: 00832483 lw x9,8(x6) +80007e78: 00848e63 beq x9,x8,80007e94 +80007e7c: 00040313 addi x6,x8,0 +80007e80: 00048213 addi x4,x9,0 +80007e84: 3e4003ef jal x7,80008268 +80007e88: 80007e74 .word 0x80007e74 +80007e8c: 80018bd7 .word 0x80018bd7 +80007e90: 00000341 .word 0x00000341 + +80007e94 : +80007e94: 34102473 csrrs x8,mepc,x0 +80007e98: 342023f3 csrrs x7,mcause,x0 +80007e9c: 00c00793 addi x15,x0,12 +80007ea0: 00f38a63 beq x7,x15,80007eb4 +80007ea4: 00100793 addi x15,x0,1 +80007ea8: 00f38663 beq x7,x15,80007eb4 +80007eac: 01400793 addi x15,x0,20 +80007eb0: 00f39663 bne x7,x15,80007ebc +80007eb4: 34109073 csrrw x0,mepc,x1 +80007eb8: 0100006f jal x0,80007ec8 + +80007ebc : +80007ebc: 00400393 addi x7,x0,4 +80007ec0: 00740433 add x8,x8,x7 +80007ec4: 34141073 csrrw x0,mepc,x8 + +80007ec8 : +80007ec8: 34302473 csrrs x8,mtval,x0 + +80007ecc : +80007ecc: 00c32483 lw x9,12(x6) +80007ed0: 00848e63 beq x9,x8,80007eec +80007ed4: 00040313 addi x6,x8,0 +80007ed8: 00048213 addi x4,x9,0 +80007edc: 38c003ef jal x7,80008268 +80007ee0: 80007ecc .word 0x80007ecc +80007ee4: 80018cca .word 0x80018cca +80007ee8: 00000341 .word 0x00000341 + +80007eec : +80007eec: 30102473 csrrs x8,misa,x0 +80007ef0: 01841413 slli x8,x8,0x18 +80007ef4: 00045263 bge x8,x0,80007ef8 + +80007ef8 : +80007ef8: 10000393 addi x7,x0,256 +80007efc: 05c0006f jal x0,80007f58 + +80007f00 : +80007f00: 25c12303 lw x6,604(x2) +80007f04: 26012383 lw x7,608(x2) +80007f08: 26412403 lw x8,612(x2) +80007f0c: 26812483 lw x9,616(x2) +80007f10: 26c12703 lw x14,620(x2) +80007f14: 27012783 lw x15,624(x2) +80007f18: 27412103 lw x2,628(x2) +80007f1c: 30200073 mret + +80007f20 : +80007f20: 00100413 addi x8,x0,1 +80007f24: 01f77393 andi x7,x14,31 +80007f28: 00741433 sll x8,x8,x7 +80007f2c: 304434f3 csrrc x9,mie,x8 +80007f30: 34443473 csrrc x8,mip,x8 + +80007f34 : +80007f34: 00832483 lw x9,8(x6) +80007f38: 00848e63 beq x9,x8,80007f54 +80007f3c: 00040313 addi x6,x8,0 +80007f40: 00048213 addi x4,x9,0 +80007f44: 324003ef jal x7,80008268 +80007f48: 80007f34 .word 0x80007f34 +80007f4c: 80018e3d .word 0x80018e3d +80007f50: 00000341 .word 0x00000341 +80007f54: 00000393 addi x7,x0,0 + +80007f58 : +80007f58: 00000417 auipc x8,0x0 +80007f5c: 03c40413 addi x8,x8,60 # 80007f94 +80007f60: 00740433 add x8,x8,x7 +80007f64: 00371393 slli x7,x14,0x3 +80007f68: 00740433 add x8,x8,x7 +80007f6c: ff847413 andi x8,x8,-8 +80007f70: 00042403 lw x8,0(x8) + +80007f74 : +80007f74: 00040a63 beq x8,x0,80007f88 +80007f78: 01f41393 slli x7,x8,0x1f +80007f7c: 0003d863 bge x7,x0,80007f8c +80007f80: 00145413 srli x8,x8,0x1 +80007f84: f6870ee3 beq x14,x8,80007f00 +80007f88: cfcff06f jal x0,80007484 + +80007f8c : +80007f8c: 00040067 jalr x0,0(x8) + +80007f90 : + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a000 .word 0x8002a000 + ... +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 8002a014 .word 0x8002a014 + ... +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 8002a030 .word 0x8002a030 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 +8000800c: 00000000 .word 0x00000000 +80008010: 00000001 .word 0x00000001 +80008014: 00000000 .word 0x00000000 +80008018: 00000001 .word 0x00000001 +8000801c: 00000000 .word 0x00000000 +80008020: 00000001 .word 0x00000001 +80008024: 00000000 .word 0x00000000 +80008028: 00000001 .word 0x00000001 +8000802c: 00000000 .word 0x00000000 +80008030: 00000001 .word 0x00000001 +80008034: 00000000 .word 0x00000000 +80008038: 00000001 .word 0x00000001 +8000803c: 00000000 .word 0x00000000 +80008040: 00000001 .word 0x00000001 +80008044: 00000000 .word 0x00000000 +80008048: 00000001 .word 0x00000001 + ... + +80008090 : +80008090: 00000001 .word 0x00000001 +80008094: 00000000 .word 0x00000000 +80008098: 00000003 .word 0x00000003 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000005 .word 0x00000005 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000007 .word 0x00000007 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000009 .word 0x00000009 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000000b .word 0x0000000b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000000d .word 0x0000000d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000000f .word 0x0000000f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000011 .word 0x00000011 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000013 .word 0x00000013 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000015 .word 0x00000015 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000017 .word 0x00000017 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000019 .word 0x00000019 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000001b .word 0x0000001b +800080fc: 00000000 .word 0x00000000 +80008100: 0000001d .word 0x0000001d +80008104: 00000000 .word 0x00000000 +80008108: 0000001f .word 0x0000001f +8000810c: 00000000 .word 0x00000000 +80008110: 00000021 .word 0x00000021 +80008114: 00000000 .word 0x00000000 +80008118: 00000023 .word 0x00000023 +8000811c: 00000000 .word 0x00000000 +80008120: 00000025 .word 0x00000025 +80008124: 00000000 .word 0x00000000 +80008128: 00000027 .word 0x00000027 +8000812c: 00000000 .word 0x00000000 +80008130: 00000029 .word 0x00000029 +80008134: 00000000 .word 0x00000000 +80008138: 0000002b .word 0x0000002b +8000813c: 00000000 .word 0x00000000 +80008140: 0000002d .word 0x0000002d +80008144: 00000000 .word 0x00000000 +80008148: 0000002f .word 0x0000002f + ... + +80008190 : +80008190: 300023f3 csrrs x7,mstatus,x0 +80008194: 00b3d493 srli x9,x7,0xb +80008198: 0034f493 andi x9,x9,3 +8000819c: ffd48413 addi x8,x9,-3 +800081a0: 341023f3 csrrs x7,mepc,x0 +800081a4: 00000493 addi x9,x0,0 +800081a8: 02040c63 beq x8,x0,800081e0 +800081ac: 29810113 addi x2,x2,664 +800081b0: 310023f3 csrrs x7,0x310,x0 +800081b4: 01839393 slli x7,x7,0x18 +800081b8: 0003da63 bge x7,x0,800081cc + +800081bc : +800081bc: 29810113 addi x2,x2,664 +800081c0: 47012783 lw x15,1136(x2) +800081c4: d6810113 addi x2,x2,-664 +800081c8: 0080006f jal x0,800081d0 + +800081cc : +800081cc: f4012783 lw x15,-192(x2) +800081d0: 341023f3 csrrs x7,mepc,x0 +800081d4: 40f383b3 sub x7,x7,x15 +800081d8: d6810113 addi x2,x2,-664 +800081dc: 1d812483 lw x9,472(x2) + +800081e0 : +800081e0: 007483b3 add x7,x9,x7 +800081e4: 25c12303 lw x6,604(x2) +800081e8: 26412403 lw x8,612(x2) +800081ec: 26812483 lw x9,616(x2) +800081f0: 26c12703 lw x14,620(x2) +800081f4: 27012783 lw x15,624(x2) +800081f8: 27412103 lw x2,628(x2) +800081fc: 00438067 jalr x0,4(x7) + +80008200 : +80008200: 00010217 auipc x4,0x10 +80008204: f5020213 addi x4,x4,-176 # 80018150 +80008208: 02522423 sw x5,40(x4) # 28 +8000820c: 00122423 sw x1,8(x4) # 8 +80008210: 00022023 sw x0,0(x4) # 0 +80008214: 0880006f jal x0,8000829c + +80008218 : +80008218: 00010397 auipc x7,0x10 +8000821c: f3838393 addi x7,x7,-200 # 80018150 +80008220: 0483a023 sw x8,64(x7) +80008224: 0243a023 sw x4,32(x7) +80008228: 0253a423 sw x5,40(x7) +8000822c: 0013a423 sw x1,8(x7) +80008230: 0003a023 sw x0,0(x7) +80008234: 00038213 addi x4,x7,0 +80008238: 00040293 addi x5,x8,0 +8000823c: 0600006f jal x0,8000829c + +80008240 : +80008240: 00010697 auipc x13,0x10 +80008244: f1068693 addi x13,x13,-240 # 80018150 +80008248: 06e6a823 sw x14,112(x13) +8000824c: 0246a023 sw x4,32(x13) +80008250: 0256a423 sw x5,40(x13) +80008254: 0016a423 sw x1,8(x13) +80008258: 0006a023 sw x0,0(x13) +8000825c: 00068213 addi x4,x13,0 +80008260: 00070293 addi x5,x14,0 +80008264: 0380006f jal x0,8000829c + +80008268 : +80008268: 00010497 auipc x9,0x10 +8000826c: ee848493 addi x9,x9,-280 # 80018150 +80008270: 0674a423 sw x7,104(x9) +80008274: 0244a023 sw x4,32(x9) +80008278: 0254a423 sw x5,40(x9) +8000827c: 0014a423 sw x1,8(x9) +80008280: 00300093 addi x1,x0,3 +80008284: 0014a023 sw x1,0(x9) +80008288: 1064a823 sw x6,272(x9) +8000828c: 1044ac23 sw x4,280(x9) +80008290: 00048213 addi x4,x9,0 +80008294: 00038293 addi x5,x7,0 +80008298: 0040006f jal x0,8000829c + +8000829c : +8000829c: 00222823 sw x2,16(x4) # 10 +800082a0: 00322c23 sw x3,24(x4) # 18 +800082a4: 02622823 sw x6,48(x4) # 30 +800082a8: 02722c23 sw x7,56(x4) # 38 +800082ac: 04822023 sw x8,64(x4) # 40 +800082b0: 04922423 sw x9,72(x4) # 48 +800082b4: 04a22823 sw x10,80(x4) # 50 +800082b8: 04b22c23 sw x11,88(x4) # 58 +800082bc: 06c22023 sw x12,96(x4) # 60 +800082c0: 06d22423 sw x13,104(x4) # 68 +800082c4: 06e22823 sw x14,112(x4) # 70 +800082c8: 06f22c23 sw x15,120(x4) # 78 +800082cc: 09022023 sw x16,128(x4) # 80 +800082d0: 09122423 sw x17,136(x4) # 88 +800082d4: 09222823 sw x18,144(x4) # 90 +800082d8: 09322c23 sw x19,152(x4) # 98 +800082dc: 0b422023 sw x20,160(x4) # a0 +800082e0: 0b522423 sw x21,168(x4) # a8 +800082e4: 0b622823 sw x22,176(x4) # b0 +800082e8: 0b722c23 sw x23,184(x4) # b8 +800082ec: 0d822023 sw x24,192(x4) # c0 +800082f0: 0d922423 sw x25,200(x4) # c8 +800082f4: 0da22823 sw x26,208(x4) # d0 +800082f8: 0db22c23 sw x27,216(x4) # d8 +800082fc: 0fc22023 sw x28,224(x4) # e0 +80008300: 0fd22423 sw x29,232(x4) # e8 +80008304: 0fe22823 sw x30,240(x4) # f0 +80008308: 0ff22c23 sw x31,248(x4) # f8 + +8000830c : +8000830c: 00010497 auipc x9,0x10 +80008310: e444a483 lw x9,-444(x9) # 80018150 +80008314: 00300513 addi x10,x0,3 +80008318: 18a48a63 beq x9,x10,800084ac + +8000831c : +8000831c: ffa2d303 lhu x6,-6(x5) +80008320: ff82d383 lhu x7,-8(x5) +80008324: 01031313 slli x6,x6,0x10 +80008328: 00736333 or x6,x6,x7 +8000832c: 00f35393 srli x7,x6,0xf +80008330: 01f3f393 andi x7,x7,31 +80008334: 01435413 srli x8,x6,0x14 +80008338: 01f47413 andi x8,x8,31 +8000833c: 10822223 sw x8,260(x4) # 104 +80008340: 00341313 slli x6,x8,0x3 +80008344: 00620333 add x6,x4,x6 +80008348: 00032303 lw x6,0(x6) +8000834c: 10622823 sw x6,272(x4) # 110 +80008350: ff62d303 lhu x6,-10(x5) +80008354: ff42d383 lhu x7,-12(x5) +80008358: 01031313 slli x6,x6,0x10 +8000835c: 00736333 or x6,x6,x7 +80008360: 00030513 addi x10,x6,0 +80008364: 07f37413 andi x8,x6,127 +80008368: 00300493 addi x9,x0,3 +8000836c: 0c941463 bne x8,x9,80008434 +80008370: 00c35413 srli x8,x6,0xc +80008374: 00747413 andi x8,x8,7 +80008378: 00200493 addi x9,x0,2 +8000837c: 0a941c63 bne x8,x9,80008434 +80008380: 41435393 srai x7,x6,0x14 +80008384: 00f35313 srli x6,x6,0xf +80008388: 01f37313 andi x6,x6,31 +8000838c: 00331313 slli x6,x6,0x3 +80008390: 00620333 add x6,x4,x6 +80008394: 00032303 lw x6,0(x6) +80008398: 00730333 add x6,x6,x7 +8000839c: 00337413 andi x8,x6,3 +800083a0: 0c041663 bne x8,x0,8000846c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00012417 auipc x8,0x12 +800083c4: ae040413 addi x8,x8,-1312 # 80019ea0 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: 08836663 bltu x6,x8,8000846c +800083e4: 00000013 addi x0,x0,0 +800083e8: 00000013 addi x0,x0,0 +800083ec: 00000013 addi x0,x0,0 +800083f0: 00000013 addi x0,x0,0 +800083f4: 00000013 addi x0,x0,0 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00021417 auipc x8,0x21 +80008404: f7040413 addi x8,x8,-144 # 80029370 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: ffc40413 addi x8,x8,-4 +80008424: 04646463 bltu x8,x6,8000846c +80008428: 00032303 lw x6,0(x6) +8000842c: 10622c23 sw x6,280(x4) # 118 +80008430: 3700006f jal x0,800087a0 + +80008434 : +80008434: 00100413 addi x8,x0,1 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: e3848493 addi x9,x9,-456 # 80018278 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10a22c23 sw x10,280(x4) # 118 +80008468: 3380006f jal x0,800087a0 + +8000846c : +8000846c: 00200413 addi x8,x0,2 +80008470: 00000013 addi x0,x0,0 +80008474: 00000013 addi x0,x0,0 +80008478: 00000013 addi x0,x0,0 +8000847c: 00000013 addi x0,x0,0 +80008480: 00010497 auipc x9,0x10 +80008484: df848493 addi x9,x9,-520 # 80018278 +80008488: 00000013 addi x0,x0,0 +8000848c: 00000013 addi x0,x0,0 +80008490: 00000013 addi x0,x0,0 +80008494: 00000013 addi x0,x0,0 +80008498: 00000013 addi x0,x0,0 +8000849c: 00000013 addi x0,x0,0 +800084a0: 0084a023 sw x8,0(x9) +800084a4: 10622c23 sw x6,280(x4) # 118 +800084a8: 2f80006f jal x0,800087a0 + +800084ac : +800084ac: 0042a303 lw x6,4(x5) +800084b0: 00010817 auipc x16,0x10 +800084b4: dd880813 addi x16,x16,-552 # 80018288 +800084b8: 00682023 sw x6,0(x16) +800084bc: 0002a303 lw x6,0(x5) +800084c0: 10622423 sw x6,264(x4) # 108 +800084c4: 00010817 auipc x16,0x10 +800084c8: dc480813 addi x16,x16,-572 # 80018288 +800084cc: 00082303 lw x6,0(x16) +800084d0: 00010397 auipc x7,0x10 +800084d4: 4f338393 addi x7,x7,1267 # 800189c3 +800084d8: 28730463 beq x6,x7,80008760 +800084dc: 00000413 addi x8,x0,0 +800084e0: 00010817 auipc x16,0x10 +800084e4: da080813 addi x16,x16,-608 # 80018280 +800084e8: 00882023 sw x8,0(x16) +800084ec: 00010397 auipc x7,0x10 +800084f0: 4ee38393 addi x7,x7,1262 # 800189da +800084f4: 00731863 bne x6,x7,80008504 +800084f8: 00100413 addi x8,x0,1 +800084fc: 00000493 addi x9,x0,0 +80008500: 2740006f jal x0,80008774 +80008504: 00010397 auipc x7,0x10 +80008508: 5d838393 addi x7,x7,1496 # 80018adc +8000850c: 00731863 bne x6,x7,8000851c +80008510: 00200413 addi x8,x0,2 +80008514: 00000493 addi x9,x0,0 +80008518: 25c0006f jal x0,80008774 +8000851c: 00010397 auipc x7,0x10 +80008520: 6bb38393 addi x7,x7,1723 # 80018bd7 +80008524: 00731863 bne x6,x7,80008534 +80008528: 00300413 addi x8,x0,3 +8000852c: 00000493 addi x9,x0,0 +80008530: 2440006f jal x0,80008774 +80008534: 00010397 auipc x7,0x10 +80008538: 79638393 addi x7,x7,1942 # 80018cca +8000853c: 00731863 bne x6,x7,8000854c +80008540: 00400413 addi x8,x0,4 +80008544: 00000493 addi x9,x0,0 +80008548: 22c0006f jal x0,80008774 +8000854c: 00011397 auipc x7,0x11 +80008550: 8f138393 addi x7,x7,-1807 # 80018e3d +80008554: 00731863 bne x6,x7,80008564 +80008558: 00500413 addi x8,x0,5 +8000855c: 00000493 addi x9,x0,0 +80008560: 2140006f jal x0,80008774 +80008564: 00011397 auipc x7,0x11 +80008568: 85d38393 addi x7,x7,-1955 # 80018dc1 +8000856c: 00731863 bne x6,x7,8000857c +80008570: 00600413 addi x8,x0,6 +80008574: 00000493 addi x9,x0,0 +80008578: 1fc0006f jal x0,80008774 +8000857c: 00011397 auipc x7,0x11 +80008580: 88338393 addi x7,x7,-1917 # 80018dff +80008584: 00731863 bne x6,x7,80008594 +80008588: 00700413 addi x8,x0,7 +8000858c: 00000493 addi x9,x0,0 +80008590: 1e40006f jal x0,80008774 +80008594: 00010397 auipc x7,0x10 +80008598: 48638393 addi x7,x7,1158 # 80018a1a +8000859c: 00731863 bne x6,x7,800085ac +800085a0: 00100413 addi x8,x0,1 +800085a4: 00100493 addi x9,x0,1 +800085a8: 1cc0006f jal x0,80008774 +800085ac: 00010397 auipc x7,0x10 +800085b0: 56e38393 addi x7,x7,1390 # 80018b1a +800085b4: 00731863 bne x6,x7,800085c4 +800085b8: 00200413 addi x8,x0,2 +800085bc: 00100493 addi x9,x0,1 +800085c0: 1b40006f jal x0,80008774 +800085c4: 00010397 auipc x7,0x10 +800085c8: 64f38393 addi x7,x7,1615 # 80018c13 +800085cc: 00731863 bne x6,x7,800085dc +800085d0: 00300413 addi x8,x0,3 +800085d4: 00100493 addi x9,x0,1 +800085d8: 19c0006f jal x0,80008774 +800085dc: 00010397 auipc x7,0x10 +800085e0: 72b38393 addi x7,x7,1835 # 80018d07 +800085e4: 00731863 bne x6,x7,800085f4 +800085e8: 00400413 addi x8,x0,4 +800085ec: 00100493 addi x9,x0,1 +800085f0: 1840006f jal x0,80008774 +800085f4: 00011397 auipc x7,0x11 +800085f8: 88438393 addi x7,x7,-1916 # 80018e78 +800085fc: 00731863 bne x6,x7,8000860c +80008600: 00500413 addi x8,x0,5 +80008604: 00100493 addi x9,x0,1 +80008608: 16c0006f jal x0,80008774 +8000860c: 00010397 auipc x7,0x10 +80008610: 44e38393 addi x7,x7,1102 # 80018a5a +80008614: 00731863 bne x6,x7,80008624 +80008618: 00100413 addi x8,x0,1 +8000861c: 00200493 addi x9,x0,2 +80008620: 1540006f jal x0,80008774 +80008624: 00010397 auipc x7,0x10 +80008628: 53438393 addi x7,x7,1332 # 80018b58 +8000862c: 00731863 bne x6,x7,8000863c +80008630: 00200413 addi x8,x0,2 +80008634: 00200493 addi x9,x0,2 +80008638: 13c0006f jal x0,80008774 +8000863c: 00010397 auipc x7,0x10 +80008640: 61338393 addi x7,x7,1555 # 80018c4f +80008644: 00731863 bne x6,x7,80008654 +80008648: 00300413 addi x8,x0,3 +8000864c: 00200493 addi x9,x0,2 +80008650: 1240006f jal x0,80008774 +80008654: 00010397 auipc x7,0x10 +80008658: 6f038393 addi x7,x7,1776 # 80018d44 +8000865c: 00731863 bne x6,x7,8000866c +80008660: 00400413 addi x8,x0,4 +80008664: 00200493 addi x9,x0,2 +80008668: 10c0006f jal x0,80008774 +8000866c: 00011397 auipc x7,0x11 +80008670: 84738393 addi x7,x7,-1977 # 80018eb3 +80008674: 00731863 bne x6,x7,80008684 +80008678: 00500413 addi x8,x0,5 +8000867c: 00200493 addi x9,x0,2 +80008680: 0f40006f jal x0,80008774 +80008684: 00010397 auipc x7,0x10 +80008688: 41738393 addi x7,x7,1047 # 80018a9b +8000868c: 00731863 bne x6,x7,8000869c +80008690: 00100413 addi x8,x0,1 +80008694: 00300493 addi x9,x0,3 +80008698: 0dc0006f jal x0,80008774 +8000869c: 00010397 auipc x7,0x10 +800086a0: 4fb38393 addi x7,x7,1275 # 80018b97 +800086a4: 00731863 bne x6,x7,800086b4 +800086a8: 00200413 addi x8,x0,2 +800086ac: 00300493 addi x9,x0,3 +800086b0: 0c40006f jal x0,80008774 +800086b4: 00010397 auipc x7,0x10 +800086b8: 5d838393 addi x7,x7,1496 # 80018c8c +800086bc: 00731863 bne x6,x7,800086cc +800086c0: 00300413 addi x8,x0,3 +800086c4: 00300493 addi x9,x0,3 +800086c8: 0ac0006f jal x0,80008774 +800086cc: 00010397 auipc x7,0x10 +800086d0: 6b638393 addi x7,x7,1718 # 80018d82 +800086d4: 00731863 bne x6,x7,800086e4 +800086d8: 00400413 addi x8,x0,4 +800086dc: 00300493 addi x9,x0,3 +800086e0: 0940006f jal x0,80008774 +800086e4: 00011397 auipc x7,0x11 +800086e8: 80b38393 addi x7,x7,-2037 # 80018eef +800086ec: 00731863 bne x6,x7,800086fc +800086f0: 00500413 addi x8,x0,5 +800086f4: 00300493 addi x9,x0,3 +800086f8: 07c0006f jal x0,80008774 +800086fc: 00011397 auipc x7,0x11 +80008700: 83038393 addi x7,x7,-2000 # 80018f2c +80008704: 00731863 bne x6,x7,80008714 +80008708: 00800413 addi x8,x0,8 +8000870c: 00000493 addi x9,x0,0 +80008710: 0640006f jal x0,80008774 +80008714: 00011397 auipc x7,0x11 +80008718: 86738393 addi x7,x7,-1945 # 80018f7b +8000871c: 00731863 bne x6,x7,8000872c +80008720: 00800413 addi x8,x0,8 +80008724: 00000493 addi x9,x0,0 +80008728: 04c0006f jal x0,80008774 +8000872c: 00011397 auipc x7,0x11 +80008730: 94a38393 addi x7,x7,-1718 # 80019076 +80008734: 00731863 bne x6,x7,80008744 +80008738: 00800413 addi x8,x0,8 +8000873c: 00100493 addi x9,x0,1 +80008740: 0340006f jal x0,80008774 +80008744: 00011397 auipc x7,0x11 +80008748: a2e38393 addi x7,x7,-1490 # 80019172 +8000874c: 00731863 bne x6,x7,8000875c +80008750: 00800413 addi x8,x0,8 +80008754: 00200493 addi x9,x0,2 +80008758: 01c0006f jal x0,80008774 +8000875c: 0340006f jal x0,80008790 + +80008760 : +80008760: 00900413 addi x8,x0,9 +80008764: 00010817 auipc x16,0x10 +80008768: b1c80813 addi x16,x16,-1252 # 80018280 +8000876c: 00882023 sw x8,0(x16) +80008770: 0300006f jal x0,800087a0 + +80008774 : +80008774: 00010817 auipc x16,0x10 +80008778: b0c80813 addi x16,x16,-1268 # 80018280 +8000877c: 00882023 sw x8,0(x16) +80008780: 00010817 auipc x16,0x10 +80008784: b0480813 addi x16,x16,-1276 # 80018284 +80008788: 00982023 sw x9,0(x16) +8000878c: 0140006f jal x0,800087a0 + +80008790 : +80008790: 00010817 auipc x16,0x10 +80008794: af080813 addi x16,x16,-1296 # 80018280 +80008798: 00082023 sw x0,0(x16) +8000879c: 0040006f jal x0,800087a0 + +800087a0 : +800087a0: 0002a303 lw x6,0(x5) +800087a4: 10622423 sw x6,264(x4) # 108 +800087a8: 00035383 lhu x7,0(x6) +800087ac: 0033f413 andi x8,x7,3 +800087b0: 00300493 addi x9,x0,3 +800087b4: 00941863 bne x8,x9,800087c4 +800087b8: 00235403 lhu x8,2(x6) +800087bc: 01041413 slli x8,x8,0x10 +800087c0: 0083e3b3 or x7,x7,x8 +800087c4: 10722023 sw x7,256(x4) # 100 +800087c8: 0042a303 lw x6,4(x5) +800087cc: 12622023 sw x6,288(x4) # 120 + +800087d0 : +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: ff250513 addi x10,x10,-14 # 800187d2 +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: fef50513 addi x10,x10,-17 # 8001880f +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 00000013 addi x0,x0,0 +8000884c: 00000013 addi x0,x0,0 +80008850: 00000013 addi x0,x0,0 +80008854: 00000013 addi x0,x0,0 +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: 06650513 addi x10,x10,102 # 800188c6 +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 + +80008888 : +80008888: 00010517 auipc x10,0x10 +8000888c: 9e852503 lw x10,-1560(x10) # 80018270 +80008890: 00022097 auipc x1,0x22 +80008894: cd4080e7 jalr x1,-812(x1) # 8002a564 + +80008898 : +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: 03850513 addi x10,x10,56 # 800188d8 +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 00010517 auipc x10,0x10 +800088cc: 88852503 lw x10,-1912(x10) # 80018150 +800088d0: 00300593 addi x11,x0,3 +800088d4: 52b50c63 beq x10,x11,80008e0c +800088d8: 00000013 addi x0,x0,0 +800088dc: 00000013 addi x0,x0,0 +800088e0: 00010517 auipc x10,0x10 +800088e4: ffa50513 addi x10,x10,-6 # 800188da +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 00022097 auipc x1,0x22 +80008904: c64080e7 jalr x1,-924(x1) # 8002a564 +80008908: 00010517 auipc x10,0x10 +8000890c: 94852503 lw x10,-1720(x10) # 80018250 +80008910: 02000593 addi x11,x0,32 +80008914: 00357613 andi x12,x10,3 +80008918: 00300693 addi x13,x0,3 +8000891c: 00d60463 beq x12,x13,80008924 +80008920: 01000593 addi x11,x0,16 +80008924: 3f4010ef jal x1,80009d18 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: 97850513 addi x10,x10,-1672 # 800182b8 +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 00000013 addi x0,x0,0 +8000896c: 00000013 addi x0,x0,0 +80008970: 00000013 addi x0,x0,0 +80008974: 00000013 addi x0,x0,0 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 00010517 auipc x10,0x10 +80008984: f6e50513 addi x10,x10,-146 # 800188ee +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00010517 auipc x10,0x10 +800089ac: 8b052503 lw x10,-1872(x10) # 80018258 +800089b0: 02000593 addi x11,x0,32 +800089b4: 364010ef jal x1,80009d18 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00010517 auipc x10,0x10 +800089c4: 8f850513 addi x10,x10,-1800 # 800182b8 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 00000013 addi x0,x0,0 +800089ec: 00000013 addi x0,x0,0 +800089f0: 00000013 addi x0,x0,0 +800089f4: 00000013 addi x0,x0,0 +800089f8: 00000013 addi x0,x0,0 +800089fc: 00000013 addi x0,x0,0 +80008a00: 00011517 auipc x10,0x11 +80008a04: 92550513 addi x10,x10,-1755 # 80019325 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00022097 auipc x1,0x22 +80008a24: b44080e7 jalr x1,-1212(x1) # 8002a564 +80008a28: 0000f517 auipc x10,0xf +80008a2c: 72852503 lw x10,1832(x10) # 80018150 +80008a30: 00050663 beq x10,x0,80008a3c +80008a34: 00300593 addi x11,x0,3 +80008a38: 04b51063 bne x10,x11,80008a78 +80008a3c: 07800593 addi x11,x0,120 +80008a40: 00010617 auipc x12,0x10 +80008a44: 87860613 addi x12,x12,-1928 # 800182b8 +80008a48: 00000013 addi x0,x0,0 +80008a4c: 00000013 addi x0,x0,0 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00b60023 sb x11,0(x12) +80008a64: 00160613 addi x12,x12,1 +80008a68: 0000f517 auipc x10,0xf +80008a6c: 7ec52503 lw x10,2028(x10) # 80018254 +80008a70: 324010ef jal x1,80009d94 +80008a74: 1180006f jal x0,80008b8c + +80008a78 : +80008a78: 00100593 addi x11,x0,1 +80008a7c: 04b50863 beq x10,x11,80008acc +80008a80: 00400593 addi x11,x0,4 +80008a84: 08b50a63 beq x10,x11,80008b18 +80008a88: 00500593 addi x11,x0,5 +80008a8c: 0cb50463 beq x10,x11,80008b54 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 00011517 auipc x10,0x11 +80008aa4: 99b50513 addi x10,x10,-1637 # 8001943b +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00022097 auipc x1,0x22 +80008ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 +80008ac8: 1000006f jal x0,80008bc8 + +80008acc : +80008acc: 06600593 addi x11,x0,102 +80008ad0: 00000013 addi x0,x0,0 +80008ad4: 00000013 addi x0,x0,0 +80008ad8: 00000013 addi x0,x0,0 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 0000f617 auipc x12,0xf +80008ae4: 7d860613 addi x12,x12,2008 # 800182b8 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 0000f517 auipc x10,0xf +80008b0c: 74c52503 lw x10,1868(x10) # 80018254 +80008b10: 284010ef jal x1,80009d94 +80008b14: 0780006f jal x0,80008b8c + +80008b18 : +80008b18: 07600593 addi x11,x0,118 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 0000f617 auipc x12,0xf +80008b24: 79860613 addi x12,x12,1944 # 800182b8 +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00b60023 sb x11,0(x12) +80008b44: 00160613 addi x12,x12,1 +80008b48: 0000f517 auipc x10,0xf +80008b4c: 70c52503 lw x10,1804(x10) # 80018254 +80008b50: 244010ef jal x1,80009d94 + +80008b54 : +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 00010517 auipc x10,0x10 +80008b64: 7be50513 addi x10,x10,1982 # 8001931e +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80008b88: 0400006f jal x0,80008bc8 + +80008b8c : +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 0000f517 auipc x10,0xf +80008ba4: 71850513 addi x10,x10,1816 # 800182b8 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 + +80008bc8 : +80008bc8: 00000013 addi x0,x0,0 +80008bcc: 00000013 addi x0,x0,0 +80008bd0: 00000013 addi x0,x0,0 +80008bd4: 00000013 addi x0,x0,0 +80008bd8: 00000013 addi x0,x0,0 +80008bdc: 00000013 addi x0,x0,0 +80008be0: 00010517 auipc x10,0x10 +80008be4: 75650513 addi x10,x10,1878 # 80019336 +80008be8: 00000013 addi x0,x0,0 +80008bec: 00000013 addi x0,x0,0 +80008bf0: 00000013 addi x0,x0,0 +80008bf4: 00000013 addi x0,x0,0 +80008bf8: 00000013 addi x0,x0,0 +80008bfc: 00000013 addi x0,x0,0 +80008c00: 00022097 auipc x1,0x22 +80008c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80008c08: 0000f517 auipc x10,0xf +80008c0c: 54852503 lw x10,1352(x10) # 80018150 +80008c10: 00100593 addi x11,x0,1 +80008c14: 00b51c63 bne x10,x11,80008c2c +80008c18: 0000f517 auipc x10,0xf +80008c1c: 64852503 lw x10,1608(x10) # 80018260 +80008c20: 02000593 addi x11,x0,32 +80008c24: 0f4010ef jal x1,80009d18 +80008c28: 0140006f jal x0,80008c3c + +80008c2c : +80008c2c: 0000f517 auipc x10,0xf +80008c30: 63452503 lw x10,1588(x10) # 80018260 +80008c34: 02000593 addi x11,x0,32 +80008c38: 0e0010ef jal x1,80009d18 + +80008c3c : +80008c3c: 00000013 addi x0,x0,0 +80008c40: 0000f517 auipc x10,0xf +80008c44: 67850513 addi x10,x10,1656 # 800182b8 +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: 61052503 lw x10,1552(x10) # 80018278 +80008c70: 08051e63 bne x10,x0,80008d0c +80008c74: 00000013 addi x0,x0,0 +80008c78: 00000013 addi x0,x0,0 +80008c7c: 00000013 addi x0,x0,0 +80008c80: 00010517 auipc x10,0x10 +80008c84: 6cd50513 addi x10,x10,1741 # 8001934d +80008c88: 00000013 addi x0,x0,0 +80008c8c: 00000013 addi x0,x0,0 +80008c90: 00000013 addi x0,x0,0 +80008c94: 00000013 addi x0,x0,0 +80008c98: 00000013 addi x0,x0,0 +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 00022097 auipc x1,0x22 +80008ca4: 8c4080e7 jalr x1,-1852(x1) # 8002a564 +80008ca8: 0000f517 auipc x10,0xf +80008cac: 4a852503 lw x10,1192(x10) # 80018150 +80008cb0: 00100593 addi x11,x0,1 +80008cb4: 00b51c63 bne x10,x11,80008ccc +80008cb8: 0000f517 auipc x10,0xf +80008cbc: 5b052503 lw x10,1456(x10) # 80018268 +80008cc0: 02000593 addi x11,x0,32 +80008cc4: 054010ef jal x1,80009d18 +80008cc8: 0140006f jal x0,80008cdc + +80008ccc : +80008ccc: 0000f517 auipc x10,0xf +80008cd0: 59c52503 lw x10,1436(x10) # 80018268 +80008cd4: 02000593 addi x11,x0,32 +80008cd8: 040010ef jal x1,80009d18 + +80008cdc : +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 0000f517 auipc x10,0xf +80008ce4: 5d850513 addi x10,x10,1496 # 800182b8 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 5bd0006f jal x0,80009ac4 + +80008d0c : +80008d0c: 00100593 addi x11,x0,1 +80008d10: 06b51e63 bne x10,x11,80008d8c + +80008d14 : +80008d14: 00000013 addi x0,x0,0 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 00010517 auipc x10,0x10 +80008d24: 64450513 addi x10,x10,1604 # 80019364 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 0000f517 auipc x10,0xf +80008d4c: 52052503 lw x10,1312(x10) # 80018268 +80008d50: 02000593 addi x11,x0,32 +80008d54: 7c5000ef jal x1,80009d18 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 0000f517 auipc x10,0xf +80008d64: 55850513 addi x10,x10,1368 # 800182b8 +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 53d0006f jal x0,80009ac4 + +80008d8c : +80008d8c: 00000013 addi x0,x0,0 +80008d90: 00000013 addi x0,x0,0 +80008d94: 00000013 addi x0,x0,0 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 00010517 auipc x10,0x10 +80008da4: 62250513 addi x10,x10,1570 # 800193c2 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 0000f517 auipc x10,0xf +80008dcc: 4a052503 lw x10,1184(x10) # 80018268 +80008dd0: 02000593 addi x11,x0,32 +80008dd4: 745000ef jal x1,80009d18 +80008dd8: 00000013 addi x0,x0,0 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 0000f517 auipc x10,0xf +80008de4: 4d850513 addi x10,x10,1240 # 800182b8 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 4bd0006f jal x0,80009ac4 + +80008e0c : +80008e0c: 0000f417 auipc x8,0xf +80008e10: 47442403 lw x8,1140(x8) # 80018280 +80008e14: 00900493 addi x9,x0,9 +80008e18: 0a940c63 beq x8,x9,80008ed0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00010517 auipc x10,0x10 +80008e24: 64750513 addi x10,x10,1607 # 80019467 +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 00000013 addi x0,x0,0 +80008e4c: 00000013 addi x0,x0,0 +80008e50: 00000013 addi x0,x0,0 +80008e54: 00000013 addi x0,x0,0 +80008e58: 00000013 addi x0,x0,0 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 00010517 auipc x10,0x10 +80008e64: 63350513 addi x10,x10,1587 # 80019493 +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 0000f817 auipc x16,0xf +80008e8c: 40080813 addi x16,x16,1024 # 80018288 +80008e90: 00082503 lw x10,0(x16) +80008e94: 00021097 auipc x1,0x21 +80008e98: 6d0080e7 jalr x1,1744(x1) # 8002a564 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00010517 auipc x10,0x10 +80008ea4: a3850513 addi x10,x10,-1480 # 800188d8 +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 280404e3 beq x8,x0,80009950 +80008ecc: 3400006f jal x0,8000920c + +80008ed0 : +80008ed0: 00000013 addi x0,x0,0 +80008ed4: 00000013 addi x0,x0,0 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 00010517 auipc x10,0x10 +80008ee4: 5c350513 addi x10,x10,1475 # 800194a3 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 0000f517 auipc x10,0xf +80008f0c: 36052503 lw x10,864(x10) # 80018268 +80008f10: 02000593 addi x11,x0,32 +80008f14: 605000ef jal x1,80009d18 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 0000f517 auipc x10,0xf +80008f24: 39850513 addi x10,x10,920 # 800182b8 +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 00000013 addi x0,x0,0 +80008f4c: 00000013 addi x0,x0,0 +80008f50: 00000013 addi x0,x0,0 +80008f54: 00000013 addi x0,x0,0 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 00010517 auipc x10,0x10 +80008f64: 56e50513 addi x10,x10,1390 # 800194ce +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f517 auipc x10,0xf +80008f8c: 2d852503 lw x10,728(x10) # 80018260 +80008f90: 02000593 addi x11,x0,32 +80008f94: 585000ef jal x1,80009d18 +80008f98: 00000013 addi x0,x0,0 +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 0000f517 auipc x10,0xf +80008fa4: 31850513 addi x10,x10,792 # 800182b8 +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 0000f317 auipc x6,0xf +80008fcc: 29832303 lw x6,664(x6) # 80018260 +80008fd0: 0000f397 auipc x7,0xf +80008fd4: 2983a383 lw x7,664(x7) # 80018268 +80008fd8: 10736a63 bltu x6,x7,800090ec + +80008fdc : +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00010517 auipc x10,0x10 +80008fe4: 51d50513 addi x10,x10,1309 # 800194fd +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 00000013 addi x0,x0,0 +8000900c: 00000013 addi x0,x0,0 +80009010: 00000013 addi x0,x0,0 +80009014: 00000013 addi x0,x0,0 +80009018: 00000013 addi x0,x0,0 +8000901c: 00000013 addi x0,x0,0 +80009020: 00010517 auipc x10,0x10 +80009024: 54550513 addi x10,x10,1349 # 80019565 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 00021097 auipc x1,0x21 +80009044: 524080e7 jalr x1,1316(x1) # 8002a564 +80009048: 0000f317 auipc x6,0xf +8000904c: 21832303 lw x6,536(x6) # 80018260 +80009050: 0000f397 auipc x7,0xf +80009054: 2183a383 lw x7,536(x7) # 80018268 +80009058: 40730533 sub x10,x6,x7 +8000905c: 02000593 addi x11,x0,32 +80009060: 4b9000ef jal x1,80009d18 +80009064: 00000013 addi x0,x0,0 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 0000f517 auipc x10,0xf +80009084: 23850513 addi x10,x10,568 # 800182b8 +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 00000013 addi x0,x0,0 +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: 4cc50513 addi x10,x10,1228 # 8001958c +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 1dd0006f jal x0,80009ac4 + +800090ec : +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: 42950513 addi x10,x10,1065 # 80019529 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 00000013 addi x0,x0,0 +8000912c: 00000013 addi x0,x0,0 +80009130: 00000013 addi x0,x0,0 +80009134: 00000013 addi x0,x0,0 +80009138: 00000013 addi x0,x0,0 +8000913c: 00000013 addi x0,x0,0 +80009140: 00010517 auipc x10,0x10 +80009144: 42550513 addi x10,x10,1061 # 80019565 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 00021097 auipc x1,0x21 +80009164: 404080e7 jalr x1,1028(x1) # 8002a564 +80009168: 0000f317 auipc x6,0xf +8000916c: 10032303 lw x6,256(x6) # 80018268 +80009170: 0000f397 auipc x7,0xf +80009174: 0f03a383 lw x7,240(x7) # 80018260 +80009178: 40730533 sub x10,x6,x7 +8000917c: 02000593 addi x11,x0,32 +80009180: 399000ef jal x1,80009d18 +80009184: 00000013 addi x0,x0,0 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 0000f517 auipc x10,0xf +800091a4: 11850513 addi x10,x10,280 # 800182b8 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 00000013 addi x0,x0,0 +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00010517 auipc x10,0x10 +800091e4: 49450513 addi x10,x10,1172 # 80019674 +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0bd0006f jal x0,80009ac4 + +8000920c : +8000920c: 00000013 addi x0,x0,0 +80009210: 00000013 addi x0,x0,0 +80009214: 00000013 addi x0,x0,0 +80009218: 00000013 addi x0,x0,0 +8000921c: 00000013 addi x0,x0,0 +80009220: 00010517 auipc x10,0x10 +80009224: 53b50513 addi x10,x10,1339 # 8001975b +80009228: 00000013 addi x0,x0,0 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00021097 auipc x1,0x21 +80009244: 324080e7 jalr x1,804(x1) # 8002a564 +80009248: 0000f517 auipc x10,0xf +8000924c: 03c52503 lw x10,60(x10) # 80018284 +80009250: 04050a63 beq x10,x0,800092a4 +80009254: 00100593 addi x11,x0,1 +80009258: 08b50663 beq x10,x11,800092e4 +8000925c: 00200593 addi x11,x0,2 +80009260: 0cb50263 beq x10,x11,80009324 +80009264: 00300593 addi x11,x0,3 +80009268: 0eb50e63 beq x10,x11,80009364 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: 51750513 addi x10,x10,1303 # 80019797 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 1000006f jal x0,800093a0 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: 4b550513 addi x10,x10,1205 # 80019775 +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0c00006f jal x0,800093a0 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: 47d50513 addi x10,x10,1149 # 8001977d +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0800006f jal x0,800093a0 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: 44550513 addi x10,x10,1093 # 80019785 +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 +80009360: 0400006f jal x0,800093a0 + +80009364 : +80009364: 00000013 addi x0,x0,0 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: 40e50513 addi x10,x10,1038 # 8001978e +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 + +800093a0 : +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 00000013 addi x0,x0,0 +800093ac: 00000013 addi x0,x0,0 +800093b0: 00000013 addi x0,x0,0 +800093b4: 00000013 addi x0,x0,0 +800093b8: 00000013 addi x0,x0,0 +800093bc: 00000013 addi x0,x0,0 +800093c0: 00010517 auipc x10,0x10 +800093c4: 3e050513 addi x10,x10,992 # 800197a0 +800093c8: 00000013 addi x0,x0,0 +800093cc: 00000013 addi x0,x0,0 +800093d0: 00000013 addi x0,x0,0 +800093d4: 00000013 addi x0,x0,0 +800093d8: 00000013 addi x0,x0,0 +800093dc: 00000013 addi x0,x0,0 +800093e0: 00021097 auipc x1,0x21 +800093e4: 184080e7 jalr x1,388(x1) # 8002a564 +800093e8: 0000f517 auipc x10,0xf +800093ec: e9852503 lw x10,-360(x10) # 80018280 +800093f0: 00100593 addi x11,x0,1 +800093f4: 06b50863 beq x10,x11,80009464 +800093f8: 00200593 addi x11,x0,2 +800093fc: 0ab50463 beq x10,x11,800094a4 +80009400: 00300593 addi x11,x0,3 +80009404: 0eb50063 beq x10,x11,800094e4 +80009408: 00400593 addi x11,x0,4 +8000940c: 10b50c63 beq x10,x11,80009524 +80009410: 00500593 addi x11,x0,5 +80009414: 14b50863 beq x10,x11,80009564 +80009418: 00600593 addi x11,x0,6 +8000941c: 18b50463 beq x10,x11,800095a4 +80009420: 00700593 addi x11,x0,7 +80009424: 1cb50063 beq x10,x11,800095e4 +80009428: 00800593 addi x11,x0,8 +8000942c: 1eb50c63 beq x10,x11,80009624 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: 4b750513 addi x10,x10,1207 # 800198f7 +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 2000006f jal x0,80009660 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: 33a50513 addi x10,x10,826 # 800197ba +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1c00006f jal x0,80009660 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: 32b50513 addi x10,x10,811 # 800197eb +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1800006f jal x0,80009660 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: 30b50513 addi x10,x10,779 # 8001980b +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1400006f jal x0,80009660 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: 2e950513 addi x10,x10,745 # 80019829 +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 1000006f jal x0,80009660 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: 2c850513 addi x10,x10,712 # 80019848 +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0c00006f jal x0,80009660 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: 2b050513 addi x10,x10,688 # 80019870 +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0800006f jal x0,80009660 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: 29c50513 addi x10,x10,668 # 8001989c +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 +80009620: 0400006f jal x0,80009660 + +80009624 : +80009624: 00000013 addi x0,x0,0 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: 28850513 addi x10,x10,648 # 800198c8 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 + +80009660 : +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 00000013 addi x0,x0,0 +8000966c: 00000013 addi x0,x0,0 +80009670: 00000013 addi x0,x0,0 +80009674: 00000013 addi x0,x0,0 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 00010517 auipc x10,0x10 +80009684: 28650513 addi x10,x10,646 # 80019906 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 0000f517 auipc x10,0xf +800096ac: bc052503 lw x10,-1088(x10) # 80018268 +800096b0: 02000593 addi x11,x0,32 +800096b4: 664000ef jal x1,80009d18 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 0000f517 auipc x10,0xf +800096c4: bf850513 addi x10,x10,-1032 # 800182b8 +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 00000013 addi x0,x0,0 +800096ec: 00000013 addi x0,x0,0 +800096f0: 00000013 addi x0,x0,0 +800096f4: 00000013 addi x0,x0,0 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 00010517 auipc x10,0x10 +80009704: 21d50513 addi x10,x10,541 # 8001991d +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000f517 auipc x10,0xf +8000972c: b3852503 lw x10,-1224(x10) # 80018260 +80009730: 02000593 addi x11,x0,32 +80009734: 5e4000ef jal x1,80009d18 +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 0000f517 auipc x10,0xf +80009744: b7850513 addi x10,x10,-1160 # 800182b8 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000f517 auipc x10,0xf +8000976c: b1852503 lw x10,-1256(x10) # 80018280 +80009770: 00200593 addi x11,x0,2 +80009774: 08b51463 bne x10,x11,800097fc +80009778: 00000013 addi x0,x0,0 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: 1b450513 addi x10,x10,436 # 80019934 +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000f517 auipc x10,0xf +800097ac: ac052503 lw x10,-1344(x10) # 80018268 +800097b0: 284000ef jal x1,80009a34 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 +800097bc: 00000013 addi x0,x0,0 +800097c0: 00010517 auipc x10,0x10 +800097c4: 18b50513 addi x10,x10,395 # 8001994b +800097c8: 00000013 addi x0,x0,0 +800097cc: 00000013 addi x0,x0,0 +800097d0: 00000013 addi x0,x0,0 +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00021097 auipc x1,0x21 +800097e4: d84080e7 jalr x1,-636(x1) # 8002a564 +800097e8: 0000f517 auipc x10,0xf +800097ec: a7852503 lw x10,-1416(x10) # 80018260 +800097f0: 244000ef jal x1,80009a34 +800097f4: 00021097 auipc x1,0x21 +800097f8: d70080e7 jalr x1,-656(x1) # 8002a564 + +800097fc : +800097fc: 00000097 auipc x1,0x0 +80009800: 314080e7 jalr x1,788(x1) # 80009b10 +80009804: 0000f517 auipc x10,0xf +80009808: a7c52503 lw x10,-1412(x10) # 80018280 +8000980c: 00100593 addi x11,x0,1 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: 1a150513 addi x10,x10,417 # 800199c1 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 27c0006f jal x0,80009ac4 +8000984c: 00200593 addi x11,x0,2 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: 23750513 addi x10,x10,567 # 80019a97 +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 23c0006f jal x0,80009ac4 +8000988c: 00300593 addi x11,x0,3 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: 2ea50513 addi x10,x10,746 # 80019b8a +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1fc0006f jal x0,80009ac4 +800098cc: 00400593 addi x11,x0,4 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: 3a550513 addi x10,x10,933 # 80019c85 +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 1bc0006f jal x0,80009ac4 +8000990c: 00500593 addi x11,x0,5 +80009910: 02b51e63 bne x10,x11,8000994c +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: 44c50513 addi x10,x10,1100 # 80019d6c +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 17c0006f jal x0,80009ac4 +8000994c: 1780006f jal x0,80009ac4 + +80009950 : +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 00010517 auipc x10,0x10 +80009964: 01950513 addi x10,x10,25 # 80019979 +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 0000f617 auipc x12,0xf +8000998c: 91062603 lw x12,-1776(x12) # 80018298 +80009990: 00000013 addi x0,x0,0 +80009994: 00000013 addi x0,x0,0 +80009998: 00000013 addi x0,x0,0 +8000999c: 00000013 addi x0,x0,0 +800099a0: 0000f517 auipc x10,0xf +800099a4: fc250513 addi x10,x10,-62 # 80018962 +800099a8: 00000013 addi x0,x0,0 +800099ac: 00000013 addi x0,x0,0 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 00021097 auipc x1,0x21 +800099c4: ba4080e7 jalr x1,-1116(x1) # 8002a564 +800099c8: 00065503 lhu x10,0(x12) +800099cc: 01000593 addi x11,x0,16 +800099d0: 00357413 andi x8,x10,3 +800099d4: 00300493 addi x9,x0,3 +800099d8: 00941a63 bne x8,x9,800099ec +800099dc: 00265403 lhu x8,2(x12) +800099e0: 01041413 slli x8,x8,0x10 +800099e4: 00856533 or x10,x10,x8 +800099e8: 02000593 addi x11,x0,32 +800099ec: 32c000ef jal x1,80009d18 +800099f0: 00000013 addi x0,x0,0 +800099f4: 00000013 addi x0,x0,0 +800099f8: 00000013 addi x0,x0,0 +800099fc: 00000013 addi x0,x0,0 +80009a00: 0000f517 auipc x10,0xf +80009a04: 8b850513 addi x10,x10,-1864 # 800182b8 +80009a08: 00000013 addi x0,x0,0 +80009a0c: 00000013 addi x0,x0,0 +80009a10: 00000013 addi x0,x0,0 +80009a14: 00000013 addi x0,x0,0 +80009a18: 00000013 addi x0,x0,0 +80009a1c: 00000013 addi x0,x0,0 +80009a20: 00021097 auipc x1,0x21 +80009a24: b44080e7 jalr x1,-1212(x1) # 8002a564 +80009a28: 00000097 auipc x1,0x0 +80009a2c: 0e8080e7 jalr x1,232(x1) # 80009b10 +80009a30: 0940006f jal x0,80009ac4 + +80009a34 : +80009a34: 02054263 blt x10,x0,80009a58 + +80009a38 : +80009a38: 01800593 addi x11,x0,24 +80009a3c: 04b55463 bge x10,x11,80009a84 +80009a40: 0000f597 auipc x11,0xf +80009a44: 8a058593 addi x11,x11,-1888 # 800182e0 +80009a48: 00251613 slli x12,x10,0x2 +80009a4c: 00c585b3 add x11,x11,x12 +80009a50: 0005a503 lw x10,0(x11) +80009a54: 00008067 jalr x0,0(x1) + +80009a58 : +80009a58: 00100593 addi x11,x0,1 +80009a5c: 01f59593 slli x11,x11,0x1f +80009a60: 00b54533 xor x10,x10,x11 +80009a64: 01000593 addi x11,x0,16 +80009a68: 00b55e63 bge x10,x11,80009a84 +80009a6c: 0000f597 auipc x11,0xf +80009a70: 8d458593 addi x11,x11,-1836 # 80018340 +80009a74: 00251613 slli x12,x10,0x2 +80009a78: 00c585b3 add x11,x11,x12 +80009a7c: 0005a503 lw x10,0(x11) +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 0000f517 auipc x10,0xf +80009aa4: cde50513 addi x10,x10,-802 # 8001877e +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00008067 jalr x0,0(x1) + +80009ac4 : +80009ac4: 00000013 addi x0,x0,0 +80009ac8: 00000013 addi x0,x0,0 +80009acc: 00000013 addi x0,x0,0 +80009ad0: 00000013 addi x0,x0,0 +80009ad4: 00000013 addi x0,x0,0 +80009ad8: 00000013 addi x0,x0,0 +80009adc: 00000013 addi x0,x0,0 +80009ae0: 00010517 auipc x10,0x10 +80009ae4: 93a50513 addi x10,x10,-1734 # 8001941a +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 + +80009b08 : +80009b08: 00021097 auipc x1,0x21 +80009b0c: abc080e7 jalr x1,-1348(x1) # 8002a5c4 + +80009b10 : +80009b10: 0000e617 auipc x12,0xe +80009b14: 78060613 addi x12,x12,1920 # 80018290 +80009b18: 00162023 sw x1,0(x12) +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000f517 auipc x10,0xf +80009b24: e6350513 addi x10,x10,-413 # 80018983 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 0000e517 auipc x10,0xe +80009b4c: 75052503 lw x10,1872(x10) # 80018298 +80009b50: 02000593 addi x11,x0,32 +80009b54: 1c4000ef jal x1,80009d18 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000e517 auipc x10,0xe +80009b64: 75850513 addi x10,x10,1880 # 800182b8 +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 00000013 addi x0,x0,0 +80009b8c: 00000013 addi x0,x0,0 +80009b90: 00000013 addi x0,x0,0 +80009b94: 00000013 addi x0,x0,0 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000f517 auipc x10,0xf +80009ba4: df350513 addi x10,x10,-525 # 80018993 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 0000e517 auipc x10,0xe +80009bcc: 6d852503 lw x10,1752(x10) # 800182a0 +80009bd0: 02000593 addi x11,x0,32 +80009bd4: 144000ef jal x1,80009d18 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000e517 auipc x10,0xe +80009be4: 6d850513 addi x10,x10,1752 # 800182b8 +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 00000013 addi x0,x0,0 +80009c0c: 00000013 addi x0,x0,0 +80009c10: 00000013 addi x0,x0,0 +80009c14: 00000013 addi x0,x0,0 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000f517 auipc x10,0xf +80009c24: d8350513 addi x10,x10,-637 # 800189a3 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 0000e517 auipc x10,0xe +80009c4c: 66052503 lw x10,1632(x10) # 800182a8 +80009c50: 02000593 addi x11,x0,32 +80009c54: 0c4000ef jal x1,80009d18 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000e517 auipc x10,0xe +80009c64: 65850513 addi x10,x10,1624 # 800182b8 +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 00000013 addi x0,x0,0 +80009c8c: 00000013 addi x0,x0,0 +80009c90: 00000013 addi x0,x0,0 +80009c94: 00000013 addi x0,x0,0 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000f517 auipc x10,0xf +80009ca4: d1350513 addi x10,x10,-749 # 800189b3 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000e517 auipc x10,0xe +80009ccc: 5e852503 lw x10,1512(x10) # 800182b0 +80009cd0: 02000593 addi x11,x0,32 +80009cd4: 044000ef jal x1,80009d18 +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000e517 auipc x10,0xe +80009ce4: 5d850513 addi x10,x10,1496 # 800182b8 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 00021097 auipc x1,0x21 +80009d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80009d08: 0000e617 auipc x12,0xe +80009d0c: 58860613 addi x12,x12,1416 # 80018290 +80009d10: 00062083 lw x1,0(x12) +80009d14: 00008067 jalr x0,0(x1) + +80009d18 : +80009d18: 00000013 addi x0,x0,0 +80009d1c: 00000013 addi x0,x0,0 +80009d20: 0000e617 auipc x12,0xe +80009d24: 59860613 addi x12,x12,1432 # 800182b8 +80009d28: 00000013 addi x0,x0,0 +80009d2c: 00000013 addi x0,x0,0 +80009d30: 00000013 addi x0,x0,0 +80009d34: 00000013 addi x0,x0,0 +80009d38: 00000013 addi x0,x0,0 +80009d3c: 00000013 addi x0,x0,0 +80009d40: 03000693 addi x13,x0,48 +80009d44: 00d60023 sb x13,0(x12) +80009d48: 07800693 addi x13,x0,120 +80009d4c: 00d600a3 sb x13,1(x12) +80009d50: 00260613 addi x12,x12,2 +80009d54: 00058693 addi x13,x11,0 + +80009d58 : +80009d58: ffc68693 addi x13,x13,-4 +80009d5c: 00d55733 srl x14,x10,x13 +80009d60: 00f77713 andi x14,x14,15 +80009d64: 00a00793 addi x15,x0,10 +80009d68: 00f74663 blt x14,x15,80009d74 +80009d6c: 05770713 addi x14,x14,87 +80009d70: 0080006f jal x0,80009d78 + +80009d74 : +80009d74: 03070713 addi x14,x14,48 + +80009d78 : +80009d78: 00e60023 sb x14,0(x12) +80009d7c: 00160613 addi x12,x12,1 +80009d80: fc069ce3 bne x13,x0,80009d58 +80009d84: 00a00693 addi x13,x0,10 +80009d88: 00d60023 sb x13,0(x12) +80009d8c: 000600a3 sb x0,1(x12) +80009d90: 00008067 jalr x0,0(x1) + +80009d94 : +80009d94: 00a00693 addi x13,x0,10 +80009d98: 02d54663 blt x10,x13,80009dc4 +80009d9c: ff650513 addi x10,x10,-10 +80009da0: 03100713 addi x14,x0,49 +80009da4: 00d54c63 blt x10,x13,80009dbc +80009da8: ff650513 addi x10,x10,-10 +80009dac: 03200713 addi x14,x0,50 +80009db0: 00d54663 blt x10,x13,80009dbc +80009db4: ff650513 addi x10,x10,-10 +80009db8: 03300713 addi x14,x0,51 +80009dbc: 00e60023 sb x14,0(x12) +80009dc0: 00160613 addi x12,x12,1 +80009dc4: 03050513 addi x10,x10,48 +80009dc8: 00a60023 sb x10,0(x12) +80009dcc: 00a00693 addi x13,x0,10 +80009dd0: 00d600a3 sb x13,1(x12) +80009dd4: 00060123 sb x0,2(x12) +80009dd8: 00008067 jalr x0,0(x1) +80009ddc: 00000013 addi x0,x0,0 +80009de0: 00000013 addi x0,x0,0 +80009de4: 00000013 addi x0,x0,0 +80009de8: 00000013 addi x0,x0,0 +80009dec: 00000013 addi x0,x0,0 +80009df0: 00000013 addi x0,x0,0 +80009df4: 00000013 addi x0,x0,0 +80009df8: 00000013 addi x0,x0,0 +80009dfc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: ef838393 addi x7,x7,-264 # 80007f00 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: edc38393 addi x7,x7,-292 # 80007f00 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: ec438393 addi x7,x7,-316 # 80007f00 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: eb038393 addi x7,x7,-336 # 80007f00 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: ea438393 addi x7,x7,-348 # 80007f00 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e7038393 addi x7,x7,-400 # 80007f00 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 0b430313 addi x6,x6,180 # 80007150 +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e5838393 addi x7,x7,-424 # 80007f00 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 09c30313 addi x6,x6,156 # 80007150 +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e4038393 addi x7,x7,-448 # 80007f00 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 08430313 addi x6,x6,132 # 80007150 +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: e2838393 addi x7,x7,-472 # 80007f00 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: f2078793 addi x15,x15,-224 # 80007160 +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: ffff0117 auipc x2,0xffff0 +8002a4a4: a0010113 addi x2,x2,-1536 # 80019ea0 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: d2018193 addi x3,x3,-736 # 80008200 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 80019443 .word 0x80019443 +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: e5828293 addi x5,x5,-424 # 80029400 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: e3828293 addi x5,x5,-456 # 80029400 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknd-aes32dsmi-00.elf.objdump b/riscv-tests/rv32-Zknd-aes32dsmi-00.elf.objdump new file mode 100644 index 0000000..f4c1a35 --- /dev/null +++ b/riscv-tests/rv32-Zknd-aes32dsmi-00.elf.objdump @@ -0,0 +1,19182 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknd/Zknd-aes32dsmi-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknd/Zknd-aes32dsmi-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009dc0 memsz 0x00009dc0 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009d80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001d600 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80029600 80029600 00028600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003eb8 00000000 00000000 0002967b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007f 00000000 00000000 0002d533 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5b2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d5d5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d5e8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008d 00000000 00000000 0002d610 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d69d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80029600 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cccOJ1M6.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b0 +800081c0 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b1 +8000d846 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b2 +8000d87c l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b3 +8000d8b2 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b4 +800081d8 l .text.rvtest 00000000 failedtest_x8_x7 +8000d8e8 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b5 +8000d91e l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b6 +8000d954 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b7 +80008200 l .text.rvtest 00000000 failedtest_x14_x13 +8000d98a l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b8 +8000d9c0 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b9 +8000d9f6 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b10 +8000da2d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b11 +8000da65 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b12 +8000da9d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b12_str +800002b0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b13 +8000dad5 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b13_str +800002dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b14 +8000db0d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b14_str +8000030c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b15 +8000db45 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b15_str +80000338 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b16 +8000db7d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b16_str +80000364 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b17 +8000dbb5 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b17_str +80000390 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b18 +8000dbed l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b18_str +800003bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b19 +8000dc25 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b19_str +800003e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b20 +8000dc5d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b20_str +80000414 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b21 +8000dc95 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b21_str +80000440 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b22 +8000dccd l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b22_str +8000046c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b23 +8000dd05 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b23_str +80000498 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b24 +8000dd3d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b24_str +800004c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b25 +8000dd75 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b25_str +800004f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b26 +8000ddad l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b26_str +80000520 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b27 +8000dde5 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b27_str +8000054c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b28 +8000de1d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b28_str +8000057c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b29 +8000de55 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b29_str +800005a8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b30 +8000de8d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b30_str +800005d4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_b31 +8000dec5 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_b31_str +80000600 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b0 +8000defd l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b0_str +8000062c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b1 +8000df34 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b1_str +80000658 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b2 +8000df6b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b2_str +80000684 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b3 +8000dfa2 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b3_str +800006b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b4 +8000dfd9 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b4_str +800006e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b5 +8000e010 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b5_str +80000710 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b6 +8000e047 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b6_str +8000073c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b7 +8000e07e l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b7_str +80000768 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b8 +8000e0b5 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b8_str +80000794 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b9 +8000e0ec l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b9_str +800007c0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b10 +8000e123 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b11 +8000e15b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b11_str +80000818 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b12 +8000e193 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b12_str +8000084c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b13 +8000e1cb l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b13_str +80000878 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b14 +8000e203 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b14_str +800008a4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b15 +8000e23b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b16 +8000e273 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b16_str +800008fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b17 +8000e2ab l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b17_str +80000928 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b18 +8000e2e3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b18_str +80000954 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b19 +8000e31b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b19_str +80000980 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b20 +8000e353 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b21 +8000e38b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b21_str +800009dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b22 +8000e3c3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b22_str +80000a08 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b23 +8000e3fb l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b23_str +80000a34 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b24 +8000e433 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b24_str +80000a64 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b25 +8000e46b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b25_str +80000a90 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b26 +8000e4a3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b26_str +80000abc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b27 +8000e4db l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b27_str +80000ae8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b28 +8000e513 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b28_str +80000b14 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b29 +8000e54b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b29_str +80000b40 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b30 +8000e583 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b30_str +80000b6c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_b31 +8000e5bb l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_b31_str +80000b98 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b0 +8000e5f3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b0_str +80000bc4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b1 +8000e629 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b1_str +80000bf0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b2 +8000e65f l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b2_str +80000c1c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b3 +8000e695 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b3_str +80000c50 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b4 +8000e6cb l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b4_str +80000c7c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b5 +8000e701 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b5_str +80000cac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b6 +8000e737 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b6_str +80000cd8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b7 +8000e76d l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b7_str +80000d04 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b8 +8000e7a3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b8_str +80000d30 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b9 +8000e7d9 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b9_str +80000d5c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b10 +8000e80f l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b10_str +80000d88 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b11 +8000e846 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b11_str +80000db4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b12 +8000e87d l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b13 +8000e8b4 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b14 +8000e8eb l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b14_str +80000e40 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b15 +8000e922 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b15_str +80000e6c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b16 +8000e959 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b16_str +80000e98 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b17 +8000e990 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b17_str +80000ec4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b18 +8000e9c7 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b19 +8000e9fe l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b20 +8000ea35 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b20_str +80000f4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b21 +8000ea6c l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b21_str +80000f78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b22 +8000eaa3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b22_str +80000fa4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b23 +8000eada l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b23_str +80000fd0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b24 +8000eb11 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b24_str +80000ffc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b25 +8000eb48 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b25_str +80001028 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b26 +8000eb7f l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b26_str +80001054 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b27 +8000ebb6 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b27_str +80001080 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b28 +8000ebed l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b28_str +800010ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b29 +8000ec24 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b29_str +800010dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b30 +8000ec5b l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b30_str +80001108 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rd_b31 +8000ec92 l .data 00000000 Zknd_aes32dsmi_cg_cp_rd_b31_str +80001134 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x0 +8000ecc9 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x0_str +80001160 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x1 +8000ed07 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x1_str +8000118c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x2 +8000ed45 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x2_str +800011b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000000 +8000ed83 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000000_str +800011e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000001 +8000edc9 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000001_str +80001210 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x7fffffff +8000ee0f l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x7fffffff_str +8000123c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x7ffffffe +8000ee55 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x7ffffffe_str +80001268 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xffffffff +8000ee9b l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xffffffff_str +80001294 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xfffffffe +8000eee1 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xfffffffe_str +800012c0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x5bbc8872 +8000ef27 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x5bbc8872_str +800012ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xaaaaaaaa +8000ef6d l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0xaaaaaaaa_str +80001318 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x55555555 +8000efb3 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs1_edges_0x55555555_str +80001344 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x0 +8000eff9 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x0_str +80001370 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x1 +8000f038 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x1_str +8000139c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x2 +8000f077 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x2_str +800013c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000000 +8000f0b6 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000000_str +800013f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000001 +8000f0fc l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000001_str +80001420 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x7fffffff +8000f142 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x7fffffff_str +8000144c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x7ffffffe +8000f188 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x7ffffffe_str +80001478 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xffffffff +8000f1ce l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xffffffff_str +800014a4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xfffffffe +8000f214 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xfffffffe_str +800014d0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x5bbc8872 +8000f25a l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x5bbc8872_str +800014fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xaaaaaaaa +8000f2a0 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0xaaaaaaaa_str +80001528 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x55555555 +8000f2e6 l .data 00000000 Zknd_aes32dsmi_cg_cp_rs2_edges_0x55555555_str +80001554 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f32c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001580 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f382 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f3d8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f42e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001604 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f48b l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001630 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f4e8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000165c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f545 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001688 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f5a2 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f5ff l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f65c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +8000170c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f6b9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001738 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f716 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001764 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f773 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001790 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f7c9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f81f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f875 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001814 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f8d2 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001840 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f92f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000186c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f98c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001898 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f9e9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000fa46 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000faa3 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000191c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000fb00 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001948 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000fb5d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001974 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fbba l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fc10 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fc66 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fcbc l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a24 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fd19 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a50 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fd76 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a7c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fdd3 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aa8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fe30 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fe8d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b00 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000feea l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b2c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000ff47 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b58 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000ffa4 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b84 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +80010001 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8001005e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bdc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +800100bb l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c08 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +80010118 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c34 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8001017c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c60 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +800101e0 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c8c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +80010244 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cb8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +800102a8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8001030c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d10 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +80010370 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d3c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +800103d4 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d68 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010438 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d94 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8001049c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +800104f9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001dec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +80010556 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e18 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +800105b3 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e44 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +80010617 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e70 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8001067b l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +800106df l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ec8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010743 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +800107a7 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8001080b l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8001086f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +800108d3 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +80010937 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +80010994 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ffc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +800109f1 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002028 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010a4e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002054 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +80010ab2 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002080 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +80010b16 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +80010b7a l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +80010bde l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002104 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010c42 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002130 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010ca6 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000215c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010d0a l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002188 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010d6e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010dd2 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010e2f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +8000220c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010e8c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002238 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010ee9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002264 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010f4d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002290 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010fb1 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80011015 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80011079 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002314 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +800110dd l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002340 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80011141 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000236c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +800111a5 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002398 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +80011209 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8001126d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +800112ca l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000241c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +80011327 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002448 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +80011384 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002474 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +800113e8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8001144c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +800114b0 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +80011514 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002524 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +80011578 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002550 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +800115dc l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000257c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +80011640 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025a8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +800116a4 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011708 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002600 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +80011765 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000262c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +800117c2 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002658 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8001181f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002684 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +80011883 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +800118e7 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8001194b l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002708 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +800119af l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002734 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011a13 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002760 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +80011a77 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000278c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +80011adb l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011b3f l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +80011ba3 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002810 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011c00 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000283c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +80011c5d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002868 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011cba l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002894 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011d1e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011d82 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011de6 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002918 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011e4a l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002944 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011eae l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002970 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011f12 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +8000299c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011f76 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011fda l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8001203e l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8001209b l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +800120f8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80012155 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +800121b9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8001221d l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002afc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +80012281 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b28 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +800122e5 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b54 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012349 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b80 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800123ad l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012411 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bd8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +80012475 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c04 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800124d9 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c30 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +80012536 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c5c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012593 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c88 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800125f0 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012654 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800126b8 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d0c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8001271c l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d38 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +80012780 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d64 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800127e4 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d90 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012848 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dbc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +800128ac l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002de8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +80012910 l .data 00000000 Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e14 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b0 +80012974 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b0_str +80002e40 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b1 +800129b1 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b2 +800129ee l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b2_str +80002e9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b3 +80012a2b l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b3_str +80002ec8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b4 +80012a68 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b4_str +80002ef4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b5 +80012aa5 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b5_str +80002f20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b6 +80012ae2 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b6_str +80002f54 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b7 +80012b1f l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b7_str +80002f80 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b8 +80012b5c l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b8_str +80002fac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b9 +80012b99 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b9_str +80002fd8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b10 +80012bd6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b10_str +80003004 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b11 +80012c14 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b11_str +80003030 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b12 +80012c52 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b12_str +8000305c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b13 +80012c90 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b13_str +80003088 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b14 +80012cce l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b14_str +800030b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b15 +80012d0c l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b15_str +800030e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b16 +80012d4a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b16_str +8000310c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b17 +80012d88 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b17_str +80003138 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b18 +80012dc6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b18_str +80003164 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b19 +80012e04 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b19_str +80003190 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b20 +80012e42 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b20_str +800031bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b21 +80012e80 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b21_str +800031ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b22 +80012ebe l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b22_str +80003218 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b23 +80012efc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b23_str +80003244 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b24 +80012f3a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b24_str +80003270 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b25 +80012f78 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b25_str +8000329c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b26 +80012fb6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b26_str +800032c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b27 +80012ff4 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b27_str +800032f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b28 +80013032 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b28_str +80003320 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b29 +80013070 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b29_str +80003350 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b30 +800130ae l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b30_str +8000337c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b31 +800130ec l .data 00000000 Zknd_aes32dsmi_cg_cmp_rs1_rs2_b31_str +800033a8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b0 +8001312a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b0_str +800033d4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b1 +80013166 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b1_str +80003400 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b2 +800131a2 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b2_str +8000342c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b3 +800131de l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b3_str +80003460 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b4 +8001321a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b4_str +8000348c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b5 +80013256 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b5_str +800034b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b6 +80013292 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b6_str +800034e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b7 +800132ce l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b7_str +80003510 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b8 +8001330a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b8_str +80003540 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b9 +80013346 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b9_str +8000356c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b10 +80013382 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b10_str +80003598 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b11 +800133bf l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b11_str +800035c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b12 +800133fc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b12_str +800035f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b13 +80013439 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b13_str +80003624 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b14 +80013476 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b14_str +80003650 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b15 +800134b3 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b15_str +80003680 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b16 +800134f0 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b16_str +800036ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b17 +8001352d l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b17_str +800036d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b18 +8001356a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b18_str +80003704 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b19 +800135a7 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b19_str +80003730 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b20 +800135e4 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b20_str +8000375c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b21 +80013621 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b21_str +80003788 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b22 +8001365e l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b22_str +800037b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b23 +8001369b l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b23_str +800037e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b24 +800136d8 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b24_str +8000380c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b25 +80013715 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b25_str +80003838 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b26 +80013752 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b26_str +80003864 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b27 +8001378f l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b27_str +80003890 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b28 +800137cc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b28_str +800038bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b29 +80013809 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b29_str +800038e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b30 +80013846 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b30_str +80003914 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b31 +80013883 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_b31_str +80003940 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b0 +800138c0 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b0_str +8000396c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b1 +800138fc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b1_str +80003998 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b2 +80013938 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b2_str +800039c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b3 +80013974 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b3_str +800039fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b4 +800139b0 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b4_str +80003a28 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b5 +800139ec l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b5_str +80003a54 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b6 +80013a28 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b6_str +80003a88 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b7 +80013a64 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b7_str +80003ab4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b8 +80013aa0 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b8_str +80003ae0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b9 +80013adc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b9_str +80003b0c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b10 +80013b18 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b10_str +80003b38 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b11 +80013b55 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b11_str +80003b68 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b12 +80013b92 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b12_str +80003b94 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b13 +80013bcf l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b13_str +80003bc0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b14 +80013c0c l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b14_str +80003bec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b15 +80013c49 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b15_str +80003c18 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b16 +80013c86 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b16_str +80003c44 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b17 +80013cc3 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b17_str +80003c70 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b18 +80013d00 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b18_str +80003c9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b19 +80013d3d l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b19_str +80003cc8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b20 +80013d7a l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b20_str +80003cf4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b21 +80013db7 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b21_str +80003d20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b22 +80013df4 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b22_str +80003d4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b23 +80013e31 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b23_str +80003d78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b24 +80013e6e l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b24_str +80003da8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b25 +80013eab l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b25_str +80003dd8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b26 +80013ee8 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b26_str +80003e04 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b27 +80013f25 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b27_str +80003e30 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b28 +80013f62 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b28_str +80003e5c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b29 +80013f9f l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b29_str +80003e8c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b30 +80013fdc l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b30_str +80003eb8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b31 +80014019 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs2_b31_str +80003ee4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b0 +80014056 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b0_str +80003f10 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b1 +80014096 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b1_str +80003f3c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b2 +800140d6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b2_str +80003f68 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b3 +80014116 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b3_str +80003f9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b4 +80014156 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b4_str +80003fc8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b5 +80014196 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b5_str +80003ff4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b6 +800141d6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b6_str +80004020 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b7 +80014216 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b7_str +8000404c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b8 +80014256 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b8_str +80004078 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b9 +80014296 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b9_str +800040a4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b10 +800142d6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b10_str +800040d0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b11 +80014317 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b11_str +800040fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b12 +80014358 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b12_str +80004130 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b13 +80014399 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b13_str +8000415c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b14 +800143da l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b14_str +80004188 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b15 +8001441b l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b15_str +800041b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b16 +8001445c l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b16_str +800041e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b17 +8001449d l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b17_str +8000420c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b18 +800144de l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b18_str +80004238 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b19 +8001451f l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b19_str +80004264 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b20 +80014560 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b20_str +80004290 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b21 +800145a1 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b21_str +800042bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b22 +800145e2 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b22_str +800042ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b23 +80014623 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b23_str +80004318 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b24 +80014664 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b24_str +80004348 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b25 +800146a5 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b25_str +80004374 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b26 +800146e6 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b26_str +800043a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b27 +80014727 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b27_str +800043cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b28 +80014768 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b28_str +800043fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b29 +800147a9 l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b29_str +80004428 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b30 +800147ea l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b30_str +80004454 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b31 +8001482b l .data 00000000 Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b31_str +80004480 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_bs_b0 +8001486c l .data 00000000 Zknd_aes32dsmi_cg_cp_bs_b0_str +800044ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_bs_b1 +800148a3 l .data 00000000 Zknd_aes32dsmi_cg_cp_bs_b1_str +800044d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_bs_b2 +800148da l .data 00000000 Zknd_aes32dsmi_cg_cp_bs_b2_str +80004504 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_bs_b3 +80014911 l .data 00000000 Zknd_aes32dsmi_cg_cp_bs_b3_str +80004530 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b0 +80014948 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b0_str +8000455c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b1 +80014981 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b1_str +80004588 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b2 +800149ba l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b2_str +800045b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b3 +800149f3 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b3_str +800045e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b4 +80014a2c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b4_str +8000460c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b5 +80014a65 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b5_str +80004638 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b6 +80014a9e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b6_str +80004664 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b7 +80014ad7 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b7_str +80004690 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b8 +80014b10 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b8_str +800046bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b9 +80014b49 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b9_str +800046e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b10 +80014b82 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b10_str +80004714 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b11 +80014bbc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b11_str +80004740 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b12 +80014bf6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b12_str +8000476c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b13 +80014c30 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b13_str +80004798 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b14 +80014c6a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b14_str +800047c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b15 +80014ca4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b15_str +800047f0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b16 +80014cde l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b16_str +8000481c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b17 +80014d18 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b17_str +80004848 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b18 +80014d52 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b18_str +80004874 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b19 +80014d8c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b19_str +800048a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b20 +80014dc6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b20_str +800048cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b21 +80014e00 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b21_str +800048f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b22 +80014e3a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b22_str +80004924 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b23 +80014e74 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b23_str +80004950 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b24 +80014eae l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b24_str +8000497c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b25 +80014ee8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b25_str +800049a8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b26 +80014f22 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b26_str +800049d4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b27 +80014f5c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b27_str +80004a00 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b28 +80014f96 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b28_str +80004a2c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b29 +80014fd0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b29_str +80004a58 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b30 +8001500a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b30_str +80004a84 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b31 +80015044 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b31_str +80004ab0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b32 +8001507e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b32_str +80004adc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b33 +800150b8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b33_str +80004b08 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b34 +800150f2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b34_str +80004b34 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b35 +8001512c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b35_str +80004b60 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b36 +80015166 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b36_str +80004b8c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b37 +800151a0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b37_str +80004bb8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b38 +800151da l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b38_str +80004be4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b39 +80015214 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b39_str +80004c10 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b40 +8001524e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b40_str +80004c3c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b41 +80015288 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b41_str +80004c68 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b42 +800152c2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b42_str +80004c94 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b43 +800152fc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b43_str +80004cc0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b44 +80015336 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b44_str +80004cec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b45 +80015370 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b45_str +80004d18 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b46 +800153aa l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b46_str +80004d44 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b47 +800153e4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b47_str +80004d70 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b48 +8001541e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b48_str +80004d9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b49 +80015458 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b49_str +80004dc8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b50 +80015492 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b50_str +80004df4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b51 +800154cc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b51_str +80004e20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b52 +80015506 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b52_str +80004e4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b53 +80015540 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b53_str +80004e78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b54 +8001557a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b54_str +80004ea4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b55 +800155b4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b55_str +80004ed0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b56 +800155ee l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b56_str +80004efc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b57 +80015628 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b57_str +80004f28 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b58 +80015662 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b58_str +80004f54 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b59 +8001569c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b59_str +80004f80 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b60 +800156d6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b60_str +80004fac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b61 +80015710 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b61_str +80004fd8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b62 +8001574a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b62_str +80005004 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b63 +80015784 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b63_str +80005030 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b64 +800157be l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b64_str +8000505c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b65 +800157f8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b65_str +80005088 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b66 +80015832 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b66_str +800050b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b67 +8001586c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b67_str +800050e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b68 +800158a6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b68_str +8000510c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b69 +800158e0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b69_str +80005138 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b70 +8001591a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b70_str +80005164 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b71 +80015954 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b71_str +80005190 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b72 +8001598e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b72_str +800051bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b73 +800159c8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b73_str +800051e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b74 +80015a02 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b74_str +80005214 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b75 +80015a3c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b75_str +80005240 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b76 +80015a76 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b76_str +8000526c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b77 +80015ab0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b77_str +80005298 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b78 +80015aea l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b78_str +800052c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b79 +80015b24 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b79_str +800052f0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b80 +80015b5e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b80_str +8000531c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b81 +80015b98 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b81_str +80005348 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b82 +80015bd2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b82_str +80005374 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b83 +80015c0c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b83_str +800053a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b84 +80015c46 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b84_str +800053cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b85 +80015c80 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b85_str +800053f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b86 +80015cba l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b86_str +80005424 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b87 +80015cf4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b87_str +80005450 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b88 +80015d2e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b88_str +8000547c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b89 +80015d68 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b89_str +800054a8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b90 +80015da2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b90_str +800054d4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b91 +80015ddc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b91_str +80005500 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b92 +80015e16 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b92_str +8000552c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b93 +80015e50 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b93_str +80005558 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b94 +80015e8a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b94_str +80005584 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b95 +80015ec4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b95_str +800055b0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b96 +80015efe l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b96_str +800055dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b97 +80015f38 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b97_str +80005608 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b98 +80015f72 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b98_str +80005634 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b99 +80015fac l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b99_str +80005660 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b100 +80015fe6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b100_str +8000568c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b101 +80016021 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b101_str +800056b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b102 +8001605c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b102_str +800056e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b103 +80016097 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b103_str +80005710 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b104 +800160d2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b104_str +8000573c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b105 +8001610d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b105_str +80005768 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b106 +80016148 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b106_str +80005794 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b107 +80016183 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b107_str +800057c0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b108 +800161be l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b108_str +800057ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b109 +800161f9 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b109_str +80005818 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b110 +80016234 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b110_str +80005844 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b111 +8001626f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b111_str +80005870 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b112 +800162aa l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b112_str +8000589c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b113 +800162e5 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b113_str +800058c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b114 +80016320 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b114_str +800058f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b115 +8001635b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b115_str +80005920 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b116 +80016396 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b116_str +8000594c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b117 +800163d1 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b117_str +80005978 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b118 +8001640c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b118_str +800059a4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b119 +80016447 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b119_str +800059d0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b120 +80016482 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b120_str +800059fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b121 +800164bd l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b121_str +80005a28 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b122 +800164f8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b122_str +80005a54 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b123 +80016533 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b123_str +80005a80 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b124 +8001656e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b124_str +80005aac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b125 +800165a9 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b125_str +80005ad8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b126 +800165e4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b126_str +80005b04 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b127 +8001661f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b127_str +80005b30 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b128 +8001665a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b128_str +80005b5c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b129 +80016695 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b129_str +80005b88 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b130 +800166d0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b130_str +80005bb4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b131 +8001670b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b131_str +80005be0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b132 +80016746 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b132_str +80005c0c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b133 +80016781 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b133_str +80005c38 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b134 +800167bc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b134_str +80005c64 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b135 +800167f7 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b135_str +80005c90 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b136 +80016832 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b136_str +80005cbc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b137 +8001686d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b137_str +80005ce8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b138 +800168a8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b138_str +80005d14 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b139 +800168e3 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b139_str +80005d40 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b140 +8001691e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b140_str +80005d6c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b141 +80016959 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b141_str +80005d98 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b142 +80016994 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b142_str +80005dc4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b143 +800169cf l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b143_str +80005df0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b144 +80016a0a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b144_str +80005e1c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b145 +80016a45 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b145_str +80005e48 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b146 +80016a80 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b146_str +80005e74 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b147 +80016abb l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b147_str +80005ea0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b148 +80016af6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b148_str +80005ecc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b149 +80016b31 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b149_str +80005ef8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b150 +80016b6c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b150_str +80005f24 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b151 +80016ba7 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b151_str +80005f50 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b152 +80016be2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b152_str +80005f7c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b153 +80016c1d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b153_str +80005fa8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b154 +80016c58 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b154_str +80005fd4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b155 +80016c93 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b155_str +80006000 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b156 +80016cce l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b156_str +8000602c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b157 +80016d09 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b157_str +80006058 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b158 +80016d44 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b158_str +80006084 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b159 +80016d7f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b159_str +800060b0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b160 +80016dba l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b160_str +800060dc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b161 +80016df5 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b161_str +80006108 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b162 +80016e30 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b162_str +80006134 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b163 +80016e6b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b163_str +80006160 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b164 +80016ea6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b164_str +8000618c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b165 +80016ee1 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b165_str +800061b8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b166 +80016f1c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b166_str +800061e4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b167 +80016f57 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b167_str +80006210 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b168 +80016f92 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b168_str +8000623c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b169 +80016fcd l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b169_str +80006268 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b170 +80017008 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b170_str +80006294 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b171 +80017043 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b171_str +800062c0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b172 +8001707e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b172_str +800062ec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b173 +800170b9 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b173_str +80006318 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b174 +800170f4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b174_str +80006344 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b175 +8001712f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b175_str +80006370 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b176 +8001716a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b176_str +8000639c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b177 +800171a5 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b177_str +800063c8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b178 +800171e0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b178_str +800063f4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b179 +8001721b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b179_str +80006420 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b180 +80017256 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b180_str +8000644c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b181 +80017291 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b181_str +80006478 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b182 +800172cc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b182_str +800064a4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b183 +80017307 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b183_str +800064d0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b184 +80017342 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b184_str +800064fc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b185 +8001737d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b185_str +80006528 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b186 +800173b8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b186_str +80006554 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b187 +800173f3 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b187_str +80006580 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b188 +8001742e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b188_str +800065ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b189 +80017469 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b189_str +800065d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b190 +800174a4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b190_str +80006604 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b191 +800174df l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b191_str +80006630 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b192 +8001751a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b192_str +8000665c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b193 +80017555 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b193_str +80006688 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b194 +80017590 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b194_str +800066b4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b195 +800175cb l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b195_str +800066e0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b196 +80017606 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b196_str +8000670c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b197 +80017641 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b197_str +80006738 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b198 +8001767c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b198_str +80006764 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b199 +800176b7 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b199_str +80006790 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b200 +800176f2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b200_str +800067bc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b201 +8001772d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b201_str +800067e8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b202 +80017768 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b202_str +80006814 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b203 +800177a3 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b203_str +80006840 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b204 +800177de l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b204_str +8000686c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b205 +80017819 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b205_str +80006898 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b206 +80017854 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b206_str +800068c4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b207 +8001788f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b207_str +800068f0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b208 +800178ca l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b208_str +8000691c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b209 +80017905 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b209_str +80006948 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b210 +80017940 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b210_str +80006974 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b211 +8001797b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b211_str +800069a0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b212 +800179b6 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b212_str +800069cc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b213 +800179f1 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b213_str +800069f8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b214 +80017a2c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b214_str +80006a24 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b215 +80017a67 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b215_str +80006a50 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b216 +80017aa2 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b216_str +80006a7c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b217 +80017add l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b217_str +80006aa8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b218 +80017b18 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b218_str +80006ad4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b219 +80017b53 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b219_str +80006b00 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b220 +80017b8e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b220_str +80006b2c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b221 +80017bc9 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b221_str +80006b58 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b222 +80017c04 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b222_str +80006b84 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b223 +80017c3f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b223_str +80006bb0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b224 +80017c7a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b224_str +80006bdc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b225 +80017cb5 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b225_str +80006c08 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b226 +80017cf0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b226_str +80006c34 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b227 +80017d2b l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b227_str +80006c60 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b228 +80017d66 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b228_str +80006c8c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b229 +80017da1 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b229_str +80006cb8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b230 +80017ddc l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b230_str +80006ce4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b231 +80017e17 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b231_str +80006d10 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b232 +80017e52 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b232_str +80006d3c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b233 +80017e8d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b233_str +80006d68 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b234 +80017ec8 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b234_str +80006d94 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b235 +80017f03 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b235_str +80006dc0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b236 +80017f3e l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b236_str +80006dec l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b237 +80017f79 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b237_str +80006e18 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b238 +80017fb4 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b238_str +80006e44 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b239 +80017fef l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b239_str +80006e70 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b240 +8001802a l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b240_str +80006e9c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b241 +80018065 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b241_str +80006ec8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b242 +800180a0 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b242_str +80006ef4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b243 +800180db l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b243_str +80006f20 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b244 +80018116 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b244_str +80006f4c l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b245 +80018151 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b245_str +80006f78 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b246 +8001818c l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b246_str +80006fa4 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b247 +800181c7 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b247_str +80006fd0 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b248 +80018202 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b248_str +80006ffc l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b249 +8001823d l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b249_str +80007028 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b250 +80018278 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b250_str +80007054 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b251 +800182b3 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b251_str +80007080 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b252 +800182ee l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b252_str +800070ac l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b253 +80018329 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b253_str +800070d8 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b254 +80018364 l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b254_str +80007104 l .text.rvtest 00000000 Zknd_aes32dsmi_cg_cp_sbox_b255 +8001839f l .data 00000000 Zknd_aes32dsmi_cg_cp_sbox_b255_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80007134 l .text.rvtest 00000000 exit_Mcleanup +80007138 l .text.rvtest 00000000 resto_Medeleg +80007140 l .text.rvtest 00000000 resto_Msatp +80007144 l .text.rvtest 00000000 resto_Mscratch +8000714c l .text.rvtest 00000000 resto_Mxtvec +80007160 l .text.rvtest 00000000 resto_Mtramp +80007164 l .text.rvtest 00000000 resto_Mloop +8000717c l .text.rvtest 00000000 check_trap_sig_overflow +80007410 l .text.rvtest 00000000 trap_sig_overflow +800072b0 l .text.rvtest 00000000 check_trap_sig_offset +80018a63 l .data 00000000 failstr +8002a564 l .text.rvmodel 00000000 rvmodel_io_write_str +80018aa1 l .data 00000000 begin_debugstr +80018b01 l .data 00000000 trap_sig_overflowstr +800196ac l .data 00000000 endstr +8002a5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +8000c328 l .data 00000000 Mtrap_sig +8001ab98 l .data 00000000 trap_sigptr +8001ab90 l .data 00000000 final_trap_sig_offset +80007374 l .text.rvtest 00000000 check_abort_test +80008228 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80018c55 l .data 00000000 trap_sig_offset_mismatch +80007390 l .text.rvtest 00000000 exit_cleanup +80007444 l .text.rvtest 00000000 abort_test +80018ac3 l .data 00000000 abortstr +80018a24 l .data 00000000 successstr +8002a5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80007500 l .text.rvtest 00000000 trap_Mhandler +80007620 l .text.rvtest 00000000 rvtest_Mendtest +80007644 l .text.rvtest 00000000 common_Mhandler +800076b0 l .text.rvtest 00000000 spcl_M2mmode_test +800076bc l .text.rvtest 00000000 spcl_Mchk4alt +800076cc l .text.rvtest 00000000 spcl_Mchk4ecall +800076c4 l .text.rvtest 00000000 spcl_Mparam_chk +80008150 l .text.rvtest 00000000 Mrtn2mmode +80007c54 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800076d8 l .text.rvtest 00000000 Mgoto_mchk +800076dc l .text.rvtest 00000000 tsbi_Mdispatch +80007704 l .text.rvtest 00000000 tsbi_Mgoto_mode +800076f4 l .text.rvtest 00000000 tsbi_Mecall_test +80007770 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007ec0 l .text.rvtest 00000000 resto_Mrtn +80007730 l .text.rvtest 00000000 tsbi_Mgoto_m +80007740 l .text.rvtest 00000000 tsbi_Mgoto_s +8000775c l .text.rvtest 00000000 tsbi_Mgoto_u +8000776c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800078f0 l .text.rvtest 00000000 tsbi_instr_table +800077a0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800077b4 l .text.rvtest 00000000 found_instr +800077f8 l .text.rvtest 00000000 tsbi_instr_not_found +800077e4 l .text.rvtest 00000000 tsbi_instr_rtn +8001a0e3 l .data 00000000 tsbi_instr_not_found_str +80009cd8 l .text.rvtest 00000000 failedtest_hex_to_str +80018548 l .data 00000000 ascii_buffer +80018b6a l .data 00000000 newlinestr +80007c70 l .text.rvtest 00000000 Mxcpt_sig_sv +80007c5c l .text.rvtest 00000000 Mint_sig_sv +80007c70 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80018528 l .data 00000000 saved_xepc +800295fc l .data 00000000 sig_end_canary +80007d08 l .text.rvtest 00000000 sv_Mvect +80018c6c l .data 00000000 sv_Mvect_str +80007dac l .text.rvtest 00000000 sv_Mcause +80018d6e l .data 00000000 sv_Mcause_str +80007ee0 l .text.rvtest 00000000 common_Mint_handler +80007dd4 l .text.rvtest 00000000 common_Mexcpt_handler +80007de0 l .text.rvtest 00000000 vmem_adj_Mepc +80007e34 l .text.rvtest 00000000 sv_Mepc +80007e08 l .text.rvtest 00000000 code_adj_Mepc +80007e30 l .text.rvtest 00000000 adj_Mepc +80007e1c l .text.rvtest 00000000 data_adj_Mepc +80018e69 l .data 00000000 sv_Mepc_str +80007e54 l .text.rvtest 00000000 skpsv_Mepc +80007e7c l .text.rvtest 00000000 adj_Mepc_rtn +80007e88 l .text.rvtest 00000000 skp_adj_Mepc +80007e8c l .text.rvtest 00000000 sv_Mtval +80018f5c l .data 00000000 sv_Mtval_str +80007eac l .text.rvtest 00000000 skp_Mtval +80007eb8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80007f18 l .text.rvtest 00000000 spcl_Mhandler +80007ef4 l .text.rvtest 00000000 sv_Mip +800190cf l .data 00000000 sv_Mip_str +80007f34 l .text.rvtest 00000000 spcl_Mdispatch_handling +80007f4c l .text.rvtest 00000000 spcl_Mdispatch +80007f50 l .text.rvtest 00000000 clrint_Mtbl +8002a000 l .text.rvmodel 00000000 Mclr_Msw_int +8002a014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8002a030 l .text.rvmodel 00000000 Mclr_Mext_int +80008050 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081a0 l .text.rvtest 00000000 rtn_fm_mmode +8000818c l .text.rvtest 00000000 from_hs_u +8000817c l .text.rvtest 00000000 from_vs +800183e0 l .data 00000000 begin_failure_scratch +8000825c l .text.rvtest 00000000 failedtest_saveregs +800082cc l .text.rvtest 00000000 failedtest_saveresults +800183e0 l .data 00000000 failure_type +8000846c l .text.rvtest 00000000 failedtest_saveresults_trap +800082dc l .text.rvtest 00000000 failedtest_saveresults_int +800083f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000842c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80008760 l .text.rvtest 00000000 failedtest_saveresults_common +80018508 l .data 00000000 failure_diag_type +80018518 l .data 00000000 trap_diag_fail_str_ptr +80008720 l .text.rvtest 00000000 trap_diag_offset_mismatch +80018510 l .data 00000000 trap_diag_subtype +80008734 l .text.rvtest 00000000 trap_diag_field_identified +80019053 l .data 00000000 sv_Mtval2_str +80019091 l .data 00000000 sv_Mtinst_str +80018cac l .data 00000000 sv_Svect_str +80018dac l .data 00000000 sv_Scause_str +80018ea5 l .data 00000000 sv_Sepc_str +80018f99 l .data 00000000 sv_Stval_str +8001910a l .data 00000000 sv_Sip_str +80018cec l .data 00000000 sv_Hvect_str +80018dea l .data 00000000 sv_Hcause_str +80018ee1 l .data 00000000 sv_Hepc_str +80018fd6 l .data 00000000 sv_Htval_str +80019145 l .data 00000000 sv_Hip_str +80018d2d l .data 00000000 sv_Vvect_str +80018e29 l .data 00000000 sv_Vcause_str +80018f1e l .data 00000000 sv_Vepc_str +80019014 l .data 00000000 sv_Vtval_str +80019181 l .data 00000000 sv_Vip_str +800191be l .data 00000000 Mclr_Mext_int_str +8001920d l .data 00000000 Mclr_Sext_int_str +80019308 l .data 00000000 Sclr_Sext_int_str +80019404 l .data 00000000 Hclr_Sext_int_str +80008750 l .text.rvtest 00000000 trap_diag_generic_report +80018514 l .data 00000000 trap_diag_mode +80008790 l .text.rvtest 00000000 failedtest_report +80008790 l .text.rvtest 00000000 print_failstr +80008808 l .text.rvtest 00000000 print_testnamestr +80018b58 l .data 00000000 testnamestr +80008848 l .text.rvtest 00000000 print_failure_test_name_str +80018500 l .data 00000000 failure_string_ptr +80008858 l .text.rvtest 00000000 print_newline_str +80008dcc l .text.rvtest 00000000 failedtest_report_trap_detailed +80018b6c l .data 00000000 inststr +800184e0 l .data 00000000 failing_instruction +80018b80 l .data 00000000 addrstr +800184e8 l .data 00000000 failing_addr +800195b7 l .data 00000000 regstr +80008a38 l .text.rvtest 00000000 failedtest_report_not_intreg +800184e4 l .data 00000000 failing_reg +80009d54 l .text.rvtest 00000000 failedtest_dec_to_str +80008b4c l .text.rvtest 00000000 failedtest_report_print_regstr +80008a8c l .text.rvtest 00000000 failedtest_report_fpreg +80008ad8 l .text.rvtest 00000000 failedtest_report_vecreg +80008b14 l .text.rvtest 00000000 failedtest_report_vxsat +800196cd l .data 00000000 fflagsstr +80008b88 l .text.rvtest 00000000 failedtest_report_after_reg +800195b0 l .data 00000000 vxsatstr +800195c8 l .data 00000000 badvalstr +80008bec l .text.rvtest 00000000 failedtest_report_badval_not_fp +800184f0 l .data 00000000 failing_value +80008bfc l .text.rvtest 00000000 failedtest_report_badval_done +80008ccc l .text.rvtest 00000000 failedtest_report_diag +800195df l .data 00000000 expvalstr +80008c8c l .text.rvtest 00000000 failedtest_report_expval_not_fp +800184f8 l .data 00000000 expected_value +80008c9c l .text.rvtest 00000000 failedtest_report_expval_done +80009a84 l .text.rvtest 00000000 failedtest_report_end +80008d4c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80008cd4 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +800195f6 l .data 00000000 failure_diag_bad_instr_str +80019654 l .data 00000000 failure_diag_bad_ptr_str +80008e90 l .text.rvtest 00000000 trap_report_offset_mismatch +800196f9 l .data 00000000 trap_diag_header_str +80019725 l .data 00000000 trap_diag_origstr_label +80009910 l .text.rvtest 00000000 trap_report_generic +800091cc l .text.rvtest 00000000 trap_report_field_mismatch +80019735 l .data 00000000 trap_diag_expected_offset_str +80019760 l .data 00000000 trap_diag_actual_offset_str +800090ac l .text.rvtest 00000000 trap_report_missing_traps +80008f9c l .text.rvtest 00000000 trap_report_extra_traps +8001978f l .data 00000000 trap_diag_extra_traps_str +800197f7 l .data 00000000 trap_diag_diff_bytes_str +8001981e l .data 00000000 trap_diag_extra_next_step_str +800197bb l .data 00000000 trap_diag_missing_traps_str +80019906 l .data 00000000 trap_diag_missing_next_step_str +800199ed l .data 00000000 trap_diag_handler_mode_str +80009264 l .text.rvtest 00000000 trap_mode_m +800092a4 l .text.rvtest 00000000 trap_mode_s +800092e4 l .text.rvtest 00000000 trap_mode_h +80009324 l .text.rvtest 00000000 trap_mode_v +80019a29 l .data 00000000 trap_diag_mode_unknown_str +80009360 l .text.rvtest 00000000 trap_mode_print +80019a07 l .data 00000000 trap_diag_mode_m_str +80019a0f l .data 00000000 trap_diag_mode_s_str +80019a17 l .data 00000000 trap_diag_mode_hs_str +80019a20 l .data 00000000 trap_diag_mode_vs_str +80019a32 l .data 00000000 trap_diag_field_str +80009424 l .text.rvtest 00000000 trap_field_vect +80009464 l .text.rvtest 00000000 trap_field_cause +800094a4 l .text.rvtest 00000000 trap_field_epc +800094e4 l .text.rvtest 00000000 trap_field_tval +80009524 l .text.rvtest 00000000 trap_field_ip +80009564 l .text.rvtest 00000000 trap_field_tval2 +800095a4 l .text.rvtest 00000000 trap_field_tinst +800095e4 l .text.rvtest 00000000 trap_field_intid +80019b89 l .data 00000000 trap_diag_field_unknown_str +80009620 l .text.rvtest 00000000 trap_field_print +80019a4c l .data 00000000 trap_diag_field_vect_str +80019a7d l .data 00000000 trap_diag_field_cause_str +80019a9d l .data 00000000 trap_diag_field_epc_str +80019abb l .data 00000000 trap_diag_field_tval_str +80019ada l .data 00000000 trap_diag_field_ip_str +80019b02 l .data 00000000 trap_diag_field_tval2_str +80019b2e l .data 00000000 trap_diag_field_tinst_str +80019b5a l .data 00000000 trap_diag_field_intid_str +80019b98 l .data 00000000 trap_diag_expected_str +80019baf l .data 00000000 trap_diag_actual_str +800097bc l .text.rvtest 00000000 trap_field_not_cause +80019bc6 l .data 00000000 trap_diag_expected_cause_name_str +800099f4 l .text.rvtest 00000000 trap_cause_to_str +80019bdd l .data 00000000 trap_diag_actual_cause_name_str +800097bc l .text.rvtest 00000000 trap_field_not_epc +80009ad0 l .text.rvtest 00000000 failedtest_print_csr_context +80019c53 l .data 00000000 trap_diag_hint_vect_str +80019d29 l .data 00000000 trap_diag_hint_cause_str +80019e1c l .data 00000000 trap_diag_hint_epc_str +80019f17 l .data 00000000 trap_diag_hint_tval_str +80019ffe l .data 00000000 trap_diag_hint_ip_str +80019c0b l .data 00000000 trap_diag_generic_str +80018bf4 l .data 00000000 xepcinstrstr +80009a18 l .text.rvtest 00000000 trap_cause_interrupt +800099f8 l .text.rvtest 00000000 trap_cause_exception +80009a44 l .text.rvtest 00000000 trap_cause_unknown +80018570 l .data 00000000 trap_excpt_name_tbl +800185d0 l .data 00000000 trap_int_name_tbl +80018a0e l .data 00000000 trap_cause_unknown_str +80009ac8 l .text.rvtest 00000000 failedtest_terminate +80018520 l .data 00000000 csr_context_ret_addr +80018c15 l .data 00000000 mepcstr +80018c25 l .data 00000000 mcausestr +80018530 l .data 00000000 saved_xcause +80018c35 l .data 00000000 mtvalstr +80018538 l .data 00000000 saved_xtval +80018c45 l .data 00000000 mstatusstr +80018540 l .data 00000000 saved_xstatus +80009d18 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80009d34 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80009d38 l .text.rvtest 00000000 failedtest_hex_to_str_write +8002a0e4 l .text.rvmodel 00000000 uart_init +8002a0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8002a120 l .text.rvmodel 00000000 init_Mscratch +8002a128 l .text.rvmodel 00000000 init_Mtimecmp +8002a13c l .text.rvmodel 00000000 init_Medeleg +8002a144 l .text.rvmodel 00000000 init_Msatp +8002a144 l .text.rvmodel 00000000 init_Mtvec +8002a264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8002a224 l .text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +8001a130 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +800196d5 l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +80018570 l .data 00000000 end_failure_scratch +80018610 l .data 00000000 trap_excpt_name_0 +80018630 l .data 00000000 trap_excpt_name_1 +8001864a l .data 00000000 trap_excpt_name_2 +8001865f l .data 00000000 trap_excpt_name_3 +8001866b l .data 00000000 trap_excpt_name_4 +80018684 l .data 00000000 trap_excpt_name_5 +80018697 l .data 00000000 trap_excpt_name_6 +800186b5 l .data 00000000 trap_excpt_name_7 +800186cd l .data 00000000 trap_excpt_name_8 +800186eb l .data 00000000 trap_excpt_name_9 +80018709 l .data 00000000 trap_excpt_name_10 +80018728 l .data 00000000 trap_excpt_name_11 +80018746 l .data 00000000 trap_excpt_name_12 +8001875e l .data 00000000 trap_excpt_name_13 +8001876f l .data 00000000 trap_excpt_name_14 +8001877e l .data 00000000 trap_excpt_name_15 +80018794 l .data 00000000 trap_excpt_name_16 +800187a1 l .data 00000000 trap_excpt_name_17 +800187b0 l .data 00000000 trap_excpt_name_18 +800187c0 l .data 00000000 trap_excpt_name_19 +800187d0 l .data 00000000 trap_excpt_name_20 +800187ee l .data 00000000 trap_excpt_name_21 +80018805 l .data 00000000 trap_excpt_name_22 +8001881a l .data 00000000 trap_excpt_name_23 +80018836 l .data 00000000 trap_int_name_0 +8001884e l .data 00000000 trap_int_name_1 +8001886d l .data 00000000 trap_int_name_2 +80018894 l .data 00000000 trap_int_name_3 +800188b0 l .data 00000000 trap_int_name_4 +800188c8 l .data 00000000 trap_int_name_5 +800188e4 l .data 00000000 trap_int_name_6 +80018908 l .data 00000000 trap_int_name_7 +80018921 l .data 00000000 trap_int_name_8 +80018939 l .data 00000000 trap_int_name_9 +80018958 l .data 00000000 trap_int_name_10 +8001897f l .data 00000000 trap_int_name_11 +8001899b l .data 00000000 trap_int_name_12 +800189c0 l .data 00000000 trap_int_name_13 +800189dc l .data 00000000 trap_int_name_14 +800189f5 l .data 00000000 trap_int_name_15 +80018bc1 l .data 00000000 xepcstr +8001925f l .data 00000000 Mclr_Vext_int_str +800192b9 l .data 00000000 Sclr_Mext_int_str +8001935a l .data 00000000 Sclr_Vext_int_str +800193b4 l .data 00000000 Hclr_Mext_int_str +80019457 l .data 00000000 Hclr_Vext_int_str +800194b2 l .data 00000000 Vclr_Mext_int_str +80019502 l .data 00000000 Vclr_Sext_int_str +80019555 l .data 00000000 Vclr_Vext_int_str +80019bf4 l .data 00000000 trap_diag_curr_xepc_str +80029600 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80029600 g .data 00000000 rvtest_sig_end +80007658 g .text.rvtest 00000000 common_Mentry +8000717c g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +8001a130 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +80007124 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +8001a130 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +8001a127 g .data 00000000 rvtest_data_end +80007124 g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029700 g .tohost 00000000 fromhost +80029600 g .tohost 00000000 tohost +800073d0 g .text.rvtest 00000000 rvtest_fail_summary +80007480 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x4f5e491a +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x847de8b3 +80000048: 0001ae03 lw x28,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknd_aes32dsmi_cg_cp_rs1_b0: + aes32dsmi x21, x0, x28, 3 # perform operation +80000050: efc00ab3 aes32dsmi x21,x0,x28,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zknd_aes32dsmi_cg_cp_rs1_b0, Zknd_aes32dsmi_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01520863 beq x4,x21,80000068 +8000005c: 164082ef jal x5,800081c0 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x241736c2 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x26bc5cb4 +80000074: 0001ad83 lw x27,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknd_aes32dsmi_cg_cp_rs1_b1: + aes32dsmi x11, x1, x27, 1 # perform operation +8000007c: 6fb085b3 aes32dsmi x11,x1,x27,0x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zknd_aes32dsmi_cg_cp_rs1_b1, Zknd_aes32dsmi_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00b20863 beq x4,x11,80000094 +80000088: 138082ef jal x5,800081c0 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d846 .word 0x8000d846 +80000094: 00410113 addi x2,x2,4 + + mv x11, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010593 addi x11,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xcc237cd3 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xd0ab62a5 +800000a4: 0001a403 lw x8,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknd_aes32dsmi_cg_cp_rs1_b2: + aes32dsmi x25, x2, x8, 2 # perform operation +800000ac: ae810cb3 aes32dsmi x25,x2,x8,0x2 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zknd_aes32dsmi_cg_cp_rs1_b2, Zknd_aes32dsmi_cg_cp_rs1_b2_str) +800000b0: 0005a203 lw x4,0(x11) +800000b4: 01920863 beq x4,x25,800000c4 +800000b8: 108082ef jal x5,800081c0 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d87c .word 0x8000d87c +800000c4: 00458593 addi x11,x11,4 + + mv x15, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018793 addi x15,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x016cb254 +800000cc: 0007a183 lw x3,0(x15) +800000d0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xa2a907c1 +800000d4: 0007a103 lw x2,0(x15) +800000d8: 00478793 addi x15,x15,4 + +800000dc : +Zknd_aes32dsmi_cg_cp_rs1_b3: + aes32dsmi x22, x3, x2, 1 # perform operation +800000dc: 6e218b33 aes32dsmi x22,x3,x2,0x1 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zknd_aes32dsmi_cg_cp_rs1_b3, Zknd_aes32dsmi_cg_cp_rs1_b3_str) +800000e0: 0005a203 lw x4,0(x11) +800000e4: 01620863 beq x4,x22,800000f4 +800000e8: 0d8082ef jal x5,800081c0 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8b2 .word 0x8000d8b2 +800000f4: 00458593 addi x11,x11,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x589245a6 +80000100: 0007a203 lw x4,0(x15) +80000104: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xdc2659e0 +80000108: 0007ac83 lw x25,0(x15) +8000010c: 00478793 addi x15,x15,4 + +80000110 : +Zknd_aes32dsmi_cg_cp_rs1_b4: + aes32dsmi x2, x4, x25, 0 # perform operation +80000110: 2f920133 aes32dsmi x2,x4,x25,0x0 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zknd_aes32dsmi_cg_cp_rs1_b4, Zknd_aes32dsmi_cg_cp_rs1_b4_str) +80000114: 0005a383 lw x7,0(x11) +80000118: 00238863 beq x7,x2,80000128 +8000011c: 0bc0846f jal x8,800081d8 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8e8 .word 0x8000d8e8 +80000128: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xcfd84474 +8000012c: 0007a283 lw x5,0(x15) +80000130: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xdc6b00b6 +80000134: 0007a883 lw x17,0(x15) +80000138: 00478793 addi x15,x15,4 + +8000013c : +Zknd_aes32dsmi_cg_cp_rs1_b5: + aes32dsmi x0, x5, x17, 0 # perform operation +8000013c: 2f128033 aes32dsmi x0,x5,x17,0x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zknd_aes32dsmi_cg_cp_rs1_b5, Zknd_aes32dsmi_cg_cp_rs1_b5_str) +80000140: 0005a383 lw x7,0(x11) +80000144: 00038863 beq x7,x0,80000154 +80000148: 0900846f jal x8,800081d8 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d91e .word 0x8000d91e +80000154: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xe893dae3 +80000158: 0007a303 lw x6,0(x15) +8000015c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xbe7cb650 +80000160: 0007a203 lw x4,0(x15) +80000164: 00478793 addi x15,x15,4 + +80000168 : +Zknd_aes32dsmi_cg_cp_rs1_b6: + aes32dsmi x28, x6, x4, 0 # perform operation +80000168: 2e430e33 aes32dsmi x28,x6,x4,0x0 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zknd_aes32dsmi_cg_cp_rs1_b6, Zknd_aes32dsmi_cg_cp_rs1_b6_str) +8000016c: 0005a383 lw x7,0(x11) +80000170: 01c38863 beq x7,x28,80000180 +80000174: 0640846f jal x8,800081d8 +80000178: 80000168 .word 0x80000168 +8000017c: 8000d954 .word 0x8000d954 +80000180: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xd74a3c5e +8000018c: 0007a383 lw x7,0(x15) +80000190: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x454af136 +80000194: 0007a803 lw x16,0(x15) +80000198: 00478793 addi x15,x15,4 + +8000019c : +Zknd_aes32dsmi_cg_cp_rs1_b7: + aes32dsmi x19, x7, x16, 1 # perform operation +8000019c: 6f0389b3 aes32dsmi x19,x7,x16,0x1 + # Check if x19 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x19, Zknd_aes32dsmi_cg_cp_rs1_b7, Zknd_aes32dsmi_cg_cp_rs1_b7_str) +800001a0: 0005a683 lw x13,0(x11) +800001a4: 01368863 beq x13,x19,800001b4 +800001a8: 0580876f jal x14,80008200 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000d98a .word 0x8000d98a +800001b4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x47ec5a6a +800001b8: 0007a403 lw x8,0(x15) +800001bc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xfc45f009 +800001c0: 0007a283 lw x5,0(x15) +800001c4: 00478793 addi x15,x15,4 + +800001c8 : +Zknd_aes32dsmi_cg_cp_rs1_b8: + aes32dsmi x4, x8, x5, 1 # perform operation +800001c8: 6e540233 aes32dsmi x4,x8,x5,0x1 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zknd_aes32dsmi_cg_cp_rs1_b8, Zknd_aes32dsmi_cg_cp_rs1_b8_str) +800001cc: 0005a683 lw x13,0(x11) +800001d0: 00468863 beq x13,x4,800001e0 +800001d4: 02c0876f jal x14,80008200 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 8000d9c0 .word 0x8000d9c0 +800001e0: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x9a8f476f +800001e4: 0007a483 lw x9,0(x15) +800001e8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x76bb3bef +800001ec: 0007a883 lw x17,0(x15) +800001f0: 00478793 addi x15,x15,4 + +800001f4 : +Zknd_aes32dsmi_cg_cp_rs1_b9: + aes32dsmi x28, x9, x17, 2 # perform operation +800001f4: af148e33 aes32dsmi x28,x9,x17,0x2 + # Check if x28 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x28, Zknd_aes32dsmi_cg_cp_rs1_b9, Zknd_aes32dsmi_cg_cp_rs1_b9_str) +800001f8: 0005a683 lw x13,0(x11) +800001fc: 01c68863 beq x13,x28,8000020c +80000200: 0000876f jal x14,80008200 +80000204: 800001f4 .word 0x800001f4 +80000208: 8000d9f6 .word 0x8000d9f6 +8000020c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x22427d9e +80000210: 0007a503 lw x10,0(x15) +80000214: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x814b9285 +80000218: 0007a483 lw x9,0(x15) +8000021c: 00478793 addi x15,x15,4 + +80000220 : +Zknd_aes32dsmi_cg_cp_rs1_b10: + aes32dsmi x18, x10, x9, 2 # perform operation +80000220: ae950933 aes32dsmi x18,x10,x9,0x2 + # Check if x18 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x18, Zknd_aes32dsmi_cg_cp_rs1_b10, Zknd_aes32dsmi_cg_cp_rs1_b10_str) +80000224: 0005a683 lw x13,0(x11) +80000228: 01268863 beq x13,x18,80000238 +8000022c: 7d50776f jal x14,80008200 +80000230: 80000220 .word 0x80000220 +80000234: 8000da2d .word 0x8000da2d +80000238: 00458593 addi x11,x11,4 + + mv x26, x11 # switch signature pointer register to avoid conflict with test +8000023c: 00058d13 addi x26,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x93a9cf36 +80000240: 0007a583 lw x11,0(x15) +80000244: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xef906d23 +80000248: 0007ad83 lw x27,0(x15) +8000024c: 00478793 addi x15,x15,4 + +80000250 : +Zknd_aes32dsmi_cg_cp_rs1_b11: + aes32dsmi x8, x11, x27, 2 # perform operation +80000250: afb58433 aes32dsmi x8,x11,x27,0x2 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zknd_aes32dsmi_cg_cp_rs1_b11, Zknd_aes32dsmi_cg_cp_rs1_b11_str) +80000254: 000d2683 lw x13,0(x26) +80000258: 00868863 beq x13,x8,80000268 +8000025c: 7a50776f jal x14,80008200 +80000260: 80000250 .word 0x80000250 +80000264: 8000da65 .word 0x8000da65 +80000268: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xca28aaec +8000026c: 0007a603 lw x12,0(x15) +80000270: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x7311f192 +80000274: 0007ab83 lw x23,0(x15) +80000278: 00478793 addi x15,x15,4 + +8000027c : +Zknd_aes32dsmi_cg_cp_rs1_b12: + aes32dsmi x25, x12, x23, 2 # perform operation +8000027c: af760cb3 aes32dsmi x25,x12,x23,0x2 + # Check if x25 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x25, Zknd_aes32dsmi_cg_cp_rs1_b12, Zknd_aes32dsmi_cg_cp_rs1_b12_str) +80000280: 000d2683 lw x13,0(x26) +80000284: 01968863 beq x13,x25,80000294 +80000288: 7790776f jal x14,80008200 +8000028c: 8000027c .word 0x8000027c +80000290: 8000da9d .word 0x8000da9d +80000294: 004d0d13 addi x26,x26,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000298: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000029c: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xdaf4b33b +800002a0: 0007a683 lw x13,0(x15) +800002a4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x2133ee4e +800002a8: 0007af83 lw x31,0(x15) +800002ac: 00478793 addi x15,x15,4 + +800002b0 : +Zknd_aes32dsmi_cg_cp_rs1_b13: + aes32dsmi x20, x13, x31, 2 # perform operation +800002b0: aff68a33 aes32dsmi x20,x13,x31,0x2 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zknd_aes32dsmi_cg_cp_rs1_b13, Zknd_aes32dsmi_cg_cp_rs1_b13_str) +800002b4: 000d2203 lw x4,0(x26) +800002b8: 01420863 beq x4,x20,800002c8 +800002bc: 705072ef jal x5,800081c0 +800002c0: 800002b0 .word 0x800002b0 +800002c4: 8000dad5 .word 0x8000dad5 +800002c8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xaf402738 +800002cc: 0007a703 lw x14,0(x15) +800002d0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xe8c4eeba +800002d4: 0007aa03 lw x20,0(x15) +800002d8: 00478793 addi x15,x15,4 + +800002dc : +Zknd_aes32dsmi_cg_cp_rs1_b14: + aes32dsmi x0, x14, x20, 0 # perform operation +800002dc: 2f470033 aes32dsmi x0,x14,x20,0x0 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknd_aes32dsmi_cg_cp_rs1_b14, Zknd_aes32dsmi_cg_cp_rs1_b14_str) +800002e0: 000d2203 lw x4,0(x26) +800002e4: 00020863 beq x4,x0,800002f4 +800002e8: 6d9072ef jal x5,800081c0 +800002ec: 800002dc .word 0x800002dc +800002f0: 8000db0d .word 0x8000db0d +800002f4: 004d0d13 addi x26,x26,4 + + mv x29, x15 # switch data pointer register to avoid conflict with test +800002f8: 00078e93 addi x29,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0xed822998 +800002fc: 000ea783 lw x15,0(x29) +80000300: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0xe0a7e3f2 +80000304: 000eac03 lw x24,0(x29) +80000308: 004e8e93 addi x29,x29,4 + +8000030c : +Zknd_aes32dsmi_cg_cp_rs1_b15: + aes32dsmi x23, x15, x24, 0 # perform operation +8000030c: 2f878bb3 aes32dsmi x23,x15,x24,0x0 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zknd_aes32dsmi_cg_cp_rs1_b15, Zknd_aes32dsmi_cg_cp_rs1_b15_str) +80000310: 000d2203 lw x4,0(x26) +80000314: 01720863 beq x4,x23,80000324 +80000318: 6a9072ef jal x5,800081c0 +8000031c: 8000030c .word 0x8000030c +80000320: 8000db45 .word 0x8000db45 +80000324: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x89335954 +80000328: 000ea803 lw x16,0(x29) +8000032c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x0d1078ec +80000330: 000ea983 lw x19,0(x29) +80000334: 004e8e93 addi x29,x29,4 + +80000338 : +Zknd_aes32dsmi_cg_cp_rs1_b16: + aes32dsmi x10, x16, x19, 3 # perform operation +80000338: ef380533 aes32dsmi x10,x16,x19,0x3 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zknd_aes32dsmi_cg_cp_rs1_b16, Zknd_aes32dsmi_cg_cp_rs1_b16_str) +8000033c: 000d2203 lw x4,0(x26) +80000340: 00a20863 beq x4,x10,80000350 +80000344: 67d072ef jal x5,800081c0 +80000348: 80000338 .word 0x80000338 +8000034c: 8000db7d .word 0x8000db7d +80000350: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x32f3978d +80000354: 000ea883 lw x17,0(x29) +80000358: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0xefeee3a2 +8000035c: 000ea983 lw x19,0(x29) +80000360: 004e8e93 addi x29,x29,4 + +80000364 : +Zknd_aes32dsmi_cg_cp_rs1_b17: + aes32dsmi x6, x17, x19, 2 # perform operation +80000364: af388333 aes32dsmi x6,x17,x19,0x2 + # Check if x6 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x6, Zknd_aes32dsmi_cg_cp_rs1_b17, Zknd_aes32dsmi_cg_cp_rs1_b17_str) +80000368: 000d2203 lw x4,0(x26) +8000036c: 00620863 beq x4,x6,8000037c +80000370: 651072ef jal x5,800081c0 +80000374: 80000364 .word 0x80000364 +80000378: 8000dbb5 .word 0x8000dbb5 +8000037c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x583215a1 +80000380: 000ea903 lw x18,0(x29) +80000384: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0x1c36a993 +80000388: 000eab03 lw x22,0(x29) +8000038c: 004e8e93 addi x29,x29,4 + +80000390 : +Zknd_aes32dsmi_cg_cp_rs1_b18: + aes32dsmi x16, x18, x22, 2 # perform operation +80000390: af690833 aes32dsmi x16,x18,x22,0x2 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zknd_aes32dsmi_cg_cp_rs1_b18, Zknd_aes32dsmi_cg_cp_rs1_b18_str) +80000394: 000d2203 lw x4,0(x26) +80000398: 01020863 beq x4,x16,800003a8 +8000039c: 625072ef jal x5,800081c0 +800003a0: 80000390 .word 0x80000390 +800003a4: 8000dbed .word 0x8000dbed +800003a8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x6f8ff129 +800003ac: 000ea983 lw x19,0(x29) +800003b0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x32f3a593 +800003b4: 000ea903 lw x18,0(x29) +800003b8: 004e8e93 addi x29,x29,4 + +800003bc : +Zknd_aes32dsmi_cg_cp_rs1_b19: + aes32dsmi x20, x19, x18, 1 # perform operation +800003bc: 6f298a33 aes32dsmi x20,x19,x18,0x1 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zknd_aes32dsmi_cg_cp_rs1_b19, Zknd_aes32dsmi_cg_cp_rs1_b19_str) +800003c0: 000d2203 lw x4,0(x26) +800003c4: 01420863 beq x4,x20,800003d4 +800003c8: 5f9072ef jal x5,800081c0 +800003cc: 800003bc .word 0x800003bc +800003d0: 8000dc25 .word 0x8000dc25 +800003d4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xaa897169 +800003d8: 000eaa03 lw x20,0(x29) +800003dc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x01315ef2 +800003e0: 000ea803 lw x16,0(x29) +800003e4: 004e8e93 addi x29,x29,4 + +800003e8 : +Zknd_aes32dsmi_cg_cp_rs1_b20: + aes32dsmi x7, x20, x16, 0 # perform operation +800003e8: 2f0a03b3 aes32dsmi x7,x20,x16,0x0 + # Check if x7 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x7, Zknd_aes32dsmi_cg_cp_rs1_b20, Zknd_aes32dsmi_cg_cp_rs1_b20_str) +800003ec: 000d2203 lw x4,0(x26) +800003f0: 00720863 beq x4,x7,80000400 +800003f4: 5cd072ef jal x5,800081c0 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 8000dc5d .word 0x8000dc5d +80000400: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x5cd9f03b +80000404: 000eaa83 lw x21,0(x29) +80000408: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0x2bc2f4e7 +8000040c: 000ea383 lw x7,0(x29) +80000410: 004e8e93 addi x29,x29,4 + +80000414 : +Zknd_aes32dsmi_cg_cp_rs1_b21: + aes32dsmi x1, x21, x7, 1 # perform operation +80000414: 6e7a80b3 aes32dsmi x1,x21,x7,0x1 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zknd_aes32dsmi_cg_cp_rs1_b21, Zknd_aes32dsmi_cg_cp_rs1_b21_str) +80000418: 000d2203 lw x4,0(x26) +8000041c: 00120863 beq x4,x1,8000042c +80000420: 5a1072ef jal x5,800081c0 +80000424: 80000414 .word 0x80000414 +80000428: 8000dc95 .word 0x8000dc95 +8000042c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x240192d3 +80000430: 000eab03 lw x22,0(x29) +80000434: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x7783de9a +80000438: 000ea703 lw x14,0(x29) +8000043c: 004e8e93 addi x29,x29,4 + +80000440 : +Zknd_aes32dsmi_cg_cp_rs1_b22: + aes32dsmi x16, x22, x14, 1 # perform operation +80000440: 6eeb0833 aes32dsmi x16,x22,x14,0x1 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zknd_aes32dsmi_cg_cp_rs1_b22, Zknd_aes32dsmi_cg_cp_rs1_b22_str) +80000444: 000d2203 lw x4,0(x26) +80000448: 01020863 beq x4,x16,80000458 +8000044c: 575072ef jal x5,800081c0 +80000450: 80000440 .word 0x80000440 +80000454: 8000dccd .word 0x8000dccd +80000458: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xac41f1f1 +8000045c: 000eab83 lw x23,0(x29) +80000460: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x029fdcac +80000464: 000ea103 lw x2,0(x29) +80000468: 004e8e93 addi x29,x29,4 + +8000046c : +Zknd_aes32dsmi_cg_cp_rs1_b23: + aes32dsmi x7, x23, x2, 3 # perform operation +8000046c: ee2b83b3 aes32dsmi x7,x23,x2,0x3 + # Check if x7 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x7, Zknd_aes32dsmi_cg_cp_rs1_b23, Zknd_aes32dsmi_cg_cp_rs1_b23_str) +80000470: 000d2203 lw x4,0(x26) +80000474: 00720863 beq x4,x7,80000484 +80000478: 549072ef jal x5,800081c0 +8000047c: 8000046c .word 0x8000046c +80000480: 8000dd05 .word 0x8000dd05 +80000484: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x46bda119 +80000488: 000eac03 lw x24,0(x29) +8000048c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0xecaf19b4 +80000490: 000eac83 lw x25,0(x29) +80000494: 004e8e93 addi x29,x29,4 + +80000498 : +Zknd_aes32dsmi_cg_cp_rs1_b24: + aes32dsmi x12, x24, x25, 3 # perform operation +80000498: ef9c0633 aes32dsmi x12,x24,x25,0x3 + # Check if x12 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x12, Zknd_aes32dsmi_cg_cp_rs1_b24, Zknd_aes32dsmi_cg_cp_rs1_b24_str) +8000049c: 000d2203 lw x4,0(x26) +800004a0: 00c20863 beq x4,x12,800004b0 +800004a4: 51d072ef jal x5,800081c0 +800004a8: 80000498 .word 0x80000498 +800004ac: 8000dd3d .word 0x8000dd3d +800004b0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0xae741e61 +800004b4: 000eac83 lw x25,0(x29) +800004b8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0xf0c3da84 +800004bc: 000ea403 lw x8,0(x29) +800004c0: 004e8e93 addi x29,x29,4 + +800004c4 : +Zknd_aes32dsmi_cg_cp_rs1_b25: + aes32dsmi x10, x25, x8, 3 # perform operation +800004c4: ee8c8533 aes32dsmi x10,x25,x8,0x3 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zknd_aes32dsmi_cg_cp_rs1_b25, Zknd_aes32dsmi_cg_cp_rs1_b25_str) +800004c8: 000d2203 lw x4,0(x26) +800004cc: 00a20863 beq x4,x10,800004dc +800004d0: 4f1072ef jal x5,800081c0 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 8000dd75 .word 0x8000dd75 +800004dc: 004d0d13 addi x26,x26,4 + + mv x25, x26 # switch signature pointer register to avoid conflict with test +800004e0: 000d0c93 addi x25,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xb87e9fea +800004e4: 000ead03 lw x26,0(x29) +800004e8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x0a4cd3c7 +800004ec: 000ea083 lw x1,0(x29) +800004f0: 004e8e93 addi x29,x29,4 + +800004f4 : +Zknd_aes32dsmi_cg_cp_rs1_b26: + aes32dsmi x16, x26, x1, 0 # perform operation +800004f4: 2e1d0833 aes32dsmi x16,x26,x1,0x0 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknd_aes32dsmi_cg_cp_rs1_b26, Zknd_aes32dsmi_cg_cp_rs1_b26_str) +800004f8: 000ca203 lw x4,0(x25) +800004fc: 01020863 beq x4,x16,8000050c +80000500: 4c1072ef jal x5,800081c0 +80000504: 800004f4 .word 0x800004f4 +80000508: 8000ddad .word 0x8000ddad +8000050c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xc19c356d +80000510: 000ead83 lw x27,0(x29) +80000514: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x8d9c6c11 +80000518: 000ea583 lw x11,0(x29) +8000051c: 004e8e93 addi x29,x29,4 + +80000520 : +Zknd_aes32dsmi_cg_cp_rs1_b27: + aes32dsmi x17, x27, x11, 2 # perform operation +80000520: aebd88b3 aes32dsmi x17,x27,x11,0x2 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknd_aes32dsmi_cg_cp_rs1_b27, Zknd_aes32dsmi_cg_cp_rs1_b27_str) +80000524: 000ca203 lw x4,0(x25) +80000528: 01120863 beq x4,x17,80000538 +8000052c: 495072ef jal x5,800081c0 +80000530: 80000520 .word 0x80000520 +80000534: 8000dde5 .word 0x8000dde5 +80000538: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xf0956d5b +8000053c: 000eae03 lw x28,0(x29) +80000540: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x66e79044 +80000544: 000eac03 lw x24,0(x29) +80000548: 004e8e93 addi x29,x29,4 + +8000054c : +Zknd_aes32dsmi_cg_cp_rs1_b28: + aes32dsmi x15, x28, x24, 2 # perform operation +8000054c: af8e07b3 aes32dsmi x15,x28,x24,0x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknd_aes32dsmi_cg_cp_rs1_b28, Zknd_aes32dsmi_cg_cp_rs1_b28_str) +80000550: 000ca203 lw x4,0(x25) +80000554: 00f20863 beq x4,x15,80000564 +80000558: 469072ef jal x5,800081c0 +8000055c: 8000054c .word 0x8000054c +80000560: 8000de1d .word 0x8000de1d +80000564: 004c8c93 addi x25,x25,4 + + mv x21, x29 # switch data pointer register to avoid conflict with test +80000568: 000e8a93 addi x21,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xd52d5f23 +8000056c: 000aae83 lw x29,0(x21) +80000570: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x6d223de0 +80000574: 000aad83 lw x27,0(x21) +80000578: 004a8a93 addi x21,x21,4 + +8000057c : +Zknd_aes32dsmi_cg_cp_rs1_b29: + aes32dsmi x18, x29, x27, 0 # perform operation +8000057c: 2fbe8933 aes32dsmi x18,x29,x27,0x0 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknd_aes32dsmi_cg_cp_rs1_b29, Zknd_aes32dsmi_cg_cp_rs1_b29_str) +80000580: 000ca203 lw x4,0(x25) +80000584: 01220863 beq x4,x18,80000594 +80000588: 439072ef jal x5,800081c0 +8000058c: 8000057c .word 0x8000057c +80000590: 8000de55 .word 0x8000de55 +80000594: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x01790e1c +80000598: 000aaf03 lw x30,0(x21) +8000059c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x753cc10e +800005a0: 000aaf83 lw x31,0(x21) +800005a4: 004a8a93 addi x21,x21,4 + +800005a8 : +Zknd_aes32dsmi_cg_cp_rs1_b30: + aes32dsmi x7, x30, x31, 3 # perform operation +800005a8: efff03b3 aes32dsmi x7,x30,x31,0x3 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zknd_aes32dsmi_cg_cp_rs1_b30, Zknd_aes32dsmi_cg_cp_rs1_b30_str) +800005ac: 000ca203 lw x4,0(x25) +800005b0: 00720863 beq x4,x7,800005c0 +800005b4: 40d072ef jal x5,800081c0 +800005b8: 800005a8 .word 0x800005a8 +800005bc: 8000de8d .word 0x8000de8d +800005c0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xcc6fb82d +800005c4: 000aaf83 lw x31,0(x21) +800005c8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xc4688374 +800005cc: 000aa683 lw x13,0(x21) +800005d0: 004a8a93 addi x21,x21,4 + +800005d4 : +Zknd_aes32dsmi_cg_cp_rs1_b31: + aes32dsmi x10, x31, x13, 2 # perform operation +800005d4: aedf8533 aes32dsmi x10,x31,x13,0x2 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zknd_aes32dsmi_cg_cp_rs1_b31, Zknd_aes32dsmi_cg_cp_rs1_b31_str) +800005d8: 000ca203 lw x4,0(x25) +800005dc: 00a20863 beq x4,x10,800005ec +800005e0: 3e1072ef jal x5,800081c0 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 8000dec5 .word 0x8000dec5 +800005ec: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xed94ed28 +800005f0: 000aa483 lw x9,0(x21) +800005f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x1d857bc7 +800005f8: 000aa003 lw x0,0(x21) +800005fc: 004a8a93 addi x21,x21,4 + +80000600 : +Zknd_aes32dsmi_cg_cp_rs2_b0: + aes32dsmi x23, x9, x0, 1 # perform operation +80000600: 6e048bb3 aes32dsmi x23,x9,x0,0x1 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes32dsmi_cg_cp_rs2_b0, Zknd_aes32dsmi_cg_cp_rs2_b0_str) +80000604: 000ca203 lw x4,0(x25) +80000608: 01720863 beq x4,x23,80000618 +8000060c: 3b5072ef jal x5,800081c0 +80000610: 80000600 .word 0x80000600 +80000614: 8000defd .word 0x8000defd +80000618: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xf17eda18 +8000061c: 000aaf03 lw x30,0(x21) +80000620: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x4bf081f5 +80000624: 000aa083 lw x1,0(x21) +80000628: 004a8a93 addi x21,x21,4 + +8000062c : +Zknd_aes32dsmi_cg_cp_rs2_b1: + aes32dsmi x6, x30, x1, 1 # perform operation +8000062c: 6e1f0333 aes32dsmi x6,x30,x1,0x1 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zknd_aes32dsmi_cg_cp_rs2_b1, Zknd_aes32dsmi_cg_cp_rs2_b1_str) +80000630: 000ca203 lw x4,0(x25) +80000634: 00620863 beq x4,x6,80000644 +80000638: 389072ef jal x5,800081c0 +8000063c: 8000062c .word 0x8000062c +80000640: 8000df34 .word 0x8000df34 +80000644: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xe5690ba8 +80000648: 000aa383 lw x7,0(x21) +8000064c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x2ce3dfdb +80000650: 000aa103 lw x2,0(x21) +80000654: 004a8a93 addi x21,x21,4 + +80000658 : +Zknd_aes32dsmi_cg_cp_rs2_b2: + aes32dsmi x13, x7, x2, 0 # perform operation +80000658: 2e2386b3 aes32dsmi x13,x7,x2,0x0 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknd_aes32dsmi_cg_cp_rs2_b2, Zknd_aes32dsmi_cg_cp_rs2_b2_str) +8000065c: 000ca203 lw x4,0(x25) +80000660: 00d20863 beq x4,x13,80000670 +80000664: 35d072ef jal x5,800081c0 +80000668: 80000658 .word 0x80000658 +8000066c: 8000df6b .word 0x8000df6b +80000670: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x9f472225 +80000674: 000aaa03 lw x20,0(x21) +80000678: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xe929f627 +8000067c: 000aa183 lw x3,0(x21) +80000680: 004a8a93 addi x21,x21,4 + +80000684 : +Zknd_aes32dsmi_cg_cp_rs2_b3: + aes32dsmi x31, x20, x3, 0 # perform operation +80000684: 2e3a0fb3 aes32dsmi x31,x20,x3,0x0 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zknd_aes32dsmi_cg_cp_rs2_b3, Zknd_aes32dsmi_cg_cp_rs2_b3_str) +80000688: 000ca203 lw x4,0(x25) +8000068c: 01f20863 beq x4,x31,8000069c +80000690: 331072ef jal x5,800081c0 +80000694: 80000684 .word 0x80000684 +80000698: 8000dfa2 .word 0x8000dfa2 +8000069c: 004c8c93 addi x25,x25,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800006a0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800006a4: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x76e71a04 +800006a8: 000aa883 lw x17,0(x21) +800006ac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x1032af0e +800006b0: 000aa203 lw x4,0(x21) +800006b4: 004a8a93 addi x21,x21,4 + +800006b8 : +Zknd_aes32dsmi_cg_cp_rs2_b4: + aes32dsmi x11, x17, x4, 1 # perform operation +800006b8: 6e4885b3 aes32dsmi x11,x17,x4,0x1 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknd_aes32dsmi_cg_cp_rs2_b4, Zknd_aes32dsmi_cg_cp_rs2_b4_str) +800006bc: 000ca683 lw x13,0(x25) +800006c0: 00b68863 beq x13,x11,800006d0 +800006c4: 33d0776f jal x14,80008200 +800006c8: 800006b8 .word 0x800006b8 +800006cc: 8000dfd9 .word 0x8000dfd9 +800006d0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x892d70a6 +800006d4: 000aae03 lw x28,0(x21) +800006d8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x4475c259 +800006dc: 000aa283 lw x5,0(x21) +800006e0: 004a8a93 addi x21,x21,4 + +800006e4 : +Zknd_aes32dsmi_cg_cp_rs2_b5: + aes32dsmi x29, x28, x5, 3 # perform operation +800006e4: ee5e0eb3 aes32dsmi x29,x28,x5,0x3 + # Check if x29 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x29, Zknd_aes32dsmi_cg_cp_rs2_b5, Zknd_aes32dsmi_cg_cp_rs2_b5_str) +800006e8: 000ca683 lw x13,0(x25) +800006ec: 01d68863 beq x13,x29,800006fc +800006f0: 3110776f jal x14,80008200 +800006f4: 800006e4 .word 0x800006e4 +800006f8: 8000e010 .word 0x8000e010 +800006fc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc34cef07 +80000700: 000aa983 lw x19,0(x21) +80000704: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xf29a8c02 +80000708: 000aa303 lw x6,0(x21) +8000070c: 004a8a93 addi x21,x21,4 + +80000710 : +Zknd_aes32dsmi_cg_cp_rs2_b6: + aes32dsmi x30, x19, x6, 1 # perform operation +80000710: 6e698f33 aes32dsmi x30,x19,x6,0x1 + # Check if x30 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x30, Zknd_aes32dsmi_cg_cp_rs2_b6, Zknd_aes32dsmi_cg_cp_rs2_b6_str) +80000714: 000ca683 lw x13,0(x25) +80000718: 01e68863 beq x13,x30,80000728 +8000071c: 2e50776f jal x14,80008200 +80000720: 80000710 .word 0x80000710 +80000724: 8000e047 .word 0x8000e047 +80000728: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x70da81c7 +8000072c: 000aae83 lw x29,0(x21) +80000730: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x6eff0cee +80000734: 000aa383 lw x7,0(x21) +80000738: 004a8a93 addi x21,x21,4 + +8000073c : +Zknd_aes32dsmi_cg_cp_rs2_b7: + aes32dsmi x2, x29, x7, 1 # perform operation +8000073c: 6e7e8133 aes32dsmi x2,x29,x7,0x1 + # Check if x2 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x2, Zknd_aes32dsmi_cg_cp_rs2_b7, Zknd_aes32dsmi_cg_cp_rs2_b7_str) +80000740: 000ca683 lw x13,0(x25) +80000744: 00268863 beq x13,x2,80000754 +80000748: 2b90776f jal x14,80008200 +8000074c: 8000073c .word 0x8000073c +80000750: 8000e07e .word 0x8000e07e +80000754: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x7cc2593f +80000758: 000aac03 lw x24,0(x21) +8000075c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x3e306380 +80000760: 000aa403 lw x8,0(x21) +80000764: 004a8a93 addi x21,x21,4 + +80000768 : +Zknd_aes32dsmi_cg_cp_rs2_b8: + aes32dsmi x10, x24, x8, 2 # perform operation +80000768: ae8c0533 aes32dsmi x10,x24,x8,0x2 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zknd_aes32dsmi_cg_cp_rs2_b8, Zknd_aes32dsmi_cg_cp_rs2_b8_str) +8000076c: 000ca683 lw x13,0(x25) +80000770: 00a68863 beq x13,x10,80000780 +80000774: 28d0776f jal x14,80008200 +80000778: 80000768 .word 0x80000768 +8000077c: 8000e0b5 .word 0x8000e0b5 +80000780: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x46c3a981 +80000784: 000aa883 lw x17,0(x21) +80000788: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x69272de8 +8000078c: 000aa483 lw x9,0(x21) +80000790: 004a8a93 addi x21,x21,4 + +80000794 : +Zknd_aes32dsmi_cg_cp_rs2_b9: + aes32dsmi x16, x17, x9, 1 # perform operation +80000794: 6e988833 aes32dsmi x16,x17,x9,0x1 + # Check if x16 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x16, Zknd_aes32dsmi_cg_cp_rs2_b9, Zknd_aes32dsmi_cg_cp_rs2_b9_str) +80000798: 000ca683 lw x13,0(x25) +8000079c: 01068863 beq x13,x16,800007ac +800007a0: 2610776f jal x14,80008200 +800007a4: 80000794 .word 0x80000794 +800007a8: 8000e0ec .word 0x8000e0ec +800007ac: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x94cef6a1 +800007b0: 000aab83 lw x23,0(x21) +800007b4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x77caeaef +800007b8: 000aa503 lw x10,0(x21) +800007bc: 004a8a93 addi x21,x21,4 + +800007c0 : +Zknd_aes32dsmi_cg_cp_rs2_b10: + aes32dsmi x16, x23, x10, 2 # perform operation +800007c0: aeab8833 aes32dsmi x16,x23,x10,0x2 + # Check if x16 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x16, Zknd_aes32dsmi_cg_cp_rs2_b10, Zknd_aes32dsmi_cg_cp_rs2_b10_str) +800007c4: 000ca683 lw x13,0(x25) +800007c8: 01068863 beq x13,x16,800007d8 +800007cc: 2350776f jal x14,80008200 +800007d0: 800007c0 .word 0x800007c0 +800007d4: 8000e123 .word 0x8000e123 +800007d8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xacb86b28 +800007dc: 000aa083 lw x1,0(x21) +800007e0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x5a3cee45 +800007e4: 000aa583 lw x11,0(x21) +800007e8: 004a8a93 addi x21,x21,4 + +800007ec : +Zknd_aes32dsmi_cg_cp_rs2_b11: + aes32dsmi x30, x1, x11, 1 # perform operation +800007ec: 6eb08f33 aes32dsmi x30,x1,x11,0x1 + # Check if x30 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x30, Zknd_aes32dsmi_cg_cp_rs2_b11, Zknd_aes32dsmi_cg_cp_rs2_b11_str) +800007f0: 000ca683 lw x13,0(x25) +800007f4: 01e68863 beq x13,x30,80000804 +800007f8: 2090776f jal x14,80008200 +800007fc: 800007ec .word 0x800007ec +80000800: 8000e15b .word 0x8000e15b +80000804: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xa80d1bb0 +80000808: 000aaf03 lw x30,0(x21) +8000080c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xc69b3258 +80000810: 000aa603 lw x12,0(x21) +80000814: 004a8a93 addi x21,x21,4 + +80000818 : +Zknd_aes32dsmi_cg_cp_rs2_b12: + aes32dsmi x23, x30, x12, 1 # perform operation +80000818: 6ecf0bb3 aes32dsmi x23,x30,x12,0x1 + # Check if x23 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x23, Zknd_aes32dsmi_cg_cp_rs2_b12, Zknd_aes32dsmi_cg_cp_rs2_b12_str) +8000081c: 000ca683 lw x13,0(x25) +80000820: 01768863 beq x13,x23,80000830 +80000824: 1dd0776f jal x14,80008200 +80000828: 80000818 .word 0x80000818 +8000082c: 8000e193 .word 0x8000e193 +80000830: 004c8c93 addi x25,x25,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000834: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000838: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xa0b61245 +8000083c: 000aab03 lw x22,0(x21) +80000840: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xda05d4f0 +80000844: 000aa683 lw x13,0(x21) +80000848: 004a8a93 addi x21,x21,4 + +8000084c : +Zknd_aes32dsmi_cg_cp_rs2_b13: + aes32dsmi x9, x22, x13, 3 # perform operation +8000084c: eedb04b3 aes32dsmi x9,x22,x13,0x3 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknd_aes32dsmi_cg_cp_rs2_b13, Zknd_aes32dsmi_cg_cp_rs2_b13_str) +80000850: 000ca203 lw x4,0(x25) +80000854: 00920863 beq x4,x9,80000864 +80000858: 169072ef jal x5,800081c0 +8000085c: 8000084c .word 0x8000084c +80000860: 8000e1cb .word 0x8000e1cb +80000864: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x2c0281ff +80000868: 000aa303 lw x6,0(x21) +8000086c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x56b5c40d +80000870: 000aa703 lw x14,0(x21) +80000874: 004a8a93 addi x21,x21,4 + +80000878 : +Zknd_aes32dsmi_cg_cp_rs2_b14: + aes32dsmi x11, x6, x14, 1 # perform operation +80000878: 6ee305b3 aes32dsmi x11,x6,x14,0x1 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zknd_aes32dsmi_cg_cp_rs2_b14, Zknd_aes32dsmi_cg_cp_rs2_b14_str) +8000087c: 000ca203 lw x4,0(x25) +80000880: 00b20863 beq x4,x11,80000890 +80000884: 13d072ef jal x5,800081c0 +80000888: 80000878 .word 0x80000878 +8000088c: 8000e203 .word 0x8000e203 +80000890: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x06deb63b +80000894: 000aa503 lw x10,0(x21) +80000898: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x71977f60 +8000089c: 000aa783 lw x15,0(x21) +800008a0: 004a8a93 addi x21,x21,4 + +800008a4 : +Zknd_aes32dsmi_cg_cp_rs2_b15: + aes32dsmi x16, x10, x15, 3 # perform operation +800008a4: eef50833 aes32dsmi x16,x10,x15,0x3 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknd_aes32dsmi_cg_cp_rs2_b15, Zknd_aes32dsmi_cg_cp_rs2_b15_str) +800008a8: 000ca203 lw x4,0(x25) +800008ac: 01020863 beq x4,x16,800008bc +800008b0: 111072ef jal x5,800081c0 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 8000e23b .word 0x8000e23b +800008bc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x8711d743 +800008c0: 000aa083 lw x1,0(x21) +800008c4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xcc072f22 +800008c8: 000aa803 lw x16,0(x21) +800008cc: 004a8a93 addi x21,x21,4 + +800008d0 : +Zknd_aes32dsmi_cg_cp_rs2_b16: + aes32dsmi x19, x1, x16, 3 # perform operation +800008d0: ef0089b3 aes32dsmi x19,x1,x16,0x3 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes32dsmi_cg_cp_rs2_b16, Zknd_aes32dsmi_cg_cp_rs2_b16_str) +800008d4: 000ca203 lw x4,0(x25) +800008d8: 01320863 beq x4,x19,800008e8 +800008dc: 0e5072ef jal x5,800081c0 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 8000e273 .word 0x8000e273 +800008e8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xd5a06e18 +800008ec: 000aac03 lw x24,0(x21) +800008f0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x2b93f8b2 +800008f4: 000aa883 lw x17,0(x21) +800008f8: 004a8a93 addi x21,x21,4 + +800008fc : +Zknd_aes32dsmi_cg_cp_rs2_b17: + aes32dsmi x18, x24, x17, 3 # perform operation +800008fc: ef1c0933 aes32dsmi x18,x24,x17,0x3 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknd_aes32dsmi_cg_cp_rs2_b17, Zknd_aes32dsmi_cg_cp_rs2_b17_str) +80000900: 000ca203 lw x4,0(x25) +80000904: 01220863 beq x4,x18,80000914 +80000908: 0b9072ef jal x5,800081c0 +8000090c: 800008fc .word 0x800008fc +80000910: 8000e2ab .word 0x8000e2ab +80000914: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x00e1d574 +80000918: 000aa503 lw x10,0(x21) +8000091c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x0d7c002d +80000920: 000aa903 lw x18,0(x21) +80000924: 004a8a93 addi x21,x21,4 + +80000928 : +Zknd_aes32dsmi_cg_cp_rs2_b18: + aes32dsmi x28, x10, x18, 2 # perform operation +80000928: af250e33 aes32dsmi x28,x10,x18,0x2 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zknd_aes32dsmi_cg_cp_rs2_b18, Zknd_aes32dsmi_cg_cp_rs2_b18_str) +8000092c: 000ca203 lw x4,0(x25) +80000930: 01c20863 beq x4,x28,80000940 +80000934: 08d072ef jal x5,800081c0 +80000938: 80000928 .word 0x80000928 +8000093c: 8000e2e3 .word 0x8000e2e3 +80000940: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x774cb064 +80000944: 000aa583 lw x11,0(x21) +80000948: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xeb8eb336 +8000094c: 000aa983 lw x19,0(x21) +80000950: 004a8a93 addi x21,x21,4 + +80000954 : +Zknd_aes32dsmi_cg_cp_rs2_b19: + aes32dsmi x12, x11, x19, 2 # perform operation +80000954: af358633 aes32dsmi x12,x11,x19,0x2 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknd_aes32dsmi_cg_cp_rs2_b19, Zknd_aes32dsmi_cg_cp_rs2_b19_str) +80000958: 000ca203 lw x4,0(x25) +8000095c: 00c20863 beq x4,x12,8000096c +80000960: 061072ef jal x5,800081c0 +80000964: 80000954 .word 0x80000954 +80000968: 8000e31b .word 0x8000e31b +8000096c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x6f54505b +80000970: 000aa083 lw x1,0(x21) +80000974: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x1fdc5bf9 +80000978: 000aaa03 lw x20,0(x21) +8000097c: 004a8a93 addi x21,x21,4 + +80000980 : +Zknd_aes32dsmi_cg_cp_rs2_b20: + aes32dsmi x3, x1, x20, 3 # perform operation +80000980: ef4081b3 aes32dsmi x3,x1,x20,0x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknd_aes32dsmi_cg_cp_rs2_b20, Zknd_aes32dsmi_cg_cp_rs2_b20_str) +80000984: 000ca203 lw x4,0(x25) +80000988: 00320863 beq x4,x3,80000998 +8000098c: 035072ef jal x5,800081c0 +80000990: 80000980 .word 0x80000980 +80000994: 8000e353 .word 0x8000e353 +80000998: 004c8c93 addi x25,x25,4 + + mv x6, x21 # switch data pointer register to avoid conflict with test +8000099c: 000a8313 addi x6,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xe619f252 +800009a0: 00032c03 lw x24,0(x6) +800009a4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x5e121248 +800009a8: 00032a83 lw x21,0(x6) +800009ac: 00430313 addi x6,x6,4 + +800009b0 : +Zknd_aes32dsmi_cg_cp_rs2_b21: + aes32dsmi x17, x24, x21, 2 # perform operation +800009b0: af5c08b3 aes32dsmi x17,x24,x21,0x2 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknd_aes32dsmi_cg_cp_rs2_b21, Zknd_aes32dsmi_cg_cp_rs2_b21_str) +800009b4: 000ca203 lw x4,0(x25) +800009b8: 01120863 beq x4,x17,800009c8 +800009bc: 005072ef jal x5,800081c0 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 8000e38b .word 0x8000e38b +800009c8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x57ab81a9 +800009cc: 00032183 lw x3,0(x6) +800009d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x310452e3 +800009d4: 00032b03 lw x22,0(x6) +800009d8: 00430313 addi x6,x6,4 + +800009dc : +Zknd_aes32dsmi_cg_cp_rs2_b22: + aes32dsmi x1, x3, x22, 2 # perform operation +800009dc: af6180b3 aes32dsmi x1,x3,x22,0x2 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zknd_aes32dsmi_cg_cp_rs2_b22, Zknd_aes32dsmi_cg_cp_rs2_b22_str) +800009e0: 000ca203 lw x4,0(x25) +800009e4: 00120863 beq x4,x1,800009f4 +800009e8: 7d8072ef jal x5,800081c0 +800009ec: 800009dc .word 0x800009dc +800009f0: 8000e3c3 .word 0x8000e3c3 +800009f4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x51a0ce29 +800009f8: 00032103 lw x2,0(x6) +800009fc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xc9635957 +80000a00: 00032b83 lw x23,0(x6) +80000a04: 00430313 addi x6,x6,4 + +80000a08 : +Zknd_aes32dsmi_cg_cp_rs2_b23: + aes32dsmi x19, x2, x23, 0 # perform operation +80000a08: 2f7109b3 aes32dsmi x19,x2,x23,0x0 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes32dsmi_cg_cp_rs2_b23, Zknd_aes32dsmi_cg_cp_rs2_b23_str) +80000a0c: 000ca203 lw x4,0(x25) +80000a10: 01320863 beq x4,x19,80000a20 +80000a14: 7ac072ef jal x5,800081c0 +80000a18: 80000a08 .word 0x80000a08 +80000a1c: 8000e3fb .word 0x8000e3fb +80000a20: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xcd1897fc +80000a24: 00032703 lw x14,0(x6) +80000a28: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x66dc28b2 +80000a2c: 00032c03 lw x24,0(x6) +80000a30: 00430313 addi x6,x6,4 + +80000a34 : +Zknd_aes32dsmi_cg_cp_rs2_b24: + aes32dsmi x3, x14, x24, 3 # perform operation +80000a34: ef8701b3 aes32dsmi x3,x14,x24,0x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknd_aes32dsmi_cg_cp_rs2_b24, Zknd_aes32dsmi_cg_cp_rs2_b24_str) +80000a38: 000ca203 lw x4,0(x25) +80000a3c: 00320863 beq x4,x3,80000a4c +80000a40: 780072ef jal x5,800081c0 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 8000e433 .word 0x8000e433 +80000a4c: 004c8c93 addi x25,x25,4 + + mv x19, x25 # switch signature pointer register to avoid conflict with test +80000a50: 000c8993 addi x19,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x1f70bac8 +80000a54: 00032503 lw x10,0(x6) +80000a58: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xc3a10efc +80000a5c: 00032c83 lw x25,0(x6) +80000a60: 00430313 addi x6,x6,4 + +80000a64 : +Zknd_aes32dsmi_cg_cp_rs2_b25: + aes32dsmi x9, x10, x25, 2 # perform operation +80000a64: af9504b3 aes32dsmi x9,x10,x25,0x2 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zknd_aes32dsmi_cg_cp_rs2_b25, Zknd_aes32dsmi_cg_cp_rs2_b25_str) +80000a68: 0009a203 lw x4,0(x19) +80000a6c: 00920863 beq x4,x9,80000a7c +80000a70: 750072ef jal x5,800081c0 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 8000e46b .word 0x8000e46b +80000a7c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xc92467f1 +80000a80: 00032703 lw x14,0(x6) +80000a84: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xff2d1b70 +80000a88: 00032d03 lw x26,0(x6) +80000a8c: 00430313 addi x6,x6,4 + +80000a90 : +Zknd_aes32dsmi_cg_cp_rs2_b26: + aes32dsmi x31, x14, x26, 2 # perform operation +80000a90: afa70fb3 aes32dsmi x31,x14,x26,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zknd_aes32dsmi_cg_cp_rs2_b26, Zknd_aes32dsmi_cg_cp_rs2_b26_str) +80000a94: 0009a203 lw x4,0(x19) +80000a98: 01f20863 beq x4,x31,80000aa8 +80000a9c: 724072ef jal x5,800081c0 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 8000e4a3 .word 0x8000e4a3 +80000aa8: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xcf63c764 +80000aac: 00032c83 lw x25,0(x6) +80000ab0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x9521b3c9 +80000ab4: 00032d83 lw x27,0(x6) +80000ab8: 00430313 addi x6,x6,4 + +80000abc : +Zknd_aes32dsmi_cg_cp_rs2_b27: + aes32dsmi x18, x25, x27, 0 # perform operation +80000abc: 2fbc8933 aes32dsmi x18,x25,x27,0x0 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknd_aes32dsmi_cg_cp_rs2_b27, Zknd_aes32dsmi_cg_cp_rs2_b27_str) +80000ac0: 0009a203 lw x4,0(x19) +80000ac4: 01220863 beq x4,x18,80000ad4 +80000ac8: 6f8072ef jal x5,800081c0 +80000acc: 80000abc .word 0x80000abc +80000ad0: 8000e4db .word 0x8000e4db +80000ad4: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x327fbe48 +80000ad8: 00032503 lw x10,0(x6) +80000adc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x1d103ba9 +80000ae0: 00032e03 lw x28,0(x6) +80000ae4: 00430313 addi x6,x6,4 + +80000ae8 : +Zknd_aes32dsmi_cg_cp_rs2_b28: + aes32dsmi x22, x10, x28, 3 # perform operation +80000ae8: efc50b33 aes32dsmi x22,x10,x28,0x3 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zknd_aes32dsmi_cg_cp_rs2_b28, Zknd_aes32dsmi_cg_cp_rs2_b28_str) +80000aec: 0009a203 lw x4,0(x19) +80000af0: 01620863 beq x4,x22,80000b00 +80000af4: 6cc072ef jal x5,800081c0 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 8000e513 .word 0x8000e513 +80000b00: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x66573061 +80000b04: 00032483 lw x9,0(x6) +80000b08: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xeca529d2 +80000b0c: 00032e83 lw x29,0(x6) +80000b10: 00430313 addi x6,x6,4 + +80000b14 : +Zknd_aes32dsmi_cg_cp_rs2_b29: + aes32dsmi x31, x9, x29, 2 # perform operation +80000b14: afd48fb3 aes32dsmi x31,x9,x29,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zknd_aes32dsmi_cg_cp_rs2_b29, Zknd_aes32dsmi_cg_cp_rs2_b29_str) +80000b18: 0009a203 lw x4,0(x19) +80000b1c: 01f20863 beq x4,x31,80000b2c +80000b20: 6a0072ef jal x5,800081c0 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 8000e54b .word 0x8000e54b +80000b2c: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x3b32a25e +80000b30: 00032183 lw x3,0(x6) +80000b34: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xa4312909 +80000b38: 00032f03 lw x30,0(x6) +80000b3c: 00430313 addi x6,x6,4 + +80000b40 : +Zknd_aes32dsmi_cg_cp_rs2_b30: + aes32dsmi x7, x3, x30, 3 # perform operation +80000b40: efe183b3 aes32dsmi x7,x3,x30,0x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zknd_aes32dsmi_cg_cp_rs2_b30, Zknd_aes32dsmi_cg_cp_rs2_b30_str) +80000b44: 0009a203 lw x4,0(x19) +80000b48: 00720863 beq x4,x7,80000b58 +80000b4c: 674072ef jal x5,800081c0 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 8000e583 .word 0x8000e583 +80000b58: 00498993 addi x19,x19,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x3f6671e3 +80000b5c: 00032d83 lw x27,0(x6) +80000b60: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x29ccbaef +80000b64: 00032f83 lw x31,0(x6) +80000b68: 00430313 addi x6,x6,4 + +80000b6c : +Zknd_aes32dsmi_cg_cp_rs2_b31: + aes32dsmi x23, x27, x31, 0 # perform operation +80000b6c: 2ffd8bb3 aes32dsmi x23,x27,x31,0x0 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zknd_aes32dsmi_cg_cp_rs2_b31, Zknd_aes32dsmi_cg_cp_rs2_b31_str) +80000b70: 0009a203 lw x4,0(x19) +80000b74: 01720863 beq x4,x23,80000b84 +80000b78: 648072ef jal x5,800081c0 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 8000e5bb .word 0x8000e5bb +80000b84: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x60ddc4b3 +80000b88: 00032c83 lw x25,0(x6) +80000b8c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5a50a814 +80000b90: 00032603 lw x12,0(x6) +80000b94: 00430313 addi x6,x6,4 + +80000b98 : +Zknd_aes32dsmi_cg_cp_rd_b0: + aes32dsmi x0, x25, x12, 1 # perform operation +80000b98: 6ecc8033 aes32dsmi x0,x25,x12,0x1 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zknd_aes32dsmi_cg_cp_rd_b0, Zknd_aes32dsmi_cg_cp_rd_b0_str) +80000b9c: 0009a203 lw x4,0(x19) +80000ba0: 00020863 beq x4,x0,80000bb0 +80000ba4: 61c072ef jal x5,800081c0 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 8000e5f3 .word 0x8000e5f3 +80000bb0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x6bd8cb23 +80000bb4: 00032583 lw x11,0(x6) +80000bb8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x449f730f +80000bbc: 00032483 lw x9,0(x6) +80000bc0: 00430313 addi x6,x6,4 + +80000bc4 : +Zknd_aes32dsmi_cg_cp_rd_b1: + aes32dsmi x1, x11, x9, 2 # perform operation +80000bc4: ae9580b3 aes32dsmi x1,x11,x9,0x2 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zknd_aes32dsmi_cg_cp_rd_b1, Zknd_aes32dsmi_cg_cp_rd_b1_str) +80000bc8: 0009a203 lw x4,0(x19) +80000bcc: 00120863 beq x4,x1,80000bdc +80000bd0: 5f0072ef jal x5,800081c0 +80000bd4: 80000bc4 .word 0x80000bc4 +80000bd8: 8000e629 .word 0x8000e629 +80000bdc: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xecf5b6fd +80000be0: 00032903 lw x18,0(x6) +80000be4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0xeaa47ae0 +80000be8: 00032003 lw x0,0(x6) +80000bec: 00430313 addi x6,x6,4 + +80000bf0 : +Zknd_aes32dsmi_cg_cp_rd_b2: + aes32dsmi x2, x18, x0, 2 # perform operation +80000bf0: ae090133 aes32dsmi x2,x18,x0,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zknd_aes32dsmi_cg_cp_rd_b2, Zknd_aes32dsmi_cg_cp_rd_b2_str) +80000bf4: 0009a203 lw x4,0(x19) +80000bf8: 00220863 beq x4,x2,80000c08 +80000bfc: 5c4072ef jal x5,800081c0 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 8000e65f .word 0x8000e65f +80000c08: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0d5354f8 +80000c0c: 00032c83 lw x25,0(x6) +80000c10: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xb07eb89f +80000c14: 00032783 lw x15,0(x6) +80000c18: 00430313 addi x6,x6,4 + +80000c1c : +Zknd_aes32dsmi_cg_cp_rd_b3: + aes32dsmi x3, x25, x15, 3 # perform operation +80000c1c: eefc81b3 aes32dsmi x3,x25,x15,0x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zknd_aes32dsmi_cg_cp_rd_b3, Zknd_aes32dsmi_cg_cp_rd_b3_str) +80000c20: 0009a203 lw x4,0(x19) +80000c24: 00320863 beq x4,x3,80000c34 +80000c28: 598072ef jal x5,800081c0 +80000c2c: 80000c1c .word 0x80000c1c +80000c30: 8000e695 .word 0x8000e695 +80000c34: 00498993 addi x19,x19,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c38: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c3c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xaba1b7be +80000c40: 00032883 lw x17,0(x6) +80000c44: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x084242e6 +80000c48: 00032103 lw x2,0(x6) +80000c4c: 00430313 addi x6,x6,4 + +80000c50 : +Zknd_aes32dsmi_cg_cp_rd_b4: + aes32dsmi x4, x17, x2, 3 # perform operation +80000c50: ee288233 aes32dsmi x4,x17,x2,0x3 + # Check if x4 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x4, Zknd_aes32dsmi_cg_cp_rd_b4, Zknd_aes32dsmi_cg_cp_rd_b4_str) +80000c54: 0009a683 lw x13,0(x19) +80000c58: 00468863 beq x13,x4,80000c68 +80000c5c: 5a40776f jal x14,80008200 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 8000e6cb .word 0x8000e6cb +80000c68: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x049c0639 +80000c6c: 00032883 lw x17,0(x6) +80000c70: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x3828703f +80000c74: 00032483 lw x9,0(x6) +80000c78: 00430313 addi x6,x6,4 + +80000c7c : +Zknd_aes32dsmi_cg_cp_rd_b5: + aes32dsmi x5, x17, x9, 3 # perform operation +80000c7c: ee9882b3 aes32dsmi x5,x17,x9,0x3 + # Check if x5 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x5, Zknd_aes32dsmi_cg_cp_rd_b5, Zknd_aes32dsmi_cg_cp_rd_b5_str) +80000c80: 0009a683 lw x13,0(x19) +80000c84: 00568863 beq x13,x5,80000c94 +80000c88: 5780776f jal x14,80008200 +80000c8c: 80000c7c .word 0x80000c7c +80000c90: 8000e701 .word 0x8000e701 +80000c94: 00498993 addi x19,x19,4 + + mv x30, x6 # switch data pointer register to avoid conflict with test +80000c98: 00030f13 addi x30,x6,0 +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x9a6bbf12 +80000c9c: 000f2083 lw x1,0(x30) +80000ca0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs2: x5 = 0x50d29230 +80000ca4: 000f2283 lw x5,0(x30) +80000ca8: 004f0f13 addi x30,x30,4 + +80000cac : +Zknd_aes32dsmi_cg_cp_rd_b6: + aes32dsmi x6, x1, x5, 0 # perform operation +80000cac: 2e508333 aes32dsmi x6,x1,x5,0x0 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zknd_aes32dsmi_cg_cp_rd_b6, Zknd_aes32dsmi_cg_cp_rd_b6_str) +80000cb0: 0009a683 lw x13,0(x19) +80000cb4: 00668863 beq x13,x6,80000cc4 +80000cb8: 5480776f jal x14,80008200 +80000cbc: 80000cac .word 0x80000cac +80000cc0: 8000e737 .word 0x8000e737 +80000cc4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x309963ef +80000cc8: 000f2d03 lw x26,0(x30) +80000ccc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0xbc15a58f +80000cd0: 000f2c83 lw x25,0(x30) +80000cd4: 004f0f13 addi x30,x30,4 + +80000cd8 : +Zknd_aes32dsmi_cg_cp_rd_b7: + aes32dsmi x7, x26, x25, 2 # perform operation +80000cd8: af9d03b3 aes32dsmi x7,x26,x25,0x2 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zknd_aes32dsmi_cg_cp_rd_b7, Zknd_aes32dsmi_cg_cp_rd_b7_str) +80000cdc: 0009a683 lw x13,0(x19) +80000ce0: 00768863 beq x13,x7,80000cf0 +80000ce4: 51c0776f jal x14,80008200 +80000ce8: 80000cd8 .word 0x80000cd8 +80000cec: 8000e76d .word 0x8000e76d +80000cf0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x4f3e208f +80000cf4: 000f2a83 lw x21,0(x30) +80000cf8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0xf4362361 +80000cfc: 000f2903 lw x18,0(x30) +80000d00: 004f0f13 addi x30,x30,4 + +80000d04 : +Zknd_aes32dsmi_cg_cp_rd_b8: + aes32dsmi x8, x21, x18, 1 # perform operation +80000d04: 6f2a8433 aes32dsmi x8,x21,x18,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zknd_aes32dsmi_cg_cp_rd_b8, Zknd_aes32dsmi_cg_cp_rd_b8_str) +80000d08: 0009a683 lw x13,0(x19) +80000d0c: 00868863 beq x13,x8,80000d1c +80000d10: 4f00776f jal x14,80008200 +80000d14: 80000d04 .word 0x80000d04 +80000d18: 8000e7a3 .word 0x8000e7a3 +80000d1c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x42b39b51 +80000d20: 000f2383 lw x7,0(x30) +80000d24: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x93e69f38 +80000d28: 000f2c83 lw x25,0(x30) +80000d2c: 004f0f13 addi x30,x30,4 + +80000d30 : +Zknd_aes32dsmi_cg_cp_rd_b9: + aes32dsmi x9, x7, x25, 1 # perform operation +80000d30: 6f9384b3 aes32dsmi x9,x7,x25,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zknd_aes32dsmi_cg_cp_rd_b9, Zknd_aes32dsmi_cg_cp_rd_b9_str) +80000d34: 0009a683 lw x13,0(x19) +80000d38: 00968863 beq x13,x9,80000d48 +80000d3c: 4c40776f jal x14,80008200 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 8000e7d9 .word 0x8000e7d9 +80000d48: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xe298b762 +80000d4c: 000f2b83 lw x23,0(x30) +80000d50: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xdad9f55f +80000d54: 000f2603 lw x12,0(x30) +80000d58: 004f0f13 addi x30,x30,4 + +80000d5c : +Zknd_aes32dsmi_cg_cp_rd_b10: + aes32dsmi x10, x23, x12, 0 # perform operation +80000d5c: 2ecb8533 aes32dsmi x10,x23,x12,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zknd_aes32dsmi_cg_cp_rd_b10, Zknd_aes32dsmi_cg_cp_rd_b10_str) +80000d60: 0009a683 lw x13,0(x19) +80000d64: 00a68863 beq x13,x10,80000d74 +80000d68: 4980776f jal x14,80008200 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 8000e80f .word 0x8000e80f +80000d74: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x653e5f11 +80000d78: 000f2403 lw x8,0(x30) +80000d7c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xd0a492ad +80000d80: 000f2d83 lw x27,0(x30) +80000d84: 004f0f13 addi x30,x30,4 + +80000d88 : +Zknd_aes32dsmi_cg_cp_rd_b11: + aes32dsmi x11, x8, x27, 1 # perform operation +80000d88: 6fb405b3 aes32dsmi x11,x8,x27,0x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zknd_aes32dsmi_cg_cp_rd_b11, Zknd_aes32dsmi_cg_cp_rd_b11_str) +80000d8c: 0009a683 lw x13,0(x19) +80000d90: 00b68863 beq x13,x11,80000da0 +80000d94: 46c0776f jal x14,80008200 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 8000e846 .word 0x8000e846 +80000da0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x99a6d86a +80000da4: 000f2103 lw x2,0(x30) +80000da8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x8623a182 +80000dac: 000f2c03 lw x24,0(x30) +80000db0: 004f0f13 addi x30,x30,4 + +80000db4 : +Zknd_aes32dsmi_cg_cp_rd_b12: + aes32dsmi x12, x2, x24, 1 # perform operation +80000db4: 6f810633 aes32dsmi x12,x2,x24,0x1 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zknd_aes32dsmi_cg_cp_rd_b12, Zknd_aes32dsmi_cg_cp_rd_b12_str) +80000db8: 0009a683 lw x13,0(x19) +80000dbc: 00c68863 beq x13,x12,80000dcc +80000dc0: 4400776f jal x14,80008200 +80000dc4: 80000db4 .word 0x80000db4 +80000dc8: 8000e87d .word 0x8000e87d +80000dcc: 00498993 addi x19,x19,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dd0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dd4: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x83b9d784 +80000dd8: 000f2a83 lw x21,0(x30) +80000ddc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs2: x31 = 0x62498663 +80000de0: 000f2f83 lw x31,0(x30) +80000de4: 004f0f13 addi x30,x30,4 + +80000de8 : +Zknd_aes32dsmi_cg_cp_rd_b13: + aes32dsmi x13, x21, x31, 0 # perform operation +80000de8: 2ffa86b3 aes32dsmi x13,x21,x31,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zknd_aes32dsmi_cg_cp_rd_b13, Zknd_aes32dsmi_cg_cp_rd_b13_str) +80000dec: 0009a383 lw x7,0(x19) +80000df0: 00d38863 beq x7,x13,80000e00 +80000df4: 3e40746f jal x8,800081d8 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 8000e8b4 .word 0x8000e8b4 +80000e00: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x82bab646 +80000e04: 000f2303 lw x6,0(x30) +80000e08: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xe2580caa +80000e0c: 000f2c03 lw x24,0(x30) +80000e10: 004f0f13 addi x30,x30,4 + +80000e14 : +Zknd_aes32dsmi_cg_cp_rd_b14: + aes32dsmi x14, x6, x24, 1 # perform operation +80000e14: 6f830733 aes32dsmi x14,x6,x24,0x1 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zknd_aes32dsmi_cg_cp_rd_b14, Zknd_aes32dsmi_cg_cp_rd_b14_str) +80000e18: 0009a383 lw x7,0(x19) +80000e1c: 00e38863 beq x7,x14,80000e2c +80000e20: 3b80746f jal x8,800081d8 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 8000e8eb .word 0x8000e8eb +80000e2c: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x35d3d9c7 +80000e30: 000f2303 lw x6,0(x30) +80000e34: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0xf85c98db +80000e38: 000f2103 lw x2,0(x30) +80000e3c: 004f0f13 addi x30,x30,4 + +80000e40 : +Zknd_aes32dsmi_cg_cp_rd_b15: + aes32dsmi x15, x6, x2, 3 # perform operation +80000e40: ee2307b3 aes32dsmi x15,x6,x2,0x3 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zknd_aes32dsmi_cg_cp_rd_b15, Zknd_aes32dsmi_cg_cp_rd_b15_str) +80000e44: 0009a383 lw x7,0(x19) +80000e48: 00f38863 beq x7,x15,80000e58 +80000e4c: 38c0746f jal x8,800081d8 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 8000e922 .word 0x8000e922 +80000e58: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x8ac9f411 +80000e5c: 000f2b03 lw x22,0(x30) +80000e60: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0x16df406a +80000e64: 000f2603 lw x12,0(x30) +80000e68: 004f0f13 addi x30,x30,4 + +80000e6c : +Zknd_aes32dsmi_cg_cp_rd_b16: + aes32dsmi x16, x22, x12, 1 # perform operation +80000e6c: 6ecb0833 aes32dsmi x16,x22,x12,0x1 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zknd_aes32dsmi_cg_cp_rd_b16, Zknd_aes32dsmi_cg_cp_rd_b16_str) +80000e70: 0009a383 lw x7,0(x19) +80000e74: 01038863 beq x7,x16,80000e84 +80000e78: 3600746f jal x8,800081d8 +80000e7c: 80000e6c .word 0x80000e6c +80000e80: 8000e959 .word 0x8000e959 +80000e84: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xfc9562aa +80000e88: 000f2b83 lw x23,0(x30) +80000e8c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0xf2cee0c5 +80000e90: 000f2103 lw x2,0(x30) +80000e94: 004f0f13 addi x30,x30,4 + +80000e98 : +Zknd_aes32dsmi_cg_cp_rd_b17: + aes32dsmi x17, x23, x2, 0 # perform operation +80000e98: 2e2b88b3 aes32dsmi x17,x23,x2,0x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zknd_aes32dsmi_cg_cp_rd_b17, Zknd_aes32dsmi_cg_cp_rd_b17_str) +80000e9c: 0009a383 lw x7,0(x19) +80000ea0: 01138863 beq x7,x17,80000eb0 +80000ea4: 3340746f jal x8,800081d8 +80000ea8: 80000e98 .word 0x80000e98 +80000eac: 8000e990 .word 0x8000e990 +80000eb0: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x4a49f580 +80000eb4: 000f2603 lw x12,0(x30) +80000eb8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs2: x1 = 0x480198ed +80000ebc: 000f2083 lw x1,0(x30) +80000ec0: 004f0f13 addi x30,x30,4 + +80000ec4 : +Zknd_aes32dsmi_cg_cp_rd_b18: + aes32dsmi x18, x12, x1, 3 # perform operation +80000ec4: ee160933 aes32dsmi x18,x12,x1,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zknd_aes32dsmi_cg_cp_rd_b18, Zknd_aes32dsmi_cg_cp_rd_b18_str) +80000ec8: 0009a383 lw x7,0(x19) +80000ecc: 01238863 beq x7,x18,80000edc +80000ed0: 3080746f jal x8,800081d8 +80000ed4: 80000ec4 .word 0x80000ec4 +80000ed8: 8000e9c7 .word 0x8000e9c7 +80000edc: 00498993 addi x19,x19,4 + + mv x2, x19 # switch signature pointer register to avoid conflict with test +80000ee0: 00098113 addi x2,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0x5a886908 +80000ee4: 000f2203 lw x4,0(x30) +80000ee8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0xa1795899 +80000eec: 000f2a83 lw x21,0(x30) +80000ef0: 004f0f13 addi x30,x30,4 + +80000ef4 : +Zknd_aes32dsmi_cg_cp_rd_b19: + aes32dsmi x19, x4, x21, 2 # perform operation +80000ef4: af5209b3 aes32dsmi x19,x4,x21,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cp_rd_b19, Zknd_aes32dsmi_cg_cp_rd_b19_str) +80000ef8: 00012383 lw x7,0(x2) +80000efc: 01338863 beq x7,x19,80000f0c +80000f00: 2d80746f jal x8,800081d8 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000e9fe .word 0x8000e9fe +80000f0c: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x95ea8350 +80000f10: 000f2c83 lw x25,0(x30) +80000f14: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xcba13cf5 +80000f18: 000f2503 lw x10,0(x30) +80000f1c: 004f0f13 addi x30,x30,4 + +80000f20 : +Zknd_aes32dsmi_cg_cp_rd_b20: + aes32dsmi x20, x25, x10, 1 # perform operation +80000f20: 6eac8a33 aes32dsmi x20,x25,x10,0x1 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cp_rd_b20, Zknd_aes32dsmi_cg_cp_rd_b20_str) +80000f24: 00012383 lw x7,0(x2) +80000f28: 01438863 beq x7,x20,80000f38 +80000f2c: 2ac0746f jal x8,800081d8 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000ea35 .word 0x8000ea35 +80000f38: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0xd378d88d +80000f3c: 000f2583 lw x11,0(x30) +80000f40: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xc252b73d +80000f44: 000f2603 lw x12,0(x30) +80000f48: 004f0f13 addi x30,x30,4 + +80000f4c : +Zknd_aes32dsmi_cg_cp_rd_b21: + aes32dsmi x21, x11, x12, 1 # perform operation +80000f4c: 6ec58ab3 aes32dsmi x21,x11,x12,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cp_rd_b21, Zknd_aes32dsmi_cg_cp_rd_b21_str) +80000f50: 00012383 lw x7,0(x2) +80000f54: 01538863 beq x7,x21,80000f64 +80000f58: 2800746f jal x8,800081d8 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 8000ea6c .word 0x8000ea6c +80000f64: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x786196f3 +80000f68: 000f2583 lw x11,0(x30) +80000f6c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xaa6e1805 +80000f70: 000f2e83 lw x29,0(x30) +80000f74: 004f0f13 addi x30,x30,4 + +80000f78 : +Zknd_aes32dsmi_cg_cp_rd_b22: + aes32dsmi x22, x11, x29, 1 # perform operation +80000f78: 6fd58b33 aes32dsmi x22,x11,x29,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknd_aes32dsmi_cg_cp_rd_b22, Zknd_aes32dsmi_cg_cp_rd_b22_str) +80000f7c: 00012383 lw x7,0(x2) +80000f80: 01638863 beq x7,x22,80000f90 +80000f84: 2540746f jal x8,800081d8 +80000f88: 80000f78 .word 0x80000f78 +80000f8c: 8000eaa3 .word 0x8000eaa3 +80000f90: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x42da6404 +80000f94: 000f2083 lw x1,0(x30) +80000f98: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xaca50b23 +80000f9c: 000f2983 lw x19,0(x30) +80000fa0: 004f0f13 addi x30,x30,4 + +80000fa4 : +Zknd_aes32dsmi_cg_cp_rd_b23: + aes32dsmi x23, x1, x19, 1 # perform operation +80000fa4: 6f308bb3 aes32dsmi x23,x1,x19,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cp_rd_b23, Zknd_aes32dsmi_cg_cp_rd_b23_str) +80000fa8: 00012383 lw x7,0(x2) +80000fac: 01738863 beq x7,x23,80000fbc +80000fb0: 2280746f jal x8,800081d8 +80000fb4: 80000fa4 .word 0x80000fa4 +80000fb8: 8000eada .word 0x8000eada +80000fbc: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x54633192 +80000fc0: 000f2683 lw x13,0(x30) +80000fc4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0xc5be77a0 +80000fc8: 000f2003 lw x0,0(x30) +80000fcc: 004f0f13 addi x30,x30,4 + +80000fd0 : +Zknd_aes32dsmi_cg_cp_rd_b24: + aes32dsmi x24, x13, x0, 3 # perform operation +80000fd0: ee068c33 aes32dsmi x24,x13,x0,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsmi_cg_cp_rd_b24, Zknd_aes32dsmi_cg_cp_rd_b24_str) +80000fd4: 00012383 lw x7,0(x2) +80000fd8: 01838863 beq x7,x24,80000fe8 +80000fdc: 1fc0746f jal x8,800081d8 +80000fe0: 80000fd0 .word 0x80000fd0 +80000fe4: 8000eb11 .word 0x8000eb11 +80000fe8: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x6fa99482 +80000fec: 000f2803 lw x16,0(x30) +80000ff0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0x143d863c +80000ff4: 000f2003 lw x0,0(x30) +80000ff8: 004f0f13 addi x30,x30,4 + +80000ffc : +Zknd_aes32dsmi_cg_cp_rd_b25: + aes32dsmi x25, x16, x0, 0 # perform operation +80000ffc: 2e080cb3 aes32dsmi x25,x16,x0,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cp_rd_b25, Zknd_aes32dsmi_cg_cp_rd_b25_str) +80001000: 00012383 lw x7,0(x2) +80001004: 01938863 beq x7,x25,80001014 +80001008: 1d00746f jal x8,800081d8 +8000100c: 80000ffc .word 0x80000ffc +80001010: 8000eb48 .word 0x8000eb48 +80001014: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x1a889474 +80001018: 000f2003 lw x0,0(x30) +8000101c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x9e1618be +80001020: 000f2c03 lw x24,0(x30) +80001024: 004f0f13 addi x30,x30,4 + +80001028 : +Zknd_aes32dsmi_cg_cp_rd_b26: + aes32dsmi x26, x0, x24, 0 # perform operation +80001028: 2f800d33 aes32dsmi x26,x0,x24,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cp_rd_b26, Zknd_aes32dsmi_cg_cp_rd_b26_str) +8000102c: 00012383 lw x7,0(x2) +80001030: 01a38863 beq x7,x26,80001040 +80001034: 1a40746f jal x8,800081d8 +80001038: 80001028 .word 0x80001028 +8000103c: 8000eb7f .word 0x8000eb7f +80001040: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x407820a3 +80001044: 000f2883 lw x17,0(x30) +80001048: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0xb2aefeb7 +8000104c: 000f2c83 lw x25,0(x30) +80001050: 004f0f13 addi x30,x30,4 + +80001054 : +Zknd_aes32dsmi_cg_cp_rd_b27: + aes32dsmi x27, x17, x25, 2 # perform operation +80001054: af988db3 aes32dsmi x27,x17,x25,0x2 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsmi_cg_cp_rd_b27, Zknd_aes32dsmi_cg_cp_rd_b27_str) +80001058: 00012383 lw x7,0(x2) +8000105c: 01b38863 beq x7,x27,8000106c +80001060: 1780746f jal x8,800081d8 +80001064: 80001054 .word 0x80001054 +80001068: 8000ebb6 .word 0x8000ebb6 +8000106c: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0xadaf1fa8 +80001070: 000f2703 lw x14,0(x30) +80001074: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xba04b884 +80001078: 000f2883 lw x17,0(x30) +8000107c: 004f0f13 addi x30,x30,4 + +80001080 : +Zknd_aes32dsmi_cg_cp_rd_b28: + aes32dsmi x28, x14, x17, 1 # perform operation +80001080: 6f170e33 aes32dsmi x28,x14,x17,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cp_rd_b28, Zknd_aes32dsmi_cg_cp_rd_b28_str) +80001084: 00012383 lw x7,0(x2) +80001088: 01c38863 beq x7,x28,80001098 +8000108c: 14c0746f jal x8,800081d8 +80001090: 80001080 .word 0x80001080 +80001094: 8000ebed .word 0x8000ebed +80001098: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x6dc6818d +8000109c: 000f2483 lw x9,0(x30) +800010a0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x4b9af5e1 +800010a4: 000f2903 lw x18,0(x30) +800010a8: 004f0f13 addi x30,x30,4 + +800010ac : +Zknd_aes32dsmi_cg_cp_rd_b29: + aes32dsmi x29, x9, x18, 2 # perform operation +800010ac: af248eb3 aes32dsmi x29,x9,x18,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cp_rd_b29, Zknd_aes32dsmi_cg_cp_rd_b29_str) +800010b0: 00012383 lw x7,0(x2) +800010b4: 01d38863 beq x7,x29,800010c4 +800010b8: 1200746f jal x8,800081d8 +800010bc: 800010ac .word 0x800010ac +800010c0: 8000ec24 .word 0x8000ec24 +800010c4: 00410113 addi x2,x2,4 + + mv x22, x30 # switch data pointer register to avoid conflict with test +800010c8: 000f0b13 addi x22,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x1e9271dd +800010cc: 000b2d83 lw x27,0(x22) +800010d0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xa12fb8b9 +800010d4: 000b2983 lw x19,0(x22) +800010d8: 004b0b13 addi x22,x22,4 + +800010dc : +Zknd_aes32dsmi_cg_cp_rd_b30: + aes32dsmi x30, x27, x19, 3 # perform operation +800010dc: ef3d8f33 aes32dsmi x30,x27,x19,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cp_rd_b30, Zknd_aes32dsmi_cg_cp_rd_b30_str) +800010e0: 00012383 lw x7,0(x2) +800010e4: 01e38863 beq x7,x30,800010f4 +800010e8: 0f00746f jal x8,800081d8 +800010ec: 800010dc .word 0x800010dc +800010f0: 8000ec5b .word 0x8000ec5b +800010f4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0xb43dcbbf +800010f8: 000b2083 lw x1,0(x22) +800010fc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x4637c97f +80001100: 000b2d03 lw x26,0(x22) +80001104: 004b0b13 addi x22,x22,4 + +80001108 : +Zknd_aes32dsmi_cg_cp_rd_b31: + aes32dsmi x31, x1, x26, 3 # perform operation +80001108: efa08fb3 aes32dsmi x31,x1,x26,0x3 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cp_rd_b31, Zknd_aes32dsmi_cg_cp_rd_b31_str) +8000110c: 00012383 lw x7,0(x2) +80001110: 01f38863 beq x7,x31,80001120 +80001114: 0c40746f jal x8,800081d8 +80001118: 80001108 .word 0x80001108 +8000111c: 8000ec92 .word 0x8000ec92 +80001120: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x00000000 +80001124: 000b2603 lw x12,0(x22) +80001128: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x22f80faf +8000112c: 000b2f03 lw x30,0(x22) +80001130: 004b0b13 addi x22,x22,4 + +80001134 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x0: + aes32dsmi x11, x12, x30, 1 # perform operation +80001134: 6fe605b3 aes32dsmi x11,x12,x30,0x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cp_rs1_edges_0x0, Zknd_aes32dsmi_cg_cp_rs1_edges_0x0_str) +80001138: 00012383 lw x7,0(x2) +8000113c: 00b38863 beq x7,x11,8000114c +80001140: 0980746f jal x8,800081d8 +80001144: 80001134 .word 0x80001134 +80001148: 8000ecc9 .word 0x8000ecc9 +8000114c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000001 +80001150: 000b2703 lw x14,0(x22) +80001154: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0xe54ba1d5 +80001158: 000b2c03 lw x24,0(x22) +8000115c: 004b0b13 addi x22,x22,4 + +80001160 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x1: + aes32dsmi x5, x14, x24, 3 # perform operation +80001160: ef8702b3 aes32dsmi x5,x14,x24,0x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cp_rs1_edges_0x1, Zknd_aes32dsmi_cg_cp_rs1_edges_0x1_str) +80001164: 00012383 lw x7,0(x2) +80001168: 00538863 beq x7,x5,80001178 +8000116c: 06c0746f jal x8,800081d8 +80001170: 80001160 .word 0x80001160 +80001174: 8000ed07 .word 0x8000ed07 +80001178: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x00000002 +8000117c: 000b2983 lw x19,0(x22) +80001180: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x74a3201e +80001184: 000b2d03 lw x26,0(x22) +80001188: 004b0b13 addi x22,x22,4 + +8000118c : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x2: + aes32dsmi x9, x19, x26, 1 # perform operation +8000118c: 6fa984b3 aes32dsmi x9,x19,x26,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cp_rs1_edges_0x2, Zknd_aes32dsmi_cg_cp_rs1_edges_0x2_str) +80001190: 00012383 lw x7,0(x2) +80001194: 00938863 beq x7,x9,800011a4 +80001198: 0400746f jal x8,800081d8 +8000119c: 8000118c .word 0x8000118c +800011a0: 8000ed45 .word 0x8000ed45 +800011a4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x80000000 +800011a8: 000b2a03 lw x20,0(x22) +800011ac: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x89eaf669 +800011b0: 000b2b83 lw x23,0(x22) +800011b4: 004b0b13 addi x22,x22,4 + +800011b8 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000000: + aes32dsmi x16, x20, x23, 1 # perform operation +800011b8: 6f7a0833 aes32dsmi x16,x20,x23,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000000, Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000000_str) +800011bc: 00012383 lw x7,0(x2) +800011c0: 01038863 beq x7,x16,800011d0 +800011c4: 0140746f jal x8,800081d8 +800011c8: 800011b8 .word 0x800011b8 +800011cc: 8000ed83 .word 0x8000ed83 +800011d0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x80000001 +800011d4: 000b2183 lw x3,0(x22) +800011d8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x89e4406a +800011dc: 000b2303 lw x6,0(x22) +800011e0: 004b0b13 addi x22,x22,4 + +800011e4 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000001: + aes32dsmi x16, x3, x6, 1 # perform operation +800011e4: 6e618833 aes32dsmi x16,x3,x6,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000001, Zknd_aes32dsmi_cg_cp_rs1_edges_0x80000001_str) +800011e8: 00012383 lw x7,0(x2) +800011ec: 01038863 beq x7,x16,800011fc +800011f0: 7e90646f jal x8,800081d8 +800011f4: 800011e4 .word 0x800011e4 +800011f8: 8000edc9 .word 0x8000edc9 +800011fc: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x7fffffff +80001200: 000b2283 lw x5,0(x22) +80001204: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x64a779dc +80001208: 000b2e83 lw x29,0(x22) +8000120c: 004b0b13 addi x22,x22,4 + +80001210 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x7fffffff: + aes32dsmi x16, x5, x29, 0 # perform operation +80001210: 2fd28833 aes32dsmi x16,x5,x29,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cp_rs1_edges_0x7fffffff, Zknd_aes32dsmi_cg_cp_rs1_edges_0x7fffffff_str) +80001214: 00012383 lw x7,0(x2) +80001218: 01038863 beq x7,x16,80001228 +8000121c: 7bd0646f jal x8,800081d8 +80001220: 80001210 .word 0x80001210 +80001224: 8000ee0f .word 0x8000ee0f +80001228: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x7ffffffe +8000122c: 000b2183 lw x3,0(x22) +80001230: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x9da1ca3b +80001234: 000b2d03 lw x26,0(x22) +80001238: 004b0b13 addi x22,x22,4 + +8000123c : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x7ffffffe: + aes32dsmi x23, x3, x26, 2 # perform operation +8000123c: afa18bb3 aes32dsmi x23,x3,x26,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cp_rs1_edges_0x7ffffffe, Zknd_aes32dsmi_cg_cp_rs1_edges_0x7ffffffe_str) +80001240: 00012383 lw x7,0(x2) +80001244: 01738863 beq x7,x23,80001254 +80001248: 7910646f jal x8,800081d8 +8000124c: 8000123c .word 0x8000123c +80001250: 8000ee55 .word 0x8000ee55 +80001254: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xffffffff +80001258: 000b2f03 lw x30,0(x22) +8000125c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0x2be8f6bd +80001260: 000b2203 lw x4,0(x22) +80001264: 004b0b13 addi x22,x22,4 + +80001268 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0xffffffff: + aes32dsmi x23, x30, x4, 0 # perform operation +80001268: 2e4f0bb3 aes32dsmi x23,x30,x4,0x0 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cp_rs1_edges_0xffffffff, Zknd_aes32dsmi_cg_cp_rs1_edges_0xffffffff_str) +8000126c: 00012383 lw x7,0(x2) +80001270: 01738863 beq x7,x23,80001280 +80001274: 7650646f jal x8,800081d8 +80001278: 80001268 .word 0x80001268 +8000127c: 8000ee9b .word 0x8000ee9b +80001280: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xfffffffe +80001284: 000b2483 lw x9,0(x22) +80001288: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0xd5cc23fa +8000128c: 000b2e83 lw x29,0(x22) +80001290: 004b0b13 addi x22,x22,4 + +80001294 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0xfffffffe: + aes32dsmi x5, x9, x29, 1 # perform operation +80001294: 6fd482b3 aes32dsmi x5,x9,x29,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cp_rs1_edges_0xfffffffe, Zknd_aes32dsmi_cg_cp_rs1_edges_0xfffffffe_str) +80001298: 00012383 lw x7,0(x2) +8000129c: 00538863 beq x7,x5,800012ac +800012a0: 7390646f jal x8,800081d8 +800012a4: 80001294 .word 0x80001294 +800012a8: 8000eee1 .word 0x8000eee1 +800012ac: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x5bbc8872 +800012b0: 000b2883 lw x17,0(x22) +800012b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x95cea937 +800012b8: 000b2e03 lw x28,0(x22) +800012bc: 004b0b13 addi x22,x22,4 + +800012c0 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x5bbc8872: + aes32dsmi x30, x17, x28, 1 # perform operation +800012c0: 6fc88f33 aes32dsmi x30,x17,x28,0x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cp_rs1_edges_0x5bbc8872, Zknd_aes32dsmi_cg_cp_rs1_edges_0x5bbc8872_str) +800012c4: 00012383 lw x7,0(x2) +800012c8: 01e38863 beq x7,x30,800012d8 +800012cc: 70d0646f jal x8,800081d8 +800012d0: 800012c0 .word 0x800012c0 +800012d4: 8000ef27 .word 0x8000ef27 +800012d8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xaaaaaaaa +800012dc: 000b2783 lw x15,0(x22) +800012e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0xc4dcf093 +800012e4: 000b2b83 lw x23,0(x22) +800012e8: 004b0b13 addi x22,x22,4 + +800012ec : +Zknd_aes32dsmi_cg_cp_rs1_edges_0xaaaaaaaa: + aes32dsmi x26, x15, x23, 1 # perform operation +800012ec: 6f778d33 aes32dsmi x26,x15,x23,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cp_rs1_edges_0xaaaaaaaa, Zknd_aes32dsmi_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f0: 00012383 lw x7,0(x2) +800012f4: 01a38863 beq x7,x26,80001304 +800012f8: 6e10646f jal x8,800081d8 +800012fc: 800012ec .word 0x800012ec +80001300: 8000ef6d .word 0x8000ef6d +80001304: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x55555555 +80001308: 000b2883 lw x17,0(x22) +8000130c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x2607e47b +80001310: 000b2f03 lw x30,0(x22) +80001314: 004b0b13 addi x22,x22,4 + +80001318 : +Zknd_aes32dsmi_cg_cp_rs1_edges_0x55555555: + aes32dsmi x28, x17, x30, 3 # perform operation +80001318: efe88e33 aes32dsmi x28,x17,x30,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cp_rs1_edges_0x55555555, Zknd_aes32dsmi_cg_cp_rs1_edges_0x55555555_str) +8000131c: 00012383 lw x7,0(x2) +80001320: 01c38863 beq x7,x28,80001330 +80001324: 6b50646f jal x8,800081d8 +80001328: 80001318 .word 0x80001318 +8000132c: 8000efb3 .word 0x8000efb3 +80001330: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x41c2375f +80001334: 000b2f03 lw x30,0(x22) +80001338: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x00000000 +8000133c: 000b2183 lw x3,0(x22) +80001340: 004b0b13 addi x22,x22,4 + +80001344 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x0: + aes32dsmi x19, x30, x3, 0 # perform operation +80001344: 2e3f09b3 aes32dsmi x19,x30,x3,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cp_rs2_edges_0x0, Zknd_aes32dsmi_cg_cp_rs2_edges_0x0_str) +80001348: 00012383 lw x7,0(x2) +8000134c: 01338863 beq x7,x19,8000135c +80001350: 6890646f jal x8,800081d8 +80001354: 80001344 .word 0x80001344 +80001358: 8000eff9 .word 0x8000eff9 +8000135c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x1a064523 +80001360: 000b2083 lw x1,0(x22) +80001364: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x00000001 +80001368: 000b2303 lw x6,0(x22) +8000136c: 004b0b13 addi x22,x22,4 + +80001370 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x1: + aes32dsmi x27, x1, x6, 0 # perform operation +80001370: 2e608db3 aes32dsmi x27,x1,x6,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsmi_cg_cp_rs2_edges_0x1, Zknd_aes32dsmi_cg_cp_rs2_edges_0x1_str) +80001374: 00012383 lw x7,0(x2) +80001378: 01b38863 beq x7,x27,80001388 +8000137c: 65d0646f jal x8,800081d8 +80001380: 80001370 .word 0x80001370 +80001384: 8000f038 .word 0x8000f038 +80001388: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x02188ff6 +8000138c: 000b2883 lw x17,0(x22) +80001390: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x00000002 +80001394: 000b2283 lw x5,0(x22) +80001398: 004b0b13 addi x22,x22,4 + +8000139c : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x2: + aes32dsmi x16, x17, x5, 0 # perform operation +8000139c: 2e588833 aes32dsmi x16,x17,x5,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cp_rs2_edges_0x2, Zknd_aes32dsmi_cg_cp_rs2_edges_0x2_str) +800013a0: 00012383 lw x7,0(x2) +800013a4: 01038863 beq x7,x16,800013b4 +800013a8: 6310646f jal x8,800081d8 +800013ac: 8000139c .word 0x8000139c +800013b0: 8000f077 .word 0x8000f077 +800013b4: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x9c7e2487 +800013b8: 000b2203 lw x4,0(x22) +800013bc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x80000000 +800013c0: 000b2e03 lw x28,0(x22) +800013c4: 004b0b13 addi x22,x22,4 + +800013c8 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000000: + aes32dsmi x23, x4, x28, 1 # perform operation +800013c8: 6fc20bb3 aes32dsmi x23,x4,x28,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000000, Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000000_str) +800013cc: 00012383 lw x7,0(x2) +800013d0: 01738863 beq x7,x23,800013e0 +800013d4: 6050646f jal x8,800081d8 +800013d8: 800013c8 .word 0x800013c8 +800013dc: 8000f0b6 .word 0x8000f0b6 +800013e0: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xd76554a6 +800013e4: 000b2483 lw x9,0(x22) +800013e8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x80000001 +800013ec: 000b2e03 lw x28,0(x22) +800013f0: 004b0b13 addi x22,x22,4 + +800013f4 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000001: + aes32dsmi x19, x9, x28, 1 # perform operation +800013f4: 6fc489b3 aes32dsmi x19,x9,x28,0x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000001, Zknd_aes32dsmi_cg_cp_rs2_edges_0x80000001_str) +800013f8: 00012383 lw x7,0(x2) +800013fc: 01338863 beq x7,x19,8000140c +80001400: 5d90646f jal x8,800081d8 +80001404: 800013f4 .word 0x800013f4 +80001408: 8000f0fc .word 0x8000f0fc +8000140c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x66a50a6d +80001410: 000b2a83 lw x21,0(x22) +80001414: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x7fffffff +80001418: 000b2683 lw x13,0(x22) +8000141c: 004b0b13 addi x22,x22,4 + +80001420 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x7fffffff: + aes32dsmi x11, x21, x13, 2 # perform operation +80001420: aeda85b3 aes32dsmi x11,x21,x13,0x2 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cp_rs2_edges_0x7fffffff, Zknd_aes32dsmi_cg_cp_rs2_edges_0x7fffffff_str) +80001424: 00012383 lw x7,0(x2) +80001428: 00b38863 beq x7,x11,80001438 +8000142c: 5ad0646f jal x8,800081d8 +80001430: 80001420 .word 0x80001420 +80001434: 8000f142 .word 0x8000f142 +80001438: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x05434997 +8000143c: 000b2603 lw x12,0(x22) +80001440: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x7ffffffe +80001444: 000b2b83 lw x23,0(x22) +80001448: 004b0b13 addi x22,x22,4 + +8000144c : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x7ffffffe: + aes32dsmi x3, x12, x23, 1 # perform operation +8000144c: 6f7601b3 aes32dsmi x3,x12,x23,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cp_rs2_edges_0x7ffffffe, Zknd_aes32dsmi_cg_cp_rs2_edges_0x7ffffffe_str) +80001450: 00012383 lw x7,0(x2) +80001454: 00338863 beq x7,x3,80001464 +80001458: 5810646f jal x8,800081d8 +8000145c: 8000144c .word 0x8000144c +80001460: 8000f188 .word 0x8000f188 +80001464: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x5f0ff0f8 +80001468: 000b2503 lw x10,0(x22) +8000146c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xffffffff +80001470: 000b2603 lw x12,0(x22) +80001474: 004b0b13 addi x22,x22,4 + +80001478 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0xffffffff: + aes32dsmi x23, x10, x12, 0 # perform operation +80001478: 2ec50bb3 aes32dsmi x23,x10,x12,0x0 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cp_rs2_edges_0xffffffff, Zknd_aes32dsmi_cg_cp_rs2_edges_0xffffffff_str) +8000147c: 00012383 lw x7,0(x2) +80001480: 01738863 beq x7,x23,80001490 +80001484: 5550646f jal x8,800081d8 +80001488: 80001478 .word 0x80001478 +8000148c: 8000f1ce .word 0x8000f1ce +80001490: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x93d56829 +80001494: 000b2483 lw x9,0(x22) +80001498: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0xfffffffe +8000149c: 000b2303 lw x6,0(x22) +800014a0: 004b0b13 addi x22,x22,4 + +800014a4 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0xfffffffe: + aes32dsmi x24, x9, x6, 3 # perform operation +800014a4: ee648c33 aes32dsmi x24,x9,x6,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsmi_cg_cp_rs2_edges_0xfffffffe, Zknd_aes32dsmi_cg_cp_rs2_edges_0xfffffffe_str) +800014a8: 00012383 lw x7,0(x2) +800014ac: 01838863 beq x7,x24,800014bc +800014b0: 5290646f jal x8,800081d8 +800014b4: 800014a4 .word 0x800014a4 +800014b8: 8000f214 .word 0x8000f214 +800014bc: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x252f6b2f +800014c0: 000b2083 lw x1,0(x22) +800014c4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x5bbc8872 +800014c8: 000b2e83 lw x29,0(x22) +800014cc: 004b0b13 addi x22,x22,4 + +800014d0 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x5bbc8872: + aes32dsmi x19, x1, x29, 2 # perform operation +800014d0: afd089b3 aes32dsmi x19,x1,x29,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cp_rs2_edges_0x5bbc8872, Zknd_aes32dsmi_cg_cp_rs2_edges_0x5bbc8872_str) +800014d4: 00012383 lw x7,0(x2) +800014d8: 01338863 beq x7,x19,800014e8 +800014dc: 4fd0646f jal x8,800081d8 +800014e0: 800014d0 .word 0x800014d0 +800014e4: 8000f25a .word 0x8000f25a +800014e8: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0xbac4e0c7 +800014ec: 000b2303 lw x6,0(x22) +800014f0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xaaaaaaaa +800014f4: 000b2903 lw x18,0(x22) +800014f8: 004b0b13 addi x22,x22,4 + +800014fc : +Zknd_aes32dsmi_cg_cp_rs2_edges_0xaaaaaaaa: + aes32dsmi x28, x6, x18, 0 # perform operation +800014fc: 2f230e33 aes32dsmi x28,x6,x18,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cp_rs2_edges_0xaaaaaaaa, Zknd_aes32dsmi_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001500: 00012383 lw x7,0(x2) +80001504: 01c38863 beq x7,x28,80001514 +80001508: 4d10646f jal x8,800081d8 +8000150c: 800014fc .word 0x800014fc +80001510: 8000f2a0 .word 0x8000f2a0 +80001514: 00410113 addi x2,x2,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x0799ee1d +80001518: 000b2483 lw x9,0(x22) +8000151c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x55555555 +80001520: 000b2903 lw x18,0(x22) +80001524: 004b0b13 addi x22,x22,4 + +80001528 : +Zknd_aes32dsmi_cg_cp_rs2_edges_0x55555555: + aes32dsmi x26, x9, x18, 0 # perform operation +80001528: 2f248d33 aes32dsmi x26,x9,x18,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cp_rs2_edges_0x55555555, Zknd_aes32dsmi_cg_cp_rs2_edges_0x55555555_str) +8000152c: 00012383 lw x7,0(x2) +80001530: 01a38863 beq x7,x26,80001540 +80001534: 4a50646f jal x8,800081d8 +80001538: 80001528 .word 0x80001528 +8000153c: 8000f2e6 .word 0x8000f2e6 +80001540: 00410113 addi x2,x2,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x00000000 +80001544: 000b2903 lw x18,0(x22) +80001548: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x00000000 +8000154c: 000b2a83 lw x21,0(x22) +80001550: 004b0b13 addi x22,x22,4 + +80001554 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes32dsmi x28, x18, x21, 1 # perform operation +80001554: 6f590e33 aes32dsmi x28,x18,x21,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001558: 00012383 lw x7,0(x2) +8000155c: 01c38863 beq x7,x28,8000156c +80001560: 4790646f jal x8,800081d8 +80001564: 80001554 .word 0x80001554 +80001568: 8000f32c .word 0x8000f32c +8000156c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x00000000 +80001570: 000b2d83 lw x27,0(x22) +80001574: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0x00000001 +80001578: 000b2203 lw x4,0(x22) +8000157c: 004b0b13 addi x22,x22,4 + +80001580 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes32dsmi x9, x27, x4, 2 # perform operation +80001580: ae4d84b3 aes32dsmi x9,x27,x4,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001584: 00012383 lw x7,0(x2) +80001588: 00938863 beq x7,x9,80001598 +8000158c: 44d0646f jal x8,800081d8 +80001590: 80001580 .word 0x80001580 +80001594: 8000f382 .word 0x8000f382 +80001598: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x00000000 +8000159c: 000b2d83 lw x27,0(x22) +800015a0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x00000002 +800015a4: 000b2c03 lw x24,0(x22) +800015a8: 004b0b13 addi x22,x22,4 + +800015ac : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes32dsmi x13, x27, x24, 3 # perform operation +800015ac: ef8d86b3 aes32dsmi x13,x27,x24,0x3 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b0: 00012383 lw x7,0(x2) +800015b4: 00d38863 beq x7,x13,800015c4 +800015b8: 4210646f jal x8,800081d8 +800015bc: 800015ac .word 0x800015ac +800015c0: 8000f3d8 .word 0x8000f3d8 +800015c4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x00000000 +800015c8: 000b2b83 lw x23,0(x22) +800015cc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x80000000 +800015d0: 000b2583 lw x11,0(x22) +800015d4: 004b0b13 addi x22,x22,4 + +800015d8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + aes32dsmi x31, x23, x11, 2 # perform operation +800015d8: aebb8fb3 aes32dsmi x31,x23,x11,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015dc: 00012383 lw x7,0(x2) +800015e0: 01f38863 beq x7,x31,800015f0 +800015e4: 3f50646f jal x8,800081d8 +800015e8: 800015d8 .word 0x800015d8 +800015ec: 8000f42e .word 0x8000f42e +800015f0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000000 +800015f4: 000b2703 lw x14,0(x22) +800015f8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x80000001 +800015fc: 000b2903 lw x18,0(x22) +80001600: 004b0b13 addi x22,x22,4 + +80001604 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + aes32dsmi x6, x14, x18, 0 # perform operation +80001604: 2f270333 aes32dsmi x6,x14,x18,0x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001608: 00012383 lw x7,0(x2) +8000160c: 00638863 beq x7,x6,8000161c +80001610: 3c90646f jal x8,800081d8 +80001614: 80001604 .word 0x80001604 +80001618: 8000f48b .word 0x8000f48b +8000161c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x00000000 +80001620: 000b2283 lw x5,0(x22) +80001624: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x7fffffff +80001628: 000b2303 lw x6,0(x22) +8000162c: 004b0b13 addi x22,x22,4 + +80001630 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + aes32dsmi x24, x5, x6, 2 # perform operation +80001630: ae628c33 aes32dsmi x24,x5,x6,0x2 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001634: 00012383 lw x7,0(x2) +80001638: 01838863 beq x7,x24,80001648 +8000163c: 39d0646f jal x8,800081d8 +80001640: 80001630 .word 0x80001630 +80001644: 8000f4e8 .word 0x8000f4e8 +80001648: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000000 +8000164c: 000b2503 lw x10,0(x22) +80001650: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x7ffffffe +80001654: 000b2583 lw x11,0(x22) +80001658: 004b0b13 addi x22,x22,4 + +8000165c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + aes32dsmi x30, x10, x11, 0 # perform operation +8000165c: 2eb50f33 aes32dsmi x30,x10,x11,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001660: 00012383 lw x7,0(x2) +80001664: 01e38863 beq x7,x30,80001674 +80001668: 3710646f jal x8,800081d8 +8000166c: 8000165c .word 0x8000165c +80001670: 8000f545 .word 0x8000f545 +80001674: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x00000000 +80001678: 000b2f83 lw x31,0(x22) +8000167c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0xffffffff +80001680: 000b2883 lw x17,0(x22) +80001684: 004b0b13 addi x22,x22,4 + +80001688 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes32dsmi x13, x31, x17, 2 # perform operation +80001688: af1f86b3 aes32dsmi x13,x31,x17,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000168c: 00012383 lw x7,0(x2) +80001690: 00d38863 beq x7,x13,800016a0 +80001694: 3450646f jal x8,800081d8 +80001698: 80001688 .word 0x80001688 +8000169c: 8000f5a2 .word 0x8000f5a2 +800016a0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x00000000 +800016a4: 000b2e03 lw x28,0(x22) +800016a8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0xfffffffe +800016ac: 000b2c03 lw x24,0(x22) +800016b0: 004b0b13 addi x22,x22,4 + +800016b4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes32dsmi x5, x28, x24, 2 # perform operation +800016b4: af8e02b3 aes32dsmi x5,x28,x24,0x2 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016b8: 00012383 lw x7,0(x2) +800016bc: 00538863 beq x7,x5,800016cc +800016c0: 3190646f jal x8,800081d8 +800016c4: 800016b4 .word 0x800016b4 +800016c8: 8000f5ff .word 0x8000f5ff +800016cc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000000 +800016d0: 000b2503 lw x10,0(x22) +800016d4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x5bbc8872 +800016d8: 000b2c03 lw x24,0(x22) +800016dc: 004b0b13 addi x22,x22,4 + +800016e0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + aes32dsmi x5, x10, x24, 1 # perform operation +800016e0: 6f8502b3 aes32dsmi x5,x10,x24,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e4: 00012383 lw x7,0(x2) +800016e8: 00538863 beq x7,x5,800016f8 +800016ec: 2ed0646f jal x8,800081d8 +800016f0: 800016e0 .word 0x800016e0 +800016f4: 8000f65c .word 0x8000f65c +800016f8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x00000000 +800016fc: 000b2983 lw x19,0(x22) +80001700: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xaaaaaaaa +80001704: 000b2583 lw x11,0(x22) +80001708: 004b0b13 addi x22,x22,4 + +8000170c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + aes32dsmi x15, x19, x11, 2 # perform operation +8000170c: aeb987b3 aes32dsmi x15,x19,x11,0x2 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001710: 00012383 lw x7,0(x2) +80001714: 00f38863 beq x7,x15,80001724 +80001718: 2c10646f jal x8,800081d8 +8000171c: 8000170c .word 0x8000170c +80001720: 8000f6b9 .word 0x8000f6b9 +80001724: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x00000000 +80001728: 000b2883 lw x17,0(x22) +8000172c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x55555555 +80001730: 000b2e83 lw x29,0(x22) +80001734: 004b0b13 addi x22,x22,4 + +80001738 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + aes32dsmi x19, x17, x29, 2 # perform operation +80001738: afd889b3 aes32dsmi x19,x17,x29,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000173c: 00012383 lw x7,0(x2) +80001740: 01338863 beq x7,x19,80001750 +80001744: 2950646f jal x8,800081d8 +80001748: 80001738 .word 0x80001738 +8000174c: 8000f716 .word 0x8000f716 +80001750: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x00000001 +80001754: 000b2a83 lw x21,0(x22) +80001758: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x00000000 +8000175c: 000b2083 lw x1,0(x22) +80001760: 004b0b13 addi x22,x22,4 + +80001764 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes32dsmi x17, x21, x1, 2 # perform operation +80001764: ae1a88b3 aes32dsmi x17,x21,x1,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001768: 00012383 lw x7,0(x2) +8000176c: 01138863 beq x7,x17,8000177c +80001770: 2690646f jal x8,800081d8 +80001774: 80001764 .word 0x80001764 +80001778: 8000f773 .word 0x8000f773 +8000177c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x00000001 +80001780: 000b2683 lw x13,0(x22) +80001784: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x00000001 +80001788: 000b2903 lw x18,0(x22) +8000178c: 004b0b13 addi x22,x22,4 + +80001790 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes32dsmi x29, x13, x18, 3 # perform operation +80001790: ef268eb3 aes32dsmi x29,x13,x18,0x3 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001794: 00012383 lw x7,0(x2) +80001798: 01d38863 beq x7,x29,800017a8 +8000179c: 23d0646f jal x8,800081d8 +800017a0: 80001790 .word 0x80001790 +800017a4: 8000f7c9 .word 0x8000f7c9 +800017a8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000001 +800017ac: 000b2503 lw x10,0(x22) +800017b0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x00000002 +800017b4: 000b2a03 lw x20,0(x22) +800017b8: 004b0b13 addi x22,x22,4 + +800017bc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes32dsmi x30, x10, x20, 3 # perform operation +800017bc: ef450f33 aes32dsmi x30,x10,x20,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c0: 00012383 lw x7,0(x2) +800017c4: 01e38863 beq x7,x30,800017d4 +800017c8: 2110646f jal x8,800081d8 +800017cc: 800017bc .word 0x800017bc +800017d0: 8000f81f .word 0x8000f81f +800017d4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x00000001 +800017d8: 000b2f83 lw x31,0(x22) +800017dc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x80000000 +800017e0: 000b2783 lw x15,0(x22) +800017e4: 004b0b13 addi x22,x22,4 + +800017e8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + aes32dsmi x10, x31, x15, 2 # perform operation +800017e8: aeff8533 aes32dsmi x10,x31,x15,0x2 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017ec: 00012383 lw x7,0(x2) +800017f0: 00a38863 beq x7,x10,80001800 +800017f4: 1e50646f jal x8,800081d8 +800017f8: 800017e8 .word 0x800017e8 +800017fc: 8000f875 .word 0x8000f875 +80001800: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x00000001 +80001804: 000b2083 lw x1,0(x22) +80001808: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x80000001 +8000180c: 000b2603 lw x12,0(x22) +80001810: 004b0b13 addi x22,x22,4 + +80001814 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + aes32dsmi x20, x1, x12, 3 # perform operation +80001814: eec08a33 aes32dsmi x20,x1,x12,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001818: 00012383 lw x7,0(x2) +8000181c: 01438863 beq x7,x20,8000182c +80001820: 1b90646f jal x8,800081d8 +80001824: 80001814 .word 0x80001814 +80001828: 8000f8d2 .word 0x8000f8d2 +8000182c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x00000001 +80001830: 000b2803 lw x16,0(x22) +80001834: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x7fffffff +80001838: 000b2183 lw x3,0(x22) +8000183c: 004b0b13 addi x22,x22,4 + +80001840 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + aes32dsmi x19, x16, x3, 1 # perform operation +80001840: 6e3809b3 aes32dsmi x19,x16,x3,0x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001844: 00012383 lw x7,0(x2) +80001848: 01338863 beq x7,x19,80001858 +8000184c: 18d0646f jal x8,800081d8 +80001850: 80001840 .word 0x80001840 +80001854: 8000f92f .word 0x8000f92f +80001858: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000001 +8000185c: 000b2503 lw x10,0(x22) +80001860: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x7ffffffe +80001864: 000b2f03 lw x30,0(x22) +80001868: 004b0b13 addi x22,x22,4 + +8000186c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + aes32dsmi x31, x10, x30, 2 # perform operation +8000186c: afe50fb3 aes32dsmi x31,x10,x30,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001870: 00012383 lw x7,0(x2) +80001874: 01f38863 beq x7,x31,80001884 +80001878: 1610646f jal x8,800081d8 +8000187c: 8000186c .word 0x8000186c +80001880: 8000f98c .word 0x8000f98c +80001884: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x00000001 +80001888: 000b2c83 lw x25,0(x22) +8000188c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xffffffff +80001890: 000b2503 lw x10,0(x22) +80001894: 004b0b13 addi x22,x22,4 + +80001898 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes32dsmi x21, x25, x10, 3 # perform operation +80001898: eeac8ab3 aes32dsmi x21,x25,x10,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +8000189c: 00012383 lw x7,0(x2) +800018a0: 01538863 beq x7,x21,800018b0 +800018a4: 1350646f jal x8,800081d8 +800018a8: 80001898 .word 0x80001898 +800018ac: 8000f9e9 .word 0x8000f9e9 +800018b0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000001 +800018b4: 000b2703 lw x14,0(x22) +800018b8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xfffffffe +800018bc: 000b2503 lw x10,0(x22) +800018c0: 004b0b13 addi x22,x22,4 + +800018c4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes32dsmi x28, x14, x10, 2 # perform operation +800018c4: aea70e33 aes32dsmi x28,x14,x10,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018c8: 00012383 lw x7,0(x2) +800018cc: 01c38863 beq x7,x28,800018dc +800018d0: 1090646f jal x8,800081d8 +800018d4: 800018c4 .word 0x800018c4 +800018d8: 8000fa46 .word 0x8000fa46 +800018dc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x00000001 +800018e0: 000b2303 lw x6,0(x22) +800018e4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x5bbc8872 +800018e8: 000b2983 lw x19,0(x22) +800018ec: 004b0b13 addi x22,x22,4 + +800018f0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + aes32dsmi x5, x6, x19, 0 # perform operation +800018f0: 2f3302b3 aes32dsmi x5,x6,x19,0x0 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f4: 00012383 lw x7,0(x2) +800018f8: 00538863 beq x7,x5,80001908 +800018fc: 0dd0646f jal x8,800081d8 +80001900: 800018f0 .word 0x800018f0 +80001904: 8000faa3 .word 0x8000faa3 +80001908: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x00000001 +8000190c: 000b2a03 lw x20,0(x22) +80001910: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0xaaaaaaaa +80001914: 000b2b83 lw x23,0(x22) +80001918: 004b0b13 addi x22,x22,4 + +8000191c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + aes32dsmi x14, x20, x23, 1 # perform operation +8000191c: 6f7a0733 aes32dsmi x14,x20,x23,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001920: 00012383 lw x7,0(x2) +80001924: 00e38863 beq x7,x14,80001934 +80001928: 0b10646f jal x8,800081d8 +8000192c: 8000191c .word 0x8000191c +80001930: 8000fb00 .word 0x8000fb00 +80001934: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000001 +80001938: 000b2503 lw x10,0(x22) +8000193c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x55555555 +80001940: 000b2f03 lw x30,0(x22) +80001944: 004b0b13 addi x22,x22,4 + +80001948 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + aes32dsmi x31, x10, x30, 1 # perform operation +80001948: 6fe50fb3 aes32dsmi x31,x10,x30,0x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000194c: 00012383 lw x7,0(x2) +80001950: 01f38863 beq x7,x31,80001960 +80001954: 0850646f jal x8,800081d8 +80001958: 80001948 .word 0x80001948 +8000195c: 8000fb5d .word 0x8000fb5d +80001960: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x00000002 +80001964: 000b2603 lw x12,0(x22) +80001968: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x00000000 +8000196c: 000b2903 lw x18,0(x22) +80001970: 004b0b13 addi x22,x22,4 + +80001974 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes32dsmi x17, x12, x18, 1 # perform operation +80001974: 6f2608b3 aes32dsmi x17,x12,x18,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001978: 00012383 lw x7,0(x2) +8000197c: 01138863 beq x7,x17,8000198c +80001980: 0590646f jal x8,800081d8 +80001984: 80001974 .word 0x80001974 +80001988: 8000fbba .word 0x8000fbba +8000198c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000002 +80001990: 000b2703 lw x14,0(x22) +80001994: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x00000001 +80001998: 000b2583 lw x11,0(x22) +8000199c: 004b0b13 addi x22,x22,4 + +800019a0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes32dsmi x9, x14, x11, 1 # perform operation +800019a0: 6eb704b3 aes32dsmi x9,x14,x11,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a4: 00012383 lw x7,0(x2) +800019a8: 00938863 beq x7,x9,800019b8 +800019ac: 02d0646f jal x8,800081d8 +800019b0: 800019a0 .word 0x800019a0 +800019b4: 8000fc10 .word 0x8000fc10 +800019b8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000002 +800019bc: 000b2703 lw x14,0(x22) +800019c0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x00000002 +800019c4: 000b2b83 lw x23,0(x22) +800019c8: 004b0b13 addi x22,x22,4 + +800019cc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes32dsmi x20, x14, x23, 0 # perform operation +800019cc: 2f770a33 aes32dsmi x20,x14,x23,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d0: 00012383 lw x7,0(x2) +800019d4: 01438863 beq x7,x20,800019e4 +800019d8: 0010646f jal x8,800081d8 +800019dc: 800019cc .word 0x800019cc +800019e0: 8000fc66 .word 0x8000fc66 +800019e4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x00000002 +800019e8: 000b2983 lw x19,0(x22) +800019ec: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x80000000 +800019f0: 000b2c03 lw x24,0(x22) +800019f4: 004b0b13 addi x22,x22,4 + +800019f8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + aes32dsmi x21, x19, x24, 2 # perform operation +800019f8: af898ab3 aes32dsmi x21,x19,x24,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019fc: 00012383 lw x7,0(x2) +80001a00: 01538863 beq x7,x21,80001a10 +80001a04: 7d40646f jal x8,800081d8 +80001a08: 800019f8 .word 0x800019f8 +80001a0c: 8000fcbc .word 0x8000fcbc +80001a10: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x00000002 +80001a14: 000b2803 lw x16,0(x22) +80001a18: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x80000001 +80001a1c: 000b2783 lw x15,0(x22) +80001a20: 004b0b13 addi x22,x22,4 + +80001a24 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + aes32dsmi x17, x16, x15, 1 # perform operation +80001a24: 6ef808b3 aes32dsmi x17,x16,x15,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a28: 00012383 lw x7,0(x2) +80001a2c: 01138863 beq x7,x17,80001a3c +80001a30: 7a80646f jal x8,800081d8 +80001a34: 80001a24 .word 0x80001a24 +80001a38: 8000fd19 .word 0x8000fd19 +80001a3c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x00000002 +80001a40: 000b2303 lw x6,0(x22) +80001a44: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x7fffffff +80001a48: 000b2d83 lw x27,0(x22) +80001a4c: 004b0b13 addi x22,x22,4 + +80001a50 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + aes32dsmi x1, x6, x27, 1 # perform operation +80001a50: 6fb300b3 aes32dsmi x1,x6,x27,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a54: 00012383 lw x7,0(x2) +80001a58: 00138863 beq x7,x1,80001a68 +80001a5c: 77c0646f jal x8,800081d8 +80001a60: 80001a50 .word 0x80001a50 +80001a64: 8000fd76 .word 0x8000fd76 +80001a68: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x00000002 +80001a6c: 000b2f83 lw x31,0(x22) +80001a70: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0x7ffffffe +80001a74: 000b2203 lw x4,0(x22) +80001a78: 004b0b13 addi x22,x22,4 + +80001a7c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + aes32dsmi x15, x31, x4, 0 # perform operation +80001a7c: 2e4f87b3 aes32dsmi x15,x31,x4,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a80: 00012383 lw x7,0(x2) +80001a84: 00f38863 beq x7,x15,80001a94 +80001a88: 7500646f jal x8,800081d8 +80001a8c: 80001a7c .word 0x80001a7c +80001a90: 8000fdd3 .word 0x8000fdd3 +80001a94: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x00000002 +80001a98: 000b2e83 lw x29,0(x22) +80001a9c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0xffffffff +80001aa0: 000b2b83 lw x23,0(x22) +80001aa4: 004b0b13 addi x22,x22,4 + +80001aa8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes32dsmi x31, x29, x23, 0 # perform operation +80001aa8: 2f7e8fb3 aes32dsmi x31,x29,x23,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aac: 00012383 lw x7,0(x2) +80001ab0: 01f38863 beq x7,x31,80001ac0 +80001ab4: 7240646f jal x8,800081d8 +80001ab8: 80001aa8 .word 0x80001aa8 +80001abc: 8000fe30 .word 0x8000fe30 +80001ac0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x00000002 +80001ac4: 000b2283 lw x5,0(x22) +80001ac8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xfffffffe +80001acc: 000b2583 lw x11,0(x22) +80001ad0: 004b0b13 addi x22,x22,4 + +80001ad4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes32dsmi x28, x5, x11, 2 # perform operation +80001ad4: aeb28e33 aes32dsmi x28,x5,x11,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ad8: 00012383 lw x7,0(x2) +80001adc: 01c38863 beq x7,x28,80001aec +80001ae0: 6f80646f jal x8,800081d8 +80001ae4: 80001ad4 .word 0x80001ad4 +80001ae8: 8000fe8d .word 0x8000fe8d +80001aec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x00000002 +80001af0: 000b2f83 lw x31,0(x22) +80001af4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x5bbc8872 +80001af8: 000b2883 lw x17,0(x22) +80001afc: 004b0b13 addi x22,x22,4 + +80001b00 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + aes32dsmi x5, x31, x17, 2 # perform operation +80001b00: af1f82b3 aes32dsmi x5,x31,x17,0x2 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b04: 00012383 lw x7,0(x2) +80001b08: 00538863 beq x7,x5,80001b18 +80001b0c: 6cc0646f jal x8,800081d8 +80001b10: 80001b00 .word 0x80001b00 +80001b14: 8000feea .word 0x8000feea +80001b18: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x00000002 +80001b1c: 000b2203 lw x4,0(x22) +80001b20: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xaaaaaaaa +80001b24: 000b2503 lw x10,0(x22) +80001b28: 004b0b13 addi x22,x22,4 + +80001b2c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + aes32dsmi x9, x4, x10, 2 # perform operation +80001b2c: aea204b3 aes32dsmi x9,x4,x10,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b30: 00012383 lw x7,0(x2) +80001b34: 00938863 beq x7,x9,80001b44 +80001b38: 6a00646f jal x8,800081d8 +80001b3c: 80001b2c .word 0x80001b2c +80001b40: 8000ff47 .word 0x8000ff47 +80001b44: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x00000002 +80001b48: 000b2503 lw x10,0(x22) +80001b4c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x55555555 +80001b50: 000b2483 lw x9,0(x22) +80001b54: 004b0b13 addi x22,x22,4 + +80001b58 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + aes32dsmi x21, x10, x9, 0 # perform operation +80001b58: 2e950ab3 aes32dsmi x21,x10,x9,0x0 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b5c: 00012383 lw x7,0(x2) +80001b60: 01538863 beq x7,x21,80001b70 +80001b64: 6740646f jal x8,800081d8 +80001b68: 80001b58 .word 0x80001b58 +80001b6c: 8000ffa4 .word 0x8000ffa4 +80001b70: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x80000000 +80001b74: 000b2b83 lw x23,0(x22) +80001b78: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x00000000 +80001b7c: 000b2303 lw x6,0(x22) +80001b80: 004b0b13 addi x22,x22,4 + +80001b84 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + aes32dsmi x9, x23, x6, 0 # perform operation +80001b84: 2e6b84b3 aes32dsmi x9,x23,x6,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b88: 00012383 lw x7,0(x2) +80001b8c: 00938863 beq x7,x9,80001b9c +80001b90: 6480646f jal x8,800081d8 +80001b94: 80001b84 .word 0x80001b84 +80001b98: 80010001 .word 0x80010001 +80001b9c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x80000000 +80001ba0: 000b2f03 lw x30,0(x22) +80001ba4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x00000001 +80001ba8: 000b2703 lw x14,0(x22) +80001bac: 004b0b13 addi x22,x22,4 + +80001bb0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + aes32dsmi x11, x30, x14, 3 # perform operation +80001bb0: eeef05b3 aes32dsmi x11,x30,x14,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb4: 00012383 lw x7,0(x2) +80001bb8: 00b38863 beq x7,x11,80001bc8 +80001bbc: 61c0646f jal x8,800081d8 +80001bc0: 80001bb0 .word 0x80001bb0 +80001bc4: 8001005e .word 0x8001005e +80001bc8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x80000000 +80001bcc: 000b2283 lw x5,0(x22) +80001bd0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x00000002 +80001bd4: 000b2f83 lw x31,0(x22) +80001bd8: 004b0b13 addi x22,x22,4 + +80001bdc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + aes32dsmi x12, x5, x31, 1 # perform operation +80001bdc: 6ff28633 aes32dsmi x12,x5,x31,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be0: 00012383 lw x7,0(x2) +80001be4: 00c38863 beq x7,x12,80001bf4 +80001be8: 5f00646f jal x8,800081d8 +80001bec: 80001bdc .word 0x80001bdc +80001bf0: 800100bb .word 0x800100bb +80001bf4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x80000000 +80001bf8: 000b2803 lw x16,0(x22) +80001bfc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x80000000 +80001c00: 000b2f83 lw x31,0(x22) +80001c04: 004b0b13 addi x22,x22,4 + +80001c08 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + aes32dsmi x18, x16, x31, 1 # perform operation +80001c08: 6ff80933 aes32dsmi x18,x16,x31,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c0c: 00012383 lw x7,0(x2) +80001c10: 01238863 beq x7,x18,80001c20 +80001c14: 5c40646f jal x8,800081d8 +80001c18: 80001c08 .word 0x80001c08 +80001c1c: 80010118 .word 0x80010118 +80001c20: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x80000000 +80001c24: 000b2903 lw x18,0(x22) +80001c28: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x80000001 +80001c2c: 000b2883 lw x17,0(x22) +80001c30: 004b0b13 addi x22,x22,4 + +80001c34 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + aes32dsmi x28, x18, x17, 3 # perform operation +80001c34: ef190e33 aes32dsmi x28,x18,x17,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c38: 00012383 lw x7,0(x2) +80001c3c: 01c38863 beq x7,x28,80001c4c +80001c40: 5980646f jal x8,800081d8 +80001c44: 80001c34 .word 0x80001c34 +80001c48: 8001017c .word 0x8001017c +80001c4c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x80000000 +80001c50: 000b2583 lw x11,0(x22) +80001c54: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x7fffffff +80001c58: 000b2283 lw x5,0(x22) +80001c5c: 004b0b13 addi x22,x22,4 + +80001c60 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + aes32dsmi x25, x11, x5, 1 # perform operation +80001c60: 6e558cb3 aes32dsmi x25,x11,x5,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c64: 00012383 lw x7,0(x2) +80001c68: 01938863 beq x7,x25,80001c78 +80001c6c: 56c0646f jal x8,800081d8 +80001c70: 80001c60 .word 0x80001c60 +80001c74: 800101e0 .word 0x800101e0 +80001c78: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x80000000 +80001c7c: 000b2d83 lw x27,0(x22) +80001c80: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x7ffffffe +80001c84: 000b2783 lw x15,0(x22) +80001c88: 004b0b13 addi x22,x22,4 + +80001c8c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + aes32dsmi x12, x27, x15, 0 # perform operation +80001c8c: 2efd8633 aes32dsmi x12,x27,x15,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c90: 00012383 lw x7,0(x2) +80001c94: 00c38863 beq x7,x12,80001ca4 +80001c98: 5400646f jal x8,800081d8 +80001c9c: 80001c8c .word 0x80001c8c +80001ca0: 80010244 .word 0x80010244 +80001ca4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x80000000 +80001ca8: 000b2a83 lw x21,0(x22) +80001cac: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xffffffff +80001cb0: 000b2683 lw x13,0(x22) +80001cb4: 004b0b13 addi x22,x22,4 + +80001cb8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + aes32dsmi x25, x21, x13, 0 # perform operation +80001cb8: 2eda8cb3 aes32dsmi x25,x21,x13,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cbc: 00012383 lw x7,0(x2) +80001cc0: 01938863 beq x7,x25,80001cd0 +80001cc4: 5140646f jal x8,800081d8 +80001cc8: 80001cb8 .word 0x80001cb8 +80001ccc: 800102a8 .word 0x800102a8 +80001cd0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x80000000 +80001cd4: 000b2e03 lw x28,0(x22) +80001cd8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xfffffffe +80001cdc: 000b2903 lw x18,0(x22) +80001ce0: 004b0b13 addi x22,x22,4 + +80001ce4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + aes32dsmi x30, x28, x18, 0 # perform operation +80001ce4: 2f2e0f33 aes32dsmi x30,x28,x18,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001ce8: 00012383 lw x7,0(x2) +80001cec: 01e38863 beq x7,x30,80001cfc +80001cf0: 4e80646f jal x8,800081d8 +80001cf4: 80001ce4 .word 0x80001ce4 +80001cf8: 8001030c .word 0x8001030c +80001cfc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x80000000 +80001d00: 000b2f03 lw x30,0(x22) +80001d04: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x5bbc8872 +80001d08: 000b2083 lw x1,0(x22) +80001d0c: 004b0b13 addi x22,x22,4 + +80001d10 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + aes32dsmi x27, x30, x1, 0 # perform operation +80001d10: 2e1f0db3 aes32dsmi x27,x30,x1,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d14: 00012383 lw x7,0(x2) +80001d18: 01b38863 beq x7,x27,80001d28 +80001d1c: 4bc0646f jal x8,800081d8 +80001d20: 80001d10 .word 0x80001d10 +80001d24: 80010370 .word 0x80010370 +80001d28: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x80000000 +80001d2c: 000b2783 lw x15,0(x22) +80001d30: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0xaaaaaaaa +80001d34: 000b2883 lw x17,0(x22) +80001d38: 004b0b13 addi x22,x22,4 + +80001d3c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + aes32dsmi x23, x15, x17, 2 # perform operation +80001d3c: af178bb3 aes32dsmi x23,x15,x17,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d40: 00012383 lw x7,0(x2) +80001d44: 01738863 beq x7,x23,80001d54 +80001d48: 4900646f jal x8,800081d8 +80001d4c: 80001d3c .word 0x80001d3c +80001d50: 800103d4 .word 0x800103d4 +80001d54: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x80000000 +80001d58: 000b2e03 lw x28,0(x22) +80001d5c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x55555555 +80001d60: 000b2e83 lw x29,0(x22) +80001d64: 004b0b13 addi x22,x22,4 + +80001d68 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + aes32dsmi x25, x28, x29, 2 # perform operation +80001d68: afde0cb3 aes32dsmi x25,x28,x29,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d6c: 00012383 lw x7,0(x2) +80001d70: 01938863 beq x7,x25,80001d80 +80001d74: 4640646f jal x8,800081d8 +80001d78: 80001d68 .word 0x80001d68 +80001d7c: 80010438 .word 0x80010438 +80001d80: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x80000001 +80001d84: 000b2283 lw x5,0(x22) +80001d88: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x00000000 +80001d8c: 000b2883 lw x17,0(x22) +80001d90: 004b0b13 addi x22,x22,4 + +80001d94 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + aes32dsmi x21, x5, x17, 2 # perform operation +80001d94: af128ab3 aes32dsmi x21,x5,x17,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d98: 00012383 lw x7,0(x2) +80001d9c: 01538863 beq x7,x21,80001dac +80001da0: 4380646f jal x8,800081d8 +80001da4: 80001d94 .word 0x80001d94 +80001da8: 8001049c .word 0x8001049c +80001dac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x80000001 +80001db0: 000b2a03 lw x20,0(x22) +80001db4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x00000001 +80001db8: 000b2f03 lw x30,0(x22) +80001dbc: 004b0b13 addi x22,x22,4 + +80001dc0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + aes32dsmi x26, x20, x30, 1 # perform operation +80001dc0: 6fea0d33 aes32dsmi x26,x20,x30,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc4: 00012383 lw x7,0(x2) +80001dc8: 01a38863 beq x7,x26,80001dd8 +80001dcc: 40c0646f jal x8,800081d8 +80001dd0: 80001dc0 .word 0x80001dc0 +80001dd4: 800104f9 .word 0x800104f9 +80001dd8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x80000001 +80001ddc: 000b2283 lw x5,0(x22) +80001de0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x00000002 +80001de4: 000b2783 lw x15,0(x22) +80001de8: 004b0b13 addi x22,x22,4 + +80001dec : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + aes32dsmi x17, x5, x15, 2 # perform operation +80001dec: aef288b3 aes32dsmi x17,x5,x15,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df0: 00012383 lw x7,0(x2) +80001df4: 01138863 beq x7,x17,80001e04 +80001df8: 3e00646f jal x8,800081d8 +80001dfc: 80001dec .word 0x80001dec +80001e00: 80010556 .word 0x80010556 +80001e04: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x80000001 +80001e08: 000b2603 lw x12,0(x22) +80001e0c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x80000000 +80001e10: 000b2903 lw x18,0(x22) +80001e14: 004b0b13 addi x22,x22,4 + +80001e18 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + aes32dsmi x4, x12, x18, 3 # perform operation +80001e18: ef260233 aes32dsmi x4,x12,x18,0x3 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e1c: 00012383 lw x7,0(x2) +80001e20: 00438863 beq x7,x4,80001e30 +80001e24: 3b40646f jal x8,800081d8 +80001e28: 80001e18 .word 0x80001e18 +80001e2c: 800105b3 .word 0x800105b3 +80001e30: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x80000001 +80001e34: 000b2903 lw x18,0(x22) +80001e38: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x80000001 +80001e3c: 000b2603 lw x12,0(x22) +80001e40: 004b0b13 addi x22,x22,4 + +80001e44 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + aes32dsmi x28, x18, x12, 2 # perform operation +80001e44: aec90e33 aes32dsmi x28,x18,x12,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e48: 00012383 lw x7,0(x2) +80001e4c: 01c38863 beq x7,x28,80001e5c +80001e50: 3880646f jal x8,800081d8 +80001e54: 80001e44 .word 0x80001e44 +80001e58: 80010617 .word 0x80010617 +80001e5c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x80000001 +80001e60: 000b2883 lw x17,0(x22) +80001e64: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x7fffffff +80001e68: 000b2283 lw x5,0(x22) +80001e6c: 004b0b13 addi x22,x22,4 + +80001e70 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + aes32dsmi x14, x17, x5, 1 # perform operation +80001e70: 6e588733 aes32dsmi x14,x17,x5,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e74: 00012383 lw x7,0(x2) +80001e78: 00e38863 beq x7,x14,80001e88 +80001e7c: 35c0646f jal x8,800081d8 +80001e80: 80001e70 .word 0x80001e70 +80001e84: 8001067b .word 0x8001067b +80001e88: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x80000001 +80001e8c: 000b2203 lw x4,0(x22) +80001e90: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x7ffffffe +80001e94: 000b2a83 lw x21,0(x22) +80001e98: 004b0b13 addi x22,x22,4 + +80001e9c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + aes32dsmi x5, x4, x21, 3 # perform operation +80001e9c: ef5202b3 aes32dsmi x5,x4,x21,0x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea0: 00012383 lw x7,0(x2) +80001ea4: 00538863 beq x7,x5,80001eb4 +80001ea8: 3300646f jal x8,800081d8 +80001eac: 80001e9c .word 0x80001e9c +80001eb0: 800106df .word 0x800106df +80001eb4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x80000001 +80001eb8: 000b2303 lw x6,0(x22) +80001ebc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xffffffff +80001ec0: 000b2683 lw x13,0(x22) +80001ec4: 004b0b13 addi x22,x22,4 + +80001ec8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + aes32dsmi x21, x6, x13, 0 # perform operation +80001ec8: 2ed30ab3 aes32dsmi x21,x6,x13,0x0 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ecc: 00012383 lw x7,0(x2) +80001ed0: 01538863 beq x7,x21,80001ee0 +80001ed4: 3040646f jal x8,800081d8 +80001ed8: 80001ec8 .word 0x80001ec8 +80001edc: 80010743 .word 0x80010743 +80001ee0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x80000001 +80001ee4: 000b2c83 lw x25,0(x22) +80001ee8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xfffffffe +80001eec: 000b2603 lw x12,0(x22) +80001ef0: 004b0b13 addi x22,x22,4 + +80001ef4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + aes32dsmi x28, x25, x12, 0 # perform operation +80001ef4: 2ecc8e33 aes32dsmi x28,x25,x12,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ef8: 00012383 lw x7,0(x2) +80001efc: 01c38863 beq x7,x28,80001f0c +80001f00: 2d80646f jal x8,800081d8 +80001f04: 80001ef4 .word 0x80001ef4 +80001f08: 800107a7 .word 0x800107a7 +80001f0c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x80000001 +80001f10: 000b2503 lw x10,0(x22) +80001f14: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x5bbc8872 +80001f18: 000b2f83 lw x31,0(x22) +80001f1c: 004b0b13 addi x22,x22,4 + +80001f20 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + aes32dsmi x16, x10, x31, 2 # perform operation +80001f20: aff50833 aes32dsmi x16,x10,x31,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f24: 00012383 lw x7,0(x2) +80001f28: 01038863 beq x7,x16,80001f38 +80001f2c: 2ac0646f jal x8,800081d8 +80001f30: 80001f20 .word 0x80001f20 +80001f34: 8001080b .word 0x8001080b +80001f38: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x80000001 +80001f3c: 000b2603 lw x12,0(x22) +80001f40: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0xaaaaaaaa +80001f44: 000b2083 lw x1,0(x22) +80001f48: 004b0b13 addi x22,x22,4 + +80001f4c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + aes32dsmi x3, x12, x1, 1 # perform operation +80001f4c: 6e1601b3 aes32dsmi x3,x12,x1,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f50: 00012383 lw x7,0(x2) +80001f54: 00338863 beq x7,x3,80001f64 +80001f58: 2800646f jal x8,800081d8 +80001f5c: 80001f4c .word 0x80001f4c +80001f60: 8001086f .word 0x8001086f +80001f64: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x80000001 +80001f68: 000b2783 lw x15,0(x22) +80001f6c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x55555555 +80001f70: 000b2183 lw x3,0(x22) +80001f74: 004b0b13 addi x22,x22,4 + +80001f78 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + aes32dsmi x14, x15, x3, 1 # perform operation +80001f78: 6e378733 aes32dsmi x14,x15,x3,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f7c: 00012383 lw x7,0(x2) +80001f80: 00e38863 beq x7,x14,80001f90 +80001f84: 2540646f jal x8,800081d8 +80001f88: 80001f78 .word 0x80001f78 +80001f8c: 800108d3 .word 0x800108d3 +80001f90: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x7fffffff +80001f94: 000b2603 lw x12,0(x22) +80001f98: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x00000000 +80001f9c: 000b2983 lw x19,0(x22) +80001fa0: 004b0b13 addi x22,x22,4 + +80001fa4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + aes32dsmi x26, x12, x19, 2 # perform operation +80001fa4: af360d33 aes32dsmi x26,x12,x19,0x2 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fa8: 00012383 lw x7,0(x2) +80001fac: 01a38863 beq x7,x26,80001fbc +80001fb0: 2280646f jal x8,800081d8 +80001fb4: 80001fa4 .word 0x80001fa4 +80001fb8: 80010937 .word 0x80010937 +80001fbc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x7fffffff +80001fc0: 000b2083 lw x1,0(x22) +80001fc4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x00000001 +80001fc8: 000b2703 lw x14,0(x22) +80001fcc: 004b0b13 addi x22,x22,4 + +80001fd0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + aes32dsmi x25, x1, x14, 1 # perform operation +80001fd0: 6ee08cb3 aes32dsmi x25,x1,x14,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd4: 00012383 lw x7,0(x2) +80001fd8: 01938863 beq x7,x25,80001fe8 +80001fdc: 1fc0646f jal x8,800081d8 +80001fe0: 80001fd0 .word 0x80001fd0 +80001fe4: 80010994 .word 0x80010994 +80001fe8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x7fffffff +80001fec: 000b2783 lw x15,0(x22) +80001ff0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x00000002 +80001ff4: 000b2e03 lw x28,0(x22) +80001ff8: 004b0b13 addi x22,x22,4 + +80001ffc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + aes32dsmi x30, x15, x28, 2 # perform operation +80001ffc: afc78f33 aes32dsmi x30,x15,x28,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002000: 00012383 lw x7,0(x2) +80002004: 01e38863 beq x7,x30,80002014 +80002008: 1d00646f jal x8,800081d8 +8000200c: 80001ffc .word 0x80001ffc +80002010: 800109f1 .word 0x800109f1 +80002014: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x7fffffff +80002018: 000b2883 lw x17,0(x22) +8000201c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x80000000 +80002020: 000b2a03 lw x20,0(x22) +80002024: 004b0b13 addi x22,x22,4 + +80002028 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + aes32dsmi x6, x17, x20, 0 # perform operation +80002028: 2f488333 aes32dsmi x6,x17,x20,0x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000202c: 00012383 lw x7,0(x2) +80002030: 00638863 beq x7,x6,80002040 +80002034: 1a40646f jal x8,800081d8 +80002038: 80002028 .word 0x80002028 +8000203c: 80010a4e .word 0x80010a4e +80002040: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x7fffffff +80002044: 000b2c03 lw x24,0(x22) +80002048: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x80000001 +8000204c: 000b2703 lw x14,0(x22) +80002050: 004b0b13 addi x22,x22,4 + +80002054 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + aes32dsmi x13, x24, x14, 2 # perform operation +80002054: aeec06b3 aes32dsmi x13,x24,x14,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002058: 00012383 lw x7,0(x2) +8000205c: 00d38863 beq x7,x13,8000206c +80002060: 1780646f jal x8,800081d8 +80002064: 80002054 .word 0x80002054 +80002068: 80010ab2 .word 0x80010ab2 +8000206c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x7fffffff +80002070: 000b2303 lw x6,0(x22) +80002074: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x7fffffff +80002078: 000b2583 lw x11,0(x22) +8000207c: 004b0b13 addi x22,x22,4 + +80002080 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + aes32dsmi x12, x6, x11, 3 # perform operation +80002080: eeb30633 aes32dsmi x12,x6,x11,0x3 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002084: 00012383 lw x7,0(x2) +80002088: 00c38863 beq x7,x12,80002098 +8000208c: 14c0646f jal x8,800081d8 +80002090: 80002080 .word 0x80002080 +80002094: 80010b16 .word 0x80010b16 +80002098: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x7fffffff +8000209c: 000b2503 lw x10,0(x22) +800020a0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x7ffffffe +800020a4: 000b2b83 lw x23,0(x22) +800020a8: 004b0b13 addi x22,x22,4 + +800020ac : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + aes32dsmi x3, x10, x23, 3 # perform operation +800020ac: ef7501b3 aes32dsmi x3,x10,x23,0x3 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b0: 00012383 lw x7,0(x2) +800020b4: 00338863 beq x7,x3,800020c4 +800020b8: 1200646f jal x8,800081d8 +800020bc: 800020ac .word 0x800020ac +800020c0: 80010b7a .word 0x80010b7a +800020c4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x7fffffff +800020c8: 000b2e83 lw x29,0(x22) +800020cc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xffffffff +800020d0: 000b2203 lw x4,0(x22) +800020d4: 004b0b13 addi x22,x22,4 + +800020d8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + aes32dsmi x13, x29, x4, 3 # perform operation +800020d8: ee4e86b3 aes32dsmi x13,x29,x4,0x3 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020dc: 00012383 lw x7,0(x2) +800020e0: 00d38863 beq x7,x13,800020f0 +800020e4: 0f40646f jal x8,800081d8 +800020e8: 800020d8 .word 0x800020d8 +800020ec: 80010bde .word 0x80010bde +800020f0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x7fffffff +800020f4: 000b2683 lw x13,0(x22) +800020f8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0xfffffffe +800020fc: 000b2303 lw x6,0(x22) +80002100: 004b0b13 addi x22,x22,4 + +80002104 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + aes32dsmi x29, x13, x6, 2 # perform operation +80002104: ae668eb3 aes32dsmi x29,x13,x6,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002108: 00012383 lw x7,0(x2) +8000210c: 01d38863 beq x7,x29,8000211c +80002110: 0c80646f jal x8,800081d8 +80002114: 80002104 .word 0x80002104 +80002118: 80010c42 .word 0x80010c42 +8000211c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x7fffffff +80002120: 000b2c83 lw x25,0(x22) +80002124: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x5bbc8872 +80002128: 000b2683 lw x13,0(x22) +8000212c: 004b0b13 addi x22,x22,4 + +80002130 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + aes32dsmi x31, x25, x13, 0 # perform operation +80002130: 2edc8fb3 aes32dsmi x31,x25,x13,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002134: 00012383 lw x7,0(x2) +80002138: 01f38863 beq x7,x31,80002148 +8000213c: 09c0646f jal x8,800081d8 +80002140: 80002130 .word 0x80002130 +80002144: 80010ca6 .word 0x80010ca6 +80002148: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x7fffffff +8000214c: 000b2883 lw x17,0(x22) +80002150: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xaaaaaaaa +80002154: 000b2703 lw x14,0(x22) +80002158: 004b0b13 addi x22,x22,4 + +8000215c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + aes32dsmi x9, x17, x14, 2 # perform operation +8000215c: aee884b3 aes32dsmi x9,x17,x14,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002160: 00012383 lw x7,0(x2) +80002164: 00938863 beq x7,x9,80002174 +80002168: 0700646f jal x8,800081d8 +8000216c: 8000215c .word 0x8000215c +80002170: 80010d0a .word 0x80010d0a +80002174: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x7fffffff +80002178: 000b2f03 lw x30,0(x22) +8000217c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x55555555 +80002180: 000b2883 lw x17,0(x22) +80002184: 004b0b13 addi x22,x22,4 + +80002188 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + aes32dsmi x24, x30, x17, 0 # perform operation +80002188: 2f1f0c33 aes32dsmi x24,x30,x17,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000218c: 00012383 lw x7,0(x2) +80002190: 01838863 beq x7,x24,800021a0 +80002194: 0440646f jal x8,800081d8 +80002198: 80002188 .word 0x80002188 +8000219c: 80010d6e .word 0x80010d6e +800021a0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x7ffffffe +800021a4: 000b2503 lw x10,0(x22) +800021a8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x00000000 +800021ac: 000b2883 lw x17,0(x22) +800021b0: 004b0b13 addi x22,x22,4 + +800021b4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + aes32dsmi x15, x10, x17, 0 # perform operation +800021b4: 2f1507b3 aes32dsmi x15,x10,x17,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021b8: 00012383 lw x7,0(x2) +800021bc: 00f38863 beq x7,x15,800021cc +800021c0: 0180646f jal x8,800081d8 +800021c4: 800021b4 .word 0x800021b4 +800021c8: 80010dd2 .word 0x80010dd2 +800021cc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x7ffffffe +800021d0: 000b2783 lw x15,0(x22) +800021d4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x00000001 +800021d8: 000b2a03 lw x20,0(x22) +800021dc: 004b0b13 addi x22,x22,4 + +800021e0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + aes32dsmi x30, x15, x20, 1 # perform operation +800021e0: 6f478f33 aes32dsmi x30,x15,x20,0x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e4: 00012383 lw x7,0(x2) +800021e8: 01e38863 beq x7,x30,800021f8 +800021ec: 7ed0546f jal x8,800081d8 +800021f0: 800021e0 .word 0x800021e0 +800021f4: 80010e2f .word 0x80010e2f +800021f8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x7ffffffe +800021fc: 000b2883 lw x17,0(x22) +80002200: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x00000002 +80002204: 000b2603 lw x12,0(x22) +80002208: 004b0b13 addi x22,x22,4 + +8000220c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + aes32dsmi x29, x17, x12, 2 # perform operation +8000220c: aec88eb3 aes32dsmi x29,x17,x12,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002210: 00012383 lw x7,0(x2) +80002214: 01d38863 beq x7,x29,80002224 +80002218: 7c10546f jal x8,800081d8 +8000221c: 8000220c .word 0x8000220c +80002220: 80010e8c .word 0x80010e8c +80002224: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x7ffffffe +80002228: 000b2183 lw x3,0(x22) +8000222c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x80000000 +80002230: 000b2e03 lw x28,0(x22) +80002234: 004b0b13 addi x22,x22,4 + +80002238 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + aes32dsmi x26, x3, x28, 2 # perform operation +80002238: afc18d33 aes32dsmi x26,x3,x28,0x2 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000223c: 00012383 lw x7,0(x2) +80002240: 01a38863 beq x7,x26,80002250 +80002244: 7950546f jal x8,800081d8 +80002248: 80002238 .word 0x80002238 +8000224c: 80010ee9 .word 0x80010ee9 +80002250: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x7ffffffe +80002254: 000b2083 lw x1,0(x22) +80002258: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x80000001 +8000225c: 000b2683 lw x13,0(x22) +80002260: 004b0b13 addi x22,x22,4 + +80002264 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + aes32dsmi x27, x1, x13, 2 # perform operation +80002264: aed08db3 aes32dsmi x27,x1,x13,0x2 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002268: 00012383 lw x7,0(x2) +8000226c: 01b38863 beq x7,x27,8000227c +80002270: 7690546f jal x8,800081d8 +80002274: 80002264 .word 0x80002264 +80002278: 80010f4d .word 0x80010f4d +8000227c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x7ffffffe +80002280: 000b2f83 lw x31,0(x22) +80002284: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x7fffffff +80002288: 000b2903 lw x18,0(x22) +8000228c: 004b0b13 addi x22,x22,4 + +80002290 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + aes32dsmi x21, x31, x18, 2 # perform operation +80002290: af2f8ab3 aes32dsmi x21,x31,x18,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002294: 00012383 lw x7,0(x2) +80002298: 01538863 beq x7,x21,800022a8 +8000229c: 73d0546f jal x8,800081d8 +800022a0: 80002290 .word 0x80002290 +800022a4: 80010fb1 .word 0x80010fb1 +800022a8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x7ffffffe +800022ac: 000b2183 lw x3,0(x22) +800022b0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x7ffffffe +800022b4: 000b2303 lw x6,0(x22) +800022b8: 004b0b13 addi x22,x22,4 + +800022bc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + aes32dsmi x25, x3, x6, 1 # perform operation +800022bc: 6e618cb3 aes32dsmi x25,x3,x6,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c0: 00012383 lw x7,0(x2) +800022c4: 01938863 beq x7,x25,800022d4 +800022c8: 7110546f jal x8,800081d8 +800022cc: 800022bc .word 0x800022bc +800022d0: 80011015 .word 0x80011015 +800022d4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x7ffffffe +800022d8: 000b2983 lw x19,0(x22) +800022dc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xffffffff +800022e0: 000b2583 lw x11,0(x22) +800022e4: 004b0b13 addi x22,x22,4 + +800022e8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + aes32dsmi x3, x19, x11, 1 # perform operation +800022e8: 6eb981b3 aes32dsmi x3,x19,x11,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022ec: 00012383 lw x7,0(x2) +800022f0: 00338863 beq x7,x3,80002300 +800022f4: 6e50546f jal x8,800081d8 +800022f8: 800022e8 .word 0x800022e8 +800022fc: 80011079 .word 0x80011079 +80002300: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x7ffffffe +80002304: 000b2283 lw x5,0(x22) +80002308: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs2: x25 = 0xfffffffe +8000230c: 000b2c83 lw x25,0(x22) +80002310: 004b0b13 addi x22,x22,4 + +80002314 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + aes32dsmi x28, x5, x25, 1 # perform operation +80002314: 6f928e33 aes32dsmi x28,x5,x25,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002318: 00012383 lw x7,0(x2) +8000231c: 01c38863 beq x7,x28,8000232c +80002320: 6b90546f jal x8,800081d8 +80002324: 80002314 .word 0x80002314 +80002328: 800110dd .word 0x800110dd +8000232c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x7ffffffe +80002330: 000b2303 lw x6,0(x22) +80002334: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x5bbc8872 +80002338: 000b2e83 lw x29,0(x22) +8000233c: 004b0b13 addi x22,x22,4 + +80002340 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + aes32dsmi x26, x6, x29, 0 # perform operation +80002340: 2fd30d33 aes32dsmi x26,x6,x29,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002344: 00012383 lw x7,0(x2) +80002348: 01a38863 beq x7,x26,80002358 +8000234c: 68d0546f jal x8,800081d8 +80002350: 80002340 .word 0x80002340 +80002354: 80011141 .word 0x80011141 +80002358: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x7ffffffe +8000235c: 000b2883 lw x17,0(x22) +80002360: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0xaaaaaaaa +80002364: 000b2f83 lw x31,0(x22) +80002368: 004b0b13 addi x22,x22,4 + +8000236c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + aes32dsmi x29, x17, x31, 3 # perform operation +8000236c: eff88eb3 aes32dsmi x29,x17,x31,0x3 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002370: 00012383 lw x7,0(x2) +80002374: 01d38863 beq x7,x29,80002384 +80002378: 6610546f jal x8,800081d8 +8000237c: 8000236c .word 0x8000236c +80002380: 800111a5 .word 0x800111a5 +80002384: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x7ffffffe +80002388: 000b2b83 lw x23,0(x22) +8000238c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x55555555 +80002390: 000b2a83 lw x21,0(x22) +80002394: 004b0b13 addi x22,x22,4 + +80002398 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + aes32dsmi x28, x23, x21, 0 # perform operation +80002398: 2f5b8e33 aes32dsmi x28,x23,x21,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +8000239c: 00012383 lw x7,0(x2) +800023a0: 01c38863 beq x7,x28,800023b0 +800023a4: 6350546f jal x8,800081d8 +800023a8: 80002398 .word 0x80002398 +800023ac: 80011209 .word 0x80011209 +800023b0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0xffffffff +800023b4: 000b2083 lw x1,0(x22) +800023b8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0x00000000 +800023bc: 000b2203 lw x4,0(x22) +800023c0: 004b0b13 addi x22,x22,4 + +800023c4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes32dsmi x20, x1, x4, 2 # perform operation +800023c4: ae408a33 aes32dsmi x20,x1,x4,0x2 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023c8: 00012383 lw x7,0(x2) +800023cc: 01438863 beq x7,x20,800023dc +800023d0: 6090546f jal x8,800081d8 +800023d4: 800023c4 .word 0x800023c4 +800023d8: 8001126d .word 0x8001126d +800023dc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xffffffff +800023e0: 000b2483 lw x9,0(x22) +800023e4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x00000001 +800023e8: 000b2c03 lw x24,0(x22) +800023ec: 004b0b13 addi x22,x22,4 + +800023f0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes32dsmi x28, x9, x24, 0 # perform operation +800023f0: 2f848e33 aes32dsmi x28,x9,x24,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f4: 00012383 lw x7,0(x2) +800023f8: 01c38863 beq x7,x28,80002408 +800023fc: 5dd0546f jal x8,800081d8 +80002400: 800023f0 .word 0x800023f0 +80002404: 800112ca .word 0x800112ca +80002408: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xffffffff +8000240c: 000b2803 lw x16,0(x22) +80002410: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x00000002 +80002414: 000b2883 lw x17,0(x22) +80002418: 004b0b13 addi x22,x22,4 + +8000241c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes32dsmi x31, x16, x17, 0 # perform operation +8000241c: 2f180fb3 aes32dsmi x31,x16,x17,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002420: 00012383 lw x7,0(x2) +80002424: 01f38863 beq x7,x31,80002434 +80002428: 5b10546f jal x8,800081d8 +8000242c: 8000241c .word 0x8000241c +80002430: 80011327 .word 0x80011327 +80002434: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xffffffff +80002438: 000b2703 lw x14,0(x22) +8000243c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x80000000 +80002440: 000b2b83 lw x23,0(x22) +80002444: 004b0b13 addi x22,x22,4 + +80002448 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + aes32dsmi x18, x14, x23, 3 # perform operation +80002448: ef770933 aes32dsmi x18,x14,x23,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000244c: 00012383 lw x7,0(x2) +80002450: 01238863 beq x7,x18,80002460 +80002454: 5850546f jal x8,800081d8 +80002458: 80002448 .word 0x80002448 +8000245c: 80011384 .word 0x80011384 +80002460: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xffffffff +80002464: 000b2783 lw x15,0(x22) +80002468: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x80000001 +8000246c: 000b2a83 lw x21,0(x22) +80002470: 004b0b13 addi x22,x22,4 + +80002474 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + aes32dsmi x13, x15, x21, 0 # perform operation +80002474: 2f5786b3 aes32dsmi x13,x15,x21,0x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002478: 00012383 lw x7,0(x2) +8000247c: 00d38863 beq x7,x13,8000248c +80002480: 5590546f jal x8,800081d8 +80002484: 80002474 .word 0x80002474 +80002488: 800113e8 .word 0x800113e8 +8000248c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xffffffff +80002490: 000b2183 lw x3,0(x22) +80002494: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x7fffffff +80002498: 000b2503 lw x10,0(x22) +8000249c: 004b0b13 addi x22,x22,4 + +800024a0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + aes32dsmi x6, x3, x10, 0 # perform operation +800024a0: 2ea18333 aes32dsmi x6,x3,x10,0x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a4: 00012383 lw x7,0(x2) +800024a8: 00638863 beq x7,x6,800024b8 +800024ac: 52d0546f jal x8,800081d8 +800024b0: 800024a0 .word 0x800024a0 +800024b4: 8001144c .word 0x8001144c +800024b8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0xffffffff +800024bc: 000b2683 lw x13,0(x22) +800024c0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x7ffffffe +800024c4: 000b2083 lw x1,0(x22) +800024c8: 004b0b13 addi x22,x22,4 + +800024cc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + aes32dsmi x3, x13, x1, 1 # perform operation +800024cc: 6e1681b3 aes32dsmi x3,x13,x1,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d0: 00012383 lw x7,0(x2) +800024d4: 00338863 beq x7,x3,800024e4 +800024d8: 5010546f jal x8,800081d8 +800024dc: 800024cc .word 0x800024cc +800024e0: 800114b0 .word 0x800114b0 +800024e4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xffffffff +800024e8: 000b2b83 lw x23,0(x22) +800024ec: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0xffffffff +800024f0: 000b2e83 lw x29,0(x22) +800024f4: 004b0b13 addi x22,x22,4 + +800024f8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes32dsmi x17, x23, x29, 2 # perform operation +800024f8: afdb88b3 aes32dsmi x17,x23,x29,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024fc: 00012383 lw x7,0(x2) +80002500: 01138863 beq x7,x17,80002510 +80002504: 4d50546f jal x8,800081d8 +80002508: 800024f8 .word 0x800024f8 +8000250c: 80011514 .word 0x80011514 +80002510: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xffffffff +80002514: 000b2b83 lw x23,0(x22) +80002518: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xfffffffe +8000251c: 000b2603 lw x12,0(x22) +80002520: 004b0b13 addi x22,x22,4 + +80002524 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes32dsmi x16, x23, x12, 3 # perform operation +80002524: eecb8833 aes32dsmi x16,x23,x12,0x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002528: 00012383 lw x7,0(x2) +8000252c: 01038863 beq x7,x16,8000253c +80002530: 4a90546f jal x8,800081d8 +80002534: 80002524 .word 0x80002524 +80002538: 80011578 .word 0x80011578 +8000253c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xffffffff +80002540: 000b2883 lw x17,0(x22) +80002544: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x5bbc8872 +80002548: 000b2683 lw x13,0(x22) +8000254c: 004b0b13 addi x22,x22,4 + +80002550 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + aes32dsmi x21, x17, x13, 2 # perform operation +80002550: aed88ab3 aes32dsmi x21,x17,x13,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002554: 00012383 lw x7,0(x2) +80002558: 01538863 beq x7,x21,80002568 +8000255c: 47d0546f jal x8,800081d8 +80002560: 80002550 .word 0x80002550 +80002564: 800115dc .word 0x800115dc +80002568: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0xffffffff +8000256c: 000b2203 lw x4,0(x22) +80002570: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0xaaaaaaaa +80002574: 000b2f83 lw x31,0(x22) +80002578: 004b0b13 addi x22,x22,4 + +8000257c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + aes32dsmi x23, x4, x31, 3 # perform operation +8000257c: eff20bb3 aes32dsmi x23,x4,x31,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002580: 00012383 lw x7,0(x2) +80002584: 01738863 beq x7,x23,80002594 +80002588: 4510546f jal x8,800081d8 +8000258c: 8000257c .word 0x8000257c +80002590: 80011640 .word 0x80011640 +80002594: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xffffffff +80002598: 000b2f83 lw x31,0(x22) +8000259c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x55555555 +800025a0: 000b2483 lw x9,0(x22) +800025a4: 004b0b13 addi x22,x22,4 + +800025a8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + aes32dsmi x16, x31, x9, 2 # perform operation +800025a8: ae9f8833 aes32dsmi x16,x31,x9,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025ac: 00012383 lw x7,0(x2) +800025b0: 01038863 beq x7,x16,800025c0 +800025b4: 4250546f jal x8,800081d8 +800025b8: 800025a8 .word 0x800025a8 +800025bc: 800116a4 .word 0x800116a4 +800025c0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xfffffffe +800025c4: 000b2e83 lw x29,0(x22) +800025c8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x00000000 +800025cc: 000b2883 lw x17,0(x22) +800025d0: 004b0b13 addi x22,x22,4 + +800025d4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes32dsmi x4, x29, x17, 1 # perform operation +800025d4: 6f1e8233 aes32dsmi x4,x29,x17,0x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025d8: 00012383 lw x7,0(x2) +800025dc: 00438863 beq x7,x4,800025ec +800025e0: 3f90546f jal x8,800081d8 +800025e4: 800025d4 .word 0x800025d4 +800025e8: 80011708 .word 0x80011708 +800025ec: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0xfffffffe +800025f0: 000b2e03 lw x28,0(x22) +800025f4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x00000001 +800025f8: 000b2d83 lw x27,0(x22) +800025fc: 004b0b13 addi x22,x22,4 + +80002600 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes32dsmi x15, x28, x27, 3 # perform operation +80002600: efbe07b3 aes32dsmi x15,x28,x27,0x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002604: 00012383 lw x7,0(x2) +80002608: 00f38863 beq x7,x15,80002618 +8000260c: 3cd0546f jal x8,800081d8 +80002610: 80002600 .word 0x80002600 +80002614: 80011765 .word 0x80011765 +80002618: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xfffffffe +8000261c: 000b2983 lw x19,0(x22) +80002620: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x00000002 +80002624: 000b2d03 lw x26,0(x22) +80002628: 004b0b13 addi x22,x22,4 + +8000262c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes32dsmi x20, x19, x26, 3 # perform operation +8000262c: efa98a33 aes32dsmi x20,x19,x26,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002630: 00012383 lw x7,0(x2) +80002634: 01438863 beq x7,x20,80002644 +80002638: 3a10546f jal x8,800081d8 +8000263c: 8000262c .word 0x8000262c +80002640: 800117c2 .word 0x800117c2 +80002644: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xfffffffe +80002648: 000b2a03 lw x20,0(x22) +8000264c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x80000000 +80002650: 000b2703 lw x14,0(x22) +80002654: 004b0b13 addi x22,x22,4 + +80002658 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + aes32dsmi x12, x20, x14, 0 # perform operation +80002658: 2eea0633 aes32dsmi x12,x20,x14,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x12, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000265c: 00012383 lw x7,0(x2) +80002660: 00c38863 beq x7,x12,80002670 +80002664: 3750546f jal x8,800081d8 +80002668: 80002658 .word 0x80002658 +8000266c: 8001181f .word 0x8001181f +80002670: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0xfffffffe +80002674: 000b2c03 lw x24,0(x22) +80002678: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x80000001 +8000267c: 000b2683 lw x13,0(x22) +80002680: 004b0b13 addi x22,x22,4 + +80002684 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + aes32dsmi x17, x24, x13, 2 # perform operation +80002684: aedc08b3 aes32dsmi x17,x24,x13,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002688: 00012383 lw x7,0(x2) +8000268c: 01138863 beq x7,x17,8000269c +80002690: 3490546f jal x8,800081d8 +80002694: 80002684 .word 0x80002684 +80002698: 80011883 .word 0x80011883 +8000269c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xfffffffe +800026a0: 000b2903 lw x18,0(x22) +800026a4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x7fffffff +800026a8: 000b2e03 lw x28,0(x22) +800026ac: 004b0b13 addi x22,x22,4 + +800026b0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + aes32dsmi x11, x18, x28, 3 # perform operation +800026b0: efc905b3 aes32dsmi x11,x18,x28,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b4: 00012383 lw x7,0(x2) +800026b8: 00b38863 beq x7,x11,800026c8 +800026bc: 31d0546f jal x8,800081d8 +800026c0: 800026b0 .word 0x800026b0 +800026c4: 800118e7 .word 0x800118e7 +800026c8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0xfffffffe +800026cc: 000b2c03 lw x24,0(x22) +800026d0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x7ffffffe +800026d4: 000b2303 lw x6,0(x22) +800026d8: 004b0b13 addi x22,x22,4 + +800026dc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + aes32dsmi x28, x24, x6, 2 # perform operation +800026dc: ae6c0e33 aes32dsmi x28,x24,x6,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e0: 00012383 lw x7,0(x2) +800026e4: 01c38863 beq x7,x28,800026f4 +800026e8: 2f10546f jal x8,800081d8 +800026ec: 800026dc .word 0x800026dc +800026f0: 8001194b .word 0x8001194b +800026f4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0xfffffffe +800026f8: 000b2d83 lw x27,0(x22) +800026fc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xffffffff +80002700: 000b2583 lw x11,0(x22) +80002704: 004b0b13 addi x22,x22,4 + +80002708 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes32dsmi x5, x27, x11, 3 # perform operation +80002708: eebd82b3 aes32dsmi x5,x27,x11,0x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +8000270c: 00012383 lw x7,0(x2) +80002710: 00538863 beq x7,x5,80002720 +80002714: 2c50546f jal x8,800081d8 +80002718: 80002708 .word 0x80002708 +8000271c: 800119af .word 0x800119af +80002720: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xfffffffe +80002724: 000b2a83 lw x21,0(x22) +80002728: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0xfffffffe +8000272c: 000b2783 lw x15,0(x22) +80002730: 004b0b13 addi x22,x22,4 + +80002734 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes32dsmi x25, x21, x15, 3 # perform operation +80002734: eefa8cb3 aes32dsmi x25,x21,x15,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002738: 00012383 lw x7,0(x2) +8000273c: 01938863 beq x7,x25,8000274c +80002740: 2990546f jal x8,800081d8 +80002744: 80002734 .word 0x80002734 +80002748: 80011a13 .word 0x80011a13 +8000274c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0xfffffffe +80002750: 000b2c83 lw x25,0(x22) +80002754: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x5bbc8872 +80002758: 000b2683 lw x13,0(x22) +8000275c: 004b0b13 addi x22,x22,4 + +80002760 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + aes32dsmi x28, x25, x13, 1 # perform operation +80002760: 6edc8e33 aes32dsmi x28,x25,x13,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002764: 00012383 lw x7,0(x2) +80002768: 01c38863 beq x7,x28,80002778 +8000276c: 26d0546f jal x8,800081d8 +80002770: 80002760 .word 0x80002760 +80002774: 80011a77 .word 0x80011a77 +80002778: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xfffffffe +8000277c: 000b2803 lw x16,0(x22) +80002780: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0xaaaaaaaa +80002784: 000b2f83 lw x31,0(x22) +80002788: 004b0b13 addi x22,x22,4 + +8000278c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + aes32dsmi x21, x16, x31, 3 # perform operation +8000278c: eff80ab3 aes32dsmi x21,x16,x31,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002790: 00012383 lw x7,0(x2) +80002794: 01538863 beq x7,x21,800027a4 +80002798: 2410546f jal x8,800081d8 +8000279c: 8000278c .word 0x8000278c +800027a0: 80011adb .word 0x80011adb +800027a4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xfffffffe +800027a8: 000b2803 lw x16,0(x22) +800027ac: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x55555555 +800027b0: 000b2503 lw x10,0(x22) +800027b4: 004b0b13 addi x22,x22,4 + +800027b8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + aes32dsmi x25, x16, x10, 2 # perform operation +800027b8: aea80cb3 aes32dsmi x25,x16,x10,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027bc: 00012383 lw x7,0(x2) +800027c0: 01938863 beq x7,x25,800027d0 +800027c4: 2150546f jal x8,800081d8 +800027c8: 800027b8 .word 0x800027b8 +800027cc: 80011b3f .word 0x80011b3f +800027d0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x5bbc8872 +800027d4: 000b2d83 lw x27,0(x22) +800027d8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x00000000 +800027dc: 000b2b83 lw x23,0(x22) +800027e0: 004b0b13 addi x22,x22,4 + +800027e4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + aes32dsmi x16, x27, x23, 2 # perform operation +800027e4: af7d8833 aes32dsmi x16,x27,x23,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027e8: 00012383 lw x7,0(x2) +800027ec: 01038863 beq x7,x16,800027fc +800027f0: 1e90546f jal x8,800081d8 +800027f4: 800027e4 .word 0x800027e4 +800027f8: 80011ba3 .word 0x80011ba3 +800027fc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x5bbc8872 +80002800: 000b2f83 lw x31,0(x22) +80002804: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x00000001 +80002808: 000b2d83 lw x27,0(x22) +8000280c: 004b0b13 addi x22,x22,4 + +80002810 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + aes32dsmi x24, x31, x27, 0 # perform operation +80002810: 2fbf8c33 aes32dsmi x24,x31,x27,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002814: 00012383 lw x7,0(x2) +80002818: 01838863 beq x7,x24,80002828 +8000281c: 1bd0546f jal x8,800081d8 +80002820: 80002810 .word 0x80002810 +80002824: 80011c00 .word 0x80011c00 +80002828: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x5bbc8872 +8000282c: 000b2283 lw x5,0(x22) +80002830: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x00000002 +80002834: 000b2483 lw x9,0(x22) +80002838: 004b0b13 addi x22,x22,4 + +8000283c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + aes32dsmi x26, x5, x9, 1 # perform operation +8000283c: 6e928d33 aes32dsmi x26,x5,x9,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002840: 00012383 lw x7,0(x2) +80002844: 01a38863 beq x7,x26,80002854 +80002848: 1910546f jal x8,800081d8 +8000284c: 8000283c .word 0x8000283c +80002850: 80011c5d .word 0x80011c5d +80002854: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x5bbc8872 +80002858: 000b2a03 lw x20,0(x22) +8000285c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x80000000 +80002860: 000b2683 lw x13,0(x22) +80002864: 004b0b13 addi x22,x22,4 + +80002868 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + aes32dsmi x30, x20, x13, 2 # perform operation +80002868: aeda0f33 aes32dsmi x30,x20,x13,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000286c: 00012383 lw x7,0(x2) +80002870: 01e38863 beq x7,x30,80002880 +80002874: 1650546f jal x8,800081d8 +80002878: 80002868 .word 0x80002868 +8000287c: 80011cba .word 0x80011cba +80002880: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x5bbc8872 +80002884: 000b2803 lw x16,0(x22) +80002888: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x80000001 +8000288c: 000b2c03 lw x24,0(x22) +80002890: 004b0b13 addi x22,x22,4 + +80002894 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + aes32dsmi x6, x16, x24, 3 # perform operation +80002894: ef880333 aes32dsmi x6,x16,x24,0x3 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002898: 00012383 lw x7,0(x2) +8000289c: 00638863 beq x7,x6,800028ac +800028a0: 1390546f jal x8,800081d8 +800028a4: 80002894 .word 0x80002894 +800028a8: 80011d1e .word 0x80011d1e +800028ac: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x5bbc8872 +800028b0: 000b2c03 lw x24,0(x22) +800028b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x7fffffff +800028b8: 000b2983 lw x19,0(x22) +800028bc: 004b0b13 addi x22,x22,4 + +800028c0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + aes32dsmi x5, x24, x19, 3 # perform operation +800028c0: ef3c02b3 aes32dsmi x5,x24,x19,0x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c4: 00012383 lw x7,0(x2) +800028c8: 00538863 beq x7,x5,800028d8 +800028cc: 10d0546f jal x8,800081d8 +800028d0: 800028c0 .word 0x800028c0 +800028d4: 80011d82 .word 0x80011d82 +800028d8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x5bbc8872 +800028dc: 000b2b83 lw x23,0(x22) +800028e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x7ffffffe +800028e4: 000b2083 lw x1,0(x22) +800028e8: 004b0b13 addi x22,x22,4 + +800028ec : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + aes32dsmi x20, x23, x1, 3 # perform operation +800028ec: ee1b8a33 aes32dsmi x20,x23,x1,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f0: 00012383 lw x7,0(x2) +800028f4: 01438863 beq x7,x20,80002904 +800028f8: 0e10546f jal x8,800081d8 +800028fc: 800028ec .word 0x800028ec +80002900: 80011de6 .word 0x80011de6 +80002904: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x5bbc8872 +80002908: 000b2f03 lw x30,0(x22) +8000290c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0xffffffff +80002910: 000b2083 lw x1,0(x22) +80002914: 004b0b13 addi x22,x22,4 + +80002918 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + aes32dsmi x14, x30, x1, 1 # perform operation +80002918: 6e1f0733 aes32dsmi x14,x30,x1,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000291c: 00012383 lw x7,0(x2) +80002920: 00e38863 beq x7,x14,80002930 +80002924: 0b50546f jal x8,800081d8 +80002928: 80002918 .word 0x80002918 +8000292c: 80011e4a .word 0x80011e4a +80002930: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x5bbc8872 +80002934: 000b2d03 lw x26,0(x22) +80002938: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xfffffffe +8000293c: 000b2203 lw x4,0(x22) +80002940: 004b0b13 addi x22,x22,4 + +80002944 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + aes32dsmi x16, x26, x4, 2 # perform operation +80002944: ae4d0833 aes32dsmi x16,x26,x4,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002948: 00012383 lw x7,0(x2) +8000294c: 01038863 beq x7,x16,8000295c +80002950: 0890546f jal x8,800081d8 +80002954: 80002944 .word 0x80002944 +80002958: 80011eae .word 0x80011eae +8000295c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x5bbc8872 +80002960: 000b2a83 lw x21,0(x22) +80002964: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x5bbc8872 +80002968: 000b2883 lw x17,0(x22) +8000296c: 004b0b13 addi x22,x22,4 + +80002970 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + aes32dsmi x4, x21, x17, 1 # perform operation +80002970: 6f1a8233 aes32dsmi x4,x21,x17,0x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002974: 00012383 lw x7,0(x2) +80002978: 00438863 beq x7,x4,80002988 +8000297c: 05d0546f jal x8,800081d8 +80002980: 80002970 .word 0x80002970 +80002984: 80011f12 .word 0x80011f12 +80002988: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x5bbc8872 +8000298c: 000b2c03 lw x24,0(x22) +80002990: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xaaaaaaaa +80002994: 000b2903 lw x18,0(x22) +80002998: 004b0b13 addi x22,x22,4 + +8000299c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + aes32dsmi x21, x24, x18, 2 # perform operation +8000299c: af2c0ab3 aes32dsmi x21,x24,x18,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a0: 00012383 lw x7,0(x2) +800029a4: 01538863 beq x7,x21,800029b4 +800029a8: 0310546f jal x8,800081d8 +800029ac: 8000299c .word 0x8000299c +800029b0: 80011f76 .word 0x80011f76 +800029b4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x5bbc8872 +800029b8: 000b2e03 lw x28,0(x22) +800029bc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x55555555 +800029c0: 000b2083 lw x1,0(x22) +800029c4: 004b0b13 addi x22,x22,4 + +800029c8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + aes32dsmi x29, x28, x1, 2 # perform operation +800029c8: ae1e0eb3 aes32dsmi x29,x28,x1,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029cc: 00012383 lw x7,0(x2) +800029d0: 01d38863 beq x7,x29,800029e0 +800029d4: 0050546f jal x8,800081d8 +800029d8: 800029c8 .word 0x800029c8 +800029dc: 80011fda .word 0x80011fda +800029e0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xaaaaaaaa +800029e4: 000b2903 lw x18,0(x22) +800029e8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x00000000 +800029ec: 000b2303 lw x6,0(x22) +800029f0: 004b0b13 addi x22,x22,4 + +800029f4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + aes32dsmi x17, x18, x6, 2 # perform operation +800029f4: ae6908b3 aes32dsmi x17,x18,x6,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029f8: 00012383 lw x7,0(x2) +800029fc: 01138863 beq x7,x17,80002a0c +80002a00: 7d80546f jal x8,800081d8 +80002a04: 800029f4 .word 0x800029f4 +80002a08: 8001203e .word 0x8001203e +80002a0c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xaaaaaaaa +80002a10: 000b2e83 lw x29,0(x22) +80002a14: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x00000001 +80002a18: 000b2c03 lw x24,0(x22) +80002a1c: 004b0b13 addi x22,x22,4 + +80002a20 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + aes32dsmi x17, x29, x24, 1 # perform operation +80002a20: 6f8e88b3 aes32dsmi x17,x29,x24,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a24: 00012383 lw x7,0(x2) +80002a28: 01138863 beq x7,x17,80002a38 +80002a2c: 7ac0546f jal x8,800081d8 +80002a30: 80002a20 .word 0x80002a20 +80002a34: 8001209b .word 0x8001209b +80002a38: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xaaaaaaaa +80002a3c: 000b2f83 lw x31,0(x22) +80002a40: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x00000002 +80002a44: 000b2883 lw x17,0(x22) +80002a48: 004b0b13 addi x22,x22,4 + +80002a4c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + aes32dsmi x10, x31, x17, 1 # perform operation +80002a4c: 6f1f8533 aes32dsmi x10,x31,x17,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a50: 00012383 lw x7,0(x2) +80002a54: 00a38863 beq x7,x10,80002a64 +80002a58: 7800546f jal x8,800081d8 +80002a5c: 80002a4c .word 0x80002a4c +80002a60: 800120f8 .word 0x800120f8 +80002a64: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xaaaaaaaa +80002a68: 000b2a83 lw x21,0(x22) +80002a6c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x80000000 +80002a70: 000b2b83 lw x23,0(x22) +80002a74: 004b0b13 addi x22,x22,4 + +80002a78 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + aes32dsmi x20, x21, x23, 2 # perform operation +80002a78: af7a8a33 aes32dsmi x20,x21,x23,0x2 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a7c: 00012383 lw x7,0(x2) +80002a80: 01438863 beq x7,x20,80002a90 +80002a84: 7540546f jal x8,800081d8 +80002a88: 80002a78 .word 0x80002a78 +80002a8c: 80012155 .word 0x80012155 +80002a90: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xaaaaaaaa +80002a94: 000b2b83 lw x23,0(x22) +80002a98: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x80000001 +80002a9c: 000b2503 lw x10,0(x22) +80002aa0: 004b0b13 addi x22,x22,4 + +80002aa4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + aes32dsmi x16, x23, x10, 2 # perform operation +80002aa4: aeab8833 aes32dsmi x16,x23,x10,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aa8: 00012383 lw x7,0(x2) +80002aac: 01038863 beq x7,x16,80002abc +80002ab0: 7280546f jal x8,800081d8 +80002ab4: 80002aa4 .word 0x80002aa4 +80002ab8: 800121b9 .word 0x800121b9 +80002abc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0xaaaaaaaa +80002ac0: 000b2083 lw x1,0(x22) +80002ac4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x7fffffff +80002ac8: 000b2303 lw x6,0(x22) +80002acc: 004b0b13 addi x22,x22,4 + +80002ad0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + aes32dsmi x14, x1, x6, 1 # perform operation +80002ad0: 6e608733 aes32dsmi x14,x1,x6,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad4: 00012383 lw x7,0(x2) +80002ad8: 00e38863 beq x7,x14,80002ae8 +80002adc: 6fc0546f jal x8,800081d8 +80002ae0: 80002ad0 .word 0x80002ad0 +80002ae4: 8001221d .word 0x8001221d +80002ae8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0xaaaaaaaa +80002aec: 000b2283 lw x5,0(x22) +80002af0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x7ffffffe +80002af4: 000b2783 lw x15,0(x22) +80002af8: 004b0b13 addi x22,x22,4 + +80002afc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + aes32dsmi x14, x5, x15, 3 # perform operation +80002afc: eef28733 aes32dsmi x14,x5,x15,0x3 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b00: 00012383 lw x7,0(x2) +80002b04: 00e38863 beq x7,x14,80002b14 +80002b08: 6d00546f jal x8,800081d8 +80002b0c: 80002afc .word 0x80002afc +80002b10: 80012281 .word 0x80012281 +80002b14: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xaaaaaaaa +80002b18: 000b2703 lw x14,0(x22) +80002b1c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0xffffffff +80002b20: 000b2d83 lw x27,0(x22) +80002b24: 004b0b13 addi x22,x22,4 + +80002b28 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + aes32dsmi x13, x14, x27, 3 # perform operation +80002b28: efb706b3 aes32dsmi x13,x14,x27,0x3 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b2c: 00012383 lw x7,0(x2) +80002b30: 00d38863 beq x7,x13,80002b40 +80002b34: 6a40546f jal x8,800081d8 +80002b38: 80002b28 .word 0x80002b28 +80002b3c: 800122e5 .word 0x800122e5 +80002b40: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xaaaaaaaa +80002b44: 000b2803 lw x16,0(x22) +80002b48: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs2: x25 = 0xfffffffe +80002b4c: 000b2c83 lw x25,0(x22) +80002b50: 004b0b13 addi x22,x22,4 + +80002b54 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + aes32dsmi x17, x16, x25, 2 # perform operation +80002b54: af9808b3 aes32dsmi x17,x16,x25,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b58: 00012383 lw x7,0(x2) +80002b5c: 01138863 beq x7,x17,80002b6c +80002b60: 6780546f jal x8,800081d8 +80002b64: 80002b54 .word 0x80002b54 +80002b68: 80012349 .word 0x80012349 +80002b6c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0xaaaaaaaa +80002b70: 000b2683 lw x13,0(x22) +80002b74: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0x5bbc8872 +80002b78: 000b2c03 lw x24,0(x22) +80002b7c: 004b0b13 addi x22,x22,4 + +80002b80 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + aes32dsmi x16, x13, x24, 0 # perform operation +80002b80: 2f868833 aes32dsmi x16,x13,x24,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b84: 00012383 lw x7,0(x2) +80002b88: 01038863 beq x7,x16,80002b98 +80002b8c: 64c0546f jal x8,800081d8 +80002b90: 80002b80 .word 0x80002b80 +80002b94: 800123ad .word 0x800123ad +80002b98: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xaaaaaaaa +80002b9c: 000b2f83 lw x31,0(x22) +80002ba0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xaaaaaaaa +80002ba4: 000b2183 lw x3,0(x22) +80002ba8: 004b0b13 addi x22,x22,4 + +80002bac : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + aes32dsmi x28, x31, x3, 3 # perform operation +80002bac: ee3f8e33 aes32dsmi x28,x31,x3,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb0: 00012383 lw x7,0(x2) +80002bb4: 01c38863 beq x7,x28,80002bc4 +80002bb8: 6200546f jal x8,800081d8 +80002bbc: 80002bac .word 0x80002bac +80002bc0: 80012411 .word 0x80012411 +80002bc4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xaaaaaaaa +80002bc8: 000b2183 lw x3,0(x22) +80002bcc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x55555555 +80002bd0: 000b2603 lw x12,0(x22) +80002bd4: 004b0b13 addi x22,x22,4 + +80002bd8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + aes32dsmi x30, x3, x12, 0 # perform operation +80002bd8: 2ec18f33 aes32dsmi x30,x3,x12,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bdc: 00012383 lw x7,0(x2) +80002be0: 01e38863 beq x7,x30,80002bf0 +80002be4: 5f40546f jal x8,800081d8 +80002be8: 80002bd8 .word 0x80002bd8 +80002bec: 80012475 .word 0x80012475 +80002bf0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x55555555 +80002bf4: 000b2e83 lw x29,0(x22) +80002bf8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x00000000 +80002bfc: 000b2703 lw x14,0(x22) +80002c00: 004b0b13 addi x22,x22,4 + +80002c04 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + aes32dsmi x11, x29, x14, 3 # perform operation +80002c04: eeee85b3 aes32dsmi x11,x29,x14,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c08: 00012383 lw x7,0(x2) +80002c0c: 00b38863 beq x7,x11,80002c1c +80002c10: 5c80546f jal x8,800081d8 +80002c14: 80002c04 .word 0x80002c04 +80002c18: 800124d9 .word 0x800124d9 +80002c1c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x55555555 +80002c20: 000b2603 lw x12,0(x22) +80002c24: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0x00000001 +80002c28: 000b2b83 lw x23,0(x22) +80002c2c: 004b0b13 addi x22,x22,4 + +80002c30 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + aes32dsmi x3, x12, x23, 2 # perform operation +80002c30: af7601b3 aes32dsmi x3,x12,x23,0x2 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c34: 00012383 lw x7,0(x2) +80002c38: 00338863 beq x7,x3,80002c48 +80002c3c: 59c0546f jal x8,800081d8 +80002c40: 80002c30 .word 0x80002c30 +80002c44: 80012536 .word 0x80012536 +80002c48: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x55555555 +80002c4c: 000b2a83 lw x21,0(x22) +80002c50: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x00000002 +80002c54: 000b2483 lw x9,0(x22) +80002c58: 004b0b13 addi x22,x22,4 + +80002c5c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + aes32dsmi x5, x21, x9, 2 # perform operation +80002c5c: ae9a82b3 aes32dsmi x5,x21,x9,0x2 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c60: 00012383 lw x7,0(x2) +80002c64: 00538863 beq x7,x5,80002c74 +80002c68: 5700546f jal x8,800081d8 +80002c6c: 80002c5c .word 0x80002c5c +80002c70: 80012593 .word 0x80012593 +80002c74: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x55555555 +80002c78: 000b2803 lw x16,0(x22) +80002c7c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x80000000 +80002c80: 000b2a03 lw x20,0(x22) +80002c84: 004b0b13 addi x22,x22,4 + +80002c88 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + aes32dsmi x21, x16, x20, 1 # perform operation +80002c88: 6f480ab3 aes32dsmi x21,x16,x20,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c8c: 00012383 lw x7,0(x2) +80002c90: 01538863 beq x7,x21,80002ca0 +80002c94: 5440546f jal x8,800081d8 +80002c98: 80002c88 .word 0x80002c88 +80002c9c: 800125f0 .word 0x800125f0 +80002ca0: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x55555555 +80002ca4: 000b2e83 lw x29,0(x22) +80002ca8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x80000001 +80002cac: 000b2d03 lw x26,0(x22) +80002cb0: 004b0b13 addi x22,x22,4 + +80002cb4 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + aes32dsmi x11, x29, x26, 0 # perform operation +80002cb4: 2fae85b3 aes32dsmi x11,x29,x26,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cb8: 00012383 lw x7,0(x2) +80002cbc: 00b38863 beq x7,x11,80002ccc +80002cc0: 5180546f jal x8,800081d8 +80002cc4: 80002cb4 .word 0x80002cb4 +80002cc8: 80012654 .word 0x80012654 +80002ccc: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x55555555 +80002cd0: 000b2c83 lw x25,0(x22) +80002cd4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x7fffffff +80002cd8: 000b2583 lw x11,0(x22) +80002cdc: 004b0b13 addi x22,x22,4 + +80002ce0 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + aes32dsmi x23, x25, x11, 1 # perform operation +80002ce0: 6ebc8bb3 aes32dsmi x23,x25,x11,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce4: 00012383 lw x7,0(x2) +80002ce8: 01738863 beq x7,x23,80002cf8 +80002cec: 4ec0546f jal x8,800081d8 +80002cf0: 80002ce0 .word 0x80002ce0 +80002cf4: 800126b8 .word 0x800126b8 +80002cf8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x55555555 +80002cfc: 000b2603 lw x12,0(x22) +80002d00: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x7ffffffe +80002d04: 000b2f83 lw x31,0(x22) +80002d08: 004b0b13 addi x22,x22,4 + +80002d0c : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + aes32dsmi x30, x12, x31, 0 # perform operation +80002d0c: 2ff60f33 aes32dsmi x30,x12,x31,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d10: 00012383 lw x7,0(x2) +80002d14: 01e38863 beq x7,x30,80002d24 +80002d18: 4c00546f jal x8,800081d8 +80002d1c: 80002d0c .word 0x80002d0c +80002d20: 8001271c .word 0x8001271c +80002d24: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x55555555 +80002d28: 000b2903 lw x18,0(x22) +80002d2c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xffffffff +80002d30: 000b2a03 lw x20,0(x22) +80002d34: 004b0b13 addi x22,x22,4 + +80002d38 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + aes32dsmi x25, x18, x20, 0 # perform operation +80002d38: 2f490cb3 aes32dsmi x25,x18,x20,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d3c: 00012383 lw x7,0(x2) +80002d40: 01938863 beq x7,x25,80002d50 +80002d44: 4940546f jal x8,800081d8 +80002d48: 80002d38 .word 0x80002d38 +80002d4c: 80012780 .word 0x80012780 +80002d50: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x55555555 +80002d54: 000b2203 lw x4,0(x22) +80002d58: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xfffffffe +80002d5c: 000b2183 lw x3,0(x22) +80002d60: 004b0b13 addi x22,x22,4 + +80002d64 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + aes32dsmi x29, x4, x3, 3 # perform operation +80002d64: ee320eb3 aes32dsmi x29,x4,x3,0x3 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d68: 00012383 lw x7,0(x2) +80002d6c: 01d38863 beq x7,x29,80002d7c +80002d70: 4680546f jal x8,800081d8 +80002d74: 80002d64 .word 0x80002d64 +80002d78: 800127e4 .word 0x800127e4 +80002d7c: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x55555555 +80002d80: 000b2c83 lw x25,0(x22) +80002d84: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x5bbc8872 +80002d88: 000b2a83 lw x21,0(x22) +80002d8c: 004b0b13 addi x22,x22,4 + +80002d90 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + aes32dsmi x23, x25, x21, 3 # perform operation +80002d90: ef5c8bb3 aes32dsmi x23,x25,x21,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d94: 00012383 lw x7,0(x2) +80002d98: 01738863 beq x7,x23,80002da8 +80002d9c: 43c0546f jal x8,800081d8 +80002da0: 80002d90 .word 0x80002d90 +80002da4: 80012848 .word 0x80012848 +80002da8: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x55555555 +80002dac: 000b2783 lw x15,0(x22) +80002db0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0xaaaaaaaa +80002db4: 000b2e03 lw x28,0(x22) +80002db8: 004b0b13 addi x22,x22,4 + +80002dbc : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + aes32dsmi x20, x15, x28, 0 # perform operation +80002dbc: 2fc78a33 aes32dsmi x20,x15,x28,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc0: 00012383 lw x7,0(x2) +80002dc4: 01438863 beq x7,x20,80002dd4 +80002dc8: 4100546f jal x8,800081d8 +80002dcc: 80002dbc .word 0x80002dbc +80002dd0: 800128ac .word 0x800128ac +80002dd4: 00410113 addi x2,x2,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x55555555 +80002dd8: 000b2683 lw x13,0(x22) +80002ddc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x55555555 +80002de0: 000b2803 lw x16,0(x22) +80002de4: 004b0b13 addi x22,x22,4 + +80002de8 : +Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + aes32dsmi x1, x13, x16, 2 # perform operation +80002de8: af0680b3 aes32dsmi x1,x13,x16,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknd_aes32dsmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002dec: 00012383 lw x7,0(x2) +80002df0: 00138863 beq x7,x1,80002e00 +80002df4: 3e40546f jal x8,800081d8 +80002df8: 80002de8 .word 0x80002de8 +80002dfc: 80012910 .word 0x80012910 +80002e00: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0xfbd85457 +80002e04: 000b2003 lw x0,0(x22) +80002e08: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x579168ee +80002e0c: 000b2003 lw x0,0(x22) +80002e10: 004b0b13 addi x22,x22,4 + +80002e14 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b0: + aes32dsmi x18, x0, x0, 2 # perform operation +80002e14: ae000933 aes32dsmi x18,x0,x0,0x2 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b0, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b0_str) +80002e18: 00012383 lw x7,0(x2) +80002e1c: 01238863 beq x7,x18,80002e2c +80002e20: 3b80546f jal x8,800081d8 +80002e24: 80002e14 .word 0x80002e14 +80002e28: 80012974 .word 0x80012974 +80002e2c: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0xe6bbc56c +80002e30: 000b2083 lw x1,0(x22) +80002e34: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x1d8711aa +80002e38: 000b2083 lw x1,0(x22) +80002e3c: 004b0b13 addi x22,x22,4 + +80002e40 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b1: + aes32dsmi x31, x1, x1, 2 # perform operation +80002e40: ae108fb3 aes32dsmi x31,x1,x1,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b1, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b1_str) +80002e44: 00012383 lw x7,0(x2) +80002e48: 01f38863 beq x7,x31,80002e58 +80002e4c: 38c0546f jal x8,800081d8 +80002e50: 80002e40 .word 0x80002e40 +80002e54: 800129b1 .word 0x800129b1 +80002e58: 00410113 addi x2,x2,4 + + mv x30, x2 # switch signature pointer register to avoid conflict with test +80002e5c: 00010f13 addi x30,x2,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xb4e725b6 +80002e60: 000b2103 lw x2,0(x22) +80002e64: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x7b1035fa +80002e68: 000b2103 lw x2,0(x22) +80002e6c: 004b0b13 addi x22,x22,4 + +80002e70 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b2: + aes32dsmi x13, x2, x2, 0 # perform operation +80002e70: 2e2106b3 aes32dsmi x13,x2,x2,0x0 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b2, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b2_str) +80002e74: 000f2383 lw x7,0(x30) +80002e78: 00d38863 beq x7,x13,80002e88 +80002e7c: 35c0546f jal x8,800081d8 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 800129ee .word 0x800129ee +80002e88: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xbad4c8b6 +80002e8c: 000b2183 lw x3,0(x22) +80002e90: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x5639bbbd +80002e94: 000b2183 lw x3,0(x22) +80002e98: 004b0b13 addi x22,x22,4 + +80002e9c : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b3: + aes32dsmi x26, x3, x3, 0 # perform operation +80002e9c: 2e318d33 aes32dsmi x26,x3,x3,0x0 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b3, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b3_str) +80002ea0: 000f2383 lw x7,0(x30) +80002ea4: 01a38863 beq x7,x26,80002eb4 +80002ea8: 3300546f jal x8,800081d8 +80002eac: 80002e9c .word 0x80002e9c +80002eb0: 80012a2b .word 0x80012a2b +80002eb4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x79680130 +80002eb8: 000b2203 lw x4,0(x22) +80002ebc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xfca0d18c +80002ec0: 000b2203 lw x4,0(x22) +80002ec4: 004b0b13 addi x22,x22,4 + +80002ec8 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b4: + aes32dsmi x14, x4, x4, 2 # perform operation +80002ec8: ae420733 aes32dsmi x14,x4,x4,0x2 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b4, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b4_str) +80002ecc: 000f2383 lw x7,0(x30) +80002ed0: 00e38863 beq x7,x14,80002ee0 +80002ed4: 3040546f jal x8,800081d8 +80002ed8: 80002ec8 .word 0x80002ec8 +80002edc: 80012a68 .word 0x80012a68 +80002ee0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x6a578480 +80002ee4: 000b2283 lw x5,0(x22) +80002ee8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0xaf73156c +80002eec: 000b2283 lw x5,0(x22) +80002ef0: 004b0b13 addi x22,x22,4 + +80002ef4 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b5: + aes32dsmi x13, x5, x5, 1 # perform operation +80002ef4: 6e5286b3 aes32dsmi x13,x5,x5,0x1 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b5, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b5_str) +80002ef8: 000f2383 lw x7,0(x30) +80002efc: 00d38863 beq x7,x13,80002f0c +80002f00: 2d80546f jal x8,800081d8 +80002f04: 80002ef4 .word 0x80002ef4 +80002f08: 80012aa5 .word 0x80012aa5 +80002f0c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x112b7d31 +80002f10: 000b2303 lw x6,0(x22) +80002f14: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x6b2aecaa +80002f18: 000b2303 lw x6,0(x22) +80002f1c: 004b0b13 addi x22,x22,4 + +80002f20 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b6: + aes32dsmi x28, x6, x6, 1 # perform operation +80002f20: 6e630e33 aes32dsmi x28,x6,x6,0x1 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b6, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b6_str) +80002f24: 000f2383 lw x7,0(x30) +80002f28: 01c38863 beq x7,x28,80002f38 +80002f2c: 2ac0546f jal x8,800081d8 +80002f30: 80002f20 .word 0x80002f20 +80002f34: 80012ae2 .word 0x80012ae2 +80002f38: 004f0f13 addi x30,x30,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f3c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f40: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0xfe48f782 +80002f44: 000b2383 lw x7,0(x22) +80002f48: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x628791ce +80002f4c: 000b2383 lw x7,0(x22) +80002f50: 004b0b13 addi x22,x22,4 + +80002f54 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b7: + aes32dsmi x25, x7, x7, 1 # perform operation +80002f54: 6e738cb3 aes32dsmi x25,x7,x7,0x1 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b7, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b7_str) +80002f58: 000f2203 lw x4,0(x30) +80002f5c: 01920863 beq x4,x25,80002f6c +80002f60: 260052ef jal x5,800081c0 +80002f64: 80002f54 .word 0x80002f54 +80002f68: 80012b1f .word 0x80012b1f +80002f6c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0x00f65aed +80002f70: 000b2403 lw x8,0(x22) +80002f74: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xced6a5ae +80002f78: 000b2403 lw x8,0(x22) +80002f7c: 004b0b13 addi x22,x22,4 + +80002f80 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b8: + aes32dsmi x26, x8, x8, 2 # perform operation +80002f80: ae840d33 aes32dsmi x26,x8,x8,0x2 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b8, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b8_str) +80002f84: 000f2203 lw x4,0(x30) +80002f88: 01a20863 beq x4,x26,80002f98 +80002f8c: 234052ef jal x5,800081c0 +80002f90: 80002f80 .word 0x80002f80 +80002f94: 80012b5c .word 0x80012b5c +80002f98: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x8877bc02 +80002f9c: 000b2483 lw x9,0(x22) +80002fa0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x2f0bc9ae +80002fa4: 000b2483 lw x9,0(x22) +80002fa8: 004b0b13 addi x22,x22,4 + +80002fac : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b9: + aes32dsmi x24, x9, x9, 3 # perform operation +80002fac: ee948c33 aes32dsmi x24,x9,x9,0x3 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b9, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b9_str) +80002fb0: 000f2203 lw x4,0(x30) +80002fb4: 01820863 beq x4,x24,80002fc4 +80002fb8: 208052ef jal x5,800081c0 +80002fbc: 80002fac .word 0x80002fac +80002fc0: 80012b99 .word 0x80012b99 +80002fc4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x27ff4639 +80002fc8: 000b2503 lw x10,0(x22) +80002fcc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xda53fc27 +80002fd0: 000b2503 lw x10,0(x22) +80002fd4: 004b0b13 addi x22,x22,4 + +80002fd8 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b10: + aes32dsmi x8, x10, x10, 3 # perform operation +80002fd8: eea50433 aes32dsmi x8,x10,x10,0x3 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b10, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b10_str) +80002fdc: 000f2203 lw x4,0(x30) +80002fe0: 00820863 beq x4,x8,80002ff0 +80002fe4: 1dc052ef jal x5,800081c0 +80002fe8: 80002fd8 .word 0x80002fd8 +80002fec: 80012bd6 .word 0x80012bd6 +80002ff0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x4514d8b9 +80002ff4: 000b2583 lw x11,0(x22) +80002ff8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xe30b8add +80002ffc: 000b2583 lw x11,0(x22) +80003000: 004b0b13 addi x22,x22,4 + +80003004 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b11: + aes32dsmi x10, x11, x11, 2 # perform operation +80003004: aeb58533 aes32dsmi x10,x11,x11,0x2 + # Check if x10 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x10, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b11, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b11_str) +80003008: 000f2203 lw x4,0(x30) +8000300c: 00a20863 beq x4,x10,8000301c +80003010: 1b0052ef jal x5,800081c0 +80003014: 80003004 .word 0x80003004 +80003018: 80012c14 .word 0x80012c14 +8000301c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xa7eb8f2a +80003020: 000b2603 lw x12,0(x22) +80003024: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xaef1e10a +80003028: 000b2603 lw x12,0(x22) +8000302c: 004b0b13 addi x22,x22,4 + +80003030 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b12: + aes32dsmi x21, x12, x12, 1 # perform operation +80003030: 6ec60ab3 aes32dsmi x21,x12,x12,0x1 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b12, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b12_str) +80003034: 000f2203 lw x4,0(x30) +80003038: 01520863 beq x4,x21,80003048 +8000303c: 184052ef jal x5,800081c0 +80003040: 80003030 .word 0x80003030 +80003044: 80012c52 .word 0x80012c52 +80003048: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x398204cc +8000304c: 000b2683 lw x13,0(x22) +80003050: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xfdef035b +80003054: 000b2683 lw x13,0(x22) +80003058: 004b0b13 addi x22,x22,4 + +8000305c : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b13: + aes32dsmi x17, x13, x13, 0 # perform operation +8000305c: 2ed688b3 aes32dsmi x17,x13,x13,0x0 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b13_str) +80003060: 000f2203 lw x4,0(x30) +80003064: 01120863 beq x4,x17,80003074 +80003068: 158052ef jal x5,800081c0 +8000306c: 8000305c .word 0x8000305c +80003070: 80012c90 .word 0x80012c90 +80003074: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x8a9b80c2 +80003078: 000b2703 lw x14,0(x22) +8000307c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x68e7278d +80003080: 000b2703 lw x14,0(x22) +80003084: 004b0b13 addi x22,x22,4 + +80003088 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b14: + aes32dsmi x6, x14, x14, 2 # perform operation +80003088: aee70333 aes32dsmi x6,x14,x14,0x2 + # Check if x6 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x6, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b14, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b14_str) +8000308c: 000f2203 lw x4,0(x30) +80003090: 00620863 beq x4,x6,800030a0 +80003094: 12c052ef jal x5,800081c0 +80003098: 80003088 .word 0x80003088 +8000309c: 80012cce .word 0x80012cce +800030a0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x6736517d +800030a4: 000b2783 lw x15,0(x22) +800030a8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x5822898b +800030ac: 000b2783 lw x15,0(x22) +800030b0: 004b0b13 addi x22,x22,4 + +800030b4 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b15: + aes32dsmi x13, x15, x15, 0 # perform operation +800030b4: 2ef786b3 aes32dsmi x13,x15,x15,0x0 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b15, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b15_str) +800030b8: 000f2203 lw x4,0(x30) +800030bc: 00d20863 beq x4,x13,800030cc +800030c0: 100052ef jal x5,800081c0 +800030c4: 800030b4 .word 0x800030b4 +800030c8: 80012d0c .word 0x80012d0c +800030cc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x146ec376 +800030d0: 000b2803 lw x16,0(x22) +800030d4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x7a905a76 +800030d8: 000b2803 lw x16,0(x22) +800030dc: 004b0b13 addi x22,x22,4 + +800030e0 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b16: + aes32dsmi x27, x16, x16, 3 # perform operation +800030e0: ef080db3 aes32dsmi x27,x16,x16,0x3 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b16, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b16_str) +800030e4: 000f2203 lw x4,0(x30) +800030e8: 01b20863 beq x4,x27,800030f8 +800030ec: 0d4052ef jal x5,800081c0 +800030f0: 800030e0 .word 0x800030e0 +800030f4: 80012d4a .word 0x80012d4a +800030f8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xfbb9f3e7 +800030fc: 000b2883 lw x17,0(x22) +80003100: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x80499148 +80003104: 000b2883 lw x17,0(x22) +80003108: 004b0b13 addi x22,x22,4 + +8000310c : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b17: + aes32dsmi x1, x17, x17, 1 # perform operation +8000310c: 6f1880b3 aes32dsmi x1,x17,x17,0x1 + # Check if x1 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x1, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b17, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b17_str) +80003110: 000f2203 lw x4,0(x30) +80003114: 00120863 beq x4,x1,80003124 +80003118: 0a8052ef jal x5,800081c0 +8000311c: 8000310c .word 0x8000310c +80003120: 80012d88 .word 0x80012d88 +80003124: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x23828ef7 +80003128: 000b2903 lw x18,0(x22) +8000312c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x0968f49b +80003130: 000b2903 lw x18,0(x22) +80003134: 004b0b13 addi x22,x22,4 + +80003138 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b18: + aes32dsmi x13, x18, x18, 2 # perform operation +80003138: af2906b3 aes32dsmi x13,x18,x18,0x2 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b18, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b18_str) +8000313c: 000f2203 lw x4,0(x30) +80003140: 00d20863 beq x4,x13,80003150 +80003144: 07c052ef jal x5,800081c0 +80003148: 80003138 .word 0x80003138 +8000314c: 80012dc6 .word 0x80012dc6 +80003150: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x28fc8c89 +80003154: 000b2983 lw x19,0(x22) +80003158: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x28d7de64 +8000315c: 000b2983 lw x19,0(x22) +80003160: 004b0b13 addi x22,x22,4 + +80003164 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b19: + aes32dsmi x29, x19, x19, 1 # perform operation +80003164: 6f398eb3 aes32dsmi x29,x19,x19,0x1 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b19, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b19_str) +80003168: 000f2203 lw x4,0(x30) +8000316c: 01d20863 beq x4,x29,8000317c +80003170: 050052ef jal x5,800081c0 +80003174: 80003164 .word 0x80003164 +80003178: 80012e04 .word 0x80012e04 +8000317c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x0036e349 +80003180: 000b2a03 lw x20,0(x22) +80003184: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x713485f0 +80003188: 000b2a03 lw x20,0(x22) +8000318c: 004b0b13 addi x22,x22,4 + +80003190 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b20: + aes32dsmi x16, x20, x20, 3 # perform operation +80003190: ef4a0833 aes32dsmi x16,x20,x20,0x3 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b20, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b20_str) +80003194: 000f2203 lw x4,0(x30) +80003198: 01020863 beq x4,x16,800031a8 +8000319c: 024052ef jal x5,800081c0 +800031a0: 80003190 .word 0x80003190 +800031a4: 80012e42 .word 0x80012e42 +800031a8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x056a5b08 +800031ac: 000b2a83 lw x21,0(x22) +800031b0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x6ca877ef +800031b4: 000b2a83 lw x21,0(x22) +800031b8: 004b0b13 addi x22,x22,4 + +800031bc : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b21: + aes32dsmi x16, x21, x21, 3 # perform operation +800031bc: ef5a8833 aes32dsmi x16,x21,x21,0x3 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b21, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b21_str) +800031c0: 000f2203 lw x4,0(x30) +800031c4: 01020863 beq x4,x16,800031d4 +800031c8: 7f9042ef jal x5,800081c0 +800031cc: 800031bc .word 0x800031bc +800031d0: 80012e80 .word 0x80012e80 +800031d4: 004f0f13 addi x30,x30,4 + + mv x9, x22 # switch data pointer register to avoid conflict with test +800031d8: 000b0493 addi x9,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xa0b13ea5 +800031dc: 0004ab03 lw x22,0(x9) +800031e0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x34f772fe +800031e4: 0004ab03 lw x22,0(x9) +800031e8: 00448493 addi x9,x9,4 + +800031ec : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b22: + aes32dsmi x13, x22, x22, 1 # perform operation +800031ec: 6f6b06b3 aes32dsmi x13,x22,x22,0x1 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b22, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b22_str) +800031f0: 000f2203 lw x4,0(x30) +800031f4: 00d20863 beq x4,x13,80003204 +800031f8: 7c9042ef jal x5,800081c0 +800031fc: 800031ec .word 0x800031ec +80003200: 80012ebe .word 0x80012ebe +80003204: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xab82e789 +80003208: 0004ab83 lw x23,0(x9) +8000320c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x9185c8db +80003210: 0004ab83 lw x23,0(x9) +80003214: 00448493 addi x9,x9,4 + +80003218 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b23: + aes32dsmi x2, x23, x23, 0 # perform operation +80003218: 2f7b8133 aes32dsmi x2,x23,x23,0x0 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b23, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b23_str) +8000321c: 000f2203 lw x4,0(x30) +80003220: 00220863 beq x4,x2,80003230 +80003224: 79d042ef jal x5,800081c0 +80003228: 80003218 .word 0x80003218 +8000322c: 80012efc .word 0x80012efc +80003230: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xdab4465b +80003234: 0004ac03 lw x24,0(x9) +80003238: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x18e44ef7 +8000323c: 0004ac03 lw x24,0(x9) +80003240: 00448493 addi x9,x9,4 + +80003244 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b24: + aes32dsmi x2, x24, x24, 2 # perform operation +80003244: af8c0133 aes32dsmi x2,x24,x24,0x2 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b24, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b24_str) +80003248: 000f2203 lw x4,0(x30) +8000324c: 00220863 beq x4,x2,8000325c +80003250: 771042ef jal x5,800081c0 +80003254: 80003244 .word 0x80003244 +80003258: 80012f3a .word 0x80012f3a +8000325c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x1fb8881a +80003260: 0004ac83 lw x25,0(x9) +80003264: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x2c99f49a +80003268: 0004ac83 lw x25,0(x9) +8000326c: 00448493 addi x9,x9,4 + +80003270 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b25: + aes32dsmi x6, x25, x25, 0 # perform operation +80003270: 2f9c8333 aes32dsmi x6,x25,x25,0x0 + # Check if x6 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x6, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b25, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b25_str) +80003274: 000f2203 lw x4,0(x30) +80003278: 00620863 beq x4,x6,80003288 +8000327c: 745042ef jal x5,800081c0 +80003280: 80003270 .word 0x80003270 +80003284: 80012f78 .word 0x80012f78 +80003288: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x9ba7606e +8000328c: 0004ad03 lw x26,0(x9) +80003290: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x6b0fb6a5 +80003294: 0004ad03 lw x26,0(x9) +80003298: 00448493 addi x9,x9,4 + +8000329c : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b26: + aes32dsmi x12, x26, x26, 0 # perform operation +8000329c: 2fad0633 aes32dsmi x12,x26,x26,0x0 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b26, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b26_str) +800032a0: 000f2203 lw x4,0(x30) +800032a4: 00c20863 beq x4,x12,800032b4 +800032a8: 719042ef jal x5,800081c0 +800032ac: 8000329c .word 0x8000329c +800032b0: 80012fb6 .word 0x80012fb6 +800032b4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x0003db15 +800032b8: 0004ad83 lw x27,0(x9) +800032bc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x1cd7af25 +800032c0: 0004ad83 lw x27,0(x9) +800032c4: 00448493 addi x9,x9,4 + +800032c8 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b27: + aes32dsmi x14, x27, x27, 1 # perform operation +800032c8: 6fbd8733 aes32dsmi x14,x27,x27,0x1 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b27, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b27_str) +800032cc: 000f2203 lw x4,0(x30) +800032d0: 00e20863 beq x4,x14,800032e0 +800032d4: 6ed042ef jal x5,800081c0 +800032d8: 800032c8 .word 0x800032c8 +800032dc: 80012ff4 .word 0x80012ff4 +800032e0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x9de59c0d +800032e4: 0004ae03 lw x28,0(x9) +800032e8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x72173984 +800032ec: 0004ae03 lw x28,0(x9) +800032f0: 00448493 addi x9,x9,4 + +800032f4 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b28: + aes32dsmi x2, x28, x28, 2 # perform operation +800032f4: afce0133 aes32dsmi x2,x28,x28,0x2 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b28, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b28_str) +800032f8: 000f2203 lw x4,0(x30) +800032fc: 00220863 beq x4,x2,8000330c +80003300: 6c1042ef jal x5,800081c0 +80003304: 800032f4 .word 0x800032f4 +80003308: 80013032 .word 0x80013032 +8000330c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x76e0d0e9 +80003310: 0004ae83 lw x29,0(x9) +80003314: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x9a2f96b9 +80003318: 0004ae83 lw x29,0(x9) +8000331c: 00448493 addi x9,x9,4 + +80003320 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b29: + aes32dsmi x14, x29, x29, 2 # perform operation +80003320: afde8733 aes32dsmi x14,x29,x29,0x2 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b29, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b29_str) +80003324: 000f2203 lw x4,0(x30) +80003328: 00e20863 beq x4,x14,80003338 +8000332c: 695042ef jal x5,800081c0 +80003330: 80003320 .word 0x80003320 +80003334: 80013070 .word 0x80013070 +80003338: 004f0f13 addi x30,x30,4 + + mv x16, x30 # switch signature pointer register to avoid conflict with test +8000333c: 000f0813 addi x16,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xc10591fd +80003340: 0004af03 lw x30,0(x9) +80003344: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x6f545bdf +80003348: 0004af03 lw x30,0(x9) +8000334c: 00448493 addi x9,x9,4 + +80003350 : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b30: + aes32dsmi x8, x30, x30, 0 # perform operation +80003350: 2fef0433 aes32dsmi x8,x30,x30,0x0 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b30, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b30_str) +80003354: 00082203 lw x4,0(x16) +80003358: 00820863 beq x4,x8,80003368 +8000335c: 665042ef jal x5,800081c0 +80003360: 80003350 .word 0x80003350 +80003364: 800130ae .word 0x800130ae +80003368: 00480813 addi x16,x16,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x1f31ff71 +8000336c: 0004af83 lw x31,0(x9) +80003370: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x7445934f +80003374: 0004af83 lw x31,0(x9) +80003378: 00448493 addi x9,x9,4 + +8000337c : +Zknd_aes32dsmi_cg_cmp_rs1_rs2_b31: + aes32dsmi x8, x31, x31, 1 # perform operation +8000337c: 6fff8433 aes32dsmi x8,x31,x31,0x1 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b31, Zknd_aes32dsmi_cg_cmp_rs1_rs2_b31_str) +80003380: 00082203 lw x4,0(x16) +80003384: 00820863 beq x4,x8,80003394 +80003388: 639042ef jal x5,800081c0 +8000338c: 8000337c .word 0x8000337c +80003390: 800130ec .word 0x800130ec +80003394: 00480813 addi x16,x16,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x193ebb8e +80003398: 0004a003 lw x0,0(x9) +8000339c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xf4958146 +800033a0: 0004a683 lw x13,0(x9) +800033a4: 00448493 addi x9,x9,4 + +800033a8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b0: + aes32dsmi x0, x0, x13, 0 # perform operation +800033a8: 2ed00033 aes32dsmi x0,x0,x13,0x0 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zknd_aes32dsmi_cg_cmp_rd_rs1_b0, Zknd_aes32dsmi_cg_cmp_rd_rs1_b0_str) +800033ac: 00082203 lw x4,0(x16) +800033b0: 00020863 beq x4,x0,800033c0 +800033b4: 60d042ef jal x5,800081c0 +800033b8: 800033a8 .word 0x800033a8 +800033bc: 8001312a .word 0x8001312a +800033c0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x993663b0 +800033c4: 0004a083 lw x1,0(x9) +800033c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xc91b3e4e +800033cc: 0004a903 lw x18,0(x9) +800033d0: 00448493 addi x9,x9,4 + +800033d4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b1: + aes32dsmi x1, x1, x18, 2 # perform operation +800033d4: af2080b3 aes32dsmi x1,x1,x18,0x2 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes32dsmi_cg_cmp_rd_rs1_b1, Zknd_aes32dsmi_cg_cmp_rd_rs1_b1_str) +800033d8: 00082203 lw x4,0(x16) +800033dc: 00120863 beq x4,x1,800033ec +800033e0: 5e1042ef jal x5,800081c0 +800033e4: 800033d4 .word 0x800033d4 +800033e8: 80013166 .word 0x80013166 +800033ec: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x9774dba4 +800033f0: 0004a103 lw x2,0(x9) +800033f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x50779a85 +800033f8: 0004aa83 lw x21,0(x9) +800033fc: 00448493 addi x9,x9,4 + +80003400 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b2: + aes32dsmi x2, x2, x21, 3 # perform operation +80003400: ef510133 aes32dsmi x2,x2,x21,0x3 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rd_rs1_b2, Zknd_aes32dsmi_cg_cmp_rd_rs1_b2_str) +80003404: 00082203 lw x4,0(x16) +80003408: 00220863 beq x4,x2,80003418 +8000340c: 5b5042ef jal x5,800081c0 +80003410: 80003400 .word 0x80003400 +80003414: 800131a2 .word 0x800131a2 +80003418: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7a469f5d +8000341c: 0004a183 lw x3,0(x9) +80003420: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xe62b7a27 +80003424: 0004a003 lw x0,0(x9) +80003428: 00448493 addi x9,x9,4 + +8000342c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b3: + aes32dsmi x3, x3, x0, 3 # perform operation +8000342c: ee0181b3 aes32dsmi x3,x3,x0,0x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes32dsmi_cg_cmp_rd_rs1_b3, Zknd_aes32dsmi_cg_cmp_rd_rs1_b3_str) +80003430: 00082203 lw x4,0(x16) +80003434: 00320863 beq x4,x3,80003444 +80003438: 589042ef jal x5,800081c0 +8000343c: 8000342c .word 0x8000342c +80003440: 800131de .word 0x800131de +80003444: 00480813 addi x16,x16,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003448: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +8000344c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x02f0df05 +80003450: 0004a203 lw x4,0(x9) +80003454: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xc3782d3c +80003458: 0004a983 lw x19,0(x9) +8000345c: 00448493 addi x9,x9,4 + +80003460 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b4: + aes32dsmi x4, x4, x19, 1 # perform operation +80003460: 6f320233 aes32dsmi x4,x4,x19,0x1 + # Check if x4 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x4, Zknd_aes32dsmi_cg_cmp_rd_rs1_b4, Zknd_aes32dsmi_cg_cmp_rd_rs1_b4_str) +80003464: 00082683 lw x13,0(x16) +80003468: 00468863 beq x13,x4,80003478 +8000346c: 5950476f jal x14,80008200 +80003470: 80003460 .word 0x80003460 +80003474: 8001321a .word 0x8001321a +80003478: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x79de4f5a +8000347c: 0004a283 lw x5,0(x9) +80003480: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xa4d24393 +80003484: 0004a203 lw x4,0(x9) +80003488: 00448493 addi x9,x9,4 + +8000348c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b5: + aes32dsmi x5, x5, x4, 1 # perform operation +8000348c: 6e4282b3 aes32dsmi x5,x5,x4,0x1 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zknd_aes32dsmi_cg_cmp_rd_rs1_b5, Zknd_aes32dsmi_cg_cmp_rd_rs1_b5_str) +80003490: 00082683 lw x13,0(x16) +80003494: 00568863 beq x13,x5,800034a4 +80003498: 5690476f jal x14,80008200 +8000349c: 8000348c .word 0x8000348c +800034a0: 80013256 .word 0x80013256 +800034a4: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x8f3f331b +800034a8: 0004a303 lw x6,0(x9) +800034ac: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x4c94facf +800034b0: 0004af03 lw x30,0(x9) +800034b4: 00448493 addi x9,x9,4 + +800034b8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b6: + aes32dsmi x6, x6, x30, 1 # perform operation +800034b8: 6fe30333 aes32dsmi x6,x6,x30,0x1 + # Check if x6 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x6, Zknd_aes32dsmi_cg_cmp_rd_rs1_b6, Zknd_aes32dsmi_cg_cmp_rd_rs1_b6_str) +800034bc: 00082683 lw x13,0(x16) +800034c0: 00668863 beq x13,x6,800034d0 +800034c4: 53d0476f jal x14,80008200 +800034c8: 800034b8 .word 0x800034b8 +800034cc: 80013292 .word 0x80013292 +800034d0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x28afc08c +800034d4: 0004a383 lw x7,0(x9) +800034d8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x1282583b +800034dc: 0004ab03 lw x22,0(x9) +800034e0: 00448493 addi x9,x9,4 + +800034e4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b7: + aes32dsmi x7, x7, x22, 0 # perform operation +800034e4: 2f6383b3 aes32dsmi x7,x7,x22,0x0 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zknd_aes32dsmi_cg_cmp_rd_rs1_b7, Zknd_aes32dsmi_cg_cmp_rd_rs1_b7_str) +800034e8: 00082683 lw x13,0(x16) +800034ec: 00768863 beq x13,x7,800034fc +800034f0: 5110476f jal x14,80008200 +800034f4: 800034e4 .word 0x800034e4 +800034f8: 800132ce .word 0x800132ce +800034fc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0462daf7 +80003500: 0004a403 lw x8,0(x9) +80003504: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x9c001151 +80003508: 0004a983 lw x19,0(x9) +8000350c: 00448493 addi x9,x9,4 + +80003510 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b8: + aes32dsmi x8, x8, x19, 1 # perform operation +80003510: 6f340433 aes32dsmi x8,x8,x19,0x1 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zknd_aes32dsmi_cg_cmp_rd_rs1_b8, Zknd_aes32dsmi_cg_cmp_rd_rs1_b8_str) +80003514: 00082683 lw x13,0(x16) +80003518: 00868863 beq x13,x8,80003528 +8000351c: 4e50476f jal x14,80008200 +80003520: 80003510 .word 0x80003510 +80003524: 8001330a .word 0x8001330a +80003528: 00480813 addi x16,x16,4 + + mv x3, x9 # switch data pointer register to avoid conflict with test +8000352c: 00048193 addi x3,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x32927f0f +80003530: 0001a483 lw x9,0(x3) +80003534: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x978d7153 +80003538: 0001aa83 lw x21,0(x3) +8000353c: 00418193 addi x3,x3,4 + +80003540 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b9: + aes32dsmi x9, x9, x21, 1 # perform operation +80003540: 6f5484b3 aes32dsmi x9,x9,x21,0x1 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zknd_aes32dsmi_cg_cmp_rd_rs1_b9, Zknd_aes32dsmi_cg_cmp_rd_rs1_b9_str) +80003544: 00082683 lw x13,0(x16) +80003548: 00968863 beq x13,x9,80003558 +8000354c: 4b50476f jal x14,80008200 +80003550: 80003540 .word 0x80003540 +80003554: 80013346 .word 0x80013346 +80003558: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x2810270e +8000355c: 0001a503 lw x10,0(x3) +80003560: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xa63eb957 +80003564: 0001ad83 lw x27,0(x3) +80003568: 00418193 addi x3,x3,4 + +8000356c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b10: + aes32dsmi x10, x10, x27, 3 # perform operation +8000356c: efb50533 aes32dsmi x10,x10,x27,0x3 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zknd_aes32dsmi_cg_cmp_rd_rs1_b10, Zknd_aes32dsmi_cg_cmp_rd_rs1_b10_str) +80003570: 00082683 lw x13,0(x16) +80003574: 00a68863 beq x13,x10,80003584 +80003578: 4890476f jal x14,80008200 +8000357c: 8000356c .word 0x8000356c +80003580: 80013382 .word 0x80013382 +80003584: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x8c26e01a +80003588: 0001a583 lw x11,0(x3) +8000358c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x45fa57a1 +80003590: 0001af03 lw x30,0(x3) +80003594: 00418193 addi x3,x3,4 + +80003598 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b11: + aes32dsmi x11, x11, x30, 3 # perform operation +80003598: efe585b3 aes32dsmi x11,x11,x30,0x3 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zknd_aes32dsmi_cg_cmp_rd_rs1_b11, Zknd_aes32dsmi_cg_cmp_rd_rs1_b11_str) +8000359c: 00082683 lw x13,0(x16) +800035a0: 00b68863 beq x13,x11,800035b0 +800035a4: 45d0476f jal x14,80008200 +800035a8: 80003598 .word 0x80003598 +800035ac: 800133bf .word 0x800133bf +800035b0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xa95c592e +800035b4: 0001a603 lw x12,0(x3) +800035b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x99293df0 +800035bc: 0001ab83 lw x23,0(x3) +800035c0: 00418193 addi x3,x3,4 + +800035c4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b12: + aes32dsmi x12, x12, x23, 1 # perform operation +800035c4: 6f760633 aes32dsmi x12,x12,x23,0x1 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zknd_aes32dsmi_cg_cmp_rd_rs1_b12, Zknd_aes32dsmi_cg_cmp_rd_rs1_b12_str) +800035c8: 00082683 lw x13,0(x16) +800035cc: 00c68863 beq x13,x12,800035dc +800035d0: 4310476f jal x14,80008200 +800035d4: 800035c4 .word 0x800035c4 +800035d8: 800133fc .word 0x800133fc +800035dc: 00480813 addi x16,x16,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800035e0: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800035e4: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x2d03bbe6 +800035e8: 0001a683 lw x13,0(x3) +800035ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0xad7dfc11 +800035f0: 0001a003 lw x0,0(x3) +800035f4: 00418193 addi x3,x3,4 + +800035f8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b13: + aes32dsmi x13, x13, x0, 3 # perform operation +800035f8: ee0686b3 aes32dsmi x13,x13,x0,0x3 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rd_rs1_b13, Zknd_aes32dsmi_cg_cmp_rd_rs1_b13_str) +800035fc: 00082203 lw x4,0(x16) +80003600: 00d20863 beq x4,x13,80003610 +80003604: 3bd042ef jal x5,800081c0 +80003608: 800035f8 .word 0x800035f8 +8000360c: 80013439 .word 0x80013439 +80003610: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x4ff33e8e +80003614: 0001a703 lw x14,0(x3) +80003618: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xf2f53fe1 +8000361c: 0001af83 lw x31,0(x3) +80003620: 00418193 addi x3,x3,4 + +80003624 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b14: + aes32dsmi x14, x14, x31, 3 # perform operation +80003624: eff70733 aes32dsmi x14,x14,x31,0x3 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes32dsmi_cg_cmp_rd_rs1_b14, Zknd_aes32dsmi_cg_cmp_rd_rs1_b14_str) +80003628: 00082203 lw x4,0(x16) +8000362c: 00e20863 beq x4,x14,8000363c +80003630: 391042ef jal x5,800081c0 +80003634: 80003624 .word 0x80003624 +80003638: 80013476 .word 0x80013476 +8000363c: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x4f72e151 +80003640: 0001a783 lw x15,0(x3) +80003644: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xdcfbe2c5 +80003648: 0001a103 lw x2,0(x3) +8000364c: 00418193 addi x3,x3,4 + +80003650 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b15: + aes32dsmi x15, x15, x2, 1 # perform operation +80003650: 6e2787b3 aes32dsmi x15,x15,x2,0x1 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes32dsmi_cg_cmp_rd_rs1_b15, Zknd_aes32dsmi_cg_cmp_rd_rs1_b15_str) +80003654: 00082203 lw x4,0(x16) +80003658: 00f20863 beq x4,x15,80003668 +8000365c: 365042ef jal x5,800081c0 +80003660: 80003650 .word 0x80003650 +80003664: 800134b3 .word 0x800134b3 +80003668: 00480813 addi x16,x16,4 + + mv x12, x16 # switch signature pointer register to avoid conflict with test +8000366c: 00080613 addi x12,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xce55ab71 +80003670: 0001a803 lw x16,0(x3) +80003674: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x6f9b4243 +80003678: 0001ab83 lw x23,0(x3) +8000367c: 00418193 addi x3,x3,4 + +80003680 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b16: + aes32dsmi x16, x16, x23, 1 # perform operation +80003680: 6f780833 aes32dsmi x16,x16,x23,0x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes32dsmi_cg_cmp_rd_rs1_b16, Zknd_aes32dsmi_cg_cmp_rd_rs1_b16_str) +80003684: 00062203 lw x4,0(x12) +80003688: 01020863 beq x4,x16,80003698 +8000368c: 335042ef jal x5,800081c0 +80003690: 80003680 .word 0x80003680 +80003694: 800134f0 .word 0x800134f0 +80003698: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x20b7ab74 +8000369c: 0001a883 lw x17,0(x3) +800036a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x27e7ef82 +800036a4: 0001a683 lw x13,0(x3) +800036a8: 00418193 addi x3,x3,4 + +800036ac : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b17: + aes32dsmi x17, x17, x13, 0 # perform operation +800036ac: 2ed888b3 aes32dsmi x17,x17,x13,0x0 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes32dsmi_cg_cmp_rd_rs1_b17, Zknd_aes32dsmi_cg_cmp_rd_rs1_b17_str) +800036b0: 00062203 lw x4,0(x12) +800036b4: 01120863 beq x4,x17,800036c4 +800036b8: 309042ef jal x5,800081c0 +800036bc: 800036ac .word 0x800036ac +800036c0: 8001352d .word 0x8001352d +800036c4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x096fe293 +800036c8: 0001a903 lw x18,0(x3) +800036cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x9c60d630 +800036d0: 0001af03 lw x30,0(x3) +800036d4: 00418193 addi x3,x3,4 + +800036d8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b18: + aes32dsmi x18, x18, x30, 2 # perform operation +800036d8: afe90933 aes32dsmi x18,x18,x30,0x2 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes32dsmi_cg_cmp_rd_rs1_b18, Zknd_aes32dsmi_cg_cmp_rd_rs1_b18_str) +800036dc: 00062203 lw x4,0(x12) +800036e0: 01220863 beq x4,x18,800036f0 +800036e4: 2dd042ef jal x5,800081c0 +800036e8: 800036d8 .word 0x800036d8 +800036ec: 8001356a .word 0x8001356a +800036f0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x79b49dad +800036f4: 0001a983 lw x19,0(x3) +800036f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xa770eeeb +800036fc: 0001a803 lw x16,0(x3) +80003700: 00418193 addi x3,x3,4 + +80003704 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b19: + aes32dsmi x19, x19, x16, 1 # perform operation +80003704: 6f0989b3 aes32dsmi x19,x19,x16,0x1 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes32dsmi_cg_cmp_rd_rs1_b19, Zknd_aes32dsmi_cg_cmp_rd_rs1_b19_str) +80003708: 00062203 lw x4,0(x12) +8000370c: 01320863 beq x4,x19,8000371c +80003710: 2b1042ef jal x5,800081c0 +80003714: 80003704 .word 0x80003704 +80003718: 800135a7 .word 0x800135a7 +8000371c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xbe2060dc +80003720: 0001aa03 lw x20,0(x3) +80003724: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x76b951be +80003728: 0001a403 lw x8,0(x3) +8000372c: 00418193 addi x3,x3,4 + +80003730 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b20: + aes32dsmi x20, x20, x8, 0 # perform operation +80003730: 2e8a0a33 aes32dsmi x20,x20,x8,0x0 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes32dsmi_cg_cmp_rd_rs1_b20, Zknd_aes32dsmi_cg_cmp_rd_rs1_b20_str) +80003734: 00062203 lw x4,0(x12) +80003738: 01420863 beq x4,x20,80003748 +8000373c: 285042ef jal x5,800081c0 +80003740: 80003730 .word 0x80003730 +80003744: 800135e4 .word 0x800135e4 +80003748: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xd53be741 +8000374c: 0001aa83 lw x21,0(x3) +80003750: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x90ce1c82 +80003754: 0001ae03 lw x28,0(x3) +80003758: 00418193 addi x3,x3,4 + +8000375c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b21: + aes32dsmi x21, x21, x28, 2 # perform operation +8000375c: afca8ab3 aes32dsmi x21,x21,x28,0x2 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes32dsmi_cg_cmp_rd_rs1_b21, Zknd_aes32dsmi_cg_cmp_rd_rs1_b21_str) +80003760: 00062203 lw x4,0(x12) +80003764: 01520863 beq x4,x21,80003774 +80003768: 259042ef jal x5,800081c0 +8000376c: 8000375c .word 0x8000375c +80003770: 80013621 .word 0x80013621 +80003774: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xcba3a2e6 +80003778: 0001ab03 lw x22,0(x3) +8000377c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x2597b0e3 +80003780: 0001ad03 lw x26,0(x3) +80003784: 00418193 addi x3,x3,4 + +80003788 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b22: + aes32dsmi x22, x22, x26, 1 # perform operation +80003788: 6fab0b33 aes32dsmi x22,x22,x26,0x1 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes32dsmi_cg_cmp_rd_rs1_b22, Zknd_aes32dsmi_cg_cmp_rd_rs1_b22_str) +8000378c: 00062203 lw x4,0(x12) +80003790: 01620863 beq x4,x22,800037a0 +80003794: 22d042ef jal x5,800081c0 +80003798: 80003788 .word 0x80003788 +8000379c: 8001365e .word 0x8001365e +800037a0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x0553f3b3 +800037a4: 0001ab83 lw x23,0(x3) +800037a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x233c2b40 +800037ac: 0001a103 lw x2,0(x3) +800037b0: 00418193 addi x3,x3,4 + +800037b4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b23: + aes32dsmi x23, x23, x2, 3 # perform operation +800037b4: ee2b8bb3 aes32dsmi x23,x23,x2,0x3 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes32dsmi_cg_cmp_rd_rs1_b23, Zknd_aes32dsmi_cg_cmp_rd_rs1_b23_str) +800037b8: 00062203 lw x4,0(x12) +800037bc: 01720863 beq x4,x23,800037cc +800037c0: 201042ef jal x5,800081c0 +800037c4: 800037b4 .word 0x800037b4 +800037c8: 8001369b .word 0x8001369b +800037cc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x50aaccb4 +800037d0: 0001ac03 lw x24,0(x3) +800037d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xb6c4b188 +800037d8: 0001ab03 lw x22,0(x3) +800037dc: 00418193 addi x3,x3,4 + +800037e0 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b24: + aes32dsmi x24, x24, x22, 0 # perform operation +800037e0: 2f6c0c33 aes32dsmi x24,x24,x22,0x0 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes32dsmi_cg_cmp_rd_rs1_b24, Zknd_aes32dsmi_cg_cmp_rd_rs1_b24_str) +800037e4: 00062203 lw x4,0(x12) +800037e8: 01820863 beq x4,x24,800037f8 +800037ec: 1d5042ef jal x5,800081c0 +800037f0: 800037e0 .word 0x800037e0 +800037f4: 800136d8 .word 0x800136d8 +800037f8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xed0acab7 +800037fc: 0001ac83 lw x25,0(x3) +80003800: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xba1830c6 +80003804: 0001a503 lw x10,0(x3) +80003808: 00418193 addi x3,x3,4 + +8000380c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b25: + aes32dsmi x25, x25, x10, 0 # perform operation +8000380c: 2eac8cb3 aes32dsmi x25,x25,x10,0x0 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes32dsmi_cg_cmp_rd_rs1_b25, Zknd_aes32dsmi_cg_cmp_rd_rs1_b25_str) +80003810: 00062203 lw x4,0(x12) +80003814: 01920863 beq x4,x25,80003824 +80003818: 1a9042ef jal x5,800081c0 +8000381c: 8000380c .word 0x8000380c +80003820: 80013715 .word 0x80013715 +80003824: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x9fdac0df +80003828: 0001ad03 lw x26,0(x3) +8000382c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x6e92c92c +80003830: 0001ae83 lw x29,0(x3) +80003834: 00418193 addi x3,x3,4 + +80003838 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b26: + aes32dsmi x26, x26, x29, 2 # perform operation +80003838: afdd0d33 aes32dsmi x26,x26,x29,0x2 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes32dsmi_cg_cmp_rd_rs1_b26, Zknd_aes32dsmi_cg_cmp_rd_rs1_b26_str) +8000383c: 00062203 lw x4,0(x12) +80003840: 01a20863 beq x4,x26,80003850 +80003844: 17d042ef jal x5,800081c0 +80003848: 80003838 .word 0x80003838 +8000384c: 80013752 .word 0x80013752 +80003850: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x7c769a79 +80003854: 0001ad83 lw x27,0(x3) +80003858: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xdc946550 +8000385c: 0001af83 lw x31,0(x3) +80003860: 00418193 addi x3,x3,4 + +80003864 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b27: + aes32dsmi x27, x27, x31, 1 # perform operation +80003864: 6ffd8db3 aes32dsmi x27,x27,x31,0x1 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes32dsmi_cg_cmp_rd_rs1_b27, Zknd_aes32dsmi_cg_cmp_rd_rs1_b27_str) +80003868: 00062203 lw x4,0(x12) +8000386c: 01b20863 beq x4,x27,8000387c +80003870: 151042ef jal x5,800081c0 +80003874: 80003864 .word 0x80003864 +80003878: 8001378f .word 0x8001378f +8000387c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xd2711179 +80003880: 0001ae03 lw x28,0(x3) +80003884: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x8e0a84cd +80003888: 0001a383 lw x7,0(x3) +8000388c: 00418193 addi x3,x3,4 + +80003890 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b28: + aes32dsmi x28, x28, x7, 0 # perform operation +80003890: 2e7e0e33 aes32dsmi x28,x28,x7,0x0 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes32dsmi_cg_cmp_rd_rs1_b28, Zknd_aes32dsmi_cg_cmp_rd_rs1_b28_str) +80003894: 00062203 lw x4,0(x12) +80003898: 01c20863 beq x4,x28,800038a8 +8000389c: 125042ef jal x5,800081c0 +800038a0: 80003890 .word 0x80003890 +800038a4: 800137cc .word 0x800137cc +800038a8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x6910a09f +800038ac: 0001ae83 lw x29,0(x3) +800038b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x9efeac88 +800038b4: 0001a803 lw x16,0(x3) +800038b8: 00418193 addi x3,x3,4 + +800038bc : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b29: + aes32dsmi x29, x29, x16, 1 # perform operation +800038bc: 6f0e8eb3 aes32dsmi x29,x29,x16,0x1 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes32dsmi_cg_cmp_rd_rs1_b29, Zknd_aes32dsmi_cg_cmp_rd_rs1_b29_str) +800038c0: 00062203 lw x4,0(x12) +800038c4: 01d20863 beq x4,x29,800038d4 +800038c8: 0f9042ef jal x5,800081c0 +800038cc: 800038bc .word 0x800038bc +800038d0: 80013809 .word 0x80013809 +800038d4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x69998bcb +800038d8: 0001af03 lw x30,0(x3) +800038dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7e2300bc +800038e0: 0001ab83 lw x23,0(x3) +800038e4: 00418193 addi x3,x3,4 + +800038e8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b30: + aes32dsmi x30, x30, x23, 1 # perform operation +800038e8: 6f7f0f33 aes32dsmi x30,x30,x23,0x1 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes32dsmi_cg_cmp_rd_rs1_b30, Zknd_aes32dsmi_cg_cmp_rd_rs1_b30_str) +800038ec: 00062203 lw x4,0(x12) +800038f0: 01e20863 beq x4,x30,80003900 +800038f4: 0cd042ef jal x5,800081c0 +800038f8: 800038e8 .word 0x800038e8 +800038fc: 80013846 .word 0x80013846 +80003900: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x40e8773f +80003904: 0001af83 lw x31,0(x3) +80003908: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0eee6591 +8000390c: 0001a583 lw x11,0(x3) +80003910: 00418193 addi x3,x3,4 + +80003914 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_b31: + aes32dsmi x31, x31, x11, 0 # perform operation +80003914: 2ebf8fb3 aes32dsmi x31,x31,x11,0x0 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes32dsmi_cg_cmp_rd_rs1_b31, Zknd_aes32dsmi_cg_cmp_rd_rs1_b31_str) +80003918: 00062203 lw x4,0(x12) +8000391c: 01f20863 beq x4,x31,8000392c +80003920: 0a1042ef jal x5,800081c0 +80003924: 80003914 .word 0x80003914 +80003928: 80013883 .word 0x80013883 +8000392c: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaef70223 +80003930: 0001a483 lw x9,0(x3) +80003934: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x75b1429e +80003938: 0001a003 lw x0,0(x3) +8000393c: 00418193 addi x3,x3,4 + +80003940 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b0: + aes32dsmi x0, x9, x0, 2 # perform operation +80003940: ae048033 aes32dsmi x0,x9,x0,0x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zknd_aes32dsmi_cg_cmp_rd_rs2_b0, Zknd_aes32dsmi_cg_cmp_rd_rs2_b0_str) +80003944: 00062203 lw x4,0(x12) +80003948: 00020863 beq x4,x0,80003958 +8000394c: 075042ef jal x5,800081c0 +80003950: 80003940 .word 0x80003940 +80003954: 800138c0 .word 0x800138c0 +80003958: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x1ee7f9a0 +8000395c: 0001a303 lw x6,0(x3) +80003960: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x1c8ff2d0 +80003964: 0001a083 lw x1,0(x3) +80003968: 00418193 addi x3,x3,4 + +8000396c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b1: + aes32dsmi x1, x6, x1, 2 # perform operation +8000396c: ae1300b3 aes32dsmi x1,x6,x1,0x2 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes32dsmi_cg_cmp_rd_rs2_b1, Zknd_aes32dsmi_cg_cmp_rd_rs2_b1_str) +80003970: 00062203 lw x4,0(x12) +80003974: 00120863 beq x4,x1,80003984 +80003978: 049042ef jal x5,800081c0 +8000397c: 8000396c .word 0x8000396c +80003980: 800138fc .word 0x800138fc +80003984: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x05223dbd +80003988: 0001a483 lw x9,0(x3) +8000398c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xaeaf3328 +80003990: 0001a103 lw x2,0(x3) +80003994: 00418193 addi x3,x3,4 + +80003998 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b2: + aes32dsmi x2, x9, x2, 2 # perform operation +80003998: ae248133 aes32dsmi x2,x9,x2,0x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rd_rs2_b2, Zknd_aes32dsmi_cg_cmp_rd_rs2_b2_str) +8000399c: 00062203 lw x4,0(x12) +800039a0: 00220863 beq x4,x2,800039b0 +800039a4: 01d042ef jal x5,800081c0 +800039a8: 80003998 .word 0x80003998 +800039ac: 80013938 .word 0x80013938 +800039b0: 00460613 addi x12,x12,4 + + mv x30, x3 # switch data pointer register to avoid conflict with test +800039b4: 00018f13 addi x30,x3,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0xa39bdf2b +800039b8: 000f2a03 lw x20,0(x30) +800039bc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0xdf83f52d +800039c0: 000f2183 lw x3,0(x30) +800039c4: 004f0f13 addi x30,x30,4 + +800039c8 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b3: + aes32dsmi x3, x20, x3, 1 # perform operation +800039c8: 6e3a01b3 aes32dsmi x3,x20,x3,0x1 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes32dsmi_cg_cmp_rd_rs2_b3, Zknd_aes32dsmi_cg_cmp_rd_rs2_b3_str) +800039cc: 00062203 lw x4,0(x12) +800039d0: 00320863 beq x4,x3,800039e0 +800039d4: 7ec042ef jal x5,800081c0 +800039d8: 800039c8 .word 0x800039c8 +800039dc: 80013974 .word 0x80013974 +800039e0: 00460613 addi x12,x12,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800039e4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800039e8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xe85e140b +800039ec: 000f2883 lw x17,0(x30) +800039f0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs2: x4 = 0x96ed5f72 +800039f4: 000f2203 lw x4,0(x30) +800039f8: 004f0f13 addi x30,x30,4 + +800039fc : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b4: + aes32dsmi x4, x17, x4, 0 # perform operation +800039fc: 2e488233 aes32dsmi x4,x17,x4,0x0 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes32dsmi_cg_cmp_rd_rs2_b4, Zknd_aes32dsmi_cg_cmp_rd_rs2_b4_str) +80003a00: 00062383 lw x7,0(x12) +80003a04: 00438863 beq x7,x4,80003a14 +80003a08: 7d00446f jal x8,800081d8 +80003a0c: 800039fc .word 0x800039fc +80003a10: 800139b0 .word 0x800139b0 +80003a14: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0xa03e6bb5 +80003a18: 000f2483 lw x9,0(x30) +80003a1c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs2: x5 = 0xb4251312 +80003a20: 000f2283 lw x5,0(x30) +80003a24: 004f0f13 addi x30,x30,4 + +80003a28 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b5: + aes32dsmi x5, x9, x5, 1 # perform operation +80003a28: 6e5482b3 aes32dsmi x5,x9,x5,0x1 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes32dsmi_cg_cmp_rd_rs2_b5, Zknd_aes32dsmi_cg_cmp_rd_rs2_b5_str) +80003a2c: 00062383 lw x7,0(x12) +80003a30: 00538863 beq x7,x5,80003a40 +80003a34: 7a40446f jal x8,800081d8 +80003a38: 80003a28 .word 0x80003a28 +80003a3c: 800139ec .word 0x800139ec +80003a40: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0xd349b97c +80003a44: 000f2083 lw x1,0(x30) +80003a48: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0x84d3a689 +80003a4c: 000f2303 lw x6,0(x30) +80003a50: 004f0f13 addi x30,x30,4 + +80003a54 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b6: + aes32dsmi x6, x1, x6, 3 # perform operation +80003a54: ee608333 aes32dsmi x6,x1,x6,0x3 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes32dsmi_cg_cmp_rd_rs2_b6, Zknd_aes32dsmi_cg_cmp_rd_rs2_b6_str) +80003a58: 00062383 lw x7,0(x12) +80003a5c: 00638863 beq x7,x6,80003a6c +80003a60: 7780446f jal x8,800081d8 +80003a64: 80003a54 .word 0x80003a54 +80003a68: 80013a28 .word 0x80013a28 +80003a6c: 00460613 addi x12,x12,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a70: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a74: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x74c8b692 +80003a78: 000f2e83 lw x29,0(x30) +80003a7c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs2: x7 = 0x30b5ae34 +80003a80: 000f2383 lw x7,0(x30) +80003a84: 004f0f13 addi x30,x30,4 + +80003a88 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b7: + aes32dsmi x7, x29, x7, 3 # perform operation +80003a88: ee7e83b3 aes32dsmi x7,x29,x7,0x3 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes32dsmi_cg_cmp_rd_rs2_b7, Zknd_aes32dsmi_cg_cmp_rd_rs2_b7_str) +80003a8c: 00062203 lw x4,0(x12) +80003a90: 00720863 beq x4,x7,80003aa0 +80003a94: 72c042ef jal x5,800081c0 +80003a98: 80003a88 .word 0x80003a88 +80003a9c: 80013a64 .word 0x80013a64 +80003aa0: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x49e9cb96 +80003aa4: 000f2083 lw x1,0(x30) +80003aa8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0xa639a150 +80003aac: 000f2403 lw x8,0(x30) +80003ab0: 004f0f13 addi x30,x30,4 + +80003ab4 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b8: + aes32dsmi x8, x1, x8, 1 # perform operation +80003ab4: 6e808433 aes32dsmi x8,x1,x8,0x1 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes32dsmi_cg_cmp_rd_rs2_b8, Zknd_aes32dsmi_cg_cmp_rd_rs2_b8_str) +80003ab8: 00062203 lw x4,0(x12) +80003abc: 00820863 beq x4,x8,80003acc +80003ac0: 700042ef jal x5,800081c0 +80003ac4: 80003ab4 .word 0x80003ab4 +80003ac8: 80013aa0 .word 0x80013aa0 +80003acc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x03beedbe +80003ad0: 000f2103 lw x2,0(x30) +80003ad4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0xe96abf24 +80003ad8: 000f2483 lw x9,0(x30) +80003adc: 004f0f13 addi x30,x30,4 + +80003ae0 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b9: + aes32dsmi x9, x2, x9, 1 # perform operation +80003ae0: 6e9104b3 aes32dsmi x9,x2,x9,0x1 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zknd_aes32dsmi_cg_cmp_rd_rs2_b9, Zknd_aes32dsmi_cg_cmp_rd_rs2_b9_str) +80003ae4: 00062203 lw x4,0(x12) +80003ae8: 00920863 beq x4,x9,80003af8 +80003aec: 6d4042ef jal x5,800081c0 +80003af0: 80003ae0 .word 0x80003ae0 +80003af4: 80013adc .word 0x80013adc +80003af8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x99ac5c70 +80003afc: 000f2403 lw x8,0(x30) +80003b00: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xdf6b3599 +80003b04: 000f2503 lw x10,0(x30) +80003b08: 004f0f13 addi x30,x30,4 + +80003b0c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b10: + aes32dsmi x10, x8, x10, 2 # perform operation +80003b0c: aea40533 aes32dsmi x10,x8,x10,0x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes32dsmi_cg_cmp_rd_rs2_b10, Zknd_aes32dsmi_cg_cmp_rd_rs2_b10_str) +80003b10: 00062203 lw x4,0(x12) +80003b14: 00a20863 beq x4,x10,80003b24 +80003b18: 6a8042ef jal x5,800081c0 +80003b1c: 80003b0c .word 0x80003b0c +80003b20: 80013b18 .word 0x80013b18 +80003b24: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0xed4e8dde +80003b28: 000f2903 lw x18,0(x30) +80003b2c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x2ce98b06 +80003b30: 000f2583 lw x11,0(x30) +80003b34: 004f0f13 addi x30,x30,4 + +80003b38 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b11: + aes32dsmi x11, x18, x11, 1 # perform operation +80003b38: 6eb905b3 aes32dsmi x11,x18,x11,0x1 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes32dsmi_cg_cmp_rd_rs2_b11, Zknd_aes32dsmi_cg_cmp_rd_rs2_b11_str) +80003b3c: 00062203 lw x4,0(x12) +80003b40: 00b20863 beq x4,x11,80003b50 +80003b44: 67c042ef jal x5,800081c0 +80003b48: 80003b38 .word 0x80003b38 +80003b4c: 80013b55 .word 0x80013b55 +80003b50: 00460613 addi x12,x12,4 + + mv x25, x12 # switch signature pointer register to avoid conflict with test +80003b54: 00060c93 addi x25,x12,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x7a67ae5d +80003b58: 000f2483 lw x9,0(x30) +80003b5c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xd4c20223 +80003b60: 000f2603 lw x12,0(x30) +80003b64: 004f0f13 addi x30,x30,4 + +80003b68 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b12: + aes32dsmi x12, x9, x12, 3 # perform operation +80003b68: eec48633 aes32dsmi x12,x9,x12,0x3 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknd_aes32dsmi_cg_cmp_rd_rs2_b12, Zknd_aes32dsmi_cg_cmp_rd_rs2_b12_str) +80003b6c: 000ca203 lw x4,0(x25) +80003b70: 00c20863 beq x4,x12,80003b80 +80003b74: 64c042ef jal x5,800081c0 +80003b78: 80003b68 .word 0x80003b68 +80003b7c: 80013b92 .word 0x80013b92 +80003b80: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x458ca898 +80003b84: 000f2103 lw x2,0(x30) +80003b88: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0xcfca5490 +80003b8c: 000f2683 lw x13,0(x30) +80003b90: 004f0f13 addi x30,x30,4 + +80003b94 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b13: + aes32dsmi x13, x2, x13, 3 # perform operation +80003b94: eed106b3 aes32dsmi x13,x2,x13,0x3 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rd_rs2_b13, Zknd_aes32dsmi_cg_cmp_rd_rs2_b13_str) +80003b98: 000ca203 lw x4,0(x25) +80003b9c: 00d20863 beq x4,x13,80003bac +80003ba0: 620042ef jal x5,800081c0 +80003ba4: 80003b94 .word 0x80003b94 +80003ba8: 80013bcf .word 0x80013bcf +80003bac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x7511c39d +80003bb0: 000f2b03 lw x22,0(x30) +80003bb4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x69897b98 +80003bb8: 000f2703 lw x14,0(x30) +80003bbc: 004f0f13 addi x30,x30,4 + +80003bc0 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b14: + aes32dsmi x14, x22, x14, 0 # perform operation +80003bc0: 2eeb0733 aes32dsmi x14,x22,x14,0x0 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknd_aes32dsmi_cg_cmp_rd_rs2_b14, Zknd_aes32dsmi_cg_cmp_rd_rs2_b14_str) +80003bc4: 000ca203 lw x4,0(x25) +80003bc8: 00e20863 beq x4,x14,80003bd8 +80003bcc: 5f4042ef jal x5,800081c0 +80003bd0: 80003bc0 .word 0x80003bc0 +80003bd4: 80013c0c .word 0x80013c0c +80003bd8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0xdd80206f +80003bdc: 000f2103 lw x2,0(x30) +80003be0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x616ac1f9 +80003be4: 000f2783 lw x15,0(x30) +80003be8: 004f0f13 addi x30,x30,4 + +80003bec : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b15: + aes32dsmi x15, x2, x15, 0 # perform operation +80003bec: 2ef107b3 aes32dsmi x15,x2,x15,0x0 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknd_aes32dsmi_cg_cmp_rd_rs2_b15, Zknd_aes32dsmi_cg_cmp_rd_rs2_b15_str) +80003bf0: 000ca203 lw x4,0(x25) +80003bf4: 00f20863 beq x4,x15,80003c04 +80003bf8: 5c8042ef jal x5,800081c0 +80003bfc: 80003bec .word 0x80003bec +80003c00: 80013c49 .word 0x80013c49 +80003c04: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x664c5363 +80003c08: 000f2883 lw x17,0(x30) +80003c0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x2e26967f +80003c10: 000f2803 lw x16,0(x30) +80003c14: 004f0f13 addi x30,x30,4 + +80003c18 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b16: + aes32dsmi x16, x17, x16, 3 # perform operation +80003c18: ef088833 aes32dsmi x16,x17,x16,0x3 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknd_aes32dsmi_cg_cmp_rd_rs2_b16, Zknd_aes32dsmi_cg_cmp_rd_rs2_b16_str) +80003c1c: 000ca203 lw x4,0(x25) +80003c20: 01020863 beq x4,x16,80003c30 +80003c24: 59c042ef jal x5,800081c0 +80003c28: 80003c18 .word 0x80003c18 +80003c2c: 80013c86 .word 0x80013c86 +80003c30: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x60ccdb74 +80003c34: 000f2083 lw x1,0(x30) +80003c38: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x911443be +80003c3c: 000f2883 lw x17,0(x30) +80003c40: 004f0f13 addi x30,x30,4 + +80003c44 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b17: + aes32dsmi x17, x1, x17, 3 # perform operation +80003c44: ef1088b3 aes32dsmi x17,x1,x17,0x3 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknd_aes32dsmi_cg_cmp_rd_rs2_b17, Zknd_aes32dsmi_cg_cmp_rd_rs2_b17_str) +80003c48: 000ca203 lw x4,0(x25) +80003c4c: 01120863 beq x4,x17,80003c5c +80003c50: 570042ef jal x5,800081c0 +80003c54: 80003c44 .word 0x80003c44 +80003c58: 80013cc3 .word 0x80013cc3 +80003c5c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xa781ded0 +80003c60: 000f2603 lw x12,0(x30) +80003c64: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x797940c0 +80003c68: 000f2903 lw x18,0(x30) +80003c6c: 004f0f13 addi x30,x30,4 + +80003c70 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b18: + aes32dsmi x18, x12, x18, 1 # perform operation +80003c70: 6f260933 aes32dsmi x18,x12,x18,0x1 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknd_aes32dsmi_cg_cmp_rd_rs2_b18, Zknd_aes32dsmi_cg_cmp_rd_rs2_b18_str) +80003c74: 000ca203 lw x4,0(x25) +80003c78: 01220863 beq x4,x18,80003c88 +80003c7c: 544042ef jal x5,800081c0 +80003c80: 80003c70 .word 0x80003c70 +80003c84: 80013d00 .word 0x80013d00 +80003c88: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0xbe7c0178 +80003c8c: 000f2003 lw x0,0(x30) +80003c90: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x36fd801a +80003c94: 000f2983 lw x19,0(x30) +80003c98: 004f0f13 addi x30,x30,4 + +80003c9c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b19: + aes32dsmi x19, x0, x19, 2 # perform operation +80003c9c: af3009b3 aes32dsmi x19,x0,x19,0x2 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes32dsmi_cg_cmp_rd_rs2_b19, Zknd_aes32dsmi_cg_cmp_rd_rs2_b19_str) +80003ca0: 000ca203 lw x4,0(x25) +80003ca4: 01320863 beq x4,x19,80003cb4 +80003ca8: 518042ef jal x5,800081c0 +80003cac: 80003c9c .word 0x80003c9c +80003cb0: 80013d3d .word 0x80013d3d +80003cb4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x20fde3b1 +80003cb8: 000f2183 lw x3,0(x30) +80003cbc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x078a672d +80003cc0: 000f2a03 lw x20,0(x30) +80003cc4: 004f0f13 addi x30,x30,4 + +80003cc8 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b20: + aes32dsmi x20, x3, x20, 1 # perform operation +80003cc8: 6f418a33 aes32dsmi x20,x3,x20,0x1 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknd_aes32dsmi_cg_cmp_rd_rs2_b20, Zknd_aes32dsmi_cg_cmp_rd_rs2_b20_str) +80003ccc: 000ca203 lw x4,0(x25) +80003cd0: 01420863 beq x4,x20,80003ce0 +80003cd4: 4ec042ef jal x5,800081c0 +80003cd8: 80003cc8 .word 0x80003cc8 +80003cdc: 80013d7a .word 0x80013d7a +80003ce0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xabec2354 +80003ce4: 000f2e83 lw x29,0(x30) +80003ce8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0xf0e5e4b2 +80003cec: 000f2a83 lw x21,0(x30) +80003cf0: 004f0f13 addi x30,x30,4 + +80003cf4 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b21: + aes32dsmi x21, x29, x21, 3 # perform operation +80003cf4: ef5e8ab3 aes32dsmi x21,x29,x21,0x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknd_aes32dsmi_cg_cmp_rd_rs2_b21, Zknd_aes32dsmi_cg_cmp_rd_rs2_b21_str) +80003cf8: 000ca203 lw x4,0(x25) +80003cfc: 01520863 beq x4,x21,80003d0c +80003d00: 4c0042ef jal x5,800081c0 +80003d04: 80003cf4 .word 0x80003cf4 +80003d08: 80013db7 .word 0x80013db7 +80003d0c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0xa32b6973 +80003d10: 000f2903 lw x18,0(x30) +80003d14: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x32edac2e +80003d18: 000f2b03 lw x22,0(x30) +80003d1c: 004f0f13 addi x30,x30,4 + +80003d20 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b22: + aes32dsmi x22, x18, x22, 1 # perform operation +80003d20: 6f690b33 aes32dsmi x22,x18,x22,0x1 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknd_aes32dsmi_cg_cmp_rd_rs2_b22, Zknd_aes32dsmi_cg_cmp_rd_rs2_b22_str) +80003d24: 000ca203 lw x4,0(x25) +80003d28: 01620863 beq x4,x22,80003d38 +80003d2c: 494042ef jal x5,800081c0 +80003d30: 80003d20 .word 0x80003d20 +80003d34: 80013df4 .word 0x80013df4 +80003d38: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x602ef0a3 +80003d3c: 000f2e83 lw x29,0(x30) +80003d40: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x63a0ab36 +80003d44: 000f2b83 lw x23,0(x30) +80003d48: 004f0f13 addi x30,x30,4 + +80003d4c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b23: + aes32dsmi x23, x29, x23, 1 # perform operation +80003d4c: 6f7e8bb3 aes32dsmi x23,x29,x23,0x1 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes32dsmi_cg_cmp_rd_rs2_b23, Zknd_aes32dsmi_cg_cmp_rd_rs2_b23_str) +80003d50: 000ca203 lw x4,0(x25) +80003d54: 01720863 beq x4,x23,80003d64 +80003d58: 468042ef jal x5,800081c0 +80003d5c: 80003d4c .word 0x80003d4c +80003d60: 80013e31 .word 0x80013e31 +80003d64: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xe1a39962 +80003d68: 000f2e03 lw x28,0(x30) +80003d6c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xe34f3d4c +80003d70: 000f2c03 lw x24,0(x30) +80003d74: 004f0f13 addi x30,x30,4 + +80003d78 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b24: + aes32dsmi x24, x28, x24, 2 # perform operation +80003d78: af8e0c33 aes32dsmi x24,x28,x24,0x2 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknd_aes32dsmi_cg_cmp_rd_rs2_b24, Zknd_aes32dsmi_cg_cmp_rd_rs2_b24_str) +80003d7c: 000ca203 lw x4,0(x25) +80003d80: 01820863 beq x4,x24,80003d90 +80003d84: 43c042ef jal x5,800081c0 +80003d88: 80003d78 .word 0x80003d78 +80003d8c: 80013e6e .word 0x80013e6e +80003d90: 004c8c93 addi x25,x25,4 + + mv x26, x25 # switch signature pointer register to avoid conflict with test +80003d94: 000c8d13 addi x26,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0xce80090d +80003d98: 000f2703 lw x14,0(x30) +80003d9c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0xacfe08ca +80003da0: 000f2c83 lw x25,0(x30) +80003da4: 004f0f13 addi x30,x30,4 + +80003da8 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b25: + aes32dsmi x25, x14, x25, 3 # perform operation +80003da8: ef970cb3 aes32dsmi x25,x14,x25,0x3 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknd_aes32dsmi_cg_cmp_rd_rs2_b25, Zknd_aes32dsmi_cg_cmp_rd_rs2_b25_str) +80003dac: 000d2203 lw x4,0(x26) +80003db0: 01920863 beq x4,x25,80003dc0 +80003db4: 40c042ef jal x5,800081c0 +80003db8: 80003da8 .word 0x80003da8 +80003dbc: 80013eab .word 0x80013eab +80003dc0: 004d0d13 addi x26,x26,4 + + mv x23, x26 # switch signature pointer register to avoid conflict with test +80003dc4: 000d0b93 addi x23,x26,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x37a2f88d +80003dc8: 000f2583 lw x11,0(x30) +80003dcc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x71c78a69 +80003dd0: 000f2d03 lw x26,0(x30) +80003dd4: 004f0f13 addi x30,x30,4 + +80003dd8 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b26: + aes32dsmi x26, x11, x26, 2 # perform operation +80003dd8: afa58d33 aes32dsmi x26,x11,x26,0x2 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zknd_aes32dsmi_cg_cmp_rd_rs2_b26, Zknd_aes32dsmi_cg_cmp_rd_rs2_b26_str) +80003ddc: 000ba203 lw x4,0(x23) +80003de0: 01a20863 beq x4,x26,80003df0 +80003de4: 3dc042ef jal x5,800081c0 +80003de8: 80003dd8 .word 0x80003dd8 +80003dec: 80013ee8 .word 0x80013ee8 +80003df0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0xe36c753f +80003df4: 000f2a03 lw x20,0(x30) +80003df8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xaa730fb3 +80003dfc: 000f2d83 lw x27,0(x30) +80003e00: 004f0f13 addi x30,x30,4 + +80003e04 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b27: + aes32dsmi x27, x20, x27, 0 # perform operation +80003e04: 2fba0db3 aes32dsmi x27,x20,x27,0x0 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zknd_aes32dsmi_cg_cmp_rd_rs2_b27, Zknd_aes32dsmi_cg_cmp_rd_rs2_b27_str) +80003e08: 000ba203 lw x4,0(x23) +80003e0c: 01b20863 beq x4,x27,80003e1c +80003e10: 3b0042ef jal x5,800081c0 +80003e14: 80003e04 .word 0x80003e04 +80003e18: 80013f25 .word 0x80013f25 +80003e1c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x887ae32c +80003e20: 000f2703 lw x14,0(x30) +80003e24: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xe082b2be +80003e28: 000f2e03 lw x28,0(x30) +80003e2c: 004f0f13 addi x30,x30,4 + +80003e30 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b28: + aes32dsmi x28, x14, x28, 3 # perform operation +80003e30: efc70e33 aes32dsmi x28,x14,x28,0x3 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zknd_aes32dsmi_cg_cmp_rd_rs2_b28, Zknd_aes32dsmi_cg_cmp_rd_rs2_b28_str) +80003e34: 000ba203 lw x4,0(x23) +80003e38: 01c20863 beq x4,x28,80003e48 +80003e3c: 384042ef jal x5,800081c0 +80003e40: 80003e30 .word 0x80003e30 +80003e44: 80013f62 .word 0x80013f62 +80003e48: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xffba69d9 +80003e4c: 000f2d03 lw x26,0(x30) +80003e50: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xe61fb911 +80003e54: 000f2e83 lw x29,0(x30) +80003e58: 004f0f13 addi x30,x30,4 + +80003e5c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b29: + aes32dsmi x29, x26, x29, 1 # perform operation +80003e5c: 6fdd0eb3 aes32dsmi x29,x26,x29,0x1 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zknd_aes32dsmi_cg_cmp_rd_rs2_b29, Zknd_aes32dsmi_cg_cmp_rd_rs2_b29_str) +80003e60: 000ba203 lw x4,0(x23) +80003e64: 01d20863 beq x4,x29,80003e74 +80003e68: 358042ef jal x5,800081c0 +80003e6c: 80003e5c .word 0x80003e5c +80003e70: 80013f9f .word 0x80013f9f +80003e74: 004b8b93 addi x23,x23,4 + + mv x29, x30 # switch data pointer register to avoid conflict with test +80003e78: 000f0e93 addi x29,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x78c44aac +80003e7c: 000ea903 lw x18,0(x29) +80003e80: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x456a3e67 +80003e84: 000eaf03 lw x30,0(x29) +80003e88: 004e8e93 addi x29,x29,4 + +80003e8c : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b30: + aes32dsmi x30, x18, x30, 3 # perform operation +80003e8c: efe90f33 aes32dsmi x30,x18,x30,0x3 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zknd_aes32dsmi_cg_cmp_rd_rs2_b30, Zknd_aes32dsmi_cg_cmp_rd_rs2_b30_str) +80003e90: 000ba203 lw x4,0(x23) +80003e94: 01e20863 beq x4,x30,80003ea4 +80003e98: 328042ef jal x5,800081c0 +80003e9c: 80003e8c .word 0x80003e8c +80003ea0: 80013fdc .word 0x80013fdc +80003ea4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0xfecbe1aa +80003ea8: 000ea803 lw x16,0(x29) +80003eac: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x9db07356 +80003eb0: 000eaf83 lw x31,0(x29) +80003eb4: 004e8e93 addi x29,x29,4 + +80003eb8 : +Zknd_aes32dsmi_cg_cmp_rd_rs2_b31: + aes32dsmi x31, x16, x31, 2 # perform operation +80003eb8: aff80fb3 aes32dsmi x31,x16,x31,0x2 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zknd_aes32dsmi_cg_cmp_rd_rs2_b31, Zknd_aes32dsmi_cg_cmp_rd_rs2_b31_str) +80003ebc: 000ba203 lw x4,0(x23) +80003ec0: 01f20863 beq x4,x31,80003ed0 +80003ec4: 2fc042ef jal x5,800081c0 +80003ec8: 80003eb8 .word 0x80003eb8 +80003ecc: 80014019 .word 0x80014019 +80003ed0: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs1: x0 = 0xbe96e2b2 +80003ed4: 000ea003 lw x0,0(x29) +80003ed8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x4f24440d +80003edc: 000ea003 lw x0,0(x29) +80003ee0: 004e8e93 addi x29,x29,4 + +80003ee4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b0: + aes32dsmi x0, x0, x0, 0 # perform operation +80003ee4: 2e000033 aes32dsmi x0,x0,x0,0x0 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b0, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b0_str) +80003ee8: 000ba203 lw x4,0(x23) +80003eec: 00020863 beq x4,x0,80003efc +80003ef0: 2d0042ef jal x5,800081c0 +80003ef4: 80003ee4 .word 0x80003ee4 +80003ef8: 80014056 .word 0x80014056 +80003efc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs1: x1 = 0xa52b4721 +80003f00: 000ea083 lw x1,0(x29) +80003f04: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0xeeb1cf5f +80003f08: 000ea083 lw x1,0(x29) +80003f0c: 004e8e93 addi x29,x29,4 + +80003f10 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b1: + aes32dsmi x1, x1, x1, 1 # perform operation +80003f10: 6e1080b3 aes32dsmi x1,x1,x1,0x1 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b1, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b1_str) +80003f14: 000ba203 lw x4,0(x23) +80003f18: 00120863 beq x4,x1,80003f28 +80003f1c: 2a4042ef jal x5,800081c0 +80003f20: 80003f10 .word 0x80003f10 +80003f24: 80014096 .word 0x80014096 +80003f28: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs1: x2 = 0xe66d7408 +80003f2c: 000ea103 lw x2,0(x29) +80003f30: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x495a47bc +80003f34: 000ea103 lw x2,0(x29) +80003f38: 004e8e93 addi x29,x29,4 + +80003f3c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b2: + aes32dsmi x2, x2, x2, 1 # perform operation +80003f3c: 6e210133 aes32dsmi x2,x2,x2,0x1 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b2, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b2_str) +80003f40: 000ba203 lw x4,0(x23) +80003f44: 00220863 beq x4,x2,80003f54 +80003f48: 278042ef jal x5,800081c0 +80003f4c: 80003f3c .word 0x80003f3c +80003f50: 800140d6 .word 0x800140d6 +80003f54: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0xd1c36a91 +80003f58: 000ea183 lw x3,0(x29) +80003f5c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs2: x3 = 0x2df5a491 +80003f60: 000ea183 lw x3,0(x29) +80003f64: 004e8e93 addi x29,x29,4 + +80003f68 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b3: + aes32dsmi x3, x3, x3, 2 # perform operation +80003f68: ae3181b3 aes32dsmi x3,x3,x3,0x2 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b3, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b3_str) +80003f6c: 000ba203 lw x4,0(x23) +80003f70: 00320863 beq x4,x3,80003f80 +80003f74: 24c042ef jal x5,800081c0 +80003f78: 80003f68 .word 0x80003f68 +80003f7c: 80014116 .word 0x80014116 +80003f80: 004b8b93 addi x23,x23,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f84: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f88: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x6f0dcbcd +80003f8c: 000ea203 lw x4,0(x29) +80003f90: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs2: x4 = 0x55b8aa36 +80003f94: 000ea203 lw x4,0(x29) +80003f98: 004e8e93 addi x29,x29,4 + +80003f9c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b4: + aes32dsmi x4, x4, x4, 1 # perform operation +80003f9c: 6e420233 aes32dsmi x4,x4,x4,0x1 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b4, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b4_str) +80003fa0: 000ba683 lw x13,0(x23) +80003fa4: 00468863 beq x13,x4,80003fb4 +80003fa8: 2580476f jal x14,80008200 +80003fac: 80003f9c .word 0x80003f9c +80003fb0: 80014156 .word 0x80014156 +80003fb4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0xc01b02ad +80003fb8: 000ea283 lw x5,0(x29) +80003fbc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs2: x5 = 0x52934079 +80003fc0: 000ea283 lw x5,0(x29) +80003fc4: 004e8e93 addi x29,x29,4 + +80003fc8 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b5: + aes32dsmi x5, x5, x5, 0 # perform operation +80003fc8: 2e5282b3 aes32dsmi x5,x5,x5,0x0 + # Check if x5 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x5, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b5, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b5_str) +80003fcc: 000ba683 lw x13,0(x23) +80003fd0: 00568863 beq x13,x5,80003fe0 +80003fd4: 22c0476f jal x14,80008200 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 80014196 .word 0x80014196 +80003fe0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x4733a53d +80003fe4: 000ea303 lw x6,0(x29) +80003fe8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0x1ced925f +80003fec: 000ea303 lw x6,0(x29) +80003ff0: 004e8e93 addi x29,x29,4 + +80003ff4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b6: + aes32dsmi x6, x6, x6, 3 # perform operation +80003ff4: ee630333 aes32dsmi x6,x6,x6,0x3 + # Check if x6 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x6, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b6, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b6_str) +80003ff8: 000ba683 lw x13,0(x23) +80003ffc: 00668863 beq x13,x6,8000400c +80004000: 2000476f jal x14,80008200 +80004004: 80003ff4 .word 0x80003ff4 +80004008: 800141d6 .word 0x800141d6 +8000400c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0x7cba9f3a +80004010: 000ea383 lw x7,0(x29) +80004014: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0x3d484d70 +80004018: 000ea383 lw x7,0(x29) +8000401c: 004e8e93 addi x29,x29,4 + +80004020 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b7: + aes32dsmi x7, x7, x7, 1 # perform operation +80004020: 6e7383b3 aes32dsmi x7,x7,x7,0x1 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b7, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b7_str) +80004024: 000ba683 lw x13,0(x23) +80004028: 00768863 beq x13,x7,80004038 +8000402c: 1d40476f jal x14,80008200 +80004030: 80004020 .word 0x80004020 +80004034: 80014216 .word 0x80014216 +80004038: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x53ec6f2d +8000403c: 000ea403 lw x8,0(x29) +80004040: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0x1abdd7c2 +80004044: 000ea403 lw x8,0(x29) +80004048: 004e8e93 addi x29,x29,4 + +8000404c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b8: + aes32dsmi x8, x8, x8, 0 # perform operation +8000404c: 2e840433 aes32dsmi x8,x8,x8,0x0 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b8, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b8_str) +80004050: 000ba683 lw x13,0(x23) +80004054: 00868863 beq x13,x8,80004064 +80004058: 1a80476f jal x14,80008200 +8000405c: 8000404c .word 0x8000404c +80004060: 80014256 .word 0x80014256 +80004064: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x78d62766 +80004068: 000ea483 lw x9,0(x29) +8000406c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs2: x9 = 0x64a21a12 +80004070: 000ea483 lw x9,0(x29) +80004074: 004e8e93 addi x29,x29,4 + +80004078 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b9: + aes32dsmi x9, x9, x9, 3 # perform operation +80004078: ee9484b3 aes32dsmi x9,x9,x9,0x3 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b9, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b9_str) +8000407c: 000ba683 lw x13,0(x23) +80004080: 00968863 beq x13,x9,80004090 +80004084: 17c0476f jal x14,80008200 +80004088: 80004078 .word 0x80004078 +8000408c: 80014296 .word 0x80014296 +80004090: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xcec14a75 +80004094: 000ea503 lw x10,0(x29) +80004098: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x6e717205 +8000409c: 000ea503 lw x10,0(x29) +800040a0: 004e8e93 addi x29,x29,4 + +800040a4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b10: + aes32dsmi x10, x10, x10, 2 # perform operation +800040a4: aea50533 aes32dsmi x10,x10,x10,0x2 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b10, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b10_str) +800040a8: 000ba683 lw x13,0(x23) +800040ac: 00a68863 beq x13,x10,800040bc +800040b0: 1500476f jal x14,80008200 +800040b4: 800040a4 .word 0x800040a4 +800040b8: 800142d6 .word 0x800142d6 +800040bc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0xb937a1cc +800040c0: 000ea583 lw x11,0(x29) +800040c4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xc02fbd51 +800040c8: 000ea583 lw x11,0(x29) +800040cc: 004e8e93 addi x29,x29,4 + +800040d0 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b11: + aes32dsmi x11, x11, x11, 0 # perform operation +800040d0: 2eb585b3 aes32dsmi x11,x11,x11,0x0 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b11, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b11_str) +800040d4: 000ba683 lw x13,0(x23) +800040d8: 00b68863 beq x13,x11,800040e8 +800040dc: 1240476f jal x14,80008200 +800040e0: 800040d0 .word 0x800040d0 +800040e4: 80014317 .word 0x80014317 +800040e8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xd79dfdc0 +800040ec: 000ea603 lw x12,0(x29) +800040f0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x4c723d2b +800040f4: 000ea603 lw x12,0(x29) +800040f8: 004e8e93 addi x29,x29,4 + +800040fc : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b12: + aes32dsmi x12, x12, x12, 0 # perform operation +800040fc: 2ec60633 aes32dsmi x12,x12,x12,0x0 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b12, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b12_str) +80004100: 000ba683 lw x13,0(x23) +80004104: 00c68863 beq x13,x12,80004114 +80004108: 0f80476f jal x14,80008200 +8000410c: 800040fc .word 0x800040fc +80004110: 80014358 .word 0x80014358 +80004114: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80004118: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000411c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x783e4c5d +80004120: 000ea683 lw x13,0(x29) +80004124: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0x557ad63e +80004128: 000ea683 lw x13,0(x29) +8000412c: 004e8e93 addi x29,x29,4 + +80004130 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b13: + aes32dsmi x13, x13, x13, 1 # perform operation +80004130: 6ed686b3 aes32dsmi x13,x13,x13,0x1 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b13, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b13_str) +80004134: 000ba203 lw x4,0(x23) +80004138: 00d20863 beq x4,x13,80004148 +8000413c: 084042ef jal x5,800081c0 +80004140: 80004130 .word 0x80004130 +80004144: 80014399 .word 0x80014399 +80004148: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x866047be +8000414c: 000ea703 lw x14,0(x29) +80004150: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x04fb859e +80004154: 000ea703 lw x14,0(x29) +80004158: 004e8e93 addi x29,x29,4 + +8000415c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b14: + aes32dsmi x14, x14, x14, 0 # perform operation +8000415c: 2ee70733 aes32dsmi x14,x14,x14,0x0 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b14, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b14_str) +80004160: 000ba203 lw x4,0(x23) +80004164: 00e20863 beq x4,x14,80004174 +80004168: 058042ef jal x5,800081c0 +8000416c: 8000415c .word 0x8000415c +80004170: 800143da .word 0x800143da +80004174: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x513f39ad +80004178: 000ea783 lw x15,0(x29) +8000417c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xfa549113 +80004180: 000ea783 lw x15,0(x29) +80004184: 004e8e93 addi x29,x29,4 + +80004188 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b15: + aes32dsmi x15, x15, x15, 3 # perform operation +80004188: eef787b3 aes32dsmi x15,x15,x15,0x3 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b15, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b15_str) +8000418c: 000ba203 lw x4,0(x23) +80004190: 00f20863 beq x4,x15,800041a0 +80004194: 02c042ef jal x5,800081c0 +80004198: 80004188 .word 0x80004188 +8000419c: 8001441b .word 0x8001441b +800041a0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0xe7004c0d +800041a4: 000ea803 lw x16,0(x29) +800041a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x9452bf84 +800041ac: 000ea803 lw x16,0(x29) +800041b0: 004e8e93 addi x29,x29,4 + +800041b4 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b16: + aes32dsmi x16, x16, x16, 2 # perform operation +800041b4: af080833 aes32dsmi x16,x16,x16,0x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b16, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b16_str) +800041b8: 000ba203 lw x4,0(x23) +800041bc: 01020863 beq x4,x16,800041cc +800041c0: 000042ef jal x5,800081c0 +800041c4: 800041b4 .word 0x800041b4 +800041c8: 8001445c .word 0x8001445c +800041cc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xceff567e +800041d0: 000ea883 lw x17,0(x29) +800041d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x9bb32a3f +800041d8: 000ea883 lw x17,0(x29) +800041dc: 004e8e93 addi x29,x29,4 + +800041e0 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b17: + aes32dsmi x17, x17, x17, 0 # perform operation +800041e0: 2f1888b3 aes32dsmi x17,x17,x17,0x0 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b17, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b17_str) +800041e4: 000ba203 lw x4,0(x23) +800041e8: 01120863 beq x4,x17,800041f8 +800041ec: 7d5032ef jal x5,800081c0 +800041f0: 800041e0 .word 0x800041e0 +800041f4: 8001449d .word 0x8001449d +800041f8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x3372f087 +800041fc: 000ea903 lw x18,0(x29) +80004200: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x4867f254 +80004204: 000ea903 lw x18,0(x29) +80004208: 004e8e93 addi x29,x29,4 + +8000420c : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b18: + aes32dsmi x18, x18, x18, 2 # perform operation +8000420c: af290933 aes32dsmi x18,x18,x18,0x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b18, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b18_str) +80004210: 000ba203 lw x4,0(x23) +80004214: 01220863 beq x4,x18,80004224 +80004218: 7a9032ef jal x5,800081c0 +8000421c: 8000420c .word 0x8000420c +80004220: 800144de .word 0x800144de +80004224: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xe1ec0ff8 +80004228: 000ea983 lw x19,0(x29) +8000422c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x32a21cb7 +80004230: 000ea983 lw x19,0(x29) +80004234: 004e8e93 addi x29,x29,4 + +80004238 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b19: + aes32dsmi x19, x19, x19, 3 # perform operation +80004238: ef3989b3 aes32dsmi x19,x19,x19,0x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b19, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b19_str) +8000423c: 000ba203 lw x4,0(x23) +80004240: 01320863 beq x4,x19,80004250 +80004244: 77d032ef jal x5,800081c0 +80004248: 80004238 .word 0x80004238 +8000424c: 8001451f .word 0x8001451f +80004250: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x932f7bc2 +80004254: 000eaa03 lw x20,0(x29) +80004258: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs2: x20 = 0x73f8900e +8000425c: 000eaa03 lw x20,0(x29) +80004260: 004e8e93 addi x29,x29,4 + +80004264 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b20: + aes32dsmi x20, x20, x20, 1 # perform operation +80004264: 6f4a0a33 aes32dsmi x20,x20,x20,0x1 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b20, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b20_str) +80004268: 000ba203 lw x4,0(x23) +8000426c: 01420863 beq x4,x20,8000427c +80004270: 751032ef jal x5,800081c0 +80004274: 80004264 .word 0x80004264 +80004278: 80014560 .word 0x80014560 +8000427c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x265c7c2d +80004280: 000eaa83 lw x21,0(x29) +80004284: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0xe1cdd192 +80004288: 000eaa83 lw x21,0(x29) +8000428c: 004e8e93 addi x29,x29,4 + +80004290 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b21: + aes32dsmi x21, x21, x21, 1 # perform operation +80004290: 6f5a8ab3 aes32dsmi x21,x21,x21,0x1 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b21, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b21_str) +80004294: 000ba203 lw x4,0(x23) +80004298: 01520863 beq x4,x21,800042a8 +8000429c: 725032ef jal x5,800081c0 +800042a0: 80004290 .word 0x80004290 +800042a4: 800145a1 .word 0x800145a1 +800042a8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x954e2eb6 +800042ac: 000eab03 lw x22,0(x29) +800042b0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xe2471e87 +800042b4: 000eab03 lw x22,0(x29) +800042b8: 004e8e93 addi x29,x29,4 + +800042bc : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b22: + aes32dsmi x22, x22, x22, 1 # perform operation +800042bc: 6f6b0b33 aes32dsmi x22,x22,x22,0x1 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b22, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b22_str) +800042c0: 000ba203 lw x4,0(x23) +800042c4: 01620863 beq x4,x22,800042d4 +800042c8: 6f9032ef jal x5,800081c0 +800042cc: 800042bc .word 0x800042bc +800042d0: 800145e2 .word 0x800145e2 +800042d4: 004b8b93 addi x23,x23,4 + + mv x25, x23 # switch signature pointer register to avoid conflict with test +800042d8: 000b8c93 addi x25,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xf8f4d55e +800042dc: 000eab83 lw x23,0(x29) +800042e0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x7c1ab502 +800042e4: 000eab83 lw x23,0(x29) +800042e8: 004e8e93 addi x29,x29,4 + +800042ec : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b23: + aes32dsmi x23, x23, x23, 1 # perform operation +800042ec: 6f7b8bb3 aes32dsmi x23,x23,x23,0x1 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b23, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b23_str) +800042f0: 000ca203 lw x4,0(x25) +800042f4: 01720863 beq x4,x23,80004304 +800042f8: 6c9032ef jal x5,800081c0 +800042fc: 800042ec .word 0x800042ec +80004300: 80014623 .word 0x80014623 +80004304: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x95f06809 +80004308: 000eac03 lw x24,0(x29) +8000430c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0xa39c9d30 +80004310: 000eac03 lw x24,0(x29) +80004314: 004e8e93 addi x29,x29,4 + +80004318 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b24: + aes32dsmi x24, x24, x24, 0 # perform operation +80004318: 2f8c0c33 aes32dsmi x24,x24,x24,0x0 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b24, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b24_str) +8000431c: 000ca203 lw x4,0(x25) +80004320: 01820863 beq x4,x24,80004330 +80004324: 69d032ef jal x5,800081c0 +80004328: 80004318 .word 0x80004318 +8000432c: 80014664 .word 0x80014664 +80004330: 004c8c93 addi x25,x25,4 + + mv x1, x25 # switch signature pointer register to avoid conflict with test +80004334: 000c8093 addi x1,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x59f16553 +80004338: 000eac83 lw x25,0(x29) +8000433c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x26e5e304 +80004340: 000eac83 lw x25,0(x29) +80004344: 004e8e93 addi x29,x29,4 + +80004348 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b25: + aes32dsmi x25, x25, x25, 3 # perform operation +80004348: ef9c8cb3 aes32dsmi x25,x25,x25,0x3 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b25, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b25_str) +8000434c: 0000a203 lw x4,0(x1) +80004350: 01920863 beq x4,x25,80004360 +80004354: 66d032ef jal x5,800081c0 +80004358: 80004348 .word 0x80004348 +8000435c: 800146a5 .word 0x800146a5 +80004360: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x5e9ff9ee +80004364: 000ead03 lw x26,0(x29) +80004368: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xaf0b1298 +8000436c: 000ead03 lw x26,0(x29) +80004370: 004e8e93 addi x29,x29,4 + +80004374 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b26: + aes32dsmi x26, x26, x26, 0 # perform operation +80004374: 2fad0d33 aes32dsmi x26,x26,x26,0x0 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b26, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b26_str) +80004378: 0000a203 lw x4,0(x1) +8000437c: 01a20863 beq x4,x26,8000438c +80004380: 641032ef jal x5,800081c0 +80004384: 80004374 .word 0x80004374 +80004388: 800146e6 .word 0x800146e6 +8000438c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xe4f1cda0 +80004390: 000ead83 lw x27,0(x29) +80004394: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x051432e6 +80004398: 000ead83 lw x27,0(x29) +8000439c: 004e8e93 addi x29,x29,4 + +800043a0 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b27: + aes32dsmi x27, x27, x27, 1 # perform operation +800043a0: 6fbd8db3 aes32dsmi x27,x27,x27,0x1 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b27, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b27_str) +800043a4: 0000a203 lw x4,0(x1) +800043a8: 01b20863 beq x4,x27,800043b8 +800043ac: 615032ef jal x5,800081c0 +800043b0: 800043a0 .word 0x800043a0 +800043b4: 80014727 .word 0x80014727 +800043b8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xa02e80d8 +800043bc: 000eae03 lw x28,0(x29) +800043c0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x35142112 +800043c4: 000eae03 lw x28,0(x29) +800043c8: 004e8e93 addi x29,x29,4 + +800043cc : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b28: + aes32dsmi x28, x28, x28, 3 # perform operation +800043cc: efce0e33 aes32dsmi x28,x28,x28,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b28, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b28_str) +800043d0: 0000a203 lw x4,0(x1) +800043d4: 01c20863 beq x4,x28,800043e4 +800043d8: 5e9032ef jal x5,800081c0 +800043dc: 800043cc .word 0x800043cc +800043e0: 80014768 .word 0x80014768 +800043e4: 00408093 addi x1,x1,4 + + mv x6, x29 # switch data pointer register to avoid conflict with test +800043e8: 000e8313 addi x6,x29,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1b3e8c9c +800043ec: 00032e83 lw x29,0(x6) +800043f0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xf887f79e +800043f4: 00032e83 lw x29,0(x6) +800043f8: 00430313 addi x6,x6,4 + +800043fc : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b29: + aes32dsmi x29, x29, x29, 1 # perform operation +800043fc: 6fde8eb3 aes32dsmi x29,x29,x29,0x1 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b29, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b29_str) +80004400: 0000a203 lw x4,0(x1) +80004404: 01d20863 beq x4,x29,80004414 +80004408: 5b9032ef jal x5,800081c0 +8000440c: 800043fc .word 0x800043fc +80004410: 800147a9 .word 0x800147a9 +80004414: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x6e7af142 +80004418: 00032f03 lw x30,0(x6) +8000441c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xbdab8e74 +80004420: 00032f03 lw x30,0(x6) +80004424: 00430313 addi x6,x6,4 + +80004428 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b30: + aes32dsmi x30, x30, x30, 0 # perform operation +80004428: 2fef0f33 aes32dsmi x30,x30,x30,0x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b30, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b30_str) +8000442c: 0000a203 lw x4,0(x1) +80004430: 01e20863 beq x4,x30,80004440 +80004434: 58d032ef jal x5,800081c0 +80004438: 80004428 .word 0x80004428 +8000443c: 800147ea .word 0x800147ea +80004440: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xac347086 +80004444: 00032f83 lw x31,0(x6) +80004448: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0005086d +8000444c: 00032f83 lw x31,0(x6) +80004450: 00430313 addi x6,x6,4 + +80004454 : +Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b31: + aes32dsmi x31, x31, x31, 3 # perform operation +80004454: efff8fb3 aes32dsmi x31,x31,x31,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b31, Zknd_aes32dsmi_cg_cmp_rd_rs1_rs2_b31_str) +80004458: 0000a203 lw x4,0(x1) +8000445c: 01f20863 beq x4,x31,8000446c +80004460: 561032ef jal x5,800081c0 +80004464: 80004454 .word 0x80004454 +80004468: 8001482b .word 0x8001482b +8000446c: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x6448b072 +80004470: 00032983 lw x19,0(x6) +80004474: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xe9736f88 +80004478: 00032403 lw x8,0(x6) +8000447c: 00430313 addi x6,x6,4 + +80004480 : +Zknd_aes32dsmi_cg_cp_bs_b0: + aes32dsmi x30, x19, x8, 0 # perform operation +80004480: 2e898f33 aes32dsmi x30,x19,x8,0x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_bs_b0, Zknd_aes32dsmi_cg_cp_bs_b0_str) +80004484: 0000a203 lw x4,0(x1) +80004488: 01e20863 beq x4,x30,80004498 +8000448c: 535032ef jal x5,800081c0 +80004490: 80004480 .word 0x80004480 +80004494: 8001486c .word 0x8001486c +80004498: 00408093 addi x1,x1,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x1f74ce67 +8000449c: 00032003 lw x0,0(x6) +800044a0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x9d038a34 +800044a4: 00032c83 lw x25,0(x6) +800044a8: 00430313 addi x6,x6,4 + +800044ac : +Zknd_aes32dsmi_cg_cp_bs_b1: + aes32dsmi x16, x0, x25, 1 # perform operation +800044ac: 6f900833 aes32dsmi x16,x0,x25,0x1 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_bs_b1, Zknd_aes32dsmi_cg_cp_bs_b1_str) +800044b0: 0000a203 lw x4,0(x1) +800044b4: 01020863 beq x4,x16,800044c4 +800044b8: 509032ef jal x5,800081c0 +800044bc: 800044ac .word 0x800044ac +800044c0: 800148a3 .word 0x800148a3 +800044c4: 00408093 addi x1,x1,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x72cb9f8e +800044c8: 00032683 lw x13,0(x6) +800044cc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xbedd2a0d +800044d0: 00032403 lw x8,0(x6) +800044d4: 00430313 addi x6,x6,4 + +800044d8 : +Zknd_aes32dsmi_cg_cp_bs_b2: + aes32dsmi x12, x13, x8, 2 # perform operation +800044d8: ae868633 aes32dsmi x12,x13,x8,0x2 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_bs_b2, Zknd_aes32dsmi_cg_cp_bs_b2_str) +800044dc: 0000a203 lw x4,0(x1) +800044e0: 00c20863 beq x4,x12,800044f0 +800044e4: 4dd032ef jal x5,800081c0 +800044e8: 800044d8 .word 0x800044d8 +800044ec: 800148da .word 0x800148da +800044f0: 00408093 addi x1,x1,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x3ee97e4c +800044f4: 00032683 lw x13,0(x6) +800044f8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x549961ec +800044fc: 00032c03 lw x24,0(x6) +80004500: 00430313 addi x6,x6,4 + +80004504 : +Zknd_aes32dsmi_cg_cp_bs_b3: + aes32dsmi x10, x13, x24, 3 # perform operation +80004504: ef868533 aes32dsmi x10,x13,x24,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_bs_b3, Zknd_aes32dsmi_cg_cp_bs_b3_str) +80004508: 0000a203 lw x4,0(x1) +8000450c: 00a20863 beq x4,x10,8000451c +80004510: 4b1032ef jal x5,800081c0 +80004514: 80004504 .word 0x80004504 +80004518: 80014911 .word 0x80014911 +8000451c: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x00000000 +80004520: 00032e03 lw x28,0(x6) +80004524: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x00000000 +80004528: 00032403 lw x8,0(x6) +8000452c: 00430313 addi x6,x6,4 + +80004530 : +Zknd_aes32dsmi_cg_cp_sbox_b0: + aes32dsmi x27, x28, x8, 2 # perform operation +80004530: ae8e0db3 aes32dsmi x27,x28,x8,0x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b0, Zknd_aes32dsmi_cg_cp_sbox_b0_str) +80004534: 0000a203 lw x4,0(x1) +80004538: 01b20863 beq x4,x27,80004548 +8000453c: 485032ef jal x5,800081c0 +80004540: 80004530 .word 0x80004530 +80004544: 80014948 .word 0x80014948 +80004548: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x01010101 +8000454c: 00032503 lw x10,0(x6) +80004550: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x01010101 +80004554: 00032e03 lw x28,0(x6) +80004558: 00430313 addi x6,x6,4 + +8000455c : +Zknd_aes32dsmi_cg_cp_sbox_b1: + aes32dsmi x29, x10, x28, 1 # perform operation +8000455c: 6fc50eb3 aes32dsmi x29,x10,x28,0x1 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b1, Zknd_aes32dsmi_cg_cp_sbox_b1_str) +80004560: 0000a203 lw x4,0(x1) +80004564: 01d20863 beq x4,x29,80004574 +80004568: 459032ef jal x5,800081c0 +8000456c: 8000455c .word 0x8000455c +80004570: 80014981 .word 0x80014981 +80004574: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x02020202 +80004578: 00032403 lw x8,0(x6) +8000457c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x02020202 +80004580: 00032e83 lw x29,0(x6) +80004584: 00430313 addi x6,x6,4 + +80004588 : +Zknd_aes32dsmi_cg_cp_sbox_b2: + aes32dsmi x30, x8, x29, 3 # perform operation +80004588: efd40f33 aes32dsmi x30,x8,x29,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b2, Zknd_aes32dsmi_cg_cp_sbox_b2_str) +8000458c: 0000a203 lw x4,0(x1) +80004590: 01e20863 beq x4,x30,800045a0 +80004594: 42d032ef jal x5,800081c0 +80004598: 80004588 .word 0x80004588 +8000459c: 800149ba .word 0x800149ba +800045a0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x03030303 +800045a4: 00032703 lw x14,0(x6) +800045a8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x03030303 +800045ac: 00032503 lw x10,0(x6) +800045b0: 00430313 addi x6,x6,4 + +800045b4 : +Zknd_aes32dsmi_cg_cp_sbox_b3: + aes32dsmi x2, x14, x10, 3 # perform operation +800045b4: eea70133 aes32dsmi x2,x14,x10,0x3 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b3, Zknd_aes32dsmi_cg_cp_sbox_b3_str) +800045b8: 0000a203 lw x4,0(x1) +800045bc: 00220863 beq x4,x2,800045cc +800045c0: 401032ef jal x5,800081c0 +800045c4: 800045b4 .word 0x800045b4 +800045c8: 800149f3 .word 0x800149f3 +800045cc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x04040404 +800045d0: 00032903 lw x18,0(x6) +800045d4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x04040404 +800045d8: 00032983 lw x19,0(x6) +800045dc: 00430313 addi x6,x6,4 + +800045e0 : +Zknd_aes32dsmi_cg_cp_sbox_b4: + aes32dsmi x30, x18, x19, 1 # perform operation +800045e0: 6f390f33 aes32dsmi x30,x18,x19,0x1 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b4, Zknd_aes32dsmi_cg_cp_sbox_b4_str) +800045e4: 0000a203 lw x4,0(x1) +800045e8: 01e20863 beq x4,x30,800045f8 +800045ec: 3d5032ef jal x5,800081c0 +800045f0: 800045e0 .word 0x800045e0 +800045f4: 80014a2c .word 0x80014a2c +800045f8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x05050505 +800045fc: 00032c83 lw x25,0(x6) +80004600: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x05050505 +80004604: 00032383 lw x7,0(x6) +80004608: 00430313 addi x6,x6,4 + +8000460c : +Zknd_aes32dsmi_cg_cp_sbox_b5: + aes32dsmi x21, x25, x7, 1 # perform operation +8000460c: 6e7c8ab3 aes32dsmi x21,x25,x7,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b5, Zknd_aes32dsmi_cg_cp_sbox_b5_str) +80004610: 0000a203 lw x4,0(x1) +80004614: 01520863 beq x4,x21,80004624 +80004618: 3a9032ef jal x5,800081c0 +8000461c: 8000460c .word 0x8000460c +80004620: 80014a65 .word 0x80014a65 +80004624: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x06060606 +80004628: 00032f03 lw x30,0(x6) +8000462c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x06060606 +80004630: 00032f83 lw x31,0(x6) +80004634: 00430313 addi x6,x6,4 + +80004638 : +Zknd_aes32dsmi_cg_cp_sbox_b6: + aes32dsmi x11, x30, x31, 1 # perform operation +80004638: 6fff05b3 aes32dsmi x11,x30,x31,0x1 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b6, Zknd_aes32dsmi_cg_cp_sbox_b6_str) +8000463c: 0000a203 lw x4,0(x1) +80004640: 00b20863 beq x4,x11,80004650 +80004644: 37d032ef jal x5,800081c0 +80004648: 80004638 .word 0x80004638 +8000464c: 80014a9e .word 0x80014a9e +80004650: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x07070707 +80004654: 00032903 lw x18,0(x6) +80004658: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x07070707 +8000465c: 00032b83 lw x23,0(x6) +80004660: 00430313 addi x6,x6,4 + +80004664 : +Zknd_aes32dsmi_cg_cp_sbox_b7: + aes32dsmi x9, x18, x23, 0 # perform operation +80004664: 2f7904b3 aes32dsmi x9,x18,x23,0x0 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b7, Zknd_aes32dsmi_cg_cp_sbox_b7_str) +80004668: 0000a203 lw x4,0(x1) +8000466c: 00920863 beq x4,x9,8000467c +80004670: 351032ef jal x5,800081c0 +80004674: 80004664 .word 0x80004664 +80004678: 80014ad7 .word 0x80014ad7 +8000467c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x08080808 +80004680: 00032583 lw x11,0(x6) +80004684: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x08080808 +80004688: 00032d83 lw x27,0(x6) +8000468c: 00430313 addi x6,x6,4 + +80004690 : +Zknd_aes32dsmi_cg_cp_sbox_b8: + aes32dsmi x29, x11, x27, 0 # perform operation +80004690: 2fb58eb3 aes32dsmi x29,x11,x27,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b8, Zknd_aes32dsmi_cg_cp_sbox_b8_str) +80004694: 0000a203 lw x4,0(x1) +80004698: 01d20863 beq x4,x29,800046a8 +8000469c: 325032ef jal x5,800081c0 +800046a0: 80004690 .word 0x80004690 +800046a4: 80014b10 .word 0x80014b10 +800046a8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x09090909 +800046ac: 00032983 lw x19,0(x6) +800046b0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x09090909 +800046b4: 00032183 lw x3,0(x6) +800046b8: 00430313 addi x6,x6,4 + +800046bc : +Zknd_aes32dsmi_cg_cp_sbox_b9: + aes32dsmi x28, x19, x3, 0 # perform operation +800046bc: 2e398e33 aes32dsmi x28,x19,x3,0x0 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b9, Zknd_aes32dsmi_cg_cp_sbox_b9_str) +800046c0: 0000a203 lw x4,0(x1) +800046c4: 01c20863 beq x4,x28,800046d4 +800046c8: 2f9032ef jal x5,800081c0 +800046cc: 800046bc .word 0x800046bc +800046d0: 80014b49 .word 0x80014b49 +800046d4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0a0a0a0a +800046d8: 00032e03 lw x28,0(x6) +800046dc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0a0a0a0a +800046e0: 00032403 lw x8,0(x6) +800046e4: 00430313 addi x6,x6,4 + +800046e8 : +Zknd_aes32dsmi_cg_cp_sbox_b10: + aes32dsmi x17, x28, x8, 1 # perform operation +800046e8: 6e8e08b3 aes32dsmi x17,x28,x8,0x1 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b10, Zknd_aes32dsmi_cg_cp_sbox_b10_str) +800046ec: 0000a203 lw x4,0(x1) +800046f0: 01120863 beq x4,x17,80004700 +800046f4: 2cd032ef jal x5,800081c0 +800046f8: 800046e8 .word 0x800046e8 +800046fc: 80014b82 .word 0x80014b82 +80004700: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0b0b0b0b +80004704: 00032783 lw x15,0(x6) +80004708: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0b0b0b0b +8000470c: 00032183 lw x3,0(x6) +80004710: 00430313 addi x6,x6,4 + +80004714 : +Zknd_aes32dsmi_cg_cp_sbox_b11: + aes32dsmi x16, x15, x3, 3 # perform operation +80004714: ee378833 aes32dsmi x16,x15,x3,0x3 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b11, Zknd_aes32dsmi_cg_cp_sbox_b11_str) +80004718: 0000a203 lw x4,0(x1) +8000471c: 01020863 beq x4,x16,8000472c +80004720: 2a1032ef jal x5,800081c0 +80004724: 80004714 .word 0x80004714 +80004728: 80014bbc .word 0x80014bbc +8000472c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0c0c0c0c +80004730: 00032483 lw x9,0(x6) +80004734: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0c0c0c0c +80004738: 00032703 lw x14,0(x6) +8000473c: 00430313 addi x6,x6,4 + +80004740 : +Zknd_aes32dsmi_cg_cp_sbox_b12: + aes32dsmi x27, x9, x14, 2 # perform operation +80004740: aee48db3 aes32dsmi x27,x9,x14,0x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b12, Zknd_aes32dsmi_cg_cp_sbox_b12_str) +80004744: 0000a203 lw x4,0(x1) +80004748: 01b20863 beq x4,x27,80004758 +8000474c: 275032ef jal x5,800081c0 +80004750: 80004740 .word 0x80004740 +80004754: 80014bf6 .word 0x80014bf6 +80004758: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0d0d0d0d +8000475c: 00032403 lw x8,0(x6) +80004760: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0d0d0d0d +80004764: 00032883 lw x17,0(x6) +80004768: 00430313 addi x6,x6,4 + +8000476c : +Zknd_aes32dsmi_cg_cp_sbox_b13: + aes32dsmi x29, x8, x17, 3 # perform operation +8000476c: ef140eb3 aes32dsmi x29,x8,x17,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b13, Zknd_aes32dsmi_cg_cp_sbox_b13_str) +80004770: 0000a203 lw x4,0(x1) +80004774: 01d20863 beq x4,x29,80004784 +80004778: 249032ef jal x5,800081c0 +8000477c: 8000476c .word 0x8000476c +80004780: 80014c30 .word 0x80014c30 +80004784: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0e0e0e0e +80004788: 00032403 lw x8,0(x6) +8000478c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0e0e0e0e +80004790: 00032483 lw x9,0(x6) +80004794: 00430313 addi x6,x6,4 + +80004798 : +Zknd_aes32dsmi_cg_cp_sbox_b14: + aes32dsmi x30, x8, x9, 1 # perform operation +80004798: 6e940f33 aes32dsmi x30,x8,x9,0x1 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b14, Zknd_aes32dsmi_cg_cp_sbox_b14_str) +8000479c: 0000a203 lw x4,0(x1) +800047a0: 01e20863 beq x4,x30,800047b0 +800047a4: 21d032ef jal x5,800081c0 +800047a8: 80004798 .word 0x80004798 +800047ac: 80014c6a .word 0x80014c6a +800047b0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0f0f0f0f +800047b4: 00032803 lw x16,0(x6) +800047b8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0f0f0f0f +800047bc: 00032b03 lw x22,0(x6) +800047c0: 00430313 addi x6,x6,4 + +800047c4 : +Zknd_aes32dsmi_cg_cp_sbox_b15: + aes32dsmi x25, x16, x22, 1 # perform operation +800047c4: 6f680cb3 aes32dsmi x25,x16,x22,0x1 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b15, Zknd_aes32dsmi_cg_cp_sbox_b15_str) +800047c8: 0000a203 lw x4,0(x1) +800047cc: 01920863 beq x4,x25,800047dc +800047d0: 1f1032ef jal x5,800081c0 +800047d4: 800047c4 .word 0x800047c4 +800047d8: 80014ca4 .word 0x80014ca4 +800047dc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x10101010 +800047e0: 00032f83 lw x31,0(x6) +800047e4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x10101010 +800047e8: 00032a83 lw x21,0(x6) +800047ec: 00430313 addi x6,x6,4 + +800047f0 : +Zknd_aes32dsmi_cg_cp_sbox_b16: + aes32dsmi x27, x31, x21, 3 # perform operation +800047f0: ef5f8db3 aes32dsmi x27,x31,x21,0x3 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b16, Zknd_aes32dsmi_cg_cp_sbox_b16_str) +800047f4: 0000a203 lw x4,0(x1) +800047f8: 01b20863 beq x4,x27,80004808 +800047fc: 1c5032ef jal x5,800081c0 +80004800: 800047f0 .word 0x800047f0 +80004804: 80014cde .word 0x80014cde +80004808: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x11111111 +8000480c: 00032903 lw x18,0(x6) +80004810: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x11111111 +80004814: 00032703 lw x14,0(x6) +80004818: 00430313 addi x6,x6,4 + +8000481c : +Zknd_aes32dsmi_cg_cp_sbox_b17: + aes32dsmi x12, x18, x14, 3 # perform operation +8000481c: eee90633 aes32dsmi x12,x18,x14,0x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b17, Zknd_aes32dsmi_cg_cp_sbox_b17_str) +80004820: 0000a203 lw x4,0(x1) +80004824: 00c20863 beq x4,x12,80004834 +80004828: 199032ef jal x5,800081c0 +8000482c: 8000481c .word 0x8000481c +80004830: 80014d18 .word 0x80014d18 +80004834: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x12121212 +80004838: 00032f83 lw x31,0(x6) +8000483c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x12121212 +80004840: 00032403 lw x8,0(x6) +80004844: 00430313 addi x6,x6,4 + +80004848 : +Zknd_aes32dsmi_cg_cp_sbox_b18: + aes32dsmi x7, x31, x8, 3 # perform operation +80004848: ee8f83b3 aes32dsmi x7,x31,x8,0x3 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b18, Zknd_aes32dsmi_cg_cp_sbox_b18_str) +8000484c: 0000a203 lw x4,0(x1) +80004850: 00720863 beq x4,x7,80004860 +80004854: 16d032ef jal x5,800081c0 +80004858: 80004848 .word 0x80004848 +8000485c: 80014d52 .word 0x80014d52 +80004860: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x13131313 +80004864: 00032903 lw x18,0(x6) +80004868: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x13131313 +8000486c: 00032383 lw x7,0(x6) +80004870: 00430313 addi x6,x6,4 + +80004874 : +Zknd_aes32dsmi_cg_cp_sbox_b19: + aes32dsmi x22, x18, x7, 1 # perform operation +80004874: 6e790b33 aes32dsmi x22,x18,x7,0x1 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b19, Zknd_aes32dsmi_cg_cp_sbox_b19_str) +80004878: 0000a203 lw x4,0(x1) +8000487c: 01620863 beq x4,x22,8000488c +80004880: 141032ef jal x5,800081c0 +80004884: 80004874 .word 0x80004874 +80004888: 80014d8c .word 0x80014d8c +8000488c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x14141414 +80004890: 00032103 lw x2,0(x6) +80004894: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x14141414 +80004898: 00032e03 lw x28,0(x6) +8000489c: 00430313 addi x6,x6,4 + +800048a0 : +Zknd_aes32dsmi_cg_cp_sbox_b20: + aes32dsmi x24, x2, x28, 1 # perform operation +800048a0: 6fc10c33 aes32dsmi x24,x2,x28,0x1 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknd_aes32dsmi_cg_cp_sbox_b20, Zknd_aes32dsmi_cg_cp_sbox_b20_str) +800048a4: 0000a203 lw x4,0(x1) +800048a8: 01820863 beq x4,x24,800048b8 +800048ac: 115032ef jal x5,800081c0 +800048b0: 800048a0 .word 0x800048a0 +800048b4: 80014dc6 .word 0x80014dc6 +800048b8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x15151515 +800048bc: 00032883 lw x17,0(x6) +800048c0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x15151515 +800048c4: 00032c83 lw x25,0(x6) +800048c8: 00430313 addi x6,x6,4 + +800048cc : +Zknd_aes32dsmi_cg_cp_sbox_b21: + aes32dsmi x30, x17, x25, 3 # perform operation +800048cc: ef988f33 aes32dsmi x30,x17,x25,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b21, Zknd_aes32dsmi_cg_cp_sbox_b21_str) +800048d0: 0000a203 lw x4,0(x1) +800048d4: 01e20863 beq x4,x30,800048e4 +800048d8: 0e9032ef jal x5,800081c0 +800048dc: 800048cc .word 0x800048cc +800048e0: 80014e00 .word 0x80014e00 +800048e4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x16161616 +800048e8: 00032483 lw x9,0(x6) +800048ec: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x16161616 +800048f0: 00032e83 lw x29,0(x6) +800048f4: 00430313 addi x6,x6,4 + +800048f8 : +Zknd_aes32dsmi_cg_cp_sbox_b22: + aes32dsmi x30, x9, x29, 2 # perform operation +800048f8: afd48f33 aes32dsmi x30,x9,x29,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b22, Zknd_aes32dsmi_cg_cp_sbox_b22_str) +800048fc: 0000a203 lw x4,0(x1) +80004900: 01e20863 beq x4,x30,80004910 +80004904: 0bd032ef jal x5,800081c0 +80004908: 800048f8 .word 0x800048f8 +8000490c: 80014e3a .word 0x80014e3a +80004910: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x17171717 +80004914: 00032803 lw x16,0(x6) +80004918: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x17171717 +8000491c: 00032403 lw x8,0(x6) +80004920: 00430313 addi x6,x6,4 + +80004924 : +Zknd_aes32dsmi_cg_cp_sbox_b23: + aes32dsmi x27, x16, x8, 2 # perform operation +80004924: ae880db3 aes32dsmi x27,x16,x8,0x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b23, Zknd_aes32dsmi_cg_cp_sbox_b23_str) +80004928: 0000a203 lw x4,0(x1) +8000492c: 01b20863 beq x4,x27,8000493c +80004930: 091032ef jal x5,800081c0 +80004934: 80004924 .word 0x80004924 +80004938: 80014e74 .word 0x80014e74 +8000493c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x18181818 +80004940: 00032683 lw x13,0(x6) +80004944: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x18181818 +80004948: 00032603 lw x12,0(x6) +8000494c: 00430313 addi x6,x6,4 + +80004950 : +Zknd_aes32dsmi_cg_cp_sbox_b24: + aes32dsmi x9, x13, x12, 1 # perform operation +80004950: 6ec684b3 aes32dsmi x9,x13,x12,0x1 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b24, Zknd_aes32dsmi_cg_cp_sbox_b24_str) +80004954: 0000a203 lw x4,0(x1) +80004958: 00920863 beq x4,x9,80004968 +8000495c: 065032ef jal x5,800081c0 +80004960: 80004950 .word 0x80004950 +80004964: 80014eae .word 0x80014eae +80004968: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x19191919 +8000496c: 00032b03 lw x22,0(x6) +80004970: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x19191919 +80004974: 00032b83 lw x23,0(x6) +80004978: 00430313 addi x6,x6,4 + +8000497c : +Zknd_aes32dsmi_cg_cp_sbox_b25: + aes32dsmi x10, x22, x23, 2 # perform operation +8000497c: af7b0533 aes32dsmi x10,x22,x23,0x2 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b25, Zknd_aes32dsmi_cg_cp_sbox_b25_str) +80004980: 0000a203 lw x4,0(x1) +80004984: 00a20863 beq x4,x10,80004994 +80004988: 039032ef jal x5,800081c0 +8000498c: 8000497c .word 0x8000497c +80004990: 80014ee8 .word 0x80014ee8 +80004994: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x1a1a1a1a +80004998: 00032183 lw x3,0(x6) +8000499c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x1a1a1a1a +800049a0: 00032683 lw x13,0(x6) +800049a4: 00430313 addi x6,x6,4 + +800049a8 : +Zknd_aes32dsmi_cg_cp_sbox_b26: + aes32dsmi x23, x3, x13, 1 # perform operation +800049a8: 6ed18bb3 aes32dsmi x23,x3,x13,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b26, Zknd_aes32dsmi_cg_cp_sbox_b26_str) +800049ac: 0000a203 lw x4,0(x1) +800049b0: 01720863 beq x4,x23,800049c0 +800049b4: 00d032ef jal x5,800081c0 +800049b8: 800049a8 .word 0x800049a8 +800049bc: 80014f22 .word 0x80014f22 +800049c0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x1b1b1b1b +800049c4: 00032103 lw x2,0(x6) +800049c8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x1b1b1b1b +800049cc: 00032d83 lw x27,0(x6) +800049d0: 00430313 addi x6,x6,4 + +800049d4 : +Zknd_aes32dsmi_cg_cp_sbox_b27: + aes32dsmi x31, x2, x27, 2 # perform operation +800049d4: afb10fb3 aes32dsmi x31,x2,x27,0x2 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b27, Zknd_aes32dsmi_cg_cp_sbox_b27_str) +800049d8: 0000a203 lw x4,0(x1) +800049dc: 01f20863 beq x4,x31,800049ec +800049e0: 7e0032ef jal x5,800081c0 +800049e4: 800049d4 .word 0x800049d4 +800049e8: 80014f5c .word 0x80014f5c +800049ec: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x1c1c1c1c +800049f0: 00032b83 lw x23,0(x6) +800049f4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x1c1c1c1c +800049f8: 00032883 lw x17,0(x6) +800049fc: 00430313 addi x6,x6,4 + +80004a00 : +Zknd_aes32dsmi_cg_cp_sbox_b28: + aes32dsmi x16, x23, x17, 3 # perform operation +80004a00: ef1b8833 aes32dsmi x16,x23,x17,0x3 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b28, Zknd_aes32dsmi_cg_cp_sbox_b28_str) +80004a04: 0000a203 lw x4,0(x1) +80004a08: 01020863 beq x4,x16,80004a18 +80004a0c: 7b4032ef jal x5,800081c0 +80004a10: 80004a00 .word 0x80004a00 +80004a14: 80014f96 .word 0x80014f96 +80004a18: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1d1d1d1d +80004a1c: 00032e83 lw x29,0(x6) +80004a20: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x1d1d1d1d +80004a24: 00032983 lw x19,0(x6) +80004a28: 00430313 addi x6,x6,4 + +80004a2c : +Zknd_aes32dsmi_cg_cp_sbox_b29: + aes32dsmi x3, x29, x19, 0 # perform operation +80004a2c: 2f3e81b3 aes32dsmi x3,x29,x19,0x0 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b29, Zknd_aes32dsmi_cg_cp_sbox_b29_str) +80004a30: 0000a203 lw x4,0(x1) +80004a34: 00320863 beq x4,x3,80004a44 +80004a38: 788032ef jal x5,800081c0 +80004a3c: 80004a2c .word 0x80004a2c +80004a40: 80014fd0 .word 0x80014fd0 +80004a44: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x1e1e1e1e +80004a48: 00032a83 lw x21,0(x6) +80004a4c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x1e1e1e1e +80004a50: 00032103 lw x2,0(x6) +80004a54: 00430313 addi x6,x6,4 + +80004a58 : +Zknd_aes32dsmi_cg_cp_sbox_b30: + aes32dsmi x19, x21, x2, 3 # perform operation +80004a58: ee2a89b3 aes32dsmi x19,x21,x2,0x3 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b30, Zknd_aes32dsmi_cg_cp_sbox_b30_str) +80004a5c: 0000a203 lw x4,0(x1) +80004a60: 01320863 beq x4,x19,80004a70 +80004a64: 75c032ef jal x5,800081c0 +80004a68: 80004a58 .word 0x80004a58 +80004a6c: 8001500a .word 0x8001500a +80004a70: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x1f1f1f1f +80004a74: 00032783 lw x15,0(x6) +80004a78: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x1f1f1f1f +80004a7c: 00032f03 lw x30,0(x6) +80004a80: 00430313 addi x6,x6,4 + +80004a84 : +Zknd_aes32dsmi_cg_cp_sbox_b31: + aes32dsmi x18, x15, x30, 0 # perform operation +80004a84: 2fe78933 aes32dsmi x18,x15,x30,0x0 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b31, Zknd_aes32dsmi_cg_cp_sbox_b31_str) +80004a88: 0000a203 lw x4,0(x1) +80004a8c: 01220863 beq x4,x18,80004a9c +80004a90: 730032ef jal x5,800081c0 +80004a94: 80004a84 .word 0x80004a84 +80004a98: 80015044 .word 0x80015044 +80004a9c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x20202020 +80004aa0: 00032883 lw x17,0(x6) +80004aa4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x20202020 +80004aa8: 00032983 lw x19,0(x6) +80004aac: 00430313 addi x6,x6,4 + +80004ab0 : +Zknd_aes32dsmi_cg_cp_sbox_b32: + aes32dsmi x10, x17, x19, 0 # perform operation +80004ab0: 2f388533 aes32dsmi x10,x17,x19,0x0 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b32, Zknd_aes32dsmi_cg_cp_sbox_b32_str) +80004ab4: 0000a203 lw x4,0(x1) +80004ab8: 00a20863 beq x4,x10,80004ac8 +80004abc: 704032ef jal x5,800081c0 +80004ac0: 80004ab0 .word 0x80004ab0 +80004ac4: 8001507e .word 0x8001507e +80004ac8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x21212121 +80004acc: 00032d83 lw x27,0(x6) +80004ad0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x21212121 +80004ad4: 00032183 lw x3,0(x6) +80004ad8: 00430313 addi x6,x6,4 + +80004adc : +Zknd_aes32dsmi_cg_cp_sbox_b33: + aes32dsmi x14, x27, x3, 3 # perform operation +80004adc: ee3d8733 aes32dsmi x14,x27,x3,0x3 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b33, Zknd_aes32dsmi_cg_cp_sbox_b33_str) +80004ae0: 0000a203 lw x4,0(x1) +80004ae4: 00e20863 beq x4,x14,80004af4 +80004ae8: 6d8032ef jal x5,800081c0 +80004aec: 80004adc .word 0x80004adc +80004af0: 800150b8 .word 0x800150b8 +80004af4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x22222222 +80004af8: 00032603 lw x12,0(x6) +80004afc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x22222222 +80004b00: 00032783 lw x15,0(x6) +80004b04: 00430313 addi x6,x6,4 + +80004b08 : +Zknd_aes32dsmi_cg_cp_sbox_b34: + aes32dsmi x31, x12, x15, 3 # perform operation +80004b08: eef60fb3 aes32dsmi x31,x12,x15,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b34, Zknd_aes32dsmi_cg_cp_sbox_b34_str) +80004b0c: 0000a203 lw x4,0(x1) +80004b10: 01f20863 beq x4,x31,80004b20 +80004b14: 6ac032ef jal x5,800081c0 +80004b18: 80004b08 .word 0x80004b08 +80004b1c: 800150f2 .word 0x800150f2 +80004b20: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x23232323 +80004b24: 00032703 lw x14,0(x6) +80004b28: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x23232323 +80004b2c: 00032e83 lw x29,0(x6) +80004b30: 00430313 addi x6,x6,4 + +80004b34 : +Zknd_aes32dsmi_cg_cp_sbox_b35: + aes32dsmi x10, x14, x29, 0 # perform operation +80004b34: 2fd70533 aes32dsmi x10,x14,x29,0x0 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b35, Zknd_aes32dsmi_cg_cp_sbox_b35_str) +80004b38: 0000a203 lw x4,0(x1) +80004b3c: 00a20863 beq x4,x10,80004b4c +80004b40: 680032ef jal x5,800081c0 +80004b44: 80004b34 .word 0x80004b34 +80004b48: 8001512c .word 0x8001512c +80004b4c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x24242424 +80004b50: 00032d83 lw x27,0(x6) +80004b54: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x24242424 +80004b58: 00032f03 lw x30,0(x6) +80004b5c: 00430313 addi x6,x6,4 + +80004b60 : +Zknd_aes32dsmi_cg_cp_sbox_b36: + aes32dsmi x28, x27, x30, 3 # perform operation +80004b60: efed8e33 aes32dsmi x28,x27,x30,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b36, Zknd_aes32dsmi_cg_cp_sbox_b36_str) +80004b64: 0000a203 lw x4,0(x1) +80004b68: 01c20863 beq x4,x28,80004b78 +80004b6c: 654032ef jal x5,800081c0 +80004b70: 80004b60 .word 0x80004b60 +80004b74: 80015166 .word 0x80015166 +80004b78: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x25252525 +80004b7c: 00032c03 lw x24,0(x6) +80004b80: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x25252525 +80004b84: 00032983 lw x19,0(x6) +80004b88: 00430313 addi x6,x6,4 + +80004b8c : +Zknd_aes32dsmi_cg_cp_sbox_b37: + aes32dsmi x26, x24, x19, 3 # perform operation +80004b8c: ef3c0d33 aes32dsmi x26,x24,x19,0x3 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b37, Zknd_aes32dsmi_cg_cp_sbox_b37_str) +80004b90: 0000a203 lw x4,0(x1) +80004b94: 01a20863 beq x4,x26,80004ba4 +80004b98: 628032ef jal x5,800081c0 +80004b9c: 80004b8c .word 0x80004b8c +80004ba0: 800151a0 .word 0x800151a0 +80004ba4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x26262626 +80004ba8: 00032503 lw x10,0(x6) +80004bac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x26262626 +80004bb0: 00032c83 lw x25,0(x6) +80004bb4: 00430313 addi x6,x6,4 + +80004bb8 : +Zknd_aes32dsmi_cg_cp_sbox_b38: + aes32dsmi x28, x10, x25, 0 # perform operation +80004bb8: 2f950e33 aes32dsmi x28,x10,x25,0x0 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b38, Zknd_aes32dsmi_cg_cp_sbox_b38_str) +80004bbc: 0000a203 lw x4,0(x1) +80004bc0: 01c20863 beq x4,x28,80004bd0 +80004bc4: 5fc032ef jal x5,800081c0 +80004bc8: 80004bb8 .word 0x80004bb8 +80004bcc: 800151da .word 0x800151da +80004bd0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x27272727 +80004bd4: 00032983 lw x19,0(x6) +80004bd8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x27272727 +80004bdc: 00032583 lw x11,0(x6) +80004be0: 00430313 addi x6,x6,4 + +80004be4 : +Zknd_aes32dsmi_cg_cp_sbox_b39: + aes32dsmi x9, x19, x11, 2 # perform operation +80004be4: aeb984b3 aes32dsmi x9,x19,x11,0x2 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b39, Zknd_aes32dsmi_cg_cp_sbox_b39_str) +80004be8: 0000a203 lw x4,0(x1) +80004bec: 00920863 beq x4,x9,80004bfc +80004bf0: 5d0032ef jal x5,800081c0 +80004bf4: 80004be4 .word 0x80004be4 +80004bf8: 80015214 .word 0x80015214 +80004bfc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x28282828 +80004c00: 00032903 lw x18,0(x6) +80004c04: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x28282828 +80004c08: 00032983 lw x19,0(x6) +80004c0c: 00430313 addi x6,x6,4 + +80004c10 : +Zknd_aes32dsmi_cg_cp_sbox_b40: + aes32dsmi x27, x18, x19, 0 # perform operation +80004c10: 2f390db3 aes32dsmi x27,x18,x19,0x0 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b40, Zknd_aes32dsmi_cg_cp_sbox_b40_str) +80004c14: 0000a203 lw x4,0(x1) +80004c18: 01b20863 beq x4,x27,80004c28 +80004c1c: 5a4032ef jal x5,800081c0 +80004c20: 80004c10 .word 0x80004c10 +80004c24: 8001524e .word 0x8001524e +80004c28: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x29292929 +80004c2c: 00032503 lw x10,0(x6) +80004c30: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x29292929 +80004c34: 00032683 lw x13,0(x6) +80004c38: 00430313 addi x6,x6,4 + +80004c3c : +Zknd_aes32dsmi_cg_cp_sbox_b41: + aes32dsmi x12, x10, x13, 0 # perform operation +80004c3c: 2ed50633 aes32dsmi x12,x10,x13,0x0 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b41, Zknd_aes32dsmi_cg_cp_sbox_b41_str) +80004c40: 0000a203 lw x4,0(x1) +80004c44: 00c20863 beq x4,x12,80004c54 +80004c48: 578032ef jal x5,800081c0 +80004c4c: 80004c3c .word 0x80004c3c +80004c50: 80015288 .word 0x80015288 +80004c54: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x2a2a2a2a +80004c58: 00032483 lw x9,0(x6) +80004c5c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x2a2a2a2a +80004c60: 00032e03 lw x28,0(x6) +80004c64: 00430313 addi x6,x6,4 + +80004c68 : +Zknd_aes32dsmi_cg_cp_sbox_b42: + aes32dsmi x15, x9, x28, 3 # perform operation +80004c68: efc487b3 aes32dsmi x15,x9,x28,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b42, Zknd_aes32dsmi_cg_cp_sbox_b42_str) +80004c6c: 0000a203 lw x4,0(x1) +80004c70: 00f20863 beq x4,x15,80004c80 +80004c74: 54c032ef jal x5,800081c0 +80004c78: 80004c68 .word 0x80004c68 +80004c7c: 800152c2 .word 0x800152c2 +80004c80: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x2b2b2b2b +80004c84: 00032183 lw x3,0(x6) +80004c88: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x2b2b2b2b +80004c8c: 00032703 lw x14,0(x6) +80004c90: 00430313 addi x6,x6,4 + +80004c94 : +Zknd_aes32dsmi_cg_cp_sbox_b43: + aes32dsmi x21, x3, x14, 2 # perform operation +80004c94: aee18ab3 aes32dsmi x21,x3,x14,0x2 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b43, Zknd_aes32dsmi_cg_cp_sbox_b43_str) +80004c98: 0000a203 lw x4,0(x1) +80004c9c: 01520863 beq x4,x21,80004cac +80004ca0: 520032ef jal x5,800081c0 +80004ca4: 80004c94 .word 0x80004c94 +80004ca8: 800152fc .word 0x800152fc +80004cac: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x2c2c2c2c +80004cb0: 00032e03 lw x28,0(x6) +80004cb4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x2c2c2c2c +80004cb8: 00032583 lw x11,0(x6) +80004cbc: 00430313 addi x6,x6,4 + +80004cc0 : +Zknd_aes32dsmi_cg_cp_sbox_b44: + aes32dsmi x7, x28, x11, 3 # perform operation +80004cc0: eebe03b3 aes32dsmi x7,x28,x11,0x3 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b44, Zknd_aes32dsmi_cg_cp_sbox_b44_str) +80004cc4: 0000a203 lw x4,0(x1) +80004cc8: 00720863 beq x4,x7,80004cd8 +80004ccc: 4f4032ef jal x5,800081c0 +80004cd0: 80004cc0 .word 0x80004cc0 +80004cd4: 80015336 .word 0x80015336 +80004cd8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x2d2d2d2d +80004cdc: 00032983 lw x19,0(x6) +80004ce0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x2d2d2d2d +80004ce4: 00032683 lw x13,0(x6) +80004ce8: 00430313 addi x6,x6,4 + +80004cec : +Zknd_aes32dsmi_cg_cp_sbox_b45: + aes32dsmi x16, x19, x13, 2 # perform operation +80004cec: aed98833 aes32dsmi x16,x19,x13,0x2 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b45, Zknd_aes32dsmi_cg_cp_sbox_b45_str) +80004cf0: 0000a203 lw x4,0(x1) +80004cf4: 01020863 beq x4,x16,80004d04 +80004cf8: 4c8032ef jal x5,800081c0 +80004cfc: 80004cec .word 0x80004cec +80004d00: 80015370 .word 0x80015370 +80004d04: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x2e2e2e2e +80004d08: 00032e83 lw x29,0(x6) +80004d0c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x2e2e2e2e +80004d10: 00032183 lw x3,0(x6) +80004d14: 00430313 addi x6,x6,4 + +80004d18 : +Zknd_aes32dsmi_cg_cp_sbox_b46: + aes32dsmi x19, x29, x3, 1 # perform operation +80004d18: 6e3e89b3 aes32dsmi x19,x29,x3,0x1 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b46, Zknd_aes32dsmi_cg_cp_sbox_b46_str) +80004d1c: 0000a203 lw x4,0(x1) +80004d20: 01320863 beq x4,x19,80004d30 +80004d24: 49c032ef jal x5,800081c0 +80004d28: 80004d18 .word 0x80004d18 +80004d2c: 800153aa .word 0x800153aa +80004d30: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x2f2f2f2f +80004d34: 00032983 lw x19,0(x6) +80004d38: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x2f2f2f2f +80004d3c: 00032b83 lw x23,0(x6) +80004d40: 00430313 addi x6,x6,4 + +80004d44 : +Zknd_aes32dsmi_cg_cp_sbox_b47: + aes32dsmi x24, x19, x23, 3 # perform operation +80004d44: ef798c33 aes32dsmi x24,x19,x23,0x3 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknd_aes32dsmi_cg_cp_sbox_b47, Zknd_aes32dsmi_cg_cp_sbox_b47_str) +80004d48: 0000a203 lw x4,0(x1) +80004d4c: 01820863 beq x4,x24,80004d5c +80004d50: 470032ef jal x5,800081c0 +80004d54: 80004d44 .word 0x80004d44 +80004d58: 800153e4 .word 0x800153e4 +80004d5c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x30303030 +80004d60: 00032603 lw x12,0(x6) +80004d64: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x30303030 +80004d68: 00032e83 lw x29,0(x6) +80004d6c: 00430313 addi x6,x6,4 + +80004d70 : +Zknd_aes32dsmi_cg_cp_sbox_b48: + aes32dsmi x30, x12, x29, 3 # perform operation +80004d70: efd60f33 aes32dsmi x30,x12,x29,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b48, Zknd_aes32dsmi_cg_cp_sbox_b48_str) +80004d74: 0000a203 lw x4,0(x1) +80004d78: 01e20863 beq x4,x30,80004d88 +80004d7c: 444032ef jal x5,800081c0 +80004d80: 80004d70 .word 0x80004d70 +80004d84: 8001541e .word 0x8001541e +80004d88: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x31313131 +80004d8c: 00032c83 lw x25,0(x6) +80004d90: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x31313131 +80004d94: 00032903 lw x18,0(x6) +80004d98: 00430313 addi x6,x6,4 + +80004d9c : +Zknd_aes32dsmi_cg_cp_sbox_b49: + aes32dsmi x15, x25, x18, 1 # perform operation +80004d9c: 6f2c87b3 aes32dsmi x15,x25,x18,0x1 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b49, Zknd_aes32dsmi_cg_cp_sbox_b49_str) +80004da0: 0000a203 lw x4,0(x1) +80004da4: 00f20863 beq x4,x15,80004db4 +80004da8: 418032ef jal x5,800081c0 +80004dac: 80004d9c .word 0x80004d9c +80004db0: 80015458 .word 0x80015458 +80004db4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x32323232 +80004db8: 00032c03 lw x24,0(x6) +80004dbc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x32323232 +80004dc0: 00032a03 lw x20,0(x6) +80004dc4: 00430313 addi x6,x6,4 + +80004dc8 : +Zknd_aes32dsmi_cg_cp_sbox_b50: + aes32dsmi x12, x24, x20, 1 # perform operation +80004dc8: 6f4c0633 aes32dsmi x12,x24,x20,0x1 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b50, Zknd_aes32dsmi_cg_cp_sbox_b50_str) +80004dcc: 0000a203 lw x4,0(x1) +80004dd0: 00c20863 beq x4,x12,80004de0 +80004dd4: 3ec032ef jal x5,800081c0 +80004dd8: 80004dc8 .word 0x80004dc8 +80004ddc: 80015492 .word 0x80015492 +80004de0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x33333333 +80004de4: 00032d83 lw x27,0(x6) +80004de8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x33333333 +80004dec: 00032c03 lw x24,0(x6) +80004df0: 00430313 addi x6,x6,4 + +80004df4 : +Zknd_aes32dsmi_cg_cp_sbox_b51: + aes32dsmi x12, x27, x24, 3 # perform operation +80004df4: ef8d8633 aes32dsmi x12,x27,x24,0x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b51, Zknd_aes32dsmi_cg_cp_sbox_b51_str) +80004df8: 0000a203 lw x4,0(x1) +80004dfc: 00c20863 beq x4,x12,80004e0c +80004e00: 3c0032ef jal x5,800081c0 +80004e04: 80004df4 .word 0x80004df4 +80004e08: 800154cc .word 0x800154cc +80004e0c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x34343434 +80004e10: 00032583 lw x11,0(x6) +80004e14: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x34343434 +80004e18: 00032703 lw x14,0(x6) +80004e1c: 00430313 addi x6,x6,4 + +80004e20 : +Zknd_aes32dsmi_cg_cp_sbox_b52: + aes32dsmi x31, x11, x14, 2 # perform operation +80004e20: aee58fb3 aes32dsmi x31,x11,x14,0x2 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b52, Zknd_aes32dsmi_cg_cp_sbox_b52_str) +80004e24: 0000a203 lw x4,0(x1) +80004e28: 01f20863 beq x4,x31,80004e38 +80004e2c: 394032ef jal x5,800081c0 +80004e30: 80004e20 .word 0x80004e20 +80004e34: 80015506 .word 0x80015506 +80004e38: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x35353535 +80004e3c: 00032583 lw x11,0(x6) +80004e40: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x35353535 +80004e44: 00032a83 lw x21,0(x6) +80004e48: 00430313 addi x6,x6,4 + +80004e4c : +Zknd_aes32dsmi_cg_cp_sbox_b53: + aes32dsmi x17, x11, x21, 1 # perform operation +80004e4c: 6f5588b3 aes32dsmi x17,x11,x21,0x1 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b53, Zknd_aes32dsmi_cg_cp_sbox_b53_str) +80004e50: 0000a203 lw x4,0(x1) +80004e54: 01120863 beq x4,x17,80004e64 +80004e58: 368032ef jal x5,800081c0 +80004e5c: 80004e4c .word 0x80004e4c +80004e60: 80015540 .word 0x80015540 +80004e64: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x36363636 +80004e68: 00032383 lw x7,0(x6) +80004e6c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x36363636 +80004e70: 00032983 lw x19,0(x6) +80004e74: 00430313 addi x6,x6,4 + +80004e78 : +Zknd_aes32dsmi_cg_cp_sbox_b54: + aes32dsmi x31, x7, x19, 0 # perform operation +80004e78: 2f338fb3 aes32dsmi x31,x7,x19,0x0 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b54, Zknd_aes32dsmi_cg_cp_sbox_b54_str) +80004e7c: 0000a203 lw x4,0(x1) +80004e80: 01f20863 beq x4,x31,80004e90 +80004e84: 33c032ef jal x5,800081c0 +80004e88: 80004e78 .word 0x80004e78 +80004e8c: 8001557a .word 0x8001557a +80004e90: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x37373737 +80004e94: 00032d83 lw x27,0(x6) +80004e98: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x37373737 +80004e9c: 00032d03 lw x26,0(x6) +80004ea0: 00430313 addi x6,x6,4 + +80004ea4 : +Zknd_aes32dsmi_cg_cp_sbox_b55: + aes32dsmi x29, x27, x26, 0 # perform operation +80004ea4: 2fad8eb3 aes32dsmi x29,x27,x26,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b55, Zknd_aes32dsmi_cg_cp_sbox_b55_str) +80004ea8: 0000a203 lw x4,0(x1) +80004eac: 01d20863 beq x4,x29,80004ebc +80004eb0: 310032ef jal x5,800081c0 +80004eb4: 80004ea4 .word 0x80004ea4 +80004eb8: 800155b4 .word 0x800155b4 +80004ebc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x38383838 +80004ec0: 00032483 lw x9,0(x6) +80004ec4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x38383838 +80004ec8: 00032103 lw x2,0(x6) +80004ecc: 00430313 addi x6,x6,4 + +80004ed0 : +Zknd_aes32dsmi_cg_cp_sbox_b56: + aes32dsmi x22, x9, x2, 0 # perform operation +80004ed0: 2e248b33 aes32dsmi x22,x9,x2,0x0 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b56, Zknd_aes32dsmi_cg_cp_sbox_b56_str) +80004ed4: 0000a203 lw x4,0(x1) +80004ed8: 01620863 beq x4,x22,80004ee8 +80004edc: 2e4032ef jal x5,800081c0 +80004ee0: 80004ed0 .word 0x80004ed0 +80004ee4: 800155ee .word 0x800155ee +80004ee8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x39393939 +80004eec: 00032c03 lw x24,0(x6) +80004ef0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x39393939 +80004ef4: 00032983 lw x19,0(x6) +80004ef8: 00430313 addi x6,x6,4 + +80004efc : +Zknd_aes32dsmi_cg_cp_sbox_b57: + aes32dsmi x26, x24, x19, 3 # perform operation +80004efc: ef3c0d33 aes32dsmi x26,x24,x19,0x3 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b57, Zknd_aes32dsmi_cg_cp_sbox_b57_str) +80004f00: 0000a203 lw x4,0(x1) +80004f04: 01a20863 beq x4,x26,80004f14 +80004f08: 2b8032ef jal x5,800081c0 +80004f0c: 80004efc .word 0x80004efc +80004f10: 80015628 .word 0x80015628 +80004f14: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x3a3a3a3a +80004f18: 00032d83 lw x27,0(x6) +80004f1c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x3a3a3a3a +80004f20: 00032a83 lw x21,0(x6) +80004f24: 00430313 addi x6,x6,4 + +80004f28 : +Zknd_aes32dsmi_cg_cp_sbox_b58: + aes32dsmi x8, x27, x21, 2 # perform operation +80004f28: af5d8433 aes32dsmi x8,x27,x21,0x2 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b58, Zknd_aes32dsmi_cg_cp_sbox_b58_str) +80004f2c: 0000a203 lw x4,0(x1) +80004f30: 00820863 beq x4,x8,80004f40 +80004f34: 28c032ef jal x5,800081c0 +80004f38: 80004f28 .word 0x80004f28 +80004f3c: 80015662 .word 0x80015662 +80004f40: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x3b3b3b3b +80004f44: 00032483 lw x9,0(x6) +80004f48: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x3b3b3b3b +80004f4c: 00032103 lw x2,0(x6) +80004f50: 00430313 addi x6,x6,4 + +80004f54 : +Zknd_aes32dsmi_cg_cp_sbox_b59: + aes32dsmi x8, x9, x2, 1 # perform operation +80004f54: 6e248433 aes32dsmi x8,x9,x2,0x1 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b59, Zknd_aes32dsmi_cg_cp_sbox_b59_str) +80004f58: 0000a203 lw x4,0(x1) +80004f5c: 00820863 beq x4,x8,80004f6c +80004f60: 260032ef jal x5,800081c0 +80004f64: 80004f54 .word 0x80004f54 +80004f68: 8001569c .word 0x8001569c +80004f6c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x3c3c3c3c +80004f70: 00032783 lw x15,0(x6) +80004f74: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x3c3c3c3c +80004f78: 00032f83 lw x31,0(x6) +80004f7c: 00430313 addi x6,x6,4 + +80004f80 : +Zknd_aes32dsmi_cg_cp_sbox_b60: + aes32dsmi x25, x15, x31, 2 # perform operation +80004f80: aff78cb3 aes32dsmi x25,x15,x31,0x2 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b60, Zknd_aes32dsmi_cg_cp_sbox_b60_str) +80004f84: 0000a203 lw x4,0(x1) +80004f88: 01920863 beq x4,x25,80004f98 +80004f8c: 234032ef jal x5,800081c0 +80004f90: 80004f80 .word 0x80004f80 +80004f94: 800156d6 .word 0x800156d6 +80004f98: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x3d3d3d3d +80004f9c: 00032103 lw x2,0(x6) +80004fa0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x3d3d3d3d +80004fa4: 00032e03 lw x28,0(x6) +80004fa8: 00430313 addi x6,x6,4 + +80004fac : +Zknd_aes32dsmi_cg_cp_sbox_b61: + aes32dsmi x27, x2, x28, 2 # perform operation +80004fac: afc10db3 aes32dsmi x27,x2,x28,0x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b61, Zknd_aes32dsmi_cg_cp_sbox_b61_str) +80004fb0: 0000a203 lw x4,0(x1) +80004fb4: 01b20863 beq x4,x27,80004fc4 +80004fb8: 208032ef jal x5,800081c0 +80004fbc: 80004fac .word 0x80004fac +80004fc0: 80015710 .word 0x80015710 +80004fc4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x3e3e3e3e +80004fc8: 00032e83 lw x29,0(x6) +80004fcc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x3e3e3e3e +80004fd0: 00032e03 lw x28,0(x6) +80004fd4: 00430313 addi x6,x6,4 + +80004fd8 : +Zknd_aes32dsmi_cg_cp_sbox_b62: + aes32dsmi x19, x29, x28, 1 # perform operation +80004fd8: 6fce89b3 aes32dsmi x19,x29,x28,0x1 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b62, Zknd_aes32dsmi_cg_cp_sbox_b62_str) +80004fdc: 0000a203 lw x4,0(x1) +80004fe0: 01320863 beq x4,x19,80004ff0 +80004fe4: 1dc032ef jal x5,800081c0 +80004fe8: 80004fd8 .word 0x80004fd8 +80004fec: 8001574a .word 0x8001574a +80004ff0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x3f3f3f3f +80004ff4: 00032403 lw x8,0(x6) +80004ff8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x3f3f3f3f +80004ffc: 00032e83 lw x29,0(x6) +80005000: 00430313 addi x6,x6,4 + +80005004 : +Zknd_aes32dsmi_cg_cp_sbox_b63: + aes32dsmi x30, x8, x29, 2 # perform operation +80005004: afd40f33 aes32dsmi x30,x8,x29,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b63, Zknd_aes32dsmi_cg_cp_sbox_b63_str) +80005008: 0000a203 lw x4,0(x1) +8000500c: 01e20863 beq x4,x30,8000501c +80005010: 1b0032ef jal x5,800081c0 +80005014: 80005004 .word 0x80005004 +80005018: 80015784 .word 0x80015784 +8000501c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x40404040 +80005020: 00032383 lw x7,0(x6) +80005024: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x40404040 +80005028: 00032803 lw x16,0(x6) +8000502c: 00430313 addi x6,x6,4 + +80005030 : +Zknd_aes32dsmi_cg_cp_sbox_b64: + aes32dsmi x18, x7, x16, 3 # perform operation +80005030: ef038933 aes32dsmi x18,x7,x16,0x3 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b64, Zknd_aes32dsmi_cg_cp_sbox_b64_str) +80005034: 0000a203 lw x4,0(x1) +80005038: 01220863 beq x4,x18,80005048 +8000503c: 184032ef jal x5,800081c0 +80005040: 80005030 .word 0x80005030 +80005044: 800157be .word 0x800157be +80005048: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x41414141 +8000504c: 00032e03 lw x28,0(x6) +80005050: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x41414141 +80005054: 00032903 lw x18,0(x6) +80005058: 00430313 addi x6,x6,4 + +8000505c : +Zknd_aes32dsmi_cg_cp_sbox_b65: + aes32dsmi x29, x28, x18, 0 # perform operation +8000505c: 2f2e0eb3 aes32dsmi x29,x28,x18,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b65, Zknd_aes32dsmi_cg_cp_sbox_b65_str) +80005060: 0000a203 lw x4,0(x1) +80005064: 01d20863 beq x4,x29,80005074 +80005068: 158032ef jal x5,800081c0 +8000506c: 8000505c .word 0x8000505c +80005070: 800157f8 .word 0x800157f8 +80005074: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x42424242 +80005078: 00032383 lw x7,0(x6) +8000507c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x42424242 +80005080: 00032c83 lw x25,0(x6) +80005084: 00430313 addi x6,x6,4 + +80005088 : +Zknd_aes32dsmi_cg_cp_sbox_b66: + aes32dsmi x12, x7, x25, 0 # perform operation +80005088: 2f938633 aes32dsmi x12,x7,x25,0x0 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b66, Zknd_aes32dsmi_cg_cp_sbox_b66_str) +8000508c: 0000a203 lw x4,0(x1) +80005090: 00c20863 beq x4,x12,800050a0 +80005094: 12c032ef jal x5,800081c0 +80005098: 80005088 .word 0x80005088 +8000509c: 80015832 .word 0x80015832 +800050a0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x43434343 +800050a4: 00032803 lw x16,0(x6) +800050a8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x43434343 +800050ac: 00032d03 lw x26,0(x6) +800050b0: 00430313 addi x6,x6,4 + +800050b4 : +Zknd_aes32dsmi_cg_cp_sbox_b67: + aes32dsmi x18, x16, x26, 3 # perform operation +800050b4: efa80933 aes32dsmi x18,x16,x26,0x3 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b67, Zknd_aes32dsmi_cg_cp_sbox_b67_str) +800050b8: 0000a203 lw x4,0(x1) +800050bc: 01220863 beq x4,x18,800050cc +800050c0: 100032ef jal x5,800081c0 +800050c4: 800050b4 .word 0x800050b4 +800050c8: 8001586c .word 0x8001586c +800050cc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x44444444 +800050d0: 00032a03 lw x20,0(x6) +800050d4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x44444444 +800050d8: 00032803 lw x16,0(x6) +800050dc: 00430313 addi x6,x6,4 + +800050e0 : +Zknd_aes32dsmi_cg_cp_sbox_b68: + aes32dsmi x25, x20, x16, 3 # perform operation +800050e0: ef0a0cb3 aes32dsmi x25,x20,x16,0x3 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b68, Zknd_aes32dsmi_cg_cp_sbox_b68_str) +800050e4: 0000a203 lw x4,0(x1) +800050e8: 01920863 beq x4,x25,800050f8 +800050ec: 0d4032ef jal x5,800081c0 +800050f0: 800050e0 .word 0x800050e0 +800050f4: 800158a6 .word 0x800158a6 +800050f8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x45454545 +800050fc: 00032103 lw x2,0(x6) +80005100: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x45454545 +80005104: 00032a83 lw x21,0(x6) +80005108: 00430313 addi x6,x6,4 + +8000510c : +Zknd_aes32dsmi_cg_cp_sbox_b69: + aes32dsmi x26, x2, x21, 3 # perform operation +8000510c: ef510d33 aes32dsmi x26,x2,x21,0x3 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b69, Zknd_aes32dsmi_cg_cp_sbox_b69_str) +80005110: 0000a203 lw x4,0(x1) +80005114: 01a20863 beq x4,x26,80005124 +80005118: 0a8032ef jal x5,800081c0 +8000511c: 8000510c .word 0x8000510c +80005120: 800158e0 .word 0x800158e0 +80005124: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x46464646 +80005128: 00032903 lw x18,0(x6) +8000512c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x46464646 +80005130: 00032c83 lw x25,0(x6) +80005134: 00430313 addi x6,x6,4 + +80005138 : +Zknd_aes32dsmi_cg_cp_sbox_b70: + aes32dsmi x30, x18, x25, 1 # perform operation +80005138: 6f990f33 aes32dsmi x30,x18,x25,0x1 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b70, Zknd_aes32dsmi_cg_cp_sbox_b70_str) +8000513c: 0000a203 lw x4,0(x1) +80005140: 01e20863 beq x4,x30,80005150 +80005144: 07c032ef jal x5,800081c0 +80005148: 80005138 .word 0x80005138 +8000514c: 8001591a .word 0x8001591a +80005150: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x47474747 +80005154: 00032c83 lw x25,0(x6) +80005158: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x47474747 +8000515c: 00032103 lw x2,0(x6) +80005160: 00430313 addi x6,x6,4 + +80005164 : +Zknd_aes32dsmi_cg_cp_sbox_b71: + aes32dsmi x15, x25, x2, 3 # perform operation +80005164: ee2c87b3 aes32dsmi x15,x25,x2,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b71, Zknd_aes32dsmi_cg_cp_sbox_b71_str) +80005168: 0000a203 lw x4,0(x1) +8000516c: 00f20863 beq x4,x15,8000517c +80005170: 050032ef jal x5,800081c0 +80005174: 80005164 .word 0x80005164 +80005178: 80015954 .word 0x80015954 +8000517c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x48484848 +80005180: 00032603 lw x12,0(x6) +80005184: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x48484848 +80005188: 00032d83 lw x27,0(x6) +8000518c: 00430313 addi x6,x6,4 + +80005190 : +Zknd_aes32dsmi_cg_cp_sbox_b72: + aes32dsmi x19, x12, x27, 3 # perform operation +80005190: efb609b3 aes32dsmi x19,x12,x27,0x3 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b72, Zknd_aes32dsmi_cg_cp_sbox_b72_str) +80005194: 0000a203 lw x4,0(x1) +80005198: 01320863 beq x4,x19,800051a8 +8000519c: 024032ef jal x5,800081c0 +800051a0: 80005190 .word 0x80005190 +800051a4: 8001598e .word 0x8001598e +800051a8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x49494949 +800051ac: 00032f03 lw x30,0(x6) +800051b0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x49494949 +800051b4: 00032a03 lw x20,0(x6) +800051b8: 00430313 addi x6,x6,4 + +800051bc : +Zknd_aes32dsmi_cg_cp_sbox_b73: + aes32dsmi x10, x30, x20, 1 # perform operation +800051bc: 6f4f0533 aes32dsmi x10,x30,x20,0x1 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b73, Zknd_aes32dsmi_cg_cp_sbox_b73_str) +800051c0: 0000a203 lw x4,0(x1) +800051c4: 00a20863 beq x4,x10,800051d4 +800051c8: 7f9022ef jal x5,800081c0 +800051cc: 800051bc .word 0x800051bc +800051d0: 800159c8 .word 0x800159c8 +800051d4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x4a4a4a4a +800051d8: 00032703 lw x14,0(x6) +800051dc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x4a4a4a4a +800051e0: 00032d83 lw x27,0(x6) +800051e4: 00430313 addi x6,x6,4 + +800051e8 : +Zknd_aes32dsmi_cg_cp_sbox_b74: + aes32dsmi x21, x14, x27, 2 # perform operation +800051e8: afb70ab3 aes32dsmi x21,x14,x27,0x2 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b74, Zknd_aes32dsmi_cg_cp_sbox_b74_str) +800051ec: 0000a203 lw x4,0(x1) +800051f0: 01520863 beq x4,x21,80005200 +800051f4: 7cd022ef jal x5,800081c0 +800051f8: 800051e8 .word 0x800051e8 +800051fc: 80015a02 .word 0x80015a02 +80005200: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x4b4b4b4b +80005204: 00032703 lw x14,0(x6) +80005208: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x4b4b4b4b +8000520c: 00032383 lw x7,0(x6) +80005210: 00430313 addi x6,x6,4 + +80005214 : +Zknd_aes32dsmi_cg_cp_sbox_b75: + aes32dsmi x28, x14, x7, 0 # perform operation +80005214: 2e770e33 aes32dsmi x28,x14,x7,0x0 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b75, Zknd_aes32dsmi_cg_cp_sbox_b75_str) +80005218: 0000a203 lw x4,0(x1) +8000521c: 01c20863 beq x4,x28,8000522c +80005220: 7a1022ef jal x5,800081c0 +80005224: 80005214 .word 0x80005214 +80005228: 80015a3c .word 0x80015a3c +8000522c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x4c4c4c4c +80005230: 00032383 lw x7,0(x6) +80005234: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x4c4c4c4c +80005238: 00032983 lw x19,0(x6) +8000523c: 00430313 addi x6,x6,4 + +80005240 : +Zknd_aes32dsmi_cg_cp_sbox_b76: + aes32dsmi x8, x7, x19, 2 # perform operation +80005240: af338433 aes32dsmi x8,x7,x19,0x2 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b76, Zknd_aes32dsmi_cg_cp_sbox_b76_str) +80005244: 0000a203 lw x4,0(x1) +80005248: 00820863 beq x4,x8,80005258 +8000524c: 775022ef jal x5,800081c0 +80005250: 80005240 .word 0x80005240 +80005254: 80015a76 .word 0x80015a76 +80005258: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x4d4d4d4d +8000525c: 00032d83 lw x27,0(x6) +80005260: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x4d4d4d4d +80005264: 00032703 lw x14,0(x6) +80005268: 00430313 addi x6,x6,4 + +8000526c : +Zknd_aes32dsmi_cg_cp_sbox_b77: + aes32dsmi x3, x27, x14, 3 # perform operation +8000526c: eeed81b3 aes32dsmi x3,x27,x14,0x3 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b77, Zknd_aes32dsmi_cg_cp_sbox_b77_str) +80005270: 0000a203 lw x4,0(x1) +80005274: 00320863 beq x4,x3,80005284 +80005278: 749022ef jal x5,800081c0 +8000527c: 8000526c .word 0x8000526c +80005280: 80015ab0 .word 0x80015ab0 +80005284: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x4e4e4e4e +80005288: 00032903 lw x18,0(x6) +8000528c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x4e4e4e4e +80005290: 00032b03 lw x22,0(x6) +80005294: 00430313 addi x6,x6,4 + +80005298 : +Zknd_aes32dsmi_cg_cp_sbox_b78: + aes32dsmi x2, x18, x22, 0 # perform operation +80005298: 2f690133 aes32dsmi x2,x18,x22,0x0 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b78, Zknd_aes32dsmi_cg_cp_sbox_b78_str) +8000529c: 0000a203 lw x4,0(x1) +800052a0: 00220863 beq x4,x2,800052b0 +800052a4: 71d022ef jal x5,800081c0 +800052a8: 80005298 .word 0x80005298 +800052ac: 80015aea .word 0x80015aea +800052b0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x4f4f4f4f +800052b4: 00032c03 lw x24,0(x6) +800052b8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x4f4f4f4f +800052bc: 00032183 lw x3,0(x6) +800052c0: 00430313 addi x6,x6,4 + +800052c4 : +Zknd_aes32dsmi_cg_cp_sbox_b79: + aes32dsmi x2, x24, x3, 1 # perform operation +800052c4: 6e3c0133 aes32dsmi x2,x24,x3,0x1 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b79, Zknd_aes32dsmi_cg_cp_sbox_b79_str) +800052c8: 0000a203 lw x4,0(x1) +800052cc: 00220863 beq x4,x2,800052dc +800052d0: 6f1022ef jal x5,800081c0 +800052d4: 800052c4 .word 0x800052c4 +800052d8: 80015b24 .word 0x80015b24 +800052dc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x50505050 +800052e0: 00032583 lw x11,0(x6) +800052e4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x50505050 +800052e8: 00032703 lw x14,0(x6) +800052ec: 00430313 addi x6,x6,4 + +800052f0 : +Zknd_aes32dsmi_cg_cp_sbox_b80: + aes32dsmi x23, x11, x14, 0 # perform operation +800052f0: 2ee58bb3 aes32dsmi x23,x11,x14,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b80, Zknd_aes32dsmi_cg_cp_sbox_b80_str) +800052f4: 0000a203 lw x4,0(x1) +800052f8: 01720863 beq x4,x23,80005308 +800052fc: 6c5022ef jal x5,800081c0 +80005300: 800052f0 .word 0x800052f0 +80005304: 80015b5e .word 0x80015b5e +80005308: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x51515151 +8000530c: 00032f03 lw x30,0(x6) +80005310: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x51515151 +80005314: 00032503 lw x10,0(x6) +80005318: 00430313 addi x6,x6,4 + +8000531c : +Zknd_aes32dsmi_cg_cp_sbox_b81: + aes32dsmi x25, x30, x10, 0 # perform operation +8000531c: 2eaf0cb3 aes32dsmi x25,x30,x10,0x0 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b81, Zknd_aes32dsmi_cg_cp_sbox_b81_str) +80005320: 0000a203 lw x4,0(x1) +80005324: 01920863 beq x4,x25,80005334 +80005328: 699022ef jal x5,800081c0 +8000532c: 8000531c .word 0x8000531c +80005330: 80015b98 .word 0x80015b98 +80005334: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x52525252 +80005338: 00032903 lw x18,0(x6) +8000533c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x52525252 +80005340: 00032583 lw x11,0(x6) +80005344: 00430313 addi x6,x6,4 + +80005348 : +Zknd_aes32dsmi_cg_cp_sbox_b82: + aes32dsmi x25, x18, x11, 1 # perform operation +80005348: 6eb90cb3 aes32dsmi x25,x18,x11,0x1 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b82, Zknd_aes32dsmi_cg_cp_sbox_b82_str) +8000534c: 0000a203 lw x4,0(x1) +80005350: 01920863 beq x4,x25,80005360 +80005354: 66d022ef jal x5,800081c0 +80005358: 80005348 .word 0x80005348 +8000535c: 80015bd2 .word 0x80015bd2 +80005360: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x53535353 +80005364: 00032e03 lw x28,0(x6) +80005368: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x53535353 +8000536c: 00032103 lw x2,0(x6) +80005370: 00430313 addi x6,x6,4 + +80005374 : +Zknd_aes32dsmi_cg_cp_sbox_b83: + aes32dsmi x31, x28, x2, 3 # perform operation +80005374: ee2e0fb3 aes32dsmi x31,x28,x2,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b83, Zknd_aes32dsmi_cg_cp_sbox_b83_str) +80005378: 0000a203 lw x4,0(x1) +8000537c: 01f20863 beq x4,x31,8000538c +80005380: 641022ef jal x5,800081c0 +80005384: 80005374 .word 0x80005374 +80005388: 80015c0c .word 0x80015c0c +8000538c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x54545454 +80005390: 00032683 lw x13,0(x6) +80005394: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x54545454 +80005398: 00032883 lw x17,0(x6) +8000539c: 00430313 addi x6,x6,4 + +800053a0 : +Zknd_aes32dsmi_cg_cp_sbox_b84: + aes32dsmi x28, x13, x17, 3 # perform operation +800053a0: ef168e33 aes32dsmi x28,x13,x17,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b84, Zknd_aes32dsmi_cg_cp_sbox_b84_str) +800053a4: 0000a203 lw x4,0(x1) +800053a8: 01c20863 beq x4,x28,800053b8 +800053ac: 615022ef jal x5,800081c0 +800053b0: 800053a0 .word 0x800053a0 +800053b4: 80015c46 .word 0x80015c46 +800053b8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x55555555 +800053bc: 00032c03 lw x24,0(x6) +800053c0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x55555555 +800053c4: 00032d03 lw x26,0(x6) +800053c8: 00430313 addi x6,x6,4 + +800053cc : +Zknd_aes32dsmi_cg_cp_sbox_b85: + aes32dsmi x29, x24, x26, 2 # perform operation +800053cc: afac0eb3 aes32dsmi x29,x24,x26,0x2 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b85, Zknd_aes32dsmi_cg_cp_sbox_b85_str) +800053d0: 0000a203 lw x4,0(x1) +800053d4: 01d20863 beq x4,x29,800053e4 +800053d8: 5e9022ef jal x5,800081c0 +800053dc: 800053cc .word 0x800053cc +800053e0: 80015c80 .word 0x80015c80 +800053e4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x56565656 +800053e8: 00032a03 lw x20,0(x6) +800053ec: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x56565656 +800053f0: 00032f83 lw x31,0(x6) +800053f4: 00430313 addi x6,x6,4 + +800053f8 : +Zknd_aes32dsmi_cg_cp_sbox_b86: + aes32dsmi x17, x20, x31, 3 # perform operation +800053f8: effa08b3 aes32dsmi x17,x20,x31,0x3 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b86, Zknd_aes32dsmi_cg_cp_sbox_b86_str) +800053fc: 0000a203 lw x4,0(x1) +80005400: 01120863 beq x4,x17,80005410 +80005404: 5bd022ef jal x5,800081c0 +80005408: 800053f8 .word 0x800053f8 +8000540c: 80015cba .word 0x80015cba +80005410: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x57575757 +80005414: 00032183 lw x3,0(x6) +80005418: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x57575757 +8000541c: 00032a03 lw x20,0(x6) +80005420: 00430313 addi x6,x6,4 + +80005424 : +Zknd_aes32dsmi_cg_cp_sbox_b87: + aes32dsmi x10, x3, x20, 2 # perform operation +80005424: af418533 aes32dsmi x10,x3,x20,0x2 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b87, Zknd_aes32dsmi_cg_cp_sbox_b87_str) +80005428: 0000a203 lw x4,0(x1) +8000542c: 00a20863 beq x4,x10,8000543c +80005430: 591022ef jal x5,800081c0 +80005434: 80005424 .word 0x80005424 +80005438: 80015cf4 .word 0x80015cf4 +8000543c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x58585858 +80005440: 00032e83 lw x29,0(x6) +80005444: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x58585858 +80005448: 00032d83 lw x27,0(x6) +8000544c: 00430313 addi x6,x6,4 + +80005450 : +Zknd_aes32dsmi_cg_cp_sbox_b88: + aes32dsmi x21, x29, x27, 1 # perform operation +80005450: 6fbe8ab3 aes32dsmi x21,x29,x27,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b88, Zknd_aes32dsmi_cg_cp_sbox_b88_str) +80005454: 0000a203 lw x4,0(x1) +80005458: 01520863 beq x4,x21,80005468 +8000545c: 565022ef jal x5,800081c0 +80005460: 80005450 .word 0x80005450 +80005464: 80015d2e .word 0x80015d2e +80005468: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x59595959 +8000546c: 00032383 lw x7,0(x6) +80005470: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x59595959 +80005474: 00032b83 lw x23,0(x6) +80005478: 00430313 addi x6,x6,4 + +8000547c : +Zknd_aes32dsmi_cg_cp_sbox_b89: + aes32dsmi x3, x7, x23, 3 # perform operation +8000547c: ef7381b3 aes32dsmi x3,x7,x23,0x3 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b89, Zknd_aes32dsmi_cg_cp_sbox_b89_str) +80005480: 0000a203 lw x4,0(x1) +80005484: 00320863 beq x4,x3,80005494 +80005488: 539022ef jal x5,800081c0 +8000548c: 8000547c .word 0x8000547c +80005490: 80015d68 .word 0x80015d68 +80005494: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x5a5a5a5a +80005498: 00032483 lw x9,0(x6) +8000549c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x5a5a5a5a +800054a0: 00032a83 lw x21,0(x6) +800054a4: 00430313 addi x6,x6,4 + +800054a8 : +Zknd_aes32dsmi_cg_cp_sbox_b90: + aes32dsmi x7, x9, x21, 2 # perform operation +800054a8: af5483b3 aes32dsmi x7,x9,x21,0x2 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b90, Zknd_aes32dsmi_cg_cp_sbox_b90_str) +800054ac: 0000a203 lw x4,0(x1) +800054b0: 00720863 beq x4,x7,800054c0 +800054b4: 50d022ef jal x5,800081c0 +800054b8: 800054a8 .word 0x800054a8 +800054bc: 80015da2 .word 0x80015da2 +800054c0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5b5b5b5b +800054c4: 00032f83 lw x31,0(x6) +800054c8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x5b5b5b5b +800054cc: 00032803 lw x16,0(x6) +800054d0: 00430313 addi x6,x6,4 + +800054d4 : +Zknd_aes32dsmi_cg_cp_sbox_b91: + aes32dsmi x26, x31, x16, 1 # perform operation +800054d4: 6f0f8d33 aes32dsmi x26,x31,x16,0x1 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b91, Zknd_aes32dsmi_cg_cp_sbox_b91_str) +800054d8: 0000a203 lw x4,0(x1) +800054dc: 01a20863 beq x4,x26,800054ec +800054e0: 4e1022ef jal x5,800081c0 +800054e4: 800054d4 .word 0x800054d4 +800054e8: 80015ddc .word 0x80015ddc +800054ec: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x5c5c5c5c +800054f0: 00032e83 lw x29,0(x6) +800054f4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5c5c5c5c +800054f8: 00032703 lw x14,0(x6) +800054fc: 00430313 addi x6,x6,4 + +80005500 : +Zknd_aes32dsmi_cg_cp_sbox_b92: + aes32dsmi x10, x29, x14, 3 # perform operation +80005500: eeee8533 aes32dsmi x10,x29,x14,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b92, Zknd_aes32dsmi_cg_cp_sbox_b92_str) +80005504: 0000a203 lw x4,0(x1) +80005508: 00a20863 beq x4,x10,80005518 +8000550c: 4b5022ef jal x5,800081c0 +80005510: 80005500 .word 0x80005500 +80005514: 80015e16 .word 0x80015e16 +80005518: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5d5d5d5d +8000551c: 00032f83 lw x31,0(x6) +80005520: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5d5d5d5d +80005524: 00032e83 lw x29,0(x6) +80005528: 00430313 addi x6,x6,4 + +8000552c : +Zknd_aes32dsmi_cg_cp_sbox_b93: + aes32dsmi x11, x31, x29, 3 # perform operation +8000552c: efdf85b3 aes32dsmi x11,x31,x29,0x3 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b93, Zknd_aes32dsmi_cg_cp_sbox_b93_str) +80005530: 0000a203 lw x4,0(x1) +80005534: 00b20863 beq x4,x11,80005544 +80005538: 489022ef jal x5,800081c0 +8000553c: 8000552c .word 0x8000552c +80005540: 80015e50 .word 0x80015e50 +80005544: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5e5e5e5e +80005548: 00032683 lw x13,0(x6) +8000554c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5e5e5e5e +80005550: 00032e83 lw x29,0(x6) +80005554: 00430313 addi x6,x6,4 + +80005558 : +Zknd_aes32dsmi_cg_cp_sbox_b94: + aes32dsmi x12, x13, x29, 3 # perform operation +80005558: efd68633 aes32dsmi x12,x13,x29,0x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b94, Zknd_aes32dsmi_cg_cp_sbox_b94_str) +8000555c: 0000a203 lw x4,0(x1) +80005560: 00c20863 beq x4,x12,80005570 +80005564: 45d022ef jal x5,800081c0 +80005568: 80005558 .word 0x80005558 +8000556c: 80015e8a .word 0x80015e8a +80005570: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x5f5f5f5f +80005574: 00032e03 lw x28,0(x6) +80005578: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x5f5f5f5f +8000557c: 00032c03 lw x24,0(x6) +80005580: 00430313 addi x6,x6,4 + +80005584 : +Zknd_aes32dsmi_cg_cp_sbox_b95: + aes32dsmi x27, x28, x24, 3 # perform operation +80005584: ef8e0db3 aes32dsmi x27,x28,x24,0x3 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b95, Zknd_aes32dsmi_cg_cp_sbox_b95_str) +80005588: 0000a203 lw x4,0(x1) +8000558c: 01b20863 beq x4,x27,8000559c +80005590: 431022ef jal x5,800081c0 +80005594: 80005584 .word 0x80005584 +80005598: 80015ec4 .word 0x80015ec4 +8000559c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x60606060 +800055a0: 00032d03 lw x26,0(x6) +800055a4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x60606060 +800055a8: 00032383 lw x7,0(x6) +800055ac: 00430313 addi x6,x6,4 + +800055b0 : +Zknd_aes32dsmi_cg_cp_sbox_b96: + aes32dsmi x29, x26, x7, 2 # perform operation +800055b0: ae7d0eb3 aes32dsmi x29,x26,x7,0x2 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b96, Zknd_aes32dsmi_cg_cp_sbox_b96_str) +800055b4: 0000a203 lw x4,0(x1) +800055b8: 01d20863 beq x4,x29,800055c8 +800055bc: 405022ef jal x5,800081c0 +800055c0: 800055b0 .word 0x800055b0 +800055c4: 80015efe .word 0x80015efe +800055c8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x61616161 +800055cc: 00032403 lw x8,0(x6) +800055d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x61616161 +800055d4: 00032c03 lw x24,0(x6) +800055d8: 00430313 addi x6,x6,4 + +800055dc : +Zknd_aes32dsmi_cg_cp_sbox_b97: + aes32dsmi x18, x8, x24, 0 # perform operation +800055dc: 2f840933 aes32dsmi x18,x8,x24,0x0 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b97, Zknd_aes32dsmi_cg_cp_sbox_b97_str) +800055e0: 0000a203 lw x4,0(x1) +800055e4: 01220863 beq x4,x18,800055f4 +800055e8: 3d9022ef jal x5,800081c0 +800055ec: 800055dc .word 0x800055dc +800055f0: 80015f38 .word 0x80015f38 +800055f4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x62626262 +800055f8: 00032183 lw x3,0(x6) +800055fc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x62626262 +80005600: 00032103 lw x2,0(x6) +80005604: 00430313 addi x6,x6,4 + +80005608 : +Zknd_aes32dsmi_cg_cp_sbox_b98: + aes32dsmi x21, x3, x2, 1 # perform operation +80005608: 6e218ab3 aes32dsmi x21,x3,x2,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b98, Zknd_aes32dsmi_cg_cp_sbox_b98_str) +8000560c: 0000a203 lw x4,0(x1) +80005610: 01520863 beq x4,x21,80005620 +80005614: 3ad022ef jal x5,800081c0 +80005618: 80005608 .word 0x80005608 +8000561c: 80015f72 .word 0x80015f72 +80005620: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x63636363 +80005624: 00032e83 lw x29,0(x6) +80005628: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x63636363 +8000562c: 00032683 lw x13,0(x6) +80005630: 00430313 addi x6,x6,4 + +80005634 : +Zknd_aes32dsmi_cg_cp_sbox_b99: + aes32dsmi x23, x29, x13, 2 # perform operation +80005634: aede8bb3 aes32dsmi x23,x29,x13,0x2 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b99, Zknd_aes32dsmi_cg_cp_sbox_b99_str) +80005638: 0000a203 lw x4,0(x1) +8000563c: 01720863 beq x4,x23,8000564c +80005640: 381022ef jal x5,800081c0 +80005644: 80005634 .word 0x80005634 +80005648: 80015fac .word 0x80015fac +8000564c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x64646464 +80005650: 00032603 lw x12,0(x6) +80005654: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x64646464 +80005658: 00032403 lw x8,0(x6) +8000565c: 00430313 addi x6,x6,4 + +80005660 : +Zknd_aes32dsmi_cg_cp_sbox_b100: + aes32dsmi x10, x12, x8, 3 # perform operation +80005660: ee860533 aes32dsmi x10,x12,x8,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b100, Zknd_aes32dsmi_cg_cp_sbox_b100_str) +80005664: 0000a203 lw x4,0(x1) +80005668: 00a20863 beq x4,x10,80005678 +8000566c: 355022ef jal x5,800081c0 +80005670: 80005660 .word 0x80005660 +80005674: 80015fe6 .word 0x80015fe6 +80005678: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x65656565 +8000567c: 00032483 lw x9,0(x6) +80005680: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x65656565 +80005684: 00032f03 lw x30,0(x6) +80005688: 00430313 addi x6,x6,4 + +8000568c : +Zknd_aes32dsmi_cg_cp_sbox_b101: + aes32dsmi x31, x9, x30, 0 # perform operation +8000568c: 2fe48fb3 aes32dsmi x31,x9,x30,0x0 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b101, Zknd_aes32dsmi_cg_cp_sbox_b101_str) +80005690: 0000a203 lw x4,0(x1) +80005694: 01f20863 beq x4,x31,800056a4 +80005698: 329022ef jal x5,800081c0 +8000569c: 8000568c .word 0x8000568c +800056a0: 80016021 .word 0x80016021 +800056a4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x66666666 +800056a8: 00032f83 lw x31,0(x6) +800056ac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x66666666 +800056b0: 00032983 lw x19,0(x6) +800056b4: 00430313 addi x6,x6,4 + +800056b8 : +Zknd_aes32dsmi_cg_cp_sbox_b102: + aes32dsmi x20, x31, x19, 1 # perform operation +800056b8: 6f3f8a33 aes32dsmi x20,x31,x19,0x1 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b102, Zknd_aes32dsmi_cg_cp_sbox_b102_str) +800056bc: 0000a203 lw x4,0(x1) +800056c0: 01420863 beq x4,x20,800056d0 +800056c4: 2fd022ef jal x5,800081c0 +800056c8: 800056b8 .word 0x800056b8 +800056cc: 8001605c .word 0x8001605c +800056d0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x67676767 +800056d4: 00032403 lw x8,0(x6) +800056d8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x67676767 +800056dc: 00032f03 lw x30,0(x6) +800056e0: 00430313 addi x6,x6,4 + +800056e4 : +Zknd_aes32dsmi_cg_cp_sbox_b103: + aes32dsmi x18, x8, x30, 3 # perform operation +800056e4: efe40933 aes32dsmi x18,x8,x30,0x3 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b103, Zknd_aes32dsmi_cg_cp_sbox_b103_str) +800056e8: 0000a203 lw x4,0(x1) +800056ec: 01220863 beq x4,x18,800056fc +800056f0: 2d1022ef jal x5,800081c0 +800056f4: 800056e4 .word 0x800056e4 +800056f8: 80016097 .word 0x80016097 +800056fc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x68686868 +80005700: 00032403 lw x8,0(x6) +80005704: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x68686868 +80005708: 00032903 lw x18,0(x6) +8000570c: 00430313 addi x6,x6,4 + +80005710 : +Zknd_aes32dsmi_cg_cp_sbox_b104: + aes32dsmi x21, x8, x18, 0 # perform operation +80005710: 2f240ab3 aes32dsmi x21,x8,x18,0x0 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b104, Zknd_aes32dsmi_cg_cp_sbox_b104_str) +80005714: 0000a203 lw x4,0(x1) +80005718: 01520863 beq x4,x21,80005728 +8000571c: 2a5022ef jal x5,800081c0 +80005720: 80005710 .word 0x80005710 +80005724: 800160d2 .word 0x800160d2 +80005728: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x69696969 +8000572c: 00032c83 lw x25,0(x6) +80005730: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x69696969 +80005734: 00032c03 lw x24,0(x6) +80005738: 00430313 addi x6,x6,4 + +8000573c : +Zknd_aes32dsmi_cg_cp_sbox_b105: + aes32dsmi x7, x25, x24, 2 # perform operation +8000573c: af8c83b3 aes32dsmi x7,x25,x24,0x2 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b105, Zknd_aes32dsmi_cg_cp_sbox_b105_str) +80005740: 0000a203 lw x4,0(x1) +80005744: 00720863 beq x4,x7,80005754 +80005748: 279022ef jal x5,800081c0 +8000574c: 8000573c .word 0x8000573c +80005750: 8001610d .word 0x8001610d +80005754: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x6a6a6a6a +80005758: 00032783 lw x15,0(x6) +8000575c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x6a6a6a6a +80005760: 00032d83 lw x27,0(x6) +80005764: 00430313 addi x6,x6,4 + +80005768 : +Zknd_aes32dsmi_cg_cp_sbox_b106: + aes32dsmi x3, x15, x27, 2 # perform operation +80005768: afb781b3 aes32dsmi x3,x15,x27,0x2 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b106, Zknd_aes32dsmi_cg_cp_sbox_b106_str) +8000576c: 0000a203 lw x4,0(x1) +80005770: 00320863 beq x4,x3,80005780 +80005774: 24d022ef jal x5,800081c0 +80005778: 80005768 .word 0x80005768 +8000577c: 80016148 .word 0x80016148 +80005780: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x6b6b6b6b +80005784: 00032103 lw x2,0(x6) +80005788: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x6b6b6b6b +8000578c: 00032903 lw x18,0(x6) +80005790: 00430313 addi x6,x6,4 + +80005794 : +Zknd_aes32dsmi_cg_cp_sbox_b107: + aes32dsmi x28, x2, x18, 1 # perform operation +80005794: 6f210e33 aes32dsmi x28,x2,x18,0x1 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b107, Zknd_aes32dsmi_cg_cp_sbox_b107_str) +80005798: 0000a203 lw x4,0(x1) +8000579c: 01c20863 beq x4,x28,800057ac +800057a0: 221022ef jal x5,800081c0 +800057a4: 80005794 .word 0x80005794 +800057a8: 80016183 .word 0x80016183 +800057ac: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6c6c6c6c +800057b0: 00032e03 lw x28,0(x6) +800057b4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x6c6c6c6c +800057b8: 00032503 lw x10,0(x6) +800057bc: 00430313 addi x6,x6,4 + +800057c0 : +Zknd_aes32dsmi_cg_cp_sbox_b108: + aes32dsmi x20, x28, x10, 0 # perform operation +800057c0: 2eae0a33 aes32dsmi x20,x28,x10,0x0 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b108, Zknd_aes32dsmi_cg_cp_sbox_b108_str) +800057c4: 0000a203 lw x4,0(x1) +800057c8: 01420863 beq x4,x20,800057d8 +800057cc: 1f5022ef jal x5,800081c0 +800057d0: 800057c0 .word 0x800057c0 +800057d4: 800161be .word 0x800161be +800057d8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x6d6d6d6d +800057dc: 00032e83 lw x29,0(x6) +800057e0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x6d6d6d6d +800057e4: 00032603 lw x12,0(x6) +800057e8: 00430313 addi x6,x6,4 + +800057ec : +Zknd_aes32dsmi_cg_cp_sbox_b109: + aes32dsmi x9, x29, x12, 0 # perform operation +800057ec: 2ece84b3 aes32dsmi x9,x29,x12,0x0 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b109, Zknd_aes32dsmi_cg_cp_sbox_b109_str) +800057f0: 0000a203 lw x4,0(x1) +800057f4: 00920863 beq x4,x9,80005804 +800057f8: 1c9022ef jal x5,800081c0 +800057fc: 800057ec .word 0x800057ec +80005800: 800161f9 .word 0x800161f9 +80005804: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x6e6e6e6e +80005808: 00032b03 lw x22,0(x6) +8000580c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x6e6e6e6e +80005810: 00032403 lw x8,0(x6) +80005814: 00430313 addi x6,x6,4 + +80005818 : +Zknd_aes32dsmi_cg_cp_sbox_b110: + aes32dsmi x19, x22, x8, 0 # perform operation +80005818: 2e8b09b3 aes32dsmi x19,x22,x8,0x0 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b110, Zknd_aes32dsmi_cg_cp_sbox_b110_str) +8000581c: 0000a203 lw x4,0(x1) +80005820: 01320863 beq x4,x19,80005830 +80005824: 19d022ef jal x5,800081c0 +80005828: 80005818 .word 0x80005818 +8000582c: 80016234 .word 0x80016234 +80005830: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x6f6f6f6f +80005834: 00032403 lw x8,0(x6) +80005838: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x6f6f6f6f +8000583c: 00032d03 lw x26,0(x6) +80005840: 00430313 addi x6,x6,4 + +80005844 : +Zknd_aes32dsmi_cg_cp_sbox_b111: + aes32dsmi x31, x8, x26, 1 # perform operation +80005844: 6fa40fb3 aes32dsmi x31,x8,x26,0x1 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b111, Zknd_aes32dsmi_cg_cp_sbox_b111_str) +80005848: 0000a203 lw x4,0(x1) +8000584c: 01f20863 beq x4,x31,8000585c +80005850: 171022ef jal x5,800081c0 +80005854: 80005844 .word 0x80005844 +80005858: 8001626f .word 0x8001626f +8000585c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x70707070 +80005860: 00032983 lw x19,0(x6) +80005864: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x70707070 +80005868: 00032d03 lw x26,0(x6) +8000586c: 00430313 addi x6,x6,4 + +80005870 : +Zknd_aes32dsmi_cg_cp_sbox_b112: + aes32dsmi x30, x19, x26, 1 # perform operation +80005870: 6fa98f33 aes32dsmi x30,x19,x26,0x1 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b112, Zknd_aes32dsmi_cg_cp_sbox_b112_str) +80005874: 0000a203 lw x4,0(x1) +80005878: 01e20863 beq x4,x30,80005888 +8000587c: 145022ef jal x5,800081c0 +80005880: 80005870 .word 0x80005870 +80005884: 800162aa .word 0x800162aa +80005888: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x71717171 +8000588c: 00032e83 lw x29,0(x6) +80005890: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x71717171 +80005894: 00032f83 lw x31,0(x6) +80005898: 00430313 addi x6,x6,4 + +8000589c : +Zknd_aes32dsmi_cg_cp_sbox_b113: + aes32dsmi x11, x29, x31, 1 # perform operation +8000589c: 6ffe85b3 aes32dsmi x11,x29,x31,0x1 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b113, Zknd_aes32dsmi_cg_cp_sbox_b113_str) +800058a0: 0000a203 lw x4,0(x1) +800058a4: 00b20863 beq x4,x11,800058b4 +800058a8: 119022ef jal x5,800081c0 +800058ac: 8000589c .word 0x8000589c +800058b0: 800162e5 .word 0x800162e5 +800058b4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x72727272 +800058b8: 00032803 lw x16,0(x6) +800058bc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x72727272 +800058c0: 00032c03 lw x24,0(x6) +800058c4: 00430313 addi x6,x6,4 + +800058c8 : +Zknd_aes32dsmi_cg_cp_sbox_b114: + aes32dsmi x23, x16, x24, 0 # perform operation +800058c8: 2f880bb3 aes32dsmi x23,x16,x24,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b114, Zknd_aes32dsmi_cg_cp_sbox_b114_str) +800058cc: 0000a203 lw x4,0(x1) +800058d0: 01720863 beq x4,x23,800058e0 +800058d4: 0ed022ef jal x5,800081c0 +800058d8: 800058c8 .word 0x800058c8 +800058dc: 80016320 .word 0x80016320 +800058e0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x73737373 +800058e4: 00032783 lw x15,0(x6) +800058e8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x73737373 +800058ec: 00032403 lw x8,0(x6) +800058f0: 00430313 addi x6,x6,4 + +800058f4 : +Zknd_aes32dsmi_cg_cp_sbox_b115: + aes32dsmi x13, x15, x8, 1 # perform operation +800058f4: 6e8786b3 aes32dsmi x13,x15,x8,0x1 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zknd_aes32dsmi_cg_cp_sbox_b115, Zknd_aes32dsmi_cg_cp_sbox_b115_str) +800058f8: 0000a203 lw x4,0(x1) +800058fc: 00d20863 beq x4,x13,8000590c +80005900: 0c1022ef jal x5,800081c0 +80005904: 800058f4 .word 0x800058f4 +80005908: 8001635b .word 0x8001635b +8000590c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x74747474 +80005910: 00032783 lw x15,0(x6) +80005914: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x74747474 +80005918: 00032403 lw x8,0(x6) +8000591c: 00430313 addi x6,x6,4 + +80005920 : +Zknd_aes32dsmi_cg_cp_sbox_b116: + aes32dsmi x27, x15, x8, 0 # perform operation +80005920: 2e878db3 aes32dsmi x27,x15,x8,0x0 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b116, Zknd_aes32dsmi_cg_cp_sbox_b116_str) +80005924: 0000a203 lw x4,0(x1) +80005928: 01b20863 beq x4,x27,80005938 +8000592c: 095022ef jal x5,800081c0 +80005930: 80005920 .word 0x80005920 +80005934: 80016396 .word 0x80016396 +80005938: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x75757575 +8000593c: 00032c03 lw x24,0(x6) +80005940: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x75757575 +80005944: 00032a03 lw x20,0(x6) +80005948: 00430313 addi x6,x6,4 + +8000594c : +Zknd_aes32dsmi_cg_cp_sbox_b117: + aes32dsmi x23, x24, x20, 0 # perform operation +8000594c: 2f4c0bb3 aes32dsmi x23,x24,x20,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b117, Zknd_aes32dsmi_cg_cp_sbox_b117_str) +80005950: 0000a203 lw x4,0(x1) +80005954: 01720863 beq x4,x23,80005964 +80005958: 069022ef jal x5,800081c0 +8000595c: 8000594c .word 0x8000594c +80005960: 800163d1 .word 0x800163d1 +80005964: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x76767676 +80005968: 00032d83 lw x27,0(x6) +8000596c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x76767676 +80005970: 00032783 lw x15,0(x6) +80005974: 00430313 addi x6,x6,4 + +80005978 : +Zknd_aes32dsmi_cg_cp_sbox_b118: + aes32dsmi x17, x27, x15, 3 # perform operation +80005978: eefd88b3 aes32dsmi x17,x27,x15,0x3 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b118, Zknd_aes32dsmi_cg_cp_sbox_b118_str) +8000597c: 0000a203 lw x4,0(x1) +80005980: 01120863 beq x4,x17,80005990 +80005984: 03d022ef jal x5,800081c0 +80005988: 80005978 .word 0x80005978 +8000598c: 8001640c .word 0x8001640c +80005990: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x77777777 +80005994: 00032803 lw x16,0(x6) +80005998: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x77777777 +8000599c: 00032103 lw x2,0(x6) +800059a0: 00430313 addi x6,x6,4 + +800059a4 : +Zknd_aes32dsmi_cg_cp_sbox_b119: + aes32dsmi x23, x16, x2, 0 # perform operation +800059a4: 2e280bb3 aes32dsmi x23,x16,x2,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b119, Zknd_aes32dsmi_cg_cp_sbox_b119_str) +800059a8: 0000a203 lw x4,0(x1) +800059ac: 01720863 beq x4,x23,800059bc +800059b0: 011022ef jal x5,800081c0 +800059b4: 800059a4 .word 0x800059a4 +800059b8: 80016447 .word 0x80016447 +800059bc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x78787878 +800059c0: 00032b83 lw x23,0(x6) +800059c4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x78787878 +800059c8: 00032883 lw x17,0(x6) +800059cc: 00430313 addi x6,x6,4 + +800059d0 : +Zknd_aes32dsmi_cg_cp_sbox_b120: + aes32dsmi x2, x23, x17, 0 # perform operation +800059d0: 2f1b8133 aes32dsmi x2,x23,x17,0x0 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b120, Zknd_aes32dsmi_cg_cp_sbox_b120_str) +800059d4: 0000a203 lw x4,0(x1) +800059d8: 00220863 beq x4,x2,800059e8 +800059dc: 7e4022ef jal x5,800081c0 +800059e0: 800059d0 .word 0x800059d0 +800059e4: 80016482 .word 0x80016482 +800059e8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x79797979 +800059ec: 00032f83 lw x31,0(x6) +800059f0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x79797979 +800059f4: 00032b83 lw x23,0(x6) +800059f8: 00430313 addi x6,x6,4 + +800059fc : +Zknd_aes32dsmi_cg_cp_sbox_b121: + aes32dsmi x2, x31, x23, 3 # perform operation +800059fc: ef7f8133 aes32dsmi x2,x31,x23,0x3 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b121, Zknd_aes32dsmi_cg_cp_sbox_b121_str) +80005a00: 0000a203 lw x4,0(x1) +80005a04: 00220863 beq x4,x2,80005a14 +80005a08: 7b8022ef jal x5,800081c0 +80005a0c: 800059fc .word 0x800059fc +80005a10: 800164bd .word 0x800164bd +80005a14: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7a7a7a7a +80005a18: 00032683 lw x13,0(x6) +80005a1c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7a7a7a7a +80005a20: 00032c83 lw x25,0(x6) +80005a24: 00430313 addi x6,x6,4 + +80005a28 : +Zknd_aes32dsmi_cg_cp_sbox_b122: + aes32dsmi x11, x13, x25, 1 # perform operation +80005a28: 6f9685b3 aes32dsmi x11,x13,x25,0x1 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b122, Zknd_aes32dsmi_cg_cp_sbox_b122_str) +80005a2c: 0000a203 lw x4,0(x1) +80005a30: 00b20863 beq x4,x11,80005a40 +80005a34: 78c022ef jal x5,800081c0 +80005a38: 80005a28 .word 0x80005a28 +80005a3c: 800164f8 .word 0x800164f8 +80005a40: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x7b7b7b7b +80005a44: 00032b83 lw x23,0(x6) +80005a48: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7b7b7b7b +80005a4c: 00032c83 lw x25,0(x6) +80005a50: 00430313 addi x6,x6,4 + +80005a54 : +Zknd_aes32dsmi_cg_cp_sbox_b123: + aes32dsmi x31, x23, x25, 1 # perform operation +80005a54: 6f9b8fb3 aes32dsmi x31,x23,x25,0x1 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b123, Zknd_aes32dsmi_cg_cp_sbox_b123_str) +80005a58: 0000a203 lw x4,0(x1) +80005a5c: 01f20863 beq x4,x31,80005a6c +80005a60: 760022ef jal x5,800081c0 +80005a64: 80005a54 .word 0x80005a54 +80005a68: 80016533 .word 0x80016533 +80005a6c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x7c7c7c7c +80005a70: 00032403 lw x8,0(x6) +80005a74: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x7c7c7c7c +80005a78: 00032483 lw x9,0(x6) +80005a7c: 00430313 addi x6,x6,4 + +80005a80 : +Zknd_aes32dsmi_cg_cp_sbox_b124: + aes32dsmi x30, x8, x9, 1 # perform operation +80005a80: 6e940f33 aes32dsmi x30,x8,x9,0x1 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b124, Zknd_aes32dsmi_cg_cp_sbox_b124_str) +80005a84: 0000a203 lw x4,0(x1) +80005a88: 01e20863 beq x4,x30,80005a98 +80005a8c: 734022ef jal x5,800081c0 +80005a90: 80005a80 .word 0x80005a80 +80005a94: 8001656e .word 0x8001656e +80005a98: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x7d7d7d7d +80005a9c: 00032903 lw x18,0(x6) +80005aa0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7d7d7d7d +80005aa4: 00032c83 lw x25,0(x6) +80005aa8: 00430313 addi x6,x6,4 + +80005aac : +Zknd_aes32dsmi_cg_cp_sbox_b125: + aes32dsmi x30, x18, x25, 3 # perform operation +80005aac: ef990f33 aes32dsmi x30,x18,x25,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b125, Zknd_aes32dsmi_cg_cp_sbox_b125_str) +80005ab0: 0000a203 lw x4,0(x1) +80005ab4: 01e20863 beq x4,x30,80005ac4 +80005ab8: 708022ef jal x5,800081c0 +80005abc: 80005aac .word 0x80005aac +80005ac0: 800165a9 .word 0x800165a9 +80005ac4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x7e7e7e7e +80005ac8: 00032d83 lw x27,0(x6) +80005acc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x7e7e7e7e +80005ad0: 00032783 lw x15,0(x6) +80005ad4: 00430313 addi x6,x6,4 + +80005ad8 : +Zknd_aes32dsmi_cg_cp_sbox_b126: + aes32dsmi x20, x27, x15, 2 # perform operation +80005ad8: aefd8a33 aes32dsmi x20,x27,x15,0x2 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b126, Zknd_aes32dsmi_cg_cp_sbox_b126_str) +80005adc: 0000a203 lw x4,0(x1) +80005ae0: 01420863 beq x4,x20,80005af0 +80005ae4: 6dc022ef jal x5,800081c0 +80005ae8: 80005ad8 .word 0x80005ad8 +80005aec: 800165e4 .word 0x800165e4 +80005af0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x7f7f7f7f +80005af4: 00032f83 lw x31,0(x6) +80005af8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x7f7f7f7f +80005afc: 00032783 lw x15,0(x6) +80005b00: 00430313 addi x6,x6,4 + +80005b04 : +Zknd_aes32dsmi_cg_cp_sbox_b127: + aes32dsmi x12, x31, x15, 1 # perform operation +80005b04: 6eff8633 aes32dsmi x12,x31,x15,0x1 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b127, Zknd_aes32dsmi_cg_cp_sbox_b127_str) +80005b08: 0000a203 lw x4,0(x1) +80005b0c: 00c20863 beq x4,x12,80005b1c +80005b10: 6b0022ef jal x5,800081c0 +80005b14: 80005b04 .word 0x80005b04 +80005b18: 8001661f .word 0x8001661f +80005b1c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x80808080 +80005b20: 00032c03 lw x24,0(x6) +80005b24: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x80808080 +80005b28: 00032b83 lw x23,0(x6) +80005b2c: 00430313 addi x6,x6,4 + +80005b30 : +Zknd_aes32dsmi_cg_cp_sbox_b128: + aes32dsmi x18, x24, x23, 2 # perform operation +80005b30: af7c0933 aes32dsmi x18,x24,x23,0x2 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b128, Zknd_aes32dsmi_cg_cp_sbox_b128_str) +80005b34: 0000a203 lw x4,0(x1) +80005b38: 01220863 beq x4,x18,80005b48 +80005b3c: 684022ef jal x5,800081c0 +80005b40: 80005b30 .word 0x80005b30 +80005b44: 8001665a .word 0x8001665a +80005b48: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x81818181 +80005b4c: 00032803 lw x16,0(x6) +80005b50: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x81818181 +80005b54: 00032e03 lw x28,0(x6) +80005b58: 00430313 addi x6,x6,4 + +80005b5c : +Zknd_aes32dsmi_cg_cp_sbox_b129: + aes32dsmi x8, x16, x28, 1 # perform operation +80005b5c: 6fc80433 aes32dsmi x8,x16,x28,0x1 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b129, Zknd_aes32dsmi_cg_cp_sbox_b129_str) +80005b60: 0000a203 lw x4,0(x1) +80005b64: 00820863 beq x4,x8,80005b74 +80005b68: 658022ef jal x5,800081c0 +80005b6c: 80005b5c .word 0x80005b5c +80005b70: 80016695 .word 0x80016695 +80005b74: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x82828282 +80005b78: 00032103 lw x2,0(x6) +80005b7c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x82828282 +80005b80: 00032383 lw x7,0(x6) +80005b84: 00430313 addi x6,x6,4 + +80005b88 : +Zknd_aes32dsmi_cg_cp_sbox_b130: + aes32dsmi x15, x2, x7, 0 # perform operation +80005b88: 2e7107b3 aes32dsmi x15,x2,x7,0x0 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b130, Zknd_aes32dsmi_cg_cp_sbox_b130_str) +80005b8c: 0000a203 lw x4,0(x1) +80005b90: 00f20863 beq x4,x15,80005ba0 +80005b94: 62c022ef jal x5,800081c0 +80005b98: 80005b88 .word 0x80005b88 +80005b9c: 800166d0 .word 0x800166d0 +80005ba0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x83838383 +80005ba4: 00032703 lw x14,0(x6) +80005ba8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x83838383 +80005bac: 00032103 lw x2,0(x6) +80005bb0: 00430313 addi x6,x6,4 + +80005bb4 : +Zknd_aes32dsmi_cg_cp_sbox_b131: + aes32dsmi x22, x14, x2, 3 # perform operation +80005bb4: ee270b33 aes32dsmi x22,x14,x2,0x3 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b131, Zknd_aes32dsmi_cg_cp_sbox_b131_str) +80005bb8: 0000a203 lw x4,0(x1) +80005bbc: 01620863 beq x4,x22,80005bcc +80005bc0: 600022ef jal x5,800081c0 +80005bc4: 80005bb4 .word 0x80005bb4 +80005bc8: 8001670b .word 0x8001670b +80005bcc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x84848484 +80005bd0: 00032903 lw x18,0(x6) +80005bd4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x84848484 +80005bd8: 00032783 lw x15,0(x6) +80005bdc: 00430313 addi x6,x6,4 + +80005be0 : +Zknd_aes32dsmi_cg_cp_sbox_b132: + aes32dsmi x24, x18, x15, 0 # perform operation +80005be0: 2ef90c33 aes32dsmi x24,x18,x15,0x0 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknd_aes32dsmi_cg_cp_sbox_b132, Zknd_aes32dsmi_cg_cp_sbox_b132_str) +80005be4: 0000a203 lw x4,0(x1) +80005be8: 01820863 beq x4,x24,80005bf8 +80005bec: 5d4022ef jal x5,800081c0 +80005bf0: 80005be0 .word 0x80005be0 +80005bf4: 80016746 .word 0x80016746 +80005bf8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x85858585 +80005bfc: 00032503 lw x10,0(x6) +80005c00: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x85858585 +80005c04: 00032103 lw x2,0(x6) +80005c08: 00430313 addi x6,x6,4 + +80005c0c : +Zknd_aes32dsmi_cg_cp_sbox_b133: + aes32dsmi x9, x10, x2, 0 # perform operation +80005c0c: 2e2504b3 aes32dsmi x9,x10,x2,0x0 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b133, Zknd_aes32dsmi_cg_cp_sbox_b133_str) +80005c10: 0000a203 lw x4,0(x1) +80005c14: 00920863 beq x4,x9,80005c24 +80005c18: 5a8022ef jal x5,800081c0 +80005c1c: 80005c0c .word 0x80005c0c +80005c20: 80016781 .word 0x80016781 +80005c24: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x86868686 +80005c28: 00032d83 lw x27,0(x6) +80005c2c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x86868686 +80005c30: 00032d03 lw x26,0(x6) +80005c34: 00430313 addi x6,x6,4 + +80005c38 : +Zknd_aes32dsmi_cg_cp_sbox_b134: + aes32dsmi x3, x27, x26, 1 # perform operation +80005c38: 6fad81b3 aes32dsmi x3,x27,x26,0x1 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b134, Zknd_aes32dsmi_cg_cp_sbox_b134_str) +80005c3c: 0000a203 lw x4,0(x1) +80005c40: 00320863 beq x4,x3,80005c50 +80005c44: 57c022ef jal x5,800081c0 +80005c48: 80005c38 .word 0x80005c38 +80005c4c: 800167bc .word 0x800167bc +80005c50: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x87878787 +80005c54: 00032f03 lw x30,0(x6) +80005c58: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x87878787 +80005c5c: 00032783 lw x15,0(x6) +80005c60: 00430313 addi x6,x6,4 + +80005c64 : +Zknd_aes32dsmi_cg_cp_sbox_b135: + aes32dsmi x22, x30, x15, 1 # perform operation +80005c64: 6eff0b33 aes32dsmi x22,x30,x15,0x1 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b135, Zknd_aes32dsmi_cg_cp_sbox_b135_str) +80005c68: 0000a203 lw x4,0(x1) +80005c6c: 01620863 beq x4,x22,80005c7c +80005c70: 550022ef jal x5,800081c0 +80005c74: 80005c64 .word 0x80005c64 +80005c78: 800167f7 .word 0x800167f7 +80005c7c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x88888888 +80005c80: 00032903 lw x18,0(x6) +80005c84: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x88888888 +80005c88: 00032983 lw x19,0(x6) +80005c8c: 00430313 addi x6,x6,4 + +80005c90 : +Zknd_aes32dsmi_cg_cp_sbox_b136: + aes32dsmi x26, x18, x19, 2 # perform operation +80005c90: af390d33 aes32dsmi x26,x18,x19,0x2 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b136, Zknd_aes32dsmi_cg_cp_sbox_b136_str) +80005c94: 0000a203 lw x4,0(x1) +80005c98: 01a20863 beq x4,x26,80005ca8 +80005c9c: 524022ef jal x5,800081c0 +80005ca0: 80005c90 .word 0x80005c90 +80005ca4: 80016832 .word 0x80016832 +80005ca8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x89898989 +80005cac: 00032f83 lw x31,0(x6) +80005cb0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x89898989 +80005cb4: 00032883 lw x17,0(x6) +80005cb8: 00430313 addi x6,x6,4 + +80005cbc : +Zknd_aes32dsmi_cg_cp_sbox_b137: + aes32dsmi x25, x31, x17, 2 # perform operation +80005cbc: af1f8cb3 aes32dsmi x25,x31,x17,0x2 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b137, Zknd_aes32dsmi_cg_cp_sbox_b137_str) +80005cc0: 0000a203 lw x4,0(x1) +80005cc4: 01920863 beq x4,x25,80005cd4 +80005cc8: 4f8022ef jal x5,800081c0 +80005ccc: 80005cbc .word 0x80005cbc +80005cd0: 8001686d .word 0x8001686d +80005cd4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x8a8a8a8a +80005cd8: 00032b03 lw x22,0(x6) +80005cdc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8a8a8a8a +80005ce0: 00032183 lw x3,0(x6) +80005ce4: 00430313 addi x6,x6,4 + +80005ce8 : +Zknd_aes32dsmi_cg_cp_sbox_b138: + aes32dsmi x18, x22, x3, 0 # perform operation +80005ce8: 2e3b0933 aes32dsmi x18,x22,x3,0x0 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b138, Zknd_aes32dsmi_cg_cp_sbox_b138_str) +80005cec: 0000a203 lw x4,0(x1) +80005cf0: 01220863 beq x4,x18,80005d00 +80005cf4: 4cc022ef jal x5,800081c0 +80005cf8: 80005ce8 .word 0x80005ce8 +80005cfc: 800168a8 .word 0x800168a8 +80005d00: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8b8b8b8b +80005d04: 00032603 lw x12,0(x6) +80005d08: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x8b8b8b8b +80005d0c: 00032683 lw x13,0(x6) +80005d10: 00430313 addi x6,x6,4 + +80005d14 : +Zknd_aes32dsmi_cg_cp_sbox_b139: + aes32dsmi x15, x12, x13, 3 # perform operation +80005d14: eed607b3 aes32dsmi x15,x12,x13,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b139, Zknd_aes32dsmi_cg_cp_sbox_b139_str) +80005d18: 0000a203 lw x4,0(x1) +80005d1c: 00f20863 beq x4,x15,80005d2c +80005d20: 4a0022ef jal x5,800081c0 +80005d24: 80005d14 .word 0x80005d14 +80005d28: 800168e3 .word 0x800168e3 +80005d2c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8c8c8c8c +80005d30: 00032683 lw x13,0(x6) +80005d34: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x8c8c8c8c +80005d38: 00032f03 lw x30,0(x6) +80005d3c: 00430313 addi x6,x6,4 + +80005d40 : +Zknd_aes32dsmi_cg_cp_sbox_b140: + aes32dsmi x12, x13, x30, 1 # perform operation +80005d40: 6fe68633 aes32dsmi x12,x13,x30,0x1 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b140, Zknd_aes32dsmi_cg_cp_sbox_b140_str) +80005d44: 0000a203 lw x4,0(x1) +80005d48: 00c20863 beq x4,x12,80005d58 +80005d4c: 474022ef jal x5,800081c0 +80005d50: 80005d40 .word 0x80005d40 +80005d54: 8001691e .word 0x8001691e +80005d58: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x8d8d8d8d +80005d5c: 00032403 lw x8,0(x6) +80005d60: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x8d8d8d8d +80005d64: 00032783 lw x15,0(x6) +80005d68: 00430313 addi x6,x6,4 + +80005d6c : +Zknd_aes32dsmi_cg_cp_sbox_b141: + aes32dsmi x2, x8, x15, 2 # perform operation +80005d6c: aef40133 aes32dsmi x2,x8,x15,0x2 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b141, Zknd_aes32dsmi_cg_cp_sbox_b141_str) +80005d70: 0000a203 lw x4,0(x1) +80005d74: 00220863 beq x4,x2,80005d84 +80005d78: 448022ef jal x5,800081c0 +80005d7c: 80005d6c .word 0x80005d6c +80005d80: 80016959 .word 0x80016959 +80005d84: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x8e8e8e8e +80005d88: 00032e03 lw x28,0(x6) +80005d8c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8e8e8e8e +80005d90: 00032d03 lw x26,0(x6) +80005d94: 00430313 addi x6,x6,4 + +80005d98 : +Zknd_aes32dsmi_cg_cp_sbox_b142: + aes32dsmi x14, x28, x26, 0 # perform operation +80005d98: 2fae0733 aes32dsmi x14,x28,x26,0x0 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b142, Zknd_aes32dsmi_cg_cp_sbox_b142_str) +80005d9c: 0000a203 lw x4,0(x1) +80005da0: 00e20863 beq x4,x14,80005db0 +80005da4: 41c022ef jal x5,800081c0 +80005da8: 80005d98 .word 0x80005d98 +80005dac: 80016994 .word 0x80016994 +80005db0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x8f8f8f8f +80005db4: 00032103 lw x2,0(x6) +80005db8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x8f8f8f8f +80005dbc: 00032b83 lw x23,0(x6) +80005dc0: 00430313 addi x6,x6,4 + +80005dc4 : +Zknd_aes32dsmi_cg_cp_sbox_b143: + aes32dsmi x31, x2, x23, 3 # perform operation +80005dc4: ef710fb3 aes32dsmi x31,x2,x23,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b143, Zknd_aes32dsmi_cg_cp_sbox_b143_str) +80005dc8: 0000a203 lw x4,0(x1) +80005dcc: 01f20863 beq x4,x31,80005ddc +80005dd0: 3f0022ef jal x5,800081c0 +80005dd4: 80005dc4 .word 0x80005dc4 +80005dd8: 800169cf .word 0x800169cf +80005ddc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x90909090 +80005de0: 00032d83 lw x27,0(x6) +80005de4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x90909090 +80005de8: 00032903 lw x18,0(x6) +80005dec: 00430313 addi x6,x6,4 + +80005df0 : +Zknd_aes32dsmi_cg_cp_sbox_b144: + aes32dsmi x13, x27, x18, 2 # perform operation +80005df0: af2d86b3 aes32dsmi x13,x27,x18,0x2 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zknd_aes32dsmi_cg_cp_sbox_b144, Zknd_aes32dsmi_cg_cp_sbox_b144_str) +80005df4: 0000a203 lw x4,0(x1) +80005df8: 00d20863 beq x4,x13,80005e08 +80005dfc: 3c4022ef jal x5,800081c0 +80005e00: 80005df0 .word 0x80005df0 +80005e04: 80016a0a .word 0x80016a0a +80005e08: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x91919191 +80005e0c: 00032583 lw x11,0(x6) +80005e10: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x91919191 +80005e14: 00032603 lw x12,0(x6) +80005e18: 00430313 addi x6,x6,4 + +80005e1c : +Zknd_aes32dsmi_cg_cp_sbox_b145: + aes32dsmi x25, x11, x12, 0 # perform operation +80005e1c: 2ec58cb3 aes32dsmi x25,x11,x12,0x0 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknd_aes32dsmi_cg_cp_sbox_b145, Zknd_aes32dsmi_cg_cp_sbox_b145_str) +80005e20: 0000a203 lw x4,0(x1) +80005e24: 01920863 beq x4,x25,80005e34 +80005e28: 398022ef jal x5,800081c0 +80005e2c: 80005e1c .word 0x80005e1c +80005e30: 80016a45 .word 0x80016a45 +80005e34: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x92929292 +80005e38: 00032d03 lw x26,0(x6) +80005e3c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x92929292 +80005e40: 00032483 lw x9,0(x6) +80005e44: 00430313 addi x6,x6,4 + +80005e48 : +Zknd_aes32dsmi_cg_cp_sbox_b146: + aes32dsmi x8, x26, x9, 0 # perform operation +80005e48: 2e9d0433 aes32dsmi x8,x26,x9,0x0 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b146, Zknd_aes32dsmi_cg_cp_sbox_b146_str) +80005e4c: 0000a203 lw x4,0(x1) +80005e50: 00820863 beq x4,x8,80005e60 +80005e54: 36c022ef jal x5,800081c0 +80005e58: 80005e48 .word 0x80005e48 +80005e5c: 80016a80 .word 0x80016a80 +80005e60: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x93939393 +80005e64: 00032e03 lw x28,0(x6) +80005e68: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x93939393 +80005e6c: 00032b83 lw x23,0(x6) +80005e70: 00430313 addi x6,x6,4 + +80005e74 : +Zknd_aes32dsmi_cg_cp_sbox_b147: + aes32dsmi x20, x28, x23, 3 # perform operation +80005e74: ef7e0a33 aes32dsmi x20,x28,x23,0x3 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b147, Zknd_aes32dsmi_cg_cp_sbox_b147_str) +80005e78: 0000a203 lw x4,0(x1) +80005e7c: 01420863 beq x4,x20,80005e8c +80005e80: 340022ef jal x5,800081c0 +80005e84: 80005e74 .word 0x80005e74 +80005e88: 80016abb .word 0x80016abb +80005e8c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x94949494 +80005e90: 00032d83 lw x27,0(x6) +80005e94: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x94949494 +80005e98: 00032b83 lw x23,0(x6) +80005e9c: 00430313 addi x6,x6,4 + +80005ea0 : +Zknd_aes32dsmi_cg_cp_sbox_b148: + aes32dsmi x2, x27, x23, 0 # perform operation +80005ea0: 2f7d8133 aes32dsmi x2,x27,x23,0x0 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b148, Zknd_aes32dsmi_cg_cp_sbox_b148_str) +80005ea4: 0000a203 lw x4,0(x1) +80005ea8: 00220863 beq x4,x2,80005eb8 +80005eac: 314022ef jal x5,800081c0 +80005eb0: 80005ea0 .word 0x80005ea0 +80005eb4: 80016af6 .word 0x80016af6 +80005eb8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x95959595 +80005ebc: 00032683 lw x13,0(x6) +80005ec0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x95959595 +80005ec4: 00032c03 lw x24,0(x6) +80005ec8: 00430313 addi x6,x6,4 + +80005ecc : +Zknd_aes32dsmi_cg_cp_sbox_b149: + aes32dsmi x31, x13, x24, 2 # perform operation +80005ecc: af868fb3 aes32dsmi x31,x13,x24,0x2 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b149, Zknd_aes32dsmi_cg_cp_sbox_b149_str) +80005ed0: 0000a203 lw x4,0(x1) +80005ed4: 01f20863 beq x4,x31,80005ee4 +80005ed8: 2e8022ef jal x5,800081c0 +80005edc: 80005ecc .word 0x80005ecc +80005ee0: 80016b31 .word 0x80016b31 +80005ee4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x96969696 +80005ee8: 00032483 lw x9,0(x6) +80005eec: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x96969696 +80005ef0: 00032a83 lw x21,0(x6) +80005ef4: 00430313 addi x6,x6,4 + +80005ef8 : +Zknd_aes32dsmi_cg_cp_sbox_b150: + aes32dsmi x7, x9, x21, 2 # perform operation +80005ef8: af5483b3 aes32dsmi x7,x9,x21,0x2 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b150, Zknd_aes32dsmi_cg_cp_sbox_b150_str) +80005efc: 0000a203 lw x4,0(x1) +80005f00: 00720863 beq x4,x7,80005f10 +80005f04: 2bc022ef jal x5,800081c0 +80005f08: 80005ef8 .word 0x80005ef8 +80005f0c: 80016b6c .word 0x80016b6c +80005f10: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x97979797 +80005f14: 00032583 lw x11,0(x6) +80005f18: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x97979797 +80005f1c: 00032f83 lw x31,0(x6) +80005f20: 00430313 addi x6,x6,4 + +80005f24 : +Zknd_aes32dsmi_cg_cp_sbox_b151: + aes32dsmi x10, x11, x31, 2 # perform operation +80005f24: aff58533 aes32dsmi x10,x11,x31,0x2 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b151, Zknd_aes32dsmi_cg_cp_sbox_b151_str) +80005f28: 0000a203 lw x4,0(x1) +80005f2c: 00a20863 beq x4,x10,80005f3c +80005f30: 290022ef jal x5,800081c0 +80005f34: 80005f24 .word 0x80005f24 +80005f38: 80016ba7 .word 0x80016ba7 +80005f3c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x98989898 +80005f40: 00032f03 lw x30,0(x6) +80005f44: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x98989898 +80005f48: 00032383 lw x7,0(x6) +80005f4c: 00430313 addi x6,x6,4 + +80005f50 : +Zknd_aes32dsmi_cg_cp_sbox_b152: + aes32dsmi x12, x30, x7, 0 # perform operation +80005f50: 2e7f0633 aes32dsmi x12,x30,x7,0x0 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b152, Zknd_aes32dsmi_cg_cp_sbox_b152_str) +80005f54: 0000a203 lw x4,0(x1) +80005f58: 00c20863 beq x4,x12,80005f68 +80005f5c: 264022ef jal x5,800081c0 +80005f60: 80005f50 .word 0x80005f50 +80005f64: 80016be2 .word 0x80016be2 +80005f68: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x99999999 +80005f6c: 00032b03 lw x22,0(x6) +80005f70: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x99999999 +80005f74: 00032103 lw x2,0(x6) +80005f78: 00430313 addi x6,x6,4 + +80005f7c : +Zknd_aes32dsmi_cg_cp_sbox_b153: + aes32dsmi x11, x22, x2, 3 # perform operation +80005f7c: ee2b05b3 aes32dsmi x11,x22,x2,0x3 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b153, Zknd_aes32dsmi_cg_cp_sbox_b153_str) +80005f80: 0000a203 lw x4,0(x1) +80005f84: 00b20863 beq x4,x11,80005f94 +80005f88: 238022ef jal x5,800081c0 +80005f8c: 80005f7c .word 0x80005f7c +80005f90: 80016c1d .word 0x80016c1d +80005f94: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x9a9a9a9a +80005f98: 00032a03 lw x20,0(x6) +80005f9c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x9a9a9a9a +80005fa0: 00032983 lw x19,0(x6) +80005fa4: 00430313 addi x6,x6,4 + +80005fa8 : +Zknd_aes32dsmi_cg_cp_sbox_b154: + aes32dsmi x8, x20, x19, 1 # perform operation +80005fa8: 6f3a0433 aes32dsmi x8,x20,x19,0x1 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b154, Zknd_aes32dsmi_cg_cp_sbox_b154_str) +80005fac: 0000a203 lw x4,0(x1) +80005fb0: 00820863 beq x4,x8,80005fc0 +80005fb4: 20c022ef jal x5,800081c0 +80005fb8: 80005fa8 .word 0x80005fa8 +80005fbc: 80016c58 .word 0x80016c58 +80005fc0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x9b9b9b9b +80005fc4: 00032f03 lw x30,0(x6) +80005fc8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x9b9b9b9b +80005fcc: 00032983 lw x19,0(x6) +80005fd0: 00430313 addi x6,x6,4 + +80005fd4 : +Zknd_aes32dsmi_cg_cp_sbox_b155: + aes32dsmi x28, x30, x19, 0 # perform operation +80005fd4: 2f3f0e33 aes32dsmi x28,x30,x19,0x0 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b155, Zknd_aes32dsmi_cg_cp_sbox_b155_str) +80005fd8: 0000a203 lw x4,0(x1) +80005fdc: 01c20863 beq x4,x28,80005fec +80005fe0: 1e0022ef jal x5,800081c0 +80005fe4: 80005fd4 .word 0x80005fd4 +80005fe8: 80016c93 .word 0x80016c93 +80005fec: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x9c9c9c9c +80005ff0: 00032e83 lw x29,0(x6) +80005ff4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x9c9c9c9c +80005ff8: 00032383 lw x7,0(x6) +80005ffc: 00430313 addi x6,x6,4 + +80006000 : +Zknd_aes32dsmi_cg_cp_sbox_b156: + aes32dsmi x12, x29, x7, 1 # perform operation +80006000: 6e7e8633 aes32dsmi x12,x29,x7,0x1 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b156, Zknd_aes32dsmi_cg_cp_sbox_b156_str) +80006004: 0000a203 lw x4,0(x1) +80006008: 00c20863 beq x4,x12,80006018 +8000600c: 1b4022ef jal x5,800081c0 +80006010: 80006000 .word 0x80006000 +80006014: 80016cce .word 0x80016cce +80006018: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x9d9d9d9d +8000601c: 00032883 lw x17,0(x6) +80006020: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x9d9d9d9d +80006024: 00032a03 lw x20,0(x6) +80006028: 00430313 addi x6,x6,4 + +8000602c : +Zknd_aes32dsmi_cg_cp_sbox_b157: + aes32dsmi x31, x17, x20, 3 # perform operation +8000602c: ef488fb3 aes32dsmi x31,x17,x20,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b157, Zknd_aes32dsmi_cg_cp_sbox_b157_str) +80006030: 0000a203 lw x4,0(x1) +80006034: 01f20863 beq x4,x31,80006044 +80006038: 188022ef jal x5,800081c0 +8000603c: 8000602c .word 0x8000602c +80006040: 80016d09 .word 0x80016d09 +80006044: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x9e9e9e9e +80006048: 00032603 lw x12,0(x6) +8000604c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x9e9e9e9e +80006050: 00032483 lw x9,0(x6) +80006054: 00430313 addi x6,x6,4 + +80006058 : +Zknd_aes32dsmi_cg_cp_sbox_b158: + aes32dsmi x8, x12, x9, 2 # perform operation +80006058: ae960433 aes32dsmi x8,x12,x9,0x2 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b158, Zknd_aes32dsmi_cg_cp_sbox_b158_str) +8000605c: 0000a203 lw x4,0(x1) +80006060: 00820863 beq x4,x8,80006070 +80006064: 15c022ef jal x5,800081c0 +80006068: 80006058 .word 0x80006058 +8000606c: 80016d44 .word 0x80016d44 +80006070: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x9f9f9f9f +80006074: 00032703 lw x14,0(x6) +80006078: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x9f9f9f9f +8000607c: 00032583 lw x11,0(x6) +80006080: 00430313 addi x6,x6,4 + +80006084 : +Zknd_aes32dsmi_cg_cp_sbox_b159: + aes32dsmi x9, x14, x11, 2 # perform operation +80006084: aeb704b3 aes32dsmi x9,x14,x11,0x2 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b159, Zknd_aes32dsmi_cg_cp_sbox_b159_str) +80006088: 0000a203 lw x4,0(x1) +8000608c: 00920863 beq x4,x9,8000609c +80006090: 130022ef jal x5,800081c0 +80006094: 80006084 .word 0x80006084 +80006098: 80016d7f .word 0x80016d7f +8000609c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xa0a0a0a0 +800060a0: 00032f03 lw x30,0(x6) +800060a4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xa0a0a0a0 +800060a8: 00032583 lw x11,0(x6) +800060ac: 00430313 addi x6,x6,4 + +800060b0 : +Zknd_aes32dsmi_cg_cp_sbox_b160: + aes32dsmi x3, x30, x11, 0 # perform operation +800060b0: 2ebf01b3 aes32dsmi x3,x30,x11,0x0 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b160, Zknd_aes32dsmi_cg_cp_sbox_b160_str) +800060b4: 0000a203 lw x4,0(x1) +800060b8: 00320863 beq x4,x3,800060c8 +800060bc: 104022ef jal x5,800081c0 +800060c0: 800060b0 .word 0x800060b0 +800060c4: 80016dba .word 0x80016dba +800060c8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xa1a1a1a1 +800060cc: 00032783 lw x15,0(x6) +800060d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xa1a1a1a1 +800060d4: 00032f03 lw x30,0(x6) +800060d8: 00430313 addi x6,x6,4 + +800060dc : +Zknd_aes32dsmi_cg_cp_sbox_b161: + aes32dsmi x16, x15, x30, 0 # perform operation +800060dc: 2fe78833 aes32dsmi x16,x15,x30,0x0 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b161, Zknd_aes32dsmi_cg_cp_sbox_b161_str) +800060e0: 0000a203 lw x4,0(x1) +800060e4: 01020863 beq x4,x16,800060f4 +800060e8: 0d8022ef jal x5,800081c0 +800060ec: 800060dc .word 0x800060dc +800060f0: 80016df5 .word 0x80016df5 +800060f4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xa2a2a2a2 +800060f8: 00032483 lw x9,0(x6) +800060fc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xa2a2a2a2 +80006100: 00032e83 lw x29,0(x6) +80006104: 00430313 addi x6,x6,4 + +80006108 : +Zknd_aes32dsmi_cg_cp_sbox_b162: + aes32dsmi x26, x9, x29, 2 # perform operation +80006108: afd48d33 aes32dsmi x26,x9,x29,0x2 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknd_aes32dsmi_cg_cp_sbox_b162, Zknd_aes32dsmi_cg_cp_sbox_b162_str) +8000610c: 0000a203 lw x4,0(x1) +80006110: 01a20863 beq x4,x26,80006120 +80006114: 0ac022ef jal x5,800081c0 +80006118: 80006108 .word 0x80006108 +8000611c: 80016e30 .word 0x80016e30 +80006120: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xa3a3a3a3 +80006124: 00032a83 lw x21,0(x6) +80006128: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xa3a3a3a3 +8000612c: 00032803 lw x16,0(x6) +80006130: 00430313 addi x6,x6,4 + +80006134 : +Zknd_aes32dsmi_cg_cp_sbox_b163: + aes32dsmi x17, x21, x16, 0 # perform operation +80006134: 2f0a88b3 aes32dsmi x17,x21,x16,0x0 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b163, Zknd_aes32dsmi_cg_cp_sbox_b163_str) +80006138: 0000a203 lw x4,0(x1) +8000613c: 01120863 beq x4,x17,8000614c +80006140: 080022ef jal x5,800081c0 +80006144: 80006134 .word 0x80006134 +80006148: 80016e6b .word 0x80016e6b +8000614c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xa4a4a4a4 +80006150: 00032d03 lw x26,0(x6) +80006154: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xa4a4a4a4 +80006158: 00032883 lw x17,0(x6) +8000615c: 00430313 addi x6,x6,4 + +80006160 : +Zknd_aes32dsmi_cg_cp_sbox_b164: + aes32dsmi x31, x26, x17, 3 # perform operation +80006160: ef1d0fb3 aes32dsmi x31,x26,x17,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b164, Zknd_aes32dsmi_cg_cp_sbox_b164_str) +80006164: 0000a203 lw x4,0(x1) +80006168: 01f20863 beq x4,x31,80006178 +8000616c: 054022ef jal x5,800081c0 +80006170: 80006160 .word 0x80006160 +80006174: 80016ea6 .word 0x80016ea6 +80006178: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xa5a5a5a5 +8000617c: 00032603 lw x12,0(x6) +80006180: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xa5a5a5a5 +80006184: 00032983 lw x19,0(x6) +80006188: 00430313 addi x6,x6,4 + +8000618c : +Zknd_aes32dsmi_cg_cp_sbox_b165: + aes32dsmi x14, x12, x19, 0 # perform operation +8000618c: 2f360733 aes32dsmi x14,x12,x19,0x0 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b165, Zknd_aes32dsmi_cg_cp_sbox_b165_str) +80006190: 0000a203 lw x4,0(x1) +80006194: 00e20863 beq x4,x14,800061a4 +80006198: 028022ef jal x5,800081c0 +8000619c: 8000618c .word 0x8000618c +800061a0: 80016ee1 .word 0x80016ee1 +800061a4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xa6a6a6a6 +800061a8: 00032783 lw x15,0(x6) +800061ac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xa6a6a6a6 +800061b0: 00032c03 lw x24,0(x6) +800061b4: 00430313 addi x6,x6,4 + +800061b8 : +Zknd_aes32dsmi_cg_cp_sbox_b166: + aes32dsmi x13, x15, x24, 1 # perform operation +800061b8: 6f8786b3 aes32dsmi x13,x15,x24,0x1 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zknd_aes32dsmi_cg_cp_sbox_b166, Zknd_aes32dsmi_cg_cp_sbox_b166_str) +800061bc: 0000a203 lw x4,0(x1) +800061c0: 00d20863 beq x4,x13,800061d0 +800061c4: 7fd012ef jal x5,800081c0 +800061c8: 800061b8 .word 0x800061b8 +800061cc: 80016f1c .word 0x80016f1c +800061d0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xa7a7a7a7 +800061d4: 00032483 lw x9,0(x6) +800061d8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xa7a7a7a7 +800061dc: 00032103 lw x2,0(x6) +800061e0: 00430313 addi x6,x6,4 + +800061e4 : +Zknd_aes32dsmi_cg_cp_sbox_b167: + aes32dsmi x17, x9, x2, 3 # perform operation +800061e4: ee2488b3 aes32dsmi x17,x9,x2,0x3 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b167, Zknd_aes32dsmi_cg_cp_sbox_b167_str) +800061e8: 0000a203 lw x4,0(x1) +800061ec: 01120863 beq x4,x17,800061fc +800061f0: 7d1012ef jal x5,800081c0 +800061f4: 800061e4 .word 0x800061e4 +800061f8: 80016f57 .word 0x80016f57 +800061fc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xa8a8a8a8 +80006200: 00032a03 lw x20,0(x6) +80006204: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xa8a8a8a8 +80006208: 00032783 lw x15,0(x6) +8000620c: 00430313 addi x6,x6,4 + +80006210 : +Zknd_aes32dsmi_cg_cp_sbox_b168: + aes32dsmi x10, x20, x15, 0 # perform operation +80006210: 2efa0533 aes32dsmi x10,x20,x15,0x0 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b168, Zknd_aes32dsmi_cg_cp_sbox_b168_str) +80006214: 0000a203 lw x4,0(x1) +80006218: 00a20863 beq x4,x10,80006228 +8000621c: 7a5012ef jal x5,800081c0 +80006220: 80006210 .word 0x80006210 +80006224: 80016f92 .word 0x80016f92 +80006228: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xa9a9a9a9 +8000622c: 00032f03 lw x30,0(x6) +80006230: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xa9a9a9a9 +80006234: 00032883 lw x17,0(x6) +80006238: 00430313 addi x6,x6,4 + +8000623c : +Zknd_aes32dsmi_cg_cp_sbox_b169: + aes32dsmi x2, x30, x17, 0 # perform operation +8000623c: 2f1f0133 aes32dsmi x2,x30,x17,0x0 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b169, Zknd_aes32dsmi_cg_cp_sbox_b169_str) +80006240: 0000a203 lw x4,0(x1) +80006244: 00220863 beq x4,x2,80006254 +80006248: 779012ef jal x5,800081c0 +8000624c: 8000623c .word 0x8000623c +80006250: 80016fcd .word 0x80016fcd +80006254: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xaaaaaaaa +80006258: 00032d03 lw x26,0(x6) +8000625c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xaaaaaaaa +80006260: 00032e83 lw x29,0(x6) +80006264: 00430313 addi x6,x6,4 + +80006268 : +Zknd_aes32dsmi_cg_cp_sbox_b170: + aes32dsmi x30, x26, x29, 0 # perform operation +80006268: 2fdd0f33 aes32dsmi x30,x26,x29,0x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b170, Zknd_aes32dsmi_cg_cp_sbox_b170_str) +8000626c: 0000a203 lw x4,0(x1) +80006270: 01e20863 beq x4,x30,80006280 +80006274: 74d012ef jal x5,800081c0 +80006278: 80006268 .word 0x80006268 +8000627c: 80017008 .word 0x80017008 +80006280: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xabababab +80006284: 00032c83 lw x25,0(x6) +80006288: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xabababab +8000628c: 00032383 lw x7,0(x6) +80006290: 00430313 addi x6,x6,4 + +80006294 : +Zknd_aes32dsmi_cg_cp_sbox_b171: + aes32dsmi x14, x25, x7, 3 # perform operation +80006294: ee7c8733 aes32dsmi x14,x25,x7,0x3 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b171, Zknd_aes32dsmi_cg_cp_sbox_b171_str) +80006298: 0000a203 lw x4,0(x1) +8000629c: 00e20863 beq x4,x14,800062ac +800062a0: 721012ef jal x5,800081c0 +800062a4: 80006294 .word 0x80006294 +800062a8: 80017043 .word 0x80017043 +800062ac: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xacacacac +800062b0: 00032b83 lw x23,0(x6) +800062b4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xacacacac +800062b8: 00032b03 lw x22,0(x6) +800062bc: 00430313 addi x6,x6,4 + +800062c0 : +Zknd_aes32dsmi_cg_cp_sbox_b172: + aes32dsmi x20, x23, x22, 0 # perform operation +800062c0: 2f6b8a33 aes32dsmi x20,x23,x22,0x0 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b172, Zknd_aes32dsmi_cg_cp_sbox_b172_str) +800062c4: 0000a203 lw x4,0(x1) +800062c8: 01420863 beq x4,x20,800062d8 +800062cc: 6f5012ef jal x5,800081c0 +800062d0: 800062c0 .word 0x800062c0 +800062d4: 8001707e .word 0x8001707e +800062d8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xadadadad +800062dc: 00032a03 lw x20,0(x6) +800062e0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xadadadad +800062e4: 00032983 lw x19,0(x6) +800062e8: 00430313 addi x6,x6,4 + +800062ec : +Zknd_aes32dsmi_cg_cp_sbox_b173: + aes32dsmi x14, x20, x19, 3 # perform operation +800062ec: ef3a0733 aes32dsmi x14,x20,x19,0x3 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b173, Zknd_aes32dsmi_cg_cp_sbox_b173_str) +800062f0: 0000a203 lw x4,0(x1) +800062f4: 00e20863 beq x4,x14,80006304 +800062f8: 6c9012ef jal x5,800081c0 +800062fc: 800062ec .word 0x800062ec +80006300: 800170b9 .word 0x800170b9 +80006304: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xaeaeaeae +80006308: 00032403 lw x8,0(x6) +8000630c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xaeaeaeae +80006310: 00032a83 lw x21,0(x6) +80006314: 00430313 addi x6,x6,4 + +80006318 : +Zknd_aes32dsmi_cg_cp_sbox_b174: + aes32dsmi x18, x8, x21, 1 # perform operation +80006318: 6f540933 aes32dsmi x18,x8,x21,0x1 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b174, Zknd_aes32dsmi_cg_cp_sbox_b174_str) +8000631c: 0000a203 lw x4,0(x1) +80006320: 01220863 beq x4,x18,80006330 +80006324: 69d012ef jal x5,800081c0 +80006328: 80006318 .word 0x80006318 +8000632c: 800170f4 .word 0x800170f4 +80006330: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xafafafaf +80006334: 00032583 lw x11,0(x6) +80006338: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xafafafaf +8000633c: 00032b83 lw x23,0(x6) +80006340: 00430313 addi x6,x6,4 + +80006344 : +Zknd_aes32dsmi_cg_cp_sbox_b175: + aes32dsmi x20, x11, x23, 2 # perform operation +80006344: af758a33 aes32dsmi x20,x11,x23,0x2 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b175, Zknd_aes32dsmi_cg_cp_sbox_b175_str) +80006348: 0000a203 lw x4,0(x1) +8000634c: 01420863 beq x4,x20,8000635c +80006350: 671012ef jal x5,800081c0 +80006354: 80006344 .word 0x80006344 +80006358: 8001712f .word 0x8001712f +8000635c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xb0b0b0b0 +80006360: 00032f03 lw x30,0(x6) +80006364: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xb0b0b0b0 +80006368: 00032a83 lw x21,0(x6) +8000636c: 00430313 addi x6,x6,4 + +80006370 : +Zknd_aes32dsmi_cg_cp_sbox_b176: + aes32dsmi x8, x30, x21, 2 # perform operation +80006370: af5f0433 aes32dsmi x8,x30,x21,0x2 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zknd_aes32dsmi_cg_cp_sbox_b176, Zknd_aes32dsmi_cg_cp_sbox_b176_str) +80006374: 0000a203 lw x4,0(x1) +80006378: 00820863 beq x4,x8,80006388 +8000637c: 645012ef jal x5,800081c0 +80006380: 80006370 .word 0x80006370 +80006384: 8001716a .word 0x8001716a +80006388: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xb1b1b1b1 +8000638c: 00032703 lw x14,0(x6) +80006390: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xb1b1b1b1 +80006394: 00032783 lw x15,0(x6) +80006398: 00430313 addi x6,x6,4 + +8000639c : +Zknd_aes32dsmi_cg_cp_sbox_b177: + aes32dsmi x7, x14, x15, 2 # perform operation +8000639c: aef703b3 aes32dsmi x7,x14,x15,0x2 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b177, Zknd_aes32dsmi_cg_cp_sbox_b177_str) +800063a0: 0000a203 lw x4,0(x1) +800063a4: 00720863 beq x4,x7,800063b4 +800063a8: 619012ef jal x5,800081c0 +800063ac: 8000639c .word 0x8000639c +800063b0: 800171a5 .word 0x800171a5 +800063b4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xb2b2b2b2 +800063b8: 00032c03 lw x24,0(x6) +800063bc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xb2b2b2b2 +800063c0: 00032703 lw x14,0(x6) +800063c4: 00430313 addi x6,x6,4 + +800063c8 : +Zknd_aes32dsmi_cg_cp_sbox_b178: + aes32dsmi x13, x24, x14, 2 # perform operation +800063c8: aeec06b3 aes32dsmi x13,x24,x14,0x2 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zknd_aes32dsmi_cg_cp_sbox_b178, Zknd_aes32dsmi_cg_cp_sbox_b178_str) +800063cc: 0000a203 lw x4,0(x1) +800063d0: 00d20863 beq x4,x13,800063e0 +800063d4: 5ed012ef jal x5,800081c0 +800063d8: 800063c8 .word 0x800063c8 +800063dc: 800171e0 .word 0x800171e0 +800063e0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xb3b3b3b3 +800063e4: 00032183 lw x3,0(x6) +800063e8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xb3b3b3b3 +800063ec: 00032f83 lw x31,0(x6) +800063f0: 00430313 addi x6,x6,4 + +800063f4 : +Zknd_aes32dsmi_cg_cp_sbox_b179: + aes32dsmi x10, x3, x31, 0 # perform operation +800063f4: 2ff18533 aes32dsmi x10,x3,x31,0x0 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b179, Zknd_aes32dsmi_cg_cp_sbox_b179_str) +800063f8: 0000a203 lw x4,0(x1) +800063fc: 00a20863 beq x4,x10,8000640c +80006400: 5c1012ef jal x5,800081c0 +80006404: 800063f4 .word 0x800063f4 +80006408: 8001721b .word 0x8001721b +8000640c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xb4b4b4b4 +80006410: 00032c03 lw x24,0(x6) +80006414: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xb4b4b4b4 +80006418: 00032103 lw x2,0(x6) +8000641c: 00430313 addi x6,x6,4 + +80006420 : +Zknd_aes32dsmi_cg_cp_sbox_b180: + aes32dsmi x21, x24, x2, 2 # perform operation +80006420: ae2c0ab3 aes32dsmi x21,x24,x2,0x2 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b180, Zknd_aes32dsmi_cg_cp_sbox_b180_str) +80006424: 0000a203 lw x4,0(x1) +80006428: 01520863 beq x4,x21,80006438 +8000642c: 595012ef jal x5,800081c0 +80006430: 80006420 .word 0x80006420 +80006434: 80017256 .word 0x80017256 +80006438: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xb5b5b5b5 +8000643c: 00032a83 lw x21,0(x6) +80006440: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xb5b5b5b5 +80006444: 00032903 lw x18,0(x6) +80006448: 00430313 addi x6,x6,4 + +8000644c : +Zknd_aes32dsmi_cg_cp_sbox_b181: + aes32dsmi x17, x21, x18, 0 # perform operation +8000644c: 2f2a88b3 aes32dsmi x17,x21,x18,0x0 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b181, Zknd_aes32dsmi_cg_cp_sbox_b181_str) +80006450: 0000a203 lw x4,0(x1) +80006454: 01120863 beq x4,x17,80006464 +80006458: 569012ef jal x5,800081c0 +8000645c: 8000644c .word 0x8000644c +80006460: 80017291 .word 0x80017291 +80006464: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xb6b6b6b6 +80006468: 00032903 lw x18,0(x6) +8000646c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xb6b6b6b6 +80006470: 00032b03 lw x22,0(x6) +80006474: 00430313 addi x6,x6,4 + +80006478 : +Zknd_aes32dsmi_cg_cp_sbox_b182: + aes32dsmi x7, x18, x22, 3 # perform operation +80006478: ef6903b3 aes32dsmi x7,x18,x22,0x3 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b182, Zknd_aes32dsmi_cg_cp_sbox_b182_str) +8000647c: 0000a203 lw x4,0(x1) +80006480: 00720863 beq x4,x7,80006490 +80006484: 53d012ef jal x5,800081c0 +80006488: 80006478 .word 0x80006478 +8000648c: 800172cc .word 0x800172cc +80006490: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xb7b7b7b7 +80006494: 00032783 lw x15,0(x6) +80006498: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xb7b7b7b7 +8000649c: 00032c83 lw x25,0(x6) +800064a0: 00430313 addi x6,x6,4 + +800064a4 : +Zknd_aes32dsmi_cg_cp_sbox_b183: + aes32dsmi x28, x15, x25, 3 # perform operation +800064a4: ef978e33 aes32dsmi x28,x15,x25,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b183, Zknd_aes32dsmi_cg_cp_sbox_b183_str) +800064a8: 0000a203 lw x4,0(x1) +800064ac: 01c20863 beq x4,x28,800064bc +800064b0: 511012ef jal x5,800081c0 +800064b4: 800064a4 .word 0x800064a4 +800064b8: 80017307 .word 0x80017307 +800064bc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xb8b8b8b8 +800064c0: 00032683 lw x13,0(x6) +800064c4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xb8b8b8b8 +800064c8: 00032e83 lw x29,0(x6) +800064cc: 00430313 addi x6,x6,4 + +800064d0 : +Zknd_aes32dsmi_cg_cp_sbox_b184: + aes32dsmi x12, x13, x29, 2 # perform operation +800064d0: afd68633 aes32dsmi x12,x13,x29,0x2 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b184, Zknd_aes32dsmi_cg_cp_sbox_b184_str) +800064d4: 0000a203 lw x4,0(x1) +800064d8: 00c20863 beq x4,x12,800064e8 +800064dc: 4e5012ef jal x5,800081c0 +800064e0: 800064d0 .word 0x800064d0 +800064e4: 80017342 .word 0x80017342 +800064e8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xb9b9b9b9 +800064ec: 00032103 lw x2,0(x6) +800064f0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xb9b9b9b9 +800064f4: 00032f03 lw x30,0(x6) +800064f8: 00430313 addi x6,x6,4 + +800064fc : +Zknd_aes32dsmi_cg_cp_sbox_b185: + aes32dsmi x28, x2, x30, 3 # perform operation +800064fc: efe10e33 aes32dsmi x28,x2,x30,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b185, Zknd_aes32dsmi_cg_cp_sbox_b185_str) +80006500: 0000a203 lw x4,0(x1) +80006504: 01c20863 beq x4,x28,80006514 +80006508: 4b9012ef jal x5,800081c0 +8000650c: 800064fc .word 0x800064fc +80006510: 8001737d .word 0x8001737d +80006514: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xbabababa +80006518: 00032b03 lw x22,0(x6) +8000651c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xbabababa +80006520: 00032e83 lw x29,0(x6) +80006524: 00430313 addi x6,x6,4 + +80006528 : +Zknd_aes32dsmi_cg_cp_sbox_b186: + aes32dsmi x16, x22, x29, 2 # perform operation +80006528: afdb0833 aes32dsmi x16,x22,x29,0x2 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b186, Zknd_aes32dsmi_cg_cp_sbox_b186_str) +8000652c: 0000a203 lw x4,0(x1) +80006530: 01020863 beq x4,x16,80006540 +80006534: 48d012ef jal x5,800081c0 +80006538: 80006528 .word 0x80006528 +8000653c: 800173b8 .word 0x800173b8 +80006540: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xbbbbbbbb +80006544: 00032f83 lw x31,0(x6) +80006548: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xbbbbbbbb +8000654c: 00032a83 lw x21,0(x6) +80006550: 00430313 addi x6,x6,4 + +80006554 : +Zknd_aes32dsmi_cg_cp_sbox_b187: + aes32dsmi x20, x31, x21, 3 # perform operation +80006554: ef5f8a33 aes32dsmi x20,x31,x21,0x3 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b187, Zknd_aes32dsmi_cg_cp_sbox_b187_str) +80006558: 0000a203 lw x4,0(x1) +8000655c: 01420863 beq x4,x20,8000656c +80006560: 461012ef jal x5,800081c0 +80006564: 80006554 .word 0x80006554 +80006568: 800173f3 .word 0x800173f3 +8000656c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xbcbcbcbc +80006570: 00032703 lw x14,0(x6) +80006574: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xbcbcbcbc +80006578: 00032183 lw x3,0(x6) +8000657c: 00430313 addi x6,x6,4 + +80006580 : +Zknd_aes32dsmi_cg_cp_sbox_b188: + aes32dsmi x20, x14, x3, 1 # perform operation +80006580: 6e370a33 aes32dsmi x20,x14,x3,0x1 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b188, Zknd_aes32dsmi_cg_cp_sbox_b188_str) +80006584: 0000a203 lw x4,0(x1) +80006588: 01420863 beq x4,x20,80006598 +8000658c: 435012ef jal x5,800081c0 +80006590: 80006580 .word 0x80006580 +80006594: 8001742e .word 0x8001742e +80006598: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xbdbdbdbd +8000659c: 00032a03 lw x20,0(x6) +800065a0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xbdbdbdbd +800065a4: 00032683 lw x13,0(x6) +800065a8: 00430313 addi x6,x6,4 + +800065ac : +Zknd_aes32dsmi_cg_cp_sbox_b189: + aes32dsmi x17, x20, x13, 3 # perform operation +800065ac: eeda08b3 aes32dsmi x17,x20,x13,0x3 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b189, Zknd_aes32dsmi_cg_cp_sbox_b189_str) +800065b0: 0000a203 lw x4,0(x1) +800065b4: 01120863 beq x4,x17,800065c4 +800065b8: 409012ef jal x5,800081c0 +800065bc: 800065ac .word 0x800065ac +800065c0: 80017469 .word 0x80017469 +800065c4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xbebebebe +800065c8: 00032a03 lw x20,0(x6) +800065cc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xbebebebe +800065d0: 00032d83 lw x27,0(x6) +800065d4: 00430313 addi x6,x6,4 + +800065d8 : +Zknd_aes32dsmi_cg_cp_sbox_b190: + aes32dsmi x21, x20, x27, 1 # perform operation +800065d8: 6fba0ab3 aes32dsmi x21,x20,x27,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b190, Zknd_aes32dsmi_cg_cp_sbox_b190_str) +800065dc: 0000a203 lw x4,0(x1) +800065e0: 01520863 beq x4,x21,800065f0 +800065e4: 3dd012ef jal x5,800081c0 +800065e8: 800065d8 .word 0x800065d8 +800065ec: 800174a4 .word 0x800174a4 +800065f0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xbfbfbfbf +800065f4: 00032c03 lw x24,0(x6) +800065f8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xbfbfbfbf +800065fc: 00032b03 lw x22,0(x6) +80006600: 00430313 addi x6,x6,4 + +80006604 : +Zknd_aes32dsmi_cg_cp_sbox_b191: + aes32dsmi x23, x24, x22, 1 # perform operation +80006604: 6f6c0bb3 aes32dsmi x23,x24,x22,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b191, Zknd_aes32dsmi_cg_cp_sbox_b191_str) +80006608: 0000a203 lw x4,0(x1) +8000660c: 01720863 beq x4,x23,8000661c +80006610: 3b1012ef jal x5,800081c0 +80006614: 80006604 .word 0x80006604 +80006618: 800174df .word 0x800174df +8000661c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xc0c0c0c0 +80006620: 00032c03 lw x24,0(x6) +80006624: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xc0c0c0c0 +80006628: 00032c83 lw x25,0(x6) +8000662c: 00430313 addi x6,x6,4 + +80006630 : +Zknd_aes32dsmi_cg_cp_sbox_b192: + aes32dsmi x23, x24, x25, 0 # perform operation +80006630: 2f9c0bb3 aes32dsmi x23,x24,x25,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b192, Zknd_aes32dsmi_cg_cp_sbox_b192_str) +80006634: 0000a203 lw x4,0(x1) +80006638: 01720863 beq x4,x23,80006648 +8000663c: 385012ef jal x5,800081c0 +80006640: 80006630 .word 0x80006630 +80006644: 8001751a .word 0x8001751a +80006648: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xc1c1c1c1 +8000664c: 00032503 lw x10,0(x6) +80006650: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xc1c1c1c1 +80006654: 00032b83 lw x23,0(x6) +80006658: 00430313 addi x6,x6,4 + +8000665c : +Zknd_aes32dsmi_cg_cp_sbox_b193: + aes32dsmi x18, x10, x23, 1 # perform operation +8000665c: 6f750933 aes32dsmi x18,x10,x23,0x1 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b193, Zknd_aes32dsmi_cg_cp_sbox_b193_str) +80006660: 0000a203 lw x4,0(x1) +80006664: 01220863 beq x4,x18,80006674 +80006668: 359012ef jal x5,800081c0 +8000666c: 8000665c .word 0x8000665c +80006670: 80017555 .word 0x80017555 +80006674: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xc2c2c2c2 +80006678: 00032983 lw x19,0(x6) +8000667c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xc2c2c2c2 +80006680: 00032503 lw x10,0(x6) +80006684: 00430313 addi x6,x6,4 + +80006688 : +Zknd_aes32dsmi_cg_cp_sbox_b194: + aes32dsmi x29, x19, x10, 0 # perform operation +80006688: 2ea98eb3 aes32dsmi x29,x19,x10,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b194, Zknd_aes32dsmi_cg_cp_sbox_b194_str) +8000668c: 0000a203 lw x4,0(x1) +80006690: 01d20863 beq x4,x29,800066a0 +80006694: 32d012ef jal x5,800081c0 +80006698: 80006688 .word 0x80006688 +8000669c: 80017590 .word 0x80017590 +800066a0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xc3c3c3c3 +800066a4: 00032b03 lw x22,0(x6) +800066a8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xc3c3c3c3 +800066ac: 00032703 lw x14,0(x6) +800066b0: 00430313 addi x6,x6,4 + +800066b4 : +Zknd_aes32dsmi_cg_cp_sbox_b195: + aes32dsmi x10, x22, x14, 3 # perform operation +800066b4: eeeb0533 aes32dsmi x10,x22,x14,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b195, Zknd_aes32dsmi_cg_cp_sbox_b195_str) +800066b8: 0000a203 lw x4,0(x1) +800066bc: 00a20863 beq x4,x10,800066cc +800066c0: 301012ef jal x5,800081c0 +800066c4: 800066b4 .word 0x800066b4 +800066c8: 800175cb .word 0x800175cb +800066cc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xc4c4c4c4 +800066d0: 00032883 lw x17,0(x6) +800066d4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xc4c4c4c4 +800066d8: 00032983 lw x19,0(x6) +800066dc: 00430313 addi x6,x6,4 + +800066e0 : +Zknd_aes32dsmi_cg_cp_sbox_b196: + aes32dsmi x11, x17, x19, 2 # perform operation +800066e0: af3885b3 aes32dsmi x11,x17,x19,0x2 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b196, Zknd_aes32dsmi_cg_cp_sbox_b196_str) +800066e4: 0000a203 lw x4,0(x1) +800066e8: 00b20863 beq x4,x11,800066f8 +800066ec: 2d5012ef jal x5,800081c0 +800066f0: 800066e0 .word 0x800066e0 +800066f4: 80017606 .word 0x80017606 +800066f8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xc5c5c5c5 +800066fc: 00032103 lw x2,0(x6) +80006700: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xc5c5c5c5 +80006704: 00032903 lw x18,0(x6) +80006708: 00430313 addi x6,x6,4 + +8000670c : +Zknd_aes32dsmi_cg_cp_sbox_b197: + aes32dsmi x30, x2, x18, 2 # perform operation +8000670c: af210f33 aes32dsmi x30,x2,x18,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b197, Zknd_aes32dsmi_cg_cp_sbox_b197_str) +80006710: 0000a203 lw x4,0(x1) +80006714: 01e20863 beq x4,x30,80006724 +80006718: 2a9012ef jal x5,800081c0 +8000671c: 8000670c .word 0x8000670c +80006720: 80017641 .word 0x80017641 +80006724: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xc6c6c6c6 +80006728: 00032f83 lw x31,0(x6) +8000672c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xc6c6c6c6 +80006730: 00032a83 lw x21,0(x6) +80006734: 00430313 addi x6,x6,4 + +80006738 : +Zknd_aes32dsmi_cg_cp_sbox_b198: + aes32dsmi x15, x31, x21, 1 # perform operation +80006738: 6f5f87b3 aes32dsmi x15,x31,x21,0x1 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b198, Zknd_aes32dsmi_cg_cp_sbox_b198_str) +8000673c: 0000a203 lw x4,0(x1) +80006740: 00f20863 beq x4,x15,80006750 +80006744: 27d012ef jal x5,800081c0 +80006748: 80006738 .word 0x80006738 +8000674c: 8001767c .word 0x8001767c +80006750: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xc7c7c7c7 +80006754: 00032383 lw x7,0(x6) +80006758: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xc7c7c7c7 +8000675c: 00032983 lw x19,0(x6) +80006760: 00430313 addi x6,x6,4 + +80006764 : +Zknd_aes32dsmi_cg_cp_sbox_b199: + aes32dsmi x20, x7, x19, 2 # perform operation +80006764: af338a33 aes32dsmi x20,x7,x19,0x2 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b199, Zknd_aes32dsmi_cg_cp_sbox_b199_str) +80006768: 0000a203 lw x4,0(x1) +8000676c: 01420863 beq x4,x20,8000677c +80006770: 251012ef jal x5,800081c0 +80006774: 80006764 .word 0x80006764 +80006778: 800176b7 .word 0x800176b7 +8000677c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xc8c8c8c8 +80006780: 00032c83 lw x25,0(x6) +80006784: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xc8c8c8c8 +80006788: 00032a83 lw x21,0(x6) +8000678c: 00430313 addi x6,x6,4 + +80006790 : +Zknd_aes32dsmi_cg_cp_sbox_b200: + aes32dsmi x2, x25, x21, 3 # perform operation +80006790: ef5c8133 aes32dsmi x2,x25,x21,0x3 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b200, Zknd_aes32dsmi_cg_cp_sbox_b200_str) +80006794: 0000a203 lw x4,0(x1) +80006798: 00220863 beq x4,x2,800067a8 +8000679c: 225012ef jal x5,800081c0 +800067a0: 80006790 .word 0x80006790 +800067a4: 800176f2 .word 0x800176f2 +800067a8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xc9c9c9c9 +800067ac: 00032b03 lw x22,0(x6) +800067b0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xc9c9c9c9 +800067b4: 00032603 lw x12,0(x6) +800067b8: 00430313 addi x6,x6,4 + +800067bc : +Zknd_aes32dsmi_cg_cp_sbox_b201: + aes32dsmi x31, x22, x12, 3 # perform operation +800067bc: eecb0fb3 aes32dsmi x31,x22,x12,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b201, Zknd_aes32dsmi_cg_cp_sbox_b201_str) +800067c0: 0000a203 lw x4,0(x1) +800067c4: 01f20863 beq x4,x31,800067d4 +800067c8: 1f9012ef jal x5,800081c0 +800067cc: 800067bc .word 0x800067bc +800067d0: 8001772d .word 0x8001772d +800067d4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xcacacaca +800067d8: 00032e03 lw x28,0(x6) +800067dc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xcacacaca +800067e0: 00032383 lw x7,0(x6) +800067e4: 00430313 addi x6,x6,4 + +800067e8 : +Zknd_aes32dsmi_cg_cp_sbox_b202: + aes32dsmi x19, x28, x7, 0 # perform operation +800067e8: 2e7e09b3 aes32dsmi x19,x28,x7,0x0 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b202, Zknd_aes32dsmi_cg_cp_sbox_b202_str) +800067ec: 0000a203 lw x4,0(x1) +800067f0: 01320863 beq x4,x19,80006800 +800067f4: 1cd012ef jal x5,800081c0 +800067f8: 800067e8 .word 0x800067e8 +800067fc: 80017768 .word 0x80017768 +80006800: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xcbcbcbcb +80006804: 00032903 lw x18,0(x6) +80006808: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xcbcbcbcb +8000680c: 00032f83 lw x31,0(x6) +80006810: 00430313 addi x6,x6,4 + +80006814 : +Zknd_aes32dsmi_cg_cp_sbox_b203: + aes32dsmi x24, x18, x31, 1 # perform operation +80006814: 6ff90c33 aes32dsmi x24,x18,x31,0x1 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknd_aes32dsmi_cg_cp_sbox_b203, Zknd_aes32dsmi_cg_cp_sbox_b203_str) +80006818: 0000a203 lw x4,0(x1) +8000681c: 01820863 beq x4,x24,8000682c +80006820: 1a1012ef jal x5,800081c0 +80006824: 80006814 .word 0x80006814 +80006828: 800177a3 .word 0x800177a3 +8000682c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xcccccccc +80006830: 00032a03 lw x20,0(x6) +80006834: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xcccccccc +80006838: 00032703 lw x14,0(x6) +8000683c: 00430313 addi x6,x6,4 + +80006840 : +Zknd_aes32dsmi_cg_cp_sbox_b204: + aes32dsmi x13, x20, x14, 2 # perform operation +80006840: aeea06b3 aes32dsmi x13,x20,x14,0x2 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zknd_aes32dsmi_cg_cp_sbox_b204, Zknd_aes32dsmi_cg_cp_sbox_b204_str) +80006844: 0000a203 lw x4,0(x1) +80006848: 00d20863 beq x4,x13,80006858 +8000684c: 175012ef jal x5,800081c0 +80006850: 80006840 .word 0x80006840 +80006854: 800177de .word 0x800177de +80006858: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xcdcdcdcd +8000685c: 00032c03 lw x24,0(x6) +80006860: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xcdcdcdcd +80006864: 00032f03 lw x30,0(x6) +80006868: 00430313 addi x6,x6,4 + +8000686c : +Zknd_aes32dsmi_cg_cp_sbox_b205: + aes32dsmi x16, x24, x30, 2 # perform operation +8000686c: afec0833 aes32dsmi x16,x24,x30,0x2 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b205, Zknd_aes32dsmi_cg_cp_sbox_b205_str) +80006870: 0000a203 lw x4,0(x1) +80006874: 01020863 beq x4,x16,80006884 +80006878: 149012ef jal x5,800081c0 +8000687c: 8000686c .word 0x8000686c +80006880: 80017819 .word 0x80017819 +80006884: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xcececece +80006888: 00032c03 lw x24,0(x6) +8000688c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xcececece +80006890: 00032d83 lw x27,0(x6) +80006894: 00430313 addi x6,x6,4 + +80006898 : +Zknd_aes32dsmi_cg_cp_sbox_b206: + aes32dsmi x12, x24, x27, 0 # perform operation +80006898: 2fbc0633 aes32dsmi x12,x24,x27,0x0 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b206, Zknd_aes32dsmi_cg_cp_sbox_b206_str) +8000689c: 0000a203 lw x4,0(x1) +800068a0: 00c20863 beq x4,x12,800068b0 +800068a4: 11d012ef jal x5,800081c0 +800068a8: 80006898 .word 0x80006898 +800068ac: 80017854 .word 0x80017854 +800068b0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xcfcfcfcf +800068b4: 00032903 lw x18,0(x6) +800068b8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xcfcfcfcf +800068bc: 00032d03 lw x26,0(x6) +800068c0: 00430313 addi x6,x6,4 + +800068c4 : +Zknd_aes32dsmi_cg_cp_sbox_b207: + aes32dsmi x23, x18, x26, 0 # perform operation +800068c4: 2fa90bb3 aes32dsmi x23,x18,x26,0x0 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b207, Zknd_aes32dsmi_cg_cp_sbox_b207_str) +800068c8: 0000a203 lw x4,0(x1) +800068cc: 01720863 beq x4,x23,800068dc +800068d0: 0f1012ef jal x5,800081c0 +800068d4: 800068c4 .word 0x800068c4 +800068d8: 8001788f .word 0x8001788f +800068dc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xd0d0d0d0 +800068e0: 00032a03 lw x20,0(x6) +800068e4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xd0d0d0d0 +800068e8: 00032703 lw x14,0(x6) +800068ec: 00430313 addi x6,x6,4 + +800068f0 : +Zknd_aes32dsmi_cg_cp_sbox_b208: + aes32dsmi x3, x20, x14, 2 # perform operation +800068f0: aeea01b3 aes32dsmi x3,x20,x14,0x2 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b208, Zknd_aes32dsmi_cg_cp_sbox_b208_str) +800068f4: 0000a203 lw x4,0(x1) +800068f8: 00320863 beq x4,x3,80006908 +800068fc: 0c5012ef jal x5,800081c0 +80006900: 800068f0 .word 0x800068f0 +80006904: 800178ca .word 0x800178ca +80006908: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xd1d1d1d1 +8000690c: 00032103 lw x2,0(x6) +80006910: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xd1d1d1d1 +80006914: 00032683 lw x13,0(x6) +80006918: 00430313 addi x6,x6,4 + +8000691c : +Zknd_aes32dsmi_cg_cp_sbox_b209: + aes32dsmi x3, x2, x13, 1 # perform operation +8000691c: 6ed101b3 aes32dsmi x3,x2,x13,0x1 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b209, Zknd_aes32dsmi_cg_cp_sbox_b209_str) +80006920: 0000a203 lw x4,0(x1) +80006924: 00320863 beq x4,x3,80006934 +80006928: 099012ef jal x5,800081c0 +8000692c: 8000691c .word 0x8000691c +80006930: 80017905 .word 0x80017905 +80006934: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xd2d2d2d2 +80006938: 00032b83 lw x23,0(x6) +8000693c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xd2d2d2d2 +80006940: 00032b03 lw x22,0(x6) +80006944: 00430313 addi x6,x6,4 + +80006948 : +Zknd_aes32dsmi_cg_cp_sbox_b210: + aes32dsmi x29, x23, x22, 3 # perform operation +80006948: ef6b8eb3 aes32dsmi x29,x23,x22,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b210, Zknd_aes32dsmi_cg_cp_sbox_b210_str) +8000694c: 0000a203 lw x4,0(x1) +80006950: 01d20863 beq x4,x29,80006960 +80006954: 06d012ef jal x5,800081c0 +80006958: 80006948 .word 0x80006948 +8000695c: 80017940 .word 0x80017940 +80006960: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xd3d3d3d3 +80006964: 00032383 lw x7,0(x6) +80006968: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xd3d3d3d3 +8000696c: 00032583 lw x11,0(x6) +80006970: 00430313 addi x6,x6,4 + +80006974 : +Zknd_aes32dsmi_cg_cp_sbox_b211: + aes32dsmi x28, x7, x11, 2 # perform operation +80006974: aeb38e33 aes32dsmi x28,x7,x11,0x2 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b211, Zknd_aes32dsmi_cg_cp_sbox_b211_str) +80006978: 0000a203 lw x4,0(x1) +8000697c: 01c20863 beq x4,x28,8000698c +80006980: 041012ef jal x5,800081c0 +80006984: 80006974 .word 0x80006974 +80006988: 8001797b .word 0x8001797b +8000698c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xd4d4d4d4 +80006990: 00032583 lw x11,0(x6) +80006994: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xd4d4d4d4 +80006998: 00032383 lw x7,0(x6) +8000699c: 00430313 addi x6,x6,4 + +800069a0 : +Zknd_aes32dsmi_cg_cp_sbox_b212: + aes32dsmi x18, x11, x7, 0 # perform operation +800069a0: 2e758933 aes32dsmi x18,x11,x7,0x0 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b212, Zknd_aes32dsmi_cg_cp_sbox_b212_str) +800069a4: 0000a203 lw x4,0(x1) +800069a8: 01220863 beq x4,x18,800069b8 +800069ac: 015012ef jal x5,800081c0 +800069b0: 800069a0 .word 0x800069a0 +800069b4: 800179b6 .word 0x800179b6 +800069b8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xd5d5d5d5 +800069bc: 00032f03 lw x30,0(x6) +800069c0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xd5d5d5d5 +800069c4: 00032403 lw x8,0(x6) +800069c8: 00430313 addi x6,x6,4 + +800069cc : +Zknd_aes32dsmi_cg_cp_sbox_b213: + aes32dsmi x23, x30, x8, 1 # perform operation +800069cc: 6e8f0bb3 aes32dsmi x23,x30,x8,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknd_aes32dsmi_cg_cp_sbox_b213, Zknd_aes32dsmi_cg_cp_sbox_b213_str) +800069d0: 0000a203 lw x4,0(x1) +800069d4: 01720863 beq x4,x23,800069e4 +800069d8: 7e8012ef jal x5,800081c0 +800069dc: 800069cc .word 0x800069cc +800069e0: 800179f1 .word 0x800179f1 +800069e4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xd6d6d6d6 +800069e8: 00032383 lw x7,0(x6) +800069ec: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xd6d6d6d6 +800069f0: 00032583 lw x11,0(x6) +800069f4: 00430313 addi x6,x6,4 + +800069f8 : +Zknd_aes32dsmi_cg_cp_sbox_b214: + aes32dsmi x12, x7, x11, 2 # perform operation +800069f8: aeb38633 aes32dsmi x12,x7,x11,0x2 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b214, Zknd_aes32dsmi_cg_cp_sbox_b214_str) +800069fc: 0000a203 lw x4,0(x1) +80006a00: 00c20863 beq x4,x12,80006a10 +80006a04: 7bc012ef jal x5,800081c0 +80006a08: 800069f8 .word 0x800069f8 +80006a0c: 80017a2c .word 0x80017a2c +80006a10: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xd7d7d7d7 +80006a14: 00032503 lw x10,0(x6) +80006a18: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xd7d7d7d7 +80006a1c: 00032e83 lw x29,0(x6) +80006a20: 00430313 addi x6,x6,4 + +80006a24 : +Zknd_aes32dsmi_cg_cp_sbox_b215: + aes32dsmi x16, x10, x29, 1 # perform operation +80006a24: 6fd50833 aes32dsmi x16,x10,x29,0x1 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b215, Zknd_aes32dsmi_cg_cp_sbox_b215_str) +80006a28: 0000a203 lw x4,0(x1) +80006a2c: 01020863 beq x4,x16,80006a3c +80006a30: 790012ef jal x5,800081c0 +80006a34: 80006a24 .word 0x80006a24 +80006a38: 80017a67 .word 0x80017a67 +80006a3c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xd8d8d8d8 +80006a40: 00032483 lw x9,0(x6) +80006a44: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xd8d8d8d8 +80006a48: 00032c03 lw x24,0(x6) +80006a4c: 00430313 addi x6,x6,4 + +80006a50 : +Zknd_aes32dsmi_cg_cp_sbox_b216: + aes32dsmi x27, x9, x24, 0 # perform operation +80006a50: 2f848db3 aes32dsmi x27,x9,x24,0x0 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b216, Zknd_aes32dsmi_cg_cp_sbox_b216_str) +80006a54: 0000a203 lw x4,0(x1) +80006a58: 01b20863 beq x4,x27,80006a68 +80006a5c: 764012ef jal x5,800081c0 +80006a60: 80006a50 .word 0x80006a50 +80006a64: 80017aa2 .word 0x80017aa2 +80006a68: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xd9d9d9d9 +80006a6c: 00032903 lw x18,0(x6) +80006a70: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xd9d9d9d9 +80006a74: 00032883 lw x17,0(x6) +80006a78: 00430313 addi x6,x6,4 + +80006a7c : +Zknd_aes32dsmi_cg_cp_sbox_b217: + aes32dsmi x11, x18, x17, 0 # perform operation +80006a7c: 2f1905b3 aes32dsmi x11,x18,x17,0x0 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b217, Zknd_aes32dsmi_cg_cp_sbox_b217_str) +80006a80: 0000a203 lw x4,0(x1) +80006a84: 00b20863 beq x4,x11,80006a94 +80006a88: 738012ef jal x5,800081c0 +80006a8c: 80006a7c .word 0x80006a7c +80006a90: 80017add .word 0x80017add +80006a94: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xdadadada +80006a98: 00032a83 lw x21,0(x6) +80006a9c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xdadadada +80006aa0: 00032503 lw x10,0(x6) +80006aa4: 00430313 addi x6,x6,4 + +80006aa8 : +Zknd_aes32dsmi_cg_cp_sbox_b218: + aes32dsmi x29, x21, x10, 3 # perform operation +80006aa8: eeaa8eb3 aes32dsmi x29,x21,x10,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b218, Zknd_aes32dsmi_cg_cp_sbox_b218_str) +80006aac: 0000a203 lw x4,0(x1) +80006ab0: 01d20863 beq x4,x29,80006ac0 +80006ab4: 70c012ef jal x5,800081c0 +80006ab8: 80006aa8 .word 0x80006aa8 +80006abc: 80017b18 .word 0x80017b18 +80006ac0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xdbdbdbdb +80006ac4: 00032703 lw x14,0(x6) +80006ac8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xdbdbdbdb +80006acc: 00032903 lw x18,0(x6) +80006ad0: 00430313 addi x6,x6,4 + +80006ad4 : +Zknd_aes32dsmi_cg_cp_sbox_b219: + aes32dsmi x31, x14, x18, 0 # perform operation +80006ad4: 2f270fb3 aes32dsmi x31,x14,x18,0x0 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknd_aes32dsmi_cg_cp_sbox_b219, Zknd_aes32dsmi_cg_cp_sbox_b219_str) +80006ad8: 0000a203 lw x4,0(x1) +80006adc: 01f20863 beq x4,x31,80006aec +80006ae0: 6e0012ef jal x5,800081c0 +80006ae4: 80006ad4 .word 0x80006ad4 +80006ae8: 80017b53 .word 0x80017b53 +80006aec: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xdcdcdcdc +80006af0: 00032a83 lw x21,0(x6) +80006af4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xdcdcdcdc +80006af8: 00032183 lw x3,0(x6) +80006afc: 00430313 addi x6,x6,4 + +80006b00 : +Zknd_aes32dsmi_cg_cp_sbox_b220: + aes32dsmi x22, x21, x3, 0 # perform operation +80006b00: 2e3a8b33 aes32dsmi x22,x21,x3,0x0 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b220, Zknd_aes32dsmi_cg_cp_sbox_b220_str) +80006b04: 0000a203 lw x4,0(x1) +80006b08: 01620863 beq x4,x22,80006b18 +80006b0c: 6b4012ef jal x5,800081c0 +80006b10: 80006b00 .word 0x80006b00 +80006b14: 80017b8e .word 0x80017b8e +80006b18: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xdddddddd +80006b1c: 00032883 lw x17,0(x6) +80006b20: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xdddddddd +80006b24: 00032983 lw x19,0(x6) +80006b28: 00430313 addi x6,x6,4 + +80006b2c : +Zknd_aes32dsmi_cg_cp_sbox_b221: + aes32dsmi x10, x17, x19, 3 # perform operation +80006b2c: ef388533 aes32dsmi x10,x17,x19,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b221, Zknd_aes32dsmi_cg_cp_sbox_b221_str) +80006b30: 0000a203 lw x4,0(x1) +80006b34: 00a20863 beq x4,x10,80006b44 +80006b38: 688012ef jal x5,800081c0 +80006b3c: 80006b2c .word 0x80006b2c +80006b40: 80017bc9 .word 0x80017bc9 +80006b44: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xdededede +80006b48: 00032a03 lw x20,0(x6) +80006b4c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xdededede +80006b50: 00032d83 lw x27,0(x6) +80006b54: 00430313 addi x6,x6,4 + +80006b58 : +Zknd_aes32dsmi_cg_cp_sbox_b222: + aes32dsmi x15, x20, x27, 1 # perform operation +80006b58: 6fba07b3 aes32dsmi x15,x20,x27,0x1 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b222, Zknd_aes32dsmi_cg_cp_sbox_b222_str) +80006b5c: 0000a203 lw x4,0(x1) +80006b60: 00f20863 beq x4,x15,80006b70 +80006b64: 65c012ef jal x5,800081c0 +80006b68: 80006b58 .word 0x80006b58 +80006b6c: 80017c04 .word 0x80017c04 +80006b70: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xdfdfdfdf +80006b74: 00032483 lw x9,0(x6) +80006b78: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xdfdfdfdf +80006b7c: 00032683 lw x13,0(x6) +80006b80: 00430313 addi x6,x6,4 + +80006b84 : +Zknd_aes32dsmi_cg_cp_sbox_b223: + aes32dsmi x7, x9, x13, 3 # perform operation +80006b84: eed483b3 aes32dsmi x7,x9,x13,0x3 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b223, Zknd_aes32dsmi_cg_cp_sbox_b223_str) +80006b88: 0000a203 lw x4,0(x1) +80006b8c: 00720863 beq x4,x7,80006b9c +80006b90: 630012ef jal x5,800081c0 +80006b94: 80006b84 .word 0x80006b84 +80006b98: 80017c3f .word 0x80017c3f +80006b9c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xe0e0e0e0 +80006ba0: 00032a03 lw x20,0(x6) +80006ba4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xe0e0e0e0 +80006ba8: 00032683 lw x13,0(x6) +80006bac: 00430313 addi x6,x6,4 + +80006bb0 : +Zknd_aes32dsmi_cg_cp_sbox_b224: + aes32dsmi x7, x20, x13, 0 # perform operation +80006bb0: 2eda03b3 aes32dsmi x7,x20,x13,0x0 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b224, Zknd_aes32dsmi_cg_cp_sbox_b224_str) +80006bb4: 0000a203 lw x4,0(x1) +80006bb8: 00720863 beq x4,x7,80006bc8 +80006bbc: 604012ef jal x5,800081c0 +80006bc0: 80006bb0 .word 0x80006bb0 +80006bc4: 80017c7a .word 0x80017c7a +80006bc8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xe1e1e1e1 +80006bcc: 00032c03 lw x24,0(x6) +80006bd0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xe1e1e1e1 +80006bd4: 00032f03 lw x30,0(x6) +80006bd8: 00430313 addi x6,x6,4 + +80006bdc : +Zknd_aes32dsmi_cg_cp_sbox_b225: + aes32dsmi x18, x24, x30, 1 # perform operation +80006bdc: 6fec0933 aes32dsmi x18,x24,x30,0x1 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknd_aes32dsmi_cg_cp_sbox_b225, Zknd_aes32dsmi_cg_cp_sbox_b225_str) +80006be0: 0000a203 lw x4,0(x1) +80006be4: 01220863 beq x4,x18,80006bf4 +80006be8: 5d8012ef jal x5,800081c0 +80006bec: 80006bdc .word 0x80006bdc +80006bf0: 80017cb5 .word 0x80017cb5 +80006bf4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xe2e2e2e2 +80006bf8: 00032903 lw x18,0(x6) +80006bfc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xe2e2e2e2 +80006c00: 00032d83 lw x27,0(x6) +80006c04: 00430313 addi x6,x6,4 + +80006c08 : +Zknd_aes32dsmi_cg_cp_sbox_b226: + aes32dsmi x22, x18, x27, 3 # perform operation +80006c08: efb90b33 aes32dsmi x22,x18,x27,0x3 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknd_aes32dsmi_cg_cp_sbox_b226, Zknd_aes32dsmi_cg_cp_sbox_b226_str) +80006c0c: 0000a203 lw x4,0(x1) +80006c10: 01620863 beq x4,x22,80006c20 +80006c14: 5ac012ef jal x5,800081c0 +80006c18: 80006c08 .word 0x80006c08 +80006c1c: 80017cf0 .word 0x80017cf0 +80006c20: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xe3e3e3e3 +80006c24: 00032903 lw x18,0(x6) +80006c28: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xe3e3e3e3 +80006c2c: 00032f03 lw x30,0(x6) +80006c30: 00430313 addi x6,x6,4 + +80006c34 : +Zknd_aes32dsmi_cg_cp_sbox_b227: + aes32dsmi x2, x18, x30, 1 # perform operation +80006c34: 6fe90133 aes32dsmi x2,x18,x30,0x1 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknd_aes32dsmi_cg_cp_sbox_b227, Zknd_aes32dsmi_cg_cp_sbox_b227_str) +80006c38: 0000a203 lw x4,0(x1) +80006c3c: 00220863 beq x4,x2,80006c4c +80006c40: 580012ef jal x5,800081c0 +80006c44: 80006c34 .word 0x80006c34 +80006c48: 80017d2b .word 0x80017d2b +80006c4c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xe4e4e4e4 +80006c50: 00032703 lw x14,0(x6) +80006c54: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xe4e4e4e4 +80006c58: 00032a03 lw x20,0(x6) +80006c5c: 00430313 addi x6,x6,4 + +80006c60 : +Zknd_aes32dsmi_cg_cp_sbox_b228: + aes32dsmi x15, x14, x20, 3 # perform operation +80006c60: ef4707b3 aes32dsmi x15,x14,x20,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zknd_aes32dsmi_cg_cp_sbox_b228, Zknd_aes32dsmi_cg_cp_sbox_b228_str) +80006c64: 0000a203 lw x4,0(x1) +80006c68: 00f20863 beq x4,x15,80006c78 +80006c6c: 554012ef jal x5,800081c0 +80006c70: 80006c60 .word 0x80006c60 +80006c74: 80017d66 .word 0x80017d66 +80006c78: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xe5e5e5e5 +80006c7c: 00032e83 lw x29,0(x6) +80006c80: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xe5e5e5e5 +80006c84: 00032b03 lw x22,0(x6) +80006c88: 00430313 addi x6,x6,4 + +80006c8c : +Zknd_aes32dsmi_cg_cp_sbox_b229: + aes32dsmi x19, x29, x22, 0 # perform operation +80006c8c: 2f6e89b3 aes32dsmi x19,x29,x22,0x0 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b229, Zknd_aes32dsmi_cg_cp_sbox_b229_str) +80006c90: 0000a203 lw x4,0(x1) +80006c94: 01320863 beq x4,x19,80006ca4 +80006c98: 528012ef jal x5,800081c0 +80006c9c: 80006c8c .word 0x80006c8c +80006ca0: 80017da1 .word 0x80017da1 +80006ca4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xe6e6e6e6 +80006ca8: 00032c83 lw x25,0(x6) +80006cac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xe6e6e6e6 +80006cb0: 00032d83 lw x27,0(x6) +80006cb4: 00430313 addi x6,x6,4 + +80006cb8 : +Zknd_aes32dsmi_cg_cp_sbox_b230: + aes32dsmi x20, x25, x27, 1 # perform operation +80006cb8: 6fbc8a33 aes32dsmi x20,x25,x27,0x1 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b230, Zknd_aes32dsmi_cg_cp_sbox_b230_str) +80006cbc: 0000a203 lw x4,0(x1) +80006cc0: 01420863 beq x4,x20,80006cd0 +80006cc4: 4fc012ef jal x5,800081c0 +80006cc8: 80006cb8 .word 0x80006cb8 +80006ccc: 80017ddc .word 0x80017ddc +80006cd0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xe7e7e7e7 +80006cd4: 00032503 lw x10,0(x6) +80006cd8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xe7e7e7e7 +80006cdc: 00032803 lw x16,0(x6) +80006ce0: 00430313 addi x6,x6,4 + +80006ce4 : +Zknd_aes32dsmi_cg_cp_sbox_b231: + aes32dsmi x30, x10, x16, 2 # perform operation +80006ce4: af050f33 aes32dsmi x30,x10,x16,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b231, Zknd_aes32dsmi_cg_cp_sbox_b231_str) +80006ce8: 0000a203 lw x4,0(x1) +80006cec: 01e20863 beq x4,x30,80006cfc +80006cf0: 4d0012ef jal x5,800081c0 +80006cf4: 80006ce4 .word 0x80006ce4 +80006cf8: 80017e17 .word 0x80017e17 +80006cfc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xe8e8e8e8 +80006d00: 00032983 lw x19,0(x6) +80006d04: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xe8e8e8e8 +80006d08: 00032503 lw x10,0(x6) +80006d0c: 00430313 addi x6,x6,4 + +80006d10 : +Zknd_aes32dsmi_cg_cp_sbox_b232: + aes32dsmi x29, x19, x10, 0 # perform operation +80006d10: 2ea98eb3 aes32dsmi x29,x19,x10,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b232, Zknd_aes32dsmi_cg_cp_sbox_b232_str) +80006d14: 0000a203 lw x4,0(x1) +80006d18: 01d20863 beq x4,x29,80006d28 +80006d1c: 4a4012ef jal x5,800081c0 +80006d20: 80006d10 .word 0x80006d10 +80006d24: 80017e52 .word 0x80017e52 +80006d28: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xe9e9e9e9 +80006d2c: 00032d83 lw x27,0(x6) +80006d30: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xe9e9e9e9 +80006d34: 00032b03 lw x22,0(x6) +80006d38: 00430313 addi x6,x6,4 + +80006d3c : +Zknd_aes32dsmi_cg_cp_sbox_b233: + aes32dsmi x7, x27, x22, 3 # perform operation +80006d3c: ef6d83b3 aes32dsmi x7,x27,x22,0x3 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknd_aes32dsmi_cg_cp_sbox_b233, Zknd_aes32dsmi_cg_cp_sbox_b233_str) +80006d40: 0000a203 lw x4,0(x1) +80006d44: 00720863 beq x4,x7,80006d54 +80006d48: 478012ef jal x5,800081c0 +80006d4c: 80006d3c .word 0x80006d3c +80006d50: 80017e8d .word 0x80017e8d +80006d54: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xeaeaeaea +80006d58: 00032403 lw x8,0(x6) +80006d5c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xeaeaeaea +80006d60: 00032783 lw x15,0(x6) +80006d64: 00430313 addi x6,x6,4 + +80006d68 : +Zknd_aes32dsmi_cg_cp_sbox_b234: + aes32dsmi x11, x8, x15, 0 # perform operation +80006d68: 2ef405b3 aes32dsmi x11,x8,x15,0x0 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b234, Zknd_aes32dsmi_cg_cp_sbox_b234_str) +80006d6c: 0000a203 lw x4,0(x1) +80006d70: 00b20863 beq x4,x11,80006d80 +80006d74: 44c012ef jal x5,800081c0 +80006d78: 80006d68 .word 0x80006d68 +80006d7c: 80017ec8 .word 0x80017ec8 +80006d80: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xebebebeb +80006d84: 00032583 lw x11,0(x6) +80006d88: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xebebebeb +80006d8c: 00032103 lw x2,0(x6) +80006d90: 00430313 addi x6,x6,4 + +80006d94 : +Zknd_aes32dsmi_cg_cp_sbox_b235: + aes32dsmi x21, x11, x2, 1 # perform operation +80006d94: 6e258ab3 aes32dsmi x21,x11,x2,0x1 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b235, Zknd_aes32dsmi_cg_cp_sbox_b235_str) +80006d98: 0000a203 lw x4,0(x1) +80006d9c: 01520863 beq x4,x21,80006dac +80006da0: 420012ef jal x5,800081c0 +80006da4: 80006d94 .word 0x80006d94 +80006da8: 80017f03 .word 0x80017f03 +80006dac: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xecececec +80006db0: 00032883 lw x17,0(x6) +80006db4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xecececec +80006db8: 00032b83 lw x23,0(x6) +80006dbc: 00430313 addi x6,x6,4 + +80006dc0 : +Zknd_aes32dsmi_cg_cp_sbox_b236: + aes32dsmi x21, x17, x23, 0 # perform operation +80006dc0: 2f788ab3 aes32dsmi x21,x17,x23,0x0 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b236, Zknd_aes32dsmi_cg_cp_sbox_b236_str) +80006dc4: 0000a203 lw x4,0(x1) +80006dc8: 01520863 beq x4,x21,80006dd8 +80006dcc: 3f4012ef jal x5,800081c0 +80006dd0: 80006dc0 .word 0x80006dc0 +80006dd4: 80017f3e .word 0x80017f3e +80006dd8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xedededed +80006ddc: 00032103 lw x2,0(x6) +80006de0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xedededed +80006de4: 00032a83 lw x21,0(x6) +80006de8: 00430313 addi x6,x6,4 + +80006dec : +Zknd_aes32dsmi_cg_cp_sbox_b237: + aes32dsmi x12, x2, x21, 0 # perform operation +80006dec: 2f510633 aes32dsmi x12,x2,x21,0x0 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknd_aes32dsmi_cg_cp_sbox_b237, Zknd_aes32dsmi_cg_cp_sbox_b237_str) +80006df0: 0000a203 lw x4,0(x1) +80006df4: 00c20863 beq x4,x12,80006e04 +80006df8: 3c8012ef jal x5,800081c0 +80006dfc: 80006dec .word 0x80006dec +80006e00: 80017f79 .word 0x80017f79 +80006e04: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xeeeeeeee +80006e08: 00032883 lw x17,0(x6) +80006e0c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xeeeeeeee +80006e10: 00032503 lw x10,0(x6) +80006e14: 00430313 addi x6,x6,4 + +80006e18 : +Zknd_aes32dsmi_cg_cp_sbox_b238: + aes32dsmi x11, x17, x10, 2 # perform operation +80006e18: aea885b3 aes32dsmi x11,x17,x10,0x2 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b238, Zknd_aes32dsmi_cg_cp_sbox_b238_str) +80006e1c: 0000a203 lw x4,0(x1) +80006e20: 00b20863 beq x4,x11,80006e30 +80006e24: 39c012ef jal x5,800081c0 +80006e28: 80006e18 .word 0x80006e18 +80006e2c: 80017fb4 .word 0x80017fb4 +80006e30: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xefefefef +80006e34: 00032983 lw x19,0(x6) +80006e38: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xefefefef +80006e3c: 00032c03 lw x24,0(x6) +80006e40: 00430313 addi x6,x6,4 + +80006e44 : +Zknd_aes32dsmi_cg_cp_sbox_b239: + aes32dsmi x27, x19, x24, 1 # perform operation +80006e44: 6f898db3 aes32dsmi x27,x19,x24,0x1 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknd_aes32dsmi_cg_cp_sbox_b239, Zknd_aes32dsmi_cg_cp_sbox_b239_str) +80006e48: 0000a203 lw x4,0(x1) +80006e4c: 01b20863 beq x4,x27,80006e5c +80006e50: 370012ef jal x5,800081c0 +80006e54: 80006e44 .word 0x80006e44 +80006e58: 80017fef .word 0x80017fef +80006e5c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xf0f0f0f0 +80006e60: 00032e83 lw x29,0(x6) +80006e64: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xf0f0f0f0 +80006e68: 00032e03 lw x28,0(x6) +80006e6c: 00430313 addi x6,x6,4 + +80006e70 : +Zknd_aes32dsmi_cg_cp_sbox_b240: + aes32dsmi x19, x29, x28, 3 # perform operation +80006e70: efce89b3 aes32dsmi x19,x29,x28,0x3 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknd_aes32dsmi_cg_cp_sbox_b240, Zknd_aes32dsmi_cg_cp_sbox_b240_str) +80006e74: 0000a203 lw x4,0(x1) +80006e78: 01320863 beq x4,x19,80006e88 +80006e7c: 344012ef jal x5,800081c0 +80006e80: 80006e70 .word 0x80006e70 +80006e84: 8001802a .word 0x8001802a +80006e88: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xf1f1f1f1 +80006e8c: 00032e03 lw x28,0(x6) +80006e90: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xf1f1f1f1 +80006e94: 00032983 lw x19,0(x6) +80006e98: 00430313 addi x6,x6,4 + +80006e9c : +Zknd_aes32dsmi_cg_cp_sbox_b241: + aes32dsmi x9, x28, x19, 2 # perform operation +80006e9c: af3e04b3 aes32dsmi x9,x28,x19,0x2 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknd_aes32dsmi_cg_cp_sbox_b241, Zknd_aes32dsmi_cg_cp_sbox_b241_str) +80006ea0: 0000a203 lw x4,0(x1) +80006ea4: 00920863 beq x4,x9,80006eb4 +80006ea8: 318012ef jal x5,800081c0 +80006eac: 80006e9c .word 0x80006e9c +80006eb0: 80018065 .word 0x80018065 +80006eb4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xf2f2f2f2 +80006eb8: 00032683 lw x13,0(x6) +80006ebc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xf2f2f2f2 +80006ec0: 00032503 lw x10,0(x6) +80006ec4: 00430313 addi x6,x6,4 + +80006ec8 : +Zknd_aes32dsmi_cg_cp_sbox_b242: + aes32dsmi x21, x13, x10, 0 # perform operation +80006ec8: 2ea68ab3 aes32dsmi x21,x13,x10,0x0 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknd_aes32dsmi_cg_cp_sbox_b242, Zknd_aes32dsmi_cg_cp_sbox_b242_str) +80006ecc: 0000a203 lw x4,0(x1) +80006ed0: 01520863 beq x4,x21,80006ee0 +80006ed4: 2ec012ef jal x5,800081c0 +80006ed8: 80006ec8 .word 0x80006ec8 +80006edc: 800180a0 .word 0x800180a0 +80006ee0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xf3f3f3f3 +80006ee4: 00032603 lw x12,0(x6) +80006ee8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xf3f3f3f3 +80006eec: 00032983 lw x19,0(x6) +80006ef0: 00430313 addi x6,x6,4 + +80006ef4 : +Zknd_aes32dsmi_cg_cp_sbox_b243: + aes32dsmi x10, x12, x19, 3 # perform operation +80006ef4: ef360533 aes32dsmi x10,x12,x19,0x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b243, Zknd_aes32dsmi_cg_cp_sbox_b243_str) +80006ef8: 0000a203 lw x4,0(x1) +80006efc: 00a20863 beq x4,x10,80006f0c +80006f00: 2c0012ef jal x5,800081c0 +80006f04: 80006ef4 .word 0x80006ef4 +80006f08: 800180db .word 0x800180db +80006f0c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xf4f4f4f4 +80006f10: 00032383 lw x7,0(x6) +80006f14: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xf4f4f4f4 +80006f18: 00032683 lw x13,0(x6) +80006f1c: 00430313 addi x6,x6,4 + +80006f20 : +Zknd_aes32dsmi_cg_cp_sbox_b244: + aes32dsmi x3, x7, x13, 2 # perform operation +80006f20: aed381b3 aes32dsmi x3,x7,x13,0x2 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknd_aes32dsmi_cg_cp_sbox_b244, Zknd_aes32dsmi_cg_cp_sbox_b244_str) +80006f24: 0000a203 lw x4,0(x1) +80006f28: 00320863 beq x4,x3,80006f38 +80006f2c: 294012ef jal x5,800081c0 +80006f30: 80006f20 .word 0x80006f20 +80006f34: 80018116 .word 0x80018116 +80006f38: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xf5f5f5f5 +80006f3c: 00032983 lw x19,0(x6) +80006f40: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xf5f5f5f5 +80006f44: 00032c83 lw x25,0(x6) +80006f48: 00430313 addi x6,x6,4 + +80006f4c : +Zknd_aes32dsmi_cg_cp_sbox_b245: + aes32dsmi x29, x19, x25, 0 # perform operation +80006f4c: 2f998eb3 aes32dsmi x29,x19,x25,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b245, Zknd_aes32dsmi_cg_cp_sbox_b245_str) +80006f50: 0000a203 lw x4,0(x1) +80006f54: 01d20863 beq x4,x29,80006f64 +80006f58: 268012ef jal x5,800081c0 +80006f5c: 80006f4c .word 0x80006f4c +80006f60: 80018151 .word 0x80018151 +80006f64: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xf6f6f6f6 +80006f68: 00032483 lw x9,0(x6) +80006f6c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xf6f6f6f6 +80006f70: 00032a03 lw x20,0(x6) +80006f74: 00430313 addi x6,x6,4 + +80006f78 : +Zknd_aes32dsmi_cg_cp_sbox_b246: + aes32dsmi x16, x9, x20, 3 # perform operation +80006f78: ef448833 aes32dsmi x16,x9,x20,0x3 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknd_aes32dsmi_cg_cp_sbox_b246, Zknd_aes32dsmi_cg_cp_sbox_b246_str) +80006f7c: 0000a203 lw x4,0(x1) +80006f80: 01020863 beq x4,x16,80006f90 +80006f84: 23c012ef jal x5,800081c0 +80006f88: 80006f78 .word 0x80006f78 +80006f8c: 8001818c .word 0x8001818c +80006f90: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xf7f7f7f7 +80006f94: 00032f03 lw x30,0(x6) +80006f98: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xf7f7f7f7 +80006f9c: 00032103 lw x2,0(x6) +80006fa0: 00430313 addi x6,x6,4 + +80006fa4 : +Zknd_aes32dsmi_cg_cp_sbox_b247: + aes32dsmi x11, x30, x2, 2 # perform operation +80006fa4: ae2f05b3 aes32dsmi x11,x30,x2,0x2 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknd_aes32dsmi_cg_cp_sbox_b247, Zknd_aes32dsmi_cg_cp_sbox_b247_str) +80006fa8: 0000a203 lw x4,0(x1) +80006fac: 00b20863 beq x4,x11,80006fbc +80006fb0: 210012ef jal x5,800081c0 +80006fb4: 80006fa4 .word 0x80006fa4 +80006fb8: 800181c7 .word 0x800181c7 +80006fbc: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xf8f8f8f8 +80006fc0: 00032d83 lw x27,0(x6) +80006fc4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xf8f8f8f8 +80006fc8: 00032a03 lw x20,0(x6) +80006fcc: 00430313 addi x6,x6,4 + +80006fd0 : +Zknd_aes32dsmi_cg_cp_sbox_b248: + aes32dsmi x29, x27, x20, 0 # perform operation +80006fd0: 2f4d8eb3 aes32dsmi x29,x27,x20,0x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b248, Zknd_aes32dsmi_cg_cp_sbox_b248_str) +80006fd4: 0000a203 lw x4,0(x1) +80006fd8: 01d20863 beq x4,x29,80006fe8 +80006fdc: 1e4012ef jal x5,800081c0 +80006fe0: 80006fd0 .word 0x80006fd0 +80006fe4: 80018202 .word 0x80018202 +80006fe8: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xf9f9f9f9 +80006fec: 00032b83 lw x23,0(x6) +80006ff0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xf9f9f9f9 +80006ff4: 00032903 lw x18,0(x6) +80006ff8: 00430313 addi x6,x6,4 + +80006ffc : +Zknd_aes32dsmi_cg_cp_sbox_b249: + aes32dsmi x28, x23, x18, 1 # perform operation +80006ffc: 6f2b8e33 aes32dsmi x28,x23,x18,0x1 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknd_aes32dsmi_cg_cp_sbox_b249, Zknd_aes32dsmi_cg_cp_sbox_b249_str) +80007000: 0000a203 lw x4,0(x1) +80007004: 01c20863 beq x4,x28,80007014 +80007008: 1b8012ef jal x5,800081c0 +8000700c: 80006ffc .word 0x80006ffc +80007010: 8001823d .word 0x8001823d +80007014: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xfafafafa +80007018: 00032e83 lw x29,0(x6) +8000701c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xfafafafa +80007020: 00032783 lw x15,0(x6) +80007024: 00430313 addi x6,x6,4 + +80007028 : +Zknd_aes32dsmi_cg_cp_sbox_b250: + aes32dsmi x14, x29, x15, 3 # perform operation +80007028: eefe8733 aes32dsmi x14,x29,x15,0x3 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zknd_aes32dsmi_cg_cp_sbox_b250, Zknd_aes32dsmi_cg_cp_sbox_b250_str) +8000702c: 0000a203 lw x4,0(x1) +80007030: 00e20863 beq x4,x14,80007040 +80007034: 18c012ef jal x5,800081c0 +80007038: 80007028 .word 0x80007028 +8000703c: 80018278 .word 0x80018278 +80007040: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfbfbfbfb +80007044: 00032d03 lw x26,0(x6) +80007048: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xfbfbfbfb +8000704c: 00032a03 lw x20,0(x6) +80007050: 00430313 addi x6,x6,4 + +80007054 : +Zknd_aes32dsmi_cg_cp_sbox_b251: + aes32dsmi x29, x26, x20, 3 # perform operation +80007054: ef4d0eb3 aes32dsmi x29,x26,x20,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknd_aes32dsmi_cg_cp_sbox_b251, Zknd_aes32dsmi_cg_cp_sbox_b251_str) +80007058: 0000a203 lw x4,0(x1) +8000705c: 01d20863 beq x4,x29,8000706c +80007060: 160012ef jal x5,800081c0 +80007064: 80007054 .word 0x80007054 +80007068: 800182b3 .word 0x800182b3 +8000706c: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xfcfcfcfc +80007070: 00032483 lw x9,0(x6) +80007074: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfcfcfcfc +80007078: 00032583 lw x11,0(x6) +8000707c: 00430313 addi x6,x6,4 + +80007080 : +Zknd_aes32dsmi_cg_cp_sbox_b252: + aes32dsmi x20, x9, x11, 3 # perform operation +80007080: eeb48a33 aes32dsmi x20,x9,x11,0x3 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknd_aes32dsmi_cg_cp_sbox_b252, Zknd_aes32dsmi_cg_cp_sbox_b252_str) +80007084: 0000a203 lw x4,0(x1) +80007088: 01420863 beq x4,x20,80007098 +8000708c: 134012ef jal x5,800081c0 +80007090: 80007080 .word 0x80007080 +80007094: 800182ee .word 0x800182ee +80007098: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xfdfdfdfd +8000709c: 00032d83 lw x27,0(x6) +800070a0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xfdfdfdfd +800070a4: 00032683 lw x13,0(x6) +800070a8: 00430313 addi x6,x6,4 + +800070ac : +Zknd_aes32dsmi_cg_cp_sbox_b253: + aes32dsmi x30, x27, x13, 0 # perform operation +800070ac: 2edd8f33 aes32dsmi x30,x27,x13,0x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknd_aes32dsmi_cg_cp_sbox_b253, Zknd_aes32dsmi_cg_cp_sbox_b253_str) +800070b0: 0000a203 lw x4,0(x1) +800070b4: 01e20863 beq x4,x30,800070c4 +800070b8: 108012ef jal x5,800081c0 +800070bc: 800070ac .word 0x800070ac +800070c0: 80018329 .word 0x80018329 +800070c4: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xfefefefe +800070c8: 00032403 lw x8,0(x6) +800070cc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xfefefefe +800070d0: 00032803 lw x16,0(x6) +800070d4: 00430313 addi x6,x6,4 + +800070d8 : +Zknd_aes32dsmi_cg_cp_sbox_b254: + aes32dsmi x10, x8, x16, 2 # perform operation +800070d8: af040533 aes32dsmi x10,x8,x16,0x2 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknd_aes32dsmi_cg_cp_sbox_b254, Zknd_aes32dsmi_cg_cp_sbox_b254_str) +800070dc: 0000a203 lw x4,0(x1) +800070e0: 00a20863 beq x4,x10,800070f0 +800070e4: 0dc012ef jal x5,800081c0 +800070e8: 800070d8 .word 0x800070d8 +800070ec: 80018364 .word 0x80018364 +800070f0: 00408093 addi x1,x1,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xffffffff +800070f4: 00032403 lw x8,0(x6) +800070f8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xffffffff +800070fc: 00032103 lw x2,0(x6) +80007100: 00430313 addi x6,x6,4 + +80007104 : +Zknd_aes32dsmi_cg_cp_sbox_b255: + aes32dsmi x17, x8, x2, 1 # perform operation +80007104: 6e2408b3 aes32dsmi x17,x8,x2,0x1 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknd_aes32dsmi_cg_cp_sbox_b255, Zknd_aes32dsmi_cg_cp_sbox_b255_str) +80007108: 0000a203 lw x4,0(x1) +8000710c: 01120863 beq x4,x17,8000711c +80007110: 0b0012ef jal x5,800081c0 +80007114: 80007104 .word 0x80007104 +80007118: 8001839f .word 0x8001839f +8000711c: 00408093 addi x1,x1,4 + + mv x2, x1 # restore signature pointer to default register for teardown +80007120: 00008113 addi x2,x1,0 + +80007124 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80007124: 00000513 addi x10,x0,0 +80007128: 00000073 ecall +8000712c: fff00513 addi x10,x0,-1 +80007130: 1d800413 addi x8,x0,472 + +80007134 : +80007134: 34002373 csrrs x6,mscratch,x0 + +80007138 : +80007138: 23832383 lw x7,568(x6) +8000713c: 23c32483 lw x9,572(x6) + +80007140 : +80007140: 22032383 lw x7,544(x6) + +80007144 : +80007144: 25032483 lw x9,592(x6) +80007148: 34049073 csrrw x0,mscratch,x9 + +8000714c : +8000714c: 24832483 lw x9,584(x6) +80007150: 305493f3 csrrw x7,mtvec,x9 +80007154: ffc4f493 andi x9,x9,-4 +80007158: ffc3f393 andi x7,x7,-4 +8000715c: 00749e63 bne x9,x7,80007178 + +80007160 : +80007160: 00030493 addi x9,x6,0 + +80007164 : +80007164: 0004a783 lw x15,0(x9) +80007168: 00f3a023 sw x15,0(x7) +8000716c: 00438393 addi x7,x7,4 +80007170: 00448493 addi x9,x9,4 +80007174: fe83c8e3 blt x7,x8,80007164 +80007178: 0000100f fence.i + +8000717c : +8000717c: 00000013 addi x0,x0,0 +80007180: 00000497 auipc x9,0x0 +80007184: 29048493 addi x9,x9,656 # 80007410 +80007188: 00000013 addi x0,x0,0 +8000718c: 00000013 addi x0,x0,0 +80007190: 00000013 addi x0,x0,0 +80007194: 00000013 addi x0,x0,0 +80007198: 00000013 addi x0,x0,0 +8000719c: 00000013 addi x0,x0,0 +800071a0: 10e49863 bne x9,x14,800072b0 +800071a4: 00000013 addi x0,x0,0 +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 00012517 auipc x10,0x12 +800071c4: 8a350513 addi x10,x10,-1885 # 80018a63 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 00023097 auipc x1,0x23 +800071e4: 384080e7 jalr x1,900(x1) # 8002a564 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00012517 auipc x10,0x12 +80007204: 8a150513 addi x10,x10,-1887 # 80018aa1 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00023097 auipc x1,0x23 +80007224: 344080e7 jalr x1,836(x1) # 8002a564 +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00012517 auipc x10,0x12 +80007244: 8c150513 addi x10,x10,-1855 # 80018b01 +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00023097 auipc x1,0x23 +80007264: 304080e7 jalr x1,772(x1) # 8002a564 +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00012517 auipc x10,0x12 +80007284: 42c50513 addi x10,x10,1068 # 800196ac +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00023097 auipc x1,0x23 +800072a4: 2c4080e7 jalr x1,708(x1) # 8002a564 +800072a8: 00023097 auipc x1,0x23 +800072ac: 31c080e7 jalr x1,796(x1) # 8002a5c4 + +800072b0 : +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00005317 auipc x6,0x5 +800072c4: 06830313 addi x6,x6,104 # 8000c328 +800072c8: 00000013 addi x0,x0,0 +800072cc: 00000013 addi x0,x0,0 +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00032303 lw x6,0(x6) +800072e4: 00000013 addi x0,x0,0 +800072e8: 00000013 addi x0,x0,0 +800072ec: 00000013 addi x0,x0,0 +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00014397 auipc x7,0x14 +80007304: 89838393 addi x7,x7,-1896 # 8001ab98 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 40730333 sub x6,x6,x7 +80007324: 00000013 addi x0,x0,0 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 00014417 auipc x8,0x14 +80007344: 85040413 addi x8,x8,-1968 # 8001ab90 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 00042203 lw x4,0(x8) +80007364: 00620863 beq x4,x6,80007374 +80007368: 6c1003ef jal x7,80008228 +8000736c: 800072b0 .word 0x800072b0 +80007370: 80018c55 .word 0x80018c55 + +80007374 : +80007374: bad0e4b7 lui x9,0xbad0e +80007378: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +8000737c: 00e49a63 bne x9,x14,80007390 +80007380: 6a9003ef jal x7,80008228 +80007384: 80007444 .word 0x80007444 +80007388: 80018ac3 .word 0x80018ac3 +8000738c: 00000341 .word 0x00000341 + +80007390 : +80007390: 00000013 addi x0,x0,0 +80007394: 00000013 addi x0,x0,0 +80007398: 00000013 addi x0,x0,0 +8000739c: 00000013 addi x0,x0,0 +800073a0: 00011517 auipc x10,0x11 +800073a4: 68450513 addi x10,x10,1668 # 80018a24 +800073a8: 00000013 addi x0,x0,0 +800073ac: 00000013 addi x0,x0,0 +800073b0: 00000013 addi x0,x0,0 +800073b4: 00000013 addi x0,x0,0 +800073b8: 00000013 addi x0,x0,0 +800073bc: 00000013 addi x0,x0,0 +800073c0: 00023097 auipc x1,0x23 +800073c4: 1a4080e7 jalr x1,420(x1) # 8002a564 +800073c8: 00023097 auipc x1,0x23 +800073cc: 1dc080e7 jalr x1,476(x1) # 8002a5a4 + +800073d0 : +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00011517 auipc x10,0x11 +800073e4: 68350513 addi x10,x10,1667 # 80018a63 +800073e8: 00000013 addi x0,x0,0 +800073ec: 00000013 addi x0,x0,0 +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00023097 auipc x1,0x23 +80007404: 164080e7 jalr x1,356(x1) # 8002a564 +80007408: 00023097 auipc x1,0x23 +8000740c: 1bc080e7 jalr x1,444(x1) # 8002a5c4 + +80007410 : +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00000717 auipc x14,0x0 +80007424: ff070713 addi x14,x14,-16 # 80007410 +80007428: 00000013 addi x0,x0,0 +8000742c: 00000013 addi x0,x0,0 +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: ce5ff06f jal x0,80007124 + +80007444 : +80007444: bad0e737 lui x14,0xbad0e +80007448: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000744c: cd9ff06f jal x0,80007124 +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: 00000013 addi x0,x0,0 +80007464: 00000013 addi x0,x0,0 +80007468: 00000013 addi x0,x0,0 +8000746c: 00000013 addi x0,x0,0 +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 + +80007480 : +80007480: 0800006f jal x0,80007500 +80007484: 0880006f jal x0,8000750c +80007488: 0900006f jal x0,80007518 +8000748c: 0980006f jal x0,80007524 +80007490: 0a00006f jal x0,80007530 +80007494: 0a80006f jal x0,8000753c +80007498: 0b00006f jal x0,80007548 +8000749c: 0b80006f jal x0,80007554 +800074a0: 0c00006f jal x0,80007560 +800074a4: 0c80006f jal x0,8000756c +800074a8: 0d00006f jal x0,80007578 +800074ac: 0d80006f jal x0,80007584 +800074b0: 0e00006f jal x0,80007590 +800074b4: 0e80006f jal x0,8000759c +800074b8: 0f00006f jal x0,800075a8 +800074bc: 0f80006f jal x0,800075b4 +800074c0: 1000006f jal x0,800075c0 +800074c4: 1080006f jal x0,800075cc +800074c8: 1100006f jal x0,800075d8 +800074cc: 1180006f jal x0,800075e4 +800074d0: 1200006f jal x0,800075f0 +800074d4: 1280006f jal x0,800075fc +800074d8: 1300006f jal x0,80007608 +800074dc: 1380006f jal x0,80007614 +800074e0: 1400006f jal x0,80007620 +800074e4: 13c0006f jal x0,80007620 +800074e8: 1380006f jal x0,80007620 +800074ec: 1340006f jal x0,80007620 +800074f0: 1300006f jal x0,80007620 +800074f4: 12c0006f jal x0,80007620 +800074f8: 1280006f jal x0,80007620 +800074fc: 1240006f jal x0,80007620 + +80007500 : +80007500: 34011173 csrrw x2,mscratch,x2 +80007504: 26f12823 sw x15,624(x2) +80007508: 13c007ef jal x15,80007644 +8000750c: 34011173 csrrw x2,mscratch,x2 +80007510: 26f12823 sw x15,624(x2) +80007514: 130007ef jal x15,80007644 +80007518: 34011173 csrrw x2,mscratch,x2 +8000751c: 26f12823 sw x15,624(x2) +80007520: 124007ef jal x15,80007644 +80007524: 34011173 csrrw x2,mscratch,x2 +80007528: 26f12823 sw x15,624(x2) +8000752c: 118007ef jal x15,80007644 +80007530: 34011173 csrrw x2,mscratch,x2 +80007534: 26f12823 sw x15,624(x2) +80007538: 10c007ef jal x15,80007644 +8000753c: 34011173 csrrw x2,mscratch,x2 +80007540: 26f12823 sw x15,624(x2) +80007544: 100007ef jal x15,80007644 +80007548: 34011173 csrrw x2,mscratch,x2 +8000754c: 26f12823 sw x15,624(x2) +80007550: 0f4007ef jal x15,80007644 +80007554: 34011173 csrrw x2,mscratch,x2 +80007558: 26f12823 sw x15,624(x2) +8000755c: 0e8007ef jal x15,80007644 +80007560: 34011173 csrrw x2,mscratch,x2 +80007564: 26f12823 sw x15,624(x2) +80007568: 0dc007ef jal x15,80007644 +8000756c: 34011173 csrrw x2,mscratch,x2 +80007570: 26f12823 sw x15,624(x2) +80007574: 0d0007ef jal x15,80007644 +80007578: 34011173 csrrw x2,mscratch,x2 +8000757c: 26f12823 sw x15,624(x2) +80007580: 0c4007ef jal x15,80007644 +80007584: 34011173 csrrw x2,mscratch,x2 +80007588: 26f12823 sw x15,624(x2) +8000758c: 0b8007ef jal x15,80007644 +80007590: 34011173 csrrw x2,mscratch,x2 +80007594: 26f12823 sw x15,624(x2) +80007598: 0ac007ef jal x15,80007644 +8000759c: 34011173 csrrw x2,mscratch,x2 +800075a0: 26f12823 sw x15,624(x2) +800075a4: 0a0007ef jal x15,80007644 +800075a8: 34011173 csrrw x2,mscratch,x2 +800075ac: 26f12823 sw x15,624(x2) +800075b0: 094007ef jal x15,80007644 +800075b4: 34011173 csrrw x2,mscratch,x2 +800075b8: 26f12823 sw x15,624(x2) +800075bc: 088007ef jal x15,80007644 +800075c0: 34011173 csrrw x2,mscratch,x2 +800075c4: 26f12823 sw x15,624(x2) +800075c8: 07c007ef jal x15,80007644 +800075cc: 34011173 csrrw x2,mscratch,x2 +800075d0: 26f12823 sw x15,624(x2) +800075d4: 070007ef jal x15,80007644 +800075d8: 34011173 csrrw x2,mscratch,x2 +800075dc: 26f12823 sw x15,624(x2) +800075e0: 064007ef jal x15,80007644 +800075e4: 34011173 csrrw x2,mscratch,x2 +800075e8: 26f12823 sw x15,624(x2) +800075ec: 058007ef jal x15,80007644 +800075f0: 34011173 csrrw x2,mscratch,x2 +800075f4: 26f12823 sw x15,624(x2) +800075f8: 04c007ef jal x15,80007644 +800075fc: 34011173 csrrw x2,mscratch,x2 +80007600: 26f12823 sw x15,624(x2) +80007604: 040007ef jal x15,80007644 +80007608: 34011173 csrrw x2,mscratch,x2 +8000760c: 26f12823 sw x15,624(x2) +80007610: 034007ef jal x15,80007644 +80007614: 34011173 csrrw x2,mscratch,x2 +80007618: 26f12823 sw x15,624(x2) +8000761c: 028007ef jal x15,80007644 + +80007620 : +80007620: 00000317 auipc x6,0x0 +80007624: b5c30313 addi x6,x6,-1188 # 8000717c +80007628: 00000013 addi x0,x0,0 +8000762c: 00000013 addi x0,x0,0 +80007630: 00000013 addi x0,x0,0 +80007634: 00000013 addi x0,x0,0 +80007638: 00000013 addi x0,x0,0 +8000763c: 00000013 addi x0,x0,0 +80007640: 00030067 jalr x0,0(x6) + +80007644 : +80007644: 26e12623 sw x14,620(x2) +80007648: 34011773 csrrw x14,mscratch,x2 +8000764c: 26e12a23 sw x14,628(x2) +80007650: 23012703 lw x14,560(x2) +80007654: 00070067 jalr x0,0(x14) + +80007658 : +80007658: 26912423 sw x9,616(x2) +8000765c: 26812223 sw x8,612(x2) +80007660: 26712023 sw x7,608(x2) +80007664: 24612e23 sw x6,604(x2) +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00005317 auipc x6,0x5 +80007684: a8830313 addi x6,x6,-1400 # 8000c108 +80007688: 00000013 addi x0,x0,0 +8000768c: 00000013 addi x0,x0,0 +80007690: 00000013 addi x0,x0,0 +80007694: 00000013 addi x0,x0,0 +80007698: 00000013 addi x0,x0,0 +8000769c: 00000013 addi x0,x0,0 +800076a0: 00032383 lw x7,0(x6) +800076a4: 00138393 addi x7,x7,1 +800076a8: 00732023 sw x7,0(x6) +800076ac: 34202773 csrrs x14,mcause,x0 + +800076b0 : +800076b0: 800014b7 lui x9,0x80001 +800076b4: fff48493 addi x9,x9,-1 # 80000fff +800076b8: 00e4f4b3 and x9,x9,x14 + +800076bc : +800076bc: ffe48413 addi x8,x9,-2 +800076c0: 00041663 bne x8,x0,800076cc + +800076c4 : +800076c4: 280506e3 beq x10,x0,80008150 +800076c8: 58c0006f jal x0,80007c54 + +800076cc : +800076cc: ff848413 addi x8,x9,-8 +800076d0: 00245413 srli x8,x8,0x2 +800076d4: 58041063 bne x8,x0,80007c54 + +800076d8 : +800076d8: 26050ce3 beq x10,x0,80008150 + +800076dc : +800076dc: fff50493 addi x9,x10,-1 +800076e0: 00500393 addi x7,x0,5 +800076e4: 0274e063 bltu x9,x7,80007704 +800076e8: 07300393 addi x7,x0,115 +800076ec: 00750463 beq x10,x7,800076f4 +800076f0: 0800006f jal x0,80007770 + +800076f4 : +800076f4: 34102573 csrrs x10,mepc,x0 +800076f8: 00450413 addi x8,x10,4 +800076fc: 34141073 csrrw x0,mepc,x8 +80007700: 7c00006f jal x0,80007ec0 + +80007704 : +80007704: 341024f3 csrrs x9,mepc,x0 +80007708: 00448493 addi x9,x9,4 +8000770c: 34149073 csrrw x0,mepc,x9 +80007710: 00100393 addi x7,x0,1 +80007714: 00750e63 beq x10,x7,80007730 +80007718: 00200393 addi x7,x0,2 +8000771c: 02750263 beq x10,x7,80007740 +80007720: 00300393 addi x7,x0,3 +80007724: 02750c63 beq x10,x7,8000775c +80007728: fff00513 addi x10,x0,-1 +8000772c: 7940006f jal x0,80007ec0 + +80007730 : +80007730: 000024b7 lui x9,0x2 +80007734: 80048493 addi x9,x9,-2048 # 1800 +80007738: 3004a073 csrrs x0,mstatus,x9 +8000773c: 7840006f jal x0,80007ec0 + +80007740 : +80007740: 000024b7 lui x9,0x2 +80007744: 80048493 addi x9,x9,-2048 # 1800 +80007748: 3004b073 csrrc x0,mstatus,x9 +8000774c: 000014b7 lui x9,0x1 +80007750: 80048493 addi x9,x9,-2048 # 800 +80007754: 3004a073 csrrs x0,mstatus,x9 +80007758: 7680006f jal x0,80007ec0 + +8000775c : +8000775c: 000024b7 lui x9,0x2 +80007760: 80048493 addi x9,x9,-2048 # 1800 +80007764: 3004b073 csrrc x0,mstatus,x9 +80007768: 7580006f jal x0,80007ec0 + +8000776c : +8000776c: 00000013 addi x0,x0,0 + +80007770 : +80007770: 00000013 addi x0,x0,0 +80007774: 00000013 addi x0,x0,0 +80007778: 00000013 addi x0,x0,0 +8000777c: 00000013 addi x0,x0,0 +80007780: 00000397 auipc x7,0x0 +80007784: 17038393 addi x7,x7,368 # 800078f0 +80007788: 00000013 addi x0,x0,0 +8000778c: 00000013 addi x0,x0,0 +80007790: 00000013 addi x0,x0,0 +80007794: 00000013 addi x0,x0,0 +80007798: 00000013 addi x0,x0,0 +8000779c: 00000013 addi x0,x0,0 + +800077a0 : +800077a0: 0003a403 lw x8,0(x7) +800077a4: 00a40863 beq x8,x10,800077b4 +800077a8: 04040863 beq x8,x0,800077f8 +800077ac: 00838393 addi x7,x7,8 +800077b0: ff1ff06f jal x0,800077a0 + +800077b4 : +800077b4: 00008493 addi x9,x1,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000097 auipc x1,0x0 +800077c4: 02408093 addi x1,x1,36 # 800077e4 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 +800077e0: 00038067 jalr x0,0(x7) + +800077e4 : +800077e4: 00048093 addi x1,x9,0 +800077e8: 34102473 csrrs x8,mepc,x0 +800077ec: 00440413 addi x8,x8,4 +800077f0: 34141073 csrrw x0,mepc,x8 +800077f4: 6cc0006f jal x0,80007ec0 + +800077f8 : +800077f8: 00050493 addi x9,x10,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00013517 auipc x10,0x13 +80007804: 8e350513 addi x10,x10,-1821 # 8001a0e3 +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00023097 auipc x1,0x23 +80007824: d44080e7 jalr x1,-700(x1) # 8002a564 +80007828: 00048513 addi x10,x9,0 +8000782c: 02000593 addi x11,x0,32 +80007830: 4a8020ef jal x1,80009cd8 +80007834: 00000013 addi x0,x0,0 +80007838: 00000013 addi x0,x0,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00011517 auipc x10,0x11 +80007844: d0850513 addi x10,x10,-760 # 80018548 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00000013 addi x0,x0,0 +8000786c: 00000013 addi x0,x0,0 +80007870: 00000013 addi x0,x0,0 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: 2ea50513 addi x10,x10,746 # 80018b6a +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: 1a350513 addi x10,x10,419 # 80018a63 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00023097 auipc x1,0x23 +800078ec: cdc080e7 jalr x1,-804(x1) # 8002a5c4 + +800078f0 : +800078f0: 30002573 .word 0x30002573 +800078f4: 00008067 jalr x0,0(x1) +800078f8: 30059073 .word 0x30059073 +800078fc: 00008067 jalr x0,0(x1) +80007900: 3005a073 .word 0x3005a073 +80007904: 00008067 jalr x0,0(x1) +80007908: 3005b073 .word 0x3005b073 +8000790c: 00008067 jalr x0,0(x1) +80007910: 30402573 .word 0x30402573 +80007914: 00008067 jalr x0,0(x1) +80007918: 30459073 .word 0x30459073 +8000791c: 00008067 jalr x0,0(x1) +80007920: 3045a073 .word 0x3045a073 +80007924: 00008067 jalr x0,0(x1) +80007928: 3045b073 .word 0x3045b073 +8000792c: 00008067 jalr x0,0(x1) +80007930: 30602573 .word 0x30602573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30659073 .word 0x30659073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3065a073 .word 0x3065a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3065b073 .word 0x3065b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30a02573 .word 0x30a02573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30a59073 .word 0x30a59073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 30a5a073 .word 0x30a5a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 30a5b073 .word 0x30a5b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 34402573 .word 0x34402573 +80007974: 00008067 jalr x0,0(x1) +80007978: 34459073 .word 0x34459073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3445a073 .word 0x3445a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3445b073 .word 0x3445b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 74702573 .word 0x74702573 +80007994: 00008067 jalr x0,0(x1) +80007998: 74759073 .word 0x74759073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 7475a073 .word 0x7475a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 7475b073 .word 0x7475b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 32002573 .word 0x32002573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 32059073 .word 0x32059073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3205a073 .word 0x3205a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3205b073 .word 0x3205b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: b0002573 .word 0xb0002573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: b0059073 .word 0xb0059073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: b005a073 .word 0xb005a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: b005b073 .word 0xb005b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: b0202573 .word 0xb0202573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: b0259073 .word 0xb0259073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: b025a073 .word 0xb025a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: b025b073 .word 0xb025b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: 10002573 .word 0x10002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: 10059073 .word 0x10059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: 1005a073 .word 0x1005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: 1005b073 .word 0x1005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: 10402573 .word 0x10402573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: 10459073 .word 0x10459073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: 1045a073 .word 0x1045a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: 1045b073 .word 0x1045b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10602573 .word 0x10602573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10659073 .word 0x10659073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1065a073 .word 0x1065a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1065b073 .word 0x1065b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10a02573 .word 0x10a02573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10a59073 .word 0x10a59073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 10a5a073 .word 0x10a5a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 10a5b073 .word 0x10a5b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 14402573 .word 0x14402573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 14459073 .word 0x14459073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1445a073 .word 0x1445a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1445b073 .word 0x1445b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 14d02573 .word 0x14d02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 14d59073 .word 0x14d59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 14d5a073 .word 0x14d5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 14d5b073 .word 0x14d5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 18002573 .word 0x18002573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 18059073 .word 0x18059073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1805a073 .word 0x1805a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1805b073 .word 0x1805b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 7a002573 .word 0x7a002573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 7a059073 .word 0x7a059073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 7a05a073 .word 0x7a05a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 7a05b073 .word 0x7a05b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 7a102573 .word 0x7a102573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 7a159073 .word 0x7a159073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 7a15a073 .word 0x7a15a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 7a15b073 .word 0x7a15b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a202573 .word 0x7a202573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a259073 .word 0x7a259073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a25a073 .word 0x7a25a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a25b073 .word 0x7a25b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a302573 .word 0x7a302573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a359073 .word 0x7a359073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a35a073 .word 0x7a35a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a35b073 .word 0x7a35b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a402573 .word 0x7a402573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a459073 .word 0x7a459073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a45a073 .word 0x7a45a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a45b073 .word 0x7a45b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a502573 .word 0x7a502573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a559073 .word 0x7a559073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a55a073 .word 0x7a55a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a55b073 .word 0x7a55b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a802573 .word 0x7a802573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a859073 .word 0x7a859073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a85a073 .word 0x7a85a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a85b073 .word 0x7a85b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7aa02573 .word 0x7aa02573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7aa59073 .word 0x7aa59073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7aa5a073 .word 0x7aa5a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7aa5b073 .word 0x7aa5b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 5a802573 .word 0x5a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 5a859073 .word 0x5a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 5a85a073 .word 0x5a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 5a85b073 .word 0x5a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 6a802573 .word 0x6a802573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 6a859073 .word 0x6a859073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 6a85a073 .word 0x6a85a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 6a85b073 .word 0x6a85b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 0005a503 lw x10,0(x11) +80007c34: 00008067 jalr x0,0(x1) +80007c38: 0045a503 lw x10,4(x11) +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 00c5a023 sw x12,0(x11) +80007c44: 00008067 jalr x0,0(x1) +80007c48: 00c5a223 sw x12,4(x11) +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 00000000 .word 0x00000000 + +80007c54 : +80007c54: 01000393 addi x7,x0,16 +80007c58: 00075c63 bge x14,x0,80007c70 + +80007c5c : +80007c5c: 00171413 slli x8,x14,0x1 +80007c60: ff240413 addi x8,x8,-14 +80007c64: 00045663 bge x8,x0,80007c70 +80007c68: 00c00393 addi x7,x0,12 +80007c6c: 0040006f jal x0,80007c70 + +80007c70 : +80007c70: d6810113 addi x2,x2,-664 +80007c74: 4b012303 lw x6,1200(x2) +80007c78: 007304b3 add x9,x6,x7 +80007c7c: 4a912823 sw x9,1200(x2) +80007c80: 49012403 lw x8,1168(x2) +80007c84: 40830333 sub x6,x6,x8 +80007c88: 29810113 addi x2,x2,664 +80007c8c: 1f812403 lw x8,504(x2) +80007c90: 00830333 add x6,x6,x8 +80007c94: 34102473 csrrs x8,mepc,x0 +80007c98: 00000013 addi x0,x0,0 +80007c9c: 00000013 addi x0,x0,0 +80007ca0: 00011497 auipc x9,0x11 +80007ca4: 88848493 addi x9,x9,-1912 # 80018528 +80007ca8: 00000013 addi x0,x0,0 +80007cac: 00000013 addi x0,x0,0 +80007cb0: 00000013 addi x0,x0,0 +80007cb4: 00000013 addi x0,x0,0 +80007cb8: 00000013 addi x0,x0,0 +80007cbc: 00000013 addi x0,x0,0 +80007cc0: 0084a023 sw x8,0(x9) +80007cc4: 00e4a423 sw x14,8(x9) +80007cc8: 34302473 csrrs x8,mtval,x0 +80007ccc: 0084a823 sw x8,16(x9) +80007cd0: 30002473 csrrs x8,mstatus,x0 +80007cd4: 0084ac23 sw x8,24(x9) +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00022417 auipc x8,0x22 +80007ce4: 91c40413 addi x8,x8,-1764 # 800295fc +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 007304b3 add x9,x6,x7 +80007d04: f0946663 bltu x8,x9,80007410 + +80007d08 : +80007d08: 24012403 lw x8,576(x2) +80007d0c: 408787b3 sub x15,x15,x8 +80007d10: 00179493 slli x9,x15,0x1 +80007d14: 009787b3 add x15,x15,x9 +80007d18: 0057d793 srli x15,x15,0x5 +80007d1c: 00679793 slli x15,x15,0x6 +80007d20: 0077e7b3 or x15,x15,x7 +80007d24: 00378793 addi x15,x15,3 +80007d28: 02075a63 bge x14,x0,80007d5c +80007d2c: 00f00413 addi x8,x0,15 +80007d30: 00877433 and x8,x14,x8 +80007d34: 304024f3 csrrs x9,mie,x0 +80007d38: 0084d4b3 srl x9,x9,x8 +80007d3c: 0014f493 andi x9,x9,1 +80007d40: 00b49493 slli x9,x9,0xb +80007d44: 0097e7b3 or x15,x15,x9 +80007d48: 344024f3 csrrs x9,mip,x0 +80007d4c: 0084d4b3 srl x9,x9,x8 +80007d50: 0014f493 andi x9,x9,1 +80007d54: 00c49493 slli x9,x9,0xc +80007d58: 0097e7b3 or x15,x15,x9 +80007d5c: 300023f3 csrrs x7,mstatus,x0 +80007d60: 00f39393 slli x7,x7,0xf +80007d64: 0023d393 srli x7,x7,0x2 +80007d68: 0021a437 lui x8,0x21a +80007d6c: fe540413 addi x8,x8,-27 # 219fe5 +80007d70: fff44413 xori x8,x8,-1 +80007d74: 0083f433 and x8,x7,x8 +80007d78: 0087e433 or x8,x15,x8 +80007d7c: 310024f3 csrrs x9,0x310,x0 +80007d80: 1c04f493 andi x9,x9,448 +80007d84: 00849493 slli x9,x9,0x8 +80007d88: 00946433 or x8,x8,x9 +80007d8c: 00032483 lw x9,0(x6) +80007d90: 00848e63 beq x9,x8,80007dac +80007d94: 00040313 addi x6,x8,0 +80007d98: 00048213 addi x4,x9,0 +80007d9c: 48c003ef jal x7,80008228 +80007da0: 80007d08 .word 0x80007d08 +80007da4: 80018c6c .word 0x80018c6c +80007da8: 00000341 .word 0x00000341 + +80007dac : +80007dac: 00070413 addi x8,x14,0 +80007db0: 00432483 lw x9,4(x6) +80007db4: 00848e63 beq x9,x8,80007dd0 +80007db8: 00040313 addi x6,x8,0 +80007dbc: 00048213 addi x4,x9,0 +80007dc0: 468003ef jal x7,80008228 +80007dc4: 80007dac .word 0x80007dac +80007dc8: 80018d6e .word 0x80018d6e +80007dcc: 00000341 .word 0x00000341 +80007dd0: 10074863 blt x14,x0,80007ee0 + +80007dd4 : +80007dd4: 34102473 csrrs x8,mepc,x0 +80007dd8: 00010493 addi x9,x2,0 +80007ddc: 0040006f jal x0,80007de0 + +80007de0 : +80007de0: 08000393 addi x7,x0,128 +80007de4: 04740863 beq x8,x7,80007e34 +80007de8: 00238393 addi x7,x7,2 +80007dec: 04740463 beq x8,x7,80007e34 +80007df0: 04040263 beq x8,x0,80007e34 +80007df4: 2084a383 lw x7,520(x9) +80007df8: 2104a783 lw x15,528(x9) +80007dfc: 007787b3 add x15,x15,x7 +80007e00: 00f47463 bgeu x8,x15,80007e08 +80007e04: 02747663 bgeu x8,x7,80007e30 + +80007e08 : +80007e08: 1d84a383 lw x7,472(x9) +80007e0c: 1e04a783 lw x15,480(x9) +80007e10: 007787b3 add x15,x15,x7 +80007e14: 00f47463 bgeu x8,x15,80007e1c +80007e18: 00747c63 bgeu x8,x7,80007e30 + +80007e1c : +80007e1c: 1e84a383 lw x7,488(x9) +80007e20: 1f04a783 lw x15,496(x9) +80007e24: 007787b3 add x15,x15,x7 +80007e28: e0f47e63 bgeu x8,x15,80007444 +80007e2c: e0746c63 bltu x8,x7,80007444 + +80007e30 : +80007e30: 40740433 sub x8,x8,x7 + +80007e34 : +80007e34: 00832483 lw x9,8(x6) +80007e38: 00848e63 beq x9,x8,80007e54 +80007e3c: 00040313 addi x6,x8,0 +80007e40: 00048213 addi x4,x9,0 +80007e44: 3e4003ef jal x7,80008228 +80007e48: 80007e34 .word 0x80007e34 +80007e4c: 80018e69 .word 0x80018e69 +80007e50: 00000341 .word 0x00000341 + +80007e54 : +80007e54: 34102473 csrrs x8,mepc,x0 +80007e58: 342023f3 csrrs x7,mcause,x0 +80007e5c: 00c00793 addi x15,x0,12 +80007e60: 00f38a63 beq x7,x15,80007e74 +80007e64: 00100793 addi x15,x0,1 +80007e68: 00f38663 beq x7,x15,80007e74 +80007e6c: 01400793 addi x15,x0,20 +80007e70: 00f39663 bne x7,x15,80007e7c +80007e74: 34109073 csrrw x0,mepc,x1 +80007e78: 0100006f jal x0,80007e88 + +80007e7c : +80007e7c: 00400393 addi x7,x0,4 +80007e80: 00740433 add x8,x8,x7 +80007e84: 34141073 csrrw x0,mepc,x8 + +80007e88 : +80007e88: 34302473 csrrs x8,mtval,x0 + +80007e8c : +80007e8c: 00c32483 lw x9,12(x6) +80007e90: 00848e63 beq x9,x8,80007eac +80007e94: 00040313 addi x6,x8,0 +80007e98: 00048213 addi x4,x9,0 +80007e9c: 38c003ef jal x7,80008228 +80007ea0: 80007e8c .word 0x80007e8c +80007ea4: 80018f5c .word 0x80018f5c +80007ea8: 00000341 .word 0x00000341 + +80007eac : +80007eac: 30102473 csrrs x8,misa,x0 +80007eb0: 01841413 slli x8,x8,0x18 +80007eb4: 00045263 bge x8,x0,80007eb8 + +80007eb8 : +80007eb8: 10000393 addi x7,x0,256 +80007ebc: 05c0006f jal x0,80007f18 + +80007ec0 : +80007ec0: 25c12303 lw x6,604(x2) +80007ec4: 26012383 lw x7,608(x2) +80007ec8: 26412403 lw x8,612(x2) +80007ecc: 26812483 lw x9,616(x2) +80007ed0: 26c12703 lw x14,620(x2) +80007ed4: 27012783 lw x15,624(x2) +80007ed8: 27412103 lw x2,628(x2) +80007edc: 30200073 mret + +80007ee0 : +80007ee0: 00100413 addi x8,x0,1 +80007ee4: 01f77393 andi x7,x14,31 +80007ee8: 00741433 sll x8,x8,x7 +80007eec: 304434f3 csrrc x9,mie,x8 +80007ef0: 34443473 csrrc x8,mip,x8 + +80007ef4 : +80007ef4: 00832483 lw x9,8(x6) +80007ef8: 00848e63 beq x9,x8,80007f14 +80007efc: 00040313 addi x6,x8,0 +80007f00: 00048213 addi x4,x9,0 +80007f04: 324003ef jal x7,80008228 +80007f08: 80007ef4 .word 0x80007ef4 +80007f0c: 800190cf .word 0x800190cf +80007f10: 00000341 .word 0x00000341 +80007f14: 00000393 addi x7,x0,0 + +80007f18 : +80007f18: 00000417 auipc x8,0x0 +80007f1c: 03c40413 addi x8,x8,60 # 80007f54 +80007f20: 00740433 add x8,x8,x7 +80007f24: 00371393 slli x7,x14,0x3 +80007f28: 00740433 add x8,x8,x7 +80007f2c: ff847413 andi x8,x8,-8 +80007f30: 00042403 lw x8,0(x8) + +80007f34 : +80007f34: 00040a63 beq x8,x0,80007f48 +80007f38: 01f41393 slli x7,x8,0x1f +80007f3c: 0003d863 bge x7,x0,80007f4c +80007f40: 00145413 srli x8,x8,0x1 +80007f44: f6870ee3 beq x14,x8,80007ec0 +80007f48: cfcff06f jal x0,80007444 + +80007f4c : +80007f4c: 00040067 jalr x0,0(x8) + +80007f50 : + ... +80007f58: 00000001 .word 0x00000001 +80007f5c: 00000000 .word 0x00000000 +80007f60: 00000001 .word 0x00000001 +80007f64: 00000000 .word 0x00000000 +80007f68: 8002a000 .word 0x8002a000 + ... +80007f78: 00000001 .word 0x00000001 +80007f7c: 00000000 .word 0x00000000 +80007f80: 00000001 .word 0x00000001 +80007f84: 00000000 .word 0x00000000 +80007f88: 8002a014 .word 0x8002a014 + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a030 .word 0x8002a030 +80007fac: 00000000 .word 0x00000000 +80007fb0: 00000001 .word 0x00000001 +80007fb4: 00000000 .word 0x00000000 +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 00000001 .word 0x00000001 +80007fcc: 00000000 .word 0x00000000 +80007fd0: 00000001 .word 0x00000001 +80007fd4: 00000000 .word 0x00000000 +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 00000001 .word 0x00000001 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 + ... + +80008050 : +80008050: 00000001 .word 0x00000001 +80008054: 00000000 .word 0x00000000 +80008058: 00000003 .word 0x00000003 +8000805c: 00000000 .word 0x00000000 +80008060: 00000005 .word 0x00000005 +80008064: 00000000 .word 0x00000000 +80008068: 00000007 .word 0x00000007 +8000806c: 00000000 .word 0x00000000 +80008070: 00000009 .word 0x00000009 +80008074: 00000000 .word 0x00000000 +80008078: 0000000b .word 0x0000000b +8000807c: 00000000 .word 0x00000000 +80008080: 0000000d .word 0x0000000d +80008084: 00000000 .word 0x00000000 +80008088: 0000000f .word 0x0000000f +8000808c: 00000000 .word 0x00000000 +80008090: 00000011 .word 0x00000011 +80008094: 00000000 .word 0x00000000 +80008098: 00000013 .word 0x00000013 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000015 .word 0x00000015 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000017 .word 0x00000017 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000019 .word 0x00000019 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000001b .word 0x0000001b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000001d .word 0x0000001d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000001f .word 0x0000001f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000021 .word 0x00000021 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000023 .word 0x00000023 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000025 .word 0x00000025 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000027 .word 0x00000027 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000029 .word 0x00000029 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000002b .word 0x0000002b +800080fc: 00000000 .word 0x00000000 +80008100: 0000002d .word 0x0000002d +80008104: 00000000 .word 0x00000000 +80008108: 0000002f .word 0x0000002f + ... + +80008150 : +80008150: 300023f3 csrrs x7,mstatus,x0 +80008154: 00b3d493 srli x9,x7,0xb +80008158: 0034f493 andi x9,x9,3 +8000815c: ffd48413 addi x8,x9,-3 +80008160: 341023f3 csrrs x7,mepc,x0 +80008164: 00000493 addi x9,x0,0 +80008168: 02040c63 beq x8,x0,800081a0 +8000816c: 29810113 addi x2,x2,664 +80008170: 310023f3 csrrs x7,0x310,x0 +80008174: 01839393 slli x7,x7,0x18 +80008178: 0003da63 bge x7,x0,8000818c + +8000817c : +8000817c: 29810113 addi x2,x2,664 +80008180: 47012783 lw x15,1136(x2) +80008184: d6810113 addi x2,x2,-664 +80008188: 0080006f jal x0,80008190 + +8000818c : +8000818c: f4012783 lw x15,-192(x2) +80008190: 341023f3 csrrs x7,mepc,x0 +80008194: 40f383b3 sub x7,x7,x15 +80008198: d6810113 addi x2,x2,-664 +8000819c: 1d812483 lw x9,472(x2) + +800081a0 : +800081a0: 007483b3 add x7,x9,x7 +800081a4: 25c12303 lw x6,604(x2) +800081a8: 26412403 lw x8,612(x2) +800081ac: 26812483 lw x9,616(x2) +800081b0: 26c12703 lw x14,620(x2) +800081b4: 27012783 lw x15,624(x2) +800081b8: 27412103 lw x2,628(x2) +800081bc: 00438067 jalr x0,4(x7) + +800081c0 : +800081c0: 00010217 auipc x4,0x10 +800081c4: 22020213 addi x4,x4,544 # 800183e0 +800081c8: 02522423 sw x5,40(x4) # 28 +800081cc: 00122423 sw x1,8(x4) # 8 +800081d0: 00022023 sw x0,0(x4) # 0 +800081d4: 0880006f jal x0,8000825c + +800081d8 : +800081d8: 00010397 auipc x7,0x10 +800081dc: 20838393 addi x7,x7,520 # 800183e0 +800081e0: 0483a023 sw x8,64(x7) +800081e4: 0243a023 sw x4,32(x7) +800081e8: 0253a423 sw x5,40(x7) +800081ec: 0013a423 sw x1,8(x7) +800081f0: 0003a023 sw x0,0(x7) +800081f4: 00038213 addi x4,x7,0 +800081f8: 00040293 addi x5,x8,0 +800081fc: 0600006f jal x0,8000825c + +80008200 : +80008200: 00010697 auipc x13,0x10 +80008204: 1e068693 addi x13,x13,480 # 800183e0 +80008208: 06e6a823 sw x14,112(x13) +8000820c: 0246a023 sw x4,32(x13) +80008210: 0256a423 sw x5,40(x13) +80008214: 0016a423 sw x1,8(x13) +80008218: 0006a023 sw x0,0(x13) +8000821c: 00068213 addi x4,x13,0 +80008220: 00070293 addi x5,x14,0 +80008224: 0380006f jal x0,8000825c + +80008228 : +80008228: 00010497 auipc x9,0x10 +8000822c: 1b848493 addi x9,x9,440 # 800183e0 +80008230: 0674a423 sw x7,104(x9) +80008234: 0244a023 sw x4,32(x9) +80008238: 0254a423 sw x5,40(x9) +8000823c: 0014a423 sw x1,8(x9) +80008240: 00300093 addi x1,x0,3 +80008244: 0014a023 sw x1,0(x9) +80008248: 1064a823 sw x6,272(x9) +8000824c: 1044ac23 sw x4,280(x9) +80008250: 00048213 addi x4,x9,0 +80008254: 00038293 addi x5,x7,0 +80008258: 0040006f jal x0,8000825c + +8000825c : +8000825c: 00222823 sw x2,16(x4) # 10 +80008260: 00322c23 sw x3,24(x4) # 18 +80008264: 02622823 sw x6,48(x4) # 30 +80008268: 02722c23 sw x7,56(x4) # 38 +8000826c: 04822023 sw x8,64(x4) # 40 +80008270: 04922423 sw x9,72(x4) # 48 +80008274: 04a22823 sw x10,80(x4) # 50 +80008278: 04b22c23 sw x11,88(x4) # 58 +8000827c: 06c22023 sw x12,96(x4) # 60 +80008280: 06d22423 sw x13,104(x4) # 68 +80008284: 06e22823 sw x14,112(x4) # 70 +80008288: 06f22c23 sw x15,120(x4) # 78 +8000828c: 09022023 sw x16,128(x4) # 80 +80008290: 09122423 sw x17,136(x4) # 88 +80008294: 09222823 sw x18,144(x4) # 90 +80008298: 09322c23 sw x19,152(x4) # 98 +8000829c: 0b422023 sw x20,160(x4) # a0 +800082a0: 0b522423 sw x21,168(x4) # a8 +800082a4: 0b622823 sw x22,176(x4) # b0 +800082a8: 0b722c23 sw x23,184(x4) # b8 +800082ac: 0d822023 sw x24,192(x4) # c0 +800082b0: 0d922423 sw x25,200(x4) # c8 +800082b4: 0da22823 sw x26,208(x4) # d0 +800082b8: 0db22c23 sw x27,216(x4) # d8 +800082bc: 0fc22023 sw x28,224(x4) # e0 +800082c0: 0fd22423 sw x29,232(x4) # e8 +800082c4: 0fe22823 sw x30,240(x4) # f0 +800082c8: 0ff22c23 sw x31,248(x4) # f8 + +800082cc : +800082cc: 00010497 auipc x9,0x10 +800082d0: 1144a483 lw x9,276(x9) # 800183e0 +800082d4: 00300513 addi x10,x0,3 +800082d8: 18a48a63 beq x9,x10,8000846c + +800082dc : +800082dc: ffa2d303 lhu x6,-6(x5) +800082e0: ff82d383 lhu x7,-8(x5) +800082e4: 01031313 slli x6,x6,0x10 +800082e8: 00736333 or x6,x6,x7 +800082ec: 00f35393 srli x7,x6,0xf +800082f0: 01f3f393 andi x7,x7,31 +800082f4: 01435413 srli x8,x6,0x14 +800082f8: 01f47413 andi x8,x8,31 +800082fc: 10822223 sw x8,260(x4) # 104 +80008300: 00341313 slli x6,x8,0x3 +80008304: 00620333 add x6,x4,x6 +80008308: 00032303 lw x6,0(x6) +8000830c: 10622823 sw x6,272(x4) # 110 +80008310: ff62d303 lhu x6,-10(x5) +80008314: ff42d383 lhu x7,-12(x5) +80008318: 01031313 slli x6,x6,0x10 +8000831c: 00736333 or x6,x6,x7 +80008320: 00030513 addi x10,x6,0 +80008324: 07f37413 andi x8,x6,127 +80008328: 00300493 addi x9,x0,3 +8000832c: 0c941463 bne x8,x9,800083f4 +80008330: 00c35413 srli x8,x6,0xc +80008334: 00747413 andi x8,x8,7 +80008338: 00200493 addi x9,x0,2 +8000833c: 0a941c63 bne x8,x9,800083f4 +80008340: 41435393 srai x7,x6,0x14 +80008344: 00f35313 srli x6,x6,0xf +80008348: 01f37313 andi x6,x6,31 +8000834c: 00331313 slli x6,x6,0x3 +80008350: 00620333 add x6,x4,x6 +80008354: 00032303 lw x6,0(x6) +80008358: 00730333 add x6,x6,x7 +8000835c: 00337413 andi x8,x6,3 +80008360: 0c041663 bne x8,x0,8000842c +80008364: 00000013 addi x0,x0,0 +80008368: 00000013 addi x0,x0,0 +8000836c: 00000013 addi x0,x0,0 +80008370: 00000013 addi x0,x0,0 +80008374: 00000013 addi x0,x0,0 +80008378: 00000013 addi x0,x0,0 +8000837c: 00000013 addi x0,x0,0 +80008380: 00012417 auipc x8,0x12 +80008384: db040413 addi x8,x8,-592 # 8001a130 +80008388: 00000013 addi x0,x0,0 +8000838c: 00000013 addi x0,x0,0 +80008390: 00000013 addi x0,x0,0 +80008394: 00000013 addi x0,x0,0 +80008398: 00000013 addi x0,x0,0 +8000839c: 00000013 addi x0,x0,0 +800083a0: 08836663 bltu x6,x8,8000842c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00021417 auipc x8,0x21 +800083c4: 24040413 addi x8,x8,576 # 80029600 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: ffc40413 addi x8,x8,-4 +800083e4: 04646463 bltu x8,x6,8000842c +800083e8: 00032303 lw x6,0(x6) +800083ec: 10622c23 sw x6,280(x4) # 118 +800083f0: 3700006f jal x0,80008760 + +800083f4 : +800083f4: 00100413 addi x8,x0,1 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00010497 auipc x9,0x10 +80008404: 10848493 addi x9,x9,264 # 80018508 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: 0084a023 sw x8,0(x9) +80008424: 10a22c23 sw x10,280(x4) # 118 +80008428: 3380006f jal x0,80008760 + +8000842c : +8000842c: 00200413 addi x8,x0,2 +80008430: 00000013 addi x0,x0,0 +80008434: 00000013 addi x0,x0,0 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: 0c848493 addi x9,x9,200 # 80018508 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10622c23 sw x6,280(x4) # 118 +80008468: 2f80006f jal x0,80008760 + +8000846c : +8000846c: 0042a303 lw x6,4(x5) +80008470: 00010817 auipc x16,0x10 +80008474: 0a880813 addi x16,x16,168 # 80018518 +80008478: 00682023 sw x6,0(x16) +8000847c: 0002a303 lw x6,0(x5) +80008480: 10622423 sw x6,264(x4) # 108 +80008484: 00010817 auipc x16,0x10 +80008488: 09480813 addi x16,x16,148 # 80018518 +8000848c: 00082303 lw x6,0(x16) +80008490: 00010397 auipc x7,0x10 +80008494: 7c538393 addi x7,x7,1989 # 80018c55 +80008498: 28730463 beq x6,x7,80008720 +8000849c: 00000413 addi x8,x0,0 +800084a0: 00010817 auipc x16,0x10 +800084a4: 07080813 addi x16,x16,112 # 80018510 +800084a8: 00882023 sw x8,0(x16) +800084ac: 00010397 auipc x7,0x10 +800084b0: 7c038393 addi x7,x7,1984 # 80018c6c +800084b4: 00731863 bne x6,x7,800084c4 +800084b8: 00100413 addi x8,x0,1 +800084bc: 00000493 addi x9,x0,0 +800084c0: 2740006f jal x0,80008734 +800084c4: 00011397 auipc x7,0x11 +800084c8: 8aa38393 addi x7,x7,-1878 # 80018d6e +800084cc: 00731863 bne x6,x7,800084dc +800084d0: 00200413 addi x8,x0,2 +800084d4: 00000493 addi x9,x0,0 +800084d8: 25c0006f jal x0,80008734 +800084dc: 00011397 auipc x7,0x11 +800084e0: 98d38393 addi x7,x7,-1651 # 80018e69 +800084e4: 00731863 bne x6,x7,800084f4 +800084e8: 00300413 addi x8,x0,3 +800084ec: 00000493 addi x9,x0,0 +800084f0: 2440006f jal x0,80008734 +800084f4: 00011397 auipc x7,0x11 +800084f8: a6838393 addi x7,x7,-1432 # 80018f5c +800084fc: 00731863 bne x6,x7,8000850c +80008500: 00400413 addi x8,x0,4 +80008504: 00000493 addi x9,x0,0 +80008508: 22c0006f jal x0,80008734 +8000850c: 00011397 auipc x7,0x11 +80008510: bc338393 addi x7,x7,-1085 # 800190cf +80008514: 00731863 bne x6,x7,80008524 +80008518: 00500413 addi x8,x0,5 +8000851c: 00000493 addi x9,x0,0 +80008520: 2140006f jal x0,80008734 +80008524: 00011397 auipc x7,0x11 +80008528: b2f38393 addi x7,x7,-1233 # 80019053 +8000852c: 00731863 bne x6,x7,8000853c +80008530: 00600413 addi x8,x0,6 +80008534: 00000493 addi x9,x0,0 +80008538: 1fc0006f jal x0,80008734 +8000853c: 00011397 auipc x7,0x11 +80008540: b5538393 addi x7,x7,-1195 # 80019091 +80008544: 00731863 bne x6,x7,80008554 +80008548: 00700413 addi x8,x0,7 +8000854c: 00000493 addi x9,x0,0 +80008550: 1e40006f jal x0,80008734 +80008554: 00010397 auipc x7,0x10 +80008558: 75838393 addi x7,x7,1880 # 80018cac +8000855c: 00731863 bne x6,x7,8000856c +80008560: 00100413 addi x8,x0,1 +80008564: 00100493 addi x9,x0,1 +80008568: 1cc0006f jal x0,80008734 +8000856c: 00011397 auipc x7,0x11 +80008570: 84038393 addi x7,x7,-1984 # 80018dac +80008574: 00731863 bne x6,x7,80008584 +80008578: 00200413 addi x8,x0,2 +8000857c: 00100493 addi x9,x0,1 +80008580: 1b40006f jal x0,80008734 +80008584: 00011397 auipc x7,0x11 +80008588: 92138393 addi x7,x7,-1759 # 80018ea5 +8000858c: 00731863 bne x6,x7,8000859c +80008590: 00300413 addi x8,x0,3 +80008594: 00100493 addi x9,x0,1 +80008598: 19c0006f jal x0,80008734 +8000859c: 00011397 auipc x7,0x11 +800085a0: 9fd38393 addi x7,x7,-1539 # 80018f99 +800085a4: 00731863 bne x6,x7,800085b4 +800085a8: 00400413 addi x8,x0,4 +800085ac: 00100493 addi x9,x0,1 +800085b0: 1840006f jal x0,80008734 +800085b4: 00011397 auipc x7,0x11 +800085b8: b5638393 addi x7,x7,-1194 # 8001910a +800085bc: 00731863 bne x6,x7,800085cc +800085c0: 00500413 addi x8,x0,5 +800085c4: 00100493 addi x9,x0,1 +800085c8: 16c0006f jal x0,80008734 +800085cc: 00010397 auipc x7,0x10 +800085d0: 72038393 addi x7,x7,1824 # 80018cec +800085d4: 00731863 bne x6,x7,800085e4 +800085d8: 00100413 addi x8,x0,1 +800085dc: 00200493 addi x9,x0,2 +800085e0: 1540006f jal x0,80008734 +800085e4: 00011397 auipc x7,0x11 +800085e8: 80638393 addi x7,x7,-2042 # 80018dea +800085ec: 00731863 bne x6,x7,800085fc +800085f0: 00200413 addi x8,x0,2 +800085f4: 00200493 addi x9,x0,2 +800085f8: 13c0006f jal x0,80008734 +800085fc: 00011397 auipc x7,0x11 +80008600: 8e538393 addi x7,x7,-1819 # 80018ee1 +80008604: 00731863 bne x6,x7,80008614 +80008608: 00300413 addi x8,x0,3 +8000860c: 00200493 addi x9,x0,2 +80008610: 1240006f jal x0,80008734 +80008614: 00011397 auipc x7,0x11 +80008618: 9c238393 addi x7,x7,-1598 # 80018fd6 +8000861c: 00731863 bne x6,x7,8000862c +80008620: 00400413 addi x8,x0,4 +80008624: 00200493 addi x9,x0,2 +80008628: 10c0006f jal x0,80008734 +8000862c: 00011397 auipc x7,0x11 +80008630: b1938393 addi x7,x7,-1255 # 80019145 +80008634: 00731863 bne x6,x7,80008644 +80008638: 00500413 addi x8,x0,5 +8000863c: 00200493 addi x9,x0,2 +80008640: 0f40006f jal x0,80008734 +80008644: 00010397 auipc x7,0x10 +80008648: 6e938393 addi x7,x7,1769 # 80018d2d +8000864c: 00731863 bne x6,x7,8000865c +80008650: 00100413 addi x8,x0,1 +80008654: 00300493 addi x9,x0,3 +80008658: 0dc0006f jal x0,80008734 +8000865c: 00010397 auipc x7,0x10 +80008660: 7cd38393 addi x7,x7,1997 # 80018e29 +80008664: 00731863 bne x6,x7,80008674 +80008668: 00200413 addi x8,x0,2 +8000866c: 00300493 addi x9,x0,3 +80008670: 0c40006f jal x0,80008734 +80008674: 00011397 auipc x7,0x11 +80008678: 8aa38393 addi x7,x7,-1878 # 80018f1e +8000867c: 00731863 bne x6,x7,8000868c +80008680: 00300413 addi x8,x0,3 +80008684: 00300493 addi x9,x0,3 +80008688: 0ac0006f jal x0,80008734 +8000868c: 00011397 auipc x7,0x11 +80008690: 98838393 addi x7,x7,-1656 # 80019014 +80008694: 00731863 bne x6,x7,800086a4 +80008698: 00400413 addi x8,x0,4 +8000869c: 00300493 addi x9,x0,3 +800086a0: 0940006f jal x0,80008734 +800086a4: 00011397 auipc x7,0x11 +800086a8: add38393 addi x7,x7,-1315 # 80019181 +800086ac: 00731863 bne x6,x7,800086bc +800086b0: 00500413 addi x8,x0,5 +800086b4: 00300493 addi x9,x0,3 +800086b8: 07c0006f jal x0,80008734 +800086bc: 00011397 auipc x7,0x11 +800086c0: b0238393 addi x7,x7,-1278 # 800191be +800086c4: 00731863 bne x6,x7,800086d4 +800086c8: 00800413 addi x8,x0,8 +800086cc: 00000493 addi x9,x0,0 +800086d0: 0640006f jal x0,80008734 +800086d4: 00011397 auipc x7,0x11 +800086d8: b3938393 addi x7,x7,-1223 # 8001920d +800086dc: 00731863 bne x6,x7,800086ec +800086e0: 00800413 addi x8,x0,8 +800086e4: 00000493 addi x9,x0,0 +800086e8: 04c0006f jal x0,80008734 +800086ec: 00011397 auipc x7,0x11 +800086f0: c1c38393 addi x7,x7,-996 # 80019308 +800086f4: 00731863 bne x6,x7,80008704 +800086f8: 00800413 addi x8,x0,8 +800086fc: 00100493 addi x9,x0,1 +80008700: 0340006f jal x0,80008734 +80008704: 00011397 auipc x7,0x11 +80008708: d0038393 addi x7,x7,-768 # 80019404 +8000870c: 00731863 bne x6,x7,8000871c +80008710: 00800413 addi x8,x0,8 +80008714: 00200493 addi x9,x0,2 +80008718: 01c0006f jal x0,80008734 +8000871c: 0340006f jal x0,80008750 + +80008720 : +80008720: 00900413 addi x8,x0,9 +80008724: 00010817 auipc x16,0x10 +80008728: dec80813 addi x16,x16,-532 # 80018510 +8000872c: 00882023 sw x8,0(x16) +80008730: 0300006f jal x0,80008760 + +80008734 : +80008734: 00010817 auipc x16,0x10 +80008738: ddc80813 addi x16,x16,-548 # 80018510 +8000873c: 00882023 sw x8,0(x16) +80008740: 00010817 auipc x16,0x10 +80008744: dd480813 addi x16,x16,-556 # 80018514 +80008748: 00982023 sw x9,0(x16) +8000874c: 0140006f jal x0,80008760 + +80008750 : +80008750: 00010817 auipc x16,0x10 +80008754: dc080813 addi x16,x16,-576 # 80018510 +80008758: 00082023 sw x0,0(x16) +8000875c: 0040006f jal x0,80008760 + +80008760 : +80008760: 0002a303 lw x6,0(x5) +80008764: 10622423 sw x6,264(x4) # 108 +80008768: 00035383 lhu x7,0(x6) +8000876c: 0033f413 andi x8,x7,3 +80008770: 00300493 addi x9,x0,3 +80008774: 00941863 bne x8,x9,80008784 +80008778: 00235403 lhu x8,2(x6) +8000877c: 01041413 slli x8,x8,0x10 +80008780: 0083e3b3 or x7,x7,x8 +80008784: 10722023 sw x7,256(x4) # 100 +80008788: 0042a303 lw x6,4(x5) +8000878c: 12622023 sw x6,288(x4) # 120 + +80008790 : +80008790: 00000013 addi x0,x0,0 +80008794: 00000013 addi x0,x0,0 +80008798: 00000013 addi x0,x0,0 +8000879c: 00000013 addi x0,x0,0 +800087a0: 00010517 auipc x10,0x10 +800087a4: 2c350513 addi x10,x10,707 # 80018a63 +800087a8: 00000013 addi x0,x0,0 +800087ac: 00000013 addi x0,x0,0 +800087b0: 00000013 addi x0,x0,0 +800087b4: 00000013 addi x0,x0,0 +800087b8: 00000013 addi x0,x0,0 +800087bc: 00000013 addi x0,x0,0 +800087c0: 00022097 auipc x1,0x22 +800087c4: da4080e7 jalr x1,-604(x1) # 8002a564 +800087c8: 00000013 addi x0,x0,0 +800087cc: 00000013 addi x0,x0,0 +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: 2c150513 addi x10,x10,705 # 80018aa1 +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 + +80008808 : +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: 33850513 addi x10,x10,824 # 80018b58 +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 00010517 auipc x10,0x10 +8000884c: cb852503 lw x10,-840(x10) # 80018500 +80008850: 00022097 auipc x1,0x22 +80008854: d14080e7 jalr x1,-748(x1) # 8002a564 + +80008858 : +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: 30a50513 addi x10,x10,778 # 80018b6a +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80008888: 00010517 auipc x10,0x10 +8000888c: b5852503 lw x10,-1192(x10) # 800183e0 +80008890: 00300593 addi x11,x0,3 +80008894: 52b50c63 beq x10,x11,80008dcc +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: 2cc50513 addi x10,x10,716 # 80018b6c +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 00010517 auipc x10,0x10 +800088cc: c1852503 lw x10,-1000(x10) # 800184e0 +800088d0: 02000593 addi x11,x0,32 +800088d4: 00357613 andi x12,x10,3 +800088d8: 00300693 addi x13,x0,3 +800088dc: 00d60463 beq x12,x13,800088e4 +800088e0: 01000593 addi x11,x0,16 +800088e4: 3f4010ef jal x1,80009cd8 +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 00010517 auipc x10,0x10 +80008904: c4850513 addi x10,x10,-952 # 80018548 +80008908: 00000013 addi x0,x0,0 +8000890c: 00000013 addi x0,x0,0 +80008910: 00000013 addi x0,x0,0 +80008914: 00000013 addi x0,x0,0 +80008918: 00000013 addi x0,x0,0 +8000891c: 00000013 addi x0,x0,0 +80008920: 00022097 auipc x1,0x22 +80008924: c44080e7 jalr x1,-956(x1) # 8002a564 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: 24050513 addi x10,x10,576 # 80018b80 +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 00010517 auipc x10,0x10 +8000896c: b8052503 lw x10,-1152(x10) # 800184e8 +80008970: 02000593 addi x11,x0,32 +80008974: 364010ef jal x1,80009cd8 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 00010517 auipc x10,0x10 +80008984: bc850513 addi x10,x10,-1080 # 80018548 +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00000013 addi x0,x0,0 +800089ac: 00000013 addi x0,x0,0 +800089b0: 00000013 addi x0,x0,0 +800089b4: 00000013 addi x0,x0,0 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00011517 auipc x10,0x11 +800089c4: bf750513 addi x10,x10,-1033 # 800195b7 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 00010517 auipc x10,0x10 +800089ec: 9f852503 lw x10,-1544(x10) # 800183e0 +800089f0: 00050663 beq x10,x0,800089fc +800089f4: 00300593 addi x11,x0,3 +800089f8: 04b51063 bne x10,x11,80008a38 +800089fc: 07800593 addi x11,x0,120 +80008a00: 00010617 auipc x12,0x10 +80008a04: b4860613 addi x12,x12,-1208 # 80018548 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00b60023 sb x11,0(x12) +80008a24: 00160613 addi x12,x12,1 +80008a28: 00010517 auipc x10,0x10 +80008a2c: abc52503 lw x10,-1348(x10) # 800184e4 +80008a30: 324010ef jal x1,80009d54 +80008a34: 1180006f jal x0,80008b4c + +80008a38 : +80008a38: 00100593 addi x11,x0,1 +80008a3c: 04b50863 beq x10,x11,80008a8c +80008a40: 00400593 addi x11,x0,4 +80008a44: 08b50a63 beq x10,x11,80008ad8 +80008a48: 00500593 addi x11,x0,5 +80008a4c: 0cb50463 beq x10,x11,80008b14 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00011517 auipc x10,0x11 +80008a64: c6d50513 addi x10,x10,-915 # 800196cd +80008a68: 00000013 addi x0,x0,0 +80008a6c: 00000013 addi x0,x0,0 +80008a70: 00000013 addi x0,x0,0 +80008a74: 00000013 addi x0,x0,0 +80008a78: 00000013 addi x0,x0,0 +80008a7c: 00000013 addi x0,x0,0 +80008a80: 00022097 auipc x1,0x22 +80008a84: ae4080e7 jalr x1,-1308(x1) # 8002a564 +80008a88: 1000006f jal x0,80008b88 + +80008a8c : +80008a8c: 06600593 addi x11,x0,102 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 00010617 auipc x12,0x10 +80008aa4: aa860613 addi x12,x12,-1368 # 80018548 +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00b60023 sb x11,0(x12) +80008ac4: 00160613 addi x12,x12,1 +80008ac8: 00010517 auipc x10,0x10 +80008acc: a1c52503 lw x10,-1508(x10) # 800184e4 +80008ad0: 284010ef jal x1,80009d54 +80008ad4: 0780006f jal x0,80008b4c + +80008ad8 : +80008ad8: 07600593 addi x11,x0,118 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 00010617 auipc x12,0x10 +80008ae4: a6860613 addi x12,x12,-1432 # 80018548 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 00010517 auipc x10,0x10 +80008b0c: 9dc52503 lw x10,-1572(x10) # 800184e4 +80008b10: 244010ef jal x1,80009d54 + +80008b14 : +80008b14: 00000013 addi x0,x0,0 +80008b18: 00000013 addi x0,x0,0 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 00011517 auipc x10,0x11 +80008b24: a9050513 addi x10,x10,-1392 # 800195b0 +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00022097 auipc x1,0x22 +80008b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80008b48: 0400006f jal x0,80008b88 + +80008b4c : +80008b4c: 00000013 addi x0,x0,0 +80008b50: 00000013 addi x0,x0,0 +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 00010517 auipc x10,0x10 +80008b64: 9e850513 addi x10,x10,-1560 # 80018548 +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 + +80008b88 : +80008b88: 00000013 addi x0,x0,0 +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 00011517 auipc x10,0x11 +80008ba4: a2850513 addi x10,x10,-1496 # 800195c8 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80008bc8: 00010517 auipc x10,0x10 +80008bcc: 81852503 lw x10,-2024(x10) # 800183e0 +80008bd0: 00100593 addi x11,x0,1 +80008bd4: 00b51c63 bne x10,x11,80008bec +80008bd8: 00010517 auipc x10,0x10 +80008bdc: 91852503 lw x10,-1768(x10) # 800184f0 +80008be0: 02000593 addi x11,x0,32 +80008be4: 0f4010ef jal x1,80009cd8 +80008be8: 0140006f jal x0,80008bfc + +80008bec : +80008bec: 00010517 auipc x10,0x10 +80008bf0: 90452503 lw x10,-1788(x10) # 800184f0 +80008bf4: 02000593 addi x11,x0,32 +80008bf8: 0e0010ef jal x1,80009cd8 + +80008bfc : +80008bfc: 00000013 addi x0,x0,0 +80008c00: 00010517 auipc x10,0x10 +80008c04: 94850513 addi x10,x10,-1720 # 80018548 +80008c08: 00000013 addi x0,x0,0 +80008c0c: 00000013 addi x0,x0,0 +80008c10: 00000013 addi x0,x0,0 +80008c14: 00000013 addi x0,x0,0 +80008c18: 00000013 addi x0,x0,0 +80008c1c: 00000013 addi x0,x0,0 +80008c20: 00022097 auipc x1,0x22 +80008c24: 944080e7 jalr x1,-1724(x1) # 8002a564 +80008c28: 00010517 auipc x10,0x10 +80008c2c: 8e052503 lw x10,-1824(x10) # 80018508 +80008c30: 08051e63 bne x10,x0,80008ccc +80008c34: 00000013 addi x0,x0,0 +80008c38: 00000013 addi x0,x0,0 +80008c3c: 00000013 addi x0,x0,0 +80008c40: 00011517 auipc x10,0x11 +80008c44: 99f50513 addi x10,x10,-1633 # 800195df +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: 77852503 lw x10,1912(x10) # 800183e0 +80008c70: 00100593 addi x11,x0,1 +80008c74: 00b51c63 bne x10,x11,80008c8c +80008c78: 00010517 auipc x10,0x10 +80008c7c: 88052503 lw x10,-1920(x10) # 800184f8 +80008c80: 02000593 addi x11,x0,32 +80008c84: 054010ef jal x1,80009cd8 +80008c88: 0140006f jal x0,80008c9c + +80008c8c : +80008c8c: 00010517 auipc x10,0x10 +80008c90: 86c52503 lw x10,-1940(x10) # 800184f8 +80008c94: 02000593 addi x11,x0,32 +80008c98: 040010ef jal x1,80009cd8 + +80008c9c : +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 00010517 auipc x10,0x10 +80008ca4: 8a850513 addi x10,x10,-1880 # 80018548 +80008ca8: 00000013 addi x0,x0,0 +80008cac: 00000013 addi x0,x0,0 +80008cb0: 00000013 addi x0,x0,0 +80008cb4: 00000013 addi x0,x0,0 +80008cb8: 00000013 addi x0,x0,0 +80008cbc: 00000013 addi x0,x0,0 +80008cc0: 00022097 auipc x1,0x22 +80008cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80008cc8: 5bd0006f jal x0,80009a84 + +80008ccc : +80008ccc: 00100593 addi x11,x0,1 +80008cd0: 06b51e63 bne x10,x11,80008d4c + +80008cd4 : +80008cd4: 00000013 addi x0,x0,0 +80008cd8: 00000013 addi x0,x0,0 +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 00011517 auipc x10,0x11 +80008ce4: 91650513 addi x10,x10,-1770 # 800195f6 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 0000f517 auipc x10,0xf +80008d0c: 7f052503 lw x10,2032(x10) # 800184f8 +80008d10: 02000593 addi x11,x0,32 +80008d14: 7c5000ef jal x1,80009cd8 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 00010517 auipc x10,0x10 +80008d24: 82850513 addi x10,x10,-2008 # 80018548 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 53d0006f jal x0,80009a84 + +80008d4c : +80008d4c: 00000013 addi x0,x0,0 +80008d50: 00000013 addi x0,x0,0 +80008d54: 00000013 addi x0,x0,0 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 00011517 auipc x10,0x11 +80008d64: 8f450513 addi x10,x10,-1804 # 80019654 +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 0000f517 auipc x10,0xf +80008d8c: 77052503 lw x10,1904(x10) # 800184f8 +80008d90: 02000593 addi x11,x0,32 +80008d94: 745000ef jal x1,80009cd8 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 0000f517 auipc x10,0xf +80008da4: 7a850513 addi x10,x10,1960 # 80018548 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 4bd0006f jal x0,80009a84 + +80008dcc : +80008dcc: 0000f417 auipc x8,0xf +80008dd0: 74442403 lw x8,1860(x8) # 80018510 +80008dd4: 00900493 addi x9,x0,9 +80008dd8: 0a940c63 beq x8,x9,80008e90 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 00011517 auipc x10,0x11 +80008de4: 91950513 addi x10,x10,-1767 # 800196f9 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 00000013 addi x0,x0,0 +80008e0c: 00000013 addi x0,x0,0 +80008e10: 00000013 addi x0,x0,0 +80008e14: 00000013 addi x0,x0,0 +80008e18: 00000013 addi x0,x0,0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00011517 auipc x10,0x11 +80008e24: 90550513 addi x10,x10,-1787 # 80019725 +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 0000f817 auipc x16,0xf +80008e4c: 6d080813 addi x16,x16,1744 # 80018518 +80008e50: 00082503 lw x10,0(x16) +80008e54: 00021097 auipc x1,0x21 +80008e58: 710080e7 jalr x1,1808(x1) # 8002a564 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 00010517 auipc x10,0x10 +80008e64: d0a50513 addi x10,x10,-758 # 80018b6a +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 280404e3 beq x8,x0,80009910 +80008e8c: 3400006f jal x0,800091cc + +80008e90 : +80008e90: 00000013 addi x0,x0,0 +80008e94: 00000013 addi x0,x0,0 +80008e98: 00000013 addi x0,x0,0 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00011517 auipc x10,0x11 +80008ea4: 89550513 addi x10,x10,-1899 # 80019735 +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 0000f517 auipc x10,0xf +80008ecc: 63052503 lw x10,1584(x10) # 800184f8 +80008ed0: 02000593 addi x11,x0,32 +80008ed4: 605000ef jal x1,80009cd8 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 0000f517 auipc x10,0xf +80008ee4: 66850513 addi x10,x10,1640 # 80018548 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 00000013 addi x0,x0,0 +80008f0c: 00000013 addi x0,x0,0 +80008f10: 00000013 addi x0,x0,0 +80008f14: 00000013 addi x0,x0,0 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 00011517 auipc x10,0x11 +80008f24: 84050513 addi x10,x10,-1984 # 80019760 +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 0000f517 auipc x10,0xf +80008f4c: 5a852503 lw x10,1448(x10) # 800184f0 +80008f50: 02000593 addi x11,x0,32 +80008f54: 585000ef jal x1,80009cd8 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 0000f517 auipc x10,0xf +80008f64: 5e850513 addi x10,x10,1512 # 80018548 +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f317 auipc x6,0xf +80008f8c: 56832303 lw x6,1384(x6) # 800184f0 +80008f90: 0000f397 auipc x7,0xf +80008f94: 5683a383 lw x7,1384(x7) # 800184f8 +80008f98: 10736a63 bltu x6,x7,800090ac + +80008f9c : +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 00010517 auipc x10,0x10 +80008fa4: 7ef50513 addi x10,x10,2031 # 8001978f +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 00000013 addi x0,x0,0 +80008fcc: 00000013 addi x0,x0,0 +80008fd0: 00000013 addi x0,x0,0 +80008fd4: 00000013 addi x0,x0,0 +80008fd8: 00000013 addi x0,x0,0 +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00011517 auipc x10,0x11 +80008fe4: 81750513 addi x10,x10,-2025 # 800197f7 +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 0000f317 auipc x6,0xf +8000900c: 4e832303 lw x6,1256(x6) # 800184f0 +80009010: 0000f397 auipc x7,0xf +80009014: 4e83a383 lw x7,1256(x7) # 800184f8 +80009018: 40730533 sub x10,x6,x7 +8000901c: 02000593 addi x11,x0,32 +80009020: 4b9000ef jal x1,80009cd8 +80009024: 00000013 addi x0,x0,0 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 0000f517 auipc x10,0xf +80009044: 50850513 addi x10,x10,1288 # 80018548 +80009048: 00000013 addi x0,x0,0 +8000904c: 00000013 addi x0,x0,0 +80009050: 00000013 addi x0,x0,0 +80009054: 00000013 addi x0,x0,0 +80009058: 00000013 addi x0,x0,0 +8000905c: 00000013 addi x0,x0,0 +80009060: 00021097 auipc x1,0x21 +80009064: 504080e7 jalr x1,1284(x1) # 8002a564 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 00010517 auipc x10,0x10 +80009084: 79e50513 addi x10,x10,1950 # 8001981e +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 1dd0006f jal x0,80009a84 + +800090ac : +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: 6fb50513 addi x10,x10,1787 # 800197bb +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 00000013 addi x0,x0,0 +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: 6f750513 addi x10,x10,1783 # 800197f7 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 0000f317 auipc x6,0xf +8000912c: 3d032303 lw x6,976(x6) # 800184f8 +80009130: 0000f397 auipc x7,0xf +80009134: 3c03a383 lw x7,960(x7) # 800184f0 +80009138: 40730533 sub x10,x6,x7 +8000913c: 02000593 addi x11,x0,32 +80009140: 399000ef jal x1,80009cd8 +80009144: 00000013 addi x0,x0,0 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 0000f517 auipc x10,0xf +80009164: 3e850513 addi x10,x10,1000 # 80018548 +80009168: 00000013 addi x0,x0,0 +8000916c: 00000013 addi x0,x0,0 +80009170: 00000013 addi x0,x0,0 +80009174: 00000013 addi x0,x0,0 +80009178: 00000013 addi x0,x0,0 +8000917c: 00000013 addi x0,x0,0 +80009180: 00021097 auipc x1,0x21 +80009184: 3e4080e7 jalr x1,996(x1) # 8002a564 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 00010517 auipc x10,0x10 +800091a4: 76650513 addi x10,x10,1894 # 80019906 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 0bd0006f jal x0,80009a84 + +800091cc : +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00011517 auipc x10,0x11 +800091e4: 80d50513 addi x10,x10,-2035 # 800199ed +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0000f517 auipc x10,0xf +8000920c: 30c52503 lw x10,780(x10) # 80018514 +80009210: 04050a63 beq x10,x0,80009264 +80009214: 00100593 addi x11,x0,1 +80009218: 08b50663 beq x10,x11,800092a4 +8000921c: 00200593 addi x11,x0,2 +80009220: 0cb50263 beq x10,x11,800092e4 +80009224: 00300593 addi x11,x0,3 +80009228: 0eb50e63 beq x10,x11,80009324 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00010517 auipc x10,0x10 +80009244: 7e950513 addi x10,x10,2025 # 80019a29 +80009248: 00000013 addi x0,x0,0 +8000924c: 00000013 addi x0,x0,0 +80009250: 00000013 addi x0,x0,0 +80009254: 00000013 addi x0,x0,0 +80009258: 00000013 addi x0,x0,0 +8000925c: 00000013 addi x0,x0,0 +80009260: 1000006f jal x0,80009360 + +80009264 : +80009264: 00000013 addi x0,x0,0 +80009268: 00000013 addi x0,x0,0 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: 78750513 addi x10,x10,1927 # 80019a07 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 0c00006f jal x0,80009360 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: 74f50513 addi x10,x10,1871 # 80019a0f +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0800006f jal x0,80009360 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: 71750513 addi x10,x10,1815 # 80019a17 +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0400006f jal x0,80009360 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: 6e050513 addi x10,x10,1760 # 80019a20 +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 + +80009360 : +80009360: 00021097 auipc x1,0x21 +80009364: 204080e7 jalr x1,516(x1) # 8002a564 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: 6b250513 addi x10,x10,1714 # 80019a32 +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 0000f517 auipc x10,0xf +800093ac: 16852503 lw x10,360(x10) # 80018510 +800093b0: 00100593 addi x11,x0,1 +800093b4: 06b50863 beq x10,x11,80009424 +800093b8: 00200593 addi x11,x0,2 +800093bc: 0ab50463 beq x10,x11,80009464 +800093c0: 00300593 addi x11,x0,3 +800093c4: 0eb50063 beq x10,x11,800094a4 +800093c8: 00400593 addi x11,x0,4 +800093cc: 10b50c63 beq x10,x11,800094e4 +800093d0: 00500593 addi x11,x0,5 +800093d4: 14b50863 beq x10,x11,80009524 +800093d8: 00600593 addi x11,x0,6 +800093dc: 18b50463 beq x10,x11,80009564 +800093e0: 00700593 addi x11,x0,7 +800093e4: 1cb50063 beq x10,x11,800095a4 +800093e8: 00800593 addi x11,x0,8 +800093ec: 1eb50c63 beq x10,x11,800095e4 +800093f0: 00000013 addi x0,x0,0 +800093f4: 00000013 addi x0,x0,0 +800093f8: 00000013 addi x0,x0,0 +800093fc: 00000013 addi x0,x0,0 +80009400: 00010517 auipc x10,0x10 +80009404: 78950513 addi x10,x10,1929 # 80019b89 +80009408: 00000013 addi x0,x0,0 +8000940c: 00000013 addi x0,x0,0 +80009410: 00000013 addi x0,x0,0 +80009414: 00000013 addi x0,x0,0 +80009418: 00000013 addi x0,x0,0 +8000941c: 00000013 addi x0,x0,0 +80009420: 2000006f jal x0,80009620 + +80009424 : +80009424: 00000013 addi x0,x0,0 +80009428: 00000013 addi x0,x0,0 +8000942c: 00000013 addi x0,x0,0 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: 60c50513 addi x10,x10,1548 # 80019a4c +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 1c00006f jal x0,80009620 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: 5fd50513 addi x10,x10,1533 # 80019a7d +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1800006f jal x0,80009620 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: 5dd50513 addi x10,x10,1501 # 80019a9d +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1400006f jal x0,80009620 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: 5bb50513 addi x10,x10,1467 # 80019abb +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1000006f jal x0,80009620 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: 59a50513 addi x10,x10,1434 # 80019ada +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 0c00006f jal x0,80009620 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: 58250513 addi x10,x10,1410 # 80019b02 +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0800006f jal x0,80009620 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: 56e50513 addi x10,x10,1390 # 80019b2e +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0400006f jal x0,80009620 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: 55a50513 addi x10,x10,1370 # 80019b5a +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 + +80009620 : +80009620: 00021097 auipc x1,0x21 +80009624: f44080e7 jalr x1,-188(x1) # 8002a564 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: 55850513 addi x10,x10,1368 # 80019b98 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 0000f517 auipc x10,0xf +8000966c: e9052503 lw x10,-368(x10) # 800184f8 +80009670: 02000593 addi x11,x0,32 +80009674: 664000ef jal x1,80009cd8 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 0000f517 auipc x10,0xf +80009684: ec850513 addi x10,x10,-312 # 80018548 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 00000013 addi x0,x0,0 +800096ac: 00000013 addi x0,x0,0 +800096b0: 00000013 addi x0,x0,0 +800096b4: 00000013 addi x0,x0,0 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 00010517 auipc x10,0x10 +800096c4: 4ef50513 addi x10,x10,1263 # 80019baf +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 0000f517 auipc x10,0xf +800096ec: e0852503 lw x10,-504(x10) # 800184f0 +800096f0: 02000593 addi x11,x0,32 +800096f4: 5e4000ef jal x1,80009cd8 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 0000f517 auipc x10,0xf +80009704: e4850513 addi x10,x10,-440 # 80018548 +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000f517 auipc x10,0xf +8000972c: de852503 lw x10,-536(x10) # 80018510 +80009730: 00200593 addi x11,x0,2 +80009734: 08b51463 bne x10,x11,800097bc +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 00010517 auipc x10,0x10 +80009744: 48650513 addi x10,x10,1158 # 80019bc6 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000f517 auipc x10,0xf +8000976c: d9052503 lw x10,-624(x10) # 800184f8 +80009770: 284000ef jal x1,800099f4 +80009774: 00021097 auipc x1,0x21 +80009778: df0080e7 jalr x1,-528(x1) # 8002a564 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: 45d50513 addi x10,x10,1117 # 80019bdd +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000f517 auipc x10,0xf +800097ac: d4852503 lw x10,-696(x10) # 800184f0 +800097b0: 244000ef jal x1,800099f4 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 + +800097bc : +800097bc: 00000097 auipc x1,0x0 +800097c0: 314080e7 jalr x1,788(x1) # 80009ad0 +800097c4: 0000f517 auipc x10,0xf +800097c8: d4c52503 lw x10,-692(x10) # 80018510 +800097cc: 00100593 addi x11,x0,1 +800097d0: 02b51e63 bne x10,x11,8000980c +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00010517 auipc x10,0x10 +800097e4: 47350513 addi x10,x10,1139 # 80019c53 +800097e8: 00000013 addi x0,x0,0 +800097ec: 00000013 addi x0,x0,0 +800097f0: 00000013 addi x0,x0,0 +800097f4: 00000013 addi x0,x0,0 +800097f8: 00000013 addi x0,x0,0 +800097fc: 00000013 addi x0,x0,0 +80009800: 00021097 auipc x1,0x21 +80009804: d64080e7 jalr x1,-668(x1) # 8002a564 +80009808: 27c0006f jal x0,80009a84 +8000980c: 00200593 addi x11,x0,2 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: 50950513 addi x10,x10,1289 # 80019d29 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 23c0006f jal x0,80009a84 +8000984c: 00300593 addi x11,x0,3 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: 5bc50513 addi x10,x10,1468 # 80019e1c +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 1fc0006f jal x0,80009a84 +8000988c: 00400593 addi x11,x0,4 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: 67750513 addi x10,x10,1655 # 80019f17 +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1bc0006f jal x0,80009a84 +800098cc: 00500593 addi x11,x0,5 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: 71e50513 addi x10,x10,1822 # 80019ffe +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 17c0006f jal x0,80009a84 +8000990c: 1780006f jal x0,80009a84 + +80009910 : +80009910: 00000013 addi x0,x0,0 +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: 2eb50513 addi x10,x10,747 # 80019c0b +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 0000f617 auipc x12,0xf +8000994c: be062603 lw x12,-1056(x12) # 80018528 +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 0000f517 auipc x10,0xf +80009964: 29450513 addi x10,x10,660 # 80018bf4 +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 00065503 lhu x10,0(x12) +8000998c: 01000593 addi x11,x0,16 +80009990: 00357413 andi x8,x10,3 +80009994: 00300493 addi x9,x0,3 +80009998: 00941a63 bne x8,x9,800099ac +8000999c: 00265403 lhu x8,2(x12) +800099a0: 01041413 slli x8,x8,0x10 +800099a4: 00856533 or x10,x10,x8 +800099a8: 02000593 addi x11,x0,32 +800099ac: 32c000ef jal x1,80009cd8 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 0000f517 auipc x10,0xf +800099c4: b8850513 addi x10,x10,-1144 # 80018548 +800099c8: 00000013 addi x0,x0,0 +800099cc: 00000013 addi x0,x0,0 +800099d0: 00000013 addi x0,x0,0 +800099d4: 00000013 addi x0,x0,0 +800099d8: 00000013 addi x0,x0,0 +800099dc: 00000013 addi x0,x0,0 +800099e0: 00021097 auipc x1,0x21 +800099e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800099e8: 00000097 auipc x1,0x0 +800099ec: 0e8080e7 jalr x1,232(x1) # 80009ad0 +800099f0: 0940006f jal x0,80009a84 + +800099f4 : +800099f4: 02054263 blt x10,x0,80009a18 + +800099f8 : +800099f8: 01800593 addi x11,x0,24 +800099fc: 04b55463 bge x10,x11,80009a44 +80009a00: 0000f597 auipc x11,0xf +80009a04: b7058593 addi x11,x11,-1168 # 80018570 +80009a08: 00251613 slli x12,x10,0x2 +80009a0c: 00c585b3 add x11,x11,x12 +80009a10: 0005a503 lw x10,0(x11) +80009a14: 00008067 jalr x0,0(x1) + +80009a18 : +80009a18: 00100593 addi x11,x0,1 +80009a1c: 01f59593 slli x11,x11,0x1f +80009a20: 00b54533 xor x10,x10,x11 +80009a24: 01000593 addi x11,x0,16 +80009a28: 00b55e63 bge x10,x11,80009a44 +80009a2c: 0000f597 auipc x11,0xf +80009a30: ba458593 addi x11,x11,-1116 # 800185d0 +80009a34: 00251613 slli x12,x10,0x2 +80009a38: 00c585b3 add x11,x11,x12 +80009a3c: 0005a503 lw x10,0(x11) +80009a40: 00008067 jalr x0,0(x1) + +80009a44 : +80009a44: 00000013 addi x0,x0,0 +80009a48: 00000013 addi x0,x0,0 +80009a4c: 00000013 addi x0,x0,0 +80009a50: 00000013 addi x0,x0,0 +80009a54: 00000013 addi x0,x0,0 +80009a58: 00000013 addi x0,x0,0 +80009a5c: 00000013 addi x0,x0,0 +80009a60: 0000f517 auipc x10,0xf +80009a64: fae50513 addi x10,x10,-82 # 80018a0e +80009a68: 00000013 addi x0,x0,0 +80009a6c: 00000013 addi x0,x0,0 +80009a70: 00000013 addi x0,x0,0 +80009a74: 00000013 addi x0,x0,0 +80009a78: 00000013 addi x0,x0,0 +80009a7c: 00000013 addi x0,x0,0 +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 00010517 auipc x10,0x10 +80009aa4: c0c50513 addi x10,x10,-1012 # 800196ac +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00021097 auipc x1,0x21 +80009ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 + +80009ac8 : +80009ac8: 00021097 auipc x1,0x21 +80009acc: afc080e7 jalr x1,-1284(x1) # 8002a5c4 + +80009ad0 : +80009ad0: 0000f617 auipc x12,0xf +80009ad4: a5060613 addi x12,x12,-1456 # 80018520 +80009ad8: 00162023 sw x1,0(x12) +80009adc: 00000013 addi x0,x0,0 +80009ae0: 0000f517 auipc x10,0xf +80009ae4: 13550513 addi x10,x10,309 # 80018c15 +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 +80009b08: 0000f517 auipc x10,0xf +80009b0c: a2052503 lw x10,-1504(x10) # 80018528 +80009b10: 02000593 addi x11,x0,32 +80009b14: 1c4000ef jal x1,80009cd8 +80009b18: 00000013 addi x0,x0,0 +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000f517 auipc x10,0xf +80009b24: a2850513 addi x10,x10,-1496 # 80018548 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 00000013 addi x0,x0,0 +80009b4c: 00000013 addi x0,x0,0 +80009b50: 00000013 addi x0,x0,0 +80009b54: 00000013 addi x0,x0,0 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000f517 auipc x10,0xf +80009b64: 0c550513 addi x10,x10,197 # 80018c25 +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 0000f517 auipc x10,0xf +80009b8c: 9a852503 lw x10,-1624(x10) # 80018530 +80009b90: 02000593 addi x11,x0,32 +80009b94: 144000ef jal x1,80009cd8 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000f517 auipc x10,0xf +80009ba4: 9a850513 addi x10,x10,-1624 # 80018548 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 00000013 addi x0,x0,0 +80009bcc: 00000013 addi x0,x0,0 +80009bd0: 00000013 addi x0,x0,0 +80009bd4: 00000013 addi x0,x0,0 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000f517 auipc x10,0xf +80009be4: 05550513 addi x10,x10,85 # 80018c35 +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 0000f517 auipc x10,0xf +80009c0c: 93052503 lw x10,-1744(x10) # 80018538 +80009c10: 02000593 addi x11,x0,32 +80009c14: 0c4000ef jal x1,80009cd8 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000f517 auipc x10,0xf +80009c24: 92850513 addi x10,x10,-1752 # 80018548 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 00000013 addi x0,x0,0 +80009c4c: 00000013 addi x0,x0,0 +80009c50: 00000013 addi x0,x0,0 +80009c54: 00000013 addi x0,x0,0 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000f517 auipc x10,0xf +80009c64: fe550513 addi x10,x10,-27 # 80018c45 +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 0000f517 auipc x10,0xf +80009c8c: 8b852503 lw x10,-1864(x10) # 80018540 +80009c90: 02000593 addi x11,x0,32 +80009c94: 044000ef jal x1,80009cd8 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000f517 auipc x10,0xf +80009ca4: 8a850513 addi x10,x10,-1880 # 80018548 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000f617 auipc x12,0xf +80009ccc: 85860613 addi x12,x12,-1960 # 80018520 +80009cd0: 00062083 lw x1,0(x12) +80009cd4: 00008067 jalr x0,0(x1) + +80009cd8 : +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000f617 auipc x12,0xf +80009ce4: 86860613 addi x12,x12,-1944 # 80018548 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 03000693 addi x13,x0,48 +80009d04: 00d60023 sb x13,0(x12) +80009d08: 07800693 addi x13,x0,120 +80009d0c: 00d600a3 sb x13,1(x12) +80009d10: 00260613 addi x12,x12,2 +80009d14: 00058693 addi x13,x11,0 + +80009d18 : +80009d18: ffc68693 addi x13,x13,-4 +80009d1c: 00d55733 srl x14,x10,x13 +80009d20: 00f77713 andi x14,x14,15 +80009d24: 00a00793 addi x15,x0,10 +80009d28: 00f74663 blt x14,x15,80009d34 +80009d2c: 05770713 addi x14,x14,87 +80009d30: 0080006f jal x0,80009d38 + +80009d34 : +80009d34: 03070713 addi x14,x14,48 + +80009d38 : +80009d38: 00e60023 sb x14,0(x12) +80009d3c: 00160613 addi x12,x12,1 +80009d40: fc069ce3 bne x13,x0,80009d18 +80009d44: 00a00693 addi x13,x0,10 +80009d48: 00d60023 sb x13,0(x12) +80009d4c: 000600a3 sb x0,1(x12) +80009d50: 00008067 jalr x0,0(x1) + +80009d54 : +80009d54: 00a00693 addi x13,x0,10 +80009d58: 02d54663 blt x10,x13,80009d84 +80009d5c: ff650513 addi x10,x10,-10 +80009d60: 03100713 addi x14,x0,49 +80009d64: 00d54c63 blt x10,x13,80009d7c +80009d68: ff650513 addi x10,x10,-10 +80009d6c: 03200713 addi x14,x0,50 +80009d70: 00d54663 blt x10,x13,80009d7c +80009d74: ff650513 addi x10,x10,-10 +80009d78: 03300713 addi x14,x0,51 +80009d7c: 00e60023 sb x14,0(x12) +80009d80: 00160613 addi x12,x12,1 +80009d84: 03050513 addi x10,x10,48 +80009d88: 00a60023 sb x10,0(x12) +80009d8c: 00a00693 addi x13,x0,10 +80009d90: 00d600a3 sb x13,1(x12) +80009d94: 00060123 sb x0,2(x12) +80009d98: 00008067 jalr x0,0(x1) +80009d9c: 00000013 addi x0,x0,0 +80009da0: 00000013 addi x0,x0,0 +80009da4: 00000013 addi x0,x0,0 +80009da8: 00000013 addi x0,x0,0 +80009dac: 00000013 addi x0,x0,0 +80009db0: 00000013 addi x0,x0,0 +80009db4: 00000013 addi x0,x0,0 +80009db8: 00000013 addi x0,x0,0 +80009dbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: eb838393 addi x7,x7,-328 # 80007ec0 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: e9c38393 addi x7,x7,-356 # 80007ec0 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: e8438393 addi x7,x7,-380 # 80007ec0 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: e7038393 addi x7,x7,-400 # 80007ec0 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: e6438393 addi x7,x7,-412 # 80007ec0 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e3038393 addi x7,x7,-464 # 80007ec0 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 08830313 addi x6,x6,136 # 80007124 +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e1838393 addi x7,x7,-488 # 80007ec0 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 07030313 addi x6,x6,112 # 80007124 +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e0038393 addi x7,x7,-512 # 80007ec0 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 05830313 addi x6,x6,88 # 80007124 +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: de838393 addi x7,x7,-536 # 80007ec0 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: ef478793 addi x15,x15,-268 # 80007134 +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: ffff0117 auipc x2,0xffff0 +8002a4a4: c9010113 addi x2,x2,-880 # 8001a130 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: ce018193 addi x3,x3,-800 # 800081c0 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 800196d5 .word 0x800196d5 +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: 05828293 addi x5,x5,88 # 80029600 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: 03828293 addi x5,x5,56 # 80029600 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zkne-aes32esi-00.elf.objdump b/riscv-tests/rv32-Zkne-aes32esi-00.elf.objdump new file mode 100644 index 0000000..8de4998 --- /dev/null +++ b/riscv-tests/rv32-Zkne-aes32esi-00.elf.objdump @@ -0,0 +1,19189 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zkne/Zkne-aes32esi-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zkne/Zkne-aes32esi-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009dc0 memsz 0x00009dc0 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009d80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001d370 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80029400 80029400 00028400 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003ee2 00000000 00000000 0002967b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 00000000 00000000 0002d55d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5db 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d5fe 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d610 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 00000000 00000000 0002d638 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d6c4 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80029400 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccpXMmix.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b0 +800081c0 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b1 +8000d845 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b2 +8000d87a l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b3 +8000d8af l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b4 +800081d8 l .text.rvtest 00000000 failedtest_x8_x7 +8000d8e4 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b5 +8000d919 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b6 +8000d94e l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b7 +8000d983 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b8 +8000d9b8 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b9 +8000d9ed l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b9_str +80000224 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b10 +8000da23 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b11 +8000da5a l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b12 +8000da91 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b13 +8000dac8 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b14 +8000daff l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b15 +8000db36 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b16 +8000db6d l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b17 +8000dba4 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b18 +8000dbdb l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b19 +8000dc12 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b20 +8000dc49 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b21 +8000dc80 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b22 +8000dcb7 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b22_str +80000460 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b23 +8000dcee l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b23_str +8000048c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b24 +8000dd25 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b24_str +800004b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b25 +8000dd5c l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b25_str +800004e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b26 +8000dd93 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b26_str +80000510 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b27 +8000ddca l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b27_str +8000053c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b28 +8000de01 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b28_str +80000568 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b29 +8000de38 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b30 +8000de6f l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_b31 +8000dea6 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b0 +8000dedd l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b1 +8000df13 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b2 +8000df49 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b3 +8000df7f l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b4 +8000dfb5 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b5 +8000dfeb l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b6 +8000e021 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b7 +8000e057 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b8 +8000e08d l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b9 +8000e0c3 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b9_str +800007c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b10 +8000e0f9 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b11 +8000e130 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b11_str +80000818 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b12 +8000e167 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b12_str +80000844 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b13 +8000e19e l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b13_str +80000870 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b14 +8000e1d5 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b14_str +8000089c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b15 +8000e20c l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b15_str +800008c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b16 +8000e243 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b16_str +800008f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b17 +8000e27a l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b17_str +80000920 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b18 +8000e2b1 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b18_str +8000094c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b19 +8000e2e8 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b19_str +80000978 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b20 +8000e31f l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b21 +8000e356 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b21_str +800009d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b22 +8000e38d l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b22_str +80000a00 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b23 +8000e3c4 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b23_str +80000a2c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b24 +8000e3fb l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b24_str +80000a58 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b25 +8000e432 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b25_str +80000a84 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b26 +8000e469 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b26_str +80000ab0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b27 +8000e4a0 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b27_str +80000ae0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b28 +8000e4d7 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b28_str +80000b0c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b29 +8000e50e l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b29_str +80000b38 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b30 +8000e545 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b30_str +80000b68 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_b31 +8000e57c l .data 00000000 Zkne_aes32esi_cg_cp_rs2_b31_str +80000b94 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b0 +8000e5b3 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b0_str +80000bc4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b1 +8000e5e8 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b1_str +80000bf0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b2 +8000e61d l .data 00000000 Zkne_aes32esi_cg_cp_rd_b2_str +80000c1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b3 +8000e652 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b3_str +80000c50 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b4 +80008200 l .text.rvtest 00000000 failedtest_x14_x13 +8000e687 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b4_str +80000c7c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b5 +8000e6bc l .data 00000000 Zkne_aes32esi_cg_cp_rd_b5_str +80000ca8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b6 +8000e6f1 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b6_str +80000cd4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b7 +8000e726 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b7_str +80000d00 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b8 +8000e75b l .data 00000000 Zkne_aes32esi_cg_cp_rd_b8_str +80000d2c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b9 +8000e790 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b9_str +80000d5c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b10 +8000e7c5 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b10_str +80000d88 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b11 +8000e7fb l .data 00000000 Zkne_aes32esi_cg_cp_rd_b11_str +80000db4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b12 +8000e831 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b13 +8000e867 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b14 +8000e89d l .data 00000000 Zkne_aes32esi_cg_cp_rd_b14_str +80000e40 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b15 +8000e8d3 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b15_str +80000e6c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b16 +8000e909 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b16_str +80000e98 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b17 +8000e93f l .data 00000000 Zkne_aes32esi_cg_cp_rd_b17_str +80000ec4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b18 +8000e975 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b18_str +80000ef0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b19 +8000e9ab l .data 00000000 Zkne_aes32esi_cg_cp_rd_b19_str +80000f1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b20 +8000e9e1 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b20_str +80000f48 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b21 +8000ea17 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b21_str +80000f78 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b22 +8000ea4d l .data 00000000 Zkne_aes32esi_cg_cp_rd_b22_str +80000fa4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b23 +8000ea83 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b23_str +80000fd0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b24 +8000eab9 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b24_str +80000ffc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b25 +8000eaef l .data 00000000 Zkne_aes32esi_cg_cp_rd_b25_str +80001028 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b26 +8000eb25 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b26_str +80001054 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b27 +8000eb5b l .data 00000000 Zkne_aes32esi_cg_cp_rd_b27_str +80001080 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b28 +8000eb91 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b28_str +800010ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b29 +8000ebc7 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b29_str +800010d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b30 +8000ebfd l .data 00000000 Zkne_aes32esi_cg_cp_rd_b30_str +80001104 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rd_b31 +8000ec33 l .data 00000000 Zkne_aes32esi_cg_cp_rd_b31_str +80001130 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x0 +8000ec69 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x0_str +8000115c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x1 +8000eca6 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x1_str +80001188 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x2 +8000ece3 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x2_str +800011b4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x80000000 +8000ed20 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x80000000_str +800011e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x80000001 +8000ed65 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x80000001_str +8000120c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x7fffffff +8000edaa l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x7fffffff_str +80001238 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x7ffffffe +8000edef l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x7ffffffe_str +80001264 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xffffffff +8000ee34 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xffffffff_str +80001290 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xfffffffe +8000ee79 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xfffffffe_str +800012bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x5bbc8872 +8000eebe l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x5bbc8872_str +800012e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xaaaaaaaa +8000ef03 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0xaaaaaaaa_str +80001314 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x55555555 +8000ef48 l .data 00000000 Zkne_aes32esi_cg_cp_rs1_edges_0x55555555_str +80001340 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x0 +8000ef8d l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x0_str +8000136c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x1 +8000efcb l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x1_str +80001398 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x2 +8000f009 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x2_str +800013c4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x80000000 +8000f047 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x80000000_str +800013f0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x80000001 +8000f08c l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x80000001_str +8000141c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x7fffffff +8000f0d1 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x7fffffff_str +80001448 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x7ffffffe +8000f116 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x7ffffffe_str +80001474 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xffffffff +8000f15b l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xffffffff_str +800014a0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xfffffffe +8000f1a0 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xfffffffe_str +800014cc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x5bbc8872 +8000f1e5 l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x5bbc8872_str +800014f8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xaaaaaaaa +8000f22a l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0xaaaaaaaa_str +80001524 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x55555555 +8000f26f l .data 00000000 Zkne_aes32esi_cg_cp_rs2_edges_0x55555555_str +80001550 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f2b4 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +8000157c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f309 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f35e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f3b3 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001600 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f40f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +8000162c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f46b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001658 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f4c7 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001684 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f523 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f57f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f5db l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001708 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f637 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001734 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f693 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001760 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f6ef l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +8000178c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f744 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f799 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f7ee l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001810 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f84a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +8000183c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f8a6 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001868 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f902 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001894 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f95e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000f9ba l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000fa16 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001918 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000fa72 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001944 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000face l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001970 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fb2a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +8000199c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fb7f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fbd4 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fc29 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a20 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fc85 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a4c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fce1 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a78 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fd3d l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aa4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fd99 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fdf5 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001afc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000fe51 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b28 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000fead l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b54 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000ff09 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b80 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000ff65 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bac l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000ffc1 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bd8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8001001d l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c04 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +80010079 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c30 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +800100dc l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c5c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8001013f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c88 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +800101a2 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cb4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +80010205 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +80010268 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d0c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +800102cb l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d38 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8001032e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d64 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010391 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d90 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +800103f4 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dbc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +80010450 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001de8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +800104ac l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e14 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +80010508 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e40 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8001056b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e6c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +800105ce l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e98 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +80010631 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ec4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010694 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +800106f7 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8001075a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f48 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +800107bd l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f74 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +80010820 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +80010883 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fcc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +800108df l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ff8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8001093b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002024 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010997 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002050 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +800109fa l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +8000207c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +80010a5d l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +80010ac0 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +80010b23 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002100 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010b86 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +8000212c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010be9 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002158 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010c4c l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002184 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010caf l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010d12 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010d6e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002208 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010dca l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002234 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010e26 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002260 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010e89 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +8000228c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010eec l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80010f4f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80010fb2 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002310 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +80011015 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +8000233c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80011078 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002368 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +800110db l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002394 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8001113e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +800111a1 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +800111fd l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002418 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +80011259 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002444 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +800112b5 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002470 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +80011318 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +8000249c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8001137b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +800113de l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +80011441 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002520 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +800114a4 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +8000254c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +80011507 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002578 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8001156a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +800115cd l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011630 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8001168c l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002628 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +800116e8 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002654 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +80011744 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002680 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +800117a7 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8001180a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8001186d l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002704 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +800118d0 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002730 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011933 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +8000275c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +80011996 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002788 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +800119f9 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027b4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011a5c l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +80011abf l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +8000280c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011b1b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002838 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +80011b77 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002864 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011bd3 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002890 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011c36 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011c99 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011cfc l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002914 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011d5f l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002940 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011dc2 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +8000296c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011e25 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +80002998 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011e88 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029c4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011eeb l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +80011f4e l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +80011faa l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a48 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +80012006 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a74 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80012062 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +800120c5 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002acc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +80012128 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002af8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8001218b l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b24 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +800121ee l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b50 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012251 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b7c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800122b4 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002ba8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012317 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bd4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8001237a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c00 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800123dd l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c2c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +80012439 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c58 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012495 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c84 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800124f1 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012554 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cdc l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800125b7 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d08 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8001261a l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d34 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8001267d l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d60 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800126e0 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d8c l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012743 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002db8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +800127a6 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002de4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +80012809 l .data 00000000 Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e10 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b0 +8001286c l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b0_str +80002e3c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b1 +800128a8 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b1_str +80002e68 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b2 +800128e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b2_str +80002e94 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b3 +80012920 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b3_str +80002ec8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b4 +8001295c l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b4_str +80002ef4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b5 +80012998 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b5_str +80002f24 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b6 +800129d4 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b6_str +80002f50 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b7 +80012a10 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b7_str +80002f7c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b8 +80012a4c l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b8_str +80002fa8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b9 +80012a88 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b9_str +80002fd4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b10 +80012ac4 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b10_str +80003000 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b11 +80012b01 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b11_str +80003030 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b12 +80012b3e l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b12_str +80003064 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b13 +80012b7b l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b13_str +80003090 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b14 +80012bb8 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b14_str +800030bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b15 +80012bf5 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b15_str +800030e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b16 +80012c32 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b17 +80012c6f l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b18 +80012cac l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b18_str +80003170 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b19 +80012ce9 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b19_str +800031a0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b20 +80012d26 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b20_str +800031cc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b21 +80012d63 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b21_str +800031f8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b22 +80012da0 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b22_str +80003224 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b23 +80012ddd l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b23_str +80003250 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b24 +80012e1a l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b24_str +8000327c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b25 +80012e57 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b25_str +800032a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b26 +80012e94 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b26_str +800032d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b27 +80012ed1 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b27_str +80003300 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b28 +80012f0e l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b28_str +8000332c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b29 +80012f4b l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b29_str +80003358 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b30 +80012f88 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b30_str +80003384 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b31 +80012fc5 l .data 00000000 Zkne_aes32esi_cg_cmp_rs1_rs2_b31_str +800033b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b0 +80013002 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b0_str +800033e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b1 +8001303d l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b1_str +80003410 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b2 +80013078 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b2_str +8000343c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b3 +800130b3 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b3_str +80003470 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b4 +800130ee l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b4_str +8000349c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b5 +80013129 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b5_str +800034c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b6 +80013164 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b6_str +800034fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b7 +8001319f l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b7_str +80003528 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b8 +800131da l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b8_str +80003554 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b9 +80013215 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b9_str +80003580 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b10 +80013250 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b10_str +800035ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b11 +8001328c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b11_str +800035d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b12 +800132c8 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b12_str +8000360c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b13 +80013304 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b13_str +80003638 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b14 +80013340 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b14_str +80003664 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b15 +8001337c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b15_str +80003690 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b16 +800133b8 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b16_str +800036bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b17 +800133f4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b17_str +800036e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b18 +80013430 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b18_str +80003714 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b19 +8001346c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b19_str +80003740 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b20 +800134a8 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b21 +800134e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b22 +80013520 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b23 +8001355c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b24 +80013598 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b25 +800135d4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b26 +80013610 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b27 +8001364c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b27_str +800038a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b28 +80013688 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b28_str +800038d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b29 +800136c4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b29_str +80003900 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b30 +80013700 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b30_str +8000392c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b31 +8001373c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_b31_str +80003958 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b0 +80013778 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b0_str +80003984 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b1 +800137b3 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b1_str +800039b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b2 +800137ee l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b2_str +800039dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b3 +80013829 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b4 +80013864 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b5 +8001389f l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b6 +800138da l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b6_str +80003a94 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b7 +80013915 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b7_str +80003ac0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b8 +80013950 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b8_str +80003aec l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b9 +8001398b l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b9_str +80003b18 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b10 +800139c6 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b10_str +80003b44 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b11 +80013a02 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b11_str +80003b70 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b12 +80013a3e l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b12_str +80003ba4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b13 +80013a7a l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b13_str +80003bd0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b14 +80013ab6 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b14_str +80003bfc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b15 +80013af2 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b15_str +80003c28 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b16 +80013b2e l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b16_str +80003c54 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b17 +80013b6a l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b17_str +80003c80 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b18 +80013ba6 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b18_str +80003cac l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b19 +80013be2 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b19_str +80003cd8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b20 +80013c1e l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b20_str +80003d08 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b21 +80013c5a l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b21_str +80003d34 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b22 +80013c96 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b22_str +80003d60 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b23 +80013cd2 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b23_str +80003d8c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b24 +80013d0e l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b24_str +80003db8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b25 +80013d4a l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b25_str +80003de4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b26 +80013d86 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b26_str +80003e14 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b27 +80013dc2 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b27_str +80003e40 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b28 +80013dfe l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b28_str +80003e6c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b29 +80013e3a l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b29_str +80003e98 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b30 +80013e76 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b30_str +80003ec4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b31 +80013eb2 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs2_b31_str +80003ef0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b0 +80013eee l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b0_str +80003f20 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b1 +80013f2d l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b1_str +80003f4c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b2 +80013f6c l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b2_str +80003f78 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b3 +80013fab l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b3_str +80003fac l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b4 +80013fea l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b4_str +80003fd8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b5 +80014029 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b5_str +80004008 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b6 +80014068 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b6_str +8000403c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b7 +800140a7 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b7_str +80004068 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b8 +800140e6 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b8_str +80004094 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b9 +80014125 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b9_str +800040c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b10 +80014164 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b10_str +800040ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b11 +800141a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b11_str +80004118 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b12 +800141e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b12_str +8000414c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b13 +80014224 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b13_str +80004178 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b14 +80014264 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b14_str +800041a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b15 +800142a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b15_str +800041d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b16 +800142e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b16_str +800041fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b17 +80014324 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b17_str +8000422c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b18 +80014364 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b18_str +80004258 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b19 +800143a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b19_str +80004284 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b20 +800143e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b20_str +800042b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b21 +80014424 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b21_str +800042dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b22 +80014464 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b22_str +80004308 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b23 +800144a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b23_str +80004334 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b24 +800144e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b24_str +80004360 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b25 +80014524 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b25_str +8000438c l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b26 +80014564 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b26_str +800043b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b27 +800145a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b27_str +800043e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b28 +800145e4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b28_str +80004414 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b29 +80014624 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b29_str +80004440 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b30 +80014664 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b30_str +80004470 l .text.rvtest 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b31 +800146a4 l .data 00000000 Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b31_str +8000449c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_bs_b0 +800146e4 l .data 00000000 Zkne_aes32esi_cg_cp_bs_b0_str +800044c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_bs_b1 +8001471a l .data 00000000 Zkne_aes32esi_cg_cp_bs_b1_str +800044f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_bs_b2 +80014750 l .data 00000000 Zkne_aes32esi_cg_cp_bs_b2_str +80004520 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_bs_b3 +80014786 l .data 00000000 Zkne_aes32esi_cg_cp_bs_b3_str +8000454c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b0 +800147bc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b0_str +80004578 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b1 +800147f4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b1_str +800045a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b2 +8001482c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b2_str +800045d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b3 +80014864 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b3_str +800045fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b4 +8001489c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b4_str +80004628 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b5 +800148d4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b5_str +80004654 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b6 +8001490c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b6_str +80004680 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b7 +80014944 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b7_str +800046ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b8 +8001497c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b8_str +800046d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b9 +800149b4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b9_str +80004704 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b10 +800149ec l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b10_str +80004730 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b11 +80014a25 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b11_str +8000475c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b12 +80014a5e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b12_str +80004788 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b13 +80014a97 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b13_str +800047b4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b14 +80014ad0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b14_str +800047e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b15 +80014b09 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b15_str +8000480c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b16 +80014b42 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b16_str +80004838 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b17 +80014b7b l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b17_str +80004864 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b18 +80014bb4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b18_str +80004890 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b19 +80014bed l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b19_str +800048bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b20 +80014c26 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b20_str +800048e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b21 +80014c5f l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b21_str +80004914 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b22 +80014c98 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b22_str +80004940 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b23 +80014cd1 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b23_str +8000496c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b24 +80014d0a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b24_str +80004998 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b25 +80014d43 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b25_str +800049c4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b26 +80014d7c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b26_str +800049f0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b27 +80014db5 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b27_str +80004a1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b28 +80014dee l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b28_str +80004a48 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b29 +80014e27 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b29_str +80004a74 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b30 +80014e60 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b30_str +80004aa0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b31 +80014e99 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b31_str +80004acc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b32 +80014ed2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b32_str +80004af8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b33 +80014f0b l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b33_str +80004b24 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b34 +80014f44 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b34_str +80004b50 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b35 +80014f7d l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b35_str +80004b7c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b36 +80014fb6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b36_str +80004ba8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b37 +80014fef l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b37_str +80004bd4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b38 +80015028 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b38_str +80004c00 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b39 +80015061 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b39_str +80004c2c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b40 +8001509a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b40_str +80004c58 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b41 +800150d3 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b41_str +80004c84 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b42 +8001510c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b42_str +80004cb0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b43 +80015145 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b43_str +80004cdc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b44 +8001517e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b44_str +80004d08 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b45 +800151b7 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b45_str +80004d34 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b46 +800151f0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b46_str +80004d60 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b47 +80015229 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b47_str +80004d8c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b48 +80015262 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b48_str +80004db8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b49 +8001529b l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b49_str +80004de4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b50 +800152d4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b50_str +80004e10 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b51 +8001530d l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b51_str +80004e3c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b52 +80015346 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b52_str +80004e68 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b53 +8001537f l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b53_str +80004e94 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b54 +800153b8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b54_str +80004ec0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b55 +800153f1 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b55_str +80004eec l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b56 +8001542a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b56_str +80004f18 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b57 +80015463 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b57_str +80004f44 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b58 +8001549c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b58_str +80004f70 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b59 +800154d5 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b59_str +80004f9c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b60 +8001550e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b60_str +80004fc8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b61 +80015547 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b61_str +80004ff4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b62 +80015580 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b62_str +80005020 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b63 +800155b9 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b63_str +8000504c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b64 +800155f2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b64_str +80005078 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b65 +8001562b l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b65_str +800050a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b66 +80015664 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b66_str +800050d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b67 +8001569d l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b67_str +800050fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b68 +800156d6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b68_str +80005128 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b69 +8001570f l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b69_str +80005154 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b70 +80015748 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b70_str +80005180 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b71 +80015781 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b71_str +800051ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b72 +800157ba l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b72_str +800051d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b73 +800157f3 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b73_str +80005204 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b74 +8001582c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b74_str +80005230 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b75 +80015865 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b75_str +8000525c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b76 +8001589e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b76_str +80005288 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b77 +800158d7 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b77_str +800052b4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b78 +80015910 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b78_str +800052e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b79 +80015949 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b79_str +8000530c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b80 +80015982 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b80_str +80005338 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b81 +800159bb l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b81_str +80005364 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b82 +800159f4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b82_str +80005390 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b83 +80015a2d l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b83_str +800053bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b84 +80015a66 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b84_str +800053e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b85 +80015a9f l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b85_str +80005414 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b86 +80015ad8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b86_str +80005440 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b87 +80015b11 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b87_str +8000546c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b88 +80015b4a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b88_str +80005498 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b89 +80015b83 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b89_str +800054c4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b90 +80015bbc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b90_str +800054f0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b91 +80015bf5 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b91_str +8000551c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b92 +80015c2e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b92_str +80005548 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b93 +80015c67 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b93_str +80005574 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b94 +80015ca0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b94_str +800055a0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b95 +80015cd9 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b95_str +800055cc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b96 +80015d12 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b96_str +800055f8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b97 +80015d4b l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b97_str +80005624 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b98 +80015d84 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b98_str +80005650 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b99 +80015dbd l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b99_str +8000567c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b100 +80015df6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b100_str +800056a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b101 +80015e30 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b101_str +800056d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b102 +80015e6a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b102_str +80005700 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b103 +80015ea4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b103_str +8000572c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b104 +80015ede l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b104_str +80005758 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b105 +80015f18 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b105_str +80005784 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b106 +80015f52 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b106_str +800057b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b107 +80015f8c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b107_str +800057dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b108 +80015fc6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b108_str +80005808 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b109 +80016000 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b109_str +80005834 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b110 +8001603a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b110_str +80005860 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b111 +80016074 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b111_str +8000588c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b112 +800160ae l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b112_str +800058b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b113 +800160e8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b113_str +800058e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b114 +80016122 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b114_str +80005910 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b115 +8001615c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b115_str +8000593c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b116 +80016196 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b116_str +80005968 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b117 +800161d0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b117_str +80005994 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b118 +8001620a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b118_str +800059c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b119 +80016244 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b119_str +800059ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b120 +8001627e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b120_str +80005a18 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b121 +800162b8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b121_str +80005a44 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b122 +800162f2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b122_str +80005a70 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b123 +8001632c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b123_str +80005a9c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b124 +80016366 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b124_str +80005ac8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b125 +800163a0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b125_str +80005af4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b126 +800163da l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b126_str +80005b20 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b127 +80016414 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b127_str +80005b4c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b128 +8001644e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b128_str +80005b78 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b129 +80016488 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b129_str +80005ba4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b130 +800164c2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b130_str +80005bd0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b131 +800164fc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b131_str +80005bfc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b132 +80016536 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b132_str +80005c28 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b133 +80016570 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b133_str +80005c54 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b134 +800165aa l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b134_str +80005c80 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b135 +800165e4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b135_str +80005cac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b136 +8001661e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b136_str +80005cd8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b137 +80016658 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b137_str +80005d04 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b138 +80016692 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b138_str +80005d30 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b139 +800166cc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b139_str +80005d5c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b140 +80016706 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b140_str +80005d88 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b141 +80016740 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b141_str +80005db4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b142 +8001677a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b142_str +80005de0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b143 +800167b4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b143_str +80005e0c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b144 +800167ee l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b144_str +80005e38 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b145 +80016828 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b145_str +80005e64 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b146 +80016862 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b146_str +80005e90 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b147 +8001689c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b147_str +80005ebc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b148 +800168d6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b148_str +80005ee8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b149 +80016910 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b149_str +80005f14 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b150 +8001694a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b150_str +80005f40 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b151 +80016984 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b151_str +80005f6c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b152 +800169be l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b152_str +80005f98 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b153 +800169f8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b153_str +80005fc4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b154 +80016a32 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b154_str +80005ff0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b155 +80016a6c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b155_str +8000601c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b156 +80016aa6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b156_str +80006048 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b157 +80016ae0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b157_str +80006074 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b158 +80016b1a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b158_str +800060a0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b159 +80016b54 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b159_str +800060cc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b160 +80016b8e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b160_str +800060f8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b161 +80016bc8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b161_str +80006124 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b162 +80016c02 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b162_str +80006150 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b163 +80016c3c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b163_str +8000617c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b164 +80016c76 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b164_str +800061a8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b165 +80016cb0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b165_str +800061d4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b166 +80016cea l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b166_str +80006200 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b167 +80016d24 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b167_str +8000622c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b168 +80016d5e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b168_str +80006258 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b169 +80016d98 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b169_str +80006284 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b170 +80016dd2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b170_str +800062b0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b171 +80016e0c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b171_str +800062dc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b172 +80016e46 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b172_str +80006308 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b173 +80016e80 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b173_str +80006334 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b174 +80016eba l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b174_str +80006360 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b175 +80016ef4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b175_str +8000638c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b176 +80016f2e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b176_str +800063b8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b177 +80016f68 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b177_str +800063e4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b178 +80016fa2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b178_str +80006410 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b179 +80016fdc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b179_str +8000643c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b180 +80017016 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b180_str +80006468 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b181 +80017050 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b181_str +80006494 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b182 +8001708a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b182_str +800064c0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b183 +800170c4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b183_str +800064ec l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b184 +800170fe l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b184_str +80006518 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b185 +80017138 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b185_str +80006544 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b186 +80017172 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b186_str +80006570 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b187 +800171ac l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b187_str +8000659c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b188 +800171e6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b188_str +800065c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b189 +80017220 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b189_str +800065f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b190 +8001725a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b190_str +80006620 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b191 +80017294 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b191_str +8000664c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b192 +800172ce l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b192_str +80006678 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b193 +80017308 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b193_str +800066a4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b194 +80017342 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b194_str +800066d0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b195 +8001737c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b195_str +800066fc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b196 +800173b6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b196_str +80006728 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b197 +800173f0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b197_str +80006754 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b198 +8001742a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b198_str +80006780 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b199 +80017464 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b199_str +800067ac l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b200 +8001749e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b200_str +800067d8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b201 +800174d8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b201_str +80006804 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b202 +80017512 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b202_str +80006830 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b203 +8001754c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b203_str +8000685c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b204 +80017586 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b204_str +80006888 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b205 +800175c0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b205_str +800068b4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b206 +800175fa l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b206_str +800068e0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b207 +80017634 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b207_str +8000690c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b208 +8001766e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b208_str +80006938 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b209 +800176a8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b209_str +80006964 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b210 +800176e2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b210_str +80006990 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b211 +8001771c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b211_str +800069bc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b212 +80017756 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b212_str +800069e8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b213 +80017790 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b213_str +80006a14 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b214 +800177ca l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b214_str +80006a40 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b215 +80017804 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b215_str +80006a6c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b216 +8001783e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b216_str +80006a98 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b217 +80017878 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b217_str +80006ac4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b218 +800178b2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b218_str +80006af0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b219 +800178ec l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b219_str +80006b1c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b220 +80017926 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b220_str +80006b48 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b221 +80017960 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b221_str +80006b74 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b222 +8001799a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b222_str +80006ba0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b223 +800179d4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b223_str +80006bcc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b224 +80017a0e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b224_str +80006bf8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b225 +80017a48 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b225_str +80006c24 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b226 +80017a82 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b226_str +80006c50 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b227 +80017abc l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b227_str +80006c7c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b228 +80017af6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b228_str +80006ca8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b229 +80017b30 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b229_str +80006cd4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b230 +80017b6a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b230_str +80006d00 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b231 +80017ba4 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b231_str +80006d2c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b232 +80017bde l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b232_str +80006d58 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b233 +80017c18 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b233_str +80006d84 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b234 +80017c52 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b234_str +80006db0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b235 +80017c8c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b235_str +80006ddc l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b236 +80017cc6 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b236_str +80006e08 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b237 +80017d00 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b237_str +80006e34 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b238 +80017d3a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b238_str +80006e60 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b239 +80017d74 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b239_str +80006e8c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b240 +80017dae l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b240_str +80006eb8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b241 +80017de8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b241_str +80006ee4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b242 +80017e22 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b242_str +80006f10 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b243 +80017e5c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b243_str +80006f3c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b244 +80017e96 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b244_str +80006f68 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b245 +80017ed0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b245_str +80006f94 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b246 +80017f0a l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b246_str +80006fc0 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b247 +80017f44 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b247_str +80006fec l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b248 +80017f7e l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b248_str +80007018 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b249 +80017fb8 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b249_str +80007044 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b250 +80017ff2 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b250_str +80007070 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b251 +8001802c l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b251_str +8000709c l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b252 +80018066 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b252_str +800070c8 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b253 +800180a0 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b253_str +800070f4 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b254 +800180da l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b254_str +80007120 l .text.rvtest 00000000 Zkne_aes32esi_cg_cp_sbox_b255 +80018114 l .data 00000000 Zkne_aes32esi_cg_cp_sbox_b255_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80007150 l .text.rvtest 00000000 exit_Mcleanup +80007154 l .text.rvtest 00000000 resto_Medeleg +8000715c l .text.rvtest 00000000 resto_Msatp +80007160 l .text.rvtest 00000000 resto_Mscratch +80007168 l .text.rvtest 00000000 resto_Mxtvec +8000717c l .text.rvtest 00000000 resto_Mtramp +80007180 l .text.rvtest 00000000 resto_Mloop +80007198 l .text.rvtest 00000000 check_trap_sig_overflow +80007430 l .text.rvtest 00000000 trap_sig_overflow +800072d0 l .text.rvtest 00000000 check_trap_sig_offset +800187d2 l .data 00000000 failstr +8002a564 l .text.rvmodel 00000000 rvmodel_io_write_str +8001880f l .data 00000000 begin_debugstr +8001886f l .data 00000000 trap_sig_overflowstr +8001941a l .data 00000000 endstr +8002a5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +8000c328 l .data 00000000 Mtrap_sig +8001a908 l .data 00000000 trap_sigptr +8001a900 l .data 00000000 final_trap_sig_offset +80007394 l .text.rvtest 00000000 check_abort_test +80008228 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800189c3 l .data 00000000 trap_sig_offset_mismatch +800073b0 l .text.rvtest 00000000 exit_cleanup +80007464 l .text.rvtest 00000000 abort_test +80018831 l .data 00000000 abortstr +80018794 l .data 00000000 successstr +8002a5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80007500 l .text.rvtest 00000000 trap_Mhandler +80007620 l .text.rvtest 00000000 rvtest_Mendtest +80007644 l .text.rvtest 00000000 common_Mhandler +800076b0 l .text.rvtest 00000000 spcl_M2mmode_test +800076bc l .text.rvtest 00000000 spcl_Mchk4alt +800076cc l .text.rvtest 00000000 spcl_Mchk4ecall +800076c4 l .text.rvtest 00000000 spcl_Mparam_chk +80008150 l .text.rvtest 00000000 Mrtn2mmode +80007c54 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800076d8 l .text.rvtest 00000000 Mgoto_mchk +800076dc l .text.rvtest 00000000 tsbi_Mdispatch +80007704 l .text.rvtest 00000000 tsbi_Mgoto_mode +800076f4 l .text.rvtest 00000000 tsbi_Mecall_test +80007770 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007ec0 l .text.rvtest 00000000 resto_Mrtn +80007730 l .text.rvtest 00000000 tsbi_Mgoto_m +80007740 l .text.rvtest 00000000 tsbi_Mgoto_s +8000775c l .text.rvtest 00000000 tsbi_Mgoto_u +8000776c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800078f0 l .text.rvtest 00000000 tsbi_instr_table +800077a0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800077b4 l .text.rvtest 00000000 found_instr +800077f8 l .text.rvtest 00000000 tsbi_instr_not_found +800077e4 l .text.rvtest 00000000 tsbi_instr_rtn +80019e51 l .data 00000000 tsbi_instr_not_found_str +80009cd8 l .text.rvtest 00000000 failedtest_hex_to_str +800182b8 l .data 00000000 ascii_buffer +800188d8 l .data 00000000 newlinestr +80007c70 l .text.rvtest 00000000 Mxcpt_sig_sv +80007c5c l .text.rvtest 00000000 Mint_sig_sv +80007c70 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80018298 l .data 00000000 saved_xepc +8002936c l .data 00000000 sig_end_canary +80007d08 l .text.rvtest 00000000 sv_Mvect +800189da l .data 00000000 sv_Mvect_str +80007dac l .text.rvtest 00000000 sv_Mcause +80018adc l .data 00000000 sv_Mcause_str +80007ee0 l .text.rvtest 00000000 common_Mint_handler +80007dd4 l .text.rvtest 00000000 common_Mexcpt_handler +80007de0 l .text.rvtest 00000000 vmem_adj_Mepc +80007e34 l .text.rvtest 00000000 sv_Mepc +80007e08 l .text.rvtest 00000000 code_adj_Mepc +80007e30 l .text.rvtest 00000000 adj_Mepc +80007e1c l .text.rvtest 00000000 data_adj_Mepc +80018bd7 l .data 00000000 sv_Mepc_str +80007e54 l .text.rvtest 00000000 skpsv_Mepc +80007e7c l .text.rvtest 00000000 adj_Mepc_rtn +80007e88 l .text.rvtest 00000000 skp_adj_Mepc +80007e8c l .text.rvtest 00000000 sv_Mtval +80018cca l .data 00000000 sv_Mtval_str +80007eac l .text.rvtest 00000000 skp_Mtval +80007eb8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80007f18 l .text.rvtest 00000000 spcl_Mhandler +80007ef4 l .text.rvtest 00000000 sv_Mip +80018e3d l .data 00000000 sv_Mip_str +80007f34 l .text.rvtest 00000000 spcl_Mdispatch_handling +80007f4c l .text.rvtest 00000000 spcl_Mdispatch +80007f50 l .text.rvtest 00000000 clrint_Mtbl +8002a000 l .text.rvmodel 00000000 Mclr_Msw_int +8002a014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8002a030 l .text.rvmodel 00000000 Mclr_Mext_int +80008050 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081a0 l .text.rvtest 00000000 rtn_fm_mmode +8000818c l .text.rvtest 00000000 from_hs_u +8000817c l .text.rvtest 00000000 from_vs +80018150 l .data 00000000 begin_failure_scratch +8000825c l .text.rvtest 00000000 failedtest_saveregs +800082cc l .text.rvtest 00000000 failedtest_saveresults +80018150 l .data 00000000 failure_type +8000846c l .text.rvtest 00000000 failedtest_saveresults_trap +800082dc l .text.rvtest 00000000 failedtest_saveresults_int +800083f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000842c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80008760 l .text.rvtest 00000000 failedtest_saveresults_common +80018278 l .data 00000000 failure_diag_type +80018288 l .data 00000000 trap_diag_fail_str_ptr +80008720 l .text.rvtest 00000000 trap_diag_offset_mismatch +80018280 l .data 00000000 trap_diag_subtype +80008734 l .text.rvtest 00000000 trap_diag_field_identified +80018dc1 l .data 00000000 sv_Mtval2_str +80018dff l .data 00000000 sv_Mtinst_str +80018a1a l .data 00000000 sv_Svect_str +80018b1a l .data 00000000 sv_Scause_str +80018c13 l .data 00000000 sv_Sepc_str +80018d07 l .data 00000000 sv_Stval_str +80018e78 l .data 00000000 sv_Sip_str +80018a5a l .data 00000000 sv_Hvect_str +80018b58 l .data 00000000 sv_Hcause_str +80018c4f l .data 00000000 sv_Hepc_str +80018d44 l .data 00000000 sv_Htval_str +80018eb3 l .data 00000000 sv_Hip_str +80018a9b l .data 00000000 sv_Vvect_str +80018b97 l .data 00000000 sv_Vcause_str +80018c8c l .data 00000000 sv_Vepc_str +80018d82 l .data 00000000 sv_Vtval_str +80018eef l .data 00000000 sv_Vip_str +80018f2c l .data 00000000 Mclr_Mext_int_str +80018f7b l .data 00000000 Mclr_Sext_int_str +80019076 l .data 00000000 Sclr_Sext_int_str +80019172 l .data 00000000 Hclr_Sext_int_str +80008750 l .text.rvtest 00000000 trap_diag_generic_report +80018284 l .data 00000000 trap_diag_mode +80008790 l .text.rvtest 00000000 failedtest_report +80008790 l .text.rvtest 00000000 print_failstr +80008808 l .text.rvtest 00000000 print_testnamestr +800188c6 l .data 00000000 testnamestr +80008848 l .text.rvtest 00000000 print_failure_test_name_str +80018270 l .data 00000000 failure_string_ptr +80008858 l .text.rvtest 00000000 print_newline_str +80008dcc l .text.rvtest 00000000 failedtest_report_trap_detailed +800188da l .data 00000000 inststr +80018250 l .data 00000000 failing_instruction +800188ee l .data 00000000 addrstr +80018258 l .data 00000000 failing_addr +80019325 l .data 00000000 regstr +80008a38 l .text.rvtest 00000000 failedtest_report_not_intreg +80018254 l .data 00000000 failing_reg +80009d54 l .text.rvtest 00000000 failedtest_dec_to_str +80008b4c l .text.rvtest 00000000 failedtest_report_print_regstr +80008a8c l .text.rvtest 00000000 failedtest_report_fpreg +80008ad8 l .text.rvtest 00000000 failedtest_report_vecreg +80008b14 l .text.rvtest 00000000 failedtest_report_vxsat +8001943b l .data 00000000 fflagsstr +80008b88 l .text.rvtest 00000000 failedtest_report_after_reg +8001931e l .data 00000000 vxsatstr +80019336 l .data 00000000 badvalstr +80008bec l .text.rvtest 00000000 failedtest_report_badval_not_fp +80018260 l .data 00000000 failing_value +80008bfc l .text.rvtest 00000000 failedtest_report_badval_done +80008ccc l .text.rvtest 00000000 failedtest_report_diag +8001934d l .data 00000000 expvalstr +80008c8c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80018268 l .data 00000000 expected_value +80008c9c l .text.rvtest 00000000 failedtest_report_expval_done +80009a84 l .text.rvtest 00000000 failedtest_report_end +80008d4c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80008cd4 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80019364 l .data 00000000 failure_diag_bad_instr_str +800193c2 l .data 00000000 failure_diag_bad_ptr_str +80008e90 l .text.rvtest 00000000 trap_report_offset_mismatch +80019467 l .data 00000000 trap_diag_header_str +80019493 l .data 00000000 trap_diag_origstr_label +80009910 l .text.rvtest 00000000 trap_report_generic +800091cc l .text.rvtest 00000000 trap_report_field_mismatch +800194a3 l .data 00000000 trap_diag_expected_offset_str +800194ce l .data 00000000 trap_diag_actual_offset_str +800090ac l .text.rvtest 00000000 trap_report_missing_traps +80008f9c l .text.rvtest 00000000 trap_report_extra_traps +800194fd l .data 00000000 trap_diag_extra_traps_str +80019565 l .data 00000000 trap_diag_diff_bytes_str +8001958c l .data 00000000 trap_diag_extra_next_step_str +80019529 l .data 00000000 trap_diag_missing_traps_str +80019674 l .data 00000000 trap_diag_missing_next_step_str +8001975b l .data 00000000 trap_diag_handler_mode_str +80009264 l .text.rvtest 00000000 trap_mode_m +800092a4 l .text.rvtest 00000000 trap_mode_s +800092e4 l .text.rvtest 00000000 trap_mode_h +80009324 l .text.rvtest 00000000 trap_mode_v +80019797 l .data 00000000 trap_diag_mode_unknown_str +80009360 l .text.rvtest 00000000 trap_mode_print +80019775 l .data 00000000 trap_diag_mode_m_str +8001977d l .data 00000000 trap_diag_mode_s_str +80019785 l .data 00000000 trap_diag_mode_hs_str +8001978e l .data 00000000 trap_diag_mode_vs_str +800197a0 l .data 00000000 trap_diag_field_str +80009424 l .text.rvtest 00000000 trap_field_vect +80009464 l .text.rvtest 00000000 trap_field_cause +800094a4 l .text.rvtest 00000000 trap_field_epc +800094e4 l .text.rvtest 00000000 trap_field_tval +80009524 l .text.rvtest 00000000 trap_field_ip +80009564 l .text.rvtest 00000000 trap_field_tval2 +800095a4 l .text.rvtest 00000000 trap_field_tinst +800095e4 l .text.rvtest 00000000 trap_field_intid +800198f7 l .data 00000000 trap_diag_field_unknown_str +80009620 l .text.rvtest 00000000 trap_field_print +800197ba l .data 00000000 trap_diag_field_vect_str +800197eb l .data 00000000 trap_diag_field_cause_str +8001980b l .data 00000000 trap_diag_field_epc_str +80019829 l .data 00000000 trap_diag_field_tval_str +80019848 l .data 00000000 trap_diag_field_ip_str +80019870 l .data 00000000 trap_diag_field_tval2_str +8001989c l .data 00000000 trap_diag_field_tinst_str +800198c8 l .data 00000000 trap_diag_field_intid_str +80019906 l .data 00000000 trap_diag_expected_str +8001991d l .data 00000000 trap_diag_actual_str +800097bc l .text.rvtest 00000000 trap_field_not_cause +80019934 l .data 00000000 trap_diag_expected_cause_name_str +800099f4 l .text.rvtest 00000000 trap_cause_to_str +8001994b l .data 00000000 trap_diag_actual_cause_name_str +800097bc l .text.rvtest 00000000 trap_field_not_epc +80009ad0 l .text.rvtest 00000000 failedtest_print_csr_context +800199c1 l .data 00000000 trap_diag_hint_vect_str +80019a97 l .data 00000000 trap_diag_hint_cause_str +80019b8a l .data 00000000 trap_diag_hint_epc_str +80019c85 l .data 00000000 trap_diag_hint_tval_str +80019d6c l .data 00000000 trap_diag_hint_ip_str +80019979 l .data 00000000 trap_diag_generic_str +80018962 l .data 00000000 xepcinstrstr +80009a18 l .text.rvtest 00000000 trap_cause_interrupt +800099f8 l .text.rvtest 00000000 trap_cause_exception +80009a44 l .text.rvtest 00000000 trap_cause_unknown +800182e0 l .data 00000000 trap_excpt_name_tbl +80018340 l .data 00000000 trap_int_name_tbl +8001877e l .data 00000000 trap_cause_unknown_str +80009ac8 l .text.rvtest 00000000 failedtest_terminate +80018290 l .data 00000000 csr_context_ret_addr +80018983 l .data 00000000 mepcstr +80018993 l .data 00000000 mcausestr +800182a0 l .data 00000000 saved_xcause +800189a3 l .data 00000000 mtvalstr +800182a8 l .data 00000000 saved_xtval +800189b3 l .data 00000000 mstatusstr +800182b0 l .data 00000000 saved_xstatus +80009d18 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80009d34 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80009d38 l .text.rvtest 00000000 failedtest_hex_to_str_write +8002a0e4 l .text.rvmodel 00000000 uart_init +8002a0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8002a120 l .text.rvmodel 00000000 init_Mscratch +8002a128 l .text.rvmodel 00000000 init_Mtimecmp +8002a13c l .text.rvmodel 00000000 init_Medeleg +8002a144 l .text.rvmodel 00000000 init_Msatp +8002a144 l .text.rvmodel 00000000 init_Mtvec +8002a264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8002a224 l .text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +80019ea0 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +80019443 l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +800182e0 l .data 00000000 end_failure_scratch +80018380 l .data 00000000 trap_excpt_name_0 +800183a0 l .data 00000000 trap_excpt_name_1 +800183ba l .data 00000000 trap_excpt_name_2 +800183cf l .data 00000000 trap_excpt_name_3 +800183db l .data 00000000 trap_excpt_name_4 +800183f4 l .data 00000000 trap_excpt_name_5 +80018407 l .data 00000000 trap_excpt_name_6 +80018425 l .data 00000000 trap_excpt_name_7 +8001843d l .data 00000000 trap_excpt_name_8 +8001845b l .data 00000000 trap_excpt_name_9 +80018479 l .data 00000000 trap_excpt_name_10 +80018498 l .data 00000000 trap_excpt_name_11 +800184b6 l .data 00000000 trap_excpt_name_12 +800184ce l .data 00000000 trap_excpt_name_13 +800184df l .data 00000000 trap_excpt_name_14 +800184ee l .data 00000000 trap_excpt_name_15 +80018504 l .data 00000000 trap_excpt_name_16 +80018511 l .data 00000000 trap_excpt_name_17 +80018520 l .data 00000000 trap_excpt_name_18 +80018530 l .data 00000000 trap_excpt_name_19 +80018540 l .data 00000000 trap_excpt_name_20 +8001855e l .data 00000000 trap_excpt_name_21 +80018575 l .data 00000000 trap_excpt_name_22 +8001858a l .data 00000000 trap_excpt_name_23 +800185a6 l .data 00000000 trap_int_name_0 +800185be l .data 00000000 trap_int_name_1 +800185dd l .data 00000000 trap_int_name_2 +80018604 l .data 00000000 trap_int_name_3 +80018620 l .data 00000000 trap_int_name_4 +80018638 l .data 00000000 trap_int_name_5 +80018654 l .data 00000000 trap_int_name_6 +80018678 l .data 00000000 trap_int_name_7 +80018691 l .data 00000000 trap_int_name_8 +800186a9 l .data 00000000 trap_int_name_9 +800186c8 l .data 00000000 trap_int_name_10 +800186ef l .data 00000000 trap_int_name_11 +8001870b l .data 00000000 trap_int_name_12 +80018730 l .data 00000000 trap_int_name_13 +8001874c l .data 00000000 trap_int_name_14 +80018765 l .data 00000000 trap_int_name_15 +8001892f l .data 00000000 xepcstr +80018fcd l .data 00000000 Mclr_Vext_int_str +80019027 l .data 00000000 Sclr_Mext_int_str +800190c8 l .data 00000000 Sclr_Vext_int_str +80019122 l .data 00000000 Hclr_Mext_int_str +800191c5 l .data 00000000 Hclr_Vext_int_str +80019220 l .data 00000000 Vclr_Mext_int_str +80019270 l .data 00000000 Vclr_Sext_int_str +800192c3 l .data 00000000 Vclr_Vext_int_str +80019962 l .data 00000000 trap_diag_curr_xepc_str +80029370 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80029370 g .data 00000000 rvtest_sig_end +80007658 g .text.rvtest 00000000 common_Mentry +80007198 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80019ea0 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +80007140 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80019ea0 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +80019e95 g .data 00000000 rvtest_data_end +80007140 g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029500 g .tohost 00000000 fromhost +80029400 g .tohost 00000000 tohost +800073f0 g .text.rvtest 00000000 rvtest_fail_summary +80007480 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd48b140f +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x58472ec9 +80000048: 0001a783 lw x15,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zkne_aes32esi_cg_cp_rs1_b0: + aes32esi x6, x0, x15, 0 # perform operation +80000050: 22f00333 aes32esi x6,x0,x15,0x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes32esi_cg_cp_rs1_b0, Zkne_aes32esi_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00620863 beq x4,x6,80000068 +8000005c: 164082ef jal x5,800081c0 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x70596aea +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xd3ec9280 +80000074: 0001a803 lw x16,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zkne_aes32esi_cg_cp_rs1_b1: + aes32esi x7, x1, x16, 3 # perform operation +8000007c: e30083b3 aes32esi x7,x1,x16,0x3 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zkne_aes32esi_cg_cp_rs1_b1, Zkne_aes32esi_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00720863 beq x4,x7,80000094 +80000088: 138082ef jal x5,800081c0 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d845 .word 0x8000d845 +80000094: 00410113 addi x2,x2,4 + + mv x10, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010513 addi x10,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc2138a82 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x74c2659e +800000a4: 0001a083 lw x1,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zkne_aes32esi_cg_cp_rs1_b2: + aes32esi x25, x2, x1, 2 # perform operation +800000ac: a2110cb3 aes32esi x25,x2,x1,0x2 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zkne_aes32esi_cg_cp_rs1_b2, Zkne_aes32esi_cg_cp_rs1_b2_str) +800000b0: 00052203 lw x4,0(x10) +800000b4: 01920863 beq x4,x25,800000c4 +800000b8: 108082ef jal x5,800081c0 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d87a .word 0x8000d87a +800000c4: 00450513 addi x10,x10,4 + + mv x30, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018f13 addi x30,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x79f5c256 +800000cc: 000f2183 lw x3,0(x30) +800000d0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x03129cdf +800000d4: 000f2d03 lw x26,0(x30) +800000d8: 004f0f13 addi x30,x30,4 + +800000dc : +Zkne_aes32esi_cg_cp_rs1_b3: + aes32esi x24, x3, x26, 0 # perform operation +800000dc: 23a18c33 aes32esi x24,x3,x26,0x0 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zkne_aes32esi_cg_cp_rs1_b3, Zkne_aes32esi_cg_cp_rs1_b3_str) +800000e0: 00052203 lw x4,0(x10) +800000e4: 01820863 beq x4,x24,800000f4 +800000e8: 0d8082ef jal x5,800081c0 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8af .word 0x8000d8af +800000f4: 00450513 addi x10,x10,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0x8b7698e3 +80000100: 000f2203 lw x4,0(x30) +80000104: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x43cd0882 +80000108: 000f2c03 lw x24,0(x30) +8000010c: 004f0f13 addi x30,x30,4 + +80000110 : +Zkne_aes32esi_cg_cp_rs1_b4: + aes32esi x12, x4, x24, 2 # perform operation +80000110: a3820633 aes32esi x12,x4,x24,0x2 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zkne_aes32esi_cg_cp_rs1_b4, Zkne_aes32esi_cg_cp_rs1_b4_str) +80000114: 00052383 lw x7,0(x10) +80000118: 00c38863 beq x7,x12,80000128 +8000011c: 0bc0846f jal x8,800081d8 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8e4 .word 0x8000d8e4 +80000128: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0x2560b401 +8000012c: 000f2283 lw x5,0(x30) +80000130: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x50a39eeb +80000134: 000f2803 lw x16,0(x30) +80000138: 004f0f13 addi x30,x30,4 + +8000013c : +Zkne_aes32esi_cg_cp_rs1_b5: + aes32esi x19, x5, x16, 0 # perform operation +8000013c: 230289b3 aes32esi x19,x5,x16,0x0 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zkne_aes32esi_cg_cp_rs1_b5, Zkne_aes32esi_cg_cp_rs1_b5_str) +80000140: 00052383 lw x7,0(x10) +80000144: 01338863 beq x7,x19,80000154 +80000148: 0900846f jal x8,800081d8 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d919 .word 0x8000d919 +80000154: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x88b0d35e +80000158: 000f2303 lw x6,0(x30) +8000015c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xd7443e2a +80000160: 000f2d03 lw x26,0(x30) +80000164: 004f0f13 addi x30,x30,4 + +80000168 : +Zkne_aes32esi_cg_cp_rs1_b6: + aes32esi x18, x6, x26, 3 # perform operation +80000168: e3a30933 aes32esi x18,x6,x26,0x3 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zkne_aes32esi_cg_cp_rs1_b6, Zkne_aes32esi_cg_cp_rs1_b6_str) +8000016c: 00052383 lw x7,0(x10) +80000170: 01238863 beq x7,x18,80000180 +80000174: 0640846f jal x8,800081d8 +80000178: 80000168 .word 0x80000168 +8000017c: 8000d94e .word 0x8000d94e +80000180: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x64851c77 +8000018c: 000f2383 lw x7,0(x30) +80000190: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs2: x31 = 0xcea59ecf +80000194: 000f2f83 lw x31,0(x30) +80000198: 004f0f13 addi x30,x30,4 + +8000019c : +Zkne_aes32esi_cg_cp_rs1_b7: + aes32esi x19, x7, x31, 3 # perform operation +8000019c: e3f389b3 aes32esi x19,x7,x31,0x3 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zkne_aes32esi_cg_cp_rs1_b7, Zkne_aes32esi_cg_cp_rs1_b7_str) +800001a0: 00052203 lw x4,0(x10) +800001a4: 01320863 beq x4,x19,800001b4 +800001a8: 018082ef jal x5,800081c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000d983 .word 0x8000d983 +800001b4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x7e1db1b0 +800001b8: 000f2403 lw x8,0(x30) +800001bc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0x0537deda +800001c0: 000f2003 lw x0,0(x30) +800001c4: 004f0f13 addi x30,x30,4 + +800001c8 : +Zkne_aes32esi_cg_cp_rs1_b8: + aes32esi x28, x8, x0, 3 # perform operation +800001c8: e2040e33 aes32esi x28,x8,x0,0x3 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zkne_aes32esi_cg_cp_rs1_b8, Zkne_aes32esi_cg_cp_rs1_b8_str) +800001cc: 00052203 lw x4,0(x10) +800001d0: 01c20863 beq x4,x28,800001e0 +800001d4: 7ed072ef jal x5,800081c0 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 8000d9b8 .word 0x8000d9b8 +800001e0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0xa5eee28f +800001e4: 000f2483 lw x9,0(x30) +800001e8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x62221ce6 +800001ec: 000f2983 lw x19,0(x30) +800001f0: 004f0f13 addi x30,x30,4 + +800001f4 : +Zkne_aes32esi_cg_cp_rs1_b9: + aes32esi x15, x9, x19, 3 # perform operation +800001f4: e33487b3 aes32esi x15,x9,x19,0x3 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zkne_aes32esi_cg_cp_rs1_b9, Zkne_aes32esi_cg_cp_rs1_b9_str) +800001f8: 00052203 lw x4,0(x10) +800001fc: 00f20863 beq x4,x15,8000020c +80000200: 7c1072ef jal x5,800081c0 +80000204: 800001f4 .word 0x800001f4 +80000208: 8000d9ed .word 0x8000d9ed +8000020c: 00450513 addi x10,x10,4 + + mv x31, x10 # switch signature pointer register to avoid conflict with test +80000210: 00050f93 addi x31,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x7c7df035 +80000214: 000f2503 lw x10,0(x30) +80000218: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xc3979c29 +8000021c: 000f2d03 lw x26,0(x30) +80000220: 004f0f13 addi x30,x30,4 + +80000224 : +Zkne_aes32esi_cg_cp_rs1_b10: + aes32esi x3, x10, x26, 2 # perform operation +80000224: a3a501b3 aes32esi x3,x10,x26,0x2 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zkne_aes32esi_cg_cp_rs1_b10, Zkne_aes32esi_cg_cp_rs1_b10_str) +80000228: 000fa203 lw x4,0(x31) +8000022c: 00320863 beq x4,x3,8000023c +80000230: 791072ef jal x5,800081c0 +80000234: 80000224 .word 0x80000224 +80000238: 8000da23 .word 0x8000da23 +8000023c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x0c390def +80000240: 000f2583 lw x11,0(x30) +80000244: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x0ddf7a19 +80000248: 000f2a03 lw x20,0(x30) +8000024c: 004f0f13 addi x30,x30,4 + +80000250 : +Zkne_aes32esi_cg_cp_rs1_b11: + aes32esi x6, x11, x20, 1 # perform operation +80000250: 63458333 aes32esi x6,x11,x20,0x1 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zkne_aes32esi_cg_cp_rs1_b11, Zkne_aes32esi_cg_cp_rs1_b11_str) +80000254: 000fa203 lw x4,0(x31) +80000258: 00620863 beq x4,x6,80000268 +8000025c: 765072ef jal x5,800081c0 +80000260: 80000250 .word 0x80000250 +80000264: 8000da5a .word 0x8000da5a +80000268: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x7dd86445 +8000026c: 000f2603 lw x12,0(x30) +80000270: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x5fd77190 +80000274: 000f2703 lw x14,0(x30) +80000278: 004f0f13 addi x30,x30,4 + +8000027c : +Zkne_aes32esi_cg_cp_rs1_b12: + aes32esi x29, x12, x14, 1 # perform operation +8000027c: 62e60eb3 aes32esi x29,x12,x14,0x1 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zkne_aes32esi_cg_cp_rs1_b12, Zkne_aes32esi_cg_cp_rs1_b12_str) +80000280: 000fa203 lw x4,0(x31) +80000284: 01d20863 beq x4,x29,80000294 +80000288: 739072ef jal x5,800081c0 +8000028c: 8000027c .word 0x8000027c +80000290: 8000da91 .word 0x8000da91 +80000294: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x021e72da +80000298: 000f2683 lw x13,0(x30) +8000029c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0xa061485f +800002a0: 000f2403 lw x8,0(x30) +800002a4: 004f0f13 addi x30,x30,4 + +800002a8 : +Zkne_aes32esi_cg_cp_rs1_b13: + aes32esi x17, x13, x8, 0 # perform operation +800002a8: 228688b3 aes32esi x17,x13,x8,0x0 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zkne_aes32esi_cg_cp_rs1_b13, Zkne_aes32esi_cg_cp_rs1_b13_str) +800002ac: 000fa203 lw x4,0(x31) +800002b0: 01120863 beq x4,x17,800002c0 +800002b4: 70d072ef jal x5,800081c0 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 8000dac8 .word 0x8000dac8 +800002c0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x70910f5a +800002c4: 000f2703 lw x14,0(x30) +800002c8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0xe6c14b23 +800002cc: 000f2183 lw x3,0(x30) +800002d0: 004f0f13 addi x30,x30,4 + +800002d4 : +Zkne_aes32esi_cg_cp_rs1_b14: + aes32esi x29, x14, x3, 0 # perform operation +800002d4: 22370eb3 aes32esi x29,x14,x3,0x0 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zkne_aes32esi_cg_cp_rs1_b14, Zkne_aes32esi_cg_cp_rs1_b14_str) +800002d8: 000fa203 lw x4,0(x31) +800002dc: 01d20863 beq x4,x29,800002ec +800002e0: 6e1072ef jal x5,800081c0 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 8000daff .word 0x8000daff +800002ec: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x6ed00762 +800002f0: 000f2783 lw x15,0(x30) +800002f4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x91df699d +800002f8: 000f2d83 lw x27,0(x30) +800002fc: 004f0f13 addi x30,x30,4 + +80000300 : +Zkne_aes32esi_cg_cp_rs1_b15: + aes32esi x18, x15, x27, 2 # perform operation +80000300: a3b78933 aes32esi x18,x15,x27,0x2 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zkne_aes32esi_cg_cp_rs1_b15, Zkne_aes32esi_cg_cp_rs1_b15_str) +80000304: 000fa203 lw x4,0(x31) +80000308: 01220863 beq x4,x18,80000318 +8000030c: 6b5072ef jal x5,800081c0 +80000310: 80000300 .word 0x80000300 +80000314: 8000db36 .word 0x8000db36 +80000318: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x461d2ae9 +8000031c: 000f2803 lw x16,0(x30) +80000320: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x19087597 +80000324: 000f2783 lw x15,0(x30) +80000328: 004f0f13 addi x30,x30,4 + +8000032c : +Zkne_aes32esi_cg_cp_rs1_b16: + aes32esi x28, x16, x15, 3 # perform operation +8000032c: e2f80e33 aes32esi x28,x16,x15,0x3 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zkne_aes32esi_cg_cp_rs1_b16, Zkne_aes32esi_cg_cp_rs1_b16_str) +80000330: 000fa203 lw x4,0(x31) +80000334: 01c20863 beq x4,x28,80000344 +80000338: 689072ef jal x5,800081c0 +8000033c: 8000032c .word 0x8000032c +80000340: 8000db6d .word 0x8000db6d +80000344: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x9b17c241 +80000348: 000f2883 lw x17,0(x30) +8000034c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x76abc59f +80000350: 000f2e03 lw x28,0(x30) +80000354: 004f0f13 addi x30,x30,4 + +80000358 : +Zkne_aes32esi_cg_cp_rs1_b17: + aes32esi x22, x17, x28, 0 # perform operation +80000358: 23c88b33 aes32esi x22,x17,x28,0x0 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zkne_aes32esi_cg_cp_rs1_b17, Zkne_aes32esi_cg_cp_rs1_b17_str) +8000035c: 000fa203 lw x4,0(x31) +80000360: 01620863 beq x4,x22,80000370 +80000364: 65d072ef jal x5,800081c0 +80000368: 80000358 .word 0x80000358 +8000036c: 8000dba4 .word 0x8000dba4 +80000370: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x1e2d04c0 +80000374: 000f2903 lw x18,0(x30) +80000378: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0xfddd6676 +8000037c: 000f2783 lw x15,0(x30) +80000380: 004f0f13 addi x30,x30,4 + +80000384 : +Zkne_aes32esi_cg_cp_rs1_b18: + aes32esi x19, x18, x15, 0 # perform operation +80000384: 22f909b3 aes32esi x19,x18,x15,0x0 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zkne_aes32esi_cg_cp_rs1_b18, Zkne_aes32esi_cg_cp_rs1_b18_str) +80000388: 000fa203 lw x4,0(x31) +8000038c: 01320863 beq x4,x19,8000039c +80000390: 631072ef jal x5,800081c0 +80000394: 80000384 .word 0x80000384 +80000398: 8000dbdb .word 0x8000dbdb +8000039c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xa4949547 +800003a0: 000f2983 lw x19,0(x30) +800003a4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x80399820 +800003a8: 000f2a83 lw x21,0(x30) +800003ac: 004f0f13 addi x30,x30,4 + +800003b0 : +Zkne_aes32esi_cg_cp_rs1_b19: + aes32esi x14, x19, x21, 2 # perform operation +800003b0: a3598733 aes32esi x14,x19,x21,0x2 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zkne_aes32esi_cg_cp_rs1_b19, Zkne_aes32esi_cg_cp_rs1_b19_str) +800003b4: 000fa203 lw x4,0(x31) +800003b8: 00e20863 beq x4,x14,800003c8 +800003bc: 605072ef jal x5,800081c0 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000dc12 .word 0x8000dc12 +800003c8: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x32a7d5d5 +800003cc: 000f2a03 lw x20,0(x30) +800003d0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xecf55283 +800003d4: 000f2883 lw x17,0(x30) +800003d8: 004f0f13 addi x30,x30,4 + +800003dc : +Zkne_aes32esi_cg_cp_rs1_b20: + aes32esi x22, x20, x17, 1 # perform operation +800003dc: 631a0b33 aes32esi x22,x20,x17,0x1 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zkne_aes32esi_cg_cp_rs1_b20, Zkne_aes32esi_cg_cp_rs1_b20_str) +800003e0: 000fa203 lw x4,0(x31) +800003e4: 01620863 beq x4,x22,800003f4 +800003e8: 5d9072ef jal x5,800081c0 +800003ec: 800003dc .word 0x800003dc +800003f0: 8000dc49 .word 0x8000dc49 +800003f4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xb8e8f3db +800003f8: 000f2a83 lw x21,0(x30) +800003fc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0x85131d2c +80000400: 000f2103 lw x2,0(x30) +80000404: 004f0f13 addi x30,x30,4 + +80000408 : +Zkne_aes32esi_cg_cp_rs1_b21: + aes32esi x12, x21, x2, 3 # perform operation +80000408: e22a8633 aes32esi x12,x21,x2,0x3 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zkne_aes32esi_cg_cp_rs1_b21, Zkne_aes32esi_cg_cp_rs1_b21_str) +8000040c: 000fa203 lw x4,0(x31) +80000410: 00c20863 beq x4,x12,80000420 +80000414: 5ad072ef jal x5,800081c0 +80000418: 80000408 .word 0x80000408 +8000041c: 8000dc80 .word 0x8000dc80 +80000420: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x60aff44a +80000424: 000f2b03 lw x22,0(x30) +80000428: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xc47de3ef +8000042c: 000f2e83 lw x29,0(x30) +80000430: 004f0f13 addi x30,x30,4 + +80000434 : +Zkne_aes32esi_cg_cp_rs1_b22: + aes32esi x19, x22, x29, 3 # perform operation +80000434: e3db09b3 aes32esi x19,x22,x29,0x3 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zkne_aes32esi_cg_cp_rs1_b22, Zkne_aes32esi_cg_cp_rs1_b22_str) +80000438: 000fa203 lw x4,0(x31) +8000043c: 01320863 beq x4,x19,8000044c +80000440: 581072ef jal x5,800081c0 +80000444: 80000434 .word 0x80000434 +80000448: 8000dcb7 .word 0x8000dcb7 +8000044c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x2367cae9 +80000450: 000f2b83 lw x23,0(x30) +80000454: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x1661b64d +80000458: 000f2b03 lw x22,0(x30) +8000045c: 004f0f13 addi x30,x30,4 + +80000460 : +Zkne_aes32esi_cg_cp_rs1_b23: + aes32esi x24, x23, x22, 1 # perform operation +80000460: 636b8c33 aes32esi x24,x23,x22,0x1 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zkne_aes32esi_cg_cp_rs1_b23, Zkne_aes32esi_cg_cp_rs1_b23_str) +80000464: 000fa203 lw x4,0(x31) +80000468: 01820863 beq x4,x24,80000478 +8000046c: 555072ef jal x5,800081c0 +80000470: 80000460 .word 0x80000460 +80000474: 8000dcee .word 0x8000dcee +80000478: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x75c68779 +8000047c: 000f2c03 lw x24,0(x30) +80000480: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x30982910 +80000484: 000f2b03 lw x22,0(x30) +80000488: 004f0f13 addi x30,x30,4 + +8000048c : +Zkne_aes32esi_cg_cp_rs1_b24: + aes32esi x2, x24, x22, 3 # perform operation +8000048c: e36c0133 aes32esi x2,x24,x22,0x3 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zkne_aes32esi_cg_cp_rs1_b24, Zkne_aes32esi_cg_cp_rs1_b24_str) +80000490: 000fa203 lw x4,0(x31) +80000494: 00220863 beq x4,x2,800004a4 +80000498: 529072ef jal x5,800081c0 +8000049c: 8000048c .word 0x8000048c +800004a0: 8000dd25 .word 0x8000dd25 +800004a4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xf7f65c4d +800004a8: 000f2c83 lw x25,0(x30) +800004ac: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0xef5cef04 +800004b0: 000f2003 lw x0,0(x30) +800004b4: 004f0f13 addi x30,x30,4 + +800004b8 : +Zkne_aes32esi_cg_cp_rs1_b25: + aes32esi x14, x25, x0, 1 # perform operation +800004b8: 620c8733 aes32esi x14,x25,x0,0x1 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zkne_aes32esi_cg_cp_rs1_b25, Zkne_aes32esi_cg_cp_rs1_b25_str) +800004bc: 000fa203 lw x4,0(x31) +800004c0: 00e20863 beq x4,x14,800004d0 +800004c4: 4fd072ef jal x5,800081c0 +800004c8: 800004b8 .word 0x800004b8 +800004cc: 8000dd5c .word 0x8000dd5c +800004d0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x2ac7cedd +800004d4: 000f2d03 lw x26,0(x30) +800004d8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xe464e94f +800004dc: 000f2503 lw x10,0(x30) +800004e0: 004f0f13 addi x30,x30,4 + +800004e4 : +Zkne_aes32esi_cg_cp_rs1_b26: + aes32esi x1, x26, x10, 3 # perform operation +800004e4: e2ad00b3 aes32esi x1,x26,x10,0x3 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zkne_aes32esi_cg_cp_rs1_b26, Zkne_aes32esi_cg_cp_rs1_b26_str) +800004e8: 000fa203 lw x4,0(x31) +800004ec: 00120863 beq x4,x1,800004fc +800004f0: 4d1072ef jal x5,800081c0 +800004f4: 800004e4 .word 0x800004e4 +800004f8: 8000dd93 .word 0x8000dd93 +800004fc: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x34268bf3 +80000500: 000f2d83 lw x27,0(x30) +80000504: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0x69c2b916 +80000508: 000f2303 lw x6,0(x30) +8000050c: 004f0f13 addi x30,x30,4 + +80000510 : +Zkne_aes32esi_cg_cp_rs1_b27: + aes32esi x18, x27, x6, 2 # perform operation +80000510: a26d8933 aes32esi x18,x27,x6,0x2 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zkne_aes32esi_cg_cp_rs1_b27, Zkne_aes32esi_cg_cp_rs1_b27_str) +80000514: 000fa203 lw x4,0(x31) +80000518: 01220863 beq x4,x18,80000528 +8000051c: 4a5072ef jal x5,800081c0 +80000520: 80000510 .word 0x80000510 +80000524: 8000ddca .word 0x8000ddca +80000528: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xf5b3cdbb +8000052c: 000f2e03 lw x28,0(x30) +80000530: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x006c5744 +80000534: 000f2983 lw x19,0(x30) +80000538: 004f0f13 addi x30,x30,4 + +8000053c : +Zkne_aes32esi_cg_cp_rs1_b28: + aes32esi x16, x28, x19, 3 # perform operation +8000053c: e33e0833 aes32esi x16,x28,x19,0x3 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zkne_aes32esi_cg_cp_rs1_b28, Zkne_aes32esi_cg_cp_rs1_b28_str) +80000540: 000fa203 lw x4,0(x31) +80000544: 01020863 beq x4,x16,80000554 +80000548: 479072ef jal x5,800081c0 +8000054c: 8000053c .word 0x8000053c +80000550: 8000de01 .word 0x8000de01 +80000554: 004f8f93 addi x31,x31,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x4bba596d +80000558: 000f2e83 lw x29,0(x30) +8000055c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x025ceb1d +80000560: 000f2c83 lw x25,0(x30) +80000564: 004f0f13 addi x30,x30,4 + +80000568 : +Zkne_aes32esi_cg_cp_rs1_b29: + aes32esi x28, x29, x25, 0 # perform operation +80000568: 239e8e33 aes32esi x28,x29,x25,0x0 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zkne_aes32esi_cg_cp_rs1_b29, Zkne_aes32esi_cg_cp_rs1_b29_str) +8000056c: 000fa203 lw x4,0(x31) +80000570: 01c20863 beq x4,x28,80000580 +80000574: 44d072ef jal x5,800081c0 +80000578: 80000568 .word 0x80000568 +8000057c: 8000de38 .word 0x8000de38 +80000580: 004f8f93 addi x31,x31,4 + + mv x10, x30 # switch data pointer register to avoid conflict with test +80000584: 000f0513 addi x10,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x23d3b544 +80000588: 00052f03 lw x30,0(x10) +8000058c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xcf4b2611 +80000590: 00052d03 lw x26,0(x10) +80000594: 00450513 addi x10,x10,4 + +80000598 : +Zkne_aes32esi_cg_cp_rs1_b30: + aes32esi x3, x30, x26, 2 # perform operation +80000598: a3af01b3 aes32esi x3,x30,x26,0x2 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zkne_aes32esi_cg_cp_rs1_b30, Zkne_aes32esi_cg_cp_rs1_b30_str) +8000059c: 000fa203 lw x4,0(x31) +800005a0: 00320863 beq x4,x3,800005b0 +800005a4: 41d072ef jal x5,800081c0 +800005a8: 80000598 .word 0x80000598 +800005ac: 8000de6f .word 0x8000de6f +800005b0: 004f8f93 addi x31,x31,4 + + mv x23, x31 # switch signature pointer register to avoid conflict with test +800005b4: 000f8b93 addi x23,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xdff83197 +800005b8: 00052f83 lw x31,0(x10) +800005bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xafe3bf85 +800005c0: 00052803 lw x16,0(x10) +800005c4: 00450513 addi x10,x10,4 + +800005c8 : +Zkne_aes32esi_cg_cp_rs1_b31: + aes32esi x13, x31, x16, 1 # perform operation +800005c8: 630f86b3 aes32esi x13,x31,x16,0x1 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes32esi_cg_cp_rs1_b31, Zkne_aes32esi_cg_cp_rs1_b31_str) +800005cc: 000ba203 lw x4,0(x23) +800005d0: 00d20863 beq x4,x13,800005e0 +800005d4: 3ed072ef jal x5,800081c0 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 8000dea6 .word 0x8000dea6 +800005e0: 004b8b93 addi x23,x23,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x9af53f2b +800005e4: 00052f83 lw x31,0(x10) +800005e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x681afd5c +800005ec: 00052003 lw x0,0(x10) +800005f0: 00450513 addi x10,x10,4 + +800005f4 : +Zkne_aes32esi_cg_cp_rs2_b0: + aes32esi x20, x31, x0, 2 # perform operation +800005f4: a20f8a33 aes32esi x20,x31,x0,0x2 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes32esi_cg_cp_rs2_b0, Zkne_aes32esi_cg_cp_rs2_b0_str) +800005f8: 000ba203 lw x4,0(x23) +800005fc: 01420863 beq x4,x20,8000060c +80000600: 3c1072ef jal x5,800081c0 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000dedd .word 0x8000dedd +8000060c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x70567bc6 +80000610: 00052c83 lw x25,0(x10) +80000614: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x3b570b4c +80000618: 00052083 lw x1,0(x10) +8000061c: 00450513 addi x10,x10,4 + +80000620 : +Zkne_aes32esi_cg_cp_rs2_b1: + aes32esi x17, x25, x1, 0 # perform operation +80000620: 221c88b3 aes32esi x17,x25,x1,0x0 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes32esi_cg_cp_rs2_b1, Zkne_aes32esi_cg_cp_rs2_b1_str) +80000624: 000ba203 lw x4,0(x23) +80000628: 01120863 beq x4,x17,80000638 +8000062c: 395072ef jal x5,800081c0 +80000630: 80000620 .word 0x80000620 +80000634: 8000df13 .word 0x8000df13 +80000638: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfb40e0da +8000063c: 00052a83 lw x21,0(x10) +80000640: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x26f9636d +80000644: 00052103 lw x2,0(x10) +80000648: 00450513 addi x10,x10,4 + +8000064c : +Zkne_aes32esi_cg_cp_rs2_b2: + aes32esi x16, x21, x2, 2 # perform operation +8000064c: a22a8833 aes32esi x16,x21,x2,0x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes32esi_cg_cp_rs2_b2, Zkne_aes32esi_cg_cp_rs2_b2_str) +80000650: 000ba203 lw x4,0(x23) +80000654: 01020863 beq x4,x16,80000664 +80000658: 369072ef jal x5,800081c0 +8000065c: 8000064c .word 0x8000064c +80000660: 8000df49 .word 0x8000df49 +80000664: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x66cfa9a0 +80000668: 00052e03 lw x28,0(x10) +8000066c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xa69a5c03 +80000670: 00052183 lw x3,0(x10) +80000674: 00450513 addi x10,x10,4 + +80000678 : +Zkne_aes32esi_cg_cp_rs2_b3: + aes32esi x9, x28, x3, 2 # perform operation +80000678: a23e04b3 aes32esi x9,x28,x3,0x2 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes32esi_cg_cp_rs2_b3, Zkne_aes32esi_cg_cp_rs2_b3_str) +8000067c: 000ba203 lw x4,0(x23) +80000680: 00920863 beq x4,x9,80000690 +80000684: 33d072ef jal x5,800081c0 +80000688: 80000678 .word 0x80000678 +8000068c: 8000df7f .word 0x8000df7f +80000690: 004b8b93 addi x23,x23,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000694: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000698: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x3c337385 +8000069c: 00052703 lw x14,0(x10) +800006a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x45ace1a4 +800006a4: 00052203 lw x4,0(x10) +800006a8: 00450513 addi x10,x10,4 + +800006ac : +Zkne_aes32esi_cg_cp_rs2_b4: + aes32esi x21, x14, x4, 3 # perform operation +800006ac: e2470ab3 aes32esi x21,x14,x4,0x3 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zkne_aes32esi_cg_cp_rs2_b4, Zkne_aes32esi_cg_cp_rs2_b4_str) +800006b0: 000ba383 lw x7,0(x23) +800006b4: 01538863 beq x7,x21,800006c4 +800006b8: 3210746f jal x8,800081d8 +800006bc: 800006ac .word 0x800006ac +800006c0: 8000dfb5 .word 0x8000dfb5 +800006c4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x3bbca5ce +800006c8: 00052f03 lw x30,0(x10) +800006cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x4b23fa72 +800006d0: 00052283 lw x5,0(x10) +800006d4: 00450513 addi x10,x10,4 + +800006d8 : +Zkne_aes32esi_cg_cp_rs2_b5: + aes32esi x27, x30, x5, 0 # perform operation +800006d8: 225f0db3 aes32esi x27,x30,x5,0x0 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zkne_aes32esi_cg_cp_rs2_b5, Zkne_aes32esi_cg_cp_rs2_b5_str) +800006dc: 000ba383 lw x7,0(x23) +800006e0: 01b38863 beq x7,x27,800006f0 +800006e4: 2f50746f jal x8,800081d8 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000dfeb .word 0x8000dfeb +800006f0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfd54c74d +800006f4: 00052c03 lw x24,0(x10) +800006f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xe7d503c6 +800006fc: 00052303 lw x6,0(x10) +80000700: 00450513 addi x10,x10,4 + +80000704 : +Zkne_aes32esi_cg_cp_rs2_b6: + aes32esi x3, x24, x6, 3 # perform operation +80000704: e26c01b3 aes32esi x3,x24,x6,0x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zkne_aes32esi_cg_cp_rs2_b6, Zkne_aes32esi_cg_cp_rs2_b6_str) +80000708: 000ba383 lw x7,0(x23) +8000070c: 00338863 beq x7,x3,8000071c +80000710: 2c90746f jal x8,800081d8 +80000714: 80000704 .word 0x80000704 +80000718: 8000e021 .word 0x8000e021 +8000071c: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000724: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x32f7a221 +80000728: 00052583 lw x11,0(x10) +8000072c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0d77ea57 +80000730: 00052383 lw x7,0(x10) +80000734: 00450513 addi x10,x10,4 + +80000738 : +Zkne_aes32esi_cg_cp_rs2_b7: + aes32esi x3, x11, x7, 0 # perform operation +80000738: 227581b3 aes32esi x3,x11,x7,0x0 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes32esi_cg_cp_rs2_b7, Zkne_aes32esi_cg_cp_rs2_b7_str) +8000073c: 000ba203 lw x4,0(x23) +80000740: 00320863 beq x4,x3,80000750 +80000744: 27d072ef jal x5,800081c0 +80000748: 80000738 .word 0x80000738 +8000074c: 8000e057 .word 0x8000e057 +80000750: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xa9e18050 +80000754: 00052a03 lw x20,0(x10) +80000758: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x8248089e +8000075c: 00052403 lw x8,0(x10) +80000760: 00450513 addi x10,x10,4 + +80000764 : +Zkne_aes32esi_cg_cp_rs2_b8: + aes32esi x15, x20, x8, 1 # perform operation +80000764: 628a07b3 aes32esi x15,x20,x8,0x1 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes32esi_cg_cp_rs2_b8, Zkne_aes32esi_cg_cp_rs2_b8_str) +80000768: 000ba203 lw x4,0(x23) +8000076c: 00f20863 beq x4,x15,8000077c +80000770: 251072ef jal x5,800081c0 +80000774: 80000764 .word 0x80000764 +80000778: 8000e08d .word 0x8000e08d +8000077c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x4596ae26 +80000780: 00052f03 lw x30,0(x10) +80000784: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xc9ec16d9 +80000788: 00052483 lw x9,0(x10) +8000078c: 00450513 addi x10,x10,4 + +80000790 : +Zkne_aes32esi_cg_cp_rs2_b9: + aes32esi x7, x30, x9, 0 # perform operation +80000790: 229f03b3 aes32esi x7,x30,x9,0x0 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes32esi_cg_cp_rs2_b9, Zkne_aes32esi_cg_cp_rs2_b9_str) +80000794: 000ba203 lw x4,0(x23) +80000798: 00720863 beq x4,x7,800007a8 +8000079c: 225072ef jal x5,800081c0 +800007a0: 80000790 .word 0x80000790 +800007a4: 8000e0c3 .word 0x8000e0c3 +800007a8: 004b8b93 addi x23,x23,4 + + mv x28, x10 # switch data pointer register to avoid conflict with test +800007ac: 00050e13 addi x28,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs1: x6 = 0xe3537106 +800007b0: 000e2303 lw x6,0(x28) +800007b4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x54aef5b1 +800007b8: 000e2503 lw x10,0(x28) +800007bc: 004e0e13 addi x28,x28,4 + +800007c0 : +Zkne_aes32esi_cg_cp_rs2_b10: + aes32esi x9, x6, x10, 1 # perform operation +800007c0: 62a304b3 aes32esi x9,x6,x10,0x1 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes32esi_cg_cp_rs2_b10, Zkne_aes32esi_cg_cp_rs2_b10_str) +800007c4: 000ba203 lw x4,0(x23) +800007c8: 00920863 beq x4,x9,800007d8 +800007cc: 1f5072ef jal x5,800081c0 +800007d0: 800007c0 .word 0x800007c0 +800007d4: 8000e0f9 .word 0x8000e0f9 +800007d8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xa4c18be8 +800007dc: 000e2c83 lw x25,0(x28) +800007e0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0xe164f481 +800007e4: 000e2583 lw x11,0(x28) +800007e8: 004e0e13 addi x28,x28,4 + +800007ec : +Zkne_aes32esi_cg_cp_rs2_b11: + aes32esi x21, x25, x11, 1 # perform operation +800007ec: 62bc8ab3 aes32esi x21,x25,x11,0x1 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes32esi_cg_cp_rs2_b11, Zkne_aes32esi_cg_cp_rs2_b11_str) +800007f0: 000ba203 lw x4,0(x23) +800007f4: 01520863 beq x4,x21,80000804 +800007f8: 1c9072ef jal x5,800081c0 +800007fc: 800007ec .word 0x800007ec +80000800: 8000e130 .word 0x8000e130 +80000804: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0xe3ba5776 +80000808: 000e2103 lw x2,0(x28) +8000080c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0xece7fdfe +80000810: 000e2603 lw x12,0(x28) +80000814: 004e0e13 addi x28,x28,4 + +80000818 : +Zkne_aes32esi_cg_cp_rs2_b12: + aes32esi x26, x2, x12, 3 # perform operation +80000818: e2c10d33 aes32esi x26,x2,x12,0x3 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes32esi_cg_cp_rs2_b12, Zkne_aes32esi_cg_cp_rs2_b12_str) +8000081c: 000ba203 lw x4,0(x23) +80000820: 01a20863 beq x4,x26,80000830 +80000824: 19d072ef jal x5,800081c0 +80000828: 80000818 .word 0x80000818 +8000082c: 8000e167 .word 0x8000e167 +80000830: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x62a6a9cf +80000834: 000e2183 lw x3,0(x28) +80000838: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0x61d4d350 +8000083c: 000e2683 lw x13,0(x28) +80000840: 004e0e13 addi x28,x28,4 + +80000844 : +Zkne_aes32esi_cg_cp_rs2_b13: + aes32esi x9, x3, x13, 3 # perform operation +80000844: e2d184b3 aes32esi x9,x3,x13,0x3 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes32esi_cg_cp_rs2_b13, Zkne_aes32esi_cg_cp_rs2_b13_str) +80000848: 000ba203 lw x4,0(x23) +8000084c: 00920863 beq x4,x9,8000085c +80000850: 171072ef jal x5,800081c0 +80000854: 80000844 .word 0x80000844 +80000858: 8000e19e .word 0x8000e19e +8000085c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x32d0129c +80000860: 000e2183 lw x3,0(x28) +80000864: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0xec8fad70 +80000868: 000e2703 lw x14,0(x28) +8000086c: 004e0e13 addi x28,x28,4 + +80000870 : +Zkne_aes32esi_cg_cp_rs2_b14: + aes32esi x24, x3, x14, 3 # perform operation +80000870: e2e18c33 aes32esi x24,x3,x14,0x3 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes32esi_cg_cp_rs2_b14, Zkne_aes32esi_cg_cp_rs2_b14_str) +80000874: 000ba203 lw x4,0(x23) +80000878: 01820863 beq x4,x24,80000888 +8000087c: 145072ef jal x5,800081c0 +80000880: 80000870 .word 0x80000870 +80000884: 8000e1d5 .word 0x8000e1d5 +80000888: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0x2aa62ae8 +8000088c: 000e2083 lw x1,0(x28) +80000890: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0x337656c2 +80000894: 000e2783 lw x15,0(x28) +80000898: 004e0e13 addi x28,x28,4 + +8000089c : +Zkne_aes32esi_cg_cp_rs2_b15: + aes32esi x17, x1, x15, 1 # perform operation +8000089c: 62f088b3 aes32esi x17,x1,x15,0x1 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes32esi_cg_cp_rs2_b15, Zkne_aes32esi_cg_cp_rs2_b15_str) +800008a0: 000ba203 lw x4,0(x23) +800008a4: 01120863 beq x4,x17,800008b4 +800008a8: 119072ef jal x5,800081c0 +800008ac: 8000089c .word 0x8000089c +800008b0: 8000e20c .word 0x8000e20c +800008b4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x408c9723 +800008b8: 000e2a83 lw x21,0(x28) +800008bc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xbd47d876 +800008c0: 000e2803 lw x16,0(x28) +800008c4: 004e0e13 addi x28,x28,4 + +800008c8 : +Zkne_aes32esi_cg_cp_rs2_b16: + aes32esi x27, x21, x16, 2 # perform operation +800008c8: a30a8db3 aes32esi x27,x21,x16,0x2 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes32esi_cg_cp_rs2_b16, Zkne_aes32esi_cg_cp_rs2_b16_str) +800008cc: 000ba203 lw x4,0(x23) +800008d0: 01b20863 beq x4,x27,800008e0 +800008d4: 0ed072ef jal x5,800081c0 +800008d8: 800008c8 .word 0x800008c8 +800008dc: 8000e243 .word 0x8000e243 +800008e0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x4c45c878 +800008e4: 000e2983 lw x19,0(x28) +800008e8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x59dd1310 +800008ec: 000e2883 lw x17,0(x28) +800008f0: 004e0e13 addi x28,x28,4 + +800008f4 : +Zkne_aes32esi_cg_cp_rs2_b17: + aes32esi x0, x19, x17, 1 # perform operation +800008f4: 63198033 aes32esi x0,x19,x17,0x1 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zkne_aes32esi_cg_cp_rs2_b17, Zkne_aes32esi_cg_cp_rs2_b17_str) +800008f8: 000ba203 lw x4,0(x23) +800008fc: 00020863 beq x4,x0,8000090c +80000900: 0c1072ef jal x5,800081c0 +80000904: 800008f4 .word 0x800008f4 +80000908: 8000e27a .word 0x8000e27a +8000090c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0xcace37b2 +80000910: 000e2803 lw x16,0(x28) +80000914: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x28ab6513 +80000918: 000e2903 lw x18,0(x28) +8000091c: 004e0e13 addi x28,x28,4 + +80000920 : +Zkne_aes32esi_cg_cp_rs2_b18: + aes32esi x30, x16, x18, 0 # perform operation +80000920: 23280f33 aes32esi x30,x16,x18,0x0 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes32esi_cg_cp_rs2_b18, Zkne_aes32esi_cg_cp_rs2_b18_str) +80000924: 000ba203 lw x4,0(x23) +80000928: 01e20863 beq x4,x30,80000938 +8000092c: 095072ef jal x5,800081c0 +80000930: 80000920 .word 0x80000920 +80000934: 8000e2b1 .word 0x8000e2b1 +80000938: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xb59f8fdd +8000093c: 000e2883 lw x17,0(x28) +80000940: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x1da237a5 +80000944: 000e2983 lw x19,0(x28) +80000948: 004e0e13 addi x28,x28,4 + +8000094c : +Zkne_aes32esi_cg_cp_rs2_b19: + aes32esi x27, x17, x19, 0 # perform operation +8000094c: 23388db3 aes32esi x27,x17,x19,0x0 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes32esi_cg_cp_rs2_b19, Zkne_aes32esi_cg_cp_rs2_b19_str) +80000950: 000ba203 lw x4,0(x23) +80000954: 01b20863 beq x4,x27,80000964 +80000958: 069072ef jal x5,800081c0 +8000095c: 8000094c .word 0x8000094c +80000960: 8000e2e8 .word 0x8000e2e8 +80000964: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs1: x7 = 0xfe80f305 +80000968: 000e2383 lw x7,0(x28) +8000096c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x54427990 +80000970: 000e2a03 lw x20,0(x28) +80000974: 004e0e13 addi x28,x28,4 + +80000978 : +Zkne_aes32esi_cg_cp_rs2_b20: + aes32esi x17, x7, x20, 0 # perform operation +80000978: 234388b3 aes32esi x17,x7,x20,0x0 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes32esi_cg_cp_rs2_b20, Zkne_aes32esi_cg_cp_rs2_b20_str) +8000097c: 000ba203 lw x4,0(x23) +80000980: 01120863 beq x4,x17,80000990 +80000984: 03d072ef jal x5,800081c0 +80000988: 80000978 .word 0x80000978 +8000098c: 8000e31f .word 0x8000e31f +80000990: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0xd6068925 +80000994: 000e2503 lw x10,0(x28) +80000998: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0xd8cb2604 +8000099c: 000e2a83 lw x21,0(x28) +800009a0: 004e0e13 addi x28,x28,4 + +800009a4 : +Zkne_aes32esi_cg_cp_rs2_b21: + aes32esi x19, x10, x21, 1 # perform operation +800009a4: 635509b3 aes32esi x19,x10,x21,0x1 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes32esi_cg_cp_rs2_b21, Zkne_aes32esi_cg_cp_rs2_b21_str) +800009a8: 000ba203 lw x4,0(x23) +800009ac: 01320863 beq x4,x19,800009bc +800009b0: 011072ef jal x5,800081c0 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 8000e356 .word 0x8000e356 +800009bc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0xeea5ec0d +800009c0: 000e2503 lw x10,0(x28) +800009c4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x0d431384 +800009c8: 000e2b03 lw x22,0(x28) +800009cc: 004e0e13 addi x28,x28,4 + +800009d0 : +Zkne_aes32esi_cg_cp_rs2_b22: + aes32esi x26, x10, x22, 3 # perform operation +800009d0: e3650d33 aes32esi x26,x10,x22,0x3 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes32esi_cg_cp_rs2_b22, Zkne_aes32esi_cg_cp_rs2_b22_str) +800009d4: 000ba203 lw x4,0(x23) +800009d8: 01a20863 beq x4,x26,800009e8 +800009dc: 7e4072ef jal x5,800081c0 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 8000e38d .word 0x8000e38d +800009e8: 004b8b93 addi x23,x23,4 + + mv x10, x23 # switch signature pointer register to avoid conflict with test +800009ec: 000b8513 addi x10,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x1158f96d +800009f0: 000e2703 lw x14,0(x28) +800009f4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xd3ef74b0 +800009f8: 000e2b83 lw x23,0(x28) +800009fc: 004e0e13 addi x28,x28,4 + +80000a00 : +Zkne_aes32esi_cg_cp_rs2_b23: + aes32esi x2, x14, x23, 3 # perform operation +80000a00: e3770133 aes32esi x2,x14,x23,0x3 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zkne_aes32esi_cg_cp_rs2_b23, Zkne_aes32esi_cg_cp_rs2_b23_str) +80000a04: 00052203 lw x4,0(x10) +80000a08: 00220863 beq x4,x2,80000a18 +80000a0c: 7b4072ef jal x5,800081c0 +80000a10: 80000a00 .word 0x80000a00 +80000a14: 8000e3c4 .word 0x8000e3c4 +80000a18: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x5add7139 +80000a1c: 000e2903 lw x18,0(x28) +80000a20: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x27836503 +80000a24: 000e2c03 lw x24,0(x28) +80000a28: 004e0e13 addi x28,x28,4 + +80000a2c : +Zkne_aes32esi_cg_cp_rs2_b24: + aes32esi x14, x18, x24, 1 # perform operation +80000a2c: 63890733 aes32esi x14,x18,x24,0x1 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zkne_aes32esi_cg_cp_rs2_b24, Zkne_aes32esi_cg_cp_rs2_b24_str) +80000a30: 00052203 lw x4,0(x10) +80000a34: 00e20863 beq x4,x14,80000a44 +80000a38: 788072ef jal x5,800081c0 +80000a3c: 80000a2c .word 0x80000a2c +80000a40: 8000e3fb .word 0x8000e3fb +80000a44: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x342404ec +80000a48: 000e2903 lw x18,0(x28) +80000a4c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x07f43437 +80000a50: 000e2c83 lw x25,0(x28) +80000a54: 004e0e13 addi x28,x28,4 + +80000a58 : +Zkne_aes32esi_cg_cp_rs2_b25: + aes32esi x26, x18, x25, 2 # perform operation +80000a58: a3990d33 aes32esi x26,x18,x25,0x2 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zkne_aes32esi_cg_cp_rs2_b25, Zkne_aes32esi_cg_cp_rs2_b25_str) +80000a5c: 00052203 lw x4,0(x10) +80000a60: 01a20863 beq x4,x26,80000a70 +80000a64: 75c072ef jal x5,800081c0 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 8000e432 .word 0x8000e432 +80000a70: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x2a2786b3 +80000a74: 000e2e83 lw x29,0(x28) +80000a78: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0xe95f9310 +80000a7c: 000e2d03 lw x26,0(x28) +80000a80: 004e0e13 addi x28,x28,4 + +80000a84 : +Zkne_aes32esi_cg_cp_rs2_b26: + aes32esi x16, x29, x26, 1 # perform operation +80000a84: 63ae8833 aes32esi x16,x29,x26,0x1 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zkne_aes32esi_cg_cp_rs2_b26, Zkne_aes32esi_cg_cp_rs2_b26_str) +80000a88: 00052203 lw x4,0(x10) +80000a8c: 01020863 beq x4,x16,80000a9c +80000a90: 730072ef jal x5,800081c0 +80000a94: 80000a84 .word 0x80000a84 +80000a98: 8000e469 .word 0x8000e469 +80000a9c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x292a103e +80000aa0: 000e2d03 lw x26,0(x28) +80000aa4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x03ffb8db +80000aa8: 000e2d83 lw x27,0(x28) +80000aac: 004e0e13 addi x28,x28,4 + +80000ab0 : +Zkne_aes32esi_cg_cp_rs2_b27: + aes32esi x21, x26, x27, 3 # perform operation +80000ab0: e3bd0ab3 aes32esi x21,x26,x27,0x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zkne_aes32esi_cg_cp_rs2_b27, Zkne_aes32esi_cg_cp_rs2_b27_str) +80000ab4: 00052203 lw x4,0(x10) +80000ab8: 01520863 beq x4,x21,80000ac8 +80000abc: 704072ef jal x5,800081c0 +80000ac0: 80000ab0 .word 0x80000ab0 +80000ac4: 8000e4a0 .word 0x8000e4a0 +80000ac8: 00450513 addi x10,x10,4 + + mv x31, x28 # switch data pointer register to avoid conflict with test +80000acc: 000e0f93 addi x31,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xa06f97f8 +80000ad0: 000fa883 lw x17,0(x31) +80000ad4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x3a959881 +80000ad8: 000fae03 lw x28,0(x31) +80000adc: 004f8f93 addi x31,x31,4 + +80000ae0 : +Zkne_aes32esi_cg_cp_rs2_b28: + aes32esi x6, x17, x28, 1 # perform operation +80000ae0: 63c88333 aes32esi x6,x17,x28,0x1 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zkne_aes32esi_cg_cp_rs2_b28, Zkne_aes32esi_cg_cp_rs2_b28_str) +80000ae4: 00052203 lw x4,0(x10) +80000ae8: 00620863 beq x4,x6,80000af8 +80000aec: 6d4072ef jal x5,800081c0 +80000af0: 80000ae0 .word 0x80000ae0 +80000af4: 8000e4d7 .word 0x8000e4d7 +80000af8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x2fe5cfeb +80000afc: 000fa783 lw x15,0(x31) +80000b00: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xcb3ba4cc +80000b04: 000fae83 lw x29,0(x31) +80000b08: 004f8f93 addi x31,x31,4 + +80000b0c : +Zkne_aes32esi_cg_cp_rs2_b29: + aes32esi x28, x15, x29, 3 # perform operation +80000b0c: e3d78e33 aes32esi x28,x15,x29,0x3 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zkne_aes32esi_cg_cp_rs2_b29, Zkne_aes32esi_cg_cp_rs2_b29_str) +80000b10: 00052203 lw x4,0(x10) +80000b14: 01c20863 beq x4,x28,80000b24 +80000b18: 6a8072ef jal x5,800081c0 +80000b1c: 80000b0c .word 0x80000b0c +80000b20: 8000e50e .word 0x8000e50e +80000b24: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xadedf6be +80000b28: 000fa983 lw x19,0(x31) +80000b2c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x2dbb72ce +80000b30: 000faf03 lw x30,0(x31) +80000b34: 004f8f93 addi x31,x31,4 + +80000b38 : +Zkne_aes32esi_cg_cp_rs2_b30: + aes32esi x7, x19, x30, 2 # perform operation +80000b38: a3e983b3 aes32esi x7,x19,x30,0x2 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zkne_aes32esi_cg_cp_rs2_b30, Zkne_aes32esi_cg_cp_rs2_b30_str) +80000b3c: 00052203 lw x4,0(x10) +80000b40: 00720863 beq x4,x7,80000b50 +80000b44: 67c072ef jal x5,800081c0 +80000b48: 80000b38 .word 0x80000b38 +80000b4c: 8000e545 .word 0x8000e545 +80000b50: 00450513 addi x10,x10,4 + + mv x1, x31 # switch data pointer register to avoid conflict with test +80000b54: 000f8093 addi x1,x31,0 +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xb44bb71f +80000b58: 0000ac03 lw x24,0(x1) +80000b5c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x3ac65595 +80000b60: 0000af83 lw x31,0(x1) +80000b64: 00408093 addi x1,x1,4 + +80000b68 : +Zkne_aes32esi_cg_cp_rs2_b31: + aes32esi x16, x24, x31, 1 # perform operation +80000b68: 63fc0833 aes32esi x16,x24,x31,0x1 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zkne_aes32esi_cg_cp_rs2_b31, Zkne_aes32esi_cg_cp_rs2_b31_str) +80000b6c: 00052203 lw x4,0(x10) +80000b70: 01020863 beq x4,x16,80000b80 +80000b74: 64c072ef jal x5,800081c0 +80000b78: 80000b68 .word 0x80000b68 +80000b7c: 8000e57c .word 0x8000e57c +80000b80: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x5a66c9e9 +80000b84: 0000aa03 lw x20,0(x1) +80000b88: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x1e02d3b4 +80000b8c: 0000ad03 lw x26,0(x1) +80000b90: 00408093 addi x1,x1,4 + +80000b94 : +Zkne_aes32esi_cg_cp_rd_b0: + aes32esi x0, x20, x26, 2 # perform operation +80000b94: a3aa0033 aes32esi x0,x20,x26,0x2 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zkne_aes32esi_cg_cp_rd_b0, Zkne_aes32esi_cg_cp_rd_b0_str) +80000b98: 00052203 lw x4,0(x10) +80000b9c: 00020863 beq x4,x0,80000bac +80000ba0: 620072ef jal x5,800081c0 +80000ba4: 80000b94 .word 0x80000b94 +80000ba8: 8000e5b3 .word 0x8000e5b3 +80000bac: 00450513 addi x10,x10,4 + + mv x22, x1 # switch data pointer register to avoid conflict with test +80000bb0: 00008b13 addi x22,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xc3b6a7f7 +80000bb4: 000b2883 lw x17,0(x22) +80000bb8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x185dd433 +80000bbc: 000b2f03 lw x30,0(x22) +80000bc0: 004b0b13 addi x22,x22,4 + +80000bc4 : +Zkne_aes32esi_cg_cp_rd_b1: + aes32esi x1, x17, x30, 3 # perform operation +80000bc4: e3e880b3 aes32esi x1,x17,x30,0x3 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zkne_aes32esi_cg_cp_rd_b1, Zkne_aes32esi_cg_cp_rd_b1_str) +80000bc8: 00052203 lw x4,0(x10) +80000bcc: 00120863 beq x4,x1,80000bdc +80000bd0: 5f0072ef jal x5,800081c0 +80000bd4: 80000bc4 .word 0x80000bc4 +80000bd8: 8000e5e8 .word 0x8000e5e8 +80000bdc: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x09b61c32 +80000be0: 000b2603 lw x12,0(x22) +80000be4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xc9b8f572 +80000be8: 000b2a83 lw x21,0(x22) +80000bec: 004b0b13 addi x22,x22,4 + +80000bf0 : +Zkne_aes32esi_cg_cp_rd_b2: + aes32esi x2, x12, x21, 2 # perform operation +80000bf0: a3560133 aes32esi x2,x12,x21,0x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zkne_aes32esi_cg_cp_rd_b2, Zkne_aes32esi_cg_cp_rd_b2_str) +80000bf4: 00052203 lw x4,0(x10) +80000bf8: 00220863 beq x4,x2,80000c08 +80000bfc: 5c4072ef jal x5,800081c0 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 8000e61d .word 0x8000e61d +80000c08: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x750e9f8f +80000c0c: 000b2c83 lw x25,0(x22) +80000c10: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0xb52b526a +80000c14: 000b2883 lw x17,0(x22) +80000c18: 004b0b13 addi x22,x22,4 + +80000c1c : +Zkne_aes32esi_cg_cp_rd_b3: + aes32esi x3, x25, x17, 2 # perform operation +80000c1c: a31c81b3 aes32esi x3,x25,x17,0x2 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zkne_aes32esi_cg_cp_rd_b3, Zkne_aes32esi_cg_cp_rd_b3_str) +80000c20: 00052203 lw x4,0(x10) +80000c24: 00320863 beq x4,x3,80000c34 +80000c28: 598072ef jal x5,800081c0 +80000c2c: 80000c1c .word 0x80000c1c +80000c30: 8000e652 .word 0x8000e652 +80000c34: 00450513 addi x10,x10,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c38: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c3c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x0050fba4 +80000c40: 000b2d03 lw x26,0(x22) +80000c44: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0xb8ec317a +80000c48: 000b2003 lw x0,0(x22) +80000c4c: 004b0b13 addi x22,x22,4 + +80000c50 : +Zkne_aes32esi_cg_cp_rd_b4: + aes32esi x4, x26, x0, 2 # perform operation +80000c50: a20d0233 aes32esi x4,x26,x0,0x2 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zkne_aes32esi_cg_cp_rd_b4, Zkne_aes32esi_cg_cp_rd_b4_str) +80000c54: 00052683 lw x13,0(x10) +80000c58: 00468863 beq x13,x4,80000c68 +80000c5c: 5a40776f jal x14,80008200 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 8000e687 .word 0x8000e687 +80000c68: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xae59e8c5 +80000c6c: 000b2483 lw x9,0(x22) +80000c70: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x3c5a9de8 +80000c74: 000b2003 lw x0,0(x22) +80000c78: 004b0b13 addi x22,x22,4 + +80000c7c : +Zkne_aes32esi_cg_cp_rd_b5: + aes32esi x5, x9, x0, 1 # perform operation +80000c7c: 620482b3 aes32esi x5,x9,x0,0x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zkne_aes32esi_cg_cp_rd_b5, Zkne_aes32esi_cg_cp_rd_b5_str) +80000c80: 00052683 lw x13,0(x10) +80000c84: 00568863 beq x13,x5,80000c94 +80000c88: 5780776f jal x14,80008200 +80000c8c: 80000c7c .word 0x80000c7c +80000c90: 8000e6bc .word 0x8000e6bc +80000c94: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xce61ed38 +80000c98: 000b2803 lw x16,0(x22) +80000c9c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs2: x25 = 0x0b0acb85 +80000ca0: 000b2c83 lw x25,0(x22) +80000ca4: 004b0b13 addi x22,x22,4 + +80000ca8 : +Zkne_aes32esi_cg_cp_rd_b6: + aes32esi x6, x16, x25, 3 # perform operation +80000ca8: e3980333 aes32esi x6,x16,x25,0x3 + # Check if x6 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x6, Zkne_aes32esi_cg_cp_rd_b6, Zkne_aes32esi_cg_cp_rd_b6_str) +80000cac: 00052683 lw x13,0(x10) +80000cb0: 00668863 beq x13,x6,80000cc0 +80000cb4: 54c0776f jal x14,80008200 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 8000e6f1 .word 0x8000e6f1 +80000cc0: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x9cbc60e1 +80000cc4: 000b2583 lw x11,0(x22) +80000cc8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x015f673a +80000ccc: 000b2183 lw x3,0(x22) +80000cd0: 004b0b13 addi x22,x22,4 + +80000cd4 : +Zkne_aes32esi_cg_cp_rd_b7: + aes32esi x7, x11, x3, 1 # perform operation +80000cd4: 623583b3 aes32esi x7,x11,x3,0x1 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zkne_aes32esi_cg_cp_rd_b7, Zkne_aes32esi_cg_cp_rd_b7_str) +80000cd8: 00052683 lw x13,0(x10) +80000cdc: 00768863 beq x13,x7,80000cec +80000ce0: 5200776f jal x14,80008200 +80000ce4: 80000cd4 .word 0x80000cd4 +80000ce8: 8000e726 .word 0x8000e726 +80000cec: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x364be911 +80000cf0: 000b2d83 lw x27,0(x22) +80000cf4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x0b7c0418 +80000cf8: 000b2283 lw x5,0(x22) +80000cfc: 004b0b13 addi x22,x22,4 + +80000d00 : +Zkne_aes32esi_cg_cp_rd_b8: + aes32esi x8, x27, x5, 2 # perform operation +80000d00: a25d8433 aes32esi x8,x27,x5,0x2 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zkne_aes32esi_cg_cp_rd_b8, Zkne_aes32esi_cg_cp_rd_b8_str) +80000d04: 00052683 lw x13,0(x10) +80000d08: 00868863 beq x13,x8,80000d18 +80000d0c: 4f40776f jal x14,80008200 +80000d10: 80000d00 .word 0x80000d00 +80000d14: 8000e75b .word 0x8000e75b +80000d18: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x60e41c3a +80000d1c: 000b2003 lw x0,0(x22) +80000d20: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x8534f0ef +80000d24: 000b2783 lw x15,0(x22) +80000d28: 004b0b13 addi x22,x22,4 + +80000d2c : +Zkne_aes32esi_cg_cp_rd_b9: + aes32esi x9, x0, x15, 0 # perform operation +80000d2c: 22f004b3 aes32esi x9,x0,x15,0x0 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zkne_aes32esi_cg_cp_rd_b9, Zkne_aes32esi_cg_cp_rd_b9_str) +80000d30: 00052683 lw x13,0(x10) +80000d34: 00968863 beq x13,x9,80000d44 +80000d38: 4c80776f jal x14,80008200 +80000d3c: 80000d2c .word 0x80000d2c +80000d40: 8000e790 .word 0x8000e790 +80000d44: 00450513 addi x10,x10,4 + + mv x6, x10 # switch signature pointer register to avoid conflict with test +80000d48: 00050313 addi x6,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xf651f4cb +80000d4c: 000b2b83 lw x23,0(x22) +80000d50: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0xf2f8bf7d +80000d54: 000b2f83 lw x31,0(x22) +80000d58: 004b0b13 addi x22,x22,4 + +80000d5c : +Zkne_aes32esi_cg_cp_rd_b10: + aes32esi x10, x23, x31, 1 # perform operation +80000d5c: 63fb8533 aes32esi x10,x23,x31,0x1 + # Check if x10 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x10, Zkne_aes32esi_cg_cp_rd_b10, Zkne_aes32esi_cg_cp_rd_b10_str) +80000d60: 00032683 lw x13,0(x6) +80000d64: 00a68863 beq x13,x10,80000d74 +80000d68: 4980776f jal x14,80008200 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 8000e7c5 .word 0x8000e7c5 +80000d74: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xfb14bc85 +80000d78: 000b2a83 lw x21,0(x22) +80000d7c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xc6d32a12 +80000d80: 000b2403 lw x8,0(x22) +80000d84: 004b0b13 addi x22,x22,4 + +80000d88 : +Zkne_aes32esi_cg_cp_rd_b11: + aes32esi x11, x21, x8, 2 # perform operation +80000d88: a28a85b3 aes32esi x11,x21,x8,0x2 + # Check if x11 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x11, Zkne_aes32esi_cg_cp_rd_b11, Zkne_aes32esi_cg_cp_rd_b11_str) +80000d8c: 00032683 lw x13,0(x6) +80000d90: 00b68863 beq x13,x11,80000da0 +80000d94: 46c0776f jal x14,80008200 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 8000e7fb .word 0x8000e7fb +80000da0: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x9035d705 +80000da4: 000b2203 lw x4,0(x22) +80000da8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xb78000d6 +80000dac: 000b2903 lw x18,0(x22) +80000db0: 004b0b13 addi x22,x22,4 + +80000db4 : +Zkne_aes32esi_cg_cp_rd_b12: + aes32esi x12, x4, x18, 1 # perform operation +80000db4: 63220633 aes32esi x12,x4,x18,0x1 + # Check if x12 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x12, Zkne_aes32esi_cg_cp_rd_b12, Zkne_aes32esi_cg_cp_rd_b12_str) +80000db8: 00032683 lw x13,0(x6) +80000dbc: 00c68863 beq x13,x12,80000dcc +80000dc0: 4400776f jal x14,80008200 +80000dc4: 80000db4 .word 0x80000db4 +80000dc8: 8000e831 .word 0x8000e831 +80000dcc: 00430313 addi x6,x6,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dd0: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dd4: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x745432ab +80000dd8: 000b2d83 lw x27,0(x22) +80000ddc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xed9d2ae0 +80000de0: 000b2a83 lw x21,0(x22) +80000de4: 004b0b13 addi x22,x22,4 + +80000de8 : +Zkne_aes32esi_cg_cp_rd_b13: + aes32esi x13, x27, x21, 0 # perform operation +80000de8: 235d86b3 aes32esi x13,x27,x21,0x0 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cp_rd_b13, Zkne_aes32esi_cg_cp_rd_b13_str) +80000dec: 00032203 lw x4,0(x6) +80000df0: 00d20863 beq x4,x13,80000e00 +80000df4: 3cc072ef jal x5,800081c0 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 8000e867 .word 0x8000e867 +80000e00: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x01be960a +80000e04: 000b2803 lw x16,0(x22) +80000e08: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x9a3b25e3 +80000e0c: 000b2f83 lw x31,0(x22) +80000e10: 004b0b13 addi x22,x22,4 + +80000e14 : +Zkne_aes32esi_cg_cp_rd_b14: + aes32esi x14, x16, x31, 0 # perform operation +80000e14: 23f80733 aes32esi x14,x16,x31,0x0 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cp_rd_b14, Zkne_aes32esi_cg_cp_rd_b14_str) +80000e18: 00032203 lw x4,0(x6) +80000e1c: 00e20863 beq x4,x14,80000e2c +80000e20: 3a0072ef jal x5,800081c0 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 8000e89d .word 0x8000e89d +80000e2c: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xcaf9657d +80000e30: 000b2503 lw x10,0(x22) +80000e34: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x2a77a0ed +80000e38: 000b2e03 lw x28,0(x22) +80000e3c: 004b0b13 addi x22,x22,4 + +80000e40 : +Zkne_aes32esi_cg_cp_rd_b15: + aes32esi x15, x10, x28, 3 # perform operation +80000e40: e3c507b3 aes32esi x15,x10,x28,0x3 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cp_rd_b15, Zkne_aes32esi_cg_cp_rd_b15_str) +80000e44: 00032203 lw x4,0(x6) +80000e48: 00f20863 beq x4,x15,80000e58 +80000e4c: 374072ef jal x5,800081c0 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 8000e8d3 .word 0x8000e8d3 +80000e58: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xdb1a4630 +80000e5c: 000b2603 lw x12,0(x22) +80000e60: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x86c3a503 +80000e64: 000b2683 lw x13,0(x22) +80000e68: 004b0b13 addi x22,x22,4 + +80000e6c : +Zkne_aes32esi_cg_cp_rd_b16: + aes32esi x16, x12, x13, 3 # perform operation +80000e6c: e2d60833 aes32esi x16,x12,x13,0x3 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cp_rd_b16, Zkne_aes32esi_cg_cp_rd_b16_str) +80000e70: 00032203 lw x4,0(x6) +80000e74: 01020863 beq x4,x16,80000e84 +80000e78: 348072ef jal x5,800081c0 +80000e7c: 80000e6c .word 0x80000e6c +80000e80: 8000e909 .word 0x8000e909 +80000e84: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xccea0147 +80000e88: 000b2b83 lw x23,0(x22) +80000e8c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x90401ddc +80000e90: 000b2383 lw x7,0(x22) +80000e94: 004b0b13 addi x22,x22,4 + +80000e98 : +Zkne_aes32esi_cg_cp_rd_b17: + aes32esi x17, x23, x7, 1 # perform operation +80000e98: 627b88b3 aes32esi x17,x23,x7,0x1 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cp_rd_b17, Zkne_aes32esi_cg_cp_rd_b17_str) +80000e9c: 00032203 lw x4,0(x6) +80000ea0: 01120863 beq x4,x17,80000eb0 +80000ea4: 31c072ef jal x5,800081c0 +80000ea8: 80000e98 .word 0x80000e98 +80000eac: 8000e93f .word 0x8000e93f +80000eb0: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0x621e5c3f +80000eb4: 000b2383 lw x7,0(x22) +80000eb8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0x40cc69b5 +80000ebc: 000b2e03 lw x28,0(x22) +80000ec0: 004b0b13 addi x22,x22,4 + +80000ec4 : +Zkne_aes32esi_cg_cp_rd_b18: + aes32esi x18, x7, x28, 1 # perform operation +80000ec4: 63c38933 aes32esi x18,x7,x28,0x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cp_rd_b18, Zkne_aes32esi_cg_cp_rd_b18_str) +80000ec8: 00032203 lw x4,0(x6) +80000ecc: 01220863 beq x4,x18,80000edc +80000ed0: 2f0072ef jal x5,800081c0 +80000ed4: 80000ec4 .word 0x80000ec4 +80000ed8: 8000e975 .word 0x8000e975 +80000edc: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xf98fd037 +80000ee0: 000b2583 lw x11,0(x22) +80000ee4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xdd11eb39 +80000ee8: 000b2a03 lw x20,0(x22) +80000eec: 004b0b13 addi x22,x22,4 + +80000ef0 : +Zkne_aes32esi_cg_cp_rd_b19: + aes32esi x19, x11, x20, 1 # perform operation +80000ef0: 634589b3 aes32esi x19,x11,x20,0x1 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cp_rd_b19, Zkne_aes32esi_cg_cp_rd_b19_str) +80000ef4: 00032203 lw x4,0(x6) +80000ef8: 01320863 beq x4,x19,80000f08 +80000efc: 2c4072ef jal x5,800081c0 +80000f00: 80000ef0 .word 0x80000ef0 +80000f04: 8000e9ab .word 0x8000e9ab +80000f08: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x806cb0f2 +80000f0c: 000b2e03 lw x28,0(x22) +80000f10: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x30ac76c3 +80000f14: 000b2d03 lw x26,0(x22) +80000f18: 004b0b13 addi x22,x22,4 + +80000f1c : +Zkne_aes32esi_cg_cp_rd_b20: + aes32esi x20, x28, x26, 0 # perform operation +80000f1c: 23ae0a33 aes32esi x20,x28,x26,0x0 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zkne_aes32esi_cg_cp_rd_b20, Zkne_aes32esi_cg_cp_rd_b20_str) +80000f20: 00032203 lw x4,0(x6) +80000f24: 01420863 beq x4,x20,80000f34 +80000f28: 298072ef jal x5,800081c0 +80000f2c: 80000f1c .word 0x80000f1c +80000f30: 8000e9e1 .word 0x8000e9e1 +80000f34: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x54616848 +80000f38: 000b2d03 lw x26,0(x22) +80000f3c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs2: x24 = 0xfcf67802 +80000f40: 000b2c03 lw x24,0(x22) +80000f44: 004b0b13 addi x22,x22,4 + +80000f48 : +Zkne_aes32esi_cg_cp_rd_b21: + aes32esi x21, x26, x24, 2 # perform operation +80000f48: a38d0ab3 aes32esi x21,x26,x24,0x2 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cp_rd_b21, Zkne_aes32esi_cg_cp_rd_b21_str) +80000f4c: 00032203 lw x4,0(x6) +80000f50: 01520863 beq x4,x21,80000f60 +80000f54: 26c072ef jal x5,800081c0 +80000f58: 80000f48 .word 0x80000f48 +80000f5c: 8000ea17 .word 0x8000ea17 +80000f60: 00430313 addi x6,x6,4 + + mv x12, x22 # switch data pointer register to avoid conflict with test +80000f64: 000b0613 addi x12,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xfc18df9c +80000f68: 00062103 lw x2,0(x12) +80000f6c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x06c34a53 +80000f70: 00062083 lw x1,0(x12) +80000f74: 00460613 addi x12,x12,4 + +80000f78 : +Zkne_aes32esi_cg_cp_rd_b22: + aes32esi x22, x2, x1, 2 # perform operation +80000f78: a2110b33 aes32esi x22,x2,x1,0x2 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zkne_aes32esi_cg_cp_rd_b22, Zkne_aes32esi_cg_cp_rd_b22_str) +80000f7c: 00032203 lw x4,0(x6) +80000f80: 01620863 beq x4,x22,80000f90 +80000f84: 23c072ef jal x5,800081c0 +80000f88: 80000f78 .word 0x80000f78 +80000f8c: 8000ea4d .word 0x8000ea4d +80000f90: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x14849e2d +80000f94: 00062503 lw x10,0(x12) +80000f98: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xdfcf3db5 +80000f9c: 00062e03 lw x28,0(x12) +80000fa0: 00460613 addi x12,x12,4 + +80000fa4 : +Zkne_aes32esi_cg_cp_rd_b23: + aes32esi x23, x10, x28, 0 # perform operation +80000fa4: 23c50bb3 aes32esi x23,x10,x28,0x0 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cp_rd_b23, Zkne_aes32esi_cg_cp_rd_b23_str) +80000fa8: 00032203 lw x4,0(x6) +80000fac: 01720863 beq x4,x23,80000fbc +80000fb0: 210072ef jal x5,800081c0 +80000fb4: 80000fa4 .word 0x80000fa4 +80000fb8: 8000ea83 .word 0x8000ea83 +80000fbc: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x32e33272 +80000fc0: 00062103 lw x2,0(x12) +80000fc4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x235f5ab6 +80000fc8: 00062b03 lw x22,0(x12) +80000fcc: 00460613 addi x12,x12,4 + +80000fd0 : +Zkne_aes32esi_cg_cp_rd_b24: + aes32esi x24, x2, x22, 3 # perform operation +80000fd0: e3610c33 aes32esi x24,x2,x22,0x3 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cp_rd_b24, Zkne_aes32esi_cg_cp_rd_b24_str) +80000fd4: 00032203 lw x4,0(x6) +80000fd8: 01820863 beq x4,x24,80000fe8 +80000fdc: 1e4072ef jal x5,800081c0 +80000fe0: 80000fd0 .word 0x80000fd0 +80000fe4: 8000eab9 .word 0x8000eab9 +80000fe8: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x888959de +80000fec: 00062703 lw x14,0(x12) +80000ff0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x149e2ede +80000ff4: 00062b83 lw x23,0(x12) +80000ff8: 00460613 addi x12,x12,4 + +80000ffc : +Zkne_aes32esi_cg_cp_rd_b25: + aes32esi x25, x14, x23, 0 # perform operation +80000ffc: 23770cb3 aes32esi x25,x14,x23,0x0 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cp_rd_b25, Zkne_aes32esi_cg_cp_rd_b25_str) +80001000: 00032203 lw x4,0(x6) +80001004: 01920863 beq x4,x25,80001014 +80001008: 1b8072ef jal x5,800081c0 +8000100c: 80000ffc .word 0x80000ffc +80001010: 8000eaef .word 0x8000eaef +80001014: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x7b2ad864 +80001018: 00062683 lw x13,0(x12) +8000101c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x17754a98 +80001020: 00062183 lw x3,0(x12) +80001024: 00460613 addi x12,x12,4 + +80001028 : +Zkne_aes32esi_cg_cp_rd_b26: + aes32esi x26, x13, x3, 0 # perform operation +80001028: 22368d33 aes32esi x26,x13,x3,0x0 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zkne_aes32esi_cg_cp_rd_b26, Zkne_aes32esi_cg_cp_rd_b26_str) +8000102c: 00032203 lw x4,0(x6) +80001030: 01a20863 beq x4,x26,80001040 +80001034: 18c072ef jal x5,800081c0 +80001038: 80001028 .word 0x80001028 +8000103c: 8000eb25 .word 0x8000eb25 +80001040: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x61b659f4 +80001044: 00062703 lw x14,0(x12) +80001048: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xff3b9286 +8000104c: 00062d03 lw x26,0(x12) +80001050: 00460613 addi x12,x12,4 + +80001054 : +Zkne_aes32esi_cg_cp_rd_b27: + aes32esi x27, x14, x26, 2 # perform operation +80001054: a3a70db3 aes32esi x27,x14,x26,0x2 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cp_rd_b27, Zkne_aes32esi_cg_cp_rd_b27_str) +80001058: 00032203 lw x4,0(x6) +8000105c: 01b20863 beq x4,x27,8000106c +80001060: 160072ef jal x5,800081c0 +80001064: 80001054 .word 0x80001054 +80001068: 8000eb5b .word 0x8000eb5b +8000106c: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xaccec710 +80001070: 00062383 lw x7,0(x12) +80001074: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x29fb804e +80001078: 00062f83 lw x31,0(x12) +8000107c: 00460613 addi x12,x12,4 + +80001080 : +Zkne_aes32esi_cg_cp_rd_b28: + aes32esi x28, x7, x31, 0 # perform operation +80001080: 23f38e33 aes32esi x28,x7,x31,0x0 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cp_rd_b28, Zkne_aes32esi_cg_cp_rd_b28_str) +80001084: 00032203 lw x4,0(x6) +80001088: 01c20863 beq x4,x28,80001098 +8000108c: 134072ef jal x5,800081c0 +80001090: 80001080 .word 0x80001080 +80001094: 8000eb91 .word 0x8000eb91 +80001098: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x137dede2 +8000109c: 00062903 lw x18,0(x12) +800010a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xd3cced5d +800010a4: 00062803 lw x16,0(x12) +800010a8: 00460613 addi x12,x12,4 + +800010ac : +Zkne_aes32esi_cg_cp_rd_b29: + aes32esi x29, x18, x16, 0 # perform operation +800010ac: 23090eb3 aes32esi x29,x18,x16,0x0 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zkne_aes32esi_cg_cp_rd_b29, Zkne_aes32esi_cg_cp_rd_b29_str) +800010b0: 00032203 lw x4,0(x6) +800010b4: 01d20863 beq x4,x29,800010c4 +800010b8: 108072ef jal x5,800081c0 +800010bc: 800010ac .word 0x800010ac +800010c0: 8000ebc7 .word 0x8000ebc7 +800010c4: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xe13e3590 +800010c8: 00062903 lw x18,0(x12) +800010cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x386d77e0 +800010d0: 00062883 lw x17,0(x12) +800010d4: 00460613 addi x12,x12,4 + +800010d8 : +Zkne_aes32esi_cg_cp_rd_b30: + aes32esi x30, x18, x17, 3 # perform operation +800010d8: e3190f33 aes32esi x30,x18,x17,0x3 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zkne_aes32esi_cg_cp_rd_b30, Zkne_aes32esi_cg_cp_rd_b30_str) +800010dc: 00032203 lw x4,0(x6) +800010e0: 01e20863 beq x4,x30,800010f0 +800010e4: 0dc072ef jal x5,800081c0 +800010e8: 800010d8 .word 0x800010d8 +800010ec: 8000ebfd .word 0x8000ebfd +800010f0: 00430313 addi x6,x6,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x7faaa3cb +800010f4: 00062003 lw x0,0(x12) +800010f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x12b518dd +800010fc: 00062a03 lw x20,0(x12) +80001100: 00460613 addi x12,x12,4 + +80001104 : +Zkne_aes32esi_cg_cp_rd_b31: + aes32esi x31, x0, x20, 0 # perform operation +80001104: 23400fb3 aes32esi x31,x0,x20,0x0 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cp_rd_b31, Zkne_aes32esi_cg_cp_rd_b31_str) +80001108: 00032203 lw x4,0(x6) +8000110c: 01f20863 beq x4,x31,8000111c +80001110: 0b0072ef jal x5,800081c0 +80001114: 80001104 .word 0x80001104 +80001118: 8000ec33 .word 0x8000ec33 +8000111c: 00430313 addi x6,x6,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x00000000 +80001120: 00062783 lw x15,0(x12) +80001124: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x83f14463 +80001128: 00062703 lw x14,0(x12) +8000112c: 00460613 addi x12,x12,4 + +80001130 : +Zkne_aes32esi_cg_cp_rs1_edges_0x0: + aes32esi x30, x15, x14, 0 # perform operation +80001130: 22e78f33 aes32esi x30,x15,x14,0x0 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zkne_aes32esi_cg_cp_rs1_edges_0x0, Zkne_aes32esi_cg_cp_rs1_edges_0x0_str) +80001134: 00032203 lw x4,0(x6) +80001138: 01e20863 beq x4,x30,80001148 +8000113c: 084072ef jal x5,800081c0 +80001140: 80001130 .word 0x80001130 +80001144: 8000ec69 .word 0x8000ec69 +80001148: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x00000001 +8000114c: 00062c03 lw x24,0(x12) +80001150: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xa33d382d +80001154: 00062583 lw x11,0(x12) +80001158: 00460613 addi x12,x12,4 + +8000115c : +Zkne_aes32esi_cg_cp_rs1_edges_0x1: + aes32esi x18, x24, x11, 1 # perform operation +8000115c: 62bc0933 aes32esi x18,x24,x11,0x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cp_rs1_edges_0x1, Zkne_aes32esi_cg_cp_rs1_edges_0x1_str) +80001160: 00032203 lw x4,0(x6) +80001164: 01220863 beq x4,x18,80001174 +80001168: 058072ef jal x5,800081c0 +8000116c: 8000115c .word 0x8000115c +80001170: 8000eca6 .word 0x8000eca6 +80001174: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x00000002 +80001178: 00062c03 lw x24,0(x12) +8000117c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xd6a9ecfd +80001180: 00062d83 lw x27,0(x12) +80001184: 00460613 addi x12,x12,4 + +80001188 : +Zkne_aes32esi_cg_cp_rs1_edges_0x2: + aes32esi x16, x24, x27, 2 # perform operation +80001188: a3bc0833 aes32esi x16,x24,x27,0x2 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cp_rs1_edges_0x2, Zkne_aes32esi_cg_cp_rs1_edges_0x2_str) +8000118c: 00032203 lw x4,0(x6) +80001190: 01020863 beq x4,x16,800011a0 +80001194: 02c072ef jal x5,800081c0 +80001198: 80001188 .word 0x80001188 +8000119c: 8000ece3 .word 0x8000ece3 +800011a0: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000000 +800011a4: 00062903 lw x18,0(x12) +800011a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x6818d5ec +800011ac: 00062e03 lw x28,0(x12) +800011b0: 00460613 addi x12,x12,4 + +800011b4 : +Zkne_aes32esi_cg_cp_rs1_edges_0x80000000: + aes32esi x25, x18, x28, 2 # perform operation +800011b4: a3c90cb3 aes32esi x25,x18,x28,0x2 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cp_rs1_edges_0x80000000, Zkne_aes32esi_cg_cp_rs1_edges_0x80000000_str) +800011b8: 00032203 lw x4,0(x6) +800011bc: 01920863 beq x4,x25,800011cc +800011c0: 000072ef jal x5,800081c0 +800011c4: 800011b4 .word 0x800011b4 +800011c8: 8000ed20 .word 0x8000ed20 +800011cc: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x80000001 +800011d0: 00062583 lw x11,0(x12) +800011d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x58d2cf58 +800011d8: 00062c83 lw x25,0(x12) +800011dc: 00460613 addi x12,x12,4 + +800011e0 : +Zkne_aes32esi_cg_cp_rs1_edges_0x80000001: + aes32esi x19, x11, x25, 3 # perform operation +800011e0: e39589b3 aes32esi x19,x11,x25,0x3 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cp_rs1_edges_0x80000001, Zkne_aes32esi_cg_cp_rs1_edges_0x80000001_str) +800011e4: 00032203 lw x4,0(x6) +800011e8: 01320863 beq x4,x19,800011f8 +800011ec: 7d5062ef jal x5,800081c0 +800011f0: 800011e0 .word 0x800011e0 +800011f4: 8000ed65 .word 0x8000ed65 +800011f8: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7fffffff +800011fc: 00062783 lw x15,0(x12) +80001200: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xe2379ea9 +80001204: 00062403 lw x8,0(x12) +80001208: 00460613 addi x12,x12,4 + +8000120c : +Zkne_aes32esi_cg_cp_rs1_edges_0x7fffffff: + aes32esi x3, x15, x8, 3 # perform operation +8000120c: e28781b3 aes32esi x3,x15,x8,0x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zkne_aes32esi_cg_cp_rs1_edges_0x7fffffff, Zkne_aes32esi_cg_cp_rs1_edges_0x7fffffff_str) +80001210: 00032203 lw x4,0(x6) +80001214: 00320863 beq x4,x3,80001224 +80001218: 7a9062ef jal x5,800081c0 +8000121c: 8000120c .word 0x8000120c +80001220: 8000edaa .word 0x8000edaa +80001224: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x7ffffffe +80001228: 00062c83 lw x25,0(x12) +8000122c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x69d5a378 +80001230: 00062583 lw x11,0(x12) +80001234: 00460613 addi x12,x12,4 + +80001238 : +Zkne_aes32esi_cg_cp_rs1_edges_0x7ffffffe: + aes32esi x18, x25, x11, 1 # perform operation +80001238: 62bc8933 aes32esi x18,x25,x11,0x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cp_rs1_edges_0x7ffffffe, Zkne_aes32esi_cg_cp_rs1_edges_0x7ffffffe_str) +8000123c: 00032203 lw x4,0(x6) +80001240: 01220863 beq x4,x18,80001250 +80001244: 77d062ef jal x5,800081c0 +80001248: 80001238 .word 0x80001238 +8000124c: 8000edef .word 0x8000edef +80001250: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +80001254: 00062783 lw x15,0(x12) +80001258: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x4eb1733e +8000125c: 00062983 lw x19,0(x12) +80001260: 00460613 addi x12,x12,4 + +80001264 : +Zkne_aes32esi_cg_cp_rs1_edges_0xffffffff: + aes32esi x13, x15, x19, 1 # perform operation +80001264: 633786b3 aes32esi x13,x15,x19,0x1 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cp_rs1_edges_0xffffffff, Zkne_aes32esi_cg_cp_rs1_edges_0xffffffff_str) +80001268: 00032203 lw x4,0(x6) +8000126c: 00d20863 beq x4,x13,8000127c +80001270: 751062ef jal x5,800081c0 +80001274: 80001264 .word 0x80001264 +80001278: 8000ee34 .word 0x8000ee34 +8000127c: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xfffffffe +80001280: 00062983 lw x19,0(x12) +80001284: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xedffff7a +80001288: 00062b83 lw x23,0(x12) +8000128c: 00460613 addi x12,x12,4 + +80001290 : +Zkne_aes32esi_cg_cp_rs1_edges_0xfffffffe: + aes32esi x28, x19, x23, 2 # perform operation +80001290: a3798e33 aes32esi x28,x19,x23,0x2 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cp_rs1_edges_0xfffffffe, Zkne_aes32esi_cg_cp_rs1_edges_0xfffffffe_str) +80001294: 00032203 lw x4,0(x6) +80001298: 01c20863 beq x4,x28,800012a8 +8000129c: 725062ef jal x5,800081c0 +800012a0: 80001290 .word 0x80001290 +800012a4: 8000ee79 .word 0x8000ee79 +800012a8: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x5bbc8872 +800012ac: 00062c83 lw x25,0(x12) +800012b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x1add1dc2 +800012b4: 00062383 lw x7,0(x12) +800012b8: 00460613 addi x12,x12,4 + +800012bc : +Zkne_aes32esi_cg_cp_rs1_edges_0x5bbc8872: + aes32esi x16, x25, x7, 0 # perform operation +800012bc: 227c8833 aes32esi x16,x25,x7,0x0 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cp_rs1_edges_0x5bbc8872, Zkne_aes32esi_cg_cp_rs1_edges_0x5bbc8872_str) +800012c0: 00032203 lw x4,0(x6) +800012c4: 01020863 beq x4,x16,800012d4 +800012c8: 6f9062ef jal x5,800081c0 +800012cc: 800012bc .word 0x800012bc +800012d0: 8000eebe .word 0x8000eebe +800012d4: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xaaaaaaaa +800012d8: 00062483 lw x9,0(x12) +800012dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7a3c921f +800012e0: 00062b83 lw x23,0(x12) +800012e4: 00460613 addi x12,x12,4 + +800012e8 : +Zkne_aes32esi_cg_cp_rs1_edges_0xaaaaaaaa: + aes32esi x7, x9, x23, 2 # perform operation +800012e8: a37483b3 aes32esi x7,x9,x23,0x2 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cp_rs1_edges_0xaaaaaaaa, Zkne_aes32esi_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012ec: 00032203 lw x4,0(x6) +800012f0: 00720863 beq x4,x7,80001300 +800012f4: 6cd062ef jal x5,800081c0 +800012f8: 800012e8 .word 0x800012e8 +800012fc: 8000ef03 .word 0x8000ef03 +80001300: 00430313 addi x6,x6,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x55555555 +80001304: 00062083 lw x1,0(x12) +80001308: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xa4c1a1c9 +8000130c: 00062783 lw x15,0(x12) +80001310: 00460613 addi x12,x12,4 + +80001314 : +Zkne_aes32esi_cg_cp_rs1_edges_0x55555555: + aes32esi x9, x1, x15, 0 # perform operation +80001314: 22f084b3 aes32esi x9,x1,x15,0x0 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zkne_aes32esi_cg_cp_rs1_edges_0x55555555, Zkne_aes32esi_cg_cp_rs1_edges_0x55555555_str) +80001318: 00032203 lw x4,0(x6) +8000131c: 00920863 beq x4,x9,8000132c +80001320: 6a1062ef jal x5,800081c0 +80001324: 80001314 .word 0x80001314 +80001328: 8000ef48 .word 0x8000ef48 +8000132c: 00430313 addi x6,x6,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x79a2bc0e +80001330: 00062903 lw x18,0(x12) +80001334: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x00000000 +80001338: 00062803 lw x16,0(x12) +8000133c: 00460613 addi x12,x12,4 + +80001340 : +Zkne_aes32esi_cg_cp_rs2_edges_0x0: + aes32esi x3, x18, x16, 3 # perform operation +80001340: e30901b3 aes32esi x3,x18,x16,0x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zkne_aes32esi_cg_cp_rs2_edges_0x0, Zkne_aes32esi_cg_cp_rs2_edges_0x0_str) +80001344: 00032203 lw x4,0(x6) +80001348: 00320863 beq x4,x3,80001358 +8000134c: 675062ef jal x5,800081c0 +80001350: 80001340 .word 0x80001340 +80001354: 8000ef8d .word 0x8000ef8d +80001358: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xd7694e07 +8000135c: 00062d83 lw x27,0(x12) +80001360: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000001 +80001364: 00062e83 lw x29,0(x12) +80001368: 00460613 addi x12,x12,4 + +8000136c : +Zkne_aes32esi_cg_cp_rs2_edges_0x1: + aes32esi x25, x27, x29, 1 # perform operation +8000136c: 63dd8cb3 aes32esi x25,x27,x29,0x1 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cp_rs2_edges_0x1, Zkne_aes32esi_cg_cp_rs2_edges_0x1_str) +80001370: 00032203 lw x4,0(x6) +80001374: 01920863 beq x4,x25,80001384 +80001378: 649062ef jal x5,800081c0 +8000137c: 8000136c .word 0x8000136c +80001380: 8000efcb .word 0x8000efcb +80001384: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xfcb3844f +80001388: 00062903 lw x18,0(x12) +8000138c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x00000002 +80001390: 00062703 lw x14,0(x12) +80001394: 00460613 addi x12,x12,4 + +80001398 : +Zkne_aes32esi_cg_cp_rs2_edges_0x2: + aes32esi x1, x18, x14, 3 # perform operation +80001398: e2e900b3 aes32esi x1,x18,x14,0x3 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zkne_aes32esi_cg_cp_rs2_edges_0x2, Zkne_aes32esi_cg_cp_rs2_edges_0x2_str) +8000139c: 00032203 lw x4,0(x6) +800013a0: 00120863 beq x4,x1,800013b0 +800013a4: 61d062ef jal x5,800081c0 +800013a8: 80001398 .word 0x80001398 +800013ac: 8000f009 .word 0x8000f009 +800013b0: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x2cae60c4 +800013b4: 00062c03 lw x24,0(x12) +800013b8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x80000000 +800013bc: 00062883 lw x17,0(x12) +800013c0: 00460613 addi x12,x12,4 + +800013c4 : +Zkne_aes32esi_cg_cp_rs2_edges_0x80000000: + aes32esi x28, x24, x17, 1 # perform operation +800013c4: 631c0e33 aes32esi x28,x24,x17,0x1 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cp_rs2_edges_0x80000000, Zkne_aes32esi_cg_cp_rs2_edges_0x80000000_str) +800013c8: 00032203 lw x4,0(x6) +800013cc: 01c20863 beq x4,x28,800013dc +800013d0: 5f1062ef jal x5,800081c0 +800013d4: 800013c4 .word 0x800013c4 +800013d8: 8000f047 .word 0x8000f047 +800013dc: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xa43dc8a7 +800013e0: 00062183 lw x3,0(x12) +800013e4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x80000001 +800013e8: 00062a83 lw x21,0(x12) +800013ec: 00460613 addi x12,x12,4 + +800013f0 : +Zkne_aes32esi_cg_cp_rs2_edges_0x80000001: + aes32esi x13, x3, x21, 0 # perform operation +800013f0: 235186b3 aes32esi x13,x3,x21,0x0 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cp_rs2_edges_0x80000001, Zkne_aes32esi_cg_cp_rs2_edges_0x80000001_str) +800013f4: 00032203 lw x4,0(x6) +800013f8: 00d20863 beq x4,x13,80001408 +800013fc: 5c5062ef jal x5,800081c0 +80001400: 800013f0 .word 0x800013f0 +80001404: 8000f08c .word 0x8000f08c +80001408: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x0bf389b0 +8000140c: 00062783 lw x15,0(x12) +80001410: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7fffffff +80001414: 00062b83 lw x23,0(x12) +80001418: 00460613 addi x12,x12,4 + +8000141c : +Zkne_aes32esi_cg_cp_rs2_edges_0x7fffffff: + aes32esi x28, x15, x23, 2 # perform operation +8000141c: a3778e33 aes32esi x28,x15,x23,0x2 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cp_rs2_edges_0x7fffffff, Zkne_aes32esi_cg_cp_rs2_edges_0x7fffffff_str) +80001420: 00032203 lw x4,0(x6) +80001424: 01c20863 beq x4,x28,80001434 +80001428: 599062ef jal x5,800081c0 +8000142c: 8000141c .word 0x8000141c +80001430: 8000f0d1 .word 0x8000f0d1 +80001434: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x96aa7c5e +80001438: 00062d83 lw x27,0(x12) +8000143c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x7ffffffe +80001440: 00062183 lw x3,0(x12) +80001444: 00460613 addi x12,x12,4 + +80001448 : +Zkne_aes32esi_cg_cp_rs2_edges_0x7ffffffe: + aes32esi x28, x27, x3, 0 # perform operation +80001448: 223d8e33 aes32esi x28,x27,x3,0x0 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cp_rs2_edges_0x7ffffffe, Zkne_aes32esi_cg_cp_rs2_edges_0x7ffffffe_str) +8000144c: 00032203 lw x4,0(x6) +80001450: 01c20863 beq x4,x28,80001460 +80001454: 56d062ef jal x5,800081c0 +80001458: 80001448 .word 0x80001448 +8000145c: 8000f116 .word 0x8000f116 +80001460: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xef0996ec +80001464: 00062483 lw x9,0(x12) +80001468: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xffffffff +8000146c: 00062703 lw x14,0(x12) +80001470: 00460613 addi x12,x12,4 + +80001474 : +Zkne_aes32esi_cg_cp_rs2_edges_0xffffffff: + aes32esi x23, x9, x14, 3 # perform operation +80001474: e2e48bb3 aes32esi x23,x9,x14,0x3 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cp_rs2_edges_0xffffffff, Zkne_aes32esi_cg_cp_rs2_edges_0xffffffff_str) +80001478: 00032203 lw x4,0(x6) +8000147c: 01720863 beq x4,x23,8000148c +80001480: 541062ef jal x5,800081c0 +80001484: 80001474 .word 0x80001474 +80001488: 8000f15b .word 0x8000f15b +8000148c: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xbdb04fbd +80001490: 00062683 lw x13,0(x12) +80001494: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xfffffffe +80001498: 00062e03 lw x28,0(x12) +8000149c: 00460613 addi x12,x12,4 + +800014a0 : +Zkne_aes32esi_cg_cp_rs2_edges_0xfffffffe: + aes32esi x18, x13, x28, 2 # perform operation +800014a0: a3c68933 aes32esi x18,x13,x28,0x2 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cp_rs2_edges_0xfffffffe, Zkne_aes32esi_cg_cp_rs2_edges_0xfffffffe_str) +800014a4: 00032203 lw x4,0(x6) +800014a8: 01220863 beq x4,x18,800014b8 +800014ac: 515062ef jal x5,800081c0 +800014b0: 800014a0 .word 0x800014a0 +800014b4: 8000f1a0 .word 0x8000f1a0 +800014b8: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x625c777f +800014bc: 00062683 lw x13,0(x12) +800014c0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x5bbc8872 +800014c4: 00062b83 lw x23,0(x12) +800014c8: 00460613 addi x12,x12,4 + +800014cc : +Zkne_aes32esi_cg_cp_rs2_edges_0x5bbc8872: + aes32esi x24, x13, x23, 1 # perform operation +800014cc: 63768c33 aes32esi x24,x13,x23,0x1 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cp_rs2_edges_0x5bbc8872, Zkne_aes32esi_cg_cp_rs2_edges_0x5bbc8872_str) +800014d0: 00032203 lw x4,0(x6) +800014d4: 01820863 beq x4,x24,800014e4 +800014d8: 4e9062ef jal x5,800081c0 +800014dc: 800014cc .word 0x800014cc +800014e0: 8000f1e5 .word 0x8000f1e5 +800014e4: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xb3415e6f +800014e8: 00062e03 lw x28,0(x12) +800014ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xaaaaaaaa +800014f0: 00062a03 lw x20,0(x12) +800014f4: 00460613 addi x12,x12,4 + +800014f8 : +Zkne_aes32esi_cg_cp_rs2_edges_0xaaaaaaaa: + aes32esi x29, x28, x20, 3 # perform operation +800014f8: e34e0eb3 aes32esi x29,x28,x20,0x3 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zkne_aes32esi_cg_cp_rs2_edges_0xaaaaaaaa, Zkne_aes32esi_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014fc: 00032203 lw x4,0(x6) +80001500: 01d20863 beq x4,x29,80001510 +80001504: 4bd062ef jal x5,800081c0 +80001508: 800014f8 .word 0x800014f8 +8000150c: 8000f22a .word 0x8000f22a +80001510: 00430313 addi x6,x6,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xabfc2693 +80001514: 00062d83 lw x27,0(x12) +80001518: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x55555555 +8000151c: 00062e03 lw x28,0(x12) +80001520: 00460613 addi x12,x12,4 + +80001524 : +Zkne_aes32esi_cg_cp_rs2_edges_0x55555555: + aes32esi x15, x27, x28, 1 # perform operation +80001524: 63cd87b3 aes32esi x15,x27,x28,0x1 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cp_rs2_edges_0x55555555, Zkne_aes32esi_cg_cp_rs2_edges_0x55555555_str) +80001528: 00032203 lw x4,0(x6) +8000152c: 00f20863 beq x4,x15,8000153c +80001530: 491062ef jal x5,800081c0 +80001534: 80001524 .word 0x80001524 +80001538: 8000f26f .word 0x8000f26f +8000153c: 00430313 addi x6,x6,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x00000000 +80001540: 00062503 lw x10,0(x12) +80001544: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x00000000 +80001548: 00062d03 lw x26,0(x12) +8000154c: 00460613 addi x12,x12,4 + +80001550 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes32esi x8, x10, x26, 3 # perform operation +80001550: e3a50433 aes32esi x8,x10,x26,0x3 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001554: 00032203 lw x4,0(x6) +80001558: 00820863 beq x4,x8,80001568 +8000155c: 465062ef jal x5,800081c0 +80001560: 80001550 .word 0x80001550 +80001564: 8000f2b4 .word 0x8000f2b4 +80001568: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x00000000 +8000156c: 00062d83 lw x27,0(x12) +80001570: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x00000001 +80001574: 00062383 lw x7,0(x12) +80001578: 00460613 addi x12,x12,4 + +8000157c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes32esi x15, x27, x7, 1 # perform operation +8000157c: 627d87b3 aes32esi x15,x27,x7,0x1 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001580: 00032203 lw x4,0(x6) +80001584: 00f20863 beq x4,x15,80001594 +80001588: 439062ef jal x5,800081c0 +8000158c: 8000157c .word 0x8000157c +80001590: 8000f309 .word 0x8000f309 +80001594: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x00000000 +80001598: 00062503 lw x10,0(x12) +8000159c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000002 +800015a0: 00062c83 lw x25,0(x12) +800015a4: 00460613 addi x12,x12,4 + +800015a8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes32esi x24, x10, x25, 3 # perform operation +800015a8: e3950c33 aes32esi x24,x10,x25,0x3 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015ac: 00032203 lw x4,0(x6) +800015b0: 01820863 beq x4,x24,800015c0 +800015b4: 40d062ef jal x5,800081c0 +800015b8: 800015a8 .word 0x800015a8 +800015bc: 8000f35e .word 0x8000f35e +800015c0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x00000000 +800015c4: 00062383 lw x7,0(x12) +800015c8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x80000000 +800015cc: 00062f83 lw x31,0(x12) +800015d0: 00460613 addi x12,x12,4 + +800015d4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + aes32esi x9, x7, x31, 2 # perform operation +800015d4: a3f384b3 aes32esi x9,x7,x31,0x2 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015d8: 00032203 lw x4,0(x6) +800015dc: 00920863 beq x4,x9,800015ec +800015e0: 3e1062ef jal x5,800081c0 +800015e4: 800015d4 .word 0x800015d4 +800015e8: 8000f3b3 .word 0x8000f3b3 +800015ec: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000000 +800015f0: 00062183 lw x3,0(x12) +800015f4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x80000001 +800015f8: 00062683 lw x13,0(x12) +800015fc: 00460613 addi x12,x12,4 + +80001600 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + aes32esi x14, x3, x13, 1 # perform operation +80001600: 62d18733 aes32esi x14,x3,x13,0x1 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001604: 00032203 lw x4,0(x6) +80001608: 00e20863 beq x4,x14,80001618 +8000160c: 3b5062ef jal x5,800081c0 +80001610: 80001600 .word 0x80001600 +80001614: 8000f40f .word 0x8000f40f +80001618: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x00000000 +8000161c: 00062d03 lw x26,0(x12) +80001620: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x7fffffff +80001624: 00062883 lw x17,0(x12) +80001628: 00460613 addi x12,x12,4 + +8000162c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + aes32esi x16, x26, x17, 0 # perform operation +8000162c: 231d0833 aes32esi x16,x26,x17,0x0 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001630: 00032203 lw x4,0(x6) +80001634: 01020863 beq x4,x16,80001644 +80001638: 389062ef jal x5,800081c0 +8000163c: 8000162c .word 0x8000162c +80001640: 8000f46b .word 0x8000f46b +80001644: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x00000000 +80001648: 00062b03 lw x22,0(x12) +8000164c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x7ffffffe +80001650: 00062803 lw x16,0(x12) +80001654: 00460613 addi x12,x12,4 + +80001658 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + aes32esi x21, x22, x16, 3 # perform operation +80001658: e30b0ab3 aes32esi x21,x22,x16,0x3 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +8000165c: 00032203 lw x4,0(x6) +80001660: 01520863 beq x4,x21,80001670 +80001664: 35d062ef jal x5,800081c0 +80001668: 80001658 .word 0x80001658 +8000166c: 8000f4c7 .word 0x8000f4c7 +80001670: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000000 +80001674: 00062e83 lw x29,0(x12) +80001678: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xffffffff +8000167c: 00062c03 lw x24,0(x12) +80001680: 00460613 addi x12,x12,4 + +80001684 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes32esi x22, x29, x24, 2 # perform operation +80001684: a38e8b33 aes32esi x22,x29,x24,0x2 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001688: 00032203 lw x4,0(x6) +8000168c: 01620863 beq x4,x22,8000169c +80001690: 331062ef jal x5,800081c0 +80001694: 80001684 .word 0x80001684 +80001698: 8000f523 .word 0x8000f523 +8000169c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000000 +800016a0: 00062583 lw x11,0(x12) +800016a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xfffffffe +800016a8: 00062103 lw x2,0(x12) +800016ac: 00460613 addi x12,x12,4 + +800016b0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes32esi x17, x11, x2, 1 # perform operation +800016b0: 622588b3 aes32esi x17,x11,x2,0x1 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016b4: 00032203 lw x4,0(x6) +800016b8: 01120863 beq x4,x17,800016c8 +800016bc: 305062ef jal x5,800081c0 +800016c0: 800016b0 .word 0x800016b0 +800016c4: 8000f57f .word 0x8000f57f +800016c8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000000 +800016cc: 00062c83 lw x25,0(x12) +800016d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x5bbc8872 +800016d4: 00062103 lw x2,0(x12) +800016d8: 00460613 addi x12,x12,4 + +800016dc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + aes32esi x23, x25, x2, 0 # perform operation +800016dc: 222c8bb3 aes32esi x23,x25,x2,0x0 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e0: 00032203 lw x4,0(x6) +800016e4: 01720863 beq x4,x23,800016f4 +800016e8: 2d9062ef jal x5,800081c0 +800016ec: 800016dc .word 0x800016dc +800016f0: 8000f5db .word 0x8000f5db +800016f4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x00000000 +800016f8: 00062103 lw x2,0(x12) +800016fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xaaaaaaaa +80001700: 00062483 lw x9,0(x12) +80001704: 00460613 addi x12,x12,4 + +80001708 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + aes32esi x17, x2, x9, 0 # perform operation +80001708: 229108b3 aes32esi x17,x2,x9,0x0 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +8000170c: 00032203 lw x4,0(x6) +80001710: 01120863 beq x4,x17,80001720 +80001714: 2ad062ef jal x5,800081c0 +80001718: 80001708 .word 0x80001708 +8000171c: 8000f637 .word 0x8000f637 +80001720: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x00000000 +80001724: 00062103 lw x2,0(x12) +80001728: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x55555555 +8000172c: 00062c83 lw x25,0(x12) +80001730: 00460613 addi x12,x12,4 + +80001734 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + aes32esi x10, x2, x25, 1 # perform operation +80001734: 63910533 aes32esi x10,x2,x25,0x1 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001738: 00032203 lw x4,0(x6) +8000173c: 00a20863 beq x4,x10,8000174c +80001740: 281062ef jal x5,800081c0 +80001744: 80001734 .word 0x80001734 +80001748: 8000f693 .word 0x8000f693 +8000174c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x00000001 +80001750: 00062683 lw x13,0(x12) +80001754: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000000 +80001758: 00062b03 lw x22,0(x12) +8000175c: 00460613 addi x12,x12,4 + +80001760 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes32esi x23, x13, x22, 1 # perform operation +80001760: 63668bb3 aes32esi x23,x13,x22,0x1 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001764: 00032203 lw x4,0(x6) +80001768: 01720863 beq x4,x23,80001778 +8000176c: 255062ef jal x5,800081c0 +80001770: 80001760 .word 0x80001760 +80001774: 8000f6ef .word 0x8000f6ef +80001778: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x00000001 +8000177c: 00062d83 lw x27,0(x12) +80001780: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000001 +80001784: 00062c03 lw x24,0(x12) +80001788: 00460613 addi x12,x12,4 + +8000178c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes32esi x19, x27, x24, 3 # perform operation +8000178c: e38d89b3 aes32esi x19,x27,x24,0x3 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001790: 00032203 lw x4,0(x6) +80001794: 01320863 beq x4,x19,800017a4 +80001798: 229062ef jal x5,800081c0 +8000179c: 8000178c .word 0x8000178c +800017a0: 8000f744 .word 0x8000f744 +800017a4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x00000001 +800017a8: 00062b03 lw x22,0(x12) +800017ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x00000002 +800017b0: 00062f83 lw x31,0(x12) +800017b4: 00460613 addi x12,x12,4 + +800017b8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes32esi x26, x22, x31, 3 # perform operation +800017b8: e3fb0d33 aes32esi x26,x22,x31,0x3 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017bc: 00032203 lw x4,0(x6) +800017c0: 01a20863 beq x4,x26,800017d0 +800017c4: 1fd062ef jal x5,800081c0 +800017c8: 800017b8 .word 0x800017b8 +800017cc: 8000f799 .word 0x8000f799 +800017d0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x00000001 +800017d4: 00062403 lw x8,0(x12) +800017d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x80000000 +800017dc: 00062183 lw x3,0(x12) +800017e0: 00460613 addi x12,x12,4 + +800017e4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + aes32esi x24, x8, x3, 2 # perform operation +800017e4: a2340c33 aes32esi x24,x8,x3,0x2 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017e8: 00032203 lw x4,0(x6) +800017ec: 01820863 beq x4,x24,800017fc +800017f0: 1d1062ef jal x5,800081c0 +800017f4: 800017e4 .word 0x800017e4 +800017f8: 8000f7ee .word 0x8000f7ee +800017fc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x00000001 +80001800: 00062483 lw x9,0(x12) +80001804: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x80000001 +80001808: 00062b83 lw x23,0(x12) +8000180c: 00460613 addi x12,x12,4 + +80001810 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + aes32esi x3, x9, x23, 3 # perform operation +80001810: e37481b3 aes32esi x3,x9,x23,0x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001814: 00032203 lw x4,0(x6) +80001818: 00320863 beq x4,x3,80001828 +8000181c: 1a5062ef jal x5,800081c0 +80001820: 80001810 .word 0x80001810 +80001824: 8000f84a .word 0x8000f84a +80001828: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000001 +8000182c: 00062903 lw x18,0(x12) +80001830: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x7fffffff +80001834: 00062883 lw x17,0(x12) +80001838: 00460613 addi x12,x12,4 + +8000183c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + aes32esi x21, x18, x17, 0 # perform operation +8000183c: 23190ab3 aes32esi x21,x18,x17,0x0 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001840: 00032203 lw x4,0(x6) +80001844: 01520863 beq x4,x21,80001854 +80001848: 179062ef jal x5,800081c0 +8000184c: 8000183c .word 0x8000183c +80001850: 8000f8a6 .word 0x8000f8a6 +80001854: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x00000001 +80001858: 00062083 lw x1,0(x12) +8000185c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x7ffffffe +80001860: 00062a03 lw x20,0(x12) +80001864: 00460613 addi x12,x12,4 + +80001868 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + aes32esi x22, x1, x20, 1 # perform operation +80001868: 63408b33 aes32esi x22,x1,x20,0x1 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +8000186c: 00032203 lw x4,0(x6) +80001870: 01620863 beq x4,x22,80001880 +80001874: 14d062ef jal x5,800081c0 +80001878: 80001868 .word 0x80001868 +8000187c: 8000f902 .word 0x8000f902 +80001880: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000001 +80001884: 00062583 lw x11,0(x12) +80001888: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xffffffff +8000188c: 00062b83 lw x23,0(x12) +80001890: 00460613 addi x12,x12,4 + +80001894 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes32esi x27, x11, x23, 3 # perform operation +80001894: e3758db3 aes32esi x27,x11,x23,0x3 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +80001898: 00032203 lw x4,0(x6) +8000189c: 01b20863 beq x4,x27,800018ac +800018a0: 121062ef jal x5,800081c0 +800018a4: 80001894 .word 0x80001894 +800018a8: 8000f95e .word 0x8000f95e +800018ac: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x00000001 +800018b0: 00062a83 lw x21,0(x12) +800018b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xfffffffe +800018b8: 00062e83 lw x29,0(x12) +800018bc: 00460613 addi x12,x12,4 + +800018c0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes32esi x19, x21, x29, 0 # perform operation +800018c0: 23da89b3 aes32esi x19,x21,x29,0x0 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018c4: 00032203 lw x4,0(x6) +800018c8: 01320863 beq x4,x19,800018d8 +800018cc: 0f5062ef jal x5,800081c0 +800018d0: 800018c0 .word 0x800018c0 +800018d4: 8000f9ba .word 0x8000f9ba +800018d8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000001 +800018dc: 00062c83 lw x25,0(x12) +800018e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x5bbc8872 +800018e4: 00062703 lw x14,0(x12) +800018e8: 00460613 addi x12,x12,4 + +800018ec : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + aes32esi x24, x25, x14, 2 # perform operation +800018ec: a2ec8c33 aes32esi x24,x25,x14,0x2 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f0: 00032203 lw x4,0(x6) +800018f4: 01820863 beq x4,x24,80001904 +800018f8: 0c9062ef jal x5,800081c0 +800018fc: 800018ec .word 0x800018ec +80001900: 8000fa16 .word 0x8000fa16 +80001904: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x00000001 +80001908: 00062483 lw x9,0(x12) +8000190c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xaaaaaaaa +80001910: 00062c83 lw x25,0(x12) +80001914: 00460613 addi x12,x12,4 + +80001918 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + aes32esi x30, x9, x25, 2 # perform operation +80001918: a3948f33 aes32esi x30,x9,x25,0x2 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +8000191c: 00032203 lw x4,0(x6) +80001920: 01e20863 beq x4,x30,80001930 +80001924: 09d062ef jal x5,800081c0 +80001928: 80001918 .word 0x80001918 +8000192c: 8000fa72 .word 0x8000fa72 +80001930: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x00000001 +80001934: 00062783 lw x15,0(x12) +80001938: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x55555555 +8000193c: 00062183 lw x3,0(x12) +80001940: 00460613 addi x12,x12,4 + +80001944 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + aes32esi x27, x15, x3, 3 # perform operation +80001944: e2378db3 aes32esi x27,x15,x3,0x3 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001948: 00032203 lw x4,0(x6) +8000194c: 01b20863 beq x4,x27,8000195c +80001950: 071062ef jal x5,800081c0 +80001954: 80001944 .word 0x80001944 +80001958: 8000face .word 0x8000face +8000195c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x00000002 +80001960: 00062a83 lw x21,0(x12) +80001964: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000000 +80001968: 00062f03 lw x30,0(x12) +8000196c: 00460613 addi x12,x12,4 + +80001970 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes32esi x15, x21, x30, 1 # perform operation +80001970: 63ea87b3 aes32esi x15,x21,x30,0x1 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001974: 00032203 lw x4,0(x6) +80001978: 00f20863 beq x4,x15,80001988 +8000197c: 045062ef jal x5,800081c0 +80001980: 80001970 .word 0x80001970 +80001984: 8000fb2a .word 0x8000fb2a +80001988: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000002 +8000198c: 00062903 lw x18,0(x12) +80001990: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x00000001 +80001994: 00062383 lw x7,0(x12) +80001998: 00460613 addi x12,x12,4 + +8000199c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes32esi x16, x18, x7, 0 # perform operation +8000199c: 22790833 aes32esi x16,x18,x7,0x0 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a0: 00032203 lw x4,0(x6) +800019a4: 01020863 beq x4,x16,800019b4 +800019a8: 019062ef jal x5,800081c0 +800019ac: 8000199c .word 0x8000199c +800019b0: 8000fb7f .word 0x8000fb7f +800019b4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x00000002 +800019b8: 00062103 lw x2,0(x12) +800019bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000002 +800019c0: 00062b83 lw x23,0(x12) +800019c4: 00460613 addi x12,x12,4 + +800019c8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes32esi x15, x2, x23, 3 # perform operation +800019c8: e37107b3 aes32esi x15,x2,x23,0x3 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019cc: 00032203 lw x4,0(x6) +800019d0: 00f20863 beq x4,x15,800019e0 +800019d4: 7ec062ef jal x5,800081c0 +800019d8: 800019c8 .word 0x800019c8 +800019dc: 8000fbd4 .word 0x8000fbd4 +800019e0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x00000002 +800019e4: 00062f83 lw x31,0(x12) +800019e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x80000000 +800019ec: 00062e83 lw x29,0(x12) +800019f0: 00460613 addi x12,x12,4 + +800019f4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + aes32esi x27, x31, x29, 0 # perform operation +800019f4: 23df8db3 aes32esi x27,x31,x29,0x0 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019f8: 00032203 lw x4,0(x6) +800019fc: 01b20863 beq x4,x27,80001a0c +80001a00: 7c0062ef jal x5,800081c0 +80001a04: 800019f4 .word 0x800019f4 +80001a08: 8000fc29 .word 0x8000fc29 +80001a0c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000002 +80001a10: 00062e83 lw x29,0(x12) +80001a14: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x80000001 +80001a18: 00062e03 lw x28,0(x12) +80001a1c: 00460613 addi x12,x12,4 + +80001a20 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + aes32esi x24, x29, x28, 0 # perform operation +80001a20: 23ce8c33 aes32esi x24,x29,x28,0x0 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a24: 00032203 lw x4,0(x6) +80001a28: 01820863 beq x4,x24,80001a38 +80001a2c: 794062ef jal x5,800081c0 +80001a30: 80001a20 .word 0x80001a20 +80001a34: 8000fc85 .word 0x8000fc85 +80001a38: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000002 +80001a3c: 00062583 lw x11,0(x12) +80001a40: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7fffffff +80001a44: 00062b83 lw x23,0(x12) +80001a48: 00460613 addi x12,x12,4 + +80001a4c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + aes32esi x10, x11, x23, 0 # perform operation +80001a4c: 23758533 aes32esi x10,x11,x23,0x0 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a50: 00032203 lw x4,0(x6) +80001a54: 00a20863 beq x4,x10,80001a64 +80001a58: 768062ef jal x5,800081c0 +80001a5c: 80001a4c .word 0x80001a4c +80001a60: 8000fce1 .word 0x8000fce1 +80001a64: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000002 +80001a68: 00062e83 lw x29,0(x12) +80001a6c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x7ffffffe +80001a70: 00062e03 lw x28,0(x12) +80001a74: 00460613 addi x12,x12,4 + +80001a78 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + aes32esi x23, x29, x28, 2 # perform operation +80001a78: a3ce8bb3 aes32esi x23,x29,x28,0x2 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a7c: 00032203 lw x4,0(x6) +80001a80: 01720863 beq x4,x23,80001a90 +80001a84: 73c062ef jal x5,800081c0 +80001a88: 80001a78 .word 0x80001a78 +80001a8c: 8000fd3d .word 0x8000fd3d +80001a90: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x00000002 +80001a94: 00062f03 lw x30,0(x12) +80001a98: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xffffffff +80001a9c: 00062a03 lw x20,0(x12) +80001aa0: 00460613 addi x12,x12,4 + +80001aa4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes32esi x22, x30, x20, 0 # perform operation +80001aa4: 234f0b33 aes32esi x22,x30,x20,0x0 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aa8: 00032203 lw x4,0(x6) +80001aac: 01620863 beq x4,x22,80001abc +80001ab0: 710062ef jal x5,800081c0 +80001ab4: 80001aa4 .word 0x80001aa4 +80001ab8: 8000fd99 .word 0x8000fd99 +80001abc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000002 +80001ac0: 00062183 lw x3,0(x12) +80001ac4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xfffffffe +80001ac8: 00062403 lw x8,0(x12) +80001acc: 00460613 addi x12,x12,4 + +80001ad0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes32esi x15, x3, x8, 2 # perform operation +80001ad0: a28187b3 aes32esi x15,x3,x8,0x2 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ad4: 00032203 lw x4,0(x6) +80001ad8: 00f20863 beq x4,x15,80001ae8 +80001adc: 6e4062ef jal x5,800081c0 +80001ae0: 80001ad0 .word 0x80001ad0 +80001ae4: 8000fdf5 .word 0x8000fdf5 +80001ae8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x00000002 +80001aec: 00062d03 lw x26,0(x12) +80001af0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x5bbc8872 +80001af4: 00062c83 lw x25,0(x12) +80001af8: 00460613 addi x12,x12,4 + +80001afc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + aes32esi x8, x26, x25, 2 # perform operation +80001afc: a39d0433 aes32esi x8,x26,x25,0x2 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b00: 00032203 lw x4,0(x6) +80001b04: 00820863 beq x4,x8,80001b14 +80001b08: 6b8062ef jal x5,800081c0 +80001b0c: 80001afc .word 0x80001afc +80001b10: 8000fe51 .word 0x8000fe51 +80001b14: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000002 +80001b18: 00062903 lw x18,0(x12) +80001b1c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xaaaaaaaa +80001b20: 00062583 lw x11,0(x12) +80001b24: 00460613 addi x12,x12,4 + +80001b28 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + aes32esi x28, x18, x11, 1 # perform operation +80001b28: 62b90e33 aes32esi x28,x18,x11,0x1 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b2c: 00032203 lw x4,0(x6) +80001b30: 01c20863 beq x4,x28,80001b40 +80001b34: 68c062ef jal x5,800081c0 +80001b38: 80001b28 .word 0x80001b28 +80001b3c: 8000fead .word 0x8000fead +80001b40: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x00000002 +80001b44: 00062f83 lw x31,0(x12) +80001b48: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x55555555 +80001b4c: 00062f03 lw x30,0(x12) +80001b50: 00460613 addi x12,x12,4 + +80001b54 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + aes32esi x13, x31, x30, 2 # perform operation +80001b54: a3ef86b3 aes32esi x13,x31,x30,0x2 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b58: 00032203 lw x4,0(x6) +80001b5c: 00d20863 beq x4,x13,80001b6c +80001b60: 660062ef jal x5,800081c0 +80001b64: 80001b54 .word 0x80001b54 +80001b68: 8000ff09 .word 0x8000ff09 +80001b6c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x80000000 +80001b70: 00062503 lw x10,0(x12) +80001b74: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000000 +80001b78: 00062e83 lw x29,0(x12) +80001b7c: 00460613 addi x12,x12,4 + +80001b80 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + aes32esi x25, x10, x29, 3 # perform operation +80001b80: e3d50cb3 aes32esi x25,x10,x29,0x3 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b84: 00032203 lw x4,0(x6) +80001b88: 01920863 beq x4,x25,80001b98 +80001b8c: 634062ef jal x5,800081c0 +80001b90: 80001b80 .word 0x80001b80 +80001b94: 8000ff65 .word 0x8000ff65 +80001b98: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x80000000 +80001b9c: 00062a03 lw x20,0(x12) +80001ba0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000001 +80001ba4: 00062e83 lw x29,0(x12) +80001ba8: 00460613 addi x12,x12,4 + +80001bac : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + aes32esi x24, x20, x29, 1 # perform operation +80001bac: 63da0c33 aes32esi x24,x20,x29,0x1 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb0: 00032203 lw x4,0(x6) +80001bb4: 01820863 beq x4,x24,80001bc4 +80001bb8: 608062ef jal x5,800081c0 +80001bbc: 80001bac .word 0x80001bac +80001bc0: 8000ffc1 .word 0x8000ffc1 +80001bc4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x80000000 +80001bc8: 00062483 lw x9,0(x12) +80001bcc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000002 +80001bd0: 00062f03 lw x30,0(x12) +80001bd4: 00460613 addi x12,x12,4 + +80001bd8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + aes32esi x18, x9, x30, 1 # perform operation +80001bd8: 63e48933 aes32esi x18,x9,x30,0x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bdc: 00032203 lw x4,0(x6) +80001be0: 01220863 beq x4,x18,80001bf0 +80001be4: 5dc062ef jal x5,800081c0 +80001be8: 80001bd8 .word 0x80001bd8 +80001bec: 8001001d .word 0x8001001d +80001bf0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x80000000 +80001bf4: 00062e83 lw x29,0(x12) +80001bf8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x80000000 +80001bfc: 00062c03 lw x24,0(x12) +80001c00: 00460613 addi x12,x12,4 + +80001c04 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + aes32esi x21, x29, x24, 1 # perform operation +80001c04: 638e8ab3 aes32esi x21,x29,x24,0x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c08: 00032203 lw x4,0(x6) +80001c0c: 01520863 beq x4,x21,80001c1c +80001c10: 5b0062ef jal x5,800081c0 +80001c14: 80001c04 .word 0x80001c04 +80001c18: 80010079 .word 0x80010079 +80001c1c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x80000000 +80001c20: 00062503 lw x10,0(x12) +80001c24: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x80000001 +80001c28: 00062e83 lw x29,0(x12) +80001c2c: 00460613 addi x12,x12,4 + +80001c30 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + aes32esi x25, x10, x29, 2 # perform operation +80001c30: a3d50cb3 aes32esi x25,x10,x29,0x2 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c34: 00032203 lw x4,0(x6) +80001c38: 01920863 beq x4,x25,80001c48 +80001c3c: 584062ef jal x5,800081c0 +80001c40: 80001c30 .word 0x80001c30 +80001c44: 800100dc .word 0x800100dc +80001c48: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x80000000 +80001c4c: 00062183 lw x3,0(x12) +80001c50: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7fffffff +80001c54: 00062483 lw x9,0(x12) +80001c58: 00460613 addi x12,x12,4 + +80001c5c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + aes32esi x11, x3, x9, 3 # perform operation +80001c5c: e29185b3 aes32esi x11,x3,x9,0x3 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c60: 00032203 lw x4,0(x6) +80001c64: 00b20863 beq x4,x11,80001c74 +80001c68: 558062ef jal x5,800081c0 +80001c6c: 80001c5c .word 0x80001c5c +80001c70: 8001013f .word 0x8001013f +80001c74: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x80000000 +80001c78: 00062e83 lw x29,0(x12) +80001c7c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x7ffffffe +80001c80: 00062103 lw x2,0(x12) +80001c84: 00460613 addi x12,x12,4 + +80001c88 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + aes32esi x15, x29, x2, 3 # perform operation +80001c88: e22e87b3 aes32esi x15,x29,x2,0x3 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c8c: 00032203 lw x4,0(x6) +80001c90: 00f20863 beq x4,x15,80001ca0 +80001c94: 52c062ef jal x5,800081c0 +80001c98: 80001c88 .word 0x80001c88 +80001c9c: 800101a2 .word 0x800101a2 +80001ca0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000000 +80001ca4: 00062903 lw x18,0(x12) +80001ca8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xffffffff +80001cac: 00062483 lw x9,0(x12) +80001cb0: 00460613 addi x12,x12,4 + +80001cb4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + aes32esi x16, x18, x9, 2 # perform operation +80001cb4: a2990833 aes32esi x16,x18,x9,0x2 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cb8: 00032203 lw x4,0(x6) +80001cbc: 01020863 beq x4,x16,80001ccc +80001cc0: 500062ef jal x5,800081c0 +80001cc4: 80001cb4 .word 0x80001cb4 +80001cc8: 80010205 .word 0x80010205 +80001ccc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000000 +80001cd0: 00062903 lw x18,0(x12) +80001cd4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xfffffffe +80001cd8: 00062a83 lw x21,0(x12) +80001cdc: 00460613 addi x12,x12,4 + +80001ce0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + aes32esi x13, x18, x21, 1 # perform operation +80001ce0: 635906b3 aes32esi x13,x18,x21,0x1 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001ce4: 00032203 lw x4,0(x6) +80001ce8: 00d20863 beq x4,x13,80001cf8 +80001cec: 4d4062ef jal x5,800081c0 +80001cf0: 80001ce0 .word 0x80001ce0 +80001cf4: 80010268 .word 0x80010268 +80001cf8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x80000000 +80001cfc: 00062c83 lw x25,0(x12) +80001d00: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x5bbc8872 +80001d04: 00062c03 lw x24,0(x12) +80001d08: 00460613 addi x12,x12,4 + +80001d0c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + aes32esi x8, x25, x24, 0 # perform operation +80001d0c: 238c8433 aes32esi x8,x25,x24,0x0 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d10: 00032203 lw x4,0(x6) +80001d14: 00820863 beq x4,x8,80001d24 +80001d18: 4a8062ef jal x5,800081c0 +80001d1c: 80001d0c .word 0x80001d0c +80001d20: 800102cb .word 0x800102cb +80001d24: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000000 +80001d28: 00062a83 lw x21,0(x12) +80001d2c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xaaaaaaaa +80001d30: 00062783 lw x15,0(x12) +80001d34: 00460613 addi x12,x12,4 + +80001d38 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + aes32esi x20, x21, x15, 1 # perform operation +80001d38: 62fa8a33 aes32esi x20,x21,x15,0x1 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d3c: 00032203 lw x4,0(x6) +80001d40: 01420863 beq x4,x20,80001d50 +80001d44: 47c062ef jal x5,800081c0 +80001d48: 80001d38 .word 0x80001d38 +80001d4c: 8001032e .word 0x8001032e +80001d50: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x80000000 +80001d54: 00062483 lw x9,0(x12) +80001d58: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x55555555 +80001d5c: 00062c03 lw x24,0(x12) +80001d60: 00460613 addi x12,x12,4 + +80001d64 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + aes32esi x17, x9, x24, 2 # perform operation +80001d64: a38488b3 aes32esi x17,x9,x24,0x2 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d68: 00032203 lw x4,0(x6) +80001d6c: 01120863 beq x4,x17,80001d7c +80001d70: 450062ef jal x5,800081c0 +80001d74: 80001d64 .word 0x80001d64 +80001d78: 80010391 .word 0x80010391 +80001d7c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x80000001 +80001d80: 00062183 lw x3,0(x12) +80001d84: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x00000000 +80001d88: 00062a03 lw x20,0(x12) +80001d8c: 00460613 addi x12,x12,4 + +80001d90 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + aes32esi x28, x3, x20, 3 # perform operation +80001d90: e3418e33 aes32esi x28,x3,x20,0x3 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d94: 00032203 lw x4,0(x6) +80001d98: 01c20863 beq x4,x28,80001da8 +80001d9c: 424062ef jal x5,800081c0 +80001da0: 80001d90 .word 0x80001d90 +80001da4: 800103f4 .word 0x800103f4 +80001da8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x80000001 +80001dac: 00062403 lw x8,0(x12) +80001db0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x00000001 +80001db4: 00062983 lw x19,0(x12) +80001db8: 00460613 addi x12,x12,4 + +80001dbc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + aes32esi x24, x8, x19, 0 # perform operation +80001dbc: 23340c33 aes32esi x24,x8,x19,0x0 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc0: 00032203 lw x4,0(x6) +80001dc4: 01820863 beq x4,x24,80001dd4 +80001dc8: 3f8062ef jal x5,800081c0 +80001dcc: 80001dbc .word 0x80001dbc +80001dd0: 80010450 .word 0x80010450 +80001dd4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x80000001 +80001dd8: 00062083 lw x1,0(x12) +80001ddc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000002 +80001de0: 00062b03 lw x22,0(x12) +80001de4: 00460613 addi x12,x12,4 + +80001de8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + aes32esi x29, x1, x22, 0 # perform operation +80001de8: 23608eb3 aes32esi x29,x1,x22,0x0 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001dec: 00032203 lw x4,0(x6) +80001df0: 01d20863 beq x4,x29,80001e00 +80001df4: 3cc062ef jal x5,800081c0 +80001df8: 80001de8 .word 0x80001de8 +80001dfc: 800104ac .word 0x800104ac +80001e00: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x80000001 +80001e04: 00062683 lw x13,0(x12) +80001e08: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x80000000 +80001e0c: 00062883 lw x17,0(x12) +80001e10: 00460613 addi x12,x12,4 + +80001e14 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + aes32esi x20, x13, x17, 3 # perform operation +80001e14: e3168a33 aes32esi x20,x13,x17,0x3 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e18: 00032203 lw x4,0(x6) +80001e1c: 01420863 beq x4,x20,80001e2c +80001e20: 3a0062ef jal x5,800081c0 +80001e24: 80001e14 .word 0x80001e14 +80001e28: 80010508 .word 0x80010508 +80001e2c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x80000001 +80001e30: 00062b03 lw x22,0(x12) +80001e34: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000001 +80001e38: 00062d03 lw x26,0(x12) +80001e3c: 00460613 addi x12,x12,4 + +80001e40 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + aes32esi x11, x22, x26, 1 # perform operation +80001e40: 63ab05b3 aes32esi x11,x22,x26,0x1 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e44: 00032203 lw x4,0(x6) +80001e48: 00b20863 beq x4,x11,80001e58 +80001e4c: 374062ef jal x5,800081c0 +80001e50: 80001e40 .word 0x80001e40 +80001e54: 8001056b .word 0x8001056b +80001e58: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x80000001 +80001e5c: 00062983 lw x19,0(x12) +80001e60: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x7fffffff +80001e64: 00062a03 lw x20,0(x12) +80001e68: 00460613 addi x12,x12,4 + +80001e6c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + aes32esi x9, x19, x20, 1 # perform operation +80001e6c: 634984b3 aes32esi x9,x19,x20,0x1 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e70: 00032203 lw x4,0(x6) +80001e74: 00920863 beq x4,x9,80001e84 +80001e78: 348062ef jal x5,800081c0 +80001e7c: 80001e6c .word 0x80001e6c +80001e80: 800105ce .word 0x800105ce +80001e84: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x80000001 +80001e88: 00062f83 lw x31,0(x12) +80001e8c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x7ffffffe +80001e90: 00062783 lw x15,0(x12) +80001e94: 00460613 addi x12,x12,4 + +80001e98 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + aes32esi x7, x31, x15, 0 # perform operation +80001e98: 22ff83b3 aes32esi x7,x31,x15,0x0 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e9c: 00032203 lw x4,0(x6) +80001ea0: 00720863 beq x4,x7,80001eb0 +80001ea4: 31c062ef jal x5,800081c0 +80001ea8: 80001e98 .word 0x80001e98 +80001eac: 80010631 .word 0x80010631 +80001eb0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x80000001 +80001eb4: 00062c03 lw x24,0(x12) +80001eb8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xffffffff +80001ebc: 00062d83 lw x27,0(x12) +80001ec0: 00460613 addi x12,x12,4 + +80001ec4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + aes32esi x17, x24, x27, 0 # perform operation +80001ec4: 23bc08b3 aes32esi x17,x24,x27,0x0 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ec8: 00032203 lw x4,0(x6) +80001ecc: 01120863 beq x4,x17,80001edc +80001ed0: 2f0062ef jal x5,800081c0 +80001ed4: 80001ec4 .word 0x80001ec4 +80001ed8: 80010694 .word 0x80010694 +80001edc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x80000001 +80001ee0: 00062403 lw x8,0(x12) +80001ee4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xfffffffe +80001ee8: 00062683 lw x13,0(x12) +80001eec: 00460613 addi x12,x12,4 + +80001ef0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + aes32esi x31, x8, x13, 1 # perform operation +80001ef0: 62d40fb3 aes32esi x31,x8,x13,0x1 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ef4: 00032203 lw x4,0(x6) +80001ef8: 01f20863 beq x4,x31,80001f08 +80001efc: 2c4062ef jal x5,800081c0 +80001f00: 80001ef0 .word 0x80001ef0 +80001f04: 800106f7 .word 0x800106f7 +80001f08: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x80000001 +80001f0c: 00062d03 lw x26,0(x12) +80001f10: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x5bbc8872 +80001f14: 00062683 lw x13,0(x12) +80001f18: 00460613 addi x12,x12,4 + +80001f1c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + aes32esi x7, x26, x13, 1 # perform operation +80001f1c: 62dd03b3 aes32esi x7,x26,x13,0x1 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f20: 00032203 lw x4,0(x6) +80001f24: 00720863 beq x4,x7,80001f34 +80001f28: 298062ef jal x5,800081c0 +80001f2c: 80001f1c .word 0x80001f1c +80001f30: 8001075a .word 0x8001075a +80001f34: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x80000001 +80001f38: 00062d83 lw x27,0(x12) +80001f3c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xaaaaaaaa +80001f40: 00062403 lw x8,0(x12) +80001f44: 00460613 addi x12,x12,4 + +80001f48 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + aes32esi x7, x27, x8, 1 # perform operation +80001f48: 628d83b3 aes32esi x7,x27,x8,0x1 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f4c: 00032203 lw x4,0(x6) +80001f50: 00720863 beq x4,x7,80001f60 +80001f54: 26c062ef jal x5,800081c0 +80001f58: 80001f48 .word 0x80001f48 +80001f5c: 800107bd .word 0x800107bd +80001f60: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x80000001 +80001f64: 00062503 lw x10,0(x12) +80001f68: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x55555555 +80001f6c: 00062683 lw x13,0(x12) +80001f70: 00460613 addi x12,x12,4 + +80001f74 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + aes32esi x24, x10, x13, 2 # perform operation +80001f74: a2d50c33 aes32esi x24,x10,x13,0x2 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f78: 00032203 lw x4,0(x6) +80001f7c: 01820863 beq x4,x24,80001f8c +80001f80: 240062ef jal x5,800081c0 +80001f84: 80001f74 .word 0x80001f74 +80001f88: 80010820 .word 0x80010820 +80001f8c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7fffffff +80001f90: 00062383 lw x7,0(x12) +80001f94: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x00000000 +80001f98: 00062803 lw x16,0(x12) +80001f9c: 00460613 addi x12,x12,4 + +80001fa0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + aes32esi x20, x7, x16, 3 # perform operation +80001fa0: e3038a33 aes32esi x20,x7,x16,0x3 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fa4: 00032203 lw x4,0(x6) +80001fa8: 01420863 beq x4,x20,80001fb8 +80001fac: 214062ef jal x5,800081c0 +80001fb0: 80001fa0 .word 0x80001fa0 +80001fb4: 80010883 .word 0x80010883 +80001fb8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7fffffff +80001fbc: 00062083 lw x1,0(x12) +80001fc0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000001 +80001fc4: 00062b83 lw x23,0(x12) +80001fc8: 00460613 addi x12,x12,4 + +80001fcc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + aes32esi x31, x1, x23, 0 # perform operation +80001fcc: 23708fb3 aes32esi x31,x1,x23,0x0 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd0: 00032203 lw x4,0(x6) +80001fd4: 01f20863 beq x4,x31,80001fe4 +80001fd8: 1e8062ef jal x5,800081c0 +80001fdc: 80001fcc .word 0x80001fcc +80001fe0: 800108df .word 0x800108df +80001fe4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7fffffff +80001fe8: 00062383 lw x7,0(x12) +80001fec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000002 +80001ff0: 00062c83 lw x25,0(x12) +80001ff4: 00460613 addi x12,x12,4 + +80001ff8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + aes32esi x17, x7, x25, 3 # perform operation +80001ff8: e39388b3 aes32esi x17,x7,x25,0x3 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ffc: 00032203 lw x4,0(x6) +80002000: 01120863 beq x4,x17,80002010 +80002004: 1bc062ef jal x5,800081c0 +80002008: 80001ff8 .word 0x80001ff8 +8000200c: 8001093b .word 0x8001093b +80002010: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7fffffff +80002014: 00062a03 lw x20,0(x12) +80002018: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x80000000 +8000201c: 00062383 lw x7,0(x12) +80002020: 00460613 addi x12,x12,4 + +80002024 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + aes32esi x27, x20, x7, 2 # perform operation +80002024: a27a0db3 aes32esi x27,x20,x7,0x2 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002028: 00032203 lw x4,0(x6) +8000202c: 01b20863 beq x4,x27,8000203c +80002030: 190062ef jal x5,800081c0 +80002034: 80002024 .word 0x80002024 +80002038: 80010997 .word 0x80010997 +8000203c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7fffffff +80002040: 00062483 lw x9,0(x12) +80002044: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x80000001 +80002048: 00062f03 lw x30,0(x12) +8000204c: 00460613 addi x12,x12,4 + +80002050 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + aes32esi x8, x9, x30, 0 # perform operation +80002050: 23e48433 aes32esi x8,x9,x30,0x0 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002054: 00032203 lw x4,0(x6) +80002058: 00820863 beq x4,x8,80002068 +8000205c: 164062ef jal x5,800081c0 +80002060: 80002050 .word 0x80002050 +80002064: 800109fa .word 0x800109fa +80002068: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x7fffffff +8000206c: 00062983 lw x19,0(x12) +80002070: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7fffffff +80002074: 00062c03 lw x24,0(x12) +80002078: 00460613 addi x12,x12,4 + +8000207c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + aes32esi x7, x19, x24, 1 # perform operation +8000207c: 638983b3 aes32esi x7,x19,x24,0x1 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002080: 00032203 lw x4,0(x6) +80002084: 00720863 beq x4,x7,80002094 +80002088: 138062ef jal x5,800081c0 +8000208c: 8000207c .word 0x8000207c +80002090: 80010a5d .word 0x80010a5d +80002094: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7fffffff +80002098: 00062a03 lw x20,0(x12) +8000209c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7ffffffe +800020a0: 00062f03 lw x30,0(x12) +800020a4: 00460613 addi x12,x12,4 + +800020a8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + aes32esi x31, x20, x30, 3 # perform operation +800020a8: e3ea0fb3 aes32esi x31,x20,x30,0x3 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020ac: 00032203 lw x4,0(x6) +800020b0: 01f20863 beq x4,x31,800020c0 +800020b4: 10c062ef jal x5,800081c0 +800020b8: 800020a8 .word 0x800020a8 +800020bc: 80010ac0 .word 0x80010ac0 +800020c0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x7fffffff +800020c4: 00062c03 lw x24,0(x12) +800020c8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xffffffff +800020cc: 00062083 lw x1,0(x12) +800020d0: 00460613 addi x12,x12,4 + +800020d4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + aes32esi x18, x24, x1, 1 # perform operation +800020d4: 621c0933 aes32esi x18,x24,x1,0x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020d8: 00032203 lw x4,0(x6) +800020dc: 01220863 beq x4,x18,800020ec +800020e0: 0e0062ef jal x5,800081c0 +800020e4: 800020d4 .word 0x800020d4 +800020e8: 80010b23 .word 0x80010b23 +800020ec: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x7fffffff +800020f0: 00062a83 lw x21,0(x12) +800020f4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xfffffffe +800020f8: 00062783 lw x15,0(x12) +800020fc: 00460613 addi x12,x12,4 + +80002100 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + aes32esi x25, x21, x15, 3 # perform operation +80002100: e2fa8cb3 aes32esi x25,x21,x15,0x3 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002104: 00032203 lw x4,0(x6) +80002108: 01920863 beq x4,x25,80002118 +8000210c: 0b4062ef jal x5,800081c0 +80002110: 80002100 .word 0x80002100 +80002114: 80010b86 .word 0x80010b86 +80002118: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x7fffffff +8000211c: 00062183 lw x3,0(x12) +80002120: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x5bbc8872 +80002124: 00062f83 lw x31,0(x12) +80002128: 00460613 addi x12,x12,4 + +8000212c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + aes32esi x13, x3, x31, 0 # perform operation +8000212c: 23f186b3 aes32esi x13,x3,x31,0x0 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002130: 00032203 lw x4,0(x6) +80002134: 00d20863 beq x4,x13,80002144 +80002138: 088062ef jal x5,800081c0 +8000213c: 8000212c .word 0x8000212c +80002140: 80010be9 .word 0x80010be9 +80002144: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x7fffffff +80002148: 00062903 lw x18,0(x12) +8000214c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xaaaaaaaa +80002150: 00062083 lw x1,0(x12) +80002154: 00460613 addi x12,x12,4 + +80002158 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + aes32esi x25, x18, x1, 0 # perform operation +80002158: 22190cb3 aes32esi x25,x18,x1,0x0 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +8000215c: 00032203 lw x4,0(x6) +80002160: 01920863 beq x4,x25,80002170 +80002164: 05c062ef jal x5,800081c0 +80002168: 80002158 .word 0x80002158 +8000216c: 80010c4c .word 0x80010c4c +80002170: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7fffffff +80002174: 00062383 lw x7,0(x12) +80002178: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x55555555 +8000217c: 00062d83 lw x27,0(x12) +80002180: 00460613 addi x12,x12,4 + +80002184 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + aes32esi x19, x7, x27, 2 # perform operation +80002184: a3b389b3 aes32esi x19,x7,x27,0x2 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002188: 00032203 lw x4,0(x6) +8000218c: 01320863 beq x4,x19,8000219c +80002190: 030062ef jal x5,800081c0 +80002194: 80002184 .word 0x80002184 +80002198: 80010caf .word 0x80010caf +8000219c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x7ffffffe +800021a0: 00062183 lw x3,0(x12) +800021a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000000 +800021a8: 00062e83 lw x29,0(x12) +800021ac: 00460613 addi x12,x12,4 + +800021b0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + aes32esi x13, x3, x29, 3 # perform operation +800021b0: e3d186b3 aes32esi x13,x3,x29,0x3 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021b4: 00032203 lw x4,0(x6) +800021b8: 00d20863 beq x4,x13,800021c8 +800021bc: 004062ef jal x5,800081c0 +800021c0: 800021b0 .word 0x800021b0 +800021c4: 80010d12 .word 0x80010d12 +800021c8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x7ffffffe +800021cc: 00062183 lw x3,0(x12) +800021d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000001 +800021d4: 00062e03 lw x28,0(x12) +800021d8: 00460613 addi x12,x12,4 + +800021dc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + aes32esi x23, x3, x28, 3 # perform operation +800021dc: e3c18bb3 aes32esi x23,x3,x28,0x3 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e0: 00032203 lw x4,0(x6) +800021e4: 01720863 beq x4,x23,800021f4 +800021e8: 7d9052ef jal x5,800081c0 +800021ec: 800021dc .word 0x800021dc +800021f0: 80010d6e .word 0x80010d6e +800021f4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7ffffffe +800021f8: 00062083 lw x1,0(x12) +800021fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x00000002 +80002200: 00062183 lw x3,0(x12) +80002204: 00460613 addi x12,x12,4 + +80002208 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + aes32esi x23, x1, x3, 0 # perform operation +80002208: 22308bb3 aes32esi x23,x1,x3,0x0 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +8000220c: 00032203 lw x4,0(x6) +80002210: 01720863 beq x4,x23,80002220 +80002214: 7ad052ef jal x5,800081c0 +80002218: 80002208 .word 0x80002208 +8000221c: 80010dca .word 0x80010dca +80002220: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x7ffffffe +80002224: 00062803 lw x16,0(x12) +80002228: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x80000000 +8000222c: 00062b83 lw x23,0(x12) +80002230: 00460613 addi x12,x12,4 + +80002234 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + aes32esi x2, x16, x23, 0 # perform operation +80002234: 23780133 aes32esi x2,x16,x23,0x0 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002238: 00032203 lw x4,0(x6) +8000223c: 00220863 beq x4,x2,8000224c +80002240: 781052ef jal x5,800081c0 +80002244: 80002234 .word 0x80002234 +80002248: 80010e26 .word 0x80010e26 +8000224c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7ffffffe +80002250: 00062f03 lw x30,0(x12) +80002254: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x80000001 +80002258: 00062e03 lw x28,0(x12) +8000225c: 00460613 addi x12,x12,4 + +80002260 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + aes32esi x7, x30, x28, 0 # perform operation +80002260: 23cf03b3 aes32esi x7,x30,x28,0x0 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002264: 00032203 lw x4,0(x6) +80002268: 00720863 beq x4,x7,80002278 +8000226c: 755052ef jal x5,800081c0 +80002270: 80002260 .word 0x80002260 +80002274: 80010e89 .word 0x80010e89 +80002278: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x7ffffffe +8000227c: 00062683 lw x13,0(x12) +80002280: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x7fffffff +80002284: 00062583 lw x11,0(x12) +80002288: 00460613 addi x12,x12,4 + +8000228c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + aes32esi x25, x13, x11, 3 # perform operation +8000228c: e2b68cb3 aes32esi x25,x13,x11,0x3 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002290: 00032203 lw x4,0(x6) +80002294: 01920863 beq x4,x25,800022a4 +80002298: 729052ef jal x5,800081c0 +8000229c: 8000228c .word 0x8000228c +800022a0: 80010eec .word 0x80010eec +800022a4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x7ffffffe +800022a8: 00062b03 lw x22,0(x12) +800022ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x7ffffffe +800022b0: 00062883 lw x17,0(x12) +800022b4: 00460613 addi x12,x12,4 + +800022b8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + aes32esi x26, x22, x17, 0 # perform operation +800022b8: 231b0d33 aes32esi x26,x22,x17,0x0 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022bc: 00032203 lw x4,0(x6) +800022c0: 01a20863 beq x4,x26,800022d0 +800022c4: 6fd052ef jal x5,800081c0 +800022c8: 800022b8 .word 0x800022b8 +800022cc: 80010f4f .word 0x80010f4f +800022d0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x7ffffffe +800022d4: 00062d03 lw x26,0(x12) +800022d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xffffffff +800022dc: 00062483 lw x9,0(x12) +800022e0: 00460613 addi x12,x12,4 + +800022e4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + aes32esi x28, x26, x9, 2 # perform operation +800022e4: a29d0e33 aes32esi x28,x26,x9,0x2 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022e8: 00032203 lw x4,0(x6) +800022ec: 01c20863 beq x4,x28,800022fc +800022f0: 6d1052ef jal x5,800081c0 +800022f4: 800022e4 .word 0x800022e4 +800022f8: 80010fb2 .word 0x80010fb2 +800022fc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x7ffffffe +80002300: 00062903 lw x18,0(x12) +80002304: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xfffffffe +80002308: 00062a03 lw x20,0(x12) +8000230c: 00460613 addi x12,x12,4 + +80002310 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + aes32esi x10, x18, x20, 1 # perform operation +80002310: 63490533 aes32esi x10,x18,x20,0x1 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002314: 00032203 lw x4,0(x6) +80002318: 00a20863 beq x4,x10,80002328 +8000231c: 6a5052ef jal x5,800081c0 +80002320: 80002310 .word 0x80002310 +80002324: 80011015 .word 0x80011015 +80002328: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x7ffffffe +8000232c: 00062c83 lw x25,0(x12) +80002330: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x5bbc8872 +80002334: 00062e83 lw x29,0(x12) +80002338: 00460613 addi x12,x12,4 + +8000233c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + aes32esi x13, x25, x29, 1 # perform operation +8000233c: 63dc86b3 aes32esi x13,x25,x29,0x1 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002340: 00032203 lw x4,0(x6) +80002344: 00d20863 beq x4,x13,80002354 +80002348: 679052ef jal x5,800081c0 +8000234c: 8000233c .word 0x8000233c +80002350: 80011078 .word 0x80011078 +80002354: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7ffffffe +80002358: 00062f03 lw x30,0(x12) +8000235c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xaaaaaaaa +80002360: 00062e03 lw x28,0(x12) +80002364: 00460613 addi x12,x12,4 + +80002368 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + aes32esi x21, x30, x28, 3 # perform operation +80002368: e3cf0ab3 aes32esi x21,x30,x28,0x3 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +8000236c: 00032203 lw x4,0(x6) +80002370: 01520863 beq x4,x21,80002380 +80002374: 64d052ef jal x5,800081c0 +80002378: 80002368 .word 0x80002368 +8000237c: 800110db .word 0x800110db +80002380: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7ffffffe +80002384: 00062783 lw x15,0(x12) +80002388: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x55555555 +8000238c: 00062403 lw x8,0(x12) +80002390: 00460613 addi x12,x12,4 + +80002394 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + aes32esi x13, x15, x8, 1 # perform operation +80002394: 628786b3 aes32esi x13,x15,x8,0x1 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +80002398: 00032203 lw x4,0(x6) +8000239c: 00d20863 beq x4,x13,800023ac +800023a0: 621052ef jal x5,800081c0 +800023a4: 80002394 .word 0x80002394 +800023a8: 8001113e .word 0x8001113e +800023ac: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xffffffff +800023b0: 00062f03 lw x30,0(x12) +800023b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000000 +800023b8: 00062c03 lw x24,0(x12) +800023bc: 00460613 addi x12,x12,4 + +800023c0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes32esi x26, x30, x24, 2 # perform operation +800023c0: a38f0d33 aes32esi x26,x30,x24,0x2 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023c4: 00032203 lw x4,0(x6) +800023c8: 01a20863 beq x4,x26,800023d8 +800023cc: 5f5052ef jal x5,800081c0 +800023d0: 800023c0 .word 0x800023c0 +800023d4: 800111a1 .word 0x800111a1 +800023d8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xffffffff +800023dc: 00062103 lw x2,0(x12) +800023e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000001 +800023e4: 00062e83 lw x29,0(x12) +800023e8: 00460613 addi x12,x12,4 + +800023ec : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes32esi x15, x2, x29, 1 # perform operation +800023ec: 63d107b3 aes32esi x15,x2,x29,0x1 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f0: 00032203 lw x4,0(x6) +800023f4: 00f20863 beq x4,x15,80002404 +800023f8: 5c9052ef jal x5,800081c0 +800023fc: 800023ec .word 0x800023ec +80002400: 800111fd .word 0x800111fd +80002404: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xffffffff +80002408: 00062503 lw x10,0(x12) +8000240c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000002 +80002410: 00062e03 lw x28,0(x12) +80002414: 00460613 addi x12,x12,4 + +80002418 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes32esi x7, x10, x28, 0 # perform operation +80002418: 23c503b3 aes32esi x7,x10,x28,0x0 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +8000241c: 00032203 lw x4,0(x6) +80002420: 00720863 beq x4,x7,80002430 +80002424: 59d052ef jal x5,800081c0 +80002428: 80002418 .word 0x80002418 +8000242c: 80011259 .word 0x80011259 +80002430: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xffffffff +80002434: 00062c83 lw x25,0(x12) +80002438: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x80000000 +8000243c: 00062d83 lw x27,0(x12) +80002440: 00460613 addi x12,x12,4 + +80002444 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + aes32esi x31, x25, x27, 3 # perform operation +80002444: e3bc8fb3 aes32esi x31,x25,x27,0x3 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002448: 00032203 lw x4,0(x6) +8000244c: 01f20863 beq x4,x31,8000245c +80002450: 571052ef jal x5,800081c0 +80002454: 80002444 .word 0x80002444 +80002458: 800112b5 .word 0x800112b5 +8000245c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xffffffff +80002460: 00062503 lw x10,0(x12) +80002464: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000001 +80002468: 00062d03 lw x26,0(x12) +8000246c: 00460613 addi x12,x12,4 + +80002470 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + aes32esi x28, x10, x26, 3 # perform operation +80002470: e3a50e33 aes32esi x28,x10,x26,0x3 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002474: 00032203 lw x4,0(x6) +80002478: 01c20863 beq x4,x28,80002488 +8000247c: 545052ef jal x5,800081c0 +80002480: 80002470 .word 0x80002470 +80002484: 80011318 .word 0x80011318 +80002488: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +8000248c: 00062783 lw x15,0(x12) +80002490: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7fffffff +80002494: 00062c03 lw x24,0(x12) +80002498: 00460613 addi x12,x12,4 + +8000249c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + aes32esi x11, x15, x24, 3 # perform operation +8000249c: e38785b3 aes32esi x11,x15,x24,0x3 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a0: 00032203 lw x4,0(x6) +800024a4: 00b20863 beq x4,x11,800024b4 +800024a8: 519052ef jal x5,800081c0 +800024ac: 8000249c .word 0x8000249c +800024b0: 8001137b .word 0x8001137b +800024b4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xffffffff +800024b8: 00062903 lw x18,0(x12) +800024bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7ffffffe +800024c0: 00062b83 lw x23,0(x12) +800024c4: 00460613 addi x12,x12,4 + +800024c8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + aes32esi x24, x18, x23, 0 # perform operation +800024c8: 23790c33 aes32esi x24,x18,x23,0x0 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024cc: 00032203 lw x4,0(x6) +800024d0: 01820863 beq x4,x24,800024e0 +800024d4: 4ed052ef jal x5,800081c0 +800024d8: 800024c8 .word 0x800024c8 +800024dc: 800113de .word 0x800113de +800024e0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xffffffff +800024e4: 00062483 lw x9,0(x12) +800024e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xffffffff +800024ec: 00062c83 lw x25,0(x12) +800024f0: 00460613 addi x12,x12,4 + +800024f4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes32esi x18, x9, x25, 2 # perform operation +800024f4: a3948933 aes32esi x18,x9,x25,0x2 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024f8: 00032203 lw x4,0(x6) +800024fc: 01220863 beq x4,x18,8000250c +80002500: 4c1052ef jal x5,800081c0 +80002504: 800024f4 .word 0x800024f4 +80002508: 80011441 .word 0x80011441 +8000250c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xffffffff +80002510: 00062703 lw x14,0(x12) +80002514: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xfffffffe +80002518: 00062e03 lw x28,0(x12) +8000251c: 00460613 addi x12,x12,4 + +80002520 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes32esi x21, x14, x28, 0 # perform operation +80002520: 23c70ab3 aes32esi x21,x14,x28,0x0 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002524: 00032203 lw x4,0(x6) +80002528: 01520863 beq x4,x21,80002538 +8000252c: 495052ef jal x5,800081c0 +80002530: 80002520 .word 0x80002520 +80002534: 800114a4 .word 0x800114a4 +80002538: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +8000253c: 00062783 lw x15,0(x12) +80002540: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x5bbc8872 +80002544: 00062703 lw x14,0(x12) +80002548: 00460613 addi x12,x12,4 + +8000254c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + aes32esi x23, x15, x14, 0 # perform operation +8000254c: 22e78bb3 aes32esi x23,x15,x14,0x0 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002550: 00032203 lw x4,0(x6) +80002554: 01720863 beq x4,x23,80002564 +80002558: 469052ef jal x5,800081c0 +8000255c: 8000254c .word 0x8000254c +80002560: 80011507 .word 0x80011507 +80002564: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xffffffff +80002568: 00062983 lw x19,0(x12) +8000256c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xaaaaaaaa +80002570: 00062503 lw x10,0(x12) +80002574: 00460613 addi x12,x12,4 + +80002578 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + aes32esi x25, x19, x10, 1 # perform operation +80002578: 62a98cb3 aes32esi x25,x19,x10,0x1 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +8000257c: 00032203 lw x4,0(x6) +80002580: 01920863 beq x4,x25,80002590 +80002584: 43d052ef jal x5,800081c0 +80002588: 80002578 .word 0x80002578 +8000258c: 8001156a .word 0x8001156a +80002590: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xffffffff +80002594: 00062f03 lw x30,0(x12) +80002598: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x55555555 +8000259c: 00062a03 lw x20,0(x12) +800025a0: 00460613 addi x12,x12,4 + +800025a4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + aes32esi x13, x30, x20, 1 # perform operation +800025a4: 634f06b3 aes32esi x13,x30,x20,0x1 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025a8: 00032203 lw x4,0(x6) +800025ac: 00d20863 beq x4,x13,800025bc +800025b0: 411052ef jal x5,800081c0 +800025b4: 800025a4 .word 0x800025a4 +800025b8: 800115cd .word 0x800115cd +800025bc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xfffffffe +800025c0: 00062383 lw x7,0(x12) +800025c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x00000000 +800025c8: 00062703 lw x14,0(x12) +800025cc: 00460613 addi x12,x12,4 + +800025d0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes32esi x24, x7, x14, 2 # perform operation +800025d0: a2e38c33 aes32esi x24,x7,x14,0x2 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025d4: 00032203 lw x4,0(x6) +800025d8: 01820863 beq x4,x24,800025e8 +800025dc: 3e5052ef jal x5,800081c0 +800025e0: 800025d0 .word 0x800025d0 +800025e4: 80011630 .word 0x80011630 +800025e8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xfffffffe +800025ec: 00062e83 lw x29,0(x12) +800025f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x00000001 +800025f4: 00062583 lw x11,0(x12) +800025f8: 00460613 addi x12,x12,4 + +800025fc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes32esi x15, x29, x11, 1 # perform operation +800025fc: 62be87b3 aes32esi x15,x29,x11,0x1 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002600: 00032203 lw x4,0(x6) +80002604: 00f20863 beq x4,x15,80002614 +80002608: 3b9052ef jal x5,800081c0 +8000260c: 800025fc .word 0x800025fc +80002610: 8001168c .word 0x8001168c +80002614: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xfffffffe +80002618: 00062703 lw x14,0(x12) +8000261c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000002 +80002620: 00062f03 lw x30,0(x12) +80002624: 00460613 addi x12,x12,4 + +80002628 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes32esi x11, x14, x30, 0 # perform operation +80002628: 23e705b3 aes32esi x11,x14,x30,0x0 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +8000262c: 00032203 lw x4,0(x6) +80002630: 00b20863 beq x4,x11,80002640 +80002634: 38d052ef jal x5,800081c0 +80002638: 80002628 .word 0x80002628 +8000263c: 800116e8 .word 0x800116e8 +80002640: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xfffffffe +80002644: 00062483 lw x9,0(x12) +80002648: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x80000000 +8000264c: 00062383 lw x7,0(x12) +80002650: 00460613 addi x12,x12,4 + +80002654 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + aes32esi x17, x9, x7, 0 # perform operation +80002654: 227488b3 aes32esi x17,x9,x7,0x0 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002658: 00032203 lw x4,0(x6) +8000265c: 01120863 beq x4,x17,8000266c +80002660: 361052ef jal x5,800081c0 +80002664: 80002654 .word 0x80002654 +80002668: 80011744 .word 0x80011744 +8000266c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xfffffffe +80002670: 00062f03 lw x30,0(x12) +80002674: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000001 +80002678: 00062483 lw x9,0(x12) +8000267c: 00460613 addi x12,x12,4 + +80002680 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + aes32esi x31, x30, x9, 1 # perform operation +80002680: 629f0fb3 aes32esi x31,x30,x9,0x1 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002684: 00032203 lw x4,0(x6) +80002688: 01f20863 beq x4,x31,80002698 +8000268c: 335052ef jal x5,800081c0 +80002690: 80002680 .word 0x80002680 +80002694: 800117a7 .word 0x800117a7 +80002698: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xfffffffe +8000269c: 00062583 lw x11,0(x12) +800026a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x7fffffff +800026a4: 00062103 lw x2,0(x12) +800026a8: 00460613 addi x12,x12,4 + +800026ac : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + aes32esi x1, x11, x2, 2 # perform operation +800026ac: a22580b3 aes32esi x1,x11,x2,0x2 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b0: 00032203 lw x4,0(x6) +800026b4: 00120863 beq x4,x1,800026c4 +800026b8: 309052ef jal x5,800081c0 +800026bc: 800026ac .word 0x800026ac +800026c0: 8001180a .word 0x8001180a +800026c4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xfffffffe +800026c8: 00062b03 lw x22,0(x12) +800026cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x7ffffffe +800026d0: 00062383 lw x7,0(x12) +800026d4: 00460613 addi x12,x12,4 + +800026d8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + aes32esi x9, x22, x7, 1 # perform operation +800026d8: 627b04b3 aes32esi x9,x22,x7,0x1 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026dc: 00032203 lw x4,0(x6) +800026e0: 00920863 beq x4,x9,800026f0 +800026e4: 2dd052ef jal x5,800081c0 +800026e8: 800026d8 .word 0x800026d8 +800026ec: 8001186d .word 0x8001186d +800026f0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xfffffffe +800026f4: 00062b83 lw x23,0(x12) +800026f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xffffffff +800026fc: 00062e03 lw x28,0(x12) +80002700: 00460613 addi x12,x12,4 + +80002704 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes32esi x10, x23, x28, 0 # perform operation +80002704: 23cb8533 aes32esi x10,x23,x28,0x0 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002708: 00032203 lw x4,0(x6) +8000270c: 00a20863 beq x4,x10,8000271c +80002710: 2b1052ef jal x5,800081c0 +80002714: 80002704 .word 0x80002704 +80002718: 800118d0 .word 0x800118d0 +8000271c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xfffffffe +80002720: 00062983 lw x19,0(x12) +80002724: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xfffffffe +80002728: 00062c83 lw x25,0(x12) +8000272c: 00460613 addi x12,x12,4 + +80002730 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes32esi x14, x19, x25, 3 # perform operation +80002730: e3998733 aes32esi x14,x19,x25,0x3 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002734: 00032203 lw x4,0(x6) +80002738: 00e20863 beq x4,x14,80002748 +8000273c: 285052ef jal x5,800081c0 +80002740: 80002730 .word 0x80002730 +80002744: 80011933 .word 0x80011933 +80002748: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xfffffffe +8000274c: 00062583 lw x11,0(x12) +80002750: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x5bbc8872 +80002754: 00062083 lw x1,0(x12) +80002758: 00460613 addi x12,x12,4 + +8000275c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + aes32esi x21, x11, x1, 1 # perform operation +8000275c: 62158ab3 aes32esi x21,x11,x1,0x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002760: 00032203 lw x4,0(x6) +80002764: 01520863 beq x4,x21,80002774 +80002768: 259052ef jal x5,800081c0 +8000276c: 8000275c .word 0x8000275c +80002770: 80011996 .word 0x80011996 +80002774: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xfffffffe +80002778: 00062583 lw x11,0(x12) +8000277c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xaaaaaaaa +80002780: 00062683 lw x13,0(x12) +80002784: 00460613 addi x12,x12,4 + +80002788 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + aes32esi x19, x11, x13, 1 # perform operation +80002788: 62d589b3 aes32esi x19,x11,x13,0x1 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +8000278c: 00032203 lw x4,0(x6) +80002790: 01320863 beq x4,x19,800027a0 +80002794: 22d052ef jal x5,800081c0 +80002798: 80002788 .word 0x80002788 +8000279c: 800119f9 .word 0x800119f9 +800027a0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xfffffffe +800027a4: 00062803 lw x16,0(x12) +800027a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x55555555 +800027ac: 00062403 lw x8,0(x12) +800027b0: 00460613 addi x12,x12,4 + +800027b4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + aes32esi x19, x16, x8, 0 # perform operation +800027b4: 228809b3 aes32esi x19,x16,x8,0x0 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027b8: 00032203 lw x4,0(x6) +800027bc: 01320863 beq x4,x19,800027cc +800027c0: 201052ef jal x5,800081c0 +800027c4: 800027b4 .word 0x800027b4 +800027c8: 80011a5c .word 0x80011a5c +800027cc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5bbc8872 +800027d0: 00062e83 lw x29,0(x12) +800027d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x00000000 +800027d8: 00062f83 lw x31,0(x12) +800027dc: 00460613 addi x12,x12,4 + +800027e0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + aes32esi x21, x29, x31, 1 # perform operation +800027e0: 63fe8ab3 aes32esi x21,x29,x31,0x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027e4: 00032203 lw x4,0(x6) +800027e8: 01520863 beq x4,x21,800027f8 +800027ec: 1d5052ef jal x5,800081c0 +800027f0: 800027e0 .word 0x800027e0 +800027f4: 80011abf .word 0x80011abf +800027f8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +800027fc: 00062583 lw x11,0(x12) +80002800: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x00000001 +80002804: 00062483 lw x9,0(x12) +80002808: 00460613 addi x12,x12,4 + +8000280c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + aes32esi x23, x11, x9, 3 # perform operation +8000280c: e2958bb3 aes32esi x23,x11,x9,0x3 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002810: 00032203 lw x4,0(x6) +80002814: 01720863 beq x4,x23,80002824 +80002818: 1a9052ef jal x5,800081c0 +8000281c: 8000280c .word 0x8000280c +80002820: 80011b1b .word 0x80011b1b +80002824: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x5bbc8872 +80002828: 00062483 lw x9,0(x12) +8000282c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x00000002 +80002830: 00062383 lw x7,0(x12) +80002834: 00460613 addi x12,x12,4 + +80002838 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + aes32esi x3, x9, x7, 0 # perform operation +80002838: 227481b3 aes32esi x3,x9,x7,0x0 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +8000283c: 00032203 lw x4,0(x6) +80002840: 00320863 beq x4,x3,80002850 +80002844: 17d052ef jal x5,800081c0 +80002848: 80002838 .word 0x80002838 +8000284c: 80011b77 .word 0x80011b77 +80002850: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x5bbc8872 +80002854: 00062483 lw x9,0(x12) +80002858: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000000 +8000285c: 00062d03 lw x26,0(x12) +80002860: 00460613 addi x12,x12,4 + +80002864 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + aes32esi x27, x9, x26, 1 # perform operation +80002864: 63a48db3 aes32esi x27,x9,x26,0x1 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002868: 00032203 lw x4,0(x6) +8000286c: 01b20863 beq x4,x27,8000287c +80002870: 151052ef jal x5,800081c0 +80002874: 80002864 .word 0x80002864 +80002878: 80011bd3 .word 0x80011bd3 +8000287c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x5bbc8872 +80002880: 00062e03 lw x28,0(x12) +80002884: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000001 +80002888: 00062483 lw x9,0(x12) +8000288c: 00460613 addi x12,x12,4 + +80002890 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + aes32esi x23, x28, x9, 1 # perform operation +80002890: 629e0bb3 aes32esi x23,x28,x9,0x1 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002894: 00032203 lw x4,0(x6) +80002898: 01720863 beq x4,x23,800028a8 +8000289c: 125052ef jal x5,800081c0 +800028a0: 80002890 .word 0x80002890 +800028a4: 80011c36 .word 0x80011c36 +800028a8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x5bbc8872 +800028ac: 00062e03 lw x28,0(x12) +800028b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x7fffffff +800028b4: 00062a83 lw x21,0(x12) +800028b8: 00460613 addi x12,x12,4 + +800028bc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + aes32esi x2, x28, x21, 1 # perform operation +800028bc: 635e0133 aes32esi x2,x28,x21,0x1 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c0: 00032203 lw x4,0(x6) +800028c4: 00220863 beq x4,x2,800028d4 +800028c8: 0f9052ef jal x5,800081c0 +800028cc: 800028bc .word 0x800028bc +800028d0: 80011c99 .word 0x80011c99 +800028d4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x5bbc8872 +800028d8: 00062383 lw x7,0(x12) +800028dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7ffffffe +800028e0: 00062d03 lw x26,0(x12) +800028e4: 00460613 addi x12,x12,4 + +800028e8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + aes32esi x18, x7, x26, 2 # perform operation +800028e8: a3a38933 aes32esi x18,x7,x26,0x2 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028ec: 00032203 lw x4,0(x6) +800028f0: 01220863 beq x4,x18,80002900 +800028f4: 0cd052ef jal x5,800081c0 +800028f8: 800028e8 .word 0x800028e8 +800028fc: 80011cfc .word 0x80011cfc +80002900: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x5bbc8872 +80002904: 00062983 lw x19,0(x12) +80002908: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xffffffff +8000290c: 00062c83 lw x25,0(x12) +80002910: 00460613 addi x12,x12,4 + +80002914 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + aes32esi x11, x19, x25, 1 # perform operation +80002914: 639985b3 aes32esi x11,x19,x25,0x1 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002918: 00032203 lw x4,0(x6) +8000291c: 00b20863 beq x4,x11,8000292c +80002920: 0a1052ef jal x5,800081c0 +80002924: 80002914 .word 0x80002914 +80002928: 80011d5f .word 0x80011d5f +8000292c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5bbc8872 +80002930: 00062e83 lw x29,0(x12) +80002934: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xfffffffe +80002938: 00062c03 lw x24,0(x12) +8000293c: 00460613 addi x12,x12,4 + +80002940 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + aes32esi x31, x29, x24, 2 # perform operation +80002940: a38e8fb3 aes32esi x31,x29,x24,0x2 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002944: 00032203 lw x4,0(x6) +80002948: 01f20863 beq x4,x31,80002958 +8000294c: 075052ef jal x5,800081c0 +80002950: 80002940 .word 0x80002940 +80002954: 80011dc2 .word 0x80011dc2 +80002958: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x5bbc8872 +8000295c: 00062183 lw x3,0(x12) +80002960: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x5bbc8872 +80002964: 00062983 lw x19,0(x12) +80002968: 00460613 addi x12,x12,4 + +8000296c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + aes32esi x10, x3, x19, 3 # perform operation +8000296c: e3318533 aes32esi x10,x3,x19,0x3 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002970: 00032203 lw x4,0(x6) +80002974: 00a20863 beq x4,x10,80002984 +80002978: 049052ef jal x5,800081c0 +8000297c: 8000296c .word 0x8000296c +80002980: 80011e25 .word 0x80011e25 +80002984: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x5bbc8872 +80002988: 00062f03 lw x30,0(x12) +8000298c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xaaaaaaaa +80002990: 00062583 lw x11,0(x12) +80002994: 00460613 addi x12,x12,4 + +80002998 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + aes32esi x26, x30, x11, 3 # perform operation +80002998: e2bf0d33 aes32esi x26,x30,x11,0x3 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +8000299c: 00032203 lw x4,0(x6) +800029a0: 01a20863 beq x4,x26,800029b0 +800029a4: 01d052ef jal x5,800081c0 +800029a8: 80002998 .word 0x80002998 +800029ac: 80011e88 .word 0x80011e88 +800029b0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +800029b4: 00062583 lw x11,0(x12) +800029b8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x55555555 +800029bc: 00062d03 lw x26,0(x12) +800029c0: 00460613 addi x12,x12,4 + +800029c4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + aes32esi x29, x11, x26, 1 # perform operation +800029c4: 63a58eb3 aes32esi x29,x11,x26,0x1 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029c8: 00032203 lw x4,0(x6) +800029cc: 01d20863 beq x4,x29,800029dc +800029d0: 7f0052ef jal x5,800081c0 +800029d4: 800029c4 .word 0x800029c4 +800029d8: 80011eeb .word 0x80011eeb +800029dc: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xaaaaaaaa +800029e0: 00062383 lw x7,0(x12) +800029e4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x00000000 +800029e8: 00062503 lw x10,0(x12) +800029ec: 00460613 addi x12,x12,4 + +800029f0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + aes32esi x21, x7, x10, 1 # perform operation +800029f0: 62a38ab3 aes32esi x21,x7,x10,0x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029f4: 00032203 lw x4,0(x6) +800029f8: 01520863 beq x4,x21,80002a08 +800029fc: 7c4052ef jal x5,800081c0 +80002a00: 800029f0 .word 0x800029f0 +80002a04: 80011f4e .word 0x80011f4e +80002a08: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xaaaaaaaa +80002a0c: 00062583 lw x11,0(x12) +80002a10: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +80002a14: 00062c83 lw x25,0(x12) +80002a18: 00460613 addi x12,x12,4 + +80002a1c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + aes32esi x1, x11, x25, 0 # perform operation +80002a1c: 239580b3 aes32esi x1,x11,x25,0x0 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a20: 00032203 lw x4,0(x6) +80002a24: 00120863 beq x4,x1,80002a34 +80002a28: 798052ef jal x5,800081c0 +80002a2c: 80002a1c .word 0x80002a1c +80002a30: 80011faa .word 0x80011faa +80002a34: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xaaaaaaaa +80002a38: 00062b83 lw x23,0(x12) +80002a3c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x00000002 +80002a40: 00062f83 lw x31,0(x12) +80002a44: 00460613 addi x12,x12,4 + +80002a48 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + aes32esi x19, x23, x31, 1 # perform operation +80002a48: 63fb89b3 aes32esi x19,x23,x31,0x1 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a4c: 00032203 lw x4,0(x6) +80002a50: 01320863 beq x4,x19,80002a60 +80002a54: 76c052ef jal x5,800081c0 +80002a58: 80002a48 .word 0x80002a48 +80002a5c: 80012006 .word 0x80012006 +80002a60: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xaaaaaaaa +80002a64: 00062b83 lw x23,0(x12) +80002a68: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x80000000 +80002a6c: 00062403 lw x8,0(x12) +80002a70: 00460613 addi x12,x12,4 + +80002a74 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + aes32esi x30, x23, x8, 2 # perform operation +80002a74: a28b8f33 aes32esi x30,x23,x8,0x2 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a78: 00032203 lw x4,0(x6) +80002a7c: 01e20863 beq x4,x30,80002a8c +80002a80: 740052ef jal x5,800081c0 +80002a84: 80002a74 .word 0x80002a74 +80002a88: 80012062 .word 0x80012062 +80002a8c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xaaaaaaaa +80002a90: 00062103 lw x2,0(x12) +80002a94: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x80000001 +80002a98: 00062083 lw x1,0(x12) +80002a9c: 00460613 addi x12,x12,4 + +80002aa0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + aes32esi x11, x2, x1, 3 # perform operation +80002aa0: e21105b3 aes32esi x11,x2,x1,0x3 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aa4: 00032203 lw x4,0(x6) +80002aa8: 00b20863 beq x4,x11,80002ab8 +80002aac: 714052ef jal x5,800081c0 +80002ab0: 80002aa0 .word 0x80002aa0 +80002ab4: 800120c5 .word 0x800120c5 +80002ab8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xaaaaaaaa +80002abc: 00062883 lw x17,0(x12) +80002ac0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7fffffff +80002ac4: 00062f03 lw x30,0(x12) +80002ac8: 00460613 addi x12,x12,4 + +80002acc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + aes32esi x14, x17, x30, 2 # perform operation +80002acc: a3e88733 aes32esi x14,x17,x30,0x2 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad0: 00032203 lw x4,0(x6) +80002ad4: 00e20863 beq x4,x14,80002ae4 +80002ad8: 6e8052ef jal x5,800081c0 +80002adc: 80002acc .word 0x80002acc +80002ae0: 80012128 .word 0x80012128 +80002ae4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xaaaaaaaa +80002ae8: 00062503 lw x10,0(x12) +80002aec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7ffffffe +80002af0: 00062483 lw x9,0(x12) +80002af4: 00460613 addi x12,x12,4 + +80002af8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + aes32esi x14, x10, x9, 0 # perform operation +80002af8: 22950733 aes32esi x14,x10,x9,0x0 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002afc: 00032203 lw x4,0(x6) +80002b00: 00e20863 beq x4,x14,80002b10 +80002b04: 6bc052ef jal x5,800081c0 +80002b08: 80002af8 .word 0x80002af8 +80002b0c: 8001218b .word 0x8001218b +80002b10: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xaaaaaaaa +80002b14: 00062683 lw x13,0(x12) +80002b18: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xffffffff +80002b1c: 00062403 lw x8,0(x12) +80002b20: 00460613 addi x12,x12,4 + +80002b24 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + aes32esi x24, x13, x8, 2 # perform operation +80002b24: a2868c33 aes32esi x24,x13,x8,0x2 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b28: 00032203 lw x4,0(x6) +80002b2c: 01820863 beq x4,x24,80002b3c +80002b30: 690052ef jal x5,800081c0 +80002b34: 80002b24 .word 0x80002b24 +80002b38: 800121ee .word 0x800121ee +80002b3c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xaaaaaaaa +80002b40: 00062f83 lw x31,0(x12) +80002b44: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xfffffffe +80002b48: 00062803 lw x16,0(x12) +80002b4c: 00460613 addi x12,x12,4 + +80002b50 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + aes32esi x11, x31, x16, 3 # perform operation +80002b50: e30f85b3 aes32esi x11,x31,x16,0x3 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b54: 00032203 lw x4,0(x6) +80002b58: 00b20863 beq x4,x11,80002b68 +80002b5c: 664052ef jal x5,800081c0 +80002b60: 80002b50 .word 0x80002b50 +80002b64: 80012251 .word 0x80012251 +80002b68: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xaaaaaaaa +80002b6c: 00062c83 lw x25,0(x12) +80002b70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x5bbc8872 +80002b74: 00062a03 lw x20,0(x12) +80002b78: 00460613 addi x12,x12,4 + +80002b7c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + aes32esi x23, x25, x20, 3 # perform operation +80002b7c: e34c8bb3 aes32esi x23,x25,x20,0x3 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b80: 00032203 lw x4,0(x6) +80002b84: 01720863 beq x4,x23,80002b94 +80002b88: 638052ef jal x5,800081c0 +80002b8c: 80002b7c .word 0x80002b7c +80002b90: 800122b4 .word 0x800122b4 +80002b94: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xaaaaaaaa +80002b98: 00062183 lw x3,0(x12) +80002b9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xaaaaaaaa +80002ba0: 00062e03 lw x28,0(x12) +80002ba4: 00460613 addi x12,x12,4 + +80002ba8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + aes32esi x25, x3, x28, 3 # perform operation +80002ba8: e3c18cb3 aes32esi x25,x3,x28,0x3 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bac: 00032203 lw x4,0(x6) +80002bb0: 01920863 beq x4,x25,80002bc0 +80002bb4: 60c052ef jal x5,800081c0 +80002bb8: 80002ba8 .word 0x80002ba8 +80002bbc: 80012317 .word 0x80012317 +80002bc0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xaaaaaaaa +80002bc4: 00062e83 lw x29,0(x12) +80002bc8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x55555555 +80002bcc: 00062d03 lw x26,0(x12) +80002bd0: 00460613 addi x12,x12,4 + +80002bd4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + aes32esi x7, x29, x26, 2 # perform operation +80002bd4: a3ae83b3 aes32esi x7,x29,x26,0x2 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bd8: 00032203 lw x4,0(x6) +80002bdc: 00720863 beq x4,x7,80002bec +80002be0: 5e0052ef jal x5,800081c0 +80002be4: 80002bd4 .word 0x80002bd4 +80002be8: 8001237a .word 0x8001237a +80002bec: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x55555555 +80002bf0: 00062f03 lw x30,0(x12) +80002bf4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x00000000 +80002bf8: 00062383 lw x7,0(x12) +80002bfc: 00460613 addi x12,x12,4 + +80002c00 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + aes32esi x10, x30, x7, 0 # perform operation +80002c00: 227f0533 aes32esi x10,x30,x7,0x0 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c04: 00032203 lw x4,0(x6) +80002c08: 00a20863 beq x4,x10,80002c18 +80002c0c: 5b4052ef jal x5,800081c0 +80002c10: 80002c00 .word 0x80002c00 +80002c14: 800123dd .word 0x800123dd +80002c18: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x55555555 +80002c1c: 00062803 lw x16,0(x12) +80002c20: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x00000001 +80002c24: 00062503 lw x10,0(x12) +80002c28: 00460613 addi x12,x12,4 + +80002c2c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + aes32esi x22, x16, x10, 1 # perform operation +80002c2c: 62a80b33 aes32esi x22,x16,x10,0x1 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c30: 00032203 lw x4,0(x6) +80002c34: 01620863 beq x4,x22,80002c44 +80002c38: 588052ef jal x5,800081c0 +80002c3c: 80002c2c .word 0x80002c2c +80002c40: 80012439 .word 0x80012439 +80002c44: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x55555555 +80002c48: 00062703 lw x14,0(x12) +80002c4c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x00000002 +80002c50: 00062383 lw x7,0(x12) +80002c54: 00460613 addi x12,x12,4 + +80002c58 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + aes32esi x8, x14, x7, 3 # perform operation +80002c58: e2770433 aes32esi x8,x14,x7,0x3 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c5c: 00032203 lw x4,0(x6) +80002c60: 00820863 beq x4,x8,80002c70 +80002c64: 55c052ef jal x5,800081c0 +80002c68: 80002c58 .word 0x80002c58 +80002c6c: 80012495 .word 0x80012495 +80002c70: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x55555555 +80002c74: 00062e83 lw x29,0(x12) +80002c78: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x80000000 +80002c7c: 00062103 lw x2,0(x12) +80002c80: 00460613 addi x12,x12,4 + +80002c84 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + aes32esi x8, x29, x2, 0 # perform operation +80002c84: 222e8433 aes32esi x8,x29,x2,0x0 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c88: 00032203 lw x4,0(x6) +80002c8c: 00820863 beq x4,x8,80002c9c +80002c90: 530052ef jal x5,800081c0 +80002c94: 80002c84 .word 0x80002c84 +80002c98: 800124f1 .word 0x800124f1 +80002c9c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x55555555 +80002ca0: 00062d03 lw x26,0(x12) +80002ca4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x80000001 +80002ca8: 00062383 lw x7,0(x12) +80002cac: 00460613 addi x12,x12,4 + +80002cb0 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + aes32esi x15, x26, x7, 2 # perform operation +80002cb0: a27d07b3 aes32esi x15,x26,x7,0x2 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cb4: 00032203 lw x4,0(x6) +80002cb8: 00f20863 beq x4,x15,80002cc8 +80002cbc: 504052ef jal x5,800081c0 +80002cc0: 80002cb0 .word 0x80002cb0 +80002cc4: 80012554 .word 0x80012554 +80002cc8: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x55555555 +80002ccc: 00062b83 lw x23,0(x12) +80002cd0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7fffffff +80002cd4: 00062483 lw x9,0(x12) +80002cd8: 00460613 addi x12,x12,4 + +80002cdc : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + aes32esi x2, x23, x9, 1 # perform operation +80002cdc: 629b8133 aes32esi x2,x23,x9,0x1 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce0: 00032203 lw x4,0(x6) +80002ce4: 00220863 beq x4,x2,80002cf4 +80002ce8: 4d8052ef jal x5,800081c0 +80002cec: 80002cdc .word 0x80002cdc +80002cf0: 800125b7 .word 0x800125b7 +80002cf4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x55555555 +80002cf8: 00062d03 lw x26,0(x12) +80002cfc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7ffffffe +80002d00: 00062c03 lw x24,0(x12) +80002d04: 00460613 addi x12,x12,4 + +80002d08 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + aes32esi x14, x26, x24, 0 # perform operation +80002d08: 238d0733 aes32esi x14,x26,x24,0x0 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d0c: 00032203 lw x4,0(x6) +80002d10: 00e20863 beq x4,x14,80002d20 +80002d14: 4ac052ef jal x5,800081c0 +80002d18: 80002d08 .word 0x80002d08 +80002d1c: 8001261a .word 0x8001261a +80002d20: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x55555555 +80002d24: 00062183 lw x3,0(x12) +80002d28: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xffffffff +80002d2c: 00062e03 lw x28,0(x12) +80002d30: 00460613 addi x12,x12,4 + +80002d34 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + aes32esi x23, x3, x28, 0 # perform operation +80002d34: 23c18bb3 aes32esi x23,x3,x28,0x0 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d38: 00032203 lw x4,0(x6) +80002d3c: 01720863 beq x4,x23,80002d4c +80002d40: 480052ef jal x5,800081c0 +80002d44: 80002d34 .word 0x80002d34 +80002d48: 8001267d .word 0x8001267d +80002d4c: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x55555555 +80002d50: 00062e83 lw x29,0(x12) +80002d54: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xfffffffe +80002d58: 00062d03 lw x26,0(x12) +80002d5c: 00460613 addi x12,x12,4 + +80002d60 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + aes32esi x16, x29, x26, 0 # perform operation +80002d60: 23ae8833 aes32esi x16,x29,x26,0x0 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d64: 00032203 lw x4,0(x6) +80002d68: 01020863 beq x4,x16,80002d78 +80002d6c: 454052ef jal x5,800081c0 +80002d70: 80002d60 .word 0x80002d60 +80002d74: 800126e0 .word 0x800126e0 +80002d78: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x55555555 +80002d7c: 00062903 lw x18,0(x12) +80002d80: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x5bbc8872 +80002d84: 00062883 lw x17,0(x12) +80002d88: 00460613 addi x12,x12,4 + +80002d8c : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + aes32esi x2, x18, x17, 3 # perform operation +80002d8c: e3190133 aes32esi x2,x18,x17,0x3 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d90: 00032203 lw x4,0(x6) +80002d94: 00220863 beq x4,x2,80002da4 +80002d98: 428052ef jal x5,800081c0 +80002d9c: 80002d8c .word 0x80002d8c +80002da0: 80012743 .word 0x80012743 +80002da4: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x55555555 +80002da8: 00062a83 lw x21,0(x12) +80002dac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xaaaaaaaa +80002db0: 00062b03 lw x22,0(x12) +80002db4: 00460613 addi x12,x12,4 + +80002db8 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + aes32esi x1, x21, x22, 2 # perform operation +80002db8: a36a80b3 aes32esi x1,x21,x22,0x2 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dbc: 00032203 lw x4,0(x6) +80002dc0: 00120863 beq x4,x1,80002dd0 +80002dc4: 3fc052ef jal x5,800081c0 +80002dc8: 80002db8 .word 0x80002db8 +80002dcc: 800127a6 .word 0x800127a6 +80002dd0: 00430313 addi x6,x6,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x55555555 +80002dd4: 00062d03 lw x26,0(x12) +80002dd8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x55555555 +80002ddc: 00062803 lw x16,0(x12) +80002de0: 00460613 addi x12,x12,4 + +80002de4 : +Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + aes32esi x10, x26, x16, 3 # perform operation +80002de4: e30d0533 aes32esi x10,x26,x16,0x3 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zkne_aes32esi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002de8: 00032203 lw x4,0(x6) +80002dec: 00a20863 beq x4,x10,80002dfc +80002df0: 3d0052ef jal x5,800081c0 +80002df4: 80002de4 .word 0x80002de4 +80002df8: 80012809 .word 0x80012809 +80002dfc: 00430313 addi x6,x6,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xb2628fb4 +80002e00: 00062003 lw x0,0(x12) +80002e04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0xc5032722 +80002e08: 00062003 lw x0,0(x12) +80002e0c: 00460613 addi x12,x12,4 + +80002e10 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b0: + aes32esi x30, x0, x0, 1 # perform operation +80002e10: 62000f33 aes32esi x30,x0,x0,0x1 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zkne_aes32esi_cg_cmp_rs1_rs2_b0, Zkne_aes32esi_cg_cmp_rs1_rs2_b0_str) +80002e14: 00032203 lw x4,0(x6) +80002e18: 01e20863 beq x4,x30,80002e28 +80002e1c: 3a4052ef jal x5,800081c0 +80002e20: 80002e10 .word 0x80002e10 +80002e24: 8001286c .word 0x8001286c +80002e28: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xc3207765 +80002e2c: 00062083 lw x1,0(x12) +80002e30: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x0a8dc561 +80002e34: 00062083 lw x1,0(x12) +80002e38: 00460613 addi x12,x12,4 + +80002e3c : +Zkne_aes32esi_cg_cmp_rs1_rs2_b1: + aes32esi x21, x1, x1, 1 # perform operation +80002e3c: 62108ab3 aes32esi x21,x1,x1,0x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zkne_aes32esi_cg_cmp_rs1_rs2_b1, Zkne_aes32esi_cg_cmp_rs1_rs2_b1_str) +80002e40: 00032203 lw x4,0(x6) +80002e44: 01520863 beq x4,x21,80002e54 +80002e48: 378052ef jal x5,800081c0 +80002e4c: 80002e3c .word 0x80002e3c +80002e50: 800128a8 .word 0x800128a8 +80002e54: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xb886300b +80002e58: 00062103 lw x2,0(x12) +80002e5c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xeeda9e99 +80002e60: 00062103 lw x2,0(x12) +80002e64: 00460613 addi x12,x12,4 + +80002e68 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b2: + aes32esi x28, x2, x2, 3 # perform operation +80002e68: e2210e33 aes32esi x28,x2,x2,0x3 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zkne_aes32esi_cg_cmp_rs1_rs2_b2, Zkne_aes32esi_cg_cmp_rs1_rs2_b2_str) +80002e6c: 00032203 lw x4,0(x6) +80002e70: 01c20863 beq x4,x28,80002e80 +80002e74: 34c052ef jal x5,800081c0 +80002e78: 80002e68 .word 0x80002e68 +80002e7c: 800128e4 .word 0x800128e4 +80002e80: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xf5922c57 +80002e84: 00062183 lw x3,0(x12) +80002e88: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xf8b74815 +80002e8c: 00062183 lw x3,0(x12) +80002e90: 00460613 addi x12,x12,4 + +80002e94 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b3: + aes32esi x8, x3, x3, 0 # perform operation +80002e94: 22318433 aes32esi x8,x3,x3,0x0 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zkne_aes32esi_cg_cmp_rs1_rs2_b3, Zkne_aes32esi_cg_cmp_rs1_rs2_b3_str) +80002e98: 00032203 lw x4,0(x6) +80002e9c: 00820863 beq x4,x8,80002eac +80002ea0: 320052ef jal x5,800081c0 +80002ea4: 80002e94 .word 0x80002e94 +80002ea8: 80012920 .word 0x80012920 +80002eac: 00430313 addi x6,x6,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002eb0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002eb4: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xe1c4055f +80002eb8: 00062203 lw x4,0(x12) +80002ebc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x80aa38ec +80002ec0: 00062203 lw x4,0(x12) +80002ec4: 00460613 addi x12,x12,4 + +80002ec8 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b4: + aes32esi x1, x4, x4, 1 # perform operation +80002ec8: 624200b3 aes32esi x1,x4,x4,0x1 + # Check if x1 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x1, Zkne_aes32esi_cg_cmp_rs1_rs2_b4, Zkne_aes32esi_cg_cmp_rs1_rs2_b4_str) +80002ecc: 00032683 lw x13,0(x6) +80002ed0: 00168863 beq x13,x1,80002ee0 +80002ed4: 32c0576f jal x14,80008200 +80002ed8: 80002ec8 .word 0x80002ec8 +80002edc: 8001295c .word 0x8001295c +80002ee0: 00430313 addi x6,x6,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x7c3da81c +80002ee4: 00062283 lw x5,0(x12) +80002ee8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xff655a01 +80002eec: 00062283 lw x5,0(x12) +80002ef0: 00460613 addi x12,x12,4 + +80002ef4 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b5: + aes32esi x28, x5, x5, 3 # perform operation +80002ef4: e2528e33 aes32esi x28,x5,x5,0x3 + # Check if x28 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x28, Zkne_aes32esi_cg_cmp_rs1_rs2_b5, Zkne_aes32esi_cg_cmp_rs1_rs2_b5_str) +80002ef8: 00032683 lw x13,0(x6) +80002efc: 01c68863 beq x13,x28,80002f0c +80002f00: 3000576f jal x14,80008200 +80002f04: 80002ef4 .word 0x80002ef4 +80002f08: 80012998 .word 0x80012998 +80002f0c: 00430313 addi x6,x6,4 + + mv x17, x6 # switch signature pointer register to avoid conflict with test +80002f10: 00030893 addi x17,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xa7cb8eec +80002f14: 00062303 lw x6,0(x12) +80002f18: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xbf33ffdf +80002f1c: 00062303 lw x6,0(x12) +80002f20: 00460613 addi x12,x12,4 + +80002f24 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b6: + aes32esi x0, x6, x6, 1 # perform operation +80002f24: 62630033 aes32esi x0,x6,x6,0x1 + # Check if x0 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x0, Zkne_aes32esi_cg_cmp_rs1_rs2_b6, Zkne_aes32esi_cg_cmp_rs1_rs2_b6_str) +80002f28: 0008a683 lw x13,0(x17) +80002f2c: 00068863 beq x13,x0,80002f3c +80002f30: 2d00576f jal x14,80008200 +80002f34: 80002f24 .word 0x80002f24 +80002f38: 800129d4 .word 0x800129d4 +80002f3c: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xf72eb760 +80002f40: 00062383 lw x7,0(x12) +80002f44: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xcfaf606b +80002f48: 00062383 lw x7,0(x12) +80002f4c: 00460613 addi x12,x12,4 + +80002f50 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b7: + aes32esi x2, x7, x7, 0 # perform operation +80002f50: 22738133 aes32esi x2,x7,x7,0x0 + # Check if x2 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x2, Zkne_aes32esi_cg_cmp_rs1_rs2_b7, Zkne_aes32esi_cg_cmp_rs1_rs2_b7_str) +80002f54: 0008a683 lw x13,0(x17) +80002f58: 00268863 beq x13,x2,80002f68 +80002f5c: 2a40576f jal x14,80008200 +80002f60: 80002f50 .word 0x80002f50 +80002f64: 80012a10 .word 0x80012a10 +80002f68: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x336fd034 +80002f6c: 00062403 lw x8,0(x12) +80002f70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x7e797c19 +80002f74: 00062403 lw x8,0(x12) +80002f78: 00460613 addi x12,x12,4 + +80002f7c : +Zkne_aes32esi_cg_cmp_rs1_rs2_b8: + aes32esi x2, x8, x8, 2 # perform operation +80002f7c: a2840133 aes32esi x2,x8,x8,0x2 + # Check if x2 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x2, Zkne_aes32esi_cg_cmp_rs1_rs2_b8, Zkne_aes32esi_cg_cmp_rs1_rs2_b8_str) +80002f80: 0008a683 lw x13,0(x17) +80002f84: 00268863 beq x13,x2,80002f94 +80002f88: 2780576f jal x14,80008200 +80002f8c: 80002f7c .word 0x80002f7c +80002f90: 80012a4c .word 0x80012a4c +80002f94: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x1331b58e +80002f98: 00062483 lw x9,0(x12) +80002f9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7e001c24 +80002fa0: 00062483 lw x9,0(x12) +80002fa4: 00460613 addi x12,x12,4 + +80002fa8 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b9: + aes32esi x25, x9, x9, 3 # perform operation +80002fa8: e2948cb3 aes32esi x25,x9,x9,0x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x25, Zkne_aes32esi_cg_cmp_rs1_rs2_b9, Zkne_aes32esi_cg_cmp_rs1_rs2_b9_str) +80002fac: 0008a683 lw x13,0(x17) +80002fb0: 01968863 beq x13,x25,80002fc0 +80002fb4: 24c0576f jal x14,80008200 +80002fb8: 80002fa8 .word 0x80002fa8 +80002fbc: 80012a88 .word 0x80012a88 +80002fc0: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xf6890f4b +80002fc4: 00062503 lw x10,0(x12) +80002fc8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x4c5a5bc5 +80002fcc: 00062503 lw x10,0(x12) +80002fd0: 00460613 addi x12,x12,4 + +80002fd4 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b10: + aes32esi x5, x10, x10, 0 # perform operation +80002fd4: 22a502b3 aes32esi x5,x10,x10,0x0 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zkne_aes32esi_cg_cmp_rs1_rs2_b10, Zkne_aes32esi_cg_cmp_rs1_rs2_b10_str) +80002fd8: 0008a683 lw x13,0(x17) +80002fdc: 00568863 beq x13,x5,80002fec +80002fe0: 2200576f jal x14,80008200 +80002fe4: 80002fd4 .word 0x80002fd4 +80002fe8: 80012ac4 .word 0x80012ac4 +80002fec: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x8dc6f295 +80002ff0: 00062583 lw x11,0(x12) +80002ff4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xae803e91 +80002ff8: 00062583 lw x11,0(x12) +80002ffc: 00460613 addi x12,x12,4 + +80003000 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b11: + aes32esi x21, x11, x11, 0 # perform operation +80003000: 22b58ab3 aes32esi x21,x11,x11,0x0 + # Check if x21 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x21, Zkne_aes32esi_cg_cmp_rs1_rs2_b11, Zkne_aes32esi_cg_cmp_rs1_rs2_b11_str) +80003004: 0008a683 lw x13,0(x17) +80003008: 01568863 beq x13,x21,80003018 +8000300c: 1f40576f jal x14,80008200 +80003010: 80003000 .word 0x80003000 +80003014: 80012b01 .word 0x80012b01 +80003018: 00488893 addi x17,x17,4 + + mv x2, x12 # switch data pointer register to avoid conflict with test +8000301c: 00060113 addi x2,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xc92266ab +80003020: 00012603 lw x12,0(x2) +80003024: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x9e01b08b +80003028: 00012603 lw x12,0(x2) +8000302c: 00410113 addi x2,x2,4 + +80003030 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b12: + aes32esi x30, x12, x12, 2 # perform operation +80003030: a2c60f33 aes32esi x30,x12,x12,0x2 + # Check if x30 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x30, Zkne_aes32esi_cg_cmp_rs1_rs2_b12, Zkne_aes32esi_cg_cmp_rs1_rs2_b12_str) +80003034: 0008a683 lw x13,0(x17) +80003038: 01e68863 beq x13,x30,80003048 +8000303c: 1c40576f jal x14,80008200 +80003040: 80003030 .word 0x80003030 +80003044: 80012b3e .word 0x80012b3e +80003048: 00488893 addi x17,x17,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000304c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003050: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xa6c0b9d5 +80003054: 00012683 lw x13,0(x2) +80003058: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x86d17e3e +8000305c: 00012683 lw x13,0(x2) +80003060: 00410113 addi x2,x2,4 + +80003064 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b13: + aes32esi x18, x13, x13, 0 # perform operation +80003064: 22d68933 aes32esi x18,x13,x13,0x0 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esi_cg_cmp_rs1_rs2_b13, Zkne_aes32esi_cg_cmp_rs1_rs2_b13_str) +80003068: 0008a203 lw x4,0(x17) +8000306c: 01220863 beq x4,x18,8000307c +80003070: 150052ef jal x5,800081c0 +80003074: 80003064 .word 0x80003064 +80003078: 80012b7b .word 0x80012b7b +8000307c: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xfe68f95d +80003080: 00012703 lw x14,0(x2) +80003084: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xd692aa1b +80003088: 00012703 lw x14,0(x2) +8000308c: 00410113 addi x2,x2,4 + +80003090 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b14: + aes32esi x12, x14, x14, 2 # perform operation +80003090: a2e70633 aes32esi x12,x14,x14,0x2 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esi_cg_cmp_rs1_rs2_b14, Zkne_aes32esi_cg_cmp_rs1_rs2_b14_str) +80003094: 0008a203 lw x4,0(x17) +80003098: 00c20863 beq x4,x12,800030a8 +8000309c: 124052ef jal x5,800081c0 +800030a0: 80003090 .word 0x80003090 +800030a4: 80012bb8 .word 0x80012bb8 +800030a8: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x182e67be +800030ac: 00012783 lw x15,0(x2) +800030b0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xa674f606 +800030b4: 00012783 lw x15,0(x2) +800030b8: 00410113 addi x2,x2,4 + +800030bc : +Zkne_aes32esi_cg_cmp_rs1_rs2_b15: + aes32esi x22, x15, x15, 2 # perform operation +800030bc: a2f78b33 aes32esi x22,x15,x15,0x2 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esi_cg_cmp_rs1_rs2_b15, Zkne_aes32esi_cg_cmp_rs1_rs2_b15_str) +800030c0: 0008a203 lw x4,0(x17) +800030c4: 01620863 beq x4,x22,800030d4 +800030c8: 0f8052ef jal x5,800081c0 +800030cc: 800030bc .word 0x800030bc +800030d0: 80012bf5 .word 0x80012bf5 +800030d4: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xe515bfda +800030d8: 00012803 lw x16,0(x2) +800030dc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xae7c4054 +800030e0: 00012803 lw x16,0(x2) +800030e4: 00410113 addi x2,x2,4 + +800030e8 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b16: + aes32esi x19, x16, x16, 1 # perform operation +800030e8: 630809b3 aes32esi x19,x16,x16,0x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esi_cg_cmp_rs1_rs2_b16, Zkne_aes32esi_cg_cmp_rs1_rs2_b16_str) +800030ec: 0008a203 lw x4,0(x17) +800030f0: 01320863 beq x4,x19,80003100 +800030f4: 0cc052ef jal x5,800081c0 +800030f8: 800030e8 .word 0x800030e8 +800030fc: 80012c32 .word 0x80012c32 +80003100: 00488893 addi x17,x17,4 + + mv x20, x17 # switch signature pointer register to avoid conflict with test +80003104: 00088a13 addi x20,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x5dfc75d6 +80003108: 00012883 lw x17,0(x2) +8000310c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x7318693e +80003110: 00012883 lw x17,0(x2) +80003114: 00410113 addi x2,x2,4 + +80003118 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b17: + aes32esi x26, x17, x17, 0 # perform operation +80003118: 23188d33 aes32esi x26,x17,x17,0x0 + # Check if x26 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x26, Zkne_aes32esi_cg_cmp_rs1_rs2_b17, Zkne_aes32esi_cg_cmp_rs1_rs2_b17_str) +8000311c: 000a2203 lw x4,0(x20) +80003120: 01a20863 beq x4,x26,80003130 +80003124: 09c052ef jal x5,800081c0 +80003128: 80003118 .word 0x80003118 +8000312c: 80012c6f .word 0x80012c6f +80003130: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x0b819f0e +80003134: 00012903 lw x18,0(x2) +80003138: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xd6bd5c36 +8000313c: 00012903 lw x18,0(x2) +80003140: 00410113 addi x2,x2,4 + +80003144 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b18: + aes32esi x12, x18, x18, 1 # perform operation +80003144: 63290633 aes32esi x12,x18,x18,0x1 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zkne_aes32esi_cg_cmp_rs1_rs2_b18, Zkne_aes32esi_cg_cmp_rs1_rs2_b18_str) +80003148: 000a2203 lw x4,0(x20) +8000314c: 00c20863 beq x4,x12,8000315c +80003150: 070052ef jal x5,800081c0 +80003154: 80003144 .word 0x80003144 +80003158: 80012cac .word 0x80012cac +8000315c: 004a0a13 addi x20,x20,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xb3d9dd03 +80003160: 00012983 lw x19,0(x2) +80003164: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xd8f889bd +80003168: 00012983 lw x19,0(x2) +8000316c: 00410113 addi x2,x2,4 + +80003170 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b19: + aes32esi x11, x19, x19, 3 # perform operation +80003170: e33985b3 aes32esi x11,x19,x19,0x3 + # Check if x11 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x11, Zkne_aes32esi_cg_cmp_rs1_rs2_b19, Zkne_aes32esi_cg_cmp_rs1_rs2_b19_str) +80003174: 000a2203 lw x4,0(x20) +80003178: 00b20863 beq x4,x11,80003188 +8000317c: 044052ef jal x5,800081c0 +80003180: 80003170 .word 0x80003170 +80003184: 80012ce9 .word 0x80012ce9 +80003188: 004a0a13 addi x20,x20,4 + + mv x1, x20 # switch signature pointer register to avoid conflict with test +8000318c: 000a0093 addi x1,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xaea5e8cd +80003190: 00012a03 lw x20,0(x2) +80003194: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x9daf27ac +80003198: 00012a03 lw x20,0(x2) +8000319c: 00410113 addi x2,x2,4 + +800031a0 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b20: + aes32esi x15, x20, x20, 3 # perform operation +800031a0: e34a07b3 aes32esi x15,x20,x20,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zkne_aes32esi_cg_cmp_rs1_rs2_b20, Zkne_aes32esi_cg_cmp_rs1_rs2_b20_str) +800031a4: 0000a203 lw x4,0(x1) +800031a8: 00f20863 beq x4,x15,800031b8 +800031ac: 014052ef jal x5,800081c0 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 80012d26 .word 0x80012d26 +800031b8: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x38547dab +800031bc: 00012a83 lw x21,0(x2) +800031c0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xaab14c58 +800031c4: 00012a83 lw x21,0(x2) +800031c8: 00410113 addi x2,x2,4 + +800031cc : +Zkne_aes32esi_cg_cmp_rs1_rs2_b21: + aes32esi x10, x21, x21, 0 # perform operation +800031cc: 235a8533 aes32esi x10,x21,x21,0x0 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zkne_aes32esi_cg_cmp_rs1_rs2_b21, Zkne_aes32esi_cg_cmp_rs1_rs2_b21_str) +800031d0: 0000a203 lw x4,0(x1) +800031d4: 00a20863 beq x4,x10,800031e4 +800031d8: 7e9042ef jal x5,800081c0 +800031dc: 800031cc .word 0x800031cc +800031e0: 80012d63 .word 0x80012d63 +800031e4: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xb244a12b +800031e8: 00012b03 lw x22,0(x2) +800031ec: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xa29f1d84 +800031f0: 00012b03 lw x22,0(x2) +800031f4: 00410113 addi x2,x2,4 + +800031f8 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b22: + aes32esi x6, x22, x22, 1 # perform operation +800031f8: 636b0333 aes32esi x6,x22,x22,0x1 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zkne_aes32esi_cg_cmp_rs1_rs2_b22, Zkne_aes32esi_cg_cmp_rs1_rs2_b22_str) +800031fc: 0000a203 lw x4,0(x1) +80003200: 00620863 beq x4,x6,80003210 +80003204: 7bd042ef jal x5,800081c0 +80003208: 800031f8 .word 0x800031f8 +8000320c: 80012da0 .word 0x80012da0 +80003210: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xab1e81a5 +80003214: 00012b83 lw x23,0(x2) +80003218: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x8d9fc38e +8000321c: 00012b83 lw x23,0(x2) +80003220: 00410113 addi x2,x2,4 + +80003224 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b23: + aes32esi x27, x23, x23, 2 # perform operation +80003224: a37b8db3 aes32esi x27,x23,x23,0x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zkne_aes32esi_cg_cmp_rs1_rs2_b23, Zkne_aes32esi_cg_cmp_rs1_rs2_b23_str) +80003228: 0000a203 lw x4,0(x1) +8000322c: 01b20863 beq x4,x27,8000323c +80003230: 791042ef jal x5,800081c0 +80003234: 80003224 .word 0x80003224 +80003238: 80012ddd .word 0x80012ddd +8000323c: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7f965bb9 +80003240: 00012c03 lw x24,0(x2) +80003244: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x4ddbfa51 +80003248: 00012c03 lw x24,0(x2) +8000324c: 00410113 addi x2,x2,4 + +80003250 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b24: + aes32esi x29, x24, x24, 3 # perform operation +80003250: e38c0eb3 aes32esi x29,x24,x24,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zkne_aes32esi_cg_cmp_rs1_rs2_b24, Zkne_aes32esi_cg_cmp_rs1_rs2_b24_str) +80003254: 0000a203 lw x4,0(x1) +80003258: 01d20863 beq x4,x29,80003268 +8000325c: 765042ef jal x5,800081c0 +80003260: 80003250 .word 0x80003250 +80003264: 80012e1a .word 0x80012e1a +80003268: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x065ff87f +8000326c: 00012c83 lw x25,0(x2) +80003270: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x509d6b8f +80003274: 00012c83 lw x25,0(x2) +80003278: 00410113 addi x2,x2,4 + +8000327c : +Zkne_aes32esi_cg_cmp_rs1_rs2_b25: + aes32esi x28, x25, x25, 0 # perform operation +8000327c: 239c8e33 aes32esi x28,x25,x25,0x0 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zkne_aes32esi_cg_cmp_rs1_rs2_b25, Zkne_aes32esi_cg_cmp_rs1_rs2_b25_str) +80003280: 0000a203 lw x4,0(x1) +80003284: 01c20863 beq x4,x28,80003294 +80003288: 739042ef jal x5,800081c0 +8000328c: 8000327c .word 0x8000327c +80003290: 80012e57 .word 0x80012e57 +80003294: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xcb901985 +80003298: 00012d03 lw x26,0(x2) +8000329c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x3f373af2 +800032a0: 00012d03 lw x26,0(x2) +800032a4: 00410113 addi x2,x2,4 + +800032a8 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b26: + aes32esi x23, x26, x26, 3 # perform operation +800032a8: e3ad0bb3 aes32esi x23,x26,x26,0x3 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zkne_aes32esi_cg_cmp_rs1_rs2_b26, Zkne_aes32esi_cg_cmp_rs1_rs2_b26_str) +800032ac: 0000a203 lw x4,0(x1) +800032b0: 01720863 beq x4,x23,800032c0 +800032b4: 70d042ef jal x5,800081c0 +800032b8: 800032a8 .word 0x800032a8 +800032bc: 80012e94 .word 0x80012e94 +800032c0: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xa46f8eb3 +800032c4: 00012d83 lw x27,0(x2) +800032c8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xc1d4c8fc +800032cc: 00012d83 lw x27,0(x2) +800032d0: 00410113 addi x2,x2,4 + +800032d4 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b27: + aes32esi x31, x27, x27, 3 # perform operation +800032d4: e3bd8fb3 aes32esi x31,x27,x27,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zkne_aes32esi_cg_cmp_rs1_rs2_b27, Zkne_aes32esi_cg_cmp_rs1_rs2_b27_str) +800032d8: 0000a203 lw x4,0(x1) +800032dc: 01f20863 beq x4,x31,800032ec +800032e0: 6e1042ef jal x5,800081c0 +800032e4: 800032d4 .word 0x800032d4 +800032e8: 80012ed1 .word 0x80012ed1 +800032ec: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x1586ad1e +800032f0: 00012e03 lw x28,0(x2) +800032f4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x738010fe +800032f8: 00012e03 lw x28,0(x2) +800032fc: 00410113 addi x2,x2,4 + +80003300 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b28: + aes32esi x20, x28, x28, 3 # perform operation +80003300: e3ce0a33 aes32esi x20,x28,x28,0x3 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zkne_aes32esi_cg_cmp_rs1_rs2_b28, Zkne_aes32esi_cg_cmp_rs1_rs2_b28_str) +80003304: 0000a203 lw x4,0(x1) +80003308: 01420863 beq x4,x20,80003318 +8000330c: 6b5042ef jal x5,800081c0 +80003310: 80003300 .word 0x80003300 +80003314: 80012f0e .word 0x80012f0e +80003318: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x0e06e203 +8000331c: 00012e83 lw x29,0(x2) +80003320: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x9063eb60 +80003324: 00012e83 lw x29,0(x2) +80003328: 00410113 addi x2,x2,4 + +8000332c : +Zkne_aes32esi_cg_cmp_rs1_rs2_b29: + aes32esi x23, x29, x29, 1 # perform operation +8000332c: 63de8bb3 aes32esi x23,x29,x29,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zkne_aes32esi_cg_cmp_rs1_rs2_b29, Zkne_aes32esi_cg_cmp_rs1_rs2_b29_str) +80003330: 0000a203 lw x4,0(x1) +80003334: 01720863 beq x4,x23,80003344 +80003338: 689042ef jal x5,800081c0 +8000333c: 8000332c .word 0x8000332c +80003340: 80012f4b .word 0x80012f4b +80003344: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x6f42621b +80003348: 00012f03 lw x30,0(x2) +8000334c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x5977dbb3 +80003350: 00012f03 lw x30,0(x2) +80003354: 00410113 addi x2,x2,4 + +80003358 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b30: + aes32esi x24, x30, x30, 2 # perform operation +80003358: a3ef0c33 aes32esi x24,x30,x30,0x2 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zkne_aes32esi_cg_cmp_rs1_rs2_b30, Zkne_aes32esi_cg_cmp_rs1_rs2_b30_str) +8000335c: 0000a203 lw x4,0(x1) +80003360: 01820863 beq x4,x24,80003370 +80003364: 65d042ef jal x5,800081c0 +80003368: 80003358 .word 0x80003358 +8000336c: 80012f88 .word 0x80012f88 +80003370: 00408093 addi x1,x1,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x712e8ad2 +80003374: 00012f83 lw x31,0(x2) +80003378: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xa5ecb868 +8000337c: 00012f83 lw x31,0(x2) +80003380: 00410113 addi x2,x2,4 + +80003384 : +Zkne_aes32esi_cg_cmp_rs1_rs2_b31: + aes32esi x23, x31, x31, 1 # perform operation +80003384: 63ff8bb3 aes32esi x23,x31,x31,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zkne_aes32esi_cg_cmp_rs1_rs2_b31, Zkne_aes32esi_cg_cmp_rs1_rs2_b31_str) +80003388: 0000a203 lw x4,0(x1) +8000338c: 01720863 beq x4,x23,8000339c +80003390: 631042ef jal x5,800081c0 +80003394: 80003384 .word 0x80003384 +80003398: 80012fc5 .word 0x80012fc5 +8000339c: 00408093 addi x1,x1,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0xaf4f8f31 +800033a0: 00012003 lw x0,0(x2) +800033a4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x741784e0 +800033a8: 00012183 lw x3,0(x2) +800033ac: 00410113 addi x2,x2,4 + +800033b0 : +Zkne_aes32esi_cg_cmp_rd_rs1_b0: + aes32esi x0, x0, x3, 1 # perform operation +800033b0: 62300033 aes32esi x0,x0,x3,0x1 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zkne_aes32esi_cg_cmp_rd_rs1_b0, Zkne_aes32esi_cg_cmp_rd_rs1_b0_str) +800033b4: 0000a203 lw x4,0(x1) +800033b8: 00020863 beq x4,x0,800033c8 +800033bc: 605042ef jal x5,800081c0 +800033c0: 800033b0 .word 0x800033b0 +800033c4: 80013002 .word 0x80013002 +800033c8: 00408093 addi x1,x1,4 + + mv x30, x1 # switch signature pointer register to avoid conflict with test +800033cc: 00008f13 addi x30,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x54403aad +800033d0: 00012083 lw x1,0(x2) +800033d4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x3ec10fc3 +800033d8: 00012f83 lw x31,0(x2) +800033dc: 00410113 addi x2,x2,4 + +800033e0 : +Zkne_aes32esi_cg_cmp_rd_rs1_b1: + aes32esi x1, x1, x31, 3 # perform operation +800033e0: e3f080b3 aes32esi x1,x1,x31,0x3 + # Check if x1 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x1, Zkne_aes32esi_cg_cmp_rd_rs1_b1, Zkne_aes32esi_cg_cmp_rd_rs1_b1_str) +800033e4: 000f2203 lw x4,0(x30) +800033e8: 00120863 beq x4,x1,800033f8 +800033ec: 5d5042ef jal x5,800081c0 +800033f0: 800033e0 .word 0x800033e0 +800033f4: 8001303d .word 0x8001303d +800033f8: 004f0f13 addi x30,x30,4 + + mv x26, x2 # switch data pointer register to avoid conflict with test +800033fc: 00010d13 addi x26,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x57140eb8 +80003400: 000d2103 lw x2,0(x26) +80003404: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0xa67feb07 +80003408: 000d2183 lw x3,0(x26) +8000340c: 004d0d13 addi x26,x26,4 + +80003410 : +Zkne_aes32esi_cg_cmp_rd_rs1_b2: + aes32esi x2, x2, x3, 3 # perform operation +80003410: e2310133 aes32esi x2,x2,x3,0x3 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zkne_aes32esi_cg_cmp_rd_rs1_b2, Zkne_aes32esi_cg_cmp_rd_rs1_b2_str) +80003414: 000f2203 lw x4,0(x30) +80003418: 00220863 beq x4,x2,80003428 +8000341c: 5a5042ef jal x5,800081c0 +80003420: 80003410 .word 0x80003410 +80003424: 80013078 .word 0x80013078 +80003428: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x33c4108d +8000342c: 000d2183 lw x3,0(x26) +80003430: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x06500b39 +80003434: 000d2803 lw x16,0(x26) +80003438: 004d0d13 addi x26,x26,4 + +8000343c : +Zkne_aes32esi_cg_cmp_rd_rs1_b3: + aes32esi x3, x3, x16, 0 # perform operation +8000343c: 230181b3 aes32esi x3,x3,x16,0x0 + # Check if x3 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x3, Zkne_aes32esi_cg_cmp_rd_rs1_b3, Zkne_aes32esi_cg_cmp_rd_rs1_b3_str) +80003440: 000f2203 lw x4,0(x30) +80003444: 00320863 beq x4,x3,80003454 +80003448: 579042ef jal x5,800081c0 +8000344c: 8000343c .word 0x8000343c +80003450: 800130b3 .word 0x800130b3 +80003454: 004f0f13 addi x30,x30,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003458: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +8000345c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x14b067d5 +80003460: 000d2203 lw x4,0(x26) +80003464: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xffa3b441 +80003468: 000d2703 lw x14,0(x26) +8000346c: 004d0d13 addi x26,x26,4 + +80003470 : +Zkne_aes32esi_cg_cmp_rd_rs1_b4: + aes32esi x4, x4, x14, 3 # perform operation +80003470: e2e20233 aes32esi x4,x4,x14,0x3 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zkne_aes32esi_cg_cmp_rd_rs1_b4, Zkne_aes32esi_cg_cmp_rd_rs1_b4_str) +80003474: 000f2383 lw x7,0(x30) +80003478: 00438863 beq x7,x4,80003488 +8000347c: 55d0446f jal x8,800081d8 +80003480: 80003470 .word 0x80003470 +80003484: 800130ee .word 0x800130ee +80003488: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x0c661794 +8000348c: 000d2283 lw x5,0(x26) +80003490: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xb3faef72 +80003494: 000d2503 lw x10,0(x26) +80003498: 004d0d13 addi x26,x26,4 + +8000349c : +Zkne_aes32esi_cg_cmp_rd_rs1_b5: + aes32esi x5, x5, x10, 0 # perform operation +8000349c: 22a282b3 aes32esi x5,x5,x10,0x0 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zkne_aes32esi_cg_cmp_rd_rs1_b5, Zkne_aes32esi_cg_cmp_rd_rs1_b5_str) +800034a0: 000f2383 lw x7,0(x30) +800034a4: 00538863 beq x7,x5,800034b4 +800034a8: 5310446f jal x8,800081d8 +800034ac: 8000349c .word 0x8000349c +800034b0: 80013129 .word 0x80013129 +800034b4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x5020a6ac +800034b8: 000d2303 lw x6,0(x26) +800034bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xdc975b06 +800034c0: 000d2c03 lw x24,0(x26) +800034c4: 004d0d13 addi x26,x26,4 + +800034c8 : +Zkne_aes32esi_cg_cmp_rd_rs1_b6: + aes32esi x6, x6, x24, 2 # perform operation +800034c8: a3830333 aes32esi x6,x6,x24,0x2 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zkne_aes32esi_cg_cmp_rd_rs1_b6, Zkne_aes32esi_cg_cmp_rd_rs1_b6_str) +800034cc: 000f2383 lw x7,0(x30) +800034d0: 00638863 beq x7,x6,800034e0 +800034d4: 5050446f jal x8,800081d8 +800034d8: 800034c8 .word 0x800034c8 +800034dc: 80013164 .word 0x80013164 +800034e0: 004f0f13 addi x30,x30,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800034e4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800034e8: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xdc24d3d7 +800034ec: 000d2383 lw x7,0(x26) +800034f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x2bddc2c3 +800034f4: 000d2203 lw x4,0(x26) +800034f8: 004d0d13 addi x26,x26,4 + +800034fc : +Zkne_aes32esi_cg_cmp_rd_rs1_b7: + aes32esi x7, x7, x4, 0 # perform operation +800034fc: 224383b3 aes32esi x7,x7,x4,0x0 + # Check if x7 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x7, Zkne_aes32esi_cg_cmp_rd_rs1_b7, Zkne_aes32esi_cg_cmp_rd_rs1_b7_str) +80003500: 000f2683 lw x13,0(x30) +80003504: 00768863 beq x13,x7,80003514 +80003508: 4f90476f jal x14,80008200 +8000350c: 800034fc .word 0x800034fc +80003510: 8001319f .word 0x8001319f +80003514: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xc2a7979b +80003518: 000d2403 lw x8,0(x26) +8000351c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xcb7980c1 +80003520: 000d2083 lw x1,0(x26) +80003524: 004d0d13 addi x26,x26,4 + +80003528 : +Zkne_aes32esi_cg_cmp_rd_rs1_b8: + aes32esi x8, x8, x1, 2 # perform operation +80003528: a2140433 aes32esi x8,x8,x1,0x2 + # Check if x8 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x8, Zkne_aes32esi_cg_cmp_rd_rs1_b8, Zkne_aes32esi_cg_cmp_rd_rs1_b8_str) +8000352c: 000f2683 lw x13,0(x30) +80003530: 00868863 beq x13,x8,80003540 +80003534: 4cd0476f jal x14,80008200 +80003538: 80003528 .word 0x80003528 +8000353c: 800131da .word 0x800131da +80003540: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x59c1b727 +80003544: 000d2483 lw x9,0(x26) +80003548: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xbdd4f266 +8000354c: 000d2383 lw x7,0(x26) +80003550: 004d0d13 addi x26,x26,4 + +80003554 : +Zkne_aes32esi_cg_cmp_rd_rs1_b9: + aes32esi x9, x9, x7, 3 # perform operation +80003554: e27484b3 aes32esi x9,x9,x7,0x3 + # Check if x9 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x9, Zkne_aes32esi_cg_cmp_rd_rs1_b9, Zkne_aes32esi_cg_cmp_rd_rs1_b9_str) +80003558: 000f2683 lw x13,0(x30) +8000355c: 00968863 beq x13,x9,8000356c +80003560: 4a10476f jal x14,80008200 +80003564: 80003554 .word 0x80003554 +80003568: 80013215 .word 0x80013215 +8000356c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x674c9322 +80003570: 000d2503 lw x10,0(x26) +80003574: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x477da774 +80003578: 000d2803 lw x16,0(x26) +8000357c: 004d0d13 addi x26,x26,4 + +80003580 : +Zkne_aes32esi_cg_cmp_rd_rs1_b10: + aes32esi x10, x10, x16, 1 # perform operation +80003580: 63050533 aes32esi x10,x10,x16,0x1 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zkne_aes32esi_cg_cmp_rd_rs1_b10, Zkne_aes32esi_cg_cmp_rd_rs1_b10_str) +80003584: 000f2683 lw x13,0(x30) +80003588: 00a68863 beq x13,x10,80003598 +8000358c: 4750476f jal x14,80008200 +80003590: 80003580 .word 0x80003580 +80003594: 80013250 .word 0x80013250 +80003598: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xf2266ce8 +8000359c: 000d2583 lw x11,0(x26) +800035a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x612e44ab +800035a4: 000d2483 lw x9,0(x26) +800035a8: 004d0d13 addi x26,x26,4 + +800035ac : +Zkne_aes32esi_cg_cmp_rd_rs1_b11: + aes32esi x11, x11, x9, 2 # perform operation +800035ac: a29585b3 aes32esi x11,x11,x9,0x2 + # Check if x11 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x11, Zkne_aes32esi_cg_cmp_rd_rs1_b11, Zkne_aes32esi_cg_cmp_rd_rs1_b11_str) +800035b0: 000f2683 lw x13,0(x30) +800035b4: 00b68863 beq x13,x11,800035c4 +800035b8: 4490476f jal x14,80008200 +800035bc: 800035ac .word 0x800035ac +800035c0: 8001328c .word 0x8001328c +800035c4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x0537eb57 +800035c8: 000d2603 lw x12,0(x26) +800035cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x25ee7831 +800035d0: 000d2183 lw x3,0(x26) +800035d4: 004d0d13 addi x26,x26,4 + +800035d8 : +Zkne_aes32esi_cg_cmp_rd_rs1_b12: + aes32esi x12, x12, x3, 3 # perform operation +800035d8: e2360633 aes32esi x12,x12,x3,0x3 + # Check if x12 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x12, Zkne_aes32esi_cg_cmp_rd_rs1_b12, Zkne_aes32esi_cg_cmp_rd_rs1_b12_str) +800035dc: 000f2683 lw x13,0(x30) +800035e0: 00c68863 beq x13,x12,800035f0 +800035e4: 41d0476f jal x14,80008200 +800035e8: 800035d8 .word 0x800035d8 +800035ec: 800132c8 .word 0x800132c8 +800035f0: 004f0f13 addi x30,x30,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035f4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035f8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x40b70888 +800035fc: 000d2683 lw x13,0(x26) +80003600: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x412e58fc +80003604: 000d2183 lw x3,0(x26) +80003608: 004d0d13 addi x26,x26,4 + +8000360c : +Zkne_aes32esi_cg_cmp_rd_rs1_b13: + aes32esi x13, x13, x3, 2 # perform operation +8000360c: a23686b3 aes32esi x13,x13,x3,0x2 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zkne_aes32esi_cg_cmp_rd_rs1_b13, Zkne_aes32esi_cg_cmp_rd_rs1_b13_str) +80003610: 000f2383 lw x7,0(x30) +80003614: 00d38863 beq x7,x13,80003624 +80003618: 3c10446f jal x8,800081d8 +8000361c: 8000360c .word 0x8000360c +80003620: 80013304 .word 0x80013304 +80003624: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x633e6534 +80003628: 000d2703 lw x14,0(x26) +8000362c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xb9fd61dc +80003630: 000d2603 lw x12,0(x26) +80003634: 004d0d13 addi x26,x26,4 + +80003638 : +Zkne_aes32esi_cg_cmp_rd_rs1_b14: + aes32esi x14, x14, x12, 0 # perform operation +80003638: 22c70733 aes32esi x14,x14,x12,0x0 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zkne_aes32esi_cg_cmp_rd_rs1_b14, Zkne_aes32esi_cg_cmp_rd_rs1_b14_str) +8000363c: 000f2383 lw x7,0(x30) +80003640: 00e38863 beq x7,x14,80003650 +80003644: 3950446f jal x8,800081d8 +80003648: 80003638 .word 0x80003638 +8000364c: 80013340 .word 0x80013340 +80003650: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x59e937c9 +80003654: 000d2783 lw x15,0(x26) +80003658: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xf44913aa +8000365c: 000d2c83 lw x25,0(x26) +80003660: 004d0d13 addi x26,x26,4 + +80003664 : +Zkne_aes32esi_cg_cmp_rd_rs1_b15: + aes32esi x15, x15, x25, 0 # perform operation +80003664: 239787b3 aes32esi x15,x15,x25,0x0 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zkne_aes32esi_cg_cmp_rd_rs1_b15, Zkne_aes32esi_cg_cmp_rd_rs1_b15_str) +80003668: 000f2383 lw x7,0(x30) +8000366c: 00f38863 beq x7,x15,8000367c +80003670: 3690446f jal x8,800081d8 +80003674: 80003664 .word 0x80003664 +80003678: 8001337c .word 0x8001337c +8000367c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xf4ce765f +80003680: 000d2803 lw x16,0(x26) +80003684: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x79889e90 +80003688: 000d2103 lw x2,0(x26) +8000368c: 004d0d13 addi x26,x26,4 + +80003690 : +Zkne_aes32esi_cg_cmp_rd_rs1_b16: + aes32esi x16, x16, x2, 1 # perform operation +80003690: 62280833 aes32esi x16,x16,x2,0x1 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zkne_aes32esi_cg_cmp_rd_rs1_b16, Zkne_aes32esi_cg_cmp_rd_rs1_b16_str) +80003694: 000f2383 lw x7,0(x30) +80003698: 01038863 beq x7,x16,800036a8 +8000369c: 33d0446f jal x8,800081d8 +800036a0: 80003690 .word 0x80003690 +800036a4: 800133b8 .word 0x800133b8 +800036a8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xc101089f +800036ac: 000d2883 lw x17,0(x26) +800036b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x44bab3a0 +800036b4: 000d2f83 lw x31,0(x26) +800036b8: 004d0d13 addi x26,x26,4 + +800036bc : +Zkne_aes32esi_cg_cmp_rd_rs1_b17: + aes32esi x17, x17, x31, 0 # perform operation +800036bc: 23f888b3 aes32esi x17,x17,x31,0x0 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zkne_aes32esi_cg_cmp_rd_rs1_b17, Zkne_aes32esi_cg_cmp_rd_rs1_b17_str) +800036c0: 000f2383 lw x7,0(x30) +800036c4: 01138863 beq x7,x17,800036d4 +800036c8: 3110446f jal x8,800081d8 +800036cc: 800036bc .word 0x800036bc +800036d0: 800133f4 .word 0x800133f4 +800036d4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x3b9fd7c6 +800036d8: 000d2903 lw x18,0(x26) +800036dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x9708ffcc +800036e0: 000d2603 lw x12,0(x26) +800036e4: 004d0d13 addi x26,x26,4 + +800036e8 : +Zkne_aes32esi_cg_cmp_rd_rs1_b18: + aes32esi x18, x18, x12, 0 # perform operation +800036e8: 22c90933 aes32esi x18,x18,x12,0x0 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zkne_aes32esi_cg_cmp_rd_rs1_b18, Zkne_aes32esi_cg_cmp_rd_rs1_b18_str) +800036ec: 000f2383 lw x7,0(x30) +800036f0: 01238863 beq x7,x18,80003700 +800036f4: 2e50446f jal x8,800081d8 +800036f8: 800036e8 .word 0x800036e8 +800036fc: 80013430 .word 0x80013430 +80003700: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xe80972f7 +80003704: 000d2983 lw x19,0(x26) +80003708: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x9fb67d97 +8000370c: 000d2903 lw x18,0(x26) +80003710: 004d0d13 addi x26,x26,4 + +80003714 : +Zkne_aes32esi_cg_cmp_rd_rs1_b19: + aes32esi x19, x19, x18, 1 # perform operation +80003714: 632989b3 aes32esi x19,x19,x18,0x1 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zkne_aes32esi_cg_cmp_rd_rs1_b19, Zkne_aes32esi_cg_cmp_rd_rs1_b19_str) +80003718: 000f2383 lw x7,0(x30) +8000371c: 01338863 beq x7,x19,8000372c +80003720: 2b90446f jal x8,800081d8 +80003724: 80003714 .word 0x80003714 +80003728: 8001346c .word 0x8001346c +8000372c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x2497cbd4 +80003730: 000d2a03 lw x20,0(x26) +80003734: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x80f1cbf8 +80003738: 000d2783 lw x15,0(x26) +8000373c: 004d0d13 addi x26,x26,4 + +80003740 : +Zkne_aes32esi_cg_cmp_rd_rs1_b20: + aes32esi x20, x20, x15, 1 # perform operation +80003740: 62fa0a33 aes32esi x20,x20,x15,0x1 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zkne_aes32esi_cg_cmp_rd_rs1_b20, Zkne_aes32esi_cg_cmp_rd_rs1_b20_str) +80003744: 000f2383 lw x7,0(x30) +80003748: 01438863 beq x7,x20,80003758 +8000374c: 28d0446f jal x8,800081d8 +80003750: 80003740 .word 0x80003740 +80003754: 800134a8 .word 0x800134a8 +80003758: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x9a2ae367 +8000375c: 000d2a83 lw x21,0(x26) +80003760: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x9be44a63 +80003764: 000d2903 lw x18,0(x26) +80003768: 004d0d13 addi x26,x26,4 + +8000376c : +Zkne_aes32esi_cg_cmp_rd_rs1_b21: + aes32esi x21, x21, x18, 2 # perform operation +8000376c: a32a8ab3 aes32esi x21,x21,x18,0x2 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zkne_aes32esi_cg_cmp_rd_rs1_b21, Zkne_aes32esi_cg_cmp_rd_rs1_b21_str) +80003770: 000f2383 lw x7,0(x30) +80003774: 01538863 beq x7,x21,80003784 +80003778: 2610446f jal x8,800081d8 +8000377c: 8000376c .word 0x8000376c +80003780: 800134e4 .word 0x800134e4 +80003784: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xc4950764 +80003788: 000d2b03 lw x22,0(x26) +8000378c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x29afcc5d +80003790: 000d2e03 lw x28,0(x26) +80003794: 004d0d13 addi x26,x26,4 + +80003798 : +Zkne_aes32esi_cg_cmp_rd_rs1_b22: + aes32esi x22, x22, x28, 3 # perform operation +80003798: e3cb0b33 aes32esi x22,x22,x28,0x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zkne_aes32esi_cg_cmp_rd_rs1_b22, Zkne_aes32esi_cg_cmp_rd_rs1_b22_str) +8000379c: 000f2383 lw x7,0(x30) +800037a0: 01638863 beq x7,x22,800037b0 +800037a4: 2350446f jal x8,800081d8 +800037a8: 80003798 .word 0x80003798 +800037ac: 80013520 .word 0x80013520 +800037b0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xdf02dc3a +800037b4: 000d2b83 lw x23,0(x26) +800037b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xf3d38773 +800037bc: 000d2c83 lw x25,0(x26) +800037c0: 004d0d13 addi x26,x26,4 + +800037c4 : +Zkne_aes32esi_cg_cmp_rd_rs1_b23: + aes32esi x23, x23, x25, 1 # perform operation +800037c4: 639b8bb3 aes32esi x23,x23,x25,0x1 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zkne_aes32esi_cg_cmp_rd_rs1_b23, Zkne_aes32esi_cg_cmp_rd_rs1_b23_str) +800037c8: 000f2383 lw x7,0(x30) +800037cc: 01738863 beq x7,x23,800037dc +800037d0: 2090446f jal x8,800081d8 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8001355c .word 0x8001355c +800037dc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x5f9ccda0 +800037e0: 000d2c03 lw x24,0(x26) +800037e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xd685cb5c +800037e8: 000d2e03 lw x28,0(x26) +800037ec: 004d0d13 addi x26,x26,4 + +800037f0 : +Zkne_aes32esi_cg_cmp_rd_rs1_b24: + aes32esi x24, x24, x28, 0 # perform operation +800037f0: 23cc0c33 aes32esi x24,x24,x28,0x0 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zkne_aes32esi_cg_cmp_rd_rs1_b24, Zkne_aes32esi_cg_cmp_rd_rs1_b24_str) +800037f4: 000f2383 lw x7,0(x30) +800037f8: 01838863 beq x7,x24,80003808 +800037fc: 1dd0446f jal x8,800081d8 +80003800: 800037f0 .word 0x800037f0 +80003804: 80013598 .word 0x80013598 +80003808: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x91f6cfc2 +8000380c: 000d2c83 lw x25,0(x26) +80003810: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x1b0dc7c6 +80003814: 000d2603 lw x12,0(x26) +80003818: 004d0d13 addi x26,x26,4 + +8000381c : +Zkne_aes32esi_cg_cmp_rd_rs1_b25: + aes32esi x25, x25, x12, 2 # perform operation +8000381c: a2cc8cb3 aes32esi x25,x25,x12,0x2 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zkne_aes32esi_cg_cmp_rd_rs1_b25, Zkne_aes32esi_cg_cmp_rd_rs1_b25_str) +80003820: 000f2383 lw x7,0(x30) +80003824: 01938863 beq x7,x25,80003834 +80003828: 1b10446f jal x8,800081d8 +8000382c: 8000381c .word 0x8000381c +80003830: 800135d4 .word 0x800135d4 +80003834: 004f0f13 addi x30,x30,4 + + mv x21, x26 # switch data pointer register to avoid conflict with test +80003838: 000d0a93 addi x21,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x270f6d60 +8000383c: 000aad03 lw x26,0(x21) +80003840: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x578cd4ed +80003844: 000aa303 lw x6,0(x21) +80003848: 004a8a93 addi x21,x21,4 + +8000384c : +Zkne_aes32esi_cg_cmp_rd_rs1_b26: + aes32esi x26, x26, x6, 1 # perform operation +8000384c: 626d0d33 aes32esi x26,x26,x6,0x1 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zkne_aes32esi_cg_cmp_rd_rs1_b26, Zkne_aes32esi_cg_cmp_rd_rs1_b26_str) +80003850: 000f2383 lw x7,0(x30) +80003854: 01a38863 beq x7,x26,80003864 +80003858: 1810446f jal x8,800081d8 +8000385c: 8000384c .word 0x8000384c +80003860: 80013610 .word 0x80013610 +80003864: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x54cd19fd +80003868: 000aad83 lw x27,0(x21) +8000386c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x8c9400b2 +80003870: 000aa903 lw x18,0(x21) +80003874: 004a8a93 addi x21,x21,4 + +80003878 : +Zkne_aes32esi_cg_cmp_rd_rs1_b27: + aes32esi x27, x27, x18, 0 # perform operation +80003878: 232d8db3 aes32esi x27,x27,x18,0x0 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zkne_aes32esi_cg_cmp_rd_rs1_b27, Zkne_aes32esi_cg_cmp_rd_rs1_b27_str) +8000387c: 000f2383 lw x7,0(x30) +80003880: 01b38863 beq x7,x27,80003890 +80003884: 1550446f jal x8,800081d8 +80003888: 80003878 .word 0x80003878 +8000388c: 8001364c .word 0x8001364c +80003890: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xccc996d3 +80003894: 000aae03 lw x28,0(x21) +80003898: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x9b8fc7b0 +8000389c: 000aa883 lw x17,0(x21) +800038a0: 004a8a93 addi x21,x21,4 + +800038a4 : +Zkne_aes32esi_cg_cmp_rd_rs1_b28: + aes32esi x28, x28, x17, 1 # perform operation +800038a4: 631e0e33 aes32esi x28,x28,x17,0x1 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zkne_aes32esi_cg_cmp_rd_rs1_b28, Zkne_aes32esi_cg_cmp_rd_rs1_b28_str) +800038a8: 000f2383 lw x7,0(x30) +800038ac: 01c38863 beq x7,x28,800038bc +800038b0: 1290446f jal x8,800081d8 +800038b4: 800038a4 .word 0x800038a4 +800038b8: 80013688 .word 0x80013688 +800038bc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x185515d0 +800038c0: 000aae83 lw x29,0(x21) +800038c4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xa656e5b6 +800038c8: 000aa803 lw x16,0(x21) +800038cc: 004a8a93 addi x21,x21,4 + +800038d0 : +Zkne_aes32esi_cg_cmp_rd_rs1_b29: + aes32esi x29, x29, x16, 0 # perform operation +800038d0: 230e8eb3 aes32esi x29,x29,x16,0x0 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zkne_aes32esi_cg_cmp_rd_rs1_b29, Zkne_aes32esi_cg_cmp_rd_rs1_b29_str) +800038d4: 000f2383 lw x7,0(x30) +800038d8: 01d38863 beq x7,x29,800038e8 +800038dc: 0fd0446f jal x8,800081d8 +800038e0: 800038d0 .word 0x800038d0 +800038e4: 800136c4 .word 0x800136c4 +800038e8: 004f0f13 addi x30,x30,4 + + mv x27, x30 # switch signature pointer register to avoid conflict with test +800038ec: 000f0d93 addi x27,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xa5bad044 +800038f0: 000aaf03 lw x30,0(x21) +800038f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xef4747c2 +800038f8: 000aa183 lw x3,0(x21) +800038fc: 004a8a93 addi x21,x21,4 + +80003900 : +Zkne_aes32esi_cg_cmp_rd_rs1_b30: + aes32esi x30, x30, x3, 2 # perform operation +80003900: a23f0f33 aes32esi x30,x30,x3,0x2 + # Check if x30 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x30, Zkne_aes32esi_cg_cmp_rd_rs1_b30, Zkne_aes32esi_cg_cmp_rd_rs1_b30_str) +80003904: 000da383 lw x7,0(x27) +80003908: 01e38863 beq x7,x30,80003918 +8000390c: 0cd0446f jal x8,800081d8 +80003910: 80003900 .word 0x80003900 +80003914: 80013700 .word 0x80013700 +80003918: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x318129e3 +8000391c: 000aaf83 lw x31,0(x21) +80003920: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x9e0e8758 +80003924: 000aa783 lw x15,0(x21) +80003928: 004a8a93 addi x21,x21,4 + +8000392c : +Zkne_aes32esi_cg_cmp_rd_rs1_b31: + aes32esi x31, x31, x15, 1 # perform operation +8000392c: 62ff8fb3 aes32esi x31,x31,x15,0x1 + # Check if x31 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x31, Zkne_aes32esi_cg_cmp_rd_rs1_b31, Zkne_aes32esi_cg_cmp_rd_rs1_b31_str) +80003930: 000da383 lw x7,0(x27) +80003934: 01f38863 beq x7,x31,80003944 +80003938: 0a10446f jal x8,800081d8 +8000393c: 8000392c .word 0x8000392c +80003940: 8001373c .word 0x8001373c +80003944: 004d8d93 addi x27,x27,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xdfbc1f24 +80003948: 000aa503 lw x10,0(x21) +8000394c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0xaa61cb95 +80003950: 000aa003 lw x0,0(x21) +80003954: 004a8a93 addi x21,x21,4 + +80003958 : +Zkne_aes32esi_cg_cmp_rd_rs2_b0: + aes32esi x0, x10, x0, 2 # perform operation +80003958: a2050033 aes32esi x0,x10,x0,0x2 + # Check if x0 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x0, Zkne_aes32esi_cg_cmp_rd_rs2_b0, Zkne_aes32esi_cg_cmp_rd_rs2_b0_str) +8000395c: 000da383 lw x7,0(x27) +80003960: 00038863 beq x7,x0,80003970 +80003964: 0750446f jal x8,800081d8 +80003968: 80003958 .word 0x80003958 +8000396c: 80013778 .word 0x80013778 +80003970: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xc33cff5e +80003974: 000aaf83 lw x31,0(x21) +80003978: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xced6bc23 +8000397c: 000aa083 lw x1,0(x21) +80003980: 004a8a93 addi x21,x21,4 + +80003984 : +Zkne_aes32esi_cg_cmp_rd_rs2_b1: + aes32esi x1, x31, x1, 1 # perform operation +80003984: 621f80b3 aes32esi x1,x31,x1,0x1 + # Check if x1 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x1, Zkne_aes32esi_cg_cmp_rd_rs2_b1, Zkne_aes32esi_cg_cmp_rd_rs2_b1_str) +80003988: 000da383 lw x7,0(x27) +8000398c: 00138863 beq x7,x1,8000399c +80003990: 0490446f jal x8,800081d8 +80003994: 80003984 .word 0x80003984 +80003998: 800137b3 .word 0x800137b3 +8000399c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x0d71c7e7 +800039a0: 000aa903 lw x18,0(x21) +800039a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xc14b4e95 +800039a8: 000aa103 lw x2,0(x21) +800039ac: 004a8a93 addi x21,x21,4 + +800039b0 : +Zkne_aes32esi_cg_cmp_rd_rs2_b2: + aes32esi x2, x18, x2, 1 # perform operation +800039b0: 62290133 aes32esi x2,x18,x2,0x1 + # Check if x2 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x2, Zkne_aes32esi_cg_cmp_rd_rs2_b2, Zkne_aes32esi_cg_cmp_rd_rs2_b2_str) +800039b4: 000da383 lw x7,0(x27) +800039b8: 00238863 beq x7,x2,800039c8 +800039bc: 01d0446f jal x8,800081d8 +800039c0: 800039b0 .word 0x800039b0 +800039c4: 800137ee .word 0x800137ee +800039c8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x210c209c +800039cc: 000aa483 lw x9,0(x21) +800039d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x4c10417c +800039d4: 000aa183 lw x3,0(x21) +800039d8: 004a8a93 addi x21,x21,4 + +800039dc : +Zkne_aes32esi_cg_cmp_rd_rs2_b3: + aes32esi x3, x9, x3, 1 # perform operation +800039dc: 623481b3 aes32esi x3,x9,x3,0x1 + # Check if x3 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x3, Zkne_aes32esi_cg_cmp_rd_rs2_b3, Zkne_aes32esi_cg_cmp_rd_rs2_b3_str) +800039e0: 000da383 lw x7,0(x27) +800039e4: 00338863 beq x7,x3,800039f4 +800039e8: 7f00446f jal x8,800081d8 +800039ec: 800039dc .word 0x800039dc +800039f0: 80013829 .word 0x80013829 +800039f4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x6f8ccb29 +800039f8: 000aa803 lw x16,0(x21) +800039fc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x1dab1b52 +80003a00: 000aa203 lw x4,0(x21) +80003a04: 004a8a93 addi x21,x21,4 + +80003a08 : +Zkne_aes32esi_cg_cmp_rd_rs2_b4: + aes32esi x4, x16, x4, 0 # perform operation +80003a08: 22480233 aes32esi x4,x16,x4,0x0 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zkne_aes32esi_cg_cmp_rd_rs2_b4, Zkne_aes32esi_cg_cmp_rd_rs2_b4_str) +80003a0c: 000da383 lw x7,0(x27) +80003a10: 00438863 beq x7,x4,80003a20 +80003a14: 7c40446f jal x8,800081d8 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 80013864 .word 0x80013864 +80003a20: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x75deeadf +80003a24: 000aa903 lw x18,0(x21) +80003a28: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x16ec94d6 +80003a2c: 000aa283 lw x5,0(x21) +80003a30: 004a8a93 addi x21,x21,4 + +80003a34 : +Zkne_aes32esi_cg_cmp_rd_rs2_b5: + aes32esi x5, x18, x5, 3 # perform operation +80003a34: e25902b3 aes32esi x5,x18,x5,0x3 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zkne_aes32esi_cg_cmp_rd_rs2_b5, Zkne_aes32esi_cg_cmp_rd_rs2_b5_str) +80003a38: 000da383 lw x7,0(x27) +80003a3c: 00538863 beq x7,x5,80003a4c +80003a40: 7980446f jal x8,800081d8 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 8001389f .word 0x8001389f +80003a4c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x673571f0 +80003a50: 000aa603 lw x12,0(x21) +80003a54: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x826d2155 +80003a58: 000aa303 lw x6,0(x21) +80003a5c: 004a8a93 addi x21,x21,4 + +80003a60 : +Zkne_aes32esi_cg_cmp_rd_rs2_b6: + aes32esi x6, x12, x6, 0 # perform operation +80003a60: 22660333 aes32esi x6,x12,x6,0x0 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zkne_aes32esi_cg_cmp_rd_rs2_b6, Zkne_aes32esi_cg_cmp_rd_rs2_b6_str) +80003a64: 000da383 lw x7,0(x27) +80003a68: 00638863 beq x7,x6,80003a78 +80003a6c: 76c0446f jal x8,800081d8 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 800138da .word 0x800138da +80003a78: 004d8d93 addi x27,x27,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a7c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a80: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x88ad6c2a +80003a84: 000aab83 lw x23,0(x21) +80003a88: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x625b0ac9 +80003a8c: 000aa383 lw x7,0(x21) +80003a90: 004a8a93 addi x21,x21,4 + +80003a94 : +Zkne_aes32esi_cg_cmp_rd_rs2_b7: + aes32esi x7, x23, x7, 1 # perform operation +80003a94: 627b83b3 aes32esi x7,x23,x7,0x1 + # Check if x7 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x7, Zkne_aes32esi_cg_cmp_rd_rs2_b7, Zkne_aes32esi_cg_cmp_rd_rs2_b7_str) +80003a98: 000da683 lw x13,0(x27) +80003a9c: 00768863 beq x13,x7,80003aac +80003aa0: 7600476f jal x14,80008200 +80003aa4: 80003a94 .word 0x80003a94 +80003aa8: 80013915 .word 0x80013915 +80003aac: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x0b3a9e99 +80003ab0: 000aa983 lw x19,0(x21) +80003ab4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x8d8d2d28 +80003ab8: 000aa403 lw x8,0(x21) +80003abc: 004a8a93 addi x21,x21,4 + +80003ac0 : +Zkne_aes32esi_cg_cmp_rd_rs2_b8: + aes32esi x8, x19, x8, 3 # perform operation +80003ac0: e2898433 aes32esi x8,x19,x8,0x3 + # Check if x8 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x8, Zkne_aes32esi_cg_cmp_rd_rs2_b8, Zkne_aes32esi_cg_cmp_rd_rs2_b8_str) +80003ac4: 000da683 lw x13,0(x27) +80003ac8: 00868863 beq x13,x8,80003ad8 +80003acc: 7340476f jal x14,80008200 +80003ad0: 80003ac0 .word 0x80003ac0 +80003ad4: 80013950 .word 0x80013950 +80003ad8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x7745cc2d +80003adc: 000aaa03 lw x20,0(x21) +80003ae0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xc42a0561 +80003ae4: 000aa483 lw x9,0(x21) +80003ae8: 004a8a93 addi x21,x21,4 + +80003aec : +Zkne_aes32esi_cg_cmp_rd_rs2_b9: + aes32esi x9, x20, x9, 2 # perform operation +80003aec: a29a04b3 aes32esi x9,x20,x9,0x2 + # Check if x9 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x9, Zkne_aes32esi_cg_cmp_rd_rs2_b9, Zkne_aes32esi_cg_cmp_rd_rs2_b9_str) +80003af0: 000da683 lw x13,0(x27) +80003af4: 00968863 beq x13,x9,80003b04 +80003af8: 7080476f jal x14,80008200 +80003afc: 80003aec .word 0x80003aec +80003b00: 8001398b .word 0x8001398b +80003b04: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xd5a076b4 +80003b08: 000aa383 lw x7,0(x21) +80003b0c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x4eedfdaf +80003b10: 000aa503 lw x10,0(x21) +80003b14: 004a8a93 addi x21,x21,4 + +80003b18 : +Zkne_aes32esi_cg_cmp_rd_rs2_b10: + aes32esi x10, x7, x10, 1 # perform operation +80003b18: 62a38533 aes32esi x10,x7,x10,0x1 + # Check if x10 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x10, Zkne_aes32esi_cg_cmp_rd_rs2_b10, Zkne_aes32esi_cg_cmp_rd_rs2_b10_str) +80003b1c: 000da683 lw x13,0(x27) +80003b20: 00a68863 beq x13,x10,80003b30 +80003b24: 6dc0476f jal x14,80008200 +80003b28: 80003b18 .word 0x80003b18 +80003b2c: 800139c6 .word 0x800139c6 +80003b30: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xe2b2e976 +80003b34: 000aac03 lw x24,0(x21) +80003b38: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xbc60a78e +80003b3c: 000aa583 lw x11,0(x21) +80003b40: 004a8a93 addi x21,x21,4 + +80003b44 : +Zkne_aes32esi_cg_cmp_rd_rs2_b11: + aes32esi x11, x24, x11, 1 # perform operation +80003b44: 62bc05b3 aes32esi x11,x24,x11,0x1 + # Check if x11 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x11, Zkne_aes32esi_cg_cmp_rd_rs2_b11, Zkne_aes32esi_cg_cmp_rd_rs2_b11_str) +80003b48: 000da683 lw x13,0(x27) +80003b4c: 00b68863 beq x13,x11,80003b5c +80003b50: 6b00476f jal x14,80008200 +80003b54: 80003b44 .word 0x80003b44 +80003b58: 80013a02 .word 0x80013a02 +80003b5c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x93e3abe8 +80003b60: 000aab83 lw x23,0(x21) +80003b64: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xc16032bb +80003b68: 000aa603 lw x12,0(x21) +80003b6c: 004a8a93 addi x21,x21,4 + +80003b70 : +Zkne_aes32esi_cg_cmp_rd_rs2_b12: + aes32esi x12, x23, x12, 3 # perform operation +80003b70: e2cb8633 aes32esi x12,x23,x12,0x3 + # Check if x12 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x12, Zkne_aes32esi_cg_cmp_rd_rs2_b12, Zkne_aes32esi_cg_cmp_rd_rs2_b12_str) +80003b74: 000da683 lw x13,0(x27) +80003b78: 00c68863 beq x13,x12,80003b88 +80003b7c: 6840476f jal x14,80008200 +80003b80: 80003b70 .word 0x80003b70 +80003b84: 80013a3e .word 0x80013a3e +80003b88: 004d8d93 addi x27,x27,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003b8c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003b90: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x95e86c5d +80003b94: 000aa183 lw x3,0(x21) +80003b98: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xc1c917bf +80003b9c: 000aa683 lw x13,0(x21) +80003ba0: 004a8a93 addi x21,x21,4 + +80003ba4 : +Zkne_aes32esi_cg_cmp_rd_rs2_b13: + aes32esi x13, x3, x13, 0 # perform operation +80003ba4: 22d186b3 aes32esi x13,x3,x13,0x0 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zkne_aes32esi_cg_cmp_rd_rs2_b13, Zkne_aes32esi_cg_cmp_rd_rs2_b13_str) +80003ba8: 000da203 lw x4,0(x27) +80003bac: 00d20863 beq x4,x13,80003bbc +80003bb0: 610042ef jal x5,800081c0 +80003bb4: 80003ba4 .word 0x80003ba4 +80003bb8: 80013a7a .word 0x80013a7a +80003bbc: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xf0494e20 +80003bc0: 000aa783 lw x15,0(x21) +80003bc4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x0a957835 +80003bc8: 000aa703 lw x14,0(x21) +80003bcc: 004a8a93 addi x21,x21,4 + +80003bd0 : +Zkne_aes32esi_cg_cmp_rd_rs2_b14: + aes32esi x14, x15, x14, 2 # perform operation +80003bd0: a2e78733 aes32esi x14,x15,x14,0x2 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zkne_aes32esi_cg_cmp_rd_rs2_b14, Zkne_aes32esi_cg_cmp_rd_rs2_b14_str) +80003bd4: 000da203 lw x4,0(x27) +80003bd8: 00e20863 beq x4,x14,80003be8 +80003bdc: 5e4042ef jal x5,800081c0 +80003be0: 80003bd0 .word 0x80003bd0 +80003be4: 80013ab6 .word 0x80013ab6 +80003be8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x5cec6d70 +80003bec: 000aa483 lw x9,0(x21) +80003bf0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xb9b33aeb +80003bf4: 000aa783 lw x15,0(x21) +80003bf8: 004a8a93 addi x21,x21,4 + +80003bfc : +Zkne_aes32esi_cg_cmp_rd_rs2_b15: + aes32esi x15, x9, x15, 3 # perform operation +80003bfc: e2f487b3 aes32esi x15,x9,x15,0x3 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zkne_aes32esi_cg_cmp_rd_rs2_b15, Zkne_aes32esi_cg_cmp_rd_rs2_b15_str) +80003c00: 000da203 lw x4,0(x27) +80003c04: 00f20863 beq x4,x15,80003c14 +80003c08: 5b8042ef jal x5,800081c0 +80003c0c: 80003bfc .word 0x80003bfc +80003c10: 80013af2 .word 0x80013af2 +80003c14: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xfee6944a +80003c18: 000aa103 lw x2,0(x21) +80003c1c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x6cbebdc0 +80003c20: 000aa803 lw x16,0(x21) +80003c24: 004a8a93 addi x21,x21,4 + +80003c28 : +Zkne_aes32esi_cg_cmp_rd_rs2_b16: + aes32esi x16, x2, x16, 3 # perform operation +80003c28: e3010833 aes32esi x16,x2,x16,0x3 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zkne_aes32esi_cg_cmp_rd_rs2_b16, Zkne_aes32esi_cg_cmp_rd_rs2_b16_str) +80003c2c: 000da203 lw x4,0(x27) +80003c30: 01020863 beq x4,x16,80003c40 +80003c34: 58c042ef jal x5,800081c0 +80003c38: 80003c28 .word 0x80003c28 +80003c3c: 80013b2e .word 0x80013b2e +80003c40: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x2b564916 +80003c44: 000aad03 lw x26,0(x21) +80003c48: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xfba17ced +80003c4c: 000aa883 lw x17,0(x21) +80003c50: 004a8a93 addi x21,x21,4 + +80003c54 : +Zkne_aes32esi_cg_cmp_rd_rs2_b17: + aes32esi x17, x26, x17, 1 # perform operation +80003c54: 631d08b3 aes32esi x17,x26,x17,0x1 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zkne_aes32esi_cg_cmp_rd_rs2_b17, Zkne_aes32esi_cg_cmp_rd_rs2_b17_str) +80003c58: 000da203 lw x4,0(x27) +80003c5c: 01120863 beq x4,x17,80003c6c +80003c60: 560042ef jal x5,800081c0 +80003c64: 80003c54 .word 0x80003c54 +80003c68: 80013b6a .word 0x80013b6a +80003c6c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x4cc839f5 +80003c70: 000aae03 lw x28,0(x21) +80003c74: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xdd382a1e +80003c78: 000aa903 lw x18,0(x21) +80003c7c: 004a8a93 addi x21,x21,4 + +80003c80 : +Zkne_aes32esi_cg_cmp_rd_rs2_b18: + aes32esi x18, x28, x18, 2 # perform operation +80003c80: a32e0933 aes32esi x18,x28,x18,0x2 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zkne_aes32esi_cg_cmp_rd_rs2_b18, Zkne_aes32esi_cg_cmp_rd_rs2_b18_str) +80003c84: 000da203 lw x4,0(x27) +80003c88: 01220863 beq x4,x18,80003c98 +80003c8c: 534042ef jal x5,800081c0 +80003c90: 80003c80 .word 0x80003c80 +80003c94: 80013ba6 .word 0x80013ba6 +80003c98: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x781fda5d +80003c9c: 000aa503 lw x10,0(x21) +80003ca0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x17d9481d +80003ca4: 000aa983 lw x19,0(x21) +80003ca8: 004a8a93 addi x21,x21,4 + +80003cac : +Zkne_aes32esi_cg_cmp_rd_rs2_b19: + aes32esi x19, x10, x19, 2 # perform operation +80003cac: a33509b3 aes32esi x19,x10,x19,0x2 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zkne_aes32esi_cg_cmp_rd_rs2_b19, Zkne_aes32esi_cg_cmp_rd_rs2_b19_str) +80003cb0: 000da203 lw x4,0(x27) +80003cb4: 01320863 beq x4,x19,80003cc4 +80003cb8: 508042ef jal x5,800081c0 +80003cbc: 80003cac .word 0x80003cac +80003cc0: 80013be2 .word 0x80013be2 +80003cc4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xafe9488f +80003cc8: 000aad03 lw x26,0(x21) +80003ccc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xec3efaf1 +80003cd0: 000aaa03 lw x20,0(x21) +80003cd4: 004a8a93 addi x21,x21,4 + +80003cd8 : +Zkne_aes32esi_cg_cmp_rd_rs2_b20: + aes32esi x20, x26, x20, 1 # perform operation +80003cd8: 634d0a33 aes32esi x20,x26,x20,0x1 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zkne_aes32esi_cg_cmp_rd_rs2_b20, Zkne_aes32esi_cg_cmp_rd_rs2_b20_str) +80003cdc: 000da203 lw x4,0(x27) +80003ce0: 01420863 beq x4,x20,80003cf0 +80003ce4: 4dc042ef jal x5,800081c0 +80003ce8: 80003cd8 .word 0x80003cd8 +80003cec: 80013c1e .word 0x80013c1e +80003cf0: 004d8d93 addi x27,x27,4 + + mv x6, x21 # switch data pointer register to avoid conflict with test +80003cf4: 000a8313 addi x6,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x776c564f +80003cf8: 00032103 lw x2,0(x6) +80003cfc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xb77a079a +80003d00: 00032a83 lw x21,0(x6) +80003d04: 00430313 addi x6,x6,4 + +80003d08 : +Zkne_aes32esi_cg_cmp_rd_rs2_b21: + aes32esi x21, x2, x21, 0 # perform operation +80003d08: 23510ab3 aes32esi x21,x2,x21,0x0 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zkne_aes32esi_cg_cmp_rd_rs2_b21, Zkne_aes32esi_cg_cmp_rd_rs2_b21_str) +80003d0c: 000da203 lw x4,0(x27) +80003d10: 01520863 beq x4,x21,80003d20 +80003d14: 4ac042ef jal x5,800081c0 +80003d18: 80003d08 .word 0x80003d08 +80003d1c: 80013c5a .word 0x80013c5a +80003d20: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x010d05c4 +80003d24: 00032803 lw x16,0(x6) +80003d28: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x769ef825 +80003d2c: 00032b03 lw x22,0(x6) +80003d30: 00430313 addi x6,x6,4 + +80003d34 : +Zkne_aes32esi_cg_cmp_rd_rs2_b22: + aes32esi x22, x16, x22, 3 # perform operation +80003d34: e3680b33 aes32esi x22,x16,x22,0x3 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zkne_aes32esi_cg_cmp_rd_rs2_b22, Zkne_aes32esi_cg_cmp_rd_rs2_b22_str) +80003d38: 000da203 lw x4,0(x27) +80003d3c: 01620863 beq x4,x22,80003d4c +80003d40: 480042ef jal x5,800081c0 +80003d44: 80003d34 .word 0x80003d34 +80003d48: 80013c96 .word 0x80013c96 +80003d4c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x9739ee8a +80003d50: 00032803 lw x16,0(x6) +80003d54: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x9c832f02 +80003d58: 00032b83 lw x23,0(x6) +80003d5c: 00430313 addi x6,x6,4 + +80003d60 : +Zkne_aes32esi_cg_cmp_rd_rs2_b23: + aes32esi x23, x16, x23, 0 # perform operation +80003d60: 23780bb3 aes32esi x23,x16,x23,0x0 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zkne_aes32esi_cg_cmp_rd_rs2_b23, Zkne_aes32esi_cg_cmp_rd_rs2_b23_str) +80003d64: 000da203 lw x4,0(x27) +80003d68: 01720863 beq x4,x23,80003d78 +80003d6c: 454042ef jal x5,800081c0 +80003d70: 80003d60 .word 0x80003d60 +80003d74: 80013cd2 .word 0x80013cd2 +80003d78: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xe61dc49d +80003d7c: 00032383 lw x7,0(x6) +80003d80: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x656557d3 +80003d84: 00032c03 lw x24,0(x6) +80003d88: 00430313 addi x6,x6,4 + +80003d8c : +Zkne_aes32esi_cg_cmp_rd_rs2_b24: + aes32esi x24, x7, x24, 0 # perform operation +80003d8c: 23838c33 aes32esi x24,x7,x24,0x0 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zkne_aes32esi_cg_cmp_rd_rs2_b24, Zkne_aes32esi_cg_cmp_rd_rs2_b24_str) +80003d90: 000da203 lw x4,0(x27) +80003d94: 01820863 beq x4,x24,80003da4 +80003d98: 428042ef jal x5,800081c0 +80003d9c: 80003d8c .word 0x80003d8c +80003da0: 80013d0e .word 0x80013d0e +80003da4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x07a9a1b5 +80003da8: 00032083 lw x1,0(x6) +80003dac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x3696c719 +80003db0: 00032c83 lw x25,0(x6) +80003db4: 00430313 addi x6,x6,4 + +80003db8 : +Zkne_aes32esi_cg_cmp_rd_rs2_b25: + aes32esi x25, x1, x25, 1 # perform operation +80003db8: 63908cb3 aes32esi x25,x1,x25,0x1 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zkne_aes32esi_cg_cmp_rd_rs2_b25, Zkne_aes32esi_cg_cmp_rd_rs2_b25_str) +80003dbc: 000da203 lw x4,0(x27) +80003dc0: 01920863 beq x4,x25,80003dd0 +80003dc4: 3fc042ef jal x5,800081c0 +80003dc8: 80003db8 .word 0x80003db8 +80003dcc: 80013d4a .word 0x80013d4a +80003dd0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xde7373d2 +80003dd4: 00032e03 lw x28,0(x6) +80003dd8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xbbcf4ad8 +80003ddc: 00032d03 lw x26,0(x6) +80003de0: 00430313 addi x6,x6,4 + +80003de4 : +Zkne_aes32esi_cg_cmp_rd_rs2_b26: + aes32esi x26, x28, x26, 3 # perform operation +80003de4: e3ae0d33 aes32esi x26,x28,x26,0x3 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zkne_aes32esi_cg_cmp_rd_rs2_b26, Zkne_aes32esi_cg_cmp_rd_rs2_b26_str) +80003de8: 000da203 lw x4,0(x27) +80003dec: 01a20863 beq x4,x26,80003dfc +80003df0: 3d0042ef jal x5,800081c0 +80003df4: 80003de4 .word 0x80003de4 +80003df8: 80013d86 .word 0x80013d86 +80003dfc: 004d8d93 addi x27,x27,4 + + mv x1, x27 # switch signature pointer register to avoid conflict with test +80003e00: 000d8093 addi x1,x27,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x620fbb5e +80003e04: 00032b03 lw x22,0(x6) +80003e08: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x32b7a334 +80003e0c: 00032d83 lw x27,0(x6) +80003e10: 00430313 addi x6,x6,4 + +80003e14 : +Zkne_aes32esi_cg_cmp_rd_rs2_b27: + aes32esi x27, x22, x27, 0 # perform operation +80003e14: 23bb0db3 aes32esi x27,x22,x27,0x0 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zkne_aes32esi_cg_cmp_rd_rs2_b27, Zkne_aes32esi_cg_cmp_rd_rs2_b27_str) +80003e18: 0000a203 lw x4,0(x1) +80003e1c: 01b20863 beq x4,x27,80003e2c +80003e20: 3a0042ef jal x5,800081c0 +80003e24: 80003e14 .word 0x80003e14 +80003e28: 80013dc2 .word 0x80013dc2 +80003e2c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xd17e3dda +80003e30: 00032c03 lw x24,0(x6) +80003e34: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xe4f22ff4 +80003e38: 00032e03 lw x28,0(x6) +80003e3c: 00430313 addi x6,x6,4 + +80003e40 : +Zkne_aes32esi_cg_cmp_rd_rs2_b28: + aes32esi x28, x24, x28, 2 # perform operation +80003e40: a3cc0e33 aes32esi x28,x24,x28,0x2 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zkne_aes32esi_cg_cmp_rd_rs2_b28, Zkne_aes32esi_cg_cmp_rd_rs2_b28_str) +80003e44: 0000a203 lw x4,0(x1) +80003e48: 01c20863 beq x4,x28,80003e58 +80003e4c: 374042ef jal x5,800081c0 +80003e50: 80003e40 .word 0x80003e40 +80003e54: 80013dfe .word 0x80013dfe +80003e58: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x84ff7ece +80003e5c: 00032483 lw x9,0(x6) +80003e60: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0985a28d +80003e64: 00032e83 lw x29,0(x6) +80003e68: 00430313 addi x6,x6,4 + +80003e6c : +Zkne_aes32esi_cg_cmp_rd_rs2_b29: + aes32esi x29, x9, x29, 1 # perform operation +80003e6c: 63d48eb3 aes32esi x29,x9,x29,0x1 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zkne_aes32esi_cg_cmp_rd_rs2_b29, Zkne_aes32esi_cg_cmp_rd_rs2_b29_str) +80003e70: 0000a203 lw x4,0(x1) +80003e74: 01d20863 beq x4,x29,80003e84 +80003e78: 348042ef jal x5,800081c0 +80003e7c: 80003e6c .word 0x80003e6c +80003e80: 80013e3a .word 0x80013e3a +80003e84: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xd7de5058 +80003e88: 00032e03 lw x28,0(x6) +80003e8c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x3cb6b8cb +80003e90: 00032f03 lw x30,0(x6) +80003e94: 00430313 addi x6,x6,4 + +80003e98 : +Zkne_aes32esi_cg_cmp_rd_rs2_b30: + aes32esi x30, x28, x30, 2 # perform operation +80003e98: a3ee0f33 aes32esi x30,x28,x30,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zkne_aes32esi_cg_cmp_rd_rs2_b30, Zkne_aes32esi_cg_cmp_rd_rs2_b30_str) +80003e9c: 0000a203 lw x4,0(x1) +80003ea0: 01e20863 beq x4,x30,80003eb0 +80003ea4: 31c042ef jal x5,800081c0 +80003ea8: 80003e98 .word 0x80003e98 +80003eac: 80013e76 .word 0x80013e76 +80003eb0: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x2df39070 +80003eb4: 00032b83 lw x23,0(x6) +80003eb8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x2d0db9bd +80003ebc: 00032f83 lw x31,0(x6) +80003ec0: 00430313 addi x6,x6,4 + +80003ec4 : +Zkne_aes32esi_cg_cmp_rd_rs2_b31: + aes32esi x31, x23, x31, 2 # perform operation +80003ec4: a3fb8fb3 aes32esi x31,x23,x31,0x2 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zkne_aes32esi_cg_cmp_rd_rs2_b31, Zkne_aes32esi_cg_cmp_rd_rs2_b31_str) +80003ec8: 0000a203 lw x4,0(x1) +80003ecc: 01f20863 beq x4,x31,80003edc +80003ed0: 2f0042ef jal x5,800081c0 +80003ed4: 80003ec4 .word 0x80003ec4 +80003ed8: 80013eb2 .word 0x80013eb2 +80003edc: 00408093 addi x1,x1,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x910664fc +80003ee0: 00032003 lw x0,0(x6) +80003ee4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x47f80696 +80003ee8: 00032003 lw x0,0(x6) +80003eec: 00430313 addi x6,x6,4 + +80003ef0 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b0: + aes32esi x0, x0, x0, 2 # perform operation +80003ef0: a2000033 aes32esi x0,x0,x0,0x2 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b0, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b0_str) +80003ef4: 0000a203 lw x4,0(x1) +80003ef8: 00020863 beq x4,x0,80003f08 +80003efc: 2c4042ef jal x5,800081c0 +80003f00: 80003ef0 .word 0x80003ef0 +80003f04: 80013eee .word 0x80013eee +80003f08: 00408093 addi x1,x1,4 + + mv x29, x1 # switch signature pointer register to avoid conflict with test +80003f0c: 00008e93 addi x29,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x6635a310 +80003f10: 00032083 lw x1,0(x6) +80003f14: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xe592fe99 +80003f18: 00032083 lw x1,0(x6) +80003f1c: 00430313 addi x6,x6,4 + +80003f20 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b1: + aes32esi x1, x1, x1, 2 # perform operation +80003f20: a21080b3 aes32esi x1,x1,x1,0x2 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b1, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b1_str) +80003f24: 000ea203 lw x4,0(x29) +80003f28: 00120863 beq x4,x1,80003f38 +80003f2c: 294042ef jal x5,800081c0 +80003f30: 80003f20 .word 0x80003f20 +80003f34: 80013f2d .word 0x80013f2d +80003f38: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xef8d2443 +80003f3c: 00032103 lw x2,0(x6) +80003f40: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x9bbdbbce +80003f44: 00032103 lw x2,0(x6) +80003f48: 00430313 addi x6,x6,4 + +80003f4c : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b2: + aes32esi x2, x2, x2, 1 # perform operation +80003f4c: 62210133 aes32esi x2,x2,x2,0x1 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b2, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b2_str) +80003f50: 000ea203 lw x4,0(x29) +80003f54: 00220863 beq x4,x2,80003f64 +80003f58: 268042ef jal x5,800081c0 +80003f5c: 80003f4c .word 0x80003f4c +80003f60: 80013f6c .word 0x80013f6c +80003f64: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x07b81f34 +80003f68: 00032183 lw x3,0(x6) +80003f6c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xc3548bda +80003f70: 00032183 lw x3,0(x6) +80003f74: 00430313 addi x6,x6,4 + +80003f78 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b3: + aes32esi x3, x3, x3, 1 # perform operation +80003f78: 623181b3 aes32esi x3,x3,x3,0x1 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b3, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b3_str) +80003f7c: 000ea203 lw x4,0(x29) +80003f80: 00320863 beq x4,x3,80003f90 +80003f84: 23c042ef jal x5,800081c0 +80003f88: 80003f78 .word 0x80003f78 +80003f8c: 80013fab .word 0x80013fab +80003f90: 004e8e93 addi x29,x29,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003f94: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003f98: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x9b350e6a +80003f9c: 00032203 lw x4,0(x6) +80003fa0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x98fb068f +80003fa4: 00032203 lw x4,0(x6) +80003fa8: 00430313 addi x6,x6,4 + +80003fac : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b4: + aes32esi x4, x4, x4, 1 # perform operation +80003fac: 62420233 aes32esi x4,x4,x4,0x1 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b4, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b4_str) +80003fb0: 000ea383 lw x7,0(x29) +80003fb4: 00438863 beq x7,x4,80003fc4 +80003fb8: 2200446f jal x8,800081d8 +80003fbc: 80003fac .word 0x80003fac +80003fc0: 80013fea .word 0x80013fea +80003fc4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xb98f398a +80003fc8: 00032283 lw x5,0(x6) +80003fcc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x5eae45aa +80003fd0: 00032283 lw x5,0(x6) +80003fd4: 00430313 addi x6,x6,4 + +80003fd8 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b5: + aes32esi x5, x5, x5, 2 # perform operation +80003fd8: a25282b3 aes32esi x5,x5,x5,0x2 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b5, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b5_str) +80003fdc: 000ea383 lw x7,0(x29) +80003fe0: 00538863 beq x7,x5,80003ff0 +80003fe4: 1f40446f jal x8,800081d8 +80003fe8: 80003fd8 .word 0x80003fd8 +80003fec: 80014029 .word 0x80014029 +80003ff0: 004e8e93 addi x29,x29,4 + + mv x18, x6 # switch data pointer register to avoid conflict with test +80003ff4: 00030913 addi x18,x6,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xc09fc221 +80003ff8: 00092303 lw x6,0(x18) +80003ffc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xe8128c65 +80004000: 00092303 lw x6,0(x18) +80004004: 00490913 addi x18,x18,4 + +80004008 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b6: + aes32esi x6, x6, x6, 0 # perform operation +80004008: 22630333 aes32esi x6,x6,x6,0x0 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b6, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b6_str) +8000400c: 000ea383 lw x7,0(x29) +80004010: 00638863 beq x7,x6,80004020 +80004014: 1c40446f jal x8,800081d8 +80004018: 80004008 .word 0x80004008 +8000401c: 80014068 .word 0x80014068 +80004020: 004e8e93 addi x29,x29,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80004024: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80004028: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xff397410 +8000402c: 00092383 lw x7,0(x18) +80004030: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xc95d1428 +80004034: 00092383 lw x7,0(x18) +80004038: 00490913 addi x18,x18,4 + +8000403c : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b7: + aes32esi x7, x7, x7, 3 # perform operation +8000403c: e27383b3 aes32esi x7,x7,x7,0x3 + # Check if x7 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x7, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b7, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b7_str) +80004040: 000ea683 lw x13,0(x29) +80004044: 00768863 beq x13,x7,80004054 +80004048: 1b80476f jal x14,80008200 +8000404c: 8000403c .word 0x8000403c +80004050: 800140a7 .word 0x800140a7 +80004054: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xd7a2e14b +80004058: 00092403 lw x8,0(x18) +8000405c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x73c5e728 +80004060: 00092403 lw x8,0(x18) +80004064: 00490913 addi x18,x18,4 + +80004068 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b8: + aes32esi x8, x8, x8, 0 # perform operation +80004068: 22840433 aes32esi x8,x8,x8,0x0 + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b8, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b8_str) +8000406c: 000ea683 lw x13,0(x29) +80004070: 00868863 beq x13,x8,80004080 +80004074: 18c0476f jal x14,80008200 +80004078: 80004068 .word 0x80004068 +8000407c: 800140e6 .word 0x800140e6 +80004080: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x2f89a9ab +80004084: 00092483 lw x9,0(x18) +80004088: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x862d3b90 +8000408c: 00092483 lw x9,0(x18) +80004090: 00490913 addi x18,x18,4 + +80004094 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b9: + aes32esi x9, x9, x9, 0 # perform operation +80004094: 229484b3 aes32esi x9,x9,x9,0x0 + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b9, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b9_str) +80004098: 000ea683 lw x13,0(x29) +8000409c: 00968863 beq x13,x9,800040ac +800040a0: 1600476f jal x14,80008200 +800040a4: 80004094 .word 0x80004094 +800040a8: 80014125 .word 0x80014125 +800040ac: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x59e03cf5 +800040b0: 00092503 lw x10,0(x18) +800040b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xce912da5 +800040b8: 00092503 lw x10,0(x18) +800040bc: 00490913 addi x18,x18,4 + +800040c0 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b10: + aes32esi x10, x10, x10, 3 # perform operation +800040c0: e2a50533 aes32esi x10,x10,x10,0x3 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b10, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b10_str) +800040c4: 000ea683 lw x13,0(x29) +800040c8: 00a68863 beq x13,x10,800040d8 +800040cc: 1340476f jal x14,80008200 +800040d0: 800040c0 .word 0x800040c0 +800040d4: 80014164 .word 0x80014164 +800040d8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x02b67f1d +800040dc: 00092583 lw x11,0(x18) +800040e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x5d56b80d +800040e4: 00092583 lw x11,0(x18) +800040e8: 00490913 addi x18,x18,4 + +800040ec : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b11: + aes32esi x11, x11, x11, 2 # perform operation +800040ec: a2b585b3 aes32esi x11,x11,x11,0x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b11, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b11_str) +800040f0: 000ea683 lw x13,0(x29) +800040f4: 00b68863 beq x13,x11,80004104 +800040f8: 1080476f jal x14,80008200 +800040fc: 800040ec .word 0x800040ec +80004100: 800141a4 .word 0x800141a4 +80004104: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x6f610019 +80004108: 00092603 lw x12,0(x18) +8000410c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x51d605cd +80004110: 00092603 lw x12,0(x18) +80004114: 00490913 addi x18,x18,4 + +80004118 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b12: + aes32esi x12, x12, x12, 1 # perform operation +80004118: 62c60633 aes32esi x12,x12,x12,0x1 + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b12, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b12_str) +8000411c: 000ea683 lw x13,0(x29) +80004120: 00c68863 beq x13,x12,80004130 +80004124: 0dc0476f jal x14,80008200 +80004128: 80004118 .word 0x80004118 +8000412c: 800141e4 .word 0x800141e4 +80004130: 004e8e93 addi x29,x29,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80004134: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80004138: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xe63eb368 +8000413c: 00092683 lw x13,0(x18) +80004140: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x509e29ba +80004144: 00092683 lw x13,0(x18) +80004148: 00490913 addi x18,x18,4 + +8000414c : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b13: + aes32esi x13, x13, x13, 2 # perform operation +8000414c: a2d686b3 aes32esi x13,x13,x13,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b13, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b13_str) +80004150: 000ea203 lw x4,0(x29) +80004154: 00d20863 beq x4,x13,80004164 +80004158: 068042ef jal x5,800081c0 +8000415c: 8000414c .word 0x8000414c +80004160: 80014224 .word 0x80014224 +80004164: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x3c51a045 +80004168: 00092703 lw x14,0(x18) +8000416c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x7d02df54 +80004170: 00092703 lw x14,0(x18) +80004174: 00490913 addi x18,x18,4 + +80004178 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b14: + aes32esi x14, x14, x14, 3 # perform operation +80004178: e2e70733 aes32esi x14,x14,x14,0x3 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b14, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b14_str) +8000417c: 000ea203 lw x4,0(x29) +80004180: 00e20863 beq x4,x14,80004190 +80004184: 03c042ef jal x5,800081c0 +80004188: 80004178 .word 0x80004178 +8000418c: 80014264 .word 0x80014264 +80004190: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xf68659e9 +80004194: 00092783 lw x15,0(x18) +80004198: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xb38df06b +8000419c: 00092783 lw x15,0(x18) +800041a0: 00490913 addi x18,x18,4 + +800041a4 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b15: + aes32esi x15, x15, x15, 0 # perform operation +800041a4: 22f787b3 aes32esi x15,x15,x15,0x0 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b15, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b15_str) +800041a8: 000ea203 lw x4,0(x29) +800041ac: 00f20863 beq x4,x15,800041bc +800041b0: 010042ef jal x5,800081c0 +800041b4: 800041a4 .word 0x800041a4 +800041b8: 800142a4 .word 0x800142a4 +800041bc: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x235d1166 +800041c0: 00092803 lw x16,0(x18) +800041c4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x169dbf94 +800041c8: 00092803 lw x16,0(x18) +800041cc: 00490913 addi x18,x18,4 + +800041d0 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b16: + aes32esi x16, x16, x16, 2 # perform operation +800041d0: a3080833 aes32esi x16,x16,x16,0x2 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b16, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b16_str) +800041d4: 000ea203 lw x4,0(x29) +800041d8: 01020863 beq x4,x16,800041e8 +800041dc: 7e5032ef jal x5,800081c0 +800041e0: 800041d0 .word 0x800041d0 +800041e4: 800142e4 .word 0x800142e4 +800041e8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x03b9de6e +800041ec: 00092883 lw x17,0(x18) +800041f0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xe95eb7e8 +800041f4: 00092883 lw x17,0(x18) +800041f8: 00490913 addi x18,x18,4 + +800041fc : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b17: + aes32esi x17, x17, x17, 3 # perform operation +800041fc: e31888b3 aes32esi x17,x17,x17,0x3 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b17, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b17_str) +80004200: 000ea203 lw x4,0(x29) +80004204: 01120863 beq x4,x17,80004214 +80004208: 7b9032ef jal x5,800081c0 +8000420c: 800041fc .word 0x800041fc +80004210: 80014324 .word 0x80014324 +80004214: 004e8e93 addi x29,x29,4 + + mv x10, x18 # switch data pointer register to avoid conflict with test +80004218: 00090513 addi x10,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x4752f2a9 +8000421c: 00052903 lw x18,0(x10) +80004220: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xcabaad32 +80004224: 00052903 lw x18,0(x10) +80004228: 00450513 addi x10,x10,4 + +8000422c : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b18: + aes32esi x18, x18, x18, 1 # perform operation +8000422c: 63290933 aes32esi x18,x18,x18,0x1 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b18, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b18_str) +80004230: 000ea203 lw x4,0(x29) +80004234: 01220863 beq x4,x18,80004244 +80004238: 789032ef jal x5,800081c0 +8000423c: 8000422c .word 0x8000422c +80004240: 80014364 .word 0x80014364 +80004244: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x2f1ef503 +80004248: 00052983 lw x19,0(x10) +8000424c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xee2a7d67 +80004250: 00052983 lw x19,0(x10) +80004254: 00450513 addi x10,x10,4 + +80004258 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b19: + aes32esi x19, x19, x19, 1 # perform operation +80004258: 633989b3 aes32esi x19,x19,x19,0x1 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b19, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b19_str) +8000425c: 000ea203 lw x4,0(x29) +80004260: 01320863 beq x4,x19,80004270 +80004264: 75d032ef jal x5,800081c0 +80004268: 80004258 .word 0x80004258 +8000426c: 800143a4 .word 0x800143a4 +80004270: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xbb205f85 +80004274: 00052a03 lw x20,0(x10) +80004278: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xdb0eada1 +8000427c: 00052a03 lw x20,0(x10) +80004280: 00450513 addi x10,x10,4 + +80004284 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b20: + aes32esi x20, x20, x20, 1 # perform operation +80004284: 634a0a33 aes32esi x20,x20,x20,0x1 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b20, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b20_str) +80004288: 000ea203 lw x4,0(x29) +8000428c: 01420863 beq x4,x20,8000429c +80004290: 731032ef jal x5,800081c0 +80004294: 80004284 .word 0x80004284 +80004298: 800143e4 .word 0x800143e4 +8000429c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x79b19319 +800042a0: 00052a83 lw x21,0(x10) +800042a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x66ca3f65 +800042a8: 00052a83 lw x21,0(x10) +800042ac: 00450513 addi x10,x10,4 + +800042b0 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b21: + aes32esi x21, x21, x21, 0 # perform operation +800042b0: 235a8ab3 aes32esi x21,x21,x21,0x0 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b21, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b21_str) +800042b4: 000ea203 lw x4,0(x29) +800042b8: 01520863 beq x4,x21,800042c8 +800042bc: 705032ef jal x5,800081c0 +800042c0: 800042b0 .word 0x800042b0 +800042c4: 80014424 .word 0x80014424 +800042c8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xd5672604 +800042cc: 00052b03 lw x22,0(x10) +800042d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xcd59d568 +800042d4: 00052b03 lw x22,0(x10) +800042d8: 00450513 addi x10,x10,4 + +800042dc : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b22: + aes32esi x22, x22, x22, 3 # perform operation +800042dc: e36b0b33 aes32esi x22,x22,x22,0x3 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b22, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b22_str) +800042e0: 000ea203 lw x4,0(x29) +800042e4: 01620863 beq x4,x22,800042f4 +800042e8: 6d9032ef jal x5,800081c0 +800042ec: 800042dc .word 0x800042dc +800042f0: 80014464 .word 0x80014464 +800042f4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xe0e91420 +800042f8: 00052b83 lw x23,0(x10) +800042fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xfe0b926f +80004300: 00052b83 lw x23,0(x10) +80004304: 00450513 addi x10,x10,4 + +80004308 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b23: + aes32esi x23, x23, x23, 3 # perform operation +80004308: e37b8bb3 aes32esi x23,x23,x23,0x3 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b23, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b23_str) +8000430c: 000ea203 lw x4,0(x29) +80004310: 01720863 beq x4,x23,80004320 +80004314: 6ad032ef jal x5,800081c0 +80004318: 80004308 .word 0x80004308 +8000431c: 800144a4 .word 0x800144a4 +80004320: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7ec1ad03 +80004324: 00052c03 lw x24,0(x10) +80004328: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x3a9feb05 +8000432c: 00052c03 lw x24,0(x10) +80004330: 00450513 addi x10,x10,4 + +80004334 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b24: + aes32esi x24, x24, x24, 0 # perform operation +80004334: 238c0c33 aes32esi x24,x24,x24,0x0 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b24, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b24_str) +80004338: 000ea203 lw x4,0(x29) +8000433c: 01820863 beq x4,x24,8000434c +80004340: 681032ef jal x5,800081c0 +80004344: 80004334 .word 0x80004334 +80004348: 800144e4 .word 0x800144e4 +8000434c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xa5ec99da +80004350: 00052c83 lw x25,0(x10) +80004354: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x73c228e7 +80004358: 00052c83 lw x25,0(x10) +8000435c: 00450513 addi x10,x10,4 + +80004360 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b25: + aes32esi x25, x25, x25, 2 # perform operation +80004360: a39c8cb3 aes32esi x25,x25,x25,0x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b25, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b25_str) +80004364: 000ea203 lw x4,0(x29) +80004368: 01920863 beq x4,x25,80004378 +8000436c: 655032ef jal x5,800081c0 +80004370: 80004360 .word 0x80004360 +80004374: 80014524 .word 0x80014524 +80004378: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xeb4ef66c +8000437c: 00052d03 lw x26,0(x10) +80004380: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xf65a2273 +80004384: 00052d03 lw x26,0(x10) +80004388: 00450513 addi x10,x10,4 + +8000438c : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b26: + aes32esi x26, x26, x26, 3 # perform operation +8000438c: e3ad0d33 aes32esi x26,x26,x26,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b26, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b26_str) +80004390: 000ea203 lw x4,0(x29) +80004394: 01a20863 beq x4,x26,800043a4 +80004398: 629032ef jal x5,800081c0 +8000439c: 8000438c .word 0x8000438c +800043a0: 80014564 .word 0x80014564 +800043a4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8be01a53 +800043a8: 00052d83 lw x27,0(x10) +800043ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x788068ae +800043b0: 00052d83 lw x27,0(x10) +800043b4: 00450513 addi x10,x10,4 + +800043b8 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b27: + aes32esi x27, x27, x27, 3 # perform operation +800043b8: e3bd8db3 aes32esi x27,x27,x27,0x3 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b27, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b27_str) +800043bc: 000ea203 lw x4,0(x29) +800043c0: 01b20863 beq x4,x27,800043d0 +800043c4: 5fd032ef jal x5,800081c0 +800043c8: 800043b8 .word 0x800043b8 +800043cc: 800145a4 .word 0x800145a4 +800043d0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xff13243c +800043d4: 00052e03 lw x28,0(x10) +800043d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x43d0d1a8 +800043dc: 00052e03 lw x28,0(x10) +800043e0: 00450513 addi x10,x10,4 + +800043e4 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b28: + aes32esi x28, x28, x28, 1 # perform operation +800043e4: 63ce0e33 aes32esi x28,x28,x28,0x1 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b28, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b28_str) +800043e8: 000ea203 lw x4,0(x29) +800043ec: 01c20863 beq x4,x28,800043fc +800043f0: 5d1032ef jal x5,800081c0 +800043f4: 800043e4 .word 0x800043e4 +800043f8: 800145e4 .word 0x800145e4 +800043fc: 004e8e93 addi x29,x29,4 + + mv x31, x29 # switch signature pointer register to avoid conflict with test +80004400: 000e8f93 addi x31,x29,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x1239db41 +80004404: 00052e83 lw x29,0(x10) +80004408: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x2736f7ed +8000440c: 00052e83 lw x29,0(x10) +80004410: 00450513 addi x10,x10,4 + +80004414 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b29: + aes32esi x29, x29, x29, 3 # perform operation +80004414: e3de8eb3 aes32esi x29,x29,x29,0x3 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b29, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b29_str) +80004418: 000fa203 lw x4,0(x31) +8000441c: 01d20863 beq x4,x29,8000442c +80004420: 5a1032ef jal x5,800081c0 +80004424: 80004414 .word 0x80004414 +80004428: 80014624 .word 0x80014624 +8000442c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xeabd04ed +80004430: 00052f03 lw x30,0(x10) +80004434: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xa213f046 +80004438: 00052f03 lw x30,0(x10) +8000443c: 00450513 addi x10,x10,4 + +80004440 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b30: + aes32esi x30, x30, x30, 3 # perform operation +80004440: e3ef0f33 aes32esi x30,x30,x30,0x3 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b30, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b30_str) +80004444: 000fa203 lw x4,0(x31) +80004448: 01e20863 beq x4,x30,80004458 +8000444c: 575032ef jal x5,800081c0 +80004450: 80004440 .word 0x80004440 +80004454: 80014664 .word 0x80014664 +80004458: 004f8f93 addi x31,x31,4 + + mv x29, x31 # switch signature pointer register to avoid conflict with test +8000445c: 000f8e93 addi x29,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x08f91697 +80004460: 00052f83 lw x31,0(x10) +80004464: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x31f70550 +80004468: 00052f83 lw x31,0(x10) +8000446c: 00450513 addi x10,x10,4 + +80004470 : +Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b31: + aes32esi x31, x31, x31, 0 # perform operation +80004470: 23ff8fb3 aes32esi x31,x31,x31,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b31, Zkne_aes32esi_cg_cmp_rd_rs1_rs2_b31_str) +80004474: 000ea203 lw x4,0(x29) +80004478: 01f20863 beq x4,x31,80004488 +8000447c: 545032ef jal x5,800081c0 +80004480: 80004470 .word 0x80004470 +80004484: 800146a4 .word 0x800146a4 +80004488: 004e8e93 addi x29,x29,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xf9d25465 +8000448c: 00052c03 lw x24,0(x10) +80004490: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xa8051b49 +80004494: 00052a83 lw x21,0(x10) +80004498: 00450513 addi x10,x10,4 + +8000449c : +Zkne_aes32esi_cg_cp_bs_b0: + aes32esi x26, x24, x21, 0 # perform operation +8000449c: 235c0d33 aes32esi x26,x24,x21,0x0 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_bs_b0, Zkne_aes32esi_cg_cp_bs_b0_str) +800044a0: 000ea203 lw x4,0(x29) +800044a4: 01a20863 beq x4,x26,800044b4 +800044a8: 519032ef jal x5,800081c0 +800044ac: 8000449c .word 0x8000449c +800044b0: 800146e4 .word 0x800146e4 +800044b4: 004e8e93 addi x29,x29,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x7c0da283 +800044b8: 00052983 lw x19,0(x10) +800044bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x1696daba +800044c0: 00052103 lw x2,0(x10) +800044c4: 00450513 addi x10,x10,4 + +800044c8 : +Zkne_aes32esi_cg_cp_bs_b1: + aes32esi x1, x19, x2, 1 # perform operation +800044c8: 622980b3 aes32esi x1,x19,x2,0x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_bs_b1, Zkne_aes32esi_cg_cp_bs_b1_str) +800044cc: 000ea203 lw x4,0(x29) +800044d0: 00120863 beq x4,x1,800044e0 +800044d4: 4ed032ef jal x5,800081c0 +800044d8: 800044c8 .word 0x800044c8 +800044dc: 8001471a .word 0x8001471a +800044e0: 004e8e93 addi x29,x29,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xdba42721 +800044e4: 00052d83 lw x27,0(x10) +800044e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x583b8187 +800044ec: 00052303 lw x6,0(x10) +800044f0: 00450513 addi x10,x10,4 + +800044f4 : +Zkne_aes32esi_cg_cp_bs_b2: + aes32esi x31, x27, x6, 2 # perform operation +800044f4: a26d8fb3 aes32esi x31,x27,x6,0x2 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_bs_b2, Zkne_aes32esi_cg_cp_bs_b2_str) +800044f8: 000ea203 lw x4,0(x29) +800044fc: 01f20863 beq x4,x31,8000450c +80004500: 4c1032ef jal x5,800081c0 +80004504: 800044f4 .word 0x800044f4 +80004508: 80014750 .word 0x80014750 +8000450c: 004e8e93 addi x29,x29,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x212ecd3f +80004510: 00052083 lw x1,0(x10) +80004514: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x4916044e +80004518: 00052c03 lw x24,0(x10) +8000451c: 00450513 addi x10,x10,4 + +80004520 : +Zkne_aes32esi_cg_cp_bs_b3: + aes32esi x18, x1, x24, 3 # perform operation +80004520: e3808933 aes32esi x18,x1,x24,0x3 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_bs_b3, Zkne_aes32esi_cg_cp_bs_b3_str) +80004524: 000ea203 lw x4,0(x29) +80004528: 01220863 beq x4,x18,80004538 +8000452c: 495032ef jal x5,800081c0 +80004530: 80004520 .word 0x80004520 +80004534: 80014786 .word 0x80014786 +80004538: 004e8e93 addi x29,x29,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x00000000 +8000453c: 00052903 lw x18,0(x10) +80004540: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000000 +80004544: 00052603 lw x12,0(x10) +80004548: 00450513 addi x10,x10,4 + +8000454c : +Zkne_aes32esi_cg_cp_sbox_b0: + aes32esi x20, x18, x12, 3 # perform operation +8000454c: e2c90a33 aes32esi x20,x18,x12,0x3 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b0, Zkne_aes32esi_cg_cp_sbox_b0_str) +80004550: 000ea203 lw x4,0(x29) +80004554: 01420863 beq x4,x20,80004564 +80004558: 469032ef jal x5,800081c0 +8000455c: 8000454c .word 0x8000454c +80004560: 800147bc .word 0x800147bc +80004564: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x01010101 +80004568: 00052383 lw x7,0(x10) +8000456c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x01010101 +80004570: 00052783 lw x15,0(x10) +80004574: 00450513 addi x10,x10,4 + +80004578 : +Zkne_aes32esi_cg_cp_sbox_b1: + aes32esi x22, x7, x15, 0 # perform operation +80004578: 22f38b33 aes32esi x22,x7,x15,0x0 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b1, Zkne_aes32esi_cg_cp_sbox_b1_str) +8000457c: 000ea203 lw x4,0(x29) +80004580: 01620863 beq x4,x22,80004590 +80004584: 43d032ef jal x5,800081c0 +80004588: 80004578 .word 0x80004578 +8000458c: 800147f4 .word 0x800147f4 +80004590: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x02020202 +80004594: 00052e03 lw x28,0(x10) +80004598: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x02020202 +8000459c: 00052603 lw x12,0(x10) +800045a0: 00450513 addi x10,x10,4 + +800045a4 : +Zkne_aes32esi_cg_cp_sbox_b2: + aes32esi x22, x28, x12, 3 # perform operation +800045a4: e2ce0b33 aes32esi x22,x28,x12,0x3 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b2, Zkne_aes32esi_cg_cp_sbox_b2_str) +800045a8: 000ea203 lw x4,0(x29) +800045ac: 01620863 beq x4,x22,800045bc +800045b0: 411032ef jal x5,800081c0 +800045b4: 800045a4 .word 0x800045a4 +800045b8: 8001482c .word 0x8001482c +800045bc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x03030303 +800045c0: 00052783 lw x15,0(x10) +800045c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x03030303 +800045c8: 00052983 lw x19,0(x10) +800045cc: 00450513 addi x10,x10,4 + +800045d0 : +Zkne_aes32esi_cg_cp_sbox_b3: + aes32esi x11, x15, x19, 3 # perform operation +800045d0: e33785b3 aes32esi x11,x15,x19,0x3 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b3, Zkne_aes32esi_cg_cp_sbox_b3_str) +800045d4: 000ea203 lw x4,0(x29) +800045d8: 00b20863 beq x4,x11,800045e8 +800045dc: 3e5032ef jal x5,800081c0 +800045e0: 800045d0 .word 0x800045d0 +800045e4: 80014864 .word 0x80014864 +800045e8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x04040404 +800045ec: 00052783 lw x15,0(x10) +800045f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x04040404 +800045f4: 00052903 lw x18,0(x10) +800045f8: 00450513 addi x10,x10,4 + +800045fc : +Zkne_aes32esi_cg_cp_sbox_b4: + aes32esi x12, x15, x18, 2 # perform operation +800045fc: a3278633 aes32esi x12,x15,x18,0x2 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b4, Zkne_aes32esi_cg_cp_sbox_b4_str) +80004600: 000ea203 lw x4,0(x29) +80004604: 00c20863 beq x4,x12,80004614 +80004608: 3b9032ef jal x5,800081c0 +8000460c: 800045fc .word 0x800045fc +80004610: 8001489c .word 0x8001489c +80004614: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x05050505 +80004618: 00052303 lw x6,0(x10) +8000461c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x05050505 +80004620: 00052c83 lw x25,0(x10) +80004624: 00450513 addi x10,x10,4 + +80004628 : +Zkne_aes32esi_cg_cp_sbox_b5: + aes32esi x1, x6, x25, 1 # perform operation +80004628: 639300b3 aes32esi x1,x6,x25,0x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b5, Zkne_aes32esi_cg_cp_sbox_b5_str) +8000462c: 000ea203 lw x4,0(x29) +80004630: 00120863 beq x4,x1,80004640 +80004634: 38d032ef jal x5,800081c0 +80004638: 80004628 .word 0x80004628 +8000463c: 800148d4 .word 0x800148d4 +80004640: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x06060606 +80004644: 00052883 lw x17,0(x10) +80004648: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x06060606 +8000464c: 00052a83 lw x21,0(x10) +80004650: 00450513 addi x10,x10,4 + +80004654 : +Zkne_aes32esi_cg_cp_sbox_b6: + aes32esi x1, x17, x21, 0 # perform operation +80004654: 235880b3 aes32esi x1,x17,x21,0x0 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b6, Zkne_aes32esi_cg_cp_sbox_b6_str) +80004658: 000ea203 lw x4,0(x29) +8000465c: 00120863 beq x4,x1,8000466c +80004660: 361032ef jal x5,800081c0 +80004664: 80004654 .word 0x80004654 +80004668: 8001490c .word 0x8001490c +8000466c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x07070707 +80004670: 00052f03 lw x30,0(x10) +80004674: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x07070707 +80004678: 00052d83 lw x27,0(x10) +8000467c: 00450513 addi x10,x10,4 + +80004680 : +Zkne_aes32esi_cg_cp_sbox_b7: + aes32esi x6, x30, x27, 0 # perform operation +80004680: 23bf0333 aes32esi x6,x30,x27,0x0 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b7, Zkne_aes32esi_cg_cp_sbox_b7_str) +80004684: 000ea203 lw x4,0(x29) +80004688: 00620863 beq x4,x6,80004698 +8000468c: 335032ef jal x5,800081c0 +80004690: 80004680 .word 0x80004680 +80004694: 80014944 .word 0x80014944 +80004698: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x08080808 +8000469c: 00052c03 lw x24,0(x10) +800046a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x08080808 +800046a4: 00052d03 lw x26,0(x10) +800046a8: 00450513 addi x10,x10,4 + +800046ac : +Zkne_aes32esi_cg_cp_sbox_b8: + aes32esi x18, x24, x26, 0 # perform operation +800046ac: 23ac0933 aes32esi x18,x24,x26,0x0 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b8, Zkne_aes32esi_cg_cp_sbox_b8_str) +800046b0: 000ea203 lw x4,0(x29) +800046b4: 01220863 beq x4,x18,800046c4 +800046b8: 309032ef jal x5,800081c0 +800046bc: 800046ac .word 0x800046ac +800046c0: 8001497c .word 0x8001497c +800046c4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x09090909 +800046c8: 00052b83 lw x23,0(x10) +800046cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x09090909 +800046d0: 00052c03 lw x24,0(x10) +800046d4: 00450513 addi x10,x10,4 + +800046d8 : +Zkne_aes32esi_cg_cp_sbox_b9: + aes32esi x11, x23, x24, 1 # perform operation +800046d8: 638b85b3 aes32esi x11,x23,x24,0x1 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b9, Zkne_aes32esi_cg_cp_sbox_b9_str) +800046dc: 000ea203 lw x4,0(x29) +800046e0: 00b20863 beq x4,x11,800046f0 +800046e4: 2dd032ef jal x5,800081c0 +800046e8: 800046d8 .word 0x800046d8 +800046ec: 800149b4 .word 0x800149b4 +800046f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0a0a0a0a +800046f4: 00052d03 lw x26,0(x10) +800046f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0a0a0a0a +800046fc: 00052d83 lw x27,0(x10) +80004700: 00450513 addi x10,x10,4 + +80004704 : +Zkne_aes32esi_cg_cp_sbox_b10: + aes32esi x15, x26, x27, 0 # perform operation +80004704: 23bd07b3 aes32esi x15,x26,x27,0x0 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b10, Zkne_aes32esi_cg_cp_sbox_b10_str) +80004708: 000ea203 lw x4,0(x29) +8000470c: 00f20863 beq x4,x15,8000471c +80004710: 2b1032ef jal x5,800081c0 +80004714: 80004704 .word 0x80004704 +80004718: 800149ec .word 0x800149ec +8000471c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0b0b0b0b +80004720: 00052483 lw x9,0(x10) +80004724: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0b0b0b0b +80004728: 00052103 lw x2,0(x10) +8000472c: 00450513 addi x10,x10,4 + +80004730 : +Zkne_aes32esi_cg_cp_sbox_b11: + aes32esi x18, x9, x2, 0 # perform operation +80004730: 22248933 aes32esi x18,x9,x2,0x0 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b11, Zkne_aes32esi_cg_cp_sbox_b11_str) +80004734: 000ea203 lw x4,0(x29) +80004738: 01220863 beq x4,x18,80004748 +8000473c: 285032ef jal x5,800081c0 +80004740: 80004730 .word 0x80004730 +80004744: 80014a25 .word 0x80014a25 +80004748: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0c0c0c0c +8000474c: 00052103 lw x2,0(x10) +80004750: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0c0c0c0c +80004754: 00052303 lw x6,0(x10) +80004758: 00450513 addi x10,x10,4 + +8000475c : +Zkne_aes32esi_cg_cp_sbox_b12: + aes32esi x13, x2, x6, 2 # perform operation +8000475c: a26106b3 aes32esi x13,x2,x6,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b12, Zkne_aes32esi_cg_cp_sbox_b12_str) +80004760: 000ea203 lw x4,0(x29) +80004764: 00d20863 beq x4,x13,80004774 +80004768: 259032ef jal x5,800081c0 +8000476c: 8000475c .word 0x8000475c +80004770: 80014a5e .word 0x80014a5e +80004774: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0d0d0d0d +80004778: 00052183 lw x3,0(x10) +8000477c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0d0d0d0d +80004780: 00052583 lw x11,0(x10) +80004784: 00450513 addi x10,x10,4 + +80004788 : +Zkne_aes32esi_cg_cp_sbox_b13: + aes32esi x2, x3, x11, 1 # perform operation +80004788: 62b18133 aes32esi x2,x3,x11,0x1 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b13, Zkne_aes32esi_cg_cp_sbox_b13_str) +8000478c: 000ea203 lw x4,0(x29) +80004790: 00220863 beq x4,x2,800047a0 +80004794: 22d032ef jal x5,800081c0 +80004798: 80004788 .word 0x80004788 +8000479c: 80014a97 .word 0x80014a97 +800047a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0e0e0e0e +800047a4: 00052183 lw x3,0(x10) +800047a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0e0e0e0e +800047ac: 00052303 lw x6,0(x10) +800047b0: 00450513 addi x10,x10,4 + +800047b4 : +Zkne_aes32esi_cg_cp_sbox_b14: + aes32esi x13, x3, x6, 2 # perform operation +800047b4: a26186b3 aes32esi x13,x3,x6,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b14, Zkne_aes32esi_cg_cp_sbox_b14_str) +800047b8: 000ea203 lw x4,0(x29) +800047bc: 00d20863 beq x4,x13,800047cc +800047c0: 201032ef jal x5,800081c0 +800047c4: 800047b4 .word 0x800047b4 +800047c8: 80014ad0 .word 0x80014ad0 +800047cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0f0f0f0f +800047d0: 00052983 lw x19,0(x10) +800047d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0f0f0f0f +800047d8: 00052403 lw x8,0(x10) +800047dc: 00450513 addi x10,x10,4 + +800047e0 : +Zkne_aes32esi_cg_cp_sbox_b15: + aes32esi x20, x19, x8, 1 # perform operation +800047e0: 62898a33 aes32esi x20,x19,x8,0x1 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b15, Zkne_aes32esi_cg_cp_sbox_b15_str) +800047e4: 000ea203 lw x4,0(x29) +800047e8: 01420863 beq x4,x20,800047f8 +800047ec: 1d5032ef jal x5,800081c0 +800047f0: 800047e0 .word 0x800047e0 +800047f4: 80014b09 .word 0x80014b09 +800047f8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x10101010 +800047fc: 00052e03 lw x28,0(x10) +80004800: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x10101010 +80004804: 00052183 lw x3,0(x10) +80004808: 00450513 addi x10,x10,4 + +8000480c : +Zkne_aes32esi_cg_cp_sbox_b16: + aes32esi x26, x28, x3, 0 # perform operation +8000480c: 223e0d33 aes32esi x26,x28,x3,0x0 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b16, Zkne_aes32esi_cg_cp_sbox_b16_str) +80004810: 000ea203 lw x4,0(x29) +80004814: 01a20863 beq x4,x26,80004824 +80004818: 1a9032ef jal x5,800081c0 +8000481c: 8000480c .word 0x8000480c +80004820: 80014b42 .word 0x80014b42 +80004824: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x11111111 +80004828: 00052603 lw x12,0(x10) +8000482c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x11111111 +80004830: 00052103 lw x2,0(x10) +80004834: 00450513 addi x10,x10,4 + +80004838 : +Zkne_aes32esi_cg_cp_sbox_b17: + aes32esi x7, x12, x2, 0 # perform operation +80004838: 222603b3 aes32esi x7,x12,x2,0x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b17, Zkne_aes32esi_cg_cp_sbox_b17_str) +8000483c: 000ea203 lw x4,0(x29) +80004840: 00720863 beq x4,x7,80004850 +80004844: 17d032ef jal x5,800081c0 +80004848: 80004838 .word 0x80004838 +8000484c: 80014b7b .word 0x80014b7b +80004850: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x12121212 +80004854: 00052783 lw x15,0(x10) +80004858: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x12121212 +8000485c: 00052a03 lw x20,0(x10) +80004860: 00450513 addi x10,x10,4 + +80004864 : +Zkne_aes32esi_cg_cp_sbox_b18: + aes32esi x30, x15, x20, 2 # perform operation +80004864: a3478f33 aes32esi x30,x15,x20,0x2 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b18, Zkne_aes32esi_cg_cp_sbox_b18_str) +80004868: 000ea203 lw x4,0(x29) +8000486c: 01e20863 beq x4,x30,8000487c +80004870: 151032ef jal x5,800081c0 +80004874: 80004864 .word 0x80004864 +80004878: 80014bb4 .word 0x80014bb4 +8000487c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x13131313 +80004880: 00052d83 lw x27,0(x10) +80004884: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x13131313 +80004888: 00052b03 lw x22,0(x10) +8000488c: 00450513 addi x10,x10,4 + +80004890 : +Zkne_aes32esi_cg_cp_sbox_b19: + aes32esi x21, x27, x22, 0 # perform operation +80004890: 236d8ab3 aes32esi x21,x27,x22,0x0 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b19, Zkne_aes32esi_cg_cp_sbox_b19_str) +80004894: 000ea203 lw x4,0(x29) +80004898: 01520863 beq x4,x21,800048a8 +8000489c: 125032ef jal x5,800081c0 +800048a0: 80004890 .word 0x80004890 +800048a4: 80014bed .word 0x80014bed +800048a8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x14141414 +800048ac: 00052083 lw x1,0(x10) +800048b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x14141414 +800048b4: 00052103 lw x2,0(x10) +800048b8: 00450513 addi x10,x10,4 + +800048bc : +Zkne_aes32esi_cg_cp_sbox_b20: + aes32esi x7, x1, x2, 2 # perform operation +800048bc: a22083b3 aes32esi x7,x1,x2,0x2 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b20, Zkne_aes32esi_cg_cp_sbox_b20_str) +800048c0: 000ea203 lw x4,0(x29) +800048c4: 00720863 beq x4,x7,800048d4 +800048c8: 0f9032ef jal x5,800081c0 +800048cc: 800048bc .word 0x800048bc +800048d0: 80014c26 .word 0x80014c26 +800048d4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x15151515 +800048d8: 00052b03 lw x22,0(x10) +800048dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x15151515 +800048e0: 00052d83 lw x27,0(x10) +800048e4: 00450513 addi x10,x10,4 + +800048e8 : +Zkne_aes32esi_cg_cp_sbox_b21: + aes32esi x30, x22, x27, 3 # perform operation +800048e8: e3bb0f33 aes32esi x30,x22,x27,0x3 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b21, Zkne_aes32esi_cg_cp_sbox_b21_str) +800048ec: 000ea203 lw x4,0(x29) +800048f0: 01e20863 beq x4,x30,80004900 +800048f4: 0cd032ef jal x5,800081c0 +800048f8: 800048e8 .word 0x800048e8 +800048fc: 80014c5f .word 0x80014c5f +80004900: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x16161616 +80004904: 00052583 lw x11,0(x10) +80004908: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x16161616 +8000490c: 00052183 lw x3,0(x10) +80004910: 00450513 addi x10,x10,4 + +80004914 : +Zkne_aes32esi_cg_cp_sbox_b22: + aes32esi x12, x11, x3, 0 # perform operation +80004914: 22358633 aes32esi x12,x11,x3,0x0 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b22, Zkne_aes32esi_cg_cp_sbox_b22_str) +80004918: 000ea203 lw x4,0(x29) +8000491c: 00c20863 beq x4,x12,8000492c +80004920: 0a1032ef jal x5,800081c0 +80004924: 80004914 .word 0x80004914 +80004928: 80014c98 .word 0x80014c98 +8000492c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x17171717 +80004930: 00052883 lw x17,0(x10) +80004934: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x17171717 +80004938: 00052d83 lw x27,0(x10) +8000493c: 00450513 addi x10,x10,4 + +80004940 : +Zkne_aes32esi_cg_cp_sbox_b23: + aes32esi x15, x17, x27, 3 # perform operation +80004940: e3b887b3 aes32esi x15,x17,x27,0x3 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b23, Zkne_aes32esi_cg_cp_sbox_b23_str) +80004944: 000ea203 lw x4,0(x29) +80004948: 00f20863 beq x4,x15,80004958 +8000494c: 075032ef jal x5,800081c0 +80004950: 80004940 .word 0x80004940 +80004954: 80014cd1 .word 0x80014cd1 +80004958: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x18181818 +8000495c: 00052c03 lw x24,0(x10) +80004960: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x18181818 +80004964: 00052e03 lw x28,0(x10) +80004968: 00450513 addi x10,x10,4 + +8000496c : +Zkne_aes32esi_cg_cp_sbox_b24: + aes32esi x31, x24, x28, 2 # perform operation +8000496c: a3cc0fb3 aes32esi x31,x24,x28,0x2 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b24, Zkne_aes32esi_cg_cp_sbox_b24_str) +80004970: 000ea203 lw x4,0(x29) +80004974: 01f20863 beq x4,x31,80004984 +80004978: 049032ef jal x5,800081c0 +8000497c: 8000496c .word 0x8000496c +80004980: 80014d0a .word 0x80014d0a +80004984: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x19191919 +80004988: 00052783 lw x15,0(x10) +8000498c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x19191919 +80004990: 00052c83 lw x25,0(x10) +80004994: 00450513 addi x10,x10,4 + +80004998 : +Zkne_aes32esi_cg_cp_sbox_b25: + aes32esi x31, x15, x25, 1 # perform operation +80004998: 63978fb3 aes32esi x31,x15,x25,0x1 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b25, Zkne_aes32esi_cg_cp_sbox_b25_str) +8000499c: 000ea203 lw x4,0(x29) +800049a0: 01f20863 beq x4,x31,800049b0 +800049a4: 01d032ef jal x5,800081c0 +800049a8: 80004998 .word 0x80004998 +800049ac: 80014d43 .word 0x80014d43 +800049b0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x1a1a1a1a +800049b4: 00052183 lw x3,0(x10) +800049b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x1a1a1a1a +800049bc: 00052403 lw x8,0(x10) +800049c0: 00450513 addi x10,x10,4 + +800049c4 : +Zkne_aes32esi_cg_cp_sbox_b26: + aes32esi x17, x3, x8, 1 # perform operation +800049c4: 628188b3 aes32esi x17,x3,x8,0x1 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b26, Zkne_aes32esi_cg_cp_sbox_b26_str) +800049c8: 000ea203 lw x4,0(x29) +800049cc: 01120863 beq x4,x17,800049dc +800049d0: 7f0032ef jal x5,800081c0 +800049d4: 800049c4 .word 0x800049c4 +800049d8: 80014d7c .word 0x80014d7c +800049dc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x1b1b1b1b +800049e0: 00052d03 lw x26,0(x10) +800049e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x1b1b1b1b +800049e8: 00052403 lw x8,0(x10) +800049ec: 00450513 addi x10,x10,4 + +800049f0 : +Zkne_aes32esi_cg_cp_sbox_b27: + aes32esi x25, x26, x8, 1 # perform operation +800049f0: 628d0cb3 aes32esi x25,x26,x8,0x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b27, Zkne_aes32esi_cg_cp_sbox_b27_str) +800049f4: 000ea203 lw x4,0(x29) +800049f8: 01920863 beq x4,x25,80004a08 +800049fc: 7c4032ef jal x5,800081c0 +80004a00: 800049f0 .word 0x800049f0 +80004a04: 80014db5 .word 0x80014db5 +80004a08: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x1c1c1c1c +80004a0c: 00052583 lw x11,0(x10) +80004a10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x1c1c1c1c +80004a14: 00052c03 lw x24,0(x10) +80004a18: 00450513 addi x10,x10,4 + +80004a1c : +Zkne_aes32esi_cg_cp_sbox_b28: + aes32esi x12, x11, x24, 3 # perform operation +80004a1c: e3858633 aes32esi x12,x11,x24,0x3 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b28, Zkne_aes32esi_cg_cp_sbox_b28_str) +80004a20: 000ea203 lw x4,0(x29) +80004a24: 00c20863 beq x4,x12,80004a34 +80004a28: 798032ef jal x5,800081c0 +80004a2c: 80004a1c .word 0x80004a1c +80004a30: 80014dee .word 0x80014dee +80004a34: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x1d1d1d1d +80004a38: 00052a03 lw x20,0(x10) +80004a3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x1d1d1d1d +80004a40: 00052603 lw x12,0(x10) +80004a44: 00450513 addi x10,x10,4 + +80004a48 : +Zkne_aes32esi_cg_cp_sbox_b29: + aes32esi x16, x20, x12, 0 # perform operation +80004a48: 22ca0833 aes32esi x16,x20,x12,0x0 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b29, Zkne_aes32esi_cg_cp_sbox_b29_str) +80004a4c: 000ea203 lw x4,0(x29) +80004a50: 01020863 beq x4,x16,80004a60 +80004a54: 76c032ef jal x5,800081c0 +80004a58: 80004a48 .word 0x80004a48 +80004a5c: 80014e27 .word 0x80014e27 +80004a60: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x1e1e1e1e +80004a64: 00052c03 lw x24,0(x10) +80004a68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x1e1e1e1e +80004a6c: 00052783 lw x15,0(x10) +80004a70: 00450513 addi x10,x10,4 + +80004a74 : +Zkne_aes32esi_cg_cp_sbox_b30: + aes32esi x26, x24, x15, 0 # perform operation +80004a74: 22fc0d33 aes32esi x26,x24,x15,0x0 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b30, Zkne_aes32esi_cg_cp_sbox_b30_str) +80004a78: 000ea203 lw x4,0(x29) +80004a7c: 01a20863 beq x4,x26,80004a8c +80004a80: 740032ef jal x5,800081c0 +80004a84: 80004a74 .word 0x80004a74 +80004a88: 80014e60 .word 0x80014e60 +80004a8c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x1f1f1f1f +80004a90: 00052f83 lw x31,0(x10) +80004a94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x1f1f1f1f +80004a98: 00052183 lw x3,0(x10) +80004a9c: 00450513 addi x10,x10,4 + +80004aa0 : +Zkne_aes32esi_cg_cp_sbox_b31: + aes32esi x11, x31, x3, 0 # perform operation +80004aa0: 223f85b3 aes32esi x11,x31,x3,0x0 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b31, Zkne_aes32esi_cg_cp_sbox_b31_str) +80004aa4: 000ea203 lw x4,0(x29) +80004aa8: 00b20863 beq x4,x11,80004ab8 +80004aac: 714032ef jal x5,800081c0 +80004ab0: 80004aa0 .word 0x80004aa0 +80004ab4: 80014e99 .word 0x80014e99 +80004ab8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x20202020 +80004abc: 00052c83 lw x25,0(x10) +80004ac0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x20202020 +80004ac4: 00052b83 lw x23,0(x10) +80004ac8: 00450513 addi x10,x10,4 + +80004acc : +Zkne_aes32esi_cg_cp_sbox_b32: + aes32esi x14, x25, x23, 0 # perform operation +80004acc: 237c8733 aes32esi x14,x25,x23,0x0 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b32, Zkne_aes32esi_cg_cp_sbox_b32_str) +80004ad0: 000ea203 lw x4,0(x29) +80004ad4: 00e20863 beq x4,x14,80004ae4 +80004ad8: 6e8032ef jal x5,800081c0 +80004adc: 80004acc .word 0x80004acc +80004ae0: 80014ed2 .word 0x80014ed2 +80004ae4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x21212121 +80004ae8: 00052d83 lw x27,0(x10) +80004aec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x21212121 +80004af0: 00052483 lw x9,0(x10) +80004af4: 00450513 addi x10,x10,4 + +80004af8 : +Zkne_aes32esi_cg_cp_sbox_b33: + aes32esi x28, x27, x9, 0 # perform operation +80004af8: 229d8e33 aes32esi x28,x27,x9,0x0 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b33, Zkne_aes32esi_cg_cp_sbox_b33_str) +80004afc: 000ea203 lw x4,0(x29) +80004b00: 01c20863 beq x4,x28,80004b10 +80004b04: 6bc032ef jal x5,800081c0 +80004b08: 80004af8 .word 0x80004af8 +80004b0c: 80014f0b .word 0x80014f0b +80004b10: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x22222222 +80004b14: 00052d03 lw x26,0(x10) +80004b18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x22222222 +80004b1c: 00052383 lw x7,0(x10) +80004b20: 00450513 addi x10,x10,4 + +80004b24 : +Zkne_aes32esi_cg_cp_sbox_b34: + aes32esi x19, x26, x7, 3 # perform operation +80004b24: e27d09b3 aes32esi x19,x26,x7,0x3 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b34, Zkne_aes32esi_cg_cp_sbox_b34_str) +80004b28: 000ea203 lw x4,0(x29) +80004b2c: 01320863 beq x4,x19,80004b3c +80004b30: 690032ef jal x5,800081c0 +80004b34: 80004b24 .word 0x80004b24 +80004b38: 80014f44 .word 0x80014f44 +80004b3c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x23232323 +80004b40: 00052f83 lw x31,0(x10) +80004b44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x23232323 +80004b48: 00052703 lw x14,0(x10) +80004b4c: 00450513 addi x10,x10,4 + +80004b50 : +Zkne_aes32esi_cg_cp_sbox_b35: + aes32esi x7, x31, x14, 3 # perform operation +80004b50: e2ef83b3 aes32esi x7,x31,x14,0x3 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b35, Zkne_aes32esi_cg_cp_sbox_b35_str) +80004b54: 000ea203 lw x4,0(x29) +80004b58: 00720863 beq x4,x7,80004b68 +80004b5c: 664032ef jal x5,800081c0 +80004b60: 80004b50 .word 0x80004b50 +80004b64: 80014f7d .word 0x80014f7d +80004b68: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x24242424 +80004b6c: 00052903 lw x18,0(x10) +80004b70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x24242424 +80004b74: 00052f83 lw x31,0(x10) +80004b78: 00450513 addi x10,x10,4 + +80004b7c : +Zkne_aes32esi_cg_cp_sbox_b36: + aes32esi x25, x18, x31, 1 # perform operation +80004b7c: 63f90cb3 aes32esi x25,x18,x31,0x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b36, Zkne_aes32esi_cg_cp_sbox_b36_str) +80004b80: 000ea203 lw x4,0(x29) +80004b84: 01920863 beq x4,x25,80004b94 +80004b88: 638032ef jal x5,800081c0 +80004b8c: 80004b7c .word 0x80004b7c +80004b90: 80014fb6 .word 0x80014fb6 +80004b94: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x25252525 +80004b98: 00052403 lw x8,0(x10) +80004b9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x25252525 +80004ba0: 00052c03 lw x24,0(x10) +80004ba4: 00450513 addi x10,x10,4 + +80004ba8 : +Zkne_aes32esi_cg_cp_sbox_b37: + aes32esi x6, x8, x24, 2 # perform operation +80004ba8: a3840333 aes32esi x6,x8,x24,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b37, Zkne_aes32esi_cg_cp_sbox_b37_str) +80004bac: 000ea203 lw x4,0(x29) +80004bb0: 00620863 beq x4,x6,80004bc0 +80004bb4: 60c032ef jal x5,800081c0 +80004bb8: 80004ba8 .word 0x80004ba8 +80004bbc: 80014fef .word 0x80014fef +80004bc0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x26262626 +80004bc4: 00052583 lw x11,0(x10) +80004bc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x26262626 +80004bcc: 00052883 lw x17,0(x10) +80004bd0: 00450513 addi x10,x10,4 + +80004bd4 : +Zkne_aes32esi_cg_cp_sbox_b38: + aes32esi x31, x11, x17, 1 # perform operation +80004bd4: 63158fb3 aes32esi x31,x11,x17,0x1 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b38, Zkne_aes32esi_cg_cp_sbox_b38_str) +80004bd8: 000ea203 lw x4,0(x29) +80004bdc: 01f20863 beq x4,x31,80004bec +80004be0: 5e0032ef jal x5,800081c0 +80004be4: 80004bd4 .word 0x80004bd4 +80004be8: 80015028 .word 0x80015028 +80004bec: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x27272727 +80004bf0: 00052b03 lw x22,0(x10) +80004bf4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x27272727 +80004bf8: 00052c83 lw x25,0(x10) +80004bfc: 00450513 addi x10,x10,4 + +80004c00 : +Zkne_aes32esi_cg_cp_sbox_b39: + aes32esi x27, x22, x25, 3 # perform operation +80004c00: e39b0db3 aes32esi x27,x22,x25,0x3 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b39, Zkne_aes32esi_cg_cp_sbox_b39_str) +80004c04: 000ea203 lw x4,0(x29) +80004c08: 01b20863 beq x4,x27,80004c18 +80004c0c: 5b4032ef jal x5,800081c0 +80004c10: 80004c00 .word 0x80004c00 +80004c14: 80015061 .word 0x80015061 +80004c18: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x28282828 +80004c1c: 00052183 lw x3,0(x10) +80004c20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x28282828 +80004c24: 00052683 lw x13,0(x10) +80004c28: 00450513 addi x10,x10,4 + +80004c2c : +Zkne_aes32esi_cg_cp_sbox_b40: + aes32esi x20, x3, x13, 2 # perform operation +80004c2c: a2d18a33 aes32esi x20,x3,x13,0x2 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b40, Zkne_aes32esi_cg_cp_sbox_b40_str) +80004c30: 000ea203 lw x4,0(x29) +80004c34: 01420863 beq x4,x20,80004c44 +80004c38: 588032ef jal x5,800081c0 +80004c3c: 80004c2c .word 0x80004c2c +80004c40: 8001509a .word 0x8001509a +80004c44: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x29292929 +80004c48: 00052d83 lw x27,0(x10) +80004c4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x29292929 +80004c50: 00052603 lw x12,0(x10) +80004c54: 00450513 addi x10,x10,4 + +80004c58 : +Zkne_aes32esi_cg_cp_sbox_b41: + aes32esi x21, x27, x12, 1 # perform operation +80004c58: 62cd8ab3 aes32esi x21,x27,x12,0x1 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b41, Zkne_aes32esi_cg_cp_sbox_b41_str) +80004c5c: 000ea203 lw x4,0(x29) +80004c60: 01520863 beq x4,x21,80004c70 +80004c64: 55c032ef jal x5,800081c0 +80004c68: 80004c58 .word 0x80004c58 +80004c6c: 800150d3 .word 0x800150d3 +80004c70: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x2a2a2a2a +80004c74: 00052c03 lw x24,0(x10) +80004c78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x2a2a2a2a +80004c7c: 00052b83 lw x23,0(x10) +80004c80: 00450513 addi x10,x10,4 + +80004c84 : +Zkne_aes32esi_cg_cp_sbox_b42: + aes32esi x12, x24, x23, 0 # perform operation +80004c84: 237c0633 aes32esi x12,x24,x23,0x0 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b42, Zkne_aes32esi_cg_cp_sbox_b42_str) +80004c88: 000ea203 lw x4,0(x29) +80004c8c: 00c20863 beq x4,x12,80004c9c +80004c90: 530032ef jal x5,800081c0 +80004c94: 80004c84 .word 0x80004c84 +80004c98: 8001510c .word 0x8001510c +80004c9c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x2b2b2b2b +80004ca0: 00052403 lw x8,0(x10) +80004ca4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x2b2b2b2b +80004ca8: 00052903 lw x18,0(x10) +80004cac: 00450513 addi x10,x10,4 + +80004cb0 : +Zkne_aes32esi_cg_cp_sbox_b43: + aes32esi x17, x8, x18, 0 # perform operation +80004cb0: 232408b3 aes32esi x17,x8,x18,0x0 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b43, Zkne_aes32esi_cg_cp_sbox_b43_str) +80004cb4: 000ea203 lw x4,0(x29) +80004cb8: 01120863 beq x4,x17,80004cc8 +80004cbc: 504032ef jal x5,800081c0 +80004cc0: 80004cb0 .word 0x80004cb0 +80004cc4: 80015145 .word 0x80015145 +80004cc8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x2c2c2c2c +80004ccc: 00052783 lw x15,0(x10) +80004cd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x2c2c2c2c +80004cd4: 00052f03 lw x30,0(x10) +80004cd8: 00450513 addi x10,x10,4 + +80004cdc : +Zkne_aes32esi_cg_cp_sbox_b44: + aes32esi x1, x15, x30, 1 # perform operation +80004cdc: 63e780b3 aes32esi x1,x15,x30,0x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b44, Zkne_aes32esi_cg_cp_sbox_b44_str) +80004ce0: 000ea203 lw x4,0(x29) +80004ce4: 00120863 beq x4,x1,80004cf4 +80004ce8: 4d8032ef jal x5,800081c0 +80004cec: 80004cdc .word 0x80004cdc +80004cf0: 8001517e .word 0x8001517e +80004cf4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x2d2d2d2d +80004cf8: 00052903 lw x18,0(x10) +80004cfc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x2d2d2d2d +80004d00: 00052103 lw x2,0(x10) +80004d04: 00450513 addi x10,x10,4 + +80004d08 : +Zkne_aes32esi_cg_cp_sbox_b45: + aes32esi x31, x18, x2, 2 # perform operation +80004d08: a2290fb3 aes32esi x31,x18,x2,0x2 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b45, Zkne_aes32esi_cg_cp_sbox_b45_str) +80004d0c: 000ea203 lw x4,0(x29) +80004d10: 01f20863 beq x4,x31,80004d20 +80004d14: 4ac032ef jal x5,800081c0 +80004d18: 80004d08 .word 0x80004d08 +80004d1c: 800151b7 .word 0x800151b7 +80004d20: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x2e2e2e2e +80004d24: 00052583 lw x11,0(x10) +80004d28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x2e2e2e2e +80004d2c: 00052b03 lw x22,0(x10) +80004d30: 00450513 addi x10,x10,4 + +80004d34 : +Zkne_aes32esi_cg_cp_sbox_b46: + aes32esi x25, x11, x22, 3 # perform operation +80004d34: e3658cb3 aes32esi x25,x11,x22,0x3 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b46, Zkne_aes32esi_cg_cp_sbox_b46_str) +80004d38: 000ea203 lw x4,0(x29) +80004d3c: 01920863 beq x4,x25,80004d4c +80004d40: 480032ef jal x5,800081c0 +80004d44: 80004d34 .word 0x80004d34 +80004d48: 800151f0 .word 0x800151f0 +80004d4c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x2f2f2f2f +80004d50: 00052903 lw x18,0(x10) +80004d54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x2f2f2f2f +80004d58: 00052b03 lw x22,0(x10) +80004d5c: 00450513 addi x10,x10,4 + +80004d60 : +Zkne_aes32esi_cg_cp_sbox_b47: + aes32esi x1, x18, x22, 1 # perform operation +80004d60: 636900b3 aes32esi x1,x18,x22,0x1 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b47, Zkne_aes32esi_cg_cp_sbox_b47_str) +80004d64: 000ea203 lw x4,0(x29) +80004d68: 00120863 beq x4,x1,80004d78 +80004d6c: 454032ef jal x5,800081c0 +80004d70: 80004d60 .word 0x80004d60 +80004d74: 80015229 .word 0x80015229 +80004d78: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x30303030 +80004d7c: 00052703 lw x14,0(x10) +80004d80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x30303030 +80004d84: 00052a83 lw x21,0(x10) +80004d88: 00450513 addi x10,x10,4 + +80004d8c : +Zkne_aes32esi_cg_cp_sbox_b48: + aes32esi x25, x14, x21, 0 # perform operation +80004d8c: 23570cb3 aes32esi x25,x14,x21,0x0 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b48, Zkne_aes32esi_cg_cp_sbox_b48_str) +80004d90: 000ea203 lw x4,0(x29) +80004d94: 01920863 beq x4,x25,80004da4 +80004d98: 428032ef jal x5,800081c0 +80004d9c: 80004d8c .word 0x80004d8c +80004da0: 80015262 .word 0x80015262 +80004da4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x31313131 +80004da8: 00052d83 lw x27,0(x10) +80004dac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x31313131 +80004db0: 00052183 lw x3,0(x10) +80004db4: 00450513 addi x10,x10,4 + +80004db8 : +Zkne_aes32esi_cg_cp_sbox_b49: + aes32esi x22, x27, x3, 1 # perform operation +80004db8: 623d8b33 aes32esi x22,x27,x3,0x1 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b49, Zkne_aes32esi_cg_cp_sbox_b49_str) +80004dbc: 000ea203 lw x4,0(x29) +80004dc0: 01620863 beq x4,x22,80004dd0 +80004dc4: 3fc032ef jal x5,800081c0 +80004dc8: 80004db8 .word 0x80004db8 +80004dcc: 8001529b .word 0x8001529b +80004dd0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x32323232 +80004dd4: 00052803 lw x16,0(x10) +80004dd8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x32323232 +80004ddc: 00052c83 lw x25,0(x10) +80004de0: 00450513 addi x10,x10,4 + +80004de4 : +Zkne_aes32esi_cg_cp_sbox_b50: + aes32esi x22, x16, x25, 0 # perform operation +80004de4: 23980b33 aes32esi x22,x16,x25,0x0 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b50, Zkne_aes32esi_cg_cp_sbox_b50_str) +80004de8: 000ea203 lw x4,0(x29) +80004dec: 01620863 beq x4,x22,80004dfc +80004df0: 3d0032ef jal x5,800081c0 +80004df4: 80004de4 .word 0x80004de4 +80004df8: 800152d4 .word 0x800152d4 +80004dfc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x33333333 +80004e00: 00052c83 lw x25,0(x10) +80004e04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x33333333 +80004e08: 00052a03 lw x20,0(x10) +80004e0c: 00450513 addi x10,x10,4 + +80004e10 : +Zkne_aes32esi_cg_cp_sbox_b51: + aes32esi x23, x25, x20, 1 # perform operation +80004e10: 634c8bb3 aes32esi x23,x25,x20,0x1 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b51, Zkne_aes32esi_cg_cp_sbox_b51_str) +80004e14: 000ea203 lw x4,0(x29) +80004e18: 01720863 beq x4,x23,80004e28 +80004e1c: 3a4032ef jal x5,800081c0 +80004e20: 80004e10 .word 0x80004e10 +80004e24: 8001530d .word 0x8001530d +80004e28: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x34343434 +80004e2c: 00052403 lw x8,0(x10) +80004e30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x34343434 +80004e34: 00052303 lw x6,0(x10) +80004e38: 00450513 addi x10,x10,4 + +80004e3c : +Zkne_aes32esi_cg_cp_sbox_b52: + aes32esi x12, x8, x6, 1 # perform operation +80004e3c: 62640633 aes32esi x12,x8,x6,0x1 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b52, Zkne_aes32esi_cg_cp_sbox_b52_str) +80004e40: 000ea203 lw x4,0(x29) +80004e44: 00c20863 beq x4,x12,80004e54 +80004e48: 378032ef jal x5,800081c0 +80004e4c: 80004e3c .word 0x80004e3c +80004e50: 80015346 .word 0x80015346 +80004e54: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x35353535 +80004e58: 00052f03 lw x30,0(x10) +80004e5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x35353535 +80004e60: 00052f83 lw x31,0(x10) +80004e64: 00450513 addi x10,x10,4 + +80004e68 : +Zkne_aes32esi_cg_cp_sbox_b53: + aes32esi x15, x30, x31, 0 # perform operation +80004e68: 23ff07b3 aes32esi x15,x30,x31,0x0 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b53, Zkne_aes32esi_cg_cp_sbox_b53_str) +80004e6c: 000ea203 lw x4,0(x29) +80004e70: 00f20863 beq x4,x15,80004e80 +80004e74: 34c032ef jal x5,800081c0 +80004e78: 80004e68 .word 0x80004e68 +80004e7c: 8001537f .word 0x8001537f +80004e80: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x36363636 +80004e84: 00052083 lw x1,0(x10) +80004e88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x36363636 +80004e8c: 00052383 lw x7,0(x10) +80004e90: 00450513 addi x10,x10,4 + +80004e94 : +Zkne_aes32esi_cg_cp_sbox_b54: + aes32esi x3, x1, x7, 0 # perform operation +80004e94: 227081b3 aes32esi x3,x1,x7,0x0 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b54, Zkne_aes32esi_cg_cp_sbox_b54_str) +80004e98: 000ea203 lw x4,0(x29) +80004e9c: 00320863 beq x4,x3,80004eac +80004ea0: 320032ef jal x5,800081c0 +80004ea4: 80004e94 .word 0x80004e94 +80004ea8: 800153b8 .word 0x800153b8 +80004eac: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x37373737 +80004eb0: 00052103 lw x2,0(x10) +80004eb4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x37373737 +80004eb8: 00052883 lw x17,0(x10) +80004ebc: 00450513 addi x10,x10,4 + +80004ec0 : +Zkne_aes32esi_cg_cp_sbox_b55: + aes32esi x27, x2, x17, 0 # perform operation +80004ec0: 23110db3 aes32esi x27,x2,x17,0x0 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b55, Zkne_aes32esi_cg_cp_sbox_b55_str) +80004ec4: 000ea203 lw x4,0(x29) +80004ec8: 01b20863 beq x4,x27,80004ed8 +80004ecc: 2f4032ef jal x5,800081c0 +80004ed0: 80004ec0 .word 0x80004ec0 +80004ed4: 800153f1 .word 0x800153f1 +80004ed8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x38383838 +80004edc: 00052d83 lw x27,0(x10) +80004ee0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x38383838 +80004ee4: 00052083 lw x1,0(x10) +80004ee8: 00450513 addi x10,x10,4 + +80004eec : +Zkne_aes32esi_cg_cp_sbox_b56: + aes32esi x24, x27, x1, 1 # perform operation +80004eec: 621d8c33 aes32esi x24,x27,x1,0x1 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b56, Zkne_aes32esi_cg_cp_sbox_b56_str) +80004ef0: 000ea203 lw x4,0(x29) +80004ef4: 01820863 beq x4,x24,80004f04 +80004ef8: 2c8032ef jal x5,800081c0 +80004efc: 80004eec .word 0x80004eec +80004f00: 8001542a .word 0x8001542a +80004f04: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x39393939 +80004f08: 00052e03 lw x28,0(x10) +80004f0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x39393939 +80004f10: 00052903 lw x18,0(x10) +80004f14: 00450513 addi x10,x10,4 + +80004f18 : +Zkne_aes32esi_cg_cp_sbox_b57: + aes32esi x15, x28, x18, 2 # perform operation +80004f18: a32e07b3 aes32esi x15,x28,x18,0x2 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b57, Zkne_aes32esi_cg_cp_sbox_b57_str) +80004f1c: 000ea203 lw x4,0(x29) +80004f20: 00f20863 beq x4,x15,80004f30 +80004f24: 29c032ef jal x5,800081c0 +80004f28: 80004f18 .word 0x80004f18 +80004f2c: 80015463 .word 0x80015463 +80004f30: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x3a3a3a3a +80004f34: 00052683 lw x13,0(x10) +80004f38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x3a3a3a3a +80004f3c: 00052703 lw x14,0(x10) +80004f40: 00450513 addi x10,x10,4 + +80004f44 : +Zkne_aes32esi_cg_cp_sbox_b58: + aes32esi x3, x13, x14, 0 # perform operation +80004f44: 22e681b3 aes32esi x3,x13,x14,0x0 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b58, Zkne_aes32esi_cg_cp_sbox_b58_str) +80004f48: 000ea203 lw x4,0(x29) +80004f4c: 00320863 beq x4,x3,80004f5c +80004f50: 270032ef jal x5,800081c0 +80004f54: 80004f44 .word 0x80004f44 +80004f58: 8001549c .word 0x8001549c +80004f5c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x3b3b3b3b +80004f60: 00052a83 lw x21,0(x10) +80004f64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x3b3b3b3b +80004f68: 00052c03 lw x24,0(x10) +80004f6c: 00450513 addi x10,x10,4 + +80004f70 : +Zkne_aes32esi_cg_cp_sbox_b59: + aes32esi x31, x21, x24, 3 # perform operation +80004f70: e38a8fb3 aes32esi x31,x21,x24,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b59, Zkne_aes32esi_cg_cp_sbox_b59_str) +80004f74: 000ea203 lw x4,0(x29) +80004f78: 01f20863 beq x4,x31,80004f88 +80004f7c: 244032ef jal x5,800081c0 +80004f80: 80004f70 .word 0x80004f70 +80004f84: 800154d5 .word 0x800154d5 +80004f88: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x3c3c3c3c +80004f8c: 00052d03 lw x26,0(x10) +80004f90: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x3c3c3c3c +80004f94: 00052583 lw x11,0(x10) +80004f98: 00450513 addi x10,x10,4 + +80004f9c : +Zkne_aes32esi_cg_cp_sbox_b60: + aes32esi x21, x26, x11, 3 # perform operation +80004f9c: e2bd0ab3 aes32esi x21,x26,x11,0x3 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b60, Zkne_aes32esi_cg_cp_sbox_b60_str) +80004fa0: 000ea203 lw x4,0(x29) +80004fa4: 01520863 beq x4,x21,80004fb4 +80004fa8: 218032ef jal x5,800081c0 +80004fac: 80004f9c .word 0x80004f9c +80004fb0: 8001550e .word 0x8001550e +80004fb4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x3d3d3d3d +80004fb8: 00052f03 lw x30,0(x10) +80004fbc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x3d3d3d3d +80004fc0: 00052303 lw x6,0(x10) +80004fc4: 00450513 addi x10,x10,4 + +80004fc8 : +Zkne_aes32esi_cg_cp_sbox_b61: + aes32esi x24, x30, x6, 2 # perform operation +80004fc8: a26f0c33 aes32esi x24,x30,x6,0x2 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b61, Zkne_aes32esi_cg_cp_sbox_b61_str) +80004fcc: 000ea203 lw x4,0(x29) +80004fd0: 01820863 beq x4,x24,80004fe0 +80004fd4: 1ec032ef jal x5,800081c0 +80004fd8: 80004fc8 .word 0x80004fc8 +80004fdc: 80015547 .word 0x80015547 +80004fe0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x3e3e3e3e +80004fe4: 00052803 lw x16,0(x10) +80004fe8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x3e3e3e3e +80004fec: 00052903 lw x18,0(x10) +80004ff0: 00450513 addi x10,x10,4 + +80004ff4 : +Zkne_aes32esi_cg_cp_sbox_b62: + aes32esi x1, x16, x18, 3 # perform operation +80004ff4: e32800b3 aes32esi x1,x16,x18,0x3 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b62, Zkne_aes32esi_cg_cp_sbox_b62_str) +80004ff8: 000ea203 lw x4,0(x29) +80004ffc: 00120863 beq x4,x1,8000500c +80005000: 1c0032ef jal x5,800081c0 +80005004: 80004ff4 .word 0x80004ff4 +80005008: 80015580 .word 0x80015580 +8000500c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x3f3f3f3f +80005010: 00052983 lw x19,0(x10) +80005014: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x3f3f3f3f +80005018: 00052403 lw x8,0(x10) +8000501c: 00450513 addi x10,x10,4 + +80005020 : +Zkne_aes32esi_cg_cp_sbox_b63: + aes32esi x16, x19, x8, 0 # perform operation +80005020: 22898833 aes32esi x16,x19,x8,0x0 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b63, Zkne_aes32esi_cg_cp_sbox_b63_str) +80005024: 000ea203 lw x4,0(x29) +80005028: 01020863 beq x4,x16,80005038 +8000502c: 194032ef jal x5,800081c0 +80005030: 80005020 .word 0x80005020 +80005034: 800155b9 .word 0x800155b9 +80005038: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x40404040 +8000503c: 00052403 lw x8,0(x10) +80005040: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x40404040 +80005044: 00052783 lw x15,0(x10) +80005048: 00450513 addi x10,x10,4 + +8000504c : +Zkne_aes32esi_cg_cp_sbox_b64: + aes32esi x31, x8, x15, 0 # perform operation +8000504c: 22f40fb3 aes32esi x31,x8,x15,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b64, Zkne_aes32esi_cg_cp_sbox_b64_str) +80005050: 000ea203 lw x4,0(x29) +80005054: 01f20863 beq x4,x31,80005064 +80005058: 168032ef jal x5,800081c0 +8000505c: 8000504c .word 0x8000504c +80005060: 800155f2 .word 0x800155f2 +80005064: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x41414141 +80005068: 00052083 lw x1,0(x10) +8000506c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x41414141 +80005070: 00052703 lw x14,0(x10) +80005074: 00450513 addi x10,x10,4 + +80005078 : +Zkne_aes32esi_cg_cp_sbox_b65: + aes32esi x24, x1, x14, 0 # perform operation +80005078: 22e08c33 aes32esi x24,x1,x14,0x0 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b65, Zkne_aes32esi_cg_cp_sbox_b65_str) +8000507c: 000ea203 lw x4,0(x29) +80005080: 01820863 beq x4,x24,80005090 +80005084: 13c032ef jal x5,800081c0 +80005088: 80005078 .word 0x80005078 +8000508c: 8001562b .word 0x8001562b +80005090: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x42424242 +80005094: 00052483 lw x9,0(x10) +80005098: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x42424242 +8000509c: 00052d03 lw x26,0(x10) +800050a0: 00450513 addi x10,x10,4 + +800050a4 : +Zkne_aes32esi_cg_cp_sbox_b66: + aes32esi x8, x9, x26, 1 # perform operation +800050a4: 63a48433 aes32esi x8,x9,x26,0x1 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b66, Zkne_aes32esi_cg_cp_sbox_b66_str) +800050a8: 000ea203 lw x4,0(x29) +800050ac: 00820863 beq x4,x8,800050bc +800050b0: 110032ef jal x5,800081c0 +800050b4: 800050a4 .word 0x800050a4 +800050b8: 80015664 .word 0x80015664 +800050bc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x43434343 +800050c0: 00052183 lw x3,0(x10) +800050c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x43434343 +800050c8: 00052f03 lw x30,0(x10) +800050cc: 00450513 addi x10,x10,4 + +800050d0 : +Zkne_aes32esi_cg_cp_sbox_b67: + aes32esi x26, x3, x30, 3 # perform operation +800050d0: e3e18d33 aes32esi x26,x3,x30,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b67, Zkne_aes32esi_cg_cp_sbox_b67_str) +800050d4: 000ea203 lw x4,0(x29) +800050d8: 01a20863 beq x4,x26,800050e8 +800050dc: 0e4032ef jal x5,800081c0 +800050e0: 800050d0 .word 0x800050d0 +800050e4: 8001569d .word 0x8001569d +800050e8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x44444444 +800050ec: 00052e03 lw x28,0(x10) +800050f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x44444444 +800050f4: 00052683 lw x13,0(x10) +800050f8: 00450513 addi x10,x10,4 + +800050fc : +Zkne_aes32esi_cg_cp_sbox_b68: + aes32esi x11, x28, x13, 3 # perform operation +800050fc: e2de05b3 aes32esi x11,x28,x13,0x3 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b68, Zkne_aes32esi_cg_cp_sbox_b68_str) +80005100: 000ea203 lw x4,0(x29) +80005104: 00b20863 beq x4,x11,80005114 +80005108: 0b8032ef jal x5,800081c0 +8000510c: 800050fc .word 0x800050fc +80005110: 800156d6 .word 0x800156d6 +80005114: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x45454545 +80005118: 00052103 lw x2,0(x10) +8000511c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x45454545 +80005120: 00052483 lw x9,0(x10) +80005124: 00450513 addi x10,x10,4 + +80005128 : +Zkne_aes32esi_cg_cp_sbox_b69: + aes32esi x22, x2, x9, 3 # perform operation +80005128: e2910b33 aes32esi x22,x2,x9,0x3 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b69, Zkne_aes32esi_cg_cp_sbox_b69_str) +8000512c: 000ea203 lw x4,0(x29) +80005130: 01620863 beq x4,x22,80005140 +80005134: 08c032ef jal x5,800081c0 +80005138: 80005128 .word 0x80005128 +8000513c: 8001570f .word 0x8001570f +80005140: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x46464646 +80005144: 00052383 lw x7,0(x10) +80005148: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x46464646 +8000514c: 00052c83 lw x25,0(x10) +80005150: 00450513 addi x10,x10,4 + +80005154 : +Zkne_aes32esi_cg_cp_sbox_b70: + aes32esi x2, x7, x25, 0 # perform operation +80005154: 23938133 aes32esi x2,x7,x25,0x0 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b70, Zkne_aes32esi_cg_cp_sbox_b70_str) +80005158: 000ea203 lw x4,0(x29) +8000515c: 00220863 beq x4,x2,8000516c +80005160: 060032ef jal x5,800081c0 +80005164: 80005154 .word 0x80005154 +80005168: 80015748 .word 0x80015748 +8000516c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x47474747 +80005170: 00052e03 lw x28,0(x10) +80005174: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x47474747 +80005178: 00052a83 lw x21,0(x10) +8000517c: 00450513 addi x10,x10,4 + +80005180 : +Zkne_aes32esi_cg_cp_sbox_b71: + aes32esi x12, x28, x21, 2 # perform operation +80005180: a35e0633 aes32esi x12,x28,x21,0x2 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b71, Zkne_aes32esi_cg_cp_sbox_b71_str) +80005184: 000ea203 lw x4,0(x29) +80005188: 00c20863 beq x4,x12,80005198 +8000518c: 034032ef jal x5,800081c0 +80005190: 80005180 .word 0x80005180 +80005194: 80015781 .word 0x80015781 +80005198: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x48484848 +8000519c: 00052603 lw x12,0(x10) +800051a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x48484848 +800051a4: 00052f03 lw x30,0(x10) +800051a8: 00450513 addi x10,x10,4 + +800051ac : +Zkne_aes32esi_cg_cp_sbox_b72: + aes32esi x23, x12, x30, 2 # perform operation +800051ac: a3e60bb3 aes32esi x23,x12,x30,0x2 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b72, Zkne_aes32esi_cg_cp_sbox_b72_str) +800051b0: 000ea203 lw x4,0(x29) +800051b4: 01720863 beq x4,x23,800051c4 +800051b8: 008032ef jal x5,800081c0 +800051bc: 800051ac .word 0x800051ac +800051c0: 800157ba .word 0x800157ba +800051c4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x49494949 +800051c8: 00052803 lw x16,0(x10) +800051cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x49494949 +800051d0: 00052083 lw x1,0(x10) +800051d4: 00450513 addi x10,x10,4 + +800051d8 : +Zkne_aes32esi_cg_cp_sbox_b73: + aes32esi x31, x16, x1, 3 # perform operation +800051d8: e2180fb3 aes32esi x31,x16,x1,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b73, Zkne_aes32esi_cg_cp_sbox_b73_str) +800051dc: 000ea203 lw x4,0(x29) +800051e0: 01f20863 beq x4,x31,800051f0 +800051e4: 7dd022ef jal x5,800081c0 +800051e8: 800051d8 .word 0x800051d8 +800051ec: 800157f3 .word 0x800157f3 +800051f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x4a4a4a4a +800051f4: 00052783 lw x15,0(x10) +800051f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x4a4a4a4a +800051fc: 00052403 lw x8,0(x10) +80005200: 00450513 addi x10,x10,4 + +80005204 : +Zkne_aes32esi_cg_cp_sbox_b74: + aes32esi x7, x15, x8, 1 # perform operation +80005204: 628783b3 aes32esi x7,x15,x8,0x1 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b74, Zkne_aes32esi_cg_cp_sbox_b74_str) +80005208: 000ea203 lw x4,0(x29) +8000520c: 00720863 beq x4,x7,8000521c +80005210: 7b1022ef jal x5,800081c0 +80005214: 80005204 .word 0x80005204 +80005218: 8001582c .word 0x8001582c +8000521c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x4b4b4b4b +80005220: 00052e03 lw x28,0(x10) +80005224: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x4b4b4b4b +80005228: 00052383 lw x7,0(x10) +8000522c: 00450513 addi x10,x10,4 + +80005230 : +Zkne_aes32esi_cg_cp_sbox_b75: + aes32esi x13, x28, x7, 2 # perform operation +80005230: a27e06b3 aes32esi x13,x28,x7,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b75, Zkne_aes32esi_cg_cp_sbox_b75_str) +80005234: 000ea203 lw x4,0(x29) +80005238: 00d20863 beq x4,x13,80005248 +8000523c: 785022ef jal x5,800081c0 +80005240: 80005230 .word 0x80005230 +80005244: 80015865 .word 0x80015865 +80005248: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x4c4c4c4c +8000524c: 00052483 lw x9,0(x10) +80005250: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x4c4c4c4c +80005254: 00052603 lw x12,0(x10) +80005258: 00450513 addi x10,x10,4 + +8000525c : +Zkne_aes32esi_cg_cp_sbox_b76: + aes32esi x25, x9, x12, 2 # perform operation +8000525c: a2c48cb3 aes32esi x25,x9,x12,0x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b76, Zkne_aes32esi_cg_cp_sbox_b76_str) +80005260: 000ea203 lw x4,0(x29) +80005264: 01920863 beq x4,x25,80005274 +80005268: 759022ef jal x5,800081c0 +8000526c: 8000525c .word 0x8000525c +80005270: 8001589e .word 0x8001589e +80005274: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x4d4d4d4d +80005278: 00052f83 lw x31,0(x10) +8000527c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x4d4d4d4d +80005280: 00052483 lw x9,0(x10) +80005284: 00450513 addi x10,x10,4 + +80005288 : +Zkne_aes32esi_cg_cp_sbox_b77: + aes32esi x21, x31, x9, 0 # perform operation +80005288: 229f8ab3 aes32esi x21,x31,x9,0x0 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b77, Zkne_aes32esi_cg_cp_sbox_b77_str) +8000528c: 000ea203 lw x4,0(x29) +80005290: 01520863 beq x4,x21,800052a0 +80005294: 72d022ef jal x5,800081c0 +80005298: 80005288 .word 0x80005288 +8000529c: 800158d7 .word 0x800158d7 +800052a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x4e4e4e4e +800052a4: 00052a83 lw x21,0(x10) +800052a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x4e4e4e4e +800052ac: 00052f83 lw x31,0(x10) +800052b0: 00450513 addi x10,x10,4 + +800052b4 : +Zkne_aes32esi_cg_cp_sbox_b78: + aes32esi x24, x21, x31, 1 # perform operation +800052b4: 63fa8c33 aes32esi x24,x21,x31,0x1 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b78, Zkne_aes32esi_cg_cp_sbox_b78_str) +800052b8: 000ea203 lw x4,0(x29) +800052bc: 01820863 beq x4,x24,800052cc +800052c0: 701022ef jal x5,800081c0 +800052c4: 800052b4 .word 0x800052b4 +800052c8: 80015910 .word 0x80015910 +800052cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x4f4f4f4f +800052d0: 00052983 lw x19,0(x10) +800052d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x4f4f4f4f +800052d8: 00052083 lw x1,0(x10) +800052dc: 00450513 addi x10,x10,4 + +800052e0 : +Zkne_aes32esi_cg_cp_sbox_b79: + aes32esi x23, x19, x1, 3 # perform operation +800052e0: e2198bb3 aes32esi x23,x19,x1,0x3 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b79, Zkne_aes32esi_cg_cp_sbox_b79_str) +800052e4: 000ea203 lw x4,0(x29) +800052e8: 01720863 beq x4,x23,800052f8 +800052ec: 6d5022ef jal x5,800081c0 +800052f0: 800052e0 .word 0x800052e0 +800052f4: 80015949 .word 0x80015949 +800052f8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x50505050 +800052fc: 00052683 lw x13,0(x10) +80005300: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x50505050 +80005304: 00052f03 lw x30,0(x10) +80005308: 00450513 addi x10,x10,4 + +8000530c : +Zkne_aes32esi_cg_cp_sbox_b80: + aes32esi x26, x13, x30, 3 # perform operation +8000530c: e3e68d33 aes32esi x26,x13,x30,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b80, Zkne_aes32esi_cg_cp_sbox_b80_str) +80005310: 000ea203 lw x4,0(x29) +80005314: 01a20863 beq x4,x26,80005324 +80005318: 6a9022ef jal x5,800081c0 +8000531c: 8000530c .word 0x8000530c +80005320: 80015982 .word 0x80015982 +80005324: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x51515151 +80005328: 00052403 lw x8,0(x10) +8000532c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x51515151 +80005330: 00052383 lw x7,0(x10) +80005334: 00450513 addi x10,x10,4 + +80005338 : +Zkne_aes32esi_cg_cp_sbox_b81: + aes32esi x18, x8, x7, 3 # perform operation +80005338: e2740933 aes32esi x18,x8,x7,0x3 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b81, Zkne_aes32esi_cg_cp_sbox_b81_str) +8000533c: 000ea203 lw x4,0(x29) +80005340: 01220863 beq x4,x18,80005350 +80005344: 67d022ef jal x5,800081c0 +80005348: 80005338 .word 0x80005338 +8000534c: 800159bb .word 0x800159bb +80005350: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x52525252 +80005354: 00052b03 lw x22,0(x10) +80005358: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x52525252 +8000535c: 00052b83 lw x23,0(x10) +80005360: 00450513 addi x10,x10,4 + +80005364 : +Zkne_aes32esi_cg_cp_sbox_b82: + aes32esi x20, x22, x23, 2 # perform operation +80005364: a37b0a33 aes32esi x20,x22,x23,0x2 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b82, Zkne_aes32esi_cg_cp_sbox_b82_str) +80005368: 000ea203 lw x4,0(x29) +8000536c: 01420863 beq x4,x20,8000537c +80005370: 651022ef jal x5,800081c0 +80005374: 80005364 .word 0x80005364 +80005378: 800159f4 .word 0x800159f4 +8000537c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x53535353 +80005380: 00052103 lw x2,0(x10) +80005384: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x53535353 +80005388: 00052983 lw x19,0(x10) +8000538c: 00450513 addi x10,x10,4 + +80005390 : +Zkne_aes32esi_cg_cp_sbox_b83: + aes32esi x17, x2, x19, 3 # perform operation +80005390: e33108b3 aes32esi x17,x2,x19,0x3 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b83, Zkne_aes32esi_cg_cp_sbox_b83_str) +80005394: 000ea203 lw x4,0(x29) +80005398: 01120863 beq x4,x17,800053a8 +8000539c: 625022ef jal x5,800081c0 +800053a0: 80005390 .word 0x80005390 +800053a4: 80015a2d .word 0x80015a2d +800053a8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x54545454 +800053ac: 00052583 lw x11,0(x10) +800053b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x54545454 +800053b4: 00052483 lw x9,0(x10) +800053b8: 00450513 addi x10,x10,4 + +800053bc : +Zkne_aes32esi_cg_cp_sbox_b84: + aes32esi x7, x11, x9, 0 # perform operation +800053bc: 229583b3 aes32esi x7,x11,x9,0x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b84, Zkne_aes32esi_cg_cp_sbox_b84_str) +800053c0: 000ea203 lw x4,0(x29) +800053c4: 00720863 beq x4,x7,800053d4 +800053c8: 5f9022ef jal x5,800081c0 +800053cc: 800053bc .word 0x800053bc +800053d0: 80015a66 .word 0x80015a66 +800053d4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x55555555 +800053d8: 00052a03 lw x20,0(x10) +800053dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x55555555 +800053e0: 00052703 lw x14,0(x10) +800053e4: 00450513 addi x10,x10,4 + +800053e8 : +Zkne_aes32esi_cg_cp_sbox_b85: + aes32esi x31, x20, x14, 0 # perform operation +800053e8: 22ea0fb3 aes32esi x31,x20,x14,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b85, Zkne_aes32esi_cg_cp_sbox_b85_str) +800053ec: 000ea203 lw x4,0(x29) +800053f0: 01f20863 beq x4,x31,80005400 +800053f4: 5cd022ef jal x5,800081c0 +800053f8: 800053e8 .word 0x800053e8 +800053fc: 80015a9f .word 0x80015a9f +80005400: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x56565656 +80005404: 00052a03 lw x20,0(x10) +80005408: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x56565656 +8000540c: 00052783 lw x15,0(x10) +80005410: 00450513 addi x10,x10,4 + +80005414 : +Zkne_aes32esi_cg_cp_sbox_b86: + aes32esi x25, x20, x15, 1 # perform operation +80005414: 62fa0cb3 aes32esi x25,x20,x15,0x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b86, Zkne_aes32esi_cg_cp_sbox_b86_str) +80005418: 000ea203 lw x4,0(x29) +8000541c: 01920863 beq x4,x25,8000542c +80005420: 5a1022ef jal x5,800081c0 +80005424: 80005414 .word 0x80005414 +80005428: 80015ad8 .word 0x80015ad8 +8000542c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x57575757 +80005430: 00052883 lw x17,0(x10) +80005434: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x57575757 +80005438: 00052903 lw x18,0(x10) +8000543c: 00450513 addi x10,x10,4 + +80005440 : +Zkne_aes32esi_cg_cp_sbox_b87: + aes32esi x11, x17, x18, 2 # perform operation +80005440: a32885b3 aes32esi x11,x17,x18,0x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b87, Zkne_aes32esi_cg_cp_sbox_b87_str) +80005444: 000ea203 lw x4,0(x29) +80005448: 00b20863 beq x4,x11,80005458 +8000544c: 575022ef jal x5,800081c0 +80005450: 80005440 .word 0x80005440 +80005454: 80015b11 .word 0x80015b11 +80005458: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x58585858 +8000545c: 00052683 lw x13,0(x10) +80005460: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x58585858 +80005464: 00052c83 lw x25,0(x10) +80005468: 00450513 addi x10,x10,4 + +8000546c : +Zkne_aes32esi_cg_cp_sbox_b88: + aes32esi x15, x13, x25, 1 # perform operation +8000546c: 639687b3 aes32esi x15,x13,x25,0x1 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b88, Zkne_aes32esi_cg_cp_sbox_b88_str) +80005470: 000ea203 lw x4,0(x29) +80005474: 00f20863 beq x4,x15,80005484 +80005478: 549022ef jal x5,800081c0 +8000547c: 8000546c .word 0x8000546c +80005480: 80015b4a .word 0x80015b4a +80005484: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x59595959 +80005488: 00052183 lw x3,0(x10) +8000548c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x59595959 +80005490: 00052683 lw x13,0(x10) +80005494: 00450513 addi x10,x10,4 + +80005498 : +Zkne_aes32esi_cg_cp_sbox_b89: + aes32esi x11, x3, x13, 1 # perform operation +80005498: 62d185b3 aes32esi x11,x3,x13,0x1 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b89, Zkne_aes32esi_cg_cp_sbox_b89_str) +8000549c: 000ea203 lw x4,0(x29) +800054a0: 00b20863 beq x4,x11,800054b0 +800054a4: 51d022ef jal x5,800081c0 +800054a8: 80005498 .word 0x80005498 +800054ac: 80015b83 .word 0x80015b83 +800054b0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5a5a5a5a +800054b4: 00052803 lw x16,0(x10) +800054b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x5a5a5a5a +800054bc: 00052083 lw x1,0(x10) +800054c0: 00450513 addi x10,x10,4 + +800054c4 : +Zkne_aes32esi_cg_cp_sbox_b90: + aes32esi x13, x16, x1, 1 # perform operation +800054c4: 621806b3 aes32esi x13,x16,x1,0x1 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b90, Zkne_aes32esi_cg_cp_sbox_b90_str) +800054c8: 000ea203 lw x4,0(x29) +800054cc: 00d20863 beq x4,x13,800054dc +800054d0: 4f1022ef jal x5,800081c0 +800054d4: 800054c4 .word 0x800054c4 +800054d8: 80015bbc .word 0x80015bbc +800054dc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5b5b5b5b +800054e0: 00052683 lw x13,0(x10) +800054e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5b5b5b5b +800054e8: 00052783 lw x15,0(x10) +800054ec: 00450513 addi x10,x10,4 + +800054f0 : +Zkne_aes32esi_cg_cp_sbox_b91: + aes32esi x31, x13, x15, 3 # perform operation +800054f0: e2f68fb3 aes32esi x31,x13,x15,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b91, Zkne_aes32esi_cg_cp_sbox_b91_str) +800054f4: 000ea203 lw x4,0(x29) +800054f8: 01f20863 beq x4,x31,80005508 +800054fc: 4c5022ef jal x5,800081c0 +80005500: 800054f0 .word 0x800054f0 +80005504: 80015bf5 .word 0x80015bf5 +80005508: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5c5c5c5c +8000550c: 00052603 lw x12,0(x10) +80005510: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5c5c5c5c +80005514: 00052e03 lw x28,0(x10) +80005518: 00450513 addi x10,x10,4 + +8000551c : +Zkne_aes32esi_cg_cp_sbox_b92: + aes32esi x15, x12, x28, 2 # perform operation +8000551c: a3c607b3 aes32esi x15,x12,x28,0x2 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b92, Zkne_aes32esi_cg_cp_sbox_b92_str) +80005520: 000ea203 lw x4,0(x29) +80005524: 00f20863 beq x4,x15,80005534 +80005528: 499022ef jal x5,800081c0 +8000552c: 8000551c .word 0x8000551c +80005530: 80015c2e .word 0x80015c2e +80005534: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x5d5d5d5d +80005538: 00052383 lw x7,0(x10) +8000553c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5d5d5d5d +80005540: 00052f83 lw x31,0(x10) +80005544: 00450513 addi x10,x10,4 + +80005548 : +Zkne_aes32esi_cg_cp_sbox_b93: + aes32esi x19, x7, x31, 2 # perform operation +80005548: a3f389b3 aes32esi x19,x7,x31,0x2 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b93, Zkne_aes32esi_cg_cp_sbox_b93_str) +8000554c: 000ea203 lw x4,0(x29) +80005550: 01320863 beq x4,x19,80005560 +80005554: 46d022ef jal x5,800081c0 +80005558: 80005548 .word 0x80005548 +8000555c: 80015c67 .word 0x80015c67 +80005560: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5e5e5e5e +80005564: 00052883 lw x17,0(x10) +80005568: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5e5e5e5e +8000556c: 00052b83 lw x23,0(x10) +80005570: 00450513 addi x10,x10,4 + +80005574 : +Zkne_aes32esi_cg_cp_sbox_b94: + aes32esi x20, x17, x23, 3 # perform operation +80005574: e3788a33 aes32esi x20,x17,x23,0x3 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b94, Zkne_aes32esi_cg_cp_sbox_b94_str) +80005578: 000ea203 lw x4,0(x29) +8000557c: 01420863 beq x4,x20,8000558c +80005580: 441022ef jal x5,800081c0 +80005584: 80005574 .word 0x80005574 +80005588: 80015ca0 .word 0x80015ca0 +8000558c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5f5f5f5f +80005590: 00052b83 lw x23,0(x10) +80005594: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5f5f5f5f +80005598: 00052983 lw x19,0(x10) +8000559c: 00450513 addi x10,x10,4 + +800055a0 : +Zkne_aes32esi_cg_cp_sbox_b95: + aes32esi x17, x23, x19, 1 # perform operation +800055a0: 633b88b3 aes32esi x17,x23,x19,0x1 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b95, Zkne_aes32esi_cg_cp_sbox_b95_str) +800055a4: 000ea203 lw x4,0(x29) +800055a8: 01120863 beq x4,x17,800055b8 +800055ac: 415022ef jal x5,800081c0 +800055b0: 800055a0 .word 0x800055a0 +800055b4: 80015cd9 .word 0x80015cd9 +800055b8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x60606060 +800055bc: 00052e03 lw x28,0(x10) +800055c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x60606060 +800055c4: 00052883 lw x17,0(x10) +800055c8: 00450513 addi x10,x10,4 + +800055cc : +Zkne_aes32esi_cg_cp_sbox_b96: + aes32esi x31, x28, x17, 0 # perform operation +800055cc: 231e0fb3 aes32esi x31,x28,x17,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b96, Zkne_aes32esi_cg_cp_sbox_b96_str) +800055d0: 000ea203 lw x4,0(x29) +800055d4: 01f20863 beq x4,x31,800055e4 +800055d8: 3e9022ef jal x5,800081c0 +800055dc: 800055cc .word 0x800055cc +800055e0: 80015d12 .word 0x80015d12 +800055e4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x61616161 +800055e8: 00052583 lw x11,0(x10) +800055ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x61616161 +800055f0: 00052f83 lw x31,0(x10) +800055f4: 00450513 addi x10,x10,4 + +800055f8 : +Zkne_aes32esi_cg_cp_sbox_b97: + aes32esi x30, x11, x31, 3 # perform operation +800055f8: e3f58f33 aes32esi x30,x11,x31,0x3 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b97, Zkne_aes32esi_cg_cp_sbox_b97_str) +800055fc: 000ea203 lw x4,0(x29) +80005600: 01e20863 beq x4,x30,80005610 +80005604: 3bd022ef jal x5,800081c0 +80005608: 800055f8 .word 0x800055f8 +8000560c: 80015d4b .word 0x80015d4b +80005610: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x62626262 +80005614: 00052803 lw x16,0(x10) +80005618: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x62626262 +8000561c: 00052583 lw x11,0(x10) +80005620: 00450513 addi x10,x10,4 + +80005624 : +Zkne_aes32esi_cg_cp_sbox_b98: + aes32esi x15, x16, x11, 1 # perform operation +80005624: 62b807b3 aes32esi x15,x16,x11,0x1 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b98, Zkne_aes32esi_cg_cp_sbox_b98_str) +80005628: 000ea203 lw x4,0(x29) +8000562c: 00f20863 beq x4,x15,8000563c +80005630: 391022ef jal x5,800081c0 +80005634: 80005624 .word 0x80005624 +80005638: 80015d84 .word 0x80015d84 +8000563c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x63636363 +80005640: 00052e03 lw x28,0(x10) +80005644: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x63636363 +80005648: 00052103 lw x2,0(x10) +8000564c: 00450513 addi x10,x10,4 + +80005650 : +Zkne_aes32esi_cg_cp_sbox_b99: + aes32esi x26, x28, x2, 3 # perform operation +80005650: e22e0d33 aes32esi x26,x28,x2,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b99, Zkne_aes32esi_cg_cp_sbox_b99_str) +80005654: 000ea203 lw x4,0(x29) +80005658: 01a20863 beq x4,x26,80005668 +8000565c: 365022ef jal x5,800081c0 +80005660: 80005650 .word 0x80005650 +80005664: 80015dbd .word 0x80015dbd +80005668: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x64646464 +8000566c: 00052883 lw x17,0(x10) +80005670: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x64646464 +80005674: 00052603 lw x12,0(x10) +80005678: 00450513 addi x10,x10,4 + +8000567c : +Zkne_aes32esi_cg_cp_sbox_b100: + aes32esi x6, x17, x12, 1 # perform operation +8000567c: 62c88333 aes32esi x6,x17,x12,0x1 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b100, Zkne_aes32esi_cg_cp_sbox_b100_str) +80005680: 000ea203 lw x4,0(x29) +80005684: 00620863 beq x4,x6,80005694 +80005688: 339022ef jal x5,800081c0 +8000568c: 8000567c .word 0x8000567c +80005690: 80015df6 .word 0x80015df6 +80005694: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x65656565 +80005698: 00052603 lw x12,0(x10) +8000569c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x65656565 +800056a0: 00052183 lw x3,0(x10) +800056a4: 00450513 addi x10,x10,4 + +800056a8 : +Zkne_aes32esi_cg_cp_sbox_b101: + aes32esi x7, x12, x3, 1 # perform operation +800056a8: 623603b3 aes32esi x7,x12,x3,0x1 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b101, Zkne_aes32esi_cg_cp_sbox_b101_str) +800056ac: 000ea203 lw x4,0(x29) +800056b0: 00720863 beq x4,x7,800056c0 +800056b4: 30d022ef jal x5,800081c0 +800056b8: 800056a8 .word 0x800056a8 +800056bc: 80015e30 .word 0x80015e30 +800056c0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x66666666 +800056c4: 00052883 lw x17,0(x10) +800056c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x66666666 +800056cc: 00052403 lw x8,0(x10) +800056d0: 00450513 addi x10,x10,4 + +800056d4 : +Zkne_aes32esi_cg_cp_sbox_b102: + aes32esi x22, x17, x8, 2 # perform operation +800056d4: a2888b33 aes32esi x22,x17,x8,0x2 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b102, Zkne_aes32esi_cg_cp_sbox_b102_str) +800056d8: 000ea203 lw x4,0(x29) +800056dc: 01620863 beq x4,x22,800056ec +800056e0: 2e1022ef jal x5,800081c0 +800056e4: 800056d4 .word 0x800056d4 +800056e8: 80015e6a .word 0x80015e6a +800056ec: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x67676767 +800056f0: 00052103 lw x2,0(x10) +800056f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x67676767 +800056f8: 00052883 lw x17,0(x10) +800056fc: 00450513 addi x10,x10,4 + +80005700 : +Zkne_aes32esi_cg_cp_sbox_b103: + aes32esi x27, x2, x17, 3 # perform operation +80005700: e3110db3 aes32esi x27,x2,x17,0x3 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b103, Zkne_aes32esi_cg_cp_sbox_b103_str) +80005704: 000ea203 lw x4,0(x29) +80005708: 01b20863 beq x4,x27,80005718 +8000570c: 2b5022ef jal x5,800081c0 +80005710: 80005700 .word 0x80005700 +80005714: 80015ea4 .word 0x80015ea4 +80005718: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x68686868 +8000571c: 00052183 lw x3,0(x10) +80005720: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x68686868 +80005724: 00052683 lw x13,0(x10) +80005728: 00450513 addi x10,x10,4 + +8000572c : +Zkne_aes32esi_cg_cp_sbox_b104: + aes32esi x11, x3, x13, 3 # perform operation +8000572c: e2d185b3 aes32esi x11,x3,x13,0x3 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b104, Zkne_aes32esi_cg_cp_sbox_b104_str) +80005730: 000ea203 lw x4,0(x29) +80005734: 00b20863 beq x4,x11,80005744 +80005738: 289022ef jal x5,800081c0 +8000573c: 8000572c .word 0x8000572c +80005740: 80015ede .word 0x80015ede +80005744: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x69696969 +80005748: 00052303 lw x6,0(x10) +8000574c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x69696969 +80005750: 00052783 lw x15,0(x10) +80005754: 00450513 addi x10,x10,4 + +80005758 : +Zkne_aes32esi_cg_cp_sbox_b105: + aes32esi x9, x6, x15, 0 # perform operation +80005758: 22f304b3 aes32esi x9,x6,x15,0x0 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zkne_aes32esi_cg_cp_sbox_b105, Zkne_aes32esi_cg_cp_sbox_b105_str) +8000575c: 000ea203 lw x4,0(x29) +80005760: 00920863 beq x4,x9,80005770 +80005764: 25d022ef jal x5,800081c0 +80005768: 80005758 .word 0x80005758 +8000576c: 80015f18 .word 0x80015f18 +80005770: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6a6a6a6a +80005774: 00052403 lw x8,0(x10) +80005778: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x6a6a6a6a +8000577c: 00052803 lw x16,0(x10) +80005780: 00450513 addi x10,x10,4 + +80005784 : +Zkne_aes32esi_cg_cp_sbox_b106: + aes32esi x22, x8, x16, 1 # perform operation +80005784: 63040b33 aes32esi x22,x8,x16,0x1 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b106, Zkne_aes32esi_cg_cp_sbox_b106_str) +80005788: 000ea203 lw x4,0(x29) +8000578c: 01620863 beq x4,x22,8000579c +80005790: 231022ef jal x5,800081c0 +80005794: 80005784 .word 0x80005784 +80005798: 80015f52 .word 0x80015f52 +8000579c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x6b6b6b6b +800057a0: 00052f83 lw x31,0(x10) +800057a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x6b6b6b6b +800057a8: 00052483 lw x9,0(x10) +800057ac: 00450513 addi x10,x10,4 + +800057b0 : +Zkne_aes32esi_cg_cp_sbox_b107: + aes32esi x18, x31, x9, 2 # perform operation +800057b0: a29f8933 aes32esi x18,x31,x9,0x2 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b107, Zkne_aes32esi_cg_cp_sbox_b107_str) +800057b4: 000ea203 lw x4,0(x29) +800057b8: 01220863 beq x4,x18,800057c8 +800057bc: 205022ef jal x5,800081c0 +800057c0: 800057b0 .word 0x800057b0 +800057c4: 80015f8c .word 0x80015f8c +800057c8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x6c6c6c6c +800057cc: 00052083 lw x1,0(x10) +800057d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x6c6c6c6c +800057d4: 00052f83 lw x31,0(x10) +800057d8: 00450513 addi x10,x10,4 + +800057dc : +Zkne_aes32esi_cg_cp_sbox_b108: + aes32esi x2, x1, x31, 3 # perform operation +800057dc: e3f08133 aes32esi x2,x1,x31,0x3 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b108, Zkne_aes32esi_cg_cp_sbox_b108_str) +800057e0: 000ea203 lw x4,0(x29) +800057e4: 00220863 beq x4,x2,800057f4 +800057e8: 1d9022ef jal x5,800081c0 +800057ec: 800057dc .word 0x800057dc +800057f0: 80015fc6 .word 0x80015fc6 +800057f4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x6d6d6d6d +800057f8: 00052b83 lw x23,0(x10) +800057fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x6d6d6d6d +80005800: 00052f03 lw x30,0(x10) +80005804: 00450513 addi x10,x10,4 + +80005808 : +Zkne_aes32esi_cg_cp_sbox_b109: + aes32esi x15, x23, x30, 0 # perform operation +80005808: 23eb87b3 aes32esi x15,x23,x30,0x0 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b109, Zkne_aes32esi_cg_cp_sbox_b109_str) +8000580c: 000ea203 lw x4,0(x29) +80005810: 00f20863 beq x4,x15,80005820 +80005814: 1ad022ef jal x5,800081c0 +80005818: 80005808 .word 0x80005808 +8000581c: 80016000 .word 0x80016000 +80005820: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x6e6e6e6e +80005824: 00052103 lw x2,0(x10) +80005828: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6e6e6e6e +8000582c: 00052a03 lw x20,0(x10) +80005830: 00450513 addi x10,x10,4 + +80005834 : +Zkne_aes32esi_cg_cp_sbox_b110: + aes32esi x8, x2, x20, 0 # perform operation +80005834: 23410433 aes32esi x8,x2,x20,0x0 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b110, Zkne_aes32esi_cg_cp_sbox_b110_str) +80005838: 000ea203 lw x4,0(x29) +8000583c: 00820863 beq x4,x8,8000584c +80005840: 181022ef jal x5,800081c0 +80005844: 80005834 .word 0x80005834 +80005848: 8001603a .word 0x8001603a +8000584c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x6f6f6f6f +80005850: 00052803 lw x16,0(x10) +80005854: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x6f6f6f6f +80005858: 00052d03 lw x26,0(x10) +8000585c: 00450513 addi x10,x10,4 + +80005860 : +Zkne_aes32esi_cg_cp_sbox_b111: + aes32esi x3, x16, x26, 1 # perform operation +80005860: 63a801b3 aes32esi x3,x16,x26,0x1 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b111, Zkne_aes32esi_cg_cp_sbox_b111_str) +80005864: 000ea203 lw x4,0(x29) +80005868: 00320863 beq x4,x3,80005878 +8000586c: 155022ef jal x5,800081c0 +80005870: 80005860 .word 0x80005860 +80005874: 80016074 .word 0x80016074 +80005878: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x70707070 +8000587c: 00052983 lw x19,0(x10) +80005880: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x70707070 +80005884: 00052a83 lw x21,0(x10) +80005888: 00450513 addi x10,x10,4 + +8000588c : +Zkne_aes32esi_cg_cp_sbox_b112: + aes32esi x16, x19, x21, 0 # perform operation +8000588c: 23598833 aes32esi x16,x19,x21,0x0 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b112, Zkne_aes32esi_cg_cp_sbox_b112_str) +80005890: 000ea203 lw x4,0(x29) +80005894: 01020863 beq x4,x16,800058a4 +80005898: 129022ef jal x5,800081c0 +8000589c: 8000588c .word 0x8000588c +800058a0: 800160ae .word 0x800160ae +800058a4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x71717171 +800058a8: 00052d83 lw x27,0(x10) +800058ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x71717171 +800058b0: 00052583 lw x11,0(x10) +800058b4: 00450513 addi x10,x10,4 + +800058b8 : +Zkne_aes32esi_cg_cp_sbox_b113: + aes32esi x17, x27, x11, 2 # perform operation +800058b8: a2bd88b3 aes32esi x17,x27,x11,0x2 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b113, Zkne_aes32esi_cg_cp_sbox_b113_str) +800058bc: 000ea203 lw x4,0(x29) +800058c0: 01120863 beq x4,x17,800058d0 +800058c4: 0fd022ef jal x5,800081c0 +800058c8: 800058b8 .word 0x800058b8 +800058cc: 800160e8 .word 0x800160e8 +800058d0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x72727272 +800058d4: 00052c83 lw x25,0(x10) +800058d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x72727272 +800058dc: 00052683 lw x13,0(x10) +800058e0: 00450513 addi x10,x10,4 + +800058e4 : +Zkne_aes32esi_cg_cp_sbox_b114: + aes32esi x3, x25, x13, 2 # perform operation +800058e4: a2dc81b3 aes32esi x3,x25,x13,0x2 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b114, Zkne_aes32esi_cg_cp_sbox_b114_str) +800058e8: 000ea203 lw x4,0(x29) +800058ec: 00320863 beq x4,x3,800058fc +800058f0: 0d1022ef jal x5,800081c0 +800058f4: 800058e4 .word 0x800058e4 +800058f8: 80016122 .word 0x80016122 +800058fc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x73737373 +80005900: 00052583 lw x11,0(x10) +80005904: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x73737373 +80005908: 00052103 lw x2,0(x10) +8000590c: 00450513 addi x10,x10,4 + +80005910 : +Zkne_aes32esi_cg_cp_sbox_b115: + aes32esi x14, x11, x2, 2 # perform operation +80005910: a2258733 aes32esi x14,x11,x2,0x2 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b115, Zkne_aes32esi_cg_cp_sbox_b115_str) +80005914: 000ea203 lw x4,0(x29) +80005918: 00e20863 beq x4,x14,80005928 +8000591c: 0a5022ef jal x5,800081c0 +80005920: 80005910 .word 0x80005910 +80005924: 8001615c .word 0x8001615c +80005928: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x74747474 +8000592c: 00052b83 lw x23,0(x10) +80005930: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x74747474 +80005934: 00052d83 lw x27,0(x10) +80005938: 00450513 addi x10,x10,4 + +8000593c : +Zkne_aes32esi_cg_cp_sbox_b116: + aes32esi x16, x23, x27, 1 # perform operation +8000593c: 63bb8833 aes32esi x16,x23,x27,0x1 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b116, Zkne_aes32esi_cg_cp_sbox_b116_str) +80005940: 000ea203 lw x4,0(x29) +80005944: 01020863 beq x4,x16,80005954 +80005948: 079022ef jal x5,800081c0 +8000594c: 8000593c .word 0x8000593c +80005950: 80016196 .word 0x80016196 +80005954: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x75757575 +80005958: 00052103 lw x2,0(x10) +8000595c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x75757575 +80005960: 00052f83 lw x31,0(x10) +80005964: 00450513 addi x10,x10,4 + +80005968 : +Zkne_aes32esi_cg_cp_sbox_b117: + aes32esi x13, x2, x31, 2 # perform operation +80005968: a3f106b3 aes32esi x13,x2,x31,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b117, Zkne_aes32esi_cg_cp_sbox_b117_str) +8000596c: 000ea203 lw x4,0(x29) +80005970: 00d20863 beq x4,x13,80005980 +80005974: 04d022ef jal x5,800081c0 +80005978: 80005968 .word 0x80005968 +8000597c: 800161d0 .word 0x800161d0 +80005980: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x76767676 +80005984: 00052f03 lw x30,0(x10) +80005988: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x76767676 +8000598c: 00052b03 lw x22,0(x10) +80005990: 00450513 addi x10,x10,4 + +80005994 : +Zkne_aes32esi_cg_cp_sbox_b118: + aes32esi x25, x30, x22, 0 # perform operation +80005994: 236f0cb3 aes32esi x25,x30,x22,0x0 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b118, Zkne_aes32esi_cg_cp_sbox_b118_str) +80005998: 000ea203 lw x4,0(x29) +8000599c: 01920863 beq x4,x25,800059ac +800059a0: 021022ef jal x5,800081c0 +800059a4: 80005994 .word 0x80005994 +800059a8: 8001620a .word 0x8001620a +800059ac: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x77777777 +800059b0: 00052903 lw x18,0(x10) +800059b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x77777777 +800059b8: 00052c03 lw x24,0(x10) +800059bc: 00450513 addi x10,x10,4 + +800059c0 : +Zkne_aes32esi_cg_cp_sbox_b119: + aes32esi x13, x18, x24, 3 # perform operation +800059c0: e38906b3 aes32esi x13,x18,x24,0x3 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b119, Zkne_aes32esi_cg_cp_sbox_b119_str) +800059c4: 000ea203 lw x4,0(x29) +800059c8: 00d20863 beq x4,x13,800059d8 +800059cc: 7f4022ef jal x5,800081c0 +800059d0: 800059c0 .word 0x800059c0 +800059d4: 80016244 .word 0x80016244 +800059d8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x78787878 +800059dc: 00052403 lw x8,0(x10) +800059e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x78787878 +800059e4: 00052c83 lw x25,0(x10) +800059e8: 00450513 addi x10,x10,4 + +800059ec : +Zkne_aes32esi_cg_cp_sbox_b120: + aes32esi x14, x8, x25, 0 # perform operation +800059ec: 23940733 aes32esi x14,x8,x25,0x0 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b120, Zkne_aes32esi_cg_cp_sbox_b120_str) +800059f0: 000ea203 lw x4,0(x29) +800059f4: 00e20863 beq x4,x14,80005a04 +800059f8: 7c8022ef jal x5,800081c0 +800059fc: 800059ec .word 0x800059ec +80005a00: 8001627e .word 0x8001627e +80005a04: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x79797979 +80005a08: 00052603 lw x12,0(x10) +80005a0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x79797979 +80005a10: 00052683 lw x13,0(x10) +80005a14: 00450513 addi x10,x10,4 + +80005a18 : +Zkne_aes32esi_cg_cp_sbox_b121: + aes32esi x3, x12, x13, 0 # perform operation +80005a18: 22d601b3 aes32esi x3,x12,x13,0x0 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b121, Zkne_aes32esi_cg_cp_sbox_b121_str) +80005a1c: 000ea203 lw x4,0(x29) +80005a20: 00320863 beq x4,x3,80005a30 +80005a24: 79c022ef jal x5,800081c0 +80005a28: 80005a18 .word 0x80005a18 +80005a2c: 800162b8 .word 0x800162b8 +80005a30: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7a7a7a7a +80005a34: 00052b03 lw x22,0(x10) +80005a38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7a7a7a7a +80005a3c: 00052f83 lw x31,0(x10) +80005a40: 00450513 addi x10,x10,4 + +80005a44 : +Zkne_aes32esi_cg_cp_sbox_b122: + aes32esi x26, x22, x31, 3 # perform operation +80005a44: e3fb0d33 aes32esi x26,x22,x31,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b122, Zkne_aes32esi_cg_cp_sbox_b122_str) +80005a48: 000ea203 lw x4,0(x29) +80005a4c: 01a20863 beq x4,x26,80005a5c +80005a50: 770022ef jal x5,800081c0 +80005a54: 80005a44 .word 0x80005a44 +80005a58: 800162f2 .word 0x800162f2 +80005a5c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7b7b7b7b +80005a60: 00052b03 lw x22,0(x10) +80005a64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x7b7b7b7b +80005a68: 00052183 lw x3,0(x10) +80005a6c: 00450513 addi x10,x10,4 + +80005a70 : +Zkne_aes32esi_cg_cp_sbox_b123: + aes32esi x26, x22, x3, 3 # perform operation +80005a70: e23b0d33 aes32esi x26,x22,x3,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b123, Zkne_aes32esi_cg_cp_sbox_b123_str) +80005a74: 000ea203 lw x4,0(x29) +80005a78: 01a20863 beq x4,x26,80005a88 +80005a7c: 744022ef jal x5,800081c0 +80005a80: 80005a70 .word 0x80005a70 +80005a84: 8001632c .word 0x8001632c +80005a88: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7c7c7c7c +80005a8c: 00052383 lw x7,0(x10) +80005a90: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7c7c7c7c +80005a94: 00052c83 lw x25,0(x10) +80005a98: 00450513 addi x10,x10,4 + +80005a9c : +Zkne_aes32esi_cg_cp_sbox_b124: + aes32esi x1, x7, x25, 2 # perform operation +80005a9c: a39380b3 aes32esi x1,x7,x25,0x2 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b124, Zkne_aes32esi_cg_cp_sbox_b124_str) +80005aa0: 000ea203 lw x4,0(x29) +80005aa4: 00120863 beq x4,x1,80005ab4 +80005aa8: 718022ef jal x5,800081c0 +80005aac: 80005a9c .word 0x80005a9c +80005ab0: 80016366 .word 0x80016366 +80005ab4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7d7d7d7d +80005ab8: 00052e03 lw x28,0(x10) +80005abc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7d7d7d7d +80005ac0: 00052803 lw x16,0(x10) +80005ac4: 00450513 addi x10,x10,4 + +80005ac8 : +Zkne_aes32esi_cg_cp_sbox_b125: + aes32esi x11, x28, x16, 2 # perform operation +80005ac8: a30e05b3 aes32esi x11,x28,x16,0x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b125, Zkne_aes32esi_cg_cp_sbox_b125_str) +80005acc: 000ea203 lw x4,0(x29) +80005ad0: 00b20863 beq x4,x11,80005ae0 +80005ad4: 6ec022ef jal x5,800081c0 +80005ad8: 80005ac8 .word 0x80005ac8 +80005adc: 800163a0 .word 0x800163a0 +80005ae0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7e7e7e7e +80005ae4: 00052f03 lw x30,0(x10) +80005ae8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7e7e7e7e +80005aec: 00052683 lw x13,0(x10) +80005af0: 00450513 addi x10,x10,4 + +80005af4 : +Zkne_aes32esi_cg_cp_sbox_b126: + aes32esi x26, x30, x13, 3 # perform operation +80005af4: e2df0d33 aes32esi x26,x30,x13,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b126, Zkne_aes32esi_cg_cp_sbox_b126_str) +80005af8: 000ea203 lw x4,0(x29) +80005afc: 01a20863 beq x4,x26,80005b0c +80005b00: 6c0022ef jal x5,800081c0 +80005b04: 80005af4 .word 0x80005af4 +80005b08: 800163da .word 0x800163da +80005b0c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7f7f7f7f +80005b10: 00052083 lw x1,0(x10) +80005b14: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7f7f7f7f +80005b18: 00052c83 lw x25,0(x10) +80005b1c: 00450513 addi x10,x10,4 + +80005b20 : +Zkne_aes32esi_cg_cp_sbox_b127: + aes32esi x7, x1, x25, 0 # perform operation +80005b20: 239083b3 aes32esi x7,x1,x25,0x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b127, Zkne_aes32esi_cg_cp_sbox_b127_str) +80005b24: 000ea203 lw x4,0(x29) +80005b28: 00720863 beq x4,x7,80005b38 +80005b2c: 694022ef jal x5,800081c0 +80005b30: 80005b20 .word 0x80005b20 +80005b34: 80016414 .word 0x80016414 +80005b38: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x80808080 +80005b3c: 00052d03 lw x26,0(x10) +80005b40: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x80808080 +80005b44: 00052803 lw x16,0(x10) +80005b48: 00450513 addi x10,x10,4 + +80005b4c : +Zkne_aes32esi_cg_cp_sbox_b128: + aes32esi x6, x26, x16, 2 # perform operation +80005b4c: a30d0333 aes32esi x6,x26,x16,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b128, Zkne_aes32esi_cg_cp_sbox_b128_str) +80005b50: 000ea203 lw x4,0(x29) +80005b54: 00620863 beq x4,x6,80005b64 +80005b58: 668022ef jal x5,800081c0 +80005b5c: 80005b4c .word 0x80005b4c +80005b60: 8001644e .word 0x8001644e +80005b64: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x81818181 +80005b68: 00052a03 lw x20,0(x10) +80005b6c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x81818181 +80005b70: 00052903 lw x18,0(x10) +80005b74: 00450513 addi x10,x10,4 + +80005b78 : +Zkne_aes32esi_cg_cp_sbox_b129: + aes32esi x8, x20, x18, 2 # perform operation +80005b78: a32a0433 aes32esi x8,x20,x18,0x2 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b129, Zkne_aes32esi_cg_cp_sbox_b129_str) +80005b7c: 000ea203 lw x4,0(x29) +80005b80: 00820863 beq x4,x8,80005b90 +80005b84: 63c022ef jal x5,800081c0 +80005b88: 80005b78 .word 0x80005b78 +80005b8c: 80016488 .word 0x80016488 +80005b90: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x82828282 +80005b94: 00052e03 lw x28,0(x10) +80005b98: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x82828282 +80005b9c: 00052b03 lw x22,0(x10) +80005ba0: 00450513 addi x10,x10,4 + +80005ba4 : +Zkne_aes32esi_cg_cp_sbox_b130: + aes32esi x2, x28, x22, 0 # perform operation +80005ba4: 236e0133 aes32esi x2,x28,x22,0x0 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b130, Zkne_aes32esi_cg_cp_sbox_b130_str) +80005ba8: 000ea203 lw x4,0(x29) +80005bac: 00220863 beq x4,x2,80005bbc +80005bb0: 610022ef jal x5,800081c0 +80005bb4: 80005ba4 .word 0x80005ba4 +80005bb8: 800164c2 .word 0x800164c2 +80005bbc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x83838383 +80005bc0: 00052383 lw x7,0(x10) +80005bc4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x83838383 +80005bc8: 00052803 lw x16,0(x10) +80005bcc: 00450513 addi x10,x10,4 + +80005bd0 : +Zkne_aes32esi_cg_cp_sbox_b131: + aes32esi x13, x7, x16, 0 # perform operation +80005bd0: 230386b3 aes32esi x13,x7,x16,0x0 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b131, Zkne_aes32esi_cg_cp_sbox_b131_str) +80005bd4: 000ea203 lw x4,0(x29) +80005bd8: 00d20863 beq x4,x13,80005be8 +80005bdc: 5e4022ef jal x5,800081c0 +80005be0: 80005bd0 .word 0x80005bd0 +80005be4: 800164fc .word 0x800164fc +80005be8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x84848484 +80005bec: 00052b83 lw x23,0(x10) +80005bf0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x84848484 +80005bf4: 00052403 lw x8,0(x10) +80005bf8: 00450513 addi x10,x10,4 + +80005bfc : +Zkne_aes32esi_cg_cp_sbox_b132: + aes32esi x27, x23, x8, 1 # perform operation +80005bfc: 628b8db3 aes32esi x27,x23,x8,0x1 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b132, Zkne_aes32esi_cg_cp_sbox_b132_str) +80005c00: 000ea203 lw x4,0(x29) +80005c04: 01b20863 beq x4,x27,80005c14 +80005c08: 5b8022ef jal x5,800081c0 +80005c0c: 80005bfc .word 0x80005bfc +80005c10: 80016536 .word 0x80016536 +80005c14: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x85858585 +80005c18: 00052e03 lw x28,0(x10) +80005c1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x85858585 +80005c20: 00052b03 lw x22,0(x10) +80005c24: 00450513 addi x10,x10,4 + +80005c28 : +Zkne_aes32esi_cg_cp_sbox_b133: + aes32esi x8, x28, x22, 3 # perform operation +80005c28: e36e0433 aes32esi x8,x28,x22,0x3 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b133, Zkne_aes32esi_cg_cp_sbox_b133_str) +80005c2c: 000ea203 lw x4,0(x29) +80005c30: 00820863 beq x4,x8,80005c40 +80005c34: 58c022ef jal x5,800081c0 +80005c38: 80005c28 .word 0x80005c28 +80005c3c: 80016570 .word 0x80016570 +80005c40: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x86868686 +80005c44: 00052c03 lw x24,0(x10) +80005c48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x86868686 +80005c4c: 00052083 lw x1,0(x10) +80005c50: 00450513 addi x10,x10,4 + +80005c54 : +Zkne_aes32esi_cg_cp_sbox_b134: + aes32esi x31, x24, x1, 2 # perform operation +80005c54: a21c0fb3 aes32esi x31,x24,x1,0x2 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b134, Zkne_aes32esi_cg_cp_sbox_b134_str) +80005c58: 000ea203 lw x4,0(x29) +80005c5c: 01f20863 beq x4,x31,80005c6c +80005c60: 560022ef jal x5,800081c0 +80005c64: 80005c54 .word 0x80005c54 +80005c68: 800165aa .word 0x800165aa +80005c6c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x87878787 +80005c70: 00052d03 lw x26,0(x10) +80005c74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x87878787 +80005c78: 00052603 lw x12,0(x10) +80005c7c: 00450513 addi x10,x10,4 + +80005c80 : +Zkne_aes32esi_cg_cp_sbox_b135: + aes32esi x27, x26, x12, 0 # perform operation +80005c80: 22cd0db3 aes32esi x27,x26,x12,0x0 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b135, Zkne_aes32esi_cg_cp_sbox_b135_str) +80005c84: 000ea203 lw x4,0(x29) +80005c88: 01b20863 beq x4,x27,80005c98 +80005c8c: 534022ef jal x5,800081c0 +80005c90: 80005c80 .word 0x80005c80 +80005c94: 800165e4 .word 0x800165e4 +80005c98: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x88888888 +80005c9c: 00052a83 lw x21,0(x10) +80005ca0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x88888888 +80005ca4: 00052083 lw x1,0(x10) +80005ca8: 00450513 addi x10,x10,4 + +80005cac : +Zkne_aes32esi_cg_cp_sbox_b136: + aes32esi x14, x21, x1, 1 # perform operation +80005cac: 621a8733 aes32esi x14,x21,x1,0x1 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b136, Zkne_aes32esi_cg_cp_sbox_b136_str) +80005cb0: 000ea203 lw x4,0(x29) +80005cb4: 00e20863 beq x4,x14,80005cc4 +80005cb8: 508022ef jal x5,800081c0 +80005cbc: 80005cac .word 0x80005cac +80005cc0: 8001661e .word 0x8001661e +80005cc4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x89898989 +80005cc8: 00052383 lw x7,0(x10) +80005ccc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x89898989 +80005cd0: 00052a03 lw x20,0(x10) +80005cd4: 00450513 addi x10,x10,4 + +80005cd8 : +Zkne_aes32esi_cg_cp_sbox_b137: + aes32esi x23, x7, x20, 2 # perform operation +80005cd8: a3438bb3 aes32esi x23,x7,x20,0x2 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b137, Zkne_aes32esi_cg_cp_sbox_b137_str) +80005cdc: 000ea203 lw x4,0(x29) +80005ce0: 01720863 beq x4,x23,80005cf0 +80005ce4: 4dc022ef jal x5,800081c0 +80005ce8: 80005cd8 .word 0x80005cd8 +80005cec: 80016658 .word 0x80016658 +80005cf0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8a8a8a8a +80005cf4: 00052d83 lw x27,0(x10) +80005cf8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8a8a8a8a +80005cfc: 00052783 lw x15,0(x10) +80005d00: 00450513 addi x10,x10,4 + +80005d04 : +Zkne_aes32esi_cg_cp_sbox_b138: + aes32esi x7, x27, x15, 2 # perform operation +80005d04: a2fd83b3 aes32esi x7,x27,x15,0x2 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b138, Zkne_aes32esi_cg_cp_sbox_b138_str) +80005d08: 000ea203 lw x4,0(x29) +80005d0c: 00720863 beq x4,x7,80005d1c +80005d10: 4b0022ef jal x5,800081c0 +80005d14: 80005d04 .word 0x80005d04 +80005d18: 80016692 .word 0x80016692 +80005d1c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8b8b8b8b +80005d20: 00052783 lw x15,0(x10) +80005d24: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x8b8b8b8b +80005d28: 00052703 lw x14,0(x10) +80005d2c: 00450513 addi x10,x10,4 + +80005d30 : +Zkne_aes32esi_cg_cp_sbox_b139: + aes32esi x21, x15, x14, 1 # perform operation +80005d30: 62e78ab3 aes32esi x21,x15,x14,0x1 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b139, Zkne_aes32esi_cg_cp_sbox_b139_str) +80005d34: 000ea203 lw x4,0(x29) +80005d38: 01520863 beq x4,x21,80005d48 +80005d3c: 484022ef jal x5,800081c0 +80005d40: 80005d30 .word 0x80005d30 +80005d44: 800166cc .word 0x800166cc +80005d48: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x8c8c8c8c +80005d4c: 00052583 lw x11,0(x10) +80005d50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8c8c8c8c +80005d54: 00052e03 lw x28,0(x10) +80005d58: 00450513 addi x10,x10,4 + +80005d5c : +Zkne_aes32esi_cg_cp_sbox_b140: + aes32esi x30, x11, x28, 1 # perform operation +80005d5c: 63c58f33 aes32esi x30,x11,x28,0x1 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b140, Zkne_aes32esi_cg_cp_sbox_b140_str) +80005d60: 000ea203 lw x4,0(x29) +80005d64: 01e20863 beq x4,x30,80005d74 +80005d68: 458022ef jal x5,800081c0 +80005d6c: 80005d5c .word 0x80005d5c +80005d70: 80016706 .word 0x80016706 +80005d74: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8d8d8d8d +80005d78: 00052d03 lw x26,0(x10) +80005d7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8d8d8d8d +80005d80: 00052d83 lw x27,0(x10) +80005d84: 00450513 addi x10,x10,4 + +80005d88 : +Zkne_aes32esi_cg_cp_sbox_b141: + aes32esi x20, x26, x27, 0 # perform operation +80005d88: 23bd0a33 aes32esi x20,x26,x27,0x0 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b141, Zkne_aes32esi_cg_cp_sbox_b141_str) +80005d8c: 000ea203 lw x4,0(x29) +80005d90: 01420863 beq x4,x20,80005da0 +80005d94: 42c022ef jal x5,800081c0 +80005d98: 80005d88 .word 0x80005d88 +80005d9c: 80016740 .word 0x80016740 +80005da0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x8e8e8e8e +80005da4: 00052803 lw x16,0(x10) +80005da8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8e8e8e8e +80005dac: 00052303 lw x6,0(x10) +80005db0: 00450513 addi x10,x10,4 + +80005db4 : +Zkne_aes32esi_cg_cp_sbox_b142: + aes32esi x12, x16, x6, 1 # perform operation +80005db4: 62680633 aes32esi x12,x16,x6,0x1 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b142, Zkne_aes32esi_cg_cp_sbox_b142_str) +80005db8: 000ea203 lw x4,0(x29) +80005dbc: 00c20863 beq x4,x12,80005dcc +80005dc0: 400022ef jal x5,800081c0 +80005dc4: 80005db4 .word 0x80005db4 +80005dc8: 8001677a .word 0x8001677a +80005dcc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x8f8f8f8f +80005dd0: 00052383 lw x7,0(x10) +80005dd4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8f8f8f8f +80005dd8: 00052a03 lw x20,0(x10) +80005ddc: 00450513 addi x10,x10,4 + +80005de0 : +Zkne_aes32esi_cg_cp_sbox_b143: + aes32esi x26, x7, x20, 3 # perform operation +80005de0: e3438d33 aes32esi x26,x7,x20,0x3 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b143, Zkne_aes32esi_cg_cp_sbox_b143_str) +80005de4: 000ea203 lw x4,0(x29) +80005de8: 01a20863 beq x4,x26,80005df8 +80005dec: 3d4022ef jal x5,800081c0 +80005df0: 80005de0 .word 0x80005de0 +80005df4: 800167b4 .word 0x800167b4 +80005df8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x90909090 +80005dfc: 00052c83 lw x25,0(x10) +80005e00: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x90909090 +80005e04: 00052d83 lw x27,0(x10) +80005e08: 00450513 addi x10,x10,4 + +80005e0c : +Zkne_aes32esi_cg_cp_sbox_b144: + aes32esi x9, x25, x27, 1 # perform operation +80005e0c: 63bc84b3 aes32esi x9,x25,x27,0x1 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zkne_aes32esi_cg_cp_sbox_b144, Zkne_aes32esi_cg_cp_sbox_b144_str) +80005e10: 000ea203 lw x4,0(x29) +80005e14: 00920863 beq x4,x9,80005e24 +80005e18: 3a8022ef jal x5,800081c0 +80005e1c: 80005e0c .word 0x80005e0c +80005e20: 800167ee .word 0x800167ee +80005e24: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x91919191 +80005e28: 00052a83 lw x21,0(x10) +80005e2c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x91919191 +80005e30: 00052783 lw x15,0(x10) +80005e34: 00450513 addi x10,x10,4 + +80005e38 : +Zkne_aes32esi_cg_cp_sbox_b145: + aes32esi x6, x21, x15, 2 # perform operation +80005e38: a2fa8333 aes32esi x6,x21,x15,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b145, Zkne_aes32esi_cg_cp_sbox_b145_str) +80005e3c: 000ea203 lw x4,0(x29) +80005e40: 00620863 beq x4,x6,80005e50 +80005e44: 37c022ef jal x5,800081c0 +80005e48: 80005e38 .word 0x80005e38 +80005e4c: 80016828 .word 0x80016828 +80005e50: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x92929292 +80005e54: 00052683 lw x13,0(x10) +80005e58: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x92929292 +80005e5c: 00052c83 lw x25,0(x10) +80005e60: 00450513 addi x10,x10,4 + +80005e64 : +Zkne_aes32esi_cg_cp_sbox_b146: + aes32esi x23, x13, x25, 0 # perform operation +80005e64: 23968bb3 aes32esi x23,x13,x25,0x0 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b146, Zkne_aes32esi_cg_cp_sbox_b146_str) +80005e68: 000ea203 lw x4,0(x29) +80005e6c: 01720863 beq x4,x23,80005e7c +80005e70: 350022ef jal x5,800081c0 +80005e74: 80005e64 .word 0x80005e64 +80005e78: 80016862 .word 0x80016862 +80005e7c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x93939393 +80005e80: 00052583 lw x11,0(x10) +80005e84: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x93939393 +80005e88: 00052083 lw x1,0(x10) +80005e8c: 00450513 addi x10,x10,4 + +80005e90 : +Zkne_aes32esi_cg_cp_sbox_b147: + aes32esi x21, x11, x1, 3 # perform operation +80005e90: e2158ab3 aes32esi x21,x11,x1,0x3 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b147, Zkne_aes32esi_cg_cp_sbox_b147_str) +80005e94: 000ea203 lw x4,0(x29) +80005e98: 01520863 beq x4,x21,80005ea8 +80005e9c: 324022ef jal x5,800081c0 +80005ea0: 80005e90 .word 0x80005e90 +80005ea4: 8001689c .word 0x8001689c +80005ea8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x94949494 +80005eac: 00052383 lw x7,0(x10) +80005eb0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x94949494 +80005eb4: 00052883 lw x17,0(x10) +80005eb8: 00450513 addi x10,x10,4 + +80005ebc : +Zkne_aes32esi_cg_cp_sbox_b148: + aes32esi x12, x7, x17, 0 # perform operation +80005ebc: 23138633 aes32esi x12,x7,x17,0x0 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b148, Zkne_aes32esi_cg_cp_sbox_b148_str) +80005ec0: 000ea203 lw x4,0(x29) +80005ec4: 00c20863 beq x4,x12,80005ed4 +80005ec8: 2f8022ef jal x5,800081c0 +80005ecc: 80005ebc .word 0x80005ebc +80005ed0: 800168d6 .word 0x800168d6 +80005ed4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x95959595 +80005ed8: 00052f03 lw x30,0(x10) +80005edc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x95959595 +80005ee0: 00052903 lw x18,0(x10) +80005ee4: 00450513 addi x10,x10,4 + +80005ee8 : +Zkne_aes32esi_cg_cp_sbox_b149: + aes32esi x28, x30, x18, 2 # perform operation +80005ee8: a32f0e33 aes32esi x28,x30,x18,0x2 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b149, Zkne_aes32esi_cg_cp_sbox_b149_str) +80005eec: 000ea203 lw x4,0(x29) +80005ef0: 01c20863 beq x4,x28,80005f00 +80005ef4: 2cc022ef jal x5,800081c0 +80005ef8: 80005ee8 .word 0x80005ee8 +80005efc: 80016910 .word 0x80016910 +80005f00: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x96969696 +80005f04: 00052d03 lw x26,0(x10) +80005f08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x96969696 +80005f0c: 00052d83 lw x27,0(x10) +80005f10: 00450513 addi x10,x10,4 + +80005f14 : +Zkne_aes32esi_cg_cp_sbox_b150: + aes32esi x11, x26, x27, 2 # perform operation +80005f14: a3bd05b3 aes32esi x11,x26,x27,0x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b150, Zkne_aes32esi_cg_cp_sbox_b150_str) +80005f18: 000ea203 lw x4,0(x29) +80005f1c: 00b20863 beq x4,x11,80005f2c +80005f20: 2a0022ef jal x5,800081c0 +80005f24: 80005f14 .word 0x80005f14 +80005f28: 8001694a .word 0x8001694a +80005f2c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x97979797 +80005f30: 00052083 lw x1,0(x10) +80005f34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x97979797 +80005f38: 00052703 lw x14,0(x10) +80005f3c: 00450513 addi x10,x10,4 + +80005f40 : +Zkne_aes32esi_cg_cp_sbox_b151: + aes32esi x21, x1, x14, 2 # perform operation +80005f40: a2e08ab3 aes32esi x21,x1,x14,0x2 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b151, Zkne_aes32esi_cg_cp_sbox_b151_str) +80005f44: 000ea203 lw x4,0(x29) +80005f48: 01520863 beq x4,x21,80005f58 +80005f4c: 274022ef jal x5,800081c0 +80005f50: 80005f40 .word 0x80005f40 +80005f54: 80016984 .word 0x80016984 +80005f58: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x98989898 +80005f5c: 00052a83 lw x21,0(x10) +80005f60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x98989898 +80005f64: 00052583 lw x11,0(x10) +80005f68: 00450513 addi x10,x10,4 + +80005f6c : +Zkne_aes32esi_cg_cp_sbox_b152: + aes32esi x1, x21, x11, 2 # perform operation +80005f6c: a2ba80b3 aes32esi x1,x21,x11,0x2 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b152, Zkne_aes32esi_cg_cp_sbox_b152_str) +80005f70: 000ea203 lw x4,0(x29) +80005f74: 00120863 beq x4,x1,80005f84 +80005f78: 248022ef jal x5,800081c0 +80005f7c: 80005f6c .word 0x80005f6c +80005f80: 800169be .word 0x800169be +80005f84: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x99999999 +80005f88: 00052983 lw x19,0(x10) +80005f8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x99999999 +80005f90: 00052483 lw x9,0(x10) +80005f94: 00450513 addi x10,x10,4 + +80005f98 : +Zkne_aes32esi_cg_cp_sbox_b153: + aes32esi x23, x19, x9, 0 # perform operation +80005f98: 22998bb3 aes32esi x23,x19,x9,0x0 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b153, Zkne_aes32esi_cg_cp_sbox_b153_str) +80005f9c: 000ea203 lw x4,0(x29) +80005fa0: 01720863 beq x4,x23,80005fb0 +80005fa4: 21c022ef jal x5,800081c0 +80005fa8: 80005f98 .word 0x80005f98 +80005fac: 800169f8 .word 0x800169f8 +80005fb0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x9a9a9a9a +80005fb4: 00052d83 lw x27,0(x10) +80005fb8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x9a9a9a9a +80005fbc: 00052683 lw x13,0(x10) +80005fc0: 00450513 addi x10,x10,4 + +80005fc4 : +Zkne_aes32esi_cg_cp_sbox_b154: + aes32esi x30, x27, x13, 1 # perform operation +80005fc4: 62dd8f33 aes32esi x30,x27,x13,0x1 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b154, Zkne_aes32esi_cg_cp_sbox_b154_str) +80005fc8: 000ea203 lw x4,0(x29) +80005fcc: 01e20863 beq x4,x30,80005fdc +80005fd0: 1f0022ef jal x5,800081c0 +80005fd4: 80005fc4 .word 0x80005fc4 +80005fd8: 80016a32 .word 0x80016a32 +80005fdc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x9b9b9b9b +80005fe0: 00052a83 lw x21,0(x10) +80005fe4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x9b9b9b9b +80005fe8: 00052d83 lw x27,0(x10) +80005fec: 00450513 addi x10,x10,4 + +80005ff0 : +Zkne_aes32esi_cg_cp_sbox_b155: + aes32esi x6, x21, x27, 0 # perform operation +80005ff0: 23ba8333 aes32esi x6,x21,x27,0x0 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b155, Zkne_aes32esi_cg_cp_sbox_b155_str) +80005ff4: 000ea203 lw x4,0(x29) +80005ff8: 00620863 beq x4,x6,80006008 +80005ffc: 1c4022ef jal x5,800081c0 +80006000: 80005ff0 .word 0x80005ff0 +80006004: 80016a6c .word 0x80016a6c +80006008: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x9c9c9c9c +8000600c: 00052d03 lw x26,0(x10) +80006010: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x9c9c9c9c +80006014: 00052a83 lw x21,0(x10) +80006018: 00450513 addi x10,x10,4 + +8000601c : +Zkne_aes32esi_cg_cp_sbox_b156: + aes32esi x19, x26, x21, 3 # perform operation +8000601c: e35d09b3 aes32esi x19,x26,x21,0x3 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b156, Zkne_aes32esi_cg_cp_sbox_b156_str) +80006020: 000ea203 lw x4,0(x29) +80006024: 01320863 beq x4,x19,80006034 +80006028: 198022ef jal x5,800081c0 +8000602c: 8000601c .word 0x8000601c +80006030: 80016aa6 .word 0x80016aa6 +80006034: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x9d9d9d9d +80006038: 00052703 lw x14,0(x10) +8000603c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x9d9d9d9d +80006040: 00052d03 lw x26,0(x10) +80006044: 00450513 addi x10,x10,4 + +80006048 : +Zkne_aes32esi_cg_cp_sbox_b157: + aes32esi x1, x14, x26, 3 # perform operation +80006048: e3a700b3 aes32esi x1,x14,x26,0x3 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b157, Zkne_aes32esi_cg_cp_sbox_b157_str) +8000604c: 000ea203 lw x4,0(x29) +80006050: 00120863 beq x4,x1,80006060 +80006054: 16c022ef jal x5,800081c0 +80006058: 80006048 .word 0x80006048 +8000605c: 80016ae0 .word 0x80016ae0 +80006060: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x9e9e9e9e +80006064: 00052a83 lw x21,0(x10) +80006068: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x9e9e9e9e +8000606c: 00052b83 lw x23,0(x10) +80006070: 00450513 addi x10,x10,4 + +80006074 : +Zkne_aes32esi_cg_cp_sbox_b158: + aes32esi x18, x21, x23, 0 # perform operation +80006074: 237a8933 aes32esi x18,x21,x23,0x0 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b158, Zkne_aes32esi_cg_cp_sbox_b158_str) +80006078: 000ea203 lw x4,0(x29) +8000607c: 01220863 beq x4,x18,8000608c +80006080: 140022ef jal x5,800081c0 +80006084: 80006074 .word 0x80006074 +80006088: 80016b1a .word 0x80016b1a +8000608c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x9f9f9f9f +80006090: 00052183 lw x3,0(x10) +80006094: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x9f9f9f9f +80006098: 00052d83 lw x27,0(x10) +8000609c: 00450513 addi x10,x10,4 + +800060a0 : +Zkne_aes32esi_cg_cp_sbox_b159: + aes32esi x25, x3, x27, 2 # perform operation +800060a0: a3b18cb3 aes32esi x25,x3,x27,0x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b159, Zkne_aes32esi_cg_cp_sbox_b159_str) +800060a4: 000ea203 lw x4,0(x29) +800060a8: 01920863 beq x4,x25,800060b8 +800060ac: 114022ef jal x5,800081c0 +800060b0: 800060a0 .word 0x800060a0 +800060b4: 80016b54 .word 0x80016b54 +800060b8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xa0a0a0a0 +800060bc: 00052e03 lw x28,0(x10) +800060c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xa0a0a0a0 +800060c4: 00052803 lw x16,0(x10) +800060c8: 00450513 addi x10,x10,4 + +800060cc : +Zkne_aes32esi_cg_cp_sbox_b160: + aes32esi x3, x28, x16, 1 # perform operation +800060cc: 630e01b3 aes32esi x3,x28,x16,0x1 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b160, Zkne_aes32esi_cg_cp_sbox_b160_str) +800060d0: 000ea203 lw x4,0(x29) +800060d4: 00320863 beq x4,x3,800060e4 +800060d8: 0e8022ef jal x5,800081c0 +800060dc: 800060cc .word 0x800060cc +800060e0: 80016b8e .word 0x80016b8e +800060e4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xa1a1a1a1 +800060e8: 00052603 lw x12,0(x10) +800060ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xa1a1a1a1 +800060f0: 00052483 lw x9,0(x10) +800060f4: 00450513 addi x10,x10,4 + +800060f8 : +Zkne_aes32esi_cg_cp_sbox_b161: + aes32esi x28, x12, x9, 2 # perform operation +800060f8: a2960e33 aes32esi x28,x12,x9,0x2 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b161, Zkne_aes32esi_cg_cp_sbox_b161_str) +800060fc: 000ea203 lw x4,0(x29) +80006100: 01c20863 beq x4,x28,80006110 +80006104: 0bc022ef jal x5,800081c0 +80006108: 800060f8 .word 0x800060f8 +8000610c: 80016bc8 .word 0x80016bc8 +80006110: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xa2a2a2a2 +80006114: 00052c03 lw x24,0(x10) +80006118: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xa2a2a2a2 +8000611c: 00052583 lw x11,0(x10) +80006120: 00450513 addi x10,x10,4 + +80006124 : +Zkne_aes32esi_cg_cp_sbox_b162: + aes32esi x3, x24, x11, 3 # perform operation +80006124: e2bc01b3 aes32esi x3,x24,x11,0x3 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b162, Zkne_aes32esi_cg_cp_sbox_b162_str) +80006128: 000ea203 lw x4,0(x29) +8000612c: 00320863 beq x4,x3,8000613c +80006130: 090022ef jal x5,800081c0 +80006134: 80006124 .word 0x80006124 +80006138: 80016c02 .word 0x80016c02 +8000613c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xa3a3a3a3 +80006140: 00052683 lw x13,0(x10) +80006144: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xa3a3a3a3 +80006148: 00052103 lw x2,0(x10) +8000614c: 00450513 addi x10,x10,4 + +80006150 : +Zkne_aes32esi_cg_cp_sbox_b163: + aes32esi x17, x13, x2, 2 # perform operation +80006150: a22688b3 aes32esi x17,x13,x2,0x2 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b163, Zkne_aes32esi_cg_cp_sbox_b163_str) +80006154: 000ea203 lw x4,0(x29) +80006158: 01120863 beq x4,x17,80006168 +8000615c: 064022ef jal x5,800081c0 +80006160: 80006150 .word 0x80006150 +80006164: 80016c3c .word 0x80016c3c +80006168: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xa4a4a4a4 +8000616c: 00052783 lw x15,0(x10) +80006170: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xa4a4a4a4 +80006174: 00052403 lw x8,0(x10) +80006178: 00450513 addi x10,x10,4 + +8000617c : +Zkne_aes32esi_cg_cp_sbox_b164: + aes32esi x3, x15, x8, 0 # perform operation +8000617c: 228781b3 aes32esi x3,x15,x8,0x0 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b164, Zkne_aes32esi_cg_cp_sbox_b164_str) +80006180: 000ea203 lw x4,0(x29) +80006184: 00320863 beq x4,x3,80006194 +80006188: 038022ef jal x5,800081c0 +8000618c: 8000617c .word 0x8000617c +80006190: 80016c76 .word 0x80016c76 +80006194: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xa5a5a5a5 +80006198: 00052a03 lw x20,0(x10) +8000619c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xa5a5a5a5 +800061a0: 00052303 lw x6,0(x10) +800061a4: 00450513 addi x10,x10,4 + +800061a8 : +Zkne_aes32esi_cg_cp_sbox_b165: + aes32esi x16, x20, x6, 0 # perform operation +800061a8: 226a0833 aes32esi x16,x20,x6,0x0 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b165, Zkne_aes32esi_cg_cp_sbox_b165_str) +800061ac: 000ea203 lw x4,0(x29) +800061b0: 01020863 beq x4,x16,800061c0 +800061b4: 00c022ef jal x5,800081c0 +800061b8: 800061a8 .word 0x800061a8 +800061bc: 80016cb0 .word 0x80016cb0 +800061c0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xa6a6a6a6 +800061c4: 00052883 lw x17,0(x10) +800061c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xa6a6a6a6 +800061cc: 00052703 lw x14,0(x10) +800061d0: 00450513 addi x10,x10,4 + +800061d4 : +Zkne_aes32esi_cg_cp_sbox_b166: + aes32esi x9, x17, x14, 1 # perform operation +800061d4: 62e884b3 aes32esi x9,x17,x14,0x1 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zkne_aes32esi_cg_cp_sbox_b166, Zkne_aes32esi_cg_cp_sbox_b166_str) +800061d8: 000ea203 lw x4,0(x29) +800061dc: 00920863 beq x4,x9,800061ec +800061e0: 7e1012ef jal x5,800081c0 +800061e4: 800061d4 .word 0x800061d4 +800061e8: 80016cea .word 0x80016cea +800061ec: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xa7a7a7a7 +800061f0: 00052c03 lw x24,0(x10) +800061f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xa7a7a7a7 +800061f8: 00052703 lw x14,0(x10) +800061fc: 00450513 addi x10,x10,4 + +80006200 : +Zkne_aes32esi_cg_cp_sbox_b167: + aes32esi x25, x24, x14, 1 # perform operation +80006200: 62ec0cb3 aes32esi x25,x24,x14,0x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b167, Zkne_aes32esi_cg_cp_sbox_b167_str) +80006204: 000ea203 lw x4,0(x29) +80006208: 01920863 beq x4,x25,80006218 +8000620c: 7b5012ef jal x5,800081c0 +80006210: 80006200 .word 0x80006200 +80006214: 80016d24 .word 0x80016d24 +80006218: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xa8a8a8a8 +8000621c: 00052303 lw x6,0(x10) +80006220: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xa8a8a8a8 +80006224: 00052c03 lw x24,0(x10) +80006228: 00450513 addi x10,x10,4 + +8000622c : +Zkne_aes32esi_cg_cp_sbox_b168: + aes32esi x14, x6, x24, 0 # perform operation +8000622c: 23830733 aes32esi x14,x6,x24,0x0 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b168, Zkne_aes32esi_cg_cp_sbox_b168_str) +80006230: 000ea203 lw x4,0(x29) +80006234: 00e20863 beq x4,x14,80006244 +80006238: 789012ef jal x5,800081c0 +8000623c: 8000622c .word 0x8000622c +80006240: 80016d5e .word 0x80016d5e +80006244: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xa9a9a9a9 +80006248: 00052f03 lw x30,0(x10) +8000624c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xa9a9a9a9 +80006250: 00052f83 lw x31,0(x10) +80006254: 00450513 addi x10,x10,4 + +80006258 : +Zkne_aes32esi_cg_cp_sbox_b169: + aes32esi x28, x30, x31, 2 # perform operation +80006258: a3ff0e33 aes32esi x28,x30,x31,0x2 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b169, Zkne_aes32esi_cg_cp_sbox_b169_str) +8000625c: 000ea203 lw x4,0(x29) +80006260: 01c20863 beq x4,x28,80006270 +80006264: 75d012ef jal x5,800081c0 +80006268: 80006258 .word 0x80006258 +8000626c: 80016d98 .word 0x80016d98 +80006270: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xaaaaaaaa +80006274: 00052583 lw x11,0(x10) +80006278: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xaaaaaaaa +8000627c: 00052783 lw x15,0(x10) +80006280: 00450513 addi x10,x10,4 + +80006284 : +Zkne_aes32esi_cg_cp_sbox_b170: + aes32esi x7, x11, x15, 3 # perform operation +80006284: e2f583b3 aes32esi x7,x11,x15,0x3 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b170, Zkne_aes32esi_cg_cp_sbox_b170_str) +80006288: 000ea203 lw x4,0(x29) +8000628c: 00720863 beq x4,x7,8000629c +80006290: 731012ef jal x5,800081c0 +80006294: 80006284 .word 0x80006284 +80006298: 80016dd2 .word 0x80016dd2 +8000629c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xabababab +800062a0: 00052683 lw x13,0(x10) +800062a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xabababab +800062a8: 00052b03 lw x22,0(x10) +800062ac: 00450513 addi x10,x10,4 + +800062b0 : +Zkne_aes32esi_cg_cp_sbox_b171: + aes32esi x30, x13, x22, 2 # perform operation +800062b0: a3668f33 aes32esi x30,x13,x22,0x2 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b171, Zkne_aes32esi_cg_cp_sbox_b171_str) +800062b4: 000ea203 lw x4,0(x29) +800062b8: 01e20863 beq x4,x30,800062c8 +800062bc: 705012ef jal x5,800081c0 +800062c0: 800062b0 .word 0x800062b0 +800062c4: 80016e0c .word 0x80016e0c +800062c8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xacacacac +800062cc: 00052383 lw x7,0(x10) +800062d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xacacacac +800062d4: 00052703 lw x14,0(x10) +800062d8: 00450513 addi x10,x10,4 + +800062dc : +Zkne_aes32esi_cg_cp_sbox_b172: + aes32esi x16, x7, x14, 1 # perform operation +800062dc: 62e38833 aes32esi x16,x7,x14,0x1 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b172, Zkne_aes32esi_cg_cp_sbox_b172_str) +800062e0: 000ea203 lw x4,0(x29) +800062e4: 01020863 beq x4,x16,800062f4 +800062e8: 6d9012ef jal x5,800081c0 +800062ec: 800062dc .word 0x800062dc +800062f0: 80016e46 .word 0x80016e46 +800062f4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xadadadad +800062f8: 00052a83 lw x21,0(x10) +800062fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xadadadad +80006300: 00052883 lw x17,0(x10) +80006304: 00450513 addi x10,x10,4 + +80006308 : +Zkne_aes32esi_cg_cp_sbox_b173: + aes32esi x20, x21, x17, 1 # perform operation +80006308: 631a8a33 aes32esi x20,x21,x17,0x1 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b173, Zkne_aes32esi_cg_cp_sbox_b173_str) +8000630c: 000ea203 lw x4,0(x29) +80006310: 01420863 beq x4,x20,80006320 +80006314: 6ad012ef jal x5,800081c0 +80006318: 80006308 .word 0x80006308 +8000631c: 80016e80 .word 0x80016e80 +80006320: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xaeaeaeae +80006324: 00052483 lw x9,0(x10) +80006328: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaeaeaeae +8000632c: 00052383 lw x7,0(x10) +80006330: 00450513 addi x10,x10,4 + +80006334 : +Zkne_aes32esi_cg_cp_sbox_b174: + aes32esi x16, x9, x7, 3 # perform operation +80006334: e2748833 aes32esi x16,x9,x7,0x3 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b174, Zkne_aes32esi_cg_cp_sbox_b174_str) +80006338: 000ea203 lw x4,0(x29) +8000633c: 01020863 beq x4,x16,8000634c +80006340: 681012ef jal x5,800081c0 +80006344: 80006334 .word 0x80006334 +80006348: 80016eba .word 0x80016eba +8000634c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xafafafaf +80006350: 00052103 lw x2,0(x10) +80006354: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xafafafaf +80006358: 00052b03 lw x22,0(x10) +8000635c: 00450513 addi x10,x10,4 + +80006360 : +Zkne_aes32esi_cg_cp_sbox_b175: + aes32esi x12, x2, x22, 3 # perform operation +80006360: e3610633 aes32esi x12,x2,x22,0x3 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b175, Zkne_aes32esi_cg_cp_sbox_b175_str) +80006364: 000ea203 lw x4,0(x29) +80006368: 00c20863 beq x4,x12,80006378 +8000636c: 655012ef jal x5,800081c0 +80006370: 80006360 .word 0x80006360 +80006374: 80016ef4 .word 0x80016ef4 +80006378: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xb0b0b0b0 +8000637c: 00052783 lw x15,0(x10) +80006380: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xb0b0b0b0 +80006384: 00052b03 lw x22,0(x10) +80006388: 00450513 addi x10,x10,4 + +8000638c : +Zkne_aes32esi_cg_cp_sbox_b176: + aes32esi x3, x15, x22, 3 # perform operation +8000638c: e36781b3 aes32esi x3,x15,x22,0x3 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b176, Zkne_aes32esi_cg_cp_sbox_b176_str) +80006390: 000ea203 lw x4,0(x29) +80006394: 00320863 beq x4,x3,800063a4 +80006398: 629012ef jal x5,800081c0 +8000639c: 8000638c .word 0x8000638c +800063a0: 80016f2e .word 0x80016f2e +800063a4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xb1b1b1b1 +800063a8: 00052083 lw x1,0(x10) +800063ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xb1b1b1b1 +800063b0: 00052183 lw x3,0(x10) +800063b4: 00450513 addi x10,x10,4 + +800063b8 : +Zkne_aes32esi_cg_cp_sbox_b177: + aes32esi x25, x1, x3, 1 # perform operation +800063b8: 62308cb3 aes32esi x25,x1,x3,0x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b177, Zkne_aes32esi_cg_cp_sbox_b177_str) +800063bc: 000ea203 lw x4,0(x29) +800063c0: 01920863 beq x4,x25,800063d0 +800063c4: 5fd012ef jal x5,800081c0 +800063c8: 800063b8 .word 0x800063b8 +800063cc: 80016f68 .word 0x80016f68 +800063d0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xb2b2b2b2 +800063d4: 00052703 lw x14,0(x10) +800063d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xb2b2b2b2 +800063dc: 00052903 lw x18,0(x10) +800063e0: 00450513 addi x10,x10,4 + +800063e4 : +Zkne_aes32esi_cg_cp_sbox_b178: + aes32esi x13, x14, x18, 2 # perform operation +800063e4: a32706b3 aes32esi x13,x14,x18,0x2 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b178, Zkne_aes32esi_cg_cp_sbox_b178_str) +800063e8: 000ea203 lw x4,0(x29) +800063ec: 00d20863 beq x4,x13,800063fc +800063f0: 5d1012ef jal x5,800081c0 +800063f4: 800063e4 .word 0x800063e4 +800063f8: 80016fa2 .word 0x80016fa2 +800063fc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xb3b3b3b3 +80006400: 00052383 lw x7,0(x10) +80006404: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xb3b3b3b3 +80006408: 00052a03 lw x20,0(x10) +8000640c: 00450513 addi x10,x10,4 + +80006410 : +Zkne_aes32esi_cg_cp_sbox_b179: + aes32esi x22, x7, x20, 2 # perform operation +80006410: a3438b33 aes32esi x22,x7,x20,0x2 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b179, Zkne_aes32esi_cg_cp_sbox_b179_str) +80006414: 000ea203 lw x4,0(x29) +80006418: 01620863 beq x4,x22,80006428 +8000641c: 5a5012ef jal x5,800081c0 +80006420: 80006410 .word 0x80006410 +80006424: 80016fdc .word 0x80016fdc +80006428: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xb4b4b4b4 +8000642c: 00052b03 lw x22,0(x10) +80006430: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xb4b4b4b4 +80006434: 00052f83 lw x31,0(x10) +80006438: 00450513 addi x10,x10,4 + +8000643c : +Zkne_aes32esi_cg_cp_sbox_b180: + aes32esi x28, x22, x31, 3 # perform operation +8000643c: e3fb0e33 aes32esi x28,x22,x31,0x3 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b180, Zkne_aes32esi_cg_cp_sbox_b180_str) +80006440: 000ea203 lw x4,0(x29) +80006444: 01c20863 beq x4,x28,80006454 +80006448: 579012ef jal x5,800081c0 +8000644c: 8000643c .word 0x8000643c +80006450: 80017016 .word 0x80017016 +80006454: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xb5b5b5b5 +80006458: 00052f03 lw x30,0(x10) +8000645c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xb5b5b5b5 +80006460: 00052b03 lw x22,0(x10) +80006464: 00450513 addi x10,x10,4 + +80006468 : +Zkne_aes32esi_cg_cp_sbox_b181: + aes32esi x12, x30, x22, 1 # perform operation +80006468: 636f0633 aes32esi x12,x30,x22,0x1 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b181, Zkne_aes32esi_cg_cp_sbox_b181_str) +8000646c: 000ea203 lw x4,0(x29) +80006470: 00c20863 beq x4,x12,80006480 +80006474: 54d012ef jal x5,800081c0 +80006478: 80006468 .word 0x80006468 +8000647c: 80017050 .word 0x80017050 +80006480: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xb6b6b6b6 +80006484: 00052583 lw x11,0(x10) +80006488: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xb6b6b6b6 +8000648c: 00052483 lw x9,0(x10) +80006490: 00450513 addi x10,x10,4 + +80006494 : +Zkne_aes32esi_cg_cp_sbox_b182: + aes32esi x1, x11, x9, 2 # perform operation +80006494: a29580b3 aes32esi x1,x11,x9,0x2 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b182, Zkne_aes32esi_cg_cp_sbox_b182_str) +80006498: 000ea203 lw x4,0(x29) +8000649c: 00120863 beq x4,x1,800064ac +800064a0: 521012ef jal x5,800081c0 +800064a4: 80006494 .word 0x80006494 +800064a8: 8001708a .word 0x8001708a +800064ac: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xb7b7b7b7 +800064b0: 00052f03 lw x30,0(x10) +800064b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xb7b7b7b7 +800064b8: 00052d03 lw x26,0(x10) +800064bc: 00450513 addi x10,x10,4 + +800064c0 : +Zkne_aes32esi_cg_cp_sbox_b183: + aes32esi x15, x30, x26, 0 # perform operation +800064c0: 23af07b3 aes32esi x15,x30,x26,0x0 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b183, Zkne_aes32esi_cg_cp_sbox_b183_str) +800064c4: 000ea203 lw x4,0(x29) +800064c8: 00f20863 beq x4,x15,800064d8 +800064cc: 4f5012ef jal x5,800081c0 +800064d0: 800064c0 .word 0x800064c0 +800064d4: 800170c4 .word 0x800170c4 +800064d8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xb8b8b8b8 +800064dc: 00052803 lw x16,0(x10) +800064e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xb8b8b8b8 +800064e4: 00052e03 lw x28,0(x10) +800064e8: 00450513 addi x10,x10,4 + +800064ec : +Zkne_aes32esi_cg_cp_sbox_b184: + aes32esi x22, x16, x28, 3 # perform operation +800064ec: e3c80b33 aes32esi x22,x16,x28,0x3 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b184, Zkne_aes32esi_cg_cp_sbox_b184_str) +800064f0: 000ea203 lw x4,0(x29) +800064f4: 01620863 beq x4,x22,80006504 +800064f8: 4c9012ef jal x5,800081c0 +800064fc: 800064ec .word 0x800064ec +80006500: 800170fe .word 0x800170fe +80006504: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xb9b9b9b9 +80006508: 00052983 lw x19,0(x10) +8000650c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xb9b9b9b9 +80006510: 00052a83 lw x21,0(x10) +80006514: 00450513 addi x10,x10,4 + +80006518 : +Zkne_aes32esi_cg_cp_sbox_b185: + aes32esi x27, x19, x21, 2 # perform operation +80006518: a3598db3 aes32esi x27,x19,x21,0x2 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b185, Zkne_aes32esi_cg_cp_sbox_b185_str) +8000651c: 000ea203 lw x4,0(x29) +80006520: 01b20863 beq x4,x27,80006530 +80006524: 49d012ef jal x5,800081c0 +80006528: 80006518 .word 0x80006518 +8000652c: 80017138 .word 0x80017138 +80006530: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xbabababa +80006534: 00052803 lw x16,0(x10) +80006538: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xbabababa +8000653c: 00052983 lw x19,0(x10) +80006540: 00450513 addi x10,x10,4 + +80006544 : +Zkne_aes32esi_cg_cp_sbox_b186: + aes32esi x21, x16, x19, 3 # perform operation +80006544: e3380ab3 aes32esi x21,x16,x19,0x3 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b186, Zkne_aes32esi_cg_cp_sbox_b186_str) +80006548: 000ea203 lw x4,0(x29) +8000654c: 01520863 beq x4,x21,8000655c +80006550: 471012ef jal x5,800081c0 +80006554: 80006544 .word 0x80006544 +80006558: 80017172 .word 0x80017172 +8000655c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xbbbbbbbb +80006560: 00052303 lw x6,0(x10) +80006564: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xbbbbbbbb +80006568: 00052083 lw x1,0(x10) +8000656c: 00450513 addi x10,x10,4 + +80006570 : +Zkne_aes32esi_cg_cp_sbox_b187: + aes32esi x28, x6, x1, 1 # perform operation +80006570: 62130e33 aes32esi x28,x6,x1,0x1 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b187, Zkne_aes32esi_cg_cp_sbox_b187_str) +80006574: 000ea203 lw x4,0(x29) +80006578: 01c20863 beq x4,x28,80006588 +8000657c: 445012ef jal x5,800081c0 +80006580: 80006570 .word 0x80006570 +80006584: 800171ac .word 0x800171ac +80006588: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xbcbcbcbc +8000658c: 00052d03 lw x26,0(x10) +80006590: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xbcbcbcbc +80006594: 00052e03 lw x28,0(x10) +80006598: 00450513 addi x10,x10,4 + +8000659c : +Zkne_aes32esi_cg_cp_sbox_b188: + aes32esi x31, x26, x28, 3 # perform operation +8000659c: e3cd0fb3 aes32esi x31,x26,x28,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b188, Zkne_aes32esi_cg_cp_sbox_b188_str) +800065a0: 000ea203 lw x4,0(x29) +800065a4: 01f20863 beq x4,x31,800065b4 +800065a8: 419012ef jal x5,800081c0 +800065ac: 8000659c .word 0x8000659c +800065b0: 800171e6 .word 0x800171e6 +800065b4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xbdbdbdbd +800065b8: 00052603 lw x12,0(x10) +800065bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xbdbdbdbd +800065c0: 00052183 lw x3,0(x10) +800065c4: 00450513 addi x10,x10,4 + +800065c8 : +Zkne_aes32esi_cg_cp_sbox_b189: + aes32esi x21, x12, x3, 2 # perform operation +800065c8: a2360ab3 aes32esi x21,x12,x3,0x2 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b189, Zkne_aes32esi_cg_cp_sbox_b189_str) +800065cc: 000ea203 lw x4,0(x29) +800065d0: 01520863 beq x4,x21,800065e0 +800065d4: 3ed012ef jal x5,800081c0 +800065d8: 800065c8 .word 0x800065c8 +800065dc: 80017220 .word 0x80017220 +800065e0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xbebebebe +800065e4: 00052a03 lw x20,0(x10) +800065e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xbebebebe +800065ec: 00052b03 lw x22,0(x10) +800065f0: 00450513 addi x10,x10,4 + +800065f4 : +Zkne_aes32esi_cg_cp_sbox_b190: + aes32esi x3, x20, x22, 2 # perform operation +800065f4: a36a01b3 aes32esi x3,x20,x22,0x2 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b190, Zkne_aes32esi_cg_cp_sbox_b190_str) +800065f8: 000ea203 lw x4,0(x29) +800065fc: 00320863 beq x4,x3,8000660c +80006600: 3c1012ef jal x5,800081c0 +80006604: 800065f4 .word 0x800065f4 +80006608: 8001725a .word 0x8001725a +8000660c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xbfbfbfbf +80006610: 00052c83 lw x25,0(x10) +80006614: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xbfbfbfbf +80006618: 00052383 lw x7,0(x10) +8000661c: 00450513 addi x10,x10,4 + +80006620 : +Zkne_aes32esi_cg_cp_sbox_b191: + aes32esi x8, x25, x7, 2 # perform operation +80006620: a27c8433 aes32esi x8,x25,x7,0x2 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b191, Zkne_aes32esi_cg_cp_sbox_b191_str) +80006624: 000ea203 lw x4,0(x29) +80006628: 00820863 beq x4,x8,80006638 +8000662c: 395012ef jal x5,800081c0 +80006630: 80006620 .word 0x80006620 +80006634: 80017294 .word 0x80017294 +80006638: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xc0c0c0c0 +8000663c: 00052103 lw x2,0(x10) +80006640: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xc0c0c0c0 +80006644: 00052a03 lw x20,0(x10) +80006648: 00450513 addi x10,x10,4 + +8000664c : +Zkne_aes32esi_cg_cp_sbox_b192: + aes32esi x11, x2, x20, 3 # perform operation +8000664c: e34105b3 aes32esi x11,x2,x20,0x3 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zkne_aes32esi_cg_cp_sbox_b192, Zkne_aes32esi_cg_cp_sbox_b192_str) +80006650: 000ea203 lw x4,0(x29) +80006654: 00b20863 beq x4,x11,80006664 +80006658: 369012ef jal x5,800081c0 +8000665c: 8000664c .word 0x8000664c +80006660: 800172ce .word 0x800172ce +80006664: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xc1c1c1c1 +80006668: 00052f03 lw x30,0(x10) +8000666c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xc1c1c1c1 +80006670: 00052883 lw x17,0(x10) +80006674: 00450513 addi x10,x10,4 + +80006678 : +Zkne_aes32esi_cg_cp_sbox_b193: + aes32esi x2, x30, x17, 2 # perform operation +80006678: a31f0133 aes32esi x2,x30,x17,0x2 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b193, Zkne_aes32esi_cg_cp_sbox_b193_str) +8000667c: 000ea203 lw x4,0(x29) +80006680: 00220863 beq x4,x2,80006690 +80006684: 33d012ef jal x5,800081c0 +80006688: 80006678 .word 0x80006678 +8000668c: 80017308 .word 0x80017308 +80006690: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xc2c2c2c2 +80006694: 00052083 lw x1,0(x10) +80006698: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xc2c2c2c2 +8000669c: 00052c83 lw x25,0(x10) +800066a0: 00450513 addi x10,x10,4 + +800066a4 : +Zkne_aes32esi_cg_cp_sbox_b194: + aes32esi x16, x1, x25, 3 # perform operation +800066a4: e3908833 aes32esi x16,x1,x25,0x3 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b194, Zkne_aes32esi_cg_cp_sbox_b194_str) +800066a8: 000ea203 lw x4,0(x29) +800066ac: 01020863 beq x4,x16,800066bc +800066b0: 311012ef jal x5,800081c0 +800066b4: 800066a4 .word 0x800066a4 +800066b8: 80017342 .word 0x80017342 +800066bc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xc3c3c3c3 +800066c0: 00052583 lw x11,0(x10) +800066c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xc3c3c3c3 +800066c8: 00052683 lw x13,0(x10) +800066cc: 00450513 addi x10,x10,4 + +800066d0 : +Zkne_aes32esi_cg_cp_sbox_b195: + aes32esi x12, x11, x13, 0 # perform operation +800066d0: 22d58633 aes32esi x12,x11,x13,0x0 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b195, Zkne_aes32esi_cg_cp_sbox_b195_str) +800066d4: 000ea203 lw x4,0(x29) +800066d8: 00c20863 beq x4,x12,800066e8 +800066dc: 2e5012ef jal x5,800081c0 +800066e0: 800066d0 .word 0x800066d0 +800066e4: 8001737c .word 0x8001737c +800066e8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xc4c4c4c4 +800066ec: 00052683 lw x13,0(x10) +800066f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xc4c4c4c4 +800066f4: 00052903 lw x18,0(x10) +800066f8: 00450513 addi x10,x10,4 + +800066fc : +Zkne_aes32esi_cg_cp_sbox_b196: + aes32esi x31, x13, x18, 0 # perform operation +800066fc: 23268fb3 aes32esi x31,x13,x18,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b196, Zkne_aes32esi_cg_cp_sbox_b196_str) +80006700: 000ea203 lw x4,0(x29) +80006704: 01f20863 beq x4,x31,80006714 +80006708: 2b9012ef jal x5,800081c0 +8000670c: 800066fc .word 0x800066fc +80006710: 800173b6 .word 0x800173b6 +80006714: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xc5c5c5c5 +80006718: 00052703 lw x14,0(x10) +8000671c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xc5c5c5c5 +80006720: 00052903 lw x18,0(x10) +80006724: 00450513 addi x10,x10,4 + +80006728 : +Zkne_aes32esi_cg_cp_sbox_b197: + aes32esi x15, x14, x18, 2 # perform operation +80006728: a32707b3 aes32esi x15,x14,x18,0x2 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b197, Zkne_aes32esi_cg_cp_sbox_b197_str) +8000672c: 000ea203 lw x4,0(x29) +80006730: 00f20863 beq x4,x15,80006740 +80006734: 28d012ef jal x5,800081c0 +80006738: 80006728 .word 0x80006728 +8000673c: 800173f0 .word 0x800173f0 +80006740: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xc6c6c6c6 +80006744: 00052303 lw x6,0(x10) +80006748: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xc6c6c6c6 +8000674c: 00052703 lw x14,0(x10) +80006750: 00450513 addi x10,x10,4 + +80006754 : +Zkne_aes32esi_cg_cp_sbox_b198: + aes32esi x28, x6, x14, 3 # perform operation +80006754: e2e30e33 aes32esi x28,x6,x14,0x3 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b198, Zkne_aes32esi_cg_cp_sbox_b198_str) +80006758: 000ea203 lw x4,0(x29) +8000675c: 01c20863 beq x4,x28,8000676c +80006760: 261012ef jal x5,800081c0 +80006764: 80006754 .word 0x80006754 +80006768: 8001742a .word 0x8001742a +8000676c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xc7c7c7c7 +80006770: 00052f03 lw x30,0(x10) +80006774: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xc7c7c7c7 +80006778: 00052403 lw x8,0(x10) +8000677c: 00450513 addi x10,x10,4 + +80006780 : +Zkne_aes32esi_cg_cp_sbox_b199: + aes32esi x3, x30, x8, 0 # perform operation +80006780: 228f01b3 aes32esi x3,x30,x8,0x0 + # Check if x3 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x3, Zkne_aes32esi_cg_cp_sbox_b199, Zkne_aes32esi_cg_cp_sbox_b199_str) +80006784: 000ea203 lw x4,0(x29) +80006788: 00320863 beq x4,x3,80006798 +8000678c: 235012ef jal x5,800081c0 +80006790: 80006780 .word 0x80006780 +80006794: 80017464 .word 0x80017464 +80006798: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xc8c8c8c8 +8000679c: 00052d83 lw x27,0(x10) +800067a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xc8c8c8c8 +800067a4: 00052903 lw x18,0(x10) +800067a8: 00450513 addi x10,x10,4 + +800067ac : +Zkne_aes32esi_cg_cp_sbox_b200: + aes32esi x2, x27, x18, 1 # perform operation +800067ac: 632d8133 aes32esi x2,x27,x18,0x1 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b200, Zkne_aes32esi_cg_cp_sbox_b200_str) +800067b0: 000ea203 lw x4,0(x29) +800067b4: 00220863 beq x4,x2,800067c4 +800067b8: 209012ef jal x5,800081c0 +800067bc: 800067ac .word 0x800067ac +800067c0: 8001749e .word 0x8001749e +800067c4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xc9c9c9c9 +800067c8: 00052c83 lw x25,0(x10) +800067cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xc9c9c9c9 +800067d0: 00052683 lw x13,0(x10) +800067d4: 00450513 addi x10,x10,4 + +800067d8 : +Zkne_aes32esi_cg_cp_sbox_b201: + aes32esi x19, x25, x13, 1 # perform operation +800067d8: 62dc89b3 aes32esi x19,x25,x13,0x1 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b201, Zkne_aes32esi_cg_cp_sbox_b201_str) +800067dc: 000ea203 lw x4,0(x29) +800067e0: 01320863 beq x4,x19,800067f0 +800067e4: 1dd012ef jal x5,800081c0 +800067e8: 800067d8 .word 0x800067d8 +800067ec: 800174d8 .word 0x800174d8 +800067f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xcacacaca +800067f4: 00052903 lw x18,0(x10) +800067f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xcacacaca +800067fc: 00052a83 lw x21,0(x10) +80006800: 00450513 addi x10,x10,4 + +80006804 : +Zkne_aes32esi_cg_cp_sbox_b202: + aes32esi x31, x18, x21, 3 # perform operation +80006804: e3590fb3 aes32esi x31,x18,x21,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b202, Zkne_aes32esi_cg_cp_sbox_b202_str) +80006808: 000ea203 lw x4,0(x29) +8000680c: 01f20863 beq x4,x31,8000681c +80006810: 1b1012ef jal x5,800081c0 +80006814: 80006804 .word 0x80006804 +80006818: 80017512 .word 0x80017512 +8000681c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xcbcbcbcb +80006820: 00052883 lw x17,0(x10) +80006824: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xcbcbcbcb +80006828: 00052b03 lw x22,0(x10) +8000682c: 00450513 addi x10,x10,4 + +80006830 : +Zkne_aes32esi_cg_cp_sbox_b203: + aes32esi x20, x17, x22, 3 # perform operation +80006830: e3688a33 aes32esi x20,x17,x22,0x3 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b203, Zkne_aes32esi_cg_cp_sbox_b203_str) +80006834: 000ea203 lw x4,0(x29) +80006838: 01420863 beq x4,x20,80006848 +8000683c: 185012ef jal x5,800081c0 +80006840: 80006830 .word 0x80006830 +80006844: 8001754c .word 0x8001754c +80006848: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xcccccccc +8000684c: 00052383 lw x7,0(x10) +80006850: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xcccccccc +80006854: 00052a03 lw x20,0(x10) +80006858: 00450513 addi x10,x10,4 + +8000685c : +Zkne_aes32esi_cg_cp_sbox_b204: + aes32esi x30, x7, x20, 0 # perform operation +8000685c: 23438f33 aes32esi x30,x7,x20,0x0 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b204, Zkne_aes32esi_cg_cp_sbox_b204_str) +80006860: 000ea203 lw x4,0(x29) +80006864: 01e20863 beq x4,x30,80006874 +80006868: 159012ef jal x5,800081c0 +8000686c: 8000685c .word 0x8000685c +80006870: 80017586 .word 0x80017586 +80006874: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xcdcdcdcd +80006878: 00052c03 lw x24,0(x10) +8000687c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xcdcdcdcd +80006880: 00052a83 lw x21,0(x10) +80006884: 00450513 addi x10,x10,4 + +80006888 : +Zkne_aes32esi_cg_cp_sbox_b205: + aes32esi x7, x24, x21, 3 # perform operation +80006888: e35c03b3 aes32esi x7,x24,x21,0x3 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b205, Zkne_aes32esi_cg_cp_sbox_b205_str) +8000688c: 000ea203 lw x4,0(x29) +80006890: 00720863 beq x4,x7,800068a0 +80006894: 12d012ef jal x5,800081c0 +80006898: 80006888 .word 0x80006888 +8000689c: 800175c0 .word 0x800175c0 +800068a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xcececece +800068a4: 00052303 lw x6,0(x10) +800068a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xcececece +800068ac: 00052883 lw x17,0(x10) +800068b0: 00450513 addi x10,x10,4 + +800068b4 : +Zkne_aes32esi_cg_cp_sbox_b206: + aes32esi x19, x6, x17, 0 # perform operation +800068b4: 231309b3 aes32esi x19,x6,x17,0x0 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b206, Zkne_aes32esi_cg_cp_sbox_b206_str) +800068b8: 000ea203 lw x4,0(x29) +800068bc: 01320863 beq x4,x19,800068cc +800068c0: 101012ef jal x5,800081c0 +800068c4: 800068b4 .word 0x800068b4 +800068c8: 800175fa .word 0x800175fa +800068cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xcfcfcfcf +800068d0: 00052683 lw x13,0(x10) +800068d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xcfcfcfcf +800068d8: 00052983 lw x19,0(x10) +800068dc: 00450513 addi x10,x10,4 + +800068e0 : +Zkne_aes32esi_cg_cp_sbox_b207: + aes32esi x16, x13, x19, 0 # perform operation +800068e0: 23368833 aes32esi x16,x13,x19,0x0 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b207, Zkne_aes32esi_cg_cp_sbox_b207_str) +800068e4: 000ea203 lw x4,0(x29) +800068e8: 01020863 beq x4,x16,800068f8 +800068ec: 0d5012ef jal x5,800081c0 +800068f0: 800068e0 .word 0x800068e0 +800068f4: 80017634 .word 0x80017634 +800068f8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xd0d0d0d0 +800068fc: 00052f83 lw x31,0(x10) +80006900: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xd0d0d0d0 +80006904: 00052b83 lw x23,0(x10) +80006908: 00450513 addi x10,x10,4 + +8000690c : +Zkne_aes32esi_cg_cp_sbox_b208: + aes32esi x25, x31, x23, 2 # perform operation +8000690c: a37f8cb3 aes32esi x25,x31,x23,0x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b208, Zkne_aes32esi_cg_cp_sbox_b208_str) +80006910: 000ea203 lw x4,0(x29) +80006914: 01920863 beq x4,x25,80006924 +80006918: 0a9012ef jal x5,800081c0 +8000691c: 8000690c .word 0x8000690c +80006920: 8001766e .word 0x8001766e +80006924: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xd1d1d1d1 +80006928: 00052603 lw x12,0(x10) +8000692c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xd1d1d1d1 +80006930: 00052c03 lw x24,0(x10) +80006934: 00450513 addi x10,x10,4 + +80006938 : +Zkne_aes32esi_cg_cp_sbox_b209: + aes32esi x18, x12, x24, 3 # perform operation +80006938: e3860933 aes32esi x18,x12,x24,0x3 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b209, Zkne_aes32esi_cg_cp_sbox_b209_str) +8000693c: 000ea203 lw x4,0(x29) +80006940: 01220863 beq x4,x18,80006950 +80006944: 07d012ef jal x5,800081c0 +80006948: 80006938 .word 0x80006938 +8000694c: 800176a8 .word 0x800176a8 +80006950: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xd2d2d2d2 +80006954: 00052b83 lw x23,0(x10) +80006958: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xd2d2d2d2 +8000695c: 00052903 lw x18,0(x10) +80006960: 00450513 addi x10,x10,4 + +80006964 : +Zkne_aes32esi_cg_cp_sbox_b210: + aes32esi x7, x23, x18, 1 # perform operation +80006964: 632b83b3 aes32esi x7,x23,x18,0x1 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b210, Zkne_aes32esi_cg_cp_sbox_b210_str) +80006968: 000ea203 lw x4,0(x29) +8000696c: 00720863 beq x4,x7,8000697c +80006970: 051012ef jal x5,800081c0 +80006974: 80006964 .word 0x80006964 +80006978: 800176e2 .word 0x800176e2 +8000697c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xd3d3d3d3 +80006980: 00052883 lw x17,0(x10) +80006984: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xd3d3d3d3 +80006988: 00052183 lw x3,0(x10) +8000698c: 00450513 addi x10,x10,4 + +80006990 : +Zkne_aes32esi_cg_cp_sbox_b211: + aes32esi x30, x17, x3, 3 # perform operation +80006990: e2388f33 aes32esi x30,x17,x3,0x3 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b211, Zkne_aes32esi_cg_cp_sbox_b211_str) +80006994: 000ea203 lw x4,0(x29) +80006998: 01e20863 beq x4,x30,800069a8 +8000699c: 025012ef jal x5,800081c0 +800069a0: 80006990 .word 0x80006990 +800069a4: 8001771c .word 0x8001771c +800069a8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xd4d4d4d4 +800069ac: 00052e03 lw x28,0(x10) +800069b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xd4d4d4d4 +800069b4: 00052483 lw x9,0(x10) +800069b8: 00450513 addi x10,x10,4 + +800069bc : +Zkne_aes32esi_cg_cp_sbox_b212: + aes32esi x26, x28, x9, 1 # perform operation +800069bc: 629e0d33 aes32esi x26,x28,x9,0x1 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes32esi_cg_cp_sbox_b212, Zkne_aes32esi_cg_cp_sbox_b212_str) +800069c0: 000ea203 lw x4,0(x29) +800069c4: 01a20863 beq x4,x26,800069d4 +800069c8: 7f8012ef jal x5,800081c0 +800069cc: 800069bc .word 0x800069bc +800069d0: 80017756 .word 0x80017756 +800069d4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xd5d5d5d5 +800069d8: 00052d03 lw x26,0(x10) +800069dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xd5d5d5d5 +800069e0: 00052703 lw x14,0(x10) +800069e4: 00450513 addi x10,x10,4 + +800069e8 : +Zkne_aes32esi_cg_cp_sbox_b213: + aes32esi x24, x26, x14, 3 # perform operation +800069e8: e2ed0c33 aes32esi x24,x26,x14,0x3 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b213, Zkne_aes32esi_cg_cp_sbox_b213_str) +800069ec: 000ea203 lw x4,0(x29) +800069f0: 01820863 beq x4,x24,80006a00 +800069f4: 7cc012ef jal x5,800081c0 +800069f8: 800069e8 .word 0x800069e8 +800069fc: 80017790 .word 0x80017790 +80006a00: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xd6d6d6d6 +80006a04: 00052a03 lw x20,0(x10) +80006a08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xd6d6d6d6 +80006a0c: 00052103 lw x2,0(x10) +80006a10: 00450513 addi x10,x10,4 + +80006a14 : +Zkne_aes32esi_cg_cp_sbox_b214: + aes32esi x21, x20, x2, 1 # perform operation +80006a14: 622a0ab3 aes32esi x21,x20,x2,0x1 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes32esi_cg_cp_sbox_b214, Zkne_aes32esi_cg_cp_sbox_b214_str) +80006a18: 000ea203 lw x4,0(x29) +80006a1c: 01520863 beq x4,x21,80006a2c +80006a20: 7a0012ef jal x5,800081c0 +80006a24: 80006a14 .word 0x80006a14 +80006a28: 800177ca .word 0x800177ca +80006a2c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xd7d7d7d7 +80006a30: 00052d03 lw x26,0(x10) +80006a34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xd7d7d7d7 +80006a38: 00052b03 lw x22,0(x10) +80006a3c: 00450513 addi x10,x10,4 + +80006a40 : +Zkne_aes32esi_cg_cp_sbox_b215: + aes32esi x27, x26, x22, 2 # perform operation +80006a40: a36d0db3 aes32esi x27,x26,x22,0x2 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b215, Zkne_aes32esi_cg_cp_sbox_b215_str) +80006a44: 000ea203 lw x4,0(x29) +80006a48: 01b20863 beq x4,x27,80006a58 +80006a4c: 774012ef jal x5,800081c0 +80006a50: 80006a40 .word 0x80006a40 +80006a54: 80017804 .word 0x80017804 +80006a58: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xd8d8d8d8 +80006a5c: 00052083 lw x1,0(x10) +80006a60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xd8d8d8d8 +80006a64: 00052303 lw x6,0(x10) +80006a68: 00450513 addi x10,x10,4 + +80006a6c : +Zkne_aes32esi_cg_cp_sbox_b216: + aes32esi x30, x1, x6, 1 # perform operation +80006a6c: 62608f33 aes32esi x30,x1,x6,0x1 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b216, Zkne_aes32esi_cg_cp_sbox_b216_str) +80006a70: 000ea203 lw x4,0(x29) +80006a74: 01e20863 beq x4,x30,80006a84 +80006a78: 748012ef jal x5,800081c0 +80006a7c: 80006a6c .word 0x80006a6c +80006a80: 8001783e .word 0x8001783e +80006a84: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xd9d9d9d9 +80006a88: 00052483 lw x9,0(x10) +80006a8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xd9d9d9d9 +80006a90: 00052603 lw x12,0(x10) +80006a94: 00450513 addi x10,x10,4 + +80006a98 : +Zkne_aes32esi_cg_cp_sbox_b217: + aes32esi x24, x9, x12, 1 # perform operation +80006a98: 62c48c33 aes32esi x24,x9,x12,0x1 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b217, Zkne_aes32esi_cg_cp_sbox_b217_str) +80006a9c: 000ea203 lw x4,0(x29) +80006aa0: 01820863 beq x4,x24,80006ab0 +80006aa4: 71c012ef jal x5,800081c0 +80006aa8: 80006a98 .word 0x80006a98 +80006aac: 80017878 .word 0x80017878 +80006ab0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xdadadada +80006ab4: 00052803 lw x16,0(x10) +80006ab8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xdadadada +80006abc: 00052a03 lw x20,0(x10) +80006ac0: 00450513 addi x10,x10,4 + +80006ac4 : +Zkne_aes32esi_cg_cp_sbox_b218: + aes32esi x30, x16, x20, 1 # perform operation +80006ac4: 63480f33 aes32esi x30,x16,x20,0x1 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zkne_aes32esi_cg_cp_sbox_b218, Zkne_aes32esi_cg_cp_sbox_b218_str) +80006ac8: 000ea203 lw x4,0(x29) +80006acc: 01e20863 beq x4,x30,80006adc +80006ad0: 6f0012ef jal x5,800081c0 +80006ad4: 80006ac4 .word 0x80006ac4 +80006ad8: 800178b2 .word 0x800178b2 +80006adc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xdbdbdbdb +80006ae0: 00052183 lw x3,0(x10) +80006ae4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xdbdbdbdb +80006ae8: 00052583 lw x11,0(x10) +80006aec: 00450513 addi x10,x10,4 + +80006af0 : +Zkne_aes32esi_cg_cp_sbox_b219: + aes32esi x12, x3, x11, 1 # perform operation +80006af0: 62b18633 aes32esi x12,x3,x11,0x1 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b219, Zkne_aes32esi_cg_cp_sbox_b219_str) +80006af4: 000ea203 lw x4,0(x29) +80006af8: 00c20863 beq x4,x12,80006b08 +80006afc: 6c4012ef jal x5,800081c0 +80006b00: 80006af0 .word 0x80006af0 +80006b04: 800178ec .word 0x800178ec +80006b08: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xdcdcdcdc +80006b0c: 00052883 lw x17,0(x10) +80006b10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xdcdcdcdc +80006b14: 00052f83 lw x31,0(x10) +80006b18: 00450513 addi x10,x10,4 + +80006b1c : +Zkne_aes32esi_cg_cp_sbox_b220: + aes32esi x6, x17, x31, 2 # perform operation +80006b1c: a3f88333 aes32esi x6,x17,x31,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b220, Zkne_aes32esi_cg_cp_sbox_b220_str) +80006b20: 000ea203 lw x4,0(x29) +80006b24: 00620863 beq x4,x6,80006b34 +80006b28: 698012ef jal x5,800081c0 +80006b2c: 80006b1c .word 0x80006b1c +80006b30: 80017926 .word 0x80017926 +80006b34: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xdddddddd +80006b38: 00052b03 lw x22,0(x10) +80006b3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xdddddddd +80006b40: 00052d03 lw x26,0(x10) +80006b44: 00450513 addi x10,x10,4 + +80006b48 : +Zkne_aes32esi_cg_cp_sbox_b221: + aes32esi x16, x22, x26, 2 # perform operation +80006b48: a3ab0833 aes32esi x16,x22,x26,0x2 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zkne_aes32esi_cg_cp_sbox_b221, Zkne_aes32esi_cg_cp_sbox_b221_str) +80006b4c: 000ea203 lw x4,0(x29) +80006b50: 01020863 beq x4,x16,80006b60 +80006b54: 66c012ef jal x5,800081c0 +80006b58: 80006b48 .word 0x80006b48 +80006b5c: 80017960 .word 0x80017960 +80006b60: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xdededede +80006b64: 00052883 lw x17,0(x10) +80006b68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xdededede +80006b6c: 00052a03 lw x20,0(x10) +80006b70: 00450513 addi x10,x10,4 + +80006b74 : +Zkne_aes32esi_cg_cp_sbox_b222: + aes32esi x27, x17, x20, 1 # perform operation +80006b74: 63488db3 aes32esi x27,x17,x20,0x1 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b222, Zkne_aes32esi_cg_cp_sbox_b222_str) +80006b78: 000ea203 lw x4,0(x29) +80006b7c: 01b20863 beq x4,x27,80006b8c +80006b80: 640012ef jal x5,800081c0 +80006b84: 80006b74 .word 0x80006b74 +80006b88: 8001799a .word 0x8001799a +80006b8c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xdfdfdfdf +80006b90: 00052683 lw x13,0(x10) +80006b94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xdfdfdfdf +80006b98: 00052083 lw x1,0(x10) +80006b9c: 00450513 addi x10,x10,4 + +80006ba0 : +Zkne_aes32esi_cg_cp_sbox_b223: + aes32esi x18, x13, x1, 0 # perform operation +80006ba0: 22168933 aes32esi x18,x13,x1,0x0 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b223, Zkne_aes32esi_cg_cp_sbox_b223_str) +80006ba4: 000ea203 lw x4,0(x29) +80006ba8: 01220863 beq x4,x18,80006bb8 +80006bac: 614012ef jal x5,800081c0 +80006bb0: 80006ba0 .word 0x80006ba0 +80006bb4: 800179d4 .word 0x800179d4 +80006bb8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xe0e0e0e0 +80006bbc: 00052103 lw x2,0(x10) +80006bc0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xe0e0e0e0 +80006bc4: 00052083 lw x1,0(x10) +80006bc8: 00450513 addi x10,x10,4 + +80006bcc : +Zkne_aes32esi_cg_cp_sbox_b224: + aes32esi x25, x2, x1, 0 # perform operation +80006bcc: 22110cb3 aes32esi x25,x2,x1,0x0 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes32esi_cg_cp_sbox_b224, Zkne_aes32esi_cg_cp_sbox_b224_str) +80006bd0: 000ea203 lw x4,0(x29) +80006bd4: 01920863 beq x4,x25,80006be4 +80006bd8: 5e8012ef jal x5,800081c0 +80006bdc: 80006bcc .word 0x80006bcc +80006be0: 80017a0e .word 0x80017a0e +80006be4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xe1e1e1e1 +80006be8: 00052f03 lw x30,0(x10) +80006bec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xe1e1e1e1 +80006bf0: 00052583 lw x11,0(x10) +80006bf4: 00450513 addi x10,x10,4 + +80006bf8 : +Zkne_aes32esi_cg_cp_sbox_b225: + aes32esi x31, x30, x11, 3 # perform operation +80006bf8: e2bf0fb3 aes32esi x31,x30,x11,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b225, Zkne_aes32esi_cg_cp_sbox_b225_str) +80006bfc: 000ea203 lw x4,0(x29) +80006c00: 01f20863 beq x4,x31,80006c10 +80006c04: 5bc012ef jal x5,800081c0 +80006c08: 80006bf8 .word 0x80006bf8 +80006c0c: 80017a48 .word 0x80017a48 +80006c10: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xe2e2e2e2 +80006c14: 00052703 lw x14,0(x10) +80006c18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xe2e2e2e2 +80006c1c: 00052383 lw x7,0(x10) +80006c20: 00450513 addi x10,x10,4 + +80006c24 : +Zkne_aes32esi_cg_cp_sbox_b226: + aes32esi x22, x14, x7, 2 # perform operation +80006c24: a2770b33 aes32esi x22,x14,x7,0x2 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes32esi_cg_cp_sbox_b226, Zkne_aes32esi_cg_cp_sbox_b226_str) +80006c28: 000ea203 lw x4,0(x29) +80006c2c: 01620863 beq x4,x22,80006c3c +80006c30: 590012ef jal x5,800081c0 +80006c34: 80006c24 .word 0x80006c24 +80006c38: 80017a82 .word 0x80017a82 +80006c3c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xe3e3e3e3 +80006c40: 00052583 lw x11,0(x10) +80006c44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xe3e3e3e3 +80006c48: 00052803 lw x16,0(x10) +80006c4c: 00450513 addi x10,x10,4 + +80006c50 : +Zkne_aes32esi_cg_cp_sbox_b227: + aes32esi x8, x11, x16, 3 # perform operation +80006c50: e3058433 aes32esi x8,x11,x16,0x3 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b227, Zkne_aes32esi_cg_cp_sbox_b227_str) +80006c54: 000ea203 lw x4,0(x29) +80006c58: 00820863 beq x4,x8,80006c68 +80006c5c: 564012ef jal x5,800081c0 +80006c60: 80006c50 .word 0x80006c50 +80006c64: 80017abc .word 0x80017abc +80006c68: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xe4e4e4e4 +80006c6c: 00052383 lw x7,0(x10) +80006c70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xe4e4e4e4 +80006c74: 00052a03 lw x20,0(x10) +80006c78: 00450513 addi x10,x10,4 + +80006c7c : +Zkne_aes32esi_cg_cp_sbox_b228: + aes32esi x18, x7, x20, 1 # perform operation +80006c7c: 63438933 aes32esi x18,x7,x20,0x1 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b228, Zkne_aes32esi_cg_cp_sbox_b228_str) +80006c80: 000ea203 lw x4,0(x29) +80006c84: 01220863 beq x4,x18,80006c94 +80006c88: 538012ef jal x5,800081c0 +80006c8c: 80006c7c .word 0x80006c7c +80006c90: 80017af6 .word 0x80017af6 +80006c94: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xe5e5e5e5 +80006c98: 00052183 lw x3,0(x10) +80006c9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xe5e5e5e5 +80006ca0: 00052083 lw x1,0(x10) +80006ca4: 00450513 addi x10,x10,4 + +80006ca8 : +Zkne_aes32esi_cg_cp_sbox_b229: + aes32esi x15, x3, x1, 2 # perform operation +80006ca8: a21187b3 aes32esi x15,x3,x1,0x2 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b229, Zkne_aes32esi_cg_cp_sbox_b229_str) +80006cac: 000ea203 lw x4,0(x29) +80006cb0: 00f20863 beq x4,x15,80006cc0 +80006cb4: 50c012ef jal x5,800081c0 +80006cb8: 80006ca8 .word 0x80006ca8 +80006cbc: 80017b30 .word 0x80017b30 +80006cc0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xe6e6e6e6 +80006cc4: 00052383 lw x7,0(x10) +80006cc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xe6e6e6e6 +80006ccc: 00052983 lw x19,0(x10) +80006cd0: 00450513 addi x10,x10,4 + +80006cd4 : +Zkne_aes32esi_cg_cp_sbox_b230: + aes32esi x31, x7, x19, 3 # perform operation +80006cd4: e3338fb3 aes32esi x31,x7,x19,0x3 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zkne_aes32esi_cg_cp_sbox_b230, Zkne_aes32esi_cg_cp_sbox_b230_str) +80006cd8: 000ea203 lw x4,0(x29) +80006cdc: 01f20863 beq x4,x31,80006cec +80006ce0: 4e0012ef jal x5,800081c0 +80006ce4: 80006cd4 .word 0x80006cd4 +80006ce8: 80017b6a .word 0x80017b6a +80006cec: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xe7e7e7e7 +80006cf0: 00052783 lw x15,0(x10) +80006cf4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xe7e7e7e7 +80006cf8: 00052f03 lw x30,0(x10) +80006cfc: 00450513 addi x10,x10,4 + +80006d00 : +Zkne_aes32esi_cg_cp_sbox_b231: + aes32esi x7, x15, x30, 3 # perform operation +80006d00: e3e783b3 aes32esi x7,x15,x30,0x3 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b231, Zkne_aes32esi_cg_cp_sbox_b231_str) +80006d04: 000ea203 lw x4,0(x29) +80006d08: 00720863 beq x4,x7,80006d18 +80006d0c: 4b4012ef jal x5,800081c0 +80006d10: 80006d00 .word 0x80006d00 +80006d14: 80017ba4 .word 0x80017ba4 +80006d18: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xe8e8e8e8 +80006d1c: 00052983 lw x19,0(x10) +80006d20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xe8e8e8e8 +80006d24: 00052383 lw x7,0(x10) +80006d28: 00450513 addi x10,x10,4 + +80006d2c : +Zkne_aes32esi_cg_cp_sbox_b232: + aes32esi x27, x19, x7, 3 # perform operation +80006d2c: e2798db3 aes32esi x27,x19,x7,0x3 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes32esi_cg_cp_sbox_b232, Zkne_aes32esi_cg_cp_sbox_b232_str) +80006d30: 000ea203 lw x4,0(x29) +80006d34: 01b20863 beq x4,x27,80006d44 +80006d38: 488012ef jal x5,800081c0 +80006d3c: 80006d2c .word 0x80006d2c +80006d40: 80017bde .word 0x80017bde +80006d44: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xe9e9e9e9 +80006d48: 00052b03 lw x22,0(x10) +80006d4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xe9e9e9e9 +80006d50: 00052783 lw x15,0(x10) +80006d54: 00450513 addi x10,x10,4 + +80006d58 : +Zkne_aes32esi_cg_cp_sbox_b233: + aes32esi x12, x22, x15, 2 # perform operation +80006d58: a2fb0633 aes32esi x12,x22,x15,0x2 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b233, Zkne_aes32esi_cg_cp_sbox_b233_str) +80006d5c: 000ea203 lw x4,0(x29) +80006d60: 00c20863 beq x4,x12,80006d70 +80006d64: 45c012ef jal x5,800081c0 +80006d68: 80006d58 .word 0x80006d58 +80006d6c: 80017c18 .word 0x80017c18 +80006d70: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xeaeaeaea +80006d74: 00052783 lw x15,0(x10) +80006d78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xeaeaeaea +80006d7c: 00052b03 lw x22,0(x10) +80006d80: 00450513 addi x10,x10,4 + +80006d84 : +Zkne_aes32esi_cg_cp_sbox_b234: + aes32esi x20, x15, x22, 2 # perform operation +80006d84: a3678a33 aes32esi x20,x15,x22,0x2 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b234, Zkne_aes32esi_cg_cp_sbox_b234_str) +80006d88: 000ea203 lw x4,0(x29) +80006d8c: 01420863 beq x4,x20,80006d9c +80006d90: 430012ef jal x5,800081c0 +80006d94: 80006d84 .word 0x80006d84 +80006d98: 80017c52 .word 0x80017c52 +80006d9c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xebebebeb +80006da0: 00052483 lw x9,0(x10) +80006da4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xebebebeb +80006da8: 00052f03 lw x30,0(x10) +80006dac: 00450513 addi x10,x10,4 + +80006db0 : +Zkne_aes32esi_cg_cp_sbox_b235: + aes32esi x24, x9, x30, 1 # perform operation +80006db0: 63e48c33 aes32esi x24,x9,x30,0x1 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes32esi_cg_cp_sbox_b235, Zkne_aes32esi_cg_cp_sbox_b235_str) +80006db4: 000ea203 lw x4,0(x29) +80006db8: 01820863 beq x4,x24,80006dc8 +80006dbc: 404012ef jal x5,800081c0 +80006dc0: 80006db0 .word 0x80006db0 +80006dc4: 80017c8c .word 0x80017c8c +80006dc8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xecececec +80006dcc: 00052583 lw x11,0(x10) +80006dd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xecececec +80006dd4: 00052803 lw x16,0(x10) +80006dd8: 00450513 addi x10,x10,4 + +80006ddc : +Zkne_aes32esi_cg_cp_sbox_b236: + aes32esi x2, x11, x16, 1 # perform operation +80006ddc: 63058133 aes32esi x2,x11,x16,0x1 + # Check if x2 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x2, Zkne_aes32esi_cg_cp_sbox_b236, Zkne_aes32esi_cg_cp_sbox_b236_str) +80006de0: 000ea203 lw x4,0(x29) +80006de4: 00220863 beq x4,x2,80006df4 +80006de8: 3d8012ef jal x5,800081c0 +80006dec: 80006ddc .word 0x80006ddc +80006df0: 80017cc6 .word 0x80017cc6 +80006df4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xedededed +80006df8: 00052b03 lw x22,0(x10) +80006dfc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xedededed +80006e00: 00052903 lw x18,0(x10) +80006e04: 00450513 addi x10,x10,4 + +80006e08 : +Zkne_aes32esi_cg_cp_sbox_b237: + aes32esi x12, x22, x18, 3 # perform operation +80006e08: e32b0633 aes32esi x12,x22,x18,0x3 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zkne_aes32esi_cg_cp_sbox_b237, Zkne_aes32esi_cg_cp_sbox_b237_str) +80006e0c: 000ea203 lw x4,0(x29) +80006e10: 00c20863 beq x4,x12,80006e20 +80006e14: 3ac012ef jal x5,800081c0 +80006e18: 80006e08 .word 0x80006e08 +80006e1c: 80017d00 .word 0x80017d00 +80006e20: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xeeeeeeee +80006e24: 00052883 lw x17,0(x10) +80006e28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xeeeeeeee +80006e2c: 00052483 lw x9,0(x10) +80006e30: 00450513 addi x10,x10,4 + +80006e34 : +Zkne_aes32esi_cg_cp_sbox_b238: + aes32esi x18, x17, x9, 2 # perform operation +80006e34: a2988933 aes32esi x18,x17,x9,0x2 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes32esi_cg_cp_sbox_b238, Zkne_aes32esi_cg_cp_sbox_b238_str) +80006e38: 000ea203 lw x4,0(x29) +80006e3c: 01220863 beq x4,x18,80006e4c +80006e40: 380012ef jal x5,800081c0 +80006e44: 80006e34 .word 0x80006e34 +80006e48: 80017d3a .word 0x80017d3a +80006e4c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xefefefef +80006e50: 00052e03 lw x28,0(x10) +80006e54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xefefefef +80006e58: 00052083 lw x1,0(x10) +80006e5c: 00450513 addi x10,x10,4 + +80006e60 : +Zkne_aes32esi_cg_cp_sbox_b239: + aes32esi x14, x28, x1, 2 # perform operation +80006e60: a21e0733 aes32esi x14,x28,x1,0x2 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zkne_aes32esi_cg_cp_sbox_b239, Zkne_aes32esi_cg_cp_sbox_b239_str) +80006e64: 000ea203 lw x4,0(x29) +80006e68: 00e20863 beq x4,x14,80006e78 +80006e6c: 354012ef jal x5,800081c0 +80006e70: 80006e60 .word 0x80006e60 +80006e74: 80017d74 .word 0x80017d74 +80006e78: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xf0f0f0f0 +80006e7c: 00052903 lw x18,0(x10) +80006e80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xf0f0f0f0 +80006e84: 00052f83 lw x31,0(x10) +80006e88: 00450513 addi x10,x10,4 + +80006e8c : +Zkne_aes32esi_cg_cp_sbox_b240: + aes32esi x23, x18, x31, 0 # perform operation +80006e8c: 23f90bb3 aes32esi x23,x18,x31,0x0 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b240, Zkne_aes32esi_cg_cp_sbox_b240_str) +80006e90: 000ea203 lw x4,0(x29) +80006e94: 01720863 beq x4,x23,80006ea4 +80006e98: 328012ef jal x5,800081c0 +80006e9c: 80006e8c .word 0x80006e8c +80006ea0: 80017dae .word 0x80017dae +80006ea4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xf1f1f1f1 +80006ea8: 00052883 lw x17,0(x10) +80006eac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xf1f1f1f1 +80006eb0: 00052083 lw x1,0(x10) +80006eb4: 00450513 addi x10,x10,4 + +80006eb8 : +Zkne_aes32esi_cg_cp_sbox_b241: + aes32esi x8, x17, x1, 0 # perform operation +80006eb8: 22188433 aes32esi x8,x17,x1,0x0 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zkne_aes32esi_cg_cp_sbox_b241, Zkne_aes32esi_cg_cp_sbox_b241_str) +80006ebc: 000ea203 lw x4,0(x29) +80006ec0: 00820863 beq x4,x8,80006ed0 +80006ec4: 2fc012ef jal x5,800081c0 +80006ec8: 80006eb8 .word 0x80006eb8 +80006ecc: 80017de8 .word 0x80017de8 +80006ed0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xf2f2f2f2 +80006ed4: 00052c83 lw x25,0(x10) +80006ed8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xf2f2f2f2 +80006edc: 00052783 lw x15,0(x10) +80006ee0: 00450513 addi x10,x10,4 + +80006ee4 : +Zkne_aes32esi_cg_cp_sbox_b242: + aes32esi x23, x25, x15, 1 # perform operation +80006ee4: 62fc8bb3 aes32esi x23,x25,x15,0x1 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b242, Zkne_aes32esi_cg_cp_sbox_b242_str) +80006ee8: 000ea203 lw x4,0(x29) +80006eec: 01720863 beq x4,x23,80006efc +80006ef0: 2d0012ef jal x5,800081c0 +80006ef4: 80006ee4 .word 0x80006ee4 +80006ef8: 80017e22 .word 0x80017e22 +80006efc: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xf3f3f3f3 +80006f00: 00052183 lw x3,0(x10) +80006f04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xf3f3f3f3 +80006f08: 00052f83 lw x31,0(x10) +80006f0c: 00450513 addi x10,x10,4 + +80006f10 : +Zkne_aes32esi_cg_cp_sbox_b243: + aes32esi x1, x3, x31, 0 # perform operation +80006f10: 23f180b3 aes32esi x1,x3,x31,0x0 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b243, Zkne_aes32esi_cg_cp_sbox_b243_str) +80006f14: 000ea203 lw x4,0(x29) +80006f18: 00120863 beq x4,x1,80006f28 +80006f1c: 2a4012ef jal x5,800081c0 +80006f20: 80006f10 .word 0x80006f10 +80006f24: 80017e5c .word 0x80017e5c +80006f28: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xf4f4f4f4 +80006f2c: 00052a83 lw x21,0(x10) +80006f30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xf4f4f4f4 +80006f34: 00052b03 lw x22,0(x10) +80006f38: 00450513 addi x10,x10,4 + +80006f3c : +Zkne_aes32esi_cg_cp_sbox_b244: + aes32esi x23, x21, x22, 2 # perform operation +80006f3c: a36a8bb3 aes32esi x23,x21,x22,0x2 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes32esi_cg_cp_sbox_b244, Zkne_aes32esi_cg_cp_sbox_b244_str) +80006f40: 000ea203 lw x4,0(x29) +80006f44: 01720863 beq x4,x23,80006f54 +80006f48: 278012ef jal x5,800081c0 +80006f4c: 80006f3c .word 0x80006f3c +80006f50: 80017e96 .word 0x80017e96 +80006f54: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xf5f5f5f5 +80006f58: 00052d03 lw x26,0(x10) +80006f5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xf5f5f5f5 +80006f60: 00052583 lw x11,0(x10) +80006f64: 00450513 addi x10,x10,4 + +80006f68 : +Zkne_aes32esi_cg_cp_sbox_b245: + aes32esi x13, x26, x11, 1 # perform operation +80006f68: 62bd06b3 aes32esi x13,x26,x11,0x1 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zkne_aes32esi_cg_cp_sbox_b245, Zkne_aes32esi_cg_cp_sbox_b245_str) +80006f6c: 000ea203 lw x4,0(x29) +80006f70: 00d20863 beq x4,x13,80006f80 +80006f74: 24c012ef jal x5,800081c0 +80006f78: 80006f68 .word 0x80006f68 +80006f7c: 80017ed0 .word 0x80017ed0 +80006f80: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xf6f6f6f6 +80006f84: 00052903 lw x18,0(x10) +80006f88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xf6f6f6f6 +80006f8c: 00052583 lw x11,0(x10) +80006f90: 00450513 addi x10,x10,4 + +80006f94 : +Zkne_aes32esi_cg_cp_sbox_b246: + aes32esi x19, x18, x11, 1 # perform operation +80006f94: 62b909b3 aes32esi x19,x18,x11,0x1 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes32esi_cg_cp_sbox_b246, Zkne_aes32esi_cg_cp_sbox_b246_str) +80006f98: 000ea203 lw x4,0(x29) +80006f9c: 01320863 beq x4,x19,80006fac +80006fa0: 220012ef jal x5,800081c0 +80006fa4: 80006f94 .word 0x80006f94 +80006fa8: 80017f0a .word 0x80017f0a +80006fac: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xf7f7f7f7 +80006fb0: 00052b83 lw x23,0(x10) +80006fb4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xf7f7f7f7 +80006fb8: 00052903 lw x18,0(x10) +80006fbc: 00450513 addi x10,x10,4 + +80006fc0 : +Zkne_aes32esi_cg_cp_sbox_b247: + aes32esi x28, x23, x18, 0 # perform operation +80006fc0: 232b8e33 aes32esi x28,x23,x18,0x0 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes32esi_cg_cp_sbox_b247, Zkne_aes32esi_cg_cp_sbox_b247_str) +80006fc4: 000ea203 lw x4,0(x29) +80006fc8: 01c20863 beq x4,x28,80006fd8 +80006fcc: 1f4012ef jal x5,800081c0 +80006fd0: 80006fc0 .word 0x80006fc0 +80006fd4: 80017f44 .word 0x80017f44 +80006fd8: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xf8f8f8f8 +80006fdc: 00052c03 lw x24,0(x10) +80006fe0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xf8f8f8f8 +80006fe4: 00052083 lw x1,0(x10) +80006fe8: 00450513 addi x10,x10,4 + +80006fec : +Zkne_aes32esi_cg_cp_sbox_b248: + aes32esi x15, x24, x1, 2 # perform operation +80006fec: a21c07b3 aes32esi x15,x24,x1,0x2 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b248, Zkne_aes32esi_cg_cp_sbox_b248_str) +80006ff0: 000ea203 lw x4,0(x29) +80006ff4: 00f20863 beq x4,x15,80007004 +80006ff8: 1c8012ef jal x5,800081c0 +80006ffc: 80006fec .word 0x80006fec +80007000: 80017f7e .word 0x80017f7e +80007004: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xf9f9f9f9 +80007008: 00052803 lw x16,0(x10) +8000700c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xf9f9f9f9 +80007010: 00052f83 lw x31,0(x10) +80007014: 00450513 addi x10,x10,4 + +80007018 : +Zkne_aes32esi_cg_cp_sbox_b249: + aes32esi x6, x16, x31, 2 # perform operation +80007018: a3f80333 aes32esi x6,x16,x31,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zkne_aes32esi_cg_cp_sbox_b249, Zkne_aes32esi_cg_cp_sbox_b249_str) +8000701c: 000ea203 lw x4,0(x29) +80007020: 00620863 beq x4,x6,80007030 +80007024: 19c012ef jal x5,800081c0 +80007028: 80007018 .word 0x80007018 +8000702c: 80017fb8 .word 0x80017fb8 +80007030: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xfafafafa +80007034: 00052403 lw x8,0(x10) +80007038: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfafafafa +8000703c: 00052f83 lw x31,0(x10) +80007040: 00450513 addi x10,x10,4 + +80007044 : +Zkne_aes32esi_cg_cp_sbox_b250: + aes32esi x1, x8, x31, 3 # perform operation +80007044: e3f400b3 aes32esi x1,x8,x31,0x3 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zkne_aes32esi_cg_cp_sbox_b250, Zkne_aes32esi_cg_cp_sbox_b250_str) +80007048: 000ea203 lw x4,0(x29) +8000704c: 00120863 beq x4,x1,8000705c +80007050: 170012ef jal x5,800081c0 +80007054: 80007044 .word 0x80007044 +80007058: 80017ff2 .word 0x80017ff2 +8000705c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xfbfbfbfb +80007060: 00052903 lw x18,0(x10) +80007064: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xfbfbfbfb +80007068: 00052d03 lw x26,0(x10) +8000706c: 00450513 addi x10,x10,4 + +80007070 : +Zkne_aes32esi_cg_cp_sbox_b251: + aes32esi x15, x18, x26, 1 # perform operation +80007070: 63a907b3 aes32esi x15,x18,x26,0x1 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zkne_aes32esi_cg_cp_sbox_b251, Zkne_aes32esi_cg_cp_sbox_b251_str) +80007074: 000ea203 lw x4,0(x29) +80007078: 00f20863 beq x4,x15,80007088 +8000707c: 144012ef jal x5,800081c0 +80007080: 80007070 .word 0x80007070 +80007084: 8001802c .word 0x8001802c +80007088: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xfcfcfcfc +8000708c: 00052383 lw x7,0(x10) +80007090: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfcfcfcfc +80007094: 00052983 lw x19,0(x10) +80007098: 00450513 addi x10,x10,4 + +8000709c : +Zkne_aes32esi_cg_cp_sbox_b252: + aes32esi x20, x7, x19, 1 # perform operation +8000709c: 63338a33 aes32esi x20,x7,x19,0x1 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes32esi_cg_cp_sbox_b252, Zkne_aes32esi_cg_cp_sbox_b252_str) +800070a0: 000ea203 lw x4,0(x29) +800070a4: 01420863 beq x4,x20,800070b4 +800070a8: 118012ef jal x5,800081c0 +800070ac: 8000709c .word 0x8000709c +800070b0: 80018066 .word 0x80018066 +800070b4: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfdfdfdfd +800070b8: 00052683 lw x13,0(x10) +800070bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xfdfdfdfd +800070c0: 00052903 lw x18,0(x10) +800070c4: 00450513 addi x10,x10,4 + +800070c8 : +Zkne_aes32esi_cg_cp_sbox_b253: + aes32esi x17, x13, x18, 1 # perform operation +800070c8: 632688b3 aes32esi x17,x13,x18,0x1 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zkne_aes32esi_cg_cp_sbox_b253, Zkne_aes32esi_cg_cp_sbox_b253_str) +800070cc: 000ea203 lw x4,0(x29) +800070d0: 01120863 beq x4,x17,800070e0 +800070d4: 0ec012ef jal x5,800081c0 +800070d8: 800070c8 .word 0x800070c8 +800070dc: 800180a0 .word 0x800180a0 +800070e0: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xfefefefe +800070e4: 00052083 lw x1,0(x10) +800070e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xfefefefe +800070ec: 00052c83 lw x25,0(x10) +800070f0: 00450513 addi x10,x10,4 + +800070f4 : +Zkne_aes32esi_cg_cp_sbox_b254: + aes32esi x7, x1, x25, 0 # perform operation +800070f4: 239083b3 aes32esi x7,x1,x25,0x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b254, Zkne_aes32esi_cg_cp_sbox_b254_str) +800070f8: 000ea203 lw x4,0(x29) +800070fc: 00720863 beq x4,x7,8000710c +80007100: 0c0012ef jal x5,800081c0 +80007104: 800070f4 .word 0x800070f4 +80007108: 800180da .word 0x800180da +8000710c: 004e8e93 addi x29,x29,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xffffffff +80007110: 00052303 lw x6,0(x10) +80007114: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xffffffff +80007118: 00052783 lw x15,0(x10) +8000711c: 00450513 addi x10,x10,4 + +80007120 : +Zkne_aes32esi_cg_cp_sbox_b255: + aes32esi x7, x6, x15, 1 # perform operation +80007120: 62f303b3 aes32esi x7,x6,x15,0x1 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zkne_aes32esi_cg_cp_sbox_b255, Zkne_aes32esi_cg_cp_sbox_b255_str) +80007124: 000ea203 lw x4,0(x29) +80007128: 00720863 beq x4,x7,80007138 +8000712c: 094012ef jal x5,800081c0 +80007130: 80007120 .word 0x80007120 +80007134: 80018114 .word 0x80018114 +80007138: 004e8e93 addi x29,x29,4 + + mv x2, x29 # restore signature pointer to default register for teardown +8000713c: 000e8113 addi x2,x29,0 + +80007140 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80007140: 00000513 addi x10,x0,0 +80007144: 00000073 ecall +80007148: fff00513 addi x10,x0,-1 +8000714c: 1d800413 addi x8,x0,472 + +80007150 : +80007150: 34002373 csrrs x6,mscratch,x0 + +80007154 : +80007154: 23832383 lw x7,568(x6) +80007158: 23c32483 lw x9,572(x6) + +8000715c : +8000715c: 22032383 lw x7,544(x6) + +80007160 : +80007160: 25032483 lw x9,592(x6) +80007164: 34049073 csrrw x0,mscratch,x9 + +80007168 : +80007168: 24832483 lw x9,584(x6) +8000716c: 305493f3 csrrw x7,mtvec,x9 +80007170: ffc4f493 andi x9,x9,-4 +80007174: ffc3f393 andi x7,x7,-4 +80007178: 00749e63 bne x9,x7,80007194 + +8000717c : +8000717c: 00030493 addi x9,x6,0 + +80007180 : +80007180: 0004a783 lw x15,0(x9) +80007184: 00f3a023 sw x15,0(x7) +80007188: 00438393 addi x7,x7,4 +8000718c: 00448493 addi x9,x9,4 +80007190: fe83c8e3 blt x7,x8,80007180 +80007194: 0000100f fence.i + +80007198 : +80007198: 00000013 addi x0,x0,0 +8000719c: 00000013 addi x0,x0,0 +800071a0: 00000497 auipc x9,0x0 +800071a4: 29048493 addi x9,x9,656 # 80007430 +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 10e49863 bne x9,x14,800072d0 +800071c4: 00000013 addi x0,x0,0 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 00011517 auipc x10,0x11 +800071e4: 5f250513 addi x10,x10,1522 # 800187d2 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00023097 auipc x1,0x23 +80007204: 364080e7 jalr x1,868(x1) # 8002a564 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00011517 auipc x10,0x11 +80007224: 5ef50513 addi x10,x10,1519 # 8001880f +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00023097 auipc x1,0x23 +80007244: 324080e7 jalr x1,804(x1) # 8002a564 +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00011517 auipc x10,0x11 +80007264: 60f50513 addi x10,x10,1551 # 8001886f +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00023097 auipc x1,0x23 +80007284: 2e4080e7 jalr x1,740(x1) # 8002a564 +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00012517 auipc x10,0x12 +800072a4: 17a50513 addi x10,x10,378 # 8001941a +800072a8: 00000013 addi x0,x0,0 +800072ac: 00000013 addi x0,x0,0 +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00023097 auipc x1,0x23 +800072c4: 2a4080e7 jalr x1,676(x1) # 8002a564 +800072c8: 00023097 auipc x1,0x23 +800072cc: 2fc080e7 jalr x1,764(x1) # 8002a5c4 + +800072d0 : +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00005317 auipc x6,0x5 +800072e4: 04830313 addi x6,x6,72 # 8000c328 +800072e8: 00000013 addi x0,x0,0 +800072ec: 00000013 addi x0,x0,0 +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00032303 lw x6,0(x6) +80007304: 00000013 addi x0,x0,0 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 00013397 auipc x7,0x13 +80007324: 5e838393 addi x7,x7,1512 # 8001a908 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 40730333 sub x6,x6,x7 +80007344: 00000013 addi x0,x0,0 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 00013417 auipc x8,0x13 +80007364: 5a040413 addi x8,x8,1440 # 8001a900 +80007368: 00000013 addi x0,x0,0 +8000736c: 00000013 addi x0,x0,0 +80007370: 00000013 addi x0,x0,0 +80007374: 00000013 addi x0,x0,0 +80007378: 00000013 addi x0,x0,0 +8000737c: 00000013 addi x0,x0,0 +80007380: 00042203 lw x4,0(x8) +80007384: 00620863 beq x4,x6,80007394 +80007388: 6a1003ef jal x7,80008228 +8000738c: 800072d0 .word 0x800072d0 +80007390: 800189c3 .word 0x800189c3 + +80007394 : +80007394: bad0e4b7 lui x9,0xbad0e +80007398: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +8000739c: 00e49a63 bne x9,x14,800073b0 +800073a0: 689003ef jal x7,80008228 +800073a4: 80007464 .word 0x80007464 +800073a8: 80018831 .word 0x80018831 +800073ac: 00000341 .word 0x00000341 + +800073b0 : +800073b0: 00000013 addi x0,x0,0 +800073b4: 00000013 addi x0,x0,0 +800073b8: 00000013 addi x0,x0,0 +800073bc: 00000013 addi x0,x0,0 +800073c0: 00011517 auipc x10,0x11 +800073c4: 3d450513 addi x10,x10,980 # 80018794 +800073c8: 00000013 addi x0,x0,0 +800073cc: 00000013 addi x0,x0,0 +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00023097 auipc x1,0x23 +800073e4: 184080e7 jalr x1,388(x1) # 8002a564 +800073e8: 00023097 auipc x1,0x23 +800073ec: 1bc080e7 jalr x1,444(x1) # 8002a5a4 + +800073f0 : +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00011517 auipc x10,0x11 +80007404: 3d250513 addi x10,x10,978 # 800187d2 +80007408: 00000013 addi x0,x0,0 +8000740c: 00000013 addi x0,x0,0 +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00023097 auipc x1,0x23 +80007424: 144080e7 jalr x1,324(x1) # 8002a564 +80007428: 00023097 auipc x1,0x23 +8000742c: 19c080e7 jalr x1,412(x1) # 8002a5c4 + +80007430 : +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: 00000717 auipc x14,0x0 +80007444: ff070713 addi x14,x14,-16 # 80007430 +80007448: 00000013 addi x0,x0,0 +8000744c: 00000013 addi x0,x0,0 +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: ce1ff06f jal x0,80007140 + +80007464 : +80007464: bad0e737 lui x14,0xbad0e +80007468: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000746c: cd5ff06f jal x0,80007140 +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 + +80007480 : +80007480: 0800006f jal x0,80007500 +80007484: 0880006f jal x0,8000750c +80007488: 0900006f jal x0,80007518 +8000748c: 0980006f jal x0,80007524 +80007490: 0a00006f jal x0,80007530 +80007494: 0a80006f jal x0,8000753c +80007498: 0b00006f jal x0,80007548 +8000749c: 0b80006f jal x0,80007554 +800074a0: 0c00006f jal x0,80007560 +800074a4: 0c80006f jal x0,8000756c +800074a8: 0d00006f jal x0,80007578 +800074ac: 0d80006f jal x0,80007584 +800074b0: 0e00006f jal x0,80007590 +800074b4: 0e80006f jal x0,8000759c +800074b8: 0f00006f jal x0,800075a8 +800074bc: 0f80006f jal x0,800075b4 +800074c0: 1000006f jal x0,800075c0 +800074c4: 1080006f jal x0,800075cc +800074c8: 1100006f jal x0,800075d8 +800074cc: 1180006f jal x0,800075e4 +800074d0: 1200006f jal x0,800075f0 +800074d4: 1280006f jal x0,800075fc +800074d8: 1300006f jal x0,80007608 +800074dc: 1380006f jal x0,80007614 +800074e0: 1400006f jal x0,80007620 +800074e4: 13c0006f jal x0,80007620 +800074e8: 1380006f jal x0,80007620 +800074ec: 1340006f jal x0,80007620 +800074f0: 1300006f jal x0,80007620 +800074f4: 12c0006f jal x0,80007620 +800074f8: 1280006f jal x0,80007620 +800074fc: 1240006f jal x0,80007620 + +80007500 : +80007500: 34011173 csrrw x2,mscratch,x2 +80007504: 26f12823 sw x15,624(x2) +80007508: 13c007ef jal x15,80007644 +8000750c: 34011173 csrrw x2,mscratch,x2 +80007510: 26f12823 sw x15,624(x2) +80007514: 130007ef jal x15,80007644 +80007518: 34011173 csrrw x2,mscratch,x2 +8000751c: 26f12823 sw x15,624(x2) +80007520: 124007ef jal x15,80007644 +80007524: 34011173 csrrw x2,mscratch,x2 +80007528: 26f12823 sw x15,624(x2) +8000752c: 118007ef jal x15,80007644 +80007530: 34011173 csrrw x2,mscratch,x2 +80007534: 26f12823 sw x15,624(x2) +80007538: 10c007ef jal x15,80007644 +8000753c: 34011173 csrrw x2,mscratch,x2 +80007540: 26f12823 sw x15,624(x2) +80007544: 100007ef jal x15,80007644 +80007548: 34011173 csrrw x2,mscratch,x2 +8000754c: 26f12823 sw x15,624(x2) +80007550: 0f4007ef jal x15,80007644 +80007554: 34011173 csrrw x2,mscratch,x2 +80007558: 26f12823 sw x15,624(x2) +8000755c: 0e8007ef jal x15,80007644 +80007560: 34011173 csrrw x2,mscratch,x2 +80007564: 26f12823 sw x15,624(x2) +80007568: 0dc007ef jal x15,80007644 +8000756c: 34011173 csrrw x2,mscratch,x2 +80007570: 26f12823 sw x15,624(x2) +80007574: 0d0007ef jal x15,80007644 +80007578: 34011173 csrrw x2,mscratch,x2 +8000757c: 26f12823 sw x15,624(x2) +80007580: 0c4007ef jal x15,80007644 +80007584: 34011173 csrrw x2,mscratch,x2 +80007588: 26f12823 sw x15,624(x2) +8000758c: 0b8007ef jal x15,80007644 +80007590: 34011173 csrrw x2,mscratch,x2 +80007594: 26f12823 sw x15,624(x2) +80007598: 0ac007ef jal x15,80007644 +8000759c: 34011173 csrrw x2,mscratch,x2 +800075a0: 26f12823 sw x15,624(x2) +800075a4: 0a0007ef jal x15,80007644 +800075a8: 34011173 csrrw x2,mscratch,x2 +800075ac: 26f12823 sw x15,624(x2) +800075b0: 094007ef jal x15,80007644 +800075b4: 34011173 csrrw x2,mscratch,x2 +800075b8: 26f12823 sw x15,624(x2) +800075bc: 088007ef jal x15,80007644 +800075c0: 34011173 csrrw x2,mscratch,x2 +800075c4: 26f12823 sw x15,624(x2) +800075c8: 07c007ef jal x15,80007644 +800075cc: 34011173 csrrw x2,mscratch,x2 +800075d0: 26f12823 sw x15,624(x2) +800075d4: 070007ef jal x15,80007644 +800075d8: 34011173 csrrw x2,mscratch,x2 +800075dc: 26f12823 sw x15,624(x2) +800075e0: 064007ef jal x15,80007644 +800075e4: 34011173 csrrw x2,mscratch,x2 +800075e8: 26f12823 sw x15,624(x2) +800075ec: 058007ef jal x15,80007644 +800075f0: 34011173 csrrw x2,mscratch,x2 +800075f4: 26f12823 sw x15,624(x2) +800075f8: 04c007ef jal x15,80007644 +800075fc: 34011173 csrrw x2,mscratch,x2 +80007600: 26f12823 sw x15,624(x2) +80007604: 040007ef jal x15,80007644 +80007608: 34011173 csrrw x2,mscratch,x2 +8000760c: 26f12823 sw x15,624(x2) +80007610: 034007ef jal x15,80007644 +80007614: 34011173 csrrw x2,mscratch,x2 +80007618: 26f12823 sw x15,624(x2) +8000761c: 028007ef jal x15,80007644 + +80007620 : +80007620: 00000317 auipc x6,0x0 +80007624: b7830313 addi x6,x6,-1160 # 80007198 +80007628: 00000013 addi x0,x0,0 +8000762c: 00000013 addi x0,x0,0 +80007630: 00000013 addi x0,x0,0 +80007634: 00000013 addi x0,x0,0 +80007638: 00000013 addi x0,x0,0 +8000763c: 00000013 addi x0,x0,0 +80007640: 00030067 jalr x0,0(x6) + +80007644 : +80007644: 26e12623 sw x14,620(x2) +80007648: 34011773 csrrw x14,mscratch,x2 +8000764c: 26e12a23 sw x14,628(x2) +80007650: 23012703 lw x14,560(x2) +80007654: 00070067 jalr x0,0(x14) + +80007658 : +80007658: 26912423 sw x9,616(x2) +8000765c: 26812223 sw x8,612(x2) +80007660: 26712023 sw x7,608(x2) +80007664: 24612e23 sw x6,604(x2) +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00005317 auipc x6,0x5 +80007684: a8830313 addi x6,x6,-1400 # 8000c108 +80007688: 00000013 addi x0,x0,0 +8000768c: 00000013 addi x0,x0,0 +80007690: 00000013 addi x0,x0,0 +80007694: 00000013 addi x0,x0,0 +80007698: 00000013 addi x0,x0,0 +8000769c: 00000013 addi x0,x0,0 +800076a0: 00032383 lw x7,0(x6) +800076a4: 00138393 addi x7,x7,1 +800076a8: 00732023 sw x7,0(x6) +800076ac: 34202773 csrrs x14,mcause,x0 + +800076b0 : +800076b0: 800014b7 lui x9,0x80001 +800076b4: fff48493 addi x9,x9,-1 # 80000fff +800076b8: 00e4f4b3 and x9,x9,x14 + +800076bc : +800076bc: ffe48413 addi x8,x9,-2 +800076c0: 00041663 bne x8,x0,800076cc + +800076c4 : +800076c4: 280506e3 beq x10,x0,80008150 +800076c8: 58c0006f jal x0,80007c54 + +800076cc : +800076cc: ff848413 addi x8,x9,-8 +800076d0: 00245413 srli x8,x8,0x2 +800076d4: 58041063 bne x8,x0,80007c54 + +800076d8 : +800076d8: 26050ce3 beq x10,x0,80008150 + +800076dc : +800076dc: fff50493 addi x9,x10,-1 +800076e0: 00500393 addi x7,x0,5 +800076e4: 0274e063 bltu x9,x7,80007704 +800076e8: 07300393 addi x7,x0,115 +800076ec: 00750463 beq x10,x7,800076f4 +800076f0: 0800006f jal x0,80007770 + +800076f4 : +800076f4: 34102573 csrrs x10,mepc,x0 +800076f8: 00450413 addi x8,x10,4 +800076fc: 34141073 csrrw x0,mepc,x8 +80007700: 7c00006f jal x0,80007ec0 + +80007704 : +80007704: 341024f3 csrrs x9,mepc,x0 +80007708: 00448493 addi x9,x9,4 +8000770c: 34149073 csrrw x0,mepc,x9 +80007710: 00100393 addi x7,x0,1 +80007714: 00750e63 beq x10,x7,80007730 +80007718: 00200393 addi x7,x0,2 +8000771c: 02750263 beq x10,x7,80007740 +80007720: 00300393 addi x7,x0,3 +80007724: 02750c63 beq x10,x7,8000775c +80007728: fff00513 addi x10,x0,-1 +8000772c: 7940006f jal x0,80007ec0 + +80007730 : +80007730: 000024b7 lui x9,0x2 +80007734: 80048493 addi x9,x9,-2048 # 1800 +80007738: 3004a073 csrrs x0,mstatus,x9 +8000773c: 7840006f jal x0,80007ec0 + +80007740 : +80007740: 000024b7 lui x9,0x2 +80007744: 80048493 addi x9,x9,-2048 # 1800 +80007748: 3004b073 csrrc x0,mstatus,x9 +8000774c: 000014b7 lui x9,0x1 +80007750: 80048493 addi x9,x9,-2048 # 800 +80007754: 3004a073 csrrs x0,mstatus,x9 +80007758: 7680006f jal x0,80007ec0 + +8000775c : +8000775c: 000024b7 lui x9,0x2 +80007760: 80048493 addi x9,x9,-2048 # 1800 +80007764: 3004b073 csrrc x0,mstatus,x9 +80007768: 7580006f jal x0,80007ec0 + +8000776c : +8000776c: 00000013 addi x0,x0,0 + +80007770 : +80007770: 00000013 addi x0,x0,0 +80007774: 00000013 addi x0,x0,0 +80007778: 00000013 addi x0,x0,0 +8000777c: 00000013 addi x0,x0,0 +80007780: 00000397 auipc x7,0x0 +80007784: 17038393 addi x7,x7,368 # 800078f0 +80007788: 00000013 addi x0,x0,0 +8000778c: 00000013 addi x0,x0,0 +80007790: 00000013 addi x0,x0,0 +80007794: 00000013 addi x0,x0,0 +80007798: 00000013 addi x0,x0,0 +8000779c: 00000013 addi x0,x0,0 + +800077a0 : +800077a0: 0003a403 lw x8,0(x7) +800077a4: 00a40863 beq x8,x10,800077b4 +800077a8: 04040863 beq x8,x0,800077f8 +800077ac: 00838393 addi x7,x7,8 +800077b0: ff1ff06f jal x0,800077a0 + +800077b4 : +800077b4: 00008493 addi x9,x1,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000097 auipc x1,0x0 +800077c4: 02408093 addi x1,x1,36 # 800077e4 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 +800077e0: 00038067 jalr x0,0(x7) + +800077e4 : +800077e4: 00048093 addi x1,x9,0 +800077e8: 34102473 csrrs x8,mepc,x0 +800077ec: 00440413 addi x8,x8,4 +800077f0: 34141073 csrrw x0,mepc,x8 +800077f4: 6cc0006f jal x0,80007ec0 + +800077f8 : +800077f8: 00050493 addi x9,x10,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00012517 auipc x10,0x12 +80007804: 65150513 addi x10,x10,1617 # 80019e51 +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00023097 auipc x1,0x23 +80007824: d44080e7 jalr x1,-700(x1) # 8002a564 +80007828: 00048513 addi x10,x9,0 +8000782c: 02000593 addi x11,x0,32 +80007830: 4a8020ef jal x1,80009cd8 +80007834: 00000013 addi x0,x0,0 +80007838: 00000013 addi x0,x0,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00011517 auipc x10,0x11 +80007844: a7850513 addi x10,x10,-1416 # 800182b8 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00000013 addi x0,x0,0 +8000786c: 00000013 addi x0,x0,0 +80007870: 00000013 addi x0,x0,0 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: 05850513 addi x10,x10,88 # 800188d8 +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: f1250513 addi x10,x10,-238 # 800187d2 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00023097 auipc x1,0x23 +800078ec: cdc080e7 jalr x1,-804(x1) # 8002a5c4 + +800078f0 : +800078f0: 30002573 .word 0x30002573 +800078f4: 00008067 jalr x0,0(x1) +800078f8: 30059073 .word 0x30059073 +800078fc: 00008067 jalr x0,0(x1) +80007900: 3005a073 .word 0x3005a073 +80007904: 00008067 jalr x0,0(x1) +80007908: 3005b073 .word 0x3005b073 +8000790c: 00008067 jalr x0,0(x1) +80007910: 30402573 .word 0x30402573 +80007914: 00008067 jalr x0,0(x1) +80007918: 30459073 .word 0x30459073 +8000791c: 00008067 jalr x0,0(x1) +80007920: 3045a073 .word 0x3045a073 +80007924: 00008067 jalr x0,0(x1) +80007928: 3045b073 .word 0x3045b073 +8000792c: 00008067 jalr x0,0(x1) +80007930: 30602573 .word 0x30602573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30659073 .word 0x30659073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3065a073 .word 0x3065a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3065b073 .word 0x3065b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30a02573 .word 0x30a02573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30a59073 .word 0x30a59073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 30a5a073 .word 0x30a5a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 30a5b073 .word 0x30a5b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 34402573 .word 0x34402573 +80007974: 00008067 jalr x0,0(x1) +80007978: 34459073 .word 0x34459073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3445a073 .word 0x3445a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3445b073 .word 0x3445b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 74702573 .word 0x74702573 +80007994: 00008067 jalr x0,0(x1) +80007998: 74759073 .word 0x74759073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 7475a073 .word 0x7475a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 7475b073 .word 0x7475b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 32002573 .word 0x32002573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 32059073 .word 0x32059073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3205a073 .word 0x3205a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3205b073 .word 0x3205b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: b0002573 .word 0xb0002573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: b0059073 .word 0xb0059073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: b005a073 .word 0xb005a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: b005b073 .word 0xb005b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: b0202573 .word 0xb0202573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: b0259073 .word 0xb0259073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: b025a073 .word 0xb025a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: b025b073 .word 0xb025b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: 10002573 .word 0x10002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: 10059073 .word 0x10059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: 1005a073 .word 0x1005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: 1005b073 .word 0x1005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: 10402573 .word 0x10402573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: 10459073 .word 0x10459073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: 1045a073 .word 0x1045a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: 1045b073 .word 0x1045b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10602573 .word 0x10602573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10659073 .word 0x10659073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1065a073 .word 0x1065a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1065b073 .word 0x1065b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10a02573 .word 0x10a02573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10a59073 .word 0x10a59073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 10a5a073 .word 0x10a5a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 10a5b073 .word 0x10a5b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 14402573 .word 0x14402573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 14459073 .word 0x14459073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1445a073 .word 0x1445a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1445b073 .word 0x1445b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 14d02573 .word 0x14d02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 14d59073 .word 0x14d59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 14d5a073 .word 0x14d5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 14d5b073 .word 0x14d5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 18002573 .word 0x18002573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 18059073 .word 0x18059073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1805a073 .word 0x1805a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1805b073 .word 0x1805b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 7a002573 .word 0x7a002573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 7a059073 .word 0x7a059073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 7a05a073 .word 0x7a05a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 7a05b073 .word 0x7a05b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 7a102573 .word 0x7a102573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 7a159073 .word 0x7a159073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 7a15a073 .word 0x7a15a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 7a15b073 .word 0x7a15b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a202573 .word 0x7a202573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a259073 .word 0x7a259073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a25a073 .word 0x7a25a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a25b073 .word 0x7a25b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a302573 .word 0x7a302573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a359073 .word 0x7a359073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a35a073 .word 0x7a35a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a35b073 .word 0x7a35b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a402573 .word 0x7a402573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a459073 .word 0x7a459073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a45a073 .word 0x7a45a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a45b073 .word 0x7a45b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a502573 .word 0x7a502573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a559073 .word 0x7a559073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a55a073 .word 0x7a55a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a55b073 .word 0x7a55b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a802573 .word 0x7a802573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a859073 .word 0x7a859073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a85a073 .word 0x7a85a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a85b073 .word 0x7a85b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7aa02573 .word 0x7aa02573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7aa59073 .word 0x7aa59073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7aa5a073 .word 0x7aa5a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7aa5b073 .word 0x7aa5b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 5a802573 .word 0x5a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 5a859073 .word 0x5a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 5a85a073 .word 0x5a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 5a85b073 .word 0x5a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 6a802573 .word 0x6a802573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 6a859073 .word 0x6a859073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 6a85a073 .word 0x6a85a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 6a85b073 .word 0x6a85b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 0005a503 lw x10,0(x11) +80007c34: 00008067 jalr x0,0(x1) +80007c38: 0045a503 lw x10,4(x11) +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 00c5a023 sw x12,0(x11) +80007c44: 00008067 jalr x0,0(x1) +80007c48: 00c5a223 sw x12,4(x11) +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 00000000 .word 0x00000000 + +80007c54 : +80007c54: 01000393 addi x7,x0,16 +80007c58: 00075c63 bge x14,x0,80007c70 + +80007c5c : +80007c5c: 00171413 slli x8,x14,0x1 +80007c60: ff240413 addi x8,x8,-14 +80007c64: 00045663 bge x8,x0,80007c70 +80007c68: 00c00393 addi x7,x0,12 +80007c6c: 0040006f jal x0,80007c70 + +80007c70 : +80007c70: d6810113 addi x2,x2,-664 +80007c74: 4b012303 lw x6,1200(x2) +80007c78: 007304b3 add x9,x6,x7 +80007c7c: 4a912823 sw x9,1200(x2) +80007c80: 49012403 lw x8,1168(x2) +80007c84: 40830333 sub x6,x6,x8 +80007c88: 29810113 addi x2,x2,664 +80007c8c: 1f812403 lw x8,504(x2) +80007c90: 00830333 add x6,x6,x8 +80007c94: 34102473 csrrs x8,mepc,x0 +80007c98: 00000013 addi x0,x0,0 +80007c9c: 00000013 addi x0,x0,0 +80007ca0: 00010497 auipc x9,0x10 +80007ca4: 5f848493 addi x9,x9,1528 # 80018298 +80007ca8: 00000013 addi x0,x0,0 +80007cac: 00000013 addi x0,x0,0 +80007cb0: 00000013 addi x0,x0,0 +80007cb4: 00000013 addi x0,x0,0 +80007cb8: 00000013 addi x0,x0,0 +80007cbc: 00000013 addi x0,x0,0 +80007cc0: 0084a023 sw x8,0(x9) +80007cc4: 00e4a423 sw x14,8(x9) +80007cc8: 34302473 csrrs x8,mtval,x0 +80007ccc: 0084a823 sw x8,16(x9) +80007cd0: 30002473 csrrs x8,mstatus,x0 +80007cd4: 0084ac23 sw x8,24(x9) +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00021417 auipc x8,0x21 +80007ce4: 68c40413 addi x8,x8,1676 # 8002936c +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 007304b3 add x9,x6,x7 +80007d04: f2946663 bltu x8,x9,80007430 + +80007d08 : +80007d08: 24012403 lw x8,576(x2) +80007d0c: 408787b3 sub x15,x15,x8 +80007d10: 00179493 slli x9,x15,0x1 +80007d14: 009787b3 add x15,x15,x9 +80007d18: 0057d793 srli x15,x15,0x5 +80007d1c: 00679793 slli x15,x15,0x6 +80007d20: 0077e7b3 or x15,x15,x7 +80007d24: 00378793 addi x15,x15,3 +80007d28: 02075a63 bge x14,x0,80007d5c +80007d2c: 00f00413 addi x8,x0,15 +80007d30: 00877433 and x8,x14,x8 +80007d34: 304024f3 csrrs x9,mie,x0 +80007d38: 0084d4b3 srl x9,x9,x8 +80007d3c: 0014f493 andi x9,x9,1 +80007d40: 00b49493 slli x9,x9,0xb +80007d44: 0097e7b3 or x15,x15,x9 +80007d48: 344024f3 csrrs x9,mip,x0 +80007d4c: 0084d4b3 srl x9,x9,x8 +80007d50: 0014f493 andi x9,x9,1 +80007d54: 00c49493 slli x9,x9,0xc +80007d58: 0097e7b3 or x15,x15,x9 +80007d5c: 300023f3 csrrs x7,mstatus,x0 +80007d60: 00f39393 slli x7,x7,0xf +80007d64: 0023d393 srli x7,x7,0x2 +80007d68: 0021a437 lui x8,0x21a +80007d6c: fe540413 addi x8,x8,-27 # 219fe5 +80007d70: fff44413 xori x8,x8,-1 +80007d74: 0083f433 and x8,x7,x8 +80007d78: 0087e433 or x8,x15,x8 +80007d7c: 310024f3 csrrs x9,0x310,x0 +80007d80: 1c04f493 andi x9,x9,448 +80007d84: 00849493 slli x9,x9,0x8 +80007d88: 00946433 or x8,x8,x9 +80007d8c: 00032483 lw x9,0(x6) +80007d90: 00848e63 beq x9,x8,80007dac +80007d94: 00040313 addi x6,x8,0 +80007d98: 00048213 addi x4,x9,0 +80007d9c: 48c003ef jal x7,80008228 +80007da0: 80007d08 .word 0x80007d08 +80007da4: 800189da .word 0x800189da +80007da8: 00000341 .word 0x00000341 + +80007dac : +80007dac: 00070413 addi x8,x14,0 +80007db0: 00432483 lw x9,4(x6) +80007db4: 00848e63 beq x9,x8,80007dd0 +80007db8: 00040313 addi x6,x8,0 +80007dbc: 00048213 addi x4,x9,0 +80007dc0: 468003ef jal x7,80008228 +80007dc4: 80007dac .word 0x80007dac +80007dc8: 80018adc .word 0x80018adc +80007dcc: 00000341 .word 0x00000341 +80007dd0: 10074863 blt x14,x0,80007ee0 + +80007dd4 : +80007dd4: 34102473 csrrs x8,mepc,x0 +80007dd8: 00010493 addi x9,x2,0 +80007ddc: 0040006f jal x0,80007de0 + +80007de0 : +80007de0: 08000393 addi x7,x0,128 +80007de4: 04740863 beq x8,x7,80007e34 +80007de8: 00238393 addi x7,x7,2 +80007dec: 04740463 beq x8,x7,80007e34 +80007df0: 04040263 beq x8,x0,80007e34 +80007df4: 2084a383 lw x7,520(x9) +80007df8: 2104a783 lw x15,528(x9) +80007dfc: 007787b3 add x15,x15,x7 +80007e00: 00f47463 bgeu x8,x15,80007e08 +80007e04: 02747663 bgeu x8,x7,80007e30 + +80007e08 : +80007e08: 1d84a383 lw x7,472(x9) +80007e0c: 1e04a783 lw x15,480(x9) +80007e10: 007787b3 add x15,x15,x7 +80007e14: 00f47463 bgeu x8,x15,80007e1c +80007e18: 00747c63 bgeu x8,x7,80007e30 + +80007e1c : +80007e1c: 1e84a383 lw x7,488(x9) +80007e20: 1f04a783 lw x15,496(x9) +80007e24: 007787b3 add x15,x15,x7 +80007e28: e2f47e63 bgeu x8,x15,80007464 +80007e2c: e2746c63 bltu x8,x7,80007464 + +80007e30 : +80007e30: 40740433 sub x8,x8,x7 + +80007e34 : +80007e34: 00832483 lw x9,8(x6) +80007e38: 00848e63 beq x9,x8,80007e54 +80007e3c: 00040313 addi x6,x8,0 +80007e40: 00048213 addi x4,x9,0 +80007e44: 3e4003ef jal x7,80008228 +80007e48: 80007e34 .word 0x80007e34 +80007e4c: 80018bd7 .word 0x80018bd7 +80007e50: 00000341 .word 0x00000341 + +80007e54 : +80007e54: 34102473 csrrs x8,mepc,x0 +80007e58: 342023f3 csrrs x7,mcause,x0 +80007e5c: 00c00793 addi x15,x0,12 +80007e60: 00f38a63 beq x7,x15,80007e74 +80007e64: 00100793 addi x15,x0,1 +80007e68: 00f38663 beq x7,x15,80007e74 +80007e6c: 01400793 addi x15,x0,20 +80007e70: 00f39663 bne x7,x15,80007e7c +80007e74: 34109073 csrrw x0,mepc,x1 +80007e78: 0100006f jal x0,80007e88 + +80007e7c : +80007e7c: 00400393 addi x7,x0,4 +80007e80: 00740433 add x8,x8,x7 +80007e84: 34141073 csrrw x0,mepc,x8 + +80007e88 : +80007e88: 34302473 csrrs x8,mtval,x0 + +80007e8c : +80007e8c: 00c32483 lw x9,12(x6) +80007e90: 00848e63 beq x9,x8,80007eac +80007e94: 00040313 addi x6,x8,0 +80007e98: 00048213 addi x4,x9,0 +80007e9c: 38c003ef jal x7,80008228 +80007ea0: 80007e8c .word 0x80007e8c +80007ea4: 80018cca .word 0x80018cca +80007ea8: 00000341 .word 0x00000341 + +80007eac : +80007eac: 30102473 csrrs x8,misa,x0 +80007eb0: 01841413 slli x8,x8,0x18 +80007eb4: 00045263 bge x8,x0,80007eb8 + +80007eb8 : +80007eb8: 10000393 addi x7,x0,256 +80007ebc: 05c0006f jal x0,80007f18 + +80007ec0 : +80007ec0: 25c12303 lw x6,604(x2) +80007ec4: 26012383 lw x7,608(x2) +80007ec8: 26412403 lw x8,612(x2) +80007ecc: 26812483 lw x9,616(x2) +80007ed0: 26c12703 lw x14,620(x2) +80007ed4: 27012783 lw x15,624(x2) +80007ed8: 27412103 lw x2,628(x2) +80007edc: 30200073 mret + +80007ee0 : +80007ee0: 00100413 addi x8,x0,1 +80007ee4: 01f77393 andi x7,x14,31 +80007ee8: 00741433 sll x8,x8,x7 +80007eec: 304434f3 csrrc x9,mie,x8 +80007ef0: 34443473 csrrc x8,mip,x8 + +80007ef4 : +80007ef4: 00832483 lw x9,8(x6) +80007ef8: 00848e63 beq x9,x8,80007f14 +80007efc: 00040313 addi x6,x8,0 +80007f00: 00048213 addi x4,x9,0 +80007f04: 324003ef jal x7,80008228 +80007f08: 80007ef4 .word 0x80007ef4 +80007f0c: 80018e3d .word 0x80018e3d +80007f10: 00000341 .word 0x00000341 +80007f14: 00000393 addi x7,x0,0 + +80007f18 : +80007f18: 00000417 auipc x8,0x0 +80007f1c: 03c40413 addi x8,x8,60 # 80007f54 +80007f20: 00740433 add x8,x8,x7 +80007f24: 00371393 slli x7,x14,0x3 +80007f28: 00740433 add x8,x8,x7 +80007f2c: ff847413 andi x8,x8,-8 +80007f30: 00042403 lw x8,0(x8) + +80007f34 : +80007f34: 00040a63 beq x8,x0,80007f48 +80007f38: 01f41393 slli x7,x8,0x1f +80007f3c: 0003d863 bge x7,x0,80007f4c +80007f40: 00145413 srli x8,x8,0x1 +80007f44: f6870ee3 beq x14,x8,80007ec0 +80007f48: d1cff06f jal x0,80007464 + +80007f4c : +80007f4c: 00040067 jalr x0,0(x8) + +80007f50 : + ... +80007f58: 00000001 .word 0x00000001 +80007f5c: 00000000 .word 0x00000000 +80007f60: 00000001 .word 0x00000001 +80007f64: 00000000 .word 0x00000000 +80007f68: 8002a000 .word 0x8002a000 + ... +80007f78: 00000001 .word 0x00000001 +80007f7c: 00000000 .word 0x00000000 +80007f80: 00000001 .word 0x00000001 +80007f84: 00000000 .word 0x00000000 +80007f88: 8002a014 .word 0x8002a014 + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a030 .word 0x8002a030 +80007fac: 00000000 .word 0x00000000 +80007fb0: 00000001 .word 0x00000001 +80007fb4: 00000000 .word 0x00000000 +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 00000001 .word 0x00000001 +80007fcc: 00000000 .word 0x00000000 +80007fd0: 00000001 .word 0x00000001 +80007fd4: 00000000 .word 0x00000000 +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 00000001 .word 0x00000001 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 + ... + +80008050 : +80008050: 00000001 .word 0x00000001 +80008054: 00000000 .word 0x00000000 +80008058: 00000003 .word 0x00000003 +8000805c: 00000000 .word 0x00000000 +80008060: 00000005 .word 0x00000005 +80008064: 00000000 .word 0x00000000 +80008068: 00000007 .word 0x00000007 +8000806c: 00000000 .word 0x00000000 +80008070: 00000009 .word 0x00000009 +80008074: 00000000 .word 0x00000000 +80008078: 0000000b .word 0x0000000b +8000807c: 00000000 .word 0x00000000 +80008080: 0000000d .word 0x0000000d +80008084: 00000000 .word 0x00000000 +80008088: 0000000f .word 0x0000000f +8000808c: 00000000 .word 0x00000000 +80008090: 00000011 .word 0x00000011 +80008094: 00000000 .word 0x00000000 +80008098: 00000013 .word 0x00000013 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000015 .word 0x00000015 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000017 .word 0x00000017 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000019 .word 0x00000019 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000001b .word 0x0000001b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000001d .word 0x0000001d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000001f .word 0x0000001f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000021 .word 0x00000021 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000023 .word 0x00000023 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000025 .word 0x00000025 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000027 .word 0x00000027 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000029 .word 0x00000029 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000002b .word 0x0000002b +800080fc: 00000000 .word 0x00000000 +80008100: 0000002d .word 0x0000002d +80008104: 00000000 .word 0x00000000 +80008108: 0000002f .word 0x0000002f + ... + +80008150 : +80008150: 300023f3 csrrs x7,mstatus,x0 +80008154: 00b3d493 srli x9,x7,0xb +80008158: 0034f493 andi x9,x9,3 +8000815c: ffd48413 addi x8,x9,-3 +80008160: 341023f3 csrrs x7,mepc,x0 +80008164: 00000493 addi x9,x0,0 +80008168: 02040c63 beq x8,x0,800081a0 +8000816c: 29810113 addi x2,x2,664 +80008170: 310023f3 csrrs x7,0x310,x0 +80008174: 01839393 slli x7,x7,0x18 +80008178: 0003da63 bge x7,x0,8000818c + +8000817c : +8000817c: 29810113 addi x2,x2,664 +80008180: 47012783 lw x15,1136(x2) +80008184: d6810113 addi x2,x2,-664 +80008188: 0080006f jal x0,80008190 + +8000818c : +8000818c: f4012783 lw x15,-192(x2) +80008190: 341023f3 csrrs x7,mepc,x0 +80008194: 40f383b3 sub x7,x7,x15 +80008198: d6810113 addi x2,x2,-664 +8000819c: 1d812483 lw x9,472(x2) + +800081a0 : +800081a0: 007483b3 add x7,x9,x7 +800081a4: 25c12303 lw x6,604(x2) +800081a8: 26412403 lw x8,612(x2) +800081ac: 26812483 lw x9,616(x2) +800081b0: 26c12703 lw x14,620(x2) +800081b4: 27012783 lw x15,624(x2) +800081b8: 27412103 lw x2,628(x2) +800081bc: 00438067 jalr x0,4(x7) + +800081c0 : +800081c0: 00010217 auipc x4,0x10 +800081c4: f9020213 addi x4,x4,-112 # 80018150 +800081c8: 02522423 sw x5,40(x4) # 28 +800081cc: 00122423 sw x1,8(x4) # 8 +800081d0: 00022023 sw x0,0(x4) # 0 +800081d4: 0880006f jal x0,8000825c + +800081d8 : +800081d8: 00010397 auipc x7,0x10 +800081dc: f7838393 addi x7,x7,-136 # 80018150 +800081e0: 0483a023 sw x8,64(x7) +800081e4: 0243a023 sw x4,32(x7) +800081e8: 0253a423 sw x5,40(x7) +800081ec: 0013a423 sw x1,8(x7) +800081f0: 0003a023 sw x0,0(x7) +800081f4: 00038213 addi x4,x7,0 +800081f8: 00040293 addi x5,x8,0 +800081fc: 0600006f jal x0,8000825c + +80008200 : +80008200: 00010697 auipc x13,0x10 +80008204: f5068693 addi x13,x13,-176 # 80018150 +80008208: 06e6a823 sw x14,112(x13) +8000820c: 0246a023 sw x4,32(x13) +80008210: 0256a423 sw x5,40(x13) +80008214: 0016a423 sw x1,8(x13) +80008218: 0006a023 sw x0,0(x13) +8000821c: 00068213 addi x4,x13,0 +80008220: 00070293 addi x5,x14,0 +80008224: 0380006f jal x0,8000825c + +80008228 : +80008228: 00010497 auipc x9,0x10 +8000822c: f2848493 addi x9,x9,-216 # 80018150 +80008230: 0674a423 sw x7,104(x9) +80008234: 0244a023 sw x4,32(x9) +80008238: 0254a423 sw x5,40(x9) +8000823c: 0014a423 sw x1,8(x9) +80008240: 00300093 addi x1,x0,3 +80008244: 0014a023 sw x1,0(x9) +80008248: 1064a823 sw x6,272(x9) +8000824c: 1044ac23 sw x4,280(x9) +80008250: 00048213 addi x4,x9,0 +80008254: 00038293 addi x5,x7,0 +80008258: 0040006f jal x0,8000825c + +8000825c : +8000825c: 00222823 sw x2,16(x4) # 10 +80008260: 00322c23 sw x3,24(x4) # 18 +80008264: 02622823 sw x6,48(x4) # 30 +80008268: 02722c23 sw x7,56(x4) # 38 +8000826c: 04822023 sw x8,64(x4) # 40 +80008270: 04922423 sw x9,72(x4) # 48 +80008274: 04a22823 sw x10,80(x4) # 50 +80008278: 04b22c23 sw x11,88(x4) # 58 +8000827c: 06c22023 sw x12,96(x4) # 60 +80008280: 06d22423 sw x13,104(x4) # 68 +80008284: 06e22823 sw x14,112(x4) # 70 +80008288: 06f22c23 sw x15,120(x4) # 78 +8000828c: 09022023 sw x16,128(x4) # 80 +80008290: 09122423 sw x17,136(x4) # 88 +80008294: 09222823 sw x18,144(x4) # 90 +80008298: 09322c23 sw x19,152(x4) # 98 +8000829c: 0b422023 sw x20,160(x4) # a0 +800082a0: 0b522423 sw x21,168(x4) # a8 +800082a4: 0b622823 sw x22,176(x4) # b0 +800082a8: 0b722c23 sw x23,184(x4) # b8 +800082ac: 0d822023 sw x24,192(x4) # c0 +800082b0: 0d922423 sw x25,200(x4) # c8 +800082b4: 0da22823 sw x26,208(x4) # d0 +800082b8: 0db22c23 sw x27,216(x4) # d8 +800082bc: 0fc22023 sw x28,224(x4) # e0 +800082c0: 0fd22423 sw x29,232(x4) # e8 +800082c4: 0fe22823 sw x30,240(x4) # f0 +800082c8: 0ff22c23 sw x31,248(x4) # f8 + +800082cc : +800082cc: 00010497 auipc x9,0x10 +800082d0: e844a483 lw x9,-380(x9) # 80018150 +800082d4: 00300513 addi x10,x0,3 +800082d8: 18a48a63 beq x9,x10,8000846c + +800082dc : +800082dc: ffa2d303 lhu x6,-6(x5) +800082e0: ff82d383 lhu x7,-8(x5) +800082e4: 01031313 slli x6,x6,0x10 +800082e8: 00736333 or x6,x6,x7 +800082ec: 00f35393 srli x7,x6,0xf +800082f0: 01f3f393 andi x7,x7,31 +800082f4: 01435413 srli x8,x6,0x14 +800082f8: 01f47413 andi x8,x8,31 +800082fc: 10822223 sw x8,260(x4) # 104 +80008300: 00341313 slli x6,x8,0x3 +80008304: 00620333 add x6,x4,x6 +80008308: 00032303 lw x6,0(x6) +8000830c: 10622823 sw x6,272(x4) # 110 +80008310: ff62d303 lhu x6,-10(x5) +80008314: ff42d383 lhu x7,-12(x5) +80008318: 01031313 slli x6,x6,0x10 +8000831c: 00736333 or x6,x6,x7 +80008320: 00030513 addi x10,x6,0 +80008324: 07f37413 andi x8,x6,127 +80008328: 00300493 addi x9,x0,3 +8000832c: 0c941463 bne x8,x9,800083f4 +80008330: 00c35413 srli x8,x6,0xc +80008334: 00747413 andi x8,x8,7 +80008338: 00200493 addi x9,x0,2 +8000833c: 0a941c63 bne x8,x9,800083f4 +80008340: 41435393 srai x7,x6,0x14 +80008344: 00f35313 srli x6,x6,0xf +80008348: 01f37313 andi x6,x6,31 +8000834c: 00331313 slli x6,x6,0x3 +80008350: 00620333 add x6,x4,x6 +80008354: 00032303 lw x6,0(x6) +80008358: 00730333 add x6,x6,x7 +8000835c: 00337413 andi x8,x6,3 +80008360: 0c041663 bne x8,x0,8000842c +80008364: 00000013 addi x0,x0,0 +80008368: 00000013 addi x0,x0,0 +8000836c: 00000013 addi x0,x0,0 +80008370: 00000013 addi x0,x0,0 +80008374: 00000013 addi x0,x0,0 +80008378: 00000013 addi x0,x0,0 +8000837c: 00000013 addi x0,x0,0 +80008380: 00012417 auipc x8,0x12 +80008384: b2040413 addi x8,x8,-1248 # 80019ea0 +80008388: 00000013 addi x0,x0,0 +8000838c: 00000013 addi x0,x0,0 +80008390: 00000013 addi x0,x0,0 +80008394: 00000013 addi x0,x0,0 +80008398: 00000013 addi x0,x0,0 +8000839c: 00000013 addi x0,x0,0 +800083a0: 08836663 bltu x6,x8,8000842c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00021417 auipc x8,0x21 +800083c4: fb040413 addi x8,x8,-80 # 80029370 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: ffc40413 addi x8,x8,-4 +800083e4: 04646463 bltu x8,x6,8000842c +800083e8: 00032303 lw x6,0(x6) +800083ec: 10622c23 sw x6,280(x4) # 118 +800083f0: 3700006f jal x0,80008760 + +800083f4 : +800083f4: 00100413 addi x8,x0,1 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00010497 auipc x9,0x10 +80008404: e7848493 addi x9,x9,-392 # 80018278 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: 0084a023 sw x8,0(x9) +80008424: 10a22c23 sw x10,280(x4) # 118 +80008428: 3380006f jal x0,80008760 + +8000842c : +8000842c: 00200413 addi x8,x0,2 +80008430: 00000013 addi x0,x0,0 +80008434: 00000013 addi x0,x0,0 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: e3848493 addi x9,x9,-456 # 80018278 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10622c23 sw x6,280(x4) # 118 +80008468: 2f80006f jal x0,80008760 + +8000846c : +8000846c: 0042a303 lw x6,4(x5) +80008470: 00010817 auipc x16,0x10 +80008474: e1880813 addi x16,x16,-488 # 80018288 +80008478: 00682023 sw x6,0(x16) +8000847c: 0002a303 lw x6,0(x5) +80008480: 10622423 sw x6,264(x4) # 108 +80008484: 00010817 auipc x16,0x10 +80008488: e0480813 addi x16,x16,-508 # 80018288 +8000848c: 00082303 lw x6,0(x16) +80008490: 00010397 auipc x7,0x10 +80008494: 53338393 addi x7,x7,1331 # 800189c3 +80008498: 28730463 beq x6,x7,80008720 +8000849c: 00000413 addi x8,x0,0 +800084a0: 00010817 auipc x16,0x10 +800084a4: de080813 addi x16,x16,-544 # 80018280 +800084a8: 00882023 sw x8,0(x16) +800084ac: 00010397 auipc x7,0x10 +800084b0: 52e38393 addi x7,x7,1326 # 800189da +800084b4: 00731863 bne x6,x7,800084c4 +800084b8: 00100413 addi x8,x0,1 +800084bc: 00000493 addi x9,x0,0 +800084c0: 2740006f jal x0,80008734 +800084c4: 00010397 auipc x7,0x10 +800084c8: 61838393 addi x7,x7,1560 # 80018adc +800084cc: 00731863 bne x6,x7,800084dc +800084d0: 00200413 addi x8,x0,2 +800084d4: 00000493 addi x9,x0,0 +800084d8: 25c0006f jal x0,80008734 +800084dc: 00010397 auipc x7,0x10 +800084e0: 6fb38393 addi x7,x7,1787 # 80018bd7 +800084e4: 00731863 bne x6,x7,800084f4 +800084e8: 00300413 addi x8,x0,3 +800084ec: 00000493 addi x9,x0,0 +800084f0: 2440006f jal x0,80008734 +800084f4: 00010397 auipc x7,0x10 +800084f8: 7d638393 addi x7,x7,2006 # 80018cca +800084fc: 00731863 bne x6,x7,8000850c +80008500: 00400413 addi x8,x0,4 +80008504: 00000493 addi x9,x0,0 +80008508: 22c0006f jal x0,80008734 +8000850c: 00011397 auipc x7,0x11 +80008510: 93138393 addi x7,x7,-1743 # 80018e3d +80008514: 00731863 bne x6,x7,80008524 +80008518: 00500413 addi x8,x0,5 +8000851c: 00000493 addi x9,x0,0 +80008520: 2140006f jal x0,80008734 +80008524: 00011397 auipc x7,0x11 +80008528: 89d38393 addi x7,x7,-1891 # 80018dc1 +8000852c: 00731863 bne x6,x7,8000853c +80008530: 00600413 addi x8,x0,6 +80008534: 00000493 addi x9,x0,0 +80008538: 1fc0006f jal x0,80008734 +8000853c: 00011397 auipc x7,0x11 +80008540: 8c338393 addi x7,x7,-1853 # 80018dff +80008544: 00731863 bne x6,x7,80008554 +80008548: 00700413 addi x8,x0,7 +8000854c: 00000493 addi x9,x0,0 +80008550: 1e40006f jal x0,80008734 +80008554: 00010397 auipc x7,0x10 +80008558: 4c638393 addi x7,x7,1222 # 80018a1a +8000855c: 00731863 bne x6,x7,8000856c +80008560: 00100413 addi x8,x0,1 +80008564: 00100493 addi x9,x0,1 +80008568: 1cc0006f jal x0,80008734 +8000856c: 00010397 auipc x7,0x10 +80008570: 5ae38393 addi x7,x7,1454 # 80018b1a +80008574: 00731863 bne x6,x7,80008584 +80008578: 00200413 addi x8,x0,2 +8000857c: 00100493 addi x9,x0,1 +80008580: 1b40006f jal x0,80008734 +80008584: 00010397 auipc x7,0x10 +80008588: 68f38393 addi x7,x7,1679 # 80018c13 +8000858c: 00731863 bne x6,x7,8000859c +80008590: 00300413 addi x8,x0,3 +80008594: 00100493 addi x9,x0,1 +80008598: 19c0006f jal x0,80008734 +8000859c: 00010397 auipc x7,0x10 +800085a0: 76b38393 addi x7,x7,1899 # 80018d07 +800085a4: 00731863 bne x6,x7,800085b4 +800085a8: 00400413 addi x8,x0,4 +800085ac: 00100493 addi x9,x0,1 +800085b0: 1840006f jal x0,80008734 +800085b4: 00011397 auipc x7,0x11 +800085b8: 8c438393 addi x7,x7,-1852 # 80018e78 +800085bc: 00731863 bne x6,x7,800085cc +800085c0: 00500413 addi x8,x0,5 +800085c4: 00100493 addi x9,x0,1 +800085c8: 16c0006f jal x0,80008734 +800085cc: 00010397 auipc x7,0x10 +800085d0: 48e38393 addi x7,x7,1166 # 80018a5a +800085d4: 00731863 bne x6,x7,800085e4 +800085d8: 00100413 addi x8,x0,1 +800085dc: 00200493 addi x9,x0,2 +800085e0: 1540006f jal x0,80008734 +800085e4: 00010397 auipc x7,0x10 +800085e8: 57438393 addi x7,x7,1396 # 80018b58 +800085ec: 00731863 bne x6,x7,800085fc +800085f0: 00200413 addi x8,x0,2 +800085f4: 00200493 addi x9,x0,2 +800085f8: 13c0006f jal x0,80008734 +800085fc: 00010397 auipc x7,0x10 +80008600: 65338393 addi x7,x7,1619 # 80018c4f +80008604: 00731863 bne x6,x7,80008614 +80008608: 00300413 addi x8,x0,3 +8000860c: 00200493 addi x9,x0,2 +80008610: 1240006f jal x0,80008734 +80008614: 00010397 auipc x7,0x10 +80008618: 73038393 addi x7,x7,1840 # 80018d44 +8000861c: 00731863 bne x6,x7,8000862c +80008620: 00400413 addi x8,x0,4 +80008624: 00200493 addi x9,x0,2 +80008628: 10c0006f jal x0,80008734 +8000862c: 00011397 auipc x7,0x11 +80008630: 88738393 addi x7,x7,-1913 # 80018eb3 +80008634: 00731863 bne x6,x7,80008644 +80008638: 00500413 addi x8,x0,5 +8000863c: 00200493 addi x9,x0,2 +80008640: 0f40006f jal x0,80008734 +80008644: 00010397 auipc x7,0x10 +80008648: 45738393 addi x7,x7,1111 # 80018a9b +8000864c: 00731863 bne x6,x7,8000865c +80008650: 00100413 addi x8,x0,1 +80008654: 00300493 addi x9,x0,3 +80008658: 0dc0006f jal x0,80008734 +8000865c: 00010397 auipc x7,0x10 +80008660: 53b38393 addi x7,x7,1339 # 80018b97 +80008664: 00731863 bne x6,x7,80008674 +80008668: 00200413 addi x8,x0,2 +8000866c: 00300493 addi x9,x0,3 +80008670: 0c40006f jal x0,80008734 +80008674: 00010397 auipc x7,0x10 +80008678: 61838393 addi x7,x7,1560 # 80018c8c +8000867c: 00731863 bne x6,x7,8000868c +80008680: 00300413 addi x8,x0,3 +80008684: 00300493 addi x9,x0,3 +80008688: 0ac0006f jal x0,80008734 +8000868c: 00010397 auipc x7,0x10 +80008690: 6f638393 addi x7,x7,1782 # 80018d82 +80008694: 00731863 bne x6,x7,800086a4 +80008698: 00400413 addi x8,x0,4 +8000869c: 00300493 addi x9,x0,3 +800086a0: 0940006f jal x0,80008734 +800086a4: 00011397 auipc x7,0x11 +800086a8: 84b38393 addi x7,x7,-1973 # 80018eef +800086ac: 00731863 bne x6,x7,800086bc +800086b0: 00500413 addi x8,x0,5 +800086b4: 00300493 addi x9,x0,3 +800086b8: 07c0006f jal x0,80008734 +800086bc: 00011397 auipc x7,0x11 +800086c0: 87038393 addi x7,x7,-1936 # 80018f2c +800086c4: 00731863 bne x6,x7,800086d4 +800086c8: 00800413 addi x8,x0,8 +800086cc: 00000493 addi x9,x0,0 +800086d0: 0640006f jal x0,80008734 +800086d4: 00011397 auipc x7,0x11 +800086d8: 8a738393 addi x7,x7,-1881 # 80018f7b +800086dc: 00731863 bne x6,x7,800086ec +800086e0: 00800413 addi x8,x0,8 +800086e4: 00000493 addi x9,x0,0 +800086e8: 04c0006f jal x0,80008734 +800086ec: 00011397 auipc x7,0x11 +800086f0: 98a38393 addi x7,x7,-1654 # 80019076 +800086f4: 00731863 bne x6,x7,80008704 +800086f8: 00800413 addi x8,x0,8 +800086fc: 00100493 addi x9,x0,1 +80008700: 0340006f jal x0,80008734 +80008704: 00011397 auipc x7,0x11 +80008708: a6e38393 addi x7,x7,-1426 # 80019172 +8000870c: 00731863 bne x6,x7,8000871c +80008710: 00800413 addi x8,x0,8 +80008714: 00200493 addi x9,x0,2 +80008718: 01c0006f jal x0,80008734 +8000871c: 0340006f jal x0,80008750 + +80008720 : +80008720: 00900413 addi x8,x0,9 +80008724: 00010817 auipc x16,0x10 +80008728: b5c80813 addi x16,x16,-1188 # 80018280 +8000872c: 00882023 sw x8,0(x16) +80008730: 0300006f jal x0,80008760 + +80008734 : +80008734: 00010817 auipc x16,0x10 +80008738: b4c80813 addi x16,x16,-1204 # 80018280 +8000873c: 00882023 sw x8,0(x16) +80008740: 00010817 auipc x16,0x10 +80008744: b4480813 addi x16,x16,-1212 # 80018284 +80008748: 00982023 sw x9,0(x16) +8000874c: 0140006f jal x0,80008760 + +80008750 : +80008750: 00010817 auipc x16,0x10 +80008754: b3080813 addi x16,x16,-1232 # 80018280 +80008758: 00082023 sw x0,0(x16) +8000875c: 0040006f jal x0,80008760 + +80008760 : +80008760: 0002a303 lw x6,0(x5) +80008764: 10622423 sw x6,264(x4) # 108 +80008768: 00035383 lhu x7,0(x6) +8000876c: 0033f413 andi x8,x7,3 +80008770: 00300493 addi x9,x0,3 +80008774: 00941863 bne x8,x9,80008784 +80008778: 00235403 lhu x8,2(x6) +8000877c: 01041413 slli x8,x8,0x10 +80008780: 0083e3b3 or x7,x7,x8 +80008784: 10722023 sw x7,256(x4) # 100 +80008788: 0042a303 lw x6,4(x5) +8000878c: 12622023 sw x6,288(x4) # 120 + +80008790 : +80008790: 00000013 addi x0,x0,0 +80008794: 00000013 addi x0,x0,0 +80008798: 00000013 addi x0,x0,0 +8000879c: 00000013 addi x0,x0,0 +800087a0: 00010517 auipc x10,0x10 +800087a4: 03250513 addi x10,x10,50 # 800187d2 +800087a8: 00000013 addi x0,x0,0 +800087ac: 00000013 addi x0,x0,0 +800087b0: 00000013 addi x0,x0,0 +800087b4: 00000013 addi x0,x0,0 +800087b8: 00000013 addi x0,x0,0 +800087bc: 00000013 addi x0,x0,0 +800087c0: 00022097 auipc x1,0x22 +800087c4: da4080e7 jalr x1,-604(x1) # 8002a564 +800087c8: 00000013 addi x0,x0,0 +800087cc: 00000013 addi x0,x0,0 +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: 02f50513 addi x10,x10,47 # 8001880f +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 + +80008808 : +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: 0a650513 addi x10,x10,166 # 800188c6 +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 00010517 auipc x10,0x10 +8000884c: a2852503 lw x10,-1496(x10) # 80018270 +80008850: 00022097 auipc x1,0x22 +80008854: d14080e7 jalr x1,-748(x1) # 8002a564 + +80008858 : +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: 07850513 addi x10,x10,120 # 800188d8 +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80008888: 00010517 auipc x10,0x10 +8000888c: 8c852503 lw x10,-1848(x10) # 80018150 +80008890: 00300593 addi x11,x0,3 +80008894: 52b50c63 beq x10,x11,80008dcc +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: 03a50513 addi x10,x10,58 # 800188da +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 00010517 auipc x10,0x10 +800088cc: 98852503 lw x10,-1656(x10) # 80018250 +800088d0: 02000593 addi x11,x0,32 +800088d4: 00357613 andi x12,x10,3 +800088d8: 00300693 addi x13,x0,3 +800088dc: 00d60463 beq x12,x13,800088e4 +800088e0: 01000593 addi x11,x0,16 +800088e4: 3f4010ef jal x1,80009cd8 +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 00010517 auipc x10,0x10 +80008904: 9b850513 addi x10,x10,-1608 # 800182b8 +80008908: 00000013 addi x0,x0,0 +8000890c: 00000013 addi x0,x0,0 +80008910: 00000013 addi x0,x0,0 +80008914: 00000013 addi x0,x0,0 +80008918: 00000013 addi x0,x0,0 +8000891c: 00000013 addi x0,x0,0 +80008920: 00022097 auipc x1,0x22 +80008924: c44080e7 jalr x1,-956(x1) # 8002a564 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: fae50513 addi x10,x10,-82 # 800188ee +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 00010517 auipc x10,0x10 +8000896c: 8f052503 lw x10,-1808(x10) # 80018258 +80008970: 02000593 addi x11,x0,32 +80008974: 364010ef jal x1,80009cd8 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 00010517 auipc x10,0x10 +80008984: 93850513 addi x10,x10,-1736 # 800182b8 +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00000013 addi x0,x0,0 +800089ac: 00000013 addi x0,x0,0 +800089b0: 00000013 addi x0,x0,0 +800089b4: 00000013 addi x0,x0,0 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00011517 auipc x10,0x11 +800089c4: 96550513 addi x10,x10,-1691 # 80019325 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 0000f517 auipc x10,0xf +800089ec: 76852503 lw x10,1896(x10) # 80018150 +800089f0: 00050663 beq x10,x0,800089fc +800089f4: 00300593 addi x11,x0,3 +800089f8: 04b51063 bne x10,x11,80008a38 +800089fc: 07800593 addi x11,x0,120 +80008a00: 00010617 auipc x12,0x10 +80008a04: 8b860613 addi x12,x12,-1864 # 800182b8 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00b60023 sb x11,0(x12) +80008a24: 00160613 addi x12,x12,1 +80008a28: 00010517 auipc x10,0x10 +80008a2c: 82c52503 lw x10,-2004(x10) # 80018254 +80008a30: 324010ef jal x1,80009d54 +80008a34: 1180006f jal x0,80008b4c + +80008a38 : +80008a38: 00100593 addi x11,x0,1 +80008a3c: 04b50863 beq x10,x11,80008a8c +80008a40: 00400593 addi x11,x0,4 +80008a44: 08b50a63 beq x10,x11,80008ad8 +80008a48: 00500593 addi x11,x0,5 +80008a4c: 0cb50463 beq x10,x11,80008b14 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00011517 auipc x10,0x11 +80008a64: 9db50513 addi x10,x10,-1573 # 8001943b +80008a68: 00000013 addi x0,x0,0 +80008a6c: 00000013 addi x0,x0,0 +80008a70: 00000013 addi x0,x0,0 +80008a74: 00000013 addi x0,x0,0 +80008a78: 00000013 addi x0,x0,0 +80008a7c: 00000013 addi x0,x0,0 +80008a80: 00022097 auipc x1,0x22 +80008a84: ae4080e7 jalr x1,-1308(x1) # 8002a564 +80008a88: 1000006f jal x0,80008b88 + +80008a8c : +80008a8c: 06600593 addi x11,x0,102 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 00010617 auipc x12,0x10 +80008aa4: 81860613 addi x12,x12,-2024 # 800182b8 +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00b60023 sb x11,0(x12) +80008ac4: 00160613 addi x12,x12,1 +80008ac8: 0000f517 auipc x10,0xf +80008acc: 78c52503 lw x10,1932(x10) # 80018254 +80008ad0: 284010ef jal x1,80009d54 +80008ad4: 0780006f jal x0,80008b4c + +80008ad8 : +80008ad8: 07600593 addi x11,x0,118 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 0000f617 auipc x12,0xf +80008ae4: 7d860613 addi x12,x12,2008 # 800182b8 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 0000f517 auipc x10,0xf +80008b0c: 74c52503 lw x10,1868(x10) # 80018254 +80008b10: 244010ef jal x1,80009d54 + +80008b14 : +80008b14: 00000013 addi x0,x0,0 +80008b18: 00000013 addi x0,x0,0 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 00010517 auipc x10,0x10 +80008b24: 7fe50513 addi x10,x10,2046 # 8001931e +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00022097 auipc x1,0x22 +80008b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80008b48: 0400006f jal x0,80008b88 + +80008b4c : +80008b4c: 00000013 addi x0,x0,0 +80008b50: 00000013 addi x0,x0,0 +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 0000f517 auipc x10,0xf +80008b64: 75850513 addi x10,x10,1880 # 800182b8 +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 + +80008b88 : +80008b88: 00000013 addi x0,x0,0 +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 00010517 auipc x10,0x10 +80008ba4: 79650513 addi x10,x10,1942 # 80019336 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80008bc8: 0000f517 auipc x10,0xf +80008bcc: 58852503 lw x10,1416(x10) # 80018150 +80008bd0: 00100593 addi x11,x0,1 +80008bd4: 00b51c63 bne x10,x11,80008bec +80008bd8: 0000f517 auipc x10,0xf +80008bdc: 68852503 lw x10,1672(x10) # 80018260 +80008be0: 02000593 addi x11,x0,32 +80008be4: 0f4010ef jal x1,80009cd8 +80008be8: 0140006f jal x0,80008bfc + +80008bec : +80008bec: 0000f517 auipc x10,0xf +80008bf0: 67452503 lw x10,1652(x10) # 80018260 +80008bf4: 02000593 addi x11,x0,32 +80008bf8: 0e0010ef jal x1,80009cd8 + +80008bfc : +80008bfc: 00000013 addi x0,x0,0 +80008c00: 0000f517 auipc x10,0xf +80008c04: 6b850513 addi x10,x10,1720 # 800182b8 +80008c08: 00000013 addi x0,x0,0 +80008c0c: 00000013 addi x0,x0,0 +80008c10: 00000013 addi x0,x0,0 +80008c14: 00000013 addi x0,x0,0 +80008c18: 00000013 addi x0,x0,0 +80008c1c: 00000013 addi x0,x0,0 +80008c20: 00022097 auipc x1,0x22 +80008c24: 944080e7 jalr x1,-1724(x1) # 8002a564 +80008c28: 0000f517 auipc x10,0xf +80008c2c: 65052503 lw x10,1616(x10) # 80018278 +80008c30: 08051e63 bne x10,x0,80008ccc +80008c34: 00000013 addi x0,x0,0 +80008c38: 00000013 addi x0,x0,0 +80008c3c: 00000013 addi x0,x0,0 +80008c40: 00010517 auipc x10,0x10 +80008c44: 70d50513 addi x10,x10,1805 # 8001934d +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: 4e852503 lw x10,1256(x10) # 80018150 +80008c70: 00100593 addi x11,x0,1 +80008c74: 00b51c63 bne x10,x11,80008c8c +80008c78: 0000f517 auipc x10,0xf +80008c7c: 5f052503 lw x10,1520(x10) # 80018268 +80008c80: 02000593 addi x11,x0,32 +80008c84: 054010ef jal x1,80009cd8 +80008c88: 0140006f jal x0,80008c9c + +80008c8c : +80008c8c: 0000f517 auipc x10,0xf +80008c90: 5dc52503 lw x10,1500(x10) # 80018268 +80008c94: 02000593 addi x11,x0,32 +80008c98: 040010ef jal x1,80009cd8 + +80008c9c : +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 0000f517 auipc x10,0xf +80008ca4: 61850513 addi x10,x10,1560 # 800182b8 +80008ca8: 00000013 addi x0,x0,0 +80008cac: 00000013 addi x0,x0,0 +80008cb0: 00000013 addi x0,x0,0 +80008cb4: 00000013 addi x0,x0,0 +80008cb8: 00000013 addi x0,x0,0 +80008cbc: 00000013 addi x0,x0,0 +80008cc0: 00022097 auipc x1,0x22 +80008cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80008cc8: 5bd0006f jal x0,80009a84 + +80008ccc : +80008ccc: 00100593 addi x11,x0,1 +80008cd0: 06b51e63 bne x10,x11,80008d4c + +80008cd4 : +80008cd4: 00000013 addi x0,x0,0 +80008cd8: 00000013 addi x0,x0,0 +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 00010517 auipc x10,0x10 +80008ce4: 68450513 addi x10,x10,1668 # 80019364 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 0000f517 auipc x10,0xf +80008d0c: 56052503 lw x10,1376(x10) # 80018268 +80008d10: 02000593 addi x11,x0,32 +80008d14: 7c5000ef jal x1,80009cd8 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 0000f517 auipc x10,0xf +80008d24: 59850513 addi x10,x10,1432 # 800182b8 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 53d0006f jal x0,80009a84 + +80008d4c : +80008d4c: 00000013 addi x0,x0,0 +80008d50: 00000013 addi x0,x0,0 +80008d54: 00000013 addi x0,x0,0 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 00010517 auipc x10,0x10 +80008d64: 66250513 addi x10,x10,1634 # 800193c2 +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 0000f517 auipc x10,0xf +80008d8c: 4e052503 lw x10,1248(x10) # 80018268 +80008d90: 02000593 addi x11,x0,32 +80008d94: 745000ef jal x1,80009cd8 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 0000f517 auipc x10,0xf +80008da4: 51850513 addi x10,x10,1304 # 800182b8 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 4bd0006f jal x0,80009a84 + +80008dcc : +80008dcc: 0000f417 auipc x8,0xf +80008dd0: 4b442403 lw x8,1204(x8) # 80018280 +80008dd4: 00900493 addi x9,x0,9 +80008dd8: 0a940c63 beq x8,x9,80008e90 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 00010517 auipc x10,0x10 +80008de4: 68750513 addi x10,x10,1671 # 80019467 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 00000013 addi x0,x0,0 +80008e0c: 00000013 addi x0,x0,0 +80008e10: 00000013 addi x0,x0,0 +80008e14: 00000013 addi x0,x0,0 +80008e18: 00000013 addi x0,x0,0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00010517 auipc x10,0x10 +80008e24: 67350513 addi x10,x10,1651 # 80019493 +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 0000f817 auipc x16,0xf +80008e4c: 44080813 addi x16,x16,1088 # 80018288 +80008e50: 00082503 lw x10,0(x16) +80008e54: 00021097 auipc x1,0x21 +80008e58: 710080e7 jalr x1,1808(x1) # 8002a564 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 00010517 auipc x10,0x10 +80008e64: a7850513 addi x10,x10,-1416 # 800188d8 +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 280404e3 beq x8,x0,80009910 +80008e8c: 3400006f jal x0,800091cc + +80008e90 : +80008e90: 00000013 addi x0,x0,0 +80008e94: 00000013 addi x0,x0,0 +80008e98: 00000013 addi x0,x0,0 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00010517 auipc x10,0x10 +80008ea4: 60350513 addi x10,x10,1539 # 800194a3 +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 0000f517 auipc x10,0xf +80008ecc: 3a052503 lw x10,928(x10) # 80018268 +80008ed0: 02000593 addi x11,x0,32 +80008ed4: 605000ef jal x1,80009cd8 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 0000f517 auipc x10,0xf +80008ee4: 3d850513 addi x10,x10,984 # 800182b8 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 00000013 addi x0,x0,0 +80008f0c: 00000013 addi x0,x0,0 +80008f10: 00000013 addi x0,x0,0 +80008f14: 00000013 addi x0,x0,0 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 00010517 auipc x10,0x10 +80008f24: 5ae50513 addi x10,x10,1454 # 800194ce +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 0000f517 auipc x10,0xf +80008f4c: 31852503 lw x10,792(x10) # 80018260 +80008f50: 02000593 addi x11,x0,32 +80008f54: 585000ef jal x1,80009cd8 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 0000f517 auipc x10,0xf +80008f64: 35850513 addi x10,x10,856 # 800182b8 +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f317 auipc x6,0xf +80008f8c: 2d832303 lw x6,728(x6) # 80018260 +80008f90: 0000f397 auipc x7,0xf +80008f94: 2d83a383 lw x7,728(x7) # 80018268 +80008f98: 10736a63 bltu x6,x7,800090ac + +80008f9c : +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 00010517 auipc x10,0x10 +80008fa4: 55d50513 addi x10,x10,1373 # 800194fd +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 00000013 addi x0,x0,0 +80008fcc: 00000013 addi x0,x0,0 +80008fd0: 00000013 addi x0,x0,0 +80008fd4: 00000013 addi x0,x0,0 +80008fd8: 00000013 addi x0,x0,0 +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00010517 auipc x10,0x10 +80008fe4: 58550513 addi x10,x10,1413 # 80019565 +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 0000f317 auipc x6,0xf +8000900c: 25832303 lw x6,600(x6) # 80018260 +80009010: 0000f397 auipc x7,0xf +80009014: 2583a383 lw x7,600(x7) # 80018268 +80009018: 40730533 sub x10,x6,x7 +8000901c: 02000593 addi x11,x0,32 +80009020: 4b9000ef jal x1,80009cd8 +80009024: 00000013 addi x0,x0,0 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 0000f517 auipc x10,0xf +80009044: 27850513 addi x10,x10,632 # 800182b8 +80009048: 00000013 addi x0,x0,0 +8000904c: 00000013 addi x0,x0,0 +80009050: 00000013 addi x0,x0,0 +80009054: 00000013 addi x0,x0,0 +80009058: 00000013 addi x0,x0,0 +8000905c: 00000013 addi x0,x0,0 +80009060: 00021097 auipc x1,0x21 +80009064: 504080e7 jalr x1,1284(x1) # 8002a564 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 00010517 auipc x10,0x10 +80009084: 50c50513 addi x10,x10,1292 # 8001958c +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 1dd0006f jal x0,80009a84 + +800090ac : +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: 46950513 addi x10,x10,1129 # 80019529 +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 00000013 addi x0,x0,0 +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: 46550513 addi x10,x10,1125 # 80019565 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 0000f317 auipc x6,0xf +8000912c: 14032303 lw x6,320(x6) # 80018268 +80009130: 0000f397 auipc x7,0xf +80009134: 1303a383 lw x7,304(x7) # 80018260 +80009138: 40730533 sub x10,x6,x7 +8000913c: 02000593 addi x11,x0,32 +80009140: 399000ef jal x1,80009cd8 +80009144: 00000013 addi x0,x0,0 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 0000f517 auipc x10,0xf +80009164: 15850513 addi x10,x10,344 # 800182b8 +80009168: 00000013 addi x0,x0,0 +8000916c: 00000013 addi x0,x0,0 +80009170: 00000013 addi x0,x0,0 +80009174: 00000013 addi x0,x0,0 +80009178: 00000013 addi x0,x0,0 +8000917c: 00000013 addi x0,x0,0 +80009180: 00021097 auipc x1,0x21 +80009184: 3e4080e7 jalr x1,996(x1) # 8002a564 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 00010517 auipc x10,0x10 +800091a4: 4d450513 addi x10,x10,1236 # 80019674 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 0bd0006f jal x0,80009a84 + +800091cc : +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00010517 auipc x10,0x10 +800091e4: 57b50513 addi x10,x10,1403 # 8001975b +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0000f517 auipc x10,0xf +8000920c: 07c52503 lw x10,124(x10) # 80018284 +80009210: 04050a63 beq x10,x0,80009264 +80009214: 00100593 addi x11,x0,1 +80009218: 08b50663 beq x10,x11,800092a4 +8000921c: 00200593 addi x11,x0,2 +80009220: 0cb50263 beq x10,x11,800092e4 +80009224: 00300593 addi x11,x0,3 +80009228: 0eb50e63 beq x10,x11,80009324 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00010517 auipc x10,0x10 +80009244: 55750513 addi x10,x10,1367 # 80019797 +80009248: 00000013 addi x0,x0,0 +8000924c: 00000013 addi x0,x0,0 +80009250: 00000013 addi x0,x0,0 +80009254: 00000013 addi x0,x0,0 +80009258: 00000013 addi x0,x0,0 +8000925c: 00000013 addi x0,x0,0 +80009260: 1000006f jal x0,80009360 + +80009264 : +80009264: 00000013 addi x0,x0,0 +80009268: 00000013 addi x0,x0,0 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: 4f550513 addi x10,x10,1269 # 80019775 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 0c00006f jal x0,80009360 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: 4bd50513 addi x10,x10,1213 # 8001977d +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0800006f jal x0,80009360 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: 48550513 addi x10,x10,1157 # 80019785 +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0400006f jal x0,80009360 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: 44e50513 addi x10,x10,1102 # 8001978e +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 + +80009360 : +80009360: 00021097 auipc x1,0x21 +80009364: 204080e7 jalr x1,516(x1) # 8002a564 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: 42050513 addi x10,x10,1056 # 800197a0 +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 0000f517 auipc x10,0xf +800093ac: ed852503 lw x10,-296(x10) # 80018280 +800093b0: 00100593 addi x11,x0,1 +800093b4: 06b50863 beq x10,x11,80009424 +800093b8: 00200593 addi x11,x0,2 +800093bc: 0ab50463 beq x10,x11,80009464 +800093c0: 00300593 addi x11,x0,3 +800093c4: 0eb50063 beq x10,x11,800094a4 +800093c8: 00400593 addi x11,x0,4 +800093cc: 10b50c63 beq x10,x11,800094e4 +800093d0: 00500593 addi x11,x0,5 +800093d4: 14b50863 beq x10,x11,80009524 +800093d8: 00600593 addi x11,x0,6 +800093dc: 18b50463 beq x10,x11,80009564 +800093e0: 00700593 addi x11,x0,7 +800093e4: 1cb50063 beq x10,x11,800095a4 +800093e8: 00800593 addi x11,x0,8 +800093ec: 1eb50c63 beq x10,x11,800095e4 +800093f0: 00000013 addi x0,x0,0 +800093f4: 00000013 addi x0,x0,0 +800093f8: 00000013 addi x0,x0,0 +800093fc: 00000013 addi x0,x0,0 +80009400: 00010517 auipc x10,0x10 +80009404: 4f750513 addi x10,x10,1271 # 800198f7 +80009408: 00000013 addi x0,x0,0 +8000940c: 00000013 addi x0,x0,0 +80009410: 00000013 addi x0,x0,0 +80009414: 00000013 addi x0,x0,0 +80009418: 00000013 addi x0,x0,0 +8000941c: 00000013 addi x0,x0,0 +80009420: 2000006f jal x0,80009620 + +80009424 : +80009424: 00000013 addi x0,x0,0 +80009428: 00000013 addi x0,x0,0 +8000942c: 00000013 addi x0,x0,0 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: 37a50513 addi x10,x10,890 # 800197ba +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 1c00006f jal x0,80009620 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: 36b50513 addi x10,x10,875 # 800197eb +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1800006f jal x0,80009620 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: 34b50513 addi x10,x10,843 # 8001980b +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1400006f jal x0,80009620 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: 32950513 addi x10,x10,809 # 80019829 +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1000006f jal x0,80009620 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: 30850513 addi x10,x10,776 # 80019848 +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 0c00006f jal x0,80009620 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: 2f050513 addi x10,x10,752 # 80019870 +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0800006f jal x0,80009620 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: 2dc50513 addi x10,x10,732 # 8001989c +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0400006f jal x0,80009620 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: 2c850513 addi x10,x10,712 # 800198c8 +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 + +80009620 : +80009620: 00021097 auipc x1,0x21 +80009624: f44080e7 jalr x1,-188(x1) # 8002a564 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: 2c650513 addi x10,x10,710 # 80019906 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 0000f517 auipc x10,0xf +8000966c: c0052503 lw x10,-1024(x10) # 80018268 +80009670: 02000593 addi x11,x0,32 +80009674: 664000ef jal x1,80009cd8 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 0000f517 auipc x10,0xf +80009684: c3850513 addi x10,x10,-968 # 800182b8 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 00000013 addi x0,x0,0 +800096ac: 00000013 addi x0,x0,0 +800096b0: 00000013 addi x0,x0,0 +800096b4: 00000013 addi x0,x0,0 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 00010517 auipc x10,0x10 +800096c4: 25d50513 addi x10,x10,605 # 8001991d +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 0000f517 auipc x10,0xf +800096ec: b7852503 lw x10,-1160(x10) # 80018260 +800096f0: 02000593 addi x11,x0,32 +800096f4: 5e4000ef jal x1,80009cd8 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 0000f517 auipc x10,0xf +80009704: bb850513 addi x10,x10,-1096 # 800182b8 +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000f517 auipc x10,0xf +8000972c: b5852503 lw x10,-1192(x10) # 80018280 +80009730: 00200593 addi x11,x0,2 +80009734: 08b51463 bne x10,x11,800097bc +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 00010517 auipc x10,0x10 +80009744: 1f450513 addi x10,x10,500 # 80019934 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000f517 auipc x10,0xf +8000976c: b0052503 lw x10,-1280(x10) # 80018268 +80009770: 284000ef jal x1,800099f4 +80009774: 00021097 auipc x1,0x21 +80009778: df0080e7 jalr x1,-528(x1) # 8002a564 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: 1cb50513 addi x10,x10,459 # 8001994b +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000f517 auipc x10,0xf +800097ac: ab852503 lw x10,-1352(x10) # 80018260 +800097b0: 244000ef jal x1,800099f4 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 + +800097bc : +800097bc: 00000097 auipc x1,0x0 +800097c0: 314080e7 jalr x1,788(x1) # 80009ad0 +800097c4: 0000f517 auipc x10,0xf +800097c8: abc52503 lw x10,-1348(x10) # 80018280 +800097cc: 00100593 addi x11,x0,1 +800097d0: 02b51e63 bne x10,x11,8000980c +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00010517 auipc x10,0x10 +800097e4: 1e150513 addi x10,x10,481 # 800199c1 +800097e8: 00000013 addi x0,x0,0 +800097ec: 00000013 addi x0,x0,0 +800097f0: 00000013 addi x0,x0,0 +800097f4: 00000013 addi x0,x0,0 +800097f8: 00000013 addi x0,x0,0 +800097fc: 00000013 addi x0,x0,0 +80009800: 00021097 auipc x1,0x21 +80009804: d64080e7 jalr x1,-668(x1) # 8002a564 +80009808: 27c0006f jal x0,80009a84 +8000980c: 00200593 addi x11,x0,2 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: 27750513 addi x10,x10,631 # 80019a97 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 23c0006f jal x0,80009a84 +8000984c: 00300593 addi x11,x0,3 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: 32a50513 addi x10,x10,810 # 80019b8a +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 1fc0006f jal x0,80009a84 +8000988c: 00400593 addi x11,x0,4 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: 3e550513 addi x10,x10,997 # 80019c85 +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1bc0006f jal x0,80009a84 +800098cc: 00500593 addi x11,x0,5 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: 48c50513 addi x10,x10,1164 # 80019d6c +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 17c0006f jal x0,80009a84 +8000990c: 1780006f jal x0,80009a84 + +80009910 : +80009910: 00000013 addi x0,x0,0 +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: 05950513 addi x10,x10,89 # 80019979 +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 0000f617 auipc x12,0xf +8000994c: 95062603 lw x12,-1712(x12) # 80018298 +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 0000f517 auipc x10,0xf +80009964: 00250513 addi x10,x10,2 # 80018962 +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 00065503 lhu x10,0(x12) +8000998c: 01000593 addi x11,x0,16 +80009990: 00357413 andi x8,x10,3 +80009994: 00300493 addi x9,x0,3 +80009998: 00941a63 bne x8,x9,800099ac +8000999c: 00265403 lhu x8,2(x12) +800099a0: 01041413 slli x8,x8,0x10 +800099a4: 00856533 or x10,x10,x8 +800099a8: 02000593 addi x11,x0,32 +800099ac: 32c000ef jal x1,80009cd8 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 0000f517 auipc x10,0xf +800099c4: 8f850513 addi x10,x10,-1800 # 800182b8 +800099c8: 00000013 addi x0,x0,0 +800099cc: 00000013 addi x0,x0,0 +800099d0: 00000013 addi x0,x0,0 +800099d4: 00000013 addi x0,x0,0 +800099d8: 00000013 addi x0,x0,0 +800099dc: 00000013 addi x0,x0,0 +800099e0: 00021097 auipc x1,0x21 +800099e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800099e8: 00000097 auipc x1,0x0 +800099ec: 0e8080e7 jalr x1,232(x1) # 80009ad0 +800099f0: 0940006f jal x0,80009a84 + +800099f4 : +800099f4: 02054263 blt x10,x0,80009a18 + +800099f8 : +800099f8: 01800593 addi x11,x0,24 +800099fc: 04b55463 bge x10,x11,80009a44 +80009a00: 0000f597 auipc x11,0xf +80009a04: 8e058593 addi x11,x11,-1824 # 800182e0 +80009a08: 00251613 slli x12,x10,0x2 +80009a0c: 00c585b3 add x11,x11,x12 +80009a10: 0005a503 lw x10,0(x11) +80009a14: 00008067 jalr x0,0(x1) + +80009a18 : +80009a18: 00100593 addi x11,x0,1 +80009a1c: 01f59593 slli x11,x11,0x1f +80009a20: 00b54533 xor x10,x10,x11 +80009a24: 01000593 addi x11,x0,16 +80009a28: 00b55e63 bge x10,x11,80009a44 +80009a2c: 0000f597 auipc x11,0xf +80009a30: 91458593 addi x11,x11,-1772 # 80018340 +80009a34: 00251613 slli x12,x10,0x2 +80009a38: 00c585b3 add x11,x11,x12 +80009a3c: 0005a503 lw x10,0(x11) +80009a40: 00008067 jalr x0,0(x1) + +80009a44 : +80009a44: 00000013 addi x0,x0,0 +80009a48: 00000013 addi x0,x0,0 +80009a4c: 00000013 addi x0,x0,0 +80009a50: 00000013 addi x0,x0,0 +80009a54: 00000013 addi x0,x0,0 +80009a58: 00000013 addi x0,x0,0 +80009a5c: 00000013 addi x0,x0,0 +80009a60: 0000f517 auipc x10,0xf +80009a64: d1e50513 addi x10,x10,-738 # 8001877e +80009a68: 00000013 addi x0,x0,0 +80009a6c: 00000013 addi x0,x0,0 +80009a70: 00000013 addi x0,x0,0 +80009a74: 00000013 addi x0,x0,0 +80009a78: 00000013 addi x0,x0,0 +80009a7c: 00000013 addi x0,x0,0 +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 00010517 auipc x10,0x10 +80009aa4: 97a50513 addi x10,x10,-1670 # 8001941a +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00021097 auipc x1,0x21 +80009ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 + +80009ac8 : +80009ac8: 00021097 auipc x1,0x21 +80009acc: afc080e7 jalr x1,-1284(x1) # 8002a5c4 + +80009ad0 : +80009ad0: 0000e617 auipc x12,0xe +80009ad4: 7c060613 addi x12,x12,1984 # 80018290 +80009ad8: 00162023 sw x1,0(x12) +80009adc: 00000013 addi x0,x0,0 +80009ae0: 0000f517 auipc x10,0xf +80009ae4: ea350513 addi x10,x10,-349 # 80018983 +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 +80009b08: 0000e517 auipc x10,0xe +80009b0c: 79052503 lw x10,1936(x10) # 80018298 +80009b10: 02000593 addi x11,x0,32 +80009b14: 1c4000ef jal x1,80009cd8 +80009b18: 00000013 addi x0,x0,0 +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000e517 auipc x10,0xe +80009b24: 79850513 addi x10,x10,1944 # 800182b8 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 00000013 addi x0,x0,0 +80009b4c: 00000013 addi x0,x0,0 +80009b50: 00000013 addi x0,x0,0 +80009b54: 00000013 addi x0,x0,0 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000f517 auipc x10,0xf +80009b64: e3350513 addi x10,x10,-461 # 80018993 +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 0000e517 auipc x10,0xe +80009b8c: 71852503 lw x10,1816(x10) # 800182a0 +80009b90: 02000593 addi x11,x0,32 +80009b94: 144000ef jal x1,80009cd8 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000e517 auipc x10,0xe +80009ba4: 71850513 addi x10,x10,1816 # 800182b8 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 00000013 addi x0,x0,0 +80009bcc: 00000013 addi x0,x0,0 +80009bd0: 00000013 addi x0,x0,0 +80009bd4: 00000013 addi x0,x0,0 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000f517 auipc x10,0xf +80009be4: dc350513 addi x10,x10,-573 # 800189a3 +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 0000e517 auipc x10,0xe +80009c0c: 6a052503 lw x10,1696(x10) # 800182a8 +80009c10: 02000593 addi x11,x0,32 +80009c14: 0c4000ef jal x1,80009cd8 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000e517 auipc x10,0xe +80009c24: 69850513 addi x10,x10,1688 # 800182b8 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 00000013 addi x0,x0,0 +80009c4c: 00000013 addi x0,x0,0 +80009c50: 00000013 addi x0,x0,0 +80009c54: 00000013 addi x0,x0,0 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000f517 auipc x10,0xf +80009c64: d5350513 addi x10,x10,-685 # 800189b3 +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 0000e517 auipc x10,0xe +80009c8c: 62852503 lw x10,1576(x10) # 800182b0 +80009c90: 02000593 addi x11,x0,32 +80009c94: 044000ef jal x1,80009cd8 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000e517 auipc x10,0xe +80009ca4: 61850513 addi x10,x10,1560 # 800182b8 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000e617 auipc x12,0xe +80009ccc: 5c860613 addi x12,x12,1480 # 80018290 +80009cd0: 00062083 lw x1,0(x12) +80009cd4: 00008067 jalr x0,0(x1) + +80009cd8 : +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000e617 auipc x12,0xe +80009ce4: 5d860613 addi x12,x12,1496 # 800182b8 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 03000693 addi x13,x0,48 +80009d04: 00d60023 sb x13,0(x12) +80009d08: 07800693 addi x13,x0,120 +80009d0c: 00d600a3 sb x13,1(x12) +80009d10: 00260613 addi x12,x12,2 +80009d14: 00058693 addi x13,x11,0 + +80009d18 : +80009d18: ffc68693 addi x13,x13,-4 +80009d1c: 00d55733 srl x14,x10,x13 +80009d20: 00f77713 andi x14,x14,15 +80009d24: 00a00793 addi x15,x0,10 +80009d28: 00f74663 blt x14,x15,80009d34 +80009d2c: 05770713 addi x14,x14,87 +80009d30: 0080006f jal x0,80009d38 + +80009d34 : +80009d34: 03070713 addi x14,x14,48 + +80009d38 : +80009d38: 00e60023 sb x14,0(x12) +80009d3c: 00160613 addi x12,x12,1 +80009d40: fc069ce3 bne x13,x0,80009d18 +80009d44: 00a00693 addi x13,x0,10 +80009d48: 00d60023 sb x13,0(x12) +80009d4c: 000600a3 sb x0,1(x12) +80009d50: 00008067 jalr x0,0(x1) + +80009d54 : +80009d54: 00a00693 addi x13,x0,10 +80009d58: 02d54663 blt x10,x13,80009d84 +80009d5c: ff650513 addi x10,x10,-10 +80009d60: 03100713 addi x14,x0,49 +80009d64: 00d54c63 blt x10,x13,80009d7c +80009d68: ff650513 addi x10,x10,-10 +80009d6c: 03200713 addi x14,x0,50 +80009d70: 00d54663 blt x10,x13,80009d7c +80009d74: ff650513 addi x10,x10,-10 +80009d78: 03300713 addi x14,x0,51 +80009d7c: 00e60023 sb x14,0(x12) +80009d80: 00160613 addi x12,x12,1 +80009d84: 03050513 addi x10,x10,48 +80009d88: 00a60023 sb x10,0(x12) +80009d8c: 00a00693 addi x13,x0,10 +80009d90: 00d600a3 sb x13,1(x12) +80009d94: 00060123 sb x0,2(x12) +80009d98: 00008067 jalr x0,0(x1) +80009d9c: 00000013 addi x0,x0,0 +80009da0: 00000013 addi x0,x0,0 +80009da4: 00000013 addi x0,x0,0 +80009da8: 00000013 addi x0,x0,0 +80009dac: 00000013 addi x0,x0,0 +80009db0: 00000013 addi x0,x0,0 +80009db4: 00000013 addi x0,x0,0 +80009db8: 00000013 addi x0,x0,0 +80009dbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: eb838393 addi x7,x7,-328 # 80007ec0 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: e9c38393 addi x7,x7,-356 # 80007ec0 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: e8438393 addi x7,x7,-380 # 80007ec0 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: e7038393 addi x7,x7,-400 # 80007ec0 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: e6438393 addi x7,x7,-412 # 80007ec0 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e3038393 addi x7,x7,-464 # 80007ec0 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 0a430313 addi x6,x6,164 # 80007140 +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e1838393 addi x7,x7,-488 # 80007ec0 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 08c30313 addi x6,x6,140 # 80007140 +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e0038393 addi x7,x7,-512 # 80007ec0 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 07430313 addi x6,x6,116 # 80007140 +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: de838393 addi x7,x7,-536 # 80007ec0 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: f1078793 addi x15,x15,-240 # 80007150 +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: ffff0117 auipc x2,0xffff0 +8002a4a4: a0010113 addi x2,x2,-1536 # 80019ea0 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: ce018193 addi x3,x3,-800 # 800081c0 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 80019443 .word 0x80019443 +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: e5828293 addi x5,x5,-424 # 80029400 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: e3828293 addi x5,x5,-456 # 80029400 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zkne-aes32esmi-00.elf.objdump b/riscv-tests/rv32-Zkne-aes32esmi-00.elf.objdump new file mode 100644 index 0000000..1397b94 --- /dev/null +++ b/riscv-tests/rv32-Zkne-aes32esmi-00.elf.objdump @@ -0,0 +1,19187 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zkne/Zkne-aes32esmi-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zkne/Zkne-aes32esmi-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009dc0 memsz 0x00009dc0 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009d80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001d600 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80029600 80029600 00028600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003ed6 00000000 00000000 0002967b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007f 00000000 00000000 0002d551 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5d0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d5f3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d608 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008d 00000000 00000000 0002d630 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d6bd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80029600 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccbrMV6o.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b0 +800081c0 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b1 +8000d846 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b2 +8000d87c l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b3 +8000d8b2 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b4 +800081d8 l .text.rvtest 00000000 failedtest_x8_x7 +8000d8e8 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b5 +8000d91e l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b6 +8000d954 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b7 +8000d98a l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b8 +8000d9c0 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b9 +8000d9f6 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b10 +8000da2d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b11 +8000da65 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b12 +8000da9d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b13 +8000dad5 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b14 +8000db0d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b14_str +800002fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b15 +8000db45 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b15_str +80000328 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b16 +8000db7d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b16_str +80000354 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b17 +8000dbb5 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b18 +8000dbed l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b19 +8000dc25 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b20 +8000dc5d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b21 +8000dc95 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b22 +8000dccd l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b22_str +80000460 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b23 +8000dd05 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b23_str +8000048c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b24 +8000dd3d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b25 +8000dd75 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b26 +8000ddad l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b27 +8000dde5 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b28 +8000de1d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b29 +8000de55 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b30 +8000de8d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b30_str +800005c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_b31 +8000dec5 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_b31_str +800005f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b0 +8000defd l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b0_str +8000061c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b1 +8000df34 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b1_str +80000648 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b2 +8000df6b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b3 +8000dfa2 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b4 +8000dfd9 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b5 +8000e010 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b5_str +80000708 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b6 +8000e047 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b6_str +8000073c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b7 +80008200 l .text.rvtest 00000000 failedtest_x14_x13 +8000e07e l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b7_str +80000768 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b8 +8000e0b5 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b8_str +80000794 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b9 +8000e0ec l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b9_str +800007c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b10 +8000e123 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b11 +8000e15b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b11_str +80000818 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b12 +8000e193 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b12_str +8000084c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b13 +8000e1cb l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b13_str +80000878 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b14 +8000e203 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b14_str +800008a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b15 +8000e23b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b16 +8000e273 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b16_str +800008fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b17 +8000e2ab l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b17_str +8000092c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b18 +8000e2e3 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b19 +8000e31b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b20 +8000e353 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b21 +8000e38b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b21_str +800009e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b22 +8000e3c3 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b22_str +80000a0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b23 +8000e3fb l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b23_str +80000a3c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b24 +8000e433 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b24_str +80000a68 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b25 +8000e46b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b25_str +80000a94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b26 +8000e4a3 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b26_str +80000ac0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b27 +8000e4db l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b27_str +80000aec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b28 +8000e513 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b28_str +80000b18 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b29 +8000e54b l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b29_str +80000b44 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b30 +8000e583 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b30_str +80000b74 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_b31 +8000e5bb l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_b31_str +80000ba0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b0 +8000e5f3 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b0_str +80000bcc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b1 +8000e629 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b1_str +80000bf8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b2 +8000e65f l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b2_str +80000c28 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b3 +8000e695 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b3_str +80000c54 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b4 +8000e6cb l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b4_str +80000c80 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b5 +8000e701 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b5_str +80000cac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b6 +8000e737 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b6_str +80000ce0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b7 +8000e76d l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b7_str +80000d0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b8 +8000e7a3 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b8_str +80000d38 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b9 +8000e7d9 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b9_str +80000d68 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b10 +8000e80f l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b10_str +80000d94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b11 +8000e846 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b11_str +80000dc0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b12 +8000e87d l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b12_str +80000dec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b13 +8000e8b4 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b13_str +80000e18 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b14 +8000e8eb l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b14_str +80000e44 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b15 +8000e922 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b16 +8000e959 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b17 +8000e990 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b18 +8000e9c7 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b19 +8000e9fe l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b20 +8000ea35 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b20_str +80000f4c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b21 +8000ea6c l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b21_str +80000f7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b22 +8000eaa3 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b22_str +80000fa8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b23 +8000eada l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b24 +8000eb11 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b24_str +80001000 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b25 +8000eb48 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b25_str +8000102c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b26 +8000eb7f l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b26_str +80001058 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b27 +8000ebb6 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b27_str +80001088 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b28 +8000ebed l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b28_str +800010b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b29 +8000ec24 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b29_str +800010e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b30 +8000ec5b l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b30_str +8000110c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rd_b31 +8000ec92 l .data 00000000 Zkne_aes32esmi_cg_cp_rd_b31_str +80001138 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x0 +8000ecc9 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x0_str +80001164 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x1 +8000ed07 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x1_str +80001190 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x2 +8000ed45 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x2_str +800011bc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x80000000 +8000ed83 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x80000000_str +800011e8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x80000001 +8000edc9 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x80000001_str +80001214 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x7fffffff +8000ee0f l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x7fffffff_str +80001240 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x7ffffffe +8000ee55 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x7ffffffe_str +8000126c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xffffffff +8000ee9b l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xffffffff_str +80001298 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xfffffffe +8000eee1 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xfffffffe_str +800012c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x5bbc8872 +8000ef27 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x5bbc8872_str +800012f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xaaaaaaaa +8000ef6d l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0xaaaaaaaa_str +8000131c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x55555555 +8000efb3 l .data 00000000 Zkne_aes32esmi_cg_cp_rs1_edges_0x55555555_str +80001348 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x0 +8000eff9 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x0_str +80001374 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x1 +8000f038 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x1_str +800013a0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x2 +8000f077 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x2_str +800013cc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x80000000 +8000f0b6 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x80000000_str +800013f8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x80000001 +8000f0fc l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x80000001_str +80001424 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x7fffffff +8000f142 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x7fffffff_str +80001450 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x7ffffffe +8000f188 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x7ffffffe_str +8000147c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xffffffff +8000f1ce l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xffffffff_str +800014a8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xfffffffe +8000f214 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xfffffffe_str +800014d4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x5bbc8872 +8000f25a l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x5bbc8872_str +80001500 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xaaaaaaaa +8000f2a0 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0xaaaaaaaa_str +8000152c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x55555555 +8000f2e6 l .data 00000000 Zkne_aes32esmi_cg_cp_rs2_edges_0x55555555_str +80001558 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f32c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001584 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f382 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f3d8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f42e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001608 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f48b l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001634 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f4e8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001660 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f545 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000168c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f5a2 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f5ff l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f65c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001710 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f6b9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000173c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f716 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001768 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f773 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001794 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f7c9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f81f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f875 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001818 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f8d2 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001844 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f92f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001870 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f98c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000189c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f9e9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000fa46 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000faa3 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001920 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000fb00 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000194c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000fb5d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001978 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fbba l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fc10 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fc66 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fcbc l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a28 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fd19 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a54 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fd76 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a80 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fdd3 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fe30 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fe8d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b04 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000feea l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b30 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000ff47 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b5c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000ffa4 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b88 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +80010001 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8001005e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +800100bb l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +80010118 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c38 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8001017c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c64 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +800101e0 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c90 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +80010244 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cbc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +800102a8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8001030c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d14 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +80010370 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d40 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +800103d4 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d6c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010438 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d98 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8001049c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +800104f9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +80010556 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e1c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +800105b3 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e48 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +80010617 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e74 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8001067b l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +800106df l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ecc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010743 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +800107a7 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f24 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8001080b l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f50 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8001086f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +800108d3 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +80010937 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +80010994 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002000 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +800109f1 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000202c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010a4e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002058 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +80010ab2 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002084 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +80010b16 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +80010b7a l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +80010bde l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002108 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010c42 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002134 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010ca6 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002160 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010d0a l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000218c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010d6e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010dd2 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010e2f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002210 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010e8c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000223c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010ee9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002268 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010f4d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002294 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010fb1 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80011015 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80011079 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002318 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +800110dd l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002344 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80011141 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002370 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +800111a5 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000239c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +80011209 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8001126d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +800112ca l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002420 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +80011327 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000244c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +80011384 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002478 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +800113e8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8001144c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +800114b0 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +80011514 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002528 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +80011578 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002554 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +800115dc l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002580 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +80011640 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +800116a4 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011708 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002604 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +80011765 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002630 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +800117c2 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000265c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8001181f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002688 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +80011883 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +800118e7 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8001194b l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000270c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +800119af l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002738 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011a13 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002764 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +80011a77 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002790 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +80011adb l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027bc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011b3f l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +80011ba3 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002814 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011c00 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002840 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +80011c5d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000286c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011cba l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002898 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011d1e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011d82 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011de6 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000291c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011e4a l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002948 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011eae l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002974 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011f12 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011f76 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029cc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011fda l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8001203e l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a24 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8001209b l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a50 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +800120f8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80012155 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +800121b9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8001221d l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b00 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +80012281 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b2c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +800122e5 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b58 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012349 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b84 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800123ad l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012411 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bdc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +80012475 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c08 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800124d9 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c34 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +80012536 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c60 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012593 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c8c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800125f0 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012654 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800126b8 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d10 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8001271c l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d3c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +80012780 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d68 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800127e4 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012848 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +800128ac l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +80012910 l .data 00000000 Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e18 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b0 +80012974 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b0_str +80002e44 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b1 +800129b1 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b2 +800129ee l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b2_str +80002ea0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b3 +80012a2b l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b3_str +80002ed4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b4 +80012a68 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b4_str +80002f00 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b5 +80012aa5 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b5_str +80002f2c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b6 +80012ae2 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b7 +80012b1f l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b8 +80012b5c l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b8_str +80002fb8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b9 +80012b99 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b10 +80012bd6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b11 +80012c14 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b12 +80012c52 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b12_str +80003068 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b13 +80012c90 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b13_str +80003094 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b14 +80012cce l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b14_str +800030c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b15 +80012d0c l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b15_str +800030ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b16 +80012d4a l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b17 +80012d88 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b18 +80012dc6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b18_str +80003170 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b19 +80012e04 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b19_str +8000319c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b20 +80012e42 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b20_str +800031c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b21 +80012e80 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b21_str +800031f8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b22 +80012ebe l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b22_str +80003228 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b23 +80012efc l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b23_str +80003254 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b24 +80012f3a l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b24_str +80003280 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b25 +80012f78 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b25_str +800032ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b26 +80012fb6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b26_str +800032d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b27 +80012ff4 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b27_str +80003304 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b28 +80013032 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b28_str +80003330 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b29 +80013070 l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b29_str +80003360 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b30 +800130ae l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b30_str +8000338c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b31 +800130ec l .data 00000000 Zkne_aes32esmi_cg_cmp_rs1_rs2_b31_str +800033b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b0 +8001312a l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b0_str +800033e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b1 +80013166 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b1_str +80003410 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b2 +800131a2 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b2_str +8000343c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b3 +800131de l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b3_str +80003470 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b4 +8001321a l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b4_str +8000349c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b5 +80013256 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b5_str +800034c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b6 +80013292 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b6_str +800034f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b7 +800132ce l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b7_str +80003520 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b8 +8001330a l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b8_str +8000354c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b9 +80013346 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b9_str +80003578 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b10 +80013382 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b10_str +800035a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b11 +800133bf l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b11_str +800035d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b12 +800133fc l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b12_str +80003604 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b13 +80013439 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b13_str +80003630 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b14 +80013476 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b14_str +8000365c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b15 +800134b3 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b15_str +80003688 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b16 +800134f0 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b16_str +800036b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b17 +8001352d l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b17_str +800036e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b18 +8001356a l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b18_str +8000370c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b19 +800135a7 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b19_str +80003738 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b20 +800135e4 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b20_str +80003768 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b21 +80013621 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b22 +8001365e l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b23 +8001369b l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b24 +800136d8 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b25 +80013715 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b26 +80013752 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b27 +8001378f l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b27_str +800038a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b28 +800137cc l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b28_str +800038d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b29 +80013809 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b29_str +80003900 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b30 +80013846 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b30_str +8000392c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b31 +80013883 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_b31_str +80003958 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b0 +800138c0 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b0_str +80003984 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b1 +800138fc l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b1_str +800039b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b2 +80013938 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b2_str +800039dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b3 +80013974 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b4 +800139b0 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b5 +800139ec l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b6 +80013a28 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b6_str +80003a94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b7 +80013a64 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b7_str +80003ac0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b8 +80013aa0 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b8_str +80003aec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b9 +80013adc l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b9_str +80003b18 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b10 +80013b18 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b10_str +80003b48 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b11 +80013b55 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b11_str +80003b74 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b12 +80013b92 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b12_str +80003ba0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b13 +80013bcf l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b13_str +80003bcc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b14 +80013c0c l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b14_str +80003bf8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b15 +80013c49 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b15_str +80003c24 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b16 +80013c86 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b16_str +80003c50 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b17 +80013cc3 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b17_str +80003c7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b18 +80013d00 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b18_str +80003ca8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b19 +80013d3d l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b19_str +80003cd4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b20 +80013d7a l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b20_str +80003d00 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b21 +80013db7 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b21_str +80003d2c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b22 +80013df4 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b22_str +80003d58 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b23 +80013e31 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b23_str +80003d84 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b24 +80013e6e l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b24_str +80003db4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b25 +80013eab l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b25_str +80003de0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b26 +80013ee8 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b26_str +80003e0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b27 +80013f25 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b27_str +80003e38 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b28 +80013f62 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b28_str +80003e64 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b29 +80013f9f l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b29_str +80003e90 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b30 +80013fdc l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b30_str +80003ebc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b31 +80014019 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs2_b31_str +80003ee8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b0 +80014056 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b0_str +80003f14 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b1 +80014096 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b1_str +80003f44 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b2 +800140d6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b2_str +80003f70 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b3 +80014116 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b3_str +80003fa4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b4 +80014156 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b4_str +80003fd0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b5 +80014196 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b5_str +80003ffc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b6 +800141d6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b6_str +80004030 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b7 +80014216 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b7_str +8000405c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b8 +80014256 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b8_str +80004088 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b9 +80014296 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b9_str +800040b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b10 +800142d6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b10_str +800040e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b11 +80014317 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b11_str +8000410c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b12 +80014358 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b12_str +80004140 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b13 +80014399 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b13_str +8000416c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b14 +800143da l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b15 +8001441b l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b15_str +800041c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b16 +8001445c l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b16_str +800041f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b17 +8001449d l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b17_str +80004220 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b18 +800144de l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b18_str +80004250 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b19 +8001451f l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b19_str +8000427c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b20 +80014560 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b20_str +800042a8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b21 +800145a1 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b21_str +800042d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b22 +800145e2 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b23 +80014623 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b24 +80014664 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b25 +800146a5 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b26 +800146e6 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b26_str +800043b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b27 +80014727 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b27_str +800043e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b28 +80014768 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b28_str +80004410 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b29 +800147a9 l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b29_str +8000443c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b30 +800147ea l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b30_str +80004468 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b31 +8001482b l .data 00000000 Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b31_str +80004494 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_bs_b0 +8001486c l .data 00000000 Zkne_aes32esmi_cg_cp_bs_b0_str +800044c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_bs_b1 +800148a3 l .data 00000000 Zkne_aes32esmi_cg_cp_bs_b1_str +800044ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_bs_b2 +800148da l .data 00000000 Zkne_aes32esmi_cg_cp_bs_b2_str +80004518 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_bs_b3 +80014911 l .data 00000000 Zkne_aes32esmi_cg_cp_bs_b3_str +80004544 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b0 +80014948 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b0_str +80004570 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b1 +80014981 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b1_str +8000459c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b2 +800149ba l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b2_str +800045c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b3 +800149f3 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b3_str +800045f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b4 +80014a2c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b4_str +80004620 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b5 +80014a65 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b5_str +8000464c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b6 +80014a9e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b6_str +80004678 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b7 +80014ad7 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b7_str +800046a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b8 +80014b10 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b8_str +800046d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b9 +80014b49 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b9_str +800046fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b10 +80014b82 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b10_str +80004728 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b11 +80014bbc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b11_str +80004754 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b12 +80014bf6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b12_str +80004780 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b13 +80014c30 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b13_str +800047ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b14 +80014c6a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b14_str +800047d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b15 +80014ca4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b15_str +80004804 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b16 +80014cde l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b16_str +80004830 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b17 +80014d18 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b17_str +8000485c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b18 +80014d52 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b18_str +80004888 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b19 +80014d8c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b19_str +800048b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b20 +80014dc6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b20_str +800048e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b21 +80014e00 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b21_str +8000490c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b22 +80014e3a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b22_str +80004938 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b23 +80014e74 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b23_str +80004964 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b24 +80014eae l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b24_str +80004990 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b25 +80014ee8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b25_str +800049bc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b26 +80014f22 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b26_str +800049e8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b27 +80014f5c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b27_str +80004a14 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b28 +80014f96 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b28_str +80004a40 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b29 +80014fd0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b29_str +80004a6c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b30 +8001500a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b30_str +80004a98 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b31 +80015044 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b31_str +80004ac4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b32 +8001507e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b32_str +80004af0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b33 +800150b8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b33_str +80004b1c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b34 +800150f2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b34_str +80004b48 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b35 +8001512c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b35_str +80004b74 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b36 +80015166 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b36_str +80004ba0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b37 +800151a0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b37_str +80004bcc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b38 +800151da l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b38_str +80004bf8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b39 +80015214 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b39_str +80004c24 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b40 +8001524e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b40_str +80004c50 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b41 +80015288 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b41_str +80004c7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b42 +800152c2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b42_str +80004ca8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b43 +800152fc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b43_str +80004cd4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b44 +80015336 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b44_str +80004d00 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b45 +80015370 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b45_str +80004d2c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b46 +800153aa l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b46_str +80004d58 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b47 +800153e4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b47_str +80004d84 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b48 +8001541e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b48_str +80004db0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b49 +80015458 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b49_str +80004ddc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b50 +80015492 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b50_str +80004e08 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b51 +800154cc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b51_str +80004e34 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b52 +80015506 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b52_str +80004e60 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b53 +80015540 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b53_str +80004e8c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b54 +8001557a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b54_str +80004eb8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b55 +800155b4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b55_str +80004ee4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b56 +800155ee l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b56_str +80004f10 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b57 +80015628 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b57_str +80004f3c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b58 +80015662 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b58_str +80004f68 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b59 +8001569c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b59_str +80004f94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b60 +800156d6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b60_str +80004fc0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b61 +80015710 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b61_str +80004fec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b62 +8001574a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b62_str +80005018 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b63 +80015784 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b63_str +80005044 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b64 +800157be l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b64_str +80005070 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b65 +800157f8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b65_str +8000509c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b66 +80015832 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b66_str +800050c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b67 +8001586c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b67_str +800050f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b68 +800158a6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b68_str +80005120 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b69 +800158e0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b69_str +8000514c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b70 +8001591a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b70_str +80005178 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b71 +80015954 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b71_str +800051a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b72 +8001598e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b72_str +800051d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b73 +800159c8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b73_str +800051fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b74 +80015a02 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b74_str +80005228 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b75 +80015a3c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b75_str +80005254 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b76 +80015a76 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b76_str +80005280 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b77 +80015ab0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b77_str +800052ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b78 +80015aea l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b78_str +800052d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b79 +80015b24 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b79_str +80005304 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b80 +80015b5e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b80_str +80005330 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b81 +80015b98 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b81_str +8000535c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b82 +80015bd2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b82_str +80005388 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b83 +80015c0c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b83_str +800053b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b84 +80015c46 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b84_str +800053e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b85 +80015c80 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b85_str +8000540c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b86 +80015cba l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b86_str +80005438 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b87 +80015cf4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b87_str +80005464 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b88 +80015d2e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b88_str +80005490 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b89 +80015d68 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b89_str +800054bc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b90 +80015da2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b90_str +800054e8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b91 +80015ddc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b91_str +80005514 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b92 +80015e16 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b92_str +80005540 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b93 +80015e50 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b93_str +8000556c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b94 +80015e8a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b94_str +80005598 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b95 +80015ec4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b95_str +800055c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b96 +80015efe l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b96_str +800055f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b97 +80015f38 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b97_str +8000561c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b98 +80015f72 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b98_str +80005648 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b99 +80015fac l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b99_str +80005674 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b100 +80015fe6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b100_str +800056a0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b101 +80016021 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b101_str +800056cc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b102 +8001605c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b102_str +800056f8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b103 +80016097 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b103_str +80005724 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b104 +800160d2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b104_str +80005750 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b105 +8001610d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b105_str +8000577c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b106 +80016148 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b106_str +800057a8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b107 +80016183 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b107_str +800057d4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b108 +800161be l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b108_str +80005800 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b109 +800161f9 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b109_str +8000582c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b110 +80016234 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b110_str +80005858 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b111 +8001626f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b111_str +80005884 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b112 +800162aa l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b112_str +800058b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b113 +800162e5 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b113_str +800058dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b114 +80016320 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b114_str +80005908 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b115 +8001635b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b115_str +80005934 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b116 +80016396 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b116_str +80005960 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b117 +800163d1 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b117_str +8000598c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b118 +8001640c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b118_str +800059b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b119 +80016447 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b119_str +800059e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b120 +80016482 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b120_str +80005a10 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b121 +800164bd l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b121_str +80005a3c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b122 +800164f8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b122_str +80005a68 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b123 +80016533 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b123_str +80005a94 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b124 +8001656e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b124_str +80005ac0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b125 +800165a9 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b125_str +80005aec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b126 +800165e4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b126_str +80005b18 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b127 +8001661f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b127_str +80005b44 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b128 +8001665a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b128_str +80005b70 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b129 +80016695 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b129_str +80005b9c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b130 +800166d0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b130_str +80005bc8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b131 +8001670b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b131_str +80005bf4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b132 +80016746 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b132_str +80005c20 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b133 +80016781 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b133_str +80005c4c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b134 +800167bc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b134_str +80005c78 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b135 +800167f7 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b135_str +80005ca4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b136 +80016832 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b136_str +80005cd0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b137 +8001686d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b137_str +80005cfc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b138 +800168a8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b138_str +80005d28 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b139 +800168e3 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b139_str +80005d54 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b140 +8001691e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b140_str +80005d80 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b141 +80016959 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b141_str +80005dac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b142 +80016994 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b142_str +80005dd8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b143 +800169cf l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b143_str +80005e04 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b144 +80016a0a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b144_str +80005e30 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b145 +80016a45 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b145_str +80005e5c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b146 +80016a80 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b146_str +80005e88 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b147 +80016abb l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b147_str +80005eb4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b148 +80016af6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b148_str +80005ee0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b149 +80016b31 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b149_str +80005f0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b150 +80016b6c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b150_str +80005f38 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b151 +80016ba7 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b151_str +80005f64 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b152 +80016be2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b152_str +80005f90 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b153 +80016c1d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b153_str +80005fbc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b154 +80016c58 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b154_str +80005fe8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b155 +80016c93 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b155_str +80006014 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b156 +80016cce l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b156_str +80006040 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b157 +80016d09 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b157_str +8000606c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b158 +80016d44 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b158_str +80006098 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b159 +80016d7f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b159_str +800060c4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b160 +80016dba l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b160_str +800060f0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b161 +80016df5 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b161_str +8000611c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b162 +80016e30 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b162_str +80006148 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b163 +80016e6b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b163_str +80006174 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b164 +80016ea6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b164_str +800061a0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b165 +80016ee1 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b165_str +800061cc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b166 +80016f1c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b166_str +800061f8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b167 +80016f57 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b167_str +80006224 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b168 +80016f92 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b168_str +80006250 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b169 +80016fcd l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b169_str +8000627c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b170 +80017008 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b170_str +800062a8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b171 +80017043 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b171_str +800062d4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b172 +8001707e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b172_str +80006300 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b173 +800170b9 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b173_str +8000632c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b174 +800170f4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b174_str +80006358 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b175 +8001712f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b175_str +80006384 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b176 +8001716a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b176_str +800063b0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b177 +800171a5 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b177_str +800063dc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b178 +800171e0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b178_str +80006408 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b179 +8001721b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b179_str +80006434 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b180 +80017256 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b180_str +80006460 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b181 +80017291 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b181_str +8000648c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b182 +800172cc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b182_str +800064b8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b183 +80017307 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b183_str +800064e4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b184 +80017342 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b184_str +80006510 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b185 +8001737d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b185_str +8000653c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b186 +800173b8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b186_str +80006568 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b187 +800173f3 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b187_str +80006594 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b188 +8001742e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b188_str +800065c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b189 +80017469 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b189_str +800065ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b190 +800174a4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b190_str +80006618 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b191 +800174df l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b191_str +80006644 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b192 +8001751a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b192_str +80006670 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b193 +80017555 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b193_str +8000669c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b194 +80017590 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b194_str +800066c8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b195 +800175cb l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b195_str +800066f4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b196 +80017606 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b196_str +80006720 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b197 +80017641 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b197_str +8000674c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b198 +8001767c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b198_str +80006778 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b199 +800176b7 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b199_str +800067a4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b200 +800176f2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b200_str +800067d0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b201 +8001772d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b201_str +800067fc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b202 +80017768 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b202_str +80006828 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b203 +800177a3 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b203_str +80006854 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b204 +800177de l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b204_str +80006880 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b205 +80017819 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b205_str +800068ac l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b206 +80017854 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b206_str +800068d8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b207 +8001788f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b207_str +80006904 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b208 +800178ca l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b208_str +80006930 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b209 +80017905 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b209_str +8000695c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b210 +80017940 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b210_str +80006988 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b211 +8001797b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b211_str +800069b4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b212 +800179b6 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b212_str +800069e0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b213 +800179f1 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b213_str +80006a0c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b214 +80017a2c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b214_str +80006a38 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b215 +80017a67 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b215_str +80006a64 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b216 +80017aa2 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b216_str +80006a90 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b217 +80017add l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b217_str +80006abc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b218 +80017b18 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b218_str +80006ae8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b219 +80017b53 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b219_str +80006b14 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b220 +80017b8e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b220_str +80006b40 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b221 +80017bc9 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b221_str +80006b6c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b222 +80017c04 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b222_str +80006b98 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b223 +80017c3f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b223_str +80006bc4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b224 +80017c7a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b224_str +80006bf0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b225 +80017cb5 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b225_str +80006c1c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b226 +80017cf0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b226_str +80006c48 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b227 +80017d2b l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b227_str +80006c74 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b228 +80017d66 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b228_str +80006ca0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b229 +80017da1 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b229_str +80006ccc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b230 +80017ddc l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b230_str +80006cf8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b231 +80017e17 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b231_str +80006d24 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b232 +80017e52 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b232_str +80006d50 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b233 +80017e8d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b233_str +80006d7c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b234 +80017ec8 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b234_str +80006da8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b235 +80017f03 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b235_str +80006dd4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b236 +80017f3e l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b236_str +80006e00 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b237 +80017f79 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b237_str +80006e2c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b238 +80017fb4 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b238_str +80006e58 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b239 +80017fef l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b239_str +80006e84 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b240 +8001802a l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b240_str +80006eb0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b241 +80018065 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b241_str +80006edc l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b242 +800180a0 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b242_str +80006f08 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b243 +800180db l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b243_str +80006f34 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b244 +80018116 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b244_str +80006f60 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b245 +80018151 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b245_str +80006f8c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b246 +8001818c l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b246_str +80006fb8 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b247 +800181c7 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b247_str +80006fe4 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b248 +80018202 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b248_str +80007010 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b249 +8001823d l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b249_str +8000703c l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b250 +80018278 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b250_str +80007068 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b251 +800182b3 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b251_str +80007094 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b252 +800182ee l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b252_str +800070c0 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b253 +80018329 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b253_str +800070ec l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b254 +80018364 l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b254_str +80007118 l .text.rvtest 00000000 Zkne_aes32esmi_cg_cp_sbox_b255 +8001839f l .data 00000000 Zkne_aes32esmi_cg_cp_sbox_b255_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80007148 l .text.rvtest 00000000 exit_Mcleanup +8000714c l .text.rvtest 00000000 resto_Medeleg +80007154 l .text.rvtest 00000000 resto_Msatp +80007158 l .text.rvtest 00000000 resto_Mscratch +80007160 l .text.rvtest 00000000 resto_Mxtvec +80007174 l .text.rvtest 00000000 resto_Mtramp +80007178 l .text.rvtest 00000000 resto_Mloop +80007190 l .text.rvtest 00000000 check_trap_sig_overflow +80007430 l .text.rvtest 00000000 trap_sig_overflow +800072d0 l .text.rvtest 00000000 check_trap_sig_offset +80018a63 l .data 00000000 failstr +8002a564 l .text.rvmodel 00000000 rvmodel_io_write_str +80018aa1 l .data 00000000 begin_debugstr +80018b01 l .data 00000000 trap_sig_overflowstr +800196ac l .data 00000000 endstr +8002a5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +8000c328 l .data 00000000 Mtrap_sig +8001ab98 l .data 00000000 trap_sigptr +8001ab90 l .data 00000000 final_trap_sig_offset +80007394 l .text.rvtest 00000000 check_abort_test +80008228 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80018c55 l .data 00000000 trap_sig_offset_mismatch +800073b0 l .text.rvtest 00000000 exit_cleanup +80007464 l .text.rvtest 00000000 abort_test +80018ac3 l .data 00000000 abortstr +80018a24 l .data 00000000 successstr +8002a5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80007500 l .text.rvtest 00000000 trap_Mhandler +80007620 l .text.rvtest 00000000 rvtest_Mendtest +80007644 l .text.rvtest 00000000 common_Mhandler +800076b0 l .text.rvtest 00000000 spcl_M2mmode_test +800076bc l .text.rvtest 00000000 spcl_Mchk4alt +800076cc l .text.rvtest 00000000 spcl_Mchk4ecall +800076c4 l .text.rvtest 00000000 spcl_Mparam_chk +80008150 l .text.rvtest 00000000 Mrtn2mmode +80007c54 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800076d8 l .text.rvtest 00000000 Mgoto_mchk +800076dc l .text.rvtest 00000000 tsbi_Mdispatch +80007704 l .text.rvtest 00000000 tsbi_Mgoto_mode +800076f4 l .text.rvtest 00000000 tsbi_Mecall_test +80007770 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007ec0 l .text.rvtest 00000000 resto_Mrtn +80007730 l .text.rvtest 00000000 tsbi_Mgoto_m +80007740 l .text.rvtest 00000000 tsbi_Mgoto_s +8000775c l .text.rvtest 00000000 tsbi_Mgoto_u +8000776c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800078f0 l .text.rvtest 00000000 tsbi_instr_table +800077a0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800077b4 l .text.rvtest 00000000 found_instr +800077f8 l .text.rvtest 00000000 tsbi_instr_not_found +800077e4 l .text.rvtest 00000000 tsbi_instr_rtn +8001a0e3 l .data 00000000 tsbi_instr_not_found_str +80009cd8 l .text.rvtest 00000000 failedtest_hex_to_str +80018548 l .data 00000000 ascii_buffer +80018b6a l .data 00000000 newlinestr +80007c70 l .text.rvtest 00000000 Mxcpt_sig_sv +80007c5c l .text.rvtest 00000000 Mint_sig_sv +80007c70 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80018528 l .data 00000000 saved_xepc +800295fc l .data 00000000 sig_end_canary +80007d08 l .text.rvtest 00000000 sv_Mvect +80018c6c l .data 00000000 sv_Mvect_str +80007dac l .text.rvtest 00000000 sv_Mcause +80018d6e l .data 00000000 sv_Mcause_str +80007ee0 l .text.rvtest 00000000 common_Mint_handler +80007dd4 l .text.rvtest 00000000 common_Mexcpt_handler +80007de0 l .text.rvtest 00000000 vmem_adj_Mepc +80007e34 l .text.rvtest 00000000 sv_Mepc +80007e08 l .text.rvtest 00000000 code_adj_Mepc +80007e30 l .text.rvtest 00000000 adj_Mepc +80007e1c l .text.rvtest 00000000 data_adj_Mepc +80018e69 l .data 00000000 sv_Mepc_str +80007e54 l .text.rvtest 00000000 skpsv_Mepc +80007e7c l .text.rvtest 00000000 adj_Mepc_rtn +80007e88 l .text.rvtest 00000000 skp_adj_Mepc +80007e8c l .text.rvtest 00000000 sv_Mtval +80018f5c l .data 00000000 sv_Mtval_str +80007eac l .text.rvtest 00000000 skp_Mtval +80007eb8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80007f18 l .text.rvtest 00000000 spcl_Mhandler +80007ef4 l .text.rvtest 00000000 sv_Mip +800190cf l .data 00000000 sv_Mip_str +80007f34 l .text.rvtest 00000000 spcl_Mdispatch_handling +80007f4c l .text.rvtest 00000000 spcl_Mdispatch +80007f50 l .text.rvtest 00000000 clrint_Mtbl +8002a000 l .text.rvmodel 00000000 Mclr_Msw_int +8002a014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8002a030 l .text.rvmodel 00000000 Mclr_Mext_int +80008050 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081a0 l .text.rvtest 00000000 rtn_fm_mmode +8000818c l .text.rvtest 00000000 from_hs_u +8000817c l .text.rvtest 00000000 from_vs +800183e0 l .data 00000000 begin_failure_scratch +8000825c l .text.rvtest 00000000 failedtest_saveregs +800082cc l .text.rvtest 00000000 failedtest_saveresults +800183e0 l .data 00000000 failure_type +8000846c l .text.rvtest 00000000 failedtest_saveresults_trap +800082dc l .text.rvtest 00000000 failedtest_saveresults_int +800083f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000842c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80008760 l .text.rvtest 00000000 failedtest_saveresults_common +80018508 l .data 00000000 failure_diag_type +80018518 l .data 00000000 trap_diag_fail_str_ptr +80008720 l .text.rvtest 00000000 trap_diag_offset_mismatch +80018510 l .data 00000000 trap_diag_subtype +80008734 l .text.rvtest 00000000 trap_diag_field_identified +80019053 l .data 00000000 sv_Mtval2_str +80019091 l .data 00000000 sv_Mtinst_str +80018cac l .data 00000000 sv_Svect_str +80018dac l .data 00000000 sv_Scause_str +80018ea5 l .data 00000000 sv_Sepc_str +80018f99 l .data 00000000 sv_Stval_str +8001910a l .data 00000000 sv_Sip_str +80018cec l .data 00000000 sv_Hvect_str +80018dea l .data 00000000 sv_Hcause_str +80018ee1 l .data 00000000 sv_Hepc_str +80018fd6 l .data 00000000 sv_Htval_str +80019145 l .data 00000000 sv_Hip_str +80018d2d l .data 00000000 sv_Vvect_str +80018e29 l .data 00000000 sv_Vcause_str +80018f1e l .data 00000000 sv_Vepc_str +80019014 l .data 00000000 sv_Vtval_str +80019181 l .data 00000000 sv_Vip_str +800191be l .data 00000000 Mclr_Mext_int_str +8001920d l .data 00000000 Mclr_Sext_int_str +80019308 l .data 00000000 Sclr_Sext_int_str +80019404 l .data 00000000 Hclr_Sext_int_str +80008750 l .text.rvtest 00000000 trap_diag_generic_report +80018514 l .data 00000000 trap_diag_mode +80008790 l .text.rvtest 00000000 failedtest_report +80008790 l .text.rvtest 00000000 print_failstr +80008808 l .text.rvtest 00000000 print_testnamestr +80018b58 l .data 00000000 testnamestr +80008848 l .text.rvtest 00000000 print_failure_test_name_str +80018500 l .data 00000000 failure_string_ptr +80008858 l .text.rvtest 00000000 print_newline_str +80008dcc l .text.rvtest 00000000 failedtest_report_trap_detailed +80018b6c l .data 00000000 inststr +800184e0 l .data 00000000 failing_instruction +80018b80 l .data 00000000 addrstr +800184e8 l .data 00000000 failing_addr +800195b7 l .data 00000000 regstr +80008a38 l .text.rvtest 00000000 failedtest_report_not_intreg +800184e4 l .data 00000000 failing_reg +80009d54 l .text.rvtest 00000000 failedtest_dec_to_str +80008b4c l .text.rvtest 00000000 failedtest_report_print_regstr +80008a8c l .text.rvtest 00000000 failedtest_report_fpreg +80008ad8 l .text.rvtest 00000000 failedtest_report_vecreg +80008b14 l .text.rvtest 00000000 failedtest_report_vxsat +800196cd l .data 00000000 fflagsstr +80008b88 l .text.rvtest 00000000 failedtest_report_after_reg +800195b0 l .data 00000000 vxsatstr +800195c8 l .data 00000000 badvalstr +80008bec l .text.rvtest 00000000 failedtest_report_badval_not_fp +800184f0 l .data 00000000 failing_value +80008bfc l .text.rvtest 00000000 failedtest_report_badval_done +80008ccc l .text.rvtest 00000000 failedtest_report_diag +800195df l .data 00000000 expvalstr +80008c8c l .text.rvtest 00000000 failedtest_report_expval_not_fp +800184f8 l .data 00000000 expected_value +80008c9c l .text.rvtest 00000000 failedtest_report_expval_done +80009a84 l .text.rvtest 00000000 failedtest_report_end +80008d4c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80008cd4 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +800195f6 l .data 00000000 failure_diag_bad_instr_str +80019654 l .data 00000000 failure_diag_bad_ptr_str +80008e90 l .text.rvtest 00000000 trap_report_offset_mismatch +800196f9 l .data 00000000 trap_diag_header_str +80019725 l .data 00000000 trap_diag_origstr_label +80009910 l .text.rvtest 00000000 trap_report_generic +800091cc l .text.rvtest 00000000 trap_report_field_mismatch +80019735 l .data 00000000 trap_diag_expected_offset_str +80019760 l .data 00000000 trap_diag_actual_offset_str +800090ac l .text.rvtest 00000000 trap_report_missing_traps +80008f9c l .text.rvtest 00000000 trap_report_extra_traps +8001978f l .data 00000000 trap_diag_extra_traps_str +800197f7 l .data 00000000 trap_diag_diff_bytes_str +8001981e l .data 00000000 trap_diag_extra_next_step_str +800197bb l .data 00000000 trap_diag_missing_traps_str +80019906 l .data 00000000 trap_diag_missing_next_step_str +800199ed l .data 00000000 trap_diag_handler_mode_str +80009264 l .text.rvtest 00000000 trap_mode_m +800092a4 l .text.rvtest 00000000 trap_mode_s +800092e4 l .text.rvtest 00000000 trap_mode_h +80009324 l .text.rvtest 00000000 trap_mode_v +80019a29 l .data 00000000 trap_diag_mode_unknown_str +80009360 l .text.rvtest 00000000 trap_mode_print +80019a07 l .data 00000000 trap_diag_mode_m_str +80019a0f l .data 00000000 trap_diag_mode_s_str +80019a17 l .data 00000000 trap_diag_mode_hs_str +80019a20 l .data 00000000 trap_diag_mode_vs_str +80019a32 l .data 00000000 trap_diag_field_str +80009424 l .text.rvtest 00000000 trap_field_vect +80009464 l .text.rvtest 00000000 trap_field_cause +800094a4 l .text.rvtest 00000000 trap_field_epc +800094e4 l .text.rvtest 00000000 trap_field_tval +80009524 l .text.rvtest 00000000 trap_field_ip +80009564 l .text.rvtest 00000000 trap_field_tval2 +800095a4 l .text.rvtest 00000000 trap_field_tinst +800095e4 l .text.rvtest 00000000 trap_field_intid +80019b89 l .data 00000000 trap_diag_field_unknown_str +80009620 l .text.rvtest 00000000 trap_field_print +80019a4c l .data 00000000 trap_diag_field_vect_str +80019a7d l .data 00000000 trap_diag_field_cause_str +80019a9d l .data 00000000 trap_diag_field_epc_str +80019abb l .data 00000000 trap_diag_field_tval_str +80019ada l .data 00000000 trap_diag_field_ip_str +80019b02 l .data 00000000 trap_diag_field_tval2_str +80019b2e l .data 00000000 trap_diag_field_tinst_str +80019b5a l .data 00000000 trap_diag_field_intid_str +80019b98 l .data 00000000 trap_diag_expected_str +80019baf l .data 00000000 trap_diag_actual_str +800097bc l .text.rvtest 00000000 trap_field_not_cause +80019bc6 l .data 00000000 trap_diag_expected_cause_name_str +800099f4 l .text.rvtest 00000000 trap_cause_to_str +80019bdd l .data 00000000 trap_diag_actual_cause_name_str +800097bc l .text.rvtest 00000000 trap_field_not_epc +80009ad0 l .text.rvtest 00000000 failedtest_print_csr_context +80019c53 l .data 00000000 trap_diag_hint_vect_str +80019d29 l .data 00000000 trap_diag_hint_cause_str +80019e1c l .data 00000000 trap_diag_hint_epc_str +80019f17 l .data 00000000 trap_diag_hint_tval_str +80019ffe l .data 00000000 trap_diag_hint_ip_str +80019c0b l .data 00000000 trap_diag_generic_str +80018bf4 l .data 00000000 xepcinstrstr +80009a18 l .text.rvtest 00000000 trap_cause_interrupt +800099f8 l .text.rvtest 00000000 trap_cause_exception +80009a44 l .text.rvtest 00000000 trap_cause_unknown +80018570 l .data 00000000 trap_excpt_name_tbl +800185d0 l .data 00000000 trap_int_name_tbl +80018a0e l .data 00000000 trap_cause_unknown_str +80009ac8 l .text.rvtest 00000000 failedtest_terminate +80018520 l .data 00000000 csr_context_ret_addr +80018c15 l .data 00000000 mepcstr +80018c25 l .data 00000000 mcausestr +80018530 l .data 00000000 saved_xcause +80018c35 l .data 00000000 mtvalstr +80018538 l .data 00000000 saved_xtval +80018c45 l .data 00000000 mstatusstr +80018540 l .data 00000000 saved_xstatus +80009d18 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80009d34 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80009d38 l .text.rvtest 00000000 failedtest_hex_to_str_write +8002a0e4 l .text.rvmodel 00000000 uart_init +8002a0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8002a120 l .text.rvmodel 00000000 init_Mscratch +8002a128 l .text.rvmodel 00000000 init_Mtimecmp +8002a13c l .text.rvmodel 00000000 init_Medeleg +8002a144 l .text.rvmodel 00000000 init_Msatp +8002a144 l .text.rvmodel 00000000 init_Mtvec +8002a264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8002a224 l .text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +8001a130 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +800196d5 l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +80018570 l .data 00000000 end_failure_scratch +80018610 l .data 00000000 trap_excpt_name_0 +80018630 l .data 00000000 trap_excpt_name_1 +8001864a l .data 00000000 trap_excpt_name_2 +8001865f l .data 00000000 trap_excpt_name_3 +8001866b l .data 00000000 trap_excpt_name_4 +80018684 l .data 00000000 trap_excpt_name_5 +80018697 l .data 00000000 trap_excpt_name_6 +800186b5 l .data 00000000 trap_excpt_name_7 +800186cd l .data 00000000 trap_excpt_name_8 +800186eb l .data 00000000 trap_excpt_name_9 +80018709 l .data 00000000 trap_excpt_name_10 +80018728 l .data 00000000 trap_excpt_name_11 +80018746 l .data 00000000 trap_excpt_name_12 +8001875e l .data 00000000 trap_excpt_name_13 +8001876f l .data 00000000 trap_excpt_name_14 +8001877e l .data 00000000 trap_excpt_name_15 +80018794 l .data 00000000 trap_excpt_name_16 +800187a1 l .data 00000000 trap_excpt_name_17 +800187b0 l .data 00000000 trap_excpt_name_18 +800187c0 l .data 00000000 trap_excpt_name_19 +800187d0 l .data 00000000 trap_excpt_name_20 +800187ee l .data 00000000 trap_excpt_name_21 +80018805 l .data 00000000 trap_excpt_name_22 +8001881a l .data 00000000 trap_excpt_name_23 +80018836 l .data 00000000 trap_int_name_0 +8001884e l .data 00000000 trap_int_name_1 +8001886d l .data 00000000 trap_int_name_2 +80018894 l .data 00000000 trap_int_name_3 +800188b0 l .data 00000000 trap_int_name_4 +800188c8 l .data 00000000 trap_int_name_5 +800188e4 l .data 00000000 trap_int_name_6 +80018908 l .data 00000000 trap_int_name_7 +80018921 l .data 00000000 trap_int_name_8 +80018939 l .data 00000000 trap_int_name_9 +80018958 l .data 00000000 trap_int_name_10 +8001897f l .data 00000000 trap_int_name_11 +8001899b l .data 00000000 trap_int_name_12 +800189c0 l .data 00000000 trap_int_name_13 +800189dc l .data 00000000 trap_int_name_14 +800189f5 l .data 00000000 trap_int_name_15 +80018bc1 l .data 00000000 xepcstr +8001925f l .data 00000000 Mclr_Vext_int_str +800192b9 l .data 00000000 Sclr_Mext_int_str +8001935a l .data 00000000 Sclr_Vext_int_str +800193b4 l .data 00000000 Hclr_Mext_int_str +80019457 l .data 00000000 Hclr_Vext_int_str +800194b2 l .data 00000000 Vclr_Mext_int_str +80019502 l .data 00000000 Vclr_Sext_int_str +80019555 l .data 00000000 Vclr_Vext_int_str +80019bf4 l .data 00000000 trap_diag_curr_xepc_str +80029600 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80029600 g .data 00000000 rvtest_sig_end +80007658 g .text.rvtest 00000000 common_Mentry +80007190 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +8001a130 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +80007138 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +8001a130 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +8001a127 g .data 00000000 rvtest_data_end +80007138 g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029700 g .tohost 00000000 fromhost +80029600 g .tohost 00000000 tohost +800073f0 g .text.rvtest 00000000 rvtest_fail_summary +80007480 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x962051be +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x2d245445 +80000048: 0001ab03 lw x22,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zkne_aes32esmi_cg_cp_rs1_b0: + aes32esmi x12, x0, x22, 0 # perform operation +80000050: 27600633 aes32esmi x12,x0,x22,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zkne_aes32esmi_cg_cp_rs1_b0, Zkne_aes32esmi_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00c20863 beq x4,x12,80000068 +8000005c: 164082ef jal x5,800081c0 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x9031a51b +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xf6bc436a +80000074: 0001a783 lw x15,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zkne_aes32esmi_cg_cp_rs1_b1: + aes32esmi x28, x1, x15, 2 # perform operation +8000007c: a6f08e33 aes32esmi x28,x1,x15,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zkne_aes32esmi_cg_cp_rs1_b1, Zkne_aes32esmi_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01c20863 beq x4,x28,80000094 +80000088: 138082ef jal x5,800081c0 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d846 .word 0x8000d846 +80000094: 00410113 addi x2,x2,4 + + mv x25, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x220162bb +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x43548bfe +800000a4: 0001a683 lw x13,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zkne_aes32esmi_cg_cp_rs1_b2: + aes32esmi x28, x2, x13, 1 # perform operation +800000ac: 66d10e33 aes32esmi x28,x2,x13,0x1 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zkne_aes32esmi_cg_cp_rs1_b2, Zkne_aes32esmi_cg_cp_rs1_b2_str) +800000b0: 000ca203 lw x4,0(x25) +800000b4: 01c20863 beq x4,x28,800000c4 +800000b8: 108082ef jal x5,800081c0 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d87c .word 0x8000d87c +800000c4: 004c8c93 addi x25,x25,4 + + mv x18, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018913 addi x18,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x23ee7b32 +800000cc: 00092183 lw x3,0(x18) +800000d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x2e26a91c +800000d4: 00092d83 lw x27,0(x18) +800000d8: 00490913 addi x18,x18,4 + +800000dc : +Zkne_aes32esmi_cg_cp_rs1_b3: + aes32esmi x14, x3, x27, 1 # perform operation +800000dc: 67b18733 aes32esmi x14,x3,x27,0x1 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes32esmi_cg_cp_rs1_b3, Zkne_aes32esmi_cg_cp_rs1_b3_str) +800000e0: 000ca203 lw x4,0(x25) +800000e4: 00e20863 beq x4,x14,800000f4 +800000e8: 0d8082ef jal x5,800081c0 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8b2 .word 0x8000d8b2 +800000f4: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x69a8570a +80000100: 00092203 lw x4,0(x18) +80000104: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x194b95d2 +80000108: 00092003 lw x0,0(x18) +8000010c: 00490913 addi x18,x18,4 + +80000110 : +Zkne_aes32esmi_cg_cp_rs1_b4: + aes32esmi x6, x4, x0, 1 # perform operation +80000110: 66020333 aes32esmi x6,x4,x0,0x1 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes32esmi_cg_cp_rs1_b4, Zkne_aes32esmi_cg_cp_rs1_b4_str) +80000114: 000ca383 lw x7,0(x25) +80000118: 00638863 beq x7,x6,80000128 +8000011c: 0bc0846f jal x8,800081d8 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8e8 .word 0x8000d8e8 +80000128: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xf13f8d21 +8000012c: 00092283 lw x5,0(x18) +80000130: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x281f073f +80000134: 00092503 lw x10,0(x18) +80000138: 00490913 addi x18,x18,4 + +8000013c : +Zkne_aes32esmi_cg_cp_rs1_b5: + aes32esmi x20, x5, x10, 0 # perform operation +8000013c: 26a28a33 aes32esmi x20,x5,x10,0x0 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zkne_aes32esmi_cg_cp_rs1_b5, Zkne_aes32esmi_cg_cp_rs1_b5_str) +80000140: 000ca383 lw x7,0(x25) +80000144: 01438863 beq x7,x20,80000154 +80000148: 0900846f jal x8,800081d8 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d91e .word 0x8000d91e +80000154: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x4747e5f8 +80000158: 00092303 lw x6,0(x18) +8000015c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x6e25f0f2 +80000160: 00092e03 lw x28,0(x18) +80000164: 00490913 addi x18,x18,4 + +80000168 : +Zkne_aes32esmi_cg_cp_rs1_b6: + aes32esmi x21, x6, x28, 3 # perform operation +80000168: e7c30ab3 aes32esmi x21,x6,x28,0x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes32esmi_cg_cp_rs1_b6, Zkne_aes32esmi_cg_cp_rs1_b6_str) +8000016c: 000ca383 lw x7,0(x25) +80000170: 01538863 beq x7,x21,80000180 +80000174: 0640846f jal x8,800081d8 +80000178: 80000168 .word 0x80000168 +8000017c: 8000d954 .word 0x8000d954 +80000180: 004c8c93 addi x25,x25,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xe6252fd8 +8000018c: 00092383 lw x7,0(x18) +80000190: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x1de3719c +80000194: 00092e03 lw x28,0(x18) +80000198: 00490913 addi x18,x18,4 + +8000019c : +Zkne_aes32esmi_cg_cp_rs1_b7: + aes32esmi x24, x7, x28, 2 # perform operation +8000019c: a7c38c33 aes32esmi x24,x7,x28,0x2 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes32esmi_cg_cp_rs1_b7, Zkne_aes32esmi_cg_cp_rs1_b7_str) +800001a0: 000ca203 lw x4,0(x25) +800001a4: 01820863 beq x4,x24,800001b4 +800001a8: 018082ef jal x5,800081c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000d98a .word 0x8000d98a +800001b4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xc0f40b2f +800001b8: 00092403 lw x8,0(x18) +800001bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x6867392e +800001c0: 00092783 lw x15,0(x18) +800001c4: 00490913 addi x18,x18,4 + +800001c8 : +Zkne_aes32esmi_cg_cp_rs1_b8: + aes32esmi x26, x8, x15, 1 # perform operation +800001c8: 66f40d33 aes32esmi x26,x8,x15,0x1 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zkne_aes32esmi_cg_cp_rs1_b8, Zkne_aes32esmi_cg_cp_rs1_b8_str) +800001cc: 000ca203 lw x4,0(x25) +800001d0: 01a20863 beq x4,x26,800001e0 +800001d4: 7ed072ef jal x5,800081c0 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 8000d9c0 .word 0x8000d9c0 +800001e0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x858ef879 +800001e4: 00092483 lw x9,0(x18) +800001e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x2670d6ff +800001ec: 00092683 lw x13,0(x18) +800001f0: 00490913 addi x18,x18,4 + +800001f4 : +Zkne_aes32esmi_cg_cp_rs1_b9: + aes32esmi x23, x9, x13, 3 # perform operation +800001f4: e6d48bb3 aes32esmi x23,x9,x13,0x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zkne_aes32esmi_cg_cp_rs1_b9, Zkne_aes32esmi_cg_cp_rs1_b9_str) +800001f8: 000ca203 lw x4,0(x25) +800001fc: 01720863 beq x4,x23,8000020c +80000200: 7c1072ef jal x5,800081c0 +80000204: 800001f4 .word 0x800001f4 +80000208: 8000d9f6 .word 0x8000d9f6 +8000020c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x062fbc51 +80000210: 00092503 lw x10,0(x18) +80000214: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xdee7b0ee +80000218: 00092103 lw x2,0(x18) +8000021c: 00490913 addi x18,x18,4 + +80000220 : +Zkne_aes32esmi_cg_cp_rs1_b10: + aes32esmi x12, x10, x2, 3 # perform operation +80000220: e6250633 aes32esmi x12,x10,x2,0x3 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zkne_aes32esmi_cg_cp_rs1_b10, Zkne_aes32esmi_cg_cp_rs1_b10_str) +80000224: 000ca203 lw x4,0(x25) +80000228: 00c20863 beq x4,x12,80000238 +8000022c: 795072ef jal x5,800081c0 +80000230: 80000220 .word 0x80000220 +80000234: 8000da2d .word 0x8000da2d +80000238: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x36a0ef99 +8000023c: 00092583 lw x11,0(x18) +80000240: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x2ef549d6 +80000244: 00092e03 lw x28,0(x18) +80000248: 00490913 addi x18,x18,4 + +8000024c : +Zkne_aes32esmi_cg_cp_rs1_b11: + aes32esmi x7, x11, x28, 2 # perform operation +8000024c: a7c583b3 aes32esmi x7,x11,x28,0x2 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zkne_aes32esmi_cg_cp_rs1_b11, Zkne_aes32esmi_cg_cp_rs1_b11_str) +80000250: 000ca203 lw x4,0(x25) +80000254: 00720863 beq x4,x7,80000264 +80000258: 769072ef jal x5,800081c0 +8000025c: 8000024c .word 0x8000024c +80000260: 8000da65 .word 0x8000da65 +80000264: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x02c4bfd3 +80000268: 00092603 lw x12,0(x18) +8000026c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x2931c503 +80000270: 00092503 lw x10,0(x18) +80000274: 00490913 addi x18,x18,4 + +80000278 : +Zkne_aes32esmi_cg_cp_rs1_b12: + aes32esmi x27, x12, x10, 0 # perform operation +80000278: 26a60db3 aes32esmi x27,x12,x10,0x0 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zkne_aes32esmi_cg_cp_rs1_b12, Zkne_aes32esmi_cg_cp_rs1_b12_str) +8000027c: 000ca203 lw x4,0(x25) +80000280: 01b20863 beq x4,x27,80000290 +80000284: 73d072ef jal x5,800081c0 +80000288: 80000278 .word 0x80000278 +8000028c: 8000da9d .word 0x8000da9d +80000290: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x0d5d8033 +80000294: 00092683 lw x13,0(x18) +80000298: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x0101062e +8000029c: 00092d83 lw x27,0(x18) +800002a0: 00490913 addi x18,x18,4 + +800002a4 : +Zkne_aes32esmi_cg_cp_rs1_b13: + aes32esmi x8, x13, x27, 3 # perform operation +800002a4: e7b68433 aes32esmi x8,x13,x27,0x3 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zkne_aes32esmi_cg_cp_rs1_b13, Zkne_aes32esmi_cg_cp_rs1_b13_str) +800002a8: 000ca203 lw x4,0(x25) +800002ac: 00820863 beq x4,x8,800002bc +800002b0: 711072ef jal x5,800081c0 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 8000dad5 .word 0x8000dad5 +800002bc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x546b00c1 +800002c0: 00092703 lw x14,0(x18) +800002c4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x929739d0 +800002c8: 00092683 lw x13,0(x18) +800002cc: 00490913 addi x18,x18,4 + +800002d0 : +Zkne_aes32esmi_cg_cp_rs1_b14: + aes32esmi x28, x14, x13, 1 # perform operation +800002d0: 66d70e33 aes32esmi x28,x14,x13,0x1 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zkne_aes32esmi_cg_cp_rs1_b14, Zkne_aes32esmi_cg_cp_rs1_b14_str) +800002d4: 000ca203 lw x4,0(x25) +800002d8: 01c20863 beq x4,x28,800002e8 +800002dc: 6e5072ef jal x5,800081c0 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 8000db0d .word 0x8000db0d +800002e8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xca04dd71 +800002ec: 00092783 lw x15,0(x18) +800002f0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x4e32d57b +800002f4: 00092703 lw x14,0(x18) +800002f8: 00490913 addi x18,x18,4 + +800002fc : +Zkne_aes32esmi_cg_cp_rs1_b15: + aes32esmi x27, x15, x14, 1 # perform operation +800002fc: 66e78db3 aes32esmi x27,x15,x14,0x1 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zkne_aes32esmi_cg_cp_rs1_b15, Zkne_aes32esmi_cg_cp_rs1_b15_str) +80000300: 000ca203 lw x4,0(x25) +80000304: 01b20863 beq x4,x27,80000314 +80000308: 6b9072ef jal x5,800081c0 +8000030c: 800002fc .word 0x800002fc +80000310: 8000db45 .word 0x8000db45 +80000314: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x7f22643e +80000318: 00092803 lw x16,0(x18) +8000031c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x8d1bc4da +80000320: 00092583 lw x11,0(x18) +80000324: 00490913 addi x18,x18,4 + +80000328 : +Zkne_aes32esmi_cg_cp_rs1_b16: + aes32esmi x17, x16, x11, 1 # perform operation +80000328: 66b808b3 aes32esmi x17,x16,x11,0x1 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes32esmi_cg_cp_rs1_b16, Zkne_aes32esmi_cg_cp_rs1_b16_str) +8000032c: 000ca203 lw x4,0(x25) +80000330: 01120863 beq x4,x17,80000340 +80000334: 68d072ef jal x5,800081c0 +80000338: 80000328 .word 0x80000328 +8000033c: 8000db7d .word 0x8000db7d +80000340: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xd06afed3 +80000344: 00092883 lw x17,0(x18) +80000348: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xd4578abf +8000034c: 00092583 lw x11,0(x18) +80000350: 00490913 addi x18,x18,4 + +80000354 : +Zkne_aes32esmi_cg_cp_rs1_b17: + aes32esmi x16, x17, x11, 2 # perform operation +80000354: a6b88833 aes32esmi x16,x17,x11,0x2 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zkne_aes32esmi_cg_cp_rs1_b17, Zkne_aes32esmi_cg_cp_rs1_b17_str) +80000358: 000ca203 lw x4,0(x25) +8000035c: 01020863 beq x4,x16,8000036c +80000360: 661072ef jal x5,800081c0 +80000364: 80000354 .word 0x80000354 +80000368: 8000dbb5 .word 0x8000dbb5 +8000036c: 004c8c93 addi x25,x25,4 + + mv x6, x18 # switch data pointer register to avoid conflict with test +80000370: 00090313 addi x6,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x05010942 +80000374: 00032903 lw x18,0(x6) +80000378: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xc9d23966 +8000037c: 00032e83 lw x29,0(x6) +80000380: 00430313 addi x6,x6,4 + +80000384 : +Zkne_aes32esmi_cg_cp_rs1_b18: + aes32esmi x14, x18, x29, 2 # perform operation +80000384: a7d90733 aes32esmi x14,x18,x29,0x2 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes32esmi_cg_cp_rs1_b18, Zkne_aes32esmi_cg_cp_rs1_b18_str) +80000388: 000ca203 lw x4,0(x25) +8000038c: 00e20863 beq x4,x14,8000039c +80000390: 631072ef jal x5,800081c0 +80000394: 80000384 .word 0x80000384 +80000398: 8000dbed .word 0x8000dbed +8000039c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x4be1ee91 +800003a0: 00032983 lw x19,0(x6) +800003a4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5d5bc021 +800003a8: 00032703 lw x14,0(x6) +800003ac: 00430313 addi x6,x6,4 + +800003b0 : +Zkne_aes32esmi_cg_cp_rs1_b19: + aes32esmi x15, x19, x14, 3 # perform operation +800003b0: e6e987b3 aes32esmi x15,x19,x14,0x3 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zkne_aes32esmi_cg_cp_rs1_b19, Zkne_aes32esmi_cg_cp_rs1_b19_str) +800003b4: 000ca203 lw x4,0(x25) +800003b8: 00f20863 beq x4,x15,800003c8 +800003bc: 605072ef jal x5,800081c0 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000dc25 .word 0x8000dc25 +800003c8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7145d7ef +800003cc: 00032a03 lw x20,0(x6) +800003d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x7c9815ec +800003d4: 00032883 lw x17,0(x6) +800003d8: 00430313 addi x6,x6,4 + +800003dc : +Zkne_aes32esmi_cg_cp_rs1_b20: + aes32esmi x22, x20, x17, 0 # perform operation +800003dc: 271a0b33 aes32esmi x22,x20,x17,0x0 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes32esmi_cg_cp_rs1_b20, Zkne_aes32esmi_cg_cp_rs1_b20_str) +800003e0: 000ca203 lw x4,0(x25) +800003e4: 01620863 beq x4,x22,800003f4 +800003e8: 5d9072ef jal x5,800081c0 +800003ec: 800003dc .word 0x800003dc +800003f0: 8000dc5d .word 0x8000dc5d +800003f4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x87fd497a +800003f8: 00032a83 lw x21,0(x6) +800003fc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xd0c43cc9 +80000400: 00032403 lw x8,0(x6) +80000404: 00430313 addi x6,x6,4 + +80000408 : +Zkne_aes32esmi_cg_cp_rs1_b21: + aes32esmi x24, x21, x8, 1 # perform operation +80000408: 668a8c33 aes32esmi x24,x21,x8,0x1 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes32esmi_cg_cp_rs1_b21, Zkne_aes32esmi_cg_cp_rs1_b21_str) +8000040c: 000ca203 lw x4,0(x25) +80000410: 01820863 beq x4,x24,80000420 +80000414: 5ad072ef jal x5,800081c0 +80000418: 80000408 .word 0x80000408 +8000041c: 8000dc95 .word 0x8000dc95 +80000420: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xbeaa0ee6 +80000424: 00032b03 lw x22,0(x6) +80000428: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x2ae8b9ce +8000042c: 00032403 lw x8,0(x6) +80000430: 00430313 addi x6,x6,4 + +80000434 : +Zkne_aes32esmi_cg_cp_rs1_b22: + aes32esmi x29, x22, x8, 3 # perform operation +80000434: e68b0eb3 aes32esmi x29,x22,x8,0x3 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zkne_aes32esmi_cg_cp_rs1_b22, Zkne_aes32esmi_cg_cp_rs1_b22_str) +80000438: 000ca203 lw x4,0(x25) +8000043c: 01d20863 beq x4,x29,8000044c +80000440: 581072ef jal x5,800081c0 +80000444: 80000434 .word 0x80000434 +80000448: 8000dccd .word 0x8000dccd +8000044c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xc80094be +80000450: 00032b83 lw x23,0(x6) +80000454: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xbb17e342 +80000458: 00032703 lw x14,0(x6) +8000045c: 00430313 addi x6,x6,4 + +80000460 : +Zkne_aes32esmi_cg_cp_rs1_b23: + aes32esmi x22, x23, x14, 2 # perform operation +80000460: a6eb8b33 aes32esmi x22,x23,x14,0x2 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes32esmi_cg_cp_rs1_b23, Zkne_aes32esmi_cg_cp_rs1_b23_str) +80000464: 000ca203 lw x4,0(x25) +80000468: 01620863 beq x4,x22,80000478 +8000046c: 555072ef jal x5,800081c0 +80000470: 80000460 .word 0x80000460 +80000474: 8000dd05 .word 0x8000dd05 +80000478: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x4098db35 +8000047c: 00032c03 lw x24,0(x6) +80000480: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xc888e682 +80000484: 00032a03 lw x20,0(x6) +80000488: 00430313 addi x6,x6,4 + +8000048c : +Zkne_aes32esmi_cg_cp_rs1_b24: + aes32esmi x19, x24, x20, 0 # perform operation +8000048c: 274c09b3 aes32esmi x19,x24,x20,0x0 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes32esmi_cg_cp_rs1_b24, Zkne_aes32esmi_cg_cp_rs1_b24_str) +80000490: 000ca203 lw x4,0(x25) +80000494: 01320863 beq x4,x19,800004a4 +80000498: 529072ef jal x5,800081c0 +8000049c: 8000048c .word 0x8000048c +800004a0: 8000dd3d .word 0x8000dd3d +800004a4: 004c8c93 addi x25,x25,4 + + mv x3, x25 # switch signature pointer register to avoid conflict with test +800004a8: 000c8193 addi x3,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xfbffb225 +800004ac: 00032c83 lw x25,0(x6) +800004b0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x3e2e0645 +800004b4: 00032983 lw x19,0(x6) +800004b8: 00430313 addi x6,x6,4 + +800004bc : +Zkne_aes32esmi_cg_cp_rs1_b25: + aes32esmi x26, x25, x19, 0 # perform operation +800004bc: 273c8d33 aes32esmi x26,x25,x19,0x0 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cp_rs1_b25, Zkne_aes32esmi_cg_cp_rs1_b25_str) +800004c0: 0001a203 lw x4,0(x3) +800004c4: 01a20863 beq x4,x26,800004d4 +800004c8: 4f9072ef jal x5,800081c0 +800004cc: 800004bc .word 0x800004bc +800004d0: 8000dd75 .word 0x8000dd75 +800004d4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xe660c3d5 +800004d8: 00032d03 lw x26,0(x6) +800004dc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x3d99414c +800004e0: 00032d83 lw x27,0(x6) +800004e4: 00430313 addi x6,x6,4 + +800004e8 : +Zkne_aes32esmi_cg_cp_rs1_b26: + aes32esmi x9, x26, x27, 1 # perform operation +800004e8: 67bd04b3 aes32esmi x9,x26,x27,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zkne_aes32esmi_cg_cp_rs1_b26, Zkne_aes32esmi_cg_cp_rs1_b26_str) +800004ec: 0001a203 lw x4,0(x3) +800004f0: 00920863 beq x4,x9,80000500 +800004f4: 4cd072ef jal x5,800081c0 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 8000ddad .word 0x8000ddad +80000500: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xa332ffbb +80000504: 00032d83 lw x27,0(x6) +80000508: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x02b27973 +8000050c: 00032e83 lw x29,0(x6) +80000510: 00430313 addi x6,x6,4 + +80000514 : +Zkne_aes32esmi_cg_cp_rs1_b27: + aes32esmi x25, x27, x29, 3 # perform operation +80000514: e7dd8cb3 aes32esmi x25,x27,x29,0x3 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cp_rs1_b27, Zkne_aes32esmi_cg_cp_rs1_b27_str) +80000518: 0001a203 lw x4,0(x3) +8000051c: 01920863 beq x4,x25,8000052c +80000520: 4a1072ef jal x5,800081c0 +80000524: 80000514 .word 0x80000514 +80000528: 8000dde5 .word 0x8000dde5 +8000052c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x91686db8 +80000530: 00032e03 lw x28,0(x6) +80000534: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x188d7e75 +80000538: 00032d83 lw x27,0(x6) +8000053c: 00430313 addi x6,x6,4 + +80000540 : +Zkne_aes32esmi_cg_cp_rs1_b28: + aes32esmi x12, x28, x27, 2 # perform operation +80000540: a7be0633 aes32esmi x12,x28,x27,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cp_rs1_b28, Zkne_aes32esmi_cg_cp_rs1_b28_str) +80000544: 0001a203 lw x4,0(x3) +80000548: 00c20863 beq x4,x12,80000558 +8000054c: 475072ef jal x5,800081c0 +80000550: 80000540 .word 0x80000540 +80000554: 8000de1d .word 0x8000de1d +80000558: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xa67279b6 +8000055c: 00032e83 lw x29,0(x6) +80000560: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xfbf74b2d +80000564: 00032903 lw x18,0(x6) +80000568: 00430313 addi x6,x6,4 + +8000056c : +Zkne_aes32esmi_cg_cp_rs1_b29: + aes32esmi x23, x29, x18, 3 # perform operation +8000056c: e72e8bb3 aes32esmi x23,x29,x18,0x3 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zkne_aes32esmi_cg_cp_rs1_b29, Zkne_aes32esmi_cg_cp_rs1_b29_str) +80000570: 0001a203 lw x4,0(x3) +80000574: 01720863 beq x4,x23,80000584 +80000578: 449072ef jal x5,800081c0 +8000057c: 8000056c .word 0x8000056c +80000580: 8000de55 .word 0x8000de55 +80000584: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0adf5d89 +80000588: 00032f03 lw x30,0(x6) +8000058c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x452eec52 +80000590: 00032603 lw x12,0(x6) +80000594: 00430313 addi x6,x6,4 + +80000598 : +Zkne_aes32esmi_cg_cp_rs1_b30: + aes32esmi x1, x30, x12, 0 # perform operation +80000598: 26cf00b3 aes32esmi x1,x30,x12,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cp_rs1_b30, Zkne_aes32esmi_cg_cp_rs1_b30_str) +8000059c: 0001a203 lw x4,0(x3) +800005a0: 00120863 beq x4,x1,800005b0 +800005a4: 41d072ef jal x5,800081c0 +800005a8: 80000598 .word 0x80000598 +800005ac: 8000de8d .word 0x8000de8d +800005b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x7c41ba5c +800005b4: 00032f83 lw x31,0(x6) +800005b8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x41afa16f +800005bc: 00032e03 lw x28,0(x6) +800005c0: 00430313 addi x6,x6,4 + +800005c4 : +Zkne_aes32esmi_cg_cp_rs1_b31: + aes32esmi x16, x31, x28, 1 # perform operation +800005c4: 67cf8833 aes32esmi x16,x31,x28,0x1 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cp_rs1_b31, Zkne_aes32esmi_cg_cp_rs1_b31_str) +800005c8: 0001a203 lw x4,0(x3) +800005cc: 01020863 beq x4,x16,800005dc +800005d0: 3f1072ef jal x5,800081c0 +800005d4: 800005c4 .word 0x800005c4 +800005d8: 8000dec5 .word 0x8000dec5 +800005dc: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xa558fd7d +800005e0: 00032083 lw x1,0(x6) +800005e4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x71d6f396 +800005e8: 00032003 lw x0,0(x6) +800005ec: 00430313 addi x6,x6,4 + +800005f0 : +Zkne_aes32esmi_cg_cp_rs2_b0: + aes32esmi x31, x1, x0, 2 # perform operation +800005f0: a6008fb3 aes32esmi x31,x1,x0,0x2 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cp_rs2_b0, Zkne_aes32esmi_cg_cp_rs2_b0_str) +800005f4: 0001a203 lw x4,0(x3) +800005f8: 01f20863 beq x4,x31,80000608 +800005fc: 3c5072ef jal x5,800081c0 +80000600: 800005f0 .word 0x800005f0 +80000604: 8000defd .word 0x8000defd +80000608: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xbfe772b6 +8000060c: 00032903 lw x18,0(x6) +80000610: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x567234aa +80000614: 00032083 lw x1,0(x6) +80000618: 00430313 addi x6,x6,4 + +8000061c : +Zkne_aes32esmi_cg_cp_rs2_b1: + aes32esmi x28, x18, x1, 3 # perform operation +8000061c: e6190e33 aes32esmi x28,x18,x1,0x3 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cp_rs2_b1, Zkne_aes32esmi_cg_cp_rs2_b1_str) +80000620: 0001a203 lw x4,0(x3) +80000624: 01c20863 beq x4,x28,80000634 +80000628: 399072ef jal x5,800081c0 +8000062c: 8000061c .word 0x8000061c +80000630: 8000df34 .word 0x8000df34 +80000634: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x5f9a4114 +80000638: 00032003 lw x0,0(x6) +8000063c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xdd37d9db +80000640: 00032103 lw x2,0(x6) +80000644: 00430313 addi x6,x6,4 + +80000648 : +Zkne_aes32esmi_cg_cp_rs2_b2: + aes32esmi x23, x0, x2, 0 # perform operation +80000648: 26200bb3 aes32esmi x23,x0,x2,0x0 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zkne_aes32esmi_cg_cp_rs2_b2, Zkne_aes32esmi_cg_cp_rs2_b2_str) +8000064c: 0001a203 lw x4,0(x3) +80000650: 01720863 beq x4,x23,80000660 +80000654: 36d072ef jal x5,800081c0 +80000658: 80000648 .word 0x80000648 +8000065c: 8000df6b .word 0x8000df6b +80000660: 00418193 addi x3,x3,4 + + mv x18, x3 # switch signature pointer register to avoid conflict with test +80000664: 00018913 addi x18,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x9d64eb65 +80000668: 00032f83 lw x31,0(x6) +8000066c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x30350d7f +80000670: 00032183 lw x3,0(x6) +80000674: 00430313 addi x6,x6,4 + +80000678 : +Zkne_aes32esmi_cg_cp_rs2_b3: + aes32esmi x11, x31, x3, 1 # perform operation +80000678: 663f85b3 aes32esmi x11,x31,x3,0x1 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zkne_aes32esmi_cg_cp_rs2_b3, Zkne_aes32esmi_cg_cp_rs2_b3_str) +8000067c: 00092203 lw x4,0(x18) +80000680: 00b20863 beq x4,x11,80000690 +80000684: 33d072ef jal x5,800081c0 +80000688: 80000678 .word 0x80000678 +8000068c: 8000dfa2 .word 0x8000dfa2 +80000690: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000694: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000698: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xf28c2954 +8000069c: 00032b03 lw x22,0(x6) +800006a0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x7e558b37 +800006a4: 00032203 lw x4,0(x6) +800006a8: 00430313 addi x6,x6,4 + +800006ac : +Zkne_aes32esmi_cg_cp_rs2_b4: + aes32esmi x31, x22, x4, 0 # perform operation +800006ac: 264b0fb3 aes32esmi x31,x22,x4,0x0 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zkne_aes32esmi_cg_cp_rs2_b4, Zkne_aes32esmi_cg_cp_rs2_b4_str) +800006b0: 00092383 lw x7,0(x18) +800006b4: 01f38863 beq x7,x31,800006c4 +800006b8: 3210746f jal x8,800081d8 +800006bc: 800006ac .word 0x800006ac +800006c0: 8000dfd9 .word 0x8000dfd9 +800006c4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xcb14c376 +800006c8: 00032483 lw x9,0(x6) +800006cc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x4f0a4a3c +800006d0: 00032283 lw x5,0(x6) +800006d4: 00430313 addi x6,x6,4 + +800006d8 : +Zkne_aes32esmi_cg_cp_rs2_b5: + aes32esmi x2, x9, x5, 3 # perform operation +800006d8: e6548133 aes32esmi x2,x9,x5,0x3 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zkne_aes32esmi_cg_cp_rs2_b5, Zkne_aes32esmi_cg_cp_rs2_b5_str) +800006dc: 00092383 lw x7,0(x18) +800006e0: 00238863 beq x7,x2,800006f0 +800006e4: 2f50746f jal x8,800081d8 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000e010 .word 0x8000e010 +800006f0: 00490913 addi x18,x18,4 + + mv x22, x6 # switch data pointer register to avoid conflict with test +800006f4: 00030b13 addi x22,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0xae0dd686 +800006f8: 000b2283 lw x5,0(x22) +800006fc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x5539b9d1 +80000700: 000b2303 lw x6,0(x22) +80000704: 004b0b13 addi x22,x22,4 + +80000708 : +Zkne_aes32esmi_cg_cp_rs2_b6: + aes32esmi x3, x5, x6, 3 # perform operation +80000708: e66281b3 aes32esmi x3,x5,x6,0x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zkne_aes32esmi_cg_cp_rs2_b6, Zkne_aes32esmi_cg_cp_rs2_b6_str) +8000070c: 00092383 lw x7,0(x18) +80000710: 00338863 beq x7,x3,80000720 +80000714: 2c50746f jal x8,800081d8 +80000718: 80000708 .word 0x80000708 +8000071c: 8000e047 .word 0x8000e047 +80000720: 00490913 addi x18,x18,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000724: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000728: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x4e07bdb3 +8000072c: 000b2f83 lw x31,0(x22) +80000730: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x240c8c2b +80000734: 000b2383 lw x7,0(x22) +80000738: 004b0b13 addi x22,x22,4 + +8000073c : +Zkne_aes32esmi_cg_cp_rs2_b7: + aes32esmi x20, x31, x7, 1 # perform operation +8000073c: 667f8a33 aes32esmi x20,x31,x7,0x1 + # Check if x20 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x20, Zkne_aes32esmi_cg_cp_rs2_b7, Zkne_aes32esmi_cg_cp_rs2_b7_str) +80000740: 00092683 lw x13,0(x18) +80000744: 01468863 beq x13,x20,80000754 +80000748: 2b90776f jal x14,80008200 +8000074c: 8000073c .word 0x8000073c +80000750: 8000e07e .word 0x8000e07e +80000754: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0xafe52931 +80000758: 000b2003 lw x0,0(x22) +8000075c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xe1d357b4 +80000760: 000b2403 lw x8,0(x22) +80000764: 004b0b13 addi x22,x22,4 + +80000768 : +Zkne_aes32esmi_cg_cp_rs2_b8: + aes32esmi x16, x0, x8, 0 # perform operation +80000768: 26800833 aes32esmi x16,x0,x8,0x0 + # Check if x16 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x16, Zkne_aes32esmi_cg_cp_rs2_b8, Zkne_aes32esmi_cg_cp_rs2_b8_str) +8000076c: 00092683 lw x13,0(x18) +80000770: 01068863 beq x13,x16,80000780 +80000774: 28d0776f jal x14,80008200 +80000778: 80000768 .word 0x80000768 +8000077c: 8000e0b5 .word 0x8000e0b5 +80000780: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x8c532820 +80000784: 000b2c03 lw x24,0(x22) +80000788: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x25628d0a +8000078c: 000b2483 lw x9,0(x22) +80000790: 004b0b13 addi x22,x22,4 + +80000794 : +Zkne_aes32esmi_cg_cp_rs2_b9: + aes32esmi x10, x24, x9, 0 # perform operation +80000794: 269c0533 aes32esmi x10,x24,x9,0x0 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zkne_aes32esmi_cg_cp_rs2_b9, Zkne_aes32esmi_cg_cp_rs2_b9_str) +80000798: 00092683 lw x13,0(x18) +8000079c: 00a68863 beq x13,x10,800007ac +800007a0: 2610776f jal x14,80008200 +800007a4: 80000794 .word 0x80000794 +800007a8: 8000e0ec .word 0x8000e0ec +800007ac: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x272346ab +800007b0: 000b2a83 lw x21,0(x22) +800007b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xfa9a185a +800007b8: 000b2503 lw x10,0(x22) +800007bc: 004b0b13 addi x22,x22,4 + +800007c0 : +Zkne_aes32esmi_cg_cp_rs2_b10: + aes32esmi x27, x21, x10, 3 # perform operation +800007c0: e6aa8db3 aes32esmi x27,x21,x10,0x3 + # Check if x27 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x27, Zkne_aes32esmi_cg_cp_rs2_b10, Zkne_aes32esmi_cg_cp_rs2_b10_str) +800007c4: 00092683 lw x13,0(x18) +800007c8: 01b68863 beq x13,x27,800007d8 +800007cc: 2350776f jal x14,80008200 +800007d0: 800007c0 .word 0x800007c0 +800007d4: 8000e123 .word 0x8000e123 +800007d8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xb5c925a8 +800007dc: 000b2783 lw x15,0(x22) +800007e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x4518b443 +800007e4: 000b2583 lw x11,0(x22) +800007e8: 004b0b13 addi x22,x22,4 + +800007ec : +Zkne_aes32esmi_cg_cp_rs2_b11: + aes32esmi x20, x15, x11, 0 # perform operation +800007ec: 26b78a33 aes32esmi x20,x15,x11,0x0 + # Check if x20 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x20, Zkne_aes32esmi_cg_cp_rs2_b11, Zkne_aes32esmi_cg_cp_rs2_b11_str) +800007f0: 00092683 lw x13,0(x18) +800007f4: 01468863 beq x13,x20,80000804 +800007f8: 2090776f jal x14,80008200 +800007fc: 800007ec .word 0x800007ec +80000800: 8000e15b .word 0x8000e15b +80000804: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x28b53948 +80000808: 000b2203 lw x4,0(x22) +8000080c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xe2fc69b7 +80000810: 000b2603 lw x12,0(x22) +80000814: 004b0b13 addi x22,x22,4 + +80000818 : +Zkne_aes32esmi_cg_cp_rs2_b12: + aes32esmi x21, x4, x12, 3 # perform operation +80000818: e6c20ab3 aes32esmi x21,x4,x12,0x3 + # Check if x21 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x21, Zkne_aes32esmi_cg_cp_rs2_b12, Zkne_aes32esmi_cg_cp_rs2_b12_str) +8000081c: 00092683 lw x13,0(x18) +80000820: 01568863 beq x13,x21,80000830 +80000824: 1dd0776f jal x14,80008200 +80000828: 80000818 .word 0x80000818 +8000082c: 8000e193 .word 0x8000e193 +80000830: 00490913 addi x18,x18,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000834: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000838: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x5637ddc5 +8000083c: 000b2503 lw x10,0(x22) +80000840: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xb7d454ca +80000844: 000b2683 lw x13,0(x22) +80000848: 004b0b13 addi x22,x22,4 + +8000084c : +Zkne_aes32esmi_cg_cp_rs2_b13: + aes32esmi x29, x10, x13, 0 # perform operation +8000084c: 26d50eb3 aes32esmi x29,x10,x13,0x0 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zkne_aes32esmi_cg_cp_rs2_b13, Zkne_aes32esmi_cg_cp_rs2_b13_str) +80000850: 00092383 lw x7,0(x18) +80000854: 01d38863 beq x7,x29,80000864 +80000858: 1810746f jal x8,800081d8 +8000085c: 8000084c .word 0x8000084c +80000860: 8000e1cb .word 0x8000e1cb +80000864: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x1fb92624 +80000868: 000b2503 lw x10,0(x22) +8000086c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x516f20fe +80000870: 000b2703 lw x14,0(x22) +80000874: 004b0b13 addi x22,x22,4 + +80000878 : +Zkne_aes32esmi_cg_cp_rs2_b14: + aes32esmi x27, x10, x14, 3 # perform operation +80000878: e6e50db3 aes32esmi x27,x10,x14,0x3 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zkne_aes32esmi_cg_cp_rs2_b14, Zkne_aes32esmi_cg_cp_rs2_b14_str) +8000087c: 00092383 lw x7,0(x18) +80000880: 01b38863 beq x7,x27,80000890 +80000884: 1550746f jal x8,800081d8 +80000888: 80000878 .word 0x80000878 +8000088c: 8000e203 .word 0x8000e203 +80000890: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x4e75b21c +80000894: 000b2203 lw x4,0(x22) +80000898: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0xd650ca59 +8000089c: 000b2783 lw x15,0(x22) +800008a0: 004b0b13 addi x22,x22,4 + +800008a4 : +Zkne_aes32esmi_cg_cp_rs2_b15: + aes32esmi x25, x4, x15, 1 # perform operation +800008a4: 66f20cb3 aes32esmi x25,x4,x15,0x1 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zkne_aes32esmi_cg_cp_rs2_b15, Zkne_aes32esmi_cg_cp_rs2_b15_str) +800008a8: 00092383 lw x7,0(x18) +800008ac: 01938863 beq x7,x25,800008bc +800008b0: 1290746f jal x8,800081d8 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 8000e23b .word 0x8000e23b +800008bc: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xa3073df1 +800008c0: 000b2783 lw x15,0(x22) +800008c4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xa5e4181c +800008c8: 000b2803 lw x16,0(x22) +800008cc: 004b0b13 addi x22,x22,4 + +800008d0 : +Zkne_aes32esmi_cg_cp_rs2_b16: + aes32esmi x1, x15, x16, 1 # perform operation +800008d0: 670780b3 aes32esmi x1,x15,x16,0x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zkne_aes32esmi_cg_cp_rs2_b16, Zkne_aes32esmi_cg_cp_rs2_b16_str) +800008d4: 00092383 lw x7,0(x18) +800008d8: 00138863 beq x7,x1,800008e8 +800008dc: 0fd0746f jal x8,800081d8 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 8000e273 .word 0x8000e273 +800008e8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x7e6a7ac2 +800008ec: 000b2f83 lw x31,0(x22) +800008f0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x6059d335 +800008f4: 000b2883 lw x17,0(x22) +800008f8: 004b0b13 addi x22,x22,4 + +800008fc : +Zkne_aes32esmi_cg_cp_rs2_b17: + aes32esmi x5, x31, x17, 0 # perform operation +800008fc: 271f82b3 aes32esmi x5,x31,x17,0x0 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zkne_aes32esmi_cg_cp_rs2_b17, Zkne_aes32esmi_cg_cp_rs2_b17_str) +80000900: 00092383 lw x7,0(x18) +80000904: 00538863 beq x7,x5,80000914 +80000908: 0d10746f jal x8,800081d8 +8000090c: 800008fc .word 0x800008fc +80000910: 8000e2ab .word 0x8000e2ab +80000914: 00490913 addi x18,x18,4 + + mv x10, x18 # switch signature pointer register to avoid conflict with test +80000918: 00090513 addi x10,x18,0 +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x688fcbd6 +8000091c: 000b2483 lw x9,0(x22) +80000920: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xa219f9fd +80000924: 000b2903 lw x18,0(x22) +80000928: 004b0b13 addi x22,x22,4 + +8000092c : +Zkne_aes32esmi_cg_cp_rs2_b18: + aes32esmi x28, x9, x18, 0 # perform operation +8000092c: 27248e33 aes32esmi x28,x9,x18,0x0 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zkne_aes32esmi_cg_cp_rs2_b18, Zkne_aes32esmi_cg_cp_rs2_b18_str) +80000930: 00052383 lw x7,0(x10) +80000934: 01c38863 beq x7,x28,80000944 +80000938: 0a10746f jal x8,800081d8 +8000093c: 8000092c .word 0x8000092c +80000940: 8000e2e3 .word 0x8000e2e3 +80000944: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x99e9c3c8 +80000948: 000b2783 lw x15,0(x22) +8000094c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xbee4e5c3 +80000950: 000b2983 lw x19,0(x22) +80000954: 004b0b13 addi x22,x22,4 + +80000958 : +Zkne_aes32esmi_cg_cp_rs2_b19: + aes32esmi x12, x15, x19, 1 # perform operation +80000958: 67378633 aes32esmi x12,x15,x19,0x1 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zkne_aes32esmi_cg_cp_rs2_b19, Zkne_aes32esmi_cg_cp_rs2_b19_str) +8000095c: 00052383 lw x7,0(x10) +80000960: 00c38863 beq x7,x12,80000970 +80000964: 0750746f jal x8,800081d8 +80000968: 80000958 .word 0x80000958 +8000096c: 8000e31b .word 0x8000e31b +80000970: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x318dc2d8 +80000974: 000b2703 lw x14,0(x22) +80000978: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x45ffaca4 +8000097c: 000b2a03 lw x20,0(x22) +80000980: 004b0b13 addi x22,x22,4 + +80000984 : +Zkne_aes32esmi_cg_cp_rs2_b20: + aes32esmi x13, x14, x20, 0 # perform operation +80000984: 274706b3 aes32esmi x13,x14,x20,0x0 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zkne_aes32esmi_cg_cp_rs2_b20, Zkne_aes32esmi_cg_cp_rs2_b20_str) +80000988: 00052383 lw x7,0(x10) +8000098c: 00d38863 beq x7,x13,8000099c +80000990: 0490746f jal x8,800081d8 +80000994: 80000984 .word 0x80000984 +80000998: 8000e353 .word 0x8000e353 +8000099c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x8625f8fc +800009a0: 000b2803 lw x16,0(x22) +800009a4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x7d07d39c +800009a8: 000b2a83 lw x21,0(x22) +800009ac: 004b0b13 addi x22,x22,4 + +800009b0 : +Zkne_aes32esmi_cg_cp_rs2_b21: + aes32esmi x15, x16, x21, 3 # perform operation +800009b0: e75807b3 aes32esmi x15,x16,x21,0x3 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zkne_aes32esmi_cg_cp_rs2_b21, Zkne_aes32esmi_cg_cp_rs2_b21_str) +800009b4: 00052383 lw x7,0(x10) +800009b8: 00f38863 beq x7,x15,800009c8 +800009bc: 01d0746f jal x8,800081d8 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 8000e38b .word 0x8000e38b +800009c8: 00450513 addi x10,x10,4 + + mv x24, x22 # switch data pointer register to avoid conflict with test +800009cc: 000b0c13 addi x24,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xf970143d +800009d0: 000c2883 lw x17,0(x24) +800009d4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xbd58e48c +800009d8: 000c2b03 lw x22,0(x24) +800009dc: 004c0c13 addi x24,x24,4 + +800009e0 : +Zkne_aes32esmi_cg_cp_rs2_b22: + aes32esmi x26, x17, x22, 1 # perform operation +800009e0: 67688d33 aes32esmi x26,x17,x22,0x1 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zkne_aes32esmi_cg_cp_rs2_b22, Zkne_aes32esmi_cg_cp_rs2_b22_str) +800009e4: 00052383 lw x7,0(x10) +800009e8: 01a38863 beq x7,x26,800009f8 +800009ec: 7ec0746f jal x8,800081d8 +800009f0: 800009e0 .word 0x800009e0 +800009f4: 8000e3c3 .word 0x8000e3c3 +800009f8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x5db8c3f3 +800009fc: 000c2b03 lw x22,0(x24) +80000a00: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x461cfd51 +80000a04: 000c2b83 lw x23,0(x24) +80000a08: 004c0c13 addi x24,x24,4 + +80000a0c : +Zkne_aes32esmi_cg_cp_rs2_b23: + aes32esmi x29, x22, x23, 1 # perform operation +80000a0c: 677b0eb3 aes32esmi x29,x22,x23,0x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zkne_aes32esmi_cg_cp_rs2_b23, Zkne_aes32esmi_cg_cp_rs2_b23_str) +80000a10: 00052383 lw x7,0(x10) +80000a14: 01d38863 beq x7,x29,80000a24 +80000a18: 7c00746f jal x8,800081d8 +80000a1c: 80000a0c .word 0x80000a0c +80000a20: 8000e3fb .word 0x8000e3fb +80000a24: 00450513 addi x10,x10,4 + + mv x31, x24 # switch data pointer register to avoid conflict with test +80000a28: 000c0f93 addi x31,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xaf387399 +80000a2c: 000fa883 lw x17,0(x31) +80000a30: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0xe086269a +80000a34: 000fac03 lw x24,0(x31) +80000a38: 004f8f93 addi x31,x31,4 + +80000a3c : +Zkne_aes32esmi_cg_cp_rs2_b24: + aes32esmi x15, x17, x24, 2 # perform operation +80000a3c: a78887b3 aes32esmi x15,x17,x24,0x2 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zkne_aes32esmi_cg_cp_rs2_b24, Zkne_aes32esmi_cg_cp_rs2_b24_str) +80000a40: 00052383 lw x7,0(x10) +80000a44: 00f38863 beq x7,x15,80000a54 +80000a48: 7900746f jal x8,800081d8 +80000a4c: 80000a3c .word 0x80000a3c +80000a50: 8000e433 .word 0x8000e433 +80000a54: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xf0db3bad +80000a58: 000fa683 lw x13,0(x31) +80000a5c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xeb43c850 +80000a60: 000fac83 lw x25,0(x31) +80000a64: 004f8f93 addi x31,x31,4 + +80000a68 : +Zkne_aes32esmi_cg_cp_rs2_b25: + aes32esmi x3, x13, x25, 3 # perform operation +80000a68: e79681b3 aes32esmi x3,x13,x25,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zkne_aes32esmi_cg_cp_rs2_b25, Zkne_aes32esmi_cg_cp_rs2_b25_str) +80000a6c: 00052383 lw x7,0(x10) +80000a70: 00338863 beq x7,x3,80000a80 +80000a74: 7640746f jal x8,800081d8 +80000a78: 80000a68 .word 0x80000a68 +80000a7c: 8000e46b .word 0x8000e46b +80000a80: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x9b4d0467 +80000a84: 000fa083 lw x1,0(x31) +80000a88: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xc4d78782 +80000a8c: 000fad03 lw x26,0(x31) +80000a90: 004f8f93 addi x31,x31,4 + +80000a94 : +Zkne_aes32esmi_cg_cp_rs2_b26: + aes32esmi x14, x1, x26, 0 # perform operation +80000a94: 27a08733 aes32esmi x14,x1,x26,0x0 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zkne_aes32esmi_cg_cp_rs2_b26, Zkne_aes32esmi_cg_cp_rs2_b26_str) +80000a98: 00052383 lw x7,0(x10) +80000a9c: 00e38863 beq x7,x14,80000aac +80000aa0: 7380746f jal x8,800081d8 +80000aa4: 80000a94 .word 0x80000a94 +80000aa8: 8000e4a3 .word 0x8000e4a3 +80000aac: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0xad505324 +80000ab0: 000fa583 lw x11,0(x31) +80000ab4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x12ec08bf +80000ab8: 000fad83 lw x27,0(x31) +80000abc: 004f8f93 addi x31,x31,4 + +80000ac0 : +Zkne_aes32esmi_cg_cp_rs2_b27: + aes32esmi x1, x11, x27, 0 # perform operation +80000ac0: 27b580b3 aes32esmi x1,x11,x27,0x0 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zkne_aes32esmi_cg_cp_rs2_b27, Zkne_aes32esmi_cg_cp_rs2_b27_str) +80000ac4: 00052383 lw x7,0(x10) +80000ac8: 00138863 beq x7,x1,80000ad8 +80000acc: 70c0746f jal x8,800081d8 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 8000e4db .word 0x8000e4db +80000ad8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x982d2d1a +80000adc: 000fad83 lw x27,0(x31) +80000ae0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0xe72f9309 +80000ae4: 000fae03 lw x28,0(x31) +80000ae8: 004f8f93 addi x31,x31,4 + +80000aec : +Zkne_aes32esmi_cg_cp_rs2_b28: + aes32esmi x4, x27, x28, 1 # perform operation +80000aec: 67cd8233 aes32esmi x4,x27,x28,0x1 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zkne_aes32esmi_cg_cp_rs2_b28, Zkne_aes32esmi_cg_cp_rs2_b28_str) +80000af0: 00052383 lw x7,0(x10) +80000af4: 00438863 beq x7,x4,80000b04 +80000af8: 6e00746f jal x8,800081d8 +80000afc: 80000aec .word 0x80000aec +80000b00: 8000e513 .word 0x8000e513 +80000b04: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xf4d66d98 +80000b08: 000fac83 lw x25,0(x31) +80000b0c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x1c2118eb +80000b10: 000fae83 lw x29,0(x31) +80000b14: 004f8f93 addi x31,x31,4 + +80000b18 : +Zkne_aes32esmi_cg_cp_rs2_b29: + aes32esmi x19, x25, x29, 2 # perform operation +80000b18: a7dc89b3 aes32esmi x19,x25,x29,0x2 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zkne_aes32esmi_cg_cp_rs2_b29, Zkne_aes32esmi_cg_cp_rs2_b29_str) +80000b1c: 00052383 lw x7,0(x10) +80000b20: 01338863 beq x7,x19,80000b30 +80000b24: 6b40746f jal x8,800081d8 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 8000e54b .word 0x8000e54b +80000b30: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xedf26390 +80000b34: 000fa983 lw x19,0(x31) +80000b38: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x292b60d6 +80000b3c: 000faf03 lw x30,0(x31) +80000b40: 004f8f93 addi x31,x31,4 + +80000b44 : +Zkne_aes32esmi_cg_cp_rs2_b30: + aes32esmi x16, x19, x30, 1 # perform operation +80000b44: 67e98833 aes32esmi x16,x19,x30,0x1 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zkne_aes32esmi_cg_cp_rs2_b30, Zkne_aes32esmi_cg_cp_rs2_b30_str) +80000b48: 00052383 lw x7,0(x10) +80000b4c: 01038863 beq x7,x16,80000b5c +80000b50: 6880746f jal x8,800081d8 +80000b54: 80000b44 .word 0x80000b44 +80000b58: 8000e583 .word 0x8000e583 +80000b5c: 00450513 addi x10,x10,4 + + mv x3, x31 # switch data pointer register to avoid conflict with test +80000b60: 000f8193 addi x3,x31,0 +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xdec99a44 +80000b64: 0001a883 lw x17,0(x3) +80000b68: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xc41a42e1 +80000b6c: 0001af83 lw x31,0(x3) +80000b70: 00418193 addi x3,x3,4 + +80000b74 : +Zkne_aes32esmi_cg_cp_rs2_b31: + aes32esmi x18, x17, x31, 3 # perform operation +80000b74: e7f88933 aes32esmi x18,x17,x31,0x3 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zkne_aes32esmi_cg_cp_rs2_b31, Zkne_aes32esmi_cg_cp_rs2_b31_str) +80000b78: 00052383 lw x7,0(x10) +80000b7c: 01238863 beq x7,x18,80000b8c +80000b80: 6580746f jal x8,800081d8 +80000b84: 80000b74 .word 0x80000b74 +80000b88: 8000e5bb .word 0x8000e5bb +80000b8c: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xdedf9810 +80000b90: 0001af83 lw x31,0(x3) +80000b94: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x8584efb7 +80000b98: 0001a903 lw x18,0(x3) +80000b9c: 00418193 addi x3,x3,4 + +80000ba0 : +Zkne_aes32esmi_cg_cp_rd_b0: + aes32esmi x0, x31, x18, 2 # perform operation +80000ba0: a72f8033 aes32esmi x0,x31,x18,0x2 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zkne_aes32esmi_cg_cp_rd_b0, Zkne_aes32esmi_cg_cp_rd_b0_str) +80000ba4: 00052383 lw x7,0(x10) +80000ba8: 00038863 beq x7,x0,80000bb8 +80000bac: 62c0746f jal x8,800081d8 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 8000e5f3 .word 0x8000e5f3 +80000bb8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x3e684893 +80000bbc: 0001af03 lw x30,0(x3) +80000bc0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x9a46c043 +80000bc4: 0001ab03 lw x22,0(x3) +80000bc8: 00418193 addi x3,x3,4 + +80000bcc : +Zkne_aes32esmi_cg_cp_rd_b1: + aes32esmi x1, x30, x22, 1 # perform operation +80000bcc: 676f00b3 aes32esmi x1,x30,x22,0x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zkne_aes32esmi_cg_cp_rd_b1, Zkne_aes32esmi_cg_cp_rd_b1_str) +80000bd0: 00052383 lw x7,0(x10) +80000bd4: 00138863 beq x7,x1,80000be4 +80000bd8: 6000746f jal x8,800081d8 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 8000e629 .word 0x8000e629 +80000be4: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xd748130b +80000be8: 0001a983 lw x19,0(x3) +80000bec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x13d327bb +80000bf0: 0001ab03 lw x22,0(x3) +80000bf4: 00418193 addi x3,x3,4 + +80000bf8 : +Zkne_aes32esmi_cg_cp_rd_b2: + aes32esmi x2, x19, x22, 2 # perform operation +80000bf8: a7698133 aes32esmi x2,x19,x22,0x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zkne_aes32esmi_cg_cp_rd_b2, Zkne_aes32esmi_cg_cp_rd_b2_str) +80000bfc: 00052383 lw x7,0(x10) +80000c00: 00238863 beq x7,x2,80000c10 +80000c04: 5d40746f jal x8,800081d8 +80000c08: 80000bf8 .word 0x80000bf8 +80000c0c: 8000e65f .word 0x8000e65f +80000c10: 00450513 addi x10,x10,4 + + mv x22, x3 # switch data pointer register to avoid conflict with test +80000c14: 00018b13 addi x22,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x4964a01e +80000c18: 000b2883 lw x17,0(x22) +80000c1c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xa16ee79d +80000c20: 000b2583 lw x11,0(x22) +80000c24: 004b0b13 addi x22,x22,4 + +80000c28 : +Zkne_aes32esmi_cg_cp_rd_b3: + aes32esmi x3, x17, x11, 0 # perform operation +80000c28: 26b881b3 aes32esmi x3,x17,x11,0x0 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zkne_aes32esmi_cg_cp_rd_b3, Zkne_aes32esmi_cg_cp_rd_b3_str) +80000c2c: 00052383 lw x7,0(x10) +80000c30: 00338863 beq x7,x3,80000c40 +80000c34: 5a40746f jal x8,800081d8 +80000c38: 80000c28 .word 0x80000c28 +80000c3c: 8000e695 .word 0x8000e695 +80000c40: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x0b5f6be2 +80000c44: 000b2903 lw x18,0(x22) +80000c48: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xba43ffdc +80000c4c: 000b2603 lw x12,0(x22) +80000c50: 004b0b13 addi x22,x22,4 + +80000c54 : +Zkne_aes32esmi_cg_cp_rd_b4: + aes32esmi x4, x18, x12, 3 # perform operation +80000c54: e6c90233 aes32esmi x4,x18,x12,0x3 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zkne_aes32esmi_cg_cp_rd_b4, Zkne_aes32esmi_cg_cp_rd_b4_str) +80000c58: 00052383 lw x7,0(x10) +80000c5c: 00438863 beq x7,x4,80000c6c +80000c60: 5780746f jal x8,800081d8 +80000c64: 80000c54 .word 0x80000c54 +80000c68: 8000e6cb .word 0x8000e6cb +80000c6c: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x25a7fcd3 +80000c70: 000b2983 lw x19,0(x22) +80000c74: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xe552dca4 +80000c78: 000b2183 lw x3,0(x22) +80000c7c: 004b0b13 addi x22,x22,4 + +80000c80 : +Zkne_aes32esmi_cg_cp_rd_b5: + aes32esmi x5, x19, x3, 1 # perform operation +80000c80: 663982b3 aes32esmi x5,x19,x3,0x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zkne_aes32esmi_cg_cp_rd_b5, Zkne_aes32esmi_cg_cp_rd_b5_str) +80000c84: 00052383 lw x7,0(x10) +80000c88: 00538863 beq x7,x5,80000c98 +80000c8c: 54c0746f jal x8,800081d8 +80000c90: 80000c80 .word 0x80000c80 +80000c94: 8000e701 .word 0x8000e701 +80000c98: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x3abadde6 +80000c9c: 000b2d03 lw x26,0(x22) +80000ca0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x561dc795 +80000ca4: 000b2583 lw x11,0(x22) +80000ca8: 004b0b13 addi x22,x22,4 + +80000cac : +Zkne_aes32esmi_cg_cp_rd_b6: + aes32esmi x6, x26, x11, 2 # perform operation +80000cac: a6bd0333 aes32esmi x6,x26,x11,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zkne_aes32esmi_cg_cp_rd_b6, Zkne_aes32esmi_cg_cp_rd_b6_str) +80000cb0: 00052383 lw x7,0(x10) +80000cb4: 00638863 beq x7,x6,80000cc4 +80000cb8: 5200746f jal x8,800081d8 +80000cbc: 80000cac .word 0x80000cac +80000cc0: 8000e737 .word 0x8000e737 +80000cc4: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000cc8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000ccc: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x7addf93a +80000cd0: 000b2603 lw x12,0(x22) +80000cd4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x5edc573d +80000cd8: 000b2d83 lw x27,0(x22) +80000cdc: 004b0b13 addi x22,x22,4 + +80000ce0 : +Zkne_aes32esmi_cg_cp_rd_b7: + aes32esmi x7, x12, x27, 0 # perform operation +80000ce0: 27b603b3 aes32esmi x7,x12,x27,0x0 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zkne_aes32esmi_cg_cp_rd_b7, Zkne_aes32esmi_cg_cp_rd_b7_str) +80000ce4: 00052203 lw x4,0(x10) +80000ce8: 00720863 beq x4,x7,80000cf8 +80000cec: 4d4072ef jal x5,800081c0 +80000cf0: 80000ce0 .word 0x80000ce0 +80000cf4: 8000e76d .word 0x8000e76d +80000cf8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x2ca200ea +80000cfc: 000b2483 lw x9,0(x22) +80000d00: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0x0f512152 +80000d04: 000b2f83 lw x31,0(x22) +80000d08: 004b0b13 addi x22,x22,4 + +80000d0c : +Zkne_aes32esmi_cg_cp_rd_b8: + aes32esmi x8, x9, x31, 3 # perform operation +80000d0c: e7f48433 aes32esmi x8,x9,x31,0x3 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zkne_aes32esmi_cg_cp_rd_b8, Zkne_aes32esmi_cg_cp_rd_b8_str) +80000d10: 00052203 lw x4,0(x10) +80000d14: 00820863 beq x4,x8,80000d24 +80000d18: 4a8072ef jal x5,800081c0 +80000d1c: 80000d0c .word 0x80000d0c +80000d20: 8000e7a3 .word 0x8000e7a3 +80000d24: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x741dd90d +80000d28: 000b2303 lw x6,0(x22) +80000d2c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x922864a5 +80000d30: 000b2003 lw x0,0(x22) +80000d34: 004b0b13 addi x22,x22,4 + +80000d38 : +Zkne_aes32esmi_cg_cp_rd_b9: + aes32esmi x9, x6, x0, 2 # perform operation +80000d38: a60304b3 aes32esmi x9,x6,x0,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zkne_aes32esmi_cg_cp_rd_b9, Zkne_aes32esmi_cg_cp_rd_b9_str) +80000d3c: 00052203 lw x4,0(x10) +80000d40: 00920863 beq x4,x9,80000d50 +80000d44: 47c072ef jal x5,800081c0 +80000d48: 80000d38 .word 0x80000d38 +80000d4c: 8000e7d9 .word 0x8000e7d9 +80000d50: 00450513 addi x10,x10,4 + + mv x3, x10 # switch signature pointer register to avoid conflict with test +80000d54: 00050193 addi x3,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xa765e1e6 +80000d58: 000b2403 lw x8,0(x22) +80000d5c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x59681d2b +80000d60: 000b2603 lw x12,0(x22) +80000d64: 004b0b13 addi x22,x22,4 + +80000d68 : +Zkne_aes32esmi_cg_cp_rd_b10: + aes32esmi x10, x8, x12, 1 # perform operation +80000d68: 66c40533 aes32esmi x10,x8,x12,0x1 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zkne_aes32esmi_cg_cp_rd_b10, Zkne_aes32esmi_cg_cp_rd_b10_str) +80000d6c: 0001a203 lw x4,0(x3) +80000d70: 00a20863 beq x4,x10,80000d80 +80000d74: 44c072ef jal x5,800081c0 +80000d78: 80000d68 .word 0x80000d68 +80000d7c: 8000e80f .word 0x8000e80f +80000d80: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0xc9e086bb +80000d84: 000b2d83 lw x27,0(x22) +80000d88: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xf006a066 +80000d8c: 000b2983 lw x19,0(x22) +80000d90: 004b0b13 addi x22,x22,4 + +80000d94 : +Zkne_aes32esmi_cg_cp_rd_b11: + aes32esmi x11, x27, x19, 3 # perform operation +80000d94: e73d85b3 aes32esmi x11,x27,x19,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cp_rd_b11, Zkne_aes32esmi_cg_cp_rd_b11_str) +80000d98: 0001a203 lw x4,0(x3) +80000d9c: 00b20863 beq x4,x11,80000dac +80000da0: 420072ef jal x5,800081c0 +80000da4: 80000d94 .word 0x80000d94 +80000da8: 8000e846 .word 0x8000e846 +80000dac: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xae64f114 +80000db0: 000b2403 lw x8,0(x22) +80000db4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0xa1e19b5c +80000db8: 000b2483 lw x9,0(x22) +80000dbc: 004b0b13 addi x22,x22,4 + +80000dc0 : +Zkne_aes32esmi_cg_cp_rd_b12: + aes32esmi x12, x8, x9, 2 # perform operation +80000dc0: a6940633 aes32esmi x12,x8,x9,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cp_rd_b12, Zkne_aes32esmi_cg_cp_rd_b12_str) +80000dc4: 0001a203 lw x4,0(x3) +80000dc8: 00c20863 beq x4,x12,80000dd8 +80000dcc: 3f4072ef jal x5,800081c0 +80000dd0: 80000dc0 .word 0x80000dc0 +80000dd4: 8000e87d .word 0x8000e87d +80000dd8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x72e0355c +80000ddc: 000b2483 lw x9,0(x22) +80000de0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x7de1535d +80000de4: 000b2703 lw x14,0(x22) +80000de8: 004b0b13 addi x22,x22,4 + +80000dec : +Zkne_aes32esmi_cg_cp_rd_b13: + aes32esmi x13, x9, x14, 2 # perform operation +80000dec: a6e486b3 aes32esmi x13,x9,x14,0x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cp_rd_b13, Zkne_aes32esmi_cg_cp_rd_b13_str) +80000df0: 0001a203 lw x4,0(x3) +80000df4: 00d20863 beq x4,x13,80000e04 +80000df8: 3c8072ef jal x5,800081c0 +80000dfc: 80000dec .word 0x80000dec +80000e00: 8000e8b4 .word 0x8000e8b4 +80000e04: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xe3ad94d0 +80000e08: 000b2603 lw x12,0(x22) +80000e0c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xde503911 +80000e10: 000b2503 lw x10,0(x22) +80000e14: 004b0b13 addi x22,x22,4 + +80000e18 : +Zkne_aes32esmi_cg_cp_rd_b14: + aes32esmi x14, x12, x10, 1 # perform operation +80000e18: 66a60733 aes32esmi x14,x12,x10,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cp_rd_b14, Zkne_aes32esmi_cg_cp_rd_b14_str) +80000e1c: 0001a203 lw x4,0(x3) +80000e20: 00e20863 beq x4,x14,80000e30 +80000e24: 39c072ef jal x5,800081c0 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 8000e8eb .word 0x8000e8eb +80000e30: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x5deb5bee +80000e34: 000b2d03 lw x26,0(x22) +80000e38: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x201367e4 +80000e3c: 000b2903 lw x18,0(x22) +80000e40: 004b0b13 addi x22,x22,4 + +80000e44 : +Zkne_aes32esmi_cg_cp_rd_b15: + aes32esmi x15, x26, x18, 2 # perform operation +80000e44: a72d07b3 aes32esmi x15,x26,x18,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cp_rd_b15, Zkne_aes32esmi_cg_cp_rd_b15_str) +80000e48: 0001a203 lw x4,0(x3) +80000e4c: 00f20863 beq x4,x15,80000e5c +80000e50: 370072ef jal x5,800081c0 +80000e54: 80000e44 .word 0x80000e44 +80000e58: 8000e922 .word 0x8000e922 +80000e5c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0xcff29c66 +80000e60: 000b2e03 lw x28,0(x22) +80000e64: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x3de467d8 +80000e68: 000b2383 lw x7,0(x22) +80000e6c: 004b0b13 addi x22,x22,4 + +80000e70 : +Zkne_aes32esmi_cg_cp_rd_b16: + aes32esmi x16, x28, x7, 0 # perform operation +80000e70: 267e0833 aes32esmi x16,x28,x7,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cp_rd_b16, Zkne_aes32esmi_cg_cp_rd_b16_str) +80000e74: 0001a203 lw x4,0(x3) +80000e78: 01020863 beq x4,x16,80000e88 +80000e7c: 344072ef jal x5,800081c0 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 8000e959 .word 0x8000e959 +80000e88: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xf5cbfb6a +80000e8c: 000b2503 lw x10,0(x22) +80000e90: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0xc883284c +80000e94: 000b2003 lw x0,0(x22) +80000e98: 004b0b13 addi x22,x22,4 + +80000e9c : +Zkne_aes32esmi_cg_cp_rd_b17: + aes32esmi x17, x10, x0, 1 # perform operation +80000e9c: 660508b3 aes32esmi x17,x10,x0,0x1 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zkne_aes32esmi_cg_cp_rd_b17, Zkne_aes32esmi_cg_cp_rd_b17_str) +80000ea0: 0001a203 lw x4,0(x3) +80000ea4: 01120863 beq x4,x17,80000eb4 +80000ea8: 318072ef jal x5,800081c0 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 8000e990 .word 0x8000e990 +80000eb4: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x235b32b6 +80000eb8: 000b2883 lw x17,0(x22) +80000ebc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x2a6fa407 +80000ec0: 000b2383 lw x7,0(x22) +80000ec4: 004b0b13 addi x22,x22,4 + +80000ec8 : +Zkne_aes32esmi_cg_cp_rd_b18: + aes32esmi x18, x17, x7, 3 # perform operation +80000ec8: e6788933 aes32esmi x18,x17,x7,0x3 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cp_rd_b18, Zkne_aes32esmi_cg_cp_rd_b18_str) +80000ecc: 0001a203 lw x4,0(x3) +80000ed0: 01220863 beq x4,x18,80000ee0 +80000ed4: 2ec072ef jal x5,800081c0 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000e9c7 .word 0x8000e9c7 +80000ee0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x60446372 +80000ee4: 000b2e03 lw x28,0(x22) +80000ee8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x19ebcd6f +80000eec: 000b2383 lw x7,0(x22) +80000ef0: 004b0b13 addi x22,x22,4 + +80000ef4 : +Zkne_aes32esmi_cg_cp_rd_b19: + aes32esmi x19, x28, x7, 2 # perform operation +80000ef4: a67e09b3 aes32esmi x19,x28,x7,0x2 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zkne_aes32esmi_cg_cp_rd_b19, Zkne_aes32esmi_cg_cp_rd_b19_str) +80000ef8: 0001a203 lw x4,0(x3) +80000efc: 01320863 beq x4,x19,80000f0c +80000f00: 2c0072ef jal x5,800081c0 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000e9fe .word 0x8000e9fe +80000f0c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x60f385cc +80000f10: 000b2603 lw x12,0(x22) +80000f14: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0xc67bb67f +80000f18: 000b2383 lw x7,0(x22) +80000f1c: 004b0b13 addi x22,x22,4 + +80000f20 : +Zkne_aes32esmi_cg_cp_rd_b20: + aes32esmi x20, x12, x7, 3 # perform operation +80000f20: e6760a33 aes32esmi x20,x12,x7,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cp_rd_b20, Zkne_aes32esmi_cg_cp_rd_b20_str) +80000f24: 0001a203 lw x4,0(x3) +80000f28: 01420863 beq x4,x20,80000f38 +80000f2c: 294072ef jal x5,800081c0 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000ea35 .word 0x8000ea35 +80000f38: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x23d3c786 +80000f3c: 000b2303 lw x6,0(x22) +80000f40: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x10977218 +80000f44: 000b2883 lw x17,0(x22) +80000f48: 004b0b13 addi x22,x22,4 + +80000f4c : +Zkne_aes32esmi_cg_cp_rd_b21: + aes32esmi x21, x6, x17, 0 # perform operation +80000f4c: 27130ab3 aes32esmi x21,x6,x17,0x0 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cp_rd_b21, Zkne_aes32esmi_cg_cp_rd_b21_str) +80000f50: 0001a203 lw x4,0(x3) +80000f54: 01520863 beq x4,x21,80000f64 +80000f58: 268072ef jal x5,800081c0 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 8000ea6c .word 0x8000ea6c +80000f64: 00418193 addi x3,x3,4 + + mv x28, x22 # switch data pointer register to avoid conflict with test +80000f68: 000b0e13 addi x28,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0xc161edb6 +80000f6c: 000e2083 lw x1,0(x28) +80000f70: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs2: x7 = 0x39ec3b75 +80000f74: 000e2383 lw x7,0(x28) +80000f78: 004e0e13 addi x28,x28,4 + +80000f7c : +Zkne_aes32esmi_cg_cp_rd_b22: + aes32esmi x22, x1, x7, 2 # perform operation +80000f7c: a6708b33 aes32esmi x22,x1,x7,0x2 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zkne_aes32esmi_cg_cp_rd_b22, Zkne_aes32esmi_cg_cp_rd_b22_str) +80000f80: 0001a203 lw x4,0(x3) +80000f84: 01620863 beq x4,x22,80000f94 +80000f88: 238072ef jal x5,800081c0 +80000f8c: 80000f7c .word 0x80000f7c +80000f90: 8000eaa3 .word 0x8000eaa3 +80000f94: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xde84b5a4 +80000f98: 000e2603 lw x12,0(x28) +80000f9c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x6280748b +80000fa0: 000e2b03 lw x22,0(x28) +80000fa4: 004e0e13 addi x28,x28,4 + +80000fa8 : +Zkne_aes32esmi_cg_cp_rd_b23: + aes32esmi x23, x12, x22, 3 # perform operation +80000fa8: e7660bb3 aes32esmi x23,x12,x22,0x3 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zkne_aes32esmi_cg_cp_rd_b23, Zkne_aes32esmi_cg_cp_rd_b23_str) +80000fac: 0001a203 lw x4,0(x3) +80000fb0: 01720863 beq x4,x23,80000fc0 +80000fb4: 20c072ef jal x5,800081c0 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 8000eada .word 0x8000eada +80000fc0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x91eceb33 +80000fc4: 000e2603 lw x12,0(x28) +80000fc8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs2: x0 = 0xac13d556 +80000fcc: 000e2003 lw x0,0(x28) +80000fd0: 004e0e13 addi x28,x28,4 + +80000fd4 : +Zkne_aes32esmi_cg_cp_rd_b24: + aes32esmi x24, x12, x0, 0 # perform operation +80000fd4: 26060c33 aes32esmi x24,x12,x0,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cp_rd_b24, Zkne_aes32esmi_cg_cp_rd_b24_str) +80000fd8: 0001a203 lw x4,0(x3) +80000fdc: 01820863 beq x4,x24,80000fec +80000fe0: 1e0072ef jal x5,800081c0 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000eb11 .word 0x8000eb11 +80000fec: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0xdf13b703 +80000ff0: 000e2803 lw x16,0(x28) +80000ff4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0x063a8427 +80000ff8: 000e2483 lw x9,0(x28) +80000ffc: 004e0e13 addi x28,x28,4 + +80001000 : +Zkne_aes32esmi_cg_cp_rd_b25: + aes32esmi x25, x16, x9, 0 # perform operation +80001000: 26980cb3 aes32esmi x25,x16,x9,0x0 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cp_rd_b25, Zkne_aes32esmi_cg_cp_rd_b25_str) +80001004: 0001a203 lw x4,0(x3) +80001008: 01920863 beq x4,x25,80001018 +8000100c: 1b4072ef jal x5,800081c0 +80001010: 80001000 .word 0x80001000 +80001014: 8000eb48 .word 0x8000eb48 +80001018: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0xb46dde75 +8000101c: 000e2e83 lw x29,0(x28) +80001020: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x7fb4b214 +80001024: 000e2b83 lw x23,0(x28) +80001028: 004e0e13 addi x28,x28,4 + +8000102c : +Zkne_aes32esmi_cg_cp_rd_b26: + aes32esmi x26, x29, x23, 0 # perform operation +8000102c: 277e8d33 aes32esmi x26,x29,x23,0x0 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cp_rd_b26, Zkne_aes32esmi_cg_cp_rd_b26_str) +80001030: 0001a203 lw x4,0(x3) +80001034: 01a20863 beq x4,x26,80001044 +80001038: 188072ef jal x5,800081c0 +8000103c: 8000102c .word 0x8000102c +80001040: 8000eb7f .word 0x8000eb7f +80001044: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0x68cc645c +80001048: 000e2403 lw x8,0(x28) +8000104c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x446759c9 +80001050: 000e2703 lw x14,0(x28) +80001054: 004e0e13 addi x28,x28,4 + +80001058 : +Zkne_aes32esmi_cg_cp_rd_b27: + aes32esmi x27, x8, x14, 1 # perform operation +80001058: 66e40db3 aes32esmi x27,x8,x14,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cp_rd_b27, Zkne_aes32esmi_cg_cp_rd_b27_str) +8000105c: 0001a203 lw x4,0(x3) +80001060: 01b20863 beq x4,x27,80001070 +80001064: 15c072ef jal x5,800081c0 +80001068: 80001058 .word 0x80001058 +8000106c: 8000ebb6 .word 0x8000ebb6 +80001070: 00418193 addi x3,x3,4 + + mv x23, x28 # switch data pointer register to avoid conflict with test +80001074: 000e0b93 addi x23,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x03ff9669 +80001078: 000bae83 lw x29,0(x23) +8000107c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x83969741 +80001080: 000ba883 lw x17,0(x23) +80001084: 004b8b93 addi x23,x23,4 + +80001088 : +Zkne_aes32esmi_cg_cp_rd_b28: + aes32esmi x28, x29, x17, 3 # perform operation +80001088: e71e8e33 aes32esmi x28,x29,x17,0x3 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cp_rd_b28, Zkne_aes32esmi_cg_cp_rd_b28_str) +8000108c: 0001a203 lw x4,0(x3) +80001090: 01c20863 beq x4,x28,800010a0 +80001094: 12c072ef jal x5,800081c0 +80001098: 80001088 .word 0x80001088 +8000109c: 8000ebed .word 0x8000ebed +800010a0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x4ee3a08b +800010a4: 000ba303 lw x6,0(x23) +800010a8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x6747a624 +800010ac: 000ba483 lw x9,0(x23) +800010b0: 004b8b93 addi x23,x23,4 + +800010b4 : +Zkne_aes32esmi_cg_cp_rd_b29: + aes32esmi x29, x6, x9, 2 # perform operation +800010b4: a6930eb3 aes32esmi x29,x6,x9,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cp_rd_b29, Zkne_aes32esmi_cg_cp_rd_b29_str) +800010b8: 0001a203 lw x4,0(x3) +800010bc: 01d20863 beq x4,x29,800010cc +800010c0: 100072ef jal x5,800081c0 +800010c4: 800010b4 .word 0x800010b4 +800010c8: 8000ec24 .word 0x8000ec24 +800010cc: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x9c3f033d +800010d0: 000bad03 lw x26,0(x23) +800010d4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x1fe66f88 +800010d8: 000bac83 lw x25,0(x23) +800010dc: 004b8b93 addi x23,x23,4 + +800010e0 : +Zkne_aes32esmi_cg_cp_rd_b30: + aes32esmi x30, x26, x25, 0 # perform operation +800010e0: 279d0f33 aes32esmi x30,x26,x25,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cp_rd_b30, Zkne_aes32esmi_cg_cp_rd_b30_str) +800010e4: 0001a203 lw x4,0(x3) +800010e8: 01e20863 beq x4,x30,800010f8 +800010ec: 0d4072ef jal x5,800081c0 +800010f0: 800010e0 .word 0x800010e0 +800010f4: 8000ec5b .word 0x8000ec5b +800010f8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xd9642964 +800010fc: 000ba603 lw x12,0(x23) +80001100: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x52df36c8 +80001104: 000ba903 lw x18,0(x23) +80001108: 004b8b93 addi x23,x23,4 + +8000110c : +Zkne_aes32esmi_cg_cp_rd_b31: + aes32esmi x31, x12, x18, 3 # perform operation +8000110c: e7260fb3 aes32esmi x31,x12,x18,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cp_rd_b31, Zkne_aes32esmi_cg_cp_rd_b31_str) +80001110: 0001a203 lw x4,0(x3) +80001114: 01f20863 beq x4,x31,80001124 +80001118: 0a8072ef jal x5,800081c0 +8000111c: 8000110c .word 0x8000110c +80001120: 8000ec92 .word 0x8000ec92 +80001124: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x00000000 +80001128: 000bac03 lw x24,0(x23) +8000112c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xe1a433f2 +80001130: 000bac83 lw x25,0(x23) +80001134: 004b8b93 addi x23,x23,4 + +80001138 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x0: + aes32esmi x21, x24, x25, 3 # perform operation +80001138: e79c0ab3 aes32esmi x21,x24,x25,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cp_rs1_edges_0x0, Zkne_aes32esmi_cg_cp_rs1_edges_0x0_str) +8000113c: 0001a203 lw x4,0(x3) +80001140: 01520863 beq x4,x21,80001150 +80001144: 07c072ef jal x5,800081c0 +80001148: 80001138 .word 0x80001138 +8000114c: 8000ecc9 .word 0x8000ecc9 +80001150: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x00000001 +80001154: 000baa03 lw x20,0(x23) +80001158: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x4af9c9e6 +8000115c: 000ba803 lw x16,0(x23) +80001160: 004b8b93 addi x23,x23,4 + +80001164 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x1: + aes32esmi x12, x20, x16, 2 # perform operation +80001164: a70a0633 aes32esmi x12,x20,x16,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cp_rs1_edges_0x1, Zkne_aes32esmi_cg_cp_rs1_edges_0x1_str) +80001168: 0001a203 lw x4,0(x3) +8000116c: 00c20863 beq x4,x12,8000117c +80001170: 050072ef jal x5,800081c0 +80001174: 80001164 .word 0x80001164 +80001178: 8000ed07 .word 0x8000ed07 +8000117c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x00000002 +80001180: 000bad03 lw x26,0(x23) +80001184: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x54e05cc8 +80001188: 000ba883 lw x17,0(x23) +8000118c: 004b8b93 addi x23,x23,4 + +80001190 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x2: + aes32esmi x12, x26, x17, 0 # perform operation +80001190: 271d0633 aes32esmi x12,x26,x17,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cp_rs1_edges_0x2, Zkne_aes32esmi_cg_cp_rs1_edges_0x2_str) +80001194: 0001a203 lw x4,0(x3) +80001198: 00c20863 beq x4,x12,800011a8 +8000119c: 024072ef jal x5,800081c0 +800011a0: 80001190 .word 0x80001190 +800011a4: 8000ed45 .word 0x8000ed45 +800011a8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x80000000 +800011ac: 000ba303 lw x6,0(x23) +800011b0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0717cf33 +800011b4: 000ba983 lw x19,0(x23) +800011b8: 004b8b93 addi x23,x23,4 + +800011bc : +Zkne_aes32esmi_cg_cp_rs1_edges_0x80000000: + aes32esmi x24, x6, x19, 0 # perform operation +800011bc: 27330c33 aes32esmi x24,x6,x19,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cp_rs1_edges_0x80000000, Zkne_aes32esmi_cg_cp_rs1_edges_0x80000000_str) +800011c0: 0001a203 lw x4,0(x3) +800011c4: 01820863 beq x4,x24,800011d4 +800011c8: 7f9062ef jal x5,800081c0 +800011cc: 800011bc .word 0x800011bc +800011d0: 8000ed83 .word 0x8000ed83 +800011d4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x80000001 +800011d8: 000bac03 lw x24,0(x23) +800011dc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x26baf8ef +800011e0: 000bab03 lw x22,0(x23) +800011e4: 004b8b93 addi x23,x23,4 + +800011e8 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x80000001: + aes32esmi x11, x24, x22, 2 # perform operation +800011e8: a76c05b3 aes32esmi x11,x24,x22,0x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cp_rs1_edges_0x80000001, Zkne_aes32esmi_cg_cp_rs1_edges_0x80000001_str) +800011ec: 0001a203 lw x4,0(x3) +800011f0: 00b20863 beq x4,x11,80001200 +800011f4: 7cd062ef jal x5,800081c0 +800011f8: 800011e8 .word 0x800011e8 +800011fc: 8000edc9 .word 0x8000edc9 +80001200: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x7fffffff +80001204: 000ba703 lw x14,0(x23) +80001208: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x0edd7e5c +8000120c: 000bae03 lw x28,0(x23) +80001210: 004b8b93 addi x23,x23,4 + +80001214 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x7fffffff: + aes32esmi x24, x14, x28, 3 # perform operation +80001214: e7c70c33 aes32esmi x24,x14,x28,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cp_rs1_edges_0x7fffffff, Zkne_aes32esmi_cg_cp_rs1_edges_0x7fffffff_str) +80001218: 0001a203 lw x4,0(x3) +8000121c: 01820863 beq x4,x24,8000122c +80001220: 7a1062ef jal x5,800081c0 +80001224: 80001214 .word 0x80001214 +80001228: 8000ee0f .word 0x8000ee0f +8000122c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x7ffffffe +80001230: 000ba883 lw x17,0(x23) +80001234: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x77a7b2d7 +80001238: 000bad03 lw x26,0(x23) +8000123c: 004b8b93 addi x23,x23,4 + +80001240 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x7ffffffe: + aes32esmi x6, x17, x26, 0 # perform operation +80001240: 27a88333 aes32esmi x6,x17,x26,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cp_rs1_edges_0x7ffffffe, Zkne_aes32esmi_cg_cp_rs1_edges_0x7ffffffe_str) +80001244: 0001a203 lw x4,0(x3) +80001248: 00620863 beq x4,x6,80001258 +8000124c: 775062ef jal x5,800081c0 +80001250: 80001240 .word 0x80001240 +80001254: 8000ee55 .word 0x8000ee55 +80001258: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xffffffff +8000125c: 000ba683 lw x13,0(x23) +80001260: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x773f9268 +80001264: 000bac83 lw x25,0(x23) +80001268: 004b8b93 addi x23,x23,4 + +8000126c : +Zkne_aes32esmi_cg_cp_rs1_edges_0xffffffff: + aes32esmi x30, x13, x25, 0 # perform operation +8000126c: 27968f33 aes32esmi x30,x13,x25,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cp_rs1_edges_0xffffffff, Zkne_aes32esmi_cg_cp_rs1_edges_0xffffffff_str) +80001270: 0001a203 lw x4,0(x3) +80001274: 01e20863 beq x4,x30,80001284 +80001278: 749062ef jal x5,800081c0 +8000127c: 8000126c .word 0x8000126c +80001280: 8000ee9b .word 0x8000ee9b +80001284: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xfffffffe +80001288: 000ba403 lw x8,0(x23) +8000128c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xc73e93fa +80001290: 000bac83 lw x25,0(x23) +80001294: 004b8b93 addi x23,x23,4 + +80001298 : +Zkne_aes32esmi_cg_cp_rs1_edges_0xfffffffe: + aes32esmi x27, x8, x25, 3 # perform operation +80001298: e7940db3 aes32esmi x27,x8,x25,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cp_rs1_edges_0xfffffffe, Zkne_aes32esmi_cg_cp_rs1_edges_0xfffffffe_str) +8000129c: 0001a203 lw x4,0(x3) +800012a0: 01b20863 beq x4,x27,800012b0 +800012a4: 71d062ef jal x5,800081c0 +800012a8: 80001298 .word 0x80001298 +800012ac: 8000eee1 .word 0x8000eee1 +800012b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x5bbc8872 +800012b4: 000baa83 lw x21,0(x23) +800012b8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xed65ebe6 +800012bc: 000bae03 lw x28,0(x23) +800012c0: 004b8b93 addi x23,x23,4 + +800012c4 : +Zkne_aes32esmi_cg_cp_rs1_edges_0x5bbc8872: + aes32esmi x30, x21, x28, 1 # perform operation +800012c4: 67ca8f33 aes32esmi x30,x21,x28,0x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cp_rs1_edges_0x5bbc8872, Zkne_aes32esmi_cg_cp_rs1_edges_0x5bbc8872_str) +800012c8: 0001a203 lw x4,0(x3) +800012cc: 01e20863 beq x4,x30,800012dc +800012d0: 6f1062ef jal x5,800081c0 +800012d4: 800012c4 .word 0x800012c4 +800012d8: 8000ef27 .word 0x8000ef27 +800012dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xaaaaaaaa +800012e0: 000ba403 lw x8,0(x23) +800012e4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x146913c0 +800012e8: 000ba483 lw x9,0(x23) +800012ec: 004b8b93 addi x23,x23,4 + +800012f0 : +Zkne_aes32esmi_cg_cp_rs1_edges_0xaaaaaaaa: + aes32esmi x15, x8, x9, 0 # perform operation +800012f0: 269407b3 aes32esmi x15,x8,x9,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cp_rs1_edges_0xaaaaaaaa, Zkne_aes32esmi_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f4: 0001a203 lw x4,0(x3) +800012f8: 00f20863 beq x4,x15,80001308 +800012fc: 6c5062ef jal x5,800081c0 +80001300: 800012f0 .word 0x800012f0 +80001304: 8000ef6d .word 0x8000ef6d +80001308: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x55555555 +8000130c: 000ba683 lw x13,0(x23) +80001310: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x56fc8277 +80001314: 000ba603 lw x12,0(x23) +80001318: 004b8b93 addi x23,x23,4 + +8000131c : +Zkne_aes32esmi_cg_cp_rs1_edges_0x55555555: + aes32esmi x24, x13, x12, 1 # perform operation +8000131c: 66c68c33 aes32esmi x24,x13,x12,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cp_rs1_edges_0x55555555, Zkne_aes32esmi_cg_cp_rs1_edges_0x55555555_str) +80001320: 0001a203 lw x4,0(x3) +80001324: 01820863 beq x4,x24,80001334 +80001328: 699062ef jal x5,800081c0 +8000132c: 8000131c .word 0x8000131c +80001330: 8000efb3 .word 0x8000efb3 +80001334: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x5fd08baa +80001338: 000ba883 lw x17,0(x23) +8000133c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x00000000 +80001340: 000ba683 lw x13,0(x23) +80001344: 004b8b93 addi x23,x23,4 + +80001348 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x0: + aes32esmi x18, x17, x13, 1 # perform operation +80001348: 66d88933 aes32esmi x18,x17,x13,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cp_rs2_edges_0x0, Zkne_aes32esmi_cg_cp_rs2_edges_0x0_str) +8000134c: 0001a203 lw x4,0(x3) +80001350: 01220863 beq x4,x18,80001360 +80001354: 66d062ef jal x5,800081c0 +80001358: 80001348 .word 0x80001348 +8000135c: 8000eff9 .word 0x8000eff9 +80001360: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x6ee4b92a +80001364: 000ba603 lw x12,0(x23) +80001368: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x00000001 +8000136c: 000ba483 lw x9,0(x23) +80001370: 004b8b93 addi x23,x23,4 + +80001374 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x1: + aes32esmi x18, x12, x9, 1 # perform operation +80001374: 66960933 aes32esmi x18,x12,x9,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cp_rs2_edges_0x1, Zkne_aes32esmi_cg_cp_rs2_edges_0x1_str) +80001378: 0001a203 lw x4,0(x3) +8000137c: 01220863 beq x4,x18,8000138c +80001380: 641062ef jal x5,800081c0 +80001384: 80001374 .word 0x80001374 +80001388: 8000f038 .word 0x8000f038 +8000138c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xe5a0683c +80001390: 000bae03 lw x28,0(x23) +80001394: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x00000002 +80001398: 000ba383 lw x7,0(x23) +8000139c: 004b8b93 addi x23,x23,4 + +800013a0 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x2: + aes32esmi x29, x28, x7, 2 # perform operation +800013a0: a67e0eb3 aes32esmi x29,x28,x7,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cp_rs2_edges_0x2, Zkne_aes32esmi_cg_cp_rs2_edges_0x2_str) +800013a4: 0001a203 lw x4,0(x3) +800013a8: 01d20863 beq x4,x29,800013b8 +800013ac: 615062ef jal x5,800081c0 +800013b0: 800013a0 .word 0x800013a0 +800013b4: 8000f077 .word 0x8000f077 +800013b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x4bdbf7c4 +800013bc: 000baf03 lw x30,0(x23) +800013c0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x80000000 +800013c4: 000bac03 lw x24,0(x23) +800013c8: 004b8b93 addi x23,x23,4 + +800013cc : +Zkne_aes32esmi_cg_cp_rs2_edges_0x80000000: + aes32esmi x6, x30, x24, 3 # perform operation +800013cc: e78f0333 aes32esmi x6,x30,x24,0x3 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cp_rs2_edges_0x80000000, Zkne_aes32esmi_cg_cp_rs2_edges_0x80000000_str) +800013d0: 0001a203 lw x4,0(x3) +800013d4: 00620863 beq x4,x6,800013e4 +800013d8: 5e9062ef jal x5,800081c0 +800013dc: 800013cc .word 0x800013cc +800013e0: 8000f0b6 .word 0x8000f0b6 +800013e4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xf3e08977 +800013e8: 000ba883 lw x17,0(x23) +800013ec: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x80000001 +800013f0: 000ba403 lw x8,0(x23) +800013f4: 004b8b93 addi x23,x23,4 + +800013f8 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x80000001: + aes32esmi x2, x17, x8, 0 # perform operation +800013f8: 26888133 aes32esmi x2,x17,x8,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cp_rs2_edges_0x80000001, Zkne_aes32esmi_cg_cp_rs2_edges_0x80000001_str) +800013fc: 0001a203 lw x4,0(x3) +80001400: 00220863 beq x4,x2,80001410 +80001404: 5bd062ef jal x5,800081c0 +80001408: 800013f8 .word 0x800013f8 +8000140c: 8000f0fc .word 0x8000f0fc +80001410: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x0448a197 +80001414: 000ba603 lw x12,0(x23) +80001418: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7fffffff +8000141c: 000ba883 lw x17,0(x23) +80001420: 004b8b93 addi x23,x23,4 + +80001424 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x7fffffff: + aes32esmi x15, x12, x17, 1 # perform operation +80001424: 671607b3 aes32esmi x15,x12,x17,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cp_rs2_edges_0x7fffffff, Zkne_aes32esmi_cg_cp_rs2_edges_0x7fffffff_str) +80001428: 0001a203 lw x4,0(x3) +8000142c: 00f20863 beq x4,x15,8000143c +80001430: 591062ef jal x5,800081c0 +80001434: 80001424 .word 0x80001424 +80001438: 8000f142 .word 0x8000f142 +8000143c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x3a48e5a8 +80001440: 000baa03 lw x20,0(x23) +80001444: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x7ffffffe +80001448: 000ba683 lw x13,0(x23) +8000144c: 004b8b93 addi x23,x23,4 + +80001450 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x7ffffffe: + aes32esmi x2, x20, x13, 2 # perform operation +80001450: a6da0133 aes32esmi x2,x20,x13,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cp_rs2_edges_0x7ffffffe, Zkne_aes32esmi_cg_cp_rs2_edges_0x7ffffffe_str) +80001454: 0001a203 lw x4,0(x3) +80001458: 00220863 beq x4,x2,80001468 +8000145c: 565062ef jal x5,800081c0 +80001460: 80001450 .word 0x80001450 +80001464: 8000f188 .word 0x8000f188 +80001468: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x32c9fe5c +8000146c: 000bac83 lw x25,0(x23) +80001470: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0xffffffff +80001474: 000baf83 lw x31,0(x23) +80001478: 004b8b93 addi x23,x23,4 + +8000147c : +Zkne_aes32esmi_cg_cp_rs2_edges_0xffffffff: + aes32esmi x27, x25, x31, 3 # perform operation +8000147c: e7fc8db3 aes32esmi x27,x25,x31,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cp_rs2_edges_0xffffffff, Zkne_aes32esmi_cg_cp_rs2_edges_0xffffffff_str) +80001480: 0001a203 lw x4,0(x3) +80001484: 01b20863 beq x4,x27,80001494 +80001488: 539062ef jal x5,800081c0 +8000148c: 8000147c .word 0x8000147c +80001490: 8000f1ce .word 0x8000f1ce +80001494: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x6ff464ab +80001498: 000baa03 lw x20,0(x23) +8000149c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xfffffffe +800014a0: 000ba603 lw x12,0(x23) +800014a4: 004b8b93 addi x23,x23,4 + +800014a8 : +Zkne_aes32esmi_cg_cp_rs2_edges_0xfffffffe: + aes32esmi x14, x20, x12, 2 # perform operation +800014a8: a6ca0733 aes32esmi x14,x20,x12,0x2 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cp_rs2_edges_0xfffffffe, Zkne_aes32esmi_cg_cp_rs2_edges_0xfffffffe_str) +800014ac: 0001a203 lw x4,0(x3) +800014b0: 00e20863 beq x4,x14,800014c0 +800014b4: 50d062ef jal x5,800081c0 +800014b8: 800014a8 .word 0x800014a8 +800014bc: 8000f214 .word 0x8000f214 +800014c0: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xc8456cad +800014c4: 000ba383 lw x7,0(x23) +800014c8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x5bbc8872 +800014cc: 000bae03 lw x28,0(x23) +800014d0: 004b8b93 addi x23,x23,4 + +800014d4 : +Zkne_aes32esmi_cg_cp_rs2_edges_0x5bbc8872: + aes32esmi x20, x7, x28, 2 # perform operation +800014d4: a7c38a33 aes32esmi x20,x7,x28,0x2 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cp_rs2_edges_0x5bbc8872, Zkne_aes32esmi_cg_cp_rs2_edges_0x5bbc8872_str) +800014d8: 0001a203 lw x4,0(x3) +800014dc: 01420863 beq x4,x20,800014ec +800014e0: 4e1062ef jal x5,800081c0 +800014e4: 800014d4 .word 0x800014d4 +800014e8: 8000f25a .word 0x8000f25a +800014ec: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x7d0a22a9 +800014f0: 000ba603 lw x12,0(x23) +800014f4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xaaaaaaaa +800014f8: 000ba103 lw x2,0(x23) +800014fc: 004b8b93 addi x23,x23,4 + +80001500 : +Zkne_aes32esmi_cg_cp_rs2_edges_0xaaaaaaaa: + aes32esmi x6, x12, x2, 1 # perform operation +80001500: 66260333 aes32esmi x6,x12,x2,0x1 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cp_rs2_edges_0xaaaaaaaa, Zkne_aes32esmi_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001504: 0001a203 lw x4,0(x3) +80001508: 00620863 beq x4,x6,80001518 +8000150c: 4b5062ef jal x5,800081c0 +80001510: 80001500 .word 0x80001500 +80001514: 8000f2a0 .word 0x8000f2a0 +80001518: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x2363ed28 +8000151c: 000ba583 lw x11,0(x23) +80001520: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x55555555 +80001524: 000bac03 lw x24,0(x23) +80001528: 004b8b93 addi x23,x23,4 + +8000152c : +Zkne_aes32esmi_cg_cp_rs2_edges_0x55555555: + aes32esmi x19, x11, x24, 3 # perform operation +8000152c: e78589b3 aes32esmi x19,x11,x24,0x3 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zkne_aes32esmi_cg_cp_rs2_edges_0x55555555, Zkne_aes32esmi_cg_cp_rs2_edges_0x55555555_str) +80001530: 0001a203 lw x4,0(x3) +80001534: 01320863 beq x4,x19,80001544 +80001538: 489062ef jal x5,800081c0 +8000153c: 8000152c .word 0x8000152c +80001540: 8000f2e6 .word 0x8000f2e6 +80001544: 00418193 addi x3,x3,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x00000000 +80001548: 000ba583 lw x11,0(x23) +8000154c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x00000000 +80001550: 000ba903 lw x18,0(x23) +80001554: 004b8b93 addi x23,x23,4 + +80001558 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes32esmi x1, x11, x18, 3 # perform operation +80001558: e72580b3 aes32esmi x1,x11,x18,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000155c: 0001a203 lw x4,0(x3) +80001560: 00120863 beq x4,x1,80001570 +80001564: 45d062ef jal x5,800081c0 +80001568: 80001558 .word 0x80001558 +8000156c: 8000f32c .word 0x8000f32c +80001570: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x00000000 +80001574: 000bae03 lw x28,0(x23) +80001578: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x00000001 +8000157c: 000ba583 lw x11,0(x23) +80001580: 004b8b93 addi x23,x23,4 + +80001584 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes32esmi x2, x28, x11, 2 # perform operation +80001584: a6be0133 aes32esmi x2,x28,x11,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001588: 0001a203 lw x4,0(x3) +8000158c: 00220863 beq x4,x2,8000159c +80001590: 431062ef jal x5,800081c0 +80001594: 80001584 .word 0x80001584 +80001598: 8000f382 .word 0x8000f382 +8000159c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x00000000 +800015a0: 000ba083 lw x1,0(x23) +800015a4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x00000002 +800015a8: 000ba383 lw x7,0(x23) +800015ac: 004b8b93 addi x23,x23,4 + +800015b0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes32esmi x14, x1, x7, 0 # perform operation +800015b0: 26708733 aes32esmi x14,x1,x7,0x0 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b4: 0001a203 lw x4,0(x3) +800015b8: 00e20863 beq x4,x14,800015c8 +800015bc: 405062ef jal x5,800081c0 +800015c0: 800015b0 .word 0x800015b0 +800015c4: 8000f3d8 .word 0x8000f3d8 +800015c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x00000000 +800015cc: 000ba683 lw x13,0(x23) +800015d0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x80000000 +800015d4: 000ba083 lw x1,0(x23) +800015d8: 004b8b93 addi x23,x23,4 + +800015dc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + aes32esmi x2, x13, x1, 1 # perform operation +800015dc: 66168133 aes32esmi x2,x13,x1,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e0: 0001a203 lw x4,0(x3) +800015e4: 00220863 beq x4,x2,800015f4 +800015e8: 3d9062ef jal x5,800081c0 +800015ec: 800015dc .word 0x800015dc +800015f0: 8000f42e .word 0x8000f42e +800015f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x00000000 +800015f8: 000baf03 lw x30,0(x23) +800015fc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x80000001 +80001600: 000ba383 lw x7,0(x23) +80001604: 004b8b93 addi x23,x23,4 + +80001608 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + aes32esmi x29, x30, x7, 3 # perform operation +80001608: e67f0eb3 aes32esmi x29,x30,x7,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000160c: 0001a203 lw x4,0(x3) +80001610: 01d20863 beq x4,x29,80001620 +80001614: 3ad062ef jal x5,800081c0 +80001618: 80001608 .word 0x80001608 +8000161c: 8000f48b .word 0x8000f48b +80001620: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x00000000 +80001624: 000bac83 lw x25,0(x23) +80001628: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x7fffffff +8000162c: 000baf03 lw x30,0(x23) +80001630: 004b8b93 addi x23,x23,4 + +80001634 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + aes32esmi x28, x25, x30, 0 # perform operation +80001634: 27ec8e33 aes32esmi x28,x25,x30,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001638: 0001a203 lw x4,0(x3) +8000163c: 01c20863 beq x4,x28,8000164c +80001640: 381062ef jal x5,800081c0 +80001644: 80001634 .word 0x80001634 +80001648: 8000f4e8 .word 0x8000f4e8 +8000164c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x00000000 +80001650: 000bac03 lw x24,0(x23) +80001654: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x7ffffffe +80001658: 000baa83 lw x21,0(x23) +8000165c: 004b8b93 addi x23,x23,4 + +80001660 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + aes32esmi x16, x24, x21, 0 # perform operation +80001660: 275c0833 aes32esmi x16,x24,x21,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001664: 0001a203 lw x4,0(x3) +80001668: 01020863 beq x4,x16,80001678 +8000166c: 355062ef jal x5,800081c0 +80001670: 80001660 .word 0x80001660 +80001674: 8000f545 .word 0x8000f545 +80001678: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x00000000 +8000167c: 000ba303 lw x6,0(x23) +80001680: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xffffffff +80001684: 000baa03 lw x20,0(x23) +80001688: 004b8b93 addi x23,x23,4 + +8000168c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes32esmi x1, x6, x20, 2 # perform operation +8000168c: a74300b3 aes32esmi x1,x6,x20,0x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001690: 0001a203 lw x4,0(x3) +80001694: 00120863 beq x4,x1,800016a4 +80001698: 329062ef jal x5,800081c0 +8000169c: 8000168c .word 0x8000168c +800016a0: 8000f5a2 .word 0x8000f5a2 +800016a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x00000000 +800016a8: 000bac03 lw x24,0(x23) +800016ac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xfffffffe +800016b0: 000bab03 lw x22,0(x23) +800016b4: 004b8b93 addi x23,x23,4 + +800016b8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes32esmi x25, x24, x22, 2 # perform operation +800016b8: a76c0cb3 aes32esmi x25,x24,x22,0x2 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016bc: 0001a203 lw x4,0(x3) +800016c0: 01920863 beq x4,x25,800016d0 +800016c4: 2fd062ef jal x5,800081c0 +800016c8: 800016b8 .word 0x800016b8 +800016cc: 8000f5ff .word 0x8000f5ff +800016d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x00000000 +800016d4: 000ba703 lw x14,0(x23) +800016d8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x5bbc8872 +800016dc: 000ba503 lw x10,0(x23) +800016e0: 004b8b93 addi x23,x23,4 + +800016e4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + aes32esmi x20, x14, x10, 3 # perform operation +800016e4: e6a70a33 aes32esmi x20,x14,x10,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e8: 0001a203 lw x4,0(x3) +800016ec: 01420863 beq x4,x20,800016fc +800016f0: 2d1062ef jal x5,800081c0 +800016f4: 800016e4 .word 0x800016e4 +800016f8: 8000f65c .word 0x8000f65c +800016fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x00000000 +80001700: 000baf03 lw x30,0(x23) +80001704: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xaaaaaaaa +80001708: 000ba983 lw x19,0(x23) +8000170c: 004b8b93 addi x23,x23,4 + +80001710 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + aes32esmi x31, x30, x19, 1 # perform operation +80001710: 673f0fb3 aes32esmi x31,x30,x19,0x1 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001714: 0001a203 lw x4,0(x3) +80001718: 01f20863 beq x4,x31,80001728 +8000171c: 2a5062ef jal x5,800081c0 +80001720: 80001710 .word 0x80001710 +80001724: 8000f6b9 .word 0x8000f6b9 +80001728: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x00000000 +8000172c: 000baa83 lw x21,0(x23) +80001730: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x55555555 +80001734: 000baf03 lw x30,0(x23) +80001738: 004b8b93 addi x23,x23,4 + +8000173c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + aes32esmi x6, x21, x30, 3 # perform operation +8000173c: e7ea8333 aes32esmi x6,x21,x30,0x3 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001740: 0001a203 lw x4,0(x3) +80001744: 00620863 beq x4,x6,80001754 +80001748: 279062ef jal x5,800081c0 +8000174c: 8000173c .word 0x8000173c +80001750: 8000f716 .word 0x8000f716 +80001754: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x00000001 +80001758: 000baa03 lw x20,0(x23) +8000175c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x00000000 +80001760: 000ba883 lw x17,0(x23) +80001764: 004b8b93 addi x23,x23,4 + +80001768 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes32esmi x28, x20, x17, 0 # perform operation +80001768: 271a0e33 aes32esmi x28,x20,x17,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000176c: 0001a203 lw x4,0(x3) +80001770: 01c20863 beq x4,x28,80001780 +80001774: 24d062ef jal x5,800081c0 +80001778: 80001768 .word 0x80001768 +8000177c: 8000f773 .word 0x8000f773 +80001780: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x00000001 +80001784: 000ba783 lw x15,0(x23) +80001788: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x00000001 +8000178c: 000bae83 lw x29,0(x23) +80001790: 004b8b93 addi x23,x23,4 + +80001794 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes32esmi x30, x15, x29, 2 # perform operation +80001794: a7d78f33 aes32esmi x30,x15,x29,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001798: 0001a203 lw x4,0(x3) +8000179c: 01e20863 beq x4,x30,800017ac +800017a0: 221062ef jal x5,800081c0 +800017a4: 80001794 .word 0x80001794 +800017a8: 8000f7c9 .word 0x8000f7c9 +800017ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x00000001 +800017b0: 000ba903 lw x18,0(x23) +800017b4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x00000002 +800017b8: 000ba703 lw x14,0(x23) +800017bc: 004b8b93 addi x23,x23,4 + +800017c0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes32esmi x28, x18, x14, 0 # perform operation +800017c0: 26e90e33 aes32esmi x28,x18,x14,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c4: 0001a203 lw x4,0(x3) +800017c8: 01c20863 beq x4,x28,800017d8 +800017cc: 1f5062ef jal x5,800081c0 +800017d0: 800017c0 .word 0x800017c0 +800017d4: 8000f81f .word 0x8000f81f +800017d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x00000001 +800017dc: 000bae83 lw x29,0(x23) +800017e0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x80000000 +800017e4: 000ba603 lw x12,0(x23) +800017e8: 004b8b93 addi x23,x23,4 + +800017ec : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + aes32esmi x22, x29, x12, 0 # perform operation +800017ec: 26ce8b33 aes32esmi x22,x29,x12,0x0 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f0: 0001a203 lw x4,0(x3) +800017f4: 01620863 beq x4,x22,80001804 +800017f8: 1c9062ef jal x5,800081c0 +800017fc: 800017ec .word 0x800017ec +80001800: 8000f875 .word 0x8000f875 +80001804: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x00000001 +80001808: 000bae83 lw x29,0(x23) +8000180c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x80000001 +80001810: 000ba083 lw x1,0(x23) +80001814: 004b8b93 addi x23,x23,4 + +80001818 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + aes32esmi x30, x29, x1, 0 # perform operation +80001818: 261e8f33 aes32esmi x30,x29,x1,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000181c: 0001a203 lw x4,0(x3) +80001820: 01e20863 beq x4,x30,80001830 +80001824: 19d062ef jal x5,800081c0 +80001828: 80001818 .word 0x80001818 +8000182c: 8000f8d2 .word 0x8000f8d2 +80001830: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x00000001 +80001834: 000baf83 lw x31,0(x23) +80001838: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x7fffffff +8000183c: 000ba503 lw x10,0(x23) +80001840: 004b8b93 addi x23,x23,4 + +80001844 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + aes32esmi x16, x31, x10, 1 # perform operation +80001844: 66af8833 aes32esmi x16,x31,x10,0x1 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001848: 0001a203 lw x4,0(x3) +8000184c: 01020863 beq x4,x16,8000185c +80001850: 171062ef jal x5,800081c0 +80001854: 80001844 .word 0x80001844 +80001858: 8000f92f .word 0x8000f92f +8000185c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x00000001 +80001860: 000bad83 lw x27,0(x23) +80001864: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x7ffffffe +80001868: 000bac83 lw x25,0(x23) +8000186c: 004b8b93 addi x23,x23,4 + +80001870 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + aes32esmi x21, x27, x25, 3 # perform operation +80001870: e79d8ab3 aes32esmi x21,x27,x25,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001874: 0001a203 lw x4,0(x3) +80001878: 01520863 beq x4,x21,80001888 +8000187c: 145062ef jal x5,800081c0 +80001880: 80001870 .word 0x80001870 +80001884: 8000f98c .word 0x8000f98c +80001888: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x00000001 +8000188c: 000ba303 lw x6,0(x23) +80001890: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xffffffff +80001894: 000baa83 lw x21,0(x23) +80001898: 004b8b93 addi x23,x23,4 + +8000189c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes32esmi x11, x6, x21, 3 # perform operation +8000189c: e75305b3 aes32esmi x11,x6,x21,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a0: 0001a203 lw x4,0(x3) +800018a4: 00b20863 beq x4,x11,800018b4 +800018a8: 119062ef jal x5,800081c0 +800018ac: 8000189c .word 0x8000189c +800018b0: 8000f9e9 .word 0x8000f9e9 +800018b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x00000001 +800018b8: 000ba783 lw x15,0(x23) +800018bc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xfffffffe +800018c0: 000baa03 lw x20,0(x23) +800018c4: 004b8b93 addi x23,x23,4 + +800018c8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes32esmi x8, x15, x20, 3 # perform operation +800018c8: e7478433 aes32esmi x8,x15,x20,0x3 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018cc: 0001a203 lw x4,0(x3) +800018d0: 00820863 beq x4,x8,800018e0 +800018d4: 0ed062ef jal x5,800081c0 +800018d8: 800018c8 .word 0x800018c8 +800018dc: 8000fa46 .word 0x8000fa46 +800018e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x00000001 +800018e4: 000ba983 lw x19,0(x23) +800018e8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x5bbc8872 +800018ec: 000ba403 lw x8,0(x23) +800018f0: 004b8b93 addi x23,x23,4 + +800018f4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + aes32esmi x2, x19, x8, 0 # perform operation +800018f4: 26898133 aes32esmi x2,x19,x8,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f8: 0001a203 lw x4,0(x3) +800018fc: 00220863 beq x4,x2,8000190c +80001900: 0c1062ef jal x5,800081c0 +80001904: 800018f4 .word 0x800018f4 +80001908: 8000faa3 .word 0x8000faa3 +8000190c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x00000001 +80001910: 000ba803 lw x16,0(x23) +80001914: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xaaaaaaaa +80001918: 000bae03 lw x28,0(x23) +8000191c: 004b8b93 addi x23,x23,4 + +80001920 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + aes32esmi x25, x16, x28, 3 # perform operation +80001920: e7c80cb3 aes32esmi x25,x16,x28,0x3 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001924: 0001a203 lw x4,0(x3) +80001928: 01920863 beq x4,x25,80001938 +8000192c: 095062ef jal x5,800081c0 +80001930: 80001920 .word 0x80001920 +80001934: 8000fb00 .word 0x8000fb00 +80001938: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x00000001 +8000193c: 000ba403 lw x8,0(x23) +80001940: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x55555555 +80001944: 000bad83 lw x27,0(x23) +80001948: 004b8b93 addi x23,x23,4 + +8000194c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + aes32esmi x7, x8, x27, 2 # perform operation +8000194c: a7b403b3 aes32esmi x7,x8,x27,0x2 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001950: 0001a203 lw x4,0(x3) +80001954: 00720863 beq x4,x7,80001964 +80001958: 069062ef jal x5,800081c0 +8000195c: 8000194c .word 0x8000194c +80001960: 8000fb5d .word 0x8000fb5d +80001964: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x00000002 +80001968: 000ba803 lw x16,0(x23) +8000196c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x00000000 +80001970: 000ba503 lw x10,0(x23) +80001974: 004b8b93 addi x23,x23,4 + +80001978 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes32esmi x6, x16, x10, 0 # perform operation +80001978: 26a80333 aes32esmi x6,x16,x10,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000197c: 0001a203 lw x4,0(x3) +80001980: 00620863 beq x4,x6,80001990 +80001984: 03d062ef jal x5,800081c0 +80001988: 80001978 .word 0x80001978 +8000198c: 8000fbba .word 0x8000fbba +80001990: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x00000002 +80001994: 000ba483 lw x9,0(x23) +80001998: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x00000001 +8000199c: 000bae83 lw x29,0(x23) +800019a0: 004b8b93 addi x23,x23,4 + +800019a4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes32esmi x27, x9, x29, 3 # perform operation +800019a4: e7d48db3 aes32esmi x27,x9,x29,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a8: 0001a203 lw x4,0(x3) +800019ac: 01b20863 beq x4,x27,800019bc +800019b0: 011062ef jal x5,800081c0 +800019b4: 800019a4 .word 0x800019a4 +800019b8: 8000fc10 .word 0x8000fc10 +800019bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x00000002 +800019c0: 000ba403 lw x8,0(x23) +800019c4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x00000002 +800019c8: 000ba083 lw x1,0(x23) +800019cc: 004b8b93 addi x23,x23,4 + +800019d0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes32esmi x24, x8, x1, 0 # perform operation +800019d0: 26140c33 aes32esmi x24,x8,x1,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d4: 0001a203 lw x4,0(x3) +800019d8: 01820863 beq x4,x24,800019e8 +800019dc: 7e4062ef jal x5,800081c0 +800019e0: 800019d0 .word 0x800019d0 +800019e4: 8000fc66 .word 0x8000fc66 +800019e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x00000002 +800019ec: 000ba403 lw x8,0(x23) +800019f0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x80000000 +800019f4: 000ba103 lw x2,0(x23) +800019f8: 004b8b93 addi x23,x23,4 + +800019fc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + aes32esmi x18, x8, x2, 1 # perform operation +800019fc: 66240933 aes32esmi x18,x8,x2,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a00: 0001a203 lw x4,0(x3) +80001a04: 01220863 beq x4,x18,80001a14 +80001a08: 7b8062ef jal x5,800081c0 +80001a0c: 800019fc .word 0x800019fc +80001a10: 8000fcbc .word 0x8000fcbc +80001a14: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x00000002 +80001a18: 000bae03 lw x28,0(x23) +80001a1c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x80000001 +80001a20: 000ba883 lw x17,0(x23) +80001a24: 004b8b93 addi x23,x23,4 + +80001a28 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + aes32esmi x10, x28, x17, 0 # perform operation +80001a28: 271e0533 aes32esmi x10,x28,x17,0x0 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a2c: 0001a203 lw x4,0(x3) +80001a30: 00a20863 beq x4,x10,80001a40 +80001a34: 78c062ef jal x5,800081c0 +80001a38: 80001a28 .word 0x80001a28 +80001a3c: 8000fd19 .word 0x8000fd19 +80001a40: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x00000002 +80001a44: 000bac83 lw x25,0(x23) +80001a48: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x7fffffff +80001a4c: 000ba783 lw x15,0(x23) +80001a50: 004b8b93 addi x23,x23,4 + +80001a54 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + aes32esmi x9, x25, x15, 1 # perform operation +80001a54: 66fc84b3 aes32esmi x9,x25,x15,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a58: 0001a203 lw x4,0(x3) +80001a5c: 00920863 beq x4,x9,80001a6c +80001a60: 760062ef jal x5,800081c0 +80001a64: 80001a54 .word 0x80001a54 +80001a68: 8000fd76 .word 0x8000fd76 +80001a6c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x00000002 +80001a70: 000baa83 lw x21,0(x23) +80001a74: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x7ffffffe +80001a78: 000bac03 lw x24,0(x23) +80001a7c: 004b8b93 addi x23,x23,4 + +80001a80 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + aes32esmi x17, x21, x24, 3 # perform operation +80001a80: e78a88b3 aes32esmi x17,x21,x24,0x3 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a84: 0001a203 lw x4,0(x3) +80001a88: 01120863 beq x4,x17,80001a98 +80001a8c: 734062ef jal x5,800081c0 +80001a90: 80001a80 .word 0x80001a80 +80001a94: 8000fdd3 .word 0x8000fdd3 +80001a98: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x00000002 +80001a9c: 000ba403 lw x8,0(x23) +80001aa0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xffffffff +80001aa4: 000bae83 lw x29,0(x23) +80001aa8: 004b8b93 addi x23,x23,4 + +80001aac : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes32esmi x11, x8, x29, 1 # perform operation +80001aac: 67d405b3 aes32esmi x11,x8,x29,0x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab0: 0001a203 lw x4,0(x3) +80001ab4: 00b20863 beq x4,x11,80001ac4 +80001ab8: 708062ef jal x5,800081c0 +80001abc: 80001aac .word 0x80001aac +80001ac0: 8000fe30 .word 0x8000fe30 +80001ac4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x00000002 +80001ac8: 000ba903 lw x18,0(x23) +80001acc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xfffffffe +80001ad0: 000ba803 lw x16,0(x23) +80001ad4: 004b8b93 addi x23,x23,4 + +80001ad8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes32esmi x13, x18, x16, 1 # perform operation +80001ad8: 670906b3 aes32esmi x13,x18,x16,0x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001adc: 0001a203 lw x4,0(x3) +80001ae0: 00d20863 beq x4,x13,80001af0 +80001ae4: 6dc062ef jal x5,800081c0 +80001ae8: 80001ad8 .word 0x80001ad8 +80001aec: 8000fe8d .word 0x8000fe8d +80001af0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x00000002 +80001af4: 000ba683 lw x13,0(x23) +80001af8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x5bbc8872 +80001afc: 000bae03 lw x28,0(x23) +80001b00: 004b8b93 addi x23,x23,4 + +80001b04 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + aes32esmi x9, x13, x28, 3 # perform operation +80001b04: e7c684b3 aes32esmi x9,x13,x28,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b08: 0001a203 lw x4,0(x3) +80001b0c: 00920863 beq x4,x9,80001b1c +80001b10: 6b0062ef jal x5,800081c0 +80001b14: 80001b04 .word 0x80001b04 +80001b18: 8000feea .word 0x8000feea +80001b1c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x00000002 +80001b20: 000baf03 lw x30,0(x23) +80001b24: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xaaaaaaaa +80001b28: 000ba903 lw x18,0(x23) +80001b2c: 004b8b93 addi x23,x23,4 + +80001b30 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + aes32esmi x16, x30, x18, 0 # perform operation +80001b30: 272f0833 aes32esmi x16,x30,x18,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b34: 0001a203 lw x4,0(x3) +80001b38: 01020863 beq x4,x16,80001b48 +80001b3c: 684062ef jal x5,800081c0 +80001b40: 80001b30 .word 0x80001b30 +80001b44: 8000ff47 .word 0x8000ff47 +80001b48: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x00000002 +80001b4c: 000bad83 lw x27,0(x23) +80001b50: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x55555555 +80001b54: 000bae03 lw x28,0(x23) +80001b58: 004b8b93 addi x23,x23,4 + +80001b5c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + aes32esmi x11, x27, x28, 0 # perform operation +80001b5c: 27cd85b3 aes32esmi x11,x27,x28,0x0 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b60: 0001a203 lw x4,0(x3) +80001b64: 00b20863 beq x4,x11,80001b74 +80001b68: 658062ef jal x5,800081c0 +80001b6c: 80001b5c .word 0x80001b5c +80001b70: 8000ffa4 .word 0x8000ffa4 +80001b74: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x80000000 +80001b78: 000ba383 lw x7,0(x23) +80001b7c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x00000000 +80001b80: 000ba083 lw x1,0(x23) +80001b84: 004b8b93 addi x23,x23,4 + +80001b88 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + aes32esmi x21, x7, x1, 3 # perform operation +80001b88: e6138ab3 aes32esmi x21,x7,x1,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b8c: 0001a203 lw x4,0(x3) +80001b90: 01520863 beq x4,x21,80001ba0 +80001b94: 62c062ef jal x5,800081c0 +80001b98: 80001b88 .word 0x80001b88 +80001b9c: 80010001 .word 0x80010001 +80001ba0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x80000000 +80001ba4: 000baf83 lw x31,0(x23) +80001ba8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x00000001 +80001bac: 000baa83 lw x21,0(x23) +80001bb0: 004b8b93 addi x23,x23,4 + +80001bb4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + aes32esmi x15, x31, x21, 2 # perform operation +80001bb4: a75f87b3 aes32esmi x15,x31,x21,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb8: 0001a203 lw x4,0(x3) +80001bbc: 00f20863 beq x4,x15,80001bcc +80001bc0: 600062ef jal x5,800081c0 +80001bc4: 80001bb4 .word 0x80001bb4 +80001bc8: 8001005e .word 0x8001005e +80001bcc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x80000000 +80001bd0: 000ba683 lw x13,0(x23) +80001bd4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000002 +80001bd8: 000baf83 lw x31,0(x23) +80001bdc: 004b8b93 addi x23,x23,4 + +80001be0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + aes32esmi x12, x13, x31, 0 # perform operation +80001be0: 27f68633 aes32esmi x12,x13,x31,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be4: 0001a203 lw x4,0(x3) +80001be8: 00c20863 beq x4,x12,80001bf8 +80001bec: 5d4062ef jal x5,800081c0 +80001bf0: 80001be0 .word 0x80001be0 +80001bf4: 800100bb .word 0x800100bb +80001bf8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x80000000 +80001bfc: 000ba983 lw x19,0(x23) +80001c00: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x80000000 +80001c04: 000ba303 lw x6,0(x23) +80001c08: 004b8b93 addi x23,x23,4 + +80001c0c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + aes32esmi x26, x19, x6, 2 # perform operation +80001c0c: a6698d33 aes32esmi x26,x19,x6,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c10: 0001a203 lw x4,0(x3) +80001c14: 01a20863 beq x4,x26,80001c24 +80001c18: 5a8062ef jal x5,800081c0 +80001c1c: 80001c0c .word 0x80001c0c +80001c20: 80010118 .word 0x80010118 +80001c24: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x80000000 +80001c28: 000ba083 lw x1,0(x23) +80001c2c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x80000001 +80001c30: 000bac83 lw x25,0(x23) +80001c34: 004b8b93 addi x23,x23,4 + +80001c38 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + aes32esmi x30, x1, x25, 1 # perform operation +80001c38: 67908f33 aes32esmi x30,x1,x25,0x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c3c: 0001a203 lw x4,0(x3) +80001c40: 01e20863 beq x4,x30,80001c50 +80001c44: 57c062ef jal x5,800081c0 +80001c48: 80001c38 .word 0x80001c38 +80001c4c: 8001017c .word 0x8001017c +80001c50: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x80000000 +80001c54: 000ba883 lw x17,0(x23) +80001c58: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x7fffffff +80001c5c: 000ba303 lw x6,0(x23) +80001c60: 004b8b93 addi x23,x23,4 + +80001c64 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + aes32esmi x30, x17, x6, 2 # perform operation +80001c64: a6688f33 aes32esmi x30,x17,x6,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c68: 0001a203 lw x4,0(x3) +80001c6c: 01e20863 beq x4,x30,80001c7c +80001c70: 550062ef jal x5,800081c0 +80001c74: 80001c64 .word 0x80001c64 +80001c78: 800101e0 .word 0x800101e0 +80001c7c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x80000000 +80001c80: 000ba903 lw x18,0(x23) +80001c84: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7ffffffe +80001c88: 000ba883 lw x17,0(x23) +80001c8c: 004b8b93 addi x23,x23,4 + +80001c90 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + aes32esmi x30, x18, x17, 0 # perform operation +80001c90: 27190f33 aes32esmi x30,x18,x17,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c94: 0001a203 lw x4,0(x3) +80001c98: 01e20863 beq x4,x30,80001ca8 +80001c9c: 524062ef jal x5,800081c0 +80001ca0: 80001c90 .word 0x80001c90 +80001ca4: 80010244 .word 0x80010244 +80001ca8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x80000000 +80001cac: 000baa03 lw x20,0(x23) +80001cb0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xffffffff +80001cb4: 000ba983 lw x19,0(x23) +80001cb8: 004b8b93 addi x23,x23,4 + +80001cbc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + aes32esmi x13, x20, x19, 1 # perform operation +80001cbc: 673a06b3 aes32esmi x13,x20,x19,0x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc0: 0001a203 lw x4,0(x3) +80001cc4: 00d20863 beq x4,x13,80001cd4 +80001cc8: 4f8062ef jal x5,800081c0 +80001ccc: 80001cbc .word 0x80001cbc +80001cd0: 800102a8 .word 0x800102a8 +80001cd4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x80000000 +80001cd8: 000ba603 lw x12,0(x23) +80001cdc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xfffffffe +80001ce0: 000ba803 lw x16,0(x23) +80001ce4: 004b8b93 addi x23,x23,4 + +80001ce8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + aes32esmi x17, x12, x16, 1 # perform operation +80001ce8: 670608b3 aes32esmi x17,x12,x16,0x1 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cec: 0001a203 lw x4,0(x3) +80001cf0: 01120863 beq x4,x17,80001d00 +80001cf4: 4cc062ef jal x5,800081c0 +80001cf8: 80001ce8 .word 0x80001ce8 +80001cfc: 8001030c .word 0x8001030c +80001d00: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x80000000 +80001d04: 000ba383 lw x7,0(x23) +80001d08: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x5bbc8872 +80001d0c: 000ba483 lw x9,0(x23) +80001d10: 004b8b93 addi x23,x23,4 + +80001d14 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + aes32esmi x13, x7, x9, 2 # perform operation +80001d14: a69386b3 aes32esmi x13,x7,x9,0x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d18: 0001a203 lw x4,0(x3) +80001d1c: 00d20863 beq x4,x13,80001d2c +80001d20: 4a0062ef jal x5,800081c0 +80001d24: 80001d14 .word 0x80001d14 +80001d28: 80010370 .word 0x80010370 +80001d2c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x80000000 +80001d30: 000baa03 lw x20,0(x23) +80001d34: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xaaaaaaaa +80001d38: 000ba103 lw x2,0(x23) +80001d3c: 004b8b93 addi x23,x23,4 + +80001d40 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + aes32esmi x28, x20, x2, 2 # perform operation +80001d40: a62a0e33 aes32esmi x28,x20,x2,0x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d44: 0001a203 lw x4,0(x3) +80001d48: 01c20863 beq x4,x28,80001d58 +80001d4c: 474062ef jal x5,800081c0 +80001d50: 80001d40 .word 0x80001d40 +80001d54: 800103d4 .word 0x800103d4 +80001d58: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x80000000 +80001d5c: 000ba903 lw x18,0(x23) +80001d60: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x55555555 +80001d64: 000ba603 lw x12,0(x23) +80001d68: 004b8b93 addi x23,x23,4 + +80001d6c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + aes32esmi x31, x18, x12, 0 # perform operation +80001d6c: 26c90fb3 aes32esmi x31,x18,x12,0x0 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d70: 0001a203 lw x4,0(x3) +80001d74: 01f20863 beq x4,x31,80001d84 +80001d78: 448062ef jal x5,800081c0 +80001d7c: 80001d6c .word 0x80001d6c +80001d80: 80010438 .word 0x80010438 +80001d84: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x80000001 +80001d88: 000ba783 lw x15,0(x23) +80001d8c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x00000000 +80001d90: 000bad03 lw x26,0(x23) +80001d94: 004b8b93 addi x23,x23,4 + +80001d98 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + aes32esmi x12, x15, x26, 3 # perform operation +80001d98: e7a78633 aes32esmi x12,x15,x26,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d9c: 0001a203 lw x4,0(x3) +80001da0: 00c20863 beq x4,x12,80001db0 +80001da4: 41c062ef jal x5,800081c0 +80001da8: 80001d98 .word 0x80001d98 +80001dac: 8001049c .word 0x8001049c +80001db0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x80000001 +80001db4: 000bad03 lw x26,0(x23) +80001db8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x00000001 +80001dbc: 000ba903 lw x18,0(x23) +80001dc0: 004b8b93 addi x23,x23,4 + +80001dc4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + aes32esmi x15, x26, x18, 3 # perform operation +80001dc4: e72d07b3 aes32esmi x15,x26,x18,0x3 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc8: 0001a203 lw x4,0(x3) +80001dcc: 00f20863 beq x4,x15,80001ddc +80001dd0: 3f0062ef jal x5,800081c0 +80001dd4: 80001dc4 .word 0x80001dc4 +80001dd8: 800104f9 .word 0x800104f9 +80001ddc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x80000001 +80001de0: 000bae03 lw x28,0(x23) +80001de4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x00000002 +80001de8: 000ba083 lw x1,0(x23) +80001dec: 004b8b93 addi x23,x23,4 + +80001df0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + aes32esmi x15, x28, x1, 3 # perform operation +80001df0: e61e07b3 aes32esmi x15,x28,x1,0x3 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df4: 0001a203 lw x4,0(x3) +80001df8: 00f20863 beq x4,x15,80001e08 +80001dfc: 3c4062ef jal x5,800081c0 +80001e00: 80001df0 .word 0x80001df0 +80001e04: 80010556 .word 0x80010556 +80001e08: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x80000001 +80001e0c: 000baa83 lw x21,0(x23) +80001e10: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x80000000 +80001e14: 000bac83 lw x25,0(x23) +80001e18: 004b8b93 addi x23,x23,4 + +80001e1c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + aes32esmi x18, x21, x25, 2 # perform operation +80001e1c: a79a8933 aes32esmi x18,x21,x25,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e20: 0001a203 lw x4,0(x3) +80001e24: 01220863 beq x4,x18,80001e34 +80001e28: 398062ef jal x5,800081c0 +80001e2c: 80001e1c .word 0x80001e1c +80001e30: 800105b3 .word 0x800105b3 +80001e34: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x80000001 +80001e38: 000baa03 lw x20,0(x23) +80001e3c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x80000001 +80001e40: 000ba683 lw x13,0(x23) +80001e44: 004b8b93 addi x23,x23,4 + +80001e48 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + aes32esmi x22, x20, x13, 0 # perform operation +80001e48: 26da0b33 aes32esmi x22,x20,x13,0x0 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e4c: 0001a203 lw x4,0(x3) +80001e50: 01620863 beq x4,x22,80001e60 +80001e54: 36c062ef jal x5,800081c0 +80001e58: 80001e48 .word 0x80001e48 +80001e5c: 80010617 .word 0x80010617 +80001e60: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x80000001 +80001e64: 000ba703 lw x14,0(x23) +80001e68: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x7fffffff +80001e6c: 000bae83 lw x29,0(x23) +80001e70: 004b8b93 addi x23,x23,4 + +80001e74 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + aes32esmi x1, x14, x29, 2 # perform operation +80001e74: a7d700b3 aes32esmi x1,x14,x29,0x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e78: 0001a203 lw x4,0(x3) +80001e7c: 00120863 beq x4,x1,80001e8c +80001e80: 340062ef jal x5,800081c0 +80001e84: 80001e74 .word 0x80001e74 +80001e88: 8001067b .word 0x8001067b +80001e8c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x80000001 +80001e90: 000ba583 lw x11,0(x23) +80001e94: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x7ffffffe +80001e98: 000baf83 lw x31,0(x23) +80001e9c: 004b8b93 addi x23,x23,4 + +80001ea0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + aes32esmi x18, x11, x31, 2 # perform operation +80001ea0: a7f58933 aes32esmi x18,x11,x31,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea4: 0001a203 lw x4,0(x3) +80001ea8: 01220863 beq x4,x18,80001eb8 +80001eac: 314062ef jal x5,800081c0 +80001eb0: 80001ea0 .word 0x80001ea0 +80001eb4: 800106df .word 0x800106df +80001eb8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x80000001 +80001ebc: 000bad03 lw x26,0(x23) +80001ec0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xffffffff +80001ec4: 000bac83 lw x25,0(x23) +80001ec8: 004b8b93 addi x23,x23,4 + +80001ecc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + aes32esmi x31, x26, x25, 3 # perform operation +80001ecc: e79d0fb3 aes32esmi x31,x26,x25,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed0: 0001a203 lw x4,0(x3) +80001ed4: 01f20863 beq x4,x31,80001ee4 +80001ed8: 2e8062ef jal x5,800081c0 +80001edc: 80001ecc .word 0x80001ecc +80001ee0: 80010743 .word 0x80010743 +80001ee4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x80000001 +80001ee8: 000ba383 lw x7,0(x23) +80001eec: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xfffffffe +80001ef0: 000bab03 lw x22,0(x23) +80001ef4: 004b8b93 addi x23,x23,4 + +80001ef8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + aes32esmi x8, x7, x22, 0 # perform operation +80001ef8: 27638433 aes32esmi x8,x7,x22,0x0 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001efc: 0001a203 lw x4,0(x3) +80001f00: 00820863 beq x4,x8,80001f10 +80001f04: 2bc062ef jal x5,800081c0 +80001f08: 80001ef8 .word 0x80001ef8 +80001f0c: 800107a7 .word 0x800107a7 +80001f10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x80000001 +80001f14: 000bae03 lw x28,0(x23) +80001f18: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x5bbc8872 +80001f1c: 000ba983 lw x19,0(x23) +80001f20: 004b8b93 addi x23,x23,4 + +80001f24 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + aes32esmi x10, x28, x19, 0 # perform operation +80001f24: 273e0533 aes32esmi x10,x28,x19,0x0 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f28: 0001a203 lw x4,0(x3) +80001f2c: 00a20863 beq x4,x10,80001f3c +80001f30: 290062ef jal x5,800081c0 +80001f34: 80001f24 .word 0x80001f24 +80001f38: 8001080b .word 0x8001080b +80001f3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x80000001 +80001f40: 000ba783 lw x15,0(x23) +80001f44: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xaaaaaaaa +80001f48: 000bac83 lw x25,0(x23) +80001f4c: 004b8b93 addi x23,x23,4 + +80001f50 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + aes32esmi x13, x15, x25, 1 # perform operation +80001f50: 679786b3 aes32esmi x13,x15,x25,0x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f54: 0001a203 lw x4,0(x3) +80001f58: 00d20863 beq x4,x13,80001f68 +80001f5c: 264062ef jal x5,800081c0 +80001f60: 80001f50 .word 0x80001f50 +80001f64: 8001086f .word 0x8001086f +80001f68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x80000001 +80001f6c: 000baa83 lw x21,0(x23) +80001f70: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x55555555 +80001f74: 000bac03 lw x24,0(x23) +80001f78: 004b8b93 addi x23,x23,4 + +80001f7c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + aes32esmi x20, x21, x24, 2 # perform operation +80001f7c: a78a8a33 aes32esmi x20,x21,x24,0x2 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f80: 0001a203 lw x4,0(x3) +80001f84: 01420863 beq x4,x20,80001f94 +80001f88: 238062ef jal x5,800081c0 +80001f8c: 80001f7c .word 0x80001f7c +80001f90: 800108d3 .word 0x800108d3 +80001f94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x7fffffff +80001f98: 000ba083 lw x1,0(x23) +80001f9c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x00000000 +80001fa0: 000baa03 lw x20,0(x23) +80001fa4: 004b8b93 addi x23,x23,4 + +80001fa8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + aes32esmi x24, x1, x20, 3 # perform operation +80001fa8: e7408c33 aes32esmi x24,x1,x20,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fac: 0001a203 lw x4,0(x3) +80001fb0: 01820863 beq x4,x24,80001fc0 +80001fb4: 20c062ef jal x5,800081c0 +80001fb8: 80001fa8 .word 0x80001fa8 +80001fbc: 80010937 .word 0x80010937 +80001fc0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x7fffffff +80001fc4: 000ba503 lw x10,0(x23) +80001fc8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x00000001 +80001fcc: 000ba603 lw x12,0(x23) +80001fd0: 004b8b93 addi x23,x23,4 + +80001fd4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + aes32esmi x16, x10, x12, 0 # perform operation +80001fd4: 26c50833 aes32esmi x16,x10,x12,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd8: 0001a203 lw x4,0(x3) +80001fdc: 01020863 beq x4,x16,80001fec +80001fe0: 1e0062ef jal x5,800081c0 +80001fe4: 80001fd4 .word 0x80001fd4 +80001fe8: 80010994 .word 0x80010994 +80001fec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x7fffffff +80001ff0: 000ba803 lw x16,0(x23) +80001ff4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x00000002 +80001ff8: 000baa83 lw x21,0(x23) +80001ffc: 004b8b93 addi x23,x23,4 + +80002000 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + aes32esmi x15, x16, x21, 1 # perform operation +80002000: 675807b3 aes32esmi x15,x16,x21,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002004: 0001a203 lw x4,0(x3) +80002008: 00f20863 beq x4,x15,80002018 +8000200c: 1b4062ef jal x5,800081c0 +80002010: 80002000 .word 0x80002000 +80002014: 800109f1 .word 0x800109f1 +80002018: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x7fffffff +8000201c: 000bac83 lw x25,0(x23) +80002020: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x80000000 +80002024: 000baa03 lw x20,0(x23) +80002028: 004b8b93 addi x23,x23,4 + +8000202c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + aes32esmi x27, x25, x20, 0 # perform operation +8000202c: 274c8db3 aes32esmi x27,x25,x20,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002030: 0001a203 lw x4,0(x3) +80002034: 01b20863 beq x4,x27,80002044 +80002038: 188062ef jal x5,800081c0 +8000203c: 8000202c .word 0x8000202c +80002040: 80010a4e .word 0x80010a4e +80002044: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x7fffffff +80002048: 000ba703 lw x14,0(x23) +8000204c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x80000001 +80002050: 000ba903 lw x18,0(x23) +80002054: 004b8b93 addi x23,x23,4 + +80002058 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + aes32esmi x15, x14, x18, 2 # perform operation +80002058: a72707b3 aes32esmi x15,x14,x18,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000205c: 0001a203 lw x4,0(x3) +80002060: 00f20863 beq x4,x15,80002070 +80002064: 15c062ef jal x5,800081c0 +80002068: 80002058 .word 0x80002058 +8000206c: 80010ab2 .word 0x80010ab2 +80002070: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x7fffffff +80002074: 000ba583 lw x11,0(x23) +80002078: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x7fffffff +8000207c: 000ba803 lw x16,0(x23) +80002080: 004b8b93 addi x23,x23,4 + +80002084 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + aes32esmi x7, x11, x16, 3 # perform operation +80002084: e70583b3 aes32esmi x7,x11,x16,0x3 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002088: 0001a203 lw x4,0(x3) +8000208c: 00720863 beq x4,x7,8000209c +80002090: 130062ef jal x5,800081c0 +80002094: 80002084 .word 0x80002084 +80002098: 80010b16 .word 0x80010b16 +8000209c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x7fffffff +800020a0: 000baf83 lw x31,0(x23) +800020a4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x7ffffffe +800020a8: 000ba983 lw x19,0(x23) +800020ac: 004b8b93 addi x23,x23,4 + +800020b0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + aes32esmi x28, x31, x19, 1 # perform operation +800020b0: 673f8e33 aes32esmi x28,x31,x19,0x1 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b4: 0001a203 lw x4,0(x3) +800020b8: 01c20863 beq x4,x28,800020c8 +800020bc: 104062ef jal x5,800081c0 +800020c0: 800020b0 .word 0x800020b0 +800020c4: 80010b7a .word 0x80010b7a +800020c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x7fffffff +800020cc: 000ba883 lw x17,0(x23) +800020d0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xffffffff +800020d4: 000bac03 lw x24,0(x23) +800020d8: 004b8b93 addi x23,x23,4 + +800020dc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + aes32esmi x11, x17, x24, 2 # perform operation +800020dc: a78885b3 aes32esmi x11,x17,x24,0x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e0: 0001a203 lw x4,0(x3) +800020e4: 00b20863 beq x4,x11,800020f4 +800020e8: 0d8062ef jal x5,800081c0 +800020ec: 800020dc .word 0x800020dc +800020f0: 80010bde .word 0x80010bde +800020f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x7fffffff +800020f8: 000ba103 lw x2,0(x23) +800020fc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xfffffffe +80002100: 000ba703 lw x14,0(x23) +80002104: 004b8b93 addi x23,x23,4 + +80002108 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + aes32esmi x25, x2, x14, 2 # perform operation +80002108: a6e10cb3 aes32esmi x25,x2,x14,0x2 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000210c: 0001a203 lw x4,0(x3) +80002110: 01920863 beq x4,x25,80002120 +80002114: 0ac062ef jal x5,800081c0 +80002118: 80002108 .word 0x80002108 +8000211c: 80010c42 .word 0x80010c42 +80002120: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x7fffffff +80002124: 000bae83 lw x29,0(x23) +80002128: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x5bbc8872 +8000212c: 000ba903 lw x18,0(x23) +80002130: 004b8b93 addi x23,x23,4 + +80002134 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + aes32esmi x14, x29, x18, 0 # perform operation +80002134: 272e8733 aes32esmi x14,x29,x18,0x0 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002138: 0001a203 lw x4,0(x3) +8000213c: 00e20863 beq x4,x14,8000214c +80002140: 080062ef jal x5,800081c0 +80002144: 80002134 .word 0x80002134 +80002148: 80010ca6 .word 0x80010ca6 +8000214c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x7fffffff +80002150: 000bae03 lw x28,0(x23) +80002154: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xaaaaaaaa +80002158: 000ba703 lw x14,0(x23) +8000215c: 004b8b93 addi x23,x23,4 + +80002160 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + aes32esmi x30, x28, x14, 2 # perform operation +80002160: a6ee0f33 aes32esmi x30,x28,x14,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002164: 0001a203 lw x4,0(x3) +80002168: 01e20863 beq x4,x30,80002178 +8000216c: 054062ef jal x5,800081c0 +80002170: 80002160 .word 0x80002160 +80002174: 80010d0a .word 0x80010d0a +80002178: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x7fffffff +8000217c: 000ba903 lw x18,0(x23) +80002180: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x55555555 +80002184: 000ba303 lw x6,0(x23) +80002188: 004b8b93 addi x23,x23,4 + +8000218c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + aes32esmi x26, x18, x6, 2 # perform operation +8000218c: a6690d33 aes32esmi x26,x18,x6,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002190: 0001a203 lw x4,0(x3) +80002194: 01a20863 beq x4,x26,800021a4 +80002198: 028062ef jal x5,800081c0 +8000219c: 8000218c .word 0x8000218c +800021a0: 80010d6e .word 0x80010d6e +800021a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x7ffffffe +800021a8: 000bad83 lw x27,0(x23) +800021ac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x00000000 +800021b0: 000baa83 lw x21,0(x23) +800021b4: 004b8b93 addi x23,x23,4 + +800021b8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + aes32esmi x16, x27, x21, 3 # perform operation +800021b8: e75d8833 aes32esmi x16,x27,x21,0x3 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021bc: 0001a203 lw x4,0(x3) +800021c0: 01020863 beq x4,x16,800021d0 +800021c4: 7fd052ef jal x5,800081c0 +800021c8: 800021b8 .word 0x800021b8 +800021cc: 80010dd2 .word 0x80010dd2 +800021d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x7ffffffe +800021d4: 000ba683 lw x13,0(x23) +800021d8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x00000001 +800021dc: 000ba403 lw x8,0(x23) +800021e0: 004b8b93 addi x23,x23,4 + +800021e4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + aes32esmi x20, x13, x8, 1 # perform operation +800021e4: 66868a33 aes32esmi x20,x13,x8,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e8: 0001a203 lw x4,0(x3) +800021ec: 01420863 beq x4,x20,800021fc +800021f0: 7d1052ef jal x5,800081c0 +800021f4: 800021e4 .word 0x800021e4 +800021f8: 80010e2f .word 0x80010e2f +800021fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x7ffffffe +80002200: 000ba883 lw x17,0(x23) +80002204: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x00000002 +80002208: 000bac83 lw x25,0(x23) +8000220c: 004b8b93 addi x23,x23,4 + +80002210 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + aes32esmi x12, x17, x25, 0 # perform operation +80002210: 27988633 aes32esmi x12,x17,x25,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002214: 0001a203 lw x4,0(x3) +80002218: 00c20863 beq x4,x12,80002228 +8000221c: 7a5052ef jal x5,800081c0 +80002220: 80002210 .word 0x80002210 +80002224: 80010e8c .word 0x80010e8c +80002228: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x7ffffffe +8000222c: 000bae03 lw x28,0(x23) +80002230: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x80000000 +80002234: 000ba783 lw x15,0(x23) +80002238: 004b8b93 addi x23,x23,4 + +8000223c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + aes32esmi x2, x28, x15, 0 # perform operation +8000223c: 26fe0133 aes32esmi x2,x28,x15,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002240: 0001a203 lw x4,0(x3) +80002244: 00220863 beq x4,x2,80002254 +80002248: 779052ef jal x5,800081c0 +8000224c: 8000223c .word 0x8000223c +80002250: 80010ee9 .word 0x80010ee9 +80002254: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x7ffffffe +80002258: 000ba983 lw x19,0(x23) +8000225c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x80000001 +80002260: 000ba083 lw x1,0(x23) +80002264: 004b8b93 addi x23,x23,4 + +80002268 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + aes32esmi x14, x19, x1, 0 # perform operation +80002268: 26198733 aes32esmi x14,x19,x1,0x0 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000226c: 0001a203 lw x4,0(x3) +80002270: 00e20863 beq x4,x14,80002280 +80002274: 74d052ef jal x5,800081c0 +80002278: 80002268 .word 0x80002268 +8000227c: 80010f4d .word 0x80010f4d +80002280: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x7ffffffe +80002284: 000baa03 lw x20,0(x23) +80002288: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x7fffffff +8000228c: 000bac03 lw x24,0(x23) +80002290: 004b8b93 addi x23,x23,4 + +80002294 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + aes32esmi x30, x20, x24, 0 # perform operation +80002294: 278a0f33 aes32esmi x30,x20,x24,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002298: 0001a203 lw x4,0(x3) +8000229c: 01e20863 beq x4,x30,800022ac +800022a0: 721052ef jal x5,800081c0 +800022a4: 80002294 .word 0x80002294 +800022a8: 80010fb1 .word 0x80010fb1 +800022ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x7ffffffe +800022b0: 000baa83 lw x21,0(x23) +800022b4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x7ffffffe +800022b8: 000bac03 lw x24,0(x23) +800022bc: 004b8b93 addi x23,x23,4 + +800022c0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + aes32esmi x31, x21, x24, 2 # perform operation +800022c0: a78a8fb3 aes32esmi x31,x21,x24,0x2 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c4: 0001a203 lw x4,0(x3) +800022c8: 01f20863 beq x4,x31,800022d8 +800022cc: 6f5052ef jal x5,800081c0 +800022d0: 800022c0 .word 0x800022c0 +800022d4: 80011015 .word 0x80011015 +800022d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x7ffffffe +800022dc: 000bab03 lw x22,0(x23) +800022e0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xffffffff +800022e4: 000ba803 lw x16,0(x23) +800022e8: 004b8b93 addi x23,x23,4 + +800022ec : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + aes32esmi x14, x22, x16, 1 # perform operation +800022ec: 670b0733 aes32esmi x14,x22,x16,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f0: 0001a203 lw x4,0(x3) +800022f4: 00e20863 beq x4,x14,80002304 +800022f8: 6c9052ef jal x5,800081c0 +800022fc: 800022ec .word 0x800022ec +80002300: 80011079 .word 0x80011079 +80002304: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x7ffffffe +80002308: 000ba683 lw x13,0(x23) +8000230c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xfffffffe +80002310: 000bab03 lw x22,0(x23) +80002314: 004b8b93 addi x23,x23,4 + +80002318 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + aes32esmi x24, x13, x22, 3 # perform operation +80002318: e7668c33 aes32esmi x24,x13,x22,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000231c: 0001a203 lw x4,0(x3) +80002320: 01820863 beq x4,x24,80002330 +80002324: 69d052ef jal x5,800081c0 +80002328: 80002318 .word 0x80002318 +8000232c: 800110dd .word 0x800110dd +80002330: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x7ffffffe +80002334: 000ba303 lw x6,0(x23) +80002338: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x5bbc8872 +8000233c: 000bac03 lw x24,0(x23) +80002340: 004b8b93 addi x23,x23,4 + +80002344 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + aes32esmi x25, x6, x24, 3 # perform operation +80002344: e7830cb3 aes32esmi x25,x6,x24,0x3 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002348: 0001a203 lw x4,0(x3) +8000234c: 01920863 beq x4,x25,8000235c +80002350: 671052ef jal x5,800081c0 +80002354: 80002344 .word 0x80002344 +80002358: 80011141 .word 0x80011141 +8000235c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x7ffffffe +80002360: 000ba683 lw x13,0(x23) +80002364: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0xaaaaaaaa +80002368: 000baf03 lw x30,0(x23) +8000236c: 004b8b93 addi x23,x23,4 + +80002370 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + aes32esmi x8, x13, x30, 3 # perform operation +80002370: e7e68433 aes32esmi x8,x13,x30,0x3 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002374: 0001a203 lw x4,0(x3) +80002378: 00820863 beq x4,x8,80002388 +8000237c: 645052ef jal x5,800081c0 +80002380: 80002370 .word 0x80002370 +80002384: 800111a5 .word 0x800111a5 +80002388: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x7ffffffe +8000238c: 000baa83 lw x21,0(x23) +80002390: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x55555555 +80002394: 000ba683 lw x13,0(x23) +80002398: 004b8b93 addi x23,x23,4 + +8000239c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + aes32esmi x14, x21, x13, 2 # perform operation +8000239c: a6da8733 aes32esmi x14,x21,x13,0x2 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a0: 0001a203 lw x4,0(x3) +800023a4: 00e20863 beq x4,x14,800023b4 +800023a8: 619052ef jal x5,800081c0 +800023ac: 8000239c .word 0x8000239c +800023b0: 80011209 .word 0x80011209 +800023b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xffffffff +800023b8: 000bae03 lw x28,0(x23) +800023bc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x00000000 +800023c0: 000ba503 lw x10,0(x23) +800023c4: 004b8b93 addi x23,x23,4 + +800023c8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes32esmi x15, x28, x10, 2 # perform operation +800023c8: a6ae07b3 aes32esmi x15,x28,x10,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023cc: 0001a203 lw x4,0(x3) +800023d0: 00f20863 beq x4,x15,800023e0 +800023d4: 5ed052ef jal x5,800081c0 +800023d8: 800023c8 .word 0x800023c8 +800023dc: 8001126d .word 0x8001126d +800023e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xffffffff +800023e4: 000baf83 lw x31,0(x23) +800023e8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x00000001 +800023ec: 000bad83 lw x27,0(x23) +800023f0: 004b8b93 addi x23,x23,4 + +800023f4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes32esmi x1, x31, x27, 1 # perform operation +800023f4: 67bf80b3 aes32esmi x1,x31,x27,0x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f8: 0001a203 lw x4,0(x3) +800023fc: 00120863 beq x4,x1,8000240c +80002400: 5c1052ef jal x5,800081c0 +80002404: 800023f4 .word 0x800023f4 +80002408: 800112ca .word 0x800112ca +8000240c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xffffffff +80002410: 000ba103 lw x2,0(x23) +80002414: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x00000002 +80002418: 000bab03 lw x22,0(x23) +8000241c: 004b8b93 addi x23,x23,4 + +80002420 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes32esmi x6, x2, x22, 3 # perform operation +80002420: e7610333 aes32esmi x6,x2,x22,0x3 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002424: 0001a203 lw x4,0(x3) +80002428: 00620863 beq x4,x6,80002438 +8000242c: 595052ef jal x5,800081c0 +80002430: 80002420 .word 0x80002420 +80002434: 80011327 .word 0x80011327 +80002438: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xffffffff +8000243c: 000baf83 lw x31,0(x23) +80002440: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x80000000 +80002444: 000baf03 lw x30,0(x23) +80002448: 004b8b93 addi x23,x23,4 + +8000244c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + aes32esmi x15, x31, x30, 0 # perform operation +8000244c: 27ef87b3 aes32esmi x15,x31,x30,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002450: 0001a203 lw x4,0(x3) +80002454: 00f20863 beq x4,x15,80002464 +80002458: 569052ef jal x5,800081c0 +8000245c: 8000244c .word 0x8000244c +80002460: 80011384 .word 0x80011384 +80002464: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xffffffff +80002468: 000baa03 lw x20,0(x23) +8000246c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x80000001 +80002470: 000ba603 lw x12,0(x23) +80002474: 004b8b93 addi x23,x23,4 + +80002478 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + aes32esmi x29, x20, x12, 2 # perform operation +80002478: a6ca0eb3 aes32esmi x29,x20,x12,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000247c: 0001a203 lw x4,0(x3) +80002480: 01d20863 beq x4,x29,80002490 +80002484: 53d052ef jal x5,800081c0 +80002488: 80002478 .word 0x80002478 +8000248c: 800113e8 .word 0x800113e8 +80002490: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xffffffff +80002494: 000ba703 lw x14,0(x23) +80002498: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x7fffffff +8000249c: 000ba103 lw x2,0(x23) +800024a0: 004b8b93 addi x23,x23,4 + +800024a4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + aes32esmi x24, x14, x2, 3 # perform operation +800024a4: e6270c33 aes32esmi x24,x14,x2,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a8: 0001a203 lw x4,0(x3) +800024ac: 01820863 beq x4,x24,800024bc +800024b0: 511052ef jal x5,800081c0 +800024b4: 800024a4 .word 0x800024a4 +800024b8: 8001144c .word 0x8001144c +800024bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xffffffff +800024c0: 000ba903 lw x18,0(x23) +800024c4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x7ffffffe +800024c8: 000bad83 lw x27,0(x23) +800024cc: 004b8b93 addi x23,x23,4 + +800024d0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + aes32esmi x16, x18, x27, 3 # perform operation +800024d0: e7b90833 aes32esmi x16,x18,x27,0x3 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d4: 0001a203 lw x4,0(x3) +800024d8: 01020863 beq x4,x16,800024e8 +800024dc: 4e5052ef jal x5,800081c0 +800024e0: 800024d0 .word 0x800024d0 +800024e4: 800114b0 .word 0x800114b0 +800024e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xffffffff +800024ec: 000bae83 lw x29,0(x23) +800024f0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xffffffff +800024f4: 000ba083 lw x1,0(x23) +800024f8: 004b8b93 addi x23,x23,4 + +800024fc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes32esmi x21, x29, x1, 3 # perform operation +800024fc: e61e8ab3 aes32esmi x21,x29,x1,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002500: 0001a203 lw x4,0(x3) +80002504: 01520863 beq x4,x21,80002514 +80002508: 4b9052ef jal x5,800081c0 +8000250c: 800024fc .word 0x800024fc +80002510: 80011514 .word 0x80011514 +80002514: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xffffffff +80002518: 000bac03 lw x24,0(x23) +8000251c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0xfffffffe +80002520: 000baf03 lw x30,0(x23) +80002524: 004b8b93 addi x23,x23,4 + +80002528 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes32esmi x2, x24, x30, 1 # perform operation +80002528: 67ec0133 aes32esmi x2,x24,x30,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000252c: 0001a203 lw x4,0(x3) +80002530: 00220863 beq x4,x2,80002540 +80002534: 48d052ef jal x5,800081c0 +80002538: 80002528 .word 0x80002528 +8000253c: 80011578 .word 0x80011578 +80002540: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xffffffff +80002544: 000bac83 lw x25,0(x23) +80002548: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x5bbc8872 +8000254c: 000ba883 lw x17,0(x23) +80002550: 004b8b93 addi x23,x23,4 + +80002554 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + aes32esmi x24, x25, x17, 1 # perform operation +80002554: 671c8c33 aes32esmi x24,x25,x17,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002558: 0001a203 lw x4,0(x3) +8000255c: 01820863 beq x4,x24,8000256c +80002560: 461052ef jal x5,800081c0 +80002564: 80002554 .word 0x80002554 +80002568: 800115dc .word 0x800115dc +8000256c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xffffffff +80002570: 000ba483 lw x9,0(x23) +80002574: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xaaaaaaaa +80002578: 000ba583 lw x11,0(x23) +8000257c: 004b8b93 addi x23,x23,4 + +80002580 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + aes32esmi x24, x9, x11, 1 # perform operation +80002580: 66b48c33 aes32esmi x24,x9,x11,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002584: 0001a203 lw x4,0(x3) +80002588: 01820863 beq x4,x24,80002598 +8000258c: 435052ef jal x5,800081c0 +80002590: 80002580 .word 0x80002580 +80002594: 80011640 .word 0x80011640 +80002598: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xffffffff +8000259c: 000ba403 lw x8,0(x23) +800025a0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x55555555 +800025a4: 000ba603 lw x12,0(x23) +800025a8: 004b8b93 addi x23,x23,4 + +800025ac : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + aes32esmi x7, x8, x12, 2 # perform operation +800025ac: a6c403b3 aes32esmi x7,x8,x12,0x2 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b0: 0001a203 lw x4,0(x3) +800025b4: 00720863 beq x4,x7,800025c4 +800025b8: 409052ef jal x5,800081c0 +800025bc: 800025ac .word 0x800025ac +800025c0: 800116a4 .word 0x800116a4 +800025c4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xfffffffe +800025c8: 000bae03 lw x28,0(x23) +800025cc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x00000000 +800025d0: 000ba983 lw x19,0(x23) +800025d4: 004b8b93 addi x23,x23,4 + +800025d8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes32esmi x26, x28, x19, 0 # perform operation +800025d8: 273e0d33 aes32esmi x26,x28,x19,0x0 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025dc: 0001a203 lw x4,0(x3) +800025e0: 01a20863 beq x4,x26,800025f0 +800025e4: 3dd052ef jal x5,800081c0 +800025e8: 800025d8 .word 0x800025d8 +800025ec: 80011708 .word 0x80011708 +800025f0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xfffffffe +800025f4: 000bae83 lw x29,0(x23) +800025f8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x00000001 +800025fc: 000bad83 lw x27,0(x23) +80002600: 004b8b93 addi x23,x23,4 + +80002604 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes32esmi x15, x29, x27, 0 # perform operation +80002604: 27be87b3 aes32esmi x15,x29,x27,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002608: 0001a203 lw x4,0(x3) +8000260c: 00f20863 beq x4,x15,8000261c +80002610: 3b1052ef jal x5,800081c0 +80002614: 80002604 .word 0x80002604 +80002618: 80011765 .word 0x80011765 +8000261c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xfffffffe +80002620: 000ba883 lw x17,0(x23) +80002624: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x00000002 +80002628: 000ba583 lw x11,0(x23) +8000262c: 004b8b93 addi x23,x23,4 + +80002630 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes32esmi x29, x17, x11, 2 # perform operation +80002630: a6b88eb3 aes32esmi x29,x17,x11,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002634: 0001a203 lw x4,0(x3) +80002638: 01d20863 beq x4,x29,80002648 +8000263c: 385052ef jal x5,800081c0 +80002640: 80002630 .word 0x80002630 +80002644: 800117c2 .word 0x800117c2 +80002648: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xfffffffe +8000264c: 000baf83 lw x31,0(x23) +80002650: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x80000000 +80002654: 000baa03 lw x20,0(x23) +80002658: 004b8b93 addi x23,x23,4 + +8000265c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + aes32esmi x11, x31, x20, 3 # perform operation +8000265c: e74f85b3 aes32esmi x11,x31,x20,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002660: 0001a203 lw x4,0(x3) +80002664: 00b20863 beq x4,x11,80002674 +80002668: 359052ef jal x5,800081c0 +8000266c: 8000265c .word 0x8000265c +80002670: 8001181f .word 0x8001181f +80002674: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xfffffffe +80002678: 000ba483 lw x9,0(x23) +8000267c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x80000001 +80002680: 000baf03 lw x30,0(x23) +80002684: 004b8b93 addi x23,x23,4 + +80002688 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + aes32esmi x21, x9, x30, 2 # perform operation +80002688: a7e48ab3 aes32esmi x21,x9,x30,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000268c: 0001a203 lw x4,0(x3) +80002690: 01520863 beq x4,x21,800026a0 +80002694: 32d052ef jal x5,800081c0 +80002698: 80002688 .word 0x80002688 +8000269c: 80011883 .word 0x80011883 +800026a0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xfffffffe +800026a4: 000bae83 lw x29,0(x23) +800026a8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x7fffffff +800026ac: 000ba603 lw x12,0(x23) +800026b0: 004b8b93 addi x23,x23,4 + +800026b4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + aes32esmi x31, x29, x12, 3 # perform operation +800026b4: e6ce8fb3 aes32esmi x31,x29,x12,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b8: 0001a203 lw x4,0(x3) +800026bc: 01f20863 beq x4,x31,800026cc +800026c0: 301052ef jal x5,800081c0 +800026c4: 800026b4 .word 0x800026b4 +800026c8: 800118e7 .word 0x800118e7 +800026cc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xfffffffe +800026d0: 000ba583 lw x11,0(x23) +800026d4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x7ffffffe +800026d8: 000bac83 lw x25,0(x23) +800026dc: 004b8b93 addi x23,x23,4 + +800026e0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + aes32esmi x6, x11, x25, 2 # perform operation +800026e0: a7958333 aes32esmi x6,x11,x25,0x2 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e4: 0001a203 lw x4,0(x3) +800026e8: 00620863 beq x4,x6,800026f8 +800026ec: 2d5052ef jal x5,800081c0 +800026f0: 800026e0 .word 0x800026e0 +800026f4: 8001194b .word 0x8001194b +800026f8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xfffffffe +800026fc: 000bae83 lw x29,0(x23) +80002700: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xffffffff +80002704: 000ba583 lw x11,0(x23) +80002708: 004b8b93 addi x23,x23,4 + +8000270c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes32esmi x6, x29, x11, 0 # perform operation +8000270c: 26be8333 aes32esmi x6,x29,x11,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002710: 0001a203 lw x4,0(x3) +80002714: 00620863 beq x4,x6,80002724 +80002718: 2a9052ef jal x5,800081c0 +8000271c: 8000270c .word 0x8000270c +80002720: 800119af .word 0x800119af +80002724: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xfffffffe +80002728: 000ba103 lw x2,0(x23) +8000272c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xfffffffe +80002730: 000bac03 lw x24,0(x23) +80002734: 004b8b93 addi x23,x23,4 + +80002738 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes32esmi x22, x2, x24, 2 # perform operation +80002738: a7810b33 aes32esmi x22,x2,x24,0x2 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000273c: 0001a203 lw x4,0(x3) +80002740: 01620863 beq x4,x22,80002750 +80002744: 27d052ef jal x5,800081c0 +80002748: 80002738 .word 0x80002738 +8000274c: 80011a13 .word 0x80011a13 +80002750: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xfffffffe +80002754: 000baf03 lw x30,0(x23) +80002758: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x5bbc8872 +8000275c: 000ba583 lw x11,0(x23) +80002760: 004b8b93 addi x23,x23,4 + +80002764 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + aes32esmi x14, x30, x11, 3 # perform operation +80002764: e6bf0733 aes32esmi x14,x30,x11,0x3 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002768: 0001a203 lw x4,0(x3) +8000276c: 00e20863 beq x4,x14,8000277c +80002770: 251052ef jal x5,800081c0 +80002774: 80002764 .word 0x80002764 +80002778: 80011a77 .word 0x80011a77 +8000277c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xfffffffe +80002780: 000ba403 lw x8,0(x23) +80002784: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xaaaaaaaa +80002788: 000ba703 lw x14,0(x23) +8000278c: 004b8b93 addi x23,x23,4 + +80002790 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + aes32esmi x1, x8, x14, 2 # perform operation +80002790: a6e400b3 aes32esmi x1,x8,x14,0x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002794: 0001a203 lw x4,0(x3) +80002798: 00120863 beq x4,x1,800027a8 +8000279c: 225052ef jal x5,800081c0 +800027a0: 80002790 .word 0x80002790 +800027a4: 80011adb .word 0x80011adb +800027a8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xfffffffe +800027ac: 000bae03 lw x28,0(x23) +800027b0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x55555555 +800027b4: 000ba683 lw x13,0(x23) +800027b8: 004b8b93 addi x23,x23,4 + +800027bc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + aes32esmi x24, x28, x13, 3 # perform operation +800027bc: e6de0c33 aes32esmi x24,x28,x13,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c0: 0001a203 lw x4,0(x3) +800027c4: 01820863 beq x4,x24,800027d4 +800027c8: 1f9052ef jal x5,800081c0 +800027cc: 800027bc .word 0x800027bc +800027d0: 80011b3f .word 0x80011b3f +800027d4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x5bbc8872 +800027d8: 000ba383 lw x7,0(x23) +800027dc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x00000000 +800027e0: 000ba883 lw x17,0(x23) +800027e4: 004b8b93 addi x23,x23,4 + +800027e8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + aes32esmi x27, x7, x17, 1 # perform operation +800027e8: 67138db3 aes32esmi x27,x7,x17,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027ec: 0001a203 lw x4,0(x3) +800027f0: 01b20863 beq x4,x27,80002800 +800027f4: 1cd052ef jal x5,800081c0 +800027f8: 800027e8 .word 0x800027e8 +800027fc: 80011ba3 .word 0x80011ba3 +80002800: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x5bbc8872 +80002804: 000ba803 lw x16,0(x23) +80002808: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x00000001 +8000280c: 000ba403 lw x8,0(x23) +80002810: 004b8b93 addi x23,x23,4 + +80002814 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + aes32esmi x17, x16, x8, 1 # perform operation +80002814: 668808b3 aes32esmi x17,x16,x8,0x1 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002818: 0001a203 lw x4,0(x3) +8000281c: 01120863 beq x4,x17,8000282c +80002820: 1a1052ef jal x5,800081c0 +80002824: 80002814 .word 0x80002814 +80002828: 80011c00 .word 0x80011c00 +8000282c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x5bbc8872 +80002830: 000ba783 lw x15,0(x23) +80002834: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x00000002 +80002838: 000ba683 lw x13,0(x23) +8000283c: 004b8b93 addi x23,x23,4 + +80002840 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + aes32esmi x30, x15, x13, 0 # perform operation +80002840: 26d78f33 aes32esmi x30,x15,x13,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002844: 0001a203 lw x4,0(x3) +80002848: 01e20863 beq x4,x30,80002858 +8000284c: 175052ef jal x5,800081c0 +80002850: 80002840 .word 0x80002840 +80002854: 80011c5d .word 0x80011c5d +80002858: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x5bbc8872 +8000285c: 000baf83 lw x31,0(x23) +80002860: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x80000000 +80002864: 000ba983 lw x19,0(x23) +80002868: 004b8b93 addi x23,x23,4 + +8000286c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + aes32esmi x16, x31, x19, 3 # perform operation +8000286c: e73f8833 aes32esmi x16,x31,x19,0x3 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002870: 0001a203 lw x4,0(x3) +80002874: 01020863 beq x4,x16,80002884 +80002878: 149052ef jal x5,800081c0 +8000287c: 8000286c .word 0x8000286c +80002880: 80011cba .word 0x80011cba +80002884: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x5bbc8872 +80002888: 000ba083 lw x1,0(x23) +8000288c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x80000001 +80002890: 000ba803 lw x16,0(x23) +80002894: 004b8b93 addi x23,x23,4 + +80002898 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + aes32esmi x14, x1, x16, 1 # perform operation +80002898: 67008733 aes32esmi x14,x1,x16,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000289c: 0001a203 lw x4,0(x3) +800028a0: 00e20863 beq x4,x14,800028b0 +800028a4: 11d052ef jal x5,800081c0 +800028a8: 80002898 .word 0x80002898 +800028ac: 80011d1e .word 0x80011d1e +800028b0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x5bbc8872 +800028b4: 000ba783 lw x15,0(x23) +800028b8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x7fffffff +800028bc: 000bab03 lw x22,0(x23) +800028c0: 004b8b93 addi x23,x23,4 + +800028c4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + aes32esmi x6, x15, x22, 2 # perform operation +800028c4: a7678333 aes32esmi x6,x15,x22,0x2 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c8: 0001a203 lw x4,0(x3) +800028cc: 00620863 beq x4,x6,800028dc +800028d0: 0f1052ef jal x5,800081c0 +800028d4: 800028c4 .word 0x800028c4 +800028d8: 80011d82 .word 0x80011d82 +800028dc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x5bbc8872 +800028e0: 000ba503 lw x10,0(x23) +800028e4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x7ffffffe +800028e8: 000ba403 lw x8,0(x23) +800028ec: 004b8b93 addi x23,x23,4 + +800028f0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + aes32esmi x16, x10, x8, 2 # perform operation +800028f0: a6850833 aes32esmi x16,x10,x8,0x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f4: 0001a203 lw x4,0(x3) +800028f8: 01020863 beq x4,x16,80002908 +800028fc: 0c5052ef jal x5,800081c0 +80002900: 800028f0 .word 0x800028f0 +80002904: 80011de6 .word 0x80011de6 +80002908: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x5bbc8872 +8000290c: 000ba883 lw x17,0(x23) +80002910: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xffffffff +80002914: 000bac03 lw x24,0(x23) +80002918: 004b8b93 addi x23,x23,4 + +8000291c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + aes32esmi x19, x17, x24, 3 # perform operation +8000291c: e78889b3 aes32esmi x19,x17,x24,0x3 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002920: 0001a203 lw x4,0(x3) +80002924: 01320863 beq x4,x19,80002934 +80002928: 099052ef jal x5,800081c0 +8000292c: 8000291c .word 0x8000291c +80002930: 80011e4a .word 0x80011e4a +80002934: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x5bbc8872 +80002938: 000ba683 lw x13,0(x23) +8000293c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xfffffffe +80002940: 000bad03 lw x26,0(x23) +80002944: 004b8b93 addi x23,x23,4 + +80002948 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + aes32esmi x25, x13, x26, 0 # perform operation +80002948: 27a68cb3 aes32esmi x25,x13,x26,0x0 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000294c: 0001a203 lw x4,0(x3) +80002950: 01920863 beq x4,x25,80002960 +80002954: 06d052ef jal x5,800081c0 +80002958: 80002948 .word 0x80002948 +8000295c: 80011eae .word 0x80011eae +80002960: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x5bbc8872 +80002964: 000bae03 lw x28,0(x23) +80002968: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x5bbc8872 +8000296c: 000bae83 lw x29,0(x23) +80002970: 004b8b93 addi x23,x23,4 + +80002974 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + aes32esmi x16, x28, x29, 1 # perform operation +80002974: 67de0833 aes32esmi x16,x28,x29,0x1 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002978: 0001a203 lw x4,0(x3) +8000297c: 01020863 beq x4,x16,8000298c +80002980: 041052ef jal x5,800081c0 +80002984: 80002974 .word 0x80002974 +80002988: 80011f12 .word 0x80011f12 +8000298c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x5bbc8872 +80002990: 000ba683 lw x13,0(x23) +80002994: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xaaaaaaaa +80002998: 000ba883 lw x17,0(x23) +8000299c: 004b8b93 addi x23,x23,4 + +800029a0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + aes32esmi x15, x13, x17, 0 # perform operation +800029a0: 271687b3 aes32esmi x15,x13,x17,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a4: 0001a203 lw x4,0(x3) +800029a8: 00f20863 beq x4,x15,800029b8 +800029ac: 015052ef jal x5,800081c0 +800029b0: 800029a0 .word 0x800029a0 +800029b4: 80011f76 .word 0x80011f76 +800029b8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x5bbc8872 +800029bc: 000ba903 lw x18,0(x23) +800029c0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x55555555 +800029c4: 000bad83 lw x27,0(x23) +800029c8: 004b8b93 addi x23,x23,4 + +800029cc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + aes32esmi x13, x18, x27, 2 # perform operation +800029cc: a7b906b3 aes32esmi x13,x18,x27,0x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d0: 0001a203 lw x4,0(x3) +800029d4: 00d20863 beq x4,x13,800029e4 +800029d8: 7e8052ef jal x5,800081c0 +800029dc: 800029cc .word 0x800029cc +800029e0: 80011fda .word 0x80011fda +800029e4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xaaaaaaaa +800029e8: 000ba483 lw x9,0(x23) +800029ec: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x00000000 +800029f0: 000baa03 lw x20,0(x23) +800029f4: 004b8b93 addi x23,x23,4 + +800029f8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + aes32esmi x15, x9, x20, 0 # perform operation +800029f8: 274487b3 aes32esmi x15,x9,x20,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029fc: 0001a203 lw x4,0(x3) +80002a00: 00f20863 beq x4,x15,80002a10 +80002a04: 7bc052ef jal x5,800081c0 +80002a08: 800029f8 .word 0x800029f8 +80002a0c: 8001203e .word 0x8001203e +80002a10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xaaaaaaaa +80002a14: 000ba803 lw x16,0(x23) +80002a18: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x00000001 +80002a1c: 000ba983 lw x19,0(x23) +80002a20: 004b8b93 addi x23,x23,4 + +80002a24 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + aes32esmi x9, x16, x19, 3 # perform operation +80002a24: e73804b3 aes32esmi x9,x16,x19,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a28: 0001a203 lw x4,0(x3) +80002a2c: 00920863 beq x4,x9,80002a3c +80002a30: 790052ef jal x5,800081c0 +80002a34: 80002a24 .word 0x80002a24 +80002a38: 8001209b .word 0x8001209b +80002a3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xaaaaaaaa +80002a40: 000ba583 lw x11,0(x23) +80002a44: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x00000002 +80002a48: 000ba703 lw x14,0(x23) +80002a4c: 004b8b93 addi x23,x23,4 + +80002a50 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + aes32esmi x1, x11, x14, 1 # perform operation +80002a50: 66e580b3 aes32esmi x1,x11,x14,0x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a54: 0001a203 lw x4,0(x3) +80002a58: 00120863 beq x4,x1,80002a68 +80002a5c: 764052ef jal x5,800081c0 +80002a60: 80002a50 .word 0x80002a50 +80002a64: 800120f8 .word 0x800120f8 +80002a68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xaaaaaaaa +80002a6c: 000ba603 lw x12,0(x23) +80002a70: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x80000000 +80002a74: 000ba103 lw x2,0(x23) +80002a78: 004b8b93 addi x23,x23,4 + +80002a7c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + aes32esmi x20, x12, x2, 3 # perform operation +80002a7c: e6260a33 aes32esmi x20,x12,x2,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a80: 0001a203 lw x4,0(x3) +80002a84: 01420863 beq x4,x20,80002a94 +80002a88: 738052ef jal x5,800081c0 +80002a8c: 80002a7c .word 0x80002a7c +80002a90: 80012155 .word 0x80012155 +80002a94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xaaaaaaaa +80002a98: 000ba603 lw x12,0(x23) +80002a9c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x80000001 +80002aa0: 000baa83 lw x21,0(x23) +80002aa4: 004b8b93 addi x23,x23,4 + +80002aa8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + aes32esmi x16, x12, x21, 1 # perform operation +80002aa8: 67560833 aes32esmi x16,x12,x21,0x1 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aac: 0001a203 lw x4,0(x3) +80002ab0: 01020863 beq x4,x16,80002ac0 +80002ab4: 70c052ef jal x5,800081c0 +80002ab8: 80002aa8 .word 0x80002aa8 +80002abc: 800121b9 .word 0x800121b9 +80002ac0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0xaaaaaaaa +80002ac4: 000ba303 lw x6,0(x23) +80002ac8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x7fffffff +80002acc: 000baa83 lw x21,0(x23) +80002ad0: 004b8b93 addi x23,x23,4 + +80002ad4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + aes32esmi x15, x6, x21, 2 # perform operation +80002ad4: a75307b3 aes32esmi x15,x6,x21,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad8: 0001a203 lw x4,0(x3) +80002adc: 00f20863 beq x4,x15,80002aec +80002ae0: 6e0052ef jal x5,800081c0 +80002ae4: 80002ad4 .word 0x80002ad4 +80002ae8: 8001221d .word 0x8001221d +80002aec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xaaaaaaaa +80002af0: 000ba983 lw x19,0(x23) +80002af4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x7ffffffe +80002af8: 000baf03 lw x30,0(x23) +80002afc: 004b8b93 addi x23,x23,4 + +80002b00 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + aes32esmi x26, x19, x30, 1 # perform operation +80002b00: 67e98d33 aes32esmi x26,x19,x30,0x1 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b04: 0001a203 lw x4,0(x3) +80002b08: 01a20863 beq x4,x26,80002b18 +80002b0c: 6b4052ef jal x5,800081c0 +80002b10: 80002b00 .word 0x80002b00 +80002b14: 80012281 .word 0x80012281 +80002b18: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xaaaaaaaa +80002b1c: 000baf03 lw x30,0(x23) +80002b20: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xffffffff +80002b24: 000bae83 lw x29,0(x23) +80002b28: 004b8b93 addi x23,x23,4 + +80002b2c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + aes32esmi x27, x30, x29, 1 # perform operation +80002b2c: 67df0db3 aes32esmi x27,x30,x29,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b30: 0001a203 lw x4,0(x3) +80002b34: 01b20863 beq x4,x27,80002b44 +80002b38: 688052ef jal x5,800081c0 +80002b3c: 80002b2c .word 0x80002b2c +80002b40: 800122e5 .word 0x800122e5 +80002b44: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xaaaaaaaa +80002b48: 000ba783 lw x15,0(x23) +80002b4c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0xfffffffe +80002b50: 000bad83 lw x27,0(x23) +80002b54: 004b8b93 addi x23,x23,4 + +80002b58 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + aes32esmi x20, x15, x27, 0 # perform operation +80002b58: 27b78a33 aes32esmi x20,x15,x27,0x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b5c: 0001a203 lw x4,0(x3) +80002b60: 01420863 beq x4,x20,80002b70 +80002b64: 65c052ef jal x5,800081c0 +80002b68: 80002b58 .word 0x80002b58 +80002b6c: 80012349 .word 0x80012349 +80002b70: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xaaaaaaaa +80002b74: 000bad83 lw x27,0(x23) +80002b78: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x5bbc8872 +80002b7c: 000bac03 lw x24,0(x23) +80002b80: 004b8b93 addi x23,x23,4 + +80002b84 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + aes32esmi x11, x27, x24, 3 # perform operation +80002b84: e78d85b3 aes32esmi x11,x27,x24,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b88: 0001a203 lw x4,0(x3) +80002b8c: 00b20863 beq x4,x11,80002b9c +80002b90: 630052ef jal x5,800081c0 +80002b94: 80002b84 .word 0x80002b84 +80002b98: 800123ad .word 0x800123ad +80002b9c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xaaaaaaaa +80002ba0: 000ba983 lw x19,0(x23) +80002ba4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xaaaaaaaa +80002ba8: 000bab03 lw x22,0(x23) +80002bac: 004b8b93 addi x23,x23,4 + +80002bb0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + aes32esmi x14, x19, x22, 1 # perform operation +80002bb0: 67698733 aes32esmi x14,x19,x22,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb4: 0001a203 lw x4,0(x3) +80002bb8: 00e20863 beq x4,x14,80002bc8 +80002bbc: 604052ef jal x5,800081c0 +80002bc0: 80002bb0 .word 0x80002bb0 +80002bc4: 80012411 .word 0x80012411 +80002bc8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xaaaaaaaa +80002bcc: 000ba803 lw x16,0(x23) +80002bd0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x55555555 +80002bd4: 000ba083 lw x1,0(x23) +80002bd8: 004b8b93 addi x23,x23,4 + +80002bdc : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + aes32esmi x14, x16, x1, 1 # perform operation +80002bdc: 66180733 aes32esmi x14,x16,x1,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be0: 0001a203 lw x4,0(x3) +80002be4: 00e20863 beq x4,x14,80002bf4 +80002be8: 5d8052ef jal x5,800081c0 +80002bec: 80002bdc .word 0x80002bdc +80002bf0: 80012475 .word 0x80012475 +80002bf4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x55555555 +80002bf8: 000ba403 lw x8,0(x23) +80002bfc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000000 +80002c00: 000baf83 lw x31,0(x23) +80002c04: 004b8b93 addi x23,x23,4 + +80002c08 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + aes32esmi x29, x8, x31, 2 # perform operation +80002c08: a7f40eb3 aes32esmi x29,x8,x31,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c0c: 0001a203 lw x4,0(x3) +80002c10: 01d20863 beq x4,x29,80002c20 +80002c14: 5ac052ef jal x5,800081c0 +80002c18: 80002c08 .word 0x80002c08 +80002c1c: 800124d9 .word 0x800124d9 +80002c20: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x55555555 +80002c24: 000ba803 lw x16,0(x23) +80002c28: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x00000001 +80002c2c: 000ba883 lw x17,0(x23) +80002c30: 004b8b93 addi x23,x23,4 + +80002c34 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + aes32esmi x26, x16, x17, 3 # perform operation +80002c34: e7180d33 aes32esmi x26,x16,x17,0x3 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c38: 0001a203 lw x4,0(x3) +80002c3c: 01a20863 beq x4,x26,80002c4c +80002c40: 580052ef jal x5,800081c0 +80002c44: 80002c34 .word 0x80002c34 +80002c48: 80012536 .word 0x80012536 +80002c4c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x55555555 +80002c50: 000bad83 lw x27,0(x23) +80002c54: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000002 +80002c58: 000baf83 lw x31,0(x23) +80002c5c: 004b8b93 addi x23,x23,4 + +80002c60 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + aes32esmi x29, x27, x31, 3 # perform operation +80002c60: e7fd8eb3 aes32esmi x29,x27,x31,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c64: 0001a203 lw x4,0(x3) +80002c68: 01d20863 beq x4,x29,80002c78 +80002c6c: 554052ef jal x5,800081c0 +80002c70: 80002c60 .word 0x80002c60 +80002c74: 80012593 .word 0x80012593 +80002c78: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x55555555 +80002c7c: 000bae03 lw x28,0(x23) +80002c80: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x80000000 +80002c84: 000bac83 lw x25,0(x23) +80002c88: 004b8b93 addi x23,x23,4 + +80002c8c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + aes32esmi x19, x28, x25, 3 # perform operation +80002c8c: e79e09b3 aes32esmi x19,x28,x25,0x3 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c90: 0001a203 lw x4,0(x3) +80002c94: 01320863 beq x4,x19,80002ca4 +80002c98: 528052ef jal x5,800081c0 +80002c9c: 80002c8c .word 0x80002c8c +80002ca0: 800125f0 .word 0x800125f0 +80002ca4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x55555555 +80002ca8: 000ba803 lw x16,0(x23) +80002cac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x80000001 +80002cb0: 000bac83 lw x25,0(x23) +80002cb4: 004b8b93 addi x23,x23,4 + +80002cb8 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + aes32esmi x27, x16, x25, 0 # perform operation +80002cb8: 27980db3 aes32esmi x27,x16,x25,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cbc: 0001a203 lw x4,0(x3) +80002cc0: 01b20863 beq x4,x27,80002cd0 +80002cc4: 4fc052ef jal x5,800081c0 +80002cc8: 80002cb8 .word 0x80002cb8 +80002ccc: 80012654 .word 0x80012654 +80002cd0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x55555555 +80002cd4: 000bad83 lw x27,0(x23) +80002cd8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x7fffffff +80002cdc: 000ba403 lw x8,0(x23) +80002ce0: 004b8b93 addi x23,x23,4 + +80002ce4 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + aes32esmi x2, x27, x8, 1 # perform operation +80002ce4: 668d8133 aes32esmi x2,x27,x8,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce8: 0001a203 lw x4,0(x3) +80002cec: 00220863 beq x4,x2,80002cfc +80002cf0: 4d0052ef jal x5,800081c0 +80002cf4: 80002ce4 .word 0x80002ce4 +80002cf8: 800126b8 .word 0x800126b8 +80002cfc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x55555555 +80002d00: 000ba703 lw x14,0(x23) +80002d04: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x7ffffffe +80002d08: 000bab03 lw x22,0(x23) +80002d0c: 004b8b93 addi x23,x23,4 + +80002d10 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + aes32esmi x19, x14, x22, 0 # perform operation +80002d10: 276709b3 aes32esmi x19,x14,x22,0x0 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d14: 0001a203 lw x4,0(x3) +80002d18: 01320863 beq x4,x19,80002d28 +80002d1c: 4a4052ef jal x5,800081c0 +80002d20: 80002d10 .word 0x80002d10 +80002d24: 8001271c .word 0x8001271c +80002d28: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x55555555 +80002d2c: 000bab03 lw x22,0(x23) +80002d30: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xffffffff +80002d34: 000ba883 lw x17,0(x23) +80002d38: 004b8b93 addi x23,x23,4 + +80002d3c : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + aes32esmi x12, x22, x17, 2 # perform operation +80002d3c: a71b0633 aes32esmi x12,x22,x17,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d40: 0001a203 lw x4,0(x3) +80002d44: 00c20863 beq x4,x12,80002d54 +80002d48: 478052ef jal x5,800081c0 +80002d4c: 80002d3c .word 0x80002d3c +80002d50: 80012780 .word 0x80012780 +80002d54: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x55555555 +80002d58: 000ba683 lw x13,0(x23) +80002d5c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xfffffffe +80002d60: 000ba403 lw x8,0(x23) +80002d64: 004b8b93 addi x23,x23,4 + +80002d68 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + aes32esmi x7, x13, x8, 2 # perform operation +80002d68: a68683b3 aes32esmi x7,x13,x8,0x2 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d6c: 0001a203 lw x4,0(x3) +80002d70: 00720863 beq x4,x7,80002d80 +80002d74: 44c052ef jal x5,800081c0 +80002d78: 80002d68 .word 0x80002d68 +80002d7c: 800127e4 .word 0x800127e4 +80002d80: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x55555555 +80002d84: 000baf83 lw x31,0(x23) +80002d88: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x5bbc8872 +80002d8c: 000bab03 lw x22,0(x23) +80002d90: 004b8b93 addi x23,x23,4 + +80002d94 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + aes32esmi x30, x31, x22, 3 # perform operation +80002d94: e76f8f33 aes32esmi x30,x31,x22,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d98: 0001a203 lw x4,0(x3) +80002d9c: 01e20863 beq x4,x30,80002dac +80002da0: 420052ef jal x5,800081c0 +80002da4: 80002d94 .word 0x80002d94 +80002da8: 80012848 .word 0x80012848 +80002dac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x55555555 +80002db0: 000baf03 lw x30,0(x23) +80002db4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xaaaaaaaa +80002db8: 000bab03 lw x22,0(x23) +80002dbc: 004b8b93 addi x23,x23,4 + +80002dc0 : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + aes32esmi x12, x30, x22, 3 # perform operation +80002dc0: e76f0633 aes32esmi x12,x30,x22,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc4: 0001a203 lw x4,0(x3) +80002dc8: 00c20863 beq x4,x12,80002dd8 +80002dcc: 3f4052ef jal x5,800081c0 +80002dd0: 80002dc0 .word 0x80002dc0 +80002dd4: 800128ac .word 0x800128ac +80002dd8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x55555555 +80002ddc: 000baf83 lw x31,0(x23) +80002de0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x55555555 +80002de4: 000ba903 lw x18,0(x23) +80002de8: 004b8b93 addi x23,x23,4 + +80002dec : +Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + aes32esmi x12, x31, x18, 3 # perform operation +80002dec: e72f8633 aes32esmi x12,x31,x18,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zkne_aes32esmi_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df0: 0001a203 lw x4,0(x3) +80002df4: 00c20863 beq x4,x12,80002e04 +80002df8: 3c8052ef jal x5,800081c0 +80002dfc: 80002dec .word 0x80002dec +80002e00: 80012910 .word 0x80012910 +80002e04: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x42ba2705 +80002e08: 000ba003 lw x0,0(x23) +80002e0c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0xda543a9f +80002e10: 000ba003 lw x0,0(x23) +80002e14: 004b8b93 addi x23,x23,4 + +80002e18 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b0: + aes32esmi x9, x0, x0, 0 # perform operation +80002e18: 260004b3 aes32esmi x9,x0,x0,0x0 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zkne_aes32esmi_cg_cmp_rs1_rs2_b0, Zkne_aes32esmi_cg_cmp_rs1_rs2_b0_str) +80002e1c: 0001a203 lw x4,0(x3) +80002e20: 00920863 beq x4,x9,80002e30 +80002e24: 39c052ef jal x5,800081c0 +80002e28: 80002e18 .word 0x80002e18 +80002e2c: 80012974 .word 0x80012974 +80002e30: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x2d3c0044 +80002e34: 000ba083 lw x1,0(x23) +80002e38: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x15ab69f2 +80002e3c: 000ba083 lw x1,0(x23) +80002e40: 004b8b93 addi x23,x23,4 + +80002e44 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b1: + aes32esmi x20, x1, x1, 1 # perform operation +80002e44: 66108a33 aes32esmi x20,x1,x1,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zkne_aes32esmi_cg_cmp_rs1_rs2_b1, Zkne_aes32esmi_cg_cmp_rs1_rs2_b1_str) +80002e48: 0001a203 lw x4,0(x3) +80002e4c: 01420863 beq x4,x20,80002e5c +80002e50: 370052ef jal x5,800081c0 +80002e54: 80002e44 .word 0x80002e44 +80002e58: 800129b1 .word 0x800129b1 +80002e5c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0c4a4132 +80002e60: 000ba103 lw x2,0(x23) +80002e64: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xe0dd42d5 +80002e68: 000ba103 lw x2,0(x23) +80002e6c: 004b8b93 addi x23,x23,4 + +80002e70 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b2: + aes32esmi x17, x2, x2, 1 # perform operation +80002e70: 662108b3 aes32esmi x17,x2,x2,0x1 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zkne_aes32esmi_cg_cmp_rs1_rs2_b2, Zkne_aes32esmi_cg_cmp_rs1_rs2_b2_str) +80002e74: 0001a203 lw x4,0(x3) +80002e78: 01120863 beq x4,x17,80002e88 +80002e7c: 344052ef jal x5,800081c0 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 800129ee .word 0x800129ee +80002e88: 00418193 addi x3,x3,4 + + mv x22, x3 # switch signature pointer register to avoid conflict with test +80002e8c: 00018b13 addi x22,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xda12e18e +80002e90: 000ba183 lw x3,0(x23) +80002e94: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x6be38bbd +80002e98: 000ba183 lw x3,0(x23) +80002e9c: 004b8b93 addi x23,x23,4 + +80002ea0 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b3: + aes32esmi x18, x3, x3, 1 # perform operation +80002ea0: 66318933 aes32esmi x18,x3,x3,0x1 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zkne_aes32esmi_cg_cmp_rs1_rs2_b3, Zkne_aes32esmi_cg_cmp_rs1_rs2_b3_str) +80002ea4: 000b2203 lw x4,0(x22) +80002ea8: 01220863 beq x4,x18,80002eb8 +80002eac: 314052ef jal x5,800081c0 +80002eb0: 80002ea0 .word 0x80002ea0 +80002eb4: 80012a2b .word 0x80012a2b +80002eb8: 004b0b13 addi x22,x22,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002ebc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002ec0: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xbb78072b +80002ec4: 000ba203 lw x4,0(x23) +80002ec8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x457eb74c +80002ecc: 000ba203 lw x4,0(x23) +80002ed0: 004b8b93 addi x23,x23,4 + +80002ed4 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b4: + aes32esmi x10, x4, x4, 0 # perform operation +80002ed4: 26420533 aes32esmi x10,x4,x4,0x0 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zkne_aes32esmi_cg_cmp_rs1_rs2_b4, Zkne_aes32esmi_cg_cmp_rs1_rs2_b4_str) +80002ed8: 000b2383 lw x7,0(x22) +80002edc: 00a38863 beq x7,x10,80002eec +80002ee0: 2f80546f jal x8,800081d8 +80002ee4: 80002ed4 .word 0x80002ed4 +80002ee8: 80012a68 .word 0x80012a68 +80002eec: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x31d70a2c +80002ef0: 000ba283 lw x5,0(x23) +80002ef4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x97a4a075 +80002ef8: 000ba283 lw x5,0(x23) +80002efc: 004b8b93 addi x23,x23,4 + +80002f00 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b5: + aes32esmi x29, x5, x5, 0 # perform operation +80002f00: 26528eb3 aes32esmi x29,x5,x5,0x0 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zkne_aes32esmi_cg_cmp_rs1_rs2_b5, Zkne_aes32esmi_cg_cmp_rs1_rs2_b5_str) +80002f04: 000b2383 lw x7,0(x22) +80002f08: 01d38863 beq x7,x29,80002f18 +80002f0c: 2cc0546f jal x8,800081d8 +80002f10: 80002f00 .word 0x80002f00 +80002f14: 80012aa5 .word 0x80012aa5 +80002f18: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0xe6b63a7f +80002f1c: 000ba303 lw x6,0(x23) +80002f20: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x88118eff +80002f24: 000ba303 lw x6,0(x23) +80002f28: 004b8b93 addi x23,x23,4 + +80002f2c : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b6: + aes32esmi x4, x6, x6, 3 # perform operation +80002f2c: e6630233 aes32esmi x4,x6,x6,0x3 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zkne_aes32esmi_cg_cmp_rs1_rs2_b6, Zkne_aes32esmi_cg_cmp_rs1_rs2_b6_str) +80002f30: 000b2383 lw x7,0(x22) +80002f34: 00438863 beq x7,x4,80002f44 +80002f38: 2a00546f jal x8,800081d8 +80002f3c: 80002f2c .word 0x80002f2c +80002f40: 80012ae2 .word 0x80012ae2 +80002f44: 004b0b13 addi x22,x22,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f48: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f4c: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x8bee513d +80002f50: 000ba383 lw x7,0(x23) +80002f54: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x17d2c81e +80002f58: 000ba383 lw x7,0(x23) +80002f5c: 004b8b93 addi x23,x23,4 + +80002f60 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b7: + aes32esmi x8, x7, x7, 2 # perform operation +80002f60: a6738433 aes32esmi x8,x7,x7,0x2 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zkne_aes32esmi_cg_cmp_rs1_rs2_b7, Zkne_aes32esmi_cg_cmp_rs1_rs2_b7_str) +80002f64: 000b2203 lw x4,0(x22) +80002f68: 00820863 beq x4,x8,80002f78 +80002f6c: 254052ef jal x5,800081c0 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 80012b1f .word 0x80012b1f +80002f78: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x061b8253 +80002f7c: 000ba403 lw x8,0(x23) +80002f80: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xf7b8a6ae +80002f84: 000ba403 lw x8,0(x23) +80002f88: 004b8b93 addi x23,x23,4 + +80002f8c : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b8: + aes32esmi x12, x8, x8, 0 # perform operation +80002f8c: 26840633 aes32esmi x12,x8,x8,0x0 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zkne_aes32esmi_cg_cmp_rs1_rs2_b8, Zkne_aes32esmi_cg_cmp_rs1_rs2_b8_str) +80002f90: 000b2203 lw x4,0(x22) +80002f94: 00c20863 beq x4,x12,80002fa4 +80002f98: 228052ef jal x5,800081c0 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 80012b5c .word 0x80012b5c +80002fa4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x6e12fdf5 +80002fa8: 000ba483 lw x9,0(x23) +80002fac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x1cb3fefa +80002fb0: 000ba483 lw x9,0(x23) +80002fb4: 004b8b93 addi x23,x23,4 + +80002fb8 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b9: + aes32esmi x26, x9, x9, 1 # perform operation +80002fb8: 66948d33 aes32esmi x26,x9,x9,0x1 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zkne_aes32esmi_cg_cmp_rs1_rs2_b9, Zkne_aes32esmi_cg_cmp_rs1_rs2_b9_str) +80002fbc: 000b2203 lw x4,0(x22) +80002fc0: 01a20863 beq x4,x26,80002fd0 +80002fc4: 1fc052ef jal x5,800081c0 +80002fc8: 80002fb8 .word 0x80002fb8 +80002fcc: 80012b99 .word 0x80012b99 +80002fd0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x84845dc2 +80002fd4: 000ba503 lw x10,0(x23) +80002fd8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x61d0cbb9 +80002fdc: 000ba503 lw x10,0(x23) +80002fe0: 004b8b93 addi x23,x23,4 + +80002fe4 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b10: + aes32esmi x20, x10, x10, 1 # perform operation +80002fe4: 66a50a33 aes32esmi x20,x10,x10,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zkne_aes32esmi_cg_cmp_rs1_rs2_b10, Zkne_aes32esmi_cg_cmp_rs1_rs2_b10_str) +80002fe8: 000b2203 lw x4,0(x22) +80002fec: 01420863 beq x4,x20,80002ffc +80002ff0: 1d0052ef jal x5,800081c0 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 80012bd6 .word 0x80012bd6 +80002ffc: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x50ac7c3b +80003000: 000ba583 lw x11,0(x23) +80003004: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x4b0998be +80003008: 000ba583 lw x11,0(x23) +8000300c: 004b8b93 addi x23,x23,4 + +80003010 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b11: + aes32esmi x29, x11, x11, 2 # perform operation +80003010: a6b58eb3 aes32esmi x29,x11,x11,0x2 + # Check if x29 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x29, Zkne_aes32esmi_cg_cmp_rs1_rs2_b11, Zkne_aes32esmi_cg_cmp_rs1_rs2_b11_str) +80003014: 000b2203 lw x4,0(x22) +80003018: 01d20863 beq x4,x29,80003028 +8000301c: 1a4052ef jal x5,800081c0 +80003020: 80003010 .word 0x80003010 +80003024: 80012c14 .word 0x80012c14 +80003028: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xfa1bd2f4 +8000302c: 000ba603 lw x12,0(x23) +80003030: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x18fed5e1 +80003034: 000ba603 lw x12,0(x23) +80003038: 004b8b93 addi x23,x23,4 + +8000303c : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b12: + aes32esmi x25, x12, x12, 2 # perform operation +8000303c: a6c60cb3 aes32esmi x25,x12,x12,0x2 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zkne_aes32esmi_cg_cmp_rs1_rs2_b12, Zkne_aes32esmi_cg_cmp_rs1_rs2_b12_str) +80003040: 000b2203 lw x4,0(x22) +80003044: 01920863 beq x4,x25,80003054 +80003048: 178052ef jal x5,800081c0 +8000304c: 8000303c .word 0x8000303c +80003050: 80012c52 .word 0x80012c52 +80003054: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x34724742 +80003058: 000ba683 lw x13,0(x23) +8000305c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x0a586f73 +80003060: 000ba683 lw x13,0(x23) +80003064: 004b8b93 addi x23,x23,4 + +80003068 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b13: + aes32esmi x10, x13, x13, 3 # perform operation +80003068: e6d68533 aes32esmi x10,x13,x13,0x3 + # Check if x10 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x10, Zkne_aes32esmi_cg_cmp_rs1_rs2_b13, Zkne_aes32esmi_cg_cmp_rs1_rs2_b13_str) +8000306c: 000b2203 lw x4,0(x22) +80003070: 00a20863 beq x4,x10,80003080 +80003074: 14c052ef jal x5,800081c0 +80003078: 80003068 .word 0x80003068 +8000307c: 80012c90 .word 0x80012c90 +80003080: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xbf260616 +80003084: 000ba703 lw x14,0(x23) +80003088: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x28657f32 +8000308c: 000ba703 lw x14,0(x23) +80003090: 004b8b93 addi x23,x23,4 + +80003094 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b14: + aes32esmi x29, x14, x14, 1 # perform operation +80003094: 66e70eb3 aes32esmi x29,x14,x14,0x1 + # Check if x29 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x29, Zkne_aes32esmi_cg_cmp_rs1_rs2_b14, Zkne_aes32esmi_cg_cmp_rs1_rs2_b14_str) +80003098: 000b2203 lw x4,0(x22) +8000309c: 01d20863 beq x4,x29,800030ac +800030a0: 120052ef jal x5,800081c0 +800030a4: 80003094 .word 0x80003094 +800030a8: 80012cce .word 0x80012cce +800030ac: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x3fbd1df4 +800030b0: 000ba783 lw x15,0(x23) +800030b4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x4c196fca +800030b8: 000ba783 lw x15,0(x23) +800030bc: 004b8b93 addi x23,x23,4 + +800030c0 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b15: + aes32esmi x27, x15, x15, 0 # perform operation +800030c0: 26f78db3 aes32esmi x27,x15,x15,0x0 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zkne_aes32esmi_cg_cmp_rs1_rs2_b15, Zkne_aes32esmi_cg_cmp_rs1_rs2_b15_str) +800030c4: 000b2203 lw x4,0(x22) +800030c8: 01b20863 beq x4,x27,800030d8 +800030cc: 0f4052ef jal x5,800081c0 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 80012d0c .word 0x80012d0c +800030d8: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x5ad6860b +800030dc: 000ba803 lw x16,0(x23) +800030e0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x791519d2 +800030e4: 000ba803 lw x16,0(x23) +800030e8: 004b8b93 addi x23,x23,4 + +800030ec : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b16: + aes32esmi x27, x16, x16, 1 # perform operation +800030ec: 67080db3 aes32esmi x27,x16,x16,0x1 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zkne_aes32esmi_cg_cmp_rs1_rs2_b16, Zkne_aes32esmi_cg_cmp_rs1_rs2_b16_str) +800030f0: 000b2203 lw x4,0(x22) +800030f4: 01b20863 beq x4,x27,80003104 +800030f8: 0c8052ef jal x5,800081c0 +800030fc: 800030ec .word 0x800030ec +80003100: 80012d4a .word 0x80012d4a +80003104: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x2e115a04 +80003108: 000ba883 lw x17,0(x23) +8000310c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x0a8b4521 +80003110: 000ba883 lw x17,0(x23) +80003114: 004b8b93 addi x23,x23,4 + +80003118 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b17: + aes32esmi x8, x17, x17, 2 # perform operation +80003118: a7188433 aes32esmi x8,x17,x17,0x2 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zkne_aes32esmi_cg_cmp_rs1_rs2_b17, Zkne_aes32esmi_cg_cmp_rs1_rs2_b17_str) +8000311c: 000b2203 lw x4,0(x22) +80003120: 00820863 beq x4,x8,80003130 +80003124: 09c052ef jal x5,800081c0 +80003128: 80003118 .word 0x80003118 +8000312c: 80012d88 .word 0x80012d88 +80003130: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x39036139 +80003134: 000ba903 lw x18,0(x23) +80003138: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x71742b9c +8000313c: 000ba903 lw x18,0(x23) +80003140: 004b8b93 addi x23,x23,4 + +80003144 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b18: + aes32esmi x26, x18, x18, 1 # perform operation +80003144: 67290d33 aes32esmi x26,x18,x18,0x1 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zkne_aes32esmi_cg_cmp_rs1_rs2_b18, Zkne_aes32esmi_cg_cmp_rs1_rs2_b18_str) +80003148: 000b2203 lw x4,0(x22) +8000314c: 01a20863 beq x4,x26,8000315c +80003150: 070052ef jal x5,800081c0 +80003154: 80003144 .word 0x80003144 +80003158: 80012dc6 .word 0x80012dc6 +8000315c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x873b9fc8 +80003160: 000ba983 lw x19,0(x23) +80003164: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xdc2e3156 +80003168: 000ba983 lw x19,0(x23) +8000316c: 004b8b93 addi x23,x23,4 + +80003170 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b19: + aes32esmi x7, x19, x19, 1 # perform operation +80003170: 673983b3 aes32esmi x7,x19,x19,0x1 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zkne_aes32esmi_cg_cmp_rs1_rs2_b19, Zkne_aes32esmi_cg_cmp_rs1_rs2_b19_str) +80003174: 000b2203 lw x4,0(x22) +80003178: 00720863 beq x4,x7,80003188 +8000317c: 044052ef jal x5,800081c0 +80003180: 80003170 .word 0x80003170 +80003184: 80012e04 .word 0x80012e04 +80003188: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x022b54ab +8000318c: 000baa03 lw x20,0(x23) +80003190: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xa90285d9 +80003194: 000baa03 lw x20,0(x23) +80003198: 004b8b93 addi x23,x23,4 + +8000319c : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b20: + aes32esmi x25, x20, x20, 1 # perform operation +8000319c: 674a0cb3 aes32esmi x25,x20,x20,0x1 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zkne_aes32esmi_cg_cmp_rs1_rs2_b20, Zkne_aes32esmi_cg_cmp_rs1_rs2_b20_str) +800031a0: 000b2203 lw x4,0(x22) +800031a4: 01920863 beq x4,x25,800031b4 +800031a8: 018052ef jal x5,800081c0 +800031ac: 8000319c .word 0x8000319c +800031b0: 80012e42 .word 0x80012e42 +800031b4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x580649b3 +800031b8: 000baa83 lw x21,0(x23) +800031bc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x154bbaa7 +800031c0: 000baa83 lw x21,0(x23) +800031c4: 004b8b93 addi x23,x23,4 + +800031c8 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b21: + aes32esmi x6, x21, x21, 2 # perform operation +800031c8: a75a8333 aes32esmi x6,x21,x21,0x2 + # Check if x6 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x6, Zkne_aes32esmi_cg_cmp_rs1_rs2_b21, Zkne_aes32esmi_cg_cmp_rs1_rs2_b21_str) +800031cc: 000b2203 lw x4,0(x22) +800031d0: 00620863 beq x4,x6,800031e0 +800031d4: 7ed042ef jal x5,800081c0 +800031d8: 800031c8 .word 0x800031c8 +800031dc: 80012e80 .word 0x80012e80 +800031e0: 004b0b13 addi x22,x22,4 + + mv x21, x22 # switch signature pointer register to avoid conflict with test +800031e4: 000b0a93 addi x21,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xa6a338c6 +800031e8: 000bab03 lw x22,0(x23) +800031ec: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x93b3ac1e +800031f0: 000bab03 lw x22,0(x23) +800031f4: 004b8b93 addi x23,x23,4 + +800031f8 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b22: + aes32esmi x19, x22, x22, 2 # perform operation +800031f8: a76b09b3 aes32esmi x19,x22,x22,0x2 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zkne_aes32esmi_cg_cmp_rs1_rs2_b22, Zkne_aes32esmi_cg_cmp_rs1_rs2_b22_str) +800031fc: 000aa203 lw x4,0(x21) +80003200: 01320863 beq x4,x19,80003210 +80003204: 7bd042ef jal x5,800081c0 +80003208: 800031f8 .word 0x800031f8 +8000320c: 80012ebe .word 0x80012ebe +80003210: 004a8a93 addi x21,x21,4 + + mv x30, x23 # switch data pointer register to avoid conflict with test +80003214: 000b8f13 addi x30,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x14d89c7b +80003218: 000f2b83 lw x23,0(x30) +8000321c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x278f9a06 +80003220: 000f2b83 lw x23,0(x30) +80003224: 004f0f13 addi x30,x30,4 + +80003228 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b23: + aes32esmi x14, x23, x23, 0 # perform operation +80003228: 277b8733 aes32esmi x14,x23,x23,0x0 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zkne_aes32esmi_cg_cmp_rs1_rs2_b23, Zkne_aes32esmi_cg_cmp_rs1_rs2_b23_str) +8000322c: 000aa203 lw x4,0(x21) +80003230: 00e20863 beq x4,x14,80003240 +80003234: 78d042ef jal x5,800081c0 +80003238: 80003228 .word 0x80003228 +8000323c: 80012efc .word 0x80012efc +80003240: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x8b791752 +80003244: 000f2c03 lw x24,0(x30) +80003248: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xce0679e7 +8000324c: 000f2c03 lw x24,0(x30) +80003250: 004f0f13 addi x30,x30,4 + +80003254 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b24: + aes32esmi x23, x24, x24, 0 # perform operation +80003254: 278c0bb3 aes32esmi x23,x24,x24,0x0 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zkne_aes32esmi_cg_cmp_rs1_rs2_b24, Zkne_aes32esmi_cg_cmp_rs1_rs2_b24_str) +80003258: 000aa203 lw x4,0(x21) +8000325c: 01720863 beq x4,x23,8000326c +80003260: 761042ef jal x5,800081c0 +80003264: 80003254 .word 0x80003254 +80003268: 80012f3a .word 0x80012f3a +8000326c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x23828760 +80003270: 000f2c83 lw x25,0(x30) +80003274: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0xf759e82c +80003278: 000f2c83 lw x25,0(x30) +8000327c: 004f0f13 addi x30,x30,4 + +80003280 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b25: + aes32esmi x15, x25, x25, 2 # perform operation +80003280: a79c87b3 aes32esmi x15,x25,x25,0x2 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zkne_aes32esmi_cg_cmp_rs1_rs2_b25, Zkne_aes32esmi_cg_cmp_rs1_rs2_b25_str) +80003284: 000aa203 lw x4,0(x21) +80003288: 00f20863 beq x4,x15,80003298 +8000328c: 735042ef jal x5,800081c0 +80003290: 80003280 .word 0x80003280 +80003294: 80012f78 .word 0x80012f78 +80003298: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x9a06c56f +8000329c: 000f2d03 lw x26,0(x30) +800032a0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0xbdb09fd6 +800032a4: 000f2d03 lw x26,0(x30) +800032a8: 004f0f13 addi x30,x30,4 + +800032ac : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b26: + aes32esmi x22, x26, x26, 1 # perform operation +800032ac: 67ad0b33 aes32esmi x22,x26,x26,0x1 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zkne_aes32esmi_cg_cmp_rs1_rs2_b26, Zkne_aes32esmi_cg_cmp_rs1_rs2_b26_str) +800032b0: 000aa203 lw x4,0(x21) +800032b4: 01620863 beq x4,x22,800032c4 +800032b8: 709042ef jal x5,800081c0 +800032bc: 800032ac .word 0x800032ac +800032c0: 80012fb6 .word 0x80012fb6 +800032c4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x937ea693 +800032c8: 000f2d83 lw x27,0(x30) +800032cc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xf682f27b +800032d0: 000f2d83 lw x27,0(x30) +800032d4: 004f0f13 addi x30,x30,4 + +800032d8 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b27: + aes32esmi x23, x27, x27, 3 # perform operation +800032d8: e7bd8bb3 aes32esmi x23,x27,x27,0x3 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zkne_aes32esmi_cg_cmp_rs1_rs2_b27, Zkne_aes32esmi_cg_cmp_rs1_rs2_b27_str) +800032dc: 000aa203 lw x4,0(x21) +800032e0: 01720863 beq x4,x23,800032f0 +800032e4: 6dd042ef jal x5,800081c0 +800032e8: 800032d8 .word 0x800032d8 +800032ec: 80012ff4 .word 0x80012ff4 +800032f0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x81ac9a44 +800032f4: 000f2e03 lw x28,0(x30) +800032f8: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xa807c7ba +800032fc: 000f2e03 lw x28,0(x30) +80003300: 004f0f13 addi x30,x30,4 + +80003304 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b28: + aes32esmi x17, x28, x28, 3 # perform operation +80003304: e7ce08b3 aes32esmi x17,x28,x28,0x3 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zkne_aes32esmi_cg_cmp_rs1_rs2_b28, Zkne_aes32esmi_cg_cmp_rs1_rs2_b28_str) +80003308: 000aa203 lw x4,0(x21) +8000330c: 01120863 beq x4,x17,8000331c +80003310: 6b1042ef jal x5,800081c0 +80003314: 80003304 .word 0x80003304 +80003318: 80013032 .word 0x80013032 +8000331c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x2a822d31 +80003320: 000f2e83 lw x29,0(x30) +80003324: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x3195de6e +80003328: 000f2e83 lw x29,0(x30) +8000332c: 004f0f13 addi x30,x30,4 + +80003330 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b29: + aes32esmi x7, x29, x29, 1 # perform operation +80003330: 67de83b3 aes32esmi x7,x29,x29,0x1 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zkne_aes32esmi_cg_cmp_rs1_rs2_b29, Zkne_aes32esmi_cg_cmp_rs1_rs2_b29_str) +80003334: 000aa203 lw x4,0(x21) +80003338: 00720863 beq x4,x7,80003348 +8000333c: 685042ef jal x5,800081c0 +80003340: 80003330 .word 0x80003330 +80003344: 80013070 .word 0x80013070 +80003348: 004a8a93 addi x21,x21,4 + + mv x26, x30 # switch data pointer register to avoid conflict with test +8000334c: 000f0d13 addi x26,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x54aa3780 +80003350: 000d2f03 lw x30,0(x26) +80003354: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xc8286774 +80003358: 000d2f03 lw x30,0(x26) +8000335c: 004d0d13 addi x26,x26,4 + +80003360 : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b30: + aes32esmi x25, x30, x30, 0 # perform operation +80003360: 27ef0cb3 aes32esmi x25,x30,x30,0x0 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zkne_aes32esmi_cg_cmp_rs1_rs2_b30, Zkne_aes32esmi_cg_cmp_rs1_rs2_b30_str) +80003364: 000aa203 lw x4,0(x21) +80003368: 01920863 beq x4,x25,80003378 +8000336c: 655042ef jal x5,800081c0 +80003370: 80003360 .word 0x80003360 +80003374: 800130ae .word 0x800130ae +80003378: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xf5ff78da +8000337c: 000d2f83 lw x31,0(x26) +80003380: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x2a074b04 +80003384: 000d2f83 lw x31,0(x26) +80003388: 004d0d13 addi x26,x26,4 + +8000338c : +Zkne_aes32esmi_cg_cmp_rs1_rs2_b31: + aes32esmi x11, x31, x31, 0 # perform operation +8000338c: 27ff85b3 aes32esmi x11,x31,x31,0x0 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zkne_aes32esmi_cg_cmp_rs1_rs2_b31, Zkne_aes32esmi_cg_cmp_rs1_rs2_b31_str) +80003390: 000aa203 lw x4,0(x21) +80003394: 00b20863 beq x4,x11,800033a4 +80003398: 629042ef jal x5,800081c0 +8000339c: 8000338c .word 0x8000338c +800033a0: 800130ec .word 0x800130ec +800033a4: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x6d78801c +800033a8: 000d2003 lw x0,0(x26) +800033ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x85b94ff6 +800033b0: 000d2b03 lw x22,0(x26) +800033b4: 004d0d13 addi x26,x26,4 + +800033b8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b0: + aes32esmi x0, x0, x22, 0 # perform operation +800033b8: 27600033 aes32esmi x0,x0,x22,0x0 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zkne_aes32esmi_cg_cmp_rd_rs1_b0, Zkne_aes32esmi_cg_cmp_rd_rs1_b0_str) +800033bc: 000aa203 lw x4,0(x21) +800033c0: 00020863 beq x4,x0,800033d0 +800033c4: 5fd042ef jal x5,800081c0 +800033c8: 800033b8 .word 0x800033b8 +800033cc: 8001312a .word 0x8001312a +800033d0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xb55ef73e +800033d4: 000d2083 lw x1,0(x26) +800033d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xfaf8bb11 +800033dc: 000d2303 lw x6,0(x26) +800033e0: 004d0d13 addi x26,x26,4 + +800033e4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b1: + aes32esmi x1, x1, x6, 1 # perform operation +800033e4: 666080b3 aes32esmi x1,x1,x6,0x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zkne_aes32esmi_cg_cmp_rd_rs1_b1, Zkne_aes32esmi_cg_cmp_rd_rs1_b1_str) +800033e8: 000aa203 lw x4,0(x21) +800033ec: 00120863 beq x4,x1,800033fc +800033f0: 5d1042ef jal x5,800081c0 +800033f4: 800033e4 .word 0x800033e4 +800033f8: 80013166 .word 0x80013166 +800033fc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xe9bbaaf0 +80003400: 000d2103 lw x2,0(x26) +80003404: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x0e06f3d7 +80003408: 000d2c03 lw x24,0(x26) +8000340c: 004d0d13 addi x26,x26,4 + +80003410 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b2: + aes32esmi x2, x2, x24, 1 # perform operation +80003410: 67810133 aes32esmi x2,x2,x24,0x1 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zkne_aes32esmi_cg_cmp_rd_rs1_b2, Zkne_aes32esmi_cg_cmp_rd_rs1_b2_str) +80003414: 000aa203 lw x4,0(x21) +80003418: 00220863 beq x4,x2,80003428 +8000341c: 5a5042ef jal x5,800081c0 +80003420: 80003410 .word 0x80003410 +80003424: 800131a2 .word 0x800131a2 +80003428: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x47cba352 +8000342c: 000d2183 lw x3,0(x26) +80003430: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x551d35c6 +80003434: 000d2803 lw x16,0(x26) +80003438: 004d0d13 addi x26,x26,4 + +8000343c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b3: + aes32esmi x3, x3, x16, 3 # perform operation +8000343c: e70181b3 aes32esmi x3,x3,x16,0x3 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zkne_aes32esmi_cg_cmp_rd_rs1_b3, Zkne_aes32esmi_cg_cmp_rd_rs1_b3_str) +80003440: 000aa203 lw x4,0(x21) +80003444: 00320863 beq x4,x3,80003454 +80003448: 579042ef jal x5,800081c0 +8000344c: 8000343c .word 0x8000343c +80003450: 800131de .word 0x800131de +80003454: 004a8a93 addi x21,x21,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003458: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +8000345c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xd0665d9d +80003460: 000d2203 lw x4,0(x26) +80003464: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x60670199 +80003468: 000d2c83 lw x25,0(x26) +8000346c: 004d0d13 addi x26,x26,4 + +80003470 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b4: + aes32esmi x4, x4, x25, 2 # perform operation +80003470: a7920233 aes32esmi x4,x4,x25,0x2 + # Check if x4 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x4, Zkne_aes32esmi_cg_cmp_rd_rs1_b4, Zkne_aes32esmi_cg_cmp_rd_rs1_b4_str) +80003474: 000aa683 lw x13,0(x21) +80003478: 00468863 beq x13,x4,80003488 +8000347c: 5850476f jal x14,80008200 +80003480: 80003470 .word 0x80003470 +80003484: 8001321a .word 0x8001321a +80003488: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xd3867895 +8000348c: 000d2283 lw x5,0(x26) +80003490: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x586b20a5 +80003494: 000d2203 lw x4,0(x26) +80003498: 004d0d13 addi x26,x26,4 + +8000349c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b5: + aes32esmi x5, x5, x4, 2 # perform operation +8000349c: a64282b3 aes32esmi x5,x5,x4,0x2 + # Check if x5 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x5, Zkne_aes32esmi_cg_cmp_rd_rs1_b5, Zkne_aes32esmi_cg_cmp_rd_rs1_b5_str) +800034a0: 000aa683 lw x13,0(x21) +800034a4: 00568863 beq x13,x5,800034b4 +800034a8: 5590476f jal x14,80008200 +800034ac: 8000349c .word 0x8000349c +800034b0: 80013256 .word 0x80013256 +800034b4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x3594403c +800034b8: 000d2303 lw x6,0(x26) +800034bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x1a2fd5a2 +800034c0: 000d2803 lw x16,0(x26) +800034c4: 004d0d13 addi x26,x26,4 + +800034c8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b6: + aes32esmi x6, x6, x16, 2 # perform operation +800034c8: a7030333 aes32esmi x6,x6,x16,0x2 + # Check if x6 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x6, Zkne_aes32esmi_cg_cmp_rd_rs1_b6, Zkne_aes32esmi_cg_cmp_rd_rs1_b6_str) +800034cc: 000aa683 lw x13,0(x21) +800034d0: 00668863 beq x13,x6,800034e0 +800034d4: 52d0476f jal x14,80008200 +800034d8: 800034c8 .word 0x800034c8 +800034dc: 80013292 .word 0x80013292 +800034e0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x3b608557 +800034e4: 000d2383 lw x7,0(x26) +800034e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xe7f44003 +800034ec: 000d2d83 lw x27,0(x26) +800034f0: 004d0d13 addi x26,x26,4 + +800034f4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b7: + aes32esmi x7, x7, x27, 2 # perform operation +800034f4: a7b383b3 aes32esmi x7,x7,x27,0x2 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zkne_aes32esmi_cg_cmp_rd_rs1_b7, Zkne_aes32esmi_cg_cmp_rd_rs1_b7_str) +800034f8: 000aa683 lw x13,0(x21) +800034fc: 00768863 beq x13,x7,8000350c +80003500: 5010476f jal x14,80008200 +80003504: 800034f4 .word 0x800034f4 +80003508: 800132ce .word 0x800132ce +8000350c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xff071a45 +80003510: 000d2403 lw x8,0(x26) +80003514: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xc2352f5f +80003518: 000d2503 lw x10,0(x26) +8000351c: 004d0d13 addi x26,x26,4 + +80003520 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b8: + aes32esmi x8, x8, x10, 0 # perform operation +80003520: 26a40433 aes32esmi x8,x8,x10,0x0 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zkne_aes32esmi_cg_cmp_rd_rs1_b8, Zkne_aes32esmi_cg_cmp_rd_rs1_b8_str) +80003524: 000aa683 lw x13,0(x21) +80003528: 00868863 beq x13,x8,80003538 +8000352c: 4d50476f jal x14,80008200 +80003530: 80003520 .word 0x80003520 +80003534: 8001330a .word 0x8001330a +80003538: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x2800c2b3 +8000353c: 000d2483 lw x9,0(x26) +80003540: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xdcb59107 +80003544: 000d2903 lw x18,0(x26) +80003548: 004d0d13 addi x26,x26,4 + +8000354c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b9: + aes32esmi x9, x9, x18, 3 # perform operation +8000354c: e72484b3 aes32esmi x9,x9,x18,0x3 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zkne_aes32esmi_cg_cmp_rd_rs1_b9, Zkne_aes32esmi_cg_cmp_rd_rs1_b9_str) +80003550: 000aa683 lw x13,0(x21) +80003554: 00968863 beq x13,x9,80003564 +80003558: 4a90476f jal x14,80008200 +8000355c: 8000354c .word 0x8000354c +80003560: 80013346 .word 0x80013346 +80003564: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x56787c39 +80003568: 000d2503 lw x10,0(x26) +8000356c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x9721ea5a +80003570: 000d2e03 lw x28,0(x26) +80003574: 004d0d13 addi x26,x26,4 + +80003578 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b10: + aes32esmi x10, x10, x28, 0 # perform operation +80003578: 27c50533 aes32esmi x10,x10,x28,0x0 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zkne_aes32esmi_cg_cmp_rd_rs1_b10, Zkne_aes32esmi_cg_cmp_rd_rs1_b10_str) +8000357c: 000aa683 lw x13,0(x21) +80003580: 00a68863 beq x13,x10,80003590 +80003584: 47d0476f jal x14,80008200 +80003588: 80003578 .word 0x80003578 +8000358c: 80013382 .word 0x80013382 +80003590: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xd3e079f7 +80003594: 000d2583 lw x11,0(x26) +80003598: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x3bc77863 +8000359c: 000d2903 lw x18,0(x26) +800035a0: 004d0d13 addi x26,x26,4 + +800035a4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b11: + aes32esmi x11, x11, x18, 3 # perform operation +800035a4: e72585b3 aes32esmi x11,x11,x18,0x3 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zkne_aes32esmi_cg_cmp_rd_rs1_b11, Zkne_aes32esmi_cg_cmp_rd_rs1_b11_str) +800035a8: 000aa683 lw x13,0(x21) +800035ac: 00b68863 beq x13,x11,800035bc +800035b0: 4510476f jal x14,80008200 +800035b4: 800035a4 .word 0x800035a4 +800035b8: 800133bf .word 0x800133bf +800035bc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x346543d9 +800035c0: 000d2603 lw x12,0(x26) +800035c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x02aec857 +800035c8: 000d2b03 lw x22,0(x26) +800035cc: 004d0d13 addi x26,x26,4 + +800035d0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b12: + aes32esmi x12, x12, x22, 0 # perform operation +800035d0: 27660633 aes32esmi x12,x12,x22,0x0 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zkne_aes32esmi_cg_cmp_rd_rs1_b12, Zkne_aes32esmi_cg_cmp_rd_rs1_b12_str) +800035d4: 000aa683 lw x13,0(x21) +800035d8: 00c68863 beq x13,x12,800035e8 +800035dc: 4250476f jal x14,80008200 +800035e0: 800035d0 .word 0x800035d0 +800035e4: 800133fc .word 0x800133fc +800035e8: 004a8a93 addi x21,x21,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035ec: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035f0: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x9a97c127 +800035f4: 000d2683 lw x13,0(x26) +800035f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x3be416d9 +800035fc: 000d2b83 lw x23,0(x26) +80003600: 004d0d13 addi x26,x26,4 + +80003604 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b13: + aes32esmi x13, x13, x23, 2 # perform operation +80003604: a77686b3 aes32esmi x13,x13,x23,0x2 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zkne_aes32esmi_cg_cmp_rd_rs1_b13, Zkne_aes32esmi_cg_cmp_rd_rs1_b13_str) +80003608: 000aa383 lw x7,0(x21) +8000360c: 00d38863 beq x7,x13,8000361c +80003610: 3c90446f jal x8,800081d8 +80003614: 80003604 .word 0x80003604 +80003618: 80013439 .word 0x80013439 +8000361c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x5c7f56f1 +80003620: 000d2703 lw x14,0(x26) +80003624: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xe3ed2a00 +80003628: 000d2b03 lw x22,0(x26) +8000362c: 004d0d13 addi x26,x26,4 + +80003630 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b14: + aes32esmi x14, x14, x22, 3 # perform operation +80003630: e7670733 aes32esmi x14,x14,x22,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zkne_aes32esmi_cg_cmp_rd_rs1_b14, Zkne_aes32esmi_cg_cmp_rd_rs1_b14_str) +80003634: 000aa383 lw x7,0(x21) +80003638: 00e38863 beq x7,x14,80003648 +8000363c: 39d0446f jal x8,800081d8 +80003640: 80003630 .word 0x80003630 +80003644: 80013476 .word 0x80013476 +80003648: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xd7072ce8 +8000364c: 000d2783 lw x15,0(x26) +80003650: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x2a16df41 +80003654: 000d2103 lw x2,0(x26) +80003658: 004d0d13 addi x26,x26,4 + +8000365c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b15: + aes32esmi x15, x15, x2, 2 # perform operation +8000365c: a62787b3 aes32esmi x15,x15,x2,0x2 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zkne_aes32esmi_cg_cmp_rd_rs1_b15, Zkne_aes32esmi_cg_cmp_rd_rs1_b15_str) +80003660: 000aa383 lw x7,0(x21) +80003664: 00f38863 beq x7,x15,80003674 +80003668: 3710446f jal x8,800081d8 +8000366c: 8000365c .word 0x8000365c +80003670: 800134b3 .word 0x800134b3 +80003674: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x1cae7176 +80003678: 000d2803 lw x16,0(x26) +8000367c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x9113c6a5 +80003680: 000d2e83 lw x29,0(x26) +80003684: 004d0d13 addi x26,x26,4 + +80003688 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b16: + aes32esmi x16, x16, x29, 3 # perform operation +80003688: e7d80833 aes32esmi x16,x16,x29,0x3 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zkne_aes32esmi_cg_cmp_rd_rs1_b16, Zkne_aes32esmi_cg_cmp_rd_rs1_b16_str) +8000368c: 000aa383 lw x7,0(x21) +80003690: 01038863 beq x7,x16,800036a0 +80003694: 3450446f jal x8,800081d8 +80003698: 80003688 .word 0x80003688 +8000369c: 800134f0 .word 0x800134f0 +800036a0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xf327f82c +800036a4: 000d2883 lw x17,0(x26) +800036a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xd6610b73 +800036ac: 000d2803 lw x16,0(x26) +800036b0: 004d0d13 addi x26,x26,4 + +800036b4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b17: + aes32esmi x17, x17, x16, 1 # perform operation +800036b4: 670888b3 aes32esmi x17,x17,x16,0x1 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zkne_aes32esmi_cg_cmp_rd_rs1_b17, Zkne_aes32esmi_cg_cmp_rd_rs1_b17_str) +800036b8: 000aa383 lw x7,0(x21) +800036bc: 01138863 beq x7,x17,800036cc +800036c0: 3190446f jal x8,800081d8 +800036c4: 800036b4 .word 0x800036b4 +800036c8: 8001352d .word 0x8001352d +800036cc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x0b24a8e2 +800036d0: 000d2903 lw x18,0(x26) +800036d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xb1f37d12 +800036d8: 000d2503 lw x10,0(x26) +800036dc: 004d0d13 addi x26,x26,4 + +800036e0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b18: + aes32esmi x18, x18, x10, 3 # perform operation +800036e0: e6a90933 aes32esmi x18,x18,x10,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zkne_aes32esmi_cg_cmp_rd_rs1_b18, Zkne_aes32esmi_cg_cmp_rd_rs1_b18_str) +800036e4: 000aa383 lw x7,0(x21) +800036e8: 01238863 beq x7,x18,800036f8 +800036ec: 2ed0446f jal x8,800081d8 +800036f0: 800036e0 .word 0x800036e0 +800036f4: 8001356a .word 0x8001356a +800036f8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xbd65263f +800036fc: 000d2983 lw x19,0(x26) +80003700: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x1a95d643 +80003704: 000d2083 lw x1,0(x26) +80003708: 004d0d13 addi x26,x26,4 + +8000370c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b19: + aes32esmi x19, x19, x1, 0 # perform operation +8000370c: 261989b3 aes32esmi x19,x19,x1,0x0 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zkne_aes32esmi_cg_cmp_rd_rs1_b19, Zkne_aes32esmi_cg_cmp_rd_rs1_b19_str) +80003710: 000aa383 lw x7,0(x21) +80003714: 01338863 beq x7,x19,80003724 +80003718: 2c10446f jal x8,800081d8 +8000371c: 8000370c .word 0x8000370c +80003720: 800135a7 .word 0x800135a7 +80003724: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xbb003907 +80003728: 000d2a03 lw x20,0(x26) +8000372c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xa0fca863 +80003730: 000d2903 lw x18,0(x26) +80003734: 004d0d13 addi x26,x26,4 + +80003738 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b20: + aes32esmi x20, x20, x18, 2 # perform operation +80003738: a72a0a33 aes32esmi x20,x20,x18,0x2 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zkne_aes32esmi_cg_cmp_rd_rs1_b20, Zkne_aes32esmi_cg_cmp_rd_rs1_b20_str) +8000373c: 000aa383 lw x7,0(x21) +80003740: 01438863 beq x7,x20,80003750 +80003744: 2950446f jal x8,800081d8 +80003748: 80003738 .word 0x80003738 +8000374c: 800135e4 .word 0x800135e4 +80003750: 004a8a93 addi x21,x21,4 + + mv x22, x21 # switch signature pointer register to avoid conflict with test +80003754: 000a8b13 addi x22,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xb14a37e6 +80003758: 000d2a83 lw x21,0(x26) +8000375c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x15ab8e45 +80003760: 000d2703 lw x14,0(x26) +80003764: 004d0d13 addi x26,x26,4 + +80003768 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b21: + aes32esmi x21, x21, x14, 1 # perform operation +80003768: 66ea8ab3 aes32esmi x21,x21,x14,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zkne_aes32esmi_cg_cmp_rd_rs1_b21, Zkne_aes32esmi_cg_cmp_rd_rs1_b21_str) +8000376c: 000b2383 lw x7,0(x22) +80003770: 01538863 beq x7,x21,80003780 +80003774: 2650446f jal x8,800081d8 +80003778: 80003768 .word 0x80003768 +8000377c: 80013621 .word 0x80013621 +80003780: 004b0b13 addi x22,x22,4 + + mv x30, x22 # switch signature pointer register to avoid conflict with test +80003784: 000b0f13 addi x30,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xd72d702b +80003788: 000d2b03 lw x22,0(x26) +8000378c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0xafa10a88 +80003790: 000d2683 lw x13,0(x26) +80003794: 004d0d13 addi x26,x26,4 + +80003798 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b22: + aes32esmi x22, x22, x13, 3 # perform operation +80003798: e6db0b33 aes32esmi x22,x22,x13,0x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zkne_aes32esmi_cg_cmp_rd_rs1_b22, Zkne_aes32esmi_cg_cmp_rd_rs1_b22_str) +8000379c: 000f2383 lw x7,0(x30) +800037a0: 01638863 beq x7,x22,800037b0 +800037a4: 2350446f jal x8,800081d8 +800037a8: 80003798 .word 0x80003798 +800037ac: 8001365e .word 0x8001365e +800037b0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x87545487 +800037b4: 000d2b83 lw x23,0(x26) +800037b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xa6639097 +800037bc: 000d2983 lw x19,0(x26) +800037c0: 004d0d13 addi x26,x26,4 + +800037c4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b23: + aes32esmi x23, x23, x19, 3 # perform operation +800037c4: e73b8bb3 aes32esmi x23,x23,x19,0x3 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zkne_aes32esmi_cg_cmp_rd_rs1_b23, Zkne_aes32esmi_cg_cmp_rd_rs1_b23_str) +800037c8: 000f2383 lw x7,0(x30) +800037cc: 01738863 beq x7,x23,800037dc +800037d0: 2090446f jal x8,800081d8 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8001369b .word 0x8001369b +800037dc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xb6328fd3 +800037e0: 000d2c03 lw x24,0(x26) +800037e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x7d3f6ded +800037e8: 000d2583 lw x11,0(x26) +800037ec: 004d0d13 addi x26,x26,4 + +800037f0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b24: + aes32esmi x24, x24, x11, 3 # perform operation +800037f0: e6bc0c33 aes32esmi x24,x24,x11,0x3 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zkne_aes32esmi_cg_cmp_rd_rs1_b24, Zkne_aes32esmi_cg_cmp_rd_rs1_b24_str) +800037f4: 000f2383 lw x7,0(x30) +800037f8: 01838863 beq x7,x24,80003808 +800037fc: 1dd0446f jal x8,800081d8 +80003800: 800037f0 .word 0x800037f0 +80003804: 800136d8 .word 0x800136d8 +80003808: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xb4adfb95 +8000380c: 000d2c83 lw x25,0(x26) +80003810: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x1231cd9c +80003814: 000d2d83 lw x27,0(x26) +80003818: 004d0d13 addi x26,x26,4 + +8000381c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b25: + aes32esmi x25, x25, x27, 0 # perform operation +8000381c: 27bc8cb3 aes32esmi x25,x25,x27,0x0 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zkne_aes32esmi_cg_cmp_rd_rs1_b25, Zkne_aes32esmi_cg_cmp_rd_rs1_b25_str) +80003820: 000f2383 lw x7,0(x30) +80003824: 01938863 beq x7,x25,80003834 +80003828: 1b10446f jal x8,800081d8 +8000382c: 8000381c .word 0x8000381c +80003830: 80013715 .word 0x80013715 +80003834: 004f0f13 addi x30,x30,4 + + mv x11, x26 # switch data pointer register to avoid conflict with test +80003838: 000d0593 addi x11,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x006ecdf2 +8000383c: 0005ad03 lw x26,0(x11) +80003840: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x101c01ec +80003844: 0005a003 lw x0,0(x11) +80003848: 00458593 addi x11,x11,4 + +8000384c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b26: + aes32esmi x26, x26, x0, 0 # perform operation +8000384c: 260d0d33 aes32esmi x26,x26,x0,0x0 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zkne_aes32esmi_cg_cmp_rd_rs1_b26, Zkne_aes32esmi_cg_cmp_rd_rs1_b26_str) +80003850: 000f2383 lw x7,0(x30) +80003854: 01a38863 beq x7,x26,80003864 +80003858: 1810446f jal x8,800081d8 +8000385c: 8000384c .word 0x8000384c +80003860: 80013752 .word 0x80013752 +80003864: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0xd78b3a2d +80003868: 0005ad83 lw x27,0(x11) +8000386c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0xf62b798c +80003870: 0005a483 lw x9,0(x11) +80003874: 00458593 addi x11,x11,4 + +80003878 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b27: + aes32esmi x27, x27, x9, 1 # perform operation +80003878: 669d8db3 aes32esmi x27,x27,x9,0x1 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zkne_aes32esmi_cg_cmp_rd_rs1_b27, Zkne_aes32esmi_cg_cmp_rd_rs1_b27_str) +8000387c: 000f2383 lw x7,0(x30) +80003880: 01b38863 beq x7,x27,80003890 +80003884: 1550446f jal x8,800081d8 +80003888: 80003878 .word 0x80003878 +8000388c: 8001378f .word 0x8001378f +80003890: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x3946ed93 +80003894: 0005ae03 lw x28,0(x11) +80003898: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x27adc1dd +8000389c: 0005ab03 lw x22,0(x11) +800038a0: 00458593 addi x11,x11,4 + +800038a4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b28: + aes32esmi x28, x28, x22, 2 # perform operation +800038a4: a76e0e33 aes32esmi x28,x28,x22,0x2 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zkne_aes32esmi_cg_cmp_rd_rs1_b28, Zkne_aes32esmi_cg_cmp_rd_rs1_b28_str) +800038a8: 000f2383 lw x7,0(x30) +800038ac: 01c38863 beq x7,x28,800038bc +800038b0: 1290446f jal x8,800081d8 +800038b4: 800038a4 .word 0x800038a4 +800038b8: 800137cc .word 0x800137cc +800038bc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x1d84c2be +800038c0: 0005ae83 lw x29,0(x11) +800038c4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xa2e1ba7d +800038c8: 0005a283 lw x5,0(x11) +800038cc: 00458593 addi x11,x11,4 + +800038d0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b29: + aes32esmi x29, x29, x5, 1 # perform operation +800038d0: 665e8eb3 aes32esmi x29,x29,x5,0x1 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zkne_aes32esmi_cg_cmp_rd_rs1_b29, Zkne_aes32esmi_cg_cmp_rd_rs1_b29_str) +800038d4: 000f2383 lw x7,0(x30) +800038d8: 01d38863 beq x7,x29,800038e8 +800038dc: 0fd0446f jal x8,800081d8 +800038e0: 800038d0 .word 0x800038d0 +800038e4: 80013809 .word 0x80013809 +800038e8: 004f0f13 addi x30,x30,4 + + mv x25, x30 # switch signature pointer register to avoid conflict with test +800038ec: 000f0c93 addi x25,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0xe0e428e9 +800038f0: 0005af03 lw x30,0(x11) +800038f4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xc9003b7e +800038f8: 0005a503 lw x10,0(x11) +800038fc: 00458593 addi x11,x11,4 + +80003900 : +Zkne_aes32esmi_cg_cmp_rd_rs1_b30: + aes32esmi x30, x30, x10, 0 # perform operation +80003900: 26af0f33 aes32esmi x30,x30,x10,0x0 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes32esmi_cg_cmp_rd_rs1_b30, Zkne_aes32esmi_cg_cmp_rd_rs1_b30_str) +80003904: 000ca383 lw x7,0(x25) +80003908: 01e38863 beq x7,x30,80003918 +8000390c: 0cd0446f jal x8,800081d8 +80003910: 80003900 .word 0x80003900 +80003914: 80013846 .word 0x80013846 +80003918: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x38607337 +8000391c: 0005af83 lw x31,0(x11) +80003920: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x2c0fb9aa +80003924: 0005a003 lw x0,0(x11) +80003928: 00458593 addi x11,x11,4 + +8000392c : +Zkne_aes32esmi_cg_cmp_rd_rs1_b31: + aes32esmi x31, x31, x0, 1 # perform operation +8000392c: 660f8fb3 aes32esmi x31,x31,x0,0x1 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes32esmi_cg_cmp_rd_rs1_b31, Zkne_aes32esmi_cg_cmp_rd_rs1_b31_str) +80003930: 000ca383 lw x7,0(x25) +80003934: 01f38863 beq x7,x31,80003944 +80003938: 0a10446f jal x8,800081d8 +8000393c: 8000392c .word 0x8000392c +80003940: 80013883 .word 0x80013883 +80003944: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xa17974e3 +80003948: 0005ae03 lw x28,0(x11) +8000394c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0xa6cca43b +80003950: 0005a003 lw x0,0(x11) +80003954: 00458593 addi x11,x11,4 + +80003958 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b0: + aes32esmi x0, x28, x0, 3 # perform operation +80003958: e60e0033 aes32esmi x0,x28,x0,0x3 + # Check if x0 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x0, Zkne_aes32esmi_cg_cmp_rd_rs2_b0, Zkne_aes32esmi_cg_cmp_rd_rs2_b0_str) +8000395c: 000ca383 lw x7,0(x25) +80003960: 00038863 beq x7,x0,80003970 +80003964: 0750446f jal x8,800081d8 +80003968: 80003958 .word 0x80003958 +8000396c: 800138c0 .word 0x800138c0 +80003970: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x9026ed19 +80003974: 0005a883 lw x17,0(x11) +80003978: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x47ce3b13 +8000397c: 0005a083 lw x1,0(x11) +80003980: 00458593 addi x11,x11,4 + +80003984 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b1: + aes32esmi x1, x17, x1, 3 # perform operation +80003984: e61880b3 aes32esmi x1,x17,x1,0x3 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes32esmi_cg_cmp_rd_rs2_b1, Zkne_aes32esmi_cg_cmp_rd_rs2_b1_str) +80003988: 000ca383 lw x7,0(x25) +8000398c: 00138863 beq x7,x1,8000399c +80003990: 0490446f jal x8,800081d8 +80003994: 80003984 .word 0x80003984 +80003998: 800138fc .word 0x800138fc +8000399c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x41ceb66f +800039a0: 0005a983 lw x19,0(x11) +800039a4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x76a630f4 +800039a8: 0005a103 lw x2,0(x11) +800039ac: 00458593 addi x11,x11,4 + +800039b0 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b2: + aes32esmi x2, x19, x2, 3 # perform operation +800039b0: e6298133 aes32esmi x2,x19,x2,0x3 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes32esmi_cg_cmp_rd_rs2_b2, Zkne_aes32esmi_cg_cmp_rd_rs2_b2_str) +800039b4: 000ca383 lw x7,0(x25) +800039b8: 00238863 beq x7,x2,800039c8 +800039bc: 01d0446f jal x8,800081d8 +800039c0: 800039b0 .word 0x800039b0 +800039c4: 80013938 .word 0x80013938 +800039c8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0xee133bf6 +800039cc: 0005af03 lw x30,0(x11) +800039d0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xc189a1e1 +800039d4: 0005a183 lw x3,0(x11) +800039d8: 00458593 addi x11,x11,4 + +800039dc : +Zkne_aes32esmi_cg_cmp_rd_rs2_b3: + aes32esmi x3, x30, x3, 1 # perform operation +800039dc: 663f01b3 aes32esmi x3,x30,x3,0x1 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes32esmi_cg_cmp_rd_rs2_b3, Zkne_aes32esmi_cg_cmp_rd_rs2_b3_str) +800039e0: 000ca383 lw x7,0(x25) +800039e4: 00338863 beq x7,x3,800039f4 +800039e8: 7f00446f jal x8,800081d8 +800039ec: 800039dc .word 0x800039dc +800039f0: 80013974 .word 0x80013974 +800039f4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x4a9e6ed2 +800039f8: 0005a303 lw x6,0(x11) +800039fc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xd14fadca +80003a00: 0005a203 lw x4,0(x11) +80003a04: 00458593 addi x11,x11,4 + +80003a08 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b4: + aes32esmi x4, x6, x4, 1 # perform operation +80003a08: 66430233 aes32esmi x4,x6,x4,0x1 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes32esmi_cg_cmp_rd_rs2_b4, Zkne_aes32esmi_cg_cmp_rd_rs2_b4_str) +80003a0c: 000ca383 lw x7,0(x25) +80003a10: 00438863 beq x7,x4,80003a20 +80003a14: 7c40446f jal x8,800081d8 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 800139b0 .word 0x800139b0 +80003a20: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xab3668de +80003a24: 0005a203 lw x4,0(x11) +80003a28: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xaf6138fa +80003a2c: 0005a283 lw x5,0(x11) +80003a30: 00458593 addi x11,x11,4 + +80003a34 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b5: + aes32esmi x5, x4, x5, 0 # perform operation +80003a34: 265202b3 aes32esmi x5,x4,x5,0x0 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes32esmi_cg_cmp_rd_rs2_b5, Zkne_aes32esmi_cg_cmp_rd_rs2_b5_str) +80003a38: 000ca383 lw x7,0(x25) +80003a3c: 00538863 beq x7,x5,80003a4c +80003a40: 7980446f jal x8,800081d8 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 800139ec .word 0x800139ec +80003a4c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x4802b9c1 +80003a50: 0005ae83 lw x29,0(x11) +80003a54: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x89bb9b0c +80003a58: 0005a303 lw x6,0(x11) +80003a5c: 00458593 addi x11,x11,4 + +80003a60 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b6: + aes32esmi x6, x29, x6, 0 # perform operation +80003a60: 266e8333 aes32esmi x6,x29,x6,0x0 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes32esmi_cg_cmp_rd_rs2_b6, Zkne_aes32esmi_cg_cmp_rd_rs2_b6_str) +80003a64: 000ca383 lw x7,0(x25) +80003a68: 00638863 beq x7,x6,80003a78 +80003a6c: 76c0446f jal x8,800081d8 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 80013a28 .word 0x80013a28 +80003a78: 004c8c93 addi x25,x25,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a7c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a80: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x9b977522 +80003a84: 0005ad03 lw x26,0(x11) +80003a88: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x8345ef7e +80003a8c: 0005a383 lw x7,0(x11) +80003a90: 00458593 addi x11,x11,4 + +80003a94 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b7: + aes32esmi x7, x26, x7, 2 # perform operation +80003a94: a67d03b3 aes32esmi x7,x26,x7,0x2 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zkne_aes32esmi_cg_cmp_rd_rs2_b7, Zkne_aes32esmi_cg_cmp_rd_rs2_b7_str) +80003a98: 000ca203 lw x4,0(x25) +80003a9c: 00720863 beq x4,x7,80003aac +80003aa0: 720042ef jal x5,800081c0 +80003aa4: 80003a94 .word 0x80003a94 +80003aa8: 80013a64 .word 0x80013a64 +80003aac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xb194f282 +80003ab0: 0005ac03 lw x24,0(x11) +80003ab4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xc9cacfcf +80003ab8: 0005a403 lw x8,0(x11) +80003abc: 00458593 addi x11,x11,4 + +80003ac0 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b8: + aes32esmi x8, x24, x8, 0 # perform operation +80003ac0: 268c0433 aes32esmi x8,x24,x8,0x0 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zkne_aes32esmi_cg_cmp_rd_rs2_b8, Zkne_aes32esmi_cg_cmp_rd_rs2_b8_str) +80003ac4: 000ca203 lw x4,0(x25) +80003ac8: 00820863 beq x4,x8,80003ad8 +80003acc: 6f4042ef jal x5,800081c0 +80003ad0: 80003ac0 .word 0x80003ac0 +80003ad4: 80013aa0 .word 0x80013aa0 +80003ad8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x1d3f214b +80003adc: 0005ad83 lw x27,0(x11) +80003ae0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x698a25c1 +80003ae4: 0005a483 lw x9,0(x11) +80003ae8: 00458593 addi x11,x11,4 + +80003aec : +Zkne_aes32esmi_cg_cmp_rd_rs2_b9: + aes32esmi x9, x27, x9, 0 # perform operation +80003aec: 269d84b3 aes32esmi x9,x27,x9,0x0 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zkne_aes32esmi_cg_cmp_rd_rs2_b9, Zkne_aes32esmi_cg_cmp_rd_rs2_b9_str) +80003af0: 000ca203 lw x4,0(x25) +80003af4: 00920863 beq x4,x9,80003b04 +80003af8: 6c8042ef jal x5,800081c0 +80003afc: 80003aec .word 0x80003aec +80003b00: 80013adc .word 0x80013adc +80003b04: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xc669da64 +80003b08: 0005ae03 lw x28,0(x11) +80003b0c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x0fb6b9b2 +80003b10: 0005a503 lw x10,0(x11) +80003b14: 00458593 addi x11,x11,4 + +80003b18 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b10: + aes32esmi x10, x28, x10, 3 # perform operation +80003b18: e6ae0533 aes32esmi x10,x28,x10,0x3 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zkne_aes32esmi_cg_cmp_rd_rs2_b10, Zkne_aes32esmi_cg_cmp_rd_rs2_b10_str) +80003b1c: 000ca203 lw x4,0(x25) +80003b20: 00a20863 beq x4,x10,80003b30 +80003b24: 69c042ef jal x5,800081c0 +80003b28: 80003b18 .word 0x80003b18 +80003b2c: 80013b18 .word 0x80013b18 +80003b30: 004c8c93 addi x25,x25,4 + + mv x2, x11 # switch data pointer register to avoid conflict with test +80003b34: 00058113 addi x2,x11,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x51aebf35 +80003b38: 00012403 lw x8,0(x2) +80003b3c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x41a8e318 +80003b40: 00012583 lw x11,0(x2) +80003b44: 00410113 addi x2,x2,4 + +80003b48 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b11: + aes32esmi x11, x8, x11, 2 # perform operation +80003b48: a6b405b3 aes32esmi x11,x8,x11,0x2 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zkne_aes32esmi_cg_cmp_rd_rs2_b11, Zkne_aes32esmi_cg_cmp_rd_rs2_b11_str) +80003b4c: 000ca203 lw x4,0(x25) +80003b50: 00b20863 beq x4,x11,80003b60 +80003b54: 66c042ef jal x5,800081c0 +80003b58: 80003b48 .word 0x80003b48 +80003b5c: 80013b55 .word 0x80013b55 +80003b60: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xf2d4eb5d +80003b64: 00012703 lw x14,0(x2) +80003b68: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xb57c4b87 +80003b6c: 00012603 lw x12,0(x2) +80003b70: 00410113 addi x2,x2,4 + +80003b74 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b12: + aes32esmi x12, x14, x12, 1 # perform operation +80003b74: 66c70633 aes32esmi x12,x14,x12,0x1 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zkne_aes32esmi_cg_cmp_rd_rs2_b12, Zkne_aes32esmi_cg_cmp_rd_rs2_b12_str) +80003b78: 000ca203 lw x4,0(x25) +80003b7c: 00c20863 beq x4,x12,80003b8c +80003b80: 640042ef jal x5,800081c0 +80003b84: 80003b74 .word 0x80003b74 +80003b88: 80013b92 .word 0x80013b92 +80003b8c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x49d81025 +80003b90: 00012583 lw x11,0(x2) +80003b94: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x1f31d401 +80003b98: 00012683 lw x13,0(x2) +80003b9c: 00410113 addi x2,x2,4 + +80003ba0 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b13: + aes32esmi x13, x11, x13, 3 # perform operation +80003ba0: e6d586b3 aes32esmi x13,x11,x13,0x3 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zkne_aes32esmi_cg_cmp_rd_rs2_b13, Zkne_aes32esmi_cg_cmp_rd_rs2_b13_str) +80003ba4: 000ca203 lw x4,0(x25) +80003ba8: 00d20863 beq x4,x13,80003bb8 +80003bac: 614042ef jal x5,800081c0 +80003bb0: 80003ba0 .word 0x80003ba0 +80003bb4: 80013bcf .word 0x80013bcf +80003bb8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x627a309a +80003bbc: 00012483 lw x9,0(x2) +80003bc0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x637b6e31 +80003bc4: 00012703 lw x14,0(x2) +80003bc8: 00410113 addi x2,x2,4 + +80003bcc : +Zkne_aes32esmi_cg_cmp_rd_rs2_b14: + aes32esmi x14, x9, x14, 3 # perform operation +80003bcc: e6e48733 aes32esmi x14,x9,x14,0x3 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes32esmi_cg_cmp_rd_rs2_b14, Zkne_aes32esmi_cg_cmp_rd_rs2_b14_str) +80003bd0: 000ca203 lw x4,0(x25) +80003bd4: 00e20863 beq x4,x14,80003be4 +80003bd8: 5e8042ef jal x5,800081c0 +80003bdc: 80003bcc .word 0x80003bcc +80003be0: 80013c0c .word 0x80013c0c +80003be4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x0fdbb36f +80003be8: 00012e83 lw x29,0(x2) +80003bec: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x9bf7bebe +80003bf0: 00012783 lw x15,0(x2) +80003bf4: 00410113 addi x2,x2,4 + +80003bf8 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b15: + aes32esmi x15, x29, x15, 2 # perform operation +80003bf8: a6fe87b3 aes32esmi x15,x29,x15,0x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zkne_aes32esmi_cg_cmp_rd_rs2_b15, Zkne_aes32esmi_cg_cmp_rd_rs2_b15_str) +80003bfc: 000ca203 lw x4,0(x25) +80003c00: 00f20863 beq x4,x15,80003c10 +80003c04: 5bc042ef jal x5,800081c0 +80003c08: 80003bf8 .word 0x80003bf8 +80003c0c: 80013c49 .word 0x80013c49 +80003c10: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xcf4df96b +80003c14: 00012e83 lw x29,0(x2) +80003c18: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xd5bc5b52 +80003c1c: 00012803 lw x16,0(x2) +80003c20: 00410113 addi x2,x2,4 + +80003c24 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b16: + aes32esmi x16, x29, x16, 2 # perform operation +80003c24: a70e8833 aes32esmi x16,x29,x16,0x2 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zkne_aes32esmi_cg_cmp_rd_rs2_b16, Zkne_aes32esmi_cg_cmp_rd_rs2_b16_str) +80003c28: 000ca203 lw x4,0(x25) +80003c2c: 01020863 beq x4,x16,80003c3c +80003c30: 590042ef jal x5,800081c0 +80003c34: 80003c24 .word 0x80003c24 +80003c38: 80013c86 .word 0x80013c86 +80003c3c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x465b11b5 +80003c40: 00012983 lw x19,0(x2) +80003c44: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x5b6958c6 +80003c48: 00012883 lw x17,0(x2) +80003c4c: 00410113 addi x2,x2,4 + +80003c50 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b17: + aes32esmi x17, x19, x17, 2 # perform operation +80003c50: a71988b3 aes32esmi x17,x19,x17,0x2 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes32esmi_cg_cmp_rd_rs2_b17, Zkne_aes32esmi_cg_cmp_rd_rs2_b17_str) +80003c54: 000ca203 lw x4,0(x25) +80003c58: 01120863 beq x4,x17,80003c68 +80003c5c: 564042ef jal x5,800081c0 +80003c60: 80003c50 .word 0x80003c50 +80003c64: 80013cc3 .word 0x80013cc3 +80003c68: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x2c5e93ee +80003c6c: 00012583 lw x11,0(x2) +80003c70: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xdadac104 +80003c74: 00012903 lw x18,0(x2) +80003c78: 00410113 addi x2,x2,4 + +80003c7c : +Zkne_aes32esmi_cg_cmp_rd_rs2_b18: + aes32esmi x18, x11, x18, 1 # perform operation +80003c7c: 67258933 aes32esmi x18,x11,x18,0x1 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zkne_aes32esmi_cg_cmp_rd_rs2_b18, Zkne_aes32esmi_cg_cmp_rd_rs2_b18_str) +80003c80: 000ca203 lw x4,0(x25) +80003c84: 01220863 beq x4,x18,80003c94 +80003c88: 538042ef jal x5,800081c0 +80003c8c: 80003c7c .word 0x80003c7c +80003c90: 80013d00 .word 0x80013d00 +80003c94: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x9caf945a +80003c98: 00012f83 lw x31,0(x2) +80003c9c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xeb42fb5f +80003ca0: 00012983 lw x19,0(x2) +80003ca4: 00410113 addi x2,x2,4 + +80003ca8 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b19: + aes32esmi x19, x31, x19, 1 # perform operation +80003ca8: 673f89b3 aes32esmi x19,x31,x19,0x1 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes32esmi_cg_cmp_rd_rs2_b19, Zkne_aes32esmi_cg_cmp_rd_rs2_b19_str) +80003cac: 000ca203 lw x4,0(x25) +80003cb0: 01320863 beq x4,x19,80003cc0 +80003cb4: 50c042ef jal x5,800081c0 +80003cb8: 80003ca8 .word 0x80003ca8 +80003cbc: 80013d3d .word 0x80013d3d +80003cc0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x9c956f76 +80003cc4: 00012a83 lw x21,0(x2) +80003cc8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xbac983f5 +80003ccc: 00012a03 lw x20,0(x2) +80003cd0: 00410113 addi x2,x2,4 + +80003cd4 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b20: + aes32esmi x20, x21, x20, 2 # perform operation +80003cd4: a74a8a33 aes32esmi x20,x21,x20,0x2 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zkne_aes32esmi_cg_cmp_rd_rs2_b20, Zkne_aes32esmi_cg_cmp_rd_rs2_b20_str) +80003cd8: 000ca203 lw x4,0(x25) +80003cdc: 01420863 beq x4,x20,80003cec +80003ce0: 4e0042ef jal x5,800081c0 +80003ce4: 80003cd4 .word 0x80003cd4 +80003ce8: 80013d7a .word 0x80013d7a +80003cec: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xa082c561 +80003cf0: 00012583 lw x11,0(x2) +80003cf4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x1d251ab4 +80003cf8: 00012a83 lw x21,0(x2) +80003cfc: 00410113 addi x2,x2,4 + +80003d00 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b21: + aes32esmi x21, x11, x21, 0 # perform operation +80003d00: 27558ab3 aes32esmi x21,x11,x21,0x0 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zkne_aes32esmi_cg_cmp_rd_rs2_b21, Zkne_aes32esmi_cg_cmp_rd_rs2_b21_str) +80003d04: 000ca203 lw x4,0(x25) +80003d08: 01520863 beq x4,x21,80003d18 +80003d0c: 4b4042ef jal x5,800081c0 +80003d10: 80003d00 .word 0x80003d00 +80003d14: 80013db7 .word 0x80013db7 +80003d18: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x852e02a0 +80003d1c: 00012003 lw x0,0(x2) +80003d20: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xaed43ba5 +80003d24: 00012b03 lw x22,0(x2) +80003d28: 00410113 addi x2,x2,4 + +80003d2c : +Zkne_aes32esmi_cg_cmp_rd_rs2_b22: + aes32esmi x22, x0, x22, 2 # perform operation +80003d2c: a7600b33 aes32esmi x22,x0,x22,0x2 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes32esmi_cg_cmp_rd_rs2_b22, Zkne_aes32esmi_cg_cmp_rd_rs2_b22_str) +80003d30: 000ca203 lw x4,0(x25) +80003d34: 01620863 beq x4,x22,80003d44 +80003d38: 488042ef jal x5,800081c0 +80003d3c: 80003d2c .word 0x80003d2c +80003d40: 80013df4 .word 0x80013df4 +80003d44: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x71ca4fc4 +80003d48: 00012983 lw x19,0(x2) +80003d4c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xd749a3b7 +80003d50: 00012b83 lw x23,0(x2) +80003d54: 00410113 addi x2,x2,4 + +80003d58 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b23: + aes32esmi x23, x19, x23, 3 # perform operation +80003d58: e7798bb3 aes32esmi x23,x19,x23,0x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zkne_aes32esmi_cg_cmp_rd_rs2_b23, Zkne_aes32esmi_cg_cmp_rd_rs2_b23_str) +80003d5c: 000ca203 lw x4,0(x25) +80003d60: 01720863 beq x4,x23,80003d70 +80003d64: 45c042ef jal x5,800081c0 +80003d68: 80003d58 .word 0x80003d58 +80003d6c: 80013e31 .word 0x80013e31 +80003d70: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x26e474fa +80003d74: 00012e83 lw x29,0(x2) +80003d78: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x4da8bd20 +80003d7c: 00012c03 lw x24,0(x2) +80003d80: 00410113 addi x2,x2,4 + +80003d84 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b24: + aes32esmi x24, x29, x24, 3 # perform operation +80003d84: e78e8c33 aes32esmi x24,x29,x24,0x3 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes32esmi_cg_cmp_rd_rs2_b24, Zkne_aes32esmi_cg_cmp_rd_rs2_b24_str) +80003d88: 000ca203 lw x4,0(x25) +80003d8c: 01820863 beq x4,x24,80003d9c +80003d90: 430042ef jal x5,800081c0 +80003d94: 80003d84 .word 0x80003d84 +80003d98: 80013e6e .word 0x80013e6e +80003d9c: 004c8c93 addi x25,x25,4 + + mv x19, x25 # switch signature pointer register to avoid conflict with test +80003da0: 000c8993 addi x19,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x25755bf3 +80003da4: 00012303 lw x6,0(x2) +80003da8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x800e5db4 +80003dac: 00012c83 lw x25,0(x2) +80003db0: 00410113 addi x2,x2,4 + +80003db4 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b25: + aes32esmi x25, x6, x25, 2 # perform operation +80003db4: a7930cb3 aes32esmi x25,x6,x25,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zkne_aes32esmi_cg_cmp_rd_rs2_b25, Zkne_aes32esmi_cg_cmp_rd_rs2_b25_str) +80003db8: 0009a203 lw x4,0(x19) +80003dbc: 01920863 beq x4,x25,80003dcc +80003dc0: 400042ef jal x5,800081c0 +80003dc4: 80003db4 .word 0x80003db4 +80003dc8: 80013eab .word 0x80013eab +80003dcc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x19714891 +80003dd0: 00012f03 lw x30,0(x2) +80003dd4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xa0e09db2 +80003dd8: 00012d03 lw x26,0(x2) +80003ddc: 00410113 addi x2,x2,4 + +80003de0 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b26: + aes32esmi x26, x30, x26, 3 # perform operation +80003de0: e7af0d33 aes32esmi x26,x30,x26,0x3 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zkne_aes32esmi_cg_cmp_rd_rs2_b26, Zkne_aes32esmi_cg_cmp_rd_rs2_b26_str) +80003de4: 0009a203 lw x4,0(x19) +80003de8: 01a20863 beq x4,x26,80003df8 +80003dec: 3d4042ef jal x5,800081c0 +80003df0: 80003de0 .word 0x80003de0 +80003df4: 80013ee8 .word 0x80013ee8 +80003df8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x2e212ac8 +80003dfc: 00012c83 lw x25,0(x2) +80003e00: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x38c09c21 +80003e04: 00012d83 lw x27,0(x2) +80003e08: 00410113 addi x2,x2,4 + +80003e0c : +Zkne_aes32esmi_cg_cmp_rd_rs2_b27: + aes32esmi x27, x25, x27, 3 # perform operation +80003e0c: e7bc8db3 aes32esmi x27,x25,x27,0x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zkne_aes32esmi_cg_cmp_rd_rs2_b27, Zkne_aes32esmi_cg_cmp_rd_rs2_b27_str) +80003e10: 0009a203 lw x4,0(x19) +80003e14: 01b20863 beq x4,x27,80003e24 +80003e18: 3a8042ef jal x5,800081c0 +80003e1c: 80003e0c .word 0x80003e0c +80003e20: 80013f25 .word 0x80013f25 +80003e24: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xe4120a0a +80003e28: 00012c03 lw x24,0(x2) +80003e2c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x1293a36d +80003e30: 00012e03 lw x28,0(x2) +80003e34: 00410113 addi x2,x2,4 + +80003e38 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b28: + aes32esmi x28, x24, x28, 1 # perform operation +80003e38: 67cc0e33 aes32esmi x28,x24,x28,0x1 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zkne_aes32esmi_cg_cmp_rd_rs2_b28, Zkne_aes32esmi_cg_cmp_rd_rs2_b28_str) +80003e3c: 0009a203 lw x4,0(x19) +80003e40: 01c20863 beq x4,x28,80003e50 +80003e44: 37c042ef jal x5,800081c0 +80003e48: 80003e38 .word 0x80003e38 +80003e4c: 80013f62 .word 0x80013f62 +80003e50: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xbcf873e6 +80003e54: 00012a83 lw x21,0(x2) +80003e58: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xe9eefb7c +80003e5c: 00012e83 lw x29,0(x2) +80003e60: 00410113 addi x2,x2,4 + +80003e64 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b29: + aes32esmi x29, x21, x29, 1 # perform operation +80003e64: 67da8eb3 aes32esmi x29,x21,x29,0x1 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zkne_aes32esmi_cg_cmp_rd_rs2_b29, Zkne_aes32esmi_cg_cmp_rd_rs2_b29_str) +80003e68: 0009a203 lw x4,0(x19) +80003e6c: 01d20863 beq x4,x29,80003e7c +80003e70: 350042ef jal x5,800081c0 +80003e74: 80003e64 .word 0x80003e64 +80003e78: 80013f9f .word 0x80013f9f +80003e7c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xe5266963 +80003e80: 00012483 lw x9,0(x2) +80003e84: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x80292b53 +80003e88: 00012f03 lw x30,0(x2) +80003e8c: 00410113 addi x2,x2,4 + +80003e90 : +Zkne_aes32esmi_cg_cmp_rd_rs2_b30: + aes32esmi x30, x9, x30, 3 # perform operation +80003e90: e7e48f33 aes32esmi x30,x9,x30,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zkne_aes32esmi_cg_cmp_rd_rs2_b30, Zkne_aes32esmi_cg_cmp_rd_rs2_b30_str) +80003e94: 0009a203 lw x4,0(x19) +80003e98: 01e20863 beq x4,x30,80003ea8 +80003e9c: 324042ef jal x5,800081c0 +80003ea0: 80003e90 .word 0x80003e90 +80003ea4: 80013fdc .word 0x80013fdc +80003ea8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xa9a2aaad +80003eac: 00012183 lw x3,0(x2) +80003eb0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xb2d2d689 +80003eb4: 00012f83 lw x31,0(x2) +80003eb8: 00410113 addi x2,x2,4 + +80003ebc : +Zkne_aes32esmi_cg_cmp_rd_rs2_b31: + aes32esmi x31, x3, x31, 2 # perform operation +80003ebc: a7f18fb3 aes32esmi x31,x3,x31,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zkne_aes32esmi_cg_cmp_rd_rs2_b31, Zkne_aes32esmi_cg_cmp_rd_rs2_b31_str) +80003ec0: 0009a203 lw x4,0(x19) +80003ec4: 01f20863 beq x4,x31,80003ed4 +80003ec8: 2f8042ef jal x5,800081c0 +80003ecc: 80003ebc .word 0x80003ebc +80003ed0: 80014019 .word 0x80014019 +80003ed4: 00498993 addi x19,x19,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x11833eda +80003ed8: 00012003 lw x0,0(x2) +80003edc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xc5ac8d23 +80003ee0: 00012003 lw x0,0(x2) +80003ee4: 00410113 addi x2,x2,4 + +80003ee8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b0: + aes32esmi x0, x0, x0, 2 # perform operation +80003ee8: a6000033 aes32esmi x0,x0,x0,0x2 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b0, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b0_str) +80003eec: 0009a203 lw x4,0(x19) +80003ef0: 00020863 beq x4,x0,80003f00 +80003ef4: 2cc042ef jal x5,800081c0 +80003ef8: 80003ee8 .word 0x80003ee8 +80003efc: 80014056 .word 0x80014056 +80003f00: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xca8823a0 +80003f04: 00012083 lw x1,0(x2) +80003f08: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0af8ffac +80003f0c: 00012083 lw x1,0(x2) +80003f10: 00410113 addi x2,x2,4 + +80003f14 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b1: + aes32esmi x1, x1, x1, 2 # perform operation +80003f14: a61080b3 aes32esmi x1,x1,x1,0x2 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b1, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b1_str) +80003f18: 0009a203 lw x4,0(x19) +80003f1c: 00120863 beq x4,x1,80003f2c +80003f20: 2a0042ef jal x5,800081c0 +80003f24: 80003f14 .word 0x80003f14 +80003f28: 80014096 .word 0x80014096 +80003f2c: 00498993 addi x19,x19,4 + + mv x15, x2 # switch data pointer register to avoid conflict with test +80003f30: 00010793 addi x15,x2,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xe0496030 +80003f34: 0007a103 lw x2,0(x15) +80003f38: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x334cfad8 +80003f3c: 0007a103 lw x2,0(x15) +80003f40: 00478793 addi x15,x15,4 + +80003f44 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b2: + aes32esmi x2, x2, x2, 0 # perform operation +80003f44: 26210133 aes32esmi x2,x2,x2,0x0 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b2, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b2_str) +80003f48: 0009a203 lw x4,0(x19) +80003f4c: 00220863 beq x4,x2,80003f5c +80003f50: 270042ef jal x5,800081c0 +80003f54: 80003f44 .word 0x80003f44 +80003f58: 800140d6 .word 0x800140d6 +80003f5c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x54a754f5 +80003f60: 0007a183 lw x3,0(x15) +80003f64: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xcf382668 +80003f68: 0007a183 lw x3,0(x15) +80003f6c: 00478793 addi x15,x15,4 + +80003f70 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b3: + aes32esmi x3, x3, x3, 1 # perform operation +80003f70: 663181b3 aes32esmi x3,x3,x3,0x1 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b3, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b3_str) +80003f74: 0009a203 lw x4,0(x19) +80003f78: 00320863 beq x4,x3,80003f88 +80003f7c: 244042ef jal x5,800081c0 +80003f80: 80003f70 .word 0x80003f70 +80003f84: 80014116 .word 0x80014116 +80003f88: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003f8c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003f90: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x5d13aa28 +80003f94: 0007a203 lw x4,0(x15) +80003f98: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xc1e23dcf +80003f9c: 0007a203 lw x4,0(x15) +80003fa0: 00478793 addi x15,x15,4 + +80003fa4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b4: + aes32esmi x4, x4, x4, 2 # perform operation +80003fa4: a6420233 aes32esmi x4,x4,x4,0x2 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b4, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b4_str) +80003fa8: 0009a383 lw x7,0(x19) +80003fac: 00438863 beq x7,x4,80003fbc +80003fb0: 2280446f jal x8,800081d8 +80003fb4: 80003fa4 .word 0x80003fa4 +80003fb8: 80014156 .word 0x80014156 +80003fbc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x5e8395bd +80003fc0: 0007a283 lw x5,0(x15) +80003fc4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xfd7862c4 +80003fc8: 0007a283 lw x5,0(x15) +80003fcc: 00478793 addi x15,x15,4 + +80003fd0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b5: + aes32esmi x5, x5, x5, 1 # perform operation +80003fd0: 665282b3 aes32esmi x5,x5,x5,0x1 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b5, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b5_str) +80003fd4: 0009a383 lw x7,0(x19) +80003fd8: 00538863 beq x7,x5,80003fe8 +80003fdc: 1fc0446f jal x8,800081d8 +80003fe0: 80003fd0 .word 0x80003fd0 +80003fe4: 80014196 .word 0x80014196 +80003fe8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xfb9ef6e1 +80003fec: 0007a303 lw x6,0(x15) +80003ff0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xad87957b +80003ff4: 0007a303 lw x6,0(x15) +80003ff8: 00478793 addi x15,x15,4 + +80003ffc : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b6: + aes32esmi x6, x6, x6, 0 # perform operation +80003ffc: 26630333 aes32esmi x6,x6,x6,0x0 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b6, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b6_str) +80004000: 0009a383 lw x7,0(x19) +80004004: 00638863 beq x7,x6,80004014 +80004008: 1d00446f jal x8,800081d8 +8000400c: 80003ffc .word 0x80003ffc +80004010: 800141d6 .word 0x800141d6 +80004014: 00498993 addi x19,x19,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80004018: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +8000401c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x2dd3d309 +80004020: 0007a383 lw x7,0(x15) +80004024: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x9f935e1a +80004028: 0007a383 lw x7,0(x15) +8000402c: 00478793 addi x15,x15,4 + +80004030 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b7: + aes32esmi x7, x7, x7, 1 # perform operation +80004030: 667383b3 aes32esmi x7,x7,x7,0x1 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b7, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b7_str) +80004034: 0009a683 lw x13,0(x19) +80004038: 00768863 beq x13,x7,80004048 +8000403c: 1c40476f jal x14,80008200 +80004040: 80004030 .word 0x80004030 +80004044: 80014216 .word 0x80014216 +80004048: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x8203dcd3 +8000404c: 0007a403 lw x8,0(x15) +80004050: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x2e548052 +80004054: 0007a403 lw x8,0(x15) +80004058: 00478793 addi x15,x15,4 + +8000405c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b8: + aes32esmi x8, x8, x8, 2 # perform operation +8000405c: a6840433 aes32esmi x8,x8,x8,0x2 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b8, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b8_str) +80004060: 0009a683 lw x13,0(x19) +80004064: 00868863 beq x13,x8,80004074 +80004068: 1980476f jal x14,80008200 +8000406c: 8000405c .word 0x8000405c +80004070: 80014256 .word 0x80014256 +80004074: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xc696742f +80004078: 0007a483 lw x9,0(x15) +8000407c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x9956cc24 +80004080: 0007a483 lw x9,0(x15) +80004084: 00478793 addi x15,x15,4 + +80004088 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b9: + aes32esmi x9, x9, x9, 3 # perform operation +80004088: e69484b3 aes32esmi x9,x9,x9,0x3 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b9, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b9_str) +8000408c: 0009a683 lw x13,0(x19) +80004090: 00968863 beq x13,x9,800040a0 +80004094: 16c0476f jal x14,80008200 +80004098: 80004088 .word 0x80004088 +8000409c: 80014296 .word 0x80014296 +800040a0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xd752e389 +800040a4: 0007a503 lw x10,0(x15) +800040a8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x1a5ee761 +800040ac: 0007a503 lw x10,0(x15) +800040b0: 00478793 addi x15,x15,4 + +800040b4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b10: + aes32esmi x10, x10, x10, 0 # perform operation +800040b4: 26a50533 aes32esmi x10,x10,x10,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b10, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b10_str) +800040b8: 0009a683 lw x13,0(x19) +800040bc: 00a68863 beq x13,x10,800040cc +800040c0: 1400476f jal x14,80008200 +800040c4: 800040b4 .word 0x800040b4 +800040c8: 800142d6 .word 0x800142d6 +800040cc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x026cf502 +800040d0: 0007a583 lw x11,0(x15) +800040d4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x099b6eea +800040d8: 0007a583 lw x11,0(x15) +800040dc: 00478793 addi x15,x15,4 + +800040e0 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b11: + aes32esmi x11, x11, x11, 1 # perform operation +800040e0: 66b585b3 aes32esmi x11,x11,x11,0x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b11, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b11_str) +800040e4: 0009a683 lw x13,0(x19) +800040e8: 00b68863 beq x13,x11,800040f8 +800040ec: 1140476f jal x14,80008200 +800040f0: 800040e0 .word 0x800040e0 +800040f4: 80014317 .word 0x80014317 +800040f8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x75e7ed2f +800040fc: 0007a603 lw x12,0(x15) +80004100: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x1d4c800d +80004104: 0007a603 lw x12,0(x15) +80004108: 00478793 addi x15,x15,4 + +8000410c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b12: + aes32esmi x12, x12, x12, 0 # perform operation +8000410c: 26c60633 aes32esmi x12,x12,x12,0x0 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b12, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b12_str) +80004110: 0009a683 lw x13,0(x19) +80004114: 00c68863 beq x13,x12,80004124 +80004118: 0e80476f jal x14,80008200 +8000411c: 8000410c .word 0x8000410c +80004120: 80014358 .word 0x80014358 +80004124: 00498993 addi x19,x19,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80004128: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000412c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xd4794059 +80004130: 0007a683 lw x13,0(x15) +80004134: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xe4954333 +80004138: 0007a683 lw x13,0(x15) +8000413c: 00478793 addi x15,x15,4 + +80004140 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b13: + aes32esmi x13, x13, x13, 0 # perform operation +80004140: 26d686b3 aes32esmi x13,x13,x13,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b13, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b13_str) +80004144: 0009a203 lw x4,0(x19) +80004148: 00d20863 beq x4,x13,80004158 +8000414c: 074042ef jal x5,800081c0 +80004150: 80004140 .word 0x80004140 +80004154: 80014399 .word 0x80014399 +80004158: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x4ed93d2d +8000415c: 0007a703 lw x14,0(x15) +80004160: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x32a754a0 +80004164: 0007a703 lw x14,0(x15) +80004168: 00478793 addi x15,x15,4 + +8000416c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b14: + aes32esmi x14, x14, x14, 2 # perform operation +8000416c: a6e70733 aes32esmi x14,x14,x14,0x2 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b14, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b14_str) +80004170: 0009a203 lw x4,0(x19) +80004174: 00e20863 beq x4,x14,80004184 +80004178: 048042ef jal x5,800081c0 +8000417c: 8000416c .word 0x8000416c +80004180: 800143da .word 0x800143da +80004184: 00498993 addi x19,x19,4 + + mv x27, x15 # switch data pointer register to avoid conflict with test +80004188: 00078d93 addi x27,x15,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x91f39e1f +8000418c: 000da783 lw x15,0(x27) +80004190: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x7605efba +80004194: 000da783 lw x15,0(x27) +80004198: 004d8d93 addi x27,x27,4 + +8000419c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b15: + aes32esmi x15, x15, x15, 1 # perform operation +8000419c: 66f787b3 aes32esmi x15,x15,x15,0x1 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b15, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 0009a203 lw x4,0(x19) +800041a4: 00f20863 beq x4,x15,800041b4 +800041a8: 018042ef jal x5,800081c0 +800041ac: 8000419c .word 0x8000419c +800041b0: 8001441b .word 0x8001441b +800041b4: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x50088521 +800041b8: 000da803 lw x16,0(x27) +800041bc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x172650b8 +800041c0: 000da803 lw x16,0(x27) +800041c4: 004d8d93 addi x27,x27,4 + +800041c8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b16: + aes32esmi x16, x16, x16, 1 # perform operation +800041c8: 67080833 aes32esmi x16,x16,x16,0x1 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b16, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b16_str) +800041cc: 0009a203 lw x4,0(x19) +800041d0: 01020863 beq x4,x16,800041e0 +800041d4: 7ed032ef jal x5,800081c0 +800041d8: 800041c8 .word 0x800041c8 +800041dc: 8001445c .word 0x8001445c +800041e0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xc31c1ae1 +800041e4: 000da883 lw x17,0(x27) +800041e8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x745d5444 +800041ec: 000da883 lw x17,0(x27) +800041f0: 004d8d93 addi x27,x27,4 + +800041f4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b17: + aes32esmi x17, x17, x17, 1 # perform operation +800041f4: 671888b3 aes32esmi x17,x17,x17,0x1 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b17, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b17_str) +800041f8: 0009a203 lw x4,0(x19) +800041fc: 01120863 beq x4,x17,8000420c +80004200: 7c1032ef jal x5,800081c0 +80004204: 800041f4 .word 0x800041f4 +80004208: 8001449d .word 0x8001449d +8000420c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x4b8a87cd +80004210: 000da903 lw x18,0(x27) +80004214: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x04f39758 +80004218: 000da903 lw x18,0(x27) +8000421c: 004d8d93 addi x27,x27,4 + +80004220 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b18: + aes32esmi x18, x18, x18, 3 # perform operation +80004220: e7290933 aes32esmi x18,x18,x18,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b18, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b18_str) +80004224: 0009a203 lw x4,0(x19) +80004228: 01220863 beq x4,x18,80004238 +8000422c: 795032ef jal x5,800081c0 +80004230: 80004220 .word 0x80004220 +80004234: 800144de .word 0x800144de +80004238: 00498993 addi x19,x19,4 + + mv x22, x19 # switch signature pointer register to avoid conflict with test +8000423c: 00098b13 addi x22,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0xcf26afbe +80004240: 000da983 lw x19,0(x27) +80004244: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xd153f0e0 +80004248: 000da983 lw x19,0(x27) +8000424c: 004d8d93 addi x27,x27,4 + +80004250 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b19: + aes32esmi x19, x19, x19, 0 # perform operation +80004250: 273989b3 aes32esmi x19,x19,x19,0x0 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b19, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b19_str) +80004254: 000b2203 lw x4,0(x22) +80004258: 01320863 beq x4,x19,80004268 +8000425c: 765032ef jal x5,800081c0 +80004260: 80004250 .word 0x80004250 +80004264: 8001451f .word 0x8001451f +80004268: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x852c5d96 +8000426c: 000daa03 lw x20,0(x27) +80004270: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xe7ec687e +80004274: 000daa03 lw x20,0(x27) +80004278: 004d8d93 addi x27,x27,4 + +8000427c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b20: + aes32esmi x20, x20, x20, 0 # perform operation +8000427c: 274a0a33 aes32esmi x20,x20,x20,0x0 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b20, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b20_str) +80004280: 000b2203 lw x4,0(x22) +80004284: 01420863 beq x4,x20,80004294 +80004288: 739032ef jal x5,800081c0 +8000428c: 8000427c .word 0x8000427c +80004290: 80014560 .word 0x80014560 +80004294: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xa3d90b70 +80004298: 000daa83 lw x21,0(x27) +8000429c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xa2661589 +800042a0: 000daa83 lw x21,0(x27) +800042a4: 004d8d93 addi x27,x27,4 + +800042a8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b21: + aes32esmi x21, x21, x21, 0 # perform operation +800042a8: 275a8ab3 aes32esmi x21,x21,x21,0x0 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b21, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b21_str) +800042ac: 000b2203 lw x4,0(x22) +800042b0: 01520863 beq x4,x21,800042c0 +800042b4: 70d032ef jal x5,800081c0 +800042b8: 800042a8 .word 0x800042a8 +800042bc: 800145a1 .word 0x800145a1 +800042c0: 004b0b13 addi x22,x22,4 + + mv x17, x22 # switch signature pointer register to avoid conflict with test +800042c4: 000b0893 addi x17,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xbd3393cc +800042c8: 000dab03 lw x22,0(x27) +800042cc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xfd998726 +800042d0: 000dab03 lw x22,0(x27) +800042d4: 004d8d93 addi x27,x27,4 + +800042d8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b22: + aes32esmi x22, x22, x22, 1 # perform operation +800042d8: 676b0b33 aes32esmi x22,x22,x22,0x1 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b22, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b22_str) +800042dc: 0008a203 lw x4,0(x17) +800042e0: 01620863 beq x4,x22,800042f0 +800042e4: 6dd032ef jal x5,800081c0 +800042e8: 800042d8 .word 0x800042d8 +800042ec: 800145e2 .word 0x800145e2 +800042f0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x9b678c1c +800042f4: 000dab83 lw x23,0(x27) +800042f8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0xb43fde94 +800042fc: 000dab83 lw x23,0(x27) +80004300: 004d8d93 addi x27,x27,4 + +80004304 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b23: + aes32esmi x23, x23, x23, 1 # perform operation +80004304: 677b8bb3 aes32esmi x23,x23,x23,0x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b23, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 0008a203 lw x4,0(x17) +8000430c: 01720863 beq x4,x23,8000431c +80004310: 6b1032ef jal x5,800081c0 +80004314: 80004304 .word 0x80004304 +80004318: 80014623 .word 0x80014623 +8000431c: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x8bd16501 +80004320: 000dac03 lw x24,0(x27) +80004324: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x381a4563 +80004328: 000dac03 lw x24,0(x27) +8000432c: 004d8d93 addi x27,x27,4 + +80004330 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b24: + aes32esmi x24, x24, x24, 1 # perform operation +80004330: 678c0c33 aes32esmi x24,x24,x24,0x1 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b24, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 0008a203 lw x4,0(x17) +80004338: 01820863 beq x4,x24,80004348 +8000433c: 685032ef jal x5,800081c0 +80004340: 80004330 .word 0x80004330 +80004344: 80014664 .word 0x80014664 +80004348: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xfab6e2b2 +8000434c: 000dac83 lw x25,0(x27) +80004350: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x4e0442f4 +80004354: 000dac83 lw x25,0(x27) +80004358: 004d8d93 addi x27,x27,4 + +8000435c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b25: + aes32esmi x25, x25, x25, 0 # perform operation +8000435c: 279c8cb3 aes32esmi x25,x25,x25,0x0 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b25, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 0008a203 lw x4,0(x17) +80004364: 01920863 beq x4,x25,80004374 +80004368: 659032ef jal x5,800081c0 +8000436c: 8000435c .word 0x8000435c +80004370: 800146a5 .word 0x800146a5 +80004374: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xd90f6c8f +80004378: 000dad03 lw x26,0(x27) +8000437c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x9a30cf9e +80004380: 000dad03 lw x26,0(x27) +80004384: 004d8d93 addi x27,x27,4 + +80004388 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b26: + aes32esmi x26, x26, x26, 3 # perform operation +80004388: e7ad0d33 aes32esmi x26,x26,x26,0x3 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b26, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 0008a203 lw x4,0(x17) +80004390: 01a20863 beq x4,x26,800043a0 +80004394: 62d032ef jal x5,800081c0 +80004398: 80004388 .word 0x80004388 +8000439c: 800146e6 .word 0x800146e6 +800043a0: 00488893 addi x17,x17,4 + + mv x26, x27 # switch data pointer register to avoid conflict with test +800043a4: 000d8d13 addi x26,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x516bf8b2 +800043a8: 000d2d83 lw x27,0(x26) +800043ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x59ccafef +800043b0: 000d2d83 lw x27,0(x26) +800043b4: 004d0d13 addi x26,x26,4 + +800043b8 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b27: + aes32esmi x27, x27, x27, 3 # perform operation +800043b8: e7bd8db3 aes32esmi x27,x27,x27,0x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b27, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b27_str) +800043bc: 0008a203 lw x4,0(x17) +800043c0: 01b20863 beq x4,x27,800043d0 +800043c4: 5fd032ef jal x5,800081c0 +800043c8: 800043b8 .word 0x800043b8 +800043cc: 80014727 .word 0x80014727 +800043d0: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x99e8cf22 +800043d4: 000d2e03 lw x28,0(x26) +800043d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xac65dd32 +800043dc: 000d2e03 lw x28,0(x26) +800043e0: 004d0d13 addi x26,x26,4 + +800043e4 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b28: + aes32esmi x28, x28, x28, 0 # perform operation +800043e4: 27ce0e33 aes32esmi x28,x28,x28,0x0 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b28, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b28_str) +800043e8: 0008a203 lw x4,0(x17) +800043ec: 01c20863 beq x4,x28,800043fc +800043f0: 5d1032ef jal x5,800081c0 +800043f4: 800043e4 .word 0x800043e4 +800043f8: 80014768 .word 0x80014768 +800043fc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x3f7b7965 +80004400: 000d2e83 lw x29,0(x26) +80004404: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x0eb7c3bc +80004408: 000d2e83 lw x29,0(x26) +8000440c: 004d0d13 addi x26,x26,4 + +80004410 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b29: + aes32esmi x29, x29, x29, 0 # perform operation +80004410: 27de8eb3 aes32esmi x29,x29,x29,0x0 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b29, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b29_str) +80004414: 0008a203 lw x4,0(x17) +80004418: 01d20863 beq x4,x29,80004428 +8000441c: 5a5032ef jal x5,800081c0 +80004420: 80004410 .word 0x80004410 +80004424: 800147a9 .word 0x800147a9 +80004428: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xcbf55403 +8000442c: 000d2f03 lw x30,0(x26) +80004430: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x0ea211fe +80004434: 000d2f03 lw x30,0(x26) +80004438: 004d0d13 addi x26,x26,4 + +8000443c : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b30: + aes32esmi x30, x30, x30, 0 # perform operation +8000443c: 27ef0f33 aes32esmi x30,x30,x30,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b30, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b30_str) +80004440: 0008a203 lw x4,0(x17) +80004444: 01e20863 beq x4,x30,80004454 +80004448: 579032ef jal x5,800081c0 +8000444c: 8000443c .word 0x8000443c +80004450: 800147ea .word 0x800147ea +80004454: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x812036b7 +80004458: 000d2f83 lw x31,0(x26) +8000445c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x3055a3eb +80004460: 000d2f83 lw x31,0(x26) +80004464: 004d0d13 addi x26,x26,4 + +80004468 : +Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b31: + aes32esmi x31, x31, x31, 3 # perform operation +80004468: e7ff8fb3 aes32esmi x31,x31,x31,0x3 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b31, Zkne_aes32esmi_cg_cmp_rd_rs1_rs2_b31_str) +8000446c: 0008a203 lw x4,0(x17) +80004470: 01f20863 beq x4,x31,80004480 +80004474: 54d032ef jal x5,800081c0 +80004478: 80004468 .word 0x80004468 +8000447c: 8001482b .word 0x8001482b +80004480: 00488893 addi x17,x17,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xd3ae397b +80004484: 000d2c03 lw x24,0(x26) +80004488: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x2641bd2e +8000448c: 000d2103 lw x2,0(x26) +80004490: 004d0d13 addi x26,x26,4 + +80004494 : +Zkne_aes32esmi_cg_cp_bs_b0: + aes32esmi x7, x24, x2, 0 # perform operation +80004494: 262c03b3 aes32esmi x7,x24,x2,0x0 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_bs_b0, Zkne_aes32esmi_cg_cp_bs_b0_str) +80004498: 0008a203 lw x4,0(x17) +8000449c: 00720863 beq x4,x7,800044ac +800044a0: 521032ef jal x5,800081c0 +800044a4: 80004494 .word 0x80004494 +800044a8: 8001486c .word 0x8001486c +800044ac: 00488893 addi x17,x17,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x2754d1b8 +800044b0: 000d2083 lw x1,0(x26) +800044b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xc6c5bfb1 +800044b8: 000d2603 lw x12,0(x26) +800044bc: 004d0d13 addi x26,x26,4 + +800044c0 : +Zkne_aes32esmi_cg_cp_bs_b1: + aes32esmi x28, x1, x12, 1 # perform operation +800044c0: 66c08e33 aes32esmi x28,x1,x12,0x1 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_bs_b1, Zkne_aes32esmi_cg_cp_bs_b1_str) +800044c4: 0008a203 lw x4,0(x17) +800044c8: 01c20863 beq x4,x28,800044d8 +800044cc: 4f5032ef jal x5,800081c0 +800044d0: 800044c0 .word 0x800044c0 +800044d4: 800148a3 .word 0x800148a3 +800044d8: 00488893 addi x17,x17,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x58d96ad3 +800044dc: 000d2403 lw x8,0(x26) +800044e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x54ecda4e +800044e4: 000d2683 lw x13,0(x26) +800044e8: 004d0d13 addi x26,x26,4 + +800044ec : +Zkne_aes32esmi_cg_cp_bs_b2: + aes32esmi x16, x8, x13, 2 # perform operation +800044ec: a6d40833 aes32esmi x16,x8,x13,0x2 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_bs_b2, Zkne_aes32esmi_cg_cp_bs_b2_str) +800044f0: 0008a203 lw x4,0(x17) +800044f4: 01020863 beq x4,x16,80004504 +800044f8: 4c9032ef jal x5,800081c0 +800044fc: 800044ec .word 0x800044ec +80004500: 800148da .word 0x800148da +80004504: 00488893 addi x17,x17,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xab1af33a +80004508: 000d2503 lw x10,0(x26) +8000450c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x66181add +80004510: 000d2f03 lw x30,0(x26) +80004514: 004d0d13 addi x26,x26,4 + +80004518 : +Zkne_aes32esmi_cg_cp_bs_b3: + aes32esmi x2, x10, x30, 3 # perform operation +80004518: e7e50133 aes32esmi x2,x10,x30,0x3 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_bs_b3, Zkne_aes32esmi_cg_cp_bs_b3_str) +8000451c: 0008a203 lw x4,0(x17) +80004520: 00220863 beq x4,x2,80004530 +80004524: 49d032ef jal x5,800081c0 +80004528: 80004518 .word 0x80004518 +8000452c: 80014911 .word 0x80014911 +80004530: 00488893 addi x17,x17,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x00000000 +80004534: 000d2303 lw x6,0(x26) +80004538: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x00000000 +8000453c: 000d2a83 lw x21,0(x26) +80004540: 004d0d13 addi x26,x26,4 + +80004544 : +Zkne_aes32esmi_cg_cp_sbox_b0: + aes32esmi x19, x6, x21, 1 # perform operation +80004544: 675309b3 aes32esmi x19,x6,x21,0x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b0, Zkne_aes32esmi_cg_cp_sbox_b0_str) +80004548: 0008a203 lw x4,0(x17) +8000454c: 01320863 beq x4,x19,8000455c +80004550: 471032ef jal x5,800081c0 +80004554: 80004544 .word 0x80004544 +80004558: 80014948 .word 0x80014948 +8000455c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x01010101 +80004560: 000d2e83 lw x29,0(x26) +80004564: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x01010101 +80004568: 000d2f83 lw x31,0(x26) +8000456c: 004d0d13 addi x26,x26,4 + +80004570 : +Zkne_aes32esmi_cg_cp_sbox_b1: + aes32esmi x20, x29, x31, 0 # perform operation +80004570: 27fe8a33 aes32esmi x20,x29,x31,0x0 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b1, Zkne_aes32esmi_cg_cp_sbox_b1_str) +80004574: 0008a203 lw x4,0(x17) +80004578: 01420863 beq x4,x20,80004588 +8000457c: 445032ef jal x5,800081c0 +80004580: 80004570 .word 0x80004570 +80004584: 80014981 .word 0x80014981 +80004588: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x02020202 +8000458c: 000d2b83 lw x23,0(x26) +80004590: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x02020202 +80004594: 000d2483 lw x9,0(x26) +80004598: 004d0d13 addi x26,x26,4 + +8000459c : +Zkne_aes32esmi_cg_cp_sbox_b2: + aes32esmi x10, x23, x9, 3 # perform operation +8000459c: e69b8533 aes32esmi x10,x23,x9,0x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b2, Zkne_aes32esmi_cg_cp_sbox_b2_str) +800045a0: 0008a203 lw x4,0(x17) +800045a4: 00a20863 beq x4,x10,800045b4 +800045a8: 419032ef jal x5,800081c0 +800045ac: 8000459c .word 0x8000459c +800045b0: 800149ba .word 0x800149ba +800045b4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x03030303 +800045b8: 000d2e83 lw x29,0(x26) +800045bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x03030303 +800045c0: 000d2403 lw x8,0(x26) +800045c4: 004d0d13 addi x26,x26,4 + +800045c8 : +Zkne_aes32esmi_cg_cp_sbox_b3: + aes32esmi x24, x29, x8, 3 # perform operation +800045c8: e68e8c33 aes32esmi x24,x29,x8,0x3 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b3, Zkne_aes32esmi_cg_cp_sbox_b3_str) +800045cc: 0008a203 lw x4,0(x17) +800045d0: 01820863 beq x4,x24,800045e0 +800045d4: 3ed032ef jal x5,800081c0 +800045d8: 800045c8 .word 0x800045c8 +800045dc: 800149f3 .word 0x800149f3 +800045e0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x04040404 +800045e4: 000d2603 lw x12,0(x26) +800045e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x04040404 +800045ec: 000d2403 lw x8,0(x26) +800045f0: 004d0d13 addi x26,x26,4 + +800045f4 : +Zkne_aes32esmi_cg_cp_sbox_b4: + aes32esmi x25, x12, x8, 0 # perform operation +800045f4: 26860cb3 aes32esmi x25,x12,x8,0x0 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b4, Zkne_aes32esmi_cg_cp_sbox_b4_str) +800045f8: 0008a203 lw x4,0(x17) +800045fc: 01920863 beq x4,x25,8000460c +80004600: 3c1032ef jal x5,800081c0 +80004604: 800045f4 .word 0x800045f4 +80004608: 80014a2c .word 0x80014a2c +8000460c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x05050505 +80004610: 000d2183 lw x3,0(x26) +80004614: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x05050505 +80004618: 000d2503 lw x10,0(x26) +8000461c: 004d0d13 addi x26,x26,4 + +80004620 : +Zkne_aes32esmi_cg_cp_sbox_b5: + aes32esmi x6, x3, x10, 1 # perform operation +80004620: 66a18333 aes32esmi x6,x3,x10,0x1 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b5, Zkne_aes32esmi_cg_cp_sbox_b5_str) +80004624: 0008a203 lw x4,0(x17) +80004628: 00620863 beq x4,x6,80004638 +8000462c: 395032ef jal x5,800081c0 +80004630: 80004620 .word 0x80004620 +80004634: 80014a65 .word 0x80014a65 +80004638: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x06060606 +8000463c: 000d2983 lw x19,0(x26) +80004640: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x06060606 +80004644: 000d2083 lw x1,0(x26) +80004648: 004d0d13 addi x26,x26,4 + +8000464c : +Zkne_aes32esmi_cg_cp_sbox_b6: + aes32esmi x30, x19, x1, 0 # perform operation +8000464c: 26198f33 aes32esmi x30,x19,x1,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b6, Zkne_aes32esmi_cg_cp_sbox_b6_str) +80004650: 0008a203 lw x4,0(x17) +80004654: 01e20863 beq x4,x30,80004664 +80004658: 369032ef jal x5,800081c0 +8000465c: 8000464c .word 0x8000464c +80004660: 80014a9e .word 0x80014a9e +80004664: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x07070707 +80004668: 000d2a83 lw x21,0(x26) +8000466c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x07070707 +80004670: 000d2c03 lw x24,0(x26) +80004674: 004d0d13 addi x26,x26,4 + +80004678 : +Zkne_aes32esmi_cg_cp_sbox_b7: + aes32esmi x2, x21, x24, 1 # perform operation +80004678: 678a8133 aes32esmi x2,x21,x24,0x1 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b7, Zkne_aes32esmi_cg_cp_sbox_b7_str) +8000467c: 0008a203 lw x4,0(x17) +80004680: 00220863 beq x4,x2,80004690 +80004684: 33d032ef jal x5,800081c0 +80004688: 80004678 .word 0x80004678 +8000468c: 80014ad7 .word 0x80014ad7 +80004690: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x08080808 +80004694: 000d2383 lw x7,0(x26) +80004698: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x08080808 +8000469c: 000d2c83 lw x25,0(x26) +800046a0: 004d0d13 addi x26,x26,4 + +800046a4 : +Zkne_aes32esmi_cg_cp_sbox_b8: + aes32esmi x15, x7, x25, 3 # perform operation +800046a4: e79387b3 aes32esmi x15,x7,x25,0x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b8, Zkne_aes32esmi_cg_cp_sbox_b8_str) +800046a8: 0008a203 lw x4,0(x17) +800046ac: 00f20863 beq x4,x15,800046bc +800046b0: 311032ef jal x5,800081c0 +800046b4: 800046a4 .word 0x800046a4 +800046b8: 80014b10 .word 0x80014b10 +800046bc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x09090909 +800046c0: 000d2103 lw x2,0(x26) +800046c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x09090909 +800046c8: 000d2b03 lw x22,0(x26) +800046cc: 004d0d13 addi x26,x26,4 + +800046d0 : +Zkne_aes32esmi_cg_cp_sbox_b9: + aes32esmi x6, x2, x22, 0 # perform operation +800046d0: 27610333 aes32esmi x6,x2,x22,0x0 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b9, Zkne_aes32esmi_cg_cp_sbox_b9_str) +800046d4: 0008a203 lw x4,0(x17) +800046d8: 00620863 beq x4,x6,800046e8 +800046dc: 2e5032ef jal x5,800081c0 +800046e0: 800046d0 .word 0x800046d0 +800046e4: 80014b49 .word 0x80014b49 +800046e8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x0a0a0a0a +800046ec: 000d2403 lw x8,0(x26) +800046f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x0a0a0a0a +800046f4: 000d2b03 lw x22,0(x26) +800046f8: 004d0d13 addi x26,x26,4 + +800046fc : +Zkne_aes32esmi_cg_cp_sbox_b10: + aes32esmi x20, x8, x22, 0 # perform operation +800046fc: 27640a33 aes32esmi x20,x8,x22,0x0 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b10, Zkne_aes32esmi_cg_cp_sbox_b10_str) +80004700: 0008a203 lw x4,0(x17) +80004704: 01420863 beq x4,x20,80004714 +80004708: 2b9032ef jal x5,800081c0 +8000470c: 800046fc .word 0x800046fc +80004710: 80014b82 .word 0x80014b82 +80004714: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x0b0b0b0b +80004718: 000d2183 lw x3,0(x26) +8000471c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x0b0b0b0b +80004720: 000d2a83 lw x21,0(x26) +80004724: 004d0d13 addi x26,x26,4 + +80004728 : +Zkne_aes32esmi_cg_cp_sbox_b11: + aes32esmi x19, x3, x21, 2 # perform operation +80004728: a75189b3 aes32esmi x19,x3,x21,0x2 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b11, Zkne_aes32esmi_cg_cp_sbox_b11_str) +8000472c: 0008a203 lw x4,0(x17) +80004730: 01320863 beq x4,x19,80004740 +80004734: 28d032ef jal x5,800081c0 +80004738: 80004728 .word 0x80004728 +8000473c: 80014bbc .word 0x80014bbc +80004740: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x0c0c0c0c +80004744: 000d2c03 lw x24,0(x26) +80004748: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x0c0c0c0c +8000474c: 000d2e83 lw x29,0(x26) +80004750: 004d0d13 addi x26,x26,4 + +80004754 : +Zkne_aes32esmi_cg_cp_sbox_b12: + aes32esmi x8, x24, x29, 3 # perform operation +80004754: e7dc0433 aes32esmi x8,x24,x29,0x3 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b12, Zkne_aes32esmi_cg_cp_sbox_b12_str) +80004758: 0008a203 lw x4,0(x17) +8000475c: 00820863 beq x4,x8,8000476c +80004760: 261032ef jal x5,800081c0 +80004764: 80004754 .word 0x80004754 +80004768: 80014bf6 .word 0x80014bf6 +8000476c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x0d0d0d0d +80004770: 000d2e83 lw x29,0(x26) +80004774: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x0d0d0d0d +80004778: 000d2b83 lw x23,0(x26) +8000477c: 004d0d13 addi x26,x26,4 + +80004780 : +Zkne_aes32esmi_cg_cp_sbox_b13: + aes32esmi x8, x29, x23, 2 # perform operation +80004780: a77e8433 aes32esmi x8,x29,x23,0x2 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b13, Zkne_aes32esmi_cg_cp_sbox_b13_str) +80004784: 0008a203 lw x4,0(x17) +80004788: 00820863 beq x4,x8,80004798 +8000478c: 235032ef jal x5,800081c0 +80004790: 80004780 .word 0x80004780 +80004794: 80014c30 .word 0x80014c30 +80004798: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x0e0e0e0e +8000479c: 000d2d83 lw x27,0(x26) +800047a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x0e0e0e0e +800047a4: 000d2f03 lw x30,0(x26) +800047a8: 004d0d13 addi x26,x26,4 + +800047ac : +Zkne_aes32esmi_cg_cp_sbox_b14: + aes32esmi x7, x27, x30, 0 # perform operation +800047ac: 27ed83b3 aes32esmi x7,x27,x30,0x0 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b14, Zkne_aes32esmi_cg_cp_sbox_b14_str) +800047b0: 0008a203 lw x4,0(x17) +800047b4: 00720863 beq x4,x7,800047c4 +800047b8: 209032ef jal x5,800081c0 +800047bc: 800047ac .word 0x800047ac +800047c0: 80014c6a .word 0x80014c6a +800047c4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x0f0f0f0f +800047c8: 000d2503 lw x10,0(x26) +800047cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x0f0f0f0f +800047d0: 000d2483 lw x9,0(x26) +800047d4: 004d0d13 addi x26,x26,4 + +800047d8 : +Zkne_aes32esmi_cg_cp_sbox_b15: + aes32esmi x2, x10, x9, 0 # perform operation +800047d8: 26950133 aes32esmi x2,x10,x9,0x0 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b15, Zkne_aes32esmi_cg_cp_sbox_b15_str) +800047dc: 0008a203 lw x4,0(x17) +800047e0: 00220863 beq x4,x2,800047f0 +800047e4: 1dd032ef jal x5,800081c0 +800047e8: 800047d8 .word 0x800047d8 +800047ec: 80014ca4 .word 0x80014ca4 +800047f0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x10101010 +800047f4: 000d2c83 lw x25,0(x26) +800047f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x10101010 +800047fc: 000d2103 lw x2,0(x26) +80004800: 004d0d13 addi x26,x26,4 + +80004804 : +Zkne_aes32esmi_cg_cp_sbox_b16: + aes32esmi x15, x25, x2, 3 # perform operation +80004804: e62c87b3 aes32esmi x15,x25,x2,0x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b16, Zkne_aes32esmi_cg_cp_sbox_b16_str) +80004808: 0008a203 lw x4,0(x17) +8000480c: 00f20863 beq x4,x15,8000481c +80004810: 1b1032ef jal x5,800081c0 +80004814: 80004804 .word 0x80004804 +80004818: 80014cde .word 0x80014cde +8000481c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x11111111 +80004820: 000d2e83 lw x29,0(x26) +80004824: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x11111111 +80004828: 000d2303 lw x6,0(x26) +8000482c: 004d0d13 addi x26,x26,4 + +80004830 : +Zkne_aes32esmi_cg_cp_sbox_b17: + aes32esmi x25, x29, x6, 0 # perform operation +80004830: 266e8cb3 aes32esmi x25,x29,x6,0x0 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b17, Zkne_aes32esmi_cg_cp_sbox_b17_str) +80004834: 0008a203 lw x4,0(x17) +80004838: 01920863 beq x4,x25,80004848 +8000483c: 185032ef jal x5,800081c0 +80004840: 80004830 .word 0x80004830 +80004844: 80014d18 .word 0x80014d18 +80004848: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x12121212 +8000484c: 000d2e83 lw x29,0(x26) +80004850: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x12121212 +80004854: 000d2903 lw x18,0(x26) +80004858: 004d0d13 addi x26,x26,4 + +8000485c : +Zkne_aes32esmi_cg_cp_sbox_b18: + aes32esmi x23, x29, x18, 1 # perform operation +8000485c: 672e8bb3 aes32esmi x23,x29,x18,0x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b18, Zkne_aes32esmi_cg_cp_sbox_b18_str) +80004860: 0008a203 lw x4,0(x17) +80004864: 01720863 beq x4,x23,80004874 +80004868: 159032ef jal x5,800081c0 +8000486c: 8000485c .word 0x8000485c +80004870: 80014d52 .word 0x80014d52 +80004874: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x13131313 +80004878: 000d2a03 lw x20,0(x26) +8000487c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x13131313 +80004880: 000d2083 lw x1,0(x26) +80004884: 004d0d13 addi x26,x26,4 + +80004888 : +Zkne_aes32esmi_cg_cp_sbox_b19: + aes32esmi x9, x20, x1, 1 # perform operation +80004888: 661a04b3 aes32esmi x9,x20,x1,0x1 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b19, Zkne_aes32esmi_cg_cp_sbox_b19_str) +8000488c: 0008a203 lw x4,0(x17) +80004890: 00920863 beq x4,x9,800048a0 +80004894: 12d032ef jal x5,800081c0 +80004898: 80004888 .word 0x80004888 +8000489c: 80014d8c .word 0x80014d8c +800048a0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x14141414 +800048a4: 000d2083 lw x1,0(x26) +800048a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x14141414 +800048ac: 000d2e03 lw x28,0(x26) +800048b0: 004d0d13 addi x26,x26,4 + +800048b4 : +Zkne_aes32esmi_cg_cp_sbox_b20: + aes32esmi x12, x1, x28, 0 # perform operation +800048b4: 27c08633 aes32esmi x12,x1,x28,0x0 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b20, Zkne_aes32esmi_cg_cp_sbox_b20_str) +800048b8: 0008a203 lw x4,0(x17) +800048bc: 00c20863 beq x4,x12,800048cc +800048c0: 101032ef jal x5,800081c0 +800048c4: 800048b4 .word 0x800048b4 +800048c8: 80014dc6 .word 0x80014dc6 +800048cc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x15151515 +800048d0: 000d2b83 lw x23,0(x26) +800048d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x15151515 +800048d8: 000d2e83 lw x29,0(x26) +800048dc: 004d0d13 addi x26,x26,4 + +800048e0 : +Zkne_aes32esmi_cg_cp_sbox_b21: + aes32esmi x14, x23, x29, 1 # perform operation +800048e0: 67db8733 aes32esmi x14,x23,x29,0x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b21, Zkne_aes32esmi_cg_cp_sbox_b21_str) +800048e4: 0008a203 lw x4,0(x17) +800048e8: 00e20863 beq x4,x14,800048f8 +800048ec: 0d5032ef jal x5,800081c0 +800048f0: 800048e0 .word 0x800048e0 +800048f4: 80014e00 .word 0x80014e00 +800048f8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x16161616 +800048fc: 000d2e83 lw x29,0(x26) +80004900: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x16161616 +80004904: 000d2903 lw x18,0(x26) +80004908: 004d0d13 addi x26,x26,4 + +8000490c : +Zkne_aes32esmi_cg_cp_sbox_b22: + aes32esmi x31, x29, x18, 0 # perform operation +8000490c: 272e8fb3 aes32esmi x31,x29,x18,0x0 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b22, Zkne_aes32esmi_cg_cp_sbox_b22_str) +80004910: 0008a203 lw x4,0(x17) +80004914: 01f20863 beq x4,x31,80004924 +80004918: 0a9032ef jal x5,800081c0 +8000491c: 8000490c .word 0x8000490c +80004920: 80014e3a .word 0x80014e3a +80004924: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x17171717 +80004928: 000d2e03 lw x28,0(x26) +8000492c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x17171717 +80004930: 000d2183 lw x3,0(x26) +80004934: 004d0d13 addi x26,x26,4 + +80004938 : +Zkne_aes32esmi_cg_cp_sbox_b23: + aes32esmi x31, x28, x3, 2 # perform operation +80004938: a63e0fb3 aes32esmi x31,x28,x3,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b23, Zkne_aes32esmi_cg_cp_sbox_b23_str) +8000493c: 0008a203 lw x4,0(x17) +80004940: 01f20863 beq x4,x31,80004950 +80004944: 07d032ef jal x5,800081c0 +80004948: 80004938 .word 0x80004938 +8000494c: 80014e74 .word 0x80014e74 +80004950: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x18181818 +80004954: 000d2c83 lw x25,0(x26) +80004958: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x18181818 +8000495c: 000d2e83 lw x29,0(x26) +80004960: 004d0d13 addi x26,x26,4 + +80004964 : +Zkne_aes32esmi_cg_cp_sbox_b24: + aes32esmi x16, x25, x29, 1 # perform operation +80004964: 67dc8833 aes32esmi x16,x25,x29,0x1 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b24, Zkne_aes32esmi_cg_cp_sbox_b24_str) +80004968: 0008a203 lw x4,0(x17) +8000496c: 01020863 beq x4,x16,8000497c +80004970: 051032ef jal x5,800081c0 +80004974: 80004964 .word 0x80004964 +80004978: 80014eae .word 0x80014eae +8000497c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x19191919 +80004980: 000d2583 lw x11,0(x26) +80004984: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x19191919 +80004988: 000d2e03 lw x28,0(x26) +8000498c: 004d0d13 addi x26,x26,4 + +80004990 : +Zkne_aes32esmi_cg_cp_sbox_b25: + aes32esmi x27, x11, x28, 2 # perform operation +80004990: a7c58db3 aes32esmi x27,x11,x28,0x2 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b25, Zkne_aes32esmi_cg_cp_sbox_b25_str) +80004994: 0008a203 lw x4,0(x17) +80004998: 01b20863 beq x4,x27,800049a8 +8000499c: 025032ef jal x5,800081c0 +800049a0: 80004990 .word 0x80004990 +800049a4: 80014ee8 .word 0x80014ee8 +800049a8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x1a1a1a1a +800049ac: 000d2c03 lw x24,0(x26) +800049b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x1a1a1a1a +800049b4: 000d2483 lw x9,0(x26) +800049b8: 004d0d13 addi x26,x26,4 + +800049bc : +Zkne_aes32esmi_cg_cp_sbox_b26: + aes32esmi x30, x24, x9, 3 # perform operation +800049bc: e69c0f33 aes32esmi x30,x24,x9,0x3 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b26, Zkne_aes32esmi_cg_cp_sbox_b26_str) +800049c0: 0008a203 lw x4,0(x17) +800049c4: 01e20863 beq x4,x30,800049d4 +800049c8: 7f8032ef jal x5,800081c0 +800049cc: 800049bc .word 0x800049bc +800049d0: 80014f22 .word 0x80014f22 +800049d4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x1b1b1b1b +800049d8: 000d2983 lw x19,0(x26) +800049dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x1b1b1b1b +800049e0: 000d2183 lw x3,0(x26) +800049e4: 004d0d13 addi x26,x26,4 + +800049e8 : +Zkne_aes32esmi_cg_cp_sbox_b27: + aes32esmi x11, x19, x3, 0 # perform operation +800049e8: 263985b3 aes32esmi x11,x19,x3,0x0 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zkne_aes32esmi_cg_cp_sbox_b27, Zkne_aes32esmi_cg_cp_sbox_b27_str) +800049ec: 0008a203 lw x4,0(x17) +800049f0: 00b20863 beq x4,x11,80004a00 +800049f4: 7cc032ef jal x5,800081c0 +800049f8: 800049e8 .word 0x800049e8 +800049fc: 80014f5c .word 0x80014f5c +80004a00: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x1c1c1c1c +80004a04: 000d2c03 lw x24,0(x26) +80004a08: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x1c1c1c1c +80004a0c: 000d2383 lw x7,0(x26) +80004a10: 004d0d13 addi x26,x26,4 + +80004a14 : +Zkne_aes32esmi_cg_cp_sbox_b28: + aes32esmi x27, x24, x7, 3 # perform operation +80004a14: e67c0db3 aes32esmi x27,x24,x7,0x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b28, Zkne_aes32esmi_cg_cp_sbox_b28_str) +80004a18: 0008a203 lw x4,0(x17) +80004a1c: 01b20863 beq x4,x27,80004a2c +80004a20: 7a0032ef jal x5,800081c0 +80004a24: 80004a14 .word 0x80004a14 +80004a28: 80014f96 .word 0x80014f96 +80004a2c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x1d1d1d1d +80004a30: 000d2983 lw x19,0(x26) +80004a34: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x1d1d1d1d +80004a38: 000d2103 lw x2,0(x26) +80004a3c: 004d0d13 addi x26,x26,4 + +80004a40 : +Zkne_aes32esmi_cg_cp_sbox_b29: + aes32esmi x29, x19, x2, 1 # perform operation +80004a40: 66298eb3 aes32esmi x29,x19,x2,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b29, Zkne_aes32esmi_cg_cp_sbox_b29_str) +80004a44: 0008a203 lw x4,0(x17) +80004a48: 01d20863 beq x4,x29,80004a58 +80004a4c: 774032ef jal x5,800081c0 +80004a50: 80004a40 .word 0x80004a40 +80004a54: 80014fd0 .word 0x80014fd0 +80004a58: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x1e1e1e1e +80004a5c: 000d2a83 lw x21,0(x26) +80004a60: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x1e1e1e1e +80004a64: 000d2783 lw x15,0(x26) +80004a68: 004d0d13 addi x26,x26,4 + +80004a6c : +Zkne_aes32esmi_cg_cp_sbox_b30: + aes32esmi x23, x21, x15, 1 # perform operation +80004a6c: 66fa8bb3 aes32esmi x23,x21,x15,0x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b30, Zkne_aes32esmi_cg_cp_sbox_b30_str) +80004a70: 0008a203 lw x4,0(x17) +80004a74: 01720863 beq x4,x23,80004a84 +80004a78: 748032ef jal x5,800081c0 +80004a7c: 80004a6c .word 0x80004a6c +80004a80: 8001500a .word 0x8001500a +80004a84: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x1f1f1f1f +80004a88: 000d2183 lw x3,0(x26) +80004a8c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x1f1f1f1f +80004a90: 000d2583 lw x11,0(x26) +80004a94: 004d0d13 addi x26,x26,4 + +80004a98 : +Zkne_aes32esmi_cg_cp_sbox_b31: + aes32esmi x9, x3, x11, 3 # perform operation +80004a98: e6b184b3 aes32esmi x9,x3,x11,0x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b31, Zkne_aes32esmi_cg_cp_sbox_b31_str) +80004a9c: 0008a203 lw x4,0(x17) +80004aa0: 00920863 beq x4,x9,80004ab0 +80004aa4: 71c032ef jal x5,800081c0 +80004aa8: 80004a98 .word 0x80004a98 +80004aac: 80015044 .word 0x80015044 +80004ab0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x20202020 +80004ab4: 000d2683 lw x13,0(x26) +80004ab8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x20202020 +80004abc: 000d2b03 lw x22,0(x26) +80004ac0: 004d0d13 addi x26,x26,4 + +80004ac4 : +Zkne_aes32esmi_cg_cp_sbox_b32: + aes32esmi x24, x13, x22, 1 # perform operation +80004ac4: 67668c33 aes32esmi x24,x13,x22,0x1 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b32, Zkne_aes32esmi_cg_cp_sbox_b32_str) +80004ac8: 0008a203 lw x4,0(x17) +80004acc: 01820863 beq x4,x24,80004adc +80004ad0: 6f0032ef jal x5,800081c0 +80004ad4: 80004ac4 .word 0x80004ac4 +80004ad8: 8001507e .word 0x8001507e +80004adc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x21212121 +80004ae0: 000d2b83 lw x23,0(x26) +80004ae4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x21212121 +80004ae8: 000d2303 lw x6,0(x26) +80004aec: 004d0d13 addi x26,x26,4 + +80004af0 : +Zkne_aes32esmi_cg_cp_sbox_b33: + aes32esmi x28, x23, x6, 3 # perform operation +80004af0: e66b8e33 aes32esmi x28,x23,x6,0x3 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_sbox_b33, Zkne_aes32esmi_cg_cp_sbox_b33_str) +80004af4: 0008a203 lw x4,0(x17) +80004af8: 01c20863 beq x4,x28,80004b08 +80004afc: 6c4032ef jal x5,800081c0 +80004b00: 80004af0 .word 0x80004af0 +80004b04: 800150b8 .word 0x800150b8 +80004b08: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x22222222 +80004b0c: 000d2183 lw x3,0(x26) +80004b10: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x22222222 +80004b14: 000d2b83 lw x23,0(x26) +80004b18: 004d0d13 addi x26,x26,4 + +80004b1c : +Zkne_aes32esmi_cg_cp_sbox_b34: + aes32esmi x6, x3, x23, 1 # perform operation +80004b1c: 67718333 aes32esmi x6,x3,x23,0x1 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b34, Zkne_aes32esmi_cg_cp_sbox_b34_str) +80004b20: 0008a203 lw x4,0(x17) +80004b24: 00620863 beq x4,x6,80004b34 +80004b28: 698032ef jal x5,800081c0 +80004b2c: 80004b1c .word 0x80004b1c +80004b30: 800150f2 .word 0x800150f2 +80004b34: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x23232323 +80004b38: 000d2e03 lw x28,0(x26) +80004b3c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x23232323 +80004b40: 000d2083 lw x1,0(x26) +80004b44: 004d0d13 addi x26,x26,4 + +80004b48 : +Zkne_aes32esmi_cg_cp_sbox_b35: + aes32esmi x31, x28, x1, 2 # perform operation +80004b48: a61e0fb3 aes32esmi x31,x28,x1,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b35, Zkne_aes32esmi_cg_cp_sbox_b35_str) +80004b4c: 0008a203 lw x4,0(x17) +80004b50: 01f20863 beq x4,x31,80004b60 +80004b54: 66c032ef jal x5,800081c0 +80004b58: 80004b48 .word 0x80004b48 +80004b5c: 8001512c .word 0x8001512c +80004b60: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x24242424 +80004b64: 000d2403 lw x8,0(x26) +80004b68: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x24242424 +80004b6c: 000d2c03 lw x24,0(x26) +80004b70: 004d0d13 addi x26,x26,4 + +80004b74 : +Zkne_aes32esmi_cg_cp_sbox_b36: + aes32esmi x6, x8, x24, 2 # perform operation +80004b74: a7840333 aes32esmi x6,x8,x24,0x2 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b36, Zkne_aes32esmi_cg_cp_sbox_b36_str) +80004b78: 0008a203 lw x4,0(x17) +80004b7c: 00620863 beq x4,x6,80004b8c +80004b80: 640032ef jal x5,800081c0 +80004b84: 80004b74 .word 0x80004b74 +80004b88: 80015166 .word 0x80015166 +80004b8c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x25252525 +80004b90: 000d2683 lw x13,0(x26) +80004b94: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x25252525 +80004b98: 000d2983 lw x19,0(x26) +80004b9c: 004d0d13 addi x26,x26,4 + +80004ba0 : +Zkne_aes32esmi_cg_cp_sbox_b37: + aes32esmi x18, x13, x19, 3 # perform operation +80004ba0: e7368933 aes32esmi x18,x13,x19,0x3 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b37, Zkne_aes32esmi_cg_cp_sbox_b37_str) +80004ba4: 0008a203 lw x4,0(x17) +80004ba8: 01220863 beq x4,x18,80004bb8 +80004bac: 614032ef jal x5,800081c0 +80004bb0: 80004ba0 .word 0x80004ba0 +80004bb4: 800151a0 .word 0x800151a0 +80004bb8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x26262626 +80004bbc: 000d2b03 lw x22,0(x26) +80004bc0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x26262626 +80004bc4: 000d2c83 lw x25,0(x26) +80004bc8: 004d0d13 addi x26,x26,4 + +80004bcc : +Zkne_aes32esmi_cg_cp_sbox_b38: + aes32esmi x18, x22, x25, 2 # perform operation +80004bcc: a79b0933 aes32esmi x18,x22,x25,0x2 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b38, Zkne_aes32esmi_cg_cp_sbox_b38_str) +80004bd0: 0008a203 lw x4,0(x17) +80004bd4: 01220863 beq x4,x18,80004be4 +80004bd8: 5e8032ef jal x5,800081c0 +80004bdc: 80004bcc .word 0x80004bcc +80004be0: 800151da .word 0x800151da +80004be4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x27272727 +80004be8: 000d2a03 lw x20,0(x26) +80004bec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x27272727 +80004bf0: 000d2903 lw x18,0(x26) +80004bf4: 004d0d13 addi x26,x26,4 + +80004bf8 : +Zkne_aes32esmi_cg_cp_sbox_b39: + aes32esmi x8, x20, x18, 3 # perform operation +80004bf8: e72a0433 aes32esmi x8,x20,x18,0x3 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b39, Zkne_aes32esmi_cg_cp_sbox_b39_str) +80004bfc: 0008a203 lw x4,0(x17) +80004c00: 00820863 beq x4,x8,80004c10 +80004c04: 5bc032ef jal x5,800081c0 +80004c08: 80004bf8 .word 0x80004bf8 +80004c0c: 80015214 .word 0x80015214 +80004c10: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x28282828 +80004c14: 000d2c03 lw x24,0(x26) +80004c18: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x28282828 +80004c1c: 000d2e03 lw x28,0(x26) +80004c20: 004d0d13 addi x26,x26,4 + +80004c24 : +Zkne_aes32esmi_cg_cp_sbox_b40: + aes32esmi x19, x24, x28, 0 # perform operation +80004c24: 27cc09b3 aes32esmi x19,x24,x28,0x0 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b40, Zkne_aes32esmi_cg_cp_sbox_b40_str) +80004c28: 0008a203 lw x4,0(x17) +80004c2c: 01320863 beq x4,x19,80004c3c +80004c30: 590032ef jal x5,800081c0 +80004c34: 80004c24 .word 0x80004c24 +80004c38: 8001524e .word 0x8001524e +80004c3c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x29292929 +80004c40: 000d2b03 lw x22,0(x26) +80004c44: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x29292929 +80004c48: 000d2983 lw x19,0(x26) +80004c4c: 004d0d13 addi x26,x26,4 + +80004c50 : +Zkne_aes32esmi_cg_cp_sbox_b41: + aes32esmi x30, x22, x19, 0 # perform operation +80004c50: 273b0f33 aes32esmi x30,x22,x19,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b41, Zkne_aes32esmi_cg_cp_sbox_b41_str) +80004c54: 0008a203 lw x4,0(x17) +80004c58: 01e20863 beq x4,x30,80004c68 +80004c5c: 564032ef jal x5,800081c0 +80004c60: 80004c50 .word 0x80004c50 +80004c64: 80015288 .word 0x80015288 +80004c68: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x2a2a2a2a +80004c6c: 000d2803 lw x16,0(x26) +80004c70: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x2a2a2a2a +80004c74: 000d2403 lw x8,0(x26) +80004c78: 004d0d13 addi x26,x26,4 + +80004c7c : +Zkne_aes32esmi_cg_cp_sbox_b42: + aes32esmi x30, x16, x8, 1 # perform operation +80004c7c: 66880f33 aes32esmi x30,x16,x8,0x1 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b42, Zkne_aes32esmi_cg_cp_sbox_b42_str) +80004c80: 0008a203 lw x4,0(x17) +80004c84: 01e20863 beq x4,x30,80004c94 +80004c88: 538032ef jal x5,800081c0 +80004c8c: 80004c7c .word 0x80004c7c +80004c90: 800152c2 .word 0x800152c2 +80004c94: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x2b2b2b2b +80004c98: 000d2903 lw x18,0(x26) +80004c9c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x2b2b2b2b +80004ca0: 000d2703 lw x14,0(x26) +80004ca4: 004d0d13 addi x26,x26,4 + +80004ca8 : +Zkne_aes32esmi_cg_cp_sbox_b43: + aes32esmi x23, x18, x14, 1 # perform operation +80004ca8: 66e90bb3 aes32esmi x23,x18,x14,0x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b43, Zkne_aes32esmi_cg_cp_sbox_b43_str) +80004cac: 0008a203 lw x4,0(x17) +80004cb0: 01720863 beq x4,x23,80004cc0 +80004cb4: 50c032ef jal x5,800081c0 +80004cb8: 80004ca8 .word 0x80004ca8 +80004cbc: 800152fc .word 0x800152fc +80004cc0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x2c2c2c2c +80004cc4: 000d2903 lw x18,0(x26) +80004cc8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x2c2c2c2c +80004ccc: 000d2483 lw x9,0(x26) +80004cd0: 004d0d13 addi x26,x26,4 + +80004cd4 : +Zkne_aes32esmi_cg_cp_sbox_b44: + aes32esmi x15, x18, x9, 1 # perform operation +80004cd4: 669907b3 aes32esmi x15,x18,x9,0x1 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b44, Zkne_aes32esmi_cg_cp_sbox_b44_str) +80004cd8: 0008a203 lw x4,0(x17) +80004cdc: 00f20863 beq x4,x15,80004cec +80004ce0: 4e0032ef jal x5,800081c0 +80004ce4: 80004cd4 .word 0x80004cd4 +80004ce8: 80015336 .word 0x80015336 +80004cec: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x2d2d2d2d +80004cf0: 000d2c03 lw x24,0(x26) +80004cf4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x2d2d2d2d +80004cf8: 000d2f83 lw x31,0(x26) +80004cfc: 004d0d13 addi x26,x26,4 + +80004d00 : +Zkne_aes32esmi_cg_cp_sbox_b45: + aes32esmi x19, x24, x31, 0 # perform operation +80004d00: 27fc09b3 aes32esmi x19,x24,x31,0x0 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b45, Zkne_aes32esmi_cg_cp_sbox_b45_str) +80004d04: 0008a203 lw x4,0(x17) +80004d08: 01320863 beq x4,x19,80004d18 +80004d0c: 4b4032ef jal x5,800081c0 +80004d10: 80004d00 .word 0x80004d00 +80004d14: 80015370 .word 0x80015370 +80004d18: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x2e2e2e2e +80004d1c: 000d2e83 lw x29,0(x26) +80004d20: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x2e2e2e2e +80004d24: 000d2783 lw x15,0(x26) +80004d28: 004d0d13 addi x26,x26,4 + +80004d2c : +Zkne_aes32esmi_cg_cp_sbox_b46: + aes32esmi x13, x29, x15, 3 # perform operation +80004d2c: e6fe86b3 aes32esmi x13,x29,x15,0x3 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b46, Zkne_aes32esmi_cg_cp_sbox_b46_str) +80004d30: 0008a203 lw x4,0(x17) +80004d34: 00d20863 beq x4,x13,80004d44 +80004d38: 488032ef jal x5,800081c0 +80004d3c: 80004d2c .word 0x80004d2c +80004d40: 800153aa .word 0x800153aa +80004d44: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x2f2f2f2f +80004d48: 000d2b83 lw x23,0(x26) +80004d4c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x2f2f2f2f +80004d50: 000d2803 lw x16,0(x26) +80004d54: 004d0d13 addi x26,x26,4 + +80004d58 : +Zkne_aes32esmi_cg_cp_sbox_b47: + aes32esmi x9, x23, x16, 1 # perform operation +80004d58: 670b84b3 aes32esmi x9,x23,x16,0x1 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b47, Zkne_aes32esmi_cg_cp_sbox_b47_str) +80004d5c: 0008a203 lw x4,0(x17) +80004d60: 00920863 beq x4,x9,80004d70 +80004d64: 45c032ef jal x5,800081c0 +80004d68: 80004d58 .word 0x80004d58 +80004d6c: 800153e4 .word 0x800153e4 +80004d70: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x30303030 +80004d74: 000d2803 lw x16,0(x26) +80004d78: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x30303030 +80004d7c: 000d2983 lw x19,0(x26) +80004d80: 004d0d13 addi x26,x26,4 + +80004d84 : +Zkne_aes32esmi_cg_cp_sbox_b48: + aes32esmi x31, x16, x19, 3 # perform operation +80004d84: e7380fb3 aes32esmi x31,x16,x19,0x3 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b48, Zkne_aes32esmi_cg_cp_sbox_b48_str) +80004d88: 0008a203 lw x4,0(x17) +80004d8c: 01f20863 beq x4,x31,80004d9c +80004d90: 430032ef jal x5,800081c0 +80004d94: 80004d84 .word 0x80004d84 +80004d98: 8001541e .word 0x8001541e +80004d9c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x31313131 +80004da0: 000d2683 lw x13,0(x26) +80004da4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x31313131 +80004da8: 000d2503 lw x10,0(x26) +80004dac: 004d0d13 addi x26,x26,4 + +80004db0 : +Zkne_aes32esmi_cg_cp_sbox_b49: + aes32esmi x6, x13, x10, 2 # perform operation +80004db0: a6a68333 aes32esmi x6,x13,x10,0x2 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b49, Zkne_aes32esmi_cg_cp_sbox_b49_str) +80004db4: 0008a203 lw x4,0(x17) +80004db8: 00620863 beq x4,x6,80004dc8 +80004dbc: 404032ef jal x5,800081c0 +80004dc0: 80004db0 .word 0x80004db0 +80004dc4: 80015458 .word 0x80015458 +80004dc8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x32323232 +80004dcc: 000d2c83 lw x25,0(x26) +80004dd0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x32323232 +80004dd4: 000d2a83 lw x21,0(x26) +80004dd8: 004d0d13 addi x26,x26,4 + +80004ddc : +Zkne_aes32esmi_cg_cp_sbox_b50: + aes32esmi x30, x25, x21, 0 # perform operation +80004ddc: 275c8f33 aes32esmi x30,x25,x21,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b50, Zkne_aes32esmi_cg_cp_sbox_b50_str) +80004de0: 0008a203 lw x4,0(x17) +80004de4: 01e20863 beq x4,x30,80004df4 +80004de8: 3d8032ef jal x5,800081c0 +80004dec: 80004ddc .word 0x80004ddc +80004df0: 80015492 .word 0x80015492 +80004df4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x33333333 +80004df8: 000d2783 lw x15,0(x26) +80004dfc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x33333333 +80004e00: 000d2a83 lw x21,0(x26) +80004e04: 004d0d13 addi x26,x26,4 + +80004e08 : +Zkne_aes32esmi_cg_cp_sbox_b51: + aes32esmi x11, x15, x21, 3 # perform operation +80004e08: e75785b3 aes32esmi x11,x15,x21,0x3 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zkne_aes32esmi_cg_cp_sbox_b51, Zkne_aes32esmi_cg_cp_sbox_b51_str) +80004e0c: 0008a203 lw x4,0(x17) +80004e10: 00b20863 beq x4,x11,80004e20 +80004e14: 3ac032ef jal x5,800081c0 +80004e18: 80004e08 .word 0x80004e08 +80004e1c: 800154cc .word 0x800154cc +80004e20: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x34343434 +80004e24: 000d2503 lw x10,0(x26) +80004e28: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x34343434 +80004e2c: 000d2783 lw x15,0(x26) +80004e30: 004d0d13 addi x26,x26,4 + +80004e34 : +Zkne_aes32esmi_cg_cp_sbox_b52: + aes32esmi x25, x10, x15, 1 # perform operation +80004e34: 66f50cb3 aes32esmi x25,x10,x15,0x1 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b52, Zkne_aes32esmi_cg_cp_sbox_b52_str) +80004e38: 0008a203 lw x4,0(x17) +80004e3c: 01920863 beq x4,x25,80004e4c +80004e40: 380032ef jal x5,800081c0 +80004e44: 80004e34 .word 0x80004e34 +80004e48: 80015506 .word 0x80015506 +80004e4c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x35353535 +80004e50: 000d2c03 lw x24,0(x26) +80004e54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x35353535 +80004e58: 000d2a03 lw x20,0(x26) +80004e5c: 004d0d13 addi x26,x26,4 + +80004e60 : +Zkne_aes32esmi_cg_cp_sbox_b53: + aes32esmi x10, x24, x20, 1 # perform operation +80004e60: 674c0533 aes32esmi x10,x24,x20,0x1 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b53, Zkne_aes32esmi_cg_cp_sbox_b53_str) +80004e64: 0008a203 lw x4,0(x17) +80004e68: 00a20863 beq x4,x10,80004e78 +80004e6c: 354032ef jal x5,800081c0 +80004e70: 80004e60 .word 0x80004e60 +80004e74: 80015540 .word 0x80015540 +80004e78: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x36363636 +80004e7c: 000d2f83 lw x31,0(x26) +80004e80: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x36363636 +80004e84: 000d2303 lw x6,0(x26) +80004e88: 004d0d13 addi x26,x26,4 + +80004e8c : +Zkne_aes32esmi_cg_cp_sbox_b54: + aes32esmi x14, x31, x6, 1 # perform operation +80004e8c: 666f8733 aes32esmi x14,x31,x6,0x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b54, Zkne_aes32esmi_cg_cp_sbox_b54_str) +80004e90: 0008a203 lw x4,0(x17) +80004e94: 00e20863 beq x4,x14,80004ea4 +80004e98: 328032ef jal x5,800081c0 +80004e9c: 80004e8c .word 0x80004e8c +80004ea0: 8001557a .word 0x8001557a +80004ea4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x37373737 +80004ea8: 000d2403 lw x8,0(x26) +80004eac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x37373737 +80004eb0: 000d2083 lw x1,0(x26) +80004eb4: 004d0d13 addi x26,x26,4 + +80004eb8 : +Zkne_aes32esmi_cg_cp_sbox_b55: + aes32esmi x28, x8, x1, 0 # perform operation +80004eb8: 26140e33 aes32esmi x28,x8,x1,0x0 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_sbox_b55, Zkne_aes32esmi_cg_cp_sbox_b55_str) +80004ebc: 0008a203 lw x4,0(x17) +80004ec0: 01c20863 beq x4,x28,80004ed0 +80004ec4: 2fc032ef jal x5,800081c0 +80004ec8: 80004eb8 .word 0x80004eb8 +80004ecc: 800155b4 .word 0x800155b4 +80004ed0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x38383838 +80004ed4: 000d2503 lw x10,0(x26) +80004ed8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x38383838 +80004edc: 000d2e03 lw x28,0(x26) +80004ee0: 004d0d13 addi x26,x26,4 + +80004ee4 : +Zkne_aes32esmi_cg_cp_sbox_b56: + aes32esmi x16, x10, x28, 3 # perform operation +80004ee4: e7c50833 aes32esmi x16,x10,x28,0x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b56, Zkne_aes32esmi_cg_cp_sbox_b56_str) +80004ee8: 0008a203 lw x4,0(x17) +80004eec: 01020863 beq x4,x16,80004efc +80004ef0: 2d0032ef jal x5,800081c0 +80004ef4: 80004ee4 .word 0x80004ee4 +80004ef8: 800155ee .word 0x800155ee +80004efc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x39393939 +80004f00: 000d2903 lw x18,0(x26) +80004f04: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x39393939 +80004f08: 000d2e83 lw x29,0(x26) +80004f0c: 004d0d13 addi x26,x26,4 + +80004f10 : +Zkne_aes32esmi_cg_cp_sbox_b57: + aes32esmi x2, x18, x29, 1 # perform operation +80004f10: 67d90133 aes32esmi x2,x18,x29,0x1 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b57, Zkne_aes32esmi_cg_cp_sbox_b57_str) +80004f14: 0008a203 lw x4,0(x17) +80004f18: 00220863 beq x4,x2,80004f28 +80004f1c: 2a4032ef jal x5,800081c0 +80004f20: 80004f10 .word 0x80004f10 +80004f24: 80015628 .word 0x80015628 +80004f28: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x3a3a3a3a +80004f2c: 000d2083 lw x1,0(x26) +80004f30: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x3a3a3a3a +80004f34: 000d2c83 lw x25,0(x26) +80004f38: 004d0d13 addi x26,x26,4 + +80004f3c : +Zkne_aes32esmi_cg_cp_sbox_b58: + aes32esmi x3, x1, x25, 2 # perform operation +80004f3c: a79081b3 aes32esmi x3,x1,x25,0x2 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes32esmi_cg_cp_sbox_b58, Zkne_aes32esmi_cg_cp_sbox_b58_str) +80004f40: 0008a203 lw x4,0(x17) +80004f44: 00320863 beq x4,x3,80004f54 +80004f48: 278032ef jal x5,800081c0 +80004f4c: 80004f3c .word 0x80004f3c +80004f50: 80015662 .word 0x80015662 +80004f54: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x3b3b3b3b +80004f58: 000d2a83 lw x21,0(x26) +80004f5c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x3b3b3b3b +80004f60: 000d2d83 lw x27,0(x26) +80004f64: 004d0d13 addi x26,x26,4 + +80004f68 : +Zkne_aes32esmi_cg_cp_sbox_b59: + aes32esmi x23, x21, x27, 3 # perform operation +80004f68: e7ba8bb3 aes32esmi x23,x21,x27,0x3 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b59, Zkne_aes32esmi_cg_cp_sbox_b59_str) +80004f6c: 0008a203 lw x4,0(x17) +80004f70: 01720863 beq x4,x23,80004f80 +80004f74: 24c032ef jal x5,800081c0 +80004f78: 80004f68 .word 0x80004f68 +80004f7c: 8001569c .word 0x8001569c +80004f80: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x3c3c3c3c +80004f84: 000d2303 lw x6,0(x26) +80004f88: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x3c3c3c3c +80004f8c: 000d2383 lw x7,0(x26) +80004f90: 004d0d13 addi x26,x26,4 + +80004f94 : +Zkne_aes32esmi_cg_cp_sbox_b60: + aes32esmi x15, x6, x7, 2 # perform operation +80004f94: a67307b3 aes32esmi x15,x6,x7,0x2 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b60, Zkne_aes32esmi_cg_cp_sbox_b60_str) +80004f98: 0008a203 lw x4,0(x17) +80004f9c: 00f20863 beq x4,x15,80004fac +80004fa0: 220032ef jal x5,800081c0 +80004fa4: 80004f94 .word 0x80004f94 +80004fa8: 800156d6 .word 0x800156d6 +80004fac: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x3d3d3d3d +80004fb0: 000d2903 lw x18,0(x26) +80004fb4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x3d3d3d3d +80004fb8: 000d2983 lw x19,0(x26) +80004fbc: 004d0d13 addi x26,x26,4 + +80004fc0 : +Zkne_aes32esmi_cg_cp_sbox_b61: + aes32esmi x1, x18, x19, 3 # perform operation +80004fc0: e73900b3 aes32esmi x1,x18,x19,0x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b61, Zkne_aes32esmi_cg_cp_sbox_b61_str) +80004fc4: 0008a203 lw x4,0(x17) +80004fc8: 00120863 beq x4,x1,80004fd8 +80004fcc: 1f4032ef jal x5,800081c0 +80004fd0: 80004fc0 .word 0x80004fc0 +80004fd4: 80015710 .word 0x80015710 +80004fd8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x3e3e3e3e +80004fdc: 000d2483 lw x9,0(x26) +80004fe0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x3e3e3e3e +80004fe4: 000d2a03 lw x20,0(x26) +80004fe8: 004d0d13 addi x26,x26,4 + +80004fec : +Zkne_aes32esmi_cg_cp_sbox_b62: + aes32esmi x11, x9, x20, 2 # perform operation +80004fec: a74485b3 aes32esmi x11,x9,x20,0x2 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zkne_aes32esmi_cg_cp_sbox_b62, Zkne_aes32esmi_cg_cp_sbox_b62_str) +80004ff0: 0008a203 lw x4,0(x17) +80004ff4: 00b20863 beq x4,x11,80005004 +80004ff8: 1c8032ef jal x5,800081c0 +80004ffc: 80004fec .word 0x80004fec +80005000: 8001574a .word 0x8001574a +80005004: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x3f3f3f3f +80005008: 000d2803 lw x16,0(x26) +8000500c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x3f3f3f3f +80005010: 000d2703 lw x14,0(x26) +80005014: 004d0d13 addi x26,x26,4 + +80005018 : +Zkne_aes32esmi_cg_cp_sbox_b63: + aes32esmi x2, x16, x14, 0 # perform operation +80005018: 26e80133 aes32esmi x2,x16,x14,0x0 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b63, Zkne_aes32esmi_cg_cp_sbox_b63_str) +8000501c: 0008a203 lw x4,0(x17) +80005020: 00220863 beq x4,x2,80005030 +80005024: 19c032ef jal x5,800081c0 +80005028: 80005018 .word 0x80005018 +8000502c: 80015784 .word 0x80015784 +80005030: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x40404040 +80005034: 000d2c83 lw x25,0(x26) +80005038: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x40404040 +8000503c: 000d2983 lw x19,0(x26) +80005040: 004d0d13 addi x26,x26,4 + +80005044 : +Zkne_aes32esmi_cg_cp_sbox_b64: + aes32esmi x30, x25, x19, 0 # perform operation +80005044: 273c8f33 aes32esmi x30,x25,x19,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b64, Zkne_aes32esmi_cg_cp_sbox_b64_str) +80005048: 0008a203 lw x4,0(x17) +8000504c: 01e20863 beq x4,x30,8000505c +80005050: 170032ef jal x5,800081c0 +80005054: 80005044 .word 0x80005044 +80005058: 800157be .word 0x800157be +8000505c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x41414141 +80005060: 000d2803 lw x16,0(x26) +80005064: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x41414141 +80005068: 000d2983 lw x19,0(x26) +8000506c: 004d0d13 addi x26,x26,4 + +80005070 : +Zkne_aes32esmi_cg_cp_sbox_b65: + aes32esmi x22, x16, x19, 1 # perform operation +80005070: 67380b33 aes32esmi x22,x16,x19,0x1 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b65, Zkne_aes32esmi_cg_cp_sbox_b65_str) +80005074: 0008a203 lw x4,0(x17) +80005078: 01620863 beq x4,x22,80005088 +8000507c: 144032ef jal x5,800081c0 +80005080: 80005070 .word 0x80005070 +80005084: 800157f8 .word 0x800157f8 +80005088: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x42424242 +8000508c: 000d2083 lw x1,0(x26) +80005090: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x42424242 +80005094: 000d2503 lw x10,0(x26) +80005098: 004d0d13 addi x26,x26,4 + +8000509c : +Zkne_aes32esmi_cg_cp_sbox_b66: + aes32esmi x16, x1, x10, 3 # perform operation +8000509c: e6a08833 aes32esmi x16,x1,x10,0x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b66, Zkne_aes32esmi_cg_cp_sbox_b66_str) +800050a0: 0008a203 lw x4,0(x17) +800050a4: 01020863 beq x4,x16,800050b4 +800050a8: 118032ef jal x5,800081c0 +800050ac: 8000509c .word 0x8000509c +800050b0: 80015832 .word 0x80015832 +800050b4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x43434343 +800050b8: 000d2f03 lw x30,0(x26) +800050bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x43434343 +800050c0: 000d2403 lw x8,0(x26) +800050c4: 004d0d13 addi x26,x26,4 + +800050c8 : +Zkne_aes32esmi_cg_cp_sbox_b67: + aes32esmi x24, x30, x8, 0 # perform operation +800050c8: 268f0c33 aes32esmi x24,x30,x8,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b67, Zkne_aes32esmi_cg_cp_sbox_b67_str) +800050cc: 0008a203 lw x4,0(x17) +800050d0: 01820863 beq x4,x24,800050e0 +800050d4: 0ec032ef jal x5,800081c0 +800050d8: 800050c8 .word 0x800050c8 +800050dc: 8001586c .word 0x8001586c +800050e0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x44444444 +800050e4: 000d2583 lw x11,0(x26) +800050e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x44444444 +800050ec: 000d2183 lw x3,0(x26) +800050f0: 004d0d13 addi x26,x26,4 + +800050f4 : +Zkne_aes32esmi_cg_cp_sbox_b68: + aes32esmi x23, x11, x3, 0 # perform operation +800050f4: 26358bb3 aes32esmi x23,x11,x3,0x0 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b68, Zkne_aes32esmi_cg_cp_sbox_b68_str) +800050f8: 0008a203 lw x4,0(x17) +800050fc: 01720863 beq x4,x23,8000510c +80005100: 0c0032ef jal x5,800081c0 +80005104: 800050f4 .word 0x800050f4 +80005108: 800158a6 .word 0x800158a6 +8000510c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x45454545 +80005110: 000d2703 lw x14,0(x26) +80005114: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x45454545 +80005118: 000d2303 lw x6,0(x26) +8000511c: 004d0d13 addi x26,x26,4 + +80005120 : +Zkne_aes32esmi_cg_cp_sbox_b69: + aes32esmi x7, x14, x6, 1 # perform operation +80005120: 666703b3 aes32esmi x7,x14,x6,0x1 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b69, Zkne_aes32esmi_cg_cp_sbox_b69_str) +80005124: 0008a203 lw x4,0(x17) +80005128: 00720863 beq x4,x7,80005138 +8000512c: 094032ef jal x5,800081c0 +80005130: 80005120 .word 0x80005120 +80005134: 800158e0 .word 0x800158e0 +80005138: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x46464646 +8000513c: 000d2f03 lw x30,0(x26) +80005140: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x46464646 +80005144: 000d2d83 lw x27,0(x26) +80005148: 004d0d13 addi x26,x26,4 + +8000514c : +Zkne_aes32esmi_cg_cp_sbox_b70: + aes32esmi x13, x30, x27, 3 # perform operation +8000514c: e7bf06b3 aes32esmi x13,x30,x27,0x3 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b70, Zkne_aes32esmi_cg_cp_sbox_b70_str) +80005150: 0008a203 lw x4,0(x17) +80005154: 00d20863 beq x4,x13,80005164 +80005158: 068032ef jal x5,800081c0 +8000515c: 8000514c .word 0x8000514c +80005160: 8001591a .word 0x8001591a +80005164: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x47474747 +80005168: 000d2a83 lw x21,0(x26) +8000516c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x47474747 +80005170: 000d2903 lw x18,0(x26) +80005174: 004d0d13 addi x26,x26,4 + +80005178 : +Zkne_aes32esmi_cg_cp_sbox_b71: + aes32esmi x30, x21, x18, 3 # perform operation +80005178: e72a8f33 aes32esmi x30,x21,x18,0x3 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b71, Zkne_aes32esmi_cg_cp_sbox_b71_str) +8000517c: 0008a203 lw x4,0(x17) +80005180: 01e20863 beq x4,x30,80005190 +80005184: 03c032ef jal x5,800081c0 +80005188: 80005178 .word 0x80005178 +8000518c: 80015954 .word 0x80015954 +80005190: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x48484848 +80005194: 000d2a03 lw x20,0(x26) +80005198: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x48484848 +8000519c: 000d2083 lw x1,0(x26) +800051a0: 004d0d13 addi x26,x26,4 + +800051a4 : +Zkne_aes32esmi_cg_cp_sbox_b72: + aes32esmi x29, x20, x1, 2 # perform operation +800051a4: a61a0eb3 aes32esmi x29,x20,x1,0x2 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b72, Zkne_aes32esmi_cg_cp_sbox_b72_str) +800051a8: 0008a203 lw x4,0(x17) +800051ac: 01d20863 beq x4,x29,800051bc +800051b0: 010032ef jal x5,800081c0 +800051b4: 800051a4 .word 0x800051a4 +800051b8: 8001598e .word 0x8001598e +800051bc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x49494949 +800051c0: 000d2483 lw x9,0(x26) +800051c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x49494949 +800051c8: 000d2a03 lw x20,0(x26) +800051cc: 004d0d13 addi x26,x26,4 + +800051d0 : +Zkne_aes32esmi_cg_cp_sbox_b73: + aes32esmi x31, x9, x20, 2 # perform operation +800051d0: a7448fb3 aes32esmi x31,x9,x20,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b73, Zkne_aes32esmi_cg_cp_sbox_b73_str) +800051d4: 0008a203 lw x4,0(x17) +800051d8: 01f20863 beq x4,x31,800051e8 +800051dc: 7e5022ef jal x5,800081c0 +800051e0: 800051d0 .word 0x800051d0 +800051e4: 800159c8 .word 0x800159c8 +800051e8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x4a4a4a4a +800051ec: 000d2403 lw x8,0(x26) +800051f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x4a4a4a4a +800051f4: 000d2f03 lw x30,0(x26) +800051f8: 004d0d13 addi x26,x26,4 + +800051fc : +Zkne_aes32esmi_cg_cp_sbox_b74: + aes32esmi x29, x8, x30, 1 # perform operation +800051fc: 67e40eb3 aes32esmi x29,x8,x30,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b74, Zkne_aes32esmi_cg_cp_sbox_b74_str) +80005200: 0008a203 lw x4,0(x17) +80005204: 01d20863 beq x4,x29,80005214 +80005208: 7b9022ef jal x5,800081c0 +8000520c: 800051fc .word 0x800051fc +80005210: 80015a02 .word 0x80015a02 +80005214: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x4b4b4b4b +80005218: 000d2683 lw x13,0(x26) +8000521c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x4b4b4b4b +80005220: 000d2b03 lw x22,0(x26) +80005224: 004d0d13 addi x26,x26,4 + +80005228 : +Zkne_aes32esmi_cg_cp_sbox_b75: + aes32esmi x23, x13, x22, 0 # perform operation +80005228: 27668bb3 aes32esmi x23,x13,x22,0x0 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b75, Zkne_aes32esmi_cg_cp_sbox_b75_str) +8000522c: 0008a203 lw x4,0(x17) +80005230: 01720863 beq x4,x23,80005240 +80005234: 78d022ef jal x5,800081c0 +80005238: 80005228 .word 0x80005228 +8000523c: 80015a3c .word 0x80015a3c +80005240: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x4c4c4c4c +80005244: 000d2783 lw x15,0(x26) +80005248: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x4c4c4c4c +8000524c: 000d2c03 lw x24,0(x26) +80005250: 004d0d13 addi x26,x26,4 + +80005254 : +Zkne_aes32esmi_cg_cp_sbox_b76: + aes32esmi x14, x15, x24, 0 # perform operation +80005254: 27878733 aes32esmi x14,x15,x24,0x0 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b76, Zkne_aes32esmi_cg_cp_sbox_b76_str) +80005258: 0008a203 lw x4,0(x17) +8000525c: 00e20863 beq x4,x14,8000526c +80005260: 761022ef jal x5,800081c0 +80005264: 80005254 .word 0x80005254 +80005268: 80015a76 .word 0x80015a76 +8000526c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x4d4d4d4d +80005270: 000d2f03 lw x30,0(x26) +80005274: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x4d4d4d4d +80005278: 000d2303 lw x6,0(x26) +8000527c: 004d0d13 addi x26,x26,4 + +80005280 : +Zkne_aes32esmi_cg_cp_sbox_b77: + aes32esmi x13, x30, x6, 0 # perform operation +80005280: 266f06b3 aes32esmi x13,x30,x6,0x0 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b77, Zkne_aes32esmi_cg_cp_sbox_b77_str) +80005284: 0008a203 lw x4,0(x17) +80005288: 00d20863 beq x4,x13,80005298 +8000528c: 735022ef jal x5,800081c0 +80005290: 80005280 .word 0x80005280 +80005294: 80015ab0 .word 0x80015ab0 +80005298: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x4e4e4e4e +8000529c: 000d2b03 lw x22,0(x26) +800052a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x4e4e4e4e +800052a4: 000d2b83 lw x23,0(x26) +800052a8: 004d0d13 addi x26,x26,4 + +800052ac : +Zkne_aes32esmi_cg_cp_sbox_b78: + aes32esmi x25, x22, x23, 0 # perform operation +800052ac: 277b0cb3 aes32esmi x25,x22,x23,0x0 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b78, Zkne_aes32esmi_cg_cp_sbox_b78_str) +800052b0: 0008a203 lw x4,0(x17) +800052b4: 01920863 beq x4,x25,800052c4 +800052b8: 709022ef jal x5,800081c0 +800052bc: 800052ac .word 0x800052ac +800052c0: 80015aea .word 0x80015aea +800052c4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x4f4f4f4f +800052c8: 000d2383 lw x7,0(x26) +800052cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x4f4f4f4f +800052d0: 000d2a03 lw x20,0(x26) +800052d4: 004d0d13 addi x26,x26,4 + +800052d8 : +Zkne_aes32esmi_cg_cp_sbox_b79: + aes32esmi x21, x7, x20, 0 # perform operation +800052d8: 27438ab3 aes32esmi x21,x7,x20,0x0 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zkne_aes32esmi_cg_cp_sbox_b79, Zkne_aes32esmi_cg_cp_sbox_b79_str) +800052dc: 0008a203 lw x4,0(x17) +800052e0: 01520863 beq x4,x21,800052f0 +800052e4: 6dd022ef jal x5,800081c0 +800052e8: 800052d8 .word 0x800052d8 +800052ec: 80015b24 .word 0x80015b24 +800052f0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x50505050 +800052f4: 000d2303 lw x6,0(x26) +800052f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x50505050 +800052fc: 000d2c03 lw x24,0(x26) +80005300: 004d0d13 addi x26,x26,4 + +80005304 : +Zkne_aes32esmi_cg_cp_sbox_b80: + aes32esmi x31, x6, x24, 2 # perform operation +80005304: a7830fb3 aes32esmi x31,x6,x24,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b80, Zkne_aes32esmi_cg_cp_sbox_b80_str) +80005308: 0008a203 lw x4,0(x17) +8000530c: 01f20863 beq x4,x31,8000531c +80005310: 6b1022ef jal x5,800081c0 +80005314: 80005304 .word 0x80005304 +80005318: 80015b5e .word 0x80015b5e +8000531c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x51515151 +80005320: 000d2c83 lw x25,0(x26) +80005324: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x51515151 +80005328: 000d2e83 lw x29,0(x26) +8000532c: 004d0d13 addi x26,x26,4 + +80005330 : +Zkne_aes32esmi_cg_cp_sbox_b81: + aes32esmi x20, x25, x29, 1 # perform operation +80005330: 67dc8a33 aes32esmi x20,x25,x29,0x1 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b81, Zkne_aes32esmi_cg_cp_sbox_b81_str) +80005334: 0008a203 lw x4,0(x17) +80005338: 01420863 beq x4,x20,80005348 +8000533c: 685022ef jal x5,800081c0 +80005340: 80005330 .word 0x80005330 +80005344: 80015b98 .word 0x80015b98 +80005348: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x52525252 +8000534c: 000d2e83 lw x29,0(x26) +80005350: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x52525252 +80005354: 000d2703 lw x14,0(x26) +80005358: 004d0d13 addi x26,x26,4 + +8000535c : +Zkne_aes32esmi_cg_cp_sbox_b82: + aes32esmi x22, x29, x14, 2 # perform operation +8000535c: a6ee8b33 aes32esmi x22,x29,x14,0x2 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b82, Zkne_aes32esmi_cg_cp_sbox_b82_str) +80005360: 0008a203 lw x4,0(x17) +80005364: 01620863 beq x4,x22,80005374 +80005368: 659022ef jal x5,800081c0 +8000536c: 8000535c .word 0x8000535c +80005370: 80015bd2 .word 0x80015bd2 +80005374: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x53535353 +80005378: 000d2c03 lw x24,0(x26) +8000537c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x53535353 +80005380: 000d2683 lw x13,0(x26) +80005384: 004d0d13 addi x26,x26,4 + +80005388 : +Zkne_aes32esmi_cg_cp_sbox_b83: + aes32esmi x10, x24, x13, 2 # perform operation +80005388: a6dc0533 aes32esmi x10,x24,x13,0x2 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b83, Zkne_aes32esmi_cg_cp_sbox_b83_str) +8000538c: 0008a203 lw x4,0(x17) +80005390: 00a20863 beq x4,x10,800053a0 +80005394: 62d022ef jal x5,800081c0 +80005398: 80005388 .word 0x80005388 +8000539c: 80015c0c .word 0x80015c0c +800053a0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x54545454 +800053a4: 000d2f03 lw x30,0(x26) +800053a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x54545454 +800053ac: 000d2083 lw x1,0(x26) +800053b0: 004d0d13 addi x26,x26,4 + +800053b4 : +Zkne_aes32esmi_cg_cp_sbox_b84: + aes32esmi x16, x30, x1, 3 # perform operation +800053b4: e61f0833 aes32esmi x16,x30,x1,0x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b84, Zkne_aes32esmi_cg_cp_sbox_b84_str) +800053b8: 0008a203 lw x4,0(x17) +800053bc: 01020863 beq x4,x16,800053cc +800053c0: 601022ef jal x5,800081c0 +800053c4: 800053b4 .word 0x800053b4 +800053c8: 80015c46 .word 0x80015c46 +800053cc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x55555555 +800053d0: 000d2a83 lw x21,0(x26) +800053d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x55555555 +800053d8: 000d2703 lw x14,0(x26) +800053dc: 004d0d13 addi x26,x26,4 + +800053e0 : +Zkne_aes32esmi_cg_cp_sbox_b85: + aes32esmi x10, x21, x14, 3 # perform operation +800053e0: e6ea8533 aes32esmi x10,x21,x14,0x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b85, Zkne_aes32esmi_cg_cp_sbox_b85_str) +800053e4: 0008a203 lw x4,0(x17) +800053e8: 00a20863 beq x4,x10,800053f8 +800053ec: 5d5022ef jal x5,800081c0 +800053f0: 800053e0 .word 0x800053e0 +800053f4: 80015c80 .word 0x80015c80 +800053f8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x56565656 +800053fc: 000d2103 lw x2,0(x26) +80005400: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x56565656 +80005404: 000d2a03 lw x20,0(x26) +80005408: 004d0d13 addi x26,x26,4 + +8000540c : +Zkne_aes32esmi_cg_cp_sbox_b86: + aes32esmi x18, x2, x20, 1 # perform operation +8000540c: 67410933 aes32esmi x18,x2,x20,0x1 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b86, Zkne_aes32esmi_cg_cp_sbox_b86_str) +80005410: 0008a203 lw x4,0(x17) +80005414: 01220863 beq x4,x18,80005424 +80005418: 5a9022ef jal x5,800081c0 +8000541c: 8000540c .word 0x8000540c +80005420: 80015cba .word 0x80015cba +80005424: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x57575757 +80005428: 000d2d83 lw x27,0(x26) +8000542c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x57575757 +80005430: 000d2683 lw x13,0(x26) +80005434: 004d0d13 addi x26,x26,4 + +80005438 : +Zkne_aes32esmi_cg_cp_sbox_b87: + aes32esmi x7, x27, x13, 1 # perform operation +80005438: 66dd83b3 aes32esmi x7,x27,x13,0x1 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b87, Zkne_aes32esmi_cg_cp_sbox_b87_str) +8000543c: 0008a203 lw x4,0(x17) +80005440: 00720863 beq x4,x7,80005450 +80005444: 57d022ef jal x5,800081c0 +80005448: 80005438 .word 0x80005438 +8000544c: 80015cf4 .word 0x80015cf4 +80005450: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x58585858 +80005454: 000d2b03 lw x22,0(x26) +80005458: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x58585858 +8000545c: 000d2f03 lw x30,0(x26) +80005460: 004d0d13 addi x26,x26,4 + +80005464 : +Zkne_aes32esmi_cg_cp_sbox_b88: + aes32esmi x12, x22, x30, 3 # perform operation +80005464: e7eb0633 aes32esmi x12,x22,x30,0x3 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b88, Zkne_aes32esmi_cg_cp_sbox_b88_str) +80005468: 0008a203 lw x4,0(x17) +8000546c: 00c20863 beq x4,x12,8000547c +80005470: 551022ef jal x5,800081c0 +80005474: 80005464 .word 0x80005464 +80005478: 80015d2e .word 0x80015d2e +8000547c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x59595959 +80005480: 000d2483 lw x9,0(x26) +80005484: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x59595959 +80005488: 000d2b83 lw x23,0(x26) +8000548c: 004d0d13 addi x26,x26,4 + +80005490 : +Zkne_aes32esmi_cg_cp_sbox_b89: + aes32esmi x19, x9, x23, 1 # perform operation +80005490: 677489b3 aes32esmi x19,x9,x23,0x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b89, Zkne_aes32esmi_cg_cp_sbox_b89_str) +80005494: 0008a203 lw x4,0(x17) +80005498: 01320863 beq x4,x19,800054a8 +8000549c: 525022ef jal x5,800081c0 +800054a0: 80005490 .word 0x80005490 +800054a4: 80015d68 .word 0x80015d68 +800054a8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x5a5a5a5a +800054ac: 000d2c03 lw x24,0(x26) +800054b0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x5a5a5a5a +800054b4: 000d2803 lw x16,0(x26) +800054b8: 004d0d13 addi x26,x26,4 + +800054bc : +Zkne_aes32esmi_cg_cp_sbox_b90: + aes32esmi x14, x24, x16, 1 # perform operation +800054bc: 670c0733 aes32esmi x14,x24,x16,0x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b90, Zkne_aes32esmi_cg_cp_sbox_b90_str) +800054c0: 0008a203 lw x4,0(x17) +800054c4: 00e20863 beq x4,x14,800054d4 +800054c8: 4f9022ef jal x5,800081c0 +800054cc: 800054bc .word 0x800054bc +800054d0: 80015da2 .word 0x80015da2 +800054d4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x5b5b5b5b +800054d8: 000d2e83 lw x29,0(x26) +800054dc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x5b5b5b5b +800054e0: 000d2f83 lw x31,0(x26) +800054e4: 004d0d13 addi x26,x26,4 + +800054e8 : +Zkne_aes32esmi_cg_cp_sbox_b91: + aes32esmi x18, x29, x31, 0 # perform operation +800054e8: 27fe8933 aes32esmi x18,x29,x31,0x0 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b91, Zkne_aes32esmi_cg_cp_sbox_b91_str) +800054ec: 0008a203 lw x4,0(x17) +800054f0: 01220863 beq x4,x18,80005500 +800054f4: 4cd022ef jal x5,800081c0 +800054f8: 800054e8 .word 0x800054e8 +800054fc: 80015ddc .word 0x80015ddc +80005500: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x5c5c5c5c +80005504: 000d2b03 lw x22,0(x26) +80005508: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x5c5c5c5c +8000550c: 000d2303 lw x6,0(x26) +80005510: 004d0d13 addi x26,x26,4 + +80005514 : +Zkne_aes32esmi_cg_cp_sbox_b92: + aes32esmi x16, x22, x6, 1 # perform operation +80005514: 666b0833 aes32esmi x16,x22,x6,0x1 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b92, Zkne_aes32esmi_cg_cp_sbox_b92_str) +80005518: 0008a203 lw x4,0(x17) +8000551c: 01020863 beq x4,x16,8000552c +80005520: 4a1022ef jal x5,800081c0 +80005524: 80005514 .word 0x80005514 +80005528: 80015e16 .word 0x80015e16 +8000552c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x5d5d5d5d +80005530: 000d2a03 lw x20,0(x26) +80005534: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x5d5d5d5d +80005538: 000d2383 lw x7,0(x26) +8000553c: 004d0d13 addi x26,x26,4 + +80005540 : +Zkne_aes32esmi_cg_cp_sbox_b93: + aes32esmi x16, x20, x7, 3 # perform operation +80005540: e67a0833 aes32esmi x16,x20,x7,0x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b93, Zkne_aes32esmi_cg_cp_sbox_b93_str) +80005544: 0008a203 lw x4,0(x17) +80005548: 01020863 beq x4,x16,80005558 +8000554c: 475022ef jal x5,800081c0 +80005550: 80005540 .word 0x80005540 +80005554: 80015e50 .word 0x80015e50 +80005558: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x5e5e5e5e +8000555c: 000d2c83 lw x25,0(x26) +80005560: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x5e5e5e5e +80005564: 000d2e03 lw x28,0(x26) +80005568: 004d0d13 addi x26,x26,4 + +8000556c : +Zkne_aes32esmi_cg_cp_sbox_b94: + aes32esmi x23, x25, x28, 2 # perform operation +8000556c: a7cc8bb3 aes32esmi x23,x25,x28,0x2 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b94, Zkne_aes32esmi_cg_cp_sbox_b94_str) +80005570: 0008a203 lw x4,0(x17) +80005574: 01720863 beq x4,x23,80005584 +80005578: 449022ef jal x5,800081c0 +8000557c: 8000556c .word 0x8000556c +80005580: 80015e8a .word 0x80015e8a +80005584: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x5f5f5f5f +80005588: 000d2903 lw x18,0(x26) +8000558c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x5f5f5f5f +80005590: 000d2183 lw x3,0(x26) +80005594: 004d0d13 addi x26,x26,4 + +80005598 : +Zkne_aes32esmi_cg_cp_sbox_b95: + aes32esmi x29, x18, x3, 0 # perform operation +80005598: 26390eb3 aes32esmi x29,x18,x3,0x0 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b95, Zkne_aes32esmi_cg_cp_sbox_b95_str) +8000559c: 0008a203 lw x4,0(x17) +800055a0: 01d20863 beq x4,x29,800055b0 +800055a4: 41d022ef jal x5,800081c0 +800055a8: 80005598 .word 0x80005598 +800055ac: 80015ec4 .word 0x80015ec4 +800055b0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x60606060 +800055b4: 000d2e83 lw x29,0(x26) +800055b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x60606060 +800055bc: 000d2503 lw x10,0(x26) +800055c0: 004d0d13 addi x26,x26,4 + +800055c4 : +Zkne_aes32esmi_cg_cp_sbox_b96: + aes32esmi x15, x29, x10, 2 # perform operation +800055c4: a6ae87b3 aes32esmi x15,x29,x10,0x2 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b96, Zkne_aes32esmi_cg_cp_sbox_b96_str) +800055c8: 0008a203 lw x4,0(x17) +800055cc: 00f20863 beq x4,x15,800055dc +800055d0: 3f1022ef jal x5,800081c0 +800055d4: 800055c4 .word 0x800055c4 +800055d8: 80015efe .word 0x80015efe +800055dc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x61616161 +800055e0: 000d2e03 lw x28,0(x26) +800055e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x61616161 +800055e8: 000d2303 lw x6,0(x26) +800055ec: 004d0d13 addi x26,x26,4 + +800055f0 : +Zkne_aes32esmi_cg_cp_sbox_b97: + aes32esmi x11, x28, x6, 0 # perform operation +800055f0: 266e05b3 aes32esmi x11,x28,x6,0x0 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zkne_aes32esmi_cg_cp_sbox_b97, Zkne_aes32esmi_cg_cp_sbox_b97_str) +800055f4: 0008a203 lw x4,0(x17) +800055f8: 00b20863 beq x4,x11,80005608 +800055fc: 3c5022ef jal x5,800081c0 +80005600: 800055f0 .word 0x800055f0 +80005604: 80015f38 .word 0x80015f38 +80005608: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x62626262 +8000560c: 000d2083 lw x1,0(x26) +80005610: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x62626262 +80005614: 000d2e83 lw x29,0(x26) +80005618: 004d0d13 addi x26,x26,4 + +8000561c : +Zkne_aes32esmi_cg_cp_sbox_b98: + aes32esmi x28, x1, x29, 2 # perform operation +8000561c: a7d08e33 aes32esmi x28,x1,x29,0x2 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_sbox_b98, Zkne_aes32esmi_cg_cp_sbox_b98_str) +80005620: 0008a203 lw x4,0(x17) +80005624: 01c20863 beq x4,x28,80005634 +80005628: 399022ef jal x5,800081c0 +8000562c: 8000561c .word 0x8000561c +80005630: 80015f72 .word 0x80015f72 +80005634: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x63636363 +80005638: 000d2683 lw x13,0(x26) +8000563c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x63636363 +80005640: 000d2e83 lw x29,0(x26) +80005644: 004d0d13 addi x26,x26,4 + +80005648 : +Zkne_aes32esmi_cg_cp_sbox_b99: + aes32esmi x23, x13, x29, 1 # perform operation +80005648: 67d68bb3 aes32esmi x23,x13,x29,0x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b99, Zkne_aes32esmi_cg_cp_sbox_b99_str) +8000564c: 0008a203 lw x4,0(x17) +80005650: 01720863 beq x4,x23,80005660 +80005654: 36d022ef jal x5,800081c0 +80005658: 80005648 .word 0x80005648 +8000565c: 80015fac .word 0x80015fac +80005660: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x64646464 +80005664: 000d2403 lw x8,0(x26) +80005668: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x64646464 +8000566c: 000d2503 lw x10,0(x26) +80005670: 004d0d13 addi x26,x26,4 + +80005674 : +Zkne_aes32esmi_cg_cp_sbox_b100: + aes32esmi x19, x8, x10, 2 # perform operation +80005674: a6a409b3 aes32esmi x19,x8,x10,0x2 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b100, Zkne_aes32esmi_cg_cp_sbox_b100_str) +80005678: 0008a203 lw x4,0(x17) +8000567c: 01320863 beq x4,x19,8000568c +80005680: 341022ef jal x5,800081c0 +80005684: 80005674 .word 0x80005674 +80005688: 80015fe6 .word 0x80015fe6 +8000568c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x65656565 +80005690: 000d2783 lw x15,0(x26) +80005694: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x65656565 +80005698: 000d2a03 lw x20,0(x26) +8000569c: 004d0d13 addi x26,x26,4 + +800056a0 : +Zkne_aes32esmi_cg_cp_sbox_b101: + aes32esmi x19, x15, x20, 3 # perform operation +800056a0: e74789b3 aes32esmi x19,x15,x20,0x3 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b101, Zkne_aes32esmi_cg_cp_sbox_b101_str) +800056a4: 0008a203 lw x4,0(x17) +800056a8: 01320863 beq x4,x19,800056b8 +800056ac: 315022ef jal x5,800081c0 +800056b0: 800056a0 .word 0x800056a0 +800056b4: 80016021 .word 0x80016021 +800056b8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x66666666 +800056bc: 000d2703 lw x14,0(x26) +800056c0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x66666666 +800056c4: 000d2f83 lw x31,0(x26) +800056c8: 004d0d13 addi x26,x26,4 + +800056cc : +Zkne_aes32esmi_cg_cp_sbox_b102: + aes32esmi x18, x14, x31, 3 # perform operation +800056cc: e7f70933 aes32esmi x18,x14,x31,0x3 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b102, Zkne_aes32esmi_cg_cp_sbox_b102_str) +800056d0: 0008a203 lw x4,0(x17) +800056d4: 01220863 beq x4,x18,800056e4 +800056d8: 2e9022ef jal x5,800081c0 +800056dc: 800056cc .word 0x800056cc +800056e0: 8001605c .word 0x8001605c +800056e4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x67676767 +800056e8: 000d2183 lw x3,0(x26) +800056ec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x67676767 +800056f0: 000d2983 lw x19,0(x26) +800056f4: 004d0d13 addi x26,x26,4 + +800056f8 : +Zkne_aes32esmi_cg_cp_sbox_b103: + aes32esmi x27, x3, x19, 1 # perform operation +800056f8: 67318db3 aes32esmi x27,x3,x19,0x1 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b103, Zkne_aes32esmi_cg_cp_sbox_b103_str) +800056fc: 0008a203 lw x4,0(x17) +80005700: 01b20863 beq x4,x27,80005710 +80005704: 2bd022ef jal x5,800081c0 +80005708: 800056f8 .word 0x800056f8 +8000570c: 80016097 .word 0x80016097 +80005710: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x68686868 +80005714: 000d2583 lw x11,0(x26) +80005718: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x68686868 +8000571c: 000d2103 lw x2,0(x26) +80005720: 004d0d13 addi x26,x26,4 + +80005724 : +Zkne_aes32esmi_cg_cp_sbox_b104: + aes32esmi x9, x11, x2, 2 # perform operation +80005724: a62584b3 aes32esmi x9,x11,x2,0x2 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b104, Zkne_aes32esmi_cg_cp_sbox_b104_str) +80005728: 0008a203 lw x4,0(x17) +8000572c: 00920863 beq x4,x9,8000573c +80005730: 291022ef jal x5,800081c0 +80005734: 80005724 .word 0x80005724 +80005738: 800160d2 .word 0x800160d2 +8000573c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x69696969 +80005740: 000d2783 lw x15,0(x26) +80005744: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x69696969 +80005748: 000d2683 lw x13,0(x26) +8000574c: 004d0d13 addi x26,x26,4 + +80005750 : +Zkne_aes32esmi_cg_cp_sbox_b105: + aes32esmi x9, x15, x13, 3 # perform operation +80005750: e6d784b3 aes32esmi x9,x15,x13,0x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b105, Zkne_aes32esmi_cg_cp_sbox_b105_str) +80005754: 0008a203 lw x4,0(x17) +80005758: 00920863 beq x4,x9,80005768 +8000575c: 265022ef jal x5,800081c0 +80005760: 80005750 .word 0x80005750 +80005764: 8001610d .word 0x8001610d +80005768: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x6a6a6a6a +8000576c: 000d2183 lw x3,0(x26) +80005770: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x6a6a6a6a +80005774: 000d2683 lw x13,0(x26) +80005778: 004d0d13 addi x26,x26,4 + +8000577c : +Zkne_aes32esmi_cg_cp_sbox_b106: + aes32esmi x18, x3, x13, 3 # perform operation +8000577c: e6d18933 aes32esmi x18,x3,x13,0x3 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b106, Zkne_aes32esmi_cg_cp_sbox_b106_str) +80005780: 0008a203 lw x4,0(x17) +80005784: 01220863 beq x4,x18,80005794 +80005788: 239022ef jal x5,800081c0 +8000578c: 8000577c .word 0x8000577c +80005790: 80016148 .word 0x80016148 +80005794: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x6b6b6b6b +80005798: 000d2783 lw x15,0(x26) +8000579c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x6b6b6b6b +800057a0: 000d2f83 lw x31,0(x26) +800057a4: 004d0d13 addi x26,x26,4 + +800057a8 : +Zkne_aes32esmi_cg_cp_sbox_b107: + aes32esmi x24, x15, x31, 0 # perform operation +800057a8: 27f78c33 aes32esmi x24,x15,x31,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b107, Zkne_aes32esmi_cg_cp_sbox_b107_str) +800057ac: 0008a203 lw x4,0(x17) +800057b0: 01820863 beq x4,x24,800057c0 +800057b4: 20d022ef jal x5,800081c0 +800057b8: 800057a8 .word 0x800057a8 +800057bc: 80016183 .word 0x80016183 +800057c0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x6c6c6c6c +800057c4: 000d2783 lw x15,0(x26) +800057c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x6c6c6c6c +800057cc: 000d2f03 lw x30,0(x26) +800057d0: 004d0d13 addi x26,x26,4 + +800057d4 : +Zkne_aes32esmi_cg_cp_sbox_b108: + aes32esmi x3, x15, x30, 0 # perform operation +800057d4: 27e781b3 aes32esmi x3,x15,x30,0x0 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes32esmi_cg_cp_sbox_b108, Zkne_aes32esmi_cg_cp_sbox_b108_str) +800057d8: 0008a203 lw x4,0(x17) +800057dc: 00320863 beq x4,x3,800057ec +800057e0: 1e1022ef jal x5,800081c0 +800057e4: 800057d4 .word 0x800057d4 +800057e8: 800161be .word 0x800161be +800057ec: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x6d6d6d6d +800057f0: 000d2303 lw x6,0(x26) +800057f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x6d6d6d6d +800057f8: 000d2e83 lw x29,0(x26) +800057fc: 004d0d13 addi x26,x26,4 + +80005800 : +Zkne_aes32esmi_cg_cp_sbox_b109: + aes32esmi x22, x6, x29, 0 # perform operation +80005800: 27d30b33 aes32esmi x22,x6,x29,0x0 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b109, Zkne_aes32esmi_cg_cp_sbox_b109_str) +80005804: 0008a203 lw x4,0(x17) +80005808: 01620863 beq x4,x22,80005818 +8000580c: 1b5022ef jal x5,800081c0 +80005810: 80005800 .word 0x80005800 +80005814: 800161f9 .word 0x800161f9 +80005818: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x6e6e6e6e +8000581c: 000d2f83 lw x31,0(x26) +80005820: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x6e6e6e6e +80005824: 000d2103 lw x2,0(x26) +80005828: 004d0d13 addi x26,x26,4 + +8000582c : +Zkne_aes32esmi_cg_cp_sbox_b110: + aes32esmi x14, x31, x2, 2 # perform operation +8000582c: a62f8733 aes32esmi x14,x31,x2,0x2 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b110, Zkne_aes32esmi_cg_cp_sbox_b110_str) +80005830: 0008a203 lw x4,0(x17) +80005834: 00e20863 beq x4,x14,80005844 +80005838: 189022ef jal x5,800081c0 +8000583c: 8000582c .word 0x8000582c +80005840: 80016234 .word 0x80016234 +80005844: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x6f6f6f6f +80005848: 000d2f03 lw x30,0(x26) +8000584c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x6f6f6f6f +80005850: 000d2783 lw x15,0(x26) +80005854: 004d0d13 addi x26,x26,4 + +80005858 : +Zkne_aes32esmi_cg_cp_sbox_b111: + aes32esmi x1, x30, x15, 3 # perform operation +80005858: e6ff00b3 aes32esmi x1,x30,x15,0x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b111, Zkne_aes32esmi_cg_cp_sbox_b111_str) +8000585c: 0008a203 lw x4,0(x17) +80005860: 00120863 beq x4,x1,80005870 +80005864: 15d022ef jal x5,800081c0 +80005868: 80005858 .word 0x80005858 +8000586c: 8001626f .word 0x8001626f +80005870: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x70707070 +80005874: 000d2b03 lw x22,0(x26) +80005878: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x70707070 +8000587c: 000d2303 lw x6,0(x26) +80005880: 004d0d13 addi x26,x26,4 + +80005884 : +Zkne_aes32esmi_cg_cp_sbox_b112: + aes32esmi x30, x22, x6, 0 # perform operation +80005884: 266b0f33 aes32esmi x30,x22,x6,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b112, Zkne_aes32esmi_cg_cp_sbox_b112_str) +80005888: 0008a203 lw x4,0(x17) +8000588c: 01e20863 beq x4,x30,8000589c +80005890: 131022ef jal x5,800081c0 +80005894: 80005884 .word 0x80005884 +80005898: 800162aa .word 0x800162aa +8000589c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x71717171 +800058a0: 000d2c03 lw x24,0(x26) +800058a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x71717171 +800058a8: 000d2683 lw x13,0(x26) +800058ac: 004d0d13 addi x26,x26,4 + +800058b0 : +Zkne_aes32esmi_cg_cp_sbox_b113: + aes32esmi x25, x24, x13, 3 # perform operation +800058b0: e6dc0cb3 aes32esmi x25,x24,x13,0x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b113, Zkne_aes32esmi_cg_cp_sbox_b113_str) +800058b4: 0008a203 lw x4,0(x17) +800058b8: 01920863 beq x4,x25,800058c8 +800058bc: 105022ef jal x5,800081c0 +800058c0: 800058b0 .word 0x800058b0 +800058c4: 800162e5 .word 0x800162e5 +800058c8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x72727272 +800058cc: 000d2783 lw x15,0(x26) +800058d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x72727272 +800058d4: 000d2c83 lw x25,0(x26) +800058d8: 004d0d13 addi x26,x26,4 + +800058dc : +Zkne_aes32esmi_cg_cp_sbox_b114: + aes32esmi x24, x15, x25, 3 # perform operation +800058dc: e7978c33 aes32esmi x24,x15,x25,0x3 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b114, Zkne_aes32esmi_cg_cp_sbox_b114_str) +800058e0: 0008a203 lw x4,0(x17) +800058e4: 01820863 beq x4,x24,800058f4 +800058e8: 0d9022ef jal x5,800081c0 +800058ec: 800058dc .word 0x800058dc +800058f0: 80016320 .word 0x80016320 +800058f4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x73737373 +800058f8: 000d2c83 lw x25,0(x26) +800058fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x73737373 +80005900: 000d2e83 lw x29,0(x26) +80005904: 004d0d13 addi x26,x26,4 + +80005908 : +Zkne_aes32esmi_cg_cp_sbox_b115: + aes32esmi x21, x25, x29, 0 # perform operation +80005908: 27dc8ab3 aes32esmi x21,x25,x29,0x0 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zkne_aes32esmi_cg_cp_sbox_b115, Zkne_aes32esmi_cg_cp_sbox_b115_str) +8000590c: 0008a203 lw x4,0(x17) +80005910: 01520863 beq x4,x21,80005920 +80005914: 0ad022ef jal x5,800081c0 +80005918: 80005908 .word 0x80005908 +8000591c: 8001635b .word 0x8001635b +80005920: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x74747474 +80005924: 000d2983 lw x19,0(x26) +80005928: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x74747474 +8000592c: 000d2c83 lw x25,0(x26) +80005930: 004d0d13 addi x26,x26,4 + +80005934 : +Zkne_aes32esmi_cg_cp_sbox_b116: + aes32esmi x15, x19, x25, 2 # perform operation +80005934: a79987b3 aes32esmi x15,x19,x25,0x2 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b116, Zkne_aes32esmi_cg_cp_sbox_b116_str) +80005938: 0008a203 lw x4,0(x17) +8000593c: 00f20863 beq x4,x15,8000594c +80005940: 081022ef jal x5,800081c0 +80005944: 80005934 .word 0x80005934 +80005948: 80016396 .word 0x80016396 +8000594c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x75757575 +80005950: 000d2e83 lw x29,0(x26) +80005954: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x75757575 +80005958: 000d2c83 lw x25,0(x26) +8000595c: 004d0d13 addi x26,x26,4 + +80005960 : +Zkne_aes32esmi_cg_cp_sbox_b117: + aes32esmi x13, x29, x25, 3 # perform operation +80005960: e79e86b3 aes32esmi x13,x29,x25,0x3 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b117, Zkne_aes32esmi_cg_cp_sbox_b117_str) +80005964: 0008a203 lw x4,0(x17) +80005968: 00d20863 beq x4,x13,80005978 +8000596c: 055022ef jal x5,800081c0 +80005970: 80005960 .word 0x80005960 +80005974: 800163d1 .word 0x800163d1 +80005978: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x76767676 +8000597c: 000d2983 lw x19,0(x26) +80005980: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x76767676 +80005984: 000d2103 lw x2,0(x26) +80005988: 004d0d13 addi x26,x26,4 + +8000598c : +Zkne_aes32esmi_cg_cp_sbox_b118: + aes32esmi x11, x19, x2, 2 # perform operation +8000598c: a62985b3 aes32esmi x11,x19,x2,0x2 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zkne_aes32esmi_cg_cp_sbox_b118, Zkne_aes32esmi_cg_cp_sbox_b118_str) +80005990: 0008a203 lw x4,0(x17) +80005994: 00b20863 beq x4,x11,800059a4 +80005998: 029022ef jal x5,800081c0 +8000599c: 8000598c .word 0x8000598c +800059a0: 8001640c .word 0x8001640c +800059a4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x77777777 +800059a8: 000d2c83 lw x25,0(x26) +800059ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x77777777 +800059b0: 000d2183 lw x3,0(x26) +800059b4: 004d0d13 addi x26,x26,4 + +800059b8 : +Zkne_aes32esmi_cg_cp_sbox_b119: + aes32esmi x16, x25, x3, 2 # perform operation +800059b8: a63c8833 aes32esmi x16,x25,x3,0x2 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b119, Zkne_aes32esmi_cg_cp_sbox_b119_str) +800059bc: 0008a203 lw x4,0(x17) +800059c0: 01020863 beq x4,x16,800059d0 +800059c4: 7fc022ef jal x5,800081c0 +800059c8: 800059b8 .word 0x800059b8 +800059cc: 80016447 .word 0x80016447 +800059d0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x78787878 +800059d4: 000d2d83 lw x27,0(x26) +800059d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x78787878 +800059dc: 000d2983 lw x19,0(x26) +800059e0: 004d0d13 addi x26,x26,4 + +800059e4 : +Zkne_aes32esmi_cg_cp_sbox_b120: + aes32esmi x1, x27, x19, 3 # perform operation +800059e4: e73d80b3 aes32esmi x1,x27,x19,0x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b120, Zkne_aes32esmi_cg_cp_sbox_b120_str) +800059e8: 0008a203 lw x4,0(x17) +800059ec: 00120863 beq x4,x1,800059fc +800059f0: 7d0022ef jal x5,800081c0 +800059f4: 800059e4 .word 0x800059e4 +800059f8: 80016482 .word 0x80016482 +800059fc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x79797979 +80005a00: 000d2803 lw x16,0(x26) +80005a04: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x79797979 +80005a08: 000d2403 lw x8,0(x26) +80005a0c: 004d0d13 addi x26,x26,4 + +80005a10 : +Zkne_aes32esmi_cg_cp_sbox_b121: + aes32esmi x27, x16, x8, 3 # perform operation +80005a10: e6880db3 aes32esmi x27,x16,x8,0x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b121, Zkne_aes32esmi_cg_cp_sbox_b121_str) +80005a14: 0008a203 lw x4,0(x17) +80005a18: 01b20863 beq x4,x27,80005a28 +80005a1c: 7a4022ef jal x5,800081c0 +80005a20: 80005a10 .word 0x80005a10 +80005a24: 800164bd .word 0x800164bd +80005a28: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x7a7a7a7a +80005a2c: 000d2b83 lw x23,0(x26) +80005a30: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x7a7a7a7a +80005a34: 000d2603 lw x12,0(x26) +80005a38: 004d0d13 addi x26,x26,4 + +80005a3c : +Zkne_aes32esmi_cg_cp_sbox_b122: + aes32esmi x29, x23, x12, 1 # perform operation +80005a3c: 66cb8eb3 aes32esmi x29,x23,x12,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b122, Zkne_aes32esmi_cg_cp_sbox_b122_str) +80005a40: 0008a203 lw x4,0(x17) +80005a44: 01d20863 beq x4,x29,80005a54 +80005a48: 778022ef jal x5,800081c0 +80005a4c: 80005a3c .word 0x80005a3c +80005a50: 800164f8 .word 0x800164f8 +80005a54: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x7b7b7b7b +80005a58: 000d2503 lw x10,0(x26) +80005a5c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x7b7b7b7b +80005a60: 000d2683 lw x13,0(x26) +80005a64: 004d0d13 addi x26,x26,4 + +80005a68 : +Zkne_aes32esmi_cg_cp_sbox_b123: + aes32esmi x24, x10, x13, 0 # perform operation +80005a68: 26d50c33 aes32esmi x24,x10,x13,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b123, Zkne_aes32esmi_cg_cp_sbox_b123_str) +80005a6c: 0008a203 lw x4,0(x17) +80005a70: 01820863 beq x4,x24,80005a80 +80005a74: 74c022ef jal x5,800081c0 +80005a78: 80005a68 .word 0x80005a68 +80005a7c: 80016533 .word 0x80016533 +80005a80: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x7c7c7c7c +80005a84: 000d2503 lw x10,0(x26) +80005a88: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x7c7c7c7c +80005a8c: 000d2303 lw x6,0(x26) +80005a90: 004d0d13 addi x26,x26,4 + +80005a94 : +Zkne_aes32esmi_cg_cp_sbox_b124: + aes32esmi x3, x10, x6, 0 # perform operation +80005a94: 266501b3 aes32esmi x3,x10,x6,0x0 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes32esmi_cg_cp_sbox_b124, Zkne_aes32esmi_cg_cp_sbox_b124_str) +80005a98: 0008a203 lw x4,0(x17) +80005a9c: 00320863 beq x4,x3,80005aac +80005aa0: 720022ef jal x5,800081c0 +80005aa4: 80005a94 .word 0x80005a94 +80005aa8: 8001656e .word 0x8001656e +80005aac: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x7d7d7d7d +80005ab0: 000d2503 lw x10,0(x26) +80005ab4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x7d7d7d7d +80005ab8: 000d2403 lw x8,0(x26) +80005abc: 004d0d13 addi x26,x26,4 + +80005ac0 : +Zkne_aes32esmi_cg_cp_sbox_b125: + aes32esmi x9, x10, x8, 1 # perform operation +80005ac0: 668504b3 aes32esmi x9,x10,x8,0x1 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b125, Zkne_aes32esmi_cg_cp_sbox_b125_str) +80005ac4: 0008a203 lw x4,0(x17) +80005ac8: 00920863 beq x4,x9,80005ad8 +80005acc: 6f4022ef jal x5,800081c0 +80005ad0: 80005ac0 .word 0x80005ac0 +80005ad4: 800165a9 .word 0x800165a9 +80005ad8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x7e7e7e7e +80005adc: 000d2983 lw x19,0(x26) +80005ae0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x7e7e7e7e +80005ae4: 000d2083 lw x1,0(x26) +80005ae8: 004d0d13 addi x26,x26,4 + +80005aec : +Zkne_aes32esmi_cg_cp_sbox_b126: + aes32esmi x13, x19, x1, 1 # perform operation +80005aec: 661986b3 aes32esmi x13,x19,x1,0x1 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b126, Zkne_aes32esmi_cg_cp_sbox_b126_str) +80005af0: 0008a203 lw x4,0(x17) +80005af4: 00d20863 beq x4,x13,80005b04 +80005af8: 6c8022ef jal x5,800081c0 +80005afc: 80005aec .word 0x80005aec +80005b00: 800165e4 .word 0x800165e4 +80005b04: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x7f7f7f7f +80005b08: 000d2483 lw x9,0(x26) +80005b0c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x7f7f7f7f +80005b10: 000d2083 lw x1,0(x26) +80005b14: 004d0d13 addi x26,x26,4 + +80005b18 : +Zkne_aes32esmi_cg_cp_sbox_b127: + aes32esmi x23, x9, x1, 2 # perform operation +80005b18: a6148bb3 aes32esmi x23,x9,x1,0x2 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b127, Zkne_aes32esmi_cg_cp_sbox_b127_str) +80005b1c: 0008a203 lw x4,0(x17) +80005b20: 01720863 beq x4,x23,80005b30 +80005b24: 69c022ef jal x5,800081c0 +80005b28: 80005b18 .word 0x80005b18 +80005b2c: 8001661f .word 0x8001661f +80005b30: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x80808080 +80005b34: 000d2c03 lw x24,0(x26) +80005b38: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x80808080 +80005b3c: 000d2b83 lw x23,0(x26) +80005b40: 004d0d13 addi x26,x26,4 + +80005b44 : +Zkne_aes32esmi_cg_cp_sbox_b128: + aes32esmi x16, x24, x23, 2 # perform operation +80005b44: a77c0833 aes32esmi x16,x24,x23,0x2 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b128, Zkne_aes32esmi_cg_cp_sbox_b128_str) +80005b48: 0008a203 lw x4,0(x17) +80005b4c: 01020863 beq x4,x16,80005b5c +80005b50: 670022ef jal x5,800081c0 +80005b54: 80005b44 .word 0x80005b44 +80005b58: 8001665a .word 0x8001665a +80005b5c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x81818181 +80005b60: 000d2703 lw x14,0(x26) +80005b64: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x81818181 +80005b68: 000d2903 lw x18,0(x26) +80005b6c: 004d0d13 addi x26,x26,4 + +80005b70 : +Zkne_aes32esmi_cg_cp_sbox_b129: + aes32esmi x31, x14, x18, 2 # perform operation +80005b70: a7270fb3 aes32esmi x31,x14,x18,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b129, Zkne_aes32esmi_cg_cp_sbox_b129_str) +80005b74: 0008a203 lw x4,0(x17) +80005b78: 01f20863 beq x4,x31,80005b88 +80005b7c: 644022ef jal x5,800081c0 +80005b80: 80005b70 .word 0x80005b70 +80005b84: 80016695 .word 0x80016695 +80005b88: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x82828282 +80005b8c: 000d2e03 lw x28,0(x26) +80005b90: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x82828282 +80005b94: 000d2083 lw x1,0(x26) +80005b98: 004d0d13 addi x26,x26,4 + +80005b9c : +Zkne_aes32esmi_cg_cp_sbox_b130: + aes32esmi x14, x28, x1, 0 # perform operation +80005b9c: 261e0733 aes32esmi x14,x28,x1,0x0 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b130, Zkne_aes32esmi_cg_cp_sbox_b130_str) +80005ba0: 0008a203 lw x4,0(x17) +80005ba4: 00e20863 beq x4,x14,80005bb4 +80005ba8: 618022ef jal x5,800081c0 +80005bac: 80005b9c .word 0x80005b9c +80005bb0: 800166d0 .word 0x800166d0 +80005bb4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x83838383 +80005bb8: 000d2603 lw x12,0(x26) +80005bbc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x83838383 +80005bc0: 000d2303 lw x6,0(x26) +80005bc4: 004d0d13 addi x26,x26,4 + +80005bc8 : +Zkne_aes32esmi_cg_cp_sbox_b131: + aes32esmi x18, x12, x6, 1 # perform operation +80005bc8: 66660933 aes32esmi x18,x12,x6,0x1 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b131, Zkne_aes32esmi_cg_cp_sbox_b131_str) +80005bcc: 0008a203 lw x4,0(x17) +80005bd0: 01220863 beq x4,x18,80005be0 +80005bd4: 5ec022ef jal x5,800081c0 +80005bd8: 80005bc8 .word 0x80005bc8 +80005bdc: 8001670b .word 0x8001670b +80005be0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x84848484 +80005be4: 000d2503 lw x10,0(x26) +80005be8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x84848484 +80005bec: 000d2803 lw x16,0(x26) +80005bf0: 004d0d13 addi x26,x26,4 + +80005bf4 : +Zkne_aes32esmi_cg_cp_sbox_b132: + aes32esmi x8, x10, x16, 3 # perform operation +80005bf4: e7050433 aes32esmi x8,x10,x16,0x3 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b132, Zkne_aes32esmi_cg_cp_sbox_b132_str) +80005bf8: 0008a203 lw x4,0(x17) +80005bfc: 00820863 beq x4,x8,80005c0c +80005c00: 5c0022ef jal x5,800081c0 +80005c04: 80005bf4 .word 0x80005bf4 +80005c08: 80016746 .word 0x80016746 +80005c0c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x85858585 +80005c10: 000d2603 lw x12,0(x26) +80005c14: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x85858585 +80005c18: 000d2a03 lw x20,0(x26) +80005c1c: 004d0d13 addi x26,x26,4 + +80005c20 : +Zkne_aes32esmi_cg_cp_sbox_b133: + aes32esmi x24, x12, x20, 2 # perform operation +80005c20: a7460c33 aes32esmi x24,x12,x20,0x2 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b133, Zkne_aes32esmi_cg_cp_sbox_b133_str) +80005c24: 0008a203 lw x4,0(x17) +80005c28: 01820863 beq x4,x24,80005c38 +80005c2c: 594022ef jal x5,800081c0 +80005c30: 80005c20 .word 0x80005c20 +80005c34: 80016781 .word 0x80016781 +80005c38: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x86868686 +80005c3c: 000d2583 lw x11,0(x26) +80005c40: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x86868686 +80005c44: 000d2703 lw x14,0(x26) +80005c48: 004d0d13 addi x26,x26,4 + +80005c4c : +Zkne_aes32esmi_cg_cp_sbox_b134: + aes32esmi x10, x11, x14, 3 # perform operation +80005c4c: e6e58533 aes32esmi x10,x11,x14,0x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b134, Zkne_aes32esmi_cg_cp_sbox_b134_str) +80005c50: 0008a203 lw x4,0(x17) +80005c54: 00a20863 beq x4,x10,80005c64 +80005c58: 568022ef jal x5,800081c0 +80005c5c: 80005c4c .word 0x80005c4c +80005c60: 800167bc .word 0x800167bc +80005c64: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x87878787 +80005c68: 000d2703 lw x14,0(x26) +80005c6c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x87878787 +80005c70: 000d2903 lw x18,0(x26) +80005c74: 004d0d13 addi x26,x26,4 + +80005c78 : +Zkne_aes32esmi_cg_cp_sbox_b135: + aes32esmi x25, x14, x18, 3 # perform operation +80005c78: e7270cb3 aes32esmi x25,x14,x18,0x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b135, Zkne_aes32esmi_cg_cp_sbox_b135_str) +80005c7c: 0008a203 lw x4,0(x17) +80005c80: 01920863 beq x4,x25,80005c90 +80005c84: 53c022ef jal x5,800081c0 +80005c88: 80005c78 .word 0x80005c78 +80005c8c: 800167f7 .word 0x800167f7 +80005c90: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x88888888 +80005c94: 000d2303 lw x6,0(x26) +80005c98: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x88888888 +80005c9c: 000d2d83 lw x27,0(x26) +80005ca0: 004d0d13 addi x26,x26,4 + +80005ca4 : +Zkne_aes32esmi_cg_cp_sbox_b136: + aes32esmi x8, x6, x27, 1 # perform operation +80005ca4: 67b30433 aes32esmi x8,x6,x27,0x1 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b136, Zkne_aes32esmi_cg_cp_sbox_b136_str) +80005ca8: 0008a203 lw x4,0(x17) +80005cac: 00820863 beq x4,x8,80005cbc +80005cb0: 510022ef jal x5,800081c0 +80005cb4: 80005ca4 .word 0x80005ca4 +80005cb8: 80016832 .word 0x80016832 +80005cbc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x89898989 +80005cc0: 000d2183 lw x3,0(x26) +80005cc4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x89898989 +80005cc8: 000d2b03 lw x22,0(x26) +80005ccc: 004d0d13 addi x26,x26,4 + +80005cd0 : +Zkne_aes32esmi_cg_cp_sbox_b137: + aes32esmi x31, x3, x22, 3 # perform operation +80005cd0: e7618fb3 aes32esmi x31,x3,x22,0x3 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b137, Zkne_aes32esmi_cg_cp_sbox_b137_str) +80005cd4: 0008a203 lw x4,0(x17) +80005cd8: 01f20863 beq x4,x31,80005ce8 +80005cdc: 4e4022ef jal x5,800081c0 +80005ce0: 80005cd0 .word 0x80005cd0 +80005ce4: 8001686d .word 0x8001686d +80005ce8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x8a8a8a8a +80005cec: 000d2c83 lw x25,0(x26) +80005cf0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x8a8a8a8a +80005cf4: 000d2383 lw x7,0(x26) +80005cf8: 004d0d13 addi x26,x26,4 + +80005cfc : +Zkne_aes32esmi_cg_cp_sbox_b138: + aes32esmi x27, x25, x7, 1 # perform operation +80005cfc: 667c8db3 aes32esmi x27,x25,x7,0x1 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b138, Zkne_aes32esmi_cg_cp_sbox_b138_str) +80005d00: 0008a203 lw x4,0(x17) +80005d04: 01b20863 beq x4,x27,80005d14 +80005d08: 4b8022ef jal x5,800081c0 +80005d0c: 80005cfc .word 0x80005cfc +80005d10: 800168a8 .word 0x800168a8 +80005d14: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x8b8b8b8b +80005d18: 000d2583 lw x11,0(x26) +80005d1c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x8b8b8b8b +80005d20: 000d2903 lw x18,0(x26) +80005d24: 004d0d13 addi x26,x26,4 + +80005d28 : +Zkne_aes32esmi_cg_cp_sbox_b139: + aes32esmi x21, x11, x18, 0 # perform operation +80005d28: 27258ab3 aes32esmi x21,x11,x18,0x0 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zkne_aes32esmi_cg_cp_sbox_b139, Zkne_aes32esmi_cg_cp_sbox_b139_str) +80005d2c: 0008a203 lw x4,0(x17) +80005d30: 01520863 beq x4,x21,80005d40 +80005d34: 48c022ef jal x5,800081c0 +80005d38: 80005d28 .word 0x80005d28 +80005d3c: 800168e3 .word 0x800168e3 +80005d40: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x8c8c8c8c +80005d44: 000d2483 lw x9,0(x26) +80005d48: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x8c8c8c8c +80005d4c: 000d2c03 lw x24,0(x26) +80005d50: 004d0d13 addi x26,x26,4 + +80005d54 : +Zkne_aes32esmi_cg_cp_sbox_b140: + aes32esmi x14, x9, x24, 2 # perform operation +80005d54: a7848733 aes32esmi x14,x9,x24,0x2 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b140, Zkne_aes32esmi_cg_cp_sbox_b140_str) +80005d58: 0008a203 lw x4,0(x17) +80005d5c: 00e20863 beq x4,x14,80005d6c +80005d60: 460022ef jal x5,800081c0 +80005d64: 80005d54 .word 0x80005d54 +80005d68: 8001691e .word 0x8001691e +80005d6c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x8d8d8d8d +80005d70: 000d2983 lw x19,0(x26) +80005d74: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x8d8d8d8d +80005d78: 000d2703 lw x14,0(x26) +80005d7c: 004d0d13 addi x26,x26,4 + +80005d80 : +Zkne_aes32esmi_cg_cp_sbox_b141: + aes32esmi x22, x19, x14, 3 # perform operation +80005d80: e6e98b33 aes32esmi x22,x19,x14,0x3 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b141, Zkne_aes32esmi_cg_cp_sbox_b141_str) +80005d84: 0008a203 lw x4,0(x17) +80005d88: 01620863 beq x4,x22,80005d98 +80005d8c: 434022ef jal x5,800081c0 +80005d90: 80005d80 .word 0x80005d80 +80005d94: 80016959 .word 0x80016959 +80005d98: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x8e8e8e8e +80005d9c: 000d2103 lw x2,0(x26) +80005da0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x8e8e8e8e +80005da4: 000d2e03 lw x28,0(x26) +80005da8: 004d0d13 addi x26,x26,4 + +80005dac : +Zkne_aes32esmi_cg_cp_sbox_b142: + aes32esmi x3, x2, x28, 3 # perform operation +80005dac: e7c101b3 aes32esmi x3,x2,x28,0x3 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes32esmi_cg_cp_sbox_b142, Zkne_aes32esmi_cg_cp_sbox_b142_str) +80005db0: 0008a203 lw x4,0(x17) +80005db4: 00320863 beq x4,x3,80005dc4 +80005db8: 408022ef jal x5,800081c0 +80005dbc: 80005dac .word 0x80005dac +80005dc0: 80016994 .word 0x80016994 +80005dc4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x8f8f8f8f +80005dc8: 000d2d83 lw x27,0(x26) +80005dcc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0x8f8f8f8f +80005dd0: 000d2403 lw x8,0(x26) +80005dd4: 004d0d13 addi x26,x26,4 + +80005dd8 : +Zkne_aes32esmi_cg_cp_sbox_b143: + aes32esmi x12, x27, x8, 1 # perform operation +80005dd8: 668d8633 aes32esmi x12,x27,x8,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b143, Zkne_aes32esmi_cg_cp_sbox_b143_str) +80005ddc: 0008a203 lw x4,0(x17) +80005de0: 00c20863 beq x4,x12,80005df0 +80005de4: 3dc022ef jal x5,800081c0 +80005de8: 80005dd8 .word 0x80005dd8 +80005dec: 800169cf .word 0x800169cf +80005df0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x90909090 +80005df4: 000d2103 lw x2,0(x26) +80005df8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x90909090 +80005dfc: 000d2e83 lw x29,0(x26) +80005e00: 004d0d13 addi x26,x26,4 + +80005e04 : +Zkne_aes32esmi_cg_cp_sbox_b144: + aes32esmi x31, x2, x29, 2 # perform operation +80005e04: a7d10fb3 aes32esmi x31,x2,x29,0x2 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b144, Zkne_aes32esmi_cg_cp_sbox_b144_str) +80005e08: 0008a203 lw x4,0(x17) +80005e0c: 01f20863 beq x4,x31,80005e1c +80005e10: 3b0022ef jal x5,800081c0 +80005e14: 80005e04 .word 0x80005e04 +80005e18: 80016a0a .word 0x80016a0a +80005e1c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x91919191 +80005e20: 000d2e83 lw x29,0(x26) +80005e24: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x91919191 +80005e28: 000d2103 lw x2,0(x26) +80005e2c: 004d0d13 addi x26,x26,4 + +80005e30 : +Zkne_aes32esmi_cg_cp_sbox_b145: + aes32esmi x10, x29, x2, 2 # perform operation +80005e30: a62e8533 aes32esmi x10,x29,x2,0x2 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b145, Zkne_aes32esmi_cg_cp_sbox_b145_str) +80005e34: 0008a203 lw x4,0(x17) +80005e38: 00a20863 beq x4,x10,80005e48 +80005e3c: 384022ef jal x5,800081c0 +80005e40: 80005e30 .word 0x80005e30 +80005e44: 80016a45 .word 0x80016a45 +80005e48: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0x92929292 +80005e4c: 000d2d83 lw x27,0(x26) +80005e50: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x92929292 +80005e54: 000d2383 lw x7,0(x26) +80005e58: 004d0d13 addi x26,x26,4 + +80005e5c : +Zkne_aes32esmi_cg_cp_sbox_b146: + aes32esmi x1, x27, x7, 0 # perform operation +80005e5c: 267d80b3 aes32esmi x1,x27,x7,0x0 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b146, Zkne_aes32esmi_cg_cp_sbox_b146_str) +80005e60: 0008a203 lw x4,0(x17) +80005e64: 00120863 beq x4,x1,80005e74 +80005e68: 358022ef jal x5,800081c0 +80005e6c: 80005e5c .word 0x80005e5c +80005e70: 80016a80 .word 0x80016a80 +80005e74: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x93939393 +80005e78: 000d2083 lw x1,0(x26) +80005e7c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x93939393 +80005e80: 000d2303 lw x6,0(x26) +80005e84: 004d0d13 addi x26,x26,4 + +80005e88 : +Zkne_aes32esmi_cg_cp_sbox_b147: + aes32esmi x27, x1, x6, 1 # perform operation +80005e88: 66608db3 aes32esmi x27,x1,x6,0x1 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b147, Zkne_aes32esmi_cg_cp_sbox_b147_str) +80005e8c: 0008a203 lw x4,0(x17) +80005e90: 01b20863 beq x4,x27,80005ea0 +80005e94: 32c022ef jal x5,800081c0 +80005e98: 80005e88 .word 0x80005e88 +80005e9c: 80016abb .word 0x80016abb +80005ea0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x94949494 +80005ea4: 000d2683 lw x13,0(x26) +80005ea8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x94949494 +80005eac: 000d2503 lw x10,0(x26) +80005eb0: 004d0d13 addi x26,x26,4 + +80005eb4 : +Zkne_aes32esmi_cg_cp_sbox_b148: + aes32esmi x15, x13, x10, 0 # perform operation +80005eb4: 26a687b3 aes32esmi x15,x13,x10,0x0 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b148, Zkne_aes32esmi_cg_cp_sbox_b148_str) +80005eb8: 0008a203 lw x4,0(x17) +80005ebc: 00f20863 beq x4,x15,80005ecc +80005ec0: 300022ef jal x5,800081c0 +80005ec4: 80005eb4 .word 0x80005eb4 +80005ec8: 80016af6 .word 0x80016af6 +80005ecc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x95959595 +80005ed0: 000d2683 lw x13,0(x26) +80005ed4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x95959595 +80005ed8: 000d2d83 lw x27,0(x26) +80005edc: 004d0d13 addi x26,x26,4 + +80005ee0 : +Zkne_aes32esmi_cg_cp_sbox_b149: + aes32esmi x7, x13, x27, 0 # perform operation +80005ee0: 27b683b3 aes32esmi x7,x13,x27,0x0 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b149, Zkne_aes32esmi_cg_cp_sbox_b149_str) +80005ee4: 0008a203 lw x4,0(x17) +80005ee8: 00720863 beq x4,x7,80005ef8 +80005eec: 2d4022ef jal x5,800081c0 +80005ef0: 80005ee0 .word 0x80005ee0 +80005ef4: 80016b31 .word 0x80016b31 +80005ef8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0x96969696 +80005efc: 000d2083 lw x1,0(x26) +80005f00: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x96969696 +80005f04: 000d2f83 lw x31,0(x26) +80005f08: 004d0d13 addi x26,x26,4 + +80005f0c : +Zkne_aes32esmi_cg_cp_sbox_b150: + aes32esmi x15, x1, x31, 0 # perform operation +80005f0c: 27f087b3 aes32esmi x15,x1,x31,0x0 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b150, Zkne_aes32esmi_cg_cp_sbox_b150_str) +80005f10: 0008a203 lw x4,0(x17) +80005f14: 00f20863 beq x4,x15,80005f24 +80005f18: 2a8022ef jal x5,800081c0 +80005f1c: 80005f0c .word 0x80005f0c +80005f20: 80016b6c .word 0x80016b6c +80005f24: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x97979797 +80005f28: 000d2603 lw x12,0(x26) +80005f2c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x97979797 +80005f30: 000d2783 lw x15,0(x26) +80005f34: 004d0d13 addi x26,x26,4 + +80005f38 : +Zkne_aes32esmi_cg_cp_sbox_b151: + aes32esmi x27, x12, x15, 1 # perform operation +80005f38: 66f60db3 aes32esmi x27,x12,x15,0x1 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b151, Zkne_aes32esmi_cg_cp_sbox_b151_str) +80005f3c: 0008a203 lw x4,0(x17) +80005f40: 01b20863 beq x4,x27,80005f50 +80005f44: 27c022ef jal x5,800081c0 +80005f48: 80005f38 .word 0x80005f38 +80005f4c: 80016ba7 .word 0x80016ba7 +80005f50: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x98989898 +80005f54: 000d2483 lw x9,0(x26) +80005f58: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x98989898 +80005f5c: 000d2383 lw x7,0(x26) +80005f60: 004d0d13 addi x26,x26,4 + +80005f64 : +Zkne_aes32esmi_cg_cp_sbox_b152: + aes32esmi x8, x9, x7, 2 # perform operation +80005f64: a6748433 aes32esmi x8,x9,x7,0x2 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b152, Zkne_aes32esmi_cg_cp_sbox_b152_str) +80005f68: 0008a203 lw x4,0(x17) +80005f6c: 00820863 beq x4,x8,80005f7c +80005f70: 250022ef jal x5,800081c0 +80005f74: 80005f64 .word 0x80005f64 +80005f78: 80016be2 .word 0x80016be2 +80005f7c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x99999999 +80005f80: 000d2503 lw x10,0(x26) +80005f84: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x99999999 +80005f88: 000d2983 lw x19,0(x26) +80005f8c: 004d0d13 addi x26,x26,4 + +80005f90 : +Zkne_aes32esmi_cg_cp_sbox_b153: + aes32esmi x24, x10, x19, 0 # perform operation +80005f90: 27350c33 aes32esmi x24,x10,x19,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b153, Zkne_aes32esmi_cg_cp_sbox_b153_str) +80005f94: 0008a203 lw x4,0(x17) +80005f98: 01820863 beq x4,x24,80005fa8 +80005f9c: 224022ef jal x5,800081c0 +80005fa0: 80005f90 .word 0x80005f90 +80005fa4: 80016c1d .word 0x80016c1d +80005fa8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x9a9a9a9a +80005fac: 000d2503 lw x10,0(x26) +80005fb0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x9a9a9a9a +80005fb4: 000d2303 lw x6,0(x26) +80005fb8: 004d0d13 addi x26,x26,4 + +80005fbc : +Zkne_aes32esmi_cg_cp_sbox_b154: + aes32esmi x28, x10, x6, 0 # perform operation +80005fbc: 26650e33 aes32esmi x28,x10,x6,0x0 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_sbox_b154, Zkne_aes32esmi_cg_cp_sbox_b154_str) +80005fc0: 0008a203 lw x4,0(x17) +80005fc4: 01c20863 beq x4,x28,80005fd4 +80005fc8: 1f8022ef jal x5,800081c0 +80005fcc: 80005fbc .word 0x80005fbc +80005fd0: 80016c58 .word 0x80016c58 +80005fd4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x9b9b9b9b +80005fd8: 000d2f03 lw x30,0(x26) +80005fdc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x9b9b9b9b +80005fe0: 000d2783 lw x15,0(x26) +80005fe4: 004d0d13 addi x26,x26,4 + +80005fe8 : +Zkne_aes32esmi_cg_cp_sbox_b155: + aes32esmi x12, x30, x15, 1 # perform operation +80005fe8: 66ff0633 aes32esmi x12,x30,x15,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b155, Zkne_aes32esmi_cg_cp_sbox_b155_str) +80005fec: 0008a203 lw x4,0(x17) +80005ff0: 00c20863 beq x4,x12,80006000 +80005ff4: 1cc022ef jal x5,800081c0 +80005ff8: 80005fe8 .word 0x80005fe8 +80005ffc: 80016c93 .word 0x80016c93 +80006000: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x9c9c9c9c +80006004: 000d2983 lw x19,0(x26) +80006008: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x9c9c9c9c +8000600c: 000d2f83 lw x31,0(x26) +80006010: 004d0d13 addi x26,x26,4 + +80006014 : +Zkne_aes32esmi_cg_cp_sbox_b156: + aes32esmi x1, x19, x31, 0 # perform operation +80006014: 27f980b3 aes32esmi x1,x19,x31,0x0 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b156, Zkne_aes32esmi_cg_cp_sbox_b156_str) +80006018: 0008a203 lw x4,0(x17) +8000601c: 00120863 beq x4,x1,8000602c +80006020: 1a0022ef jal x5,800081c0 +80006024: 80006014 .word 0x80006014 +80006028: 80016cce .word 0x80016cce +8000602c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x9d9d9d9d +80006030: 000d2403 lw x8,0(x26) +80006034: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x9d9d9d9d +80006038: 000d2b03 lw x22,0(x26) +8000603c: 004d0d13 addi x26,x26,4 + +80006040 : +Zkne_aes32esmi_cg_cp_sbox_b157: + aes32esmi x12, x8, x22, 1 # perform operation +80006040: 67640633 aes32esmi x12,x8,x22,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b157, Zkne_aes32esmi_cg_cp_sbox_b157_str) +80006044: 0008a203 lw x4,0(x17) +80006048: 00c20863 beq x4,x12,80006058 +8000604c: 174022ef jal x5,800081c0 +80006050: 80006040 .word 0x80006040 +80006054: 80016d09 .word 0x80016d09 +80006058: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x9e9e9e9e +8000605c: 000d2e03 lw x28,0(x26) +80006060: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x9e9e9e9e +80006064: 000d2603 lw x12,0(x26) +80006068: 004d0d13 addi x26,x26,4 + +8000606c : +Zkne_aes32esmi_cg_cp_sbox_b158: + aes32esmi x10, x28, x12, 2 # perform operation +8000606c: a6ce0533 aes32esmi x10,x28,x12,0x2 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b158, Zkne_aes32esmi_cg_cp_sbox_b158_str) +80006070: 0008a203 lw x4,0(x17) +80006074: 00a20863 beq x4,x10,80006084 +80006078: 148022ef jal x5,800081c0 +8000607c: 8000606c .word 0x8000606c +80006080: 80016d44 .word 0x80016d44 +80006084: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x9f9f9f9f +80006088: 000d2483 lw x9,0(x26) +8000608c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x9f9f9f9f +80006090: 000d2503 lw x10,0(x26) +80006094: 004d0d13 addi x26,x26,4 + +80006098 : +Zkne_aes32esmi_cg_cp_sbox_b159: + aes32esmi x8, x9, x10, 3 # perform operation +80006098: e6a48433 aes32esmi x8,x9,x10,0x3 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b159, Zkne_aes32esmi_cg_cp_sbox_b159_str) +8000609c: 0008a203 lw x4,0(x17) +800060a0: 00820863 beq x4,x8,800060b0 +800060a4: 11c022ef jal x5,800081c0 +800060a8: 80006098 .word 0x80006098 +800060ac: 80016d7f .word 0x80016d7f +800060b0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xa0a0a0a0 +800060b4: 000d2f83 lw x31,0(x26) +800060b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xa0a0a0a0 +800060bc: 000d2c83 lw x25,0(x26) +800060c0: 004d0d13 addi x26,x26,4 + +800060c4 : +Zkne_aes32esmi_cg_cp_sbox_b160: + aes32esmi x19, x31, x25, 2 # perform operation +800060c4: a79f89b3 aes32esmi x19,x31,x25,0x2 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b160, Zkne_aes32esmi_cg_cp_sbox_b160_str) +800060c8: 0008a203 lw x4,0(x17) +800060cc: 01320863 beq x4,x19,800060dc +800060d0: 0f0022ef jal x5,800081c0 +800060d4: 800060c4 .word 0x800060c4 +800060d8: 80016dba .word 0x80016dba +800060dc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xa1a1a1a1 +800060e0: 000d2583 lw x11,0(x26) +800060e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xa1a1a1a1 +800060e8: 000d2903 lw x18,0(x26) +800060ec: 004d0d13 addi x26,x26,4 + +800060f0 : +Zkne_aes32esmi_cg_cp_sbox_b161: + aes32esmi x6, x11, x18, 0 # perform operation +800060f0: 27258333 aes32esmi x6,x11,x18,0x0 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b161, Zkne_aes32esmi_cg_cp_sbox_b161_str) +800060f4: 0008a203 lw x4,0(x17) +800060f8: 00620863 beq x4,x6,80006108 +800060fc: 0c4022ef jal x5,800081c0 +80006100: 800060f0 .word 0x800060f0 +80006104: 80016df5 .word 0x80016df5 +80006108: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xa2a2a2a2 +8000610c: 000d2a83 lw x21,0(x26) +80006110: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xa2a2a2a2 +80006114: 000d2b83 lw x23,0(x26) +80006118: 004d0d13 addi x26,x26,4 + +8000611c : +Zkne_aes32esmi_cg_cp_sbox_b162: + aes32esmi x9, x21, x23, 1 # perform operation +8000611c: 677a84b3 aes32esmi x9,x21,x23,0x1 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b162, Zkne_aes32esmi_cg_cp_sbox_b162_str) +80006120: 0008a203 lw x4,0(x17) +80006124: 00920863 beq x4,x9,80006134 +80006128: 098022ef jal x5,800081c0 +8000612c: 8000611c .word 0x8000611c +80006130: 80016e30 .word 0x80016e30 +80006134: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xa3a3a3a3 +80006138: 000d2903 lw x18,0(x26) +8000613c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xa3a3a3a3 +80006140: 000d2d83 lw x27,0(x26) +80006144: 004d0d13 addi x26,x26,4 + +80006148 : +Zkne_aes32esmi_cg_cp_sbox_b163: + aes32esmi x20, x18, x27, 0 # perform operation +80006148: 27b90a33 aes32esmi x20,x18,x27,0x0 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b163, Zkne_aes32esmi_cg_cp_sbox_b163_str) +8000614c: 0008a203 lw x4,0(x17) +80006150: 01420863 beq x4,x20,80006160 +80006154: 06c022ef jal x5,800081c0 +80006158: 80006148 .word 0x80006148 +8000615c: 80016e6b .word 0x80016e6b +80006160: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xa4a4a4a4 +80006164: 000d2b83 lw x23,0(x26) +80006168: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xa4a4a4a4 +8000616c: 000d2083 lw x1,0(x26) +80006170: 004d0d13 addi x26,x26,4 + +80006174 : +Zkne_aes32esmi_cg_cp_sbox_b164: + aes32esmi x20, x23, x1, 0 # perform operation +80006174: 261b8a33 aes32esmi x20,x23,x1,0x0 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b164, Zkne_aes32esmi_cg_cp_sbox_b164_str) +80006178: 0008a203 lw x4,0(x17) +8000617c: 01420863 beq x4,x20,8000618c +80006180: 040022ef jal x5,800081c0 +80006184: 80006174 .word 0x80006174 +80006188: 80016ea6 .word 0x80016ea6 +8000618c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xa5a5a5a5 +80006190: 000d2503 lw x10,0(x26) +80006194: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xa5a5a5a5 +80006198: 000d2103 lw x2,0(x26) +8000619c: 004d0d13 addi x26,x26,4 + +800061a0 : +Zkne_aes32esmi_cg_cp_sbox_b165: + aes32esmi x27, x10, x2, 0 # perform operation +800061a0: 26250db3 aes32esmi x27,x10,x2,0x0 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b165, Zkne_aes32esmi_cg_cp_sbox_b165_str) +800061a4: 0008a203 lw x4,0(x17) +800061a8: 01b20863 beq x4,x27,800061b8 +800061ac: 014022ef jal x5,800081c0 +800061b0: 800061a0 .word 0x800061a0 +800061b4: 80016ee1 .word 0x80016ee1 +800061b8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xa6a6a6a6 +800061bc: 000d2783 lw x15,0(x26) +800061c0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xa6a6a6a6 +800061c4: 000d2483 lw x9,0(x26) +800061c8: 004d0d13 addi x26,x26,4 + +800061cc : +Zkne_aes32esmi_cg_cp_sbox_b166: + aes32esmi x10, x15, x9, 0 # perform operation +800061cc: 26978533 aes32esmi x10,x15,x9,0x0 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b166, Zkne_aes32esmi_cg_cp_sbox_b166_str) +800061d0: 0008a203 lw x4,0(x17) +800061d4: 00a20863 beq x4,x10,800061e4 +800061d8: 7e9012ef jal x5,800081c0 +800061dc: 800061cc .word 0x800061cc +800061e0: 80016f1c .word 0x80016f1c +800061e4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xa7a7a7a7 +800061e8: 000d2a83 lw x21,0(x26) +800061ec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xa7a7a7a7 +800061f0: 000d2803 lw x16,0(x26) +800061f4: 004d0d13 addi x26,x26,4 + +800061f8 : +Zkne_aes32esmi_cg_cp_sbox_b167: + aes32esmi x22, x21, x16, 0 # perform operation +800061f8: 270a8b33 aes32esmi x22,x21,x16,0x0 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b167, Zkne_aes32esmi_cg_cp_sbox_b167_str) +800061fc: 0008a203 lw x4,0(x17) +80006200: 01620863 beq x4,x22,80006210 +80006204: 7bd012ef jal x5,800081c0 +80006208: 800061f8 .word 0x800061f8 +8000620c: 80016f57 .word 0x80016f57 +80006210: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xa8a8a8a8 +80006214: 000d2603 lw x12,0(x26) +80006218: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xa8a8a8a8 +8000621c: 000d2583 lw x11,0(x26) +80006220: 004d0d13 addi x26,x26,4 + +80006224 : +Zkne_aes32esmi_cg_cp_sbox_b168: + aes32esmi x31, x12, x11, 3 # perform operation +80006224: e6b60fb3 aes32esmi x31,x12,x11,0x3 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b168, Zkne_aes32esmi_cg_cp_sbox_b168_str) +80006228: 0008a203 lw x4,0(x17) +8000622c: 01f20863 beq x4,x31,8000623c +80006230: 791012ef jal x5,800081c0 +80006234: 80006224 .word 0x80006224 +80006238: 80016f92 .word 0x80016f92 +8000623c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xa9a9a9a9 +80006240: 000d2183 lw x3,0(x26) +80006244: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xa9a9a9a9 +80006248: 000d2383 lw x7,0(x26) +8000624c: 004d0d13 addi x26,x26,4 + +80006250 : +Zkne_aes32esmi_cg_cp_sbox_b169: + aes32esmi x30, x3, x7, 0 # perform operation +80006250: 26718f33 aes32esmi x30,x3,x7,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b169, Zkne_aes32esmi_cg_cp_sbox_b169_str) +80006254: 0008a203 lw x4,0(x17) +80006258: 01e20863 beq x4,x30,80006268 +8000625c: 765012ef jal x5,800081c0 +80006260: 80006250 .word 0x80006250 +80006264: 80016fcd .word 0x80016fcd +80006268: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xaaaaaaaa +8000626c: 000d2783 lw x15,0(x26) +80006270: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xaaaaaaaa +80006274: 000d2f83 lw x31,0(x26) +80006278: 004d0d13 addi x26,x26,4 + +8000627c : +Zkne_aes32esmi_cg_cp_sbox_b170: + aes32esmi x10, x15, x31, 1 # perform operation +8000627c: 67f78533 aes32esmi x10,x15,x31,0x1 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b170, Zkne_aes32esmi_cg_cp_sbox_b170_str) +80006280: 0008a203 lw x4,0(x17) +80006284: 00a20863 beq x4,x10,80006294 +80006288: 739012ef jal x5,800081c0 +8000628c: 8000627c .word 0x8000627c +80006290: 80017008 .word 0x80017008 +80006294: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xabababab +80006298: 000d2983 lw x19,0(x26) +8000629c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xabababab +800062a0: 000d2703 lw x14,0(x26) +800062a4: 004d0d13 addi x26,x26,4 + +800062a8 : +Zkne_aes32esmi_cg_cp_sbox_b171: + aes32esmi x25, x19, x14, 3 # perform operation +800062a8: e6e98cb3 aes32esmi x25,x19,x14,0x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b171, Zkne_aes32esmi_cg_cp_sbox_b171_str) +800062ac: 0008a203 lw x4,0(x17) +800062b0: 01920863 beq x4,x25,800062c0 +800062b4: 70d012ef jal x5,800081c0 +800062b8: 800062a8 .word 0x800062a8 +800062bc: 80017043 .word 0x80017043 +800062c0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xacacacac +800062c4: 000d2e83 lw x29,0(x26) +800062c8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xacacacac +800062cc: 000d2483 lw x9,0(x26) +800062d0: 004d0d13 addi x26,x26,4 + +800062d4 : +Zkne_aes32esmi_cg_cp_sbox_b172: + aes32esmi x16, x29, x9, 0 # perform operation +800062d4: 269e8833 aes32esmi x16,x29,x9,0x0 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b172, Zkne_aes32esmi_cg_cp_sbox_b172_str) +800062d8: 0008a203 lw x4,0(x17) +800062dc: 01020863 beq x4,x16,800062ec +800062e0: 6e1012ef jal x5,800081c0 +800062e4: 800062d4 .word 0x800062d4 +800062e8: 8001707e .word 0x8001707e +800062ec: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xadadadad +800062f0: 000d2583 lw x11,0(x26) +800062f4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xadadadad +800062f8: 000d2b03 lw x22,0(x26) +800062fc: 004d0d13 addi x26,x26,4 + +80006300 : +Zkne_aes32esmi_cg_cp_sbox_b173: + aes32esmi x1, x11, x22, 1 # perform operation +80006300: 676580b3 aes32esmi x1,x11,x22,0x1 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b173, Zkne_aes32esmi_cg_cp_sbox_b173_str) +80006304: 0008a203 lw x4,0(x17) +80006308: 00120863 beq x4,x1,80006318 +8000630c: 6b5012ef jal x5,800081c0 +80006310: 80006300 .word 0x80006300 +80006314: 800170b9 .word 0x800170b9 +80006318: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xaeaeaeae +8000631c: 000d2e83 lw x29,0(x26) +80006320: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xaeaeaeae +80006324: 000d2b03 lw x22,0(x26) +80006328: 004d0d13 addi x26,x26,4 + +8000632c : +Zkne_aes32esmi_cg_cp_sbox_b174: + aes32esmi x23, x29, x22, 2 # perform operation +8000632c: a76e8bb3 aes32esmi x23,x29,x22,0x2 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b174, Zkne_aes32esmi_cg_cp_sbox_b174_str) +80006330: 0008a203 lw x4,0(x17) +80006334: 01720863 beq x4,x23,80006344 +80006338: 689012ef jal x5,800081c0 +8000633c: 8000632c .word 0x8000632c +80006340: 800170f4 .word 0x800170f4 +80006344: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xafafafaf +80006348: 000d2383 lw x7,0(x26) +8000634c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xafafafaf +80006350: 000d2403 lw x8,0(x26) +80006354: 004d0d13 addi x26,x26,4 + +80006358 : +Zkne_aes32esmi_cg_cp_sbox_b175: + aes32esmi x24, x7, x8, 0 # perform operation +80006358: 26838c33 aes32esmi x24,x7,x8,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b175, Zkne_aes32esmi_cg_cp_sbox_b175_str) +8000635c: 0008a203 lw x4,0(x17) +80006360: 01820863 beq x4,x24,80006370 +80006364: 65d012ef jal x5,800081c0 +80006368: 80006358 .word 0x80006358 +8000636c: 8001712f .word 0x8001712f +80006370: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xb0b0b0b0 +80006374: 000d2a83 lw x21,0(x26) +80006378: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xb0b0b0b0 +8000637c: 000d2d83 lw x27,0(x26) +80006380: 004d0d13 addi x26,x26,4 + +80006384 : +Zkne_aes32esmi_cg_cp_sbox_b176: + aes32esmi x25, x21, x27, 3 # perform operation +80006384: e7ba8cb3 aes32esmi x25,x21,x27,0x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b176, Zkne_aes32esmi_cg_cp_sbox_b176_str) +80006388: 0008a203 lw x4,0(x17) +8000638c: 01920863 beq x4,x25,8000639c +80006390: 631012ef jal x5,800081c0 +80006394: 80006384 .word 0x80006384 +80006398: 8001716a .word 0x8001716a +8000639c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xb1b1b1b1 +800063a0: 000d2903 lw x18,0(x26) +800063a4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xb1b1b1b1 +800063a8: 000d2083 lw x1,0(x26) +800063ac: 004d0d13 addi x26,x26,4 + +800063b0 : +Zkne_aes32esmi_cg_cp_sbox_b177: + aes32esmi x2, x18, x1, 3 # perform operation +800063b0: e6190133 aes32esmi x2,x18,x1,0x3 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b177, Zkne_aes32esmi_cg_cp_sbox_b177_str) +800063b4: 0008a203 lw x4,0(x17) +800063b8: 00220863 beq x4,x2,800063c8 +800063bc: 605012ef jal x5,800081c0 +800063c0: 800063b0 .word 0x800063b0 +800063c4: 800171a5 .word 0x800171a5 +800063c8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xb2b2b2b2 +800063cc: 000d2703 lw x14,0(x26) +800063d0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xb2b2b2b2 +800063d4: 000d2b83 lw x23,0(x26) +800063d8: 004d0d13 addi x26,x26,4 + +800063dc : +Zkne_aes32esmi_cg_cp_sbox_b178: + aes32esmi x16, x14, x23, 0 # perform operation +800063dc: 27770833 aes32esmi x16,x14,x23,0x0 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b178, Zkne_aes32esmi_cg_cp_sbox_b178_str) +800063e0: 0008a203 lw x4,0(x17) +800063e4: 01020863 beq x4,x16,800063f4 +800063e8: 5d9012ef jal x5,800081c0 +800063ec: 800063dc .word 0x800063dc +800063f0: 800171e0 .word 0x800171e0 +800063f4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xb3b3b3b3 +800063f8: 000d2483 lw x9,0(x26) +800063fc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xb3b3b3b3 +80006400: 000d2f83 lw x31,0(x26) +80006404: 004d0d13 addi x26,x26,4 + +80006408 : +Zkne_aes32esmi_cg_cp_sbox_b179: + aes32esmi x25, x9, x31, 2 # perform operation +80006408: a7f48cb3 aes32esmi x25,x9,x31,0x2 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes32esmi_cg_cp_sbox_b179, Zkne_aes32esmi_cg_cp_sbox_b179_str) +8000640c: 0008a203 lw x4,0(x17) +80006410: 01920863 beq x4,x25,80006420 +80006414: 5ad012ef jal x5,800081c0 +80006418: 80006408 .word 0x80006408 +8000641c: 8001721b .word 0x8001721b +80006420: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xb4b4b4b4 +80006424: 000d2483 lw x9,0(x26) +80006428: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xb4b4b4b4 +8000642c: 000d2f03 lw x30,0(x26) +80006430: 004d0d13 addi x26,x26,4 + +80006434 : +Zkne_aes32esmi_cg_cp_sbox_b180: + aes32esmi x27, x9, x30, 3 # perform operation +80006434: e7e48db3 aes32esmi x27,x9,x30,0x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes32esmi_cg_cp_sbox_b180, Zkne_aes32esmi_cg_cp_sbox_b180_str) +80006438: 0008a203 lw x4,0(x17) +8000643c: 01b20863 beq x4,x27,8000644c +80006440: 581012ef jal x5,800081c0 +80006444: 80006434 .word 0x80006434 +80006448: 80017256 .word 0x80017256 +8000644c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xb5b5b5b5 +80006450: 000d2c03 lw x24,0(x26) +80006454: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xb5b5b5b5 +80006458: 000d2583 lw x11,0(x26) +8000645c: 004d0d13 addi x26,x26,4 + +80006460 : +Zkne_aes32esmi_cg_cp_sbox_b181: + aes32esmi x2, x24, x11, 1 # perform operation +80006460: 66bc0133 aes32esmi x2,x24,x11,0x1 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b181, Zkne_aes32esmi_cg_cp_sbox_b181_str) +80006464: 0008a203 lw x4,0(x17) +80006468: 00220863 beq x4,x2,80006478 +8000646c: 555012ef jal x5,800081c0 +80006470: 80006460 .word 0x80006460 +80006474: 80017291 .word 0x80017291 +80006478: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xb6b6b6b6 +8000647c: 000d2b03 lw x22,0(x26) +80006480: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xb6b6b6b6 +80006484: 000d2d83 lw x27,0(x26) +80006488: 004d0d13 addi x26,x26,4 + +8000648c : +Zkne_aes32esmi_cg_cp_sbox_b182: + aes32esmi x20, x22, x27, 2 # perform operation +8000648c: a7bb0a33 aes32esmi x20,x22,x27,0x2 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b182, Zkne_aes32esmi_cg_cp_sbox_b182_str) +80006490: 0008a203 lw x4,0(x17) +80006494: 01420863 beq x4,x20,800064a4 +80006498: 529012ef jal x5,800081c0 +8000649c: 8000648c .word 0x8000648c +800064a0: 800172cc .word 0x800172cc +800064a4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xb7b7b7b7 +800064a8: 000d2983 lw x19,0(x26) +800064ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xb7b7b7b7 +800064b0: 000d2803 lw x16,0(x26) +800064b4: 004d0d13 addi x26,x26,4 + +800064b8 : +Zkne_aes32esmi_cg_cp_sbox_b183: + aes32esmi x15, x19, x16, 2 # perform operation +800064b8: a70987b3 aes32esmi x15,x19,x16,0x2 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b183, Zkne_aes32esmi_cg_cp_sbox_b183_str) +800064bc: 0008a203 lw x4,0(x17) +800064c0: 00f20863 beq x4,x15,800064d0 +800064c4: 4fd012ef jal x5,800081c0 +800064c8: 800064b8 .word 0x800064b8 +800064cc: 80017307 .word 0x80017307 +800064d0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xb8b8b8b8 +800064d4: 000d2103 lw x2,0(x26) +800064d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xb8b8b8b8 +800064dc: 000d2503 lw x10,0(x26) +800064e0: 004d0d13 addi x26,x26,4 + +800064e4 : +Zkne_aes32esmi_cg_cp_sbox_b184: + aes32esmi x24, x2, x10, 3 # perform operation +800064e4: e6a10c33 aes32esmi x24,x2,x10,0x3 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b184, Zkne_aes32esmi_cg_cp_sbox_b184_str) +800064e8: 0008a203 lw x4,0(x17) +800064ec: 01820863 beq x4,x24,800064fc +800064f0: 4d1012ef jal x5,800081c0 +800064f4: 800064e4 .word 0x800064e4 +800064f8: 80017342 .word 0x80017342 +800064fc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xb9b9b9b9 +80006500: 000d2f03 lw x30,0(x26) +80006504: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xb9b9b9b9 +80006508: 000d2b83 lw x23,0(x26) +8000650c: 004d0d13 addi x26,x26,4 + +80006510 : +Zkne_aes32esmi_cg_cp_sbox_b185: + aes32esmi x29, x30, x23, 1 # perform operation +80006510: 677f0eb3 aes32esmi x29,x30,x23,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b185, Zkne_aes32esmi_cg_cp_sbox_b185_str) +80006514: 0008a203 lw x4,0(x17) +80006518: 01d20863 beq x4,x29,80006528 +8000651c: 4a5012ef jal x5,800081c0 +80006520: 80006510 .word 0x80006510 +80006524: 8001737d .word 0x8001737d +80006528: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xbabababa +8000652c: 000d2183 lw x3,0(x26) +80006530: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xbabababa +80006534: 000d2103 lw x2,0(x26) +80006538: 004d0d13 addi x26,x26,4 + +8000653c : +Zkne_aes32esmi_cg_cp_sbox_b186: + aes32esmi x6, x3, x2, 3 # perform operation +8000653c: e6218333 aes32esmi x6,x3,x2,0x3 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b186, Zkne_aes32esmi_cg_cp_sbox_b186_str) +80006540: 0008a203 lw x4,0(x17) +80006544: 00620863 beq x4,x6,80006554 +80006548: 479012ef jal x5,800081c0 +8000654c: 8000653c .word 0x8000653c +80006550: 800173b8 .word 0x800173b8 +80006554: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xbbbbbbbb +80006558: 000d2983 lw x19,0(x26) +8000655c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xbbbbbbbb +80006560: 000d2c03 lw x24,0(x26) +80006564: 004d0d13 addi x26,x26,4 + +80006568 : +Zkne_aes32esmi_cg_cp_sbox_b187: + aes32esmi x29, x19, x24, 1 # perform operation +80006568: 67898eb3 aes32esmi x29,x19,x24,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b187, Zkne_aes32esmi_cg_cp_sbox_b187_str) +8000656c: 0008a203 lw x4,0(x17) +80006570: 01d20863 beq x4,x29,80006580 +80006574: 44d012ef jal x5,800081c0 +80006578: 80006568 .word 0x80006568 +8000657c: 800173f3 .word 0x800173f3 +80006580: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xbcbcbcbc +80006584: 000d2403 lw x8,0(x26) +80006588: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xbcbcbcbc +8000658c: 000d2803 lw x16,0(x26) +80006590: 004d0d13 addi x26,x26,4 + +80006594 : +Zkne_aes32esmi_cg_cp_sbox_b188: + aes32esmi x1, x8, x16, 3 # perform operation +80006594: e70400b3 aes32esmi x1,x8,x16,0x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b188, Zkne_aes32esmi_cg_cp_sbox_b188_str) +80006598: 0008a203 lw x4,0(x17) +8000659c: 00120863 beq x4,x1,800065ac +800065a0: 421012ef jal x5,800081c0 +800065a4: 80006594 .word 0x80006594 +800065a8: 8001742e .word 0x8001742e +800065ac: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xbdbdbdbd +800065b0: 000d2c03 lw x24,0(x26) +800065b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xbdbdbdbd +800065b8: 000d2983 lw x19,0(x26) +800065bc: 004d0d13 addi x26,x26,4 + +800065c0 : +Zkne_aes32esmi_cg_cp_sbox_b189: + aes32esmi x7, x24, x19, 2 # perform operation +800065c0: a73c03b3 aes32esmi x7,x24,x19,0x2 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b189, Zkne_aes32esmi_cg_cp_sbox_b189_str) +800065c4: 0008a203 lw x4,0(x17) +800065c8: 00720863 beq x4,x7,800065d8 +800065cc: 3f5012ef jal x5,800081c0 +800065d0: 800065c0 .word 0x800065c0 +800065d4: 80017469 .word 0x80017469 +800065d8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xbebebebe +800065dc: 000d2103 lw x2,0(x26) +800065e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xbebebebe +800065e4: 000d2e83 lw x29,0(x26) +800065e8: 004d0d13 addi x26,x26,4 + +800065ec : +Zkne_aes32esmi_cg_cp_sbox_b190: + aes32esmi x14, x2, x29, 3 # perform operation +800065ec: e7d10733 aes32esmi x14,x2,x29,0x3 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b190, Zkne_aes32esmi_cg_cp_sbox_b190_str) +800065f0: 0008a203 lw x4,0(x17) +800065f4: 00e20863 beq x4,x14,80006604 +800065f8: 3c9012ef jal x5,800081c0 +800065fc: 800065ec .word 0x800065ec +80006600: 800174a4 .word 0x800174a4 +80006604: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xbfbfbfbf +80006608: 000d2b83 lw x23,0(x26) +8000660c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xbfbfbfbf +80006610: 000d2383 lw x7,0(x26) +80006614: 004d0d13 addi x26,x26,4 + +80006618 : +Zkne_aes32esmi_cg_cp_sbox_b191: + aes32esmi x19, x23, x7, 3 # perform operation +80006618: e67b89b3 aes32esmi x19,x23,x7,0x3 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b191, Zkne_aes32esmi_cg_cp_sbox_b191_str) +8000661c: 0008a203 lw x4,0(x17) +80006620: 01320863 beq x4,x19,80006630 +80006624: 39d012ef jal x5,800081c0 +80006628: 80006618 .word 0x80006618 +8000662c: 800174df .word 0x800174df +80006630: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xc0c0c0c0 +80006634: 000d2703 lw x14,0(x26) +80006638: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xc0c0c0c0 +8000663c: 000d2983 lw x19,0(x26) +80006640: 004d0d13 addi x26,x26,4 + +80006644 : +Zkne_aes32esmi_cg_cp_sbox_b192: + aes32esmi x8, x14, x19, 1 # perform operation +80006644: 67370433 aes32esmi x8,x14,x19,0x1 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b192, Zkne_aes32esmi_cg_cp_sbox_b192_str) +80006648: 0008a203 lw x4,0(x17) +8000664c: 00820863 beq x4,x8,8000665c +80006650: 371012ef jal x5,800081c0 +80006654: 80006644 .word 0x80006644 +80006658: 8001751a .word 0x8001751a +8000665c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xc1c1c1c1 +80006660: 000d2503 lw x10,0(x26) +80006664: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xc1c1c1c1 +80006668: 000d2103 lw x2,0(x26) +8000666c: 004d0d13 addi x26,x26,4 + +80006670 : +Zkne_aes32esmi_cg_cp_sbox_b193: + aes32esmi x7, x10, x2, 3 # perform operation +80006670: e62503b3 aes32esmi x7,x10,x2,0x3 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b193, Zkne_aes32esmi_cg_cp_sbox_b193_str) +80006674: 0008a203 lw x4,0(x17) +80006678: 00720863 beq x4,x7,80006688 +8000667c: 345012ef jal x5,800081c0 +80006680: 80006670 .word 0x80006670 +80006684: 80017555 .word 0x80017555 +80006688: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xc2c2c2c2 +8000668c: 000d2a83 lw x21,0(x26) +80006690: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xc2c2c2c2 +80006694: 000d2503 lw x10,0(x26) +80006698: 004d0d13 addi x26,x26,4 + +8000669c : +Zkne_aes32esmi_cg_cp_sbox_b194: + aes32esmi x9, x21, x10, 2 # perform operation +8000669c: a6aa84b3 aes32esmi x9,x21,x10,0x2 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b194, Zkne_aes32esmi_cg_cp_sbox_b194_str) +800066a0: 0008a203 lw x4,0(x17) +800066a4: 00920863 beq x4,x9,800066b4 +800066a8: 319012ef jal x5,800081c0 +800066ac: 8000669c .word 0x8000669c +800066b0: 80017590 .word 0x80017590 +800066b4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xc3c3c3c3 +800066b8: 000d2c03 lw x24,0(x26) +800066bc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xc3c3c3c3 +800066c0: 000d2e03 lw x28,0(x26) +800066c4: 004d0d13 addi x26,x26,4 + +800066c8 : +Zkne_aes32esmi_cg_cp_sbox_b195: + aes32esmi x1, x24, x28, 1 # perform operation +800066c8: 67cc00b3 aes32esmi x1,x24,x28,0x1 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b195, Zkne_aes32esmi_cg_cp_sbox_b195_str) +800066cc: 0008a203 lw x4,0(x17) +800066d0: 00120863 beq x4,x1,800066e0 +800066d4: 2ed012ef jal x5,800081c0 +800066d8: 800066c8 .word 0x800066c8 +800066dc: 800175cb .word 0x800175cb +800066e0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xc4c4c4c4 +800066e4: 000d2483 lw x9,0(x26) +800066e8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xc4c4c4c4 +800066ec: 000d2a83 lw x21,0(x26) +800066f0: 004d0d13 addi x26,x26,4 + +800066f4 : +Zkne_aes32esmi_cg_cp_sbox_b196: + aes32esmi x29, x9, x21, 2 # perform operation +800066f4: a7548eb3 aes32esmi x29,x9,x21,0x2 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b196, Zkne_aes32esmi_cg_cp_sbox_b196_str) +800066f8: 0008a203 lw x4,0(x17) +800066fc: 01d20863 beq x4,x29,8000670c +80006700: 2c1012ef jal x5,800081c0 +80006704: 800066f4 .word 0x800066f4 +80006708: 80017606 .word 0x80017606 +8000670c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xc5c5c5c5 +80006710: 000d2e03 lw x28,0(x26) +80006714: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xc5c5c5c5 +80006718: 000d2783 lw x15,0(x26) +8000671c: 004d0d13 addi x26,x26,4 + +80006720 : +Zkne_aes32esmi_cg_cp_sbox_b197: + aes32esmi x19, x28, x15, 1 # perform operation +80006720: 66fe09b3 aes32esmi x19,x28,x15,0x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b197, Zkne_aes32esmi_cg_cp_sbox_b197_str) +80006724: 0008a203 lw x4,0(x17) +80006728: 01320863 beq x4,x19,80006738 +8000672c: 295012ef jal x5,800081c0 +80006730: 80006720 .word 0x80006720 +80006734: 80017641 .word 0x80017641 +80006738: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xc6c6c6c6 +8000673c: 000d2f83 lw x31,0(x26) +80006740: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xc6c6c6c6 +80006744: 000d2383 lw x7,0(x26) +80006748: 004d0d13 addi x26,x26,4 + +8000674c : +Zkne_aes32esmi_cg_cp_sbox_b198: + aes32esmi x18, x31, x7, 0 # perform operation +8000674c: 267f8933 aes32esmi x18,x31,x7,0x0 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b198, Zkne_aes32esmi_cg_cp_sbox_b198_str) +80006750: 0008a203 lw x4,0(x17) +80006754: 01220863 beq x4,x18,80006764 +80006758: 269012ef jal x5,800081c0 +8000675c: 8000674c .word 0x8000674c +80006760: 8001767c .word 0x8001767c +80006764: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xc7c7c7c7 +80006768: 000d2483 lw x9,0(x26) +8000676c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xc7c7c7c7 +80006770: 000d2c03 lw x24,0(x26) +80006774: 004d0d13 addi x26,x26,4 + +80006778 : +Zkne_aes32esmi_cg_cp_sbox_b199: + aes32esmi x20, x9, x24, 1 # perform operation +80006778: 67848a33 aes32esmi x20,x9,x24,0x1 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b199, Zkne_aes32esmi_cg_cp_sbox_b199_str) +8000677c: 0008a203 lw x4,0(x17) +80006780: 01420863 beq x4,x20,80006790 +80006784: 23d012ef jal x5,800081c0 +80006788: 80006778 .word 0x80006778 +8000678c: 800176b7 .word 0x800176b7 +80006790: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xc8c8c8c8 +80006794: 000d2903 lw x18,0(x26) +80006798: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xc8c8c8c8 +8000679c: 000d2b83 lw x23,0(x26) +800067a0: 004d0d13 addi x26,x26,4 + +800067a4 : +Zkne_aes32esmi_cg_cp_sbox_b200: + aes32esmi x14, x18, x23, 1 # perform operation +800067a4: 67790733 aes32esmi x14,x18,x23,0x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b200, Zkne_aes32esmi_cg_cp_sbox_b200_str) +800067a8: 0008a203 lw x4,0(x17) +800067ac: 00e20863 beq x4,x14,800067bc +800067b0: 211012ef jal x5,800081c0 +800067b4: 800067a4 .word 0x800067a4 +800067b8: 800176f2 .word 0x800176f2 +800067bc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xc9c9c9c9 +800067c0: 000d2403 lw x8,0(x26) +800067c4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xc9c9c9c9 +800067c8: 000d2b83 lw x23,0(x26) +800067cc: 004d0d13 addi x26,x26,4 + +800067d0 : +Zkne_aes32esmi_cg_cp_sbox_b201: + aes32esmi x2, x8, x23, 3 # perform operation +800067d0: e7740133 aes32esmi x2,x8,x23,0x3 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b201, Zkne_aes32esmi_cg_cp_sbox_b201_str) +800067d4: 0008a203 lw x4,0(x17) +800067d8: 00220863 beq x4,x2,800067e8 +800067dc: 1e5012ef jal x5,800081c0 +800067e0: 800067d0 .word 0x800067d0 +800067e4: 8001772d .word 0x8001772d +800067e8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xcacacaca +800067ec: 000d2983 lw x19,0(x26) +800067f0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xcacacaca +800067f4: 000d2903 lw x18,0(x26) +800067f8: 004d0d13 addi x26,x26,4 + +800067fc : +Zkne_aes32esmi_cg_cp_sbox_b202: + aes32esmi x31, x19, x18, 3 # perform operation +800067fc: e7298fb3 aes32esmi x31,x19,x18,0x3 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b202, Zkne_aes32esmi_cg_cp_sbox_b202_str) +80006800: 0008a203 lw x4,0(x17) +80006804: 01f20863 beq x4,x31,80006814 +80006808: 1b9012ef jal x5,800081c0 +8000680c: 800067fc .word 0x800067fc +80006810: 80017768 .word 0x80017768 +80006814: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xcbcbcbcb +80006818: 000d2383 lw x7,0(x26) +8000681c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xcbcbcbcb +80006820: 000d2083 lw x1,0(x26) +80006824: 004d0d13 addi x26,x26,4 + +80006828 : +Zkne_aes32esmi_cg_cp_sbox_b203: + aes32esmi x12, x7, x1, 1 # perform operation +80006828: 66138633 aes32esmi x12,x7,x1,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b203, Zkne_aes32esmi_cg_cp_sbox_b203_str) +8000682c: 0008a203 lw x4,0(x17) +80006830: 00c20863 beq x4,x12,80006840 +80006834: 18d012ef jal x5,800081c0 +80006838: 80006828 .word 0x80006828 +8000683c: 800177a3 .word 0x800177a3 +80006840: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xcccccccc +80006844: 000d2983 lw x19,0(x26) +80006848: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xcccccccc +8000684c: 000d2383 lw x7,0(x26) +80006850: 004d0d13 addi x26,x26,4 + +80006854 : +Zkne_aes32esmi_cg_cp_sbox_b204: + aes32esmi x31, x19, x7, 1 # perform operation +80006854: 66798fb3 aes32esmi x31,x19,x7,0x1 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b204, Zkne_aes32esmi_cg_cp_sbox_b204_str) +80006858: 0008a203 lw x4,0(x17) +8000685c: 01f20863 beq x4,x31,8000686c +80006860: 161012ef jal x5,800081c0 +80006864: 80006854 .word 0x80006854 +80006868: 800177de .word 0x800177de +8000686c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xcdcdcdcd +80006870: 000d2683 lw x13,0(x26) +80006874: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xcdcdcdcd +80006878: 000d2703 lw x14,0(x26) +8000687c: 004d0d13 addi x26,x26,4 + +80006880 : +Zkne_aes32esmi_cg_cp_sbox_b205: + aes32esmi x30, x13, x14, 0 # perform operation +80006880: 26e68f33 aes32esmi x30,x13,x14,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b205, Zkne_aes32esmi_cg_cp_sbox_b205_str) +80006884: 0008a203 lw x4,0(x17) +80006888: 01e20863 beq x4,x30,80006898 +8000688c: 135012ef jal x5,800081c0 +80006890: 80006880 .word 0x80006880 +80006894: 80017819 .word 0x80017819 +80006898: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xcececece +8000689c: 000d2503 lw x10,0(x26) +800068a0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xcececece +800068a4: 000d2583 lw x11,0(x26) +800068a8: 004d0d13 addi x26,x26,4 + +800068ac : +Zkne_aes32esmi_cg_cp_sbox_b206: + aes32esmi x29, x10, x11, 3 # perform operation +800068ac: e6b50eb3 aes32esmi x29,x10,x11,0x3 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b206, Zkne_aes32esmi_cg_cp_sbox_b206_str) +800068b0: 0008a203 lw x4,0(x17) +800068b4: 01d20863 beq x4,x29,800068c4 +800068b8: 109012ef jal x5,800081c0 +800068bc: 800068ac .word 0x800068ac +800068c0: 80017854 .word 0x80017854 +800068c4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xcfcfcfcf +800068c8: 000d2803 lw x16,0(x26) +800068cc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xcfcfcfcf +800068d0: 000d2483 lw x9,0(x26) +800068d4: 004d0d13 addi x26,x26,4 + +800068d8 : +Zkne_aes32esmi_cg_cp_sbox_b207: + aes32esmi x10, x16, x9, 3 # perform operation +800068d8: e6980533 aes32esmi x10,x16,x9,0x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b207, Zkne_aes32esmi_cg_cp_sbox_b207_str) +800068dc: 0008a203 lw x4,0(x17) +800068e0: 00a20863 beq x4,x10,800068f0 +800068e4: 0dd012ef jal x5,800081c0 +800068e8: 800068d8 .word 0x800068d8 +800068ec: 8001788f .word 0x8001788f +800068f0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xd0d0d0d0 +800068f4: 000d2383 lw x7,0(x26) +800068f8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xd0d0d0d0 +800068fc: 000d2483 lw x9,0(x26) +80006900: 004d0d13 addi x26,x26,4 + +80006904 : +Zkne_aes32esmi_cg_cp_sbox_b208: + aes32esmi x16, x7, x9, 2 # perform operation +80006904: a6938833 aes32esmi x16,x7,x9,0x2 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes32esmi_cg_cp_sbox_b208, Zkne_aes32esmi_cg_cp_sbox_b208_str) +80006908: 0008a203 lw x4,0(x17) +8000690c: 01020863 beq x4,x16,8000691c +80006910: 0b1012ef jal x5,800081c0 +80006914: 80006904 .word 0x80006904 +80006918: 800178ca .word 0x800178ca +8000691c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xd1d1d1d1 +80006920: 000d2803 lw x16,0(x26) +80006924: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xd1d1d1d1 +80006928: 000d2103 lw x2,0(x26) +8000692c: 004d0d13 addi x26,x26,4 + +80006930 : +Zkne_aes32esmi_cg_cp_sbox_b209: + aes32esmi x8, x16, x2, 0 # perform operation +80006930: 26280433 aes32esmi x8,x16,x2,0x0 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zkne_aes32esmi_cg_cp_sbox_b209, Zkne_aes32esmi_cg_cp_sbox_b209_str) +80006934: 0008a203 lw x4,0(x17) +80006938: 00820863 beq x4,x8,80006948 +8000693c: 085012ef jal x5,800081c0 +80006940: 80006930 .word 0x80006930 +80006944: 80017905 .word 0x80017905 +80006948: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xd2d2d2d2 +8000694c: 000d2103 lw x2,0(x26) +80006950: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xd2d2d2d2 +80006954: 000d2e83 lw x29,0(x26) +80006958: 004d0d13 addi x26,x26,4 + +8000695c : +Zkne_aes32esmi_cg_cp_sbox_b210: + aes32esmi x10, x2, x29, 2 # perform operation +8000695c: a7d10533 aes32esmi x10,x2,x29,0x2 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes32esmi_cg_cp_sbox_b210, Zkne_aes32esmi_cg_cp_sbox_b210_str) +80006960: 0008a203 lw x4,0(x17) +80006964: 00a20863 beq x4,x10,80006974 +80006968: 059012ef jal x5,800081c0 +8000696c: 8000695c .word 0x8000695c +80006970: 80017940 .word 0x80017940 +80006974: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xd3d3d3d3 +80006978: 000d2083 lw x1,0(x26) +8000697c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xd3d3d3d3 +80006980: 000d2b83 lw x23,0(x26) +80006984: 004d0d13 addi x26,x26,4 + +80006988 : +Zkne_aes32esmi_cg_cp_sbox_b211: + aes32esmi x19, x1, x23, 2 # perform operation +80006988: a77089b3 aes32esmi x19,x1,x23,0x2 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b211, Zkne_aes32esmi_cg_cp_sbox_b211_str) +8000698c: 0008a203 lw x4,0(x17) +80006990: 01320863 beq x4,x19,800069a0 +80006994: 02d012ef jal x5,800081c0 +80006998: 80006988 .word 0x80006988 +8000699c: 8001797b .word 0x8001797b +800069a0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xd4d4d4d4 +800069a4: 000d2e03 lw x28,0(x26) +800069a8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xd4d4d4d4 +800069ac: 000d2303 lw x6,0(x26) +800069b0: 004d0d13 addi x26,x26,4 + +800069b4 : +Zkne_aes32esmi_cg_cp_sbox_b212: + aes32esmi x20, x28, x6, 2 # perform operation +800069b4: a66e0a33 aes32esmi x20,x28,x6,0x2 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b212, Zkne_aes32esmi_cg_cp_sbox_b212_str) +800069b8: 0008a203 lw x4,0(x17) +800069bc: 01420863 beq x4,x20,800069cc +800069c0: 001012ef jal x5,800081c0 +800069c4: 800069b4 .word 0x800069b4 +800069c8: 800179b6 .word 0x800179b6 +800069cc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xd5d5d5d5 +800069d0: 000d2183 lw x3,0(x26) +800069d4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xd5d5d5d5 +800069d8: 000d2983 lw x19,0(x26) +800069dc: 004d0d13 addi x26,x26,4 + +800069e0 : +Zkne_aes32esmi_cg_cp_sbox_b213: + aes32esmi x1, x3, x19, 0 # perform operation +800069e0: 273180b3 aes32esmi x1,x3,x19,0x0 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes32esmi_cg_cp_sbox_b213, Zkne_aes32esmi_cg_cp_sbox_b213_str) +800069e4: 0008a203 lw x4,0(x17) +800069e8: 00120863 beq x4,x1,800069f8 +800069ec: 7d4012ef jal x5,800081c0 +800069f0: 800069e0 .word 0x800069e0 +800069f4: 800179f1 .word 0x800179f1 +800069f8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xd6d6d6d6 +800069fc: 000d2583 lw x11,0(x26) +80006a00: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xd6d6d6d6 +80006a04: 000d2a03 lw x20,0(x26) +80006a08: 004d0d13 addi x26,x26,4 + +80006a0c : +Zkne_aes32esmi_cg_cp_sbox_b214: + aes32esmi x12, x11, x20, 1 # perform operation +80006a0c: 67458633 aes32esmi x12,x11,x20,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b214, Zkne_aes32esmi_cg_cp_sbox_b214_str) +80006a10: 0008a203 lw x4,0(x17) +80006a14: 00c20863 beq x4,x12,80006a24 +80006a18: 7a8012ef jal x5,800081c0 +80006a1c: 80006a0c .word 0x80006a0c +80006a20: 80017a2c .word 0x80017a2c +80006a24: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xd7d7d7d7 +80006a28: 000d2503 lw x10,0(x26) +80006a2c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xd7d7d7d7 +80006a30: 000d2b03 lw x22,0(x26) +80006a34: 004d0d13 addi x26,x26,4 + +80006a38 : +Zkne_aes32esmi_cg_cp_sbox_b215: + aes32esmi x20, x10, x22, 3 # perform operation +80006a38: e7650a33 aes32esmi x20,x10,x22,0x3 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zkne_aes32esmi_cg_cp_sbox_b215, Zkne_aes32esmi_cg_cp_sbox_b215_str) +80006a3c: 0008a203 lw x4,0(x17) +80006a40: 01420863 beq x4,x20,80006a50 +80006a44: 77c012ef jal x5,800081c0 +80006a48: 80006a38 .word 0x80006a38 +80006a4c: 80017a67 .word 0x80017a67 +80006a50: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xd8d8d8d8 +80006a54: 000d2b03 lw x22,0(x26) +80006a58: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0xd8d8d8d8 +80006a5c: 000d2303 lw x6,0(x26) +80006a60: 004d0d13 addi x26,x26,4 + +80006a64 : +Zkne_aes32esmi_cg_cp_sbox_b216: + aes32esmi x19, x22, x6, 1 # perform operation +80006a64: 666b09b3 aes32esmi x19,x22,x6,0x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b216, Zkne_aes32esmi_cg_cp_sbox_b216_str) +80006a68: 0008a203 lw x4,0(x17) +80006a6c: 01320863 beq x4,x19,80006a7c +80006a70: 750012ef jal x5,800081c0 +80006a74: 80006a64 .word 0x80006a64 +80006a78: 80017aa2 .word 0x80017aa2 +80006a7c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xd9d9d9d9 +80006a80: 000d2a83 lw x21,0(x26) +80006a84: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xd9d9d9d9 +80006a88: 000d2483 lw x9,0(x26) +80006a8c: 004d0d13 addi x26,x26,4 + +80006a90 : +Zkne_aes32esmi_cg_cp_sbox_b217: + aes32esmi x12, x21, x9, 1 # perform operation +80006a90: 669a8633 aes32esmi x12,x21,x9,0x1 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zkne_aes32esmi_cg_cp_sbox_b217, Zkne_aes32esmi_cg_cp_sbox_b217_str) +80006a94: 0008a203 lw x4,0(x17) +80006a98: 00c20863 beq x4,x12,80006aa8 +80006a9c: 724012ef jal x5,800081c0 +80006aa0: 80006a90 .word 0x80006a90 +80006aa4: 80017add .word 0x80017add +80006aa8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xdadadada +80006aac: 000d2783 lw x15,0(x26) +80006ab0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xdadadada +80006ab4: 000d2f03 lw x30,0(x26) +80006ab8: 004d0d13 addi x26,x26,4 + +80006abc : +Zkne_aes32esmi_cg_cp_sbox_b218: + aes32esmi x2, x15, x30, 0 # perform operation +80006abc: 27e78133 aes32esmi x2,x15,x30,0x0 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes32esmi_cg_cp_sbox_b218, Zkne_aes32esmi_cg_cp_sbox_b218_str) +80006ac0: 0008a203 lw x4,0(x17) +80006ac4: 00220863 beq x4,x2,80006ad4 +80006ac8: 6f8012ef jal x5,800081c0 +80006acc: 80006abc .word 0x80006abc +80006ad0: 80017b18 .word 0x80017b18 +80006ad4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xdbdbdbdb +80006ad8: 000d2083 lw x1,0(x26) +80006adc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xdbdbdbdb +80006ae0: 000d2b03 lw x22,0(x26) +80006ae4: 004d0d13 addi x26,x26,4 + +80006ae8 : +Zkne_aes32esmi_cg_cp_sbox_b219: + aes32esmi x29, x1, x22, 1 # perform operation +80006ae8: 67608eb3 aes32esmi x29,x1,x22,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b219, Zkne_aes32esmi_cg_cp_sbox_b219_str) +80006aec: 0008a203 lw x4,0(x17) +80006af0: 01d20863 beq x4,x29,80006b00 +80006af4: 6cc012ef jal x5,800081c0 +80006af8: 80006ae8 .word 0x80006ae8 +80006afc: 80017b53 .word 0x80017b53 +80006b00: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0xdcdcdcdc +80006b04: 000d2d83 lw x27,0(x26) +80006b08: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0xdcdcdcdc +80006b0c: 000d2183 lw x3,0(x26) +80006b10: 004d0d13 addi x26,x26,4 + +80006b14 : +Zkne_aes32esmi_cg_cp_sbox_b220: + aes32esmi x29, x27, x3, 1 # perform operation +80006b14: 663d8eb3 aes32esmi x29,x27,x3,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b220, Zkne_aes32esmi_cg_cp_sbox_b220_str) +80006b18: 0008a203 lw x4,0(x17) +80006b1c: 01d20863 beq x4,x29,80006b2c +80006b20: 6a0012ef jal x5,800081c0 +80006b24: 80006b14 .word 0x80006b14 +80006b28: 80017b8e .word 0x80017b8e +80006b2c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xdddddddd +80006b30: 000d2e83 lw x29,0(x26) +80006b34: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xdddddddd +80006b38: 000d2b03 lw x22,0(x26) +80006b3c: 004d0d13 addi x26,x26,4 + +80006b40 : +Zkne_aes32esmi_cg_cp_sbox_b221: + aes32esmi x6, x29, x22, 0 # perform operation +80006b40: 276e8333 aes32esmi x6,x29,x22,0x0 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b221, Zkne_aes32esmi_cg_cp_sbox_b221_str) +80006b44: 0008a203 lw x4,0(x17) +80006b48: 00620863 beq x4,x6,80006b58 +80006b4c: 674012ef jal x5,800081c0 +80006b50: 80006b40 .word 0x80006b40 +80006b54: 80017bc9 .word 0x80017bc9 +80006b58: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xdededede +80006b5c: 000d2583 lw x11,0(x26) +80006b60: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xdededede +80006b64: 000d2e83 lw x29,0(x26) +80006b68: 004d0d13 addi x26,x26,4 + +80006b6c : +Zkne_aes32esmi_cg_cp_sbox_b222: + aes32esmi x19, x11, x29, 0 # perform operation +80006b6c: 27d589b3 aes32esmi x19,x11,x29,0x0 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b222, Zkne_aes32esmi_cg_cp_sbox_b222_str) +80006b70: 0008a203 lw x4,0(x17) +80006b74: 01320863 beq x4,x19,80006b84 +80006b78: 648012ef jal x5,800081c0 +80006b7c: 80006b6c .word 0x80006b6c +80006b80: 80017c04 .word 0x80017c04 +80006b84: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xdfdfdfdf +80006b88: 000d2903 lw x18,0(x26) +80006b8c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xdfdfdfdf +80006b90: 000d2783 lw x15,0(x26) +80006b94: 004d0d13 addi x26,x26,4 + +80006b98 : +Zkne_aes32esmi_cg_cp_sbox_b223: + aes32esmi x29, x18, x15, 0 # perform operation +80006b98: 26f90eb3 aes32esmi x29,x18,x15,0x0 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b223, Zkne_aes32esmi_cg_cp_sbox_b223_str) +80006b9c: 0008a203 lw x4,0(x17) +80006ba0: 01d20863 beq x4,x29,80006bb0 +80006ba4: 61c012ef jal x5,800081c0 +80006ba8: 80006b98 .word 0x80006b98 +80006bac: 80017c3f .word 0x80017c3f +80006bb0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xe0e0e0e0 +80006bb4: 000d2703 lw x14,0(x26) +80006bb8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xe0e0e0e0 +80006bbc: 000d2a83 lw x21,0(x26) +80006bc0: 004d0d13 addi x26,x26,4 + +80006bc4 : +Zkne_aes32esmi_cg_cp_sbox_b224: + aes32esmi x13, x14, x21, 1 # perform operation +80006bc4: 675706b3 aes32esmi x13,x14,x21,0x1 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b224, Zkne_aes32esmi_cg_cp_sbox_b224_str) +80006bc8: 0008a203 lw x4,0(x17) +80006bcc: 00d20863 beq x4,x13,80006bdc +80006bd0: 5f0012ef jal x5,800081c0 +80006bd4: 80006bc4 .word 0x80006bc4 +80006bd8: 80017c7a .word 0x80017c7a +80006bdc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xe1e1e1e1 +80006be0: 000d2583 lw x11,0(x26) +80006be4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xe1e1e1e1 +80006be8: 000d2a83 lw x21,0(x26) +80006bec: 004d0d13 addi x26,x26,4 + +80006bf0 : +Zkne_aes32esmi_cg_cp_sbox_b225: + aes32esmi x15, x11, x21, 0 # perform operation +80006bf0: 275587b3 aes32esmi x15,x11,x21,0x0 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b225, Zkne_aes32esmi_cg_cp_sbox_b225_str) +80006bf4: 0008a203 lw x4,0(x17) +80006bf8: 00f20863 beq x4,x15,80006c08 +80006bfc: 5c4012ef jal x5,800081c0 +80006c00: 80006bf0 .word 0x80006bf0 +80006c04: 80017cb5 .word 0x80017cb5 +80006c08: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xe2e2e2e2 +80006c0c: 000d2103 lw x2,0(x26) +80006c10: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xe2e2e2e2 +80006c14: 000d2e83 lw x29,0(x26) +80006c18: 004d0d13 addi x26,x26,4 + +80006c1c : +Zkne_aes32esmi_cg_cp_sbox_b226: + aes32esmi x13, x2, x29, 3 # perform operation +80006c1c: e7d106b3 aes32esmi x13,x2,x29,0x3 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b226, Zkne_aes32esmi_cg_cp_sbox_b226_str) +80006c20: 0008a203 lw x4,0(x17) +80006c24: 00d20863 beq x4,x13,80006c34 +80006c28: 598012ef jal x5,800081c0 +80006c2c: 80006c1c .word 0x80006c1c +80006c30: 80017cf0 .word 0x80017cf0 +80006c34: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xe3e3e3e3 +80006c38: 000d2983 lw x19,0(x26) +80006c3c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xe3e3e3e3 +80006c40: 000d2f83 lw x31,0(x26) +80006c44: 004d0d13 addi x26,x26,4 + +80006c48 : +Zkne_aes32esmi_cg_cp_sbox_b227: + aes32esmi x21, x19, x31, 3 # perform operation +80006c48: e7f98ab3 aes32esmi x21,x19,x31,0x3 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zkne_aes32esmi_cg_cp_sbox_b227, Zkne_aes32esmi_cg_cp_sbox_b227_str) +80006c4c: 0008a203 lw x4,0(x17) +80006c50: 01520863 beq x4,x21,80006c60 +80006c54: 56c012ef jal x5,800081c0 +80006c58: 80006c48 .word 0x80006c48 +80006c5c: 80017d2b .word 0x80017d2b +80006c60: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xe4e4e4e4 +80006c64: 000d2a83 lw x21,0(x26) +80006c68: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xe4e4e4e4 +80006c6c: 000d2603 lw x12,0(x26) +80006c70: 004d0d13 addi x26,x26,4 + +80006c74 : +Zkne_aes32esmi_cg_cp_sbox_b228: + aes32esmi x7, x21, x12, 2 # perform operation +80006c74: a6ca83b3 aes32esmi x7,x21,x12,0x2 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes32esmi_cg_cp_sbox_b228, Zkne_aes32esmi_cg_cp_sbox_b228_str) +80006c78: 0008a203 lw x4,0(x17) +80006c7c: 00720863 beq x4,x7,80006c8c +80006c80: 540012ef jal x5,800081c0 +80006c84: 80006c74 .word 0x80006c74 +80006c88: 80017d66 .word 0x80017d66 +80006c8c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xe5e5e5e5 +80006c90: 000d2403 lw x8,0(x26) +80006c94: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xe5e5e5e5 +80006c98: 000d2d83 lw x27,0(x26) +80006c9c: 004d0d13 addi x26,x26,4 + +80006ca0 : +Zkne_aes32esmi_cg_cp_sbox_b229: + aes32esmi x15, x8, x27, 3 # perform operation +80006ca0: e7b407b3 aes32esmi x15,x8,x27,0x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b229, Zkne_aes32esmi_cg_cp_sbox_b229_str) +80006ca4: 0008a203 lw x4,0(x17) +80006ca8: 00f20863 beq x4,x15,80006cb8 +80006cac: 514012ef jal x5,800081c0 +80006cb0: 80006ca0 .word 0x80006ca0 +80006cb4: 80017da1 .word 0x80017da1 +80006cb8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0xe6e6e6e6 +80006cbc: 000d2d83 lw x27,0(x26) +80006cc0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0xe6e6e6e6 +80006cc4: 000d2183 lw x3,0(x26) +80006cc8: 004d0d13 addi x26,x26,4 + +80006ccc : +Zkne_aes32esmi_cg_cp_sbox_b230: + aes32esmi x23, x27, x3, 3 # perform operation +80006ccc: e63d8bb3 aes32esmi x23,x27,x3,0x3 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zkne_aes32esmi_cg_cp_sbox_b230, Zkne_aes32esmi_cg_cp_sbox_b230_str) +80006cd0: 0008a203 lw x4,0(x17) +80006cd4: 01720863 beq x4,x23,80006ce4 +80006cd8: 4e8012ef jal x5,800081c0 +80006cdc: 80006ccc .word 0x80006ccc +80006ce0: 80017ddc .word 0x80017ddc +80006ce4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xe7e7e7e7 +80006ce8: 000d2303 lw x6,0(x26) +80006cec: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xe7e7e7e7 +80006cf0: 000d2503 lw x10,0(x26) +80006cf4: 004d0d13 addi x26,x26,4 + +80006cf8 : +Zkne_aes32esmi_cg_cp_sbox_b231: + aes32esmi x30, x6, x10, 0 # perform operation +80006cf8: 26a30f33 aes32esmi x30,x6,x10,0x0 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b231, Zkne_aes32esmi_cg_cp_sbox_b231_str) +80006cfc: 0008a203 lw x4,0(x17) +80006d00: 01e20863 beq x4,x30,80006d10 +80006d04: 4bc012ef jal x5,800081c0 +80006d08: 80006cf8 .word 0x80006cf8 +80006d0c: 80017e17 .word 0x80017e17 +80006d10: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xe8e8e8e8 +80006d14: 000d2383 lw x7,0(x26) +80006d18: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xe8e8e8e8 +80006d1c: 000d2503 lw x10,0(x26) +80006d20: 004d0d13 addi x26,x26,4 + +80006d24 : +Zkne_aes32esmi_cg_cp_sbox_b232: + aes32esmi x30, x7, x10, 3 # perform operation +80006d24: e6a38f33 aes32esmi x30,x7,x10,0x3 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes32esmi_cg_cp_sbox_b232, Zkne_aes32esmi_cg_cp_sbox_b232_str) +80006d28: 0008a203 lw x4,0(x17) +80006d2c: 01e20863 beq x4,x30,80006d3c +80006d30: 490012ef jal x5,800081c0 +80006d34: 80006d24 .word 0x80006d24 +80006d38: 80017e52 .word 0x80017e52 +80006d3c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xe9e9e9e9 +80006d40: 000d2f03 lw x30,0(x26) +80006d44: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xe9e9e9e9 +80006d48: 000d2b03 lw x22,0(x26) +80006d4c: 004d0d13 addi x26,x26,4 + +80006d50 : +Zkne_aes32esmi_cg_cp_sbox_b233: + aes32esmi x19, x30, x22, 3 # perform operation +80006d50: e76f09b3 aes32esmi x19,x30,x22,0x3 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b233, Zkne_aes32esmi_cg_cp_sbox_b233_str) +80006d54: 0008a203 lw x4,0(x17) +80006d58: 01320863 beq x4,x19,80006d68 +80006d5c: 464012ef jal x5,800081c0 +80006d60: 80006d50 .word 0x80006d50 +80006d64: 80017e8d .word 0x80017e8d +80006d68: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xeaeaeaea +80006d6c: 000d2e03 lw x28,0(x26) +80006d70: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xeaeaeaea +80006d74: 000d2703 lw x14,0(x26) +80006d78: 004d0d13 addi x26,x26,4 + +80006d7c : +Zkne_aes32esmi_cg_cp_sbox_b234: + aes32esmi x6, x28, x14, 0 # perform operation +80006d7c: 26ee0333 aes32esmi x6,x28,x14,0x0 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b234, Zkne_aes32esmi_cg_cp_sbox_b234_str) +80006d80: 0008a203 lw x4,0(x17) +80006d84: 00620863 beq x4,x6,80006d94 +80006d88: 438012ef jal x5,800081c0 +80006d8c: 80006d7c .word 0x80006d7c +80006d90: 80017ec8 .word 0x80017ec8 +80006d94: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0xebebebeb +80006d98: 000d2603 lw x12,0(x26) +80006d9c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xebebebeb +80006da0: 000d2a83 lw x21,0(x26) +80006da4: 004d0d13 addi x26,x26,4 + +80006da8 : +Zkne_aes32esmi_cg_cp_sbox_b235: + aes32esmi x14, x12, x21, 2 # perform operation +80006da8: a7560733 aes32esmi x14,x12,x21,0x2 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b235, Zkne_aes32esmi_cg_cp_sbox_b235_str) +80006dac: 0008a203 lw x4,0(x17) +80006db0: 00e20863 beq x4,x14,80006dc0 +80006db4: 40c012ef jal x5,800081c0 +80006db8: 80006da8 .word 0x80006da8 +80006dbc: 80017f03 .word 0x80017f03 +80006dc0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xecececec +80006dc4: 000d2683 lw x13,0(x26) +80006dc8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xecececec +80006dcc: 000d2a03 lw x20,0(x26) +80006dd0: 004d0d13 addi x26,x26,4 + +80006dd4 : +Zkne_aes32esmi_cg_cp_sbox_b236: + aes32esmi x24, x13, x20, 0 # perform operation +80006dd4: 27468c33 aes32esmi x24,x13,x20,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b236, Zkne_aes32esmi_cg_cp_sbox_b236_str) +80006dd8: 0008a203 lw x4,0(x17) +80006ddc: 01820863 beq x4,x24,80006dec +80006de0: 3e0012ef jal x5,800081c0 +80006de4: 80006dd4 .word 0x80006dd4 +80006de8: 80017f3e .word 0x80017f3e +80006dec: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xedededed +80006df0: 000d2383 lw x7,0(x26) +80006df4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xedededed +80006df8: 000d2c83 lw x25,0(x26) +80006dfc: 004d0d13 addi x26,x26,4 + +80006e00 : +Zkne_aes32esmi_cg_cp_sbox_b237: + aes32esmi x29, x7, x25, 0 # perform operation +80006e00: 27938eb3 aes32esmi x29,x7,x25,0x0 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b237, Zkne_aes32esmi_cg_cp_sbox_b237_str) +80006e04: 0008a203 lw x4,0(x17) +80006e08: 01d20863 beq x4,x29,80006e18 +80006e0c: 3b4012ef jal x5,800081c0 +80006e10: 80006e00 .word 0x80006e00 +80006e14: 80017f79 .word 0x80017f79 +80006e18: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0xeeeeeeee +80006e1c: 000d2583 lw x11,0(x26) +80006e20: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xeeeeeeee +80006e24: 000d2503 lw x10,0(x26) +80006e28: 004d0d13 addi x26,x26,4 + +80006e2c : +Zkne_aes32esmi_cg_cp_sbox_b238: + aes32esmi x15, x11, x10, 1 # perform operation +80006e2c: 66a587b3 aes32esmi x15,x11,x10,0x1 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b238, Zkne_aes32esmi_cg_cp_sbox_b238_str) +80006e30: 0008a203 lw x4,0(x17) +80006e34: 00f20863 beq x4,x15,80006e44 +80006e38: 388012ef jal x5,800081c0 +80006e3c: 80006e2c .word 0x80006e2c +80006e40: 80017fb4 .word 0x80017fb4 +80006e44: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0xefefefef +80006e48: 000d2383 lw x7,0(x26) +80006e4c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xefefefef +80006e50: 000d2c83 lw x25,0(x26) +80006e54: 004d0d13 addi x26,x26,4 + +80006e58 : +Zkne_aes32esmi_cg_cp_sbox_b239: + aes32esmi x19, x7, x25, 0 # perform operation +80006e58: 279389b3 aes32esmi x19,x7,x25,0x0 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes32esmi_cg_cp_sbox_b239, Zkne_aes32esmi_cg_cp_sbox_b239_str) +80006e5c: 0008a203 lw x4,0(x17) +80006e60: 01320863 beq x4,x19,80006e70 +80006e64: 35c012ef jal x5,800081c0 +80006e68: 80006e58 .word 0x80006e58 +80006e6c: 80017fef .word 0x80017fef +80006e70: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xf0f0f0f0 +80006e74: 000d2703 lw x14,0(x26) +80006e78: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xf0f0f0f0 +80006e7c: 000d2b03 lw x22,0(x26) +80006e80: 004d0d13 addi x26,x26,4 + +80006e84 : +Zkne_aes32esmi_cg_cp_sbox_b240: + aes32esmi x9, x14, x22, 0 # perform operation +80006e84: 276704b3 aes32esmi x9,x14,x22,0x0 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b240, Zkne_aes32esmi_cg_cp_sbox_b240_str) +80006e88: 0008a203 lw x4,0(x17) +80006e8c: 00920863 beq x4,x9,80006e9c +80006e90: 330012ef jal x5,800081c0 +80006e94: 80006e84 .word 0x80006e84 +80006e98: 8001802a .word 0x8001802a +80006e9c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xf1f1f1f1 +80006ea0: 000d2a83 lw x21,0(x26) +80006ea4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0xf1f1f1f1 +80006ea8: 000d2103 lw x2,0(x26) +80006eac: 004d0d13 addi x26,x26,4 + +80006eb0 : +Zkne_aes32esmi_cg_cp_sbox_b241: + aes32esmi x13, x21, x2, 0 # perform operation +80006eb0: 262a86b3 aes32esmi x13,x21,x2,0x0 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes32esmi_cg_cp_sbox_b241, Zkne_aes32esmi_cg_cp_sbox_b241_str) +80006eb4: 0008a203 lw x4,0(x17) +80006eb8: 00d20863 beq x4,x13,80006ec8 +80006ebc: 304012ef jal x5,800081c0 +80006ec0: 80006eb0 .word 0x80006eb0 +80006ec4: 80018065 .word 0x80018065 +80006ec8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xf2f2f2f2 +80006ecc: 000d2503 lw x10,0(x26) +80006ed0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xf2f2f2f2 +80006ed4: 000d2a03 lw x20,0(x26) +80006ed8: 004d0d13 addi x26,x26,4 + +80006edc : +Zkne_aes32esmi_cg_cp_sbox_b242: + aes32esmi x9, x10, x20, 3 # perform operation +80006edc: e74504b3 aes32esmi x9,x10,x20,0x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b242, Zkne_aes32esmi_cg_cp_sbox_b242_str) +80006ee0: 0008a203 lw x4,0(x17) +80006ee4: 00920863 beq x4,x9,80006ef4 +80006ee8: 2d8012ef jal x5,800081c0 +80006eec: 80006edc .word 0x80006edc +80006ef0: 800180a0 .word 0x800180a0 +80006ef4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xf3f3f3f3 +80006ef8: 000d2b03 lw x22,0(x26) +80006efc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs2: x8 = 0xf3f3f3f3 +80006f00: 000d2403 lw x8,0(x26) +80006f04: 004d0d13 addi x26,x26,4 + +80006f08 : +Zkne_aes32esmi_cg_cp_sbox_b243: + aes32esmi x29, x22, x8, 1 # perform operation +80006f08: 668b0eb3 aes32esmi x29,x22,x8,0x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes32esmi_cg_cp_sbox_b243, Zkne_aes32esmi_cg_cp_sbox_b243_str) +80006f0c: 0008a203 lw x4,0(x17) +80006f10: 01d20863 beq x4,x29,80006f20 +80006f14: 2ac012ef jal x5,800081c0 +80006f18: 80006f08 .word 0x80006f08 +80006f1c: 800180db .word 0x800180db +80006f20: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xf4f4f4f4 +80006f24: 000d2e03 lw x28,0(x26) +80006f28: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0xf4f4f4f4 +80006f2c: 000d2683 lw x13,0(x26) +80006f30: 004d0d13 addi x26,x26,4 + +80006f34 : +Zkne_aes32esmi_cg_cp_sbox_b244: + aes32esmi x22, x28, x13, 0 # perform operation +80006f34: 26de0b33 aes32esmi x22,x28,x13,0x0 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b244, Zkne_aes32esmi_cg_cp_sbox_b244_str) +80006f38: 0008a203 lw x4,0(x17) +80006f3c: 01620863 beq x4,x22,80006f4c +80006f40: 280012ef jal x5,800081c0 +80006f44: 80006f34 .word 0x80006f34 +80006f48: 80018116 .word 0x80018116 +80006f4c: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xf5f5f5f5 +80006f50: 000d2783 lw x15,0(x26) +80006f54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xf5f5f5f5 +80006f58: 000d2f83 lw x31,0(x26) +80006f5c: 004d0d13 addi x26,x26,4 + +80006f60 : +Zkne_aes32esmi_cg_cp_sbox_b245: + aes32esmi x9, x15, x31, 3 # perform operation +80006f60: e7f784b3 aes32esmi x9,x15,x31,0x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zkne_aes32esmi_cg_cp_sbox_b245, Zkne_aes32esmi_cg_cp_sbox_b245_str) +80006f64: 0008a203 lw x4,0(x17) +80006f68: 00920863 beq x4,x9,80006f78 +80006f6c: 254012ef jal x5,800081c0 +80006f70: 80006f60 .word 0x80006f60 +80006f74: 80018151 .word 0x80018151 +80006f78: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xf6f6f6f6 +80006f7c: 000d2783 lw x15,0(x26) +80006f80: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xf6f6f6f6 +80006f84: 000d2f03 lw x30,0(x26) +80006f88: 004d0d13 addi x26,x26,4 + +80006f8c : +Zkne_aes32esmi_cg_cp_sbox_b246: + aes32esmi x28, x15, x30, 0 # perform operation +80006f8c: 27e78e33 aes32esmi x28,x15,x30,0x0 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes32esmi_cg_cp_sbox_b246, Zkne_aes32esmi_cg_cp_sbox_b246_str) +80006f90: 0008a203 lw x4,0(x17) +80006f94: 01c20863 beq x4,x28,80006fa4 +80006f98: 228012ef jal x5,800081c0 +80006f9c: 80006f8c .word 0x80006f8c +80006fa0: 8001818c .word 0x8001818c +80006fa4: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xf7f7f7f7 +80006fa8: 000d2783 lw x15,0(x26) +80006fac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xf7f7f7f7 +80006fb0: 000d2a03 lw x20,0(x26) +80006fb4: 004d0d13 addi x26,x26,4 + +80006fb8 : +Zkne_aes32esmi_cg_cp_sbox_b247: + aes32esmi x31, x15, x20, 1 # perform operation +80006fb8: 67478fb3 aes32esmi x31,x15,x20,0x1 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes32esmi_cg_cp_sbox_b247, Zkne_aes32esmi_cg_cp_sbox_b247_str) +80006fbc: 0008a203 lw x4,0(x17) +80006fc0: 01f20863 beq x4,x31,80006fd0 +80006fc4: 1fc012ef jal x5,800081c0 +80006fc8: 80006fb8 .word 0x80006fb8 +80006fcc: 800181c7 .word 0x800181c7 +80006fd0: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xf8f8f8f8 +80006fd4: 000d2503 lw x10,0(x26) +80006fd8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xf8f8f8f8 +80006fdc: 000d2603 lw x12,0(x26) +80006fe0: 004d0d13 addi x26,x26,4 + +80006fe4 : +Zkne_aes32esmi_cg_cp_sbox_b248: + aes32esmi x24, x10, x12, 0 # perform operation +80006fe4: 26c50c33 aes32esmi x24,x10,x12,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b248, Zkne_aes32esmi_cg_cp_sbox_b248_str) +80006fe8: 0008a203 lw x4,0(x17) +80006fec: 01820863 beq x4,x24,80006ffc +80006ff0: 1d0012ef jal x5,800081c0 +80006ff4: 80006fe4 .word 0x80006fe4 +80006ff8: 80018202 .word 0x80018202 +80006ffc: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0xf9f9f9f9 +80007000: 000d2f03 lw x30,0(x26) +80007004: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xf9f9f9f9 +80007008: 000d2503 lw x10,0(x26) +8000700c: 004d0d13 addi x26,x26,4 + +80007010 : +Zkne_aes32esmi_cg_cp_sbox_b249: + aes32esmi x6, x30, x10, 1 # perform operation +80007010: 66af0333 aes32esmi x6,x30,x10,0x1 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zkne_aes32esmi_cg_cp_sbox_b249, Zkne_aes32esmi_cg_cp_sbox_b249_str) +80007014: 0008a203 lw x4,0(x17) +80007018: 00620863 beq x4,x6,80007028 +8000701c: 1a4012ef jal x5,800081c0 +80007020: 80007010 .word 0x80007010 +80007024: 8001823d .word 0x8001823d +80007028: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xfafafafa +8000702c: 000d2c83 lw x25,0(x26) +80007030: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0xfafafafa +80007034: 000d2803 lw x16,0(x26) +80007038: 004d0d13 addi x26,x26,4 + +8000703c : +Zkne_aes32esmi_cg_cp_sbox_b250: + aes32esmi x24, x25, x16, 0 # perform operation +8000703c: 270c8c33 aes32esmi x24,x25,x16,0x0 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes32esmi_cg_cp_sbox_b250, Zkne_aes32esmi_cg_cp_sbox_b250_str) +80007040: 0008a203 lw x4,0(x17) +80007044: 01820863 beq x4,x24,80007054 +80007048: 178012ef jal x5,800081c0 +8000704c: 8000703c .word 0x8000703c +80007050: 80018278 .word 0x80018278 +80007054: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xfbfbfbfb +80007058: 000d2b83 lw x23,0(x26) +8000705c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xfbfbfbfb +80007060: 000d2e83 lw x29,0(x26) +80007064: 004d0d13 addi x26,x26,4 + +80007068 : +Zkne_aes32esmi_cg_cp_sbox_b251: + aes32esmi x14, x23, x29, 1 # perform operation +80007068: 67db8733 aes32esmi x14,x23,x29,0x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zkne_aes32esmi_cg_cp_sbox_b251, Zkne_aes32esmi_cg_cp_sbox_b251_str) +8000706c: 0008a203 lw x4,0(x17) +80007070: 00e20863 beq x4,x14,80007080 +80007074: 14c012ef jal x5,800081c0 +80007078: 80007068 .word 0x80007068 +8000707c: 800182b3 .word 0x800182b3 +80007080: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xfcfcfcfc +80007084: 000d2c03 lw x24,0(x26) +80007088: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xfcfcfcfc +8000708c: 000d2603 lw x12,0(x26) +80007090: 004d0d13 addi x26,x26,4 + +80007094 : +Zkne_aes32esmi_cg_cp_sbox_b252: + aes32esmi x3, x24, x12, 3 # perform operation +80007094: e6cc01b3 aes32esmi x3,x24,x12,0x3 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes32esmi_cg_cp_sbox_b252, Zkne_aes32esmi_cg_cp_sbox_b252_str) +80007098: 0008a203 lw x4,0(x17) +8000709c: 00320863 beq x4,x3,800070ac +800070a0: 120012ef jal x5,800081c0 +800070a4: 80007094 .word 0x80007094 +800070a8: 800182ee .word 0x800182ee +800070ac: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xfdfdfdfd +800070b0: 000d2b03 lw x22,0(x26) +800070b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xfdfdfdfd +800070b8: 000d2383 lw x7,0(x26) +800070bc: 004d0d13 addi x26,x26,4 + +800070c0 : +Zkne_aes32esmi_cg_cp_sbox_b253: + aes32esmi x15, x22, x7, 3 # perform operation +800070c0: e67b07b3 aes32esmi x15,x22,x7,0x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zkne_aes32esmi_cg_cp_sbox_b253, Zkne_aes32esmi_cg_cp_sbox_b253_str) +800070c4: 0008a203 lw x4,0(x17) +800070c8: 00f20863 beq x4,x15,800070d8 +800070cc: 0f4012ef jal x5,800081c0 +800070d0: 800070c0 .word 0x800070c0 +800070d4: 80018329 .word 0x80018329 +800070d8: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0xfefefefe +800070dc: 000d2e83 lw x29,0(x26) +800070e0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xfefefefe +800070e4: 000d2b83 lw x23,0(x26) +800070e8: 004d0d13 addi x26,x26,4 + +800070ec : +Zkne_aes32esmi_cg_cp_sbox_b254: + aes32esmi x22, x29, x23, 3 # perform operation +800070ec: e77e8b33 aes32esmi x22,x29,x23,0x3 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zkne_aes32esmi_cg_cp_sbox_b254, Zkne_aes32esmi_cg_cp_sbox_b254_str) +800070f0: 0008a203 lw x4,0(x17) +800070f4: 01620863 beq x4,x22,80007104 +800070f8: 0c8012ef jal x5,800081c0 +800070fc: 800070ec .word 0x800070ec +80007100: 80018364 .word 0x80018364 +80007104: 00488893 addi x17,x17,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xffffffff +80007108: 000d2783 lw x15,0(x26) +8000710c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xffffffff +80007110: 000d2983 lw x19,0(x26) +80007114: 004d0d13 addi x26,x26,4 + +80007118 : +Zkne_aes32esmi_cg_cp_sbox_b255: + aes32esmi x18, x15, x19, 1 # perform operation +80007118: 67378933 aes32esmi x18,x15,x19,0x1 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zkne_aes32esmi_cg_cp_sbox_b255, Zkne_aes32esmi_cg_cp_sbox_b255_str) +8000711c: 0008a203 lw x4,0(x17) +80007120: 01220863 beq x4,x18,80007130 +80007124: 09c012ef jal x5,800081c0 +80007128: 80007118 .word 0x80007118 +8000712c: 8001839f .word 0x8001839f +80007130: 00488893 addi x17,x17,4 + + mv x2, x17 # restore signature pointer to default register for teardown +80007134: 00088113 addi x2,x17,0 + +80007138 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80007138: 00000513 addi x10,x0,0 +8000713c: 00000073 ecall +80007140: fff00513 addi x10,x0,-1 +80007144: 1d800413 addi x8,x0,472 + +80007148 : +80007148: 34002373 csrrs x6,mscratch,x0 + +8000714c : +8000714c: 23832383 lw x7,568(x6) +80007150: 23c32483 lw x9,572(x6) + +80007154 : +80007154: 22032383 lw x7,544(x6) + +80007158 : +80007158: 25032483 lw x9,592(x6) +8000715c: 34049073 csrrw x0,mscratch,x9 + +80007160 : +80007160: 24832483 lw x9,584(x6) +80007164: 305493f3 csrrw x7,mtvec,x9 +80007168: ffc4f493 andi x9,x9,-4 +8000716c: ffc3f393 andi x7,x7,-4 +80007170: 00749e63 bne x9,x7,8000718c + +80007174 : +80007174: 00030493 addi x9,x6,0 + +80007178 : +80007178: 0004a783 lw x15,0(x9) +8000717c: 00f3a023 sw x15,0(x7) +80007180: 00438393 addi x7,x7,4 +80007184: 00448493 addi x9,x9,4 +80007188: fe83c8e3 blt x7,x8,80007178 +8000718c: 0000100f fence.i + +80007190 : +80007190: 00000013 addi x0,x0,0 +80007194: 00000013 addi x0,x0,0 +80007198: 00000013 addi x0,x0,0 +8000719c: 00000013 addi x0,x0,0 +800071a0: 00000497 auipc x9,0x0 +800071a4: 29048493 addi x9,x9,656 # 80007430 +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 10e49863 bne x9,x14,800072d0 +800071c4: 00000013 addi x0,x0,0 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 00012517 auipc x10,0x12 +800071e4: 88350513 addi x10,x10,-1917 # 80018a63 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00023097 auipc x1,0x23 +80007204: 364080e7 jalr x1,868(x1) # 8002a564 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00012517 auipc x10,0x12 +80007224: 88150513 addi x10,x10,-1919 # 80018aa1 +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00023097 auipc x1,0x23 +80007244: 324080e7 jalr x1,804(x1) # 8002a564 +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00012517 auipc x10,0x12 +80007264: 8a150513 addi x10,x10,-1887 # 80018b01 +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00023097 auipc x1,0x23 +80007284: 2e4080e7 jalr x1,740(x1) # 8002a564 +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00012517 auipc x10,0x12 +800072a4: 40c50513 addi x10,x10,1036 # 800196ac +800072a8: 00000013 addi x0,x0,0 +800072ac: 00000013 addi x0,x0,0 +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00023097 auipc x1,0x23 +800072c4: 2a4080e7 jalr x1,676(x1) # 8002a564 +800072c8: 00023097 auipc x1,0x23 +800072cc: 2fc080e7 jalr x1,764(x1) # 8002a5c4 + +800072d0 : +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00005317 auipc x6,0x5 +800072e4: 04830313 addi x6,x6,72 # 8000c328 +800072e8: 00000013 addi x0,x0,0 +800072ec: 00000013 addi x0,x0,0 +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00032303 lw x6,0(x6) +80007304: 00000013 addi x0,x0,0 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 00014397 auipc x7,0x14 +80007324: 87838393 addi x7,x7,-1928 # 8001ab98 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 40730333 sub x6,x6,x7 +80007344: 00000013 addi x0,x0,0 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 00014417 auipc x8,0x14 +80007364: 83040413 addi x8,x8,-2000 # 8001ab90 +80007368: 00000013 addi x0,x0,0 +8000736c: 00000013 addi x0,x0,0 +80007370: 00000013 addi x0,x0,0 +80007374: 00000013 addi x0,x0,0 +80007378: 00000013 addi x0,x0,0 +8000737c: 00000013 addi x0,x0,0 +80007380: 00042203 lw x4,0(x8) +80007384: 00620863 beq x4,x6,80007394 +80007388: 6a1003ef jal x7,80008228 +8000738c: 800072d0 .word 0x800072d0 +80007390: 80018c55 .word 0x80018c55 + +80007394 : +80007394: bad0e4b7 lui x9,0xbad0e +80007398: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +8000739c: 00e49a63 bne x9,x14,800073b0 +800073a0: 689003ef jal x7,80008228 +800073a4: 80007464 .word 0x80007464 +800073a8: 80018ac3 .word 0x80018ac3 +800073ac: 00000341 .word 0x00000341 + +800073b0 : +800073b0: 00000013 addi x0,x0,0 +800073b4: 00000013 addi x0,x0,0 +800073b8: 00000013 addi x0,x0,0 +800073bc: 00000013 addi x0,x0,0 +800073c0: 00011517 auipc x10,0x11 +800073c4: 66450513 addi x10,x10,1636 # 80018a24 +800073c8: 00000013 addi x0,x0,0 +800073cc: 00000013 addi x0,x0,0 +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00023097 auipc x1,0x23 +800073e4: 184080e7 jalr x1,388(x1) # 8002a564 +800073e8: 00023097 auipc x1,0x23 +800073ec: 1bc080e7 jalr x1,444(x1) # 8002a5a4 + +800073f0 : +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00011517 auipc x10,0x11 +80007404: 66350513 addi x10,x10,1635 # 80018a63 +80007408: 00000013 addi x0,x0,0 +8000740c: 00000013 addi x0,x0,0 +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00023097 auipc x1,0x23 +80007424: 144080e7 jalr x1,324(x1) # 8002a564 +80007428: 00023097 auipc x1,0x23 +8000742c: 19c080e7 jalr x1,412(x1) # 8002a5c4 + +80007430 : +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: 00000717 auipc x14,0x0 +80007444: ff070713 addi x14,x14,-16 # 80007430 +80007448: 00000013 addi x0,x0,0 +8000744c: 00000013 addi x0,x0,0 +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: cd9ff06f jal x0,80007138 + +80007464 : +80007464: bad0e737 lui x14,0xbad0e +80007468: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000746c: ccdff06f jal x0,80007138 +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 + +80007480 : +80007480: 0800006f jal x0,80007500 +80007484: 0880006f jal x0,8000750c +80007488: 0900006f jal x0,80007518 +8000748c: 0980006f jal x0,80007524 +80007490: 0a00006f jal x0,80007530 +80007494: 0a80006f jal x0,8000753c +80007498: 0b00006f jal x0,80007548 +8000749c: 0b80006f jal x0,80007554 +800074a0: 0c00006f jal x0,80007560 +800074a4: 0c80006f jal x0,8000756c +800074a8: 0d00006f jal x0,80007578 +800074ac: 0d80006f jal x0,80007584 +800074b0: 0e00006f jal x0,80007590 +800074b4: 0e80006f jal x0,8000759c +800074b8: 0f00006f jal x0,800075a8 +800074bc: 0f80006f jal x0,800075b4 +800074c0: 1000006f jal x0,800075c0 +800074c4: 1080006f jal x0,800075cc +800074c8: 1100006f jal x0,800075d8 +800074cc: 1180006f jal x0,800075e4 +800074d0: 1200006f jal x0,800075f0 +800074d4: 1280006f jal x0,800075fc +800074d8: 1300006f jal x0,80007608 +800074dc: 1380006f jal x0,80007614 +800074e0: 1400006f jal x0,80007620 +800074e4: 13c0006f jal x0,80007620 +800074e8: 1380006f jal x0,80007620 +800074ec: 1340006f jal x0,80007620 +800074f0: 1300006f jal x0,80007620 +800074f4: 12c0006f jal x0,80007620 +800074f8: 1280006f jal x0,80007620 +800074fc: 1240006f jal x0,80007620 + +80007500 : +80007500: 34011173 csrrw x2,mscratch,x2 +80007504: 26f12823 sw x15,624(x2) +80007508: 13c007ef jal x15,80007644 +8000750c: 34011173 csrrw x2,mscratch,x2 +80007510: 26f12823 sw x15,624(x2) +80007514: 130007ef jal x15,80007644 +80007518: 34011173 csrrw x2,mscratch,x2 +8000751c: 26f12823 sw x15,624(x2) +80007520: 124007ef jal x15,80007644 +80007524: 34011173 csrrw x2,mscratch,x2 +80007528: 26f12823 sw x15,624(x2) +8000752c: 118007ef jal x15,80007644 +80007530: 34011173 csrrw x2,mscratch,x2 +80007534: 26f12823 sw x15,624(x2) +80007538: 10c007ef jal x15,80007644 +8000753c: 34011173 csrrw x2,mscratch,x2 +80007540: 26f12823 sw x15,624(x2) +80007544: 100007ef jal x15,80007644 +80007548: 34011173 csrrw x2,mscratch,x2 +8000754c: 26f12823 sw x15,624(x2) +80007550: 0f4007ef jal x15,80007644 +80007554: 34011173 csrrw x2,mscratch,x2 +80007558: 26f12823 sw x15,624(x2) +8000755c: 0e8007ef jal x15,80007644 +80007560: 34011173 csrrw x2,mscratch,x2 +80007564: 26f12823 sw x15,624(x2) +80007568: 0dc007ef jal x15,80007644 +8000756c: 34011173 csrrw x2,mscratch,x2 +80007570: 26f12823 sw x15,624(x2) +80007574: 0d0007ef jal x15,80007644 +80007578: 34011173 csrrw x2,mscratch,x2 +8000757c: 26f12823 sw x15,624(x2) +80007580: 0c4007ef jal x15,80007644 +80007584: 34011173 csrrw x2,mscratch,x2 +80007588: 26f12823 sw x15,624(x2) +8000758c: 0b8007ef jal x15,80007644 +80007590: 34011173 csrrw x2,mscratch,x2 +80007594: 26f12823 sw x15,624(x2) +80007598: 0ac007ef jal x15,80007644 +8000759c: 34011173 csrrw x2,mscratch,x2 +800075a0: 26f12823 sw x15,624(x2) +800075a4: 0a0007ef jal x15,80007644 +800075a8: 34011173 csrrw x2,mscratch,x2 +800075ac: 26f12823 sw x15,624(x2) +800075b0: 094007ef jal x15,80007644 +800075b4: 34011173 csrrw x2,mscratch,x2 +800075b8: 26f12823 sw x15,624(x2) +800075bc: 088007ef jal x15,80007644 +800075c0: 34011173 csrrw x2,mscratch,x2 +800075c4: 26f12823 sw x15,624(x2) +800075c8: 07c007ef jal x15,80007644 +800075cc: 34011173 csrrw x2,mscratch,x2 +800075d0: 26f12823 sw x15,624(x2) +800075d4: 070007ef jal x15,80007644 +800075d8: 34011173 csrrw x2,mscratch,x2 +800075dc: 26f12823 sw x15,624(x2) +800075e0: 064007ef jal x15,80007644 +800075e4: 34011173 csrrw x2,mscratch,x2 +800075e8: 26f12823 sw x15,624(x2) +800075ec: 058007ef jal x15,80007644 +800075f0: 34011173 csrrw x2,mscratch,x2 +800075f4: 26f12823 sw x15,624(x2) +800075f8: 04c007ef jal x15,80007644 +800075fc: 34011173 csrrw x2,mscratch,x2 +80007600: 26f12823 sw x15,624(x2) +80007604: 040007ef jal x15,80007644 +80007608: 34011173 csrrw x2,mscratch,x2 +8000760c: 26f12823 sw x15,624(x2) +80007610: 034007ef jal x15,80007644 +80007614: 34011173 csrrw x2,mscratch,x2 +80007618: 26f12823 sw x15,624(x2) +8000761c: 028007ef jal x15,80007644 + +80007620 : +80007620: 00000317 auipc x6,0x0 +80007624: b7030313 addi x6,x6,-1168 # 80007190 +80007628: 00000013 addi x0,x0,0 +8000762c: 00000013 addi x0,x0,0 +80007630: 00000013 addi x0,x0,0 +80007634: 00000013 addi x0,x0,0 +80007638: 00000013 addi x0,x0,0 +8000763c: 00000013 addi x0,x0,0 +80007640: 00030067 jalr x0,0(x6) + +80007644 : +80007644: 26e12623 sw x14,620(x2) +80007648: 34011773 csrrw x14,mscratch,x2 +8000764c: 26e12a23 sw x14,628(x2) +80007650: 23012703 lw x14,560(x2) +80007654: 00070067 jalr x0,0(x14) + +80007658 : +80007658: 26912423 sw x9,616(x2) +8000765c: 26812223 sw x8,612(x2) +80007660: 26712023 sw x7,608(x2) +80007664: 24612e23 sw x6,604(x2) +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00005317 auipc x6,0x5 +80007684: a8830313 addi x6,x6,-1400 # 8000c108 +80007688: 00000013 addi x0,x0,0 +8000768c: 00000013 addi x0,x0,0 +80007690: 00000013 addi x0,x0,0 +80007694: 00000013 addi x0,x0,0 +80007698: 00000013 addi x0,x0,0 +8000769c: 00000013 addi x0,x0,0 +800076a0: 00032383 lw x7,0(x6) +800076a4: 00138393 addi x7,x7,1 +800076a8: 00732023 sw x7,0(x6) +800076ac: 34202773 csrrs x14,mcause,x0 + +800076b0 : +800076b0: 800014b7 lui x9,0x80001 +800076b4: fff48493 addi x9,x9,-1 # 80000fff +800076b8: 00e4f4b3 and x9,x9,x14 + +800076bc : +800076bc: ffe48413 addi x8,x9,-2 +800076c0: 00041663 bne x8,x0,800076cc + +800076c4 : +800076c4: 280506e3 beq x10,x0,80008150 +800076c8: 58c0006f jal x0,80007c54 + +800076cc : +800076cc: ff848413 addi x8,x9,-8 +800076d0: 00245413 srli x8,x8,0x2 +800076d4: 58041063 bne x8,x0,80007c54 + +800076d8 : +800076d8: 26050ce3 beq x10,x0,80008150 + +800076dc : +800076dc: fff50493 addi x9,x10,-1 +800076e0: 00500393 addi x7,x0,5 +800076e4: 0274e063 bltu x9,x7,80007704 +800076e8: 07300393 addi x7,x0,115 +800076ec: 00750463 beq x10,x7,800076f4 +800076f0: 0800006f jal x0,80007770 + +800076f4 : +800076f4: 34102573 csrrs x10,mepc,x0 +800076f8: 00450413 addi x8,x10,4 +800076fc: 34141073 csrrw x0,mepc,x8 +80007700: 7c00006f jal x0,80007ec0 + +80007704 : +80007704: 341024f3 csrrs x9,mepc,x0 +80007708: 00448493 addi x9,x9,4 +8000770c: 34149073 csrrw x0,mepc,x9 +80007710: 00100393 addi x7,x0,1 +80007714: 00750e63 beq x10,x7,80007730 +80007718: 00200393 addi x7,x0,2 +8000771c: 02750263 beq x10,x7,80007740 +80007720: 00300393 addi x7,x0,3 +80007724: 02750c63 beq x10,x7,8000775c +80007728: fff00513 addi x10,x0,-1 +8000772c: 7940006f jal x0,80007ec0 + +80007730 : +80007730: 000024b7 lui x9,0x2 +80007734: 80048493 addi x9,x9,-2048 # 1800 +80007738: 3004a073 csrrs x0,mstatus,x9 +8000773c: 7840006f jal x0,80007ec0 + +80007740 : +80007740: 000024b7 lui x9,0x2 +80007744: 80048493 addi x9,x9,-2048 # 1800 +80007748: 3004b073 csrrc x0,mstatus,x9 +8000774c: 000014b7 lui x9,0x1 +80007750: 80048493 addi x9,x9,-2048 # 800 +80007754: 3004a073 csrrs x0,mstatus,x9 +80007758: 7680006f jal x0,80007ec0 + +8000775c : +8000775c: 000024b7 lui x9,0x2 +80007760: 80048493 addi x9,x9,-2048 # 1800 +80007764: 3004b073 csrrc x0,mstatus,x9 +80007768: 7580006f jal x0,80007ec0 + +8000776c : +8000776c: 00000013 addi x0,x0,0 + +80007770 : +80007770: 00000013 addi x0,x0,0 +80007774: 00000013 addi x0,x0,0 +80007778: 00000013 addi x0,x0,0 +8000777c: 00000013 addi x0,x0,0 +80007780: 00000397 auipc x7,0x0 +80007784: 17038393 addi x7,x7,368 # 800078f0 +80007788: 00000013 addi x0,x0,0 +8000778c: 00000013 addi x0,x0,0 +80007790: 00000013 addi x0,x0,0 +80007794: 00000013 addi x0,x0,0 +80007798: 00000013 addi x0,x0,0 +8000779c: 00000013 addi x0,x0,0 + +800077a0 : +800077a0: 0003a403 lw x8,0(x7) +800077a4: 00a40863 beq x8,x10,800077b4 +800077a8: 04040863 beq x8,x0,800077f8 +800077ac: 00838393 addi x7,x7,8 +800077b0: ff1ff06f jal x0,800077a0 + +800077b4 : +800077b4: 00008493 addi x9,x1,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000097 auipc x1,0x0 +800077c4: 02408093 addi x1,x1,36 # 800077e4 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 +800077e0: 00038067 jalr x0,0(x7) + +800077e4 : +800077e4: 00048093 addi x1,x9,0 +800077e8: 34102473 csrrs x8,mepc,x0 +800077ec: 00440413 addi x8,x8,4 +800077f0: 34141073 csrrw x0,mepc,x8 +800077f4: 6cc0006f jal x0,80007ec0 + +800077f8 : +800077f8: 00050493 addi x9,x10,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00013517 auipc x10,0x13 +80007804: 8e350513 addi x10,x10,-1821 # 8001a0e3 +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00023097 auipc x1,0x23 +80007824: d44080e7 jalr x1,-700(x1) # 8002a564 +80007828: 00048513 addi x10,x9,0 +8000782c: 02000593 addi x11,x0,32 +80007830: 4a8020ef jal x1,80009cd8 +80007834: 00000013 addi x0,x0,0 +80007838: 00000013 addi x0,x0,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00011517 auipc x10,0x11 +80007844: d0850513 addi x10,x10,-760 # 80018548 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00000013 addi x0,x0,0 +8000786c: 00000013 addi x0,x0,0 +80007870: 00000013 addi x0,x0,0 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: 2ea50513 addi x10,x10,746 # 80018b6a +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: 1a350513 addi x10,x10,419 # 80018a63 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00023097 auipc x1,0x23 +800078ec: cdc080e7 jalr x1,-804(x1) # 8002a5c4 + +800078f0 : +800078f0: 30002573 .word 0x30002573 +800078f4: 00008067 jalr x0,0(x1) +800078f8: 30059073 .word 0x30059073 +800078fc: 00008067 jalr x0,0(x1) +80007900: 3005a073 .word 0x3005a073 +80007904: 00008067 jalr x0,0(x1) +80007908: 3005b073 .word 0x3005b073 +8000790c: 00008067 jalr x0,0(x1) +80007910: 30402573 .word 0x30402573 +80007914: 00008067 jalr x0,0(x1) +80007918: 30459073 .word 0x30459073 +8000791c: 00008067 jalr x0,0(x1) +80007920: 3045a073 .word 0x3045a073 +80007924: 00008067 jalr x0,0(x1) +80007928: 3045b073 .word 0x3045b073 +8000792c: 00008067 jalr x0,0(x1) +80007930: 30602573 .word 0x30602573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30659073 .word 0x30659073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3065a073 .word 0x3065a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3065b073 .word 0x3065b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30a02573 .word 0x30a02573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30a59073 .word 0x30a59073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 30a5a073 .word 0x30a5a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 30a5b073 .word 0x30a5b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 34402573 .word 0x34402573 +80007974: 00008067 jalr x0,0(x1) +80007978: 34459073 .word 0x34459073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3445a073 .word 0x3445a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3445b073 .word 0x3445b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 74702573 .word 0x74702573 +80007994: 00008067 jalr x0,0(x1) +80007998: 74759073 .word 0x74759073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 7475a073 .word 0x7475a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 7475b073 .word 0x7475b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 32002573 .word 0x32002573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 32059073 .word 0x32059073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3205a073 .word 0x3205a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3205b073 .word 0x3205b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: b0002573 .word 0xb0002573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: b0059073 .word 0xb0059073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: b005a073 .word 0xb005a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: b005b073 .word 0xb005b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: b0202573 .word 0xb0202573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: b0259073 .word 0xb0259073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: b025a073 .word 0xb025a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: b025b073 .word 0xb025b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: 10002573 .word 0x10002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: 10059073 .word 0x10059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: 1005a073 .word 0x1005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: 1005b073 .word 0x1005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: 10402573 .word 0x10402573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: 10459073 .word 0x10459073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: 1045a073 .word 0x1045a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: 1045b073 .word 0x1045b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10602573 .word 0x10602573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10659073 .word 0x10659073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1065a073 .word 0x1065a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1065b073 .word 0x1065b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10a02573 .word 0x10a02573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10a59073 .word 0x10a59073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 10a5a073 .word 0x10a5a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 10a5b073 .word 0x10a5b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 14402573 .word 0x14402573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 14459073 .word 0x14459073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1445a073 .word 0x1445a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1445b073 .word 0x1445b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 14d02573 .word 0x14d02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 14d59073 .word 0x14d59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 14d5a073 .word 0x14d5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 14d5b073 .word 0x14d5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 18002573 .word 0x18002573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 18059073 .word 0x18059073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1805a073 .word 0x1805a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1805b073 .word 0x1805b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 7a002573 .word 0x7a002573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 7a059073 .word 0x7a059073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 7a05a073 .word 0x7a05a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 7a05b073 .word 0x7a05b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 7a102573 .word 0x7a102573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 7a159073 .word 0x7a159073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 7a15a073 .word 0x7a15a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 7a15b073 .word 0x7a15b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a202573 .word 0x7a202573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a259073 .word 0x7a259073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a25a073 .word 0x7a25a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a25b073 .word 0x7a25b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a302573 .word 0x7a302573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a359073 .word 0x7a359073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a35a073 .word 0x7a35a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a35b073 .word 0x7a35b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a402573 .word 0x7a402573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a459073 .word 0x7a459073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a45a073 .word 0x7a45a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a45b073 .word 0x7a45b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a502573 .word 0x7a502573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a559073 .word 0x7a559073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a55a073 .word 0x7a55a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a55b073 .word 0x7a55b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a802573 .word 0x7a802573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a859073 .word 0x7a859073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a85a073 .word 0x7a85a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a85b073 .word 0x7a85b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7aa02573 .word 0x7aa02573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7aa59073 .word 0x7aa59073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7aa5a073 .word 0x7aa5a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7aa5b073 .word 0x7aa5b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 5a802573 .word 0x5a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 5a859073 .word 0x5a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 5a85a073 .word 0x5a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 5a85b073 .word 0x5a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 6a802573 .word 0x6a802573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 6a859073 .word 0x6a859073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 6a85a073 .word 0x6a85a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 6a85b073 .word 0x6a85b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 0005a503 lw x10,0(x11) +80007c34: 00008067 jalr x0,0(x1) +80007c38: 0045a503 lw x10,4(x11) +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 00c5a023 sw x12,0(x11) +80007c44: 00008067 jalr x0,0(x1) +80007c48: 00c5a223 sw x12,4(x11) +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 00000000 .word 0x00000000 + +80007c54 : +80007c54: 01000393 addi x7,x0,16 +80007c58: 00075c63 bge x14,x0,80007c70 + +80007c5c : +80007c5c: 00171413 slli x8,x14,0x1 +80007c60: ff240413 addi x8,x8,-14 +80007c64: 00045663 bge x8,x0,80007c70 +80007c68: 00c00393 addi x7,x0,12 +80007c6c: 0040006f jal x0,80007c70 + +80007c70 : +80007c70: d6810113 addi x2,x2,-664 +80007c74: 4b012303 lw x6,1200(x2) +80007c78: 007304b3 add x9,x6,x7 +80007c7c: 4a912823 sw x9,1200(x2) +80007c80: 49012403 lw x8,1168(x2) +80007c84: 40830333 sub x6,x6,x8 +80007c88: 29810113 addi x2,x2,664 +80007c8c: 1f812403 lw x8,504(x2) +80007c90: 00830333 add x6,x6,x8 +80007c94: 34102473 csrrs x8,mepc,x0 +80007c98: 00000013 addi x0,x0,0 +80007c9c: 00000013 addi x0,x0,0 +80007ca0: 00011497 auipc x9,0x11 +80007ca4: 88848493 addi x9,x9,-1912 # 80018528 +80007ca8: 00000013 addi x0,x0,0 +80007cac: 00000013 addi x0,x0,0 +80007cb0: 00000013 addi x0,x0,0 +80007cb4: 00000013 addi x0,x0,0 +80007cb8: 00000013 addi x0,x0,0 +80007cbc: 00000013 addi x0,x0,0 +80007cc0: 0084a023 sw x8,0(x9) +80007cc4: 00e4a423 sw x14,8(x9) +80007cc8: 34302473 csrrs x8,mtval,x0 +80007ccc: 0084a823 sw x8,16(x9) +80007cd0: 30002473 csrrs x8,mstatus,x0 +80007cd4: 0084ac23 sw x8,24(x9) +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00022417 auipc x8,0x22 +80007ce4: 91c40413 addi x8,x8,-1764 # 800295fc +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 007304b3 add x9,x6,x7 +80007d04: f2946663 bltu x8,x9,80007430 + +80007d08 : +80007d08: 24012403 lw x8,576(x2) +80007d0c: 408787b3 sub x15,x15,x8 +80007d10: 00179493 slli x9,x15,0x1 +80007d14: 009787b3 add x15,x15,x9 +80007d18: 0057d793 srli x15,x15,0x5 +80007d1c: 00679793 slli x15,x15,0x6 +80007d20: 0077e7b3 or x15,x15,x7 +80007d24: 00378793 addi x15,x15,3 +80007d28: 02075a63 bge x14,x0,80007d5c +80007d2c: 00f00413 addi x8,x0,15 +80007d30: 00877433 and x8,x14,x8 +80007d34: 304024f3 csrrs x9,mie,x0 +80007d38: 0084d4b3 srl x9,x9,x8 +80007d3c: 0014f493 andi x9,x9,1 +80007d40: 00b49493 slli x9,x9,0xb +80007d44: 0097e7b3 or x15,x15,x9 +80007d48: 344024f3 csrrs x9,mip,x0 +80007d4c: 0084d4b3 srl x9,x9,x8 +80007d50: 0014f493 andi x9,x9,1 +80007d54: 00c49493 slli x9,x9,0xc +80007d58: 0097e7b3 or x15,x15,x9 +80007d5c: 300023f3 csrrs x7,mstatus,x0 +80007d60: 00f39393 slli x7,x7,0xf +80007d64: 0023d393 srli x7,x7,0x2 +80007d68: 0021a437 lui x8,0x21a +80007d6c: fe540413 addi x8,x8,-27 # 219fe5 +80007d70: fff44413 xori x8,x8,-1 +80007d74: 0083f433 and x8,x7,x8 +80007d78: 0087e433 or x8,x15,x8 +80007d7c: 310024f3 csrrs x9,0x310,x0 +80007d80: 1c04f493 andi x9,x9,448 +80007d84: 00849493 slli x9,x9,0x8 +80007d88: 00946433 or x8,x8,x9 +80007d8c: 00032483 lw x9,0(x6) +80007d90: 00848e63 beq x9,x8,80007dac +80007d94: 00040313 addi x6,x8,0 +80007d98: 00048213 addi x4,x9,0 +80007d9c: 48c003ef jal x7,80008228 +80007da0: 80007d08 .word 0x80007d08 +80007da4: 80018c6c .word 0x80018c6c +80007da8: 00000341 .word 0x00000341 + +80007dac : +80007dac: 00070413 addi x8,x14,0 +80007db0: 00432483 lw x9,4(x6) +80007db4: 00848e63 beq x9,x8,80007dd0 +80007db8: 00040313 addi x6,x8,0 +80007dbc: 00048213 addi x4,x9,0 +80007dc0: 468003ef jal x7,80008228 +80007dc4: 80007dac .word 0x80007dac +80007dc8: 80018d6e .word 0x80018d6e +80007dcc: 00000341 .word 0x00000341 +80007dd0: 10074863 blt x14,x0,80007ee0 + +80007dd4 : +80007dd4: 34102473 csrrs x8,mepc,x0 +80007dd8: 00010493 addi x9,x2,0 +80007ddc: 0040006f jal x0,80007de0 + +80007de0 : +80007de0: 08000393 addi x7,x0,128 +80007de4: 04740863 beq x8,x7,80007e34 +80007de8: 00238393 addi x7,x7,2 +80007dec: 04740463 beq x8,x7,80007e34 +80007df0: 04040263 beq x8,x0,80007e34 +80007df4: 2084a383 lw x7,520(x9) +80007df8: 2104a783 lw x15,528(x9) +80007dfc: 007787b3 add x15,x15,x7 +80007e00: 00f47463 bgeu x8,x15,80007e08 +80007e04: 02747663 bgeu x8,x7,80007e30 + +80007e08 : +80007e08: 1d84a383 lw x7,472(x9) +80007e0c: 1e04a783 lw x15,480(x9) +80007e10: 007787b3 add x15,x15,x7 +80007e14: 00f47463 bgeu x8,x15,80007e1c +80007e18: 00747c63 bgeu x8,x7,80007e30 + +80007e1c : +80007e1c: 1e84a383 lw x7,488(x9) +80007e20: 1f04a783 lw x15,496(x9) +80007e24: 007787b3 add x15,x15,x7 +80007e28: e2f47e63 bgeu x8,x15,80007464 +80007e2c: e2746c63 bltu x8,x7,80007464 + +80007e30 : +80007e30: 40740433 sub x8,x8,x7 + +80007e34 : +80007e34: 00832483 lw x9,8(x6) +80007e38: 00848e63 beq x9,x8,80007e54 +80007e3c: 00040313 addi x6,x8,0 +80007e40: 00048213 addi x4,x9,0 +80007e44: 3e4003ef jal x7,80008228 +80007e48: 80007e34 .word 0x80007e34 +80007e4c: 80018e69 .word 0x80018e69 +80007e50: 00000341 .word 0x00000341 + +80007e54 : +80007e54: 34102473 csrrs x8,mepc,x0 +80007e58: 342023f3 csrrs x7,mcause,x0 +80007e5c: 00c00793 addi x15,x0,12 +80007e60: 00f38a63 beq x7,x15,80007e74 +80007e64: 00100793 addi x15,x0,1 +80007e68: 00f38663 beq x7,x15,80007e74 +80007e6c: 01400793 addi x15,x0,20 +80007e70: 00f39663 bne x7,x15,80007e7c +80007e74: 34109073 csrrw x0,mepc,x1 +80007e78: 0100006f jal x0,80007e88 + +80007e7c : +80007e7c: 00400393 addi x7,x0,4 +80007e80: 00740433 add x8,x8,x7 +80007e84: 34141073 csrrw x0,mepc,x8 + +80007e88 : +80007e88: 34302473 csrrs x8,mtval,x0 + +80007e8c : +80007e8c: 00c32483 lw x9,12(x6) +80007e90: 00848e63 beq x9,x8,80007eac +80007e94: 00040313 addi x6,x8,0 +80007e98: 00048213 addi x4,x9,0 +80007e9c: 38c003ef jal x7,80008228 +80007ea0: 80007e8c .word 0x80007e8c +80007ea4: 80018f5c .word 0x80018f5c +80007ea8: 00000341 .word 0x00000341 + +80007eac : +80007eac: 30102473 csrrs x8,misa,x0 +80007eb0: 01841413 slli x8,x8,0x18 +80007eb4: 00045263 bge x8,x0,80007eb8 + +80007eb8 : +80007eb8: 10000393 addi x7,x0,256 +80007ebc: 05c0006f jal x0,80007f18 + +80007ec0 : +80007ec0: 25c12303 lw x6,604(x2) +80007ec4: 26012383 lw x7,608(x2) +80007ec8: 26412403 lw x8,612(x2) +80007ecc: 26812483 lw x9,616(x2) +80007ed0: 26c12703 lw x14,620(x2) +80007ed4: 27012783 lw x15,624(x2) +80007ed8: 27412103 lw x2,628(x2) +80007edc: 30200073 mret + +80007ee0 : +80007ee0: 00100413 addi x8,x0,1 +80007ee4: 01f77393 andi x7,x14,31 +80007ee8: 00741433 sll x8,x8,x7 +80007eec: 304434f3 csrrc x9,mie,x8 +80007ef0: 34443473 csrrc x8,mip,x8 + +80007ef4 : +80007ef4: 00832483 lw x9,8(x6) +80007ef8: 00848e63 beq x9,x8,80007f14 +80007efc: 00040313 addi x6,x8,0 +80007f00: 00048213 addi x4,x9,0 +80007f04: 324003ef jal x7,80008228 +80007f08: 80007ef4 .word 0x80007ef4 +80007f0c: 800190cf .word 0x800190cf +80007f10: 00000341 .word 0x00000341 +80007f14: 00000393 addi x7,x0,0 + +80007f18 : +80007f18: 00000417 auipc x8,0x0 +80007f1c: 03c40413 addi x8,x8,60 # 80007f54 +80007f20: 00740433 add x8,x8,x7 +80007f24: 00371393 slli x7,x14,0x3 +80007f28: 00740433 add x8,x8,x7 +80007f2c: ff847413 andi x8,x8,-8 +80007f30: 00042403 lw x8,0(x8) + +80007f34 : +80007f34: 00040a63 beq x8,x0,80007f48 +80007f38: 01f41393 slli x7,x8,0x1f +80007f3c: 0003d863 bge x7,x0,80007f4c +80007f40: 00145413 srli x8,x8,0x1 +80007f44: f6870ee3 beq x14,x8,80007ec0 +80007f48: d1cff06f jal x0,80007464 + +80007f4c : +80007f4c: 00040067 jalr x0,0(x8) + +80007f50 : + ... +80007f58: 00000001 .word 0x00000001 +80007f5c: 00000000 .word 0x00000000 +80007f60: 00000001 .word 0x00000001 +80007f64: 00000000 .word 0x00000000 +80007f68: 8002a000 .word 0x8002a000 + ... +80007f78: 00000001 .word 0x00000001 +80007f7c: 00000000 .word 0x00000000 +80007f80: 00000001 .word 0x00000001 +80007f84: 00000000 .word 0x00000000 +80007f88: 8002a014 .word 0x8002a014 + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a030 .word 0x8002a030 +80007fac: 00000000 .word 0x00000000 +80007fb0: 00000001 .word 0x00000001 +80007fb4: 00000000 .word 0x00000000 +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 00000001 .word 0x00000001 +80007fcc: 00000000 .word 0x00000000 +80007fd0: 00000001 .word 0x00000001 +80007fd4: 00000000 .word 0x00000000 +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 00000001 .word 0x00000001 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 + ... + +80008050 : +80008050: 00000001 .word 0x00000001 +80008054: 00000000 .word 0x00000000 +80008058: 00000003 .word 0x00000003 +8000805c: 00000000 .word 0x00000000 +80008060: 00000005 .word 0x00000005 +80008064: 00000000 .word 0x00000000 +80008068: 00000007 .word 0x00000007 +8000806c: 00000000 .word 0x00000000 +80008070: 00000009 .word 0x00000009 +80008074: 00000000 .word 0x00000000 +80008078: 0000000b .word 0x0000000b +8000807c: 00000000 .word 0x00000000 +80008080: 0000000d .word 0x0000000d +80008084: 00000000 .word 0x00000000 +80008088: 0000000f .word 0x0000000f +8000808c: 00000000 .word 0x00000000 +80008090: 00000011 .word 0x00000011 +80008094: 00000000 .word 0x00000000 +80008098: 00000013 .word 0x00000013 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000015 .word 0x00000015 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000017 .word 0x00000017 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000019 .word 0x00000019 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000001b .word 0x0000001b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000001d .word 0x0000001d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000001f .word 0x0000001f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000021 .word 0x00000021 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000023 .word 0x00000023 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000025 .word 0x00000025 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000027 .word 0x00000027 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000029 .word 0x00000029 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000002b .word 0x0000002b +800080fc: 00000000 .word 0x00000000 +80008100: 0000002d .word 0x0000002d +80008104: 00000000 .word 0x00000000 +80008108: 0000002f .word 0x0000002f + ... + +80008150 : +80008150: 300023f3 csrrs x7,mstatus,x0 +80008154: 00b3d493 srli x9,x7,0xb +80008158: 0034f493 andi x9,x9,3 +8000815c: ffd48413 addi x8,x9,-3 +80008160: 341023f3 csrrs x7,mepc,x0 +80008164: 00000493 addi x9,x0,0 +80008168: 02040c63 beq x8,x0,800081a0 +8000816c: 29810113 addi x2,x2,664 +80008170: 310023f3 csrrs x7,0x310,x0 +80008174: 01839393 slli x7,x7,0x18 +80008178: 0003da63 bge x7,x0,8000818c + +8000817c : +8000817c: 29810113 addi x2,x2,664 +80008180: 47012783 lw x15,1136(x2) +80008184: d6810113 addi x2,x2,-664 +80008188: 0080006f jal x0,80008190 + +8000818c : +8000818c: f4012783 lw x15,-192(x2) +80008190: 341023f3 csrrs x7,mepc,x0 +80008194: 40f383b3 sub x7,x7,x15 +80008198: d6810113 addi x2,x2,-664 +8000819c: 1d812483 lw x9,472(x2) + +800081a0 : +800081a0: 007483b3 add x7,x9,x7 +800081a4: 25c12303 lw x6,604(x2) +800081a8: 26412403 lw x8,612(x2) +800081ac: 26812483 lw x9,616(x2) +800081b0: 26c12703 lw x14,620(x2) +800081b4: 27012783 lw x15,624(x2) +800081b8: 27412103 lw x2,628(x2) +800081bc: 00438067 jalr x0,4(x7) + +800081c0 : +800081c0: 00010217 auipc x4,0x10 +800081c4: 22020213 addi x4,x4,544 # 800183e0 +800081c8: 02522423 sw x5,40(x4) # 28 +800081cc: 00122423 sw x1,8(x4) # 8 +800081d0: 00022023 sw x0,0(x4) # 0 +800081d4: 0880006f jal x0,8000825c + +800081d8 : +800081d8: 00010397 auipc x7,0x10 +800081dc: 20838393 addi x7,x7,520 # 800183e0 +800081e0: 0483a023 sw x8,64(x7) +800081e4: 0243a023 sw x4,32(x7) +800081e8: 0253a423 sw x5,40(x7) +800081ec: 0013a423 sw x1,8(x7) +800081f0: 0003a023 sw x0,0(x7) +800081f4: 00038213 addi x4,x7,0 +800081f8: 00040293 addi x5,x8,0 +800081fc: 0600006f jal x0,8000825c + +80008200 : +80008200: 00010697 auipc x13,0x10 +80008204: 1e068693 addi x13,x13,480 # 800183e0 +80008208: 06e6a823 sw x14,112(x13) +8000820c: 0246a023 sw x4,32(x13) +80008210: 0256a423 sw x5,40(x13) +80008214: 0016a423 sw x1,8(x13) +80008218: 0006a023 sw x0,0(x13) +8000821c: 00068213 addi x4,x13,0 +80008220: 00070293 addi x5,x14,0 +80008224: 0380006f jal x0,8000825c + +80008228 : +80008228: 00010497 auipc x9,0x10 +8000822c: 1b848493 addi x9,x9,440 # 800183e0 +80008230: 0674a423 sw x7,104(x9) +80008234: 0244a023 sw x4,32(x9) +80008238: 0254a423 sw x5,40(x9) +8000823c: 0014a423 sw x1,8(x9) +80008240: 00300093 addi x1,x0,3 +80008244: 0014a023 sw x1,0(x9) +80008248: 1064a823 sw x6,272(x9) +8000824c: 1044ac23 sw x4,280(x9) +80008250: 00048213 addi x4,x9,0 +80008254: 00038293 addi x5,x7,0 +80008258: 0040006f jal x0,8000825c + +8000825c : +8000825c: 00222823 sw x2,16(x4) # 10 +80008260: 00322c23 sw x3,24(x4) # 18 +80008264: 02622823 sw x6,48(x4) # 30 +80008268: 02722c23 sw x7,56(x4) # 38 +8000826c: 04822023 sw x8,64(x4) # 40 +80008270: 04922423 sw x9,72(x4) # 48 +80008274: 04a22823 sw x10,80(x4) # 50 +80008278: 04b22c23 sw x11,88(x4) # 58 +8000827c: 06c22023 sw x12,96(x4) # 60 +80008280: 06d22423 sw x13,104(x4) # 68 +80008284: 06e22823 sw x14,112(x4) # 70 +80008288: 06f22c23 sw x15,120(x4) # 78 +8000828c: 09022023 sw x16,128(x4) # 80 +80008290: 09122423 sw x17,136(x4) # 88 +80008294: 09222823 sw x18,144(x4) # 90 +80008298: 09322c23 sw x19,152(x4) # 98 +8000829c: 0b422023 sw x20,160(x4) # a0 +800082a0: 0b522423 sw x21,168(x4) # a8 +800082a4: 0b622823 sw x22,176(x4) # b0 +800082a8: 0b722c23 sw x23,184(x4) # b8 +800082ac: 0d822023 sw x24,192(x4) # c0 +800082b0: 0d922423 sw x25,200(x4) # c8 +800082b4: 0da22823 sw x26,208(x4) # d0 +800082b8: 0db22c23 sw x27,216(x4) # d8 +800082bc: 0fc22023 sw x28,224(x4) # e0 +800082c0: 0fd22423 sw x29,232(x4) # e8 +800082c4: 0fe22823 sw x30,240(x4) # f0 +800082c8: 0ff22c23 sw x31,248(x4) # f8 + +800082cc : +800082cc: 00010497 auipc x9,0x10 +800082d0: 1144a483 lw x9,276(x9) # 800183e0 +800082d4: 00300513 addi x10,x0,3 +800082d8: 18a48a63 beq x9,x10,8000846c + +800082dc : +800082dc: ffa2d303 lhu x6,-6(x5) +800082e0: ff82d383 lhu x7,-8(x5) +800082e4: 01031313 slli x6,x6,0x10 +800082e8: 00736333 or x6,x6,x7 +800082ec: 00f35393 srli x7,x6,0xf +800082f0: 01f3f393 andi x7,x7,31 +800082f4: 01435413 srli x8,x6,0x14 +800082f8: 01f47413 andi x8,x8,31 +800082fc: 10822223 sw x8,260(x4) # 104 +80008300: 00341313 slli x6,x8,0x3 +80008304: 00620333 add x6,x4,x6 +80008308: 00032303 lw x6,0(x6) +8000830c: 10622823 sw x6,272(x4) # 110 +80008310: ff62d303 lhu x6,-10(x5) +80008314: ff42d383 lhu x7,-12(x5) +80008318: 01031313 slli x6,x6,0x10 +8000831c: 00736333 or x6,x6,x7 +80008320: 00030513 addi x10,x6,0 +80008324: 07f37413 andi x8,x6,127 +80008328: 00300493 addi x9,x0,3 +8000832c: 0c941463 bne x8,x9,800083f4 +80008330: 00c35413 srli x8,x6,0xc +80008334: 00747413 andi x8,x8,7 +80008338: 00200493 addi x9,x0,2 +8000833c: 0a941c63 bne x8,x9,800083f4 +80008340: 41435393 srai x7,x6,0x14 +80008344: 00f35313 srli x6,x6,0xf +80008348: 01f37313 andi x6,x6,31 +8000834c: 00331313 slli x6,x6,0x3 +80008350: 00620333 add x6,x4,x6 +80008354: 00032303 lw x6,0(x6) +80008358: 00730333 add x6,x6,x7 +8000835c: 00337413 andi x8,x6,3 +80008360: 0c041663 bne x8,x0,8000842c +80008364: 00000013 addi x0,x0,0 +80008368: 00000013 addi x0,x0,0 +8000836c: 00000013 addi x0,x0,0 +80008370: 00000013 addi x0,x0,0 +80008374: 00000013 addi x0,x0,0 +80008378: 00000013 addi x0,x0,0 +8000837c: 00000013 addi x0,x0,0 +80008380: 00012417 auipc x8,0x12 +80008384: db040413 addi x8,x8,-592 # 8001a130 +80008388: 00000013 addi x0,x0,0 +8000838c: 00000013 addi x0,x0,0 +80008390: 00000013 addi x0,x0,0 +80008394: 00000013 addi x0,x0,0 +80008398: 00000013 addi x0,x0,0 +8000839c: 00000013 addi x0,x0,0 +800083a0: 08836663 bltu x6,x8,8000842c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00021417 auipc x8,0x21 +800083c4: 24040413 addi x8,x8,576 # 80029600 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: ffc40413 addi x8,x8,-4 +800083e4: 04646463 bltu x8,x6,8000842c +800083e8: 00032303 lw x6,0(x6) +800083ec: 10622c23 sw x6,280(x4) # 118 +800083f0: 3700006f jal x0,80008760 + +800083f4 : +800083f4: 00100413 addi x8,x0,1 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00010497 auipc x9,0x10 +80008404: 10848493 addi x9,x9,264 # 80018508 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: 0084a023 sw x8,0(x9) +80008424: 10a22c23 sw x10,280(x4) # 118 +80008428: 3380006f jal x0,80008760 + +8000842c : +8000842c: 00200413 addi x8,x0,2 +80008430: 00000013 addi x0,x0,0 +80008434: 00000013 addi x0,x0,0 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: 0c848493 addi x9,x9,200 # 80018508 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10622c23 sw x6,280(x4) # 118 +80008468: 2f80006f jal x0,80008760 + +8000846c : +8000846c: 0042a303 lw x6,4(x5) +80008470: 00010817 auipc x16,0x10 +80008474: 0a880813 addi x16,x16,168 # 80018518 +80008478: 00682023 sw x6,0(x16) +8000847c: 0002a303 lw x6,0(x5) +80008480: 10622423 sw x6,264(x4) # 108 +80008484: 00010817 auipc x16,0x10 +80008488: 09480813 addi x16,x16,148 # 80018518 +8000848c: 00082303 lw x6,0(x16) +80008490: 00010397 auipc x7,0x10 +80008494: 7c538393 addi x7,x7,1989 # 80018c55 +80008498: 28730463 beq x6,x7,80008720 +8000849c: 00000413 addi x8,x0,0 +800084a0: 00010817 auipc x16,0x10 +800084a4: 07080813 addi x16,x16,112 # 80018510 +800084a8: 00882023 sw x8,0(x16) +800084ac: 00010397 auipc x7,0x10 +800084b0: 7c038393 addi x7,x7,1984 # 80018c6c +800084b4: 00731863 bne x6,x7,800084c4 +800084b8: 00100413 addi x8,x0,1 +800084bc: 00000493 addi x9,x0,0 +800084c0: 2740006f jal x0,80008734 +800084c4: 00011397 auipc x7,0x11 +800084c8: 8aa38393 addi x7,x7,-1878 # 80018d6e +800084cc: 00731863 bne x6,x7,800084dc +800084d0: 00200413 addi x8,x0,2 +800084d4: 00000493 addi x9,x0,0 +800084d8: 25c0006f jal x0,80008734 +800084dc: 00011397 auipc x7,0x11 +800084e0: 98d38393 addi x7,x7,-1651 # 80018e69 +800084e4: 00731863 bne x6,x7,800084f4 +800084e8: 00300413 addi x8,x0,3 +800084ec: 00000493 addi x9,x0,0 +800084f0: 2440006f jal x0,80008734 +800084f4: 00011397 auipc x7,0x11 +800084f8: a6838393 addi x7,x7,-1432 # 80018f5c +800084fc: 00731863 bne x6,x7,8000850c +80008500: 00400413 addi x8,x0,4 +80008504: 00000493 addi x9,x0,0 +80008508: 22c0006f jal x0,80008734 +8000850c: 00011397 auipc x7,0x11 +80008510: bc338393 addi x7,x7,-1085 # 800190cf +80008514: 00731863 bne x6,x7,80008524 +80008518: 00500413 addi x8,x0,5 +8000851c: 00000493 addi x9,x0,0 +80008520: 2140006f jal x0,80008734 +80008524: 00011397 auipc x7,0x11 +80008528: b2f38393 addi x7,x7,-1233 # 80019053 +8000852c: 00731863 bne x6,x7,8000853c +80008530: 00600413 addi x8,x0,6 +80008534: 00000493 addi x9,x0,0 +80008538: 1fc0006f jal x0,80008734 +8000853c: 00011397 auipc x7,0x11 +80008540: b5538393 addi x7,x7,-1195 # 80019091 +80008544: 00731863 bne x6,x7,80008554 +80008548: 00700413 addi x8,x0,7 +8000854c: 00000493 addi x9,x0,0 +80008550: 1e40006f jal x0,80008734 +80008554: 00010397 auipc x7,0x10 +80008558: 75838393 addi x7,x7,1880 # 80018cac +8000855c: 00731863 bne x6,x7,8000856c +80008560: 00100413 addi x8,x0,1 +80008564: 00100493 addi x9,x0,1 +80008568: 1cc0006f jal x0,80008734 +8000856c: 00011397 auipc x7,0x11 +80008570: 84038393 addi x7,x7,-1984 # 80018dac +80008574: 00731863 bne x6,x7,80008584 +80008578: 00200413 addi x8,x0,2 +8000857c: 00100493 addi x9,x0,1 +80008580: 1b40006f jal x0,80008734 +80008584: 00011397 auipc x7,0x11 +80008588: 92138393 addi x7,x7,-1759 # 80018ea5 +8000858c: 00731863 bne x6,x7,8000859c +80008590: 00300413 addi x8,x0,3 +80008594: 00100493 addi x9,x0,1 +80008598: 19c0006f jal x0,80008734 +8000859c: 00011397 auipc x7,0x11 +800085a0: 9fd38393 addi x7,x7,-1539 # 80018f99 +800085a4: 00731863 bne x6,x7,800085b4 +800085a8: 00400413 addi x8,x0,4 +800085ac: 00100493 addi x9,x0,1 +800085b0: 1840006f jal x0,80008734 +800085b4: 00011397 auipc x7,0x11 +800085b8: b5638393 addi x7,x7,-1194 # 8001910a +800085bc: 00731863 bne x6,x7,800085cc +800085c0: 00500413 addi x8,x0,5 +800085c4: 00100493 addi x9,x0,1 +800085c8: 16c0006f jal x0,80008734 +800085cc: 00010397 auipc x7,0x10 +800085d0: 72038393 addi x7,x7,1824 # 80018cec +800085d4: 00731863 bne x6,x7,800085e4 +800085d8: 00100413 addi x8,x0,1 +800085dc: 00200493 addi x9,x0,2 +800085e0: 1540006f jal x0,80008734 +800085e4: 00011397 auipc x7,0x11 +800085e8: 80638393 addi x7,x7,-2042 # 80018dea +800085ec: 00731863 bne x6,x7,800085fc +800085f0: 00200413 addi x8,x0,2 +800085f4: 00200493 addi x9,x0,2 +800085f8: 13c0006f jal x0,80008734 +800085fc: 00011397 auipc x7,0x11 +80008600: 8e538393 addi x7,x7,-1819 # 80018ee1 +80008604: 00731863 bne x6,x7,80008614 +80008608: 00300413 addi x8,x0,3 +8000860c: 00200493 addi x9,x0,2 +80008610: 1240006f jal x0,80008734 +80008614: 00011397 auipc x7,0x11 +80008618: 9c238393 addi x7,x7,-1598 # 80018fd6 +8000861c: 00731863 bne x6,x7,8000862c +80008620: 00400413 addi x8,x0,4 +80008624: 00200493 addi x9,x0,2 +80008628: 10c0006f jal x0,80008734 +8000862c: 00011397 auipc x7,0x11 +80008630: b1938393 addi x7,x7,-1255 # 80019145 +80008634: 00731863 bne x6,x7,80008644 +80008638: 00500413 addi x8,x0,5 +8000863c: 00200493 addi x9,x0,2 +80008640: 0f40006f jal x0,80008734 +80008644: 00010397 auipc x7,0x10 +80008648: 6e938393 addi x7,x7,1769 # 80018d2d +8000864c: 00731863 bne x6,x7,8000865c +80008650: 00100413 addi x8,x0,1 +80008654: 00300493 addi x9,x0,3 +80008658: 0dc0006f jal x0,80008734 +8000865c: 00010397 auipc x7,0x10 +80008660: 7cd38393 addi x7,x7,1997 # 80018e29 +80008664: 00731863 bne x6,x7,80008674 +80008668: 00200413 addi x8,x0,2 +8000866c: 00300493 addi x9,x0,3 +80008670: 0c40006f jal x0,80008734 +80008674: 00011397 auipc x7,0x11 +80008678: 8aa38393 addi x7,x7,-1878 # 80018f1e +8000867c: 00731863 bne x6,x7,8000868c +80008680: 00300413 addi x8,x0,3 +80008684: 00300493 addi x9,x0,3 +80008688: 0ac0006f jal x0,80008734 +8000868c: 00011397 auipc x7,0x11 +80008690: 98838393 addi x7,x7,-1656 # 80019014 +80008694: 00731863 bne x6,x7,800086a4 +80008698: 00400413 addi x8,x0,4 +8000869c: 00300493 addi x9,x0,3 +800086a0: 0940006f jal x0,80008734 +800086a4: 00011397 auipc x7,0x11 +800086a8: add38393 addi x7,x7,-1315 # 80019181 +800086ac: 00731863 bne x6,x7,800086bc +800086b0: 00500413 addi x8,x0,5 +800086b4: 00300493 addi x9,x0,3 +800086b8: 07c0006f jal x0,80008734 +800086bc: 00011397 auipc x7,0x11 +800086c0: b0238393 addi x7,x7,-1278 # 800191be +800086c4: 00731863 bne x6,x7,800086d4 +800086c8: 00800413 addi x8,x0,8 +800086cc: 00000493 addi x9,x0,0 +800086d0: 0640006f jal x0,80008734 +800086d4: 00011397 auipc x7,0x11 +800086d8: b3938393 addi x7,x7,-1223 # 8001920d +800086dc: 00731863 bne x6,x7,800086ec +800086e0: 00800413 addi x8,x0,8 +800086e4: 00000493 addi x9,x0,0 +800086e8: 04c0006f jal x0,80008734 +800086ec: 00011397 auipc x7,0x11 +800086f0: c1c38393 addi x7,x7,-996 # 80019308 +800086f4: 00731863 bne x6,x7,80008704 +800086f8: 00800413 addi x8,x0,8 +800086fc: 00100493 addi x9,x0,1 +80008700: 0340006f jal x0,80008734 +80008704: 00011397 auipc x7,0x11 +80008708: d0038393 addi x7,x7,-768 # 80019404 +8000870c: 00731863 bne x6,x7,8000871c +80008710: 00800413 addi x8,x0,8 +80008714: 00200493 addi x9,x0,2 +80008718: 01c0006f jal x0,80008734 +8000871c: 0340006f jal x0,80008750 + +80008720 : +80008720: 00900413 addi x8,x0,9 +80008724: 00010817 auipc x16,0x10 +80008728: dec80813 addi x16,x16,-532 # 80018510 +8000872c: 00882023 sw x8,0(x16) +80008730: 0300006f jal x0,80008760 + +80008734 : +80008734: 00010817 auipc x16,0x10 +80008738: ddc80813 addi x16,x16,-548 # 80018510 +8000873c: 00882023 sw x8,0(x16) +80008740: 00010817 auipc x16,0x10 +80008744: dd480813 addi x16,x16,-556 # 80018514 +80008748: 00982023 sw x9,0(x16) +8000874c: 0140006f jal x0,80008760 + +80008750 : +80008750: 00010817 auipc x16,0x10 +80008754: dc080813 addi x16,x16,-576 # 80018510 +80008758: 00082023 sw x0,0(x16) +8000875c: 0040006f jal x0,80008760 + +80008760 : +80008760: 0002a303 lw x6,0(x5) +80008764: 10622423 sw x6,264(x4) # 108 +80008768: 00035383 lhu x7,0(x6) +8000876c: 0033f413 andi x8,x7,3 +80008770: 00300493 addi x9,x0,3 +80008774: 00941863 bne x8,x9,80008784 +80008778: 00235403 lhu x8,2(x6) +8000877c: 01041413 slli x8,x8,0x10 +80008780: 0083e3b3 or x7,x7,x8 +80008784: 10722023 sw x7,256(x4) # 100 +80008788: 0042a303 lw x6,4(x5) +8000878c: 12622023 sw x6,288(x4) # 120 + +80008790 : +80008790: 00000013 addi x0,x0,0 +80008794: 00000013 addi x0,x0,0 +80008798: 00000013 addi x0,x0,0 +8000879c: 00000013 addi x0,x0,0 +800087a0: 00010517 auipc x10,0x10 +800087a4: 2c350513 addi x10,x10,707 # 80018a63 +800087a8: 00000013 addi x0,x0,0 +800087ac: 00000013 addi x0,x0,0 +800087b0: 00000013 addi x0,x0,0 +800087b4: 00000013 addi x0,x0,0 +800087b8: 00000013 addi x0,x0,0 +800087bc: 00000013 addi x0,x0,0 +800087c0: 00022097 auipc x1,0x22 +800087c4: da4080e7 jalr x1,-604(x1) # 8002a564 +800087c8: 00000013 addi x0,x0,0 +800087cc: 00000013 addi x0,x0,0 +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: 2c150513 addi x10,x10,705 # 80018aa1 +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 + +80008808 : +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: 33850513 addi x10,x10,824 # 80018b58 +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 00010517 auipc x10,0x10 +8000884c: cb852503 lw x10,-840(x10) # 80018500 +80008850: 00022097 auipc x1,0x22 +80008854: d14080e7 jalr x1,-748(x1) # 8002a564 + +80008858 : +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: 30a50513 addi x10,x10,778 # 80018b6a +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80008888: 00010517 auipc x10,0x10 +8000888c: b5852503 lw x10,-1192(x10) # 800183e0 +80008890: 00300593 addi x11,x0,3 +80008894: 52b50c63 beq x10,x11,80008dcc +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: 2cc50513 addi x10,x10,716 # 80018b6c +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 00010517 auipc x10,0x10 +800088cc: c1852503 lw x10,-1000(x10) # 800184e0 +800088d0: 02000593 addi x11,x0,32 +800088d4: 00357613 andi x12,x10,3 +800088d8: 00300693 addi x13,x0,3 +800088dc: 00d60463 beq x12,x13,800088e4 +800088e0: 01000593 addi x11,x0,16 +800088e4: 3f4010ef jal x1,80009cd8 +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 00010517 auipc x10,0x10 +80008904: c4850513 addi x10,x10,-952 # 80018548 +80008908: 00000013 addi x0,x0,0 +8000890c: 00000013 addi x0,x0,0 +80008910: 00000013 addi x0,x0,0 +80008914: 00000013 addi x0,x0,0 +80008918: 00000013 addi x0,x0,0 +8000891c: 00000013 addi x0,x0,0 +80008920: 00022097 auipc x1,0x22 +80008924: c44080e7 jalr x1,-956(x1) # 8002a564 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: 24050513 addi x10,x10,576 # 80018b80 +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 00010517 auipc x10,0x10 +8000896c: b8052503 lw x10,-1152(x10) # 800184e8 +80008970: 02000593 addi x11,x0,32 +80008974: 364010ef jal x1,80009cd8 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 00010517 auipc x10,0x10 +80008984: bc850513 addi x10,x10,-1080 # 80018548 +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00000013 addi x0,x0,0 +800089ac: 00000013 addi x0,x0,0 +800089b0: 00000013 addi x0,x0,0 +800089b4: 00000013 addi x0,x0,0 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00011517 auipc x10,0x11 +800089c4: bf750513 addi x10,x10,-1033 # 800195b7 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 00010517 auipc x10,0x10 +800089ec: 9f852503 lw x10,-1544(x10) # 800183e0 +800089f0: 00050663 beq x10,x0,800089fc +800089f4: 00300593 addi x11,x0,3 +800089f8: 04b51063 bne x10,x11,80008a38 +800089fc: 07800593 addi x11,x0,120 +80008a00: 00010617 auipc x12,0x10 +80008a04: b4860613 addi x12,x12,-1208 # 80018548 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00b60023 sb x11,0(x12) +80008a24: 00160613 addi x12,x12,1 +80008a28: 00010517 auipc x10,0x10 +80008a2c: abc52503 lw x10,-1348(x10) # 800184e4 +80008a30: 324010ef jal x1,80009d54 +80008a34: 1180006f jal x0,80008b4c + +80008a38 : +80008a38: 00100593 addi x11,x0,1 +80008a3c: 04b50863 beq x10,x11,80008a8c +80008a40: 00400593 addi x11,x0,4 +80008a44: 08b50a63 beq x10,x11,80008ad8 +80008a48: 00500593 addi x11,x0,5 +80008a4c: 0cb50463 beq x10,x11,80008b14 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00011517 auipc x10,0x11 +80008a64: c6d50513 addi x10,x10,-915 # 800196cd +80008a68: 00000013 addi x0,x0,0 +80008a6c: 00000013 addi x0,x0,0 +80008a70: 00000013 addi x0,x0,0 +80008a74: 00000013 addi x0,x0,0 +80008a78: 00000013 addi x0,x0,0 +80008a7c: 00000013 addi x0,x0,0 +80008a80: 00022097 auipc x1,0x22 +80008a84: ae4080e7 jalr x1,-1308(x1) # 8002a564 +80008a88: 1000006f jal x0,80008b88 + +80008a8c : +80008a8c: 06600593 addi x11,x0,102 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 00010617 auipc x12,0x10 +80008aa4: aa860613 addi x12,x12,-1368 # 80018548 +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00b60023 sb x11,0(x12) +80008ac4: 00160613 addi x12,x12,1 +80008ac8: 00010517 auipc x10,0x10 +80008acc: a1c52503 lw x10,-1508(x10) # 800184e4 +80008ad0: 284010ef jal x1,80009d54 +80008ad4: 0780006f jal x0,80008b4c + +80008ad8 : +80008ad8: 07600593 addi x11,x0,118 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 00010617 auipc x12,0x10 +80008ae4: a6860613 addi x12,x12,-1432 # 80018548 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 00010517 auipc x10,0x10 +80008b0c: 9dc52503 lw x10,-1572(x10) # 800184e4 +80008b10: 244010ef jal x1,80009d54 + +80008b14 : +80008b14: 00000013 addi x0,x0,0 +80008b18: 00000013 addi x0,x0,0 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 00011517 auipc x10,0x11 +80008b24: a9050513 addi x10,x10,-1392 # 800195b0 +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00022097 auipc x1,0x22 +80008b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80008b48: 0400006f jal x0,80008b88 + +80008b4c : +80008b4c: 00000013 addi x0,x0,0 +80008b50: 00000013 addi x0,x0,0 +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 00010517 auipc x10,0x10 +80008b64: 9e850513 addi x10,x10,-1560 # 80018548 +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 + +80008b88 : +80008b88: 00000013 addi x0,x0,0 +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 00011517 auipc x10,0x11 +80008ba4: a2850513 addi x10,x10,-1496 # 800195c8 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80008bc8: 00010517 auipc x10,0x10 +80008bcc: 81852503 lw x10,-2024(x10) # 800183e0 +80008bd0: 00100593 addi x11,x0,1 +80008bd4: 00b51c63 bne x10,x11,80008bec +80008bd8: 00010517 auipc x10,0x10 +80008bdc: 91852503 lw x10,-1768(x10) # 800184f0 +80008be0: 02000593 addi x11,x0,32 +80008be4: 0f4010ef jal x1,80009cd8 +80008be8: 0140006f jal x0,80008bfc + +80008bec : +80008bec: 00010517 auipc x10,0x10 +80008bf0: 90452503 lw x10,-1788(x10) # 800184f0 +80008bf4: 02000593 addi x11,x0,32 +80008bf8: 0e0010ef jal x1,80009cd8 + +80008bfc : +80008bfc: 00000013 addi x0,x0,0 +80008c00: 00010517 auipc x10,0x10 +80008c04: 94850513 addi x10,x10,-1720 # 80018548 +80008c08: 00000013 addi x0,x0,0 +80008c0c: 00000013 addi x0,x0,0 +80008c10: 00000013 addi x0,x0,0 +80008c14: 00000013 addi x0,x0,0 +80008c18: 00000013 addi x0,x0,0 +80008c1c: 00000013 addi x0,x0,0 +80008c20: 00022097 auipc x1,0x22 +80008c24: 944080e7 jalr x1,-1724(x1) # 8002a564 +80008c28: 00010517 auipc x10,0x10 +80008c2c: 8e052503 lw x10,-1824(x10) # 80018508 +80008c30: 08051e63 bne x10,x0,80008ccc +80008c34: 00000013 addi x0,x0,0 +80008c38: 00000013 addi x0,x0,0 +80008c3c: 00000013 addi x0,x0,0 +80008c40: 00011517 auipc x10,0x11 +80008c44: 99f50513 addi x10,x10,-1633 # 800195df +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: 77852503 lw x10,1912(x10) # 800183e0 +80008c70: 00100593 addi x11,x0,1 +80008c74: 00b51c63 bne x10,x11,80008c8c +80008c78: 00010517 auipc x10,0x10 +80008c7c: 88052503 lw x10,-1920(x10) # 800184f8 +80008c80: 02000593 addi x11,x0,32 +80008c84: 054010ef jal x1,80009cd8 +80008c88: 0140006f jal x0,80008c9c + +80008c8c : +80008c8c: 00010517 auipc x10,0x10 +80008c90: 86c52503 lw x10,-1940(x10) # 800184f8 +80008c94: 02000593 addi x11,x0,32 +80008c98: 040010ef jal x1,80009cd8 + +80008c9c : +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 00010517 auipc x10,0x10 +80008ca4: 8a850513 addi x10,x10,-1880 # 80018548 +80008ca8: 00000013 addi x0,x0,0 +80008cac: 00000013 addi x0,x0,0 +80008cb0: 00000013 addi x0,x0,0 +80008cb4: 00000013 addi x0,x0,0 +80008cb8: 00000013 addi x0,x0,0 +80008cbc: 00000013 addi x0,x0,0 +80008cc0: 00022097 auipc x1,0x22 +80008cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80008cc8: 5bd0006f jal x0,80009a84 + +80008ccc : +80008ccc: 00100593 addi x11,x0,1 +80008cd0: 06b51e63 bne x10,x11,80008d4c + +80008cd4 : +80008cd4: 00000013 addi x0,x0,0 +80008cd8: 00000013 addi x0,x0,0 +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 00011517 auipc x10,0x11 +80008ce4: 91650513 addi x10,x10,-1770 # 800195f6 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 0000f517 auipc x10,0xf +80008d0c: 7f052503 lw x10,2032(x10) # 800184f8 +80008d10: 02000593 addi x11,x0,32 +80008d14: 7c5000ef jal x1,80009cd8 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 00010517 auipc x10,0x10 +80008d24: 82850513 addi x10,x10,-2008 # 80018548 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 53d0006f jal x0,80009a84 + +80008d4c : +80008d4c: 00000013 addi x0,x0,0 +80008d50: 00000013 addi x0,x0,0 +80008d54: 00000013 addi x0,x0,0 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 00011517 auipc x10,0x11 +80008d64: 8f450513 addi x10,x10,-1804 # 80019654 +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 0000f517 auipc x10,0xf +80008d8c: 77052503 lw x10,1904(x10) # 800184f8 +80008d90: 02000593 addi x11,x0,32 +80008d94: 745000ef jal x1,80009cd8 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 0000f517 auipc x10,0xf +80008da4: 7a850513 addi x10,x10,1960 # 80018548 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 4bd0006f jal x0,80009a84 + +80008dcc : +80008dcc: 0000f417 auipc x8,0xf +80008dd0: 74442403 lw x8,1860(x8) # 80018510 +80008dd4: 00900493 addi x9,x0,9 +80008dd8: 0a940c63 beq x8,x9,80008e90 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 00011517 auipc x10,0x11 +80008de4: 91950513 addi x10,x10,-1767 # 800196f9 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 00000013 addi x0,x0,0 +80008e0c: 00000013 addi x0,x0,0 +80008e10: 00000013 addi x0,x0,0 +80008e14: 00000013 addi x0,x0,0 +80008e18: 00000013 addi x0,x0,0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00011517 auipc x10,0x11 +80008e24: 90550513 addi x10,x10,-1787 # 80019725 +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 0000f817 auipc x16,0xf +80008e4c: 6d080813 addi x16,x16,1744 # 80018518 +80008e50: 00082503 lw x10,0(x16) +80008e54: 00021097 auipc x1,0x21 +80008e58: 710080e7 jalr x1,1808(x1) # 8002a564 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 00010517 auipc x10,0x10 +80008e64: d0a50513 addi x10,x10,-758 # 80018b6a +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 280404e3 beq x8,x0,80009910 +80008e8c: 3400006f jal x0,800091cc + +80008e90 : +80008e90: 00000013 addi x0,x0,0 +80008e94: 00000013 addi x0,x0,0 +80008e98: 00000013 addi x0,x0,0 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00011517 auipc x10,0x11 +80008ea4: 89550513 addi x10,x10,-1899 # 80019735 +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 0000f517 auipc x10,0xf +80008ecc: 63052503 lw x10,1584(x10) # 800184f8 +80008ed0: 02000593 addi x11,x0,32 +80008ed4: 605000ef jal x1,80009cd8 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 0000f517 auipc x10,0xf +80008ee4: 66850513 addi x10,x10,1640 # 80018548 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 00000013 addi x0,x0,0 +80008f0c: 00000013 addi x0,x0,0 +80008f10: 00000013 addi x0,x0,0 +80008f14: 00000013 addi x0,x0,0 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 00011517 auipc x10,0x11 +80008f24: 84050513 addi x10,x10,-1984 # 80019760 +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 0000f517 auipc x10,0xf +80008f4c: 5a852503 lw x10,1448(x10) # 800184f0 +80008f50: 02000593 addi x11,x0,32 +80008f54: 585000ef jal x1,80009cd8 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 0000f517 auipc x10,0xf +80008f64: 5e850513 addi x10,x10,1512 # 80018548 +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f317 auipc x6,0xf +80008f8c: 56832303 lw x6,1384(x6) # 800184f0 +80008f90: 0000f397 auipc x7,0xf +80008f94: 5683a383 lw x7,1384(x7) # 800184f8 +80008f98: 10736a63 bltu x6,x7,800090ac + +80008f9c : +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 00010517 auipc x10,0x10 +80008fa4: 7ef50513 addi x10,x10,2031 # 8001978f +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 00000013 addi x0,x0,0 +80008fcc: 00000013 addi x0,x0,0 +80008fd0: 00000013 addi x0,x0,0 +80008fd4: 00000013 addi x0,x0,0 +80008fd8: 00000013 addi x0,x0,0 +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00011517 auipc x10,0x11 +80008fe4: 81750513 addi x10,x10,-2025 # 800197f7 +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 0000f317 auipc x6,0xf +8000900c: 4e832303 lw x6,1256(x6) # 800184f0 +80009010: 0000f397 auipc x7,0xf +80009014: 4e83a383 lw x7,1256(x7) # 800184f8 +80009018: 40730533 sub x10,x6,x7 +8000901c: 02000593 addi x11,x0,32 +80009020: 4b9000ef jal x1,80009cd8 +80009024: 00000013 addi x0,x0,0 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 0000f517 auipc x10,0xf +80009044: 50850513 addi x10,x10,1288 # 80018548 +80009048: 00000013 addi x0,x0,0 +8000904c: 00000013 addi x0,x0,0 +80009050: 00000013 addi x0,x0,0 +80009054: 00000013 addi x0,x0,0 +80009058: 00000013 addi x0,x0,0 +8000905c: 00000013 addi x0,x0,0 +80009060: 00021097 auipc x1,0x21 +80009064: 504080e7 jalr x1,1284(x1) # 8002a564 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 00010517 auipc x10,0x10 +80009084: 79e50513 addi x10,x10,1950 # 8001981e +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 1dd0006f jal x0,80009a84 + +800090ac : +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: 6fb50513 addi x10,x10,1787 # 800197bb +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 00000013 addi x0,x0,0 +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: 6f750513 addi x10,x10,1783 # 800197f7 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 0000f317 auipc x6,0xf +8000912c: 3d032303 lw x6,976(x6) # 800184f8 +80009130: 0000f397 auipc x7,0xf +80009134: 3c03a383 lw x7,960(x7) # 800184f0 +80009138: 40730533 sub x10,x6,x7 +8000913c: 02000593 addi x11,x0,32 +80009140: 399000ef jal x1,80009cd8 +80009144: 00000013 addi x0,x0,0 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 0000f517 auipc x10,0xf +80009164: 3e850513 addi x10,x10,1000 # 80018548 +80009168: 00000013 addi x0,x0,0 +8000916c: 00000013 addi x0,x0,0 +80009170: 00000013 addi x0,x0,0 +80009174: 00000013 addi x0,x0,0 +80009178: 00000013 addi x0,x0,0 +8000917c: 00000013 addi x0,x0,0 +80009180: 00021097 auipc x1,0x21 +80009184: 3e4080e7 jalr x1,996(x1) # 8002a564 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 00010517 auipc x10,0x10 +800091a4: 76650513 addi x10,x10,1894 # 80019906 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 0bd0006f jal x0,80009a84 + +800091cc : +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00011517 auipc x10,0x11 +800091e4: 80d50513 addi x10,x10,-2035 # 800199ed +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0000f517 auipc x10,0xf +8000920c: 30c52503 lw x10,780(x10) # 80018514 +80009210: 04050a63 beq x10,x0,80009264 +80009214: 00100593 addi x11,x0,1 +80009218: 08b50663 beq x10,x11,800092a4 +8000921c: 00200593 addi x11,x0,2 +80009220: 0cb50263 beq x10,x11,800092e4 +80009224: 00300593 addi x11,x0,3 +80009228: 0eb50e63 beq x10,x11,80009324 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00010517 auipc x10,0x10 +80009244: 7e950513 addi x10,x10,2025 # 80019a29 +80009248: 00000013 addi x0,x0,0 +8000924c: 00000013 addi x0,x0,0 +80009250: 00000013 addi x0,x0,0 +80009254: 00000013 addi x0,x0,0 +80009258: 00000013 addi x0,x0,0 +8000925c: 00000013 addi x0,x0,0 +80009260: 1000006f jal x0,80009360 + +80009264 : +80009264: 00000013 addi x0,x0,0 +80009268: 00000013 addi x0,x0,0 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: 78750513 addi x10,x10,1927 # 80019a07 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 0c00006f jal x0,80009360 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: 74f50513 addi x10,x10,1871 # 80019a0f +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0800006f jal x0,80009360 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: 71750513 addi x10,x10,1815 # 80019a17 +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0400006f jal x0,80009360 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: 6e050513 addi x10,x10,1760 # 80019a20 +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 + +80009360 : +80009360: 00021097 auipc x1,0x21 +80009364: 204080e7 jalr x1,516(x1) # 8002a564 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: 6b250513 addi x10,x10,1714 # 80019a32 +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 0000f517 auipc x10,0xf +800093ac: 16852503 lw x10,360(x10) # 80018510 +800093b0: 00100593 addi x11,x0,1 +800093b4: 06b50863 beq x10,x11,80009424 +800093b8: 00200593 addi x11,x0,2 +800093bc: 0ab50463 beq x10,x11,80009464 +800093c0: 00300593 addi x11,x0,3 +800093c4: 0eb50063 beq x10,x11,800094a4 +800093c8: 00400593 addi x11,x0,4 +800093cc: 10b50c63 beq x10,x11,800094e4 +800093d0: 00500593 addi x11,x0,5 +800093d4: 14b50863 beq x10,x11,80009524 +800093d8: 00600593 addi x11,x0,6 +800093dc: 18b50463 beq x10,x11,80009564 +800093e0: 00700593 addi x11,x0,7 +800093e4: 1cb50063 beq x10,x11,800095a4 +800093e8: 00800593 addi x11,x0,8 +800093ec: 1eb50c63 beq x10,x11,800095e4 +800093f0: 00000013 addi x0,x0,0 +800093f4: 00000013 addi x0,x0,0 +800093f8: 00000013 addi x0,x0,0 +800093fc: 00000013 addi x0,x0,0 +80009400: 00010517 auipc x10,0x10 +80009404: 78950513 addi x10,x10,1929 # 80019b89 +80009408: 00000013 addi x0,x0,0 +8000940c: 00000013 addi x0,x0,0 +80009410: 00000013 addi x0,x0,0 +80009414: 00000013 addi x0,x0,0 +80009418: 00000013 addi x0,x0,0 +8000941c: 00000013 addi x0,x0,0 +80009420: 2000006f jal x0,80009620 + +80009424 : +80009424: 00000013 addi x0,x0,0 +80009428: 00000013 addi x0,x0,0 +8000942c: 00000013 addi x0,x0,0 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: 60c50513 addi x10,x10,1548 # 80019a4c +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 1c00006f jal x0,80009620 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: 5fd50513 addi x10,x10,1533 # 80019a7d +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1800006f jal x0,80009620 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: 5dd50513 addi x10,x10,1501 # 80019a9d +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1400006f jal x0,80009620 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: 5bb50513 addi x10,x10,1467 # 80019abb +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1000006f jal x0,80009620 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: 59a50513 addi x10,x10,1434 # 80019ada +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 0c00006f jal x0,80009620 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: 58250513 addi x10,x10,1410 # 80019b02 +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0800006f jal x0,80009620 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: 56e50513 addi x10,x10,1390 # 80019b2e +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0400006f jal x0,80009620 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: 55a50513 addi x10,x10,1370 # 80019b5a +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 + +80009620 : +80009620: 00021097 auipc x1,0x21 +80009624: f44080e7 jalr x1,-188(x1) # 8002a564 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: 55850513 addi x10,x10,1368 # 80019b98 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 0000f517 auipc x10,0xf +8000966c: e9052503 lw x10,-368(x10) # 800184f8 +80009670: 02000593 addi x11,x0,32 +80009674: 664000ef jal x1,80009cd8 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 0000f517 auipc x10,0xf +80009684: ec850513 addi x10,x10,-312 # 80018548 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 00000013 addi x0,x0,0 +800096ac: 00000013 addi x0,x0,0 +800096b0: 00000013 addi x0,x0,0 +800096b4: 00000013 addi x0,x0,0 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 00010517 auipc x10,0x10 +800096c4: 4ef50513 addi x10,x10,1263 # 80019baf +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 0000f517 auipc x10,0xf +800096ec: e0852503 lw x10,-504(x10) # 800184f0 +800096f0: 02000593 addi x11,x0,32 +800096f4: 5e4000ef jal x1,80009cd8 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 0000f517 auipc x10,0xf +80009704: e4850513 addi x10,x10,-440 # 80018548 +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000f517 auipc x10,0xf +8000972c: de852503 lw x10,-536(x10) # 80018510 +80009730: 00200593 addi x11,x0,2 +80009734: 08b51463 bne x10,x11,800097bc +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 00010517 auipc x10,0x10 +80009744: 48650513 addi x10,x10,1158 # 80019bc6 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000f517 auipc x10,0xf +8000976c: d9052503 lw x10,-624(x10) # 800184f8 +80009770: 284000ef jal x1,800099f4 +80009774: 00021097 auipc x1,0x21 +80009778: df0080e7 jalr x1,-528(x1) # 8002a564 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: 45d50513 addi x10,x10,1117 # 80019bdd +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000f517 auipc x10,0xf +800097ac: d4852503 lw x10,-696(x10) # 800184f0 +800097b0: 244000ef jal x1,800099f4 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 + +800097bc : +800097bc: 00000097 auipc x1,0x0 +800097c0: 314080e7 jalr x1,788(x1) # 80009ad0 +800097c4: 0000f517 auipc x10,0xf +800097c8: d4c52503 lw x10,-692(x10) # 80018510 +800097cc: 00100593 addi x11,x0,1 +800097d0: 02b51e63 bne x10,x11,8000980c +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00010517 auipc x10,0x10 +800097e4: 47350513 addi x10,x10,1139 # 80019c53 +800097e8: 00000013 addi x0,x0,0 +800097ec: 00000013 addi x0,x0,0 +800097f0: 00000013 addi x0,x0,0 +800097f4: 00000013 addi x0,x0,0 +800097f8: 00000013 addi x0,x0,0 +800097fc: 00000013 addi x0,x0,0 +80009800: 00021097 auipc x1,0x21 +80009804: d64080e7 jalr x1,-668(x1) # 8002a564 +80009808: 27c0006f jal x0,80009a84 +8000980c: 00200593 addi x11,x0,2 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: 50950513 addi x10,x10,1289 # 80019d29 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 23c0006f jal x0,80009a84 +8000984c: 00300593 addi x11,x0,3 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: 5bc50513 addi x10,x10,1468 # 80019e1c +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 1fc0006f jal x0,80009a84 +8000988c: 00400593 addi x11,x0,4 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: 67750513 addi x10,x10,1655 # 80019f17 +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1bc0006f jal x0,80009a84 +800098cc: 00500593 addi x11,x0,5 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: 71e50513 addi x10,x10,1822 # 80019ffe +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 17c0006f jal x0,80009a84 +8000990c: 1780006f jal x0,80009a84 + +80009910 : +80009910: 00000013 addi x0,x0,0 +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: 2eb50513 addi x10,x10,747 # 80019c0b +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 0000f617 auipc x12,0xf +8000994c: be062603 lw x12,-1056(x12) # 80018528 +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 0000f517 auipc x10,0xf +80009964: 29450513 addi x10,x10,660 # 80018bf4 +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 00065503 lhu x10,0(x12) +8000998c: 01000593 addi x11,x0,16 +80009990: 00357413 andi x8,x10,3 +80009994: 00300493 addi x9,x0,3 +80009998: 00941a63 bne x8,x9,800099ac +8000999c: 00265403 lhu x8,2(x12) +800099a0: 01041413 slli x8,x8,0x10 +800099a4: 00856533 or x10,x10,x8 +800099a8: 02000593 addi x11,x0,32 +800099ac: 32c000ef jal x1,80009cd8 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 0000f517 auipc x10,0xf +800099c4: b8850513 addi x10,x10,-1144 # 80018548 +800099c8: 00000013 addi x0,x0,0 +800099cc: 00000013 addi x0,x0,0 +800099d0: 00000013 addi x0,x0,0 +800099d4: 00000013 addi x0,x0,0 +800099d8: 00000013 addi x0,x0,0 +800099dc: 00000013 addi x0,x0,0 +800099e0: 00021097 auipc x1,0x21 +800099e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800099e8: 00000097 auipc x1,0x0 +800099ec: 0e8080e7 jalr x1,232(x1) # 80009ad0 +800099f0: 0940006f jal x0,80009a84 + +800099f4 : +800099f4: 02054263 blt x10,x0,80009a18 + +800099f8 : +800099f8: 01800593 addi x11,x0,24 +800099fc: 04b55463 bge x10,x11,80009a44 +80009a00: 0000f597 auipc x11,0xf +80009a04: b7058593 addi x11,x11,-1168 # 80018570 +80009a08: 00251613 slli x12,x10,0x2 +80009a0c: 00c585b3 add x11,x11,x12 +80009a10: 0005a503 lw x10,0(x11) +80009a14: 00008067 jalr x0,0(x1) + +80009a18 : +80009a18: 00100593 addi x11,x0,1 +80009a1c: 01f59593 slli x11,x11,0x1f +80009a20: 00b54533 xor x10,x10,x11 +80009a24: 01000593 addi x11,x0,16 +80009a28: 00b55e63 bge x10,x11,80009a44 +80009a2c: 0000f597 auipc x11,0xf +80009a30: ba458593 addi x11,x11,-1116 # 800185d0 +80009a34: 00251613 slli x12,x10,0x2 +80009a38: 00c585b3 add x11,x11,x12 +80009a3c: 0005a503 lw x10,0(x11) +80009a40: 00008067 jalr x0,0(x1) + +80009a44 : +80009a44: 00000013 addi x0,x0,0 +80009a48: 00000013 addi x0,x0,0 +80009a4c: 00000013 addi x0,x0,0 +80009a50: 00000013 addi x0,x0,0 +80009a54: 00000013 addi x0,x0,0 +80009a58: 00000013 addi x0,x0,0 +80009a5c: 00000013 addi x0,x0,0 +80009a60: 0000f517 auipc x10,0xf +80009a64: fae50513 addi x10,x10,-82 # 80018a0e +80009a68: 00000013 addi x0,x0,0 +80009a6c: 00000013 addi x0,x0,0 +80009a70: 00000013 addi x0,x0,0 +80009a74: 00000013 addi x0,x0,0 +80009a78: 00000013 addi x0,x0,0 +80009a7c: 00000013 addi x0,x0,0 +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 00010517 auipc x10,0x10 +80009aa4: c0c50513 addi x10,x10,-1012 # 800196ac +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00021097 auipc x1,0x21 +80009ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 + +80009ac8 : +80009ac8: 00021097 auipc x1,0x21 +80009acc: afc080e7 jalr x1,-1284(x1) # 8002a5c4 + +80009ad0 : +80009ad0: 0000f617 auipc x12,0xf +80009ad4: a5060613 addi x12,x12,-1456 # 80018520 +80009ad8: 00162023 sw x1,0(x12) +80009adc: 00000013 addi x0,x0,0 +80009ae0: 0000f517 auipc x10,0xf +80009ae4: 13550513 addi x10,x10,309 # 80018c15 +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 +80009b08: 0000f517 auipc x10,0xf +80009b0c: a2052503 lw x10,-1504(x10) # 80018528 +80009b10: 02000593 addi x11,x0,32 +80009b14: 1c4000ef jal x1,80009cd8 +80009b18: 00000013 addi x0,x0,0 +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000f517 auipc x10,0xf +80009b24: a2850513 addi x10,x10,-1496 # 80018548 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 00000013 addi x0,x0,0 +80009b4c: 00000013 addi x0,x0,0 +80009b50: 00000013 addi x0,x0,0 +80009b54: 00000013 addi x0,x0,0 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000f517 auipc x10,0xf +80009b64: 0c550513 addi x10,x10,197 # 80018c25 +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 0000f517 auipc x10,0xf +80009b8c: 9a852503 lw x10,-1624(x10) # 80018530 +80009b90: 02000593 addi x11,x0,32 +80009b94: 144000ef jal x1,80009cd8 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000f517 auipc x10,0xf +80009ba4: 9a850513 addi x10,x10,-1624 # 80018548 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 00000013 addi x0,x0,0 +80009bcc: 00000013 addi x0,x0,0 +80009bd0: 00000013 addi x0,x0,0 +80009bd4: 00000013 addi x0,x0,0 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000f517 auipc x10,0xf +80009be4: 05550513 addi x10,x10,85 # 80018c35 +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 0000f517 auipc x10,0xf +80009c0c: 93052503 lw x10,-1744(x10) # 80018538 +80009c10: 02000593 addi x11,x0,32 +80009c14: 0c4000ef jal x1,80009cd8 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000f517 auipc x10,0xf +80009c24: 92850513 addi x10,x10,-1752 # 80018548 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 00000013 addi x0,x0,0 +80009c4c: 00000013 addi x0,x0,0 +80009c50: 00000013 addi x0,x0,0 +80009c54: 00000013 addi x0,x0,0 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000f517 auipc x10,0xf +80009c64: fe550513 addi x10,x10,-27 # 80018c45 +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 0000f517 auipc x10,0xf +80009c8c: 8b852503 lw x10,-1864(x10) # 80018540 +80009c90: 02000593 addi x11,x0,32 +80009c94: 044000ef jal x1,80009cd8 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000f517 auipc x10,0xf +80009ca4: 8a850513 addi x10,x10,-1880 # 80018548 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000f617 auipc x12,0xf +80009ccc: 85860613 addi x12,x12,-1960 # 80018520 +80009cd0: 00062083 lw x1,0(x12) +80009cd4: 00008067 jalr x0,0(x1) + +80009cd8 : +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000f617 auipc x12,0xf +80009ce4: 86860613 addi x12,x12,-1944 # 80018548 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 03000693 addi x13,x0,48 +80009d04: 00d60023 sb x13,0(x12) +80009d08: 07800693 addi x13,x0,120 +80009d0c: 00d600a3 sb x13,1(x12) +80009d10: 00260613 addi x12,x12,2 +80009d14: 00058693 addi x13,x11,0 + +80009d18 : +80009d18: ffc68693 addi x13,x13,-4 +80009d1c: 00d55733 srl x14,x10,x13 +80009d20: 00f77713 andi x14,x14,15 +80009d24: 00a00793 addi x15,x0,10 +80009d28: 00f74663 blt x14,x15,80009d34 +80009d2c: 05770713 addi x14,x14,87 +80009d30: 0080006f jal x0,80009d38 + +80009d34 : +80009d34: 03070713 addi x14,x14,48 + +80009d38 : +80009d38: 00e60023 sb x14,0(x12) +80009d3c: 00160613 addi x12,x12,1 +80009d40: fc069ce3 bne x13,x0,80009d18 +80009d44: 00a00693 addi x13,x0,10 +80009d48: 00d60023 sb x13,0(x12) +80009d4c: 000600a3 sb x0,1(x12) +80009d50: 00008067 jalr x0,0(x1) + +80009d54 : +80009d54: 00a00693 addi x13,x0,10 +80009d58: 02d54663 blt x10,x13,80009d84 +80009d5c: ff650513 addi x10,x10,-10 +80009d60: 03100713 addi x14,x0,49 +80009d64: 00d54c63 blt x10,x13,80009d7c +80009d68: ff650513 addi x10,x10,-10 +80009d6c: 03200713 addi x14,x0,50 +80009d70: 00d54663 blt x10,x13,80009d7c +80009d74: ff650513 addi x10,x10,-10 +80009d78: 03300713 addi x14,x0,51 +80009d7c: 00e60023 sb x14,0(x12) +80009d80: 00160613 addi x12,x12,1 +80009d84: 03050513 addi x10,x10,48 +80009d88: 00a60023 sb x10,0(x12) +80009d8c: 00a00693 addi x13,x0,10 +80009d90: 00d600a3 sb x13,1(x12) +80009d94: 00060123 sb x0,2(x12) +80009d98: 00008067 jalr x0,0(x1) +80009d9c: 00000013 addi x0,x0,0 +80009da0: 00000013 addi x0,x0,0 +80009da4: 00000013 addi x0,x0,0 +80009da8: 00000013 addi x0,x0,0 +80009dac: 00000013 addi x0,x0,0 +80009db0: 00000013 addi x0,x0,0 +80009db4: 00000013 addi x0,x0,0 +80009db8: 00000013 addi x0,x0,0 +80009dbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: eb838393 addi x7,x7,-328 # 80007ec0 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: e9c38393 addi x7,x7,-356 # 80007ec0 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: e8438393 addi x7,x7,-380 # 80007ec0 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: e7038393 addi x7,x7,-400 # 80007ec0 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: e6438393 addi x7,x7,-412 # 80007ec0 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e3038393 addi x7,x7,-464 # 80007ec0 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 09c30313 addi x6,x6,156 # 80007138 +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e1838393 addi x7,x7,-488 # 80007ec0 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 08430313 addi x6,x6,132 # 80007138 +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e0038393 addi x7,x7,-512 # 80007ec0 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 06c30313 addi x6,x6,108 # 80007138 +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: de838393 addi x7,x7,-536 # 80007ec0 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: f0878793 addi x15,x15,-248 # 80007148 +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: ffff0117 auipc x2,0xffff0 +8002a4a4: c9010113 addi x2,x2,-880 # 8001a130 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: ce018193 addi x3,x3,-800 # 800081c0 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 800196d5 .word 0x800196d5 +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: 05828293 addi x5,x5,88 # 80029600 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: 03828293 addi x5,x5,56 # 80029600 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha256sig0-00.elf.objdump b/riscv-tests/rv32-Zknh-sha256sig0-00.elf.objdump new file mode 100644 index 0000000..a018133 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha256sig0-00.elf.objdump @@ -0,0 +1,6272 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sig0-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sig0-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000127e0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016800 80016800 00017800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 00000894 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 00000000 00000000 00018f0f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f8f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fb2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fc8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 00000000 00000000 00018ff0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 0001907e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016800 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc7ba63z.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b1 +80004597 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b2 +800045ce l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b3 +80004605 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b4 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +8000463c l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b5 +80004673 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b6 +800046aa l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b6_str +80000154 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b7 +800046e1 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b7_str +80000178 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b8 +80004718 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b8_str +8000019c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b9 +8000474f l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b9_str +800001c0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b10 +80004787 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b10_str +800001e8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b11 +800047c0 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b11_str +8000020c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b12 +800047f9 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b12_str +80000238 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b13 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004832 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b13_str +8000025c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b14 +8000486b l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b14_str +80000280 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b15 +800048a4 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b15_str +800002a4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b16 +800048dd l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b16_str +800002c8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b17 +80004916 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b17_str +800002f0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b18 +8000494f l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b18_str +80000314 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b19 +80004988 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b19_str +8000033c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b20 +800049c1 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b20_str +80000360 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b21 +800049fa l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b21_str +80000384 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b22 +80004a33 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b22_str +800003a8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b23 +80004a6c l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b23_str +800003cc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b24 +80004aa5 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b24_str +800003f0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b25 +80004ade l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b25_str +80000414 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b26 +80004b17 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b26_str +80000438 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b27 +80004b50 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b27_str +8000045c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b28 +80004b89 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b28_str +80000480 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b29 +80004bc2 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b29_str +800004a4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b30 +80004bfb l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_b31 +80004c34 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b0 +80004c6d l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b1 +80004ca4 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b1_str +80000538 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b2 +80004cdb l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b2_str +8000055c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b3 +80004d12 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b3_str +80000580 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b4 +80004d49 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b4_str +800005a4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b5 +80004d80 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b5_str +800005c8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b6 +80004db7 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b6_str +800005f4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b7 +80004dee l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b7_str +80000618 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b8 +80004e25 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b8_str +80000640 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b9 +80004e5c l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b9_str +80000664 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b10 +80004e93 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b10_str +80000688 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b11 +80004ecb l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b11_str +800006ac l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b12 +80004f03 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b12_str +800006d0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b13 +80004f3b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b13_str +800006f4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b14 +80004f73 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b14_str +8000071c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b15 +80004fab l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b15_str +80000740 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b16 +80004fe3 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b16_str +80000764 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b17 +8000501b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b17_str +80000788 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b18 +80005053 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b18_str +800007ac l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b19 +8000508b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b19_str +800007d0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b20 +800050c3 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b20_str +800007f8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b21 +800050fb l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b21_str +8000081c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b22 +80005133 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b22_str +80000844 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b23 +8000516b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b23_str +80000868 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b24 +800051a3 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b24_str +8000088c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b25 +800051db l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b25_str +800008b0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b26 +80005213 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b26_str +800008d4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b27 +8000524b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b27_str +800008f8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b28 +80005283 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b28_str +8000091c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b29 +800052bb l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b29_str +80000944 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b30 +800052f3 l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b30_str +80000968 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rd_b31 +8000532b l .data 00000000 Zknh_sha256sig0_cg_cp_rd_b31_str +8000098c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x0 +80005363 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x0_str +800009b0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x1 +800053a2 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x1_str +800009d4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x2 +800053e1 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x2_str +800009f8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x80000000 +80005420 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x80000000_str +80000a1c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x80000001 +80005466 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x80000001_str +80000a40 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffff +800054ac l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffff_str +80000a64 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffe +800054f2 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffe_str +80000a88 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff +80005538 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff_str +80000aac l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe +8000557e l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe_str +80000ad0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc8872 +800055c4 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc8872_str +80000af4 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaa +8000560a l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b18 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x55555555 +80005650 l .data 00000000 Zknh_sha256sig0_cg_cp_rs1_edges_0x55555555_str +80000b3c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b0 +80005696 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b0_str +80000b64 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b1 +800056d2 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b1_str +80000b88 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b2 +8000570e l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b2_str +80000bac l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b3 +8000574a l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b3_str +80000bd8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b4 +80005786 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b4_str +80000bfc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b5 +800057c2 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b5_str +80000c20 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b6 +800057fe l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b6_str +80000c4c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b7 +8000583a l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b7_str +80000c70 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b8 +80005876 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b8_str +80000c94 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b9 +800058b2 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b9_str +80000cb8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b10 +800058ee l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b10_str +80000cdc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b11 +8000592b l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b11_str +80000d00 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b12 +80005968 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b12_str +80000d2c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b13 +800059a5 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b13_str +80000d50 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b14 +800059e2 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b14_str +80000d74 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b15 +80005a1f l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b15_str +80000d98 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b16 +80005a5c l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b16_str +80000dbc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b17 +80005a99 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b17_str +80000de0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b18 +80005ad6 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b18_str +80000e04 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b19 +80005b13 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b19_str +80000e28 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b20 +80005b50 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b20_str +80000e4c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b21 +80005b8d l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b21_str +80000e70 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b22 +80005bca l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b22_str +80000e94 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b23 +80005c07 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b23_str +80000eb8 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b24 +80005c45 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b24_str +80000ee0 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b25 +80005c83 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b25_str +80000f08 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b26 +80005cc1 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b26_str +80000f2c l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b27 +80005cff l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b27_str +80000f50 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b28 +80005d3d l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b28_str +80000f74 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b29 +80005d7b l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b29_str +80000f98 l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b30 +80005db9 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b30_str +80000fbc l .text.rvtest 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b31 +80005df7 l .data 00000000 Zknh_sha256sig0_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fec l .text.rvtest 00000000 exit_Mcleanup +80000ff0 l .text.rvtest 00000000 resto_Medeleg +80000ff8 l .text.rvtest 00000000 resto_Msatp +80000ffc l .text.rvtest 00000000 resto_Mscratch +80001004 l .text.rvtest 00000000 resto_Mxtvec +80001018 l .text.rvtest 00000000 resto_Mtramp +8000101c l .text.rvtest 00000000 resto_Mloop +80001034 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +800064c4 l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006503 l .data 00000000 begin_debugstr +80006563 l .data 00000000 trap_sig_overflowstr +8000710e l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007d78 l .data 00000000 trap_sigptr +80007d70 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800066b7 l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +80006525 l .data 00000000 abortstr +80006484 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +80007b45 l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005fa8 l .data 00000000 ascii_buffer +800065cc l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005f88 l .data 00000000 saved_xepc +800167dc l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800066ce l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800067d0 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800068cb l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +800069be l 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.text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005e40 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005e40 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005f68 l .data 00000000 failure_diag_type +80005f78 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005f70 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +80006ab5 l .data 00000000 sv_Mtval2_str +80006af3 l .data 00000000 sv_Mtinst_str +8000670e l .data 00000000 sv_Svect_str +8000680e l .data 00000000 sv_Scause_str +80006907 l .data 00000000 sv_Sepc_str +800069fb l .data 00000000 sv_Stval_str +80006b6c l .data 00000000 sv_Sip_str +8000674e l .data 00000000 sv_Hvect_str +8000684c l .data 00000000 sv_Hcause_str +80006943 l .data 00000000 sv_Hepc_str +80006a38 l .data 00000000 sv_Htval_str +80006ba7 l .data 00000000 sv_Hip_str +8000678f l .data 00000000 sv_Vvect_str +8000688b l .data 00000000 sv_Vcause_str +80006980 l .data 00000000 sv_Vepc_str +80006a76 l .data 00000000 sv_Vtval_str +80006be3 l .data 00000000 sv_Vip_str +80006c20 l .data 00000000 Mclr_Mext_int_str +80006c6f l .data 00000000 Mclr_Sext_int_str +80006d6a l .data 00000000 Sclr_Sext_int_str +80006e66 l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005f74 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +800065ba l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005f60 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800065ce l .data 00000000 inststr +80005f40 l .data 00000000 failing_instruction +800065e2 l .data 00000000 addrstr +80005f48 l .data 00000000 failing_addr +80007019 l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005f44 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +8000712f l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80007012 l .data 00000000 vxsatstr +8000702a l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005f50 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80007041 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005f58 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80007058 l .data 00000000 failure_diag_bad_instr_str +800070b6 l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +8000715b l .data 00000000 trap_diag_header_str +80007187 l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80007197 l .data 00000000 trap_diag_expected_offset_str +800071c2 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +800071f1 l .data 00000000 trap_diag_extra_traps_str +80007259 l .data 00000000 trap_diag_diff_bytes_str +80007280 l .data 00000000 trap_diag_extra_next_step_str +8000721d l .data 00000000 trap_diag_missing_traps_str +80007368 l .data 00000000 trap_diag_missing_next_step_str +8000744f l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +8000748b l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +80007469 l .data 00000000 trap_diag_mode_m_str +80007471 l .data 00000000 trap_diag_mode_s_str +80007479 l .data 00000000 trap_diag_mode_hs_str +80007482 l .data 00000000 trap_diag_mode_vs_str +80007494 l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800075eb l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +800074ae l .data 00000000 trap_diag_field_vect_str +800074df l .data 00000000 trap_diag_field_cause_str +800074ff l .data 00000000 trap_diag_field_epc_str +8000751d l .data 00000000 trap_diag_field_tval_str +8000753c l .data 00000000 trap_diag_field_ip_str +80007564 l .data 00000000 trap_diag_field_tval2_str +80007590 l .data 00000000 trap_diag_field_tinst_str +800075bc l .data 00000000 trap_diag_field_intid_str +800075fa l .data 00000000 trap_diag_expected_str +80007611 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +80007628 l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +8000763f l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +800076b5 l .data 00000000 trap_diag_hint_vect_str +8000778b l .data 00000000 trap_diag_hint_cause_str +8000787e l .data 00000000 trap_diag_hint_epc_str +80007979 l .data 00000000 trap_diag_hint_tval_str +80007a60 l .data 00000000 trap_diag_hint_ip_str +8000766d l .data 00000000 trap_diag_generic_str +80006656 l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005fd0 l .data 00000000 trap_excpt_name_tbl +80006030 l .data 00000000 trap_int_name_tbl +8000646e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005f80 l .data 00000000 csr_context_ret_addr +80006677 l .data 00000000 mepcstr +80006687 l .data 00000000 mcausestr +80005f90 l .data 00000000 saved_xcause +80006697 l .data 00000000 mtvalstr +80005f98 l .data 00000000 saved_xtval +800066a7 l .data 00000000 mstatusstr +80005fa0 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007b90 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80007137 l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005fd0 l .data 00000000 end_failure_scratch +80006070 l .data 00000000 trap_excpt_name_0 +80006090 l .data 00000000 trap_excpt_name_1 +800060aa l .data 00000000 trap_excpt_name_2 +800060bf l .data 00000000 trap_excpt_name_3 +800060cb l .data 00000000 trap_excpt_name_4 +800060e4 l .data 00000000 trap_excpt_name_5 +800060f7 l .data 00000000 trap_excpt_name_6 +80006115 l .data 00000000 trap_excpt_name_7 +8000612d l .data 00000000 trap_excpt_name_8 +8000614b l .data 00000000 trap_excpt_name_9 +80006169 l .data 00000000 trap_excpt_name_10 +80006188 l .data 00000000 trap_excpt_name_11 +800061a6 l .data 00000000 trap_excpt_name_12 +800061be l .data 00000000 trap_excpt_name_13 +800061cf l .data 00000000 trap_excpt_name_14 +800061de l .data 00000000 trap_excpt_name_15 +800061f4 l .data 00000000 trap_excpt_name_16 +80006201 l .data 00000000 trap_excpt_name_17 +80006210 l .data 00000000 trap_excpt_name_18 +80006220 l .data 00000000 trap_excpt_name_19 +80006230 l .data 00000000 trap_excpt_name_20 +8000624e l .data 00000000 trap_excpt_name_21 +80006265 l .data 00000000 trap_excpt_name_22 +8000627a l .data 00000000 trap_excpt_name_23 +80006296 l .data 00000000 trap_int_name_0 +800062ae l .data 00000000 trap_int_name_1 +800062cd l .data 00000000 trap_int_name_2 +800062f4 l .data 00000000 trap_int_name_3 +80006310 l .data 00000000 trap_int_name_4 +80006328 l .data 00000000 trap_int_name_5 +80006344 l .data 00000000 trap_int_name_6 +80006368 l .data 00000000 trap_int_name_7 +80006381 l .data 00000000 trap_int_name_8 +80006399 l .data 00000000 trap_int_name_9 +800063b8 l .data 00000000 trap_int_name_10 +800063df l .data 00000000 trap_int_name_11 +800063fb l .data 00000000 trap_int_name_12 +80006420 l .data 00000000 trap_int_name_13 +8000643c l .data 00000000 trap_int_name_14 +80006455 l .data 00000000 trap_int_name_15 +80006623 l .data 00000000 xepcstr +80006cc1 l .data 00000000 Mclr_Vext_int_str +80006d1b l .data 00000000 Sclr_Mext_int_str +80006dbc l .data 00000000 Sclr_Vext_int_str +80006e16 l .data 00000000 Hclr_Mext_int_str +80006eb9 l .data 00000000 Hclr_Vext_int_str +80006f14 l .data 00000000 Vclr_Mext_int_str +80006f64 l .data 00000000 Vclr_Sext_int_str +80006fb7 l .data 00000000 Vclr_Vext_int_str +80007656 l .data 00000000 trap_diag_curr_xepc_str +800167e0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800167e0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001034 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007b90 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fdc g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007b90 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +80007b89 g .data 00000000 rvtest_data_end +80000fdc g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016900 g .tohost 00000000 fromhost +80016800 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x4384caee +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zknh_sha256sig0_cg_cp_rs1_b0: + sha256sig0 x20, x0 # perform operation +80000048: 10201a13 sha256sig0 x20,x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zknh_sha256sig0_cg_cp_rs1_b0, Zknh_sha256sig0_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01420863 beq x4,x20,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x87775b64 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zknh_sha256sig0_cg_cp_rs1_b1: + sha256sig0 x21, x1 # perform operation +8000006c: 10209a93 sha256sig0 x21,x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zknh_sha256sig0_cg_cp_rs1_b1, Zknh_sha256sig0_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01520863 beq x4,x21,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004597 .word 0x80004597 +80000084: 00410113 addi x2,x2,4 + + mv x20, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010a13 addi x20,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x8a57fec9 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zknh_sha256sig0_cg_cp_rs1_b2: + sha256sig0 x7, x2 # perform operation +80000094: 10211393 sha256sig0 x7,x2 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zknh_sha256sig0_cg_cp_rs1_b2, Zknh_sha256sig0_cg_cp_rs1_b2_str) +80000098: 000a2203 lw x4,0(x20) +8000009c: 00720863 beq x4,x7,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045ce .word 0x800045ce +800000ac: 004a0a13 addi x20,x20,4 + + mv x11, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xbacd73f6 +800000b4: 0005a183 lw x3,0(x11) +800000b8: 00458593 addi x11,x11,4 + +800000bc : +Zknh_sha256sig0_cg_cp_rs1_b3: + sha256sig0 x8, x3 # perform operation +800000bc: 10219413 sha256sig0 x8,x3 + # Check if x8 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x8, Zknh_sha256sig0_cg_cp_rs1_b3, Zknh_sha256sig0_cg_cp_rs1_b3_str) +800000c0: 000a2203 lw x4,0(x20) +800000c4: 00820863 beq x4,x8,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 80004605 .word 0x80004605 +800000d4: 004a0a13 addi x20,x20,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000d8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x490c77a4 +800000e0: 0005a203 lw x4,0(x11) +800000e4: 00458593 addi x11,x11,4 + +800000e8 : +Zknh_sha256sig0_cg_cp_rs1_b4: + sha256sig0 x24, x4 # perform operation +800000e8: 10221c13 sha256sig0 x24,x4 + # Check if x24 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x24, Zknh_sha256sig0_cg_cp_rs1_b4, Zknh_sha256sig0_cg_cp_rs1_b4_str) +800000ec: 000a2683 lw x13,0(x20) +800000f0: 01868863 beq x13,x24,80000100 +800000f4: 7cd0176f jal x14,800020c0 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 8000463c .word 0x8000463c +80000100: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x303104a8 +80000104: 0005a283 lw x5,0(x11) +80000108: 00458593 addi x11,x11,4 + +8000010c : +Zknh_sha256sig0_cg_cp_rs1_b5: + sha256sig0 x2, x5 # perform operation +8000010c: 10229113 sha256sig0 x2,x5 + # Check if x2 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x2, Zknh_sha256sig0_cg_cp_rs1_b5, Zknh_sha256sig0_cg_cp_rs1_b5_str) +80000110: 000a2683 lw x13,0(x20) +80000114: 00268863 beq x13,x2,80000124 +80000118: 7a90176f jal x14,800020c0 +8000011c: 8000010c .word 0x8000010c +80000120: 80004673 .word 0x80004673 +80000124: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x53f29abc +80000128: 0005a303 lw x6,0(x11) +8000012c: 00458593 addi x11,x11,4 + +80000130 : +Zknh_sha256sig0_cg_cp_rs1_b6: + sha256sig0 x2, x6 # perform operation +80000130: 10231113 sha256sig0 x2,x6 + # Check if x2 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x2, Zknh_sha256sig0_cg_cp_rs1_b6, Zknh_sha256sig0_cg_cp_rs1_b6_str) +80000134: 000a2683 lw x13,0(x20) +80000138: 00268863 beq x13,x2,80000148 +8000013c: 7850176f jal x14,800020c0 +80000140: 80000130 .word 0x80000130 +80000144: 800046aa .word 0x800046aa +80000148: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xab1145e4 +8000014c: 0005a383 lw x7,0(x11) +80000150: 00458593 addi x11,x11,4 + +80000154 : +Zknh_sha256sig0_cg_cp_rs1_b7: + sha256sig0 x3, x7 # perform operation +80000154: 10239193 sha256sig0 x3,x7 + # Check if x3 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x3, Zknh_sha256sig0_cg_cp_rs1_b7, Zknh_sha256sig0_cg_cp_rs1_b7_str) +80000158: 000a2683 lw x13,0(x20) +8000015c: 00368863 beq x13,x3,8000016c +80000160: 7610176f jal x14,800020c0 +80000164: 80000154 .word 0x80000154 +80000168: 800046e1 .word 0x800046e1 +8000016c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x8f036178 +80000170: 0005a403 lw x8,0(x11) +80000174: 00458593 addi x11,x11,4 + +80000178 : +Zknh_sha256sig0_cg_cp_rs1_b8: + sha256sig0 x22, x8 # perform operation +80000178: 10241b13 sha256sig0 x22,x8 + # Check if x22 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x22, Zknh_sha256sig0_cg_cp_rs1_b8, Zknh_sha256sig0_cg_cp_rs1_b8_str) +8000017c: 000a2683 lw x13,0(x20) +80000180: 01668863 beq x13,x22,80000190 +80000184: 73d0176f jal x14,800020c0 +80000188: 80000178 .word 0x80000178 +8000018c: 80004718 .word 0x80004718 +80000190: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x96e3d885 +80000194: 0005a483 lw x9,0(x11) +80000198: 00458593 addi x11,x11,4 + +8000019c : +Zknh_sha256sig0_cg_cp_rs1_b9: + sha256sig0 x25, x9 # perform operation +8000019c: 10249c93 sha256sig0 x25,x9 + # Check if x25 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x25, Zknh_sha256sig0_cg_cp_rs1_b9, Zknh_sha256sig0_cg_cp_rs1_b9_str) +800001a0: 000a2683 lw x13,0(x20) +800001a4: 01968863 beq x13,x25,800001b4 +800001a8: 7190176f jal x14,800020c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000474f .word 0x8000474f +800001b4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x278e2257 +800001b8: 0005a503 lw x10,0(x11) +800001bc: 00458593 addi x11,x11,4 + +800001c0 : +Zknh_sha256sig0_cg_cp_rs1_b10: + sha256sig0 x15, x10 # perform operation +800001c0: 10251793 sha256sig0 x15,x10 + # Check if x15 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x15, Zknh_sha256sig0_cg_cp_rs1_b10, Zknh_sha256sig0_cg_cp_rs1_b10_str) +800001c4: 000a2683 lw x13,0(x20) +800001c8: 00f68863 beq x13,x15,800001d8 +800001cc: 6f50176f jal x14,800020c0 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80004787 .word 0x80004787 +800001d8: 004a0a13 addi x20,x20,4 + + mv x18, x11 # switch data pointer register to avoid conflict with test +800001dc: 00058913 addi x18,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xebd7e3e1 +800001e0: 00092583 lw x11,0(x18) +800001e4: 00490913 addi x18,x18,4 + +800001e8 : +Zknh_sha256sig0_cg_cp_rs1_b11: + sha256sig0 x3, x11 # perform operation +800001e8: 10259193 sha256sig0 x3,x11 + # Check if x3 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x3, Zknh_sha256sig0_cg_cp_rs1_b11, Zknh_sha256sig0_cg_cp_rs1_b11_str) +800001ec: 000a2683 lw x13,0(x20) +800001f0: 00368863 beq x13,x3,80000200 +800001f4: 6cd0176f jal x14,800020c0 +800001f8: 800001e8 .word 0x800001e8 +800001fc: 800047c0 .word 0x800047c0 +80000200: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x73ab5f3d +80000204: 00092603 lw x12,0(x18) +80000208: 00490913 addi x18,x18,4 + +8000020c : +Zknh_sha256sig0_cg_cp_rs1_b12: + sha256sig0 x30, x12 # perform operation +8000020c: 10261f13 sha256sig0 x30,x12 + # Check if x30 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x30, Zknh_sha256sig0_cg_cp_rs1_b12, Zknh_sha256sig0_cg_cp_rs1_b12_str) +80000210: 000a2683 lw x13,0(x20) +80000214: 01e68863 beq x13,x30,80000224 +80000218: 6a90176f jal x14,800020c0 +8000021c: 8000020c .word 0x8000020c +80000220: 800047f9 .word 0x800047f9 +80000224: 004a0a13 addi x20,x20,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000228: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000022c: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xdd3b55e1 +80000230: 00092683 lw x13,0(x18) +80000234: 00490913 addi x18,x18,4 + +80000238 : +Zknh_sha256sig0_cg_cp_rs1_b13: + sha256sig0 x22, x13 # perform operation +80000238: 10269b13 sha256sig0 x22,x13 + # Check if x22 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x22, Zknh_sha256sig0_cg_cp_rs1_b13, Zknh_sha256sig0_cg_cp_rs1_b13_str) +8000023c: 000a2383 lw x7,0(x20) +80000240: 01638863 beq x7,x22,80000250 +80000244: 6550146f jal x8,80002098 +80000248: 80000238 .word 0x80000238 +8000024c: 80004832 .word 0x80004832 +80000250: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x0d9b63c6 +80000254: 00092703 lw x14,0(x18) +80000258: 00490913 addi x18,x18,4 + +8000025c : +Zknh_sha256sig0_cg_cp_rs1_b14: + sha256sig0 x31, x14 # perform operation +8000025c: 10271f93 sha256sig0 x31,x14 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zknh_sha256sig0_cg_cp_rs1_b14, Zknh_sha256sig0_cg_cp_rs1_b14_str) +80000260: 000a2383 lw x7,0(x20) +80000264: 01f38863 beq x7,x31,80000274 +80000268: 6310146f jal x8,80002098 +8000026c: 8000025c .word 0x8000025c +80000270: 8000486b .word 0x8000486b +80000274: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x1d299db3 +80000278: 00092783 lw x15,0(x18) +8000027c: 00490913 addi x18,x18,4 + +80000280 : +Zknh_sha256sig0_cg_cp_rs1_b15: + sha256sig0 x16, x15 # perform operation +80000280: 10279813 sha256sig0 x16,x15 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zknh_sha256sig0_cg_cp_rs1_b15, Zknh_sha256sig0_cg_cp_rs1_b15_str) +80000284: 000a2383 lw x7,0(x20) +80000288: 01038863 beq x7,x16,80000298 +8000028c: 60d0146f jal x8,80002098 +80000290: 80000280 .word 0x80000280 +80000294: 800048a4 .word 0x800048a4 +80000298: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x3537a09f +8000029c: 00092803 lw x16,0(x18) +800002a0: 00490913 addi x18,x18,4 + +800002a4 : +Zknh_sha256sig0_cg_cp_rs1_b16: + sha256sig0 x11, x16 # perform operation +800002a4: 10281593 sha256sig0 x11,x16 + # Check if x11 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x11, Zknh_sha256sig0_cg_cp_rs1_b16, Zknh_sha256sig0_cg_cp_rs1_b16_str) +800002a8: 000a2383 lw x7,0(x20) +800002ac: 00b38863 beq x7,x11,800002bc +800002b0: 5e90146f jal x8,80002098 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 800048dd .word 0x800048dd +800002bc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x97aaf186 +800002c0: 00092883 lw x17,0(x18) +800002c4: 00490913 addi x18,x18,4 + +800002c8 : +Zknh_sha256sig0_cg_cp_rs1_b17: + sha256sig0 x23, x17 # perform operation +800002c8: 10289b93 sha256sig0 x23,x17 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zknh_sha256sig0_cg_cp_rs1_b17, Zknh_sha256sig0_cg_cp_rs1_b17_str) +800002cc: 000a2383 lw x7,0(x20) +800002d0: 01738863 beq x7,x23,800002e0 +800002d4: 5c50146f jal x8,80002098 +800002d8: 800002c8 .word 0x800002c8 +800002dc: 80004916 .word 0x80004916 +800002e0: 004a0a13 addi x20,x20,4 + + mv x31, x18 # switch data pointer register to avoid conflict with test +800002e4: 00090f93 addi x31,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x35b30620 +800002e8: 000fa903 lw x18,0(x31) +800002ec: 004f8f93 addi x31,x31,4 + +800002f0 : +Zknh_sha256sig0_cg_cp_rs1_b18: + sha256sig0 x3, x18 # perform operation +800002f0: 10291193 sha256sig0 x3,x18 + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zknh_sha256sig0_cg_cp_rs1_b18, Zknh_sha256sig0_cg_cp_rs1_b18_str) +800002f4: 000a2383 lw x7,0(x20) +800002f8: 00338863 beq x7,x3,80000308 +800002fc: 59d0146f jal x8,80002098 +80000300: 800002f0 .word 0x800002f0 +80000304: 8000494f .word 0x8000494f +80000308: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xc9ee05e2 +8000030c: 000fa983 lw x19,0(x31) +80000310: 004f8f93 addi x31,x31,4 + +80000314 : +Zknh_sha256sig0_cg_cp_rs1_b19: + sha256sig0 x6, x19 # perform operation +80000314: 10299313 sha256sig0 x6,x19 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zknh_sha256sig0_cg_cp_rs1_b19, Zknh_sha256sig0_cg_cp_rs1_b19_str) +80000318: 000a2383 lw x7,0(x20) +8000031c: 00638863 beq x7,x6,8000032c +80000320: 5790146f jal x8,80002098 +80000324: 80000314 .word 0x80000314 +80000328: 80004988 .word 0x80004988 +8000032c: 004a0a13 addi x20,x20,4 + + mv x9, x20 # switch signature pointer register to avoid conflict with test +80000330: 000a0493 addi x9,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x8d28a449 +80000334: 000faa03 lw x20,0(x31) +80000338: 004f8f93 addi x31,x31,4 + +8000033c : +Zknh_sha256sig0_cg_cp_rs1_b20: + sha256sig0 x16, x20 # perform operation +8000033c: 102a1813 sha256sig0 x16,x20 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zknh_sha256sig0_cg_cp_rs1_b20, Zknh_sha256sig0_cg_cp_rs1_b20_str) +80000340: 0004a383 lw x7,0(x9) +80000344: 01038863 beq x7,x16,80000354 +80000348: 5510146f jal x8,80002098 +8000034c: 8000033c .word 0x8000033c +80000350: 800049c1 .word 0x800049c1 +80000354: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xc22a0a0c +80000358: 000faa83 lw x21,0(x31) +8000035c: 004f8f93 addi x31,x31,4 + +80000360 : +Zknh_sha256sig0_cg_cp_rs1_b21: + sha256sig0 x18, x21 # perform operation +80000360: 102a9913 sha256sig0 x18,x21 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zknh_sha256sig0_cg_cp_rs1_b21, Zknh_sha256sig0_cg_cp_rs1_b21_str) +80000364: 0004a383 lw x7,0(x9) +80000368: 01238863 beq x7,x18,80000378 +8000036c: 52d0146f jal x8,80002098 +80000370: 80000360 .word 0x80000360 +80000374: 800049fa .word 0x800049fa +80000378: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x01372777 +8000037c: 000fab03 lw x22,0(x31) +80000380: 004f8f93 addi x31,x31,4 + +80000384 : +Zknh_sha256sig0_cg_cp_rs1_b22: + sha256sig0 x24, x22 # perform operation +80000384: 102b1c13 sha256sig0 x24,x22 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zknh_sha256sig0_cg_cp_rs1_b22, Zknh_sha256sig0_cg_cp_rs1_b22_str) +80000388: 0004a383 lw x7,0(x9) +8000038c: 01838863 beq x7,x24,8000039c +80000390: 5090146f jal x8,80002098 +80000394: 80000384 .word 0x80000384 +80000398: 80004a33 .word 0x80004a33 +8000039c: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xb54d9d9a +800003a0: 000fab83 lw x23,0(x31) +800003a4: 004f8f93 addi x31,x31,4 + +800003a8 : +Zknh_sha256sig0_cg_cp_rs1_b23: + sha256sig0 x3, x23 # perform operation +800003a8: 102b9193 sha256sig0 x3,x23 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zknh_sha256sig0_cg_cp_rs1_b23, Zknh_sha256sig0_cg_cp_rs1_b23_str) +800003ac: 0004a383 lw x7,0(x9) +800003b0: 00338863 beq x7,x3,800003c0 +800003b4: 4e50146f jal x8,80002098 +800003b8: 800003a8 .word 0x800003a8 +800003bc: 80004a6c .word 0x80004a6c +800003c0: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x9a0694b1 +800003c4: 000fac03 lw x24,0(x31) +800003c8: 004f8f93 addi x31,x31,4 + +800003cc : +Zknh_sha256sig0_cg_cp_rs1_b24: + sha256sig0 x29, x24 # perform operation +800003cc: 102c1e93 sha256sig0 x29,x24 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zknh_sha256sig0_cg_cp_rs1_b24, Zknh_sha256sig0_cg_cp_rs1_b24_str) +800003d0: 0004a383 lw x7,0(x9) +800003d4: 01d38863 beq x7,x29,800003e4 +800003d8: 4c10146f jal x8,80002098 +800003dc: 800003cc .word 0x800003cc +800003e0: 80004aa5 .word 0x80004aa5 +800003e4: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xff6585ee +800003e8: 000fac83 lw x25,0(x31) +800003ec: 004f8f93 addi x31,x31,4 + +800003f0 : +Zknh_sha256sig0_cg_cp_rs1_b25: + sha256sig0 x13, x25 # perform operation +800003f0: 102c9693 sha256sig0 x13,x25 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zknh_sha256sig0_cg_cp_rs1_b25, Zknh_sha256sig0_cg_cp_rs1_b25_str) +800003f4: 0004a383 lw x7,0(x9) +800003f8: 00d38863 beq x7,x13,80000408 +800003fc: 49d0146f jal x8,80002098 +80000400: 800003f0 .word 0x800003f0 +80000404: 80004ade .word 0x80004ade +80000408: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x662a0899 +8000040c: 000fad03 lw x26,0(x31) +80000410: 004f8f93 addi x31,x31,4 + +80000414 : +Zknh_sha256sig0_cg_cp_rs1_b26: + sha256sig0 x21, x26 # perform operation +80000414: 102d1a93 sha256sig0 x21,x26 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zknh_sha256sig0_cg_cp_rs1_b26, Zknh_sha256sig0_cg_cp_rs1_b26_str) +80000418: 0004a383 lw x7,0(x9) +8000041c: 01538863 beq x7,x21,8000042c +80000420: 4790146f jal x8,80002098 +80000424: 80000414 .word 0x80000414 +80000428: 80004b17 .word 0x80004b17 +8000042c: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xba500839 +80000430: 000fad83 lw x27,0(x31) +80000434: 004f8f93 addi x31,x31,4 + +80000438 : +Zknh_sha256sig0_cg_cp_rs1_b27: + sha256sig0 x29, x27 # perform operation +80000438: 102d9e93 sha256sig0 x29,x27 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zknh_sha256sig0_cg_cp_rs1_b27, Zknh_sha256sig0_cg_cp_rs1_b27_str) +8000043c: 0004a383 lw x7,0(x9) +80000440: 01d38863 beq x7,x29,80000450 +80000444: 4550146f jal x8,80002098 +80000448: 80000438 .word 0x80000438 +8000044c: 80004b50 .word 0x80004b50 +80000450: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x2697c706 +80000454: 000fae03 lw x28,0(x31) +80000458: 004f8f93 addi x31,x31,4 + +8000045c : +Zknh_sha256sig0_cg_cp_rs1_b28: + sha256sig0 x22, x28 # perform operation +8000045c: 102e1b13 sha256sig0 x22,x28 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zknh_sha256sig0_cg_cp_rs1_b28, Zknh_sha256sig0_cg_cp_rs1_b28_str) +80000460: 0004a383 lw x7,0(x9) +80000464: 01638863 beq x7,x22,80000474 +80000468: 4310146f jal x8,80002098 +8000046c: 8000045c .word 0x8000045c +80000470: 80004b89 .word 0x80004b89 +80000474: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xce763041 +80000478: 000fae83 lw x29,0(x31) +8000047c: 004f8f93 addi x31,x31,4 + +80000480 : +Zknh_sha256sig0_cg_cp_rs1_b29: + sha256sig0 x26, x29 # perform operation +80000480: 102e9d13 sha256sig0 x26,x29 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zknh_sha256sig0_cg_cp_rs1_b29, Zknh_sha256sig0_cg_cp_rs1_b29_str) +80000484: 0004a383 lw x7,0(x9) +80000488: 01a38863 beq x7,x26,80000498 +8000048c: 40d0146f jal x8,80002098 +80000490: 80000480 .word 0x80000480 +80000494: 80004bc2 .word 0x80004bc2 +80000498: 00448493 addi x9,x9,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x10c3b722 +8000049c: 000faf03 lw x30,0(x31) +800004a0: 004f8f93 addi x31,x31,4 + +800004a4 : +Zknh_sha256sig0_cg_cp_rs1_b30: + sha256sig0 x19, x30 # perform operation +800004a4: 102f1993 sha256sig0 x19,x30 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zknh_sha256sig0_cg_cp_rs1_b30, Zknh_sha256sig0_cg_cp_rs1_b30_str) +800004a8: 0004a383 lw x7,0(x9) +800004ac: 01338863 beq x7,x19,800004bc +800004b0: 3e90146f jal x8,80002098 +800004b4: 800004a4 .word 0x800004a4 +800004b8: 80004bfb .word 0x80004bfb +800004bc: 00448493 addi x9,x9,4 + + mv x21, x31 # switch data pointer register to avoid conflict with test +800004c0: 000f8a93 addi x21,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x27aefed6 +800004c4: 000aaf83 lw x31,0(x21) +800004c8: 004a8a93 addi x21,x21,4 + +800004cc : +Zknh_sha256sig0_cg_cp_rs1_b31: + sha256sig0 x18, x31 # perform operation +800004cc: 102f9913 sha256sig0 x18,x31 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zknh_sha256sig0_cg_cp_rs1_b31, Zknh_sha256sig0_cg_cp_rs1_b31_str) +800004d0: 0004a383 lw x7,0(x9) +800004d4: 01238863 beq x7,x18,800004e4 +800004d8: 3c10146f jal x8,80002098 +800004dc: 800004cc .word 0x800004cc +800004e0: 80004c34 .word 0x80004c34 +800004e4: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x342404e4 +800004e8: 000aa183 lw x3,0(x21) +800004ec: 004a8a93 addi x21,x21,4 + +800004f0 : +Zknh_sha256sig0_cg_cp_rd_b0: + sha256sig0 x0, x3 # perform operation +800004f0: 10219013 sha256sig0 x0,x3 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zknh_sha256sig0_cg_cp_rd_b0, Zknh_sha256sig0_cg_cp_rd_b0_str) +800004f4: 0004a383 lw x7,0(x9) +800004f8: 00038863 beq x7,x0,80000508 +800004fc: 39d0146f jal x8,80002098 +80000500: 800004f0 .word 0x800004f0 +80000504: 80004c6d .word 0x80004c6d +80000508: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x90c2297c +8000050c: 000aaa03 lw x20,0(x21) +80000510: 004a8a93 addi x21,x21,4 + +80000514 : +Zknh_sha256sig0_cg_cp_rd_b1: + sha256sig0 x1, x20 # perform operation +80000514: 102a1093 sha256sig0 x1,x20 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zknh_sha256sig0_cg_cp_rd_b1, Zknh_sha256sig0_cg_cp_rd_b1_str) +80000518: 0004a383 lw x7,0(x9) +8000051c: 00138863 beq x7,x1,8000052c +80000520: 3790146f jal x8,80002098 +80000524: 80000514 .word 0x80000514 +80000528: 80004ca4 .word 0x80004ca4 +8000052c: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x009c9f28 +80000530: 000aa703 lw x14,0(x21) +80000534: 004a8a93 addi x21,x21,4 + +80000538 : +Zknh_sha256sig0_cg_cp_rd_b2: + sha256sig0 x2, x14 # perform operation +80000538: 10271113 sha256sig0 x2,x14 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zknh_sha256sig0_cg_cp_rd_b2, Zknh_sha256sig0_cg_cp_rd_b2_str) +8000053c: 0004a383 lw x7,0(x9) +80000540: 00238863 beq x7,x2,80000550 +80000544: 3550146f jal x8,80002098 +80000548: 80000538 .word 0x80000538 +8000054c: 80004cdb .word 0x80004cdb +80000550: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xa4612556 +80000554: 000aa083 lw x1,0(x21) +80000558: 004a8a93 addi x21,x21,4 + +8000055c : +Zknh_sha256sig0_cg_cp_rd_b3: + sha256sig0 x3, x1 # perform operation +8000055c: 10209193 sha256sig0 x3,x1 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zknh_sha256sig0_cg_cp_rd_b3, Zknh_sha256sig0_cg_cp_rd_b3_str) +80000560: 0004a383 lw x7,0(x9) +80000564: 00338863 beq x7,x3,80000574 +80000568: 3310146f jal x8,80002098 +8000056c: 8000055c .word 0x8000055c +80000570: 80004d12 .word 0x80004d12 +80000574: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x36bcd87b +80000578: 000aa703 lw x14,0(x21) +8000057c: 004a8a93 addi x21,x21,4 + +80000580 : +Zknh_sha256sig0_cg_cp_rd_b4: + sha256sig0 x4, x14 # perform operation +80000580: 10271213 sha256sig0 x4,x14 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zknh_sha256sig0_cg_cp_rd_b4, Zknh_sha256sig0_cg_cp_rd_b4_str) +80000584: 0004a383 lw x7,0(x9) +80000588: 00438863 beq x7,x4,80000598 +8000058c: 30d0146f jal x8,80002098 +80000590: 80000580 .word 0x80000580 +80000594: 80004d49 .word 0x80004d49 +80000598: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xac3d81a8 +8000059c: 000aaf83 lw x31,0(x21) +800005a0: 004a8a93 addi x21,x21,4 + +800005a4 : +Zknh_sha256sig0_cg_cp_rd_b5: + sha256sig0 x5, x31 # perform operation +800005a4: 102f9293 sha256sig0 x5,x31 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zknh_sha256sig0_cg_cp_rd_b5, Zknh_sha256sig0_cg_cp_rd_b5_str) +800005a8: 0004a383 lw x7,0(x9) +800005ac: 00538863 beq x7,x5,800005bc +800005b0: 2e90146f jal x8,80002098 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 80004d80 .word 0x80004d80 +800005bc: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x93e35a61 +800005c0: 000aae03 lw x28,0(x21) +800005c4: 004a8a93 addi x21,x21,4 + +800005c8 : +Zknh_sha256sig0_cg_cp_rd_b6: + sha256sig0 x6, x28 # perform operation +800005c8: 102e1313 sha256sig0 x6,x28 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zknh_sha256sig0_cg_cp_rd_b6, Zknh_sha256sig0_cg_cp_rd_b6_str) +800005cc: 0004a383 lw x7,0(x9) +800005d0: 00638863 beq x7,x6,800005e0 +800005d4: 2c50146f jal x8,80002098 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 80004db7 .word 0x80004db7 +800005e0: 00448493 addi x9,x9,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005e4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005e8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xeef672a5 +800005ec: 000aac03 lw x24,0(x21) +800005f0: 004a8a93 addi x21,x21,4 + +800005f4 : +Zknh_sha256sig0_cg_cp_rd_b7: + sha256sig0 x7, x24 # perform operation +800005f4: 102c1393 sha256sig0 x7,x24 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zknh_sha256sig0_cg_cp_rd_b7, Zknh_sha256sig0_cg_cp_rd_b7_str) +800005f8: 0004a203 lw x4,0(x9) +800005fc: 00720863 beq x4,x7,8000060c +80000600: 281012ef jal x5,80002080 +80000604: 800005f4 .word 0x800005f4 +80000608: 80004dee .word 0x80004dee +8000060c: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xf27f2e33 +80000610: 000aa083 lw x1,0(x21) +80000614: 004a8a93 addi x21,x21,4 + +80000618 : +Zknh_sha256sig0_cg_cp_rd_b8: + sha256sig0 x8, x1 # perform operation +80000618: 10209413 sha256sig0 x8,x1 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zknh_sha256sig0_cg_cp_rd_b8, Zknh_sha256sig0_cg_cp_rd_b8_str) +8000061c: 0004a203 lw x4,0(x9) +80000620: 00820863 beq x4,x8,80000630 +80000624: 25d012ef jal x5,80002080 +80000628: 80000618 .word 0x80000618 +8000062c: 80004e25 .word 0x80004e25 +80000630: 00448493 addi x9,x9,4 + + mv x15, x9 # switch signature pointer register to avoid conflict with test +80000634: 00048793 addi x15,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x2136ed7c +80000638: 000aa083 lw x1,0(x21) +8000063c: 004a8a93 addi x21,x21,4 + +80000640 : +Zknh_sha256sig0_cg_cp_rd_b9: + sha256sig0 x9, x1 # perform operation +80000640: 10209493 sha256sig0 x9,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha256sig0_cg_cp_rd_b9, Zknh_sha256sig0_cg_cp_rd_b9_str) +80000644: 0007a203 lw x4,0(x15) +80000648: 00920863 beq x4,x9,80000658 +8000064c: 235012ef jal x5,80002080 +80000650: 80000640 .word 0x80000640 +80000654: 80004e5c .word 0x80004e5c +80000658: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x4e2bc962 +8000065c: 000aa583 lw x11,0(x21) +80000660: 004a8a93 addi x21,x21,4 + +80000664 : +Zknh_sha256sig0_cg_cp_rd_b10: + sha256sig0 x10, x11 # perform operation +80000664: 10259513 sha256sig0 x10,x11 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha256sig0_cg_cp_rd_b10, Zknh_sha256sig0_cg_cp_rd_b10_str) +80000668: 0007a203 lw x4,0(x15) +8000066c: 00a20863 beq x4,x10,8000067c +80000670: 211012ef jal x5,80002080 +80000674: 80000664 .word 0x80000664 +80000678: 80004e93 .word 0x80004e93 +8000067c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x257559b7 +80000680: 000aad03 lw x26,0(x21) +80000684: 004a8a93 addi x21,x21,4 + +80000688 : +Zknh_sha256sig0_cg_cp_rd_b11: + sha256sig0 x11, x26 # perform operation +80000688: 102d1593 sha256sig0 x11,x26 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha256sig0_cg_cp_rd_b11, Zknh_sha256sig0_cg_cp_rd_b11_str) +8000068c: 0007a203 lw x4,0(x15) +80000690: 00b20863 beq x4,x11,800006a0 +80000694: 1ed012ef jal x5,80002080 +80000698: 80000688 .word 0x80000688 +8000069c: 80004ecb .word 0x80004ecb +800006a0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x35d5f491 +800006a4: 000aa183 lw x3,0(x21) +800006a8: 004a8a93 addi x21,x21,4 + +800006ac : +Zknh_sha256sig0_cg_cp_rd_b12: + sha256sig0 x12, x3 # perform operation +800006ac: 10219613 sha256sig0 x12,x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha256sig0_cg_cp_rd_b12, Zknh_sha256sig0_cg_cp_rd_b12_str) +800006b0: 0007a203 lw x4,0(x15) +800006b4: 00c20863 beq x4,x12,800006c4 +800006b8: 1c9012ef jal x5,80002080 +800006bc: 800006ac .word 0x800006ac +800006c0: 80004f03 .word 0x80004f03 +800006c4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xe8b4ea49 +800006c8: 000aa903 lw x18,0(x21) +800006cc: 004a8a93 addi x21,x21,4 + +800006d0 : +Zknh_sha256sig0_cg_cp_rd_b13: + sha256sig0 x13, x18 # perform operation +800006d0: 10291693 sha256sig0 x13,x18 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha256sig0_cg_cp_rd_b13, Zknh_sha256sig0_cg_cp_rd_b13_str) +800006d4: 0007a203 lw x4,0(x15) +800006d8: 00d20863 beq x4,x13,800006e8 +800006dc: 1a5012ef jal x5,80002080 +800006e0: 800006d0 .word 0x800006d0 +800006e4: 80004f3b .word 0x80004f3b +800006e8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x6dfac81f +800006ec: 000aaf03 lw x30,0(x21) +800006f0: 004a8a93 addi x21,x21,4 + +800006f4 : +Zknh_sha256sig0_cg_cp_rd_b14: + sha256sig0 x14, x30 # perform operation +800006f4: 102f1713 sha256sig0 x14,x30 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha256sig0_cg_cp_rd_b14, Zknh_sha256sig0_cg_cp_rd_b14_str) +800006f8: 0007a203 lw x4,0(x15) +800006fc: 00e20863 beq x4,x14,8000070c +80000700: 181012ef jal x5,80002080 +80000704: 800006f4 .word 0x800006f4 +80000708: 80004f73 .word 0x80004f73 +8000070c: 00478793 addi x15,x15,4 + + mv x30, x15 # switch signature pointer register to avoid conflict with test +80000710: 00078f13 addi x30,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x0e121c35 +80000714: 000aa103 lw x2,0(x21) +80000718: 004a8a93 addi x21,x21,4 + +8000071c : +Zknh_sha256sig0_cg_cp_rd_b15: + sha256sig0 x15, x2 # perform operation +8000071c: 10211793 sha256sig0 x15,x2 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zknh_sha256sig0_cg_cp_rd_b15, Zknh_sha256sig0_cg_cp_rd_b15_str) +80000720: 000f2203 lw x4,0(x30) +80000724: 00f20863 beq x4,x15,80000734 +80000728: 159012ef jal x5,80002080 +8000072c: 8000071c .word 0x8000071c +80000730: 80004fab .word 0x80004fab +80000734: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x3b34d17f +80000738: 000aa983 lw x19,0(x21) +8000073c: 004a8a93 addi x21,x21,4 + +80000740 : +Zknh_sha256sig0_cg_cp_rd_b16: + sha256sig0 x16, x19 # perform operation +80000740: 10299813 sha256sig0 x16,x19 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zknh_sha256sig0_cg_cp_rd_b16, Zknh_sha256sig0_cg_cp_rd_b16_str) +80000744: 000f2203 lw x4,0(x30) +80000748: 01020863 beq x4,x16,80000758 +8000074c: 135012ef jal x5,80002080 +80000750: 80000740 .word 0x80000740 +80000754: 80004fe3 .word 0x80004fe3 +80000758: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x03090783 +8000075c: 000aa003 lw x0,0(x21) +80000760: 004a8a93 addi x21,x21,4 + +80000764 : +Zknh_sha256sig0_cg_cp_rd_b17: + sha256sig0 x17, x0 # perform operation +80000764: 10201893 sha256sig0 x17,x0 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zknh_sha256sig0_cg_cp_rd_b17, Zknh_sha256sig0_cg_cp_rd_b17_str) +80000768: 000f2203 lw x4,0(x30) +8000076c: 01120863 beq x4,x17,8000077c +80000770: 111012ef jal x5,80002080 +80000774: 80000764 .word 0x80000764 +80000778: 8000501b .word 0x8000501b +8000077c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x290a8cf5 +80000780: 000aad83 lw x27,0(x21) +80000784: 004a8a93 addi x21,x21,4 + +80000788 : +Zknh_sha256sig0_cg_cp_rd_b18: + sha256sig0 x18, x27 # perform operation +80000788: 102d9913 sha256sig0 x18,x27 + # Check if x18 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x18, Zknh_sha256sig0_cg_cp_rd_b18, Zknh_sha256sig0_cg_cp_rd_b18_str) +8000078c: 000f2203 lw x4,0(x30) +80000790: 01220863 beq x4,x18,800007a0 +80000794: 0ed012ef jal x5,80002080 +80000798: 80000788 .word 0x80000788 +8000079c: 80005053 .word 0x80005053 +800007a0: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x0e9bbda5 +800007a4: 000aa303 lw x6,0(x21) +800007a8: 004a8a93 addi x21,x21,4 + +800007ac : +Zknh_sha256sig0_cg_cp_rd_b19: + sha256sig0 x19, x6 # perform operation +800007ac: 10231993 sha256sig0 x19,x6 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha256sig0_cg_cp_rd_b19, Zknh_sha256sig0_cg_cp_rd_b19_str) +800007b0: 000f2203 lw x4,0(x30) +800007b4: 01320863 beq x4,x19,800007c4 +800007b8: 0c9012ef jal x5,80002080 +800007bc: 800007ac .word 0x800007ac +800007c0: 8000508b .word 0x8000508b +800007c4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x7bdc933f +800007c8: 000aa603 lw x12,0(x21) +800007cc: 004a8a93 addi x21,x21,4 + +800007d0 : +Zknh_sha256sig0_cg_cp_rd_b20: + sha256sig0 x20, x12 # perform operation +800007d0: 10261a13 sha256sig0 x20,x12 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zknh_sha256sig0_cg_cp_rd_b20, Zknh_sha256sig0_cg_cp_rd_b20_str) +800007d4: 000f2203 lw x4,0(x30) +800007d8: 01420863 beq x4,x20,800007e8 +800007dc: 0a5012ef jal x5,80002080 +800007e0: 800007d0 .word 0x800007d0 +800007e4: 800050c3 .word 0x800050c3 +800007e8: 004f0f13 addi x30,x30,4 + + mv x23, x21 # switch data pointer register to avoid conflict with test +800007ec: 000a8b93 addi x23,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x155f1085 +800007f0: 000ba983 lw x19,0(x23) +800007f4: 004b8b93 addi x23,x23,4 + +800007f8 : +Zknh_sha256sig0_cg_cp_rd_b21: + sha256sig0 x21, x19 # perform operation +800007f8: 10299a93 sha256sig0 x21,x19 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zknh_sha256sig0_cg_cp_rd_b21, Zknh_sha256sig0_cg_cp_rd_b21_str) +800007fc: 000f2203 lw x4,0(x30) +80000800: 01520863 beq x4,x21,80000810 +80000804: 07d012ef jal x5,80002080 +80000808: 800007f8 .word 0x800007f8 +8000080c: 800050fb .word 0x800050fb +80000810: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x1785fc83 +80000814: 000baf83 lw x31,0(x23) +80000818: 004b8b93 addi x23,x23,4 + +8000081c : +Zknh_sha256sig0_cg_cp_rd_b22: + sha256sig0 x22, x31 # perform operation +8000081c: 102f9b13 sha256sig0 x22,x31 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zknh_sha256sig0_cg_cp_rd_b22, Zknh_sha256sig0_cg_cp_rd_b22_str) +80000820: 000f2203 lw x4,0(x30) +80000824: 01620863 beq x4,x22,80000834 +80000828: 059012ef jal x5,80002080 +8000082c: 8000081c .word 0x8000081c +80000830: 80005133 .word 0x80005133 +80000834: 004f0f13 addi x30,x30,4 + + mv x1, x23 # switch data pointer register to avoid conflict with test +80000838: 000b8093 addi x1,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xfd752fac +8000083c: 0000aa03 lw x20,0(x1) +80000840: 00408093 addi x1,x1,4 + +80000844 : +Zknh_sha256sig0_cg_cp_rd_b23: + sha256sig0 x23, x20 # perform operation +80000844: 102a1b93 sha256sig0 x23,x20 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zknh_sha256sig0_cg_cp_rd_b23, Zknh_sha256sig0_cg_cp_rd_b23_str) +80000848: 000f2203 lw x4,0(x30) +8000084c: 01720863 beq x4,x23,8000085c +80000850: 031012ef jal x5,80002080 +80000854: 80000844 .word 0x80000844 +80000858: 8000516b .word 0x8000516b +8000085c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5d464454 +80000860: 0000a583 lw x11,0(x1) +80000864: 00408093 addi x1,x1,4 + +80000868 : +Zknh_sha256sig0_cg_cp_rd_b24: + sha256sig0 x24, x11 # perform operation +80000868: 10259c13 sha256sig0 x24,x11 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknh_sha256sig0_cg_cp_rd_b24, Zknh_sha256sig0_cg_cp_rd_b24_str) +8000086c: 000f2203 lw x4,0(x30) +80000870: 01820863 beq x4,x24,80000880 +80000874: 00d012ef jal x5,80002080 +80000878: 80000868 .word 0x80000868 +8000087c: 800051a3 .word 0x800051a3 +80000880: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xbf4a8c7a +80000884: 0000a783 lw x15,0(x1) +80000888: 00408093 addi x1,x1,4 + +8000088c : +Zknh_sha256sig0_cg_cp_rd_b25: + sha256sig0 x25, x15 # perform operation +8000088c: 10279c93 sha256sig0 x25,x15 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha256sig0_cg_cp_rd_b25, Zknh_sha256sig0_cg_cp_rd_b25_str) +80000890: 000f2203 lw x4,0(x30) +80000894: 01920863 beq x4,x25,800008a4 +80000898: 7e8012ef jal x5,80002080 +8000089c: 8000088c .word 0x8000088c +800008a0: 800051db .word 0x800051db +800008a4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xc4ea2dfb +800008a8: 0000ae03 lw x28,0(x1) +800008ac: 00408093 addi x1,x1,4 + +800008b0 : +Zknh_sha256sig0_cg_cp_rd_b26: + sha256sig0 x26, x28 # perform operation +800008b0: 102e1d13 sha256sig0 x26,x28 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zknh_sha256sig0_cg_cp_rd_b26, Zknh_sha256sig0_cg_cp_rd_b26_str) +800008b4: 000f2203 lw x4,0(x30) +800008b8: 01a20863 beq x4,x26,800008c8 +800008bc: 7c4012ef jal x5,80002080 +800008c0: 800008b0 .word 0x800008b0 +800008c4: 80005213 .word 0x80005213 +800008c8: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x1cf0fae1 +800008cc: 0000a403 lw x8,0(x1) +800008d0: 00408093 addi x1,x1,4 + +800008d4 : +Zknh_sha256sig0_cg_cp_rd_b27: + sha256sig0 x27, x8 # perform operation +800008d4: 10241d93 sha256sig0 x27,x8 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknh_sha256sig0_cg_cp_rd_b27, Zknh_sha256sig0_cg_cp_rd_b27_str) +800008d8: 000f2203 lw x4,0(x30) +800008dc: 01b20863 beq x4,x27,800008ec +800008e0: 7a0012ef jal x5,80002080 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 8000524b .word 0x8000524b +800008ec: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x94e08abe +800008f0: 0000a583 lw x11,0(x1) +800008f4: 00408093 addi x1,x1,4 + +800008f8 : +Zknh_sha256sig0_cg_cp_rd_b28: + sha256sig0 x28, x11 # perform operation +800008f8: 10259e13 sha256sig0 x28,x11 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknh_sha256sig0_cg_cp_rd_b28, Zknh_sha256sig0_cg_cp_rd_b28_str) +800008fc: 000f2203 lw x4,0(x30) +80000900: 01c20863 beq x4,x28,80000910 +80000904: 77c012ef jal x5,80002080 +80000908: 800008f8 .word 0x800008f8 +8000090c: 80005283 .word 0x80005283 +80000910: 004f0f13 addi x30,x30,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xf2366114 +80000914: 0000a883 lw x17,0(x1) +80000918: 00408093 addi x1,x1,4 + +8000091c : +Zknh_sha256sig0_cg_cp_rd_b29: + sha256sig0 x29, x17 # perform operation +8000091c: 10289e93 sha256sig0 x29,x17 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknh_sha256sig0_cg_cp_rd_b29, Zknh_sha256sig0_cg_cp_rd_b29_str) +80000920: 000f2203 lw x4,0(x30) +80000924: 01d20863 beq x4,x29,80000934 +80000928: 758012ef jal x5,80002080 +8000092c: 8000091c .word 0x8000091c +80000930: 800052bb .word 0x800052bb +80000934: 004f0f13 addi x30,x30,4 + + mv x25, x30 # switch signature pointer register to avoid conflict with test +80000938: 000f0c93 addi x25,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x83874a87 +8000093c: 0000ab83 lw x23,0(x1) +80000940: 00408093 addi x1,x1,4 + +80000944 : +Zknh_sha256sig0_cg_cp_rd_b30: + sha256sig0 x30, x23 # perform operation +80000944: 102b9f13 sha256sig0 x30,x23 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zknh_sha256sig0_cg_cp_rd_b30, Zknh_sha256sig0_cg_cp_rd_b30_str) +80000948: 000ca203 lw x4,0(x25) +8000094c: 01e20863 beq x4,x30,8000095c +80000950: 730012ef jal x5,80002080 +80000954: 80000944 .word 0x80000944 +80000958: 800052f3 .word 0x800052f3 +8000095c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x606af1b0 +80000960: 0000a883 lw x17,0(x1) +80000964: 00408093 addi x1,x1,4 + +80000968 : +Zknh_sha256sig0_cg_cp_rd_b31: + sha256sig0 x31, x17 # perform operation +80000968: 10289f93 sha256sig0 x31,x17 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zknh_sha256sig0_cg_cp_rd_b31, Zknh_sha256sig0_cg_cp_rd_b31_str) +8000096c: 000ca203 lw x4,0(x25) +80000970: 01f20863 beq x4,x31,80000980 +80000974: 70c012ef jal x5,80002080 +80000978: 80000968 .word 0x80000968 +8000097c: 8000532b .word 0x8000532b +80000980: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000000 +80000984: 0000aa03 lw x20,0(x1) +80000988: 00408093 addi x1,x1,4 + +8000098c : +Zknh_sha256sig0_cg_cp_rs1_edges_0x0: + sha256sig0 x13, x20 # perform operation +8000098c: 102a1693 sha256sig0 x13,x20 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknh_sha256sig0_cg_cp_rs1_edges_0x0, Zknh_sha256sig0_cg_cp_rs1_edges_0x0_str) +80000990: 000ca203 lw x4,0(x25) +80000994: 00d20863 beq x4,x13,800009a4 +80000998: 6e8012ef jal x5,80002080 +8000099c: 8000098c .word 0x8000098c +800009a0: 80005363 .word 0x80005363 +800009a4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x00000001 +800009a8: 0000ad03 lw x26,0(x1) +800009ac: 00408093 addi x1,x1,4 + +800009b0 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x1: + sha256sig0 x31, x26 # perform operation +800009b0: 102d1f93 sha256sig0 x31,x26 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zknh_sha256sig0_cg_cp_rs1_edges_0x1, Zknh_sha256sig0_cg_cp_rs1_edges_0x1_str) +800009b4: 000ca203 lw x4,0(x25) +800009b8: 01f20863 beq x4,x31,800009c8 +800009bc: 6c4012ef jal x5,80002080 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 800053a2 .word 0x800053a2 +800009c8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000002 +800009cc: 0000af03 lw x30,0(x1) +800009d0: 00408093 addi x1,x1,4 + +800009d4 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x2: + sha256sig0 x9, x30 # perform operation +800009d4: 102f1493 sha256sig0 x9,x30 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha256sig0_cg_cp_rs1_edges_0x2, Zknh_sha256sig0_cg_cp_rs1_edges_0x2_str) +800009d8: 000ca203 lw x4,0(x25) +800009dc: 00920863 beq x4,x9,800009ec +800009e0: 6a0012ef jal x5,80002080 +800009e4: 800009d4 .word 0x800009d4 +800009e8: 800053e1 .word 0x800053e1 +800009ec: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x80000000 +800009f0: 0000ac03 lw x24,0(x1) +800009f4: 00408093 addi x1,x1,4 + +800009f8 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x80000000: + sha256sig0 x9, x24 # perform operation +800009f8: 102c1493 sha256sig0 x9,x24 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha256sig0_cg_cp_rs1_edges_0x80000000, Zknh_sha256sig0_cg_cp_rs1_edges_0x80000000_str) +800009fc: 000ca203 lw x4,0(x25) +80000a00: 00920863 beq x4,x9,80000a10 +80000a04: 67c012ef jal x5,80002080 +80000a08: 800009f8 .word 0x800009f8 +80000a0c: 80005420 .word 0x80005420 +80000a10: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x80000001 +80000a14: 0000af83 lw x31,0(x1) +80000a18: 00408093 addi x1,x1,4 + +80000a1c : +Zknh_sha256sig0_cg_cp_rs1_edges_0x80000001: + sha256sig0 x6, x31 # perform operation +80000a1c: 102f9313 sha256sig0 x6,x31 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zknh_sha256sig0_cg_cp_rs1_edges_0x80000001, Zknh_sha256sig0_cg_cp_rs1_edges_0x80000001_str) +80000a20: 000ca203 lw x4,0(x25) +80000a24: 00620863 beq x4,x6,80000a34 +80000a28: 658012ef jal x5,80002080 +80000a2c: 80000a1c .word 0x80000a1c +80000a30: 80005466 .word 0x80005466 +80000a34: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7fffffff +80000a38: 0000ab03 lw x22,0(x1) +80000a3c: 00408093 addi x1,x1,4 + +80000a40 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffff: + sha256sig0 x21, x22 # perform operation +80000a40: 102b1a93 sha256sig0 x21,x22 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffff, Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffff_str) +80000a44: 000ca203 lw x4,0(x25) +80000a48: 01520863 beq x4,x21,80000a58 +80000a4c: 634012ef jal x5,80002080 +80000a50: 80000a40 .word 0x80000a40 +80000a54: 800054ac .word 0x800054ac +80000a58: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x7ffffffe +80000a5c: 0000a983 lw x19,0(x1) +80000a60: 00408093 addi x1,x1,4 + +80000a64 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffe: + sha256sig0 x28, x19 # perform operation +80000a64: 10299e13 sha256sig0 x28,x19 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffe_str) +80000a68: 000ca203 lw x4,0(x25) +80000a6c: 01c20863 beq x4,x28,80000a7c +80000a70: 610012ef jal x5,80002080 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 800054f2 .word 0x800054f2 +80000a7c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xffffffff +80000a80: 0000ae83 lw x29,0(x1) +80000a84: 00408093 addi x1,x1,4 + +80000a88 : +Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff: + sha256sig0 x31, x29 # perform operation +80000a88: 102e9f93 sha256sig0 x31,x29 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff_str) +80000a8c: 000ca203 lw x4,0(x25) +80000a90: 01f20863 beq x4,x31,80000aa0 +80000a94: 5ec012ef jal x5,80002080 +80000a98: 80000a88 .word 0x80000a88 +80000a9c: 80005538 .word 0x80005538 +80000aa0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xfffffffe +80000aa4: 0000aa83 lw x21,0(x1) +80000aa8: 00408093 addi x1,x1,4 + +80000aac : +Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe: + sha256sig0 x12, x21 # perform operation +80000aac: 102a9613 sha256sig0 x12,x21 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe_str) +80000ab0: 000ca203 lw x4,0(x25) +80000ab4: 00c20863 beq x4,x12,80000ac4 +80000ab8: 5c8012ef jal x5,80002080 +80000abc: 80000aac .word 0x80000aac +80000ac0: 8000557e .word 0x8000557e +80000ac4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x5bbc8872 +80000ac8: 0000a503 lw x10,0(x1) +80000acc: 00408093 addi x1,x1,4 + +80000ad0 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc8872: + sha256sig0 x6, x10 # perform operation +80000ad0: 10251313 sha256sig0 x6,x10 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc8872_str) +80000ad4: 000ca203 lw x4,0(x25) +80000ad8: 00620863 beq x4,x6,80000ae8 +80000adc: 5a4012ef jal x5,80002080 +80000ae0: 80000ad0 .word 0x80000ad0 +80000ae4: 800055c4 .word 0x800055c4 +80000ae8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xaaaaaaaa +80000aec: 0000a383 lw x7,0(x1) +80000af0: 00408093 addi x1,x1,4 + +80000af4 : +Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaa: + sha256sig0 x23, x7 # perform operation +80000af4: 10239b93 sha256sig0 x23,x7 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000af8: 000ca203 lw x4,0(x25) +80000afc: 01720863 beq x4,x23,80000b0c +80000b00: 580012ef jal x5,80002080 +80000b04: 80000af4 .word 0x80000af4 +80000b08: 8000560a .word 0x8000560a +80000b0c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x55555555 +80000b10: 0000ac03 lw x24,0(x1) +80000b14: 00408093 addi x1,x1,4 + +80000b18 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x55555555: + sha256sig0 x8, x24 # perform operation +80000b18: 102c1413 sha256sig0 x8,x24 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zknh_sha256sig0_cg_cp_rs1_edges_0x55555555, Zknh_sha256sig0_cg_cp_rs1_edges_0x55555555_str) +80000b1c: 000ca203 lw x4,0(x25) +80000b20: 00820863 beq x4,x8,80000b30 +80000b24: 55c012ef jal x5,80002080 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 80005650 .word 0x80005650 +80000b30: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0xdee54b14 +80000b34: 0000a003 lw x0,0(x1) +80000b38: 00408093 addi x1,x1,4 + +80000b3c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b0: + sha256sig0 x0, x0 # perform operation +80000b3c: 10201013 sha256sig0 x0,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zknh_sha256sig0_cg_cmp_rd_rs1_b0, Zknh_sha256sig0_cg_cmp_rd_rs1_b0_str) +80000b40: 000ca203 lw x4,0(x25) +80000b44: 00020863 beq x4,x0,80000b54 +80000b48: 538012ef jal x5,80002080 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 80005696 .word 0x80005696 +80000b54: 004c8c93 addi x25,x25,4 + + mv x26, x1 # switch data pointer register to avoid conflict with test +80000b58: 00008d13 addi x26,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs1: x1 = 0xbf09264c +80000b5c: 000d2083 lw x1,0(x26) +80000b60: 004d0d13 addi x26,x26,4 + +80000b64 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b1: + sha256sig0 x1, x1 # perform operation +80000b64: 10209093 sha256sig0 x1,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zknh_sha256sig0_cg_cmp_rd_rs1_b1, Zknh_sha256sig0_cg_cmp_rd_rs1_b1_str) +80000b68: 000ca203 lw x4,0(x25) +80000b6c: 00120863 beq x4,x1,80000b7c +80000b70: 510012ef jal x5,80002080 +80000b74: 80000b64 .word 0x80000b64 +80000b78: 800056d2 .word 0x800056d2 +80000b7c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xc470136b +80000b80: 000d2103 lw x2,0(x26) +80000b84: 004d0d13 addi x26,x26,4 + +80000b88 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b2: + sha256sig0 x2, x2 # perform operation +80000b88: 10211113 sha256sig0 x2,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknh_sha256sig0_cg_cmp_rd_rs1_b2, Zknh_sha256sig0_cg_cmp_rd_rs1_b2_str) +80000b8c: 000ca203 lw x4,0(x25) +80000b90: 00220863 beq x4,x2,80000ba0 +80000b94: 4ec012ef jal x5,80002080 +80000b98: 80000b88 .word 0x80000b88 +80000b9c: 8000570e .word 0x8000570e +80000ba0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x4e8b7e45 +80000ba4: 000d2183 lw x3,0(x26) +80000ba8: 004d0d13 addi x26,x26,4 + +80000bac : +Zknh_sha256sig0_cg_cmp_rd_rs1_b3: + sha256sig0 x3, x3 # perform operation +80000bac: 10219193 sha256sig0 x3,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknh_sha256sig0_cg_cmp_rd_rs1_b3, Zknh_sha256sig0_cg_cmp_rd_rs1_b3_str) +80000bb0: 000ca203 lw x4,0(x25) +80000bb4: 00320863 beq x4,x3,80000bc4 +80000bb8: 4c8012ef jal x5,80002080 +80000bbc: 80000bac .word 0x80000bac +80000bc0: 8000574a .word 0x8000574a +80000bc4: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000bc8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000bcc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x88c170e5 +80000bd0: 000d2203 lw x4,0(x26) +80000bd4: 004d0d13 addi x26,x26,4 + +80000bd8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b4: + sha256sig0 x4, x4 # perform operation +80000bd8: 10221213 sha256sig0 x4,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zknh_sha256sig0_cg_cmp_rd_rs1_b4, Zknh_sha256sig0_cg_cmp_rd_rs1_b4_str) +80000bdc: 000ca383 lw x7,0(x25) +80000be0: 00438863 beq x7,x4,80000bf0 +80000be4: 4b40146f jal x8,80002098 +80000be8: 80000bd8 .word 0x80000bd8 +80000bec: 80005786 .word 0x80005786 +80000bf0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0xd9e0c166 +80000bf4: 000d2283 lw x5,0(x26) +80000bf8: 004d0d13 addi x26,x26,4 + +80000bfc : +Zknh_sha256sig0_cg_cmp_rd_rs1_b5: + sha256sig0 x5, x5 # perform operation +80000bfc: 10229293 sha256sig0 x5,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknh_sha256sig0_cg_cmp_rd_rs1_b5, Zknh_sha256sig0_cg_cmp_rd_rs1_b5_str) +80000c00: 000ca383 lw x7,0(x25) +80000c04: 00538863 beq x7,x5,80000c14 +80000c08: 4900146f jal x8,80002098 +80000c0c: 80000bfc .word 0x80000bfc +80000c10: 800057c2 .word 0x800057c2 +80000c14: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x45bf55ae +80000c18: 000d2303 lw x6,0(x26) +80000c1c: 004d0d13 addi x26,x26,4 + +80000c20 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b6: + sha256sig0 x6, x6 # perform operation +80000c20: 10231313 sha256sig0 x6,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknh_sha256sig0_cg_cmp_rd_rs1_b6, Zknh_sha256sig0_cg_cmp_rd_rs1_b6_str) +80000c24: 000ca383 lw x7,0(x25) +80000c28: 00638863 beq x7,x6,80000c38 +80000c2c: 46c0146f jal x8,80002098 +80000c30: 80000c20 .word 0x80000c20 +80000c34: 800057fe .word 0x800057fe +80000c38: 004c8c93 addi x25,x25,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000c3c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000c40: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x4e238803 +80000c44: 000d2383 lw x7,0(x26) +80000c48: 004d0d13 addi x26,x26,4 + +80000c4c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b7: + sha256sig0 x7, x7 # perform operation +80000c4c: 10239393 sha256sig0 x7,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zknh_sha256sig0_cg_cmp_rd_rs1_b7, Zknh_sha256sig0_cg_cmp_rd_rs1_b7_str) +80000c50: 000ca683 lw x13,0(x25) +80000c54: 00768863 beq x13,x7,80000c64 +80000c58: 4680176f jal x14,800020c0 +80000c5c: 80000c4c .word 0x80000c4c +80000c60: 8000583a .word 0x8000583a +80000c64: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x248deeea +80000c68: 000d2403 lw x8,0(x26) +80000c6c: 004d0d13 addi x26,x26,4 + +80000c70 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b8: + sha256sig0 x8, x8 # perform operation +80000c70: 10241413 sha256sig0 x8,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zknh_sha256sig0_cg_cmp_rd_rs1_b8, Zknh_sha256sig0_cg_cmp_rd_rs1_b8_str) +80000c74: 000ca683 lw x13,0(x25) +80000c78: 00868863 beq x13,x8,80000c88 +80000c7c: 4440176f jal x14,800020c0 +80000c80: 80000c70 .word 0x80000c70 +80000c84: 80005876 .word 0x80005876 +80000c88: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x4e15777a +80000c8c: 000d2483 lw x9,0(x26) +80000c90: 004d0d13 addi x26,x26,4 + +80000c94 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b9: + sha256sig0 x9, x9 # perform operation +80000c94: 10249493 sha256sig0 x9,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zknh_sha256sig0_cg_cmp_rd_rs1_b9, Zknh_sha256sig0_cg_cmp_rd_rs1_b9_str) +80000c98: 000ca683 lw x13,0(x25) +80000c9c: 00968863 beq x13,x9,80000cac +80000ca0: 4200176f jal x14,800020c0 +80000ca4: 80000c94 .word 0x80000c94 +80000ca8: 800058b2 .word 0x800058b2 +80000cac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x468cf81c +80000cb0: 000d2503 lw x10,0(x26) +80000cb4: 004d0d13 addi x26,x26,4 + +80000cb8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b10: + sha256sig0 x10, x10 # perform operation +80000cb8: 10251513 sha256sig0 x10,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zknh_sha256sig0_cg_cmp_rd_rs1_b10, Zknh_sha256sig0_cg_cmp_rd_rs1_b10_str) +80000cbc: 000ca683 lw x13,0(x25) +80000cc0: 00a68863 beq x13,x10,80000cd0 +80000cc4: 3fc0176f jal x14,800020c0 +80000cc8: 80000cb8 .word 0x80000cb8 +80000ccc: 800058ee .word 0x800058ee +80000cd0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x3c1144d4 +80000cd4: 000d2583 lw x11,0(x26) +80000cd8: 004d0d13 addi x26,x26,4 + +80000cdc : +Zknh_sha256sig0_cg_cmp_rd_rs1_b11: + sha256sig0 x11, x11 # perform operation +80000cdc: 10259593 sha256sig0 x11,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknh_sha256sig0_cg_cmp_rd_rs1_b11, Zknh_sha256sig0_cg_cmp_rd_rs1_b11_str) +80000ce0: 000ca683 lw x13,0(x25) +80000ce4: 00b68863 beq x13,x11,80000cf4 +80000ce8: 3d80176f jal x14,800020c0 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 8000592b .word 0x8000592b +80000cf4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x5e9dba25 +80000cf8: 000d2603 lw x12,0(x26) +80000cfc: 004d0d13 addi x26,x26,4 + +80000d00 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b12: + sha256sig0 x12, x12 # perform operation +80000d00: 10261613 sha256sig0 x12,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zknh_sha256sig0_cg_cmp_rd_rs1_b12, Zknh_sha256sig0_cg_cmp_rd_rs1_b12_str) +80000d04: 000ca683 lw x13,0(x25) +80000d08: 00c68863 beq x13,x12,80000d18 +80000d0c: 3b40176f jal x14,800020c0 +80000d10: 80000d00 .word 0x80000d00 +80000d14: 80005968 .word 0x80005968 +80000d18: 004c8c93 addi x25,x25,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d1c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d20: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xdcbe8080 +80000d24: 000d2683 lw x13,0(x26) +80000d28: 004d0d13 addi x26,x26,4 + +80000d2c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b13: + sha256sig0 x13, x13 # perform operation +80000d2c: 10269693 sha256sig0 x13,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zknh_sha256sig0_cg_cmp_rd_rs1_b13, Zknh_sha256sig0_cg_cmp_rd_rs1_b13_str) +80000d30: 000ca383 lw x7,0(x25) +80000d34: 00d38863 beq x7,x13,80000d44 +80000d38: 3600146f jal x8,80002098 +80000d3c: 80000d2c .word 0x80000d2c +80000d40: 800059a5 .word 0x800059a5 +80000d44: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xf11b0536 +80000d48: 000d2703 lw x14,0(x26) +80000d4c: 004d0d13 addi x26,x26,4 + +80000d50 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b14: + sha256sig0 x14, x14 # perform operation +80000d50: 10271713 sha256sig0 x14,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zknh_sha256sig0_cg_cmp_rd_rs1_b14, Zknh_sha256sig0_cg_cmp_rd_rs1_b14_str) +80000d54: 000ca383 lw x7,0(x25) +80000d58: 00e38863 beq x7,x14,80000d68 +80000d5c: 33c0146f jal x8,80002098 +80000d60: 80000d50 .word 0x80000d50 +80000d64: 800059e2 .word 0x800059e2 +80000d68: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xdbd476ce +80000d6c: 000d2783 lw x15,0(x26) +80000d70: 004d0d13 addi x26,x26,4 + +80000d74 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b15: + sha256sig0 x15, x15 # perform operation +80000d74: 10279793 sha256sig0 x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zknh_sha256sig0_cg_cmp_rd_rs1_b15, Zknh_sha256sig0_cg_cmp_rd_rs1_b15_str) +80000d78: 000ca383 lw x7,0(x25) +80000d7c: 00f38863 beq x7,x15,80000d8c +80000d80: 3180146f jal x8,80002098 +80000d84: 80000d74 .word 0x80000d74 +80000d88: 80005a1f .word 0x80005a1f +80000d8c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x9a1f73cd +80000d90: 000d2803 lw x16,0(x26) +80000d94: 004d0d13 addi x26,x26,4 + +80000d98 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b16: + sha256sig0 x16, x16 # perform operation +80000d98: 10281813 sha256sig0 x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknh_sha256sig0_cg_cmp_rd_rs1_b16, Zknh_sha256sig0_cg_cmp_rd_rs1_b16_str) +80000d9c: 000ca383 lw x7,0(x25) +80000da0: 01038863 beq x7,x16,80000db0 +80000da4: 2f40146f jal x8,80002098 +80000da8: 80000d98 .word 0x80000d98 +80000dac: 80005a5c .word 0x80005a5c +80000db0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xd8df439e +80000db4: 000d2883 lw x17,0(x26) +80000db8: 004d0d13 addi x26,x26,4 + +80000dbc : +Zknh_sha256sig0_cg_cmp_rd_rs1_b17: + sha256sig0 x17, x17 # perform operation +80000dbc: 10289893 sha256sig0 x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zknh_sha256sig0_cg_cmp_rd_rs1_b17, Zknh_sha256sig0_cg_cmp_rd_rs1_b17_str) +80000dc0: 000ca383 lw x7,0(x25) +80000dc4: 01138863 beq x7,x17,80000dd4 +80000dc8: 2d00146f jal x8,80002098 +80000dcc: 80000dbc .word 0x80000dbc +80000dd0: 80005a99 .word 0x80005a99 +80000dd4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xf15767e1 +80000dd8: 000d2903 lw x18,0(x26) +80000ddc: 004d0d13 addi x26,x26,4 + +80000de0 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b18: + sha256sig0 x18, x18 # perform operation +80000de0: 10291913 sha256sig0 x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zknh_sha256sig0_cg_cmp_rd_rs1_b18, Zknh_sha256sig0_cg_cmp_rd_rs1_b18_str) +80000de4: 000ca383 lw x7,0(x25) +80000de8: 01238863 beq x7,x18,80000df8 +80000dec: 2ac0146f jal x8,80002098 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 80005ad6 .word 0x80005ad6 +80000df8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xf9021468 +80000dfc: 000d2983 lw x19,0(x26) +80000e00: 004d0d13 addi x26,x26,4 + +80000e04 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b19: + sha256sig0 x19, x19 # perform operation +80000e04: 10299993 sha256sig0 x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zknh_sha256sig0_cg_cmp_rd_rs1_b19, Zknh_sha256sig0_cg_cmp_rd_rs1_b19_str) +80000e08: 000ca383 lw x7,0(x25) +80000e0c: 01338863 beq x7,x19,80000e1c +80000e10: 2880146f jal x8,80002098 +80000e14: 80000e04 .word 0x80000e04 +80000e18: 80005b13 .word 0x80005b13 +80000e1c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x22ea46a7 +80000e20: 000d2a03 lw x20,0(x26) +80000e24: 004d0d13 addi x26,x26,4 + +80000e28 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b20: + sha256sig0 x20, x20 # perform operation +80000e28: 102a1a13 sha256sig0 x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zknh_sha256sig0_cg_cmp_rd_rs1_b20, Zknh_sha256sig0_cg_cmp_rd_rs1_b20_str) +80000e2c: 000ca383 lw x7,0(x25) +80000e30: 01438863 beq x7,x20,80000e40 +80000e34: 2640146f jal x8,80002098 +80000e38: 80000e28 .word 0x80000e28 +80000e3c: 80005b50 .word 0x80005b50 +80000e40: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x0dd1dabe +80000e44: 000d2a83 lw x21,0(x26) +80000e48: 004d0d13 addi x26,x26,4 + +80000e4c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b21: + sha256sig0 x21, x21 # perform operation +80000e4c: 102a9a93 sha256sig0 x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zknh_sha256sig0_cg_cmp_rd_rs1_b21, Zknh_sha256sig0_cg_cmp_rd_rs1_b21_str) +80000e50: 000ca383 lw x7,0(x25) +80000e54: 01538863 beq x7,x21,80000e64 +80000e58: 2400146f jal x8,80002098 +80000e5c: 80000e4c .word 0x80000e4c +80000e60: 80005b8d .word 0x80005b8d +80000e64: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x7bf616bf +80000e68: 000d2b03 lw x22,0(x26) +80000e6c: 004d0d13 addi x26,x26,4 + +80000e70 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b22: + sha256sig0 x22, x22 # perform operation +80000e70: 102b1b13 sha256sig0 x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zknh_sha256sig0_cg_cmp_rd_rs1_b22, Zknh_sha256sig0_cg_cmp_rd_rs1_b22_str) +80000e74: 000ca383 lw x7,0(x25) +80000e78: 01638863 beq x7,x22,80000e88 +80000e7c: 21c0146f jal x8,80002098 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 80005bca .word 0x80005bca +80000e88: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x22994155 +80000e8c: 000d2b83 lw x23,0(x26) +80000e90: 004d0d13 addi x26,x26,4 + +80000e94 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b23: + sha256sig0 x23, x23 # perform operation +80000e94: 102b9b93 sha256sig0 x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zknh_sha256sig0_cg_cmp_rd_rs1_b23, Zknh_sha256sig0_cg_cmp_rd_rs1_b23_str) +80000e98: 000ca383 lw x7,0(x25) +80000e9c: 01738863 beq x7,x23,80000eac +80000ea0: 1f80146f jal x8,80002098 +80000ea4: 80000e94 .word 0x80000e94 +80000ea8: 80005c07 .word 0x80005c07 +80000eac: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x6235be29 +80000eb0: 000d2c03 lw x24,0(x26) +80000eb4: 004d0d13 addi x26,x26,4 + +80000eb8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b24: + sha256sig0 x24, x24 # perform operation +80000eb8: 102c1c13 sha256sig0 x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zknh_sha256sig0_cg_cmp_rd_rs1_b24, Zknh_sha256sig0_cg_cmp_rd_rs1_b24_str) +80000ebc: 000ca383 lw x7,0(x25) +80000ec0: 01838863 beq x7,x24,80000ed0 +80000ec4: 1d40146f jal x8,80002098 +80000ec8: 80000eb8 .word 0x80000eb8 +80000ecc: 80005c45 .word 0x80005c45 +80000ed0: 004c8c93 addi x25,x25,4 + + mv x10, x25 # switch signature pointer register to avoid conflict with test +80000ed4: 000c8513 addi x10,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xd0b9eb0d +80000ed8: 000d2c83 lw x25,0(x26) +80000edc: 004d0d13 addi x26,x26,4 + +80000ee0 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b25: + sha256sig0 x25, x25 # perform operation +80000ee0: 102c9c93 sha256sig0 x25,x25 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknh_sha256sig0_cg_cmp_rd_rs1_b25, Zknh_sha256sig0_cg_cmp_rd_rs1_b25_str) +80000ee4: 00052383 lw x7,0(x10) +80000ee8: 01938863 beq x7,x25,80000ef8 +80000eec: 1ac0146f jal x8,80002098 +80000ef0: 80000ee0 .word 0x80000ee0 +80000ef4: 80005c83 .word 0x80005c83 +80000ef8: 00450513 addi x10,x10,4 + + mv x6, x26 # switch data pointer register to avoid conflict with test +80000efc: 000d0313 addi x6,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xda29804e +80000f00: 00032d03 lw x26,0(x6) +80000f04: 00430313 addi x6,x6,4 + +80000f08 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b26: + sha256sig0 x26, x26 # perform operation +80000f08: 102d1d13 sha256sig0 x26,x26 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknh_sha256sig0_cg_cmp_rd_rs1_b26, Zknh_sha256sig0_cg_cmp_rd_rs1_b26_str) +80000f0c: 00052383 lw x7,0(x10) +80000f10: 01a38863 beq x7,x26,80000f20 +80000f14: 1840146f jal x8,80002098 +80000f18: 80000f08 .word 0x80000f08 +80000f1c: 80005cc1 .word 0x80005cc1 +80000f20: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xc6f2cc4d +80000f24: 00032d83 lw x27,0(x6) +80000f28: 00430313 addi x6,x6,4 + +80000f2c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b27: + sha256sig0 x27, x27 # perform operation +80000f2c: 102d9d93 sha256sig0 x27,x27 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknh_sha256sig0_cg_cmp_rd_rs1_b27, Zknh_sha256sig0_cg_cmp_rd_rs1_b27_str) +80000f30: 00052383 lw x7,0(x10) +80000f34: 01b38863 beq x7,x27,80000f44 +80000f38: 1600146f jal x8,80002098 +80000f3c: 80000f2c .word 0x80000f2c +80000f40: 80005cff .word 0x80005cff +80000f44: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xdb1f265d +80000f48: 00032e03 lw x28,0(x6) +80000f4c: 00430313 addi x6,x6,4 + +80000f50 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b28: + sha256sig0 x28, x28 # perform operation +80000f50: 102e1e13 sha256sig0 x28,x28 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknh_sha256sig0_cg_cmp_rd_rs1_b28, Zknh_sha256sig0_cg_cmp_rd_rs1_b28_str) +80000f54: 00052383 lw x7,0(x10) +80000f58: 01c38863 beq x7,x28,80000f68 +80000f5c: 13c0146f jal x8,80002098 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 80005d3d .word 0x80005d3d +80000f68: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xe609647e +80000f6c: 00032e83 lw x29,0(x6) +80000f70: 00430313 addi x6,x6,4 + +80000f74 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b29: + sha256sig0 x29, x29 # perform operation +80000f74: 102e9e93 sha256sig0 x29,x29 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknh_sha256sig0_cg_cmp_rd_rs1_b29, Zknh_sha256sig0_cg_cmp_rd_rs1_b29_str) +80000f78: 00052383 lw x7,0(x10) +80000f7c: 01d38863 beq x7,x29,80000f8c +80000f80: 1180146f jal x8,80002098 +80000f84: 80000f74 .word 0x80000f74 +80000f88: 80005d7b .word 0x80005d7b +80000f8c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x33ca857b +80000f90: 00032f03 lw x30,0(x6) +80000f94: 00430313 addi x6,x6,4 + +80000f98 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b30: + sha256sig0 x30, x30 # perform operation +80000f98: 102f1f13 sha256sig0 x30,x30 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknh_sha256sig0_cg_cmp_rd_rs1_b30, Zknh_sha256sig0_cg_cmp_rd_rs1_b30_str) +80000f9c: 00052383 lw x7,0(x10) +80000fa0: 01e38863 beq x7,x30,80000fb0 +80000fa4: 0f40146f jal x8,80002098 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 80005db9 .word 0x80005db9 +80000fb0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xd4a8979a +80000fb4: 00032f83 lw x31,0(x6) +80000fb8: 00430313 addi x6,x6,4 + +80000fbc : +Zknh_sha256sig0_cg_cmp_rd_rs1_b31: + sha256sig0 x31, x31 # perform operation +80000fbc: 102f9f93 sha256sig0 x31,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sig0_cg_cmp_rd_rs1_b31, Zknh_sha256sig0_cg_cmp_rd_rs1_b31_str) +80000fc0: 00052383 lw x7,0(x10) +80000fc4: 01f38863 beq x7,x31,80000fd4 +80000fc8: 0d00146f jal x8,80002098 +80000fcc: 80000fbc .word 0x80000fbc +80000fd0: 80005df7 .word 0x80005df7 +80000fd4: 00450513 addi x10,x10,4 + + mv x2, x10 # restore signature pointer to default register for teardown +80000fd8: 00050113 addi x2,x10,0 + +80000fdc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fdc: 00000513 addi x10,x0,0 +80000fe0: 00000073 ecall +80000fe4: fff00513 addi x10,x0,-1 +80000fe8: 1d800413 addi x8,x0,472 + +80000fec : +80000fec: 34002373 csrrs x6,mscratch,x0 + +80000ff0 : +80000ff0: 23832383 lw x7,568(x6) +80000ff4: 23c32483 lw x9,572(x6) + +80000ff8 : +80000ff8: 22032383 lw x7,544(x6) + +80000ffc : +80000ffc: 25032483 lw x9,592(x6) +80001000: 34049073 csrrw x0,mscratch,x9 + +80001004 : +80001004: 24832483 lw x9,584(x6) +80001008: 305493f3 csrrw x7,mtvec,x9 +8000100c: ffc4f493 andi x9,x9,-4 +80001010: ffc3f393 andi x7,x7,-4 +80001014: 00749e63 bne x9,x7,80001030 + +80001018 : +80001018: 00030493 addi x9,x6,0 + +8000101c : +8000101c: 0004a783 lw x15,0(x9) +80001020: 00f3a023 sw x15,0(x7) +80001024: 00438393 addi x7,x7,4 +80001028: 00448493 addi x9,x9,4 +8000102c: fe83c8e3 blt x7,x8,8000101c +80001030: 0000100f fence.i + +80001034 : +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 44450513 addi x10,x10,1092 # 800064c4 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 44350513 addi x10,x10,1091 # 80006503 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 46350513 addi x10,x10,1123 # 80006563 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: fce50513 addi x10,x10,-50 # 8000710e +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: bb838393 addi x7,x7,-1096 # 80007d78 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: b7040413 addi x8,x8,-1168 # 80007d70 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 800066b7 .word 0x800066b7 + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 80006525 .word 0x80006525 +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 22450513 addi x10,x10,548 # 80006484 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: 22450513 addi x10,x10,548 # 800064c4 +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: cddff06f jal x0,80000fdc + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cd1ff06f jal x0,80000fdc +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b5430313 addi x6,x6,-1196 # 80001034 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 48550513 addi x10,x10,1157 # 80007b45 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00005517 auipc x10,0x5 +80001704: 8a850513 addi x10,x10,-1880 # 80005fa8 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: e8c50513 addi x10,x10,-372 # 800065cc +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: d4450513 addi x10,x10,-700 # 800064c4 +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 42848493 addi x9,x9,1064 # 80005f88 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: c3c40413 addi x8,x8,-964 # 800167dc +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800066ce .word 0x800066ce +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800067d0 .word 0x800067d0 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800068cb .word 0x800068cb +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 800069be .word 0x800069be +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006b31 .word 0x80006b31 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: dc020213 addi x4,x4,-576 # 80005e40 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: da838393 addi x7,x7,-600 # 80005e40 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: d8068693 addi x13,x13,-640 # 80005e40 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: d5848493 addi x9,x9,-680 # 80005e40 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: cb44a483 lw x9,-844(x9) # 80005e40 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00006417 auipc x8,0x6 +80002244: 95040413 addi x8,x8,-1712 # 80007b90 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 56040413 addi x8,x8,1376 # 800167e0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: ca848493 addi x9,x9,-856 # 80005f68 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: c6848493 addi x9,x9,-920 # 80005f68 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: c4880813 addi x16,x16,-952 # 80005f78 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: c3480813 addi x16,x16,-972 # 80005f78 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 36738393 addi x7,x7,871 # 800066b7 +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: c1080813 addi x16,x16,-1008 # 80005f70 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 36238393 addi x7,x7,866 # 800066ce +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 44c38393 addi x7,x7,1100 # 800067d0 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 52f38393 addi x7,x7,1327 # 800068cb +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 60a38393 addi x7,x7,1546 # 800069be +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 76538393 addi x7,x7,1893 # 80006b31 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 6d138393 addi x7,x7,1745 # 80006ab5 +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 6f738393 addi x7,x7,1783 # 80006af3 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 2fa38393 addi x7,x7,762 # 8000670e +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 3e238393 addi x7,x7,994 # 8000680e +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 4c338393 addi x7,x7,1219 # 80006907 +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 59f38393 addi x7,x7,1439 # 800069fb +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 6f838393 addi x7,x7,1784 # 80006b6c +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 2c238393 addi x7,x7,706 # 8000674e +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 3a838393 addi x7,x7,936 # 8000684c +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 48738393 addi x7,x7,1159 # 80006943 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 56438393 addi x7,x7,1380 # 80006a38 +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 6bb38393 addi x7,x7,1723 # 80006ba7 +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 28b38393 addi x7,x7,651 # 8000678f +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 36f38393 addi x7,x7,879 # 8000688b +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 44c38393 addi x7,x7,1100 # 80006980 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 52a38393 addi x7,x7,1322 # 80006a76 +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 67f38393 addi x7,x7,1663 # 80006be3 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 6a438393 addi x7,x7,1700 # 80006c20 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 6db38393 addi x7,x7,1755 # 80006c6f +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 7be38393 addi x7,x7,1982 # 80006d6a +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00005397 auipc x7,0x5 +800025c8: 8a238393 addi x7,x7,-1886 # 80006e66 +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00004817 auipc x16,0x4 +800025e8: 98c80813 addi x16,x16,-1652 # 80005f70 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00004817 auipc x16,0x4 +800025f8: 97c80813 addi x16,x16,-1668 # 80005f70 +800025fc: 00882023 sw x8,0(x16) +80002600: 00004817 auipc x16,0x4 +80002604: 97480813 addi x16,x16,-1676 # 80005f74 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00004817 auipc x16,0x4 +80002614: 96080813 addi x16,x16,-1696 # 80005f70 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: e6450513 addi x10,x10,-412 # 800064c4 +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: e6350513 addi x10,x10,-413 # 80006503 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: eda50513 addi x10,x10,-294 # 800065ba +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00004517 auipc x10,0x4 +8000270c: 85852503 lw x10,-1960(x10) # 80005f60 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: eac50513 addi x10,x10,-340 # 800065cc +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 6f852503 lw x10,1784(x10) # 80005e40 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: e6e50513 addi x10,x10,-402 # 800065ce +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 7b852503 lw x10,1976(x10) # 80005f40 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 7e850513 addi x10,x10,2024 # 80005fa8 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: de250513 addi x10,x10,-542 # 800065e2 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 72052503 lw x10,1824(x10) # 80005f48 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 76850513 addi x10,x10,1896 # 80005fa8 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 79950513 addi x10,x10,1945 # 80007019 +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 59852503 lw x10,1432(x10) # 80005e40 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 6e860613 addi x12,x12,1768 # 80005fa8 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 65c52503 lw x10,1628(x10) # 80005f44 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00005517 auipc x10,0x5 +80002924: 80f50513 addi x10,x10,-2033 # 8000712f +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 64860613 addi x12,x12,1608 # 80005fa8 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 5bc52503 lw x10,1468(x10) # 80005f44 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 60860613 addi x12,x12,1544 # 80005fa8 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 57c52503 lw x10,1404(x10) # 80005f44 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 63250513 addi x10,x10,1586 # 80007012 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 58850513 addi x10,x10,1416 # 80005fa8 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 5ca50513 addi x10,x10,1482 # 8000702a +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 3b852503 lw x10,952(x10) # 80005e40 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 4b852503 lw x10,1208(x10) # 80005f50 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 4a452503 lw x10,1188(x10) # 80005f50 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 4e850513 addi x10,x10,1256 # 80005fa8 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 48052503 lw x10,1152(x10) # 80005f68 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 54150513 addi x10,x10,1345 # 80007041 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 31852503 lw x10,792(x10) # 80005e40 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 42052503 lw x10,1056(x10) # 80005f58 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 40c52503 lw x10,1036(x10) # 80005f58 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 44850513 addi x10,x10,1096 # 80005fa8 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 4b850513 addi x10,x10,1208 # 80007058 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 39052503 lw x10,912(x10) # 80005f58 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 3c850513 addi x10,x10,968 # 80005fa8 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 49650513 addi x10,x10,1174 # 800070b6 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 31052503 lw x10,784(x10) # 80005f58 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 34850513 addi x10,x10,840 # 80005fa8 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 2e442403 lw x8,740(x8) # 80005f70 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 4bb50513 addi x10,x10,1211 # 8000715b +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 4a750513 addi x10,x10,1191 # 80007187 +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 27080813 addi x16,x16,624 # 80005f78 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00004517 auipc x10,0x4 +80002d24: 8ac50513 addi x10,x10,-1876 # 800065cc +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 43750513 addi x10,x10,1079 # 80007197 +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: 1d052503 lw x10,464(x10) # 80005f58 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: 20850513 addi x10,x10,520 # 80005fa8 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 3e250513 addi x10,x10,994 # 800071c2 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: 14852503 lw x10,328(x10) # 80005f50 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: 18850513 addi x10,x10,392 # 80005fa8 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: 10832303 lw x6,264(x6) # 80005f50 +80002e50: 00003397 auipc x7,0x3 +80002e54: 1083a383 lw x7,264(x7) # 80005f58 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 39150513 addi x10,x10,913 # 800071f1 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 3b950513 addi x10,x10,953 # 80007259 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: 08832303 lw x6,136(x6) # 80005f50 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: 0883a383 lw x7,136(x7) # 80005f58 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: 0a850513 addi x10,x10,168 # 80005fa8 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 34050513 addi x10,x10,832 # 80007280 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 29d50513 addi x10,x10,669 # 8000721d +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 29950513 addi x10,x10,665 # 80007259 +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: f7032303 lw x6,-144(x6) # 80005f58 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: f603a383 lw x7,-160(x7) # 80005f50 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: f8850513 addi x10,x10,-120 # 80005fa8 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 30850513 addi x10,x10,776 # 80007368 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 3af50513 addi x10,x10,943 # 8000744f +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: eac52503 lw x10,-340(x10) # 80005f74 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 38b50513 addi x10,x10,907 # 8000748b +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 32950513 addi x10,x10,809 # 80007469 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 2f150513 addi x10,x10,753 # 80007471 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 2b950513 addi x10,x10,697 # 80007479 +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 28250513 addi x10,x10,642 # 80007482 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 25450513 addi x10,x10,596 # 80007494 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: d0852503 lw x10,-760(x10) # 80005f70 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 32b50513 addi x10,x10,811 # 800075eb +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: 1ae50513 addi x10,x10,430 # 800074ae +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: 19f50513 addi x10,x10,415 # 800074df +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: 17f50513 addi x10,x10,383 # 800074ff +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: 15d50513 addi x10,x10,349 # 8000751d +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: 13c50513 addi x10,x10,316 # 8000753c +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: 12450513 addi x10,x10,292 # 80007564 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: 11050513 addi x10,x10,272 # 80007590 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: 0fc50513 addi x10,x10,252 # 800075bc +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: 0fa50513 addi x10,x10,250 # 800075fa +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: a3052503 lw x10,-1488(x10) # 80005f58 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: a6850513 addi x10,x10,-1432 # 80005fa8 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: 09150513 addi x10,x10,145 # 80007611 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00003517 auipc x10,0x3 +800035ac: 9a852503 lw x10,-1624(x10) # 80005f50 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00003517 auipc x10,0x3 +800035c4: 9e850513 addi x10,x10,-1560 # 80005fa8 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00003517 auipc x10,0x3 +800035ec: 98852503 lw x10,-1656(x10) # 80005f70 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: 02850513 addi x10,x10,40 # 80007628 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00003517 auipc x10,0x3 +8000362c: 93052503 lw x10,-1744(x10) # 80005f58 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: fff50513 addi x10,x10,-1 # 8000763f +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00003517 auipc x10,0x3 +8000366c: 8e852503 lw x10,-1816(x10) # 80005f50 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00003517 auipc x10,0x3 +80003688: 8ec52503 lw x10,-1812(x10) # 80005f70 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: 01550513 addi x10,x10,21 # 800076b5 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: 0ab50513 addi x10,x10,171 # 8000778b +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: 15e50513 addi x10,x10,350 # 8000787e +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: 21950513 addi x10,x10,537 # 80007979 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 2c050513 addi x10,x10,704 # 80007a60 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: e8d50513 addi x10,x10,-371 # 8000766d +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 78062603 lw x12,1920(x12) # 80005f88 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: e3650513 addi x10,x10,-458 # 80006656 +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 72850513 addi x10,x10,1832 # 80005fa8 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 71058593 addi x11,x11,1808 # 80005fd0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 74458593 addi x11,x11,1860 # 80006030 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: b4e50513 addi x10,x10,-1202 # 8000646e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 7ae50513 addi x10,x10,1966 # 8000710e +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 5f060613 addi x12,x12,1520 # 80005f80 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: cd750513 addi x10,x10,-809 # 80006677 +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 5c052503 lw x10,1472(x10) # 80005f88 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 5c850513 addi x10,x10,1480 # 80005fa8 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: c6750513 addi x10,x10,-921 # 80006687 +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 54852503 lw x10,1352(x10) # 80005f90 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 54850513 addi x10,x10,1352 # 80005fa8 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: bf750513 addi x10,x10,-1033 # 80006697 +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 4d052503 lw x10,1232(x10) # 80005f98 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 4c850513 addi x10,x10,1224 # 80005fa8 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: b8750513 addi x10,x10,-1145 # 800066a7 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 45852503 lw x10,1112(x10) # 80005fa0 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 44850513 addi x10,x10,1096 # 80005fa8 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 3f860613 addi x12,x12,1016 # 80005f80 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 40860613 addi x12,x12,1032 # 80005fa8 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f4030313 addi x6,x6,-192 # 80000fdc +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f2830313 addi x6,x6,-216 # 80000fdc +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f1030313 addi x6,x6,-240 # 80000fdc +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: dac78793 addi x15,x15,-596 # 80000fec +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 6f010113 addi x2,x2,1776 # 80007b90 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80007137 .word 0x80007137 +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 25828293 addi x5,x5,600 # 80016800 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 23828293 addi x5,x5,568 # 80016800 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha256sig1-00.elf.objdump b/riscv-tests/rv32-Zknh-sha256sig1-00.elf.objdump new file mode 100644 index 0000000..7aa2798 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha256sig1-00.elf.objdump @@ -0,0 +1,6269 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sig1-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sig1-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000127e0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016800 80016800 00017800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 00000882 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 00000000 00000000 00018efd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f7d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fa0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fb8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 00000000 00000000 00018fe0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 0001906e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016800 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccEtNCuj.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b1 +80004597 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b2 +800045ce l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b3 +80004605 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b4 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +8000463c l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b5 +80004673 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b6 +800046aa l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b7 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +800046e1 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b8 +80004718 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b8_str +800001a4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b9 +8000474f l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b9_str +800001c8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b10 +80004787 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b10_str +800001ec l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b11 +800047c0 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b11_str +80000210 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b12 +800047f9 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b12_str +8000023c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b13 +80004832 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b13_str +80000260 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b14 +8000486b l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b14_str +80000284 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b15 +800048a4 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b15_str +800002a8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b16 +800048dd l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b16_str +800002cc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b17 +80004916 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b17_str +800002f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b18 +8000494f l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b18_str +80000314 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b19 +80004988 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b19_str +80000338 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b20 +800049c1 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b20_str +8000035c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b21 +800049fa l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b21_str +80000380 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b22 +80004a33 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b22_str +800003a4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b23 +80004a6c l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b23_str +800003c8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b24 +80004aa5 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b24_str +800003f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b25 +80004ade l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b25_str +80000414 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b26 +80004b17 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b26_str +8000043c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b27 +80004b50 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b27_str +80000460 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b28 +80004b89 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b28_str +80000484 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b29 +80004bc2 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b29_str +800004a8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b30 +80004bfb l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b30_str +800004cc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_b31 +80004c34 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_b31_str +800004f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b0 +80004c6d l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b0_str +80000514 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b1 +80004ca4 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b1_str +80000538 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b2 +80004cdb l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b2_str +8000055c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b3 +80004d12 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b3_str +80000580 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b4 +80004d49 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b4_str +800005a4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b5 +80004d80 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b5_str +800005c8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b6 +80004db7 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b6_str +800005f4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b7 +80004dee l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b7_str +80000618 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b8 +80004e25 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b8_str +8000063c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b9 +80004e5c l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b9_str +80000660 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b10 +80004e93 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b10_str +80000684 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b11 +80004ecb l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b11_str +800006a8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b12 +80004f03 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b12_str +800006cc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b13 +80004f3b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b13_str +800006f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b14 +80004f73 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b14_str +80000714 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b15 +80004fab l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b15_str +8000073c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b16 +80004fe3 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b16_str +80000760 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b17 +8000501b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b17_str +80000784 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b18 +80005053 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b18_str +800007a8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b19 +8000508b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b19_str +800007cc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b20 +800050c3 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b20_str +800007f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b21 +800050fb l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b21_str +80000814 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b22 +80005133 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b22_str +80000838 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b23 +8000516b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b23_str +80000860 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b24 +800051a3 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b24_str +80000884 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b25 +800051db l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b25_str +800008a8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b26 +80005213 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b26_str +800008cc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b27 +8000524b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b27_str +800008f0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b28 +80005283 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b28_str +80000914 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b29 +800052bb l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b29_str +80000938 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b30 +800052f3 l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b30_str +8000095c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rd_b31 +8000532b l .data 00000000 Zknh_sha256sig1_cg_cp_rd_b31_str +80000980 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x0 +80005363 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x0_str +800009a4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x1 +800053a2 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x1_str +800009c8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x2 +800053e1 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x2_str +800009ec l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x80000000 +80005420 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x80000000_str +80000a10 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x80000001 +80005466 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x80000001_str +80000a34 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffff +800054ac l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffff_str +80000a58 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffe +800054f2 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffe_str +80000a7c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff +80005538 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff_str +80000aa0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe +8000557e l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe_str +80000ac4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc8872 +800055c4 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc8872_str +80000ae8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaa +8000560a l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b0c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x55555555 +80005650 l .data 00000000 Zknh_sha256sig1_cg_cp_rs1_edges_0x55555555_str +80000b30 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b0 +80005696 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b0_str +80000b58 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b1 +800056d2 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b1_str +80000b7c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b2 +8000570e l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b2_str +80000ba0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b3 +8000574a l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b3_str +80000bcc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b4 +80005786 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b4_str +80000bf0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b5 +800057c2 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b5_str +80000c14 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b6 +800057fe l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b6_str +80000c38 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b7 +8000583a l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b7_str +80000c5c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b8 +80005876 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b8_str +80000c84 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b9 +800058b2 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b9_str +80000ca8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b10 +800058ee l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b10_str +80000ccc l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b11 +8000592b l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b11_str +80000cf0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b12 +80005968 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b12_str +80000d1c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b13 +800059a5 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b13_str +80000d40 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b14 +800059e2 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b14_str +80000d64 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b15 +80005a1f l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b15_str +80000d88 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b16 +80005a5c l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b16_str +80000dac l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b17 +80005a99 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b17_str +80000dd0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b18 +80005ad6 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b18_str +80000df4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b19 +80005b13 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b19_str +80000e18 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b20 +80005b50 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b20_str +80000e40 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b21 +80005b8d l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b21_str +80000e64 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b22 +80005bca l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b22_str +80000e88 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b23 +80005c07 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b23_str +80000eb0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b24 +80005c45 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b24_str +80000ed4 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b25 +80005c83 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b25_str +80000ef8 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b26 +80005cc1 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b26_str +80000f1c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b27 +80005cff l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b27_str +80000f44 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b28 +80005d3d l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b28_str +80000f68 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b29 +80005d7b l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b29_str +80000f8c l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b30 +80005db9 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b30_str +80000fb0 l .text.rvtest 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b31 +80005df7 l .data 00000000 Zknh_sha256sig1_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fe0 l .text.rvtest 00000000 exit_Mcleanup +80000fe4 l .text.rvtest 00000000 resto_Medeleg +80000fec l .text.rvtest 00000000 resto_Msatp +80000ff0 l .text.rvtest 00000000 resto_Mscratch +80000ff8 l .text.rvtest 00000000 resto_Mxtvec +8000100c l .text.rvtest 00000000 resto_Mtramp +80001010 l .text.rvtest 00000000 resto_Mloop +80001028 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +800064c4 l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006503 l .data 00000000 begin_debugstr +80006563 l .data 00000000 trap_sig_overflowstr +8000710e l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007d78 l .data 00000000 trap_sigptr +80007d70 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800066b7 l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +80006525 l .data 00000000 abortstr +80006484 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +80007b45 l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005fa8 l .data 00000000 ascii_buffer +800065cc l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005f88 l .data 00000000 saved_xepc +800167dc l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800066ce l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800067d0 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800068cb l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +800069be l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006b31 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005e40 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005e40 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005f68 l .data 00000000 failure_diag_type +80005f78 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005f70 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +80006ab5 l .data 00000000 sv_Mtval2_str +80006af3 l .data 00000000 sv_Mtinst_str +8000670e l .data 00000000 sv_Svect_str +8000680e l .data 00000000 sv_Scause_str +80006907 l .data 00000000 sv_Sepc_str +800069fb l .data 00000000 sv_Stval_str +80006b6c l .data 00000000 sv_Sip_str +8000674e l .data 00000000 sv_Hvect_str +8000684c l .data 00000000 sv_Hcause_str +80006943 l .data 00000000 sv_Hepc_str +80006a38 l .data 00000000 sv_Htval_str +80006ba7 l .data 00000000 sv_Hip_str +8000678f l .data 00000000 sv_Vvect_str +8000688b l .data 00000000 sv_Vcause_str +80006980 l .data 00000000 sv_Vepc_str +80006a76 l .data 00000000 sv_Vtval_str +80006be3 l .data 00000000 sv_Vip_str +80006c20 l .data 00000000 Mclr_Mext_int_str +80006c6f l .data 00000000 Mclr_Sext_int_str +80006d6a l .data 00000000 Sclr_Sext_int_str +80006e66 l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005f74 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +800065ba l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005f60 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800065ce l .data 00000000 inststr +80005f40 l .data 00000000 failing_instruction +800065e2 l .data 00000000 addrstr +80005f48 l .data 00000000 failing_addr +80007019 l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005f44 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +8000712f l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80007012 l .data 00000000 vxsatstr +8000702a l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005f50 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80007041 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005f58 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80007058 l .data 00000000 failure_diag_bad_instr_str +800070b6 l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +8000715b l .data 00000000 trap_diag_header_str +80007187 l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80007197 l .data 00000000 trap_diag_expected_offset_str +800071c2 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +800071f1 l .data 00000000 trap_diag_extra_traps_str +80007259 l .data 00000000 trap_diag_diff_bytes_str +80007280 l .data 00000000 trap_diag_extra_next_step_str +8000721d l .data 00000000 trap_diag_missing_traps_str +80007368 l .data 00000000 trap_diag_missing_next_step_str +8000744f l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +8000748b l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +80007469 l .data 00000000 trap_diag_mode_m_str +80007471 l .data 00000000 trap_diag_mode_s_str +80007479 l .data 00000000 trap_diag_mode_hs_str +80007482 l .data 00000000 trap_diag_mode_vs_str +80007494 l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800075eb l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +800074ae l .data 00000000 trap_diag_field_vect_str +800074df l .data 00000000 trap_diag_field_cause_str +800074ff l .data 00000000 trap_diag_field_epc_str +8000751d l .data 00000000 trap_diag_field_tval_str +8000753c l .data 00000000 trap_diag_field_ip_str +80007564 l .data 00000000 trap_diag_field_tval2_str +80007590 l .data 00000000 trap_diag_field_tinst_str +800075bc l .data 00000000 trap_diag_field_intid_str +800075fa l .data 00000000 trap_diag_expected_str +80007611 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +80007628 l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +8000763f l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +800076b5 l .data 00000000 trap_diag_hint_vect_str +8000778b l .data 00000000 trap_diag_hint_cause_str +8000787e l .data 00000000 trap_diag_hint_epc_str +80007979 l .data 00000000 trap_diag_hint_tval_str +80007a60 l .data 00000000 trap_diag_hint_ip_str +8000766d l .data 00000000 trap_diag_generic_str +80006656 l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005fd0 l .data 00000000 trap_excpt_name_tbl +80006030 l .data 00000000 trap_int_name_tbl +8000646e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005f80 l .data 00000000 csr_context_ret_addr +80006677 l .data 00000000 mepcstr +80006687 l .data 00000000 mcausestr +80005f90 l .data 00000000 saved_xcause +80006697 l .data 00000000 mtvalstr +80005f98 l .data 00000000 saved_xtval +800066a7 l .data 00000000 mstatusstr +80005fa0 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007b90 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80007137 l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005fd0 l .data 00000000 end_failure_scratch +80006070 l .data 00000000 trap_excpt_name_0 +80006090 l .data 00000000 trap_excpt_name_1 +800060aa l .data 00000000 trap_excpt_name_2 +800060bf l .data 00000000 trap_excpt_name_3 +800060cb l .data 00000000 trap_excpt_name_4 +800060e4 l .data 00000000 trap_excpt_name_5 +800060f7 l .data 00000000 trap_excpt_name_6 +80006115 l .data 00000000 trap_excpt_name_7 +8000612d l .data 00000000 trap_excpt_name_8 +8000614b l .data 00000000 trap_excpt_name_9 +80006169 l .data 00000000 trap_excpt_name_10 +80006188 l .data 00000000 trap_excpt_name_11 +800061a6 l .data 00000000 trap_excpt_name_12 +800061be l .data 00000000 trap_excpt_name_13 +800061cf l .data 00000000 trap_excpt_name_14 +800061de l .data 00000000 trap_excpt_name_15 +800061f4 l .data 00000000 trap_excpt_name_16 +80006201 l .data 00000000 trap_excpt_name_17 +80006210 l .data 00000000 trap_excpt_name_18 +80006220 l .data 00000000 trap_excpt_name_19 +80006230 l .data 00000000 trap_excpt_name_20 +8000624e l .data 00000000 trap_excpt_name_21 +80006265 l .data 00000000 trap_excpt_name_22 +8000627a l .data 00000000 trap_excpt_name_23 +80006296 l .data 00000000 trap_int_name_0 +800062ae l .data 00000000 trap_int_name_1 +800062cd l .data 00000000 trap_int_name_2 +800062f4 l .data 00000000 trap_int_name_3 +80006310 l .data 00000000 trap_int_name_4 +80006328 l .data 00000000 trap_int_name_5 +80006344 l .data 00000000 trap_int_name_6 +80006368 l .data 00000000 trap_int_name_7 +80006381 l .data 00000000 trap_int_name_8 +80006399 l .data 00000000 trap_int_name_9 +800063b8 l .data 00000000 trap_int_name_10 +800063df l .data 00000000 trap_int_name_11 +800063fb l .data 00000000 trap_int_name_12 +80006420 l .data 00000000 trap_int_name_13 +8000643c l .data 00000000 trap_int_name_14 +80006455 l .data 00000000 trap_int_name_15 +80006623 l .data 00000000 xepcstr +80006cc1 l .data 00000000 Mclr_Vext_int_str +80006d1b l .data 00000000 Sclr_Mext_int_str +80006dbc l .data 00000000 Sclr_Vext_int_str +80006e16 l .data 00000000 Hclr_Mext_int_str +80006eb9 l .data 00000000 Hclr_Vext_int_str +80006f14 l .data 00000000 Vclr_Mext_int_str +80006f64 l .data 00000000 Vclr_Sext_int_str +80006fb7 l .data 00000000 Vclr_Vext_int_str +80007656 l .data 00000000 trap_diag_curr_xepc_str +800167e0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800167e0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001028 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007b90 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fd0 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007b90 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +80007b89 g .data 00000000 rvtest_data_end +80000fd0 g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016900 g .tohost 00000000 fromhost +80016800 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x97ba9d06 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zknh_sha256sig1_cg_cp_rs1_b0: + sha256sig1 x6, x0 # perform operation +80000048: 10301313 sha256sig1 x6,x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha256sig1_cg_cp_rs1_b0, Zknh_sha256sig1_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 00620863 beq x4,x6,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x83456a7a +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zknh_sha256sig1_cg_cp_rs1_b1: + sha256sig1 x6, x1 # perform operation +8000006c: 10309313 sha256sig1 x6,x1 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha256sig1_cg_cp_rs1_b1, Zknh_sha256sig1_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 00620863 beq x4,x6,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004597 .word 0x80004597 +80000084: 00410113 addi x2,x2,4 + + mv x25, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xbf25d203 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zknh_sha256sig1_cg_cp_rs1_b2: + sha256sig1 x23, x2 # perform operation +80000094: 10311b93 sha256sig1 x23,x2 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_b2, Zknh_sha256sig1_cg_cp_rs1_b2_str) +80000098: 000ca203 lw x4,0(x25) +8000009c: 01720863 beq x4,x23,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045ce .word 0x800045ce +800000ac: 004c8c93 addi x25,x25,4 + + mv x27, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018d93 addi x27,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x3fb68099 +800000b4: 000da183 lw x3,0(x27) +800000b8: 004d8d93 addi x27,x27,4 + +800000bc : +Zknh_sha256sig1_cg_cp_rs1_b3: + sha256sig1 x30, x3 # perform operation +800000bc: 10319f13 sha256sig1 x30,x3 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_b3, Zknh_sha256sig1_cg_cp_rs1_b3_str) +800000c0: 000ca203 lw x4,0(x25) +800000c4: 01e20863 beq x4,x30,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 80004605 .word 0x80004605 +800000d4: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs1: x4 = 0x7012765b +800000e0: 000da203 lw x4,0(x27) +800000e4: 004d8d93 addi x27,x27,4 + +800000e8 : +Zknh_sha256sig1_cg_cp_rs1_b4: + sha256sig1 x20, x4 # perform operation +800000e8: 10321a13 sha256sig1 x20,x4 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zknh_sha256sig1_cg_cp_rs1_b4, Zknh_sha256sig1_cg_cp_rs1_b4_str) +800000ec: 000ca383 lw x7,0(x25) +800000f0: 01438863 beq x7,x20,80000100 +800000f4: 7a50146f jal x8,80002098 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 8000463c .word 0x8000463c +80000100: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0xee095545 +80000104: 000da283 lw x5,0(x27) +80000108: 004d8d93 addi x27,x27,4 + +8000010c : +Zknh_sha256sig1_cg_cp_rs1_b5: + sha256sig1 x1, x5 # perform operation +8000010c: 10329093 sha256sig1 x1,x5 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zknh_sha256sig1_cg_cp_rs1_b5, Zknh_sha256sig1_cg_cp_rs1_b5_str) +80000110: 000ca383 lw x7,0(x25) +80000114: 00138863 beq x7,x1,80000124 +80000118: 7810146f jal x8,80002098 +8000011c: 8000010c .word 0x8000010c +80000120: 80004673 .word 0x80004673 +80000124: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0x19b1605f +80000128: 000da303 lw x6,0(x27) +8000012c: 004d8d93 addi x27,x27,4 + +80000130 : +Zknh_sha256sig1_cg_cp_rs1_b6: + sha256sig1 x1, x6 # perform operation +80000130: 10331093 sha256sig1 x1,x6 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zknh_sha256sig1_cg_cp_rs1_b6, Zknh_sha256sig1_cg_cp_rs1_b6_str) +80000134: 000ca383 lw x7,0(x25) +80000138: 00138863 beq x7,x1,80000148 +8000013c: 75d0146f jal x8,80002098 +80000140: 80000130 .word 0x80000130 +80000144: 800046aa .word 0x800046aa +80000148: 004c8c93 addi x25,x25,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000014c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000150: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0x23a5243e +80000154: 000da383 lw x7,0(x27) +80000158: 004d8d93 addi x27,x27,4 + +8000015c : +Zknh_sha256sig1_cg_cp_rs1_b7: + sha256sig1 x5, x7 # perform operation +8000015c: 10339293 sha256sig1 x5,x7 + # Check if x5 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x5, Zknh_sha256sig1_cg_cp_rs1_b7, Zknh_sha256sig1_cg_cp_rs1_b7_str) +80000160: 000ca683 lw x13,0(x25) +80000164: 00568863 beq x13,x5,80000174 +80000168: 7590176f jal x14,800020c0 +8000016c: 8000015c .word 0x8000015c +80000170: 800046e1 .word 0x800046e1 +80000174: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x57de7886 +80000178: 000da403 lw x8,0(x27) +8000017c: 004d8d93 addi x27,x27,4 + +80000180 : +Zknh_sha256sig1_cg_cp_rs1_b8: + sha256sig1 x26, x8 # perform operation +80000180: 10341d13 sha256sig1 x26,x8 + # Check if x26 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x26, Zknh_sha256sig1_cg_cp_rs1_b8, Zknh_sha256sig1_cg_cp_rs1_b8_str) +80000184: 000ca683 lw x13,0(x25) +80000188: 01a68863 beq x13,x26,80000198 +8000018c: 7350176f jal x14,800020c0 +80000190: 80000180 .word 0x80000180 +80000194: 80004718 .word 0x80004718 +80000198: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x6e49f6e9 +8000019c: 000da483 lw x9,0(x27) +800001a0: 004d8d93 addi x27,x27,4 + +800001a4 : +Zknh_sha256sig1_cg_cp_rs1_b9: + sha256sig1 x12, x9 # perform operation +800001a4: 10349613 sha256sig1 x12,x9 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zknh_sha256sig1_cg_cp_rs1_b9, Zknh_sha256sig1_cg_cp_rs1_b9_str) +800001a8: 000ca683 lw x13,0(x25) +800001ac: 00c68863 beq x13,x12,800001bc +800001b0: 7110176f jal x14,800020c0 +800001b4: 800001a4 .word 0x800001a4 +800001b8: 8000474f .word 0x8000474f +800001bc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x1d867750 +800001c0: 000da503 lw x10,0(x27) +800001c4: 004d8d93 addi x27,x27,4 + +800001c8 : +Zknh_sha256sig1_cg_cp_rs1_b10: + sha256sig1 x11, x10 # perform operation +800001c8: 10351593 sha256sig1 x11,x10 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknh_sha256sig1_cg_cp_rs1_b10, Zknh_sha256sig1_cg_cp_rs1_b10_str) +800001cc: 000ca683 lw x13,0(x25) +800001d0: 00b68863 beq x13,x11,800001e0 +800001d4: 6ed0176f jal x14,800020c0 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80004787 .word 0x80004787 +800001e0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x56fefcb8 +800001e4: 000da583 lw x11,0(x27) +800001e8: 004d8d93 addi x27,x27,4 + +800001ec : +Zknh_sha256sig1_cg_cp_rs1_b11: + sha256sig1 x4, x11 # perform operation +800001ec: 10359213 sha256sig1 x4,x11 + # Check if x4 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x4, Zknh_sha256sig1_cg_cp_rs1_b11, Zknh_sha256sig1_cg_cp_rs1_b11_str) +800001f0: 000ca683 lw x13,0(x25) +800001f4: 00468863 beq x13,x4,80000204 +800001f8: 6c90176f jal x14,800020c0 +800001fc: 800001ec .word 0x800001ec +80000200: 800047c0 .word 0x800047c0 +80000204: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xeff6c645 +80000208: 000da603 lw x12,0(x27) +8000020c: 004d8d93 addi x27,x27,4 + +80000210 : +Zknh_sha256sig1_cg_cp_rs1_b12: + sha256sig1 x22, x12 # perform operation +80000210: 10361b13 sha256sig1 x22,x12 + # Check if x22 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x22, Zknh_sha256sig1_cg_cp_rs1_b12, Zknh_sha256sig1_cg_cp_rs1_b12_str) +80000214: 000ca683 lw x13,0(x25) +80000218: 01668863 beq x13,x22,80000228 +8000021c: 6a50176f jal x14,800020c0 +80000220: 80000210 .word 0x80000210 +80000224: 800047f9 .word 0x800047f9 +80000228: 004c8c93 addi x25,x25,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000022c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000230: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x343965a3 +80000234: 000da683 lw x13,0(x27) +80000238: 004d8d93 addi x27,x27,4 + +8000023c : +Zknh_sha256sig1_cg_cp_rs1_b13: + sha256sig1 x26, x13 # perform operation +8000023c: 10369d13 sha256sig1 x26,x13 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zknh_sha256sig1_cg_cp_rs1_b13, Zknh_sha256sig1_cg_cp_rs1_b13_str) +80000240: 000ca383 lw x7,0(x25) +80000244: 01a38863 beq x7,x26,80000254 +80000248: 6510146f jal x8,80002098 +8000024c: 8000023c .word 0x8000023c +80000250: 80004832 .word 0x80004832 +80000254: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x754c21b5 +80000258: 000da703 lw x14,0(x27) +8000025c: 004d8d93 addi x27,x27,4 + +80000260 : +Zknh_sha256sig1_cg_cp_rs1_b14: + sha256sig1 x3, x14 # perform operation +80000260: 10371193 sha256sig1 x3,x14 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknh_sha256sig1_cg_cp_rs1_b14, Zknh_sha256sig1_cg_cp_rs1_b14_str) +80000264: 000ca383 lw x7,0(x25) +80000268: 00338863 beq x7,x3,80000278 +8000026c: 62d0146f jal x8,80002098 +80000270: 80000260 .word 0x80000260 +80000274: 8000486b .word 0x8000486b +80000278: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x6697d76e +8000027c: 000da783 lw x15,0(x27) +80000280: 004d8d93 addi x27,x27,4 + +80000284 : +Zknh_sha256sig1_cg_cp_rs1_b15: + sha256sig1 x17, x15 # perform operation +80000284: 10379893 sha256sig1 x17,x15 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zknh_sha256sig1_cg_cp_rs1_b15, Zknh_sha256sig1_cg_cp_rs1_b15_str) +80000288: 000ca383 lw x7,0(x25) +8000028c: 01138863 beq x7,x17,8000029c +80000290: 6090146f jal x8,80002098 +80000294: 80000284 .word 0x80000284 +80000298: 800048a4 .word 0x800048a4 +8000029c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x5c4b05ef +800002a0: 000da803 lw x16,0(x27) +800002a4: 004d8d93 addi x27,x27,4 + +800002a8 : +Zknh_sha256sig1_cg_cp_rs1_b16: + sha256sig1 x5, x16 # perform operation +800002a8: 10381293 sha256sig1 x5,x16 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknh_sha256sig1_cg_cp_rs1_b16, Zknh_sha256sig1_cg_cp_rs1_b16_str) +800002ac: 000ca383 lw x7,0(x25) +800002b0: 00538863 beq x7,x5,800002c0 +800002b4: 5e50146f jal x8,80002098 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 800048dd .word 0x800048dd +800002c0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x8de6c96b +800002c4: 000da883 lw x17,0(x27) +800002c8: 004d8d93 addi x27,x27,4 + +800002cc : +Zknh_sha256sig1_cg_cp_rs1_b17: + sha256sig1 x19, x17 # perform operation +800002cc: 10389993 sha256sig1 x19,x17 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zknh_sha256sig1_cg_cp_rs1_b17, Zknh_sha256sig1_cg_cp_rs1_b17_str) +800002d0: 000ca383 lw x7,0(x25) +800002d4: 01338863 beq x7,x19,800002e4 +800002d8: 5c10146f jal x8,80002098 +800002dc: 800002cc .word 0x800002cc +800002e0: 80004916 .word 0x80004916 +800002e4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x9c847569 +800002e8: 000da903 lw x18,0(x27) +800002ec: 004d8d93 addi x27,x27,4 + +800002f0 : +Zknh_sha256sig1_cg_cp_rs1_b18: + sha256sig1 x29, x18 # perform operation +800002f0: 10391e93 sha256sig1 x29,x18 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zknh_sha256sig1_cg_cp_rs1_b18, Zknh_sha256sig1_cg_cp_rs1_b18_str) +800002f4: 000ca383 lw x7,0(x25) +800002f8: 01d38863 beq x7,x29,80000308 +800002fc: 59d0146f jal x8,80002098 +80000300: 800002f0 .word 0x800002f0 +80000304: 8000494f .word 0x8000494f +80000308: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0xc013e3c0 +8000030c: 000da983 lw x19,0(x27) +80000310: 004d8d93 addi x27,x27,4 + +80000314 : +Zknh_sha256sig1_cg_cp_rs1_b19: + sha256sig1 x22, x19 # perform operation +80000314: 10399b13 sha256sig1 x22,x19 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zknh_sha256sig1_cg_cp_rs1_b19, Zknh_sha256sig1_cg_cp_rs1_b19_str) +80000318: 000ca383 lw x7,0(x25) +8000031c: 01638863 beq x7,x22,8000032c +80000320: 5790146f jal x8,80002098 +80000324: 80000314 .word 0x80000314 +80000328: 80004988 .word 0x80004988 +8000032c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xf44f6310 +80000330: 000daa03 lw x20,0(x27) +80000334: 004d8d93 addi x27,x27,4 + +80000338 : +Zknh_sha256sig1_cg_cp_rs1_b20: + sha256sig1 x14, x20 # perform operation +80000338: 103a1713 sha256sig1 x14,x20 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zknh_sha256sig1_cg_cp_rs1_b20, Zknh_sha256sig1_cg_cp_rs1_b20_str) +8000033c: 000ca383 lw x7,0(x25) +80000340: 00e38863 beq x7,x14,80000350 +80000344: 5550146f jal x8,80002098 +80000348: 80000338 .word 0x80000338 +8000034c: 800049c1 .word 0x800049c1 +80000350: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x10acc5c8 +80000354: 000daa83 lw x21,0(x27) +80000358: 004d8d93 addi x27,x27,4 + +8000035c : +Zknh_sha256sig1_cg_cp_rs1_b21: + sha256sig1 x16, x21 # perform operation +8000035c: 103a9813 sha256sig1 x16,x21 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknh_sha256sig1_cg_cp_rs1_b21, Zknh_sha256sig1_cg_cp_rs1_b21_str) +80000360: 000ca383 lw x7,0(x25) +80000364: 01038863 beq x7,x16,80000374 +80000368: 5310146f jal x8,80002098 +8000036c: 8000035c .word 0x8000035c +80000370: 800049fa .word 0x800049fa +80000374: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x0e03a077 +80000378: 000dab03 lw x22,0(x27) +8000037c: 004d8d93 addi x27,x27,4 + +80000380 : +Zknh_sha256sig1_cg_cp_rs1_b22: + sha256sig1 x3, x22 # perform operation +80000380: 103b1193 sha256sig1 x3,x22 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknh_sha256sig1_cg_cp_rs1_b22, Zknh_sha256sig1_cg_cp_rs1_b22_str) +80000384: 000ca383 lw x7,0(x25) +80000388: 00338863 beq x7,x3,80000398 +8000038c: 50d0146f jal x8,80002098 +80000390: 80000380 .word 0x80000380 +80000394: 80004a33 .word 0x80004a33 +80000398: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x3792d07b +8000039c: 000dab83 lw x23,0(x27) +800003a0: 004d8d93 addi x27,x27,4 + +800003a4 : +Zknh_sha256sig1_cg_cp_rs1_b23: + sha256sig1 x16, x23 # perform operation +800003a4: 103b9813 sha256sig1 x16,x23 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknh_sha256sig1_cg_cp_rs1_b23, Zknh_sha256sig1_cg_cp_rs1_b23_str) +800003a8: 000ca383 lw x7,0(x25) +800003ac: 01038863 beq x7,x16,800003bc +800003b0: 4e90146f jal x8,80002098 +800003b4: 800003a4 .word 0x800003a4 +800003b8: 80004a6c .word 0x80004a6c +800003bc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x8f104bfe +800003c0: 000dac03 lw x24,0(x27) +800003c4: 004d8d93 addi x27,x27,4 + +800003c8 : +Zknh_sha256sig1_cg_cp_rs1_b24: + sha256sig1 x3, x24 # perform operation +800003c8: 103c1193 sha256sig1 x3,x24 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknh_sha256sig1_cg_cp_rs1_b24, Zknh_sha256sig1_cg_cp_rs1_b24_str) +800003cc: 000ca383 lw x7,0(x25) +800003d0: 00338863 beq x7,x3,800003e0 +800003d4: 4c50146f jal x8,80002098 +800003d8: 800003c8 .word 0x800003c8 +800003dc: 80004aa5 .word 0x80004aa5 +800003e0: 004c8c93 addi x25,x25,4 + + mv x24, x25 # switch signature pointer register to avoid conflict with test +800003e4: 000c8c13 addi x24,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xed7410d8 +800003e8: 000dac83 lw x25,0(x27) +800003ec: 004d8d93 addi x27,x27,4 + +800003f0 : +Zknh_sha256sig1_cg_cp_rs1_b25: + sha256sig1 x5, x25 # perform operation +800003f0: 103c9293 sha256sig1 x5,x25 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknh_sha256sig1_cg_cp_rs1_b25, Zknh_sha256sig1_cg_cp_rs1_b25_str) +800003f4: 000c2383 lw x7,0(x24) +800003f8: 00538863 beq x7,x5,80000408 +800003fc: 49d0146f jal x8,80002098 +80000400: 800003f0 .word 0x800003f0 +80000404: 80004ade .word 0x80004ade +80000408: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xfb8a9463 +8000040c: 000dad03 lw x26,0(x27) +80000410: 004d8d93 addi x27,x27,4 + +80000414 : +Zknh_sha256sig1_cg_cp_rs1_b26: + sha256sig1 x18, x26 # perform operation +80000414: 103d1913 sha256sig1 x18,x26 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zknh_sha256sig1_cg_cp_rs1_b26, Zknh_sha256sig1_cg_cp_rs1_b26_str) +80000418: 000c2383 lw x7,0(x24) +8000041c: 01238863 beq x7,x18,8000042c +80000420: 4790146f jal x8,80002098 +80000424: 80000414 .word 0x80000414 +80000428: 80004b17 .word 0x80004b17 +8000042c: 004c0c13 addi x24,x24,4 + + mv x16, x27 # switch data pointer register to avoid conflict with test +80000430: 000d8813 addi x16,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x7857fec9 +80000434: 00082d83 lw x27,0(x16) +80000438: 00480813 addi x16,x16,4 + +8000043c : +Zknh_sha256sig1_cg_cp_rs1_b27: + sha256sig1 x2, x27 # perform operation +8000043c: 103d9113 sha256sig1 x2,x27 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zknh_sha256sig1_cg_cp_rs1_b27, Zknh_sha256sig1_cg_cp_rs1_b27_str) +80000440: 000c2383 lw x7,0(x24) +80000444: 00238863 beq x7,x2,80000454 +80000448: 4510146f jal x8,80002098 +8000044c: 8000043c .word 0x8000043c +80000450: 80004b50 .word 0x80004b50 +80000454: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x59a57275 +80000458: 00082e03 lw x28,0(x16) +8000045c: 00480813 addi x16,x16,4 + +80000460 : +Zknh_sha256sig1_cg_cp_rs1_b28: + sha256sig1 x30, x28 # perform operation +80000460: 103e1f13 sha256sig1 x30,x28 + # Check if x30 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x30, Zknh_sha256sig1_cg_cp_rs1_b28, Zknh_sha256sig1_cg_cp_rs1_b28_str) +80000464: 000c2383 lw x7,0(x24) +80000468: 01e38863 beq x7,x30,80000478 +8000046c: 42d0146f jal x8,80002098 +80000470: 80000460 .word 0x80000460 +80000474: 80004b89 .word 0x80004b89 +80000478: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x606ce11d +8000047c: 00082e83 lw x29,0(x16) +80000480: 00480813 addi x16,x16,4 + +80000484 : +Zknh_sha256sig1_cg_cp_rs1_b29: + sha256sig1 x4, x29 # perform operation +80000484: 103e9213 sha256sig1 x4,x29 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknh_sha256sig1_cg_cp_rs1_b29, Zknh_sha256sig1_cg_cp_rs1_b29_str) +80000488: 000c2383 lw x7,0(x24) +8000048c: 00438863 beq x7,x4,8000049c +80000490: 4090146f jal x8,80002098 +80000494: 80000484 .word 0x80000484 +80000498: 80004bc2 .word 0x80004bc2 +8000049c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xafd1d9ef +800004a0: 00082f03 lw x30,0(x16) +800004a4: 00480813 addi x16,x16,4 + +800004a8 : +Zknh_sha256sig1_cg_cp_rs1_b30: + sha256sig1 x20, x30 # perform operation +800004a8: 103f1a13 sha256sig1 x20,x30 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zknh_sha256sig1_cg_cp_rs1_b30, Zknh_sha256sig1_cg_cp_rs1_b30_str) +800004ac: 000c2383 lw x7,0(x24) +800004b0: 01438863 beq x7,x20,800004c0 +800004b4: 3e50146f jal x8,80002098 +800004b8: 800004a8 .word 0x800004a8 +800004bc: 80004bfb .word 0x80004bfb +800004c0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x8370dbd6 +800004c4: 00082f83 lw x31,0(x16) +800004c8: 00480813 addi x16,x16,4 + +800004cc : +Zknh_sha256sig1_cg_cp_rs1_b31: + sha256sig1 x6, x31 # perform operation +800004cc: 103f9313 sha256sig1 x6,x31 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknh_sha256sig1_cg_cp_rs1_b31, Zknh_sha256sig1_cg_cp_rs1_b31_str) +800004d0: 000c2383 lw x7,0(x24) +800004d4: 00638863 beq x7,x6,800004e4 +800004d8: 3c10146f jal x8,80002098 +800004dc: 800004cc .word 0x800004cc +800004e0: 80004c34 .word 0x80004c34 +800004e4: 004c0c13 addi x24,x24,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x660f4bf0 +800004e8: 00082e83 lw x29,0(x16) +800004ec: 00480813 addi x16,x16,4 + +800004f0 : +Zknh_sha256sig1_cg_cp_rd_b0: + sha256sig1 x0, x29 # perform operation +800004f0: 103e9013 sha256sig1 x0,x29 + # Check if x0 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x0, Zknh_sha256sig1_cg_cp_rd_b0, Zknh_sha256sig1_cg_cp_rd_b0_str) +800004f4: 000c2383 lw x7,0(x24) +800004f8: 00038863 beq x7,x0,80000508 +800004fc: 39d0146f jal x8,80002098 +80000500: 800004f0 .word 0x800004f0 +80000504: 80004c6d .word 0x80004c6d +80000508: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x33fd39d7 +8000050c: 00082d03 lw x26,0(x16) +80000510: 00480813 addi x16,x16,4 + +80000514 : +Zknh_sha256sig1_cg_cp_rd_b1: + sha256sig1 x1, x26 # perform operation +80000514: 103d1093 sha256sig1 x1,x26 + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zknh_sha256sig1_cg_cp_rd_b1, Zknh_sha256sig1_cg_cp_rd_b1_str) +80000518: 000c2383 lw x7,0(x24) +8000051c: 00138863 beq x7,x1,8000052c +80000520: 3790146f jal x8,80002098 +80000524: 80000514 .word 0x80000514 +80000528: 80004ca4 .word 0x80004ca4 +8000052c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x8bf1fa12 +80000530: 00082c83 lw x25,0(x16) +80000534: 00480813 addi x16,x16,4 + +80000538 : +Zknh_sha256sig1_cg_cp_rd_b2: + sha256sig1 x2, x25 # perform operation +80000538: 103c9113 sha256sig1 x2,x25 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zknh_sha256sig1_cg_cp_rd_b2, Zknh_sha256sig1_cg_cp_rd_b2_str) +8000053c: 000c2383 lw x7,0(x24) +80000540: 00238863 beq x7,x2,80000550 +80000544: 3550146f jal x8,80002098 +80000548: 80000538 .word 0x80000538 +8000054c: 80004cdb .word 0x80004cdb +80000550: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x8f71184d +80000554: 00082783 lw x15,0(x16) +80000558: 00480813 addi x16,x16,4 + +8000055c : +Zknh_sha256sig1_cg_cp_rd_b3: + sha256sig1 x3, x15 # perform operation +8000055c: 10379193 sha256sig1 x3,x15 + # Check if x3 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x3, Zknh_sha256sig1_cg_cp_rd_b3, Zknh_sha256sig1_cg_cp_rd_b3_str) +80000560: 000c2383 lw x7,0(x24) +80000564: 00338863 beq x7,x3,80000574 +80000568: 3310146f jal x8,80002098 +8000056c: 8000055c .word 0x8000055c +80000570: 80004d12 .word 0x80004d12 +80000574: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x1b27f331 +80000578: 00082503 lw x10,0(x16) +8000057c: 00480813 addi x16,x16,4 + +80000580 : +Zknh_sha256sig1_cg_cp_rd_b4: + sha256sig1 x4, x10 # perform operation +80000580: 10351213 sha256sig1 x4,x10 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknh_sha256sig1_cg_cp_rd_b4, Zknh_sha256sig1_cg_cp_rd_b4_str) +80000584: 000c2383 lw x7,0(x24) +80000588: 00438863 beq x7,x4,80000598 +8000058c: 30d0146f jal x8,80002098 +80000590: 80000580 .word 0x80000580 +80000594: 80004d49 .word 0x80004d49 +80000598: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x27255f3a +8000059c: 00082683 lw x13,0(x16) +800005a0: 00480813 addi x16,x16,4 + +800005a4 : +Zknh_sha256sig1_cg_cp_rd_b5: + sha256sig1 x5, x13 # perform operation +800005a4: 10369293 sha256sig1 x5,x13 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknh_sha256sig1_cg_cp_rd_b5, Zknh_sha256sig1_cg_cp_rd_b5_str) +800005a8: 000c2383 lw x7,0(x24) +800005ac: 00538863 beq x7,x5,800005bc +800005b0: 2e90146f jal x8,80002098 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 80004d80 .word 0x80004d80 +800005bc: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x810e3e7d +800005c0: 00082083 lw x1,0(x16) +800005c4: 00480813 addi x16,x16,4 + +800005c8 : +Zknh_sha256sig1_cg_cp_rd_b6: + sha256sig1 x6, x1 # perform operation +800005c8: 10309313 sha256sig1 x6,x1 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknh_sha256sig1_cg_cp_rd_b6, Zknh_sha256sig1_cg_cp_rd_b6_str) +800005cc: 000c2383 lw x7,0(x24) +800005d0: 00638863 beq x7,x6,800005e0 +800005d4: 2c50146f jal x8,80002098 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 80004db7 .word 0x80004db7 +800005e0: 004c0c13 addi x24,x24,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005e4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005e8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xbd008b57 +800005ec: 00082f83 lw x31,0(x16) +800005f0: 00480813 addi x16,x16,4 + +800005f4 : +Zknh_sha256sig1_cg_cp_rd_b7: + sha256sig1 x7, x31 # perform operation +800005f4: 103f9393 sha256sig1 x7,x31 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zknh_sha256sig1_cg_cp_rd_b7, Zknh_sha256sig1_cg_cp_rd_b7_str) +800005f8: 000c2203 lw x4,0(x24) +800005fc: 00720863 beq x4,x7,8000060c +80000600: 281012ef jal x5,80002080 +80000604: 800005f4 .word 0x800005f4 +80000608: 80004dee .word 0x80004dee +8000060c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0xf2a7e9aa +80000610: 00082d03 lw x26,0(x16) +80000614: 00480813 addi x16,x16,4 + +80000618 : +Zknh_sha256sig1_cg_cp_rd_b8: + sha256sig1 x8, x26 # perform operation +80000618: 103d1413 sha256sig1 x8,x26 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zknh_sha256sig1_cg_cp_rd_b8, Zknh_sha256sig1_cg_cp_rd_b8_str) +8000061c: 000c2203 lw x4,0(x24) +80000620: 00820863 beq x4,x8,80000630 +80000624: 25d012ef jal x5,80002080 +80000628: 80000618 .word 0x80000618 +8000062c: 80004e25 .word 0x80004e25 +80000630: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0xb3b5eb44 +80000634: 00082a83 lw x21,0(x16) +80000638: 00480813 addi x16,x16,4 + +8000063c : +Zknh_sha256sig1_cg_cp_rd_b9: + sha256sig1 x9, x21 # perform operation +8000063c: 103a9493 sha256sig1 x9,x21 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zknh_sha256sig1_cg_cp_rd_b9, Zknh_sha256sig1_cg_cp_rd_b9_str) +80000640: 000c2203 lw x4,0(x24) +80000644: 00920863 beq x4,x9,80000654 +80000648: 239012ef jal x5,80002080 +8000064c: 8000063c .word 0x8000063c +80000650: 80004e5c .word 0x80004e5c +80000654: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xbecbd070 +80000658: 00082983 lw x19,0(x16) +8000065c: 00480813 addi x16,x16,4 + +80000660 : +Zknh_sha256sig1_cg_cp_rd_b10: + sha256sig1 x10, x19 # perform operation +80000660: 10399513 sha256sig1 x10,x19 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zknh_sha256sig1_cg_cp_rd_b10, Zknh_sha256sig1_cg_cp_rd_b10_str) +80000664: 000c2203 lw x4,0(x24) +80000668: 00a20863 beq x4,x10,80000678 +8000066c: 215012ef jal x5,80002080 +80000670: 80000660 .word 0x80000660 +80000674: 80004e93 .word 0x80004e93 +80000678: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xefa2e794 +8000067c: 00082403 lw x8,0(x16) +80000680: 00480813 addi x16,x16,4 + +80000684 : +Zknh_sha256sig1_cg_cp_rd_b11: + sha256sig1 x11, x8 # perform operation +80000684: 10341593 sha256sig1 x11,x8 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zknh_sha256sig1_cg_cp_rd_b11, Zknh_sha256sig1_cg_cp_rd_b11_str) +80000688: 000c2203 lw x4,0(x24) +8000068c: 00b20863 beq x4,x11,8000069c +80000690: 1f1012ef jal x5,80002080 +80000694: 80000684 .word 0x80000684 +80000698: 80004ecb .word 0x80004ecb +8000069c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xc7f2e9ff +800006a0: 00082483 lw x9,0(x16) +800006a4: 00480813 addi x16,x16,4 + +800006a8 : +Zknh_sha256sig1_cg_cp_rd_b12: + sha256sig1 x12, x9 # perform operation +800006a8: 10349613 sha256sig1 x12,x9 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zknh_sha256sig1_cg_cp_rd_b12, Zknh_sha256sig1_cg_cp_rd_b12_str) +800006ac: 000c2203 lw x4,0(x24) +800006b0: 00c20863 beq x4,x12,800006c0 +800006b4: 1cd012ef jal x5,80002080 +800006b8: 800006a8 .word 0x800006a8 +800006bc: 80004f03 .word 0x80004f03 +800006c0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x69b6b9de +800006c4: 00082503 lw x10,0(x16) +800006c8: 00480813 addi x16,x16,4 + +800006cc : +Zknh_sha256sig1_cg_cp_rd_b13: + sha256sig1 x13, x10 # perform operation +800006cc: 10351693 sha256sig1 x13,x10 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zknh_sha256sig1_cg_cp_rd_b13, Zknh_sha256sig1_cg_cp_rd_b13_str) +800006d0: 000c2203 lw x4,0(x24) +800006d4: 00d20863 beq x4,x13,800006e4 +800006d8: 1a9012ef jal x5,80002080 +800006dc: 800006cc .word 0x800006cc +800006e0: 80004f3b .word 0x80004f3b +800006e4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x46bca2f1 +800006e8: 00082d03 lw x26,0(x16) +800006ec: 00480813 addi x16,x16,4 + +800006f0 : +Zknh_sha256sig1_cg_cp_rd_b14: + sha256sig1 x14, x26 # perform operation +800006f0: 103d1713 sha256sig1 x14,x26 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zknh_sha256sig1_cg_cp_rd_b14, Zknh_sha256sig1_cg_cp_rd_b14_str) +800006f4: 000c2203 lw x4,0(x24) +800006f8: 00e20863 beq x4,x14,80000708 +800006fc: 185012ef jal x5,80002080 +80000700: 800006f0 .word 0x800006f0 +80000704: 80004f73 .word 0x80004f73 +80000708: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xe3211019 +8000070c: 00082b83 lw x23,0(x16) +80000710: 00480813 addi x16,x16,4 + +80000714 : +Zknh_sha256sig1_cg_cp_rd_b15: + sha256sig1 x15, x23 # perform operation +80000714: 103b9793 sha256sig1 x15,x23 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zknh_sha256sig1_cg_cp_rd_b15, Zknh_sha256sig1_cg_cp_rd_b15_str) +80000718: 000c2203 lw x4,0(x24) +8000071c: 00f20863 beq x4,x15,8000072c +80000720: 161012ef jal x5,80002080 +80000724: 80000714 .word 0x80000714 +80000728: 80004fab .word 0x80004fab +8000072c: 004c0c13 addi x24,x24,4 + + mv x1, x16 # switch data pointer register to avoid conflict with test +80000730: 00080093 addi x1,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x9b133354 +80000734: 0000ae03 lw x28,0(x1) +80000738: 00408093 addi x1,x1,4 + +8000073c : +Zknh_sha256sig1_cg_cp_rd_b16: + sha256sig1 x16, x28 # perform operation +8000073c: 103e1813 sha256sig1 x16,x28 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zknh_sha256sig1_cg_cp_rd_b16, Zknh_sha256sig1_cg_cp_rd_b16_str) +80000740: 000c2203 lw x4,0(x24) +80000744: 01020863 beq x4,x16,80000754 +80000748: 139012ef jal x5,80002080 +8000074c: 8000073c .word 0x8000073c +80000750: 80004fe3 .word 0x80004fe3 +80000754: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x01fe7949 +80000758: 0000ab03 lw x22,0(x1) +8000075c: 00408093 addi x1,x1,4 + +80000760 : +Zknh_sha256sig1_cg_cp_rd_b17: + sha256sig1 x17, x22 # perform operation +80000760: 103b1893 sha256sig1 x17,x22 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknh_sha256sig1_cg_cp_rd_b17, Zknh_sha256sig1_cg_cp_rd_b17_str) +80000764: 000c2203 lw x4,0(x24) +80000768: 01120863 beq x4,x17,80000778 +8000076c: 115012ef jal x5,80002080 +80000770: 80000760 .word 0x80000760 +80000774: 8000501b .word 0x8000501b +80000778: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x1033dbbd +8000077c: 0000a383 lw x7,0(x1) +80000780: 00408093 addi x1,x1,4 + +80000784 : +Zknh_sha256sig1_cg_cp_rd_b18: + sha256sig1 x18, x7 # perform operation +80000784: 10339913 sha256sig1 x18,x7 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zknh_sha256sig1_cg_cp_rd_b18, Zknh_sha256sig1_cg_cp_rd_b18_str) +80000788: 000c2203 lw x4,0(x24) +8000078c: 01220863 beq x4,x18,8000079c +80000790: 0f1012ef jal x5,80002080 +80000794: 80000784 .word 0x80000784 +80000798: 80005053 .word 0x80005053 +8000079c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x03795e5d +800007a0: 0000a303 lw x6,0(x1) +800007a4: 00408093 addi x1,x1,4 + +800007a8 : +Zknh_sha256sig1_cg_cp_rd_b19: + sha256sig1 x19, x6 # perform operation +800007a8: 10331993 sha256sig1 x19,x6 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zknh_sha256sig1_cg_cp_rd_b19, Zknh_sha256sig1_cg_cp_rd_b19_str) +800007ac: 000c2203 lw x4,0(x24) +800007b0: 01320863 beq x4,x19,800007c0 +800007b4: 0cd012ef jal x5,80002080 +800007b8: 800007a8 .word 0x800007a8 +800007bc: 8000508b .word 0x8000508b +800007c0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xfb293d5d +800007c4: 0000a803 lw x16,0(x1) +800007c8: 00408093 addi x1,x1,4 + +800007cc : +Zknh_sha256sig1_cg_cp_rd_b20: + sha256sig1 x20, x16 # perform operation +800007cc: 10381a13 sha256sig1 x20,x16 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zknh_sha256sig1_cg_cp_rd_b20, Zknh_sha256sig1_cg_cp_rd_b20_str) +800007d0: 000c2203 lw x4,0(x24) +800007d4: 01420863 beq x4,x20,800007e4 +800007d8: 0a9012ef jal x5,80002080 +800007dc: 800007cc .word 0x800007cc +800007e0: 800050c3 .word 0x800050c3 +800007e4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x297f21b6 +800007e8: 0000ab03 lw x22,0(x1) +800007ec: 00408093 addi x1,x1,4 + +800007f0 : +Zknh_sha256sig1_cg_cp_rd_b21: + sha256sig1 x21, x22 # perform operation +800007f0: 103b1a93 sha256sig1 x21,x22 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknh_sha256sig1_cg_cp_rd_b21, Zknh_sha256sig1_cg_cp_rd_b21_str) +800007f4: 000c2203 lw x4,0(x24) +800007f8: 01520863 beq x4,x21,80000808 +800007fc: 085012ef jal x5,80002080 +80000800: 800007f0 .word 0x800007f0 +80000804: 800050fb .word 0x800050fb +80000808: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xd96f66a2 +8000080c: 0000a983 lw x19,0(x1) +80000810: 00408093 addi x1,x1,4 + +80000814 : +Zknh_sha256sig1_cg_cp_rd_b22: + sha256sig1 x22, x19 # perform operation +80000814: 10399b13 sha256sig1 x22,x19 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zknh_sha256sig1_cg_cp_rd_b22, Zknh_sha256sig1_cg_cp_rd_b22_str) +80000818: 000c2203 lw x4,0(x24) +8000081c: 01620863 beq x4,x22,8000082c +80000820: 061012ef jal x5,80002080 +80000824: 80000814 .word 0x80000814 +80000828: 80005133 .word 0x80005133 +8000082c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xaa8a5bcd +80000830: 0000ae03 lw x28,0(x1) +80000834: 00408093 addi x1,x1,4 + +80000838 : +Zknh_sha256sig1_cg_cp_rd_b23: + sha256sig1 x23, x28 # perform operation +80000838: 103e1b93 sha256sig1 x23,x28 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha256sig1_cg_cp_rd_b23, Zknh_sha256sig1_cg_cp_rd_b23_str) +8000083c: 000c2203 lw x4,0(x24) +80000840: 01720863 beq x4,x23,80000850 +80000844: 03d012ef jal x5,80002080 +80000848: 80000838 .word 0x80000838 +8000084c: 8000516b .word 0x8000516b +80000850: 004c0c13 addi x24,x24,4 + + mv x9, x24 # switch signature pointer register to avoid conflict with test +80000854: 000c0493 addi x9,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xe0984a42 +80000858: 0000ab03 lw x22,0(x1) +8000085c: 00408093 addi x1,x1,4 + +80000860 : +Zknh_sha256sig1_cg_cp_rd_b24: + sha256sig1 x24, x22 # perform operation +80000860: 103b1c13 sha256sig1 x24,x22 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zknh_sha256sig1_cg_cp_rd_b24, Zknh_sha256sig1_cg_cp_rd_b24_str) +80000864: 0004a203 lw x4,0(x9) +80000868: 01820863 beq x4,x24,80000878 +8000086c: 015012ef jal x5,80002080 +80000870: 80000860 .word 0x80000860 +80000874: 800051a3 .word 0x800051a3 +80000878: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x814c2ec1 +8000087c: 0000ad03 lw x26,0(x1) +80000880: 00408093 addi x1,x1,4 + +80000884 : +Zknh_sha256sig1_cg_cp_rd_b25: + sha256sig1 x25, x26 # perform operation +80000884: 103d1c93 sha256sig1 x25,x26 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zknh_sha256sig1_cg_cp_rd_b25, Zknh_sha256sig1_cg_cp_rd_b25_str) +80000888: 0004a203 lw x4,0(x9) +8000088c: 01920863 beq x4,x25,8000089c +80000890: 7f0012ef jal x5,80002080 +80000894: 80000884 .word 0x80000884 +80000898: 800051db .word 0x800051db +8000089c: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x77502a2b +800008a0: 0000ae03 lw x28,0(x1) +800008a4: 00408093 addi x1,x1,4 + +800008a8 : +Zknh_sha256sig1_cg_cp_rd_b26: + sha256sig1 x26, x28 # perform operation +800008a8: 103e1d13 sha256sig1 x26,x28 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zknh_sha256sig1_cg_cp_rd_b26, Zknh_sha256sig1_cg_cp_rd_b26_str) +800008ac: 0004a203 lw x4,0(x9) +800008b0: 01a20863 beq x4,x26,800008c0 +800008b4: 7cc012ef jal x5,80002080 +800008b8: 800008a8 .word 0x800008a8 +800008bc: 80005213 .word 0x80005213 +800008c0: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x5368bc32 +800008c4: 0000aa03 lw x20,0(x1) +800008c8: 00408093 addi x1,x1,4 + +800008cc : +Zknh_sha256sig1_cg_cp_rd_b27: + sha256sig1 x27, x20 # perform operation +800008cc: 103a1d93 sha256sig1 x27,x20 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zknh_sha256sig1_cg_cp_rd_b27, Zknh_sha256sig1_cg_cp_rd_b27_str) +800008d0: 0004a203 lw x4,0(x9) +800008d4: 01b20863 beq x4,x27,800008e4 +800008d8: 7a8012ef jal x5,80002080 +800008dc: 800008cc .word 0x800008cc +800008e0: 8000524b .word 0x8000524b +800008e4: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x520cabe1 +800008e8: 0000ac03 lw x24,0(x1) +800008ec: 00408093 addi x1,x1,4 + +800008f0 : +Zknh_sha256sig1_cg_cp_rd_b28: + sha256sig1 x28, x24 # perform operation +800008f0: 103c1e13 sha256sig1 x28,x24 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zknh_sha256sig1_cg_cp_rd_b28, Zknh_sha256sig1_cg_cp_rd_b28_str) +800008f4: 0004a203 lw x4,0(x9) +800008f8: 01c20863 beq x4,x28,80000908 +800008fc: 784012ef jal x5,80002080 +80000900: 800008f0 .word 0x800008f0 +80000904: 80005283 .word 0x80005283 +80000908: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x92be5edd +8000090c: 0000ae03 lw x28,0(x1) +80000910: 00408093 addi x1,x1,4 + +80000914 : +Zknh_sha256sig1_cg_cp_rd_b29: + sha256sig1 x29, x28 # perform operation +80000914: 103e1e93 sha256sig1 x29,x28 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zknh_sha256sig1_cg_cp_rd_b29, Zknh_sha256sig1_cg_cp_rd_b29_str) +80000918: 0004a203 lw x4,0(x9) +8000091c: 01d20863 beq x4,x29,8000092c +80000920: 760012ef jal x5,80002080 +80000924: 80000914 .word 0x80000914 +80000928: 800052bb .word 0x800052bb +8000092c: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x990b06e5 +80000930: 0000ae03 lw x28,0(x1) +80000934: 00408093 addi x1,x1,4 + +80000938 : +Zknh_sha256sig1_cg_cp_rd_b30: + sha256sig1 x30, x28 # perform operation +80000938: 103e1f13 sha256sig1 x30,x28 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zknh_sha256sig1_cg_cp_rd_b30, Zknh_sha256sig1_cg_cp_rd_b30_str) +8000093c: 0004a203 lw x4,0(x9) +80000940: 01e20863 beq x4,x30,80000950 +80000944: 73c012ef jal x5,80002080 +80000948: 80000938 .word 0x80000938 +8000094c: 800052f3 .word 0x800052f3 +80000950: 00448493 addi x9,x9,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x634a8d11 +80000954: 0000ab03 lw x22,0(x1) +80000958: 00408093 addi x1,x1,4 + +8000095c : +Zknh_sha256sig1_cg_cp_rd_b31: + sha256sig1 x31, x22 # perform operation +8000095c: 103b1f93 sha256sig1 x31,x22 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zknh_sha256sig1_cg_cp_rd_b31, Zknh_sha256sig1_cg_cp_rd_b31_str) +80000960: 0004a203 lw x4,0(x9) +80000964: 01f20863 beq x4,x31,80000974 +80000968: 718012ef jal x5,80002080 +8000096c: 8000095c .word 0x8000095c +80000970: 8000532b .word 0x8000532b +80000974: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x00000000 +80000978: 0000a983 lw x19,0(x1) +8000097c: 00408093 addi x1,x1,4 + +80000980 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x0: + sha256sig1 x23, x19 # perform operation +80000980: 10399b93 sha256sig1 x23,x19 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_edges_0x0, Zknh_sha256sig1_cg_cp_rs1_edges_0x0_str) +80000984: 0004a203 lw x4,0(x9) +80000988: 01720863 beq x4,x23,80000998 +8000098c: 6f4012ef jal x5,80002080 +80000990: 80000980 .word 0x80000980 +80000994: 80005363 .word 0x80005363 +80000998: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x00000001 +8000099c: 0000a903 lw x18,0(x1) +800009a0: 00408093 addi x1,x1,4 + +800009a4 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x1: + sha256sig1 x23, x18 # perform operation +800009a4: 10391b93 sha256sig1 x23,x18 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_edges_0x1, Zknh_sha256sig1_cg_cp_rs1_edges_0x1_str) +800009a8: 0004a203 lw x4,0(x9) +800009ac: 01720863 beq x4,x23,800009bc +800009b0: 6d0012ef jal x5,80002080 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 800053a2 .word 0x800053a2 +800009bc: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000002 +800009c0: 0000a183 lw x3,0(x1) +800009c4: 00408093 addi x1,x1,4 + +800009c8 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x2: + sha256sig1 x22, x3 # perform operation +800009c8: 10319b13 sha256sig1 x22,x3 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zknh_sha256sig1_cg_cp_rs1_edges_0x2, Zknh_sha256sig1_cg_cp_rs1_edges_0x2_str) +800009cc: 0004a203 lw x4,0(x9) +800009d0: 01620863 beq x4,x22,800009e0 +800009d4: 6ac012ef jal x5,80002080 +800009d8: 800009c8 .word 0x800009c8 +800009dc: 800053e1 .word 0x800053e1 +800009e0: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x80000000 +800009e4: 0000aa03 lw x20,0(x1) +800009e8: 00408093 addi x1,x1,4 + +800009ec : +Zknh_sha256sig1_cg_cp_rs1_edges_0x80000000: + sha256sig1 x30, x20 # perform operation +800009ec: 103a1f13 sha256sig1 x30,x20 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_edges_0x80000000, Zknh_sha256sig1_cg_cp_rs1_edges_0x80000000_str) +800009f0: 0004a203 lw x4,0(x9) +800009f4: 01e20863 beq x4,x30,80000a04 +800009f8: 688012ef jal x5,80002080 +800009fc: 800009ec .word 0x800009ec +80000a00: 80005420 .word 0x80005420 +80000a04: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x80000001 +80000a08: 0000aa83 lw x21,0(x1) +80000a0c: 00408093 addi x1,x1,4 + +80000a10 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x80000001: + sha256sig1 x30, x21 # perform operation +80000a10: 103a9f13 sha256sig1 x30,x21 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_edges_0x80000001, Zknh_sha256sig1_cg_cp_rs1_edges_0x80000001_str) +80000a14: 0004a203 lw x4,0(x9) +80000a18: 01e20863 beq x4,x30,80000a28 +80000a1c: 664012ef jal x5,80002080 +80000a20: 80000a10 .word 0x80000a10 +80000a24: 80005466 .word 0x80005466 +80000a28: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x7fffffff +80000a2c: 0000aa83 lw x21,0(x1) +80000a30: 00408093 addi x1,x1,4 + +80000a34 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffff: + sha256sig1 x18, x21 # perform operation +80000a34: 103a9913 sha256sig1 x18,x21 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffff, Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffff_str) +80000a38: 0004a203 lw x4,0(x9) +80000a3c: 01220863 beq x4,x18,80000a4c +80000a40: 640012ef jal x5,80002080 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 800054ac .word 0x800054ac +80000a4c: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ffffffe +80000a50: 0000aa03 lw x20,0(x1) +80000a54: 00408093 addi x1,x1,4 + +80000a58 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffe: + sha256sig1 x3, x20 # perform operation +80000a58: 103a1193 sha256sig1 x3,x20 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffe_str) +80000a5c: 0004a203 lw x4,0(x9) +80000a60: 00320863 beq x4,x3,80000a70 +80000a64: 61c012ef jal x5,80002080 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 800054f2 .word 0x800054f2 +80000a70: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xffffffff +80000a74: 0000a383 lw x7,0(x1) +80000a78: 00408093 addi x1,x1,4 + +80000a7c : +Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff: + sha256sig1 x19, x7 # perform operation +80000a7c: 10339993 sha256sig1 x19,x7 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff_str) +80000a80: 0004a203 lw x4,0(x9) +80000a84: 01320863 beq x4,x19,80000a94 +80000a88: 5f8012ef jal x5,80002080 +80000a8c: 80000a7c .word 0x80000a7c +80000a90: 80005538 .word 0x80005538 +80000a94: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xfffffffe +80000a98: 0000ac03 lw x24,0(x1) +80000a9c: 00408093 addi x1,x1,4 + +80000aa0 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe: + sha256sig1 x28, x24 # perform operation +80000aa0: 103c1e13 sha256sig1 x28,x24 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe_str) +80000aa4: 0004a203 lw x4,0(x9) +80000aa8: 01c20863 beq x4,x28,80000ab8 +80000aac: 5d4012ef jal x5,80002080 +80000ab0: 80000aa0 .word 0x80000aa0 +80000ab4: 8000557e .word 0x8000557e +80000ab8: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x5bbc8872 +80000abc: 0000a883 lw x17,0(x1) +80000ac0: 00408093 addi x1,x1,4 + +80000ac4 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc8872: + sha256sig1 x13, x17 # perform operation +80000ac4: 10389693 sha256sig1 x13,x17 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc8872_str) +80000ac8: 0004a203 lw x4,0(x9) +80000acc: 00d20863 beq x4,x13,80000adc +80000ad0: 5b0012ef jal x5,80002080 +80000ad4: 80000ac4 .word 0x80000ac4 +80000ad8: 800055c4 .word 0x800055c4 +80000adc: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xaaaaaaaa +80000ae0: 0000a103 lw x2,0(x1) +80000ae4: 00408093 addi x1,x1,4 + +80000ae8 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaa: + sha256sig1 x24, x2 # perform operation +80000ae8: 10311c13 sha256sig1 x24,x2 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000aec: 0004a203 lw x4,0(x9) +80000af0: 01820863 beq x4,x24,80000b00 +80000af4: 58c012ef jal x5,80002080 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 8000560a .word 0x8000560a +80000b00: 00448493 addi x9,x9,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x55555555 +80000b04: 0000aa03 lw x20,0(x1) +80000b08: 00408093 addi x1,x1,4 + +80000b0c : +Zknh_sha256sig1_cg_cp_rs1_edges_0x55555555: + sha256sig1 x6, x20 # perform operation +80000b0c: 103a1313 sha256sig1 x6,x20 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zknh_sha256sig1_cg_cp_rs1_edges_0x55555555, Zknh_sha256sig1_cg_cp_rs1_edges_0x55555555_str) +80000b10: 0004a203 lw x4,0(x9) +80000b14: 00620863 beq x4,x6,80000b24 +80000b18: 568012ef jal x5,80002080 +80000b1c: 80000b0c .word 0x80000b0c +80000b20: 80005650 .word 0x80005650 +80000b24: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x77e9c24a +80000b28: 0000a003 lw x0,0(x1) +80000b2c: 00408093 addi x1,x1,4 + +80000b30 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b0: + sha256sig1 x0, x0 # perform operation +80000b30: 10301013 sha256sig1 x0,x0 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zknh_sha256sig1_cg_cmp_rd_rs1_b0, Zknh_sha256sig1_cg_cmp_rd_rs1_b0_str) +80000b34: 0004a203 lw x4,0(x9) +80000b38: 00020863 beq x4,x0,80000b48 +80000b3c: 544012ef jal x5,80002080 +80000b40: 80000b30 .word 0x80000b30 +80000b44: 80005696 .word 0x80005696 +80000b48: 00448493 addi x9,x9,4 + + mv x24, x1 # switch data pointer register to avoid conflict with test +80000b4c: 00008c13 addi x24,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x1b4195c1 +80000b50: 000c2083 lw x1,0(x24) +80000b54: 004c0c13 addi x24,x24,4 + +80000b58 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b1: + sha256sig1 x1, x1 # perform operation +80000b58: 10309093 sha256sig1 x1,x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zknh_sha256sig1_cg_cmp_rd_rs1_b1, Zknh_sha256sig1_cg_cmp_rd_rs1_b1_str) +80000b5c: 0004a203 lw x4,0(x9) +80000b60: 00120863 beq x4,x1,80000b70 +80000b64: 51c012ef jal x5,80002080 +80000b68: 80000b58 .word 0x80000b58 +80000b6c: 800056d2 .word 0x800056d2 +80000b70: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xf495cbea +80000b74: 000c2103 lw x2,0(x24) +80000b78: 004c0c13 addi x24,x24,4 + +80000b7c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b2: + sha256sig1 x2, x2 # perform operation +80000b7c: 10311113 sha256sig1 x2,x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zknh_sha256sig1_cg_cmp_rd_rs1_b2, Zknh_sha256sig1_cg_cmp_rd_rs1_b2_str) +80000b80: 0004a203 lw x4,0(x9) +80000b84: 00220863 beq x4,x2,80000b94 +80000b88: 4f8012ef jal x5,80002080 +80000b8c: 80000b7c .word 0x80000b7c +80000b90: 8000570e .word 0x8000570e +80000b94: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x5466047d +80000b98: 000c2183 lw x3,0(x24) +80000b9c: 004c0c13 addi x24,x24,4 + +80000ba0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b3: + sha256sig1 x3, x3 # perform operation +80000ba0: 10319193 sha256sig1 x3,x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zknh_sha256sig1_cg_cmp_rd_rs1_b3, Zknh_sha256sig1_cg_cmp_rd_rs1_b3_str) +80000ba4: 0004a203 lw x4,0(x9) +80000ba8: 00320863 beq x4,x3,80000bb8 +80000bac: 4d4012ef jal x5,80002080 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 8000574a .word 0x8000574a +80000bb8: 00448493 addi x9,x9,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000bbc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000bc0: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x2a0c40b8 +80000bc4: 000c2203 lw x4,0(x24) +80000bc8: 004c0c13 addi x24,x24,4 + +80000bcc : +Zknh_sha256sig1_cg_cmp_rd_rs1_b4: + sha256sig1 x4, x4 # perform operation +80000bcc: 10321213 sha256sig1 x4,x4 + # Check if x4 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x4, Zknh_sha256sig1_cg_cmp_rd_rs1_b4, Zknh_sha256sig1_cg_cmp_rd_rs1_b4_str) +80000bd0: 0004a683 lw x13,0(x9) +80000bd4: 00468863 beq x13,x4,80000be4 +80000bd8: 4e80176f jal x14,800020c0 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80005786 .word 0x80005786 +80000be4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x1a054cb2 +80000be8: 000c2283 lw x5,0(x24) +80000bec: 004c0c13 addi x24,x24,4 + +80000bf0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b5: + sha256sig1 x5, x5 # perform operation +80000bf0: 10329293 sha256sig1 x5,x5 + # Check if x5 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x5, Zknh_sha256sig1_cg_cmp_rd_rs1_b5, Zknh_sha256sig1_cg_cmp_rd_rs1_b5_str) +80000bf4: 0004a683 lw x13,0(x9) +80000bf8: 00568863 beq x13,x5,80000c08 +80000bfc: 4c40176f jal x14,800020c0 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 800057c2 .word 0x800057c2 +80000c08: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xe3ece04e +80000c0c: 000c2303 lw x6,0(x24) +80000c10: 004c0c13 addi x24,x24,4 + +80000c14 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b6: + sha256sig1 x6, x6 # perform operation +80000c14: 10331313 sha256sig1 x6,x6 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zknh_sha256sig1_cg_cmp_rd_rs1_b6, Zknh_sha256sig1_cg_cmp_rd_rs1_b6_str) +80000c18: 0004a683 lw x13,0(x9) +80000c1c: 00668863 beq x13,x6,80000c2c +80000c20: 4a00176f jal x14,800020c0 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 800057fe .word 0x800057fe +80000c2c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x7ee2ed7e +80000c30: 000c2383 lw x7,0(x24) +80000c34: 004c0c13 addi x24,x24,4 + +80000c38 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b7: + sha256sig1 x7, x7 # perform operation +80000c38: 10339393 sha256sig1 x7,x7 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zknh_sha256sig1_cg_cmp_rd_rs1_b7, Zknh_sha256sig1_cg_cmp_rd_rs1_b7_str) +80000c3c: 0004a683 lw x13,0(x9) +80000c40: 00768863 beq x13,x7,80000c50 +80000c44: 47c0176f jal x14,800020c0 +80000c48: 80000c38 .word 0x80000c38 +80000c4c: 8000583a .word 0x8000583a +80000c50: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x4a30d2cb +80000c54: 000c2403 lw x8,0(x24) +80000c58: 004c0c13 addi x24,x24,4 + +80000c5c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b8: + sha256sig1 x8, x8 # perform operation +80000c5c: 10341413 sha256sig1 x8,x8 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zknh_sha256sig1_cg_cmp_rd_rs1_b8, Zknh_sha256sig1_cg_cmp_rd_rs1_b8_str) +80000c60: 0004a683 lw x13,0(x9) +80000c64: 00868863 beq x13,x8,80000c74 +80000c68: 4580176f jal x14,800020c0 +80000c6c: 80000c5c .word 0x80000c5c +80000c70: 80005876 .word 0x80005876 +80000c74: 00448493 addi x9,x9,4 + + mv x21, x9 # switch signature pointer register to avoid conflict with test +80000c78: 00048a93 addi x21,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x8a35153b +80000c7c: 000c2483 lw x9,0(x24) +80000c80: 004c0c13 addi x24,x24,4 + +80000c84 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b9: + sha256sig1 x9, x9 # perform operation +80000c84: 10349493 sha256sig1 x9,x9 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zknh_sha256sig1_cg_cmp_rd_rs1_b9, Zknh_sha256sig1_cg_cmp_rd_rs1_b9_str) +80000c88: 000aa683 lw x13,0(x21) +80000c8c: 00968863 beq x13,x9,80000c9c +80000c90: 4300176f jal x14,800020c0 +80000c94: 80000c84 .word 0x80000c84 +80000c98: 800058b2 .word 0x800058b2 +80000c9c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x3e4d5418 +80000ca0: 000c2503 lw x10,0(x24) +80000ca4: 004c0c13 addi x24,x24,4 + +80000ca8 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b10: + sha256sig1 x10, x10 # perform operation +80000ca8: 10351513 sha256sig1 x10,x10 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zknh_sha256sig1_cg_cmp_rd_rs1_b10, Zknh_sha256sig1_cg_cmp_rd_rs1_b10_str) +80000cac: 000aa683 lw x13,0(x21) +80000cb0: 00a68863 beq x13,x10,80000cc0 +80000cb4: 40c0176f jal x14,800020c0 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 800058ee .word 0x800058ee +80000cc0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x913377e7 +80000cc4: 000c2583 lw x11,0(x24) +80000cc8: 004c0c13 addi x24,x24,4 + +80000ccc : +Zknh_sha256sig1_cg_cmp_rd_rs1_b11: + sha256sig1 x11, x11 # perform operation +80000ccc: 10359593 sha256sig1 x11,x11 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zknh_sha256sig1_cg_cmp_rd_rs1_b11, Zknh_sha256sig1_cg_cmp_rd_rs1_b11_str) +80000cd0: 000aa683 lw x13,0(x21) +80000cd4: 00b68863 beq x13,x11,80000ce4 +80000cd8: 3e80176f jal x14,800020c0 +80000cdc: 80000ccc .word 0x80000ccc +80000ce0: 8000592b .word 0x8000592b +80000ce4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x0c69c97b +80000ce8: 000c2603 lw x12,0(x24) +80000cec: 004c0c13 addi x24,x24,4 + +80000cf0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b12: + sha256sig1 x12, x12 # perform operation +80000cf0: 10361613 sha256sig1 x12,x12 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknh_sha256sig1_cg_cmp_rd_rs1_b12, Zknh_sha256sig1_cg_cmp_rd_rs1_b12_str) +80000cf4: 000aa683 lw x13,0(x21) +80000cf8: 00c68863 beq x13,x12,80000d08 +80000cfc: 3c40176f jal x14,800020c0 +80000d00: 80000cf0 .word 0x80000cf0 +80000d04: 80005968 .word 0x80005968 +80000d08: 004a8a93 addi x21,x21,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d0c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d10: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x4562076e +80000d14: 000c2683 lw x13,0(x24) +80000d18: 004c0c13 addi x24,x24,4 + +80000d1c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b13: + sha256sig1 x13, x13 # perform operation +80000d1c: 10369693 sha256sig1 x13,x13 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknh_sha256sig1_cg_cmp_rd_rs1_b13, Zknh_sha256sig1_cg_cmp_rd_rs1_b13_str) +80000d20: 000aa383 lw x7,0(x21) +80000d24: 00d38863 beq x7,x13,80000d34 +80000d28: 3700146f jal x8,80002098 +80000d2c: 80000d1c .word 0x80000d1c +80000d30: 800059a5 .word 0x800059a5 +80000d34: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x2403127a +80000d38: 000c2703 lw x14,0(x24) +80000d3c: 004c0c13 addi x24,x24,4 + +80000d40 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b14: + sha256sig1 x14, x14 # perform operation +80000d40: 10371713 sha256sig1 x14,x14 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zknh_sha256sig1_cg_cmp_rd_rs1_b14, Zknh_sha256sig1_cg_cmp_rd_rs1_b14_str) +80000d44: 000aa383 lw x7,0(x21) +80000d48: 00e38863 beq x7,x14,80000d58 +80000d4c: 34c0146f jal x8,80002098 +80000d50: 80000d40 .word 0x80000d40 +80000d54: 800059e2 .word 0x800059e2 +80000d58: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xee72f744 +80000d5c: 000c2783 lw x15,0(x24) +80000d60: 004c0c13 addi x24,x24,4 + +80000d64 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b15: + sha256sig1 x15, x15 # perform operation +80000d64: 10379793 sha256sig1 x15,x15 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zknh_sha256sig1_cg_cmp_rd_rs1_b15, Zknh_sha256sig1_cg_cmp_rd_rs1_b15_str) +80000d68: 000aa383 lw x7,0(x21) +80000d6c: 00f38863 beq x7,x15,80000d7c +80000d70: 3280146f jal x8,80002098 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 80005a1f .word 0x80005a1f +80000d7c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xbb120d21 +80000d80: 000c2803 lw x16,0(x24) +80000d84: 004c0c13 addi x24,x24,4 + +80000d88 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b16: + sha256sig1 x16, x16 # perform operation +80000d88: 10381813 sha256sig1 x16,x16 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zknh_sha256sig1_cg_cmp_rd_rs1_b16, Zknh_sha256sig1_cg_cmp_rd_rs1_b16_str) +80000d8c: 000aa383 lw x7,0(x21) +80000d90: 01038863 beq x7,x16,80000da0 +80000d94: 3040146f jal x8,80002098 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80005a5c .word 0x80005a5c +80000da0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xe7e010d2 +80000da4: 000c2883 lw x17,0(x24) +80000da8: 004c0c13 addi x24,x24,4 + +80000dac : +Zknh_sha256sig1_cg_cmp_rd_rs1_b17: + sha256sig1 x17, x17 # perform operation +80000dac: 10389893 sha256sig1 x17,x17 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zknh_sha256sig1_cg_cmp_rd_rs1_b17, Zknh_sha256sig1_cg_cmp_rd_rs1_b17_str) +80000db0: 000aa383 lw x7,0(x21) +80000db4: 01138863 beq x7,x17,80000dc4 +80000db8: 2e00146f jal x8,80002098 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 80005a99 .word 0x80005a99 +80000dc4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xd474ee9a +80000dc8: 000c2903 lw x18,0(x24) +80000dcc: 004c0c13 addi x24,x24,4 + +80000dd0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b18: + sha256sig1 x18, x18 # perform operation +80000dd0: 10391913 sha256sig1 x18,x18 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zknh_sha256sig1_cg_cmp_rd_rs1_b18, Zknh_sha256sig1_cg_cmp_rd_rs1_b18_str) +80000dd4: 000aa383 lw x7,0(x21) +80000dd8: 01238863 beq x7,x18,80000de8 +80000ddc: 2bc0146f jal x8,80002098 +80000de0: 80000dd0 .word 0x80000dd0 +80000de4: 80005ad6 .word 0x80005ad6 +80000de8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xa9aafe83 +80000dec: 000c2983 lw x19,0(x24) +80000df0: 004c0c13 addi x24,x24,4 + +80000df4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b19: + sha256sig1 x19, x19 # perform operation +80000df4: 10399993 sha256sig1 x19,x19 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zknh_sha256sig1_cg_cmp_rd_rs1_b19, Zknh_sha256sig1_cg_cmp_rd_rs1_b19_str) +80000df8: 000aa383 lw x7,0(x21) +80000dfc: 01338863 beq x7,x19,80000e0c +80000e00: 2980146f jal x8,80002098 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80005b13 .word 0x80005b13 +80000e0c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x3d96bbdb +80000e10: 000c2a03 lw x20,0(x24) +80000e14: 004c0c13 addi x24,x24,4 + +80000e18 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b20: + sha256sig1 x20, x20 # perform operation +80000e18: 103a1a13 sha256sig1 x20,x20 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zknh_sha256sig1_cg_cmp_rd_rs1_b20, Zknh_sha256sig1_cg_cmp_rd_rs1_b20_str) +80000e1c: 000aa383 lw x7,0(x21) +80000e20: 01438863 beq x7,x20,80000e30 +80000e24: 2740146f jal x8,80002098 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80005b50 .word 0x80005b50 +80000e30: 004a8a93 addi x21,x21,4 + + mv x28, x21 # switch signature pointer register to avoid conflict with test +80000e34: 000a8e13 addi x28,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xbf75fba4 +80000e38: 000c2a83 lw x21,0(x24) +80000e3c: 004c0c13 addi x24,x24,4 + +80000e40 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b21: + sha256sig1 x21, x21 # perform operation +80000e40: 103a9a93 sha256sig1 x21,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zknh_sha256sig1_cg_cmp_rd_rs1_b21, Zknh_sha256sig1_cg_cmp_rd_rs1_b21_str) +80000e44: 000e2383 lw x7,0(x28) +80000e48: 01538863 beq x7,x21,80000e58 +80000e4c: 24c0146f jal x8,80002098 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 80005b8d .word 0x80005b8d +80000e58: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xfaee53ce +80000e5c: 000c2b03 lw x22,0(x24) +80000e60: 004c0c13 addi x24,x24,4 + +80000e64 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b22: + sha256sig1 x22, x22 # perform operation +80000e64: 103b1b13 sha256sig1 x22,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zknh_sha256sig1_cg_cmp_rd_rs1_b22, Zknh_sha256sig1_cg_cmp_rd_rs1_b22_str) +80000e68: 000e2383 lw x7,0(x28) +80000e6c: 01638863 beq x7,x22,80000e7c +80000e70: 2280146f jal x8,80002098 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 80005bca .word 0x80005bca +80000e7c: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x168dbe56 +80000e80: 000c2b83 lw x23,0(x24) +80000e84: 004c0c13 addi x24,x24,4 + +80000e88 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b23: + sha256sig1 x23, x23 # perform operation +80000e88: 103b9b93 sha256sig1 x23,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zknh_sha256sig1_cg_cmp_rd_rs1_b23, Zknh_sha256sig1_cg_cmp_rd_rs1_b23_str) +80000e8c: 000e2383 lw x7,0(x28) +80000e90: 01738863 beq x7,x23,80000ea0 +80000e94: 2040146f jal x8,80002098 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 80005c07 .word 0x80005c07 +80000ea0: 004e0e13 addi x28,x28,4 + + mv x11, x24 # switch data pointer register to avoid conflict with test +80000ea4: 000c0593 addi x11,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x3ee456e9 +80000ea8: 0005ac03 lw x24,0(x11) +80000eac: 00458593 addi x11,x11,4 + +80000eb0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b24: + sha256sig1 x24, x24 # perform operation +80000eb0: 103c1c13 sha256sig1 x24,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zknh_sha256sig1_cg_cmp_rd_rs1_b24, Zknh_sha256sig1_cg_cmp_rd_rs1_b24_str) +80000eb4: 000e2383 lw x7,0(x28) +80000eb8: 01838863 beq x7,x24,80000ec8 +80000ebc: 1dc0146f jal x8,80002098 +80000ec0: 80000eb0 .word 0x80000eb0 +80000ec4: 80005c45 .word 0x80005c45 +80000ec8: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0xb1620be5 +80000ecc: 0005ac83 lw x25,0(x11) +80000ed0: 00458593 addi x11,x11,4 + +80000ed4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b25: + sha256sig1 x25, x25 # perform operation +80000ed4: 103c9c93 sha256sig1 x25,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknh_sha256sig1_cg_cmp_rd_rs1_b25, Zknh_sha256sig1_cg_cmp_rd_rs1_b25_str) +80000ed8: 000e2383 lw x7,0(x28) +80000edc: 01938863 beq x7,x25,80000eec +80000ee0: 1b80146f jal x8,80002098 +80000ee4: 80000ed4 .word 0x80000ed4 +80000ee8: 80005c83 .word 0x80005c83 +80000eec: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x2936936b +80000ef0: 0005ad03 lw x26,0(x11) +80000ef4: 00458593 addi x11,x11,4 + +80000ef8 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b26: + sha256sig1 x26, x26 # perform operation +80000ef8: 103d1d13 sha256sig1 x26,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zknh_sha256sig1_cg_cmp_rd_rs1_b26, Zknh_sha256sig1_cg_cmp_rd_rs1_b26_str) +80000efc: 000e2383 lw x7,0(x28) +80000f00: 01a38863 beq x7,x26,80000f10 +80000f04: 1940146f jal x8,80002098 +80000f08: 80000ef8 .word 0x80000ef8 +80000f0c: 80005cc1 .word 0x80005cc1 +80000f10: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x11428f14 +80000f14: 0005ad83 lw x27,0(x11) +80000f18: 00458593 addi x11,x11,4 + +80000f1c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b27: + sha256sig1 x27, x27 # perform operation +80000f1c: 103d9d93 sha256sig1 x27,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zknh_sha256sig1_cg_cmp_rd_rs1_b27, Zknh_sha256sig1_cg_cmp_rd_rs1_b27_str) +80000f20: 000e2383 lw x7,0(x28) +80000f24: 01b38863 beq x7,x27,80000f34 +80000f28: 1700146f jal x8,80002098 +80000f2c: 80000f1c .word 0x80000f1c +80000f30: 80005cff .word 0x80005cff +80000f34: 004e0e13 addi x28,x28,4 + + mv x6, x28 # switch signature pointer register to avoid conflict with test +80000f38: 000e0313 addi x6,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x9ec30e63 +80000f3c: 0005ae03 lw x28,0(x11) +80000f40: 00458593 addi x11,x11,4 + +80000f44 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b28: + sha256sig1 x28, x28 # perform operation +80000f44: 103e1e13 sha256sig1 x28,x28 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zknh_sha256sig1_cg_cmp_rd_rs1_b28, Zknh_sha256sig1_cg_cmp_rd_rs1_b28_str) +80000f48: 00032383 lw x7,0(x6) +80000f4c: 01c38863 beq x7,x28,80000f5c +80000f50: 1480146f jal x8,80002098 +80000f54: 80000f44 .word 0x80000f44 +80000f58: 80005d3d .word 0x80005d3d +80000f5c: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x885bcf0f +80000f60: 0005ae83 lw x29,0(x11) +80000f64: 00458593 addi x11,x11,4 + +80000f68 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b29: + sha256sig1 x29, x29 # perform operation +80000f68: 103e9e93 sha256sig1 x29,x29 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zknh_sha256sig1_cg_cmp_rd_rs1_b29, Zknh_sha256sig1_cg_cmp_rd_rs1_b29_str) +80000f6c: 00032383 lw x7,0(x6) +80000f70: 01d38863 beq x7,x29,80000f80 +80000f74: 1240146f jal x8,80002098 +80000f78: 80000f68 .word 0x80000f68 +80000f7c: 80005d7b .word 0x80005d7b +80000f80: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x169cf639 +80000f84: 0005af03 lw x30,0(x11) +80000f88: 00458593 addi x11,x11,4 + +80000f8c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b30: + sha256sig1 x30, x30 # perform operation +80000f8c: 103f1f13 sha256sig1 x30,x30 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zknh_sha256sig1_cg_cmp_rd_rs1_b30, Zknh_sha256sig1_cg_cmp_rd_rs1_b30_str) +80000f90: 00032383 lw x7,0(x6) +80000f94: 01e38863 beq x7,x30,80000fa4 +80000f98: 1000146f jal x8,80002098 +80000f9c: 80000f8c .word 0x80000f8c +80000fa0: 80005db9 .word 0x80005db9 +80000fa4: 00430313 addi x6,x6,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x2f5d82fe +80000fa8: 0005af83 lw x31,0(x11) +80000fac: 00458593 addi x11,x11,4 + +80000fb0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b31: + sha256sig1 x31, x31 # perform operation +80000fb0: 103f9f93 sha256sig1 x31,x31 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zknh_sha256sig1_cg_cmp_rd_rs1_b31, Zknh_sha256sig1_cg_cmp_rd_rs1_b31_str) +80000fb4: 00032383 lw x7,0(x6) +80000fb8: 01f38863 beq x7,x31,80000fc8 +80000fbc: 0dc0146f jal x8,80002098 +80000fc0: 80000fb0 .word 0x80000fb0 +80000fc4: 80005df7 .word 0x80005df7 +80000fc8: 00430313 addi x6,x6,4 + + mv x2, x6 # restore signature pointer to default register for teardown +80000fcc: 00030113 addi x2,x6,0 + +80000fd0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fd0: 00000513 addi x10,x0,0 +80000fd4: 00000073 ecall +80000fd8: fff00513 addi x10,x0,-1 +80000fdc: 1d800413 addi x8,x0,472 + +80000fe0 : +80000fe0: 34002373 csrrs x6,mscratch,x0 + +80000fe4 : +80000fe4: 23832383 lw x7,568(x6) +80000fe8: 23c32483 lw x9,572(x6) + +80000fec : +80000fec: 22032383 lw x7,544(x6) + +80000ff0 : +80000ff0: 25032483 lw x9,592(x6) +80000ff4: 34049073 csrrw x0,mscratch,x9 + +80000ff8 : +80000ff8: 24832483 lw x9,584(x6) +80000ffc: 305493f3 csrrw x7,mtvec,x9 +80001000: ffc4f493 andi x9,x9,-4 +80001004: ffc3f393 andi x7,x7,-4 +80001008: 00749e63 bne x9,x7,80001024 + +8000100c : +8000100c: 00030493 addi x9,x6,0 + +80001010 : +80001010: 0004a783 lw x15,0(x9) +80001014: 00f3a023 sw x15,0(x7) +80001018: 00438393 addi x7,x7,4 +8000101c: 00448493 addi x9,x9,4 +80001020: fe83c8e3 blt x7,x8,80001010 +80001024: 0000100f fence.i + +80001028 : +80001028: 00000013 addi x0,x0,0 +8000102c: 00000013 addi x0,x0,0 +80001030: 00000013 addi x0,x0,0 +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 44450513 addi x10,x10,1092 # 800064c4 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 44350513 addi x10,x10,1091 # 80006503 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 46350513 addi x10,x10,1123 # 80006563 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: fce50513 addi x10,x10,-50 # 8000710e +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: bb838393 addi x7,x7,-1096 # 80007d78 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: b7040413 addi x8,x8,-1168 # 80007d70 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 800066b7 .word 0x800066b7 + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 80006525 .word 0x80006525 +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 22450513 addi x10,x10,548 # 80006484 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: 22450513 addi x10,x10,548 # 800064c4 +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: cd1ff06f jal x0,80000fd0 + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cc5ff06f jal x0,80000fd0 +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b4830313 addi x6,x6,-1208 # 80001028 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 48550513 addi x10,x10,1157 # 80007b45 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00005517 auipc x10,0x5 +80001704: 8a850513 addi x10,x10,-1880 # 80005fa8 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: e8c50513 addi x10,x10,-372 # 800065cc +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: d4450513 addi x10,x10,-700 # 800064c4 +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 42848493 addi x9,x9,1064 # 80005f88 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: c3c40413 addi x8,x8,-964 # 800167dc +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800066ce .word 0x800066ce +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800067d0 .word 0x800067d0 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800068cb .word 0x800068cb +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 800069be .word 0x800069be +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006b31 .word 0x80006b31 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: dc020213 addi x4,x4,-576 # 80005e40 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: da838393 addi x7,x7,-600 # 80005e40 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: d8068693 addi x13,x13,-640 # 80005e40 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: d5848493 addi x9,x9,-680 # 80005e40 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: cb44a483 lw x9,-844(x9) # 80005e40 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00006417 auipc x8,0x6 +80002244: 95040413 addi x8,x8,-1712 # 80007b90 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 56040413 addi x8,x8,1376 # 800167e0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: ca848493 addi x9,x9,-856 # 80005f68 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: c6848493 addi x9,x9,-920 # 80005f68 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: c4880813 addi x16,x16,-952 # 80005f78 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: c3480813 addi x16,x16,-972 # 80005f78 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 36738393 addi x7,x7,871 # 800066b7 +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: c1080813 addi x16,x16,-1008 # 80005f70 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 36238393 addi x7,x7,866 # 800066ce +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 44c38393 addi x7,x7,1100 # 800067d0 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 52f38393 addi x7,x7,1327 # 800068cb +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 60a38393 addi x7,x7,1546 # 800069be +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 76538393 addi x7,x7,1893 # 80006b31 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 6d138393 addi x7,x7,1745 # 80006ab5 +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 6f738393 addi x7,x7,1783 # 80006af3 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 2fa38393 addi x7,x7,762 # 8000670e +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 3e238393 addi x7,x7,994 # 8000680e +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 4c338393 addi x7,x7,1219 # 80006907 +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 59f38393 addi x7,x7,1439 # 800069fb +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 6f838393 addi x7,x7,1784 # 80006b6c +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 2c238393 addi x7,x7,706 # 8000674e +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 3a838393 addi x7,x7,936 # 8000684c +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 48738393 addi x7,x7,1159 # 80006943 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 56438393 addi x7,x7,1380 # 80006a38 +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 6bb38393 addi x7,x7,1723 # 80006ba7 +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 28b38393 addi x7,x7,651 # 8000678f +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 36f38393 addi x7,x7,879 # 8000688b +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 44c38393 addi x7,x7,1100 # 80006980 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 52a38393 addi x7,x7,1322 # 80006a76 +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 67f38393 addi x7,x7,1663 # 80006be3 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 6a438393 addi x7,x7,1700 # 80006c20 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 6db38393 addi x7,x7,1755 # 80006c6f +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 7be38393 addi x7,x7,1982 # 80006d6a +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00005397 auipc x7,0x5 +800025c8: 8a238393 addi x7,x7,-1886 # 80006e66 +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00004817 auipc x16,0x4 +800025e8: 98c80813 addi x16,x16,-1652 # 80005f70 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00004817 auipc x16,0x4 +800025f8: 97c80813 addi x16,x16,-1668 # 80005f70 +800025fc: 00882023 sw x8,0(x16) +80002600: 00004817 auipc x16,0x4 +80002604: 97480813 addi x16,x16,-1676 # 80005f74 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00004817 auipc x16,0x4 +80002614: 96080813 addi x16,x16,-1696 # 80005f70 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: e6450513 addi x10,x10,-412 # 800064c4 +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: e6350513 addi x10,x10,-413 # 80006503 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: eda50513 addi x10,x10,-294 # 800065ba +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00004517 auipc x10,0x4 +8000270c: 85852503 lw x10,-1960(x10) # 80005f60 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: eac50513 addi x10,x10,-340 # 800065cc +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 6f852503 lw x10,1784(x10) # 80005e40 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: e6e50513 addi x10,x10,-402 # 800065ce +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 7b852503 lw x10,1976(x10) # 80005f40 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 7e850513 addi x10,x10,2024 # 80005fa8 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: de250513 addi x10,x10,-542 # 800065e2 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 72052503 lw x10,1824(x10) # 80005f48 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 76850513 addi x10,x10,1896 # 80005fa8 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 79950513 addi x10,x10,1945 # 80007019 +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 59852503 lw x10,1432(x10) # 80005e40 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 6e860613 addi x12,x12,1768 # 80005fa8 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 65c52503 lw x10,1628(x10) # 80005f44 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00005517 auipc x10,0x5 +80002924: 80f50513 addi x10,x10,-2033 # 8000712f +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 64860613 addi x12,x12,1608 # 80005fa8 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 5bc52503 lw x10,1468(x10) # 80005f44 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 60860613 addi x12,x12,1544 # 80005fa8 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 57c52503 lw x10,1404(x10) # 80005f44 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 63250513 addi x10,x10,1586 # 80007012 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 58850513 addi x10,x10,1416 # 80005fa8 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 5ca50513 addi x10,x10,1482 # 8000702a +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 3b852503 lw x10,952(x10) # 80005e40 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 4b852503 lw x10,1208(x10) # 80005f50 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 4a452503 lw x10,1188(x10) # 80005f50 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 4e850513 addi x10,x10,1256 # 80005fa8 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 48052503 lw x10,1152(x10) # 80005f68 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 54150513 addi x10,x10,1345 # 80007041 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 31852503 lw x10,792(x10) # 80005e40 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 42052503 lw x10,1056(x10) # 80005f58 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 40c52503 lw x10,1036(x10) # 80005f58 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 44850513 addi x10,x10,1096 # 80005fa8 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 4b850513 addi x10,x10,1208 # 80007058 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 39052503 lw x10,912(x10) # 80005f58 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 3c850513 addi x10,x10,968 # 80005fa8 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 49650513 addi x10,x10,1174 # 800070b6 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 31052503 lw x10,784(x10) # 80005f58 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 34850513 addi x10,x10,840 # 80005fa8 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 2e442403 lw x8,740(x8) # 80005f70 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 4bb50513 addi x10,x10,1211 # 8000715b +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 4a750513 addi x10,x10,1191 # 80007187 +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 27080813 addi x16,x16,624 # 80005f78 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00004517 auipc x10,0x4 +80002d24: 8ac50513 addi x10,x10,-1876 # 800065cc +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 43750513 addi x10,x10,1079 # 80007197 +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: 1d052503 lw x10,464(x10) # 80005f58 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: 20850513 addi x10,x10,520 # 80005fa8 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 3e250513 addi x10,x10,994 # 800071c2 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: 14852503 lw x10,328(x10) # 80005f50 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: 18850513 addi x10,x10,392 # 80005fa8 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: 10832303 lw x6,264(x6) # 80005f50 +80002e50: 00003397 auipc x7,0x3 +80002e54: 1083a383 lw x7,264(x7) # 80005f58 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 39150513 addi x10,x10,913 # 800071f1 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 3b950513 addi x10,x10,953 # 80007259 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: 08832303 lw x6,136(x6) # 80005f50 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: 0883a383 lw x7,136(x7) # 80005f58 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: 0a850513 addi x10,x10,168 # 80005fa8 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 34050513 addi x10,x10,832 # 80007280 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 29d50513 addi x10,x10,669 # 8000721d +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 29950513 addi x10,x10,665 # 80007259 +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: f7032303 lw x6,-144(x6) # 80005f58 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: f603a383 lw x7,-160(x7) # 80005f50 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: f8850513 addi x10,x10,-120 # 80005fa8 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 30850513 addi x10,x10,776 # 80007368 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 3af50513 addi x10,x10,943 # 8000744f +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: eac52503 lw x10,-340(x10) # 80005f74 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 38b50513 addi x10,x10,907 # 8000748b +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 32950513 addi x10,x10,809 # 80007469 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 2f150513 addi x10,x10,753 # 80007471 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 2b950513 addi x10,x10,697 # 80007479 +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 28250513 addi x10,x10,642 # 80007482 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 25450513 addi x10,x10,596 # 80007494 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: d0852503 lw x10,-760(x10) # 80005f70 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 32b50513 addi x10,x10,811 # 800075eb +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: 1ae50513 addi x10,x10,430 # 800074ae +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: 19f50513 addi x10,x10,415 # 800074df +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: 17f50513 addi x10,x10,383 # 800074ff +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: 15d50513 addi x10,x10,349 # 8000751d +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: 13c50513 addi x10,x10,316 # 8000753c +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: 12450513 addi x10,x10,292 # 80007564 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: 11050513 addi x10,x10,272 # 80007590 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: 0fc50513 addi x10,x10,252 # 800075bc +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: 0fa50513 addi x10,x10,250 # 800075fa +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: a3052503 lw x10,-1488(x10) # 80005f58 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: a6850513 addi x10,x10,-1432 # 80005fa8 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: 09150513 addi x10,x10,145 # 80007611 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00003517 auipc x10,0x3 +800035ac: 9a852503 lw x10,-1624(x10) # 80005f50 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00003517 auipc x10,0x3 +800035c4: 9e850513 addi x10,x10,-1560 # 80005fa8 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00003517 auipc x10,0x3 +800035ec: 98852503 lw x10,-1656(x10) # 80005f70 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: 02850513 addi x10,x10,40 # 80007628 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00003517 auipc x10,0x3 +8000362c: 93052503 lw x10,-1744(x10) # 80005f58 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: fff50513 addi x10,x10,-1 # 8000763f +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00003517 auipc x10,0x3 +8000366c: 8e852503 lw x10,-1816(x10) # 80005f50 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00003517 auipc x10,0x3 +80003688: 8ec52503 lw x10,-1812(x10) # 80005f70 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: 01550513 addi x10,x10,21 # 800076b5 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: 0ab50513 addi x10,x10,171 # 8000778b +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: 15e50513 addi x10,x10,350 # 8000787e +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: 21950513 addi x10,x10,537 # 80007979 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 2c050513 addi x10,x10,704 # 80007a60 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: e8d50513 addi x10,x10,-371 # 8000766d +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 78062603 lw x12,1920(x12) # 80005f88 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: e3650513 addi x10,x10,-458 # 80006656 +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 72850513 addi x10,x10,1832 # 80005fa8 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 71058593 addi x11,x11,1808 # 80005fd0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 74458593 addi x11,x11,1860 # 80006030 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: b4e50513 addi x10,x10,-1202 # 8000646e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 7ae50513 addi x10,x10,1966 # 8000710e +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 5f060613 addi x12,x12,1520 # 80005f80 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: cd750513 addi x10,x10,-809 # 80006677 +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 5c052503 lw x10,1472(x10) # 80005f88 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 5c850513 addi x10,x10,1480 # 80005fa8 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: c6750513 addi x10,x10,-921 # 80006687 +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 54852503 lw x10,1352(x10) # 80005f90 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 54850513 addi x10,x10,1352 # 80005fa8 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: bf750513 addi x10,x10,-1033 # 80006697 +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 4d052503 lw x10,1232(x10) # 80005f98 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 4c850513 addi x10,x10,1224 # 80005fa8 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: b8750513 addi x10,x10,-1145 # 800066a7 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 45852503 lw x10,1112(x10) # 80005fa0 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 44850513 addi x10,x10,1096 # 80005fa8 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 3f860613 addi x12,x12,1016 # 80005f80 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 40860613 addi x12,x12,1032 # 80005fa8 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f3430313 addi x6,x6,-204 # 80000fd0 +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f1c30313 addi x6,x6,-228 # 80000fd0 +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f0430313 addi x6,x6,-252 # 80000fd0 +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: da078793 addi x15,x15,-608 # 80000fe0 +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 6f010113 addi x2,x2,1776 # 80007b90 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80007137 .word 0x80007137 +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 25828293 addi x5,x5,600 # 80016800 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 23828293 addi x5,x5,568 # 80016800 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha256sum0-00.elf.objdump b/riscv-tests/rv32-Zknh-sha256sum0-00.elf.objdump new file mode 100644 index 0000000..dd8ca7f --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha256sum0-00.elf.objdump @@ -0,0 +1,6268 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sum0-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sum0-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000127e0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016800 80016800 00017800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000087c 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 00000000 00000000 00018ef7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f77 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018f9a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fb0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 00000000 00000000 00018fd8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019066 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016800 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cczuT4rn.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b1 +80004597 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b2 +800045ce l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b3 +80004605 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b4 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +8000463c l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b5 +80004673 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b6 +800046aa l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b6_str +80000154 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b7 +800046e1 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b7_str +80000178 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b8 +80004718 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b8_str +8000019c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b9 +8000474f l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b9_str +800001c0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b10 +80004787 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b10_str +800001e4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b11 +800047c0 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b11_str +80000208 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b12 +800047f9 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b12_str +80000234 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b13 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004832 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b13_str +80000258 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b14 +8000486b l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b14_str +8000027c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b15 +800048a4 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b15_str +800002a0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b16 +800048dd l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b16_str +800002c4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b17 +80004916 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b17_str +800002e8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b18 +8000494f l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b18_str +8000030c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b19 +80004988 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b19_str +80000330 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b20 +800049c1 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b20_str +80000354 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b21 +800049fa l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b21_str +80000378 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b22 +80004a33 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b22_str +8000039c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b23 +80004a6c l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b23_str +800003c4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b24 +80004aa5 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b24_str +800003e8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b25 +80004ade l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b25_str +8000040c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b26 +80004b17 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b26_str +80000434 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b27 +80004b50 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b27_str +80000458 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b28 +80004b89 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b28_str +8000047c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b29 +80004bc2 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b29_str +800004a0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b30 +80004bfb l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b30_str +800004c4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_b31 +80004c34 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_b31_str +800004e8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b0 +80004c6d l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b0_str +8000050c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b1 +80004ca4 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b1_str +80000534 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b2 +80004cdb l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b2_str +80000558 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b3 +80004d12 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b3_str +8000057c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b4 +80004d49 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b4_str +800005a0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b5 +80004d80 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b5_str +800005c4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b6 +80004db7 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b6_str +800005f0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b7 +80004dee l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b7_str +80000614 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b8 +80004e25 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b8_str +80000638 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b9 +80004e5c l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b9_str +8000065c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b10 +80004e93 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b10_str +80000684 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b11 +80004ecb l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b11_str +800006a8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b12 +80004f03 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b12_str +800006d4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b13 +80004f3b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b13_str +800006f8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b14 +80004f73 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b14_str +80000720 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b15 +80004fab l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b15_str +80000744 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b16 +80004fe3 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b16_str +80000768 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b17 +8000501b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b17_str +8000078c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b18 +80005053 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b18_str +800007b0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b19 +8000508b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b19_str +800007d4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b20 +800050c3 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b20_str +800007f8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b21 +800050fb l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b21_str +8000081c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b22 +80005133 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b22_str +80000840 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b23 +8000516b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b23_str +80000868 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b24 +800051a3 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b24_str +8000088c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b25 +800051db l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b25_str +800008b0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b26 +80005213 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b26_str +800008d4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b27 +8000524b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b27_str +800008f8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b28 +80005283 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b28_str +8000091c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b29 +800052bb l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b29_str +80000940 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b30 +800052f3 l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b30_str +80000964 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rd_b31 +8000532b l .data 00000000 Zknh_sha256sum0_cg_cp_rd_b31_str +80000988 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x0 +80005363 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x0_str +800009ac l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x1 +800053a2 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x1_str +800009d0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x2 +800053e1 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x2_str +800009f4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x80000000 +80005420 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x80000000_str +80000a18 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x80000001 +80005466 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x80000001_str +80000a3c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffff +800054ac l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffff_str +80000a60 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffe +800054f2 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffe_str +80000a84 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff +80005538 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff_str +80000aa8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe +8000557e l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe_str +80000acc l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc8872 +800055c4 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc8872_str +80000af0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaa +8000560a l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b14 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x55555555 +80005650 l .data 00000000 Zknh_sha256sum0_cg_cp_rs1_edges_0x55555555_str +80000b38 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b0 +80005696 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b0_str +80000b5c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b1 +800056d2 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b1_str +80000b84 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b2 +8000570e l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b2_str +80000ba8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b3 +8000574a l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b3_str +80000bcc l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b4 +80005786 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b4_str +80000bf0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b5 +800057c2 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b5_str +80000c14 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b6 +800057fe l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b6_str +80000c40 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b7 +8000583a l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b7_str +80000c64 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b8 +80005876 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b8_str +80000c8c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b9 +800058b2 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b9_str +80000cb0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b10 +800058ee l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b10_str +80000cd4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b11 +8000592b l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b11_str +80000cfc l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b12 +80005968 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b12_str +80000d20 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b13 +800059a5 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b13_str +80000d44 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b14 +800059e2 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b14_str +80000d68 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b15 +80005a1f l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b15_str +80000d8c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b16 +80005a5c l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b16_str +80000db0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b17 +80005a99 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b17_str +80000dd4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b18 +80005ad6 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b18_str +80000df8 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b19 +80005b13 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b19_str +80000e1c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b20 +80005b50 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b20_str +80000e40 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b21 +80005b8d l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b21_str +80000e64 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b22 +80005bca l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b22_str +80000e88 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b23 +80005c07 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b23_str +80000eac l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b24 +80005c45 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b24_str +80000ed0 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b25 +80005c83 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b25_str +80000ef4 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b26 +80005cc1 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b26_str +80000f18 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b27 +80005cff l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b27_str +80000f3c l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b28 +80005d3d l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b28_str +80000f64 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b29 +80005d7b l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b29_str +80000f88 l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b30 +80005db9 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b30_str +80000fac l .text.rvtest 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b31 +80005df7 l .data 00000000 Zknh_sha256sum0_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fdc l .text.rvtest 00000000 exit_Mcleanup +80000fe0 l .text.rvtest 00000000 resto_Medeleg +80000fe8 l .text.rvtest 00000000 resto_Msatp +80000fec l .text.rvtest 00000000 resto_Mscratch +80000ff4 l .text.rvtest 00000000 resto_Mxtvec +80001008 l .text.rvtest 00000000 resto_Mtramp +8000100c l .text.rvtest 00000000 resto_Mloop +80001024 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +800064c4 l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006503 l .data 00000000 begin_debugstr +80006563 l .data 00000000 trap_sig_overflowstr +8000710e l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007d78 l .data 00000000 trap_sigptr +80007d70 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800066b7 l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +80006525 l .data 00000000 abortstr +80006484 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +80007b45 l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005fa8 l .data 00000000 ascii_buffer +800065cc l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005f88 l .data 00000000 saved_xepc +800167dc l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800066ce l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800067d0 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800068cb l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +800069be l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006b31 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005e40 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005e40 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005f68 l .data 00000000 failure_diag_type +80005f78 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005f70 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +80006ab5 l .data 00000000 sv_Mtval2_str +80006af3 l .data 00000000 sv_Mtinst_str +8000670e l .data 00000000 sv_Svect_str +8000680e l .data 00000000 sv_Scause_str +80006907 l .data 00000000 sv_Sepc_str +800069fb l .data 00000000 sv_Stval_str +80006b6c l .data 00000000 sv_Sip_str +8000674e l .data 00000000 sv_Hvect_str +8000684c l .data 00000000 sv_Hcause_str +80006943 l .data 00000000 sv_Hepc_str +80006a38 l .data 00000000 sv_Htval_str +80006ba7 l .data 00000000 sv_Hip_str +8000678f l .data 00000000 sv_Vvect_str +8000688b l .data 00000000 sv_Vcause_str +80006980 l .data 00000000 sv_Vepc_str +80006a76 l .data 00000000 sv_Vtval_str +80006be3 l .data 00000000 sv_Vip_str +80006c20 l .data 00000000 Mclr_Mext_int_str +80006c6f l .data 00000000 Mclr_Sext_int_str +80006d6a l .data 00000000 Sclr_Sext_int_str +80006e66 l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005f74 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +800065ba l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005f60 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800065ce l .data 00000000 inststr +80005f40 l .data 00000000 failing_instruction +800065e2 l .data 00000000 addrstr +80005f48 l .data 00000000 failing_addr +80007019 l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005f44 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +8000712f l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80007012 l .data 00000000 vxsatstr +8000702a l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005f50 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80007041 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005f58 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80007058 l .data 00000000 failure_diag_bad_instr_str +800070b6 l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +8000715b l .data 00000000 trap_diag_header_str +80007187 l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80007197 l .data 00000000 trap_diag_expected_offset_str +800071c2 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +800071f1 l .data 00000000 trap_diag_extra_traps_str +80007259 l .data 00000000 trap_diag_diff_bytes_str +80007280 l .data 00000000 trap_diag_extra_next_step_str +8000721d l .data 00000000 trap_diag_missing_traps_str +80007368 l .data 00000000 trap_diag_missing_next_step_str +8000744f l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +8000748b l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +80007469 l .data 00000000 trap_diag_mode_m_str +80007471 l .data 00000000 trap_diag_mode_s_str +80007479 l .data 00000000 trap_diag_mode_hs_str +80007482 l .data 00000000 trap_diag_mode_vs_str +80007494 l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800075eb l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +800074ae l .data 00000000 trap_diag_field_vect_str +800074df l .data 00000000 trap_diag_field_cause_str +800074ff l .data 00000000 trap_diag_field_epc_str +8000751d l .data 00000000 trap_diag_field_tval_str +8000753c l .data 00000000 trap_diag_field_ip_str +80007564 l .data 00000000 trap_diag_field_tval2_str +80007590 l .data 00000000 trap_diag_field_tinst_str +800075bc l .data 00000000 trap_diag_field_intid_str +800075fa l .data 00000000 trap_diag_expected_str +80007611 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +80007628 l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +8000763f l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +800076b5 l .data 00000000 trap_diag_hint_vect_str +8000778b l .data 00000000 trap_diag_hint_cause_str +8000787e l .data 00000000 trap_diag_hint_epc_str +80007979 l .data 00000000 trap_diag_hint_tval_str +80007a60 l .data 00000000 trap_diag_hint_ip_str +8000766d l .data 00000000 trap_diag_generic_str +80006656 l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005fd0 l .data 00000000 trap_excpt_name_tbl +80006030 l .data 00000000 trap_int_name_tbl +8000646e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005f80 l .data 00000000 csr_context_ret_addr +80006677 l .data 00000000 mepcstr +80006687 l .data 00000000 mcausestr +80005f90 l .data 00000000 saved_xcause +80006697 l .data 00000000 mtvalstr +80005f98 l .data 00000000 saved_xtval +800066a7 l .data 00000000 mstatusstr +80005fa0 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007b90 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80007137 l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005fd0 l .data 00000000 end_failure_scratch +80006070 l .data 00000000 trap_excpt_name_0 +80006090 l .data 00000000 trap_excpt_name_1 +800060aa l .data 00000000 trap_excpt_name_2 +800060bf l .data 00000000 trap_excpt_name_3 +800060cb l .data 00000000 trap_excpt_name_4 +800060e4 l .data 00000000 trap_excpt_name_5 +800060f7 l .data 00000000 trap_excpt_name_6 +80006115 l .data 00000000 trap_excpt_name_7 +8000612d l .data 00000000 trap_excpt_name_8 +8000614b l .data 00000000 trap_excpt_name_9 +80006169 l .data 00000000 trap_excpt_name_10 +80006188 l .data 00000000 trap_excpt_name_11 +800061a6 l .data 00000000 trap_excpt_name_12 +800061be l .data 00000000 trap_excpt_name_13 +800061cf l .data 00000000 trap_excpt_name_14 +800061de l .data 00000000 trap_excpt_name_15 +800061f4 l .data 00000000 trap_excpt_name_16 +80006201 l .data 00000000 trap_excpt_name_17 +80006210 l .data 00000000 trap_excpt_name_18 +80006220 l .data 00000000 trap_excpt_name_19 +80006230 l .data 00000000 trap_excpt_name_20 +8000624e l .data 00000000 trap_excpt_name_21 +80006265 l .data 00000000 trap_excpt_name_22 +8000627a l .data 00000000 trap_excpt_name_23 +80006296 l .data 00000000 trap_int_name_0 +800062ae l .data 00000000 trap_int_name_1 +800062cd l .data 00000000 trap_int_name_2 +800062f4 l .data 00000000 trap_int_name_3 +80006310 l .data 00000000 trap_int_name_4 +80006328 l .data 00000000 trap_int_name_5 +80006344 l .data 00000000 trap_int_name_6 +80006368 l .data 00000000 trap_int_name_7 +80006381 l .data 00000000 trap_int_name_8 +80006399 l .data 00000000 trap_int_name_9 +800063b8 l .data 00000000 trap_int_name_10 +800063df l .data 00000000 trap_int_name_11 +800063fb l .data 00000000 trap_int_name_12 +80006420 l .data 00000000 trap_int_name_13 +8000643c l .data 00000000 trap_int_name_14 +80006455 l .data 00000000 trap_int_name_15 +80006623 l .data 00000000 xepcstr +80006cc1 l .data 00000000 Mclr_Vext_int_str +80006d1b l .data 00000000 Sclr_Mext_int_str +80006dbc l .data 00000000 Sclr_Vext_int_str +80006e16 l .data 00000000 Hclr_Mext_int_str +80006eb9 l .data 00000000 Hclr_Vext_int_str +80006f14 l .data 00000000 Vclr_Mext_int_str +80006f64 l .data 00000000 Vclr_Sext_int_str +80006fb7 l .data 00000000 Vclr_Vext_int_str +80007656 l .data 00000000 trap_diag_curr_xepc_str +800167e0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800167e0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001024 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007b90 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fcc g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007b90 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +80007b89 g .data 00000000 rvtest_data_end +80000fcc g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016900 g .tohost 00000000 fromhost +80016800 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xb25e0b6f +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zknh_sha256sum0_cg_cp_rs1_b0: + sha256sum0 x30, x0 # perform operation +80000048: 10001f13 sha256sum0 x30,x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha256sum0_cg_cp_rs1_b0, Zknh_sha256sum0_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01e20863 beq x4,x30,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x04bb32b0 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zknh_sha256sum0_cg_cp_rs1_b1: + sha256sum0 x28, x1 # perform operation +8000006c: 10009e13 sha256sum0 x28,x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha256sum0_cg_cp_rs1_b1, Zknh_sha256sum0_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01c20863 beq x4,x28,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004597 .word 0x80004597 +80000084: 00410113 addi x2,x2,4 + + mv x27, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010d93 addi x27,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xf0ae5659 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zknh_sha256sum0_cg_cp_rs1_b2: + sha256sum0 x11, x2 # perform operation +80000094: 10011593 sha256sum0 x11,x2 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zknh_sha256sum0_cg_cp_rs1_b2, Zknh_sha256sum0_cg_cp_rs1_b2_str) +80000098: 000da203 lw x4,0(x27) +8000009c: 00b20863 beq x4,x11,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045ce .word 0x800045ce +800000ac: 004d8d93 addi x27,x27,4 + + mv x24, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018c13 addi x24,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x13b1ecc0 +800000b4: 000c2183 lw x3,0(x24) +800000b8: 004c0c13 addi x24,x24,4 + +800000bc : +Zknh_sha256sum0_cg_cp_rs1_b3: + sha256sum0 x18, x3 # perform operation +800000bc: 10019913 sha256sum0 x18,x3 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zknh_sha256sum0_cg_cp_rs1_b3, Zknh_sha256sum0_cg_cp_rs1_b3_str) +800000c0: 000da203 lw x4,0(x27) +800000c4: 01220863 beq x4,x18,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 80004605 .word 0x80004605 +800000d4: 004d8d93 addi x27,x27,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000d8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x1e432170 +800000e0: 000c2203 lw x4,0(x24) +800000e4: 004c0c13 addi x24,x24,4 + +800000e8 : +Zknh_sha256sum0_cg_cp_rs1_b4: + sha256sum0 x5, x4 # perform operation +800000e8: 10021293 sha256sum0 x5,x4 + # Check if x5 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x5, Zknh_sha256sum0_cg_cp_rs1_b4, Zknh_sha256sum0_cg_cp_rs1_b4_str) +800000ec: 000da683 lw x13,0(x27) +800000f0: 00568863 beq x13,x5,80000100 +800000f4: 7cd0176f jal x14,800020c0 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 8000463c .word 0x8000463c +80000100: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x9f613815 +80000104: 000c2283 lw x5,0(x24) +80000108: 004c0c13 addi x24,x24,4 + +8000010c : +Zknh_sha256sum0_cg_cp_rs1_b5: + sha256sum0 x3, x5 # perform operation +8000010c: 10029193 sha256sum0 x3,x5 + # Check if x3 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x3, Zknh_sha256sum0_cg_cp_rs1_b5, Zknh_sha256sum0_cg_cp_rs1_b5_str) +80000110: 000da683 lw x13,0(x27) +80000114: 00368863 beq x13,x3,80000124 +80000118: 7a90176f jal x14,800020c0 +8000011c: 8000010c .word 0x8000010c +80000120: 80004673 .word 0x80004673 +80000124: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x7ac6c6fe +80000128: 000c2303 lw x6,0(x24) +8000012c: 004c0c13 addi x24,x24,4 + +80000130 : +Zknh_sha256sum0_cg_cp_rs1_b6: + sha256sum0 x25, x6 # perform operation +80000130: 10031c93 sha256sum0 x25,x6 + # Check if x25 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x25, Zknh_sha256sum0_cg_cp_rs1_b6, Zknh_sha256sum0_cg_cp_rs1_b6_str) +80000134: 000da683 lw x13,0(x27) +80000138: 01968863 beq x13,x25,80000148 +8000013c: 7850176f jal x14,800020c0 +80000140: 80000130 .word 0x80000130 +80000144: 800046aa .word 0x800046aa +80000148: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x3e50eca3 +8000014c: 000c2383 lw x7,0(x24) +80000150: 004c0c13 addi x24,x24,4 + +80000154 : +Zknh_sha256sum0_cg_cp_rs1_b7: + sha256sum0 x26, x7 # perform operation +80000154: 10039d13 sha256sum0 x26,x7 + # Check if x26 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x26, Zknh_sha256sum0_cg_cp_rs1_b7, Zknh_sha256sum0_cg_cp_rs1_b7_str) +80000158: 000da683 lw x13,0(x27) +8000015c: 01a68863 beq x13,x26,8000016c +80000160: 7610176f jal x14,800020c0 +80000164: 80000154 .word 0x80000154 +80000168: 800046e1 .word 0x800046e1 +8000016c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x31ee1b3d +80000170: 000c2403 lw x8,0(x24) +80000174: 004c0c13 addi x24,x24,4 + +80000178 : +Zknh_sha256sum0_cg_cp_rs1_b8: + sha256sum0 x29, x8 # perform operation +80000178: 10041e93 sha256sum0 x29,x8 + # Check if x29 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x29, Zknh_sha256sum0_cg_cp_rs1_b8, Zknh_sha256sum0_cg_cp_rs1_b8_str) +8000017c: 000da683 lw x13,0(x27) +80000180: 01d68863 beq x13,x29,80000190 +80000184: 73d0176f jal x14,800020c0 +80000188: 80000178 .word 0x80000178 +8000018c: 80004718 .word 0x80004718 +80000190: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x7d104de9 +80000194: 000c2483 lw x9,0(x24) +80000198: 004c0c13 addi x24,x24,4 + +8000019c : +Zknh_sha256sum0_cg_cp_rs1_b9: + sha256sum0 x1, x9 # perform operation +8000019c: 10049093 sha256sum0 x1,x9 + # Check if x1 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x1, Zknh_sha256sum0_cg_cp_rs1_b9, Zknh_sha256sum0_cg_cp_rs1_b9_str) +800001a0: 000da683 lw x13,0(x27) +800001a4: 00168863 beq x13,x1,800001b4 +800001a8: 7190176f jal x14,800020c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000474f .word 0x8000474f +800001b4: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x9bc2e287 +800001b8: 000c2503 lw x10,0(x24) +800001bc: 004c0c13 addi x24,x24,4 + +800001c0 : +Zknh_sha256sum0_cg_cp_rs1_b10: + sha256sum0 x23, x10 # perform operation +800001c0: 10051b93 sha256sum0 x23,x10 + # Check if x23 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x23, Zknh_sha256sum0_cg_cp_rs1_b10, Zknh_sha256sum0_cg_cp_rs1_b10_str) +800001c4: 000da683 lw x13,0(x27) +800001c8: 01768863 beq x13,x23,800001d8 +800001cc: 6f50176f jal x14,800020c0 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80004787 .word 0x80004787 +800001d8: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x97388ee6 +800001dc: 000c2583 lw x11,0(x24) +800001e0: 004c0c13 addi x24,x24,4 + +800001e4 : +Zknh_sha256sum0_cg_cp_rs1_b11: + sha256sum0 x21, x11 # perform operation +800001e4: 10059a93 sha256sum0 x21,x11 + # Check if x21 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x21, Zknh_sha256sum0_cg_cp_rs1_b11, Zknh_sha256sum0_cg_cp_rs1_b11_str) +800001e8: 000da683 lw x13,0(x27) +800001ec: 01568863 beq x13,x21,800001fc +800001f0: 6d10176f jal x14,800020c0 +800001f4: 800001e4 .word 0x800001e4 +800001f8: 800047c0 .word 0x800047c0 +800001fc: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xe0ab0f0b +80000200: 000c2603 lw x12,0(x24) +80000204: 004c0c13 addi x24,x24,4 + +80000208 : +Zknh_sha256sum0_cg_cp_rs1_b12: + sha256sum0 x20, x12 # perform operation +80000208: 10061a13 sha256sum0 x20,x12 + # Check if x20 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x20, Zknh_sha256sum0_cg_cp_rs1_b12, Zknh_sha256sum0_cg_cp_rs1_b12_str) +8000020c: 000da683 lw x13,0(x27) +80000210: 01468863 beq x13,x20,80000220 +80000214: 6ad0176f jal x14,800020c0 +80000218: 80000208 .word 0x80000208 +8000021c: 800047f9 .word 0x800047f9 +80000220: 004d8d93 addi x27,x27,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000224: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000228: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xa1eebdab +8000022c: 000c2683 lw x13,0(x24) +80000230: 004c0c13 addi x24,x24,4 + +80000234 : +Zknh_sha256sum0_cg_cp_rs1_b13: + sha256sum0 x10, x13 # perform operation +80000234: 10069513 sha256sum0 x10,x13 + # Check if x10 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x10, Zknh_sha256sum0_cg_cp_rs1_b13, Zknh_sha256sum0_cg_cp_rs1_b13_str) +80000238: 000da383 lw x7,0(x27) +8000023c: 00a38863 beq x7,x10,8000024c +80000240: 6590146f jal x8,80002098 +80000244: 80000234 .word 0x80000234 +80000248: 80004832 .word 0x80004832 +8000024c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x406e2a8d +80000250: 000c2703 lw x14,0(x24) +80000254: 004c0c13 addi x24,x24,4 + +80000258 : +Zknh_sha256sum0_cg_cp_rs1_b14: + sha256sum0 x19, x14 # perform operation +80000258: 10071993 sha256sum0 x19,x14 + # Check if x19 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x19, Zknh_sha256sum0_cg_cp_rs1_b14, Zknh_sha256sum0_cg_cp_rs1_b14_str) +8000025c: 000da383 lw x7,0(x27) +80000260: 01338863 beq x7,x19,80000270 +80000264: 6350146f jal x8,80002098 +80000268: 80000258 .word 0x80000258 +8000026c: 8000486b .word 0x8000486b +80000270: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x2ec7758e +80000274: 000c2783 lw x15,0(x24) +80000278: 004c0c13 addi x24,x24,4 + +8000027c : +Zknh_sha256sum0_cg_cp_rs1_b15: + sha256sum0 x26, x15 # perform operation +8000027c: 10079d13 sha256sum0 x26,x15 + # Check if x26 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x26, Zknh_sha256sum0_cg_cp_rs1_b15, Zknh_sha256sum0_cg_cp_rs1_b15_str) +80000280: 000da383 lw x7,0(x27) +80000284: 01a38863 beq x7,x26,80000294 +80000288: 6110146f jal x8,80002098 +8000028c: 8000027c .word 0x8000027c +80000290: 800048a4 .word 0x800048a4 +80000294: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x52d5f47f +80000298: 000c2803 lw x16,0(x24) +8000029c: 004c0c13 addi x24,x24,4 + +800002a0 : +Zknh_sha256sum0_cg_cp_rs1_b16: + sha256sum0 x26, x16 # perform operation +800002a0: 10081d13 sha256sum0 x26,x16 + # Check if x26 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x26, Zknh_sha256sum0_cg_cp_rs1_b16, Zknh_sha256sum0_cg_cp_rs1_b16_str) +800002a4: 000da383 lw x7,0(x27) +800002a8: 01a38863 beq x7,x26,800002b8 +800002ac: 5ed0146f jal x8,80002098 +800002b0: 800002a0 .word 0x800002a0 +800002b4: 800048dd .word 0x800048dd +800002b8: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x493f6c32 +800002bc: 000c2883 lw x17,0(x24) +800002c0: 004c0c13 addi x24,x24,4 + +800002c4 : +Zknh_sha256sum0_cg_cp_rs1_b17: + sha256sum0 x16, x17 # perform operation +800002c4: 10089813 sha256sum0 x16,x17 + # Check if x16 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x16, Zknh_sha256sum0_cg_cp_rs1_b17, Zknh_sha256sum0_cg_cp_rs1_b17_str) +800002c8: 000da383 lw x7,0(x27) +800002cc: 01038863 beq x7,x16,800002dc +800002d0: 5c90146f jal x8,80002098 +800002d4: 800002c4 .word 0x800002c4 +800002d8: 80004916 .word 0x80004916 +800002dc: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xdc4f3adc +800002e0: 000c2903 lw x18,0(x24) +800002e4: 004c0c13 addi x24,x24,4 + +800002e8 : +Zknh_sha256sum0_cg_cp_rs1_b18: + sha256sum0 x28, x18 # perform operation +800002e8: 10091e13 sha256sum0 x28,x18 + # Check if x28 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x28, Zknh_sha256sum0_cg_cp_rs1_b18, Zknh_sha256sum0_cg_cp_rs1_b18_str) +800002ec: 000da383 lw x7,0(x27) +800002f0: 01c38863 beq x7,x28,80000300 +800002f4: 5a50146f jal x8,80002098 +800002f8: 800002e8 .word 0x800002e8 +800002fc: 8000494f .word 0x8000494f +80000300: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xf6b835f0 +80000304: 000c2983 lw x19,0(x24) +80000308: 004c0c13 addi x24,x24,4 + +8000030c : +Zknh_sha256sum0_cg_cp_rs1_b19: + sha256sum0 x6, x19 # perform operation +8000030c: 10099313 sha256sum0 x6,x19 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zknh_sha256sum0_cg_cp_rs1_b19, Zknh_sha256sum0_cg_cp_rs1_b19_str) +80000310: 000da383 lw x7,0(x27) +80000314: 00638863 beq x7,x6,80000324 +80000318: 5810146f jal x8,80002098 +8000031c: 8000030c .word 0x8000030c +80000320: 80004988 .word 0x80004988 +80000324: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xd49b38e7 +80000328: 000c2a03 lw x20,0(x24) +8000032c: 004c0c13 addi x24,x24,4 + +80000330 : +Zknh_sha256sum0_cg_cp_rs1_b20: + sha256sum0 x23, x20 # perform operation +80000330: 100a1b93 sha256sum0 x23,x20 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zknh_sha256sum0_cg_cp_rs1_b20, Zknh_sha256sum0_cg_cp_rs1_b20_str) +80000334: 000da383 lw x7,0(x27) +80000338: 01738863 beq x7,x23,80000348 +8000033c: 55d0146f jal x8,80002098 +80000340: 80000330 .word 0x80000330 +80000344: 800049c1 .word 0x800049c1 +80000348: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x7f5b4e48 +8000034c: 000c2a83 lw x21,0(x24) +80000350: 004c0c13 addi x24,x24,4 + +80000354 : +Zknh_sha256sum0_cg_cp_rs1_b21: + sha256sum0 x12, x21 # perform operation +80000354: 100a9613 sha256sum0 x12,x21 + # Check if x12 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x12, Zknh_sha256sum0_cg_cp_rs1_b21, Zknh_sha256sum0_cg_cp_rs1_b21_str) +80000358: 000da383 lw x7,0(x27) +8000035c: 00c38863 beq x7,x12,8000036c +80000360: 5390146f jal x8,80002098 +80000364: 80000354 .word 0x80000354 +80000368: 800049fa .word 0x800049fa +8000036c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x48995ac0 +80000370: 000c2b03 lw x22,0(x24) +80000374: 004c0c13 addi x24,x24,4 + +80000378 : +Zknh_sha256sum0_cg_cp_rs1_b22: + sha256sum0 x18, x22 # perform operation +80000378: 100b1913 sha256sum0 x18,x22 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zknh_sha256sum0_cg_cp_rs1_b22, Zknh_sha256sum0_cg_cp_rs1_b22_str) +8000037c: 000da383 lw x7,0(x27) +80000380: 01238863 beq x7,x18,80000390 +80000384: 5150146f jal x8,80002098 +80000388: 80000378 .word 0x80000378 +8000038c: 80004a33 .word 0x80004a33 +80000390: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x7a155d33 +80000394: 000c2b83 lw x23,0(x24) +80000398: 004c0c13 addi x24,x24,4 + +8000039c : +Zknh_sha256sum0_cg_cp_rs1_b23: + sha256sum0 x10, x23 # perform operation +8000039c: 100b9513 sha256sum0 x10,x23 + # Check if x10 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x10, Zknh_sha256sum0_cg_cp_rs1_b23, Zknh_sha256sum0_cg_cp_rs1_b23_str) +800003a0: 000da383 lw x7,0(x27) +800003a4: 00a38863 beq x7,x10,800003b4 +800003a8: 4f10146f jal x8,80002098 +800003ac: 8000039c .word 0x8000039c +800003b0: 80004a6c .word 0x80004a6c +800003b4: 004d8d93 addi x27,x27,4 + + mv x2, x24 # switch data pointer register to avoid conflict with test +800003b8: 000c0113 addi x2,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x0a178637 +800003bc: 00012c03 lw x24,0(x2) +800003c0: 00410113 addi x2,x2,4 + +800003c4 : +Zknh_sha256sum0_cg_cp_rs1_b24: + sha256sum0 x23, x24 # perform operation +800003c4: 100c1b93 sha256sum0 x23,x24 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zknh_sha256sum0_cg_cp_rs1_b24, Zknh_sha256sum0_cg_cp_rs1_b24_str) +800003c8: 000da383 lw x7,0(x27) +800003cc: 01738863 beq x7,x23,800003dc +800003d0: 4c90146f jal x8,80002098 +800003d4: 800003c4 .word 0x800003c4 +800003d8: 80004aa5 .word 0x80004aa5 +800003dc: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x6e0c555e +800003e0: 00012c83 lw x25,0(x2) +800003e4: 00410113 addi x2,x2,4 + +800003e8 : +Zknh_sha256sum0_cg_cp_rs1_b25: + sha256sum0 x3, x25 # perform operation +800003e8: 100c9193 sha256sum0 x3,x25 + # Check if x3 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x3, Zknh_sha256sum0_cg_cp_rs1_b25, Zknh_sha256sum0_cg_cp_rs1_b25_str) +800003ec: 000da383 lw x7,0(x27) +800003f0: 00338863 beq x7,x3,80000400 +800003f4: 4a50146f jal x8,80002098 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 80004ade .word 0x80004ade +80000400: 004d8d93 addi x27,x27,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x126ed157 +80000404: 00012d03 lw x26,0(x2) +80000408: 00410113 addi x2,x2,4 + +8000040c : +Zknh_sha256sum0_cg_cp_rs1_b26: + sha256sum0 x15, x26 # perform operation +8000040c: 100d1793 sha256sum0 x15,x26 + # Check if x15 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x15, Zknh_sha256sum0_cg_cp_rs1_b26, Zknh_sha256sum0_cg_cp_rs1_b26_str) +80000410: 000da383 lw x7,0(x27) +80000414: 00f38863 beq x7,x15,80000424 +80000418: 4810146f jal x8,80002098 +8000041c: 8000040c .word 0x8000040c +80000420: 80004b17 .word 0x80004b17 +80000424: 004d8d93 addi x27,x27,4 + + mv x11, x27 # switch signature pointer register to avoid conflict with test +80000428: 000d8593 addi x11,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x3146b378 +8000042c: 00012d83 lw x27,0(x2) +80000430: 00410113 addi x2,x2,4 + +80000434 : +Zknh_sha256sum0_cg_cp_rs1_b27: + sha256sum0 x0, x27 # perform operation +80000434: 100d9013 sha256sum0 x0,x27 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zknh_sha256sum0_cg_cp_rs1_b27, Zknh_sha256sum0_cg_cp_rs1_b27_str) +80000438: 0005a383 lw x7,0(x11) +8000043c: 00038863 beq x7,x0,8000044c +80000440: 4590146f jal x8,80002098 +80000444: 80000434 .word 0x80000434 +80000448: 80004b50 .word 0x80004b50 +8000044c: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x013ef790 +80000450: 00012e03 lw x28,0(x2) +80000454: 00410113 addi x2,x2,4 + +80000458 : +Zknh_sha256sum0_cg_cp_rs1_b28: + sha256sum0 x31, x28 # perform operation +80000458: 100e1f93 sha256sum0 x31,x28 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zknh_sha256sum0_cg_cp_rs1_b28, Zknh_sha256sum0_cg_cp_rs1_b28_str) +8000045c: 0005a383 lw x7,0(x11) +80000460: 01f38863 beq x7,x31,80000470 +80000464: 4350146f jal x8,80002098 +80000468: 80000458 .word 0x80000458 +8000046c: 80004b89 .word 0x80004b89 +80000470: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x56354790 +80000474: 00012e83 lw x29,0(x2) +80000478: 00410113 addi x2,x2,4 + +8000047c : +Zknh_sha256sum0_cg_cp_rs1_b29: + sha256sum0 x15, x29 # perform operation +8000047c: 100e9793 sha256sum0 x15,x29 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zknh_sha256sum0_cg_cp_rs1_b29, Zknh_sha256sum0_cg_cp_rs1_b29_str) +80000480: 0005a383 lw x7,0(x11) +80000484: 00f38863 beq x7,x15,80000494 +80000488: 4110146f jal x8,80002098 +8000048c: 8000047c .word 0x8000047c +80000490: 80004bc2 .word 0x80004bc2 +80000494: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x0f27930d +80000498: 00012f03 lw x30,0(x2) +8000049c: 00410113 addi x2,x2,4 + +800004a0 : +Zknh_sha256sum0_cg_cp_rs1_b30: + sha256sum0 x28, x30 # perform operation +800004a0: 100f1e13 sha256sum0 x28,x30 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zknh_sha256sum0_cg_cp_rs1_b30, Zknh_sha256sum0_cg_cp_rs1_b30_str) +800004a4: 0005a383 lw x7,0(x11) +800004a8: 01c38863 beq x7,x28,800004b8 +800004ac: 3ed0146f jal x8,80002098 +800004b0: 800004a0 .word 0x800004a0 +800004b4: 80004bfb .word 0x80004bfb +800004b8: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x6f7568f9 +800004bc: 00012f83 lw x31,0(x2) +800004c0: 00410113 addi x2,x2,4 + +800004c4 : +Zknh_sha256sum0_cg_cp_rs1_b31: + sha256sum0 x28, x31 # perform operation +800004c4: 100f9e13 sha256sum0 x28,x31 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zknh_sha256sum0_cg_cp_rs1_b31, Zknh_sha256sum0_cg_cp_rs1_b31_str) +800004c8: 0005a383 lw x7,0(x11) +800004cc: 01c38863 beq x7,x28,800004dc +800004d0: 3c90146f jal x8,80002098 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 80004c34 .word 0x80004c34 +800004dc: 00458593 addi x11,x11,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xf3d56d9b +800004e0: 00012e83 lw x29,0(x2) +800004e4: 00410113 addi x2,x2,4 + +800004e8 : +Zknh_sha256sum0_cg_cp_rd_b0: + sha256sum0 x0, x29 # perform operation +800004e8: 100e9013 sha256sum0 x0,x29 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zknh_sha256sum0_cg_cp_rd_b0, Zknh_sha256sum0_cg_cp_rd_b0_str) +800004ec: 0005a383 lw x7,0(x11) +800004f0: 00038863 beq x7,x0,80000500 +800004f4: 3a50146f jal x8,80002098 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 80004c6d .word 0x80004c6d +80000500: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x4) # load rs1: x4 = 0x5b91866a +80000504: 00012203 lw x4,0(x2) +80000508: 00410113 addi x2,x2,4 + +8000050c : +Zknh_sha256sum0_cg_cp_rd_b1: + sha256sum0 x1, x4 # perform operation +8000050c: 10021093 sha256sum0 x1,x4 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zknh_sha256sum0_cg_cp_rd_b1, Zknh_sha256sum0_cg_cp_rd_b1_str) +80000510: 0005a383 lw x7,0(x11) +80000514: 00138863 beq x7,x1,80000524 +80000518: 3810146f jal x8,80002098 +8000051c: 8000050c .word 0x8000050c +80000520: 80004ca4 .word 0x80004ca4 +80000524: 00458593 addi x11,x11,4 + + mv x24, x2 # switch data pointer register to avoid conflict with test +80000528: 00010c13 addi x24,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xb8f3c6bf +8000052c: 000c2d83 lw x27,0(x24) +80000530: 004c0c13 addi x24,x24,4 + +80000534 : +Zknh_sha256sum0_cg_cp_rd_b2: + sha256sum0 x2, x27 # perform operation +80000534: 100d9113 sha256sum0 x2,x27 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zknh_sha256sum0_cg_cp_rd_b2, Zknh_sha256sum0_cg_cp_rd_b2_str) +80000538: 0005a383 lw x7,0(x11) +8000053c: 00238863 beq x7,x2,8000054c +80000540: 3590146f jal x8,80002098 +80000544: 80000534 .word 0x80000534 +80000548: 80004cdb .word 0x80004cdb +8000054c: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0xf5402852 +80000550: 000c2003 lw x0,0(x24) +80000554: 004c0c13 addi x24,x24,4 + +80000558 : +Zknh_sha256sum0_cg_cp_rd_b3: + sha256sum0 x3, x0 # perform operation +80000558: 10001193 sha256sum0 x3,x0 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zknh_sha256sum0_cg_cp_rd_b3, Zknh_sha256sum0_cg_cp_rd_b3_str) +8000055c: 0005a383 lw x7,0(x11) +80000560: 00338863 beq x7,x3,80000570 +80000564: 3350146f jal x8,80002098 +80000568: 80000558 .word 0x80000558 +8000056c: 80004d12 .word 0x80004d12 +80000570: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x76cbdb47 +80000574: 000c2a83 lw x21,0(x24) +80000578: 004c0c13 addi x24,x24,4 + +8000057c : +Zknh_sha256sum0_cg_cp_rd_b4: + sha256sum0 x4, x21 # perform operation +8000057c: 100a9213 sha256sum0 x4,x21 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zknh_sha256sum0_cg_cp_rd_b4, Zknh_sha256sum0_cg_cp_rd_b4_str) +80000580: 0005a383 lw x7,0(x11) +80000584: 00438863 beq x7,x4,80000594 +80000588: 3110146f jal x8,80002098 +8000058c: 8000057c .word 0x8000057c +80000590: 80004d49 .word 0x80004d49 +80000594: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x5858e028 +80000598: 000c2983 lw x19,0(x24) +8000059c: 004c0c13 addi x24,x24,4 + +800005a0 : +Zknh_sha256sum0_cg_cp_rd_b5: + sha256sum0 x5, x19 # perform operation +800005a0: 10099293 sha256sum0 x5,x19 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zknh_sha256sum0_cg_cp_rd_b5, Zknh_sha256sum0_cg_cp_rd_b5_str) +800005a4: 0005a383 lw x7,0(x11) +800005a8: 00538863 beq x7,x5,800005b8 +800005ac: 2ed0146f jal x8,80002098 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 80004d80 .word 0x80004d80 +800005b8: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x526cdc26 +800005bc: 000c2083 lw x1,0(x24) +800005c0: 004c0c13 addi x24,x24,4 + +800005c4 : +Zknh_sha256sum0_cg_cp_rd_b6: + sha256sum0 x6, x1 # perform operation +800005c4: 10009313 sha256sum0 x6,x1 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknh_sha256sum0_cg_cp_rd_b6, Zknh_sha256sum0_cg_cp_rd_b6_str) +800005c8: 0005a383 lw x7,0(x11) +800005cc: 00638863 beq x7,x6,800005dc +800005d0: 2c90146f jal x8,80002098 +800005d4: 800005c4 .word 0x800005c4 +800005d8: 80004db7 .word 0x80004db7 +800005dc: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800005e0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800005e4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xcca26bbd +800005e8: 000c2483 lw x9,0(x24) +800005ec: 004c0c13 addi x24,x24,4 + +800005f0 : +Zknh_sha256sum0_cg_cp_rd_b7: + sha256sum0 x7, x9 # perform operation +800005f0: 10049393 sha256sum0 x7,x9 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zknh_sha256sum0_cg_cp_rd_b7, Zknh_sha256sum0_cg_cp_rd_b7_str) +800005f4: 0005a683 lw x13,0(x11) +800005f8: 00768863 beq x13,x7,80000608 +800005fc: 2c50176f jal x14,800020c0 +80000600: 800005f0 .word 0x800005f0 +80000604: 80004dee .word 0x80004dee +80000608: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x9cb7c0a6 +8000060c: 000c2003 lw x0,0(x24) +80000610: 004c0c13 addi x24,x24,4 + +80000614 : +Zknh_sha256sum0_cg_cp_rd_b8: + sha256sum0 x8, x0 # perform operation +80000614: 10001413 sha256sum0 x8,x0 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zknh_sha256sum0_cg_cp_rd_b8, Zknh_sha256sum0_cg_cp_rd_b8_str) +80000618: 0005a683 lw x13,0(x11) +8000061c: 00868863 beq x13,x8,8000062c +80000620: 2a10176f jal x14,800020c0 +80000624: 80000614 .word 0x80000614 +80000628: 80004e25 .word 0x80004e25 +8000062c: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xe6dc81d2 +80000630: 000c2d83 lw x27,0(x24) +80000634: 004c0c13 addi x24,x24,4 + +80000638 : +Zknh_sha256sum0_cg_cp_rd_b9: + sha256sum0 x9, x27 # perform operation +80000638: 100d9493 sha256sum0 x9,x27 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zknh_sha256sum0_cg_cp_rd_b9, Zknh_sha256sum0_cg_cp_rd_b9_str) +8000063c: 0005a683 lw x13,0(x11) +80000640: 00968863 beq x13,x9,80000650 +80000644: 27d0176f jal x14,800020c0 +80000648: 80000638 .word 0x80000638 +8000064c: 80004e5c .word 0x80004e5c +80000650: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x9cb54ab8 +80000654: 000c2103 lw x2,0(x24) +80000658: 004c0c13 addi x24,x24,4 + +8000065c : +Zknh_sha256sum0_cg_cp_rd_b10: + sha256sum0 x10, x2 # perform operation +8000065c: 10011513 sha256sum0 x10,x2 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zknh_sha256sum0_cg_cp_rd_b10, Zknh_sha256sum0_cg_cp_rd_b10_str) +80000660: 0005a683 lw x13,0(x11) +80000664: 00a68863 beq x13,x10,80000674 +80000668: 2590176f jal x14,800020c0 +8000066c: 8000065c .word 0x8000065c +80000670: 80004e93 .word 0x80004e93 +80000674: 00458593 addi x11,x11,4 + + mv x15, x11 # switch signature pointer register to avoid conflict with test +80000678: 00058793 addi x15,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xa7ff4fe2 +8000067c: 000c2a03 lw x20,0(x24) +80000680: 004c0c13 addi x24,x24,4 + +80000684 : +Zknh_sha256sum0_cg_cp_rd_b11: + sha256sum0 x11, x20 # perform operation +80000684: 100a1593 sha256sum0 x11,x20 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zknh_sha256sum0_cg_cp_rd_b11, Zknh_sha256sum0_cg_cp_rd_b11_str) +80000688: 0007a683 lw x13,0(x15) +8000068c: 00b68863 beq x13,x11,8000069c +80000690: 2310176f jal x14,800020c0 +80000694: 80000684 .word 0x80000684 +80000698: 80004ecb .word 0x80004ecb +8000069c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x503652bb +800006a0: 000c2883 lw x17,0(x24) +800006a4: 004c0c13 addi x24,x24,4 + +800006a8 : +Zknh_sha256sum0_cg_cp_rd_b12: + sha256sum0 x12, x17 # perform operation +800006a8: 10089613 sha256sum0 x12,x17 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zknh_sha256sum0_cg_cp_rd_b12, Zknh_sha256sum0_cg_cp_rd_b12_str) +800006ac: 0007a683 lw x13,0(x15) +800006b0: 00c68863 beq x13,x12,800006c0 +800006b4: 20d0176f jal x14,800020c0 +800006b8: 800006a8 .word 0x800006a8 +800006bc: 80004f03 .word 0x80004f03 +800006c0: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800006c4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800006c8: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x4955676e +800006cc: 000c2283 lw x5,0(x24) +800006d0: 004c0c13 addi x24,x24,4 + +800006d4 : +Zknh_sha256sum0_cg_cp_rd_b13: + sha256sum0 x13, x5 # perform operation +800006d4: 10029693 sha256sum0 x13,x5 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha256sum0_cg_cp_rd_b13, Zknh_sha256sum0_cg_cp_rd_b13_str) +800006d8: 0007a383 lw x7,0(x15) +800006dc: 00d38863 beq x7,x13,800006ec +800006e0: 1b90146f jal x8,80002098 +800006e4: 800006d4 .word 0x800006d4 +800006e8: 80004f3b .word 0x80004f3b +800006ec: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xa3df04f1 +800006f0: 000c2183 lw x3,0(x24) +800006f4: 004c0c13 addi x24,x24,4 + +800006f8 : +Zknh_sha256sum0_cg_cp_rd_b14: + sha256sum0 x14, x3 # perform operation +800006f8: 10019713 sha256sum0 x14,x3 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha256sum0_cg_cp_rd_b14, Zknh_sha256sum0_cg_cp_rd_b14_str) +800006fc: 0007a383 lw x7,0(x15) +80000700: 00e38863 beq x7,x14,80000710 +80000704: 1950146f jal x8,80002098 +80000708: 800006f8 .word 0x800006f8 +8000070c: 80004f73 .word 0x80004f73 +80000710: 00478793 addi x15,x15,4 + + mv x2, x15 # switch signature pointer register to avoid conflict with test +80000714: 00078113 addi x2,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x142fcb5e +80000718: 000c2503 lw x10,0(x24) +8000071c: 004c0c13 addi x24,x24,4 + +80000720 : +Zknh_sha256sum0_cg_cp_rd_b15: + sha256sum0 x15, x10 # perform operation +80000720: 10051793 sha256sum0 x15,x10 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknh_sha256sum0_cg_cp_rd_b15, Zknh_sha256sum0_cg_cp_rd_b15_str) +80000724: 00012383 lw x7,0(x2) +80000728: 00f38863 beq x7,x15,80000738 +8000072c: 16d0146f jal x8,80002098 +80000730: 80000720 .word 0x80000720 +80000734: 80004fab .word 0x80004fab +80000738: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x035e63ba +8000073c: 000c2b83 lw x23,0(x24) +80000740: 004c0c13 addi x24,x24,4 + +80000744 : +Zknh_sha256sum0_cg_cp_rd_b16: + sha256sum0 x16, x23 # perform operation +80000744: 100b9813 sha256sum0 x16,x23 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknh_sha256sum0_cg_cp_rd_b16, Zknh_sha256sum0_cg_cp_rd_b16_str) +80000748: 00012383 lw x7,0(x2) +8000074c: 01038863 beq x7,x16,8000075c +80000750: 1490146f jal x8,80002098 +80000754: 80000744 .word 0x80000744 +80000758: 80004fe3 .word 0x80004fe3 +8000075c: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0xbfe0133a +80000760: 000c2503 lw x10,0(x24) +80000764: 004c0c13 addi x24,x24,4 + +80000768 : +Zknh_sha256sum0_cg_cp_rd_b17: + sha256sum0 x17, x10 # perform operation +80000768: 10051893 sha256sum0 x17,x10 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknh_sha256sum0_cg_cp_rd_b17, Zknh_sha256sum0_cg_cp_rd_b17_str) +8000076c: 00012383 lw x7,0(x2) +80000770: 01138863 beq x7,x17,80000780 +80000774: 1250146f jal x8,80002098 +80000778: 80000768 .word 0x80000768 +8000077c: 8000501b .word 0x8000501b +80000780: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x28b4eeb9 +80000784: 000c2183 lw x3,0(x24) +80000788: 004c0c13 addi x24,x24,4 + +8000078c : +Zknh_sha256sum0_cg_cp_rd_b18: + sha256sum0 x18, x3 # perform operation +8000078c: 10019913 sha256sum0 x18,x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknh_sha256sum0_cg_cp_rd_b18, Zknh_sha256sum0_cg_cp_rd_b18_str) +80000790: 00012383 lw x7,0(x2) +80000794: 01238863 beq x7,x18,800007a4 +80000798: 1010146f jal x8,80002098 +8000079c: 8000078c .word 0x8000078c +800007a0: 80005053 .word 0x80005053 +800007a4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x9af45901 +800007a8: 000c2283 lw x5,0(x24) +800007ac: 004c0c13 addi x24,x24,4 + +800007b0 : +Zknh_sha256sum0_cg_cp_rd_b19: + sha256sum0 x19, x5 # perform operation +800007b0: 10029993 sha256sum0 x19,x5 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknh_sha256sum0_cg_cp_rd_b19, Zknh_sha256sum0_cg_cp_rd_b19_str) +800007b4: 00012383 lw x7,0(x2) +800007b8: 01338863 beq x7,x19,800007c8 +800007bc: 0dd0146f jal x8,80002098 +800007c0: 800007b0 .word 0x800007b0 +800007c4: 8000508b .word 0x8000508b +800007c8: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x6e71d550 +800007cc: 000c2083 lw x1,0(x24) +800007d0: 004c0c13 addi x24,x24,4 + +800007d4 : +Zknh_sha256sum0_cg_cp_rd_b20: + sha256sum0 x20, x1 # perform operation +800007d4: 10009a13 sha256sum0 x20,x1 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknh_sha256sum0_cg_cp_rd_b20, Zknh_sha256sum0_cg_cp_rd_b20_str) +800007d8: 00012383 lw x7,0(x2) +800007dc: 01438863 beq x7,x20,800007ec +800007e0: 0b90146f jal x8,80002098 +800007e4: 800007d4 .word 0x800007d4 +800007e8: 800050c3 .word 0x800050c3 +800007ec: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x8994fc0d +800007f0: 000c2683 lw x13,0(x24) +800007f4: 004c0c13 addi x24,x24,4 + +800007f8 : +Zknh_sha256sum0_cg_cp_rd_b21: + sha256sum0 x21, x13 # perform operation +800007f8: 10069a93 sha256sum0 x21,x13 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknh_sha256sum0_cg_cp_rd_b21, Zknh_sha256sum0_cg_cp_rd_b21_str) +800007fc: 00012383 lw x7,0(x2) +80000800: 01538863 beq x7,x21,80000810 +80000804: 0950146f jal x8,80002098 +80000808: 800007f8 .word 0x800007f8 +8000080c: 800050fb .word 0x800050fb +80000810: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x972f83f4 +80000814: 000c2703 lw x14,0(x24) +80000818: 004c0c13 addi x24,x24,4 + +8000081c : +Zknh_sha256sum0_cg_cp_rd_b22: + sha256sum0 x22, x14 # perform operation +8000081c: 10071b13 sha256sum0 x22,x14 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknh_sha256sum0_cg_cp_rd_b22, Zknh_sha256sum0_cg_cp_rd_b22_str) +80000820: 00012383 lw x7,0(x2) +80000824: 01638863 beq x7,x22,80000834 +80000828: 0710146f jal x8,80002098 +8000082c: 8000081c .word 0x8000081c +80000830: 80005133 .word 0x80005133 +80000834: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x96c86909 +80000838: 000c2583 lw x11,0(x24) +8000083c: 004c0c13 addi x24,x24,4 + +80000840 : +Zknh_sha256sum0_cg_cp_rd_b23: + sha256sum0 x23, x11 # perform operation +80000840: 10059b93 sha256sum0 x23,x11 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknh_sha256sum0_cg_cp_rd_b23, Zknh_sha256sum0_cg_cp_rd_b23_str) +80000844: 00012383 lw x7,0(x2) +80000848: 01738863 beq x7,x23,80000858 +8000084c: 04d0146f jal x8,80002098 +80000850: 80000840 .word 0x80000840 +80000854: 8000516b .word 0x8000516b +80000858: 00410113 addi x2,x2,4 + + mv x9, x24 # switch data pointer register to avoid conflict with test +8000085c: 000c0493 addi x9,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xe01bc865 +80000860: 0004a983 lw x19,0(x9) +80000864: 00448493 addi x9,x9,4 + +80000868 : +Zknh_sha256sum0_cg_cp_rd_b24: + sha256sum0 x24, x19 # perform operation +80000868: 10099c13 sha256sum0 x24,x19 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknh_sha256sum0_cg_cp_rd_b24, Zknh_sha256sum0_cg_cp_rd_b24_str) +8000086c: 00012383 lw x7,0(x2) +80000870: 01838863 beq x7,x24,80000880 +80000874: 0250146f jal x8,80002098 +80000878: 80000868 .word 0x80000868 +8000087c: 800051a3 .word 0x800051a3 +80000880: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xcbe95e35 +80000884: 0004af03 lw x30,0(x9) +80000888: 00448493 addi x9,x9,4 + +8000088c : +Zknh_sha256sum0_cg_cp_rd_b25: + sha256sum0 x25, x30 # perform operation +8000088c: 100f1c93 sha256sum0 x25,x30 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknh_sha256sum0_cg_cp_rd_b25, Zknh_sha256sum0_cg_cp_rd_b25_str) +80000890: 00012383 lw x7,0(x2) +80000894: 01938863 beq x7,x25,800008a4 +80000898: 0010146f jal x8,80002098 +8000089c: 8000088c .word 0x8000088c +800008a0: 800051db .word 0x800051db +800008a4: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x36a6e45d +800008a8: 0004ac03 lw x24,0(x9) +800008ac: 00448493 addi x9,x9,4 + +800008b0 : +Zknh_sha256sum0_cg_cp_rd_b26: + sha256sum0 x26, x24 # perform operation +800008b0: 100c1d13 sha256sum0 x26,x24 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknh_sha256sum0_cg_cp_rd_b26, Zknh_sha256sum0_cg_cp_rd_b26_str) +800008b4: 00012383 lw x7,0(x2) +800008b8: 01a38863 beq x7,x26,800008c8 +800008bc: 7dc0146f jal x8,80002098 +800008c0: 800008b0 .word 0x800008b0 +800008c4: 80005213 .word 0x80005213 +800008c8: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x1f72389b +800008cc: 0004ab83 lw x23,0(x9) +800008d0: 00448493 addi x9,x9,4 + +800008d4 : +Zknh_sha256sum0_cg_cp_rd_b27: + sha256sum0 x27, x23 # perform operation +800008d4: 100b9d93 sha256sum0 x27,x23 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknh_sha256sum0_cg_cp_rd_b27, Zknh_sha256sum0_cg_cp_rd_b27_str) +800008d8: 00012383 lw x7,0(x2) +800008dc: 01b38863 beq x7,x27,800008ec +800008e0: 7b80146f jal x8,80002098 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 8000524b .word 0x8000524b +800008ec: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x7b2175a4 +800008f0: 0004a583 lw x11,0(x9) +800008f4: 00448493 addi x9,x9,4 + +800008f8 : +Zknh_sha256sum0_cg_cp_rd_b28: + sha256sum0 x28, x11 # perform operation +800008f8: 10059e13 sha256sum0 x28,x11 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknh_sha256sum0_cg_cp_rd_b28, Zknh_sha256sum0_cg_cp_rd_b28_str) +800008fc: 00012383 lw x7,0(x2) +80000900: 01c38863 beq x7,x28,80000910 +80000904: 7940146f jal x8,80002098 +80000908: 800008f8 .word 0x800008f8 +8000090c: 80005283 .word 0x80005283 +80000910: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5cd13c93 +80000914: 0004ae03 lw x28,0(x9) +80000918: 00448493 addi x9,x9,4 + +8000091c : +Zknh_sha256sum0_cg_cp_rd_b29: + sha256sum0 x29, x28 # perform operation +8000091c: 100e1e93 sha256sum0 x29,x28 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknh_sha256sum0_cg_cp_rd_b29, Zknh_sha256sum0_cg_cp_rd_b29_str) +80000920: 00012383 lw x7,0(x2) +80000924: 01d38863 beq x7,x29,80000934 +80000928: 7700146f jal x8,80002098 +8000092c: 8000091c .word 0x8000091c +80000930: 800052bb .word 0x800052bb +80000934: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x6a399cd4 +80000938: 0004a903 lw x18,0(x9) +8000093c: 00448493 addi x9,x9,4 + +80000940 : +Zknh_sha256sum0_cg_cp_rd_b30: + sha256sum0 x30, x18 # perform operation +80000940: 10091f13 sha256sum0 x30,x18 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknh_sha256sum0_cg_cp_rd_b30, Zknh_sha256sum0_cg_cp_rd_b30_str) +80000944: 00012383 lw x7,0(x2) +80000948: 01e38863 beq x7,x30,80000958 +8000094c: 74c0146f jal x8,80002098 +80000950: 80000940 .word 0x80000940 +80000954: 800052f3 .word 0x800052f3 +80000958: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x0e16a342 +8000095c: 0004a283 lw x5,0(x9) +80000960: 00448493 addi x9,x9,4 + +80000964 : +Zknh_sha256sum0_cg_cp_rd_b31: + sha256sum0 x31, x5 # perform operation +80000964: 10029f93 sha256sum0 x31,x5 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknh_sha256sum0_cg_cp_rd_b31, Zknh_sha256sum0_cg_cp_rd_b31_str) +80000968: 00012383 lw x7,0(x2) +8000096c: 01f38863 beq x7,x31,8000097c +80000970: 7280146f jal x8,80002098 +80000974: 80000964 .word 0x80000964 +80000978: 8000532b .word 0x8000532b +8000097c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x00000000 +80000980: 0004a783 lw x15,0(x9) +80000984: 00448493 addi x9,x9,4 + +80000988 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x0: + sha256sum0 x18, x15 # perform operation +80000988: 10079913 sha256sum0 x18,x15 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknh_sha256sum0_cg_cp_rs1_edges_0x0, Zknh_sha256sum0_cg_cp_rs1_edges_0x0_str) +8000098c: 00012383 lw x7,0(x2) +80000990: 01238863 beq x7,x18,800009a0 +80000994: 7040146f jal x8,80002098 +80000998: 80000988 .word 0x80000988 +8000099c: 80005363 .word 0x80005363 +800009a0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x00000001 +800009a4: 0004a203 lw x4,0(x9) +800009a8: 00448493 addi x9,x9,4 + +800009ac : +Zknh_sha256sum0_cg_cp_rs1_edges_0x1: + sha256sum0 x15, x4 # perform operation +800009ac: 10021793 sha256sum0 x15,x4 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknh_sha256sum0_cg_cp_rs1_edges_0x1, Zknh_sha256sum0_cg_cp_rs1_edges_0x1_str) +800009b0: 00012383 lw x7,0(x2) +800009b4: 00f38863 beq x7,x15,800009c4 +800009b8: 6e00146f jal x8,80002098 +800009bc: 800009ac .word 0x800009ac +800009c0: 800053a2 .word 0x800053a2 +800009c4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000002 +800009c8: 0004a983 lw x19,0(x9) +800009cc: 00448493 addi x9,x9,4 + +800009d0 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x2: + sha256sum0 x17, x19 # perform operation +800009d0: 10099893 sha256sum0 x17,x19 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknh_sha256sum0_cg_cp_rs1_edges_0x2, Zknh_sha256sum0_cg_cp_rs1_edges_0x2_str) +800009d4: 00012383 lw x7,0(x2) +800009d8: 01138863 beq x7,x17,800009e8 +800009dc: 6bc0146f jal x8,80002098 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 800053e1 .word 0x800053e1 +800009e8: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x80000000 +800009ec: 0004ae83 lw x29,0(x9) +800009f0: 00448493 addi x9,x9,4 + +800009f4 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x80000000: + sha256sum0 x27, x29 # perform operation +800009f4: 100e9d93 sha256sum0 x27,x29 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknh_sha256sum0_cg_cp_rs1_edges_0x80000000, Zknh_sha256sum0_cg_cp_rs1_edges_0x80000000_str) +800009f8: 00012383 lw x7,0(x2) +800009fc: 01b38863 beq x7,x27,80000a0c +80000a00: 6980146f jal x8,80002098 +80000a04: 800009f4 .word 0x800009f4 +80000a08: 80005420 .word 0x80005420 +80000a0c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x80000001 +80000a10: 0004aa03 lw x20,0(x9) +80000a14: 00448493 addi x9,x9,4 + +80000a18 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x80000001: + sha256sum0 x4, x20 # perform operation +80000a18: 100a1213 sha256sum0 x4,x20 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknh_sha256sum0_cg_cp_rs1_edges_0x80000001, Zknh_sha256sum0_cg_cp_rs1_edges_0x80000001_str) +80000a1c: 00012383 lw x7,0(x2) +80000a20: 00438863 beq x7,x4,80000a30 +80000a24: 6740146f jal x8,80002098 +80000a28: 80000a18 .word 0x80000a18 +80000a2c: 80005466 .word 0x80005466 +80000a30: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x7fffffff +80000a34: 0004af03 lw x30,0(x9) +80000a38: 00448493 addi x9,x9,4 + +80000a3c : +Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffff: + sha256sum0 x3, x30 # perform operation +80000a3c: 100f1193 sha256sum0 x3,x30 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffff, Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffff_str) +80000a40: 00012383 lw x7,0(x2) +80000a44: 00338863 beq x7,x3,80000a54 +80000a48: 6500146f jal x8,80002098 +80000a4c: 80000a3c .word 0x80000a3c +80000a50: 800054ac .word 0x800054ac +80000a54: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7ffffffe +80000a58: 0004ae83 lw x29,0(x9) +80000a5c: 00448493 addi x9,x9,4 + +80000a60 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffe: + sha256sum0 x25, x29 # perform operation +80000a60: 100e9c93 sha256sum0 x25,x29 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffe_str) +80000a64: 00012383 lw x7,0(x2) +80000a68: 01938863 beq x7,x25,80000a78 +80000a6c: 62c0146f jal x8,80002098 +80000a70: 80000a60 .word 0x80000a60 +80000a74: 800054f2 .word 0x800054f2 +80000a78: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xffffffff +80000a7c: 0004a683 lw x13,0(x9) +80000a80: 00448493 addi x9,x9,4 + +80000a84 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff: + sha256sum0 x15, x13 # perform operation +80000a84: 10069793 sha256sum0 x15,x13 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff_str) +80000a88: 00012383 lw x7,0(x2) +80000a8c: 00f38863 beq x7,x15,80000a9c +80000a90: 6080146f jal x8,80002098 +80000a94: 80000a84 .word 0x80000a84 +80000a98: 80005538 .word 0x80005538 +80000a9c: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xfffffffe +80000aa0: 0004ad03 lw x26,0(x9) +80000aa4: 00448493 addi x9,x9,4 + +80000aa8 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe: + sha256sum0 x5, x26 # perform operation +80000aa8: 100d1293 sha256sum0 x5,x26 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe_str) +80000aac: 00012383 lw x7,0(x2) +80000ab0: 00538863 beq x7,x5,80000ac0 +80000ab4: 5e40146f jal x8,80002098 +80000ab8: 80000aa8 .word 0x80000aa8 +80000abc: 8000557e .word 0x8000557e +80000ac0: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x5bbc8872 +80000ac4: 0004ae83 lw x29,0(x9) +80000ac8: 00448493 addi x9,x9,4 + +80000acc : +Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc8872: + sha256sum0 x4, x29 # perform operation +80000acc: 100e9213 sha256sum0 x4,x29 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc8872_str) +80000ad0: 00012383 lw x7,0(x2) +80000ad4: 00438863 beq x7,x4,80000ae4 +80000ad8: 5c00146f jal x8,80002098 +80000adc: 80000acc .word 0x80000acc +80000ae0: 800055c4 .word 0x800055c4 +80000ae4: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaa +80000ae8: 0004a703 lw x14,0(x9) +80000aec: 00448493 addi x9,x9,4 + +80000af0 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaa: + sha256sum0 x18, x14 # perform operation +80000af0: 10071913 sha256sum0 x18,x14 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000af4: 00012383 lw x7,0(x2) +80000af8: 01238863 beq x7,x18,80000b08 +80000afc: 59c0146f jal x8,80002098 +80000b00: 80000af0 .word 0x80000af0 +80000b04: 8000560a .word 0x8000560a +80000b08: 00410113 addi x2,x2,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x55555555 +80000b0c: 0004aa03 lw x20,0(x9) +80000b10: 00448493 addi x9,x9,4 + +80000b14 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x55555555: + sha256sum0 x23, x20 # perform operation +80000b14: 100a1b93 sha256sum0 x23,x20 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknh_sha256sum0_cg_cp_rs1_edges_0x55555555, Zknh_sha256sum0_cg_cp_rs1_edges_0x55555555_str) +80000b18: 00012383 lw x7,0(x2) +80000b1c: 01738863 beq x7,x23,80000b2c +80000b20: 5780146f jal x8,80002098 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 80005650 .word 0x80005650 +80000b2c: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xfec45205 +80000b30: 0004a003 lw x0,0(x9) +80000b34: 00448493 addi x9,x9,4 + +80000b38 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b0: + sha256sum0 x0, x0 # perform operation +80000b38: 10001013 sha256sum0 x0,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x0, Zknh_sha256sum0_cg_cmp_rd_rs1_b0, Zknh_sha256sum0_cg_cmp_rd_rs1_b0_str) +80000b3c: 00012383 lw x7,0(x2) +80000b40: 00038863 beq x7,x0,80000b50 +80000b44: 5540146f jal x8,80002098 +80000b48: 80000b38 .word 0x80000b38 +80000b4c: 80005696 .word 0x80005696 +80000b50: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x4737d9f9 +80000b54: 0004a083 lw x1,0(x9) +80000b58: 00448493 addi x9,x9,4 + +80000b5c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b1: + sha256sum0 x1, x1 # perform operation +80000b5c: 10009093 sha256sum0 x1,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zknh_sha256sum0_cg_cmp_rd_rs1_b1, Zknh_sha256sum0_cg_cmp_rd_rs1_b1_str) +80000b60: 00012383 lw x7,0(x2) +80000b64: 00138863 beq x7,x1,80000b74 +80000b68: 5300146f jal x8,80002098 +80000b6c: 80000b5c .word 0x80000b5c +80000b70: 800056d2 .word 0x800056d2 +80000b74: 00410113 addi x2,x2,4 + + mv x29, x2 # switch signature pointer register to avoid conflict with test +80000b78: 00010e93 addi x29,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x4288e196 +80000b7c: 0004a103 lw x2,0(x9) +80000b80: 00448493 addi x9,x9,4 + +80000b84 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b2: + sha256sum0 x2, x2 # perform operation +80000b84: 10011113 sha256sum0 x2,x2 + # Check if x2 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x2, Zknh_sha256sum0_cg_cmp_rd_rs1_b2, Zknh_sha256sum0_cg_cmp_rd_rs1_b2_str) +80000b88: 000ea383 lw x7,0(x29) +80000b8c: 00238863 beq x7,x2,80000b9c +80000b90: 5080146f jal x8,80002098 +80000b94: 80000b84 .word 0x80000b84 +80000b98: 8000570e .word 0x8000570e +80000b9c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x483907cb +80000ba0: 0004a183 lw x3,0(x9) +80000ba4: 00448493 addi x9,x9,4 + +80000ba8 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b3: + sha256sum0 x3, x3 # perform operation +80000ba8: 10019193 sha256sum0 x3,x3 + # Check if x3 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x3, Zknh_sha256sum0_cg_cmp_rd_rs1_b3, Zknh_sha256sum0_cg_cmp_rd_rs1_b3_str) +80000bac: 000ea383 lw x7,0(x29) +80000bb0: 00338863 beq x7,x3,80000bc0 +80000bb4: 4e40146f jal x8,80002098 +80000bb8: 80000ba8 .word 0x80000ba8 +80000bbc: 8000574a .word 0x8000574a +80000bc0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x43810eee +80000bc4: 0004a203 lw x4,0(x9) +80000bc8: 00448493 addi x9,x9,4 + +80000bcc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b4: + sha256sum0 x4, x4 # perform operation +80000bcc: 10021213 sha256sum0 x4,x4 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zknh_sha256sum0_cg_cmp_rd_rs1_b4, Zknh_sha256sum0_cg_cmp_rd_rs1_b4_str) +80000bd0: 000ea383 lw x7,0(x29) +80000bd4: 00438863 beq x7,x4,80000be4 +80000bd8: 4c00146f jal x8,80002098 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80005786 .word 0x80005786 +80000be4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xdbdfbbfe +80000be8: 0004a283 lw x5,0(x9) +80000bec: 00448493 addi x9,x9,4 + +80000bf0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b5: + sha256sum0 x5, x5 # perform operation +80000bf0: 10029293 sha256sum0 x5,x5 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zknh_sha256sum0_cg_cmp_rd_rs1_b5, Zknh_sha256sum0_cg_cmp_rd_rs1_b5_str) +80000bf4: 000ea383 lw x7,0(x29) +80000bf8: 00538863 beq x7,x5,80000c08 +80000bfc: 49c0146f jal x8,80002098 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 800057c2 .word 0x800057c2 +80000c08: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xf3ff6a8f +80000c0c: 0004a303 lw x6,0(x9) +80000c10: 00448493 addi x9,x9,4 + +80000c14 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b6: + sha256sum0 x6, x6 # perform operation +80000c14: 10031313 sha256sum0 x6,x6 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zknh_sha256sum0_cg_cmp_rd_rs1_b6, Zknh_sha256sum0_cg_cmp_rd_rs1_b6_str) +80000c18: 000ea383 lw x7,0(x29) +80000c1c: 00638863 beq x7,x6,80000c2c +80000c20: 4780146f jal x8,80002098 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 800057fe .word 0x800057fe +80000c2c: 004e8e93 addi x29,x29,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c30: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c34: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x07f9fa7a +80000c38: 0004a383 lw x7,0(x9) +80000c3c: 00448493 addi x9,x9,4 + +80000c40 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b7: + sha256sum0 x7, x7 # perform operation +80000c40: 10039393 sha256sum0 x7,x7 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zknh_sha256sum0_cg_cmp_rd_rs1_b7, Zknh_sha256sum0_cg_cmp_rd_rs1_b7_str) +80000c44: 000ea203 lw x4,0(x29) +80000c48: 00720863 beq x4,x7,80000c58 +80000c4c: 434012ef jal x5,80002080 +80000c50: 80000c40 .word 0x80000c40 +80000c54: 8000583a .word 0x8000583a +80000c58: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xc3b28840 +80000c5c: 0004a403 lw x8,0(x9) +80000c60: 00448493 addi x9,x9,4 + +80000c64 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b8: + sha256sum0 x8, x8 # perform operation +80000c64: 10041413 sha256sum0 x8,x8 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zknh_sha256sum0_cg_cmp_rd_rs1_b8, Zknh_sha256sum0_cg_cmp_rd_rs1_b8_str) +80000c68: 000ea203 lw x4,0(x29) +80000c6c: 00820863 beq x4,x8,80000c7c +80000c70: 410012ef jal x5,80002080 +80000c74: 80000c64 .word 0x80000c64 +80000c78: 80005876 .word 0x80005876 +80000c7c: 004e8e93 addi x29,x29,4 + + mv x12, x9 # switch data pointer register to avoid conflict with test +80000c80: 00048613 addi x12,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x8fd8a558 +80000c84: 00062483 lw x9,0(x12) +80000c88: 00460613 addi x12,x12,4 + +80000c8c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b9: + sha256sum0 x9, x9 # perform operation +80000c8c: 10049493 sha256sum0 x9,x9 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zknh_sha256sum0_cg_cmp_rd_rs1_b9, Zknh_sha256sum0_cg_cmp_rd_rs1_b9_str) +80000c90: 000ea203 lw x4,0(x29) +80000c94: 00920863 beq x4,x9,80000ca4 +80000c98: 3e8012ef jal x5,80002080 +80000c9c: 80000c8c .word 0x80000c8c +80000ca0: 800058b2 .word 0x800058b2 +80000ca4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x2c3570a9 +80000ca8: 00062503 lw x10,0(x12) +80000cac: 00460613 addi x12,x12,4 + +80000cb0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b10: + sha256sum0 x10, x10 # perform operation +80000cb0: 10051513 sha256sum0 x10,x10 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zknh_sha256sum0_cg_cmp_rd_rs1_b10, Zknh_sha256sum0_cg_cmp_rd_rs1_b10_str) +80000cb4: 000ea203 lw x4,0(x29) +80000cb8: 00a20863 beq x4,x10,80000cc8 +80000cbc: 3c4012ef jal x5,80002080 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 800058ee .word 0x800058ee +80000cc8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x87c49f4a +80000ccc: 00062583 lw x11,0(x12) +80000cd0: 00460613 addi x12,x12,4 + +80000cd4 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b11: + sha256sum0 x11, x11 # perform operation +80000cd4: 10059593 sha256sum0 x11,x11 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zknh_sha256sum0_cg_cmp_rd_rs1_b11, Zknh_sha256sum0_cg_cmp_rd_rs1_b11_str) +80000cd8: 000ea203 lw x4,0(x29) +80000cdc: 00b20863 beq x4,x11,80000cec +80000ce0: 3a0012ef jal x5,80002080 +80000ce4: 80000cd4 .word 0x80000cd4 +80000ce8: 8000592b .word 0x8000592b +80000cec: 004e8e93 addi x29,x29,4 + + mv x9, x12 # switch data pointer register to avoid conflict with test +80000cf0: 00060493 addi x9,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x14959aef +80000cf4: 0004a603 lw x12,0(x9) +80000cf8: 00448493 addi x9,x9,4 + +80000cfc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b12: + sha256sum0 x12, x12 # perform operation +80000cfc: 10061613 sha256sum0 x12,x12 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zknh_sha256sum0_cg_cmp_rd_rs1_b12, Zknh_sha256sum0_cg_cmp_rd_rs1_b12_str) +80000d00: 000ea203 lw x4,0(x29) +80000d04: 00c20863 beq x4,x12,80000d14 +80000d08: 378012ef jal x5,80002080 +80000d0c: 80000cfc .word 0x80000cfc +80000d10: 80005968 .word 0x80005968 +80000d14: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x82898955 +80000d18: 0004a683 lw x13,0(x9) +80000d1c: 00448493 addi x9,x9,4 + +80000d20 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b13: + sha256sum0 x13, x13 # perform operation +80000d20: 10069693 sha256sum0 x13,x13 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zknh_sha256sum0_cg_cmp_rd_rs1_b13, Zknh_sha256sum0_cg_cmp_rd_rs1_b13_str) +80000d24: 000ea203 lw x4,0(x29) +80000d28: 00d20863 beq x4,x13,80000d38 +80000d2c: 354012ef jal x5,80002080 +80000d30: 80000d20 .word 0x80000d20 +80000d34: 800059a5 .word 0x800059a5 +80000d38: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xf51e5a0e +80000d3c: 0004a703 lw x14,0(x9) +80000d40: 00448493 addi x9,x9,4 + +80000d44 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b14: + sha256sum0 x14, x14 # perform operation +80000d44: 10071713 sha256sum0 x14,x14 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zknh_sha256sum0_cg_cmp_rd_rs1_b14, Zknh_sha256sum0_cg_cmp_rd_rs1_b14_str) +80000d48: 000ea203 lw x4,0(x29) +80000d4c: 00e20863 beq x4,x14,80000d5c +80000d50: 330012ef jal x5,80002080 +80000d54: 80000d44 .word 0x80000d44 +80000d58: 800059e2 .word 0x800059e2 +80000d5c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xa3506b36 +80000d60: 0004a783 lw x15,0(x9) +80000d64: 00448493 addi x9,x9,4 + +80000d68 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b15: + sha256sum0 x15, x15 # perform operation +80000d68: 10079793 sha256sum0 x15,x15 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zknh_sha256sum0_cg_cmp_rd_rs1_b15, Zknh_sha256sum0_cg_cmp_rd_rs1_b15_str) +80000d6c: 000ea203 lw x4,0(x29) +80000d70: 00f20863 beq x4,x15,80000d80 +80000d74: 30c012ef jal x5,80002080 +80000d78: 80000d68 .word 0x80000d68 +80000d7c: 80005a1f .word 0x80005a1f +80000d80: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xa54c84d2 +80000d84: 0004a803 lw x16,0(x9) +80000d88: 00448493 addi x9,x9,4 + +80000d8c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b16: + sha256sum0 x16, x16 # perform operation +80000d8c: 10081813 sha256sum0 x16,x16 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zknh_sha256sum0_cg_cmp_rd_rs1_b16, Zknh_sha256sum0_cg_cmp_rd_rs1_b16_str) +80000d90: 000ea203 lw x4,0(x29) +80000d94: 01020863 beq x4,x16,80000da4 +80000d98: 2e8012ef jal x5,80002080 +80000d9c: 80000d8c .word 0x80000d8c +80000da0: 80005a5c .word 0x80005a5c +80000da4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x8add35de +80000da8: 0004a883 lw x17,0(x9) +80000dac: 00448493 addi x9,x9,4 + +80000db0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b17: + sha256sum0 x17, x17 # perform operation +80000db0: 10089893 sha256sum0 x17,x17 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zknh_sha256sum0_cg_cmp_rd_rs1_b17, Zknh_sha256sum0_cg_cmp_rd_rs1_b17_str) +80000db4: 000ea203 lw x4,0(x29) +80000db8: 01120863 beq x4,x17,80000dc8 +80000dbc: 2c4012ef jal x5,80002080 +80000dc0: 80000db0 .word 0x80000db0 +80000dc4: 80005a99 .word 0x80005a99 +80000dc8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x58a780b1 +80000dcc: 0004a903 lw x18,0(x9) +80000dd0: 00448493 addi x9,x9,4 + +80000dd4 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b18: + sha256sum0 x18, x18 # perform operation +80000dd4: 10091913 sha256sum0 x18,x18 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zknh_sha256sum0_cg_cmp_rd_rs1_b18, Zknh_sha256sum0_cg_cmp_rd_rs1_b18_str) +80000dd8: 000ea203 lw x4,0(x29) +80000ddc: 01220863 beq x4,x18,80000dec +80000de0: 2a0012ef jal x5,80002080 +80000de4: 80000dd4 .word 0x80000dd4 +80000de8: 80005ad6 .word 0x80005ad6 +80000dec: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x3c7cd7e2 +80000df0: 0004a983 lw x19,0(x9) +80000df4: 00448493 addi x9,x9,4 + +80000df8 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b19: + sha256sum0 x19, x19 # perform operation +80000df8: 10099993 sha256sum0 x19,x19 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zknh_sha256sum0_cg_cmp_rd_rs1_b19, Zknh_sha256sum0_cg_cmp_rd_rs1_b19_str) +80000dfc: 000ea203 lw x4,0(x29) +80000e00: 01320863 beq x4,x19,80000e10 +80000e04: 27c012ef jal x5,80002080 +80000e08: 80000df8 .word 0x80000df8 +80000e0c: 80005b13 .word 0x80005b13 +80000e10: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xfab06292 +80000e14: 0004aa03 lw x20,0(x9) +80000e18: 00448493 addi x9,x9,4 + +80000e1c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b20: + sha256sum0 x20, x20 # perform operation +80000e1c: 100a1a13 sha256sum0 x20,x20 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zknh_sha256sum0_cg_cmp_rd_rs1_b20, Zknh_sha256sum0_cg_cmp_rd_rs1_b20_str) +80000e20: 000ea203 lw x4,0(x29) +80000e24: 01420863 beq x4,x20,80000e34 +80000e28: 258012ef jal x5,80002080 +80000e2c: 80000e1c .word 0x80000e1c +80000e30: 80005b50 .word 0x80005b50 +80000e34: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x6813e95a +80000e38: 0004aa83 lw x21,0(x9) +80000e3c: 00448493 addi x9,x9,4 + +80000e40 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b21: + sha256sum0 x21, x21 # perform operation +80000e40: 100a9a93 sha256sum0 x21,x21 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zknh_sha256sum0_cg_cmp_rd_rs1_b21, Zknh_sha256sum0_cg_cmp_rd_rs1_b21_str) +80000e44: 000ea203 lw x4,0(x29) +80000e48: 01520863 beq x4,x21,80000e58 +80000e4c: 234012ef jal x5,80002080 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 80005b8d .word 0x80005b8d +80000e58: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x17b86da3 +80000e5c: 0004ab03 lw x22,0(x9) +80000e60: 00448493 addi x9,x9,4 + +80000e64 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b22: + sha256sum0 x22, x22 # perform operation +80000e64: 100b1b13 sha256sum0 x22,x22 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zknh_sha256sum0_cg_cmp_rd_rs1_b22, Zknh_sha256sum0_cg_cmp_rd_rs1_b22_str) +80000e68: 000ea203 lw x4,0(x29) +80000e6c: 01620863 beq x4,x22,80000e7c +80000e70: 210012ef jal x5,80002080 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 80005bca .word 0x80005bca +80000e7c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xd5b188b1 +80000e80: 0004ab83 lw x23,0(x9) +80000e84: 00448493 addi x9,x9,4 + +80000e88 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b23: + sha256sum0 x23, x23 # perform operation +80000e88: 100b9b93 sha256sum0 x23,x23 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zknh_sha256sum0_cg_cmp_rd_rs1_b23, Zknh_sha256sum0_cg_cmp_rd_rs1_b23_str) +80000e8c: 000ea203 lw x4,0(x29) +80000e90: 01720863 beq x4,x23,80000ea0 +80000e94: 1ec012ef jal x5,80002080 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 80005c07 .word 0x80005c07 +80000ea0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xa5a2c16a +80000ea4: 0004ac03 lw x24,0(x9) +80000ea8: 00448493 addi x9,x9,4 + +80000eac : +Zknh_sha256sum0_cg_cmp_rd_rs1_b24: + sha256sum0 x24, x24 # perform operation +80000eac: 100c1c13 sha256sum0 x24,x24 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zknh_sha256sum0_cg_cmp_rd_rs1_b24, Zknh_sha256sum0_cg_cmp_rd_rs1_b24_str) +80000eb0: 000ea203 lw x4,0(x29) +80000eb4: 01820863 beq x4,x24,80000ec4 +80000eb8: 1c8012ef jal x5,80002080 +80000ebc: 80000eac .word 0x80000eac +80000ec0: 80005c45 .word 0x80005c45 +80000ec4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xd4e7be3a +80000ec8: 0004ac83 lw x25,0(x9) +80000ecc: 00448493 addi x9,x9,4 + +80000ed0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b25: + sha256sum0 x25, x25 # perform operation +80000ed0: 100c9c93 sha256sum0 x25,x25 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zknh_sha256sum0_cg_cmp_rd_rs1_b25, Zknh_sha256sum0_cg_cmp_rd_rs1_b25_str) +80000ed4: 000ea203 lw x4,0(x29) +80000ed8: 01920863 beq x4,x25,80000ee8 +80000edc: 1a4012ef jal x5,80002080 +80000ee0: 80000ed0 .word 0x80000ed0 +80000ee4: 80005c83 .word 0x80005c83 +80000ee8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x86a263f6 +80000eec: 0004ad03 lw x26,0(x9) +80000ef0: 00448493 addi x9,x9,4 + +80000ef4 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b26: + sha256sum0 x26, x26 # perform operation +80000ef4: 100d1d13 sha256sum0 x26,x26 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zknh_sha256sum0_cg_cmp_rd_rs1_b26, Zknh_sha256sum0_cg_cmp_rd_rs1_b26_str) +80000ef8: 000ea203 lw x4,0(x29) +80000efc: 01a20863 beq x4,x26,80000f0c +80000f00: 180012ef jal x5,80002080 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 80005cc1 .word 0x80005cc1 +80000f0c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xa392950b +80000f10: 0004ad83 lw x27,0(x9) +80000f14: 00448493 addi x9,x9,4 + +80000f18 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b27: + sha256sum0 x27, x27 # perform operation +80000f18: 100d9d93 sha256sum0 x27,x27 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zknh_sha256sum0_cg_cmp_rd_rs1_b27, Zknh_sha256sum0_cg_cmp_rd_rs1_b27_str) +80000f1c: 000ea203 lw x4,0(x29) +80000f20: 01b20863 beq x4,x27,80000f30 +80000f24: 15c012ef jal x5,80002080 +80000f28: 80000f18 .word 0x80000f18 +80000f2c: 80005cff .word 0x80005cff +80000f30: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xff8746f5 +80000f34: 0004ae03 lw x28,0(x9) +80000f38: 00448493 addi x9,x9,4 + +80000f3c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b28: + sha256sum0 x28, x28 # perform operation +80000f3c: 100e1e13 sha256sum0 x28,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zknh_sha256sum0_cg_cmp_rd_rs1_b28, Zknh_sha256sum0_cg_cmp_rd_rs1_b28_str) +80000f40: 000ea203 lw x4,0(x29) +80000f44: 01c20863 beq x4,x28,80000f54 +80000f48: 138012ef jal x5,80002080 +80000f4c: 80000f3c .word 0x80000f3c +80000f50: 80005d3d .word 0x80005d3d +80000f54: 004e8e93 addi x29,x29,4 + + mv x10, x29 # switch signature pointer register to avoid conflict with test +80000f58: 000e8513 addi x10,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x808640e0 +80000f5c: 0004ae83 lw x29,0(x9) +80000f60: 00448493 addi x9,x9,4 + +80000f64 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b29: + sha256sum0 x29, x29 # perform operation +80000f64: 100e9e93 sha256sum0 x29,x29 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zknh_sha256sum0_cg_cmp_rd_rs1_b29, Zknh_sha256sum0_cg_cmp_rd_rs1_b29_str) +80000f68: 00052203 lw x4,0(x10) +80000f6c: 01d20863 beq x4,x29,80000f7c +80000f70: 110012ef jal x5,80002080 +80000f74: 80000f64 .word 0x80000f64 +80000f78: 80005d7b .word 0x80005d7b +80000f7c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xf0cb94a7 +80000f80: 0004af03 lw x30,0(x9) +80000f84: 00448493 addi x9,x9,4 + +80000f88 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b30: + sha256sum0 x30, x30 # perform operation +80000f88: 100f1f13 sha256sum0 x30,x30 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha256sum0_cg_cmp_rd_rs1_b30, Zknh_sha256sum0_cg_cmp_rd_rs1_b30_str) +80000f8c: 00052203 lw x4,0(x10) +80000f90: 01e20863 beq x4,x30,80000fa0 +80000f94: 0ec012ef jal x5,80002080 +80000f98: 80000f88 .word 0x80000f88 +80000f9c: 80005db9 .word 0x80005db9 +80000fa0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x4b02245f +80000fa4: 0004af83 lw x31,0(x9) +80000fa8: 00448493 addi x9,x9,4 + +80000fac : +Zknh_sha256sum0_cg_cmp_rd_rs1_b31: + sha256sum0 x31, x31 # perform operation +80000fac: 100f9f93 sha256sum0 x31,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha256sum0_cg_cmp_rd_rs1_b31, Zknh_sha256sum0_cg_cmp_rd_rs1_b31_str) +80000fb0: 00052203 lw x4,0(x10) +80000fb4: 01f20863 beq x4,x31,80000fc4 +80000fb8: 0c8012ef jal x5,80002080 +80000fbc: 80000fac .word 0x80000fac +80000fc0: 80005df7 .word 0x80005df7 +80000fc4: 00450513 addi x10,x10,4 + + mv x2, x10 # restore signature pointer to default register for teardown +80000fc8: 00050113 addi x2,x10,0 + +80000fcc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fcc: 00000513 addi x10,x0,0 +80000fd0: 00000073 ecall +80000fd4: fff00513 addi x10,x0,-1 +80000fd8: 1d800413 addi x8,x0,472 + +80000fdc : +80000fdc: 34002373 csrrs x6,mscratch,x0 + +80000fe0 : +80000fe0: 23832383 lw x7,568(x6) +80000fe4: 23c32483 lw x9,572(x6) + +80000fe8 : +80000fe8: 22032383 lw x7,544(x6) + +80000fec : +80000fec: 25032483 lw x9,592(x6) +80000ff0: 34049073 csrrw x0,mscratch,x9 + +80000ff4 : +80000ff4: 24832483 lw x9,584(x6) +80000ff8: 305493f3 csrrw x7,mtvec,x9 +80000ffc: ffc4f493 andi x9,x9,-4 +80001000: ffc3f393 andi x7,x7,-4 +80001004: 00749e63 bne x9,x7,80001020 + +80001008 : +80001008: 00030493 addi x9,x6,0 + +8000100c : +8000100c: 0004a783 lw x15,0(x9) +80001010: 00f3a023 sw x15,0(x7) +80001014: 00438393 addi x7,x7,4 +80001018: 00448493 addi x9,x9,4 +8000101c: fe83c8e3 blt x7,x8,8000100c +80001020: 0000100f fence.i + +80001024 : +80001024: 00000013 addi x0,x0,0 +80001028: 00000013 addi x0,x0,0 +8000102c: 00000013 addi x0,x0,0 +80001030: 00000013 addi x0,x0,0 +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 44450513 addi x10,x10,1092 # 800064c4 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 44350513 addi x10,x10,1091 # 80006503 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 46350513 addi x10,x10,1123 # 80006563 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: fce50513 addi x10,x10,-50 # 8000710e +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: bb838393 addi x7,x7,-1096 # 80007d78 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: b7040413 addi x8,x8,-1168 # 80007d70 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 800066b7 .word 0x800066b7 + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 80006525 .word 0x80006525 +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 22450513 addi x10,x10,548 # 80006484 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: 22450513 addi x10,x10,548 # 800064c4 +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: ccdff06f jal x0,80000fcc + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cc1ff06f jal x0,80000fcc +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b4430313 addi x6,x6,-1212 # 80001024 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 48550513 addi x10,x10,1157 # 80007b45 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00005517 auipc x10,0x5 +80001704: 8a850513 addi x10,x10,-1880 # 80005fa8 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: e8c50513 addi x10,x10,-372 # 800065cc +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: d4450513 addi x10,x10,-700 # 800064c4 +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 42848493 addi x9,x9,1064 # 80005f88 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: c3c40413 addi x8,x8,-964 # 800167dc +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800066ce .word 0x800066ce +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800067d0 .word 0x800067d0 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800068cb .word 0x800068cb +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 800069be .word 0x800069be +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006b31 .word 0x80006b31 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: dc020213 addi x4,x4,-576 # 80005e40 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: da838393 addi x7,x7,-600 # 80005e40 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: d8068693 addi x13,x13,-640 # 80005e40 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: d5848493 addi x9,x9,-680 # 80005e40 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: cb44a483 lw x9,-844(x9) # 80005e40 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00006417 auipc x8,0x6 +80002244: 95040413 addi x8,x8,-1712 # 80007b90 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 56040413 addi x8,x8,1376 # 800167e0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: ca848493 addi x9,x9,-856 # 80005f68 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: c6848493 addi x9,x9,-920 # 80005f68 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: c4880813 addi x16,x16,-952 # 80005f78 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: c3480813 addi x16,x16,-972 # 80005f78 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 36738393 addi x7,x7,871 # 800066b7 +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: c1080813 addi x16,x16,-1008 # 80005f70 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 36238393 addi x7,x7,866 # 800066ce +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 44c38393 addi x7,x7,1100 # 800067d0 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 52f38393 addi x7,x7,1327 # 800068cb +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 60a38393 addi x7,x7,1546 # 800069be +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 76538393 addi x7,x7,1893 # 80006b31 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 6d138393 addi x7,x7,1745 # 80006ab5 +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 6f738393 addi x7,x7,1783 # 80006af3 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 2fa38393 addi x7,x7,762 # 8000670e +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 3e238393 addi x7,x7,994 # 8000680e +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 4c338393 addi x7,x7,1219 # 80006907 +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 59f38393 addi x7,x7,1439 # 800069fb +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 6f838393 addi x7,x7,1784 # 80006b6c +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 2c238393 addi x7,x7,706 # 8000674e +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 3a838393 addi x7,x7,936 # 8000684c +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 48738393 addi x7,x7,1159 # 80006943 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 56438393 addi x7,x7,1380 # 80006a38 +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 6bb38393 addi x7,x7,1723 # 80006ba7 +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 28b38393 addi x7,x7,651 # 8000678f +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 36f38393 addi x7,x7,879 # 8000688b +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 44c38393 addi x7,x7,1100 # 80006980 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 52a38393 addi x7,x7,1322 # 80006a76 +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 67f38393 addi x7,x7,1663 # 80006be3 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 6a438393 addi x7,x7,1700 # 80006c20 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 6db38393 addi x7,x7,1755 # 80006c6f +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 7be38393 addi x7,x7,1982 # 80006d6a +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00005397 auipc x7,0x5 +800025c8: 8a238393 addi x7,x7,-1886 # 80006e66 +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00004817 auipc x16,0x4 +800025e8: 98c80813 addi x16,x16,-1652 # 80005f70 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00004817 auipc x16,0x4 +800025f8: 97c80813 addi x16,x16,-1668 # 80005f70 +800025fc: 00882023 sw x8,0(x16) +80002600: 00004817 auipc x16,0x4 +80002604: 97480813 addi x16,x16,-1676 # 80005f74 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00004817 auipc x16,0x4 +80002614: 96080813 addi x16,x16,-1696 # 80005f70 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: e6450513 addi x10,x10,-412 # 800064c4 +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: e6350513 addi x10,x10,-413 # 80006503 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: eda50513 addi x10,x10,-294 # 800065ba +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00004517 auipc x10,0x4 +8000270c: 85852503 lw x10,-1960(x10) # 80005f60 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: eac50513 addi x10,x10,-340 # 800065cc +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 6f852503 lw x10,1784(x10) # 80005e40 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: e6e50513 addi x10,x10,-402 # 800065ce +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 7b852503 lw x10,1976(x10) # 80005f40 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 7e850513 addi x10,x10,2024 # 80005fa8 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: de250513 addi x10,x10,-542 # 800065e2 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 72052503 lw x10,1824(x10) # 80005f48 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 76850513 addi x10,x10,1896 # 80005fa8 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 79950513 addi x10,x10,1945 # 80007019 +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 59852503 lw x10,1432(x10) # 80005e40 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 6e860613 addi x12,x12,1768 # 80005fa8 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 65c52503 lw x10,1628(x10) # 80005f44 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00005517 auipc x10,0x5 +80002924: 80f50513 addi x10,x10,-2033 # 8000712f +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 64860613 addi x12,x12,1608 # 80005fa8 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 5bc52503 lw x10,1468(x10) # 80005f44 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 60860613 addi x12,x12,1544 # 80005fa8 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 57c52503 lw x10,1404(x10) # 80005f44 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 63250513 addi x10,x10,1586 # 80007012 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 58850513 addi x10,x10,1416 # 80005fa8 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 5ca50513 addi x10,x10,1482 # 8000702a +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 3b852503 lw x10,952(x10) # 80005e40 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 4b852503 lw x10,1208(x10) # 80005f50 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 4a452503 lw x10,1188(x10) # 80005f50 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 4e850513 addi x10,x10,1256 # 80005fa8 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 48052503 lw x10,1152(x10) # 80005f68 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 54150513 addi x10,x10,1345 # 80007041 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 31852503 lw x10,792(x10) # 80005e40 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 42052503 lw x10,1056(x10) # 80005f58 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 40c52503 lw x10,1036(x10) # 80005f58 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 44850513 addi x10,x10,1096 # 80005fa8 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 4b850513 addi x10,x10,1208 # 80007058 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 39052503 lw x10,912(x10) # 80005f58 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 3c850513 addi x10,x10,968 # 80005fa8 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 49650513 addi x10,x10,1174 # 800070b6 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 31052503 lw x10,784(x10) # 80005f58 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 34850513 addi x10,x10,840 # 80005fa8 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 2e442403 lw x8,740(x8) # 80005f70 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 4bb50513 addi x10,x10,1211 # 8000715b +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 4a750513 addi x10,x10,1191 # 80007187 +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 27080813 addi x16,x16,624 # 80005f78 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00004517 auipc x10,0x4 +80002d24: 8ac50513 addi x10,x10,-1876 # 800065cc +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 43750513 addi x10,x10,1079 # 80007197 +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: 1d052503 lw x10,464(x10) # 80005f58 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: 20850513 addi x10,x10,520 # 80005fa8 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 3e250513 addi x10,x10,994 # 800071c2 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: 14852503 lw x10,328(x10) # 80005f50 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: 18850513 addi x10,x10,392 # 80005fa8 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: 10832303 lw x6,264(x6) # 80005f50 +80002e50: 00003397 auipc x7,0x3 +80002e54: 1083a383 lw x7,264(x7) # 80005f58 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 39150513 addi x10,x10,913 # 800071f1 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 3b950513 addi x10,x10,953 # 80007259 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: 08832303 lw x6,136(x6) # 80005f50 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: 0883a383 lw x7,136(x7) # 80005f58 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: 0a850513 addi x10,x10,168 # 80005fa8 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 34050513 addi x10,x10,832 # 80007280 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 29d50513 addi x10,x10,669 # 8000721d +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 29950513 addi x10,x10,665 # 80007259 +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: f7032303 lw x6,-144(x6) # 80005f58 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: f603a383 lw x7,-160(x7) # 80005f50 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: f8850513 addi x10,x10,-120 # 80005fa8 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 30850513 addi x10,x10,776 # 80007368 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 3af50513 addi x10,x10,943 # 8000744f +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: eac52503 lw x10,-340(x10) # 80005f74 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 38b50513 addi x10,x10,907 # 8000748b +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 32950513 addi x10,x10,809 # 80007469 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 2f150513 addi x10,x10,753 # 80007471 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 2b950513 addi x10,x10,697 # 80007479 +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 28250513 addi x10,x10,642 # 80007482 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 25450513 addi x10,x10,596 # 80007494 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: d0852503 lw x10,-760(x10) # 80005f70 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 32b50513 addi x10,x10,811 # 800075eb +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: 1ae50513 addi x10,x10,430 # 800074ae +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: 19f50513 addi x10,x10,415 # 800074df +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: 17f50513 addi x10,x10,383 # 800074ff +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: 15d50513 addi x10,x10,349 # 8000751d +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: 13c50513 addi x10,x10,316 # 8000753c +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: 12450513 addi x10,x10,292 # 80007564 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: 11050513 addi x10,x10,272 # 80007590 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: 0fc50513 addi x10,x10,252 # 800075bc +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: 0fa50513 addi x10,x10,250 # 800075fa +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: a3052503 lw x10,-1488(x10) # 80005f58 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: a6850513 addi x10,x10,-1432 # 80005fa8 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: 09150513 addi x10,x10,145 # 80007611 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00003517 auipc x10,0x3 +800035ac: 9a852503 lw x10,-1624(x10) # 80005f50 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00003517 auipc x10,0x3 +800035c4: 9e850513 addi x10,x10,-1560 # 80005fa8 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00003517 auipc x10,0x3 +800035ec: 98852503 lw x10,-1656(x10) # 80005f70 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: 02850513 addi x10,x10,40 # 80007628 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00003517 auipc x10,0x3 +8000362c: 93052503 lw x10,-1744(x10) # 80005f58 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: fff50513 addi x10,x10,-1 # 8000763f +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00003517 auipc x10,0x3 +8000366c: 8e852503 lw x10,-1816(x10) # 80005f50 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00003517 auipc x10,0x3 +80003688: 8ec52503 lw x10,-1812(x10) # 80005f70 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: 01550513 addi x10,x10,21 # 800076b5 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: 0ab50513 addi x10,x10,171 # 8000778b +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: 15e50513 addi x10,x10,350 # 8000787e +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: 21950513 addi x10,x10,537 # 80007979 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 2c050513 addi x10,x10,704 # 80007a60 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: e8d50513 addi x10,x10,-371 # 8000766d +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 78062603 lw x12,1920(x12) # 80005f88 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: e3650513 addi x10,x10,-458 # 80006656 +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 72850513 addi x10,x10,1832 # 80005fa8 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 71058593 addi x11,x11,1808 # 80005fd0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 74458593 addi x11,x11,1860 # 80006030 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: b4e50513 addi x10,x10,-1202 # 8000646e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 7ae50513 addi x10,x10,1966 # 8000710e +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 5f060613 addi x12,x12,1520 # 80005f80 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: cd750513 addi x10,x10,-809 # 80006677 +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 5c052503 lw x10,1472(x10) # 80005f88 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 5c850513 addi x10,x10,1480 # 80005fa8 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: c6750513 addi x10,x10,-921 # 80006687 +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 54852503 lw x10,1352(x10) # 80005f90 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 54850513 addi x10,x10,1352 # 80005fa8 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: bf750513 addi x10,x10,-1033 # 80006697 +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 4d052503 lw x10,1232(x10) # 80005f98 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 4c850513 addi x10,x10,1224 # 80005fa8 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: b8750513 addi x10,x10,-1145 # 800066a7 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 45852503 lw x10,1112(x10) # 80005fa0 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 44850513 addi x10,x10,1096 # 80005fa8 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 3f860613 addi x12,x12,1016 # 80005f80 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 40860613 addi x12,x12,1032 # 80005fa8 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f3030313 addi x6,x6,-208 # 80000fcc +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f1830313 addi x6,x6,-232 # 80000fcc +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f0030313 addi x6,x6,-256 # 80000fcc +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: d9c78793 addi x15,x15,-612 # 80000fdc +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 6f010113 addi x2,x2,1776 # 80007b90 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80007137 .word 0x80007137 +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 25828293 addi x5,x5,600 # 80016800 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 23828293 addi x5,x5,568 # 80016800 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha256sum1-00.elf.objdump b/riscv-tests/rv32-Zknh-sha256sum1-00.elf.objdump new file mode 100644 index 0000000..2055c42 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha256sum1-00.elf.objdump @@ -0,0 +1,6268 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sum1-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha256sum1-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000127e0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016800 80016800 00017800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000087c 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 00000000 00000000 00018ef7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f77 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018f9a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fb0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 00000000 00000000 00018fd8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019066 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016800 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccwWI0G4.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b1 +80004597 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b2 +800045ce l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b3 +80004605 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b4 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +8000463c l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b5 +80004673 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b6 +800046aa l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b6_str +80000154 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b7 +800046e1 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b7_str +80000178 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b8 +80004718 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b8_str +8000019c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b9 +8000474f l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b9_str +800001c0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b10 +80004787 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b10_str +800001e4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b11 +800047c0 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b11_str +80000208 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b12 +800047f9 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b12_str +80000234 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b13 +80004832 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b13_str +80000258 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b14 +8000486b l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b14_str +8000027c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b15 +800048a4 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b15_str +800002a0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b16 +800048dd l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b16_str +800002c4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b17 +80004916 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b17_str +800002e8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b18 +8000494f l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b18_str +8000030c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b19 +80004988 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b19_str +80000330 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b20 +800049c1 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b20_str +80000354 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b21 +800049fa l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b21_str +80000378 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b22 +80004a33 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b22_str +800003a0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b23 +80004a6c l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b23_str +800003c4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b24 +80004aa5 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b24_str +800003e8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b25 +80004ade l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b25_str +8000040c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b26 +80004b17 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b26_str +80000430 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b27 +80004b50 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b27_str +80000458 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b28 +80004b89 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b28_str +8000047c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b29 +80004bc2 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b29_str +800004a0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b30 +80004bfb l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b30_str +800004c4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_b31 +80004c34 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_b31_str +800004e8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b0 +80004c6d l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b0_str +8000050c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b1 +80004ca4 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b1_str +80000530 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b2 +80004cdb l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b2_str +80000558 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b3 +80004d12 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b3_str +80000584 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b4 +80004d49 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b4_str +800005a8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b5 +80004d80 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b5_str +800005cc l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b6 +80004db7 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b6_str +800005f0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b7 +80004dee l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b7_str +80000614 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b8 +80004e25 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b8_str +80000638 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b9 +80004e5c l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b9_str +8000065c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b10 +80004e93 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b10_str +80000680 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b11 +80004ecb l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b11_str +800006a4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b12 +80004f03 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b12_str +800006d0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b13 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004f3b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b13_str +800006f4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b14 +80004f73 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b14_str +8000071c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b15 +80004fab l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b15_str +80000740 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b16 +80004fe3 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b16_str +80000764 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b17 +8000501b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b17_str +80000788 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b18 +80005053 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b18_str +800007ac l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b19 +8000508b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b19_str +800007d0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b20 +800050c3 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b20_str +800007f4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b21 +800050fb l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b21_str +80000818 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b22 +80005133 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b22_str +8000083c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b23 +8000516b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b23_str +80000864 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b24 +800051a3 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b24_str +8000088c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b25 +800051db l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b25_str +800008b0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b26 +80005213 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b26_str +800008d4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b27 +8000524b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b27_str +800008f8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b28 +80005283 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b28_str +8000091c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b29 +800052bb l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b29_str +80000940 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b30 +800052f3 l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b30_str +80000968 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rd_b31 +8000532b l .data 00000000 Zknh_sha256sum1_cg_cp_rd_b31_str +8000098c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x0 +80005363 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x0_str +800009b0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x1 +800053a2 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x1_str +800009d4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x2 +800053e1 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x2_str +800009f8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x80000000 +80005420 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x80000000_str +80000a1c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x80000001 +80005466 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x80000001_str +80000a40 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffff +800054ac l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffff_str +80000a64 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffe +800054f2 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffe_str +80000a88 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff +80005538 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff_str +80000aac l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe +8000557e l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe_str +80000ad0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc8872 +800055c4 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc8872_str +80000af4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaa +8000560a l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b18 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x55555555 +80005650 l .data 00000000 Zknh_sha256sum1_cg_cp_rs1_edges_0x55555555_str +80000b3c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b0 +80005696 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b0_str +80000b60 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b1 +800056d2 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b1_str +80000b84 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b2 +8000570e l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b2_str +80000ba8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b3 +8000574a l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b3_str +80000bcc l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b4 +80005786 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b4_str +80000bf0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b5 +800057c2 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b5_str +80000c14 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b6 +800057fe l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b6_str +80000c40 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b7 +8000583a l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b7_str +80000c64 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b8 +80005876 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b8_str +80000c88 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b9 +800058b2 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b9_str +80000cb0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b10 +800058ee l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b10_str +80000cd4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b11 +8000592b l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b11_str +80000cf8 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b12 +80005968 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b12_str +80000d1c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b13 +800059a5 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b13_str +80000d40 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b14 +800059e2 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b14_str +80000d64 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b15 +80005a1f l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b15_str +80000d88 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b16 +80005a5c l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b16_str +80000dac l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b17 +80005a99 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b17_str +80000dd0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b18 +80005ad6 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b18_str +80000df4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b19 +80005b13 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b19_str +80000e18 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b20 +80005b50 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b20_str +80000e3c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b21 +80005b8d l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b21_str +80000e64 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b22 +80005bca l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b22_str +80000e88 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b23 +80005c07 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b23_str +80000eac l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b24 +80005c45 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b24_str +80000ed0 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b25 +80005c83 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b25_str +80000ef4 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b26 +80005cc1 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b26_str +80000f1c l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b27 +80005cff l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b27_str +80000f40 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b28 +80005d3d l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b28_str +80000f64 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b29 +80005d7b l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b29_str +80000f88 l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b30 +80005db9 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b30_str +80000fac l .text.rvtest 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b31 +80005df7 l .data 00000000 Zknh_sha256sum1_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fdc l .text.rvtest 00000000 exit_Mcleanup +80000fe0 l .text.rvtest 00000000 resto_Medeleg +80000fe8 l .text.rvtest 00000000 resto_Msatp +80000fec l .text.rvtest 00000000 resto_Mscratch +80000ff4 l .text.rvtest 00000000 resto_Mxtvec +80001008 l .text.rvtest 00000000 resto_Mtramp +8000100c l .text.rvtest 00000000 resto_Mloop +80001024 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +800064c4 l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +80006503 l .data 00000000 begin_debugstr +80006563 l .data 00000000 trap_sig_overflowstr +8000710e l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007d78 l .data 00000000 trap_sigptr +80007d70 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800066b7 l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +80006525 l .data 00000000 abortstr +80006484 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +80007b45 l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005fa8 l .data 00000000 ascii_buffer +800065cc l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005f88 l .data 00000000 saved_xepc +800167dc l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800066ce l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800067d0 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800068cb l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +800069be l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006b31 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005e40 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005e40 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005f68 l .data 00000000 failure_diag_type +80005f78 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005f70 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +80006ab5 l .data 00000000 sv_Mtval2_str +80006af3 l .data 00000000 sv_Mtinst_str +8000670e l .data 00000000 sv_Svect_str +8000680e l .data 00000000 sv_Scause_str +80006907 l .data 00000000 sv_Sepc_str +800069fb l .data 00000000 sv_Stval_str +80006b6c l .data 00000000 sv_Sip_str +8000674e l .data 00000000 sv_Hvect_str +8000684c l .data 00000000 sv_Hcause_str +80006943 l .data 00000000 sv_Hepc_str +80006a38 l .data 00000000 sv_Htval_str +80006ba7 l .data 00000000 sv_Hip_str +8000678f l .data 00000000 sv_Vvect_str +8000688b l .data 00000000 sv_Vcause_str +80006980 l .data 00000000 sv_Vepc_str +80006a76 l .data 00000000 sv_Vtval_str +80006be3 l .data 00000000 sv_Vip_str +80006c20 l .data 00000000 Mclr_Mext_int_str +80006c6f l .data 00000000 Mclr_Sext_int_str +80006d6a l .data 00000000 Sclr_Sext_int_str +80006e66 l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005f74 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +800065ba l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005f60 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800065ce l .data 00000000 inststr +80005f40 l .data 00000000 failing_instruction +800065e2 l .data 00000000 addrstr +80005f48 l .data 00000000 failing_addr +80007019 l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005f44 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +8000712f l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80007012 l .data 00000000 vxsatstr +8000702a l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005f50 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80007041 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005f58 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80007058 l .data 00000000 failure_diag_bad_instr_str +800070b6 l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +8000715b l .data 00000000 trap_diag_header_str +80007187 l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80007197 l .data 00000000 trap_diag_expected_offset_str +800071c2 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +800071f1 l .data 00000000 trap_diag_extra_traps_str +80007259 l .data 00000000 trap_diag_diff_bytes_str +80007280 l .data 00000000 trap_diag_extra_next_step_str +8000721d l .data 00000000 trap_diag_missing_traps_str +80007368 l .data 00000000 trap_diag_missing_next_step_str +8000744f l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +8000748b l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +80007469 l .data 00000000 trap_diag_mode_m_str +80007471 l .data 00000000 trap_diag_mode_s_str +80007479 l .data 00000000 trap_diag_mode_hs_str +80007482 l .data 00000000 trap_diag_mode_vs_str +80007494 l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800075eb l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +800074ae l .data 00000000 trap_diag_field_vect_str +800074df l .data 00000000 trap_diag_field_cause_str +800074ff l .data 00000000 trap_diag_field_epc_str +8000751d l .data 00000000 trap_diag_field_tval_str +8000753c l .data 00000000 trap_diag_field_ip_str +80007564 l .data 00000000 trap_diag_field_tval2_str +80007590 l .data 00000000 trap_diag_field_tinst_str +800075bc l .data 00000000 trap_diag_field_intid_str +800075fa l .data 00000000 trap_diag_expected_str +80007611 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +80007628 l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +8000763f l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +800076b5 l .data 00000000 trap_diag_hint_vect_str +8000778b l .data 00000000 trap_diag_hint_cause_str +8000787e l .data 00000000 trap_diag_hint_epc_str +80007979 l .data 00000000 trap_diag_hint_tval_str +80007a60 l .data 00000000 trap_diag_hint_ip_str +8000766d l .data 00000000 trap_diag_generic_str +80006656 l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005fd0 l .data 00000000 trap_excpt_name_tbl +80006030 l .data 00000000 trap_int_name_tbl +8000646e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005f80 l .data 00000000 csr_context_ret_addr +80006677 l .data 00000000 mepcstr +80006687 l .data 00000000 mcausestr +80005f90 l .data 00000000 saved_xcause +80006697 l .data 00000000 mtvalstr +80005f98 l .data 00000000 saved_xtval +800066a7 l .data 00000000 mstatusstr +80005fa0 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007b90 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80007137 l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005fd0 l .data 00000000 end_failure_scratch +80006070 l .data 00000000 trap_excpt_name_0 +80006090 l .data 00000000 trap_excpt_name_1 +800060aa l .data 00000000 trap_excpt_name_2 +800060bf l .data 00000000 trap_excpt_name_3 +800060cb l .data 00000000 trap_excpt_name_4 +800060e4 l .data 00000000 trap_excpt_name_5 +800060f7 l .data 00000000 trap_excpt_name_6 +80006115 l .data 00000000 trap_excpt_name_7 +8000612d l .data 00000000 trap_excpt_name_8 +8000614b l .data 00000000 trap_excpt_name_9 +80006169 l .data 00000000 trap_excpt_name_10 +80006188 l .data 00000000 trap_excpt_name_11 +800061a6 l .data 00000000 trap_excpt_name_12 +800061be l .data 00000000 trap_excpt_name_13 +800061cf l .data 00000000 trap_excpt_name_14 +800061de l .data 00000000 trap_excpt_name_15 +800061f4 l .data 00000000 trap_excpt_name_16 +80006201 l .data 00000000 trap_excpt_name_17 +80006210 l .data 00000000 trap_excpt_name_18 +80006220 l .data 00000000 trap_excpt_name_19 +80006230 l .data 00000000 trap_excpt_name_20 +8000624e l .data 00000000 trap_excpt_name_21 +80006265 l .data 00000000 trap_excpt_name_22 +8000627a l .data 00000000 trap_excpt_name_23 +80006296 l .data 00000000 trap_int_name_0 +800062ae l .data 00000000 trap_int_name_1 +800062cd l .data 00000000 trap_int_name_2 +800062f4 l .data 00000000 trap_int_name_3 +80006310 l .data 00000000 trap_int_name_4 +80006328 l .data 00000000 trap_int_name_5 +80006344 l .data 00000000 trap_int_name_6 +80006368 l .data 00000000 trap_int_name_7 +80006381 l .data 00000000 trap_int_name_8 +80006399 l .data 00000000 trap_int_name_9 +800063b8 l .data 00000000 trap_int_name_10 +800063df l .data 00000000 trap_int_name_11 +800063fb l .data 00000000 trap_int_name_12 +80006420 l .data 00000000 trap_int_name_13 +8000643c l .data 00000000 trap_int_name_14 +80006455 l .data 00000000 trap_int_name_15 +80006623 l .data 00000000 xepcstr +80006cc1 l .data 00000000 Mclr_Vext_int_str +80006d1b l .data 00000000 Sclr_Mext_int_str +80006dbc l .data 00000000 Sclr_Vext_int_str +80006e16 l .data 00000000 Hclr_Mext_int_str +80006eb9 l .data 00000000 Hclr_Vext_int_str +80006f14 l .data 00000000 Vclr_Mext_int_str +80006f64 l .data 00000000 Vclr_Sext_int_str +80006fb7 l .data 00000000 Vclr_Vext_int_str +80007656 l .data 00000000 trap_diag_curr_xepc_str +800167e0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800167e0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001024 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007b90 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fcc g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007b90 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +80007b89 g .data 00000000 rvtest_data_end +80000fcc g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016900 g .tohost 00000000 fromhost +80016800 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x2efbcc24 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zknh_sha256sum1_cg_cp_rs1_b0: + sha256sum1 x13, x0 # perform operation +80000048: 10101693 sha256sum1 x13,x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha256sum1_cg_cp_rs1_b0, Zknh_sha256sum1_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 00d20863 beq x4,x13,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xf083df27 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zknh_sha256sum1_cg_cp_rs1_b1: + sha256sum1 x12, x1 # perform operation +8000006c: 10109613 sha256sum1 x12,x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknh_sha256sum1_cg_cp_rs1_b1, Zknh_sha256sum1_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 00c20863 beq x4,x12,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004597 .word 0x80004597 +80000084: 00410113 addi x2,x2,4 + + mv x28, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010e13 addi x28,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xab953c72 +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zknh_sha256sum1_cg_cp_rs1_b2: + sha256sum1 x29, x2 # perform operation +80000094: 10111e93 sha256sum1 x29,x2 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zknh_sha256sum1_cg_cp_rs1_b2, Zknh_sha256sum1_cg_cp_rs1_b2_str) +80000098: 000e2203 lw x4,0(x28) +8000009c: 01d20863 beq x4,x29,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045ce .word 0x800045ce +800000ac: 004e0e13 addi x28,x28,4 + + mv x23, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018b93 addi x23,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xd4aa3ec4 +800000b4: 000ba183 lw x3,0(x23) +800000b8: 004b8b93 addi x23,x23,4 + +800000bc : +Zknh_sha256sum1_cg_cp_rs1_b3: + sha256sum1 x8, x3 # perform operation +800000bc: 10119413 sha256sum1 x8,x3 + # Check if x8 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x8, Zknh_sha256sum1_cg_cp_rs1_b3, Zknh_sha256sum1_cg_cp_rs1_b3_str) +800000c0: 000e2203 lw x4,0(x28) +800000c4: 00820863 beq x4,x8,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 80004605 .word 0x80004605 +800000d4: 004e0e13 addi x28,x28,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000d8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x2fbe06bc +800000e0: 000ba203 lw x4,0(x23) +800000e4: 004b8b93 addi x23,x23,4 + +800000e8 : +Zknh_sha256sum1_cg_cp_rs1_b4: + sha256sum1 x11, x4 # perform operation +800000e8: 10121593 sha256sum1 x11,x4 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zknh_sha256sum1_cg_cp_rs1_b4, Zknh_sha256sum1_cg_cp_rs1_b4_str) +800000ec: 000e2683 lw x13,0(x28) +800000f0: 00b68863 beq x13,x11,80000100 +800000f4: 7cd0176f jal x14,800020c0 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 8000463c .word 0x8000463c +80000100: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0xae97847c +80000104: 000ba283 lw x5,0(x23) +80000108: 004b8b93 addi x23,x23,4 + +8000010c : +Zknh_sha256sum1_cg_cp_rs1_b5: + sha256sum1 x9, x5 # perform operation +8000010c: 10129493 sha256sum1 x9,x5 + # Check if x9 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x9, Zknh_sha256sum1_cg_cp_rs1_b5, Zknh_sha256sum1_cg_cp_rs1_b5_str) +80000110: 000e2683 lw x13,0(x28) +80000114: 00968863 beq x13,x9,80000124 +80000118: 7a90176f jal x14,800020c0 +8000011c: 8000010c .word 0x8000010c +80000120: 80004673 .word 0x80004673 +80000124: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x97354366 +80000128: 000ba303 lw x6,0(x23) +8000012c: 004b8b93 addi x23,x23,4 + +80000130 : +Zknh_sha256sum1_cg_cp_rs1_b6: + sha256sum1 x16, x6 # perform operation +80000130: 10131813 sha256sum1 x16,x6 + # Check if x16 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x16, Zknh_sha256sum1_cg_cp_rs1_b6, Zknh_sha256sum1_cg_cp_rs1_b6_str) +80000134: 000e2683 lw x13,0(x28) +80000138: 01068863 beq x13,x16,80000148 +8000013c: 7850176f jal x14,800020c0 +80000140: 80000130 .word 0x80000130 +80000144: 800046aa .word 0x800046aa +80000148: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xa9fe0665 +8000014c: 000ba383 lw x7,0(x23) +80000150: 004b8b93 addi x23,x23,4 + +80000154 : +Zknh_sha256sum1_cg_cp_rs1_b7: + sha256sum1 x18, x7 # perform operation +80000154: 10139913 sha256sum1 x18,x7 + # Check if x18 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x18, Zknh_sha256sum1_cg_cp_rs1_b7, Zknh_sha256sum1_cg_cp_rs1_b7_str) +80000158: 000e2683 lw x13,0(x28) +8000015c: 01268863 beq x13,x18,8000016c +80000160: 7610176f jal x14,800020c0 +80000164: 80000154 .word 0x80000154 +80000168: 800046e1 .word 0x800046e1 +8000016c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xb7f695ef +80000170: 000ba403 lw x8,0(x23) +80000174: 004b8b93 addi x23,x23,4 + +80000178 : +Zknh_sha256sum1_cg_cp_rs1_b8: + sha256sum1 x29, x8 # perform operation +80000178: 10141e93 sha256sum1 x29,x8 + # Check if x29 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x29, Zknh_sha256sum1_cg_cp_rs1_b8, Zknh_sha256sum1_cg_cp_rs1_b8_str) +8000017c: 000e2683 lw x13,0(x28) +80000180: 01d68863 beq x13,x29,80000190 +80000184: 73d0176f jal x14,800020c0 +80000188: 80000178 .word 0x80000178 +8000018c: 80004718 .word 0x80004718 +80000190: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x8f942bcd +80000194: 000ba483 lw x9,0(x23) +80000198: 004b8b93 addi x23,x23,4 + +8000019c : +Zknh_sha256sum1_cg_cp_rs1_b9: + sha256sum1 x30, x9 # perform operation +8000019c: 10149f13 sha256sum1 x30,x9 + # Check if x30 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x30, Zknh_sha256sum1_cg_cp_rs1_b9, Zknh_sha256sum1_cg_cp_rs1_b9_str) +800001a0: 000e2683 lw x13,0(x28) +800001a4: 01e68863 beq x13,x30,800001b4 +800001a8: 7190176f jal x14,800020c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 8000474f .word 0x8000474f +800001b4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x0c48b23d +800001b8: 000ba503 lw x10,0(x23) +800001bc: 004b8b93 addi x23,x23,4 + +800001c0 : +Zknh_sha256sum1_cg_cp_rs1_b10: + sha256sum1 x29, x10 # perform operation +800001c0: 10151e93 sha256sum1 x29,x10 + # Check if x29 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x29, Zknh_sha256sum1_cg_cp_rs1_b10, Zknh_sha256sum1_cg_cp_rs1_b10_str) +800001c4: 000e2683 lw x13,0(x28) +800001c8: 01d68863 beq x13,x29,800001d8 +800001cc: 6f50176f jal x14,800020c0 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80004787 .word 0x80004787 +800001d8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x142fb99e +800001dc: 000ba583 lw x11,0(x23) +800001e0: 004b8b93 addi x23,x23,4 + +800001e4 : +Zknh_sha256sum1_cg_cp_rs1_b11: + sha256sum1 x19, x11 # perform operation +800001e4: 10159993 sha256sum1 x19,x11 + # Check if x19 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x19, Zknh_sha256sum1_cg_cp_rs1_b11, Zknh_sha256sum1_cg_cp_rs1_b11_str) +800001e8: 000e2683 lw x13,0(x28) +800001ec: 01368863 beq x13,x19,800001fc +800001f0: 6d10176f jal x14,800020c0 +800001f4: 800001e4 .word 0x800001e4 +800001f8: 800047c0 .word 0x800047c0 +800001fc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xc394ebde +80000200: 000ba603 lw x12,0(x23) +80000204: 004b8b93 addi x23,x23,4 + +80000208 : +Zknh_sha256sum1_cg_cp_rs1_b12: + sha256sum1 x26, x12 # perform operation +80000208: 10161d13 sha256sum1 x26,x12 + # Check if x26 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x26, Zknh_sha256sum1_cg_cp_rs1_b12, Zknh_sha256sum1_cg_cp_rs1_b12_str) +8000020c: 000e2683 lw x13,0(x28) +80000210: 01a68863 beq x13,x26,80000220 +80000214: 6ad0176f jal x14,800020c0 +80000218: 80000208 .word 0x80000208 +8000021c: 800047f9 .word 0x800047f9 +80000220: 004e0e13 addi x28,x28,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000224: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000228: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xea5dd23c +8000022c: 000ba683 lw x13,0(x23) +80000230: 004b8b93 addi x23,x23,4 + +80000234 : +Zknh_sha256sum1_cg_cp_rs1_b13: + sha256sum1 x15, x13 # perform operation +80000234: 10169793 sha256sum1 x15,x13 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zknh_sha256sum1_cg_cp_rs1_b13, Zknh_sha256sum1_cg_cp_rs1_b13_str) +80000238: 000e2203 lw x4,0(x28) +8000023c: 00f20863 beq x4,x15,8000024c +80000240: 641012ef jal x5,80002080 +80000244: 80000234 .word 0x80000234 +80000248: 80004832 .word 0x80004832 +8000024c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xdaad9ffb +80000250: 000ba703 lw x14,0(x23) +80000254: 004b8b93 addi x23,x23,4 + +80000258 : +Zknh_sha256sum1_cg_cp_rs1_b14: + sha256sum1 x17, x14 # perform operation +80000258: 10171893 sha256sum1 x17,x14 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zknh_sha256sum1_cg_cp_rs1_b14, Zknh_sha256sum1_cg_cp_rs1_b14_str) +8000025c: 000e2203 lw x4,0(x28) +80000260: 01120863 beq x4,x17,80000270 +80000264: 61d012ef jal x5,80002080 +80000268: 80000258 .word 0x80000258 +8000026c: 8000486b .word 0x8000486b +80000270: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x8f9cf53f +80000274: 000ba783 lw x15,0(x23) +80000278: 004b8b93 addi x23,x23,4 + +8000027c : +Zknh_sha256sum1_cg_cp_rs1_b15: + sha256sum1 x27, x15 # perform operation +8000027c: 10179d93 sha256sum1 x27,x15 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zknh_sha256sum1_cg_cp_rs1_b15, Zknh_sha256sum1_cg_cp_rs1_b15_str) +80000280: 000e2203 lw x4,0(x28) +80000284: 01b20863 beq x4,x27,80000294 +80000288: 5f9012ef jal x5,80002080 +8000028c: 8000027c .word 0x8000027c +80000290: 800048a4 .word 0x800048a4 +80000294: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xc35faae0 +80000298: 000ba803 lw x16,0(x23) +8000029c: 004b8b93 addi x23,x23,4 + +800002a0 : +Zknh_sha256sum1_cg_cp_rs1_b16: + sha256sum1 x20, x16 # perform operation +800002a0: 10181a13 sha256sum1 x20,x16 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknh_sha256sum1_cg_cp_rs1_b16, Zknh_sha256sum1_cg_cp_rs1_b16_str) +800002a4: 000e2203 lw x4,0(x28) +800002a8: 01420863 beq x4,x20,800002b8 +800002ac: 5d5012ef jal x5,80002080 +800002b0: 800002a0 .word 0x800002a0 +800002b4: 800048dd .word 0x800048dd +800002b8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xc9e424ad +800002bc: 000ba883 lw x17,0(x23) +800002c0: 004b8b93 addi x23,x23,4 + +800002c4 : +Zknh_sha256sum1_cg_cp_rs1_b17: + sha256sum1 x29, x17 # perform operation +800002c4: 10189e93 sha256sum1 x29,x17 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zknh_sha256sum1_cg_cp_rs1_b17, Zknh_sha256sum1_cg_cp_rs1_b17_str) +800002c8: 000e2203 lw x4,0(x28) +800002cc: 01d20863 beq x4,x29,800002dc +800002d0: 5b1012ef jal x5,80002080 +800002d4: 800002c4 .word 0x800002c4 +800002d8: 80004916 .word 0x80004916 +800002dc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x5addf17e +800002e0: 000ba903 lw x18,0(x23) +800002e4: 004b8b93 addi x23,x23,4 + +800002e8 : +Zknh_sha256sum1_cg_cp_rs1_b18: + sha256sum1 x27, x18 # perform operation +800002e8: 10191d93 sha256sum1 x27,x18 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zknh_sha256sum1_cg_cp_rs1_b18, Zknh_sha256sum1_cg_cp_rs1_b18_str) +800002ec: 000e2203 lw x4,0(x28) +800002f0: 01b20863 beq x4,x27,80000300 +800002f4: 58d012ef jal x5,80002080 +800002f8: 800002e8 .word 0x800002e8 +800002fc: 8000494f .word 0x8000494f +80000300: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x1762ddd0 +80000304: 000ba983 lw x19,0(x23) +80000308: 004b8b93 addi x23,x23,4 + +8000030c : +Zknh_sha256sum1_cg_cp_rs1_b19: + sha256sum1 x9, x19 # perform operation +8000030c: 10199493 sha256sum1 x9,x19 + # Check if x9 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x9, Zknh_sha256sum1_cg_cp_rs1_b19, Zknh_sha256sum1_cg_cp_rs1_b19_str) +80000310: 000e2203 lw x4,0(x28) +80000314: 00920863 beq x4,x9,80000324 +80000318: 569012ef jal x5,80002080 +8000031c: 8000030c .word 0x8000030c +80000320: 80004988 .word 0x80004988 +80000324: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x37dada0b +80000328: 000baa03 lw x20,0(x23) +8000032c: 004b8b93 addi x23,x23,4 + +80000330 : +Zknh_sha256sum1_cg_cp_rs1_b20: + sha256sum1 x31, x20 # perform operation +80000330: 101a1f93 sha256sum1 x31,x20 + # Check if x31 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x31, Zknh_sha256sum1_cg_cp_rs1_b20, Zknh_sha256sum1_cg_cp_rs1_b20_str) +80000334: 000e2203 lw x4,0(x28) +80000338: 01f20863 beq x4,x31,80000348 +8000033c: 545012ef jal x5,80002080 +80000340: 80000330 .word 0x80000330 +80000344: 800049c1 .word 0x800049c1 +80000348: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x7d235930 +8000034c: 000baa83 lw x21,0(x23) +80000350: 004b8b93 addi x23,x23,4 + +80000354 : +Zknh_sha256sum1_cg_cp_rs1_b21: + sha256sum1 x15, x21 # perform operation +80000354: 101a9793 sha256sum1 x15,x21 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zknh_sha256sum1_cg_cp_rs1_b21, Zknh_sha256sum1_cg_cp_rs1_b21_str) +80000358: 000e2203 lw x4,0(x28) +8000035c: 00f20863 beq x4,x15,8000036c +80000360: 521012ef jal x5,80002080 +80000364: 80000354 .word 0x80000354 +80000368: 800049fa .word 0x800049fa +8000036c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xb2a2fcb9 +80000370: 000bab03 lw x22,0(x23) +80000374: 004b8b93 addi x23,x23,4 + +80000378 : +Zknh_sha256sum1_cg_cp_rs1_b22: + sha256sum1 x24, x22 # perform operation +80000378: 101b1c13 sha256sum1 x24,x22 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zknh_sha256sum1_cg_cp_rs1_b22, Zknh_sha256sum1_cg_cp_rs1_b22_str) +8000037c: 000e2203 lw x4,0(x28) +80000380: 01820863 beq x4,x24,80000390 +80000384: 4fd012ef jal x5,80002080 +80000388: 80000378 .word 0x80000378 +8000038c: 80004a33 .word 0x80004a33 +80000390: 004e0e13 addi x28,x28,4 + + mv x3, x23 # switch data pointer register to avoid conflict with test +80000394: 000b8193 addi x3,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xa8a776ae +80000398: 0001ab83 lw x23,0(x3) +8000039c: 00418193 addi x3,x3,4 + +800003a0 : +Zknh_sha256sum1_cg_cp_rs1_b23: + sha256sum1 x6, x23 # perform operation +800003a0: 101b9313 sha256sum1 x6,x23 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zknh_sha256sum1_cg_cp_rs1_b23, Zknh_sha256sum1_cg_cp_rs1_b23_str) +800003a4: 000e2203 lw x4,0(x28) +800003a8: 00620863 beq x4,x6,800003b8 +800003ac: 4d5012ef jal x5,80002080 +800003b0: 800003a0 .word 0x800003a0 +800003b4: 80004a6c .word 0x80004a6c +800003b8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x14d4411b +800003bc: 0001ac03 lw x24,0(x3) +800003c0: 00418193 addi x3,x3,4 + +800003c4 : +Zknh_sha256sum1_cg_cp_rs1_b24: + sha256sum1 x25, x24 # perform operation +800003c4: 101c1c93 sha256sum1 x25,x24 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zknh_sha256sum1_cg_cp_rs1_b24, Zknh_sha256sum1_cg_cp_rs1_b24_str) +800003c8: 000e2203 lw x4,0(x28) +800003cc: 01920863 beq x4,x25,800003dc +800003d0: 4b1012ef jal x5,80002080 +800003d4: 800003c4 .word 0x800003c4 +800003d8: 80004aa5 .word 0x80004aa5 +800003dc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x0cb938f2 +800003e0: 0001ac83 lw x25,0(x3) +800003e4: 00418193 addi x3,x3,4 + +800003e8 : +Zknh_sha256sum1_cg_cp_rs1_b25: + sha256sum1 x14, x25 # perform operation +800003e8: 101c9713 sha256sum1 x14,x25 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zknh_sha256sum1_cg_cp_rs1_b25, Zknh_sha256sum1_cg_cp_rs1_b25_str) +800003ec: 000e2203 lw x4,0(x28) +800003f0: 00e20863 beq x4,x14,80000400 +800003f4: 48d012ef jal x5,80002080 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 80004ade .word 0x80004ade +80000400: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x352ed2ed +80000404: 0001ad03 lw x26,0(x3) +80000408: 00418193 addi x3,x3,4 + +8000040c : +Zknh_sha256sum1_cg_cp_rs1_b26: + sha256sum1 x22, x26 # perform operation +8000040c: 101d1b13 sha256sum1 x22,x26 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zknh_sha256sum1_cg_cp_rs1_b26, Zknh_sha256sum1_cg_cp_rs1_b26_str) +80000410: 000e2203 lw x4,0(x28) +80000414: 01620863 beq x4,x22,80000424 +80000418: 469012ef jal x5,80002080 +8000041c: 8000040c .word 0x8000040c +80000420: 80004b17 .word 0x80004b17 +80000424: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x55086358 +80000428: 0001ad83 lw x27,0(x3) +8000042c: 00418193 addi x3,x3,4 + +80000430 : +Zknh_sha256sum1_cg_cp_rs1_b27: + sha256sum1 x31, x27 # perform operation +80000430: 101d9f93 sha256sum1 x31,x27 + # Check if x31 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x31, Zknh_sha256sum1_cg_cp_rs1_b27, Zknh_sha256sum1_cg_cp_rs1_b27_str) +80000434: 000e2203 lw x4,0(x28) +80000438: 01f20863 beq x4,x31,80000448 +8000043c: 445012ef jal x5,80002080 +80000440: 80000430 .word 0x80000430 +80000444: 80004b50 .word 0x80004b50 +80000448: 004e0e13 addi x28,x28,4 + + mv x15, x28 # switch signature pointer register to avoid conflict with test +8000044c: 000e0793 addi x15,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x674f2251 +80000450: 0001ae03 lw x28,0(x3) +80000454: 00418193 addi x3,x3,4 + +80000458 : +Zknh_sha256sum1_cg_cp_rs1_b28: + sha256sum1 x8, x28 # perform operation +80000458: 101e1413 sha256sum1 x8,x28 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha256sum1_cg_cp_rs1_b28, Zknh_sha256sum1_cg_cp_rs1_b28_str) +8000045c: 0007a203 lw x4,0(x15) +80000460: 00820863 beq x4,x8,80000470 +80000464: 41d012ef jal x5,80002080 +80000468: 80000458 .word 0x80000458 +8000046c: 80004b89 .word 0x80004b89 +80000470: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x12781654 +80000474: 0001ae83 lw x29,0(x3) +80000478: 00418193 addi x3,x3,4 + +8000047c : +Zknh_sha256sum1_cg_cp_rs1_b29: + sha256sum1 x21, x29 # perform operation +8000047c: 101e9a93 sha256sum1 x21,x29 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha256sum1_cg_cp_rs1_b29, Zknh_sha256sum1_cg_cp_rs1_b29_str) +80000480: 0007a203 lw x4,0(x15) +80000484: 01520863 beq x4,x21,80000494 +80000488: 3f9012ef jal x5,80002080 +8000048c: 8000047c .word 0x8000047c +80000490: 80004bc2 .word 0x80004bc2 +80000494: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x9f110d2b +80000498: 0001af03 lw x30,0(x3) +8000049c: 00418193 addi x3,x3,4 + +800004a0 : +Zknh_sha256sum1_cg_cp_rs1_b30: + sha256sum1 x29, x30 # perform operation +800004a0: 101f1e93 sha256sum1 x29,x30 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha256sum1_cg_cp_rs1_b30, Zknh_sha256sum1_cg_cp_rs1_b30_str) +800004a4: 0007a203 lw x4,0(x15) +800004a8: 01d20863 beq x4,x29,800004b8 +800004ac: 3d5012ef jal x5,80002080 +800004b0: 800004a0 .word 0x800004a0 +800004b4: 80004bfb .word 0x80004bfb +800004b8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x51fd1606 +800004bc: 0001af83 lw x31,0(x3) +800004c0: 00418193 addi x3,x3,4 + +800004c4 : +Zknh_sha256sum1_cg_cp_rs1_b31: + sha256sum1 x16, x31 # perform operation +800004c4: 101f9813 sha256sum1 x16,x31 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknh_sha256sum1_cg_cp_rs1_b31, Zknh_sha256sum1_cg_cp_rs1_b31_str) +800004c8: 0007a203 lw x4,0(x15) +800004cc: 01020863 beq x4,x16,800004dc +800004d0: 3b1012ef jal x5,80002080 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 80004c34 .word 0x80004c34 +800004dc: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x7ef577c5 +800004e0: 0001a803 lw x16,0(x3) +800004e4: 00418193 addi x3,x3,4 + +800004e8 : +Zknh_sha256sum1_cg_cp_rd_b0: + sha256sum1 x0, x16 # perform operation +800004e8: 10181013 sha256sum1 x0,x16 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zknh_sha256sum1_cg_cp_rd_b0, Zknh_sha256sum1_cg_cp_rd_b0_str) +800004ec: 0007a203 lw x4,0(x15) +800004f0: 00020863 beq x4,x0,80000500 +800004f4: 38d012ef jal x5,80002080 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 80004c6d .word 0x80004c6d +80000500: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xb7fdda24 +80000504: 0001a103 lw x2,0(x3) +80000508: 00418193 addi x3,x3,4 + +8000050c : +Zknh_sha256sum1_cg_cp_rd_b1: + sha256sum1 x1, x2 # perform operation +8000050c: 10111093 sha256sum1 x1,x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha256sum1_cg_cp_rd_b1, Zknh_sha256sum1_cg_cp_rd_b1_str) +80000510: 0007a203 lw x4,0(x15) +80000514: 00120863 beq x4,x1,80000524 +80000518: 369012ef jal x5,80002080 +8000051c: 8000050c .word 0x8000050c +80000520: 80004ca4 .word 0x80004ca4 +80000524: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xe7a408a9 +80000528: 0001a583 lw x11,0(x3) +8000052c: 00418193 addi x3,x3,4 + +80000530 : +Zknh_sha256sum1_cg_cp_rd_b2: + sha256sum1 x2, x11 # perform operation +80000530: 10159113 sha256sum1 x2,x11 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha256sum1_cg_cp_rd_b2, Zknh_sha256sum1_cg_cp_rd_b2_str) +80000534: 0007a203 lw x4,0(x15) +80000538: 00220863 beq x4,x2,80000548 +8000053c: 345012ef jal x5,80002080 +80000540: 80000530 .word 0x80000530 +80000544: 80004cdb .word 0x80004cdb +80000548: 00478793 addi x15,x15,4 + + mv x24, x3 # switch data pointer register to avoid conflict with test +8000054c: 00018c13 addi x24,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0xf5b2da3d +80000550: 000c2083 lw x1,0(x24) +80000554: 004c0c13 addi x24,x24,4 + +80000558 : +Zknh_sha256sum1_cg_cp_rd_b3: + sha256sum1 x3, x1 # perform operation +80000558: 10109193 sha256sum1 x3,x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha256sum1_cg_cp_rd_b3, Zknh_sha256sum1_cg_cp_rd_b3_str) +8000055c: 0007a203 lw x4,0(x15) +80000560: 00320863 beq x4,x3,80000570 +80000564: 31d012ef jal x5,80002080 +80000568: 80000558 .word 0x80000558 +8000056c: 80004d12 .word 0x80004d12 +80000570: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000574: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000578: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0xa0925402 +8000057c: 000c2503 lw x10,0(x24) +80000580: 004c0c13 addi x24,x24,4 + +80000584 : +Zknh_sha256sum1_cg_cp_rd_b4: + sha256sum1 x4, x10 # perform operation +80000584: 10151213 sha256sum1 x4,x10 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zknh_sha256sum1_cg_cp_rd_b4, Zknh_sha256sum1_cg_cp_rd_b4_str) +80000588: 0007a683 lw x13,0(x15) +8000058c: 00468863 beq x13,x4,8000059c +80000590: 3310176f jal x14,800020c0 +80000594: 80000584 .word 0x80000584 +80000598: 80004d49 .word 0x80004d49 +8000059c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x475896a5 +800005a0: 000c2483 lw x9,0(x24) +800005a4: 004c0c13 addi x24,x24,4 + +800005a8 : +Zknh_sha256sum1_cg_cp_rd_b5: + sha256sum1 x5, x9 # perform operation +800005a8: 10149293 sha256sum1 x5,x9 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zknh_sha256sum1_cg_cp_rd_b5, Zknh_sha256sum1_cg_cp_rd_b5_str) +800005ac: 0007a683 lw x13,0(x15) +800005b0: 00568863 beq x13,x5,800005c0 +800005b4: 30d0176f jal x14,800020c0 +800005b8: 800005a8 .word 0x800005a8 +800005bc: 80004d80 .word 0x80004d80 +800005c0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x5af7c3cf +800005c4: 000c2f03 lw x30,0(x24) +800005c8: 004c0c13 addi x24,x24,4 + +800005cc : +Zknh_sha256sum1_cg_cp_rd_b6: + sha256sum1 x6, x30 # perform operation +800005cc: 101f1313 sha256sum1 x6,x30 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zknh_sha256sum1_cg_cp_rd_b6, Zknh_sha256sum1_cg_cp_rd_b6_str) +800005d0: 0007a683 lw x13,0(x15) +800005d4: 00668863 beq x13,x6,800005e4 +800005d8: 2e90176f jal x14,800020c0 +800005dc: 800005cc .word 0x800005cc +800005e0: 80004db7 .word 0x80004db7 +800005e4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xa70b7628 +800005e8: 000c2f83 lw x31,0(x24) +800005ec: 004c0c13 addi x24,x24,4 + +800005f0 : +Zknh_sha256sum1_cg_cp_rd_b7: + sha256sum1 x7, x31 # perform operation +800005f0: 101f9393 sha256sum1 x7,x31 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zknh_sha256sum1_cg_cp_rd_b7, Zknh_sha256sum1_cg_cp_rd_b7_str) +800005f4: 0007a683 lw x13,0(x15) +800005f8: 00768863 beq x13,x7,80000608 +800005fc: 2c50176f jal x14,800020c0 +80000600: 800005f0 .word 0x800005f0 +80000604: 80004dee .word 0x80004dee +80000608: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xe475446d +8000060c: 000c2603 lw x12,0(x24) +80000610: 004c0c13 addi x24,x24,4 + +80000614 : +Zknh_sha256sum1_cg_cp_rd_b8: + sha256sum1 x8, x12 # perform operation +80000614: 10161413 sha256sum1 x8,x12 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zknh_sha256sum1_cg_cp_rd_b8, Zknh_sha256sum1_cg_cp_rd_b8_str) +80000618: 0007a683 lw x13,0(x15) +8000061c: 00868863 beq x13,x8,8000062c +80000620: 2a10176f jal x14,800020c0 +80000624: 80000614 .word 0x80000614 +80000628: 80004e25 .word 0x80004e25 +8000062c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xa12c47ab +80000630: 000c2803 lw x16,0(x24) +80000634: 004c0c13 addi x24,x24,4 + +80000638 : +Zknh_sha256sum1_cg_cp_rd_b9: + sha256sum1 x9, x16 # perform operation +80000638: 10181493 sha256sum1 x9,x16 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zknh_sha256sum1_cg_cp_rd_b9, Zknh_sha256sum1_cg_cp_rd_b9_str) +8000063c: 0007a683 lw x13,0(x15) +80000640: 00968863 beq x13,x9,80000650 +80000644: 27d0176f jal x14,800020c0 +80000648: 80000638 .word 0x80000638 +8000064c: 80004e5c .word 0x80004e5c +80000650: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x6e918305 +80000654: 000c2a83 lw x21,0(x24) +80000658: 004c0c13 addi x24,x24,4 + +8000065c : +Zknh_sha256sum1_cg_cp_rd_b10: + sha256sum1 x10, x21 # perform operation +8000065c: 101a9513 sha256sum1 x10,x21 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zknh_sha256sum1_cg_cp_rd_b10, Zknh_sha256sum1_cg_cp_rd_b10_str) +80000660: 0007a683 lw x13,0(x15) +80000664: 00a68863 beq x13,x10,80000674 +80000668: 2590176f jal x14,800020c0 +8000066c: 8000065c .word 0x8000065c +80000670: 80004e93 .word 0x80004e93 +80000674: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0xf620eb95 +80000678: 000c2c83 lw x25,0(x24) +8000067c: 004c0c13 addi x24,x24,4 + +80000680 : +Zknh_sha256sum1_cg_cp_rd_b11: + sha256sum1 x11, x25 # perform operation +80000680: 101c9593 sha256sum1 x11,x25 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zknh_sha256sum1_cg_cp_rd_b11, Zknh_sha256sum1_cg_cp_rd_b11_str) +80000684: 0007a683 lw x13,0(x15) +80000688: 00b68863 beq x13,x11,80000698 +8000068c: 2350176f jal x14,800020c0 +80000690: 80000680 .word 0x80000680 +80000694: 80004ecb .word 0x80004ecb +80000698: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xdfb4ced6 +8000069c: 000c2f83 lw x31,0(x24) +800006a0: 004c0c13 addi x24,x24,4 + +800006a4 : +Zknh_sha256sum1_cg_cp_rd_b12: + sha256sum1 x12, x31 # perform operation +800006a4: 101f9613 sha256sum1 x12,x31 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zknh_sha256sum1_cg_cp_rd_b12, Zknh_sha256sum1_cg_cp_rd_b12_str) +800006a8: 0007a683 lw x13,0(x15) +800006ac: 00c68863 beq x13,x12,800006bc +800006b0: 2110176f jal x14,800020c0 +800006b4: 800006a4 .word 0x800006a4 +800006b8: 80004f03 .word 0x80004f03 +800006bc: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800006c0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800006c4: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x828f5b2e +800006c8: 000c2503 lw x10,0(x24) +800006cc: 004c0c13 addi x24,x24,4 + +800006d0 : +Zknh_sha256sum1_cg_cp_rd_b13: + sha256sum1 x13, x10 # perform operation +800006d0: 10151693 sha256sum1 x13,x10 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha256sum1_cg_cp_rd_b13, Zknh_sha256sum1_cg_cp_rd_b13_str) +800006d4: 0007a383 lw x7,0(x15) +800006d8: 00d38863 beq x7,x13,800006e8 +800006dc: 1bd0146f jal x8,80002098 +800006e0: 800006d0 .word 0x800006d0 +800006e4: 80004f3b .word 0x80004f3b +800006e8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x2e60a9b0 +800006ec: 000c2583 lw x11,0(x24) +800006f0: 004c0c13 addi x24,x24,4 + +800006f4 : +Zknh_sha256sum1_cg_cp_rd_b14: + sha256sum1 x14, x11 # perform operation +800006f4: 10159713 sha256sum1 x14,x11 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha256sum1_cg_cp_rd_b14, Zknh_sha256sum1_cg_cp_rd_b14_str) +800006f8: 0007a383 lw x7,0(x15) +800006fc: 00e38863 beq x7,x14,8000070c +80000700: 1990146f jal x8,80002098 +80000704: 800006f4 .word 0x800006f4 +80000708: 80004f73 .word 0x80004f73 +8000070c: 00478793 addi x15,x15,4 + + mv x25, x15 # switch signature pointer register to avoid conflict with test +80000710: 00078c93 addi x25,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x9e7c3dc6 +80000714: 000c2103 lw x2,0(x24) +80000718: 004c0c13 addi x24,x24,4 + +8000071c : +Zknh_sha256sum1_cg_cp_rd_b15: + sha256sum1 x15, x2 # perform operation +8000071c: 10111793 sha256sum1 x15,x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zknh_sha256sum1_cg_cp_rd_b15, Zknh_sha256sum1_cg_cp_rd_b15_str) +80000720: 000ca383 lw x7,0(x25) +80000724: 00f38863 beq x7,x15,80000734 +80000728: 1710146f jal x8,80002098 +8000072c: 8000071c .word 0x8000071c +80000730: 80004fab .word 0x80004fab +80000734: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x4af8d65f +80000738: 000c2303 lw x6,0(x24) +8000073c: 004c0c13 addi x24,x24,4 + +80000740 : +Zknh_sha256sum1_cg_cp_rd_b16: + sha256sum1 x16, x6 # perform operation +80000740: 10131813 sha256sum1 x16,x6 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknh_sha256sum1_cg_cp_rd_b16, Zknh_sha256sum1_cg_cp_rd_b16_str) +80000744: 000ca383 lw x7,0(x25) +80000748: 01038863 beq x7,x16,80000758 +8000074c: 14d0146f jal x8,80002098 +80000750: 80000740 .word 0x80000740 +80000754: 80004fe3 .word 0x80004fe3 +80000758: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x68e9c588 +8000075c: 000c2f03 lw x30,0(x24) +80000760: 004c0c13 addi x24,x24,4 + +80000764 : +Zknh_sha256sum1_cg_cp_rd_b17: + sha256sum1 x17, x30 # perform operation +80000764: 101f1893 sha256sum1 x17,x30 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zknh_sha256sum1_cg_cp_rd_b17, Zknh_sha256sum1_cg_cp_rd_b17_str) +80000768: 000ca383 lw x7,0(x25) +8000076c: 01138863 beq x7,x17,8000077c +80000770: 1290146f jal x8,80002098 +80000774: 80000764 .word 0x80000764 +80000778: 8000501b .word 0x8000501b +8000077c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xe1f247c6 +80000780: 000c2783 lw x15,0(x24) +80000784: 004c0c13 addi x24,x24,4 + +80000788 : +Zknh_sha256sum1_cg_cp_rd_b18: + sha256sum1 x18, x15 # perform operation +80000788: 10179913 sha256sum1 x18,x15 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zknh_sha256sum1_cg_cp_rd_b18, Zknh_sha256sum1_cg_cp_rd_b18_str) +8000078c: 000ca383 lw x7,0(x25) +80000790: 01238863 beq x7,x18,800007a0 +80000794: 1050146f jal x8,80002098 +80000798: 80000788 .word 0x80000788 +8000079c: 80005053 .word 0x80005053 +800007a0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x920cd611 +800007a4: 000c2083 lw x1,0(x24) +800007a8: 004c0c13 addi x24,x24,4 + +800007ac : +Zknh_sha256sum1_cg_cp_rd_b19: + sha256sum1 x19, x1 # perform operation +800007ac: 10109993 sha256sum1 x19,x1 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zknh_sha256sum1_cg_cp_rd_b19, Zknh_sha256sum1_cg_cp_rd_b19_str) +800007b0: 000ca383 lw x7,0(x25) +800007b4: 01338863 beq x7,x19,800007c4 +800007b8: 0e10146f jal x8,80002098 +800007bc: 800007ac .word 0x800007ac +800007c0: 8000508b .word 0x8000508b +800007c4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x8e9ce929 +800007c8: 000c2b83 lw x23,0(x24) +800007cc: 004c0c13 addi x24,x24,4 + +800007d0 : +Zknh_sha256sum1_cg_cp_rd_b20: + sha256sum1 x20, x23 # perform operation +800007d0: 101b9a13 sha256sum1 x20,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zknh_sha256sum1_cg_cp_rd_b20, Zknh_sha256sum1_cg_cp_rd_b20_str) +800007d4: 000ca383 lw x7,0(x25) +800007d8: 01438863 beq x7,x20,800007e8 +800007dc: 0bd0146f jal x8,80002098 +800007e0: 800007d0 .word 0x800007d0 +800007e4: 800050c3 .word 0x800050c3 +800007e8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x6181231e +800007ec: 000c2503 lw x10,0(x24) +800007f0: 004c0c13 addi x24,x24,4 + +800007f4 : +Zknh_sha256sum1_cg_cp_rd_b21: + sha256sum1 x21, x10 # perform operation +800007f4: 10151a93 sha256sum1 x21,x10 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zknh_sha256sum1_cg_cp_rd_b21, Zknh_sha256sum1_cg_cp_rd_b21_str) +800007f8: 000ca383 lw x7,0(x25) +800007fc: 01538863 beq x7,x21,8000080c +80000800: 0990146f jal x8,80002098 +80000804: 800007f4 .word 0x800007f4 +80000808: 800050fb .word 0x800050fb +8000080c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x746f1542 +80000810: 000c2003 lw x0,0(x24) +80000814: 004c0c13 addi x24,x24,4 + +80000818 : +Zknh_sha256sum1_cg_cp_rd_b22: + sha256sum1 x22, x0 # perform operation +80000818: 10101b13 sha256sum1 x22,x0 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zknh_sha256sum1_cg_cp_rd_b22, Zknh_sha256sum1_cg_cp_rd_b22_str) +8000081c: 000ca383 lw x7,0(x25) +80000820: 01638863 beq x7,x22,80000830 +80000824: 0750146f jal x8,80002098 +80000828: 80000818 .word 0x80000818 +8000082c: 80005133 .word 0x80005133 +80000830: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x83dba9e4 +80000834: 000c2183 lw x3,0(x24) +80000838: 004c0c13 addi x24,x24,4 + +8000083c : +Zknh_sha256sum1_cg_cp_rd_b23: + sha256sum1 x23, x3 # perform operation +8000083c: 10119b93 sha256sum1 x23,x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zknh_sha256sum1_cg_cp_rd_b23, Zknh_sha256sum1_cg_cp_rd_b23_str) +80000840: 000ca383 lw x7,0(x25) +80000844: 01738863 beq x7,x23,80000854 +80000848: 0510146f jal x8,80002098 +8000084c: 8000083c .word 0x8000083c +80000850: 8000516b .word 0x8000516b +80000854: 004c8c93 addi x25,x25,4 + + mv x22, x24 # switch data pointer register to avoid conflict with test +80000858: 000c0b13 addi x22,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x036b0e1d +8000085c: 000b2083 lw x1,0(x22) +80000860: 004b0b13 addi x22,x22,4 + +80000864 : +Zknh_sha256sum1_cg_cp_rd_b24: + sha256sum1 x24, x1 # perform operation +80000864: 10109c13 sha256sum1 x24,x1 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zknh_sha256sum1_cg_cp_rd_b24, Zknh_sha256sum1_cg_cp_rd_b24_str) +80000868: 000ca383 lw x7,0(x25) +8000086c: 01838863 beq x7,x24,8000087c +80000870: 0290146f jal x8,80002098 +80000874: 80000864 .word 0x80000864 +80000878: 800051a3 .word 0x800051a3 +8000087c: 004c8c93 addi x25,x25,4 + + mv x31, x25 # switch signature pointer register to avoid conflict with test +80000880: 000c8f93 addi x31,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x49ac49c1 +80000884: 000b2e83 lw x29,0(x22) +80000888: 004b0b13 addi x22,x22,4 + +8000088c : +Zknh_sha256sum1_cg_cp_rd_b25: + sha256sum1 x25, x29 # perform operation +8000088c: 101e9c93 sha256sum1 x25,x29 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zknh_sha256sum1_cg_cp_rd_b25, Zknh_sha256sum1_cg_cp_rd_b25_str) +80000890: 000fa383 lw x7,0(x31) +80000894: 01938863 beq x7,x25,800008a4 +80000898: 0010146f jal x8,80002098 +8000089c: 8000088c .word 0x8000088c +800008a0: 800051db .word 0x800051db +800008a4: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x048430dc +800008a8: 000b2783 lw x15,0(x22) +800008ac: 004b0b13 addi x22,x22,4 + +800008b0 : +Zknh_sha256sum1_cg_cp_rd_b26: + sha256sum1 x26, x15 # perform operation +800008b0: 10179d13 sha256sum1 x26,x15 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zknh_sha256sum1_cg_cp_rd_b26, Zknh_sha256sum1_cg_cp_rd_b26_str) +800008b4: 000fa383 lw x7,0(x31) +800008b8: 01a38863 beq x7,x26,800008c8 +800008bc: 7dc0146f jal x8,80002098 +800008c0: 800008b0 .word 0x800008b0 +800008c4: 80005213 .word 0x80005213 +800008c8: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x4fd83be4 +800008cc: 000b2903 lw x18,0(x22) +800008d0: 004b0b13 addi x22,x22,4 + +800008d4 : +Zknh_sha256sum1_cg_cp_rd_b27: + sha256sum1 x27, x18 # perform operation +800008d4: 10191d93 sha256sum1 x27,x18 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zknh_sha256sum1_cg_cp_rd_b27, Zknh_sha256sum1_cg_cp_rd_b27_str) +800008d8: 000fa383 lw x7,0(x31) +800008dc: 01b38863 beq x7,x27,800008ec +800008e0: 7b80146f jal x8,80002098 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 8000524b .word 0x8000524b +800008ec: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x9feb40e8 +800008f0: 000b2a83 lw x21,0(x22) +800008f4: 004b0b13 addi x22,x22,4 + +800008f8 : +Zknh_sha256sum1_cg_cp_rd_b28: + sha256sum1 x28, x21 # perform operation +800008f8: 101a9e13 sha256sum1 x28,x21 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zknh_sha256sum1_cg_cp_rd_b28, Zknh_sha256sum1_cg_cp_rd_b28_str) +800008fc: 000fa383 lw x7,0(x31) +80000900: 01c38863 beq x7,x28,80000910 +80000904: 7940146f jal x8,80002098 +80000908: 800008f8 .word 0x800008f8 +8000090c: 80005283 .word 0x80005283 +80000910: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xd92c2782 +80000914: 000b2603 lw x12,0(x22) +80000918: 004b0b13 addi x22,x22,4 + +8000091c : +Zknh_sha256sum1_cg_cp_rd_b29: + sha256sum1 x29, x12 # perform operation +8000091c: 10161e93 sha256sum1 x29,x12 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zknh_sha256sum1_cg_cp_rd_b29, Zknh_sha256sum1_cg_cp_rd_b29_str) +80000920: 000fa383 lw x7,0(x31) +80000924: 01d38863 beq x7,x29,80000934 +80000928: 7700146f jal x8,80002098 +8000092c: 8000091c .word 0x8000091c +80000930: 800052bb .word 0x800052bb +80000934: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xc3bf880c +80000938: 000b2e83 lw x29,0(x22) +8000093c: 004b0b13 addi x22,x22,4 + +80000940 : +Zknh_sha256sum1_cg_cp_rd_b30: + sha256sum1 x30, x29 # perform operation +80000940: 101e9f13 sha256sum1 x30,x29 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zknh_sha256sum1_cg_cp_rd_b30, Zknh_sha256sum1_cg_cp_rd_b30_str) +80000944: 000fa383 lw x7,0(x31) +80000948: 01e38863 beq x7,x30,80000958 +8000094c: 74c0146f jal x8,80002098 +80000950: 80000940 .word 0x80000940 +80000954: 800052f3 .word 0x800052f3 +80000958: 004f8f93 addi x31,x31,4 + + mv x10, x31 # switch signature pointer register to avoid conflict with test +8000095c: 000f8513 addi x10,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x7f2ca515 +80000960: 000b2203 lw x4,0(x22) +80000964: 004b0b13 addi x22,x22,4 + +80000968 : +Zknh_sha256sum1_cg_cp_rd_b31: + sha256sum1 x31, x4 # perform operation +80000968: 10121f93 sha256sum1 x31,x4 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rd_b31, Zknh_sha256sum1_cg_cp_rd_b31_str) +8000096c: 00052383 lw x7,0(x10) +80000970: 01f38863 beq x7,x31,80000980 +80000974: 7240146f jal x8,80002098 +80000978: 80000968 .word 0x80000968 +8000097c: 8000532b .word 0x8000532b +80000980: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000000 +80000984: 000b2703 lw x14,0(x22) +80000988: 004b0b13 addi x22,x22,4 + +8000098c : +Zknh_sha256sum1_cg_cp_rs1_edges_0x0: + sha256sum1 x19, x14 # perform operation +8000098c: 10171993 sha256sum1 x19,x14 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknh_sha256sum1_cg_cp_rs1_edges_0x0, Zknh_sha256sum1_cg_cp_rs1_edges_0x0_str) +80000990: 00052383 lw x7,0(x10) +80000994: 01338863 beq x7,x19,800009a4 +80000998: 7000146f jal x8,80002098 +8000099c: 8000098c .word 0x8000098c +800009a0: 80005363 .word 0x80005363 +800009a4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x00000001 +800009a8: 000b2a83 lw x21,0(x22) +800009ac: 004b0b13 addi x22,x22,4 + +800009b0 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x1: + sha256sum1 x28, x21 # perform operation +800009b0: 101a9e13 sha256sum1 x28,x21 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknh_sha256sum1_cg_cp_rs1_edges_0x1, Zknh_sha256sum1_cg_cp_rs1_edges_0x1_str) +800009b4: 00052383 lw x7,0(x10) +800009b8: 01c38863 beq x7,x28,800009c8 +800009bc: 6dc0146f jal x8,80002098 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 800053a2 .word 0x800053a2 +800009c8: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x00000002 +800009cc: 000b2703 lw x14,0(x22) +800009d0: 004b0b13 addi x22,x22,4 + +800009d4 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x2: + sha256sum1 x11, x14 # perform operation +800009d4: 10171593 sha256sum1 x11,x14 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknh_sha256sum1_cg_cp_rs1_edges_0x2, Zknh_sha256sum1_cg_cp_rs1_edges_0x2_str) +800009d8: 00052383 lw x7,0(x10) +800009dc: 00b38863 beq x7,x11,800009ec +800009e0: 6b80146f jal x8,80002098 +800009e4: 800009d4 .word 0x800009d4 +800009e8: 800053e1 .word 0x800053e1 +800009ec: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x80000000 +800009f0: 000b2483 lw x9,0(x22) +800009f4: 004b0b13 addi x22,x22,4 + +800009f8 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x80000000: + sha256sum1 x23, x9 # perform operation +800009f8: 10149b93 sha256sum1 x23,x9 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknh_sha256sum1_cg_cp_rs1_edges_0x80000000, Zknh_sha256sum1_cg_cp_rs1_edges_0x80000000_str) +800009fc: 00052383 lw x7,0(x10) +80000a00: 01738863 beq x7,x23,80000a10 +80000a04: 6940146f jal x8,80002098 +80000a08: 800009f8 .word 0x800009f8 +80000a0c: 80005420 .word 0x80005420 +80000a10: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x80000001 +80000a14: 000b2183 lw x3,0(x22) +80000a18: 004b0b13 addi x22,x22,4 + +80000a1c : +Zknh_sha256sum1_cg_cp_rs1_edges_0x80000001: + sha256sum1 x13, x3 # perform operation +80000a1c: 10119693 sha256sum1 x13,x3 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknh_sha256sum1_cg_cp_rs1_edges_0x80000001, Zknh_sha256sum1_cg_cp_rs1_edges_0x80000001_str) +80000a20: 00052383 lw x7,0(x10) +80000a24: 00d38863 beq x7,x13,80000a34 +80000a28: 6700146f jal x8,80002098 +80000a2c: 80000a1c .word 0x80000a1c +80000a30: 80005466 .word 0x80005466 +80000a34: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x7fffffff +80000a38: 000b2483 lw x9,0(x22) +80000a3c: 004b0b13 addi x22,x22,4 + +80000a40 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffff: + sha256sum1 x31, x9 # perform operation +80000a40: 10149f93 sha256sum1 x31,x9 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffff, Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffff_str) +80000a44: 00052383 lw x7,0(x10) +80000a48: 01f38863 beq x7,x31,80000a58 +80000a4c: 64c0146f jal x8,80002098 +80000a50: 80000a40 .word 0x80000a40 +80000a54: 800054ac .word 0x800054ac +80000a58: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x7ffffffe +80000a5c: 000b2f03 lw x30,0(x22) +80000a60: 004b0b13 addi x22,x22,4 + +80000a64 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffe: + sha256sum1 x31, x30 # perform operation +80000a64: 101f1f93 sha256sum1 x31,x30 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffe_str) +80000a68: 00052383 lw x7,0(x10) +80000a6c: 01f38863 beq x7,x31,80000a7c +80000a70: 6280146f jal x8,80002098 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 800054f2 .word 0x800054f2 +80000a7c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0xffffffff +80000a80: 000b2303 lw x6,0(x22) +80000a84: 004b0b13 addi x22,x22,4 + +80000a88 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff: + sha256sum1 x21, x6 # perform operation +80000a88: 10131a93 sha256sum1 x21,x6 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff_str) +80000a8c: 00052383 lw x7,0(x10) +80000a90: 01538863 beq x7,x21,80000aa0 +80000a94: 6040146f jal x8,80002098 +80000a98: 80000a88 .word 0x80000a88 +80000a9c: 80005538 .word 0x80005538 +80000aa0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xfffffffe +80000aa4: 000b2983 lw x19,0(x22) +80000aa8: 004b0b13 addi x22,x22,4 + +80000aac : +Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe: + sha256sum1 x18, x19 # perform operation +80000aac: 10199913 sha256sum1 x18,x19 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe_str) +80000ab0: 00052383 lw x7,0(x10) +80000ab4: 01238863 beq x7,x18,80000ac4 +80000ab8: 5e00146f jal x8,80002098 +80000abc: 80000aac .word 0x80000aac +80000ac0: 8000557e .word 0x8000557e +80000ac4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x5bbc8872 +80000ac8: 000b2283 lw x5,0(x22) +80000acc: 004b0b13 addi x22,x22,4 + +80000ad0 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc8872: + sha256sum1 x20, x5 # perform operation +80000ad0: 10129a13 sha256sum1 x20,x5 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc8872_str) +80000ad4: 00052383 lw x7,0(x10) +80000ad8: 01438863 beq x7,x20,80000ae8 +80000adc: 5bc0146f jal x8,80002098 +80000ae0: 80000ad0 .word 0x80000ad0 +80000ae4: 800055c4 .word 0x800055c4 +80000ae8: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0xaaaaaaaa +80000aec: 000b2d03 lw x26,0(x22) +80000af0: 004b0b13 addi x22,x22,4 + +80000af4 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaa: + sha256sum1 x12, x26 # perform operation +80000af4: 101d1613 sha256sum1 x12,x26 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000af8: 00052383 lw x7,0(x10) +80000afc: 00c38863 beq x7,x12,80000b0c +80000b00: 5980146f jal x8,80002098 +80000b04: 80000af4 .word 0x80000af4 +80000b08: 8000560a .word 0x8000560a +80000b0c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x55555555 +80000b10: 000b2f03 lw x30,0(x22) +80000b14: 004b0b13 addi x22,x22,4 + +80000b18 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x55555555: + sha256sum1 x29, x30 # perform operation +80000b18: 101f1e93 sha256sum1 x29,x30 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknh_sha256sum1_cg_cp_rs1_edges_0x55555555, Zknh_sha256sum1_cg_cp_rs1_edges_0x55555555_str) +80000b1c: 00052383 lw x7,0(x10) +80000b20: 01d38863 beq x7,x29,80000b30 +80000b24: 5740146f jal x8,80002098 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 80005650 .word 0x80005650 +80000b30: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0xba5cf07d +80000b34: 000b2003 lw x0,0(x22) +80000b38: 004b0b13 addi x22,x22,4 + +80000b3c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b0: + sha256sum1 x0, x0 # perform operation +80000b3c: 10101013 sha256sum1 x0,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zknh_sha256sum1_cg_cmp_rd_rs1_b0, Zknh_sha256sum1_cg_cmp_rd_rs1_b0_str) +80000b40: 00052383 lw x7,0(x10) +80000b44: 00038863 beq x7,x0,80000b54 +80000b48: 5500146f jal x8,80002098 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 80005696 .word 0x80005696 +80000b54: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0x44ae2c26 +80000b58: 000b2083 lw x1,0(x22) +80000b5c: 004b0b13 addi x22,x22,4 + +80000b60 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b1: + sha256sum1 x1, x1 # perform operation +80000b60: 10109093 sha256sum1 x1,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zknh_sha256sum1_cg_cmp_rd_rs1_b1, Zknh_sha256sum1_cg_cmp_rd_rs1_b1_str) +80000b64: 00052383 lw x7,0(x10) +80000b68: 00138863 beq x7,x1,80000b78 +80000b6c: 52c0146f jal x8,80002098 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 800056d2 .word 0x800056d2 +80000b78: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xd4092730 +80000b7c: 000b2103 lw x2,0(x22) +80000b80: 004b0b13 addi x22,x22,4 + +80000b84 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b2: + sha256sum1 x2, x2 # perform operation +80000b84: 10111113 sha256sum1 x2,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknh_sha256sum1_cg_cmp_rd_rs1_b2, Zknh_sha256sum1_cg_cmp_rd_rs1_b2_str) +80000b88: 00052383 lw x7,0(x10) +80000b8c: 00238863 beq x7,x2,80000b9c +80000b90: 5080146f jal x8,80002098 +80000b94: 80000b84 .word 0x80000b84 +80000b98: 8000570e .word 0x8000570e +80000b9c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xea9cc6ac +80000ba0: 000b2183 lw x3,0(x22) +80000ba4: 004b0b13 addi x22,x22,4 + +80000ba8 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b3: + sha256sum1 x3, x3 # perform operation +80000ba8: 10119193 sha256sum1 x3,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknh_sha256sum1_cg_cmp_rd_rs1_b3, Zknh_sha256sum1_cg_cmp_rd_rs1_b3_str) +80000bac: 00052383 lw x7,0(x10) +80000bb0: 00338863 beq x7,x3,80000bc0 +80000bb4: 4e40146f jal x8,80002098 +80000bb8: 80000ba8 .word 0x80000ba8 +80000bbc: 8000574a .word 0x8000574a +80000bc0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0xd55c3dcc +80000bc4: 000b2203 lw x4,0(x22) +80000bc8: 004b0b13 addi x22,x22,4 + +80000bcc : +Zknh_sha256sum1_cg_cmp_rd_rs1_b4: + sha256sum1 x4, x4 # perform operation +80000bcc: 10121213 sha256sum1 x4,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknh_sha256sum1_cg_cmp_rd_rs1_b4, Zknh_sha256sum1_cg_cmp_rd_rs1_b4_str) +80000bd0: 00052383 lw x7,0(x10) +80000bd4: 00438863 beq x7,x4,80000be4 +80000bd8: 4c00146f jal x8,80002098 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 80005786 .word 0x80005786 +80000be4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x2ca4bdef +80000be8: 000b2283 lw x5,0(x22) +80000bec: 004b0b13 addi x22,x22,4 + +80000bf0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b5: + sha256sum1 x5, x5 # perform operation +80000bf0: 10129293 sha256sum1 x5,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknh_sha256sum1_cg_cmp_rd_rs1_b5, Zknh_sha256sum1_cg_cmp_rd_rs1_b5_str) +80000bf4: 00052383 lw x7,0(x10) +80000bf8: 00538863 beq x7,x5,80000c08 +80000bfc: 49c0146f jal x8,80002098 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 800057c2 .word 0x800057c2 +80000c08: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x9a4eaa7b +80000c0c: 000b2303 lw x6,0(x22) +80000c10: 004b0b13 addi x22,x22,4 + +80000c14 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b6: + sha256sum1 x6, x6 # perform operation +80000c14: 10131313 sha256sum1 x6,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknh_sha256sum1_cg_cmp_rd_rs1_b6, Zknh_sha256sum1_cg_cmp_rd_rs1_b6_str) +80000c18: 00052383 lw x7,0(x10) +80000c1c: 00638863 beq x7,x6,80000c2c +80000c20: 4780146f jal x8,80002098 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 800057fe .word 0x800057fe +80000c2c: 00450513 addi x10,x10,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c30: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c34: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0x0c89b95b +80000c38: 000b2383 lw x7,0(x22) +80000c3c: 004b0b13 addi x22,x22,4 + +80000c40 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b7: + sha256sum1 x7, x7 # perform operation +80000c40: 10139393 sha256sum1 x7,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha256sum1_cg_cmp_rd_rs1_b7, Zknh_sha256sum1_cg_cmp_rd_rs1_b7_str) +80000c44: 00052203 lw x4,0(x10) +80000c48: 00720863 beq x4,x7,80000c58 +80000c4c: 434012ef jal x5,80002080 +80000c50: 80000c40 .word 0x80000c40 +80000c54: 8000583a .word 0x8000583a +80000c58: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0x98e0ca42 +80000c5c: 000b2403 lw x8,0(x22) +80000c60: 004b0b13 addi x22,x22,4 + +80000c64 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b8: + sha256sum1 x8, x8 # perform operation +80000c64: 10141413 sha256sum1 x8,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha256sum1_cg_cmp_rd_rs1_b8, Zknh_sha256sum1_cg_cmp_rd_rs1_b8_str) +80000c68: 00052203 lw x4,0(x10) +80000c6c: 00820863 beq x4,x8,80000c7c +80000c70: 410012ef jal x5,80002080 +80000c74: 80000c64 .word 0x80000c64 +80000c78: 80005876 .word 0x80005876 +80000c7c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xef307d91 +80000c80: 000b2483 lw x9,0(x22) +80000c84: 004b0b13 addi x22,x22,4 + +80000c88 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b9: + sha256sum1 x9, x9 # perform operation +80000c88: 10149493 sha256sum1 x9,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha256sum1_cg_cmp_rd_rs1_b9, Zknh_sha256sum1_cg_cmp_rd_rs1_b9_str) +80000c8c: 00052203 lw x4,0(x10) +80000c90: 00920863 beq x4,x9,80000ca0 +80000c94: 3ec012ef jal x5,80002080 +80000c98: 80000c88 .word 0x80000c88 +80000c9c: 800058b2 .word 0x800058b2 +80000ca0: 00450513 addi x10,x10,4 + + mv x27, x10 # switch signature pointer register to avoid conflict with test +80000ca4: 00050d93 addi x27,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xe77a112e +80000ca8: 000b2503 lw x10,0(x22) +80000cac: 004b0b13 addi x22,x22,4 + +80000cb0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b10: + sha256sum1 x10, x10 # perform operation +80000cb0: 10151513 sha256sum1 x10,x10 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zknh_sha256sum1_cg_cmp_rd_rs1_b10, Zknh_sha256sum1_cg_cmp_rd_rs1_b10_str) +80000cb4: 000da203 lw x4,0(x27) +80000cb8: 00a20863 beq x4,x10,80000cc8 +80000cbc: 3c4012ef jal x5,80002080 +80000cc0: 80000cb0 .word 0x80000cb0 +80000cc4: 800058ee .word 0x800058ee +80000cc8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x602720ee +80000ccc: 000b2583 lw x11,0(x22) +80000cd0: 004b0b13 addi x22,x22,4 + +80000cd4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b11: + sha256sum1 x11, x11 # perform operation +80000cd4: 10159593 sha256sum1 x11,x11 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zknh_sha256sum1_cg_cmp_rd_rs1_b11, Zknh_sha256sum1_cg_cmp_rd_rs1_b11_str) +80000cd8: 000da203 lw x4,0(x27) +80000cdc: 00b20863 beq x4,x11,80000cec +80000ce0: 3a0012ef jal x5,80002080 +80000ce4: 80000cd4 .word 0x80000cd4 +80000ce8: 8000592b .word 0x8000592b +80000cec: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xe049fdb6 +80000cf0: 000b2603 lw x12,0(x22) +80000cf4: 004b0b13 addi x22,x22,4 + +80000cf8 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b12: + sha256sum1 x12, x12 # perform operation +80000cf8: 10161613 sha256sum1 x12,x12 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zknh_sha256sum1_cg_cmp_rd_rs1_b12, Zknh_sha256sum1_cg_cmp_rd_rs1_b12_str) +80000cfc: 000da203 lw x4,0(x27) +80000d00: 00c20863 beq x4,x12,80000d10 +80000d04: 37c012ef jal x5,80002080 +80000d08: 80000cf8 .word 0x80000cf8 +80000d0c: 80005968 .word 0x80005968 +80000d10: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x3df2c9d7 +80000d14: 000b2683 lw x13,0(x22) +80000d18: 004b0b13 addi x22,x22,4 + +80000d1c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b13: + sha256sum1 x13, x13 # perform operation +80000d1c: 10169693 sha256sum1 x13,x13 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zknh_sha256sum1_cg_cmp_rd_rs1_b13, Zknh_sha256sum1_cg_cmp_rd_rs1_b13_str) +80000d20: 000da203 lw x4,0(x27) +80000d24: 00d20863 beq x4,x13,80000d34 +80000d28: 358012ef jal x5,80002080 +80000d2c: 80000d1c .word 0x80000d1c +80000d30: 800059a5 .word 0x800059a5 +80000d34: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x168efa82 +80000d38: 000b2703 lw x14,0(x22) +80000d3c: 004b0b13 addi x22,x22,4 + +80000d40 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b14: + sha256sum1 x14, x14 # perform operation +80000d40: 10171713 sha256sum1 x14,x14 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zknh_sha256sum1_cg_cmp_rd_rs1_b14, Zknh_sha256sum1_cg_cmp_rd_rs1_b14_str) +80000d44: 000da203 lw x4,0(x27) +80000d48: 00e20863 beq x4,x14,80000d58 +80000d4c: 334012ef jal x5,80002080 +80000d50: 80000d40 .word 0x80000d40 +80000d54: 800059e2 .word 0x800059e2 +80000d58: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x63cb9ef4 +80000d5c: 000b2783 lw x15,0(x22) +80000d60: 004b0b13 addi x22,x22,4 + +80000d64 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b15: + sha256sum1 x15, x15 # perform operation +80000d64: 10179793 sha256sum1 x15,x15 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zknh_sha256sum1_cg_cmp_rd_rs1_b15, Zknh_sha256sum1_cg_cmp_rd_rs1_b15_str) +80000d68: 000da203 lw x4,0(x27) +80000d6c: 00f20863 beq x4,x15,80000d7c +80000d70: 310012ef jal x5,80002080 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 80005a1f .word 0x80005a1f +80000d7c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x41e3016b +80000d80: 000b2803 lw x16,0(x22) +80000d84: 004b0b13 addi x22,x22,4 + +80000d88 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b16: + sha256sum1 x16, x16 # perform operation +80000d88: 10181813 sha256sum1 x16,x16 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zknh_sha256sum1_cg_cmp_rd_rs1_b16, Zknh_sha256sum1_cg_cmp_rd_rs1_b16_str) +80000d8c: 000da203 lw x4,0(x27) +80000d90: 01020863 beq x4,x16,80000da0 +80000d94: 2ec012ef jal x5,80002080 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80005a5c .word 0x80005a5c +80000da0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x37ecf39d +80000da4: 000b2883 lw x17,0(x22) +80000da8: 004b0b13 addi x22,x22,4 + +80000dac : +Zknh_sha256sum1_cg_cmp_rd_rs1_b17: + sha256sum1 x17, x17 # perform operation +80000dac: 10189893 sha256sum1 x17,x17 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zknh_sha256sum1_cg_cmp_rd_rs1_b17, Zknh_sha256sum1_cg_cmp_rd_rs1_b17_str) +80000db0: 000da203 lw x4,0(x27) +80000db4: 01120863 beq x4,x17,80000dc4 +80000db8: 2c8012ef jal x5,80002080 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 80005a99 .word 0x80005a99 +80000dc4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xc7131842 +80000dc8: 000b2903 lw x18,0(x22) +80000dcc: 004b0b13 addi x22,x22,4 + +80000dd0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b18: + sha256sum1 x18, x18 # perform operation +80000dd0: 10191913 sha256sum1 x18,x18 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zknh_sha256sum1_cg_cmp_rd_rs1_b18, Zknh_sha256sum1_cg_cmp_rd_rs1_b18_str) +80000dd4: 000da203 lw x4,0(x27) +80000dd8: 01220863 beq x4,x18,80000de8 +80000ddc: 2a4012ef jal x5,80002080 +80000de0: 80000dd0 .word 0x80000dd0 +80000de4: 80005ad6 .word 0x80005ad6 +80000de8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xa4a35ace +80000dec: 000b2983 lw x19,0(x22) +80000df0: 004b0b13 addi x22,x22,4 + +80000df4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b19: + sha256sum1 x19, x19 # perform operation +80000df4: 10199993 sha256sum1 x19,x19 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zknh_sha256sum1_cg_cmp_rd_rs1_b19, Zknh_sha256sum1_cg_cmp_rd_rs1_b19_str) +80000df8: 000da203 lw x4,0(x27) +80000dfc: 01320863 beq x4,x19,80000e0c +80000e00: 280012ef jal x5,80002080 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80005b13 .word 0x80005b13 +80000e0c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xe830435c +80000e10: 000b2a03 lw x20,0(x22) +80000e14: 004b0b13 addi x22,x22,4 + +80000e18 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b20: + sha256sum1 x20, x20 # perform operation +80000e18: 101a1a13 sha256sum1 x20,x20 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zknh_sha256sum1_cg_cmp_rd_rs1_b20, Zknh_sha256sum1_cg_cmp_rd_rs1_b20_str) +80000e1c: 000da203 lw x4,0(x27) +80000e20: 01420863 beq x4,x20,80000e30 +80000e24: 25c012ef jal x5,80002080 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80005b50 .word 0x80005b50 +80000e30: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x304a1fde +80000e34: 000b2a83 lw x21,0(x22) +80000e38: 004b0b13 addi x22,x22,4 + +80000e3c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b21: + sha256sum1 x21, x21 # perform operation +80000e3c: 101a9a93 sha256sum1 x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zknh_sha256sum1_cg_cmp_rd_rs1_b21, Zknh_sha256sum1_cg_cmp_rd_rs1_b21_str) +80000e40: 000da203 lw x4,0(x27) +80000e44: 01520863 beq x4,x21,80000e54 +80000e48: 238012ef jal x5,80002080 +80000e4c: 80000e3c .word 0x80000e3c +80000e50: 80005b8d .word 0x80005b8d +80000e54: 004d8d93 addi x27,x27,4 + + mv x3, x22 # switch data pointer register to avoid conflict with test +80000e58: 000b0193 addi x3,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5c58edde +80000e5c: 0001ab03 lw x22,0(x3) +80000e60: 00418193 addi x3,x3,4 + +80000e64 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b22: + sha256sum1 x22, x22 # perform operation +80000e64: 101b1b13 sha256sum1 x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zknh_sha256sum1_cg_cmp_rd_rs1_b22, Zknh_sha256sum1_cg_cmp_rd_rs1_b22_str) +80000e68: 000da203 lw x4,0(x27) +80000e6c: 01620863 beq x4,x22,80000e7c +80000e70: 210012ef jal x5,80002080 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 80005bca .word 0x80005bca +80000e7c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x4a224882 +80000e80: 0001ab83 lw x23,0(x3) +80000e84: 00418193 addi x3,x3,4 + +80000e88 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b23: + sha256sum1 x23, x23 # perform operation +80000e88: 101b9b93 sha256sum1 x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zknh_sha256sum1_cg_cmp_rd_rs1_b23, Zknh_sha256sum1_cg_cmp_rd_rs1_b23_str) +80000e8c: 000da203 lw x4,0(x27) +80000e90: 01720863 beq x4,x23,80000ea0 +80000e94: 1ec012ef jal x5,80002080 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 80005c07 .word 0x80005c07 +80000ea0: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x03eaaa73 +80000ea4: 0001ac03 lw x24,0(x3) +80000ea8: 00418193 addi x3,x3,4 + +80000eac : +Zknh_sha256sum1_cg_cmp_rd_rs1_b24: + sha256sum1 x24, x24 # perform operation +80000eac: 101c1c13 sha256sum1 x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zknh_sha256sum1_cg_cmp_rd_rs1_b24, Zknh_sha256sum1_cg_cmp_rd_rs1_b24_str) +80000eb0: 000da203 lw x4,0(x27) +80000eb4: 01820863 beq x4,x24,80000ec4 +80000eb8: 1c8012ef jal x5,80002080 +80000ebc: 80000eac .word 0x80000eac +80000ec0: 80005c45 .word 0x80005c45 +80000ec4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x013cffe7 +80000ec8: 0001ac83 lw x25,0(x3) +80000ecc: 00418193 addi x3,x3,4 + +80000ed0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b25: + sha256sum1 x25, x25 # perform operation +80000ed0: 101c9c93 sha256sum1 x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zknh_sha256sum1_cg_cmp_rd_rs1_b25, Zknh_sha256sum1_cg_cmp_rd_rs1_b25_str) +80000ed4: 000da203 lw x4,0(x27) +80000ed8: 01920863 beq x4,x25,80000ee8 +80000edc: 1a4012ef jal x5,80002080 +80000ee0: 80000ed0 .word 0x80000ed0 +80000ee4: 80005c83 .word 0x80005c83 +80000ee8: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x6e232c49 +80000eec: 0001ad03 lw x26,0(x3) +80000ef0: 00418193 addi x3,x3,4 + +80000ef4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b26: + sha256sum1 x26, x26 # perform operation +80000ef4: 101d1d13 sha256sum1 x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zknh_sha256sum1_cg_cmp_rd_rs1_b26, Zknh_sha256sum1_cg_cmp_rd_rs1_b26_str) +80000ef8: 000da203 lw x4,0(x27) +80000efc: 01a20863 beq x4,x26,80000f0c +80000f00: 180012ef jal x5,80002080 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 80005cc1 .word 0x80005cc1 +80000f0c: 004d8d93 addi x27,x27,4 + + mv x1, x27 # switch signature pointer register to avoid conflict with test +80000f10: 000d8093 addi x1,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x32ce250a +80000f14: 0001ad83 lw x27,0(x3) +80000f18: 00418193 addi x3,x3,4 + +80000f1c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b27: + sha256sum1 x27, x27 # perform operation +80000f1c: 101d9d93 sha256sum1 x27,x27 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknh_sha256sum1_cg_cmp_rd_rs1_b27, Zknh_sha256sum1_cg_cmp_rd_rs1_b27_str) +80000f20: 0000a203 lw x4,0(x1) +80000f24: 01b20863 beq x4,x27,80000f34 +80000f28: 158012ef jal x5,80002080 +80000f2c: 80000f1c .word 0x80000f1c +80000f30: 80005cff .word 0x80005cff +80000f34: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x48925b3d +80000f38: 0001ae03 lw x28,0(x3) +80000f3c: 00418193 addi x3,x3,4 + +80000f40 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b28: + sha256sum1 x28, x28 # perform operation +80000f40: 101e1e13 sha256sum1 x28,x28 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknh_sha256sum1_cg_cmp_rd_rs1_b28, Zknh_sha256sum1_cg_cmp_rd_rs1_b28_str) +80000f44: 0000a203 lw x4,0(x1) +80000f48: 01c20863 beq x4,x28,80000f58 +80000f4c: 134012ef jal x5,80002080 +80000f50: 80000f40 .word 0x80000f40 +80000f54: 80005d3d .word 0x80005d3d +80000f58: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xd8441add +80000f5c: 0001ae83 lw x29,0(x3) +80000f60: 00418193 addi x3,x3,4 + +80000f64 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b29: + sha256sum1 x29, x29 # perform operation +80000f64: 101e9e93 sha256sum1 x29,x29 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknh_sha256sum1_cg_cmp_rd_rs1_b29, Zknh_sha256sum1_cg_cmp_rd_rs1_b29_str) +80000f68: 0000a203 lw x4,0(x1) +80000f6c: 01d20863 beq x4,x29,80000f7c +80000f70: 110012ef jal x5,80002080 +80000f74: 80000f64 .word 0x80000f64 +80000f78: 80005d7b .word 0x80005d7b +80000f7c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x420b0c45 +80000f80: 0001af03 lw x30,0(x3) +80000f84: 00418193 addi x3,x3,4 + +80000f88 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b30: + sha256sum1 x30, x30 # perform operation +80000f88: 101f1f13 sha256sum1 x30,x30 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha256sum1_cg_cmp_rd_rs1_b30, Zknh_sha256sum1_cg_cmp_rd_rs1_b30_str) +80000f8c: 0000a203 lw x4,0(x1) +80000f90: 01e20863 beq x4,x30,80000fa0 +80000f94: 0ec012ef jal x5,80002080 +80000f98: 80000f88 .word 0x80000f88 +80000f9c: 80005db9 .word 0x80005db9 +80000fa0: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x49dfa02a +80000fa4: 0001af83 lw x31,0(x3) +80000fa8: 00418193 addi x3,x3,4 + +80000fac : +Zknh_sha256sum1_cg_cmp_rd_rs1_b31: + sha256sum1 x31, x31 # perform operation +80000fac: 101f9f93 sha256sum1 x31,x31 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknh_sha256sum1_cg_cmp_rd_rs1_b31, Zknh_sha256sum1_cg_cmp_rd_rs1_b31_str) +80000fb0: 0000a203 lw x4,0(x1) +80000fb4: 01f20863 beq x4,x31,80000fc4 +80000fb8: 0c8012ef jal x5,80002080 +80000fbc: 80000fac .word 0x80000fac +80000fc0: 80005df7 .word 0x80005df7 +80000fc4: 00408093 addi x1,x1,4 + + mv x2, x1 # restore signature pointer to default register for teardown +80000fc8: 00008113 addi x2,x1,0 + +80000fcc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fcc: 00000513 addi x10,x0,0 +80000fd0: 00000073 ecall +80000fd4: fff00513 addi x10,x0,-1 +80000fd8: 1d800413 addi x8,x0,472 + +80000fdc : +80000fdc: 34002373 csrrs x6,mscratch,x0 + +80000fe0 : +80000fe0: 23832383 lw x7,568(x6) +80000fe4: 23c32483 lw x9,572(x6) + +80000fe8 : +80000fe8: 22032383 lw x7,544(x6) + +80000fec : +80000fec: 25032483 lw x9,592(x6) +80000ff0: 34049073 csrrw x0,mscratch,x9 + +80000ff4 : +80000ff4: 24832483 lw x9,584(x6) +80000ff8: 305493f3 csrrw x7,mtvec,x9 +80000ffc: ffc4f493 andi x9,x9,-4 +80001000: ffc3f393 andi x7,x7,-4 +80001004: 00749e63 bne x9,x7,80001020 + +80001008 : +80001008: 00030493 addi x9,x6,0 + +8000100c : +8000100c: 0004a783 lw x15,0(x9) +80001010: 00f3a023 sw x15,0(x7) +80001014: 00438393 addi x7,x7,4 +80001018: 00448493 addi x9,x9,4 +8000101c: fe83c8e3 blt x7,x8,8000100c +80001020: 0000100f fence.i + +80001024 : +80001024: 00000013 addi x0,x0,0 +80001028: 00000013 addi x0,x0,0 +8000102c: 00000013 addi x0,x0,0 +80001030: 00000013 addi x0,x0,0 +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 44450513 addi x10,x10,1092 # 800064c4 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 44350513 addi x10,x10,1091 # 80006503 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 46350513 addi x10,x10,1123 # 80006563 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: fce50513 addi x10,x10,-50 # 8000710e +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: bb838393 addi x7,x7,-1096 # 80007d78 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: b7040413 addi x8,x8,-1168 # 80007d70 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 800066b7 .word 0x800066b7 + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 80006525 .word 0x80006525 +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 22450513 addi x10,x10,548 # 80006484 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: 22450513 addi x10,x10,548 # 800064c4 +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: ccdff06f jal x0,80000fcc + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cc1ff06f jal x0,80000fcc +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b4430313 addi x6,x6,-1212 # 80001024 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 48550513 addi x10,x10,1157 # 80007b45 +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00005517 auipc x10,0x5 +80001704: 8a850513 addi x10,x10,-1880 # 80005fa8 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: e8c50513 addi x10,x10,-372 # 800065cc +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: d4450513 addi x10,x10,-700 # 800064c4 +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 42848493 addi x9,x9,1064 # 80005f88 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: c3c40413 addi x8,x8,-964 # 800167dc +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800066ce .word 0x800066ce +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800067d0 .word 0x800067d0 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800068cb .word 0x800068cb +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 800069be .word 0x800069be +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006b31 .word 0x80006b31 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: dc020213 addi x4,x4,-576 # 80005e40 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: da838393 addi x7,x7,-600 # 80005e40 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: d8068693 addi x13,x13,-640 # 80005e40 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: d5848493 addi x9,x9,-680 # 80005e40 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: cb44a483 lw x9,-844(x9) # 80005e40 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00006417 auipc x8,0x6 +80002244: 95040413 addi x8,x8,-1712 # 80007b90 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 56040413 addi x8,x8,1376 # 800167e0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: ca848493 addi x9,x9,-856 # 80005f68 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: c6848493 addi x9,x9,-920 # 80005f68 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: c4880813 addi x16,x16,-952 # 80005f78 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: c3480813 addi x16,x16,-972 # 80005f78 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 36738393 addi x7,x7,871 # 800066b7 +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: c1080813 addi x16,x16,-1008 # 80005f70 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 36238393 addi x7,x7,866 # 800066ce +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 44c38393 addi x7,x7,1100 # 800067d0 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 52f38393 addi x7,x7,1327 # 800068cb +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 60a38393 addi x7,x7,1546 # 800069be +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 76538393 addi x7,x7,1893 # 80006b31 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 6d138393 addi x7,x7,1745 # 80006ab5 +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 6f738393 addi x7,x7,1783 # 80006af3 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 2fa38393 addi x7,x7,762 # 8000670e +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 3e238393 addi x7,x7,994 # 8000680e +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 4c338393 addi x7,x7,1219 # 80006907 +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 59f38393 addi x7,x7,1439 # 800069fb +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 6f838393 addi x7,x7,1784 # 80006b6c +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 2c238393 addi x7,x7,706 # 8000674e +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 3a838393 addi x7,x7,936 # 8000684c +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 48738393 addi x7,x7,1159 # 80006943 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 56438393 addi x7,x7,1380 # 80006a38 +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 6bb38393 addi x7,x7,1723 # 80006ba7 +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 28b38393 addi x7,x7,651 # 8000678f +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 36f38393 addi x7,x7,879 # 8000688b +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 44c38393 addi x7,x7,1100 # 80006980 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 52a38393 addi x7,x7,1322 # 80006a76 +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 67f38393 addi x7,x7,1663 # 80006be3 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 6a438393 addi x7,x7,1700 # 80006c20 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 6db38393 addi x7,x7,1755 # 80006c6f +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 7be38393 addi x7,x7,1982 # 80006d6a +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00005397 auipc x7,0x5 +800025c8: 8a238393 addi x7,x7,-1886 # 80006e66 +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00004817 auipc x16,0x4 +800025e8: 98c80813 addi x16,x16,-1652 # 80005f70 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00004817 auipc x16,0x4 +800025f8: 97c80813 addi x16,x16,-1668 # 80005f70 +800025fc: 00882023 sw x8,0(x16) +80002600: 00004817 auipc x16,0x4 +80002604: 97480813 addi x16,x16,-1676 # 80005f74 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00004817 auipc x16,0x4 +80002614: 96080813 addi x16,x16,-1696 # 80005f70 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: e6450513 addi x10,x10,-412 # 800064c4 +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: e6350513 addi x10,x10,-413 # 80006503 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: eda50513 addi x10,x10,-294 # 800065ba +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00004517 auipc x10,0x4 +8000270c: 85852503 lw x10,-1960(x10) # 80005f60 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: eac50513 addi x10,x10,-340 # 800065cc +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 6f852503 lw x10,1784(x10) # 80005e40 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: e6e50513 addi x10,x10,-402 # 800065ce +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 7b852503 lw x10,1976(x10) # 80005f40 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 7e850513 addi x10,x10,2024 # 80005fa8 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: de250513 addi x10,x10,-542 # 800065e2 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 72052503 lw x10,1824(x10) # 80005f48 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 76850513 addi x10,x10,1896 # 80005fa8 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 79950513 addi x10,x10,1945 # 80007019 +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 59852503 lw x10,1432(x10) # 80005e40 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 6e860613 addi x12,x12,1768 # 80005fa8 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 65c52503 lw x10,1628(x10) # 80005f44 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00005517 auipc x10,0x5 +80002924: 80f50513 addi x10,x10,-2033 # 8000712f +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 64860613 addi x12,x12,1608 # 80005fa8 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 5bc52503 lw x10,1468(x10) # 80005f44 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 60860613 addi x12,x12,1544 # 80005fa8 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 57c52503 lw x10,1404(x10) # 80005f44 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 63250513 addi x10,x10,1586 # 80007012 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 58850513 addi x10,x10,1416 # 80005fa8 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 5ca50513 addi x10,x10,1482 # 8000702a +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 3b852503 lw x10,952(x10) # 80005e40 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 4b852503 lw x10,1208(x10) # 80005f50 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 4a452503 lw x10,1188(x10) # 80005f50 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 4e850513 addi x10,x10,1256 # 80005fa8 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 48052503 lw x10,1152(x10) # 80005f68 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 54150513 addi x10,x10,1345 # 80007041 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 31852503 lw x10,792(x10) # 80005e40 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 42052503 lw x10,1056(x10) # 80005f58 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 40c52503 lw x10,1036(x10) # 80005f58 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 44850513 addi x10,x10,1096 # 80005fa8 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 4b850513 addi x10,x10,1208 # 80007058 +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 39052503 lw x10,912(x10) # 80005f58 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 3c850513 addi x10,x10,968 # 80005fa8 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 49650513 addi x10,x10,1174 # 800070b6 +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 31052503 lw x10,784(x10) # 80005f58 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 34850513 addi x10,x10,840 # 80005fa8 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 2e442403 lw x8,740(x8) # 80005f70 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 4bb50513 addi x10,x10,1211 # 8000715b +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 4a750513 addi x10,x10,1191 # 80007187 +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 27080813 addi x16,x16,624 # 80005f78 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00004517 auipc x10,0x4 +80002d24: 8ac50513 addi x10,x10,-1876 # 800065cc +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 43750513 addi x10,x10,1079 # 80007197 +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: 1d052503 lw x10,464(x10) # 80005f58 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: 20850513 addi x10,x10,520 # 80005fa8 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 3e250513 addi x10,x10,994 # 800071c2 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: 14852503 lw x10,328(x10) # 80005f50 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: 18850513 addi x10,x10,392 # 80005fa8 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: 10832303 lw x6,264(x6) # 80005f50 +80002e50: 00003397 auipc x7,0x3 +80002e54: 1083a383 lw x7,264(x7) # 80005f58 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 39150513 addi x10,x10,913 # 800071f1 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 3b950513 addi x10,x10,953 # 80007259 +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: 08832303 lw x6,136(x6) # 80005f50 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: 0883a383 lw x7,136(x7) # 80005f58 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: 0a850513 addi x10,x10,168 # 80005fa8 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 34050513 addi x10,x10,832 # 80007280 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 29d50513 addi x10,x10,669 # 8000721d +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 29950513 addi x10,x10,665 # 80007259 +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: f7032303 lw x6,-144(x6) # 80005f58 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: f603a383 lw x7,-160(x7) # 80005f50 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: f8850513 addi x10,x10,-120 # 80005fa8 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 30850513 addi x10,x10,776 # 80007368 +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 3af50513 addi x10,x10,943 # 8000744f +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: eac52503 lw x10,-340(x10) # 80005f74 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 38b50513 addi x10,x10,907 # 8000748b +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 32950513 addi x10,x10,809 # 80007469 +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 2f150513 addi x10,x10,753 # 80007471 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 2b950513 addi x10,x10,697 # 80007479 +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 28250513 addi x10,x10,642 # 80007482 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 25450513 addi x10,x10,596 # 80007494 +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: d0852503 lw x10,-760(x10) # 80005f70 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 32b50513 addi x10,x10,811 # 800075eb +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: 1ae50513 addi x10,x10,430 # 800074ae +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: 19f50513 addi x10,x10,415 # 800074df +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: 17f50513 addi x10,x10,383 # 800074ff +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: 15d50513 addi x10,x10,349 # 8000751d +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: 13c50513 addi x10,x10,316 # 8000753c +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: 12450513 addi x10,x10,292 # 80007564 +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: 11050513 addi x10,x10,272 # 80007590 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: 0fc50513 addi x10,x10,252 # 800075bc +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: 0fa50513 addi x10,x10,250 # 800075fa +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: a3052503 lw x10,-1488(x10) # 80005f58 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: a6850513 addi x10,x10,-1432 # 80005fa8 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: 09150513 addi x10,x10,145 # 80007611 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00003517 auipc x10,0x3 +800035ac: 9a852503 lw x10,-1624(x10) # 80005f50 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00003517 auipc x10,0x3 +800035c4: 9e850513 addi x10,x10,-1560 # 80005fa8 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00003517 auipc x10,0x3 +800035ec: 98852503 lw x10,-1656(x10) # 80005f70 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: 02850513 addi x10,x10,40 # 80007628 +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00003517 auipc x10,0x3 +8000362c: 93052503 lw x10,-1744(x10) # 80005f58 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: fff50513 addi x10,x10,-1 # 8000763f +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00003517 auipc x10,0x3 +8000366c: 8e852503 lw x10,-1816(x10) # 80005f50 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00003517 auipc x10,0x3 +80003688: 8ec52503 lw x10,-1812(x10) # 80005f70 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: 01550513 addi x10,x10,21 # 800076b5 +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: 0ab50513 addi x10,x10,171 # 8000778b +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: 15e50513 addi x10,x10,350 # 8000787e +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: 21950513 addi x10,x10,537 # 80007979 +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 2c050513 addi x10,x10,704 # 80007a60 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: e8d50513 addi x10,x10,-371 # 8000766d +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 78062603 lw x12,1920(x12) # 80005f88 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: e3650513 addi x10,x10,-458 # 80006656 +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 72850513 addi x10,x10,1832 # 80005fa8 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 71058593 addi x11,x11,1808 # 80005fd0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 74458593 addi x11,x11,1860 # 80006030 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: b4e50513 addi x10,x10,-1202 # 8000646e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 7ae50513 addi x10,x10,1966 # 8000710e +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 5f060613 addi x12,x12,1520 # 80005f80 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: cd750513 addi x10,x10,-809 # 80006677 +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 5c052503 lw x10,1472(x10) # 80005f88 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 5c850513 addi x10,x10,1480 # 80005fa8 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: c6750513 addi x10,x10,-921 # 80006687 +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 54852503 lw x10,1352(x10) # 80005f90 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 54850513 addi x10,x10,1352 # 80005fa8 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: bf750513 addi x10,x10,-1033 # 80006697 +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 4d052503 lw x10,1232(x10) # 80005f98 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 4c850513 addi x10,x10,1224 # 80005fa8 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: b8750513 addi x10,x10,-1145 # 800066a7 +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 45852503 lw x10,1112(x10) # 80005fa0 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 44850513 addi x10,x10,1096 # 80005fa8 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 3f860613 addi x12,x12,1016 # 80005f80 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 40860613 addi x12,x12,1032 # 80005fa8 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f3030313 addi x6,x6,-208 # 80000fcc +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f1830313 addi x6,x6,-232 # 80000fcc +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f0030313 addi x6,x6,-256 # 80000fcc +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: d9c78793 addi x15,x15,-612 # 80000fdc +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 6f010113 addi x2,x2,1776 # 80007b90 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80007137 .word 0x80007137 +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 25828293 addi x5,x5,600 # 80016800 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 23828293 addi x5,x5,568 # 80016800 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sig0h-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sig0h-00.elf.objdump new file mode 100644 index 0000000..5695222 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sig0h-00.elf.objdump @@ -0,0 +1,13218 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig0h-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig0h-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007140 memsz 0x00007140 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00007100 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002694 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025d0f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d90 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025db3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025dc8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025df0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e7f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cczXgzJh.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b0 +80005540 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b4 +80005580 l .text.rvtest 00000000 failedtest_x14_x13 +800090d0 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b5_str +8000016c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b6_str +80000198 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b7_str +800001c4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b8_str +800001f0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b9_str +8000021c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b10_str +80000248 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b11_str +80000274 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b13 +800092cf l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b29_str +8000059c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b0_str +80000624 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b1_str +80000650 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b3_str +800006b4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b4 +80009801 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b4_str +800006e0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b5_str +8000070c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b7 +800098ac l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b9_str +800007bc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b11_str +8000081c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b12_str +80000850 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b13_str +8000087c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b14_str +800008a8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b15_str +800008d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b16_str +80000900 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b17_str +8000092c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b21_str +800009e0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b22_str +80000a0c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b23_str +80000a38 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b24_str +80000a64 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b25_str +80000a90 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b26_str +80000abc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b27_str +80000ae8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b28_str +80000b14 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b29_str +80000b40 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b30_str +80000b6c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_b31_str +80000b98 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b0_str +80000bc4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b1_str +80000bf0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b2_str +80000c1c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b3_str +80000c50 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b4 +80005558 l .text.rvtest 00000000 failedtest_x8_x7 +80009f33 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b4_str +80000c7c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b5_str +80000ca8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b6_str +80000cdc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b7_str +80000d08 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b8_str +80000d38 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b9_str +80000d64 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b10_str +80000d90 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b11_str +80000dbc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b14_str +80000e40 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b15_str +80000e70 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b16_str +80000e9c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b18_str +80000ef8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b19_str +80000f24 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b20_str +80000f50 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b21_str +80000f7c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b22_str +80000fa8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b23_str +80000fd8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b24_str +80001004 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b25_str +80001030 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b26_str +80001060 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b27_str +8000108c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b28_str +800010b8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b29_str +800010e4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b30_str +80001110 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sig0h_cg_cp_rd_b31_str +8000113c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x0_str +80001168 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x1_str +80001194 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x2_str +800011c0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000000_str +800011ec l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000001_str +80001218 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x7fffffff_str +80001244 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x7ffffffe_str +80001270 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xffffffff_str +8000129c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xfffffffe_str +800012c8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x5bbc8872_str +800012f4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0xaaaaaaaa_str +80001320 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs1_edges_0x55555555_str +8000134c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x0_str +80001378 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x1_str +800013a4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x2_str +800013d0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000000_str +800013fc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000001_str +80001428 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x7fffffff_str +80001454 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x7ffffffe_str +80001480 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xffffffff_str +800014ac l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xfffffffe_str +800014d8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x5bbc8872_str +80001504 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0xaaaaaaaa_str +80001530 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sig0h_cg_cp_rs2_edges_0x55555555_str +8000155c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001588 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +8000160c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001638 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001664 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001690 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016bc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001714 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001740 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000176c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001798 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000181c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001848 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001874 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018cc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001924 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001950 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000197c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a00 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a2c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a58 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a84 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001adc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b08 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b34 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b60 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b8c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c10 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c3c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c68 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c94 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cec l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d18 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d44 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d70 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d9c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e20 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e4c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e78 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001efc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f28 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f54 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f80 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fac l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002004 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002030 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000205c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002088 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +8000210c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002138 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002164 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002190 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021bc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002214 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002240 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000226c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002298 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000231c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002348 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002374 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023cc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002424 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002450 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000247c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002500 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000252c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002558 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002584 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002608 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002634 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002660 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000268c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002710 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000273c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002768 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002794 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027ec l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002818 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002844 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002870 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +8000289c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002920 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000294c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002978 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029fc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a28 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a54 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a80 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aac l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b04 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b30 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b5c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b88 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c0c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c38 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c64 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c90 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cbc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d14 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d40 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d6c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d98 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e1c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b0_str +80002e48 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b1_str +80002e78 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b2_str +80002ea4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b3_str +80002ed8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b4_str +80002f04 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b5_str +80002f30 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b6_str +80002f5c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b7_str +80002f88 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b8_str +80002fb4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b9_str +80002fe0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b10_str +8000300c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b11_str +80003038 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b12_str +8000306c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b13_str +80003098 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b14_str +800030c4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b15_str +800030f0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b16_str +8000311c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b17_str +80003148 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b18_str +80003174 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b19_str +800031a4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b20_str +800031d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b21_str +80003200 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b22_str +8000322c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b23_str +80003258 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b24_str +80003284 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b25_str +800032b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b26_str +800032dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b27_str +80003308 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b28_str +80003334 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b29_str +80003360 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b30_str +8000338c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rs1_rs2_b31_str +800033b8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b0_str +800033e4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b1_str +80003414 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b2_str +80003440 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b3_str +80003474 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b4_str +800034a0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b5_str +800034cc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b6_str +80003500 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b7_str +8000352c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b8_str +80003558 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b9_str +80003584 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b10_str +800035b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b11_str +800035dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b12_str +80003610 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b13_str +8000363c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b14_str +80003668 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b15_str +80003698 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b16_str +800036c4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b17_str +800036f0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b18_str +80003720 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b19_str +8000374c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b20_str +80003778 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b21_str +800037a4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b22_str +800037d0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b23_str +800037fc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b24_str +80003828 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b25_str +80003854 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b26_str +80003884 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b27_str +800038b4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b28_str +800038e0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b29_str +8000390c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b30_str +80003938 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_b31_str +80003964 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b0_str +80003990 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b1_str +800039bc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b2_str +800039e8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b3_str +80003a14 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b4_str +80003a40 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b5_str +80003a6c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b6_str +80003aa0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b7_str +80003acc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b8_str +80003af8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b9_str +80003b24 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b10_str +80003b50 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b11_str +80003b80 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b12_str +80003bb4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b13_str +80003be0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b14_str +80003c0c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b15_str +80003c38 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b16_str +80003c64 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b17_str +80003c90 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b18_str +80003cbc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b19_str +80003cec l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b20_str +80003d18 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b21_str +80003d44 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b22_str +80003d74 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b23_str +80003da0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b24_str +80003dcc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b25_str +80003df8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b26_str +80003e24 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b27_str +80003e50 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b28_str +80003e7c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b29_str +80003eac l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b30_str +80003ed8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs2_b31_str +80003f04 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b0_str +80003f34 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b1_str +80003f64 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b2_str +80003f90 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b3_str +80003fc4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b4_str +80003ff0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b5_str +8000401c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b6_str +80004050 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b7_str +8000407c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b8_str +800040a8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b9_str +800040d4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b10_str +80004100 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b11_str +8000412c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b12_str +80004158 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b13_str +80004184 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b14_str +800041b0 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b15_str +800041dc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b16_str +80004208 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b17_str +80004234 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b18_str +80004260 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b19_str +8000428c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b20_str +800042b8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b21_str +800042e4 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b22_str +80004314 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b23_str +80004340 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b24_str +80004370 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b25_str +8000439c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b26_str +800043cc l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b27_str +800043f8 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b28_str +80004424 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b29_str +80004450 l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b30_str +8000447c l .text.rvtest 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +800044ac l .text.rvtest 00000000 exit_Mcleanup +800044b0 l .text.rvtest 00000000 resto_Medeleg +800044b8 l .text.rvtest 00000000 resto_Msatp +800044bc l .text.rvtest 00000000 resto_Mscratch +800044c4 l .text.rvtest 00000000 resto_Mxtvec +800044d8 l .text.rvtest 00000000 resto_Mtramp +800044dc l .text.rvtest 00000000 resto_Mloop +800044f4 l .text.rvtest 00000000 check_trap_sig_overflow +80004790 l .text.rvtest 00000000 trap_sig_overflow +80004630 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046f4 l .text.rvtest 00000000 check_abort_test +800055a8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +80004710 l .text.rvtest 00000000 exit_cleanup +800047c4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004880 l .text.rvtest 00000000 trap_Mhandler +800049a0 l .text.rvtest 00000000 rvtest_Mendtest +800049c4 l .text.rvtest 00000000 common_Mhandler +80004a30 l .text.rvtest 00000000 spcl_M2mmode_test +80004a3c l .text.rvtest 00000000 spcl_Mchk4alt +80004a4c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a44 l .text.rvtest 00000000 spcl_Mparam_chk +800054d0 l .text.rvtest 00000000 Mrtn2mmode +80004fd4 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a58 l .text.rvtest 00000000 Mgoto_mchk +80004a5c l .text.rvtest 00000000 tsbi_Mdispatch +80004a84 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a74 l .text.rvtest 00000000 tsbi_Mecall_test +80004af0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005240 l .text.rvtest 00000000 resto_Mrtn +80004ab0 l .text.rvtest 00000000 tsbi_Mgoto_m +80004ac0 l .text.rvtest 00000000 tsbi_Mgoto_s +80004adc l .text.rvtest 00000000 tsbi_Mgoto_u +80004aec l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c70 l .text.rvtest 00000000 tsbi_instr_table +80004b20 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004b34 l .text.rvtest 00000000 found_instr +80004b78 l .text.rvtest 00000000 tsbi_instr_not_found +80004b64 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007058 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004ff0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004fdc l .text.rvtest 00000000 Mint_sig_sv +80004ff0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005088 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +8000512c l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005260 l .text.rvtest 00000000 common_Mint_handler +80005154 l .text.rvtest 00000000 common_Mexcpt_handler +80005160 l .text.rvtest 00000000 vmem_adj_Mepc +800051b4 l .text.rvtest 00000000 sv_Mepc +80005188 l .text.rvtest 00000000 code_adj_Mepc +800051b0 l .text.rvtest 00000000 adj_Mepc +8000519c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +800051d4 l .text.rvtest 00000000 skpsv_Mepc +800051fc l .text.rvtest 00000000 adj_Mepc_rtn +80005208 l .text.rvtest 00000000 skp_adj_Mepc +8000520c l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +8000522c l .text.rvtest 00000000 skp_Mtval +80005238 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005298 l .text.rvtest 00000000 spcl_Mhandler +80005274 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +800052b4 l .text.rvtest 00000000 spcl_Mdispatch_handling +800052cc l .text.rvtest 00000000 spcl_Mdispatch +800052d0 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +800053d0 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +80005520 l .text.rvtest 00000000 rtn_fm_mmode +8000550c l .text.rvtest 00000000 from_hs_u +800054fc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +800055dc l .text.rvtest 00000000 failedtest_saveregs +8000564c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ec l .text.rvtest 00000000 failedtest_saveresults_trap +8000565c l .text.rvtest 00000000 failedtest_saveresults_int +80005774 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800057ac l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005ae0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005aa0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005ab4 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 sv_Hcause_str +80010e65 l .data 00000000 sv_Hepc_str +80010f5a l .data 00000000 sv_Htval_str +800110c9 l .data 00000000 sv_Hip_str +80010cb1 l .data 00000000 sv_Vvect_str +80010dad l .data 00000000 sv_Vcause_str +80010ea2 l .data 00000000 sv_Vepc_str +80010f98 l .data 00000000 sv_Vtval_str +80011105 l .data 00000000 sv_Vip_str +80011142 l .data 00000000 Mclr_Mext_int_str +80011191 l .data 00000000 Mclr_Sext_int_str +8001128c l .data 00000000 Sclr_Sext_int_str +80011388 l .data 00000000 Hclr_Sext_int_str +80005ad0 l .text.rvtest 00000000 trap_diag_generic_report +80010494 l .data 00000000 trap_diag_mode +80005b10 l .text.rvtest 00000000 failedtest_report +80005b10 l .text.rvtest 00000000 print_failstr +80005b88 l .text.rvtest 00000000 print_testnamestr +80010adc l .data 00000000 testnamestr +80005bc8 l .text.rvtest 00000000 print_failure_test_name_str +80010480 l .data 00000000 failure_string_ptr +80005bd8 l .text.rvtest 00000000 print_newline_str +8000614c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005db8 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +800070d4 l .text.rvtest 00000000 failedtest_dec_to_str +80005ecc l .text.rvtest 00000000 failedtest_report_print_regstr +80005e0c l .text.rvtest 00000000 failedtest_report_fpreg +80005e58 l .text.rvtest 00000000 failedtest_report_vecreg +80005e94 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005f08 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f6c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f7c l .text.rvtest 00000000 failedtest_report_badval_done +8000604c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +8000600c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +8000601c l .text.rvtest 00000000 failedtest_report_expval_done +80006e04 l .text.rvtest 00000000 failedtest_report_end +800060cc l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006054 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +80006210 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c90 l .text.rvtest 00000000 trap_report_generic +8000654c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +8000642c l .text.rvtest 00000000 trap_report_missing_traps +8000631c l .text.rvtest 00000000 trap_report_extra_traps +80011713 l .data 00000000 trap_diag_extra_traps_str +8001177b l .data 00000000 trap_diag_diff_bytes_str +800117a2 l .data 00000000 trap_diag_extra_next_step_str +8001173f l .data 00000000 trap_diag_missing_traps_str +8001188a l .data 00000000 trap_diag_missing_next_step_str +80011971 l .data 00000000 trap_diag_handler_mode_str +800065e4 l .text.rvtest 00000000 trap_mode_m +80006624 l .text.rvtest 00000000 trap_mode_s +80006664 l .text.rvtest 00000000 trap_mode_h +800066a4 l .text.rvtest 00000000 trap_mode_v +800119ad l .data 00000000 trap_diag_mode_unknown_str +800066e0 l .text.rvtest 00000000 trap_mode_print +8001198b l .data 00000000 trap_diag_mode_m_str +80011993 l .data 00000000 trap_diag_mode_s_str +8001199b l .data 00000000 trap_diag_mode_hs_str +800119a4 l .data 00000000 trap_diag_mode_vs_str +800119b6 l .data 00000000 trap_diag_field_str +800067a4 l .text.rvtest 00000000 trap_field_vect +800067e4 l .text.rvtest 00000000 trap_field_cause +80006824 l .text.rvtest 00000000 trap_field_epc +80006864 l .text.rvtest 00000000 trap_field_tval +800068a4 l .text.rvtest 00000000 trap_field_ip +800068e4 l .text.rvtest 00000000 trap_field_tval2 +80006924 l .text.rvtest 00000000 trap_field_tinst +80006964 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +800069a0 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006b3c l .text.rvtest 00000000 trap_field_not_cause +80011b4a l .data 00000000 trap_diag_expected_cause_name_str +80006d74 l .text.rvtest 00000000 trap_cause_to_str +80011b61 l .data 00000000 trap_diag_actual_cause_name_str +80006b3c l .text.rvtest 00000000 trap_field_not_epc +80006e50 l .text.rvtest 00000000 failedtest_print_csr_context +80011bd7 l .data 00000000 trap_diag_hint_vect_str +80011cad l .data 00000000 trap_diag_hint_cause_str +80011da0 l .data 00000000 trap_diag_hint_epc_str +80011e9b l .data 00000000 trap_diag_hint_tval_str +80011f82 l .data 00000000 trap_diag_hint_ip_str +80011b8f l .data 00000000 trap_diag_generic_str +80010b78 l .data 00000000 xepcinstrstr +80006d98 l .text.rvtest 00000000 trap_cause_interrupt +80006d78 l .text.rvtest 00000000 trap_cause_exception +80006dc4 l .text.rvtest 00000000 trap_cause_unknown +800104f0 l .data 00000000 trap_excpt_name_tbl +80010550 l .data 00000000 trap_int_name_tbl +8001098e l .data 00000000 trap_cause_unknown_str +80006e48 l .text.rvtest 00000000 failedtest_terminate +800104a0 l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007098 l .text.rvtest 00000000 failedtest_hex_to_str_loop +800070b4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +800070b8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 +80010617 l .data 00000000 trap_excpt_name_6 +80010635 l .data 00000000 trap_excpt_name_7 +8001064d l .data 00000000 trap_excpt_name_8 +8001066b l .data 00000000 trap_excpt_name_9 +80010689 l .data 00000000 trap_excpt_name_10 +800106a8 l .data 00000000 trap_excpt_name_11 +800106c6 l .data 00000000 trap_excpt_name_12 +800106de l .data 00000000 trap_excpt_name_13 +800106ef l .data 00000000 trap_excpt_name_14 +800106fe l .data 00000000 trap_excpt_name_15 +80010714 l .data 00000000 trap_excpt_name_16 +80010721 l .data 00000000 trap_excpt_name_17 +80010730 l .data 00000000 trap_excpt_name_18 +80010740 l .data 00000000 trap_excpt_name_19 +80010750 l .data 00000000 trap_excpt_name_20 +8001076e l .data 00000000 trap_excpt_name_21 +80010785 l .data 00000000 trap_excpt_name_22 +8001079a l .data 00000000 trap_excpt_name_23 +800107b6 l .data 00000000 trap_int_name_0 +800107ce l .data 00000000 trap_int_name_1 +800107ed l .data 00000000 trap_int_name_2 +80010814 l .data 00000000 trap_int_name_3 +80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +800049d8 g .text.rvtest 00000000 common_Mentry +800044f4 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +8000449c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +8000449c g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004750 g .text.rvtest 00000000 rvtest_fail_summary +80004800 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd93ef68d +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x95cabfa2 +80000048: 0001ab83 lw x23,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sig0h_cg_cp_rs1_b0: + sha512sig0h x27, x0, x23 # perform operation +80000050: 5d700db3 sha512sig0h x27,x0,x23 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs1_b0, Zknh_sha512sig0h_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01b20863 beq x4,x27,80000068 +8000005c: 4e4052ef jal x5,80005540 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x06703d9f +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xcc82c470 +80000074: 0001ab03 lw x22,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sig0h_cg_cp_rs1_b1: + sha512sig0h x27, x1, x22 # perform operation +8000007c: 5d608db3 sha512sig0h x27,x1,x22 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs1_b1, Zknh_sha512sig0h_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01b20863 beq x4,x27,80000094 +80000088: 4b8052ef jal x5,80005540 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x1, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010093 addi x1,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x46578163 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xf7fe4e64 +800000a4: 0001a703 lw x14,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sig0h_cg_cp_rs1_b2: + sha512sig0h x11, x2, x14 # perform operation +800000ac: 5ce105b3 sha512sig0h x11,x2,x14 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknh_sha512sig0h_cg_cp_rs1_b2, Zknh_sha512sig0h_cg_cp_rs1_b2_str) +800000b0: 0000a203 lw x4,0(x1) +800000b4: 00b20863 beq x4,x11,800000c4 +800000b8: 488052ef jal x5,80005540 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 00408093 addi x1,x1,4 + + mv x6, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018313 addi x6,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xf1353487 +800000cc: 00032183 lw x3,0(x6) +800000d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x4f91dc16 +800000d4: 00032b03 lw x22,0(x6) +800000d8: 00430313 addi x6,x6,4 + +800000dc : +Zknh_sha512sig0h_cg_cp_rs1_b3: + sha512sig0h x2, x3, x22 # perform operation +800000dc: 5d618133 sha512sig0h x2,x3,x22 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknh_sha512sig0h_cg_cp_rs1_b3, Zknh_sha512sig0h_cg_cp_rs1_b3_str) +800000e0: 0000a203 lw x4,0(x1) +800000e4: 00220863 beq x4,x2,800000f4 +800000e8: 458052ef jal x5,80005540 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 00408093 addi x1,x1,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x9b510d59 +80000100: 00032203 lw x4,0(x6) +80000104: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x675718b7 +80000108: 00032183 lw x3,0(x6) +8000010c: 00430313 addi x6,x6,4 + +80000110 : +Zknh_sha512sig0h_cg_cp_rs1_b4: + sha512sig0h x17, x4, x3 # perform operation +80000110: 5c3208b3 sha512sig0h x17,x4,x3 + # Check if x17 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x17, Zknh_sha512sig0h_cg_cp_rs1_b4, Zknh_sha512sig0h_cg_cp_rs1_b4_str) +80000114: 0000a683 lw x13,0(x1) +80000118: 01168863 beq x13,x17,80000128 +8000011c: 4640576f jal x14,80005580 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x2cb396ba +8000012c: 00032283 lw x5,0(x6) +80000130: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x95703f0f +80000134: 00032983 lw x19,0(x6) +80000138: 00430313 addi x6,x6,4 + +8000013c : +Zknh_sha512sig0h_cg_cp_rs1_b5: + sha512sig0h x31, x5, x19 # perform operation +8000013c: 5d328fb3 sha512sig0h x31,x5,x19 + # Check if x31 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x31, Zknh_sha512sig0h_cg_cp_rs1_b5, Zknh_sha512sig0h_cg_cp_rs1_b5_str) +80000140: 0000a683 lw x13,0(x1) +80000144: 01f68863 beq x13,x31,80000154 +80000148: 4380576f jal x14,80005580 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 00408093 addi x1,x1,4 + + mv x21, x6 # switch data pointer register to avoid conflict with test +80000158: 00030a93 addi x21,x6,0 +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x0bac33ad +8000015c: 000aa303 lw x6,0(x21) +80000160: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xbedfd70b +80000164: 000aa903 lw x18,0(x21) +80000168: 004a8a93 addi x21,x21,4 + +8000016c : +Zknh_sha512sig0h_cg_cp_rs1_b6: + sha512sig0h x10, x6, x18 # perform operation +8000016c: 5d230533 sha512sig0h x10,x6,x18 + # Check if x10 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x10, Zknh_sha512sig0h_cg_cp_rs1_b6, Zknh_sha512sig0h_cg_cp_rs1_b6_str) +80000170: 0000a683 lw x13,0(x1) +80000174: 00a68863 beq x13,x10,80000184 +80000178: 4080576f jal x14,80005580 +8000017c: 8000016c .word 0x8000016c +80000180: 80009140 .word 0x80009140 +80000184: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xd714bbd2 +80000188: 000aa383 lw x7,0(x21) +8000018c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xb66669e4 +80000190: 000aaf83 lw x31,0(x21) +80000194: 004a8a93 addi x21,x21,4 + +80000198 : +Zknh_sha512sig0h_cg_cp_rs1_b7: + sha512sig0h x27, x7, x31 # perform operation +80000198: 5df38db3 sha512sig0h x27,x7,x31 + # Check if x27 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x27, Zknh_sha512sig0h_cg_cp_rs1_b7, Zknh_sha512sig0h_cg_cp_rs1_b7_str) +8000019c: 0000a683 lw x13,0(x1) +800001a0: 01b68863 beq x13,x27,800001b0 +800001a4: 3dc0576f jal x14,80005580 +800001a8: 80000198 .word 0x80000198 +800001ac: 80009178 .word 0x80009178 +800001b0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xafd89fbe +800001b4: 000aa403 lw x8,0(x21) +800001b8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xdab751ee +800001bc: 000aa203 lw x4,0(x21) +800001c0: 004a8a93 addi x21,x21,4 + +800001c4 : +Zknh_sha512sig0h_cg_cp_rs1_b8: + sha512sig0h x31, x8, x4 # perform operation +800001c4: 5c440fb3 sha512sig0h x31,x8,x4 + # Check if x31 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x31, Zknh_sha512sig0h_cg_cp_rs1_b8, Zknh_sha512sig0h_cg_cp_rs1_b8_str) +800001c8: 0000a683 lw x13,0(x1) +800001cc: 01f68863 beq x13,x31,800001dc +800001d0: 3b00576f jal x14,80005580 +800001d4: 800001c4 .word 0x800001c4 +800001d8: 800091b0 .word 0x800091b0 +800001dc: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x420e7042 +800001e0: 000aa483 lw x9,0(x21) +800001e4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x95189938 +800001e8: 000aaf83 lw x31,0(x21) +800001ec: 004a8a93 addi x21,x21,4 + +800001f0 : +Zknh_sha512sig0h_cg_cp_rs1_b9: + sha512sig0h x30, x9, x31 # perform operation +800001f0: 5df48f33 sha512sig0h x30,x9,x31 + # Check if x30 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x30, Zknh_sha512sig0h_cg_cp_rs1_b9, Zknh_sha512sig0h_cg_cp_rs1_b9_str) +800001f4: 0000a683 lw x13,0(x1) +800001f8: 01e68863 beq x13,x30,80000208 +800001fc: 3840576f jal x14,80005580 +80000200: 800001f0 .word 0x800001f0 +80000204: 800091e8 .word 0x800091e8 +80000208: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xfebaafbe +8000020c: 000aa503 lw x10,0(x21) +80000210: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xc720a070 +80000214: 000aa183 lw x3,0(x21) +80000218: 004a8a93 addi x21,x21,4 + +8000021c : +Zknh_sha512sig0h_cg_cp_rs1_b10: + sha512sig0h x22, x10, x3 # perform operation +8000021c: 5c350b33 sha512sig0h x22,x10,x3 + # Check if x22 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x22, Zknh_sha512sig0h_cg_cp_rs1_b10, Zknh_sha512sig0h_cg_cp_rs1_b10_str) +80000220: 0000a683 lw x13,0(x1) +80000224: 01668863 beq x13,x22,80000234 +80000228: 3580576f jal x14,80005580 +8000022c: 8000021c .word 0x8000021c +80000230: 80009221 .word 0x80009221 +80000234: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x30c3a3e8 +80000238: 000aa583 lw x11,0(x21) +8000023c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x826fa71c +80000240: 000aad83 lw x27,0(x21) +80000244: 004a8a93 addi x21,x21,4 + +80000248 : +Zknh_sha512sig0h_cg_cp_rs1_b11: + sha512sig0h x16, x11, x27 # perform operation +80000248: 5db58833 sha512sig0h x16,x11,x27 + # Check if x16 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x16, Zknh_sha512sig0h_cg_cp_rs1_b11, Zknh_sha512sig0h_cg_cp_rs1_b11_str) +8000024c: 0000a683 lw x13,0(x1) +80000250: 01068863 beq x13,x16,80000260 +80000254: 32c0576f jal x14,80005580 +80000258: 80000248 .word 0x80000248 +8000025c: 8000925b .word 0x8000925b +80000260: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x23287baf +80000264: 000aa603 lw x12,0(x21) +80000268: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xd5d454ac +8000026c: 000aad03 lw x26,0(x21) +80000270: 004a8a93 addi x21,x21,4 + +80000274 : +Zknh_sha512sig0h_cg_cp_rs1_b12: + sha512sig0h x27, x12, x26 # perform operation +80000274: 5da60db3 sha512sig0h x27,x12,x26 + # Check if x27 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x27, Zknh_sha512sig0h_cg_cp_rs1_b12, Zknh_sha512sig0h_cg_cp_rs1_b12_str) +80000278: 0000a683 lw x13,0(x1) +8000027c: 01b68863 beq x13,x27,8000028c +80000280: 3000576f jal x14,80005580 +80000284: 80000274 .word 0x80000274 +80000288: 80009295 .word 0x80009295 +8000028c: 00408093 addi x1,x1,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000290: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000294: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x07e1487a +80000298: 000aa683 lw x13,0(x21) +8000029c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x67ad0985 +800002a0: 000aab83 lw x23,0(x21) +800002a4: 004a8a93 addi x21,x21,4 + +800002a8 : +Zknh_sha512sig0h_cg_cp_rs1_b13: + sha512sig0h x7, x13, x23 # perform operation +800002a8: 5d7683b3 sha512sig0h x7,x13,x23 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknh_sha512sig0h_cg_cp_rs1_b13, Zknh_sha512sig0h_cg_cp_rs1_b13_str) +800002ac: 0000a203 lw x4,0(x1) +800002b0: 00720863 beq x4,x7,800002c0 +800002b4: 28c052ef jal x5,80005540 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 800092cf .word 0x800092cf +800002c0: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xa2b10301 +800002c4: 000aa703 lw x14,0(x21) +800002c8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x1995ab7c +800002cc: 000aa183 lw x3,0(x21) +800002d0: 004a8a93 addi x21,x21,4 + +800002d4 : +Zknh_sha512sig0h_cg_cp_rs1_b14: + sha512sig0h x31, x14, x3 # perform operation +800002d4: 5c370fb3 sha512sig0h x31,x14,x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknh_sha512sig0h_cg_cp_rs1_b14, Zknh_sha512sig0h_cg_cp_rs1_b14_str) +800002d8: 0000a203 lw x4,0(x1) +800002dc: 01f20863 beq x4,x31,800002ec +800002e0: 260052ef jal x5,80005540 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 80009309 .word 0x80009309 +800002ec: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x6ec4eced +800002f0: 000aa783 lw x15,0(x21) +800002f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x6a103da9 +800002f8: 000aa183 lw x3,0(x21) +800002fc: 004a8a93 addi x21,x21,4 + +80000300 : +Zknh_sha512sig0h_cg_cp_rs1_b15: + sha512sig0h x12, x15, x3 # perform operation +80000300: 5c378633 sha512sig0h x12,x15,x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs1_b15, Zknh_sha512sig0h_cg_cp_rs1_b15_str) +80000304: 0000a203 lw x4,0(x1) +80000308: 00c20863 beq x4,x12,80000318 +8000030c: 234052ef jal x5,80005540 +80000310: 80000300 .word 0x80000300 +80000314: 80009343 .word 0x80009343 +80000318: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x7f473949 +8000031c: 000aa803 lw x16,0(x21) +80000320: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x28f70995 +80000324: 000aa683 lw x13,0(x21) +80000328: 004a8a93 addi x21,x21,4 + +8000032c : +Zknh_sha512sig0h_cg_cp_rs1_b16: + sha512sig0h x19, x16, x13 # perform operation +8000032c: 5cd809b3 sha512sig0h x19,x16,x13 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknh_sha512sig0h_cg_cp_rs1_b16, Zknh_sha512sig0h_cg_cp_rs1_b16_str) +80000330: 0000a203 lw x4,0(x1) +80000334: 01320863 beq x4,x19,80000344 +80000338: 208052ef jal x5,80005540 +8000033c: 8000032c .word 0x8000032c +80000340: 8000937d .word 0x8000937d +80000344: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x451e0c7b +80000348: 000aa883 lw x17,0(x21) +8000034c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x6cda8115 +80000350: 000aab83 lw x23,0(x21) +80000354: 004a8a93 addi x21,x21,4 + +80000358 : +Zknh_sha512sig0h_cg_cp_rs1_b17: + sha512sig0h x16, x17, x23 # perform operation +80000358: 5d788833 sha512sig0h x16,x17,x23 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknh_sha512sig0h_cg_cp_rs1_b17, Zknh_sha512sig0h_cg_cp_rs1_b17_str) +8000035c: 0000a203 lw x4,0(x1) +80000360: 01020863 beq x4,x16,80000370 +80000364: 1dc052ef jal x5,80005540 +80000368: 80000358 .word 0x80000358 +8000036c: 800093b7 .word 0x800093b7 +80000370: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x4f0c7dfc +80000374: 000aa903 lw x18,0(x21) +80000378: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x8588626e +8000037c: 000aae03 lw x28,0(x21) +80000380: 004a8a93 addi x21,x21,4 + +80000384 : +Zknh_sha512sig0h_cg_cp_rs1_b18: + sha512sig0h x12, x18, x28 # perform operation +80000384: 5dc90633 sha512sig0h x12,x18,x28 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs1_b18, Zknh_sha512sig0h_cg_cp_rs1_b18_str) +80000388: 0000a203 lw x4,0(x1) +8000038c: 00c20863 beq x4,x12,8000039c +80000390: 1b0052ef jal x5,80005540 +80000394: 80000384 .word 0x80000384 +80000398: 800093f1 .word 0x800093f1 +8000039c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x7ac6a30e +800003a0: 000aa983 lw x19,0(x21) +800003a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xfdbc67d0 +800003a8: 000aa783 lw x15,0(x21) +800003ac: 004a8a93 addi x21,x21,4 + +800003b0 : +Zknh_sha512sig0h_cg_cp_rs1_b19: + sha512sig0h x10, x19, x15 # perform operation +800003b0: 5cf98533 sha512sig0h x10,x19,x15 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rs1_b19, Zknh_sha512sig0h_cg_cp_rs1_b19_str) +800003b4: 0000a203 lw x4,0(x1) +800003b8: 00a20863 beq x4,x10,800003c8 +800003bc: 184052ef jal x5,80005540 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000942b .word 0x8000942b +800003c8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x92dabed5 +800003cc: 000aaa03 lw x20,0(x21) +800003d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0xaef6fead +800003d4: 000aac83 lw x25,0(x21) +800003d8: 004a8a93 addi x21,x21,4 + +800003dc : +Zknh_sha512sig0h_cg_cp_rs1_b20: + sha512sig0h x12, x20, x25 # perform operation +800003dc: 5d9a0633 sha512sig0h x12,x20,x25 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs1_b20, Zknh_sha512sig0h_cg_cp_rs1_b20_str) +800003e0: 0000a203 lw x4,0(x1) +800003e4: 00c20863 beq x4,x12,800003f4 +800003e8: 158052ef jal x5,80005540 +800003ec: 800003dc .word 0x800003dc +800003f0: 80009465 .word 0x80009465 +800003f4: 00408093 addi x1,x1,4 + + mv x30, x21 # switch data pointer register to avoid conflict with test +800003f8: 000a8f13 addi x30,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xf80df6b4 +800003fc: 000f2a83 lw x21,0(x30) +80000400: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0x8c1f7b96 +80000404: 000f2183 lw x3,0(x30) +80000408: 004f0f13 addi x30,x30,4 + +8000040c : +Zknh_sha512sig0h_cg_cp_rs1_b21: + sha512sig0h x23, x21, x3 # perform operation +8000040c: 5c3a8bb3 sha512sig0h x23,x21,x3 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknh_sha512sig0h_cg_cp_rs1_b21, Zknh_sha512sig0h_cg_cp_rs1_b21_str) +80000410: 0000a203 lw x4,0(x1) +80000414: 01720863 beq x4,x23,80000424 +80000418: 128052ef jal x5,80005540 +8000041c: 8000040c .word 0x8000040c +80000420: 8000949f .word 0x8000949f +80000424: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x843df88a +80000428: 000f2b03 lw x22,0(x30) +8000042c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x637f489e +80000430: 000f2703 lw x14,0(x30) +80000434: 004f0f13 addi x30,x30,4 + +80000438 : +Zknh_sha512sig0h_cg_cp_rs1_b22: + sha512sig0h x3, x22, x14 # perform operation +80000438: 5ceb01b3 sha512sig0h x3,x22,x14 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rs1_b22, Zknh_sha512sig0h_cg_cp_rs1_b22_str) +8000043c: 0000a203 lw x4,0(x1) +80000440: 00320863 beq x4,x3,80000450 +80000444: 0fc052ef jal x5,80005540 +80000448: 80000438 .word 0x80000438 +8000044c: 800094d9 .word 0x800094d9 +80000450: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x6aaf82de +80000454: 000f2b83 lw x23,0(x30) +80000458: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x27143b05 +8000045c: 000f2983 lw x19,0(x30) +80000460: 004f0f13 addi x30,x30,4 + +80000464 : +Zknh_sha512sig0h_cg_cp_rs1_b23: + sha512sig0h x17, x23, x19 # perform operation +80000464: 5d3b88b3 sha512sig0h x17,x23,x19 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zknh_sha512sig0h_cg_cp_rs1_b23, Zknh_sha512sig0h_cg_cp_rs1_b23_str) +80000468: 0000a203 lw x4,0(x1) +8000046c: 01120863 beq x4,x17,8000047c +80000470: 0d0052ef jal x5,80005540 +80000474: 80000464 .word 0x80000464 +80000478: 80009513 .word 0x80009513 +8000047c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x206ed408 +80000480: 000f2c03 lw x24,0(x30) +80000484: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xb2bcd86d +80000488: 000f2983 lw x19,0(x30) +8000048c: 004f0f13 addi x30,x30,4 + +80000490 : +Zknh_sha512sig0h_cg_cp_rs1_b24: + sha512sig0h x26, x24, x19 # perform operation +80000490: 5d3c0d33 sha512sig0h x26,x24,x19 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknh_sha512sig0h_cg_cp_rs1_b24, Zknh_sha512sig0h_cg_cp_rs1_b24_str) +80000494: 0000a203 lw x4,0(x1) +80000498: 01a20863 beq x4,x26,800004a8 +8000049c: 0a4052ef jal x5,80005540 +800004a0: 80000490 .word 0x80000490 +800004a4: 8000954d .word 0x8000954d +800004a8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xf692dac5 +800004ac: 000f2c83 lw x25,0(x30) +800004b0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x3082bbd3 +800004b4: 000f2d83 lw x27,0(x30) +800004b8: 004f0f13 addi x30,x30,4 + +800004bc : +Zknh_sha512sig0h_cg_cp_rs1_b25: + sha512sig0h x20, x25, x27 # perform operation +800004bc: 5dbc8a33 sha512sig0h x20,x25,x27 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknh_sha512sig0h_cg_cp_rs1_b25, Zknh_sha512sig0h_cg_cp_rs1_b25_str) +800004c0: 0000a203 lw x4,0(x1) +800004c4: 01420863 beq x4,x20,800004d4 +800004c8: 078052ef jal x5,80005540 +800004cc: 800004bc .word 0x800004bc +800004d0: 80009587 .word 0x80009587 +800004d4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x9e633c7c +800004d8: 000f2d03 lw x26,0(x30) +800004dc: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xc1f8e26d +800004e0: 000f2b83 lw x23,0(x30) +800004e4: 004f0f13 addi x30,x30,4 + +800004e8 : +Zknh_sha512sig0h_cg_cp_rs1_b26: + sha512sig0h x6, x26, x23 # perform operation +800004e8: 5d7d0333 sha512sig0h x6,x26,x23 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zknh_sha512sig0h_cg_cp_rs1_b26, Zknh_sha512sig0h_cg_cp_rs1_b26_str) +800004ec: 0000a203 lw x4,0(x1) +800004f0: 00620863 beq x4,x6,80000500 +800004f4: 04c052ef jal x5,80005540 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800095c1 .word 0x800095c1 +80000500: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0xb7061745 +80000504: 000f2d83 lw x27,0(x30) +80000508: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x1b0a749e +8000050c: 000f2703 lw x14,0(x30) +80000510: 004f0f13 addi x30,x30,4 + +80000514 : +Zknh_sha512sig0h_cg_cp_rs1_b27: + sha512sig0h x12, x27, x14 # perform operation +80000514: 5ced8633 sha512sig0h x12,x27,x14 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs1_b27, Zknh_sha512sig0h_cg_cp_rs1_b27_str) +80000518: 0000a203 lw x4,0(x1) +8000051c: 00c20863 beq x4,x12,8000052c +80000520: 020052ef jal x5,80005540 +80000524: 80000514 .word 0x80000514 +80000528: 800095fb .word 0x800095fb +8000052c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xb95de3c1 +80000530: 000f2e03 lw x28,0(x30) +80000534: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x521813b5 +80000538: 000f2983 lw x19,0(x30) +8000053c: 004f0f13 addi x30,x30,4 + +80000540 : +Zknh_sha512sig0h_cg_cp_rs1_b28: + sha512sig0h x26, x28, x19 # perform operation +80000540: 5d3e0d33 sha512sig0h x26,x28,x19 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknh_sha512sig0h_cg_cp_rs1_b28, Zknh_sha512sig0h_cg_cp_rs1_b28_str) +80000544: 0000a203 lw x4,0(x1) +80000548: 01a20863 beq x4,x26,80000558 +8000054c: 7f5042ef jal x5,80005540 +80000550: 80000540 .word 0x80000540 +80000554: 80009635 .word 0x80009635 +80000558: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xabe697a3 +8000055c: 000f2e83 lw x29,0(x30) +80000560: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x47a2faef +80000564: 000f2e03 lw x28,0(x30) +80000568: 004f0f13 addi x30,x30,4 + +8000056c : +Zknh_sha512sig0h_cg_cp_rs1_b29: + sha512sig0h x21, x29, x28 # perform operation +8000056c: 5dce8ab3 sha512sig0h x21,x29,x28 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknh_sha512sig0h_cg_cp_rs1_b29, Zknh_sha512sig0h_cg_cp_rs1_b29_str) +80000570: 0000a203 lw x4,0(x1) +80000574: 01520863 beq x4,x21,80000584 +80000578: 7c9042ef jal x5,80005540 +8000057c: 8000056c .word 0x8000056c +80000580: 8000966f .word 0x8000966f +80000584: 00408093 addi x1,x1,4 + + mv x3, x30 # switch data pointer register to avoid conflict with test +80000588: 000f0193 addi x3,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x3603137d +8000058c: 0001af03 lw x30,0(x3) +80000590: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x832c3443 +80000594: 0001ae83 lw x29,0(x3) +80000598: 00418193 addi x3,x3,4 + +8000059c : +Zknh_sha512sig0h_cg_cp_rs1_b30: + sha512sig0h x10, x30, x29 # perform operation +8000059c: 5ddf0533 sha512sig0h x10,x30,x29 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rs1_b30, Zknh_sha512sig0h_cg_cp_rs1_b30_str) +800005a0: 0000a203 lw x4,0(x1) +800005a4: 00a20863 beq x4,x10,800005b4 +800005a8: 799042ef jal x5,80005540 +800005ac: 8000059c .word 0x8000059c +800005b0: 800096a9 .word 0x800096a9 +800005b4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xec35c4ae +800005b8: 0001af83 lw x31,0(x3) +800005bc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xac29075f +800005c0: 0001a383 lw x7,0(x3) +800005c4: 00418193 addi x3,x3,4 + +800005c8 : +Zknh_sha512sig0h_cg_cp_rs1_b31: + sha512sig0h x11, x31, x7 # perform operation +800005c8: 5c7f85b3 sha512sig0h x11,x31,x7 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknh_sha512sig0h_cg_cp_rs1_b31, Zknh_sha512sig0h_cg_cp_rs1_b31_str) +800005cc: 0000a203 lw x4,0(x1) +800005d0: 00b20863 beq x4,x11,800005e0 +800005d4: 76d042ef jal x5,80005540 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 800096e3 .word 0x800096e3 +800005e0: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x53393f1b +800005e4: 0001ac03 lw x24,0(x3) +800005e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x3611e076 +800005ec: 0001a003 lw x0,0(x3) +800005f0: 00418193 addi x3,x3,4 + +800005f4 : +Zknh_sha512sig0h_cg_cp_rs2_b0: + sha512sig0h x30, x24, x0 # perform operation +800005f4: 5c0c0f33 sha512sig0h x30,x24,x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rs2_b0, Zknh_sha512sig0h_cg_cp_rs2_b0_str) +800005f8: 0000a203 lw x4,0(x1) +800005fc: 01e20863 beq x4,x30,8000060c +80000600: 741042ef jal x5,80005540 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000971d .word 0x8000971d +8000060c: 00408093 addi x1,x1,4 + + mv x22, x1 # switch signature pointer register to avoid conflict with test +80000610: 00008b13 addi x22,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x78e140c0 +80000614: 0001a703 lw x14,0(x3) +80000618: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x663f7249 +8000061c: 0001a083 lw x1,0(x3) +80000620: 00418193 addi x3,x3,4 + +80000624 : +Zknh_sha512sig0h_cg_cp_rs2_b1: + sha512sig0h x9, x14, x1 # perform operation +80000624: 5c1704b3 sha512sig0h x9,x14,x1 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zknh_sha512sig0h_cg_cp_rs2_b1, Zknh_sha512sig0h_cg_cp_rs2_b1_str) +80000628: 000b2203 lw x4,0(x22) +8000062c: 00920863 beq x4,x9,8000063c +80000630: 711042ef jal x5,80005540 +80000634: 80000624 .word 0x80000624 +80000638: 80009756 .word 0x80009756 +8000063c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x057afec6 +80000640: 0001a603 lw x12,0(x3) +80000644: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x32b51c0a +80000648: 0001a103 lw x2,0(x3) +8000064c: 00418193 addi x3,x3,4 + +80000650 : +Zknh_sha512sig0h_cg_cp_rs2_b2: + sha512sig0h x30, x12, x2 # perform operation +80000650: 5c260f33 sha512sig0h x30,x12,x2 + # Check if x30 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rs2_b2, Zknh_sha512sig0h_cg_cp_rs2_b2_str) +80000654: 000b2203 lw x4,0(x22) +80000658: 01e20863 beq x4,x30,80000668 +8000065c: 6e5042ef jal x5,80005540 +80000660: 80000650 .word 0x80000650 +80000664: 8000978f .word 0x8000978f +80000668: 004b0b13 addi x22,x22,4 + + mv x11, x3 # switch data pointer register to avoid conflict with test +8000066c: 00018593 addi x11,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x24b09cfd +80000670: 0005ac83 lw x25,0(x11) +80000674: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xccade7f9 +80000678: 0005a183 lw x3,0(x11) +8000067c: 00458593 addi x11,x11,4 + +80000680 : +Zknh_sha512sig0h_cg_cp_rs2_b3: + sha512sig0h x13, x25, x3 # perform operation +80000680: 5c3c86b3 sha512sig0h x13,x25,x3 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknh_sha512sig0h_cg_cp_rs2_b3, Zknh_sha512sig0h_cg_cp_rs2_b3_str) +80000684: 000b2203 lw x4,0(x22) +80000688: 00d20863 beq x4,x13,80000698 +8000068c: 6b5042ef jal x5,80005540 +80000690: 80000680 .word 0x80000680 +80000694: 800097c8 .word 0x800097c8 +80000698: 004b0b13 addi x22,x22,4 + + mv x13, x4 # switch temp register to avoid conflict with test +8000069c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800006a0: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xe4a44e3b +800006a4: 0005a083 lw x1,0(x11) +800006a8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xedb7bdb7 +800006ac: 0005a203 lw x4,0(x11) +800006b0: 00458593 addi x11,x11,4 + +800006b4 : +Zknh_sha512sig0h_cg_cp_rs2_b4: + sha512sig0h x6, x1, x4 # perform operation +800006b4: 5c408333 sha512sig0h x6,x1,x4 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zknh_sha512sig0h_cg_cp_rs2_b4, Zknh_sha512sig0h_cg_cp_rs2_b4_str) +800006b8: 000b2683 lw x13,0(x22) +800006bc: 00668863 beq x13,x6,800006cc +800006c0: 6c10476f jal x14,80005580 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 80009801 .word 0x80009801 +800006cc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x21691be5 +800006d0: 0005ae83 lw x29,0(x11) +800006d4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xb9cb54e4 +800006d8: 0005a283 lw x5,0(x11) +800006dc: 00458593 addi x11,x11,4 + +800006e0 : +Zknh_sha512sig0h_cg_cp_rs2_b5: + sha512sig0h x8, x29, x5 # perform operation +800006e0: 5c5e8433 sha512sig0h x8,x29,x5 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig0h_cg_cp_rs2_b5, Zknh_sha512sig0h_cg_cp_rs2_b5_str) +800006e4: 000b2683 lw x13,0(x22) +800006e8: 00868863 beq x13,x8,800006f8 +800006ec: 6950476f jal x14,80005580 +800006f0: 800006e0 .word 0x800006e0 +800006f4: 8000983a .word 0x8000983a +800006f8: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x356bd957 +800006fc: 0005ad03 lw x26,0(x11) +80000700: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x71f028b5 +80000704: 0005a303 lw x6,0(x11) +80000708: 00458593 addi x11,x11,4 + +8000070c : +Zknh_sha512sig0h_cg_cp_rs2_b6: + sha512sig0h x29, x26, x6 # perform operation +8000070c: 5c6d0eb3 sha512sig0h x29,x26,x6 + # Check if x29 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x29, Zknh_sha512sig0h_cg_cp_rs2_b6, Zknh_sha512sig0h_cg_cp_rs2_b6_str) +80000710: 000b2683 lw x13,0(x22) +80000714: 01d68863 beq x13,x29,80000724 +80000718: 6690476f jal x14,80005580 +8000071c: 8000070c .word 0x8000070c +80000720: 80009873 .word 0x80009873 +80000724: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x89338f55 +80000728: 0005af03 lw x30,0(x11) +8000072c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0xbd284e3a +80000730: 0005a383 lw x7,0(x11) +80000734: 00458593 addi x11,x11,4 + +80000738 : +Zknh_sha512sig0h_cg_cp_rs2_b7: + sha512sig0h x16, x30, x7 # perform operation +80000738: 5c7f0833 sha512sig0h x16,x30,x7 + # Check if x16 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x16, Zknh_sha512sig0h_cg_cp_rs2_b7, Zknh_sha512sig0h_cg_cp_rs2_b7_str) +8000073c: 000b2683 lw x13,0(x22) +80000740: 01068863 beq x13,x16,80000750 +80000744: 63d0476f jal x14,80005580 +80000748: 80000738 .word 0x80000738 +8000074c: 800098ac .word 0x800098ac +80000750: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x0e029010 +80000754: 0005ae03 lw x28,0(x11) +80000758: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0x7797d380 +8000075c: 0005a403 lw x8,0(x11) +80000760: 00458593 addi x11,x11,4 + +80000764 : +Zknh_sha512sig0h_cg_cp_rs2_b8: + sha512sig0h x0, x28, x8 # perform operation +80000764: 5c8e0033 sha512sig0h x0,x28,x8 + # Check if x0 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x0, Zknh_sha512sig0h_cg_cp_rs2_b8, Zknh_sha512sig0h_cg_cp_rs2_b8_str) +80000768: 000b2683 lw x13,0(x22) +8000076c: 00068863 beq x13,x0,8000077c +80000770: 6110476f jal x14,80005580 +80000774: 80000764 .word 0x80000764 +80000778: 800098e5 .word 0x800098e5 +8000077c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xa4d15dd6 +80000780: 0005a503 lw x10,0(x11) +80000784: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x08501064 +80000788: 0005a483 lw x9,0(x11) +8000078c: 00458593 addi x11,x11,4 + +80000790 : +Zknh_sha512sig0h_cg_cp_rs2_b9: + sha512sig0h x28, x10, x9 # perform operation +80000790: 5c950e33 sha512sig0h x28,x10,x9 + # Check if x28 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x28, Zknh_sha512sig0h_cg_cp_rs2_b9, Zknh_sha512sig0h_cg_cp_rs2_b9_str) +80000794: 000b2683 lw x13,0(x22) +80000798: 01c68863 beq x13,x28,800007a8 +8000079c: 5e50476f jal x14,80005580 +800007a0: 80000790 .word 0x80000790 +800007a4: 8000991e .word 0x8000991e +800007a8: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x0289ed68 +800007ac: 0005a383 lw x7,0(x11) +800007b0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x06ae2afd +800007b4: 0005a503 lw x10,0(x11) +800007b8: 00458593 addi x11,x11,4 + +800007bc : +Zknh_sha512sig0h_cg_cp_rs2_b10: + sha512sig0h x30, x7, x10 # perform operation +800007bc: 5ca38f33 sha512sig0h x30,x7,x10 + # Check if x30 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x30, Zknh_sha512sig0h_cg_cp_rs2_b10, Zknh_sha512sig0h_cg_cp_rs2_b10_str) +800007c0: 000b2683 lw x13,0(x22) +800007c4: 01e68863 beq x13,x30,800007d4 +800007c8: 5b90476f jal x14,80005580 +800007cc: 800007bc .word 0x800007bc +800007d0: 80009957 .word 0x80009957 +800007d4: 004b0b13 addi x22,x22,4 + + mv x12, x11 # switch data pointer register to avoid conflict with test +800007d8: 00058613 addi x12,x11,0 +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xeb9dbcc2 +800007dc: 00062803 lw x16,0(x12) +800007e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x1bfe034f +800007e4: 00062583 lw x11,0(x12) +800007e8: 00460613 addi x12,x12,4 + +800007ec : +Zknh_sha512sig0h_cg_cp_rs2_b11: + sha512sig0h x20, x16, x11 # perform operation +800007ec: 5cb80a33 sha512sig0h x20,x16,x11 + # Check if x20 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x20, Zknh_sha512sig0h_cg_cp_rs2_b11, Zknh_sha512sig0h_cg_cp_rs2_b11_str) +800007f0: 000b2683 lw x13,0(x22) +800007f4: 01468863 beq x13,x20,80000804 +800007f8: 5890476f jal x14,80005580 +800007fc: 800007ec .word 0x800007ec +80000800: 80009991 .word 0x80009991 +80000804: 004b0b13 addi x22,x22,4 + + mv x9, x12 # switch data pointer register to avoid conflict with test +80000808: 00060493 addi x9,x12,0 +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x27581f49 +8000080c: 0004a103 lw x2,0(x9) +80000810: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xfaeaf612 +80000814: 0004a603 lw x12,0(x9) +80000818: 00448493 addi x9,x9,4 + +8000081c : +Zknh_sha512sig0h_cg_cp_rs2_b12: + sha512sig0h x17, x2, x12 # perform operation +8000081c: 5cc108b3 sha512sig0h x17,x2,x12 + # Check if x17 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x17, Zknh_sha512sig0h_cg_cp_rs2_b12, Zknh_sha512sig0h_cg_cp_rs2_b12_str) +80000820: 000b2683 lw x13,0(x22) +80000824: 01168863 beq x13,x17,80000834 +80000828: 5590476f jal x14,80005580 +8000082c: 8000081c .word 0x8000081c +80000830: 800099cb .word 0x800099cb +80000834: 004b0b13 addi x22,x22,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000838: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000083c: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x5c0c47fb +80000840: 0004a603 lw x12,0(x9) +80000844: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x453bd50b +80000848: 0004a683 lw x13,0(x9) +8000084c: 00448493 addi x9,x9,4 + +80000850 : +Zknh_sha512sig0h_cg_cp_rs2_b13: + sha512sig0h x30, x12, x13 # perform operation +80000850: 5cd60f33 sha512sig0h x30,x12,x13 + # Check if x30 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rs2_b13, Zknh_sha512sig0h_cg_cp_rs2_b13_str) +80000854: 000b2203 lw x4,0(x22) +80000858: 01e20863 beq x4,x30,80000868 +8000085c: 4e5042ef jal x5,80005540 +80000860: 80000850 .word 0x80000850 +80000864: 80009a05 .word 0x80009a05 +80000868: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x8e563979 +8000086c: 0004ad83 lw x27,0(x9) +80000870: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0xe9ea5550 +80000874: 0004a703 lw x14,0(x9) +80000878: 00448493 addi x9,x9,4 + +8000087c : +Zknh_sha512sig0h_cg_cp_rs2_b14: + sha512sig0h x10, x27, x14 # perform operation +8000087c: 5ced8533 sha512sig0h x10,x27,x14 + # Check if x10 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rs2_b14, Zknh_sha512sig0h_cg_cp_rs2_b14_str) +80000880: 000b2203 lw x4,0(x22) +80000884: 00a20863 beq x4,x10,80000894 +80000888: 4b9042ef jal x5,80005540 +8000088c: 8000087c .word 0x8000087c +80000890: 80009a3f .word 0x80009a3f +80000894: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x84d9eec2 +80000898: 0004ab83 lw x23,0(x9) +8000089c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x88832ca1 +800008a0: 0004a783 lw x15,0(x9) +800008a4: 00448493 addi x9,x9,4 + +800008a8 : +Zknh_sha512sig0h_cg_cp_rs2_b15: + sha512sig0h x12, x23, x15 # perform operation +800008a8: 5cfb8633 sha512sig0h x12,x23,x15 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs2_b15, Zknh_sha512sig0h_cg_cp_rs2_b15_str) +800008ac: 000b2203 lw x4,0(x22) +800008b0: 00c20863 beq x4,x12,800008c0 +800008b4: 48d042ef jal x5,80005540 +800008b8: 800008a8 .word 0x800008a8 +800008bc: 80009a79 .word 0x80009a79 +800008c0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x17ed6d77 +800008c4: 0004ad03 lw x26,0(x9) +800008c8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x217e5171 +800008cc: 0004a803 lw x16,0(x9) +800008d0: 00448493 addi x9,x9,4 + +800008d4 : +Zknh_sha512sig0h_cg_cp_rs2_b16: + sha512sig0h x10, x26, x16 # perform operation +800008d4: 5d0d0533 sha512sig0h x10,x26,x16 + # Check if x10 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rs2_b16, Zknh_sha512sig0h_cg_cp_rs2_b16_str) +800008d8: 000b2203 lw x4,0(x22) +800008dc: 00a20863 beq x4,x10,800008ec +800008e0: 461042ef jal x5,80005540 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 80009ab3 .word 0x80009ab3 +800008ec: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xd4ee2058 +800008f0: 0004a783 lw x15,0(x9) +800008f4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x2f60341b +800008f8: 0004a883 lw x17,0(x9) +800008fc: 00448493 addi x9,x9,4 + +80000900 : +Zknh_sha512sig0h_cg_cp_rs2_b17: + sha512sig0h x0, x15, x17 # perform operation +80000900: 5d178033 sha512sig0h x0,x15,x17 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zknh_sha512sig0h_cg_cp_rs2_b17, Zknh_sha512sig0h_cg_cp_rs2_b17_str) +80000904: 000b2203 lw x4,0(x22) +80000908: 00020863 beq x4,x0,80000918 +8000090c: 435042ef jal x5,80005540 +80000910: 80000900 .word 0x80000900 +80000914: 80009aed .word 0x80009aed +80000918: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0x8acb63c0 +8000091c: 0004a603 lw x12,0(x9) +80000920: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xc3ef3d76 +80000924: 0004a903 lw x18,0(x9) +80000928: 00448493 addi x9,x9,4 + +8000092c : +Zknh_sha512sig0h_cg_cp_rs2_b18: + sha512sig0h x19, x12, x18 # perform operation +8000092c: 5d2609b3 sha512sig0h x19,x12,x18 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sig0h_cg_cp_rs2_b18, Zknh_sha512sig0h_cg_cp_rs2_b18_str) +80000930: 000b2203 lw x4,0(x22) +80000934: 01320863 beq x4,x19,80000944 +80000938: 409042ef jal x5,80005540 +8000093c: 8000092c .word 0x8000092c +80000940: 80009b27 .word 0x80009b27 +80000944: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xdae8ff6b +80000948: 0004ac03 lw x24,0(x9) +8000094c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xfc765c8d +80000950: 0004a983 lw x19,0(x9) +80000954: 00448493 addi x9,x9,4 + +80000958 : +Zknh_sha512sig0h_cg_cp_rs2_b19: + sha512sig0h x17, x24, x19 # perform operation +80000958: 5d3c08b3 sha512sig0h x17,x24,x19 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zknh_sha512sig0h_cg_cp_rs2_b19, Zknh_sha512sig0h_cg_cp_rs2_b19_str) +8000095c: 000b2203 lw x4,0(x22) +80000960: 01120863 beq x4,x17,80000970 +80000964: 3dd042ef jal x5,80005540 +80000968: 80000958 .word 0x80000958 +8000096c: 80009b61 .word 0x80009b61 +80000970: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xa9698103 +80000974: 0004a083 lw x1,0(x9) +80000978: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x03058a4c +8000097c: 0004aa03 lw x20,0(x9) +80000980: 00448493 addi x9,x9,4 + +80000984 : +Zknh_sha512sig0h_cg_cp_rs2_b20: + sha512sig0h x27, x1, x20 # perform operation +80000984: 5d408db3 sha512sig0h x27,x1,x20 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs2_b20, Zknh_sha512sig0h_cg_cp_rs2_b20_str) +80000988: 000b2203 lw x4,0(x22) +8000098c: 01b20863 beq x4,x27,8000099c +80000990: 3b1042ef jal x5,80005540 +80000994: 80000984 .word 0x80000984 +80000998: 80009b9b .word 0x80009b9b +8000099c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x2c3bb919 +800009a0: 0004ab83 lw x23,0(x9) +800009a4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x9dc033ee +800009a8: 0004aa83 lw x21,0(x9) +800009ac: 00448493 addi x9,x9,4 + +800009b0 : +Zknh_sha512sig0h_cg_cp_rs2_b21: + sha512sig0h x8, x23, x21 # perform operation +800009b0: 5d5b8433 sha512sig0h x8,x23,x21 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zknh_sha512sig0h_cg_cp_rs2_b21, Zknh_sha512sig0h_cg_cp_rs2_b21_str) +800009b4: 000b2203 lw x4,0(x22) +800009b8: 00820863 beq x4,x8,800009c8 +800009bc: 385042ef jal x5,80005540 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 80009bd5 .word 0x80009bd5 +800009c8: 004b0b13 addi x22,x22,4 + + mv x16, x22 # switch signature pointer register to avoid conflict with test +800009cc: 000b0813 addi x16,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0xc0115654 +800009d0: 0004ad83 lw x27,0(x9) +800009d4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xbb02fcf5 +800009d8: 0004ab03 lw x22,0(x9) +800009dc: 00448493 addi x9,x9,4 + +800009e0 : +Zknh_sha512sig0h_cg_cp_rs2_b22: + sha512sig0h x14, x27, x22 # perform operation +800009e0: 5d6d8733 sha512sig0h x14,x27,x22 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknh_sha512sig0h_cg_cp_rs2_b22, Zknh_sha512sig0h_cg_cp_rs2_b22_str) +800009e4: 00082203 lw x4,0(x16) +800009e8: 00e20863 beq x4,x14,800009f8 +800009ec: 355042ef jal x5,80005540 +800009f0: 800009e0 .word 0x800009e0 +800009f4: 80009c0f .word 0x80009c0f +800009f8: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x02e6f26a +800009fc: 0004ac03 lw x24,0(x9) +80000a00: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x1afeacc6 +80000a04: 0004ab83 lw x23,0(x9) +80000a08: 00448493 addi x9,x9,4 + +80000a0c : +Zknh_sha512sig0h_cg_cp_rs2_b23: + sha512sig0h x27, x24, x23 # perform operation +80000a0c: 5d7c0db3 sha512sig0h x27,x24,x23 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs2_b23, Zknh_sha512sig0h_cg_cp_rs2_b23_str) +80000a10: 00082203 lw x4,0(x16) +80000a14: 01b20863 beq x4,x27,80000a24 +80000a18: 329042ef jal x5,80005540 +80000a1c: 80000a0c .word 0x80000a0c +80000a20: 80009c49 .word 0x80009c49 +80000a24: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xec6ec663 +80000a28: 0004a903 lw x18,0(x9) +80000a2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x362b67bb +80000a30: 0004ac03 lw x24,0(x9) +80000a34: 00448493 addi x9,x9,4 + +80000a38 : +Zknh_sha512sig0h_cg_cp_rs2_b24: + sha512sig0h x23, x18, x24 # perform operation +80000a38: 5d890bb3 sha512sig0h x23,x18,x24 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknh_sha512sig0h_cg_cp_rs2_b24, Zknh_sha512sig0h_cg_cp_rs2_b24_str) +80000a3c: 00082203 lw x4,0(x16) +80000a40: 01720863 beq x4,x23,80000a50 +80000a44: 2fd042ef jal x5,80005540 +80000a48: 80000a38 .word 0x80000a38 +80000a4c: 80009c83 .word 0x80009c83 +80000a50: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x06751d36 +80000a54: 0004ab03 lw x22,0(x9) +80000a58: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x38ba3b99 +80000a5c: 0004ac83 lw x25,0(x9) +80000a60: 00448493 addi x9,x9,4 + +80000a64 : +Zknh_sha512sig0h_cg_cp_rs2_b25: + sha512sig0h x3, x22, x25 # perform operation +80000a64: 5d9b01b3 sha512sig0h x3,x22,x25 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rs2_b25, Zknh_sha512sig0h_cg_cp_rs2_b25_str) +80000a68: 00082203 lw x4,0(x16) +80000a6c: 00320863 beq x4,x3,80000a7c +80000a70: 2d1042ef jal x5,80005540 +80000a74: 80000a64 .word 0x80000a64 +80000a78: 80009cbd .word 0x80009cbd +80000a7c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x2814b8eb +80000a80: 0004aa83 lw x21,0(x9) +80000a84: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x617b36a0 +80000a88: 0004ad03 lw x26,0(x9) +80000a8c: 00448493 addi x9,x9,4 + +80000a90 : +Zknh_sha512sig0h_cg_cp_rs2_b26: + sha512sig0h x1, x21, x26 # perform operation +80000a90: 5daa80b3 sha512sig0h x1,x21,x26 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknh_sha512sig0h_cg_cp_rs2_b26, Zknh_sha512sig0h_cg_cp_rs2_b26_str) +80000a94: 00082203 lw x4,0(x16) +80000a98: 00120863 beq x4,x1,80000aa8 +80000a9c: 2a5042ef jal x5,80005540 +80000aa0: 80000a90 .word 0x80000a90 +80000aa4: 80009cf7 .word 0x80009cf7 +80000aa8: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0xf37e04d3 +80000aac: 0004a983 lw x19,0(x9) +80000ab0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x38b0faad +80000ab4: 0004ad83 lw x27,0(x9) +80000ab8: 00448493 addi x9,x9,4 + +80000abc : +Zknh_sha512sig0h_cg_cp_rs2_b27: + sha512sig0h x30, x19, x27 # perform operation +80000abc: 5db98f33 sha512sig0h x30,x19,x27 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rs2_b27, Zknh_sha512sig0h_cg_cp_rs2_b27_str) +80000ac0: 00082203 lw x4,0(x16) +80000ac4: 01e20863 beq x4,x30,80000ad4 +80000ac8: 279042ef jal x5,80005540 +80000acc: 80000abc .word 0x80000abc +80000ad0: 80009d31 .word 0x80009d31 +80000ad4: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x22ce1a8b +80000ad8: 0004ac03 lw x24,0(x9) +80000adc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xecb3058d +80000ae0: 0004ae03 lw x28,0(x9) +80000ae4: 00448493 addi x9,x9,4 + +80000ae8 : +Zknh_sha512sig0h_cg_cp_rs2_b28: + sha512sig0h x3, x24, x28 # perform operation +80000ae8: 5dcc01b3 sha512sig0h x3,x24,x28 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rs2_b28, Zknh_sha512sig0h_cg_cp_rs2_b28_str) +80000aec: 00082203 lw x4,0(x16) +80000af0: 00320863 beq x4,x3,80000b00 +80000af4: 24d042ef jal x5,80005540 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 80009d6b .word 0x80009d6b +80000b00: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x017643fc +80000b04: 0004a183 lw x3,0(x9) +80000b08: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x5bbf5c48 +80000b0c: 0004ae83 lw x29,0(x9) +80000b10: 00448493 addi x9,x9,4 + +80000b14 : +Zknh_sha512sig0h_cg_cp_rs2_b29: + sha512sig0h x20, x3, x29 # perform operation +80000b14: 5dd18a33 sha512sig0h x20,x3,x29 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknh_sha512sig0h_cg_cp_rs2_b29, Zknh_sha512sig0h_cg_cp_rs2_b29_str) +80000b18: 00082203 lw x4,0(x16) +80000b1c: 01420863 beq x4,x20,80000b2c +80000b20: 221042ef jal x5,80005540 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 80009da5 .word 0x80009da5 +80000b2c: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x050e1b70 +80000b30: 0004a683 lw x13,0(x9) +80000b34: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x11a9dbf7 +80000b38: 0004af03 lw x30,0(x9) +80000b3c: 00448493 addi x9,x9,4 + +80000b40 : +Zknh_sha512sig0h_cg_cp_rs2_b30: + sha512sig0h x1, x13, x30 # perform operation +80000b40: 5de680b3 sha512sig0h x1,x13,x30 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknh_sha512sig0h_cg_cp_rs2_b30, Zknh_sha512sig0h_cg_cp_rs2_b30_str) +80000b44: 00082203 lw x4,0(x16) +80000b48: 00120863 beq x4,x1,80000b58 +80000b4c: 1f5042ef jal x5,80005540 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 80009ddf .word 0x80009ddf +80000b58: 00480813 addi x16,x16,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x239da7db +80000b5c: 0004a903 lw x18,0(x9) +80000b60: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x2e426148 +80000b64: 0004af83 lw x31,0(x9) +80000b68: 00448493 addi x9,x9,4 + +80000b6c : +Zknh_sha512sig0h_cg_cp_rs2_b31: + sha512sig0h x30, x18, x31 # perform operation +80000b6c: 5df90f33 sha512sig0h x30,x18,x31 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rs2_b31, Zknh_sha512sig0h_cg_cp_rs2_b31_str) +80000b70: 00082203 lw x4,0(x16) +80000b74: 01e20863 beq x4,x30,80000b84 +80000b78: 1c9042ef jal x5,80005540 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 80009e19 .word 0x80009e19 +80000b84: 00480813 addi x16,x16,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x93b2b1ee +80000b88: 0004a403 lw x8,0(x9) +80000b8c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xf9ae1d50 +80000b90: 0004a683 lw x13,0(x9) +80000b94: 00448493 addi x9,x9,4 + +80000b98 : +Zknh_sha512sig0h_cg_cp_rd_b0: + sha512sig0h x0, x8, x13 # perform operation +80000b98: 5cd40033 sha512sig0h x0,x8,x13 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zknh_sha512sig0h_cg_cp_rd_b0, Zknh_sha512sig0h_cg_cp_rd_b0_str) +80000b9c: 00082203 lw x4,0(x16) +80000ba0: 00020863 beq x4,x0,80000bb0 +80000ba4: 19d042ef jal x5,80005540 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 80009e53 .word 0x80009e53 +80000bb0: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xe8a18ce4 +80000bb4: 0004ae03 lw x28,0(x9) +80000bb8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xb75e3dfa +80000bbc: 0004af03 lw x30,0(x9) +80000bc0: 00448493 addi x9,x9,4 + +80000bc4 : +Zknh_sha512sig0h_cg_cp_rd_b1: + sha512sig0h x1, x28, x30 # perform operation +80000bc4: 5dee00b3 sha512sig0h x1,x28,x30 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknh_sha512sig0h_cg_cp_rd_b1, Zknh_sha512sig0h_cg_cp_rd_b1_str) +80000bc8: 00082203 lw x4,0(x16) +80000bcc: 00120863 beq x4,x1,80000bdc +80000bd0: 171042ef jal x5,80005540 +80000bd4: 80000bc4 .word 0x80000bc4 +80000bd8: 80009e8b .word 0x80009e8b +80000bdc: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x8458fe3d +80000be0: 0004a403 lw x8,0(x9) +80000be4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x6f5da75c +80000be8: 0004ac03 lw x24,0(x9) +80000bec: 00448493 addi x9,x9,4 + +80000bf0 : +Zknh_sha512sig0h_cg_cp_rd_b2: + sha512sig0h x2, x8, x24 # perform operation +80000bf0: 5d840133 sha512sig0h x2,x8,x24 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknh_sha512sig0h_cg_cp_rd_b2, Zknh_sha512sig0h_cg_cp_rd_b2_str) +80000bf4: 00082203 lw x4,0(x16) +80000bf8: 00220863 beq x4,x2,80000c08 +80000bfc: 145042ef jal x5,80005540 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 80009ec3 .word 0x80009ec3 +80000c08: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x6803a509 +80000c0c: 0004a403 lw x8,0(x9) +80000c10: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xc34d5241 +80000c14: 0004aa83 lw x21,0(x9) +80000c18: 00448493 addi x9,x9,4 + +80000c1c : +Zknh_sha512sig0h_cg_cp_rd_b3: + sha512sig0h x3, x8, x21 # perform operation +80000c1c: 5d5401b3 sha512sig0h x3,x8,x21 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rd_b3, Zknh_sha512sig0h_cg_cp_rd_b3_str) +80000c20: 00082203 lw x4,0(x16) +80000c24: 00320863 beq x4,x3,80000c34 +80000c28: 119042ef jal x5,80005540 +80000c2c: 80000c1c .word 0x80000c1c +80000c30: 80009efb .word 0x80009efb +80000c34: 00480813 addi x16,x16,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c38: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c3c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x1c9c2f63 +80000c40: 0004a883 lw x17,0(x9) +80000c44: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xe55a7007 +80000c48: 0004a183 lw x3,0(x9) +80000c4c: 00448493 addi x9,x9,4 + +80000c50 : +Zknh_sha512sig0h_cg_cp_rd_b4: + sha512sig0h x4, x17, x3 # perform operation +80000c50: 5c388233 sha512sig0h x4,x17,x3 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zknh_sha512sig0h_cg_cp_rd_b4, Zknh_sha512sig0h_cg_cp_rd_b4_str) +80000c54: 00082383 lw x7,0(x16) +80000c58: 00438863 beq x7,x4,80000c68 +80000c5c: 0fd0446f jal x8,80005558 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 80009f33 .word 0x80009f33 +80000c68: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xe318698c +80000c6c: 0004ab83 lw x23,0(x9) +80000c70: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ef786a3 +80000c74: 0004a883 lw x17,0(x9) +80000c78: 00448493 addi x9,x9,4 + +80000c7c : +Zknh_sha512sig0h_cg_cp_rd_b5: + sha512sig0h x5, x23, x17 # perform operation +80000c7c: 5d1b82b3 sha512sig0h x5,x23,x17 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zknh_sha512sig0h_cg_cp_rd_b5, Zknh_sha512sig0h_cg_cp_rd_b5_str) +80000c80: 00082383 lw x7,0(x16) +80000c84: 00538863 beq x7,x5,80000c94 +80000c88: 0d10446f jal x8,80005558 +80000c8c: 80000c7c .word 0x80000c7c +80000c90: 80009f6b .word 0x80009f6b +80000c94: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xe4282678 +80000c98: 0004aa83 lw x21,0(x9) +80000c9c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x893f880f +80000ca0: 0004a703 lw x14,0(x9) +80000ca4: 00448493 addi x9,x9,4 + +80000ca8 : +Zknh_sha512sig0h_cg_cp_rd_b6: + sha512sig0h x6, x21, x14 # perform operation +80000ca8: 5cea8333 sha512sig0h x6,x21,x14 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zknh_sha512sig0h_cg_cp_rd_b6, Zknh_sha512sig0h_cg_cp_rd_b6_str) +80000cac: 00082383 lw x7,0(x16) +80000cb0: 00638863 beq x7,x6,80000cc0 +80000cb4: 0a50446f jal x8,80005558 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 80009fa3 .word 0x80009fa3 +80000cc0: 00480813 addi x16,x16,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000cc4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000cc8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0256ea38 +80000ccc: 0004ae83 lw x29,0(x9) +80000cd0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xbd45e307 +80000cd4: 0004a903 lw x18,0(x9) +80000cd8: 00448493 addi x9,x9,4 + +80000cdc : +Zknh_sha512sig0h_cg_cp_rd_b7: + sha512sig0h x7, x29, x18 # perform operation +80000cdc: 5d2e83b3 sha512sig0h x7,x29,x18 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknh_sha512sig0h_cg_cp_rd_b7, Zknh_sha512sig0h_cg_cp_rd_b7_str) +80000ce0: 00082203 lw x4,0(x16) +80000ce4: 00720863 beq x4,x7,80000cf4 +80000ce8: 059042ef jal x5,80005540 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 80009fdb .word 0x80009fdb +80000cf4: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x92c93f6a +80000cf8: 0004a303 lw x6,0(x9) +80000cfc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x2cbcedd8 +80000d00: 0004ab03 lw x22,0(x9) +80000d04: 00448493 addi x9,x9,4 + +80000d08 : +Zknh_sha512sig0h_cg_cp_rd_b8: + sha512sig0h x8, x6, x22 # perform operation +80000d08: 5d630433 sha512sig0h x8,x6,x22 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknh_sha512sig0h_cg_cp_rd_b8, Zknh_sha512sig0h_cg_cp_rd_b8_str) +80000d0c: 00082203 lw x4,0(x16) +80000d10: 00820863 beq x4,x8,80000d20 +80000d14: 02d042ef jal x5,80005540 +80000d18: 80000d08 .word 0x80000d08 +80000d1c: 8000a013 .word 0x8000a013 +80000d20: 00480813 addi x16,x16,4 + + mv x24, x9 # switch data pointer register to avoid conflict with test +80000d24: 00048c13 addi x24,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x1865da5f +80000d28: 000c2303 lw x6,0(x24) +80000d2c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x3d708e20 +80000d30: 000c2d83 lw x27,0(x24) +80000d34: 004c0c13 addi x24,x24,4 + +80000d38 : +Zknh_sha512sig0h_cg_cp_rd_b9: + sha512sig0h x9, x6, x27 # perform operation +80000d38: 5db304b3 sha512sig0h x9,x6,x27 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknh_sha512sig0h_cg_cp_rd_b9, Zknh_sha512sig0h_cg_cp_rd_b9_str) +80000d3c: 00082203 lw x4,0(x16) +80000d40: 00920863 beq x4,x9,80000d50 +80000d44: 7fc042ef jal x5,80005540 +80000d48: 80000d38 .word 0x80000d38 +80000d4c: 8000a04b .word 0x8000a04b +80000d50: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xb94a417c +80000d54: 000c2a03 lw x20,0(x24) +80000d58: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x46645f0b +80000d5c: 000c2b03 lw x22,0(x24) +80000d60: 004c0c13 addi x24,x24,4 + +80000d64 : +Zknh_sha512sig0h_cg_cp_rd_b10: + sha512sig0h x10, x20, x22 # perform operation +80000d64: 5d6a0533 sha512sig0h x10,x20,x22 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rd_b10, Zknh_sha512sig0h_cg_cp_rd_b10_str) +80000d68: 00082203 lw x4,0(x16) +80000d6c: 00a20863 beq x4,x10,80000d7c +80000d70: 7d0042ef jal x5,80005540 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 8000a083 .word 0x8000a083 +80000d7c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x92ecce4a +80000d80: 000c2083 lw x1,0(x24) +80000d84: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xe61e94ed +80000d88: 000c2683 lw x13,0(x24) +80000d8c: 004c0c13 addi x24,x24,4 + +80000d90 : +Zknh_sha512sig0h_cg_cp_rd_b11: + sha512sig0h x11, x1, x13 # perform operation +80000d90: 5cd085b3 sha512sig0h x11,x1,x13 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknh_sha512sig0h_cg_cp_rd_b11, Zknh_sha512sig0h_cg_cp_rd_b11_str) +80000d94: 00082203 lw x4,0(x16) +80000d98: 00b20863 beq x4,x11,80000da8 +80000d9c: 7a4042ef jal x5,80005540 +80000da0: 80000d90 .word 0x80000d90 +80000da4: 8000a0bc .word 0x8000a0bc +80000da8: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xa2e975a3 +80000dac: 000c2703 lw x14,0(x24) +80000db0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x339eb9b2 +80000db4: 000c2f03 lw x30,0(x24) +80000db8: 004c0c13 addi x24,x24,4 + +80000dbc : +Zknh_sha512sig0h_cg_cp_rd_b12: + sha512sig0h x12, x14, x30 # perform operation +80000dbc: 5de70633 sha512sig0h x12,x14,x30 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rd_b12, Zknh_sha512sig0h_cg_cp_rd_b12_str) +80000dc0: 00082203 lw x4,0(x16) +80000dc4: 00c20863 beq x4,x12,80000dd4 +80000dc8: 778042ef jal x5,80005540 +80000dcc: 80000dbc .word 0x80000dbc +80000dd0: 8000a0f5 .word 0x8000a0f5 +80000dd4: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x965e3f2e +80000dd8: 000c2e83 lw x29,0(x24) +80000ddc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x1c0a8ff0 +80000de0: 000c2b83 lw x23,0(x24) +80000de4: 004c0c13 addi x24,x24,4 + +80000de8 : +Zknh_sha512sig0h_cg_cp_rd_b13: + sha512sig0h x13, x29, x23 # perform operation +80000de8: 5d7e86b3 sha512sig0h x13,x29,x23 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknh_sha512sig0h_cg_cp_rd_b13, Zknh_sha512sig0h_cg_cp_rd_b13_str) +80000dec: 00082203 lw x4,0(x16) +80000df0: 00d20863 beq x4,x13,80000e00 +80000df4: 74c042ef jal x5,80005540 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 8000a12e .word 0x8000a12e +80000e00: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x660df6c2 +80000e04: 000c2683 lw x13,0(x24) +80000e08: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x97c2062b +80000e0c: 000c2383 lw x7,0(x24) +80000e10: 004c0c13 addi x24,x24,4 + +80000e14 : +Zknh_sha512sig0h_cg_cp_rd_b14: + sha512sig0h x14, x13, x7 # perform operation +80000e14: 5c768733 sha512sig0h x14,x13,x7 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknh_sha512sig0h_cg_cp_rd_b14, Zknh_sha512sig0h_cg_cp_rd_b14_str) +80000e18: 00082203 lw x4,0(x16) +80000e1c: 00e20863 beq x4,x14,80000e2c +80000e20: 720042ef jal x5,80005540 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 8000a167 .word 0x8000a167 +80000e2c: 00480813 addi x16,x16,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x4a162e15 +80000e30: 000c2383 lw x7,0(x24) +80000e34: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0xb9158b5d +80000e38: 000c2403 lw x8,0(x24) +80000e3c: 004c0c13 addi x24,x24,4 + +80000e40 : +Zknh_sha512sig0h_cg_cp_rd_b15: + sha512sig0h x15, x7, x8 # perform operation +80000e40: 5c8387b3 sha512sig0h x15,x7,x8 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknh_sha512sig0h_cg_cp_rd_b15, Zknh_sha512sig0h_cg_cp_rd_b15_str) +80000e44: 00082203 lw x4,0(x16) +80000e48: 00f20863 beq x4,x15,80000e58 +80000e4c: 6f4042ef jal x5,80005540 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 8000a1a0 .word 0x8000a1a0 +80000e58: 00480813 addi x16,x16,4 + + mv x19, x16 # switch signature pointer register to avoid conflict with test +80000e5c: 00080993 addi x19,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xa4be203e +80000e60: 000c2683 lw x13,0(x24) +80000e64: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x0bfff936 +80000e68: 000c2b03 lw x22,0(x24) +80000e6c: 004c0c13 addi x24,x24,4 + +80000e70 : +Zknh_sha512sig0h_cg_cp_rd_b16: + sha512sig0h x16, x13, x22 # perform operation +80000e70: 5d668833 sha512sig0h x16,x13,x22 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zknh_sha512sig0h_cg_cp_rd_b16, Zknh_sha512sig0h_cg_cp_rd_b16_str) +80000e74: 0009a203 lw x4,0(x19) +80000e78: 01020863 beq x4,x16,80000e88 +80000e7c: 6c4042ef jal x5,80005540 +80000e80: 80000e70 .word 0x80000e70 +80000e84: 8000a1d9 .word 0x8000a1d9 +80000e88: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xb1b24a05 +80000e8c: 000c2683 lw x13,0(x24) +80000e90: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x1f3b33c8 +80000e94: 000c2b03 lw x22,0(x24) +80000e98: 004c0c13 addi x24,x24,4 + +80000e9c : +Zknh_sha512sig0h_cg_cp_rd_b17: + sha512sig0h x17, x13, x22 # perform operation +80000e9c: 5d6688b3 sha512sig0h x17,x13,x22 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zknh_sha512sig0h_cg_cp_rd_b17, Zknh_sha512sig0h_cg_cp_rd_b17_str) +80000ea0: 0009a203 lw x4,0(x19) +80000ea4: 01120863 beq x4,x17,80000eb4 +80000ea8: 698042ef jal x5,80005540 +80000eac: 80000e9c .word 0x80000e9c +80000eb0: 8000a212 .word 0x8000a212 +80000eb4: 00498993 addi x19,x19,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0xa10beba0 +80000eb8: 000c2503 lw x10,0(x24) +80000ebc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x8d1e3716 +80000ec0: 000c2483 lw x9,0(x24) +80000ec4: 004c0c13 addi x24,x24,4 + +80000ec8 : +Zknh_sha512sig0h_cg_cp_rd_b18: + sha512sig0h x18, x10, x9 # perform operation +80000ec8: 5c950933 sha512sig0h x18,x10,x9 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknh_sha512sig0h_cg_cp_rd_b18, Zknh_sha512sig0h_cg_cp_rd_b18_str) +80000ecc: 0009a203 lw x4,0(x19) +80000ed0: 01220863 beq x4,x18,80000ee0 +80000ed4: 66c042ef jal x5,80005540 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000a24b .word 0x8000a24b +80000ee0: 00498993 addi x19,x19,4 + + mv x27, x19 # switch signature pointer register to avoid conflict with test +80000ee4: 00098d93 addi x27,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x66de3a30 +80000ee8: 000c2603 lw x12,0(x24) +80000eec: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x366a0c44 +80000ef0: 000c2b03 lw x22,0(x24) +80000ef4: 004c0c13 addi x24,x24,4 + +80000ef8 : +Zknh_sha512sig0h_cg_cp_rd_b19: + sha512sig0h x19, x12, x22 # perform operation +80000ef8: 5d6609b3 sha512sig0h x19,x12,x22 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zknh_sha512sig0h_cg_cp_rd_b19, Zknh_sha512sig0h_cg_cp_rd_b19_str) +80000efc: 000da203 lw x4,0(x27) +80000f00: 01320863 beq x4,x19,80000f10 +80000f04: 63c042ef jal x5,80005540 +80000f08: 80000ef8 .word 0x80000ef8 +80000f0c: 8000a284 .word 0x8000a284 +80000f10: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0xdf473ef7 +80000f14: 000c2083 lw x1,0(x24) +80000f18: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x8ff60d63 +80000f1c: 000c2983 lw x19,0(x24) +80000f20: 004c0c13 addi x24,x24,4 + +80000f24 : +Zknh_sha512sig0h_cg_cp_rd_b20: + sha512sig0h x20, x1, x19 # perform operation +80000f24: 5d308a33 sha512sig0h x20,x1,x19 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zknh_sha512sig0h_cg_cp_rd_b20, Zknh_sha512sig0h_cg_cp_rd_b20_str) +80000f28: 000da203 lw x4,0(x27) +80000f2c: 01420863 beq x4,x20,80000f3c +80000f30: 610042ef jal x5,80005540 +80000f34: 80000f24 .word 0x80000f24 +80000f38: 8000a2bd .word 0x8000a2bd +80000f3c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x62680efb +80000f40: 000c2583 lw x11,0(x24) +80000f44: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x28ccb61c +80000f48: 000c2503 lw x10,0(x24) +80000f4c: 004c0c13 addi x24,x24,4 + +80000f50 : +Zknh_sha512sig0h_cg_cp_rd_b21: + sha512sig0h x21, x11, x10 # perform operation +80000f50: 5ca58ab3 sha512sig0h x21,x11,x10 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zknh_sha512sig0h_cg_cp_rd_b21, Zknh_sha512sig0h_cg_cp_rd_b21_str) +80000f54: 000da203 lw x4,0(x27) +80000f58: 01520863 beq x4,x21,80000f68 +80000f5c: 5e4042ef jal x5,80005540 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 8000a2f6 .word 0x8000a2f6 +80000f68: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xa257d73f +80000f6c: 000c2983 lw x19,0(x24) +80000f70: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xb0de2790 +80000f74: 000c2683 lw x13,0(x24) +80000f78: 004c0c13 addi x24,x24,4 + +80000f7c : +Zknh_sha512sig0h_cg_cp_rd_b22: + sha512sig0h x22, x19, x13 # perform operation +80000f7c: 5cd98b33 sha512sig0h x22,x19,x13 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zknh_sha512sig0h_cg_cp_rd_b22, Zknh_sha512sig0h_cg_cp_rd_b22_str) +80000f80: 000da203 lw x4,0(x27) +80000f84: 01620863 beq x4,x22,80000f94 +80000f88: 5b8042ef jal x5,80005540 +80000f8c: 80000f7c .word 0x80000f7c +80000f90: 8000a32f .word 0x8000a32f +80000f94: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xbe7286ff +80000f98: 000c2303 lw x6,0(x24) +80000f9c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0xedbeb868 +80000fa0: 000c2f83 lw x31,0(x24) +80000fa4: 004c0c13 addi x24,x24,4 + +80000fa8 : +Zknh_sha512sig0h_cg_cp_rd_b23: + sha512sig0h x23, x6, x31 # perform operation +80000fa8: 5df30bb3 sha512sig0h x23,x6,x31 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zknh_sha512sig0h_cg_cp_rd_b23, Zknh_sha512sig0h_cg_cp_rd_b23_str) +80000fac: 000da203 lw x4,0(x27) +80000fb0: 01720863 beq x4,x23,80000fc0 +80000fb4: 58c042ef jal x5,80005540 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 8000a368 .word 0x8000a368 +80000fc0: 004d8d93 addi x27,x27,4 + + mv x2, x24 # switch data pointer register to avoid conflict with test +80000fc4: 000c0113 addi x2,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x22035f38 +80000fc8: 00012e83 lw x29,0(x2) +80000fcc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xe7eeade0 +80000fd0: 00012a03 lw x20,0(x2) +80000fd4: 00410113 addi x2,x2,4 + +80000fd8 : +Zknh_sha512sig0h_cg_cp_rd_b24: + sha512sig0h x24, x29, x20 # perform operation +80000fd8: 5d4e8c33 sha512sig0h x24,x29,x20 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zknh_sha512sig0h_cg_cp_rd_b24, Zknh_sha512sig0h_cg_cp_rd_b24_str) +80000fdc: 000da203 lw x4,0(x27) +80000fe0: 01820863 beq x4,x24,80000ff0 +80000fe4: 55c042ef jal x5,80005540 +80000fe8: 80000fd8 .word 0x80000fd8 +80000fec: 8000a3a1 .word 0x8000a3a1 +80000ff0: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xb723598a +80000ff4: 00012383 lw x7,0(x2) +80000ff8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x161c250e +80000ffc: 00012983 lw x19,0(x2) +80001000: 00410113 addi x2,x2,4 + +80001004 : +Zknh_sha512sig0h_cg_cp_rd_b25: + sha512sig0h x25, x7, x19 # perform operation +80001004: 5d338cb3 sha512sig0h x25,x7,x19 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zknh_sha512sig0h_cg_cp_rd_b25, Zknh_sha512sig0h_cg_cp_rd_b25_str) +80001008: 000da203 lw x4,0(x27) +8000100c: 01920863 beq x4,x25,8000101c +80001010: 530042ef jal x5,80005540 +80001014: 80001004 .word 0x80001004 +80001018: 8000a3da .word 0x8000a3da +8000101c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xd0624aab +80001020: 00012883 lw x17,0(x2) +80001024: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x4f81801e +80001028: 00012183 lw x3,0(x2) +8000102c: 00410113 addi x2,x2,4 + +80001030 : +Zknh_sha512sig0h_cg_cp_rd_b26: + sha512sig0h x26, x17, x3 # perform operation +80001030: 5c388d33 sha512sig0h x26,x17,x3 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zknh_sha512sig0h_cg_cp_rd_b26, Zknh_sha512sig0h_cg_cp_rd_b26_str) +80001034: 000da203 lw x4,0(x27) +80001038: 01a20863 beq x4,x26,80001048 +8000103c: 504042ef jal x5,80005540 +80001040: 80001030 .word 0x80001030 +80001044: 8000a413 .word 0x8000a413 +80001048: 004d8d93 addi x27,x27,4 + + mv x21, x27 # switch signature pointer register to avoid conflict with test +8000104c: 000d8a93 addi x21,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xcd0425aa +80001050: 00012183 lw x3,0(x2) +80001054: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x28df1a1c +80001058: 00012483 lw x9,0(x2) +8000105c: 00410113 addi x2,x2,4 + +80001060 : +Zknh_sha512sig0h_cg_cp_rd_b27: + sha512sig0h x27, x3, x9 # perform operation +80001060: 5c918db3 sha512sig0h x27,x3,x9 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rd_b27, Zknh_sha512sig0h_cg_cp_rd_b27_str) +80001064: 000aa203 lw x4,0(x21) +80001068: 01b20863 beq x4,x27,80001078 +8000106c: 4d4042ef jal x5,80005540 +80001070: 80001060 .word 0x80001060 +80001074: 8000a44c .word 0x8000a44c +80001078: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5391d831 +8000107c: 00012183 lw x3,0(x2) +80001080: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xb9851175 +80001084: 00012a03 lw x20,0(x2) +80001088: 00410113 addi x2,x2,4 + +8000108c : +Zknh_sha512sig0h_cg_cp_rd_b28: + sha512sig0h x28, x3, x20 # perform operation +8000108c: 5d418e33 sha512sig0h x28,x3,x20 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cp_rd_b28, Zknh_sha512sig0h_cg_cp_rd_b28_str) +80001090: 000aa203 lw x4,0(x21) +80001094: 01c20863 beq x4,x28,800010a4 +80001098: 4a8042ef jal x5,80005540 +8000109c: 8000108c .word 0x8000108c +800010a0: 8000a485 .word 0x8000a485 +800010a4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x5d4b0046 +800010a8: 00012603 lw x12,0(x2) +800010ac: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x4955aaca +800010b0: 00012303 lw x6,0(x2) +800010b4: 00410113 addi x2,x2,4 + +800010b8 : +Zknh_sha512sig0h_cg_cp_rd_b29: + sha512sig0h x29, x12, x6 # perform operation +800010b8: 5c660eb3 sha512sig0h x29,x12,x6 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cp_rd_b29, Zknh_sha512sig0h_cg_cp_rd_b29_str) +800010bc: 000aa203 lw x4,0(x21) +800010c0: 01d20863 beq x4,x29,800010d0 +800010c4: 47c042ef jal x5,80005540 +800010c8: 800010b8 .word 0x800010b8 +800010cc: 8000a4be .word 0x8000a4be +800010d0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x6ca9aff7 +800010d4: 00012a03 lw x20,0(x2) +800010d8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xe71c42db +800010dc: 00012b03 lw x22,0(x2) +800010e0: 00410113 addi x2,x2,4 + +800010e4 : +Zknh_sha512sig0h_cg_cp_rd_b30: + sha512sig0h x30, x20, x22 # perform operation +800010e4: 5d6a0f33 sha512sig0h x30,x20,x22 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cp_rd_b30, Zknh_sha512sig0h_cg_cp_rd_b30_str) +800010e8: 000aa203 lw x4,0(x21) +800010ec: 01e20863 beq x4,x30,800010fc +800010f0: 450042ef jal x5,80005540 +800010f4: 800010e4 .word 0x800010e4 +800010f8: 8000a4f7 .word 0x8000a4f7 +800010fc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x5f4c2ab6 +80001100: 00012b83 lw x23,0(x2) +80001104: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xcd69084e +80001108: 00012e03 lw x28,0(x2) +8000110c: 00410113 addi x2,x2,4 + +80001110 : +Zknh_sha512sig0h_cg_cp_rd_b31: + sha512sig0h x31, x23, x28 # perform operation +80001110: 5dcb8fb3 sha512sig0h x31,x23,x28 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cp_rd_b31, Zknh_sha512sig0h_cg_cp_rd_b31_str) +80001114: 000aa203 lw x4,0(x21) +80001118: 01f20863 beq x4,x31,80001128 +8000111c: 424042ef jal x5,80005540 +80001120: 80001110 .word 0x80001110 +80001124: 8000a530 .word 0x8000a530 +80001128: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x00000000 +8000112c: 00012b83 lw x23,0(x2) +80001130: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x3736332e +80001134: 00012983 lw x19,0(x2) +80001138: 00410113 addi x2,x2,4 + +8000113c : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x0: + sha512sig0h x24, x23, x19 # perform operation +8000113c: 5d3b8c33 sha512sig0h x24,x23,x19 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cp_rs1_edges_0x0, Zknh_sha512sig0h_cg_cp_rs1_edges_0x0_str) +80001140: 000aa203 lw x4,0(x21) +80001144: 01820863 beq x4,x24,80001154 +80001148: 3f8042ef jal x5,80005540 +8000114c: 8000113c .word 0x8000113c +80001150: 8000a569 .word 0x8000a569 +80001154: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x00000001 +80001158: 00012783 lw x15,0(x2) +8000115c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x8b11d88e +80001160: 00012c83 lw x25,0(x2) +80001164: 00410113 addi x2,x2,4 + +80001168 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x1: + sha512sig0h x10, x15, x25 # perform operation +80001168: 5d978533 sha512sig0h x10,x15,x25 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig0h_cg_cp_rs1_edges_0x1, Zknh_sha512sig0h_cg_cp_rs1_edges_0x1_str) +8000116c: 000aa203 lw x4,0(x21) +80001170: 00a20863 beq x4,x10,80001180 +80001174: 3cc042ef jal x5,80005540 +80001178: 80001168 .word 0x80001168 +8000117c: 8000a5a9 .word 0x8000a5a9 +80001180: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000002 +80001184: 00012e03 lw x28,0(x2) +80001188: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x0b010da4 +8000118c: 00012803 lw x16,0(x2) +80001190: 00410113 addi x2,x2,4 + +80001194 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x2: + sha512sig0h x23, x28, x16 # perform operation +80001194: 5d0e0bb3 sha512sig0h x23,x28,x16 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cp_rs1_edges_0x2, Zknh_sha512sig0h_cg_cp_rs1_edges_0x2_str) +80001198: 000aa203 lw x4,0(x21) +8000119c: 01720863 beq x4,x23,800011ac +800011a0: 3a0042ef jal x5,80005540 +800011a4: 80001194 .word 0x80001194 +800011a8: 8000a5e9 .word 0x8000a5e9 +800011ac: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x80000000 +800011b0: 00012783 lw x15,0(x2) +800011b4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xa53b40cf +800011b8: 00012583 lw x11,0(x2) +800011bc: 00410113 addi x2,x2,4 + +800011c0 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000000: + sha512sig0h x23, x15, x11 # perform operation +800011c0: 5cb78bb3 sha512sig0h x23,x15,x11 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000000, Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000000_str) +800011c4: 000aa203 lw x4,0(x21) +800011c8: 01720863 beq x4,x23,800011d8 +800011cc: 374042ef jal x5,80005540 +800011d0: 800011c0 .word 0x800011c0 +800011d4: 8000a629 .word 0x8000a629 +800011d8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x80000001 +800011dc: 00012503 lw x10,0(x2) +800011e0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x1176180d +800011e4: 00012983 lw x19,0(x2) +800011e8: 00410113 addi x2,x2,4 + +800011ec : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000001: + sha512sig0h x16, x10, x19 # perform operation +800011ec: 5d350833 sha512sig0h x16,x10,x19 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000001, Zknh_sha512sig0h_cg_cp_rs1_edges_0x80000001_str) +800011f0: 000aa203 lw x4,0(x21) +800011f4: 01020863 beq x4,x16,80001204 +800011f8: 348042ef jal x5,80005540 +800011fc: 800011ec .word 0x800011ec +80001200: 8000a671 .word 0x8000a671 +80001204: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7fffffff +80001208: 00012183 lw x3,0(x2) +8000120c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x4c2c8fa0 +80001210: 00012703 lw x14,0(x2) +80001214: 00410113 addi x2,x2,4 + +80001218 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x7fffffff: + sha512sig0h x19, x3, x14 # perform operation +80001218: 5ce189b3 sha512sig0h x19,x3,x14 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0h_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sig0h_cg_cp_rs1_edges_0x7fffffff_str) +8000121c: 000aa203 lw x4,0(x21) +80001220: 01320863 beq x4,x19,80001230 +80001224: 31c042ef jal x5,80005540 +80001228: 80001218 .word 0x80001218 +8000122c: 8000a6b9 .word 0x8000a6b9 +80001230: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x7ffffffe +80001234: 00012803 lw x16,0(x2) +80001238: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xc19e918b +8000123c: 00012683 lw x13,0(x2) +80001240: 00410113 addi x2,x2,4 + +80001244 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x7ffffffe: + sha512sig0h x27, x16, x13 # perform operation +80001244: 5cd80db3 sha512sig0h x27,x16,x13 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sig0h_cg_cp_rs1_edges_0x7ffffffe_str) +80001248: 000aa203 lw x4,0(x21) +8000124c: 01b20863 beq x4,x27,8000125c +80001250: 2f0042ef jal x5,80005540 +80001254: 80001244 .word 0x80001244 +80001258: 8000a701 .word 0x8000a701 +8000125c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xffffffff +80001260: 00012603 lw x12,0(x2) +80001264: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x53ccc378 +80001268: 00012f83 lw x31,0(x2) +8000126c: 00410113 addi x2,x2,4 + +80001270 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0xffffffff: + sha512sig0h x28, x12, x31 # perform operation +80001270: 5df60e33 sha512sig0h x28,x12,x31 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig0h_cg_cp_rs1_edges_0xffffffff_str) +80001274: 000aa203 lw x4,0(x21) +80001278: 01c20863 beq x4,x28,80001288 +8000127c: 2c4042ef jal x5,80005540 +80001280: 80001270 .word 0x80001270 +80001284: 8000a749 .word 0x8000a749 +80001288: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xfffffffe +8000128c: 00012f03 lw x30,0(x2) +80001290: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xc725c969 +80001294: 00012c03 lw x24,0(x2) +80001298: 00410113 addi x2,x2,4 + +8000129c : +Zknh_sha512sig0h_cg_cp_rs1_edges_0xfffffffe: + sha512sig0h x29, x30, x24 # perform operation +8000129c: 5d8f0eb3 sha512sig0h x29,x30,x24 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig0h_cg_cp_rs1_edges_0xfffffffe_str) +800012a0: 000aa203 lw x4,0(x21) +800012a4: 01d20863 beq x4,x29,800012b4 +800012a8: 298042ef jal x5,80005540 +800012ac: 8000129c .word 0x8000129c +800012b0: 8000a791 .word 0x8000a791 +800012b4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x5bbc8872 +800012b8: 00012583 lw x11,0(x2) +800012bc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0a42ca5d +800012c0: 00012d03 lw x26,0(x2) +800012c4: 00410113 addi x2,x2,4 + +800012c8 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x5bbc8872: + sha512sig0h x20, x11, x26 # perform operation +800012c8: 5da58a33 sha512sig0h x20,x11,x26 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sig0h_cg_cp_rs1_edges_0x5bbc8872_str) +800012cc: 000aa203 lw x4,0(x21) +800012d0: 01420863 beq x4,x20,800012e0 +800012d4: 26c042ef jal x5,80005540 +800012d8: 800012c8 .word 0x800012c8 +800012dc: 8000a7d9 .word 0x8000a7d9 +800012e0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xaaaaaaaa +800012e4: 00012383 lw x7,0(x2) +800012e8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x6dfb7ee7 +800012ec: 00012703 lw x14,0(x2) +800012f0: 00410113 addi x2,x2,4 + +800012f4 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sig0h x16, x7, x14 # perform operation +800012f4: 5ce38833 sha512sig0h x16,x7,x14 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sig0h_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f8: 000aa203 lw x4,0(x21) +800012fc: 01020863 beq x4,x16,8000130c +80001300: 240042ef jal x5,80005540 +80001304: 800012f4 .word 0x800012f4 +80001308: 8000a821 .word 0x8000a821 +8000130c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x55555555 +80001310: 00012b83 lw x23,0(x2) +80001314: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x8e6017ec +80001318: 00012e03 lw x28,0(x2) +8000131c: 00410113 addi x2,x2,4 + +80001320 : +Zknh_sha512sig0h_cg_cp_rs1_edges_0x55555555: + sha512sig0h x3, x23, x28 # perform operation +80001320: 5dcb81b3 sha512sig0h x3,x23,x28 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rs1_edges_0x55555555, Zknh_sha512sig0h_cg_cp_rs1_edges_0x55555555_str) +80001324: 000aa203 lw x4,0(x21) +80001328: 00320863 beq x4,x3,80001338 +8000132c: 214042ef jal x5,80005540 +80001330: 80001320 .word 0x80001320 +80001334: 8000a869 .word 0x8000a869 +80001338: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xfdf35195 +8000133c: 00012083 lw x1,0(x2) +80001340: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000000 +80001344: 00012903 lw x18,0(x2) +80001348: 00410113 addi x2,x2,4 + +8000134c : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x0: + sha512sig0h x8, x1, x18 # perform operation +8000134c: 5d208433 sha512sig0h x8,x1,x18 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cp_rs2_edges_0x0, Zknh_sha512sig0h_cg_cp_rs2_edges_0x0_str) +80001350: 000aa203 lw x4,0(x21) +80001354: 00820863 beq x4,x8,80001364 +80001358: 1e8042ef jal x5,80005540 +8000135c: 8000134c .word 0x8000134c +80001360: 8000a8b1 .word 0x8000a8b1 +80001364: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x8ab49d6e +80001368: 00012903 lw x18,0(x2) +8000136c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x00000001 +80001370: 00012d83 lw x27,0(x2) +80001374: 00410113 addi x2,x2,4 + +80001378 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x1: + sha512sig0h x9, x18, x27 # perform operation +80001378: 5db904b3 sha512sig0h x9,x18,x27 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cp_rs2_edges_0x1, Zknh_sha512sig0h_cg_cp_rs2_edges_0x1_str) +8000137c: 000aa203 lw x4,0(x21) +80001380: 00920863 beq x4,x9,80001390 +80001384: 1bc042ef jal x5,80005540 +80001388: 80001378 .word 0x80001378 +8000138c: 8000a8f2 .word 0x8000a8f2 +80001390: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5bcad3dc +80001394: 00012403 lw x8,0(x2) +80001398: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x00000002 +8000139c: 00012703 lw x14,0(x2) +800013a0: 00410113 addi x2,x2,4 + +800013a4 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x2: + sha512sig0h x22, x8, x14 # perform operation +800013a4: 5ce40b33 sha512sig0h x22,x8,x14 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cp_rs2_edges_0x2, Zknh_sha512sig0h_cg_cp_rs2_edges_0x2_str) +800013a8: 000aa203 lw x4,0(x21) +800013ac: 01620863 beq x4,x22,800013bc +800013b0: 190042ef jal x5,80005540 +800013b4: 800013a4 .word 0x800013a4 +800013b8: 8000a933 .word 0x8000a933 +800013bc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x5c5a3717 +800013c0: 00012983 lw x19,0(x2) +800013c4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x80000000 +800013c8: 00012b03 lw x22,0(x2) +800013cc: 00410113 addi x2,x2,4 + +800013d0 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000000: + sha512sig0h x29, x19, x22 # perform operation +800013d0: 5d698eb3 sha512sig0h x29,x19,x22 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000000, Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000000_str) +800013d4: 000aa203 lw x4,0(x21) +800013d8: 01d20863 beq x4,x29,800013e8 +800013dc: 164042ef jal x5,80005540 +800013e0: 800013d0 .word 0x800013d0 +800013e4: 8000a974 .word 0x8000a974 +800013e8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x9452bb02 +800013ec: 00012d83 lw x27,0(x2) +800013f0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x80000001 +800013f4: 00012883 lw x17,0(x2) +800013f8: 00410113 addi x2,x2,4 + +800013fc : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000001: + sha512sig0h x28, x27, x17 # perform operation +800013fc: 5d1d8e33 sha512sig0h x28,x27,x17 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000001, Zknh_sha512sig0h_cg_cp_rs2_edges_0x80000001_str) +80001400: 000aa203 lw x4,0(x21) +80001404: 01c20863 beq x4,x28,80001414 +80001408: 138042ef jal x5,80005540 +8000140c: 800013fc .word 0x800013fc +80001410: 8000a9bc .word 0x8000a9bc +80001414: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xb7dfe3be +80001418: 00012483 lw x9,0(x2) +8000141c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x7fffffff +80001420: 00012f83 lw x31,0(x2) +80001424: 00410113 addi x2,x2,4 + +80001428 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x7fffffff: + sha512sig0h x17, x9, x31 # perform operation +80001428: 5df488b3 sha512sig0h x17,x9,x31 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sig0h_cg_cp_rs2_edges_0x7fffffff_str) +8000142c: 000aa203 lw x4,0(x21) +80001430: 01120863 beq x4,x17,80001440 +80001434: 10c042ef jal x5,80005540 +80001438: 80001428 .word 0x80001428 +8000143c: 8000aa04 .word 0x8000aa04 +80001440: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7b173584 +80001444: 00012683 lw x13,0(x2) +80001448: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x7ffffffe +8000144c: 00012903 lw x18,0(x2) +80001450: 00410113 addi x2,x2,4 + +80001454 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x7ffffffe: + sha512sig0h x12, x13, x18 # perform operation +80001454: 5d268633 sha512sig0h x12,x13,x18 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig0h_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sig0h_cg_cp_rs2_edges_0x7ffffffe_str) +80001458: 000aa203 lw x4,0(x21) +8000145c: 00c20863 beq x4,x12,8000146c +80001460: 0e0042ef jal x5,80005540 +80001464: 80001454 .word 0x80001454 +80001468: 8000aa4c .word 0x8000aa4c +8000146c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x376aada1 +80001470: 00012783 lw x15,0(x2) +80001474: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xffffffff +80001478: 00012d03 lw x26,0(x2) +8000147c: 00410113 addi x2,x2,4 + +80001480 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0xffffffff: + sha512sig0h x3, x15, x26 # perform operation +80001480: 5da781b3 sha512sig0h x3,x15,x26 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sig0h_cg_cp_rs2_edges_0xffffffff_str) +80001484: 000aa203 lw x4,0(x21) +80001488: 00320863 beq x4,x3,80001498 +8000148c: 0b4042ef jal x5,80005540 +80001490: 80001480 .word 0x80001480 +80001494: 8000aa94 .word 0x8000aa94 +80001498: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xa7dffb53 +8000149c: 00012f83 lw x31,0(x2) +800014a0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xfffffffe +800014a4: 00012683 lw x13,0(x2) +800014a8: 00410113 addi x2,x2,4 + +800014ac : +Zknh_sha512sig0h_cg_cp_rs2_edges_0xfffffffe: + sha512sig0h x15, x31, x13 # perform operation +800014ac: 5cdf87b3 sha512sig0h x15,x31,x13 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sig0h_cg_cp_rs2_edges_0xfffffffe_str) +800014b0: 000aa203 lw x4,0(x21) +800014b4: 00f20863 beq x4,x15,800014c4 +800014b8: 088042ef jal x5,80005540 +800014bc: 800014ac .word 0x800014ac +800014c0: 8000aadc .word 0x8000aadc +800014c4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xdc4cb5d7 +800014c8: 00012983 lw x19,0(x2) +800014cc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x5bbc8872 +800014d0: 00012383 lw x7,0(x2) +800014d4: 00410113 addi x2,x2,4 + +800014d8 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x5bbc8872: + sha512sig0h x8, x19, x7 # perform operation +800014d8: 5c798433 sha512sig0h x8,x19,x7 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sig0h_cg_cp_rs2_edges_0x5bbc8872_str) +800014dc: 000aa203 lw x4,0(x21) +800014e0: 00820863 beq x4,x8,800014f0 +800014e4: 05c042ef jal x5,80005540 +800014e8: 800014d8 .word 0x800014d8 +800014ec: 8000ab24 .word 0x8000ab24 +800014f0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x0b3aefc1 +800014f4: 00012183 lw x3,0(x2) +800014f8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xaaaaaaaa +800014fc: 00012603 lw x12,0(x2) +80001500: 00410113 addi x2,x2,4 + +80001504 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sig0h x14, x3, x12 # perform operation +80001504: 5cc18733 sha512sig0h x14,x3,x12 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sig0h_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001508: 000aa203 lw x4,0(x21) +8000150c: 00e20863 beq x4,x14,8000151c +80001510: 030042ef jal x5,80005540 +80001514: 80001504 .word 0x80001504 +80001518: 8000ab6c .word 0x8000ab6c +8000151c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x555c5dc4 +80001520: 00012e03 lw x28,0(x2) +80001524: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x55555555 +80001528: 00012383 lw x7,0(x2) +8000152c: 00410113 addi x2,x2,4 + +80001530 : +Zknh_sha512sig0h_cg_cp_rs2_edges_0x55555555: + sha512sig0h x27, x28, x7 # perform operation +80001530: 5c7e0db3 sha512sig0h x27,x28,x7 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cp_rs2_edges_0x55555555, Zknh_sha512sig0h_cg_cp_rs2_edges_0x55555555_str) +80001534: 000aa203 lw x4,0(x21) +80001538: 01b20863 beq x4,x27,80001548 +8000153c: 004042ef jal x5,80005540 +80001540: 80001530 .word 0x80001530 +80001544: 8000abb4 .word 0x8000abb4 +80001548: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x00000000 +8000154c: 00012803 lw x16,0(x2) +80001550: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x00000000 +80001554: 00012603 lw x12,0(x2) +80001558: 00410113 addi x2,x2,4 + +8000155c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sig0h x9, x16, x12 # perform operation +8000155c: 5cc804b3 sha512sig0h x9,x16,x12 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001560: 000aa203 lw x4,0(x21) +80001564: 00920863 beq x4,x9,80001574 +80001568: 7d9032ef jal x5,80005540 +8000156c: 8000155c .word 0x8000155c +80001570: 8000abfc .word 0x8000abfc +80001574: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x00000000 +80001578: 00012783 lw x15,0(x2) +8000157c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x00000001 +80001580: 00012d83 lw x27,0(x2) +80001584: 00410113 addi x2,x2,4 + +80001588 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sig0h x19, x15, x27 # perform operation +80001588: 5db789b3 sha512sig0h x19,x15,x27 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000158c: 000aa203 lw x4,0(x21) +80001590: 01320863 beq x4,x19,800015a0 +80001594: 7ad032ef jal x5,80005540 +80001598: 80001588 .word 0x80001588 +8000159c: 8000ac54 .word 0x8000ac54 +800015a0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x00000000 +800015a4: 00012c83 lw x25,0(x2) +800015a8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x00000002 +800015ac: 00012583 lw x11,0(x2) +800015b0: 00410113 addi x2,x2,4 + +800015b4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sig0h x1, x25, x11 # perform operation +800015b4: 5cbc80b3 sha512sig0h x1,x25,x11 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b8: 000aa203 lw x4,0(x21) +800015bc: 00120863 beq x4,x1,800015cc +800015c0: 781032ef jal x5,80005540 +800015c4: 800015b4 .word 0x800015b4 +800015c8: 8000acac .word 0x8000acac +800015cc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x00000000 +800015d0: 00012c83 lw x25,0(x2) +800015d4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x80000000 +800015d8: 00012603 lw x12,0(x2) +800015dc: 00410113 addi x2,x2,4 + +800015e0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sig0h x14, x25, x12 # perform operation +800015e0: 5ccc8733 sha512sig0h x14,x25,x12 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e4: 000aa203 lw x4,0(x21) +800015e8: 00e20863 beq x4,x14,800015f8 +800015ec: 755032ef jal x5,80005540 +800015f0: 800015e0 .word 0x800015e0 +800015f4: 8000ad04 .word 0x8000ad04 +800015f8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x00000000 +800015fc: 00012f03 lw x30,0(x2) +80001600: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x80000001 +80001604: 00012303 lw x6,0(x2) +80001608: 00410113 addi x2,x2,4 + +8000160c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sig0h x31, x30, x6 # perform operation +8000160c: 5c6f0fb3 sha512sig0h x31,x30,x6 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001610: 000aa203 lw x4,0(x21) +80001614: 01f20863 beq x4,x31,80001624 +80001618: 729032ef jal x5,80005540 +8000161c: 8000160c .word 0x8000160c +80001620: 8000ad63 .word 0x8000ad63 +80001624: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x00000000 +80001628: 00012483 lw x9,0(x2) +8000162c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x7fffffff +80001630: 00012403 lw x8,0(x2) +80001634: 00410113 addi x2,x2,4 + +80001638 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sig0h x28, x9, x8 # perform operation +80001638: 5c848e33 sha512sig0h x28,x9,x8 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000163c: 000aa203 lw x4,0(x21) +80001640: 01c20863 beq x4,x28,80001650 +80001644: 6fd032ef jal x5,80005540 +80001648: 80001638 .word 0x80001638 +8000164c: 8000adc2 .word 0x8000adc2 +80001650: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x00000000 +80001654: 00012803 lw x16,0(x2) +80001658: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x7ffffffe +8000165c: 00012f03 lw x30,0(x2) +80001660: 00410113 addi x2,x2,4 + +80001664 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sig0h x7, x16, x30 # perform operation +80001664: 5de803b3 sha512sig0h x7,x16,x30 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001668: 000aa203 lw x4,0(x21) +8000166c: 00720863 beq x4,x7,8000167c +80001670: 6d1032ef jal x5,80005540 +80001674: 80001664 .word 0x80001664 +80001678: 8000ae21 .word 0x8000ae21 +8000167c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x00000000 +80001680: 00012583 lw x11,0(x2) +80001684: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xffffffff +80001688: 00012503 lw x10,0(x2) +8000168c: 00410113 addi x2,x2,4 + +80001690 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sig0h x8, x11, x10 # perform operation +80001690: 5ca58433 sha512sig0h x8,x11,x10 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001694: 000aa203 lw x4,0(x21) +80001698: 00820863 beq x4,x8,800016a8 +8000169c: 6a5032ef jal x5,80005540 +800016a0: 80001690 .word 0x80001690 +800016a4: 8000ae80 .word 0x8000ae80 +800016a8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x00000000 +800016ac: 00012f03 lw x30,0(x2) +800016b0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xfffffffe +800016b4: 00012903 lw x18,0(x2) +800016b8: 00410113 addi x2,x2,4 + +800016bc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sig0h x29, x30, x18 # perform operation +800016bc: 5d2f0eb3 sha512sig0h x29,x30,x18 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c0: 000aa203 lw x4,0(x21) +800016c4: 01d20863 beq x4,x29,800016d4 +800016c8: 679032ef jal x5,80005540 +800016cc: 800016bc .word 0x800016bc +800016d0: 8000aedf .word 0x8000aedf +800016d4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x00000000 +800016d8: 00012083 lw x1,0(x2) +800016dc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5bbc8872 +800016e0: 00012983 lw x19,0(x2) +800016e4: 00410113 addi x2,x2,4 + +800016e8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sig0h x28, x1, x19 # perform operation +800016e8: 5d308e33 sha512sig0h x28,x1,x19 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016ec: 000aa203 lw x4,0(x21) +800016f0: 01c20863 beq x4,x28,80001700 +800016f4: 64d032ef jal x5,80005540 +800016f8: 800016e8 .word 0x800016e8 +800016fc: 8000af3e .word 0x8000af3e +80001700: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x00000000 +80001704: 00012f03 lw x30,0(x2) +80001708: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xaaaaaaaa +8000170c: 00012903 lw x18,0(x2) +80001710: 00410113 addi x2,x2,4 + +80001714 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sig0h x29, x30, x18 # perform operation +80001714: 5d2f0eb3 sha512sig0h x29,x30,x18 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001718: 000aa203 lw x4,0(x21) +8000171c: 01d20863 beq x4,x29,8000172c +80001720: 621032ef jal x5,80005540 +80001724: 80001714 .word 0x80001714 +80001728: 8000af9d .word 0x8000af9d +8000172c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x00000000 +80001730: 00012b03 lw x22,0(x2) +80001734: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x55555555 +80001738: 00012e83 lw x29,0(x2) +8000173c: 00410113 addi x2,x2,4 + +80001740 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sig0h x30, x22, x29 # perform operation +80001740: 5ddb0f33 sha512sig0h x30,x22,x29 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001744: 000aa203 lw x4,0(x21) +80001748: 01e20863 beq x4,x30,80001758 +8000174c: 5f5032ef jal x5,80005540 +80001750: 80001740 .word 0x80001740 +80001754: 8000affc .word 0x8000affc +80001758: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x00000001 +8000175c: 00012383 lw x7,0(x2) +80001760: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x00000000 +80001764: 00012083 lw x1,0(x2) +80001768: 00410113 addi x2,x2,4 + +8000176c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sig0h x29, x7, x1 # perform operation +8000176c: 5c138eb3 sha512sig0h x29,x7,x1 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001770: 000aa203 lw x4,0(x21) +80001774: 01d20863 beq x4,x29,80001784 +80001778: 5c9032ef jal x5,80005540 +8000177c: 8000176c .word 0x8000176c +80001780: 8000b05b .word 0x8000b05b +80001784: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000001 +80001788: 00012403 lw x8,0(x2) +8000178c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x00000001 +80001790: 00012683 lw x13,0(x2) +80001794: 00410113 addi x2,x2,4 + +80001798 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sig0h x20, x8, x13 # perform operation +80001798: 5cd40a33 sha512sig0h x20,x8,x13 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +8000179c: 000aa203 lw x4,0(x21) +800017a0: 01420863 beq x4,x20,800017b0 +800017a4: 59d032ef jal x5,80005540 +800017a8: 80001798 .word 0x80001798 +800017ac: 8000b0b3 .word 0x8000b0b3 +800017b0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x00000001 +800017b4: 00012603 lw x12,0(x2) +800017b8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x00000002 +800017bc: 00012983 lw x19,0(x2) +800017c0: 00410113 addi x2,x2,4 + +800017c4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sig0h x6, x12, x19 # perform operation +800017c4: 5d360333 sha512sig0h x6,x12,x19 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c8: 000aa203 lw x4,0(x21) +800017cc: 00620863 beq x4,x6,800017dc +800017d0: 571032ef jal x5,80005540 +800017d4: 800017c4 .word 0x800017c4 +800017d8: 8000b10b .word 0x8000b10b +800017dc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000001 +800017e0: 00012403 lw x8,0(x2) +800017e4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x80000000 +800017e8: 00012883 lw x17,0(x2) +800017ec: 00410113 addi x2,x2,4 + +800017f0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sig0h x27, x8, x17 # perform operation +800017f0: 5d140db3 sha512sig0h x27,x8,x17 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f4: 000aa203 lw x4,0(x21) +800017f8: 01b20863 beq x4,x27,80001808 +800017fc: 545032ef jal x5,80005540 +80001800: 800017f0 .word 0x800017f0 +80001804: 8000b163 .word 0x8000b163 +80001808: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x00000001 +8000180c: 00012883 lw x17,0(x2) +80001810: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x80000001 +80001814: 00012683 lw x13,0(x2) +80001818: 00410113 addi x2,x2,4 + +8000181c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sig0h x14, x17, x13 # perform operation +8000181c: 5cd88733 sha512sig0h x14,x17,x13 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001820: 000aa203 lw x4,0(x21) +80001824: 00e20863 beq x4,x14,80001834 +80001828: 519032ef jal x5,80005540 +8000182c: 8000181c .word 0x8000181c +80001830: 8000b1c2 .word 0x8000b1c2 +80001834: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x00000001 +80001838: 00012883 lw x17,0(x2) +8000183c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x7fffffff +80001840: 00012803 lw x16,0(x2) +80001844: 00410113 addi x2,x2,4 + +80001848 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sig0h x15, x17, x16 # perform operation +80001848: 5d0887b3 sha512sig0h x15,x17,x16 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000184c: 000aa203 lw x4,0(x21) +80001850: 00f20863 beq x4,x15,80001860 +80001854: 4ed032ef jal x5,80005540 +80001858: 80001848 .word 0x80001848 +8000185c: 8000b221 .word 0x8000b221 +80001860: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x00000001 +80001864: 00012783 lw x15,0(x2) +80001868: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x7ffffffe +8000186c: 00012f03 lw x30,0(x2) +80001870: 00410113 addi x2,x2,4 + +80001874 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sig0h x28, x15, x30 # perform operation +80001874: 5de78e33 sha512sig0h x28,x15,x30 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001878: 000aa203 lw x4,0(x21) +8000187c: 01c20863 beq x4,x28,8000188c +80001880: 4c1032ef jal x5,80005540 +80001884: 80001874 .word 0x80001874 +80001888: 8000b280 .word 0x8000b280 +8000188c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x00000001 +80001890: 00012683 lw x13,0(x2) +80001894: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xffffffff +80001898: 00012b83 lw x23,0(x2) +8000189c: 00410113 addi x2,x2,4 + +800018a0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sig0h x6, x13, x23 # perform operation +800018a0: 5d768333 sha512sig0h x6,x13,x23 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a4: 000aa203 lw x4,0(x21) +800018a8: 00620863 beq x4,x6,800018b8 +800018ac: 495032ef jal x5,80005540 +800018b0: 800018a0 .word 0x800018a0 +800018b4: 8000b2df .word 0x8000b2df +800018b8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x00000001 +800018bc: 00012b03 lw x22,0(x2) +800018c0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xfffffffe +800018c4: 00012703 lw x14,0(x2) +800018c8: 00410113 addi x2,x2,4 + +800018cc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sig0h x10, x22, x14 # perform operation +800018cc: 5ceb0533 sha512sig0h x10,x22,x14 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d0: 000aa203 lw x4,0(x21) +800018d4: 00a20863 beq x4,x10,800018e4 +800018d8: 469032ef jal x5,80005540 +800018dc: 800018cc .word 0x800018cc +800018e0: 8000b33e .word 0x8000b33e +800018e4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x00000001 +800018e8: 00012503 lw x10,0(x2) +800018ec: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x5bbc8872 +800018f0: 00012403 lw x8,0(x2) +800018f4: 00410113 addi x2,x2,4 + +800018f8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sig0h x18, x10, x8 # perform operation +800018f8: 5c850933 sha512sig0h x18,x10,x8 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018fc: 000aa203 lw x4,0(x21) +80001900: 01220863 beq x4,x18,80001910 +80001904: 43d032ef jal x5,80005540 +80001908: 800018f8 .word 0x800018f8 +8000190c: 8000b39d .word 0x8000b39d +80001910: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x00000001 +80001914: 00012783 lw x15,0(x2) +80001918: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xaaaaaaaa +8000191c: 00012603 lw x12,0(x2) +80001920: 00410113 addi x2,x2,4 + +80001924 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sig0h x16, x15, x12 # perform operation +80001924: 5cc78833 sha512sig0h x16,x15,x12 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001928: 000aa203 lw x4,0(x21) +8000192c: 01020863 beq x4,x16,8000193c +80001930: 411032ef jal x5,80005540 +80001934: 80001924 .word 0x80001924 +80001938: 8000b3fc .word 0x8000b3fc +8000193c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x00000001 +80001940: 00012a03 lw x20,0(x2) +80001944: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x55555555 +80001948: 00012d83 lw x27,0(x2) +8000194c: 00410113 addi x2,x2,4 + +80001950 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sig0h x12, x20, x27 # perform operation +80001950: 5dba0633 sha512sig0h x12,x20,x27 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001954: 000aa203 lw x4,0(x21) +80001958: 00c20863 beq x4,x12,80001968 +8000195c: 3e5032ef jal x5,80005540 +80001960: 80001950 .word 0x80001950 +80001964: 8000b45b .word 0x8000b45b +80001968: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x00000002 +8000196c: 00012903 lw x18,0(x2) +80001970: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000 +80001974: 00012b03 lw x22,0(x2) +80001978: 00410113 addi x2,x2,4 + +8000197c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sig0h x25, x18, x22 # perform operation +8000197c: 5d690cb3 sha512sig0h x25,x18,x22 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001980: 000aa203 lw x4,0(x21) +80001984: 01920863 beq x4,x25,80001994 +80001988: 3b9032ef jal x5,80005540 +8000198c: 8000197c .word 0x8000197c +80001990: 8000b4ba .word 0x8000b4ba +80001994: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x00000002 +80001998: 00012383 lw x7,0(x2) +8000199c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x00000001 +800019a0: 00012c83 lw x25,0(x2) +800019a4: 00410113 addi x2,x2,4 + +800019a8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sig0h x24, x7, x25 # perform operation +800019a8: 5d938c33 sha512sig0h x24,x7,x25 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019ac: 000aa203 lw x4,0(x21) +800019b0: 01820863 beq x4,x24,800019c0 +800019b4: 38d032ef jal x5,80005540 +800019b8: 800019a8 .word 0x800019a8 +800019bc: 8000b512 .word 0x8000b512 +800019c0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x00000002 +800019c4: 00012883 lw x17,0(x2) +800019c8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x00000002 +800019cc: 00012783 lw x15,0(x2) +800019d0: 00410113 addi x2,x2,4 + +800019d4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sig0h x14, x17, x15 # perform operation +800019d4: 5cf88733 sha512sig0h x14,x17,x15 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d8: 000aa203 lw x4,0(x21) +800019dc: 00e20863 beq x4,x14,800019ec +800019e0: 361032ef jal x5,80005540 +800019e4: 800019d4 .word 0x800019d4 +800019e8: 8000b56a .word 0x8000b56a +800019ec: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x00000002 +800019f0: 00012b83 lw x23,0(x2) +800019f4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x80000000 +800019f8: 00012b03 lw x22,0(x2) +800019fc: 00410113 addi x2,x2,4 + +80001a00 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sig0h x6, x23, x22 # perform operation +80001a00: 5d6b8333 sha512sig0h x6,x23,x22 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a04: 000aa203 lw x4,0(x21) +80001a08: 00620863 beq x4,x6,80001a18 +80001a0c: 335032ef jal x5,80005540 +80001a10: 80001a00 .word 0x80001a00 +80001a14: 8000b5c2 .word 0x8000b5c2 +80001a18: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000002 +80001a1c: 00012e03 lw x28,0(x2) +80001a20: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x80000001 +80001a24: 00012083 lw x1,0(x2) +80001a28: 00410113 addi x2,x2,4 + +80001a2c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sig0h x19, x28, x1 # perform operation +80001a2c: 5c1e09b3 sha512sig0h x19,x28,x1 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a30: 000aa203 lw x4,0(x21) +80001a34: 01320863 beq x4,x19,80001a44 +80001a38: 309032ef jal x5,80005540 +80001a3c: 80001a2c .word 0x80001a2c +80001a40: 8000b621 .word 0x8000b621 +80001a44: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x00000002 +80001a48: 00012683 lw x13,0(x2) +80001a4c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x7fffffff +80001a50: 00012583 lw x11,0(x2) +80001a54: 00410113 addi x2,x2,4 + +80001a58 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sig0h x6, x13, x11 # perform operation +80001a58: 5cb68333 sha512sig0h x6,x13,x11 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a5c: 000aa203 lw x4,0(x21) +80001a60: 00620863 beq x4,x6,80001a70 +80001a64: 2dd032ef jal x5,80005540 +80001a68: 80001a58 .word 0x80001a58 +80001a6c: 8000b680 .word 0x8000b680 +80001a70: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x00000002 +80001a74: 00012583 lw x11,0(x2) +80001a78: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x7ffffffe +80001a7c: 00012883 lw x17,0(x2) +80001a80: 00410113 addi x2,x2,4 + +80001a84 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sig0h x20, x11, x17 # perform operation +80001a84: 5d158a33 sha512sig0h x20,x11,x17 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a88: 000aa203 lw x4,0(x21) +80001a8c: 01420863 beq x4,x20,80001a9c +80001a90: 2b1032ef jal x5,80005540 +80001a94: 80001a84 .word 0x80001a84 +80001a98: 8000b6df .word 0x8000b6df +80001a9c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x00000002 +80001aa0: 00012503 lw x10,0(x2) +80001aa4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xffffffff +80001aa8: 00012603 lw x12,0(x2) +80001aac: 00410113 addi x2,x2,4 + +80001ab0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sig0h x7, x10, x12 # perform operation +80001ab0: 5cc503b3 sha512sig0h x7,x10,x12 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab4: 000aa203 lw x4,0(x21) +80001ab8: 00720863 beq x4,x7,80001ac8 +80001abc: 285032ef jal x5,80005540 +80001ac0: 80001ab0 .word 0x80001ab0 +80001ac4: 8000b73e .word 0x8000b73e +80001ac8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x00000002 +80001acc: 00012183 lw x3,0(x2) +80001ad0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xfffffffe +80001ad4: 00012603 lw x12,0(x2) +80001ad8: 00410113 addi x2,x2,4 + +80001adc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sig0h x17, x3, x12 # perform operation +80001adc: 5cc188b3 sha512sig0h x17,x3,x12 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae0: 000aa203 lw x4,0(x21) +80001ae4: 01120863 beq x4,x17,80001af4 +80001ae8: 259032ef jal x5,80005540 +80001aec: 80001adc .word 0x80001adc +80001af0: 8000b79d .word 0x8000b79d +80001af4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x00000002 +80001af8: 00012e83 lw x29,0(x2) +80001afc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x5bbc8872 +80001b00: 00012683 lw x13,0(x2) +80001b04: 00410113 addi x2,x2,4 + +80001b08 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sig0h x9, x29, x13 # perform operation +80001b08: 5cde84b3 sha512sig0h x9,x29,x13 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b0c: 000aa203 lw x4,0(x21) +80001b10: 00920863 beq x4,x9,80001b20 +80001b14: 22d032ef jal x5,80005540 +80001b18: 80001b08 .word 0x80001b08 +80001b1c: 8000b7fc .word 0x8000b7fc +80001b20: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x00000002 +80001b24: 00012383 lw x7,0(x2) +80001b28: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xaaaaaaaa +80001b2c: 00012303 lw x6,0(x2) +80001b30: 00410113 addi x2,x2,4 + +80001b34 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sig0h x24, x7, x6 # perform operation +80001b34: 5c638c33 sha512sig0h x24,x7,x6 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b38: 000aa203 lw x4,0(x21) +80001b3c: 01820863 beq x4,x24,80001b4c +80001b40: 201032ef jal x5,80005540 +80001b44: 80001b34 .word 0x80001b34 +80001b48: 8000b85b .word 0x8000b85b +80001b4c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x00000002 +80001b50: 00012803 lw x16,0(x2) +80001b54: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x55555555 +80001b58: 00012f83 lw x31,0(x2) +80001b5c: 00410113 addi x2,x2,4 + +80001b60 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sig0h x9, x16, x31 # perform operation +80001b60: 5df804b3 sha512sig0h x9,x16,x31 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b64: 000aa203 lw x4,0(x21) +80001b68: 00920863 beq x4,x9,80001b78 +80001b6c: 1d5032ef jal x5,80005540 +80001b70: 80001b60 .word 0x80001b60 +80001b74: 8000b8ba .word 0x8000b8ba +80001b78: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x80000000 +80001b7c: 00012c03 lw x24,0(x2) +80001b80: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x00000000 +80001b84: 00012483 lw x9,0(x2) +80001b88: 00410113 addi x2,x2,4 + +80001b8c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sig0h x14, x24, x9 # perform operation +80001b8c: 5c9c0733 sha512sig0h x14,x24,x9 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b90: 000aa203 lw x4,0(x21) +80001b94: 00e20863 beq x4,x14,80001ba4 +80001b98: 1a9032ef jal x5,80005540 +80001b9c: 80001b8c .word 0x80001b8c +80001ba0: 8000b919 .word 0x8000b919 +80001ba4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x80000000 +80001ba8: 00012703 lw x14,0(x2) +80001bac: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x00000001 +80001bb0: 00012983 lw x19,0(x2) +80001bb4: 00410113 addi x2,x2,4 + +80001bb8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sig0h x31, x14, x19 # perform operation +80001bb8: 5d370fb3 sha512sig0h x31,x14,x19 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bbc: 000aa203 lw x4,0(x21) +80001bc0: 01f20863 beq x4,x31,80001bd0 +80001bc4: 17d032ef jal x5,80005540 +80001bc8: 80001bb8 .word 0x80001bb8 +80001bcc: 8000b978 .word 0x8000b978 +80001bd0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x80000000 +80001bd4: 00012e83 lw x29,0(x2) +80001bd8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x00000002 +80001bdc: 00012083 lw x1,0(x2) +80001be0: 00410113 addi x2,x2,4 + +80001be4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sig0h x18, x29, x1 # perform operation +80001be4: 5c1e8933 sha512sig0h x18,x29,x1 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be8: 000aa203 lw x4,0(x21) +80001bec: 01220863 beq x4,x18,80001bfc +80001bf0: 151032ef jal x5,80005540 +80001bf4: 80001be4 .word 0x80001be4 +80001bf8: 8000b9d7 .word 0x8000b9d7 +80001bfc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x80000000 +80001c00: 00012e03 lw x28,0(x2) +80001c04: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x80000000 +80001c08: 00012483 lw x9,0(x2) +80001c0c: 00410113 addi x2,x2,4 + +80001c10 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sig0h x30, x28, x9 # perform operation +80001c10: 5c9e0f33 sha512sig0h x30,x28,x9 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c14: 000aa203 lw x4,0(x21) +80001c18: 01e20863 beq x4,x30,80001c28 +80001c1c: 125032ef jal x5,80005540 +80001c20: 80001c10 .word 0x80001c10 +80001c24: 8000ba36 .word 0x8000ba36 +80001c28: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x80000000 +80001c2c: 00012083 lw x1,0(x2) +80001c30: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x80000001 +80001c34: 00012c83 lw x25,0(x2) +80001c38: 00410113 addi x2,x2,4 + +80001c3c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sig0h x12, x1, x25 # perform operation +80001c3c: 5d908633 sha512sig0h x12,x1,x25 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c40: 000aa203 lw x4,0(x21) +80001c44: 00c20863 beq x4,x12,80001c54 +80001c48: 0f9032ef jal x5,80005540 +80001c4c: 80001c3c .word 0x80001c3c +80001c50: 8000ba9c .word 0x8000ba9c +80001c54: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x80000000 +80001c58: 00012983 lw x19,0(x2) +80001c5c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x7fffffff +80001c60: 00012083 lw x1,0(x2) +80001c64: 00410113 addi x2,x2,4 + +80001c68 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sig0h x12, x19, x1 # perform operation +80001c68: 5c198633 sha512sig0h x12,x19,x1 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c6c: 000aa203 lw x4,0(x21) +80001c70: 00c20863 beq x4,x12,80001c80 +80001c74: 0cd032ef jal x5,80005540 +80001c78: 80001c68 .word 0x80001c68 +80001c7c: 8000bb02 .word 0x8000bb02 +80001c80: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x80000000 +80001c84: 00012683 lw x13,0(x2) +80001c88: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x7ffffffe +80001c8c: 00012c03 lw x24,0(x2) +80001c90: 00410113 addi x2,x2,4 + +80001c94 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sig0h x14, x13, x24 # perform operation +80001c94: 5d868733 sha512sig0h x14,x13,x24 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c98: 000aa203 lw x4,0(x21) +80001c9c: 00e20863 beq x4,x14,80001cac +80001ca0: 0a1032ef jal x5,80005540 +80001ca4: 80001c94 .word 0x80001c94 +80001ca8: 8000bb68 .word 0x8000bb68 +80001cac: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x80000000 +80001cb0: 00012f83 lw x31,0(x2) +80001cb4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xffffffff +80001cb8: 00012303 lw x6,0(x2) +80001cbc: 00410113 addi x2,x2,4 + +80001cc0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sig0h x20, x31, x6 # perform operation +80001cc0: 5c6f8a33 sha512sig0h x20,x31,x6 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc4: 000aa203 lw x4,0(x21) +80001cc8: 01420863 beq x4,x20,80001cd8 +80001ccc: 075032ef jal x5,80005540 +80001cd0: 80001cc0 .word 0x80001cc0 +80001cd4: 8000bbce .word 0x8000bbce +80001cd8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x80000000 +80001cdc: 00012c03 lw x24,0(x2) +80001ce0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xfffffffe +80001ce4: 00012b83 lw x23,0(x2) +80001ce8: 00410113 addi x2,x2,4 + +80001cec : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sig0h x30, x24, x23 # perform operation +80001cec: 5d7c0f33 sha512sig0h x30,x24,x23 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf0: 000aa203 lw x4,0(x21) +80001cf4: 01e20863 beq x4,x30,80001d04 +80001cf8: 049032ef jal x5,80005540 +80001cfc: 80001cec .word 0x80001cec +80001d00: 8000bc34 .word 0x8000bc34 +80001d04: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x80000000 +80001d08: 00012083 lw x1,0(x2) +80001d0c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x5bbc8872 +80001d10: 00012503 lw x10,0(x2) +80001d14: 00410113 addi x2,x2,4 + +80001d18 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sig0h x20, x1, x10 # perform operation +80001d18: 5ca08a33 sha512sig0h x20,x1,x10 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d1c: 000aa203 lw x4,0(x21) +80001d20: 01420863 beq x4,x20,80001d30 +80001d24: 01d032ef jal x5,80005540 +80001d28: 80001d18 .word 0x80001d18 +80001d2c: 8000bc9a .word 0x8000bc9a +80001d30: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x80000000 +80001d34: 00012583 lw x11,0(x2) +80001d38: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xaaaaaaaa +80001d3c: 00012f03 lw x30,0(x2) +80001d40: 00410113 addi x2,x2,4 + +80001d44 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sig0h x24, x11, x30 # perform operation +80001d44: 5de58c33 sha512sig0h x24,x11,x30 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d48: 000aa203 lw x4,0(x21) +80001d4c: 01820863 beq x4,x24,80001d5c +80001d50: 7f0032ef jal x5,80005540 +80001d54: 80001d44 .word 0x80001d44 +80001d58: 8000bd00 .word 0x8000bd00 +80001d5c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x80000000 +80001d60: 00012483 lw x9,0(x2) +80001d64: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x55555555 +80001d68: 00012083 lw x1,0(x2) +80001d6c: 00410113 addi x2,x2,4 + +80001d70 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sig0h x24, x9, x1 # perform operation +80001d70: 5c148c33 sha512sig0h x24,x9,x1 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d74: 000aa203 lw x4,0(x21) +80001d78: 01820863 beq x4,x24,80001d88 +80001d7c: 7c4032ef jal x5,80005540 +80001d80: 80001d70 .word 0x80001d70 +80001d84: 8000bd66 .word 0x8000bd66 +80001d88: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x80000001 +80001d8c: 00012983 lw x19,0(x2) +80001d90: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x00000000 +80001d94: 00012e03 lw x28,0(x2) +80001d98: 00410113 addi x2,x2,4 + +80001d9c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sig0h x11, x19, x28 # perform operation +80001d9c: 5dc985b3 sha512sig0h x11,x19,x28 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da0: 000aa203 lw x4,0(x21) +80001da4: 00b20863 beq x4,x11,80001db4 +80001da8: 798032ef jal x5,80005540 +80001dac: 80001d9c .word 0x80001d9c +80001db0: 8000bdcc .word 0x8000bdcc +80001db4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x80000001 +80001db8: 00012403 lw x8,0(x2) +80001dbc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000001 +80001dc0: 00012903 lw x18,0(x2) +80001dc4: 00410113 addi x2,x2,4 + +80001dc8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sig0h x16, x8, x18 # perform operation +80001dc8: 5d240833 sha512sig0h x16,x8,x18 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dcc: 000aa203 lw x4,0(x21) +80001dd0: 01020863 beq x4,x16,80001de0 +80001dd4: 76c032ef jal x5,80005540 +80001dd8: 80001dc8 .word 0x80001dc8 +80001ddc: 8000be2b .word 0x8000be2b +80001de0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x80000001 +80001de4: 00012383 lw x7,0(x2) +80001de8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x00000002 +80001dec: 00012583 lw x11,0(x2) +80001df0: 00410113 addi x2,x2,4 + +80001df4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sig0h x17, x7, x11 # perform operation +80001df4: 5cb388b3 sha512sig0h x17,x7,x11 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df8: 000aa203 lw x4,0(x21) +80001dfc: 01120863 beq x4,x17,80001e0c +80001e00: 740032ef jal x5,80005540 +80001e04: 80001df4 .word 0x80001df4 +80001e08: 8000be8a .word 0x8000be8a +80001e0c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x80000001 +80001e10: 00012c83 lw x25,0(x2) +80001e14: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x80000000 +80001e18: 00012d03 lw x26,0(x2) +80001e1c: 00410113 addi x2,x2,4 + +80001e20 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sig0h x3, x25, x26 # perform operation +80001e20: 5dac81b3 sha512sig0h x3,x25,x26 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e24: 000aa203 lw x4,0(x21) +80001e28: 00320863 beq x4,x3,80001e38 +80001e2c: 714032ef jal x5,80005540 +80001e30: 80001e20 .word 0x80001e20 +80001e34: 8000bee9 .word 0x8000bee9 +80001e38: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x80000001 +80001e3c: 00012403 lw x8,0(x2) +80001e40: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x80000001 +80001e44: 00012183 lw x3,0(x2) +80001e48: 00410113 addi x2,x2,4 + +80001e4c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sig0h x14, x8, x3 # perform operation +80001e4c: 5c340733 sha512sig0h x14,x8,x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e50: 000aa203 lw x4,0(x21) +80001e54: 00e20863 beq x4,x14,80001e64 +80001e58: 6e8032ef jal x5,80005540 +80001e5c: 80001e4c .word 0x80001e4c +80001e60: 8000bf4f .word 0x8000bf4f +80001e64: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x80000001 +80001e68: 00012b03 lw x22,0(x2) +80001e6c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x7fffffff +80001e70: 00012b83 lw x23,0(x2) +80001e74: 00410113 addi x2,x2,4 + +80001e78 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sig0h x14, x22, x23 # perform operation +80001e78: 5d7b0733 sha512sig0h x14,x22,x23 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e7c: 000aa203 lw x4,0(x21) +80001e80: 00e20863 beq x4,x14,80001e90 +80001e84: 6bc032ef jal x5,80005540 +80001e88: 80001e78 .word 0x80001e78 +80001e8c: 8000bfb5 .word 0x8000bfb5 +80001e90: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x80000001 +80001e94: 00012483 lw x9,0(x2) +80001e98: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x7ffffffe +80001e9c: 00012603 lw x12,0(x2) +80001ea0: 00410113 addi x2,x2,4 + +80001ea4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sig0h x14, x9, x12 # perform operation +80001ea4: 5cc48733 sha512sig0h x14,x9,x12 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea8: 000aa203 lw x4,0(x21) +80001eac: 00e20863 beq x4,x14,80001ebc +80001eb0: 690032ef jal x5,80005540 +80001eb4: 80001ea4 .word 0x80001ea4 +80001eb8: 8000c01b .word 0x8000c01b +80001ebc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x80000001 +80001ec0: 00012503 lw x10,0(x2) +80001ec4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xffffffff +80001ec8: 00012303 lw x6,0(x2) +80001ecc: 00410113 addi x2,x2,4 + +80001ed0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sig0h x14, x10, x6 # perform operation +80001ed0: 5c650733 sha512sig0h x14,x10,x6 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed4: 000aa203 lw x4,0(x21) +80001ed8: 00e20863 beq x4,x14,80001ee8 +80001edc: 664032ef jal x5,80005540 +80001ee0: 80001ed0 .word 0x80001ed0 +80001ee4: 8000c081 .word 0x8000c081 +80001ee8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x80000001 +80001eec: 00012f03 lw x30,0(x2) +80001ef0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xfffffffe +80001ef4: 00012583 lw x11,0(x2) +80001ef8: 00410113 addi x2,x2,4 + +80001efc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sig0h x26, x30, x11 # perform operation +80001efc: 5cbf0d33 sha512sig0h x26,x30,x11 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f00: 000aa203 lw x4,0(x21) +80001f04: 01a20863 beq x4,x26,80001f14 +80001f08: 638032ef jal x5,80005540 +80001f0c: 80001efc .word 0x80001efc +80001f10: 8000c0e7 .word 0x8000c0e7 +80001f14: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x80000001 +80001f18: 00012303 lw x6,0(x2) +80001f1c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x5bbc8872 +80001f20: 00012e83 lw x29,0(x2) +80001f24: 00410113 addi x2,x2,4 + +80001f28 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sig0h x11, x6, x29 # perform operation +80001f28: 5dd305b3 sha512sig0h x11,x6,x29 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f2c: 000aa203 lw x4,0(x21) +80001f30: 00b20863 beq x4,x11,80001f40 +80001f34: 60c032ef jal x5,80005540 +80001f38: 80001f28 .word 0x80001f28 +80001f3c: 8000c14d .word 0x8000c14d +80001f40: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x80000001 +80001f44: 00012903 lw x18,0(x2) +80001f48: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xaaaaaaaa +80001f4c: 00012683 lw x13,0(x2) +80001f50: 00410113 addi x2,x2,4 + +80001f54 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sig0h x23, x18, x13 # perform operation +80001f54: 5cd90bb3 sha512sig0h x23,x18,x13 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f58: 000aa203 lw x4,0(x21) +80001f5c: 01720863 beq x4,x23,80001f6c +80001f60: 5e0032ef jal x5,80005540 +80001f64: 80001f54 .word 0x80001f54 +80001f68: 8000c1b3 .word 0x8000c1b3 +80001f6c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x80000001 +80001f70: 00012903 lw x18,0(x2) +80001f74: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x55555555 +80001f78: 00012403 lw x8,0(x2) +80001f7c: 00410113 addi x2,x2,4 + +80001f80 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sig0h x31, x18, x8 # perform operation +80001f80: 5c890fb3 sha512sig0h x31,x18,x8 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f84: 000aa203 lw x4,0(x21) +80001f88: 01f20863 beq x4,x31,80001f98 +80001f8c: 5b4032ef jal x5,80005540 +80001f90: 80001f80 .word 0x80001f80 +80001f94: 8000c219 .word 0x8000c219 +80001f98: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x7fffffff +80001f9c: 00012783 lw x15,0(x2) +80001fa0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x00000000 +80001fa4: 00012303 lw x6,0(x2) +80001fa8: 00410113 addi x2,x2,4 + +80001fac : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sig0h x27, x15, x6 # perform operation +80001fac: 5c678db3 sha512sig0h x27,x15,x6 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb0: 000aa203 lw x4,0(x21) +80001fb4: 01b20863 beq x4,x27,80001fc4 +80001fb8: 588032ef jal x5,80005540 +80001fbc: 80001fac .word 0x80001fac +80001fc0: 8000c27f .word 0x8000c27f +80001fc4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x7fffffff +80001fc8: 00012b03 lw x22,0(x2) +80001fcc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x00000001 +80001fd0: 00012983 lw x19,0(x2) +80001fd4: 00410113 addi x2,x2,4 + +80001fd8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sig0h x11, x22, x19 # perform operation +80001fd8: 5d3b05b3 sha512sig0h x11,x22,x19 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fdc: 000aa203 lw x4,0(x21) +80001fe0: 00b20863 beq x4,x11,80001ff0 +80001fe4: 55c032ef jal x5,80005540 +80001fe8: 80001fd8 .word 0x80001fd8 +80001fec: 8000c2de .word 0x8000c2de +80001ff0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7fffffff +80001ff4: 00012c03 lw x24,0(x2) +80001ff8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x00000002 +80001ffc: 00012f03 lw x30,0(x2) +80002000: 00410113 addi x2,x2,4 + +80002004 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sig0h x22, x24, x30 # perform operation +80002004: 5dec0b33 sha512sig0h x22,x24,x30 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002008: 000aa203 lw x4,0(x21) +8000200c: 01620863 beq x4,x22,8000201c +80002010: 530032ef jal x5,80005540 +80002014: 80002004 .word 0x80002004 +80002018: 8000c33d .word 0x8000c33d +8000201c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7fffffff +80002020: 00012c83 lw x25,0(x2) +80002024: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x80000000 +80002028: 00012303 lw x6,0(x2) +8000202c: 00410113 addi x2,x2,4 + +80002030 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sig0h x28, x25, x6 # perform operation +80002030: 5c6c8e33 sha512sig0h x28,x25,x6 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002034: 000aa203 lw x4,0(x21) +80002038: 01c20863 beq x4,x28,80002048 +8000203c: 504032ef jal x5,80005540 +80002040: 80002030 .word 0x80002030 +80002044: 8000c39c .word 0x8000c39c +80002048: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x7fffffff +8000204c: 00012f83 lw x31,0(x2) +80002050: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x80000001 +80002054: 00012d83 lw x27,0(x2) +80002058: 00410113 addi x2,x2,4 + +8000205c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sig0h x8, x31, x27 # perform operation +8000205c: 5dbf8433 sha512sig0h x8,x31,x27 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002060: 000aa203 lw x4,0(x21) +80002064: 00820863 beq x4,x8,80002074 +80002068: 4d8032ef jal x5,80005540 +8000206c: 8000205c .word 0x8000205c +80002070: 8000c402 .word 0x8000c402 +80002074: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7fffffff +80002078: 00012c03 lw x24,0(x2) +8000207c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x7fffffff +80002080: 00012f83 lw x31,0(x2) +80002084: 00410113 addi x2,x2,4 + +80002088 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sig0h x29, x24, x31 # perform operation +80002088: 5dfc0eb3 sha512sig0h x29,x24,x31 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000208c: 000aa203 lw x4,0(x21) +80002090: 01d20863 beq x4,x29,800020a0 +80002094: 4ac032ef jal x5,80005540 +80002098: 80002088 .word 0x80002088 +8000209c: 8000c468 .word 0x8000c468 +800020a0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7fffffff +800020a4: 00012c83 lw x25,0(x2) +800020a8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x7ffffffe +800020ac: 00012d03 lw x26,0(x2) +800020b0: 00410113 addi x2,x2,4 + +800020b4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sig0h x3, x25, x26 # perform operation +800020b4: 5dac81b3 sha512sig0h x3,x25,x26 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b8: 000aa203 lw x4,0(x21) +800020bc: 00320863 beq x4,x3,800020cc +800020c0: 480032ef jal x5,80005540 +800020c4: 800020b4 .word 0x800020b4 +800020c8: 8000c4ce .word 0x8000c4ce +800020cc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x7fffffff +800020d0: 00012083 lw x1,0(x2) +800020d4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xffffffff +800020d8: 00012a03 lw x20,0(x2) +800020dc: 00410113 addi x2,x2,4 + +800020e0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sig0h x19, x1, x20 # perform operation +800020e0: 5d4089b3 sha512sig0h x19,x1,x20 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e4: 000aa203 lw x4,0(x21) +800020e8: 01320863 beq x4,x19,800020f8 +800020ec: 454032ef jal x5,80005540 +800020f0: 800020e0 .word 0x800020e0 +800020f4: 8000c534 .word 0x8000c534 +800020f8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x7fffffff +800020fc: 00012803 lw x16,0(x2) +80002100: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xfffffffe +80002104: 00012683 lw x13,0(x2) +80002108: 00410113 addi x2,x2,4 + +8000210c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sig0h x22, x16, x13 # perform operation +8000210c: 5cd80b33 sha512sig0h x22,x16,x13 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002110: 000aa203 lw x4,0(x21) +80002114: 01620863 beq x4,x22,80002124 +80002118: 428032ef jal x5,80005540 +8000211c: 8000210c .word 0x8000210c +80002120: 8000c59a .word 0x8000c59a +80002124: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7fffffff +80002128: 00012583 lw x11,0(x2) +8000212c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x5bbc8872 +80002130: 00012b03 lw x22,0(x2) +80002134: 00410113 addi x2,x2,4 + +80002138 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sig0h x25, x11, x22 # perform operation +80002138: 5d658cb3 sha512sig0h x25,x11,x22 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000213c: 000aa203 lw x4,0(x21) +80002140: 01920863 beq x4,x25,80002150 +80002144: 3fc032ef jal x5,80005540 +80002148: 80002138 .word 0x80002138 +8000214c: 8000c600 .word 0x8000c600 +80002150: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7fffffff +80002154: 00012c83 lw x25,0(x2) +80002158: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xaaaaaaaa +8000215c: 00012483 lw x9,0(x2) +80002160: 00410113 addi x2,x2,4 + +80002164 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sig0h x3, x25, x9 # perform operation +80002164: 5c9c81b3 sha512sig0h x3,x25,x9 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002168: 000aa203 lw x4,0(x21) +8000216c: 00320863 beq x4,x3,8000217c +80002170: 3d0032ef jal x5,80005540 +80002174: 80002164 .word 0x80002164 +80002178: 8000c666 .word 0x8000c666 +8000217c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x7fffffff +80002180: 00012383 lw x7,0(x2) +80002184: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x55555555 +80002188: 00012583 lw x11,0(x2) +8000218c: 00410113 addi x2,x2,4 + +80002190 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sig0h x24, x7, x11 # perform operation +80002190: 5cb38c33 sha512sig0h x24,x7,x11 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002194: 000aa203 lw x4,0(x21) +80002198: 01820863 beq x4,x24,800021a8 +8000219c: 3a4032ef jal x5,80005540 +800021a0: 80002190 .word 0x80002190 +800021a4: 8000c6cc .word 0x8000c6cc +800021a8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x7ffffffe +800021ac: 00012603 lw x12,0(x2) +800021b0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x00000000 +800021b4: 00012c03 lw x24,0(x2) +800021b8: 00410113 addi x2,x2,4 + +800021bc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sig0h x17, x12, x24 # perform operation +800021bc: 5d8608b3 sha512sig0h x17,x12,x24 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c0: 000aa203 lw x4,0(x21) +800021c4: 01120863 beq x4,x17,800021d4 +800021c8: 378032ef jal x5,80005540 +800021cc: 800021bc .word 0x800021bc +800021d0: 8000c732 .word 0x8000c732 +800021d4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x7ffffffe +800021d8: 00012983 lw x19,0(x2) +800021dc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x00000001 +800021e0: 00012683 lw x13,0(x2) +800021e4: 00410113 addi x2,x2,4 + +800021e8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sig0h x18, x19, x13 # perform operation +800021e8: 5cd98933 sha512sig0h x18,x19,x13 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021ec: 000aa203 lw x4,0(x21) +800021f0: 01220863 beq x4,x18,80002200 +800021f4: 34c032ef jal x5,80005540 +800021f8: 800021e8 .word 0x800021e8 +800021fc: 8000c791 .word 0x8000c791 +80002200: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x7ffffffe +80002204: 00012d03 lw x26,0(x2) +80002208: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x00000002 +8000220c: 00012383 lw x7,0(x2) +80002210: 00410113 addi x2,x2,4 + +80002214 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sig0h x11, x26, x7 # perform operation +80002214: 5c7d05b3 sha512sig0h x11,x26,x7 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002218: 000aa203 lw x4,0(x21) +8000221c: 00b20863 beq x4,x11,8000222c +80002220: 320032ef jal x5,80005540 +80002224: 80002214 .word 0x80002214 +80002228: 8000c7f0 .word 0x8000c7f0 +8000222c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7ffffffe +80002230: 00012583 lw x11,0(x2) +80002234: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x80000000 +80002238: 00012e83 lw x29,0(x2) +8000223c: 00410113 addi x2,x2,4 + +80002240 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sig0h x18, x11, x29 # perform operation +80002240: 5dd58933 sha512sig0h x18,x11,x29 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002244: 000aa203 lw x4,0(x21) +80002248: 01220863 beq x4,x18,80002258 +8000224c: 2f4032ef jal x5,80005540 +80002250: 80002240 .word 0x80002240 +80002254: 8000c84f .word 0x8000c84f +80002258: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x7ffffffe +8000225c: 00012303 lw x6,0(x2) +80002260: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x80000001 +80002264: 00012803 lw x16,0(x2) +80002268: 00410113 addi x2,x2,4 + +8000226c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sig0h x23, x6, x16 # perform operation +8000226c: 5d030bb3 sha512sig0h x23,x6,x16 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002270: 000aa203 lw x4,0(x21) +80002274: 01720863 beq x4,x23,80002284 +80002278: 2c8032ef jal x5,80005540 +8000227c: 8000226c .word 0x8000226c +80002280: 8000c8b5 .word 0x8000c8b5 +80002284: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7ffffffe +80002288: 00012c83 lw x25,0(x2) +8000228c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x7fffffff +80002290: 00012383 lw x7,0(x2) +80002294: 00410113 addi x2,x2,4 + +80002298 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sig0h x28, x25, x7 # perform operation +80002298: 5c7c8e33 sha512sig0h x28,x25,x7 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +8000229c: 000aa203 lw x4,0(x21) +800022a0: 01c20863 beq x4,x28,800022b0 +800022a4: 29c032ef jal x5,80005540 +800022a8: 80002298 .word 0x80002298 +800022ac: 8000c91b .word 0x8000c91b +800022b0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7ffffffe +800022b4: 00012183 lw x3,0(x2) +800022b8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x7ffffffe +800022bc: 00012703 lw x14,0(x2) +800022c0: 00410113 addi x2,x2,4 + +800022c4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sig0h x20, x3, x14 # perform operation +800022c4: 5ce18a33 sha512sig0h x20,x3,x14 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c8: 000aa203 lw x4,0(x21) +800022cc: 01420863 beq x4,x20,800022dc +800022d0: 270032ef jal x5,80005540 +800022d4: 800022c4 .word 0x800022c4 +800022d8: 8000c981 .word 0x8000c981 +800022dc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x7ffffffe +800022e0: 00012a03 lw x20,0(x2) +800022e4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xffffffff +800022e8: 00012683 lw x13,0(x2) +800022ec: 00410113 addi x2,x2,4 + +800022f0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sig0h x29, x20, x13 # perform operation +800022f0: 5cda0eb3 sha512sig0h x29,x20,x13 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f4: 000aa203 lw x4,0(x21) +800022f8: 01d20863 beq x4,x29,80002308 +800022fc: 244032ef jal x5,80005540 +80002300: 800022f0 .word 0x800022f0 +80002304: 8000c9e7 .word 0x8000c9e7 +80002308: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x7ffffffe +8000230c: 00012903 lw x18,0(x2) +80002310: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xfffffffe +80002314: 00012083 lw x1,0(x2) +80002318: 00410113 addi x2,x2,4 + +8000231c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sig0h x15, x18, x1 # perform operation +8000231c: 5c1907b3 sha512sig0h x15,x18,x1 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002320: 000aa203 lw x4,0(x21) +80002324: 00f20863 beq x4,x15,80002334 +80002328: 218032ef jal x5,80005540 +8000232c: 8000231c .word 0x8000231c +80002330: 8000ca4d .word 0x8000ca4d +80002334: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x7ffffffe +80002338: 00012803 lw x16,0(x2) +8000233c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5bbc8872 +80002340: 00012983 lw x19,0(x2) +80002344: 00410113 addi x2,x2,4 + +80002348 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sig0h x9, x16, x19 # perform operation +80002348: 5d3804b3 sha512sig0h x9,x16,x19 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000234c: 000aa203 lw x4,0(x21) +80002350: 00920863 beq x4,x9,80002360 +80002354: 1ec032ef jal x5,80005540 +80002358: 80002348 .word 0x80002348 +8000235c: 8000cab3 .word 0x8000cab3 +80002360: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x7ffffffe +80002364: 00012703 lw x14,0(x2) +80002368: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xaaaaaaaa +8000236c: 00012603 lw x12,0(x2) +80002370: 00410113 addi x2,x2,4 + +80002374 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sig0h x16, x14, x12 # perform operation +80002374: 5cc70833 sha512sig0h x16,x14,x12 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002378: 000aa203 lw x4,0(x21) +8000237c: 01020863 beq x4,x16,8000238c +80002380: 1c0032ef jal x5,80005540 +80002384: 80002374 .word 0x80002374 +80002388: 8000cb19 .word 0x8000cb19 +8000238c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x7ffffffe +80002390: 00012503 lw x10,0(x2) +80002394: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x55555555 +80002398: 00012783 lw x15,0(x2) +8000239c: 00410113 addi x2,x2,4 + +800023a0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sig0h x1, x10, x15 # perform operation +800023a0: 5cf500b3 sha512sig0h x1,x10,x15 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a4: 000aa203 lw x4,0(x21) +800023a8: 00120863 beq x4,x1,800023b8 +800023ac: 194032ef jal x5,80005540 +800023b0: 800023a0 .word 0x800023a0 +800023b4: 8000cb7f .word 0x8000cb7f +800023b8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xffffffff +800023bc: 00012083 lw x1,0(x2) +800023c0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000000 +800023c4: 00012903 lw x18,0(x2) +800023c8: 00410113 addi x2,x2,4 + +800023cc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sig0h x20, x1, x18 # perform operation +800023cc: 5d208a33 sha512sig0h x20,x1,x18 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d0: 000aa203 lw x4,0(x21) +800023d4: 01420863 beq x4,x20,800023e4 +800023d8: 168032ef jal x5,80005540 +800023dc: 800023cc .word 0x800023cc +800023e0: 8000cbe5 .word 0x8000cbe5 +800023e4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xffffffff +800023e8: 00012583 lw x11,0(x2) +800023ec: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x00000001 +800023f0: 00012383 lw x7,0(x2) +800023f4: 00410113 addi x2,x2,4 + +800023f8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sig0h x13, x11, x7 # perform operation +800023f8: 5c7586b3 sha512sig0h x13,x11,x7 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023fc: 000aa203 lw x4,0(x21) +80002400: 00d20863 beq x4,x13,80002410 +80002404: 13c032ef jal x5,80005540 +80002408: 800023f8 .word 0x800023f8 +8000240c: 8000cc44 .word 0x8000cc44 +80002410: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xffffffff +80002414: 00012e83 lw x29,0(x2) +80002418: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000002 +8000241c: 00012903 lw x18,0(x2) +80002420: 00410113 addi x2,x2,4 + +80002424 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sig0h x7, x29, x18 # perform operation +80002424: 5d2e83b3 sha512sig0h x7,x29,x18 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002428: 000aa203 lw x4,0(x21) +8000242c: 00720863 beq x4,x7,8000243c +80002430: 110032ef jal x5,80005540 +80002434: 80002424 .word 0x80002424 +80002438: 8000cca3 .word 0x8000cca3 +8000243c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xffffffff +80002440: 00012c03 lw x24,0(x2) +80002444: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x80000000 +80002448: 00012483 lw x9,0(x2) +8000244c: 00410113 addi x2,x2,4 + +80002450 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sig0h x6, x24, x9 # perform operation +80002450: 5c9c0333 sha512sig0h x6,x24,x9 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002454: 000aa203 lw x4,0(x21) +80002458: 00620863 beq x4,x6,80002468 +8000245c: 0e4032ef jal x5,80005540 +80002460: 80002450 .word 0x80002450 +80002464: 8000cd02 .word 0x8000cd02 +80002468: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xffffffff +8000246c: 00012403 lw x8,0(x2) +80002470: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x80000001 +80002474: 00012803 lw x16,0(x2) +80002478: 00410113 addi x2,x2,4 + +8000247c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sig0h x31, x8, x16 # perform operation +8000247c: 5d040fb3 sha512sig0h x31,x8,x16 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002480: 000aa203 lw x4,0(x21) +80002484: 01f20863 beq x4,x31,80002494 +80002488: 0b8032ef jal x5,80005540 +8000248c: 8000247c .word 0x8000247c +80002490: 8000cd68 .word 0x8000cd68 +80002494: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xffffffff +80002498: 00012383 lw x7,0(x2) +8000249c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x7fffffff +800024a0: 00012a03 lw x20,0(x2) +800024a4: 00410113 addi x2,x2,4 + +800024a8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sig0h x29, x7, x20 # perform operation +800024a8: 5d438eb3 sha512sig0h x29,x7,x20 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024ac: 000aa203 lw x4,0(x21) +800024b0: 01d20863 beq x4,x29,800024c0 +800024b4: 08c032ef jal x5,80005540 +800024b8: 800024a8 .word 0x800024a8 +800024bc: 8000cdce .word 0x8000cdce +800024c0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xffffffff +800024c4: 00012803 lw x16,0(x2) +800024c8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x7ffffffe +800024cc: 00012d83 lw x27,0(x2) +800024d0: 00410113 addi x2,x2,4 + +800024d4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sig0h x9, x16, x27 # perform operation +800024d4: 5db804b3 sha512sig0h x9,x16,x27 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d8: 000aa203 lw x4,0(x21) +800024dc: 00920863 beq x4,x9,800024ec +800024e0: 060032ef jal x5,80005540 +800024e4: 800024d4 .word 0x800024d4 +800024e8: 8000ce34 .word 0x8000ce34 +800024ec: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xffffffff +800024f0: 00012803 lw x16,0(x2) +800024f4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xffffffff +800024f8: 00012f83 lw x31,0(x2) +800024fc: 00410113 addi x2,x2,4 + +80002500 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sig0h x26, x16, x31 # perform operation +80002500: 5df80d33 sha512sig0h x26,x16,x31 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002504: 000aa203 lw x4,0(x21) +80002508: 01a20863 beq x4,x26,80002518 +8000250c: 034032ef jal x5,80005540 +80002510: 80002500 .word 0x80002500 +80002514: 8000ce9a .word 0x8000ce9a +80002518: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xffffffff +8000251c: 00012883 lw x17,0(x2) +80002520: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xfffffffe +80002524: 00012503 lw x10,0(x2) +80002528: 00410113 addi x2,x2,4 + +8000252c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sig0h x15, x17, x10 # perform operation +8000252c: 5ca887b3 sha512sig0h x15,x17,x10 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002530: 000aa203 lw x4,0(x21) +80002534: 00f20863 beq x4,x15,80002544 +80002538: 008032ef jal x5,80005540 +8000253c: 8000252c .word 0x8000252c +80002540: 8000cf00 .word 0x8000cf00 +80002544: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xffffffff +80002548: 00012303 lw x6,0(x2) +8000254c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x5bbc8872 +80002550: 00012e83 lw x29,0(x2) +80002554: 00410113 addi x2,x2,4 + +80002558 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sig0h x8, x6, x29 # perform operation +80002558: 5dd30433 sha512sig0h x8,x6,x29 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000255c: 000aa203 lw x4,0(x21) +80002560: 00820863 beq x4,x8,80002570 +80002564: 7dd022ef jal x5,80005540 +80002568: 80002558 .word 0x80002558 +8000256c: 8000cf66 .word 0x8000cf66 +80002570: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xffffffff +80002574: 00012b03 lw x22,0(x2) +80002578: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xaaaaaaaa +8000257c: 00012803 lw x16,0(x2) +80002580: 00410113 addi x2,x2,4 + +80002584 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sig0h x31, x22, x16 # perform operation +80002584: 5d0b0fb3 sha512sig0h x31,x22,x16 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002588: 000aa203 lw x4,0(x21) +8000258c: 01f20863 beq x4,x31,8000259c +80002590: 7b1022ef jal x5,80005540 +80002594: 80002584 .word 0x80002584 +80002598: 8000cfcc .word 0x8000cfcc +8000259c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xffffffff +800025a0: 00012383 lw x7,0(x2) +800025a4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x55555555 +800025a8: 00012b03 lw x22,0(x2) +800025ac: 00410113 addi x2,x2,4 + +800025b0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sig0h x30, x7, x22 # perform operation +800025b0: 5d638f33 sha512sig0h x30,x7,x22 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b4: 000aa203 lw x4,0(x21) +800025b8: 01e20863 beq x4,x30,800025c8 +800025bc: 785022ef jal x5,80005540 +800025c0: 800025b0 .word 0x800025b0 +800025c4: 8000d032 .word 0x8000d032 +800025c8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xfffffffe +800025cc: 00012d03 lw x26,0(x2) +800025d0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x00000000 +800025d4: 00012f03 lw x30,0(x2) +800025d8: 00410113 addi x2,x2,4 + +800025dc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sig0h x9, x26, x30 # perform operation +800025dc: 5ded04b3 sha512sig0h x9,x26,x30 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e0: 000aa203 lw x4,0(x21) +800025e4: 00920863 beq x4,x9,800025f4 +800025e8: 759022ef jal x5,80005540 +800025ec: 800025dc .word 0x800025dc +800025f0: 8000d098 .word 0x8000d098 +800025f4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xfffffffe +800025f8: 00012b03 lw x22,0(x2) +800025fc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x00000001 +80002600: 00012f03 lw x30,0(x2) +80002604: 00410113 addi x2,x2,4 + +80002608 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sig0h x8, x22, x30 # perform operation +80002608: 5deb0433 sha512sig0h x8,x22,x30 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +8000260c: 000aa203 lw x4,0(x21) +80002610: 00820863 beq x4,x8,80002620 +80002614: 72d022ef jal x5,80005540 +80002618: 80002608 .word 0x80002608 +8000261c: 8000d0f7 .word 0x8000d0f7 +80002620: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xfffffffe +80002624: 00012f03 lw x30,0(x2) +80002628: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x00000002 +8000262c: 00012303 lw x6,0(x2) +80002630: 00410113 addi x2,x2,4 + +80002634 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sig0h x8, x30, x6 # perform operation +80002634: 5c6f0433 sha512sig0h x8,x30,x6 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002638: 000aa203 lw x4,0(x21) +8000263c: 00820863 beq x4,x8,8000264c +80002640: 701022ef jal x5,80005540 +80002644: 80002634 .word 0x80002634 +80002648: 8000d156 .word 0x8000d156 +8000264c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xfffffffe +80002650: 00012403 lw x8,0(x2) +80002654: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x80000000 +80002658: 00012983 lw x19,0(x2) +8000265c: 00410113 addi x2,x2,4 + +80002660 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sig0h x10, x8, x19 # perform operation +80002660: 5d340533 sha512sig0h x10,x8,x19 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002664: 000aa203 lw x4,0(x21) +80002668: 00a20863 beq x4,x10,80002678 +8000266c: 6d5022ef jal x5,80005540 +80002670: 80002660 .word 0x80002660 +80002674: 8000d1b5 .word 0x8000d1b5 +80002678: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xfffffffe +8000267c: 00012183 lw x3,0(x2) +80002680: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x80000001 +80002684: 00012083 lw x1,0(x2) +80002688: 00410113 addi x2,x2,4 + +8000268c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sig0h x11, x3, x1 # perform operation +8000268c: 5c1185b3 sha512sig0h x11,x3,x1 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002690: 000aa203 lw x4,0(x21) +80002694: 00b20863 beq x4,x11,800026a4 +80002698: 6a9022ef jal x5,80005540 +8000269c: 8000268c .word 0x8000268c +800026a0: 8000d21b .word 0x8000d21b +800026a4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xfffffffe +800026a8: 00012d03 lw x26,0(x2) +800026ac: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x7fffffff +800026b0: 00012403 lw x8,0(x2) +800026b4: 00410113 addi x2,x2,4 + +800026b8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sig0h x23, x26, x8 # perform operation +800026b8: 5c8d0bb3 sha512sig0h x23,x26,x8 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026bc: 000aa203 lw x4,0(x21) +800026c0: 01720863 beq x4,x23,800026d0 +800026c4: 67d022ef jal x5,80005540 +800026c8: 800026b8 .word 0x800026b8 +800026cc: 8000d281 .word 0x8000d281 +800026d0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xfffffffe +800026d4: 00012d03 lw x26,0(x2) +800026d8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x7ffffffe +800026dc: 00012983 lw x19,0(x2) +800026e0: 00410113 addi x2,x2,4 + +800026e4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sig0h x31, x26, x19 # perform operation +800026e4: 5d3d0fb3 sha512sig0h x31,x26,x19 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e8: 000aa203 lw x4,0(x21) +800026ec: 01f20863 beq x4,x31,800026fc +800026f0: 651022ef jal x5,80005540 +800026f4: 800026e4 .word 0x800026e4 +800026f8: 8000d2e7 .word 0x8000d2e7 +800026fc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xfffffffe +80002700: 00012783 lw x15,0(x2) +80002704: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xffffffff +80002708: 00012e03 lw x28,0(x2) +8000270c: 00410113 addi x2,x2,4 + +80002710 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sig0h x10, x15, x28 # perform operation +80002710: 5dc78533 sha512sig0h x10,x15,x28 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002714: 000aa203 lw x4,0(x21) +80002718: 00a20863 beq x4,x10,80002728 +8000271c: 625022ef jal x5,80005540 +80002720: 80002710 .word 0x80002710 +80002724: 8000d34d .word 0x8000d34d +80002728: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xfffffffe +8000272c: 00012a03 lw x20,0(x2) +80002730: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xfffffffe +80002734: 00012e83 lw x29,0(x2) +80002738: 00410113 addi x2,x2,4 + +8000273c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sig0h x27, x20, x29 # perform operation +8000273c: 5dda0db3 sha512sig0h x27,x20,x29 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002740: 000aa203 lw x4,0(x21) +80002744: 01b20863 beq x4,x27,80002754 +80002748: 5f9022ef jal x5,80005540 +8000274c: 8000273c .word 0x8000273c +80002750: 8000d3b3 .word 0x8000d3b3 +80002754: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xfffffffe +80002758: 00012a03 lw x20,0(x2) +8000275c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x5bbc8872 +80002760: 00012803 lw x16,0(x2) +80002764: 00410113 addi x2,x2,4 + +80002768 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sig0h x17, x20, x16 # perform operation +80002768: 5d0a08b3 sha512sig0h x17,x20,x16 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000276c: 000aa203 lw x4,0(x21) +80002770: 01120863 beq x4,x17,80002780 +80002774: 5cd022ef jal x5,80005540 +80002778: 80002768 .word 0x80002768 +8000277c: 8000d419 .word 0x8000d419 +80002780: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xfffffffe +80002784: 00012f03 lw x30,0(x2) +80002788: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xaaaaaaaa +8000278c: 00012c83 lw x25,0(x2) +80002790: 00410113 addi x2,x2,4 + +80002794 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sig0h x22, x30, x25 # perform operation +80002794: 5d9f0b33 sha512sig0h x22,x30,x25 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002798: 000aa203 lw x4,0(x21) +8000279c: 01620863 beq x4,x22,800027ac +800027a0: 5a1022ef jal x5,80005540 +800027a4: 80002794 .word 0x80002794 +800027a8: 8000d47f .word 0x8000d47f +800027ac: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xfffffffe +800027b0: 00012e83 lw x29,0(x2) +800027b4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x55555555 +800027b8: 00012403 lw x8,0(x2) +800027bc: 00410113 addi x2,x2,4 + +800027c0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sig0h x15, x29, x8 # perform operation +800027c0: 5c8e87b3 sha512sig0h x15,x29,x8 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c4: 000aa203 lw x4,0(x21) +800027c8: 00f20863 beq x4,x15,800027d8 +800027cc: 575022ef jal x5,80005540 +800027d0: 800027c0 .word 0x800027c0 +800027d4: 8000d4e5 .word 0x8000d4e5 +800027d8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x5bbc8872 +800027dc: 00012e83 lw x29,0(x2) +800027e0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x00000000 +800027e4: 00012983 lw x19,0(x2) +800027e8: 00410113 addi x2,x2,4 + +800027ec : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sig0h x7, x29, x19 # perform operation +800027ec: 5d3e83b3 sha512sig0h x7,x29,x19 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f0: 000aa203 lw x4,0(x21) +800027f4: 00720863 beq x4,x7,80002804 +800027f8: 549022ef jal x5,80005540 +800027fc: 800027ec .word 0x800027ec +80002800: 8000d54b .word 0x8000d54b +80002804: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x5bbc8872 +80002808: 00012583 lw x11,0(x2) +8000280c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x00000001 +80002810: 00012183 lw x3,0(x2) +80002814: 00410113 addi x2,x2,4 + +80002818 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sig0h x28, x11, x3 # perform operation +80002818: 5c358e33 sha512sig0h x28,x11,x3 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000281c: 000aa203 lw x4,0(x21) +80002820: 01c20863 beq x4,x28,80002830 +80002824: 51d022ef jal x5,80005540 +80002828: 80002818 .word 0x80002818 +8000282c: 8000d5aa .word 0x8000d5aa +80002830: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5bbc8872 +80002834: 00012403 lw x8,0(x2) +80002838: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x00000002 +8000283c: 00012f83 lw x31,0(x2) +80002840: 00410113 addi x2,x2,4 + +80002844 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sig0h x27, x8, x31 # perform operation +80002844: 5df40db3 sha512sig0h x27,x8,x31 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002848: 000aa203 lw x4,0(x21) +8000284c: 01b20863 beq x4,x27,8000285c +80002850: 4f1022ef jal x5,80005540 +80002854: 80002844 .word 0x80002844 +80002858: 8000d609 .word 0x8000d609 +8000285c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5bbc8872 +80002860: 00012503 lw x10,0(x2) +80002864: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x80000000 +80002868: 00012583 lw x11,0(x2) +8000286c: 00410113 addi x2,x2,4 + +80002870 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sig0h x17, x10, x11 # perform operation +80002870: 5cb508b3 sha512sig0h x17,x10,x11 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002874: 000aa203 lw x4,0(x21) +80002878: 01120863 beq x4,x17,80002888 +8000287c: 4c5022ef jal x5,80005540 +80002880: 80002870 .word 0x80002870 +80002884: 8000d668 .word 0x8000d668 +80002888: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x5bbc8872 +8000288c: 00012603 lw x12,0(x2) +80002890: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x80000001 +80002894: 00012f03 lw x30,0(x2) +80002898: 00410113 addi x2,x2,4 + +8000289c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sig0h x8, x12, x30 # perform operation +8000289c: 5de60433 sha512sig0h x8,x12,x30 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a0: 000aa203 lw x4,0(x21) +800028a4: 00820863 beq x4,x8,800028b4 +800028a8: 499022ef jal x5,80005540 +800028ac: 8000289c .word 0x8000289c +800028b0: 8000d6ce .word 0x8000d6ce +800028b4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x5bbc8872 +800028b8: 00012a03 lw x20,0(x2) +800028bc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x7fffffff +800028c0: 00012b03 lw x22,0(x2) +800028c4: 00410113 addi x2,x2,4 + +800028c8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sig0h x27, x20, x22 # perform operation +800028c8: 5d6a0db3 sha512sig0h x27,x20,x22 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028cc: 000aa203 lw x4,0(x21) +800028d0: 01b20863 beq x4,x27,800028e0 +800028d4: 46d022ef jal x5,80005540 +800028d8: 800028c8 .word 0x800028c8 +800028dc: 8000d734 .word 0x8000d734 +800028e0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x5bbc8872 +800028e4: 00012e83 lw x29,0(x2) +800028e8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x7ffffffe +800028ec: 00012083 lw x1,0(x2) +800028f0: 00410113 addi x2,x2,4 + +800028f4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sig0h x31, x29, x1 # perform operation +800028f4: 5c1e8fb3 sha512sig0h x31,x29,x1 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f8: 000aa203 lw x4,0(x21) +800028fc: 01f20863 beq x4,x31,8000290c +80002900: 441022ef jal x5,80005540 +80002904: 800028f4 .word 0x800028f4 +80002908: 8000d79a .word 0x8000d79a +8000290c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5bbc8872 +80002910: 00012f03 lw x30,0(x2) +80002914: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xffffffff +80002918: 00012403 lw x8,0(x2) +8000291c: 00410113 addi x2,x2,4 + +80002920 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sig0h x7, x30, x8 # perform operation +80002920: 5c8f03b3 sha512sig0h x7,x30,x8 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002924: 000aa203 lw x4,0(x21) +80002928: 00720863 beq x4,x7,80002938 +8000292c: 415022ef jal x5,80005540 +80002930: 80002920 .word 0x80002920 +80002934: 8000d800 .word 0x8000d800 +80002938: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x5bbc8872 +8000293c: 00012683 lw x13,0(x2) +80002940: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xfffffffe +80002944: 00012e03 lw x28,0(x2) +80002948: 00410113 addi x2,x2,4 + +8000294c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sig0h x3, x13, x28 # perform operation +8000294c: 5dc681b3 sha512sig0h x3,x13,x28 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002950: 000aa203 lw x4,0(x21) +80002954: 00320863 beq x4,x3,80002964 +80002958: 3e9022ef jal x5,80005540 +8000295c: 8000294c .word 0x8000294c +80002960: 8000d866 .word 0x8000d866 +80002964: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x5bbc8872 +80002968: 00012383 lw x7,0(x2) +8000296c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x5bbc8872 +80002970: 00012b83 lw x23,0(x2) +80002974: 00410113 addi x2,x2,4 + +80002978 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sig0h x14, x7, x23 # perform operation +80002978: 5d738733 sha512sig0h x14,x7,x23 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000297c: 000aa203 lw x4,0(x21) +80002980: 00e20863 beq x4,x14,80002990 +80002984: 3bd022ef jal x5,80005540 +80002988: 80002978 .word 0x80002978 +8000298c: 8000d8cc .word 0x8000d8cc +80002990: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x5bbc8872 +80002994: 00012d03 lw x26,0(x2) +80002998: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xaaaaaaaa +8000299c: 00012183 lw x3,0(x2) +800029a0: 00410113 addi x2,x2,4 + +800029a4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sig0h x23, x26, x3 # perform operation +800029a4: 5c3d0bb3 sha512sig0h x23,x26,x3 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a8: 000aa203 lw x4,0(x21) +800029ac: 01720863 beq x4,x23,800029bc +800029b0: 391022ef jal x5,80005540 +800029b4: 800029a4 .word 0x800029a4 +800029b8: 8000d932 .word 0x8000d932 +800029bc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x5bbc8872 +800029c0: 00012703 lw x14,0(x2) +800029c4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x55555555 +800029c8: 00012083 lw x1,0(x2) +800029cc: 00410113 addi x2,x2,4 + +800029d0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sig0h x8, x14, x1 # perform operation +800029d0: 5c170433 sha512sig0h x8,x14,x1 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d4: 000aa203 lw x4,0(x21) +800029d8: 00820863 beq x4,x8,800029e8 +800029dc: 365022ef jal x5,80005540 +800029e0: 800029d0 .word 0x800029d0 +800029e4: 8000d998 .word 0x8000d998 +800029e8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xaaaaaaaa +800029ec: 00012d83 lw x27,0(x2) +800029f0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x00000000 +800029f4: 00012403 lw x8,0(x2) +800029f8: 00410113 addi x2,x2,4 + +800029fc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sig0h x3, x27, x8 # perform operation +800029fc: 5c8d81b3 sha512sig0h x3,x27,x8 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a00: 000aa203 lw x4,0(x21) +80002a04: 00320863 beq x4,x3,80002a14 +80002a08: 339022ef jal x5,80005540 +80002a0c: 800029fc .word 0x800029fc +80002a10: 8000d9fe .word 0x8000d9fe +80002a14: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xaaaaaaaa +80002a18: 00012483 lw x9,0(x2) +80002a1c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000001 +80002a20: 00012903 lw x18,0(x2) +80002a24: 00410113 addi x2,x2,4 + +80002a28 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sig0h x20, x9, x18 # perform operation +80002a28: 5d248a33 sha512sig0h x20,x9,x18 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a2c: 000aa203 lw x4,0(x21) +80002a30: 01420863 beq x4,x20,80002a40 +80002a34: 30d022ef jal x5,80005540 +80002a38: 80002a28 .word 0x80002a28 +80002a3c: 8000da5d .word 0x8000da5d +80002a40: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xaaaaaaaa +80002a44: 00012783 lw x15,0(x2) +80002a48: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x00000002 +80002a4c: 00012983 lw x19,0(x2) +80002a50: 00410113 addi x2,x2,4 + +80002a54 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sig0h x20, x15, x19 # perform operation +80002a54: 5d378a33 sha512sig0h x20,x15,x19 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a58: 000aa203 lw x4,0(x21) +80002a5c: 01420863 beq x4,x20,80002a6c +80002a60: 2e1022ef jal x5,80005540 +80002a64: 80002a54 .word 0x80002a54 +80002a68: 8000dabc .word 0x8000dabc +80002a6c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xaaaaaaaa +80002a70: 00012983 lw x19,0(x2) +80002a74: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x80000000 +80002a78: 00012b83 lw x23,0(x2) +80002a7c: 00410113 addi x2,x2,4 + +80002a80 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sig0h x29, x19, x23 # perform operation +80002a80: 5d798eb3 sha512sig0h x29,x19,x23 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a84: 000aa203 lw x4,0(x21) +80002a88: 01d20863 beq x4,x29,80002a98 +80002a8c: 2b5022ef jal x5,80005540 +80002a90: 80002a80 .word 0x80002a80 +80002a94: 8000db1b .word 0x8000db1b +80002a98: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xaaaaaaaa +80002a9c: 00012f03 lw x30,0(x2) +80002aa0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x80000001 +80002aa4: 00012f83 lw x31,0(x2) +80002aa8: 00410113 addi x2,x2,4 + +80002aac : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sig0h x3, x30, x31 # perform operation +80002aac: 5dff01b3 sha512sig0h x3,x30,x31 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab0: 000aa203 lw x4,0(x21) +80002ab4: 00320863 beq x4,x3,80002ac4 +80002ab8: 289022ef jal x5,80005540 +80002abc: 80002aac .word 0x80002aac +80002ac0: 8000db81 .word 0x8000db81 +80002ac4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xaaaaaaaa +80002ac8: 00012c03 lw x24,0(x2) +80002acc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x7fffffff +80002ad0: 00012703 lw x14,0(x2) +80002ad4: 00410113 addi x2,x2,4 + +80002ad8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sig0h x9, x24, x14 # perform operation +80002ad8: 5cec04b3 sha512sig0h x9,x24,x14 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002adc: 000aa203 lw x4,0(x21) +80002ae0: 00920863 beq x4,x9,80002af0 +80002ae4: 25d022ef jal x5,80005540 +80002ae8: 80002ad8 .word 0x80002ad8 +80002aec: 8000dbe7 .word 0x8000dbe7 +80002af0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xaaaaaaaa +80002af4: 00012f03 lw x30,0(x2) +80002af8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x7ffffffe +80002afc: 00012f83 lw x31,0(x2) +80002b00: 00410113 addi x2,x2,4 + +80002b04 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sig0h x12, x30, x31 # perform operation +80002b04: 5dff0633 sha512sig0h x12,x30,x31 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b08: 000aa203 lw x4,0(x21) +80002b0c: 00c20863 beq x4,x12,80002b1c +80002b10: 231022ef jal x5,80005540 +80002b14: 80002b04 .word 0x80002b04 +80002b18: 8000dc4d .word 0x8000dc4d +80002b1c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xaaaaaaaa +80002b20: 00012d03 lw x26,0(x2) +80002b24: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xffffffff +80002b28: 00012503 lw x10,0(x2) +80002b2c: 00410113 addi x2,x2,4 + +80002b30 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sig0h x30, x26, x10 # perform operation +80002b30: 5cad0f33 sha512sig0h x30,x26,x10 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b34: 000aa203 lw x4,0(x21) +80002b38: 01e20863 beq x4,x30,80002b48 +80002b3c: 205022ef jal x5,80005540 +80002b40: 80002b30 .word 0x80002b30 +80002b44: 8000dcb3 .word 0x8000dcb3 +80002b48: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xaaaaaaaa +80002b4c: 00012883 lw x17,0(x2) +80002b50: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xfffffffe +80002b54: 00012c03 lw x24,0(x2) +80002b58: 00410113 addi x2,x2,4 + +80002b5c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sig0h x25, x17, x24 # perform operation +80002b5c: 5d888cb3 sha512sig0h x25,x17,x24 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b60: 000aa203 lw x4,0(x21) +80002b64: 01920863 beq x4,x25,80002b74 +80002b68: 1d9022ef jal x5,80005540 +80002b6c: 80002b5c .word 0x80002b5c +80002b70: 8000dd19 .word 0x8000dd19 +80002b74: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xaaaaaaaa +80002b78: 00012c03 lw x24,0(x2) +80002b7c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x5bbc8872 +80002b80: 00012483 lw x9,0(x2) +80002b84: 00410113 addi x2,x2,4 + +80002b88 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sig0h x20, x24, x9 # perform operation +80002b88: 5c9c0a33 sha512sig0h x20,x24,x9 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b8c: 000aa203 lw x4,0(x21) +80002b90: 01420863 beq x4,x20,80002ba0 +80002b94: 1ad022ef jal x5,80005540 +80002b98: 80002b88 .word 0x80002b88 +80002b9c: 8000dd7f .word 0x8000dd7f +80002ba0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xaaaaaaaa +80002ba4: 00012983 lw x19,0(x2) +80002ba8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xaaaaaaaa +80002bac: 00012383 lw x7,0(x2) +80002bb0: 00410113 addi x2,x2,4 + +80002bb4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sig0h x6, x19, x7 # perform operation +80002bb4: 5c798333 sha512sig0h x6,x19,x7 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb8: 000aa203 lw x4,0(x21) +80002bbc: 00620863 beq x4,x6,80002bcc +80002bc0: 181022ef jal x5,80005540 +80002bc4: 80002bb4 .word 0x80002bb4 +80002bc8: 8000dde5 .word 0x8000dde5 +80002bcc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xaaaaaaaa +80002bd0: 00012e03 lw x28,0(x2) +80002bd4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x55555555 +80002bd8: 00012a03 lw x20,0(x2) +80002bdc: 00410113 addi x2,x2,4 + +80002be0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sig0h x24, x28, x20 # perform operation +80002be0: 5d4e0c33 sha512sig0h x24,x28,x20 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be4: 000aa203 lw x4,0(x21) +80002be8: 01820863 beq x4,x24,80002bf8 +80002bec: 155022ef jal x5,80005540 +80002bf0: 80002be0 .word 0x80002be0 +80002bf4: 8000de4b .word 0x8000de4b +80002bf8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x55555555 +80002bfc: 00012e83 lw x29,0(x2) +80002c00: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x00000000 +80002c04: 00012603 lw x12,0(x2) +80002c08: 00410113 addi x2,x2,4 + +80002c0c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sig0h x28, x29, x12 # perform operation +80002c0c: 5cce8e33 sha512sig0h x28,x29,x12 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c10: 000aa203 lw x4,0(x21) +80002c14: 01c20863 beq x4,x28,80002c24 +80002c18: 129022ef jal x5,80005540 +80002c1c: 80002c0c .word 0x80002c0c +80002c20: 8000deb1 .word 0x8000deb1 +80002c24: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x55555555 +80002c28: 00012d83 lw x27,0(x2) +80002c2c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x00000001 +80002c30: 00012603 lw x12,0(x2) +80002c34: 00410113 addi x2,x2,4 + +80002c38 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sig0h x14, x27, x12 # perform operation +80002c38: 5ccd8733 sha512sig0h x14,x27,x12 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c3c: 000aa203 lw x4,0(x21) +80002c40: 00e20863 beq x4,x14,80002c50 +80002c44: 0fd022ef jal x5,80005540 +80002c48: 80002c38 .word 0x80002c38 +80002c4c: 8000df10 .word 0x8000df10 +80002c50: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x55555555 +80002c54: 00012883 lw x17,0(x2) +80002c58: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x00000002 +80002c5c: 00012f03 lw x30,0(x2) +80002c60: 00410113 addi x2,x2,4 + +80002c64 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sig0h x19, x17, x30 # perform operation +80002c64: 5de889b3 sha512sig0h x19,x17,x30 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c68: 000aa203 lw x4,0(x21) +80002c6c: 01320863 beq x4,x19,80002c7c +80002c70: 0d1022ef jal x5,80005540 +80002c74: 80002c64 .word 0x80002c64 +80002c78: 8000df6f .word 0x8000df6f +80002c7c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x55555555 +80002c80: 00012c83 lw x25,0(x2) +80002c84: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x80000000 +80002c88: 00012603 lw x12,0(x2) +80002c8c: 00410113 addi x2,x2,4 + +80002c90 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sig0h x22, x25, x12 # perform operation +80002c90: 5ccc8b33 sha512sig0h x22,x25,x12 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c94: 000aa203 lw x4,0(x21) +80002c98: 01620863 beq x4,x22,80002ca8 +80002c9c: 0a5022ef jal x5,80005540 +80002ca0: 80002c90 .word 0x80002c90 +80002ca4: 8000dfce .word 0x8000dfce +80002ca8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x55555555 +80002cac: 00012483 lw x9,0(x2) +80002cb0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x80000001 +80002cb4: 00012703 lw x14,0(x2) +80002cb8: 00410113 addi x2,x2,4 + +80002cbc : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sig0h x18, x9, x14 # perform operation +80002cbc: 5ce48933 sha512sig0h x18,x9,x14 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc0: 000aa203 lw x4,0(x21) +80002cc4: 01220863 beq x4,x18,80002cd4 +80002cc8: 079022ef jal x5,80005540 +80002ccc: 80002cbc .word 0x80002cbc +80002cd0: 8000e034 .word 0x8000e034 +80002cd4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x55555555 +80002cd8: 00012303 lw x6,0(x2) +80002cdc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x7fffffff +80002ce0: 00012683 lw x13,0(x2) +80002ce4: 00410113 addi x2,x2,4 + +80002ce8 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sig0h x26, x6, x13 # perform operation +80002ce8: 5cd30d33 sha512sig0h x26,x6,x13 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cec: 000aa203 lw x4,0(x21) +80002cf0: 01a20863 beq x4,x26,80002d00 +80002cf4: 04d022ef jal x5,80005540 +80002cf8: 80002ce8 .word 0x80002ce8 +80002cfc: 8000e09a .word 0x8000e09a +80002d00: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x55555555 +80002d04: 00012403 lw x8,0(x2) +80002d08: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x7ffffffe +80002d0c: 00012703 lw x14,0(x2) +80002d10: 00410113 addi x2,x2,4 + +80002d14 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sig0h x24, x8, x14 # perform operation +80002d14: 5ce40c33 sha512sig0h x24,x8,x14 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d18: 000aa203 lw x4,0(x21) +80002d1c: 01820863 beq x4,x24,80002d2c +80002d20: 021022ef jal x5,80005540 +80002d24: 80002d14 .word 0x80002d14 +80002d28: 8000e100 .word 0x8000e100 +80002d2c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x55555555 +80002d30: 00012783 lw x15,0(x2) +80002d34: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xffffffff +80002d38: 00012f83 lw x31,0(x2) +80002d3c: 00410113 addi x2,x2,4 + +80002d40 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sig0h x22, x15, x31 # perform operation +80002d40: 5df78b33 sha512sig0h x22,x15,x31 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d44: 000aa203 lw x4,0(x21) +80002d48: 01620863 beq x4,x22,80002d58 +80002d4c: 7f4022ef jal x5,80005540 +80002d50: 80002d40 .word 0x80002d40 +80002d54: 8000e166 .word 0x8000e166 +80002d58: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x55555555 +80002d5c: 00012403 lw x8,0(x2) +80002d60: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0xfffffffe +80002d64: 00012883 lw x17,0(x2) +80002d68: 00410113 addi x2,x2,4 + +80002d6c : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sig0h x7, x8, x17 # perform operation +80002d6c: 5d1403b3 sha512sig0h x7,x8,x17 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d70: 000aa203 lw x4,0(x21) +80002d74: 00720863 beq x4,x7,80002d84 +80002d78: 7c8022ef jal x5,80005540 +80002d7c: 80002d6c .word 0x80002d6c +80002d80: 8000e1cc .word 0x8000e1cc +80002d84: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x55555555 +80002d88: 00012c03 lw x24,0(x2) +80002d8c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x5bbc8872 +80002d90: 00012d83 lw x27,0(x2) +80002d94: 00410113 addi x2,x2,4 + +80002d98 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sig0h x30, x24, x27 # perform operation +80002d98: 5dbc0f33 sha512sig0h x30,x24,x27 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d9c: 000aa203 lw x4,0(x21) +80002da0: 01e20863 beq x4,x30,80002db0 +80002da4: 79c022ef jal x5,80005540 +80002da8: 80002d98 .word 0x80002d98 +80002dac: 8000e232 .word 0x8000e232 +80002db0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x55555555 +80002db4: 00012303 lw x6,0(x2) +80002db8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xaaaaaaaa +80002dbc: 00012a03 lw x20,0(x2) +80002dc0: 00410113 addi x2,x2,4 + +80002dc4 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sig0h x16, x6, x20 # perform operation +80002dc4: 5d430833 sha512sig0h x16,x6,x20 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc8: 000aa203 lw x4,0(x21) +80002dcc: 01020863 beq x4,x16,80002ddc +80002dd0: 770022ef jal x5,80005540 +80002dd4: 80002dc4 .word 0x80002dc4 +80002dd8: 8000e298 .word 0x8000e298 +80002ddc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x55555555 +80002de0: 00012f03 lw x30,0(x2) +80002de4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x55555555 +80002de8: 00012703 lw x14,0(x2) +80002dec: 00410113 addi x2,x2,4 + +80002df0 : +Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sig0h x16, x30, x14 # perform operation +80002df0: 5cef0833 sha512sig0h x16,x30,x14 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sig0h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df4: 000aa203 lw x4,0(x21) +80002df8: 01020863 beq x4,x16,80002e08 +80002dfc: 744022ef jal x5,80005540 +80002e00: 80002df0 .word 0x80002df0 +80002e04: 8000e2fe .word 0x8000e2fe +80002e08: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x89d456f2 +80002e0c: 00012003 lw x0,0(x2) +80002e10: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xa8f03b55 +80002e14: 00012003 lw x0,0(x2) +80002e18: 00410113 addi x2,x2,4 + +80002e1c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b0: + sha512sig0h x23, x0, x0 # perform operation +80002e1c: 5c000bb3 sha512sig0h x23,x0,x0 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b0, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b0_str) +80002e20: 000aa203 lw x4,0(x21) +80002e24: 01720863 beq x4,x23,80002e34 +80002e28: 718022ef jal x5,80005540 +80002e2c: 80002e1c .word 0x80002e1c +80002e30: 8000e364 .word 0x8000e364 +80002e34: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x8ab31bfe +80002e38: 00012083 lw x1,0(x2) +80002e3c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xf8d8ee01 +80002e40: 00012083 lw x1,0(x2) +80002e44: 00410113 addi x2,x2,4 + +80002e48 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b1: + sha512sig0h x28, x1, x1 # perform operation +80002e48: 5c108e33 sha512sig0h x28,x1,x1 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b1, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b1_str) +80002e4c: 000aa203 lw x4,0(x21) +80002e50: 01c20863 beq x4,x28,80002e60 +80002e54: 6ec022ef jal x5,80005540 +80002e58: 80002e48 .word 0x80002e48 +80002e5c: 8000e3a3 .word 0x8000e3a3 +80002e60: 004a8a93 addi x21,x21,4 + + mv x20, x2 # switch data pointer register to avoid conflict with test +80002e64: 00010a13 addi x20,x2,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xdfec166c +80002e68: 000a2103 lw x2,0(x20) +80002e6c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x92b6a3f6 +80002e70: 000a2103 lw x2,0(x20) +80002e74: 004a0a13 addi x20,x20,4 + +80002e78 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b2: + sha512sig0h x17, x2, x2 # perform operation +80002e78: 5c2108b3 sha512sig0h x17,x2,x2 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b2, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b2_str) +80002e7c: 000aa203 lw x4,0(x21) +80002e80: 01120863 beq x4,x17,80002e90 +80002e84: 6bc022ef jal x5,80005540 +80002e88: 80002e78 .word 0x80002e78 +80002e8c: 8000e3e2 .word 0x8000e3e2 +80002e90: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xc73aef12 +80002e94: 000a2183 lw x3,0(x20) +80002e98: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xa0ec3abb +80002e9c: 000a2183 lw x3,0(x20) +80002ea0: 004a0a13 addi x20,x20,4 + +80002ea4 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b3: + sha512sig0h x28, x3, x3 # perform operation +80002ea4: 5c318e33 sha512sig0h x28,x3,x3 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b3, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b3_str) +80002ea8: 000aa203 lw x4,0(x21) +80002eac: 01c20863 beq x4,x28,80002ebc +80002eb0: 690022ef jal x5,80005540 +80002eb4: 80002ea4 .word 0x80002ea4 +80002eb8: 8000e421 .word 0x8000e421 +80002ebc: 004a8a93 addi x21,x21,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002ec0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002ec4: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xdc564792 +80002ec8: 000a2203 lw x4,0(x20) +80002ecc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x29c518ab +80002ed0: 000a2203 lw x4,0(x20) +80002ed4: 004a0a13 addi x20,x20,4 + +80002ed8 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b4: + sha512sig0h x17, x4, x4 # perform operation +80002ed8: 5c4208b3 sha512sig0h x17,x4,x4 + # Check if x17 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x17, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b4, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b4_str) +80002edc: 000aa683 lw x13,0(x21) +80002ee0: 01168863 beq x13,x17,80002ef0 +80002ee4: 69c0276f jal x14,80005580 +80002ee8: 80002ed8 .word 0x80002ed8 +80002eec: 8000e460 .word 0x8000e460 +80002ef0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x1ec467ab +80002ef4: 000a2283 lw x5,0(x20) +80002ef8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x37c05f69 +80002efc: 000a2283 lw x5,0(x20) +80002f00: 004a0a13 addi x20,x20,4 + +80002f04 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b5: + sha512sig0h x12, x5, x5 # perform operation +80002f04: 5c528633 sha512sig0h x12,x5,x5 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b5, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b5_str) +80002f08: 000aa683 lw x13,0(x21) +80002f0c: 00c68863 beq x13,x12,80002f1c +80002f10: 6700276f jal x14,80005580 +80002f14: 80002f04 .word 0x80002f04 +80002f18: 8000e49f .word 0x8000e49f +80002f1c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xf6edb6ed +80002f20: 000a2303 lw x6,0(x20) +80002f24: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x01ac698a +80002f28: 000a2303 lw x6,0(x20) +80002f2c: 004a0a13 addi x20,x20,4 + +80002f30 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b6: + sha512sig0h x3, x6, x6 # perform operation +80002f30: 5c6301b3 sha512sig0h x3,x6,x6 + # Check if x3 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x3, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b6, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b6_str) +80002f34: 000aa683 lw x13,0(x21) +80002f38: 00368863 beq x13,x3,80002f48 +80002f3c: 6440276f jal x14,80005580 +80002f40: 80002f30 .word 0x80002f30 +80002f44: 8000e4de .word 0x8000e4de +80002f48: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x1467e226 +80002f4c: 000a2383 lw x7,0(x20) +80002f50: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xf94cb145 +80002f54: 000a2383 lw x7,0(x20) +80002f58: 004a0a13 addi x20,x20,4 + +80002f5c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b7: + sha512sig0h x17, x7, x7 # perform operation +80002f5c: 5c7388b3 sha512sig0h x17,x7,x7 + # Check if x17 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x17, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b7, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b7_str) +80002f60: 000aa683 lw x13,0(x21) +80002f64: 01168863 beq x13,x17,80002f74 +80002f68: 6180276f jal x14,80005580 +80002f6c: 80002f5c .word 0x80002f5c +80002f70: 8000e51d .word 0x8000e51d +80002f74: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x33098ab3 +80002f78: 000a2403 lw x8,0(x20) +80002f7c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x00284bce +80002f80: 000a2403 lw x8,0(x20) +80002f84: 004a0a13 addi x20,x20,4 + +80002f88 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b8: + sha512sig0h x23, x8, x8 # perform operation +80002f88: 5c840bb3 sha512sig0h x23,x8,x8 + # Check if x23 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x23, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b8, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b8_str) +80002f8c: 000aa683 lw x13,0(x21) +80002f90: 01768863 beq x13,x23,80002fa0 +80002f94: 5ec0276f jal x14,80005580 +80002f98: 80002f88 .word 0x80002f88 +80002f9c: 8000e55c .word 0x8000e55c +80002fa0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x815b68aa +80002fa4: 000a2483 lw x9,0(x20) +80002fa8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xde6afde7 +80002fac: 000a2483 lw x9,0(x20) +80002fb0: 004a0a13 addi x20,x20,4 + +80002fb4 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b9: + sha512sig0h x17, x9, x9 # perform operation +80002fb4: 5c9488b3 sha512sig0h x17,x9,x9 + # Check if x17 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x17, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b9, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b9_str) +80002fb8: 000aa683 lw x13,0(x21) +80002fbc: 01168863 beq x13,x17,80002fcc +80002fc0: 5c00276f jal x14,80005580 +80002fc4: 80002fb4 .word 0x80002fb4 +80002fc8: 8000e59b .word 0x8000e59b +80002fcc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xcd9d99f6 +80002fd0: 000a2503 lw x10,0(x20) +80002fd4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x8719af3e +80002fd8: 000a2503 lw x10,0(x20) +80002fdc: 004a0a13 addi x20,x20,4 + +80002fe0 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b10: + sha512sig0h x2, x10, x10 # perform operation +80002fe0: 5ca50133 sha512sig0h x2,x10,x10 + # Check if x2 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x2, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b10, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b10_str) +80002fe4: 000aa683 lw x13,0(x21) +80002fe8: 00268863 beq x13,x2,80002ff8 +80002fec: 5940276f jal x14,80005580 +80002ff0: 80002fe0 .word 0x80002fe0 +80002ff4: 8000e5da .word 0x8000e5da +80002ff8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xbbec90e6 +80002ffc: 000a2583 lw x11,0(x20) +80003000: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0aed4d95 +80003004: 000a2583 lw x11,0(x20) +80003008: 004a0a13 addi x20,x20,4 + +8000300c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b11: + sha512sig0h x24, x11, x11 # perform operation +8000300c: 5cb58c33 sha512sig0h x24,x11,x11 + # Check if x24 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x24, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b11, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b11_str) +80003010: 000aa683 lw x13,0(x21) +80003014: 01868863 beq x13,x24,80003024 +80003018: 5680276f jal x14,80005580 +8000301c: 8000300c .word 0x8000300c +80003020: 8000e61a .word 0x8000e61a +80003024: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xd2e30a94 +80003028: 000a2603 lw x12,0(x20) +8000302c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x782fce47 +80003030: 000a2603 lw x12,0(x20) +80003034: 004a0a13 addi x20,x20,4 + +80003038 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b12: + sha512sig0h x6, x12, x12 # perform operation +80003038: 5cc60333 sha512sig0h x6,x12,x12 + # Check if x6 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x6, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b12, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b12_str) +8000303c: 000aa683 lw x13,0(x21) +80003040: 00668863 beq x13,x6,80003050 +80003044: 53c0276f jal x14,80005580 +80003048: 80003038 .word 0x80003038 +8000304c: 8000e65a .word 0x8000e65a +80003050: 004a8a93 addi x21,x21,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003054: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003058: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x1416801a +8000305c: 000a2683 lw x13,0(x20) +80003060: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xdcf86354 +80003064: 000a2683 lw x13,0(x20) +80003068: 004a0a13 addi x20,x20,4 + +8000306c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b13: + sha512sig0h x27, x13, x13 # perform operation +8000306c: 5cd68db3 sha512sig0h x27,x13,x13 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b13, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b13_str) +80003070: 000aa203 lw x4,0(x21) +80003074: 01b20863 beq x4,x27,80003084 +80003078: 4c8022ef jal x5,80005540 +8000307c: 8000306c .word 0x8000306c +80003080: 8000e69a .word 0x8000e69a +80003084: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x19d928c3 +80003088: 000a2703 lw x14,0(x20) +8000308c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x21eafe9c +80003090: 000a2703 lw x14,0(x20) +80003094: 004a0a13 addi x20,x20,4 + +80003098 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b14: + sha512sig0h x7, x14, x14 # perform operation +80003098: 5ce703b3 sha512sig0h x7,x14,x14 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b14, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b14_str) +8000309c: 000aa203 lw x4,0(x21) +800030a0: 00720863 beq x4,x7,800030b0 +800030a4: 49c022ef jal x5,80005540 +800030a8: 80003098 .word 0x80003098 +800030ac: 8000e6da .word 0x8000e6da +800030b0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xf0ff9268 +800030b4: 000a2783 lw x15,0(x20) +800030b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x5f76739a +800030bc: 000a2783 lw x15,0(x20) +800030c0: 004a0a13 addi x20,x20,4 + +800030c4 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b15: + sha512sig0h x13, x15, x15 # perform operation +800030c4: 5cf786b3 sha512sig0h x13,x15,x15 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b15, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b15_str) +800030c8: 000aa203 lw x4,0(x21) +800030cc: 00d20863 beq x4,x13,800030dc +800030d0: 470022ef jal x5,80005540 +800030d4: 800030c4 .word 0x800030c4 +800030d8: 8000e71a .word 0x8000e71a +800030dc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xb46d3ae5 +800030e0: 000a2803 lw x16,0(x20) +800030e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x78920337 +800030e8: 000a2803 lw x16,0(x20) +800030ec: 004a0a13 addi x20,x20,4 + +800030f0 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b16: + sha512sig0h x24, x16, x16 # perform operation +800030f0: 5d080c33 sha512sig0h x24,x16,x16 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b16, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b16_str) +800030f4: 000aa203 lw x4,0(x21) +800030f8: 01820863 beq x4,x24,80003108 +800030fc: 444022ef jal x5,80005540 +80003100: 800030f0 .word 0x800030f0 +80003104: 8000e75a .word 0x8000e75a +80003108: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xd40e383d +8000310c: 000a2883 lw x17,0(x20) +80003110: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x7226f9f5 +80003114: 000a2883 lw x17,0(x20) +80003118: 004a0a13 addi x20,x20,4 + +8000311c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b17: + sha512sig0h x15, x17, x17 # perform operation +8000311c: 5d1887b3 sha512sig0h x15,x17,x17 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b17, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b17_str) +80003120: 000aa203 lw x4,0(x21) +80003124: 00f20863 beq x4,x15,80003134 +80003128: 418022ef jal x5,80005540 +8000312c: 8000311c .word 0x8000311c +80003130: 8000e79a .word 0x8000e79a +80003134: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xe70caf46 +80003138: 000a2903 lw x18,0(x20) +8000313c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x229b53cb +80003140: 000a2903 lw x18,0(x20) +80003144: 004a0a13 addi x20,x20,4 + +80003148 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b18: + sha512sig0h x10, x18, x18 # perform operation +80003148: 5d290533 sha512sig0h x10,x18,x18 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b18, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b18_str) +8000314c: 000aa203 lw x4,0(x21) +80003150: 00a20863 beq x4,x10,80003160 +80003154: 3ec022ef jal x5,80005540 +80003158: 80003148 .word 0x80003148 +8000315c: 8000e7da .word 0x8000e7da +80003160: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x5aaeb6f4 +80003164: 000a2983 lw x19,0(x20) +80003168: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xfea15015 +8000316c: 000a2983 lw x19,0(x20) +80003170: 004a0a13 addi x20,x20,4 + +80003174 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b19: + sha512sig0h x28, x19, x19 # perform operation +80003174: 5d398e33 sha512sig0h x28,x19,x19 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b19, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b19_str) +80003178: 000aa203 lw x4,0(x21) +8000317c: 01c20863 beq x4,x28,8000318c +80003180: 3c0022ef jal x5,80005540 +80003184: 80003174 .word 0x80003174 +80003188: 8000e81a .word 0x8000e81a +8000318c: 004a8a93 addi x21,x21,4 + + mv x16, x20 # switch data pointer register to avoid conflict with test +80003190: 000a0813 addi x16,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0xcf6e2e0e +80003194: 00082a03 lw x20,0(x16) +80003198: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x2d1d5ebe +8000319c: 00082a03 lw x20,0(x16) +800031a0: 00480813 addi x16,x16,4 + +800031a4 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b20: + sha512sig0h x0, x20, x20 # perform operation +800031a4: 5d4a0033 sha512sig0h x0,x20,x20 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b20, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b20_str) +800031a8: 000aa203 lw x4,0(x21) +800031ac: 00020863 beq x4,x0,800031bc +800031b0: 390022ef jal x5,80005540 +800031b4: 800031a4 .word 0x800031a4 +800031b8: 8000e85a .word 0x8000e85a +800031bc: 004a8a93 addi x21,x21,4 + + mv x2, x21 # switch signature pointer register to avoid conflict with test +800031c0: 000a8113 addi x2,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x80c24827 +800031c4: 00082a83 lw x21,0(x16) +800031c8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x3c319052 +800031cc: 00082a83 lw x21,0(x16) +800031d0: 00480813 addi x16,x16,4 + +800031d4 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b21: + sha512sig0h x24, x21, x21 # perform operation +800031d4: 5d5a8c33 sha512sig0h x24,x21,x21 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b21, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b21_str) +800031d8: 00012203 lw x4,0(x2) +800031dc: 01820863 beq x4,x24,800031ec +800031e0: 360022ef jal x5,80005540 +800031e4: 800031d4 .word 0x800031d4 +800031e8: 8000e89a .word 0x8000e89a +800031ec: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x963d1346 +800031f0: 00082b03 lw x22,0(x16) +800031f4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x0c346ab4 +800031f8: 00082b03 lw x22,0(x16) +800031fc: 00480813 addi x16,x16,4 + +80003200 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b22: + sha512sig0h x3, x22, x22 # perform operation +80003200: 5d6b01b3 sha512sig0h x3,x22,x22 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b22, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b22_str) +80003204: 00012203 lw x4,0(x2) +80003208: 00320863 beq x4,x3,80003218 +8000320c: 334022ef jal x5,80005540 +80003210: 80003200 .word 0x80003200 +80003214: 8000e8da .word 0x8000e8da +80003218: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xf967ebbd +8000321c: 00082b83 lw x23,0(x16) +80003220: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x77956449 +80003224: 00082b83 lw x23,0(x16) +80003228: 00480813 addi x16,x16,4 + +8000322c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b23: + sha512sig0h x3, x23, x23 # perform operation +8000322c: 5d7b81b3 sha512sig0h x3,x23,x23 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b23, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b23_str) +80003230: 00012203 lw x4,0(x2) +80003234: 00320863 beq x4,x3,80003244 +80003238: 308022ef jal x5,80005540 +8000323c: 8000322c .word 0x8000322c +80003240: 8000e91a .word 0x8000e91a +80003244: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0xcdc6f946 +80003248: 00082c03 lw x24,0(x16) +8000324c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x802aa94e +80003250: 00082c03 lw x24,0(x16) +80003254: 00480813 addi x16,x16,4 + +80003258 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b24: + sha512sig0h x23, x24, x24 # perform operation +80003258: 5d8c0bb3 sha512sig0h x23,x24,x24 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b24, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b24_str) +8000325c: 00012203 lw x4,0(x2) +80003260: 01720863 beq x4,x23,80003270 +80003264: 2dc022ef jal x5,80005540 +80003268: 80003258 .word 0x80003258 +8000326c: 8000e95a .word 0x8000e95a +80003270: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xa89974d9 +80003274: 00082c83 lw x25,0(x16) +80003278: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x60c6162b +8000327c: 00082c83 lw x25,0(x16) +80003280: 00480813 addi x16,x16,4 + +80003284 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b25: + sha512sig0h x10, x25, x25 # perform operation +80003284: 5d9c8533 sha512sig0h x10,x25,x25 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b25, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b25_str) +80003288: 00012203 lw x4,0(x2) +8000328c: 00a20863 beq x4,x10,8000329c +80003290: 2b0022ef jal x5,80005540 +80003294: 80003284 .word 0x80003284 +80003298: 8000e99a .word 0x8000e99a +8000329c: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x9e1e9f9f +800032a0: 00082d03 lw x26,0(x16) +800032a4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xd7310514 +800032a8: 00082d03 lw x26,0(x16) +800032ac: 00480813 addi x16,x16,4 + +800032b0 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b26: + sha512sig0h x18, x26, x26 # perform operation +800032b0: 5dad0933 sha512sig0h x18,x26,x26 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b26, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b26_str) +800032b4: 00012203 lw x4,0(x2) +800032b8: 01220863 beq x4,x18,800032c8 +800032bc: 284022ef jal x5,80005540 +800032c0: 800032b0 .word 0x800032b0 +800032c4: 8000e9da .word 0x8000e9da +800032c8: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xf0701e93 +800032cc: 00082d83 lw x27,0(x16) +800032d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x1eef226d +800032d4: 00082d83 lw x27,0(x16) +800032d8: 00480813 addi x16,x16,4 + +800032dc : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b27: + sha512sig0h x13, x27, x27 # perform operation +800032dc: 5dbd86b3 sha512sig0h x13,x27,x27 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b27, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b27_str) +800032e0: 00012203 lw x4,0(x2) +800032e4: 00d20863 beq x4,x13,800032f4 +800032e8: 258022ef jal x5,80005540 +800032ec: 800032dc .word 0x800032dc +800032f0: 8000ea1a .word 0x8000ea1a +800032f4: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x1381cec8 +800032f8: 00082e03 lw x28,0(x16) +800032fc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xd50f531c +80003300: 00082e03 lw x28,0(x16) +80003304: 00480813 addi x16,x16,4 + +80003308 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b28: + sha512sig0h x22, x28, x28 # perform operation +80003308: 5dce0b33 sha512sig0h x22,x28,x28 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b28, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b28_str) +8000330c: 00012203 lw x4,0(x2) +80003310: 01620863 beq x4,x22,80003320 +80003314: 22c022ef jal x5,80005540 +80003318: 80003308 .word 0x80003308 +8000331c: 8000ea5a .word 0x8000ea5a +80003320: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x31333e17 +80003324: 00082e83 lw x29,0(x16) +80003328: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x8a708d62 +8000332c: 00082e83 lw x29,0(x16) +80003330: 00480813 addi x16,x16,4 + +80003334 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b29: + sha512sig0h x12, x29, x29 # perform operation +80003334: 5dde8633 sha512sig0h x12,x29,x29 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b29, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b29_str) +80003338: 00012203 lw x4,0(x2) +8000333c: 00c20863 beq x4,x12,8000334c +80003340: 200022ef jal x5,80005540 +80003344: 80003334 .word 0x80003334 +80003348: 8000ea9a .word 0x8000ea9a +8000334c: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xef77384c +80003350: 00082f03 lw x30,0(x16) +80003354: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xfdff1e61 +80003358: 00082f03 lw x30,0(x16) +8000335c: 00480813 addi x16,x16,4 + +80003360 : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b30: + sha512sig0h x20, x30, x30 # perform operation +80003360: 5def0a33 sha512sig0h x20,x30,x30 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b30, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b30_str) +80003364: 00012203 lw x4,0(x2) +80003368: 01420863 beq x4,x20,80003378 +8000336c: 1d4022ef jal x5,80005540 +80003370: 80003360 .word 0x80003360 +80003374: 8000eada .word 0x8000eada +80003378: 00410113 addi x2,x2,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x54bd9565 +8000337c: 00082f83 lw x31,0(x16) +80003380: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x51049531 +80003384: 00082f83 lw x31,0(x16) +80003388: 00480813 addi x16,x16,4 + +8000338c : +Zknh_sha512sig0h_cg_cmp_rs1_rs2_b31: + sha512sig0h x14, x31, x31 # perform operation +8000338c: 5dff8733 sha512sig0h x14,x31,x31 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b31, Zknh_sha512sig0h_cg_cmp_rs1_rs2_b31_str) +80003390: 00012203 lw x4,0(x2) +80003394: 00e20863 beq x4,x14,800033a4 +80003398: 1a8022ef jal x5,80005540 +8000339c: 8000338c .word 0x8000338c +800033a0: 8000eb1a .word 0x8000eb1a +800033a4: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0xa41d1168 +800033a8: 00082003 lw x0,0(x16) +800033ac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x91ba0c2b +800033b0: 00082e03 lw x28,0(x16) +800033b4: 00480813 addi x16,x16,4 + +800033b8 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b0: + sha512sig0h x0, x0, x28 # perform operation +800033b8: 5dc00033 sha512sig0h x0,x0,x28 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknh_sha512sig0h_cg_cmp_rd_rs1_b0, Zknh_sha512sig0h_cg_cmp_rd_rs1_b0_str) +800033bc: 00012203 lw x4,0(x2) +800033c0: 00020863 beq x4,x0,800033d0 +800033c4: 17c022ef jal x5,80005540 +800033c8: 800033b8 .word 0x800033b8 +800033cc: 8000eb5a .word 0x8000eb5a +800033d0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xdee98e91 +800033d4: 00082083 lw x1,0(x16) +800033d8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x5a446a95 +800033dc: 00082183 lw x3,0(x16) +800033e0: 00480813 addi x16,x16,4 + +800033e4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b1: + sha512sig0h x1, x1, x3 # perform operation +800033e4: 5c3080b3 sha512sig0h x1,x1,x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknh_sha512sig0h_cg_cmp_rd_rs1_b1, Zknh_sha512sig0h_cg_cmp_rd_rs1_b1_str) +800033e8: 00012203 lw x4,0(x2) +800033ec: 00120863 beq x4,x1,800033fc +800033f0: 150022ef jal x5,80005540 +800033f4: 800033e4 .word 0x800033e4 +800033f8: 8000eb98 .word 0x8000eb98 +800033fc: 00410113 addi x2,x2,4 + + mv x19, x2 # switch signature pointer register to avoid conflict with test +80003400: 00010993 addi x19,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xf695fd1b +80003404: 00082103 lw x2,0(x16) +80003408: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x70f7de03 +8000340c: 00082083 lw x1,0(x16) +80003410: 00480813 addi x16,x16,4 + +80003414 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b2: + sha512sig0h x2, x2, x1 # perform operation +80003414: 5c110133 sha512sig0h x2,x2,x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zknh_sha512sig0h_cg_cmp_rd_rs1_b2, Zknh_sha512sig0h_cg_cmp_rd_rs1_b2_str) +80003418: 0009a203 lw x4,0(x19) +8000341c: 00220863 beq x4,x2,8000342c +80003420: 120022ef jal x5,80005540 +80003424: 80003414 .word 0x80003414 +80003428: 8000ebd6 .word 0x8000ebd6 +8000342c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x7a8531c2 +80003430: 00082183 lw x3,0(x16) +80003434: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xe5447431 +80003438: 00082f83 lw x31,0(x16) +8000343c: 00480813 addi x16,x16,4 + +80003440 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b3: + sha512sig0h x3, x3, x31 # perform operation +80003440: 5df181b3 sha512sig0h x3,x3,x31 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zknh_sha512sig0h_cg_cmp_rd_rs1_b3, Zknh_sha512sig0h_cg_cmp_rd_rs1_b3_str) +80003444: 0009a203 lw x4,0(x19) +80003448: 00320863 beq x4,x3,80003458 +8000344c: 0f4022ef jal x5,80005540 +80003450: 80003440 .word 0x80003440 +80003454: 8000ec14 .word 0x8000ec14 +80003458: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000345c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003460: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xa9d461a4 +80003464: 00082203 lw x4,0(x16) +80003468: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0cf9976a +8000346c: 00082a03 lw x20,0(x16) +80003470: 00480813 addi x16,x16,4 + +80003474 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b4: + sha512sig0h x4, x4, x20 # perform operation +80003474: 5d420233 sha512sig0h x4,x4,x20 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zknh_sha512sig0h_cg_cmp_rd_rs1_b4, Zknh_sha512sig0h_cg_cmp_rd_rs1_b4_str) +80003478: 0009a383 lw x7,0(x19) +8000347c: 00438863 beq x7,x4,8000348c +80003480: 0d80246f jal x8,80005558 +80003484: 80003474 .word 0x80003474 +80003488: 8000ec52 .word 0x8000ec52 +8000348c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x3afec56a +80003490: 00082283 lw x5,0(x16) +80003494: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x030a13b6 +80003498: 00082683 lw x13,0(x16) +8000349c: 00480813 addi x16,x16,4 + +800034a0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b5: + sha512sig0h x5, x5, x13 # perform operation +800034a0: 5cd282b3 sha512sig0h x5,x5,x13 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zknh_sha512sig0h_cg_cmp_rd_rs1_b5, Zknh_sha512sig0h_cg_cmp_rd_rs1_b5_str) +800034a4: 0009a383 lw x7,0(x19) +800034a8: 00538863 beq x7,x5,800034b8 +800034ac: 0ac0246f jal x8,80005558 +800034b0: 800034a0 .word 0x800034a0 +800034b4: 8000ec90 .word 0x8000ec90 +800034b8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x56d1ec4c +800034bc: 00082303 lw x6,0(x16) +800034c0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xfff012a1 +800034c4: 00082003 lw x0,0(x16) +800034c8: 00480813 addi x16,x16,4 + +800034cc : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b6: + sha512sig0h x6, x6, x0 # perform operation +800034cc: 5c030333 sha512sig0h x6,x6,x0 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zknh_sha512sig0h_cg_cmp_rd_rs1_b6, Zknh_sha512sig0h_cg_cmp_rd_rs1_b6_str) +800034d0: 0009a383 lw x7,0(x19) +800034d4: 00638863 beq x7,x6,800034e4 +800034d8: 0800246f jal x8,80005558 +800034dc: 800034cc .word 0x800034cc +800034e0: 8000ecce .word 0x8000ecce +800034e4: 00498993 addi x19,x19,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800034e8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800034ec: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xc0497282 +800034f0: 00082383 lw x7,0(x16) +800034f4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0xd75c2273 +800034f8: 00082203 lw x4,0(x16) +800034fc: 00480813 addi x16,x16,4 + +80003500 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b7: + sha512sig0h x7, x7, x4 # perform operation +80003500: 5c4383b3 sha512sig0h x7,x7,x4 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zknh_sha512sig0h_cg_cmp_rd_rs1_b7, Zknh_sha512sig0h_cg_cmp_rd_rs1_b7_str) +80003504: 0009a683 lw x13,0(x19) +80003508: 00768863 beq x13,x7,80003518 +8000350c: 0740276f jal x14,80005580 +80003510: 80003500 .word 0x80003500 +80003514: 8000ed0c .word 0x8000ed0c +80003518: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xce8bbb2d +8000351c: 00082403 lw x8,0(x16) +80003520: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x459b2e76 +80003524: 00082e03 lw x28,0(x16) +80003528: 00480813 addi x16,x16,4 + +8000352c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b8: + sha512sig0h x8, x8, x28 # perform operation +8000352c: 5dc40433 sha512sig0h x8,x8,x28 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zknh_sha512sig0h_cg_cmp_rd_rs1_b8, Zknh_sha512sig0h_cg_cmp_rd_rs1_b8_str) +80003530: 0009a683 lw x13,0(x19) +80003534: 00868863 beq x13,x8,80003544 +80003538: 0480276f jal x14,80005580 +8000353c: 8000352c .word 0x8000352c +80003540: 8000ed4a .word 0x8000ed4a +80003544: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x49b652d3 +80003548: 00082483 lw x9,0(x16) +8000354c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xc0eac8f0 +80003550: 00082383 lw x7,0(x16) +80003554: 00480813 addi x16,x16,4 + +80003558 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b9: + sha512sig0h x9, x9, x7 # perform operation +80003558: 5c7484b3 sha512sig0h x9,x9,x7 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zknh_sha512sig0h_cg_cmp_rd_rs1_b9, Zknh_sha512sig0h_cg_cmp_rd_rs1_b9_str) +8000355c: 0009a683 lw x13,0(x19) +80003560: 00968863 beq x13,x9,80003570 +80003564: 01c0276f jal x14,80005580 +80003568: 80003558 .word 0x80003558 +8000356c: 8000ed88 .word 0x8000ed88 +80003570: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x65154646 +80003574: 00082503 lw x10,0(x16) +80003578: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0xe45d7ae1 +8000357c: 00082a03 lw x20,0(x16) +80003580: 00480813 addi x16,x16,4 + +80003584 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b10: + sha512sig0h x10, x10, x20 # perform operation +80003584: 5d450533 sha512sig0h x10,x10,x20 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zknh_sha512sig0h_cg_cmp_rd_rs1_b10, Zknh_sha512sig0h_cg_cmp_rd_rs1_b10_str) +80003588: 0009a683 lw x13,0(x19) +8000358c: 00a68863 beq x13,x10,8000359c +80003590: 7f10176f jal x14,80005580 +80003594: 80003584 .word 0x80003584 +80003598: 8000edc6 .word 0x8000edc6 +8000359c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x4c6d1e3b +800035a0: 00082583 lw x11,0(x16) +800035a4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xbaa6acd8 +800035a8: 00082103 lw x2,0(x16) +800035ac: 00480813 addi x16,x16,4 + +800035b0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b11: + sha512sig0h x11, x11, x2 # perform operation +800035b0: 5c2585b3 sha512sig0h x11,x11,x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zknh_sha512sig0h_cg_cmp_rd_rs1_b11, Zknh_sha512sig0h_cg_cmp_rd_rs1_b11_str) +800035b4: 0009a683 lw x13,0(x19) +800035b8: 00b68863 beq x13,x11,800035c8 +800035bc: 7c50176f jal x14,80005580 +800035c0: 800035b0 .word 0x800035b0 +800035c4: 8000ee05 .word 0x8000ee05 +800035c8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x7f6264de +800035cc: 00082603 lw x12,0(x16) +800035d0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x98a2b9ef +800035d4: 00082883 lw x17,0(x16) +800035d8: 00480813 addi x16,x16,4 + +800035dc : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b12: + sha512sig0h x12, x12, x17 # perform operation +800035dc: 5d160633 sha512sig0h x12,x12,x17 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zknh_sha512sig0h_cg_cmp_rd_rs1_b12, Zknh_sha512sig0h_cg_cmp_rd_rs1_b12_str) +800035e0: 0009a683 lw x13,0(x19) +800035e4: 00c68863 beq x13,x12,800035f4 +800035e8: 7990176f jal x14,80005580 +800035ec: 800035dc .word 0x800035dc +800035f0: 8000ee44 .word 0x8000ee44 +800035f4: 00498993 addi x19,x19,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035f8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035fc: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x77ef3475 +80003600: 00082683 lw x13,0(x16) +80003604: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x34a9b3b3 +80003608: 00082603 lw x12,0(x16) +8000360c: 00480813 addi x16,x16,4 + +80003610 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b13: + sha512sig0h x13, x13, x12 # perform operation +80003610: 5cc686b3 sha512sig0h x13,x13,x12 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zknh_sha512sig0h_cg_cmp_rd_rs1_b13, Zknh_sha512sig0h_cg_cmp_rd_rs1_b13_str) +80003614: 0009a383 lw x7,0(x19) +80003618: 00d38863 beq x7,x13,80003628 +8000361c: 73d0146f jal x8,80005558 +80003620: 80003610 .word 0x80003610 +80003624: 8000ee83 .word 0x8000ee83 +80003628: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x9857bc99 +8000362c: 00082703 lw x14,0(x16) +80003630: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x945ea815 +80003634: 00082083 lw x1,0(x16) +80003638: 00480813 addi x16,x16,4 + +8000363c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b14: + sha512sig0h x14, x14, x1 # perform operation +8000363c: 5c170733 sha512sig0h x14,x14,x1 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zknh_sha512sig0h_cg_cmp_rd_rs1_b14, Zknh_sha512sig0h_cg_cmp_rd_rs1_b14_str) +80003640: 0009a383 lw x7,0(x19) +80003644: 00e38863 beq x7,x14,80003654 +80003648: 7110146f jal x8,80005558 +8000364c: 8000363c .word 0x8000363c +80003650: 8000eec2 .word 0x8000eec2 +80003654: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x6c5f114d +80003658: 00082783 lw x15,0(x16) +8000365c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xfdf88c21 +80003660: 00082503 lw x10,0(x16) +80003664: 00480813 addi x16,x16,4 + +80003668 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b15: + sha512sig0h x15, x15, x10 # perform operation +80003668: 5ca787b3 sha512sig0h x15,x15,x10 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zknh_sha512sig0h_cg_cmp_rd_rs1_b15, Zknh_sha512sig0h_cg_cmp_rd_rs1_b15_str) +8000366c: 0009a383 lw x7,0(x19) +80003670: 00f38863 beq x7,x15,80003680 +80003674: 6e50146f jal x8,80005558 +80003678: 80003668 .word 0x80003668 +8000367c: 8000ef01 .word 0x8000ef01 +80003680: 00498993 addi x19,x19,4 + + mv x27, x16 # switch data pointer register to avoid conflict with test +80003684: 00080d93 addi x27,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x8d9bd45c +80003688: 000da803 lw x16,0(x27) +8000368c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0xbb8d17a6 +80003690: 000da003 lw x0,0(x27) +80003694: 004d8d93 addi x27,x27,4 + +80003698 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b16: + sha512sig0h x16, x16, x0 # perform operation +80003698: 5c080833 sha512sig0h x16,x16,x0 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zknh_sha512sig0h_cg_cmp_rd_rs1_b16, Zknh_sha512sig0h_cg_cmp_rd_rs1_b16_str) +8000369c: 0009a383 lw x7,0(x19) +800036a0: 01038863 beq x7,x16,800036b0 +800036a4: 6b50146f jal x8,80005558 +800036a8: 80003698 .word 0x80003698 +800036ac: 8000ef40 .word 0x8000ef40 +800036b0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x10b18cc2 +800036b4: 000da883 lw x17,0(x27) +800036b8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0x8e52e093 +800036bc: 000da183 lw x3,0(x27) +800036c0: 004d8d93 addi x27,x27,4 + +800036c4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b17: + sha512sig0h x17, x17, x3 # perform operation +800036c4: 5c3888b3 sha512sig0h x17,x17,x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zknh_sha512sig0h_cg_cmp_rd_rs1_b17, Zknh_sha512sig0h_cg_cmp_rd_rs1_b17_str) +800036c8: 0009a383 lw x7,0(x19) +800036cc: 01138863 beq x7,x17,800036dc +800036d0: 6890146f jal x8,80005558 +800036d4: 800036c4 .word 0x800036c4 +800036d8: 8000ef7f .word 0x8000ef7f +800036dc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x9e8431e0 +800036e0: 000da903 lw x18,0(x27) +800036e4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0xbcbd670e +800036e8: 000da003 lw x0,0(x27) +800036ec: 004d8d93 addi x27,x27,4 + +800036f0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b18: + sha512sig0h x18, x18, x0 # perform operation +800036f0: 5c090933 sha512sig0h x18,x18,x0 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zknh_sha512sig0h_cg_cmp_rd_rs1_b18, Zknh_sha512sig0h_cg_cmp_rd_rs1_b18_str) +800036f4: 0009a383 lw x7,0(x19) +800036f8: 01238863 beq x7,x18,80003708 +800036fc: 65d0146f jal x8,80005558 +80003700: 800036f0 .word 0x800036f0 +80003704: 8000efbe .word 0x8000efbe +80003708: 00498993 addi x19,x19,4 + + mv x12, x19 # switch signature pointer register to avoid conflict with test +8000370c: 00098613 addi x12,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x010f17ef +80003710: 000da983 lw x19,0(x27) +80003714: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs2: x28 = 0xb24f0017 +80003718: 000dae03 lw x28,0(x27) +8000371c: 004d8d93 addi x27,x27,4 + +80003720 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b19: + sha512sig0h x19, x19, x28 # perform operation +80003720: 5dc989b3 sha512sig0h x19,x19,x28 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknh_sha512sig0h_cg_cmp_rd_rs1_b19, Zknh_sha512sig0h_cg_cmp_rd_rs1_b19_str) +80003724: 00062383 lw x7,0(x12) +80003728: 01338863 beq x7,x19,80003738 +8000372c: 62d0146f jal x8,80005558 +80003730: 80003720 .word 0x80003720 +80003734: 8000effd .word 0x8000effd +80003738: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x31cbaba9 +8000373c: 000daa03 lw x20,0(x27) +80003740: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xd7bae895 +80003744: 000da483 lw x9,0(x27) +80003748: 004d8d93 addi x27,x27,4 + +8000374c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b20: + sha512sig0h x20, x20, x9 # perform operation +8000374c: 5c9a0a33 sha512sig0h x20,x20,x9 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknh_sha512sig0h_cg_cmp_rd_rs1_b20, Zknh_sha512sig0h_cg_cmp_rd_rs1_b20_str) +80003750: 00062383 lw x7,0(x12) +80003754: 01438863 beq x7,x20,80003764 +80003758: 6010146f jal x8,80005558 +8000375c: 8000374c .word 0x8000374c +80003760: 8000f03c .word 0x8000f03c +80003764: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xcb433c48 +80003768: 000daa83 lw x21,0(x27) +8000376c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xee220699 +80003770: 000da483 lw x9,0(x27) +80003774: 004d8d93 addi x27,x27,4 + +80003778 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b21: + sha512sig0h x21, x21, x9 # perform operation +80003778: 5c9a8ab3 sha512sig0h x21,x21,x9 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknh_sha512sig0h_cg_cmp_rd_rs1_b21, Zknh_sha512sig0h_cg_cmp_rd_rs1_b21_str) +8000377c: 00062383 lw x7,0(x12) +80003780: 01538863 beq x7,x21,80003790 +80003784: 5d50146f jal x8,80005558 +80003788: 80003778 .word 0x80003778 +8000378c: 8000f07b .word 0x8000f07b +80003790: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x3141af4c +80003794: 000dab03 lw x22,0(x27) +80003798: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs2: x29 = 0x2e13275c +8000379c: 000dae83 lw x29,0(x27) +800037a0: 004d8d93 addi x27,x27,4 + +800037a4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b22: + sha512sig0h x22, x22, x29 # perform operation +800037a4: 5ddb0b33 sha512sig0h x22,x22,x29 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknh_sha512sig0h_cg_cmp_rd_rs1_b22, Zknh_sha512sig0h_cg_cmp_rd_rs1_b22_str) +800037a8: 00062383 lw x7,0(x12) +800037ac: 01638863 beq x7,x22,800037bc +800037b0: 5a90146f jal x8,80005558 +800037b4: 800037a4 .word 0x800037a4 +800037b8: 8000f0ba .word 0x8000f0ba +800037bc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x6c499b2d +800037c0: 000dab83 lw x23,0(x27) +800037c4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs2: x4 = 0x06a60470 +800037c8: 000da203 lw x4,0(x27) +800037cc: 004d8d93 addi x27,x27,4 + +800037d0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b23: + sha512sig0h x23, x23, x4 # perform operation +800037d0: 5c4b8bb3 sha512sig0h x23,x23,x4 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknh_sha512sig0h_cg_cmp_rd_rs1_b23, Zknh_sha512sig0h_cg_cmp_rd_rs1_b23_str) +800037d4: 00062383 lw x7,0(x12) +800037d8: 01738863 beq x7,x23,800037e8 +800037dc: 57d0146f jal x8,80005558 +800037e0: 800037d0 .word 0x800037d0 +800037e4: 8000f0f9 .word 0x8000f0f9 +800037e8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x71895f09 +800037ec: 000dac03 lw x24,0(x27) +800037f0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0xc23b25a7 +800037f4: 000da183 lw x3,0(x27) +800037f8: 004d8d93 addi x27,x27,4 + +800037fc : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b24: + sha512sig0h x24, x24, x3 # perform operation +800037fc: 5c3c0c33 sha512sig0h x24,x24,x3 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zknh_sha512sig0h_cg_cmp_rd_rs1_b24, Zknh_sha512sig0h_cg_cmp_rd_rs1_b24_str) +80003800: 00062383 lw x7,0(x12) +80003804: 01838863 beq x7,x24,80003814 +80003808: 5510146f jal x8,80005558 +8000380c: 800037fc .word 0x800037fc +80003810: 8000f138 .word 0x8000f138 +80003814: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x2eb81446 +80003818: 000dac83 lw x25,0(x27) +8000381c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0x56c09f67 +80003820: 000da183 lw x3,0(x27) +80003824: 004d8d93 addi x27,x27,4 + +80003828 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b25: + sha512sig0h x25, x25, x3 # perform operation +80003828: 5c3c8cb3 sha512sig0h x25,x25,x3 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknh_sha512sig0h_cg_cmp_rd_rs1_b25, Zknh_sha512sig0h_cg_cmp_rd_rs1_b25_str) +8000382c: 00062383 lw x7,0(x12) +80003830: 01938863 beq x7,x25,80003840 +80003834: 5250146f jal x8,80005558 +80003838: 80003828 .word 0x80003828 +8000383c: 8000f177 .word 0x8000f177 +80003840: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x23635e57 +80003844: 000dad03 lw x26,0(x27) +80003848: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x89eb815d +8000384c: 000dab83 lw x23,0(x27) +80003850: 004d8d93 addi x27,x27,4 + +80003854 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b26: + sha512sig0h x26, x26, x23 # perform operation +80003854: 5d7d0d33 sha512sig0h x26,x26,x23 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknh_sha512sig0h_cg_cmp_rd_rs1_b26, Zknh_sha512sig0h_cg_cmp_rd_rs1_b26_str) +80003858: 00062383 lw x7,0(x12) +8000385c: 01a38863 beq x7,x26,8000386c +80003860: 4f90146f jal x8,80005558 +80003864: 80003854 .word 0x80003854 +80003868: 8000f1b6 .word 0x8000f1b6 +8000386c: 00460613 addi x12,x12,4 + + mv x28, x27 # switch data pointer register to avoid conflict with test +80003870: 000d8e13 addi x28,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x275ec77f +80003874: 000e2d83 lw x27,0(x28) +80003878: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xb6337302 +8000387c: 000e2c83 lw x25,0(x28) +80003880: 004e0e13 addi x28,x28,4 + +80003884 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b27: + sha512sig0h x27, x27, x25 # perform operation +80003884: 5d9d8db3 sha512sig0h x27,x27,x25 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknh_sha512sig0h_cg_cmp_rd_rs1_b27, Zknh_sha512sig0h_cg_cmp_rd_rs1_b27_str) +80003888: 00062383 lw x7,0(x12) +8000388c: 01b38863 beq x7,x27,8000389c +80003890: 4c90146f jal x8,80005558 +80003894: 80003884 .word 0x80003884 +80003898: 8000f1f5 .word 0x8000f1f5 +8000389c: 00460613 addi x12,x12,4 + + mv x20, x28 # switch data pointer register to avoid conflict with test +800038a0: 000e0a13 addi x20,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x158c6d58 +800038a4: 000a2e03 lw x28,0(x20) +800038a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xbf3254d4 +800038ac: 000a2f83 lw x31,0(x20) +800038b0: 004a0a13 addi x20,x20,4 + +800038b4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b28: + sha512sig0h x28, x28, x31 # perform operation +800038b4: 5dfe0e33 sha512sig0h x28,x28,x31 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknh_sha512sig0h_cg_cmp_rd_rs1_b28, Zknh_sha512sig0h_cg_cmp_rd_rs1_b28_str) +800038b8: 00062383 lw x7,0(x12) +800038bc: 01c38863 beq x7,x28,800038cc +800038c0: 4990146f jal x8,80005558 +800038c4: 800038b4 .word 0x800038b4 +800038c8: 8000f234 .word 0x8000f234 +800038cc: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x8c3868bf +800038d0: 000a2e83 lw x29,0(x20) +800038d4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xc0c7367e +800038d8: 000a2303 lw x6,0(x20) +800038dc: 004a0a13 addi x20,x20,4 + +800038e0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b29: + sha512sig0h x29, x29, x6 # perform operation +800038e0: 5c6e8eb3 sha512sig0h x29,x29,x6 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknh_sha512sig0h_cg_cmp_rd_rs1_b29, Zknh_sha512sig0h_cg_cmp_rd_rs1_b29_str) +800038e4: 00062383 lw x7,0(x12) +800038e8: 01d38863 beq x7,x29,800038f8 +800038ec: 46d0146f jal x8,80005558 +800038f0: 800038e0 .word 0x800038e0 +800038f4: 8000f273 .word 0x8000f273 +800038f8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x89f438e3 +800038fc: 000a2f03 lw x30,0(x20) +80003900: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0xf413d703 +80003904: 000a2c83 lw x25,0(x20) +80003908: 004a0a13 addi x20,x20,4 + +8000390c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b30: + sha512sig0h x30, x30, x25 # perform operation +8000390c: 5d9f0f33 sha512sig0h x30,x30,x25 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknh_sha512sig0h_cg_cmp_rd_rs1_b30, Zknh_sha512sig0h_cg_cmp_rd_rs1_b30_str) +80003910: 00062383 lw x7,0(x12) +80003914: 01e38863 beq x7,x30,80003924 +80003918: 4410146f jal x8,80005558 +8000391c: 8000390c .word 0x8000390c +80003920: 8000f2b2 .word 0x8000f2b2 +80003924: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xbf665d9d +80003928: 000a2f83 lw x31,0(x20) +8000392c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xc4026add +80003930: 000a2183 lw x3,0(x20) +80003934: 004a0a13 addi x20,x20,4 + +80003938 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_b31: + sha512sig0h x31, x31, x3 # perform operation +80003938: 5c3f8fb3 sha512sig0h x31,x31,x3 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknh_sha512sig0h_cg_cmp_rd_rs1_b31, Zknh_sha512sig0h_cg_cmp_rd_rs1_b31_str) +8000393c: 00062383 lw x7,0(x12) +80003940: 01f38863 beq x7,x31,80003950 +80003944: 4150146f jal x8,80005558 +80003948: 80003938 .word 0x80003938 +8000394c: 8000f2f1 .word 0x8000f2f1 +80003950: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x5df4cbdf +80003954: 000a2883 lw x17,0(x20) +80003958: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x7756d83a +8000395c: 000a2003 lw x0,0(x20) +80003960: 004a0a13 addi x20,x20,4 + +80003964 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b0: + sha512sig0h x0, x17, x0 # perform operation +80003964: 5c088033 sha512sig0h x0,x17,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zknh_sha512sig0h_cg_cmp_rd_rs2_b0, Zknh_sha512sig0h_cg_cmp_rd_rs2_b0_str) +80003968: 00062383 lw x7,0(x12) +8000396c: 00038863 beq x7,x0,8000397c +80003970: 3e90146f jal x8,80005558 +80003974: 80003964 .word 0x80003964 +80003978: 8000f330 .word 0x8000f330 +8000397c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xb9a69a52 +80003980: 000a2283 lw x5,0(x20) +80003984: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x69288a0d +80003988: 000a2083 lw x1,0(x20) +8000398c: 004a0a13 addi x20,x20,4 + +80003990 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b1: + sha512sig0h x1, x5, x1 # perform operation +80003990: 5c1280b3 sha512sig0h x1,x5,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknh_sha512sig0h_cg_cmp_rd_rs2_b1, Zknh_sha512sig0h_cg_cmp_rd_rs2_b1_str) +80003994: 00062383 lw x7,0(x12) +80003998: 00138863 beq x7,x1,800039a8 +8000399c: 3bd0146f jal x8,80005558 +800039a0: 80003990 .word 0x80003990 +800039a4: 8000f36e .word 0x8000f36e +800039a8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x861e1ac4 +800039ac: 000a2303 lw x6,0(x20) +800039b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x06123722 +800039b4: 000a2103 lw x2,0(x20) +800039b8: 004a0a13 addi x20,x20,4 + +800039bc : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b2: + sha512sig0h x2, x6, x2 # perform operation +800039bc: 5c230133 sha512sig0h x2,x6,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknh_sha512sig0h_cg_cmp_rd_rs2_b2, Zknh_sha512sig0h_cg_cmp_rd_rs2_b2_str) +800039c0: 00062383 lw x7,0(x12) +800039c4: 00238863 beq x7,x2,800039d4 +800039c8: 3910146f jal x8,80005558 +800039cc: 800039bc .word 0x800039bc +800039d0: 8000f3ac .word 0x8000f3ac +800039d4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xcecad548 +800039d8: 000a2c83 lw x25,0(x20) +800039dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x26b64891 +800039e0: 000a2183 lw x3,0(x20) +800039e4: 004a0a13 addi x20,x20,4 + +800039e8 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b3: + sha512sig0h x3, x25, x3 # perform operation +800039e8: 5c3c81b3 sha512sig0h x3,x25,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknh_sha512sig0h_cg_cmp_rd_rs2_b3, Zknh_sha512sig0h_cg_cmp_rd_rs2_b3_str) +800039ec: 00062383 lw x7,0(x12) +800039f0: 00338863 beq x7,x3,80003a00 +800039f4: 3650146f jal x8,80005558 +800039f8: 800039e8 .word 0x800039e8 +800039fc: 8000f3ea .word 0x8000f3ea +80003a00: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x9690b315 +80003a04: 000a2e83 lw x29,0(x20) +80003a08: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xfa445c50 +80003a0c: 000a2203 lw x4,0(x20) +80003a10: 004a0a13 addi x20,x20,4 + +80003a14 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b4: + sha512sig0h x4, x29, x4 # perform operation +80003a14: 5c4e8233 sha512sig0h x4,x29,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknh_sha512sig0h_cg_cmp_rd_rs2_b4, Zknh_sha512sig0h_cg_cmp_rd_rs2_b4_str) +80003a18: 00062383 lw x7,0(x12) +80003a1c: 00438863 beq x7,x4,80003a2c +80003a20: 3390146f jal x8,80005558 +80003a24: 80003a14 .word 0x80003a14 +80003a28: 8000f428 .word 0x8000f428 +80003a2c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x0bfd288b +80003a30: 000a2e83 lw x29,0(x20) +80003a34: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x8ccf8efa +80003a38: 000a2283 lw x5,0(x20) +80003a3c: 004a0a13 addi x20,x20,4 + +80003a40 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b5: + sha512sig0h x5, x29, x5 # perform operation +80003a40: 5c5e82b3 sha512sig0h x5,x29,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknh_sha512sig0h_cg_cmp_rd_rs2_b5, Zknh_sha512sig0h_cg_cmp_rd_rs2_b5_str) +80003a44: 00062383 lw x7,0(x12) +80003a48: 00538863 beq x7,x5,80003a58 +80003a4c: 30d0146f jal x8,80005558 +80003a50: 80003a40 .word 0x80003a40 +80003a54: 8000f466 .word 0x8000f466 +80003a58: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xe371d1b0 +80003a5c: 000a2f83 lw x31,0(x20) +80003a60: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xb1bb0322 +80003a64: 000a2303 lw x6,0(x20) +80003a68: 004a0a13 addi x20,x20,4 + +80003a6c : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b6: + sha512sig0h x6, x31, x6 # perform operation +80003a6c: 5c6f8333 sha512sig0h x6,x31,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknh_sha512sig0h_cg_cmp_rd_rs2_b6, Zknh_sha512sig0h_cg_cmp_rd_rs2_b6_str) +80003a70: 00062383 lw x7,0(x12) +80003a74: 00638863 beq x7,x6,80003a84 +80003a78: 2e10146f jal x8,80005558 +80003a7c: 80003a6c .word 0x80003a6c +80003a80: 8000f4a4 .word 0x8000f4a4 +80003a84: 00460613 addi x12,x12,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80003a88: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80003a8c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xd22b110f +80003a90: 000a2303 lw x6,0(x20) +80003a94: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xc732e023 +80003a98: 000a2383 lw x7,0(x20) +80003a9c: 004a0a13 addi x20,x20,4 + +80003aa0 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b7: + sha512sig0h x7, x6, x7 # perform operation +80003aa0: 5c7303b3 sha512sig0h x7,x6,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zknh_sha512sig0h_cg_cmp_rd_rs2_b7, Zknh_sha512sig0h_cg_cmp_rd_rs2_b7_str) +80003aa4: 00062683 lw x13,0(x12) +80003aa8: 00768863 beq x13,x7,80003ab8 +80003aac: 2d50176f jal x14,80005580 +80003ab0: 80003aa0 .word 0x80003aa0 +80003ab4: 8000f4e2 .word 0x8000f4e2 +80003ab8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x513593b0 +80003abc: 000a2583 lw x11,0(x20) +80003ac0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x6cc85381 +80003ac4: 000a2403 lw x8,0(x20) +80003ac8: 004a0a13 addi x20,x20,4 + +80003acc : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b8: + sha512sig0h x8, x11, x8 # perform operation +80003acc: 5c858433 sha512sig0h x8,x11,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zknh_sha512sig0h_cg_cmp_rd_rs2_b8, Zknh_sha512sig0h_cg_cmp_rd_rs2_b8_str) +80003ad0: 00062683 lw x13,0(x12) +80003ad4: 00868863 beq x13,x8,80003ae4 +80003ad8: 2a90176f jal x14,80005580 +80003adc: 80003acc .word 0x80003acc +80003ae0: 8000f520 .word 0x8000f520 +80003ae4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xccb46b3c +80003ae8: 000a2303 lw x6,0(x20) +80003aec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x9a740edd +80003af0: 000a2483 lw x9,0(x20) +80003af4: 004a0a13 addi x20,x20,4 + +80003af8 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b9: + sha512sig0h x9, x6, x9 # perform operation +80003af8: 5c9304b3 sha512sig0h x9,x6,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zknh_sha512sig0h_cg_cmp_rd_rs2_b9, Zknh_sha512sig0h_cg_cmp_rd_rs2_b9_str) +80003afc: 00062683 lw x13,0(x12) +80003b00: 00968863 beq x13,x9,80003b10 +80003b04: 27d0176f jal x14,80005580 +80003b08: 80003af8 .word 0x80003af8 +80003b0c: 8000f55e .word 0x8000f55e +80003b10: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xb39aee76 +80003b14: 000a2e03 lw x28,0(x20) +80003b18: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xfc395257 +80003b1c: 000a2503 lw x10,0(x20) +80003b20: 004a0a13 addi x20,x20,4 + +80003b24 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b10: + sha512sig0h x10, x28, x10 # perform operation +80003b24: 5cae0533 sha512sig0h x10,x28,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zknh_sha512sig0h_cg_cmp_rd_rs2_b10, Zknh_sha512sig0h_cg_cmp_rd_rs2_b10_str) +80003b28: 00062683 lw x13,0(x12) +80003b2c: 00a68863 beq x13,x10,80003b3c +80003b30: 2510176f jal x14,80005580 +80003b34: 80003b24 .word 0x80003b24 +80003b38: 8000f59c .word 0x8000f59c +80003b3c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0xaa02bd70 +80003b40: 000a2403 lw x8,0(x20) +80003b44: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x3238de31 +80003b48: 000a2583 lw x11,0(x20) +80003b4c: 004a0a13 addi x20,x20,4 + +80003b50 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b11: + sha512sig0h x11, x8, x11 # perform operation +80003b50: 5cb405b3 sha512sig0h x11,x8,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zknh_sha512sig0h_cg_cmp_rd_rs2_b11, Zknh_sha512sig0h_cg_cmp_rd_rs2_b11_str) +80003b54: 00062683 lw x13,0(x12) +80003b58: 00b68863 beq x13,x11,80003b68 +80003b5c: 2250176f jal x14,80005580 +80003b60: 80003b50 .word 0x80003b50 +80003b64: 8000f5db .word 0x8000f5db +80003b68: 00460613 addi x12,x12,4 + + mv x23, x12 # switch signature pointer register to avoid conflict with test +80003b6c: 00060b93 addi x23,x12,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xaed4aa70 +80003b70: 000a2303 lw x6,0(x20) +80003b74: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x4cef5b32 +80003b78: 000a2603 lw x12,0(x20) +80003b7c: 004a0a13 addi x20,x20,4 + +80003b80 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b12: + sha512sig0h x12, x6, x12 # perform operation +80003b80: 5cc30633 sha512sig0h x12,x6,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zknh_sha512sig0h_cg_cmp_rd_rs2_b12, Zknh_sha512sig0h_cg_cmp_rd_rs2_b12_str) +80003b84: 000ba683 lw x13,0(x23) +80003b88: 00c68863 beq x13,x12,80003b98 +80003b8c: 1f50176f jal x14,80005580 +80003b90: 80003b80 .word 0x80003b80 +80003b94: 8000f61a .word 0x8000f61a +80003b98: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003b9c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003ba0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0xbaf5fbad +80003ba4: 000a2d83 lw x27,0(x20) +80003ba8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x9ebb0c23 +80003bac: 000a2683 lw x13,0(x20) +80003bb0: 004a0a13 addi x20,x20,4 + +80003bb4 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b13: + sha512sig0h x13, x27, x13 # perform operation +80003bb4: 5cdd86b3 sha512sig0h x13,x27,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zknh_sha512sig0h_cg_cmp_rd_rs2_b13, Zknh_sha512sig0h_cg_cmp_rd_rs2_b13_str) +80003bb8: 000ba203 lw x4,0(x23) +80003bbc: 00d20863 beq x4,x13,80003bcc +80003bc0: 181012ef jal x5,80005540 +80003bc4: 80003bb4 .word 0x80003bb4 +80003bc8: 8000f659 .word 0x8000f659 +80003bcc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x26ca7b91 +80003bd0: 000a2003 lw x0,0(x20) +80003bd4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x4a646815 +80003bd8: 000a2703 lw x14,0(x20) +80003bdc: 004a0a13 addi x20,x20,4 + +80003be0 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b14: + sha512sig0h x14, x0, x14 # perform operation +80003be0: 5ce00733 sha512sig0h x14,x0,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zknh_sha512sig0h_cg_cmp_rd_rs2_b14, Zknh_sha512sig0h_cg_cmp_rd_rs2_b14_str) +80003be4: 000ba203 lw x4,0(x23) +80003be8: 00e20863 beq x4,x14,80003bf8 +80003bec: 155012ef jal x5,80005540 +80003bf0: 80003be0 .word 0x80003be0 +80003bf4: 8000f698 .word 0x8000f698 +80003bf8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xfe8ed44b +80003bfc: 000a2a83 lw x21,0(x20) +80003c00: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xe985d21b +80003c04: 000a2783 lw x15,0(x20) +80003c08: 004a0a13 addi x20,x20,4 + +80003c0c : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b15: + sha512sig0h x15, x21, x15 # perform operation +80003c0c: 5cfa87b3 sha512sig0h x15,x21,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknh_sha512sig0h_cg_cmp_rd_rs2_b15, Zknh_sha512sig0h_cg_cmp_rd_rs2_b15_str) +80003c10: 000ba203 lw x4,0(x23) +80003c14: 00f20863 beq x4,x15,80003c24 +80003c18: 129012ef jal x5,80005540 +80003c1c: 80003c0c .word 0x80003c0c +80003c20: 8000f6d7 .word 0x8000f6d7 +80003c24: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x2c11df64 +80003c28: 000a2483 lw x9,0(x20) +80003c2c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xdd802b3f +80003c30: 000a2803 lw x16,0(x20) +80003c34: 004a0a13 addi x20,x20,4 + +80003c38 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b16: + sha512sig0h x16, x9, x16 # perform operation +80003c38: 5d048833 sha512sig0h x16,x9,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zknh_sha512sig0h_cg_cmp_rd_rs2_b16, Zknh_sha512sig0h_cg_cmp_rd_rs2_b16_str) +80003c3c: 000ba203 lw x4,0(x23) +80003c40: 01020863 beq x4,x16,80003c50 +80003c44: 0fd012ef jal x5,80005540 +80003c48: 80003c38 .word 0x80003c38 +80003c4c: 8000f716 .word 0x8000f716 +80003c50: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xa82c144f +80003c54: 000a2303 lw x6,0(x20) +80003c58: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xcb5aed12 +80003c5c: 000a2883 lw x17,0(x20) +80003c60: 004a0a13 addi x20,x20,4 + +80003c64 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b17: + sha512sig0h x17, x6, x17 # perform operation +80003c64: 5d1308b3 sha512sig0h x17,x6,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zknh_sha512sig0h_cg_cmp_rd_rs2_b17, Zknh_sha512sig0h_cg_cmp_rd_rs2_b17_str) +80003c68: 000ba203 lw x4,0(x23) +80003c6c: 01120863 beq x4,x17,80003c7c +80003c70: 0d1012ef jal x5,80005540 +80003c74: 80003c64 .word 0x80003c64 +80003c78: 8000f755 .word 0x8000f755 +80003c7c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xd354ee63 +80003c80: 000a2783 lw x15,0(x20) +80003c84: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x71805aa2 +80003c88: 000a2903 lw x18,0(x20) +80003c8c: 004a0a13 addi x20,x20,4 + +80003c90 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b18: + sha512sig0h x18, x15, x18 # perform operation +80003c90: 5d278933 sha512sig0h x18,x15,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zknh_sha512sig0h_cg_cmp_rd_rs2_b18, Zknh_sha512sig0h_cg_cmp_rd_rs2_b18_str) +80003c94: 000ba203 lw x4,0(x23) +80003c98: 01220863 beq x4,x18,80003ca8 +80003c9c: 0a5012ef jal x5,80005540 +80003ca0: 80003c90 .word 0x80003c90 +80003ca4: 8000f794 .word 0x8000f794 +80003ca8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xc674f31a +80003cac: 000a2503 lw x10,0(x20) +80003cb0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xff66a906 +80003cb4: 000a2983 lw x19,0(x20) +80003cb8: 004a0a13 addi x20,x20,4 + +80003cbc : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b19: + sha512sig0h x19, x10, x19 # perform operation +80003cbc: 5d3509b3 sha512sig0h x19,x10,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknh_sha512sig0h_cg_cmp_rd_rs2_b19, Zknh_sha512sig0h_cg_cmp_rd_rs2_b19_str) +80003cc0: 000ba203 lw x4,0(x23) +80003cc4: 01320863 beq x4,x19,80003cd4 +80003cc8: 079012ef jal x5,80005540 +80003ccc: 80003cbc .word 0x80003cbc +80003cd0: 8000f7d3 .word 0x8000f7d3 +80003cd4: 004b8b93 addi x23,x23,4 + + mv x30, x20 # switch data pointer register to avoid conflict with test +80003cd8: 000a0f13 addi x30,x20,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x70b92d4e +80003cdc: 000f2483 lw x9,0(x30) +80003ce0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x5625f07a +80003ce4: 000f2a03 lw x20,0(x30) +80003ce8: 004f0f13 addi x30,x30,4 + +80003cec : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b20: + sha512sig0h x20, x9, x20 # perform operation +80003cec: 5d448a33 sha512sig0h x20,x9,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zknh_sha512sig0h_cg_cmp_rd_rs2_b20, Zknh_sha512sig0h_cg_cmp_rd_rs2_b20_str) +80003cf0: 000ba203 lw x4,0(x23) +80003cf4: 01420863 beq x4,x20,80003d04 +80003cf8: 049012ef jal x5,80005540 +80003cfc: 80003cec .word 0x80003cec +80003d00: 8000f812 .word 0x8000f812 +80003d04: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xa9bf67f9 +80003d08: 000f2e83 lw x29,0(x30) +80003d0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x37da7941 +80003d10: 000f2a83 lw x21,0(x30) +80003d14: 004f0f13 addi x30,x30,4 + +80003d18 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b21: + sha512sig0h x21, x29, x21 # perform operation +80003d18: 5d5e8ab3 sha512sig0h x21,x29,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknh_sha512sig0h_cg_cmp_rd_rs2_b21, Zknh_sha512sig0h_cg_cmp_rd_rs2_b21_str) +80003d1c: 000ba203 lw x4,0(x23) +80003d20: 01520863 beq x4,x21,80003d30 +80003d24: 01d012ef jal x5,80005540 +80003d28: 80003d18 .word 0x80003d18 +80003d2c: 8000f851 .word 0x8000f851 +80003d30: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x759cd36e +80003d34: 000f2703 lw x14,0(x30) +80003d38: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0xdc635086 +80003d3c: 000f2b03 lw x22,0(x30) +80003d40: 004f0f13 addi x30,x30,4 + +80003d44 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b22: + sha512sig0h x22, x14, x22 # perform operation +80003d44: 5d670b33 sha512sig0h x22,x14,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zknh_sha512sig0h_cg_cmp_rd_rs2_b22, Zknh_sha512sig0h_cg_cmp_rd_rs2_b22_str) +80003d48: 000ba203 lw x4,0(x23) +80003d4c: 01620863 beq x4,x22,80003d5c +80003d50: 7f0012ef jal x5,80005540 +80003d54: 80003d44 .word 0x80003d44 +80003d58: 8000f890 .word 0x8000f890 +80003d5c: 004b8b93 addi x23,x23,4 + + mv x1, x23 # switch signature pointer register to avoid conflict with test +80003d60: 000b8093 addi x1,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x047933d4 +80003d64: 000f2583 lw x11,0(x30) +80003d68: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xa58eb6a0 +80003d6c: 000f2b83 lw x23,0(x30) +80003d70: 004f0f13 addi x30,x30,4 + +80003d74 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b23: + sha512sig0h x23, x11, x23 # perform operation +80003d74: 5d758bb3 sha512sig0h x23,x11,x23 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknh_sha512sig0h_cg_cmp_rd_rs2_b23, Zknh_sha512sig0h_cg_cmp_rd_rs2_b23_str) +80003d78: 0000a203 lw x4,0(x1) +80003d7c: 01720863 beq x4,x23,80003d8c +80003d80: 7c0012ef jal x5,80005540 +80003d84: 80003d74 .word 0x80003d74 +80003d88: 8000f8cf .word 0x8000f8cf +80003d8c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x5ff0924c +80003d90: 000f2883 lw x17,0(x30) +80003d94: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x38564306 +80003d98: 000f2c03 lw x24,0(x30) +80003d9c: 004f0f13 addi x30,x30,4 + +80003da0 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b24: + sha512sig0h x24, x17, x24 # perform operation +80003da0: 5d888c33 sha512sig0h x24,x17,x24 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknh_sha512sig0h_cg_cmp_rd_rs2_b24, Zknh_sha512sig0h_cg_cmp_rd_rs2_b24_str) +80003da4: 0000a203 lw x4,0(x1) +80003da8: 01820863 beq x4,x24,80003db8 +80003dac: 794012ef jal x5,80005540 +80003db0: 80003da0 .word 0x80003da0 +80003db4: 8000f90e .word 0x8000f90e +80003db8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0xe79b043d +80003dbc: 000f2403 lw x8,0(x30) +80003dc0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x9266a803 +80003dc4: 000f2c83 lw x25,0(x30) +80003dc8: 004f0f13 addi x30,x30,4 + +80003dcc : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b25: + sha512sig0h x25, x8, x25 # perform operation +80003dcc: 5d940cb3 sha512sig0h x25,x8,x25 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknh_sha512sig0h_cg_cmp_rd_rs2_b25, Zknh_sha512sig0h_cg_cmp_rd_rs2_b25_str) +80003dd0: 0000a203 lw x4,0(x1) +80003dd4: 01920863 beq x4,x25,80003de4 +80003dd8: 768012ef jal x5,80005540 +80003ddc: 80003dcc .word 0x80003dcc +80003de0: 8000f94d .word 0x8000f94d +80003de4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xf1665d98 +80003de8: 000f2603 lw x12,0(x30) +80003dec: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x7171de57 +80003df0: 000f2d03 lw x26,0(x30) +80003df4: 004f0f13 addi x30,x30,4 + +80003df8 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b26: + sha512sig0h x26, x12, x26 # perform operation +80003df8: 5da60d33 sha512sig0h x26,x12,x26 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknh_sha512sig0h_cg_cmp_rd_rs2_b26, Zknh_sha512sig0h_cg_cmp_rd_rs2_b26_str) +80003dfc: 0000a203 lw x4,0(x1) +80003e00: 01a20863 beq x4,x26,80003e10 +80003e04: 73c012ef jal x5,80005540 +80003e08: 80003df8 .word 0x80003df8 +80003e0c: 8000f98c .word 0x8000f98c +80003e10: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x557f9d01 +80003e14: 000f2b03 lw x22,0(x30) +80003e18: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xf21c2e22 +80003e1c: 000f2d83 lw x27,0(x30) +80003e20: 004f0f13 addi x30,x30,4 + +80003e24 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b27: + sha512sig0h x27, x22, x27 # perform operation +80003e24: 5dbb0db3 sha512sig0h x27,x22,x27 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknh_sha512sig0h_cg_cmp_rd_rs2_b27, Zknh_sha512sig0h_cg_cmp_rd_rs2_b27_str) +80003e28: 0000a203 lw x4,0(x1) +80003e2c: 01b20863 beq x4,x27,80003e3c +80003e30: 710012ef jal x5,80005540 +80003e34: 80003e24 .word 0x80003e24 +80003e38: 8000f9cb .word 0x8000f9cb +80003e3c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x3585606a +80003e40: 000f2503 lw x10,0(x30) +80003e44: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xa5efbf65 +80003e48: 000f2e03 lw x28,0(x30) +80003e4c: 004f0f13 addi x30,x30,4 + +80003e50 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b28: + sha512sig0h x28, x10, x28 # perform operation +80003e50: 5dc50e33 sha512sig0h x28,x10,x28 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknh_sha512sig0h_cg_cmp_rd_rs2_b28, Zknh_sha512sig0h_cg_cmp_rd_rs2_b28_str) +80003e54: 0000a203 lw x4,0(x1) +80003e58: 01c20863 beq x4,x28,80003e68 +80003e5c: 6e4012ef jal x5,80005540 +80003e60: 80003e50 .word 0x80003e50 +80003e64: 8000fa0a .word 0x8000fa0a +80003e68: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xaf50a839 +80003e6c: 000f2c83 lw x25,0(x30) +80003e70: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x41847955 +80003e74: 000f2e83 lw x29,0(x30) +80003e78: 004f0f13 addi x30,x30,4 + +80003e7c : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b29: + sha512sig0h x29, x25, x29 # perform operation +80003e7c: 5ddc8eb3 sha512sig0h x29,x25,x29 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknh_sha512sig0h_cg_cmp_rd_rs2_b29, Zknh_sha512sig0h_cg_cmp_rd_rs2_b29_str) +80003e80: 0000a203 lw x4,0(x1) +80003e84: 01d20863 beq x4,x29,80003e94 +80003e88: 6b8012ef jal x5,80005540 +80003e8c: 80003e7c .word 0x80003e7c +80003e90: 8000fa49 .word 0x8000fa49 +80003e94: 00408093 addi x1,x1,4 + + mv x23, x30 # switch data pointer register to avoid conflict with test +80003e98: 000f0b93 addi x23,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x18253657 +80003e9c: 000ba683 lw x13,0(x23) +80003ea0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x6c489169 +80003ea4: 000baf03 lw x30,0(x23) +80003ea8: 004b8b93 addi x23,x23,4 + +80003eac : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b30: + sha512sig0h x30, x13, x30 # perform operation +80003eac: 5de68f33 sha512sig0h x30,x13,x30 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha512sig0h_cg_cmp_rd_rs2_b30, Zknh_sha512sig0h_cg_cmp_rd_rs2_b30_str) +80003eb0: 0000a203 lw x4,0(x1) +80003eb4: 01e20863 beq x4,x30,80003ec4 +80003eb8: 688012ef jal x5,80005540 +80003ebc: 80003eac .word 0x80003eac +80003ec0: 8000fa88 .word 0x8000fa88 +80003ec4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x7981569d +80003ec8: 000bad83 lw x27,0(x23) +80003ecc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x321c65a1 +80003ed0: 000baf83 lw x31,0(x23) +80003ed4: 004b8b93 addi x23,x23,4 + +80003ed8 : +Zknh_sha512sig0h_cg_cmp_rd_rs2_b31: + sha512sig0h x31, x27, x31 # perform operation +80003ed8: 5dfd8fb3 sha512sig0h x31,x27,x31 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknh_sha512sig0h_cg_cmp_rd_rs2_b31, Zknh_sha512sig0h_cg_cmp_rd_rs2_b31_str) +80003edc: 0000a203 lw x4,0(x1) +80003ee0: 01f20863 beq x4,x31,80003ef0 +80003ee4: 65c012ef jal x5,80005540 +80003ee8: 80003ed8 .word 0x80003ed8 +80003eec: 8000fac7 .word 0x8000fac7 +80003ef0: 00408093 addi x1,x1,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x7727573c +80003ef4: 000ba003 lw x0,0(x23) +80003ef8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0xff1797df +80003efc: 000ba003 lw x0,0(x23) +80003f00: 004b8b93 addi x23,x23,4 + +80003f04 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b0: + sha512sig0h x0, x0, x0 # perform operation +80003f04: 5c000033 sha512sig0h x0,x0,x0 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b0_str) +80003f08: 0000a203 lw x4,0(x1) +80003f0c: 00020863 beq x4,x0,80003f1c +80003f10: 630012ef jal x5,80005540 +80003f14: 80003f04 .word 0x80003f04 +80003f18: 8000fb06 .word 0x8000fb06 +80003f1c: 00408093 addi x1,x1,4 + + mv x2, x1 # switch signature pointer register to avoid conflict with test +80003f20: 00008113 addi x2,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x539f46ce +80003f24: 000ba083 lw x1,0(x23) +80003f28: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xb2a35c10 +80003f2c: 000ba083 lw x1,0(x23) +80003f30: 004b8b93 addi x23,x23,4 + +80003f34 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b1: + sha512sig0h x1, x1, x1 # perform operation +80003f34: 5c1080b3 sha512sig0h x1,x1,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b1_str) +80003f38: 00012203 lw x4,0(x2) +80003f3c: 00120863 beq x4,x1,80003f4c +80003f40: 600012ef jal x5,80005540 +80003f44: 80003f34 .word 0x80003f34 +80003f48: 8000fb48 .word 0x8000fb48 +80003f4c: 00410113 addi x2,x2,4 + + mv x25, x2 # switch signature pointer register to avoid conflict with test +80003f50: 00010c93 addi x25,x2,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x7b5ea1d3 +80003f54: 000ba103 lw x2,0(x23) +80003f58: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x7f310d1b +80003f5c: 000ba103 lw x2,0(x23) +80003f60: 004b8b93 addi x23,x23,4 + +80003f64 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b2: + sha512sig0h x2, x2, x2 # perform operation +80003f64: 5c210133 sha512sig0h x2,x2,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b2_str) +80003f68: 000ca203 lw x4,0(x25) +80003f6c: 00220863 beq x4,x2,80003f7c +80003f70: 5d0012ef jal x5,80005540 +80003f74: 80003f64 .word 0x80003f64 +80003f78: 8000fb8a .word 0x8000fb8a +80003f7c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x269b4faf +80003f80: 000ba183 lw x3,0(x23) +80003f84: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x36e4d740 +80003f88: 000ba183 lw x3,0(x23) +80003f8c: 004b8b93 addi x23,x23,4 + +80003f90 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b3: + sha512sig0h x3, x3, x3 # perform operation +80003f90: 5c3181b3 sha512sig0h x3,x3,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b3_str) +80003f94: 000ca203 lw x4,0(x25) +80003f98: 00320863 beq x4,x3,80003fa8 +80003f9c: 5a4012ef jal x5,80005540 +80003fa0: 80003f90 .word 0x80003f90 +80003fa4: 8000fbcc .word 0x8000fbcc +80003fa8: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003fac: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003fb0: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xd03537fe +80003fb4: 000ba203 lw x4,0(x23) +80003fb8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x5ca1acc4 +80003fbc: 000ba203 lw x4,0(x23) +80003fc0: 004b8b93 addi x23,x23,4 + +80003fc4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b4: + sha512sig0h x4, x4, x4 # perform operation +80003fc4: 5c420233 sha512sig0h x4,x4,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b4_str) +80003fc8: 000ca383 lw x7,0(x25) +80003fcc: 00438863 beq x7,x4,80003fdc +80003fd0: 5880146f jal x8,80005558 +80003fd4: 80003fc4 .word 0x80003fc4 +80003fd8: 8000fc0e .word 0x8000fc0e +80003fdc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x60306025 +80003fe0: 000ba283 lw x5,0(x23) +80003fe4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xc847d350 +80003fe8: 000ba283 lw x5,0(x23) +80003fec: 004b8b93 addi x23,x23,4 + +80003ff0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b5: + sha512sig0h x5, x5, x5 # perform operation +80003ff0: 5c5282b3 sha512sig0h x5,x5,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b5_str) +80003ff4: 000ca383 lw x7,0(x25) +80003ff8: 00538863 beq x7,x5,80004008 +80003ffc: 55c0146f jal x8,80005558 +80004000: 80003ff0 .word 0x80003ff0 +80004004: 8000fc50 .word 0x8000fc50 +80004008: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0xab4b0826 +8000400c: 000ba303 lw x6,0(x23) +80004010: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x48190238 +80004014: 000ba303 lw x6,0(x23) +80004018: 004b8b93 addi x23,x23,4 + +8000401c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b6: + sha512sig0h x6, x6, x6 # perform operation +8000401c: 5c630333 sha512sig0h x6,x6,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b6_str) +80004020: 000ca383 lw x7,0(x25) +80004024: 00638863 beq x7,x6,80004034 +80004028: 5300146f jal x8,80005558 +8000402c: 8000401c .word 0x8000401c +80004030: 8000fc92 .word 0x8000fc92 +80004034: 004c8c93 addi x25,x25,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004038: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +8000403c: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x88b6c43f +80004040: 000ba383 lw x7,0(x23) +80004044: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x0488f614 +80004048: 000ba383 lw x7,0(x23) +8000404c: 004b8b93 addi x23,x23,4 + +80004050 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b7: + sha512sig0h x7, x7, x7 # perform operation +80004050: 5c7383b3 sha512sig0h x7,x7,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b7_str) +80004054: 000ca203 lw x4,0(x25) +80004058: 00720863 beq x4,x7,80004068 +8000405c: 4e4012ef jal x5,80005540 +80004060: 80004050 .word 0x80004050 +80004064: 8000fcd4 .word 0x8000fcd4 +80004068: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xa2699d76 +8000406c: 000ba403 lw x8,0(x23) +80004070: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xa60fce63 +80004074: 000ba403 lw x8,0(x23) +80004078: 004b8b93 addi x23,x23,4 + +8000407c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b8: + sha512sig0h x8, x8, x8 # perform operation +8000407c: 5c840433 sha512sig0h x8,x8,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b8_str) +80004080: 000ca203 lw x4,0(x25) +80004084: 00820863 beq x4,x8,80004094 +80004088: 4b8012ef jal x5,80005540 +8000408c: 8000407c .word 0x8000407c +80004090: 8000fd16 .word 0x8000fd16 +80004094: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x95779d97 +80004098: 000ba483 lw x9,0(x23) +8000409c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xff12b0d0 +800040a0: 000ba483 lw x9,0(x23) +800040a4: 004b8b93 addi x23,x23,4 + +800040a8 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b9: + sha512sig0h x9, x9, x9 # perform operation +800040a8: 5c9484b3 sha512sig0h x9,x9,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b9_str) +800040ac: 000ca203 lw x4,0(x25) +800040b0: 00920863 beq x4,x9,800040c0 +800040b4: 48c012ef jal x5,80005540 +800040b8: 800040a8 .word 0x800040a8 +800040bc: 8000fd58 .word 0x8000fd58 +800040c0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x4d9eecfa +800040c4: 000ba503 lw x10,0(x23) +800040c8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x89c99cf7 +800040cc: 000ba503 lw x10,0(x23) +800040d0: 004b8b93 addi x23,x23,4 + +800040d4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b10: + sha512sig0h x10, x10, x10 # perform operation +800040d4: 5ca50533 sha512sig0h x10,x10,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b10_str) +800040d8: 000ca203 lw x4,0(x25) +800040dc: 00a20863 beq x4,x10,800040ec +800040e0: 460012ef jal x5,80005540 +800040e4: 800040d4 .word 0x800040d4 +800040e8: 8000fd9a .word 0x8000fd9a +800040ec: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x1fbda2f0 +800040f0: 000ba583 lw x11,0(x23) +800040f4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x9e299110 +800040f8: 000ba583 lw x11,0(x23) +800040fc: 004b8b93 addi x23,x23,4 + +80004100 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b11: + sha512sig0h x11, x11, x11 # perform operation +80004100: 5cb585b3 sha512sig0h x11,x11,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b11_str) +80004104: 000ca203 lw x4,0(x25) +80004108: 00b20863 beq x4,x11,80004118 +8000410c: 434012ef jal x5,80005540 +80004110: 80004100 .word 0x80004100 +80004114: 8000fddd .word 0x8000fddd +80004118: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xd3d7b0fa +8000411c: 000ba603 lw x12,0(x23) +80004120: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5f899b8e +80004124: 000ba603 lw x12,0(x23) +80004128: 004b8b93 addi x23,x23,4 + +8000412c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b12: + sha512sig0h x12, x12, x12 # perform operation +8000412c: 5cc60633 sha512sig0h x12,x12,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b12_str) +80004130: 000ca203 lw x4,0(x25) +80004134: 00c20863 beq x4,x12,80004144 +80004138: 408012ef jal x5,80005540 +8000413c: 8000412c .word 0x8000412c +80004140: 8000fe20 .word 0x8000fe20 +80004144: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x7c756e38 +80004148: 000ba683 lw x13,0(x23) +8000414c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x1fa54b67 +80004150: 000ba683 lw x13,0(x23) +80004154: 004b8b93 addi x23,x23,4 + +80004158 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b13: + sha512sig0h x13, x13, x13 # perform operation +80004158: 5cd686b3 sha512sig0h x13,x13,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b13_str) +8000415c: 000ca203 lw x4,0(x25) +80004160: 00d20863 beq x4,x13,80004170 +80004164: 3dc012ef jal x5,80005540 +80004168: 80004158 .word 0x80004158 +8000416c: 8000fe63 .word 0x8000fe63 +80004170: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xec726690 +80004174: 000ba703 lw x14,0(x23) +80004178: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x96e41da9 +8000417c: 000ba703 lw x14,0(x23) +80004180: 004b8b93 addi x23,x23,4 + +80004184 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b14: + sha512sig0h x14, x14, x14 # perform operation +80004184: 5ce70733 sha512sig0h x14,x14,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b14_str) +80004188: 000ca203 lw x4,0(x25) +8000418c: 00e20863 beq x4,x14,8000419c +80004190: 3b0012ef jal x5,80005540 +80004194: 80004184 .word 0x80004184 +80004198: 8000fea6 .word 0x8000fea6 +8000419c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xd8905f65 +800041a0: 000ba783 lw x15,0(x23) +800041a4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x096795b0 +800041a8: 000ba783 lw x15,0(x23) +800041ac: 004b8b93 addi x23,x23,4 + +800041b0 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b15: + sha512sig0h x15, x15, x15 # perform operation +800041b0: 5cf787b3 sha512sig0h x15,x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b15_str) +800041b4: 000ca203 lw x4,0(x25) +800041b8: 00f20863 beq x4,x15,800041c8 +800041bc: 384012ef jal x5,80005540 +800041c0: 800041b0 .word 0x800041b0 +800041c4: 8000fee9 .word 0x8000fee9 +800041c8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x666f4826 +800041cc: 000ba803 lw x16,0(x23) +800041d0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xc6926f14 +800041d4: 000ba803 lw x16,0(x23) +800041d8: 004b8b93 addi x23,x23,4 + +800041dc : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b16: + sha512sig0h x16, x16, x16 # perform operation +800041dc: 5d080833 sha512sig0h x16,x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b16_str) +800041e0: 000ca203 lw x4,0(x25) +800041e4: 01020863 beq x4,x16,800041f4 +800041e8: 358012ef jal x5,80005540 +800041ec: 800041dc .word 0x800041dc +800041f0: 8000ff2c .word 0x8000ff2c +800041f4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xfe9d268b +800041f8: 000ba883 lw x17,0(x23) +800041fc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x249a7922 +80004200: 000ba883 lw x17,0(x23) +80004204: 004b8b93 addi x23,x23,4 + +80004208 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b17: + sha512sig0h x17, x17, x17 # perform operation +80004208: 5d1888b3 sha512sig0h x17,x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b17_str) +8000420c: 000ca203 lw x4,0(x25) +80004210: 01120863 beq x4,x17,80004220 +80004214: 32c012ef jal x5,80005540 +80004218: 80004208 .word 0x80004208 +8000421c: 8000ff6f .word 0x8000ff6f +80004220: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x70529b39 +80004224: 000ba903 lw x18,0(x23) +80004228: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x1879d10b +8000422c: 000ba903 lw x18,0(x23) +80004230: 004b8b93 addi x23,x23,4 + +80004234 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b18: + sha512sig0h x18, x18, x18 # perform operation +80004234: 5d290933 sha512sig0h x18,x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b18_str) +80004238: 000ca203 lw x4,0(x25) +8000423c: 01220863 beq x4,x18,8000424c +80004240: 300012ef jal x5,80005540 +80004244: 80004234 .word 0x80004234 +80004248: 8000ffb2 .word 0x8000ffb2 +8000424c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x387c77e2 +80004250: 000ba983 lw x19,0(x23) +80004254: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x77e44095 +80004258: 000ba983 lw x19,0(x23) +8000425c: 004b8b93 addi x23,x23,4 + +80004260 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b19: + sha512sig0h x19, x19, x19 # perform operation +80004260: 5d3989b3 sha512sig0h x19,x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b19_str) +80004264: 000ca203 lw x4,0(x25) +80004268: 01320863 beq x4,x19,80004278 +8000426c: 2d4012ef jal x5,80005540 +80004270: 80004260 .word 0x80004260 +80004274: 8000fff5 .word 0x8000fff5 +80004278: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xbabddf38 +8000427c: 000baa03 lw x20,0(x23) +80004280: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x2bcc36cb +80004284: 000baa03 lw x20,0(x23) +80004288: 004b8b93 addi x23,x23,4 + +8000428c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b20: + sha512sig0h x20, x20, x20 # perform operation +8000428c: 5d4a0a33 sha512sig0h x20,x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b20_str) +80004290: 000ca203 lw x4,0(x25) +80004294: 01420863 beq x4,x20,800042a4 +80004298: 2a8012ef jal x5,80005540 +8000429c: 8000428c .word 0x8000428c +800042a0: 80010038 .word 0x80010038 +800042a4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x206b4613 +800042a8: 000baa83 lw x21,0(x23) +800042ac: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x36dccb62 +800042b0: 000baa83 lw x21,0(x23) +800042b4: 004b8b93 addi x23,x23,4 + +800042b8 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b21: + sha512sig0h x21, x21, x21 # perform operation +800042b8: 5d5a8ab3 sha512sig0h x21,x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b21_str) +800042bc: 000ca203 lw x4,0(x25) +800042c0: 01520863 beq x4,x21,800042d0 +800042c4: 27c012ef jal x5,80005540 +800042c8: 800042b8 .word 0x800042b8 +800042cc: 8001007b .word 0x8001007b +800042d0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x59ac5019 +800042d4: 000bab03 lw x22,0(x23) +800042d8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x74d5cbc1 +800042dc: 000bab03 lw x22,0(x23) +800042e0: 004b8b93 addi x23,x23,4 + +800042e4 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b22: + sha512sig0h x22, x22, x22 # perform operation +800042e4: 5d6b0b33 sha512sig0h x22,x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b22_str) +800042e8: 000ca203 lw x4,0(x25) +800042ec: 01620863 beq x4,x22,800042fc +800042f0: 250012ef jal x5,80005540 +800042f4: 800042e4 .word 0x800042e4 +800042f8: 800100be .word 0x800100be +800042fc: 004c8c93 addi x25,x25,4 + + mv x27, x23 # switch data pointer register to avoid conflict with test +80004300: 000b8d93 addi x27,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xeff5d622 +80004304: 000dab83 lw x23,0(x27) +80004308: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0xe5d6a088 +8000430c: 000dab83 lw x23,0(x27) +80004310: 004d8d93 addi x27,x27,4 + +80004314 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b23: + sha512sig0h x23, x23, x23 # perform operation +80004314: 5d7b8bb3 sha512sig0h x23,x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b23_str) +80004318: 000ca203 lw x4,0(x25) +8000431c: 01720863 beq x4,x23,8000432c +80004320: 220012ef jal x5,80005540 +80004324: 80004314 .word 0x80004314 +80004328: 80010101 .word 0x80010101 +8000432c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xa8fe78c3 +80004330: 000dac03 lw x24,0(x27) +80004334: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0xf214e12d +80004338: 000dac03 lw x24,0(x27) +8000433c: 004d8d93 addi x27,x27,4 + +80004340 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b24: + sha512sig0h x24, x24, x24 # perform operation +80004340: 5d8c0c33 sha512sig0h x24,x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b24_str) +80004344: 000ca203 lw x4,0(x25) +80004348: 01820863 beq x4,x24,80004358 +8000434c: 1f4012ef jal x5,80005540 +80004350: 80004340 .word 0x80004340 +80004354: 80010144 .word 0x80010144 +80004358: 004c8c93 addi x25,x25,4 + + mv x15, x25 # switch signature pointer register to avoid conflict with test +8000435c: 000c8793 addi x15,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xf869161a +80004360: 000dac83 lw x25,0(x27) +80004364: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x1e06f0b2 +80004368: 000dac83 lw x25,0(x27) +8000436c: 004d8d93 addi x27,x27,4 + +80004370 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b25: + sha512sig0h x25, x25, x25 # perform operation +80004370: 5d9c8cb3 sha512sig0h x25,x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b25_str) +80004374: 0007a203 lw x4,0(x15) +80004378: 01920863 beq x4,x25,80004388 +8000437c: 1c4012ef jal x5,80005540 +80004380: 80004370 .word 0x80004370 +80004384: 80010187 .word 0x80010187 +80004388: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xe94d958f +8000438c: 000dad03 lw x26,0(x27) +80004390: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x576a4775 +80004394: 000dad03 lw x26,0(x27) +80004398: 004d8d93 addi x27,x27,4 + +8000439c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b26: + sha512sig0h x26, x26, x26 # perform operation +8000439c: 5dad0d33 sha512sig0h x26,x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b26_str) +800043a0: 0007a203 lw x4,0(x15) +800043a4: 01a20863 beq x4,x26,800043b4 +800043a8: 198012ef jal x5,80005540 +800043ac: 8000439c .word 0x8000439c +800043b0: 800101ca .word 0x800101ca +800043b4: 00478793 addi x15,x15,4 + + mv x18, x27 # switch data pointer register to avoid conflict with test +800043b8: 000d8913 addi x18,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x9a99c48e +800043bc: 00092d83 lw x27,0(x18) +800043c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x535e3b59 +800043c4: 00092d83 lw x27,0(x18) +800043c8: 00490913 addi x18,x18,4 + +800043cc : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b27: + sha512sig0h x27, x27, x27 # perform operation +800043cc: 5dbd8db3 sha512sig0h x27,x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b27_str) +800043d0: 0007a203 lw x4,0(x15) +800043d4: 01b20863 beq x4,x27,800043e4 +800043d8: 168012ef jal x5,80005540 +800043dc: 800043cc .word 0x800043cc +800043e0: 8001020d .word 0x8001020d +800043e4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x3522be63 +800043e8: 00092e03 lw x28,0(x18) +800043ec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xd230920b +800043f0: 00092e03 lw x28,0(x18) +800043f4: 00490913 addi x18,x18,4 + +800043f8 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b28: + sha512sig0h x28, x28, x28 # perform operation +800043f8: 5dce0e33 sha512sig0h x28,x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b28_str) +800043fc: 0007a203 lw x4,0(x15) +80004400: 01c20863 beq x4,x28,80004410 +80004404: 13c012ef jal x5,80005540 +80004408: 800043f8 .word 0x800043f8 +8000440c: 80010250 .word 0x80010250 +80004410: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xb193456e +80004414: 00092e83 lw x29,0(x18) +80004418: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xb9d01066 +8000441c: 00092e83 lw x29,0(x18) +80004420: 00490913 addi x18,x18,4 + +80004424 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b29: + sha512sig0h x29, x29, x29 # perform operation +80004424: 5dde8eb3 sha512sig0h x29,x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b29_str) +80004428: 0007a203 lw x4,0(x15) +8000442c: 01d20863 beq x4,x29,8000443c +80004430: 110012ef jal x5,80005540 +80004434: 80004424 .word 0x80004424 +80004438: 80010293 .word 0x80010293 +8000443c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0xc969ea88 +80004440: 00092f03 lw x30,0(x18) +80004444: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x9ee187c1 +80004448: 00092f03 lw x30,0(x18) +8000444c: 00490913 addi x18,x18,4 + +80004450 : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b30: + sha512sig0h x30, x30, x30 # perform operation +80004450: 5def0f33 sha512sig0h x30,x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b30_str) +80004454: 0007a203 lw x4,0(x15) +80004458: 01e20863 beq x4,x30,80004468 +8000445c: 0e4012ef jal x5,80005540 +80004460: 80004450 .word 0x80004450 +80004464: 800102d6 .word 0x800102d6 +80004468: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x1cb98973 +8000446c: 00092f83 lw x31,0(x18) +80004470: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x0117b26e +80004474: 00092f83 lw x31,0(x18) +80004478: 00490913 addi x18,x18,4 + +8000447c : +Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b31: + sha512sig0h x31, x31, x31 # perform operation +8000447c: 5dff8fb3 sha512sig0h x31,x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sig0h_cg_cmp_rd_rs1_rs2_b31_str) +80004480: 0007a203 lw x4,0(x15) +80004484: 01f20863 beq x4,x31,80004494 +80004488: 0b8012ef jal x5,80005540 +8000448c: 8000447c .word 0x8000447c +80004490: 80010319 .word 0x80010319 +80004494: 00478793 addi x15,x15,4 + + mv x2, x15 # restore signature pointer to default register for teardown +80004498: 00078113 addi x2,x15,0 + +8000449c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000449c: 00000513 addi x10,x0,0 +800044a0: 00000073 ecall +800044a4: fff00513 addi x10,x0,-1 +800044a8: 1d800413 addi x8,x0,472 + +800044ac : +800044ac: 34002373 csrrs x6,mscratch,x0 + +800044b0 : +800044b0: 23832383 lw x7,568(x6) +800044b4: 23c32483 lw x9,572(x6) + +800044b8 : +800044b8: 22032383 lw x7,544(x6) + +800044bc : +800044bc: 25032483 lw x9,592(x6) +800044c0: 34049073 csrrw x0,mscratch,x9 + +800044c4 : +800044c4: 24832483 lw x9,584(x6) +800044c8: 305493f3 csrrw x7,mtvec,x9 +800044cc: ffc4f493 andi x9,x9,-4 +800044d0: ffc3f393 andi x7,x7,-4 +800044d4: 00749e63 bne x9,x7,800044f0 + +800044d8 : +800044d8: 00030493 addi x9,x6,0 + +800044dc : +800044dc: 0004a783 lw x15,0(x9) +800044e0: 00f3a023 sw x15,0(x7) +800044e4: 00438393 addi x7,x7,4 +800044e8: 00448493 addi x9,x9,4 +800044ec: fe83c8e3 blt x7,x8,800044dc +800044f0: 0000100f fence.i + +800044f4 : +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 00000497 auipc x9,0x0 +80004504: 29048493 addi x9,x9,656 # 80004790 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 10e49863 bne x9,x14,80004630 +80004524: 00000013 addi x0,x0,0 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0000c517 auipc x10,0xc +80004544: 4a550513 addi x10,x10,1189 # 800109e5 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0001e097 auipc x1,0x1e +80004564: 004080e7 jalr x1,4(x1) # 80022564 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0000c517 auipc x10,0xc +80004584: 4a550513 addi x10,x10,1189 # 80010a25 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0001e097 auipc x1,0x1e +800045a4: fc4080e7 jalr x1,-60(x1) # 80022564 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0000c517 auipc x10,0xc +800045c4: 4c550513 addi x10,x10,1221 # 80010a85 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0001e097 auipc x1,0x1e +800045e4: f84080e7 jalr x1,-124(x1) # 80022564 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0000d517 auipc x10,0xd +80004604: 03050513 addi x10,x10,48 # 80011630 +80004608: 00000013 addi x0,x0,0 +8000460c: 00000013 addi x0,x0,0 +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 0001e097 auipc x1,0x1e +80004624: f44080e7 jalr x1,-188(x1) # 80022564 +80004628: 0001e097 auipc x1,0x1e +8000462c: f9c080e7 jalr x1,-100(x1) # 800225c4 + +80004630 : +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00004317 auipc x6,0x4 +80004644: ce830313 addi x6,x6,-792 # 80008328 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 00032303 lw x6,0(x6) +80004664: 00000013 addi x0,x0,0 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 0000e397 auipc x7,0xe +80004684: 08838393 addi x7,x7,136 # 80012708 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 40730333 sub x6,x6,x7 +800046a4: 00000013 addi x0,x0,0 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 0000e417 auipc x8,0xe +800046c4: 04040413 addi x8,x8,64 # 80012700 +800046c8: 00000013 addi x0,x0,0 +800046cc: 00000013 addi x0,x0,0 +800046d0: 00000013 addi x0,x0,0 +800046d4: 00000013 addi x0,x0,0 +800046d8: 00000013 addi x0,x0,0 +800046dc: 00000013 addi x0,x0,0 +800046e0: 00042203 lw x4,0(x8) +800046e4: 00620863 beq x4,x6,800046f4 +800046e8: 6c1003ef jal x7,800055a8 +800046ec: 80004630 .word 0x80004630 +800046f0: 80010bd9 .word 0x80010bd9 + +800046f4 : +800046f4: bad0e4b7 lui x9,0xbad0e +800046f8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046fc: 00e49a63 bne x9,x14,80004710 +80004700: 6a9003ef jal x7,800055a8 +80004704: 800047c4 .word 0x800047c4 +80004708: 80010a47 .word 0x80010a47 +8000470c: 00000341 .word 0x00000341 + +80004710 : +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0000c517 auipc x10,0xc +80004724: 28450513 addi x10,x10,644 # 800109a4 +80004728: 00000013 addi x0,x0,0 +8000472c: 00000013 addi x0,x0,0 +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0001e097 auipc x1,0x1e +80004744: e24080e7 jalr x1,-476(x1) # 80022564 +80004748: 0001e097 auipc x1,0x1e +8000474c: e5c080e7 jalr x1,-420(x1) # 800225a4 + +80004750 : +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0000c517 auipc x10,0xc +80004764: 28550513 addi x10,x10,645 # 800109e5 +80004768: 00000013 addi x0,x0,0 +8000476c: 00000013 addi x0,x0,0 +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 0001e097 auipc x1,0x1e +80004784: de4080e7 jalr x1,-540(x1) # 80022564 +80004788: 0001e097 auipc x1,0x1e +8000478c: e3c080e7 jalr x1,-452(x1) # 800225c4 + +80004790 : +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: 00000717 auipc x14,0x0 +800047a4: ff070713 addi x14,x14,-16 # 80004790 +800047a8: 00000013 addi x0,x0,0 +800047ac: 00000013 addi x0,x0,0 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 +800047c0: cddff06f jal x0,8000449c + +800047c4 : +800047c4: bad0e737 lui x14,0xbad0e +800047c8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047cc: cd1ff06f jal x0,8000449c +800047d0: 00000013 addi x0,x0,0 +800047d4: 00000013 addi x0,x0,0 +800047d8: 00000013 addi x0,x0,0 +800047dc: 00000013 addi x0,x0,0 +800047e0: 00000013 addi x0,x0,0 +800047e4: 00000013 addi x0,x0,0 +800047e8: 00000013 addi x0,x0,0 +800047ec: 00000013 addi x0,x0,0 +800047f0: 00000013 addi x0,x0,0 +800047f4: 00000013 addi x0,x0,0 +800047f8: 00000013 addi x0,x0,0 +800047fc: 00000013 addi x0,x0,0 + +80004800 : +80004800: 0800006f jal x0,80004880 +80004804: 0880006f jal x0,8000488c +80004808: 0900006f jal x0,80004898 +8000480c: 0980006f jal x0,800048a4 +80004810: 0a00006f jal x0,800048b0 +80004814: 0a80006f jal x0,800048bc +80004818: 0b00006f jal x0,800048c8 +8000481c: 0b80006f jal x0,800048d4 +80004820: 0c00006f jal x0,800048e0 +80004824: 0c80006f jal x0,800048ec +80004828: 0d00006f jal x0,800048f8 +8000482c: 0d80006f jal x0,80004904 +80004830: 0e00006f jal x0,80004910 +80004834: 0e80006f jal x0,8000491c +80004838: 0f00006f jal x0,80004928 +8000483c: 0f80006f jal x0,80004934 +80004840: 1000006f jal x0,80004940 +80004844: 1080006f jal x0,8000494c +80004848: 1100006f jal x0,80004958 +8000484c: 1180006f jal x0,80004964 +80004850: 1200006f jal x0,80004970 +80004854: 1280006f jal x0,8000497c +80004858: 1300006f jal x0,80004988 +8000485c: 1380006f jal x0,80004994 +80004860: 1400006f jal x0,800049a0 +80004864: 13c0006f jal x0,800049a0 +80004868: 1380006f jal x0,800049a0 +8000486c: 1340006f jal x0,800049a0 +80004870: 1300006f jal x0,800049a0 +80004874: 12c0006f jal x0,800049a0 +80004878: 1280006f jal x0,800049a0 +8000487c: 1240006f jal x0,800049a0 + +80004880 : +80004880: 34011173 csrrw x2,mscratch,x2 +80004884: 26f12823 sw x15,624(x2) +80004888: 13c007ef jal x15,800049c4 +8000488c: 34011173 csrrw x2,mscratch,x2 +80004890: 26f12823 sw x15,624(x2) +80004894: 130007ef jal x15,800049c4 +80004898: 34011173 csrrw x2,mscratch,x2 +8000489c: 26f12823 sw x15,624(x2) +800048a0: 124007ef jal x15,800049c4 +800048a4: 34011173 csrrw x2,mscratch,x2 +800048a8: 26f12823 sw x15,624(x2) +800048ac: 118007ef jal x15,800049c4 +800048b0: 34011173 csrrw x2,mscratch,x2 +800048b4: 26f12823 sw x15,624(x2) +800048b8: 10c007ef jal x15,800049c4 +800048bc: 34011173 csrrw x2,mscratch,x2 +800048c0: 26f12823 sw x15,624(x2) +800048c4: 100007ef jal x15,800049c4 +800048c8: 34011173 csrrw x2,mscratch,x2 +800048cc: 26f12823 sw x15,624(x2) +800048d0: 0f4007ef jal x15,800049c4 +800048d4: 34011173 csrrw x2,mscratch,x2 +800048d8: 26f12823 sw x15,624(x2) +800048dc: 0e8007ef jal x15,800049c4 +800048e0: 34011173 csrrw x2,mscratch,x2 +800048e4: 26f12823 sw x15,624(x2) +800048e8: 0dc007ef jal x15,800049c4 +800048ec: 34011173 csrrw x2,mscratch,x2 +800048f0: 26f12823 sw x15,624(x2) +800048f4: 0d0007ef jal x15,800049c4 +800048f8: 34011173 csrrw x2,mscratch,x2 +800048fc: 26f12823 sw x15,624(x2) +80004900: 0c4007ef jal x15,800049c4 +80004904: 34011173 csrrw x2,mscratch,x2 +80004908: 26f12823 sw x15,624(x2) +8000490c: 0b8007ef jal x15,800049c4 +80004910: 34011173 csrrw x2,mscratch,x2 +80004914: 26f12823 sw x15,624(x2) +80004918: 0ac007ef jal x15,800049c4 +8000491c: 34011173 csrrw x2,mscratch,x2 +80004920: 26f12823 sw x15,624(x2) +80004924: 0a0007ef jal x15,800049c4 +80004928: 34011173 csrrw x2,mscratch,x2 +8000492c: 26f12823 sw x15,624(x2) +80004930: 094007ef jal x15,800049c4 +80004934: 34011173 csrrw x2,mscratch,x2 +80004938: 26f12823 sw x15,624(x2) +8000493c: 088007ef jal x15,800049c4 +80004940: 34011173 csrrw x2,mscratch,x2 +80004944: 26f12823 sw x15,624(x2) +80004948: 07c007ef jal x15,800049c4 +8000494c: 34011173 csrrw x2,mscratch,x2 +80004950: 26f12823 sw x15,624(x2) +80004954: 070007ef jal x15,800049c4 +80004958: 34011173 csrrw x2,mscratch,x2 +8000495c: 26f12823 sw x15,624(x2) +80004960: 064007ef jal x15,800049c4 +80004964: 34011173 csrrw x2,mscratch,x2 +80004968: 26f12823 sw x15,624(x2) +8000496c: 058007ef jal x15,800049c4 +80004970: 34011173 csrrw x2,mscratch,x2 +80004974: 26f12823 sw x15,624(x2) +80004978: 04c007ef jal x15,800049c4 +8000497c: 34011173 csrrw x2,mscratch,x2 +80004980: 26f12823 sw x15,624(x2) +80004984: 040007ef jal x15,800049c4 +80004988: 34011173 csrrw x2,mscratch,x2 +8000498c: 26f12823 sw x15,624(x2) +80004990: 034007ef jal x15,800049c4 +80004994: 34011173 csrrw x2,mscratch,x2 +80004998: 26f12823 sw x15,624(x2) +8000499c: 028007ef jal x15,800049c4 + +800049a0 : +800049a0: 00000317 auipc x6,0x0 +800049a4: b5430313 addi x6,x6,-1196 # 800044f4 +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00030067 jalr x0,0(x6) + +800049c4 : +800049c4: 26e12623 sw x14,620(x2) +800049c8: 34011773 csrrw x14,mscratch,x2 +800049cc: 26e12a23 sw x14,628(x2) +800049d0: 23012703 lw x14,560(x2) +800049d4: 00070067 jalr x0,0(x14) + +800049d8 : +800049d8: 26912423 sw x9,616(x2) +800049dc: 26812223 sw x8,612(x2) +800049e0: 26712023 sw x7,608(x2) +800049e4: 24612e23 sw x6,604(x2) +800049e8: 00000013 addi x0,x0,0 +800049ec: 00000013 addi x0,x0,0 +800049f0: 00000013 addi x0,x0,0 +800049f4: 00000013 addi x0,x0,0 +800049f8: 00000013 addi x0,x0,0 +800049fc: 00000013 addi x0,x0,0 +80004a00: 00003317 auipc x6,0x3 +80004a04: 70830313 addi x6,x6,1800 # 80008108 +80004a08: 00000013 addi x0,x0,0 +80004a0c: 00000013 addi x0,x0,0 +80004a10: 00000013 addi x0,x0,0 +80004a14: 00000013 addi x0,x0,0 +80004a18: 00000013 addi x0,x0,0 +80004a1c: 00000013 addi x0,x0,0 +80004a20: 00032383 lw x7,0(x6) +80004a24: 00138393 addi x7,x7,1 +80004a28: 00732023 sw x7,0(x6) +80004a2c: 34202773 csrrs x14,mcause,x0 + +80004a30 : +80004a30: 800014b7 lui x9,0x80001 +80004a34: fff48493 addi x9,x9,-1 # 80000fff +80004a38: 00e4f4b3 and x9,x9,x14 + +80004a3c : +80004a3c: ffe48413 addi x8,x9,-2 +80004a40: 00041663 bne x8,x0,80004a4c + +80004a44 : +80004a44: 280506e3 beq x10,x0,800054d0 +80004a48: 58c0006f jal x0,80004fd4 + +80004a4c : +80004a4c: ff848413 addi x8,x9,-8 +80004a50: 00245413 srli x8,x8,0x2 +80004a54: 58041063 bne x8,x0,80004fd4 + +80004a58 : +80004a58: 26050ce3 beq x10,x0,800054d0 + +80004a5c : +80004a5c: fff50493 addi x9,x10,-1 +80004a60: 00500393 addi x7,x0,5 +80004a64: 0274e063 bltu x9,x7,80004a84 +80004a68: 07300393 addi x7,x0,115 +80004a6c: 00750463 beq x10,x7,80004a74 +80004a70: 0800006f jal x0,80004af0 + +80004a74 : +80004a74: 34102573 csrrs x10,mepc,x0 +80004a78: 00450413 addi x8,x10,4 +80004a7c: 34141073 csrrw x0,mepc,x8 +80004a80: 7c00006f jal x0,80005240 + +80004a84 : +80004a84: 341024f3 csrrs x9,mepc,x0 +80004a88: 00448493 addi x9,x9,4 +80004a8c: 34149073 csrrw x0,mepc,x9 +80004a90: 00100393 addi x7,x0,1 +80004a94: 00750e63 beq x10,x7,80004ab0 +80004a98: 00200393 addi x7,x0,2 +80004a9c: 02750263 beq x10,x7,80004ac0 +80004aa0: 00300393 addi x7,x0,3 +80004aa4: 02750c63 beq x10,x7,80004adc +80004aa8: fff00513 addi x10,x0,-1 +80004aac: 7940006f jal x0,80005240 + +80004ab0 : +80004ab0: 000024b7 lui x9,0x2 +80004ab4: 80048493 addi x9,x9,-2048 # 1800 +80004ab8: 3004a073 csrrs x0,mstatus,x9 +80004abc: 7840006f jal x0,80005240 + +80004ac0 : +80004ac0: 000024b7 lui x9,0x2 +80004ac4: 80048493 addi x9,x9,-2048 # 1800 +80004ac8: 3004b073 csrrc x0,mstatus,x9 +80004acc: 000014b7 lui x9,0x1 +80004ad0: 80048493 addi x9,x9,-2048 # 800 +80004ad4: 3004a073 csrrs x0,mstatus,x9 +80004ad8: 7680006f jal x0,80005240 + +80004adc : +80004adc: 000024b7 lui x9,0x2 +80004ae0: 80048493 addi x9,x9,-2048 # 1800 +80004ae4: 3004b073 csrrc x0,mstatus,x9 +80004ae8: 7580006f jal x0,80005240 + +80004aec : +80004aec: 00000013 addi x0,x0,0 + +80004af0 : +80004af0: 00000013 addi x0,x0,0 +80004af4: 00000013 addi x0,x0,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000397 auipc x7,0x0 +80004b04: 17038393 addi x7,x7,368 # 80004c70 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 + +80004b20 : +80004b20: 0003a403 lw x8,0(x7) +80004b24: 00a40863 beq x8,x10,80004b34 +80004b28: 04040863 beq x8,x0,80004b78 +80004b2c: 00838393 addi x7,x7,8 +80004b30: ff1ff06f jal x0,80004b20 + +80004b34 : +80004b34: 00008493 addi x9,x1,0 +80004b38: 00000013 addi x0,x0,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 00000097 auipc x1,0x0 +80004b44: 02408093 addi x1,x1,36 # 80004b64 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 00038067 jalr x0,0(x7) + +80004b64 : +80004b64: 00048093 addi x1,x9,0 +80004b68: 34102473 csrrs x8,mepc,x0 +80004b6c: 00440413 addi x8,x8,4 +80004b70: 34141073 csrrw x0,mepc,x8 +80004b74: 6cc0006f jal x0,80005240 + +80004b78 : +80004b78: 00050493 addi x9,x10,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000d517 auipc x10,0xd +80004b84: 4e750513 addi x10,x10,1255 # 80012067 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00048513 addi x10,x9,0 +80004bac: 02000593 addi x11,x0,32 +80004bb0: 4a8020ef jal x1,80007058 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: 90850513 addi x10,x10,-1784 # 800104c8 +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: eee50513 addi x10,x10,-274 # 80010aee +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 00000013 addi x0,x0,0 +80004c2c: 00000013 addi x0,x0,0 +80004c30: 00000013 addi x0,x0,0 +80004c34: 00000013 addi x0,x0,0 +80004c38: 00000013 addi x0,x0,0 +80004c3c: 00000013 addi x0,x0,0 +80004c40: 0000c517 auipc x10,0xc +80004c44: da550513 addi x10,x10,-603 # 800109e5 +80004c48: 00000013 addi x0,x0,0 +80004c4c: 00000013 addi x0,x0,0 +80004c50: 00000013 addi x0,x0,0 +80004c54: 00000013 addi x0,x0,0 +80004c58: 00000013 addi x0,x0,0 +80004c5c: 00000013 addi x0,x0,0 +80004c60: 0001e097 auipc x1,0x1e +80004c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80004c68: 0001e097 auipc x1,0x1e +80004c6c: 95c080e7 jalr x1,-1700(x1) # 800225c4 + +80004c70 : +80004c70: 30002573 .word 0x30002573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30059073 .word 0x30059073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3005a073 .word 0x3005a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3005b073 .word 0x3005b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30402573 .word 0x30402573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30459073 .word 0x30459073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 3045a073 .word 0x3045a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 3045b073 .word 0x3045b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 30602573 .word 0x30602573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 30659073 .word 0x30659073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3065a073 .word 0x3065a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3065b073 .word 0x3065b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 30a02573 .word 0x30a02573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 30a59073 .word 0x30a59073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 30a5a073 .word 0x30a5a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 30a5b073 .word 0x30a5b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 34402573 .word 0x34402573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 34459073 .word 0x34459073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3445a073 .word 0x3445a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3445b073 .word 0x3445b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: 74702573 .word 0x74702573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: 74759073 .word 0x74759073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: 7475a073 .word 0x7475a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: 7475b073 .word 0x7475b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: 32002573 .word 0x32002573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: 32059073 .word 0x32059073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: 3205a073 .word 0x3205a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: 3205b073 .word 0x3205b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: b0002573 .word 0xb0002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: b0059073 .word 0xb0059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: b005a073 .word 0xb005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: b005b073 .word 0xb005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: b0202573 .word 0xb0202573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: b0259073 .word 0xb0259073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: b025a073 .word 0xb025a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: b025b073 .word 0xb025b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10002573 .word 0x10002573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10059073 .word 0x10059073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1005a073 .word 0x1005a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1005b073 .word 0x1005b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10402573 .word 0x10402573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10459073 .word 0x10459073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 1045a073 .word 0x1045a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 1045b073 .word 0x1045b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 10602573 .word 0x10602573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 10659073 .word 0x10659073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1065a073 .word 0x1065a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1065b073 .word 0x1065b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 10a02573 .word 0x10a02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 10a59073 .word 0x10a59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 10a5a073 .word 0x10a5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 10a5b073 .word 0x10a5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 14402573 .word 0x14402573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 14459073 .word 0x14459073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1445a073 .word 0x1445a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1445b073 .word 0x1445b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 14d02573 .word 0x14d02573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 14d59073 .word 0x14d59073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 14d5a073 .word 0x14d5a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 14d5b073 .word 0x14d5b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 18002573 .word 0x18002573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 18059073 .word 0x18059073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 1805a073 .word 0x1805a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 1805b073 .word 0x1805b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a002573 .word 0x7a002573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a059073 .word 0x7a059073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a05a073 .word 0x7a05a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a05b073 .word 0x7a05b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a102573 .word 0x7a102573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a159073 .word 0x7a159073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a15a073 .word 0x7a15a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a15b073 .word 0x7a15b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a202573 .word 0x7a202573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a259073 .word 0x7a259073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a25a073 .word 0x7a25a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a25b073 .word 0x7a25b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a302573 .word 0x7a302573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a359073 .word 0x7a359073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a35a073 .word 0x7a35a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a35b073 .word 0x7a35b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a402573 .word 0x7a402573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a459073 .word 0x7a459073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a45a073 .word 0x7a45a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a45b073 .word 0x7a45b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7a502573 .word 0x7a502573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7a559073 .word 0x7a559073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7a55a073 .word 0x7a55a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7a55b073 .word 0x7a55b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 7a802573 .word 0x7a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 7a859073 .word 0x7a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 7a85a073 .word 0x7a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 7a85b073 .word 0x7a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 7aa02573 .word 0x7aa02573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 7aa59073 .word 0x7aa59073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 7aa5a073 .word 0x7aa5a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 7aa5b073 .word 0x7aa5b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 5a802573 .word 0x5a802573 +80004f74: 00008067 jalr x0,0(x1) +80004f78: 5a859073 .word 0x5a859073 +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 5a85a073 .word 0x5a85a073 +80004f84: 00008067 jalr x0,0(x1) +80004f88: 5a85b073 .word 0x5a85b073 +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 6a802573 .word 0x6a802573 +80004f94: 00008067 jalr x0,0(x1) +80004f98: 6a859073 .word 0x6a859073 +80004f9c: 00008067 jalr x0,0(x1) +80004fa0: 6a85a073 .word 0x6a85a073 +80004fa4: 00008067 jalr x0,0(x1) +80004fa8: 6a85b073 .word 0x6a85b073 +80004fac: 00008067 jalr x0,0(x1) +80004fb0: 0005a503 lw x10,0(x11) +80004fb4: 00008067 jalr x0,0(x1) +80004fb8: 0045a503 lw x10,4(x11) +80004fbc: 00008067 jalr x0,0(x1) +80004fc0: 00c5a023 sw x12,0(x11) +80004fc4: 00008067 jalr x0,0(x1) +80004fc8: 00c5a223 sw x12,4(x11) +80004fcc: 00008067 jalr x0,0(x1) +80004fd0: 00000000 .word 0x00000000 + +80004fd4 : +80004fd4: 01000393 addi x7,x0,16 +80004fd8: 00075c63 bge x14,x0,80004ff0 + +80004fdc : +80004fdc: 00171413 slli x8,x14,0x1 +80004fe0: ff240413 addi x8,x8,-14 +80004fe4: 00045663 bge x8,x0,80004ff0 +80004fe8: 00c00393 addi x7,x0,12 +80004fec: 0040006f jal x0,80004ff0 + +80004ff0 : +80004ff0: d6810113 addi x2,x2,-664 +80004ff4: 4b012303 lw x6,1200(x2) +80004ff8: 007304b3 add x9,x6,x7 +80004ffc: 4a912823 sw x9,1200(x2) +80005000: 49012403 lw x8,1168(x2) +80005004: 40830333 sub x6,x6,x8 +80005008: 29810113 addi x2,x2,664 +8000500c: 1f812403 lw x8,504(x2) +80005010: 00830333 add x6,x6,x8 +80005014: 34102473 csrrs x8,mepc,x0 +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0000b497 auipc x9,0xb +80005024: 48848493 addi x9,x9,1160 # 800104a8 +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 0084a023 sw x8,0(x9) +80005044: 00e4a423 sw x14,8(x9) +80005048: 34302473 csrrs x8,mtval,x0 +8000504c: 0084a823 sw x8,16(x9) +80005050: 30002473 csrrs x8,mstatus,x0 +80005054: 0084ac23 sw x8,24(x9) +80005058: 00000013 addi x0,x0,0 +8000505c: 00000013 addi x0,x0,0 +80005060: 0001c417 auipc x8,0x1c +80005064: 10c40413 addi x8,x8,268 # 8002116c +80005068: 00000013 addi x0,x0,0 +8000506c: 00000013 addi x0,x0,0 +80005070: 00000013 addi x0,x0,0 +80005074: 00000013 addi x0,x0,0 +80005078: 00000013 addi x0,x0,0 +8000507c: 00000013 addi x0,x0,0 +80005080: 007304b3 add x9,x6,x7 +80005084: f0946663 bltu x8,x9,80004790 + +80005088 : +80005088: 24012403 lw x8,576(x2) +8000508c: 408787b3 sub x15,x15,x8 +80005090: 00179493 slli x9,x15,0x1 +80005094: 009787b3 add x15,x15,x9 +80005098: 0057d793 srli x15,x15,0x5 +8000509c: 00679793 slli x15,x15,0x6 +800050a0: 0077e7b3 or x15,x15,x7 +800050a4: 00378793 addi x15,x15,3 +800050a8: 02075a63 bge x14,x0,800050dc +800050ac: 00f00413 addi x8,x0,15 +800050b0: 00877433 and x8,x14,x8 +800050b4: 304024f3 csrrs x9,mie,x0 +800050b8: 0084d4b3 srl x9,x9,x8 +800050bc: 0014f493 andi x9,x9,1 +800050c0: 00b49493 slli x9,x9,0xb +800050c4: 0097e7b3 or x15,x15,x9 +800050c8: 344024f3 csrrs x9,mip,x0 +800050cc: 0084d4b3 srl x9,x9,x8 +800050d0: 0014f493 andi x9,x9,1 +800050d4: 00c49493 slli x9,x9,0xc +800050d8: 0097e7b3 or x15,x15,x9 +800050dc: 300023f3 csrrs x7,mstatus,x0 +800050e0: 00f39393 slli x7,x7,0xf +800050e4: 0023d393 srli x7,x7,0x2 +800050e8: 0021a437 lui x8,0x21a +800050ec: fe540413 addi x8,x8,-27 # 219fe5 +800050f0: fff44413 xori x8,x8,-1 +800050f4: 0083f433 and x8,x7,x8 +800050f8: 0087e433 or x8,x15,x8 +800050fc: 310024f3 csrrs x9,0x310,x0 +80005100: 1c04f493 andi x9,x9,448 +80005104: 00849493 slli x9,x9,0x8 +80005108: 00946433 or x8,x8,x9 +8000510c: 00032483 lw x9,0(x6) +80005110: 00848e63 beq x9,x8,8000512c +80005114: 00040313 addi x6,x8,0 +80005118: 00048213 addi x4,x9,0 +8000511c: 48c003ef jal x7,800055a8 +80005120: 80005088 .word 0x80005088 +80005124: 80010bf0 .word 0x80010bf0 +80005128: 00000341 .word 0x00000341 + +8000512c : +8000512c: 00070413 addi x8,x14,0 +80005130: 00432483 lw x9,4(x6) +80005134: 00848e63 beq x9,x8,80005150 +80005138: 00040313 addi x6,x8,0 +8000513c: 00048213 addi x4,x9,0 +80005140: 468003ef jal x7,800055a8 +80005144: 8000512c .word 0x8000512c +80005148: 80010cf2 .word 0x80010cf2 +8000514c: 00000341 .word 0x00000341 +80005150: 10074863 blt x14,x0,80005260 + +80005154 : +80005154: 34102473 csrrs x8,mepc,x0 +80005158: 00010493 addi x9,x2,0 +8000515c: 0040006f jal x0,80005160 + +80005160 : +80005160: 08000393 addi x7,x0,128 +80005164: 04740863 beq x8,x7,800051b4 +80005168: 00238393 addi x7,x7,2 +8000516c: 04740463 beq x8,x7,800051b4 +80005170: 04040263 beq x8,x0,800051b4 +80005174: 2084a383 lw x7,520(x9) +80005178: 2104a783 lw x15,528(x9) +8000517c: 007787b3 add x15,x15,x7 +80005180: 00f47463 bgeu x8,x15,80005188 +80005184: 02747663 bgeu x8,x7,800051b0 + +80005188 : +80005188: 1d84a383 lw x7,472(x9) +8000518c: 1e04a783 lw x15,480(x9) +80005190: 007787b3 add x15,x15,x7 +80005194: 00f47463 bgeu x8,x15,8000519c +80005198: 00747c63 bgeu x8,x7,800051b0 + +8000519c : +8000519c: 1e84a383 lw x7,488(x9) +800051a0: 1f04a783 lw x15,496(x9) +800051a4: 007787b3 add x15,x15,x7 +800051a8: e0f47e63 bgeu x8,x15,800047c4 +800051ac: e0746c63 bltu x8,x7,800047c4 + +800051b0 : +800051b0: 40740433 sub x8,x8,x7 + +800051b4 : +800051b4: 00832483 lw x9,8(x6) +800051b8: 00848e63 beq x9,x8,800051d4 +800051bc: 00040313 addi x6,x8,0 +800051c0: 00048213 addi x4,x9,0 +800051c4: 3e4003ef jal x7,800055a8 +800051c8: 800051b4 .word 0x800051b4 +800051cc: 80010ded .word 0x80010ded +800051d0: 00000341 .word 0x00000341 + +800051d4 : +800051d4: 34102473 csrrs x8,mepc,x0 +800051d8: 342023f3 csrrs x7,mcause,x0 +800051dc: 00c00793 addi x15,x0,12 +800051e0: 00f38a63 beq x7,x15,800051f4 +800051e4: 00100793 addi x15,x0,1 +800051e8: 00f38663 beq x7,x15,800051f4 +800051ec: 01400793 addi x15,x0,20 +800051f0: 00f39663 bne x7,x15,800051fc +800051f4: 34109073 csrrw x0,mepc,x1 +800051f8: 0100006f jal x0,80005208 + +800051fc : +800051fc: 00400393 addi x7,x0,4 +80005200: 00740433 add x8,x8,x7 +80005204: 34141073 csrrw x0,mepc,x8 + +80005208 : +80005208: 34302473 csrrs x8,mtval,x0 + +8000520c : +8000520c: 00c32483 lw x9,12(x6) +80005210: 00848e63 beq x9,x8,8000522c +80005214: 00040313 addi x6,x8,0 +80005218: 00048213 addi x4,x9,0 +8000521c: 38c003ef jal x7,800055a8 +80005220: 8000520c .word 0x8000520c +80005224: 80010ee0 .word 0x80010ee0 +80005228: 00000341 .word 0x00000341 + +8000522c : +8000522c: 30102473 csrrs x8,misa,x0 +80005230: 01841413 slli x8,x8,0x18 +80005234: 00045263 bge x8,x0,80005238 + +80005238 : +80005238: 10000393 addi x7,x0,256 +8000523c: 05c0006f jal x0,80005298 + +80005240 : +80005240: 25c12303 lw x6,604(x2) +80005244: 26012383 lw x7,608(x2) +80005248: 26412403 lw x8,612(x2) +8000524c: 26812483 lw x9,616(x2) +80005250: 26c12703 lw x14,620(x2) +80005254: 27012783 lw x15,624(x2) +80005258: 27412103 lw x2,628(x2) +8000525c: 30200073 mret + +80005260 : +80005260: 00100413 addi x8,x0,1 +80005264: 01f77393 andi x7,x14,31 +80005268: 00741433 sll x8,x8,x7 +8000526c: 304434f3 csrrc x9,mie,x8 +80005270: 34443473 csrrc x8,mip,x8 + +80005274 : +80005274: 00832483 lw x9,8(x6) +80005278: 00848e63 beq x9,x8,80005294 +8000527c: 00040313 addi x6,x8,0 +80005280: 00048213 addi x4,x9,0 +80005284: 324003ef jal x7,800055a8 +80005288: 80005274 .word 0x80005274 +8000528c: 80011053 .word 0x80011053 +80005290: 00000341 .word 0x00000341 +80005294: 00000393 addi x7,x0,0 + +80005298 : +80005298: 00000417 auipc x8,0x0 +8000529c: 03c40413 addi x8,x8,60 # 800052d4 +800052a0: 00740433 add x8,x8,x7 +800052a4: 00371393 slli x7,x14,0x3 +800052a8: 00740433 add x8,x8,x7 +800052ac: ff847413 andi x8,x8,-8 +800052b0: 00042403 lw x8,0(x8) + +800052b4 : +800052b4: 00040a63 beq x8,x0,800052c8 +800052b8: 01f41393 slli x7,x8,0x1f +800052bc: 0003d863 bge x7,x0,800052cc +800052c0: 00145413 srli x8,x8,0x1 +800052c4: f6870ee3 beq x14,x8,80005240 +800052c8: cfcff06f jal x0,800047c4 + +800052cc : +800052cc: 00040067 jalr x0,0(x8) + +800052d0 : + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022000 .word 0x80022000 + ... +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 80022014 .word 0x80022014 + ... +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 80022030 .word 0x80022030 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 +8000534c: 00000000 .word 0x00000000 +80005350: 00000001 .word 0x00000001 +80005354: 00000000 .word 0x00000000 +80005358: 00000001 .word 0x00000001 +8000535c: 00000000 .word 0x00000000 +80005360: 00000001 .word 0x00000001 +80005364: 00000000 .word 0x00000000 +80005368: 00000001 .word 0x00000001 +8000536c: 00000000 .word 0x00000000 +80005370: 00000001 .word 0x00000001 +80005374: 00000000 .word 0x00000000 +80005378: 00000001 .word 0x00000001 +8000537c: 00000000 .word 0x00000000 +80005380: 00000001 .word 0x00000001 +80005384: 00000000 .word 0x00000000 +80005388: 00000001 .word 0x00000001 + ... + +800053d0 : +800053d0: 00000001 .word 0x00000001 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000003 .word 0x00000003 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000005 .word 0x00000005 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000007 .word 0x00000007 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000009 .word 0x00000009 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000000b .word 0x0000000b +800053fc: 00000000 .word 0x00000000 +80005400: 0000000d .word 0x0000000d +80005404: 00000000 .word 0x00000000 +80005408: 0000000f .word 0x0000000f +8000540c: 00000000 .word 0x00000000 +80005410: 00000011 .word 0x00000011 +80005414: 00000000 .word 0x00000000 +80005418: 00000013 .word 0x00000013 +8000541c: 00000000 .word 0x00000000 +80005420: 00000015 .word 0x00000015 +80005424: 00000000 .word 0x00000000 +80005428: 00000017 .word 0x00000017 +8000542c: 00000000 .word 0x00000000 +80005430: 00000019 .word 0x00000019 +80005434: 00000000 .word 0x00000000 +80005438: 0000001b .word 0x0000001b +8000543c: 00000000 .word 0x00000000 +80005440: 0000001d .word 0x0000001d +80005444: 00000000 .word 0x00000000 +80005448: 0000001f .word 0x0000001f +8000544c: 00000000 .word 0x00000000 +80005450: 00000021 .word 0x00000021 +80005454: 00000000 .word 0x00000000 +80005458: 00000023 .word 0x00000023 +8000545c: 00000000 .word 0x00000000 +80005460: 00000025 .word 0x00000025 +80005464: 00000000 .word 0x00000000 +80005468: 00000027 .word 0x00000027 +8000546c: 00000000 .word 0x00000000 +80005470: 00000029 .word 0x00000029 +80005474: 00000000 .word 0x00000000 +80005478: 0000002b .word 0x0000002b +8000547c: 00000000 .word 0x00000000 +80005480: 0000002d .word 0x0000002d +80005484: 00000000 .word 0x00000000 +80005488: 0000002f .word 0x0000002f + ... + +800054d0 : +800054d0: 300023f3 csrrs x7,mstatus,x0 +800054d4: 00b3d493 srli x9,x7,0xb +800054d8: 0034f493 andi x9,x9,3 +800054dc: ffd48413 addi x8,x9,-3 +800054e0: 341023f3 csrrs x7,mepc,x0 +800054e4: 00000493 addi x9,x0,0 +800054e8: 02040c63 beq x8,x0,80005520 +800054ec: 29810113 addi x2,x2,664 +800054f0: 310023f3 csrrs x7,0x310,x0 +800054f4: 01839393 slli x7,x7,0x18 +800054f8: 0003da63 bge x7,x0,8000550c + +800054fc : +800054fc: 29810113 addi x2,x2,664 +80005500: 47012783 lw x15,1136(x2) +80005504: d6810113 addi x2,x2,-664 +80005508: 0080006f jal x0,80005510 + +8000550c : +8000550c: f4012783 lw x15,-192(x2) +80005510: 341023f3 csrrs x7,mepc,x0 +80005514: 40f383b3 sub x7,x7,x15 +80005518: d6810113 addi x2,x2,-664 +8000551c: 1d812483 lw x9,472(x2) + +80005520 : +80005520: 007483b3 add x7,x9,x7 +80005524: 25c12303 lw x6,604(x2) +80005528: 26412403 lw x8,612(x2) +8000552c: 26812483 lw x9,616(x2) +80005530: 26c12703 lw x14,620(x2) +80005534: 27012783 lw x15,624(x2) +80005538: 27412103 lw x2,628(x2) +8000553c: 00438067 jalr x0,4(x7) + +80005540 : +80005540: 0000b217 auipc x4,0xb +80005544: e2020213 addi x4,x4,-480 # 80010360 +80005548: 02522423 sw x5,40(x4) # 28 +8000554c: 00122423 sw x1,8(x4) # 8 +80005550: 00022023 sw x0,0(x4) # 0 +80005554: 0880006f jal x0,800055dc + +80005558 : +80005558: 0000b397 auipc x7,0xb +8000555c: e0838393 addi x7,x7,-504 # 80010360 +80005560: 0483a023 sw x8,64(x7) +80005564: 0243a023 sw x4,32(x7) +80005568: 0253a423 sw x5,40(x7) +8000556c: 0013a423 sw x1,8(x7) +80005570: 0003a023 sw x0,0(x7) +80005574: 00038213 addi x4,x7,0 +80005578: 00040293 addi x5,x8,0 +8000557c: 0600006f jal x0,800055dc + +80005580 : +80005580: 0000b697 auipc x13,0xb +80005584: de068693 addi x13,x13,-544 # 80010360 +80005588: 06e6a823 sw x14,112(x13) +8000558c: 0246a023 sw x4,32(x13) +80005590: 0256a423 sw x5,40(x13) +80005594: 0016a423 sw x1,8(x13) +80005598: 0006a023 sw x0,0(x13) +8000559c: 00068213 addi x4,x13,0 +800055a0: 00070293 addi x5,x14,0 +800055a4: 0380006f jal x0,800055dc + +800055a8 : +800055a8: 0000b497 auipc x9,0xb +800055ac: db848493 addi x9,x9,-584 # 80010360 +800055b0: 0674a423 sw x7,104(x9) +800055b4: 0244a023 sw x4,32(x9) +800055b8: 0254a423 sw x5,40(x9) +800055bc: 0014a423 sw x1,8(x9) +800055c0: 00300093 addi x1,x0,3 +800055c4: 0014a023 sw x1,0(x9) +800055c8: 1064a823 sw x6,272(x9) +800055cc: 1044ac23 sw x4,280(x9) +800055d0: 00048213 addi x4,x9,0 +800055d4: 00038293 addi x5,x7,0 +800055d8: 0040006f jal x0,800055dc + +800055dc : +800055dc: 00222823 sw x2,16(x4) # 10 +800055e0: 00322c23 sw x3,24(x4) # 18 +800055e4: 02622823 sw x6,48(x4) # 30 +800055e8: 02722c23 sw x7,56(x4) # 38 +800055ec: 04822023 sw x8,64(x4) # 40 +800055f0: 04922423 sw x9,72(x4) # 48 +800055f4: 04a22823 sw x10,80(x4) # 50 +800055f8: 04b22c23 sw x11,88(x4) # 58 +800055fc: 06c22023 sw x12,96(x4) # 60 +80005600: 06d22423 sw x13,104(x4) # 68 +80005604: 06e22823 sw x14,112(x4) # 70 +80005608: 06f22c23 sw x15,120(x4) # 78 +8000560c: 09022023 sw x16,128(x4) # 80 +80005610: 09122423 sw x17,136(x4) # 88 +80005614: 09222823 sw x18,144(x4) # 90 +80005618: 09322c23 sw x19,152(x4) # 98 +8000561c: 0b422023 sw x20,160(x4) # a0 +80005620: 0b522423 sw x21,168(x4) # a8 +80005624: 0b622823 sw x22,176(x4) # b0 +80005628: 0b722c23 sw x23,184(x4) # b8 +8000562c: 0d822023 sw x24,192(x4) # c0 +80005630: 0d922423 sw x25,200(x4) # c8 +80005634: 0da22823 sw x26,208(x4) # d0 +80005638: 0db22c23 sw x27,216(x4) # d8 +8000563c: 0fc22023 sw x28,224(x4) # e0 +80005640: 0fd22423 sw x29,232(x4) # e8 +80005644: 0fe22823 sw x30,240(x4) # f0 +80005648: 0ff22c23 sw x31,248(x4) # f8 + +8000564c : +8000564c: 0000b497 auipc x9,0xb +80005650: d144a483 lw x9,-748(x9) # 80010360 +80005654: 00300513 addi x10,x0,3 +80005658: 18a48a63 beq x9,x10,800057ec + +8000565c : +8000565c: ffa2d303 lhu x6,-6(x5) +80005660: ff82d383 lhu x7,-8(x5) +80005664: 01031313 slli x6,x6,0x10 +80005668: 00736333 or x6,x6,x7 +8000566c: 00f35393 srli x7,x6,0xf +80005670: 01f3f393 andi x7,x7,31 +80005674: 01435413 srli x8,x6,0x14 +80005678: 01f47413 andi x8,x8,31 +8000567c: 10822223 sw x8,260(x4) # 104 +80005680: 00341313 slli x6,x8,0x3 +80005684: 00620333 add x6,x4,x6 +80005688: 00032303 lw x6,0(x6) +8000568c: 10622823 sw x6,272(x4) # 110 +80005690: ff62d303 lhu x6,-10(x5) +80005694: ff42d383 lhu x7,-12(x5) +80005698: 01031313 slli x6,x6,0x10 +8000569c: 00736333 or x6,x6,x7 +800056a0: 00030513 addi x10,x6,0 +800056a4: 07f37413 andi x8,x6,127 +800056a8: 00300493 addi x9,x0,3 +800056ac: 0c941463 bne x8,x9,80005774 +800056b0: 00c35413 srli x8,x6,0xc +800056b4: 00747413 andi x8,x8,7 +800056b8: 00200493 addi x9,x0,2 +800056bc: 0a941c63 bne x8,x9,80005774 +800056c0: 41435393 srai x7,x6,0x14 +800056c4: 00f35313 srli x6,x6,0xf +800056c8: 01f37313 andi x6,x6,31 +800056cc: 00331313 slli x6,x6,0x3 +800056d0: 00620333 add x6,x4,x6 +800056d4: 00032303 lw x6,0(x6) +800056d8: 00730333 add x6,x6,x7 +800056dc: 00337413 andi x8,x6,3 +800056e0: 0c041663 bne x8,x0,800057ac +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0000d417 auipc x8,0xd +80005704: 9b040413 addi x8,x8,-1616 # 800120b0 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: 08836663 bltu x6,x8,800057ac +80005724: 00000013 addi x0,x0,0 +80005728: 00000013 addi x0,x0,0 +8000572c: 00000013 addi x0,x0,0 +80005730: 00000013 addi x0,x0,0 +80005734: 00000013 addi x0,x0,0 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0001c417 auipc x8,0x1c +80005744: a3040413 addi x8,x8,-1488 # 80021170 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: ffc40413 addi x8,x8,-4 +80005764: 04646463 bltu x8,x6,800057ac +80005768: 00032303 lw x6,0(x6) +8000576c: 10622c23 sw x6,280(x4) # 118 +80005770: 3700006f jal x0,80005ae0 + +80005774 : +80005774: 00100413 addi x8,x0,1 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10a22c23 sw x10,280(x4) # 118 +800057a8: 3380006f jal x0,80005ae0 + +800057ac : +800057ac: 00200413 addi x8,x0,2 +800057b0: 00000013 addi x0,x0,0 +800057b4: 00000013 addi x0,x0,0 +800057b8: 00000013 addi x0,x0,0 +800057bc: 00000013 addi x0,x0,0 +800057c0: 0000b497 auipc x9,0xb +800057c4: cc848493 addi x9,x9,-824 # 80010488 +800057c8: 00000013 addi x0,x0,0 +800057cc: 00000013 addi x0,x0,0 +800057d0: 00000013 addi x0,x0,0 +800057d4: 00000013 addi x0,x0,0 +800057d8: 00000013 addi x0,x0,0 +800057dc: 00000013 addi x0,x0,0 +800057e0: 0084a023 sw x8,0(x9) +800057e4: 10622c23 sw x6,280(x4) # 118 +800057e8: 2f80006f jal x0,80005ae0 + +800057ec : +800057ec: 0042a303 lw x6,4(x5) +800057f0: 0000b817 auipc x16,0xb +800057f4: ca880813 addi x16,x16,-856 # 80010498 +800057f8: 00682023 sw x6,0(x16) +800057fc: 0002a303 lw x6,0(x5) +80005800: 10622423 sw x6,264(x4) # 108 +80005804: 0000b817 auipc x16,0xb +80005808: c9480813 addi x16,x16,-876 # 80010498 +8000580c: 00082303 lw x6,0(x16) +80005810: 0000b397 auipc x7,0xb +80005814: 3c938393 addi x7,x7,969 # 80010bd9 +80005818: 28730463 beq x6,x7,80005aa0 +8000581c: 00000413 addi x8,x0,0 +80005820: 0000b817 auipc x16,0xb +80005824: c7080813 addi x16,x16,-912 # 80010490 +80005828: 00882023 sw x8,0(x16) +8000582c: 0000b397 auipc x7,0xb +80005830: 3c438393 addi x7,x7,964 # 80010bf0 +80005834: 00731863 bne x6,x7,80005844 +80005838: 00100413 addi x8,x0,1 +8000583c: 00000493 addi x9,x0,0 +80005840: 2740006f jal x0,80005ab4 +80005844: 0000b397 auipc x7,0xb +80005848: 4ae38393 addi x7,x7,1198 # 80010cf2 +8000584c: 00731863 bne x6,x7,8000585c +80005850: 00200413 addi x8,x0,2 +80005854: 00000493 addi x9,x0,0 +80005858: 25c0006f jal x0,80005ab4 +8000585c: 0000b397 auipc x7,0xb +80005860: 59138393 addi x7,x7,1425 # 80010ded +80005864: 00731863 bne x6,x7,80005874 +80005868: 00300413 addi x8,x0,3 +8000586c: 00000493 addi x9,x0,0 +80005870: 2440006f jal x0,80005ab4 +80005874: 0000b397 auipc x7,0xb +80005878: 66c38393 addi x7,x7,1644 # 80010ee0 +8000587c: 00731863 bne x6,x7,8000588c +80005880: 00400413 addi x8,x0,4 +80005884: 00000493 addi x9,x0,0 +80005888: 22c0006f jal x0,80005ab4 +8000588c: 0000b397 auipc x7,0xb +80005890: 7c738393 addi x7,x7,1991 # 80011053 +80005894: 00731863 bne x6,x7,800058a4 +80005898: 00500413 addi x8,x0,5 +8000589c: 00000493 addi x9,x0,0 +800058a0: 2140006f jal x0,80005ab4 +800058a4: 0000b397 auipc x7,0xb +800058a8: 73338393 addi x7,x7,1843 # 80010fd7 +800058ac: 00731863 bne x6,x7,800058bc +800058b0: 00600413 addi x8,x0,6 +800058b4: 00000493 addi x9,x0,0 +800058b8: 1fc0006f jal x0,80005ab4 +800058bc: 0000b397 auipc x7,0xb +800058c0: 75938393 addi x7,x7,1881 # 80011015 +800058c4: 00731863 bne x6,x7,800058d4 +800058c8: 00700413 addi x8,x0,7 +800058cc: 00000493 addi x9,x0,0 +800058d0: 1e40006f jal x0,80005ab4 +800058d4: 0000b397 auipc x7,0xb +800058d8: 35c38393 addi x7,x7,860 # 80010c30 +800058dc: 00731863 bne x6,x7,800058ec +800058e0: 00100413 addi x8,x0,1 +800058e4: 00100493 addi x9,x0,1 +800058e8: 1cc0006f jal x0,80005ab4 +800058ec: 0000b397 auipc x7,0xb +800058f0: 44438393 addi x7,x7,1092 # 80010d30 +800058f4: 00731863 bne x6,x7,80005904 +800058f8: 00200413 addi x8,x0,2 +800058fc: 00100493 addi x9,x0,1 +80005900: 1b40006f jal x0,80005ab4 +80005904: 0000b397 auipc x7,0xb +80005908: 52538393 addi x7,x7,1317 # 80010e29 +8000590c: 00731863 bne x6,x7,8000591c +80005910: 00300413 addi x8,x0,3 +80005914: 00100493 addi x9,x0,1 +80005918: 19c0006f jal x0,80005ab4 +8000591c: 0000b397 auipc x7,0xb +80005920: 60138393 addi x7,x7,1537 # 80010f1d +80005924: 00731863 bne x6,x7,80005934 +80005928: 00400413 addi x8,x0,4 +8000592c: 00100493 addi x9,x0,1 +80005930: 1840006f jal x0,80005ab4 +80005934: 0000b397 auipc x7,0xb +80005938: 75a38393 addi x7,x7,1882 # 8001108e +8000593c: 00731863 bne x6,x7,8000594c +80005940: 00500413 addi x8,x0,5 +80005944: 00100493 addi x9,x0,1 +80005948: 16c0006f jal x0,80005ab4 +8000594c: 0000b397 auipc x7,0xb +80005950: 32438393 addi x7,x7,804 # 80010c70 +80005954: 00731863 bne x6,x7,80005964 +80005958: 00100413 addi x8,x0,1 +8000595c: 00200493 addi x9,x0,2 +80005960: 1540006f jal x0,80005ab4 +80005964: 0000b397 auipc x7,0xb +80005968: 40a38393 addi x7,x7,1034 # 80010d6e +8000596c: 00731863 bne x6,x7,8000597c +80005970: 00200413 addi x8,x0,2 +80005974: 00200493 addi x9,x0,2 +80005978: 13c0006f jal x0,80005ab4 +8000597c: 0000b397 auipc x7,0xb +80005980: 4e938393 addi x7,x7,1257 # 80010e65 +80005984: 00731863 bne x6,x7,80005994 +80005988: 00300413 addi x8,x0,3 +8000598c: 00200493 addi x9,x0,2 +80005990: 1240006f jal x0,80005ab4 +80005994: 0000b397 auipc x7,0xb +80005998: 5c638393 addi x7,x7,1478 # 80010f5a +8000599c: 00731863 bne x6,x7,800059ac +800059a0: 00400413 addi x8,x0,4 +800059a4: 00200493 addi x9,x0,2 +800059a8: 10c0006f jal x0,80005ab4 +800059ac: 0000b397 auipc x7,0xb +800059b0: 71d38393 addi x7,x7,1821 # 800110c9 +800059b4: 00731863 bne x6,x7,800059c4 +800059b8: 00500413 addi x8,x0,5 +800059bc: 00200493 addi x9,x0,2 +800059c0: 0f40006f jal x0,80005ab4 +800059c4: 0000b397 auipc x7,0xb +800059c8: 2ed38393 addi x7,x7,749 # 80010cb1 +800059cc: 00731863 bne x6,x7,800059dc +800059d0: 00100413 addi x8,x0,1 +800059d4: 00300493 addi x9,x0,3 +800059d8: 0dc0006f jal x0,80005ab4 +800059dc: 0000b397 auipc x7,0xb +800059e0: 3d138393 addi x7,x7,977 # 80010dad +800059e4: 00731863 bne x6,x7,800059f4 +800059e8: 00200413 addi x8,x0,2 +800059ec: 00300493 addi x9,x0,3 +800059f0: 0c40006f jal x0,80005ab4 +800059f4: 0000b397 auipc x7,0xb +800059f8: 4ae38393 addi x7,x7,1198 # 80010ea2 +800059fc: 00731863 bne x6,x7,80005a0c +80005a00: 00300413 addi x8,x0,3 +80005a04: 00300493 addi x9,x0,3 +80005a08: 0ac0006f jal x0,80005ab4 +80005a0c: 0000b397 auipc x7,0xb +80005a10: 58c38393 addi x7,x7,1420 # 80010f98 +80005a14: 00731863 bne x6,x7,80005a24 +80005a18: 00400413 addi x8,x0,4 +80005a1c: 00300493 addi x9,x0,3 +80005a20: 0940006f jal x0,80005ab4 +80005a24: 0000b397 auipc x7,0xb +80005a28: 6e138393 addi x7,x7,1761 # 80011105 +80005a2c: 00731863 bne x6,x7,80005a3c +80005a30: 00500413 addi x8,x0,5 +80005a34: 00300493 addi x9,x0,3 +80005a38: 07c0006f jal x0,80005ab4 +80005a3c: 0000b397 auipc x7,0xb +80005a40: 70638393 addi x7,x7,1798 # 80011142 +80005a44: 00731863 bne x6,x7,80005a54 +80005a48: 00800413 addi x8,x0,8 +80005a4c: 00000493 addi x9,x0,0 +80005a50: 0640006f jal x0,80005ab4 +80005a54: 0000b397 auipc x7,0xb +80005a58: 73d38393 addi x7,x7,1853 # 80011191 +80005a5c: 00731863 bne x6,x7,80005a6c +80005a60: 00800413 addi x8,x0,8 +80005a64: 00000493 addi x9,x0,0 +80005a68: 04c0006f jal x0,80005ab4 +80005a6c: 0000c397 auipc x7,0xc +80005a70: 82038393 addi x7,x7,-2016 # 8001128c +80005a74: 00731863 bne x6,x7,80005a84 +80005a78: 00800413 addi x8,x0,8 +80005a7c: 00100493 addi x9,x0,1 +80005a80: 0340006f jal x0,80005ab4 +80005a84: 0000c397 auipc x7,0xc +80005a88: 90438393 addi x7,x7,-1788 # 80011388 +80005a8c: 00731863 bne x6,x7,80005a9c +80005a90: 00800413 addi x8,x0,8 +80005a94: 00200493 addi x9,x0,2 +80005a98: 01c0006f jal x0,80005ab4 +80005a9c: 0340006f jal x0,80005ad0 + +80005aa0 : +80005aa0: 00900413 addi x8,x0,9 +80005aa4: 0000b817 auipc x16,0xb +80005aa8: 9ec80813 addi x16,x16,-1556 # 80010490 +80005aac: 00882023 sw x8,0(x16) +80005ab0: 0300006f jal x0,80005ae0 + +80005ab4 : +80005ab4: 0000b817 auipc x16,0xb +80005ab8: 9dc80813 addi x16,x16,-1572 # 80010490 +80005abc: 00882023 sw x8,0(x16) +80005ac0: 0000b817 auipc x16,0xb +80005ac4: 9d480813 addi x16,x16,-1580 # 80010494 +80005ac8: 00982023 sw x9,0(x16) +80005acc: 0140006f jal x0,80005ae0 + +80005ad0 : +80005ad0: 0000b817 auipc x16,0xb +80005ad4: 9c080813 addi x16,x16,-1600 # 80010490 +80005ad8: 00082023 sw x0,0(x16) +80005adc: 0040006f jal x0,80005ae0 + +80005ae0 : +80005ae0: 0002a303 lw x6,0(x5) +80005ae4: 10622423 sw x6,264(x4) # 108 +80005ae8: 00035383 lhu x7,0(x6) +80005aec: 0033f413 andi x8,x7,3 +80005af0: 00300493 addi x9,x0,3 +80005af4: 00941863 bne x8,x9,80005b04 +80005af8: 00235403 lhu x8,2(x6) +80005afc: 01041413 slli x8,x8,0x10 +80005b00: 0083e3b3 or x7,x7,x8 +80005b04: 10722023 sw x7,256(x4) # 100 +80005b08: 0042a303 lw x6,4(x5) +80005b0c: 12622023 sw x6,288(x4) # 120 + +80005b10 : +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: ec550513 addi x10,x10,-315 # 800109e5 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: ec550513 addi x10,x10,-315 # 80010a25 +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 00000013 addi x0,x0,0 +80005b8c: 00000013 addi x0,x0,0 +80005b90: 00000013 addi x0,x0,0 +80005b94: 00000013 addi x0,x0,0 +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f3c50513 addi x10,x10,-196 # 80010adc +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 + +80005bc8 : +80005bc8: 0000b517 auipc x10,0xb +80005bcc: 8b852503 lw x10,-1864(x10) # 80010480 +80005bd0: 0001d097 auipc x1,0x1d +80005bd4: 994080e7 jalr x1,-1644(x1) # 80022564 + +80005bd8 : +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f0e50513 addi x10,x10,-242 # 80010aee +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000a517 auipc x10,0xa +80005c0c: 75852503 lw x10,1880(x10) # 80010360 +80005c10: 00300593 addi x11,x0,3 +80005c14: 52b50c63 beq x10,x11,8000614c +80005c18: 00000013 addi x0,x0,0 +80005c1c: 00000013 addi x0,x0,0 +80005c20: 0000b517 auipc x10,0xb +80005c24: ed050513 addi x10,x10,-304 # 80010af0 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0001d097 auipc x1,0x1d +80005c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80005c48: 0000b517 auipc x10,0xb +80005c4c: 81852503 lw x10,-2024(x10) # 80010460 +80005c50: 02000593 addi x11,x0,32 +80005c54: 00357613 andi x12,x10,3 +80005c58: 00300693 addi x13,x0,3 +80005c5c: 00d60463 beq x12,x13,80005c64 +80005c60: 01000593 addi x11,x0,16 +80005c64: 3f4010ef jal x1,80007058 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: 84850513 addi x10,x10,-1976 # 800104c8 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 00000013 addi x0,x0,0 +80005cac: 00000013 addi x0,x0,0 +80005cb0: 00000013 addi x0,x0,0 +80005cb4: 00000013 addi x0,x0,0 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: e4450513 addi x10,x10,-444 # 80010b04 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 0000a517 auipc x10,0xa +80005cec: 78052503 lw x10,1920(x10) # 80010468 +80005cf0: 02000593 addi x11,x0,32 +80005cf4: 364010ef jal x1,80007058 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000a517 auipc x10,0xa +80005d04: 7c850513 addi x10,x10,1992 # 800104c8 +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 00000013 addi x0,x0,0 +80005d2c: 00000013 addi x0,x0,0 +80005d30: 00000013 addi x0,x0,0 +80005d34: 00000013 addi x0,x0,0 +80005d38: 00000013 addi x0,x0,0 +80005d3c: 00000013 addi x0,x0,0 +80005d40: 0000b517 auipc x10,0xb +80005d44: 7fb50513 addi x10,x10,2043 # 8001153b +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 0001d097 auipc x1,0x1d +80005d64: 804080e7 jalr x1,-2044(x1) # 80022564 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 5f852503 lw x10,1528(x10) # 80010360 +80005d70: 00050663 beq x10,x0,80005d7c +80005d74: 00300593 addi x11,x0,3 +80005d78: 04b51063 bne x10,x11,80005db8 +80005d7c: 07800593 addi x11,x0,120 +80005d80: 0000a617 auipc x12,0xa +80005d84: 74860613 addi x12,x12,1864 # 800104c8 +80005d88: 00000013 addi x0,x0,0 +80005d8c: 00000013 addi x0,x0,0 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 00b60023 sb x11,0(x12) +80005da4: 00160613 addi x12,x12,1 +80005da8: 0000a517 auipc x10,0xa +80005dac: 6bc52503 lw x10,1724(x10) # 80010464 +80005db0: 324010ef jal x1,800070d4 +80005db4: 1180006f jal x0,80005ecc + +80005db8 : +80005db8: 00100593 addi x11,x0,1 +80005dbc: 04b50863 beq x10,x11,80005e0c +80005dc0: 00400593 addi x11,x0,4 +80005dc4: 08b50a63 beq x10,x11,80005e58 +80005dc8: 00500593 addi x11,x0,5 +80005dcc: 0cb50463 beq x10,x11,80005e94 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000c517 auipc x10,0xc +80005de4: 87150513 addi x10,x10,-1935 # 80011651 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 0001c097 auipc x1,0x1c +80005e04: 764080e7 jalr x1,1892(x1) # 80022564 +80005e08: 1000006f jal x0,80005f08 + +80005e0c : +80005e0c: 06600593 addi x11,x0,102 +80005e10: 00000013 addi x0,x0,0 +80005e14: 00000013 addi x0,x0,0 +80005e18: 00000013 addi x0,x0,0 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 284010ef jal x1,800070d4 +80005e54: 0780006f jal x0,80005ecc + +80005e58 : +80005e58: 07600593 addi x11,x0,118 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000a617 auipc x12,0xa +80005e64: 66860613 addi x12,x12,1640 # 800104c8 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 00b60023 sb x11,0(x12) +80005e84: 00160613 addi x12,x12,1 +80005e88: 0000a517 auipc x10,0xa +80005e8c: 5dc52503 lw x10,1500(x10) # 80010464 +80005e90: 244010ef jal x1,800070d4 + +80005e94 : +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000b517 auipc x10,0xb +80005ea4: 69450513 addi x10,x10,1684 # 80011534 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80005ec8: 0400006f jal x0,80005f08 + +80005ecc : +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000a517 auipc x10,0xa +80005ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 + +80005f08 : +80005f08: 00000013 addi x0,x0,0 +80005f0c: 00000013 addi x0,x0,0 +80005f10: 00000013 addi x0,x0,0 +80005f14: 00000013 addi x0,x0,0 +80005f18: 00000013 addi x0,x0,0 +80005f1c: 00000013 addi x0,x0,0 +80005f20: 0000b517 auipc x10,0xb +80005f24: 62c50513 addi x10,x10,1580 # 8001154c +80005f28: 00000013 addi x0,x0,0 +80005f2c: 00000013 addi x0,x0,0 +80005f30: 00000013 addi x0,x0,0 +80005f34: 00000013 addi x0,x0,0 +80005f38: 00000013 addi x0,x0,0 +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0001c097 auipc x1,0x1c +80005f44: 624080e7 jalr x1,1572(x1) # 80022564 +80005f48: 0000a517 auipc x10,0xa +80005f4c: 41852503 lw x10,1048(x10) # 80010360 +80005f50: 00100593 addi x11,x0,1 +80005f54: 00b51c63 bne x10,x11,80005f6c +80005f58: 0000a517 auipc x10,0xa +80005f5c: 51852503 lw x10,1304(x10) # 80010470 +80005f60: 02000593 addi x11,x0,32 +80005f64: 0f4010ef jal x1,80007058 +80005f68: 0140006f jal x0,80005f7c + +80005f6c : +80005f6c: 0000a517 auipc x10,0xa +80005f70: 50452503 lw x10,1284(x10) # 80010470 +80005f74: 02000593 addi x11,x0,32 +80005f78: 0e0010ef jal x1,80007058 + +80005f7c : +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000a517 auipc x10,0xa +80005f84: 54850513 addi x10,x10,1352 # 800104c8 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 4e052503 lw x10,1248(x10) # 80010488 +80005fb0: 08051e63 bne x10,x0,8000604c +80005fb4: 00000013 addi x0,x0,0 +80005fb8: 00000013 addi x0,x0,0 +80005fbc: 00000013 addi x0,x0,0 +80005fc0: 0000b517 auipc x10,0xb +80005fc4: 5a350513 addi x10,x10,1443 # 80011563 +80005fc8: 00000013 addi x0,x0,0 +80005fcc: 00000013 addi x0,x0,0 +80005fd0: 00000013 addi x0,x0,0 +80005fd4: 00000013 addi x0,x0,0 +80005fd8: 00000013 addi x0,x0,0 +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0001c097 auipc x1,0x1c +80005fe4: 584080e7 jalr x1,1412(x1) # 80022564 +80005fe8: 0000a517 auipc x10,0xa +80005fec: 37852503 lw x10,888(x10) # 80010360 +80005ff0: 00100593 addi x11,x0,1 +80005ff4: 00b51c63 bne x10,x11,8000600c +80005ff8: 0000a517 auipc x10,0xa +80005ffc: 48052503 lw x10,1152(x10) # 80010478 +80006000: 02000593 addi x11,x0,32 +80006004: 054010ef jal x1,80007058 +80006008: 0140006f jal x0,8000601c + +8000600c : +8000600c: 0000a517 auipc x10,0xa +80006010: 46c52503 lw x10,1132(x10) # 80010478 +80006014: 02000593 addi x11,x0,32 +80006018: 040010ef jal x1,80007058 + +8000601c : +8000601c: 00000013 addi x0,x0,0 +80006020: 0000a517 auipc x10,0xa +80006024: 4a850513 addi x10,x10,1192 # 800104c8 +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 5bd0006f jal x0,80006e04 + +8000604c : +8000604c: 00100593 addi x11,x0,1 +80006050: 06b51e63 bne x10,x11,800060cc + +80006054 : +80006054: 00000013 addi x0,x0,0 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000b517 auipc x10,0xb +80006064: 51a50513 addi x10,x10,1306 # 8001157a +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 0000a517 auipc x10,0xa +8000608c: 3f052503 lw x10,1008(x10) # 80010478 +80006090: 02000593 addi x11,x0,32 +80006094: 7c5000ef jal x1,80007058 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000a517 auipc x10,0xa +800060a4: 42850513 addi x10,x10,1064 # 800104c8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 53d0006f jal x0,80006e04 + +800060cc : +800060cc: 00000013 addi x0,x0,0 +800060d0: 00000013 addi x0,x0,0 +800060d4: 00000013 addi x0,x0,0 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000b517 auipc x10,0xb +800060e4: 4f850513 addi x10,x10,1272 # 800115d8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 0000a517 auipc x10,0xa +8000610c: 37052503 lw x10,880(x10) # 80010478 +80006110: 02000593 addi x11,x0,32 +80006114: 745000ef jal x1,80007058 +80006118: 00000013 addi x0,x0,0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000a517 auipc x10,0xa +80006124: 3a850513 addi x10,x10,936 # 800104c8 +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 4bd0006f jal x0,80006e04 + +8000614c : +8000614c: 0000a417 auipc x8,0xa +80006150: 34442403 lw x8,836(x8) # 80010490 +80006154: 00900493 addi x9,x0,9 +80006158: 0a940c63 beq x8,x9,80006210 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 51d50513 addi x10,x10,1309 # 8001167d +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 00000013 addi x0,x0,0 +8000618c: 00000013 addi x0,x0,0 +80006190: 00000013 addi x0,x0,0 +80006194: 00000013 addi x0,x0,0 +80006198: 00000013 addi x0,x0,0 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 50950513 addi x10,x10,1289 # 800116a9 +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 0000a817 auipc x16,0xa +800061cc: 2d080813 addi x16,x16,720 # 80010498 +800061d0: 00082503 lw x10,0(x16) +800061d4: 0001c097 auipc x1,0x1c +800061d8: 390080e7 jalr x1,912(x1) # 80022564 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 90e50513 addi x10,x10,-1778 # 80010aee +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 280404e3 beq x8,x0,80006c90 +8000620c: 3400006f jal x0,8000654c + +80006210 : +80006210: 00000013 addi x0,x0,0 +80006214: 00000013 addi x0,x0,0 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000b517 auipc x10,0xb +80006224: 49950513 addi x10,x10,1177 # 800116b9 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 0000a517 auipc x10,0xa +8000624c: 23052503 lw x10,560(x10) # 80010478 +80006250: 02000593 addi x11,x0,32 +80006254: 605000ef jal x1,80007058 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000a517 auipc x10,0xa +80006264: 26850513 addi x10,x10,616 # 800104c8 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 00000013 addi x0,x0,0 +8000628c: 00000013 addi x0,x0,0 +80006290: 00000013 addi x0,x0,0 +80006294: 00000013 addi x0,x0,0 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000b517 auipc x10,0xb +800062a4: 44450513 addi x10,x10,1092 # 800116e4 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a517 auipc x10,0xa +800062cc: 1a852503 lw x10,424(x10) # 80010470 +800062d0: 02000593 addi x11,x0,32 +800062d4: 585000ef jal x1,80007058 +800062d8: 00000013 addi x0,x0,0 +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000a517 auipc x10,0xa +800062e4: 1e850513 addi x10,x10,488 # 800104c8 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 0000a317 auipc x6,0xa +8000630c: 16832303 lw x6,360(x6) # 80010470 +80006310: 0000a397 auipc x7,0xa +80006314: 1683a383 lw x7,360(x7) # 80010478 +80006318: 10736a63 bltu x6,x7,8000642c + +8000631c : +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 3f350513 addi x10,x10,1011 # 80011713 +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 00000013 addi x0,x0,0 +8000634c: 00000013 addi x0,x0,0 +80006350: 00000013 addi x0,x0,0 +80006354: 00000013 addi x0,x0,0 +80006358: 00000013 addi x0,x0,0 +8000635c: 00000013 addi x0,x0,0 +80006360: 0000b517 auipc x10,0xb +80006364: 41b50513 addi x10,x10,1051 # 8001177b +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0001c097 auipc x1,0x1c +80006384: 1e4080e7 jalr x1,484(x1) # 80022564 +80006388: 0000a317 auipc x6,0xa +8000638c: 0e832303 lw x6,232(x6) # 80010470 +80006390: 0000a397 auipc x7,0xa +80006394: 0e83a383 lw x7,232(x7) # 80010478 +80006398: 40730533 sub x10,x6,x7 +8000639c: 02000593 addi x11,x0,32 +800063a0: 4b9000ef jal x1,80007058 +800063a4: 00000013 addi x0,x0,0 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000a517 auipc x10,0xa +800063c4: 10850513 addi x10,x10,264 # 800104c8 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 00000013 addi x0,x0,0 +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 3a250513 addi x10,x10,930 # 800117a2 +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 1dd0006f jal x0,80006e04 + +8000642c : +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 2ff50513 addi x10,x10,767 # 8001173f +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 00000013 addi x0,x0,0 +8000646c: 00000013 addi x0,x0,0 +80006470: 00000013 addi x0,x0,0 +80006474: 00000013 addi x0,x0,0 +80006478: 00000013 addi x0,x0,0 +8000647c: 00000013 addi x0,x0,0 +80006480: 0000b517 auipc x10,0xb +80006484: 2fb50513 addi x10,x10,763 # 8001177b +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0001c097 auipc x1,0x1c +800064a4: 0c4080e7 jalr x1,196(x1) # 80022564 +800064a8: 0000a317 auipc x6,0xa +800064ac: fd032303 lw x6,-48(x6) # 80010478 +800064b0: 0000a397 auipc x7,0xa +800064b4: fc03a383 lw x7,-64(x7) # 80010470 +800064b8: 40730533 sub x10,x6,x7 +800064bc: 02000593 addi x11,x0,32 +800064c0: 399000ef jal x1,80007058 +800064c4: 00000013 addi x0,x0,0 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000a517 auipc x10,0xa +800064e4: fe850513 addi x10,x10,-24 # 800104c8 +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 00000013 addi x0,x0,0 +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 36a50513 addi x10,x10,874 # 8001188a +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0bd0006f jal x0,80006e04 + +8000654c : +8000654c: 00000013 addi x0,x0,0 +80006550: 00000013 addi x0,x0,0 +80006554: 00000013 addi x0,x0,0 +80006558: 00000013 addi x0,x0,0 +8000655c: 00000013 addi x0,x0,0 +80006560: 0000b517 auipc x10,0xb +80006564: 41150513 addi x10,x10,1041 # 80011971 +80006568: 00000013 addi x0,x0,0 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0001c097 auipc x1,0x1c +80006584: fe4080e7 jalr x1,-28(x1) # 80022564 +80006588: 0000a517 auipc x10,0xa +8000658c: f0c52503 lw x10,-244(x10) # 80010494 +80006590: 04050a63 beq x10,x0,800065e4 +80006594: 00100593 addi x11,x0,1 +80006598: 08b50663 beq x10,x11,80006624 +8000659c: 00200593 addi x11,x0,2 +800065a0: 0cb50263 beq x10,x11,80006664 +800065a4: 00300593 addi x11,x0,3 +800065a8: 0eb50e63 beq x10,x11,800066a4 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3ed50513 addi x10,x10,1005 # 800119ad +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 1000006f jal x0,800066e0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 38b50513 addi x10,x10,907 # 8001198b +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0c00006f jal x0,800066e0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35350513 addi x10,x10,851 # 80011993 +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0800006f jal x0,800066e0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 31b50513 addi x10,x10,795 # 8001199b +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 +800066a0: 0400006f jal x0,800066e0 + +800066a4 : +800066a4: 00000013 addi x0,x0,0 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2e450513 addi x10,x10,740 # 800119a4 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 + +800066e0 : +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 00000013 addi x0,x0,0 +800066ec: 00000013 addi x0,x0,0 +800066f0: 00000013 addi x0,x0,0 +800066f4: 00000013 addi x0,x0,0 +800066f8: 00000013 addi x0,x0,0 +800066fc: 00000013 addi x0,x0,0 +80006700: 0000b517 auipc x10,0xb +80006704: 2b650513 addi x10,x10,694 # 800119b6 +80006708: 00000013 addi x0,x0,0 +8000670c: 00000013 addi x0,x0,0 +80006710: 00000013 addi x0,x0,0 +80006714: 00000013 addi x0,x0,0 +80006718: 00000013 addi x0,x0,0 +8000671c: 00000013 addi x0,x0,0 +80006720: 0001c097 auipc x1,0x1c +80006724: e44080e7 jalr x1,-444(x1) # 80022564 +80006728: 0000a517 auipc x10,0xa +8000672c: d6852503 lw x10,-664(x10) # 80010490 +80006730: 00100593 addi x11,x0,1 +80006734: 06b50863 beq x10,x11,800067a4 +80006738: 00200593 addi x11,x0,2 +8000673c: 0ab50463 beq x10,x11,800067e4 +80006740: 00300593 addi x11,x0,3 +80006744: 0eb50063 beq x10,x11,80006824 +80006748: 00400593 addi x11,x0,4 +8000674c: 10b50c63 beq x10,x11,80006864 +80006750: 00500593 addi x11,x0,5 +80006754: 14b50863 beq x10,x11,800068a4 +80006758: 00600593 addi x11,x0,6 +8000675c: 18b50463 beq x10,x11,800068e4 +80006760: 00700593 addi x11,x0,7 +80006764: 1cb50063 beq x10,x11,80006924 +80006768: 00800593 addi x11,x0,8 +8000676c: 1eb50c63 beq x10,x11,80006964 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 38d50513 addi x10,x10,909 # 80011b0d +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 2000006f jal x0,800069a0 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 21050513 addi x10,x10,528 # 800119d0 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1c00006f jal x0,800069a0 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 20150513 addi x10,x10,513 # 80011a01 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1800006f jal x0,800069a0 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1e150513 addi x10,x10,481 # 80011a21 +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1400006f jal x0,800069a0 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1bf50513 addi x10,x10,447 # 80011a3f +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 1000006f jal x0,800069a0 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 19e50513 addi x10,x10,414 # 80011a5e +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0c00006f jal x0,800069a0 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 18650513 addi x10,x10,390 # 80011a86 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0800006f jal x0,800069a0 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 17250513 addi x10,x10,370 # 80011ab2 +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 +80006960: 0400006f jal x0,800069a0 + +80006964 : +80006964: 00000013 addi x0,x0,0 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 15e50513 addi x10,x10,350 # 80011ade +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 + +800069a0 : +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 00000013 addi x0,x0,0 +800069ac: 00000013 addi x0,x0,0 +800069b0: 00000013 addi x0,x0,0 +800069b4: 00000013 addi x0,x0,0 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000b517 auipc x10,0xb +800069c4: 15c50513 addi x10,x10,348 # 80011b1c +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 0000a517 auipc x10,0xa +800069ec: a9052503 lw x10,-1392(x10) # 80010478 +800069f0: 02000593 addi x11,x0,32 +800069f4: 664000ef jal x1,80007058 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000a517 auipc x10,0xa +80006a04: ac850513 addi x10,x10,-1336 # 800104c8 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 00000013 addi x0,x0,0 +80006a2c: 00000013 addi x0,x0,0 +80006a30: 00000013 addi x0,x0,0 +80006a34: 00000013 addi x0,x0,0 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000b517 auipc x10,0xb +80006a44: 0f350513 addi x10,x10,243 # 80011b33 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a0852503 lw x10,-1528(x10) # 80010470 +80006a70: 02000593 addi x11,x0,32 +80006a74: 5e4000ef jal x1,80007058 +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000a517 auipc x10,0xa +80006a84: a4850513 addi x10,x10,-1464 # 800104c8 +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9e852503 lw x10,-1560(x10) # 80010490 +80006ab0: 00200593 addi x11,x0,2 +80006ab4: 08b51463 bne x10,x11,80006b3c +80006ab8: 00000013 addi x0,x0,0 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 08a50513 addi x10,x10,138 # 80011b4a +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 99052503 lw x10,-1648(x10) # 80010478 +80006af0: 284000ef jal x1,80006d74 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 +80006afc: 00000013 addi x0,x0,0 +80006b00: 0000b517 auipc x10,0xb +80006b04: 06150513 addi x10,x10,97 # 80011b61 +80006b08: 00000013 addi x0,x0,0 +80006b0c: 00000013 addi x0,x0,0 +80006b10: 00000013 addi x0,x0,0 +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0001c097 auipc x1,0x1c +80006b24: a44080e7 jalr x1,-1468(x1) # 80022564 +80006b28: 0000a517 auipc x10,0xa +80006b2c: 94852503 lw x10,-1720(x10) # 80010470 +80006b30: 244000ef jal x1,80006d74 +80006b34: 0001c097 auipc x1,0x1c +80006b38: a30080e7 jalr x1,-1488(x1) # 80022564 + +80006b3c : +80006b3c: 00000097 auipc x1,0x0 +80006b40: 314080e7 jalr x1,788(x1) # 80006e50 +80006b44: 0000a517 auipc x10,0xa +80006b48: 94c52503 lw x10,-1716(x10) # 80010490 +80006b4c: 00100593 addi x11,x0,1 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 07750513 addi x10,x10,119 # 80011bd7 +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 27c0006f jal x0,80006e04 +80006b8c: 00200593 addi x11,x0,2 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 10d50513 addi x10,x10,269 # 80011cad +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 23c0006f jal x0,80006e04 +80006bcc: 00300593 addi x11,x0,3 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 1c050513 addi x10,x10,448 # 80011da0 +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1fc0006f jal x0,80006e04 +80006c0c: 00400593 addi x11,x0,4 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 27b50513 addi x10,x10,635 # 80011e9b +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 1bc0006f jal x0,80006e04 +80006c4c: 00500593 addi x11,x0,5 +80006c50: 02b51e63 bne x10,x11,80006c8c +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: 32250513 addi x10,x10,802 # 80011f82 +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 17c0006f jal x0,80006e04 +80006c8c: 1780006f jal x0,80006e04 + +80006c90 : +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000b517 auipc x10,0xb +80006ca4: eef50513 addi x10,x10,-273 # 80011b8f +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00009617 auipc x12,0x9 +80006ccc: 7e062603 lw x12,2016(x12) # 800104a8 +80006cd0: 00000013 addi x0,x0,0 +80006cd4: 00000013 addi x0,x0,0 +80006cd8: 00000013 addi x0,x0,0 +80006cdc: 00000013 addi x0,x0,0 +80006ce0: 0000a517 auipc x10,0xa +80006ce4: e9850513 addi x10,x10,-360 # 80010b78 +80006ce8: 00000013 addi x0,x0,0 +80006cec: 00000013 addi x0,x0,0 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 0001c097 auipc x1,0x1c +80006d04: 864080e7 jalr x1,-1948(x1) # 80022564 +80006d08: 00065503 lhu x10,0(x12) +80006d0c: 01000593 addi x11,x0,16 +80006d10: 00357413 andi x8,x10,3 +80006d14: 00300493 addi x9,x0,3 +80006d18: 00941a63 bne x8,x9,80006d2c +80006d1c: 00265403 lhu x8,2(x12) +80006d20: 01041413 slli x8,x8,0x10 +80006d24: 00856533 or x10,x10,x8 +80006d28: 02000593 addi x11,x0,32 +80006d2c: 32c000ef jal x1,80007058 +80006d30: 00000013 addi x0,x0,0 +80006d34: 00000013 addi x0,x0,0 +80006d38: 00000013 addi x0,x0,0 +80006d3c: 00000013 addi x0,x0,0 +80006d40: 00009517 auipc x10,0x9 +80006d44: 78850513 addi x10,x10,1928 # 800104c8 +80006d48: 00000013 addi x0,x0,0 +80006d4c: 00000013 addi x0,x0,0 +80006d50: 00000013 addi x0,x0,0 +80006d54: 00000013 addi x0,x0,0 +80006d58: 00000013 addi x0,x0,0 +80006d5c: 00000013 addi x0,x0,0 +80006d60: 0001c097 auipc x1,0x1c +80006d64: 804080e7 jalr x1,-2044(x1) # 80022564 +80006d68: 00000097 auipc x1,0x0 +80006d6c: 0e8080e7 jalr x1,232(x1) # 80006e50 +80006d70: 0940006f jal x0,80006e04 + +80006d74 : +80006d74: 02054263 blt x10,x0,80006d98 + +80006d78 : +80006d78: 01800593 addi x11,x0,24 +80006d7c: 04b55463 bge x10,x11,80006dc4 +80006d80: 00009597 auipc x11,0x9 +80006d84: 77058593 addi x11,x11,1904 # 800104f0 +80006d88: 00251613 slli x12,x10,0x2 +80006d8c: 00c585b3 add x11,x11,x12 +80006d90: 0005a503 lw x10,0(x11) +80006d94: 00008067 jalr x0,0(x1) + +80006d98 : +80006d98: 00100593 addi x11,x0,1 +80006d9c: 01f59593 slli x11,x11,0x1f +80006da0: 00b54533 xor x10,x10,x11 +80006da4: 01000593 addi x11,x0,16 +80006da8: 00b55e63 bge x10,x11,80006dc4 +80006dac: 00009597 auipc x11,0x9 +80006db0: 7a458593 addi x11,x11,1956 # 80010550 +80006db4: 00251613 slli x12,x10,0x2 +80006db8: 00c585b3 add x11,x11,x12 +80006dbc: 0005a503 lw x10,0(x11) +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000a517 auipc x10,0xa +80006de4: bae50513 addi x10,x10,-1106 # 8001098e +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 00008067 jalr x0,0(x1) + +80006e04 : +80006e04: 00000013 addi x0,x0,0 +80006e08: 00000013 addi x0,x0,0 +80006e0c: 00000013 addi x0,x0,0 +80006e10: 00000013 addi x0,x0,0 +80006e14: 00000013 addi x0,x0,0 +80006e18: 00000013 addi x0,x0,0 +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000b517 auipc x10,0xb +80006e24: 81050513 addi x10,x10,-2032 # 80011630 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 + +80006e48 : +80006e48: 0001b097 auipc x1,0x1b +80006e4c: 77c080e7 jalr x1,1916(x1) # 800225c4 + +80006e50 : +80006e50: 00009617 auipc x12,0x9 +80006e54: 65060613 addi x12,x12,1616 # 800104a0 +80006e58: 00162023 sw x1,0(x12) +80006e5c: 00000013 addi x0,x0,0 +80006e60: 0000a517 auipc x10,0xa +80006e64: d3950513 addi x10,x10,-711 # 80010b99 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00009517 auipc x10,0x9 +80006e8c: 62052503 lw x10,1568(x10) # 800104a8 +80006e90: 02000593 addi x11,x0,32 +80006e94: 1c4000ef jal x1,80007058 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 00009517 auipc x10,0x9 +80006ea4: 62850513 addi x10,x10,1576 # 800104c8 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00000013 addi x0,x0,0 +80006ecc: 00000013 addi x0,x0,0 +80006ed0: 00000013 addi x0,x0,0 +80006ed4: 00000013 addi x0,x0,0 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 0000a517 auipc x10,0xa +80006ee4: cc950513 addi x10,x10,-823 # 80010ba9 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00009517 auipc x10,0x9 +80006f0c: 5a852503 lw x10,1448(x10) # 800104b0 +80006f10: 02000593 addi x11,x0,32 +80006f14: 144000ef jal x1,80007058 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 00009517 auipc x10,0x9 +80006f24: 5a850513 addi x10,x10,1448 # 800104c8 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00000013 addi x0,x0,0 +80006f4c: 00000013 addi x0,x0,0 +80006f50: 00000013 addi x0,x0,0 +80006f54: 00000013 addi x0,x0,0 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 0000a517 auipc x10,0xa +80006f64: c5950513 addi x10,x10,-935 # 80010bb9 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00009517 auipc x10,0x9 +80006f8c: 53052503 lw x10,1328(x10) # 800104b8 +80006f90: 02000593 addi x11,x0,32 +80006f94: 0c4000ef jal x1,80007058 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 00009517 auipc x10,0x9 +80006fa4: 52850513 addi x10,x10,1320 # 800104c8 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00000013 addi x0,x0,0 +80006fcc: 00000013 addi x0,x0,0 +80006fd0: 00000013 addi x0,x0,0 +80006fd4: 00000013 addi x0,x0,0 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 0000a517 auipc x10,0xa +80006fe4: be950513 addi x10,x10,-1047 # 80010bc9 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009517 auipc x10,0x9 +8000700c: 4b852503 lw x10,1208(x10) # 800104c0 +80007010: 02000593 addi x11,x0,32 +80007014: 044000ef jal x1,80007058 +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009517 auipc x10,0x9 +80007024: 4a850513 addi x10,x10,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 0001b097 auipc x1,0x1b +80007044: 524080e7 jalr x1,1316(x1) # 80022564 +80007048: 00009617 auipc x12,0x9 +8000704c: 45860613 addi x12,x12,1112 # 800104a0 +80007050: 00062083 lw x1,0(x12) +80007054: 00008067 jalr x0,0(x1) + +80007058 : +80007058: 00000013 addi x0,x0,0 +8000705c: 00000013 addi x0,x0,0 +80007060: 00009617 auipc x12,0x9 +80007064: 46860613 addi x12,x12,1128 # 800104c8 +80007068: 00000013 addi x0,x0,0 +8000706c: 00000013 addi x0,x0,0 +80007070: 00000013 addi x0,x0,0 +80007074: 00000013 addi x0,x0,0 +80007078: 00000013 addi x0,x0,0 +8000707c: 00000013 addi x0,x0,0 +80007080: 03000693 addi x13,x0,48 +80007084: 00d60023 sb x13,0(x12) +80007088: 07800693 addi x13,x0,120 +8000708c: 00d600a3 sb x13,1(x12) +80007090: 00260613 addi x12,x12,2 +80007094: 00058693 addi x13,x11,0 + +80007098 : +80007098: ffc68693 addi x13,x13,-4 +8000709c: 00d55733 srl x14,x10,x13 +800070a0: 00f77713 andi x14,x14,15 +800070a4: 00a00793 addi x15,x0,10 +800070a8: 00f74663 blt x14,x15,800070b4 +800070ac: 05770713 addi x14,x14,87 +800070b0: 0080006f jal x0,800070b8 + +800070b4 : +800070b4: 03070713 addi x14,x14,48 + +800070b8 : +800070b8: 00e60023 sb x14,0(x12) +800070bc: 00160613 addi x12,x12,1 +800070c0: fc069ce3 bne x13,x0,80007098 +800070c4: 00a00693 addi x13,x0,10 +800070c8: 00d60023 sb x13,0(x12) +800070cc: 000600a3 sb x0,1(x12) +800070d0: 00008067 jalr x0,0(x1) + +800070d4 : +800070d4: 00a00693 addi x13,x0,10 +800070d8: 02d54663 blt x10,x13,80007104 +800070dc: ff650513 addi x10,x10,-10 +800070e0: 03100713 addi x14,x0,49 +800070e4: 00d54c63 blt x10,x13,800070fc +800070e8: ff650513 addi x10,x10,-10 +800070ec: 03200713 addi x14,x0,50 +800070f0: 00d54663 blt x10,x13,800070fc +800070f4: ff650513 addi x10,x10,-10 +800070f8: 03300713 addi x14,x0,51 +800070fc: 00e60023 sb x14,0(x12) +80007100: 00160613 addi x12,x12,1 +80007104: 03050513 addi x10,x10,48 +80007108: 00a60023 sb x10,0(x12) +8000710c: 00a00693 addi x13,x0,10 +80007110: 00d600a3 sb x13,1(x12) +80007114: 00060123 sb x0,2(x12) +80007118: 00008067 jalr x0,0(x1) +8000711c: 00000013 addi x0,x0,0 +80007120: 00000013 addi x0,x0,0 +80007124: 00000013 addi x0,x0,0 +80007128: 00000013 addi x0,x0,0 +8000712c: 00000013 addi x0,x0,0 +80007130: 00000013 addi x0,x0,0 +80007134: 00000013 addi x0,x0,0 +80007138: 00000013 addi x0,x0,0 +8000713c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 23838393 addi x7,x7,568 # 80005240 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 21c38393 addi x7,x7,540 # 80005240 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 20438393 addi x7,x7,516 # 80005240 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1f038393 addi x7,x7,496 # 80005240 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1e438393 addi x7,x7,484 # 80005240 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 1b038393 addi x7,x7,432 # 80005240 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 40030313 addi x6,x6,1024 # 8000449c +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 19838393 addi x7,x7,408 # 80005240 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3e830313 addi x6,x6,1000 # 8000449c +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 18038393 addi x7,x7,384 # 80005240 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3d030313 addi x6,x6,976 # 8000449c +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 16838393 addi x7,x7,360 # 80005240 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 26c78793 addi x15,x15,620 # 800044ac +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 06018193 addi x3,x3,96 # 80005540 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sig0l-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sig0l-00.elf.objdump new file mode 100644 index 0000000..19b9f17 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sig0l-00.elf.objdump @@ -0,0 +1,13189 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig0l-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig0l-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000264c 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025cc7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d48 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025d6b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025d80 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025da8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e37 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc4WRAJk.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +800090d0 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b5_str +8000016c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b6_str +80000198 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b7_str +800001c4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b8_str +800001f0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b9_str +8000021c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b10_str +80000248 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b11_str +80000274 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b13 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800092cf l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b22_str +80000460 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b23_str +8000048c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b24_str +800004b8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b3_str +800006a4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b4 +80009801 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b4_str +800006d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b5_str +80000700 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b6_str +80000734 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b7 +800098ac l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b7_str +80000760 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b8_str +8000078c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b9_str +800007b8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b10_str +800007e4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b11_str +80000810 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b12_str +8000083c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b13_str +80000868 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b14_str +80000894 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b15_str +800008c0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b16_str +800008ec l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b17_str +80000918 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b18_str +80000944 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b19_str +80000974 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b21_str +800009d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b22_str +800009fc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b23_str +80000a2c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b24_str +80000a58 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b25_str +80000a84 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b26_str +80000ab0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b27_str +80000adc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b28_str +80000b08 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b29_str +80000b34 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b30_str +80000b60 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_b31_str +80000b8c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b0_str +80000bb8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b1_str +80000be4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b2_str +80000c10 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b3_str +80000c44 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b4 +80009f33 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b4_str +80000c70 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b5_str +80000c9c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b6_str +80000cc8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b7_str +80000cf4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b8_str +80000d20 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b9_str +80000d4c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b10_str +80000d78 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b11_str +80000da4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b12_str +80000dd8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b13_str +80000e04 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b14_str +80000e34 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b15_str +80000e60 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b16_str +80000e8c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b17_str +80000eb8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b18_str +80000ee4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b19_str +80000f10 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b20_str +80000f3c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b21_str +80000f6c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b22_str +80000f98 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b23_str +80000fc4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b24_str +80000ff0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b25_str +80001020 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b26_str +8000104c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b27_str +80001078 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b28_str +800010a4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b29_str +800010d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b30_str +800010fc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sig0l_cg_cp_rd_b31_str +80001128 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x0_str +80001154 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x1_str +80001180 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x2_str +800011ac l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000000_str +800011d8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000001_str +80001204 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x7fffffff_str +80001230 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x7ffffffe_str +8000125c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xffffffff_str +80001288 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xfffffffe_str +800012b4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x5bbc8872_str +800012e0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0xaaaaaaaa_str +8000130c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs1_edges_0x55555555_str +80001338 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x0_str +80001364 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x1_str +80001390 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x2_str +800013bc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000000_str +800013e8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000001_str +80001414 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x7fffffff_str +80001440 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x7ffffffe_str +8000146c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xffffffff_str +80001498 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xfffffffe_str +800014c4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x5bbc8872_str +800014f0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0xaaaaaaaa_str +8000151c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sig0l_cg_cp_rs2_edges_0x55555555_str +80001548 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001574 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015a0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015cc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +800015f8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001624 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001650 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000167c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016a8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016d4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001700 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000172c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001758 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001784 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017b0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017dc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001808 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001834 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001860 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000188c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018b8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018e4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001910 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000193c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001968 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +80001994 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019c0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019ec l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a18 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a44 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a70 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001a9c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ac8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001af4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b20 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b4c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b78 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001ba4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bd0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001bfc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c28 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c54 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c80 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cac l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cd8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d04 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d30 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d5c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d88 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001db4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001de0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e0c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e38 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e64 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e90 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ebc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ee8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f14 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f40 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f6c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001f98 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fc4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ff0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000201c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002048 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002074 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020a0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020cc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +800020f8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002124 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002150 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000217c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021a8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021d4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002200 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000222c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002258 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002284 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022b0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022dc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002308 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002334 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002360 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000238c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023b8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023e4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002410 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000243c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002468 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +80002494 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024c0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024ec l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002518 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002544 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002570 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +8000259c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025c8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025f4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002620 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000264c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002678 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026a4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +800026fc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002728 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002754 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002780 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027ac l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027d8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002804 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002830 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000285c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002888 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028b4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028e0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000290c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002938 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002964 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +80002990 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029bc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029e8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a14 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a40 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a6c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002a98 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ac4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002af0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b1c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b48 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b74 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002ba0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bcc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002bf8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c24 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c50 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c7c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002ca8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cd4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d00 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d2c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d58 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d84 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002db0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002ddc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e08 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b0_str +80002e34 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b1_str +80002e60 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b2_str +80002e8c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b3_str +80002eb8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b4_str +80002ee4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b5_str +80002f10 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b6_str +80002f44 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b7_str +80002f70 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b8_str +80002f9c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b9_str +80002fc8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b10_str +80002ff4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b11_str +80003020 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b12_str +80003054 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b13_str +80003080 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b14_str +800030b0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b15_str +800030dc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b16_str +80003108 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b17_str +80003134 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b18_str +80003164 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b19_str +80003190 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b20_str +800031bc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b21_str +800031e8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b22_str +80003214 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b23_str +80003240 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b24_str +8000326c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b25_str +80003298 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b26_str +800032c4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b27_str +800032f0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b28_str +8000331c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b29_str +80003348 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b30_str +80003374 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rs1_rs2_b31_str +800033a0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b0_str +800033cc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b1_str +800033f8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b2_str +80003428 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b3_str +80003454 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b4_str +80003480 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b5_str +800034ac l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b6_str +800034e0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b7_str +8000350c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b8_str +80003538 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b9_str +80003568 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b10_str +80003594 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b11_str +800035c4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b12_str +800035f0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b13_str +8000361c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b14_str +80003648 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b15_str +80003674 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b16_str +800036a4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b17_str +800036d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b18_str +800036fc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b19_str +80003728 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b20_str +80003758 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b21_str +80003788 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b22_str +800037b4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b23_str +800037e0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b24_str +8000380c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b25_str +80003838 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b26_str +80003864 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b27_str +80003890 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b28_str +800038c0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b29_str +800038ec l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b30_str +80003918 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_b31_str +80003944 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b0_str +80003970 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b1_str +8000399c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b2_str +800039c8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b3_str +800039fc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b4_str +80003a28 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b5_str +80003a54 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b6_str +80003a88 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b7_str +80003ab4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b8_str +80003ae0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b9_str +80003b0c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b10_str +80003b38 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b11_str +80003b64 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b12_str +80003b90 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b13_str +80003bbc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b14_str +80003be8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b15_str +80003c18 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b16_str +80003c44 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b17_str +80003c70 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b18_str +80003ca0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b19_str +80003ccc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b20_str +80003cf8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b21_str +80003d24 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b22_str +80003d50 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b23_str +80003d7c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b24_str +80003da8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b25_str +80003dd4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b26_str +80003e00 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b27_str +80003e2c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b28_str +80003e58 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b29_str +80003e84 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b30_str +80003eb0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs2_b31_str +80003edc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b0_str +80003f08 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b1_str +80003f34 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b2_str +80003f60 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b3_str +80003f94 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b4_str +80003fc0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b5_str +80003fec l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b6_str +80004018 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b7_str +80004044 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b8_str +80004070 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b9_str +800040a0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b10_str +800040d0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b11_str +80004100 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b12_str +80004134 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b13_str +80004160 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b14_str +8000418c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b15_str +800041b8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b16_str +800041e8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b17_str +80004214 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b18_str +80004240 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b19_str +8000426c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b20_str +80004298 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b21_str +800042c4 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b22_str +800042f0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b23_str +8000431c l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b24_str +80004348 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b25_str +80004374 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b26_str +800043a0 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b27_str +800043cc l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b28_str +800043f8 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b29_str +80004424 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b30_str +80004450 l .text.rvtest 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +8000447c l .text.rvtest 00000000 exit_Mcleanup +80004480 l .text.rvtest 00000000 resto_Medeleg +80004488 l .text.rvtest 00000000 resto_Msatp +8000448c l .text.rvtest 00000000 resto_Mscratch +80004494 l .text.rvtest 00000000 resto_Mxtvec +800044a8 l .text.rvtest 00000000 resto_Mtramp +800044ac l .text.rvtest 00000000 resto_Mloop +800044c4 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 sv_Hcause_str +80010e65 l .data 00000000 sv_Hepc_str +80010f5a l .data 00000000 sv_Htval_str +800110c9 l .data 00000000 sv_Hip_str +80010cb1 l .data 00000000 sv_Vvect_str +80010dad l .data 00000000 sv_Vcause_str +80010ea2 l .data 00000000 sv_Vepc_str +80010f98 l .data 00000000 sv_Vtval_str +80011105 l .data 00000000 sv_Vip_str +80011142 l .data 00000000 Mclr_Mext_int_str +80011191 l .data 00000000 Mclr_Sext_int_str +8001128c l .data 00000000 Sclr_Sext_int_str +80011388 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +80010494 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010adc l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +80010480 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80011713 l .data 00000000 trap_diag_extra_traps_str +8001177b l .data 00000000 trap_diag_diff_bytes_str +800117a2 l .data 00000000 trap_diag_extra_next_step_str +8001173f l .data 00000000 trap_diag_missing_traps_str +8001188a l .data 00000000 trap_diag_missing_next_step_str +80011971 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +800119ad l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +8001198b l .data 00000000 trap_diag_mode_m_str +80011993 l .data 00000000 trap_diag_mode_s_str +8001199b l .data 00000000 trap_diag_mode_hs_str +800119a4 l .data 00000000 trap_diag_mode_vs_str +800119b6 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +80011b4a l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80011b61 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80011bd7 l .data 00000000 trap_diag_hint_vect_str +80011cad l .data 00000000 trap_diag_hint_cause_str +80011da0 l .data 00000000 trap_diag_hint_epc_str +80011e9b l .data 00000000 trap_diag_hint_tval_str +80011f82 l .data 00000000 trap_diag_hint_ip_str +80011b8f l .data 00000000 trap_diag_generic_str +80010b78 l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +800104f0 l .data 00000000 trap_excpt_name_tbl +80010550 l .data 00000000 trap_int_name_tbl +8001098e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +800104a0 l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 +80010617 l .data 00000000 trap_excpt_name_6 +80010635 l .data 00000000 trap_excpt_name_7 +8001064d l .data 00000000 trap_excpt_name_8 +8001066b l .data 00000000 trap_excpt_name_9 +80010689 l .data 00000000 trap_excpt_name_10 +800106a8 l .data 00000000 trap_excpt_name_11 +800106c6 l .data 00000000 trap_excpt_name_12 +800106de l .data 00000000 trap_excpt_name_13 +800106ef l .data 00000000 trap_excpt_name_14 +800106fe l .data 00000000 trap_excpt_name_15 +80010714 l .data 00000000 trap_excpt_name_16 +80010721 l .data 00000000 trap_excpt_name_17 +80010730 l .data 00000000 trap_excpt_name_18 +80010740 l .data 00000000 trap_excpt_name_19 +80010750 l .data 00000000 trap_excpt_name_20 +8001076e l .data 00000000 trap_excpt_name_21 +80010785 l .data 00000000 trap_excpt_name_22 +8001079a l .data 00000000 trap_excpt_name_23 +800107b6 l .data 00000000 trap_int_name_0 +800107ce l .data 00000000 trap_int_name_1 +800107ed l .data 00000000 trap_int_name_2 +80010814 l .data 00000000 trap_int_name_3 +80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044c4 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +8000446c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +8000446c g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7d20cf5e +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xfa663f5f +80000048: 0001ae03 lw x28,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sig0l_cg_cp_rs1_b0: + sha512sig0l x31, x0, x28 # perform operation +80000050: 55c00fb3 sha512sig0l x31,x0,x28 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha512sig0l_cg_cp_rs1_b0, Zknh_sha512sig0l_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01f20863 beq x4,x31,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x14c05c59 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x1db3d54a +80000074: 0001aa03 lw x20,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sig0l_cg_cp_rs1_b1: + sha512sig0l x28, x1, x20 # perform operation +8000007c: 55408e33 sha512sig0l x28,x1,x20 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha512sig0l_cg_cp_rs1_b1, Zknh_sha512sig0l_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01c20863 beq x4,x28,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x26, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010d13 addi x26,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc680adaf +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xe81457c9 +800000a4: 0001a383 lw x7,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sig0l_cg_cp_rs1_b2: + sha512sig0l x21, x2, x7 # perform operation +800000ac: 54710ab3 sha512sig0l x21,x2,x7 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zknh_sha512sig0l_cg_cp_rs1_b2, Zknh_sha512sig0l_cg_cp_rs1_b2_str) +800000b0: 000d2203 lw x4,0(x26) +800000b4: 01520863 beq x4,x21,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 004d0d13 addi x26,x26,4 + + mv x6, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018313 addi x6,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xab792f4f +800000cc: 00032183 lw x3,0(x6) +800000d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5e11f2bc +800000d4: 00032903 lw x18,0(x6) +800000d8: 00430313 addi x6,x6,4 + +800000dc : +Zknh_sha512sig0l_cg_cp_rs1_b3: + sha512sig0l x19, x3, x18 # perform operation +800000dc: 552189b3 sha512sig0l x19,x3,x18 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zknh_sha512sig0l_cg_cp_rs1_b3, Zknh_sha512sig0l_cg_cp_rs1_b3_str) +800000e0: 000d2203 lw x4,0(x26) +800000e4: 01320863 beq x4,x19,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 004d0d13 addi x26,x26,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xa42a78e8 +80000100: 00032203 lw x4,0(x6) +80000104: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xb20b759f +80000108: 00032d83 lw x27,0(x6) +8000010c: 00430313 addi x6,x6,4 + +80000110 : +Zknh_sha512sig0l_cg_cp_rs1_b4: + sha512sig0l x11, x4, x27 # perform operation +80000110: 55b205b3 sha512sig0l x11,x4,x27 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zknh_sha512sig0l_cg_cp_rs1_b4, Zknh_sha512sig0l_cg_cp_rs1_b4_str) +80000114: 000d2683 lw x13,0(x26) +80000118: 00b68863 beq x13,x11,80000128 +8000011c: 4240576f jal x14,80005540 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x11a31ac9 +8000012c: 00032283 lw x5,0(x6) +80000130: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x96864274 +80000134: 00032e03 lw x28,0(x6) +80000138: 00430313 addi x6,x6,4 + +8000013c : +Zknh_sha512sig0l_cg_cp_rs1_b5: + sha512sig0l x17, x5, x28 # perform operation +8000013c: 55c288b3 sha512sig0l x17,x5,x28 + # Check if x17 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x17, Zknh_sha512sig0l_cg_cp_rs1_b5, Zknh_sha512sig0l_cg_cp_rs1_b5_str) +80000140: 000d2683 lw x13,0(x26) +80000144: 01168863 beq x13,x17,80000154 +80000148: 3f80576f jal x14,80005540 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 004d0d13 addi x26,x26,4 + + mv x31, x6 # switch data pointer register to avoid conflict with test +80000158: 00030f93 addi x31,x6,0 +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xac16df89 +8000015c: 000fa303 lw x6,0(x31) +80000160: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x23e1bc68 +80000164: 000fa183 lw x3,0(x31) +80000168: 004f8f93 addi x31,x31,4 + +8000016c : +Zknh_sha512sig0l_cg_cp_rs1_b6: + sha512sig0l x4, x6, x3 # perform operation +8000016c: 54330233 sha512sig0l x4,x6,x3 + # Check if x4 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x4, Zknh_sha512sig0l_cg_cp_rs1_b6, Zknh_sha512sig0l_cg_cp_rs1_b6_str) +80000170: 000d2683 lw x13,0(x26) +80000174: 00468863 beq x13,x4,80000184 +80000178: 3c80576f jal x14,80005540 +8000017c: 8000016c .word 0x8000016c +80000180: 80009140 .word 0x80009140 +80000184: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x819ead35 +80000188: 000fa383 lw x7,0(x31) +8000018c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x087cac52 +80000190: 000fa283 lw x5,0(x31) +80000194: 004f8f93 addi x31,x31,4 + +80000198 : +Zknh_sha512sig0l_cg_cp_rs1_b7: + sha512sig0l x18, x7, x5 # perform operation +80000198: 54538933 sha512sig0l x18,x7,x5 + # Check if x18 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x18, Zknh_sha512sig0l_cg_cp_rs1_b7, Zknh_sha512sig0l_cg_cp_rs1_b7_str) +8000019c: 000d2683 lw x13,0(x26) +800001a0: 01268863 beq x13,x18,800001b0 +800001a4: 39c0576f jal x14,80005540 +800001a8: 80000198 .word 0x80000198 +800001ac: 80009178 .word 0x80009178 +800001b0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x0bdbc091 +800001b4: 000fa403 lw x8,0(x31) +800001b8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x1ec01db1 +800001bc: 000fac83 lw x25,0(x31) +800001c0: 004f8f93 addi x31,x31,4 + +800001c4 : +Zknh_sha512sig0l_cg_cp_rs1_b8: + sha512sig0l x20, x8, x25 # perform operation +800001c4: 55940a33 sha512sig0l x20,x8,x25 + # Check if x20 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x20, Zknh_sha512sig0l_cg_cp_rs1_b8, Zknh_sha512sig0l_cg_cp_rs1_b8_str) +800001c8: 000d2683 lw x13,0(x26) +800001cc: 01468863 beq x13,x20,800001dc +800001d0: 3700576f jal x14,80005540 +800001d4: 800001c4 .word 0x800001c4 +800001d8: 800091b0 .word 0x800091b0 +800001dc: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x014745b3 +800001e0: 000fa483 lw x9,0(x31) +800001e4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x925d6315 +800001e8: 000fa383 lw x7,0(x31) +800001ec: 004f8f93 addi x31,x31,4 + +800001f0 : +Zknh_sha512sig0l_cg_cp_rs1_b9: + sha512sig0l x20, x9, x7 # perform operation +800001f0: 54748a33 sha512sig0l x20,x9,x7 + # Check if x20 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x20, Zknh_sha512sig0l_cg_cp_rs1_b9, Zknh_sha512sig0l_cg_cp_rs1_b9_str) +800001f4: 000d2683 lw x13,0(x26) +800001f8: 01468863 beq x13,x20,80000208 +800001fc: 3440576f jal x14,80005540 +80000200: 800001f0 .word 0x800001f0 +80000204: 800091e8 .word 0x800091e8 +80000208: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x22b686ca +8000020c: 000fa503 lw x10,0(x31) +80000210: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x3824d4b4 +80000214: 000fac83 lw x25,0(x31) +80000218: 004f8f93 addi x31,x31,4 + +8000021c : +Zknh_sha512sig0l_cg_cp_rs1_b10: + sha512sig0l x15, x10, x25 # perform operation +8000021c: 559507b3 sha512sig0l x15,x10,x25 + # Check if x15 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x15, Zknh_sha512sig0l_cg_cp_rs1_b10, Zknh_sha512sig0l_cg_cp_rs1_b10_str) +80000220: 000d2683 lw x13,0(x26) +80000224: 00f68863 beq x13,x15,80000234 +80000228: 3180576f jal x14,80005540 +8000022c: 8000021c .word 0x8000021c +80000230: 80009221 .word 0x80009221 +80000234: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x6d567453 +80000238: 000fa583 lw x11,0(x31) +8000023c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x280f260a +80000240: 000fa103 lw x2,0(x31) +80000244: 004f8f93 addi x31,x31,4 + +80000248 : +Zknh_sha512sig0l_cg_cp_rs1_b11: + sha512sig0l x27, x11, x2 # perform operation +80000248: 54258db3 sha512sig0l x27,x11,x2 + # Check if x27 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x27, Zknh_sha512sig0l_cg_cp_rs1_b11, Zknh_sha512sig0l_cg_cp_rs1_b11_str) +8000024c: 000d2683 lw x13,0(x26) +80000250: 01b68863 beq x13,x27,80000260 +80000254: 2ec0576f jal x14,80005540 +80000258: 80000248 .word 0x80000248 +8000025c: 8000925b .word 0x8000925b +80000260: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x3b69e0af +80000264: 000fa603 lw x12,0(x31) +80000268: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0xcd10b800 +8000026c: 000fab83 lw x23,0(x31) +80000270: 004f8f93 addi x31,x31,4 + +80000274 : +Zknh_sha512sig0l_cg_cp_rs1_b12: + sha512sig0l x16, x12, x23 # perform operation +80000274: 55760833 sha512sig0l x16,x12,x23 + # Check if x16 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x16, Zknh_sha512sig0l_cg_cp_rs1_b12, Zknh_sha512sig0l_cg_cp_rs1_b12_str) +80000278: 000d2683 lw x13,0(x26) +8000027c: 01068863 beq x13,x16,8000028c +80000280: 2c00576f jal x14,80005540 +80000284: 80000274 .word 0x80000274 +80000288: 80009295 .word 0x80009295 +8000028c: 004d0d13 addi x26,x26,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000290: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000294: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x1f04372a +80000298: 000fa683 lw x13,0(x31) +8000029c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0xdf214c72 +800002a0: 000fa583 lw x11,0(x31) +800002a4: 004f8f93 addi x31,x31,4 + +800002a8 : +Zknh_sha512sig0l_cg_cp_rs1_b13: + sha512sig0l x16, x13, x11 # perform operation +800002a8: 54b68833 sha512sig0l x16,x13,x11 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zknh_sha512sig0l_cg_cp_rs1_b13, Zknh_sha512sig0l_cg_cp_rs1_b13_str) +800002ac: 000d2383 lw x7,0(x26) +800002b0: 01038863 beq x7,x16,800002c0 +800002b4: 2640546f jal x8,80005518 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 800092cf .word 0x800092cf +800002c0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0xd8e38987 +800002c4: 000fa703 lw x14,0(x31) +800002c8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x9c07b620 +800002cc: 000fad83 lw x27,0(x31) +800002d0: 004f8f93 addi x31,x31,4 + +800002d4 : +Zknh_sha512sig0l_cg_cp_rs1_b14: + sha512sig0l x4, x14, x27 # perform operation +800002d4: 55b70233 sha512sig0l x4,x14,x27 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zknh_sha512sig0l_cg_cp_rs1_b14, Zknh_sha512sig0l_cg_cp_rs1_b14_str) +800002d8: 000d2383 lw x7,0(x26) +800002dc: 00438863 beq x7,x4,800002ec +800002e0: 2380546f jal x8,80005518 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 80009309 .word 0x80009309 +800002ec: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x15205405 +800002f0: 000fa783 lw x15,0(x31) +800002f4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x63566752 +800002f8: 000fa303 lw x6,0(x31) +800002fc: 004f8f93 addi x31,x31,4 + +80000300 : +Zknh_sha512sig0l_cg_cp_rs1_b15: + sha512sig0l x19, x15, x6 # perform operation +80000300: 546789b3 sha512sig0l x19,x15,x6 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zknh_sha512sig0l_cg_cp_rs1_b15, Zknh_sha512sig0l_cg_cp_rs1_b15_str) +80000304: 000d2383 lw x7,0(x26) +80000308: 01338863 beq x7,x19,80000318 +8000030c: 20c0546f jal x8,80005518 +80000310: 80000300 .word 0x80000300 +80000314: 80009343 .word 0x80009343 +80000318: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x0c4e5947 +8000031c: 000fa803 lw x16,0(x31) +80000320: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x5b4d9d80 +80000324: 000fa583 lw x11,0(x31) +80000328: 004f8f93 addi x31,x31,4 + +8000032c : +Zknh_sha512sig0l_cg_cp_rs1_b16: + sha512sig0l x0, x16, x11 # perform operation +8000032c: 54b80033 sha512sig0l x0,x16,x11 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zknh_sha512sig0l_cg_cp_rs1_b16, Zknh_sha512sig0l_cg_cp_rs1_b16_str) +80000330: 000d2383 lw x7,0(x26) +80000334: 00038863 beq x7,x0,80000344 +80000338: 1e00546f jal x8,80005518 +8000033c: 8000032c .word 0x8000032c +80000340: 8000937d .word 0x8000937d +80000344: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x22b5d099 +80000348: 000fa883 lw x17,0(x31) +8000034c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x35015d81 +80000350: 000fa083 lw x1,0(x31) +80000354: 004f8f93 addi x31,x31,4 + +80000358 : +Zknh_sha512sig0l_cg_cp_rs1_b17: + sha512sig0l x18, x17, x1 # perform operation +80000358: 54188933 sha512sig0l x18,x17,x1 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zknh_sha512sig0l_cg_cp_rs1_b17, Zknh_sha512sig0l_cg_cp_rs1_b17_str) +8000035c: 000d2383 lw x7,0(x26) +80000360: 01238863 beq x7,x18,80000370 +80000364: 1b40546f jal x8,80005518 +80000368: 80000358 .word 0x80000358 +8000036c: 800093b7 .word 0x800093b7 +80000370: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0xb4d2fc2a +80000374: 000fa903 lw x18,0(x31) +80000378: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x367b8a90 +8000037c: 000fa183 lw x3,0(x31) +80000380: 004f8f93 addi x31,x31,4 + +80000384 : +Zknh_sha512sig0l_cg_cp_rs1_b18: + sha512sig0l x13, x18, x3 # perform operation +80000384: 543906b3 sha512sig0l x13,x18,x3 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zknh_sha512sig0l_cg_cp_rs1_b18, Zknh_sha512sig0l_cg_cp_rs1_b18_str) +80000388: 000d2383 lw x7,0(x26) +8000038c: 00d38863 beq x7,x13,8000039c +80000390: 1880546f jal x8,80005518 +80000394: 80000384 .word 0x80000384 +80000398: 800093f1 .word 0x800093f1 +8000039c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xef56c703 +800003a0: 000fa983 lw x19,0(x31) +800003a4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x61ebe53a +800003a8: 000fa903 lw x18,0(x31) +800003ac: 004f8f93 addi x31,x31,4 + +800003b0 : +Zknh_sha512sig0l_cg_cp_rs1_b19: + sha512sig0l x15, x19, x18 # perform operation +800003b0: 552987b3 sha512sig0l x15,x19,x18 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zknh_sha512sig0l_cg_cp_rs1_b19, Zknh_sha512sig0l_cg_cp_rs1_b19_str) +800003b4: 000d2383 lw x7,0(x26) +800003b8: 00f38863 beq x7,x15,800003c8 +800003bc: 15c0546f jal x8,80005518 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000942b .word 0x8000942b +800003c8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xd1aadfc2 +800003cc: 000faa03 lw x20,0(x31) +800003d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xe6ad581e +800003d4: 000fac83 lw x25,0(x31) +800003d8: 004f8f93 addi x31,x31,4 + +800003dc : +Zknh_sha512sig0l_cg_cp_rs1_b20: + sha512sig0l x23, x20, x25 # perform operation +800003dc: 559a0bb3 sha512sig0l x23,x20,x25 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zknh_sha512sig0l_cg_cp_rs1_b20, Zknh_sha512sig0l_cg_cp_rs1_b20_str) +800003e0: 000d2383 lw x7,0(x26) +800003e4: 01738863 beq x7,x23,800003f4 +800003e8: 1300546f jal x8,80005518 +800003ec: 800003dc .word 0x800003dc +800003f0: 80009465 .word 0x80009465 +800003f4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x53909fa8 +800003f8: 000faa83 lw x21,0(x31) +800003fc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0x0bdf977c +80000400: 000fa503 lw x10,0(x31) +80000404: 004f8f93 addi x31,x31,4 + +80000408 : +Zknh_sha512sig0l_cg_cp_rs1_b21: + sha512sig0l x19, x21, x10 # perform operation +80000408: 54aa89b3 sha512sig0l x19,x21,x10 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zknh_sha512sig0l_cg_cp_rs1_b21, Zknh_sha512sig0l_cg_cp_rs1_b21_str) +8000040c: 000d2383 lw x7,0(x26) +80000410: 01338863 beq x7,x19,80000420 +80000414: 1040546f jal x8,80005518 +80000418: 80000408 .word 0x80000408 +8000041c: 8000949f .word 0x8000949f +80000420: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xd6cad435 +80000424: 000fab03 lw x22,0(x31) +80000428: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0xfebe9a42 +8000042c: 000fab83 lw x23,0(x31) +80000430: 004f8f93 addi x31,x31,4 + +80000434 : +Zknh_sha512sig0l_cg_cp_rs1_b22: + sha512sig0l x10, x22, x23 # perform operation +80000434: 557b0533 sha512sig0l x10,x22,x23 + # Check if x10 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x10, Zknh_sha512sig0l_cg_cp_rs1_b22, Zknh_sha512sig0l_cg_cp_rs1_b22_str) +80000438: 000d2383 lw x7,0(x26) +8000043c: 00a38863 beq x7,x10,8000044c +80000440: 0d80546f jal x8,80005518 +80000444: 80000434 .word 0x80000434 +80000448: 800094d9 .word 0x800094d9 +8000044c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x9f8b4dea +80000450: 000fab83 lw x23,0(x31) +80000454: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0xa2a66b3f +80000458: 000fa203 lw x4,0(x31) +8000045c: 004f8f93 addi x31,x31,4 + +80000460 : +Zknh_sha512sig0l_cg_cp_rs1_b23: + sha512sig0l x15, x23, x4 # perform operation +80000460: 544b87b3 sha512sig0l x15,x23,x4 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zknh_sha512sig0l_cg_cp_rs1_b23, Zknh_sha512sig0l_cg_cp_rs1_b23_str) +80000464: 000d2383 lw x7,0(x26) +80000468: 00f38863 beq x7,x15,80000478 +8000046c: 0ac0546f jal x8,80005518 +80000470: 80000460 .word 0x80000460 +80000474: 80009513 .word 0x80009513 +80000478: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xbf06b380 +8000047c: 000fac03 lw x24,0(x31) +80000480: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x7968d972 +80000484: 000fa103 lw x2,0(x31) +80000488: 004f8f93 addi x31,x31,4 + +8000048c : +Zknh_sha512sig0l_cg_cp_rs1_b24: + sha512sig0l x29, x24, x2 # perform operation +8000048c: 542c0eb3 sha512sig0l x29,x24,x2 + # Check if x29 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x29, Zknh_sha512sig0l_cg_cp_rs1_b24, Zknh_sha512sig0l_cg_cp_rs1_b24_str) +80000490: 000d2383 lw x7,0(x26) +80000494: 01d38863 beq x7,x29,800004a4 +80000498: 0800546f jal x8,80005518 +8000049c: 8000048c .word 0x8000048c +800004a0: 8000954d .word 0x8000954d +800004a4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x799cc384 +800004a8: 000fac83 lw x25,0(x31) +800004ac: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x965c291e +800004b0: 000fad83 lw x27,0(x31) +800004b4: 004f8f93 addi x31,x31,4 + +800004b8 : +Zknh_sha512sig0l_cg_cp_rs1_b25: + sha512sig0l x0, x25, x27 # perform operation +800004b8: 55bc8033 sha512sig0l x0,x25,x27 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zknh_sha512sig0l_cg_cp_rs1_b25, Zknh_sha512sig0l_cg_cp_rs1_b25_str) +800004bc: 000d2383 lw x7,0(x26) +800004c0: 00038863 beq x7,x0,800004d0 +800004c4: 0540546f jal x8,80005518 +800004c8: 800004b8 .word 0x800004b8 +800004cc: 80009587 .word 0x80009587 +800004d0: 004d0d13 addi x26,x26,4 + + mv x20, x26 # switch signature pointer register to avoid conflict with test +800004d4: 000d0a13 addi x20,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0xd106484e +800004d8: 000fad03 lw x26,0(x31) +800004dc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0xb9df5562 +800004e0: 000fa203 lw x4,0(x31) +800004e4: 004f8f93 addi x31,x31,4 + +800004e8 : +Zknh_sha512sig0l_cg_cp_rs1_b26: + sha512sig0l x29, x26, x4 # perform operation +800004e8: 544d0eb3 sha512sig0l x29,x26,x4 + # Check if x29 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x29, Zknh_sha512sig0l_cg_cp_rs1_b26, Zknh_sha512sig0l_cg_cp_rs1_b26_str) +800004ec: 000a2383 lw x7,0(x20) +800004f0: 01d38863 beq x7,x29,80000500 +800004f4: 0240546f jal x8,80005518 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800095c1 .word 0x800095c1 +80000500: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xf3f40774 +80000504: 000fad83 lw x27,0(x31) +80000508: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0xf1bdc65d +8000050c: 000fab03 lw x22,0(x31) +80000510: 004f8f93 addi x31,x31,4 + +80000514 : +Zknh_sha512sig0l_cg_cp_rs1_b27: + sha512sig0l x4, x27, x22 # perform operation +80000514: 556d8233 sha512sig0l x4,x27,x22 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha512sig0l_cg_cp_rs1_b27, Zknh_sha512sig0l_cg_cp_rs1_b27_str) +80000518: 000a2383 lw x7,0(x20) +8000051c: 00438863 beq x7,x4,8000052c +80000520: 7f90446f jal x8,80005518 +80000524: 80000514 .word 0x80000514 +80000528: 800095fb .word 0x800095fb +8000052c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xa3ee81af +80000530: 000fae03 lw x28,0(x31) +80000534: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x462c98d2 +80000538: 000fac83 lw x25,0(x31) +8000053c: 004f8f93 addi x31,x31,4 + +80000540 : +Zknh_sha512sig0l_cg_cp_rs1_b28: + sha512sig0l x11, x28, x25 # perform operation +80000540: 559e05b3 sha512sig0l x11,x28,x25 + # Check if x11 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x11, Zknh_sha512sig0l_cg_cp_rs1_b28, Zknh_sha512sig0l_cg_cp_rs1_b28_str) +80000544: 000a2383 lw x7,0(x20) +80000548: 00b38863 beq x7,x11,80000558 +8000054c: 7cd0446f jal x8,80005518 +80000550: 80000540 .word 0x80000540 +80000554: 80009635 .word 0x80009635 +80000558: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x9513fa31 +8000055c: 000fae83 lw x29,0(x31) +80000560: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xc7a2fe0f +80000564: 000fa103 lw x2,0(x31) +80000568: 004f8f93 addi x31,x31,4 + +8000056c : +Zknh_sha512sig0l_cg_cp_rs1_b29: + sha512sig0l x17, x29, x2 # perform operation +8000056c: 542e88b3 sha512sig0l x17,x29,x2 + # Check if x17 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x17, Zknh_sha512sig0l_cg_cp_rs1_b29, Zknh_sha512sig0l_cg_cp_rs1_b29_str) +80000570: 000a2383 lw x7,0(x20) +80000574: 01138863 beq x7,x17,80000584 +80000578: 7a10446f jal x8,80005518 +8000057c: 8000056c .word 0x8000056c +80000580: 8000966f .word 0x8000966f +80000584: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xbb10c13c +80000588: 000faf03 lw x30,0(x31) +8000058c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x9fa4f20b +80000590: 000fa283 lw x5,0(x31) +80000594: 004f8f93 addi x31,x31,4 + +80000598 : +Zknh_sha512sig0l_cg_cp_rs1_b30: + sha512sig0l x21, x30, x5 # perform operation +80000598: 545f0ab3 sha512sig0l x21,x30,x5 + # Check if x21 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x21, Zknh_sha512sig0l_cg_cp_rs1_b30, Zknh_sha512sig0l_cg_cp_rs1_b30_str) +8000059c: 000a2383 lw x7,0(x20) +800005a0: 01538863 beq x7,x21,800005b0 +800005a4: 7750446f jal x8,80005518 +800005a8: 80000598 .word 0x80000598 +800005ac: 800096a9 .word 0x800096a9 +800005b0: 004a0a13 addi x20,x20,4 + + mv x6, x31 # switch data pointer register to avoid conflict with test +800005b4: 000f8313 addi x6,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x477a239e +800005b8: 00032f83 lw x31,0(x6) +800005bc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0xe06df0a7 +800005c0: 00032203 lw x4,0(x6) +800005c4: 00430313 addi x6,x6,4 + +800005c8 : +Zknh_sha512sig0l_cg_cp_rs1_b31: + sha512sig0l x13, x31, x4 # perform operation +800005c8: 544f86b3 sha512sig0l x13,x31,x4 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zknh_sha512sig0l_cg_cp_rs1_b31, Zknh_sha512sig0l_cg_cp_rs1_b31_str) +800005cc: 000a2383 lw x7,0(x20) +800005d0: 00d38863 beq x7,x13,800005e0 +800005d4: 7450446f jal x8,80005518 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 800096e3 .word 0x800096e3 +800005e0: 004a0a13 addi x20,x20,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x64510141 +800005e4: 00032f83 lw x31,0(x6) +800005e8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x258fa0a3 +800005ec: 00032003 lw x0,0(x6) +800005f0: 00430313 addi x6,x6,4 + +800005f4 : +Zknh_sha512sig0l_cg_cp_rs2_b0: + sha512sig0l x22, x31, x0 # perform operation +800005f4: 540f8b33 sha512sig0l x22,x31,x0 + # Check if x22 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x22, Zknh_sha512sig0l_cg_cp_rs2_b0, Zknh_sha512sig0l_cg_cp_rs2_b0_str) +800005f8: 000a2383 lw x7,0(x20) +800005fc: 01638863 beq x7,x22,8000060c +80000600: 7190446f jal x8,80005518 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000971d .word 0x8000971d +8000060c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x389f7dad +80000610: 00032803 lw x16,0(x6) +80000614: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x3e91b609 +80000618: 00032083 lw x1,0(x6) +8000061c: 00430313 addi x6,x6,4 + +80000620 : +Zknh_sha512sig0l_cg_cp_rs2_b1: + sha512sig0l x21, x16, x1 # perform operation +80000620: 54180ab3 sha512sig0l x21,x16,x1 + # Check if x21 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x21, Zknh_sha512sig0l_cg_cp_rs2_b1, Zknh_sha512sig0l_cg_cp_rs2_b1_str) +80000624: 000a2383 lw x7,0(x20) +80000628: 01538863 beq x7,x21,80000638 +8000062c: 6ed0446f jal x8,80005518 +80000630: 80000620 .word 0x80000620 +80000634: 80009756 .word 0x80009756 +80000638: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xbb44f59a +8000063c: 00032803 lw x16,0(x6) +80000640: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xfce92403 +80000644: 00032103 lw x2,0(x6) +80000648: 00430313 addi x6,x6,4 + +8000064c : +Zknh_sha512sig0l_cg_cp_rs2_b2: + sha512sig0l x31, x16, x2 # perform operation +8000064c: 54280fb3 sha512sig0l x31,x16,x2 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zknh_sha512sig0l_cg_cp_rs2_b2, Zknh_sha512sig0l_cg_cp_rs2_b2_str) +80000650: 000a2383 lw x7,0(x20) +80000654: 01f38863 beq x7,x31,80000664 +80000658: 6c10446f jal x8,80005518 +8000065c: 8000064c .word 0x8000064c +80000660: 8000978f .word 0x8000978f +80000664: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x3eab906d +80000668: 00032883 lw x17,0(x6) +8000066c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x1673cfc5 +80000670: 00032183 lw x3,0(x6) +80000674: 00430313 addi x6,x6,4 + +80000678 : +Zknh_sha512sig0l_cg_cp_rs2_b3: + sha512sig0l x27, x17, x3 # perform operation +80000678: 54388db3 sha512sig0l x27,x17,x3 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zknh_sha512sig0l_cg_cp_rs2_b3, Zknh_sha512sig0l_cg_cp_rs2_b3_str) +8000067c: 000a2383 lw x7,0(x20) +80000680: 01b38863 beq x7,x27,80000690 +80000684: 6950446f jal x8,80005518 +80000688: 80000678 .word 0x80000678 +8000068c: 800097c8 .word 0x800097c8 +80000690: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x58e361bf +80000694: 00032a83 lw x21,0(x6) +80000698: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x03d54c4f +8000069c: 00032203 lw x4,0(x6) +800006a0: 00430313 addi x6,x6,4 + +800006a4 : +Zknh_sha512sig0l_cg_cp_rs2_b4: + sha512sig0l x10, x21, x4 # perform operation +800006a4: 544a8533 sha512sig0l x10,x21,x4 + # Check if x10 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x10, Zknh_sha512sig0l_cg_cp_rs2_b4, Zknh_sha512sig0l_cg_cp_rs2_b4_str) +800006a8: 000a2383 lw x7,0(x20) +800006ac: 00a38863 beq x7,x10,800006bc +800006b0: 6690446f jal x8,80005518 +800006b4: 800006a4 .word 0x800006a4 +800006b8: 80009801 .word 0x80009801 +800006bc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xf2614dd5 +800006c0: 00032883 lw x17,0(x6) +800006c4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0xfdf0b3c4 +800006c8: 00032283 lw x5,0(x6) +800006cc: 00430313 addi x6,x6,4 + +800006d0 : +Zknh_sha512sig0l_cg_cp_rs2_b5: + sha512sig0l x15, x17, x5 # perform operation +800006d0: 545887b3 sha512sig0l x15,x17,x5 + # Check if x15 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x15, Zknh_sha512sig0l_cg_cp_rs2_b5, Zknh_sha512sig0l_cg_cp_rs2_b5_str) +800006d4: 000a2383 lw x7,0(x20) +800006d8: 00f38863 beq x7,x15,800006e8 +800006dc: 63d0446f jal x8,80005518 +800006e0: 800006d0 .word 0x800006d0 +800006e4: 8000983a .word 0x8000983a +800006e8: 004a0a13 addi x20,x20,4 + + mv x21, x6 # switch data pointer register to avoid conflict with test +800006ec: 00030a93 addi x21,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x165e2d80 +800006f0: 000aa183 lw x3,0(x21) +800006f4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x6bf58678 +800006f8: 000aa303 lw x6,0(x21) +800006fc: 004a8a93 addi x21,x21,4 + +80000700 : +Zknh_sha512sig0l_cg_cp_rs2_b6: + sha512sig0l x24, x3, x6 # perform operation +80000700: 54618c33 sha512sig0l x24,x3,x6 + # Check if x24 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x24, Zknh_sha512sig0l_cg_cp_rs2_b6, Zknh_sha512sig0l_cg_cp_rs2_b6_str) +80000704: 000a2383 lw x7,0(x20) +80000708: 01838863 beq x7,x24,80000718 +8000070c: 60d0446f jal x8,80005518 +80000710: 80000700 .word 0x80000700 +80000714: 80009873 .word 0x80009873 +80000718: 004a0a13 addi x20,x20,4 + + mv x4, x7 # switch temp register to avoid conflict with test +8000071c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000720: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x7c244cbc +80000724: 000aa303 lw x6,0(x21) +80000728: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x3993a5a6 +8000072c: 000aa383 lw x7,0(x21) +80000730: 004a8a93 addi x21,x21,4 + +80000734 : +Zknh_sha512sig0l_cg_cp_rs2_b7: + sha512sig0l x30, x6, x7 # perform operation +80000734: 54730f33 sha512sig0l x30,x6,x7 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zknh_sha512sig0l_cg_cp_rs2_b7, Zknh_sha512sig0l_cg_cp_rs2_b7_str) +80000738: 000a2203 lw x4,0(x20) +8000073c: 01e20863 beq x4,x30,8000074c +80000740: 5c1042ef jal x5,80005500 +80000744: 80000734 .word 0x80000734 +80000748: 800098ac .word 0x800098ac +8000074c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xdbd27f56 +80000750: 000aa603 lw x12,0(x21) +80000754: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xc2af9fcc +80000758: 000aa403 lw x8,0(x21) +8000075c: 004a8a93 addi x21,x21,4 + +80000760 : +Zknh_sha512sig0l_cg_cp_rs2_b8: + sha512sig0l x30, x12, x8 # perform operation +80000760: 54860f33 sha512sig0l x30,x12,x8 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zknh_sha512sig0l_cg_cp_rs2_b8, Zknh_sha512sig0l_cg_cp_rs2_b8_str) +80000764: 000a2203 lw x4,0(x20) +80000768: 01e20863 beq x4,x30,80000778 +8000076c: 595042ef jal x5,80005500 +80000770: 80000760 .word 0x80000760 +80000774: 800098e5 .word 0x800098e5 +80000778: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x7da95db0 +8000077c: 000aa783 lw x15,0(x21) +80000780: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x39896cb3 +80000784: 000aa483 lw x9,0(x21) +80000788: 004a8a93 addi x21,x21,4 + +8000078c : +Zknh_sha512sig0l_cg_cp_rs2_b9: + sha512sig0l x26, x15, x9 # perform operation +8000078c: 54978d33 sha512sig0l x26,x15,x9 + # Check if x26 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x26, Zknh_sha512sig0l_cg_cp_rs2_b9, Zknh_sha512sig0l_cg_cp_rs2_b9_str) +80000790: 000a2203 lw x4,0(x20) +80000794: 01a20863 beq x4,x26,800007a4 +80000798: 569042ef jal x5,80005500 +8000079c: 8000078c .word 0x8000078c +800007a0: 8000991e .word 0x8000991e +800007a4: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x0c846b10 +800007a8: 000aab83 lw x23,0(x21) +800007ac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x5a619dcb +800007b0: 000aa503 lw x10,0(x21) +800007b4: 004a8a93 addi x21,x21,4 + +800007b8 : +Zknh_sha512sig0l_cg_cp_rs2_b10: + sha512sig0l x12, x23, x10 # perform operation +800007b8: 54ab8633 sha512sig0l x12,x23,x10 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zknh_sha512sig0l_cg_cp_rs2_b10, Zknh_sha512sig0l_cg_cp_rs2_b10_str) +800007bc: 000a2203 lw x4,0(x20) +800007c0: 00c20863 beq x4,x12,800007d0 +800007c4: 53d042ef jal x5,80005500 +800007c8: 800007b8 .word 0x800007b8 +800007cc: 80009957 .word 0x80009957 +800007d0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xb4757aac +800007d4: 000aae83 lw x29,0(x21) +800007d8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xfabf06a5 +800007dc: 000aa583 lw x11,0(x21) +800007e0: 004a8a93 addi x21,x21,4 + +800007e4 : +Zknh_sha512sig0l_cg_cp_rs2_b11: + sha512sig0l x28, x29, x11 # perform operation +800007e4: 54be8e33 sha512sig0l x28,x29,x11 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zknh_sha512sig0l_cg_cp_rs2_b11, Zknh_sha512sig0l_cg_cp_rs2_b11_str) +800007e8: 000a2203 lw x4,0(x20) +800007ec: 01c20863 beq x4,x28,800007fc +800007f0: 511042ef jal x5,80005500 +800007f4: 800007e4 .word 0x800007e4 +800007f8: 80009991 .word 0x80009991 +800007fc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x754ea637 +80000800: 000aac83 lw x25,0(x21) +80000804: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x2607b295 +80000808: 000aa603 lw x12,0(x21) +8000080c: 004a8a93 addi x21,x21,4 + +80000810 : +Zknh_sha512sig0l_cg_cp_rs2_b12: + sha512sig0l x27, x25, x12 # perform operation +80000810: 54cc8db3 sha512sig0l x27,x25,x12 + # Check if x27 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x27, Zknh_sha512sig0l_cg_cp_rs2_b12, Zknh_sha512sig0l_cg_cp_rs2_b12_str) +80000814: 000a2203 lw x4,0(x20) +80000818: 01b20863 beq x4,x27,80000828 +8000081c: 4e5042ef jal x5,80005500 +80000820: 80000810 .word 0x80000810 +80000824: 800099cb .word 0x800099cb +80000828: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x16ab8c8c +8000082c: 000aae03 lw x28,0(x21) +80000830: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x8136b247 +80000834: 000aa683 lw x13,0(x21) +80000838: 004a8a93 addi x21,x21,4 + +8000083c : +Zknh_sha512sig0l_cg_cp_rs2_b13: + sha512sig0l x6, x28, x13 # perform operation +8000083c: 54de0333 sha512sig0l x6,x28,x13 + # Check if x6 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x6, Zknh_sha512sig0l_cg_cp_rs2_b13, Zknh_sha512sig0l_cg_cp_rs2_b13_str) +80000840: 000a2203 lw x4,0(x20) +80000844: 00620863 beq x4,x6,80000854 +80000848: 4b9042ef jal x5,80005500 +8000084c: 8000083c .word 0x8000083c +80000850: 80009a05 .word 0x80009a05 +80000854: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x49f75035 +80000858: 000aa083 lw x1,0(x21) +8000085c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xe6c3cf7f +80000860: 000aa703 lw x14,0(x21) +80000864: 004a8a93 addi x21,x21,4 + +80000868 : +Zknh_sha512sig0l_cg_cp_rs2_b14: + sha512sig0l x13, x1, x14 # perform operation +80000868: 54e086b3 sha512sig0l x13,x1,x14 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zknh_sha512sig0l_cg_cp_rs2_b14, Zknh_sha512sig0l_cg_cp_rs2_b14_str) +8000086c: 000a2203 lw x4,0(x20) +80000870: 00d20863 beq x4,x13,80000880 +80000874: 48d042ef jal x5,80005500 +80000878: 80000868 .word 0x80000868 +8000087c: 80009a3f .word 0x80009a3f +80000880: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x1ac51b2c +80000884: 000aa003 lw x0,0(x21) +80000888: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xaf0e5ee3 +8000088c: 000aa783 lw x15,0(x21) +80000890: 004a8a93 addi x21,x21,4 + +80000894 : +Zknh_sha512sig0l_cg_cp_rs2_b15: + sha512sig0l x24, x0, x15 # perform operation +80000894: 54f00c33 sha512sig0l x24,x0,x15 + # Check if x24 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x24, Zknh_sha512sig0l_cg_cp_rs2_b15, Zknh_sha512sig0l_cg_cp_rs2_b15_str) +80000898: 000a2203 lw x4,0(x20) +8000089c: 01820863 beq x4,x24,800008ac +800008a0: 461042ef jal x5,80005500 +800008a4: 80000894 .word 0x80000894 +800008a8: 80009a79 .word 0x80009a79 +800008ac: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0xb76d1333 +800008b0: 000aa183 lw x3,0(x21) +800008b4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x715eecdc +800008b8: 000aa803 lw x16,0(x21) +800008bc: 004a8a93 addi x21,x21,4 + +800008c0 : +Zknh_sha512sig0l_cg_cp_rs2_b16: + sha512sig0l x11, x3, x16 # perform operation +800008c0: 550185b3 sha512sig0l x11,x3,x16 + # Check if x11 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x11, Zknh_sha512sig0l_cg_cp_rs2_b16, Zknh_sha512sig0l_cg_cp_rs2_b16_str) +800008c4: 000a2203 lw x4,0(x20) +800008c8: 00b20863 beq x4,x11,800008d8 +800008cc: 435042ef jal x5,80005500 +800008d0: 800008c0 .word 0x800008c0 +800008d4: 80009ab3 .word 0x80009ab3 +800008d8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xa6f15641 +800008dc: 000aa503 lw x10,0(x21) +800008e0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x56d85ae0 +800008e4: 000aa883 lw x17,0(x21) +800008e8: 004a8a93 addi x21,x21,4 + +800008ec : +Zknh_sha512sig0l_cg_cp_rs2_b17: + sha512sig0l x28, x10, x17 # perform operation +800008ec: 55150e33 sha512sig0l x28,x10,x17 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zknh_sha512sig0l_cg_cp_rs2_b17, Zknh_sha512sig0l_cg_cp_rs2_b17_str) +800008f0: 000a2203 lw x4,0(x20) +800008f4: 01c20863 beq x4,x28,80000904 +800008f8: 409042ef jal x5,80005500 +800008fc: 800008ec .word 0x800008ec +80000900: 80009aed .word 0x80009aed +80000904: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x9e2d3637 +80000908: 000aa003 lw x0,0(x21) +8000090c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x75bc9953 +80000910: 000aa903 lw x18,0(x21) +80000914: 004a8a93 addi x21,x21,4 + +80000918 : +Zknh_sha512sig0l_cg_cp_rs2_b18: + sha512sig0l x27, x0, x18 # perform operation +80000918: 55200db3 sha512sig0l x27,x0,x18 + # Check if x27 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x27, Zknh_sha512sig0l_cg_cp_rs2_b18, Zknh_sha512sig0l_cg_cp_rs2_b18_str) +8000091c: 000a2203 lw x4,0(x20) +80000920: 01b20863 beq x4,x27,80000930 +80000924: 3dd042ef jal x5,80005500 +80000928: 80000918 .word 0x80000918 +8000092c: 80009b27 .word 0x80009b27 +80000930: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xcfa6201f +80000934: 000aad03 lw x26,0(x21) +80000938: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xd98d50c6 +8000093c: 000aa983 lw x19,0(x21) +80000940: 004a8a93 addi x21,x21,4 + +80000944 : +Zknh_sha512sig0l_cg_cp_rs2_b19: + sha512sig0l x15, x26, x19 # perform operation +80000944: 553d07b3 sha512sig0l x15,x26,x19 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zknh_sha512sig0l_cg_cp_rs2_b19, Zknh_sha512sig0l_cg_cp_rs2_b19_str) +80000948: 000a2203 lw x4,0(x20) +8000094c: 00f20863 beq x4,x15,8000095c +80000950: 3b1042ef jal x5,80005500 +80000954: 80000944 .word 0x80000944 +80000958: 80009b61 .word 0x80009b61 +8000095c: 004a0a13 addi x20,x20,4 + + mv x24, x20 # switch signature pointer register to avoid conflict with test +80000960: 000a0c13 addi x24,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x42a0ab68 +80000964: 000aad03 lw x26,0(x21) +80000968: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xb577b604 +8000096c: 000aaa03 lw x20,0(x21) +80000970: 004a8a93 addi x21,x21,4 + +80000974 : +Zknh_sha512sig0l_cg_cp_rs2_b20: + sha512sig0l x28, x26, x20 # perform operation +80000974: 554d0e33 sha512sig0l x28,x26,x20 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zknh_sha512sig0l_cg_cp_rs2_b20, Zknh_sha512sig0l_cg_cp_rs2_b20_str) +80000978: 000c2203 lw x4,0(x24) +8000097c: 01c20863 beq x4,x28,8000098c +80000980: 381042ef jal x5,80005500 +80000984: 80000974 .word 0x80000974 +80000988: 80009b9b .word 0x80009b9b +8000098c: 004c0c13 addi x24,x24,4 + + mv x15, x21 # switch data pointer register to avoid conflict with test +80000990: 000a8793 addi x15,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x08ae5fa0 +80000994: 0007ad83 lw x27,0(x15) +80000998: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x4cb01fe6 +8000099c: 0007aa83 lw x21,0(x15) +800009a0: 00478793 addi x15,x15,4 + +800009a4 : +Zknh_sha512sig0l_cg_cp_rs2_b21: + sha512sig0l x23, x27, x21 # perform operation +800009a4: 555d8bb3 sha512sig0l x23,x27,x21 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha512sig0l_cg_cp_rs2_b21, Zknh_sha512sig0l_cg_cp_rs2_b21_str) +800009a8: 000c2203 lw x4,0(x24) +800009ac: 01720863 beq x4,x23,800009bc +800009b0: 351042ef jal x5,80005500 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 80009bd5 .word 0x80009bd5 +800009bc: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xf25330e9 +800009c0: 0007aa83 lw x21,0(x15) +800009c4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x37d4e7a9 +800009c8: 0007ab03 lw x22,0(x15) +800009cc: 00478793 addi x15,x15,4 + +800009d0 : +Zknh_sha512sig0l_cg_cp_rs2_b22: + sha512sig0l x8, x21, x22 # perform operation +800009d0: 556a8433 sha512sig0l x8,x21,x22 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zknh_sha512sig0l_cg_cp_rs2_b22, Zknh_sha512sig0l_cg_cp_rs2_b22_str) +800009d4: 000c2203 lw x4,0(x24) +800009d8: 00820863 beq x4,x8,800009e8 +800009dc: 325042ef jal x5,80005500 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 80009c0f .word 0x80009c0f +800009e8: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xc4f5d2d0 +800009ec: 0007ae03 lw x28,0(x15) +800009f0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xe3fcd560 +800009f4: 0007ab83 lw x23,0(x15) +800009f8: 00478793 addi x15,x15,4 + +800009fc : +Zknh_sha512sig0l_cg_cp_rs2_b23: + sha512sig0l x26, x28, x23 # perform operation +800009fc: 557e0d33 sha512sig0l x26,x28,x23 + # Check if x26 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x26, Zknh_sha512sig0l_cg_cp_rs2_b23, Zknh_sha512sig0l_cg_cp_rs2_b23_str) +80000a00: 000c2203 lw x4,0(x24) +80000a04: 01a20863 beq x4,x26,80000a14 +80000a08: 2f9042ef jal x5,80005500 +80000a0c: 800009fc .word 0x800009fc +80000a10: 80009c49 .word 0x80009c49 +80000a14: 004c0c13 addi x24,x24,4 + + mv x22, x24 # switch signature pointer register to avoid conflict with test +80000a18: 000c0b13 addi x22,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x214179c9 +80000a1c: 0007a903 lw x18,0(x15) +80000a20: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x1649f7fc +80000a24: 0007ac03 lw x24,0(x15) +80000a28: 00478793 addi x15,x15,4 + +80000a2c : +Zknh_sha512sig0l_cg_cp_rs2_b24: + sha512sig0l x6, x18, x24 # perform operation +80000a2c: 55890333 sha512sig0l x6,x18,x24 + # Check if x6 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x6, Zknh_sha512sig0l_cg_cp_rs2_b24, Zknh_sha512sig0l_cg_cp_rs2_b24_str) +80000a30: 000b2203 lw x4,0(x22) +80000a34: 00620863 beq x4,x6,80000a44 +80000a38: 2c9042ef jal x5,80005500 +80000a3c: 80000a2c .word 0x80000a2c +80000a40: 80009c83 .word 0x80009c83 +80000a44: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x310538f9 +80000a48: 0007a383 lw x7,0(x15) +80000a4c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x48a9ac67 +80000a50: 0007ac83 lw x25,0(x15) +80000a54: 00478793 addi x15,x15,4 + +80000a58 : +Zknh_sha512sig0l_cg_cp_rs2_b25: + sha512sig0l x11, x7, x25 # perform operation +80000a58: 559385b3 sha512sig0l x11,x7,x25 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zknh_sha512sig0l_cg_cp_rs2_b25, Zknh_sha512sig0l_cg_cp_rs2_b25_str) +80000a5c: 000b2203 lw x4,0(x22) +80000a60: 00b20863 beq x4,x11,80000a70 +80000a64: 29d042ef jal x5,80005500 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 80009cbd .word 0x80009cbd +80000a70: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xf214f7ad +80000a74: 0007a803 lw x16,0(x15) +80000a78: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x512f780a +80000a7c: 0007ad03 lw x26,0(x15) +80000a80: 00478793 addi x15,x15,4 + +80000a84 : +Zknh_sha512sig0l_cg_cp_rs2_b26: + sha512sig0l x19, x16, x26 # perform operation +80000a84: 55a809b3 sha512sig0l x19,x16,x26 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sig0l_cg_cp_rs2_b26, Zknh_sha512sig0l_cg_cp_rs2_b26_str) +80000a88: 000b2203 lw x4,0(x22) +80000a8c: 01320863 beq x4,x19,80000a9c +80000a90: 271042ef jal x5,80005500 +80000a94: 80000a84 .word 0x80000a84 +80000a98: 80009cf7 .word 0x80009cf7 +80000a9c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x1fcc1496 +80000aa0: 0007a903 lw x18,0(x15) +80000aa4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x9090b3df +80000aa8: 0007ad83 lw x27,0(x15) +80000aac: 00478793 addi x15,x15,4 + +80000ab0 : +Zknh_sha512sig0l_cg_cp_rs2_b27: + sha512sig0l x29, x18, x27 # perform operation +80000ab0: 55b90eb3 sha512sig0l x29,x18,x27 + # Check if x29 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x29, Zknh_sha512sig0l_cg_cp_rs2_b27, Zknh_sha512sig0l_cg_cp_rs2_b27_str) +80000ab4: 000b2203 lw x4,0(x22) +80000ab8: 01d20863 beq x4,x29,80000ac8 +80000abc: 245042ef jal x5,80005500 +80000ac0: 80000ab0 .word 0x80000ab0 +80000ac4: 80009d31 .word 0x80009d31 +80000ac8: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x331cd04d +80000acc: 0007a083 lw x1,0(x15) +80000ad0: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x60f17f63 +80000ad4: 0007ae03 lw x28,0(x15) +80000ad8: 00478793 addi x15,x15,4 + +80000adc : +Zknh_sha512sig0l_cg_cp_rs2_b28: + sha512sig0l x18, x1, x28 # perform operation +80000adc: 55c08933 sha512sig0l x18,x1,x28 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zknh_sha512sig0l_cg_cp_rs2_b28, Zknh_sha512sig0l_cg_cp_rs2_b28_str) +80000ae0: 000b2203 lw x4,0(x22) +80000ae4: 01220863 beq x4,x18,80000af4 +80000ae8: 219042ef jal x5,80005500 +80000aec: 80000adc .word 0x80000adc +80000af0: 80009d6b .word 0x80009d6b +80000af4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x9ad9458d +80000af8: 0007af03 lw x30,0(x15) +80000afc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x7a6f0efd +80000b00: 0007ae83 lw x29,0(x15) +80000b04: 00478793 addi x15,x15,4 + +80000b08 : +Zknh_sha512sig0l_cg_cp_rs2_b29: + sha512sig0l x18, x30, x29 # perform operation +80000b08: 55df0933 sha512sig0l x18,x30,x29 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zknh_sha512sig0l_cg_cp_rs2_b29, Zknh_sha512sig0l_cg_cp_rs2_b29_str) +80000b0c: 000b2203 lw x4,0(x22) +80000b10: 01220863 beq x4,x18,80000b20 +80000b14: 1ed042ef jal x5,80005500 +80000b18: 80000b08 .word 0x80000b08 +80000b1c: 80009da5 .word 0x80009da5 +80000b20: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x7773cd12 +80000b24: 0007af83 lw x31,0(x15) +80000b28: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xde76a47b +80000b2c: 0007af03 lw x30,0(x15) +80000b30: 00478793 addi x15,x15,4 + +80000b34 : +Zknh_sha512sig0l_cg_cp_rs2_b30: + sha512sig0l x28, x31, x30 # perform operation +80000b34: 55ef8e33 sha512sig0l x28,x31,x30 + # Check if x28 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x28, Zknh_sha512sig0l_cg_cp_rs2_b30, Zknh_sha512sig0l_cg_cp_rs2_b30_str) +80000b38: 000b2203 lw x4,0(x22) +80000b3c: 01c20863 beq x4,x28,80000b4c +80000b40: 1c1042ef jal x5,80005500 +80000b44: 80000b34 .word 0x80000b34 +80000b48: 80009ddf .word 0x80009ddf +80000b4c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xf243d188 +80000b50: 0007a583 lw x11,0(x15) +80000b54: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x3f65bc03 +80000b58: 0007af83 lw x31,0(x15) +80000b5c: 00478793 addi x15,x15,4 + +80000b60 : +Zknh_sha512sig0l_cg_cp_rs2_b31: + sha512sig0l x14, x11, x31 # perform operation +80000b60: 55f58733 sha512sig0l x14,x11,x31 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknh_sha512sig0l_cg_cp_rs2_b31, Zknh_sha512sig0l_cg_cp_rs2_b31_str) +80000b64: 000b2203 lw x4,0(x22) +80000b68: 00e20863 beq x4,x14,80000b78 +80000b6c: 195042ef jal x5,80005500 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 80009e19 .word 0x80009e19 +80000b78: 004b0b13 addi x22,x22,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x3ce8c987 +80000b7c: 0007a983 lw x19,0(x15) +80000b80: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x183e1cec +80000b84: 0007a383 lw x7,0(x15) +80000b88: 00478793 addi x15,x15,4 + +80000b8c : +Zknh_sha512sig0l_cg_cp_rd_b0: + sha512sig0l x0, x19, x7 # perform operation +80000b8c: 54798033 sha512sig0l x0,x19,x7 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zknh_sha512sig0l_cg_cp_rd_b0, Zknh_sha512sig0l_cg_cp_rd_b0_str) +80000b90: 000b2203 lw x4,0(x22) +80000b94: 00020863 beq x4,x0,80000ba4 +80000b98: 169042ef jal x5,80005500 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80009e53 .word 0x80009e53 +80000ba4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xd136c347 +80000ba8: 0007a903 lw x18,0(x15) +80000bac: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xaf5f6a8e +80000bb0: 0007a103 lw x2,0(x15) +80000bb4: 00478793 addi x15,x15,4 + +80000bb8 : +Zknh_sha512sig0l_cg_cp_rd_b1: + sha512sig0l x1, x18, x2 # perform operation +80000bb8: 542900b3 sha512sig0l x1,x18,x2 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig0l_cg_cp_rd_b1, Zknh_sha512sig0l_cg_cp_rd_b1_str) +80000bbc: 000b2203 lw x4,0(x22) +80000bc0: 00120863 beq x4,x1,80000bd0 +80000bc4: 13d042ef jal x5,80005500 +80000bc8: 80000bb8 .word 0x80000bb8 +80000bcc: 80009e8b .word 0x80009e8b +80000bd0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7b02764e +80000bd4: 0007ac83 lw x25,0(x15) +80000bd8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xab9af404 +80000bdc: 0007af03 lw x30,0(x15) +80000be0: 00478793 addi x15,x15,4 + +80000be4 : +Zknh_sha512sig0l_cg_cp_rd_b2: + sha512sig0l x2, x25, x30 # perform operation +80000be4: 55ec8133 sha512sig0l x2,x25,x30 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sig0l_cg_cp_rd_b2, Zknh_sha512sig0l_cg_cp_rd_b2_str) +80000be8: 000b2203 lw x4,0(x22) +80000bec: 00220863 beq x4,x2,80000bfc +80000bf0: 111042ef jal x5,80005500 +80000bf4: 80000be4 .word 0x80000be4 +80000bf8: 80009ec3 .word 0x80009ec3 +80000bfc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0232a8ee +80000c00: 0007ad83 lw x27,0(x15) +80000c04: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xce6f337c +80000c08: 0007af03 lw x30,0(x15) +80000c0c: 00478793 addi x15,x15,4 + +80000c10 : +Zknh_sha512sig0l_cg_cp_rd_b3: + sha512sig0l x3, x27, x30 # perform operation +80000c10: 55ed81b3 sha512sig0l x3,x27,x30 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sig0l_cg_cp_rd_b3, Zknh_sha512sig0l_cg_cp_rd_b3_str) +80000c14: 000b2203 lw x4,0(x22) +80000c18: 00320863 beq x4,x3,80000c28 +80000c1c: 0e5042ef jal x5,80005500 +80000c20: 80000c10 .word 0x80000c10 +80000c24: 80009efb .word 0x80009efb +80000c28: 004b0b13 addi x22,x22,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000c2c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000c30: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xeb0a2bd1 +80000c34: 0007a403 lw x8,0(x15) +80000c38: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xd67846f4 +80000c3c: 0007a883 lw x17,0(x15) +80000c40: 00478793 addi x15,x15,4 + +80000c44 : +Zknh_sha512sig0l_cg_cp_rd_b4: + sha512sig0l x4, x8, x17 # perform operation +80000c44: 55140233 sha512sig0l x4,x8,x17 + # Check if x4 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x4, Zknh_sha512sig0l_cg_cp_rd_b4, Zknh_sha512sig0l_cg_cp_rd_b4_str) +80000c48: 000b2683 lw x13,0(x22) +80000c4c: 00468863 beq x13,x4,80000c5c +80000c50: 0f10476f jal x14,80005540 +80000c54: 80000c44 .word 0x80000c44 +80000c58: 80009f33 .word 0x80009f33 +80000c5c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xb00c8681 +80000c60: 0007a903 lw x18,0(x15) +80000c64: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x19045934 +80000c68: 0007ab83 lw x23,0(x15) +80000c6c: 00478793 addi x15,x15,4 + +80000c70 : +Zknh_sha512sig0l_cg_cp_rd_b5: + sha512sig0l x5, x18, x23 # perform operation +80000c70: 557902b3 sha512sig0l x5,x18,x23 + # Check if x5 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x5, Zknh_sha512sig0l_cg_cp_rd_b5, Zknh_sha512sig0l_cg_cp_rd_b5_str) +80000c74: 000b2683 lw x13,0(x22) +80000c78: 00568863 beq x13,x5,80000c88 +80000c7c: 0c50476f jal x14,80005540 +80000c80: 80000c70 .word 0x80000c70 +80000c84: 80009f6b .word 0x80009f6b +80000c88: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x06608c5a +80000c8c: 0007a183 lw x3,0(x15) +80000c90: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x6d41029e +80000c94: 0007ac03 lw x24,0(x15) +80000c98: 00478793 addi x15,x15,4 + +80000c9c : +Zknh_sha512sig0l_cg_cp_rd_b6: + sha512sig0l x6, x3, x24 # perform operation +80000c9c: 55818333 sha512sig0l x6,x3,x24 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zknh_sha512sig0l_cg_cp_rd_b6, Zknh_sha512sig0l_cg_cp_rd_b6_str) +80000ca0: 000b2683 lw x13,0(x22) +80000ca4: 00668863 beq x13,x6,80000cb4 +80000ca8: 0990476f jal x14,80005540 +80000cac: 80000c9c .word 0x80000c9c +80000cb0: 80009fa3 .word 0x80009fa3 +80000cb4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x477c36da +80000cb8: 0007ae03 lw x28,0(x15) +80000cbc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xf6ce0731 +80000cc0: 0007a203 lw x4,0(x15) +80000cc4: 00478793 addi x15,x15,4 + +80000cc8 : +Zknh_sha512sig0l_cg_cp_rd_b7: + sha512sig0l x7, x28, x4 # perform operation +80000cc8: 544e03b3 sha512sig0l x7,x28,x4 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sig0l_cg_cp_rd_b7, Zknh_sha512sig0l_cg_cp_rd_b7_str) +80000ccc: 000b2683 lw x13,0(x22) +80000cd0: 00768863 beq x13,x7,80000ce0 +80000cd4: 06d0476f jal x14,80005540 +80000cd8: 80000cc8 .word 0x80000cc8 +80000cdc: 80009fdb .word 0x80009fdb +80000ce0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xce9dc096 +80000ce4: 0007ab83 lw x23,0(x15) +80000ce8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x095f6bbe +80000cec: 0007ad83 lw x27,0(x15) +80000cf0: 00478793 addi x15,x15,4 + +80000cf4 : +Zknh_sha512sig0l_cg_cp_rd_b8: + sha512sig0l x8, x23, x27 # perform operation +80000cf4: 55bb8433 sha512sig0l x8,x23,x27 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig0l_cg_cp_rd_b8, Zknh_sha512sig0l_cg_cp_rd_b8_str) +80000cf8: 000b2683 lw x13,0(x22) +80000cfc: 00868863 beq x13,x8,80000d0c +80000d00: 0410476f jal x14,80005540 +80000d04: 80000cf4 .word 0x80000cf4 +80000d08: 8000a013 .word 0x8000a013 +80000d0c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0e088c8b +80000d10: 0007af03 lw x30,0(x15) +80000d14: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xa7bae7a4 +80000d18: 0007ac83 lw x25,0(x15) +80000d1c: 00478793 addi x15,x15,4 + +80000d20 : +Zknh_sha512sig0l_cg_cp_rd_b9: + sha512sig0l x9, x30, x25 # perform operation +80000d20: 559f04b3 sha512sig0l x9,x30,x25 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sig0l_cg_cp_rd_b9, Zknh_sha512sig0l_cg_cp_rd_b9_str) +80000d24: 000b2683 lw x13,0(x22) +80000d28: 00968863 beq x13,x9,80000d38 +80000d2c: 0150476f jal x14,80005540 +80000d30: 80000d20 .word 0x80000d20 +80000d34: 8000a04b .word 0x8000a04b +80000d38: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x420b1281 +80000d3c: 0007a303 lw x6,0(x15) +80000d40: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x47dc399d +80000d44: 0007a183 lw x3,0(x15) +80000d48: 00478793 addi x15,x15,4 + +80000d4c : +Zknh_sha512sig0l_cg_cp_rd_b10: + sha512sig0l x10, x6, x3 # perform operation +80000d4c: 54330533 sha512sig0l x10,x6,x3 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sig0l_cg_cp_rd_b10, Zknh_sha512sig0l_cg_cp_rd_b10_str) +80000d50: 000b2683 lw x13,0(x22) +80000d54: 00a68863 beq x13,x10,80000d64 +80000d58: 7e80476f jal x14,80005540 +80000d5c: 80000d4c .word 0x80000d4c +80000d60: 8000a083 .word 0x8000a083 +80000d64: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xc19ee7cb +80000d68: 0007a903 lw x18,0(x15) +80000d6c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xba2efe87 +80000d70: 0007a083 lw x1,0(x15) +80000d74: 00478793 addi x15,x15,4 + +80000d78 : +Zknh_sha512sig0l_cg_cp_rd_b11: + sha512sig0l x11, x18, x1 # perform operation +80000d78: 541905b3 sha512sig0l x11,x18,x1 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sig0l_cg_cp_rd_b11, Zknh_sha512sig0l_cg_cp_rd_b11_str) +80000d7c: 000b2683 lw x13,0(x22) +80000d80: 00b68863 beq x13,x11,80000d90 +80000d84: 7bc0476f jal x14,80005540 +80000d88: 80000d78 .word 0x80000d78 +80000d8c: 8000a0bc .word 0x8000a0bc +80000d90: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x3c76de19 +80000d94: 0007a483 lw x9,0(x15) +80000d98: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x149774c0 +80000d9c: 0007a283 lw x5,0(x15) +80000da0: 00478793 addi x15,x15,4 + +80000da4 : +Zknh_sha512sig0l_cg_cp_rd_b12: + sha512sig0l x12, x9, x5 # perform operation +80000da4: 54548633 sha512sig0l x12,x9,x5 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sig0l_cg_cp_rd_b12, Zknh_sha512sig0l_cg_cp_rd_b12_str) +80000da8: 000b2683 lw x13,0(x22) +80000dac: 00c68863 beq x13,x12,80000dbc +80000db0: 7900476f jal x14,80005540 +80000db4: 80000da4 .word 0x80000da4 +80000db8: 8000a0f5 .word 0x8000a0f5 +80000dbc: 004b0b13 addi x22,x22,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dc0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dc4: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x114e981c +80000dc8: 0007a803 lw x16,0(x15) +80000dcc: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x3d7d28cf +80000dd0: 0007af03 lw x30,0(x15) +80000dd4: 00478793 addi x15,x15,4 + +80000dd8 : +Zknh_sha512sig0l_cg_cp_rd_b13: + sha512sig0l x13, x16, x30 # perform operation +80000dd8: 55e806b3 sha512sig0l x13,x16,x30 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zknh_sha512sig0l_cg_cp_rd_b13, Zknh_sha512sig0l_cg_cp_rd_b13_str) +80000ddc: 000b2383 lw x7,0(x22) +80000de0: 00d38863 beq x7,x13,80000df0 +80000de4: 7340446f jal x8,80005518 +80000de8: 80000dd8 .word 0x80000dd8 +80000dec: 8000a12e .word 0x8000a12e +80000df0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xf88b8a47 +80000df4: 0007ad83 lw x27,0(x15) +80000df8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x1f72931a +80000dfc: 0007a683 lw x13,0(x15) +80000e00: 00478793 addi x15,x15,4 + +80000e04 : +Zknh_sha512sig0l_cg_cp_rd_b14: + sha512sig0l x14, x27, x13 # perform operation +80000e04: 54dd8733 sha512sig0l x14,x27,x13 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zknh_sha512sig0l_cg_cp_rd_b14, Zknh_sha512sig0l_cg_cp_rd_b14_str) +80000e08: 000b2383 lw x7,0(x22) +80000e0c: 00e38863 beq x7,x14,80000e1c +80000e10: 7080446f jal x8,80005518 +80000e14: 80000e04 .word 0x80000e04 +80000e18: 8000a167 .word 0x8000a167 +80000e1c: 004b0b13 addi x22,x22,4 + + mv x26, x15 # switch data pointer register to avoid conflict with test +80000e20: 00078d13 addi x26,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x281b4fd6 +80000e24: 000d2883 lw x17,0(x26) +80000e28: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0xdb96b0ac +80000e2c: 000d2e83 lw x29,0(x26) +80000e30: 004d0d13 addi x26,x26,4 + +80000e34 : +Zknh_sha512sig0l_cg_cp_rd_b15: + sha512sig0l x15, x17, x29 # perform operation +80000e34: 55d887b3 sha512sig0l x15,x17,x29 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zknh_sha512sig0l_cg_cp_rd_b15, Zknh_sha512sig0l_cg_cp_rd_b15_str) +80000e38: 000b2383 lw x7,0(x22) +80000e3c: 00f38863 beq x7,x15,80000e4c +80000e40: 6d80446f jal x8,80005518 +80000e44: 80000e34 .word 0x80000e34 +80000e48: 8000a1a0 .word 0x8000a1a0 +80000e4c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x8a97dfef +80000e50: 000d2003 lw x0,0(x26) +80000e54: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xbedccfe7 +80000e58: 000d2083 lw x1,0(x26) +80000e5c: 004d0d13 addi x26,x26,4 + +80000e60 : +Zknh_sha512sig0l_cg_cp_rd_b16: + sha512sig0l x16, x0, x1 # perform operation +80000e60: 54100833 sha512sig0l x16,x0,x1 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zknh_sha512sig0l_cg_cp_rd_b16, Zknh_sha512sig0l_cg_cp_rd_b16_str) +80000e64: 000b2383 lw x7,0(x22) +80000e68: 01038863 beq x7,x16,80000e78 +80000e6c: 6ac0446f jal x8,80005518 +80000e70: 80000e60 .word 0x80000e60 +80000e74: 8000a1d9 .word 0x8000a1d9 +80000e78: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x5619dd0a +80000e7c: 000d2003 lw x0,0(x26) +80000e80: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x62950eb1 +80000e84: 000d2083 lw x1,0(x26) +80000e88: 004d0d13 addi x26,x26,4 + +80000e8c : +Zknh_sha512sig0l_cg_cp_rd_b17: + sha512sig0l x17, x0, x1 # perform operation +80000e8c: 541008b3 sha512sig0l x17,x0,x1 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknh_sha512sig0l_cg_cp_rd_b17, Zknh_sha512sig0l_cg_cp_rd_b17_str) +80000e90: 000b2383 lw x7,0(x22) +80000e94: 01138863 beq x7,x17,80000ea4 +80000e98: 6800446f jal x8,80005518 +80000e9c: 80000e8c .word 0x80000e8c +80000ea0: 8000a212 .word 0x8000a212 +80000ea4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xe631bff9 +80000ea8: 000d2983 lw x19,0(x26) +80000eac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0xd115f450 +80000eb0: 000d2d83 lw x27,0(x26) +80000eb4: 004d0d13 addi x26,x26,4 + +80000eb8 : +Zknh_sha512sig0l_cg_cp_rd_b18: + sha512sig0l x18, x19, x27 # perform operation +80000eb8: 55b98933 sha512sig0l x18,x19,x27 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig0l_cg_cp_rd_b18, Zknh_sha512sig0l_cg_cp_rd_b18_str) +80000ebc: 000b2383 lw x7,0(x22) +80000ec0: 01238863 beq x7,x18,80000ed0 +80000ec4: 6540446f jal x8,80005518 +80000ec8: 80000eb8 .word 0x80000eb8 +80000ecc: 8000a24b .word 0x8000a24b +80000ed0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x9ee855f6 +80000ed4: 000d2e83 lw x29,0(x26) +80000ed8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0x7e79c2d1 +80000edc: 000d2f03 lw x30,0(x26) +80000ee0: 004d0d13 addi x26,x26,4 + +80000ee4 : +Zknh_sha512sig0l_cg_cp_rd_b19: + sha512sig0l x19, x29, x30 # perform operation +80000ee4: 55ee89b3 sha512sig0l x19,x29,x30 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zknh_sha512sig0l_cg_cp_rd_b19, Zknh_sha512sig0l_cg_cp_rd_b19_str) +80000ee8: 000b2383 lw x7,0(x22) +80000eec: 01338863 beq x7,x19,80000efc +80000ef0: 6280446f jal x8,80005518 +80000ef4: 80000ee4 .word 0x80000ee4 +80000ef8: 8000a284 .word 0x8000a284 +80000efc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x39af8d14 +80000f00: 000d2003 lw x0,0(x26) +80000f04: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xcb3c6566 +80000f08: 000d2583 lw x11,0(x26) +80000f0c: 004d0d13 addi x26,x26,4 + +80000f10 : +Zknh_sha512sig0l_cg_cp_rd_b20: + sha512sig0l x20, x0, x11 # perform operation +80000f10: 54b00a33 sha512sig0l x20,x0,x11 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zknh_sha512sig0l_cg_cp_rd_b20, Zknh_sha512sig0l_cg_cp_rd_b20_str) +80000f14: 000b2383 lw x7,0(x22) +80000f18: 01438863 beq x7,x20,80000f28 +80000f1c: 5fc0446f jal x8,80005518 +80000f20: 80000f10 .word 0x80000f10 +80000f24: 8000a2bd .word 0x8000a2bd +80000f28: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xe3c984a4 +80000f2c: 000d2e03 lw x28,0(x26) +80000f30: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x40cf40dd +80000f34: 000d2903 lw x18,0(x26) +80000f38: 004d0d13 addi x26,x26,4 + +80000f3c : +Zknh_sha512sig0l_cg_cp_rd_b21: + sha512sig0l x21, x28, x18 # perform operation +80000f3c: 552e0ab3 sha512sig0l x21,x28,x18 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zknh_sha512sig0l_cg_cp_rd_b21, Zknh_sha512sig0l_cg_cp_rd_b21_str) +80000f40: 000b2383 lw x7,0(x22) +80000f44: 01538863 beq x7,x21,80000f54 +80000f48: 5d00446f jal x8,80005518 +80000f4c: 80000f3c .word 0x80000f3c +80000f50: 8000a2f6 .word 0x8000a2f6 +80000f54: 004b0b13 addi x22,x22,4 + + mv x15, x22 # switch signature pointer register to avoid conflict with test +80000f58: 000b0793 addi x15,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x5ad437bd +80000f5c: 000d2303 lw x6,0(x26) +80000f60: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xabd16bcc +80000f64: 000d2f03 lw x30,0(x26) +80000f68: 004d0d13 addi x26,x26,4 + +80000f6c : +Zknh_sha512sig0l_cg_cp_rd_b22: + sha512sig0l x22, x6, x30 # perform operation +80000f6c: 55e30b33 sha512sig0l x22,x6,x30 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cp_rd_b22, Zknh_sha512sig0l_cg_cp_rd_b22_str) +80000f70: 0007a383 lw x7,0(x15) +80000f74: 01638863 beq x7,x22,80000f84 +80000f78: 5a00446f jal x8,80005518 +80000f7c: 80000f6c .word 0x80000f6c +80000f80: 8000a32f .word 0x8000a32f +80000f84: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0xa0dee6b7 +80000f88: 000d2703 lw x14,0(x26) +80000f8c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x42b9c3c4 +80000f90: 000d2a03 lw x20,0(x26) +80000f94: 004d0d13 addi x26,x26,4 + +80000f98 : +Zknh_sha512sig0l_cg_cp_rd_b23: + sha512sig0l x23, x14, x20 # perform operation +80000f98: 55470bb3 sha512sig0l x23,x14,x20 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cp_rd_b23, Zknh_sha512sig0l_cg_cp_rd_b23_str) +80000f9c: 0007a383 lw x7,0(x15) +80000fa0: 01738863 beq x7,x23,80000fb0 +80000fa4: 5740446f jal x8,80005518 +80000fa8: 80000f98 .word 0x80000f98 +80000fac: 8000a368 .word 0x8000a368 +80000fb0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x88c505ec +80000fb4: 000d2503 lw x10,0(x26) +80000fb8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x3d69ea2c +80000fbc: 000d2e03 lw x28,0(x26) +80000fc0: 004d0d13 addi x26,x26,4 + +80000fc4 : +Zknh_sha512sig0l_cg_cp_rd_b24: + sha512sig0l x24, x10, x28 # perform operation +80000fc4: 55c50c33 sha512sig0l x24,x10,x28 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cp_rd_b24, Zknh_sha512sig0l_cg_cp_rd_b24_str) +80000fc8: 0007a383 lw x7,0(x15) +80000fcc: 01838863 beq x7,x24,80000fdc +80000fd0: 5480446f jal x8,80005518 +80000fd4: 80000fc4 .word 0x80000fc4 +80000fd8: 8000a3a1 .word 0x8000a3a1 +80000fdc: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs1: x27 = 0xa535a923 +80000fe0: 000d2d83 lw x27,0(x26) +80000fe4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x9a7fd37f +80000fe8: 000d2083 lw x1,0(x26) +80000fec: 004d0d13 addi x26,x26,4 + +80000ff0 : +Zknh_sha512sig0l_cg_cp_rd_b25: + sha512sig0l x25, x27, x1 # perform operation +80000ff0: 541d8cb3 sha512sig0l x25,x27,x1 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cp_rd_b25, Zknh_sha512sig0l_cg_cp_rd_b25_str) +80000ff4: 0007a383 lw x7,0(x15) +80000ff8: 01938863 beq x7,x25,80001008 +80000ffc: 51c0446f jal x8,80005518 +80001000: 80000ff0 .word 0x80000ff0 +80001004: 8000a3da .word 0x8000a3da +80001008: 00478793 addi x15,x15,4 + + mv x19, x26 # switch data pointer register to avoid conflict with test +8000100c: 000d0993 addi x19,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x8111a86a +80001010: 0009a183 lw x3,0(x19) +80001014: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x78299dde +80001018: 0009a303 lw x6,0(x19) +8000101c: 00498993 addi x19,x19,4 + +80001020 : +Zknh_sha512sig0l_cg_cp_rd_b26: + sha512sig0l x26, x3, x6 # perform operation +80001020: 54618d33 sha512sig0l x26,x3,x6 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cp_rd_b26, Zknh_sha512sig0l_cg_cp_rd_b26_str) +80001024: 0007a383 lw x7,0(x15) +80001028: 01a38863 beq x7,x26,80001038 +8000102c: 4ec0446f jal x8,80005518 +80001030: 80001020 .word 0x80001020 +80001034: 8000a413 .word 0x8000a413 +80001038: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x0398c307 +8000103c: 0009aa83 lw x21,0(x19) +80001040: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xcb7c60c9 +80001044: 0009a503 lw x10,0(x19) +80001048: 00498993 addi x19,x19,4 + +8000104c : +Zknh_sha512sig0l_cg_cp_rd_b27: + sha512sig0l x27, x21, x10 # perform operation +8000104c: 54aa8db3 sha512sig0l x27,x21,x10 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cp_rd_b27, Zknh_sha512sig0l_cg_cp_rd_b27_str) +80001050: 0007a383 lw x7,0(x15) +80001054: 01b38863 beq x7,x27,80001064 +80001058: 4c00446f jal x8,80005518 +8000105c: 8000104c .word 0x8000104c +80001060: 8000a44c .word 0x8000a44c +80001064: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x81fc9ee2 +80001068: 0009a283 lw x5,0(x19) +8000106c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0xf7136ae3 +80001070: 0009a303 lw x6,0(x19) +80001074: 00498993 addi x19,x19,4 + +80001078 : +Zknh_sha512sig0l_cg_cp_rd_b28: + sha512sig0l x28, x5, x6 # perform operation +80001078: 54628e33 sha512sig0l x28,x5,x6 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cp_rd_b28, Zknh_sha512sig0l_cg_cp_rd_b28_str) +8000107c: 0007a383 lw x7,0(x15) +80001080: 01c38863 beq x7,x28,80001090 +80001084: 4940446f jal x8,80005518 +80001088: 80001078 .word 0x80001078 +8000108c: 8000a485 .word 0x8000a485 +80001090: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x9dd504ee +80001094: 0009a803 lw x16,0(x19) +80001098: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x772cf103 +8000109c: 0009aa83 lw x21,0(x19) +800010a0: 00498993 addi x19,x19,4 + +800010a4 : +Zknh_sha512sig0l_cg_cp_rd_b29: + sha512sig0l x29, x16, x21 # perform operation +800010a4: 55580eb3 sha512sig0l x29,x16,x21 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cp_rd_b29, Zknh_sha512sig0l_cg_cp_rd_b29_str) +800010a8: 0007a383 lw x7,0(x15) +800010ac: 01d38863 beq x7,x29,800010bc +800010b0: 4680446f jal x8,80005518 +800010b4: 800010a4 .word 0x800010a4 +800010b8: 8000a4be .word 0x8000a4be +800010bc: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x1a552a07 +800010c0: 0009a203 lw x4,0(x19) +800010c4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x444a5cf9 +800010c8: 0009ae03 lw x28,0(x19) +800010cc: 00498993 addi x19,x19,4 + +800010d0 : +Zknh_sha512sig0l_cg_cp_rd_b30: + sha512sig0l x30, x4, x28 # perform operation +800010d0: 55c20f33 sha512sig0l x30,x4,x28 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zknh_sha512sig0l_cg_cp_rd_b30, Zknh_sha512sig0l_cg_cp_rd_b30_str) +800010d4: 0007a383 lw x7,0(x15) +800010d8: 01e38863 beq x7,x30,800010e8 +800010dc: 43c0446f jal x8,80005518 +800010e0: 800010d0 .word 0x800010d0 +800010e4: 8000a4f7 .word 0x8000a4f7 +800010e8: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x92476222 +800010ec: 0009af03 lw x30,0(x19) +800010f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xa3a4b888 +800010f4: 0009a883 lw x17,0(x19) +800010f8: 00498993 addi x19,x19,4 + +800010fc : +Zknh_sha512sig0l_cg_cp_rd_b31: + sha512sig0l x31, x30, x17 # perform operation +800010fc: 551f0fb3 sha512sig0l x31,x30,x17 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cp_rd_b31, Zknh_sha512sig0l_cg_cp_rd_b31_str) +80001100: 0007a383 lw x7,0(x15) +80001104: 01f38863 beq x7,x31,80001114 +80001108: 4100446f jal x8,80005518 +8000110c: 800010fc .word 0x800010fc +80001110: 8000a530 .word 0x8000a530 +80001114: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x00000000 +80001118: 0009a083 lw x1,0(x19) +8000111c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x041f5641 +80001120: 0009ac03 lw x24,0(x19) +80001124: 00498993 addi x19,x19,4 + +80001128 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x0: + sha512sig0l x16, x1, x24 # perform operation +80001128: 55808833 sha512sig0l x16,x1,x24 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknh_sha512sig0l_cg_cp_rs1_edges_0x0, Zknh_sha512sig0l_cg_cp_rs1_edges_0x0_str) +8000112c: 0007a383 lw x7,0(x15) +80001130: 01038863 beq x7,x16,80001140 +80001134: 3e40446f jal x8,80005518 +80001138: 80001128 .word 0x80001128 +8000113c: 8000a569 .word 0x8000a569 +80001140: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x00000001 +80001144: 0009ac03 lw x24,0(x19) +80001148: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0xaf73ba36 +8000114c: 0009aa03 lw x20,0(x19) +80001150: 00498993 addi x19,x19,4 + +80001154 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x1: + sha512sig0l x11, x24, x20 # perform operation +80001154: 554c05b3 sha512sig0l x11,x24,x20 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zknh_sha512sig0l_cg_cp_rs1_edges_0x1, Zknh_sha512sig0l_cg_cp_rs1_edges_0x1_str) +80001158: 0007a383 lw x7,0(x15) +8000115c: 00b38863 beq x7,x11,8000116c +80001160: 3b80446f jal x8,80005518 +80001164: 80001154 .word 0x80001154 +80001168: 8000a5a9 .word 0x8000a5a9 +8000116c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x00000002 +80001170: 0009a183 lw x3,0(x19) +80001174: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x6346349a +80001178: 0009a903 lw x18,0(x19) +8000117c: 00498993 addi x19,x19,4 + +80001180 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x2: + sha512sig0l x23, x3, x18 # perform operation +80001180: 55218bb3 sha512sig0l x23,x3,x18 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cp_rs1_edges_0x2, Zknh_sha512sig0l_cg_cp_rs1_edges_0x2_str) +80001184: 0007a383 lw x7,0(x15) +80001188: 01738863 beq x7,x23,80001198 +8000118c: 38c0446f jal x8,80005518 +80001190: 80001180 .word 0x80001180 +80001194: 8000a5e9 .word 0x8000a5e9 +80001198: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x80000000 +8000119c: 0009af83 lw x31,0(x19) +800011a0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xd473b9f6 +800011a4: 0009ab03 lw x22,0(x19) +800011a8: 00498993 addi x19,x19,4 + +800011ac : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000000: + sha512sig0l x9, x31, x22 # perform operation +800011ac: 556f84b3 sha512sig0l x9,x31,x22 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000000, Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000000_str) +800011b0: 0007a383 lw x7,0(x15) +800011b4: 00938863 beq x7,x9,800011c4 +800011b8: 3600446f jal x8,80005518 +800011bc: 800011ac .word 0x800011ac +800011c0: 8000a629 .word 0x8000a629 +800011c4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x80000001 +800011c8: 0009af03 lw x30,0(x19) +800011cc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0xc201541a +800011d0: 0009ae83 lw x29,0(x19) +800011d4: 00498993 addi x19,x19,4 + +800011d8 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000001: + sha512sig0l x12, x30, x29 # perform operation +800011d8: 55df0633 sha512sig0l x12,x30,x29 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000001, Zknh_sha512sig0l_cg_cp_rs1_edges_0x80000001_str) +800011dc: 0007a383 lw x7,0(x15) +800011e0: 00c38863 beq x7,x12,800011f0 +800011e4: 3340446f jal x8,80005518 +800011e8: 800011d8 .word 0x800011d8 +800011ec: 8000a671 .word 0x8000a671 +800011f0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x7fffffff +800011f4: 0009a683 lw x13,0(x19) +800011f8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0xfb9687b1 +800011fc: 0009a183 lw x3,0(x19) +80001200: 00498993 addi x19,x19,4 + +80001204 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x7fffffff: + sha512sig0l x14, x13, x3 # perform operation +80001204: 54368733 sha512sig0l x14,x13,x3 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sig0l_cg_cp_rs1_edges_0x7fffffff_str) +80001208: 0007a383 lw x7,0(x15) +8000120c: 00e38863 beq x7,x14,8000121c +80001210: 3080446f jal x8,80005518 +80001214: 80001204 .word 0x80001204 +80001218: 8000a6b9 .word 0x8000a6b9 +8000121c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x7ffffffe +80001220: 0009aa83 lw x21,0(x19) +80001224: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xe4cde536 +80001228: 0009af03 lw x30,0(x19) +8000122c: 00498993 addi x19,x19,4 + +80001230 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x7ffffffe: + sha512sig0l x29, x21, x30 # perform operation +80001230: 55ea8eb3 sha512sig0l x29,x21,x30 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sig0l_cg_cp_rs1_edges_0x7ffffffe_str) +80001234: 0007a383 lw x7,0(x15) +80001238: 01d38863 beq x7,x29,80001248 +8000123c: 2dc0446f jal x8,80005518 +80001240: 80001230 .word 0x80001230 +80001244: 8000a701 .word 0x8000a701 +80001248: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xffffffff +8000124c: 0009a183 lw x3,0(x19) +80001250: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0xa16beff7 +80001254: 0009a203 lw x4,0(x19) +80001258: 00498993 addi x19,x19,4 + +8000125c : +Zknh_sha512sig0l_cg_cp_rs1_edges_0xffffffff: + sha512sig0l x27, x3, x4 # perform operation +8000125c: 54418db3 sha512sig0l x27,x3,x4 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig0l_cg_cp_rs1_edges_0xffffffff_str) +80001260: 0007a383 lw x7,0(x15) +80001264: 01b38863 beq x7,x27,80001274 +80001268: 2b00446f jal x8,80005518 +8000126c: 8000125c .word 0x8000125c +80001270: 8000a749 .word 0x8000a749 +80001274: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0xfffffffe +80001278: 0009ad83 lw x27,0(x19) +8000127c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0xadd8a3a4 +80001280: 0009ae83 lw x29,0(x19) +80001284: 00498993 addi x19,x19,4 + +80001288 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0xfffffffe: + sha512sig0l x28, x27, x29 # perform operation +80001288: 55dd8e33 sha512sig0l x28,x27,x29 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig0l_cg_cp_rs1_edges_0xfffffffe_str) +8000128c: 0007a383 lw x7,0(x15) +80001290: 01c38863 beq x7,x28,800012a0 +80001294: 2840446f jal x8,80005518 +80001298: 80001288 .word 0x80001288 +8000129c: 8000a791 .word 0x8000a791 +800012a0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x5bbc8872 +800012a4: 0009af03 lw x30,0(x19) +800012a8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x0fbfa53a +800012ac: 0009af83 lw x31,0(x19) +800012b0: 00498993 addi x19,x19,4 + +800012b4 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x5bbc8872: + sha512sig0l x18, x30, x31 # perform operation +800012b4: 55ff0933 sha512sig0l x18,x30,x31 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zknh_sha512sig0l_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sig0l_cg_cp_rs1_edges_0x5bbc8872_str) +800012b8: 0007a383 lw x7,0(x15) +800012bc: 01238863 beq x7,x18,800012cc +800012c0: 2580446f jal x8,80005518 +800012c4: 800012b4 .word 0x800012b4 +800012c8: 8000a7d9 .word 0x8000a7d9 +800012cc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xaaaaaaaa +800012d0: 0009a203 lw x4,0(x19) +800012d4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x366149f5 +800012d8: 0009ae83 lw x29,0(x19) +800012dc: 00498993 addi x19,x19,4 + +800012e0 : +Zknh_sha512sig0l_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sig0l x13, x4, x29 # perform operation +800012e0: 55d206b3 sha512sig0l x13,x4,x29 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sig0l_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012e4: 0007a383 lw x7,0(x15) +800012e8: 00d38863 beq x7,x13,800012f8 +800012ec: 22c0446f jal x8,80005518 +800012f0: 800012e0 .word 0x800012e0 +800012f4: 8000a821 .word 0x8000a821 +800012f8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x55555555 +800012fc: 0009ad83 lw x27,0(x19) +80001300: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x306f199f +80001304: 0009af83 lw x31,0(x19) +80001308: 00498993 addi x19,x19,4 + +8000130c : +Zknh_sha512sig0l_cg_cp_rs1_edges_0x55555555: + sha512sig0l x22, x27, x31 # perform operation +8000130c: 55fd8b33 sha512sig0l x22,x27,x31 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cp_rs1_edges_0x55555555, Zknh_sha512sig0l_cg_cp_rs1_edges_0x55555555_str) +80001310: 0007a383 lw x7,0(x15) +80001314: 01638863 beq x7,x22,80001324 +80001318: 2000446f jal x8,80005518 +8000131c: 8000130c .word 0x8000130c +80001320: 8000a869 .word 0x8000a869 +80001324: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x3555de26 +80001328: 0009ae83 lw x29,0(x19) +8000132c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x00000000 +80001330: 0009a283 lw x5,0(x19) +80001334: 00498993 addi x19,x19,4 + +80001338 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x0: + sha512sig0l x31, x29, x5 # perform operation +80001338: 545e8fb3 sha512sig0l x31,x29,x5 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cp_rs2_edges_0x0, Zknh_sha512sig0l_cg_cp_rs2_edges_0x0_str) +8000133c: 0007a383 lw x7,0(x15) +80001340: 01f38863 beq x7,x31,80001350 +80001344: 1d40446f jal x8,80005518 +80001348: 80001338 .word 0x80001338 +8000134c: 8000a8b1 .word 0x8000a8b1 +80001350: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0xa8c762b0 +80001354: 0009ad83 lw x27,0(x19) +80001358: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x00000001 +8000135c: 0009aa83 lw x21,0(x19) +80001360: 00498993 addi x19,x19,4 + +80001364 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x1: + sha512sig0l x30, x27, x21 # perform operation +80001364: 555d8f33 sha512sig0l x30,x27,x21 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zknh_sha512sig0l_cg_cp_rs2_edges_0x1, Zknh_sha512sig0l_cg_cp_rs2_edges_0x1_str) +80001368: 0007a383 lw x7,0(x15) +8000136c: 01e38863 beq x7,x30,8000137c +80001370: 1a80446f jal x8,80005518 +80001374: 80001364 .word 0x80001364 +80001378: 8000a8f2 .word 0x8000a8f2 +8000137c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x4f874a3f +80001380: 0009a283 lw x5,0(x19) +80001384: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x00000002 +80001388: 0009a183 lw x3,0(x19) +8000138c: 00498993 addi x19,x19,4 + +80001390 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x2: + sha512sig0l x13, x5, x3 # perform operation +80001390: 543286b3 sha512sig0l x13,x5,x3 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cp_rs2_edges_0x2, Zknh_sha512sig0l_cg_cp_rs2_edges_0x2_str) +80001394: 0007a383 lw x7,0(x15) +80001398: 00d38863 beq x7,x13,800013a8 +8000139c: 17c0446f jal x8,80005518 +800013a0: 80001390 .word 0x80001390 +800013a4: 8000a933 .word 0x8000a933 +800013a8: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xcaa0a503 +800013ac: 0009a183 lw x3,0(x19) +800013b0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x80000000 +800013b4: 0009a703 lw x14,0(x19) +800013b8: 00498993 addi x19,x19,4 + +800013bc : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000000: + sha512sig0l x6, x3, x14 # perform operation +800013bc: 54e18333 sha512sig0l x6,x3,x14 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000000, Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000000_str) +800013c0: 0007a383 lw x7,0(x15) +800013c4: 00638863 beq x7,x6,800013d4 +800013c8: 1500446f jal x8,80005518 +800013cc: 800013bc .word 0x800013bc +800013d0: 8000a974 .word 0x8000a974 +800013d4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x45ee4013 +800013d8: 0009a903 lw x18,0(x19) +800013dc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x80000001 +800013e0: 0009a283 lw x5,0(x19) +800013e4: 00498993 addi x19,x19,4 + +800013e8 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000001: + sha512sig0l x23, x18, x5 # perform operation +800013e8: 54590bb3 sha512sig0l x23,x18,x5 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000001, Zknh_sha512sig0l_cg_cp_rs2_edges_0x80000001_str) +800013ec: 0007a383 lw x7,0(x15) +800013f0: 01738863 beq x7,x23,80001400 +800013f4: 1240446f jal x8,80005518 +800013f8: 800013e8 .word 0x800013e8 +800013fc: 8000a9bc .word 0x8000a9bc +80001400: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xb4e3ce3a +80001404: 0009a583 lw x11,0(x19) +80001408: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x7fffffff +8000140c: 0009a183 lw x3,0(x19) +80001410: 00498993 addi x19,x19,4 + +80001414 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x7fffffff: + sha512sig0l x4, x11, x3 # perform operation +80001414: 54358233 sha512sig0l x4,x11,x3 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sig0l_cg_cp_rs2_edges_0x7fffffff_str) +80001418: 0007a383 lw x7,0(x15) +8000141c: 00438863 beq x7,x4,8000142c +80001420: 0f80446f jal x8,80005518 +80001424: 80001414 .word 0x80001414 +80001428: 8000aa04 .word 0x8000aa04 +8000142c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x059c8e60 +80001430: 0009ad83 lw x27,0(x19) +80001434: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x7ffffffe +80001438: 0009af83 lw x31,0(x19) +8000143c: 00498993 addi x19,x19,4 + +80001440 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x7ffffffe: + sha512sig0l x22, x27, x31 # perform operation +80001440: 55fd8b33 sha512sig0l x22,x27,x31 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sig0l_cg_cp_rs2_edges_0x7ffffffe_str) +80001444: 0007a383 lw x7,0(x15) +80001448: 01638863 beq x7,x22,80001458 +8000144c: 0cc0446f jal x8,80005518 +80001450: 80001440 .word 0x80001440 +80001454: 8000aa4c .word 0x8000aa4c +80001458: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x63da75f2 +8000145c: 0009ae03 lw x28,0(x19) +80001460: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0xffffffff +80001464: 0009a283 lw x5,0(x19) +80001468: 00498993 addi x19,x19,4 + +8000146c : +Zknh_sha512sig0l_cg_cp_rs2_edges_0xffffffff: + sha512sig0l x10, x28, x5 # perform operation +8000146c: 545e0533 sha512sig0l x10,x28,x5 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sig0l_cg_cp_rs2_edges_0xffffffff_str) +80001470: 0007a383 lw x7,0(x15) +80001474: 00a38863 beq x7,x10,80001484 +80001478: 0a00446f jal x8,80005518 +8000147c: 8000146c .word 0x8000146c +80001480: 8000aa94 .word 0x8000aa94 +80001484: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x11137e08 +80001488: 0009a183 lw x3,0(x19) +8000148c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xfffffffe +80001490: 0009a883 lw x17,0(x19) +80001494: 00498993 addi x19,x19,4 + +80001498 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0xfffffffe: + sha512sig0l x6, x3, x17 # perform operation +80001498: 55118333 sha512sig0l x6,x3,x17 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sig0l_cg_cp_rs2_edges_0xfffffffe_str) +8000149c: 0007a383 lw x7,0(x15) +800014a0: 00638863 beq x7,x6,800014b0 +800014a4: 0740446f jal x8,80005518 +800014a8: 80001498 .word 0x80001498 +800014ac: 8000aadc .word 0x8000aadc +800014b0: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xb2b3dce1 +800014b4: 0009ab83 lw x23,0(x19) +800014b8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x5bbc8872 +800014bc: 0009a703 lw x14,0(x19) +800014c0: 00498993 addi x19,x19,4 + +800014c4 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x5bbc8872: + sha512sig0l x12, x23, x14 # perform operation +800014c4: 54eb8633 sha512sig0l x12,x23,x14 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sig0l_cg_cp_rs2_edges_0x5bbc8872_str) +800014c8: 0007a383 lw x7,0(x15) +800014cc: 00c38863 beq x7,x12,800014dc +800014d0: 0480446f jal x8,80005518 +800014d4: 800014c4 .word 0x800014c4 +800014d8: 8000ab24 .word 0x8000ab24 +800014dc: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x4a77d11c +800014e0: 0009a803 lw x16,0(x19) +800014e4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xaaaaaaaa +800014e8: 0009ad83 lw x27,0(x19) +800014ec: 00498993 addi x19,x19,4 + +800014f0 : +Zknh_sha512sig0l_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sig0l x20, x16, x27 # perform operation +800014f0: 55b80a33 sha512sig0l x20,x16,x27 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sig0l_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014f4: 0007a383 lw x7,0(x15) +800014f8: 01438863 beq x7,x20,80001508 +800014fc: 01c0446f jal x8,80005518 +80001500: 800014f0 .word 0x800014f0 +80001504: 8000ab6c .word 0x8000ab6c +80001508: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x441d8a9c +8000150c: 0009a303 lw x6,0(x19) +80001510: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x55555555 +80001514: 0009ad83 lw x27,0(x19) +80001518: 00498993 addi x19,x19,4 + +8000151c : +Zknh_sha512sig0l_cg_cp_rs2_edges_0x55555555: + sha512sig0l x28, x6, x27 # perform operation +8000151c: 55b30e33 sha512sig0l x28,x6,x27 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cp_rs2_edges_0x55555555, Zknh_sha512sig0l_cg_cp_rs2_edges_0x55555555_str) +80001520: 0007a383 lw x7,0(x15) +80001524: 01c38863 beq x7,x28,80001534 +80001528: 7f10346f jal x8,80005518 +8000152c: 8000151c .word 0x8000151c +80001530: 8000abb4 .word 0x8000abb4 +80001534: 00478793 addi x15,x15,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x00000000 +80001538: 0009a803 lw x16,0(x19) +8000153c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x00000000 +80001540: 0009a483 lw x9,0(x19) +80001544: 00498993 addi x19,x19,4 + +80001548 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sig0l x4, x16, x9 # perform operation +80001548: 54980233 sha512sig0l x4,x16,x9 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000154c: 0007a383 lw x7,0(x15) +80001550: 00438863 beq x7,x4,80001560 +80001554: 7c50346f jal x8,80005518 +80001558: 80001548 .word 0x80001548 +8000155c: 8000abfc .word 0x8000abfc +80001560: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x00000000 +80001564: 0009a903 lw x18,0(x19) +80001568: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x00000001 +8000156c: 0009ad03 lw x26,0(x19) +80001570: 00498993 addi x19,x19,4 + +80001574 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sig0l x24, x18, x26 # perform operation +80001574: 55a90c33 sha512sig0l x24,x18,x26 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001578: 0007a383 lw x7,0(x15) +8000157c: 01838863 beq x7,x24,8000158c +80001580: 7990346f jal x8,80005518 +80001584: 80001574 .word 0x80001574 +80001588: 8000ac54 .word 0x8000ac54 +8000158c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x00000000 +80001590: 0009a283 lw x5,0(x19) +80001594: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x00000002 +80001598: 0009a303 lw x6,0(x19) +8000159c: 00498993 addi x19,x19,4 + +800015a0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sig0l x2, x5, x6 # perform operation +800015a0: 54628133 sha512sig0l x2,x5,x6 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015a4: 0007a383 lw x7,0(x15) +800015a8: 00238863 beq x7,x2,800015b8 +800015ac: 76d0346f jal x8,80005518 +800015b0: 800015a0 .word 0x800015a0 +800015b4: 8000acac .word 0x8000acac +800015b8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x00000000 +800015bc: 0009ac03 lw x24,0(x19) +800015c0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x80000000 +800015c4: 0009a703 lw x14,0(x19) +800015c8: 00498993 addi x19,x19,4 + +800015cc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sig0l x23, x24, x14 # perform operation +800015cc: 54ec0bb3 sha512sig0l x23,x24,x14 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015d0: 0007a383 lw x7,0(x15) +800015d4: 01738863 beq x7,x23,800015e4 +800015d8: 7410346f jal x8,80005518 +800015dc: 800015cc .word 0x800015cc +800015e0: 8000ad04 .word 0x8000ad04 +800015e4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x00000000 +800015e8: 0009ac03 lw x24,0(x19) +800015ec: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x80000001 +800015f0: 0009a803 lw x16,0(x19) +800015f4: 00498993 addi x19,x19,4 + +800015f8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sig0l x5, x24, x16 # perform operation +800015f8: 550c02b3 sha512sig0l x5,x24,x16 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +800015fc: 0007a383 lw x7,0(x15) +80001600: 00538863 beq x7,x5,80001610 +80001604: 7150346f jal x8,80005518 +80001608: 800015f8 .word 0x800015f8 +8000160c: 8000ad63 .word 0x8000ad63 +80001610: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x00000000 +80001614: 0009a583 lw x11,0(x19) +80001618: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x7fffffff +8000161c: 0009a083 lw x1,0(x19) +80001620: 00498993 addi x19,x19,4 + +80001624 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sig0l x14, x11, x1 # perform operation +80001624: 54158733 sha512sig0l x14,x11,x1 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001628: 0007a383 lw x7,0(x15) +8000162c: 00e38863 beq x7,x14,8000163c +80001630: 6e90346f jal x8,80005518 +80001634: 80001624 .word 0x80001624 +80001638: 8000adc2 .word 0x8000adc2 +8000163c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x00000000 +80001640: 0009a203 lw x4,0(x19) +80001644: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x7ffffffe +80001648: 0009aa03 lw x20,0(x19) +8000164c: 00498993 addi x19,x19,4 + +80001650 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sig0l x14, x4, x20 # perform operation +80001650: 55420733 sha512sig0l x14,x4,x20 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001654: 0007a383 lw x7,0(x15) +80001658: 00e38863 beq x7,x14,80001668 +8000165c: 6bd0346f jal x8,80005518 +80001660: 80001650 .word 0x80001650 +80001664: 8000ae21 .word 0x8000ae21 +80001668: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x00000000 +8000166c: 0009a503 lw x10,0(x19) +80001670: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xffffffff +80001674: 0009a883 lw x17,0(x19) +80001678: 00498993 addi x19,x19,4 + +8000167c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sig0l x6, x10, x17 # perform operation +8000167c: 55150333 sha512sig0l x6,x10,x17 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001680: 0007a383 lw x7,0(x15) +80001684: 00638863 beq x7,x6,80001694 +80001688: 6910346f jal x8,80005518 +8000168c: 8000167c .word 0x8000167c +80001690: 8000ae80 .word 0x8000ae80 +80001694: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x00000000 +80001698: 0009ad03 lw x26,0(x19) +8000169c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0xfffffffe +800016a0: 0009ab83 lw x23,0(x19) +800016a4: 00498993 addi x19,x19,4 + +800016a8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sig0l x17, x26, x23 # perform operation +800016a8: 557d08b3 sha512sig0l x17,x26,x23 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016ac: 0007a383 lw x7,0(x15) +800016b0: 01138863 beq x7,x17,800016c0 +800016b4: 6650346f jal x8,80005518 +800016b8: 800016a8 .word 0x800016a8 +800016bc: 8000aedf .word 0x8000aedf +800016c0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x00000000 +800016c4: 0009a583 lw x11,0(x19) +800016c8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x5bbc8872 +800016cc: 0009ae83 lw x29,0(x19) +800016d0: 00498993 addi x19,x19,4 + +800016d4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sig0l x20, x11, x29 # perform operation +800016d4: 55d58a33 sha512sig0l x20,x11,x29 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016d8: 0007a383 lw x7,0(x15) +800016dc: 01438863 beq x7,x20,800016ec +800016e0: 6390346f jal x8,80005518 +800016e4: 800016d4 .word 0x800016d4 +800016e8: 8000af3e .word 0x8000af3e +800016ec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x00000000 +800016f0: 0009af03 lw x30,0(x19) +800016f4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xaaaaaaaa +800016f8: 0009ad83 lw x27,0(x19) +800016fc: 00498993 addi x19,x19,4 + +80001700 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sig0l x13, x30, x27 # perform operation +80001700: 55bf06b3 sha512sig0l x13,x30,x27 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001704: 0007a383 lw x7,0(x15) +80001708: 00d38863 beq x7,x13,80001718 +8000170c: 60d0346f jal x8,80005518 +80001710: 80001700 .word 0x80001700 +80001714: 8000af9d .word 0x8000af9d +80001718: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x00000000 +8000171c: 0009aa83 lw x21,0(x19) +80001720: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x55555555 +80001724: 0009a603 lw x12,0(x19) +80001728: 00498993 addi x19,x19,4 + +8000172c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sig0l x4, x21, x12 # perform operation +8000172c: 54ca8233 sha512sig0l x4,x21,x12 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001730: 0007a383 lw x7,0(x15) +80001734: 00438863 beq x7,x4,80001744 +80001738: 5e10346f jal x8,80005518 +8000173c: 8000172c .word 0x8000172c +80001740: 8000affc .word 0x8000affc +80001744: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0x00000001 +80001748: 0009a103 lw x2,0(x19) +8000174c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x00000000 +80001750: 0009a303 lw x6,0(x19) +80001754: 00498993 addi x19,x19,4 + +80001758 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sig0l x26, x2, x6 # perform operation +80001758: 54610d33 sha512sig0l x26,x2,x6 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000175c: 0007a383 lw x7,0(x15) +80001760: 01a38863 beq x7,x26,80001770 +80001764: 5b50346f jal x8,80005518 +80001768: 80001758 .word 0x80001758 +8000176c: 8000b05b .word 0x8000b05b +80001770: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x00000001 +80001774: 0009a603 lw x12,0(x19) +80001778: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x00000001 +8000177c: 0009ae03 lw x28,0(x19) +80001780: 00498993 addi x19,x19,4 + +80001784 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sig0l x26, x12, x28 # perform operation +80001784: 55c60d33 sha512sig0l x26,x12,x28 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001788: 0007a383 lw x7,0(x15) +8000178c: 01a38863 beq x7,x26,8000179c +80001790: 5890346f jal x8,80005518 +80001794: 80001784 .word 0x80001784 +80001798: 8000b0b3 .word 0x8000b0b3 +8000179c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x00000001 +800017a0: 0009a883 lw x17,0(x19) +800017a4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x00000002 +800017a8: 0009af83 lw x31,0(x19) +800017ac: 00498993 addi x19,x19,4 + +800017b0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sig0l x6, x17, x31 # perform operation +800017b0: 55f88333 sha512sig0l x6,x17,x31 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017b4: 0007a383 lw x7,0(x15) +800017b8: 00638863 beq x7,x6,800017c8 +800017bc: 55d0346f jal x8,80005518 +800017c0: 800017b0 .word 0x800017b0 +800017c4: 8000b10b .word 0x8000b10b +800017c8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x00000001 +800017cc: 0009ae03 lw x28,0(x19) +800017d0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x80000000 +800017d4: 0009af03 lw x30,0(x19) +800017d8: 00498993 addi x19,x19,4 + +800017dc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sig0l x10, x28, x30 # perform operation +800017dc: 55ee0533 sha512sig0l x10,x28,x30 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017e0: 0007a383 lw x7,0(x15) +800017e4: 00a38863 beq x7,x10,800017f4 +800017e8: 5310346f jal x8,80005518 +800017ec: 800017dc .word 0x800017dc +800017f0: 8000b163 .word 0x8000b163 +800017f4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0x00000001 +800017f8: 0009a103 lw x2,0(x19) +800017fc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x80000001 +80001800: 0009af03 lw x30,0(x19) +80001804: 00498993 addi x19,x19,4 + +80001808 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sig0l x12, x2, x30 # perform operation +80001808: 55e10633 sha512sig0l x12,x2,x30 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000180c: 0007a383 lw x7,0(x15) +80001810: 00c38863 beq x7,x12,80001820 +80001814: 5050346f jal x8,80005518 +80001818: 80001808 .word 0x80001808 +8000181c: 8000b1c2 .word 0x8000b1c2 +80001820: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x00000001 +80001824: 0009a703 lw x14,0(x19) +80001828: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x7fffffff +8000182c: 0009ad03 lw x26,0(x19) +80001830: 00498993 addi x19,x19,4 + +80001834 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sig0l x22, x14, x26 # perform operation +80001834: 55a70b33 sha512sig0l x22,x14,x26 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001838: 0007a383 lw x7,0(x15) +8000183c: 01638863 beq x7,x22,8000184c +80001840: 4d90346f jal x8,80005518 +80001844: 80001834 .word 0x80001834 +80001848: 8000b221 .word 0x8000b221 +8000184c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x00000001 +80001850: 0009a503 lw x10,0(x19) +80001854: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x7ffffffe +80001858: 0009a903 lw x18,0(x19) +8000185c: 00498993 addi x19,x19,4 + +80001860 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sig0l x6, x10, x18 # perform operation +80001860: 55250333 sha512sig0l x6,x10,x18 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001864: 0007a383 lw x7,0(x15) +80001868: 00638863 beq x7,x6,80001878 +8000186c: 4ad0346f jal x8,80005518 +80001870: 80001860 .word 0x80001860 +80001874: 8000b280 .word 0x8000b280 +80001878: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x00000001 +8000187c: 0009a303 lw x6,0(x19) +80001880: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xffffffff +80001884: 0009a703 lw x14,0(x19) +80001888: 00498993 addi x19,x19,4 + +8000188c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sig0l x28, x6, x14 # perform operation +8000188c: 54e30e33 sha512sig0l x28,x6,x14 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +80001890: 0007a383 lw x7,0(x15) +80001894: 01c38863 beq x7,x28,800018a4 +80001898: 4810346f jal x8,80005518 +8000189c: 8000188c .word 0x8000188c +800018a0: 8000b2df .word 0x8000b2df +800018a4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x00000001 +800018a8: 0009af83 lw x31,0(x19) +800018ac: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0xfffffffe +800018b0: 0009ac83 lw x25,0(x19) +800018b4: 00498993 addi x19,x19,4 + +800018b8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sig0l x26, x31, x25 # perform operation +800018b8: 559f8d33 sha512sig0l x26,x31,x25 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018bc: 0007a383 lw x7,0(x15) +800018c0: 01a38863 beq x7,x26,800018d0 +800018c4: 4550346f jal x8,80005518 +800018c8: 800018b8 .word 0x800018b8 +800018cc: 8000b33e .word 0x8000b33e +800018d0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x00000001 +800018d4: 0009a083 lw x1,0(x19) +800018d8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x5bbc8872 +800018dc: 0009ab03 lw x22,0(x19) +800018e0: 00498993 addi x19,x19,4 + +800018e4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sig0l x20, x1, x22 # perform operation +800018e4: 55608a33 sha512sig0l x20,x1,x22 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018e8: 0007a383 lw x7,0(x15) +800018ec: 01438863 beq x7,x20,800018fc +800018f0: 4290346f jal x8,80005518 +800018f4: 800018e4 .word 0x800018e4 +800018f8: 8000b39d .word 0x8000b39d +800018fc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x00000001 +80001900: 0009a503 lw x10,0(x19) +80001904: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xaaaaaaaa +80001908: 0009a803 lw x16,0(x19) +8000190c: 00498993 addi x19,x19,4 + +80001910 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sig0l x1, x10, x16 # perform operation +80001910: 550500b3 sha512sig0l x1,x10,x16 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001914: 0007a383 lw x7,0(x15) +80001918: 00138863 beq x7,x1,80001928 +8000191c: 3fd0346f jal x8,80005518 +80001920: 80001910 .word 0x80001910 +80001924: 8000b3fc .word 0x8000b3fc +80001928: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x00000001 +8000192c: 0009a883 lw x17,0(x19) +80001930: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x55555555 +80001934: 0009a183 lw x3,0(x19) +80001938: 00498993 addi x19,x19,4 + +8000193c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sig0l x20, x17, x3 # perform operation +8000193c: 54388a33 sha512sig0l x20,x17,x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001940: 0007a383 lw x7,0(x15) +80001944: 01438863 beq x7,x20,80001954 +80001948: 3d10346f jal x8,80005518 +8000194c: 8000193c .word 0x8000193c +80001950: 8000b45b .word 0x8000b45b +80001954: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x00000002 +80001958: 0009a603 lw x12,0(x19) +8000195c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x00000000 +80001960: 0009ad03 lw x26,0(x19) +80001964: 00498993 addi x19,x19,4 + +80001968 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sig0l x23, x12, x26 # perform operation +80001968: 55a60bb3 sha512sig0l x23,x12,x26 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000196c: 0007a383 lw x7,0(x15) +80001970: 01738863 beq x7,x23,80001980 +80001974: 3a50346f jal x8,80005518 +80001978: 80001968 .word 0x80001968 +8000197c: 8000b4ba .word 0x8000b4ba +80001980: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0x00000002 +80001984: 0009a103 lw x2,0(x19) +80001988: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x00000001 +8000198c: 0009a883 lw x17,0(x19) +80001990: 00498993 addi x19,x19,4 + +80001994 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sig0l x4, x2, x17 # perform operation +80001994: 55110233 sha512sig0l x4,x2,x17 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +80001998: 0007a383 lw x7,0(x15) +8000199c: 00438863 beq x7,x4,800019ac +800019a0: 3790346f jal x8,80005518 +800019a4: 80001994 .word 0x80001994 +800019a8: 8000b512 .word 0x8000b512 +800019ac: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x00000002 +800019b0: 0009a503 lw x10,0(x19) +800019b4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x00000002 +800019b8: 0009ad03 lw x26,0(x19) +800019bc: 00498993 addi x19,x19,4 + +800019c0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sig0l x20, x10, x26 # perform operation +800019c0: 55a50a33 sha512sig0l x20,x10,x26 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019c4: 0007a383 lw x7,0(x15) +800019c8: 01438863 beq x7,x20,800019d8 +800019cc: 34d0346f jal x8,80005518 +800019d0: 800019c0 .word 0x800019c0 +800019d4: 8000b56a .word 0x8000b56a +800019d8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x00000002 +800019dc: 0009ad83 lw x27,0(x19) +800019e0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x80000000 +800019e4: 0009ae03 lw x28,0(x19) +800019e8: 00498993 addi x19,x19,4 + +800019ec : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sig0l x3, x27, x28 # perform operation +800019ec: 55cd81b3 sha512sig0l x3,x27,x28 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019f0: 0007a383 lw x7,0(x15) +800019f4: 00338863 beq x7,x3,80001a04 +800019f8: 3210346f jal x8,80005518 +800019fc: 800019ec .word 0x800019ec +80001a00: 8000b5c2 .word 0x8000b5c2 +80001a04: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x00000002 +80001a08: 0009ab03 lw x22,0(x19) +80001a0c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x80000001 +80001a10: 0009a503 lw x10,0(x19) +80001a14: 00498993 addi x19,x19,4 + +80001a18 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sig0l x4, x22, x10 # perform operation +80001a18: 54ab0233 sha512sig0l x4,x22,x10 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a1c: 0007a383 lw x7,0(x15) +80001a20: 00438863 beq x7,x4,80001a30 +80001a24: 2f50346f jal x8,80005518 +80001a28: 80001a18 .word 0x80001a18 +80001a2c: 8000b621 .word 0x8000b621 +80001a30: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x00000002 +80001a34: 0009af03 lw x30,0(x19) +80001a38: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x7fffffff +80001a3c: 0009a603 lw x12,0(x19) +80001a40: 00498993 addi x19,x19,4 + +80001a44 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sig0l x16, x30, x12 # perform operation +80001a44: 54cf0833 sha512sig0l x16,x30,x12 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a48: 0007a383 lw x7,0(x15) +80001a4c: 01038863 beq x7,x16,80001a5c +80001a50: 2c90346f jal x8,80005518 +80001a54: 80001a44 .word 0x80001a44 +80001a58: 8000b680 .word 0x8000b680 +80001a5c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x00000002 +80001a60: 0009a683 lw x13,0(x19) +80001a64: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x7ffffffe +80001a68: 0009aa83 lw x21,0(x19) +80001a6c: 00498993 addi x19,x19,4 + +80001a70 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sig0l x16, x13, x21 # perform operation +80001a70: 55568833 sha512sig0l x16,x13,x21 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a74: 0007a383 lw x7,0(x15) +80001a78: 01038863 beq x7,x16,80001a88 +80001a7c: 29d0346f jal x8,80005518 +80001a80: 80001a70 .word 0x80001a70 +80001a84: 8000b6df .word 0x8000b6df +80001a88: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x00000002 +80001a8c: 0009a603 lw x12,0(x19) +80001a90: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xffffffff +80001a94: 0009a703 lw x14,0(x19) +80001a98: 00498993 addi x19,x19,4 + +80001a9c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sig0l x23, x12, x14 # perform operation +80001a9c: 54e60bb3 sha512sig0l x23,x12,x14 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aa0: 0007a383 lw x7,0(x15) +80001aa4: 01738863 beq x7,x23,80001ab4 +80001aa8: 2710346f jal x8,80005518 +80001aac: 80001a9c .word 0x80001a9c +80001ab0: 8000b73e .word 0x8000b73e +80001ab4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x00000002 +80001ab8: 0009ab83 lw x23,0(x19) +80001abc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xfffffffe +80001ac0: 0009a503 lw x10,0(x19) +80001ac4: 00498993 addi x19,x19,4 + +80001ac8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sig0l x3, x23, x10 # perform operation +80001ac8: 54ab81b3 sha512sig0l x3,x23,x10 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001acc: 0007a383 lw x7,0(x15) +80001ad0: 00338863 beq x7,x3,80001ae0 +80001ad4: 2450346f jal x8,80005518 +80001ad8: 80001ac8 .word 0x80001ac8 +80001adc: 8000b79d .word 0x8000b79d +80001ae0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x00000002 +80001ae4: 0009ac83 lw x25,0(x19) +80001ae8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x5bbc8872 +80001aec: 0009a703 lw x14,0(x19) +80001af0: 00498993 addi x19,x19,4 + +80001af4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sig0l x10, x25, x14 # perform operation +80001af4: 54ec8533 sha512sig0l x10,x25,x14 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001af8: 0007a383 lw x7,0(x15) +80001afc: 00a38863 beq x7,x10,80001b0c +80001b00: 2190346f jal x8,80005518 +80001b04: 80001af4 .word 0x80001af4 +80001b08: 8000b7fc .word 0x8000b7fc +80001b0c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x00000002 +80001b10: 0009ae03 lw x28,0(x19) +80001b14: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xaaaaaaaa +80001b18: 0009a903 lw x18,0(x19) +80001b1c: 00498993 addi x19,x19,4 + +80001b20 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sig0l x24, x28, x18 # perform operation +80001b20: 552e0c33 sha512sig0l x24,x28,x18 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b24: 0007a383 lw x7,0(x15) +80001b28: 01838863 beq x7,x24,80001b38 +80001b2c: 1ed0346f jal x8,80005518 +80001b30: 80001b20 .word 0x80001b20 +80001b34: 8000b85b .word 0x8000b85b +80001b38: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x00000002 +80001b3c: 0009ac83 lw x25,0(x19) +80001b40: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x55555555 +80001b44: 0009a483 lw x9,0(x19) +80001b48: 00498993 addi x19,x19,4 + +80001b4c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sig0l x24, x25, x9 # perform operation +80001b4c: 549c8c33 sha512sig0l x24,x25,x9 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b50: 0007a383 lw x7,0(x15) +80001b54: 01838863 beq x7,x24,80001b64 +80001b58: 1c10346f jal x8,80005518 +80001b5c: 80001b4c .word 0x80001b4c +80001b60: 8000b8ba .word 0x8000b8ba +80001b64: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x80000000 +80001b68: 0009a883 lw x17,0(x19) +80001b6c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x00000000 +80001b70: 0009ac03 lw x24,0(x19) +80001b74: 00498993 addi x19,x19,4 + +80001b78 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sig0l x27, x17, x24 # perform operation +80001b78: 55888db3 sha512sig0l x27,x17,x24 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b7c: 0007a383 lw x7,0(x15) +80001b80: 01b38863 beq x7,x27,80001b90 +80001b84: 1950346f jal x8,80005518 +80001b88: 80001b78 .word 0x80001b78 +80001b8c: 8000b919 .word 0x8000b919 +80001b90: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x80000000 +80001b94: 0009a183 lw x3,0(x19) +80001b98: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x00000001 +80001b9c: 0009aa03 lw x20,0(x19) +80001ba0: 00498993 addi x19,x19,4 + +80001ba4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sig0l x9, x3, x20 # perform operation +80001ba4: 554184b3 sha512sig0l x9,x3,x20 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001ba8: 0007a383 lw x7,0(x15) +80001bac: 00938863 beq x7,x9,80001bbc +80001bb0: 1690346f jal x8,80005518 +80001bb4: 80001ba4 .word 0x80001ba4 +80001bb8: 8000b978 .word 0x8000b978 +80001bbc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x80000000 +80001bc0: 0009a703 lw x14,0(x19) +80001bc4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x00000002 +80001bc8: 0009aa83 lw x21,0(x19) +80001bcc: 00498993 addi x19,x19,4 + +80001bd0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sig0l x22, x14, x21 # perform operation +80001bd0: 55570b33 sha512sig0l x22,x14,x21 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bd4: 0007a383 lw x7,0(x15) +80001bd8: 01638863 beq x7,x22,80001be8 +80001bdc: 13d0346f jal x8,80005518 +80001be0: 80001bd0 .word 0x80001bd0 +80001be4: 8000b9d7 .word 0x8000b9d7 +80001be8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x80000000 +80001bec: 0009a883 lw x17,0(x19) +80001bf0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x80000000 +80001bf4: 0009a303 lw x6,0(x19) +80001bf8: 00498993 addi x19,x19,4 + +80001bfc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sig0l x23, x17, x6 # perform operation +80001bfc: 54688bb3 sha512sig0l x23,x17,x6 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c00: 0007a383 lw x7,0(x15) +80001c04: 01738863 beq x7,x23,80001c14 +80001c08: 1110346f jal x8,80005518 +80001c0c: 80001bfc .word 0x80001bfc +80001c10: 8000ba36 .word 0x8000ba36 +80001c14: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x80000000 +80001c18: 0009a583 lw x11,0(x19) +80001c1c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x80000001 +80001c20: 0009ae03 lw x28,0(x19) +80001c24: 00498993 addi x19,x19,4 + +80001c28 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sig0l x9, x11, x28 # perform operation +80001c28: 55c584b3 sha512sig0l x9,x11,x28 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c2c: 0007a383 lw x7,0(x15) +80001c30: 00938863 beq x7,x9,80001c40 +80001c34: 0e50346f jal x8,80005518 +80001c38: 80001c28 .word 0x80001c28 +80001c3c: 8000ba9c .word 0x8000ba9c +80001c40: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x80000000 +80001c44: 0009a483 lw x9,0(x19) +80001c48: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x7fffffff +80001c4c: 0009a803 lw x16,0(x19) +80001c50: 00498993 addi x19,x19,4 + +80001c54 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sig0l x25, x9, x16 # perform operation +80001c54: 55048cb3 sha512sig0l x25,x9,x16 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c58: 0007a383 lw x7,0(x15) +80001c5c: 01938863 beq x7,x25,80001c6c +80001c60: 0b90346f jal x8,80005518 +80001c64: 80001c54 .word 0x80001c54 +80001c68: 8000bb02 .word 0x8000bb02 +80001c6c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x80000000 +80001c70: 0009af03 lw x30,0(x19) +80001c74: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x7ffffffe +80001c78: 0009a203 lw x4,0(x19) +80001c7c: 00498993 addi x19,x19,4 + +80001c80 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sig0l x11, x30, x4 # perform operation +80001c80: 544f05b3 sha512sig0l x11,x30,x4 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c84: 0007a383 lw x7,0(x15) +80001c88: 00b38863 beq x7,x11,80001c98 +80001c8c: 08d0346f jal x8,80005518 +80001c90: 80001c80 .word 0x80001c80 +80001c94: 8000bb68 .word 0x8000bb68 +80001c98: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x80000000 +80001c9c: 0009a883 lw x17,0(x19) +80001ca0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xffffffff +80001ca4: 0009a803 lw x16,0(x19) +80001ca8: 00498993 addi x19,x19,4 + +80001cac : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sig0l x12, x17, x16 # perform operation +80001cac: 55088633 sha512sig0l x12,x17,x16 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cb0: 0007a383 lw x7,0(x15) +80001cb4: 00c38863 beq x7,x12,80001cc4 +80001cb8: 0610346f jal x8,80005518 +80001cbc: 80001cac .word 0x80001cac +80001cc0: 8000bbce .word 0x8000bbce +80001cc4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x80000000 +80001cc8: 0009ae03 lw x28,0(x19) +80001ccc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0xfffffffe +80001cd0: 0009ac03 lw x24,0(x19) +80001cd4: 00498993 addi x19,x19,4 + +80001cd8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sig0l x27, x28, x24 # perform operation +80001cd8: 558e0db3 sha512sig0l x27,x28,x24 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cdc: 0007a383 lw x7,0(x15) +80001ce0: 01b38863 beq x7,x27,80001cf0 +80001ce4: 0350346f jal x8,80005518 +80001ce8: 80001cd8 .word 0x80001cd8 +80001cec: 8000bc34 .word 0x8000bc34 +80001cf0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x80000000 +80001cf4: 0009a303 lw x6,0(x19) +80001cf8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x5bbc8872 +80001cfc: 0009aa03 lw x20,0(x19) +80001d00: 00498993 addi x19,x19,4 + +80001d04 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sig0l x16, x6, x20 # perform operation +80001d04: 55430833 sha512sig0l x16,x6,x20 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d08: 0007a383 lw x7,0(x15) +80001d0c: 01038863 beq x7,x16,80001d1c +80001d10: 0090346f jal x8,80005518 +80001d14: 80001d04 .word 0x80001d04 +80001d18: 8000bc9a .word 0x8000bc9a +80001d1c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x80000000 +80001d20: 0009af83 lw x31,0(x19) +80001d24: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xaaaaaaaa +80001d28: 0009ab03 lw x22,0(x19) +80001d2c: 00498993 addi x19,x19,4 + +80001d30 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sig0l x28, x31, x22 # perform operation +80001d30: 556f8e33 sha512sig0l x28,x31,x22 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d34: 0007a383 lw x7,0(x15) +80001d38: 01c38863 beq x7,x28,80001d48 +80001d3c: 7dc0346f jal x8,80005518 +80001d40: 80001d30 .word 0x80001d30 +80001d44: 8000bd00 .word 0x8000bd00 +80001d48: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x80000000 +80001d4c: 0009aa03 lw x20,0(x19) +80001d50: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x55555555 +80001d54: 0009a483 lw x9,0(x19) +80001d58: 00498993 addi x19,x19,4 + +80001d5c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sig0l x24, x20, x9 # perform operation +80001d5c: 549a0c33 sha512sig0l x24,x20,x9 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d60: 0007a383 lw x7,0(x15) +80001d64: 01838863 beq x7,x24,80001d74 +80001d68: 7b00346f jal x8,80005518 +80001d6c: 80001d5c .word 0x80001d5c +80001d70: 8000bd66 .word 0x8000bd66 +80001d74: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x80000001 +80001d78: 0009a503 lw x10,0(x19) +80001d7c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x00000000 +80001d80: 0009aa03 lw x20,0(x19) +80001d84: 00498993 addi x19,x19,4 + +80001d88 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sig0l x5, x10, x20 # perform operation +80001d88: 554502b3 sha512sig0l x5,x10,x20 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d8c: 0007a383 lw x7,0(x15) +80001d90: 00538863 beq x7,x5,80001da0 +80001d94: 7840346f jal x8,80005518 +80001d98: 80001d88 .word 0x80001d88 +80001d9c: 8000bdcc .word 0x8000bdcc +80001da0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x80000001 +80001da4: 0009a483 lw x9,0(x19) +80001da8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x00000001 +80001dac: 0009af03 lw x30,0(x19) +80001db0: 00498993 addi x19,x19,4 + +80001db4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sig0l x22, x9, x30 # perform operation +80001db4: 55e48b33 sha512sig0l x22,x9,x30 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001db8: 0007a383 lw x7,0(x15) +80001dbc: 01638863 beq x7,x22,80001dcc +80001dc0: 7580346f jal x8,80005518 +80001dc4: 80001db4 .word 0x80001db4 +80001dc8: 8000be2b .word 0x8000be2b +80001dcc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x80000001 +80001dd0: 0009ad03 lw x26,0(x19) +80001dd4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x00000002 +80001dd8: 0009ac03 lw x24,0(x19) +80001ddc: 00498993 addi x19,x19,4 + +80001de0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sig0l x13, x26, x24 # perform operation +80001de0: 558d06b3 sha512sig0l x13,x26,x24 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001de4: 0007a383 lw x7,0(x15) +80001de8: 00d38863 beq x7,x13,80001df8 +80001dec: 72c0346f jal x8,80005518 +80001df0: 80001de0 .word 0x80001de0 +80001df4: 8000be8a .word 0x8000be8a +80001df8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x80000001 +80001dfc: 0009a803 lw x16,0(x19) +80001e00: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x80000000 +80001e04: 0009ac03 lw x24,0(x19) +80001e08: 00498993 addi x19,x19,4 + +80001e0c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sig0l x21, x16, x24 # perform operation +80001e0c: 55880ab3 sha512sig0l x21,x16,x24 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e10: 0007a383 lw x7,0(x15) +80001e14: 01538863 beq x7,x21,80001e24 +80001e18: 7000346f jal x8,80005518 +80001e1c: 80001e0c .word 0x80001e0c +80001e20: 8000bee9 .word 0x8000bee9 +80001e24: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x80000001 +80001e28: 0009ac03 lw x24,0(x19) +80001e2c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x80000001 +80001e30: 0009ad03 lw x26,0(x19) +80001e34: 00498993 addi x19,x19,4 + +80001e38 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sig0l x16, x24, x26 # perform operation +80001e38: 55ac0833 sha512sig0l x16,x24,x26 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e3c: 0007a383 lw x7,0(x15) +80001e40: 01038863 beq x7,x16,80001e50 +80001e44: 6d40346f jal x8,80005518 +80001e48: 80001e38 .word 0x80001e38 +80001e4c: 8000bf4f .word 0x8000bf4f +80001e50: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x80000001 +80001e54: 0009ac83 lw x25,0(x19) +80001e58: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x7fffffff +80001e5c: 0009ad83 lw x27,0(x19) +80001e60: 00498993 addi x19,x19,4 + +80001e64 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sig0l x29, x25, x27 # perform operation +80001e64: 55bc8eb3 sha512sig0l x29,x25,x27 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e68: 0007a383 lw x7,0(x15) +80001e6c: 01d38863 beq x7,x29,80001e7c +80001e70: 6a80346f jal x8,80005518 +80001e74: 80001e64 .word 0x80001e64 +80001e78: 8000bfb5 .word 0x8000bfb5 +80001e7c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x80000001 +80001e80: 0009a603 lw x12,0(x19) +80001e84: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x7ffffffe +80001e88: 0009ad03 lw x26,0(x19) +80001e8c: 00498993 addi x19,x19,4 + +80001e90 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sig0l x6, x12, x26 # perform operation +80001e90: 55a60333 sha512sig0l x6,x12,x26 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e94: 0007a383 lw x7,0(x15) +80001e98: 00638863 beq x7,x6,80001ea8 +80001e9c: 67c0346f jal x8,80005518 +80001ea0: 80001e90 .word 0x80001e90 +80001ea4: 8000c01b .word 0x8000c01b +80001ea8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x80000001 +80001eac: 0009ad03 lw x26,0(x19) +80001eb0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0xffffffff +80001eb4: 0009ab83 lw x23,0(x19) +80001eb8: 00498993 addi x19,x19,4 + +80001ebc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sig0l x14, x26, x23 # perform operation +80001ebc: 557d0733 sha512sig0l x14,x26,x23 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ec0: 0007a383 lw x7,0(x15) +80001ec4: 00e38863 beq x7,x14,80001ed4 +80001ec8: 6500346f jal x8,80005518 +80001ecc: 80001ebc .word 0x80001ebc +80001ed0: 8000c081 .word 0x8000c081 +80001ed4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x80000001 +80001ed8: 0009af83 lw x31,0(x19) +80001edc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xfffffffe +80001ee0: 0009ad83 lw x27,0(x19) +80001ee4: 00498993 addi x19,x19,4 + +80001ee8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sig0l x6, x31, x27 # perform operation +80001ee8: 55bf8333 sha512sig0l x6,x31,x27 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001eec: 0007a383 lw x7,0(x15) +80001ef0: 00638863 beq x7,x6,80001f00 +80001ef4: 6240346f jal x8,80005518 +80001ef8: 80001ee8 .word 0x80001ee8 +80001efc: 8000c0e7 .word 0x8000c0e7 +80001f00: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x80000001 +80001f04: 0009ac03 lw x24,0(x19) +80001f08: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x5bbc8872 +80001f0c: 0009aa83 lw x21,0(x19) +80001f10: 00498993 addi x19,x19,4 + +80001f14 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sig0l x28, x24, x21 # perform operation +80001f14: 555c0e33 sha512sig0l x28,x24,x21 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f18: 0007a383 lw x7,0(x15) +80001f1c: 01c38863 beq x7,x28,80001f2c +80001f20: 5f80346f jal x8,80005518 +80001f24: 80001f14 .word 0x80001f14 +80001f28: 8000c14d .word 0x8000c14d +80001f2c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x80000001 +80001f30: 0009a883 lw x17,0(x19) +80001f34: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0xaaaaaaaa +80001f38: 0009ac03 lw x24,0(x19) +80001f3c: 00498993 addi x19,x19,4 + +80001f40 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sig0l x5, x17, x24 # perform operation +80001f40: 558882b3 sha512sig0l x5,x17,x24 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f44: 0007a383 lw x7,0(x15) +80001f48: 00538863 beq x7,x5,80001f58 +80001f4c: 5cc0346f jal x8,80005518 +80001f50: 80001f40 .word 0x80001f40 +80001f54: 8000c1b3 .word 0x8000c1b3 +80001f58: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x80000001 +80001f5c: 0009af03 lw x30,0(x19) +80001f60: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x55555555 +80001f64: 0009ab03 lw x22,0(x19) +80001f68: 00498993 addi x19,x19,4 + +80001f6c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sig0l x6, x30, x22 # perform operation +80001f6c: 556f0333 sha512sig0l x6,x30,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f70: 0007a383 lw x7,0(x15) +80001f74: 00638863 beq x7,x6,80001f84 +80001f78: 5a00346f jal x8,80005518 +80001f7c: 80001f6c .word 0x80001f6c +80001f80: 8000c219 .word 0x8000c219 +80001f84: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x7fffffff +80001f88: 0009a603 lw x12,0(x19) +80001f8c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x00000000 +80001f90: 0009a683 lw x13,0(x19) +80001f94: 00498993 addi x19,x19,4 + +80001f98 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sig0l x9, x12, x13 # perform operation +80001f98: 54d604b3 sha512sig0l x9,x12,x13 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001f9c: 0007a383 lw x7,0(x15) +80001fa0: 00938863 beq x7,x9,80001fb0 +80001fa4: 5740346f jal x8,80005518 +80001fa8: 80001f98 .word 0x80001f98 +80001fac: 8000c27f .word 0x8000c27f +80001fb0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x7fffffff +80001fb4: 0009ad03 lw x26,0(x19) +80001fb8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0x00000001 +80001fbc: 0009ac03 lw x24,0(x19) +80001fc0: 00498993 addi x19,x19,4 + +80001fc4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sig0l x3, x26, x24 # perform operation +80001fc4: 558d01b3 sha512sig0l x3,x26,x24 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fc8: 0007a383 lw x7,0(x15) +80001fcc: 00338863 beq x7,x3,80001fdc +80001fd0: 5480346f jal x8,80005518 +80001fd4: 80001fc4 .word 0x80001fc4 +80001fd8: 8000c2de .word 0x8000c2de +80001fdc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x7fffffff +80001fe0: 0009a183 lw x3,0(x19) +80001fe4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x00000002 +80001fe8: 0009aa83 lw x21,0(x19) +80001fec: 00498993 addi x19,x19,4 + +80001ff0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sig0l x27, x3, x21 # perform operation +80001ff0: 55518db3 sha512sig0l x27,x3,x21 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ff4: 0007a383 lw x7,0(x15) +80001ff8: 01b38863 beq x7,x27,80002008 +80001ffc: 51c0346f jal x8,80005518 +80002000: 80001ff0 .word 0x80001ff0 +80002004: 8000c33d .word 0x8000c33d +80002008: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x7fffffff +8000200c: 0009ae03 lw x28,0(x19) +80002010: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x80000000 +80002014: 0009a303 lw x6,0(x19) +80002018: 00498993 addi x19,x19,4 + +8000201c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sig0l x29, x28, x6 # perform operation +8000201c: 546e0eb3 sha512sig0l x29,x28,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002020: 0007a383 lw x7,0(x15) +80002024: 01d38863 beq x7,x29,80002034 +80002028: 4f00346f jal x8,80005518 +8000202c: 8000201c .word 0x8000201c +80002030: 8000c39c .word 0x8000c39c +80002034: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x7fffffff +80002038: 0009ae03 lw x28,0(x19) +8000203c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0x80000001 +80002040: 0009ab83 lw x23,0(x19) +80002044: 00498993 addi x19,x19,4 + +80002048 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sig0l x24, x28, x23 # perform operation +80002048: 557e0c33 sha512sig0l x24,x28,x23 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000204c: 0007a383 lw x7,0(x15) +80002050: 01838863 beq x7,x24,80002060 +80002054: 4c40346f jal x8,80005518 +80002058: 80002048 .word 0x80002048 +8000205c: 8000c402 .word 0x8000c402 +80002060: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x7fffffff +80002064: 0009ab03 lw x22,0(x19) +80002068: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x7fffffff +8000206c: 0009ad83 lw x27,0(x19) +80002070: 00498993 addi x19,x19,4 + +80002074 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sig0l x4, x22, x27 # perform operation +80002074: 55bb0233 sha512sig0l x4,x22,x27 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002078: 0007a383 lw x7,0(x15) +8000207c: 00438863 beq x7,x4,8000208c +80002080: 4980346f jal x8,80005518 +80002084: 80002074 .word 0x80002074 +80002088: 8000c468 .word 0x8000c468 +8000208c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x7fffffff +80002090: 0009ae83 lw x29,0(x19) +80002094: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x7ffffffe +80002098: 0009ab03 lw x22,0(x19) +8000209c: 00498993 addi x19,x19,4 + +800020a0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sig0l x10, x29, x22 # perform operation +800020a0: 556e8533 sha512sig0l x10,x29,x22 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020a4: 0007a383 lw x7,0(x15) +800020a8: 00a38863 beq x7,x10,800020b8 +800020ac: 46c0346f jal x8,80005518 +800020b0: 800020a0 .word 0x800020a0 +800020b4: 8000c4ce .word 0x8000c4ce +800020b8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x7fffffff +800020bc: 0009a283 lw x5,0(x19) +800020c0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0xffffffff +800020c4: 0009ad03 lw x26,0(x19) +800020c8: 00498993 addi x19,x19,4 + +800020cc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sig0l x4, x5, x26 # perform operation +800020cc: 55a28233 sha512sig0l x4,x5,x26 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020d0: 0007a383 lw x7,0(x15) +800020d4: 00438863 beq x7,x4,800020e4 +800020d8: 4400346f jal x8,80005518 +800020dc: 800020cc .word 0x800020cc +800020e0: 8000c534 .word 0x8000c534 +800020e4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x7fffffff +800020e8: 0009a883 lw x17,0(x19) +800020ec: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0xfffffffe +800020f0: 0009ab83 lw x23,0(x19) +800020f4: 00498993 addi x19,x19,4 + +800020f8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sig0l x22, x17, x23 # perform operation +800020f8: 55788b33 sha512sig0l x22,x17,x23 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +800020fc: 0007a383 lw x7,0(x15) +80002100: 01638863 beq x7,x22,80002110 +80002104: 4140346f jal x8,80005518 +80002108: 800020f8 .word 0x800020f8 +8000210c: 8000c59a .word 0x8000c59a +80002110: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x7fffffff +80002114: 0009ae03 lw x28,0(x19) +80002118: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x5bbc8872 +8000211c: 0009aa83 lw x21,0(x19) +80002120: 00498993 addi x19,x19,4 + +80002124 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sig0l x1, x28, x21 # perform operation +80002124: 555e00b3 sha512sig0l x1,x28,x21 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002128: 0007a383 lw x7,0(x15) +8000212c: 00138863 beq x7,x1,8000213c +80002130: 3e80346f jal x8,80005518 +80002134: 80002124 .word 0x80002124 +80002138: 8000c600 .word 0x8000c600 +8000213c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x7fffffff +80002140: 0009ae03 lw x28,0(x19) +80002144: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0xaaaaaaaa +80002148: 0009a103 lw x2,0(x19) +8000214c: 00498993 addi x19,x19,4 + +80002150 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sig0l x1, x28, x2 # perform operation +80002150: 542e00b3 sha512sig0l x1,x28,x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002154: 0007a383 lw x7,0(x15) +80002158: 00138863 beq x7,x1,80002168 +8000215c: 3bc0346f jal x8,80005518 +80002160: 80002150 .word 0x80002150 +80002164: 8000c666 .word 0x8000c666 +80002168: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x7fffffff +8000216c: 0009a503 lw x10,0(x19) +80002170: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x55555555 +80002174: 0009aa83 lw x21,0(x19) +80002178: 00498993 addi x19,x19,4 + +8000217c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sig0l x11, x10, x21 # perform operation +8000217c: 555505b3 sha512sig0l x11,x10,x21 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002180: 0007a383 lw x7,0(x15) +80002184: 00b38863 beq x7,x11,80002194 +80002188: 3900346f jal x8,80005518 +8000218c: 8000217c .word 0x8000217c +80002190: 8000c6cc .word 0x8000c6cc +80002194: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x7ffffffe +80002198: 0009a803 lw x16,0(x19) +8000219c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x00000000 +800021a0: 0009ad03 lw x26,0(x19) +800021a4: 00498993 addi x19,x19,4 + +800021a8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sig0l x6, x16, x26 # perform operation +800021a8: 55a80333 sha512sig0l x6,x16,x26 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021ac: 0007a383 lw x7,0(x15) +800021b0: 00638863 beq x7,x6,800021c0 +800021b4: 3640346f jal x8,80005518 +800021b8: 800021a8 .word 0x800021a8 +800021bc: 8000c732 .word 0x8000c732 +800021c0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x7ffffffe +800021c4: 0009a883 lw x17,0(x19) +800021c8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x00000001 +800021cc: 0009a103 lw x2,0(x19) +800021d0: 00498993 addi x19,x19,4 + +800021d4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sig0l x18, x17, x2 # perform operation +800021d4: 54288933 sha512sig0l x18,x17,x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021d8: 0007a383 lw x7,0(x15) +800021dc: 01238863 beq x7,x18,800021ec +800021e0: 3380346f jal x8,80005518 +800021e4: 800021d4 .word 0x800021d4 +800021e8: 8000c791 .word 0x8000c791 +800021ec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x7ffffffe +800021f0: 0009a583 lw x11,0(x19) +800021f4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x00000002 +800021f8: 0009a903 lw x18,0(x19) +800021fc: 00498993 addi x19,x19,4 + +80002200 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sig0l x14, x11, x18 # perform operation +80002200: 55258733 sha512sig0l x14,x11,x18 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002204: 0007a383 lw x7,0(x15) +80002208: 00e38863 beq x7,x14,80002218 +8000220c: 30c0346f jal x8,80005518 +80002210: 80002200 .word 0x80002200 +80002214: 8000c7f0 .word 0x8000c7f0 +80002218: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x7ffffffe +8000221c: 0009a203 lw x4,0(x19) +80002220: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x80000000 +80002224: 0009ad83 lw x27,0(x19) +80002228: 00498993 addi x19,x19,4 + +8000222c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sig0l x20, x4, x27 # perform operation +8000222c: 55b20a33 sha512sig0l x20,x4,x27 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002230: 0007a383 lw x7,0(x15) +80002234: 01438863 beq x7,x20,80002244 +80002238: 2e00346f jal x8,80005518 +8000223c: 8000222c .word 0x8000222c +80002240: 8000c84f .word 0x8000c84f +80002244: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x7ffffffe +80002248: 0009a683 lw x13,0(x19) +8000224c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x80000001 +80002250: 0009af03 lw x30,0(x19) +80002254: 00498993 addi x19,x19,4 + +80002258 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sig0l x31, x13, x30 # perform operation +80002258: 55e68fb3 sha512sig0l x31,x13,x30 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000225c: 0007a383 lw x7,0(x15) +80002260: 01f38863 beq x7,x31,80002270 +80002264: 2b40346f jal x8,80005518 +80002268: 80002258 .word 0x80002258 +8000226c: 8000c8b5 .word 0x8000c8b5 +80002270: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x7ffffffe +80002274: 0009af03 lw x30,0(x19) +80002278: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x7fffffff +8000227c: 0009ad03 lw x26,0(x19) +80002280: 00498993 addi x19,x19,4 + +80002284 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sig0l x13, x30, x26 # perform operation +80002284: 55af06b3 sha512sig0l x13,x30,x26 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002288: 0007a383 lw x7,0(x15) +8000228c: 00d38863 beq x7,x13,8000229c +80002290: 2880346f jal x8,80005518 +80002294: 80002284 .word 0x80002284 +80002298: 8000c91b .word 0x8000c91b +8000229c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x7ffffffe +800022a0: 0009aa83 lw x21,0(x19) +800022a4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x7ffffffe +800022a8: 0009a203 lw x4,0(x19) +800022ac: 00498993 addi x19,x19,4 + +800022b0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sig0l x24, x21, x4 # perform operation +800022b0: 544a8c33 sha512sig0l x24,x21,x4 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022b4: 0007a383 lw x7,0(x15) +800022b8: 01838863 beq x7,x24,800022c8 +800022bc: 25c0346f jal x8,80005518 +800022c0: 800022b0 .word 0x800022b0 +800022c4: 8000c981 .word 0x8000c981 +800022c8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x7ffffffe +800022cc: 0009aa03 lw x20,0(x19) +800022d0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0xffffffff +800022d4: 0009a103 lw x2,0(x19) +800022d8: 00498993 addi x19,x19,4 + +800022dc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sig0l x27, x20, x2 # perform operation +800022dc: 542a0db3 sha512sig0l x27,x20,x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022e0: 0007a383 lw x7,0(x15) +800022e4: 01b38863 beq x7,x27,800022f4 +800022e8: 2300346f jal x8,80005518 +800022ec: 800022dc .word 0x800022dc +800022f0: 8000c9e7 .word 0x8000c9e7 +800022f4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x7ffffffe +800022f8: 0009ac03 lw x24,0(x19) +800022fc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0xfffffffe +80002300: 0009a203 lw x4,0(x19) +80002304: 00498993 addi x19,x19,4 + +80002308 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sig0l x31, x24, x4 # perform operation +80002308: 544c0fb3 sha512sig0l x31,x24,x4 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000230c: 0007a383 lw x7,0(x15) +80002310: 01f38863 beq x7,x31,80002320 +80002314: 2040346f jal x8,80005518 +80002318: 80002308 .word 0x80002308 +8000231c: 8000ca4d .word 0x8000ca4d +80002320: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x7ffffffe +80002324: 0009a083 lw x1,0(x19) +80002328: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x5bbc8872 +8000232c: 0009ac83 lw x25,0(x19) +80002330: 00498993 addi x19,x19,4 + +80002334 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sig0l x5, x1, x25 # perform operation +80002334: 559082b3 sha512sig0l x5,x1,x25 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002338: 0007a383 lw x7,0(x15) +8000233c: 00538863 beq x7,x5,8000234c +80002340: 1d80346f jal x8,80005518 +80002344: 80002334 .word 0x80002334 +80002348: 8000cab3 .word 0x8000cab3 +8000234c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x7ffffffe +80002350: 0009a583 lw x11,0(x19) +80002354: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xaaaaaaaa +80002358: 0009af03 lw x30,0(x19) +8000235c: 00498993 addi x19,x19,4 + +80002360 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sig0l x25, x11, x30 # perform operation +80002360: 55e58cb3 sha512sig0l x25,x11,x30 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002364: 0007a383 lw x7,0(x15) +80002368: 01938863 beq x7,x25,80002378 +8000236c: 1ac0346f jal x8,80005518 +80002370: 80002360 .word 0x80002360 +80002374: 8000cb19 .word 0x8000cb19 +80002378: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x7ffffffe +8000237c: 0009a083 lw x1,0(x19) +80002380: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x55555555 +80002384: 0009a283 lw x5,0(x19) +80002388: 00498993 addi x19,x19,4 + +8000238c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sig0l x31, x1, x5 # perform operation +8000238c: 54508fb3 sha512sig0l x31,x1,x5 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +80002390: 0007a383 lw x7,0(x15) +80002394: 01f38863 beq x7,x31,800023a4 +80002398: 1800346f jal x8,80005518 +8000239c: 8000238c .word 0x8000238c +800023a0: 8000cb7f .word 0x8000cb7f +800023a4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xffffffff +800023a8: 0009a583 lw x11,0(x19) +800023ac: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x00000000 +800023b0: 0009ad03 lw x26,0(x19) +800023b4: 00498993 addi x19,x19,4 + +800023b8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sig0l x31, x11, x26 # perform operation +800023b8: 55a58fb3 sha512sig0l x31,x11,x26 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023bc: 0007a383 lw x7,0(x15) +800023c0: 01f38863 beq x7,x31,800023d0 +800023c4: 1540346f jal x8,80005518 +800023c8: 800023b8 .word 0x800023b8 +800023cc: 8000cbe5 .word 0x8000cbe5 +800023d0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xffffffff +800023d4: 0009af83 lw x31,0(x19) +800023d8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0x00000001 +800023dc: 0009ab03 lw x22,0(x19) +800023e0: 00498993 addi x19,x19,4 + +800023e4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sig0l x21, x31, x22 # perform operation +800023e4: 556f8ab3 sha512sig0l x21,x31,x22 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023e8: 0007a383 lw x7,0(x15) +800023ec: 01538863 beq x7,x21,800023fc +800023f0: 1280346f jal x8,80005518 +800023f4: 800023e4 .word 0x800023e4 +800023f8: 8000cc44 .word 0x8000cc44 +800023fc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xffffffff +80002400: 0009ae83 lw x29,0(x19) +80002404: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x00000002 +80002408: 0009aa03 lw x20,0(x19) +8000240c: 00498993 addi x19,x19,4 + +80002410 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sig0l x1, x29, x20 # perform operation +80002410: 554e80b3 sha512sig0l x1,x29,x20 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002414: 0007a383 lw x7,0(x15) +80002418: 00138863 beq x7,x1,80002428 +8000241c: 0fc0346f jal x8,80005518 +80002420: 80002410 .word 0x80002410 +80002424: 8000cca3 .word 0x8000cca3 +80002428: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xffffffff +8000242c: 0009ae03 lw x28,0(x19) +80002430: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x80000000 +80002434: 0009ac83 lw x25,0(x19) +80002438: 00498993 addi x19,x19,4 + +8000243c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sig0l x22, x28, x25 # perform operation +8000243c: 559e0b33 sha512sig0l x22,x28,x25 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002440: 0007a383 lw x7,0(x15) +80002444: 01638863 beq x7,x22,80002454 +80002448: 0d00346f jal x8,80005518 +8000244c: 8000243c .word 0x8000243c +80002450: 8000cd02 .word 0x8000cd02 +80002454: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xffffffff +80002458: 0009a203 lw x4,0(x19) +8000245c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x80000001 +80002460: 0009a603 lw x12,0(x19) +80002464: 00498993 addi x19,x19,4 + +80002468 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sig0l x28, x4, x12 # perform operation +80002468: 54c20e33 sha512sig0l x28,x4,x12 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000246c: 0007a383 lw x7,0(x15) +80002470: 01c38863 beq x7,x28,80002480 +80002474: 0a40346f jal x8,80005518 +80002478: 80002468 .word 0x80002468 +8000247c: 8000cd68 .word 0x8000cd68 +80002480: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xffffffff +80002484: 0009a503 lw x10,0(x19) +80002488: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x7fffffff +8000248c: 0009ae03 lw x28,0(x19) +80002490: 00498993 addi x19,x19,4 + +80002494 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sig0l x29, x10, x28 # perform operation +80002494: 55c50eb3 sha512sig0l x29,x10,x28 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +80002498: 0007a383 lw x7,0(x15) +8000249c: 01d38863 beq x7,x29,800024ac +800024a0: 0780346f jal x8,80005518 +800024a4: 80002494 .word 0x80002494 +800024a8: 8000cdce .word 0x8000cdce +800024ac: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xffffffff +800024b0: 0009ab83 lw x23,0(x19) +800024b4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x7ffffffe +800024b8: 0009ac83 lw x25,0(x19) +800024bc: 00498993 addi x19,x19,4 + +800024c0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sig0l x30, x23, x25 # perform operation +800024c0: 559b8f33 sha512sig0l x30,x23,x25 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024c4: 0007a383 lw x7,0(x15) +800024c8: 01e38863 beq x7,x30,800024d8 +800024cc: 04c0346f jal x8,80005518 +800024d0: 800024c0 .word 0x800024c0 +800024d4: 8000ce34 .word 0x8000ce34 +800024d8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0xffffffff +800024dc: 0009ad83 lw x27,0(x19) +800024e0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0xffffffff +800024e4: 0009a303 lw x6,0(x19) +800024e8: 00498993 addi x19,x19,4 + +800024ec : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sig0l x29, x27, x6 # perform operation +800024ec: 546d8eb3 sha512sig0l x29,x27,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024f0: 0007a383 lw x7,0(x15) +800024f4: 01d38863 beq x7,x29,80002504 +800024f8: 0200346f jal x8,80005518 +800024fc: 800024ec .word 0x800024ec +80002500: 8000ce9a .word 0x8000ce9a +80002504: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xffffffff +80002508: 0009a903 lw x18,0(x19) +8000250c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xfffffffe +80002510: 0009ad83 lw x27,0(x19) +80002514: 00498993 addi x19,x19,4 + +80002518 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sig0l x24, x18, x27 # perform operation +80002518: 55b90c33 sha512sig0l x24,x18,x27 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000251c: 0007a383 lw x7,0(x15) +80002520: 01838863 beq x7,x24,80002530 +80002524: 7f50246f jal x8,80005518 +80002528: 80002518 .word 0x80002518 +8000252c: 8000cf00 .word 0x8000cf00 +80002530: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xffffffff +80002534: 0009ad03 lw x26,0(x19) +80002538: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x5bbc8872 +8000253c: 0009ad83 lw x27,0(x19) +80002540: 00498993 addi x19,x19,4 + +80002544 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sig0l x1, x26, x27 # perform operation +80002544: 55bd00b3 sha512sig0l x1,x26,x27 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002548: 0007a383 lw x7,0(x15) +8000254c: 00138863 beq x7,x1,8000255c +80002550: 7c90246f jal x8,80005518 +80002554: 80002544 .word 0x80002544 +80002558: 8000cf66 .word 0x8000cf66 +8000255c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0xffffffff +80002560: 0009ac83 lw x25,0(x19) +80002564: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xaaaaaaaa +80002568: 0009a883 lw x17,0(x19) +8000256c: 00498993 addi x19,x19,4 + +80002570 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sig0l x4, x25, x17 # perform operation +80002570: 551c8233 sha512sig0l x4,x25,x17 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002574: 0007a383 lw x7,0(x15) +80002578: 00438863 beq x7,x4,80002588 +8000257c: 79d0246f jal x8,80005518 +80002580: 80002570 .word 0x80002570 +80002584: 8000cfcc .word 0x8000cfcc +80002588: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xffffffff +8000258c: 0009a683 lw x13,0(x19) +80002590: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x55555555 +80002594: 0009a083 lw x1,0(x19) +80002598: 00498993 addi x19,x19,4 + +8000259c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sig0l x26, x13, x1 # perform operation +8000259c: 54168d33 sha512sig0l x26,x13,x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025a0: 0007a383 lw x7,0(x15) +800025a4: 01a38863 beq x7,x26,800025b4 +800025a8: 7710246f jal x8,80005518 +800025ac: 8000259c .word 0x8000259c +800025b0: 8000d032 .word 0x8000d032 +800025b4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xfffffffe +800025b8: 0009a203 lw x4,0(x19) +800025bc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x00000000 +800025c0: 0009a083 lw x1,0(x19) +800025c4: 00498993 addi x19,x19,4 + +800025c8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sig0l x18, x4, x1 # perform operation +800025c8: 54120933 sha512sig0l x18,x4,x1 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025cc: 0007a383 lw x7,0(x15) +800025d0: 01238863 beq x7,x18,800025e0 +800025d4: 7450246f jal x8,80005518 +800025d8: 800025c8 .word 0x800025c8 +800025dc: 8000d098 .word 0x8000d098 +800025e0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xfffffffe +800025e4: 0009a583 lw x11,0(x19) +800025e8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x00000001 +800025ec: 0009a703 lw x14,0(x19) +800025f0: 00498993 addi x19,x19,4 + +800025f4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sig0l x29, x11, x14 # perform operation +800025f4: 54e58eb3 sha512sig0l x29,x11,x14 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +800025f8: 0007a383 lw x7,0(x15) +800025fc: 01d38863 beq x7,x29,8000260c +80002600: 7190246f jal x8,80005518 +80002604: 800025f4 .word 0x800025f4 +80002608: 8000d0f7 .word 0x8000d0f7 +8000260c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xfffffffe +80002610: 0009a483 lw x9,0(x19) +80002614: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x00000002 +80002618: 0009a103 lw x2,0(x19) +8000261c: 00498993 addi x19,x19,4 + +80002620 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sig0l x13, x9, x2 # perform operation +80002620: 542486b3 sha512sig0l x13,x9,x2 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002624: 0007a383 lw x7,0(x15) +80002628: 00d38863 beq x7,x13,80002638 +8000262c: 6ed0246f jal x8,80005518 +80002630: 80002620 .word 0x80002620 +80002634: 8000d156 .word 0x8000d156 +80002638: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xfffffffe +8000263c: 0009a183 lw x3,0(x19) +80002640: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x80000000 +80002644: 0009a203 lw x4,0(x19) +80002648: 00498993 addi x19,x19,4 + +8000264c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sig0l x2, x3, x4 # perform operation +8000264c: 54418133 sha512sig0l x2,x3,x4 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002650: 0007a383 lw x7,0(x15) +80002654: 00238863 beq x7,x2,80002664 +80002658: 6c10246f jal x8,80005518 +8000265c: 8000264c .word 0x8000264c +80002660: 8000d1b5 .word 0x8000d1b5 +80002664: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xfffffffe +80002668: 0009a203 lw x4,0(x19) +8000266c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x80000001 +80002670: 0009aa03 lw x20,0(x19) +80002674: 00498993 addi x19,x19,4 + +80002678 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sig0l x23, x4, x20 # perform operation +80002678: 55420bb3 sha512sig0l x23,x4,x20 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000267c: 0007a383 lw x7,0(x15) +80002680: 01738863 beq x7,x23,80002690 +80002684: 6950246f jal x8,80005518 +80002688: 80002678 .word 0x80002678 +8000268c: 8000d21b .word 0x8000d21b +80002690: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xfffffffe +80002694: 0009af03 lw x30,0(x19) +80002698: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x7fffffff +8000269c: 0009a883 lw x17,0(x19) +800026a0: 00498993 addi x19,x19,4 + +800026a4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sig0l x10, x30, x17 # perform operation +800026a4: 551f0533 sha512sig0l x10,x30,x17 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026a8: 0007a383 lw x7,0(x15) +800026ac: 00a38863 beq x7,x10,800026bc +800026b0: 6690246f jal x8,80005518 +800026b4: 800026a4 .word 0x800026a4 +800026b8: 8000d281 .word 0x8000d281 +800026bc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0xfffffffe +800026c0: 0009a103 lw x2,0(x19) +800026c4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x7ffffffe +800026c8: 0009a683 lw x13,0(x19) +800026cc: 00498993 addi x19,x19,4 + +800026d0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sig0l x31, x2, x13 # perform operation +800026d0: 54d10fb3 sha512sig0l x31,x2,x13 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026d4: 0007a383 lw x7,0(x15) +800026d8: 01f38863 beq x7,x31,800026e8 +800026dc: 63d0246f jal x8,80005518 +800026e0: 800026d0 .word 0x800026d0 +800026e4: 8000d2e7 .word 0x8000d2e7 +800026e8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xfffffffe +800026ec: 0009a683 lw x13,0(x19) +800026f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xffffffff +800026f4: 0009a703 lw x14,0(x19) +800026f8: 00498993 addi x19,x19,4 + +800026fc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sig0l x12, x13, x14 # perform operation +800026fc: 54e68633 sha512sig0l x12,x13,x14 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002700: 0007a383 lw x7,0(x15) +80002704: 00c38863 beq x7,x12,80002714 +80002708: 6110246f jal x8,80005518 +8000270c: 800026fc .word 0x800026fc +80002710: 8000d34d .word 0x8000d34d +80002714: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xfffffffe +80002718: 0009a603 lw x12,0(x19) +8000271c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xfffffffe +80002720: 0009ab03 lw x22,0(x19) +80002724: 00498993 addi x19,x19,4 + +80002728 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sig0l x28, x12, x22 # perform operation +80002728: 55660e33 sha512sig0l x28,x12,x22 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000272c: 0007a383 lw x7,0(x15) +80002730: 01c38863 beq x7,x28,80002740 +80002734: 5e50246f jal x8,80005518 +80002738: 80002728 .word 0x80002728 +8000273c: 8000d3b3 .word 0x8000d3b3 +80002740: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xfffffffe +80002744: 0009a503 lw x10,0(x19) +80002748: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x5bbc8872 +8000274c: 0009a903 lw x18,0(x19) +80002750: 00498993 addi x19,x19,4 + +80002754 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sig0l x1, x10, x18 # perform operation +80002754: 552500b3 sha512sig0l x1,x10,x18 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002758: 0007a383 lw x7,0(x15) +8000275c: 00138863 beq x7,x1,8000276c +80002760: 5b90246f jal x8,80005518 +80002764: 80002754 .word 0x80002754 +80002768: 8000d419 .word 0x8000d419 +8000276c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xfffffffe +80002770: 0009ad03 lw x26,0(x19) +80002774: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xaaaaaaaa +80002778: 0009a483 lw x9,0(x19) +8000277c: 00498993 addi x19,x19,4 + +80002780 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sig0l x29, x26, x9 # perform operation +80002780: 549d0eb3 sha512sig0l x29,x26,x9 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002784: 0007a383 lw x7,0(x15) +80002788: 01d38863 beq x7,x29,80002798 +8000278c: 58d0246f jal x8,80005518 +80002790: 80002780 .word 0x80002780 +80002794: 8000d47f .word 0x8000d47f +80002798: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xfffffffe +8000279c: 0009a603 lw x12,0(x19) +800027a0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x55555555 +800027a4: 0009aa03 lw x20,0(x19) +800027a8: 00498993 addi x19,x19,4 + +800027ac : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sig0l x6, x12, x20 # perform operation +800027ac: 55460333 sha512sig0l x6,x12,x20 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027b0: 0007a383 lw x7,0(x15) +800027b4: 00638863 beq x7,x6,800027c4 +800027b8: 5610246f jal x8,80005518 +800027bc: 800027ac .word 0x800027ac +800027c0: 8000d4e5 .word 0x8000d4e5 +800027c4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x5bbc8872 +800027c8: 0009ad83 lw x27,0(x19) +800027cc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x00000000 +800027d0: 0009ac83 lw x25,0(x19) +800027d4: 00498993 addi x19,x19,4 + +800027d8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sig0l x21, x27, x25 # perform operation +800027d8: 559d8ab3 sha512sig0l x21,x27,x25 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027dc: 0007a383 lw x7,0(x15) +800027e0: 01538863 beq x7,x21,800027f0 +800027e4: 5350246f jal x8,80005518 +800027e8: 800027d8 .word 0x800027d8 +800027ec: 8000d54b .word 0x8000d54b +800027f0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x5bbc8872 +800027f4: 0009a583 lw x11,0(x19) +800027f8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x00000001 +800027fc: 0009ae83 lw x29,0(x19) +80002800: 00498993 addi x19,x19,4 + +80002804 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sig0l x1, x11, x29 # perform operation +80002804: 55d580b3 sha512sig0l x1,x11,x29 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002808: 0007a383 lw x7,0(x15) +8000280c: 00138863 beq x7,x1,8000281c +80002810: 5090246f jal x8,80005518 +80002814: 80002804 .word 0x80002804 +80002818: 8000d5aa .word 0x8000d5aa +8000281c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x5bbc8872 +80002820: 0009ad83 lw x27,0(x19) +80002824: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x00000002 +80002828: 0009a183 lw x3,0(x19) +8000282c: 00498993 addi x19,x19,4 + +80002830 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sig0l x18, x27, x3 # perform operation +80002830: 543d8933 sha512sig0l x18,x27,x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002834: 0007a383 lw x7,0(x15) +80002838: 01238863 beq x7,x18,80002848 +8000283c: 4dd0246f jal x8,80005518 +80002840: 80002830 .word 0x80002830 +80002844: 8000d609 .word 0x8000d609 +80002848: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x5bbc8872 +8000284c: 0009a303 lw x6,0(x19) +80002850: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x80000000 +80002854: 0009ae83 lw x29,0(x19) +80002858: 00498993 addi x19,x19,4 + +8000285c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sig0l x20, x6, x29 # perform operation +8000285c: 55d30a33 sha512sig0l x20,x6,x29 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002860: 0007a383 lw x7,0(x15) +80002864: 01438863 beq x7,x20,80002874 +80002868: 4b10246f jal x8,80005518 +8000286c: 8000285c .word 0x8000285c +80002870: 8000d668 .word 0x8000d668 +80002874: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x5bbc8872 +80002878: 0009a183 lw x3,0(x19) +8000287c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x80000001 +80002880: 0009a803 lw x16,0(x19) +80002884: 00498993 addi x19,x19,4 + +80002888 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sig0l x18, x3, x16 # perform operation +80002888: 55018933 sha512sig0l x18,x3,x16 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000288c: 0007a383 lw x7,0(x15) +80002890: 01238863 beq x7,x18,800028a0 +80002894: 4850246f jal x8,80005518 +80002898: 80002888 .word 0x80002888 +8000289c: 8000d6ce .word 0x8000d6ce +800028a0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x5bbc8872 +800028a4: 0009a483 lw x9,0(x19) +800028a8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x7fffffff +800028ac: 0009a683 lw x13,0(x19) +800028b0: 00498993 addi x19,x19,4 + +800028b4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sig0l x20, x9, x13 # perform operation +800028b4: 54d48a33 sha512sig0l x20,x9,x13 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028b8: 0007a383 lw x7,0(x15) +800028bc: 01438863 beq x7,x20,800028cc +800028c0: 4590246f jal x8,80005518 +800028c4: 800028b4 .word 0x800028b4 +800028c8: 8000d734 .word 0x8000d734 +800028cc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x5bbc8872 +800028d0: 0009a083 lw x1,0(x19) +800028d4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x7ffffffe +800028d8: 0009ad83 lw x27,0(x19) +800028dc: 00498993 addi x19,x19,4 + +800028e0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sig0l x2, x1, x27 # perform operation +800028e0: 55b08133 sha512sig0l x2,x1,x27 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028e4: 0007a383 lw x7,0(x15) +800028e8: 00238863 beq x7,x2,800028f8 +800028ec: 42d0246f jal x8,80005518 +800028f0: 800028e0 .word 0x800028e0 +800028f4: 8000d79a .word 0x8000d79a +800028f8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x5bbc8872 +800028fc: 0009a903 lw x18,0(x19) +80002900: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0xffffffff +80002904: 0009ae83 lw x29,0(x19) +80002908: 00498993 addi x19,x19,4 + +8000290c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sig0l x5, x18, x29 # perform operation +8000290c: 55d902b3 sha512sig0l x5,x18,x29 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002910: 0007a383 lw x7,0(x15) +80002914: 00538863 beq x7,x5,80002924 +80002918: 4010246f jal x8,80005518 +8000291c: 8000290c .word 0x8000290c +80002920: 8000d800 .word 0x8000d800 +80002924: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x5bbc8872 +80002928: 0009a303 lw x6,0(x19) +8000292c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xfffffffe +80002930: 0009a083 lw x1,0(x19) +80002934: 00498993 addi x19,x19,4 + +80002938 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sig0l x20, x6, x1 # perform operation +80002938: 54130a33 sha512sig0l x20,x6,x1 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000293c: 0007a383 lw x7,0(x15) +80002940: 01438863 beq x7,x20,80002950 +80002944: 3d50246f jal x8,80005518 +80002948: 80002938 .word 0x80002938 +8000294c: 8000d866 .word 0x8000d866 +80002950: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x5bbc8872 +80002954: 0009ae03 lw x28,0(x19) +80002958: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x5bbc8872 +8000295c: 0009a083 lw x1,0(x19) +80002960: 00498993 addi x19,x19,4 + +80002964 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sig0l x6, x28, x1 # perform operation +80002964: 541e0333 sha512sig0l x6,x28,x1 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002968: 0007a383 lw x7,0(x15) +8000296c: 00638863 beq x7,x6,8000297c +80002970: 3a90246f jal x8,80005518 +80002974: 80002964 .word 0x80002964 +80002978: 8000d8cc .word 0x8000d8cc +8000297c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x5bbc8872 +80002980: 0009a603 lw x12,0(x19) +80002984: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0xaaaaaaaa +80002988: 0009a283 lw x5,0(x19) +8000298c: 00498993 addi x19,x19,4 + +80002990 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sig0l x28, x12, x5 # perform operation +80002990: 54560e33 sha512sig0l x28,x12,x5 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +80002994: 0007a383 lw x7,0(x15) +80002998: 01c38863 beq x7,x28,800029a8 +8000299c: 37d0246f jal x8,80005518 +800029a0: 80002990 .word 0x80002990 +800029a4: 8000d932 .word 0x8000d932 +800029a8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x5bbc8872 +800029ac: 0009a183 lw x3,0(x19) +800029b0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x55555555 +800029b4: 0009a903 lw x18,0(x19) +800029b8: 00498993 addi x19,x19,4 + +800029bc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sig0l x14, x3, x18 # perform operation +800029bc: 55218733 sha512sig0l x14,x3,x18 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029c0: 0007a383 lw x7,0(x15) +800029c4: 00e38863 beq x7,x14,800029d4 +800029c8: 3510246f jal x8,80005518 +800029cc: 800029bc .word 0x800029bc +800029d0: 8000d998 .word 0x8000d998 +800029d4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xaaaaaaaa +800029d8: 0009ab83 lw x23,0(x19) +800029dc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x00000000 +800029e0: 0009a883 lw x17,0(x19) +800029e4: 00498993 addi x19,x19,4 + +800029e8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sig0l x27, x23, x17 # perform operation +800029e8: 551b8db3 sha512sig0l x27,x23,x17 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029ec: 0007a383 lw x7,0(x15) +800029f0: 01b38863 beq x7,x27,80002a00 +800029f4: 3250246f jal x8,80005518 +800029f8: 800029e8 .word 0x800029e8 +800029fc: 8000d9fe .word 0x8000d9fe +80002a00: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0xaaaaaaaa +80002a04: 0009a803 lw x16,0(x19) +80002a08: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x00000001 +80002a0c: 0009a583 lw x11,0(x19) +80002a10: 00498993 addi x19,x19,4 + +80002a14 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sig0l x24, x16, x11 # perform operation +80002a14: 54b80c33 sha512sig0l x24,x16,x11 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a18: 0007a383 lw x7,0(x15) +80002a1c: 01838863 beq x7,x24,80002a2c +80002a20: 2f90246f jal x8,80005518 +80002a24: 80002a14 .word 0x80002a14 +80002a28: 8000da5d .word 0x8000da5d +80002a2c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xaaaaaaaa +80002a30: 0009ae03 lw x28,0(x19) +80002a34: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x00000002 +80002a38: 0009af83 lw x31,0(x19) +80002a3c: 00498993 addi x19,x19,4 + +80002a40 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sig0l x11, x28, x31 # perform operation +80002a40: 55fe05b3 sha512sig0l x11,x28,x31 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a44: 0007a383 lw x7,0(x15) +80002a48: 00b38863 beq x7,x11,80002a58 +80002a4c: 2cd0246f jal x8,80005518 +80002a50: 80002a40 .word 0x80002a40 +80002a54: 8000dabc .word 0x8000dabc +80002a58: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xaaaaaaaa +80002a5c: 0009af03 lw x30,0(x19) +80002a60: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x80000000 +80002a64: 0009aa83 lw x21,0(x19) +80002a68: 00498993 addi x19,x19,4 + +80002a6c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sig0l x25, x30, x21 # perform operation +80002a6c: 555f0cb3 sha512sig0l x25,x30,x21 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a70: 0007a383 lw x7,0(x15) +80002a74: 01938863 beq x7,x25,80002a84 +80002a78: 2a10246f jal x8,80005518 +80002a7c: 80002a6c .word 0x80002a6c +80002a80: 8000db1b .word 0x8000db1b +80002a84: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xaaaaaaaa +80002a88: 0009af83 lw x31,0(x19) +80002a8c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x80000001 +80002a90: 0009a083 lw x1,0(x19) +80002a94: 00498993 addi x19,x19,4 + +80002a98 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sig0l x13, x31, x1 # perform operation +80002a98: 541f86b3 sha512sig0l x13,x31,x1 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002a9c: 0007a383 lw x7,0(x15) +80002aa0: 00d38863 beq x7,x13,80002ab0 +80002aa4: 2750246f jal x8,80005518 +80002aa8: 80002a98 .word 0x80002a98 +80002aac: 8000db81 .word 0x8000db81 +80002ab0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xaaaaaaaa +80002ab4: 0009aa03 lw x20,0(x19) +80002ab8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x7fffffff +80002abc: 0009a083 lw x1,0(x19) +80002ac0: 00498993 addi x19,x19,4 + +80002ac4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sig0l x2, x20, x1 # perform operation +80002ac4: 541a0133 sha512sig0l x2,x20,x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ac8: 0007a383 lw x7,0(x15) +80002acc: 00238863 beq x7,x2,80002adc +80002ad0: 2490246f jal x8,80005518 +80002ad4: 80002ac4 .word 0x80002ac4 +80002ad8: 8000dbe7 .word 0x8000dbe7 +80002adc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xaaaaaaaa +80002ae0: 0009af03 lw x30,0(x19) +80002ae4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x7ffffffe +80002ae8: 0009ad03 lw x26,0(x19) +80002aec: 00498993 addi x19,x19,4 + +80002af0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sig0l x14, x30, x26 # perform operation +80002af0: 55af0733 sha512sig0l x14,x30,x26 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002af4: 0007a383 lw x7,0(x15) +80002af8: 00e38863 beq x7,x14,80002b08 +80002afc: 21d0246f jal x8,80005518 +80002b00: 80002af0 .word 0x80002af0 +80002b04: 8000dc4d .word 0x8000dc4d +80002b08: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xaaaaaaaa +80002b0c: 0009ad03 lw x26,0(x19) +80002b10: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xffffffff +80002b14: 0009a483 lw x9,0(x19) +80002b18: 00498993 addi x19,x19,4 + +80002b1c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sig0l x25, x26, x9 # perform operation +80002b1c: 549d0cb3 sha512sig0l x25,x26,x9 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b20: 0007a383 lw x7,0(x15) +80002b24: 01938863 beq x7,x25,80002b34 +80002b28: 1f10246f jal x8,80005518 +80002b2c: 80002b1c .word 0x80002b1c +80002b30: 8000dcb3 .word 0x8000dcb3 +80002b34: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xaaaaaaaa +80002b38: 0009a703 lw x14,0(x19) +80002b3c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xfffffffe +80002b40: 0009ab03 lw x22,0(x19) +80002b44: 00498993 addi x19,x19,4 + +80002b48 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sig0l x23, x14, x22 # perform operation +80002b48: 55670bb3 sha512sig0l x23,x14,x22 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b4c: 0007a383 lw x7,0(x15) +80002b50: 01738863 beq x7,x23,80002b60 +80002b54: 1c50246f jal x8,80005518 +80002b58: 80002b48 .word 0x80002b48 +80002b5c: 8000dd19 .word 0x8000dd19 +80002b60: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xaaaaaaaa +80002b64: 0009a683 lw x13,0(x19) +80002b68: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x5bbc8872 +80002b6c: 0009ac83 lw x25,0(x19) +80002b70: 00498993 addi x19,x19,4 + +80002b74 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sig0l x27, x13, x25 # perform operation +80002b74: 55968db3 sha512sig0l x27,x13,x25 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b78: 0007a383 lw x7,0(x15) +80002b7c: 01b38863 beq x7,x27,80002b8c +80002b80: 1990246f jal x8,80005518 +80002b84: 80002b74 .word 0x80002b74 +80002b88: 8000dd7f .word 0x8000dd7f +80002b8c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xaaaaaaaa +80002b90: 0009a903 lw x18,0(x19) +80002b94: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xaaaaaaaa +80002b98: 0009a803 lw x16,0(x19) +80002b9c: 00498993 addi x19,x19,4 + +80002ba0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sig0l x10, x18, x16 # perform operation +80002ba0: 55090533 sha512sig0l x10,x18,x16 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002ba4: 0007a383 lw x7,0(x15) +80002ba8: 00a38863 beq x7,x10,80002bb8 +80002bac: 16d0246f jal x8,80005518 +80002bb0: 80002ba0 .word 0x80002ba0 +80002bb4: 8000dde5 .word 0x8000dde5 +80002bb8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xaaaaaaaa +80002bbc: 0009a903 lw x18,0(x19) +80002bc0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x55555555 +80002bc4: 0009ad03 lw x26,0(x19) +80002bc8: 00498993 addi x19,x19,4 + +80002bcc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sig0l x12, x18, x26 # perform operation +80002bcc: 55a90633 sha512sig0l x12,x18,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bd0: 0007a383 lw x7,0(x15) +80002bd4: 00c38863 beq x7,x12,80002be4 +80002bd8: 1410246f jal x8,80005518 +80002bdc: 80002bcc .word 0x80002bcc +80002be0: 8000de4b .word 0x8000de4b +80002be4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x55555555 +80002be8: 0009a183 lw x3,0(x19) +80002bec: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x00000000 +80002bf0: 0009af83 lw x31,0(x19) +80002bf4: 00498993 addi x19,x19,4 + +80002bf8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sig0l x17, x3, x31 # perform operation +80002bf8: 55f188b3 sha512sig0l x17,x3,x31 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002bfc: 0007a383 lw x7,0(x15) +80002c00: 01138863 beq x7,x17,80002c10 +80002c04: 1150246f jal x8,80005518 +80002c08: 80002bf8 .word 0x80002bf8 +80002c0c: 8000deb1 .word 0x8000deb1 +80002c10: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x55555555 +80002c14: 0009a203 lw x4,0(x19) +80002c18: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x00000001 +80002c1c: 0009a103 lw x2,0(x19) +80002c20: 00498993 addi x19,x19,4 + +80002c24 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sig0l x12, x4, x2 # perform operation +80002c24: 54220633 sha512sig0l x12,x4,x2 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c28: 0007a383 lw x7,0(x15) +80002c2c: 00c38863 beq x7,x12,80002c3c +80002c30: 0e90246f jal x8,80005518 +80002c34: 80002c24 .word 0x80002c24 +80002c38: 8000df10 .word 0x8000df10 +80002c3c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x55555555 +80002c40: 0009ac03 lw x24,0(x19) +80002c44: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x00000002 +80002c48: 0009aa03 lw x20,0(x19) +80002c4c: 00498993 addi x19,x19,4 + +80002c50 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sig0l x4, x24, x20 # perform operation +80002c50: 554c0233 sha512sig0l x4,x24,x20 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c54: 0007a383 lw x7,0(x15) +80002c58: 00438863 beq x7,x4,80002c68 +80002c5c: 0bd0246f jal x8,80005518 +80002c60: 80002c50 .word 0x80002c50 +80002c64: 8000df6f .word 0x8000df6f +80002c68: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x55555555 +80002c6c: 0009a683 lw x13,0(x19) +80002c70: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x80000000 +80002c74: 0009a603 lw x12,0(x19) +80002c78: 00498993 addi x19,x19,4 + +80002c7c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sig0l x6, x13, x12 # perform operation +80002c7c: 54c68333 sha512sig0l x6,x13,x12 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c80: 0007a383 lw x7,0(x15) +80002c84: 00638863 beq x7,x6,80002c94 +80002c88: 0910246f jal x8,80005518 +80002c8c: 80002c7c .word 0x80002c7c +80002c90: 8000dfce .word 0x8000dfce +80002c94: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x55555555 +80002c98: 0009aa83 lw x21,0(x19) +80002c9c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x80000001 +80002ca0: 0009a303 lw x6,0(x19) +80002ca4: 00498993 addi x19,x19,4 + +80002ca8 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sig0l x2, x21, x6 # perform operation +80002ca8: 546a8133 sha512sig0l x2,x21,x6 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cac: 0007a383 lw x7,0(x15) +80002cb0: 00238863 beq x7,x2,80002cc0 +80002cb4: 0650246f jal x8,80005518 +80002cb8: 80002ca8 .word 0x80002ca8 +80002cbc: 8000e034 .word 0x8000e034 +80002cc0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x55555555 +80002cc4: 0009a603 lw x12,0(x19) +80002cc8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x7fffffff +80002ccc: 0009ad03 lw x26,0(x19) +80002cd0: 00498993 addi x19,x19,4 + +80002cd4 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sig0l x13, x12, x26 # perform operation +80002cd4: 55a606b3 sha512sig0l x13,x12,x26 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cd8: 0007a383 lw x7,0(x15) +80002cdc: 00d38863 beq x7,x13,80002cec +80002ce0: 0390246f jal x8,80005518 +80002ce4: 80002cd4 .word 0x80002cd4 +80002ce8: 8000e09a .word 0x8000e09a +80002cec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x55555555 +80002cf0: 0009ad83 lw x27,0(x19) +80002cf4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0x7ffffffe +80002cf8: 0009ac83 lw x25,0(x19) +80002cfc: 00498993 addi x19,x19,4 + +80002d00 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sig0l x21, x27, x25 # perform operation +80002d00: 559d8ab3 sha512sig0l x21,x27,x25 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d04: 0007a383 lw x7,0(x15) +80002d08: 01538863 beq x7,x21,80002d18 +80002d0c: 00d0246f jal x8,80005518 +80002d10: 80002d00 .word 0x80002d00 +80002d14: 8000e100 .word 0x8000e100 +80002d18: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x55555555 +80002d1c: 0009a283 lw x5,0(x19) +80002d20: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xffffffff +80002d24: 0009a483 lw x9,0(x19) +80002d28: 00498993 addi x19,x19,4 + +80002d2c : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sig0l x17, x5, x9 # perform operation +80002d2c: 549288b3 sha512sig0l x17,x5,x9 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d30: 0007a383 lw x7,0(x15) +80002d34: 01138863 beq x7,x17,80002d44 +80002d38: 7e00246f jal x8,80005518 +80002d3c: 80002d2c .word 0x80002d2c +80002d40: 8000e166 .word 0x8000e166 +80002d44: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x55555555 +80002d48: 0009a683 lw x13,0(x19) +80002d4c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0xfffffffe +80002d50: 0009a283 lw x5,0(x19) +80002d54: 00498993 addi x19,x19,4 + +80002d58 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sig0l x10, x13, x5 # perform operation +80002d58: 54568533 sha512sig0l x10,x13,x5 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d5c: 0007a383 lw x7,0(x15) +80002d60: 00a38863 beq x7,x10,80002d70 +80002d64: 7b40246f jal x8,80005518 +80002d68: 80002d58 .word 0x80002d58 +80002d6c: 8000e1cc .word 0x8000e1cc +80002d70: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x55555555 +80002d74: 0009a703 lw x14,0(x19) +80002d78: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x5bbc8872 +80002d7c: 0009ad83 lw x27,0(x19) +80002d80: 00498993 addi x19,x19,4 + +80002d84 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sig0l x21, x14, x27 # perform operation +80002d84: 55b70ab3 sha512sig0l x21,x14,x27 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d88: 0007a383 lw x7,0(x15) +80002d8c: 01538863 beq x7,x21,80002d9c +80002d90: 7880246f jal x8,80005518 +80002d94: 80002d84 .word 0x80002d84 +80002d98: 8000e232 .word 0x8000e232 +80002d9c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x55555555 +80002da0: 0009af83 lw x31,0(x19) +80002da4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0xaaaaaaaa +80002da8: 0009af03 lw x30,0(x19) +80002dac: 00498993 addi x19,x19,4 + +80002db0 : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sig0l x20, x31, x30 # perform operation +80002db0: 55ef8a33 sha512sig0l x20,x31,x30 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002db4: 0007a383 lw x7,0(x15) +80002db8: 01438863 beq x7,x20,80002dc8 +80002dbc: 75c0246f jal x8,80005518 +80002dc0: 80002db0 .word 0x80002db0 +80002dc4: 8000e298 .word 0x8000e298 +80002dc8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x55555555 +80002dcc: 0009af83 lw x31,0(x19) +80002dd0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x55555555 +80002dd4: 0009a603 lw x12,0(x19) +80002dd8: 00498993 addi x19,x19,4 + +80002ddc : +Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sig0l x4, x31, x12 # perform operation +80002ddc: 54cf8233 sha512sig0l x4,x31,x12 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sig0l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002de0: 0007a383 lw x7,0(x15) +80002de4: 00438863 beq x7,x4,80002df4 +80002de8: 7300246f jal x8,80005518 +80002dec: 80002ddc .word 0x80002ddc +80002df0: 8000e2fe .word 0x8000e2fe +80002df4: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x2861f8f2 +80002df8: 0009a003 lw x0,0(x19) +80002dfc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xb860b250 +80002e00: 0009a003 lw x0,0(x19) +80002e04: 00498993 addi x19,x19,4 + +80002e08 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b0: + sha512sig0l x17, x0, x0 # perform operation +80002e08: 540008b3 sha512sig0l x17,x0,x0 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b0, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b0_str) +80002e0c: 0007a383 lw x7,0(x15) +80002e10: 01138863 beq x7,x17,80002e20 +80002e14: 7040246f jal x8,80005518 +80002e18: 80002e08 .word 0x80002e08 +80002e1c: 8000e364 .word 0x8000e364 +80002e20: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x019d96bd +80002e24: 0009a083 lw x1,0(x19) +80002e28: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x1475e325 +80002e2c: 0009a083 lw x1,0(x19) +80002e30: 00498993 addi x19,x19,4 + +80002e34 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b1: + sha512sig0l x3, x1, x1 # perform operation +80002e34: 541081b3 sha512sig0l x3,x1,x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b1, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b1_str) +80002e38: 0007a383 lw x7,0(x15) +80002e3c: 00338863 beq x7,x3,80002e4c +80002e40: 6d80246f jal x8,80005518 +80002e44: 80002e34 .word 0x80002e34 +80002e48: 8000e3a3 .word 0x8000e3a3 +80002e4c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0x404494e2 +80002e50: 0009a103 lw x2,0(x19) +80002e54: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x7757a1da +80002e58: 0009a103 lw x2,0(x19) +80002e5c: 00498993 addi x19,x19,4 + +80002e60 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b2: + sha512sig0l x25, x2, x2 # perform operation +80002e60: 54210cb3 sha512sig0l x25,x2,x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b2, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b2_str) +80002e64: 0007a383 lw x7,0(x15) +80002e68: 01938863 beq x7,x25,80002e78 +80002e6c: 6ac0246f jal x8,80005518 +80002e70: 80002e60 .word 0x80002e60 +80002e74: 8000e3e2 .word 0x8000e3e2 +80002e78: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xb837bf97 +80002e7c: 0009a183 lw x3,0(x19) +80002e80: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0xe964459d +80002e84: 0009a183 lw x3,0(x19) +80002e88: 00498993 addi x19,x19,4 + +80002e8c : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b3: + sha512sig0l x12, x3, x3 # perform operation +80002e8c: 54318633 sha512sig0l x12,x3,x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b3, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b3_str) +80002e90: 0007a383 lw x7,0(x15) +80002e94: 00c38863 beq x7,x12,80002ea4 +80002e98: 6800246f jal x8,80005518 +80002e9c: 80002e8c .word 0x80002e8c +80002ea0: 8000e421 .word 0x8000e421 +80002ea4: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0xfcd66755 +80002ea8: 0009a203 lw x4,0(x19) +80002eac: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x06e62f20 +80002eb0: 0009a203 lw x4,0(x19) +80002eb4: 00498993 addi x19,x19,4 + +80002eb8 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b4: + sha512sig0l x20, x4, x4 # perform operation +80002eb8: 54420a33 sha512sig0l x20,x4,x4 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b4, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b4_str) +80002ebc: 0007a383 lw x7,0(x15) +80002ec0: 01438863 beq x7,x20,80002ed0 +80002ec4: 6540246f jal x8,80005518 +80002ec8: 80002eb8 .word 0x80002eb8 +80002ecc: 8000e460 .word 0x8000e460 +80002ed0: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x562597d8 +80002ed4: 0009a283 lw x5,0(x19) +80002ed8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0xe3ae1d73 +80002edc: 0009a283 lw x5,0(x19) +80002ee0: 00498993 addi x19,x19,4 + +80002ee4 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b5: + sha512sig0l x31, x5, x5 # perform operation +80002ee4: 54528fb3 sha512sig0l x31,x5,x5 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b5, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b5_str) +80002ee8: 0007a383 lw x7,0(x15) +80002eec: 01f38863 beq x7,x31,80002efc +80002ef0: 6280246f jal x8,80005518 +80002ef4: 80002ee4 .word 0x80002ee4 +80002ef8: 8000e49f .word 0x8000e49f +80002efc: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x65decca7 +80002f00: 0009a303 lw x6,0(x19) +80002f04: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x28f6fb04 +80002f08: 0009a303 lw x6,0(x19) +80002f0c: 00498993 addi x19,x19,4 + +80002f10 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b6: + sha512sig0l x14, x6, x6 # perform operation +80002f10: 54630733 sha512sig0l x14,x6,x6 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b6, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b6_str) +80002f14: 0007a383 lw x7,0(x15) +80002f18: 00e38863 beq x7,x14,80002f28 +80002f1c: 5fc0246f jal x8,80005518 +80002f20: 80002f10 .word 0x80002f10 +80002f24: 8000e4de .word 0x8000e4de +80002f28: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80002f2c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80002f30: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x042753fe +80002f34: 0009a383 lw x7,0(x19) +80002f38: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0x3a952ea6 +80002f3c: 0009a383 lw x7,0(x19) +80002f40: 00498993 addi x19,x19,4 + +80002f44 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b7: + sha512sig0l x0, x7, x7 # perform operation +80002f44: 54738033 sha512sig0l x0,x7,x7 + # Check if x0 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x0, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b7, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b7_str) +80002f48: 0007a683 lw x13,0(x15) +80002f4c: 00068863 beq x13,x0,80002f5c +80002f50: 5f00276f jal x14,80005540 +80002f54: 80002f44 .word 0x80002f44 +80002f58: 8000e51d .word 0x8000e51d +80002f5c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0x7e8bfeb2 +80002f60: 0009a403 lw x8,0(x19) +80002f64: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x4de05d1b +80002f68: 0009a403 lw x8,0(x19) +80002f6c: 00498993 addi x19,x19,4 + +80002f70 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b8: + sha512sig0l x5, x8, x8 # perform operation +80002f70: 548402b3 sha512sig0l x5,x8,x8 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b8, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b8_str) +80002f74: 0007a683 lw x13,0(x15) +80002f78: 00568863 beq x13,x5,80002f88 +80002f7c: 5c40276f jal x14,80005540 +80002f80: 80002f70 .word 0x80002f70 +80002f84: 8000e55c .word 0x8000e55c +80002f88: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x8a02ec80 +80002f8c: 0009a483 lw x9,0(x19) +80002f90: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x84663477 +80002f94: 0009a483 lw x9,0(x19) +80002f98: 00498993 addi x19,x19,4 + +80002f9c : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b9: + sha512sig0l x22, x9, x9 # perform operation +80002f9c: 54948b33 sha512sig0l x22,x9,x9 + # Check if x22 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x22, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b9, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b9_str) +80002fa0: 0007a683 lw x13,0(x15) +80002fa4: 01668863 beq x13,x22,80002fb4 +80002fa8: 5980276f jal x14,80005540 +80002fac: 80002f9c .word 0x80002f9c +80002fb0: 8000e59b .word 0x8000e59b +80002fb4: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x3bb460cc +80002fb8: 0009a503 lw x10,0(x19) +80002fbc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x4fffd991 +80002fc0: 0009a503 lw x10,0(x19) +80002fc4: 00498993 addi x19,x19,4 + +80002fc8 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b10: + sha512sig0l x24, x10, x10 # perform operation +80002fc8: 54a50c33 sha512sig0l x24,x10,x10 + # Check if x24 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x24, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b10, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b10_str) +80002fcc: 0007a683 lw x13,0(x15) +80002fd0: 01868863 beq x13,x24,80002fe0 +80002fd4: 56c0276f jal x14,80005540 +80002fd8: 80002fc8 .word 0x80002fc8 +80002fdc: 8000e5da .word 0x8000e5da +80002fe0: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x8ea5535e +80002fe4: 0009a583 lw x11,0(x19) +80002fe8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x1eb6de1e +80002fec: 0009a583 lw x11,0(x19) +80002ff0: 00498993 addi x19,x19,4 + +80002ff4 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b11: + sha512sig0l x12, x11, x11 # perform operation +80002ff4: 54b58633 sha512sig0l x12,x11,x11 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b11, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b11_str) +80002ff8: 0007a683 lw x13,0(x15) +80002ffc: 00c68863 beq x13,x12,8000300c +80003000: 5400276f jal x14,80005540 +80003004: 80002ff4 .word 0x80002ff4 +80003008: 8000e61a .word 0x8000e61a +8000300c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x9bcc74d4 +80003010: 0009a603 lw x12,0(x19) +80003014: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x28e189c4 +80003018: 0009a603 lw x12,0(x19) +8000301c: 00498993 addi x19,x19,4 + +80003020 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b12: + sha512sig0l x30, x12, x12 # perform operation +80003020: 54c60f33 sha512sig0l x30,x12,x12 + # Check if x30 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x30, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b12, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b12_str) +80003024: 0007a683 lw x13,0(x15) +80003028: 01e68863 beq x13,x30,80003038 +8000302c: 5140276f jal x14,80005540 +80003030: 80003020 .word 0x80003020 +80003034: 8000e65a .word 0x8000e65a +80003038: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000303c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003040: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x24e35ab7 +80003044: 0009a683 lw x13,0(x19) +80003048: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x40413c98 +8000304c: 0009a683 lw x13,0(x19) +80003050: 00498993 addi x19,x19,4 + +80003054 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b13: + sha512sig0l x24, x13, x13 # perform operation +80003054: 54d68c33 sha512sig0l x24,x13,x13 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b13, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b13_str) +80003058: 0007a383 lw x7,0(x15) +8000305c: 01838863 beq x7,x24,8000306c +80003060: 4b80246f jal x8,80005518 +80003064: 80003054 .word 0x80003054 +80003068: 8000e69a .word 0x8000e69a +8000306c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xbee1599b +80003070: 0009a703 lw x14,0(x19) +80003074: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x16e3f423 +80003078: 0009a703 lw x14,0(x19) +8000307c: 00498993 addi x19,x19,4 + +80003080 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b14: + sha512sig0l x26, x14, x14 # perform operation +80003080: 54e70d33 sha512sig0l x26,x14,x14 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b14, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b14_str) +80003084: 0007a383 lw x7,0(x15) +80003088: 01a38863 beq x7,x26,80003098 +8000308c: 48c0246f jal x8,80005518 +80003090: 80003080 .word 0x80003080 +80003094: 8000e6da .word 0x8000e6da +80003098: 00478793 addi x15,x15,4 + + mv x12, x15 # switch signature pointer register to avoid conflict with test +8000309c: 00078613 addi x12,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x2b41ac8b +800030a0: 0009a783 lw x15,0(x19) +800030a4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x1b91d49b +800030a8: 0009a783 lw x15,0(x19) +800030ac: 00498993 addi x19,x19,4 + +800030b0 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b15: + sha512sig0l x29, x15, x15 # perform operation +800030b0: 54f78eb3 sha512sig0l x29,x15,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b15, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b15_str) +800030b4: 00062383 lw x7,0(x12) +800030b8: 01d38863 beq x7,x29,800030c8 +800030bc: 45c0246f jal x8,80005518 +800030c0: 800030b0 .word 0x800030b0 +800030c4: 8000e71a .word 0x8000e71a +800030c8: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x2b995e35 +800030cc: 0009a803 lw x16,0(x19) +800030d0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xb69eba7b +800030d4: 0009a803 lw x16,0(x19) +800030d8: 00498993 addi x19,x19,4 + +800030dc : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b16: + sha512sig0l x20, x16, x16 # perform operation +800030dc: 55080a33 sha512sig0l x20,x16,x16 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b16, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b16_str) +800030e0: 00062383 lw x7,0(x12) +800030e4: 01438863 beq x7,x20,800030f4 +800030e8: 4300246f jal x8,80005518 +800030ec: 800030dc .word 0x800030dc +800030f0: 8000e75a .word 0x8000e75a +800030f4: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xeab01bed +800030f8: 0009a883 lw x17,0(x19) +800030fc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x2b42d5ad +80003100: 0009a883 lw x17,0(x19) +80003104: 00498993 addi x19,x19,4 + +80003108 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b17: + sha512sig0l x29, x17, x17 # perform operation +80003108: 55188eb3 sha512sig0l x29,x17,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b17, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b17_str) +8000310c: 00062383 lw x7,0(x12) +80003110: 01d38863 beq x7,x29,80003120 +80003114: 4040246f jal x8,80005518 +80003118: 80003108 .word 0x80003108 +8000311c: 8000e79a .word 0x8000e79a +80003120: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x1a02adaf +80003124: 0009a903 lw x18,0(x19) +80003128: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x6b345acd +8000312c: 0009a903 lw x18,0(x19) +80003130: 00498993 addi x19,x19,4 + +80003134 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b18: + sha512sig0l x24, x18, x18 # perform operation +80003134: 55290c33 sha512sig0l x24,x18,x18 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b18, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b18_str) +80003138: 00062383 lw x7,0(x12) +8000313c: 01838863 beq x7,x24,8000314c +80003140: 3d80246f jal x8,80005518 +80003144: 80003134 .word 0x80003134 +80003148: 8000e7da .word 0x8000e7da +8000314c: 00460613 addi x12,x12,4 + + mv x3, x19 # switch data pointer register to avoid conflict with test +80003150: 00098193 addi x3,x19,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x80ca153a +80003154: 0001a983 lw x19,0(x3) +80003158: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x4421c33e +8000315c: 0001a983 lw x19,0(x3) +80003160: 00418193 addi x3,x3,4 + +80003164 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b19: + sha512sig0l x16, x19, x19 # perform operation +80003164: 55398833 sha512sig0l x16,x19,x19 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b19, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b19_str) +80003168: 00062383 lw x7,0(x12) +8000316c: 01038863 beq x7,x16,8000317c +80003170: 3a80246f jal x8,80005518 +80003174: 80003164 .word 0x80003164 +80003178: 8000e81a .word 0x8000e81a +8000317c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x4b7d16b0 +80003180: 0001aa03 lw x20,0(x3) +80003184: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7533fe0f +80003188: 0001aa03 lw x20,0(x3) +8000318c: 00418193 addi x3,x3,4 + +80003190 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b20: + sha512sig0l x24, x20, x20 # perform operation +80003190: 554a0c33 sha512sig0l x24,x20,x20 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b20, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b20_str) +80003194: 00062383 lw x7,0(x12) +80003198: 01838863 beq x7,x24,800031a8 +8000319c: 37c0246f jal x8,80005518 +800031a0: 80003190 .word 0x80003190 +800031a4: 8000e85a .word 0x8000e85a +800031a8: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x37cf5083 +800031ac: 0001aa83 lw x21,0(x3) +800031b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xb59fb80a +800031b4: 0001aa83 lw x21,0(x3) +800031b8: 00418193 addi x3,x3,4 + +800031bc : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b21: + sha512sig0l x6, x21, x21 # perform operation +800031bc: 555a8333 sha512sig0l x6,x21,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b21, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b21_str) +800031c0: 00062383 lw x7,0(x12) +800031c4: 00638863 beq x7,x6,800031d4 +800031c8: 3500246f jal x8,80005518 +800031cc: 800031bc .word 0x800031bc +800031d0: 8000e89a .word 0x8000e89a +800031d4: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x8539d7c0 +800031d8: 0001ab03 lw x22,0(x3) +800031dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x98ff5bdd +800031e0: 0001ab03 lw x22,0(x3) +800031e4: 00418193 addi x3,x3,4 + +800031e8 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b22: + sha512sig0l x26, x22, x22 # perform operation +800031e8: 556b0d33 sha512sig0l x26,x22,x22 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b22, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b22_str) +800031ec: 00062383 lw x7,0(x12) +800031f0: 01a38863 beq x7,x26,80003200 +800031f4: 3240246f jal x8,80005518 +800031f8: 800031e8 .word 0x800031e8 +800031fc: 8000e8da .word 0x8000e8da +80003200: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xf8c265be +80003204: 0001ab83 lw x23,0(x3) +80003208: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x15aaea77 +8000320c: 0001ab83 lw x23,0(x3) +80003210: 00418193 addi x3,x3,4 + +80003214 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b23: + sha512sig0l x30, x23, x23 # perform operation +80003214: 557b8f33 sha512sig0l x30,x23,x23 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b23, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b23_str) +80003218: 00062383 lw x7,0(x12) +8000321c: 01e38863 beq x7,x30,8000322c +80003220: 2f80246f jal x8,80005518 +80003224: 80003214 .word 0x80003214 +80003228: 8000e91a .word 0x8000e91a +8000322c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x02dc595d +80003230: 0001ac03 lw x24,0(x3) +80003234: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x551904f9 +80003238: 0001ac03 lw x24,0(x3) +8000323c: 00418193 addi x3,x3,4 + +80003240 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b24: + sha512sig0l x10, x24, x24 # perform operation +80003240: 558c0533 sha512sig0l x10,x24,x24 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b24, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b24_str) +80003244: 00062383 lw x7,0(x12) +80003248: 00a38863 beq x7,x10,80003258 +8000324c: 2cc0246f jal x8,80005518 +80003250: 80003240 .word 0x80003240 +80003254: 8000e95a .word 0x8000e95a +80003258: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xf3451c2f +8000325c: 0001ac83 lw x25,0(x3) +80003260: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x0a860a4b +80003264: 0001ac83 lw x25,0(x3) +80003268: 00418193 addi x3,x3,4 + +8000326c : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b25: + sha512sig0l x1, x25, x25 # perform operation +8000326c: 559c80b3 sha512sig0l x1,x25,x25 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b25, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b25_str) +80003270: 00062383 lw x7,0(x12) +80003274: 00138863 beq x7,x1,80003284 +80003278: 2a00246f jal x8,80005518 +8000327c: 8000326c .word 0x8000326c +80003280: 8000e99a .word 0x8000e99a +80003284: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xf754d245 +80003288: 0001ad03 lw x26,0(x3) +8000328c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x253a1ef7 +80003290: 0001ad03 lw x26,0(x3) +80003294: 00418193 addi x3,x3,4 + +80003298 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b26: + sha512sig0l x14, x26, x26 # perform operation +80003298: 55ad0733 sha512sig0l x14,x26,x26 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b26, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b26_str) +8000329c: 00062383 lw x7,0(x12) +800032a0: 00e38863 beq x7,x14,800032b0 +800032a4: 2740246f jal x8,80005518 +800032a8: 80003298 .word 0x80003298 +800032ac: 8000e9da .word 0x8000e9da +800032b0: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x017f788b +800032b4: 0001ad83 lw x27,0(x3) +800032b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x8c9c9a44 +800032bc: 0001ad83 lw x27,0(x3) +800032c0: 00418193 addi x3,x3,4 + +800032c4 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b27: + sha512sig0l x4, x27, x27 # perform operation +800032c4: 55bd8233 sha512sig0l x4,x27,x27 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b27, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b27_str) +800032c8: 00062383 lw x7,0(x12) +800032cc: 00438863 beq x7,x4,800032dc +800032d0: 2480246f jal x8,80005518 +800032d4: 800032c4 .word 0x800032c4 +800032d8: 8000ea1a .word 0x8000ea1a +800032dc: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x03112619 +800032e0: 0001ae03 lw x28,0(x3) +800032e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x4141d804 +800032e8: 0001ae03 lw x28,0(x3) +800032ec: 00418193 addi x3,x3,4 + +800032f0 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b28: + sha512sig0l x26, x28, x28 # perform operation +800032f0: 55ce0d33 sha512sig0l x26,x28,x28 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b28, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b28_str) +800032f4: 00062383 lw x7,0(x12) +800032f8: 01a38863 beq x7,x26,80003308 +800032fc: 21c0246f jal x8,80005518 +80003300: 800032f0 .word 0x800032f0 +80003304: 8000ea5a .word 0x8000ea5a +80003308: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x81b091cc +8000330c: 0001ae83 lw x29,0(x3) +80003310: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xeef471d4 +80003314: 0001ae83 lw x29,0(x3) +80003318: 00418193 addi x3,x3,4 + +8000331c : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b29: + sha512sig0l x10, x29, x29 # perform operation +8000331c: 55de8533 sha512sig0l x10,x29,x29 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b29, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b29_str) +80003320: 00062383 lw x7,0(x12) +80003324: 00a38863 beq x7,x10,80003334 +80003328: 1f00246f jal x8,80005518 +8000332c: 8000331c .word 0x8000331c +80003330: 8000ea9a .word 0x8000ea9a +80003334: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xec271e0f +80003338: 0001af03 lw x30,0(x3) +8000333c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x9799fd44 +80003340: 0001af03 lw x30,0(x3) +80003344: 00418193 addi x3,x3,4 + +80003348 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b30: + sha512sig0l x18, x30, x30 # perform operation +80003348: 55ef0933 sha512sig0l x18,x30,x30 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b30, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b30_str) +8000334c: 00062383 lw x7,0(x12) +80003350: 01238863 beq x7,x18,80003360 +80003354: 1c40246f jal x8,80005518 +80003358: 80003348 .word 0x80003348 +8000335c: 8000eada .word 0x8000eada +80003360: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xb08ee177 +80003364: 0001af83 lw x31,0(x3) +80003368: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xfcb27011 +8000336c: 0001af83 lw x31,0(x3) +80003370: 00418193 addi x3,x3,4 + +80003374 : +Zknh_sha512sig0l_cg_cmp_rs1_rs2_b31: + sha512sig0l x28, x31, x31 # perform operation +80003374: 55ff8e33 sha512sig0l x28,x31,x31 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b31, Zknh_sha512sig0l_cg_cmp_rs1_rs2_b31_str) +80003378: 00062383 lw x7,0(x12) +8000337c: 01c38863 beq x7,x28,8000338c +80003380: 1980246f jal x8,80005518 +80003384: 80003374 .word 0x80003374 +80003388: 8000eb1a .word 0x8000eb1a +8000338c: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xb9b72e5f +80003390: 0001a003 lw x0,0(x3) +80003394: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x693fdabe +80003398: 0001a803 lw x16,0(x3) +8000339c: 00418193 addi x3,x3,4 + +800033a0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b0: + sha512sig0l x0, x0, x16 # perform operation +800033a0: 55000033 sha512sig0l x0,x0,x16 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zknh_sha512sig0l_cg_cmp_rd_rs1_b0, Zknh_sha512sig0l_cg_cmp_rd_rs1_b0_str) +800033a4: 00062383 lw x7,0(x12) +800033a8: 00038863 beq x7,x0,800033b8 +800033ac: 16c0246f jal x8,80005518 +800033b0: 800033a0 .word 0x800033a0 +800033b4: 8000eb5a .word 0x8000eb5a +800033b8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x000ddae1 +800033bc: 0001a083 lw x1,0(x3) +800033c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xccd164af +800033c4: 0001a503 lw x10,0(x3) +800033c8: 00418193 addi x3,x3,4 + +800033cc : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b1: + sha512sig0l x1, x1, x10 # perform operation +800033cc: 54a080b3 sha512sig0l x1,x1,x10 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknh_sha512sig0l_cg_cmp_rd_rs1_b1, Zknh_sha512sig0l_cg_cmp_rd_rs1_b1_str) +800033d0: 00062383 lw x7,0(x12) +800033d4: 00138863 beq x7,x1,800033e4 +800033d8: 1400246f jal x8,80005518 +800033dc: 800033cc .word 0x800033cc +800033e0: 8000eb98 .word 0x8000eb98 +800033e4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x18c7be1b +800033e8: 0001a103 lw x2,0(x3) +800033ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x9b1cec09 +800033f0: 0001a703 lw x14,0(x3) +800033f4: 00418193 addi x3,x3,4 + +800033f8 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b2: + sha512sig0l x2, x2, x14 # perform operation +800033f8: 54e10133 sha512sig0l x2,x2,x14 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknh_sha512sig0l_cg_cmp_rd_rs1_b2, Zknh_sha512sig0l_cg_cmp_rd_rs1_b2_str) +800033fc: 00062383 lw x7,0(x12) +80003400: 00238863 beq x7,x2,80003410 +80003404: 1140246f jal x8,80005518 +80003408: 800033f8 .word 0x800033f8 +8000340c: 8000ebd6 .word 0x8000ebd6 +80003410: 00460613 addi x12,x12,4 + + mv x10, x3 # switch data pointer register to avoid conflict with test +80003414: 00018513 addi x10,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x63148053 +80003418: 00052183 lw x3,0(x10) +8000341c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x86db5f0b +80003420: 00052c03 lw x24,0(x10) +80003424: 00450513 addi x10,x10,4 + +80003428 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b3: + sha512sig0l x3, x3, x24 # perform operation +80003428: 558181b3 sha512sig0l x3,x3,x24 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknh_sha512sig0l_cg_cmp_rd_rs1_b3, Zknh_sha512sig0l_cg_cmp_rd_rs1_b3_str) +8000342c: 00062383 lw x7,0(x12) +80003430: 00338863 beq x7,x3,80003440 +80003434: 0e40246f jal x8,80005518 +80003438: 80003428 .word 0x80003428 +8000343c: 8000ec14 .word 0x8000ec14 +80003440: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0d4377f9 +80003444: 00052203 lw x4,0(x10) +80003448: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x09ed1978 +8000344c: 00052703 lw x14,0(x10) +80003450: 00450513 addi x10,x10,4 + +80003454 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b4: + sha512sig0l x4, x4, x14 # perform operation +80003454: 54e20233 sha512sig0l x4,x4,x14 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknh_sha512sig0l_cg_cmp_rd_rs1_b4, Zknh_sha512sig0l_cg_cmp_rd_rs1_b4_str) +80003458: 00062383 lw x7,0(x12) +8000345c: 00438863 beq x7,x4,8000346c +80003460: 0b80246f jal x8,80005518 +80003464: 80003454 .word 0x80003454 +80003468: 8000ec52 .word 0x8000ec52 +8000346c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x08f0bfb8 +80003470: 00052283 lw x5,0(x10) +80003474: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x8438f29d +80003478: 00052183 lw x3,0(x10) +8000347c: 00450513 addi x10,x10,4 + +80003480 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b5: + sha512sig0l x5, x5, x3 # perform operation +80003480: 543282b3 sha512sig0l x5,x5,x3 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknh_sha512sig0l_cg_cmp_rd_rs1_b5, Zknh_sha512sig0l_cg_cmp_rd_rs1_b5_str) +80003484: 00062383 lw x7,0(x12) +80003488: 00538863 beq x7,x5,80003498 +8000348c: 08c0246f jal x8,80005518 +80003490: 80003480 .word 0x80003480 +80003494: 8000ec90 .word 0x8000ec90 +80003498: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x710cef42 +8000349c: 00052303 lw x6,0(x10) +800034a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xc99dcd67 +800034a4: 00052b83 lw x23,0(x10) +800034a8: 00450513 addi x10,x10,4 + +800034ac : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b6: + sha512sig0l x6, x6, x23 # perform operation +800034ac: 55730333 sha512sig0l x6,x6,x23 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknh_sha512sig0l_cg_cmp_rd_rs1_b6, Zknh_sha512sig0l_cg_cmp_rd_rs1_b6_str) +800034b0: 00062383 lw x7,0(x12) +800034b4: 00638863 beq x7,x6,800034c4 +800034b8: 0600246f jal x8,80005518 +800034bc: 800034ac .word 0x800034ac +800034c0: 8000ecce .word 0x8000ecce +800034c4: 00460613 addi x12,x12,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800034c8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800034cc: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xac70b4c6 +800034d0: 00052383 lw x7,0(x10) +800034d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x98eeb230 +800034d8: 00052183 lw x3,0(x10) +800034dc: 00450513 addi x10,x10,4 + +800034e0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b7: + sha512sig0l x7, x7, x3 # perform operation +800034e0: 543383b3 sha512sig0l x7,x7,x3 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknh_sha512sig0l_cg_cmp_rd_rs1_b7, Zknh_sha512sig0l_cg_cmp_rd_rs1_b7_str) +800034e4: 00062203 lw x4,0(x12) +800034e8: 00720863 beq x4,x7,800034f8 +800034ec: 014022ef jal x5,80005500 +800034f0: 800034e0 .word 0x800034e0 +800034f4: 8000ed0c .word 0x8000ed0c +800034f8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x10caf44b +800034fc: 00052403 lw x8,0(x10) +80003500: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5825ee61 +80003504: 00052703 lw x14,0(x10) +80003508: 00450513 addi x10,x10,4 + +8000350c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b8: + sha512sig0l x8, x8, x14 # perform operation +8000350c: 54e40433 sha512sig0l x8,x8,x14 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknh_sha512sig0l_cg_cmp_rd_rs1_b8, Zknh_sha512sig0l_cg_cmp_rd_rs1_b8_str) +80003510: 00062203 lw x4,0(x12) +80003514: 00820863 beq x4,x8,80003524 +80003518: 7e9012ef jal x5,80005500 +8000351c: 8000350c .word 0x8000350c +80003520: 8000ed4a .word 0x8000ed4a +80003524: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x4b97bf61 +80003528: 00052483 lw x9,0(x10) +8000352c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xf66c8455 +80003530: 00052d83 lw x27,0(x10) +80003534: 00450513 addi x10,x10,4 + +80003538 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b9: + sha512sig0l x9, x9, x27 # perform operation +80003538: 55b484b3 sha512sig0l x9,x9,x27 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zknh_sha512sig0l_cg_cmp_rd_rs1_b9, Zknh_sha512sig0l_cg_cmp_rd_rs1_b9_str) +8000353c: 00062203 lw x4,0(x12) +80003540: 00920863 beq x4,x9,80003550 +80003544: 7bd012ef jal x5,80005500 +80003548: 80003538 .word 0x80003538 +8000354c: 8000ed88 .word 0x8000ed88 +80003550: 00460613 addi x12,x12,4 + + mv x22, x10 # switch data pointer register to avoid conflict with test +80003554: 00050b13 addi x22,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x0f99674f +80003558: 000b2503 lw x10,0(x22) +8000355c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x5dd13860 +80003560: 000b2903 lw x18,0(x22) +80003564: 004b0b13 addi x22,x22,4 + +80003568 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b10: + sha512sig0l x10, x10, x18 # perform operation +80003568: 55250533 sha512sig0l x10,x10,x18 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknh_sha512sig0l_cg_cmp_rd_rs1_b10, Zknh_sha512sig0l_cg_cmp_rd_rs1_b10_str) +8000356c: 00062203 lw x4,0(x12) +80003570: 00a20863 beq x4,x10,80003580 +80003574: 78d012ef jal x5,80005500 +80003578: 80003568 .word 0x80003568 +8000357c: 8000edc6 .word 0x8000edc6 +80003580: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xdaa2c5d4 +80003584: 000b2583 lw x11,0(x22) +80003588: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x3723f9aa +8000358c: 000b2083 lw x1,0(x22) +80003590: 004b0b13 addi x22,x22,4 + +80003594 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b11: + sha512sig0l x11, x11, x1 # perform operation +80003594: 541585b3 sha512sig0l x11,x11,x1 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknh_sha512sig0l_cg_cmp_rd_rs1_b11, Zknh_sha512sig0l_cg_cmp_rd_rs1_b11_str) +80003598: 00062203 lw x4,0(x12) +8000359c: 00b20863 beq x4,x11,800035ac +800035a0: 761012ef jal x5,80005500 +800035a4: 80003594 .word 0x80003594 +800035a8: 8000ee05 .word 0x8000ee05 +800035ac: 00460613 addi x12,x12,4 + + mv x17, x12 # switch signature pointer register to avoid conflict with test +800035b0: 00060893 addi x17,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x5db09642 +800035b4: 000b2603 lw x12,0(x22) +800035b8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x2a7f19b8 +800035bc: 000b2683 lw x13,0(x22) +800035c0: 004b0b13 addi x22,x22,4 + +800035c4 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b12: + sha512sig0l x12, x12, x13 # perform operation +800035c4: 54d60633 sha512sig0l x12,x12,x13 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknh_sha512sig0l_cg_cmp_rd_rs1_b12, Zknh_sha512sig0l_cg_cmp_rd_rs1_b12_str) +800035c8: 0008a203 lw x4,0(x17) +800035cc: 00c20863 beq x4,x12,800035dc +800035d0: 731012ef jal x5,80005500 +800035d4: 800035c4 .word 0x800035c4 +800035d8: 8000ee44 .word 0x8000ee44 +800035dc: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0xf1012b64 +800035e0: 000b2683 lw x13,0(x22) +800035e4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x5f2b548b +800035e8: 000b2403 lw x8,0(x22) +800035ec: 004b0b13 addi x22,x22,4 + +800035f0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b13: + sha512sig0l x13, x13, x8 # perform operation +800035f0: 548686b3 sha512sig0l x13,x13,x8 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknh_sha512sig0l_cg_cmp_rd_rs1_b13, Zknh_sha512sig0l_cg_cmp_rd_rs1_b13_str) +800035f4: 0008a203 lw x4,0(x17) +800035f8: 00d20863 beq x4,x13,80003608 +800035fc: 705012ef jal x5,80005500 +80003600: 800035f0 .word 0x800035f0 +80003604: 8000ee83 .word 0x8000ee83 +80003608: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xa75aec65 +8000360c: 000b2703 lw x14,0(x22) +80003610: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x68cbbe39 +80003614: 000b2983 lw x19,0(x22) +80003618: 004b0b13 addi x22,x22,4 + +8000361c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b14: + sha512sig0l x14, x14, x19 # perform operation +8000361c: 55370733 sha512sig0l x14,x14,x19 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknh_sha512sig0l_cg_cmp_rd_rs1_b14, Zknh_sha512sig0l_cg_cmp_rd_rs1_b14_str) +80003620: 0008a203 lw x4,0(x17) +80003624: 00e20863 beq x4,x14,80003634 +80003628: 6d9012ef jal x5,80005500 +8000362c: 8000361c .word 0x8000361c +80003630: 8000eec2 .word 0x8000eec2 +80003634: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x0a3014fb +80003638: 000b2783 lw x15,0(x22) +8000363c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xfb81e5b0 +80003640: 000b2503 lw x10,0(x22) +80003644: 004b0b13 addi x22,x22,4 + +80003648 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b15: + sha512sig0l x15, x15, x10 # perform operation +80003648: 54a787b3 sha512sig0l x15,x15,x10 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknh_sha512sig0l_cg_cmp_rd_rs1_b15, Zknh_sha512sig0l_cg_cmp_rd_rs1_b15_str) +8000364c: 0008a203 lw x4,0(x17) +80003650: 00f20863 beq x4,x15,80003660 +80003654: 6ad012ef jal x5,80005500 +80003658: 80003648 .word 0x80003648 +8000365c: 8000ef01 .word 0x8000ef01 +80003660: 00488893 addi x17,x17,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x53793b9f +80003664: 000b2803 lw x16,0(x22) +80003668: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xbea2d7e8 +8000366c: 000b2703 lw x14,0(x22) +80003670: 004b0b13 addi x22,x22,4 + +80003674 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b16: + sha512sig0l x16, x16, x14 # perform operation +80003674: 54e80833 sha512sig0l x16,x16,x14 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknh_sha512sig0l_cg_cmp_rd_rs1_b16, Zknh_sha512sig0l_cg_cmp_rd_rs1_b16_str) +80003678: 0008a203 lw x4,0(x17) +8000367c: 01020863 beq x4,x16,8000368c +80003680: 681012ef jal x5,80005500 +80003684: 80003674 .word 0x80003674 +80003688: 8000ef40 .word 0x8000ef40 +8000368c: 00488893 addi x17,x17,4 + + mv x21, x17 # switch signature pointer register to avoid conflict with test +80003690: 00088a93 addi x21,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xd9c50b07 +80003694: 000b2883 lw x17,0(x22) +80003698: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x3cbb7aad +8000369c: 000b2103 lw x2,0(x22) +800036a0: 004b0b13 addi x22,x22,4 + +800036a4 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b17: + sha512sig0l x17, x17, x2 # perform operation +800036a4: 542888b3 sha512sig0l x17,x17,x2 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig0l_cg_cmp_rd_rs1_b17, Zknh_sha512sig0l_cg_cmp_rd_rs1_b17_str) +800036a8: 000aa203 lw x4,0(x21) +800036ac: 01120863 beq x4,x17,800036bc +800036b0: 651012ef jal x5,80005500 +800036b4: 800036a4 .word 0x800036a4 +800036b8: 8000ef7f .word 0x8000ef7f +800036bc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x2e2b202a +800036c0: 000b2903 lw x18,0(x22) +800036c4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x5e8e137b +800036c8: 000b2a03 lw x20,0(x22) +800036cc: 004b0b13 addi x22,x22,4 + +800036d0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b18: + sha512sig0l x18, x18, x20 # perform operation +800036d0: 55490933 sha512sig0l x18,x18,x20 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig0l_cg_cmp_rd_rs1_b18, Zknh_sha512sig0l_cg_cmp_rd_rs1_b18_str) +800036d4: 000aa203 lw x4,0(x21) +800036d8: 01220863 beq x4,x18,800036e8 +800036dc: 625012ef jal x5,80005500 +800036e0: 800036d0 .word 0x800036d0 +800036e4: 8000efbe .word 0x8000efbe +800036e8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xb0223501 +800036ec: 000b2983 lw x19,0(x22) +800036f0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x4b75abe5 +800036f4: 000b2483 lw x9,0(x22) +800036f8: 004b0b13 addi x22,x22,4 + +800036fc : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b19: + sha512sig0l x19, x19, x9 # perform operation +800036fc: 549989b3 sha512sig0l x19,x19,x9 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig0l_cg_cmp_rd_rs1_b19, Zknh_sha512sig0l_cg_cmp_rd_rs1_b19_str) +80003700: 000aa203 lw x4,0(x21) +80003704: 01320863 beq x4,x19,80003714 +80003708: 5f9012ef jal x5,80005500 +8000370c: 800036fc .word 0x800036fc +80003710: 8000effd .word 0x8000effd +80003714: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xc39a0514 +80003718: 000b2a03 lw x20,0(x22) +8000371c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xc4d9fae2 +80003720: 000b2703 lw x14,0(x22) +80003724: 004b0b13 addi x22,x22,4 + +80003728 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b20: + sha512sig0l x20, x20, x14 # perform operation +80003728: 54ea0a33 sha512sig0l x20,x20,x14 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig0l_cg_cmp_rd_rs1_b20, Zknh_sha512sig0l_cg_cmp_rd_rs1_b20_str) +8000372c: 000aa203 lw x4,0(x21) +80003730: 01420863 beq x4,x20,80003740 +80003734: 5cd012ef jal x5,80005500 +80003738: 80003728 .word 0x80003728 +8000373c: 8000f03c .word 0x8000f03c +80003740: 004a8a93 addi x21,x21,4 + + mv x19, x21 # switch signature pointer register to avoid conflict with test +80003744: 000a8993 addi x19,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x94955b5a +80003748: 000b2a83 lw x21,0(x22) +8000374c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0xa6943a2f +80003750: 000b2383 lw x7,0(x22) +80003754: 004b0b13 addi x22,x22,4 + +80003758 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b21: + sha512sig0l x21, x21, x7 # perform operation +80003758: 547a8ab3 sha512sig0l x21,x21,x7 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zknh_sha512sig0l_cg_cmp_rd_rs1_b21, Zknh_sha512sig0l_cg_cmp_rd_rs1_b21_str) +8000375c: 0009a203 lw x4,0(x19) +80003760: 01520863 beq x4,x21,80003770 +80003764: 59d012ef jal x5,80005500 +80003768: 80003758 .word 0x80003758 +8000376c: 8000f07b .word 0x8000f07b +80003770: 00498993 addi x19,x19,4 + + mv x29, x22 # switch data pointer register to avoid conflict with test +80003774: 000b0e93 addi x29,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x60cd8589 +80003778: 000eab03 lw x22,0(x29) +8000377c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x482bbbbf +80003780: 000ea803 lw x16,0(x29) +80003784: 004e8e93 addi x29,x29,4 + +80003788 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b22: + sha512sig0l x22, x22, x16 # perform operation +80003788: 550b0b33 sha512sig0l x22,x22,x16 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zknh_sha512sig0l_cg_cmp_rd_rs1_b22, Zknh_sha512sig0l_cg_cmp_rd_rs1_b22_str) +8000378c: 0009a203 lw x4,0(x19) +80003790: 01620863 beq x4,x22,800037a0 +80003794: 56d012ef jal x5,80005500 +80003798: 80003788 .word 0x80003788 +8000379c: 8000f0ba .word 0x8000f0ba +800037a0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xe7afff55 +800037a4: 000eab83 lw x23,0(x29) +800037a8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0x6b4116d5 +800037ac: 000eaa83 lw x21,0(x29) +800037b0: 004e8e93 addi x29,x29,4 + +800037b4 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b23: + sha512sig0l x23, x23, x21 # perform operation +800037b4: 555b8bb3 sha512sig0l x23,x23,x21 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zknh_sha512sig0l_cg_cmp_rd_rs1_b23, Zknh_sha512sig0l_cg_cmp_rd_rs1_b23_str) +800037b8: 0009a203 lw x4,0(x19) +800037bc: 01720863 beq x4,x23,800037cc +800037c0: 541012ef jal x5,80005500 +800037c4: 800037b4 .word 0x800037b4 +800037c8: 8000f0f9 .word 0x8000f0f9 +800037cc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xeb582602 +800037d0: 000eac03 lw x24,0(x29) +800037d4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x454537d4 +800037d8: 000ea083 lw x1,0(x29) +800037dc: 004e8e93 addi x29,x29,4 + +800037e0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b24: + sha512sig0l x24, x24, x1 # perform operation +800037e0: 541c0c33 sha512sig0l x24,x24,x1 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zknh_sha512sig0l_cg_cmp_rd_rs1_b24, Zknh_sha512sig0l_cg_cmp_rd_rs1_b24_str) +800037e4: 0009a203 lw x4,0(x19) +800037e8: 01820863 beq x4,x24,800037f8 +800037ec: 515012ef jal x5,80005500 +800037f0: 800037e0 .word 0x800037e0 +800037f4: 8000f138 .word 0x8000f138 +800037f8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x6eeef1b4 +800037fc: 000eac83 lw x25,0(x29) +80003800: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x186f536d +80003804: 000eaf03 lw x30,0(x29) +80003808: 004e8e93 addi x29,x29,4 + +8000380c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b25: + sha512sig0l x25, x25, x30 # perform operation +8000380c: 55ec8cb3 sha512sig0l x25,x25,x30 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zknh_sha512sig0l_cg_cmp_rd_rs1_b25, Zknh_sha512sig0l_cg_cmp_rd_rs1_b25_str) +80003810: 0009a203 lw x4,0(x19) +80003814: 01920863 beq x4,x25,80003824 +80003818: 4e9012ef jal x5,80005500 +8000381c: 8000380c .word 0x8000380c +80003820: 8000f177 .word 0x8000f177 +80003824: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x02199a8e +80003828: 000ead03 lw x26,0(x29) +8000382c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0x5ac1d53f +80003830: 000ea403 lw x8,0(x29) +80003834: 004e8e93 addi x29,x29,4 + +80003838 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b26: + sha512sig0l x26, x26, x8 # perform operation +80003838: 548d0d33 sha512sig0l x26,x26,x8 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zknh_sha512sig0l_cg_cmp_rd_rs1_b26, Zknh_sha512sig0l_cg_cmp_rd_rs1_b26_str) +8000383c: 0009a203 lw x4,0(x19) +80003840: 01a20863 beq x4,x26,80003850 +80003844: 4bd012ef jal x5,80005500 +80003848: 80003838 .word 0x80003838 +8000384c: 8000f1b6 .word 0x8000f1b6 +80003850: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x363a8933 +80003854: 000ead83 lw x27,0(x29) +80003858: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xa9fdd555 +8000385c: 000eaf03 lw x30,0(x29) +80003860: 004e8e93 addi x29,x29,4 + +80003864 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b27: + sha512sig0l x27, x27, x30 # perform operation +80003864: 55ed8db3 sha512sig0l x27,x27,x30 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zknh_sha512sig0l_cg_cmp_rd_rs1_b27, Zknh_sha512sig0l_cg_cmp_rd_rs1_b27_str) +80003868: 0009a203 lw x4,0(x19) +8000386c: 01b20863 beq x4,x27,8000387c +80003870: 491012ef jal x5,80005500 +80003874: 80003864 .word 0x80003864 +80003878: 8000f1f5 .word 0x8000f1f5 +8000387c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x18ac7de7 +80003880: 000eae03 lw x28,0(x29) +80003884: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x45c061fa +80003888: 000eab83 lw x23,0(x29) +8000388c: 004e8e93 addi x29,x29,4 + +80003890 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b28: + sha512sig0l x28, x28, x23 # perform operation +80003890: 557e0e33 sha512sig0l x28,x28,x23 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zknh_sha512sig0l_cg_cmp_rd_rs1_b28, Zknh_sha512sig0l_cg_cmp_rd_rs1_b28_str) +80003894: 0009a203 lw x4,0(x19) +80003898: 01c20863 beq x4,x28,800038a8 +8000389c: 465012ef jal x5,80005500 +800038a0: 80003890 .word 0x80003890 +800038a4: 8000f234 .word 0x8000f234 +800038a8: 00498993 addi x19,x19,4 + + mv x16, x29 # switch data pointer register to avoid conflict with test +800038ac: 000e8813 addi x16,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x36631bac +800038b0: 00082e83 lw x29,0(x16) +800038b4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xbf86a928 +800038b8: 00082c83 lw x25,0(x16) +800038bc: 00480813 addi x16,x16,4 + +800038c0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b29: + sha512sig0l x29, x29, x25 # perform operation +800038c0: 559e8eb3 sha512sig0l x29,x29,x25 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zknh_sha512sig0l_cg_cmp_rd_rs1_b29, Zknh_sha512sig0l_cg_cmp_rd_rs1_b29_str) +800038c4: 0009a203 lw x4,0(x19) +800038c8: 01d20863 beq x4,x29,800038d8 +800038cc: 435012ef jal x5,80005500 +800038d0: 800038c0 .word 0x800038c0 +800038d4: 8000f273 .word 0x8000f273 +800038d8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x4ba5daad +800038dc: 00082f03 lw x30,0(x16) +800038e0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x8dfa676a +800038e4: 00082e03 lw x28,0(x16) +800038e8: 00480813 addi x16,x16,4 + +800038ec : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b30: + sha512sig0l x30, x30, x28 # perform operation +800038ec: 55cf0f33 sha512sig0l x30,x30,x28 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zknh_sha512sig0l_cg_cmp_rd_rs1_b30, Zknh_sha512sig0l_cg_cmp_rd_rs1_b30_str) +800038f0: 0009a203 lw x4,0(x19) +800038f4: 01e20863 beq x4,x30,80003904 +800038f8: 409012ef jal x5,80005500 +800038fc: 800038ec .word 0x800038ec +80003900: 8000f2b2 .word 0x8000f2b2 +80003904: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xf2fa4e6f +80003908: 00082f83 lw x31,0(x16) +8000390c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x72a22f47 +80003910: 00082e03 lw x28,0(x16) +80003914: 00480813 addi x16,x16,4 + +80003918 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_b31: + sha512sig0l x31, x31, x28 # perform operation +80003918: 55cf8fb3 sha512sig0l x31,x31,x28 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zknh_sha512sig0l_cg_cmp_rd_rs1_b31, Zknh_sha512sig0l_cg_cmp_rd_rs1_b31_str) +8000391c: 0009a203 lw x4,0(x19) +80003920: 01f20863 beq x4,x31,80003930 +80003924: 3dd012ef jal x5,80005500 +80003928: 80003918 .word 0x80003918 +8000392c: 8000f2f1 .word 0x8000f2f1 +80003930: 00498993 addi x19,x19,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xf6868f7c +80003934: 00082483 lw x9,0(x16) +80003938: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xff225061 +8000393c: 00082003 lw x0,0(x16) +80003940: 00480813 addi x16,x16,4 + +80003944 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b0: + sha512sig0l x0, x9, x0 # perform operation +80003944: 54048033 sha512sig0l x0,x9,x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zknh_sha512sig0l_cg_cmp_rd_rs2_b0, Zknh_sha512sig0l_cg_cmp_rd_rs2_b0_str) +80003948: 0009a203 lw x4,0(x19) +8000394c: 00020863 beq x4,x0,8000395c +80003950: 3b1012ef jal x5,80005500 +80003954: 80003944 .word 0x80003944 +80003958: 8000f330 .word 0x8000f330 +8000395c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xde70e1f3 +80003960: 00082603 lw x12,0(x16) +80003964: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xd5ab5bd9 +80003968: 00082083 lw x1,0(x16) +8000396c: 00480813 addi x16,x16,4 + +80003970 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b1: + sha512sig0l x1, x12, x1 # perform operation +80003970: 541600b3 sha512sig0l x1,x12,x1 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zknh_sha512sig0l_cg_cmp_rd_rs2_b1, Zknh_sha512sig0l_cg_cmp_rd_rs2_b1_str) +80003974: 0009a203 lw x4,0(x19) +80003978: 00120863 beq x4,x1,80003988 +8000397c: 385012ef jal x5,80005500 +80003980: 80003970 .word 0x80003970 +80003984: 8000f36e .word 0x8000f36e +80003988: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0xa3f24209 +8000398c: 00082a83 lw x21,0(x16) +80003990: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xf0f81444 +80003994: 00082103 lw x2,0(x16) +80003998: 00480813 addi x16,x16,4 + +8000399c : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b2: + sha512sig0l x2, x21, x2 # perform operation +8000399c: 542a8133 sha512sig0l x2,x21,x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zknh_sha512sig0l_cg_cmp_rd_rs2_b2, Zknh_sha512sig0l_cg_cmp_rd_rs2_b2_str) +800039a0: 0009a203 lw x4,0(x19) +800039a4: 00220863 beq x4,x2,800039b4 +800039a8: 359012ef jal x5,80005500 +800039ac: 8000399c .word 0x8000399c +800039b0: 8000f3ac .word 0x8000f3ac +800039b4: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x4e422105 +800039b8: 00082d83 lw x27,0(x16) +800039bc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xd6debdfc +800039c0: 00082183 lw x3,0(x16) +800039c4: 00480813 addi x16,x16,4 + +800039c8 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b3: + sha512sig0l x3, x27, x3 # perform operation +800039c8: 543d81b3 sha512sig0l x3,x27,x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zknh_sha512sig0l_cg_cmp_rd_rs2_b3, Zknh_sha512sig0l_cg_cmp_rd_rs2_b3_str) +800039cc: 0009a203 lw x4,0(x19) +800039d0: 00320863 beq x4,x3,800039e0 +800039d4: 32d012ef jal x5,80005500 +800039d8: 800039c8 .word 0x800039c8 +800039dc: 8000f3ea .word 0x8000f3ea +800039e0: 00498993 addi x19,x19,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800039e4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800039e8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x02ef20ce +800039ec: 00082d03 lw x26,0(x16) +800039f0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0xc4c34db7 +800039f4: 00082203 lw x4,0(x16) +800039f8: 00480813 addi x16,x16,4 + +800039fc : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b4: + sha512sig0l x4, x26, x4 # perform operation +800039fc: 544d0233 sha512sig0l x4,x26,x4 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zknh_sha512sig0l_cg_cmp_rd_rs2_b4, Zknh_sha512sig0l_cg_cmp_rd_rs2_b4_str) +80003a00: 0009a383 lw x7,0(x19) +80003a04: 00438863 beq x7,x4,80003a14 +80003a08: 3110146f jal x8,80005518 +80003a0c: 800039fc .word 0x800039fc +80003a10: 8000f428 .word 0x8000f428 +80003a14: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x9004ed6b +80003a18: 00082e83 lw x29,0(x16) +80003a1c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x6184314a +80003a20: 00082283 lw x5,0(x16) +80003a24: 00480813 addi x16,x16,4 + +80003a28 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b5: + sha512sig0l x5, x29, x5 # perform operation +80003a28: 545e82b3 sha512sig0l x5,x29,x5 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zknh_sha512sig0l_cg_cmp_rd_rs2_b5, Zknh_sha512sig0l_cg_cmp_rd_rs2_b5_str) +80003a2c: 0009a383 lw x7,0(x19) +80003a30: 00538863 beq x7,x5,80003a40 +80003a34: 2e50146f jal x8,80005518 +80003a38: 80003a28 .word 0x80003a28 +80003a3c: 8000f466 .word 0x8000f466 +80003a40: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xcd23c39c +80003a44: 00082e83 lw x29,0(x16) +80003a48: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x6abdf912 +80003a4c: 00082303 lw x6,0(x16) +80003a50: 00480813 addi x16,x16,4 + +80003a54 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b6: + sha512sig0l x6, x29, x6 # perform operation +80003a54: 546e8333 sha512sig0l x6,x29,x6 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zknh_sha512sig0l_cg_cmp_rd_rs2_b6, Zknh_sha512sig0l_cg_cmp_rd_rs2_b6_str) +80003a58: 0009a383 lw x7,0(x19) +80003a5c: 00638863 beq x7,x6,80003a6c +80003a60: 2b90146f jal x8,80005518 +80003a64: 80003a54 .word 0x80003a54 +80003a68: 8000f4a4 .word 0x8000f4a4 +80003a6c: 00498993 addi x19,x19,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a70: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a74: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x13f675f6 +80003a78: 00082603 lw x12,0(x16) +80003a7c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x93a450e0 +80003a80: 00082383 lw x7,0(x16) +80003a84: 00480813 addi x16,x16,4 + +80003a88 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b7: + sha512sig0l x7, x12, x7 # perform operation +80003a88: 547603b3 sha512sig0l x7,x12,x7 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zknh_sha512sig0l_cg_cmp_rd_rs2_b7, Zknh_sha512sig0l_cg_cmp_rd_rs2_b7_str) +80003a8c: 0009a203 lw x4,0(x19) +80003a90: 00720863 beq x4,x7,80003aa0 +80003a94: 26d012ef jal x5,80005500 +80003a98: 80003a88 .word 0x80003a88 +80003a9c: 8000f4e2 .word 0x8000f4e2 +80003aa0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0xa5b93bb6 +80003aa4: 00082a83 lw x21,0(x16) +80003aa8: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xc9f44802 +80003aac: 00082403 lw x8,0(x16) +80003ab0: 00480813 addi x16,x16,4 + +80003ab4 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b8: + sha512sig0l x8, x21, x8 # perform operation +80003ab4: 548a8433 sha512sig0l x8,x21,x8 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zknh_sha512sig0l_cg_cmp_rd_rs2_b8, Zknh_sha512sig0l_cg_cmp_rd_rs2_b8_str) +80003ab8: 0009a203 lw x4,0(x19) +80003abc: 00820863 beq x4,x8,80003acc +80003ac0: 241012ef jal x5,80005500 +80003ac4: 80003ab4 .word 0x80003ab4 +80003ac8: 8000f520 .word 0x8000f520 +80003acc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x9648f9aa +80003ad0: 00082903 lw x18,0(x16) +80003ad4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x3a667757 +80003ad8: 00082483 lw x9,0(x16) +80003adc: 00480813 addi x16,x16,4 + +80003ae0 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b9: + sha512sig0l x9, x18, x9 # perform operation +80003ae0: 549904b3 sha512sig0l x9,x18,x9 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zknh_sha512sig0l_cg_cmp_rd_rs2_b9, Zknh_sha512sig0l_cg_cmp_rd_rs2_b9_str) +80003ae4: 0009a203 lw x4,0(x19) +80003ae8: 00920863 beq x4,x9,80003af8 +80003aec: 215012ef jal x5,80005500 +80003af0: 80003ae0 .word 0x80003ae0 +80003af4: 8000f55e .word 0x8000f55e +80003af8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x5800704c +80003afc: 00082003 lw x0,0(x16) +80003b00: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x1004f89a +80003b04: 00082503 lw x10,0(x16) +80003b08: 00480813 addi x16,x16,4 + +80003b0c : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b10: + sha512sig0l x10, x0, x10 # perform operation +80003b0c: 54a00533 sha512sig0l x10,x0,x10 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zknh_sha512sig0l_cg_cmp_rd_rs2_b10, Zknh_sha512sig0l_cg_cmp_rd_rs2_b10_str) +80003b10: 0009a203 lw x4,0(x19) +80003b14: 00a20863 beq x4,x10,80003b24 +80003b18: 1e9012ef jal x5,80005500 +80003b1c: 80003b0c .word 0x80003b0c +80003b20: 8000f59c .word 0x8000f59c +80003b24: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x3e316542 +80003b28: 00082b83 lw x23,0(x16) +80003b2c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x55f01d47 +80003b30: 00082583 lw x11,0(x16) +80003b34: 00480813 addi x16,x16,4 + +80003b38 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b11: + sha512sig0l x11, x23, x11 # perform operation +80003b38: 54bb85b3 sha512sig0l x11,x23,x11 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zknh_sha512sig0l_cg_cmp_rd_rs2_b11, Zknh_sha512sig0l_cg_cmp_rd_rs2_b11_str) +80003b3c: 0009a203 lw x4,0(x19) +80003b40: 00b20863 beq x4,x11,80003b50 +80003b44: 1bd012ef jal x5,80005500 +80003b48: 80003b38 .word 0x80003b38 +80003b4c: 8000f5db .word 0x8000f5db +80003b50: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xe8964f24 +80003b54: 00082f03 lw x30,0(x16) +80003b58: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xfe61a467 +80003b5c: 00082603 lw x12,0(x16) +80003b60: 00480813 addi x16,x16,4 + +80003b64 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b12: + sha512sig0l x12, x30, x12 # perform operation +80003b64: 54cf0633 sha512sig0l x12,x30,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zknh_sha512sig0l_cg_cmp_rd_rs2_b12, Zknh_sha512sig0l_cg_cmp_rd_rs2_b12_str) +80003b68: 0009a203 lw x4,0(x19) +80003b6c: 00c20863 beq x4,x12,80003b7c +80003b70: 191012ef jal x5,80005500 +80003b74: 80003b64 .word 0x80003b64 +80003b78: 8000f61a .word 0x8000f61a +80003b7c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xed336ba0 +80003b80: 00082183 lw x3,0(x16) +80003b84: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xb40b1383 +80003b88: 00082683 lw x13,0(x16) +80003b8c: 00480813 addi x16,x16,4 + +80003b90 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b13: + sha512sig0l x13, x3, x13 # perform operation +80003b90: 54d186b3 sha512sig0l x13,x3,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zknh_sha512sig0l_cg_cmp_rd_rs2_b13, Zknh_sha512sig0l_cg_cmp_rd_rs2_b13_str) +80003b94: 0009a203 lw x4,0(x19) +80003b98: 00d20863 beq x4,x13,80003ba8 +80003b9c: 165012ef jal x5,80005500 +80003ba0: 80003b90 .word 0x80003b90 +80003ba4: 8000f659 .word 0x8000f659 +80003ba8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x7239aebb +80003bac: 00082403 lw x8,0(x16) +80003bb0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x301726a6 +80003bb4: 00082703 lw x14,0(x16) +80003bb8: 00480813 addi x16,x16,4 + +80003bbc : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b14: + sha512sig0l x14, x8, x14 # perform operation +80003bbc: 54e40733 sha512sig0l x14,x8,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zknh_sha512sig0l_cg_cmp_rd_rs2_b14, Zknh_sha512sig0l_cg_cmp_rd_rs2_b14_str) +80003bc0: 0009a203 lw x4,0(x19) +80003bc4: 00e20863 beq x4,x14,80003bd4 +80003bc8: 139012ef jal x5,80005500 +80003bcc: 80003bbc .word 0x80003bbc +80003bd0: 8000f698 .word 0x8000f698 +80003bd4: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x72422360 +80003bd8: 00082483 lw x9,0(x16) +80003bdc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xd87871a4 +80003be0: 00082783 lw x15,0(x16) +80003be4: 00480813 addi x16,x16,4 + +80003be8 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b15: + sha512sig0l x15, x9, x15 # perform operation +80003be8: 54f487b3 sha512sig0l x15,x9,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zknh_sha512sig0l_cg_cmp_rd_rs2_b15, Zknh_sha512sig0l_cg_cmp_rd_rs2_b15_str) +80003bec: 0009a203 lw x4,0(x19) +80003bf0: 00f20863 beq x4,x15,80003c00 +80003bf4: 10d012ef jal x5,80005500 +80003bf8: 80003be8 .word 0x80003be8 +80003bfc: 8000f6d7 .word 0x8000f6d7 +80003c00: 00498993 addi x19,x19,4 + + mv x10, x16 # switch data pointer register to avoid conflict with test +80003c04: 00080513 addi x10,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x82ae505d +80003c08: 00052c83 lw x25,0(x10) +80003c0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x33efacce +80003c10: 00052803 lw x16,0(x10) +80003c14: 00450513 addi x10,x10,4 + +80003c18 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b16: + sha512sig0l x16, x25, x16 # perform operation +80003c18: 550c8833 sha512sig0l x16,x25,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zknh_sha512sig0l_cg_cmp_rd_rs2_b16, Zknh_sha512sig0l_cg_cmp_rd_rs2_b16_str) +80003c1c: 0009a203 lw x4,0(x19) +80003c20: 01020863 beq x4,x16,80003c30 +80003c24: 0dd012ef jal x5,80005500 +80003c28: 80003c18 .word 0x80003c18 +80003c2c: 8000f716 .word 0x8000f716 +80003c30: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x3775c884 +80003c34: 00052f03 lw x30,0(x10) +80003c38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xb68964a4 +80003c3c: 00052883 lw x17,0(x10) +80003c40: 00450513 addi x10,x10,4 + +80003c44 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b17: + sha512sig0l x17, x30, x17 # perform operation +80003c44: 551f08b3 sha512sig0l x17,x30,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zknh_sha512sig0l_cg_cmp_rd_rs2_b17, Zknh_sha512sig0l_cg_cmp_rd_rs2_b17_str) +80003c48: 0009a203 lw x4,0(x19) +80003c4c: 01120863 beq x4,x17,80003c5c +80003c50: 0b1012ef jal x5,80005500 +80003c54: 80003c44 .word 0x80003c44 +80003c58: 8000f755 .word 0x8000f755 +80003c5c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x9aaa43cb +80003c60: 00052d83 lw x27,0(x10) +80003c64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xf0f93864 +80003c68: 00052903 lw x18,0(x10) +80003c6c: 00450513 addi x10,x10,4 + +80003c70 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b18: + sha512sig0l x18, x27, x18 # perform operation +80003c70: 552d8933 sha512sig0l x18,x27,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknh_sha512sig0l_cg_cmp_rd_rs2_b18, Zknh_sha512sig0l_cg_cmp_rd_rs2_b18_str) +80003c74: 0009a203 lw x4,0(x19) +80003c78: 01220863 beq x4,x18,80003c88 +80003c7c: 085012ef jal x5,80005500 +80003c80: 80003c70 .word 0x80003c70 +80003c84: 8000f794 .word 0x8000f794 +80003c88: 00498993 addi x19,x19,4 + + mv x11, x19 # switch signature pointer register to avoid conflict with test +80003c8c: 00098593 addi x11,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xe417d6b1 +80003c90: 00052403 lw x8,0(x10) +80003c94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xa4731772 +80003c98: 00052983 lw x19,0(x10) +80003c9c: 00450513 addi x10,x10,4 + +80003ca0 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b19: + sha512sig0l x19, x8, x19 # perform operation +80003ca0: 553409b3 sha512sig0l x19,x8,x19 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zknh_sha512sig0l_cg_cmp_rd_rs2_b19, Zknh_sha512sig0l_cg_cmp_rd_rs2_b19_str) +80003ca4: 0005a203 lw x4,0(x11) +80003ca8: 01320863 beq x4,x19,80003cb8 +80003cac: 055012ef jal x5,80005500 +80003cb0: 80003ca0 .word 0x80003ca0 +80003cb4: 8000f7d3 .word 0x8000f7d3 +80003cb8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xa5585329 +80003cbc: 00052b83 lw x23,0(x10) +80003cc0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xd3d5629f +80003cc4: 00052a03 lw x20,0(x10) +80003cc8: 00450513 addi x10,x10,4 + +80003ccc : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b20: + sha512sig0l x20, x23, x20 # perform operation +80003ccc: 554b8a33 sha512sig0l x20,x23,x20 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zknh_sha512sig0l_cg_cmp_rd_rs2_b20, Zknh_sha512sig0l_cg_cmp_rd_rs2_b20_str) +80003cd0: 0005a203 lw x4,0(x11) +80003cd4: 01420863 beq x4,x20,80003ce4 +80003cd8: 029012ef jal x5,80005500 +80003cdc: 80003ccc .word 0x80003ccc +80003ce0: 8000f812 .word 0x8000f812 +80003ce4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x13dc6445 +80003ce8: 00052303 lw x6,0(x10) +80003cec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x8919174c +80003cf0: 00052a83 lw x21,0(x10) +80003cf4: 00450513 addi x10,x10,4 + +80003cf8 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b21: + sha512sig0l x21, x6, x21 # perform operation +80003cf8: 55530ab3 sha512sig0l x21,x6,x21 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zknh_sha512sig0l_cg_cmp_rd_rs2_b21, Zknh_sha512sig0l_cg_cmp_rd_rs2_b21_str) +80003cfc: 0005a203 lw x4,0(x11) +80003d00: 01520863 beq x4,x21,80003d10 +80003d04: 7fc012ef jal x5,80005500 +80003d08: 80003cf8 .word 0x80003cf8 +80003d0c: 8000f851 .word 0x8000f851 +80003d10: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x3ed9c924 +80003d14: 00052303 lw x6,0(x10) +80003d18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x9a129e00 +80003d1c: 00052b03 lw x22,0(x10) +80003d20: 00450513 addi x10,x10,4 + +80003d24 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b22: + sha512sig0l x22, x6, x22 # perform operation +80003d24: 55630b33 sha512sig0l x22,x6,x22 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zknh_sha512sig0l_cg_cmp_rd_rs2_b22, Zknh_sha512sig0l_cg_cmp_rd_rs2_b22_str) +80003d28: 0005a203 lw x4,0(x11) +80003d2c: 01620863 beq x4,x22,80003d3c +80003d30: 7d0012ef jal x5,80005500 +80003d34: 80003d24 .word 0x80003d24 +80003d38: 8000f890 .word 0x8000f890 +80003d3c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8bede0a1 +80003d40: 00052603 lw x12,0(x10) +80003d44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xd2b2de78 +80003d48: 00052b83 lw x23,0(x10) +80003d4c: 00450513 addi x10,x10,4 + +80003d50 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b23: + sha512sig0l x23, x12, x23 # perform operation +80003d50: 55760bb3 sha512sig0l x23,x12,x23 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zknh_sha512sig0l_cg_cmp_rd_rs2_b23, Zknh_sha512sig0l_cg_cmp_rd_rs2_b23_str) +80003d54: 0005a203 lw x4,0(x11) +80003d58: 01720863 beq x4,x23,80003d68 +80003d5c: 7a4012ef jal x5,80005500 +80003d60: 80003d50 .word 0x80003d50 +80003d64: 8000f8cf .word 0x8000f8cf +80003d68: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xa82de112 +80003d6c: 00052b83 lw x23,0(x10) +80003d70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x799ef7e6 +80003d74: 00052c03 lw x24,0(x10) +80003d78: 00450513 addi x10,x10,4 + +80003d7c : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b24: + sha512sig0l x24, x23, x24 # perform operation +80003d7c: 558b8c33 sha512sig0l x24,x23,x24 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zknh_sha512sig0l_cg_cmp_rd_rs2_b24, Zknh_sha512sig0l_cg_cmp_rd_rs2_b24_str) +80003d80: 0005a203 lw x4,0(x11) +80003d84: 01820863 beq x4,x24,80003d94 +80003d88: 778012ef jal x5,80005500 +80003d8c: 80003d7c .word 0x80003d7c +80003d90: 8000f90e .word 0x8000f90e +80003d94: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0d01f5dc +80003d98: 00052a83 lw x21,0(x10) +80003d9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xccccb3dd +80003da0: 00052c83 lw x25,0(x10) +80003da4: 00450513 addi x10,x10,4 + +80003da8 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b25: + sha512sig0l x25, x21, x25 # perform operation +80003da8: 559a8cb3 sha512sig0l x25,x21,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zknh_sha512sig0l_cg_cmp_rd_rs2_b25, Zknh_sha512sig0l_cg_cmp_rd_rs2_b25_str) +80003dac: 0005a203 lw x4,0(x11) +80003db0: 01920863 beq x4,x25,80003dc0 +80003db4: 74c012ef jal x5,80005500 +80003db8: 80003da8 .word 0x80003da8 +80003dbc: 8000f94d .word 0x8000f94d +80003dc0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x2ad0ceba +80003dc4: 00052003 lw x0,0(x10) +80003dc8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x6c15240f +80003dcc: 00052d03 lw x26,0(x10) +80003dd0: 00450513 addi x10,x10,4 + +80003dd4 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b26: + sha512sig0l x26, x0, x26 # perform operation +80003dd4: 55a00d33 sha512sig0l x26,x0,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zknh_sha512sig0l_cg_cmp_rd_rs2_b26, Zknh_sha512sig0l_cg_cmp_rd_rs2_b26_str) +80003dd8: 0005a203 lw x4,0(x11) +80003ddc: 01a20863 beq x4,x26,80003dec +80003de0: 720012ef jal x5,80005500 +80003de4: 80003dd4 .word 0x80003dd4 +80003de8: 8000f98c .word 0x8000f98c +80003dec: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xd324ce45 +80003df0: 00052403 lw x8,0(x10) +80003df4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xd3f0e96d +80003df8: 00052d83 lw x27,0(x10) +80003dfc: 00450513 addi x10,x10,4 + +80003e00 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b27: + sha512sig0l x27, x8, x27 # perform operation +80003e00: 55b40db3 sha512sig0l x27,x8,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zknh_sha512sig0l_cg_cmp_rd_rs2_b27, Zknh_sha512sig0l_cg_cmp_rd_rs2_b27_str) +80003e04: 0005a203 lw x4,0(x11) +80003e08: 01b20863 beq x4,x27,80003e18 +80003e0c: 6f4012ef jal x5,80005500 +80003e10: 80003e00 .word 0x80003e00 +80003e14: 8000f9cb .word 0x8000f9cb +80003e18: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x9c9fe645 +80003e1c: 00052e83 lw x29,0(x10) +80003e20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x4144d2f4 +80003e24: 00052e03 lw x28,0(x10) +80003e28: 00450513 addi x10,x10,4 + +80003e2c : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b28: + sha512sig0l x28, x29, x28 # perform operation +80003e2c: 55ce8e33 sha512sig0l x28,x29,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zknh_sha512sig0l_cg_cmp_rd_rs2_b28, Zknh_sha512sig0l_cg_cmp_rd_rs2_b28_str) +80003e30: 0005a203 lw x4,0(x11) +80003e34: 01c20863 beq x4,x28,80003e44 +80003e38: 6c8012ef jal x5,80005500 +80003e3c: 80003e2c .word 0x80003e2c +80003e40: 8000fa0a .word 0x8000fa0a +80003e44: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xd6d4c488 +80003e48: 00052e03 lw x28,0(x10) +80003e4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x75bd797d +80003e50: 00052e83 lw x29,0(x10) +80003e54: 00450513 addi x10,x10,4 + +80003e58 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b29: + sha512sig0l x29, x28, x29 # perform operation +80003e58: 55de0eb3 sha512sig0l x29,x28,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zknh_sha512sig0l_cg_cmp_rd_rs2_b29, Zknh_sha512sig0l_cg_cmp_rd_rs2_b29_str) +80003e5c: 0005a203 lw x4,0(x11) +80003e60: 01d20863 beq x4,x29,80003e70 +80003e64: 69c012ef jal x5,80005500 +80003e68: 80003e58 .word 0x80003e58 +80003e6c: 8000fa49 .word 0x8000fa49 +80003e70: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xfb9fd3d8 +80003e74: 00052983 lw x19,0(x10) +80003e78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x34c38f18 +80003e7c: 00052f03 lw x30,0(x10) +80003e80: 00450513 addi x10,x10,4 + +80003e84 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b30: + sha512sig0l x30, x19, x30 # perform operation +80003e84: 55e98f33 sha512sig0l x30,x19,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zknh_sha512sig0l_cg_cmp_rd_rs2_b30, Zknh_sha512sig0l_cg_cmp_rd_rs2_b30_str) +80003e88: 0005a203 lw x4,0(x11) +80003e8c: 01e20863 beq x4,x30,80003e9c +80003e90: 670012ef jal x5,80005500 +80003e94: 80003e84 .word 0x80003e84 +80003e98: 8000fa88 .word 0x8000fa88 +80003e9c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x487e4730 +80003ea0: 00052a03 lw x20,0(x10) +80003ea4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5da3998e +80003ea8: 00052f83 lw x31,0(x10) +80003eac: 00450513 addi x10,x10,4 + +80003eb0 : +Zknh_sha512sig0l_cg_cmp_rd_rs2_b31: + sha512sig0l x31, x20, x31 # perform operation +80003eb0: 55fa0fb3 sha512sig0l x31,x20,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zknh_sha512sig0l_cg_cmp_rd_rs2_b31, Zknh_sha512sig0l_cg_cmp_rd_rs2_b31_str) +80003eb4: 0005a203 lw x4,0(x11) +80003eb8: 01f20863 beq x4,x31,80003ec8 +80003ebc: 644012ef jal x5,80005500 +80003ec0: 80003eb0 .word 0x80003eb0 +80003ec4: 8000fac7 .word 0x8000fac7 +80003ec8: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x0b07cc3d +80003ecc: 00052003 lw x0,0(x10) +80003ed0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x5e6c96a3 +80003ed4: 00052003 lw x0,0(x10) +80003ed8: 00450513 addi x10,x10,4 + +80003edc : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b0: + sha512sig0l x0, x0, x0 # perform operation +80003edc: 54000033 sha512sig0l x0,x0,x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b0_str) +80003ee0: 0005a203 lw x4,0(x11) +80003ee4: 00020863 beq x4,x0,80003ef4 +80003ee8: 618012ef jal x5,80005500 +80003eec: 80003edc .word 0x80003edc +80003ef0: 8000fb06 .word 0x8000fb06 +80003ef4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x61096791 +80003ef8: 00052083 lw x1,0(x10) +80003efc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x17198b0b +80003f00: 00052083 lw x1,0(x10) +80003f04: 00450513 addi x10,x10,4 + +80003f08 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b1: + sha512sig0l x1, x1, x1 # perform operation +80003f08: 541080b3 sha512sig0l x1,x1,x1 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b1_str) +80003f0c: 0005a203 lw x4,0(x11) +80003f10: 00120863 beq x4,x1,80003f20 +80003f14: 5ec012ef jal x5,80005500 +80003f18: 80003f08 .word 0x80003f08 +80003f1c: 8000fb48 .word 0x8000fb48 +80003f20: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xab51366d +80003f24: 00052103 lw x2,0(x10) +80003f28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x66afdb61 +80003f2c: 00052103 lw x2,0(x10) +80003f30: 00450513 addi x10,x10,4 + +80003f34 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b2: + sha512sig0l x2, x2, x2 # perform operation +80003f34: 54210133 sha512sig0l x2,x2,x2 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b2_str) +80003f38: 0005a203 lw x4,0(x11) +80003f3c: 00220863 beq x4,x2,80003f4c +80003f40: 5c0012ef jal x5,80005500 +80003f44: 80003f34 .word 0x80003f34 +80003f48: 8000fb8a .word 0x8000fb8a +80003f4c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xf0054963 +80003f50: 00052183 lw x3,0(x10) +80003f54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x8f9462e8 +80003f58: 00052183 lw x3,0(x10) +80003f5c: 00450513 addi x10,x10,4 + +80003f60 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b3: + sha512sig0l x3, x3, x3 # perform operation +80003f60: 543181b3 sha512sig0l x3,x3,x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b3_str) +80003f64: 0005a203 lw x4,0(x11) +80003f68: 00320863 beq x4,x3,80003f78 +80003f6c: 594012ef jal x5,80005500 +80003f70: 80003f60 .word 0x80003f60 +80003f74: 8000fbcc .word 0x8000fbcc +80003f78: 00458593 addi x11,x11,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f7c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f80: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x4afeaa41 +80003f84: 00052203 lw x4,0(x10) +80003f88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x671c48af +80003f8c: 00052203 lw x4,0(x10) +80003f90: 00450513 addi x10,x10,4 + +80003f94 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b4: + sha512sig0l x4, x4, x4 # perform operation +80003f94: 54420233 sha512sig0l x4,x4,x4 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b4_str) +80003f98: 0005a683 lw x13,0(x11) +80003f9c: 00468863 beq x13,x4,80003fac +80003fa0: 5a00176f jal x14,80005540 +80003fa4: 80003f94 .word 0x80003f94 +80003fa8: 8000fc0e .word 0x8000fc0e +80003fac: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x4b0aa98f +80003fb0: 00052283 lw x5,0(x10) +80003fb4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x1e27b878 +80003fb8: 00052283 lw x5,0(x10) +80003fbc: 00450513 addi x10,x10,4 + +80003fc0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b5: + sha512sig0l x5, x5, x5 # perform operation +80003fc0: 545282b3 sha512sig0l x5,x5,x5 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b5_str) +80003fc4: 0005a683 lw x13,0(x11) +80003fc8: 00568863 beq x13,x5,80003fd8 +80003fcc: 5740176f jal x14,80005540 +80003fd0: 80003fc0 .word 0x80003fc0 +80003fd4: 8000fc50 .word 0x8000fc50 +80003fd8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7f2d823c +80003fdc: 00052303 lw x6,0(x10) +80003fe0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x079912ca +80003fe4: 00052303 lw x6,0(x10) +80003fe8: 00450513 addi x10,x10,4 + +80003fec : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b6: + sha512sig0l x6, x6, x6 # perform operation +80003fec: 54630333 sha512sig0l x6,x6,x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x6, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b6_str) +80003ff0: 0005a683 lw x13,0(x11) +80003ff4: 00668863 beq x13,x6,80004004 +80003ff8: 5480176f jal x14,80005540 +80003ffc: 80003fec .word 0x80003fec +80004000: 8000fc92 .word 0x8000fc92 +80004004: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xa9dc4395 +80004008: 00052383 lw x7,0(x10) +8000400c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x51188706 +80004010: 00052383 lw x7,0(x10) +80004014: 00450513 addi x10,x10,4 + +80004018 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b7: + sha512sig0l x7, x7, x7 # perform operation +80004018: 547383b3 sha512sig0l x7,x7,x7 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b7_str) +8000401c: 0005a683 lw x13,0(x11) +80004020: 00768863 beq x13,x7,80004030 +80004024: 51c0176f jal x14,80005540 +80004028: 80004018 .word 0x80004018 +8000402c: 8000fcd4 .word 0x8000fcd4 +80004030: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x2b73b202 +80004034: 00052403 lw x8,0(x10) +80004038: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x80457593 +8000403c: 00052403 lw x8,0(x10) +80004040: 00450513 addi x10,x10,4 + +80004044 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b8: + sha512sig0l x8, x8, x8 # perform operation +80004044: 54840433 sha512sig0l x8,x8,x8 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b8_str) +80004048: 0005a683 lw x13,0(x11) +8000404c: 00868863 beq x13,x8,8000405c +80004050: 4f00176f jal x14,80005540 +80004054: 80004044 .word 0x80004044 +80004058: 8000fd16 .word 0x8000fd16 +8000405c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xe3b8041e +80004060: 00052483 lw x9,0(x10) +80004064: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xc7e3f098 +80004068: 00052483 lw x9,0(x10) +8000406c: 00450513 addi x10,x10,4 + +80004070 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b9: + sha512sig0l x9, x9, x9 # perform operation +80004070: 549484b3 sha512sig0l x9,x9,x9 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b9_str) +80004074: 0005a683 lw x13,0(x11) +80004078: 00968863 beq x13,x9,80004088 +8000407c: 4c40176f jal x14,80005540 +80004080: 80004070 .word 0x80004070 +80004084: 8000fd58 .word 0x8000fd58 +80004088: 00458593 addi x11,x11,4 + + mv x12, x10 # switch data pointer register to avoid conflict with test +8000408c: 00050613 addi x12,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xb716051f +80004090: 00062503 lw x10,0(x12) +80004094: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xa3c764b6 +80004098: 00062503 lw x10,0(x12) +8000409c: 00460613 addi x12,x12,4 + +800040a0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b10: + sha512sig0l x10, x10, x10 # perform operation +800040a0: 54a50533 sha512sig0l x10,x10,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b10_str) +800040a4: 0005a683 lw x13,0(x11) +800040a8: 00a68863 beq x13,x10,800040b8 +800040ac: 4940176f jal x14,80005540 +800040b0: 800040a0 .word 0x800040a0 +800040b4: 8000fd9a .word 0x8000fd9a +800040b8: 00458593 addi x11,x11,4 + + mv x2, x11 # switch signature pointer register to avoid conflict with test +800040bc: 00058113 addi x2,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x16ee49e0 +800040c0: 00062583 lw x11,0(x12) +800040c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x3e0328f1 +800040c8: 00062583 lw x11,0(x12) +800040cc: 00460613 addi x12,x12,4 + +800040d0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b11: + sha512sig0l x11, x11, x11 # perform operation +800040d0: 54b585b3 sha512sig0l x11,x11,x11 + # Check if x11 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x11, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b11_str) +800040d4: 00012683 lw x13,0(x2) +800040d8: 00b68863 beq x13,x11,800040e8 +800040dc: 4640176f jal x14,80005540 +800040e0: 800040d0 .word 0x800040d0 +800040e4: 8000fddd .word 0x8000fddd +800040e8: 00410113 addi x2,x2,4 + + mv x17, x12 # switch data pointer register to avoid conflict with test +800040ec: 00060893 addi x17,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x2ffa11cc +800040f0: 0008a603 lw x12,0(x17) +800040f4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x37c9b821 +800040f8: 0008a603 lw x12,0(x17) +800040fc: 00488893 addi x17,x17,4 + +80004100 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b12: + sha512sig0l x12, x12, x12 # perform operation +80004100: 54c60633 sha512sig0l x12,x12,x12 + # Check if x12 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x12, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b12_str) +80004104: 00012683 lw x13,0(x2) +80004108: 00c68863 beq x13,x12,80004118 +8000410c: 4340176f jal x14,80005540 +80004110: 80004100 .word 0x80004100 +80004114: 8000fe20 .word 0x8000fe20 +80004118: 00410113 addi x2,x2,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000411c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004120: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x4e238d77 +80004124: 0008a683 lw x13,0(x17) +80004128: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xfd41ebca +8000412c: 0008a683 lw x13,0(x17) +80004130: 00488893 addi x17,x17,4 + +80004134 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b13: + sha512sig0l x13, x13, x13 # perform operation +80004134: 54d686b3 sha512sig0l x13,x13,x13 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b13_str) +80004138: 00012383 lw x7,0(x2) +8000413c: 00d38863 beq x7,x13,8000414c +80004140: 3d80146f jal x8,80005518 +80004144: 80004134 .word 0x80004134 +80004148: 8000fe63 .word 0x8000fe63 +8000414c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x50e0247f +80004150: 0008a703 lw x14,0(x17) +80004154: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x5c3b3adf +80004158: 0008a703 lw x14,0(x17) +8000415c: 00488893 addi x17,x17,4 + +80004160 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b14: + sha512sig0l x14, x14, x14 # perform operation +80004160: 54e70733 sha512sig0l x14,x14,x14 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b14_str) +80004164: 00012383 lw x7,0(x2) +80004168: 00e38863 beq x7,x14,80004178 +8000416c: 3ac0146f jal x8,80005518 +80004170: 80004160 .word 0x80004160 +80004174: 8000fea6 .word 0x8000fea6 +80004178: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x2f8f8b30 +8000417c: 0008a783 lw x15,0(x17) +80004180: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x4c750f01 +80004184: 0008a783 lw x15,0(x17) +80004188: 00488893 addi x17,x17,4 + +8000418c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b15: + sha512sig0l x15, x15, x15 # perform operation +8000418c: 54f787b3 sha512sig0l x15,x15,x15 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b15_str) +80004190: 00012383 lw x7,0(x2) +80004194: 00f38863 beq x7,x15,800041a4 +80004198: 3800146f jal x8,80005518 +8000419c: 8000418c .word 0x8000418c +800041a0: 8000fee9 .word 0x8000fee9 +800041a4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x2e18a2f0 +800041a8: 0008a803 lw x16,0(x17) +800041ac: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x820d99b7 +800041b0: 0008a803 lw x16,0(x17) +800041b4: 00488893 addi x17,x17,4 + +800041b8 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b16: + sha512sig0l x16, x16, x16 # perform operation +800041b8: 55080833 sha512sig0l x16,x16,x16 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b16_str) +800041bc: 00012383 lw x7,0(x2) +800041c0: 01038863 beq x7,x16,800041d0 +800041c4: 3540146f jal x8,80005518 +800041c8: 800041b8 .word 0x800041b8 +800041cc: 8000ff2c .word 0x8000ff2c +800041d0: 00410113 addi x2,x2,4 + + mv x9, x17 # switch data pointer register to avoid conflict with test +800041d4: 00088493 addi x9,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7f38969b +800041d8: 0004a883 lw x17,0(x9) +800041dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x41f130a0 +800041e0: 0004a883 lw x17,0(x9) +800041e4: 00448493 addi x9,x9,4 + +800041e8 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b17: + sha512sig0l x17, x17, x17 # perform operation +800041e8: 551888b3 sha512sig0l x17,x17,x17 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b17_str) +800041ec: 00012383 lw x7,0(x2) +800041f0: 01138863 beq x7,x17,80004200 +800041f4: 3240146f jal x8,80005518 +800041f8: 800041e8 .word 0x800041e8 +800041fc: 8000ff6f .word 0x8000ff6f +80004200: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x7cd3e7a1 +80004204: 0004a903 lw x18,0(x9) +80004208: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x4d810f4f +8000420c: 0004a903 lw x18,0(x9) +80004210: 00448493 addi x9,x9,4 + +80004214 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b18: + sha512sig0l x18, x18, x18 # perform operation +80004214: 55290933 sha512sig0l x18,x18,x18 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b18_str) +80004218: 00012383 lw x7,0(x2) +8000421c: 01238863 beq x7,x18,8000422c +80004220: 2f80146f jal x8,80005518 +80004224: 80004214 .word 0x80004214 +80004228: 8000ffb2 .word 0x8000ffb2 +8000422c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x2fe33b0a +80004230: 0004a983 lw x19,0(x9) +80004234: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7a477151 +80004238: 0004a983 lw x19,0(x9) +8000423c: 00448493 addi x9,x9,4 + +80004240 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b19: + sha512sig0l x19, x19, x19 # perform operation +80004240: 553989b3 sha512sig0l x19,x19,x19 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b19_str) +80004244: 00012383 lw x7,0(x2) +80004248: 01338863 beq x7,x19,80004258 +8000424c: 2cc0146f jal x8,80005518 +80004250: 80004240 .word 0x80004240 +80004254: 8000fff5 .word 0x8000fff5 +80004258: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xd39fb692 +8000425c: 0004aa03 lw x20,0(x9) +80004260: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x5165ba4c +80004264: 0004aa03 lw x20,0(x9) +80004268: 00448493 addi x9,x9,4 + +8000426c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b20: + sha512sig0l x20, x20, x20 # perform operation +8000426c: 554a0a33 sha512sig0l x20,x20,x20 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b20_str) +80004270: 00012383 lw x7,0(x2) +80004274: 01438863 beq x7,x20,80004284 +80004278: 2a00146f jal x8,80005518 +8000427c: 8000426c .word 0x8000426c +80004280: 80010038 .word 0x80010038 +80004284: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x6ee38f7d +80004288: 0004aa83 lw x21,0(x9) +8000428c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x1eed84dd +80004290: 0004aa83 lw x21,0(x9) +80004294: 00448493 addi x9,x9,4 + +80004298 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b21: + sha512sig0l x21, x21, x21 # perform operation +80004298: 555a8ab3 sha512sig0l x21,x21,x21 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b21_str) +8000429c: 00012383 lw x7,0(x2) +800042a0: 01538863 beq x7,x21,800042b0 +800042a4: 2740146f jal x8,80005518 +800042a8: 80004298 .word 0x80004298 +800042ac: 8001007b .word 0x8001007b +800042b0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xcdc20b72 +800042b4: 0004ab03 lw x22,0(x9) +800042b8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x61d62442 +800042bc: 0004ab03 lw x22,0(x9) +800042c0: 00448493 addi x9,x9,4 + +800042c4 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b22: + sha512sig0l x22, x22, x22 # perform operation +800042c4: 556b0b33 sha512sig0l x22,x22,x22 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b22_str) +800042c8: 00012383 lw x7,0(x2) +800042cc: 01638863 beq x7,x22,800042dc +800042d0: 2480146f jal x8,80005518 +800042d4: 800042c4 .word 0x800042c4 +800042d8: 800100be .word 0x800100be +800042dc: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0c32753d +800042e0: 0004ab83 lw x23,0(x9) +800042e4: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x4ee8bee8 +800042e8: 0004ab83 lw x23,0(x9) +800042ec: 00448493 addi x9,x9,4 + +800042f0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b23: + sha512sig0l x23, x23, x23 # perform operation +800042f0: 557b8bb3 sha512sig0l x23,x23,x23 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b23_str) +800042f4: 00012383 lw x7,0(x2) +800042f8: 01738863 beq x7,x23,80004308 +800042fc: 21c0146f jal x8,80005518 +80004300: 800042f0 .word 0x800042f0 +80004304: 80010101 .word 0x80010101 +80004308: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x02b75c67 +8000430c: 0004ac03 lw x24,0(x9) +80004310: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x9347a372 +80004314: 0004ac03 lw x24,0(x9) +80004318: 00448493 addi x9,x9,4 + +8000431c : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b24: + sha512sig0l x24, x24, x24 # perform operation +8000431c: 558c0c33 sha512sig0l x24,x24,x24 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b24_str) +80004320: 00012383 lw x7,0(x2) +80004324: 01838863 beq x7,x24,80004334 +80004328: 1f00146f jal x8,80005518 +8000432c: 8000431c .word 0x8000431c +80004330: 80010144 .word 0x80010144 +80004334: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x358f41a1 +80004338: 0004ac83 lw x25,0(x9) +8000433c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x3beff44c +80004340: 0004ac83 lw x25,0(x9) +80004344: 00448493 addi x9,x9,4 + +80004348 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b25: + sha512sig0l x25, x25, x25 # perform operation +80004348: 559c8cb3 sha512sig0l x25,x25,x25 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b25_str) +8000434c: 00012383 lw x7,0(x2) +80004350: 01938863 beq x7,x25,80004360 +80004354: 1c40146f jal x8,80005518 +80004358: 80004348 .word 0x80004348 +8000435c: 80010187 .word 0x80010187 +80004360: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xcb35f196 +80004364: 0004ad03 lw x26,0(x9) +80004368: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xf0ce40f4 +8000436c: 0004ad03 lw x26,0(x9) +80004370: 00448493 addi x9,x9,4 + +80004374 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b26: + sha512sig0l x26, x26, x26 # perform operation +80004374: 55ad0d33 sha512sig0l x26,x26,x26 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b26_str) +80004378: 00012383 lw x7,0(x2) +8000437c: 01a38863 beq x7,x26,8000438c +80004380: 1980146f jal x8,80005518 +80004384: 80004374 .word 0x80004374 +80004388: 800101ca .word 0x800101ca +8000438c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x8223afab +80004390: 0004ad83 lw x27,0(x9) +80004394: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x9be3315e +80004398: 0004ad83 lw x27,0(x9) +8000439c: 00448493 addi x9,x9,4 + +800043a0 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b27: + sha512sig0l x27, x27, x27 # perform operation +800043a0: 55bd8db3 sha512sig0l x27,x27,x27 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b27_str) +800043a4: 00012383 lw x7,0(x2) +800043a8: 01b38863 beq x7,x27,800043b8 +800043ac: 16c0146f jal x8,80005518 +800043b0: 800043a0 .word 0x800043a0 +800043b4: 8001020d .word 0x8001020d +800043b8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xbb80e5f0 +800043bc: 0004ae03 lw x28,0(x9) +800043c0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xf1519b21 +800043c4: 0004ae03 lw x28,0(x9) +800043c8: 00448493 addi x9,x9,4 + +800043cc : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b28: + sha512sig0l x28, x28, x28 # perform operation +800043cc: 55ce0e33 sha512sig0l x28,x28,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b28_str) +800043d0: 00012383 lw x7,0(x2) +800043d4: 01c38863 beq x7,x28,800043e4 +800043d8: 1400146f jal x8,80005518 +800043dc: 800043cc .word 0x800043cc +800043e0: 80010250 .word 0x80010250 +800043e4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xfbefeddb +800043e8: 0004ae83 lw x29,0(x9) +800043ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x96c51578 +800043f0: 0004ae83 lw x29,0(x9) +800043f4: 00448493 addi x9,x9,4 + +800043f8 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b29: + sha512sig0l x29, x29, x29 # perform operation +800043f8: 55de8eb3 sha512sig0l x29,x29,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b29_str) +800043fc: 00012383 lw x7,0(x2) +80004400: 01d38863 beq x7,x29,80004410 +80004404: 1140146f jal x8,80005518 +80004408: 800043f8 .word 0x800043f8 +8000440c: 80010293 .word 0x80010293 +80004410: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xe1452b9b +80004414: 0004af03 lw x30,0(x9) +80004418: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x5994d96c +8000441c: 0004af03 lw x30,0(x9) +80004420: 00448493 addi x9,x9,4 + +80004424 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b30: + sha512sig0l x30, x30, x30 # perform operation +80004424: 55ef0f33 sha512sig0l x30,x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b30_str) +80004428: 00012383 lw x7,0(x2) +8000442c: 01e38863 beq x7,x30,8000443c +80004430: 0e80146f jal x8,80005518 +80004434: 80004424 .word 0x80004424 +80004438: 800102d6 .word 0x800102d6 +8000443c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xf507f6c5 +80004440: 0004af83 lw x31,0(x9) +80004444: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x3075cf89 +80004448: 0004af83 lw x31,0(x9) +8000444c: 00448493 addi x9,x9,4 + +80004450 : +Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b31: + sha512sig0l x31, x31, x31 # perform operation +80004450: 55ff8fb3 sha512sig0l x31,x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sig0l_cg_cmp_rd_rs1_rs2_b31_str) +80004454: 00012383 lw x7,0(x2) +80004458: 01f38863 beq x7,x31,80004468 +8000445c: 0bc0146f jal x8,80005518 +80004460: 80004450 .word 0x80004450 +80004464: 80010319 .word 0x80010319 +80004468: 00410113 addi x2,x2,4 + +8000446c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000446c: 00000513 addi x10,x0,0 +80004470: 00000073 ecall +80004474: fff00513 addi x10,x0,-1 +80004478: 1d800413 addi x8,x0,472 + +8000447c : +8000447c: 34002373 csrrs x6,mscratch,x0 + +80004480 : +80004480: 23832383 lw x7,568(x6) +80004484: 23c32483 lw x9,572(x6) + +80004488 : +80004488: 22032383 lw x7,544(x6) + +8000448c : +8000448c: 25032483 lw x9,592(x6) +80004490: 34049073 csrrw x0,mscratch,x9 + +80004494 : +80004494: 24832483 lw x9,584(x6) +80004498: 305493f3 csrrw x7,mtvec,x9 +8000449c: ffc4f493 andi x9,x9,-4 +800044a0: ffc3f393 andi x7,x7,-4 +800044a4: 00749e63 bne x9,x7,800044c0 + +800044a8 : +800044a8: 00030493 addi x9,x6,0 + +800044ac : +800044ac: 0004a783 lw x15,0(x9) +800044b0: 00f3a023 sw x15,0(x7) +800044b4: 00438393 addi x7,x7,4 +800044b8: 00448493 addi x9,x9,4 +800044bc: fe83c8e3 blt x7,x8,800044ac +800044c0: 0000100f fence.i + +800044c4 : +800044c4: 00000013 addi x0,x0,0 +800044c8: 00000013 addi x0,x0,0 +800044cc: 00000013 addi x0,x0,0 +800044d0: 00000013 addi x0,x0,0 +800044d4: 00000013 addi x0,x0,0 +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 4c550513 addi x10,x10,1221 # 800109e5 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001e097 auipc x1,0x1e +80004544: 024080e7 jalr x1,36(x1) # 80022564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 4c550513 addi x10,x10,1221 # 80010a25 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001e097 auipc x1,0x1e +80004584: fe4080e7 jalr x1,-28(x1) # 80022564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 4e550513 addi x10,x10,1253 # 80010a85 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001e097 auipc x1,0x1e +800045c4: fa4080e7 jalr x1,-92(x1) # 80022564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 05050513 addi x10,x10,80 # 80011630 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001e097 auipc x1,0x1e +80004604: f64080e7 jalr x1,-156(x1) # 80022564 +80004608: 0001e097 auipc x1,0x1e +8000460c: fbc080e7 jalr x1,-68(x1) # 800225c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 0a838393 addi x7,x7,168 # 80012708 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 06040413 addi x8,x8,96 # 80012700 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 80010bd9 .word 0x80010bd9 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 80010a47 .word 0x80010a47 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 2a450513 addi x10,x10,676 # 800109a4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001e097 auipc x1,0x1e +80004724: e44080e7 jalr x1,-444(x1) # 80022564 +80004728: 0001e097 auipc x1,0x1e +8000472c: e7c080e7 jalr x1,-388(x1) # 800225a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 2a550513 addi x10,x10,677 # 800109e5 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001e097 auipc x1,0x1e +80004764: e04080e7 jalr x1,-508(x1) # 80022564 +80004768: 0001e097 auipc x1,0x1e +8000476c: e5c080e7 jalr x1,-420(x1) # 800225c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ccdff06f jal x0,8000446c + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047ac: cc1ff06f jal x0,8000446c +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b6430313 addi x6,x6,-1180 # 800044c4 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 52750513 addi x10,x10,1319 # 80012067 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001e097 auipc x1,0x1e +80004b64: a04080e7 jalr x1,-1532(x1) # 80022564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000c517 auipc x10,0xc +80004b84: 94850513 addi x10,x10,-1720 # 800104c8 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: f2e50513 addi x10,x10,-210 # 80010aee +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: de550513 addi x10,x10,-539 # 800109e5 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 0001e097 auipc x1,0x1e +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800225c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 4c848493 addi x9,x9,1224 # 800104a8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 14c40413 addi x8,x8,332 # 8002116c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010bf0 .word 0x80010bf0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010cf2 .word 0x80010cf2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010ded .word 0x80010ded +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010ee0 .word 0x80010ee0 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80011053 .word 0x80011053 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80022000 .word 0x80022000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80022014 .word 0x80022014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022030 .word 0x80022030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000b217 auipc x4,0xb +80005504: e6020213 addi x4,x4,-416 # 80010360 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000b397 auipc x7,0xb +8000551c: e4838393 addi x7,x7,-440 # 80010360 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000b697 auipc x13,0xb +80005544: e2068693 addi x13,x13,-480 # 80010360 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000b497 auipc x9,0xb +8000556c: df848493 addi x9,x9,-520 # 80010360 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000b497 auipc x9,0xb +80005610: d544a483 lw x9,-684(x9) # 80010360 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000d417 auipc x8,0xd +800056c4: 9f040413 addi x8,x8,-1552 # 800120b0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001c417 auipc x8,0x1c +80005704: a7040413 addi x8,x8,-1424 # 80021170 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000b497 auipc x9,0xb +80005744: d4848493 addi x9,x9,-696 # 80010488 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000b817 auipc x16,0xb +800057b4: ce880813 addi x16,x16,-792 # 80010498 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000b817 auipc x16,0xb +800057c8: cd480813 addi x16,x16,-812 # 80010498 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 40938393 addi x7,x7,1033 # 80010bd9 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000b817 auipc x16,0xb +800057e4: cb080813 addi x16,x16,-848 # 80010490 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 40438393 addi x7,x7,1028 # 80010bf0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 4ee38393 addi x7,x7,1262 # 80010cf2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 5d138393 addi x7,x7,1489 # 80010ded +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: 6ac38393 addi x7,x7,1708 # 80010ee0 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000c397 auipc x7,0xc +80005850: 80738393 addi x7,x7,-2041 # 80011053 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: 77338393 addi x7,x7,1907 # 80010fd7 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: 79938393 addi x7,x7,1945 # 80011015 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 39c38393 addi x7,x7,924 # 80010c30 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 48438393 addi x7,x7,1156 # 80010d30 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 56538393 addi x7,x7,1381 # 80010e29 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 64138393 addi x7,x7,1601 # 80010f1d +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: 79a38393 addi x7,x7,1946 # 8001108e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 36438393 addi x7,x7,868 # 80010c70 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 44a38393 addi x7,x7,1098 # 80010d6e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 52938393 addi x7,x7,1321 # 80010e65 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 60638393 addi x7,x7,1542 # 80010f5a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: 75d38393 addi x7,x7,1885 # 800110c9 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 32d38393 addi x7,x7,813 # 80010cb1 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 41138393 addi x7,x7,1041 # 80010dad +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 4ee38393 addi x7,x7,1262 # 80010ea2 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 5cc38393 addi x7,x7,1484 # 80010f98 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: 72138393 addi x7,x7,1825 # 80011105 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: 74638393 addi x7,x7,1862 # 80011142 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: 77d38393 addi x7,x7,1917 # 80011191 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000c397 auipc x7,0xc +80005a30: 86038393 addi x7,x7,-1952 # 8001128c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000c397 auipc x7,0xc +80005a48: 94438393 addi x7,x7,-1724 # 80011388 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000b817 auipc x16,0xb +80005a68: a2c80813 addi x16,x16,-1492 # 80010490 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000b817 auipc x16,0xb +80005a78: a1c80813 addi x16,x16,-1508 # 80010490 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000b817 auipc x16,0xb +80005a84: a1480813 addi x16,x16,-1516 # 80010494 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000b817 auipc x16,0xb +80005a94: a0080813 addi x16,x16,-1536 # 80010490 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: f0550513 addi x10,x10,-251 # 800109e5 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001d097 auipc x1,0x1d +80005b04: a64080e7 jalr x1,-1436(x1) # 80022564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: f0550513 addi x10,x10,-251 # 80010a25 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: f7c50513 addi x10,x10,-132 # 80010adc +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 0000b517 auipc x10,0xb +80005b8c: 8f852503 lw x10,-1800(x10) # 80010480 +80005b90: 0001d097 auipc x1,0x1d +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80022564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f4e50513 addi x10,x10,-178 # 80010aee +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 79852503 lw x10,1944(x10) # 80010360 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f1050513 addi x10,x10,-240 # 80010af0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000b517 auipc x10,0xb +80005c0c: 85852503 lw x10,-1960(x10) # 80010460 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000b517 auipc x10,0xb +80005c44: 88850513 addi x10,x10,-1912 # 800104c8 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001d097 auipc x1,0x1d +80005c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: e8450513 addi x10,x10,-380 # 80010b04 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 7c052503 lw x10,1984(x10) # 80010468 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: 80850513 addi x10,x10,-2040 # 800104c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000c517 auipc x10,0xc +80005d04: 83b50513 addi x10,x10,-1989 # 8001153b +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 63852503 lw x10,1592(x10) # 80010360 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: 78860613 addi x12,x12,1928 # 800104c8 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 6fc52503 lw x10,1788(x10) # 80010464 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000c517 auipc x10,0xc +80005da4: 8b150513 addi x10,x10,-1871 # 80011651 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001c097 auipc x1,0x1c +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80022564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: 6e860613 addi x12,x12,1768 # 800104c8 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: 65c52503 lw x10,1628(x10) # 80010464 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: 6d450513 addi x10,x10,1748 # 80011534 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001c097 auipc x1,0x1c +80005e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 62850513 addi x10,x10,1576 # 800104c8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 66c50513 addi x10,x10,1644 # 8001154c +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 45852503 lw x10,1112(x10) # 80010360 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 55852503 lw x10,1368(x10) # 80010470 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 54452503 lw x10,1348(x10) # 80010470 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 58850513 addi x10,x10,1416 # 800104c8 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001c097 auipc x1,0x1c +80005f64: 604080e7 jalr x1,1540(x1) # 80022564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 52052503 lw x10,1312(x10) # 80010488 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 5e350513 addi x10,x10,1507 # 80011563 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 3b852503 lw x10,952(x10) # 80010360 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 4c052503 lw x10,1216(x10) # 80010478 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 4ac52503 lw x10,1196(x10) # 80010478 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001c097 auipc x1,0x1c +80006004: 564080e7 jalr x1,1380(x1) # 80022564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 55a50513 addi x10,x10,1370 # 8001157a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 0000a517 auipc x10,0xa +8000604c: 43052503 lw x10,1072(x10) # 80010478 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 46850513 addi x10,x10,1128 # 800104c8 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 53850513 addi x10,x10,1336 # 800115d8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 3b052503 lw x10,944(x10) # 80010478 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 3e850513 addi x10,x10,1000 # 800104c8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 38442403 lw x8,900(x8) # 80010490 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 55d50513 addi x10,x10,1373 # 8001167d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 54950513 addi x10,x10,1353 # 800116a9 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 0000a817 auipc x16,0xa +8000618c: 31080813 addi x16,x16,784 # 80010498 +80006190: 00082503 lw x10,0(x16) +80006194: 0001c097 auipc x1,0x1c +80006198: 3d0080e7 jalr x1,976(x1) # 80022564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 94e50513 addi x10,x10,-1714 # 80010aee +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 4d950513 addi x10,x10,1241 # 800116b9 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 0000a517 auipc x10,0xa +8000620c: 27052503 lw x10,624(x10) # 80010478 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 2a850513 addi x10,x10,680 # 800104c8 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 48450513 addi x10,x10,1156 # 800116e4 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 0000a517 auipc x10,0xa +8000628c: 1e852503 lw x10,488(x10) # 80010470 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 22850513 addi x10,x10,552 # 800104c8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 1a832303 lw x6,424(x6) # 80010470 +800062d0: 0000a397 auipc x7,0xa +800062d4: 1a83a383 lw x7,424(x7) # 80010478 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 43350513 addi x10,x10,1075 # 80011713 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 45b50513 addi x10,x10,1115 # 8001177b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 0000a317 auipc x6,0xa +8000634c: 12832303 lw x6,296(x6) # 80010470 +80006350: 0000a397 auipc x7,0xa +80006354: 1283a383 lw x7,296(x7) # 80010478 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 14850513 addi x10,x10,328 # 800104c8 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001c097 auipc x1,0x1c +800063a4: 1c4080e7 jalr x1,452(x1) # 80022564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 3e250513 addi x10,x10,994 # 800117a2 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 33f50513 addi x10,x10,831 # 8001173f +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 33b50513 addi x10,x10,827 # 8001177b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 0000a317 auipc x6,0xa +8000646c: 01032303 lw x6,16(x6) # 80010478 +80006470: 0000a397 auipc x7,0xa +80006474: 0003a383 lw x7,0(x7) # 80010470 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 02850513 addi x10,x10,40 # 800104c8 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001c097 auipc x1,0x1c +800064c4: 0a4080e7 jalr x1,164(x1) # 80022564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 3aa50513 addi x10,x10,938 # 8001188a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 45150513 addi x10,x10,1105 # 80011971 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0000a517 auipc x10,0xa +8000654c: f4c52503 lw x10,-180(x10) # 80010494 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 42d50513 addi x10,x10,1069 # 800119ad +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3cb50513 addi x10,x10,971 # 8001198b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 39350513 addi x10,x10,915 # 80011993 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35b50513 addi x10,x10,859 # 8001199b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 32450513 addi x10,x10,804 # 800119a4 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001c097 auipc x1,0x1c +800066a4: ec4080e7 jalr x1,-316(x1) # 80022564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2f650513 addi x10,x10,758 # 800119b6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 0000a517 auipc x10,0xa +800066ec: da852503 lw x10,-600(x10) # 80010490 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 3cd50513 addi x10,x10,973 # 80011b0d +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 25050513 addi x10,x10,592 # 800119d0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 24150513 addi x10,x10,577 # 80011a01 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 22150513 addi x10,x10,545 # 80011a21 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1ff50513 addi x10,x10,511 # 80011a3f +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1de50513 addi x10,x10,478 # 80011a5e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 1c650513 addi x10,x10,454 # 80011a86 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 1b250513 addi x10,x10,434 # 80011ab2 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 19e50513 addi x10,x10,414 # 80011ade +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001c097 auipc x1,0x1c +80006964: c04080e7 jalr x1,-1020(x1) # 80022564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 19c50513 addi x10,x10,412 # 80011b1c +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 0000a517 auipc x10,0xa +800069ac: ad052503 lw x10,-1328(x10) # 80010478 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: b0850513 addi x10,x10,-1272 # 800104c8 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 13350513 addi x10,x10,307 # 80011b33 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 0000a517 auipc x10,0xa +80006a2c: a4852503 lw x10,-1464(x10) # 80010470 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: a8850513 addi x10,x10,-1400 # 800104c8 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a2852503 lw x10,-1496(x10) # 80010490 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 0ca50513 addi x10,x10,202 # 80011b4a +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9d052503 lw x10,-1584(x10) # 80010478 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001c097 auipc x1,0x1c +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80022564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 0a150513 addi x10,x10,161 # 80011b61 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 98852503 lw x10,-1656(x10) # 80010470 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 0000a517 auipc x10,0xa +80006b08: 98c52503 lw x10,-1652(x10) # 80010490 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 0b750513 addi x10,x10,183 # 80011bd7 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001c097 auipc x1,0x1c +80006b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 14d50513 addi x10,x10,333 # 80011cad +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 20050513 addi x10,x10,512 # 80011da0 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 2bb50513 addi x10,x10,699 # 80011e9b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 36250513 addi x10,x10,866 # 80011f82 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: f2f50513 addi x10,x10,-209 # 80011b8f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 0000a617 auipc x12,0xa +80006c8c: 82062603 lw x12,-2016(x12) # 800104a8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: ed850513 addi x10,x10,-296 # 80010b78 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 7c850513 addi x10,x10,1992 # 800104c8 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001c097 auipc x1,0x1c +80006d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 7b058593 addi x11,x11,1968 # 800104f0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 7e458593 addi x11,x11,2020 # 80010550 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 0000a517 auipc x10,0xa +80006da4: bee50513 addi x10,x10,-1042 # 8001098e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000b517 auipc x10,0xb +80006de4: 85050513 addi x10,x10,-1968 # 80011630 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001b097 auipc x1,0x1b +80006e04: 764080e7 jalr x1,1892(x1) # 80022564 + +80006e08 : +80006e08: 0001b097 auipc x1,0x1b +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800225c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: 69060613 addi x12,x12,1680 # 800104a0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d7950513 addi x10,x10,-647 # 80010b99 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: 66052503 lw x10,1632(x10) # 800104a8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 66850513 addi x10,x10,1640 # 800104c8 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 0000a517 auipc x10,0xa +80006ea4: d0950513 addi x10,x10,-759 # 80010ba9 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 5e852503 lw x10,1512(x10) # 800104b0 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 0000a517 auipc x10,0xa +80006f24: c9950513 addi x10,x10,-871 # 80010bb9 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 57052503 lw x10,1392(x10) # 800104b8 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 56850513 addi x10,x10,1384 # 800104c8 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 0000a517 auipc x10,0xa +80006fa4: c2950513 addi x10,x10,-983 # 80010bc9 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 4f852503 lw x10,1272(x10) # 800104c0 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009617 auipc x12,0x9 +8000700c: 49860613 addi x12,x12,1176 # 800104a0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 4a860613 addi x12,x12,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 1f838393 addi x7,x7,504 # 80005200 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 1dc38393 addi x7,x7,476 # 80005200 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 1c438393 addi x7,x7,452 # 80005200 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1b038393 addi x7,x7,432 # 80005200 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1a438393 addi x7,x7,420 # 80005200 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 17038393 addi x7,x7,368 # 80005200 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 3d030313 addi x6,x6,976 # 8000446c +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 15838393 addi x7,x7,344 # 80005200 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3b830313 addi x6,x6,952 # 8000446c +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 14038393 addi x7,x7,320 # 80005200 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3a030313 addi x6,x6,928 # 8000446c +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 12838393 addi x7,x7,296 # 80005200 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 23c78793 addi x15,x15,572 # 8000447c +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 02018193 addi x3,x3,32 # 80005500 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sig1h-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sig1h-00.elf.objdump new file mode 100644 index 0000000..017114d --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sig1h-00.elf.objdump @@ -0,0 +1,13195 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig1h-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig1h-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000266a 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025ce5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d66 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025d89 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025da0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025dc8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e57 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc4GbKFu.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090d0 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b13 +800092cf l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b14_str +800002fc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b15_str +80000328 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b16_str +80000354 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b18_str +800003b4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b19_str +800003e0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b23_str +80000494 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b24_str +800004c0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b25_str +800004ec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b26_str +80000518 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b27_str +80000544 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b28_str +80000570 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b29_str +8000059c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b30_str +800005c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_b31_str +800005f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b0_str +80000620 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b1_str +8000064c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b4 +80009801 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b7 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +800098ac l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b9_str +800007bc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b10_str +800007e8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b11_str +80000814 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b12_str +80000848 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b13_str +80000874 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b14_str +800008a4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b16_str +80000900 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b17_str +8000092c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b18_str +80000958 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b20_str +800009b4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b21_str +800009e4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b22_str +80000a10 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b23_str +80000a3c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b24_str +80000a68 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b25_str +80000a94 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b26_str +80000ac0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b27_str +80000aec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b28_str +80000b18 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b29_str +80000b44 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b30_str +80000b70 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_b31_str +80000b9c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b0_str +80000bc8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b1_str +80000bf4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b2_str +80000c24 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b3_str +80000c50 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b4 +80009f33 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b4_str +80000c7c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b5_str +80000ca8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b6_str +80000cdc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b7_str +80000d08 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b8_str +80000d34 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b9_str +80000d64 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b10_str +80000d90 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b11_str +80000dbc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b12_str +80000df0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b13_str +80000e1c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b14_str +80000e48 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b15_str +80000e74 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b16_str +80000ea0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b17_str +80000ecc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b18_str +80000ef8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b19_str +80000f24 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b20_str +80000f50 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b21_str +80000f7c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b22_str +80000fa8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b24_str +80001000 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b25_str +8000102c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b26_str +80001058 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b27_str +80001084 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b28_str +800010b0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b29_str +800010dc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b30_str +8000110c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sig1h_cg_cp_rd_b31_str +80001138 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x0_str +80001164 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x1_str +80001190 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x2_str +800011bc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000000_str +800011e8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000001_str +80001214 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x7fffffff_str +80001240 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x7ffffffe_str +8000126c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xffffffff_str +80001298 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xfffffffe_str +800012c4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x5bbc8872_str +800012f0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0xaaaaaaaa_str +8000131c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs1_edges_0x55555555_str +80001348 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x0_str +80001374 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x1_str +800013a0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x2_str +800013cc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000000_str +800013f8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000001_str +80001424 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x7fffffff_str +80001450 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x7ffffffe_str +8000147c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xffffffff_str +800014a8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xfffffffe_str +800014d4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x5bbc8872_str +80001500 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0xaaaaaaaa_str +8000152c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sig1h_cg_cp_rs2_edges_0x55555555_str +80001558 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001584 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015dc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001608 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001634 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001660 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000168c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001710 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000173c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001768 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001794 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017ec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001818 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001844 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001870 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000189c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001920 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000194c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001978 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019fc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a28 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a54 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a80 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b04 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b30 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b5c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b88 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c0c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c38 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c64 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c90 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cbc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d14 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d40 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d6c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d98 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e1c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e48 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e74 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ecc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f24 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f50 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f7c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002000 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000202c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002058 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002084 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020dc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002108 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002134 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002160 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000218c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002210 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000223c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002268 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002294 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022ec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002318 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002344 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002370 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000239c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002420 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000244c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002478 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024fc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002528 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002554 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002580 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025ac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002604 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002630 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000265c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002688 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000270c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002738 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002764 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002790 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027bc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002814 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002840 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000286c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002898 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000291c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002948 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002974 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029cc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a24 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a50 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a7c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b00 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b2c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b58 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b84 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bdc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c08 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c34 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c60 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c8c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d10 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d3c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d68 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d94 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e18 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b0_str +80002e44 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b2_str +80002ea0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b3_str +80002ecc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b4_str +80002ef8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b5_str +80002f24 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b6_str +80002f58 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b7_str +80002f84 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b8_str +80002fb0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b9_str +80002fdc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b10_str +80003008 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b11_str +80003034 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b12_str +80003060 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b13_str +8000308c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b14_str +800030b8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b15_str +800030e4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b16_str +80003110 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b17_str +80003140 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b18_str +8000316c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b19_str +80003198 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b20_str +800031c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b21_str +800031f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b22_str +80003220 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b23_str +8000324c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b24_str +80003278 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b25_str +800032a4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b26_str +800032d4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b27_str +80003300 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b28_str +8000332c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b29_str +80003358 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b30_str +80003384 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rs1_rs2_b31_str +800033b0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b0_str +800033dc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b1_str +80003408 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b2_str +80003434 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b3_str +80003468 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b4_str +80003494 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b5_str +800034c0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b6_str +800034ec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b7_str +80003518 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b8_str +80003544 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b9_str +80003570 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b10_str +800035a0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b11_str +800035d0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b12_str +80003604 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b13_str +80003630 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b14_str +8000365c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b17_str +800036e4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b18_str +80003710 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b19_str +8000373c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b20_str +80003768 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b21_str +80003794 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b22_str +800037c0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b23_str +800037ec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b24_str +80003818 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b25_str +80003844 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b26_str +80003870 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b27_str +8000389c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b28_str +800038c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b29_str +800038f4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b30_str +80003920 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_b31_str +8000394c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b0_str +80003978 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b1_str +800039a8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b2_str +800039d4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b6_str +80003a8c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b7_str +80003ab8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b8_str +80003ae4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b9_str +80003b14 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b10_str +80003b40 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b11_str +80003b6c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b12_str +80003ba0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b13_str +80003bcc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b14_str +80003bfc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b15_str +80003c28 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b16_str +80003c54 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b17_str +80003c80 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b18_str +80003cac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b19_str +80003cd8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b20_str +80003d04 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b21_str +80003d30 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b22_str +80003d5c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b23_str +80003d88 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b24_str +80003db4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b25_str +80003de4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b26_str +80003e10 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b27_str +80003e3c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b28_str +80003e68 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b29_str +80003e94 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b30_str +80003ec0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs2_b31_str +80003eec l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b0_str +80003f18 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b1_str +80003f44 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b2_str +80003f70 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b3_str +80003f9c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b4_str +80003fc8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b5_str +80003ff4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b6_str +80004028 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b7_str +80004054 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b8_str +80004084 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b9_str +800040b4 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b10_str +800040e0 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b11_str +8000410c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b12_str +80004138 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b13_str +80004164 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b14_str +80004190 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b15_str +800041bc l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b16_str +800041e8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b17_str +80004214 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b18_str +80004240 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b19_str +8000426c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b20_str +8000429c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b21_str +800042c8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b22_str +800042f8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b23_str +80004324 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b24_str +80004350 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b25_str +8000437c l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b26_str +800043ac l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b27_str +800043d8 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b28_str +80004404 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b29_str +80004430 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b30_str +80004460 l .text.rvtest 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004490 l .text.rvtest 00000000 exit_Mcleanup +80004494 l .text.rvtest 00000000 resto_Medeleg +8000449c l .text.rvtest 00000000 resto_Msatp +800044a0 l .text.rvtest 00000000 resto_Mscratch +800044a8 l .text.rvtest 00000000 resto_Mxtvec +800044bc l .text.rvtest 00000000 resto_Mtramp +800044c0 l .text.rvtest 00000000 resto_Mloop +800044d8 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 sv_Hcause_str +80010e65 l .data 00000000 sv_Hepc_str +80010f5a l .data 00000000 sv_Htval_str +800110c9 l .data 00000000 sv_Hip_str +80010cb1 l .data 00000000 sv_Vvect_str +80010dad l .data 00000000 sv_Vcause_str +80010ea2 l .data 00000000 sv_Vepc_str +80010f98 l .data 00000000 sv_Vtval_str +80011105 l .data 00000000 sv_Vip_str +80011142 l .data 00000000 Mclr_Mext_int_str +80011191 l .data 00000000 Mclr_Sext_int_str +8001128c l .data 00000000 Sclr_Sext_int_str +80011388 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +80010494 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010adc l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +80010480 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80011713 l .data 00000000 trap_diag_extra_traps_str +8001177b l .data 00000000 trap_diag_diff_bytes_str +800117a2 l .data 00000000 trap_diag_extra_next_step_str +8001173f l .data 00000000 trap_diag_missing_traps_str +8001188a l .data 00000000 trap_diag_missing_next_step_str +80011971 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +800119ad l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +8001198b l .data 00000000 trap_diag_mode_m_str +80011993 l .data 00000000 trap_diag_mode_s_str +8001199b l .data 00000000 trap_diag_mode_hs_str +800119a4 l .data 00000000 trap_diag_mode_vs_str +800119b6 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +80011b4a l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80011b61 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80011bd7 l .data 00000000 trap_diag_hint_vect_str +80011cad l .data 00000000 trap_diag_hint_cause_str +80011da0 l .data 00000000 trap_diag_hint_epc_str +80011e9b l .data 00000000 trap_diag_hint_tval_str +80011f82 l .data 00000000 trap_diag_hint_ip_str +80011b8f l .data 00000000 trap_diag_generic_str +80010b78 l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +800104f0 l .data 00000000 trap_excpt_name_tbl +80010550 l .data 00000000 trap_int_name_tbl +8001098e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +800104a0 l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 +80010617 l .data 00000000 trap_excpt_name_6 +80010635 l .data 00000000 trap_excpt_name_7 +8001064d l .data 00000000 trap_excpt_name_8 +8001066b l .data 00000000 trap_excpt_name_9 +80010689 l .data 00000000 trap_excpt_name_10 +800106a8 l .data 00000000 trap_excpt_name_11 +800106c6 l .data 00000000 trap_excpt_name_12 +800106de l .data 00000000 trap_excpt_name_13 +800106ef l .data 00000000 trap_excpt_name_14 +800106fe l .data 00000000 trap_excpt_name_15 +80010714 l .data 00000000 trap_excpt_name_16 +80010721 l .data 00000000 trap_excpt_name_17 +80010730 l .data 00000000 trap_excpt_name_18 +80010740 l .data 00000000 trap_excpt_name_19 +80010750 l .data 00000000 trap_excpt_name_20 +8001076e l .data 00000000 trap_excpt_name_21 +80010785 l .data 00000000 trap_excpt_name_22 +8001079a l .data 00000000 trap_excpt_name_23 +800107b6 l .data 00000000 trap_int_name_0 +800107ce l .data 00000000 trap_int_name_1 +800107ed l .data 00000000 trap_int_name_2 +80010814 l .data 00000000 trap_int_name_3 +80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044d8 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004480 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +80004480 g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7b67f2f3 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x4df0b4e3 +80000048: 0001ac83 lw x25,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sig1h_cg_cp_rs1_b0: + sha512sig1h x15, x0, x25 # perform operation +80000050: 5f9007b3 sha512sig1h x15,x0,x25 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zknh_sha512sig1h_cg_cp_rs1_b0, Zknh_sha512sig1h_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00f20863 beq x4,x15,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x315c6f02 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x8e66335d +80000074: 0001a703 lw x14,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sig1h_cg_cp_rs1_b1: + sha512sig1h x6, x1, x14 # perform operation +8000007c: 5ee08333 sha512sig1h x6,x1,x14 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha512sig1h_cg_cp_rs1_b1, Zknh_sha512sig1h_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00620863 beq x4,x6,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x18, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010913 addi x18,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0a213b52 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xcaa361b2 +800000a4: 0001ab83 lw x23,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sig1h_cg_cp_rs1_b2: + sha512sig1h x0, x2, x23 # perform operation +800000ac: 5f710033 sha512sig1h x0,x2,x23 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zknh_sha512sig1h_cg_cp_rs1_b2, Zknh_sha512sig1h_cg_cp_rs1_b2_str) +800000b0: 00092203 lw x4,0(x18) +800000b4: 00020863 beq x4,x0,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 00490913 addi x18,x18,4 + + mv x19, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018993 addi x19,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x63cf59cd +800000cc: 0009a183 lw x3,0(x19) +800000d0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x1ae83589 +800000d4: 0009ad83 lw x27,0(x19) +800000d8: 00498993 addi x19,x19,4 + +800000dc : +Zknh_sha512sig1h_cg_cp_rs1_b3: + sha512sig1h x10, x3, x27 # perform operation +800000dc: 5fb18533 sha512sig1h x10,x3,x27 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zknh_sha512sig1h_cg_cp_rs1_b3, Zknh_sha512sig1h_cg_cp_rs1_b3_str) +800000e0: 00092203 lw x4,0(x18) +800000e4: 00a20863 beq x4,x10,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x8ec8d622 +80000100: 0009a203 lw x4,0(x19) +80000104: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x1e5d1252 +80000108: 0009a583 lw x11,0(x19) +8000010c: 00498993 addi x19,x19,4 + +80000110 : +Zknh_sha512sig1h_cg_cp_rs1_b4: + sha512sig1h x1, x4, x11 # perform operation +80000110: 5eb200b3 sha512sig1h x1,x4,x11 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zknh_sha512sig1h_cg_cp_rs1_b4, Zknh_sha512sig1h_cg_cp_rs1_b4_str) +80000114: 00092383 lw x7,0(x18) +80000118: 00138863 beq x7,x1,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x7b306022 +8000012c: 0009a283 lw x5,0(x19) +80000130: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xcbb17848 +80000134: 0009a883 lw x17,0(x19) +80000138: 00498993 addi x19,x19,4 + +8000013c : +Zknh_sha512sig1h_cg_cp_rs1_b5: + sha512sig1h x31, x5, x17 # perform operation +8000013c: 5f128fb3 sha512sig1h x31,x5,x17 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zknh_sha512sig1h_cg_cp_rs1_b5, Zknh_sha512sig1h_cg_cp_rs1_b5_str) +80000140: 00092383 lw x7,0(x18) +80000144: 01f38863 beq x7,x31,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x4aaa1bf0 +80000158: 0009a303 lw x6,0(x19) +8000015c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x91c6748e +80000160: 0009ad83 lw x27,0(x19) +80000164: 00498993 addi x19,x19,4 + +80000168 : +Zknh_sha512sig1h_cg_cp_rs1_b6: + sha512sig1h x5, x6, x27 # perform operation +80000168: 5fb302b3 sha512sig1h x5,x6,x27 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zknh_sha512sig1h_cg_cp_rs1_b6, Zknh_sha512sig1h_cg_cp_rs1_b6_str) +8000016c: 00092383 lw x7,0(x18) +80000170: 00538863 beq x7,x5,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009140 .word 0x80009140 +80000180: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x4901acf0 +8000018c: 0009a383 lw x7,0(x19) +80000190: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs2: x25 = 0xe1f04b34 +80000194: 0009ac83 lw x25,0(x19) +80000198: 00498993 addi x19,x19,4 + +8000019c : +Zknh_sha512sig1h_cg_cp_rs1_b7: + sha512sig1h x11, x7, x25 # perform operation +8000019c: 5f9385b3 sha512sig1h x11,x7,x25 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zknh_sha512sig1h_cg_cp_rs1_b7, Zknh_sha512sig1h_cg_cp_rs1_b7_str) +800001a0: 00092203 lw x4,0(x18) +800001a4: 00b20863 beq x4,x11,800001b4 +800001a8: 358052ef jal x5,80005500 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009178 .word 0x80009178 +800001b4: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0x0aa9be4b +800001b8: 0009a403 lw x8,0(x19) +800001bc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x411c1cda +800001c0: 0009a803 lw x16,0(x19) +800001c4: 00498993 addi x19,x19,4 + +800001c8 : +Zknh_sha512sig1h_cg_cp_rs1_b8: + sha512sig1h x11, x8, x16 # perform operation +800001c8: 5f0405b3 sha512sig1h x11,x8,x16 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zknh_sha512sig1h_cg_cp_rs1_b8, Zknh_sha512sig1h_cg_cp_rs1_b8_str) +800001cc: 00092203 lw x4,0(x18) +800001d0: 00b20863 beq x4,x11,800001e0 +800001d4: 32c052ef jal x5,80005500 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 800091b0 .word 0x800091b0 +800001e0: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x429fadaf +800001e4: 0009a483 lw x9,0(x19) +800001e8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x3683001d +800001ec: 0009a883 lw x17,0(x19) +800001f0: 00498993 addi x19,x19,4 + +800001f4 : +Zknh_sha512sig1h_cg_cp_rs1_b9: + sha512sig1h x3, x9, x17 # perform operation +800001f4: 5f1481b3 sha512sig1h x3,x9,x17 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zknh_sha512sig1h_cg_cp_rs1_b9, Zknh_sha512sig1h_cg_cp_rs1_b9_str) +800001f8: 00092203 lw x4,0(x18) +800001fc: 00320863 beq x4,x3,8000020c +80000200: 300052ef jal x5,80005500 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091e8 .word 0x800091e8 +8000020c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x9e55d843 +80000210: 0009a503 lw x10,0(x19) +80000214: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xe23b556f +80000218: 0009a083 lw x1,0(x19) +8000021c: 00498993 addi x19,x19,4 + +80000220 : +Zknh_sha512sig1h_cg_cp_rs1_b10: + sha512sig1h x21, x10, x1 # perform operation +80000220: 5e150ab3 sha512sig1h x21,x10,x1 + # Check if x21 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x21, Zknh_sha512sig1h_cg_cp_rs1_b10, Zknh_sha512sig1h_cg_cp_rs1_b10_str) +80000224: 00092203 lw x4,0(x18) +80000228: 01520863 beq x4,x21,80000238 +8000022c: 2d4052ef jal x5,80005500 +80000230: 80000220 .word 0x80000220 +80000234: 80009221 .word 0x80009221 +80000238: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x455a7895 +8000023c: 0009a583 lw x11,0(x19) +80000240: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x07ce4c5b +80000244: 0009ae03 lw x28,0(x19) +80000248: 00498993 addi x19,x19,4 + +8000024c : +Zknh_sha512sig1h_cg_cp_rs1_b11: + sha512sig1h x12, x11, x28 # perform operation +8000024c: 5fc58633 sha512sig1h x12,x11,x28 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zknh_sha512sig1h_cg_cp_rs1_b11, Zknh_sha512sig1h_cg_cp_rs1_b11_str) +80000250: 00092203 lw x4,0(x18) +80000254: 00c20863 beq x4,x12,80000264 +80000258: 2a8052ef jal x5,80005500 +8000025c: 8000024c .word 0x8000024c +80000260: 8000925b .word 0x8000925b +80000264: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x78641ef5 +80000268: 0009a603 lw x12,0(x19) +8000026c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0xd3982dbc +80000270: 0009a403 lw x8,0(x19) +80000274: 00498993 addi x19,x19,4 + +80000278 : +Zknh_sha512sig1h_cg_cp_rs1_b12: + sha512sig1h x28, x12, x8 # perform operation +80000278: 5e860e33 sha512sig1h x28,x12,x8 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zknh_sha512sig1h_cg_cp_rs1_b12, Zknh_sha512sig1h_cg_cp_rs1_b12_str) +8000027c: 00092203 lw x4,0(x18) +80000280: 01c20863 beq x4,x28,80000290 +80000284: 27c052ef jal x5,80005500 +80000288: 80000278 .word 0x80000278 +8000028c: 80009295 .word 0x80009295 +80000290: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x33e1a596 +80000294: 0009a683 lw x13,0(x19) +80000298: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xa221739d +8000029c: 0009ad83 lw x27,0(x19) +800002a0: 00498993 addi x19,x19,4 + +800002a4 : +Zknh_sha512sig1h_cg_cp_rs1_b13: + sha512sig1h x6, x13, x27 # perform operation +800002a4: 5fb68333 sha512sig1h x6,x13,x27 + # Check if x6 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x6, Zknh_sha512sig1h_cg_cp_rs1_b13, Zknh_sha512sig1h_cg_cp_rs1_b13_str) +800002a8: 00092203 lw x4,0(x18) +800002ac: 00620863 beq x4,x6,800002bc +800002b0: 250052ef jal x5,80005500 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 800092cf .word 0x800092cf +800002bc: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x0edf9438 +800002c0: 0009a703 lw x14,0(x19) +800002c4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xbec8ca86 +800002c8: 0009a803 lw x16,0(x19) +800002cc: 00498993 addi x19,x19,4 + +800002d0 : +Zknh_sha512sig1h_cg_cp_rs1_b14: + sha512sig1h x3, x14, x16 # perform operation +800002d0: 5f0701b3 sha512sig1h x3,x14,x16 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zknh_sha512sig1h_cg_cp_rs1_b14, Zknh_sha512sig1h_cg_cp_rs1_b14_str) +800002d4: 00092203 lw x4,0(x18) +800002d8: 00320863 beq x4,x3,800002e8 +800002dc: 224052ef jal x5,80005500 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 80009309 .word 0x80009309 +800002e8: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x48c75c4b +800002ec: 0009a783 lw x15,0(x19) +800002f0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xd58dca4e +800002f4: 0009a583 lw x11,0(x19) +800002f8: 00498993 addi x19,x19,4 + +800002fc : +Zknh_sha512sig1h_cg_cp_rs1_b15: + sha512sig1h x1, x15, x11 # perform operation +800002fc: 5eb780b3 sha512sig1h x1,x15,x11 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zknh_sha512sig1h_cg_cp_rs1_b15, Zknh_sha512sig1h_cg_cp_rs1_b15_str) +80000300: 00092203 lw x4,0(x18) +80000304: 00120863 beq x4,x1,80000314 +80000308: 1f8052ef jal x5,80005500 +8000030c: 800002fc .word 0x800002fc +80000310: 80009343 .word 0x80009343 +80000314: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x497341cb +80000318: 0009a803 lw x16,0(x19) +8000031c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs2: x23 = 0x4407c380 +80000320: 0009ab83 lw x23,0(x19) +80000324: 00498993 addi x19,x19,4 + +80000328 : +Zknh_sha512sig1h_cg_cp_rs1_b16: + sha512sig1h x8, x16, x23 # perform operation +80000328: 5f780433 sha512sig1h x8,x16,x23 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknh_sha512sig1h_cg_cp_rs1_b16, Zknh_sha512sig1h_cg_cp_rs1_b16_str) +8000032c: 00092203 lw x4,0(x18) +80000330: 00820863 beq x4,x8,80000340 +80000334: 1cc052ef jal x5,80005500 +80000338: 80000328 .word 0x80000328 +8000033c: 8000937d .word 0x8000937d +80000340: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x453baee8 +80000344: 0009a883 lw x17,0(x19) +80000348: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x719fca33 +8000034c: 0009a303 lw x6,0(x19) +80000350: 00498993 addi x19,x19,4 + +80000354 : +Zknh_sha512sig1h_cg_cp_rs1_b17: + sha512sig1h x9, x17, x6 # perform operation +80000354: 5e6884b3 sha512sig1h x9,x17,x6 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zknh_sha512sig1h_cg_cp_rs1_b17, Zknh_sha512sig1h_cg_cp_rs1_b17_str) +80000358: 00092203 lw x4,0(x18) +8000035c: 00920863 beq x4,x9,8000036c +80000360: 1a0052ef jal x5,80005500 +80000364: 80000354 .word 0x80000354 +80000368: 800093b7 .word 0x800093b7 +8000036c: 00490913 addi x18,x18,4 + + mv x15, x18 # switch signature pointer register to avoid conflict with test +80000370: 00090793 addi x15,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xb1cfa138 +80000374: 0009a903 lw x18,0(x19) +80000378: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x8e8ec68f +8000037c: 0009a083 lw x1,0(x19) +80000380: 00498993 addi x19,x19,4 + +80000384 : +Zknh_sha512sig1h_cg_cp_rs1_b18: + sha512sig1h x25, x18, x1 # perform operation +80000384: 5e190cb3 sha512sig1h x25,x18,x1 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sig1h_cg_cp_rs1_b18, Zknh_sha512sig1h_cg_cp_rs1_b18_str) +80000388: 0007a203 lw x4,0(x15) +8000038c: 01920863 beq x4,x25,8000039c +80000390: 170052ef jal x5,80005500 +80000394: 80000384 .word 0x80000384 +80000398: 800093f1 .word 0x800093f1 +8000039c: 00478793 addi x15,x15,4 + + mv x24, x19 # switch data pointer register to avoid conflict with test +800003a0: 00098c13 addi x24,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x3c9ffbae +800003a4: 000c2983 lw x19,0(x24) +800003a8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x94189be3 +800003ac: 000c2a03 lw x20,0(x24) +800003b0: 004c0c13 addi x24,x24,4 + +800003b4 : +Zknh_sha512sig1h_cg_cp_rs1_b19: + sha512sig1h x16, x19, x20 # perform operation +800003b4: 5f498833 sha512sig1h x16,x19,x20 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknh_sha512sig1h_cg_cp_rs1_b19, Zknh_sha512sig1h_cg_cp_rs1_b19_str) +800003b8: 0007a203 lw x4,0(x15) +800003bc: 01020863 beq x4,x16,800003cc +800003c0: 140052ef jal x5,80005500 +800003c4: 800003b4 .word 0x800003b4 +800003c8: 8000942b .word 0x8000942b +800003cc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x7cc0e647 +800003d0: 000c2a03 lw x20,0(x24) +800003d4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x390c0ce8 +800003d8: 000c2b03 lw x22,0(x24) +800003dc: 004c0c13 addi x24,x24,4 + +800003e0 : +Zknh_sha512sig1h_cg_cp_rs1_b20: + sha512sig1h x6, x20, x22 # perform operation +800003e0: 5f6a0333 sha512sig1h x6,x20,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sig1h_cg_cp_rs1_b20, Zknh_sha512sig1h_cg_cp_rs1_b20_str) +800003e4: 0007a203 lw x4,0(x15) +800003e8: 00620863 beq x4,x6,800003f8 +800003ec: 114052ef jal x5,80005500 +800003f0: 800003e0 .word 0x800003e0 +800003f4: 80009465 .word 0x80009465 +800003f8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x5632a332 +800003fc: 000c2a83 lw x21,0(x24) +80000400: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x1af27e46 +80000404: 000c2403 lw x8,0(x24) +80000408: 004c0c13 addi x24,x24,4 + +8000040c : +Zknh_sha512sig1h_cg_cp_rs1_b21: + sha512sig1h x29, x21, x8 # perform operation +8000040c: 5e8a8eb3 sha512sig1h x29,x21,x8 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sig1h_cg_cp_rs1_b21, Zknh_sha512sig1h_cg_cp_rs1_b21_str) +80000410: 0007a203 lw x4,0(x15) +80000414: 01d20863 beq x4,x29,80000424 +80000418: 0e8052ef jal x5,80005500 +8000041c: 8000040c .word 0x8000040c +80000420: 8000949f .word 0x8000949f +80000424: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x1d675362 +80000428: 000c2b03 lw x22,0(x24) +8000042c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0xcd756d0d +80000430: 000c2f03 lw x30,0(x24) +80000434: 004c0c13 addi x24,x24,4 + +80000438 : +Zknh_sha512sig1h_cg_cp_rs1_b22: + sha512sig1h x17, x22, x30 # perform operation +80000438: 5feb08b3 sha512sig1h x17,x22,x30 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sig1h_cg_cp_rs1_b22, Zknh_sha512sig1h_cg_cp_rs1_b22_str) +8000043c: 0007a203 lw x4,0(x15) +80000440: 01120863 beq x4,x17,80000450 +80000444: 0bc052ef jal x5,80005500 +80000448: 80000438 .word 0x80000438 +8000044c: 800094d9 .word 0x800094d9 +80000450: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x3aa23fee +80000454: 000c2b83 lw x23,0(x24) +80000458: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0xc8fe1963 +8000045c: 000c2d03 lw x26,0(x24) +80000460: 004c0c13 addi x24,x24,4 + +80000464 : +Zknh_sha512sig1h_cg_cp_rs1_b23: + sha512sig1h x18, x23, x26 # perform operation +80000464: 5fab8933 sha512sig1h x18,x23,x26 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknh_sha512sig1h_cg_cp_rs1_b23, Zknh_sha512sig1h_cg_cp_rs1_b23_str) +80000468: 0007a203 lw x4,0(x15) +8000046c: 01220863 beq x4,x18,8000047c +80000470: 090052ef jal x5,80005500 +80000474: 80000464 .word 0x80000464 +80000478: 80009513 .word 0x80009513 +8000047c: 00478793 addi x15,x15,4 + + mv x22, x24 # switch data pointer register to avoid conflict with test +80000480: 000c0b13 addi x22,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x1272fab9 +80000484: 000b2c03 lw x24,0(x22) +80000488: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x13f674d1 +8000048c: 000b2403 lw x8,0(x22) +80000490: 004b0b13 addi x22,x22,4 + +80000494 : +Zknh_sha512sig1h_cg_cp_rs1_b24: + sha512sig1h x28, x24, x8 # perform operation +80000494: 5e8c0e33 sha512sig1h x28,x24,x8 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sig1h_cg_cp_rs1_b24, Zknh_sha512sig1h_cg_cp_rs1_b24_str) +80000498: 0007a203 lw x4,0(x15) +8000049c: 01c20863 beq x4,x28,800004ac +800004a0: 060052ef jal x5,80005500 +800004a4: 80000494 .word 0x80000494 +800004a8: 8000954d .word 0x8000954d +800004ac: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x7b9d3e04 +800004b0: 000b2c83 lw x25,0(x22) +800004b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0xa6b66e94 +800004b8: 000b2e03 lw x28,0(x22) +800004bc: 004b0b13 addi x22,x22,4 + +800004c0 : +Zknh_sha512sig1h_cg_cp_rs1_b25: + sha512sig1h x3, x25, x28 # perform operation +800004c0: 5fcc81b3 sha512sig1h x3,x25,x28 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sig1h_cg_cp_rs1_b25, Zknh_sha512sig1h_cg_cp_rs1_b25_str) +800004c4: 0007a203 lw x4,0(x15) +800004c8: 00320863 beq x4,x3,800004d8 +800004cc: 034052ef jal x5,80005500 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 80009587 .word 0x80009587 +800004d8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x68793474 +800004dc: 000b2d03 lw x26,0(x22) +800004e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x2b38a9c3 +800004e4: 000b2983 lw x19,0(x22) +800004e8: 004b0b13 addi x22,x22,4 + +800004ec : +Zknh_sha512sig1h_cg_cp_rs1_b26: + sha512sig1h x9, x26, x19 # perform operation +800004ec: 5f3d04b3 sha512sig1h x9,x26,x19 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sig1h_cg_cp_rs1_b26, Zknh_sha512sig1h_cg_cp_rs1_b26_str) +800004f0: 0007a203 lw x4,0(x15) +800004f4: 00920863 beq x4,x9,80000504 +800004f8: 008052ef jal x5,80005500 +800004fc: 800004ec .word 0x800004ec +80000500: 800095c1 .word 0x800095c1 +80000504: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0xc407c610 +80000508: 000b2d83 lw x27,0(x22) +8000050c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x87fe7716 +80000510: 000b2003 lw x0,0(x22) +80000514: 004b0b13 addi x22,x22,4 + +80000518 : +Zknh_sha512sig1h_cg_cp_rs1_b27: + sha512sig1h x9, x27, x0 # perform operation +80000518: 5e0d84b3 sha512sig1h x9,x27,x0 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sig1h_cg_cp_rs1_b27, Zknh_sha512sig1h_cg_cp_rs1_b27_str) +8000051c: 0007a203 lw x4,0(x15) +80000520: 00920863 beq x4,x9,80000530 +80000524: 7dd042ef jal x5,80005500 +80000528: 80000518 .word 0x80000518 +8000052c: 800095fb .word 0x800095fb +80000530: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0xd65d7dc1 +80000534: 000b2e03 lw x28,0(x22) +80000538: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x17836979 +8000053c: 000b2f03 lw x30,0(x22) +80000540: 004b0b13 addi x22,x22,4 + +80000544 : +Zknh_sha512sig1h_cg_cp_rs1_b28: + sha512sig1h x7, x28, x30 # perform operation +80000544: 5fee03b3 sha512sig1h x7,x28,x30 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sig1h_cg_cp_rs1_b28, Zknh_sha512sig1h_cg_cp_rs1_b28_str) +80000548: 0007a203 lw x4,0(x15) +8000054c: 00720863 beq x4,x7,8000055c +80000550: 7b1042ef jal x5,80005500 +80000554: 80000544 .word 0x80000544 +80000558: 80009635 .word 0x80009635 +8000055c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x7c2349a2 +80000560: 000b2e83 lw x29,0(x22) +80000564: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x6a807503 +80000568: 000b2683 lw x13,0(x22) +8000056c: 004b0b13 addi x22,x22,4 + +80000570 : +Zknh_sha512sig1h_cg_cp_rs1_b29: + sha512sig1h x2, x29, x13 # perform operation +80000570: 5ede8133 sha512sig1h x2,x29,x13 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sig1h_cg_cp_rs1_b29, Zknh_sha512sig1h_cg_cp_rs1_b29_str) +80000574: 0007a203 lw x4,0(x15) +80000578: 00220863 beq x4,x2,80000588 +8000057c: 785042ef jal x5,80005500 +80000580: 80000570 .word 0x80000570 +80000584: 8000966f .word 0x8000966f +80000588: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xd54334c6 +8000058c: 000b2f03 lw x30,0(x22) +80000590: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xd2a8730d +80000594: 000b2583 lw x11,0(x22) +80000598: 004b0b13 addi x22,x22,4 + +8000059c : +Zknh_sha512sig1h_cg_cp_rs1_b30: + sha512sig1h x8, x30, x11 # perform operation +8000059c: 5ebf0433 sha512sig1h x8,x30,x11 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sig1h_cg_cp_rs1_b30, Zknh_sha512sig1h_cg_cp_rs1_b30_str) +800005a0: 0007a203 lw x4,0(x15) +800005a4: 00820863 beq x4,x8,800005b4 +800005a8: 759042ef jal x5,80005500 +800005ac: 8000059c .word 0x8000059c +800005b0: 800096a9 .word 0x800096a9 +800005b4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xf8843a18 +800005b8: 000b2f83 lw x31,0(x22) +800005bc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs2: x28 = 0xfb55f60d +800005c0: 000b2e03 lw x28,0(x22) +800005c4: 004b0b13 addi x22,x22,4 + +800005c8 : +Zknh_sha512sig1h_cg_cp_rs1_b31: + sha512sig1h x25, x31, x28 # perform operation +800005c8: 5fcf8cb3 sha512sig1h x25,x31,x28 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sig1h_cg_cp_rs1_b31, Zknh_sha512sig1h_cg_cp_rs1_b31_str) +800005cc: 0007a203 lw x4,0(x15) +800005d0: 01920863 beq x4,x25,800005e0 +800005d4: 72d042ef jal x5,80005500 +800005d8: 800005c8 .word 0x800005c8 +800005dc: 800096e3 .word 0x800096e3 +800005e0: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x114c8a3a +800005e4: 000b2b83 lw x23,0(x22) +800005e8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0xd357e9f6 +800005ec: 000b2003 lw x0,0(x22) +800005f0: 004b0b13 addi x22,x22,4 + +800005f4 : +Zknh_sha512sig1h_cg_cp_rs2_b0: + sha512sig1h x17, x23, x0 # perform operation +800005f4: 5e0b88b3 sha512sig1h x17,x23,x0 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sig1h_cg_cp_rs2_b0, Zknh_sha512sig1h_cg_cp_rs2_b0_str) +800005f8: 0007a203 lw x4,0(x15) +800005fc: 01120863 beq x4,x17,8000060c +80000600: 701042ef jal x5,80005500 +80000604: 800005f4 .word 0x800005f4 +80000608: 8000971d .word 0x8000971d +8000060c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xdd96a068 +80000610: 000b2583 lw x11,0(x22) +80000614: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0xc94aea2f +80000618: 000b2083 lw x1,0(x22) +8000061c: 004b0b13 addi x22,x22,4 + +80000620 : +Zknh_sha512sig1h_cg_cp_rs2_b1: + sha512sig1h x29, x11, x1 # perform operation +80000620: 5e158eb3 sha512sig1h x29,x11,x1 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sig1h_cg_cp_rs2_b1, Zknh_sha512sig1h_cg_cp_rs2_b1_str) +80000624: 0007a203 lw x4,0(x15) +80000628: 01d20863 beq x4,x29,80000638 +8000062c: 6d5042ef jal x5,80005500 +80000630: 80000620 .word 0x80000620 +80000634: 80009756 .word 0x80009756 +80000638: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xc9265182 +8000063c: 000b2183 lw x3,0(x22) +80000640: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0xe5a7b5d4 +80000644: 000b2103 lw x2,0(x22) +80000648: 004b0b13 addi x22,x22,4 + +8000064c : +Zknh_sha512sig1h_cg_cp_rs2_b2: + sha512sig1h x25, x3, x2 # perform operation +8000064c: 5e218cb3 sha512sig1h x25,x3,x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sig1h_cg_cp_rs2_b2, Zknh_sha512sig1h_cg_cp_rs2_b2_str) +80000650: 0007a203 lw x4,0(x15) +80000654: 01920863 beq x4,x25,80000664 +80000658: 6a9042ef jal x5,80005500 +8000065c: 8000064c .word 0x8000064c +80000660: 8000978f .word 0x8000978f +80000664: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x331f585e +80000668: 000b2003 lw x0,0(x22) +8000066c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x34ee39cd +80000670: 000b2183 lw x3,0(x22) +80000674: 004b0b13 addi x22,x22,4 + +80000678 : +Zknh_sha512sig1h_cg_cp_rs2_b3: + sha512sig1h x2, x0, x3 # perform operation +80000678: 5e300133 sha512sig1h x2,x0,x3 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sig1h_cg_cp_rs2_b3, Zknh_sha512sig1h_cg_cp_rs2_b3_str) +8000067c: 0007a203 lw x4,0(x15) +80000680: 00220863 beq x4,x2,80000690 +80000684: 67d042ef jal x5,80005500 +80000688: 80000678 .word 0x80000678 +8000068c: 800097c8 .word 0x800097c8 +80000690: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000694: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000698: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xec37a8ed +8000069c: 000b2b83 lw x23,0(x22) +800006a0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xfdf527dc +800006a4: 000b2203 lw x4,0(x22) +800006a8: 004b0b13 addi x22,x22,4 + +800006ac : +Zknh_sha512sig1h_cg_cp_rs2_b4: + sha512sig1h x26, x23, x4 # perform operation +800006ac: 5e4b8d33 sha512sig1h x26,x23,x4 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zknh_sha512sig1h_cg_cp_rs2_b4, Zknh_sha512sig1h_cg_cp_rs2_b4_str) +800006b0: 0007a383 lw x7,0(x15) +800006b4: 01a38863 beq x7,x26,800006c4 +800006b8: 6610446f jal x8,80005518 +800006bc: 800006ac .word 0x800006ac +800006c0: 80009801 .word 0x80009801 +800006c4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x65a90161 +800006c8: 000b2703 lw x14,0(x22) +800006cc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0xd1e3b671 +800006d0: 000b2283 lw x5,0(x22) +800006d4: 004b0b13 addi x22,x22,4 + +800006d8 : +Zknh_sha512sig1h_cg_cp_rs2_b5: + sha512sig1h x2, x14, x5 # perform operation +800006d8: 5e570133 sha512sig1h x2,x14,x5 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig1h_cg_cp_rs2_b5, Zknh_sha512sig1h_cg_cp_rs2_b5_str) +800006dc: 0007a383 lw x7,0(x15) +800006e0: 00238863 beq x7,x2,800006f0 +800006e4: 6350446f jal x8,80005518 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000983a .word 0x8000983a +800006f0: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xf2bb6e5f +800006f4: 000b2103 lw x2,0(x22) +800006f8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x49500ce5 +800006fc: 000b2303 lw x6,0(x22) +80000700: 004b0b13 addi x22,x22,4 + +80000704 : +Zknh_sha512sig1h_cg_cp_rs2_b6: + sha512sig1h x4, x2, x6 # perform operation +80000704: 5e610233 sha512sig1h x4,x2,x6 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknh_sha512sig1h_cg_cp_rs2_b6, Zknh_sha512sig1h_cg_cp_rs2_b6_str) +80000708: 0007a383 lw x7,0(x15) +8000070c: 00438863 beq x7,x4,8000071c +80000710: 6090446f jal x8,80005518 +80000714: 80000704 .word 0x80000704 +80000718: 80009873 .word 0x80009873 +8000071c: 00478793 addi x15,x15,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000720: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000724: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x4b35bd82 +80000728: 000b2d83 lw x27,0(x22) +8000072c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0xd4e16e8f +80000730: 000b2383 lw x7,0(x22) +80000734: 004b0b13 addi x22,x22,4 + +80000738 : +Zknh_sha512sig1h_cg_cp_rs2_b7: + sha512sig1h x16, x27, x7 # perform operation +80000738: 5e7d8833 sha512sig1h x16,x27,x7 + # Check if x16 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x16, Zknh_sha512sig1h_cg_cp_rs2_b7, Zknh_sha512sig1h_cg_cp_rs2_b7_str) +8000073c: 0007a683 lw x13,0(x15) +80000740: 01068863 beq x13,x16,80000750 +80000744: 5fd0476f jal x14,80005540 +80000748: 80000738 .word 0x80000738 +8000074c: 800098ac .word 0x800098ac +80000750: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x831682d7 +80000754: 000b2f83 lw x31,0(x22) +80000758: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xd094d63e +8000075c: 000b2403 lw x8,0(x22) +80000760: 004b0b13 addi x22,x22,4 + +80000764 : +Zknh_sha512sig1h_cg_cp_rs2_b8: + sha512sig1h x26, x31, x8 # perform operation +80000764: 5e8f8d33 sha512sig1h x26,x31,x8 + # Check if x26 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x26, Zknh_sha512sig1h_cg_cp_rs2_b8, Zknh_sha512sig1h_cg_cp_rs2_b8_str) +80000768: 0007a683 lw x13,0(x15) +8000076c: 01a68863 beq x13,x26,8000077c +80000770: 5d10476f jal x14,80005540 +80000774: 80000764 .word 0x80000764 +80000778: 800098e5 .word 0x800098e5 +8000077c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xb8d1bfb3 +80000780: 000b2903 lw x18,0(x22) +80000784: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x66d1815e +80000788: 000b2483 lw x9,0(x22) +8000078c: 004b0b13 addi x22,x22,4 + +80000790 : +Zknh_sha512sig1h_cg_cp_rs2_b9: + sha512sig1h x26, x18, x9 # perform operation +80000790: 5e990d33 sha512sig1h x26,x18,x9 + # Check if x26 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x26, Zknh_sha512sig1h_cg_cp_rs2_b9, Zknh_sha512sig1h_cg_cp_rs2_b9_str) +80000794: 0007a683 lw x13,0(x15) +80000798: 01a68863 beq x13,x26,800007a8 +8000079c: 5a50476f jal x14,80005540 +800007a0: 80000790 .word 0x80000790 +800007a4: 8000991e .word 0x8000991e +800007a8: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xbfe4cb2b +800007ac: 000b2a83 lw x21,0(x22) +800007b0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x091eadd9 +800007b4: 000b2503 lw x10,0(x22) +800007b8: 004b0b13 addi x22,x22,4 + +800007bc : +Zknh_sha512sig1h_cg_cp_rs2_b10: + sha512sig1h x30, x21, x10 # perform operation +800007bc: 5eaa8f33 sha512sig1h x30,x21,x10 + # Check if x30 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x30, Zknh_sha512sig1h_cg_cp_rs2_b10, Zknh_sha512sig1h_cg_cp_rs2_b10_str) +800007c0: 0007a683 lw x13,0(x15) +800007c4: 01e68863 beq x13,x30,800007d4 +800007c8: 5790476f jal x14,80005540 +800007cc: 800007bc .word 0x800007bc +800007d0: 80009957 .word 0x80009957 +800007d4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0xf6931e60 +800007d8: 000b2b83 lw x23,0(x22) +800007dc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xad90919a +800007e0: 000b2583 lw x11,0(x22) +800007e4: 004b0b13 addi x22,x22,4 + +800007e8 : +Zknh_sha512sig1h_cg_cp_rs2_b11: + sha512sig1h x2, x23, x11 # perform operation +800007e8: 5ebb8133 sha512sig1h x2,x23,x11 + # Check if x2 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x2, Zknh_sha512sig1h_cg_cp_rs2_b11, Zknh_sha512sig1h_cg_cp_rs2_b11_str) +800007ec: 0007a683 lw x13,0(x15) +800007f0: 00268863 beq x13,x2,80000800 +800007f4: 54d0476f jal x14,80005540 +800007f8: 800007e8 .word 0x800007e8 +800007fc: 80009991 .word 0x80009991 +80000800: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xe661108d +80000804: 000b2a83 lw x21,0(x22) +80000808: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xcddc15c6 +8000080c: 000b2603 lw x12,0(x22) +80000810: 004b0b13 addi x22,x22,4 + +80000814 : +Zknh_sha512sig1h_cg_cp_rs2_b12: + sha512sig1h x8, x21, x12 # perform operation +80000814: 5eca8433 sha512sig1h x8,x21,x12 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zknh_sha512sig1h_cg_cp_rs2_b12, Zknh_sha512sig1h_cg_cp_rs2_b12_str) +80000818: 0007a683 lw x13,0(x15) +8000081c: 00868863 beq x13,x8,8000082c +80000820: 5210476f jal x14,80005540 +80000824: 80000814 .word 0x80000814 +80000828: 800099cb .word 0x800099cb +8000082c: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000830: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000834: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xe6750391 +80000838: 000b2503 lw x10,0(x22) +8000083c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x0f441793 +80000840: 000b2683 lw x13,0(x22) +80000844: 004b0b13 addi x22,x22,4 + +80000848 : +Zknh_sha512sig1h_cg_cp_rs2_b13: + sha512sig1h x23, x10, x13 # perform operation +80000848: 5ed50bb3 sha512sig1h x23,x10,x13 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zknh_sha512sig1h_cg_cp_rs2_b13, Zknh_sha512sig1h_cg_cp_rs2_b13_str) +8000084c: 0007a383 lw x7,0(x15) +80000850: 01738863 beq x7,x23,80000860 +80000854: 4c50446f jal x8,80005518 +80000858: 80000848 .word 0x80000848 +8000085c: 80009a05 .word 0x80009a05 +80000860: 00478793 addi x15,x15,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x2bb57048 +80000864: 000b2883 lw x17,0(x22) +80000868: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xf2880f9e +8000086c: 000b2703 lw x14,0(x22) +80000870: 004b0b13 addi x22,x22,4 + +80000874 : +Zknh_sha512sig1h_cg_cp_rs2_b14: + sha512sig1h x2, x17, x14 # perform operation +80000874: 5ee88133 sha512sig1h x2,x17,x14 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknh_sha512sig1h_cg_cp_rs2_b14, Zknh_sha512sig1h_cg_cp_rs2_b14_str) +80000878: 0007a383 lw x7,0(x15) +8000087c: 00238863 beq x7,x2,8000088c +80000880: 4990446f jal x8,80005518 +80000884: 80000874 .word 0x80000874 +80000888: 80009a3f .word 0x80009a3f +8000088c: 00478793 addi x15,x15,4 + + mv x17, x15 # switch signature pointer register to avoid conflict with test +80000890: 00078893 addi x17,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x03449118 +80000894: 000b2983 lw x19,0(x22) +80000898: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x60309357 +8000089c: 000b2783 lw x15,0(x22) +800008a0: 004b0b13 addi x22,x22,4 + +800008a4 : +Zknh_sha512sig1h_cg_cp_rs2_b15: + sha512sig1h x10, x19, x15 # perform operation +800008a4: 5ef98533 sha512sig1h x10,x19,x15 + # Check if x10 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x10, Zknh_sha512sig1h_cg_cp_rs2_b15, Zknh_sha512sig1h_cg_cp_rs2_b15_str) +800008a8: 0008a383 lw x7,0(x17) +800008ac: 00a38863 beq x7,x10,800008bc +800008b0: 4690446f jal x8,80005518 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 80009a79 .word 0x80009a79 +800008bc: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x4ff86729 +800008c0: 000b2503 lw x10,0(x22) +800008c4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xb164639f +800008c8: 000b2803 lw x16,0(x22) +800008cc: 004b0b13 addi x22,x22,4 + +800008d0 : +Zknh_sha512sig1h_cg_cp_rs2_b16: + sha512sig1h x2, x10, x16 # perform operation +800008d0: 5f050133 sha512sig1h x2,x10,x16 + # Check if x2 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x2, Zknh_sha512sig1h_cg_cp_rs2_b16, Zknh_sha512sig1h_cg_cp_rs2_b16_str) +800008d4: 0008a383 lw x7,0(x17) +800008d8: 00238863 beq x7,x2,800008e8 +800008dc: 43d0446f jal x8,80005518 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 80009ab3 .word 0x80009ab3 +800008e8: 00488893 addi x17,x17,4 + + mv x21, x17 # switch signature pointer register to avoid conflict with test +800008ec: 00088a93 addi x21,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xa529a38a +800008f0: 000b2183 lw x3,0(x22) +800008f4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x1300ce20 +800008f8: 000b2883 lw x17,0(x22) +800008fc: 004b0b13 addi x22,x22,4 + +80000900 : +Zknh_sha512sig1h_cg_cp_rs2_b17: + sha512sig1h x6, x3, x17 # perform operation +80000900: 5f118333 sha512sig1h x6,x3,x17 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zknh_sha512sig1h_cg_cp_rs2_b17, Zknh_sha512sig1h_cg_cp_rs2_b17_str) +80000904: 000aa383 lw x7,0(x21) +80000908: 00638863 beq x7,x6,80000918 +8000090c: 40d0446f jal x8,80005518 +80000910: 80000900 .word 0x80000900 +80000914: 80009aed .word 0x80009aed +80000918: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0xf1aab138 +8000091c: 000b2803 lw x16,0(x22) +80000920: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xc7211578 +80000924: 000b2903 lw x18,0(x22) +80000928: 004b0b13 addi x22,x22,4 + +8000092c : +Zknh_sha512sig1h_cg_cp_rs2_b18: + sha512sig1h x29, x16, x18 # perform operation +8000092c: 5f280eb3 sha512sig1h x29,x16,x18 + # Check if x29 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rs2_b18, Zknh_sha512sig1h_cg_cp_rs2_b18_str) +80000930: 000aa383 lw x7,0(x21) +80000934: 01d38863 beq x7,x29,80000944 +80000938: 3e10446f jal x8,80005518 +8000093c: 8000092c .word 0x8000092c +80000940: 80009b27 .word 0x80009b27 +80000944: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xb6f9e080 +80000948: 000b2703 lw x14,0(x22) +8000094c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xb1351912 +80000950: 000b2983 lw x19,0(x22) +80000954: 004b0b13 addi x22,x22,4 + +80000958 : +Zknh_sha512sig1h_cg_cp_rs2_b19: + sha512sig1h x23, x14, x19 # perform operation +80000958: 5f370bb3 sha512sig1h x23,x14,x19 + # Check if x23 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x23, Zknh_sha512sig1h_cg_cp_rs2_b19, Zknh_sha512sig1h_cg_cp_rs2_b19_str) +8000095c: 000aa383 lw x7,0(x21) +80000960: 01738863 beq x7,x23,80000970 +80000964: 3b50446f jal x8,80005518 +80000968: 80000958 .word 0x80000958 +8000096c: 80009b61 .word 0x80009b61 +80000970: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x919ad9f7 +80000974: 000b2803 lw x16,0(x22) +80000978: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x4d15fa91 +8000097c: 000b2a03 lw x20,0(x22) +80000980: 004b0b13 addi x22,x22,4 + +80000984 : +Zknh_sha512sig1h_cg_cp_rs2_b20: + sha512sig1h x17, x16, x20 # perform operation +80000984: 5f4808b3 sha512sig1h x17,x16,x20 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zknh_sha512sig1h_cg_cp_rs2_b20, Zknh_sha512sig1h_cg_cp_rs2_b20_str) +80000988: 000aa383 lw x7,0(x21) +8000098c: 01138863 beq x7,x17,8000099c +80000990: 3890446f jal x8,80005518 +80000994: 80000984 .word 0x80000984 +80000998: 80009b9b .word 0x80009b9b +8000099c: 004a8a93 addi x21,x21,4 + + mv x10, x21 # switch signature pointer register to avoid conflict with test +800009a0: 000a8513 addi x10,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x47f97c2b +800009a4: 000b2283 lw x5,0(x22) +800009a8: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x7f753878 +800009ac: 000b2a83 lw x21,0(x22) +800009b0: 004b0b13 addi x22,x22,4 + +800009b4 : +Zknh_sha512sig1h_cg_cp_rs2_b21: + sha512sig1h x19, x5, x21 # perform operation +800009b4: 5f5289b3 sha512sig1h x19,x5,x21 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknh_sha512sig1h_cg_cp_rs2_b21, Zknh_sha512sig1h_cg_cp_rs2_b21_str) +800009b8: 00052383 lw x7,0(x10) +800009bc: 01338863 beq x7,x19,800009cc +800009c0: 3590446f jal x8,80005518 +800009c4: 800009b4 .word 0x800009b4 +800009c8: 80009bd5 .word 0x80009bd5 +800009cc: 00450513 addi x10,x10,4 + + mv x3, x22 # switch data pointer register to avoid conflict with test +800009d0: 000b0193 addi x3,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xda9b31b9 +800009d4: 0001ac83 lw x25,0(x3) +800009d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xbcd6664e +800009dc: 0001ab03 lw x22,0(x3) +800009e0: 00418193 addi x3,x3,4 + +800009e4 : +Zknh_sha512sig1h_cg_cp_rs2_b22: + sha512sig1h x27, x25, x22 # perform operation +800009e4: 5f6c8db3 sha512sig1h x27,x25,x22 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknh_sha512sig1h_cg_cp_rs2_b22, Zknh_sha512sig1h_cg_cp_rs2_b22_str) +800009e8: 00052383 lw x7,0(x10) +800009ec: 01b38863 beq x7,x27,800009fc +800009f0: 3290446f jal x8,80005518 +800009f4: 800009e4 .word 0x800009e4 +800009f8: 80009c0f .word 0x80009c0f +800009fc: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x6b2e0b48 +80000a00: 0001a883 lw x17,0(x3) +80000a04: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x41c6e2ee +80000a08: 0001ab83 lw x23,0(x3) +80000a0c: 00418193 addi x3,x3,4 + +80000a10 : +Zknh_sha512sig1h_cg_cp_rs2_b23: + sha512sig1h x25, x17, x23 # perform operation +80000a10: 5f788cb3 sha512sig1h x25,x17,x23 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zknh_sha512sig1h_cg_cp_rs2_b23, Zknh_sha512sig1h_cg_cp_rs2_b23_str) +80000a14: 00052383 lw x7,0(x10) +80000a18: 01938863 beq x7,x25,80000a28 +80000a1c: 2fd0446f jal x8,80005518 +80000a20: 80000a10 .word 0x80000a10 +80000a24: 80009c49 .word 0x80009c49 +80000a28: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x23475421 +80000a2c: 0001ae03 lw x28,0(x3) +80000a30: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x70886222 +80000a34: 0001ac03 lw x24,0(x3) +80000a38: 00418193 addi x3,x3,4 + +80000a3c : +Zknh_sha512sig1h_cg_cp_rs2_b24: + sha512sig1h x30, x28, x24 # perform operation +80000a3c: 5f8e0f33 sha512sig1h x30,x28,x24 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknh_sha512sig1h_cg_cp_rs2_b24, Zknh_sha512sig1h_cg_cp_rs2_b24_str) +80000a40: 00052383 lw x7,0(x10) +80000a44: 01e38863 beq x7,x30,80000a54 +80000a48: 2d10446f jal x8,80005518 +80000a4c: 80000a3c .word 0x80000a3c +80000a50: 80009c83 .word 0x80009c83 +80000a54: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x4ede834f +80000a58: 0001ad03 lw x26,0(x3) +80000a5c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xa9610448 +80000a60: 0001ac83 lw x25,0(x3) +80000a64: 00418193 addi x3,x3,4 + +80000a68 : +Zknh_sha512sig1h_cg_cp_rs2_b25: + sha512sig1h x19, x26, x25 # perform operation +80000a68: 5f9d09b3 sha512sig1h x19,x26,x25 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknh_sha512sig1h_cg_cp_rs2_b25, Zknh_sha512sig1h_cg_cp_rs2_b25_str) +80000a6c: 00052383 lw x7,0(x10) +80000a70: 01338863 beq x7,x19,80000a80 +80000a74: 2a50446f jal x8,80005518 +80000a78: 80000a68 .word 0x80000a68 +80000a7c: 80009cbd .word 0x80009cbd +80000a80: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xa389d658 +80000a84: 0001ac03 lw x24,0(x3) +80000a88: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x6c08fadb +80000a8c: 0001ad03 lw x26,0(x3) +80000a90: 00418193 addi x3,x3,4 + +80000a94 : +Zknh_sha512sig1h_cg_cp_rs2_b26: + sha512sig1h x5, x24, x26 # perform operation +80000a94: 5fac02b3 sha512sig1h x5,x24,x26 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknh_sha512sig1h_cg_cp_rs2_b26, Zknh_sha512sig1h_cg_cp_rs2_b26_str) +80000a98: 00052383 lw x7,0(x10) +80000a9c: 00538863 beq x7,x5,80000aac +80000aa0: 2790446f jal x8,80005518 +80000aa4: 80000a94 .word 0x80000a94 +80000aa8: 80009cf7 .word 0x80009cf7 +80000aac: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xbcaaad95 +80000ab0: 0001aa83 lw x21,0(x3) +80000ab4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x679a3054 +80000ab8: 0001ad83 lw x27,0(x3) +80000abc: 00418193 addi x3,x3,4 + +80000ac0 : +Zknh_sha512sig1h_cg_cp_rs2_b27: + sha512sig1h x29, x21, x27 # perform operation +80000ac0: 5fba8eb3 sha512sig1h x29,x21,x27 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rs2_b27, Zknh_sha512sig1h_cg_cp_rs2_b27_str) +80000ac4: 00052383 lw x7,0(x10) +80000ac8: 01d38863 beq x7,x29,80000ad8 +80000acc: 24d0446f jal x8,80005518 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 80009d31 .word 0x80009d31 +80000ad8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x504ac3ab +80000adc: 0001a703 lw x14,0(x3) +80000ae0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x944d7c66 +80000ae4: 0001ae03 lw x28,0(x3) +80000ae8: 00418193 addi x3,x3,4 + +80000aec : +Zknh_sha512sig1h_cg_cp_rs2_b28: + sha512sig1h x20, x14, x28 # perform operation +80000aec: 5fc70a33 sha512sig1h x20,x14,x28 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknh_sha512sig1h_cg_cp_rs2_b28, Zknh_sha512sig1h_cg_cp_rs2_b28_str) +80000af0: 00052383 lw x7,0(x10) +80000af4: 01438863 beq x7,x20,80000b04 +80000af8: 2210446f jal x8,80005518 +80000afc: 80000aec .word 0x80000aec +80000b00: 80009d6b .word 0x80009d6b +80000b04: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xe93d8c4b +80000b08: 0001a003 lw x0,0(x3) +80000b0c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x2eed605e +80000b10: 0001ae83 lw x29,0(x3) +80000b14: 00418193 addi x3,x3,4 + +80000b18 : +Zknh_sha512sig1h_cg_cp_rs2_b29: + sha512sig1h x21, x0, x29 # perform operation +80000b18: 5fd00ab3 sha512sig1h x21,x0,x29 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknh_sha512sig1h_cg_cp_rs2_b29, Zknh_sha512sig1h_cg_cp_rs2_b29_str) +80000b1c: 00052383 lw x7,0(x10) +80000b20: 01538863 beq x7,x21,80000b30 +80000b24: 1f50446f jal x8,80005518 +80000b28: 80000b18 .word 0x80000b18 +80000b2c: 80009da5 .word 0x80009da5 +80000b30: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x751ac924 +80000b34: 0001a683 lw x13,0(x3) +80000b38: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x5a815100 +80000b3c: 0001af03 lw x30,0(x3) +80000b40: 00418193 addi x3,x3,4 + +80000b44 : +Zknh_sha512sig1h_cg_cp_rs2_b30: + sha512sig1h x11, x13, x30 # perform operation +80000b44: 5fe685b3 sha512sig1h x11,x13,x30 + # Check if x11 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x11, Zknh_sha512sig1h_cg_cp_rs2_b30, Zknh_sha512sig1h_cg_cp_rs2_b30_str) +80000b48: 00052383 lw x7,0(x10) +80000b4c: 00b38863 beq x7,x11,80000b5c +80000b50: 1c90446f jal x8,80005518 +80000b54: 80000b44 .word 0x80000b44 +80000b58: 80009ddf .word 0x80009ddf +80000b5c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x2c22d00e +80000b60: 0001a103 lw x2,0(x3) +80000b64: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x12e93f1c +80000b68: 0001af83 lw x31,0(x3) +80000b6c: 00418193 addi x3,x3,4 + +80000b70 : +Zknh_sha512sig1h_cg_cp_rs2_b31: + sha512sig1h x12, x2, x31 # perform operation +80000b70: 5ff10633 sha512sig1h x12,x2,x31 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknh_sha512sig1h_cg_cp_rs2_b31, Zknh_sha512sig1h_cg_cp_rs2_b31_str) +80000b74: 00052383 lw x7,0(x10) +80000b78: 00c38863 beq x7,x12,80000b88 +80000b7c: 19d0446f jal x8,80005518 +80000b80: 80000b70 .word 0x80000b70 +80000b84: 80009e19 .word 0x80009e19 +80000b88: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x1940e0c2 +80000b8c: 0001ac83 lw x25,0(x3) +80000b90: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x79991df5 +80000b94: 0001ad03 lw x26,0(x3) +80000b98: 00418193 addi x3,x3,4 + +80000b9c : +Zknh_sha512sig1h_cg_cp_rd_b0: + sha512sig1h x0, x25, x26 # perform operation +80000b9c: 5fac8033 sha512sig1h x0,x25,x26 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zknh_sha512sig1h_cg_cp_rd_b0, Zknh_sha512sig1h_cg_cp_rd_b0_str) +80000ba0: 00052383 lw x7,0(x10) +80000ba4: 00038863 beq x7,x0,80000bb4 +80000ba8: 1710446f jal x8,80005518 +80000bac: 80000b9c .word 0x80000b9c +80000bb0: 80009e53 .word 0x80009e53 +80000bb4: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x20151719 +80000bb8: 0001a303 lw x6,0(x3) +80000bbc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x7e5b330a +80000bc0: 0001a283 lw x5,0(x3) +80000bc4: 00418193 addi x3,x3,4 + +80000bc8 : +Zknh_sha512sig1h_cg_cp_rd_b1: + sha512sig1h x1, x6, x5 # perform operation +80000bc8: 5e5300b3 sha512sig1h x1,x6,x5 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zknh_sha512sig1h_cg_cp_rd_b1, Zknh_sha512sig1h_cg_cp_rd_b1_str) +80000bcc: 00052383 lw x7,0(x10) +80000bd0: 00138863 beq x7,x1,80000be0 +80000bd4: 1450446f jal x8,80005518 +80000bd8: 80000bc8 .word 0x80000bc8 +80000bdc: 80009e8b .word 0x80009e8b +80000be0: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x216771df +80000be4: 0001a903 lw x18,0(x3) +80000be8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xc20470e7 +80000bec: 0001af83 lw x31,0(x3) +80000bf0: 00418193 addi x3,x3,4 + +80000bf4 : +Zknh_sha512sig1h_cg_cp_rd_b2: + sha512sig1h x2, x18, x31 # perform operation +80000bf4: 5ff90133 sha512sig1h x2,x18,x31 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknh_sha512sig1h_cg_cp_rd_b2, Zknh_sha512sig1h_cg_cp_rd_b2_str) +80000bf8: 00052383 lw x7,0(x10) +80000bfc: 00238863 beq x7,x2,80000c0c +80000c00: 1190446f jal x8,80005518 +80000c04: 80000bf4 .word 0x80000bf4 +80000c08: 80009ec3 .word 0x80009ec3 +80000c0c: 00450513 addi x10,x10,4 + + mv x31, x3 # switch data pointer register to avoid conflict with test +80000c10: 00018f93 addi x31,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xf6aeefbc +80000c14: 000fa883 lw x17,0(x31) +80000c18: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x8786e3df +80000c1c: 000fac83 lw x25,0(x31) +80000c20: 004f8f93 addi x31,x31,4 + +80000c24 : +Zknh_sha512sig1h_cg_cp_rd_b3: + sha512sig1h x3, x17, x25 # perform operation +80000c24: 5f9881b3 sha512sig1h x3,x17,x25 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknh_sha512sig1h_cg_cp_rd_b3, Zknh_sha512sig1h_cg_cp_rd_b3_str) +80000c28: 00052383 lw x7,0(x10) +80000c2c: 00338863 beq x7,x3,80000c3c +80000c30: 0e90446f jal x8,80005518 +80000c34: 80000c24 .word 0x80000c24 +80000c38: 80009efb .word 0x80009efb +80000c3c: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x62ccde15 +80000c40: 000fae03 lw x28,0(x31) +80000c44: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xfcbd3e45 +80000c48: 000fa783 lw x15,0(x31) +80000c4c: 004f8f93 addi x31,x31,4 + +80000c50 : +Zknh_sha512sig1h_cg_cp_rd_b4: + sha512sig1h x4, x28, x15 # perform operation +80000c50: 5efe0233 sha512sig1h x4,x28,x15 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknh_sha512sig1h_cg_cp_rd_b4, Zknh_sha512sig1h_cg_cp_rd_b4_str) +80000c54: 00052383 lw x7,0(x10) +80000c58: 00438863 beq x7,x4,80000c68 +80000c5c: 0bd0446f jal x8,80005518 +80000c60: 80000c50 .word 0x80000c50 +80000c64: 80009f33 .word 0x80009f33 +80000c68: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x4c0107e4 +80000c6c: 000fad83 lw x27,0(x31) +80000c70: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x611f5cfc +80000c74: 000fa103 lw x2,0(x31) +80000c78: 004f8f93 addi x31,x31,4 + +80000c7c : +Zknh_sha512sig1h_cg_cp_rd_b5: + sha512sig1h x5, x27, x2 # perform operation +80000c7c: 5e2d82b3 sha512sig1h x5,x27,x2 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknh_sha512sig1h_cg_cp_rd_b5, Zknh_sha512sig1h_cg_cp_rd_b5_str) +80000c80: 00052383 lw x7,0(x10) +80000c84: 00538863 beq x7,x5,80000c94 +80000c88: 0910446f jal x8,80005518 +80000c8c: 80000c7c .word 0x80000c7c +80000c90: 80009f6b .word 0x80009f6b +80000c94: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xf235d3ae +80000c98: 000fae83 lw x29,0(x31) +80000c9c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0xebb1447d +80000ca0: 000fa903 lw x18,0(x31) +80000ca4: 004f8f93 addi x31,x31,4 + +80000ca8 : +Zknh_sha512sig1h_cg_cp_rd_b6: + sha512sig1h x6, x29, x18 # perform operation +80000ca8: 5f2e8333 sha512sig1h x6,x29,x18 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknh_sha512sig1h_cg_cp_rd_b6, Zknh_sha512sig1h_cg_cp_rd_b6_str) +80000cac: 00052383 lw x7,0(x10) +80000cb0: 00638863 beq x7,x6,80000cc0 +80000cb4: 0650446f jal x8,80005518 +80000cb8: 80000ca8 .word 0x80000ca8 +80000cbc: 80009fa3 .word 0x80009fa3 +80000cc0: 00450513 addi x10,x10,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cc4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cc8: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x4bdeb384 +80000ccc: 000fad03 lw x26,0(x31) +80000cd0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0xeccb7b77 +80000cd4: 000fa603 lw x12,0(x31) +80000cd8: 004f8f93 addi x31,x31,4 + +80000cdc : +Zknh_sha512sig1h_cg_cp_rd_b7: + sha512sig1h x7, x26, x12 # perform operation +80000cdc: 5ecd03b3 sha512sig1h x7,x26,x12 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zknh_sha512sig1h_cg_cp_rd_b7, Zknh_sha512sig1h_cg_cp_rd_b7_str) +80000ce0: 00052683 lw x13,0(x10) +80000ce4: 00768863 beq x13,x7,80000cf4 +80000ce8: 0590476f jal x14,80005540 +80000cec: 80000cdc .word 0x80000cdc +80000cf0: 80009fdb .word 0x80009fdb +80000cf4: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs1: x0 = 0xda57bed4 +80000cf8: 000fa003 lw x0,0(x31) +80000cfc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0xc7c970c9 +80000d00: 000fa183 lw x3,0(x31) +80000d04: 004f8f93 addi x31,x31,4 + +80000d08 : +Zknh_sha512sig1h_cg_cp_rd_b8: + sha512sig1h x8, x0, x3 # perform operation +80000d08: 5e300433 sha512sig1h x8,x0,x3 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zknh_sha512sig1h_cg_cp_rd_b8, Zknh_sha512sig1h_cg_cp_rd_b8_str) +80000d0c: 00052683 lw x13,0(x10) +80000d10: 00868863 beq x13,x8,80000d20 +80000d14: 02d0476f jal x14,80005540 +80000d18: 80000d08 .word 0x80000d08 +80000d1c: 8000a013 .word 0x8000a013 +80000d20: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0xc245474d +80000d24: 000fa283 lw x5,0(x31) +80000d28: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x67c69c17 +80000d2c: 000fab83 lw x23,0(x31) +80000d30: 004f8f93 addi x31,x31,4 + +80000d34 : +Zknh_sha512sig1h_cg_cp_rd_b9: + sha512sig1h x9, x5, x23 # perform operation +80000d34: 5f7284b3 sha512sig1h x9,x5,x23 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zknh_sha512sig1h_cg_cp_rd_b9, Zknh_sha512sig1h_cg_cp_rd_b9_str) +80000d38: 00052683 lw x13,0(x10) +80000d3c: 00968863 beq x13,x9,80000d4c +80000d40: 0010476f jal x14,80005540 +80000d44: 80000d34 .word 0x80000d34 +80000d48: 8000a04b .word 0x8000a04b +80000d4c: 00450513 addi x10,x10,4 + + mv x3, x10 # switch signature pointer register to avoid conflict with test +80000d50: 00050193 addi x3,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x5c6c499b +80000d54: 000fae03 lw x28,0(x31) +80000d58: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x664d20c5 +80000d5c: 000fac03 lw x24,0(x31) +80000d60: 004f8f93 addi x31,x31,4 + +80000d64 : +Zknh_sha512sig1h_cg_cp_rd_b10: + sha512sig1h x10, x28, x24 # perform operation +80000d64: 5f8e0533 sha512sig1h x10,x28,x24 + # Check if x10 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x10, Zknh_sha512sig1h_cg_cp_rd_b10, Zknh_sha512sig1h_cg_cp_rd_b10_str) +80000d68: 0001a683 lw x13,0(x3) +80000d6c: 00a68863 beq x13,x10,80000d7c +80000d70: 7d00476f jal x14,80005540 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 8000a083 .word 0x8000a083 +80000d7c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0x9a2af297 +80000d80: 000fa103 lw x2,0(x31) +80000d84: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x56fc65f3 +80000d88: 000fae03 lw x28,0(x31) +80000d8c: 004f8f93 addi x31,x31,4 + +80000d90 : +Zknh_sha512sig1h_cg_cp_rd_b11: + sha512sig1h x11, x2, x28 # perform operation +80000d90: 5fc105b3 sha512sig1h x11,x2,x28 + # Check if x11 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x11, Zknh_sha512sig1h_cg_cp_rd_b11, Zknh_sha512sig1h_cg_cp_rd_b11_str) +80000d94: 0001a683 lw x13,0(x3) +80000d98: 00b68863 beq x13,x11,80000da8 +80000d9c: 7a40476f jal x14,80005540 +80000da0: 80000d90 .word 0x80000d90 +80000da4: 8000a0bc .word 0x8000a0bc +80000da8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x348a291f +80000dac: 000fab83 lw x23,0(x31) +80000db0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0x5da31750 +80000db4: 000faa83 lw x21,0(x31) +80000db8: 004f8f93 addi x31,x31,4 + +80000dbc : +Zknh_sha512sig1h_cg_cp_rd_b12: + sha512sig1h x12, x23, x21 # perform operation +80000dbc: 5f5b8633 sha512sig1h x12,x23,x21 + # Check if x12 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x12, Zknh_sha512sig1h_cg_cp_rd_b12, Zknh_sha512sig1h_cg_cp_rd_b12_str) +80000dc0: 0001a683 lw x13,0(x3) +80000dc4: 00c68863 beq x13,x12,80000dd4 +80000dc8: 7780476f jal x14,80005540 +80000dcc: 80000dbc .word 0x80000dbc +80000dd0: 8000a0f5 .word 0x8000a0f5 +80000dd4: 00418193 addi x3,x3,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dd8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000ddc: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xf1247a71 +80000de0: 000fae03 lw x28,0(x31) +80000de4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x3a43cbb7 +80000de8: 000fa083 lw x1,0(x31) +80000dec: 004f8f93 addi x31,x31,4 + +80000df0 : +Zknh_sha512sig1h_cg_cp_rd_b13: + sha512sig1h x13, x28, x1 # perform operation +80000df0: 5e1e06b3 sha512sig1h x13,x28,x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha512sig1h_cg_cp_rd_b13, Zknh_sha512sig1h_cg_cp_rd_b13_str) +80000df4: 0001a383 lw x7,0(x3) +80000df8: 00d38863 beq x7,x13,80000e08 +80000dfc: 71c0446f jal x8,80005518 +80000e00: 80000df0 .word 0x80000df0 +80000e04: 8000a12e .word 0x8000a12e +80000e08: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x44488ef2 +80000e0c: 000fae83 lw x29,0(x31) +80000e10: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x3f4c6922 +80000e14: 000fa283 lw x5,0(x31) +80000e18: 004f8f93 addi x31,x31,4 + +80000e1c : +Zknh_sha512sig1h_cg_cp_rd_b14: + sha512sig1h x14, x29, x5 # perform operation +80000e1c: 5e5e8733 sha512sig1h x14,x29,x5 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cp_rd_b14, Zknh_sha512sig1h_cg_cp_rd_b14_str) +80000e20: 0001a383 lw x7,0(x3) +80000e24: 00e38863 beq x7,x14,80000e34 +80000e28: 6f00446f jal x8,80005518 +80000e2c: 80000e1c .word 0x80000e1c +80000e30: 8000a167 .word 0x8000a167 +80000e34: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x3b6b9953 +80000e38: 000faa03 lw x20,0(x31) +80000e3c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x0d98f046 +80000e40: 000fac83 lw x25,0(x31) +80000e44: 004f8f93 addi x31,x31,4 + +80000e48 : +Zknh_sha512sig1h_cg_cp_rd_b15: + sha512sig1h x15, x20, x25 # perform operation +80000e48: 5f9a07b3 sha512sig1h x15,x20,x25 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cp_rd_b15, Zknh_sha512sig1h_cg_cp_rd_b15_str) +80000e4c: 0001a383 lw x7,0(x3) +80000e50: 00f38863 beq x7,x15,80000e60 +80000e54: 6c40446f jal x8,80005518 +80000e58: 80000e48 .word 0x80000e48 +80000e5c: 8000a1a0 .word 0x8000a1a0 +80000e60: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0xb0bd1a47 +80000e64: 000fad03 lw x26,0(x31) +80000e68: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x3bcdbed4 +80000e6c: 000fa283 lw x5,0(x31) +80000e70: 004f8f93 addi x31,x31,4 + +80000e74 : +Zknh_sha512sig1h_cg_cp_rd_b16: + sha512sig1h x16, x26, x5 # perform operation +80000e74: 5e5d0833 sha512sig1h x16,x26,x5 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cp_rd_b16, Zknh_sha512sig1h_cg_cp_rd_b16_str) +80000e78: 0001a383 lw x7,0(x3) +80000e7c: 01038863 beq x7,x16,80000e8c +80000e80: 6980446f jal x8,80005518 +80000e84: 80000e74 .word 0x80000e74 +80000e88: 8000a1d9 .word 0x8000a1d9 +80000e8c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xb3c967d6 +80000e90: 000fae03 lw x28,0(x31) +80000e94: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0xbbea5854 +80000e98: 000fa303 lw x6,0(x31) +80000e9c: 004f8f93 addi x31,x31,4 + +80000ea0 : +Zknh_sha512sig1h_cg_cp_rd_b17: + sha512sig1h x17, x28, x6 # perform operation +80000ea0: 5e6e08b3 sha512sig1h x17,x28,x6 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cp_rd_b17, Zknh_sha512sig1h_cg_cp_rd_b17_str) +80000ea4: 0001a383 lw x7,0(x3) +80000ea8: 01138863 beq x7,x17,80000eb8 +80000eac: 66c0446f jal x8,80005518 +80000eb0: 80000ea0 .word 0x80000ea0 +80000eb4: 8000a212 .word 0x8000a212 +80000eb8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x7bc15390 +80000ebc: 000fa083 lw x1,0(x31) +80000ec0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0xd28049e8 +80000ec4: 000fa203 lw x4,0(x31) +80000ec8: 004f8f93 addi x31,x31,4 + +80000ecc : +Zknh_sha512sig1h_cg_cp_rd_b18: + sha512sig1h x18, x1, x4 # perform operation +80000ecc: 5e408933 sha512sig1h x18,x1,x4 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zknh_sha512sig1h_cg_cp_rd_b18, Zknh_sha512sig1h_cg_cp_rd_b18_str) +80000ed0: 0001a383 lw x7,0(x3) +80000ed4: 01238863 beq x7,x18,80000ee4 +80000ed8: 6400446f jal x8,80005518 +80000edc: 80000ecc .word 0x80000ecc +80000ee0: 8000a24b .word 0x8000a24b +80000ee4: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xff06bc86 +80000ee8: 000fa303 lw x6,0(x31) +80000eec: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0xae847084 +80000ef0: 000fa903 lw x18,0(x31) +80000ef4: 004f8f93 addi x31,x31,4 + +80000ef8 : +Zknh_sha512sig1h_cg_cp_rd_b19: + sha512sig1h x19, x6, x18 # perform operation +80000ef8: 5f2309b3 sha512sig1h x19,x6,x18 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1h_cg_cp_rd_b19, Zknh_sha512sig1h_cg_cp_rd_b19_str) +80000efc: 0001a383 lw x7,0(x3) +80000f00: 01338863 beq x7,x19,80000f10 +80000f04: 6140446f jal x8,80005518 +80000f08: 80000ef8 .word 0x80000ef8 +80000f0c: 8000a284 .word 0x8000a284 +80000f10: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0x3bb4c92c +80000f14: 000fa103 lw x2,0(x31) +80000f18: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x89f94af9 +80000f1c: 000fad03 lw x26,0(x31) +80000f20: 004f8f93 addi x31,x31,4 + +80000f24 : +Zknh_sha512sig1h_cg_cp_rd_b20: + sha512sig1h x20, x2, x26 # perform operation +80000f24: 5fa10a33 sha512sig1h x20,x2,x26 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zknh_sha512sig1h_cg_cp_rd_b20, Zknh_sha512sig1h_cg_cp_rd_b20_str) +80000f28: 0001a383 lw x7,0(x3) +80000f2c: 01438863 beq x7,x20,80000f3c +80000f30: 5e80446f jal x8,80005518 +80000f34: 80000f24 .word 0x80000f24 +80000f38: 8000a2bd .word 0x8000a2bd +80000f3c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x655b0f7c +80000f40: 000fa983 lw x19,0(x31) +80000f44: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0x33f71531 +80000f48: 000fa683 lw x13,0(x31) +80000f4c: 004f8f93 addi x31,x31,4 + +80000f50 : +Zknh_sha512sig1h_cg_cp_rd_b21: + sha512sig1h x21, x19, x13 # perform operation +80000f50: 5ed98ab3 sha512sig1h x21,x19,x13 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cp_rd_b21, Zknh_sha512sig1h_cg_cp_rd_b21_str) +80000f54: 0001a383 lw x7,0(x3) +80000f58: 01538863 beq x7,x21,80000f68 +80000f5c: 5bc0446f jal x8,80005518 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 8000a2f6 .word 0x8000a2f6 +80000f68: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs1: x0 = 0x35a33a91 +80000f6c: 000fa003 lw x0,0(x31) +80000f70: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0xc66ee6c6 +80000f74: 000fa303 lw x6,0(x31) +80000f78: 004f8f93 addi x31,x31,4 + +80000f7c : +Zknh_sha512sig1h_cg_cp_rd_b22: + sha512sig1h x22, x0, x6 # perform operation +80000f7c: 5e600b33 sha512sig1h x22,x0,x6 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cp_rd_b22, Zknh_sha512sig1h_cg_cp_rd_b22_str) +80000f80: 0001a383 lw x7,0(x3) +80000f84: 01638863 beq x7,x22,80000f94 +80000f88: 5900446f jal x8,80005518 +80000f8c: 80000f7c .word 0x80000f7c +80000f90: 8000a32f .word 0x8000a32f +80000f94: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x3e273490 +80000f98: 000fa483 lw x9,0(x31) +80000f9c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x9f73bf31 +80000fa0: 000fa103 lw x2,0(x31) +80000fa4: 004f8f93 addi x31,x31,4 + +80000fa8 : +Zknh_sha512sig1h_cg_cp_rd_b23: + sha512sig1h x23, x9, x2 # perform operation +80000fa8: 5e248bb3 sha512sig1h x23,x9,x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cp_rd_b23, Zknh_sha512sig1h_cg_cp_rd_b23_str) +80000fac: 0001a383 lw x7,0(x3) +80000fb0: 01738863 beq x7,x23,80000fc0 +80000fb4: 5640446f jal x8,80005518 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 8000a368 .word 0x8000a368 +80000fc0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xa6ca5fbc +80000fc4: 000fab83 lw x23,0(x31) +80000fc8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x8c088b89 +80000fcc: 000fa083 lw x1,0(x31) +80000fd0: 004f8f93 addi x31,x31,4 + +80000fd4 : +Zknh_sha512sig1h_cg_cp_rd_b24: + sha512sig1h x24, x23, x1 # perform operation +80000fd4: 5e1b8c33 sha512sig1h x24,x23,x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cp_rd_b24, Zknh_sha512sig1h_cg_cp_rd_b24_str) +80000fd8: 0001a383 lw x7,0(x3) +80000fdc: 01838863 beq x7,x24,80000fec +80000fe0: 5380446f jal x8,80005518 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000a3a1 .word 0x8000a3a1 +80000fec: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xdd14e20e +80000ff0: 000fab03 lw x22,0(x31) +80000ff4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0xc901c891 +80000ff8: 000faf03 lw x30,0(x31) +80000ffc: 004f8f93 addi x31,x31,4 + +80001000 : +Zknh_sha512sig1h_cg_cp_rd_b25: + sha512sig1h x25, x22, x30 # perform operation +80001000: 5feb0cb3 sha512sig1h x25,x22,x30 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cp_rd_b25, Zknh_sha512sig1h_cg_cp_rd_b25_str) +80001004: 0001a383 lw x7,0(x3) +80001008: 01938863 beq x7,x25,80001018 +8000100c: 50c0446f jal x8,80005518 +80001010: 80001000 .word 0x80001000 +80001014: 8000a3da .word 0x8000a3da +80001018: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xece25106 +8000101c: 000fac83 lw x25,0(x31) +80001020: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0x1e863d4a +80001024: 000fa603 lw x12,0(x31) +80001028: 004f8f93 addi x31,x31,4 + +8000102c : +Zknh_sha512sig1h_cg_cp_rd_b26: + sha512sig1h x26, x25, x12 # perform operation +8000102c: 5ecc8d33 sha512sig1h x26,x25,x12 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cp_rd_b26, Zknh_sha512sig1h_cg_cp_rd_b26_str) +80001030: 0001a383 lw x7,0(x3) +80001034: 01a38863 beq x7,x26,80001044 +80001038: 4e00446f jal x8,80005518 +8000103c: 8000102c .word 0x8000102c +80001040: 8000a413 .word 0x8000a413 +80001044: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x087b79d4 +80001048: 000fa603 lw x12,0(x31) +8000104c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0xd7bf9c16 +80001050: 000fa283 lw x5,0(x31) +80001054: 004f8f93 addi x31,x31,4 + +80001058 : +Zknh_sha512sig1h_cg_cp_rd_b27: + sha512sig1h x27, x12, x5 # perform operation +80001058: 5e560db3 sha512sig1h x27,x12,x5 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknh_sha512sig1h_cg_cp_rd_b27, Zknh_sha512sig1h_cg_cp_rd_b27_str) +8000105c: 0001a383 lw x7,0(x3) +80001060: 01b38863 beq x7,x27,80001070 +80001064: 4b40446f jal x8,80005518 +80001068: 80001058 .word 0x80001058 +8000106c: 8000a44c .word 0x8000a44c +80001070: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x48a2f265 +80001074: 000fa583 lw x11,0(x31) +80001078: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0xab1e01d8 +8000107c: 000fab83 lw x23,0(x31) +80001080: 004f8f93 addi x31,x31,4 + +80001084 : +Zknh_sha512sig1h_cg_cp_rd_b28: + sha512sig1h x28, x11, x23 # perform operation +80001084: 5f758e33 sha512sig1h x28,x11,x23 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cp_rd_b28, Zknh_sha512sig1h_cg_cp_rd_b28_str) +80001088: 0001a383 lw x7,0(x3) +8000108c: 01c38863 beq x7,x28,8000109c +80001090: 4880446f jal x8,80005518 +80001094: 80001084 .word 0x80001084 +80001098: 8000a485 .word 0x8000a485 +8000109c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x67df90e8 +800010a0: 000fa983 lw x19,0(x31) +800010a4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x85c49e8d +800010a8: 000fa083 lw x1,0(x31) +800010ac: 004f8f93 addi x31,x31,4 + +800010b0 : +Zknh_sha512sig1h_cg_cp_rd_b29: + sha512sig1h x29, x19, x1 # perform operation +800010b0: 5e198eb3 sha512sig1h x29,x19,x1 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rd_b29, Zknh_sha512sig1h_cg_cp_rd_b29_str) +800010b4: 0001a383 lw x7,0(x3) +800010b8: 01d38863 beq x7,x29,800010c8 +800010bc: 45c0446f jal x8,80005518 +800010c0: 800010b0 .word 0x800010b0 +800010c4: 8000a4be .word 0x8000a4be +800010c8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x5c76ecc0 +800010cc: 000fae03 lw x28,0(x31) +800010d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x267fa7b9 +800010d4: 000fa283 lw x5,0(x31) +800010d8: 004f8f93 addi x31,x31,4 + +800010dc : +Zknh_sha512sig1h_cg_cp_rd_b30: + sha512sig1h x30, x28, x5 # perform operation +800010dc: 5e5e0f33 sha512sig1h x30,x28,x5 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cp_rd_b30, Zknh_sha512sig1h_cg_cp_rd_b30_str) +800010e0: 0001a383 lw x7,0(x3) +800010e4: 01e38863 beq x7,x30,800010f4 +800010e8: 4300446f jal x8,80005518 +800010ec: 800010dc .word 0x800010dc +800010f0: 8000a4f7 .word 0x8000a4f7 +800010f4: 00418193 addi x3,x3,4 + + mv x18, x31 # switch data pointer register to avoid conflict with test +800010f8: 000f8913 addi x18,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x652ff5d2 +800010fc: 00092103 lw x2,0(x18) +80001100: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xc022ea71 +80001104: 00092003 lw x0,0(x18) +80001108: 00490913 addi x18,x18,4 + +8000110c : +Zknh_sha512sig1h_cg_cp_rd_b31: + sha512sig1h x31, x2, x0 # perform operation +8000110c: 5e010fb3 sha512sig1h x31,x2,x0 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cp_rd_b31, Zknh_sha512sig1h_cg_cp_rd_b31_str) +80001110: 0001a383 lw x7,0(x3) +80001114: 01f38863 beq x7,x31,80001124 +80001118: 4000446f jal x8,80005518 +8000111c: 8000110c .word 0x8000110c +80001120: 8000a530 .word 0x8000a530 +80001124: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x00000000 +80001128: 00092603 lw x12,0(x18) +8000112c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xe7f47607 +80001130: 00092803 lw x16,0(x18) +80001134: 00490913 addi x18,x18,4 + +80001138 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x0: + sha512sig1h x14, x12, x16 # perform operation +80001138: 5f060733 sha512sig1h x14,x12,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cp_rs1_edges_0x0, Zknh_sha512sig1h_cg_cp_rs1_edges_0x0_str) +8000113c: 0001a383 lw x7,0(x3) +80001140: 00e38863 beq x7,x14,80001150 +80001144: 3d40446f jal x8,80005518 +80001148: 80001138 .word 0x80001138 +8000114c: 8000a569 .word 0x8000a569 +80001150: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000001 +80001154: 00092a03 lw x20,0(x18) +80001158: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x89e3b459 +8000115c: 00092683 lw x13,0(x18) +80001160: 00490913 addi x18,x18,4 + +80001164 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x1: + sha512sig1h x10, x20, x13 # perform operation +80001164: 5eda0533 sha512sig1h x10,x20,x13 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zknh_sha512sig1h_cg_cp_rs1_edges_0x1, Zknh_sha512sig1h_cg_cp_rs1_edges_0x1_str) +80001168: 0001a383 lw x7,0(x3) +8000116c: 00a38863 beq x7,x10,8000117c +80001170: 3a80446f jal x8,80005518 +80001174: 80001164 .word 0x80001164 +80001178: 8000a5a9 .word 0x8000a5a9 +8000117c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x00000002 +80001180: 00092a83 lw x21,0(x18) +80001184: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0xadf2189c +80001188: 00092083 lw x1,0(x18) +8000118c: 00490913 addi x18,x18,4 + +80001190 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x2: + sha512sig1h x26, x21, x1 # perform operation +80001190: 5e1a8d33 sha512sig1h x26,x21,x1 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cp_rs1_edges_0x2, Zknh_sha512sig1h_cg_cp_rs1_edges_0x2_str) +80001194: 0001a383 lw x7,0(x3) +80001198: 01a38863 beq x7,x26,800011a8 +8000119c: 37c0446f jal x8,80005518 +800011a0: 80001190 .word 0x80001190 +800011a4: 8000a5e9 .word 0x8000a5e9 +800011a8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x80000000 +800011ac: 00092683 lw x13,0(x18) +800011b0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x5bd9104e +800011b4: 00092a83 lw x21,0(x18) +800011b8: 00490913 addi x18,x18,4 + +800011bc : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000000: + sha512sig1h x5, x13, x21 # perform operation +800011bc: 5f5682b3 sha512sig1h x5,x13,x21 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000000, Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000000_str) +800011c0: 0001a383 lw x7,0(x3) +800011c4: 00538863 beq x7,x5,800011d4 +800011c8: 3500446f jal x8,80005518 +800011cc: 800011bc .word 0x800011bc +800011d0: 8000a629 .word 0x8000a629 +800011d4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x80000001 +800011d8: 00092283 lw x5,0(x18) +800011dc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xef46df29 +800011e0: 00092c83 lw x25,0(x18) +800011e4: 00490913 addi x18,x18,4 + +800011e8 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000001: + sha512sig1h x27, x5, x25 # perform operation +800011e8: 5f928db3 sha512sig1h x27,x5,x25 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000001, Zknh_sha512sig1h_cg_cp_rs1_edges_0x80000001_str) +800011ec: 0001a383 lw x7,0(x3) +800011f0: 01b38863 beq x7,x27,80001200 +800011f4: 3240446f jal x8,80005518 +800011f8: 800011e8 .word 0x800011e8 +800011fc: 8000a671 .word 0x8000a671 +80001200: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x7fffffff +80001204: 00092f83 lw x31,0(x18) +80001208: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xcfc1f5a2 +8000120c: 00092703 lw x14,0(x18) +80001210: 00490913 addi x18,x18,4 + +80001214 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x7fffffff: + sha512sig1h x17, x31, x14 # perform operation +80001214: 5eef88b3 sha512sig1h x17,x31,x14 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sig1h_cg_cp_rs1_edges_0x7fffffff_str) +80001218: 0001a383 lw x7,0(x3) +8000121c: 01138863 beq x7,x17,8000122c +80001220: 2f80446f jal x8,80005518 +80001224: 80001214 .word 0x80001214 +80001228: 8000a6b9 .word 0x8000a6b9 +8000122c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x7ffffffe +80001230: 00092303 lw x6,0(x18) +80001234: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x20924001 +80001238: 00092c83 lw x25,0(x18) +8000123c: 00490913 addi x18,x18,4 + +80001240 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x7ffffffe: + sha512sig1h x22, x6, x25 # perform operation +80001240: 5f930b33 sha512sig1h x22,x6,x25 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sig1h_cg_cp_rs1_edges_0x7ffffffe_str) +80001244: 0001a383 lw x7,0(x3) +80001248: 01638863 beq x7,x22,80001258 +8000124c: 2cc0446f jal x8,80005518 +80001250: 80001240 .word 0x80001240 +80001254: 8000a701 .word 0x8000a701 +80001258: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xffffffff +8000125c: 00092703 lw x14,0(x18) +80001260: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xa26e07c0 +80001264: 00092483 lw x9,0(x18) +80001268: 00490913 addi x18,x18,4 + +8000126c : +Zknh_sha512sig1h_cg_cp_rs1_edges_0xffffffff: + sha512sig1h x29, x14, x9 # perform operation +8000126c: 5e970eb3 sha512sig1h x29,x14,x9 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig1h_cg_cp_rs1_edges_0xffffffff_str) +80001270: 0001a383 lw x7,0(x3) +80001274: 01d38863 beq x7,x29,80001284 +80001278: 2a00446f jal x8,80005518 +8000127c: 8000126c .word 0x8000126c +80001280: 8000a749 .word 0x8000a749 +80001284: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0xfffffffe +80001288: 00092f03 lw x30,0(x18) +8000128c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x88b0d59d +80001290: 00092603 lw x12,0(x18) +80001294: 00490913 addi x18,x18,4 + +80001298 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0xfffffffe: + sha512sig1h x9, x30, x12 # perform operation +80001298: 5ecf04b3 sha512sig1h x9,x30,x12 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zknh_sha512sig1h_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig1h_cg_cp_rs1_edges_0xfffffffe_str) +8000129c: 0001a383 lw x7,0(x3) +800012a0: 00938863 beq x7,x9,800012b0 +800012a4: 2740446f jal x8,80005518 +800012a8: 80001298 .word 0x80001298 +800012ac: 8000a791 .word 0x8000a791 +800012b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x5bbc8872 +800012b4: 00092a03 lw x20,0(x18) +800012b8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xf885b2d2 +800012bc: 00092803 lw x16,0(x18) +800012c0: 00490913 addi x18,x18,4 + +800012c4 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x5bbc8872: + sha512sig1h x17, x20, x16 # perform operation +800012c4: 5f0a08b3 sha512sig1h x17,x20,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sig1h_cg_cp_rs1_edges_0x5bbc8872_str) +800012c8: 0001a383 lw x7,0(x3) +800012cc: 01138863 beq x7,x17,800012dc +800012d0: 2480446f jal x8,80005518 +800012d4: 800012c4 .word 0x800012c4 +800012d8: 8000a7d9 .word 0x8000a7d9 +800012dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xaaaaaaaa +800012e0: 00092e83 lw x29,0(x18) +800012e4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x07694813 +800012e8: 00092503 lw x10,0(x18) +800012ec: 00490913 addi x18,x18,4 + +800012f0 : +Zknh_sha512sig1h_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sig1h x26, x29, x10 # perform operation +800012f0: 5eae8d33 sha512sig1h x26,x29,x10 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sig1h_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f4: 0001a383 lw x7,0(x3) +800012f8: 01a38863 beq x7,x26,80001308 +800012fc: 21c0446f jal x8,80005518 +80001300: 800012f0 .word 0x800012f0 +80001304: 8000a821 .word 0x8000a821 +80001308: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x55555555 +8000130c: 00092d83 lw x27,0(x18) +80001310: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x685f059f +80001314: 00092a83 lw x21,0(x18) +80001318: 00490913 addi x18,x18,4 + +8000131c : +Zknh_sha512sig1h_cg_cp_rs1_edges_0x55555555: + sha512sig1h x20, x27, x21 # perform operation +8000131c: 5f5d8a33 sha512sig1h x20,x27,x21 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zknh_sha512sig1h_cg_cp_rs1_edges_0x55555555, Zknh_sha512sig1h_cg_cp_rs1_edges_0x55555555_str) +80001320: 0001a383 lw x7,0(x3) +80001324: 01438863 beq x7,x20,80001334 +80001328: 1f00446f jal x8,80005518 +8000132c: 8000131c .word 0x8000131c +80001330: 8000a869 .word 0x8000a869 +80001334: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xbbf16322 +80001338: 00092d03 lw x26,0(x18) +8000133c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x00000000 +80001340: 00092083 lw x1,0(x18) +80001344: 00490913 addi x18,x18,4 + +80001348 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x0: + sha512sig1h x12, x26, x1 # perform operation +80001348: 5e1d0633 sha512sig1h x12,x26,x1 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cp_rs2_edges_0x0, Zknh_sha512sig1h_cg_cp_rs2_edges_0x0_str) +8000134c: 0001a383 lw x7,0(x3) +80001350: 00c38863 beq x7,x12,80001360 +80001354: 1c40446f jal x8,80005518 +80001358: 80001348 .word 0x80001348 +8000135c: 8000a8b1 .word 0x8000a8b1 +80001360: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x5dc081f2 +80001364: 00092b83 lw x23,0(x18) +80001368: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x00000001 +8000136c: 00092c03 lw x24,0(x18) +80001370: 00490913 addi x18,x18,4 + +80001374 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x1: + sha512sig1h x2, x23, x24 # perform operation +80001374: 5f8b8133 sha512sig1h x2,x23,x24 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cp_rs2_edges_0x1, Zknh_sha512sig1h_cg_cp_rs2_edges_0x1_str) +80001378: 0001a383 lw x7,0(x3) +8000137c: 00238863 beq x7,x2,8000138c +80001380: 1980446f jal x8,80005518 +80001384: 80001374 .word 0x80001374 +80001388: 8000a8f2 .word 0x8000a8f2 +8000138c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x252aa6c8 +80001390: 00092683 lw x13,0(x18) +80001394: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x00000002 +80001398: 00092783 lw x15,0(x18) +8000139c: 00490913 addi x18,x18,4 + +800013a0 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x2: + sha512sig1h x23, x13, x15 # perform operation +800013a0: 5ef68bb3 sha512sig1h x23,x13,x15 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cp_rs2_edges_0x2, Zknh_sha512sig1h_cg_cp_rs2_edges_0x2_str) +800013a4: 0001a383 lw x7,0(x3) +800013a8: 01738863 beq x7,x23,800013b8 +800013ac: 16c0446f jal x8,80005518 +800013b0: 800013a0 .word 0x800013a0 +800013b4: 8000a933 .word 0x8000a933 +800013b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xffa6bd59 +800013bc: 00092d03 lw x26,0(x18) +800013c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x80000000 +800013c4: 00092803 lw x16,0(x18) +800013c8: 00490913 addi x18,x18,4 + +800013cc : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000000: + sha512sig1h x28, x26, x16 # perform operation +800013cc: 5f0d0e33 sha512sig1h x28,x26,x16 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000000, Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000000_str) +800013d0: 0001a383 lw x7,0(x3) +800013d4: 01c38863 beq x7,x28,800013e4 +800013d8: 1400446f jal x8,80005518 +800013dc: 800013cc .word 0x800013cc +800013e0: 8000a974 .word 0x8000a974 +800013e4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0xabb3f865 +800013e8: 00092a83 lw x21,0(x18) +800013ec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x80000001 +800013f0: 00092483 lw x9,0(x18) +800013f4: 00490913 addi x18,x18,4 + +800013f8 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000001: + sha512sig1h x30, x21, x9 # perform operation +800013f8: 5e9a8f33 sha512sig1h x30,x21,x9 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000001, Zknh_sha512sig1h_cg_cp_rs2_edges_0x80000001_str) +800013fc: 0001a383 lw x7,0(x3) +80001400: 01e38863 beq x7,x30,80001410 +80001404: 1140446f jal x8,80005518 +80001408: 800013f8 .word 0x800013f8 +8000140c: 8000a9bc .word 0x8000a9bc +80001410: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xc111d8c1 +80001414: 00092b03 lw x22,0(x18) +80001418: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x7fffffff +8000141c: 00092683 lw x13,0(x18) +80001420: 00490913 addi x18,x18,4 + +80001424 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x7fffffff: + sha512sig1h x29, x22, x13 # perform operation +80001424: 5edb0eb3 sha512sig1h x29,x22,x13 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sig1h_cg_cp_rs2_edges_0x7fffffff_str) +80001428: 0001a383 lw x7,0(x3) +8000142c: 01d38863 beq x7,x29,8000143c +80001430: 0e80446f jal x8,80005518 +80001434: 80001424 .word 0x80001424 +80001438: 8000aa04 .word 0x8000aa04 +8000143c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xe510e510 +80001440: 00092883 lw x17,0(x18) +80001444: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x7ffffffe +80001448: 00092a83 lw x21,0(x18) +8000144c: 00490913 addi x18,x18,4 + +80001450 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x7ffffffe: + sha512sig1h x1, x17, x21 # perform operation +80001450: 5f5880b3 sha512sig1h x1,x17,x21 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1h_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sig1h_cg_cp_rs2_edges_0x7ffffffe_str) +80001454: 0001a383 lw x7,0(x3) +80001458: 00138863 beq x7,x1,80001468 +8000145c: 0bc0446f jal x8,80005518 +80001460: 80001450 .word 0x80001450 +80001464: 8000aa4c .word 0x8000aa4c +80001468: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xdab29321 +8000146c: 00092983 lw x19,0(x18) +80001470: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xffffffff +80001474: 00092a83 lw x21,0(x18) +80001478: 00490913 addi x18,x18,4 + +8000147c : +Zknh_sha512sig1h_cg_cp_rs2_edges_0xffffffff: + sha512sig1h x4, x19, x21 # perform operation +8000147c: 5f598233 sha512sig1h x4,x19,x21 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sig1h_cg_cp_rs2_edges_0xffffffff_str) +80001480: 0001a383 lw x7,0(x3) +80001484: 00438863 beq x7,x4,80001494 +80001488: 0900446f jal x8,80005518 +8000148c: 8000147c .word 0x8000147c +80001490: 8000aa94 .word 0x8000aa94 +80001494: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x87cfa479 +80001498: 00092503 lw x10,0(x18) +8000149c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0xfffffffe +800014a0: 00092f03 lw x30,0(x18) +800014a4: 00490913 addi x18,x18,4 + +800014a8 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0xfffffffe: + sha512sig1h x11, x10, x30 # perform operation +800014a8: 5fe505b3 sha512sig1h x11,x10,x30 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sig1h_cg_cp_rs2_edges_0xfffffffe_str) +800014ac: 0001a383 lw x7,0(x3) +800014b0: 00b38863 beq x7,x11,800014c0 +800014b4: 0640446f jal x8,80005518 +800014b8: 800014a8 .word 0x800014a8 +800014bc: 8000aadc .word 0x8000aadc +800014c0: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x8df5d955 +800014c4: 00092e83 lw x29,0(x18) +800014c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x5bbc8872 +800014cc: 00092b03 lw x22,0(x18) +800014d0: 00490913 addi x18,x18,4 + +800014d4 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x5bbc8872: + sha512sig1h x1, x29, x22 # perform operation +800014d4: 5f6e80b3 sha512sig1h x1,x29,x22 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1h_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sig1h_cg_cp_rs2_edges_0x5bbc8872_str) +800014d8: 0001a383 lw x7,0(x3) +800014dc: 00138863 beq x7,x1,800014ec +800014e0: 0380446f jal x8,80005518 +800014e4: 800014d4 .word 0x800014d4 +800014e8: 8000ab24 .word 0x8000ab24 +800014ec: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x5ad9404a +800014f0: 00092103 lw x2,0(x18) +800014f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xaaaaaaaa +800014f8: 00092483 lw x9,0(x18) +800014fc: 00490913 addi x18,x18,4 + +80001500 : +Zknh_sha512sig1h_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sig1h x29, x2, x9 # perform operation +80001500: 5e910eb3 sha512sig1h x29,x2,x9 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sig1h_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001504: 0001a383 lw x7,0(x3) +80001508: 01d38863 beq x7,x29,80001518 +8000150c: 00c0446f jal x8,80005518 +80001510: 80001500 .word 0x80001500 +80001514: 8000ab6c .word 0x8000ab6c +80001518: 00418193 addi x3,x3,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xfe8242cd +8000151c: 00092203 lw x4,0(x18) +80001520: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x55555555 +80001524: 00092083 lw x1,0(x18) +80001528: 00490913 addi x18,x18,4 + +8000152c : +Zknh_sha512sig1h_cg_cp_rs2_edges_0x55555555: + sha512sig1h x22, x4, x1 # perform operation +8000152c: 5e120b33 sha512sig1h x22,x4,x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cp_rs2_edges_0x55555555, Zknh_sha512sig1h_cg_cp_rs2_edges_0x55555555_str) +80001530: 0001a383 lw x7,0(x3) +80001534: 01638863 beq x7,x22,80001544 +80001538: 7e10346f jal x8,80005518 +8000153c: 8000152c .word 0x8000152c +80001540: 8000abb4 .word 0x8000abb4 +80001544: 00418193 addi x3,x3,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x00000000 +80001548: 00092d03 lw x26,0(x18) +8000154c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000000 +80001550: 00092583 lw x11,0(x18) +80001554: 00490913 addi x18,x18,4 + +80001558 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sig1h x25, x26, x11 # perform operation +80001558: 5ebd0cb3 sha512sig1h x25,x26,x11 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000155c: 0001a383 lw x7,0(x3) +80001560: 01938863 beq x7,x25,80001570 +80001564: 7b50346f jal x8,80005518 +80001568: 80001558 .word 0x80001558 +8000156c: 8000abfc .word 0x8000abfc +80001570: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x00000000 +80001574: 00092b03 lw x22,0(x18) +80001578: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x00000001 +8000157c: 00092983 lw x19,0(x18) +80001580: 00490913 addi x18,x18,4 + +80001584 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sig1h x29, x22, x19 # perform operation +80001584: 5f3b0eb3 sha512sig1h x29,x22,x19 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001588: 0001a383 lw x7,0(x3) +8000158c: 01d38863 beq x7,x29,8000159c +80001590: 7890346f jal x8,80005518 +80001594: 80001584 .word 0x80001584 +80001598: 8000ac54 .word 0x8000ac54 +8000159c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x00000000 +800015a0: 00092d03 lw x26,0(x18) +800015a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x00000002 +800015a8: 00092c83 lw x25,0(x18) +800015ac: 00490913 addi x18,x18,4 + +800015b0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sig1h x24, x26, x25 # perform operation +800015b0: 5f9d0c33 sha512sig1h x24,x26,x25 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b4: 0001a383 lw x7,0(x3) +800015b8: 01838863 beq x7,x24,800015c8 +800015bc: 75d0346f jal x8,80005518 +800015c0: 800015b0 .word 0x800015b0 +800015c4: 8000acac .word 0x8000acac +800015c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000000 +800015cc: 00092083 lw x1,0(x18) +800015d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000000 +800015d4: 00092b83 lw x23,0(x18) +800015d8: 00490913 addi x18,x18,4 + +800015dc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sig1h x25, x1, x23 # perform operation +800015dc: 5f708cb3 sha512sig1h x25,x1,x23 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e0: 0001a383 lw x7,0(x3) +800015e4: 01938863 beq x7,x25,800015f4 +800015e8: 7310346f jal x8,80005518 +800015ec: 800015dc .word 0x800015dc +800015f0: 8000ad04 .word 0x8000ad04 +800015f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x00000000 +800015f8: 00092503 lw x10,0(x18) +800015fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x80000001 +80001600: 00092303 lw x6,0(x18) +80001604: 00490913 addi x18,x18,4 + +80001608 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sig1h x24, x10, x6 # perform operation +80001608: 5e650c33 sha512sig1h x24,x10,x6 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000160c: 0001a383 lw x7,0(x3) +80001610: 01838863 beq x7,x24,80001620 +80001614: 7050346f jal x8,80005518 +80001618: 80001608 .word 0x80001608 +8000161c: 8000ad63 .word 0x8000ad63 +80001620: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000000 +80001624: 00092d83 lw x27,0(x18) +80001628: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x7fffffff +8000162c: 00092803 lw x16,0(x18) +80001630: 00490913 addi x18,x18,4 + +80001634 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sig1h x19, x27, x16 # perform operation +80001634: 5f0d89b3 sha512sig1h x19,x27,x16 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001638: 0001a383 lw x7,0(x3) +8000163c: 01338863 beq x7,x19,8000164c +80001640: 6d90346f jal x8,80005518 +80001644: 80001634 .word 0x80001634 +80001648: 8000adc2 .word 0x8000adc2 +8000164c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x00000000 +80001650: 00092803 lw x16,0(x18) +80001654: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x7ffffffe +80001658: 00092603 lw x12,0(x18) +8000165c: 00490913 addi x18,x18,4 + +80001660 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sig1h x10, x16, x12 # perform operation +80001660: 5ec80533 sha512sig1h x10,x16,x12 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001664: 0001a383 lw x7,0(x3) +80001668: 00a38863 beq x7,x10,80001678 +8000166c: 6ad0346f jal x8,80005518 +80001670: 80001660 .word 0x80001660 +80001674: 8000ae21 .word 0x8000ae21 +80001678: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x00000000 +8000167c: 00092f03 lw x30,0(x18) +80001680: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xffffffff +80001684: 00092683 lw x13,0(x18) +80001688: 00490913 addi x18,x18,4 + +8000168c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sig1h x24, x30, x13 # perform operation +8000168c: 5edf0c33 sha512sig1h x24,x30,x13 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001690: 0001a383 lw x7,0(x3) +80001694: 01838863 beq x7,x24,800016a4 +80001698: 6810346f jal x8,80005518 +8000169c: 8000168c .word 0x8000168c +800016a0: 8000ae80 .word 0x8000ae80 +800016a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x00000000 +800016a8: 00092783 lw x15,0(x18) +800016ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xfffffffe +800016b0: 00092f83 lw x31,0(x18) +800016b4: 00490913 addi x18,x18,4 + +800016b8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sig1h x14, x15, x31 # perform operation +800016b8: 5ff78733 sha512sig1h x14,x15,x31 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016bc: 0001a383 lw x7,0(x3) +800016c0: 00e38863 beq x7,x14,800016d0 +800016c4: 6550346f jal x8,80005518 +800016c8: 800016b8 .word 0x800016b8 +800016cc: 8000aedf .word 0x8000aedf +800016d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x00000000 +800016d4: 00092483 lw x9,0(x18) +800016d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x5bbc8872 +800016dc: 00092c83 lw x25,0(x18) +800016e0: 00490913 addi x18,x18,4 + +800016e4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sig1h x2, x9, x25 # perform operation +800016e4: 5f948133 sha512sig1h x2,x9,x25 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e8: 0001a383 lw x7,0(x3) +800016ec: 00238863 beq x7,x2,800016fc +800016f0: 6290346f jal x8,80005518 +800016f4: 800016e4 .word 0x800016e4 +800016f8: 8000af3e .word 0x8000af3e +800016fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x00000000 +80001700: 00092483 lw x9,0(x18) +80001704: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xaaaaaaaa +80001708: 00092c03 lw x24,0(x18) +8000170c: 00490913 addi x18,x18,4 + +80001710 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sig1h x23, x9, x24 # perform operation +80001710: 5f848bb3 sha512sig1h x23,x9,x24 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001714: 0001a383 lw x7,0(x3) +80001718: 01738863 beq x7,x23,80001728 +8000171c: 5fd0346f jal x8,80005518 +80001720: 80001710 .word 0x80001710 +80001724: 8000af9d .word 0x8000af9d +80001728: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x00000000 +8000172c: 00092c83 lw x25,0(x18) +80001730: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x55555555 +80001734: 00092f03 lw x30,0(x18) +80001738: 00490913 addi x18,x18,4 + +8000173c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sig1h x21, x25, x30 # perform operation +8000173c: 5fec8ab3 sha512sig1h x21,x25,x30 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001740: 0001a383 lw x7,0(x3) +80001744: 01538863 beq x7,x21,80001754 +80001748: 5d10346f jal x8,80005518 +8000174c: 8000173c .word 0x8000173c +80001750: 8000affc .word 0x8000affc +80001754: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x00000001 +80001758: 00092203 lw x4,0(x18) +8000175c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x00000000 +80001760: 00092283 lw x5,0(x18) +80001764: 00490913 addi x18,x18,4 + +80001768 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sig1h x2, x4, x5 # perform operation +80001768: 5e520133 sha512sig1h x2,x4,x5 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000176c: 0001a383 lw x7,0(x3) +80001770: 00238863 beq x7,x2,80001780 +80001774: 5a50346f jal x8,80005518 +80001778: 80001768 .word 0x80001768 +8000177c: 8000b05b .word 0x8000b05b +80001780: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x00000001 +80001784: 00092283 lw x5,0(x18) +80001788: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x00000001 +8000178c: 00092c83 lw x25,0(x18) +80001790: 00490913 addi x18,x18,4 + +80001794 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sig1h x14, x5, x25 # perform operation +80001794: 5f928733 sha512sig1h x14,x5,x25 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001798: 0001a383 lw x7,0(x3) +8000179c: 00e38863 beq x7,x14,800017ac +800017a0: 5790346f jal x8,80005518 +800017a4: 80001794 .word 0x80001794 +800017a8: 8000b0b3 .word 0x8000b0b3 +800017ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000001 +800017b0: 00092083 lw x1,0(x18) +800017b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x00000002 +800017b8: 00092883 lw x17,0(x18) +800017bc: 00490913 addi x18,x18,4 + +800017c0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sig1h x24, x1, x17 # perform operation +800017c0: 5f108c33 sha512sig1h x24,x1,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c4: 0001a383 lw x7,0(x3) +800017c8: 01838863 beq x7,x24,800017d8 +800017cc: 54d0346f jal x8,80005518 +800017d0: 800017c0 .word 0x800017c0 +800017d4: 8000b10b .word 0x8000b10b +800017d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x00000001 +800017dc: 00092983 lw x19,0(x18) +800017e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x80000000 +800017e4: 00092703 lw x14,0(x18) +800017e8: 00490913 addi x18,x18,4 + +800017ec : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sig1h x13, x19, x14 # perform operation +800017ec: 5ee986b3 sha512sig1h x13,x19,x14 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f0: 0001a383 lw x7,0(x3) +800017f4: 00d38863 beq x7,x13,80001804 +800017f8: 5210346f jal x8,80005518 +800017fc: 800017ec .word 0x800017ec +80001800: 8000b163 .word 0x8000b163 +80001804: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000001 +80001808: 00092a03 lw x20,0(x18) +8000180c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x80000001 +80001810: 00092883 lw x17,0(x18) +80001814: 00490913 addi x18,x18,4 + +80001818 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sig1h x4, x20, x17 # perform operation +80001818: 5f1a0233 sha512sig1h x4,x20,x17 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000181c: 0001a383 lw x7,0(x3) +80001820: 00438863 beq x7,x4,80001830 +80001824: 4f50346f jal x8,80005518 +80001828: 80001818 .word 0x80001818 +8000182c: 8000b1c2 .word 0x8000b1c2 +80001830: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x00000001 +80001834: 00092583 lw x11,0(x18) +80001838: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x7fffffff +8000183c: 00092503 lw x10,0(x18) +80001840: 00490913 addi x18,x18,4 + +80001844 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sig1h x25, x11, x10 # perform operation +80001844: 5ea58cb3 sha512sig1h x25,x11,x10 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001848: 0001a383 lw x7,0(x3) +8000184c: 01938863 beq x7,x25,8000185c +80001850: 4c90346f jal x8,80005518 +80001854: 80001844 .word 0x80001844 +80001858: 8000b221 .word 0x8000b221 +8000185c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x00000001 +80001860: 00092b03 lw x22,0(x18) +80001864: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x7ffffffe +80001868: 00092c83 lw x25,0(x18) +8000186c: 00490913 addi x18,x18,4 + +80001870 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sig1h x11, x22, x25 # perform operation +80001870: 5f9b05b3 sha512sig1h x11,x22,x25 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001874: 0001a383 lw x7,0(x3) +80001878: 00b38863 beq x7,x11,80001888 +8000187c: 49d0346f jal x8,80005518 +80001880: 80001870 .word 0x80001870 +80001884: 8000b280 .word 0x8000b280 +80001888: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x00000001 +8000188c: 00092103 lw x2,0(x18) +80001890: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xffffffff +80001894: 00092503 lw x10,0(x18) +80001898: 00490913 addi x18,x18,4 + +8000189c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sig1h x6, x2, x10 # perform operation +8000189c: 5ea10333 sha512sig1h x6,x2,x10 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a0: 0001a383 lw x7,0(x3) +800018a4: 00638863 beq x7,x6,800018b4 +800018a8: 4710346f jal x8,80005518 +800018ac: 8000189c .word 0x8000189c +800018b0: 8000b2df .word 0x8000b2df +800018b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000001 +800018b8: 00092083 lw x1,0(x18) +800018bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xfffffffe +800018c0: 00092e83 lw x29,0(x18) +800018c4: 00490913 addi x18,x18,4 + +800018c8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sig1h x2, x1, x29 # perform operation +800018c8: 5fd08133 sha512sig1h x2,x1,x29 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018cc: 0001a383 lw x7,0(x3) +800018d0: 00238863 beq x7,x2,800018e0 +800018d4: 4450346f jal x8,80005518 +800018d8: 800018c8 .word 0x800018c8 +800018dc: 8000b33e .word 0x8000b33e +800018e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x00000001 +800018e4: 00092283 lw x5,0(x18) +800018e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x5bbc8872 +800018ec: 00092e83 lw x29,0(x18) +800018f0: 00490913 addi x18,x18,4 + +800018f4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sig1h x28, x5, x29 # perform operation +800018f4: 5fd28e33 sha512sig1h x28,x5,x29 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f8: 0001a383 lw x7,0(x3) +800018fc: 01c38863 beq x7,x28,8000190c +80001900: 4190346f jal x8,80005518 +80001904: 800018f4 .word 0x800018f4 +80001908: 8000b39d .word 0x8000b39d +8000190c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x00000001 +80001910: 00092683 lw x13,0(x18) +80001914: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xaaaaaaaa +80001918: 00092d03 lw x26,0(x18) +8000191c: 00490913 addi x18,x18,4 + +80001920 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sig1h x6, x13, x26 # perform operation +80001920: 5fa68333 sha512sig1h x6,x13,x26 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001924: 0001a383 lw x7,0(x3) +80001928: 00638863 beq x7,x6,80001938 +8000192c: 3ed0346f jal x8,80005518 +80001930: 80001920 .word 0x80001920 +80001934: 8000b3fc .word 0x8000b3fc +80001938: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x00000001 +8000193c: 00092703 lw x14,0(x18) +80001940: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x55555555 +80001944: 00092f83 lw x31,0(x18) +80001948: 00490913 addi x18,x18,4 + +8000194c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sig1h x15, x14, x31 # perform operation +8000194c: 5ff707b3 sha512sig1h x15,x14,x31 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001950: 0001a383 lw x7,0(x3) +80001954: 00f38863 beq x7,x15,80001964 +80001958: 3c10346f jal x8,80005518 +8000195c: 8000194c .word 0x8000194c +80001960: 8000b45b .word 0x8000b45b +80001964: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x00000002 +80001968: 00092203 lw x4,0(x18) +8000196c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x00000000 +80001970: 00092e83 lw x29,0(x18) +80001974: 00490913 addi x18,x18,4 + +80001978 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sig1h x21, x4, x29 # perform operation +80001978: 5fd20ab3 sha512sig1h x21,x4,x29 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000197c: 0001a383 lw x7,0(x3) +80001980: 01538863 beq x7,x21,80001990 +80001984: 3950346f jal x8,80005518 +80001988: 80001978 .word 0x80001978 +8000198c: 8000b4ba .word 0x8000b4ba +80001990: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x00000002 +80001994: 00092c83 lw x25,0(x18) +80001998: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x00000001 +8000199c: 00092983 lw x19,0(x18) +800019a0: 00490913 addi x18,x18,4 + +800019a4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sig1h x21, x25, x19 # perform operation +800019a4: 5f3c8ab3 sha512sig1h x21,x25,x19 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a8: 0001a383 lw x7,0(x3) +800019ac: 01538863 beq x7,x21,800019bc +800019b0: 3690346f jal x8,80005518 +800019b4: 800019a4 .word 0x800019a4 +800019b8: 8000b512 .word 0x8000b512 +800019bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x00000002 +800019c0: 00092203 lw x4,0(x18) +800019c4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x00000002 +800019c8: 00092783 lw x15,0(x18) +800019cc: 00490913 addi x18,x18,4 + +800019d0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sig1h x12, x4, x15 # perform operation +800019d0: 5ef20633 sha512sig1h x12,x4,x15 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d4: 0001a383 lw x7,0(x3) +800019d8: 00c38863 beq x7,x12,800019e8 +800019dc: 33d0346f jal x8,80005518 +800019e0: 800019d0 .word 0x800019d0 +800019e4: 8000b56a .word 0x8000b56a +800019e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000002 +800019ec: 00092a03 lw x20,0(x18) +800019f0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x80000000 +800019f4: 00092503 lw x10,0(x18) +800019f8: 00490913 addi x18,x18,4 + +800019fc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sig1h x26, x20, x10 # perform operation +800019fc: 5eaa0d33 sha512sig1h x26,x20,x10 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a00: 0001a383 lw x7,0(x3) +80001a04: 01a38863 beq x7,x26,80001a14 +80001a08: 3110346f jal x8,80005518 +80001a0c: 800019fc .word 0x800019fc +80001a10: 8000b5c2 .word 0x8000b5c2 +80001a14: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000002 +80001a18: 00092a03 lw x20,0(x18) +80001a1c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x80000001 +80001a20: 00092883 lw x17,0(x18) +80001a24: 00490913 addi x18,x18,4 + +80001a28 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sig1h x24, x20, x17 # perform operation +80001a28: 5f1a0c33 sha512sig1h x24,x20,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a2c: 0001a383 lw x7,0(x3) +80001a30: 01838863 beq x7,x24,80001a40 +80001a34: 2e50346f jal x8,80005518 +80001a38: 80001a28 .word 0x80001a28 +80001a3c: 8000b621 .word 0x8000b621 +80001a40: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000002 +80001a44: 00092a03 lw x20,0(x18) +80001a48: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x7fffffff +80001a4c: 00092f03 lw x30,0(x18) +80001a50: 00490913 addi x18,x18,4 + +80001a54 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sig1h x16, x20, x30 # perform operation +80001a54: 5fea0833 sha512sig1h x16,x20,x30 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a58: 0001a383 lw x7,0(x3) +80001a5c: 01038863 beq x7,x16,80001a6c +80001a60: 2b90346f jal x8,80005518 +80001a64: 80001a54 .word 0x80001a54 +80001a68: 8000b680 .word 0x8000b680 +80001a6c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000002 +80001a70: 00092d83 lw x27,0(x18) +80001a74: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x7ffffffe +80001a78: 00092a83 lw x21,0(x18) +80001a7c: 00490913 addi x18,x18,4 + +80001a80 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sig1h x15, x27, x21 # perform operation +80001a80: 5f5d87b3 sha512sig1h x15,x27,x21 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a84: 0001a383 lw x7,0(x3) +80001a88: 00f38863 beq x7,x15,80001a98 +80001a8c: 28d0346f jal x8,80005518 +80001a90: 80001a80 .word 0x80001a80 +80001a94: 8000b6df .word 0x8000b6df +80001a98: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x00000002 +80001a9c: 00092983 lw x19,0(x18) +80001aa0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xffffffff +80001aa4: 00092e03 lw x28,0(x18) +80001aa8: 00490913 addi x18,x18,4 + +80001aac : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sig1h x16, x19, x28 # perform operation +80001aac: 5fc98833 sha512sig1h x16,x19,x28 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab0: 0001a383 lw x7,0(x3) +80001ab4: 01038863 beq x7,x16,80001ac4 +80001ab8: 2610346f jal x8,80005518 +80001abc: 80001aac .word 0x80001aac +80001ac0: 8000b73e .word 0x8000b73e +80001ac4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x00000002 +80001ac8: 00092603 lw x12,0(x18) +80001acc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xfffffffe +80001ad0: 00092983 lw x19,0(x18) +80001ad4: 00490913 addi x18,x18,4 + +80001ad8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sig1h x6, x12, x19 # perform operation +80001ad8: 5f360333 sha512sig1h x6,x12,x19 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001adc: 0001a383 lw x7,0(x3) +80001ae0: 00638863 beq x7,x6,80001af0 +80001ae4: 2350346f jal x8,80005518 +80001ae8: 80001ad8 .word 0x80001ad8 +80001aec: 8000b79d .word 0x8000b79d +80001af0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x00000002 +80001af4: 00092b83 lw x23,0(x18) +80001af8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x5bbc8872 +80001afc: 00092103 lw x2,0(x18) +80001b00: 00490913 addi x18,x18,4 + +80001b04 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sig1h x29, x23, x2 # perform operation +80001b04: 5e2b8eb3 sha512sig1h x29,x23,x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b08: 0001a383 lw x7,0(x3) +80001b0c: 01d38863 beq x7,x29,80001b1c +80001b10: 2090346f jal x8,80005518 +80001b14: 80001b04 .word 0x80001b04 +80001b18: 8000b7fc .word 0x8000b7fc +80001b1c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x00000002 +80001b20: 00092e03 lw x28,0(x18) +80001b24: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0xaaaaaaaa +80001b28: 00092083 lw x1,0(x18) +80001b2c: 00490913 addi x18,x18,4 + +80001b30 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sig1h x23, x28, x1 # perform operation +80001b30: 5e1e0bb3 sha512sig1h x23,x28,x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b34: 0001a383 lw x7,0(x3) +80001b38: 01738863 beq x7,x23,80001b48 +80001b3c: 1dd0346f jal x8,80005518 +80001b40: 80001b30 .word 0x80001b30 +80001b44: 8000b85b .word 0x8000b85b +80001b48: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x00000002 +80001b4c: 00092a83 lw x21,0(x18) +80001b50: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x55555555 +80001b54: 00092303 lw x6,0(x18) +80001b58: 00490913 addi x18,x18,4 + +80001b5c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sig1h x23, x21, x6 # perform operation +80001b5c: 5e6a8bb3 sha512sig1h x23,x21,x6 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b60: 0001a383 lw x7,0(x3) +80001b64: 01738863 beq x7,x23,80001b74 +80001b68: 1b10346f jal x8,80005518 +80001b6c: 80001b5c .word 0x80001b5c +80001b70: 8000b8ba .word 0x8000b8ba +80001b74: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x80000000 +80001b78: 00092c83 lw x25,0(x18) +80001b7c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x00000000 +80001b80: 00092d83 lw x27,0(x18) +80001b84: 00490913 addi x18,x18,4 + +80001b88 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sig1h x14, x25, x27 # perform operation +80001b88: 5fbc8733 sha512sig1h x14,x25,x27 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b8c: 0001a383 lw x7,0(x3) +80001b90: 00e38863 beq x7,x14,80001ba0 +80001b94: 1850346f jal x8,80005518 +80001b98: 80001b88 .word 0x80001b88 +80001b9c: 8000b919 .word 0x8000b919 +80001ba0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x80000000 +80001ba4: 00092483 lw x9,0(x18) +80001ba8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x00000001 +80001bac: 00092683 lw x13,0(x18) +80001bb0: 00490913 addi x18,x18,4 + +80001bb4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sig1h x27, x9, x13 # perform operation +80001bb4: 5ed48db3 sha512sig1h x27,x9,x13 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb8: 0001a383 lw x7,0(x3) +80001bbc: 01b38863 beq x7,x27,80001bcc +80001bc0: 1590346f jal x8,80005518 +80001bc4: 80001bb4 .word 0x80001bb4 +80001bc8: 8000b978 .word 0x8000b978 +80001bcc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x80000000 +80001bd0: 00092a83 lw x21,0(x18) +80001bd4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x00000002 +80001bd8: 00092783 lw x15,0(x18) +80001bdc: 00490913 addi x18,x18,4 + +80001be0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sig1h x22, x21, x15 # perform operation +80001be0: 5efa8b33 sha512sig1h x22,x21,x15 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be4: 0001a383 lw x7,0(x3) +80001be8: 01638863 beq x7,x22,80001bf8 +80001bec: 12d0346f jal x8,80005518 +80001bf0: 80001be0 .word 0x80001be0 +80001bf4: 8000b9d7 .word 0x8000b9d7 +80001bf8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x80000000 +80001bfc: 00092f83 lw x31,0(x18) +80001c00: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x80000000 +80001c04: 00092483 lw x9,0(x18) +80001c08: 00490913 addi x18,x18,4 + +80001c0c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sig1h x16, x31, x9 # perform operation +80001c0c: 5e9f8833 sha512sig1h x16,x31,x9 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c10: 0001a383 lw x7,0(x3) +80001c14: 01038863 beq x7,x16,80001c24 +80001c18: 1010346f jal x8,80005518 +80001c1c: 80001c0c .word 0x80001c0c +80001c20: 8000ba36 .word 0x8000ba36 +80001c24: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x80000000 +80001c28: 00092c03 lw x24,0(x18) +80001c2c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000001 +80001c30: 00092b83 lw x23,0(x18) +80001c34: 00490913 addi x18,x18,4 + +80001c38 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sig1h x5, x24, x23 # perform operation +80001c38: 5f7c02b3 sha512sig1h x5,x24,x23 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c3c: 0001a383 lw x7,0(x3) +80001c40: 00538863 beq x7,x5,80001c50 +80001c44: 0d50346f jal x8,80005518 +80001c48: 80001c38 .word 0x80001c38 +80001c4c: 8000ba9c .word 0x8000ba9c +80001c50: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x80000000 +80001c54: 00092983 lw x19,0(x18) +80001c58: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x7fffffff +80001c5c: 00092e83 lw x29,0(x18) +80001c60: 00490913 addi x18,x18,4 + +80001c64 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sig1h x23, x19, x29 # perform operation +80001c64: 5fd98bb3 sha512sig1h x23,x19,x29 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c68: 0001a383 lw x7,0(x3) +80001c6c: 01738863 beq x7,x23,80001c7c +80001c70: 0a90346f jal x8,80005518 +80001c74: 80001c64 .word 0x80001c64 +80001c78: 8000bb02 .word 0x8000bb02 +80001c7c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x80000000 +80001c80: 00092e83 lw x29,0(x18) +80001c84: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x7ffffffe +80001c88: 00092d03 lw x26,0(x18) +80001c8c: 00490913 addi x18,x18,4 + +80001c90 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sig1h x11, x29, x26 # perform operation +80001c90: 5fae85b3 sha512sig1h x11,x29,x26 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c94: 0001a383 lw x7,0(x3) +80001c98: 00b38863 beq x7,x11,80001ca8 +80001c9c: 07d0346f jal x8,80005518 +80001ca0: 80001c90 .word 0x80001c90 +80001ca4: 8000bb68 .word 0x8000bb68 +80001ca8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x80000000 +80001cac: 00092103 lw x2,0(x18) +80001cb0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xffffffff +80001cb4: 00092c83 lw x25,0(x18) +80001cb8: 00490913 addi x18,x18,4 + +80001cbc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sig1h x10, x2, x25 # perform operation +80001cbc: 5f910533 sha512sig1h x10,x2,x25 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc0: 0001a383 lw x7,0(x3) +80001cc4: 00a38863 beq x7,x10,80001cd4 +80001cc8: 0510346f jal x8,80005518 +80001ccc: 80001cbc .word 0x80001cbc +80001cd0: 8000bbce .word 0x8000bbce +80001cd4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x80000000 +80001cd8: 00092d83 lw x27,0(x18) +80001cdc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xfffffffe +80001ce0: 00092e83 lw x29,0(x18) +80001ce4: 00490913 addi x18,x18,4 + +80001ce8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sig1h x6, x27, x29 # perform operation +80001ce8: 5fdd8333 sha512sig1h x6,x27,x29 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cec: 0001a383 lw x7,0(x3) +80001cf0: 00638863 beq x7,x6,80001d00 +80001cf4: 0250346f jal x8,80005518 +80001cf8: 80001ce8 .word 0x80001ce8 +80001cfc: 8000bc34 .word 0x8000bc34 +80001d00: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x80000000 +80001d04: 00092883 lw x17,0(x18) +80001d08: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x5bbc8872 +80001d0c: 00092d03 lw x26,0(x18) +80001d10: 00490913 addi x18,x18,4 + +80001d14 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sig1h x16, x17, x26 # perform operation +80001d14: 5fa88833 sha512sig1h x16,x17,x26 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d18: 0001a383 lw x7,0(x3) +80001d1c: 01038863 beq x7,x16,80001d2c +80001d20: 7f80346f jal x8,80005518 +80001d24: 80001d14 .word 0x80001d14 +80001d28: 8000bc9a .word 0x8000bc9a +80001d2c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x80000000 +80001d30: 00092e83 lw x29,0(x18) +80001d34: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xaaaaaaaa +80001d38: 00092883 lw x17,0(x18) +80001d3c: 00490913 addi x18,x18,4 + +80001d40 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sig1h x19, x29, x17 # perform operation +80001d40: 5f1e89b3 sha512sig1h x19,x29,x17 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d44: 0001a383 lw x7,0(x3) +80001d48: 01338863 beq x7,x19,80001d58 +80001d4c: 7cc0346f jal x8,80005518 +80001d50: 80001d40 .word 0x80001d40 +80001d54: 8000bd00 .word 0x8000bd00 +80001d58: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x80000000 +80001d5c: 00092783 lw x15,0(x18) +80001d60: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x55555555 +80001d64: 00092883 lw x17,0(x18) +80001d68: 00490913 addi x18,x18,4 + +80001d6c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sig1h x12, x15, x17 # perform operation +80001d6c: 5f178633 sha512sig1h x12,x15,x17 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d70: 0001a383 lw x7,0(x3) +80001d74: 00c38863 beq x7,x12,80001d84 +80001d78: 7a00346f jal x8,80005518 +80001d7c: 80001d6c .word 0x80001d6c +80001d80: 8000bd66 .word 0x8000bd66 +80001d84: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x80000001 +80001d88: 00092a83 lw x21,0(x18) +80001d8c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x00000000 +80001d90: 00092b83 lw x23,0(x18) +80001d94: 00490913 addi x18,x18,4 + +80001d98 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sig1h x6, x21, x23 # perform operation +80001d98: 5f7a8333 sha512sig1h x6,x21,x23 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d9c: 0001a383 lw x7,0(x3) +80001da0: 00638863 beq x7,x6,80001db0 +80001da4: 7740346f jal x8,80005518 +80001da8: 80001d98 .word 0x80001d98 +80001dac: 8000bdcc .word 0x8000bdcc +80001db0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x80000001 +80001db4: 00092283 lw x5,0(x18) +80001db8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x00000001 +80001dbc: 00092d83 lw x27,0(x18) +80001dc0: 00490913 addi x18,x18,4 + +80001dc4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sig1h x19, x5, x27 # perform operation +80001dc4: 5fb289b3 sha512sig1h x19,x5,x27 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc8: 0001a383 lw x7,0(x3) +80001dcc: 01338863 beq x7,x19,80001ddc +80001dd0: 7480346f jal x8,80005518 +80001dd4: 80001dc4 .word 0x80001dc4 +80001dd8: 8000be2b .word 0x8000be2b +80001ddc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x80000001 +80001de0: 00092e03 lw x28,0(x18) +80001de4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000002 +80001de8: 00092583 lw x11,0(x18) +80001dec: 00490913 addi x18,x18,4 + +80001df0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sig1h x26, x28, x11 # perform operation +80001df0: 5ebe0d33 sha512sig1h x26,x28,x11 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df4: 0001a383 lw x7,0(x3) +80001df8: 01a38863 beq x7,x26,80001e08 +80001dfc: 71c0346f jal x8,80005518 +80001e00: 80001df0 .word 0x80001df0 +80001e04: 8000be8a .word 0x8000be8a +80001e08: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x80000001 +80001e0c: 00092583 lw x11,0(x18) +80001e10: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x80000000 +80001e14: 00092883 lw x17,0(x18) +80001e18: 00490913 addi x18,x18,4 + +80001e1c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sig1h x28, x11, x17 # perform operation +80001e1c: 5f158e33 sha512sig1h x28,x11,x17 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e20: 0001a383 lw x7,0(x3) +80001e24: 01c38863 beq x7,x28,80001e34 +80001e28: 6f00346f jal x8,80005518 +80001e2c: 80001e1c .word 0x80001e1c +80001e30: 8000bee9 .word 0x8000bee9 +80001e34: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x80000001 +80001e38: 00092f03 lw x30,0(x18) +80001e3c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x80000001 +80001e40: 00092483 lw x9,0(x18) +80001e44: 00490913 addi x18,x18,4 + +80001e48 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sig1h x28, x30, x9 # perform operation +80001e48: 5e9f0e33 sha512sig1h x28,x30,x9 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e4c: 0001a383 lw x7,0(x3) +80001e50: 01c38863 beq x7,x28,80001e60 +80001e54: 6c40346f jal x8,80005518 +80001e58: 80001e48 .word 0x80001e48 +80001e5c: 8000bf4f .word 0x8000bf4f +80001e60: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x80000001 +80001e64: 00092483 lw x9,0(x18) +80001e68: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x7fffffff +80001e6c: 00092083 lw x1,0(x18) +80001e70: 00490913 addi x18,x18,4 + +80001e74 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sig1h x25, x9, x1 # perform operation +80001e74: 5e148cb3 sha512sig1h x25,x9,x1 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e78: 0001a383 lw x7,0(x3) +80001e7c: 01938863 beq x7,x25,80001e8c +80001e80: 6980346f jal x8,80005518 +80001e84: 80001e74 .word 0x80001e74 +80001e88: 8000bfb5 .word 0x8000bfb5 +80001e8c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x80000001 +80001e90: 00092d03 lw x26,0(x18) +80001e94: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x7ffffffe +80001e98: 00092483 lw x9,0(x18) +80001e9c: 00490913 addi x18,x18,4 + +80001ea0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sig1h x30, x26, x9 # perform operation +80001ea0: 5e9d0f33 sha512sig1h x30,x26,x9 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea4: 0001a383 lw x7,0(x3) +80001ea8: 01e38863 beq x7,x30,80001eb8 +80001eac: 66c0346f jal x8,80005518 +80001eb0: 80001ea0 .word 0x80001ea0 +80001eb4: 8000c01b .word 0x8000c01b +80001eb8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x80000001 +80001ebc: 00092303 lw x6,0(x18) +80001ec0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xffffffff +80001ec4: 00092c03 lw x24,0(x18) +80001ec8: 00490913 addi x18,x18,4 + +80001ecc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sig1h x13, x6, x24 # perform operation +80001ecc: 5f8306b3 sha512sig1h x13,x6,x24 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed0: 0001a383 lw x7,0(x3) +80001ed4: 00d38863 beq x7,x13,80001ee4 +80001ed8: 6400346f jal x8,80005518 +80001edc: 80001ecc .word 0x80001ecc +80001ee0: 8000c081 .word 0x8000c081 +80001ee4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x80000001 +80001ee8: 00092703 lw x14,0(x18) +80001eec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xfffffffe +80001ef0: 00092983 lw x19,0(x18) +80001ef4: 00490913 addi x18,x18,4 + +80001ef8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sig1h x1, x14, x19 # perform operation +80001ef8: 5f3700b3 sha512sig1h x1,x14,x19 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001efc: 0001a383 lw x7,0(x3) +80001f00: 00138863 beq x7,x1,80001f10 +80001f04: 6140346f jal x8,80005518 +80001f08: 80001ef8 .word 0x80001ef8 +80001f0c: 8000c0e7 .word 0x8000c0e7 +80001f10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x80000001 +80001f14: 00092583 lw x11,0(x18) +80001f18: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x5bbc8872 +80001f1c: 00092883 lw x17,0(x18) +80001f20: 00490913 addi x18,x18,4 + +80001f24 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sig1h x12, x11, x17 # perform operation +80001f24: 5f158633 sha512sig1h x12,x11,x17 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f28: 0001a383 lw x7,0(x3) +80001f2c: 00c38863 beq x7,x12,80001f3c +80001f30: 5e80346f jal x8,80005518 +80001f34: 80001f24 .word 0x80001f24 +80001f38: 8000c14d .word 0x8000c14d +80001f3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x80000001 +80001f40: 00092783 lw x15,0(x18) +80001f44: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xaaaaaaaa +80001f48: 00092a83 lw x21,0(x18) +80001f4c: 00490913 addi x18,x18,4 + +80001f50 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sig1h x17, x15, x21 # perform operation +80001f50: 5f5788b3 sha512sig1h x17,x15,x21 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f54: 0001a383 lw x7,0(x3) +80001f58: 01138863 beq x7,x17,80001f68 +80001f5c: 5bc0346f jal x8,80005518 +80001f60: 80001f50 .word 0x80001f50 +80001f64: 8000c1b3 .word 0x8000c1b3 +80001f68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x80000001 +80001f6c: 00092b03 lw x22,0(x18) +80001f70: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x55555555 +80001f74: 00092783 lw x15,0(x18) +80001f78: 00490913 addi x18,x18,4 + +80001f7c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sig1h x2, x22, x15 # perform operation +80001f7c: 5efb0133 sha512sig1h x2,x22,x15 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f80: 0001a383 lw x7,0(x3) +80001f84: 00238863 beq x7,x2,80001f94 +80001f88: 5900346f jal x8,80005518 +80001f8c: 80001f7c .word 0x80001f7c +80001f90: 8000c219 .word 0x8000c219 +80001f94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7fffffff +80001f98: 00092503 lw x10,0(x18) +80001f9c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x00000000 +80001fa0: 00092e03 lw x28,0(x18) +80001fa4: 00490913 addi x18,x18,4 + +80001fa8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sig1h x2, x10, x28 # perform operation +80001fa8: 5fc50133 sha512sig1h x2,x10,x28 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fac: 0001a383 lw x7,0(x3) +80001fb0: 00238863 beq x7,x2,80001fc0 +80001fb4: 5640346f jal x8,80005518 +80001fb8: 80001fa8 .word 0x80001fa8 +80001fbc: 8000c27f .word 0x8000c27f +80001fc0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x7fffffff +80001fc4: 00092703 lw x14,0(x18) +80001fc8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x00000001 +80001fcc: 00092c83 lw x25,0(x18) +80001fd0: 00490913 addi x18,x18,4 + +80001fd4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sig1h x5, x14, x25 # perform operation +80001fd4: 5f9702b3 sha512sig1h x5,x14,x25 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd8: 0001a383 lw x7,0(x3) +80001fdc: 00538863 beq x7,x5,80001fec +80001fe0: 5380346f jal x8,80005518 +80001fe4: 80001fd4 .word 0x80001fd4 +80001fe8: 8000c2de .word 0x8000c2de +80001fec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7fffffff +80001ff0: 00092883 lw x17,0(x18) +80001ff4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x00000002 +80001ff8: 00092083 lw x1,0(x18) +80001ffc: 00490913 addi x18,x18,4 + +80002000 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sig1h x11, x17, x1 # perform operation +80002000: 5e1885b3 sha512sig1h x11,x17,x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002004: 0001a383 lw x7,0(x3) +80002008: 00b38863 beq x7,x11,80002018 +8000200c: 50c0346f jal x8,80005518 +80002010: 80002000 .word 0x80002000 +80002014: 8000c33d .word 0x8000c33d +80002018: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x7fffffff +8000201c: 00092603 lw x12,0(x18) +80002020: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x80000000 +80002024: 00092d03 lw x26,0(x18) +80002028: 00490913 addi x18,x18,4 + +8000202c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sig1h x2, x12, x26 # perform operation +8000202c: 5fa60133 sha512sig1h x2,x12,x26 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002030: 0001a383 lw x7,0(x3) +80002034: 00238863 beq x7,x2,80002044 +80002038: 4e00346f jal x8,80005518 +8000203c: 8000202c .word 0x8000202c +80002040: 8000c39c .word 0x8000c39c +80002044: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7fffffff +80002048: 00092883 lw x17,0(x18) +8000204c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x80000001 +80002050: 00092e83 lw x29,0(x18) +80002054: 00490913 addi x18,x18,4 + +80002058 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sig1h x23, x17, x29 # perform operation +80002058: 5fd88bb3 sha512sig1h x23,x17,x29 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000205c: 0001a383 lw x7,0(x3) +80002060: 01738863 beq x7,x23,80002070 +80002064: 4b40346f jal x8,80005518 +80002068: 80002058 .word 0x80002058 +8000206c: 8000c402 .word 0x8000c402 +80002070: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x7fffffff +80002074: 00092483 lw x9,0(x18) +80002078: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x7fffffff +8000207c: 00092f83 lw x31,0(x18) +80002080: 00490913 addi x18,x18,4 + +80002084 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sig1h x12, x9, x31 # perform operation +80002084: 5ff48633 sha512sig1h x12,x9,x31 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002088: 0001a383 lw x7,0(x3) +8000208c: 00c38863 beq x7,x12,8000209c +80002090: 4880346f jal x8,80005518 +80002094: 80002084 .word 0x80002084 +80002098: 8000c468 .word 0x8000c468 +8000209c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x7fffffff +800020a0: 00092703 lw x14,0(x18) +800020a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x7ffffffe +800020a8: 00092c03 lw x24,0(x18) +800020ac: 00490913 addi x18,x18,4 + +800020b0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sig1h x23, x14, x24 # perform operation +800020b0: 5f870bb3 sha512sig1h x23,x14,x24 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b4: 0001a383 lw x7,0(x3) +800020b8: 01738863 beq x7,x23,800020c8 +800020bc: 45c0346f jal x8,80005518 +800020c0: 800020b0 .word 0x800020b0 +800020c4: 8000c4ce .word 0x8000c4ce +800020c8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x7fffffff +800020cc: 00092d03 lw x26,0(x18) +800020d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xffffffff +800020d4: 00092483 lw x9,0(x18) +800020d8: 00490913 addi x18,x18,4 + +800020dc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sig1h x4, x26, x9 # perform operation +800020dc: 5e9d0233 sha512sig1h x4,x26,x9 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e0: 0001a383 lw x7,0(x3) +800020e4: 00438863 beq x7,x4,800020f4 +800020e8: 4300346f jal x8,80005518 +800020ec: 800020dc .word 0x800020dc +800020f0: 8000c534 .word 0x8000c534 +800020f4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7fffffff +800020f8: 00092503 lw x10,0(x18) +800020fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0xfffffffe +80002100: 00092283 lw x5,0(x18) +80002104: 00490913 addi x18,x18,4 + +80002108 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sig1h x4, x10, x5 # perform operation +80002108: 5e550233 sha512sig1h x4,x10,x5 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000210c: 0001a383 lw x7,0(x3) +80002110: 00438863 beq x7,x4,80002120 +80002114: 4040346f jal x8,80005518 +80002118: 80002108 .word 0x80002108 +8000211c: 8000c59a .word 0x8000c59a +80002120: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7fffffff +80002124: 00092883 lw x17,0(x18) +80002128: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x5bbc8872 +8000212c: 00092303 lw x6,0(x18) +80002130: 00490913 addi x18,x18,4 + +80002134 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sig1h x21, x17, x6 # perform operation +80002134: 5e688ab3 sha512sig1h x21,x17,x6 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002138: 0001a383 lw x7,0(x3) +8000213c: 01538863 beq x7,x21,8000214c +80002140: 3d80346f jal x8,80005518 +80002144: 80002134 .word 0x80002134 +80002148: 8000c600 .word 0x8000c600 +8000214c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x7fffffff +80002150: 00092e83 lw x29,0(x18) +80002154: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xaaaaaaaa +80002158: 00092f83 lw x31,0(x18) +8000215c: 00490913 addi x18,x18,4 + +80002160 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sig1h x15, x29, x31 # perform operation +80002160: 5ffe87b3 sha512sig1h x15,x29,x31 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002164: 0001a383 lw x7,0(x3) +80002168: 00f38863 beq x7,x15,80002178 +8000216c: 3ac0346f jal x8,80005518 +80002170: 80002160 .word 0x80002160 +80002174: 8000c666 .word 0x8000c666 +80002178: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x7fffffff +8000217c: 00092d03 lw x26,0(x18) +80002180: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x55555555 +80002184: 00092b83 lw x23,0(x18) +80002188: 00490913 addi x18,x18,4 + +8000218c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sig1h x28, x26, x23 # perform operation +8000218c: 5f7d0e33 sha512sig1h x28,x26,x23 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002190: 0001a383 lw x7,0(x3) +80002194: 01c38863 beq x7,x28,800021a4 +80002198: 3800346f jal x8,80005518 +8000219c: 8000218c .word 0x8000218c +800021a0: 8000c6cc .word 0x8000c6cc +800021a4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x7ffffffe +800021a8: 00092483 lw x9,0(x18) +800021ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x00000000 +800021b0: 00092603 lw x12,0(x18) +800021b4: 00490913 addi x18,x18,4 + +800021b8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sig1h x1, x9, x12 # perform operation +800021b8: 5ec480b3 sha512sig1h x1,x9,x12 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021bc: 0001a383 lw x7,0(x3) +800021c0: 00138863 beq x7,x1,800021d0 +800021c4: 3540346f jal x8,80005518 +800021c8: 800021b8 .word 0x800021b8 +800021cc: 8000c732 .word 0x8000c732 +800021d0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x7ffffffe +800021d4: 00092103 lw x2,0(x18) +800021d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x00000001 +800021dc: 00092e83 lw x29,0(x18) +800021e0: 00490913 addi x18,x18,4 + +800021e4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sig1h x12, x2, x29 # perform operation +800021e4: 5fd10633 sha512sig1h x12,x2,x29 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e8: 0001a383 lw x7,0(x3) +800021ec: 00c38863 beq x7,x12,800021fc +800021f0: 3280346f jal x8,80005518 +800021f4: 800021e4 .word 0x800021e4 +800021f8: 8000c791 .word 0x8000c791 +800021fc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x7ffffffe +80002200: 00092483 lw x9,0(x18) +80002204: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x00000002 +80002208: 00092203 lw x4,0(x18) +8000220c: 00490913 addi x18,x18,4 + +80002210 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sig1h x15, x9, x4 # perform operation +80002210: 5e4487b3 sha512sig1h x15,x9,x4 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002214: 0001a383 lw x7,0(x3) +80002218: 00f38863 beq x7,x15,80002228 +8000221c: 2fc0346f jal x8,80005518 +80002220: 80002210 .word 0x80002210 +80002224: 8000c7f0 .word 0x8000c7f0 +80002228: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x7ffffffe +8000222c: 00092603 lw x12,0(x18) +80002230: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x80000000 +80002234: 00092283 lw x5,0(x18) +80002238: 00490913 addi x18,x18,4 + +8000223c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sig1h x30, x12, x5 # perform operation +8000223c: 5e560f33 sha512sig1h x30,x12,x5 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002240: 0001a383 lw x7,0(x3) +80002244: 01e38863 beq x7,x30,80002254 +80002248: 2d00346f jal x8,80005518 +8000224c: 8000223c .word 0x8000223c +80002250: 8000c84f .word 0x8000c84f +80002254: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x7ffffffe +80002258: 00092e03 lw x28,0(x18) +8000225c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x80000001 +80002260: 00092603 lw x12,0(x18) +80002264: 00490913 addi x18,x18,4 + +80002268 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sig1h x26, x28, x12 # perform operation +80002268: 5ece0d33 sha512sig1h x26,x28,x12 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000226c: 0001a383 lw x7,0(x3) +80002270: 01a38863 beq x7,x26,80002280 +80002274: 2a40346f jal x8,80005518 +80002278: 80002268 .word 0x80002268 +8000227c: 8000c8b5 .word 0x8000c8b5 +80002280: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x7ffffffe +80002284: 00092103 lw x2,0(x18) +80002288: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x7fffffff +8000228c: 00092783 lw x15,0(x18) +80002290: 00490913 addi x18,x18,4 + +80002294 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sig1h x26, x2, x15 # perform operation +80002294: 5ef10d33 sha512sig1h x26,x2,x15 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002298: 0001a383 lw x7,0(x3) +8000229c: 01a38863 beq x7,x26,800022ac +800022a0: 2780346f jal x8,80005518 +800022a4: 80002294 .word 0x80002294 +800022a8: 8000c91b .word 0x8000c91b +800022ac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x7ffffffe +800022b0: 00092303 lw x6,0(x18) +800022b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x7ffffffe +800022b8: 00092f83 lw x31,0(x18) +800022bc: 00490913 addi x18,x18,4 + +800022c0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sig1h x24, x6, x31 # perform operation +800022c0: 5ff30c33 sha512sig1h x24,x6,x31 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c4: 0001a383 lw x7,0(x3) +800022c8: 01838863 beq x7,x24,800022d8 +800022cc: 24c0346f jal x8,80005518 +800022d0: 800022c0 .word 0x800022c0 +800022d4: 8000c981 .word 0x8000c981 +800022d8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7ffffffe +800022dc: 00092503 lw x10,0(x18) +800022e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xffffffff +800022e4: 00092d83 lw x27,0(x18) +800022e8: 00490913 addi x18,x18,4 + +800022ec : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sig1h x28, x10, x27 # perform operation +800022ec: 5fb50e33 sha512sig1h x28,x10,x27 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f0: 0001a383 lw x7,0(x3) +800022f4: 01c38863 beq x7,x28,80002304 +800022f8: 2200346f jal x8,80005518 +800022fc: 800022ec .word 0x800022ec +80002300: 8000c9e7 .word 0x8000c9e7 +80002304: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x7ffffffe +80002308: 00092c03 lw x24,0(x18) +8000230c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xfffffffe +80002310: 00092a83 lw x21,0(x18) +80002314: 00490913 addi x18,x18,4 + +80002318 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sig1h x12, x24, x21 # perform operation +80002318: 5f5c0633 sha512sig1h x12,x24,x21 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000231c: 0001a383 lw x7,0(x3) +80002320: 00c38863 beq x7,x12,80002330 +80002324: 1f40346f jal x8,80005518 +80002328: 80002318 .word 0x80002318 +8000232c: 8000ca4d .word 0x8000ca4d +80002330: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x7ffffffe +80002334: 00092983 lw x19,0(x18) +80002338: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x5bbc8872 +8000233c: 00092c83 lw x25,0(x18) +80002340: 00490913 addi x18,x18,4 + +80002344 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sig1h x28, x19, x25 # perform operation +80002344: 5f998e33 sha512sig1h x28,x19,x25 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002348: 0001a383 lw x7,0(x3) +8000234c: 01c38863 beq x7,x28,8000235c +80002350: 1c80346f jal x8,80005518 +80002354: 80002344 .word 0x80002344 +80002358: 8000cab3 .word 0x8000cab3 +8000235c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x7ffffffe +80002360: 00092983 lw x19,0(x18) +80002364: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xaaaaaaaa +80002368: 00092b83 lw x23,0(x18) +8000236c: 00490913 addi x18,x18,4 + +80002370 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sig1h x17, x19, x23 # perform operation +80002370: 5f7988b3 sha512sig1h x17,x19,x23 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002374: 0001a383 lw x7,0(x3) +80002378: 01138863 beq x7,x17,80002388 +8000237c: 19c0346f jal x8,80005518 +80002380: 80002370 .word 0x80002370 +80002384: 8000cb19 .word 0x8000cb19 +80002388: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7ffffffe +8000238c: 00092883 lw x17,0(x18) +80002390: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x55555555 +80002394: 00092203 lw x4,0(x18) +80002398: 00490913 addi x18,x18,4 + +8000239c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sig1h x31, x17, x4 # perform operation +8000239c: 5e488fb3 sha512sig1h x31,x17,x4 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a0: 0001a383 lw x7,0(x3) +800023a4: 01f38863 beq x7,x31,800023b4 +800023a8: 1700346f jal x8,80005518 +800023ac: 8000239c .word 0x8000239c +800023b0: 8000cb7f .word 0x8000cb7f +800023b4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xffffffff +800023b8: 00092d03 lw x26,0(x18) +800023bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x00000000 +800023c0: 00092483 lw x9,0(x18) +800023c4: 00490913 addi x18,x18,4 + +800023c8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sig1h x14, x26, x9 # perform operation +800023c8: 5e9d0733 sha512sig1h x14,x26,x9 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023cc: 0001a383 lw x7,0(x3) +800023d0: 00e38863 beq x7,x14,800023e0 +800023d4: 1440346f jal x8,80005518 +800023d8: 800023c8 .word 0x800023c8 +800023dc: 8000cbe5 .word 0x8000cbe5 +800023e0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xffffffff +800023e4: 00092083 lw x1,0(x18) +800023e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000001 +800023ec: 00092a03 lw x20,0(x18) +800023f0: 00490913 addi x18,x18,4 + +800023f4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sig1h x22, x1, x20 # perform operation +800023f4: 5f408b33 sha512sig1h x22,x1,x20 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f8: 0001a383 lw x7,0(x3) +800023fc: 01638863 beq x7,x22,8000240c +80002400: 1180346f jal x8,80005518 +80002404: 800023f4 .word 0x800023f4 +80002408: 8000cc44 .word 0x8000cc44 +8000240c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xffffffff +80002410: 00092203 lw x4,0(x18) +80002414: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x00000002 +80002418: 00092283 lw x5,0(x18) +8000241c: 00490913 addi x18,x18,4 + +80002420 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sig1h x17, x4, x5 # perform operation +80002420: 5e5208b3 sha512sig1h x17,x4,x5 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002424: 0001a383 lw x7,0(x3) +80002428: 01138863 beq x7,x17,80002438 +8000242c: 0ec0346f jal x8,80005518 +80002430: 80002420 .word 0x80002420 +80002434: 8000cca3 .word 0x8000cca3 +80002438: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xffffffff +8000243c: 00092483 lw x9,0(x18) +80002440: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x80000000 +80002444: 00092783 lw x15,0(x18) +80002448: 00490913 addi x18,x18,4 + +8000244c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sig1h x6, x9, x15 # perform operation +8000244c: 5ef48333 sha512sig1h x6,x9,x15 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002450: 0001a383 lw x7,0(x3) +80002454: 00638863 beq x7,x6,80002464 +80002458: 0c00346f jal x8,80005518 +8000245c: 8000244c .word 0x8000244c +80002460: 8000cd02 .word 0x8000cd02 +80002464: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xffffffff +80002468: 00092b83 lw x23,0(x18) +8000246c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x80000001 +80002470: 00092783 lw x15,0(x18) +80002474: 00490913 addi x18,x18,4 + +80002478 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sig1h x25, x23, x15 # perform operation +80002478: 5efb8cb3 sha512sig1h x25,x23,x15 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000247c: 0001a383 lw x7,0(x3) +80002480: 01938863 beq x7,x25,80002490 +80002484: 0940346f jal x8,80005518 +80002488: 80002478 .word 0x80002478 +8000248c: 8000cd68 .word 0x8000cd68 +80002490: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xffffffff +80002494: 00092983 lw x19,0(x18) +80002498: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x7fffffff +8000249c: 00092f03 lw x30,0(x18) +800024a0: 00490913 addi x18,x18,4 + +800024a4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sig1h x29, x19, x30 # perform operation +800024a4: 5fe98eb3 sha512sig1h x29,x19,x30 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a8: 0001a383 lw x7,0(x3) +800024ac: 01d38863 beq x7,x29,800024bc +800024b0: 0680346f jal x8,80005518 +800024b4: 800024a4 .word 0x800024a4 +800024b8: 8000cdce .word 0x8000cdce +800024bc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0xffffffff +800024c0: 00092f03 lw x30,0(x18) +800024c4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x7ffffffe +800024c8: 00092083 lw x1,0(x18) +800024cc: 00490913 addi x18,x18,4 + +800024d0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sig1h x12, x30, x1 # perform operation +800024d0: 5e1f0633 sha512sig1h x12,x30,x1 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d4: 0001a383 lw x7,0(x3) +800024d8: 00c38863 beq x7,x12,800024e8 +800024dc: 03c0346f jal x8,80005518 +800024e0: 800024d0 .word 0x800024d0 +800024e4: 8000ce34 .word 0x8000ce34 +800024e8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xffffffff +800024ec: 00092083 lw x1,0(x18) +800024f0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xffffffff +800024f4: 00092303 lw x6,0(x18) +800024f8: 00490913 addi x18,x18,4 + +800024fc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sig1h x2, x1, x6 # perform operation +800024fc: 5e608133 sha512sig1h x2,x1,x6 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002500: 0001a383 lw x7,0(x3) +80002504: 00238863 beq x7,x2,80002514 +80002508: 0100346f jal x8,80005518 +8000250c: 800024fc .word 0x800024fc +80002510: 8000ce9a .word 0x8000ce9a +80002514: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xffffffff +80002518: 00092483 lw x9,0(x18) +8000251c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xfffffffe +80002520: 00092103 lw x2,0(x18) +80002524: 00490913 addi x18,x18,4 + +80002528 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sig1h x24, x9, x2 # perform operation +80002528: 5e248c33 sha512sig1h x24,x9,x2 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000252c: 0001a383 lw x7,0(x3) +80002530: 01838863 beq x7,x24,80002540 +80002534: 7e50246f jal x8,80005518 +80002538: 80002528 .word 0x80002528 +8000253c: 8000cf00 .word 0x8000cf00 +80002540: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xffffffff +80002544: 00092203 lw x4,0(x18) +80002548: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x5bbc8872 +8000254c: 00092a83 lw x21,0(x18) +80002550: 00490913 addi x18,x18,4 + +80002554 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sig1h x31, x4, x21 # perform operation +80002554: 5f520fb3 sha512sig1h x31,x4,x21 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002558: 0001a383 lw x7,0(x3) +8000255c: 01f38863 beq x7,x31,8000256c +80002560: 7b90246f jal x8,80005518 +80002564: 80002554 .word 0x80002554 +80002568: 8000cf66 .word 0x8000cf66 +8000256c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xffffffff +80002570: 00092b83 lw x23,0(x18) +80002574: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xaaaaaaaa +80002578: 00092d03 lw x26,0(x18) +8000257c: 00490913 addi x18,x18,4 + +80002580 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sig1h x6, x23, x26 # perform operation +80002580: 5fab8333 sha512sig1h x6,x23,x26 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002584: 0001a383 lw x7,0(x3) +80002588: 00638863 beq x7,x6,80002598 +8000258c: 78d0246f jal x8,80005518 +80002590: 80002580 .word 0x80002580 +80002594: 8000cfcc .word 0x8000cfcc +80002598: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xffffffff +8000259c: 00092483 lw x9,0(x18) +800025a0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x55555555 +800025a4: 00092583 lw x11,0(x18) +800025a8: 00490913 addi x18,x18,4 + +800025ac : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sig1h x22, x9, x11 # perform operation +800025ac: 5eb48b33 sha512sig1h x22,x9,x11 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b0: 0001a383 lw x7,0(x3) +800025b4: 01638863 beq x7,x22,800025c4 +800025b8: 7610246f jal x8,80005518 +800025bc: 800025ac .word 0x800025ac +800025c0: 8000d032 .word 0x8000d032 +800025c4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xfffffffe +800025c8: 00092983 lw x19,0(x18) +800025cc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000000 +800025d0: 00092a03 lw x20,0(x18) +800025d4: 00490913 addi x18,x18,4 + +800025d8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sig1h x21, x19, x20 # perform operation +800025d8: 5f498ab3 sha512sig1h x21,x19,x20 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025dc: 0001a383 lw x7,0(x3) +800025e0: 01538863 beq x7,x21,800025f0 +800025e4: 7350246f jal x8,80005518 +800025e8: 800025d8 .word 0x800025d8 +800025ec: 8000d098 .word 0x8000d098 +800025f0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xfffffffe +800025f4: 00092983 lw x19,0(x18) +800025f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x00000001 +800025fc: 00092803 lw x16,0(x18) +80002600: 00490913 addi x18,x18,4 + +80002604 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sig1h x15, x19, x16 # perform operation +80002604: 5f0987b3 sha512sig1h x15,x19,x16 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002608: 0001a383 lw x7,0(x3) +8000260c: 00f38863 beq x7,x15,8000261c +80002610: 7090246f jal x8,80005518 +80002614: 80002604 .word 0x80002604 +80002618: 8000d0f7 .word 0x8000d0f7 +8000261c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xfffffffe +80002620: 00092b03 lw x22,0(x18) +80002624: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000002 +80002628: 00092a03 lw x20,0(x18) +8000262c: 00490913 addi x18,x18,4 + +80002630 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sig1h x6, x22, x20 # perform operation +80002630: 5f4b0333 sha512sig1h x6,x22,x20 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002634: 0001a383 lw x7,0(x3) +80002638: 00638863 beq x7,x6,80002648 +8000263c: 6dd0246f jal x8,80005518 +80002640: 80002630 .word 0x80002630 +80002644: 8000d156 .word 0x8000d156 +80002648: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xfffffffe +8000264c: 00092e83 lw x29,0(x18) +80002650: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x80000000 +80002654: 00092983 lw x19,0(x18) +80002658: 00490913 addi x18,x18,4 + +8000265c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sig1h x6, x29, x19 # perform operation +8000265c: 5f3e8333 sha512sig1h x6,x29,x19 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002660: 0001a383 lw x7,0(x3) +80002664: 00638863 beq x7,x6,80002674 +80002668: 6b10246f jal x8,80005518 +8000266c: 8000265c .word 0x8000265c +80002670: 8000d1b5 .word 0x8000d1b5 +80002674: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xfffffffe +80002678: 00092c83 lw x25,0(x18) +8000267c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x80000001 +80002680: 00092d03 lw x26,0(x18) +80002684: 00490913 addi x18,x18,4 + +80002688 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sig1h x21, x25, x26 # perform operation +80002688: 5fac8ab3 sha512sig1h x21,x25,x26 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000268c: 0001a383 lw x7,0(x3) +80002690: 01538863 beq x7,x21,800026a0 +80002694: 6850246f jal x8,80005518 +80002698: 80002688 .word 0x80002688 +8000269c: 8000d21b .word 0x8000d21b +800026a0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xfffffffe +800026a4: 00092c03 lw x24,0(x18) +800026a8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x7fffffff +800026ac: 00092803 lw x16,0(x18) +800026b0: 00490913 addi x18,x18,4 + +800026b4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sig1h x26, x24, x16 # perform operation +800026b4: 5f0c0d33 sha512sig1h x26,x24,x16 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b8: 0001a383 lw x7,0(x3) +800026bc: 01a38863 beq x7,x26,800026cc +800026c0: 6590246f jal x8,80005518 +800026c4: 800026b4 .word 0x800026b4 +800026c8: 8000d281 .word 0x8000d281 +800026cc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xfffffffe +800026d0: 00092b03 lw x22,0(x18) +800026d4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x7ffffffe +800026d8: 00092f03 lw x30,0(x18) +800026dc: 00490913 addi x18,x18,4 + +800026e0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sig1h x21, x22, x30 # perform operation +800026e0: 5feb0ab3 sha512sig1h x21,x22,x30 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e4: 0001a383 lw x7,0(x3) +800026e8: 01538863 beq x7,x21,800026f8 +800026ec: 62d0246f jal x8,80005518 +800026f0: 800026e0 .word 0x800026e0 +800026f4: 8000d2e7 .word 0x8000d2e7 +800026f8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xfffffffe +800026fc: 00092483 lw x9,0(x18) +80002700: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xffffffff +80002704: 00092983 lw x19,0(x18) +80002708: 00490913 addi x18,x18,4 + +8000270c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sig1h x22, x9, x19 # perform operation +8000270c: 5f348b33 sha512sig1h x22,x9,x19 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002710: 0001a383 lw x7,0(x3) +80002714: 01638863 beq x7,x22,80002724 +80002718: 6010246f jal x8,80005518 +8000271c: 8000270c .word 0x8000270c +80002720: 8000d34d .word 0x8000d34d +80002724: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xfffffffe +80002728: 00092983 lw x19,0(x18) +8000272c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xfffffffe +80002730: 00092d03 lw x26,0(x18) +80002734: 00490913 addi x18,x18,4 + +80002738 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sig1h x2, x19, x26 # perform operation +80002738: 5fa98133 sha512sig1h x2,x19,x26 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000273c: 0001a383 lw x7,0(x3) +80002740: 00238863 beq x7,x2,80002750 +80002744: 5d50246f jal x8,80005518 +80002748: 80002738 .word 0x80002738 +8000274c: 8000d3b3 .word 0x8000d3b3 +80002750: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xfffffffe +80002754: 00092c83 lw x25,0(x18) +80002758: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x5bbc8872 +8000275c: 00092283 lw x5,0(x18) +80002760: 00490913 addi x18,x18,4 + +80002764 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sig1h x30, x25, x5 # perform operation +80002764: 5e5c8f33 sha512sig1h x30,x25,x5 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002768: 0001a383 lw x7,0(x3) +8000276c: 01e38863 beq x7,x30,8000277c +80002770: 5a90246f jal x8,80005518 +80002774: 80002764 .word 0x80002764 +80002778: 8000d419 .word 0x8000d419 +8000277c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0xfffffffe +80002780: 00092a83 lw x21,0(x18) +80002784: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xaaaaaaaa +80002788: 00092d03 lw x26,0(x18) +8000278c: 00490913 addi x18,x18,4 + +80002790 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sig1h x2, x21, x26 # perform operation +80002790: 5faa8133 sha512sig1h x2,x21,x26 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002794: 0001a383 lw x7,0(x3) +80002798: 00238863 beq x7,x2,800027a8 +8000279c: 57d0246f jal x8,80005518 +800027a0: 80002790 .word 0x80002790 +800027a4: 8000d47f .word 0x8000d47f +800027a8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xfffffffe +800027ac: 00092e03 lw x28,0(x18) +800027b0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x55555555 +800027b4: 00092c83 lw x25,0(x18) +800027b8: 00490913 addi x18,x18,4 + +800027bc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sig1h x27, x28, x25 # perform operation +800027bc: 5f9e0db3 sha512sig1h x27,x28,x25 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c0: 0001a383 lw x7,0(x3) +800027c4: 01b38863 beq x7,x27,800027d4 +800027c8: 5510246f jal x8,80005518 +800027cc: 800027bc .word 0x800027bc +800027d0: 8000d4e5 .word 0x8000d4e5 +800027d4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x5bbc8872 +800027d8: 00092983 lw x19,0(x18) +800027dc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x00000000 +800027e0: 00092103 lw x2,0(x18) +800027e4: 00490913 addi x18,x18,4 + +800027e8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sig1h x11, x19, x2 # perform operation +800027e8: 5e2985b3 sha512sig1h x11,x19,x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027ec: 0001a383 lw x7,0(x3) +800027f0: 00b38863 beq x7,x11,80002800 +800027f4: 5250246f jal x8,80005518 +800027f8: 800027e8 .word 0x800027e8 +800027fc: 8000d54b .word 0x8000d54b +80002800: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x5bbc8872 +80002804: 00092f83 lw x31,0(x18) +80002808: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x00000001 +8000280c: 00092103 lw x2,0(x18) +80002810: 00490913 addi x18,x18,4 + +80002814 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sig1h x9, x31, x2 # perform operation +80002814: 5e2f84b3 sha512sig1h x9,x31,x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002818: 0001a383 lw x7,0(x3) +8000281c: 00938863 beq x7,x9,8000282c +80002820: 4f90246f jal x8,80005518 +80002824: 80002814 .word 0x80002814 +80002828: 8000d5aa .word 0x8000d5aa +8000282c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x5bbc8872 +80002830: 00092c83 lw x25,0(x18) +80002834: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000002 +80002838: 00092a03 lw x20,0(x18) +8000283c: 00490913 addi x18,x18,4 + +80002840 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sig1h x6, x25, x20 # perform operation +80002840: 5f4c8333 sha512sig1h x6,x25,x20 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002844: 0001a383 lw x7,0(x3) +80002848: 00638863 beq x7,x6,80002858 +8000284c: 4cd0246f jal x8,80005518 +80002850: 80002840 .word 0x80002840 +80002854: 8000d609 .word 0x8000d609 +80002858: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x5bbc8872 +8000285c: 00092e03 lw x28,0(x18) +80002860: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x80000000 +80002864: 00092b03 lw x22,0(x18) +80002868: 00490913 addi x18,x18,4 + +8000286c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sig1h x20, x28, x22 # perform operation +8000286c: 5f6e0a33 sha512sig1h x20,x28,x22 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002870: 0001a383 lw x7,0(x3) +80002874: 01438863 beq x7,x20,80002884 +80002878: 4a10246f jal x8,80005518 +8000287c: 8000286c .word 0x8000286c +80002880: 8000d668 .word 0x8000d668 +80002884: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x5bbc8872 +80002888: 00092083 lw x1,0(x18) +8000288c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x80000001 +80002890: 00092e03 lw x28,0(x18) +80002894: 00490913 addi x18,x18,4 + +80002898 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sig1h x24, x1, x28 # perform operation +80002898: 5fc08c33 sha512sig1h x24,x1,x28 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000289c: 0001a383 lw x7,0(x3) +800028a0: 01838863 beq x7,x24,800028b0 +800028a4: 4750246f jal x8,80005518 +800028a8: 80002898 .word 0x80002898 +800028ac: 8000d6ce .word 0x8000d6ce +800028b0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x5bbc8872 +800028b4: 00092c83 lw x25,0(x18) +800028b8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x7fffffff +800028bc: 00092303 lw x6,0(x18) +800028c0: 00490913 addi x18,x18,4 + +800028c4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sig1h x2, x25, x6 # perform operation +800028c4: 5e6c8133 sha512sig1h x2,x25,x6 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c8: 0001a383 lw x7,0(x3) +800028cc: 00238863 beq x7,x2,800028dc +800028d0: 4490246f jal x8,80005518 +800028d4: 800028c4 .word 0x800028c4 +800028d8: 8000d734 .word 0x8000d734 +800028dc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x5bbc8872 +800028e0: 00092083 lw x1,0(x18) +800028e4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x7ffffffe +800028e8: 00092c03 lw x24,0(x18) +800028ec: 00490913 addi x18,x18,4 + +800028f0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sig1h x12, x1, x24 # perform operation +800028f0: 5f808633 sha512sig1h x12,x1,x24 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f4: 0001a383 lw x7,0(x3) +800028f8: 00c38863 beq x7,x12,80002908 +800028fc: 41d0246f jal x8,80005518 +80002900: 800028f0 .word 0x800028f0 +80002904: 8000d79a .word 0x8000d79a +80002908: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x5bbc8872 +8000290c: 00092583 lw x11,0(x18) +80002910: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xffffffff +80002914: 00092d03 lw x26,0(x18) +80002918: 00490913 addi x18,x18,4 + +8000291c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sig1h x29, x11, x26 # perform operation +8000291c: 5fa58eb3 sha512sig1h x29,x11,x26 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002920: 0001a383 lw x7,0(x3) +80002924: 01d38863 beq x7,x29,80002934 +80002928: 3f10246f jal x8,80005518 +8000292c: 8000291c .word 0x8000291c +80002930: 8000d800 .word 0x8000d800 +80002934: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x5bbc8872 +80002938: 00092c03 lw x24,0(x18) +8000293c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xfffffffe +80002940: 00092d03 lw x26,0(x18) +80002944: 00490913 addi x18,x18,4 + +80002948 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sig1h x13, x24, x26 # perform operation +80002948: 5fac06b3 sha512sig1h x13,x24,x26 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000294c: 0001a383 lw x7,0(x3) +80002950: 00d38863 beq x7,x13,80002960 +80002954: 3c50246f jal x8,80005518 +80002958: 80002948 .word 0x80002948 +8000295c: 8000d866 .word 0x8000d866 +80002960: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x5bbc8872 +80002964: 00092103 lw x2,0(x18) +80002968: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x5bbc8872 +8000296c: 00092283 lw x5,0(x18) +80002970: 00490913 addi x18,x18,4 + +80002974 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sig1h x23, x2, x5 # perform operation +80002974: 5e510bb3 sha512sig1h x23,x2,x5 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002978: 0001a383 lw x7,0(x3) +8000297c: 01738863 beq x7,x23,8000298c +80002980: 3990246f jal x8,80005518 +80002984: 80002974 .word 0x80002974 +80002988: 8000d8cc .word 0x8000d8cc +8000298c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x5bbc8872 +80002990: 00092a03 lw x20,0(x18) +80002994: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0xaaaaaaaa +80002998: 00092f03 lw x30,0(x18) +8000299c: 00490913 addi x18,x18,4 + +800029a0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sig1h x29, x20, x30 # perform operation +800029a0: 5fea0eb3 sha512sig1h x29,x20,x30 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a4: 0001a383 lw x7,0(x3) +800029a8: 01d38863 beq x7,x29,800029b8 +800029ac: 36d0246f jal x8,80005518 +800029b0: 800029a0 .word 0x800029a0 +800029b4: 8000d932 .word 0x8000d932 +800029b8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x5bbc8872 +800029bc: 00092503 lw x10,0(x18) +800029c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x55555555 +800029c4: 00092d03 lw x26,0(x18) +800029c8: 00490913 addi x18,x18,4 + +800029cc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sig1h x4, x10, x26 # perform operation +800029cc: 5fa50233 sha512sig1h x4,x10,x26 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d0: 0001a383 lw x7,0(x3) +800029d4: 00438863 beq x7,x4,800029e4 +800029d8: 3410246f jal x8,80005518 +800029dc: 800029cc .word 0x800029cc +800029e0: 8000d998 .word 0x8000d998 +800029e4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xaaaaaaaa +800029e8: 00092e83 lw x29,0(x18) +800029ec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x00000000 +800029f0: 00092e03 lw x28,0(x18) +800029f4: 00490913 addi x18,x18,4 + +800029f8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sig1h x19, x29, x28 # perform operation +800029f8: 5fce89b3 sha512sig1h x19,x29,x28 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029fc: 0001a383 lw x7,0(x3) +80002a00: 01338863 beq x7,x19,80002a10 +80002a04: 3150246f jal x8,80005518 +80002a08: 800029f8 .word 0x800029f8 +80002a0c: 8000d9fe .word 0x8000d9fe +80002a10: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xaaaaaaaa +80002a14: 00092783 lw x15,0(x18) +80002a18: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x00000001 +80002a1c: 00092f03 lw x30,0(x18) +80002a20: 00490913 addi x18,x18,4 + +80002a24 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sig1h x10, x15, x30 # perform operation +80002a24: 5fe78533 sha512sig1h x10,x15,x30 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a28: 0001a383 lw x7,0(x3) +80002a2c: 00a38863 beq x7,x10,80002a3c +80002a30: 2e90246f jal x8,80005518 +80002a34: 80002a24 .word 0x80002a24 +80002a38: 8000da5d .word 0x8000da5d +80002a3c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xaaaaaaaa +80002a40: 00092283 lw x5,0(x18) +80002a44: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x00000002 +80002a48: 00092883 lw x17,0(x18) +80002a4c: 00490913 addi x18,x18,4 + +80002a50 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sig1h x21, x5, x17 # perform operation +80002a50: 5f128ab3 sha512sig1h x21,x5,x17 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a54: 0001a383 lw x7,0(x3) +80002a58: 01538863 beq x7,x21,80002a68 +80002a5c: 2bd0246f jal x8,80005518 +80002a60: 80002a50 .word 0x80002a50 +80002a64: 8000dabc .word 0x8000dabc +80002a68: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xaaaaaaaa +80002a6c: 00092e03 lw x28,0(x18) +80002a70: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000000 +80002a74: 00092b83 lw x23,0(x18) +80002a78: 00490913 addi x18,x18,4 + +80002a7c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sig1h x31, x28, x23 # perform operation +80002a7c: 5f7e0fb3 sha512sig1h x31,x28,x23 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a80: 0001a383 lw x7,0(x3) +80002a84: 01f38863 beq x7,x31,80002a94 +80002a88: 2910246f jal x8,80005518 +80002a8c: 80002a7c .word 0x80002a7c +80002a90: 8000db1b .word 0x8000db1b +80002a94: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xaaaaaaaa +80002a98: 00092083 lw x1,0(x18) +80002a9c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x80000001 +80002aa0: 00092983 lw x19,0(x18) +80002aa4: 00490913 addi x18,x18,4 + +80002aa8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sig1h x2, x1, x19 # perform operation +80002aa8: 5f308133 sha512sig1h x2,x1,x19 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aac: 0001a383 lw x7,0(x3) +80002ab0: 00238863 beq x7,x2,80002ac0 +80002ab4: 2650246f jal x8,80005518 +80002ab8: 80002aa8 .word 0x80002aa8 +80002abc: 8000db81 .word 0x8000db81 +80002ac0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xaaaaaaaa +80002ac4: 00092983 lw x19,0(x18) +80002ac8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x7fffffff +80002acc: 00092783 lw x15,0(x18) +80002ad0: 00490913 addi x18,x18,4 + +80002ad4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sig1h x29, x19, x15 # perform operation +80002ad4: 5ef98eb3 sha512sig1h x29,x19,x15 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad8: 0001a383 lw x7,0(x3) +80002adc: 01d38863 beq x7,x29,80002aec +80002ae0: 2390246f jal x8,80005518 +80002ae4: 80002ad4 .word 0x80002ad4 +80002ae8: 8000dbe7 .word 0x8000dbe7 +80002aec: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xaaaaaaaa +80002af0: 00092f83 lw x31,0(x18) +80002af4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x7ffffffe +80002af8: 00092a83 lw x21,0(x18) +80002afc: 00490913 addi x18,x18,4 + +80002b00 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sig1h x1, x31, x21 # perform operation +80002b00: 5f5f80b3 sha512sig1h x1,x31,x21 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b04: 0001a383 lw x7,0(x3) +80002b08: 00138863 beq x7,x1,80002b18 +80002b0c: 20d0246f jal x8,80005518 +80002b10: 80002b00 .word 0x80002b00 +80002b14: 8000dc4d .word 0x8000dc4d +80002b18: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xaaaaaaaa +80002b1c: 00092f83 lw x31,0(x18) +80002b20: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xffffffff +80002b24: 00092c03 lw x24,0(x18) +80002b28: 00490913 addi x18,x18,4 + +80002b2c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sig1h x13, x31, x24 # perform operation +80002b2c: 5f8f86b3 sha512sig1h x13,x31,x24 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b30: 0001a383 lw x7,0(x3) +80002b34: 00d38863 beq x7,x13,80002b44 +80002b38: 1e10246f jal x8,80005518 +80002b3c: 80002b2c .word 0x80002b2c +80002b40: 8000dcb3 .word 0x8000dcb3 +80002b44: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xaaaaaaaa +80002b48: 00092c83 lw x25,0(x18) +80002b4c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xfffffffe +80002b50: 00092e83 lw x29,0(x18) +80002b54: 00490913 addi x18,x18,4 + +80002b58 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sig1h x30, x25, x29 # perform operation +80002b58: 5fdc8f33 sha512sig1h x30,x25,x29 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b5c: 0001a383 lw x7,0(x3) +80002b60: 01e38863 beq x7,x30,80002b70 +80002b64: 1b50246f jal x8,80005518 +80002b68: 80002b58 .word 0x80002b58 +80002b6c: 8000dd19 .word 0x8000dd19 +80002b70: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xaaaaaaaa +80002b74: 00092683 lw x13,0(x18) +80002b78: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x5bbc8872 +80002b7c: 00092083 lw x1,0(x18) +80002b80: 00490913 addi x18,x18,4 + +80002b84 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sig1h x23, x13, x1 # perform operation +80002b84: 5e168bb3 sha512sig1h x23,x13,x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b88: 0001a383 lw x7,0(x3) +80002b8c: 01738863 beq x7,x23,80002b9c +80002b90: 1890246f jal x8,80005518 +80002b94: 80002b84 .word 0x80002b84 +80002b98: 8000dd7f .word 0x8000dd7f +80002b9c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xaaaaaaaa +80002ba0: 00092683 lw x13,0(x18) +80002ba4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xaaaaaaaa +80002ba8: 00092e83 lw x29,0(x18) +80002bac: 00490913 addi x18,x18,4 + +80002bb0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sig1h x15, x13, x29 # perform operation +80002bb0: 5fd687b3 sha512sig1h x15,x13,x29 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb4: 0001a383 lw x7,0(x3) +80002bb8: 00f38863 beq x7,x15,80002bc8 +80002bbc: 15d0246f jal x8,80005518 +80002bc0: 80002bb0 .word 0x80002bb0 +80002bc4: 8000dde5 .word 0x8000dde5 +80002bc8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0xaaaaaaaa +80002bcc: 00092a03 lw x20,0(x18) +80002bd0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x55555555 +80002bd4: 00092103 lw x2,0(x18) +80002bd8: 00490913 addi x18,x18,4 + +80002bdc : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sig1h x5, x20, x2 # perform operation +80002bdc: 5e2a02b3 sha512sig1h x5,x20,x2 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be0: 0001a383 lw x7,0(x3) +80002be4: 00538863 beq x7,x5,80002bf4 +80002be8: 1310246f jal x8,80005518 +80002bec: 80002bdc .word 0x80002bdc +80002bf0: 8000de4b .word 0x8000de4b +80002bf4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x55555555 +80002bf8: 00092083 lw x1,0(x18) +80002bfc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x00000000 +80002c00: 00092c83 lw x25,0(x18) +80002c04: 00490913 addi x18,x18,4 + +80002c08 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sig1h x28, x1, x25 # perform operation +80002c08: 5f908e33 sha512sig1h x28,x1,x25 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c0c: 0001a383 lw x7,0(x3) +80002c10: 01c38863 beq x7,x28,80002c20 +80002c14: 1050246f jal x8,80005518 +80002c18: 80002c08 .word 0x80002c08 +80002c1c: 8000deb1 .word 0x8000deb1 +80002c20: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x55555555 +80002c24: 00092f83 lw x31,0(x18) +80002c28: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000001 +80002c2c: 00092583 lw x11,0(x18) +80002c30: 00490913 addi x18,x18,4 + +80002c34 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sig1h x26, x31, x11 # perform operation +80002c34: 5ebf8d33 sha512sig1h x26,x31,x11 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c38: 0001a383 lw x7,0(x3) +80002c3c: 01a38863 beq x7,x26,80002c4c +80002c40: 0d90246f jal x8,80005518 +80002c44: 80002c34 .word 0x80002c34 +80002c48: 8000df10 .word 0x8000df10 +80002c4c: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x55555555 +80002c50: 00092083 lw x1,0(x18) +80002c54: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x00000002 +80002c58: 00092a83 lw x21,0(x18) +80002c5c: 00490913 addi x18,x18,4 + +80002c60 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sig1h x31, x1, x21 # perform operation +80002c60: 5f508fb3 sha512sig1h x31,x1,x21 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c64: 0001a383 lw x7,0(x3) +80002c68: 01f38863 beq x7,x31,80002c78 +80002c6c: 0ad0246f jal x8,80005518 +80002c70: 80002c60 .word 0x80002c60 +80002c74: 8000df6f .word 0x8000df6f +80002c78: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x55555555 +80002c7c: 00092883 lw x17,0(x18) +80002c80: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000000 +80002c84: 00092b83 lw x23,0(x18) +80002c88: 00490913 addi x18,x18,4 + +80002c8c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sig1h x6, x17, x23 # perform operation +80002c8c: 5f788333 sha512sig1h x6,x17,x23 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c90: 0001a383 lw x7,0(x3) +80002c94: 00638863 beq x7,x6,80002ca4 +80002c98: 0810246f jal x8,80005518 +80002c9c: 80002c8c .word 0x80002c8c +80002ca0: 8000dfce .word 0x8000dfce +80002ca4: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x55555555 +80002ca8: 00092883 lw x17,0(x18) +80002cac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x80000001 +80002cb0: 00092e83 lw x29,0(x18) +80002cb4: 00490913 addi x18,x18,4 + +80002cb8 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sig1h x25, x17, x29 # perform operation +80002cb8: 5fd88cb3 sha512sig1h x25,x17,x29 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cbc: 0001a383 lw x7,0(x3) +80002cc0: 01938863 beq x7,x25,80002cd0 +80002cc4: 0550246f jal x8,80005518 +80002cc8: 80002cb8 .word 0x80002cb8 +80002ccc: 8000e034 .word 0x8000e034 +80002cd0: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x55555555 +80002cd4: 00092283 lw x5,0(x18) +80002cd8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x7fffffff +80002cdc: 00092603 lw x12,0(x18) +80002ce0: 00490913 addi x18,x18,4 + +80002ce4 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sig1h x23, x5, x12 # perform operation +80002ce4: 5ec28bb3 sha512sig1h x23,x5,x12 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce8: 0001a383 lw x7,0(x3) +80002cec: 01738863 beq x7,x23,80002cfc +80002cf0: 0290246f jal x8,80005518 +80002cf4: 80002ce4 .word 0x80002ce4 +80002cf8: 8000e09a .word 0x8000e09a +80002cfc: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x55555555 +80002d00: 00092583 lw x11,0(x18) +80002d04: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x7ffffffe +80002d08: 00092103 lw x2,0(x18) +80002d0c: 00490913 addi x18,x18,4 + +80002d10 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sig1h x31, x11, x2 # perform operation +80002d10: 5e258fb3 sha512sig1h x31,x11,x2 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d14: 0001a383 lw x7,0(x3) +80002d18: 01f38863 beq x7,x31,80002d28 +80002d1c: 7fc0246f jal x8,80005518 +80002d20: 80002d10 .word 0x80002d10 +80002d24: 8000e100 .word 0x8000e100 +80002d28: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x55555555 +80002d2c: 00092603 lw x12,0(x18) +80002d30: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xffffffff +80002d34: 00092503 lw x10,0(x18) +80002d38: 00490913 addi x18,x18,4 + +80002d3c : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sig1h x4, x12, x10 # perform operation +80002d3c: 5ea60233 sha512sig1h x4,x12,x10 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d40: 0001a383 lw x7,0(x3) +80002d44: 00438863 beq x7,x4,80002d54 +80002d48: 7d00246f jal x8,80005518 +80002d4c: 80002d3c .word 0x80002d3c +80002d50: 8000e166 .word 0x8000e166 +80002d54: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x55555555 +80002d58: 00092b83 lw x23,0(x18) +80002d5c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xfffffffe +80002d60: 00092803 lw x16,0(x18) +80002d64: 00490913 addi x18,x18,4 + +80002d68 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sig1h x31, x23, x16 # perform operation +80002d68: 5f0b8fb3 sha512sig1h x31,x23,x16 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d6c: 0001a383 lw x7,0(x3) +80002d70: 01f38863 beq x7,x31,80002d80 +80002d74: 7a40246f jal x8,80005518 +80002d78: 80002d68 .word 0x80002d68 +80002d7c: 8000e1cc .word 0x8000e1cc +80002d80: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x55555555 +80002d84: 00092883 lw x17,0(x18) +80002d88: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x5bbc8872 +80002d8c: 00092803 lw x16,0(x18) +80002d90: 00490913 addi x18,x18,4 + +80002d94 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sig1h x14, x17, x16 # perform operation +80002d94: 5f088733 sha512sig1h x14,x17,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d98: 0001a383 lw x7,0(x3) +80002d9c: 00e38863 beq x7,x14,80002dac +80002da0: 7780246f jal x8,80005518 +80002da4: 80002d94 .word 0x80002d94 +80002da8: 8000e232 .word 0x8000e232 +80002dac: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x55555555 +80002db0: 00092103 lw x2,0(x18) +80002db4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xaaaaaaaa +80002db8: 00092683 lw x13,0(x18) +80002dbc: 00490913 addi x18,x18,4 + +80002dc0 : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sig1h x10, x2, x13 # perform operation +80002dc0: 5ed10533 sha512sig1h x10,x2,x13 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc4: 0001a383 lw x7,0(x3) +80002dc8: 00a38863 beq x7,x10,80002dd8 +80002dcc: 74c0246f jal x8,80005518 +80002dd0: 80002dc0 .word 0x80002dc0 +80002dd4: 8000e298 .word 0x8000e298 +80002dd8: 00418193 addi x3,x3,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x55555555 +80002ddc: 00092d83 lw x27,0(x18) +80002de0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x55555555 +80002de4: 00092e03 lw x28,0(x18) +80002de8: 00490913 addi x18,x18,4 + +80002dec : +Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sig1h x5, x27, x28 # perform operation +80002dec: 5fcd82b3 sha512sig1h x5,x27,x28 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sig1h_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df0: 0001a383 lw x7,0(x3) +80002df4: 00538863 beq x7,x5,80002e04 +80002df8: 7200246f jal x8,80005518 +80002dfc: 80002dec .word 0x80002dec +80002e00: 8000e2fe .word 0x8000e2fe +80002e04: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x5253dc7f +80002e08: 00092003 lw x0,0(x18) +80002e0c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x545a57f5 +80002e10: 00092003 lw x0,0(x18) +80002e14: 00490913 addi x18,x18,4 + +80002e18 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b0: + sha512sig1h x11, x0, x0 # perform operation +80002e18: 5e0005b3 sha512sig1h x11,x0,x0 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b0, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b0_str) +80002e1c: 0001a383 lw x7,0(x3) +80002e20: 00b38863 beq x7,x11,80002e30 +80002e24: 6f40246f jal x8,80005518 +80002e28: 80002e18 .word 0x80002e18 +80002e2c: 8000e364 .word 0x8000e364 +80002e30: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x396d0dd1 +80002e34: 00092083 lw x1,0(x18) +80002e38: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0xfa2b3204 +80002e3c: 00092083 lw x1,0(x18) +80002e40: 00490913 addi x18,x18,4 + +80002e44 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b1: + sha512sig1h x17, x1, x1 # perform operation +80002e44: 5e1088b3 sha512sig1h x17,x1,x1 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b1, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b1_str) +80002e48: 0001a383 lw x7,0(x3) +80002e4c: 01138863 beq x7,x17,80002e5c +80002e50: 6c80246f jal x8,80005518 +80002e54: 80002e44 .word 0x80002e44 +80002e58: 8000e3a3 .word 0x8000e3a3 +80002e5c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x41e0579f +80002e60: 00092103 lw x2,0(x18) +80002e64: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x5601b12c +80002e68: 00092103 lw x2,0(x18) +80002e6c: 00490913 addi x18,x18,4 + +80002e70 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b2: + sha512sig1h x16, x2, x2 # perform operation +80002e70: 5e210833 sha512sig1h x16,x2,x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b2, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b2_str) +80002e74: 0001a383 lw x7,0(x3) +80002e78: 01038863 beq x7,x16,80002e88 +80002e7c: 69c0246f jal x8,80005518 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 8000e3e2 .word 0x8000e3e2 +80002e88: 00418193 addi x3,x3,4 + + mv x21, x3 # switch signature pointer register to avoid conflict with test +80002e8c: 00018a93 addi x21,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x3622da0a +80002e90: 00092183 lw x3,0(x18) +80002e94: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0xa2f07337 +80002e98: 00092183 lw x3,0(x18) +80002e9c: 00490913 addi x18,x18,4 + +80002ea0 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b3: + sha512sig1h x13, x3, x3 # perform operation +80002ea0: 5e3186b3 sha512sig1h x13,x3,x3 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b3, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b3_str) +80002ea4: 000aa383 lw x7,0(x21) +80002ea8: 00d38863 beq x7,x13,80002eb8 +80002eac: 66c0246f jal x8,80005518 +80002eb0: 80002ea0 .word 0x80002ea0 +80002eb4: 8000e421 .word 0x8000e421 +80002eb8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0x5622bf47 +80002ebc: 00092203 lw x4,0(x18) +80002ec0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0xff5a167f +80002ec4: 00092203 lw x4,0(x18) +80002ec8: 00490913 addi x18,x18,4 + +80002ecc : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b4: + sha512sig1h x27, x4, x4 # perform operation +80002ecc: 5e420db3 sha512sig1h x27,x4,x4 + # Check if x27 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x27, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b4, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b4_str) +80002ed0: 000aa383 lw x7,0(x21) +80002ed4: 01b38863 beq x7,x27,80002ee4 +80002ed8: 6400246f jal x8,80005518 +80002edc: 80002ecc .word 0x80002ecc +80002ee0: 8000e460 .word 0x8000e460 +80002ee4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xc372f97d +80002ee8: 00092283 lw x5,0(x18) +80002eec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x43f2f55b +80002ef0: 00092283 lw x5,0(x18) +80002ef4: 00490913 addi x18,x18,4 + +80002ef8 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b5: + sha512sig1h x4, x5, x5 # perform operation +80002ef8: 5e528233 sha512sig1h x4,x5,x5 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b5, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b5_str) +80002efc: 000aa383 lw x7,0(x21) +80002f00: 00438863 beq x7,x4,80002f10 +80002f04: 6140246f jal x8,80005518 +80002f08: 80002ef8 .word 0x80002ef8 +80002f0c: 8000e49f .word 0x8000e49f +80002f10: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x3e6566ae +80002f14: 00092303 lw x6,0(x18) +80002f18: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x8e8d8c14 +80002f1c: 00092303 lw x6,0(x18) +80002f20: 00490913 addi x18,x18,4 + +80002f24 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b6: + sha512sig1h x28, x6, x6 # perform operation +80002f24: 5e630e33 sha512sig1h x28,x6,x6 + # Check if x28 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x28, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b6, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b6_str) +80002f28: 000aa383 lw x7,0(x21) +80002f2c: 01c38863 beq x7,x28,80002f3c +80002f30: 5e80246f jal x8,80005518 +80002f34: 80002f24 .word 0x80002f24 +80002f38: 8000e4de .word 0x8000e4de +80002f3c: 004a8a93 addi x21,x21,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f40: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f44: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xd1c224da +80002f48: 00092383 lw x7,0(x18) +80002f4c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x9be27e18 +80002f50: 00092383 lw x7,0(x18) +80002f54: 00490913 addi x18,x18,4 + +80002f58 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b7: + sha512sig1h x8, x7, x7 # perform operation +80002f58: 5e738433 sha512sig1h x8,x7,x7 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b7, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b7_str) +80002f5c: 000aa203 lw x4,0(x21) +80002f60: 00820863 beq x4,x8,80002f70 +80002f64: 59c022ef jal x5,80005500 +80002f68: 80002f58 .word 0x80002f58 +80002f6c: 8000e51d .word 0x8000e51d +80002f70: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x8d460e55 +80002f74: 00092403 lw x8,0(x18) +80002f78: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x1f4eb91c +80002f7c: 00092403 lw x8,0(x18) +80002f80: 00490913 addi x18,x18,4 + +80002f84 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b8: + sha512sig1h x22, x8, x8 # perform operation +80002f84: 5e840b33 sha512sig1h x22,x8,x8 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b8, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b8_str) +80002f88: 000aa203 lw x4,0(x21) +80002f8c: 01620863 beq x4,x22,80002f9c +80002f90: 570022ef jal x5,80005500 +80002f94: 80002f84 .word 0x80002f84 +80002f98: 8000e55c .word 0x8000e55c +80002f9c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xdbc8dc4e +80002fa0: 00092483 lw x9,0(x18) +80002fa4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xe55bcd7e +80002fa8: 00092483 lw x9,0(x18) +80002fac: 00490913 addi x18,x18,4 + +80002fb0 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b9: + sha512sig1h x31, x9, x9 # perform operation +80002fb0: 5e948fb3 sha512sig1h x31,x9,x9 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b9, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b9_str) +80002fb4: 000aa203 lw x4,0(x21) +80002fb8: 01f20863 beq x4,x31,80002fc8 +80002fbc: 544022ef jal x5,80005500 +80002fc0: 80002fb0 .word 0x80002fb0 +80002fc4: 8000e59b .word 0x8000e59b +80002fc8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xcc68545f +80002fcc: 00092503 lw x10,0(x18) +80002fd0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x6c62246c +80002fd4: 00092503 lw x10,0(x18) +80002fd8: 00490913 addi x18,x18,4 + +80002fdc : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b10: + sha512sig1h x9, x10, x10 # perform operation +80002fdc: 5ea504b3 sha512sig1h x9,x10,x10 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b10, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b10_str) +80002fe0: 000aa203 lw x4,0(x21) +80002fe4: 00920863 beq x4,x9,80002ff4 +80002fe8: 518022ef jal x5,80005500 +80002fec: 80002fdc .word 0x80002fdc +80002ff0: 8000e5da .word 0x8000e5da +80002ff4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x835fd92b +80002ff8: 00092583 lw x11,0(x18) +80002ffc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x296a8373 +80003000: 00092583 lw x11,0(x18) +80003004: 00490913 addi x18,x18,4 + +80003008 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b11: + sha512sig1h x1, x11, x11 # perform operation +80003008: 5eb580b3 sha512sig1h x1,x11,x11 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b11, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b11_str) +8000300c: 000aa203 lw x4,0(x21) +80003010: 00120863 beq x4,x1,80003020 +80003014: 4ec022ef jal x5,80005500 +80003018: 80003008 .word 0x80003008 +8000301c: 8000e61a .word 0x8000e61a +80003020: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x765c6291 +80003024: 00092603 lw x12,0(x18) +80003028: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x26c7af78 +8000302c: 00092603 lw x12,0(x18) +80003030: 00490913 addi x18,x18,4 + +80003034 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b12: + sha512sig1h x26, x12, x12 # perform operation +80003034: 5ec60d33 sha512sig1h x26,x12,x12 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b12, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b12_str) +80003038: 000aa203 lw x4,0(x21) +8000303c: 01a20863 beq x4,x26,8000304c +80003040: 4c0022ef jal x5,80005500 +80003044: 80003034 .word 0x80003034 +80003048: 8000e65a .word 0x8000e65a +8000304c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x39be3d8c +80003050: 00092683 lw x13,0(x18) +80003054: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xa087dee9 +80003058: 00092683 lw x13,0(x18) +8000305c: 00490913 addi x18,x18,4 + +80003060 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b13: + sha512sig1h x30, x13, x13 # perform operation +80003060: 5ed68f33 sha512sig1h x30,x13,x13 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b13, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b13_str) +80003064: 000aa203 lw x4,0(x21) +80003068: 01e20863 beq x4,x30,80003078 +8000306c: 494022ef jal x5,80005500 +80003070: 80003060 .word 0x80003060 +80003074: 8000e69a .word 0x8000e69a +80003078: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xb6b1fe4f +8000307c: 00092703 lw x14,0(x18) +80003080: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x7f87fe16 +80003084: 00092703 lw x14,0(x18) +80003088: 00490913 addi x18,x18,4 + +8000308c : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b14: + sha512sig1h x29, x14, x14 # perform operation +8000308c: 5ee70eb3 sha512sig1h x29,x14,x14 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b14, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b14_str) +80003090: 000aa203 lw x4,0(x21) +80003094: 01d20863 beq x4,x29,800030a4 +80003098: 468022ef jal x5,80005500 +8000309c: 8000308c .word 0x8000308c +800030a0: 8000e6da .word 0x8000e6da +800030a4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x045cbf84 +800030a8: 00092783 lw x15,0(x18) +800030ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xe2bcd03f +800030b0: 00092783 lw x15,0(x18) +800030b4: 00490913 addi x18,x18,4 + +800030b8 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b15: + sha512sig1h x28, x15, x15 # perform operation +800030b8: 5ef78e33 sha512sig1h x28,x15,x15 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b15, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b15_str) +800030bc: 000aa203 lw x4,0(x21) +800030c0: 01c20863 beq x4,x28,800030d0 +800030c4: 43c022ef jal x5,80005500 +800030c8: 800030b8 .word 0x800030b8 +800030cc: 8000e71a .word 0x8000e71a +800030d0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x50155b0a +800030d4: 00092803 lw x16,0(x18) +800030d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xb9c74efd +800030dc: 00092803 lw x16,0(x18) +800030e0: 00490913 addi x18,x18,4 + +800030e4 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b16: + sha512sig1h x1, x16, x16 # perform operation +800030e4: 5f0800b3 sha512sig1h x1,x16,x16 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b16, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b16_str) +800030e8: 000aa203 lw x4,0(x21) +800030ec: 00120863 beq x4,x1,800030fc +800030f0: 410022ef jal x5,80005500 +800030f4: 800030e4 .word 0x800030e4 +800030f8: 8000e75a .word 0x8000e75a +800030fc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xb7f9e7ac +80003100: 00092883 lw x17,0(x18) +80003104: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x06de9fdd +80003108: 00092883 lw x17,0(x18) +8000310c: 00490913 addi x18,x18,4 + +80003110 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b17: + sha512sig1h x9, x17, x17 # perform operation +80003110: 5f1884b3 sha512sig1h x9,x17,x17 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b17, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b17_str) +80003114: 000aa203 lw x4,0(x21) +80003118: 00920863 beq x4,x9,80003128 +8000311c: 3e4022ef jal x5,80005500 +80003120: 80003110 .word 0x80003110 +80003124: 8000e79a .word 0x8000e79a +80003128: 004a8a93 addi x21,x21,4 + + mv x27, x18 # switch data pointer register to avoid conflict with test +8000312c: 00090d93 addi x27,x18,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x798e2309 +80003130: 000da903 lw x18,0(x27) +80003134: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x369842ae +80003138: 000da903 lw x18,0(x27) +8000313c: 004d8d93 addi x27,x27,4 + +80003140 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b18: + sha512sig1h x3, x18, x18 # perform operation +80003140: 5f2901b3 sha512sig1h x3,x18,x18 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b18, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b18_str) +80003144: 000aa203 lw x4,0(x21) +80003148: 00320863 beq x4,x3,80003158 +8000314c: 3b4022ef jal x5,80005500 +80003150: 80003140 .word 0x80003140 +80003154: 8000e7da .word 0x8000e7da +80003158: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x848ee65e +8000315c: 000da983 lw x19,0(x27) +80003160: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0x60a12307 +80003164: 000da983 lw x19,0(x27) +80003168: 004d8d93 addi x27,x27,4 + +8000316c : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b19: + sha512sig1h x8, x19, x19 # perform operation +8000316c: 5f398433 sha512sig1h x8,x19,x19 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b19, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b19_str) +80003170: 000aa203 lw x4,0(x21) +80003174: 00820863 beq x4,x8,80003184 +80003178: 388022ef jal x5,80005500 +8000317c: 8000316c .word 0x8000316c +80003180: 8000e81a .word 0x8000e81a +80003184: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x0183904a +80003188: 000daa03 lw x20,0(x27) +8000318c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xadec952b +80003190: 000daa03 lw x20,0(x27) +80003194: 004d8d93 addi x27,x27,4 + +80003198 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b20: + sha512sig1h x24, x20, x20 # perform operation +80003198: 5f4a0c33 sha512sig1h x24,x20,x20 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b20, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b20_str) +8000319c: 000aa203 lw x4,0(x21) +800031a0: 01820863 beq x4,x24,800031b0 +800031a4: 35c022ef jal x5,80005500 +800031a8: 80003198 .word 0x80003198 +800031ac: 8000e85a .word 0x8000e85a +800031b0: 004a8a93 addi x21,x21,4 + + mv x12, x21 # switch signature pointer register to avoid conflict with test +800031b4: 000a8613 addi x12,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x0df709f2 +800031b8: 000daa83 lw x21,0(x27) +800031bc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x9bd4d34b +800031c0: 000daa83 lw x21,0(x27) +800031c4: 004d8d93 addi x27,x27,4 + +800031c8 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b21: + sha512sig1h x26, x21, x21 # perform operation +800031c8: 5f5a8d33 sha512sig1h x26,x21,x21 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b21, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b21_str) +800031cc: 00062203 lw x4,0(x12) +800031d0: 01a20863 beq x4,x26,800031e0 +800031d4: 32c022ef jal x5,80005500 +800031d8: 800031c8 .word 0x800031c8 +800031dc: 8000e89a .word 0x8000e89a +800031e0: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x360c6720 +800031e4: 000dab03 lw x22,0(x27) +800031e8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xe627f7be +800031ec: 000dab03 lw x22,0(x27) +800031f0: 004d8d93 addi x27,x27,4 + +800031f4 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b22: + sha512sig1h x18, x22, x22 # perform operation +800031f4: 5f6b0933 sha512sig1h x18,x22,x22 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b22, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b22_str) +800031f8: 00062203 lw x4,0(x12) +800031fc: 01220863 beq x4,x18,8000320c +80003200: 300022ef jal x5,80005500 +80003204: 800031f4 .word 0x800031f4 +80003208: 8000e8da .word 0x8000e8da +8000320c: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x5e50c008 +80003210: 000dab83 lw x23,0(x27) +80003214: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x3fc21f7e +80003218: 000dab83 lw x23,0(x27) +8000321c: 004d8d93 addi x27,x27,4 + +80003220 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b23: + sha512sig1h x2, x23, x23 # perform operation +80003220: 5f7b8133 sha512sig1h x2,x23,x23 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b23, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b23_str) +80003224: 00062203 lw x4,0(x12) +80003228: 00220863 beq x4,x2,80003238 +8000322c: 2d4022ef jal x5,80005500 +80003230: 80003220 .word 0x80003220 +80003234: 8000e91a .word 0x8000e91a +80003238: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x7c373266 +8000323c: 000dac03 lw x24,0(x27) +80003240: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x1e9143ac +80003244: 000dac03 lw x24,0(x27) +80003248: 004d8d93 addi x27,x27,4 + +8000324c : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b24: + sha512sig1h x10, x24, x24 # perform operation +8000324c: 5f8c0533 sha512sig1h x10,x24,x24 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b24, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b24_str) +80003250: 00062203 lw x4,0(x12) +80003254: 00a20863 beq x4,x10,80003264 +80003258: 2a8022ef jal x5,80005500 +8000325c: 8000324c .word 0x8000324c +80003260: 8000e95a .word 0x8000e95a +80003264: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x0d653f73 +80003268: 000dac83 lw x25,0(x27) +8000326c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x2ae5051e +80003270: 000dac83 lw x25,0(x27) +80003274: 004d8d93 addi x27,x27,4 + +80003278 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b25: + sha512sig1h x16, x25, x25 # perform operation +80003278: 5f9c8833 sha512sig1h x16,x25,x25 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b25, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b25_str) +8000327c: 00062203 lw x4,0(x12) +80003280: 01020863 beq x4,x16,80003290 +80003284: 27c022ef jal x5,80005500 +80003288: 80003278 .word 0x80003278 +8000328c: 8000e99a .word 0x8000e99a +80003290: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xdc71719f +80003294: 000dad03 lw x26,0(x27) +80003298: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x34343b90 +8000329c: 000dad03 lw x26,0(x27) +800032a0: 004d8d93 addi x27,x27,4 + +800032a4 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b26: + sha512sig1h x18, x26, x26 # perform operation +800032a4: 5fad0933 sha512sig1h x18,x26,x26 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b26, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b26_str) +800032a8: 00062203 lw x4,0(x12) +800032ac: 01220863 beq x4,x18,800032bc +800032b0: 250022ef jal x5,80005500 +800032b4: 800032a4 .word 0x800032a4 +800032b8: 8000e9da .word 0x8000e9da +800032bc: 00460613 addi x12,x12,4 + + mv x11, x27 # switch data pointer register to avoid conflict with test +800032c0: 000d8593 addi x11,x27,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x11065dab +800032c4: 0005ad83 lw x27,0(x11) +800032c8: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xf175f389 +800032cc: 0005ad83 lw x27,0(x11) +800032d0: 00458593 addi x11,x11,4 + +800032d4 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b27: + sha512sig1h x29, x27, x27 # perform operation +800032d4: 5fbd8eb3 sha512sig1h x29,x27,x27 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b27, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b27_str) +800032d8: 00062203 lw x4,0(x12) +800032dc: 01d20863 beq x4,x29,800032ec +800032e0: 220022ef jal x5,80005500 +800032e4: 800032d4 .word 0x800032d4 +800032e8: 8000ea1a .word 0x8000ea1a +800032ec: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x5e23774c +800032f0: 0005ae03 lw x28,0(x11) +800032f4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x86c33a95 +800032f8: 0005ae03 lw x28,0(x11) +800032fc: 00458593 addi x11,x11,4 + +80003300 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b28: + sha512sig1h x13, x28, x28 # perform operation +80003300: 5fce06b3 sha512sig1h x13,x28,x28 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b28, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b28_str) +80003304: 00062203 lw x4,0(x12) +80003308: 00d20863 beq x4,x13,80003318 +8000330c: 1f4022ef jal x5,80005500 +80003310: 80003300 .word 0x80003300 +80003314: 8000ea5a .word 0x8000ea5a +80003318: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xfd46cc61 +8000331c: 0005ae83 lw x29,0(x11) +80003320: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x939c5b73 +80003324: 0005ae83 lw x29,0(x11) +80003328: 00458593 addi x11,x11,4 + +8000332c : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b29: + sha512sig1h x6, x29, x29 # perform operation +8000332c: 5fde8333 sha512sig1h x6,x29,x29 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b29, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b29_str) +80003330: 00062203 lw x4,0(x12) +80003334: 00620863 beq x4,x6,80003344 +80003338: 1c8022ef jal x5,80005500 +8000333c: 8000332c .word 0x8000332c +80003340: 8000ea9a .word 0x8000ea9a +80003344: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0xa74d4703 +80003348: 0005af03 lw x30,0(x11) +8000334c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xe42a5397 +80003350: 0005af03 lw x30,0(x11) +80003354: 00458593 addi x11,x11,4 + +80003358 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b30: + sha512sig1h x0, x30, x30 # perform operation +80003358: 5fef0033 sha512sig1h x0,x30,x30 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b30, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b30_str) +8000335c: 00062203 lw x4,0(x12) +80003360: 00020863 beq x4,x0,80003370 +80003364: 19c022ef jal x5,80005500 +80003368: 80003358 .word 0x80003358 +8000336c: 8000eada .word 0x8000eada +80003370: 00460613 addi x12,x12,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x09a4c1dd +80003374: 0005af83 lw x31,0(x11) +80003378: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xdf8160f2 +8000337c: 0005af83 lw x31,0(x11) +80003380: 00458593 addi x11,x11,4 + +80003384 : +Zknh_sha512sig1h_cg_cmp_rs1_rs2_b31: + sha512sig1h x15, x31, x31 # perform operation +80003384: 5fff87b3 sha512sig1h x15,x31,x31 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b31, Zknh_sha512sig1h_cg_cmp_rs1_rs2_b31_str) +80003388: 00062203 lw x4,0(x12) +8000338c: 00f20863 beq x4,x15,8000339c +80003390: 170022ef jal x5,80005500 +80003394: 80003384 .word 0x80003384 +80003398: 8000eb1a .word 0x8000eb1a +8000339c: 00460613 addi x12,x12,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0xd20d4079 +800033a0: 0005a003 lw x0,0(x11) +800033a4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x6d6e2646 +800033a8: 0005a783 lw x15,0(x11) +800033ac: 00458593 addi x11,x11,4 + +800033b0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b0: + sha512sig1h x0, x0, x15 # perform operation +800033b0: 5ef00033 sha512sig1h x0,x0,x15 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zknh_sha512sig1h_cg_cmp_rd_rs1_b0, Zknh_sha512sig1h_cg_cmp_rd_rs1_b0_str) +800033b4: 00062203 lw x4,0(x12) +800033b8: 00020863 beq x4,x0,800033c8 +800033bc: 144022ef jal x5,80005500 +800033c0: 800033b0 .word 0x800033b0 +800033c4: 8000eb5a .word 0x8000eb5a +800033c8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x5b7c55cb +800033cc: 0005a083 lw x1,0(x11) +800033d0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x57ba1c91 +800033d4: 0005a383 lw x7,0(x11) +800033d8: 00458593 addi x11,x11,4 + +800033dc : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b1: + sha512sig1h x1, x1, x7 # perform operation +800033dc: 5e7080b3 sha512sig1h x1,x1,x7 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknh_sha512sig1h_cg_cmp_rd_rs1_b1, Zknh_sha512sig1h_cg_cmp_rd_rs1_b1_str) +800033e0: 00062203 lw x4,0(x12) +800033e4: 00120863 beq x4,x1,800033f4 +800033e8: 118022ef jal x5,80005500 +800033ec: 800033dc .word 0x800033dc +800033f0: 8000eb98 .word 0x8000eb98 +800033f4: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0xbdd5dd2b +800033f8: 0005a103 lw x2,0(x11) +800033fc: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xa06599f4 +80003400: 0005aa83 lw x21,0(x11) +80003404: 00458593 addi x11,x11,4 + +80003408 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b2: + sha512sig1h x2, x2, x21 # perform operation +80003408: 5f510133 sha512sig1h x2,x2,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknh_sha512sig1h_cg_cmp_rd_rs1_b2, Zknh_sha512sig1h_cg_cmp_rd_rs1_b2_str) +8000340c: 00062203 lw x4,0(x12) +80003410: 00220863 beq x4,x2,80003420 +80003414: 0ec022ef jal x5,80005500 +80003418: 80003408 .word 0x80003408 +8000341c: 8000ebd6 .word 0x8000ebd6 +80003420: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x0bbe6706 +80003424: 0005a183 lw x3,0(x11) +80003428: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x435adaf9 +8000342c: 0005a903 lw x18,0(x11) +80003430: 00458593 addi x11,x11,4 + +80003434 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b3: + sha512sig1h x3, x3, x18 # perform operation +80003434: 5f2181b3 sha512sig1h x3,x3,x18 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknh_sha512sig1h_cg_cmp_rd_rs1_b3, Zknh_sha512sig1h_cg_cmp_rd_rs1_b3_str) +80003438: 00062203 lw x4,0(x12) +8000343c: 00320863 beq x4,x3,8000344c +80003440: 0c0022ef jal x5,80005500 +80003444: 80003434 .word 0x80003434 +80003448: 8000ec14 .word 0x8000ec14 +8000344c: 00460613 addi x12,x12,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003450: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003454: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x064c0c2f +80003458: 0005a203 lw x4,0(x11) +8000345c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x395df0b0 +80003460: 0005a903 lw x18,0(x11) +80003464: 00458593 addi x11,x11,4 + +80003468 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b4: + sha512sig1h x4, x4, x18 # perform operation +80003468: 5f220233 sha512sig1h x4,x4,x18 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zknh_sha512sig1h_cg_cmp_rd_rs1_b4, Zknh_sha512sig1h_cg_cmp_rd_rs1_b4_str) +8000346c: 00062683 lw x13,0(x12) +80003470: 00468863 beq x13,x4,80003480 +80003474: 0cc0276f jal x14,80005540 +80003478: 80003468 .word 0x80003468 +8000347c: 8000ec52 .word 0x8000ec52 +80003480: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x011cee20 +80003484: 0005a283 lw x5,0(x11) +80003488: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xffbbb0a0 +8000348c: 0005af83 lw x31,0(x11) +80003490: 00458593 addi x11,x11,4 + +80003494 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b5: + sha512sig1h x5, x5, x31 # perform operation +80003494: 5ff282b3 sha512sig1h x5,x5,x31 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zknh_sha512sig1h_cg_cmp_rd_rs1_b5, Zknh_sha512sig1h_cg_cmp_rd_rs1_b5_str) +80003498: 00062683 lw x13,0(x12) +8000349c: 00568863 beq x13,x5,800034ac +800034a0: 0a00276f jal x14,80005540 +800034a4: 80003494 .word 0x80003494 +800034a8: 8000ec90 .word 0x8000ec90 +800034ac: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xe11cff38 +800034b0: 0005a303 lw x6,0(x11) +800034b4: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x46f022fc +800034b8: 0005a003 lw x0,0(x11) +800034bc: 00458593 addi x11,x11,4 + +800034c0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b6: + sha512sig1h x6, x6, x0 # perform operation +800034c0: 5e030333 sha512sig1h x6,x6,x0 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zknh_sha512sig1h_cg_cmp_rd_rs1_b6, Zknh_sha512sig1h_cg_cmp_rd_rs1_b6_str) +800034c4: 00062683 lw x13,0(x12) +800034c8: 00668863 beq x13,x6,800034d8 +800034cc: 0740276f jal x14,80005540 +800034d0: 800034c0 .word 0x800034c0 +800034d4: 8000ecce .word 0x8000ecce +800034d8: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x60c6bb7b +800034dc: 0005a383 lw x7,0(x11) +800034e0: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xe37d1eec +800034e4: 0005a903 lw x18,0(x11) +800034e8: 00458593 addi x11,x11,4 + +800034ec : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b7: + sha512sig1h x7, x7, x18 # perform operation +800034ec: 5f2383b3 sha512sig1h x7,x7,x18 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zknh_sha512sig1h_cg_cmp_rd_rs1_b7, Zknh_sha512sig1h_cg_cmp_rd_rs1_b7_str) +800034f0: 00062683 lw x13,0(x12) +800034f4: 00768863 beq x13,x7,80003504 +800034f8: 0480276f jal x14,80005540 +800034fc: 800034ec .word 0x800034ec +80003500: 8000ed0c .word 0x8000ed0c +80003504: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x680e101f +80003508: 0005a403 lw x8,0(x11) +8000350c: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x7b9574ec +80003510: 0005a503 lw x10,0(x11) +80003514: 00458593 addi x11,x11,4 + +80003518 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b8: + sha512sig1h x8, x8, x10 # perform operation +80003518: 5ea40433 sha512sig1h x8,x8,x10 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zknh_sha512sig1h_cg_cmp_rd_rs1_b8, Zknh_sha512sig1h_cg_cmp_rd_rs1_b8_str) +8000351c: 00062683 lw x13,0(x12) +80003520: 00868863 beq x13,x8,80003530 +80003524: 01c0276f jal x14,80005540 +80003528: 80003518 .word 0x80003518 +8000352c: 8000ed4a .word 0x8000ed4a +80003530: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0xb401871b +80003534: 0005a483 lw x9,0(x11) +80003538: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x05bc99d7 +8000353c: 0005aa83 lw x21,0(x11) +80003540: 00458593 addi x11,x11,4 + +80003544 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b9: + sha512sig1h x9, x9, x21 # perform operation +80003544: 5f5484b3 sha512sig1h x9,x9,x21 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zknh_sha512sig1h_cg_cmp_rd_rs1_b9, Zknh_sha512sig1h_cg_cmp_rd_rs1_b9_str) +80003548: 00062683 lw x13,0(x12) +8000354c: 00968863 beq x13,x9,8000355c +80003550: 7f10176f jal x14,80005540 +80003554: 80003544 .word 0x80003544 +80003558: 8000ed88 .word 0x8000ed88 +8000355c: 00460613 addi x12,x12,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x750b9e64 +80003560: 0005a503 lw x10,0(x11) +80003564: 00458593 addi x11,x11,4 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x815712c3 +80003568: 0005ab03 lw x22,0(x11) +8000356c: 00458593 addi x11,x11,4 + +80003570 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b10: + sha512sig1h x10, x10, x22 # perform operation +80003570: 5f650533 sha512sig1h x10,x10,x22 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zknh_sha512sig1h_cg_cmp_rd_rs1_b10, Zknh_sha512sig1h_cg_cmp_rd_rs1_b10_str) +80003574: 00062683 lw x13,0(x12) +80003578: 00a68863 beq x13,x10,80003588 +8000357c: 7c50176f jal x14,80005540 +80003580: 80003570 .word 0x80003570 +80003584: 8000edc6 .word 0x8000edc6 +80003588: 00460613 addi x12,x12,4 + + mv x10, x11 # switch data pointer register to avoid conflict with test +8000358c: 00058513 addi x10,x11,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xbbf0427c +80003590: 00052583 lw x11,0(x10) +80003594: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x22f48923 +80003598: 00052c83 lw x25,0(x10) +8000359c: 00450513 addi x10,x10,4 + +800035a0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b11: + sha512sig1h x11, x11, x25 # perform operation +800035a0: 5f9585b3 sha512sig1h x11,x11,x25 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zknh_sha512sig1h_cg_cmp_rd_rs1_b11, Zknh_sha512sig1h_cg_cmp_rd_rs1_b11_str) +800035a4: 00062683 lw x13,0(x12) +800035a8: 00b68863 beq x13,x11,800035b8 +800035ac: 7950176f jal x14,80005540 +800035b0: 800035a0 .word 0x800035a0 +800035b4: 8000ee05 .word 0x8000ee05 +800035b8: 00460613 addi x12,x12,4 + + mv x16, x12 # switch signature pointer register to avoid conflict with test +800035bc: 00060813 addi x16,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x9b7e48b3 +800035c0: 00052603 lw x12,0(x10) +800035c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xfcd41e7c +800035c8: 00052003 lw x0,0(x10) +800035cc: 00450513 addi x10,x10,4 + +800035d0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b12: + sha512sig1h x12, x12, x0 # perform operation +800035d0: 5e060633 sha512sig1h x12,x12,x0 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zknh_sha512sig1h_cg_cmp_rd_rs1_b12, Zknh_sha512sig1h_cg_cmp_rd_rs1_b12_str) +800035d4: 00082683 lw x13,0(x16) +800035d8: 00c68863 beq x13,x12,800035e8 +800035dc: 7650176f jal x14,80005540 +800035e0: 800035d0 .word 0x800035d0 +800035e4: 8000ee44 .word 0x8000ee44 +800035e8: 00480813 addi x16,x16,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800035ec: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800035f0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x78bb2fb8 +800035f4: 00052683 lw x13,0(x10) +800035f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8093089c +800035fc: 00052103 lw x2,0(x10) +80003600: 00450513 addi x10,x10,4 + +80003604 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b13: + sha512sig1h x13, x13, x2 # perform operation +80003604: 5e2686b3 sha512sig1h x13,x13,x2 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknh_sha512sig1h_cg_cmp_rd_rs1_b13, Zknh_sha512sig1h_cg_cmp_rd_rs1_b13_str) +80003608: 00082203 lw x4,0(x16) +8000360c: 00d20863 beq x4,x13,8000361c +80003610: 6f1012ef jal x5,80005500 +80003614: 80003604 .word 0x80003604 +80003618: 8000ee83 .word 0x8000ee83 +8000361c: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x869ec11f +80003620: 00052703 lw x14,0(x10) +80003624: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x007fae5a +80003628: 00052383 lw x7,0(x10) +8000362c: 00450513 addi x10,x10,4 + +80003630 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b14: + sha512sig1h x14, x14, x7 # perform operation +80003630: 5e770733 sha512sig1h x14,x14,x7 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknh_sha512sig1h_cg_cmp_rd_rs1_b14, Zknh_sha512sig1h_cg_cmp_rd_rs1_b14_str) +80003634: 00082203 lw x4,0(x16) +80003638: 00e20863 beq x4,x14,80003648 +8000363c: 6c5012ef jal x5,80005500 +80003640: 80003630 .word 0x80003630 +80003644: 8000eec2 .word 0x8000eec2 +80003648: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x204d69df +8000364c: 00052783 lw x15,0(x10) +80003650: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x273867be +80003654: 00052e03 lw x28,0(x10) +80003658: 00450513 addi x10,x10,4 + +8000365c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b15: + sha512sig1h x15, x15, x28 # perform operation +8000365c: 5fc787b3 sha512sig1h x15,x15,x28 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknh_sha512sig1h_cg_cmp_rd_rs1_b15, Zknh_sha512sig1h_cg_cmp_rd_rs1_b15_str) +80003660: 00082203 lw x4,0(x16) +80003664: 00f20863 beq x4,x15,80003674 +80003668: 699012ef jal x5,80005500 +8000366c: 8000365c .word 0x8000365c +80003670: 8000ef01 .word 0x8000ef01 +80003674: 00480813 addi x16,x16,4 + + mv x2, x16 # switch signature pointer register to avoid conflict with test +80003678: 00080113 addi x2,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xd8aa7527 +8000367c: 00052803 lw x16,0(x10) +80003680: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xd1096ac8 +80003684: 00052f03 lw x30,0(x10) +80003688: 00450513 addi x10,x10,4 + +8000368c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b16: + sha512sig1h x16, x16, x30 # perform operation +8000368c: 5fe80833 sha512sig1h x16,x16,x30 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknh_sha512sig1h_cg_cmp_rd_rs1_b16, Zknh_sha512sig1h_cg_cmp_rd_rs1_b16_str) +80003690: 00012203 lw x4,0(x2) +80003694: 01020863 beq x4,x16,800036a4 +80003698: 669012ef jal x5,80005500 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000ef40 .word 0x8000ef40 +800036a4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xb2e8dc82 +800036a8: 00052883 lw x17,0(x10) +800036ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8566b326 +800036b0: 00052e03 lw x28,0(x10) +800036b4: 00450513 addi x10,x10,4 + +800036b8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b17: + sha512sig1h x17, x17, x28 # perform operation +800036b8: 5fc888b3 sha512sig1h x17,x17,x28 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zknh_sha512sig1h_cg_cmp_rd_rs1_b17, Zknh_sha512sig1h_cg_cmp_rd_rs1_b17_str) +800036bc: 00012203 lw x4,0(x2) +800036c0: 01120863 beq x4,x17,800036d0 +800036c4: 63d012ef jal x5,80005500 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000ef7f .word 0x8000ef7f +800036d0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x182f7591 +800036d4: 00052903 lw x18,0(x10) +800036d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x8242684f +800036dc: 00052483 lw x9,0(x10) +800036e0: 00450513 addi x10,x10,4 + +800036e4 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b18: + sha512sig1h x18, x18, x9 # perform operation +800036e4: 5e990933 sha512sig1h x18,x18,x9 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknh_sha512sig1h_cg_cmp_rd_rs1_b18, Zknh_sha512sig1h_cg_cmp_rd_rs1_b18_str) +800036e8: 00012203 lw x4,0(x2) +800036ec: 01220863 beq x4,x18,800036fc +800036f0: 611012ef jal x5,80005500 +800036f4: 800036e4 .word 0x800036e4 +800036f8: 8000efbe .word 0x8000efbe +800036fc: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x6c114e88 +80003700: 00052983 lw x19,0(x10) +80003704: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xc18b1bf1 +80003708: 00052d03 lw x26,0(x10) +8000370c: 00450513 addi x10,x10,4 + +80003710 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b19: + sha512sig1h x19, x19, x26 # perform operation +80003710: 5fa989b3 sha512sig1h x19,x19,x26 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknh_sha512sig1h_cg_cmp_rd_rs1_b19, Zknh_sha512sig1h_cg_cmp_rd_rs1_b19_str) +80003714: 00012203 lw x4,0(x2) +80003718: 01320863 beq x4,x19,80003728 +8000371c: 5e5012ef jal x5,80005500 +80003720: 80003710 .word 0x80003710 +80003724: 8000effd .word 0x8000effd +80003728: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xe2877480 +8000372c: 00052a03 lw x20,0(x10) +80003730: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xe61148fe +80003734: 00052383 lw x7,0(x10) +80003738: 00450513 addi x10,x10,4 + +8000373c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b20: + sha512sig1h x20, x20, x7 # perform operation +8000373c: 5e7a0a33 sha512sig1h x20,x20,x7 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zknh_sha512sig1h_cg_cmp_rd_rs1_b20, Zknh_sha512sig1h_cg_cmp_rd_rs1_b20_str) +80003740: 00012203 lw x4,0(x2) +80003744: 01420863 beq x4,x20,80003754 +80003748: 5b9012ef jal x5,80005500 +8000374c: 8000373c .word 0x8000373c +80003750: 8000f03c .word 0x8000f03c +80003754: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xc80e2824 +80003758: 00052a83 lw x21,0(x10) +8000375c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xc5a33678 +80003760: 00052d03 lw x26,0(x10) +80003764: 00450513 addi x10,x10,4 + +80003768 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b21: + sha512sig1h x21, x21, x26 # perform operation +80003768: 5faa8ab3 sha512sig1h x21,x21,x26 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zknh_sha512sig1h_cg_cmp_rd_rs1_b21, Zknh_sha512sig1h_cg_cmp_rd_rs1_b21_str) +8000376c: 00012203 lw x4,0(x2) +80003770: 01520863 beq x4,x21,80003780 +80003774: 58d012ef jal x5,80005500 +80003778: 80003768 .word 0x80003768 +8000377c: 8000f07b .word 0x8000f07b +80003780: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xe944be9d +80003784: 00052b03 lw x22,0(x10) +80003788: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x58c5d66a +8000378c: 00052603 lw x12,0(x10) +80003790: 00450513 addi x10,x10,4 + +80003794 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b22: + sha512sig1h x22, x22, x12 # perform operation +80003794: 5ecb0b33 sha512sig1h x22,x22,x12 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknh_sha512sig1h_cg_cmp_rd_rs1_b22, Zknh_sha512sig1h_cg_cmp_rd_rs1_b22_str) +80003798: 00012203 lw x4,0(x2) +8000379c: 01620863 beq x4,x22,800037ac +800037a0: 561012ef jal x5,80005500 +800037a4: 80003794 .word 0x80003794 +800037a8: 8000f0ba .word 0x8000f0ba +800037ac: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x775611a0 +800037b0: 00052b83 lw x23,0(x10) +800037b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x02ecac80 +800037b8: 00052d83 lw x27,0(x10) +800037bc: 00450513 addi x10,x10,4 + +800037c0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b23: + sha512sig1h x23, x23, x27 # perform operation +800037c0: 5fbb8bb3 sha512sig1h x23,x23,x27 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zknh_sha512sig1h_cg_cmp_rd_rs1_b23, Zknh_sha512sig1h_cg_cmp_rd_rs1_b23_str) +800037c4: 00012203 lw x4,0(x2) +800037c8: 01720863 beq x4,x23,800037d8 +800037cc: 535012ef jal x5,80005500 +800037d0: 800037c0 .word 0x800037c0 +800037d4: 8000f0f9 .word 0x8000f0f9 +800037d8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0595c1b2 +800037dc: 00052c03 lw x24,0(x10) +800037e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xbec6b6a3 +800037e4: 00052b03 lw x22,0(x10) +800037e8: 00450513 addi x10,x10,4 + +800037ec : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b24: + sha512sig1h x24, x24, x22 # perform operation +800037ec: 5f6c0c33 sha512sig1h x24,x24,x22 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknh_sha512sig1h_cg_cmp_rd_rs1_b24, Zknh_sha512sig1h_cg_cmp_rd_rs1_b24_str) +800037f0: 00012203 lw x4,0(x2) +800037f4: 01820863 beq x4,x24,80003804 +800037f8: 509012ef jal x5,80005500 +800037fc: 800037ec .word 0x800037ec +80003800: 8000f138 .word 0x8000f138 +80003804: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x821e8973 +80003808: 00052c83 lw x25,0(x10) +8000380c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x719f9c2b +80003810: 00052e83 lw x29,0(x10) +80003814: 00450513 addi x10,x10,4 + +80003818 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b25: + sha512sig1h x25, x25, x29 # perform operation +80003818: 5fdc8cb3 sha512sig1h x25,x25,x29 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknh_sha512sig1h_cg_cmp_rd_rs1_b25, Zknh_sha512sig1h_cg_cmp_rd_rs1_b25_str) +8000381c: 00012203 lw x4,0(x2) +80003820: 01920863 beq x4,x25,80003830 +80003824: 4dd012ef jal x5,80005500 +80003828: 80003818 .word 0x80003818 +8000382c: 8000f177 .word 0x8000f177 +80003830: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x3a866343 +80003834: 00052d03 lw x26,0(x10) +80003838: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xf0212b6b +8000383c: 00052403 lw x8,0(x10) +80003840: 00450513 addi x10,x10,4 + +80003844 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b26: + sha512sig1h x26, x26, x8 # perform operation +80003844: 5e8d0d33 sha512sig1h x26,x26,x8 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zknh_sha512sig1h_cg_cmp_rd_rs1_b26, Zknh_sha512sig1h_cg_cmp_rd_rs1_b26_str) +80003848: 00012203 lw x4,0(x2) +8000384c: 01a20863 beq x4,x26,8000385c +80003850: 4b1012ef jal x5,80005500 +80003854: 80003844 .word 0x80003844 +80003858: 8000f1b6 .word 0x8000f1b6 +8000385c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xc306d226 +80003860: 00052d83 lw x27,0(x10) +80003864: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xbf64b048 +80003868: 00052803 lw x16,0(x10) +8000386c: 00450513 addi x10,x10,4 + +80003870 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b27: + sha512sig1h x27, x27, x16 # perform operation +80003870: 5f0d8db3 sha512sig1h x27,x27,x16 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknh_sha512sig1h_cg_cmp_rd_rs1_b27, Zknh_sha512sig1h_cg_cmp_rd_rs1_b27_str) +80003874: 00012203 lw x4,0(x2) +80003878: 01b20863 beq x4,x27,80003888 +8000387c: 485012ef jal x5,80005500 +80003880: 80003870 .word 0x80003870 +80003884: 8000f1f5 .word 0x8000f1f5 +80003888: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x69526ffc +8000388c: 00052e03 lw x28,0(x10) +80003890: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x1d076937 +80003894: 00052a83 lw x21,0(x10) +80003898: 00450513 addi x10,x10,4 + +8000389c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b28: + sha512sig1h x28, x28, x21 # perform operation +8000389c: 5f5e0e33 sha512sig1h x28,x28,x21 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha512sig1h_cg_cmp_rd_rs1_b28, Zknh_sha512sig1h_cg_cmp_rd_rs1_b28_str) +800038a0: 00012203 lw x4,0(x2) +800038a4: 01c20863 beq x4,x28,800038b4 +800038a8: 459012ef jal x5,80005500 +800038ac: 8000389c .word 0x8000389c +800038b0: 8000f234 .word 0x8000f234 +800038b4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x2d1e9c05 +800038b8: 00052e83 lw x29,0(x10) +800038bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x85f3eb32 +800038c0: 00052b83 lw x23,0(x10) +800038c4: 00450513 addi x10,x10,4 + +800038c8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b29: + sha512sig1h x29, x29, x23 # perform operation +800038c8: 5f7e8eb3 sha512sig1h x29,x29,x23 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknh_sha512sig1h_cg_cmp_rd_rs1_b29, Zknh_sha512sig1h_cg_cmp_rd_rs1_b29_str) +800038cc: 00012203 lw x4,0(x2) +800038d0: 01d20863 beq x4,x29,800038e0 +800038d4: 42d012ef jal x5,80005500 +800038d8: 800038c8 .word 0x800038c8 +800038dc: 8000f273 .word 0x8000f273 +800038e0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x6968ab3c +800038e4: 00052f03 lw x30,0(x10) +800038e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x8da418fc +800038ec: 00052e83 lw x29,0(x10) +800038f0: 00450513 addi x10,x10,4 + +800038f4 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b30: + sha512sig1h x30, x30, x29 # perform operation +800038f4: 5fdf0f33 sha512sig1h x30,x30,x29 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha512sig1h_cg_cmp_rd_rs1_b30, Zknh_sha512sig1h_cg_cmp_rd_rs1_b30_str) +800038f8: 00012203 lw x4,0(x2) +800038fc: 01e20863 beq x4,x30,8000390c +80003900: 401012ef jal x5,80005500 +80003904: 800038f4 .word 0x800038f4 +80003908: 8000f2b2 .word 0x8000f2b2 +8000390c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x549f3949 +80003910: 00052f83 lw x31,0(x10) +80003914: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x67f1997a +80003918: 00052d83 lw x27,0(x10) +8000391c: 00450513 addi x10,x10,4 + +80003920 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_b31: + sha512sig1h x31, x31, x27 # perform operation +80003920: 5fbf8fb3 sha512sig1h x31,x31,x27 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha512sig1h_cg_cmp_rd_rs1_b31, Zknh_sha512sig1h_cg_cmp_rd_rs1_b31_str) +80003924: 00012203 lw x4,0(x2) +80003928: 01f20863 beq x4,x31,80003938 +8000392c: 3d5012ef jal x5,80005500 +80003930: 80003920 .word 0x80003920 +80003934: 8000f2f1 .word 0x8000f2f1 +80003938: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xfd02be4e +8000393c: 00052a03 lw x20,0(x10) +80003940: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xd6da691c +80003944: 00052003 lw x0,0(x10) +80003948: 00450513 addi x10,x10,4 + +8000394c : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b0: + sha512sig1h x0, x20, x0 # perform operation +8000394c: 5e0a0033 sha512sig1h x0,x20,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknh_sha512sig1h_cg_cmp_rd_rs2_b0, Zknh_sha512sig1h_cg_cmp_rd_rs2_b0_str) +80003950: 00012203 lw x4,0(x2) +80003954: 00020863 beq x4,x0,80003964 +80003958: 3a9012ef jal x5,80005500 +8000395c: 8000394c .word 0x8000394c +80003960: 8000f330 .word 0x8000f330 +80003964: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x016fc4ef +80003968: 00052b03 lw x22,0(x10) +8000396c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x1047b86d +80003970: 00052083 lw x1,0(x10) +80003974: 00450513 addi x10,x10,4 + +80003978 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b1: + sha512sig1h x1, x22, x1 # perform operation +80003978: 5e1b00b3 sha512sig1h x1,x22,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknh_sha512sig1h_cg_cmp_rd_rs2_b1, Zknh_sha512sig1h_cg_cmp_rd_rs2_b1_str) +8000397c: 00012203 lw x4,0(x2) +80003980: 00120863 beq x4,x1,80003990 +80003984: 37d012ef jal x5,80005500 +80003988: 80003978 .word 0x80003978 +8000398c: 8000f36e .word 0x8000f36e +80003990: 00410113 addi x2,x2,4 + + mv x15, x2 # switch signature pointer register to avoid conflict with test +80003994: 00010793 addi x15,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xa5d45660 +80003998: 00052483 lw x9,0(x10) +8000399c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x1bccb080 +800039a0: 00052103 lw x2,0(x10) +800039a4: 00450513 addi x10,x10,4 + +800039a8 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b2: + sha512sig1h x2, x9, x2 # perform operation +800039a8: 5e248133 sha512sig1h x2,x9,x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sig1h_cg_cmp_rd_rs2_b2, Zknh_sha512sig1h_cg_cmp_rd_rs2_b2_str) +800039ac: 0007a203 lw x4,0(x15) +800039b0: 00220863 beq x4,x2,800039c0 +800039b4: 34d012ef jal x5,80005500 +800039b8: 800039a8 .word 0x800039a8 +800039bc: 8000f3ac .word 0x8000f3ac +800039c0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x10b7eb85 +800039c4: 00052d83 lw x27,0(x10) +800039c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00d894d0 +800039cc: 00052183 lw x3,0(x10) +800039d0: 00450513 addi x10,x10,4 + +800039d4 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b3: + sha512sig1h x3, x27, x3 # perform operation +800039d4: 5e3d81b3 sha512sig1h x3,x27,x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sig1h_cg_cmp_rd_rs2_b3, Zknh_sha512sig1h_cg_cmp_rd_rs2_b3_str) +800039d8: 0007a203 lw x4,0(x15) +800039dc: 00320863 beq x4,x3,800039ec +800039e0: 321012ef jal x5,80005500 +800039e4: 800039d4 .word 0x800039d4 +800039e8: 8000f3ea .word 0x8000f3ea +800039ec: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800039f0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800039f4: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xe4577f2e +800039f8: 00052083 lw x1,0(x10) +800039fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0c1cbd2a +80003a00: 00052203 lw x4,0(x10) +80003a04: 00450513 addi x10,x10,4 + +80003a08 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b4: + sha512sig1h x4, x1, x4 # perform operation +80003a08: 5e408233 sha512sig1h x4,x1,x4 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zknh_sha512sig1h_cg_cmp_rd_rs2_b4, Zknh_sha512sig1h_cg_cmp_rd_rs2_b4_str) +80003a0c: 0007a683 lw x13,0(x15) +80003a10: 00468863 beq x13,x4,80003a20 +80003a14: 32d0176f jal x14,80005540 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 8000f428 .word 0x8000f428 +80003a20: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xbd7c4746 +80003a24: 00052883 lw x17,0(x10) +80003a28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xbd4ecc2b +80003a2c: 00052283 lw x5,0(x10) +80003a30: 00450513 addi x10,x10,4 + +80003a34 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b5: + sha512sig1h x5, x17, x5 # perform operation +80003a34: 5e5882b3 sha512sig1h x5,x17,x5 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zknh_sha512sig1h_cg_cmp_rd_rs2_b5, Zknh_sha512sig1h_cg_cmp_rd_rs2_b5_str) +80003a38: 0007a683 lw x13,0(x15) +80003a3c: 00568863 beq x13,x5,80003a4c +80003a40: 3010176f jal x14,80005540 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 8000f466 .word 0x8000f466 +80003a4c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x59606ec4 +80003a50: 00052083 lw x1,0(x10) +80003a54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xce206e8a +80003a58: 00052303 lw x6,0(x10) +80003a5c: 00450513 addi x10,x10,4 + +80003a60 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b6: + sha512sig1h x6, x1, x6 # perform operation +80003a60: 5e608333 sha512sig1h x6,x1,x6 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zknh_sha512sig1h_cg_cmp_rd_rs2_b6, Zknh_sha512sig1h_cg_cmp_rd_rs2_b6_str) +80003a64: 0007a683 lw x13,0(x15) +80003a68: 00668863 beq x13,x6,80003a78 +80003a6c: 2d50176f jal x14,80005540 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 8000f4a4 .word 0x8000f4a4 +80003a78: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x2c45b109 +80003a7c: 00052203 lw x4,0(x10) +80003a80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x34c1d6a2 +80003a84: 00052383 lw x7,0(x10) +80003a88: 00450513 addi x10,x10,4 + +80003a8c : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b7: + sha512sig1h x7, x4, x7 # perform operation +80003a8c: 5e7203b3 sha512sig1h x7,x4,x7 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zknh_sha512sig1h_cg_cmp_rd_rs2_b7, Zknh_sha512sig1h_cg_cmp_rd_rs2_b7_str) +80003a90: 0007a683 lw x13,0(x15) +80003a94: 00768863 beq x13,x7,80003aa4 +80003a98: 2a90176f jal x14,80005540 +80003a9c: 80003a8c .word 0x80003a8c +80003aa0: 8000f4e2 .word 0x8000f4e2 +80003aa4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x6767c446 +80003aa8: 00052283 lw x5,0(x10) +80003aac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x26e33a28 +80003ab0: 00052403 lw x8,0(x10) +80003ab4: 00450513 addi x10,x10,4 + +80003ab8 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b8: + sha512sig1h x8, x5, x8 # perform operation +80003ab8: 5e828433 sha512sig1h x8,x5,x8 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zknh_sha512sig1h_cg_cmp_rd_rs2_b8, Zknh_sha512sig1h_cg_cmp_rd_rs2_b8_str) +80003abc: 0007a683 lw x13,0(x15) +80003ac0: 00868863 beq x13,x8,80003ad0 +80003ac4: 27d0176f jal x14,80005540 +80003ac8: 80003ab8 .word 0x80003ab8 +80003acc: 8000f520 .word 0x8000f520 +80003ad0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xf6122f88 +80003ad4: 00052e83 lw x29,0(x10) +80003ad8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xdc66bc2f +80003adc: 00052483 lw x9,0(x10) +80003ae0: 00450513 addi x10,x10,4 + +80003ae4 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b9: + sha512sig1h x9, x29, x9 # perform operation +80003ae4: 5e9e84b3 sha512sig1h x9,x29,x9 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zknh_sha512sig1h_cg_cmp_rd_rs2_b9, Zknh_sha512sig1h_cg_cmp_rd_rs2_b9_str) +80003ae8: 0007a683 lw x13,0(x15) +80003aec: 00968863 beq x13,x9,80003afc +80003af0: 2510176f jal x14,80005540 +80003af4: 80003ae4 .word 0x80003ae4 +80003af8: 8000f55e .word 0x8000f55e +80003afc: 00478793 addi x15,x15,4 + + mv x26, x10 # switch data pointer register to avoid conflict with test +80003b00: 00050d13 addi x26,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x14af3cef +80003b04: 000d2803 lw x16,0(x26) +80003b08: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x96013c3d +80003b0c: 000d2503 lw x10,0(x26) +80003b10: 004d0d13 addi x26,x26,4 + +80003b14 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b10: + sha512sig1h x10, x16, x10 # perform operation +80003b14: 5ea80533 sha512sig1h x10,x16,x10 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zknh_sha512sig1h_cg_cmp_rd_rs2_b10, Zknh_sha512sig1h_cg_cmp_rd_rs2_b10_str) +80003b18: 0007a683 lw x13,0(x15) +80003b1c: 00a68863 beq x13,x10,80003b2c +80003b20: 2210176f jal x14,80005540 +80003b24: 80003b14 .word 0x80003b14 +80003b28: 8000f59c .word 0x8000f59c +80003b2c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xe256c971 +80003b30: 000d2183 lw x3,0(x26) +80003b34: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x3f4fba40 +80003b38: 000d2583 lw x11,0(x26) +80003b3c: 004d0d13 addi x26,x26,4 + +80003b40 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b11: + sha512sig1h x11, x3, x11 # perform operation +80003b40: 5eb185b3 sha512sig1h x11,x3,x11 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zknh_sha512sig1h_cg_cmp_rd_rs2_b11, Zknh_sha512sig1h_cg_cmp_rd_rs2_b11_str) +80003b44: 0007a683 lw x13,0(x15) +80003b48: 00b68863 beq x13,x11,80003b58 +80003b4c: 1f50176f jal x14,80005540 +80003b50: 80003b40 .word 0x80003b40 +80003b54: 8000f5db .word 0x8000f5db +80003b58: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xf8a045ad +80003b5c: 000d2a03 lw x20,0(x26) +80003b60: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xb92fe078 +80003b64: 000d2603 lw x12,0(x26) +80003b68: 004d0d13 addi x26,x26,4 + +80003b6c : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b12: + sha512sig1h x12, x20, x12 # perform operation +80003b6c: 5eca0633 sha512sig1h x12,x20,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zknh_sha512sig1h_cg_cmp_rd_rs2_b12, Zknh_sha512sig1h_cg_cmp_rd_rs2_b12_str) +80003b70: 0007a683 lw x13,0(x15) +80003b74: 00c68863 beq x13,x12,80003b84 +80003b78: 1c90176f jal x14,80005540 +80003b7c: 80003b6c .word 0x80003b6c +80003b80: 8000f61a .word 0x8000f61a +80003b84: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b88: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003b8c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0x2344668a +80003b90: 000d2103 lw x2,0(x26) +80003b94: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x6c5e8ded +80003b98: 000d2683 lw x13,0(x26) +80003b9c: 004d0d13 addi x26,x26,4 + +80003ba0 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b13: + sha512sig1h x13, x2, x13 # perform operation +80003ba0: 5ed106b3 sha512sig1h x13,x2,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknh_sha512sig1h_cg_cmp_rd_rs2_b13, Zknh_sha512sig1h_cg_cmp_rd_rs2_b13_str) +80003ba4: 0007a383 lw x7,0(x15) +80003ba8: 00d38863 beq x7,x13,80003bb8 +80003bac: 16d0146f jal x8,80005518 +80003bb0: 80003ba0 .word 0x80003ba0 +80003bb4: 8000f659 .word 0x8000f659 +80003bb8: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0xdf3cc315 +80003bbc: 000d2f83 lw x31,0(x26) +80003bc0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xd84c16d1 +80003bc4: 000d2703 lw x14,0(x26) +80003bc8: 004d0d13 addi x26,x26,4 + +80003bcc : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b14: + sha512sig1h x14, x31, x14 # perform operation +80003bcc: 5eef8733 sha512sig1h x14,x31,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sig1h_cg_cmp_rd_rs2_b14, Zknh_sha512sig1h_cg_cmp_rd_rs2_b14_str) +80003bd0: 0007a383 lw x7,0(x15) +80003bd4: 00e38863 beq x7,x14,80003be4 +80003bd8: 1410146f jal x8,80005518 +80003bdc: 80003bcc .word 0x80003bcc +80003be0: 8000f698 .word 0x8000f698 +80003be4: 00478793 addi x15,x15,4 + + mv x9, x15 # switch signature pointer register to avoid conflict with test +80003be8: 00078493 addi x9,x15,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xb7c9309f +80003bec: 000d2b03 lw x22,0(x26) +80003bf0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x8e1c28fd +80003bf4: 000d2783 lw x15,0(x26) +80003bf8: 004d0d13 addi x26,x26,4 + +80003bfc : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b15: + sha512sig1h x15, x22, x15 # perform operation +80003bfc: 5efb07b3 sha512sig1h x15,x22,x15 + # Check if x15 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x15, Zknh_sha512sig1h_cg_cmp_rd_rs2_b15, Zknh_sha512sig1h_cg_cmp_rd_rs2_b15_str) +80003c00: 0004a383 lw x7,0(x9) +80003c04: 00f38863 beq x7,x15,80003c14 +80003c08: 1110146f jal x8,80005518 +80003c0c: 80003bfc .word 0x80003bfc +80003c10: 8000f6d7 .word 0x8000f6d7 +80003c14: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xe47673fb +80003c18: 000d2b03 lw x22,0(x26) +80003c1c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x2ae2212e +80003c20: 000d2803 lw x16,0(x26) +80003c24: 004d0d13 addi x26,x26,4 + +80003c28 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b16: + sha512sig1h x16, x22, x16 # perform operation +80003c28: 5f0b0833 sha512sig1h x16,x22,x16 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zknh_sha512sig1h_cg_cmp_rd_rs2_b16, Zknh_sha512sig1h_cg_cmp_rd_rs2_b16_str) +80003c2c: 0004a383 lw x7,0(x9) +80003c30: 01038863 beq x7,x16,80003c40 +80003c34: 0e50146f jal x8,80005518 +80003c38: 80003c28 .word 0x80003c28 +80003c3c: 8000f716 .word 0x8000f716 +80003c40: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x02e9772b +80003c44: 000d2583 lw x11,0(x26) +80003c48: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xaffa8253 +80003c4c: 000d2883 lw x17,0(x26) +80003c50: 004d0d13 addi x26,x26,4 + +80003c54 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b17: + sha512sig1h x17, x11, x17 # perform operation +80003c54: 5f1588b3 sha512sig1h x17,x11,x17 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zknh_sha512sig1h_cg_cmp_rd_rs2_b17, Zknh_sha512sig1h_cg_cmp_rd_rs2_b17_str) +80003c58: 0004a383 lw x7,0(x9) +80003c5c: 01138863 beq x7,x17,80003c6c +80003c60: 0b90146f jal x8,80005518 +80003c64: 80003c54 .word 0x80003c54 +80003c68: 8000f755 .word 0x8000f755 +80003c6c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs1: x2 = 0xec2e8c83 +80003c70: 000d2103 lw x2,0(x26) +80003c74: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x000b2ff7 +80003c78: 000d2903 lw x18,0(x26) +80003c7c: 004d0d13 addi x26,x26,4 + +80003c80 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b18: + sha512sig1h x18, x2, x18 # perform operation +80003c80: 5f210933 sha512sig1h x18,x2,x18 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zknh_sha512sig1h_cg_cmp_rd_rs2_b18, Zknh_sha512sig1h_cg_cmp_rd_rs2_b18_str) +80003c84: 0004a383 lw x7,0(x9) +80003c88: 01238863 beq x7,x18,80003c98 +80003c8c: 08d0146f jal x8,80005518 +80003c90: 80003c80 .word 0x80003c80 +80003c94: 8000f794 .word 0x8000f794 +80003c98: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xc0698d49 +80003c9c: 000d2a03 lw x20,0(x26) +80003ca0: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xa527faf4 +80003ca4: 000d2983 lw x19,0(x26) +80003ca8: 004d0d13 addi x26,x26,4 + +80003cac : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b19: + sha512sig1h x19, x20, x19 # perform operation +80003cac: 5f3a09b3 sha512sig1h x19,x20,x19 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zknh_sha512sig1h_cg_cmp_rd_rs2_b19, Zknh_sha512sig1h_cg_cmp_rd_rs2_b19_str) +80003cb0: 0004a383 lw x7,0(x9) +80003cb4: 01338863 beq x7,x19,80003cc4 +80003cb8: 0610146f jal x8,80005518 +80003cbc: 80003cac .word 0x80003cac +80003cc0: 8000f7d3 .word 0x8000f7d3 +80003cc4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x42070207 +80003cc8: 000d2b83 lw x23,0(x26) +80003ccc: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x066e98aa +80003cd0: 000d2a03 lw x20,0(x26) +80003cd4: 004d0d13 addi x26,x26,4 + +80003cd8 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b20: + sha512sig1h x20, x23, x20 # perform operation +80003cd8: 5f4b8a33 sha512sig1h x20,x23,x20 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zknh_sha512sig1h_cg_cmp_rd_rs2_b20, Zknh_sha512sig1h_cg_cmp_rd_rs2_b20_str) +80003cdc: 0004a383 lw x7,0(x9) +80003ce0: 01438863 beq x7,x20,80003cf0 +80003ce4: 0350146f jal x8,80005518 +80003ce8: 80003cd8 .word 0x80003cd8 +80003cec: 8000f812 .word 0x8000f812 +80003cf0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs1: x0 = 0x8ff616c6 +80003cf4: 000d2003 lw x0,0(x26) +80003cf8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xe22c69b0 +80003cfc: 000d2a83 lw x21,0(x26) +80003d00: 004d0d13 addi x26,x26,4 + +80003d04 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b21: + sha512sig1h x21, x0, x21 # perform operation +80003d04: 5f500ab3 sha512sig1h x21,x0,x21 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zknh_sha512sig1h_cg_cmp_rd_rs2_b21, Zknh_sha512sig1h_cg_cmp_rd_rs2_b21_str) +80003d08: 0004a383 lw x7,0(x9) +80003d0c: 01538863 beq x7,x21,80003d1c +80003d10: 0090146f jal x8,80005518 +80003d14: 80003d04 .word 0x80003d04 +80003d18: 8000f851 .word 0x8000f851 +80003d1c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x4f7bdf61 +80003d20: 000d2c83 lw x25,0(x26) +80003d24: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x1f047e8c +80003d28: 000d2b03 lw x22,0(x26) +80003d2c: 004d0d13 addi x26,x26,4 + +80003d30 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b22: + sha512sig1h x22, x25, x22 # perform operation +80003d30: 5f6c8b33 sha512sig1h x22,x25,x22 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zknh_sha512sig1h_cg_cmp_rd_rs2_b22, Zknh_sha512sig1h_cg_cmp_rd_rs2_b22_str) +80003d34: 0004a383 lw x7,0(x9) +80003d38: 01638863 beq x7,x22,80003d48 +80003d3c: 7dc0146f jal x8,80005518 +80003d40: 80003d30 .word 0x80003d30 +80003d44: 8000f890 .word 0x8000f890 +80003d48: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x72b1bcb0 +80003d4c: 000d2703 lw x14,0(x26) +80003d50: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xfe252302 +80003d54: 000d2b83 lw x23,0(x26) +80003d58: 004d0d13 addi x26,x26,4 + +80003d5c : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b23: + sha512sig1h x23, x14, x23 # perform operation +80003d5c: 5f770bb3 sha512sig1h x23,x14,x23 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zknh_sha512sig1h_cg_cmp_rd_rs2_b23, Zknh_sha512sig1h_cg_cmp_rd_rs2_b23_str) +80003d60: 0004a383 lw x7,0(x9) +80003d64: 01738863 beq x7,x23,80003d74 +80003d68: 7b00146f jal x8,80005518 +80003d6c: 80003d5c .word 0x80003d5c +80003d70: 8000f8cf .word 0x8000f8cf +80003d74: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x329359a7 +80003d78: 000d2583 lw x11,0(x26) +80003d7c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xd249cf37 +80003d80: 000d2c03 lw x24,0(x26) +80003d84: 004d0d13 addi x26,x26,4 + +80003d88 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b24: + sha512sig1h x24, x11, x24 # perform operation +80003d88: 5f858c33 sha512sig1h x24,x11,x24 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zknh_sha512sig1h_cg_cmp_rd_rs2_b24, Zknh_sha512sig1h_cg_cmp_rd_rs2_b24_str) +80003d8c: 0004a383 lw x7,0(x9) +80003d90: 01838863 beq x7,x24,80003da0 +80003d94: 7840146f jal x8,80005518 +80003d98: 80003d88 .word 0x80003d88 +80003d9c: 8000f90e .word 0x8000f90e +80003da0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xd5df9a3a +80003da4: 000d2303 lw x6,0(x26) +80003da8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x4b9133b0 +80003dac: 000d2c83 lw x25,0(x26) +80003db0: 004d0d13 addi x26,x26,4 + +80003db4 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b25: + sha512sig1h x25, x6, x25 # perform operation +80003db4: 5f930cb3 sha512sig1h x25,x6,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zknh_sha512sig1h_cg_cmp_rd_rs2_b25, Zknh_sha512sig1h_cg_cmp_rd_rs2_b25_str) +80003db8: 0004a383 lw x7,0(x9) +80003dbc: 01938863 beq x7,x25,80003dcc +80003dc0: 7580146f jal x8,80005518 +80003dc4: 80003db4 .word 0x80003db4 +80003dc8: 8000f94d .word 0x8000f94d +80003dcc: 00448493 addi x9,x9,4 + + mv x23, x26 # switch data pointer register to avoid conflict with test +80003dd0: 000d0b93 addi x23,x26,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xb9174594 +80003dd4: 000bae03 lw x28,0(x23) +80003dd8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x75c2499d +80003ddc: 000bad03 lw x26,0(x23) +80003de0: 004b8b93 addi x23,x23,4 + +80003de4 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b26: + sha512sig1h x26, x28, x26 # perform operation +80003de4: 5fae0d33 sha512sig1h x26,x28,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zknh_sha512sig1h_cg_cmp_rd_rs2_b26, Zknh_sha512sig1h_cg_cmp_rd_rs2_b26_str) +80003de8: 0004a383 lw x7,0(x9) +80003dec: 01a38863 beq x7,x26,80003dfc +80003df0: 7280146f jal x8,80005518 +80003df4: 80003de4 .word 0x80003de4 +80003df8: 8000f98c .word 0x8000f98c +80003dfc: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x868ee41b +80003e00: 000ba683 lw x13,0(x23) +80003e04: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0xac57544f +80003e08: 000bad83 lw x27,0(x23) +80003e0c: 004b8b93 addi x23,x23,4 + +80003e10 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b27: + sha512sig1h x27, x13, x27 # perform operation +80003e10: 5fb68db3 sha512sig1h x27,x13,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zknh_sha512sig1h_cg_cmp_rd_rs2_b27, Zknh_sha512sig1h_cg_cmp_rd_rs2_b27_str) +80003e14: 0004a383 lw x7,0(x9) +80003e18: 01b38863 beq x7,x27,80003e28 +80003e1c: 6fc0146f jal x8,80005518 +80003e20: 80003e10 .word 0x80003e10 +80003e24: 8000f9cb .word 0x8000f9cb +80003e28: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xbc44d5d7 +80003e2c: 000ba203 lw x4,0(x23) +80003e30: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x87432c4a +80003e34: 000bae03 lw x28,0(x23) +80003e38: 004b8b93 addi x23,x23,4 + +80003e3c : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b28: + sha512sig1h x28, x4, x28 # perform operation +80003e3c: 5fc20e33 sha512sig1h x28,x4,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zknh_sha512sig1h_cg_cmp_rd_rs2_b28, Zknh_sha512sig1h_cg_cmp_rd_rs2_b28_str) +80003e40: 0004a383 lw x7,0(x9) +80003e44: 01c38863 beq x7,x28,80003e54 +80003e48: 6d00146f jal x8,80005518 +80003e4c: 80003e3c .word 0x80003e3c +80003e50: 8000fa0a .word 0x8000fa0a +80003e54: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x802de876 +80003e58: 000ba703 lw x14,0(x23) +80003e5c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x47f8b55b +80003e60: 000bae83 lw x29,0(x23) +80003e64: 004b8b93 addi x23,x23,4 + +80003e68 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b29: + sha512sig1h x29, x14, x29 # perform operation +80003e68: 5fd70eb3 sha512sig1h x29,x14,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zknh_sha512sig1h_cg_cmp_rd_rs2_b29, Zknh_sha512sig1h_cg_cmp_rd_rs2_b29_str) +80003e6c: 0004a383 lw x7,0(x9) +80003e70: 01d38863 beq x7,x29,80003e80 +80003e74: 6a40146f jal x8,80005518 +80003e78: 80003e68 .word 0x80003e68 +80003e7c: 8000fa49 .word 0x8000fa49 +80003e80: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x305bc400 +80003e84: 000bad03 lw x26,0(x23) +80003e88: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0xfea28374 +80003e8c: 000baf03 lw x30,0(x23) +80003e90: 004b8b93 addi x23,x23,4 + +80003e94 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b30: + sha512sig1h x30, x26, x30 # perform operation +80003e94: 5fed0f33 sha512sig1h x30,x26,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zknh_sha512sig1h_cg_cmp_rd_rs2_b30, Zknh_sha512sig1h_cg_cmp_rd_rs2_b30_str) +80003e98: 0004a383 lw x7,0(x9) +80003e9c: 01e38863 beq x7,x30,80003eac +80003ea0: 6780146f jal x8,80005518 +80003ea4: 80003e94 .word 0x80003e94 +80003ea8: 8000fa88 .word 0x8000fa88 +80003eac: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xdc81d510 +80003eb0: 000baa83 lw x21,0(x23) +80003eb4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0xd5229eb2 +80003eb8: 000baf83 lw x31,0(x23) +80003ebc: 004b8b93 addi x23,x23,4 + +80003ec0 : +Zknh_sha512sig1h_cg_cmp_rd_rs2_b31: + sha512sig1h x31, x21, x31 # perform operation +80003ec0: 5ffa8fb3 sha512sig1h x31,x21,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zknh_sha512sig1h_cg_cmp_rd_rs2_b31, Zknh_sha512sig1h_cg_cmp_rd_rs2_b31_str) +80003ec4: 0004a383 lw x7,0(x9) +80003ec8: 01f38863 beq x7,x31,80003ed8 +80003ecc: 64c0146f jal x8,80005518 +80003ed0: 80003ec0 .word 0x80003ec0 +80003ed4: 8000fac7 .word 0x8000fac7 +80003ed8: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0xd215a426 +80003edc: 000ba003 lw x0,0(x23) +80003ee0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0xafe06f44 +80003ee4: 000ba003 lw x0,0(x23) +80003ee8: 004b8b93 addi x23,x23,4 + +80003eec : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b0: + sha512sig1h x0, x0, x0 # perform operation +80003eec: 5e000033 sha512sig1h x0,x0,x0 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b0_str) +80003ef0: 0004a383 lw x7,0(x9) +80003ef4: 00038863 beq x7,x0,80003f04 +80003ef8: 6200146f jal x8,80005518 +80003efc: 80003eec .word 0x80003eec +80003f00: 8000fb06 .word 0x8000fb06 +80003f04: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0xc96f53af +80003f08: 000ba083 lw x1,0(x23) +80003f0c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x05081606 +80003f10: 000ba083 lw x1,0(x23) +80003f14: 004b8b93 addi x23,x23,4 + +80003f18 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b1: + sha512sig1h x1, x1, x1 # perform operation +80003f18: 5e1080b3 sha512sig1h x1,x1,x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b1_str) +80003f1c: 0004a383 lw x7,0(x9) +80003f20: 00138863 beq x7,x1,80003f30 +80003f24: 5f40146f jal x8,80005518 +80003f28: 80003f18 .word 0x80003f18 +80003f2c: 8000fb48 .word 0x8000fb48 +80003f30: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x84352932 +80003f34: 000ba103 lw x2,0(x23) +80003f38: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x67670869 +80003f3c: 000ba103 lw x2,0(x23) +80003f40: 004b8b93 addi x23,x23,4 + +80003f44 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b2: + sha512sig1h x2, x2, x2 # perform operation +80003f44: 5e210133 sha512sig1h x2,x2,x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b2_str) +80003f48: 0004a383 lw x7,0(x9) +80003f4c: 00238863 beq x7,x2,80003f5c +80003f50: 5c80146f jal x8,80005518 +80003f54: 80003f44 .word 0x80003f44 +80003f58: 8000fb8a .word 0x8000fb8a +80003f5c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x6184aa7d +80003f60: 000ba183 lw x3,0(x23) +80003f64: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x9557fc05 +80003f68: 000ba183 lw x3,0(x23) +80003f6c: 004b8b93 addi x23,x23,4 + +80003f70 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b3: + sha512sig1h x3, x3, x3 # perform operation +80003f70: 5e3181b3 sha512sig1h x3,x3,x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b3_str) +80003f74: 0004a383 lw x7,0(x9) +80003f78: 00338863 beq x7,x3,80003f88 +80003f7c: 59c0146f jal x8,80005518 +80003f80: 80003f70 .word 0x80003f70 +80003f84: 8000fbcc .word 0x8000fbcc +80003f88: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xf206c6fa +80003f8c: 000ba203 lw x4,0(x23) +80003f90: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xdb1f0245 +80003f94: 000ba203 lw x4,0(x23) +80003f98: 004b8b93 addi x23,x23,4 + +80003f9c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b4: + sha512sig1h x4, x4, x4 # perform operation +80003f9c: 5e420233 sha512sig1h x4,x4,x4 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b4_str) +80003fa0: 0004a383 lw x7,0(x9) +80003fa4: 00438863 beq x7,x4,80003fb4 +80003fa8: 5700146f jal x8,80005518 +80003fac: 80003f9c .word 0x80003f9c +80003fb0: 8000fc0e .word 0x8000fc0e +80003fb4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x4aac4022 +80003fb8: 000ba283 lw x5,0(x23) +80003fbc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x8285adbd +80003fc0: 000ba283 lw x5,0(x23) +80003fc4: 004b8b93 addi x23,x23,4 + +80003fc8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b5: + sha512sig1h x5, x5, x5 # perform operation +80003fc8: 5e5282b3 sha512sig1h x5,x5,x5 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b5_str) +80003fcc: 0004a383 lw x7,0(x9) +80003fd0: 00538863 beq x7,x5,80003fe0 +80003fd4: 5440146f jal x8,80005518 +80003fd8: 80003fc8 .word 0x80003fc8 +80003fdc: 8000fc50 .word 0x8000fc50 +80003fe0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x259effb1 +80003fe4: 000ba303 lw x6,0(x23) +80003fe8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x2edea2c7 +80003fec: 000ba303 lw x6,0(x23) +80003ff0: 004b8b93 addi x23,x23,4 + +80003ff4 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b6: + sha512sig1h x6, x6, x6 # perform operation +80003ff4: 5e630333 sha512sig1h x6,x6,x6 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b6_str) +80003ff8: 0004a383 lw x7,0(x9) +80003ffc: 00638863 beq x7,x6,8000400c +80004000: 5180146f jal x8,80005518 +80004004: 80003ff4 .word 0x80003ff4 +80004008: 8000fc92 .word 0x8000fc92 +8000400c: 00448493 addi x9,x9,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004010: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80004014: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xbadbea5c +80004018: 000ba383 lw x7,0(x23) +8000401c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xe2405b39 +80004020: 000ba383 lw x7,0(x23) +80004024: 004b8b93 addi x23,x23,4 + +80004028 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b7: + sha512sig1h x7, x7, x7 # perform operation +80004028: 5e7383b3 sha512sig1h x7,x7,x7 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b7_str) +8000402c: 0004a203 lw x4,0(x9) +80004030: 00720863 beq x4,x7,80004040 +80004034: 4cc012ef jal x5,80005500 +80004038: 80004028 .word 0x80004028 +8000403c: 8000fcd4 .word 0x8000fcd4 +80004040: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xdba6920f +80004044: 000ba403 lw x8,0(x23) +80004048: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x6f1eade8 +8000404c: 000ba403 lw x8,0(x23) +80004050: 004b8b93 addi x23,x23,4 + +80004054 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b8: + sha512sig1h x8, x8, x8 # perform operation +80004054: 5e840433 sha512sig1h x8,x8,x8 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b8_str) +80004058: 0004a203 lw x4,0(x9) +8000405c: 00820863 beq x4,x8,8000406c +80004060: 4a0012ef jal x5,80005500 +80004064: 80004054 .word 0x80004054 +80004068: 8000fd16 .word 0x8000fd16 +8000406c: 00448493 addi x9,x9,4 + + mv x10, x9 # switch signature pointer register to avoid conflict with test +80004070: 00048513 addi x10,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xf30d5602 +80004074: 000ba483 lw x9,0(x23) +80004078: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x4b34985a +8000407c: 000ba483 lw x9,0(x23) +80004080: 004b8b93 addi x23,x23,4 + +80004084 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b9: + sha512sig1h x9, x9, x9 # perform operation +80004084: 5e9484b3 sha512sig1h x9,x9,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b9_str) +80004088: 00052203 lw x4,0(x10) +8000408c: 00920863 beq x4,x9,8000409c +80004090: 470012ef jal x5,80005500 +80004094: 80004084 .word 0x80004084 +80004098: 8000fd58 .word 0x8000fd58 +8000409c: 00450513 addi x10,x10,4 + + mv x21, x10 # switch signature pointer register to avoid conflict with test +800040a0: 00050a93 addi x21,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x385fecff +800040a4: 000ba503 lw x10,0(x23) +800040a8: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x856235ad +800040ac: 000ba503 lw x10,0(x23) +800040b0: 004b8b93 addi x23,x23,4 + +800040b4 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b10: + sha512sig1h x10, x10, x10 # perform operation +800040b4: 5ea50533 sha512sig1h x10,x10,x10 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b10_str) +800040b8: 000aa203 lw x4,0(x21) +800040bc: 00a20863 beq x4,x10,800040cc +800040c0: 440012ef jal x5,80005500 +800040c4: 800040b4 .word 0x800040b4 +800040c8: 8000fd9a .word 0x8000fd9a +800040cc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xcffc1686 +800040d0: 000ba583 lw x11,0(x23) +800040d4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xf19b86a3 +800040d8: 000ba583 lw x11,0(x23) +800040dc: 004b8b93 addi x23,x23,4 + +800040e0 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b11: + sha512sig1h x11, x11, x11 # perform operation +800040e0: 5eb585b3 sha512sig1h x11,x11,x11 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b11_str) +800040e4: 000aa203 lw x4,0(x21) +800040e8: 00b20863 beq x4,x11,800040f8 +800040ec: 414012ef jal x5,80005500 +800040f0: 800040e0 .word 0x800040e0 +800040f4: 8000fddd .word 0x8000fddd +800040f8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xd1aa1e52 +800040fc: 000ba603 lw x12,0(x23) +80004100: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x710e954a +80004104: 000ba603 lw x12,0(x23) +80004108: 004b8b93 addi x23,x23,4 + +8000410c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b12: + sha512sig1h x12, x12, x12 # perform operation +8000410c: 5ec60633 sha512sig1h x12,x12,x12 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b12_str) +80004110: 000aa203 lw x4,0(x21) +80004114: 00c20863 beq x4,x12,80004124 +80004118: 3e8012ef jal x5,80005500 +8000411c: 8000410c .word 0x8000410c +80004120: 8000fe20 .word 0x8000fe20 +80004124: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x3aec48a5 +80004128: 000ba683 lw x13,0(x23) +8000412c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x9f78bc3c +80004130: 000ba683 lw x13,0(x23) +80004134: 004b8b93 addi x23,x23,4 + +80004138 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b13: + sha512sig1h x13, x13, x13 # perform operation +80004138: 5ed686b3 sha512sig1h x13,x13,x13 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b13_str) +8000413c: 000aa203 lw x4,0(x21) +80004140: 00d20863 beq x4,x13,80004150 +80004144: 3bc012ef jal x5,80005500 +80004148: 80004138 .word 0x80004138 +8000414c: 8000fe63 .word 0x8000fe63 +80004150: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x1aadfe31 +80004154: 000ba703 lw x14,0(x23) +80004158: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x2051b5b2 +8000415c: 000ba703 lw x14,0(x23) +80004160: 004b8b93 addi x23,x23,4 + +80004164 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b14: + sha512sig1h x14, x14, x14 # perform operation +80004164: 5ee70733 sha512sig1h x14,x14,x14 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b14_str) +80004168: 000aa203 lw x4,0(x21) +8000416c: 00e20863 beq x4,x14,8000417c +80004170: 390012ef jal x5,80005500 +80004174: 80004164 .word 0x80004164 +80004178: 8000fea6 .word 0x8000fea6 +8000417c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xe3745e6e +80004180: 000ba783 lw x15,0(x23) +80004184: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x0d3e63fd +80004188: 000ba783 lw x15,0(x23) +8000418c: 004b8b93 addi x23,x23,4 + +80004190 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b15: + sha512sig1h x15, x15, x15 # perform operation +80004190: 5ef787b3 sha512sig1h x15,x15,x15 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b15_str) +80004194: 000aa203 lw x4,0(x21) +80004198: 00f20863 beq x4,x15,800041a8 +8000419c: 364012ef jal x5,80005500 +800041a0: 80004190 .word 0x80004190 +800041a4: 8000fee9 .word 0x8000fee9 +800041a8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x8366ae21 +800041ac: 000ba803 lw x16,0(x23) +800041b0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x206d1363 +800041b4: 000ba803 lw x16,0(x23) +800041b8: 004b8b93 addi x23,x23,4 + +800041bc : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b16: + sha512sig1h x16, x16, x16 # perform operation +800041bc: 5f080833 sha512sig1h x16,x16,x16 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b16_str) +800041c0: 000aa203 lw x4,0(x21) +800041c4: 01020863 beq x4,x16,800041d4 +800041c8: 338012ef jal x5,80005500 +800041cc: 800041bc .word 0x800041bc +800041d0: 8000ff2c .word 0x8000ff2c +800041d4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xb7f4bc4d +800041d8: 000ba883 lw x17,0(x23) +800041dc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x8aebcb1d +800041e0: 000ba883 lw x17,0(x23) +800041e4: 004b8b93 addi x23,x23,4 + +800041e8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b17: + sha512sig1h x17, x17, x17 # perform operation +800041e8: 5f1888b3 sha512sig1h x17,x17,x17 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b17_str) +800041ec: 000aa203 lw x4,0(x21) +800041f0: 01120863 beq x4,x17,80004200 +800041f4: 30c012ef jal x5,80005500 +800041f8: 800041e8 .word 0x800041e8 +800041fc: 8000ff6f .word 0x8000ff6f +80004200: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xc15c0f2c +80004204: 000ba903 lw x18,0(x23) +80004208: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x26703393 +8000420c: 000ba903 lw x18,0(x23) +80004210: 004b8b93 addi x23,x23,4 + +80004214 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b18: + sha512sig1h x18, x18, x18 # perform operation +80004214: 5f290933 sha512sig1h x18,x18,x18 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b18_str) +80004218: 000aa203 lw x4,0(x21) +8000421c: 01220863 beq x4,x18,8000422c +80004220: 2e0012ef jal x5,80005500 +80004224: 80004214 .word 0x80004214 +80004228: 8000ffb2 .word 0x8000ffb2 +8000422c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xa5450ae9 +80004230: 000ba983 lw x19,0(x23) +80004234: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xe3e8e3b9 +80004238: 000ba983 lw x19,0(x23) +8000423c: 004b8b93 addi x23,x23,4 + +80004240 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b19: + sha512sig1h x19, x19, x19 # perform operation +80004240: 5f3989b3 sha512sig1h x19,x19,x19 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b19_str) +80004244: 000aa203 lw x4,0(x21) +80004248: 01320863 beq x4,x19,80004258 +8000424c: 2b4012ef jal x5,80005500 +80004250: 80004240 .word 0x80004240 +80004254: 8000fff5 .word 0x8000fff5 +80004258: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x9a1950c6 +8000425c: 000baa03 lw x20,0(x23) +80004260: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x086c8488 +80004264: 000baa03 lw x20,0(x23) +80004268: 004b8b93 addi x23,x23,4 + +8000426c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b20: + sha512sig1h x20, x20, x20 # perform operation +8000426c: 5f4a0a33 sha512sig1h x20,x20,x20 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b20_str) +80004270: 000aa203 lw x4,0(x21) +80004274: 01420863 beq x4,x20,80004284 +80004278: 288012ef jal x5,80005500 +8000427c: 8000426c .word 0x8000426c +80004280: 80010038 .word 0x80010038 +80004284: 004a8a93 addi x21,x21,4 + + mv x27, x21 # switch signature pointer register to avoid conflict with test +80004288: 000a8d93 addi x27,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xa4c3f22e +8000428c: 000baa83 lw x21,0(x23) +80004290: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x20291cc7 +80004294: 000baa83 lw x21,0(x23) +80004298: 004b8b93 addi x23,x23,4 + +8000429c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b21: + sha512sig1h x21, x21, x21 # perform operation +8000429c: 5f5a8ab3 sha512sig1h x21,x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b21_str) +800042a0: 000da203 lw x4,0(x27) +800042a4: 01520863 beq x4,x21,800042b4 +800042a8: 258012ef jal x5,80005500 +800042ac: 8000429c .word 0x8000429c +800042b0: 8001007b .word 0x8001007b +800042b4: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xe56873a9 +800042b8: 000bab03 lw x22,0(x23) +800042bc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x8a177ef8 +800042c0: 000bab03 lw x22,0(x23) +800042c4: 004b8b93 addi x23,x23,4 + +800042c8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b22: + sha512sig1h x22, x22, x22 # perform operation +800042c8: 5f6b0b33 sha512sig1h x22,x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b22_str) +800042cc: 000da203 lw x4,0(x27) +800042d0: 01620863 beq x4,x22,800042e0 +800042d4: 22c012ef jal x5,80005500 +800042d8: 800042c8 .word 0x800042c8 +800042dc: 800100be .word 0x800100be +800042e0: 004d8d93 addi x27,x27,4 + + mv x17, x23 # switch data pointer register to avoid conflict with test +800042e4: 000b8893 addi x17,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0cc9804d +800042e8: 0008ab83 lw x23,0(x17) +800042ec: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xce8319e9 +800042f0: 0008ab83 lw x23,0(x17) +800042f4: 00488893 addi x17,x17,4 + +800042f8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b23: + sha512sig1h x23, x23, x23 # perform operation +800042f8: 5f7b8bb3 sha512sig1h x23,x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b23_str) +800042fc: 000da203 lw x4,0(x27) +80004300: 01720863 beq x4,x23,80004310 +80004304: 1fc012ef jal x5,80005500 +80004308: 800042f8 .word 0x800042f8 +8000430c: 80010101 .word 0x80010101 +80004310: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x72f234d2 +80004314: 0008ac03 lw x24,0(x17) +80004318: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x03d1ab46 +8000431c: 0008ac03 lw x24,0(x17) +80004320: 00488893 addi x17,x17,4 + +80004324 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b24: + sha512sig1h x24, x24, x24 # perform operation +80004324: 5f8c0c33 sha512sig1h x24,x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b24_str) +80004328: 000da203 lw x4,0(x27) +8000432c: 01820863 beq x4,x24,8000433c +80004330: 1d0012ef jal x5,80005500 +80004334: 80004324 .word 0x80004324 +80004338: 80010144 .word 0x80010144 +8000433c: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x6fd88180 +80004340: 0008ac83 lw x25,0(x17) +80004344: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xe88e7b4d +80004348: 0008ac83 lw x25,0(x17) +8000434c: 00488893 addi x17,x17,4 + +80004350 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b25: + sha512sig1h x25, x25, x25 # perform operation +80004350: 5f9c8cb3 sha512sig1h x25,x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b25_str) +80004354: 000da203 lw x4,0(x27) +80004358: 01920863 beq x4,x25,80004368 +8000435c: 1a4012ef jal x5,80005500 +80004360: 80004350 .word 0x80004350 +80004364: 80010187 .word 0x80010187 +80004368: 004d8d93 addi x27,x27,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xf7c55583 +8000436c: 0008ad03 lw x26,0(x17) +80004370: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x7afcbaba +80004374: 0008ad03 lw x26,0(x17) +80004378: 00488893 addi x17,x17,4 + +8000437c : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b26: + sha512sig1h x26, x26, x26 # perform operation +8000437c: 5fad0d33 sha512sig1h x26,x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b26_str) +80004380: 000da203 lw x4,0(x27) +80004384: 01a20863 beq x4,x26,80004394 +80004388: 178012ef jal x5,80005500 +8000438c: 8000437c .word 0x8000437c +80004390: 800101ca .word 0x800101ca +80004394: 004d8d93 addi x27,x27,4 + + mv x31, x27 # switch signature pointer register to avoid conflict with test +80004398: 000d8f93 addi x31,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xbbb61664 +8000439c: 0008ad83 lw x27,0(x17) +800043a0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x94b51939 +800043a4: 0008ad83 lw x27,0(x17) +800043a8: 00488893 addi x17,x17,4 + +800043ac : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b27: + sha512sig1h x27, x27, x27 # perform operation +800043ac: 5fbd8db3 sha512sig1h x27,x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b27_str) +800043b0: 000fa203 lw x4,0(x31) +800043b4: 01b20863 beq x4,x27,800043c4 +800043b8: 148012ef jal x5,80005500 +800043bc: 800043ac .word 0x800043ac +800043c0: 8001020d .word 0x8001020d +800043c4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x1069cc20 +800043c8: 0008ae03 lw x28,0(x17) +800043cc: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7e03fccc +800043d0: 0008ae03 lw x28,0(x17) +800043d4: 00488893 addi x17,x17,4 + +800043d8 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b28: + sha512sig1h x28, x28, x28 # perform operation +800043d8: 5fce0e33 sha512sig1h x28,x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b28_str) +800043dc: 000fa203 lw x4,0(x31) +800043e0: 01c20863 beq x4,x28,800043f0 +800043e4: 11c012ef jal x5,80005500 +800043e8: 800043d8 .word 0x800043d8 +800043ec: 80010250 .word 0x80010250 +800043f0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xb6138cc0 +800043f4: 0008ae83 lw x29,0(x17) +800043f8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xc682137c +800043fc: 0008ae83 lw x29,0(x17) +80004400: 00488893 addi x17,x17,4 + +80004404 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b29: + sha512sig1h x29, x29, x29 # perform operation +80004404: 5fde8eb3 sha512sig1h x29,x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b29_str) +80004408: 000fa203 lw x4,0(x31) +8000440c: 01d20863 beq x4,x29,8000441c +80004410: 0f0012ef jal x5,80005500 +80004414: 80004404 .word 0x80004404 +80004418: 80010293 .word 0x80010293 +8000441c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x2edc049e +80004420: 0008af03 lw x30,0(x17) +80004424: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x12c7eaef +80004428: 0008af03 lw x30,0(x17) +8000442c: 00488893 addi x17,x17,4 + +80004430 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b30: + sha512sig1h x30, x30, x30 # perform operation +80004430: 5fef0f33 sha512sig1h x30,x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b30_str) +80004434: 000fa203 lw x4,0(x31) +80004438: 01e20863 beq x4,x30,80004448 +8000443c: 0c4012ef jal x5,80005500 +80004440: 80004430 .word 0x80004430 +80004444: 800102d6 .word 0x800102d6 +80004448: 004f8f93 addi x31,x31,4 + + mv x15, x31 # switch signature pointer register to avoid conflict with test +8000444c: 000f8793 addi x15,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xcb756da6 +80004450: 0008af83 lw x31,0(x17) +80004454: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x31cde95f +80004458: 0008af83 lw x31,0(x17) +8000445c: 00488893 addi x17,x17,4 + +80004460 : +Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b31: + sha512sig1h x31, x31, x31 # perform operation +80004460: 5fff8fb3 sha512sig1h x31,x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sig1h_cg_cmp_rd_rs1_rs2_b31_str) +80004464: 0007a203 lw x4,0(x15) +80004468: 01f20863 beq x4,x31,80004478 +8000446c: 094012ef jal x5,80005500 +80004470: 80004460 .word 0x80004460 +80004474: 80010319 .word 0x80010319 +80004478: 00478793 addi x15,x15,4 + + mv x2, x15 # restore signature pointer to default register for teardown +8000447c: 00078113 addi x2,x15,0 + +80004480 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004480: 00000513 addi x10,x0,0 +80004484: 00000073 ecall +80004488: fff00513 addi x10,x0,-1 +8000448c: 1d800413 addi x8,x0,472 + +80004490 : +80004490: 34002373 csrrs x6,mscratch,x0 + +80004494 : +80004494: 23832383 lw x7,568(x6) +80004498: 23c32483 lw x9,572(x6) + +8000449c : +8000449c: 22032383 lw x7,544(x6) + +800044a0 : +800044a0: 25032483 lw x9,592(x6) +800044a4: 34049073 csrrw x0,mscratch,x9 + +800044a8 : +800044a8: 24832483 lw x9,584(x6) +800044ac: 305493f3 csrrw x7,mtvec,x9 +800044b0: ffc4f493 andi x9,x9,-4 +800044b4: ffc3f393 andi x7,x7,-4 +800044b8: 00749e63 bne x9,x7,800044d4 + +800044bc : +800044bc: 00030493 addi x9,x6,0 + +800044c0 : +800044c0: 0004a783 lw x15,0(x9) +800044c4: 00f3a023 sw x15,0(x7) +800044c8: 00438393 addi x7,x7,4 +800044cc: 00448493 addi x9,x9,4 +800044d0: fe83c8e3 blt x7,x8,800044c0 +800044d4: 0000100f fence.i + +800044d8 : +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 4c550513 addi x10,x10,1221 # 800109e5 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001e097 auipc x1,0x1e +80004544: 024080e7 jalr x1,36(x1) # 80022564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 4c550513 addi x10,x10,1221 # 80010a25 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001e097 auipc x1,0x1e +80004584: fe4080e7 jalr x1,-28(x1) # 80022564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 4e550513 addi x10,x10,1253 # 80010a85 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001e097 auipc x1,0x1e +800045c4: fa4080e7 jalr x1,-92(x1) # 80022564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 05050513 addi x10,x10,80 # 80011630 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001e097 auipc x1,0x1e +80004604: f64080e7 jalr x1,-156(x1) # 80022564 +80004608: 0001e097 auipc x1,0x1e +8000460c: fbc080e7 jalr x1,-68(x1) # 800225c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 0a838393 addi x7,x7,168 # 80012708 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 06040413 addi x8,x8,96 # 80012700 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 80010bd9 .word 0x80010bd9 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 80010a47 .word 0x80010a47 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 2a450513 addi x10,x10,676 # 800109a4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001e097 auipc x1,0x1e +80004724: e44080e7 jalr x1,-444(x1) # 80022564 +80004728: 0001e097 auipc x1,0x1e +8000472c: e7c080e7 jalr x1,-388(x1) # 800225a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 2a550513 addi x10,x10,677 # 800109e5 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001e097 auipc x1,0x1e +80004764: e04080e7 jalr x1,-508(x1) # 80022564 +80004768: 0001e097 auipc x1,0x1e +8000476c: e5c080e7 jalr x1,-420(x1) # 800225c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce1ff06f jal x0,80004480 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047ac: cd5ff06f jal x0,80004480 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7830313 addi x6,x6,-1160 # 800044d8 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 52750513 addi x10,x10,1319 # 80012067 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001e097 auipc x1,0x1e +80004b64: a04080e7 jalr x1,-1532(x1) # 80022564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000c517 auipc x10,0xc +80004b84: 94850513 addi x10,x10,-1720 # 800104c8 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: f2e50513 addi x10,x10,-210 # 80010aee +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: de550513 addi x10,x10,-539 # 800109e5 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 0001e097 auipc x1,0x1e +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800225c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 4c848493 addi x9,x9,1224 # 800104a8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 14c40413 addi x8,x8,332 # 8002116c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010bf0 .word 0x80010bf0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010cf2 .word 0x80010cf2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010ded .word 0x80010ded +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010ee0 .word 0x80010ee0 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80011053 .word 0x80011053 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80022000 .word 0x80022000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80022014 .word 0x80022014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022030 .word 0x80022030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000b217 auipc x4,0xb +80005504: e6020213 addi x4,x4,-416 # 80010360 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000b397 auipc x7,0xb +8000551c: e4838393 addi x7,x7,-440 # 80010360 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000b697 auipc x13,0xb +80005544: e2068693 addi x13,x13,-480 # 80010360 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000b497 auipc x9,0xb +8000556c: df848493 addi x9,x9,-520 # 80010360 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000b497 auipc x9,0xb +80005610: d544a483 lw x9,-684(x9) # 80010360 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000d417 auipc x8,0xd +800056c4: 9f040413 addi x8,x8,-1552 # 800120b0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001c417 auipc x8,0x1c +80005704: a7040413 addi x8,x8,-1424 # 80021170 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000b497 auipc x9,0xb +80005744: d4848493 addi x9,x9,-696 # 80010488 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000b817 auipc x16,0xb +800057b4: ce880813 addi x16,x16,-792 # 80010498 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000b817 auipc x16,0xb +800057c8: cd480813 addi x16,x16,-812 # 80010498 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 40938393 addi x7,x7,1033 # 80010bd9 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000b817 auipc x16,0xb +800057e4: cb080813 addi x16,x16,-848 # 80010490 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 40438393 addi x7,x7,1028 # 80010bf0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 4ee38393 addi x7,x7,1262 # 80010cf2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 5d138393 addi x7,x7,1489 # 80010ded +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: 6ac38393 addi x7,x7,1708 # 80010ee0 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000c397 auipc x7,0xc +80005850: 80738393 addi x7,x7,-2041 # 80011053 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: 77338393 addi x7,x7,1907 # 80010fd7 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: 79938393 addi x7,x7,1945 # 80011015 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 39c38393 addi x7,x7,924 # 80010c30 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 48438393 addi x7,x7,1156 # 80010d30 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 56538393 addi x7,x7,1381 # 80010e29 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 64138393 addi x7,x7,1601 # 80010f1d +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: 79a38393 addi x7,x7,1946 # 8001108e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 36438393 addi x7,x7,868 # 80010c70 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 44a38393 addi x7,x7,1098 # 80010d6e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 52938393 addi x7,x7,1321 # 80010e65 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 60638393 addi x7,x7,1542 # 80010f5a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: 75d38393 addi x7,x7,1885 # 800110c9 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 32d38393 addi x7,x7,813 # 80010cb1 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 41138393 addi x7,x7,1041 # 80010dad +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 4ee38393 addi x7,x7,1262 # 80010ea2 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 5cc38393 addi x7,x7,1484 # 80010f98 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: 72138393 addi x7,x7,1825 # 80011105 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: 74638393 addi x7,x7,1862 # 80011142 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: 77d38393 addi x7,x7,1917 # 80011191 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000c397 auipc x7,0xc +80005a30: 86038393 addi x7,x7,-1952 # 8001128c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000c397 auipc x7,0xc +80005a48: 94438393 addi x7,x7,-1724 # 80011388 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000b817 auipc x16,0xb +80005a68: a2c80813 addi x16,x16,-1492 # 80010490 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000b817 auipc x16,0xb +80005a78: a1c80813 addi x16,x16,-1508 # 80010490 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000b817 auipc x16,0xb +80005a84: a1480813 addi x16,x16,-1516 # 80010494 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000b817 auipc x16,0xb +80005a94: a0080813 addi x16,x16,-1536 # 80010490 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: f0550513 addi x10,x10,-251 # 800109e5 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001d097 auipc x1,0x1d +80005b04: a64080e7 jalr x1,-1436(x1) # 80022564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: f0550513 addi x10,x10,-251 # 80010a25 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: f7c50513 addi x10,x10,-132 # 80010adc +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 0000b517 auipc x10,0xb +80005b8c: 8f852503 lw x10,-1800(x10) # 80010480 +80005b90: 0001d097 auipc x1,0x1d +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80022564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f4e50513 addi x10,x10,-178 # 80010aee +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 79852503 lw x10,1944(x10) # 80010360 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f1050513 addi x10,x10,-240 # 80010af0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000b517 auipc x10,0xb +80005c0c: 85852503 lw x10,-1960(x10) # 80010460 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000b517 auipc x10,0xb +80005c44: 88850513 addi x10,x10,-1912 # 800104c8 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001d097 auipc x1,0x1d +80005c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: e8450513 addi x10,x10,-380 # 80010b04 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 7c052503 lw x10,1984(x10) # 80010468 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: 80850513 addi x10,x10,-2040 # 800104c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000c517 auipc x10,0xc +80005d04: 83b50513 addi x10,x10,-1989 # 8001153b +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 63852503 lw x10,1592(x10) # 80010360 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: 78860613 addi x12,x12,1928 # 800104c8 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 6fc52503 lw x10,1788(x10) # 80010464 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000c517 auipc x10,0xc +80005da4: 8b150513 addi x10,x10,-1871 # 80011651 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001c097 auipc x1,0x1c +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80022564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: 6e860613 addi x12,x12,1768 # 800104c8 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: 65c52503 lw x10,1628(x10) # 80010464 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: 6d450513 addi x10,x10,1748 # 80011534 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001c097 auipc x1,0x1c +80005e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 62850513 addi x10,x10,1576 # 800104c8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 66c50513 addi x10,x10,1644 # 8001154c +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 45852503 lw x10,1112(x10) # 80010360 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 55852503 lw x10,1368(x10) # 80010470 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 54452503 lw x10,1348(x10) # 80010470 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 58850513 addi x10,x10,1416 # 800104c8 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001c097 auipc x1,0x1c +80005f64: 604080e7 jalr x1,1540(x1) # 80022564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 52052503 lw x10,1312(x10) # 80010488 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 5e350513 addi x10,x10,1507 # 80011563 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 3b852503 lw x10,952(x10) # 80010360 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 4c052503 lw x10,1216(x10) # 80010478 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 4ac52503 lw x10,1196(x10) # 80010478 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001c097 auipc x1,0x1c +80006004: 564080e7 jalr x1,1380(x1) # 80022564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 55a50513 addi x10,x10,1370 # 8001157a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 0000a517 auipc x10,0xa +8000604c: 43052503 lw x10,1072(x10) # 80010478 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 46850513 addi x10,x10,1128 # 800104c8 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 53850513 addi x10,x10,1336 # 800115d8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 3b052503 lw x10,944(x10) # 80010478 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 3e850513 addi x10,x10,1000 # 800104c8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 38442403 lw x8,900(x8) # 80010490 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 55d50513 addi x10,x10,1373 # 8001167d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 54950513 addi x10,x10,1353 # 800116a9 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 0000a817 auipc x16,0xa +8000618c: 31080813 addi x16,x16,784 # 80010498 +80006190: 00082503 lw x10,0(x16) +80006194: 0001c097 auipc x1,0x1c +80006198: 3d0080e7 jalr x1,976(x1) # 80022564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 94e50513 addi x10,x10,-1714 # 80010aee +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 4d950513 addi x10,x10,1241 # 800116b9 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 0000a517 auipc x10,0xa +8000620c: 27052503 lw x10,624(x10) # 80010478 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 2a850513 addi x10,x10,680 # 800104c8 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 48450513 addi x10,x10,1156 # 800116e4 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 0000a517 auipc x10,0xa +8000628c: 1e852503 lw x10,488(x10) # 80010470 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 22850513 addi x10,x10,552 # 800104c8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 1a832303 lw x6,424(x6) # 80010470 +800062d0: 0000a397 auipc x7,0xa +800062d4: 1a83a383 lw x7,424(x7) # 80010478 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 43350513 addi x10,x10,1075 # 80011713 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 45b50513 addi x10,x10,1115 # 8001177b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 0000a317 auipc x6,0xa +8000634c: 12832303 lw x6,296(x6) # 80010470 +80006350: 0000a397 auipc x7,0xa +80006354: 1283a383 lw x7,296(x7) # 80010478 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 14850513 addi x10,x10,328 # 800104c8 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001c097 auipc x1,0x1c +800063a4: 1c4080e7 jalr x1,452(x1) # 80022564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 3e250513 addi x10,x10,994 # 800117a2 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 33f50513 addi x10,x10,831 # 8001173f +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 33b50513 addi x10,x10,827 # 8001177b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 0000a317 auipc x6,0xa +8000646c: 01032303 lw x6,16(x6) # 80010478 +80006470: 0000a397 auipc x7,0xa +80006474: 0003a383 lw x7,0(x7) # 80010470 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 02850513 addi x10,x10,40 # 800104c8 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001c097 auipc x1,0x1c +800064c4: 0a4080e7 jalr x1,164(x1) # 80022564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 3aa50513 addi x10,x10,938 # 8001188a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 45150513 addi x10,x10,1105 # 80011971 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0000a517 auipc x10,0xa +8000654c: f4c52503 lw x10,-180(x10) # 80010494 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 42d50513 addi x10,x10,1069 # 800119ad +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3cb50513 addi x10,x10,971 # 8001198b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 39350513 addi x10,x10,915 # 80011993 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35b50513 addi x10,x10,859 # 8001199b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 32450513 addi x10,x10,804 # 800119a4 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001c097 auipc x1,0x1c +800066a4: ec4080e7 jalr x1,-316(x1) # 80022564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2f650513 addi x10,x10,758 # 800119b6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 0000a517 auipc x10,0xa +800066ec: da852503 lw x10,-600(x10) # 80010490 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 3cd50513 addi x10,x10,973 # 80011b0d +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 25050513 addi x10,x10,592 # 800119d0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 24150513 addi x10,x10,577 # 80011a01 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 22150513 addi x10,x10,545 # 80011a21 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1ff50513 addi x10,x10,511 # 80011a3f +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1de50513 addi x10,x10,478 # 80011a5e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 1c650513 addi x10,x10,454 # 80011a86 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 1b250513 addi x10,x10,434 # 80011ab2 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 19e50513 addi x10,x10,414 # 80011ade +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001c097 auipc x1,0x1c +80006964: c04080e7 jalr x1,-1020(x1) # 80022564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 19c50513 addi x10,x10,412 # 80011b1c +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 0000a517 auipc x10,0xa +800069ac: ad052503 lw x10,-1328(x10) # 80010478 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: b0850513 addi x10,x10,-1272 # 800104c8 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 13350513 addi x10,x10,307 # 80011b33 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 0000a517 auipc x10,0xa +80006a2c: a4852503 lw x10,-1464(x10) # 80010470 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: a8850513 addi x10,x10,-1400 # 800104c8 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a2852503 lw x10,-1496(x10) # 80010490 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 0ca50513 addi x10,x10,202 # 80011b4a +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9d052503 lw x10,-1584(x10) # 80010478 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001c097 auipc x1,0x1c +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80022564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 0a150513 addi x10,x10,161 # 80011b61 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 98852503 lw x10,-1656(x10) # 80010470 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 0000a517 auipc x10,0xa +80006b08: 98c52503 lw x10,-1652(x10) # 80010490 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 0b750513 addi x10,x10,183 # 80011bd7 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001c097 auipc x1,0x1c +80006b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 14d50513 addi x10,x10,333 # 80011cad +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 20050513 addi x10,x10,512 # 80011da0 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 2bb50513 addi x10,x10,699 # 80011e9b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 36250513 addi x10,x10,866 # 80011f82 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: f2f50513 addi x10,x10,-209 # 80011b8f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 0000a617 auipc x12,0xa +80006c8c: 82062603 lw x12,-2016(x12) # 800104a8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: ed850513 addi x10,x10,-296 # 80010b78 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 7c850513 addi x10,x10,1992 # 800104c8 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001c097 auipc x1,0x1c +80006d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 7b058593 addi x11,x11,1968 # 800104f0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 7e458593 addi x11,x11,2020 # 80010550 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 0000a517 auipc x10,0xa +80006da4: bee50513 addi x10,x10,-1042 # 8001098e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000b517 auipc x10,0xb +80006de4: 85050513 addi x10,x10,-1968 # 80011630 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001b097 auipc x1,0x1b +80006e04: 764080e7 jalr x1,1892(x1) # 80022564 + +80006e08 : +80006e08: 0001b097 auipc x1,0x1b +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800225c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: 69060613 addi x12,x12,1680 # 800104a0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d7950513 addi x10,x10,-647 # 80010b99 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: 66052503 lw x10,1632(x10) # 800104a8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 66850513 addi x10,x10,1640 # 800104c8 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 0000a517 auipc x10,0xa +80006ea4: d0950513 addi x10,x10,-759 # 80010ba9 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 5e852503 lw x10,1512(x10) # 800104b0 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 0000a517 auipc x10,0xa +80006f24: c9950513 addi x10,x10,-871 # 80010bb9 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 57052503 lw x10,1392(x10) # 800104b8 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 56850513 addi x10,x10,1384 # 800104c8 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 0000a517 auipc x10,0xa +80006fa4: c2950513 addi x10,x10,-983 # 80010bc9 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 4f852503 lw x10,1272(x10) # 800104c0 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009617 auipc x12,0x9 +8000700c: 49860613 addi x12,x12,1176 # 800104a0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 4a860613 addi x12,x12,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 1f838393 addi x7,x7,504 # 80005200 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 1dc38393 addi x7,x7,476 # 80005200 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 1c438393 addi x7,x7,452 # 80005200 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1b038393 addi x7,x7,432 # 80005200 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1a438393 addi x7,x7,420 # 80005200 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 17038393 addi x7,x7,368 # 80005200 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 3e430313 addi x6,x6,996 # 80004480 +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 15838393 addi x7,x7,344 # 80005200 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3cc30313 addi x6,x6,972 # 80004480 +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 14038393 addi x7,x7,320 # 80005200 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3b430313 addi x6,x6,948 # 80004480 +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 12838393 addi x7,x7,296 # 80005200 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 25078793 addi x15,x15,592 # 80004490 +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 02018193 addi x3,x3,32 # 80005500 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sig1l-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sig1l-00.elf.objdump new file mode 100644 index 0000000..32f7a73 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sig1l-00.elf.objdump @@ -0,0 +1,13197 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig1l-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sig1l-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002676 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025cf1 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d72 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025d95 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025da8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025dd0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e5f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccU3JJcg.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +800090d0 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b6_str +80000194 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b7_str +800001c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b8_str +800001ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b9_str +80000218 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b10_str +80000244 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b11_str +80000270 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b13 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800092cf l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b20_str +80000408 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b21_str +80000434 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b23_str +80000494 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b24_str +800004c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b25_str +800004ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b26_str +80000518 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b27_str +80000544 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b28_str +80000570 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b29_str +800005a0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b30_str +800005cc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_b31_str +800005f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b0_str +80000624 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b1_str +80000650 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b4 +80009801 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b5_str +80000708 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b6_str +8000073c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b7 +800098ac l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b7_str +80000768 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b8_str +80000794 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b9_str +800007c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b11_str +80000818 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b12_str +80000844 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b13_str +80000870 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b14_str +8000089c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b15_str +800008c8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b16_str +800008f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b17_str +80000924 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b18_str +80000950 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b19_str +8000097c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b20_str +800009a8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b21_str +800009d8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b22_str +80000a04 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b23_str +80000a34 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b24_str +80000a60 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b25_str +80000a8c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b26_str +80000ab8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b27_str +80000ae4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b28_str +80000b10 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b29_str +80000b3c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b30_str +80000b68 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_b31_str +80000b94 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b0_str +80000bc0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b1_str +80000bec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b2_str +80000c18 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b3_str +80000c4c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b4 +80009f33 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b4_str +80000c78 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b5_str +80000ca4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b6_str +80000cd8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b7_str +80000d04 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b8_str +80000d30 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b9_str +80000d5c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b10_str +80000d88 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b11_str +80000db4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b14_str +80000e40 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b15_str +80000e6c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b16_str +80000e98 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b17_str +80000ec4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b18_str +80000ef0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b20_str +80000f4c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b21_str +80000f7c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b22_str +80000fa8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b24_str +80001000 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b25_str +8000102c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b26_str +80001058 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b27_str +80001084 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b28_str +800010b0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b29_str +800010dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b30_str +8000110c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sig1l_cg_cp_rd_b31_str +80001138 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x0_str +80001164 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x1_str +80001190 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x2_str +800011bc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000000_str +800011e8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000001_str +80001214 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x7fffffff_str +80001240 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x7ffffffe_str +8000126c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xffffffff_str +80001298 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xfffffffe_str +800012c4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x5bbc8872_str +800012f0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0xaaaaaaaa_str +8000131c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs1_edges_0x55555555_str +80001348 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x0_str +80001374 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x1_str +800013a0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x2_str +800013cc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000000_str +800013f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000001_str +80001424 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x7fffffff_str +80001450 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x7ffffffe_str +8000147c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xffffffff_str +800014a8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xfffffffe_str +800014d4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x5bbc8872_str +80001500 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0xaaaaaaaa_str +8000152c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sig1l_cg_cp_rs2_edges_0x55555555_str +80001558 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001584 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001608 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001634 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001660 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000168c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001710 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000173c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001768 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001794 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001818 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001844 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001870 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +8000189c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001920 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000194c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001978 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019fc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a28 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a54 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a80 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b04 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b30 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b5c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b88 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c0c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c38 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c64 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c90 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cbc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d14 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d40 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d6c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d98 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e1c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e48 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e74 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ecc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f24 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f50 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f7c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002000 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000202c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002058 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002084 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002108 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002134 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002160 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000218c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002210 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000223c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002268 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002294 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002318 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002344 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002370 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +8000239c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002420 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000244c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002478 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024fc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002528 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002554 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002580 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025ac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002604 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002630 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000265c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002688 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000270c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002738 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002764 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002790 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027bc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002814 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002840 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000286c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002898 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000291c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002948 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002974 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029cc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a24 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a50 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a7c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b00 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b2c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b58 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b84 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bdc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c08 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c34 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c60 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c8c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d10 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d3c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d68 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d94 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e18 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b0_str +80002e44 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b1_str +80002e70 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b2_str +80002e9c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b3_str +80002ec8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b4_str +80002ef4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b5_str +80002f20 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b6_str +80002f54 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b7_str +80002f80 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b8_str +80002fac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b9_str +80002fd8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b10_str +80003004 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b11_str +80003034 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b12_str +80003060 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b13_str +8000308c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b14_str +800030b8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b15_str +800030e4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b16_str +80003110 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b17_str +8000313c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b18_str +80003168 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b19_str +80003194 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b20_str +800031c0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b21_str +800031ec l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b22_str +80003218 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b23_str +80003244 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b24_str +80003270 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b25_str +8000329c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b26_str +800032c8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b27_str +800032f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b28_str +80003324 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b29_str +80003354 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b30_str +80003380 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rs1_rs2_b31_str +800033ac l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b0_str +800033d8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b1_str +80003404 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b2_str +80003430 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b3_str +80003464 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b4_str +80003490 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b5_str +800034bc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b6_str +800034e8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b7_str +80003514 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b8_str +80003544 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b9_str +80003570 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b10_str +800035a0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b11_str +800035cc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b12_str +80003600 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b13_str +8000362c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b14_str +80003658 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b15_str +80003684 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b16_str +800036b0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b17_str +800036dc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b18_str +80003708 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b19_str +80003738 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b20_str +80003764 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b21_str +80003790 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b22_str +800037bc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b23_str +800037e8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b24_str +80003814 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b25_str +80003840 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b26_str +8000386c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b27_str +80003898 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b28_str +800038c4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b29_str +800038f4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b30_str +80003920 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_b31_str +8000394c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b0_str +8000397c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b1_str +800039a8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b2_str +800039d4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b6_str +80003a8c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b7_str +80003ab8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b8_str +80003ae4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b9_str +80003b10 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b10_str +80003b3c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b11_str +80003b68 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b12_str +80003b9c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b13_str +80003bc8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b14_str +80003bf4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b15_str +80003c20 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b16_str +80003c4c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b17_str +80003c7c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b18_str +80003ca8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b19_str +80003cd4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b20_str +80003d00 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b21_str +80003d30 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b22_str +80003d5c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b23_str +80003d88 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b24_str +80003db4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b25_str +80003de0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b26_str +80003e10 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b27_str +80003e40 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b28_str +80003e70 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b29_str +80003e9c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b30_str +80003ec8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs2_b31_str +80003ef4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b0_str +80003f20 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b1_str +80003f4c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b2_str +80003f78 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b3_str +80003fa4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b4_str +80003fd0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b5_str +80003ffc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b6_str +80004030 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b7_str +8000405c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b8_str +80004088 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b9_str +800040b4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b10_str +800040e0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b11_str +80004110 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b12_str +80004144 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b13_str +80004170 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b15_str +800041cc l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b16_str +800041f8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b17_str +80004224 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b18_str +80004250 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b19_str +8000427c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b20_str +800042a8 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b21_str +800042d4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b22_str +80004300 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b23_str +8000432c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b26_str +800043b4 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b27_str +800043e0 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b28_str +8000440c l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b29_str +80004438 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b30_str +80004468 l .text.rvtest 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004498 l .text.rvtest 00000000 exit_Mcleanup +8000449c l .text.rvtest 00000000 resto_Medeleg +800044a4 l .text.rvtest 00000000 resto_Msatp +800044a8 l .text.rvtest 00000000 resto_Mscratch +800044b0 l .text.rvtest 00000000 resto_Mxtvec +800044c4 l .text.rvtest 00000000 resto_Mtramp +800044c8 l .text.rvtest 00000000 resto_Mloop +800044e0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 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failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l 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trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +80011b4a l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80011b61 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80011bd7 l .data 00000000 trap_diag_hint_vect_str +80011cad l .data 00000000 trap_diag_hint_cause_str +80011da0 l .data 00000000 trap_diag_hint_epc_str +80011e9b l .data 00000000 trap_diag_hint_tval_str +80011f82 l .data 00000000 trap_diag_hint_ip_str +80011b8f l .data 00000000 trap_diag_generic_str +80010b78 l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +800104f0 l .data 00000000 trap_excpt_name_tbl +80010550 l .data 00000000 trap_int_name_tbl +8001098e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +800104a0 l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 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+80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044e0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004488 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +80004488 g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x803ee678 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x1b46e7cf +80000048: 0001a803 lw x16,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sig1l_cg_cp_rs1_b0: + sha512sig1l x18, x0, x16 # perform operation +80000050: 57000933 sha512sig1l x18,x0,x16 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknh_sha512sig1l_cg_cp_rs1_b0, Zknh_sha512sig1l_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01220863 beq x4,x18,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xa5ebd378 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x8016659b +80000074: 0001a583 lw x11,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sig1l_cg_cp_rs1_b1: + sha512sig1l x30, x1, x11 # perform operation +8000007c: 56b08f33 sha512sig1l x30,x1,x11 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha512sig1l_cg_cp_rs1_b1, Zknh_sha512sig1l_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01e20863 beq x4,x30,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x15, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010793 addi x15,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x31d39ab3 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x794db053 +800000a4: 0001aa83 lw x21,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sig1l_cg_cp_rs1_b2: + sha512sig1l x23, x2, x21 # perform operation +800000ac: 57510bb3 sha512sig1l x23,x2,x21 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sig1l_cg_cp_rs1_b2, Zknh_sha512sig1l_cg_cp_rs1_b2_str) +800000b0: 0007a203 lw x4,0(x15) +800000b4: 01720863 beq x4,x23,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 00478793 addi x15,x15,4 + + mv x24, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018c13 addi x24,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x9087fe7f +800000cc: 000c2183 lw x3,0(x24) +800000d0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0xd1cb35be +800000d4: 000c2003 lw x0,0(x24) +800000d8: 004c0c13 addi x24,x24,4 + +800000dc : +Zknh_sha512sig1l_cg_cp_rs1_b3: + sha512sig1l x30, x3, x0 # perform operation +800000dc: 56018f33 sha512sig1l x30,x3,x0 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sig1l_cg_cp_rs1_b3, Zknh_sha512sig1l_cg_cp_rs1_b3_str) +800000e0: 0007a203 lw x4,0(x15) +800000e4: 01e20863 beq x4,x30,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x66a2dd09 +80000100: 000c2203 lw x4,0(x24) +80000104: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x2800700f +80000108: 000c2083 lw x1,0(x24) +8000010c: 004c0c13 addi x24,x24,4 + +80000110 : +Zknh_sha512sig1l_cg_cp_rs1_b4: + sha512sig1l x9, x4, x1 # perform operation +80000110: 561204b3 sha512sig1l x9,x4,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zknh_sha512sig1l_cg_cp_rs1_b4, Zknh_sha512sig1l_cg_cp_rs1_b4_str) +80000114: 0007a683 lw x13,0(x15) +80000118: 00968863 beq x13,x9,80000128 +8000011c: 4240576f jal x14,80005540 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x2032fe8a +8000012c: 000c2283 lw x5,0(x24) +80000130: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x931f62ff +80000134: 000c2503 lw x10,0(x24) +80000138: 004c0c13 addi x24,x24,4 + +8000013c : +Zknh_sha512sig1l_cg_cp_rs1_b5: + sha512sig1l x7, x5, x10 # perform operation +8000013c: 56a283b3 sha512sig1l x7,x5,x10 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zknh_sha512sig1l_cg_cp_rs1_b5, Zknh_sha512sig1l_cg_cp_rs1_b5_str) +80000140: 0007a683 lw x13,0(x15) +80000144: 00768863 beq x13,x7,80000154 +80000148: 3f80576f jal x14,80005540 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x775ecab6 +80000158: 000c2303 lw x6,0(x24) +8000015c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xe729412c +80000160: 000c2183 lw x3,0(x24) +80000164: 004c0c13 addi x24,x24,4 + +80000168 : +Zknh_sha512sig1l_cg_cp_rs1_b6: + sha512sig1l x10, x6, x3 # perform operation +80000168: 56330533 sha512sig1l x10,x6,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zknh_sha512sig1l_cg_cp_rs1_b6, Zknh_sha512sig1l_cg_cp_rs1_b6_str) +8000016c: 0007a683 lw x13,0(x15) +80000170: 00a68863 beq x13,x10,80000180 +80000174: 3cc0576f jal x14,80005540 +80000178: 80000168 .word 0x80000168 +8000017c: 80009140 .word 0x80009140 +80000180: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x72e4c2ea +80000184: 000c2383 lw x7,0(x24) +80000188: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x7af91994 +8000018c: 000c2f03 lw x30,0(x24) +80000190: 004c0c13 addi x24,x24,4 + +80000194 : +Zknh_sha512sig1l_cg_cp_rs1_b7: + sha512sig1l x21, x7, x30 # perform operation +80000194: 57e38ab3 sha512sig1l x21,x7,x30 + # Check if x21 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x21, Zknh_sha512sig1l_cg_cp_rs1_b7, Zknh_sha512sig1l_cg_cp_rs1_b7_str) +80000198: 0007a683 lw x13,0(x15) +8000019c: 01568863 beq x13,x21,800001ac +800001a0: 3a00576f jal x14,80005540 +800001a4: 80000194 .word 0x80000194 +800001a8: 80009178 .word 0x80009178 +800001ac: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x01854762 +800001b0: 000c2403 lw x8,0(x24) +800001b4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x0a0b97be +800001b8: 000c2103 lw x2,0(x24) +800001bc: 004c0c13 addi x24,x24,4 + +800001c0 : +Zknh_sha512sig1l_cg_cp_rs1_b8: + sha512sig1l x3, x8, x2 # perform operation +800001c0: 562401b3 sha512sig1l x3,x8,x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x3, Zknh_sha512sig1l_cg_cp_rs1_b8, Zknh_sha512sig1l_cg_cp_rs1_b8_str) +800001c4: 0007a683 lw x13,0(x15) +800001c8: 00368863 beq x13,x3,800001d8 +800001cc: 3740576f jal x14,80005540 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 800091b0 .word 0x800091b0 +800001d8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x2750cffb +800001dc: 000c2483 lw x9,0(x24) +800001e0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xa10a0503 +800001e4: 000c2583 lw x11,0(x24) +800001e8: 004c0c13 addi x24,x24,4 + +800001ec : +Zknh_sha512sig1l_cg_cp_rs1_b9: + sha512sig1l x28, x9, x11 # perform operation +800001ec: 56b48e33 sha512sig1l x28,x9,x11 + # Check if x28 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x28, Zknh_sha512sig1l_cg_cp_rs1_b9, Zknh_sha512sig1l_cg_cp_rs1_b9_str) +800001f0: 0007a683 lw x13,0(x15) +800001f4: 01c68863 beq x13,x28,80000204 +800001f8: 3480576f jal x14,80005540 +800001fc: 800001ec .word 0x800001ec +80000200: 800091e8 .word 0x800091e8 +80000204: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x42e55c0b +80000208: 000c2503 lw x10,0(x24) +8000020c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x36f93026 +80000210: 000c2203 lw x4,0(x24) +80000214: 004c0c13 addi x24,x24,4 + +80000218 : +Zknh_sha512sig1l_cg_cp_rs1_b10: + sha512sig1l x29, x10, x4 # perform operation +80000218: 56450eb3 sha512sig1l x29,x10,x4 + # Check if x29 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x29, Zknh_sha512sig1l_cg_cp_rs1_b10, Zknh_sha512sig1l_cg_cp_rs1_b10_str) +8000021c: 0007a683 lw x13,0(x15) +80000220: 01d68863 beq x13,x29,80000230 +80000224: 31c0576f jal x14,80005540 +80000228: 80000218 .word 0x80000218 +8000022c: 80009221 .word 0x80009221 +80000230: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x06cafb58 +80000234: 000c2583 lw x11,0(x24) +80000238: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0xa7e3cb15 +8000023c: 000c2203 lw x4,0(x24) +80000240: 004c0c13 addi x24,x24,4 + +80000244 : +Zknh_sha512sig1l_cg_cp_rs1_b11: + sha512sig1l x31, x11, x4 # perform operation +80000244: 56458fb3 sha512sig1l x31,x11,x4 + # Check if x31 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x31, Zknh_sha512sig1l_cg_cp_rs1_b11, Zknh_sha512sig1l_cg_cp_rs1_b11_str) +80000248: 0007a683 lw x13,0(x15) +8000024c: 01f68863 beq x13,x31,8000025c +80000250: 2f00576f jal x14,80005540 +80000254: 80000244 .word 0x80000244 +80000258: 8000925b .word 0x8000925b +8000025c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xeb644aad +80000260: 000c2603 lw x12,0(x24) +80000264: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xb3cea562 +80000268: 000c2b03 lw x22,0(x24) +8000026c: 004c0c13 addi x24,x24,4 + +80000270 : +Zknh_sha512sig1l_cg_cp_rs1_b12: + sha512sig1l x6, x12, x22 # perform operation +80000270: 57660333 sha512sig1l x6,x12,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zknh_sha512sig1l_cg_cp_rs1_b12, Zknh_sha512sig1l_cg_cp_rs1_b12_str) +80000274: 0007a683 lw x13,0(x15) +80000278: 00668863 beq x13,x6,80000288 +8000027c: 2c40576f jal x14,80005540 +80000280: 80000270 .word 0x80000270 +80000284: 80009295 .word 0x80009295 +80000288: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +8000028c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000290: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x7e02d701 +80000294: 000c2683 lw x13,0(x24) +80000298: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x0482c7e3 +8000029c: 000c2e03 lw x28,0(x24) +800002a0: 004c0c13 addi x24,x24,4 + +800002a4 : +Zknh_sha512sig1l_cg_cp_rs1_b13: + sha512sig1l x5, x13, x28 # perform operation +800002a4: 57c682b3 sha512sig1l x5,x13,x28 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknh_sha512sig1l_cg_cp_rs1_b13, Zknh_sha512sig1l_cg_cp_rs1_b13_str) +800002a8: 0007a383 lw x7,0(x15) +800002ac: 00538863 beq x7,x5,800002bc +800002b0: 2680546f jal x8,80005518 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 800092cf .word 0x800092cf +800002bc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xb486a197 +800002c0: 000c2703 lw x14,0(x24) +800002c4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x957698fb +800002c8: 000c2d83 lw x27,0(x24) +800002cc: 004c0c13 addi x24,x24,4 + +800002d0 : +Zknh_sha512sig1l_cg_cp_rs1_b14: + sha512sig1l x20, x14, x27 # perform operation +800002d0: 57b70a33 sha512sig1l x20,x14,x27 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zknh_sha512sig1l_cg_cp_rs1_b14, Zknh_sha512sig1l_cg_cp_rs1_b14_str) +800002d4: 0007a383 lw x7,0(x15) +800002d8: 01438863 beq x7,x20,800002e8 +800002dc: 23c0546f jal x8,80005518 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 80009309 .word 0x80009309 +800002e8: 00478793 addi x15,x15,4 + + mv x23, x15 # switch signature pointer register to avoid conflict with test +800002ec: 00078b93 addi x23,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x9e0a8f74 +800002f0: 000c2783 lw x15,0(x24) +800002f4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xa97ba318 +800002f8: 000c2903 lw x18,0(x24) +800002fc: 004c0c13 addi x24,x24,4 + +80000300 : +Zknh_sha512sig1l_cg_cp_rs1_b15: + sha512sig1l x30, x15, x18 # perform operation +80000300: 57278f33 sha512sig1l x30,x15,x18 + # Check if x30 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x30, Zknh_sha512sig1l_cg_cp_rs1_b15, Zknh_sha512sig1l_cg_cp_rs1_b15_str) +80000304: 000ba383 lw x7,0(x23) +80000308: 01e38863 beq x7,x30,80000318 +8000030c: 20c0546f jal x8,80005518 +80000310: 80000300 .word 0x80000300 +80000314: 80009343 .word 0x80009343 +80000318: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xcc8099aa +8000031c: 000c2803 lw x16,0(x24) +80000320: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x1eeb246b +80000324: 000c2883 lw x17,0(x24) +80000328: 004c0c13 addi x24,x24,4 + +8000032c : +Zknh_sha512sig1l_cg_cp_rs1_b16: + sha512sig1l x12, x16, x17 # perform operation +8000032c: 57180633 sha512sig1l x12,x16,x17 + # Check if x12 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x12, Zknh_sha512sig1l_cg_cp_rs1_b16, Zknh_sha512sig1l_cg_cp_rs1_b16_str) +80000330: 000ba383 lw x7,0(x23) +80000334: 00c38863 beq x7,x12,80000344 +80000338: 1e00546f jal x8,80005518 +8000033c: 8000032c .word 0x8000032c +80000340: 8000937d .word 0x8000937d +80000344: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xdbaee3bb +80000348: 000c2883 lw x17,0(x24) +8000034c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0xd3060abe +80000350: 000c2283 lw x5,0(x24) +80000354: 004c0c13 addi x24,x24,4 + +80000358 : +Zknh_sha512sig1l_cg_cp_rs1_b17: + sha512sig1l x28, x17, x5 # perform operation +80000358: 56588e33 sha512sig1l x28,x17,x5 + # Check if x28 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x28, Zknh_sha512sig1l_cg_cp_rs1_b17, Zknh_sha512sig1l_cg_cp_rs1_b17_str) +8000035c: 000ba383 lw x7,0(x23) +80000360: 01c38863 beq x7,x28,80000370 +80000364: 1b40546f jal x8,80005518 +80000368: 80000358 .word 0x80000358 +8000036c: 800093b7 .word 0x800093b7 +80000370: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x2bc19cd1 +80000374: 000c2903 lw x18,0(x24) +80000378: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x083cbc2f +8000037c: 000c2883 lw x17,0(x24) +80000380: 004c0c13 addi x24,x24,4 + +80000384 : +Zknh_sha512sig1l_cg_cp_rs1_b18: + sha512sig1l x3, x18, x17 # perform operation +80000384: 571901b3 sha512sig1l x3,x18,x17 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zknh_sha512sig1l_cg_cp_rs1_b18, Zknh_sha512sig1l_cg_cp_rs1_b18_str) +80000388: 000ba383 lw x7,0(x23) +8000038c: 00338863 beq x7,x3,8000039c +80000390: 1880546f jal x8,80005518 +80000394: 80000384 .word 0x80000384 +80000398: 800093f1 .word 0x800093f1 +8000039c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x24255f83 +800003a0: 000c2983 lw x19,0(x24) +800003a4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x9339fec8 +800003a8: 000c2d83 lw x27,0(x24) +800003ac: 004c0c13 addi x24,x24,4 + +800003b0 : +Zknh_sha512sig1l_cg_cp_rs1_b19: + sha512sig1l x14, x19, x27 # perform operation +800003b0: 57b98733 sha512sig1l x14,x19,x27 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zknh_sha512sig1l_cg_cp_rs1_b19, Zknh_sha512sig1l_cg_cp_rs1_b19_str) +800003b4: 000ba383 lw x7,0(x23) +800003b8: 00e38863 beq x7,x14,800003c8 +800003bc: 15c0546f jal x8,80005518 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000942b .word 0x8000942b +800003c8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xafaf9feb +800003cc: 000c2a03 lw x20,0(x24) +800003d0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x6822f539 +800003d4: 000c2683 lw x13,0(x24) +800003d8: 004c0c13 addi x24,x24,4 + +800003dc : +Zknh_sha512sig1l_cg_cp_rs1_b20: + sha512sig1l x26, x20, x13 # perform operation +800003dc: 56da0d33 sha512sig1l x26,x20,x13 + # Check if x26 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x26, Zknh_sha512sig1l_cg_cp_rs1_b20, Zknh_sha512sig1l_cg_cp_rs1_b20_str) +800003e0: 000ba383 lw x7,0(x23) +800003e4: 01a38863 beq x7,x26,800003f4 +800003e8: 1300546f jal x8,80005518 +800003ec: 800003dc .word 0x800003dc +800003f0: 80009465 .word 0x80009465 +800003f4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xcc8c1b78 +800003f8: 000c2a83 lw x21,0(x24) +800003fc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xbcde2390 +80000400: 000c2983 lw x19,0(x24) +80000404: 004c0c13 addi x24,x24,4 + +80000408 : +Zknh_sha512sig1l_cg_cp_rs1_b21: + sha512sig1l x10, x21, x19 # perform operation +80000408: 573a8533 sha512sig1l x10,x21,x19 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zknh_sha512sig1l_cg_cp_rs1_b21, Zknh_sha512sig1l_cg_cp_rs1_b21_str) +8000040c: 000ba383 lw x7,0(x23) +80000410: 00a38863 beq x7,x10,80000420 +80000414: 1040546f jal x8,80005518 +80000418: 80000408 .word 0x80000408 +8000041c: 8000949f .word 0x8000949f +80000420: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x37e9064a +80000424: 000c2b03 lw x22,0(x24) +80000428: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xde7324ca +8000042c: 000c2903 lw x18,0(x24) +80000430: 004c0c13 addi x24,x24,4 + +80000434 : +Zknh_sha512sig1l_cg_cp_rs1_b22: + sha512sig1l x9, x22, x18 # perform operation +80000434: 572b04b3 sha512sig1l x9,x22,x18 + # Check if x9 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x9, Zknh_sha512sig1l_cg_cp_rs1_b22, Zknh_sha512sig1l_cg_cp_rs1_b22_str) +80000438: 000ba383 lw x7,0(x23) +8000043c: 00938863 beq x7,x9,8000044c +80000440: 0d80546f jal x8,80005518 +80000444: 80000434 .word 0x80000434 +80000448: 800094d9 .word 0x800094d9 +8000044c: 004b8b93 addi x23,x23,4 + + mv x3, x23 # switch signature pointer register to avoid conflict with test +80000450: 000b8193 addi x3,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x6249a2da +80000454: 000c2b83 lw x23,0(x24) +80000458: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x20b8abb6 +8000045c: 000c2f83 lw x31,0(x24) +80000460: 004c0c13 addi x24,x24,4 + +80000464 : +Zknh_sha512sig1l_cg_cp_rs1_b23: + sha512sig1l x17, x23, x31 # perform operation +80000464: 57fb88b3 sha512sig1l x17,x23,x31 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha512sig1l_cg_cp_rs1_b23, Zknh_sha512sig1l_cg_cp_rs1_b23_str) +80000468: 0001a383 lw x7,0(x3) +8000046c: 01138863 beq x7,x17,8000047c +80000470: 0a80546f jal x8,80005518 +80000474: 80000464 .word 0x80000464 +80000478: 80009513 .word 0x80009513 +8000047c: 00418193 addi x3,x3,4 + + mv x30, x24 # switch data pointer register to avoid conflict with test +80000480: 000c0f13 addi x30,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x1f86b661 +80000484: 000f2c03 lw x24,0(x30) +80000488: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs2: x31 = 0xbc8590c8 +8000048c: 000f2f83 lw x31,0(x30) +80000490: 004f0f13 addi x30,x30,4 + +80000494 : +Zknh_sha512sig1l_cg_cp_rs1_b24: + sha512sig1l x20, x24, x31 # perform operation +80000494: 57fc0a33 sha512sig1l x20,x24,x31 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zknh_sha512sig1l_cg_cp_rs1_b24, Zknh_sha512sig1l_cg_cp_rs1_b24_str) +80000498: 0001a383 lw x7,0(x3) +8000049c: 01438863 beq x7,x20,800004ac +800004a0: 0780546f jal x8,80005518 +800004a4: 80000494 .word 0x80000494 +800004a8: 8000954d .word 0x8000954d +800004ac: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x3eeeee86 +800004b0: 000f2c83 lw x25,0(x30) +800004b4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xd5f28e7e +800004b8: 000f2c03 lw x24,0(x30) +800004bc: 004f0f13 addi x30,x30,4 + +800004c0 : +Zknh_sha512sig1l_cg_cp_rs1_b25: + sha512sig1l x4, x25, x24 # perform operation +800004c0: 578c8233 sha512sig1l x4,x25,x24 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zknh_sha512sig1l_cg_cp_rs1_b25, Zknh_sha512sig1l_cg_cp_rs1_b25_str) +800004c4: 0001a383 lw x7,0(x3) +800004c8: 00438863 beq x7,x4,800004d8 +800004cc: 04c0546f jal x8,80005518 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 80009587 .word 0x80009587 +800004d8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x722b245a +800004dc: 000f2d03 lw x26,0(x30) +800004e0: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xc389adb0 +800004e4: 000f2b83 lw x23,0(x30) +800004e8: 004f0f13 addi x30,x30,4 + +800004ec : +Zknh_sha512sig1l_cg_cp_rs1_b26: + sha512sig1l x1, x26, x23 # perform operation +800004ec: 577d00b3 sha512sig1l x1,x26,x23 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sig1l_cg_cp_rs1_b26, Zknh_sha512sig1l_cg_cp_rs1_b26_str) +800004f0: 0001a383 lw x7,0(x3) +800004f4: 00138863 beq x7,x1,80000504 +800004f8: 0200546f jal x8,80005518 +800004fc: 800004ec .word 0x800004ec +80000500: 800095c1 .word 0x800095c1 +80000504: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x261a0efc +80000508: 000f2d83 lw x27,0(x30) +8000050c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x236b3be7 +80000510: 000f2e83 lw x29,0(x30) +80000514: 004f0f13 addi x30,x30,4 + +80000518 : +Zknh_sha512sig1l_cg_cp_rs1_b27: + sha512sig1l x21, x27, x29 # perform operation +80000518: 57dd8ab3 sha512sig1l x21,x27,x29 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rs1_b27, Zknh_sha512sig1l_cg_cp_rs1_b27_str) +8000051c: 0001a383 lw x7,0(x3) +80000520: 01538863 beq x7,x21,80000530 +80000524: 7f50446f jal x8,80005518 +80000528: 80000518 .word 0x80000518 +8000052c: 800095fb .word 0x800095fb +80000530: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xc6d95297 +80000534: 000f2e03 lw x28,0(x30) +80000538: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x5bf33fba +8000053c: 000f2903 lw x18,0(x30) +80000540: 004f0f13 addi x30,x30,4 + +80000544 : +Zknh_sha512sig1l_cg_cp_rs1_b28: + sha512sig1l x12, x28, x18 # perform operation +80000544: 572e0633 sha512sig1l x12,x28,x18 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknh_sha512sig1l_cg_cp_rs1_b28, Zknh_sha512sig1l_cg_cp_rs1_b28_str) +80000548: 0001a383 lw x7,0(x3) +8000054c: 00c38863 beq x7,x12,8000055c +80000550: 7c90446f jal x8,80005518 +80000554: 80000544 .word 0x80000544 +80000558: 80009635 .word 0x80009635 +8000055c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xdb2d3321 +80000560: 000f2e83 lw x29,0(x30) +80000564: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xd01368f5 +80000568: 000f2883 lw x17,0(x30) +8000056c: 004f0f13 addi x30,x30,4 + +80000570 : +Zknh_sha512sig1l_cg_cp_rs1_b29: + sha512sig1l x21, x29, x17 # perform operation +80000570: 571e8ab3 sha512sig1l x21,x29,x17 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rs1_b29, Zknh_sha512sig1l_cg_cp_rs1_b29_str) +80000574: 0001a383 lw x7,0(x3) +80000578: 01538863 beq x7,x21,80000588 +8000057c: 79d0446f jal x8,80005518 +80000580: 80000570 .word 0x80000570 +80000584: 8000966f .word 0x8000966f +80000588: 00418193 addi x3,x3,4 + + mv x22, x30 # switch data pointer register to avoid conflict with test +8000058c: 000f0b13 addi x22,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x00947ee2 +80000590: 000b2f03 lw x30,0(x22) +80000594: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x9f3f647c +80000598: 000b2d83 lw x27,0(x22) +8000059c: 004b0b13 addi x22,x22,4 + +800005a0 : +Zknh_sha512sig1l_cg_cp_rs1_b30: + sha512sig1l x18, x30, x27 # perform operation +800005a0: 57bf0933 sha512sig1l x18,x30,x27 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zknh_sha512sig1l_cg_cp_rs1_b30, Zknh_sha512sig1l_cg_cp_rs1_b30_str) +800005a4: 0001a383 lw x7,0(x3) +800005a8: 01238863 beq x7,x18,800005b8 +800005ac: 76d0446f jal x8,80005518 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 800096a9 .word 0x800096a9 +800005b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xfadc54cc +800005bc: 000b2f83 lw x31,0(x22) +800005c0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x8f9e2139 +800005c4: 000b2083 lw x1,0(x22) +800005c8: 004b0b13 addi x22,x22,4 + +800005cc : +Zknh_sha512sig1l_cg_cp_rs1_b31: + sha512sig1l x2, x31, x1 # perform operation +800005cc: 561f8133 sha512sig1l x2,x31,x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1l_cg_cp_rs1_b31, Zknh_sha512sig1l_cg_cp_rs1_b31_str) +800005d0: 0001a383 lw x7,0(x3) +800005d4: 00238863 beq x7,x2,800005e4 +800005d8: 7410446f jal x8,80005518 +800005dc: 800005cc .word 0x800005cc +800005e0: 800096e3 .word 0x800096e3 +800005e4: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x425011e5 +800005e8: 000b2e83 lw x29,0(x22) +800005ec: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x0f82f6a0 +800005f0: 000b2003 lw x0,0(x22) +800005f4: 004b0b13 addi x22,x22,4 + +800005f8 : +Zknh_sha512sig1l_cg_cp_rs2_b0: + sha512sig1l x2, x29, x0 # perform operation +800005f8: 560e8133 sha512sig1l x2,x29,x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sig1l_cg_cp_rs2_b0, Zknh_sha512sig1l_cg_cp_rs2_b0_str) +800005fc: 0001a383 lw x7,0(x3) +80000600: 00238863 beq x7,x2,80000610 +80000604: 7150446f jal x8,80005518 +80000608: 800005f8 .word 0x800005f8 +8000060c: 8000971d .word 0x8000971d +80000610: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xd17aa100 +80000614: 000b2f03 lw x30,0(x22) +80000618: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x301b4404 +8000061c: 000b2083 lw x1,0(x22) +80000620: 004b0b13 addi x22,x22,4 + +80000624 : +Zknh_sha512sig1l_cg_cp_rs2_b1: + sha512sig1l x19, x30, x1 # perform operation +80000624: 561f09b3 sha512sig1l x19,x30,x1 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha512sig1l_cg_cp_rs2_b1, Zknh_sha512sig1l_cg_cp_rs2_b1_str) +80000628: 0001a383 lw x7,0(x3) +8000062c: 01338863 beq x7,x19,8000063c +80000630: 6e90446f jal x8,80005518 +80000634: 80000624 .word 0x80000624 +80000638: 80009756 .word 0x80009756 +8000063c: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x8c5b3651 +80000640: 000b2303 lw x6,0(x22) +80000644: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x2a9a882e +80000648: 000b2103 lw x2,0(x22) +8000064c: 004b0b13 addi x22,x22,4 + +80000650 : +Zknh_sha512sig1l_cg_cp_rs2_b2: + sha512sig1l x26, x6, x2 # perform operation +80000650: 56230d33 sha512sig1l x26,x6,x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zknh_sha512sig1l_cg_cp_rs2_b2, Zknh_sha512sig1l_cg_cp_rs2_b2_str) +80000654: 0001a383 lw x7,0(x3) +80000658: 01a38863 beq x7,x26,80000668 +8000065c: 6bd0446f jal x8,80005518 +80000660: 80000650 .word 0x80000650 +80000664: 8000978f .word 0x8000978f +80000668: 00418193 addi x3,x3,4 + + mv x6, x3 # switch signature pointer register to avoid conflict with test +8000066c: 00018313 addi x6,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x957d405e +80000670: 000b2a83 lw x21,0(x22) +80000674: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xe5e8ec7d +80000678: 000b2183 lw x3,0(x22) +8000067c: 004b0b13 addi x22,x22,4 + +80000680 : +Zknh_sha512sig1l_cg_cp_rs2_b3: + sha512sig1l x9, x21, x3 # perform operation +80000680: 563a84b3 sha512sig1l x9,x21,x3 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zknh_sha512sig1l_cg_cp_rs2_b3, Zknh_sha512sig1l_cg_cp_rs2_b3_str) +80000684: 00032383 lw x7,0(x6) +80000688: 00938863 beq x7,x9,80000698 +8000068c: 68d0446f jal x8,80005518 +80000690: 80000680 .word 0x80000680 +80000694: 800097c8 .word 0x800097c8 +80000698: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x7dee1ffa +8000069c: 000b2703 lw x14,0(x22) +800006a0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xdcb4af16 +800006a4: 000b2203 lw x4,0(x22) +800006a8: 004b0b13 addi x22,x22,4 + +800006ac : +Zknh_sha512sig1l_cg_cp_rs2_b4: + sha512sig1l x10, x14, x4 # perform operation +800006ac: 56470533 sha512sig1l x10,x14,x4 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zknh_sha512sig1l_cg_cp_rs2_b4, Zknh_sha512sig1l_cg_cp_rs2_b4_str) +800006b0: 00032383 lw x7,0(x6) +800006b4: 00a38863 beq x7,x10,800006c4 +800006b8: 6610446f jal x8,80005518 +800006bc: 800006ac .word 0x800006ac +800006c0: 80009801 .word 0x80009801 +800006c4: 00430313 addi x6,x6,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x22a063ac +800006c8: 000b2583 lw x11,0(x22) +800006cc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x079d5c2f +800006d0: 000b2283 lw x5,0(x22) +800006d4: 004b0b13 addi x22,x22,4 + +800006d8 : +Zknh_sha512sig1l_cg_cp_rs2_b5: + sha512sig1l x14, x11, x5 # perform operation +800006d8: 56558733 sha512sig1l x14,x11,x5 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zknh_sha512sig1l_cg_cp_rs2_b5, Zknh_sha512sig1l_cg_cp_rs2_b5_str) +800006dc: 00032383 lw x7,0(x6) +800006e0: 00e38863 beq x7,x14,800006f0 +800006e4: 6350446f jal x8,80005518 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000983a .word 0x8000983a +800006f0: 00430313 addi x6,x6,4 + + mv x17, x6 # switch signature pointer register to avoid conflict with test +800006f4: 00030893 addi x17,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0xcde772a0 +800006f8: 000b2183 lw x3,0(x22) +800006fc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x600c6283 +80000700: 000b2303 lw x6,0(x22) +80000704: 004b0b13 addi x22,x22,4 + +80000708 : +Zknh_sha512sig1l_cg_cp_rs2_b6: + sha512sig1l x4, x3, x6 # perform operation +80000708: 56618233 sha512sig1l x4,x3,x6 + # Check if x4 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x4, Zknh_sha512sig1l_cg_cp_rs2_b6, Zknh_sha512sig1l_cg_cp_rs2_b6_str) +8000070c: 0008a383 lw x7,0(x17) +80000710: 00438863 beq x7,x4,80000720 +80000714: 6050446f jal x8,80005518 +80000718: 80000708 .word 0x80000708 +8000071c: 80009873 .word 0x80009873 +80000720: 00488893 addi x17,x17,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000724: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000728: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x32174db8 +8000072c: 000b2c83 lw x25,0(x22) +80000730: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x25ee4758 +80000734: 000b2383 lw x7,0(x22) +80000738: 004b0b13 addi x22,x22,4 + +8000073c : +Zknh_sha512sig1l_cg_cp_rs2_b7: + sha512sig1l x16, x25, x7 # perform operation +8000073c: 567c8833 sha512sig1l x16,x25,x7 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknh_sha512sig1l_cg_cp_rs2_b7, Zknh_sha512sig1l_cg_cp_rs2_b7_str) +80000740: 0008a203 lw x4,0(x17) +80000744: 01020863 beq x4,x16,80000754 +80000748: 5b9042ef jal x5,80005500 +8000074c: 8000073c .word 0x8000073c +80000750: 800098ac .word 0x800098ac +80000754: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x547ef3e8 +80000758: 000b2803 lw x16,0(x22) +8000075c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xda065c55 +80000760: 000b2403 lw x8,0(x22) +80000764: 004b0b13 addi x22,x22,4 + +80000768 : +Zknh_sha512sig1l_cg_cp_rs2_b8: + sha512sig1l x7, x16, x8 # perform operation +80000768: 568803b3 sha512sig1l x7,x16,x8 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknh_sha512sig1l_cg_cp_rs2_b8, Zknh_sha512sig1l_cg_cp_rs2_b8_str) +8000076c: 0008a203 lw x4,0(x17) +80000770: 00720863 beq x4,x7,80000780 +80000774: 58d042ef jal x5,80005500 +80000778: 80000768 .word 0x80000768 +8000077c: 800098e5 .word 0x800098e5 +80000780: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0x1c00f05d +80000784: 000b2403 lw x8,0(x22) +80000788: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0xb4182ce0 +8000078c: 000b2483 lw x9,0(x22) +80000790: 004b0b13 addi x22,x22,4 + +80000794 : +Zknh_sha512sig1l_cg_cp_rs2_b9: + sha512sig1l x10, x8, x9 # perform operation +80000794: 56940533 sha512sig1l x10,x8,x9 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknh_sha512sig1l_cg_cp_rs2_b9, Zknh_sha512sig1l_cg_cp_rs2_b9_str) +80000798: 0008a203 lw x4,0(x17) +8000079c: 00a20863 beq x4,x10,800007ac +800007a0: 561042ef jal x5,80005500 +800007a4: 80000794 .word 0x80000794 +800007a8: 8000991e .word 0x8000991e +800007ac: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x0d7adaf8 +800007b0: 000b2483 lw x9,0(x22) +800007b4: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x7053a981 +800007b8: 000b2503 lw x10,0(x22) +800007bc: 004b0b13 addi x22,x22,4 + +800007c0 : +Zknh_sha512sig1l_cg_cp_rs2_b10: + sha512sig1l x1, x9, x10 # perform operation +800007c0: 56a480b3 sha512sig1l x1,x9,x10 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknh_sha512sig1l_cg_cp_rs2_b10, Zknh_sha512sig1l_cg_cp_rs2_b10_str) +800007c4: 0008a203 lw x4,0(x17) +800007c8: 00120863 beq x4,x1,800007d8 +800007cc: 535042ef jal x5,80005500 +800007d0: 800007c0 .word 0x800007c0 +800007d4: 80009957 .word 0x80009957 +800007d8: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x90f67906 +800007dc: 000b2903 lw x18,0(x22) +800007e0: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x824cf1ff +800007e4: 000b2583 lw x11,0(x22) +800007e8: 004b0b13 addi x22,x22,4 + +800007ec : +Zknh_sha512sig1l_cg_cp_rs2_b11: + sha512sig1l x14, x18, x11 # perform operation +800007ec: 56b90733 sha512sig1l x14,x18,x11 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknh_sha512sig1l_cg_cp_rs2_b11, Zknh_sha512sig1l_cg_cp_rs2_b11_str) +800007f0: 0008a203 lw x4,0(x17) +800007f4: 00e20863 beq x4,x14,80000804 +800007f8: 509042ef jal x5,80005500 +800007fc: 800007ec .word 0x800007ec +80000800: 80009991 .word 0x80009991 +80000804: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x6e6cc2ef +80000808: 000b2a03 lw x20,0(x22) +8000080c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xdbebcc38 +80000810: 000b2603 lw x12,0(x22) +80000814: 004b0b13 addi x22,x22,4 + +80000818 : +Zknh_sha512sig1l_cg_cp_rs2_b12: + sha512sig1l x18, x20, x12 # perform operation +80000818: 56ca0933 sha512sig1l x18,x20,x12 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknh_sha512sig1l_cg_cp_rs2_b12, Zknh_sha512sig1l_cg_cp_rs2_b12_str) +8000081c: 0008a203 lw x4,0(x17) +80000820: 01220863 beq x4,x18,80000830 +80000824: 4dd042ef jal x5,80005500 +80000828: 80000818 .word 0x80000818 +8000082c: 800099cb .word 0x800099cb +80000830: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x6fa5e37a +80000834: 000b2483 lw x9,0(x22) +80000838: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xbaa0a1bc +8000083c: 000b2683 lw x13,0(x22) +80000840: 004b0b13 addi x22,x22,4 + +80000844 : +Zknh_sha512sig1l_cg_cp_rs2_b13: + sha512sig1l x14, x9, x13 # perform operation +80000844: 56d48733 sha512sig1l x14,x9,x13 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknh_sha512sig1l_cg_cp_rs2_b13, Zknh_sha512sig1l_cg_cp_rs2_b13_str) +80000848: 0008a203 lw x4,0(x17) +8000084c: 00e20863 beq x4,x14,8000085c +80000850: 4b1042ef jal x5,80005500 +80000854: 80000844 .word 0x80000844 +80000858: 80009a05 .word 0x80009a05 +8000085c: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x5fd0175c +80000860: 000b2483 lw x9,0(x22) +80000864: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xa1b45ca6 +80000868: 000b2703 lw x14,0(x22) +8000086c: 004b0b13 addi x22,x22,4 + +80000870 : +Zknh_sha512sig1l_cg_cp_rs2_b14: + sha512sig1l x20, x9, x14 # perform operation +80000870: 56e48a33 sha512sig1l x20,x9,x14 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknh_sha512sig1l_cg_cp_rs2_b14, Zknh_sha512sig1l_cg_cp_rs2_b14_str) +80000874: 0008a203 lw x4,0(x17) +80000878: 01420863 beq x4,x20,80000888 +8000087c: 485042ef jal x5,80005500 +80000880: 80000870 .word 0x80000870 +80000884: 80009a3f .word 0x80009a3f +80000888: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x49fb9d20 +8000088c: 000b2d83 lw x27,0(x22) +80000890: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x5b23eaa9 +80000894: 000b2783 lw x15,0(x22) +80000898: 004b0b13 addi x22,x22,4 + +8000089c : +Zknh_sha512sig1l_cg_cp_rs2_b15: + sha512sig1l x24, x27, x15 # perform operation +8000089c: 56fd8c33 sha512sig1l x24,x27,x15 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknh_sha512sig1l_cg_cp_rs2_b15, Zknh_sha512sig1l_cg_cp_rs2_b15_str) +800008a0: 0008a203 lw x4,0(x17) +800008a4: 01820863 beq x4,x24,800008b4 +800008a8: 459042ef jal x5,80005500 +800008ac: 8000089c .word 0x8000089c +800008b0: 80009a79 .word 0x80009a79 +800008b4: 00488893 addi x17,x17,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xe0cf6fe3 +800008b8: 000b2403 lw x8,0(x22) +800008bc: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xe4f8815a +800008c0: 000b2803 lw x16,0(x22) +800008c4: 004b0b13 addi x22,x22,4 + +800008c8 : +Zknh_sha512sig1l_cg_cp_rs2_b16: + sha512sig1l x26, x8, x16 # perform operation +800008c8: 57040d33 sha512sig1l x26,x8,x16 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknh_sha512sig1l_cg_cp_rs2_b16, Zknh_sha512sig1l_cg_cp_rs2_b16_str) +800008cc: 0008a203 lw x4,0(x17) +800008d0: 01a20863 beq x4,x26,800008e0 +800008d4: 42d042ef jal x5,80005500 +800008d8: 800008c8 .word 0x800008c8 +800008dc: 80009ab3 .word 0x80009ab3 +800008e0: 00488893 addi x17,x17,4 + + mv x24, x17 # switch signature pointer register to avoid conflict with test +800008e4: 00088c13 addi x24,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x560c4799 +800008e8: 000b2f83 lw x31,0(x22) +800008ec: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x807c0114 +800008f0: 000b2883 lw x17,0(x22) +800008f4: 004b0b13 addi x22,x22,4 + +800008f8 : +Zknh_sha512sig1l_cg_cp_rs2_b17: + sha512sig1l x9, x31, x17 # perform operation +800008f8: 571f84b3 sha512sig1l x9,x31,x17 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zknh_sha512sig1l_cg_cp_rs2_b17, Zknh_sha512sig1l_cg_cp_rs2_b17_str) +800008fc: 000c2203 lw x4,0(x24) +80000900: 00920863 beq x4,x9,80000910 +80000904: 3fd042ef jal x5,80005500 +80000908: 800008f8 .word 0x800008f8 +8000090c: 80009aed .word 0x80009aed +80000910: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x768f98f3 +80000914: 000b2e83 lw x29,0(x22) +80000918: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x62892ced +8000091c: 000b2903 lw x18,0(x22) +80000920: 004b0b13 addi x22,x22,4 + +80000924 : +Zknh_sha512sig1l_cg_cp_rs2_b18: + sha512sig1l x28, x29, x18 # perform operation +80000924: 572e8e33 sha512sig1l x28,x29,x18 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zknh_sha512sig1l_cg_cp_rs2_b18, Zknh_sha512sig1l_cg_cp_rs2_b18_str) +80000928: 000c2203 lw x4,0(x24) +8000092c: 01c20863 beq x4,x28,8000093c +80000930: 3d1042ef jal x5,80005500 +80000934: 80000924 .word 0x80000924 +80000938: 80009b27 .word 0x80009b27 +8000093c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0xa27bced9 +80000940: 000b2483 lw x9,0(x22) +80000944: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x5b1209f5 +80000948: 000b2983 lw x19,0(x22) +8000094c: 004b0b13 addi x22,x22,4 + +80000950 : +Zknh_sha512sig1l_cg_cp_rs2_b19: + sha512sig1l x17, x9, x19 # perform operation +80000950: 573488b3 sha512sig1l x17,x9,x19 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknh_sha512sig1l_cg_cp_rs2_b19, Zknh_sha512sig1l_cg_cp_rs2_b19_str) +80000954: 000c2203 lw x4,0(x24) +80000958: 01120863 beq x4,x17,80000968 +8000095c: 3a5042ef jal x5,80005500 +80000960: 80000950 .word 0x80000950 +80000964: 80009b61 .word 0x80009b61 +80000968: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xe51154b6 +8000096c: 000b2703 lw x14,0(x22) +80000970: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xc0e40ad8 +80000974: 000b2a03 lw x20,0(x22) +80000978: 004b0b13 addi x22,x22,4 + +8000097c : +Zknh_sha512sig1l_cg_cp_rs2_b20: + sha512sig1l x28, x14, x20 # perform operation +8000097c: 57470e33 sha512sig1l x28,x14,x20 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zknh_sha512sig1l_cg_cp_rs2_b20, Zknh_sha512sig1l_cg_cp_rs2_b20_str) +80000980: 000c2203 lw x4,0(x24) +80000984: 01c20863 beq x4,x28,80000994 +80000988: 379042ef jal x5,80005500 +8000098c: 8000097c .word 0x8000097c +80000990: 80009b9b .word 0x80009b9b +80000994: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x65ec6a34 +80000998: 000b2f83 lw x31,0(x22) +8000099c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x3c789afa +800009a0: 000b2a83 lw x21,0(x22) +800009a4: 004b0b13 addi x22,x22,4 + +800009a8 : +Zknh_sha512sig1l_cg_cp_rs2_b21: + sha512sig1l x23, x31, x21 # perform operation +800009a8: 575f8bb3 sha512sig1l x23,x31,x21 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha512sig1l_cg_cp_rs2_b21, Zknh_sha512sig1l_cg_cp_rs2_b21_str) +800009ac: 000c2203 lw x4,0(x24) +800009b0: 01720863 beq x4,x23,800009c0 +800009b4: 34d042ef jal x5,80005500 +800009b8: 800009a8 .word 0x800009a8 +800009bc: 80009bd5 .word 0x80009bd5 +800009c0: 004c0c13 addi x24,x24,4 + + mv x20, x22 # switch data pointer register to avoid conflict with test +800009c4: 000b0a13 addi x20,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x5701b3e5 +800009c8: 000a2d83 lw x27,0(x20) +800009cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x6c97f15c +800009d0: 000a2b03 lw x22,0(x20) +800009d4: 004a0a13 addi x20,x20,4 + +800009d8 : +Zknh_sha512sig1l_cg_cp_rs2_b22: + sha512sig1l x14, x27, x22 # perform operation +800009d8: 576d8733 sha512sig1l x14,x27,x22 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zknh_sha512sig1l_cg_cp_rs2_b22, Zknh_sha512sig1l_cg_cp_rs2_b22_str) +800009dc: 000c2203 lw x4,0(x24) +800009e0: 00e20863 beq x4,x14,800009f0 +800009e4: 31d042ef jal x5,80005500 +800009e8: 800009d8 .word 0x800009d8 +800009ec: 80009c0f .word 0x80009c0f +800009f0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x97a0d757 +800009f4: 000a2e03 lw x28,0(x20) +800009f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x69ef9213 +800009fc: 000a2b83 lw x23,0(x20) +80000a00: 004a0a13 addi x20,x20,4 + +80000a04 : +Zknh_sha512sig1l_cg_cp_rs2_b23: + sha512sig1l x27, x28, x23 # perform operation +80000a04: 577e0db3 sha512sig1l x27,x28,x23 + # Check if x27 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x27, Zknh_sha512sig1l_cg_cp_rs2_b23, Zknh_sha512sig1l_cg_cp_rs2_b23_str) +80000a08: 000c2203 lw x4,0(x24) +80000a0c: 01b20863 beq x4,x27,80000a1c +80000a10: 2f1042ef jal x5,80005500 +80000a14: 80000a04 .word 0x80000a04 +80000a18: 80009c49 .word 0x80009c49 +80000a1c: 004c0c13 addi x24,x24,4 + + mv x22, x24 # switch signature pointer register to avoid conflict with test +80000a20: 000c0b13 addi x22,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x0c6aa104 +80000a24: 000a2603 lw x12,0(x20) +80000a28: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x2d79469d +80000a2c: 000a2c03 lw x24,0(x20) +80000a30: 004a0a13 addi x20,x20,4 + +80000a34 : +Zknh_sha512sig1l_cg_cp_rs2_b24: + sha512sig1l x1, x12, x24 # perform operation +80000a34: 578600b3 sha512sig1l x1,x12,x24 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig1l_cg_cp_rs2_b24, Zknh_sha512sig1l_cg_cp_rs2_b24_str) +80000a38: 000b2203 lw x4,0(x22) +80000a3c: 00120863 beq x4,x1,80000a4c +80000a40: 2c1042ef jal x5,80005500 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 80009c83 .word 0x80009c83 +80000a4c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xd0564729 +80000a50: 000a2683 lw x13,0(x20) +80000a54: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0xa8183aac +80000a58: 000a2c83 lw x25,0(x20) +80000a5c: 004a0a13 addi x20,x20,4 + +80000a60 : +Zknh_sha512sig1l_cg_cp_rs2_b25: + sha512sig1l x27, x13, x25 # perform operation +80000a60: 57968db3 sha512sig1l x27,x13,x25 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zknh_sha512sig1l_cg_cp_rs2_b25, Zknh_sha512sig1l_cg_cp_rs2_b25_str) +80000a64: 000b2203 lw x4,0(x22) +80000a68: 01b20863 beq x4,x27,80000a78 +80000a6c: 295042ef jal x5,80005500 +80000a70: 80000a60 .word 0x80000a60 +80000a74: 80009cbd .word 0x80009cbd +80000a78: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x140bef55 +80000a7c: 000a2783 lw x15,0(x20) +80000a80: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x5a72f59c +80000a84: 000a2d03 lw x26,0(x20) +80000a88: 004a0a13 addi x20,x20,4 + +80000a8c : +Zknh_sha512sig1l_cg_cp_rs2_b26: + sha512sig1l x23, x15, x26 # perform operation +80000a8c: 57a78bb3 sha512sig1l x23,x15,x26 + # Check if x23 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x23, Zknh_sha512sig1l_cg_cp_rs2_b26, Zknh_sha512sig1l_cg_cp_rs2_b26_str) +80000a90: 000b2203 lw x4,0(x22) +80000a94: 01720863 beq x4,x23,80000aa4 +80000a98: 269042ef jal x5,80005500 +80000a9c: 80000a8c .word 0x80000a8c +80000aa0: 80009cf7 .word 0x80009cf7 +80000aa4: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xe179ca3c +80000aa8: 000a2b83 lw x23,0(x20) +80000aac: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0xf84333b9 +80000ab0: 000a2d83 lw x27,0(x20) +80000ab4: 004a0a13 addi x20,x20,4 + +80000ab8 : +Zknh_sha512sig1l_cg_cp_rs2_b27: + sha512sig1l x26, x23, x27 # perform operation +80000ab8: 57bb8d33 sha512sig1l x26,x23,x27 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zknh_sha512sig1l_cg_cp_rs2_b27, Zknh_sha512sig1l_cg_cp_rs2_b27_str) +80000abc: 000b2203 lw x4,0(x22) +80000ac0: 01a20863 beq x4,x26,80000ad0 +80000ac4: 23d042ef jal x5,80005500 +80000ac8: 80000ab8 .word 0x80000ab8 +80000acc: 80009d31 .word 0x80009d31 +80000ad0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x91b5f244 +80000ad4: 000a2883 lw x17,0(x20) +80000ad8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xc5dd8167 +80000adc: 000a2e03 lw x28,0(x20) +80000ae0: 004a0a13 addi x20,x20,4 + +80000ae4 : +Zknh_sha512sig1l_cg_cp_rs2_b28: + sha512sig1l x13, x17, x28 # perform operation +80000ae4: 57c886b3 sha512sig1l x13,x17,x28 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknh_sha512sig1l_cg_cp_rs2_b28, Zknh_sha512sig1l_cg_cp_rs2_b28_str) +80000ae8: 000b2203 lw x4,0(x22) +80000aec: 00d20863 beq x4,x13,80000afc +80000af0: 211042ef jal x5,80005500 +80000af4: 80000ae4 .word 0x80000ae4 +80000af8: 80009d6b .word 0x80009d6b +80000afc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x999acda5 +80000b00: 000a2303 lw x6,0(x20) +80000b04: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xa6d70569 +80000b08: 000a2e83 lw x29,0(x20) +80000b0c: 004a0a13 addi x20,x20,4 + +80000b10 : +Zknh_sha512sig1l_cg_cp_rs2_b29: + sha512sig1l x21, x6, x29 # perform operation +80000b10: 57d30ab3 sha512sig1l x21,x6,x29 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zknh_sha512sig1l_cg_cp_rs2_b29, Zknh_sha512sig1l_cg_cp_rs2_b29_str) +80000b14: 000b2203 lw x4,0(x22) +80000b18: 01520863 beq x4,x21,80000b28 +80000b1c: 1e5042ef jal x5,80005500 +80000b20: 80000b10 .word 0x80000b10 +80000b24: 80009da5 .word 0x80009da5 +80000b28: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x2471c258 +80000b2c: 000a2f83 lw x31,0(x20) +80000b30: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0xd1d964d6 +80000b34: 000a2f03 lw x30,0(x20) +80000b38: 004a0a13 addi x20,x20,4 + +80000b3c : +Zknh_sha512sig1l_cg_cp_rs2_b30: + sha512sig1l x3, x31, x30 # perform operation +80000b3c: 57ef81b3 sha512sig1l x3,x31,x30 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sig1l_cg_cp_rs2_b30, Zknh_sha512sig1l_cg_cp_rs2_b30_str) +80000b40: 000b2203 lw x4,0(x22) +80000b44: 00320863 beq x4,x3,80000b54 +80000b48: 1b9042ef jal x5,80005500 +80000b4c: 80000b3c .word 0x80000b3c +80000b50: 80009ddf .word 0x80009ddf +80000b54: 004b0b13 addi x22,x22,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x24c45687 +80000b58: 000a2e03 lw x28,0(x20) +80000b5c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x22ef34da +80000b60: 000a2f83 lw x31,0(x20) +80000b64: 004a0a13 addi x20,x20,4 + +80000b68 : +Zknh_sha512sig1l_cg_cp_rs2_b31: + sha512sig1l x19, x28, x31 # perform operation +80000b68: 57fe09b3 sha512sig1l x19,x28,x31 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sig1l_cg_cp_rs2_b31, Zknh_sha512sig1l_cg_cp_rs2_b31_str) +80000b6c: 000b2203 lw x4,0(x22) +80000b70: 01320863 beq x4,x19,80000b80 +80000b74: 18d042ef jal x5,80005500 +80000b78: 80000b68 .word 0x80000b68 +80000b7c: 80009e19 .word 0x80009e19 +80000b80: 004b0b13 addi x22,x22,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xe0c16ab5 +80000b84: 000a2603 lw x12,0(x20) +80000b88: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x3b97463f +80000b8c: 000a2b83 lw x23,0(x20) +80000b90: 004a0a13 addi x20,x20,4 + +80000b94 : +Zknh_sha512sig1l_cg_cp_rd_b0: + sha512sig1l x0, x12, x23 # perform operation +80000b94: 57760033 sha512sig1l x0,x12,x23 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zknh_sha512sig1l_cg_cp_rd_b0, Zknh_sha512sig1l_cg_cp_rd_b0_str) +80000b98: 000b2203 lw x4,0(x22) +80000b9c: 00020863 beq x4,x0,80000bac +80000ba0: 161042ef jal x5,80005500 +80000ba4: 80000b94 .word 0x80000b94 +80000ba8: 80009e53 .word 0x80009e53 +80000bac: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x5aab711a +80000bb0: 000a2603 lw x12,0(x20) +80000bb4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x47dd018d +80000bb8: 000a2103 lw x2,0(x20) +80000bbc: 004a0a13 addi x20,x20,4 + +80000bc0 : +Zknh_sha512sig1l_cg_cp_rd_b1: + sha512sig1l x1, x12, x2 # perform operation +80000bc0: 562600b3 sha512sig1l x1,x12,x2 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig1l_cg_cp_rd_b1, Zknh_sha512sig1l_cg_cp_rd_b1_str) +80000bc4: 000b2203 lw x4,0(x22) +80000bc8: 00120863 beq x4,x1,80000bd8 +80000bcc: 135042ef jal x5,80005500 +80000bd0: 80000bc0 .word 0x80000bc0 +80000bd4: 80009e8b .word 0x80009e8b +80000bd8: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x3da7cac2 +80000bdc: 000a2483 lw x9,0(x20) +80000be0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x8cd5459e +80000be4: 000a2d03 lw x26,0(x20) +80000be8: 004a0a13 addi x20,x20,4 + +80000bec : +Zknh_sha512sig1l_cg_cp_rd_b2: + sha512sig1l x2, x9, x26 # perform operation +80000bec: 57a48133 sha512sig1l x2,x9,x26 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sig1l_cg_cp_rd_b2, Zknh_sha512sig1l_cg_cp_rd_b2_str) +80000bf0: 000b2203 lw x4,0(x22) +80000bf4: 00220863 beq x4,x2,80000c04 +80000bf8: 109042ef jal x5,80005500 +80000bfc: 80000bec .word 0x80000bec +80000c00: 80009ec3 .word 0x80009ec3 +80000c04: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xa36f83d4 +80000c08: 000a2f83 lw x31,0(x20) +80000c0c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x33ee2556 +80000c10: 000a2d03 lw x26,0(x20) +80000c14: 004a0a13 addi x20,x20,4 + +80000c18 : +Zknh_sha512sig1l_cg_cp_rd_b3: + sha512sig1l x3, x31, x26 # perform operation +80000c18: 57af81b3 sha512sig1l x3,x31,x26 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sig1l_cg_cp_rd_b3, Zknh_sha512sig1l_cg_cp_rd_b3_str) +80000c1c: 000b2203 lw x4,0(x22) +80000c20: 00320863 beq x4,x3,80000c30 +80000c24: 0dd042ef jal x5,80005500 +80000c28: 80000c18 .word 0x80000c18 +80000c2c: 80009efb .word 0x80009efb +80000c30: 004b0b13 addi x22,x22,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c34: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c38: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xe5ef6a7c +80000c3c: 000a2083 lw x1,0(x20) +80000c40: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x9dc63163 +80000c44: 000a2183 lw x3,0(x20) +80000c48: 004a0a13 addi x20,x20,4 + +80000c4c : +Zknh_sha512sig1l_cg_cp_rd_b4: + sha512sig1l x4, x1, x3 # perform operation +80000c4c: 56308233 sha512sig1l x4,x1,x3 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zknh_sha512sig1l_cg_cp_rd_b4, Zknh_sha512sig1l_cg_cp_rd_b4_str) +80000c50: 000b2383 lw x7,0(x22) +80000c54: 00438863 beq x7,x4,80000c64 +80000c58: 0c10446f jal x8,80005518 +80000c5c: 80000c4c .word 0x80000c4c +80000c60: 80009f33 .word 0x80009f33 +80000c64: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x03aef9c1 +80000c68: 000a2c83 lw x25,0(x20) +80000c6c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x2f9b5e50 +80000c70: 000a2303 lw x6,0(x20) +80000c74: 004a0a13 addi x20,x20,4 + +80000c78 : +Zknh_sha512sig1l_cg_cp_rd_b5: + sha512sig1l x5, x25, x6 # perform operation +80000c78: 566c82b3 sha512sig1l x5,x25,x6 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zknh_sha512sig1l_cg_cp_rd_b5, Zknh_sha512sig1l_cg_cp_rd_b5_str) +80000c7c: 000b2383 lw x7,0(x22) +80000c80: 00538863 beq x7,x5,80000c90 +80000c84: 0950446f jal x8,80005518 +80000c88: 80000c78 .word 0x80000c78 +80000c8c: 80009f6b .word 0x80009f6b +80000c90: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x4b38b7ec +80000c94: 000a2083 lw x1,0(x20) +80000c98: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x42e5c44d +80000c9c: 000a2203 lw x4,0(x20) +80000ca0: 004a0a13 addi x20,x20,4 + +80000ca4 : +Zknh_sha512sig1l_cg_cp_rd_b6: + sha512sig1l x6, x1, x4 # perform operation +80000ca4: 56408333 sha512sig1l x6,x1,x4 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zknh_sha512sig1l_cg_cp_rd_b6, Zknh_sha512sig1l_cg_cp_rd_b6_str) +80000ca8: 000b2383 lw x7,0(x22) +80000cac: 00638863 beq x7,x6,80000cbc +80000cb0: 0690446f jal x8,80005518 +80000cb4: 80000ca4 .word 0x80000ca4 +80000cb8: 80009fa3 .word 0x80009fa3 +80000cbc: 004b0b13 addi x22,x22,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cc0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cc4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x6f997355 +80000cc8: 000a2d03 lw x26,0(x20) +80000ccc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xa3d17972 +80000cd0: 000a2583 lw x11,0(x20) +80000cd4: 004a0a13 addi x20,x20,4 + +80000cd8 : +Zknh_sha512sig1l_cg_cp_rd_b7: + sha512sig1l x7, x26, x11 # perform operation +80000cd8: 56bd03b3 sha512sig1l x7,x26,x11 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sig1l_cg_cp_rd_b7, Zknh_sha512sig1l_cg_cp_rd_b7_str) +80000cdc: 000b2683 lw x13,0(x22) +80000ce0: 00768863 beq x13,x7,80000cf0 +80000ce4: 05d0476f jal x14,80005540 +80000ce8: 80000cd8 .word 0x80000cd8 +80000cec: 80009fdb .word 0x80009fdb +80000cf0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0xaff07f47 +80000cf4: 000a2003 lw x0,0(x20) +80000cf8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x7d1283b7 +80000cfc: 000a2103 lw x2,0(x20) +80000d00: 004a0a13 addi x20,x20,4 + +80000d04 : +Zknh_sha512sig1l_cg_cp_rd_b8: + sha512sig1l x8, x0, x2 # perform operation +80000d04: 56200433 sha512sig1l x8,x0,x2 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig1l_cg_cp_rd_b8, Zknh_sha512sig1l_cg_cp_rd_b8_str) +80000d08: 000b2683 lw x13,0(x22) +80000d0c: 00868863 beq x13,x8,80000d1c +80000d10: 0310476f jal x14,80005540 +80000d14: 80000d04 .word 0x80000d04 +80000d18: 8000a013 .word 0x8000a013 +80000d1c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x78cd10b0 +80000d20: 000a2f83 lw x31,0(x20) +80000d24: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x3211508e +80000d28: 000a2c83 lw x25,0(x20) +80000d2c: 004a0a13 addi x20,x20,4 + +80000d30 : +Zknh_sha512sig1l_cg_cp_rd_b9: + sha512sig1l x9, x31, x25 # perform operation +80000d30: 579f84b3 sha512sig1l x9,x31,x25 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sig1l_cg_cp_rd_b9, Zknh_sha512sig1l_cg_cp_rd_b9_str) +80000d34: 000b2683 lw x13,0(x22) +80000d38: 00968863 beq x13,x9,80000d48 +80000d3c: 0050476f jal x14,80005540 +80000d40: 80000d30 .word 0x80000d30 +80000d44: 8000a04b .word 0x8000a04b +80000d48: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xb9967204 +80000d4c: 000a2f03 lw x30,0(x20) +80000d50: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xad46ad05 +80000d54: 000a2e83 lw x29,0(x20) +80000d58: 004a0a13 addi x20,x20,4 + +80000d5c : +Zknh_sha512sig1l_cg_cp_rd_b10: + sha512sig1l x10, x30, x29 # perform operation +80000d5c: 57df0533 sha512sig1l x10,x30,x29 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sig1l_cg_cp_rd_b10, Zknh_sha512sig1l_cg_cp_rd_b10_str) +80000d60: 000b2683 lw x13,0(x22) +80000d64: 00a68863 beq x13,x10,80000d74 +80000d68: 7d80476f jal x14,80005540 +80000d6c: 80000d5c .word 0x80000d5c +80000d70: 8000a083 .word 0x8000a083 +80000d74: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x936b4823 +80000d78: 000a2b83 lw x23,0(x20) +80000d7c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xf15d9bb5 +80000d80: 000a2203 lw x4,0(x20) +80000d84: 004a0a13 addi x20,x20,4 + +80000d88 : +Zknh_sha512sig1l_cg_cp_rd_b11: + sha512sig1l x11, x23, x4 # perform operation +80000d88: 564b85b3 sha512sig1l x11,x23,x4 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sig1l_cg_cp_rd_b11, Zknh_sha512sig1l_cg_cp_rd_b11_str) +80000d8c: 000b2683 lw x13,0(x22) +80000d90: 00b68863 beq x13,x11,80000da0 +80000d94: 7ac0476f jal x14,80005540 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 8000a0bc .word 0x8000a0bc +80000da0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x068522f3 +80000da4: 000a2b83 lw x23,0(x20) +80000da8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xbe7a6ad3 +80000dac: 000a2d03 lw x26,0(x20) +80000db0: 004a0a13 addi x20,x20,4 + +80000db4 : +Zknh_sha512sig1l_cg_cp_rd_b12: + sha512sig1l x12, x23, x26 # perform operation +80000db4: 57ab8633 sha512sig1l x12,x23,x26 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sig1l_cg_cp_rd_b12, Zknh_sha512sig1l_cg_cp_rd_b12_str) +80000db8: 000b2683 lw x13,0(x22) +80000dbc: 00c68863 beq x13,x12,80000dcc +80000dc0: 7800476f jal x14,80005540 +80000dc4: 80000db4 .word 0x80000db4 +80000dc8: 8000a0f5 .word 0x8000a0f5 +80000dcc: 004b0b13 addi x22,x22,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000dd0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000dd4: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x9ee234ea +80000dd8: 000a2c83 lw x25,0(x20) +80000ddc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x8cd400ed +80000de0: 000a2c03 lw x24,0(x20) +80000de4: 004a0a13 addi x20,x20,4 + +80000de8 : +Zknh_sha512sig1l_cg_cp_rd_b13: + sha512sig1l x13, x25, x24 # perform operation +80000de8: 578c86b3 sha512sig1l x13,x25,x24 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zknh_sha512sig1l_cg_cp_rd_b13, Zknh_sha512sig1l_cg_cp_rd_b13_str) +80000dec: 000b2383 lw x7,0(x22) +80000df0: 00d38863 beq x7,x13,80000e00 +80000df4: 7240446f jal x8,80005518 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 8000a12e .word 0x8000a12e +80000e00: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x3f41a53d +80000e04: 000a2c83 lw x25,0(x20) +80000e08: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xf9a888b4 +80000e0c: 000a2803 lw x16,0(x20) +80000e10: 004a0a13 addi x20,x20,4 + +80000e14 : +Zknh_sha512sig1l_cg_cp_rd_b14: + sha512sig1l x14, x25, x16 # perform operation +80000e14: 570c8733 sha512sig1l x14,x25,x16 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zknh_sha512sig1l_cg_cp_rd_b14, Zknh_sha512sig1l_cg_cp_rd_b14_str) +80000e18: 000b2383 lw x7,0(x22) +80000e1c: 00e38863 beq x7,x14,80000e2c +80000e20: 6f80446f jal x8,80005518 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 8000a167 .word 0x8000a167 +80000e2c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xd8eaa905 +80000e30: 000a2f83 lw x31,0(x20) +80000e34: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xc651a0a3 +80000e38: 000a2e03 lw x28,0(x20) +80000e3c: 004a0a13 addi x20,x20,4 + +80000e40 : +Zknh_sha512sig1l_cg_cp_rd_b15: + sha512sig1l x15, x31, x28 # perform operation +80000e40: 57cf87b3 sha512sig1l x15,x31,x28 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zknh_sha512sig1l_cg_cp_rd_b15, Zknh_sha512sig1l_cg_cp_rd_b15_str) +80000e44: 000b2383 lw x7,0(x22) +80000e48: 00f38863 beq x7,x15,80000e58 +80000e4c: 6cc0446f jal x8,80005518 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 8000a1a0 .word 0x8000a1a0 +80000e58: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x450dd1cf +80000e5c: 000a2d83 lw x27,0(x20) +80000e60: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x9d9593f7 +80000e64: 000a2203 lw x4,0(x20) +80000e68: 004a0a13 addi x20,x20,4 + +80000e6c : +Zknh_sha512sig1l_cg_cp_rd_b16: + sha512sig1l x16, x27, x4 # perform operation +80000e6c: 564d8833 sha512sig1l x16,x27,x4 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zknh_sha512sig1l_cg_cp_rd_b16, Zknh_sha512sig1l_cg_cp_rd_b16_str) +80000e70: 000b2383 lw x7,0(x22) +80000e74: 01038863 beq x7,x16,80000e84 +80000e78: 6a00446f jal x8,80005518 +80000e7c: 80000e6c .word 0x80000e6c +80000e80: 8000a1d9 .word 0x8000a1d9 +80000e84: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x85c0f945 +80000e88: 000a2503 lw x10,0(x20) +80000e8c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xe7391ec9 +80000e90: 000a2483 lw x9,0(x20) +80000e94: 004a0a13 addi x20,x20,4 + +80000e98 : +Zknh_sha512sig1l_cg_cp_rd_b17: + sha512sig1l x17, x10, x9 # perform operation +80000e98: 569508b3 sha512sig1l x17,x10,x9 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknh_sha512sig1l_cg_cp_rd_b17, Zknh_sha512sig1l_cg_cp_rd_b17_str) +80000e9c: 000b2383 lw x7,0(x22) +80000ea0: 01138863 beq x7,x17,80000eb0 +80000ea4: 6740446f jal x8,80005518 +80000ea8: 80000e98 .word 0x80000e98 +80000eac: 8000a212 .word 0x8000a212 +80000eb0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x9fc9d198 +80000eb4: 000a2603 lw x12,0(x20) +80000eb8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x6f57df03 +80000ebc: 000a2783 lw x15,0(x20) +80000ec0: 004a0a13 addi x20,x20,4 + +80000ec4 : +Zknh_sha512sig1l_cg_cp_rd_b18: + sha512sig1l x18, x12, x15 # perform operation +80000ec4: 56f60933 sha512sig1l x18,x12,x15 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1l_cg_cp_rd_b18, Zknh_sha512sig1l_cg_cp_rd_b18_str) +80000ec8: 000b2383 lw x7,0(x22) +80000ecc: 01238863 beq x7,x18,80000edc +80000ed0: 6480446f jal x8,80005518 +80000ed4: 80000ec4 .word 0x80000ec4 +80000ed8: 8000a24b .word 0x8000a24b +80000edc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x4b4c8dce +80000ee0: 000a2203 lw x4,0(x20) +80000ee4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xc3461050 +80000ee8: 000a2883 lw x17,0(x20) +80000eec: 004a0a13 addi x20,x20,4 + +80000ef0 : +Zknh_sha512sig1l_cg_cp_rd_b19: + sha512sig1l x19, x4, x17 # perform operation +80000ef0: 571209b3 sha512sig1l x19,x4,x17 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zknh_sha512sig1l_cg_cp_rd_b19, Zknh_sha512sig1l_cg_cp_rd_b19_str) +80000ef4: 000b2383 lw x7,0(x22) +80000ef8: 01338863 beq x7,x19,80000f08 +80000efc: 61c0446f jal x8,80005518 +80000f00: 80000ef0 .word 0x80000ef0 +80000f04: 8000a284 .word 0x8000a284 +80000f08: 004b0b13 addi x22,x22,4 + + mv x12, x20 # switch data pointer register to avoid conflict with test +80000f0c: 000a0613 addi x12,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xdecf04ad +80000f10: 00062a83 lw x21,0(x12) +80000f14: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x0985c455 +80000f18: 00062183 lw x3,0(x12) +80000f1c: 00460613 addi x12,x12,4 + +80000f20 : +Zknh_sha512sig1l_cg_cp_rd_b20: + sha512sig1l x20, x21, x3 # perform operation +80000f20: 563a8a33 sha512sig1l x20,x21,x3 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zknh_sha512sig1l_cg_cp_rd_b20, Zknh_sha512sig1l_cg_cp_rd_b20_str) +80000f24: 000b2383 lw x7,0(x22) +80000f28: 01438863 beq x7,x20,80000f38 +80000f2c: 5ec0446f jal x8,80005518 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000a2bd .word 0x8000a2bd +80000f38: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xf9c2d716 +80000f3c: 00062703 lw x14,0(x12) +80000f40: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x59feb9a9 +80000f44: 00062683 lw x13,0(x12) +80000f48: 00460613 addi x12,x12,4 + +80000f4c : +Zknh_sha512sig1l_cg_cp_rd_b21: + sha512sig1l x21, x14, x13 # perform operation +80000f4c: 56d70ab3 sha512sig1l x21,x14,x13 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rd_b21, Zknh_sha512sig1l_cg_cp_rd_b21_str) +80000f50: 000b2383 lw x7,0(x22) +80000f54: 01538863 beq x7,x21,80000f64 +80000f58: 5c00446f jal x8,80005518 +80000f5c: 80000f4c .word 0x80000f4c +80000f60: 8000a2f6 .word 0x8000a2f6 +80000f64: 004b0b13 addi x22,x22,4 + + mv x31, x22 # switch signature pointer register to avoid conflict with test +80000f68: 000b0f93 addi x31,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x441fcf02 +80000f6c: 00062703 lw x14,0(x12) +80000f70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xff1f3aef +80000f74: 00062083 lw x1,0(x12) +80000f78: 00460613 addi x12,x12,4 + +80000f7c : +Zknh_sha512sig1l_cg_cp_rd_b22: + sha512sig1l x22, x14, x1 # perform operation +80000f7c: 56170b33 sha512sig1l x22,x14,x1 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zknh_sha512sig1l_cg_cp_rd_b22, Zknh_sha512sig1l_cg_cp_rd_b22_str) +80000f80: 000fa383 lw x7,0(x31) +80000f84: 01638863 beq x7,x22,80000f94 +80000f88: 5900446f jal x8,80005518 +80000f8c: 80000f7c .word 0x80000f7c +80000f90: 8000a32f .word 0x8000a32f +80000f94: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x2a024a6d +80000f98: 00062f03 lw x30,0(x12) +80000f9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x8bef67ad +80000fa0: 00062783 lw x15,0(x12) +80000fa4: 00460613 addi x12,x12,4 + +80000fa8 : +Zknh_sha512sig1l_cg_cp_rd_b23: + sha512sig1l x23, x30, x15 # perform operation +80000fa8: 56ff0bb3 sha512sig1l x23,x30,x15 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zknh_sha512sig1l_cg_cp_rd_b23, Zknh_sha512sig1l_cg_cp_rd_b23_str) +80000fac: 000fa383 lw x7,0(x31) +80000fb0: 01738863 beq x7,x23,80000fc0 +80000fb4: 5640446f jal x8,80005518 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 8000a368 .word 0x8000a368 +80000fc0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xe1703333 +80000fc4: 00062803 lw x16,0(x12) +80000fc8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xe5c0b1b3 +80000fcc: 00062e83 lw x29,0(x12) +80000fd0: 00460613 addi x12,x12,4 + +80000fd4 : +Zknh_sha512sig1l_cg_cp_rd_b24: + sha512sig1l x24, x16, x29 # perform operation +80000fd4: 57d80c33 sha512sig1l x24,x16,x29 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zknh_sha512sig1l_cg_cp_rd_b24, Zknh_sha512sig1l_cg_cp_rd_b24_str) +80000fd8: 000fa383 lw x7,0(x31) +80000fdc: 01838863 beq x7,x24,80000fec +80000fe0: 5380446f jal x8,80005518 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000a3a1 .word 0x8000a3a1 +80000fec: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7f101c97 +80000ff0: 00062b83 lw x23,0(x12) +80000ff4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xfcd5e1df +80000ff8: 00062083 lw x1,0(x12) +80000ffc: 00460613 addi x12,x12,4 + +80001000 : +Zknh_sha512sig1l_cg_cp_rd_b25: + sha512sig1l x25, x23, x1 # perform operation +80001000: 561b8cb3 sha512sig1l x25,x23,x1 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zknh_sha512sig1l_cg_cp_rd_b25, Zknh_sha512sig1l_cg_cp_rd_b25_str) +80001004: 000fa383 lw x7,0(x31) +80001008: 01938863 beq x7,x25,80001018 +8000100c: 50c0446f jal x8,80005518 +80001010: 80001000 .word 0x80001000 +80001014: 8000a3da .word 0x8000a3da +80001018: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xa5b4c9e3 +8000101c: 00062703 lw x14,0(x12) +80001020: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xa1a7311d +80001024: 00062903 lw x18,0(x12) +80001028: 00460613 addi x12,x12,4 + +8000102c : +Zknh_sha512sig1l_cg_cp_rd_b26: + sha512sig1l x26, x14, x18 # perform operation +8000102c: 57270d33 sha512sig1l x26,x14,x18 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zknh_sha512sig1l_cg_cp_rd_b26, Zknh_sha512sig1l_cg_cp_rd_b26_str) +80001030: 000fa383 lw x7,0(x31) +80001034: 01a38863 beq x7,x26,80001044 +80001038: 4e00446f jal x8,80005518 +8000103c: 8000102c .word 0x8000102c +80001040: 8000a413 .word 0x8000a413 +80001044: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x6e5447a3 +80001048: 00062303 lw x6,0(x12) +8000104c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xbfc38987 +80001050: 00062203 lw x4,0(x12) +80001054: 00460613 addi x12,x12,4 + +80001058 : +Zknh_sha512sig1l_cg_cp_rd_b27: + sha512sig1l x27, x6, x4 # perform operation +80001058: 56430db3 sha512sig1l x27,x6,x4 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zknh_sha512sig1l_cg_cp_rd_b27, Zknh_sha512sig1l_cg_cp_rd_b27_str) +8000105c: 000fa383 lw x7,0(x31) +80001060: 01b38863 beq x7,x27,80001070 +80001064: 4b40446f jal x8,80005518 +80001068: 80001058 .word 0x80001058 +8000106c: 8000a44c .word 0x8000a44c +80001070: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x2e37555a +80001074: 00062503 lw x10,0(x12) +80001078: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x3f2e876b +8000107c: 00062c83 lw x25,0(x12) +80001080: 00460613 addi x12,x12,4 + +80001084 : +Zknh_sha512sig1l_cg_cp_rd_b28: + sha512sig1l x28, x10, x25 # perform operation +80001084: 57950e33 sha512sig1l x28,x10,x25 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zknh_sha512sig1l_cg_cp_rd_b28, Zknh_sha512sig1l_cg_cp_rd_b28_str) +80001088: 000fa383 lw x7,0(x31) +8000108c: 01c38863 beq x7,x28,8000109c +80001090: 4880446f jal x8,80005518 +80001094: 80001084 .word 0x80001084 +80001098: 8000a485 .word 0x8000a485 +8000109c: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x758165cb +800010a0: 00062d83 lw x27,0(x12) +800010a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x56bd7622 +800010a8: 00062103 lw x2,0(x12) +800010ac: 00460613 addi x12,x12,4 + +800010b0 : +Zknh_sha512sig1l_cg_cp_rd_b29: + sha512sig1l x29, x27, x2 # perform operation +800010b0: 562d8eb3 sha512sig1l x29,x27,x2 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zknh_sha512sig1l_cg_cp_rd_b29, Zknh_sha512sig1l_cg_cp_rd_b29_str) +800010b4: 000fa383 lw x7,0(x31) +800010b8: 01d38863 beq x7,x29,800010c8 +800010bc: 45c0446f jal x8,80005518 +800010c0: 800010b0 .word 0x800010b0 +800010c4: 8000a4be .word 0x8000a4be +800010c8: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x65abd9cb +800010cc: 00062003 lw x0,0(x12) +800010d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xef71460a +800010d4: 00062703 lw x14,0(x12) +800010d8: 00460613 addi x12,x12,4 + +800010dc : +Zknh_sha512sig1l_cg_cp_rd_b30: + sha512sig1l x30, x0, x14 # perform operation +800010dc: 56e00f33 sha512sig1l x30,x0,x14 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zknh_sha512sig1l_cg_cp_rd_b30, Zknh_sha512sig1l_cg_cp_rd_b30_str) +800010e0: 000fa383 lw x7,0(x31) +800010e4: 01e38863 beq x7,x30,800010f4 +800010e8: 4300446f jal x8,80005518 +800010ec: 800010dc .word 0x800010dc +800010f0: 8000a4f7 .word 0x8000a4f7 +800010f4: 004f8f93 addi x31,x31,4 + + mv x30, x31 # switch signature pointer register to avoid conflict with test +800010f8: 000f8f13 addi x30,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x1d3ee918 +800010fc: 00062883 lw x17,0(x12) +80001100: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xe639499a +80001104: 00062183 lw x3,0(x12) +80001108: 00460613 addi x12,x12,4 + +8000110c : +Zknh_sha512sig1l_cg_cp_rd_b31: + sha512sig1l x31, x17, x3 # perform operation +8000110c: 56388fb3 sha512sig1l x31,x17,x3 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zknh_sha512sig1l_cg_cp_rd_b31, Zknh_sha512sig1l_cg_cp_rd_b31_str) +80001110: 000f2383 lw x7,0(x30) +80001114: 01f38863 beq x7,x31,80001124 +80001118: 4000446f jal x8,80005518 +8000111c: 8000110c .word 0x8000110c +80001120: 8000a530 .word 0x8000a530 +80001124: 004f0f13 addi x30,x30,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x00000000 +80001128: 00062783 lw x15,0(x12) +8000112c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xfcde8065 +80001130: 00062b03 lw x22,0(x12) +80001134: 00460613 addi x12,x12,4 + +80001138 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x0: + sha512sig1l x28, x15, x22 # perform operation +80001138: 57678e33 sha512sig1l x28,x15,x22 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknh_sha512sig1l_cg_cp_rs1_edges_0x0, Zknh_sha512sig1l_cg_cp_rs1_edges_0x0_str) +8000113c: 000f2383 lw x7,0(x30) +80001140: 01c38863 beq x7,x28,80001150 +80001144: 3d40446f jal x8,80005518 +80001148: 80001138 .word 0x80001138 +8000114c: 8000a569 .word 0x8000a569 +80001150: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x00000001 +80001154: 00062e03 lw x28,0(x12) +80001158: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x9dedfb9f +8000115c: 00062f83 lw x31,0(x12) +80001160: 00460613 addi x12,x12,4 + +80001164 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x1: + sha512sig1l x11, x28, x31 # perform operation +80001164: 57fe05b3 sha512sig1l x11,x28,x31 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cp_rs1_edges_0x1, Zknh_sha512sig1l_cg_cp_rs1_edges_0x1_str) +80001168: 000f2383 lw x7,0(x30) +8000116c: 00b38863 beq x7,x11,8000117c +80001170: 3a80446f jal x8,80005518 +80001174: 80001164 .word 0x80001164 +80001178: 8000a5a9 .word 0x8000a5a9 +8000117c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x00000002 +80001180: 00062e03 lw x28,0(x12) +80001184: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xfd20e78e +80001188: 00062883 lw x17,0(x12) +8000118c: 00460613 addi x12,x12,4 + +80001190 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x2: + sha512sig1l x20, x28, x17 # perform operation +80001190: 571e0a33 sha512sig1l x20,x28,x17 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cp_rs1_edges_0x2, Zknh_sha512sig1l_cg_cp_rs1_edges_0x2_str) +80001194: 000f2383 lw x7,0(x30) +80001198: 01438863 beq x7,x20,800011a8 +8000119c: 37c0446f jal x8,80005518 +800011a0: 80001190 .word 0x80001190 +800011a4: 8000a5e9 .word 0x8000a5e9 +800011a8: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x80000000 +800011ac: 00062083 lw x1,0(x12) +800011b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x5dd4b832 +800011b4: 00062103 lw x2,0(x12) +800011b8: 00460613 addi x12,x12,4 + +800011bc : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000000: + sha512sig1l x21, x1, x2 # perform operation +800011bc: 56208ab3 sha512sig1l x21,x1,x2 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000000, Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000000_str) +800011c0: 000f2383 lw x7,0(x30) +800011c4: 01538863 beq x7,x21,800011d4 +800011c8: 3500446f jal x8,80005518 +800011cc: 800011bc .word 0x800011bc +800011d0: 8000a629 .word 0x8000a629 +800011d4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000001 +800011d8: 00062903 lw x18,0(x12) +800011dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xb2a057df +800011e0: 00062d83 lw x27,0(x12) +800011e4: 00460613 addi x12,x12,4 + +800011e8 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000001: + sha512sig1l x25, x18, x27 # perform operation +800011e8: 57b90cb3 sha512sig1l x25,x18,x27 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000001, Zknh_sha512sig1l_cg_cp_rs1_edges_0x80000001_str) +800011ec: 000f2383 lw x7,0(x30) +800011f0: 01938863 beq x7,x25,80001200 +800011f4: 3240446f jal x8,80005518 +800011f8: 800011e8 .word 0x800011e8 +800011fc: 8000a671 .word 0x8000a671 +80001200: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x7fffffff +80001204: 00062d03 lw x26,0(x12) +80001208: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x8be95302 +8000120c: 00062e03 lw x28,0(x12) +80001210: 00460613 addi x12,x12,4 + +80001214 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x7fffffff: + sha512sig1l x24, x26, x28 # perform operation +80001214: 57cd0c33 sha512sig1l x24,x26,x28 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sig1l_cg_cp_rs1_edges_0x7fffffff_str) +80001218: 000f2383 lw x7,0(x30) +8000121c: 01838863 beq x7,x24,8000122c +80001220: 2f80446f jal x8,80005518 +80001224: 80001214 .word 0x80001214 +80001228: 8000a6b9 .word 0x8000a6b9 +8000122c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7ffffffe +80001230: 00062083 lw x1,0(x12) +80001234: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x12314dd2 +80001238: 00062d83 lw x27,0(x12) +8000123c: 00460613 addi x12,x12,4 + +80001240 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x7ffffffe: + sha512sig1l x29, x1, x27 # perform operation +80001240: 57b08eb3 sha512sig1l x29,x1,x27 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sig1l_cg_cp_rs1_edges_0x7ffffffe_str) +80001244: 000f2383 lw x7,0(x30) +80001248: 01d38863 beq x7,x29,80001258 +8000124c: 2cc0446f jal x8,80005518 +80001250: 80001240 .word 0x80001240 +80001254: 8000a701 .word 0x8000a701 +80001258: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xffffffff +8000125c: 00062e83 lw x29,0(x12) +80001260: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xf7792342 +80001264: 00062803 lw x16,0(x12) +80001268: 00460613 addi x12,x12,4 + +8000126c : +Zknh_sha512sig1l_cg_cp_rs1_edges_0xffffffff: + sha512sig1l x3, x29, x16 # perform operation +8000126c: 570e81b3 sha512sig1l x3,x29,x16 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig1l_cg_cp_rs1_edges_0xffffffff_str) +80001270: 000f2383 lw x7,0(x30) +80001274: 00338863 beq x7,x3,80001284 +80001278: 2a00446f jal x8,80005518 +8000127c: 8000126c .word 0x8000126c +80001280: 8000a749 .word 0x8000a749 +80001284: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xfffffffe +80001288: 00062f83 lw x31,0(x12) +8000128c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xf9ec7a0b +80001290: 00062503 lw x10,0(x12) +80001294: 00460613 addi x12,x12,4 + +80001298 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0xfffffffe: + sha512sig1l x2, x31, x10 # perform operation +80001298: 56af8133 sha512sig1l x2,x31,x10 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig1l_cg_cp_rs1_edges_0xfffffffe_str) +8000129c: 000f2383 lw x7,0(x30) +800012a0: 00238863 beq x7,x2,800012b0 +800012a4: 2740446f jal x8,80005518 +800012a8: 80001298 .word 0x80001298 +800012ac: 8000a791 .word 0x8000a791 +800012b0: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x5bbc8872 +800012b4: 00062f83 lw x31,0(x12) +800012b8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x4d989102 +800012bc: 00062d83 lw x27,0(x12) +800012c0: 00460613 addi x12,x12,4 + +800012c4 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x5bbc8872: + sha512sig1l x16, x31, x27 # perform operation +800012c4: 57bf8833 sha512sig1l x16,x31,x27 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknh_sha512sig1l_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sig1l_cg_cp_rs1_edges_0x5bbc8872_str) +800012c8: 000f2383 lw x7,0(x30) +800012cc: 01038863 beq x7,x16,800012dc +800012d0: 2480446f jal x8,80005518 +800012d4: 800012c4 .word 0x800012c4 +800012d8: 8000a7d9 .word 0x8000a7d9 +800012dc: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xaaaaaaaa +800012e0: 00062583 lw x11,0(x12) +800012e4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x89027ded +800012e8: 00062b83 lw x23,0(x12) +800012ec: 00460613 addi x12,x12,4 + +800012f0 : +Zknh_sha512sig1l_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sig1l x21, x11, x23 # perform operation +800012f0: 57758ab3 sha512sig1l x21,x11,x23 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sig1l_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f4: 000f2383 lw x7,0(x30) +800012f8: 01538863 beq x7,x21,80001308 +800012fc: 21c0446f jal x8,80005518 +80001300: 800012f0 .word 0x800012f0 +80001304: 8000a821 .word 0x8000a821 +80001308: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x55555555 +8000130c: 00062c03 lw x24,0(x12) +80001310: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x2c5f0197 +80001314: 00062783 lw x15,0(x12) +80001318: 00460613 addi x12,x12,4 + +8000131c : +Zknh_sha512sig1l_cg_cp_rs1_edges_0x55555555: + sha512sig1l x26, x24, x15 # perform operation +8000131c: 56fc0d33 sha512sig1l x26,x24,x15 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cp_rs1_edges_0x55555555, Zknh_sha512sig1l_cg_cp_rs1_edges_0x55555555_str) +80001320: 000f2383 lw x7,0(x30) +80001324: 01a38863 beq x7,x26,80001334 +80001328: 1f00446f jal x8,80005518 +8000132c: 8000131c .word 0x8000131c +80001330: 8000a869 .word 0x8000a869 +80001334: 004f0f13 addi x30,x30,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x7b4924c1 +80001338: 00062903 lw x18,0(x12) +8000133c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x00000000 +80001340: 00062983 lw x19,0(x12) +80001344: 00460613 addi x12,x12,4 + +80001348 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x0: + sha512sig1l x29, x18, x19 # perform operation +80001348: 57390eb3 sha512sig1l x29,x18,x19 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cp_rs2_edges_0x0, Zknh_sha512sig1l_cg_cp_rs2_edges_0x0_str) +8000134c: 000f2383 lw x7,0(x30) +80001350: 01d38863 beq x7,x29,80001360 +80001354: 1c40446f jal x8,80005518 +80001358: 80001348 .word 0x80001348 +8000135c: 8000a8b1 .word 0x8000a8b1 +80001360: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x295bb196 +80001364: 00062483 lw x9,0(x12) +80001368: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000001 +8000136c: 00062c03 lw x24,0(x12) +80001370: 00460613 addi x12,x12,4 + +80001374 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x1: + sha512sig1l x3, x9, x24 # perform operation +80001374: 578481b3 sha512sig1l x3,x9,x24 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cp_rs2_edges_0x1, Zknh_sha512sig1l_cg_cp_rs2_edges_0x1_str) +80001378: 000f2383 lw x7,0(x30) +8000137c: 00338863 beq x7,x3,8000138c +80001380: 1980446f jal x8,80005518 +80001384: 80001374 .word 0x80001374 +80001388: 8000a8f2 .word 0x8000a8f2 +8000138c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xc6976bec +80001390: 00062d03 lw x26,0(x12) +80001394: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x00000002 +80001398: 00062783 lw x15,0(x12) +8000139c: 00460613 addi x12,x12,4 + +800013a0 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x2: + sha512sig1l x2, x26, x15 # perform operation +800013a0: 56fd0133 sha512sig1l x2,x26,x15 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cp_rs2_edges_0x2, Zknh_sha512sig1l_cg_cp_rs2_edges_0x2_str) +800013a4: 000f2383 lw x7,0(x30) +800013a8: 00238863 beq x7,x2,800013b8 +800013ac: 16c0446f jal x8,80005518 +800013b0: 800013a0 .word 0x800013a0 +800013b4: 8000a933 .word 0x8000a933 +800013b8: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x67add78d +800013bc: 00062303 lw x6,0(x12) +800013c0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x80000000 +800013c4: 00062703 lw x14,0(x12) +800013c8: 00460613 addi x12,x12,4 + +800013cc : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000000: + sha512sig1l x24, x6, x14 # perform operation +800013cc: 56e30c33 sha512sig1l x24,x6,x14 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000000, Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000000_str) +800013d0: 000f2383 lw x7,0(x30) +800013d4: 01838863 beq x7,x24,800013e4 +800013d8: 1400446f jal x8,80005518 +800013dc: 800013cc .word 0x800013cc +800013e0: 8000a974 .word 0x8000a974 +800013e4: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7577fe4d +800013e8: 00062a03 lw x20,0(x12) +800013ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x80000001 +800013f0: 00062783 lw x15,0(x12) +800013f4: 00460613 addi x12,x12,4 + +800013f8 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000001: + sha512sig1l x17, x20, x15 # perform operation +800013f8: 56fa08b3 sha512sig1l x17,x20,x15 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000001, Zknh_sha512sig1l_cg_cp_rs2_edges_0x80000001_str) +800013fc: 000f2383 lw x7,0(x30) +80001400: 01138863 beq x7,x17,80001410 +80001404: 1140446f jal x8,80005518 +80001408: 800013f8 .word 0x800013f8 +8000140c: 8000a9bc .word 0x8000a9bc +80001410: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x3e0c683e +80001414: 00062883 lw x17,0(x12) +80001418: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x7fffffff +8000141c: 00062503 lw x10,0(x12) +80001420: 00460613 addi x12,x12,4 + +80001424 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x7fffffff: + sha512sig1l x4, x17, x10 # perform operation +80001424: 56a88233 sha512sig1l x4,x17,x10 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sig1l_cg_cp_rs2_edges_0x7fffffff_str) +80001428: 000f2383 lw x7,0(x30) +8000142c: 00438863 beq x7,x4,8000143c +80001430: 0e80446f jal x8,80005518 +80001434: 80001424 .word 0x80001424 +80001438: 8000aa04 .word 0x8000aa04 +8000143c: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x51edcccb +80001440: 00062583 lw x11,0(x12) +80001444: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x7ffffffe +80001448: 00062c83 lw x25,0(x12) +8000144c: 00460613 addi x12,x12,4 + +80001450 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x7ffffffe: + sha512sig1l x29, x11, x25 # perform operation +80001450: 57958eb3 sha512sig1l x29,x11,x25 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sig1l_cg_cp_rs2_edges_0x7ffffffe_str) +80001454: 000f2383 lw x7,0(x30) +80001458: 01d38863 beq x7,x29,80001468 +8000145c: 0bc0446f jal x8,80005518 +80001460: 80001450 .word 0x80001450 +80001464: 8000aa4c .word 0x8000aa4c +80001468: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xe2b8dbd5 +8000146c: 00062503 lw x10,0(x12) +80001470: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xffffffff +80001474: 00062783 lw x15,0(x12) +80001478: 00460613 addi x12,x12,4 + +8000147c : +Zknh_sha512sig1l_cg_cp_rs2_edges_0xffffffff: + sha512sig1l x22, x10, x15 # perform operation +8000147c: 56f50b33 sha512sig1l x22,x10,x15 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknh_sha512sig1l_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sig1l_cg_cp_rs2_edges_0xffffffff_str) +80001480: 000f2383 lw x7,0(x30) +80001484: 01638863 beq x7,x22,80001494 +80001488: 0900446f jal x8,80005518 +8000148c: 8000147c .word 0x8000147c +80001490: 8000aa94 .word 0x8000aa94 +80001494: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x90bbf6a8 +80001498: 00062a83 lw x21,0(x12) +8000149c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xfffffffe +800014a0: 00062903 lw x18,0(x12) +800014a4: 00460613 addi x12,x12,4 + +800014a8 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0xfffffffe: + sha512sig1l x26, x21, x18 # perform operation +800014a8: 572a8d33 sha512sig1l x26,x21,x18 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sig1l_cg_cp_rs2_edges_0xfffffffe_str) +800014ac: 000f2383 lw x7,0(x30) +800014b0: 01a38863 beq x7,x26,800014c0 +800014b4: 0640446f jal x8,80005518 +800014b8: 800014a8 .word 0x800014a8 +800014bc: 8000aadc .word 0x8000aadc +800014c0: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x53db4f99 +800014c4: 00062083 lw x1,0(x12) +800014c8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x5bbc8872 +800014cc: 00062d83 lw x27,0(x12) +800014d0: 00460613 addi x12,x12,4 + +800014d4 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x5bbc8872: + sha512sig1l x18, x1, x27 # perform operation +800014d4: 57b08933 sha512sig1l x18,x1,x27 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sig1l_cg_cp_rs2_edges_0x5bbc8872_str) +800014d8: 000f2383 lw x7,0(x30) +800014dc: 01238863 beq x7,x18,800014ec +800014e0: 0380446f jal x8,80005518 +800014e4: 800014d4 .word 0x800014d4 +800014e8: 8000ab24 .word 0x8000ab24 +800014ec: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xe3dfb96c +800014f0: 00062f83 lw x31,0(x12) +800014f4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xaaaaaaaa +800014f8: 00062c83 lw x25,0(x12) +800014fc: 00460613 addi x12,x12,4 + +80001500 : +Zknh_sha512sig1l_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sig1l x1, x31, x25 # perform operation +80001500: 579f80b3 sha512sig1l x1,x31,x25 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sig1l_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001504: 000f2383 lw x7,0(x30) +80001508: 00138863 beq x7,x1,80001518 +8000150c: 00c0446f jal x8,80005518 +80001510: 80001500 .word 0x80001500 +80001514: 8000ab6c .word 0x8000ab6c +80001518: 004f0f13 addi x30,x30,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x928146a8 +8000151c: 00062703 lw x14,0(x12) +80001520: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x55555555 +80001524: 00062883 lw x17,0(x12) +80001528: 00460613 addi x12,x12,4 + +8000152c : +Zknh_sha512sig1l_cg_cp_rs2_edges_0x55555555: + sha512sig1l x21, x14, x17 # perform operation +8000152c: 57170ab3 sha512sig1l x21,x14,x17 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cp_rs2_edges_0x55555555, Zknh_sha512sig1l_cg_cp_rs2_edges_0x55555555_str) +80001530: 000f2383 lw x7,0(x30) +80001534: 01538863 beq x7,x21,80001544 +80001538: 7e10346f jal x8,80005518 +8000153c: 8000152c .word 0x8000152c +80001540: 8000abb4 .word 0x8000abb4 +80001544: 004f0f13 addi x30,x30,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000000 +80001548: 00062903 lw x18,0(x12) +8000154c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x00000000 +80001550: 00062703 lw x14,0(x12) +80001554: 00460613 addi x12,x12,4 + +80001558 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sig1l x13, x18, x14 # perform operation +80001558: 56e906b3 sha512sig1l x13,x18,x14 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000155c: 000f2383 lw x7,0(x30) +80001560: 00d38863 beq x7,x13,80001570 +80001564: 7b50346f jal x8,80005518 +80001568: 80001558 .word 0x80001558 +8000156c: 8000abfc .word 0x8000abfc +80001570: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x00000000 +80001574: 00062283 lw x5,0(x12) +80001578: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x00000001 +8000157c: 00062a03 lw x20,0(x12) +80001580: 00460613 addi x12,x12,4 + +80001584 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sig1l x27, x5, x20 # perform operation +80001584: 57428db3 sha512sig1l x27,x5,x20 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001588: 000f2383 lw x7,0(x30) +8000158c: 01b38863 beq x7,x27,8000159c +80001590: 7890346f jal x8,80005518 +80001594: 80001584 .word 0x80001584 +80001598: 8000ac54 .word 0x8000ac54 +8000159c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000000 +800015a0: 00062883 lw x17,0(x12) +800015a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x00000002 +800015a8: 00062083 lw x1,0(x12) +800015ac: 00460613 addi x12,x12,4 + +800015b0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sig1l x16, x17, x1 # perform operation +800015b0: 56188833 sha512sig1l x16,x17,x1 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b4: 000f2383 lw x7,0(x30) +800015b8: 01038863 beq x7,x16,800015c8 +800015bc: 75d0346f jal x8,80005518 +800015c0: 800015b0 .word 0x800015b0 +800015c4: 8000acac .word 0x8000acac +800015c8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x00000000 +800015cc: 00062703 lw x14,0(x12) +800015d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x80000000 +800015d4: 00062d83 lw x27,0(x12) +800015d8: 00460613 addi x12,x12,4 + +800015dc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sig1l x11, x14, x27 # perform operation +800015dc: 57b705b3 sha512sig1l x11,x14,x27 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e0: 000f2383 lw x7,0(x30) +800015e4: 00b38863 beq x7,x11,800015f4 +800015e8: 7310346f jal x8,80005518 +800015ec: 800015dc .word 0x800015dc +800015f0: 8000ad04 .word 0x8000ad04 +800015f4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000000 +800015f8: 00062583 lw x11,0(x12) +800015fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x80000001 +80001600: 00062283 lw x5,0(x12) +80001604: 00460613 addi x12,x12,4 + +80001608 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sig1l x19, x11, x5 # perform operation +80001608: 565589b3 sha512sig1l x19,x11,x5 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000160c: 000f2383 lw x7,0(x30) +80001610: 01338863 beq x7,x19,80001620 +80001614: 7050346f jal x8,80005518 +80001618: 80001608 .word 0x80001608 +8000161c: 8000ad63 .word 0x8000ad63 +80001620: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x00000000 +80001624: 00062a03 lw x20,0(x12) +80001628: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x7fffffff +8000162c: 00062083 lw x1,0(x12) +80001630: 00460613 addi x12,x12,4 + +80001634 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sig1l x28, x20, x1 # perform operation +80001634: 561a0e33 sha512sig1l x28,x20,x1 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001638: 000f2383 lw x7,0(x30) +8000163c: 01c38863 beq x7,x28,8000164c +80001640: 6d90346f jal x8,80005518 +80001644: 80001634 .word 0x80001634 +80001648: 8000adc2 .word 0x8000adc2 +8000164c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x00000000 +80001650: 00062f83 lw x31,0(x12) +80001654: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x7ffffffe +80001658: 00062203 lw x4,0(x12) +8000165c: 00460613 addi x12,x12,4 + +80001660 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sig1l x22, x31, x4 # perform operation +80001660: 564f8b33 sha512sig1l x22,x31,x4 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001664: 000f2383 lw x7,0(x30) +80001668: 01638863 beq x7,x22,80001678 +8000166c: 6ad0346f jal x8,80005518 +80001670: 80001660 .word 0x80001660 +80001674: 8000ae21 .word 0x8000ae21 +80001678: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x00000000 +8000167c: 00062703 lw x14,0(x12) +80001680: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xffffffff +80001684: 00062583 lw x11,0(x12) +80001688: 00460613 addi x12,x12,4 + +8000168c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sig1l x19, x14, x11 # perform operation +8000168c: 56b709b3 sha512sig1l x19,x14,x11 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001690: 000f2383 lw x7,0(x30) +80001694: 01338863 beq x7,x19,800016a4 +80001698: 6810346f jal x8,80005518 +8000169c: 8000168c .word 0x8000168c +800016a0: 8000ae80 .word 0x8000ae80 +800016a4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000000 +800016a8: 00062303 lw x6,0(x12) +800016ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xfffffffe +800016b0: 00062b83 lw x23,0(x12) +800016b4: 00460613 addi x12,x12,4 + +800016b8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sig1l x14, x6, x23 # perform operation +800016b8: 57730733 sha512sig1l x14,x6,x23 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016bc: 000f2383 lw x7,0(x30) +800016c0: 00e38863 beq x7,x14,800016d0 +800016c4: 6550346f jal x8,80005518 +800016c8: 800016b8 .word 0x800016b8 +800016cc: 8000aedf .word 0x8000aedf +800016d0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x00000000 +800016d4: 00062083 lw x1,0(x12) +800016d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x5bbc8872 +800016dc: 00062e03 lw x28,0(x12) +800016e0: 00460613 addi x12,x12,4 + +800016e4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sig1l x19, x1, x28 # perform operation +800016e4: 57c089b3 sha512sig1l x19,x1,x28 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e8: 000f2383 lw x7,0(x30) +800016ec: 01338863 beq x7,x19,800016fc +800016f0: 6290346f jal x8,80005518 +800016f4: 800016e4 .word 0x800016e4 +800016f8: 8000af3e .word 0x8000af3e +800016fc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x00000000 +80001700: 00062983 lw x19,0(x12) +80001704: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xaaaaaaaa +80001708: 00062d83 lw x27,0(x12) +8000170c: 00460613 addi x12,x12,4 + +80001710 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sig1l x3, x19, x27 # perform operation +80001710: 57b981b3 sha512sig1l x3,x19,x27 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001714: 000f2383 lw x7,0(x30) +80001718: 00338863 beq x7,x3,80001728 +8000171c: 5fd0346f jal x8,80005518 +80001720: 80001710 .word 0x80001710 +80001724: 8000af9d .word 0x8000af9d +80001728: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x00000000 +8000172c: 00062683 lw x13,0(x12) +80001730: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x55555555 +80001734: 00062e83 lw x29,0(x12) +80001738: 00460613 addi x12,x12,4 + +8000173c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sig1l x5, x13, x29 # perform operation +8000173c: 57d682b3 sha512sig1l x5,x13,x29 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001740: 000f2383 lw x7,0(x30) +80001744: 00538863 beq x7,x5,80001754 +80001748: 5d10346f jal x8,80005518 +8000174c: 8000173c .word 0x8000173c +80001750: 8000affc .word 0x8000affc +80001754: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x00000001 +80001758: 00062f83 lw x31,0(x12) +8000175c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000000 +80001760: 00062b83 lw x23,0(x12) +80001764: 00460613 addi x12,x12,4 + +80001768 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sig1l x6, x31, x23 # perform operation +80001768: 577f8333 sha512sig1l x6,x31,x23 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000176c: 000f2383 lw x7,0(x30) +80001770: 00638863 beq x7,x6,80001780 +80001774: 5a50346f jal x8,80005518 +80001778: 80001768 .word 0x80001768 +8000177c: 8000b05b .word 0x8000b05b +80001780: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x00000001 +80001784: 00062703 lw x14,0(x12) +80001788: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x00000001 +8000178c: 00062883 lw x17,0(x12) +80001790: 00460613 addi x12,x12,4 + +80001794 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sig1l x25, x14, x17 # perform operation +80001794: 57170cb3 sha512sig1l x25,x14,x17 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001798: 000f2383 lw x7,0(x30) +8000179c: 01938863 beq x7,x25,800017ac +800017a0: 5790346f jal x8,80005518 +800017a4: 80001794 .word 0x80001794 +800017a8: 8000b0b3 .word 0x8000b0b3 +800017ac: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x00000001 +800017b0: 00062b83 lw x23,0(x12) +800017b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x00000002 +800017b8: 00062483 lw x9,0(x12) +800017bc: 00460613 addi x12,x12,4 + +800017c0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sig1l x18, x23, x9 # perform operation +800017c0: 569b8933 sha512sig1l x18,x23,x9 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c4: 000f2383 lw x7,0(x30) +800017c8: 01238863 beq x7,x18,800017d8 +800017cc: 54d0346f jal x8,80005518 +800017d0: 800017c0 .word 0x800017c0 +800017d4: 8000b10b .word 0x8000b10b +800017d8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000001 +800017dc: 00062303 lw x6,0(x12) +800017e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x80000000 +800017e4: 00062983 lw x19,0(x12) +800017e8: 00460613 addi x12,x12,4 + +800017ec : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sig1l x15, x6, x19 # perform operation +800017ec: 573307b3 sha512sig1l x15,x6,x19 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f0: 000f2383 lw x7,0(x30) +800017f4: 00f38863 beq x7,x15,80001804 +800017f8: 5210346f jal x8,80005518 +800017fc: 800017ec .word 0x800017ec +80001800: 8000b163 .word 0x8000b163 +80001804: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x00000001 +80001808: 00062a03 lw x20,0(x12) +8000180c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000001 +80001810: 00062483 lw x9,0(x12) +80001814: 00460613 addi x12,x12,4 + +80001818 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sig1l x23, x20, x9 # perform operation +80001818: 569a0bb3 sha512sig1l x23,x20,x9 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000181c: 000f2383 lw x7,0(x30) +80001820: 01738863 beq x7,x23,80001830 +80001824: 4f50346f jal x8,80005518 +80001828: 80001818 .word 0x80001818 +8000182c: 8000b1c2 .word 0x8000b1c2 +80001830: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000001 +80001834: 00062183 lw x3,0(x12) +80001838: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x7fffffff +8000183c: 00062303 lw x6,0(x12) +80001840: 00460613 addi x12,x12,4 + +80001844 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sig1l x15, x3, x6 # perform operation +80001844: 566187b3 sha512sig1l x15,x3,x6 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001848: 000f2383 lw x7,0(x30) +8000184c: 00f38863 beq x7,x15,8000185c +80001850: 4c90346f jal x8,80005518 +80001854: 80001844 .word 0x80001844 +80001858: 8000b221 .word 0x8000b221 +8000185c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000001 +80001860: 00062883 lw x17,0(x12) +80001864: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x7ffffffe +80001868: 00062e03 lw x28,0(x12) +8000186c: 00460613 addi x12,x12,4 + +80001870 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sig1l x4, x17, x28 # perform operation +80001870: 57c88233 sha512sig1l x4,x17,x28 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001874: 000f2383 lw x7,0(x30) +80001878: 00438863 beq x7,x4,80001888 +8000187c: 49d0346f jal x8,80005518 +80001880: 80001870 .word 0x80001870 +80001884: 8000b280 .word 0x8000b280 +80001888: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000001 +8000188c: 00062303 lw x6,0(x12) +80001890: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xffffffff +80001894: 00062183 lw x3,0(x12) +80001898: 00460613 addi x12,x12,4 + +8000189c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sig1l x13, x6, x3 # perform operation +8000189c: 563306b3 sha512sig1l x13,x6,x3 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a0: 000f2383 lw x7,0(x30) +800018a4: 00d38863 beq x7,x13,800018b4 +800018a8: 4710346f jal x8,80005518 +800018ac: 8000189c .word 0x8000189c +800018b0: 8000b2df .word 0x8000b2df +800018b4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000001 +800018b8: 00062583 lw x11,0(x12) +800018bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xfffffffe +800018c0: 00062f83 lw x31,0(x12) +800018c4: 00460613 addi x12,x12,4 + +800018c8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sig1l x9, x11, x31 # perform operation +800018c8: 57f584b3 sha512sig1l x9,x11,x31 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018cc: 000f2383 lw x7,0(x30) +800018d0: 00938863 beq x7,x9,800018e0 +800018d4: 4450346f jal x8,80005518 +800018d8: 800018c8 .word 0x800018c8 +800018dc: 8000b33e .word 0x8000b33e +800018e0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x00000001 +800018e4: 00062a83 lw x21,0(x12) +800018e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x5bbc8872 +800018ec: 00062b03 lw x22,0(x12) +800018f0: 00460613 addi x12,x12,4 + +800018f4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sig1l x20, x21, x22 # perform operation +800018f4: 576a8a33 sha512sig1l x20,x21,x22 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f8: 000f2383 lw x7,0(x30) +800018fc: 01438863 beq x7,x20,8000190c +80001900: 4190346f jal x8,80005518 +80001904: 800018f4 .word 0x800018f4 +80001908: 8000b39d .word 0x8000b39d +8000190c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000001 +80001910: 00062183 lw x3,0(x12) +80001914: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xaaaaaaaa +80001918: 00062903 lw x18,0(x12) +8000191c: 00460613 addi x12,x12,4 + +80001920 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sig1l x2, x3, x18 # perform operation +80001920: 57218133 sha512sig1l x2,x3,x18 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001924: 000f2383 lw x7,0(x30) +80001928: 00238863 beq x7,x2,80001938 +8000192c: 3ed0346f jal x8,80005518 +80001930: 80001920 .word 0x80001920 +80001934: 8000b3fc .word 0x8000b3fc +80001938: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x00000001 +8000193c: 00062a03 lw x20,0(x12) +80001940: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x55555555 +80001944: 00062283 lw x5,0(x12) +80001948: 00460613 addi x12,x12,4 + +8000194c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sig1l x31, x20, x5 # perform operation +8000194c: 565a0fb3 sha512sig1l x31,x20,x5 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001950: 000f2383 lw x7,0(x30) +80001954: 01f38863 beq x7,x31,80001964 +80001958: 3c10346f jal x8,80005518 +8000195c: 8000194c .word 0x8000194c +80001960: 8000b45b .word 0x8000b45b +80001964: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x00000002 +80001968: 00062803 lw x16,0(x12) +8000196c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000000 +80001970: 00062b03 lw x22,0(x12) +80001974: 00460613 addi x12,x12,4 + +80001978 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sig1l x26, x16, x22 # perform operation +80001978: 57680d33 sha512sig1l x26,x16,x22 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000197c: 000f2383 lw x7,0(x30) +80001980: 01a38863 beq x7,x26,80001990 +80001984: 3950346f jal x8,80005518 +80001988: 80001978 .word 0x80001978 +8000198c: 8000b4ba .word 0x8000b4ba +80001990: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x00000002 +80001994: 00062e03 lw x28,0(x12) +80001998: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x00000001 +8000199c: 00062503 lw x10,0(x12) +800019a0: 00460613 addi x12,x12,4 + +800019a4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sig1l x22, x28, x10 # perform operation +800019a4: 56ae0b33 sha512sig1l x22,x28,x10 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a8: 000f2383 lw x7,0(x30) +800019ac: 01638863 beq x7,x22,800019bc +800019b0: 3690346f jal x8,80005518 +800019b4: 800019a4 .word 0x800019a4 +800019b8: 8000b512 .word 0x8000b512 +800019bc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x00000002 +800019c0: 00062c03 lw x24,0(x12) +800019c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000002 +800019c8: 00062b83 lw x23,0(x12) +800019cc: 00460613 addi x12,x12,4 + +800019d0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sig1l x19, x24, x23 # perform operation +800019d0: 577c09b3 sha512sig1l x19,x24,x23 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d4: 000f2383 lw x7,0(x30) +800019d8: 01338863 beq x7,x19,800019e8 +800019dc: 33d0346f jal x8,80005518 +800019e0: 800019d0 .word 0x800019d0 +800019e4: 8000b56a .word 0x8000b56a +800019e8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x00000002 +800019ec: 00062d83 lw x27,0(x12) +800019f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x80000000 +800019f4: 00062e83 lw x29,0(x12) +800019f8: 00460613 addi x12,x12,4 + +800019fc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sig1l x9, x27, x29 # perform operation +800019fc: 57dd84b3 sha512sig1l x9,x27,x29 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a00: 000f2383 lw x7,0(x30) +80001a04: 00938863 beq x7,x9,80001a14 +80001a08: 3110346f jal x8,80005518 +80001a0c: 800019fc .word 0x800019fc +80001a10: 8000b5c2 .word 0x8000b5c2 +80001a14: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000002 +80001a18: 00062883 lw x17,0(x12) +80001a1c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x80000001 +80001a20: 00062083 lw x1,0(x12) +80001a24: 00460613 addi x12,x12,4 + +80001a28 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sig1l x9, x17, x1 # perform operation +80001a28: 561884b3 sha512sig1l x9,x17,x1 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a2c: 000f2383 lw x7,0(x30) +80001a30: 00938863 beq x7,x9,80001a40 +80001a34: 2e50346f jal x8,80005518 +80001a38: 80001a28 .word 0x80001a28 +80001a3c: 8000b621 .word 0x8000b621 +80001a40: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000002 +80001a44: 00062583 lw x11,0(x12) +80001a48: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x7fffffff +80001a4c: 00062c83 lw x25,0(x12) +80001a50: 00460613 addi x12,x12,4 + +80001a54 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sig1l x2, x11, x25 # perform operation +80001a54: 57958133 sha512sig1l x2,x11,x25 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a58: 000f2383 lw x7,0(x30) +80001a5c: 00238863 beq x7,x2,80001a6c +80001a60: 2b90346f jal x8,80005518 +80001a64: 80001a54 .word 0x80001a54 +80001a68: 8000b680 .word 0x8000b680 +80001a6c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x00000002 +80001a70: 00062983 lw x19,0(x12) +80001a74: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7ffffffe +80001a78: 00062483 lw x9,0(x12) +80001a7c: 00460613 addi x12,x12,4 + +80001a80 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sig1l x27, x19, x9 # perform operation +80001a80: 56998db3 sha512sig1l x27,x19,x9 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a84: 000f2383 lw x7,0(x30) +80001a88: 01b38863 beq x7,x27,80001a98 +80001a8c: 28d0346f jal x8,80005518 +80001a90: 80001a80 .word 0x80001a80 +80001a94: 8000b6df .word 0x8000b6df +80001a98: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000002 +80001a9c: 00062903 lw x18,0(x12) +80001aa0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xffffffff +80001aa4: 00062b83 lw x23,0(x12) +80001aa8: 00460613 addi x12,x12,4 + +80001aac : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sig1l x6, x18, x23 # perform operation +80001aac: 57790333 sha512sig1l x6,x18,x23 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab0: 000f2383 lw x7,0(x30) +80001ab4: 00638863 beq x7,x6,80001ac4 +80001ab8: 2610346f jal x8,80005518 +80001abc: 80001aac .word 0x80001aac +80001ac0: 8000b73e .word 0x8000b73e +80001ac4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000002 +80001ac8: 00062303 lw x6,0(x12) +80001acc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xfffffffe +80001ad0: 00062803 lw x16,0(x12) +80001ad4: 00460613 addi x12,x12,4 + +80001ad8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sig1l x20, x6, x16 # perform operation +80001ad8: 57030a33 sha512sig1l x20,x6,x16 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001adc: 000f2383 lw x7,0(x30) +80001ae0: 01438863 beq x7,x20,80001af0 +80001ae4: 2350346f jal x8,80005518 +80001ae8: 80001ad8 .word 0x80001ad8 +80001aec: 8000b79d .word 0x8000b79d +80001af0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x00000002 +80001af4: 00062983 lw x19,0(x12) +80001af8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x5bbc8872 +80001afc: 00062a03 lw x20,0(x12) +80001b00: 00460613 addi x12,x12,4 + +80001b04 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sig1l x18, x19, x20 # perform operation +80001b04: 57498933 sha512sig1l x18,x19,x20 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b08: 000f2383 lw x7,0(x30) +80001b0c: 01238863 beq x7,x18,80001b1c +80001b10: 2090346f jal x8,80005518 +80001b14: 80001b04 .word 0x80001b04 +80001b18: 8000b7fc .word 0x8000b7fc +80001b1c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x00000002 +80001b20: 00062483 lw x9,0(x12) +80001b24: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xaaaaaaaa +80001b28: 00062883 lw x17,0(x12) +80001b2c: 00460613 addi x12,x12,4 + +80001b30 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sig1l x29, x9, x17 # perform operation +80001b30: 57148eb3 sha512sig1l x29,x9,x17 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b34: 000f2383 lw x7,0(x30) +80001b38: 01d38863 beq x7,x29,80001b48 +80001b3c: 1dd0346f jal x8,80005518 +80001b40: 80001b30 .word 0x80001b30 +80001b44: 8000b85b .word 0x8000b85b +80001b48: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000002 +80001b4c: 00062c83 lw x25,0(x12) +80001b50: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x55555555 +80001b54: 00062903 lw x18,0(x12) +80001b58: 00460613 addi x12,x12,4 + +80001b5c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sig1l x24, x25, x18 # perform operation +80001b5c: 572c8c33 sha512sig1l x24,x25,x18 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b60: 000f2383 lw x7,0(x30) +80001b64: 01838863 beq x7,x24,80001b74 +80001b68: 1b10346f jal x8,80005518 +80001b6c: 80001b5c .word 0x80001b5c +80001b70: 8000b8ba .word 0x8000b8ba +80001b74: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x80000000 +80001b78: 00062d83 lw x27,0(x12) +80001b7c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000000 +80001b80: 00062c03 lw x24,0(x12) +80001b84: 00460613 addi x12,x12,4 + +80001b88 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sig1l x15, x27, x24 # perform operation +80001b88: 578d87b3 sha512sig1l x15,x27,x24 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b8c: 000f2383 lw x7,0(x30) +80001b90: 00f38863 beq x7,x15,80001ba0 +80001b94: 1850346f jal x8,80005518 +80001b98: 80001b88 .word 0x80001b88 +80001b9c: 8000b919 .word 0x8000b919 +80001ba0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x80000000 +80001ba4: 00062303 lw x6,0(x12) +80001ba8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000001 +80001bac: 00062b83 lw x23,0(x12) +80001bb0: 00460613 addi x12,x12,4 + +80001bb4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sig1l x29, x6, x23 # perform operation +80001bb4: 57730eb3 sha512sig1l x29,x6,x23 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb8: 000f2383 lw x7,0(x30) +80001bbc: 01d38863 beq x7,x29,80001bcc +80001bc0: 1590346f jal x8,80005518 +80001bc4: 80001bb4 .word 0x80001bb4 +80001bc8: 8000b978 .word 0x8000b978 +80001bcc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x80000000 +80001bd0: 00062683 lw x13,0(x12) +80001bd4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x00000002 +80001bd8: 00062d03 lw x26,0(x12) +80001bdc: 00460613 addi x12,x12,4 + +80001be0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sig1l x3, x13, x26 # perform operation +80001be0: 57a681b3 sha512sig1l x3,x13,x26 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be4: 000f2383 lw x7,0(x30) +80001be8: 00338863 beq x7,x3,80001bf8 +80001bec: 12d0346f jal x8,80005518 +80001bf0: 80001be0 .word 0x80001be0 +80001bf4: 8000b9d7 .word 0x8000b9d7 +80001bf8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000000 +80001bfc: 00062903 lw x18,0(x12) +80001c00: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x80000000 +80001c04: 00062583 lw x11,0(x12) +80001c08: 00460613 addi x12,x12,4 + +80001c0c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sig1l x5, x18, x11 # perform operation +80001c0c: 56b902b3 sha512sig1l x5,x18,x11 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c10: 000f2383 lw x7,0(x30) +80001c14: 00538863 beq x7,x5,80001c24 +80001c18: 1010346f jal x8,80005518 +80001c1c: 80001c0c .word 0x80001c0c +80001c20: 8000ba36 .word 0x8000ba36 +80001c24: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x80000000 +80001c28: 00062203 lw x4,0(x12) +80001c2c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x80000001 +80001c30: 00062183 lw x3,0(x12) +80001c34: 00460613 addi x12,x12,4 + +80001c38 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sig1l x18, x4, x3 # perform operation +80001c38: 56320933 sha512sig1l x18,x4,x3 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c3c: 000f2383 lw x7,0(x30) +80001c40: 01238863 beq x7,x18,80001c50 +80001c44: 0d50346f jal x8,80005518 +80001c48: 80001c38 .word 0x80001c38 +80001c4c: 8000ba9c .word 0x8000ba9c +80001c50: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000000 +80001c54: 00062a83 lw x21,0(x12) +80001c58: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x7fffffff +80001c5c: 00062d83 lw x27,0(x12) +80001c60: 00460613 addi x12,x12,4 + +80001c64 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sig1l x16, x21, x27 # perform operation +80001c64: 57ba8833 sha512sig1l x16,x21,x27 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c68: 000f2383 lw x7,0(x30) +80001c6c: 01038863 beq x7,x16,80001c7c +80001c70: 0a90346f jal x8,80005518 +80001c74: 80001c64 .word 0x80001c64 +80001c78: 8000bb02 .word 0x8000bb02 +80001c7c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x80000000 +80001c80: 00062583 lw x11,0(x12) +80001c84: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x7ffffffe +80001c88: 00062283 lw x5,0(x12) +80001c8c: 00460613 addi x12,x12,4 + +80001c90 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sig1l x21, x11, x5 # perform operation +80001c90: 56558ab3 sha512sig1l x21,x11,x5 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c94: 000f2383 lw x7,0(x30) +80001c98: 01538863 beq x7,x21,80001ca8 +80001c9c: 07d0346f jal x8,80005518 +80001ca0: 80001c90 .word 0x80001c90 +80001ca4: 8000bb68 .word 0x8000bb68 +80001ca8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x80000000 +80001cac: 00062303 lw x6,0(x12) +80001cb0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xffffffff +80001cb4: 00062083 lw x1,0(x12) +80001cb8: 00460613 addi x12,x12,4 + +80001cbc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sig1l x29, x6, x1 # perform operation +80001cbc: 56130eb3 sha512sig1l x29,x6,x1 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc0: 000f2383 lw x7,0(x30) +80001cc4: 01d38863 beq x7,x29,80001cd4 +80001cc8: 0510346f jal x8,80005518 +80001ccc: 80001cbc .word 0x80001cbc +80001cd0: 8000bbce .word 0x8000bbce +80001cd4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x80000000 +80001cd8: 00062303 lw x6,0(x12) +80001cdc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xfffffffe +80001ce0: 00062d03 lw x26,0(x12) +80001ce4: 00460613 addi x12,x12,4 + +80001ce8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sig1l x10, x6, x26 # perform operation +80001ce8: 57a30533 sha512sig1l x10,x6,x26 + # Check if x10 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x10, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cec: 000f2383 lw x7,0(x30) +80001cf0: 00a38863 beq x7,x10,80001d00 +80001cf4: 0250346f jal x8,80005518 +80001cf8: 80001ce8 .word 0x80001ce8 +80001cfc: 8000bc34 .word 0x8000bc34 +80001d00: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x80000000 +80001d04: 00062883 lw x17,0(x12) +80001d08: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x5bbc8872 +80001d0c: 00062c83 lw x25,0(x12) +80001d10: 00460613 addi x12,x12,4 + +80001d14 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sig1l x3, x17, x25 # perform operation +80001d14: 579881b3 sha512sig1l x3,x17,x25 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d18: 000f2383 lw x7,0(x30) +80001d1c: 00338863 beq x7,x3,80001d2c +80001d20: 7f80346f jal x8,80005518 +80001d24: 80001d14 .word 0x80001d14 +80001d28: 8000bc9a .word 0x8000bc9a +80001d2c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x80000000 +80001d30: 00062683 lw x13,0(x12) +80001d34: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xaaaaaaaa +80001d38: 00062b83 lw x23,0(x12) +80001d3c: 00460613 addi x12,x12,4 + +80001d40 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sig1l x15, x13, x23 # perform operation +80001d40: 577687b3 sha512sig1l x15,x13,x23 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d44: 000f2383 lw x7,0(x30) +80001d48: 00f38863 beq x7,x15,80001d58 +80001d4c: 7cc0346f jal x8,80005518 +80001d50: 80001d40 .word 0x80001d40 +80001d54: 8000bd00 .word 0x8000bd00 +80001d58: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x80000000 +80001d5c: 00062f83 lw x31,0(x12) +80001d60: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x55555555 +80001d64: 00062883 lw x17,0(x12) +80001d68: 00460613 addi x12,x12,4 + +80001d6c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sig1l x9, x31, x17 # perform operation +80001d6c: 571f84b3 sha512sig1l x9,x31,x17 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d70: 000f2383 lw x7,0(x30) +80001d74: 00938863 beq x7,x9,80001d84 +80001d78: 7a00346f jal x8,80005518 +80001d7c: 80001d6c .word 0x80001d6c +80001d80: 8000bd66 .word 0x8000bd66 +80001d84: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x80000001 +80001d88: 00062183 lw x3,0(x12) +80001d8c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x00000000 +80001d90: 00062583 lw x11,0(x12) +80001d94: 00460613 addi x12,x12,4 + +80001d98 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sig1l x18, x3, x11 # perform operation +80001d98: 56b18933 sha512sig1l x18,x3,x11 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d9c: 000f2383 lw x7,0(x30) +80001da0: 01238863 beq x7,x18,80001db0 +80001da4: 7740346f jal x8,80005518 +80001da8: 80001d98 .word 0x80001d98 +80001dac: 8000bdcc .word 0x8000bdcc +80001db0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x80000001 +80001db4: 00062e03 lw x28,0(x12) +80001db8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +80001dbc: 00062c83 lw x25,0(x12) +80001dc0: 00460613 addi x12,x12,4 + +80001dc4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sig1l x26, x28, x25 # perform operation +80001dc4: 579e0d33 sha512sig1l x26,x28,x25 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc8: 000f2383 lw x7,0(x30) +80001dcc: 01a38863 beq x7,x26,80001ddc +80001dd0: 7480346f jal x8,80005518 +80001dd4: 80001dc4 .word 0x80001dc4 +80001dd8: 8000be2b .word 0x8000be2b +80001ddc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x80000001 +80001de0: 00062783 lw x15,0(x12) +80001de4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x00000002 +80001de8: 00062183 lw x3,0(x12) +80001dec: 00460613 addi x12,x12,4 + +80001df0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sig1l x4, x15, x3 # perform operation +80001df0: 56378233 sha512sig1l x4,x15,x3 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df4: 000f2383 lw x7,0(x30) +80001df8: 00438863 beq x7,x4,80001e08 +80001dfc: 71c0346f jal x8,80005518 +80001e00: 80001df0 .word 0x80001df0 +80001e04: 8000be8a .word 0x8000be8a +80001e08: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x80000001 +80001e0c: 00062983 lw x19,0(x12) +80001e10: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x80000000 +80001e14: 00062303 lw x6,0(x12) +80001e18: 00460613 addi x12,x12,4 + +80001e1c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sig1l x27, x19, x6 # perform operation +80001e1c: 56698db3 sha512sig1l x27,x19,x6 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e20: 000f2383 lw x7,0(x30) +80001e24: 01b38863 beq x7,x27,80001e34 +80001e28: 6f00346f jal x8,80005518 +80001e2c: 80001e1c .word 0x80001e1c +80001e30: 8000bee9 .word 0x8000bee9 +80001e34: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x80000001 +80001e38: 00062203 lw x4,0(x12) +80001e3c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x80000001 +80001e40: 00062583 lw x11,0(x12) +80001e44: 00460613 addi x12,x12,4 + +80001e48 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sig1l x21, x4, x11 # perform operation +80001e48: 56b20ab3 sha512sig1l x21,x4,x11 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e4c: 000f2383 lw x7,0(x30) +80001e50: 01538863 beq x7,x21,80001e60 +80001e54: 6c40346f jal x8,80005518 +80001e58: 80001e48 .word 0x80001e48 +80001e5c: 8000bf4f .word 0x8000bf4f +80001e60: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x80000001 +80001e64: 00062c83 lw x25,0(x12) +80001e68: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x7fffffff +80001e6c: 00062b03 lw x22,0(x12) +80001e70: 00460613 addi x12,x12,4 + +80001e74 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sig1l x20, x25, x22 # perform operation +80001e74: 576c8a33 sha512sig1l x20,x25,x22 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e78: 000f2383 lw x7,0(x30) +80001e7c: 01438863 beq x7,x20,80001e8c +80001e80: 6980346f jal x8,80005518 +80001e84: 80001e74 .word 0x80001e74 +80001e88: 8000bfb5 .word 0x8000bfb5 +80001e8c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000001 +80001e90: 00062a83 lw x21,0(x12) +80001e94: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x7ffffffe +80001e98: 00062503 lw x10,0(x12) +80001e9c: 00460613 addi x12,x12,4 + +80001ea0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sig1l x29, x21, x10 # perform operation +80001ea0: 56aa8eb3 sha512sig1l x29,x21,x10 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea4: 000f2383 lw x7,0(x30) +80001ea8: 01d38863 beq x7,x29,80001eb8 +80001eac: 66c0346f jal x8,80005518 +80001eb0: 80001ea0 .word 0x80001ea0 +80001eb4: 8000c01b .word 0x8000c01b +80001eb8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000001 +80001ebc: 00062a83 lw x21,0(x12) +80001ec0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xffffffff +80001ec4: 00062e83 lw x29,0(x12) +80001ec8: 00460613 addi x12,x12,4 + +80001ecc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sig1l x17, x21, x29 # perform operation +80001ecc: 57da88b3 sha512sig1l x17,x21,x29 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed0: 000f2383 lw x7,0(x30) +80001ed4: 01138863 beq x7,x17,80001ee4 +80001ed8: 6400346f jal x8,80005518 +80001edc: 80001ecc .word 0x80001ecc +80001ee0: 8000c081 .word 0x8000c081 +80001ee4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x80000001 +80001ee8: 00062083 lw x1,0(x12) +80001eec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xfffffffe +80001ef0: 00062783 lw x15,0(x12) +80001ef4: 00460613 addi x12,x12,4 + +80001ef8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sig1l x29, x1, x15 # perform operation +80001ef8: 56f08eb3 sha512sig1l x29,x1,x15 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001efc: 000f2383 lw x7,0(x30) +80001f00: 01d38863 beq x7,x29,80001f10 +80001f04: 6140346f jal x8,80005518 +80001f08: 80001ef8 .word 0x80001ef8 +80001f0c: 8000c0e7 .word 0x8000c0e7 +80001f10: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x80000001 +80001f14: 00062d03 lw x26,0(x12) +80001f18: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5bbc8872 +80001f1c: 00062a83 lw x21,0(x12) +80001f20: 00460613 addi x12,x12,4 + +80001f24 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sig1l x11, x26, x21 # perform operation +80001f24: 575d05b3 sha512sig1l x11,x26,x21 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f28: 000f2383 lw x7,0(x30) +80001f2c: 00b38863 beq x7,x11,80001f3c +80001f30: 5e80346f jal x8,80005518 +80001f34: 80001f24 .word 0x80001f24 +80001f38: 8000c14d .word 0x8000c14d +80001f3c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x80000001 +80001f40: 00062803 lw x16,0(x12) +80001f44: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xaaaaaaaa +80001f48: 00062503 lw x10,0(x12) +80001f4c: 00460613 addi x12,x12,4 + +80001f50 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sig1l x4, x16, x10 # perform operation +80001f50: 56a80233 sha512sig1l x4,x16,x10 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f54: 000f2383 lw x7,0(x30) +80001f58: 00438863 beq x7,x4,80001f68 +80001f5c: 5bc0346f jal x8,80005518 +80001f60: 80001f50 .word 0x80001f50 +80001f64: 8000c1b3 .word 0x8000c1b3 +80001f68: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x80000001 +80001f6c: 00062203 lw x4,0(x12) +80001f70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x55555555 +80001f74: 00062d83 lw x27,0(x12) +80001f78: 00460613 addi x12,x12,4 + +80001f7c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sig1l x2, x4, x27 # perform operation +80001f7c: 57b20133 sha512sig1l x2,x4,x27 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f80: 000f2383 lw x7,0(x30) +80001f84: 00238863 beq x7,x2,80001f94 +80001f88: 5900346f jal x8,80005518 +80001f8c: 80001f7c .word 0x80001f7c +80001f90: 8000c219 .word 0x8000c219 +80001f94: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x7fffffff +80001f98: 00062303 lw x6,0(x12) +80001f9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000000 +80001fa0: 00062683 lw x13,0(x12) +80001fa4: 00460613 addi x12,x12,4 + +80001fa8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sig1l x23, x6, x13 # perform operation +80001fa8: 56d30bb3 sha512sig1l x23,x6,x13 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fac: 000f2383 lw x7,0(x30) +80001fb0: 01738863 beq x7,x23,80001fc0 +80001fb4: 5640346f jal x8,80005518 +80001fb8: 80001fa8 .word 0x80001fa8 +80001fbc: 8000c27f .word 0x8000c27f +80001fc0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x7fffffff +80001fc4: 00062503 lw x10,0(x12) +80001fc8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000001 +80001fcc: 00062e03 lw x28,0(x12) +80001fd0: 00460613 addi x12,x12,4 + +80001fd4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sig1l x11, x10, x28 # perform operation +80001fd4: 57c505b3 sha512sig1l x11,x10,x28 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd8: 000f2383 lw x7,0(x30) +80001fdc: 00b38863 beq x7,x11,80001fec +80001fe0: 5380346f jal x8,80005518 +80001fe4: 80001fd4 .word 0x80001fd4 +80001fe8: 8000c2de .word 0x8000c2de +80001fec: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x7fffffff +80001ff0: 00062583 lw x11,0(x12) +80001ff4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000002 +80001ff8: 00062e83 lw x29,0(x12) +80001ffc: 00460613 addi x12,x12,4 + +80002000 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sig1l x21, x11, x29 # perform operation +80002000: 57d58ab3 sha512sig1l x21,x11,x29 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002004: 000f2383 lw x7,0(x30) +80002008: 01538863 beq x7,x21,80002018 +8000200c: 50c0346f jal x8,80005518 +80002010: 80002000 .word 0x80002000 +80002014: 8000c33d .word 0x8000c33d +80002018: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x7fffffff +8000201c: 00062c03 lw x24,0(x12) +80002020: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000000 +80002024: 00062483 lw x9,0(x12) +80002028: 00460613 addi x12,x12,4 + +8000202c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sig1l x21, x24, x9 # perform operation +8000202c: 569c0ab3 sha512sig1l x21,x24,x9 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002030: 000f2383 lw x7,0(x30) +80002034: 01538863 beq x7,x21,80002044 +80002038: 4e00346f jal x8,80005518 +8000203c: 8000202c .word 0x8000202c +80002040: 8000c39c .word 0x8000c39c +80002044: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7fffffff +80002048: 00062a03 lw x20,0(x12) +8000204c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x80000001 +80002050: 00062183 lw x3,0(x12) +80002054: 00460613 addi x12,x12,4 + +80002058 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sig1l x22, x20, x3 # perform operation +80002058: 563a0b33 sha512sig1l x22,x20,x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000205c: 000f2383 lw x7,0(x30) +80002060: 01638863 beq x7,x22,80002070 +80002064: 4b40346f jal x8,80005518 +80002068: 80002058 .word 0x80002058 +8000206c: 8000c402 .word 0x8000c402 +80002070: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x7fffffff +80002074: 00062703 lw x14,0(x12) +80002078: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x7fffffff +8000207c: 00062983 lw x19,0(x12) +80002080: 00460613 addi x12,x12,4 + +80002084 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sig1l x13, x14, x19 # perform operation +80002084: 573706b3 sha512sig1l x13,x14,x19 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002088: 000f2383 lw x7,0(x30) +8000208c: 00d38863 beq x7,x13,8000209c +80002090: 4880346f jal x8,80005518 +80002094: 80002084 .word 0x80002084 +80002098: 8000c468 .word 0x8000c468 +8000209c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7fffffff +800020a0: 00062083 lw x1,0(x12) +800020a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x7ffffffe +800020a8: 00062e83 lw x29,0(x12) +800020ac: 00460613 addi x12,x12,4 + +800020b0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sig1l x26, x1, x29 # perform operation +800020b0: 57d08d33 sha512sig1l x26,x1,x29 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b4: 000f2383 lw x7,0(x30) +800020b8: 01a38863 beq x7,x26,800020c8 +800020bc: 45c0346f jal x8,80005518 +800020c0: 800020b0 .word 0x800020b0 +800020c4: 8000c4ce .word 0x8000c4ce +800020c8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x7fffffff +800020cc: 00062b03 lw x22,0(x12) +800020d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xffffffff +800020d4: 00062c03 lw x24,0(x12) +800020d8: 00460613 addi x12,x12,4 + +800020dc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sig1l x6, x22, x24 # perform operation +800020dc: 578b0333 sha512sig1l x6,x22,x24 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e0: 000f2383 lw x7,0(x30) +800020e4: 00638863 beq x7,x6,800020f4 +800020e8: 4300346f jal x8,80005518 +800020ec: 800020dc .word 0x800020dc +800020f0: 8000c534 .word 0x8000c534 +800020f4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x7fffffff +800020f8: 00062b03 lw x22,0(x12) +800020fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xfffffffe +80002100: 00062a83 lw x21,0(x12) +80002104: 00460613 addi x12,x12,4 + +80002108 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sig1l x17, x22, x21 # perform operation +80002108: 575b08b3 sha512sig1l x17,x22,x21 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000210c: 000f2383 lw x7,0(x30) +80002110: 01138863 beq x7,x17,80002120 +80002114: 4040346f jal x8,80005518 +80002118: 80002108 .word 0x80002108 +8000211c: 8000c59a .word 0x8000c59a +80002120: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x7fffffff +80002124: 00062a83 lw x21,0(x12) +80002128: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x5bbc8872 +8000212c: 00062e83 lw x29,0(x12) +80002130: 00460613 addi x12,x12,4 + +80002134 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sig1l x1, x21, x29 # perform operation +80002134: 57da80b3 sha512sig1l x1,x21,x29 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002138: 000f2383 lw x7,0(x30) +8000213c: 00138863 beq x7,x1,8000214c +80002140: 3d80346f jal x8,80005518 +80002144: 80002134 .word 0x80002134 +80002148: 8000c600 .word 0x8000c600 +8000214c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x7fffffff +80002150: 00062f83 lw x31,0(x12) +80002154: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xaaaaaaaa +80002158: 00062883 lw x17,0(x12) +8000215c: 00460613 addi x12,x12,4 + +80002160 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sig1l x1, x31, x17 # perform operation +80002160: 571f80b3 sha512sig1l x1,x31,x17 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002164: 000f2383 lw x7,0(x30) +80002168: 00138863 beq x7,x1,80002178 +8000216c: 3ac0346f jal x8,80005518 +80002170: 80002160 .word 0x80002160 +80002174: 8000c666 .word 0x8000c666 +80002178: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7fffffff +8000217c: 00062083 lw x1,0(x12) +80002180: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x55555555 +80002184: 00062a03 lw x20,0(x12) +80002188: 00460613 addi x12,x12,4 + +8000218c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sig1l x28, x1, x20 # perform operation +8000218c: 57408e33 sha512sig1l x28,x1,x20 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002190: 000f2383 lw x7,0(x30) +80002194: 01c38863 beq x7,x28,800021a4 +80002198: 3800346f jal x8,80005518 +8000219c: 8000218c .word 0x8000218c +800021a0: 8000c6cc .word 0x8000c6cc +800021a4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x7ffffffe +800021a8: 00062883 lw x17,0(x12) +800021ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x00000000 +800021b0: 00062103 lw x2,0(x12) +800021b4: 00460613 addi x12,x12,4 + +800021b8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sig1l x10, x17, x2 # perform operation +800021b8: 56288533 sha512sig1l x10,x17,x2 + # Check if x10 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x10, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021bc: 000f2383 lw x7,0(x30) +800021c0: 00a38863 beq x7,x10,800021d0 +800021c4: 3540346f jal x8,80005518 +800021c8: 800021b8 .word 0x800021b8 +800021cc: 8000c732 .word 0x8000c732 +800021d0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x7ffffffe +800021d4: 00062d83 lw x27,0(x12) +800021d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000001 +800021dc: 00062683 lw x13,0(x12) +800021e0: 00460613 addi x12,x12,4 + +800021e4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sig1l x21, x27, x13 # perform operation +800021e4: 56dd8ab3 sha512sig1l x21,x27,x13 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e8: 000f2383 lw x7,0(x30) +800021ec: 01538863 beq x7,x21,800021fc +800021f0: 3280346f jal x8,80005518 +800021f4: 800021e4 .word 0x800021e4 +800021f8: 8000c791 .word 0x8000c791 +800021fc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x7ffffffe +80002200: 00062d83 lw x27,0(x12) +80002204: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x00000002 +80002208: 00062503 lw x10,0(x12) +8000220c: 00460613 addi x12,x12,4 + +80002210 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sig1l x14, x27, x10 # perform operation +80002210: 56ad8733 sha512sig1l x14,x27,x10 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002214: 000f2383 lw x7,0(x30) +80002218: 00e38863 beq x7,x14,80002228 +8000221c: 2fc0346f jal x8,80005518 +80002220: 80002210 .word 0x80002210 +80002224: 8000c7f0 .word 0x8000c7f0 +80002228: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7ffffffe +8000222c: 00062083 lw x1,0(x12) +80002230: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x80000000 +80002234: 00062883 lw x17,0(x12) +80002238: 00460613 addi x12,x12,4 + +8000223c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sig1l x3, x1, x17 # perform operation +8000223c: 571081b3 sha512sig1l x3,x1,x17 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002240: 000f2383 lw x7,0(x30) +80002244: 00338863 beq x7,x3,80002254 +80002248: 2d00346f jal x8,80005518 +8000224c: 8000223c .word 0x8000223c +80002250: 8000c84f .word 0x8000c84f +80002254: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7ffffffe +80002258: 00062483 lw x9,0(x12) +8000225c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x80000001 +80002260: 00062a03 lw x20,0(x12) +80002264: 00460613 addi x12,x12,4 + +80002268 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sig1l x11, x9, x20 # perform operation +80002268: 574485b3 sha512sig1l x11,x9,x20 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000226c: 000f2383 lw x7,0(x30) +80002270: 00b38863 beq x7,x11,80002280 +80002274: 2a40346f jal x8,80005518 +80002278: 80002268 .word 0x80002268 +8000227c: 8000c8b5 .word 0x8000c8b5 +80002280: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7ffffffe +80002284: 00062483 lw x9,0(x12) +80002288: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7fffffff +8000228c: 00062c03 lw x24,0(x12) +80002290: 00460613 addi x12,x12,4 + +80002294 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sig1l x16, x9, x24 # perform operation +80002294: 57848833 sha512sig1l x16,x9,x24 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002298: 000f2383 lw x7,0(x30) +8000229c: 01038863 beq x7,x16,800022ac +800022a0: 2780346f jal x8,80005518 +800022a4: 80002294 .word 0x80002294 +800022a8: 8000c91b .word 0x8000c91b +800022ac: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7ffffffe +800022b0: 00062783 lw x15,0(x12) +800022b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x7ffffffe +800022b8: 00062103 lw x2,0(x12) +800022bc: 00460613 addi x12,x12,4 + +800022c0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sig1l x26, x15, x2 # perform operation +800022c0: 56278d33 sha512sig1l x26,x15,x2 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c4: 000f2383 lw x7,0(x30) +800022c8: 01a38863 beq x7,x26,800022d8 +800022cc: 24c0346f jal x8,80005518 +800022d0: 800022c0 .word 0x800022c0 +800022d4: 8000c981 .word 0x8000c981 +800022d8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7ffffffe +800022dc: 00062e83 lw x29,0(x12) +800022e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xffffffff +800022e4: 00062083 lw x1,0(x12) +800022e8: 00460613 addi x12,x12,4 + +800022ec : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sig1l x17, x29, x1 # perform operation +800022ec: 561e88b3 sha512sig1l x17,x29,x1 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f0: 000f2383 lw x7,0(x30) +800022f4: 01138863 beq x7,x17,80002304 +800022f8: 2200346f jal x8,80005518 +800022fc: 800022ec .word 0x800022ec +80002300: 8000c9e7 .word 0x8000c9e7 +80002304: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x7ffffffe +80002308: 00062583 lw x11,0(x12) +8000230c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xfffffffe +80002310: 00062083 lw x1,0(x12) +80002314: 00460613 addi x12,x12,4 + +80002318 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sig1l x29, x11, x1 # perform operation +80002318: 56158eb3 sha512sig1l x29,x11,x1 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000231c: 000f2383 lw x7,0(x30) +80002320: 01d38863 beq x7,x29,80002330 +80002324: 1f40346f jal x8,80005518 +80002328: 80002318 .word 0x80002318 +8000232c: 8000ca4d .word 0x8000ca4d +80002330: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x7ffffffe +80002334: 00062e03 lw x28,0(x12) +80002338: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x5bbc8872 +8000233c: 00062f83 lw x31,0(x12) +80002340: 00460613 addi x12,x12,4 + +80002344 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sig1l x20, x28, x31 # perform operation +80002344: 57fe0a33 sha512sig1l x20,x28,x31 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002348: 000f2383 lw x7,0(x30) +8000234c: 01438863 beq x7,x20,8000235c +80002350: 1c80346f jal x8,80005518 +80002354: 80002344 .word 0x80002344 +80002358: 8000cab3 .word 0x8000cab3 +8000235c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x7ffffffe +80002360: 00062f83 lw x31,0(x12) +80002364: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xaaaaaaaa +80002368: 00062203 lw x4,0(x12) +8000236c: 00460613 addi x12,x12,4 + +80002370 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sig1l x2, x31, x4 # perform operation +80002370: 564f8133 sha512sig1l x2,x31,x4 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002374: 000f2383 lw x7,0(x30) +80002378: 00238863 beq x7,x2,80002388 +8000237c: 19c0346f jal x8,80005518 +80002380: 80002370 .word 0x80002370 +80002384: 8000cb19 .word 0x8000cb19 +80002388: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7ffffffe +8000238c: 00062783 lw x15,0(x12) +80002390: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x55555555 +80002394: 00062683 lw x13,0(x12) +80002398: 00460613 addi x12,x12,4 + +8000239c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sig1l x1, x15, x13 # perform operation +8000239c: 56d780b3 sha512sig1l x1,x15,x13 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a0: 000f2383 lw x7,0(x30) +800023a4: 00138863 beq x7,x1,800023b4 +800023a8: 1700346f jal x8,80005518 +800023ac: 8000239c .word 0x8000239c +800023b0: 8000cb7f .word 0x8000cb7f +800023b4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xffffffff +800023b8: 00062183 lw x3,0(x12) +800023bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x00000000 +800023c0: 00062d83 lw x27,0(x12) +800023c4: 00460613 addi x12,x12,4 + +800023c8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sig1l x18, x3, x27 # perform operation +800023c8: 57b18933 sha512sig1l x18,x3,x27 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023cc: 000f2383 lw x7,0(x30) +800023d0: 01238863 beq x7,x18,800023e0 +800023d4: 1440346f jal x8,80005518 +800023d8: 800023c8 .word 0x800023c8 +800023dc: 8000cbe5 .word 0x8000cbe5 +800023e0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xffffffff +800023e4: 00062183 lw x3,0(x12) +800023e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +800023ec: 00062c83 lw x25,0(x12) +800023f0: 00460613 addi x12,x12,4 + +800023f4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sig1l x6, x3, x25 # perform operation +800023f4: 57918333 sha512sig1l x6,x3,x25 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f8: 000f2383 lw x7,0(x30) +800023fc: 00638863 beq x7,x6,8000240c +80002400: 1180346f jal x8,80005518 +80002404: 800023f4 .word 0x800023f4 +80002408: 8000cc44 .word 0x8000cc44 +8000240c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xffffffff +80002410: 00062903 lw x18,0(x12) +80002414: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000002 +80002418: 00062e03 lw x28,0(x12) +8000241c: 00460613 addi x12,x12,4 + +80002420 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sig1l x6, x18, x28 # perform operation +80002420: 57c90333 sha512sig1l x6,x18,x28 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002424: 000f2383 lw x7,0(x30) +80002428: 00638863 beq x7,x6,80002438 +8000242c: 0ec0346f jal x8,80005518 +80002430: 80002420 .word 0x80002420 +80002434: 8000cca3 .word 0x8000cca3 +80002438: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xffffffff +8000243c: 00062303 lw x6,0(x12) +80002440: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x80000000 +80002444: 00062d83 lw x27,0(x12) +80002448: 00460613 addi x12,x12,4 + +8000244c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sig1l x24, x6, x27 # perform operation +8000244c: 57b30c33 sha512sig1l x24,x6,x27 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002450: 000f2383 lw x7,0(x30) +80002454: 01838863 beq x7,x24,80002464 +80002458: 0c00346f jal x8,80005518 +8000245c: 8000244c .word 0x8000244c +80002460: 8000cd02 .word 0x8000cd02 +80002464: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xffffffff +80002468: 00062183 lw x3,0(x12) +8000246c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000001 +80002470: 00062483 lw x9,0(x12) +80002474: 00460613 addi x12,x12,4 + +80002478 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sig1l x19, x3, x9 # perform operation +80002478: 569189b3 sha512sig1l x19,x3,x9 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000247c: 000f2383 lw x7,0(x30) +80002480: 01338863 beq x7,x19,80002490 +80002484: 0940346f jal x8,80005518 +80002488: 80002478 .word 0x80002478 +8000248c: 8000cd68 .word 0x8000cd68 +80002490: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xffffffff +80002494: 00062d03 lw x26,0(x12) +80002498: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x7fffffff +8000249c: 00062803 lw x16,0(x12) +800024a0: 00460613 addi x12,x12,4 + +800024a4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sig1l x20, x26, x16 # perform operation +800024a4: 570d0a33 sha512sig1l x20,x26,x16 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a8: 000f2383 lw x7,0(x30) +800024ac: 01438863 beq x7,x20,800024bc +800024b0: 0680346f jal x8,80005518 +800024b4: 800024a4 .word 0x800024a4 +800024b8: 8000cdce .word 0x8000cdce +800024bc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +800024c0: 00062783 lw x15,0(x12) +800024c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7ffffffe +800024c8: 00062d03 lw x26,0(x12) +800024cc: 00460613 addi x12,x12,4 + +800024d0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sig1l x24, x15, x26 # perform operation +800024d0: 57a78c33 sha512sig1l x24,x15,x26 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d4: 000f2383 lw x7,0(x30) +800024d8: 01838863 beq x7,x24,800024e8 +800024dc: 03c0346f jal x8,80005518 +800024e0: 800024d0 .word 0x800024d0 +800024e4: 8000ce34 .word 0x8000ce34 +800024e8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xffffffff +800024ec: 00062e83 lw x29,0(x12) +800024f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xffffffff +800024f4: 00062f83 lw x31,0(x12) +800024f8: 00460613 addi x12,x12,4 + +800024fc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sig1l x24, x29, x31 # perform operation +800024fc: 57fe8c33 sha512sig1l x24,x29,x31 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002500: 000f2383 lw x7,0(x30) +80002504: 01838863 beq x7,x24,80002514 +80002508: 0100346f jal x8,80005518 +8000250c: 800024fc .word 0x800024fc +80002510: 8000ce9a .word 0x8000ce9a +80002514: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xffffffff +80002518: 00062703 lw x14,0(x12) +8000251c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xfffffffe +80002520: 00062a03 lw x20,0(x12) +80002524: 00460613 addi x12,x12,4 + +80002528 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sig1l x4, x14, x20 # perform operation +80002528: 57470233 sha512sig1l x4,x14,x20 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000252c: 000f2383 lw x7,0(x30) +80002530: 00438863 beq x7,x4,80002540 +80002534: 7e50246f jal x8,80005518 +80002538: 80002528 .word 0x80002528 +8000253c: 8000cf00 .word 0x8000cf00 +80002540: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xffffffff +80002544: 00062983 lw x19,0(x12) +80002548: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x5bbc8872 +8000254c: 00062883 lw x17,0(x12) +80002550: 00460613 addi x12,x12,4 + +80002554 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sig1l x2, x19, x17 # perform operation +80002554: 57198133 sha512sig1l x2,x19,x17 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002558: 000f2383 lw x7,0(x30) +8000255c: 00238863 beq x7,x2,8000256c +80002560: 7b90246f jal x8,80005518 +80002564: 80002554 .word 0x80002554 +80002568: 8000cf66 .word 0x8000cf66 +8000256c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xffffffff +80002570: 00062683 lw x13,0(x12) +80002574: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xaaaaaaaa +80002578: 00062283 lw x5,0(x12) +8000257c: 00460613 addi x12,x12,4 + +80002580 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sig1l x1, x13, x5 # perform operation +80002580: 565680b3 sha512sig1l x1,x13,x5 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002584: 000f2383 lw x7,0(x30) +80002588: 00138863 beq x7,x1,80002598 +8000258c: 78d0246f jal x8,80005518 +80002590: 80002580 .word 0x80002580 +80002594: 8000cfcc .word 0x8000cfcc +80002598: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xffffffff +8000259c: 00062d83 lw x27,0(x12) +800025a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x55555555 +800025a4: 00062083 lw x1,0(x12) +800025a8: 00460613 addi x12,x12,4 + +800025ac : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sig1l x26, x27, x1 # perform operation +800025ac: 561d8d33 sha512sig1l x26,x27,x1 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b0: 000f2383 lw x7,0(x30) +800025b4: 01a38863 beq x7,x26,800025c4 +800025b8: 7610246f jal x8,80005518 +800025bc: 800025ac .word 0x800025ac +800025c0: 8000d032 .word 0x8000d032 +800025c4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xfffffffe +800025c8: 00062583 lw x11,0(x12) +800025cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x00000000 +800025d0: 00062483 lw x9,0(x12) +800025d4: 00460613 addi x12,x12,4 + +800025d8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sig1l x24, x11, x9 # perform operation +800025d8: 56958c33 sha512sig1l x24,x11,x9 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025dc: 000f2383 lw x7,0(x30) +800025e0: 01838863 beq x7,x24,800025f0 +800025e4: 7350246f jal x8,80005518 +800025e8: 800025d8 .word 0x800025d8 +800025ec: 8000d098 .word 0x8000d098 +800025f0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xfffffffe +800025f4: 00062083 lw x1,0(x12) +800025f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000001 +800025fc: 00062683 lw x13,0(x12) +80002600: 00460613 addi x12,x12,4 + +80002604 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sig1l x5, x1, x13 # perform operation +80002604: 56d082b3 sha512sig1l x5,x1,x13 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002608: 000f2383 lw x7,0(x30) +8000260c: 00538863 beq x7,x5,8000261c +80002610: 7090246f jal x8,80005518 +80002614: 80002604 .word 0x80002604 +80002618: 8000d0f7 .word 0x8000d0f7 +8000261c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xfffffffe +80002620: 00062083 lw x1,0(x12) +80002624: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000002 +80002628: 00062e83 lw x29,0(x12) +8000262c: 00460613 addi x12,x12,4 + +80002630 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sig1l x5, x1, x29 # perform operation +80002630: 57d082b3 sha512sig1l x5,x1,x29 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002634: 000f2383 lw x7,0(x30) +80002638: 00538863 beq x7,x5,80002648 +8000263c: 6dd0246f jal x8,80005518 +80002640: 80002630 .word 0x80002630 +80002644: 8000d156 .word 0x8000d156 +80002648: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xfffffffe +8000264c: 00062c03 lw x24,0(x12) +80002650: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x80000000 +80002654: 00062a83 lw x21,0(x12) +80002658: 00460613 addi x12,x12,4 + +8000265c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sig1l x1, x24, x21 # perform operation +8000265c: 575c00b3 sha512sig1l x1,x24,x21 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002660: 000f2383 lw x7,0(x30) +80002664: 00138863 beq x7,x1,80002674 +80002668: 6b10246f jal x8,80005518 +8000266c: 8000265c .word 0x8000265c +80002670: 8000d1b5 .word 0x8000d1b5 +80002674: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xfffffffe +80002678: 00062483 lw x9,0(x12) +8000267c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x80000001 +80002680: 00062983 lw x19,0(x12) +80002684: 00460613 addi x12,x12,4 + +80002688 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sig1l x13, x9, x19 # perform operation +80002688: 573486b3 sha512sig1l x13,x9,x19 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000268c: 000f2383 lw x7,0(x30) +80002690: 00d38863 beq x7,x13,800026a0 +80002694: 6850246f jal x8,80005518 +80002698: 80002688 .word 0x80002688 +8000269c: 8000d21b .word 0x8000d21b +800026a0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xfffffffe +800026a4: 00062b83 lw x23,0(x12) +800026a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x7fffffff +800026ac: 00062183 lw x3,0(x12) +800026b0: 00460613 addi x12,x12,4 + +800026b4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sig1l x22, x23, x3 # perform operation +800026b4: 563b8b33 sha512sig1l x22,x23,x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b8: 000f2383 lw x7,0(x30) +800026bc: 01638863 beq x7,x22,800026cc +800026c0: 6590246f jal x8,80005518 +800026c4: 800026b4 .word 0x800026b4 +800026c8: 8000d281 .word 0x8000d281 +800026cc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xfffffffe +800026d0: 00062e83 lw x29,0(x12) +800026d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x7ffffffe +800026d8: 00062283 lw x5,0(x12) +800026dc: 00460613 addi x12,x12,4 + +800026e0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sig1l x23, x29, x5 # perform operation +800026e0: 565e8bb3 sha512sig1l x23,x29,x5 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e4: 000f2383 lw x7,0(x30) +800026e8: 01738863 beq x7,x23,800026f8 +800026ec: 62d0246f jal x8,80005518 +800026f0: 800026e0 .word 0x800026e0 +800026f4: 8000d2e7 .word 0x8000d2e7 +800026f8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xfffffffe +800026fc: 00062883 lw x17,0(x12) +80002700: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xffffffff +80002704: 00062903 lw x18,0(x12) +80002708: 00460613 addi x12,x12,4 + +8000270c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sig1l x1, x17, x18 # perform operation +8000270c: 572880b3 sha512sig1l x1,x17,x18 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002710: 000f2383 lw x7,0(x30) +80002714: 00138863 beq x7,x1,80002724 +80002718: 6010246f jal x8,80005518 +8000271c: 8000270c .word 0x8000270c +80002720: 8000d34d .word 0x8000d34d +80002724: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xfffffffe +80002728: 00062d83 lw x27,0(x12) +8000272c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xfffffffe +80002730: 00062103 lw x2,0(x12) +80002734: 00460613 addi x12,x12,4 + +80002738 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sig1l x16, x27, x2 # perform operation +80002738: 562d8833 sha512sig1l x16,x27,x2 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000273c: 000f2383 lw x7,0(x30) +80002740: 01038863 beq x7,x16,80002750 +80002744: 5d50246f jal x8,80005518 +80002748: 80002738 .word 0x80002738 +8000274c: 8000d3b3 .word 0x8000d3b3 +80002750: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xfffffffe +80002754: 00062503 lw x10,0(x12) +80002758: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x5bbc8872 +8000275c: 00062b83 lw x23,0(x12) +80002760: 00460613 addi x12,x12,4 + +80002764 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sig1l x25, x10, x23 # perform operation +80002764: 57750cb3 sha512sig1l x25,x10,x23 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002768: 000f2383 lw x7,0(x30) +8000276c: 01938863 beq x7,x25,8000277c +80002770: 5a90246f jal x8,80005518 +80002774: 80002764 .word 0x80002764 +80002778: 8000d419 .word 0x8000d419 +8000277c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xfffffffe +80002780: 00062583 lw x11,0(x12) +80002784: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xaaaaaaaa +80002788: 00062703 lw x14,0(x12) +8000278c: 00460613 addi x12,x12,4 + +80002790 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sig1l x21, x11, x14 # perform operation +80002790: 56e58ab3 sha512sig1l x21,x11,x14 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002794: 000f2383 lw x7,0(x30) +80002798: 01538863 beq x7,x21,800027a8 +8000279c: 57d0246f jal x8,80005518 +800027a0: 80002790 .word 0x80002790 +800027a4: 8000d47f .word 0x8000d47f +800027a8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xfffffffe +800027ac: 00062483 lw x9,0(x12) +800027b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x55555555 +800027b4: 00062f83 lw x31,0(x12) +800027b8: 00460613 addi x12,x12,4 + +800027bc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sig1l x25, x9, x31 # perform operation +800027bc: 57f48cb3 sha512sig1l x25,x9,x31 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c0: 000f2383 lw x7,0(x30) +800027c4: 01938863 beq x7,x25,800027d4 +800027c8: 5510246f jal x8,80005518 +800027cc: 800027bc .word 0x800027bc +800027d0: 8000d4e5 .word 0x8000d4e5 +800027d4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +800027d8: 00062583 lw x11,0(x12) +800027dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x00000000 +800027e0: 00062203 lw x4,0(x12) +800027e4: 00460613 addi x12,x12,4 + +800027e8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sig1l x26, x11, x4 # perform operation +800027e8: 56458d33 sha512sig1l x26,x11,x4 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027ec: 000f2383 lw x7,0(x30) +800027f0: 01a38863 beq x7,x26,80002800 +800027f4: 5250246f jal x8,80005518 +800027f8: 800027e8 .word 0x800027e8 +800027fc: 8000d54b .word 0x8000d54b +80002800: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x5bbc8872 +80002804: 00062c03 lw x24,0(x12) +80002808: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x00000001 +8000280c: 00062f83 lw x31,0(x12) +80002810: 00460613 addi x12,x12,4 + +80002814 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sig1l x15, x24, x31 # perform operation +80002814: 57fc07b3 sha512sig1l x15,x24,x31 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002818: 000f2383 lw x7,0(x30) +8000281c: 00f38863 beq x7,x15,8000282c +80002820: 4f90246f jal x8,80005518 +80002824: 80002814 .word 0x80002814 +80002828: 8000d5aa .word 0x8000d5aa +8000282c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x5bbc8872 +80002830: 00062c83 lw x25,0(x12) +80002834: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000002 +80002838: 00062c03 lw x24,0(x12) +8000283c: 00460613 addi x12,x12,4 + +80002840 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sig1l x21, x25, x24 # perform operation +80002840: 578c8ab3 sha512sig1l x21,x25,x24 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002844: 000f2383 lw x7,0(x30) +80002848: 01538863 beq x7,x21,80002858 +8000284c: 4cd0246f jal x8,80005518 +80002850: 80002840 .word 0x80002840 +80002854: 8000d609 .word 0x8000d609 +80002858: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x5bbc8872 +8000285c: 00062983 lw x19,0(x12) +80002860: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x80000000 +80002864: 00062283 lw x5,0(x12) +80002868: 00460613 addi x12,x12,4 + +8000286c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sig1l x4, x19, x5 # perform operation +8000286c: 56598233 sha512sig1l x4,x19,x5 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002870: 000f2383 lw x7,0(x30) +80002874: 00438863 beq x7,x4,80002884 +80002878: 4a10246f jal x8,80005518 +8000287c: 8000286c .word 0x8000286c +80002880: 8000d668 .word 0x8000d668 +80002884: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x5bbc8872 +80002888: 00062983 lw x19,0(x12) +8000288c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x80000001 +80002890: 00062903 lw x18,0(x12) +80002894: 00460613 addi x12,x12,4 + +80002898 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sig1l x25, x19, x18 # perform operation +80002898: 57298cb3 sha512sig1l x25,x19,x18 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +8000289c: 000f2383 lw x7,0(x30) +800028a0: 01938863 beq x7,x25,800028b0 +800028a4: 4750246f jal x8,80005518 +800028a8: 80002898 .word 0x80002898 +800028ac: 8000d6ce .word 0x8000d6ce +800028b0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x5bbc8872 +800028b4: 00062c83 lw x25,0(x12) +800028b8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x7fffffff +800028bc: 00062b03 lw x22,0(x12) +800028c0: 00460613 addi x12,x12,4 + +800028c4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sig1l x24, x25, x22 # perform operation +800028c4: 576c8c33 sha512sig1l x24,x25,x22 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c8: 000f2383 lw x7,0(x30) +800028cc: 01838863 beq x7,x24,800028dc +800028d0: 4490246f jal x8,80005518 +800028d4: 800028c4 .word 0x800028c4 +800028d8: 8000d734 .word 0x8000d734 +800028dc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5bbc8872 +800028e0: 00062e83 lw x29,0(x12) +800028e4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x7ffffffe +800028e8: 00062703 lw x14,0(x12) +800028ec: 00460613 addi x12,x12,4 + +800028f0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sig1l x24, x29, x14 # perform operation +800028f0: 56ee8c33 sha512sig1l x24,x29,x14 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f4: 000f2383 lw x7,0(x30) +800028f8: 01838863 beq x7,x24,80002908 +800028fc: 41d0246f jal x8,80005518 +80002900: 800028f0 .word 0x800028f0 +80002904: 8000d79a .word 0x8000d79a +80002908: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +8000290c: 00062583 lw x11,0(x12) +80002910: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xffffffff +80002914: 00062d83 lw x27,0(x12) +80002918: 00460613 addi x12,x12,4 + +8000291c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sig1l x2, x11, x27 # perform operation +8000291c: 57b58133 sha512sig1l x2,x11,x27 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002920: 000f2383 lw x7,0(x30) +80002924: 00238863 beq x7,x2,80002934 +80002928: 3f10246f jal x8,80005518 +8000292c: 8000291c .word 0x8000291c +80002930: 8000d800 .word 0x8000d800 +80002934: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +80002938: 00062583 lw x11,0(x12) +8000293c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xfffffffe +80002940: 00062d83 lw x27,0(x12) +80002944: 00460613 addi x12,x12,4 + +80002948 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sig1l x24, x11, x27 # perform operation +80002948: 57b58c33 sha512sig1l x24,x11,x27 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000294c: 000f2383 lw x7,0(x30) +80002950: 01838863 beq x7,x24,80002960 +80002954: 3c50246f jal x8,80005518 +80002958: 80002948 .word 0x80002948 +8000295c: 8000d866 .word 0x8000d866 +80002960: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x5bbc8872 +80002964: 00062b83 lw x23,0(x12) +80002968: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x5bbc8872 +8000296c: 00062783 lw x15,0(x12) +80002970: 00460613 addi x12,x12,4 + +80002974 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sig1l x3, x23, x15 # perform operation +80002974: 56fb81b3 sha512sig1l x3,x23,x15 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002978: 000f2383 lw x7,0(x30) +8000297c: 00338863 beq x7,x3,8000298c +80002980: 3990246f jal x8,80005518 +80002984: 80002974 .word 0x80002974 +80002988: 8000d8cc .word 0x8000d8cc +8000298c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x5bbc8872 +80002990: 00062583 lw x11,0(x12) +80002994: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xaaaaaaaa +80002998: 00062703 lw x14,0(x12) +8000299c: 00460613 addi x12,x12,4 + +800029a0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sig1l x19, x11, x14 # perform operation +800029a0: 56e589b3 sha512sig1l x19,x11,x14 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a4: 000f2383 lw x7,0(x30) +800029a8: 01338863 beq x7,x19,800029b8 +800029ac: 36d0246f jal x8,80005518 +800029b0: 800029a0 .word 0x800029a0 +800029b4: 8000d932 .word 0x8000d932 +800029b8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x5bbc8872 +800029bc: 00062903 lw x18,0(x12) +800029c0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x55555555 +800029c4: 00062b83 lw x23,0(x12) +800029c8: 00460613 addi x12,x12,4 + +800029cc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sig1l x17, x18, x23 # perform operation +800029cc: 577908b3 sha512sig1l x17,x18,x23 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d0: 000f2383 lw x7,0(x30) +800029d4: 01138863 beq x7,x17,800029e4 +800029d8: 3410246f jal x8,80005518 +800029dc: 800029cc .word 0x800029cc +800029e0: 8000d998 .word 0x8000d998 +800029e4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xaaaaaaaa +800029e8: 00062e83 lw x29,0(x12) +800029ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x00000000 +800029f0: 00062a03 lw x20,0(x12) +800029f4: 00460613 addi x12,x12,4 + +800029f8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sig1l x4, x29, x20 # perform operation +800029f8: 574e8233 sha512sig1l x4,x29,x20 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029fc: 000f2383 lw x7,0(x30) +80002a00: 00438863 beq x7,x4,80002a10 +80002a04: 3150246f jal x8,80005518 +80002a08: 800029f8 .word 0x800029f8 +80002a0c: 8000d9fe .word 0x8000d9fe +80002a10: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xaaaaaaaa +80002a14: 00062b03 lw x22,0(x12) +80002a18: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x00000001 +80002a1c: 00062283 lw x5,0(x12) +80002a20: 00460613 addi x12,x12,4 + +80002a24 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sig1l x18, x22, x5 # perform operation +80002a24: 565b0933 sha512sig1l x18,x22,x5 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a28: 000f2383 lw x7,0(x30) +80002a2c: 01238863 beq x7,x18,80002a3c +80002a30: 2e90246f jal x8,80005518 +80002a34: 80002a24 .word 0x80002a24 +80002a38: 8000da5d .word 0x8000da5d +80002a3c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xaaaaaaaa +80002a40: 00062483 lw x9,0(x12) +80002a44: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x00000002 +80002a48: 00062903 lw x18,0(x12) +80002a4c: 00460613 addi x12,x12,4 + +80002a50 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sig1l x29, x9, x18 # perform operation +80002a50: 57248eb3 sha512sig1l x29,x9,x18 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a54: 000f2383 lw x7,0(x30) +80002a58: 01d38863 beq x7,x29,80002a68 +80002a5c: 2bd0246f jal x8,80005518 +80002a60: 80002a50 .word 0x80002a50 +80002a64: 8000dabc .word 0x8000dabc +80002a68: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xaaaaaaaa +80002a6c: 00062503 lw x10,0(x12) +80002a70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x80000000 +80002a74: 00062483 lw x9,0(x12) +80002a78: 00460613 addi x12,x12,4 + +80002a7c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sig1l x31, x10, x9 # perform operation +80002a7c: 56950fb3 sha512sig1l x31,x10,x9 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a80: 000f2383 lw x7,0(x30) +80002a84: 01f38863 beq x7,x31,80002a94 +80002a88: 2910246f jal x8,80005518 +80002a8c: 80002a7c .word 0x80002a7c +80002a90: 8000db1b .word 0x8000db1b +80002a94: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xaaaaaaaa +80002a98: 00062503 lw x10,0(x12) +80002a9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x80000001 +80002aa0: 00062e03 lw x28,0(x12) +80002aa4: 00460613 addi x12,x12,4 + +80002aa8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sig1l x27, x10, x28 # perform operation +80002aa8: 57c50db3 sha512sig1l x27,x10,x28 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aac: 000f2383 lw x7,0(x30) +80002ab0: 01b38863 beq x7,x27,80002ac0 +80002ab4: 2650246f jal x8,80005518 +80002ab8: 80002aa8 .word 0x80002aa8 +80002abc: 8000db81 .word 0x8000db81 +80002ac0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xaaaaaaaa +80002ac4: 00062083 lw x1,0(x12) +80002ac8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7fffffff +80002acc: 00062b83 lw x23,0(x12) +80002ad0: 00460613 addi x12,x12,4 + +80002ad4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sig1l x10, x1, x23 # perform operation +80002ad4: 57708533 sha512sig1l x10,x1,x23 + # Check if x10 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x10, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad8: 000f2383 lw x7,0(x30) +80002adc: 00a38863 beq x7,x10,80002aec +80002ae0: 2390246f jal x8,80005518 +80002ae4: 80002ad4 .word 0x80002ad4 +80002ae8: 8000dbe7 .word 0x8000dbe7 +80002aec: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xaaaaaaaa +80002af0: 00062483 lw x9,0(x12) +80002af4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7ffffffe +80002af8: 00062c03 lw x24,0(x12) +80002afc: 00460613 addi x12,x12,4 + +80002b00 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sig1l x25, x9, x24 # perform operation +80002b00: 57848cb3 sha512sig1l x25,x9,x24 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b04: 000f2383 lw x7,0(x30) +80002b08: 01938863 beq x7,x25,80002b18 +80002b0c: 20d0246f jal x8,80005518 +80002b10: 80002b00 .word 0x80002b00 +80002b14: 8000dc4d .word 0x8000dc4d +80002b18: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xaaaaaaaa +80002b1c: 00062283 lw x5,0(x12) +80002b20: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xffffffff +80002b24: 00062583 lw x11,0(x12) +80002b28: 00460613 addi x12,x12,4 + +80002b2c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sig1l x6, x5, x11 # perform operation +80002b2c: 56b28333 sha512sig1l x6,x5,x11 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b30: 000f2383 lw x7,0(x30) +80002b34: 00638863 beq x7,x6,80002b44 +80002b38: 1e10246f jal x8,80005518 +80002b3c: 80002b2c .word 0x80002b2c +80002b40: 8000dcb3 .word 0x8000dcb3 +80002b44: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xaaaaaaaa +80002b48: 00062283 lw x5,0(x12) +80002b4c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xfffffffe +80002b50: 00062903 lw x18,0(x12) +80002b54: 00460613 addi x12,x12,4 + +80002b58 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sig1l x9, x5, x18 # perform operation +80002b58: 572284b3 sha512sig1l x9,x5,x18 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b5c: 000f2383 lw x7,0(x30) +80002b60: 00938863 beq x7,x9,80002b70 +80002b64: 1b50246f jal x8,80005518 +80002b68: 80002b58 .word 0x80002b58 +80002b6c: 8000dd19 .word 0x8000dd19 +80002b70: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xaaaaaaaa +80002b74: 00062f83 lw x31,0(x12) +80002b78: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5bbc8872 +80002b7c: 00062a83 lw x21,0(x12) +80002b80: 00460613 addi x12,x12,4 + +80002b84 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sig1l x14, x31, x21 # perform operation +80002b84: 575f8733 sha512sig1l x14,x31,x21 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b88: 000f2383 lw x7,0(x30) +80002b8c: 00e38863 beq x7,x14,80002b9c +80002b90: 1890246f jal x8,80005518 +80002b94: 80002b84 .word 0x80002b84 +80002b98: 8000dd7f .word 0x8000dd7f +80002b9c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xaaaaaaaa +80002ba0: 00062483 lw x9,0(x12) +80002ba4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xaaaaaaaa +80002ba8: 00062a83 lw x21,0(x12) +80002bac: 00460613 addi x12,x12,4 + +80002bb0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sig1l x4, x9, x21 # perform operation +80002bb0: 57548233 sha512sig1l x4,x9,x21 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb4: 000f2383 lw x7,0(x30) +80002bb8: 00438863 beq x7,x4,80002bc8 +80002bbc: 15d0246f jal x8,80005518 +80002bc0: 80002bb0 .word 0x80002bb0 +80002bc4: 8000dde5 .word 0x8000dde5 +80002bc8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xaaaaaaaa +80002bcc: 00062103 lw x2,0(x12) +80002bd0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x55555555 +80002bd4: 00062c03 lw x24,0(x12) +80002bd8: 00460613 addi x12,x12,4 + +80002bdc : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sig1l x17, x2, x24 # perform operation +80002bdc: 578108b3 sha512sig1l x17,x2,x24 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be0: 000f2383 lw x7,0(x30) +80002be4: 01138863 beq x7,x17,80002bf4 +80002be8: 1310246f jal x8,80005518 +80002bec: 80002bdc .word 0x80002bdc +80002bf0: 8000de4b .word 0x8000de4b +80002bf4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x55555555 +80002bf8: 00062983 lw x19,0(x12) +80002bfc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000000 +80002c00: 00062b03 lw x22,0(x12) +80002c04: 00460613 addi x12,x12,4 + +80002c08 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sig1l x23, x19, x22 # perform operation +80002c08: 57698bb3 sha512sig1l x23,x19,x22 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c0c: 000f2383 lw x7,0(x30) +80002c10: 01738863 beq x7,x23,80002c20 +80002c14: 1050246f jal x8,80005518 +80002c18: 80002c08 .word 0x80002c08 +80002c1c: 8000deb1 .word 0x8000deb1 +80002c20: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x55555555 +80002c24: 00062b83 lw x23,0(x12) +80002c28: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000001 +80002c2c: 00062e03 lw x28,0(x12) +80002c30: 00460613 addi x12,x12,4 + +80002c34 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sig1l x17, x23, x28 # perform operation +80002c34: 57cb88b3 sha512sig1l x17,x23,x28 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c38: 000f2383 lw x7,0(x30) +80002c3c: 01138863 beq x7,x17,80002c4c +80002c40: 0d90246f jal x8,80005518 +80002c44: 80002c34 .word 0x80002c34 +80002c48: 8000df10 .word 0x8000df10 +80002c4c: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x55555555 +80002c50: 00062c03 lw x24,0(x12) +80002c54: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x00000002 +80002c58: 00062803 lw x16,0(x12) +80002c5c: 00460613 addi x12,x12,4 + +80002c60 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sig1l x5, x24, x16 # perform operation +80002c60: 570c02b3 sha512sig1l x5,x24,x16 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c64: 000f2383 lw x7,0(x30) +80002c68: 00538863 beq x7,x5,80002c78 +80002c6c: 0ad0246f jal x8,80005518 +80002c70: 80002c60 .word 0x80002c60 +80002c74: 8000df6f .word 0x8000df6f +80002c78: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x55555555 +80002c7c: 00062d03 lw x26,0(x12) +80002c80: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x80000000 +80002c84: 00062783 lw x15,0(x12) +80002c88: 00460613 addi x12,x12,4 + +80002c8c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sig1l x24, x26, x15 # perform operation +80002c8c: 56fd0c33 sha512sig1l x24,x26,x15 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c90: 000f2383 lw x7,0(x30) +80002c94: 01838863 beq x7,x24,80002ca4 +80002c98: 0810246f jal x8,80005518 +80002c9c: 80002c8c .word 0x80002c8c +80002ca0: 8000dfce .word 0x8000dfce +80002ca4: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x55555555 +80002ca8: 00062703 lw x14,0(x12) +80002cac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x80000001 +80002cb0: 00062803 lw x16,0(x12) +80002cb4: 00460613 addi x12,x12,4 + +80002cb8 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sig1l x23, x14, x16 # perform operation +80002cb8: 57070bb3 sha512sig1l x23,x14,x16 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cbc: 000f2383 lw x7,0(x30) +80002cc0: 01738863 beq x7,x23,80002cd0 +80002cc4: 0550246f jal x8,80005518 +80002cc8: 80002cb8 .word 0x80002cb8 +80002ccc: 8000e034 .word 0x8000e034 +80002cd0: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x55555555 +80002cd4: 00062083 lw x1,0(x12) +80002cd8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x7fffffff +80002cdc: 00062d83 lw x27,0(x12) +80002ce0: 00460613 addi x12,x12,4 + +80002ce4 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sig1l x5, x1, x27 # perform operation +80002ce4: 57b082b3 sha512sig1l x5,x1,x27 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce8: 000f2383 lw x7,0(x30) +80002cec: 00538863 beq x7,x5,80002cfc +80002cf0: 0290246f jal x8,80005518 +80002cf4: 80002ce4 .word 0x80002ce4 +80002cf8: 8000e09a .word 0x8000e09a +80002cfc: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x55555555 +80002d00: 00062a83 lw x21,0(x12) +80002d04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x7ffffffe +80002d08: 00062203 lw x4,0(x12) +80002d0c: 00460613 addi x12,x12,4 + +80002d10 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sig1l x24, x21, x4 # perform operation +80002d10: 564a8c33 sha512sig1l x24,x21,x4 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d14: 000f2383 lw x7,0(x30) +80002d18: 01838863 beq x7,x24,80002d28 +80002d1c: 7fc0246f jal x8,80005518 +80002d20: 80002d10 .word 0x80002d10 +80002d24: 8000e100 .word 0x8000e100 +80002d28: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x55555555 +80002d2c: 00062503 lw x10,0(x12) +80002d30: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xffffffff +80002d34: 00062d83 lw x27,0(x12) +80002d38: 00460613 addi x12,x12,4 + +80002d3c : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sig1l x1, x10, x27 # perform operation +80002d3c: 57b500b3 sha512sig1l x1,x10,x27 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d40: 000f2383 lw x7,0(x30) +80002d44: 00138863 beq x7,x1,80002d54 +80002d48: 7d00246f jal x8,80005518 +80002d4c: 80002d3c .word 0x80002d3c +80002d50: 8000e166 .word 0x8000e166 +80002d54: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x55555555 +80002d58: 00062e83 lw x29,0(x12) +80002d5c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xfffffffe +80002d60: 00062803 lw x16,0(x12) +80002d64: 00460613 addi x12,x12,4 + +80002d68 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sig1l x25, x29, x16 # perform operation +80002d68: 570e8cb3 sha512sig1l x25,x29,x16 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d6c: 000f2383 lw x7,0(x30) +80002d70: 01938863 beq x7,x25,80002d80 +80002d74: 7a40246f jal x8,80005518 +80002d78: 80002d68 .word 0x80002d68 +80002d7c: 8000e1cc .word 0x8000e1cc +80002d80: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x55555555 +80002d84: 00062f83 lw x31,0(x12) +80002d88: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x5bbc8872 +80002d8c: 00062e83 lw x29,0(x12) +80002d90: 00460613 addi x12,x12,4 + +80002d94 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sig1l x20, x31, x29 # perform operation +80002d94: 57df8a33 sha512sig1l x20,x31,x29 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d98: 000f2383 lw x7,0(x30) +80002d9c: 01438863 beq x7,x20,80002dac +80002da0: 7780246f jal x8,80005518 +80002da4: 80002d94 .word 0x80002d94 +80002da8: 8000e232 .word 0x8000e232 +80002dac: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x55555555 +80002db0: 00062983 lw x19,0(x12) +80002db4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xaaaaaaaa +80002db8: 00062e83 lw x29,0(x12) +80002dbc: 00460613 addi x12,x12,4 + +80002dc0 : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sig1l x11, x19, x29 # perform operation +80002dc0: 57d985b3 sha512sig1l x11,x19,x29 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc4: 000f2383 lw x7,0(x30) +80002dc8: 00b38863 beq x7,x11,80002dd8 +80002dcc: 74c0246f jal x8,80005518 +80002dd0: 80002dc0 .word 0x80002dc0 +80002dd4: 8000e298 .word 0x8000e298 +80002dd8: 004f0f13 addi x30,x30,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x55555555 +80002ddc: 00062e83 lw x29,0(x12) +80002de0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x55555555 +80002de4: 00062583 lw x11,0(x12) +80002de8: 00460613 addi x12,x12,4 + +80002dec : +Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sig1l x6, x29, x11 # perform operation +80002dec: 56be8333 sha512sig1l x6,x29,x11 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sig1l_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df0: 000f2383 lw x7,0(x30) +80002df4: 00638863 beq x7,x6,80002e04 +80002df8: 7200246f jal x8,80005518 +80002dfc: 80002dec .word 0x80002dec +80002e00: 8000e2fe .word 0x8000e2fe +80002e04: 004f0f13 addi x30,x30,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x57515708 +80002e08: 00062003 lw x0,0(x12) +80002e0c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0xd24c9740 +80002e10: 00062003 lw x0,0(x12) +80002e14: 00460613 addi x12,x12,4 + +80002e18 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b0: + sha512sig1l x21, x0, x0 # perform operation +80002e18: 56000ab3 sha512sig1l x21,x0,x0 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b0, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b0_str) +80002e1c: 000f2383 lw x7,0(x30) +80002e20: 01538863 beq x7,x21,80002e30 +80002e24: 6f40246f jal x8,80005518 +80002e28: 80002e18 .word 0x80002e18 +80002e2c: 8000e364 .word 0x8000e364 +80002e30: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xfd4eff9a +80002e34: 00062083 lw x1,0(x12) +80002e38: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x3fb2ba6b +80002e3c: 00062083 lw x1,0(x12) +80002e40: 00460613 addi x12,x12,4 + +80002e44 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b1: + sha512sig1l x11, x1, x1 # perform operation +80002e44: 561085b3 sha512sig1l x11,x1,x1 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b1, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b1_str) +80002e48: 000f2383 lw x7,0(x30) +80002e4c: 00b38863 beq x7,x11,80002e5c +80002e50: 6c80246f jal x8,80005518 +80002e54: 80002e44 .word 0x80002e44 +80002e58: 8000e3a3 .word 0x8000e3a3 +80002e5c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x996612b6 +80002e60: 00062103 lw x2,0(x12) +80002e64: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xbd7b4769 +80002e68: 00062103 lw x2,0(x12) +80002e6c: 00460613 addi x12,x12,4 + +80002e70 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b2: + sha512sig1l x5, x2, x2 # perform operation +80002e70: 562102b3 sha512sig1l x5,x2,x2 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b2, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b2_str) +80002e74: 000f2383 lw x7,0(x30) +80002e78: 00538863 beq x7,x5,80002e88 +80002e7c: 69c0246f jal x8,80005518 +80002e80: 80002e70 .word 0x80002e70 +80002e84: 8000e3e2 .word 0x8000e3e2 +80002e88: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x184f7ccc +80002e8c: 00062183 lw x3,0(x12) +80002e90: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x1b05b151 +80002e94: 00062183 lw x3,0(x12) +80002e98: 00460613 addi x12,x12,4 + +80002e9c : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b3: + sha512sig1l x21, x3, x3 # perform operation +80002e9c: 56318ab3 sha512sig1l x21,x3,x3 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b3, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b3_str) +80002ea0: 000f2383 lw x7,0(x30) +80002ea4: 01538863 beq x7,x21,80002eb4 +80002ea8: 6700246f jal x8,80005518 +80002eac: 80002e9c .word 0x80002e9c +80002eb0: 8000e421 .word 0x8000e421 +80002eb4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xa59308a3 +80002eb8: 00062203 lw x4,0(x12) +80002ebc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x165a530f +80002ec0: 00062203 lw x4,0(x12) +80002ec4: 00460613 addi x12,x12,4 + +80002ec8 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b4: + sha512sig1l x29, x4, x4 # perform operation +80002ec8: 56420eb3 sha512sig1l x29,x4,x4 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b4, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b4_str) +80002ecc: 000f2383 lw x7,0(x30) +80002ed0: 01d38863 beq x7,x29,80002ee0 +80002ed4: 6440246f jal x8,80005518 +80002ed8: 80002ec8 .word 0x80002ec8 +80002edc: 8000e460 .word 0x8000e460 +80002ee0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xd790e050 +80002ee4: 00062283 lw x5,0(x12) +80002ee8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x91b9c940 +80002eec: 00062283 lw x5,0(x12) +80002ef0: 00460613 addi x12,x12,4 + +80002ef4 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b5: + sha512sig1l x28, x5, x5 # perform operation +80002ef4: 56528e33 sha512sig1l x28,x5,x5 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b5, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b5_str) +80002ef8: 000f2383 lw x7,0(x30) +80002efc: 01c38863 beq x7,x28,80002f0c +80002f00: 6180246f jal x8,80005518 +80002f04: 80002ef4 .word 0x80002ef4 +80002f08: 8000e49f .word 0x8000e49f +80002f0c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x24a4635d +80002f10: 00062303 lw x6,0(x12) +80002f14: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x694d50f3 +80002f18: 00062303 lw x6,0(x12) +80002f1c: 00460613 addi x12,x12,4 + +80002f20 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b6: + sha512sig1l x27, x6, x6 # perform operation +80002f20: 56630db3 sha512sig1l x27,x6,x6 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b6, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b6_str) +80002f24: 000f2383 lw x7,0(x30) +80002f28: 01b38863 beq x7,x27,80002f38 +80002f2c: 5ec0246f jal x8,80005518 +80002f30: 80002f20 .word 0x80002f20 +80002f34: 8000e4de .word 0x8000e4de +80002f38: 004f0f13 addi x30,x30,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f3c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f40: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7e004e1c +80002f44: 00062383 lw x7,0(x12) +80002f48: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xb223a0f0 +80002f4c: 00062383 lw x7,0(x12) +80002f50: 00460613 addi x12,x12,4 + +80002f54 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b7: + sha512sig1l x28, x7, x7 # perform operation +80002f54: 56738e33 sha512sig1l x28,x7,x7 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b7, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b7_str) +80002f58: 000f2203 lw x4,0(x30) +80002f5c: 01c20863 beq x4,x28,80002f6c +80002f60: 5a0022ef jal x5,80005500 +80002f64: 80002f54 .word 0x80002f54 +80002f68: 8000e51d .word 0x8000e51d +80002f6c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x5ec01f22 +80002f70: 00062403 lw x8,0(x12) +80002f74: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xd3696631 +80002f78: 00062403 lw x8,0(x12) +80002f7c: 00460613 addi x12,x12,4 + +80002f80 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b8: + sha512sig1l x25, x8, x8 # perform operation +80002f80: 56840cb3 sha512sig1l x25,x8,x8 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b8, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b8_str) +80002f84: 000f2203 lw x4,0(x30) +80002f88: 01920863 beq x4,x25,80002f98 +80002f8c: 574022ef jal x5,80005500 +80002f90: 80002f80 .word 0x80002f80 +80002f94: 8000e55c .word 0x8000e55c +80002f98: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x4d265761 +80002f9c: 00062483 lw x9,0(x12) +80002fa0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7b5657fa +80002fa4: 00062483 lw x9,0(x12) +80002fa8: 00460613 addi x12,x12,4 + +80002fac : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b9: + sha512sig1l x19, x9, x9 # perform operation +80002fac: 569489b3 sha512sig1l x19,x9,x9 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b9, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b9_str) +80002fb0: 000f2203 lw x4,0(x30) +80002fb4: 01320863 beq x4,x19,80002fc4 +80002fb8: 548022ef jal x5,80005500 +80002fbc: 80002fac .word 0x80002fac +80002fc0: 8000e59b .word 0x8000e59b +80002fc4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x522fe2c9 +80002fc8: 00062503 lw x10,0(x12) +80002fcc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x10e6cb40 +80002fd0: 00062503 lw x10,0(x12) +80002fd4: 00460613 addi x12,x12,4 + +80002fd8 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b10: + sha512sig1l x15, x10, x10 # perform operation +80002fd8: 56a507b3 sha512sig1l x15,x10,x10 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b10, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b10_str) +80002fdc: 000f2203 lw x4,0(x30) +80002fe0: 00f20863 beq x4,x15,80002ff0 +80002fe4: 51c022ef jal x5,80005500 +80002fe8: 80002fd8 .word 0x80002fd8 +80002fec: 8000e5da .word 0x8000e5da +80002ff0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x36e92a1f +80002ff4: 00062583 lw x11,0(x12) +80002ff8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x2ae0578e +80002ffc: 00062583 lw x11,0(x12) +80003000: 00460613 addi x12,x12,4 + +80003004 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b11: + sha512sig1l x25, x11, x11 # perform operation +80003004: 56b58cb3 sha512sig1l x25,x11,x11 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b11, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b11_str) +80003008: 000f2203 lw x4,0(x30) +8000300c: 01920863 beq x4,x25,8000301c +80003010: 4f0022ef jal x5,80005500 +80003014: 80003004 .word 0x80003004 +80003018: 8000e61a .word 0x8000e61a +8000301c: 004f0f13 addi x30,x30,4 + + mv x28, x12 # switch data pointer register to avoid conflict with test +80003020: 00060e13 addi x28,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x974a0d6d +80003024: 000e2603 lw x12,0(x28) +80003028: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x9af89f93 +8000302c: 000e2603 lw x12,0(x28) +80003030: 004e0e13 addi x28,x28,4 + +80003034 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b12: + sha512sig1l x19, x12, x12 # perform operation +80003034: 56c609b3 sha512sig1l x19,x12,x12 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b12, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b12_str) +80003038: 000f2203 lw x4,0(x30) +8000303c: 01320863 beq x4,x19,8000304c +80003040: 4c0022ef jal x5,80005500 +80003044: 80003034 .word 0x80003034 +80003048: 8000e65a .word 0x8000e65a +8000304c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0x82a9bd17 +80003050: 000e2683 lw x13,0(x28) +80003054: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0x3a5ccbd5 +80003058: 000e2683 lw x13,0(x28) +8000305c: 004e0e13 addi x28,x28,4 + +80003060 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b13: + sha512sig1l x15, x13, x13 # perform operation +80003060: 56d687b3 sha512sig1l x15,x13,x13 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b13, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b13_str) +80003064: 000f2203 lw x4,0(x30) +80003068: 00f20863 beq x4,x15,80003078 +8000306c: 494022ef jal x5,80005500 +80003070: 80003060 .word 0x80003060 +80003074: 8000e69a .word 0x8000e69a +80003078: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0xf02a0f84 +8000307c: 000e2703 lw x14,0(x28) +80003080: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs2: x14 = 0x735ac2b0 +80003084: 000e2703 lw x14,0(x28) +80003088: 004e0e13 addi x28,x28,4 + +8000308c : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b14: + sha512sig1l x29, x14, x14 # perform operation +8000308c: 56e70eb3 sha512sig1l x29,x14,x14 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b14, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b14_str) +80003090: 000f2203 lw x4,0(x30) +80003094: 01d20863 beq x4,x29,800030a4 +80003098: 468022ef jal x5,80005500 +8000309c: 8000308c .word 0x8000308c +800030a0: 8000e6da .word 0x8000e6da +800030a4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xde8a8316 +800030a8: 000e2783 lw x15,0(x28) +800030ac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0xb25bbe56 +800030b0: 000e2783 lw x15,0(x28) +800030b4: 004e0e13 addi x28,x28,4 + +800030b8 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b15: + sha512sig1l x9, x15, x15 # perform operation +800030b8: 56f784b3 sha512sig1l x9,x15,x15 + # Check if x9 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x9, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b15, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b15_str) +800030bc: 000f2203 lw x4,0(x30) +800030c0: 00920863 beq x4,x9,800030d0 +800030c4: 43c022ef jal x5,80005500 +800030c8: 800030b8 .word 0x800030b8 +800030cc: 8000e71a .word 0x8000e71a +800030d0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0xd0344209 +800030d4: 000e2803 lw x16,0(x28) +800030d8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0xec1e4fb4 +800030dc: 000e2803 lw x16,0(x28) +800030e0: 004e0e13 addi x28,x28,4 + +800030e4 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b16: + sha512sig1l x0, x16, x16 # perform operation +800030e4: 57080033 sha512sig1l x0,x16,x16 + # Check if x0 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x0, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b16, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b16_str) +800030e8: 000f2203 lw x4,0(x30) +800030ec: 00020863 beq x4,x0,800030fc +800030f0: 410022ef jal x5,80005500 +800030f4: 800030e4 .word 0x800030e4 +800030f8: 8000e75a .word 0x8000e75a +800030fc: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x72090c3a +80003100: 000e2883 lw x17,0(x28) +80003104: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x5051bbc3 +80003108: 000e2883 lw x17,0(x28) +8000310c: 004e0e13 addi x28,x28,4 + +80003110 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b17: + sha512sig1l x13, x17, x17 # perform operation +80003110: 571886b3 sha512sig1l x13,x17,x17 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b17, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b17_str) +80003114: 000f2203 lw x4,0(x30) +80003118: 00d20863 beq x4,x13,80003128 +8000311c: 3e4022ef jal x5,80005500 +80003120: 80003110 .word 0x80003110 +80003124: 8000e79a .word 0x8000e79a +80003128: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x9cecb593 +8000312c: 000e2903 lw x18,0(x28) +80003130: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0xe9188c83 +80003134: 000e2903 lw x18,0(x28) +80003138: 004e0e13 addi x28,x28,4 + +8000313c : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b18: + sha512sig1l x14, x18, x18 # perform operation +8000313c: 57290733 sha512sig1l x14,x18,x18 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b18, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b18_str) +80003140: 000f2203 lw x4,0(x30) +80003144: 00e20863 beq x4,x14,80003154 +80003148: 3b8022ef jal x5,80005500 +8000314c: 8000313c .word 0x8000313c +80003150: 8000e7da .word 0x8000e7da +80003154: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x93665ac3 +80003158: 000e2983 lw x19,0(x28) +8000315c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x51b430d8 +80003160: 000e2983 lw x19,0(x28) +80003164: 004e0e13 addi x28,x28,4 + +80003168 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b19: + sha512sig1l x22, x19, x19 # perform operation +80003168: 57398b33 sha512sig1l x22,x19,x19 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b19, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b19_str) +8000316c: 000f2203 lw x4,0(x30) +80003170: 01620863 beq x4,x22,80003180 +80003174: 38c022ef jal x5,80005500 +80003178: 80003168 .word 0x80003168 +8000317c: 8000e81a .word 0x8000e81a +80003180: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xf9c0b3e5 +80003184: 000e2a03 lw x20,0(x28) +80003188: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x26c75eec +8000318c: 000e2a03 lw x20,0(x28) +80003190: 004e0e13 addi x28,x28,4 + +80003194 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b20: + sha512sig1l x14, x20, x20 # perform operation +80003194: 574a0733 sha512sig1l x14,x20,x20 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b20, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b20_str) +80003198: 000f2203 lw x4,0(x30) +8000319c: 00e20863 beq x4,x14,800031ac +800031a0: 360022ef jal x5,80005500 +800031a4: 80003194 .word 0x80003194 +800031a8: 8000e85a .word 0x8000e85a +800031ac: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x74df9d56 +800031b0: 000e2a83 lw x21,0(x28) +800031b4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0xc2afaf29 +800031b8: 000e2a83 lw x21,0(x28) +800031bc: 004e0e13 addi x28,x28,4 + +800031c0 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b21: + sha512sig1l x19, x21, x21 # perform operation +800031c0: 575a89b3 sha512sig1l x19,x21,x21 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b21, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b21_str) +800031c4: 000f2203 lw x4,0(x30) +800031c8: 01320863 beq x4,x19,800031d8 +800031cc: 334022ef jal x5,80005500 +800031d0: 800031c0 .word 0x800031c0 +800031d4: 8000e89a .word 0x8000e89a +800031d8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xb6fad4f5 +800031dc: 000e2b03 lw x22,0(x28) +800031e0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xf4f37340 +800031e4: 000e2b03 lw x22,0(x28) +800031e8: 004e0e13 addi x28,x28,4 + +800031ec : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b22: + sha512sig1l x19, x22, x22 # perform operation +800031ec: 576b09b3 sha512sig1l x19,x22,x22 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b22, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b22_str) +800031f0: 000f2203 lw x4,0(x30) +800031f4: 01320863 beq x4,x19,80003204 +800031f8: 308022ef jal x5,80005500 +800031fc: 800031ec .word 0x800031ec +80003200: 8000e8da .word 0x8000e8da +80003204: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x05ce8d42 +80003208: 000e2b83 lw x23,0(x28) +8000320c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xeb9508c9 +80003210: 000e2b83 lw x23,0(x28) +80003214: 004e0e13 addi x28,x28,4 + +80003218 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b23: + sha512sig1l x17, x23, x23 # perform operation +80003218: 577b88b3 sha512sig1l x17,x23,x23 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b23, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b23_str) +8000321c: 000f2203 lw x4,0(x30) +80003220: 01120863 beq x4,x17,80003230 +80003224: 2dc022ef jal x5,80005500 +80003228: 80003218 .word 0x80003218 +8000322c: 8000e91a .word 0x8000e91a +80003230: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x21149ac0 +80003234: 000e2c03 lw x24,0(x28) +80003238: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x17432f37 +8000323c: 000e2c03 lw x24,0(x28) +80003240: 004e0e13 addi x28,x28,4 + +80003244 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b24: + sha512sig1l x8, x24, x24 # perform operation +80003244: 578c0433 sha512sig1l x8,x24,x24 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b24, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b24_str) +80003248: 000f2203 lw x4,0(x30) +8000324c: 00820863 beq x4,x8,8000325c +80003250: 2b0022ef jal x5,80005500 +80003254: 80003244 .word 0x80003244 +80003258: 8000e95a .word 0x8000e95a +8000325c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xf11a9649 +80003260: 000e2c83 lw x25,0(x28) +80003264: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x06846d28 +80003268: 000e2c83 lw x25,0(x28) +8000326c: 004e0e13 addi x28,x28,4 + +80003270 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b25: + sha512sig1l x12, x25, x25 # perform operation +80003270: 579c8633 sha512sig1l x12,x25,x25 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b25, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b25_str) +80003274: 000f2203 lw x4,0(x30) +80003278: 00c20863 beq x4,x12,80003288 +8000327c: 284022ef jal x5,80005500 +80003280: 80003270 .word 0x80003270 +80003284: 8000e99a .word 0x8000e99a +80003288: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xfe4bc92a +8000328c: 000e2d03 lw x26,0(x28) +80003290: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x34dcc0c7 +80003294: 000e2d03 lw x26,0(x28) +80003298: 004e0e13 addi x28,x28,4 + +8000329c : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b26: + sha512sig1l x17, x26, x26 # perform operation +8000329c: 57ad08b3 sha512sig1l x17,x26,x26 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b26, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b26_str) +800032a0: 000f2203 lw x4,0(x30) +800032a4: 01120863 beq x4,x17,800032b4 +800032a8: 258022ef jal x5,80005500 +800032ac: 8000329c .word 0x8000329c +800032b0: 8000e9da .word 0x8000e9da +800032b4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x16b71cbb +800032b8: 000e2d83 lw x27,0(x28) +800032bc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x77248010 +800032c0: 000e2d83 lw x27,0(x28) +800032c4: 004e0e13 addi x28,x28,4 + +800032c8 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b27: + sha512sig1l x10, x27, x27 # perform operation +800032c8: 57bd8533 sha512sig1l x10,x27,x27 + # Check if x10 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x10, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b27, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b27_str) +800032cc: 000f2203 lw x4,0(x30) +800032d0: 00a20863 beq x4,x10,800032e0 +800032d4: 22c022ef jal x5,80005500 +800032d8: 800032c8 .word 0x800032c8 +800032dc: 8000ea1a .word 0x8000ea1a +800032e0: 004f0f13 addi x30,x30,4 + + mv x9, x28 # switch data pointer register to avoid conflict with test +800032e4: 000e0493 addi x9,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xc28ce4aa +800032e8: 0004ae03 lw x28,0(x9) +800032ec: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x999cfb42 +800032f0: 0004ae03 lw x28,0(x9) +800032f4: 00448493 addi x9,x9,4 + +800032f8 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b28: + sha512sig1l x14, x28, x28 # perform operation +800032f8: 57ce0733 sha512sig1l x14,x28,x28 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b28, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b28_str) +800032fc: 000f2203 lw x4,0(x30) +80003300: 00e20863 beq x4,x14,80003310 +80003304: 1fc022ef jal x5,80005500 +80003308: 800032f8 .word 0x800032f8 +8000330c: 8000ea5a .word 0x8000ea5a +80003310: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x1f402c29 +80003314: 0004ae83 lw x29,0(x9) +80003318: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xee6570d5 +8000331c: 0004ae83 lw x29,0(x9) +80003320: 00448493 addi x9,x9,4 + +80003324 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b29: + sha512sig1l x22, x29, x29 # perform operation +80003324: 57de8b33 sha512sig1l x22,x29,x29 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b29, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b29_str) +80003328: 000f2203 lw x4,0(x30) +8000332c: 01620863 beq x4,x22,8000333c +80003330: 1d0022ef jal x5,80005500 +80003334: 80003324 .word 0x80003324 +80003338: 8000ea9a .word 0x8000ea9a +8000333c: 004f0f13 addi x30,x30,4 + + mv x11, x30 # switch signature pointer register to avoid conflict with test +80003340: 000f0593 addi x11,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xaeeee6ef +80003344: 0004af03 lw x30,0(x9) +80003348: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x59aa4477 +8000334c: 0004af03 lw x30,0(x9) +80003350: 00448493 addi x9,x9,4 + +80003354 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b30: + sha512sig1l x21, x30, x30 # perform operation +80003354: 57ef0ab3 sha512sig1l x21,x30,x30 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b30, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b30_str) +80003358: 0005a203 lw x4,0(x11) +8000335c: 01520863 beq x4,x21,8000336c +80003360: 1a0022ef jal x5,80005500 +80003364: 80003354 .word 0x80003354 +80003368: 8000eada .word 0x8000eada +8000336c: 00458593 addi x11,x11,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x05abbeb8 +80003370: 0004af83 lw x31,0(x9) +80003374: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xa6e58648 +80003378: 0004af83 lw x31,0(x9) +8000337c: 00448493 addi x9,x9,4 + +80003380 : +Zknh_sha512sig1l_cg_cmp_rs1_rs2_b31: + sha512sig1l x2, x31, x31 # perform operation +80003380: 57ff8133 sha512sig1l x2,x31,x31 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b31, Zknh_sha512sig1l_cg_cmp_rs1_rs2_b31_str) +80003384: 0005a203 lw x4,0(x11) +80003388: 00220863 beq x4,x2,80003398 +8000338c: 174022ef jal x5,80005500 +80003390: 80003380 .word 0x80003380 +80003394: 8000eb1a .word 0x8000eb1a +80003398: 00458593 addi x11,x11,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xd44ffafe +8000339c: 0004a003 lw x0,0(x9) +800033a0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x81aed80d +800033a4: 0004a983 lw x19,0(x9) +800033a8: 00448493 addi x9,x9,4 + +800033ac : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b0: + sha512sig1l x0, x0, x19 # perform operation +800033ac: 57300033 sha512sig1l x0,x0,x19 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zknh_sha512sig1l_cg_cmp_rd_rs1_b0, Zknh_sha512sig1l_cg_cmp_rd_rs1_b0_str) +800033b0: 0005a203 lw x4,0(x11) +800033b4: 00020863 beq x4,x0,800033c4 +800033b8: 148022ef jal x5,80005500 +800033bc: 800033ac .word 0x800033ac +800033c0: 8000eb5a .word 0x8000eb5a +800033c4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x8006a01f +800033c8: 0004a083 lw x1,0(x9) +800033cc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xe80ddcef +800033d0: 0004a603 lw x12,0(x9) +800033d4: 00448493 addi x9,x9,4 + +800033d8 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b1: + sha512sig1l x1, x1, x12 # perform operation +800033d8: 56c080b3 sha512sig1l x1,x1,x12 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zknh_sha512sig1l_cg_cmp_rd_rs1_b1, Zknh_sha512sig1l_cg_cmp_rd_rs1_b1_str) +800033dc: 0005a203 lw x4,0(x11) +800033e0: 00120863 beq x4,x1,800033f0 +800033e4: 11c022ef jal x5,80005500 +800033e8: 800033d8 .word 0x800033d8 +800033ec: 8000eb98 .word 0x8000eb98 +800033f0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xd7810d24 +800033f4: 0004a103 lw x2,0(x9) +800033f8: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x4f8865a3 +800033fc: 0004a903 lw x18,0(x9) +80003400: 00448493 addi x9,x9,4 + +80003404 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b2: + sha512sig1l x2, x2, x18 # perform operation +80003404: 57210133 sha512sig1l x2,x2,x18 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zknh_sha512sig1l_cg_cmp_rd_rs1_b2, Zknh_sha512sig1l_cg_cmp_rd_rs1_b2_str) +80003408: 0005a203 lw x4,0(x11) +8000340c: 00220863 beq x4,x2,8000341c +80003410: 0f0022ef jal x5,80005500 +80003414: 80003404 .word 0x80003404 +80003418: 8000ebd6 .word 0x8000ebd6 +8000341c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xea235e3a +80003420: 0004a183 lw x3,0(x9) +80003424: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x64755348 +80003428: 0004aa83 lw x21,0(x9) +8000342c: 00448493 addi x9,x9,4 + +80003430 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b3: + sha512sig1l x3, x3, x21 # perform operation +80003430: 575181b3 sha512sig1l x3,x3,x21 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zknh_sha512sig1l_cg_cmp_rd_rs1_b3, Zknh_sha512sig1l_cg_cmp_rd_rs1_b3_str) +80003434: 0005a203 lw x4,0(x11) +80003438: 00320863 beq x4,x3,80003448 +8000343c: 0c4022ef jal x5,80005500 +80003440: 80003430 .word 0x80003430 +80003444: 8000ec14 .word 0x8000ec14 +80003448: 00458593 addi x11,x11,4 + + mv x13, x4 # switch temp register to avoid conflict with test +8000344c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003450: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x386f93bf +80003454: 0004a203 lw x4,0(x9) +80003458: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0xa13cc110 +8000345c: 0004a803 lw x16,0(x9) +80003460: 00448493 addi x9,x9,4 + +80003464 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b4: + sha512sig1l x4, x4, x16 # perform operation +80003464: 57020233 sha512sig1l x4,x4,x16 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zknh_sha512sig1l_cg_cmp_rd_rs1_b4, Zknh_sha512sig1l_cg_cmp_rd_rs1_b4_str) +80003468: 0005a683 lw x13,0(x11) +8000346c: 00468863 beq x13,x4,8000347c +80003470: 0d00276f jal x14,80005540 +80003474: 80003464 .word 0x80003464 +80003478: 8000ec52 .word 0x8000ec52 +8000347c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xc8a0aaa5 +80003480: 0004a283 lw x5,0(x9) +80003484: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xfb1c2795 +80003488: 0004a003 lw x0,0(x9) +8000348c: 00448493 addi x9,x9,4 + +80003490 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b5: + sha512sig1l x5, x5, x0 # perform operation +80003490: 560282b3 sha512sig1l x5,x5,x0 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zknh_sha512sig1l_cg_cmp_rd_rs1_b5, Zknh_sha512sig1l_cg_cmp_rd_rs1_b5_str) +80003494: 0005a683 lw x13,0(x11) +80003498: 00568863 beq x13,x5,800034a8 +8000349c: 0a40276f jal x14,80005540 +800034a0: 80003490 .word 0x80003490 +800034a4: 8000ec90 .word 0x8000ec90 +800034a8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x0b10a04c +800034ac: 0004a303 lw x6,0(x9) +800034b0: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x52583e93 +800034b4: 0004a803 lw x16,0(x9) +800034b8: 00448493 addi x9,x9,4 + +800034bc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b6: + sha512sig1l x6, x6, x16 # perform operation +800034bc: 57030333 sha512sig1l x6,x6,x16 + # Check if x6 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x6, Zknh_sha512sig1l_cg_cmp_rd_rs1_b6, Zknh_sha512sig1l_cg_cmp_rd_rs1_b6_str) +800034c0: 0005a683 lw x13,0(x11) +800034c4: 00668863 beq x13,x6,800034d4 +800034c8: 0780276f jal x14,80005540 +800034cc: 800034bc .word 0x800034bc +800034d0: 8000ecce .word 0x8000ecce +800034d4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xf833a5e4 +800034d8: 0004a383 lw x7,0(x9) +800034dc: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xeb5e1241 +800034e0: 0004aa03 lw x20,0(x9) +800034e4: 00448493 addi x9,x9,4 + +800034e8 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b7: + sha512sig1l x7, x7, x20 # perform operation +800034e8: 574383b3 sha512sig1l x7,x7,x20 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zknh_sha512sig1l_cg_cmp_rd_rs1_b7, Zknh_sha512sig1l_cg_cmp_rd_rs1_b7_str) +800034ec: 0005a683 lw x13,0(x11) +800034f0: 00768863 beq x13,x7,80003500 +800034f4: 04c0276f jal x14,80005540 +800034f8: 800034e8 .word 0x800034e8 +800034fc: 8000ed0c .word 0x8000ed0c +80003500: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x70e71391 +80003504: 0004a403 lw x8,0(x9) +80003508: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xaa9d4051 +8000350c: 0004a383 lw x7,0(x9) +80003510: 00448493 addi x9,x9,4 + +80003514 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b8: + sha512sig1l x8, x8, x7 # perform operation +80003514: 56740433 sha512sig1l x8,x8,x7 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zknh_sha512sig1l_cg_cmp_rd_rs1_b8, Zknh_sha512sig1l_cg_cmp_rd_rs1_b8_str) +80003518: 0005a683 lw x13,0(x11) +8000351c: 00868863 beq x13,x8,8000352c +80003520: 0200276f jal x14,80005540 +80003524: 80003514 .word 0x80003514 +80003528: 8000ed4a .word 0x8000ed4a +8000352c: 00458593 addi x11,x11,4 + + mv x20, x9 # switch data pointer register to avoid conflict with test +80003530: 00048a13 addi x20,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x587d6c2e +80003534: 000a2483 lw x9,0(x20) +80003538: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x5a3fa905 +8000353c: 000a2d83 lw x27,0(x20) +80003540: 004a0a13 addi x20,x20,4 + +80003544 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b9: + sha512sig1l x9, x9, x27 # perform operation +80003544: 57b484b3 sha512sig1l x9,x9,x27 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zknh_sha512sig1l_cg_cmp_rd_rs1_b9, Zknh_sha512sig1l_cg_cmp_rd_rs1_b9_str) +80003548: 0005a683 lw x13,0(x11) +8000354c: 00968863 beq x13,x9,8000355c +80003550: 7f10176f jal x14,80005540 +80003554: 80003544 .word 0x80003544 +80003558: 8000ed88 .word 0x8000ed88 +8000355c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xbfaf50cc +80003560: 000a2503 lw x10,0(x20) +80003564: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x32c03fbc +80003568: 000a2e83 lw x29,0(x20) +8000356c: 004a0a13 addi x20,x20,4 + +80003570 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b10: + sha512sig1l x10, x10, x29 # perform operation +80003570: 57d50533 sha512sig1l x10,x10,x29 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zknh_sha512sig1l_cg_cmp_rd_rs1_b10, Zknh_sha512sig1l_cg_cmp_rd_rs1_b10_str) +80003574: 0005a683 lw x13,0(x11) +80003578: 00a68863 beq x13,x10,80003588 +8000357c: 7c50176f jal x14,80005540 +80003580: 80003570 .word 0x80003570 +80003584: 8000edc6 .word 0x8000edc6 +80003588: 00458593 addi x11,x11,4 + + mv x30, x11 # switch signature pointer register to avoid conflict with test +8000358c: 00058f13 addi x30,x11,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xe025cc78 +80003590: 000a2583 lw x11,0(x20) +80003594: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xb63978d9 +80003598: 000a2c03 lw x24,0(x20) +8000359c: 004a0a13 addi x20,x20,4 + +800035a0 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b11: + sha512sig1l x11, x11, x24 # perform operation +800035a0: 578585b3 sha512sig1l x11,x11,x24 + # Check if x11 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x11, Zknh_sha512sig1l_cg_cmp_rd_rs1_b11, Zknh_sha512sig1l_cg_cmp_rd_rs1_b11_str) +800035a4: 000f2683 lw x13,0(x30) +800035a8: 00b68863 beq x13,x11,800035b8 +800035ac: 7950176f jal x14,80005540 +800035b0: 800035a0 .word 0x800035a0 +800035b4: 8000ee05 .word 0x8000ee05 +800035b8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x4783f215 +800035bc: 000a2603 lw x12,0(x20) +800035c0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0bbe1a77 +800035c4: 000a2503 lw x10,0(x20) +800035c8: 004a0a13 addi x20,x20,4 + +800035cc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b12: + sha512sig1l x12, x12, x10 # perform operation +800035cc: 56a60633 sha512sig1l x12,x12,x10 + # Check if x12 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x12, Zknh_sha512sig1l_cg_cmp_rd_rs1_b12, Zknh_sha512sig1l_cg_cmp_rd_rs1_b12_str) +800035d0: 000f2683 lw x13,0(x30) +800035d4: 00c68863 beq x13,x12,800035e4 +800035d8: 7690176f jal x14,80005540 +800035dc: 800035cc .word 0x800035cc +800035e0: 8000ee44 .word 0x8000ee44 +800035e4: 004f0f13 addi x30,x30,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800035e8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800035ec: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x52cb3701 +800035f0: 000a2683 lw x13,0(x20) +800035f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xcbff8106 +800035f8: 000a2083 lw x1,0(x20) +800035fc: 004a0a13 addi x20,x20,4 + +80003600 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b13: + sha512sig1l x13, x13, x1 # perform operation +80003600: 561686b3 sha512sig1l x13,x13,x1 + # Check if x13 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x13, Zknh_sha512sig1l_cg_cmp_rd_rs1_b13, Zknh_sha512sig1l_cg_cmp_rd_rs1_b13_str) +80003604: 000f2203 lw x4,0(x30) +80003608: 00d20863 beq x4,x13,80003618 +8000360c: 6f5012ef jal x5,80005500 +80003610: 80003600 .word 0x80003600 +80003614: 8000ee83 .word 0x8000ee83 +80003618: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x40b9eaf6 +8000361c: 000a2703 lw x14,0(x20) +80003620: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x95b92343 +80003624: 000a2683 lw x13,0(x20) +80003628: 004a0a13 addi x20,x20,4 + +8000362c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b14: + sha512sig1l x14, x14, x13 # perform operation +8000362c: 56d70733 sha512sig1l x14,x14,x13 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zknh_sha512sig1l_cg_cmp_rd_rs1_b14, Zknh_sha512sig1l_cg_cmp_rd_rs1_b14_str) +80003630: 000f2203 lw x4,0(x30) +80003634: 00e20863 beq x4,x14,80003644 +80003638: 6c9012ef jal x5,80005500 +8000363c: 8000362c .word 0x8000362c +80003640: 8000eec2 .word 0x8000eec2 +80003644: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x88c8b26c +80003648: 000a2783 lw x15,0(x20) +8000364c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xb6b9c843 +80003650: 000a2883 lw x17,0(x20) +80003654: 004a0a13 addi x20,x20,4 + +80003658 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b15: + sha512sig1l x15, x15, x17 # perform operation +80003658: 571787b3 sha512sig1l x15,x15,x17 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zknh_sha512sig1l_cg_cmp_rd_rs1_b15, Zknh_sha512sig1l_cg_cmp_rd_rs1_b15_str) +8000365c: 000f2203 lw x4,0(x30) +80003660: 00f20863 beq x4,x15,80003670 +80003664: 69d012ef jal x5,80005500 +80003668: 80003658 .word 0x80003658 +8000366c: 8000ef01 .word 0x8000ef01 +80003670: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x79025aca +80003674: 000a2803 lw x16,0(x20) +80003678: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xf6880d1b +8000367c: 000a2e03 lw x28,0(x20) +80003680: 004a0a13 addi x20,x20,4 + +80003684 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b16: + sha512sig1l x16, x16, x28 # perform operation +80003684: 57c80833 sha512sig1l x16,x16,x28 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zknh_sha512sig1l_cg_cmp_rd_rs1_b16, Zknh_sha512sig1l_cg_cmp_rd_rs1_b16_str) +80003688: 000f2203 lw x4,0(x30) +8000368c: 01020863 beq x4,x16,8000369c +80003690: 671012ef jal x5,80005500 +80003694: 80003684 .word 0x80003684 +80003698: 8000ef40 .word 0x8000ef40 +8000369c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xf0138899 +800036a0: 000a2883 lw x17,0(x20) +800036a4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xd0fdcddd +800036a8: 000a2303 lw x6,0(x20) +800036ac: 004a0a13 addi x20,x20,4 + +800036b0 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b17: + sha512sig1l x17, x17, x6 # perform operation +800036b0: 566888b3 sha512sig1l x17,x17,x6 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zknh_sha512sig1l_cg_cmp_rd_rs1_b17, Zknh_sha512sig1l_cg_cmp_rd_rs1_b17_str) +800036b4: 000f2203 lw x4,0(x30) +800036b8: 01120863 beq x4,x17,800036c8 +800036bc: 645012ef jal x5,80005500 +800036c0: 800036b0 .word 0x800036b0 +800036c4: 8000ef7f .word 0x8000ef7f +800036c8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x345b61be +800036cc: 000a2903 lw x18,0(x20) +800036d0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x1af520ed +800036d4: 000a2003 lw x0,0(x20) +800036d8: 004a0a13 addi x20,x20,4 + +800036dc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b18: + sha512sig1l x18, x18, x0 # perform operation +800036dc: 56090933 sha512sig1l x18,x18,x0 + # Check if x18 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x18, Zknh_sha512sig1l_cg_cmp_rd_rs1_b18, Zknh_sha512sig1l_cg_cmp_rd_rs1_b18_str) +800036e0: 000f2203 lw x4,0(x30) +800036e4: 01220863 beq x4,x18,800036f4 +800036e8: 619012ef jal x5,80005500 +800036ec: 800036dc .word 0x800036dc +800036f0: 8000efbe .word 0x8000efbe +800036f4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x4dd47a2b +800036f8: 000a2983 lw x19,0(x20) +800036fc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xce38265a +80003700: 000a2703 lw x14,0(x20) +80003704: 004a0a13 addi x20,x20,4 + +80003708 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b19: + sha512sig1l x19, x19, x14 # perform operation +80003708: 56e989b3 sha512sig1l x19,x19,x14 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rd_rs1_b19, Zknh_sha512sig1l_cg_cmp_rd_rs1_b19_str) +8000370c: 000f2203 lw x4,0(x30) +80003710: 01320863 beq x4,x19,80003720 +80003714: 5ed012ef jal x5,80005500 +80003718: 80003708 .word 0x80003708 +8000371c: 8000effd .word 0x8000effd +80003720: 004f0f13 addi x30,x30,4 + + mv x1, x20 # switch data pointer register to avoid conflict with test +80003724: 000a0093 addi x1,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x323e2384 +80003728: 0000aa03 lw x20,0(x1) +8000372c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x5fdb49f2 +80003730: 0000a583 lw x11,0(x1) +80003734: 00408093 addi x1,x1,4 + +80003738 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b20: + sha512sig1l x20, x20, x11 # perform operation +80003738: 56ba0a33 sha512sig1l x20,x20,x11 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zknh_sha512sig1l_cg_cmp_rd_rs1_b20, Zknh_sha512sig1l_cg_cmp_rd_rs1_b20_str) +8000373c: 000f2203 lw x4,0(x30) +80003740: 01420863 beq x4,x20,80003750 +80003744: 5bd012ef jal x5,80005500 +80003748: 80003738 .word 0x80003738 +8000374c: 8000f03c .word 0x8000f03c +80003750: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x8b47c97c +80003754: 0000aa83 lw x21,0(x1) +80003758: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x327bfa1c +8000375c: 0000a903 lw x18,0(x1) +80003760: 00408093 addi x1,x1,4 + +80003764 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b21: + sha512sig1l x21, x21, x18 # perform operation +80003764: 572a8ab3 sha512sig1l x21,x21,x18 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zknh_sha512sig1l_cg_cmp_rd_rs1_b21, Zknh_sha512sig1l_cg_cmp_rd_rs1_b21_str) +80003768: 000f2203 lw x4,0(x30) +8000376c: 01520863 beq x4,x21,8000377c +80003770: 591012ef jal x5,80005500 +80003774: 80003764 .word 0x80003764 +80003778: 8000f07b .word 0x8000f07b +8000377c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x007897d4 +80003780: 0000ab03 lw x22,0(x1) +80003784: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0c120a85 +80003788: 0000ad03 lw x26,0(x1) +8000378c: 00408093 addi x1,x1,4 + +80003790 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b22: + sha512sig1l x22, x22, x26 # perform operation +80003790: 57ab0b33 sha512sig1l x22,x22,x26 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zknh_sha512sig1l_cg_cmp_rd_rs1_b22, Zknh_sha512sig1l_cg_cmp_rd_rs1_b22_str) +80003794: 000f2203 lw x4,0(x30) +80003798: 01620863 beq x4,x22,800037a8 +8000379c: 565012ef jal x5,80005500 +800037a0: 80003790 .word 0x80003790 +800037a4: 8000f0ba .word 0x8000f0ba +800037a8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x25e65815 +800037ac: 0000ab83 lw x23,0(x1) +800037b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xe37bc664 +800037b4: 0000ac83 lw x25,0(x1) +800037b8: 00408093 addi x1,x1,4 + +800037bc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b23: + sha512sig1l x23, x23, x25 # perform operation +800037bc: 579b8bb3 sha512sig1l x23,x23,x25 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zknh_sha512sig1l_cg_cmp_rd_rs1_b23, Zknh_sha512sig1l_cg_cmp_rd_rs1_b23_str) +800037c0: 000f2203 lw x4,0(x30) +800037c4: 01720863 beq x4,x23,800037d4 +800037c8: 539012ef jal x5,80005500 +800037cc: 800037bc .word 0x800037bc +800037d0: 8000f0f9 .word 0x8000f0f9 +800037d4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x8246550e +800037d8: 0000ac03 lw x24,0(x1) +800037dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xb0a370e8 +800037e0: 0000a683 lw x13,0(x1) +800037e4: 00408093 addi x1,x1,4 + +800037e8 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b24: + sha512sig1l x24, x24, x13 # perform operation +800037e8: 56dc0c33 sha512sig1l x24,x24,x13 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknh_sha512sig1l_cg_cmp_rd_rs1_b24, Zknh_sha512sig1l_cg_cmp_rd_rs1_b24_str) +800037ec: 000f2203 lw x4,0(x30) +800037f0: 01820863 beq x4,x24,80003800 +800037f4: 50d012ef jal x5,80005500 +800037f8: 800037e8 .word 0x800037e8 +800037fc: 8000f138 .word 0x8000f138 +80003800: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x4b0cf5a0 +80003804: 0000ac83 lw x25,0(x1) +80003808: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x8dff1b4c +8000380c: 0000a383 lw x7,0(x1) +80003810: 00408093 addi x1,x1,4 + +80003814 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b25: + sha512sig1l x25, x25, x7 # perform operation +80003814: 567c8cb3 sha512sig1l x25,x25,x7 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha512sig1l_cg_cmp_rd_rs1_b25, Zknh_sha512sig1l_cg_cmp_rd_rs1_b25_str) +80003818: 000f2203 lw x4,0(x30) +8000381c: 01920863 beq x4,x25,8000382c +80003820: 4e1012ef jal x5,80005500 +80003824: 80003814 .word 0x80003814 +80003828: 8000f177 .word 0x8000f177 +8000382c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xd359d423 +80003830: 0000ad03 lw x26,0(x1) +80003834: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x7751b1f2 +80003838: 0000a103 lw x2,0(x1) +8000383c: 00408093 addi x1,x1,4 + +80003840 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b26: + sha512sig1l x26, x26, x2 # perform operation +80003840: 562d0d33 sha512sig1l x26,x26,x2 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zknh_sha512sig1l_cg_cmp_rd_rs1_b26, Zknh_sha512sig1l_cg_cmp_rd_rs1_b26_str) +80003844: 000f2203 lw x4,0(x30) +80003848: 01a20863 beq x4,x26,80003858 +8000384c: 4b5012ef jal x5,80005500 +80003850: 80003840 .word 0x80003840 +80003854: 8000f1b6 .word 0x8000f1b6 +80003858: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x6e6df0de +8000385c: 0000ad83 lw x27,0(x1) +80003860: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x14c923a4 +80003864: 0000aa83 lw x21,0(x1) +80003868: 00408093 addi x1,x1,4 + +8000386c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b27: + sha512sig1l x27, x27, x21 # perform operation +8000386c: 575d8db3 sha512sig1l x27,x27,x21 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknh_sha512sig1l_cg_cmp_rd_rs1_b27, Zknh_sha512sig1l_cg_cmp_rd_rs1_b27_str) +80003870: 000f2203 lw x4,0(x30) +80003874: 01b20863 beq x4,x27,80003884 +80003878: 489012ef jal x5,80005500 +8000387c: 8000386c .word 0x8000386c +80003880: 8000f1f5 .word 0x8000f1f5 +80003884: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfdd71dfe +80003888: 0000ae03 lw x28,0(x1) +8000388c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x9d4b8623 +80003890: 0000ac03 lw x24,0(x1) +80003894: 00408093 addi x1,x1,4 + +80003898 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b28: + sha512sig1l x28, x28, x24 # perform operation +80003898: 578e0e33 sha512sig1l x28,x28,x24 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknh_sha512sig1l_cg_cmp_rd_rs1_b28, Zknh_sha512sig1l_cg_cmp_rd_rs1_b28_str) +8000389c: 000f2203 lw x4,0(x30) +800038a0: 01c20863 beq x4,x28,800038b0 +800038a4: 45d012ef jal x5,80005500 +800038a8: 80003898 .word 0x80003898 +800038ac: 8000f234 .word 0x8000f234 +800038b0: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x76e6ada1 +800038b4: 0000ae83 lw x29,0(x1) +800038b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5144496b +800038bc: 0000a783 lw x15,0(x1) +800038c0: 00408093 addi x1,x1,4 + +800038c4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b29: + sha512sig1l x29, x29, x15 # perform operation +800038c4: 56fe8eb3 sha512sig1l x29,x29,x15 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknh_sha512sig1l_cg_cmp_rd_rs1_b29, Zknh_sha512sig1l_cg_cmp_rd_rs1_b29_str) +800038c8: 000f2203 lw x4,0(x30) +800038cc: 01d20863 beq x4,x29,800038dc +800038d0: 431012ef jal x5,80005500 +800038d4: 800038c4 .word 0x800038c4 +800038d8: 8000f273 .word 0x8000f273 +800038dc: 004f0f13 addi x30,x30,4 + + mv x22, x30 # switch signature pointer register to avoid conflict with test +800038e0: 000f0b13 addi x22,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x03159f67 +800038e4: 0000af03 lw x30,0(x1) +800038e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x4caa0d90 +800038ec: 0000a483 lw x9,0(x1) +800038f0: 00408093 addi x1,x1,4 + +800038f4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b30: + sha512sig1l x30, x30, x9 # perform operation +800038f4: 569f0f33 sha512sig1l x30,x30,x9 + # Check if x30 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x30, Zknh_sha512sig1l_cg_cmp_rd_rs1_b30, Zknh_sha512sig1l_cg_cmp_rd_rs1_b30_str) +800038f8: 000b2203 lw x4,0(x22) +800038fc: 01e20863 beq x4,x30,8000390c +80003900: 401012ef jal x5,80005500 +80003904: 800038f4 .word 0x800038f4 +80003908: 8000f2b2 .word 0x8000f2b2 +8000390c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x14d07fd5 +80003910: 0000af83 lw x31,0(x1) +80003914: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x48c8b52f +80003918: 0000a983 lw x19,0(x1) +8000391c: 00408093 addi x1,x1,4 + +80003920 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_b31: + sha512sig1l x31, x31, x19 # perform operation +80003920: 573f8fb3 sha512sig1l x31,x31,x19 + # Check if x31 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x31, Zknh_sha512sig1l_cg_cmp_rd_rs1_b31, Zknh_sha512sig1l_cg_cmp_rd_rs1_b31_str) +80003924: 000b2203 lw x4,0(x22) +80003928: 01f20863 beq x4,x31,80003938 +8000392c: 3d5012ef jal x5,80005500 +80003930: 80003920 .word 0x80003920 +80003934: 8000f2f1 .word 0x8000f2f1 +80003938: 004b0b13 addi x22,x22,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x4e54c45c +8000393c: 0000aa83 lw x21,0(x1) +80003940: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xd49a02a1 +80003944: 0000a003 lw x0,0(x1) +80003948: 00408093 addi x1,x1,4 + +8000394c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b0: + sha512sig1l x0, x21, x0 # perform operation +8000394c: 560a8033 sha512sig1l x0,x21,x0 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zknh_sha512sig1l_cg_cmp_rd_rs2_b0, Zknh_sha512sig1l_cg_cmp_rd_rs2_b0_str) +80003950: 000b2203 lw x4,0(x22) +80003954: 00020863 beq x4,x0,80003964 +80003958: 3a9012ef jal x5,80005500 +8000395c: 8000394c .word 0x8000394c +80003960: 8000f330 .word 0x8000f330 +80003964: 004b0b13 addi x22,x22,4 + + mv x18, x1 # switch data pointer register to avoid conflict with test +80003968: 00008913 addi x18,x1,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xf3e42d06 +8000396c: 00092c83 lw x25,0(x18) +80003970: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x0c61721c +80003974: 00092083 lw x1,0(x18) +80003978: 00490913 addi x18,x18,4 + +8000397c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b1: + sha512sig1l x1, x25, x1 # perform operation +8000397c: 561c80b3 sha512sig1l x1,x25,x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig1l_cg_cmp_rd_rs2_b1, Zknh_sha512sig1l_cg_cmp_rd_rs2_b1_str) +80003980: 000b2203 lw x4,0(x22) +80003984: 00120863 beq x4,x1,80003994 +80003988: 379012ef jal x5,80005500 +8000398c: 8000397c .word 0x8000397c +80003990: 8000f36e .word 0x8000f36e +80003994: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xef99028d +80003998: 00092503 lw x10,0(x18) +8000399c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x63f046b9 +800039a0: 00092103 lw x2,0(x18) +800039a4: 00490913 addi x18,x18,4 + +800039a8 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b2: + sha512sig1l x2, x10, x2 # perform operation +800039a8: 56250133 sha512sig1l x2,x10,x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sig1l_cg_cmp_rd_rs2_b2, Zknh_sha512sig1l_cg_cmp_rd_rs2_b2_str) +800039ac: 000b2203 lw x4,0(x22) +800039b0: 00220863 beq x4,x2,800039c0 +800039b4: 34d012ef jal x5,80005500 +800039b8: 800039a8 .word 0x800039a8 +800039bc: 8000f3ac .word 0x8000f3ac +800039c0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x881b5e6a +800039c4: 00092803 lw x16,0(x18) +800039c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x7e57569a +800039cc: 00092183 lw x3,0(x18) +800039d0: 00490913 addi x18,x18,4 + +800039d4 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b3: + sha512sig1l x3, x16, x3 # perform operation +800039d4: 563801b3 sha512sig1l x3,x16,x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sig1l_cg_cmp_rd_rs2_b3, Zknh_sha512sig1l_cg_cmp_rd_rs2_b3_str) +800039d8: 000b2203 lw x4,0(x22) +800039dc: 00320863 beq x4,x3,800039ec +800039e0: 321012ef jal x5,80005500 +800039e4: 800039d4 .word 0x800039d4 +800039e8: 8000f3ea .word 0x8000f3ea +800039ec: 004b0b13 addi x22,x22,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800039f0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800039f4: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x8f5edb0b +800039f8: 00092083 lw x1,0(x18) +800039fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x4c7e46a2 +80003a00: 00092203 lw x4,0(x18) +80003a04: 00490913 addi x18,x18,4 + +80003a08 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b4: + sha512sig1l x4, x1, x4 # perform operation +80003a08: 56408233 sha512sig1l x4,x1,x4 + # Check if x4 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x4, Zknh_sha512sig1l_cg_cmp_rd_rs2_b4, Zknh_sha512sig1l_cg_cmp_rd_rs2_b4_str) +80003a0c: 000b2683 lw x13,0(x22) +80003a10: 00468863 beq x13,x4,80003a20 +80003a14: 32d0176f jal x14,80005540 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 8000f428 .word 0x8000f428 +80003a20: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xb514c09e +80003a24: 00092103 lw x2,0(x18) +80003a28: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x638cb613 +80003a2c: 00092283 lw x5,0(x18) +80003a30: 00490913 addi x18,x18,4 + +80003a34 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b5: + sha512sig1l x5, x2, x5 # perform operation +80003a34: 565102b3 sha512sig1l x5,x2,x5 + # Check if x5 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x5, Zknh_sha512sig1l_cg_cmp_rd_rs2_b5, Zknh_sha512sig1l_cg_cmp_rd_rs2_b5_str) +80003a38: 000b2683 lw x13,0(x22) +80003a3c: 00568863 beq x13,x5,80003a4c +80003a40: 3010176f jal x14,80005540 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 8000f466 .word 0x8000f466 +80003a4c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x6563804c +80003a50: 00092103 lw x2,0(x18) +80003a54: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x7daa4e54 +80003a58: 00092303 lw x6,0(x18) +80003a5c: 00490913 addi x18,x18,4 + +80003a60 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b6: + sha512sig1l x6, x2, x6 # perform operation +80003a60: 56610333 sha512sig1l x6,x2,x6 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zknh_sha512sig1l_cg_cmp_rd_rs2_b6, Zknh_sha512sig1l_cg_cmp_rd_rs2_b6_str) +80003a64: 000b2683 lw x13,0(x22) +80003a68: 00668863 beq x13,x6,80003a78 +80003a6c: 2d50176f jal x14,80005540 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 8000f4a4 .word 0x8000f4a4 +80003a78: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x9e5985da +80003a7c: 00092503 lw x10,0(x18) +80003a80: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xf850ed73 +80003a84: 00092383 lw x7,0(x18) +80003a88: 00490913 addi x18,x18,4 + +80003a8c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b7: + sha512sig1l x7, x10, x7 # perform operation +80003a8c: 567503b3 sha512sig1l x7,x10,x7 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sig1l_cg_cmp_rd_rs2_b7, Zknh_sha512sig1l_cg_cmp_rd_rs2_b7_str) +80003a90: 000b2683 lw x13,0(x22) +80003a94: 00768863 beq x13,x7,80003aa4 +80003a98: 2a90176f jal x14,80005540 +80003a9c: 80003a8c .word 0x80003a8c +80003aa0: 8000f4e2 .word 0x8000f4e2 +80003aa4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xed691c31 +80003aa8: 00092283 lw x5,0(x18) +80003aac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x0572c465 +80003ab0: 00092403 lw x8,0(x18) +80003ab4: 00490913 addi x18,x18,4 + +80003ab8 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b8: + sha512sig1l x8, x5, x8 # perform operation +80003ab8: 56828433 sha512sig1l x8,x5,x8 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig1l_cg_cmp_rd_rs2_b8, Zknh_sha512sig1l_cg_cmp_rd_rs2_b8_str) +80003abc: 000b2683 lw x13,0(x22) +80003ac0: 00868863 beq x13,x8,80003ad0 +80003ac4: 27d0176f jal x14,80005540 +80003ac8: 80003ab8 .word 0x80003ab8 +80003acc: 8000f520 .word 0x8000f520 +80003ad0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x87ee7059 +80003ad4: 00092e83 lw x29,0(x18) +80003ad8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xd38ac214 +80003adc: 00092483 lw x9,0(x18) +80003ae0: 00490913 addi x18,x18,4 + +80003ae4 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b9: + sha512sig1l x9, x29, x9 # perform operation +80003ae4: 569e84b3 sha512sig1l x9,x29,x9 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sig1l_cg_cmp_rd_rs2_b9, Zknh_sha512sig1l_cg_cmp_rd_rs2_b9_str) +80003ae8: 000b2683 lw x13,0(x22) +80003aec: 00968863 beq x13,x9,80003afc +80003af0: 2510176f jal x14,80005540 +80003af4: 80003ae4 .word 0x80003ae4 +80003af8: 8000f55e .word 0x8000f55e +80003afc: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x1961cd30 +80003b00: 00092b83 lw x23,0(x18) +80003b04: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xfa57675a +80003b08: 00092503 lw x10,0(x18) +80003b0c: 00490913 addi x18,x18,4 + +80003b10 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b10: + sha512sig1l x10, x23, x10 # perform operation +80003b10: 56ab8533 sha512sig1l x10,x23,x10 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sig1l_cg_cmp_rd_rs2_b10, Zknh_sha512sig1l_cg_cmp_rd_rs2_b10_str) +80003b14: 000b2683 lw x13,0(x22) +80003b18: 00a68863 beq x13,x10,80003b28 +80003b1c: 2250176f jal x14,80005540 +80003b20: 80003b10 .word 0x80003b10 +80003b24: 8000f59c .word 0x8000f59c +80003b28: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x3555150e +80003b2c: 00092103 lw x2,0(x18) +80003b30: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x2b422b63 +80003b34: 00092583 lw x11,0(x18) +80003b38: 00490913 addi x18,x18,4 + +80003b3c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b11: + sha512sig1l x11, x2, x11 # perform operation +80003b3c: 56b105b3 sha512sig1l x11,x2,x11 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sig1l_cg_cmp_rd_rs2_b11, Zknh_sha512sig1l_cg_cmp_rd_rs2_b11_str) +80003b40: 000b2683 lw x13,0(x22) +80003b44: 00b68863 beq x13,x11,80003b54 +80003b48: 1f90176f jal x14,80005540 +80003b4c: 80003b3c .word 0x80003b3c +80003b50: 8000f5db .word 0x8000f5db +80003b54: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x2178df1c +80003b58: 00092c03 lw x24,0(x18) +80003b5c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xaefe8c55 +80003b60: 00092603 lw x12,0(x18) +80003b64: 00490913 addi x18,x18,4 + +80003b68 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b12: + sha512sig1l x12, x24, x12 # perform operation +80003b68: 56cc0633 sha512sig1l x12,x24,x12 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sig1l_cg_cmp_rd_rs2_b12, Zknh_sha512sig1l_cg_cmp_rd_rs2_b12_str) +80003b6c: 000b2683 lw x13,0(x22) +80003b70: 00c68863 beq x13,x12,80003b80 +80003b74: 1cd0176f jal x14,80005540 +80003b78: 80003b68 .word 0x80003b68 +80003b7c: 8000f61a .word 0x8000f61a +80003b80: 004b0b13 addi x22,x22,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b84: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003b88: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xa05cc4c3 +80003b8c: 00092583 lw x11,0(x18) +80003b90: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x2344923e +80003b94: 00092683 lw x13,0(x18) +80003b98: 00490913 addi x18,x18,4 + +80003b9c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b13: + sha512sig1l x13, x11, x13 # perform operation +80003b9c: 56d586b3 sha512sig1l x13,x11,x13 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zknh_sha512sig1l_cg_cmp_rd_rs2_b13, Zknh_sha512sig1l_cg_cmp_rd_rs2_b13_str) +80003ba0: 000b2383 lw x7,0(x22) +80003ba4: 00d38863 beq x7,x13,80003bb4 +80003ba8: 1710146f jal x8,80005518 +80003bac: 80003b9c .word 0x80003b9c +80003bb0: 8000f659 .word 0x8000f659 +80003bb4: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xe1244f14 +80003bb8: 00092d03 lw x26,0(x18) +80003bbc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xc2e00bc9 +80003bc0: 00092703 lw x14,0(x18) +80003bc4: 00490913 addi x18,x18,4 + +80003bc8 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b14: + sha512sig1l x14, x26, x14 # perform operation +80003bc8: 56ed0733 sha512sig1l x14,x26,x14 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zknh_sha512sig1l_cg_cmp_rd_rs2_b14, Zknh_sha512sig1l_cg_cmp_rd_rs2_b14_str) +80003bcc: 000b2383 lw x7,0(x22) +80003bd0: 00e38863 beq x7,x14,80003be0 +80003bd4: 1450146f jal x8,80005518 +80003bd8: 80003bc8 .word 0x80003bc8 +80003bdc: 8000f698 .word 0x8000f698 +80003be0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xc618fc9a +80003be4: 00092c03 lw x24,0(x18) +80003be8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x2013fb22 +80003bec: 00092783 lw x15,0(x18) +80003bf0: 00490913 addi x18,x18,4 + +80003bf4 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b15: + sha512sig1l x15, x24, x15 # perform operation +80003bf4: 56fc07b3 sha512sig1l x15,x24,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zknh_sha512sig1l_cg_cmp_rd_rs2_b15, Zknh_sha512sig1l_cg_cmp_rd_rs2_b15_str) +80003bf8: 000b2383 lw x7,0(x22) +80003bfc: 00f38863 beq x7,x15,80003c0c +80003c00: 1190146f jal x8,80005518 +80003c04: 80003bf4 .word 0x80003bf4 +80003c08: 8000f6d7 .word 0x8000f6d7 +80003c0c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xe29f2a22 +80003c10: 00092983 lw x19,0(x18) +80003c14: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xf225656e +80003c18: 00092803 lw x16,0(x18) +80003c1c: 00490913 addi x18,x18,4 + +80003c20 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b16: + sha512sig1l x16, x19, x16 # perform operation +80003c20: 57098833 sha512sig1l x16,x19,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zknh_sha512sig1l_cg_cmp_rd_rs2_b16, Zknh_sha512sig1l_cg_cmp_rd_rs2_b16_str) +80003c24: 000b2383 lw x7,0(x22) +80003c28: 01038863 beq x7,x16,80003c38 +80003c2c: 0ed0146f jal x8,80005518 +80003c30: 80003c20 .word 0x80003c20 +80003c34: 8000f716 .word 0x8000f716 +80003c38: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x0ddf8bd1 +80003c3c: 00092183 lw x3,0(x18) +80003c40: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x5fee7b97 +80003c44: 00092883 lw x17,0(x18) +80003c48: 00490913 addi x18,x18,4 + +80003c4c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b17: + sha512sig1l x17, x3, x17 # perform operation +80003c4c: 571188b3 sha512sig1l x17,x3,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknh_sha512sig1l_cg_cmp_rd_rs2_b17, Zknh_sha512sig1l_cg_cmp_rd_rs2_b17_str) +80003c50: 000b2383 lw x7,0(x22) +80003c54: 01138863 beq x7,x17,80003c64 +80003c58: 0c10146f jal x8,80005518 +80003c5c: 80003c4c .word 0x80003c4c +80003c60: 8000f755 .word 0x8000f755 +80003c64: 004b0b13 addi x22,x22,4 + + mv x27, x18 # switch data pointer register to avoid conflict with test +80003c68: 00090d93 addi x27,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xfd22fdbb +80003c6c: 000da883 lw x17,0(x27) +80003c70: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x4ac2aed6 +80003c74: 000da903 lw x18,0(x27) +80003c78: 004d8d93 addi x27,x27,4 + +80003c7c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b18: + sha512sig1l x18, x17, x18 # perform operation +80003c7c: 57288933 sha512sig1l x18,x17,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1l_cg_cmp_rd_rs2_b18, Zknh_sha512sig1l_cg_cmp_rd_rs2_b18_str) +80003c80: 000b2383 lw x7,0(x22) +80003c84: 01238863 beq x7,x18,80003c94 +80003c88: 0910146f jal x8,80005518 +80003c8c: 80003c7c .word 0x80003c7c +80003c90: 8000f794 .word 0x8000f794 +80003c94: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x6d88533e +80003c98: 000da703 lw x14,0(x27) +80003c9c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xd5ec1aa2 +80003ca0: 000da983 lw x19,0(x27) +80003ca4: 004d8d93 addi x27,x27,4 + +80003ca8 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b19: + sha512sig1l x19, x14, x19 # perform operation +80003ca8: 573709b3 sha512sig1l x19,x14,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zknh_sha512sig1l_cg_cmp_rd_rs2_b19, Zknh_sha512sig1l_cg_cmp_rd_rs2_b19_str) +80003cac: 000b2383 lw x7,0(x22) +80003cb0: 01338863 beq x7,x19,80003cc0 +80003cb4: 0650146f jal x8,80005518 +80003cb8: 80003ca8 .word 0x80003ca8 +80003cbc: 8000f7d3 .word 0x8000f7d3 +80003cc0: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xfdb91935 +80003cc4: 000da583 lw x11,0(x27) +80003cc8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xc0c8d249 +80003ccc: 000daa03 lw x20,0(x27) +80003cd0: 004d8d93 addi x27,x27,4 + +80003cd4 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b20: + sha512sig1l x20, x11, x20 # perform operation +80003cd4: 57458a33 sha512sig1l x20,x11,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zknh_sha512sig1l_cg_cmp_rd_rs2_b20, Zknh_sha512sig1l_cg_cmp_rd_rs2_b20_str) +80003cd8: 000b2383 lw x7,0(x22) +80003cdc: 01438863 beq x7,x20,80003cec +80003ce0: 0390146f jal x8,80005518 +80003ce4: 80003cd4 .word 0x80003cd4 +80003ce8: 8000f812 .word 0x8000f812 +80003cec: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xdb0cd1eb +80003cf0: 000dad03 lw x26,0(x27) +80003cf4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xcefc9a09 +80003cf8: 000daa83 lw x21,0(x27) +80003cfc: 004d8d93 addi x27,x27,4 + +80003d00 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b21: + sha512sig1l x21, x26, x21 # perform operation +80003d00: 575d0ab3 sha512sig1l x21,x26,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zknh_sha512sig1l_cg_cmp_rd_rs2_b21, Zknh_sha512sig1l_cg_cmp_rd_rs2_b21_str) +80003d04: 000b2383 lw x7,0(x22) +80003d08: 01538863 beq x7,x21,80003d18 +80003d0c: 00d0146f jal x8,80005518 +80003d10: 80003d00 .word 0x80003d00 +80003d14: 8000f851 .word 0x8000f851 +80003d18: 004b0b13 addi x22,x22,4 + + mv x28, x22 # switch signature pointer register to avoid conflict with test +80003d1c: 000b0e13 addi x28,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x4fe40ad3 +80003d20: 000dac03 lw x24,0(x27) +80003d24: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x7d8ba7bb +80003d28: 000dab03 lw x22,0(x27) +80003d2c: 004d8d93 addi x27,x27,4 + +80003d30 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b22: + sha512sig1l x22, x24, x22 # perform operation +80003d30: 576c0b33 sha512sig1l x22,x24,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zknh_sha512sig1l_cg_cmp_rd_rs2_b22, Zknh_sha512sig1l_cg_cmp_rd_rs2_b22_str) +80003d34: 000e2383 lw x7,0(x28) +80003d38: 01638863 beq x7,x22,80003d48 +80003d3c: 7dc0146f jal x8,80005518 +80003d40: 80003d30 .word 0x80003d30 +80003d44: 8000f890 .word 0x8000f890 +80003d48: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs1: x1 = 0x69d8a90d +80003d4c: 000da083 lw x1,0(x27) +80003d50: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x3dcf0117 +80003d54: 000dab83 lw x23,0(x27) +80003d58: 004d8d93 addi x27,x27,4 + +80003d5c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b23: + sha512sig1l x23, x1, x23 # perform operation +80003d5c: 57708bb3 sha512sig1l x23,x1,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zknh_sha512sig1l_cg_cmp_rd_rs2_b23, Zknh_sha512sig1l_cg_cmp_rd_rs2_b23_str) +80003d60: 000e2383 lw x7,0(x28) +80003d64: 01738863 beq x7,x23,80003d74 +80003d68: 7b00146f jal x8,80005518 +80003d6c: 80003d5c .word 0x80003d5c +80003d70: 8000f8cf .word 0x8000f8cf +80003d74: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0xa752a879 +80003d78: 000da283 lw x5,0(x27) +80003d7c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x7f28cb1c +80003d80: 000dac03 lw x24,0(x27) +80003d84: 004d8d93 addi x27,x27,4 + +80003d88 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b24: + sha512sig1l x24, x5, x24 # perform operation +80003d88: 57828c33 sha512sig1l x24,x5,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zknh_sha512sig1l_cg_cmp_rd_rs2_b24, Zknh_sha512sig1l_cg_cmp_rd_rs2_b24_str) +80003d8c: 000e2383 lw x7,0(x28) +80003d90: 01838863 beq x7,x24,80003da0 +80003d94: 7840146f jal x8,80005518 +80003d98: 80003d88 .word 0x80003d88 +80003d9c: 8000f90e .word 0x8000f90e +80003da0: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0xf1bab9e4 +80003da4: 000da783 lw x15,0(x27) +80003da8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x27a22ba7 +80003dac: 000dac83 lw x25,0(x27) +80003db0: 004d8d93 addi x27,x27,4 + +80003db4 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b25: + sha512sig1l x25, x15, x25 # perform operation +80003db4: 57978cb3 sha512sig1l x25,x15,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknh_sha512sig1l_cg_cmp_rd_rs2_b25, Zknh_sha512sig1l_cg_cmp_rd_rs2_b25_str) +80003db8: 000e2383 lw x7,0(x28) +80003dbc: 01938863 beq x7,x25,80003dcc +80003dc0: 7580146f jal x8,80005518 +80003dc4: 80003db4 .word 0x80003db4 +80003dc8: 8000f94d .word 0x8000f94d +80003dcc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x989a39e6 +80003dd0: 000da783 lw x15,0(x27) +80003dd4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x96bec94e +80003dd8: 000dad03 lw x26,0(x27) +80003ddc: 004d8d93 addi x27,x27,4 + +80003de0 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b26: + sha512sig1l x26, x15, x26 # perform operation +80003de0: 57a78d33 sha512sig1l x26,x15,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zknh_sha512sig1l_cg_cmp_rd_rs2_b26, Zknh_sha512sig1l_cg_cmp_rd_rs2_b26_str) +80003de4: 000e2383 lw x7,0(x28) +80003de8: 01a38863 beq x7,x26,80003df8 +80003dec: 72c0146f jal x8,80005518 +80003df0: 80003de0 .word 0x80003de0 +80003df4: 8000f98c .word 0x8000f98c +80003df8: 004e0e13 addi x28,x28,4 + + mv x12, x27 # switch data pointer register to avoid conflict with test +80003dfc: 000d8613 addi x12,x27,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x3bc8b9e5 +80003e00: 00062e83 lw x29,0(x12) +80003e04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xac03c1ce +80003e08: 00062d83 lw x27,0(x12) +80003e0c: 00460613 addi x12,x12,4 + +80003e10 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b27: + sha512sig1l x27, x29, x27 # perform operation +80003e10: 57be8db3 sha512sig1l x27,x29,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zknh_sha512sig1l_cg_cmp_rd_rs2_b27, Zknh_sha512sig1l_cg_cmp_rd_rs2_b27_str) +80003e14: 000e2383 lw x7,0(x28) +80003e18: 01b38863 beq x7,x27,80003e28 +80003e1c: 6fc0146f jal x8,80005518 +80003e20: 80003e10 .word 0x80003e10 +80003e24: 8000f9cb .word 0x8000f9cb +80003e28: 004e0e13 addi x28,x28,4 + + mv x29, x28 # switch signature pointer register to avoid conflict with test +80003e2c: 000e0e93 addi x29,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x9e79a079 +80003e30: 00062f83 lw x31,0(x12) +80003e34: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x3491ea45 +80003e38: 00062e03 lw x28,0(x12) +80003e3c: 00460613 addi x12,x12,4 + +80003e40 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b28: + sha512sig1l x28, x31, x28 # perform operation +80003e40: 57cf8e33 sha512sig1l x28,x31,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zknh_sha512sig1l_cg_cmp_rd_rs2_b28, Zknh_sha512sig1l_cg_cmp_rd_rs2_b28_str) +80003e44: 000ea383 lw x7,0(x29) +80003e48: 01c38863 beq x7,x28,80003e58 +80003e4c: 6cc0146f jal x8,80005518 +80003e50: 80003e40 .word 0x80003e40 +80003e54: 8000fa0a .word 0x8000fa0a +80003e58: 004e8e93 addi x29,x29,4 + + mv x25, x29 # switch signature pointer register to avoid conflict with test +80003e5c: 000e8c93 addi x25,x29,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x9c243e08 +80003e60: 00062903 lw x18,0(x12) +80003e64: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x122777db +80003e68: 00062e83 lw x29,0(x12) +80003e6c: 00460613 addi x12,x12,4 + +80003e70 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b29: + sha512sig1l x29, x18, x29 # perform operation +80003e70: 57d90eb3 sha512sig1l x29,x18,x29 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zknh_sha512sig1l_cg_cmp_rd_rs2_b29, Zknh_sha512sig1l_cg_cmp_rd_rs2_b29_str) +80003e74: 000ca383 lw x7,0(x25) +80003e78: 01d38863 beq x7,x29,80003e88 +80003e7c: 69c0146f jal x8,80005518 +80003e80: 80003e70 .word 0x80003e70 +80003e84: 8000fa49 .word 0x8000fa49 +80003e88: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xac62b25c +80003e8c: 00062003 lw x0,0(x12) +80003e90: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x42a46e1b +80003e94: 00062f03 lw x30,0(x12) +80003e98: 00460613 addi x12,x12,4 + +80003e9c : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b30: + sha512sig1l x30, x0, x30 # perform operation +80003e9c: 57e00f33 sha512sig1l x30,x0,x30 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zknh_sha512sig1l_cg_cmp_rd_rs2_b30, Zknh_sha512sig1l_cg_cmp_rd_rs2_b30_str) +80003ea0: 000ca383 lw x7,0(x25) +80003ea4: 01e38863 beq x7,x30,80003eb4 +80003ea8: 6700146f jal x8,80005518 +80003eac: 80003e9c .word 0x80003e9c +80003eb0: 8000fa88 .word 0x8000fa88 +80003eb4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xddbd2d75 +80003eb8: 00062a03 lw x20,0(x12) +80003ebc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x92f273f1 +80003ec0: 00062f83 lw x31,0(x12) +80003ec4: 00460613 addi x12,x12,4 + +80003ec8 : +Zknh_sha512sig1l_cg_cmp_rd_rs2_b31: + sha512sig1l x31, x20, x31 # perform operation +80003ec8: 57fa0fb3 sha512sig1l x31,x20,x31 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zknh_sha512sig1l_cg_cmp_rd_rs2_b31, Zknh_sha512sig1l_cg_cmp_rd_rs2_b31_str) +80003ecc: 000ca383 lw x7,0(x25) +80003ed0: 01f38863 beq x7,x31,80003ee0 +80003ed4: 6440146f jal x8,80005518 +80003ed8: 80003ec8 .word 0x80003ec8 +80003edc: 8000fac7 .word 0x8000fac7 +80003ee0: 004c8c93 addi x25,x25,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x65b6840e +80003ee4: 00062003 lw x0,0(x12) +80003ee8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x8090e502 +80003eec: 00062003 lw x0,0(x12) +80003ef0: 00460613 addi x12,x12,4 + +80003ef4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b0: + sha512sig1l x0, x0, x0 # perform operation +80003ef4: 56000033 sha512sig1l x0,x0,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x0, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b0_str) +80003ef8: 000ca383 lw x7,0(x25) +80003efc: 00038863 beq x7,x0,80003f0c +80003f00: 6180146f jal x8,80005518 +80003f04: 80003ef4 .word 0x80003ef4 +80003f08: 8000fb06 .word 0x8000fb06 +80003f0c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x97174319 +80003f10: 00062083 lw x1,0(x12) +80003f14: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xaa5b8edd +80003f18: 00062083 lw x1,0(x12) +80003f1c: 00460613 addi x12,x12,4 + +80003f20 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b1: + sha512sig1l x1, x1, x1 # perform operation +80003f20: 561080b3 sha512sig1l x1,x1,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b1_str) +80003f24: 000ca383 lw x7,0(x25) +80003f28: 00138863 beq x7,x1,80003f38 +80003f2c: 5ec0146f jal x8,80005518 +80003f30: 80003f20 .word 0x80003f20 +80003f34: 8000fb48 .word 0x8000fb48 +80003f38: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x1dca4b6c +80003f3c: 00062103 lw x2,0(x12) +80003f40: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xd2980f5c +80003f44: 00062103 lw x2,0(x12) +80003f48: 00460613 addi x12,x12,4 + +80003f4c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b2: + sha512sig1l x2, x2, x2 # perform operation +80003f4c: 56210133 sha512sig1l x2,x2,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b2_str) +80003f50: 000ca383 lw x7,0(x25) +80003f54: 00238863 beq x7,x2,80003f64 +80003f58: 5c00146f jal x8,80005518 +80003f5c: 80003f4c .word 0x80003f4c +80003f60: 8000fb8a .word 0x8000fb8a +80003f64: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x522dc23b +80003f68: 00062183 lw x3,0(x12) +80003f6c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x308b0492 +80003f70: 00062183 lw x3,0(x12) +80003f74: 00460613 addi x12,x12,4 + +80003f78 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b3: + sha512sig1l x3, x3, x3 # perform operation +80003f78: 563181b3 sha512sig1l x3,x3,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b3_str) +80003f7c: 000ca383 lw x7,0(x25) +80003f80: 00338863 beq x7,x3,80003f90 +80003f84: 5940146f jal x8,80005518 +80003f88: 80003f78 .word 0x80003f78 +80003f8c: 8000fbcc .word 0x8000fbcc +80003f90: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x754feb15 +80003f94: 00062203 lw x4,0(x12) +80003f98: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x9cc48380 +80003f9c: 00062203 lw x4,0(x12) +80003fa0: 00460613 addi x12,x12,4 + +80003fa4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b4: + sha512sig1l x4, x4, x4 # perform operation +80003fa4: 56420233 sha512sig1l x4,x4,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b4_str) +80003fa8: 000ca383 lw x7,0(x25) +80003fac: 00438863 beq x7,x4,80003fbc +80003fb0: 5680146f jal x8,80005518 +80003fb4: 80003fa4 .word 0x80003fa4 +80003fb8: 8000fc0e .word 0x8000fc0e +80003fbc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x7735686c +80003fc0: 00062283 lw x5,0(x12) +80003fc4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x82f5a31c +80003fc8: 00062283 lw x5,0(x12) +80003fcc: 00460613 addi x12,x12,4 + +80003fd0 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b5: + sha512sig1l x5, x5, x5 # perform operation +80003fd0: 565282b3 sha512sig1l x5,x5,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b5_str) +80003fd4: 000ca383 lw x7,0(x25) +80003fd8: 00538863 beq x7,x5,80003fe8 +80003fdc: 53c0146f jal x8,80005518 +80003fe0: 80003fd0 .word 0x80003fd0 +80003fe4: 8000fc50 .word 0x8000fc50 +80003fe8: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x71a3de3b +80003fec: 00062303 lw x6,0(x12) +80003ff0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x85e7990d +80003ff4: 00062303 lw x6,0(x12) +80003ff8: 00460613 addi x12,x12,4 + +80003ffc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b6: + sha512sig1l x6, x6, x6 # perform operation +80003ffc: 56630333 sha512sig1l x6,x6,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b6_str) +80004000: 000ca383 lw x7,0(x25) +80004004: 00638863 beq x7,x6,80004014 +80004008: 5100146f jal x8,80005518 +8000400c: 80003ffc .word 0x80003ffc +80004010: 8000fc92 .word 0x8000fc92 +80004014: 004c8c93 addi x25,x25,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80004018: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +8000401c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x4f2fb557 +80004020: 00062383 lw x7,0(x12) +80004024: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x777fe67e +80004028: 00062383 lw x7,0(x12) +8000402c: 00460613 addi x12,x12,4 + +80004030 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b7: + sha512sig1l x7, x7, x7 # perform operation +80004030: 567383b3 sha512sig1l x7,x7,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b7_str) +80004034: 000ca683 lw x13,0(x25) +80004038: 00768863 beq x13,x7,80004048 +8000403c: 5040176f jal x14,80005540 +80004040: 80004030 .word 0x80004030 +80004044: 8000fcd4 .word 0x8000fcd4 +80004048: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xaf1e164c +8000404c: 00062403 lw x8,0(x12) +80004050: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x9525225f +80004054: 00062403 lw x8,0(x12) +80004058: 00460613 addi x12,x12,4 + +8000405c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b8: + sha512sig1l x8, x8, x8 # perform operation +8000405c: 56840433 sha512sig1l x8,x8,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b8_str) +80004060: 000ca683 lw x13,0(x25) +80004064: 00868863 beq x13,x8,80004074 +80004068: 4d80176f jal x14,80005540 +8000406c: 8000405c .word 0x8000405c +80004070: 8000fd16 .word 0x8000fd16 +80004074: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x29f25c71 +80004078: 00062483 lw x9,0(x12) +8000407c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xf452a278 +80004080: 00062483 lw x9,0(x12) +80004084: 00460613 addi x12,x12,4 + +80004088 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b9: + sha512sig1l x9, x9, x9 # perform operation +80004088: 569484b3 sha512sig1l x9,x9,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b9_str) +8000408c: 000ca683 lw x13,0(x25) +80004090: 00968863 beq x13,x9,800040a0 +80004094: 4ac0176f jal x14,80005540 +80004098: 80004088 .word 0x80004088 +8000409c: 8000fd58 .word 0x8000fd58 +800040a0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x09df711f +800040a4: 00062503 lw x10,0(x12) +800040a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xcb374182 +800040ac: 00062503 lw x10,0(x12) +800040b0: 00460613 addi x12,x12,4 + +800040b4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b10: + sha512sig1l x10, x10, x10 # perform operation +800040b4: 56a50533 sha512sig1l x10,x10,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b10_str) +800040b8: 000ca683 lw x13,0(x25) +800040bc: 00a68863 beq x13,x10,800040cc +800040c0: 4800176f jal x14,80005540 +800040c4: 800040b4 .word 0x800040b4 +800040c8: 8000fd9a .word 0x8000fd9a +800040cc: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xe2b0ea1d +800040d0: 00062583 lw x11,0(x12) +800040d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x37dcea98 +800040d8: 00062583 lw x11,0(x12) +800040dc: 00460613 addi x12,x12,4 + +800040e0 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b11: + sha512sig1l x11, x11, x11 # perform operation +800040e0: 56b585b3 sha512sig1l x11,x11,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b11_str) +800040e4: 000ca683 lw x13,0(x25) +800040e8: 00b68863 beq x13,x11,800040f8 +800040ec: 4540176f jal x14,80005540 +800040f0: 800040e0 .word 0x800040e0 +800040f4: 8000fddd .word 0x8000fddd +800040f8: 004c8c93 addi x25,x25,4 + + mv x16, x12 # switch data pointer register to avoid conflict with test +800040fc: 00060813 addi x16,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x89afe241 +80004100: 00082603 lw x12,0(x16) +80004104: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x09bdc104 +80004108: 00082603 lw x12,0(x16) +8000410c: 00480813 addi x16,x16,4 + +80004110 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b12: + sha512sig1l x12, x12, x12 # perform operation +80004110: 56c60633 sha512sig1l x12,x12,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b12_str) +80004114: 000ca683 lw x13,0(x25) +80004118: 00c68863 beq x13,x12,80004128 +8000411c: 4240176f jal x14,80005540 +80004120: 80004110 .word 0x80004110 +80004124: 8000fe20 .word 0x8000fe20 +80004128: 004c8c93 addi x25,x25,4 + + mv x4, x13 # switch temp register to avoid conflict with test +8000412c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80004130: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x9eb6752c +80004134: 00082683 lw x13,0(x16) +80004138: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xd298d27c +8000413c: 00082683 lw x13,0(x16) +80004140: 00480813 addi x16,x16,4 + +80004144 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b13: + sha512sig1l x13, x13, x13 # perform operation +80004144: 56d686b3 sha512sig1l x13,x13,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b13_str) +80004148: 000ca203 lw x4,0(x25) +8000414c: 00d20863 beq x4,x13,8000415c +80004150: 3b0012ef jal x5,80005500 +80004154: 80004144 .word 0x80004144 +80004158: 8000fe63 .word 0x8000fe63 +8000415c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xe39fe7a9 +80004160: 00082703 lw x14,0(x16) +80004164: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xcb2337da +80004168: 00082703 lw x14,0(x16) +8000416c: 00480813 addi x16,x16,4 + +80004170 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b14: + sha512sig1l x14, x14, x14 # perform operation +80004170: 56e70733 sha512sig1l x14,x14,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b14_str) +80004174: 000ca203 lw x4,0(x25) +80004178: 00e20863 beq x4,x14,80004188 +8000417c: 384012ef jal x5,80005500 +80004180: 80004170 .word 0x80004170 +80004184: 8000fea6 .word 0x8000fea6 +80004188: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x03296270 +8000418c: 00082783 lw x15,0(x16) +80004190: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xecf80665 +80004194: 00082783 lw x15,0(x16) +80004198: 00480813 addi x16,x16,4 + +8000419c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b15: + sha512sig1l x15, x15, x15 # perform operation +8000419c: 56f787b3 sha512sig1l x15,x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 000ca203 lw x4,0(x25) +800041a4: 00f20863 beq x4,x15,800041b4 +800041a8: 358012ef jal x5,80005500 +800041ac: 8000419c .word 0x8000419c +800041b0: 8000fee9 .word 0x8000fee9 +800041b4: 004c8c93 addi x25,x25,4 + + mv x31, x16 # switch data pointer register to avoid conflict with test +800041b8: 00080f93 addi x31,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0xda6b7b44 +800041bc: 000fa803 lw x16,0(x31) +800041c0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0xbbd7ab52 +800041c4: 000fa803 lw x16,0(x31) +800041c8: 004f8f93 addi x31,x31,4 + +800041cc : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b16: + sha512sig1l x16, x16, x16 # perform operation +800041cc: 57080833 sha512sig1l x16,x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b16_str) +800041d0: 000ca203 lw x4,0(x25) +800041d4: 01020863 beq x4,x16,800041e4 +800041d8: 328012ef jal x5,80005500 +800041dc: 800041cc .word 0x800041cc +800041e0: 8000ff2c .word 0x8000ff2c +800041e4: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x44e29167 +800041e8: 000fa883 lw x17,0(x31) +800041ec: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0x9015de02 +800041f0: 000fa883 lw x17,0(x31) +800041f4: 004f8f93 addi x31,x31,4 + +800041f8 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b17: + sha512sig1l x17, x17, x17 # perform operation +800041f8: 571888b3 sha512sig1l x17,x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b17_str) +800041fc: 000ca203 lw x4,0(x25) +80004200: 01120863 beq x4,x17,80004210 +80004204: 2fc012ef jal x5,80005500 +80004208: 800041f8 .word 0x800041f8 +8000420c: 8000ff6f .word 0x8000ff6f +80004210: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x39b4ac74 +80004214: 000fa903 lw x18,0(x31) +80004218: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0xba9dd5cf +8000421c: 000fa903 lw x18,0(x31) +80004220: 004f8f93 addi x31,x31,4 + +80004224 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b18: + sha512sig1l x18, x18, x18 # perform operation +80004224: 57290933 sha512sig1l x18,x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b18_str) +80004228: 000ca203 lw x4,0(x25) +8000422c: 01220863 beq x4,x18,8000423c +80004230: 2d0012ef jal x5,80005500 +80004234: 80004224 .word 0x80004224 +80004238: 8000ffb2 .word 0x8000ffb2 +8000423c: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xd4c254a7 +80004240: 000fa983 lw x19,0(x31) +80004244: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x9bd3223c +80004248: 000fa983 lw x19,0(x31) +8000424c: 004f8f93 addi x31,x31,4 + +80004250 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b19: + sha512sig1l x19, x19, x19 # perform operation +80004250: 573989b3 sha512sig1l x19,x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b19_str) +80004254: 000ca203 lw x4,0(x25) +80004258: 01320863 beq x4,x19,80004268 +8000425c: 2a4012ef jal x5,80005500 +80004260: 80004250 .word 0x80004250 +80004264: 8000fff5 .word 0x8000fff5 +80004268: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x10373249 +8000426c: 000faa03 lw x20,0(x31) +80004270: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x3f5d57a4 +80004274: 000faa03 lw x20,0(x31) +80004278: 004f8f93 addi x31,x31,4 + +8000427c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b20: + sha512sig1l x20, x20, x20 # perform operation +8000427c: 574a0a33 sha512sig1l x20,x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b20_str) +80004280: 000ca203 lw x4,0(x25) +80004284: 01420863 beq x4,x20,80004294 +80004288: 278012ef jal x5,80005500 +8000428c: 8000427c .word 0x8000427c +80004290: 80010038 .word 0x80010038 +80004294: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x4855ebb7 +80004298: 000faa83 lw x21,0(x31) +8000429c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xb3fc2432 +800042a0: 000faa83 lw x21,0(x31) +800042a4: 004f8f93 addi x31,x31,4 + +800042a8 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b21: + sha512sig1l x21, x21, x21 # perform operation +800042a8: 575a8ab3 sha512sig1l x21,x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b21_str) +800042ac: 000ca203 lw x4,0(x25) +800042b0: 01520863 beq x4,x21,800042c0 +800042b4: 24c012ef jal x5,80005500 +800042b8: 800042a8 .word 0x800042a8 +800042bc: 8001007b .word 0x8001007b +800042c0: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xe0ce4383 +800042c4: 000fab03 lw x22,0(x31) +800042c8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x4b4a2be2 +800042cc: 000fab03 lw x22,0(x31) +800042d0: 004f8f93 addi x31,x31,4 + +800042d4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b22: + sha512sig1l x22, x22, x22 # perform operation +800042d4: 576b0b33 sha512sig1l x22,x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b22_str) +800042d8: 000ca203 lw x4,0(x25) +800042dc: 01620863 beq x4,x22,800042ec +800042e0: 220012ef jal x5,80005500 +800042e4: 800042d4 .word 0x800042d4 +800042e8: 800100be .word 0x800100be +800042ec: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xc4c024e3 +800042f0: 000fab83 lw x23,0(x31) +800042f4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0xcadf4d89 +800042f8: 000fab83 lw x23,0(x31) +800042fc: 004f8f93 addi x31,x31,4 + +80004300 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b23: + sha512sig1l x23, x23, x23 # perform operation +80004300: 577b8bb3 sha512sig1l x23,x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b23_str) +80004304: 000ca203 lw x4,0(x25) +80004308: 01720863 beq x4,x23,80004318 +8000430c: 1f4012ef jal x5,80005500 +80004310: 80004300 .word 0x80004300 +80004314: 80010101 .word 0x80010101 +80004318: 004c8c93 addi x25,x25,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xed10b63f +8000431c: 000fac03 lw x24,0(x31) +80004320: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x1e43b417 +80004324: 000fac03 lw x24,0(x31) +80004328: 004f8f93 addi x31,x31,4 + +8000432c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b24: + sha512sig1l x24, x24, x24 # perform operation +8000432c: 578c0c33 sha512sig1l x24,x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b24_str) +80004330: 000ca203 lw x4,0(x25) +80004334: 01820863 beq x4,x24,80004344 +80004338: 1c8012ef jal x5,80005500 +8000433c: 8000432c .word 0x8000432c +80004340: 80010144 .word 0x80010144 +80004344: 004c8c93 addi x25,x25,4 + + mv x16, x25 # switch signature pointer register to avoid conflict with test +80004348: 000c8813 addi x16,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xa82ccb7b +8000434c: 000fac83 lw x25,0(x31) +80004350: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xebdd29f1 +80004354: 000fac83 lw x25,0(x31) +80004358: 004f8f93 addi x31,x31,4 + +8000435c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b25: + sha512sig1l x25, x25, x25 # perform operation +8000435c: 579c8cb3 sha512sig1l x25,x25,x25 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 00082203 lw x4,0(x16) +80004364: 01920863 beq x4,x25,80004374 +80004368: 198012ef jal x5,80005500 +8000436c: 8000435c .word 0x8000435c +80004370: 80010187 .word 0x80010187 +80004374: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x6b44a1c9 +80004378: 000fad03 lw x26,0(x31) +8000437c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xe3c9a72a +80004380: 000fad03 lw x26,0(x31) +80004384: 004f8f93 addi x31,x31,4 + +80004388 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b26: + sha512sig1l x26, x26, x26 # perform operation +80004388: 57ad0d33 sha512sig1l x26,x26,x26 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 00082203 lw x4,0(x16) +80004390: 01a20863 beq x4,x26,800043a0 +80004394: 16c012ef jal x5,80005500 +80004398: 80004388 .word 0x80004388 +8000439c: 800101ca .word 0x800101ca +800043a0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xe2e54b88 +800043a4: 000fad83 lw x27,0(x31) +800043a8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xa3f3d7c7 +800043ac: 000fad83 lw x27,0(x31) +800043b0: 004f8f93 addi x31,x31,4 + +800043b4 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b27: + sha512sig1l x27, x27, x27 # perform operation +800043b4: 57bd8db3 sha512sig1l x27,x27,x27 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b27_str) +800043b8: 00082203 lw x4,0(x16) +800043bc: 01b20863 beq x4,x27,800043cc +800043c0: 140012ef jal x5,80005500 +800043c4: 800043b4 .word 0x800043b4 +800043c8: 8001020d .word 0x8001020d +800043cc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x31d8ec45 +800043d0: 000fae03 lw x28,0(x31) +800043d4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x74b77dc5 +800043d8: 000fae03 lw x28,0(x31) +800043dc: 004f8f93 addi x31,x31,4 + +800043e0 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b28: + sha512sig1l x28, x28, x28 # perform operation +800043e0: 57ce0e33 sha512sig1l x28,x28,x28 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b28_str) +800043e4: 00082203 lw x4,0(x16) +800043e8: 01c20863 beq x4,x28,800043f8 +800043ec: 114012ef jal x5,80005500 +800043f0: 800043e0 .word 0x800043e0 +800043f4: 80010250 .word 0x80010250 +800043f8: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x762eb677 +800043fc: 000fae83 lw x29,0(x31) +80004400: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x762e5cff +80004404: 000fae83 lw x29,0(x31) +80004408: 004f8f93 addi x31,x31,4 + +8000440c : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b29: + sha512sig1l x29, x29, x29 # perform operation +8000440c: 57de8eb3 sha512sig1l x29,x29,x29 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b29_str) +80004410: 00082203 lw x4,0(x16) +80004414: 01d20863 beq x4,x29,80004424 +80004418: 0e8012ef jal x5,80005500 +8000441c: 8000440c .word 0x8000440c +80004420: 80010293 .word 0x80010293 +80004424: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x2df199bc +80004428: 000faf03 lw x30,0(x31) +8000442c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x69fdcf76 +80004430: 000faf03 lw x30,0(x31) +80004434: 004f8f93 addi x31,x31,4 + +80004438 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b30: + sha512sig1l x30, x30, x30 # perform operation +80004438: 57ef0f33 sha512sig1l x30,x30,x30 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b30_str) +8000443c: 00082203 lw x4,0(x16) +80004440: 01e20863 beq x4,x30,80004450 +80004444: 0bc012ef jal x5,80005500 +80004448: 80004438 .word 0x80004438 +8000444c: 800102d6 .word 0x800102d6 +80004450: 00480813 addi x16,x16,4 + + mv x22, x31 # switch data pointer register to avoid conflict with test +80004454: 000f8b13 addi x22,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xb1ee670d +80004458: 000b2f83 lw x31,0(x22) +8000445c: 004b0b13 addi x22,x22,4 + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs2: x31 = 0xa81e66a8 +80004460: 000b2f83 lw x31,0(x22) +80004464: 004b0b13 addi x22,x22,4 + +80004468 : +Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b31: + sha512sig1l x31, x31, x31 # perform operation +80004468: 57ff8fb3 sha512sig1l x31,x31,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sig1l_cg_cmp_rd_rs1_rs2_b31_str) +8000446c: 00082203 lw x4,0(x16) +80004470: 01f20863 beq x4,x31,80004480 +80004474: 08c012ef jal x5,80005500 +80004478: 80004468 .word 0x80004468 +8000447c: 80010319 .word 0x80010319 +80004480: 00480813 addi x16,x16,4 + + mv x2, x16 # restore signature pointer to default register for teardown +80004484: 00080113 addi x2,x16,0 + +80004488 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004488: 00000513 addi x10,x0,0 +8000448c: 00000073 ecall +80004490: fff00513 addi x10,x0,-1 +80004494: 1d800413 addi x8,x0,472 + +80004498 : +80004498: 34002373 csrrs x6,mscratch,x0 + +8000449c : +8000449c: 23832383 lw x7,568(x6) +800044a0: 23c32483 lw x9,572(x6) + +800044a4 : +800044a4: 22032383 lw x7,544(x6) + +800044a8 : +800044a8: 25032483 lw x9,592(x6) +800044ac: 34049073 csrrw x0,mscratch,x9 + +800044b0 : +800044b0: 24832483 lw x9,584(x6) +800044b4: 305493f3 csrrw x7,mtvec,x9 +800044b8: ffc4f493 andi x9,x9,-4 +800044bc: ffc3f393 andi x7,x7,-4 +800044c0: 00749e63 bne x9,x7,800044dc + +800044c4 : +800044c4: 00030493 addi x9,x6,0 + +800044c8 : +800044c8: 0004a783 lw x15,0(x9) +800044cc: 00f3a023 sw x15,0(x7) +800044d0: 00438393 addi x7,x7,4 +800044d4: 00448493 addi x9,x9,4 +800044d8: fe83c8e3 blt x7,x8,800044c8 +800044dc: 0000100f fence.i + +800044e0 : +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 4c550513 addi x10,x10,1221 # 800109e5 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001e097 auipc x1,0x1e +80004544: 024080e7 jalr x1,36(x1) # 80022564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 4c550513 addi x10,x10,1221 # 80010a25 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001e097 auipc x1,0x1e +80004584: fe4080e7 jalr x1,-28(x1) # 80022564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 4e550513 addi x10,x10,1253 # 80010a85 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001e097 auipc x1,0x1e +800045c4: fa4080e7 jalr x1,-92(x1) # 80022564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 05050513 addi x10,x10,80 # 80011630 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001e097 auipc x1,0x1e +80004604: f64080e7 jalr x1,-156(x1) # 80022564 +80004608: 0001e097 auipc x1,0x1e +8000460c: fbc080e7 jalr x1,-68(x1) # 800225c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 0a838393 addi x7,x7,168 # 80012708 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 06040413 addi x8,x8,96 # 80012700 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 80010bd9 .word 0x80010bd9 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 80010a47 .word 0x80010a47 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 2a450513 addi x10,x10,676 # 800109a4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001e097 auipc x1,0x1e +80004724: e44080e7 jalr x1,-444(x1) # 80022564 +80004728: 0001e097 auipc x1,0x1e +8000472c: e7c080e7 jalr x1,-388(x1) # 800225a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 2a550513 addi x10,x10,677 # 800109e5 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001e097 auipc x1,0x1e +80004764: e04080e7 jalr x1,-508(x1) # 80022564 +80004768: 0001e097 auipc x1,0x1e +8000476c: e5c080e7 jalr x1,-420(x1) # 800225c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce9ff06f jal x0,80004488 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047ac: cddff06f jal x0,80004488 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b8030313 addi x6,x6,-1152 # 800044e0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 52750513 addi x10,x10,1319 # 80012067 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001e097 auipc x1,0x1e +80004b64: a04080e7 jalr x1,-1532(x1) # 80022564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000c517 auipc x10,0xc +80004b84: 94850513 addi x10,x10,-1720 # 800104c8 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: f2e50513 addi x10,x10,-210 # 80010aee +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: de550513 addi x10,x10,-539 # 800109e5 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 0001e097 auipc x1,0x1e +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800225c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 4c848493 addi x9,x9,1224 # 800104a8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 14c40413 addi x8,x8,332 # 8002116c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010bf0 .word 0x80010bf0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010cf2 .word 0x80010cf2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010ded .word 0x80010ded +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010ee0 .word 0x80010ee0 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80011053 .word 0x80011053 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80022000 .word 0x80022000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80022014 .word 0x80022014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022030 .word 0x80022030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000b217 auipc x4,0xb +80005504: e6020213 addi x4,x4,-416 # 80010360 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000b397 auipc x7,0xb +8000551c: e4838393 addi x7,x7,-440 # 80010360 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000b697 auipc x13,0xb +80005544: e2068693 addi x13,x13,-480 # 80010360 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000b497 auipc x9,0xb +8000556c: df848493 addi x9,x9,-520 # 80010360 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000b497 auipc x9,0xb +80005610: d544a483 lw x9,-684(x9) # 80010360 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000d417 auipc x8,0xd +800056c4: 9f040413 addi x8,x8,-1552 # 800120b0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001c417 auipc x8,0x1c +80005704: a7040413 addi x8,x8,-1424 # 80021170 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000b497 auipc x9,0xb +80005744: d4848493 addi x9,x9,-696 # 80010488 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000b817 auipc x16,0xb +800057b4: ce880813 addi x16,x16,-792 # 80010498 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000b817 auipc x16,0xb +800057c8: cd480813 addi x16,x16,-812 # 80010498 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 40938393 addi x7,x7,1033 # 80010bd9 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000b817 auipc x16,0xb +800057e4: cb080813 addi x16,x16,-848 # 80010490 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 40438393 addi x7,x7,1028 # 80010bf0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 4ee38393 addi x7,x7,1262 # 80010cf2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 5d138393 addi x7,x7,1489 # 80010ded +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: 6ac38393 addi x7,x7,1708 # 80010ee0 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000c397 auipc x7,0xc +80005850: 80738393 addi x7,x7,-2041 # 80011053 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: 77338393 addi x7,x7,1907 # 80010fd7 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: 79938393 addi x7,x7,1945 # 80011015 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 39c38393 addi x7,x7,924 # 80010c30 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 48438393 addi x7,x7,1156 # 80010d30 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 56538393 addi x7,x7,1381 # 80010e29 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 64138393 addi x7,x7,1601 # 80010f1d +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: 79a38393 addi x7,x7,1946 # 8001108e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 36438393 addi x7,x7,868 # 80010c70 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 44a38393 addi x7,x7,1098 # 80010d6e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 52938393 addi x7,x7,1321 # 80010e65 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 60638393 addi x7,x7,1542 # 80010f5a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: 75d38393 addi x7,x7,1885 # 800110c9 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 32d38393 addi x7,x7,813 # 80010cb1 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 41138393 addi x7,x7,1041 # 80010dad +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 4ee38393 addi x7,x7,1262 # 80010ea2 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 5cc38393 addi x7,x7,1484 # 80010f98 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: 72138393 addi x7,x7,1825 # 80011105 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: 74638393 addi x7,x7,1862 # 80011142 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: 77d38393 addi x7,x7,1917 # 80011191 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000c397 auipc x7,0xc +80005a30: 86038393 addi x7,x7,-1952 # 8001128c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000c397 auipc x7,0xc +80005a48: 94438393 addi x7,x7,-1724 # 80011388 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000b817 auipc x16,0xb +80005a68: a2c80813 addi x16,x16,-1492 # 80010490 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000b817 auipc x16,0xb +80005a78: a1c80813 addi x16,x16,-1508 # 80010490 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000b817 auipc x16,0xb +80005a84: a1480813 addi x16,x16,-1516 # 80010494 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000b817 auipc x16,0xb +80005a94: a0080813 addi x16,x16,-1536 # 80010490 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: f0550513 addi x10,x10,-251 # 800109e5 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001d097 auipc x1,0x1d +80005b04: a64080e7 jalr x1,-1436(x1) # 80022564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: f0550513 addi x10,x10,-251 # 80010a25 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: f7c50513 addi x10,x10,-132 # 80010adc +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 0000b517 auipc x10,0xb +80005b8c: 8f852503 lw x10,-1800(x10) # 80010480 +80005b90: 0001d097 auipc x1,0x1d +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80022564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f4e50513 addi x10,x10,-178 # 80010aee +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 79852503 lw x10,1944(x10) # 80010360 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f1050513 addi x10,x10,-240 # 80010af0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000b517 auipc x10,0xb +80005c0c: 85852503 lw x10,-1960(x10) # 80010460 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000b517 auipc x10,0xb +80005c44: 88850513 addi x10,x10,-1912 # 800104c8 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001d097 auipc x1,0x1d +80005c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: e8450513 addi x10,x10,-380 # 80010b04 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 7c052503 lw x10,1984(x10) # 80010468 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: 80850513 addi x10,x10,-2040 # 800104c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000c517 auipc x10,0xc +80005d04: 83b50513 addi x10,x10,-1989 # 8001153b +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 63852503 lw x10,1592(x10) # 80010360 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: 78860613 addi x12,x12,1928 # 800104c8 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 6fc52503 lw x10,1788(x10) # 80010464 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000c517 auipc x10,0xc +80005da4: 8b150513 addi x10,x10,-1871 # 80011651 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001c097 auipc x1,0x1c +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80022564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: 6e860613 addi x12,x12,1768 # 800104c8 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: 65c52503 lw x10,1628(x10) # 80010464 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: 6d450513 addi x10,x10,1748 # 80011534 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001c097 auipc x1,0x1c +80005e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 62850513 addi x10,x10,1576 # 800104c8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 66c50513 addi x10,x10,1644 # 8001154c +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 45852503 lw x10,1112(x10) # 80010360 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 55852503 lw x10,1368(x10) # 80010470 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 54452503 lw x10,1348(x10) # 80010470 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 58850513 addi x10,x10,1416 # 800104c8 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001c097 auipc x1,0x1c +80005f64: 604080e7 jalr x1,1540(x1) # 80022564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 52052503 lw x10,1312(x10) # 80010488 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 5e350513 addi x10,x10,1507 # 80011563 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 3b852503 lw x10,952(x10) # 80010360 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 4c052503 lw x10,1216(x10) # 80010478 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 4ac52503 lw x10,1196(x10) # 80010478 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001c097 auipc x1,0x1c +80006004: 564080e7 jalr x1,1380(x1) # 80022564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 55a50513 addi x10,x10,1370 # 8001157a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 0000a517 auipc x10,0xa +8000604c: 43052503 lw x10,1072(x10) # 80010478 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 46850513 addi x10,x10,1128 # 800104c8 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 53850513 addi x10,x10,1336 # 800115d8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 3b052503 lw x10,944(x10) # 80010478 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 3e850513 addi x10,x10,1000 # 800104c8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 38442403 lw x8,900(x8) # 80010490 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 55d50513 addi x10,x10,1373 # 8001167d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 54950513 addi x10,x10,1353 # 800116a9 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 0000a817 auipc x16,0xa +8000618c: 31080813 addi x16,x16,784 # 80010498 +80006190: 00082503 lw x10,0(x16) +80006194: 0001c097 auipc x1,0x1c +80006198: 3d0080e7 jalr x1,976(x1) # 80022564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 94e50513 addi x10,x10,-1714 # 80010aee +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 4d950513 addi x10,x10,1241 # 800116b9 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 0000a517 auipc x10,0xa +8000620c: 27052503 lw x10,624(x10) # 80010478 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 2a850513 addi x10,x10,680 # 800104c8 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 48450513 addi x10,x10,1156 # 800116e4 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 0000a517 auipc x10,0xa +8000628c: 1e852503 lw x10,488(x10) # 80010470 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 22850513 addi x10,x10,552 # 800104c8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 1a832303 lw x6,424(x6) # 80010470 +800062d0: 0000a397 auipc x7,0xa +800062d4: 1a83a383 lw x7,424(x7) # 80010478 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 43350513 addi x10,x10,1075 # 80011713 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 45b50513 addi x10,x10,1115 # 8001177b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 0000a317 auipc x6,0xa +8000634c: 12832303 lw x6,296(x6) # 80010470 +80006350: 0000a397 auipc x7,0xa +80006354: 1283a383 lw x7,296(x7) # 80010478 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 14850513 addi x10,x10,328 # 800104c8 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001c097 auipc x1,0x1c +800063a4: 1c4080e7 jalr x1,452(x1) # 80022564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 3e250513 addi x10,x10,994 # 800117a2 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 33f50513 addi x10,x10,831 # 8001173f +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 33b50513 addi x10,x10,827 # 8001177b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 0000a317 auipc x6,0xa +8000646c: 01032303 lw x6,16(x6) # 80010478 +80006470: 0000a397 auipc x7,0xa +80006474: 0003a383 lw x7,0(x7) # 80010470 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 02850513 addi x10,x10,40 # 800104c8 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001c097 auipc x1,0x1c +800064c4: 0a4080e7 jalr x1,164(x1) # 80022564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 3aa50513 addi x10,x10,938 # 8001188a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 45150513 addi x10,x10,1105 # 80011971 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0000a517 auipc x10,0xa +8000654c: f4c52503 lw x10,-180(x10) # 80010494 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 42d50513 addi x10,x10,1069 # 800119ad +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3cb50513 addi x10,x10,971 # 8001198b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 39350513 addi x10,x10,915 # 80011993 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35b50513 addi x10,x10,859 # 8001199b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 32450513 addi x10,x10,804 # 800119a4 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001c097 auipc x1,0x1c +800066a4: ec4080e7 jalr x1,-316(x1) # 80022564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2f650513 addi x10,x10,758 # 800119b6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 0000a517 auipc x10,0xa +800066ec: da852503 lw x10,-600(x10) # 80010490 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 3cd50513 addi x10,x10,973 # 80011b0d +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 25050513 addi x10,x10,592 # 800119d0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 24150513 addi x10,x10,577 # 80011a01 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 22150513 addi x10,x10,545 # 80011a21 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1ff50513 addi x10,x10,511 # 80011a3f +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1de50513 addi x10,x10,478 # 80011a5e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 1c650513 addi x10,x10,454 # 80011a86 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 1b250513 addi x10,x10,434 # 80011ab2 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 19e50513 addi x10,x10,414 # 80011ade +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001c097 auipc x1,0x1c +80006964: c04080e7 jalr x1,-1020(x1) # 80022564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 19c50513 addi x10,x10,412 # 80011b1c +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 0000a517 auipc x10,0xa +800069ac: ad052503 lw x10,-1328(x10) # 80010478 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: b0850513 addi x10,x10,-1272 # 800104c8 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 13350513 addi x10,x10,307 # 80011b33 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 0000a517 auipc x10,0xa +80006a2c: a4852503 lw x10,-1464(x10) # 80010470 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: a8850513 addi x10,x10,-1400 # 800104c8 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a2852503 lw x10,-1496(x10) # 80010490 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 0ca50513 addi x10,x10,202 # 80011b4a +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9d052503 lw x10,-1584(x10) # 80010478 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001c097 auipc x1,0x1c +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80022564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 0a150513 addi x10,x10,161 # 80011b61 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 98852503 lw x10,-1656(x10) # 80010470 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 0000a517 auipc x10,0xa +80006b08: 98c52503 lw x10,-1652(x10) # 80010490 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 0b750513 addi x10,x10,183 # 80011bd7 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001c097 auipc x1,0x1c +80006b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 14d50513 addi x10,x10,333 # 80011cad +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 20050513 addi x10,x10,512 # 80011da0 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 2bb50513 addi x10,x10,699 # 80011e9b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 36250513 addi x10,x10,866 # 80011f82 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: f2f50513 addi x10,x10,-209 # 80011b8f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 0000a617 auipc x12,0xa +80006c8c: 82062603 lw x12,-2016(x12) # 800104a8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: ed850513 addi x10,x10,-296 # 80010b78 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 7c850513 addi x10,x10,1992 # 800104c8 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001c097 auipc x1,0x1c +80006d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 7b058593 addi x11,x11,1968 # 800104f0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 7e458593 addi x11,x11,2020 # 80010550 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 0000a517 auipc x10,0xa +80006da4: bee50513 addi x10,x10,-1042 # 8001098e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000b517 auipc x10,0xb +80006de4: 85050513 addi x10,x10,-1968 # 80011630 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001b097 auipc x1,0x1b +80006e04: 764080e7 jalr x1,1892(x1) # 80022564 + +80006e08 : +80006e08: 0001b097 auipc x1,0x1b +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800225c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: 69060613 addi x12,x12,1680 # 800104a0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d7950513 addi x10,x10,-647 # 80010b99 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: 66052503 lw x10,1632(x10) # 800104a8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 66850513 addi x10,x10,1640 # 800104c8 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 0000a517 auipc x10,0xa +80006ea4: d0950513 addi x10,x10,-759 # 80010ba9 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 5e852503 lw x10,1512(x10) # 800104b0 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 0000a517 auipc x10,0xa +80006f24: c9950513 addi x10,x10,-871 # 80010bb9 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 57052503 lw x10,1392(x10) # 800104b8 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 56850513 addi x10,x10,1384 # 800104c8 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 0000a517 auipc x10,0xa +80006fa4: c2950513 addi x10,x10,-983 # 80010bc9 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 4f852503 lw x10,1272(x10) # 800104c0 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009617 auipc x12,0x9 +8000700c: 49860613 addi x12,x12,1176 # 800104a0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 4a860613 addi x12,x12,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 1f838393 addi x7,x7,504 # 80005200 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 1dc38393 addi x7,x7,476 # 80005200 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 1c438393 addi x7,x7,452 # 80005200 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1b038393 addi x7,x7,432 # 80005200 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1a438393 addi x7,x7,420 # 80005200 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 17038393 addi x7,x7,368 # 80005200 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 3ec30313 addi x6,x6,1004 # 80004488 +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 15838393 addi x7,x7,344 # 80005200 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3d430313 addi x6,x6,980 # 80004488 +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 14038393 addi x7,x7,320 # 80005200 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3bc30313 addi x6,x6,956 # 80004488 +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 12838393 addi x7,x7,296 # 80005200 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 25878793 addi x15,x15,600 # 80004498 +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 02018193 addi x3,x3,32 # 80005500 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sum0r-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sum0r-00.elf.objdump new file mode 100644 index 0000000..39d4849 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sum0r-00.elf.objdump @@ -0,0 +1,13197 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sum0r-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sum0r-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 00002676 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025cf1 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d72 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025d95 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025da8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025dd0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e5f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccyVWwiw.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090d0 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b13 +800092cf l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b14_str +800002fc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b15_str +80000328 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b16_str +80000354 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b17_str +80000384 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b18_str +800003b0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b19_str +800003dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b23_str +80000490 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b24_str +800004bc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b25_str +800004e8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b26_str +80000514 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b27_str +80000540 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b28_str +8000056c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b29_str +80000598 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b30_str +800005c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_b31_str +800005f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b0_str +8000061c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b1_str +80000648 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b2_str +80000678 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +80009801 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b6_str +80000730 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b7 +800098ac l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b7_str +8000075c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b8_str +80000788 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b9_str +800007b4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b10_str +800007e0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b11_str +8000080c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b12_str +80000840 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b13_str +8000086c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b14_str +80000898 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b15_str +800008c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b16_str +800008f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b17_str +8000091c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b18_str +80000948 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b19_str +80000978 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b20_str +800009a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b21_str +800009d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b22_str +80000a00 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b23_str +80000a2c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b24_str +80000a58 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b25_str +80000a84 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b26_str +80000ab0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b27_str +80000adc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b28_str +80000b08 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b29_str +80000b34 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b30_str +80000b60 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_b31_str +80000b8c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b0_str +80000bbc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b1_str +80000be8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b2_str +80000c18 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b3_str +80000c44 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b4 +80009f33 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b4_str +80000c70 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b5_str +80000c9c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b6_str +80000cd0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b7_str +80000cfc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b8_str +80000d28 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b9_str +80000d54 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b10_str +80000d80 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b11_str +80000dac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b12_str +80000de0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b13_str +80000e0c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b14_str +80000e38 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b15_str +80000e68 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b16_str +80000e94 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b17_str +80000ec0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b18_str +80000eec l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b19_str +80000f18 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b20_str +80000f44 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b21_str +80000f70 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b22_str +80000f9c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b23_str +80000fc8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b24_str +80000ff4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b25_str +80001024 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b26_str +80001050 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b27_str +8000107c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b28_str +800010ac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b29_str +800010d8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b30_str +80001104 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sum0r_cg_cp_rd_b31_str +80001130 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x0_str +8000115c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x1_str +80001188 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x2_str +800011b4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000000_str +800011e0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000001_str +8000120c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x7fffffff_str +80001238 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x7ffffffe_str +80001264 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xffffffff_str +80001290 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xfffffffe_str +800012bc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x5bbc8872_str +800012e8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0xaaaaaaaa_str +80001314 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs1_edges_0x55555555_str +80001340 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x0_str +8000136c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x1_str +80001398 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x2_str +800013c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000000_str +800013f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000001_str +8000141c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x7fffffff_str +80001448 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x7ffffffe_str +80001474 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xffffffff_str +800014a0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xfffffffe_str +800014cc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x5bbc8872_str +800014f8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0xaaaaaaaa_str +80001524 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sum0r_cg_cp_rs2_edges_0x55555555_str +80001550 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +8000157c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015a8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015d4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001600 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +8000162c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001658 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001684 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016b0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001708 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001734 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001760 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +8000178c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017b8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017e4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001810 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +8000183c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001868 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001894 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018c0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018ec l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001918 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001944 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001970 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +8000199c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019c8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019f4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a20 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a4c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a78 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001aa4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ad0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001afc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b28 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b54 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b80 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bd8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c04 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c30 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c5c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c88 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cb4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001ce0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d0c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d38 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d64 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d90 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dbc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001de8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e14 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e40 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e6c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e98 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ec4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ef0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f1c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f48 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f74 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fa0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fcc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001ff8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002024 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002050 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +8000207c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020a8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020d4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002100 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +8000212c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002158 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002184 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021b0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002208 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002234 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002260 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +8000228c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022b8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022e4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002310 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +8000233c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002368 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002394 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023c0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023ec l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002418 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002444 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002470 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +8000249c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024c8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024f4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002520 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +8000254c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002578 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025fc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002628 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002654 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002680 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026ac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026d8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002704 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002730 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +8000275c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002788 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027b4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027e0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +8000280c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002838 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002864 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002890 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028bc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028e8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002914 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002940 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +8000296c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +80002998 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a1c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a48 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a74 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aa0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002acc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002af8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b24 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b50 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b7c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002ba8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bd4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c00 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c2c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c58 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c84 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cb0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cdc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d08 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d34 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d60 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d8c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002db8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002de4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e10 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b0_str +80002e3c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b1_str +80002e68 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b2_str +80002e94 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b3_str +80002ec8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b4_str +80002ef4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b5_str +80002f20 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b6_str +80002f54 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b7_str +80002f80 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b8_str +80002fac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b9_str +80002fd8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b10_str +80003004 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b11_str +80003030 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b12_str +8000305c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b13_str +80003088 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b14_str +800030b8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b15_str +800030e4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b16_str +80003110 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b17_str +80003140 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b18_str +8000316c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b19_str +80003198 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b20_str +800031c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b21_str +800031f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b22_str +8000321c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b23_str +80003248 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b24_str +80003278 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b25_str +800032a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b26_str +800032d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b27_str +80003300 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b28_str +8000332c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b29_str +80003358 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b30_str +80003384 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rs1_rs2_b31_str +800033b0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b0_str +800033dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b1_str +8000340c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b2_str +80003438 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b3_str +8000346c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b4_str +80003498 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b5_str +800034c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b6_str +800034f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b7_str +8000351c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b8_str +8000354c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b9_str +80003578 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b10_str +800035a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b11_str +800035d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b12_str +80003604 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b13_str +80003630 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b14_str +80003660 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b15_str +8000368c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b16_str +800036b8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b17_str +800036e4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b18_str +80003710 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b19_str +8000373c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b20_str +80003768 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b21_str +80003794 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b22_str +800037c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b23_str +800037f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b24_str +8000381c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b26_str +8000387c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b27_str +800038a8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b28_str +800038d4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b29_str +80003900 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b30_str +8000392c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_b31_str +80003958 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b0_str +80003988 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b1_str +800039b4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b2_str +800039e0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b3_str +80003a14 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b4_str +80003a40 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b5_str +80003a6c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b6_str +80003a98 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b7_str +80003ac4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b8_str +80003af0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b9_str +80003b1c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b10_str +80003b48 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b11_str +80003b74 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b12_str +80003ba8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b13_str +80003bd4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b14_str +80003c00 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b15_str +80003c30 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b16_str +80003c5c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b17_str +80003c88 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b18_str +80003cb4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b19_str +80003ce0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b20_str +80003d0c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b21_str +80003d38 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b22_str +80003d64 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b23_str +80003d90 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b24_str +80003dbc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b25_str +80003de8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b26_str +80003e18 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b27_str +80003e48 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b28_str +80003e74 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b29_str +80003ea4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b30_str +80003ed0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs2_b31_str +80003efc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b0_str +80003f28 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b1_str +80003f54 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b2_str +80003f80 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b3_str +80003fac l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b4_str +80003fd8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b5_str +80004004 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b6_str +80004038 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b7_str +80004064 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b8_str +80004090 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b9_str +800040bc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b10_str +800040e8 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b11_str +80004114 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b12_str +80004140 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b13_str +8000416c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b14_str +80004198 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b15_str +800041c4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b16_str +800041f0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b17_str +8000421c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b18_str +80004248 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b19_str +80004278 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b20_str +800042a4 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b21_str +800042d0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b22_str +800042fc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b23_str +8000432c l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b24_str +80004358 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b25_str +80004384 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b26_str +800043b0 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b27_str +800043dc l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b28_str +80004408 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b29_str +80004438 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b30_str +80004468 l .text.rvtest 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004498 l .text.rvtest 00000000 exit_Mcleanup +8000449c l .text.rvtest 00000000 resto_Medeleg +800044a4 l .text.rvtest 00000000 resto_Msatp +800044a8 l .text.rvtest 00000000 resto_Mscratch +800044b0 l .text.rvtest 00000000 resto_Mxtvec +800044c4 l .text.rvtest 00000000 resto_Mtramp +800044c8 l .text.rvtest 00000000 resto_Mloop +800044e0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 sv_Hcause_str +80010e65 l .data 00000000 sv_Hepc_str +80010f5a l .data 00000000 sv_Htval_str +800110c9 l .data 00000000 sv_Hip_str +80010cb1 l .data 00000000 sv_Vvect_str +80010dad l .data 00000000 sv_Vcause_str +80010ea2 l .data 00000000 sv_Vepc_str +80010f98 l .data 00000000 sv_Vtval_str +80011105 l .data 00000000 sv_Vip_str +80011142 l .data 00000000 Mclr_Mext_int_str +80011191 l .data 00000000 Mclr_Sext_int_str +8001128c l .data 00000000 Sclr_Sext_int_str +80011388 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +80010494 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010adc l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +80010480 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80011713 l .data 00000000 trap_diag_extra_traps_str +8001177b l .data 00000000 trap_diag_diff_bytes_str +800117a2 l .data 00000000 trap_diag_extra_next_step_str +8001173f l .data 00000000 trap_diag_missing_traps_str +8001188a l .data 00000000 trap_diag_missing_next_step_str +80011971 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +800119ad l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +8001198b l .data 00000000 trap_diag_mode_m_str +80011993 l .data 00000000 trap_diag_mode_s_str +8001199b l .data 00000000 trap_diag_mode_hs_str +800119a4 l .data 00000000 trap_diag_mode_vs_str +800119b6 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause +80011b4a l .data 00000000 trap_diag_expected_cause_name_str +80006d34 l .text.rvtest 00000000 trap_cause_to_str +80011b61 l .data 00000000 trap_diag_actual_cause_name_str +80006afc l .text.rvtest 00000000 trap_field_not_epc +80006e10 l .text.rvtest 00000000 failedtest_print_csr_context +80011bd7 l .data 00000000 trap_diag_hint_vect_str +80011cad l .data 00000000 trap_diag_hint_cause_str +80011da0 l .data 00000000 trap_diag_hint_epc_str +80011e9b l .data 00000000 trap_diag_hint_tval_str +80011f82 l .data 00000000 trap_diag_hint_ip_str +80011b8f l .data 00000000 trap_diag_generic_str +80010b78 l .data 00000000 xepcinstrstr +80006d58 l .text.rvtest 00000000 trap_cause_interrupt +80006d38 l .text.rvtest 00000000 trap_cause_exception +80006d84 l .text.rvtest 00000000 trap_cause_unknown +800104f0 l .data 00000000 trap_excpt_name_tbl +80010550 l .data 00000000 trap_int_name_tbl +8001098e l .data 00000000 trap_cause_unknown_str +80006e08 l .text.rvtest 00000000 failedtest_terminate +800104a0 l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 +80010617 l .data 00000000 trap_excpt_name_6 +80010635 l .data 00000000 trap_excpt_name_7 +8001064d l .data 00000000 trap_excpt_name_8 +8001066b l .data 00000000 trap_excpt_name_9 +80010689 l .data 00000000 trap_excpt_name_10 +800106a8 l .data 00000000 trap_excpt_name_11 +800106c6 l .data 00000000 trap_excpt_name_12 +800106de l .data 00000000 trap_excpt_name_13 +800106ef l .data 00000000 trap_excpt_name_14 +800106fe l .data 00000000 trap_excpt_name_15 +80010714 l .data 00000000 trap_excpt_name_16 +80010721 l .data 00000000 trap_excpt_name_17 +80010730 l .data 00000000 trap_excpt_name_18 +80010740 l .data 00000000 trap_excpt_name_19 +80010750 l .data 00000000 trap_excpt_name_20 +8001076e l .data 00000000 trap_excpt_name_21 +80010785 l .data 00000000 trap_excpt_name_22 +8001079a l .data 00000000 trap_excpt_name_23 +800107b6 l .data 00000000 trap_int_name_0 +800107ce l .data 00000000 trap_int_name_1 +800107ed l .data 00000000 trap_int_name_2 +80010814 l .data 00000000 trap_int_name_3 +80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044e0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004488 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +80004488 g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xc59f3910 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x2fb99d58 +80000048: 0001a903 lw x18,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sum0r_cg_cp_rs1_b0: + sha512sum0r x16, x0, x18 # perform operation +80000050: 51200833 sha512sum0r x16,x0,x18 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknh_sha512sum0r_cg_cp_rs1_b0, Zknh_sha512sum0r_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01020863 beq x4,x16,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xa3f55bc9 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7de948a0 +80000074: 0001a883 lw x17,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sum0r_cg_cp_rs1_b1: + sha512sum0r x7, x1, x17 # perform operation +8000007c: 511083b3 sha512sum0r x7,x1,x17 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zknh_sha512sum0r_cg_cp_rs1_b1, Zknh_sha512sum0r_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00720863 beq x4,x7,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x18, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010913 addi x18,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x2a078348 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x1af46548 +800000a4: 0001af83 lw x31,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sum0r_cg_cp_rs1_b2: + sha512sum0r x7, x2, x31 # perform operation +800000ac: 51f103b3 sha512sum0r x7,x2,x31 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zknh_sha512sum0r_cg_cp_rs1_b2, Zknh_sha512sum0r_cg_cp_rs1_b2_str) +800000b0: 00092203 lw x4,0(x18) +800000b4: 00720863 beq x4,x7,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 00490913 addi x18,x18,4 + + mv x21, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018a93 addi x21,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x9cdbcc7f +800000cc: 000aa183 lw x3,0(x21) +800000d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x0c8bc1d1 +800000d4: 000aa883 lw x17,0(x21) +800000d8: 004a8a93 addi x21,x21,4 + +800000dc : +Zknh_sha512sum0r_cg_cp_rs1_b3: + sha512sum0r x9, x3, x17 # perform operation +800000dc: 511184b3 sha512sum0r x9,x3,x17 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zknh_sha512sum0r_cg_cp_rs1_b3, Zknh_sha512sum0r_cg_cp_rs1_b3_str) +800000e0: 00092203 lw x4,0(x18) +800000e4: 00920863 beq x4,x9,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0xe2f5adb3 +80000100: 000aa203 lw x4,0(x21) +80000104: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x6b3c42f9 +80000108: 000aae03 lw x28,0(x21) +8000010c: 004a8a93 addi x21,x21,4 + +80000110 : +Zknh_sha512sum0r_cg_cp_rs1_b4: + sha512sum0r x19, x4, x28 # perform operation +80000110: 51c209b3 sha512sum0r x19,x4,x28 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zknh_sha512sum0r_cg_cp_rs1_b4, Zknh_sha512sum0r_cg_cp_rs1_b4_str) +80000114: 00092383 lw x7,0(x18) +80000118: 01338863 beq x7,x19,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xf608360f +8000012c: 000aa283 lw x5,0(x21) +80000130: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xad631b4f +80000134: 000aa083 lw x1,0(x21) +80000138: 004a8a93 addi x21,x21,4 + +8000013c : +Zknh_sha512sum0r_cg_cp_rs1_b5: + sha512sum0r x15, x5, x1 # perform operation +8000013c: 501287b3 sha512sum0r x15,x5,x1 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zknh_sha512sum0r_cg_cp_rs1_b5, Zknh_sha512sum0r_cg_cp_rs1_b5_str) +80000140: 00092383 lw x7,0(x18) +80000144: 00f38863 beq x7,x15,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xeeaef5fe +80000158: 000aa303 lw x6,0(x21) +8000015c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x6455e635 +80000160: 000aa083 lw x1,0(x21) +80000164: 004a8a93 addi x21,x21,4 + +80000168 : +Zknh_sha512sum0r_cg_cp_rs1_b6: + sha512sum0r x10, x6, x1 # perform operation +80000168: 50130533 sha512sum0r x10,x6,x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zknh_sha512sum0r_cg_cp_rs1_b6, Zknh_sha512sum0r_cg_cp_rs1_b6_str) +8000016c: 00092383 lw x7,0(x18) +80000170: 00a38863 beq x7,x10,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009140 .word 0x80009140 +80000180: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x5627d17e +8000018c: 000aa383 lw x7,0(x21) +80000190: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x4b2d3419 +80000194: 000aa083 lw x1,0(x21) +80000198: 004a8a93 addi x21,x21,4 + +8000019c : +Zknh_sha512sum0r_cg_cp_rs1_b7: + sha512sum0r x8, x7, x1 # perform operation +8000019c: 50138433 sha512sum0r x8,x7,x1 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknh_sha512sum0r_cg_cp_rs1_b7, Zknh_sha512sum0r_cg_cp_rs1_b7_str) +800001a0: 00092203 lw x4,0(x18) +800001a4: 00820863 beq x4,x8,800001b4 +800001a8: 358052ef jal x5,80005500 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009178 .word 0x80009178 +800001b4: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xddfc15a9 +800001b8: 000aa403 lw x8,0(x21) +800001bc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xab6c3591 +800001c0: 000aa503 lw x10,0(x21) +800001c4: 004a8a93 addi x21,x21,4 + +800001c8 : +Zknh_sha512sum0r_cg_cp_rs1_b8: + sha512sum0r x2, x8, x10 # perform operation +800001c8: 50a40133 sha512sum0r x2,x8,x10 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zknh_sha512sum0r_cg_cp_rs1_b8, Zknh_sha512sum0r_cg_cp_rs1_b8_str) +800001cc: 00092203 lw x4,0(x18) +800001d0: 00220863 beq x4,x2,800001e0 +800001d4: 32c052ef jal x5,80005500 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 800091b0 .word 0x800091b0 +800001e0: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x06e66660 +800001e4: 000aa483 lw x9,0(x21) +800001e8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x7f19be22 +800001ec: 000aa103 lw x2,0(x21) +800001f0: 004a8a93 addi x21,x21,4 + +800001f4 : +Zknh_sha512sum0r_cg_cp_rs1_b9: + sha512sum0r x8, x9, x2 # perform operation +800001f4: 50248433 sha512sum0r x8,x9,x2 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknh_sha512sum0r_cg_cp_rs1_b9, Zknh_sha512sum0r_cg_cp_rs1_b9_str) +800001f8: 00092203 lw x4,0(x18) +800001fc: 00820863 beq x4,x8,8000020c +80000200: 300052ef jal x5,80005500 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091e8 .word 0x800091e8 +8000020c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x4d9675e1 +80000210: 000aa503 lw x10,0(x21) +80000214: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x42623ac1 +80000218: 000aa703 lw x14,0(x21) +8000021c: 004a8a93 addi x21,x21,4 + +80000220 : +Zknh_sha512sum0r_cg_cp_rs1_b10: + sha512sum0r x27, x10, x14 # perform operation +80000220: 50e50db3 sha512sum0r x27,x10,x14 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zknh_sha512sum0r_cg_cp_rs1_b10, Zknh_sha512sum0r_cg_cp_rs1_b10_str) +80000224: 00092203 lw x4,0(x18) +80000228: 01b20863 beq x4,x27,80000238 +8000022c: 2d4052ef jal x5,80005500 +80000230: 80000220 .word 0x80000220 +80000234: 80009221 .word 0x80009221 +80000238: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x756976c2 +8000023c: 000aa583 lw x11,0(x21) +80000240: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x80e950f6 +80000244: 000aac83 lw x25,0(x21) +80000248: 004a8a93 addi x21,x21,4 + +8000024c : +Zknh_sha512sum0r_cg_cp_rs1_b11: + sha512sum0r x1, x11, x25 # perform operation +8000024c: 519580b3 sha512sum0r x1,x11,x25 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zknh_sha512sum0r_cg_cp_rs1_b11, Zknh_sha512sum0r_cg_cp_rs1_b11_str) +80000250: 00092203 lw x4,0(x18) +80000254: 00120863 beq x4,x1,80000264 +80000258: 2a8052ef jal x5,80005500 +8000025c: 8000024c .word 0x8000024c +80000260: 8000925b .word 0x8000925b +80000264: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x0a9f9b76 +80000268: 000aa603 lw x12,0(x21) +8000026c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x5194a3b5 +80000270: 000aad03 lw x26,0(x21) +80000274: 004a8a93 addi x21,x21,4 + +80000278 : +Zknh_sha512sum0r_cg_cp_rs1_b12: + sha512sum0r x13, x12, x26 # perform operation +80000278: 51a606b3 sha512sum0r x13,x12,x26 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zknh_sha512sum0r_cg_cp_rs1_b12, Zknh_sha512sum0r_cg_cp_rs1_b12_str) +8000027c: 00092203 lw x4,0(x18) +80000280: 00d20863 beq x4,x13,80000290 +80000284: 27c052ef jal x5,80005500 +80000288: 80000278 .word 0x80000278 +8000028c: 80009295 .word 0x80009295 +80000290: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xa1a61c24 +80000294: 000aa683 lw x13,0(x21) +80000298: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x369e5498 +8000029c: 000aad03 lw x26,0(x21) +800002a0: 004a8a93 addi x21,x21,4 + +800002a4 : +Zknh_sha512sum0r_cg_cp_rs1_b13: + sha512sum0r x7, x13, x26 # perform operation +800002a4: 51a683b3 sha512sum0r x7,x13,x26 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zknh_sha512sum0r_cg_cp_rs1_b13, Zknh_sha512sum0r_cg_cp_rs1_b13_str) +800002a8: 00092203 lw x4,0(x18) +800002ac: 00720863 beq x4,x7,800002bc +800002b0: 250052ef jal x5,80005500 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 800092cf .word 0x800092cf +800002bc: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x24d87bde +800002c0: 000aa703 lw x14,0(x21) +800002c4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xc61adcac +800002c8: 000aa183 lw x3,0(x21) +800002cc: 004a8a93 addi x21,x21,4 + +800002d0 : +Zknh_sha512sum0r_cg_cp_rs1_b14: + sha512sum0r x30, x14, x3 # perform operation +800002d0: 50370f33 sha512sum0r x30,x14,x3 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zknh_sha512sum0r_cg_cp_rs1_b14, Zknh_sha512sum0r_cg_cp_rs1_b14_str) +800002d4: 00092203 lw x4,0(x18) +800002d8: 01e20863 beq x4,x30,800002e8 +800002dc: 224052ef jal x5,80005500 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 80009309 .word 0x80009309 +800002e8: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x27e88dd7 +800002ec: 000aa783 lw x15,0(x21) +800002f0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xa24f68e4 +800002f4: 000aa303 lw x6,0(x21) +800002f8: 004a8a93 addi x21,x21,4 + +800002fc : +Zknh_sha512sum0r_cg_cp_rs1_b15: + sha512sum0r x8, x15, x6 # perform operation +800002fc: 50678433 sha512sum0r x8,x15,x6 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknh_sha512sum0r_cg_cp_rs1_b15, Zknh_sha512sum0r_cg_cp_rs1_b15_str) +80000300: 00092203 lw x4,0(x18) +80000304: 00820863 beq x4,x8,80000314 +80000308: 1f8052ef jal x5,80005500 +8000030c: 800002fc .word 0x800002fc +80000310: 80009343 .word 0x80009343 +80000314: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x18d34afd +80000318: 000aa803 lw x16,0(x21) +8000031c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0xcf586103 +80000320: 000aae03 lw x28,0(x21) +80000324: 004a8a93 addi x21,x21,4 + +80000328 : +Zknh_sha512sum0r_cg_cp_rs1_b16: + sha512sum0r x30, x16, x28 # perform operation +80000328: 51c80f33 sha512sum0r x30,x16,x28 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zknh_sha512sum0r_cg_cp_rs1_b16, Zknh_sha512sum0r_cg_cp_rs1_b16_str) +8000032c: 00092203 lw x4,0(x18) +80000330: 01e20863 beq x4,x30,80000340 +80000334: 1cc052ef jal x5,80005500 +80000338: 80000328 .word 0x80000328 +8000033c: 8000937d .word 0x8000937d +80000340: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x1969bb6f +80000344: 000aa883 lw x17,0(x21) +80000348: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x89ba7c57 +8000034c: 000aab03 lw x22,0(x21) +80000350: 004a8a93 addi x21,x21,4 + +80000354 : +Zknh_sha512sum0r_cg_cp_rs1_b17: + sha512sum0r x6, x17, x22 # perform operation +80000354: 51688333 sha512sum0r x6,x17,x22 + # Check if x6 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x6, Zknh_sha512sum0r_cg_cp_rs1_b17, Zknh_sha512sum0r_cg_cp_rs1_b17_str) +80000358: 00092203 lw x4,0(x18) +8000035c: 00620863 beq x4,x6,8000036c +80000360: 1a0052ef jal x5,80005500 +80000364: 80000354 .word 0x80000354 +80000368: 800093b7 .word 0x800093b7 +8000036c: 00490913 addi x18,x18,4 + + mv x3, x18 # switch signature pointer register to avoid conflict with test +80000370: 00090193 addi x3,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xdb66f3ba +80000374: 000aa903 lw x18,0(x21) +80000378: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xe599c3ee +8000037c: 000aa883 lw x17,0(x21) +80000380: 004a8a93 addi x21,x21,4 + +80000384 : +Zknh_sha512sum0r_cg_cp_rs1_b18: + sha512sum0r x31, x18, x17 # perform operation +80000384: 51190fb3 sha512sum0r x31,x18,x17 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zknh_sha512sum0r_cg_cp_rs1_b18, Zknh_sha512sum0r_cg_cp_rs1_b18_str) +80000388: 0001a203 lw x4,0(x3) +8000038c: 01f20863 beq x4,x31,8000039c +80000390: 170052ef jal x5,80005500 +80000394: 80000384 .word 0x80000384 +80000398: 800093f1 .word 0x800093f1 +8000039c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x27e494c0 +800003a0: 000aa983 lw x19,0(x21) +800003a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x3e692957 +800003a8: 000aaf83 lw x31,0(x21) +800003ac: 004a8a93 addi x21,x21,4 + +800003b0 : +Zknh_sha512sum0r_cg_cp_rs1_b19: + sha512sum0r x12, x19, x31 # perform operation +800003b0: 51f98633 sha512sum0r x12,x19,x31 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zknh_sha512sum0r_cg_cp_rs1_b19, Zknh_sha512sum0r_cg_cp_rs1_b19_str) +800003b4: 0001a203 lw x4,0(x3) +800003b8: 00c20863 beq x4,x12,800003c8 +800003bc: 144052ef jal x5,80005500 +800003c0: 800003b0 .word 0x800003b0 +800003c4: 8000942b .word 0x8000942b +800003c8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x0ca0c78a +800003cc: 000aaa03 lw x20,0(x21) +800003d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x5b3aa8d7 +800003d4: 000aaf83 lw x31,0(x21) +800003d8: 004a8a93 addi x21,x21,4 + +800003dc : +Zknh_sha512sum0r_cg_cp_rs1_b20: + sha512sum0r x8, x20, x31 # perform operation +800003dc: 51fa0433 sha512sum0r x8,x20,x31 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zknh_sha512sum0r_cg_cp_rs1_b20, Zknh_sha512sum0r_cg_cp_rs1_b20_str) +800003e0: 0001a203 lw x4,0(x3) +800003e4: 00820863 beq x4,x8,800003f4 +800003e8: 118052ef jal x5,80005500 +800003ec: 800003dc .word 0x800003dc +800003f0: 80009465 .word 0x80009465 +800003f4: 00418193 addi x3,x3,4 + + mv x20, x21 # switch data pointer register to avoid conflict with test +800003f8: 000a8a13 addi x20,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xe9ac6acb +800003fc: 000a2a83 lw x21,0(x20) +80000400: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x3028e4ae +80000404: 000a2903 lw x18,0(x20) +80000408: 004a0a13 addi x20,x20,4 + +8000040c : +Zknh_sha512sum0r_cg_cp_rs1_b21: + sha512sum0r x30, x21, x18 # perform operation +8000040c: 512a8f33 sha512sum0r x30,x21,x18 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zknh_sha512sum0r_cg_cp_rs1_b21, Zknh_sha512sum0r_cg_cp_rs1_b21_str) +80000410: 0001a203 lw x4,0(x3) +80000414: 01e20863 beq x4,x30,80000424 +80000418: 0e8052ef jal x5,80005500 +8000041c: 8000040c .word 0x8000040c +80000420: 8000949f .word 0x8000949f +80000424: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xafc84a54 +80000428: 000a2b03 lw x22,0(x20) +8000042c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x5a098ab0 +80000430: 000a2383 lw x7,0(x20) +80000434: 004a0a13 addi x20,x20,4 + +80000438 : +Zknh_sha512sum0r_cg_cp_rs1_b22: + sha512sum0r x21, x22, x7 # perform operation +80000438: 507b0ab3 sha512sum0r x21,x22,x7 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zknh_sha512sum0r_cg_cp_rs1_b22, Zknh_sha512sum0r_cg_cp_rs1_b22_str) +8000043c: 0001a203 lw x4,0(x3) +80000440: 01520863 beq x4,x21,80000450 +80000444: 0bc052ef jal x5,80005500 +80000448: 80000438 .word 0x80000438 +8000044c: 800094d9 .word 0x800094d9 +80000450: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xfe8d9eff +80000454: 000a2b83 lw x23,0(x20) +80000458: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x63419379 +8000045c: 000a2503 lw x10,0(x20) +80000460: 004a0a13 addi x20,x20,4 + +80000464 : +Zknh_sha512sum0r_cg_cp_rs1_b23: + sha512sum0r x18, x23, x10 # perform operation +80000464: 50ab8933 sha512sum0r x18,x23,x10 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zknh_sha512sum0r_cg_cp_rs1_b23, Zknh_sha512sum0r_cg_cp_rs1_b23_str) +80000468: 0001a203 lw x4,0(x3) +8000046c: 01220863 beq x4,x18,8000047c +80000470: 090052ef jal x5,80005500 +80000474: 80000464 .word 0x80000464 +80000478: 80009513 .word 0x80009513 +8000047c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0xe17a68a8 +80000480: 000a2c03 lw x24,0(x20) +80000484: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x4ab6c1e4 +80000488: 000a2b03 lw x22,0(x20) +8000048c: 004a0a13 addi x20,x20,4 + +80000490 : +Zknh_sha512sum0r_cg_cp_rs1_b24: + sha512sum0r x27, x24, x22 # perform operation +80000490: 516c0db3 sha512sum0r x27,x24,x22 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zknh_sha512sum0r_cg_cp_rs1_b24, Zknh_sha512sum0r_cg_cp_rs1_b24_str) +80000494: 0001a203 lw x4,0(x3) +80000498: 01b20863 beq x4,x27,800004a8 +8000049c: 064052ef jal x5,80005500 +800004a0: 80000490 .word 0x80000490 +800004a4: 8000954d .word 0x8000954d +800004a8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xe61dec86 +800004ac: 000a2c83 lw x25,0(x20) +800004b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xd7f659d1 +800004b4: 000a2383 lw x7,0(x20) +800004b8: 004a0a13 addi x20,x20,4 + +800004bc : +Zknh_sha512sum0r_cg_cp_rs1_b25: + sha512sum0r x28, x25, x7 # perform operation +800004bc: 507c8e33 sha512sum0r x28,x25,x7 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zknh_sha512sum0r_cg_cp_rs1_b25, Zknh_sha512sum0r_cg_cp_rs1_b25_str) +800004c0: 0001a203 lw x4,0(x3) +800004c4: 01c20863 beq x4,x28,800004d4 +800004c8: 038052ef jal x5,80005500 +800004cc: 800004bc .word 0x800004bc +800004d0: 80009587 .word 0x80009587 +800004d4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x73d40fb1 +800004d8: 000a2d03 lw x26,0(x20) +800004dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x600eac1a +800004e0: 000a2b03 lw x22,0(x20) +800004e4: 004a0a13 addi x20,x20,4 + +800004e8 : +Zknh_sha512sum0r_cg_cp_rs1_b26: + sha512sum0r x11, x26, x22 # perform operation +800004e8: 516d05b3 sha512sum0r x11,x26,x22 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zknh_sha512sum0r_cg_cp_rs1_b26, Zknh_sha512sum0r_cg_cp_rs1_b26_str) +800004ec: 0001a203 lw x4,0(x3) +800004f0: 00b20863 beq x4,x11,80000500 +800004f4: 00c052ef jal x5,80005500 +800004f8: 800004e8 .word 0x800004e8 +800004fc: 800095c1 .word 0x800095c1 +80000500: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x3e1715b2 +80000504: 000a2d83 lw x27,0(x20) +80000508: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x0ed72a97 +8000050c: 000a2403 lw x8,0(x20) +80000510: 004a0a13 addi x20,x20,4 + +80000514 : +Zknh_sha512sum0r_cg_cp_rs1_b27: + sha512sum0r x28, x27, x8 # perform operation +80000514: 508d8e33 sha512sum0r x28,x27,x8 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zknh_sha512sum0r_cg_cp_rs1_b27, Zknh_sha512sum0r_cg_cp_rs1_b27_str) +80000518: 0001a203 lw x4,0(x3) +8000051c: 01c20863 beq x4,x28,8000052c +80000520: 7e1042ef jal x5,80005500 +80000524: 80000514 .word 0x80000514 +80000528: 800095fb .word 0x800095fb +8000052c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x1be016de +80000530: 000a2e03 lw x28,0(x20) +80000534: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x67bedbb4 +80000538: 000a2b83 lw x23,0(x20) +8000053c: 004a0a13 addi x20,x20,4 + +80000540 : +Zknh_sha512sum0r_cg_cp_rs1_b28: + sha512sum0r x19, x28, x23 # perform operation +80000540: 517e09b3 sha512sum0r x19,x28,x23 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zknh_sha512sum0r_cg_cp_rs1_b28, Zknh_sha512sum0r_cg_cp_rs1_b28_str) +80000544: 0001a203 lw x4,0(x3) +80000548: 01320863 beq x4,x19,80000558 +8000054c: 7b5042ef jal x5,80005500 +80000550: 80000540 .word 0x80000540 +80000554: 80009635 .word 0x80009635 +80000558: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x26a0e759 +8000055c: 000a2e83 lw x29,0(x20) +80000560: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x2af2dd57 +80000564: 000a2803 lw x16,0(x20) +80000568: 004a0a13 addi x20,x20,4 + +8000056c : +Zknh_sha512sum0r_cg_cp_rs1_b29: + sha512sum0r x17, x29, x16 # perform operation +8000056c: 510e88b3 sha512sum0r x17,x29,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zknh_sha512sum0r_cg_cp_rs1_b29, Zknh_sha512sum0r_cg_cp_rs1_b29_str) +80000570: 0001a203 lw x4,0(x3) +80000574: 01120863 beq x4,x17,80000584 +80000578: 789042ef jal x5,80005500 +8000057c: 8000056c .word 0x8000056c +80000580: 8000966f .word 0x8000966f +80000584: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x42769f96 +80000588: 000a2f03 lw x30,0(x20) +8000058c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xe8e64249 +80000590: 000a2803 lw x16,0(x20) +80000594: 004a0a13 addi x20,x20,4 + +80000598 : +Zknh_sha512sum0r_cg_cp_rs1_b30: + sha512sum0r x2, x30, x16 # perform operation +80000598: 510f0133 sha512sum0r x2,x30,x16 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zknh_sha512sum0r_cg_cp_rs1_b30, Zknh_sha512sum0r_cg_cp_rs1_b30_str) +8000059c: 0001a203 lw x4,0(x3) +800005a0: 00220863 beq x4,x2,800005b0 +800005a4: 75d042ef jal x5,80005500 +800005a8: 80000598 .word 0x80000598 +800005ac: 800096a9 .word 0x800096a9 +800005b0: 00418193 addi x3,x3,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x93e61bcf +800005b4: 000a2f83 lw x31,0(x20) +800005b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x852cd8f4 +800005bc: 000a2583 lw x11,0(x20) +800005c0: 004a0a13 addi x20,x20,4 + +800005c4 : +Zknh_sha512sum0r_cg_cp_rs1_b31: + sha512sum0r x21, x31, x11 # perform operation +800005c4: 50bf8ab3 sha512sum0r x21,x31,x11 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zknh_sha512sum0r_cg_cp_rs1_b31, Zknh_sha512sum0r_cg_cp_rs1_b31_str) +800005c8: 0001a203 lw x4,0(x3) +800005cc: 01520863 beq x4,x21,800005dc +800005d0: 731042ef jal x5,80005500 +800005d4: 800005c4 .word 0x800005c4 +800005d8: 800096e3 .word 0x800096e3 +800005dc: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xf88256ae +800005e0: 000a2a83 lw x21,0(x20) +800005e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xe885d2b6 +800005e8: 000a2003 lw x0,0(x20) +800005ec: 004a0a13 addi x20,x20,4 + +800005f0 : +Zknh_sha512sum0r_cg_cp_rs2_b0: + sha512sum0r x24, x21, x0 # perform operation +800005f0: 500a8c33 sha512sum0r x24,x21,x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zknh_sha512sum0r_cg_cp_rs2_b0, Zknh_sha512sum0r_cg_cp_rs2_b0_str) +800005f4: 0001a203 lw x4,0(x3) +800005f8: 01820863 beq x4,x24,80000608 +800005fc: 705042ef jal x5,80005500 +80000600: 800005f0 .word 0x800005f0 +80000604: 8000971d .word 0x8000971d +80000608: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xc34e82a4 +8000060c: 000a2c83 lw x25,0(x20) +80000610: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xc46787d5 +80000614: 000a2083 lw x1,0(x20) +80000618: 004a0a13 addi x20,x20,4 + +8000061c : +Zknh_sha512sum0r_cg_cp_rs2_b1: + sha512sum0r x11, x25, x1 # perform operation +8000061c: 501c85b3 sha512sum0r x11,x25,x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zknh_sha512sum0r_cg_cp_rs2_b1, Zknh_sha512sum0r_cg_cp_rs2_b1_str) +80000620: 0001a203 lw x4,0(x3) +80000624: 00b20863 beq x4,x11,80000634 +80000628: 6d9042ef jal x5,80005500 +8000062c: 8000061c .word 0x8000061c +80000630: 80009756 .word 0x80009756 +80000634: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x0aa75dc5 +80000638: 000a2a83 lw x21,0(x20) +8000063c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xd55880a9 +80000640: 000a2103 lw x2,0(x20) +80000644: 004a0a13 addi x20,x20,4 + +80000648 : +Zknh_sha512sum0r_cg_cp_rs2_b2: + sha512sum0r x13, x21, x2 # perform operation +80000648: 502a86b3 sha512sum0r x13,x21,x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zknh_sha512sum0r_cg_cp_rs2_b2, Zknh_sha512sum0r_cg_cp_rs2_b2_str) +8000064c: 0001a203 lw x4,0(x3) +80000650: 00d20863 beq x4,x13,80000660 +80000654: 6ad042ef jal x5,80005500 +80000658: 80000648 .word 0x80000648 +8000065c: 8000978f .word 0x8000978f +80000660: 00418193 addi x3,x3,4 + + mv x23, x3 # switch signature pointer register to avoid conflict with test +80000664: 00018b93 addi x23,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xadad91fa +80000668: 000a2583 lw x11,0(x20) +8000066c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xe5d01a6b +80000670: 000a2183 lw x3,0(x20) +80000674: 004a0a13 addi x20,x20,4 + +80000678 : +Zknh_sha512sum0r_cg_cp_rs2_b3: + sha512sum0r x17, x11, x3 # perform operation +80000678: 503588b3 sha512sum0r x17,x11,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zknh_sha512sum0r_cg_cp_rs2_b3, Zknh_sha512sum0r_cg_cp_rs2_b3_str) +8000067c: 000ba203 lw x4,0(x23) +80000680: 01120863 beq x4,x17,80000690 +80000684: 67d042ef jal x5,80005500 +80000688: 80000678 .word 0x80000678 +8000068c: 800097c8 .word 0x800097c8 +80000690: 004b8b93 addi x23,x23,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000694: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000698: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x25b13871 +8000069c: 000a2583 lw x11,0(x20) +800006a0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xcd63b2c0 +800006a4: 000a2203 lw x4,0(x20) +800006a8: 004a0a13 addi x20,x20,4 + +800006ac : +Zknh_sha512sum0r_cg_cp_rs2_b4: + sha512sum0r x22, x11, x4 # perform operation +800006ac: 50458b33 sha512sum0r x22,x11,x4 + # Check if x22 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x22, Zknh_sha512sum0r_cg_cp_rs2_b4, Zknh_sha512sum0r_cg_cp_rs2_b4_str) +800006b0: 000ba683 lw x13,0(x23) +800006b4: 01668863 beq x13,x22,800006c4 +800006b8: 6890476f jal x14,80005540 +800006bc: 800006ac .word 0x800006ac +800006c0: 80009801 .word 0x80009801 +800006c4: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x13d4fa2f +800006c8: 000a2483 lw x9,0(x20) +800006cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x57d44916 +800006d0: 000a2283 lw x5,0(x20) +800006d4: 004a0a13 addi x20,x20,4 + +800006d8 : +Zknh_sha512sum0r_cg_cp_rs2_b5: + sha512sum0r x19, x9, x5 # perform operation +800006d8: 505489b3 sha512sum0r x19,x9,x5 + # Check if x19 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x19, Zknh_sha512sum0r_cg_cp_rs2_b5, Zknh_sha512sum0r_cg_cp_rs2_b5_str) +800006dc: 000ba683 lw x13,0(x23) +800006e0: 01368863 beq x13,x19,800006f0 +800006e4: 65d0476f jal x14,80005540 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000983a .word 0x8000983a +800006f0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x042db18c +800006f4: 000a2483 lw x9,0(x20) +800006f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x0840e87e +800006fc: 000a2303 lw x6,0(x20) +80000700: 004a0a13 addi x20,x20,4 + +80000704 : +Zknh_sha512sum0r_cg_cp_rs2_b6: + sha512sum0r x10, x9, x6 # perform operation +80000704: 50648533 sha512sum0r x10,x9,x6 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknh_sha512sum0r_cg_cp_rs2_b6, Zknh_sha512sum0r_cg_cp_rs2_b6_str) +80000708: 000ba683 lw x13,0(x23) +8000070c: 00a68863 beq x13,x10,8000071c +80000710: 6310476f jal x14,80005540 +80000714: 80000704 .word 0x80000704 +80000718: 80009873 .word 0x80009873 +8000071c: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x83dabd52 +80000720: 000a2e03 lw x28,0(x20) +80000724: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x1796b7c4 +80000728: 000a2383 lw x7,0(x20) +8000072c: 004a0a13 addi x20,x20,4 + +80000730 : +Zknh_sha512sum0r_cg_cp_rs2_b7: + sha512sum0r x5, x28, x7 # perform operation +80000730: 507e02b3 sha512sum0r x5,x28,x7 + # Check if x5 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x5, Zknh_sha512sum0r_cg_cp_rs2_b7, Zknh_sha512sum0r_cg_cp_rs2_b7_str) +80000734: 000ba683 lw x13,0(x23) +80000738: 00568863 beq x13,x5,80000748 +8000073c: 6050476f jal x14,80005540 +80000740: 80000730 .word 0x80000730 +80000744: 800098ac .word 0x800098ac +80000748: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x830ae411 +8000074c: 000a2283 lw x5,0(x20) +80000750: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x6afddfa7 +80000754: 000a2403 lw x8,0(x20) +80000758: 004a0a13 addi x20,x20,4 + +8000075c : +Zknh_sha512sum0r_cg_cp_rs2_b8: + sha512sum0r x21, x5, x8 # perform operation +8000075c: 50828ab3 sha512sum0r x21,x5,x8 + # Check if x21 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x21, Zknh_sha512sum0r_cg_cp_rs2_b8, Zknh_sha512sum0r_cg_cp_rs2_b8_str) +80000760: 000ba683 lw x13,0(x23) +80000764: 01568863 beq x13,x21,80000774 +80000768: 5d90476f jal x14,80005540 +8000076c: 8000075c .word 0x8000075c +80000770: 800098e5 .word 0x800098e5 +80000774: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x848efb47 +80000778: 000a2303 lw x6,0(x20) +8000077c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x5c3f0723 +80000780: 000a2483 lw x9,0(x20) +80000784: 004a0a13 addi x20,x20,4 + +80000788 : +Zknh_sha512sum0r_cg_cp_rs2_b9: + sha512sum0r x11, x6, x9 # perform operation +80000788: 509305b3 sha512sum0r x11,x6,x9 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknh_sha512sum0r_cg_cp_rs2_b9, Zknh_sha512sum0r_cg_cp_rs2_b9_str) +8000078c: 000ba683 lw x13,0(x23) +80000790: 00b68863 beq x13,x11,800007a0 +80000794: 5ad0476f jal x14,80005540 +80000798: 80000788 .word 0x80000788 +8000079c: 8000991e .word 0x8000991e +800007a0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xf04ca051 +800007a4: 000a2203 lw x4,0(x20) +800007a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xc3f9bd75 +800007ac: 000a2503 lw x10,0(x20) +800007b0: 004a0a13 addi x20,x20,4 + +800007b4 : +Zknh_sha512sum0r_cg_cp_rs2_b10: + sha512sum0r x24, x4, x10 # perform operation +800007b4: 50a20c33 sha512sum0r x24,x4,x10 + # Check if x24 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x24, Zknh_sha512sum0r_cg_cp_rs2_b10, Zknh_sha512sum0r_cg_cp_rs2_b10_str) +800007b8: 000ba683 lw x13,0(x23) +800007bc: 01868863 beq x13,x24,800007cc +800007c0: 5810476f jal x14,80005540 +800007c4: 800007b4 .word 0x800007b4 +800007c8: 80009957 .word 0x80009957 +800007cc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x4f5a9ebc +800007d0: 000a2003 lw x0,0(x20) +800007d4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x7539782e +800007d8: 000a2583 lw x11,0(x20) +800007dc: 004a0a13 addi x20,x20,4 + +800007e0 : +Zknh_sha512sum0r_cg_cp_rs2_b11: + sha512sum0r x28, x0, x11 # perform operation +800007e0: 50b00e33 sha512sum0r x28,x0,x11 + # Check if x28 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x28, Zknh_sha512sum0r_cg_cp_rs2_b11, Zknh_sha512sum0r_cg_cp_rs2_b11_str) +800007e4: 000ba683 lw x13,0(x23) +800007e8: 01c68863 beq x13,x28,800007f8 +800007ec: 5550476f jal x14,80005540 +800007f0: 800007e0 .word 0x800007e0 +800007f4: 80009991 .word 0x80009991 +800007f8: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x397f5c42 +800007fc: 000a2383 lw x7,0(x20) +80000800: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x4ad4ec3d +80000804: 000a2603 lw x12,0(x20) +80000808: 004a0a13 addi x20,x20,4 + +8000080c : +Zknh_sha512sum0r_cg_cp_rs2_b12: + sha512sum0r x11, x7, x12 # perform operation +8000080c: 50c385b3 sha512sum0r x11,x7,x12 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknh_sha512sum0r_cg_cp_rs2_b12, Zknh_sha512sum0r_cg_cp_rs2_b12_str) +80000810: 000ba683 lw x13,0(x23) +80000814: 00b68863 beq x13,x11,80000824 +80000818: 5290476f jal x14,80005540 +8000081c: 8000080c .word 0x8000080c +80000820: 800099cb .word 0x800099cb +80000824: 004b8b93 addi x23,x23,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000828: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +8000082c: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x98394b4a +80000830: 000a2103 lw x2,0(x20) +80000834: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xddc68b72 +80000838: 000a2683 lw x13,0(x20) +8000083c: 004a0a13 addi x20,x20,4 + +80000840 : +Zknh_sha512sum0r_cg_cp_rs2_b13: + sha512sum0r x9, x2, x13 # perform operation +80000840: 50d104b3 sha512sum0r x9,x2,x13 + # Check if x9 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x9, Zknh_sha512sum0r_cg_cp_rs2_b13, Zknh_sha512sum0r_cg_cp_rs2_b13_str) +80000844: 000ba383 lw x7,0(x23) +80000848: 00938863 beq x7,x9,80000858 +8000084c: 4cd0446f jal x8,80005518 +80000850: 80000840 .word 0x80000840 +80000854: 80009a05 .word 0x80009a05 +80000858: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x3282e331 +8000085c: 000a2083 lw x1,0(x20) +80000860: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x0004f685 +80000864: 000a2703 lw x14,0(x20) +80000868: 004a0a13 addi x20,x20,4 + +8000086c : +Zknh_sha512sum0r_cg_cp_rs2_b14: + sha512sum0r x15, x1, x14 # perform operation +8000086c: 50e087b3 sha512sum0r x15,x1,x14 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zknh_sha512sum0r_cg_cp_rs2_b14, Zknh_sha512sum0r_cg_cp_rs2_b14_str) +80000870: 000ba383 lw x7,0(x23) +80000874: 00f38863 beq x7,x15,80000884 +80000878: 4a10446f jal x8,80005518 +8000087c: 8000086c .word 0x8000086c +80000880: 80009a3f .word 0x80009a3f +80000884: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xe80aa7ac +80000888: 000a2903 lw x18,0(x20) +8000088c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x3fbec7f6 +80000890: 000a2783 lw x15,0(x20) +80000894: 004a0a13 addi x20,x20,4 + +80000898 : +Zknh_sha512sum0r_cg_cp_rs2_b15: + sha512sum0r x21, x18, x15 # perform operation +80000898: 50f90ab3 sha512sum0r x21,x18,x15 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zknh_sha512sum0r_cg_cp_rs2_b15, Zknh_sha512sum0r_cg_cp_rs2_b15_str) +8000089c: 000ba383 lw x7,0(x23) +800008a0: 01538863 beq x7,x21,800008b0 +800008a4: 4750446f jal x8,80005518 +800008a8: 80000898 .word 0x80000898 +800008ac: 80009a79 .word 0x80009a79 +800008b0: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xcb1c2a32 +800008b4: 000a2b03 lw x22,0(x20) +800008b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x26feac16 +800008bc: 000a2803 lw x16,0(x20) +800008c0: 004a0a13 addi x20,x20,4 + +800008c4 : +Zknh_sha512sum0r_cg_cp_rs2_b16: + sha512sum0r x15, x22, x16 # perform operation +800008c4: 510b07b3 sha512sum0r x15,x22,x16 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zknh_sha512sum0r_cg_cp_rs2_b16, Zknh_sha512sum0r_cg_cp_rs2_b16_str) +800008c8: 000ba383 lw x7,0(x23) +800008cc: 00f38863 beq x7,x15,800008dc +800008d0: 4490446f jal x8,80005518 +800008d4: 800008c4 .word 0x800008c4 +800008d8: 80009ab3 .word 0x80009ab3 +800008dc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x00b1046f +800008e0: 000a2183 lw x3,0(x20) +800008e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x33478ffa +800008e8: 000a2883 lw x17,0(x20) +800008ec: 004a0a13 addi x20,x20,4 + +800008f0 : +Zknh_sha512sum0r_cg_cp_rs2_b17: + sha512sum0r x10, x3, x17 # perform operation +800008f0: 51118533 sha512sum0r x10,x3,x17 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zknh_sha512sum0r_cg_cp_rs2_b17, Zknh_sha512sum0r_cg_cp_rs2_b17_str) +800008f4: 000ba383 lw x7,0(x23) +800008f8: 00a38863 beq x7,x10,80000908 +800008fc: 41d0446f jal x8,80005518 +80000900: 800008f0 .word 0x800008f0 +80000904: 80009aed .word 0x80009aed +80000908: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xbf00314f +8000090c: 000a2183 lw x3,0(x20) +80000910: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xd4316870 +80000914: 000a2903 lw x18,0(x20) +80000918: 004a0a13 addi x20,x20,4 + +8000091c : +Zknh_sha512sum0r_cg_cp_rs2_b18: + sha512sum0r x22, x3, x18 # perform operation +8000091c: 51218b33 sha512sum0r x22,x3,x18 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zknh_sha512sum0r_cg_cp_rs2_b18, Zknh_sha512sum0r_cg_cp_rs2_b18_str) +80000920: 000ba383 lw x7,0(x23) +80000924: 01638863 beq x7,x22,80000934 +80000928: 3f10446f jal x8,80005518 +8000092c: 8000091c .word 0x8000091c +80000930: 80009b27 .word 0x80009b27 +80000934: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x0d66bbd0 +80000938: 000a2e03 lw x28,0(x20) +8000093c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x561765f7 +80000940: 000a2983 lw x19,0(x20) +80000944: 004a0a13 addi x20,x20,4 + +80000948 : +Zknh_sha512sum0r_cg_cp_rs2_b19: + sha512sum0r x21, x28, x19 # perform operation +80000948: 513e0ab3 sha512sum0r x21,x28,x19 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zknh_sha512sum0r_cg_cp_rs2_b19, Zknh_sha512sum0r_cg_cp_rs2_b19_str) +8000094c: 000ba383 lw x7,0(x23) +80000950: 01538863 beq x7,x21,80000960 +80000954: 3c50446f jal x8,80005518 +80000958: 80000948 .word 0x80000948 +8000095c: 80009b61 .word 0x80009b61 +80000960: 004b8b93 addi x23,x23,4 + + mv x16, x20 # switch data pointer register to avoid conflict with test +80000964: 000a0813 addi x16,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x2fabae8e +80000968: 00082003 lw x0,0(x16) +8000096c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x61ec24ef +80000970: 00082a03 lw x20,0(x16) +80000974: 00480813 addi x16,x16,4 + +80000978 : +Zknh_sha512sum0r_cg_cp_rs2_b20: + sha512sum0r x22, x0, x20 # perform operation +80000978: 51400b33 sha512sum0r x22,x0,x20 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zknh_sha512sum0r_cg_cp_rs2_b20, Zknh_sha512sum0r_cg_cp_rs2_b20_str) +8000097c: 000ba383 lw x7,0(x23) +80000980: 01638863 beq x7,x22,80000990 +80000984: 3950446f jal x8,80005518 +80000988: 80000978 .word 0x80000978 +8000098c: 80009b9b .word 0x80009b9b +80000990: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xdcf9eb48 +80000994: 00082e83 lw x29,0(x16) +80000998: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x50352260 +8000099c: 00082a83 lw x21,0(x16) +800009a0: 00480813 addi x16,x16,4 + +800009a4 : +Zknh_sha512sum0r_cg_cp_rs2_b21: + sha512sum0r x27, x29, x21 # perform operation +800009a4: 515e8db3 sha512sum0r x27,x29,x21 + # Check if x27 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x27, Zknh_sha512sum0r_cg_cp_rs2_b21, Zknh_sha512sum0r_cg_cp_rs2_b21_str) +800009a8: 000ba383 lw x7,0(x23) +800009ac: 01b38863 beq x7,x27,800009bc +800009b0: 3690446f jal x8,80005518 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 80009bd5 .word 0x80009bd5 +800009bc: 004b8b93 addi x23,x23,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x2f5efc67 +800009c0: 00082083 lw x1,0(x16) +800009c4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x5749a579 +800009c8: 00082b03 lw x22,0(x16) +800009cc: 00480813 addi x16,x16,4 + +800009d0 : +Zknh_sha512sum0r_cg_cp_rs2_b22: + sha512sum0r x4, x1, x22 # perform operation +800009d0: 51608233 sha512sum0r x4,x1,x22 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zknh_sha512sum0r_cg_cp_rs2_b22, Zknh_sha512sum0r_cg_cp_rs2_b22_str) +800009d4: 000ba383 lw x7,0(x23) +800009d8: 00438863 beq x7,x4,800009e8 +800009dc: 33d0446f jal x8,80005518 +800009e0: 800009d0 .word 0x800009d0 +800009e4: 80009c0f .word 0x80009c0f +800009e8: 004b8b93 addi x23,x23,4 + + mv x1, x23 # switch signature pointer register to avoid conflict with test +800009ec: 000b8093 addi x1,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x85e8dfbd +800009f0: 00082a03 lw x20,0(x16) +800009f4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x3f4208a2 +800009f8: 00082b83 lw x23,0(x16) +800009fc: 00480813 addi x16,x16,4 + +80000a00 : +Zknh_sha512sum0r_cg_cp_rs2_b23: + sha512sum0r x3, x20, x23 # perform operation +80000a00: 517a01b3 sha512sum0r x3,x20,x23 + # Check if x3 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x3, Zknh_sha512sum0r_cg_cp_rs2_b23, Zknh_sha512sum0r_cg_cp_rs2_b23_str) +80000a04: 0000a383 lw x7,0(x1) +80000a08: 00338863 beq x7,x3,80000a18 +80000a0c: 30d0446f jal x8,80005518 +80000a10: 80000a00 .word 0x80000a00 +80000a14: 80009c49 .word 0x80009c49 +80000a18: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xfefdd68e +80000a1c: 00082103 lw x2,0(x16) +80000a20: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xc20e7d08 +80000a24: 00082c03 lw x24,0(x16) +80000a28: 00480813 addi x16,x16,4 + +80000a2c : +Zknh_sha512sum0r_cg_cp_rs2_b24: + sha512sum0r x10, x2, x24 # perform operation +80000a2c: 51810533 sha512sum0r x10,x2,x24 + # Check if x10 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x10, Zknh_sha512sum0r_cg_cp_rs2_b24, Zknh_sha512sum0r_cg_cp_rs2_b24_str) +80000a30: 0000a383 lw x7,0(x1) +80000a34: 00a38863 beq x7,x10,80000a44 +80000a38: 2e10446f jal x8,80005518 +80000a3c: 80000a2c .word 0x80000a2c +80000a40: 80009c83 .word 0x80009c83 +80000a44: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x6309957f +80000a48: 00082e03 lw x28,0(x16) +80000a4c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x70707287 +80000a50: 00082c83 lw x25,0(x16) +80000a54: 00480813 addi x16,x16,4 + +80000a58 : +Zknh_sha512sum0r_cg_cp_rs2_b25: + sha512sum0r x26, x28, x25 # perform operation +80000a58: 519e0d33 sha512sum0r x26,x28,x25 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zknh_sha512sum0r_cg_cp_rs2_b25, Zknh_sha512sum0r_cg_cp_rs2_b25_str) +80000a5c: 0000a383 lw x7,0(x1) +80000a60: 01a38863 beq x7,x26,80000a70 +80000a64: 2b50446f jal x8,80005518 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 80009cbd .word 0x80009cbd +80000a70: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x0f5960d1 +80000a74: 00082703 lw x14,0(x16) +80000a78: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xe72c5694 +80000a7c: 00082d03 lw x26,0(x16) +80000a80: 00480813 addi x16,x16,4 + +80000a84 : +Zknh_sha512sum0r_cg_cp_rs2_b26: + sha512sum0r x0, x14, x26 # perform operation +80000a84: 51a70033 sha512sum0r x0,x14,x26 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zknh_sha512sum0r_cg_cp_rs2_b26, Zknh_sha512sum0r_cg_cp_rs2_b26_str) +80000a88: 0000a383 lw x7,0(x1) +80000a8c: 00038863 beq x7,x0,80000a9c +80000a90: 2890446f jal x8,80005518 +80000a94: 80000a84 .word 0x80000a84 +80000a98: 80009cf7 .word 0x80009cf7 +80000a9c: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xd6a8eb0e +80000aa0: 00082603 lw x12,0(x16) +80000aa4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xb4a5bf3b +80000aa8: 00082d83 lw x27,0(x16) +80000aac: 00480813 addi x16,x16,4 + +80000ab0 : +Zknh_sha512sum0r_cg_cp_rs2_b27: + sha512sum0r x10, x12, x27 # perform operation +80000ab0: 51b60533 sha512sum0r x10,x12,x27 + # Check if x10 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x10, Zknh_sha512sum0r_cg_cp_rs2_b27, Zknh_sha512sum0r_cg_cp_rs2_b27_str) +80000ab4: 0000a383 lw x7,0(x1) +80000ab8: 00a38863 beq x7,x10,80000ac8 +80000abc: 25d0446f jal x8,80005518 +80000ac0: 80000ab0 .word 0x80000ab0 +80000ac4: 80009d31 .word 0x80009d31 +80000ac8: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x2cceb679 +80000acc: 00082303 lw x6,0(x16) +80000ad0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xe96d1532 +80000ad4: 00082e03 lw x28,0(x16) +80000ad8: 00480813 addi x16,x16,4 + +80000adc : +Zknh_sha512sum0r_cg_cp_rs2_b28: + sha512sum0r x29, x6, x28 # perform operation +80000adc: 51c30eb3 sha512sum0r x29,x6,x28 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zknh_sha512sum0r_cg_cp_rs2_b28, Zknh_sha512sum0r_cg_cp_rs2_b28_str) +80000ae0: 0000a383 lw x7,0(x1) +80000ae4: 01d38863 beq x7,x29,80000af4 +80000ae8: 2310446f jal x8,80005518 +80000aec: 80000adc .word 0x80000adc +80000af0: 80009d6b .word 0x80009d6b +80000af4: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x979941aa +80000af8: 00082b03 lw x22,0(x16) +80000afc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x5ed0ca4a +80000b00: 00082e83 lw x29,0(x16) +80000b04: 00480813 addi x16,x16,4 + +80000b08 : +Zknh_sha512sum0r_cg_cp_rs2_b29: + sha512sum0r x13, x22, x29 # perform operation +80000b08: 51db06b3 sha512sum0r x13,x22,x29 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zknh_sha512sum0r_cg_cp_rs2_b29, Zknh_sha512sum0r_cg_cp_rs2_b29_str) +80000b0c: 0000a383 lw x7,0(x1) +80000b10: 00d38863 beq x7,x13,80000b20 +80000b14: 2050446f jal x8,80005518 +80000b18: 80000b08 .word 0x80000b08 +80000b1c: 80009da5 .word 0x80009da5 +80000b20: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xa61788eb +80000b24: 00082503 lw x10,0(x16) +80000b28: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x47c22262 +80000b2c: 00082f03 lw x30,0(x16) +80000b30: 00480813 addi x16,x16,4 + +80000b34 : +Zknh_sha512sum0r_cg_cp_rs2_b30: + sha512sum0r x27, x10, x30 # perform operation +80000b34: 51e50db3 sha512sum0r x27,x10,x30 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zknh_sha512sum0r_cg_cp_rs2_b30, Zknh_sha512sum0r_cg_cp_rs2_b30_str) +80000b38: 0000a383 lw x7,0(x1) +80000b3c: 01b38863 beq x7,x27,80000b4c +80000b40: 1d90446f jal x8,80005518 +80000b44: 80000b34 .word 0x80000b34 +80000b48: 80009ddf .word 0x80009ddf +80000b4c: 00408093 addi x1,x1,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xc3499f12 +80000b50: 00082e03 lw x28,0(x16) +80000b54: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x9b7afe68 +80000b58: 00082f83 lw x31,0(x16) +80000b5c: 00480813 addi x16,x16,4 + +80000b60 : +Zknh_sha512sum0r_cg_cp_rs2_b31: + sha512sum0r x15, x28, x31 # perform operation +80000b60: 51fe07b3 sha512sum0r x15,x28,x31 + # Check if x15 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x15, Zknh_sha512sum0r_cg_cp_rs2_b31, Zknh_sha512sum0r_cg_cp_rs2_b31_str) +80000b64: 0000a383 lw x7,0(x1) +80000b68: 00f38863 beq x7,x15,80000b78 +80000b6c: 1ad0446f jal x8,80005518 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 80009e19 .word 0x80009e19 +80000b78: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x511515a9 +80000b7c: 00082f03 lw x30,0(x16) +80000b80: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x05d1c300 +80000b84: 00082b03 lw x22,0(x16) +80000b88: 00480813 addi x16,x16,4 + +80000b8c : +Zknh_sha512sum0r_cg_cp_rd_b0: + sha512sum0r x0, x30, x22 # perform operation +80000b8c: 516f0033 sha512sum0r x0,x30,x22 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zknh_sha512sum0r_cg_cp_rd_b0, Zknh_sha512sum0r_cg_cp_rd_b0_str) +80000b90: 0000a383 lw x7,0(x1) +80000b94: 00038863 beq x7,x0,80000ba4 +80000b98: 1810446f jal x8,80005518 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80009e53 .word 0x80009e53 +80000ba4: 00408093 addi x1,x1,4 + + mv x3, x1 # switch signature pointer register to avoid conflict with test +80000ba8: 00008193 addi x3,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x132abcc2 +80000bac: 00082b03 lw x22,0(x16) +80000bb0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x68f365b5 +80000bb4: 00082e03 lw x28,0(x16) +80000bb8: 00480813 addi x16,x16,4 + +80000bbc : +Zknh_sha512sum0r_cg_cp_rd_b1: + sha512sum0r x1, x22, x28 # perform operation +80000bbc: 51cb00b3 sha512sum0r x1,x22,x28 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha512sum0r_cg_cp_rd_b1, Zknh_sha512sum0r_cg_cp_rd_b1_str) +80000bc0: 0001a383 lw x7,0(x3) +80000bc4: 00138863 beq x7,x1,80000bd4 +80000bc8: 1510446f jal x8,80005518 +80000bcc: 80000bbc .word 0x80000bbc +80000bd0: 80009e8b .word 0x80009e8b +80000bd4: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xb13dd4f4 +80000bd8: 00082503 lw x10,0(x16) +80000bdc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x53cc6b42 +80000be0: 00082283 lw x5,0(x16) +80000be4: 00480813 addi x16,x16,4 + +80000be8 : +Zknh_sha512sum0r_cg_cp_rd_b2: + sha512sum0r x2, x10, x5 # perform operation +80000be8: 50550133 sha512sum0r x2,x10,x5 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha512sum0r_cg_cp_rd_b2, Zknh_sha512sum0r_cg_cp_rd_b2_str) +80000bec: 0001a383 lw x7,0(x3) +80000bf0: 00238863 beq x7,x2,80000c00 +80000bf4: 1250446f jal x8,80005518 +80000bf8: 80000be8 .word 0x80000be8 +80000bfc: 80009ec3 .word 0x80009ec3 +80000c00: 00418193 addi x3,x3,4 + + mv x26, x3 # switch signature pointer register to avoid conflict with test +80000c04: 00018d13 addi x26,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xbc60af25 +80000c08: 00082203 lw x4,0(x16) +80000c0c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x097770bf +80000c10: 00082c83 lw x25,0(x16) +80000c14: 00480813 addi x16,x16,4 + +80000c18 : +Zknh_sha512sum0r_cg_cp_rd_b3: + sha512sum0r x3, x4, x25 # perform operation +80000c18: 519201b3 sha512sum0r x3,x4,x25 + # Check if x3 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x3, Zknh_sha512sum0r_cg_cp_rd_b3, Zknh_sha512sum0r_cg_cp_rd_b3_str) +80000c1c: 000d2383 lw x7,0(x26) +80000c20: 00338863 beq x7,x3,80000c30 +80000c24: 0f50446f jal x8,80005518 +80000c28: 80000c18 .word 0x80000c18 +80000c2c: 80009efb .word 0x80009efb +80000c30: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xe7f1cfc9 +80000c34: 00082783 lw x15,0(x16) +80000c38: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x8b09626c +80000c3c: 00082303 lw x6,0(x16) +80000c40: 00480813 addi x16,x16,4 + +80000c44 : +Zknh_sha512sum0r_cg_cp_rd_b4: + sha512sum0r x4, x15, x6 # perform operation +80000c44: 50678233 sha512sum0r x4,x15,x6 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zknh_sha512sum0r_cg_cp_rd_b4, Zknh_sha512sum0r_cg_cp_rd_b4_str) +80000c48: 000d2383 lw x7,0(x26) +80000c4c: 00438863 beq x7,x4,80000c5c +80000c50: 0c90446f jal x8,80005518 +80000c54: 80000c44 .word 0x80000c44 +80000c58: 80009f33 .word 0x80009f33 +80000c5c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x60bb894e +80000c60: 00082003 lw x0,0(x16) +80000c64: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xb6e3099e +80000c68: 00082183 lw x3,0(x16) +80000c6c: 00480813 addi x16,x16,4 + +80000c70 : +Zknh_sha512sum0r_cg_cp_rd_b5: + sha512sum0r x5, x0, x3 # perform operation +80000c70: 503002b3 sha512sum0r x5,x0,x3 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zknh_sha512sum0r_cg_cp_rd_b5, Zknh_sha512sum0r_cg_cp_rd_b5_str) +80000c74: 000d2383 lw x7,0(x26) +80000c78: 00538863 beq x7,x5,80000c88 +80000c7c: 09d0446f jal x8,80005518 +80000c80: 80000c70 .word 0x80000c70 +80000c84: 80009f6b .word 0x80009f6b +80000c88: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x0f04f202 +80000c8c: 00082583 lw x11,0(x16) +80000c90: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x0ab269a4 +80000c94: 00082d83 lw x27,0(x16) +80000c98: 00480813 addi x16,x16,4 + +80000c9c : +Zknh_sha512sum0r_cg_cp_rd_b6: + sha512sum0r x6, x11, x27 # perform operation +80000c9c: 51b58333 sha512sum0r x6,x11,x27 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zknh_sha512sum0r_cg_cp_rd_b6, Zknh_sha512sum0r_cg_cp_rd_b6_str) +80000ca0: 000d2383 lw x7,0(x26) +80000ca4: 00638863 beq x7,x6,80000cb4 +80000ca8: 0710446f jal x8,80005518 +80000cac: 80000c9c .word 0x80000c9c +80000cb0: 80009fa3 .word 0x80009fa3 +80000cb4: 004d0d13 addi x26,x26,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cb8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cbc: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x8a979afa +80000cc0: 00082403 lw x8,0(x16) +80000cc4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x07d0f969 +80000cc8: 00082b83 lw x23,0(x16) +80000ccc: 00480813 addi x16,x16,4 + +80000cd0 : +Zknh_sha512sum0r_cg_cp_rd_b7: + sha512sum0r x7, x8, x23 # perform operation +80000cd0: 517403b3 sha512sum0r x7,x8,x23 + # Check if x7 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x7, Zknh_sha512sum0r_cg_cp_rd_b7, Zknh_sha512sum0r_cg_cp_rd_b7_str) +80000cd4: 000d2683 lw x13,0(x26) +80000cd8: 00768863 beq x13,x7,80000ce8 +80000cdc: 0650476f jal x14,80005540 +80000ce0: 80000cd0 .word 0x80000cd0 +80000ce4: 80009fdb .word 0x80009fdb +80000ce8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x23220cc4 +80000cec: 00082503 lw x10,0(x16) +80000cf0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x7ed8be0b +80000cf4: 00082003 lw x0,0(x16) +80000cf8: 00480813 addi x16,x16,4 + +80000cfc : +Zknh_sha512sum0r_cg_cp_rd_b8: + sha512sum0r x8, x10, x0 # perform operation +80000cfc: 50050433 sha512sum0r x8,x10,x0 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zknh_sha512sum0r_cg_cp_rd_b8, Zknh_sha512sum0r_cg_cp_rd_b8_str) +80000d00: 000d2683 lw x13,0(x26) +80000d04: 00868863 beq x13,x8,80000d14 +80000d08: 0390476f jal x14,80005540 +80000d0c: 80000cfc .word 0x80000cfc +80000d10: 8000a013 .word 0x8000a013 +80000d14: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xd75dfd1f +80000d18: 00082f03 lw x30,0(x16) +80000d1c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x39985bb2 +80000d20: 00082203 lw x4,0(x16) +80000d24: 00480813 addi x16,x16,4 + +80000d28 : +Zknh_sha512sum0r_cg_cp_rd_b9: + sha512sum0r x9, x30, x4 # perform operation +80000d28: 504f04b3 sha512sum0r x9,x30,x4 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zknh_sha512sum0r_cg_cp_rd_b9, Zknh_sha512sum0r_cg_cp_rd_b9_str) +80000d2c: 000d2683 lw x13,0(x26) +80000d30: 00968863 beq x13,x9,80000d40 +80000d34: 00d0476f jal x14,80005540 +80000d38: 80000d28 .word 0x80000d28 +80000d3c: 8000a04b .word 0x8000a04b +80000d40: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x6f16ea61 +80000d44: 00082583 lw x11,0(x16) +80000d48: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x85ed2b7a +80000d4c: 00082983 lw x19,0(x16) +80000d50: 00480813 addi x16,x16,4 + +80000d54 : +Zknh_sha512sum0r_cg_cp_rd_b10: + sha512sum0r x10, x11, x19 # perform operation +80000d54: 51358533 sha512sum0r x10,x11,x19 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zknh_sha512sum0r_cg_cp_rd_b10, Zknh_sha512sum0r_cg_cp_rd_b10_str) +80000d58: 000d2683 lw x13,0(x26) +80000d5c: 00a68863 beq x13,x10,80000d6c +80000d60: 7e00476f jal x14,80005540 +80000d64: 80000d54 .word 0x80000d54 +80000d68: 8000a083 .word 0x8000a083 +80000d6c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xdc1e5efe +80000d70: 00082983 lw x19,0(x16) +80000d74: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x838b225b +80000d78: 00082e83 lw x29,0(x16) +80000d7c: 00480813 addi x16,x16,4 + +80000d80 : +Zknh_sha512sum0r_cg_cp_rd_b11: + sha512sum0r x11, x19, x29 # perform operation +80000d80: 51d985b3 sha512sum0r x11,x19,x29 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zknh_sha512sum0r_cg_cp_rd_b11, Zknh_sha512sum0r_cg_cp_rd_b11_str) +80000d84: 000d2683 lw x13,0(x26) +80000d88: 00b68863 beq x13,x11,80000d98 +80000d8c: 7b40476f jal x14,80005540 +80000d90: 80000d80 .word 0x80000d80 +80000d94: 8000a0bc .word 0x8000a0bc +80000d98: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x14a02635 +80000d9c: 00082283 lw x5,0(x16) +80000da0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5e3c80cf +80000da4: 00082f03 lw x30,0(x16) +80000da8: 00480813 addi x16,x16,4 + +80000dac : +Zknh_sha512sum0r_cg_cp_rd_b12: + sha512sum0r x12, x5, x30 # perform operation +80000dac: 51e28633 sha512sum0r x12,x5,x30 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zknh_sha512sum0r_cg_cp_rd_b12, Zknh_sha512sum0r_cg_cp_rd_b12_str) +80000db0: 000d2683 lw x13,0(x26) +80000db4: 00c68863 beq x13,x12,80000dc4 +80000db8: 7880476f jal x14,80005540 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 8000a0f5 .word 0x8000a0f5 +80000dc4: 004d0d13 addi x26,x26,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dc8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dcc: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x67dc7c0c +80000dd0: 00082483 lw x9,0(x16) +80000dd4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x8458caf8 +80000dd8: 00082103 lw x2,0(x16) +80000ddc: 00480813 addi x16,x16,4 + +80000de0 : +Zknh_sha512sum0r_cg_cp_rd_b13: + sha512sum0r x13, x9, x2 # perform operation +80000de0: 502486b3 sha512sum0r x13,x9,x2 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zknh_sha512sum0r_cg_cp_rd_b13, Zknh_sha512sum0r_cg_cp_rd_b13_str) +80000de4: 000d2203 lw x4,0(x26) +80000de8: 00d20863 beq x4,x13,80000df8 +80000dec: 714042ef jal x5,80005500 +80000df0: 80000de0 .word 0x80000de0 +80000df4: 8000a12e .word 0x8000a12e +80000df8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x26394920 +80000dfc: 00082903 lw x18,0(x16) +80000e00: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x7383d6ca +80000e04: 00082883 lw x17,0(x16) +80000e08: 00480813 addi x16,x16,4 + +80000e0c : +Zknh_sha512sum0r_cg_cp_rd_b14: + sha512sum0r x14, x18, x17 # perform operation +80000e0c: 51190733 sha512sum0r x14,x18,x17 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zknh_sha512sum0r_cg_cp_rd_b14, Zknh_sha512sum0r_cg_cp_rd_b14_str) +80000e10: 000d2203 lw x4,0(x26) +80000e14: 00e20863 beq x4,x14,80000e24 +80000e18: 6e8042ef jal x5,80005500 +80000e1c: 80000e0c .word 0x80000e0c +80000e20: 8000a167 .word 0x8000a167 +80000e24: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xeb94bd01 +80000e28: 00082103 lw x2,0(x16) +80000e2c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xd75a1dcb +80000e30: 00082403 lw x8,0(x16) +80000e34: 00480813 addi x16,x16,4 + +80000e38 : +Zknh_sha512sum0r_cg_cp_rd_b15: + sha512sum0r x15, x2, x8 # perform operation +80000e38: 508107b3 sha512sum0r x15,x2,x8 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknh_sha512sum0r_cg_cp_rd_b15, Zknh_sha512sum0r_cg_cp_rd_b15_str) +80000e3c: 000d2203 lw x4,0(x26) +80000e40: 00f20863 beq x4,x15,80000e50 +80000e44: 6bc042ef jal x5,80005500 +80000e48: 80000e38 .word 0x80000e38 +80000e4c: 8000a1a0 .word 0x8000a1a0 +80000e50: 004d0d13 addi x26,x26,4 + + mv x29, x16 # switch data pointer register to avoid conflict with test +80000e54: 00080e93 addi x29,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x9a4ac080 +80000e58: 000ea403 lw x8,0(x29) +80000e5c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xb500ebb7 +80000e60: 000ea783 lw x15,0(x29) +80000e64: 004e8e93 addi x29,x29,4 + +80000e68 : +Zknh_sha512sum0r_cg_cp_rd_b16: + sha512sum0r x16, x8, x15 # perform operation +80000e68: 50f40833 sha512sum0r x16,x8,x15 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zknh_sha512sum0r_cg_cp_rd_b16, Zknh_sha512sum0r_cg_cp_rd_b16_str) +80000e6c: 000d2203 lw x4,0(x26) +80000e70: 01020863 beq x4,x16,80000e80 +80000e74: 68c042ef jal x5,80005500 +80000e78: 80000e68 .word 0x80000e68 +80000e7c: 8000a1d9 .word 0x8000a1d9 +80000e80: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xd52f1f29 +80000e84: 000ea983 lw x19,0(x29) +80000e88: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0xba2ad5c3 +80000e8c: 000eab83 lw x23,0(x29) +80000e90: 004e8e93 addi x29,x29,4 + +80000e94 : +Zknh_sha512sum0r_cg_cp_rd_b17: + sha512sum0r x17, x19, x23 # perform operation +80000e94: 517988b3 sha512sum0r x17,x19,x23 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknh_sha512sum0r_cg_cp_rd_b17, Zknh_sha512sum0r_cg_cp_rd_b17_str) +80000e98: 000d2203 lw x4,0(x26) +80000e9c: 01120863 beq x4,x17,80000eac +80000ea0: 660042ef jal x5,80005500 +80000ea4: 80000e94 .word 0x80000e94 +80000ea8: 8000a212 .word 0x8000a212 +80000eac: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs1: x1 = 0x79df2bd0 +80000eb0: 000ea083 lw x1,0(x29) +80000eb4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x14e0495f +80000eb8: 000ea803 lw x16,0(x29) +80000ebc: 004e8e93 addi x29,x29,4 + +80000ec0 : +Zknh_sha512sum0r_cg_cp_rd_b18: + sha512sum0r x18, x1, x16 # perform operation +80000ec0: 51008933 sha512sum0r x18,x1,x16 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zknh_sha512sum0r_cg_cp_rd_b18, Zknh_sha512sum0r_cg_cp_rd_b18_str) +80000ec4: 000d2203 lw x4,0(x26) +80000ec8: 01220863 beq x4,x18,80000ed8 +80000ecc: 634042ef jal x5,80005500 +80000ed0: 80000ec0 .word 0x80000ec0 +80000ed4: 8000a24b .word 0x8000a24b +80000ed8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x55d189e5 +80000edc: 000ead83 lw x27,0(x29) +80000ee0: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0x5c651308 +80000ee4: 000ea883 lw x17,0(x29) +80000ee8: 004e8e93 addi x29,x29,4 + +80000eec : +Zknh_sha512sum0r_cg_cp_rd_b19: + sha512sum0r x19, x27, x17 # perform operation +80000eec: 511d89b3 sha512sum0r x19,x27,x17 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zknh_sha512sum0r_cg_cp_rd_b19, Zknh_sha512sum0r_cg_cp_rd_b19_str) +80000ef0: 000d2203 lw x4,0(x26) +80000ef4: 01320863 beq x4,x19,80000f04 +80000ef8: 608042ef jal x5,80005500 +80000efc: 80000eec .word 0x80000eec +80000f00: 8000a284 .word 0x8000a284 +80000f04: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x72593a44 +80000f08: 000ea703 lw x14,0(x29) +80000f0c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x0f63476d +80000f10: 000eac83 lw x25,0(x29) +80000f14: 004e8e93 addi x29,x29,4 + +80000f18 : +Zknh_sha512sum0r_cg_cp_rd_b20: + sha512sum0r x20, x14, x25 # perform operation +80000f18: 51970a33 sha512sum0r x20,x14,x25 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zknh_sha512sum0r_cg_cp_rd_b20, Zknh_sha512sum0r_cg_cp_rd_b20_str) +80000f1c: 000d2203 lw x4,0(x26) +80000f20: 01420863 beq x4,x20,80000f30 +80000f24: 5dc042ef jal x5,80005500 +80000f28: 80000f18 .word 0x80000f18 +80000f2c: 8000a2bd .word 0x8000a2bd +80000f30: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0xb14b32e6 +80000f34: 000ea483 lw x9,0(x29) +80000f38: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x8ee991ec +80000f3c: 000ea803 lw x16,0(x29) +80000f40: 004e8e93 addi x29,x29,4 + +80000f44 : +Zknh_sha512sum0r_cg_cp_rd_b21: + sha512sum0r x21, x9, x16 # perform operation +80000f44: 51048ab3 sha512sum0r x21,x9,x16 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zknh_sha512sum0r_cg_cp_rd_b21, Zknh_sha512sum0r_cg_cp_rd_b21_str) +80000f48: 000d2203 lw x4,0(x26) +80000f4c: 01520863 beq x4,x21,80000f5c +80000f50: 5b0042ef jal x5,80005500 +80000f54: 80000f44 .word 0x80000f44 +80000f58: 8000a2f6 .word 0x8000a2f6 +80000f5c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0xed3a922b +80000f60: 000ea783 lw x15,0(x29) +80000f64: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xf15f7f73 +80000f68: 000ea903 lw x18,0(x29) +80000f6c: 004e8e93 addi x29,x29,4 + +80000f70 : +Zknh_sha512sum0r_cg_cp_rd_b22: + sha512sum0r x22, x15, x18 # perform operation +80000f70: 51278b33 sha512sum0r x22,x15,x18 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zknh_sha512sum0r_cg_cp_rd_b22, Zknh_sha512sum0r_cg_cp_rd_b22_str) +80000f74: 000d2203 lw x4,0(x26) +80000f78: 01620863 beq x4,x22,80000f88 +80000f7c: 584042ef jal x5,80005500 +80000f80: 80000f70 .word 0x80000f70 +80000f84: 8000a32f .word 0x8000a32f +80000f88: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xdb482082 +80000f8c: 000eae03 lw x28,0(x29) +80000f90: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs2: x8 = 0x723e02b9 +80000f94: 000ea403 lw x8,0(x29) +80000f98: 004e8e93 addi x29,x29,4 + +80000f9c : +Zknh_sha512sum0r_cg_cp_rd_b23: + sha512sum0r x23, x28, x8 # perform operation +80000f9c: 508e0bb3 sha512sum0r x23,x28,x8 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zknh_sha512sum0r_cg_cp_rd_b23, Zknh_sha512sum0r_cg_cp_rd_b23_str) +80000fa0: 000d2203 lw x4,0(x26) +80000fa4: 01720863 beq x4,x23,80000fb4 +80000fa8: 558042ef jal x5,80005500 +80000fac: 80000f9c .word 0x80000f9c +80000fb0: 8000a368 .word 0x8000a368 +80000fb4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xee69bc1d +80000fb8: 000eab83 lw x23,0(x29) +80000fbc: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0x6ccd80ba +80000fc0: 000ea583 lw x11,0(x29) +80000fc4: 004e8e93 addi x29,x29,4 + +80000fc8 : +Zknh_sha512sum0r_cg_cp_rd_b24: + sha512sum0r x24, x23, x11 # perform operation +80000fc8: 50bb8c33 sha512sum0r x24,x23,x11 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zknh_sha512sum0r_cg_cp_rd_b24, Zknh_sha512sum0r_cg_cp_rd_b24_str) +80000fcc: 000d2203 lw x4,0(x26) +80000fd0: 01820863 beq x4,x24,80000fe0 +80000fd4: 52c042ef jal x5,80005500 +80000fd8: 80000fc8 .word 0x80000fc8 +80000fdc: 8000a3a1 .word 0x8000a3a1 +80000fe0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x662803e5 +80000fe4: 000ea303 lw x6,0(x29) +80000fe8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x57b9a23d +80000fec: 000ea603 lw x12,0(x29) +80000ff0: 004e8e93 addi x29,x29,4 + +80000ff4 : +Zknh_sha512sum0r_cg_cp_rd_b25: + sha512sum0r x25, x6, x12 # perform operation +80000ff4: 50c30cb3 sha512sum0r x25,x6,x12 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknh_sha512sum0r_cg_cp_rd_b25, Zknh_sha512sum0r_cg_cp_rd_b25_str) +80000ff8: 000d2203 lw x4,0(x26) +80000ffc: 01920863 beq x4,x25,8000100c +80001000: 500042ef jal x5,80005500 +80001004: 80000ff4 .word 0x80000ff4 +80001008: 8000a3da .word 0x8000a3da +8000100c: 004d0d13 addi x26,x26,4 + + mv x15, x26 # switch signature pointer register to avoid conflict with test +80001010: 000d0793 addi x15,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0xe95ae5fd +80001014: 000ea603 lw x12,0(x29) +80001018: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x5cea2cd6 +8000101c: 000ea083 lw x1,0(x29) +80001020: 004e8e93 addi x29,x29,4 + +80001024 : +Zknh_sha512sum0r_cg_cp_rd_b26: + sha512sum0r x26, x12, x1 # perform operation +80001024: 50160d33 sha512sum0r x26,x12,x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cp_rd_b26, Zknh_sha512sum0r_cg_cp_rd_b26_str) +80001028: 0007a203 lw x4,0(x15) +8000102c: 01a20863 beq x4,x26,8000103c +80001030: 4d0042ef jal x5,80005500 +80001034: 80001024 .word 0x80001024 +80001038: 8000a413 .word 0x8000a413 +8000103c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0xd16ef924 +80001040: 000ea303 lw x6,0(x29) +80001044: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x69b68a3d +80001048: 000ea603 lw x12,0(x29) +8000104c: 004e8e93 addi x29,x29,4 + +80001050 : +Zknh_sha512sum0r_cg_cp_rd_b27: + sha512sum0r x27, x6, x12 # perform operation +80001050: 50c30db3 sha512sum0r x27,x6,x12 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknh_sha512sum0r_cg_cp_rd_b27, Zknh_sha512sum0r_cg_cp_rd_b27_str) +80001054: 0007a203 lw x4,0(x15) +80001058: 01b20863 beq x4,x27,80001068 +8000105c: 4a4042ef jal x5,80005500 +80001060: 80001050 .word 0x80001050 +80001064: 8000a44c .word 0x8000a44c +80001068: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x5fa6df11 +8000106c: 000ea303 lw x6,0(x29) +80001070: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x6856755d +80001074: 000eaf03 lw x30,0(x29) +80001078: 004e8e93 addi x29,x29,4 + +8000107c : +Zknh_sha512sum0r_cg_cp_rd_b28: + sha512sum0r x28, x6, x30 # perform operation +8000107c: 51e30e33 sha512sum0r x28,x6,x30 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cp_rd_b28, Zknh_sha512sum0r_cg_cp_rd_b28_str) +80001080: 0007a203 lw x4,0(x15) +80001084: 01c20863 beq x4,x28,80001094 +80001088: 478042ef jal x5,80005500 +8000108c: 8000107c .word 0x8000107c +80001090: 8000a485 .word 0x8000a485 +80001094: 00478793 addi x15,x15,4 + + mv x18, x29 # switch data pointer register to avoid conflict with test +80001098: 000e8913 addi x18,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xef879562 +8000109c: 00092403 lw x8,0(x18) +800010a0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x0eeeb3f1 +800010a4: 00092f83 lw x31,0(x18) +800010a8: 00490913 addi x18,x18,4 + +800010ac : +Zknh_sha512sum0r_cg_cp_rd_b29: + sha512sum0r x29, x8, x31 # perform operation +800010ac: 51f40eb3 sha512sum0r x29,x8,x31 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cp_rd_b29, Zknh_sha512sum0r_cg_cp_rd_b29_str) +800010b0: 0007a203 lw x4,0(x15) +800010b4: 01d20863 beq x4,x29,800010c4 +800010b8: 448042ef jal x5,80005500 +800010bc: 800010ac .word 0x800010ac +800010c0: 8000a4be .word 0x8000a4be +800010c4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x765a9ab8 +800010c8: 00092503 lw x10,0(x18) +800010cc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xaa48a32c +800010d0: 00092403 lw x8,0(x18) +800010d4: 00490913 addi x18,x18,4 + +800010d8 : +Zknh_sha512sum0r_cg_cp_rd_b30: + sha512sum0r x30, x10, x8 # perform operation +800010d8: 50850f33 sha512sum0r x30,x10,x8 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cp_rd_b30, Zknh_sha512sum0r_cg_cp_rd_b30_str) +800010dc: 0007a203 lw x4,0(x15) +800010e0: 01e20863 beq x4,x30,800010f0 +800010e4: 41c042ef jal x5,80005500 +800010e8: 800010d8 .word 0x800010d8 +800010ec: 8000a4f7 .word 0x8000a4f7 +800010f0: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xa6d32615 +800010f4: 00092303 lw x6,0(x18) +800010f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xbf69e7ef +800010fc: 00092a83 lw x21,0(x18) +80001100: 00490913 addi x18,x18,4 + +80001104 : +Zknh_sha512sum0r_cg_cp_rd_b31: + sha512sum0r x31, x6, x21 # perform operation +80001104: 51530fb3 sha512sum0r x31,x6,x21 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cp_rd_b31, Zknh_sha512sum0r_cg_cp_rd_b31_str) +80001108: 0007a203 lw x4,0(x15) +8000110c: 01f20863 beq x4,x31,8000111c +80001110: 3f0042ef jal x5,80005500 +80001114: 80001104 .word 0x80001104 +80001118: 8000a530 .word 0x8000a530 +8000111c: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x00000000 +80001120: 00092c83 lw x25,0(x18) +80001124: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x0d1e4c3e +80001128: 00092b03 lw x22,0(x18) +8000112c: 00490913 addi x18,x18,4 + +80001130 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x0: + sha512sum0r x3, x25, x22 # perform operation +80001130: 516c81b3 sha512sum0r x3,x25,x22 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sum0r_cg_cp_rs1_edges_0x0, Zknh_sha512sum0r_cg_cp_rs1_edges_0x0_str) +80001134: 0007a203 lw x4,0(x15) +80001138: 00320863 beq x4,x3,80001148 +8000113c: 3c4042ef jal x5,80005500 +80001140: 80001130 .word 0x80001130 +80001144: 8000a569 .word 0x8000a569 +80001148: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x00000001 +8000114c: 00092b83 lw x23,0(x18) +80001150: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x72b38026 +80001154: 00092603 lw x12,0(x18) +80001158: 00490913 addi x18,x18,4 + +8000115c : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x1: + sha512sum0r x26, x23, x12 # perform operation +8000115c: 50cb8d33 sha512sum0r x26,x23,x12 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cp_rs1_edges_0x1, Zknh_sha512sum0r_cg_cp_rs1_edges_0x1_str) +80001160: 0007a203 lw x4,0(x15) +80001164: 01a20863 beq x4,x26,80001174 +80001168: 398042ef jal x5,80005500 +8000116c: 8000115c .word 0x8000115c +80001170: 8000a5a9 .word 0x8000a5a9 +80001174: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x00000002 +80001178: 00092b03 lw x22,0(x18) +8000117c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xfb080f8a +80001180: 00092d83 lw x27,0(x18) +80001184: 00490913 addi x18,x18,4 + +80001188 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x2: + sha512sum0r x21, x22, x27 # perform operation +80001188: 51bb0ab3 sha512sum0r x21,x22,x27 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cp_rs1_edges_0x2, Zknh_sha512sum0r_cg_cp_rs1_edges_0x2_str) +8000118c: 0007a203 lw x4,0(x15) +80001190: 01520863 beq x4,x21,800011a0 +80001194: 36c042ef jal x5,80005500 +80001198: 80001188 .word 0x80001188 +8000119c: 8000a5e9 .word 0x8000a5e9 +800011a0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x80000000 +800011a4: 00092183 lw x3,0(x18) +800011a8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x57407a69 +800011ac: 00092e83 lw x29,0(x18) +800011b0: 00490913 addi x18,x18,4 + +800011b4 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000000: + sha512sum0r x11, x3, x29 # perform operation +800011b4: 51d185b3 sha512sum0r x11,x3,x29 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000000, Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000000_str) +800011b8: 0007a203 lw x4,0(x15) +800011bc: 00b20863 beq x4,x11,800011cc +800011c0: 340042ef jal x5,80005500 +800011c4: 800011b4 .word 0x800011b4 +800011c8: 8000a629 .word 0x8000a629 +800011cc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x80000001 +800011d0: 00092483 lw x9,0(x18) +800011d4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xd94e8119 +800011d8: 00092383 lw x7,0(x18) +800011dc: 00490913 addi x18,x18,4 + +800011e0 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000001: + sha512sum0r x20, x9, x7 # perform operation +800011e0: 50748a33 sha512sum0r x20,x9,x7 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000001, Zknh_sha512sum0r_cg_cp_rs1_edges_0x80000001_str) +800011e4: 0007a203 lw x4,0(x15) +800011e8: 01420863 beq x4,x20,800011f8 +800011ec: 314042ef jal x5,80005500 +800011f0: 800011e0 .word 0x800011e0 +800011f4: 8000a671 .word 0x8000a671 +800011f8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x7fffffff +800011fc: 00092c83 lw x25,0(x18) +80001200: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xc594ee87 +80001204: 00092c03 lw x24,0(x18) +80001208: 00490913 addi x18,x18,4 + +8000120c : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x7fffffff: + sha512sum0r x31, x25, x24 # perform operation +8000120c: 518c8fb3 sha512sum0r x31,x25,x24 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sum0r_cg_cp_rs1_edges_0x7fffffff_str) +80001210: 0007a203 lw x4,0(x15) +80001214: 01f20863 beq x4,x31,80001224 +80001218: 2e8042ef jal x5,80005500 +8000121c: 8000120c .word 0x8000120c +80001220: 8000a6b9 .word 0x8000a6b9 +80001224: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x7ffffffe +80001228: 00092683 lw x13,0(x18) +8000122c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x3affad55 +80001230: 00092e03 lw x28,0(x18) +80001234: 00490913 addi x18,x18,4 + +80001238 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x7ffffffe: + sha512sum0r x7, x13, x28 # perform operation +80001238: 51c683b3 sha512sum0r x7,x13,x28 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sum0r_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sum0r_cg_cp_rs1_edges_0x7ffffffe_str) +8000123c: 0007a203 lw x4,0(x15) +80001240: 00720863 beq x4,x7,80001250 +80001244: 2bc042ef jal x5,80005500 +80001248: 80001238 .word 0x80001238 +8000124c: 8000a701 .word 0x8000a701 +80001250: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xffffffff +80001254: 00092c03 lw x24,0(x18) +80001258: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xbd0dd3de +8000125c: 00092383 lw x7,0(x18) +80001260: 00490913 addi x18,x18,4 + +80001264 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0xffffffff: + sha512sum0r x10, x24, x7 # perform operation +80001264: 507c0533 sha512sum0r x10,x24,x7 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sum0r_cg_cp_rs1_edges_0xffffffff_str) +80001268: 0007a203 lw x4,0(x15) +8000126c: 00a20863 beq x4,x10,8000127c +80001270: 290042ef jal x5,80005500 +80001274: 80001264 .word 0x80001264 +80001278: 8000a749 .word 0x8000a749 +8000127c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xfffffffe +80001280: 00092c03 lw x24,0(x18) +80001284: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x80d599bc +80001288: 00092c83 lw x25,0(x18) +8000128c: 00490913 addi x18,x18,4 + +80001290 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0xfffffffe: + sha512sum0r x13, x24, x25 # perform operation +80001290: 519c06b3 sha512sum0r x13,x24,x25 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sum0r_cg_cp_rs1_edges_0xfffffffe_str) +80001294: 0007a203 lw x4,0(x15) +80001298: 00d20863 beq x4,x13,800012a8 +8000129c: 264042ef jal x5,80005500 +800012a0: 80001290 .word 0x80001290 +800012a4: 8000a791 .word 0x8000a791 +800012a8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x5bbc8872 +800012ac: 00092883 lw x17,0(x18) +800012b0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xe754a70e +800012b4: 00092c83 lw x25,0(x18) +800012b8: 00490913 addi x18,x18,4 + +800012bc : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x5bbc8872: + sha512sum0r x28, x17, x25 # perform operation +800012bc: 51988e33 sha512sum0r x28,x17,x25 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sum0r_cg_cp_rs1_edges_0x5bbc8872_str) +800012c0: 0007a203 lw x4,0(x15) +800012c4: 01c20863 beq x4,x28,800012d4 +800012c8: 238042ef jal x5,80005500 +800012cc: 800012bc .word 0x800012bc +800012d0: 8000a7d9 .word 0x8000a7d9 +800012d4: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xaaaaaaaa +800012d8: 00092983 lw x19,0(x18) +800012dc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x0c7cfa64 +800012e0: 00092803 lw x16,0(x18) +800012e4: 00490913 addi x18,x18,4 + +800012e8 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sum0r x3, x19, x16 # perform operation +800012e8: 510981b3 sha512sum0r x3,x19,x16 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sum0r_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sum0r_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012ec: 0007a203 lw x4,0(x15) +800012f0: 00320863 beq x4,x3,80001300 +800012f4: 20c042ef jal x5,80005500 +800012f8: 800012e8 .word 0x800012e8 +800012fc: 8000a821 .word 0x8000a821 +80001300: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x55555555 +80001304: 00092e03 lw x28,0(x18) +80001308: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x6a1ec4a1 +8000130c: 00092f03 lw x30,0(x18) +80001310: 00490913 addi x18,x18,4 + +80001314 : +Zknh_sha512sum0r_cg_cp_rs1_edges_0x55555555: + sha512sum0r x9, x28, x30 # perform operation +80001314: 51ee04b3 sha512sum0r x9,x28,x30 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cp_rs1_edges_0x55555555, Zknh_sha512sum0r_cg_cp_rs1_edges_0x55555555_str) +80001318: 0007a203 lw x4,0(x15) +8000131c: 00920863 beq x4,x9,8000132c +80001320: 1e0042ef jal x5,80005500 +80001324: 80001314 .word 0x80001314 +80001328: 8000a869 .word 0x8000a869 +8000132c: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xdfe4d374 +80001330: 00092583 lw x11,0(x18) +80001334: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x00000000 +80001338: 00092483 lw x9,0(x18) +8000133c: 00490913 addi x18,x18,4 + +80001340 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x0: + sha512sum0r x23, x11, x9 # perform operation +80001340: 50958bb3 sha512sum0r x23,x11,x9 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cp_rs2_edges_0x0, Zknh_sha512sum0r_cg_cp_rs2_edges_0x0_str) +80001344: 0007a203 lw x4,0(x15) +80001348: 01720863 beq x4,x23,80001358 +8000134c: 1b4042ef jal x5,80005500 +80001350: 80001340 .word 0x80001340 +80001354: 8000a8b1 .word 0x8000a8b1 +80001358: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xdaac4f4c +8000135c: 00092603 lw x12,0(x18) +80001360: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x00000001 +80001364: 00092f83 lw x31,0(x18) +80001368: 00490913 addi x18,x18,4 + +8000136c : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x1: + sha512sum0r x26, x12, x31 # perform operation +8000136c: 51f60d33 sha512sum0r x26,x12,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cp_rs2_edges_0x1, Zknh_sha512sum0r_cg_cp_rs2_edges_0x1_str) +80001370: 0007a203 lw x4,0(x15) +80001374: 01a20863 beq x4,x26,80001384 +80001378: 188042ef jal x5,80005500 +8000137c: 8000136c .word 0x8000136c +80001380: 8000a8f2 .word 0x8000a8f2 +80001384: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xaca3c397 +80001388: 00092303 lw x6,0(x18) +8000138c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x00000002 +80001390: 00092383 lw x7,0(x18) +80001394: 00490913 addi x18,x18,4 + +80001398 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x2: + sha512sum0r x9, x6, x7 # perform operation +80001398: 507304b3 sha512sum0r x9,x6,x7 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cp_rs2_edges_0x2, Zknh_sha512sum0r_cg_cp_rs2_edges_0x2_str) +8000139c: 0007a203 lw x4,0(x15) +800013a0: 00920863 beq x4,x9,800013b0 +800013a4: 15c042ef jal x5,80005500 +800013a8: 80001398 .word 0x80001398 +800013ac: 8000a933 .word 0x8000a933 +800013b0: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x46a45060 +800013b4: 00092683 lw x13,0(x18) +800013b8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000000 +800013bc: 00092b83 lw x23,0(x18) +800013c0: 00490913 addi x18,x18,4 + +800013c4 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000000: + sha512sum0r x11, x13, x23 # perform operation +800013c4: 517685b3 sha512sum0r x11,x13,x23 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000000, Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000000_str) +800013c8: 0007a203 lw x4,0(x15) +800013cc: 00b20863 beq x4,x11,800013dc +800013d0: 130042ef jal x5,80005500 +800013d4: 800013c4 .word 0x800013c4 +800013d8: 8000a974 .word 0x8000a974 +800013dc: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xe9a17dcf +800013e0: 00092403 lw x8,0(x18) +800013e4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x80000001 +800013e8: 00092703 lw x14,0(x18) +800013ec: 00490913 addi x18,x18,4 + +800013f0 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000001: + sha512sum0r x20, x8, x14 # perform operation +800013f0: 50e40a33 sha512sum0r x20,x8,x14 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000001, Zknh_sha512sum0r_cg_cp_rs2_edges_0x80000001_str) +800013f4: 0007a203 lw x4,0(x15) +800013f8: 01420863 beq x4,x20,80001408 +800013fc: 104042ef jal x5,80005500 +80001400: 800013f0 .word 0x800013f0 +80001404: 8000a9bc .word 0x8000a9bc +80001408: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x17bd1339 +8000140c: 00092e83 lw x29,0(x18) +80001410: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x7fffffff +80001414: 00092f83 lw x31,0(x18) +80001418: 00490913 addi x18,x18,4 + +8000141c : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x7fffffff: + sha512sum0r x11, x29, x31 # perform operation +8000141c: 51fe85b3 sha512sum0r x11,x29,x31 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sum0r_cg_cp_rs2_edges_0x7fffffff_str) +80001420: 0007a203 lw x4,0(x15) +80001424: 00b20863 beq x4,x11,80001434 +80001428: 0d8042ef jal x5,80005500 +8000142c: 8000141c .word 0x8000141c +80001430: 8000aa04 .word 0x8000aa04 +80001434: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x61304c35 +80001438: 00092e03 lw x28,0(x18) +8000143c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x7ffffffe +80001440: 00092d83 lw x27,0(x18) +80001444: 00490913 addi x18,x18,4 + +80001448 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x7ffffffe: + sha512sum0r x12, x28, x27 # perform operation +80001448: 51be0633 sha512sum0r x12,x28,x27 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sum0r_cg_cp_rs2_edges_0x7ffffffe_str) +8000144c: 0007a203 lw x4,0(x15) +80001450: 00c20863 beq x4,x12,80001460 +80001454: 0ac042ef jal x5,80005500 +80001458: 80001448 .word 0x80001448 +8000145c: 8000aa4c .word 0x8000aa4c +80001460: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x8a14bd53 +80001464: 00092683 lw x13,0(x18) +80001468: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0xffffffff +8000146c: 00092083 lw x1,0(x18) +80001470: 00490913 addi x18,x18,4 + +80001474 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0xffffffff: + sha512sum0r x12, x13, x1 # perform operation +80001474: 50168633 sha512sum0r x12,x13,x1 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sum0r_cg_cp_rs2_edges_0xffffffff_str) +80001478: 0007a203 lw x4,0(x15) +8000147c: 00c20863 beq x4,x12,8000148c +80001480: 080042ef jal x5,80005500 +80001484: 80001474 .word 0x80001474 +80001488: 8000aa94 .word 0x8000aa94 +8000148c: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xbfa2bab6 +80001490: 00092303 lw x6,0(x18) +80001494: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xfffffffe +80001498: 00092603 lw x12,0(x18) +8000149c: 00490913 addi x18,x18,4 + +800014a0 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0xfffffffe: + sha512sum0r x21, x6, x12 # perform operation +800014a0: 50c30ab3 sha512sum0r x21,x6,x12 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sum0r_cg_cp_rs2_edges_0xfffffffe_str) +800014a4: 0007a203 lw x4,0(x15) +800014a8: 01520863 beq x4,x21,800014b8 +800014ac: 054042ef jal x5,80005500 +800014b0: 800014a0 .word 0x800014a0 +800014b4: 8000aadc .word 0x8000aadc +800014b8: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xefde4d79 +800014bc: 00092503 lw x10,0(x18) +800014c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x5bbc8872 +800014c4: 00092b83 lw x23,0(x18) +800014c8: 00490913 addi x18,x18,4 + +800014cc : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x5bbc8872: + sha512sum0r x20, x10, x23 # perform operation +800014cc: 51750a33 sha512sum0r x20,x10,x23 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sum0r_cg_cp_rs2_edges_0x5bbc8872_str) +800014d0: 0007a203 lw x4,0(x15) +800014d4: 01420863 beq x4,x20,800014e4 +800014d8: 028042ef jal x5,80005500 +800014dc: 800014cc .word 0x800014cc +800014e0: 8000ab24 .word 0x8000ab24 +800014e4: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x9fcf4e2f +800014e8: 00092a03 lw x20,0(x18) +800014ec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xaaaaaaaa +800014f0: 00092e83 lw x29,0(x18) +800014f4: 00490913 addi x18,x18,4 + +800014f8 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sum0r x1, x20, x29 # perform operation +800014f8: 51da00b3 sha512sum0r x1,x20,x29 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sum0r_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014fc: 0007a203 lw x4,0(x15) +80001500: 00120863 beq x4,x1,80001510 +80001504: 7fd032ef jal x5,80005500 +80001508: 800014f8 .word 0x800014f8 +8000150c: 8000ab6c .word 0x8000ab6c +80001510: 00478793 addi x15,x15,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x44ea6101 +80001514: 00092f03 lw x30,0(x18) +80001518: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x55555555 +8000151c: 00092d83 lw x27,0(x18) +80001520: 00490913 addi x18,x18,4 + +80001524 : +Zknh_sha512sum0r_cg_cp_rs2_edges_0x55555555: + sha512sum0r x29, x30, x27 # perform operation +80001524: 51bf0eb3 sha512sum0r x29,x30,x27 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cp_rs2_edges_0x55555555, Zknh_sha512sum0r_cg_cp_rs2_edges_0x55555555_str) +80001528: 0007a203 lw x4,0(x15) +8000152c: 01d20863 beq x4,x29,8000153c +80001530: 7d1032ef jal x5,80005500 +80001534: 80001524 .word 0x80001524 +80001538: 8000abb4 .word 0x8000abb4 +8000153c: 00478793 addi x15,x15,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x00000000 +80001540: 00092183 lw x3,0(x18) +80001544: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000000 +80001548: 00092583 lw x11,0(x18) +8000154c: 00490913 addi x18,x18,4 + +80001550 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sum0r x29, x3, x11 # perform operation +80001550: 50b18eb3 sha512sum0r x29,x3,x11 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001554: 0007a203 lw x4,0(x15) +80001558: 01d20863 beq x4,x29,80001568 +8000155c: 7a5032ef jal x5,80005500 +80001560: 80001550 .word 0x80001550 +80001564: 8000abfc .word 0x8000abfc +80001568: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000000 +8000156c: 00092083 lw x1,0(x18) +80001570: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x00000001 +80001574: 00092703 lw x14,0(x18) +80001578: 00490913 addi x18,x18,4 + +8000157c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sum0r x17, x1, x14 # perform operation +8000157c: 50e088b3 sha512sum0r x17,x1,x14 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001580: 0007a203 lw x4,0(x15) +80001584: 01120863 beq x4,x17,80001594 +80001588: 779032ef jal x5,80005500 +8000158c: 8000157c .word 0x8000157c +80001590: 8000ac54 .word 0x8000ac54 +80001594: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000000 +80001598: 00092d83 lw x27,0(x18) +8000159c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x00000002 +800015a0: 00092d03 lw x26,0(x18) +800015a4: 00490913 addi x18,x18,4 + +800015a8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sum0r x11, x27, x26 # perform operation +800015a8: 51ad85b3 sha512sum0r x11,x27,x26 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015ac: 0007a203 lw x4,0(x15) +800015b0: 00b20863 beq x4,x11,800015c0 +800015b4: 74d032ef jal x5,80005500 +800015b8: 800015a8 .word 0x800015a8 +800015bc: 8000acac .word 0x8000acac +800015c0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x00000000 +800015c4: 00092f83 lw x31,0(x18) +800015c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x80000000 +800015cc: 00092c83 lw x25,0(x18) +800015d0: 00490913 addi x18,x18,4 + +800015d4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sum0r x2, x31, x25 # perform operation +800015d4: 519f8133 sha512sum0r x2,x31,x25 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015d8: 0007a203 lw x4,0(x15) +800015dc: 00220863 beq x4,x2,800015ec +800015e0: 721032ef jal x5,80005500 +800015e4: 800015d4 .word 0x800015d4 +800015e8: 8000ad04 .word 0x8000ad04 +800015ec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000000 +800015f0: 00092d83 lw x27,0(x18) +800015f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x80000001 +800015f8: 00092d03 lw x26,0(x18) +800015fc: 00490913 addi x18,x18,4 + +80001600 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sum0r x6, x27, x26 # perform operation +80001600: 51ad8333 sha512sum0r x6,x27,x26 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001604: 0007a203 lw x4,0(x15) +80001608: 00620863 beq x4,x6,80001618 +8000160c: 6f5032ef jal x5,80005500 +80001610: 80001600 .word 0x80001600 +80001614: 8000ad63 .word 0x8000ad63 +80001618: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x00000000 +8000161c: 00092303 lw x6,0(x18) +80001620: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x7fffffff +80001624: 00092683 lw x13,0(x18) +80001628: 00490913 addi x18,x18,4 + +8000162c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sum0r x26, x6, x13 # perform operation +8000162c: 50d30d33 sha512sum0r x26,x6,x13 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001630: 0007a203 lw x4,0(x15) +80001634: 01a20863 beq x4,x26,80001644 +80001638: 6c9032ef jal x5,80005500 +8000163c: 8000162c .word 0x8000162c +80001640: 8000adc2 .word 0x8000adc2 +80001644: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x00000000 +80001648: 00092403 lw x8,0(x18) +8000164c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x7ffffffe +80001650: 00092a83 lw x21,0(x18) +80001654: 00490913 addi x18,x18,4 + +80001658 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sum0r x10, x8, x21 # perform operation +80001658: 51540533 sha512sum0r x10,x8,x21 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +8000165c: 0007a203 lw x4,0(x15) +80001660: 00a20863 beq x4,x10,80001670 +80001664: 69d032ef jal x5,80005500 +80001668: 80001658 .word 0x80001658 +8000166c: 8000ae21 .word 0x8000ae21 +80001670: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000000 +80001674: 00092a03 lw x20,0(x18) +80001678: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xffffffff +8000167c: 00092803 lw x16,0(x18) +80001680: 00490913 addi x18,x18,4 + +80001684 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sum0r x2, x20, x16 # perform operation +80001684: 510a0133 sha512sum0r x2,x20,x16 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001688: 0007a203 lw x4,0(x15) +8000168c: 00220863 beq x4,x2,8000169c +80001690: 671032ef jal x5,80005500 +80001694: 80001684 .word 0x80001684 +80001698: 8000ae80 .word 0x8000ae80 +8000169c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x00000000 +800016a0: 00092683 lw x13,0(x18) +800016a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xfffffffe +800016a8: 00092103 lw x2,0(x18) +800016ac: 00490913 addi x18,x18,4 + +800016b0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sum0r x7, x13, x2 # perform operation +800016b0: 502683b3 sha512sum0r x7,x13,x2 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016b4: 0007a203 lw x4,0(x15) +800016b8: 00720863 beq x4,x7,800016c8 +800016bc: 645032ef jal x5,80005500 +800016c0: 800016b0 .word 0x800016b0 +800016c4: 8000aedf .word 0x8000aedf +800016c8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000000 +800016cc: 00092083 lw x1,0(x18) +800016d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x5bbc8872 +800016d4: 00092883 lw x17,0(x18) +800016d8: 00490913 addi x18,x18,4 + +800016dc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sum0r x19, x1, x17 # perform operation +800016dc: 511089b3 sha512sum0r x19,x1,x17 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016e0: 0007a203 lw x4,0(x15) +800016e4: 01320863 beq x4,x19,800016f4 +800016e8: 619032ef jal x5,80005500 +800016ec: 800016dc .word 0x800016dc +800016f0: 8000af3e .word 0x8000af3e +800016f4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x00000000 +800016f8: 00092403 lw x8,0(x18) +800016fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0xaaaaaaaa +80001700: 00092d83 lw x27,0(x18) +80001704: 00490913 addi x18,x18,4 + +80001708 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sum0r x14, x8, x27 # perform operation +80001708: 51b40733 sha512sum0r x14,x8,x27 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +8000170c: 0007a203 lw x4,0(x15) +80001710: 00e20863 beq x4,x14,80001720 +80001714: 5ed032ef jal x5,80005500 +80001718: 80001708 .word 0x80001708 +8000171c: 8000af9d .word 0x8000af9d +80001720: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x00000000 +80001724: 00092f83 lw x31,0(x18) +80001728: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x55555555 +8000172c: 00092a83 lw x21,0(x18) +80001730: 00490913 addi x18,x18,4 + +80001734 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sum0r x23, x31, x21 # perform operation +80001734: 515f8bb3 sha512sum0r x23,x31,x21 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001738: 0007a203 lw x4,0(x15) +8000173c: 01720863 beq x4,x23,8000174c +80001740: 5c1032ef jal x5,80005500 +80001744: 80001734 .word 0x80001734 +80001748: 8000affc .word 0x8000affc +8000174c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x00000001 +80001750: 00092883 lw x17,0(x18) +80001754: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000000 +80001758: 00092a03 lw x20,0(x18) +8000175c: 00490913 addi x18,x18,4 + +80001760 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sum0r x28, x17, x20 # perform operation +80001760: 51488e33 sha512sum0r x28,x17,x20 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001764: 0007a203 lw x4,0(x15) +80001768: 01c20863 beq x4,x28,80001778 +8000176c: 595032ef jal x5,80005500 +80001770: 80001760 .word 0x80001760 +80001774: 8000b05b .word 0x8000b05b +80001778: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x00000001 +8000177c: 00092b83 lw x23,0(x18) +80001780: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x00000001 +80001784: 00092883 lw x17,0(x18) +80001788: 00490913 addi x18,x18,4 + +8000178c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sum0r x22, x23, x17 # perform operation +8000178c: 511b8b33 sha512sum0r x22,x23,x17 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001790: 0007a203 lw x4,0(x15) +80001794: 01620863 beq x4,x22,800017a4 +80001798: 569032ef jal x5,80005500 +8000179c: 8000178c .word 0x8000178c +800017a0: 8000b0b3 .word 0x8000b0b3 +800017a4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x00000001 +800017a8: 00092983 lw x19,0(x18) +800017ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x00000002 +800017b0: 00092b83 lw x23,0(x18) +800017b4: 00490913 addi x18,x18,4 + +800017b8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sum0r x31, x19, x23 # perform operation +800017b8: 51798fb3 sha512sum0r x31,x19,x23 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017bc: 0007a203 lw x4,0(x15) +800017c0: 01f20863 beq x4,x31,800017d0 +800017c4: 53d032ef jal x5,80005500 +800017c8: 800017b8 .word 0x800017b8 +800017cc: 8000b10b .word 0x8000b10b +800017d0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x00000001 +800017d4: 00092703 lw x14,0(x18) +800017d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x80000000 +800017dc: 00092103 lw x2,0(x18) +800017e0: 00490913 addi x18,x18,4 + +800017e4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sum0r x1, x14, x2 # perform operation +800017e4: 502700b3 sha512sum0r x1,x14,x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017e8: 0007a203 lw x4,0(x15) +800017ec: 00120863 beq x4,x1,800017fc +800017f0: 511032ef jal x5,80005500 +800017f4: 800017e4 .word 0x800017e4 +800017f8: 8000b163 .word 0x8000b163 +800017fc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x00000001 +80001800: 00092303 lw x6,0(x18) +80001804: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x80000001 +80001808: 00092c03 lw x24,0(x18) +8000180c: 00490913 addi x18,x18,4 + +80001810 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sum0r x10, x6, x24 # perform operation +80001810: 51830533 sha512sum0r x10,x6,x24 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001814: 0007a203 lw x4,0(x15) +80001818: 00a20863 beq x4,x10,80001828 +8000181c: 4e5032ef jal x5,80005500 +80001820: 80001810 .word 0x80001810 +80001824: 8000b1c2 .word 0x8000b1c2 +80001828: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x00000001 +8000182c: 00092083 lw x1,0(x18) +80001830: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x7fffffff +80001834: 00092803 lw x16,0(x18) +80001838: 00490913 addi x18,x18,4 + +8000183c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sum0r x7, x1, x16 # perform operation +8000183c: 510083b3 sha512sum0r x7,x1,x16 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001840: 0007a203 lw x4,0(x15) +80001844: 00720863 beq x4,x7,80001854 +80001848: 4b9032ef jal x5,80005500 +8000184c: 8000183c .word 0x8000183c +80001850: 8000b221 .word 0x8000b221 +80001854: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x00000001 +80001858: 00092403 lw x8,0(x18) +8000185c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x7ffffffe +80001860: 00092e83 lw x29,0(x18) +80001864: 00490913 addi x18,x18,4 + +80001868 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sum0r x9, x8, x29 # perform operation +80001868: 51d404b3 sha512sum0r x9,x8,x29 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +8000186c: 0007a203 lw x4,0(x15) +80001870: 00920863 beq x4,x9,80001880 +80001874: 48d032ef jal x5,80005500 +80001878: 80001868 .word 0x80001868 +8000187c: 8000b280 .word 0x8000b280 +80001880: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x00000001 +80001884: 00092b03 lw x22,0(x18) +80001888: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xffffffff +8000188c: 00092303 lw x6,0(x18) +80001890: 00490913 addi x18,x18,4 + +80001894 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sum0r x24, x22, x6 # perform operation +80001894: 506b0c33 sha512sum0r x24,x22,x6 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +80001898: 0007a203 lw x4,0(x15) +8000189c: 01820863 beq x4,x24,800018ac +800018a0: 461032ef jal x5,80005500 +800018a4: 80001894 .word 0x80001894 +800018a8: 8000b2df .word 0x8000b2df +800018ac: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x00000001 +800018b0: 00092603 lw x12,0(x18) +800018b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xfffffffe +800018b8: 00092f83 lw x31,0(x18) +800018bc: 00490913 addi x18,x18,4 + +800018c0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sum0r x2, x12, x31 # perform operation +800018c0: 51f60133 sha512sum0r x2,x12,x31 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018c4: 0007a203 lw x4,0(x15) +800018c8: 00220863 beq x4,x2,800018d8 +800018cc: 435032ef jal x5,80005500 +800018d0: 800018c0 .word 0x800018c0 +800018d4: 8000b33e .word 0x8000b33e +800018d8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x00000001 +800018dc: 00092c03 lw x24,0(x18) +800018e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x5bbc8872 +800018e4: 00092b03 lw x22,0(x18) +800018e8: 00490913 addi x18,x18,4 + +800018ec : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sum0r x30, x24, x22 # perform operation +800018ec: 516c0f33 sha512sum0r x30,x24,x22 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018f0: 0007a203 lw x4,0(x15) +800018f4: 01e20863 beq x4,x30,80001904 +800018f8: 409032ef jal x5,80005500 +800018fc: 800018ec .word 0x800018ec +80001900: 8000b39d .word 0x8000b39d +80001904: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000001 +80001908: 00092d83 lw x27,0(x18) +8000190c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xaaaaaaaa +80001910: 00092403 lw x8,0(x18) +80001914: 00490913 addi x18,x18,4 + +80001918 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sum0r x19, x27, x8 # perform operation +80001918: 508d89b3 sha512sum0r x19,x27,x8 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +8000191c: 0007a203 lw x4,0(x15) +80001920: 01320863 beq x4,x19,80001930 +80001924: 3dd032ef jal x5,80005500 +80001928: 80001918 .word 0x80001918 +8000192c: 8000b3fc .word 0x8000b3fc +80001930: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x00000001 +80001934: 00092803 lw x16,0(x18) +80001938: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x55555555 +8000193c: 00092183 lw x3,0(x18) +80001940: 00490913 addi x18,x18,4 + +80001944 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sum0r x30, x16, x3 # perform operation +80001944: 50380f33 sha512sum0r x30,x16,x3 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001948: 0007a203 lw x4,0(x15) +8000194c: 01e20863 beq x4,x30,8000195c +80001950: 3b1032ef jal x5,80005500 +80001954: 80001944 .word 0x80001944 +80001958: 8000b45b .word 0x8000b45b +8000195c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x00000002 +80001960: 00092103 lw x2,0(x18) +80001964: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x00000000 +80001968: 00092503 lw x10,0(x18) +8000196c: 00490913 addi x18,x18,4 + +80001970 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sum0r x19, x2, x10 # perform operation +80001970: 50a109b3 sha512sum0r x19,x2,x10 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001974: 0007a203 lw x4,0(x15) +80001978: 01320863 beq x4,x19,80001988 +8000197c: 385032ef jal x5,80005500 +80001980: 80001970 .word 0x80001970 +80001984: 8000b4ba .word 0x8000b4ba +80001988: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x00000002 +8000198c: 00092c03 lw x24,0(x18) +80001990: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x00000001 +80001994: 00092d03 lw x26,0(x18) +80001998: 00490913 addi x18,x18,4 + +8000199c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sum0r x19, x24, x26 # perform operation +8000199c: 51ac09b3 sha512sum0r x19,x24,x26 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019a0: 0007a203 lw x4,0(x15) +800019a4: 01320863 beq x4,x19,800019b4 +800019a8: 359032ef jal x5,80005500 +800019ac: 8000199c .word 0x8000199c +800019b0: 8000b512 .word 0x8000b512 +800019b4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000002 +800019b8: 00092d83 lw x27,0(x18) +800019bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000002 +800019c0: 00092a03 lw x20,0(x18) +800019c4: 00490913 addi x18,x18,4 + +800019c8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sum0r x22, x27, x20 # perform operation +800019c8: 514d8b33 sha512sum0r x22,x27,x20 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019cc: 0007a203 lw x4,0(x15) +800019d0: 01620863 beq x4,x22,800019e0 +800019d4: 32d032ef jal x5,80005500 +800019d8: 800019c8 .word 0x800019c8 +800019dc: 8000b56a .word 0x8000b56a +800019e0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x00000002 +800019e4: 00092703 lw x14,0(x18) +800019e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x80000000 +800019ec: 00092d03 lw x26,0(x18) +800019f0: 00490913 addi x18,x18,4 + +800019f4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sum0r x12, x14, x26 # perform operation +800019f4: 51a70633 sha512sum0r x12,x14,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019f8: 0007a203 lw x4,0(x15) +800019fc: 00c20863 beq x4,x12,80001a0c +80001a00: 301032ef jal x5,80005500 +80001a04: 800019f4 .word 0x800019f4 +80001a08: 8000b5c2 .word 0x8000b5c2 +80001a0c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x00000002 +80001a10: 00092f03 lw x30,0(x18) +80001a14: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x80000001 +80001a18: 00092383 lw x7,0(x18) +80001a1c: 00490913 addi x18,x18,4 + +80001a20 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sum0r x22, x30, x7 # perform operation +80001a20: 507f0b33 sha512sum0r x22,x30,x7 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a24: 0007a203 lw x4,0(x15) +80001a28: 01620863 beq x4,x22,80001a38 +80001a2c: 2d5032ef jal x5,80005500 +80001a30: 80001a20 .word 0x80001a20 +80001a34: 8000b621 .word 0x8000b621 +80001a38: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x00000002 +80001a3c: 00092603 lw x12,0(x18) +80001a40: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x7fffffff +80001a44: 00092f03 lw x30,0(x18) +80001a48: 00490913 addi x18,x18,4 + +80001a4c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sum0r x8, x12, x30 # perform operation +80001a4c: 51e60433 sha512sum0r x8,x12,x30 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a50: 0007a203 lw x4,0(x15) +80001a54: 00820863 beq x4,x8,80001a64 +80001a58: 2a9032ef jal x5,80005500 +80001a5c: 80001a4c .word 0x80001a4c +80001a60: 8000b680 .word 0x8000b680 +80001a64: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x00000002 +80001a68: 00092303 lw x6,0(x18) +80001a6c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x7ffffffe +80001a70: 00092503 lw x10,0(x18) +80001a74: 00490913 addi x18,x18,4 + +80001a78 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sum0r x23, x6, x10 # perform operation +80001a78: 50a30bb3 sha512sum0r x23,x6,x10 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a7c: 0007a203 lw x4,0(x15) +80001a80: 01720863 beq x4,x23,80001a90 +80001a84: 27d032ef jal x5,80005500 +80001a88: 80001a78 .word 0x80001a78 +80001a8c: 8000b6df .word 0x8000b6df +80001a90: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x00000002 +80001a94: 00092a03 lw x20,0(x18) +80001a98: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xffffffff +80001a9c: 00092403 lw x8,0(x18) +80001aa0: 00490913 addi x18,x18,4 + +80001aa4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sum0r x11, x20, x8 # perform operation +80001aa4: 508a05b3 sha512sum0r x11,x20,x8 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001aa8: 0007a203 lw x4,0(x15) +80001aac: 00b20863 beq x4,x11,80001abc +80001ab0: 251032ef jal x5,80005500 +80001ab4: 80001aa4 .word 0x80001aa4 +80001ab8: 8000b73e .word 0x8000b73e +80001abc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x00000002 +80001ac0: 00092883 lw x17,0(x18) +80001ac4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xfffffffe +80001ac8: 00092e83 lw x29,0(x18) +80001acc: 00490913 addi x18,x18,4 + +80001ad0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sum0r x13, x17, x29 # perform operation +80001ad0: 51d886b3 sha512sum0r x13,x17,x29 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ad4: 0007a203 lw x4,0(x15) +80001ad8: 00d20863 beq x4,x13,80001ae8 +80001adc: 225032ef jal x5,80005500 +80001ae0: 80001ad0 .word 0x80001ad0 +80001ae4: 8000b79d .word 0x8000b79d +80001ae8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x00000002 +80001aec: 00092f83 lw x31,0(x18) +80001af0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x5bbc8872 +80001af4: 00092e03 lw x28,0(x18) +80001af8: 00490913 addi x18,x18,4 + +80001afc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sum0r x11, x31, x28 # perform operation +80001afc: 51cf85b3 sha512sum0r x11,x31,x28 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b00: 0007a203 lw x4,0(x15) +80001b04: 00b20863 beq x4,x11,80001b14 +80001b08: 1f9032ef jal x5,80005500 +80001b0c: 80001afc .word 0x80001afc +80001b10: 8000b7fc .word 0x8000b7fc +80001b14: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x00000002 +80001b18: 00092d83 lw x27,0(x18) +80001b1c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xaaaaaaaa +80001b20: 00092403 lw x8,0(x18) +80001b24: 00490913 addi x18,x18,4 + +80001b28 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sum0r x31, x27, x8 # perform operation +80001b28: 508d8fb3 sha512sum0r x31,x27,x8 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b2c: 0007a203 lw x4,0(x15) +80001b30: 01f20863 beq x4,x31,80001b40 +80001b34: 1cd032ef jal x5,80005500 +80001b38: 80001b28 .word 0x80001b28 +80001b3c: 8000b85b .word 0x8000b85b +80001b40: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x00000002 +80001b44: 00092703 lw x14,0(x18) +80001b48: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x55555555 +80001b4c: 00092b03 lw x22,0(x18) +80001b50: 00490913 addi x18,x18,4 + +80001b54 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sum0r x1, x14, x22 # perform operation +80001b54: 516700b3 sha512sum0r x1,x14,x22 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b58: 0007a203 lw x4,0(x15) +80001b5c: 00120863 beq x4,x1,80001b6c +80001b60: 1a1032ef jal x5,80005500 +80001b64: 80001b54 .word 0x80001b54 +80001b68: 8000b8ba .word 0x8000b8ba +80001b6c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x80000000 +80001b70: 00092d03 lw x26,0(x18) +80001b74: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x00000000 +80001b78: 00092083 lw x1,0(x18) +80001b7c: 00490913 addi x18,x18,4 + +80001b80 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sum0r x20, x26, x1 # perform operation +80001b80: 501d0a33 sha512sum0r x20,x26,x1 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b84: 0007a203 lw x4,0(x15) +80001b88: 01420863 beq x4,x20,80001b98 +80001b8c: 175032ef jal x5,80005500 +80001b90: 80001b80 .word 0x80001b80 +80001b94: 8000b919 .word 0x8000b919 +80001b98: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x80000000 +80001b9c: 00092103 lw x2,0(x18) +80001ba0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000001 +80001ba4: 00092a03 lw x20,0(x18) +80001ba8: 00490913 addi x18,x18,4 + +80001bac : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sum0r x6, x2, x20 # perform operation +80001bac: 51410333 sha512sum0r x6,x2,x20 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bb0: 0007a203 lw x4,0(x15) +80001bb4: 00620863 beq x4,x6,80001bc4 +80001bb8: 149032ef jal x5,80005500 +80001bbc: 80001bac .word 0x80001bac +80001bc0: 8000b978 .word 0x8000b978 +80001bc4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x80000000 +80001bc8: 00092c83 lw x25,0(x18) +80001bcc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x00000002 +80001bd0: 00092a03 lw x20,0(x18) +80001bd4: 00490913 addi x18,x18,4 + +80001bd8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sum0r x11, x25, x20 # perform operation +80001bd8: 514c85b3 sha512sum0r x11,x25,x20 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bdc: 0007a203 lw x4,0(x15) +80001be0: 00b20863 beq x4,x11,80001bf0 +80001be4: 11d032ef jal x5,80005500 +80001be8: 80001bd8 .word 0x80001bd8 +80001bec: 8000b9d7 .word 0x8000b9d7 +80001bf0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x80000000 +80001bf4: 00092383 lw x7,0(x18) +80001bf8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x80000000 +80001bfc: 00092a03 lw x20,0(x18) +80001c00: 00490913 addi x18,x18,4 + +80001c04 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sum0r x2, x7, x20 # perform operation +80001c04: 51438133 sha512sum0r x2,x7,x20 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c08: 0007a203 lw x4,0(x15) +80001c0c: 00220863 beq x4,x2,80001c1c +80001c10: 0f1032ef jal x5,80005500 +80001c14: 80001c04 .word 0x80001c04 +80001c18: 8000ba36 .word 0x8000ba36 +80001c1c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x80000000 +80001c20: 00092183 lw x3,0(x18) +80001c24: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x80000001 +80001c28: 00092b83 lw x23,0(x18) +80001c2c: 00490913 addi x18,x18,4 + +80001c30 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sum0r x7, x3, x23 # perform operation +80001c30: 517183b3 sha512sum0r x7,x3,x23 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c34: 0007a203 lw x4,0(x15) +80001c38: 00720863 beq x4,x7,80001c48 +80001c3c: 0c5032ef jal x5,80005500 +80001c40: 80001c30 .word 0x80001c30 +80001c44: 8000ba9c .word 0x8000ba9c +80001c48: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x80000000 +80001c4c: 00092603 lw x12,0(x18) +80001c50: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x7fffffff +80001c54: 00092083 lw x1,0(x18) +80001c58: 00490913 addi x18,x18,4 + +80001c5c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sum0r x30, x12, x1 # perform operation +80001c5c: 50160f33 sha512sum0r x30,x12,x1 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c60: 0007a203 lw x4,0(x15) +80001c64: 01e20863 beq x4,x30,80001c74 +80001c68: 099032ef jal x5,80005500 +80001c6c: 80001c5c .word 0x80001c5c +80001c70: 8000bb02 .word 0x8000bb02 +80001c74: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x80000000 +80001c78: 00092883 lw x17,0(x18) +80001c7c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x7ffffffe +80001c80: 00092403 lw x8,0(x18) +80001c84: 00490913 addi x18,x18,4 + +80001c88 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sum0r x12, x17, x8 # perform operation +80001c88: 50888633 sha512sum0r x12,x17,x8 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c8c: 0007a203 lw x4,0(x15) +80001c90: 00c20863 beq x4,x12,80001ca0 +80001c94: 06d032ef jal x5,80005500 +80001c98: 80001c88 .word 0x80001c88 +80001c9c: 8000bb68 .word 0x8000bb68 +80001ca0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x80000000 +80001ca4: 00092183 lw x3,0(x18) +80001ca8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xffffffff +80001cac: 00092b83 lw x23,0(x18) +80001cb0: 00490913 addi x18,x18,4 + +80001cb4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sum0r x30, x3, x23 # perform operation +80001cb4: 51718f33 sha512sum0r x30,x3,x23 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cb8: 0007a203 lw x4,0(x15) +80001cbc: 01e20863 beq x4,x30,80001ccc +80001cc0: 041032ef jal x5,80005500 +80001cc4: 80001cb4 .word 0x80001cb4 +80001cc8: 8000bbce .word 0x8000bbce +80001ccc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x80000000 +80001cd0: 00092583 lw x11,0(x18) +80001cd4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xfffffffe +80001cd8: 00092703 lw x14,0(x18) +80001cdc: 00490913 addi x18,x18,4 + +80001ce0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sum0r x3, x11, x14 # perform operation +80001ce0: 50e581b3 sha512sum0r x3,x11,x14 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001ce4: 0007a203 lw x4,0(x15) +80001ce8: 00320863 beq x4,x3,80001cf8 +80001cec: 015032ef jal x5,80005500 +80001cf0: 80001ce0 .word 0x80001ce0 +80001cf4: 8000bc34 .word 0x8000bc34 +80001cf8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x80000000 +80001cfc: 00092d03 lw x26,0(x18) +80001d00: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x5bbc8872 +80001d04: 00092183 lw x3,0(x18) +80001d08: 00490913 addi x18,x18,4 + +80001d0c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sum0r x30, x26, x3 # perform operation +80001d0c: 503d0f33 sha512sum0r x30,x26,x3 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d10: 0007a203 lw x4,0(x15) +80001d14: 01e20863 beq x4,x30,80001d24 +80001d18: 7e8032ef jal x5,80005500 +80001d1c: 80001d0c .word 0x80001d0c +80001d20: 8000bc9a .word 0x8000bc9a +80001d24: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x80000000 +80001d28: 00092603 lw x12,0(x18) +80001d2c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xaaaaaaaa +80001d30: 00092b83 lw x23,0(x18) +80001d34: 00490913 addi x18,x18,4 + +80001d38 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sum0r x21, x12, x23 # perform operation +80001d38: 51760ab3 sha512sum0r x21,x12,x23 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d3c: 0007a203 lw x4,0(x15) +80001d40: 01520863 beq x4,x21,80001d50 +80001d44: 7bc032ef jal x5,80005500 +80001d48: 80001d38 .word 0x80001d38 +80001d4c: 8000bd00 .word 0x8000bd00 +80001d50: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x80000000 +80001d54: 00092503 lw x10,0(x18) +80001d58: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x55555555 +80001d5c: 00092f03 lw x30,0(x18) +80001d60: 00490913 addi x18,x18,4 + +80001d64 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sum0r x6, x10, x30 # perform operation +80001d64: 51e50333 sha512sum0r x6,x10,x30 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d68: 0007a203 lw x4,0(x15) +80001d6c: 00620863 beq x4,x6,80001d7c +80001d70: 790032ef jal x5,80005500 +80001d74: 80001d64 .word 0x80001d64 +80001d78: 8000bd66 .word 0x8000bd66 +80001d7c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x80000001 +80001d80: 00092f83 lw x31,0(x18) +80001d84: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x00000000 +80001d88: 00092803 lw x16,0(x18) +80001d8c: 00490913 addi x18,x18,4 + +80001d90 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sum0r x13, x31, x16 # perform operation +80001d90: 510f86b3 sha512sum0r x13,x31,x16 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d94: 0007a203 lw x4,0(x15) +80001d98: 00d20863 beq x4,x13,80001da8 +80001d9c: 764032ef jal x5,80005500 +80001da0: 80001d90 .word 0x80001d90 +80001da4: 8000bdcc .word 0x8000bdcc +80001da8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x80000001 +80001dac: 00092303 lw x6,0(x18) +80001db0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x00000001 +80001db4: 00092683 lw x13,0(x18) +80001db8: 00490913 addi x18,x18,4 + +80001dbc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sum0r x14, x6, x13 # perform operation +80001dbc: 50d30733 sha512sum0r x14,x6,x13 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dc0: 0007a203 lw x4,0(x15) +80001dc4: 00e20863 beq x4,x14,80001dd4 +80001dc8: 738032ef jal x5,80005500 +80001dcc: 80001dbc .word 0x80001dbc +80001dd0: 8000be2b .word 0x8000be2b +80001dd4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x80000001 +80001dd8: 00092e03 lw x28,0(x18) +80001ddc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x00000002 +80001de0: 00092983 lw x19,0(x18) +80001de4: 00490913 addi x18,x18,4 + +80001de8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sum0r x29, x28, x19 # perform operation +80001de8: 513e0eb3 sha512sum0r x29,x28,x19 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001dec: 0007a203 lw x4,0(x15) +80001df0: 01d20863 beq x4,x29,80001e00 +80001df4: 70c032ef jal x5,80005500 +80001df8: 80001de8 .word 0x80001de8 +80001dfc: 8000be8a .word 0x8000be8a +80001e00: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x80000001 +80001e04: 00092a03 lw x20,0(x18) +80001e08: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x80000000 +80001e0c: 00092083 lw x1,0(x18) +80001e10: 00490913 addi x18,x18,4 + +80001e14 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sum0r x9, x20, x1 # perform operation +80001e14: 501a04b3 sha512sum0r x9,x20,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e18: 0007a203 lw x4,0(x15) +80001e1c: 00920863 beq x4,x9,80001e2c +80001e20: 6e0032ef jal x5,80005500 +80001e24: 80001e14 .word 0x80001e14 +80001e28: 8000bee9 .word 0x8000bee9 +80001e2c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x80000001 +80001e30: 00092983 lw x19,0(x18) +80001e34: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x80000001 +80001e38: 00092e83 lw x29,0(x18) +80001e3c: 00490913 addi x18,x18,4 + +80001e40 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sum0r x26, x19, x29 # perform operation +80001e40: 51d98d33 sha512sum0r x26,x19,x29 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e44: 0007a203 lw x4,0(x15) +80001e48: 01a20863 beq x4,x26,80001e58 +80001e4c: 6b4032ef jal x5,80005500 +80001e50: 80001e40 .word 0x80001e40 +80001e54: 8000bf4f .word 0x8000bf4f +80001e58: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x80000001 +80001e5c: 00092f83 lw x31,0(x18) +80001e60: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x7fffffff +80001e64: 00092b83 lw x23,0(x18) +80001e68: 00490913 addi x18,x18,4 + +80001e6c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sum0r x1, x31, x23 # perform operation +80001e6c: 517f80b3 sha512sum0r x1,x31,x23 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e70: 0007a203 lw x4,0(x15) +80001e74: 00120863 beq x4,x1,80001e84 +80001e78: 688032ef jal x5,80005500 +80001e7c: 80001e6c .word 0x80001e6c +80001e80: 8000bfb5 .word 0x8000bfb5 +80001e84: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x80000001 +80001e88: 00092a83 lw x21,0(x18) +80001e8c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x7ffffffe +80001e90: 00092403 lw x8,0(x18) +80001e94: 00490913 addi x18,x18,4 + +80001e98 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sum0r x27, x21, x8 # perform operation +80001e98: 508a8db3 sha512sum0r x27,x21,x8 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e9c: 0007a203 lw x4,0(x15) +80001ea0: 01b20863 beq x4,x27,80001eb0 +80001ea4: 65c032ef jal x5,80005500 +80001ea8: 80001e98 .word 0x80001e98 +80001eac: 8000c01b .word 0x8000c01b +80001eb0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x80000001 +80001eb4: 00092303 lw x6,0(x18) +80001eb8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xffffffff +80001ebc: 00092e03 lw x28,0(x18) +80001ec0: 00490913 addi x18,x18,4 + +80001ec4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sum0r x17, x6, x28 # perform operation +80001ec4: 51c308b3 sha512sum0r x17,x6,x28 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ec8: 0007a203 lw x4,0(x15) +80001ecc: 01120863 beq x4,x17,80001edc +80001ed0: 630032ef jal x5,80005500 +80001ed4: 80001ec4 .word 0x80001ec4 +80001ed8: 8000c081 .word 0x8000c081 +80001edc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x80000001 +80001ee0: 00092c03 lw x24,0(x18) +80001ee4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xfffffffe +80001ee8: 00092f83 lw x31,0(x18) +80001eec: 00490913 addi x18,x18,4 + +80001ef0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sum0r x1, x24, x31 # perform operation +80001ef0: 51fc00b3 sha512sum0r x1,x24,x31 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ef4: 0007a203 lw x4,0(x15) +80001ef8: 00120863 beq x4,x1,80001f08 +80001efc: 604032ef jal x5,80005500 +80001f00: 80001ef0 .word 0x80001ef0 +80001f04: 8000c0e7 .word 0x8000c0e7 +80001f08: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x80000001 +80001f0c: 00092483 lw x9,0(x18) +80001f10: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x5bbc8872 +80001f14: 00092d03 lw x26,0(x18) +80001f18: 00490913 addi x18,x18,4 + +80001f1c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sum0r x12, x9, x26 # perform operation +80001f1c: 51a48633 sha512sum0r x12,x9,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f20: 0007a203 lw x4,0(x15) +80001f24: 00c20863 beq x4,x12,80001f34 +80001f28: 5d8032ef jal x5,80005500 +80001f2c: 80001f1c .word 0x80001f1c +80001f30: 8000c14d .word 0x8000c14d +80001f34: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x80000001 +80001f38: 00092683 lw x13,0(x18) +80001f3c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0xaaaaaaaa +80001f40: 00092e83 lw x29,0(x18) +80001f44: 00490913 addi x18,x18,4 + +80001f48 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sum0r x26, x13, x29 # perform operation +80001f48: 51d68d33 sha512sum0r x26,x13,x29 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f4c: 0007a203 lw x4,0(x15) +80001f50: 01a20863 beq x4,x26,80001f60 +80001f54: 5ac032ef jal x5,80005500 +80001f58: 80001f48 .word 0x80001f48 +80001f5c: 8000c1b3 .word 0x8000c1b3 +80001f60: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x80000001 +80001f64: 00092383 lw x7,0(x18) +80001f68: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x55555555 +80001f6c: 00092503 lw x10,0(x18) +80001f70: 00490913 addi x18,x18,4 + +80001f74 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sum0r x25, x7, x10 # perform operation +80001f74: 50a38cb3 sha512sum0r x25,x7,x10 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f78: 0007a203 lw x4,0(x15) +80001f7c: 01920863 beq x4,x25,80001f8c +80001f80: 580032ef jal x5,80005500 +80001f84: 80001f74 .word 0x80001f74 +80001f88: 8000c219 .word 0x8000c219 +80001f8c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x7fffffff +80001f90: 00092c83 lw x25,0(x18) +80001f94: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x00000000 +80001f98: 00092983 lw x19,0(x18) +80001f9c: 00490913 addi x18,x18,4 + +80001fa0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sum0r x11, x25, x19 # perform operation +80001fa0: 513c85b3 sha512sum0r x11,x25,x19 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fa4: 0007a203 lw x4,0(x15) +80001fa8: 00b20863 beq x4,x11,80001fb8 +80001fac: 554032ef jal x5,80005500 +80001fb0: 80001fa0 .word 0x80001fa0 +80001fb4: 8000c27f .word 0x8000c27f +80001fb8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x7fffffff +80001fbc: 00092e03 lw x28,0(x18) +80001fc0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x00000001 +80001fc4: 00092a83 lw x21,0(x18) +80001fc8: 00490913 addi x18,x18,4 + +80001fcc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sum0r x19, x28, x21 # perform operation +80001fcc: 515e09b3 sha512sum0r x19,x28,x21 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fd0: 0007a203 lw x4,0(x15) +80001fd4: 01320863 beq x4,x19,80001fe4 +80001fd8: 528032ef jal x5,80005500 +80001fdc: 80001fcc .word 0x80001fcc +80001fe0: 8000c2de .word 0x8000c2de +80001fe4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x7fffffff +80001fe8: 00092c03 lw x24,0(x18) +80001fec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x00000002 +80001ff0: 00092883 lw x17,0(x18) +80001ff4: 00490913 addi x18,x18,4 + +80001ff8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sum0r x25, x24, x17 # perform operation +80001ff8: 511c0cb3 sha512sum0r x25,x24,x17 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ffc: 0007a203 lw x4,0(x15) +80002000: 01920863 beq x4,x25,80002010 +80002004: 4fc032ef jal x5,80005500 +80002008: 80001ff8 .word 0x80001ff8 +8000200c: 8000c33d .word 0x8000c33d +80002010: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x7fffffff +80002014: 00092d83 lw x27,0(x18) +80002018: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x80000000 +8000201c: 00092603 lw x12,0(x18) +80002020: 00490913 addi x18,x18,4 + +80002024 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sum0r x29, x27, x12 # perform operation +80002024: 50cd8eb3 sha512sum0r x29,x27,x12 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002028: 0007a203 lw x4,0(x15) +8000202c: 01d20863 beq x4,x29,8000203c +80002030: 4d0032ef jal x5,80005500 +80002034: 80002024 .word 0x80002024 +80002038: 8000c39c .word 0x8000c39c +8000203c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x7fffffff +80002040: 00092303 lw x6,0(x18) +80002044: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x80000001 +80002048: 00092403 lw x8,0(x18) +8000204c: 00490913 addi x18,x18,4 + +80002050 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sum0r x22, x6, x8 # perform operation +80002050: 50830b33 sha512sum0r x22,x6,x8 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002054: 0007a203 lw x4,0(x15) +80002058: 01620863 beq x4,x22,80002068 +8000205c: 4a4032ef jal x5,80005500 +80002060: 80002050 .word 0x80002050 +80002064: 8000c402 .word 0x8000c402 +80002068: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x7fffffff +8000206c: 00092703 lw x14,0(x18) +80002070: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x7fffffff +80002074: 00092d03 lw x26,0(x18) +80002078: 00490913 addi x18,x18,4 + +8000207c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sum0r x21, x14, x26 # perform operation +8000207c: 51a70ab3 sha512sum0r x21,x14,x26 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002080: 0007a203 lw x4,0(x15) +80002084: 01520863 beq x4,x21,80002094 +80002088: 478032ef jal x5,80005500 +8000208c: 8000207c .word 0x8000207c +80002090: 8000c468 .word 0x8000c468 +80002094: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x7fffffff +80002098: 00092483 lw x9,0(x18) +8000209c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x7ffffffe +800020a0: 00092e03 lw x28,0(x18) +800020a4: 00490913 addi x18,x18,4 + +800020a8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sum0r x29, x9, x28 # perform operation +800020a8: 51c48eb3 sha512sum0r x29,x9,x28 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020ac: 0007a203 lw x4,0(x15) +800020b0: 01d20863 beq x4,x29,800020c0 +800020b4: 44c032ef jal x5,80005500 +800020b8: 800020a8 .word 0x800020a8 +800020bc: 8000c4ce .word 0x8000c4ce +800020c0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x7fffffff +800020c4: 00092f83 lw x31,0(x18) +800020c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xffffffff +800020cc: 00092383 lw x7,0(x18) +800020d0: 00490913 addi x18,x18,4 + +800020d4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sum0r x26, x31, x7 # perform operation +800020d4: 507f8d33 sha512sum0r x26,x31,x7 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020d8: 0007a203 lw x4,0(x15) +800020dc: 01a20863 beq x4,x26,800020ec +800020e0: 420032ef jal x5,80005500 +800020e4: 800020d4 .word 0x800020d4 +800020e8: 8000c534 .word 0x8000c534 +800020ec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x7fffffff +800020f0: 00092983 lw x19,0(x18) +800020f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xfffffffe +800020f8: 00092a83 lw x21,0(x18) +800020fc: 00490913 addi x18,x18,4 + +80002100 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sum0r x14, x19, x21 # perform operation +80002100: 51598733 sha512sum0r x14,x19,x21 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002104: 0007a203 lw x4,0(x15) +80002108: 00e20863 beq x4,x14,80002118 +8000210c: 3f4032ef jal x5,80005500 +80002110: 80002100 .word 0x80002100 +80002114: 8000c59a .word 0x8000c59a +80002118: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7fffffff +8000211c: 00092503 lw x10,0(x18) +80002120: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x5bbc8872 +80002124: 00092f03 lw x30,0(x18) +80002128: 00490913 addi x18,x18,4 + +8000212c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sum0r x8, x10, x30 # perform operation +8000212c: 51e50433 sha512sum0r x8,x10,x30 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002130: 0007a203 lw x4,0(x15) +80002134: 00820863 beq x4,x8,80002144 +80002138: 3c8032ef jal x5,80005500 +8000213c: 8000212c .word 0x8000212c +80002140: 8000c600 .word 0x8000c600 +80002144: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x7fffffff +80002148: 00092a03 lw x20,0(x18) +8000214c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xaaaaaaaa +80002150: 00092c03 lw x24,0(x18) +80002154: 00490913 addi x18,x18,4 + +80002158 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sum0r x14, x20, x24 # perform operation +80002158: 518a0733 sha512sum0r x14,x20,x24 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +8000215c: 0007a203 lw x4,0(x15) +80002160: 00e20863 beq x4,x14,80002170 +80002164: 39c032ef jal x5,80005500 +80002168: 80002158 .word 0x80002158 +8000216c: 8000c666 .word 0x8000c666 +80002170: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x7fffffff +80002174: 00092303 lw x6,0(x18) +80002178: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x55555555 +8000217c: 00092b83 lw x23,0(x18) +80002180: 00490913 addi x18,x18,4 + +80002184 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sum0r x8, x6, x23 # perform operation +80002184: 51730433 sha512sum0r x8,x6,x23 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002188: 0007a203 lw x4,0(x15) +8000218c: 00820863 beq x4,x8,8000219c +80002190: 370032ef jal x5,80005500 +80002194: 80002184 .word 0x80002184 +80002198: 8000c6cc .word 0x8000c6cc +8000219c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x7ffffffe +800021a0: 00092183 lw x3,0(x18) +800021a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x00000000 +800021a8: 00092103 lw x2,0(x18) +800021ac: 00490913 addi x18,x18,4 + +800021b0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sum0r x20, x3, x2 # perform operation +800021b0: 50218a33 sha512sum0r x20,x3,x2 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021b4: 0007a203 lw x4,0(x15) +800021b8: 01420863 beq x4,x20,800021c8 +800021bc: 344032ef jal x5,80005500 +800021c0: 800021b0 .word 0x800021b0 +800021c4: 8000c732 .word 0x8000c732 +800021c8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x7ffffffe +800021cc: 00092103 lw x2,0(x18) +800021d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x00000001 +800021d4: 00092d83 lw x27,0(x18) +800021d8: 00490913 addi x18,x18,4 + +800021dc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sum0r x24, x2, x27 # perform operation +800021dc: 51b10c33 sha512sum0r x24,x2,x27 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021e0: 0007a203 lw x4,0(x15) +800021e4: 01820863 beq x4,x24,800021f4 +800021e8: 318032ef jal x5,80005500 +800021ec: 800021dc .word 0x800021dc +800021f0: 8000c791 .word 0x8000c791 +800021f4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x7ffffffe +800021f8: 00092e83 lw x29,0(x18) +800021fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000002 +80002200: 00092583 lw x11,0(x18) +80002204: 00490913 addi x18,x18,4 + +80002208 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sum0r x13, x29, x11 # perform operation +80002208: 50be86b3 sha512sum0r x13,x29,x11 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +8000220c: 0007a203 lw x4,0(x15) +80002210: 00d20863 beq x4,x13,80002220 +80002214: 2ec032ef jal x5,80005500 +80002218: 80002208 .word 0x80002208 +8000221c: 8000c7f0 .word 0x8000c7f0 +80002220: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x7ffffffe +80002224: 00092583 lw x11,0(x18) +80002228: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x80000000 +8000222c: 00092f83 lw x31,0(x18) +80002230: 00490913 addi x18,x18,4 + +80002234 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sum0r x6, x11, x31 # perform operation +80002234: 51f58333 sha512sum0r x6,x11,x31 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002238: 0007a203 lw x4,0(x15) +8000223c: 00620863 beq x4,x6,8000224c +80002240: 2c0032ef jal x5,80005500 +80002244: 80002234 .word 0x80002234 +80002248: 8000c84f .word 0x8000c84f +8000224c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x7ffffffe +80002250: 00092a83 lw x21,0(x18) +80002254: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x80000001 +80002258: 00092803 lw x16,0(x18) +8000225c: 00490913 addi x18,x18,4 + +80002260 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sum0r x17, x21, x16 # perform operation +80002260: 510a88b3 sha512sum0r x17,x21,x16 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002264: 0007a203 lw x4,0(x15) +80002268: 01120863 beq x4,x17,80002278 +8000226c: 294032ef jal x5,80005500 +80002270: 80002260 .word 0x80002260 +80002274: 8000c8b5 .word 0x8000c8b5 +80002278: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x7ffffffe +8000227c: 00092803 lw x16,0(x18) +80002280: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x7fffffff +80002284: 00092d83 lw x27,0(x18) +80002288: 00490913 addi x18,x18,4 + +8000228c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sum0r x1, x16, x27 # perform operation +8000228c: 51b800b3 sha512sum0r x1,x16,x27 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002290: 0007a203 lw x4,0(x15) +80002294: 00120863 beq x4,x1,800022a4 +80002298: 268032ef jal x5,80005500 +8000229c: 8000228c .word 0x8000228c +800022a0: 8000c91b .word 0x8000c91b +800022a4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x7ffffffe +800022a8: 00092403 lw x8,0(x18) +800022ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x7ffffffe +800022b0: 00092103 lw x2,0(x18) +800022b4: 00490913 addi x18,x18,4 + +800022b8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sum0r x22, x8, x2 # perform operation +800022b8: 50240b33 sha512sum0r x22,x8,x2 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022bc: 0007a203 lw x4,0(x15) +800022c0: 01620863 beq x4,x22,800022d0 +800022c4: 23c032ef jal x5,80005500 +800022c8: 800022b8 .word 0x800022b8 +800022cc: 8000c981 .word 0x8000c981 +800022d0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x7ffffffe +800022d4: 00092803 lw x16,0(x18) +800022d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xffffffff +800022dc: 00092683 lw x13,0(x18) +800022e0: 00490913 addi x18,x18,4 + +800022e4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sum0r x20, x16, x13 # perform operation +800022e4: 50d80a33 sha512sum0r x20,x16,x13 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022e8: 0007a203 lw x4,0(x15) +800022ec: 01420863 beq x4,x20,800022fc +800022f0: 210032ef jal x5,80005500 +800022f4: 800022e4 .word 0x800022e4 +800022f8: 8000c9e7 .word 0x8000c9e7 +800022fc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x7ffffffe +80002300: 00092883 lw x17,0(x18) +80002304: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0xfffffffe +80002308: 00092b03 lw x22,0(x18) +8000230c: 00490913 addi x18,x18,4 + +80002310 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sum0r x6, x17, x22 # perform operation +80002310: 51688333 sha512sum0r x6,x17,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002314: 0007a203 lw x4,0(x15) +80002318: 00620863 beq x4,x6,80002328 +8000231c: 1e4032ef jal x5,80005500 +80002320: 80002310 .word 0x80002310 +80002324: 8000ca4d .word 0x8000ca4d +80002328: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x7ffffffe +8000232c: 00092303 lw x6,0(x18) +80002330: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x5bbc8872 +80002334: 00092103 lw x2,0(x18) +80002338: 00490913 addi x18,x18,4 + +8000233c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sum0r x1, x6, x2 # perform operation +8000233c: 502300b3 sha512sum0r x1,x6,x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002340: 0007a203 lw x4,0(x15) +80002344: 00120863 beq x4,x1,80002354 +80002348: 1b8032ef jal x5,80005500 +8000234c: 8000233c .word 0x8000233c +80002350: 8000cab3 .word 0x8000cab3 +80002354: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x7ffffffe +80002358: 00092083 lw x1,0(x18) +8000235c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xaaaaaaaa +80002360: 00092883 lw x17,0(x18) +80002364: 00490913 addi x18,x18,4 + +80002368 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sum0r x10, x1, x17 # perform operation +80002368: 51108533 sha512sum0r x10,x1,x17 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +8000236c: 0007a203 lw x4,0(x15) +80002370: 00a20863 beq x4,x10,80002380 +80002374: 18c032ef jal x5,80005500 +80002378: 80002368 .word 0x80002368 +8000237c: 8000cb19 .word 0x8000cb19 +80002380: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x7ffffffe +80002384: 00092c03 lw x24,0(x18) +80002388: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x55555555 +8000238c: 00092103 lw x2,0(x18) +80002390: 00490913 addi x18,x18,4 + +80002394 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sum0r x23, x24, x2 # perform operation +80002394: 502c0bb3 sha512sum0r x23,x24,x2 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +80002398: 0007a203 lw x4,0(x15) +8000239c: 01720863 beq x4,x23,800023ac +800023a0: 160032ef jal x5,80005500 +800023a4: 80002394 .word 0x80002394 +800023a8: 8000cb7f .word 0x8000cb7f +800023ac: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xffffffff +800023b0: 00092483 lw x9,0(x18) +800023b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x00000000 +800023b8: 00092183 lw x3,0(x18) +800023bc: 00490913 addi x18,x18,4 + +800023c0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sum0r x10, x9, x3 # perform operation +800023c0: 50348533 sha512sum0r x10,x9,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023c4: 0007a203 lw x4,0(x15) +800023c8: 00a20863 beq x4,x10,800023d8 +800023cc: 134032ef jal x5,80005500 +800023d0: 800023c0 .word 0x800023c0 +800023d4: 8000cbe5 .word 0x8000cbe5 +800023d8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xffffffff +800023dc: 00092b83 lw x23,0(x18) +800023e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x00000001 +800023e4: 00092483 lw x9,0(x18) +800023e8: 00490913 addi x18,x18,4 + +800023ec : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sum0r x12, x23, x9 # perform operation +800023ec: 509b8633 sha512sum0r x12,x23,x9 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023f0: 0007a203 lw x4,0(x15) +800023f4: 00c20863 beq x4,x12,80002404 +800023f8: 108032ef jal x5,80005500 +800023fc: 800023ec .word 0x800023ec +80002400: 8000cc44 .word 0x8000cc44 +80002404: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xffffffff +80002408: 00092983 lw x19,0(x18) +8000240c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x00000002 +80002410: 00092303 lw x6,0(x18) +80002414: 00490913 addi x18,x18,4 + +80002418 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sum0r x2, x19, x6 # perform operation +80002418: 50698133 sha512sum0r x2,x19,x6 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +8000241c: 0007a203 lw x4,0(x15) +80002420: 00220863 beq x4,x2,80002430 +80002424: 0dc032ef jal x5,80005500 +80002428: 80002418 .word 0x80002418 +8000242c: 8000cca3 .word 0x8000cca3 +80002430: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xffffffff +80002434: 00092e03 lw x28,0(x18) +80002438: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x80000000 +8000243c: 00092703 lw x14,0(x18) +80002440: 00490913 addi x18,x18,4 + +80002444 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sum0r x31, x28, x14 # perform operation +80002444: 50ee0fb3 sha512sum0r x31,x28,x14 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002448: 0007a203 lw x4,0(x15) +8000244c: 01f20863 beq x4,x31,8000245c +80002450: 0b0032ef jal x5,80005500 +80002454: 80002444 .word 0x80002444 +80002458: 8000cd02 .word 0x8000cd02 +8000245c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xffffffff +80002460: 00092f83 lw x31,0(x18) +80002464: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x80000001 +80002468: 00092703 lw x14,0(x18) +8000246c: 00490913 addi x18,x18,4 + +80002470 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sum0r x8, x31, x14 # perform operation +80002470: 50ef8433 sha512sum0r x8,x31,x14 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002474: 0007a203 lw x4,0(x15) +80002478: 00820863 beq x4,x8,80002488 +8000247c: 084032ef jal x5,80005500 +80002480: 80002470 .word 0x80002470 +80002484: 8000cd68 .word 0x8000cd68 +80002488: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xffffffff +8000248c: 00092483 lw x9,0(x18) +80002490: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x7fffffff +80002494: 00092383 lw x7,0(x18) +80002498: 00490913 addi x18,x18,4 + +8000249c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sum0r x2, x9, x7 # perform operation +8000249c: 50748133 sha512sum0r x2,x9,x7 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024a0: 0007a203 lw x4,0(x15) +800024a4: 00220863 beq x4,x2,800024b4 +800024a8: 058032ef jal x5,80005500 +800024ac: 8000249c .word 0x8000249c +800024b0: 8000cdce .word 0x8000cdce +800024b4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xffffffff +800024b8: 00092183 lw x3,0(x18) +800024bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x7ffffffe +800024c0: 00092c03 lw x24,0(x18) +800024c4: 00490913 addi x18,x18,4 + +800024c8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sum0r x9, x3, x24 # perform operation +800024c8: 518184b3 sha512sum0r x9,x3,x24 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024cc: 0007a203 lw x4,0(x15) +800024d0: 00920863 beq x4,x9,800024e0 +800024d4: 02c032ef jal x5,80005500 +800024d8: 800024c8 .word 0x800024c8 +800024dc: 8000ce34 .word 0x8000ce34 +800024e0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0xffffffff +800024e4: 00092a03 lw x20,0(x18) +800024e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xffffffff +800024ec: 00092c83 lw x25,0(x18) +800024f0: 00490913 addi x18,x18,4 + +800024f4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sum0r x31, x20, x25 # perform operation +800024f4: 519a0fb3 sha512sum0r x31,x20,x25 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024f8: 0007a203 lw x4,0(x15) +800024fc: 01f20863 beq x4,x31,8000250c +80002500: 000032ef jal x5,80005500 +80002504: 800024f4 .word 0x800024f4 +80002508: 8000ce9a .word 0x8000ce9a +8000250c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xffffffff +80002510: 00092583 lw x11,0(x18) +80002514: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xfffffffe +80002518: 00092f83 lw x31,0(x18) +8000251c: 00490913 addi x18,x18,4 + +80002520 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sum0r x26, x11, x31 # perform operation +80002520: 51f58d33 sha512sum0r x26,x11,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002524: 0007a203 lw x4,0(x15) +80002528: 01a20863 beq x4,x26,80002538 +8000252c: 7d5022ef jal x5,80005500 +80002530: 80002520 .word 0x80002520 +80002534: 8000cf00 .word 0x8000cf00 +80002538: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0xffffffff +8000253c: 00092803 lw x16,0(x18) +80002540: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x5bbc8872 +80002544: 00092d83 lw x27,0(x18) +80002548: 00490913 addi x18,x18,4 + +8000254c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sum0r x23, x16, x27 # perform operation +8000254c: 51b80bb3 sha512sum0r x23,x16,x27 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002550: 0007a203 lw x4,0(x15) +80002554: 01720863 beq x4,x23,80002564 +80002558: 7a9022ef jal x5,80005500 +8000255c: 8000254c .word 0x8000254c +80002560: 8000cf66 .word 0x8000cf66 +80002564: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xffffffff +80002568: 00092103 lw x2,0(x18) +8000256c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xaaaaaaaa +80002570: 00092683 lw x13,0(x18) +80002574: 00490913 addi x18,x18,4 + +80002578 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sum0r x25, x2, x13 # perform operation +80002578: 50d10cb3 sha512sum0r x25,x2,x13 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +8000257c: 0007a203 lw x4,0(x15) +80002580: 01920863 beq x4,x25,80002590 +80002584: 77d022ef jal x5,80005500 +80002588: 80002578 .word 0x80002578 +8000258c: 8000cfcc .word 0x8000cfcc +80002590: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xffffffff +80002594: 00092983 lw x19,0(x18) +80002598: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x55555555 +8000259c: 00092183 lw x3,0(x18) +800025a0: 00490913 addi x18,x18,4 + +800025a4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sum0r x23, x19, x3 # perform operation +800025a4: 50398bb3 sha512sum0r x23,x19,x3 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025a8: 0007a203 lw x4,0(x15) +800025ac: 01720863 beq x4,x23,800025bc +800025b0: 751022ef jal x5,80005500 +800025b4: 800025a4 .word 0x800025a4 +800025b8: 8000d032 .word 0x8000d032 +800025bc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0xfffffffe +800025c0: 00092a03 lw x20,0(x18) +800025c4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x00000000 +800025c8: 00092983 lw x19,0(x18) +800025cc: 00490913 addi x18,x18,4 + +800025d0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sum0r x13, x20, x19 # perform operation +800025d0: 513a06b3 sha512sum0r x13,x20,x19 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025d4: 0007a203 lw x4,0(x15) +800025d8: 00d20863 beq x4,x13,800025e8 +800025dc: 725022ef jal x5,80005500 +800025e0: 800025d0 .word 0x800025d0 +800025e4: 8000d098 .word 0x8000d098 +800025e8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0xfffffffe +800025ec: 00092a83 lw x21,0(x18) +800025f0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x00000001 +800025f4: 00092383 lw x7,0(x18) +800025f8: 00490913 addi x18,x18,4 + +800025fc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sum0r x6, x21, x7 # perform operation +800025fc: 507a8333 sha512sum0r x6,x21,x7 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002600: 0007a203 lw x4,0(x15) +80002604: 00620863 beq x4,x6,80002614 +80002608: 6f9022ef jal x5,80005500 +8000260c: 800025fc .word 0x800025fc +80002610: 8000d0f7 .word 0x8000d0f7 +80002614: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xfffffffe +80002618: 00092c83 lw x25,0(x18) +8000261c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x00000002 +80002620: 00092883 lw x17,0(x18) +80002624: 00490913 addi x18,x18,4 + +80002628 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sum0r x26, x25, x17 # perform operation +80002628: 511c8d33 sha512sum0r x26,x25,x17 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +8000262c: 0007a203 lw x4,0(x15) +80002630: 01a20863 beq x4,x26,80002640 +80002634: 6cd022ef jal x5,80005500 +80002638: 80002628 .word 0x80002628 +8000263c: 8000d156 .word 0x8000d156 +80002640: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xfffffffe +80002644: 00092683 lw x13,0(x18) +80002648: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x80000000 +8000264c: 00092983 lw x19,0(x18) +80002650: 00490913 addi x18,x18,4 + +80002654 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sum0r x31, x13, x19 # perform operation +80002654: 51368fb3 sha512sum0r x31,x13,x19 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002658: 0007a203 lw x4,0(x15) +8000265c: 01f20863 beq x4,x31,8000266c +80002660: 6a1022ef jal x5,80005500 +80002664: 80002654 .word 0x80002654 +80002668: 8000d1b5 .word 0x8000d1b5 +8000266c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xfffffffe +80002670: 00092703 lw x14,0(x18) +80002674: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x80000001 +80002678: 00092b03 lw x22,0(x18) +8000267c: 00490913 addi x18,x18,4 + +80002680 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sum0r x28, x14, x22 # perform operation +80002680: 51670e33 sha512sum0r x28,x14,x22 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002684: 0007a203 lw x4,0(x15) +80002688: 01c20863 beq x4,x28,80002698 +8000268c: 675022ef jal x5,80005500 +80002690: 80002680 .word 0x80002680 +80002694: 8000d21b .word 0x8000d21b +80002698: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xfffffffe +8000269c: 00092103 lw x2,0(x18) +800026a0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x7fffffff +800026a4: 00092a03 lw x20,0(x18) +800026a8: 00490913 addi x18,x18,4 + +800026ac : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sum0r x22, x2, x20 # perform operation +800026ac: 51410b33 sha512sum0r x22,x2,x20 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026b0: 0007a203 lw x4,0(x15) +800026b4: 01620863 beq x4,x22,800026c4 +800026b8: 649022ef jal x5,80005500 +800026bc: 800026ac .word 0x800026ac +800026c0: 8000d281 .word 0x8000d281 +800026c4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xfffffffe +800026c8: 00092303 lw x6,0(x18) +800026cc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x7ffffffe +800026d0: 00092183 lw x3,0(x18) +800026d4: 00490913 addi x18,x18,4 + +800026d8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sum0r x14, x6, x3 # perform operation +800026d8: 50330733 sha512sum0r x14,x6,x3 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026dc: 0007a203 lw x4,0(x15) +800026e0: 00e20863 beq x4,x14,800026f0 +800026e4: 61d022ef jal x5,80005500 +800026e8: 800026d8 .word 0x800026d8 +800026ec: 8000d2e7 .word 0x8000d2e7 +800026f0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xfffffffe +800026f4: 00092b03 lw x22,0(x18) +800026f8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xffffffff +800026fc: 00092103 lw x2,0(x18) +80002700: 00490913 addi x18,x18,4 + +80002704 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sum0r x13, x22, x2 # perform operation +80002704: 502b06b3 sha512sum0r x13,x22,x2 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002708: 0007a203 lw x4,0(x15) +8000270c: 00d20863 beq x4,x13,8000271c +80002710: 5f1022ef jal x5,80005500 +80002714: 80002704 .word 0x80002704 +80002718: 8000d34d .word 0x8000d34d +8000271c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xfffffffe +80002720: 00092303 lw x6,0(x18) +80002724: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xfffffffe +80002728: 00092703 lw x14,0(x18) +8000272c: 00490913 addi x18,x18,4 + +80002730 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sum0r x20, x6, x14 # perform operation +80002730: 50e30a33 sha512sum0r x20,x6,x14 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002734: 0007a203 lw x4,0(x15) +80002738: 01420863 beq x4,x20,80002748 +8000273c: 5c5022ef jal x5,80005500 +80002740: 80002730 .word 0x80002730 +80002744: 8000d3b3 .word 0x8000d3b3 +80002748: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xfffffffe +8000274c: 00092d83 lw x27,0(x18) +80002750: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x5bbc8872 +80002754: 00092e83 lw x29,0(x18) +80002758: 00490913 addi x18,x18,4 + +8000275c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sum0r x22, x27, x29 # perform operation +8000275c: 51dd8b33 sha512sum0r x22,x27,x29 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002760: 0007a203 lw x4,0(x15) +80002764: 01620863 beq x4,x22,80002774 +80002768: 599022ef jal x5,80005500 +8000276c: 8000275c .word 0x8000275c +80002770: 8000d419 .word 0x8000d419 +80002774: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xfffffffe +80002778: 00092b03 lw x22,0(x18) +8000277c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0xaaaaaaaa +80002780: 00092c83 lw x25,0(x18) +80002784: 00490913 addi x18,x18,4 + +80002788 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sum0r x31, x22, x25 # perform operation +80002788: 519b0fb3 sha512sum0r x31,x22,x25 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +8000278c: 0007a203 lw x4,0(x15) +80002790: 01f20863 beq x4,x31,800027a0 +80002794: 56d022ef jal x5,80005500 +80002798: 80002788 .word 0x80002788 +8000279c: 8000d47f .word 0x8000d47f +800027a0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xfffffffe +800027a4: 00092583 lw x11,0(x18) +800027a8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x55555555 +800027ac: 00092983 lw x19,0(x18) +800027b0: 00490913 addi x18,x18,4 + +800027b4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sum0r x25, x11, x19 # perform operation +800027b4: 51358cb3 sha512sum0r x25,x11,x19 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027b8: 0007a203 lw x4,0(x15) +800027bc: 01920863 beq x4,x25,800027cc +800027c0: 541022ef jal x5,80005500 +800027c4: 800027b4 .word 0x800027b4 +800027c8: 8000d4e5 .word 0x8000d4e5 +800027cc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x5bbc8872 +800027d0: 00092e83 lw x29,0(x18) +800027d4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x00000000 +800027d8: 00092c03 lw x24,0(x18) +800027dc: 00490913 addi x18,x18,4 + +800027e0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sum0r x26, x29, x24 # perform operation +800027e0: 518e8d33 sha512sum0r x26,x29,x24 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027e4: 0007a203 lw x4,0(x15) +800027e8: 01a20863 beq x4,x26,800027f8 +800027ec: 515022ef jal x5,80005500 +800027f0: 800027e0 .word 0x800027e0 +800027f4: 8000d54b .word 0x8000d54b +800027f8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x5bbc8872 +800027fc: 00092583 lw x11,0(x18) +80002800: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x00000001 +80002804: 00092e03 lw x28,0(x18) +80002808: 00490913 addi x18,x18,4 + +8000280c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sum0r x22, x11, x28 # perform operation +8000280c: 51c58b33 sha512sum0r x22,x11,x28 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002810: 0007a203 lw x4,0(x15) +80002814: 01620863 beq x4,x22,80002824 +80002818: 4e9022ef jal x5,80005500 +8000281c: 8000280c .word 0x8000280c +80002820: 8000d5aa .word 0x8000d5aa +80002824: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x5bbc8872 +80002828: 00092703 lw x14,0(x18) +8000282c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x00000002 +80002830: 00092383 lw x7,0(x18) +80002834: 00490913 addi x18,x18,4 + +80002838 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sum0r x31, x14, x7 # perform operation +80002838: 50770fb3 sha512sum0r x31,x14,x7 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +8000283c: 0007a203 lw x4,0(x15) +80002840: 01f20863 beq x4,x31,80002850 +80002844: 4bd022ef jal x5,80005500 +80002848: 80002838 .word 0x80002838 +8000284c: 8000d609 .word 0x8000d609 +80002850: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x5bbc8872 +80002854: 00092c83 lw x25,0(x18) +80002858: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x80000000 +8000285c: 00092a83 lw x21,0(x18) +80002860: 00490913 addi x18,x18,4 + +80002864 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sum0r x3, x25, x21 # perform operation +80002864: 515c81b3 sha512sum0r x3,x25,x21 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002868: 0007a203 lw x4,0(x15) +8000286c: 00320863 beq x4,x3,8000287c +80002870: 491022ef jal x5,80005500 +80002874: 80002864 .word 0x80002864 +80002878: 8000d668 .word 0x8000d668 +8000287c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x5bbc8872 +80002880: 00092603 lw x12,0(x18) +80002884: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x80000001 +80002888: 00092e03 lw x28,0(x18) +8000288c: 00490913 addi x18,x18,4 + +80002890 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sum0r x9, x12, x28 # perform operation +80002890: 51c604b3 sha512sum0r x9,x12,x28 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002894: 0007a203 lw x4,0(x15) +80002898: 00920863 beq x4,x9,800028a8 +8000289c: 465022ef jal x5,80005500 +800028a0: 80002890 .word 0x80002890 +800028a4: 8000d6ce .word 0x8000d6ce +800028a8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x5bbc8872 +800028ac: 00092183 lw x3,0(x18) +800028b0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x7fffffff +800028b4: 00092d83 lw x27,0(x18) +800028b8: 00490913 addi x18,x18,4 + +800028bc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sum0r x22, x3, x27 # perform operation +800028bc: 51b18b33 sha512sum0r x22,x3,x27 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028c0: 0007a203 lw x4,0(x15) +800028c4: 01620863 beq x4,x22,800028d4 +800028c8: 439022ef jal x5,80005500 +800028cc: 800028bc .word 0x800028bc +800028d0: 8000d734 .word 0x8000d734 +800028d4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x5bbc8872 +800028d8: 00092803 lw x16,0(x18) +800028dc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x7ffffffe +800028e0: 00092d03 lw x26,0(x18) +800028e4: 00490913 addi x18,x18,4 + +800028e8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sum0r x14, x16, x26 # perform operation +800028e8: 51a80733 sha512sum0r x14,x16,x26 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028ec: 0007a203 lw x4,0(x15) +800028f0: 00e20863 beq x4,x14,80002900 +800028f4: 40d022ef jal x5,80005500 +800028f8: 800028e8 .word 0x800028e8 +800028fc: 8000d79a .word 0x8000d79a +80002900: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x5bbc8872 +80002904: 00092a83 lw x21,0(x18) +80002908: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xffffffff +8000290c: 00092983 lw x19,0(x18) +80002910: 00490913 addi x18,x18,4 + +80002914 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sum0r x1, x21, x19 # perform operation +80002914: 513a80b3 sha512sum0r x1,x21,x19 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002918: 0007a203 lw x4,0(x15) +8000291c: 00120863 beq x4,x1,8000292c +80002920: 3e1022ef jal x5,80005500 +80002924: 80002914 .word 0x80002914 +80002928: 8000d800 .word 0x8000d800 +8000292c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x5bbc8872 +80002930: 00092883 lw x17,0(x18) +80002934: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xfffffffe +80002938: 00092803 lw x16,0(x18) +8000293c: 00490913 addi x18,x18,4 + +80002940 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sum0r x31, x17, x16 # perform operation +80002940: 51088fb3 sha512sum0r x31,x17,x16 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002944: 0007a203 lw x4,0(x15) +80002948: 01f20863 beq x4,x31,80002958 +8000294c: 3b5022ef jal x5,80005500 +80002950: 80002940 .word 0x80002940 +80002954: 8000d866 .word 0x8000d866 +80002958: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x5bbc8872 +8000295c: 00092d03 lw x26,0(x18) +80002960: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x5bbc8872 +80002964: 00092c03 lw x24,0(x18) +80002968: 00490913 addi x18,x18,4 + +8000296c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sum0r x16, x26, x24 # perform operation +8000296c: 518d0833 sha512sum0r x16,x26,x24 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002970: 0007a203 lw x4,0(x15) +80002974: 01020863 beq x4,x16,80002984 +80002978: 389022ef jal x5,80005500 +8000297c: 8000296c .word 0x8000296c +80002980: 8000d8cc .word 0x8000d8cc +80002984: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x5bbc8872 +80002988: 00092503 lw x10,0(x18) +8000298c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xaaaaaaaa +80002990: 00092c03 lw x24,0(x18) +80002994: 00490913 addi x18,x18,4 + +80002998 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sum0r x16, x10, x24 # perform operation +80002998: 51850833 sha512sum0r x16,x10,x24 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +8000299c: 0007a203 lw x4,0(x15) +800029a0: 01020863 beq x4,x16,800029b0 +800029a4: 35d022ef jal x5,80005500 +800029a8: 80002998 .word 0x80002998 +800029ac: 8000d932 .word 0x8000d932 +800029b0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x5bbc8872 +800029b4: 00092703 lw x14,0(x18) +800029b8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x55555555 +800029bc: 00092683 lw x13,0(x18) +800029c0: 00490913 addi x18,x18,4 + +800029c4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sum0r x26, x14, x13 # perform operation +800029c4: 50d70d33 sha512sum0r x26,x14,x13 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029c8: 0007a203 lw x4,0(x15) +800029cc: 01a20863 beq x4,x26,800029dc +800029d0: 331022ef jal x5,80005500 +800029d4: 800029c4 .word 0x800029c4 +800029d8: 8000d998 .word 0x8000d998 +800029dc: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xaaaaaaaa +800029e0: 00092b83 lw x23,0(x18) +800029e4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x00000000 +800029e8: 00092f83 lw x31,0(x18) +800029ec: 00490913 addi x18,x18,4 + +800029f0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sum0r x16, x23, x31 # perform operation +800029f0: 51fb8833 sha512sum0r x16,x23,x31 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029f4: 0007a203 lw x4,0(x15) +800029f8: 01020863 beq x4,x16,80002a08 +800029fc: 305022ef jal x5,80005500 +80002a00: 800029f0 .word 0x800029f0 +80002a04: 8000d9fe .word 0x8000d9fe +80002a08: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xaaaaaaaa +80002a0c: 00092683 lw x13,0(x18) +80002a10: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x00000001 +80002a14: 00092583 lw x11,0(x18) +80002a18: 00490913 addi x18,x18,4 + +80002a1c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sum0r x8, x13, x11 # perform operation +80002a1c: 50b68433 sha512sum0r x8,x13,x11 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a20: 0007a203 lw x4,0(x15) +80002a24: 00820863 beq x4,x8,80002a34 +80002a28: 2d9022ef jal x5,80005500 +80002a2c: 80002a1c .word 0x80002a1c +80002a30: 8000da5d .word 0x8000da5d +80002a34: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xaaaaaaaa +80002a38: 00092e03 lw x28,0(x18) +80002a3c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x00000002 +80002a40: 00092183 lw x3,0(x18) +80002a44: 00490913 addi x18,x18,4 + +80002a48 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sum0r x11, x28, x3 # perform operation +80002a48: 503e05b3 sha512sum0r x11,x28,x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a4c: 0007a203 lw x4,0(x15) +80002a50: 00b20863 beq x4,x11,80002a60 +80002a54: 2ad022ef jal x5,80005500 +80002a58: 80002a48 .word 0x80002a48 +80002a5c: 8000dabc .word 0x8000dabc +80002a60: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xaaaaaaaa +80002a64: 00092083 lw x1,0(x18) +80002a68: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x80000000 +80002a6c: 00092c83 lw x25,0(x18) +80002a70: 00490913 addi x18,x18,4 + +80002a74 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sum0r x8, x1, x25 # perform operation +80002a74: 51908433 sha512sum0r x8,x1,x25 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a78: 0007a203 lw x4,0(x15) +80002a7c: 00820863 beq x4,x8,80002a8c +80002a80: 281022ef jal x5,80005500 +80002a84: 80002a74 .word 0x80002a74 +80002a88: 8000db1b .word 0x8000db1b +80002a8c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xaaaaaaaa +80002a90: 00092683 lw x13,0(x18) +80002a94: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x80000001 +80002a98: 00092e03 lw x28,0(x18) +80002a9c: 00490913 addi x18,x18,4 + +80002aa0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sum0r x23, x13, x28 # perform operation +80002aa0: 51c68bb3 sha512sum0r x23,x13,x28 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002aa4: 0007a203 lw x4,0(x15) +80002aa8: 01720863 beq x4,x23,80002ab8 +80002aac: 255022ef jal x5,80005500 +80002ab0: 80002aa0 .word 0x80002aa0 +80002ab4: 8000db81 .word 0x8000db81 +80002ab8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xaaaaaaaa +80002abc: 00092703 lw x14,0(x18) +80002ac0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x7fffffff +80002ac4: 00092983 lw x19,0(x18) +80002ac8: 00490913 addi x18,x18,4 + +80002acc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sum0r x21, x14, x19 # perform operation +80002acc: 51370ab3 sha512sum0r x21,x14,x19 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ad0: 0007a203 lw x4,0(x15) +80002ad4: 01520863 beq x4,x21,80002ae4 +80002ad8: 229022ef jal x5,80005500 +80002adc: 80002acc .word 0x80002acc +80002ae0: 8000dbe7 .word 0x8000dbe7 +80002ae4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xaaaaaaaa +80002ae8: 00092983 lw x19,0(x18) +80002aec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x7ffffffe +80002af0: 00092083 lw x1,0(x18) +80002af4: 00490913 addi x18,x18,4 + +80002af8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sum0r x8, x19, x1 # perform operation +80002af8: 50198433 sha512sum0r x8,x19,x1 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002afc: 0007a203 lw x4,0(x15) +80002b00: 00820863 beq x4,x8,80002b10 +80002b04: 1fd022ef jal x5,80005500 +80002b08: 80002af8 .word 0x80002af8 +80002b0c: 8000dc4d .word 0x8000dc4d +80002b10: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0xaaaaaaaa +80002b14: 00092483 lw x9,0(x18) +80002b18: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xffffffff +80002b1c: 00092b83 lw x23,0(x18) +80002b20: 00490913 addi x18,x18,4 + +80002b24 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sum0r x21, x9, x23 # perform operation +80002b24: 51748ab3 sha512sum0r x21,x9,x23 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b28: 0007a203 lw x4,0(x15) +80002b2c: 01520863 beq x4,x21,80002b3c +80002b30: 1d1022ef jal x5,80005500 +80002b34: 80002b24 .word 0x80002b24 +80002b38: 8000dcb3 .word 0x8000dcb3 +80002b3c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xaaaaaaaa +80002b40: 00092d83 lw x27,0(x18) +80002b44: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xfffffffe +80002b48: 00092983 lw x19,0(x18) +80002b4c: 00490913 addi x18,x18,4 + +80002b50 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sum0r x10, x27, x19 # perform operation +80002b50: 513d8533 sha512sum0r x10,x27,x19 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b54: 0007a203 lw x4,0(x15) +80002b58: 00a20863 beq x4,x10,80002b68 +80002b5c: 1a5022ef jal x5,80005500 +80002b60: 80002b50 .word 0x80002b50 +80002b64: 8000dd19 .word 0x8000dd19 +80002b68: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xaaaaaaaa +80002b6c: 00092503 lw x10,0(x18) +80002b70: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x5bbc8872 +80002b74: 00092f03 lw x30,0(x18) +80002b78: 00490913 addi x18,x18,4 + +80002b7c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sum0r x9, x10, x30 # perform operation +80002b7c: 51e504b3 sha512sum0r x9,x10,x30 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b80: 0007a203 lw x4,0(x15) +80002b84: 00920863 beq x4,x9,80002b94 +80002b88: 179022ef jal x5,80005500 +80002b8c: 80002b7c .word 0x80002b7c +80002b90: 8000dd7f .word 0x8000dd7f +80002b94: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xaaaaaaaa +80002b98: 00092103 lw x2,0(x18) +80002b9c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xaaaaaaaa +80002ba0: 00092383 lw x7,0(x18) +80002ba4: 00490913 addi x18,x18,4 + +80002ba8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sum0r x17, x2, x7 # perform operation +80002ba8: 507108b3 sha512sum0r x17,x2,x7 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bac: 0007a203 lw x4,0(x15) +80002bb0: 01120863 beq x4,x17,80002bc0 +80002bb4: 14d022ef jal x5,80005500 +80002bb8: 80002ba8 .word 0x80002ba8 +80002bbc: 8000dde5 .word 0x8000dde5 +80002bc0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xaaaaaaaa +80002bc4: 00092b03 lw x22,0(x18) +80002bc8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x55555555 +80002bcc: 00092c83 lw x25,0(x18) +80002bd0: 00490913 addi x18,x18,4 + +80002bd4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sum0r x19, x22, x25 # perform operation +80002bd4: 519b09b3 sha512sum0r x19,x22,x25 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bd8: 0007a203 lw x4,0(x15) +80002bdc: 01320863 beq x4,x19,80002bec +80002be0: 121022ef jal x5,80005500 +80002be4: 80002bd4 .word 0x80002bd4 +80002be8: 8000de4b .word 0x8000de4b +80002bec: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x55555555 +80002bf0: 00092483 lw x9,0(x18) +80002bf4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x00000000 +80002bf8: 00092b03 lw x22,0(x18) +80002bfc: 00490913 addi x18,x18,4 + +80002c00 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sum0r x26, x9, x22 # perform operation +80002c00: 51648d33 sha512sum0r x26,x9,x22 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c04: 0007a203 lw x4,0(x15) +80002c08: 01a20863 beq x4,x26,80002c18 +80002c0c: 0f5022ef jal x5,80005500 +80002c10: 80002c00 .word 0x80002c00 +80002c14: 8000deb1 .word 0x8000deb1 +80002c18: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x55555555 +80002c1c: 00092f83 lw x31,0(x18) +80002c20: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x00000001 +80002c24: 00092f03 lw x30,0(x18) +80002c28: 00490913 addi x18,x18,4 + +80002c2c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sum0r x20, x31, x30 # perform operation +80002c2c: 51ef8a33 sha512sum0r x20,x31,x30 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c30: 0007a203 lw x4,0(x15) +80002c34: 01420863 beq x4,x20,80002c44 +80002c38: 0c9022ef jal x5,80005500 +80002c3c: 80002c2c .word 0x80002c2c +80002c40: 8000df10 .word 0x8000df10 +80002c44: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x55555555 +80002c48: 00092e83 lw x29,0(x18) +80002c4c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x00000002 +80002c50: 00092683 lw x13,0(x18) +80002c54: 00490913 addi x18,x18,4 + +80002c58 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sum0r x28, x29, x13 # perform operation +80002c58: 50de8e33 sha512sum0r x28,x29,x13 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c5c: 0007a203 lw x4,0(x15) +80002c60: 01c20863 beq x4,x28,80002c70 +80002c64: 09d022ef jal x5,80005500 +80002c68: 80002c58 .word 0x80002c58 +80002c6c: 8000df6f .word 0x8000df6f +80002c70: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x55555555 +80002c74: 00092b03 lw x22,0(x18) +80002c78: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x80000000 +80002c7c: 00092d03 lw x26,0(x18) +80002c80: 00490913 addi x18,x18,4 + +80002c84 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sum0r x3, x22, x26 # perform operation +80002c84: 51ab01b3 sha512sum0r x3,x22,x26 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c88: 0007a203 lw x4,0(x15) +80002c8c: 00320863 beq x4,x3,80002c9c +80002c90: 071022ef jal x5,80005500 +80002c94: 80002c84 .word 0x80002c84 +80002c98: 8000dfce .word 0x8000dfce +80002c9c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x55555555 +80002ca0: 00092603 lw x12,0(x18) +80002ca4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x80000001 +80002ca8: 00092683 lw x13,0(x18) +80002cac: 00490913 addi x18,x18,4 + +80002cb0 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sum0r x24, x12, x13 # perform operation +80002cb0: 50d60c33 sha512sum0r x24,x12,x13 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cb4: 0007a203 lw x4,0(x15) +80002cb8: 01820863 beq x4,x24,80002cc8 +80002cbc: 045022ef jal x5,80005500 +80002cc0: 80002cb0 .word 0x80002cb0 +80002cc4: 8000e034 .word 0x8000e034 +80002cc8: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x55555555 +80002ccc: 00092503 lw x10,0(x18) +80002cd0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x7fffffff +80002cd4: 00092c83 lw x25,0(x18) +80002cd8: 00490913 addi x18,x18,4 + +80002cdc : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sum0r x8, x10, x25 # perform operation +80002cdc: 51950433 sha512sum0r x8,x10,x25 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002ce0: 0007a203 lw x4,0(x15) +80002ce4: 00820863 beq x4,x8,80002cf4 +80002ce8: 019022ef jal x5,80005500 +80002cec: 80002cdc .word 0x80002cdc +80002cf0: 8000e09a .word 0x8000e09a +80002cf4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x55555555 +80002cf8: 00092183 lw x3,0(x18) +80002cfc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x7ffffffe +80002d00: 00092483 lw x9,0(x18) +80002d04: 00490913 addi x18,x18,4 + +80002d08 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sum0r x1, x3, x9 # perform operation +80002d08: 509180b3 sha512sum0r x1,x3,x9 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d0c: 0007a203 lw x4,0(x15) +80002d10: 00120863 beq x4,x1,80002d20 +80002d14: 7ec022ef jal x5,80005500 +80002d18: 80002d08 .word 0x80002d08 +80002d1c: 8000e100 .word 0x8000e100 +80002d20: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x55555555 +80002d24: 00092803 lw x16,0(x18) +80002d28: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xffffffff +80002d2c: 00092983 lw x19,0(x18) +80002d30: 00490913 addi x18,x18,4 + +80002d34 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sum0r x22, x16, x19 # perform operation +80002d34: 51380b33 sha512sum0r x22,x16,x19 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d38: 0007a203 lw x4,0(x15) +80002d3c: 01620863 beq x4,x22,80002d4c +80002d40: 7c0022ef jal x5,80005500 +80002d44: 80002d34 .word 0x80002d34 +80002d48: 8000e166 .word 0x8000e166 +80002d4c: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x55555555 +80002d50: 00092c83 lw x25,0(x18) +80002d54: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xfffffffe +80002d58: 00092103 lw x2,0(x18) +80002d5c: 00490913 addi x18,x18,4 + +80002d60 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sum0r x17, x25, x2 # perform operation +80002d60: 502c88b3 sha512sum0r x17,x25,x2 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d64: 0007a203 lw x4,0(x15) +80002d68: 01120863 beq x4,x17,80002d78 +80002d6c: 794022ef jal x5,80005500 +80002d70: 80002d60 .word 0x80002d60 +80002d74: 8000e1cc .word 0x8000e1cc +80002d78: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x55555555 +80002d7c: 00092b03 lw x22,0(x18) +80002d80: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x5bbc8872 +80002d84: 00092503 lw x10,0(x18) +80002d88: 00490913 addi x18,x18,4 + +80002d8c : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sum0r x29, x22, x10 # perform operation +80002d8c: 50ab0eb3 sha512sum0r x29,x22,x10 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d90: 0007a203 lw x4,0(x15) +80002d94: 01d20863 beq x4,x29,80002da4 +80002d98: 768022ef jal x5,80005500 +80002d9c: 80002d8c .word 0x80002d8c +80002da0: 8000e232 .word 0x8000e232 +80002da4: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x55555555 +80002da8: 00092883 lw x17,0(x18) +80002dac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xaaaaaaaa +80002db0: 00092503 lw x10,0(x18) +80002db4: 00490913 addi x18,x18,4 + +80002db8 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sum0r x7, x17, x10 # perform operation +80002db8: 50a883b3 sha512sum0r x7,x17,x10 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dbc: 0007a203 lw x4,0(x15) +80002dc0: 00720863 beq x4,x7,80002dd0 +80002dc4: 73c022ef jal x5,80005500 +80002dc8: 80002db8 .word 0x80002db8 +80002dcc: 8000e298 .word 0x8000e298 +80002dd0: 00478793 addi x15,x15,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x55555555 +80002dd4: 00092c83 lw x25,0(x18) +80002dd8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x55555555 +80002ddc: 00092e03 lw x28,0(x18) +80002de0: 00490913 addi x18,x18,4 + +80002de4 : +Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sum0r x23, x25, x28 # perform operation +80002de4: 51cc8bb3 sha512sum0r x23,x25,x28 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sum0r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002de8: 0007a203 lw x4,0(x15) +80002dec: 01720863 beq x4,x23,80002dfc +80002df0: 710022ef jal x5,80005500 +80002df4: 80002de4 .word 0x80002de4 +80002df8: 8000e2fe .word 0x8000e2fe +80002dfc: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x00108d8e +80002e00: 00092003 lw x0,0(x18) +80002e04: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x94a5ea32 +80002e08: 00092003 lw x0,0(x18) +80002e0c: 00490913 addi x18,x18,4 + +80002e10 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b0: + sha512sum0r x11, x0, x0 # perform operation +80002e10: 500005b3 sha512sum0r x11,x0,x0 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b0, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b0_str) +80002e14: 0007a203 lw x4,0(x15) +80002e18: 00b20863 beq x4,x11,80002e28 +80002e1c: 6e4022ef jal x5,80005500 +80002e20: 80002e10 .word 0x80002e10 +80002e24: 8000e364 .word 0x8000e364 +80002e28: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x8569e56a +80002e2c: 00092083 lw x1,0(x18) +80002e30: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x5f63d94b +80002e34: 00092083 lw x1,0(x18) +80002e38: 00490913 addi x18,x18,4 + +80002e3c : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b1: + sha512sum0r x30, x1, x1 # perform operation +80002e3c: 50108f33 sha512sum0r x30,x1,x1 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b1, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b1_str) +80002e40: 0007a203 lw x4,0(x15) +80002e44: 01e20863 beq x4,x30,80002e54 +80002e48: 6b8022ef jal x5,80005500 +80002e4c: 80002e3c .word 0x80002e3c +80002e50: 8000e3a3 .word 0x8000e3a3 +80002e54: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0x5e34eaa0 +80002e58: 00092103 lw x2,0(x18) +80002e5c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x462551dd +80002e60: 00092103 lw x2,0(x18) +80002e64: 00490913 addi x18,x18,4 + +80002e68 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b2: + sha512sum0r x23, x2, x2 # perform operation +80002e68: 50210bb3 sha512sum0r x23,x2,x2 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b2, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b2_str) +80002e6c: 0007a203 lw x4,0(x15) +80002e70: 01720863 beq x4,x23,80002e80 +80002e74: 68c022ef jal x5,80005500 +80002e78: 80002e68 .word 0x80002e68 +80002e7c: 8000e3e2 .word 0x8000e3e2 +80002e80: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x979762e8 +80002e84: 00092183 lw x3,0(x18) +80002e88: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x5712bfd3 +80002e8c: 00092183 lw x3,0(x18) +80002e90: 00490913 addi x18,x18,4 + +80002e94 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b3: + sha512sum0r x21, x3, x3 # perform operation +80002e94: 50318ab3 sha512sum0r x21,x3,x3 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b3, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b3_str) +80002e98: 0007a203 lw x4,0(x15) +80002e9c: 01520863 beq x4,x21,80002eac +80002ea0: 660022ef jal x5,80005500 +80002ea4: 80002e94 .word 0x80002e94 +80002ea8: 8000e421 .word 0x8000e421 +80002eac: 00478793 addi x15,x15,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002eb0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002eb4: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xe58fbf0c +80002eb8: 00092203 lw x4,0(x18) +80002ebc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x88e78687 +80002ec0: 00092203 lw x4,0(x18) +80002ec4: 00490913 addi x18,x18,4 + +80002ec8 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b4: + sha512sum0r x14, x4, x4 # perform operation +80002ec8: 50420733 sha512sum0r x14,x4,x4 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b4, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b4_str) +80002ecc: 0007a383 lw x7,0(x15) +80002ed0: 00e38863 beq x7,x14,80002ee0 +80002ed4: 6440246f jal x8,80005518 +80002ed8: 80002ec8 .word 0x80002ec8 +80002edc: 8000e460 .word 0x8000e460 +80002ee0: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x18fe174b +80002ee4: 00092283 lw x5,0(x18) +80002ee8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x7791b0ed +80002eec: 00092283 lw x5,0(x18) +80002ef0: 00490913 addi x18,x18,4 + +80002ef4 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b5: + sha512sum0r x21, x5, x5 # perform operation +80002ef4: 50528ab3 sha512sum0r x21,x5,x5 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b5, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b5_str) +80002ef8: 0007a383 lw x7,0(x15) +80002efc: 01538863 beq x7,x21,80002f0c +80002f00: 6180246f jal x8,80005518 +80002f04: 80002ef4 .word 0x80002ef4 +80002f08: 8000e49f .word 0x8000e49f +80002f0c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xae3f68a2 +80002f10: 00092303 lw x6,0(x18) +80002f14: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xa493b3cf +80002f18: 00092303 lw x6,0(x18) +80002f1c: 00490913 addi x18,x18,4 + +80002f20 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b6: + sha512sum0r x28, x6, x6 # perform operation +80002f20: 50630e33 sha512sum0r x28,x6,x6 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b6, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b6_str) +80002f24: 0007a383 lw x7,0(x15) +80002f28: 01c38863 beq x7,x28,80002f38 +80002f2c: 5ec0246f jal x8,80005518 +80002f30: 80002f20 .word 0x80002f20 +80002f34: 8000e4de .word 0x8000e4de +80002f38: 00478793 addi x15,x15,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f3c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f40: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xad0272f0 +80002f44: 00092383 lw x7,0(x18) +80002f48: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xa0337daa +80002f4c: 00092383 lw x7,0(x18) +80002f50: 00490913 addi x18,x18,4 + +80002f54 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b7: + sha512sum0r x28, x7, x7 # perform operation +80002f54: 50738e33 sha512sum0r x28,x7,x7 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b7, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b7_str) +80002f58: 0007a203 lw x4,0(x15) +80002f5c: 01c20863 beq x4,x28,80002f6c +80002f60: 5a0022ef jal x5,80005500 +80002f64: 80002f54 .word 0x80002f54 +80002f68: 8000e51d .word 0x8000e51d +80002f6c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x58a9dce5 +80002f70: 00092403 lw x8,0(x18) +80002f74: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x6e55525e +80002f78: 00092403 lw x8,0(x18) +80002f7c: 00490913 addi x18,x18,4 + +80002f80 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b8: + sha512sum0r x14, x8, x8 # perform operation +80002f80: 50840733 sha512sum0r x14,x8,x8 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b8, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b8_str) +80002f84: 0007a203 lw x4,0(x15) +80002f88: 00e20863 beq x4,x14,80002f98 +80002f8c: 574022ef jal x5,80005500 +80002f90: 80002f80 .word 0x80002f80 +80002f94: 8000e55c .word 0x8000e55c +80002f98: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x3acd9bca +80002f9c: 00092483 lw x9,0(x18) +80002fa0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xda757566 +80002fa4: 00092483 lw x9,0(x18) +80002fa8: 00490913 addi x18,x18,4 + +80002fac : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b9: + sha512sum0r x31, x9, x9 # perform operation +80002fac: 50948fb3 sha512sum0r x31,x9,x9 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b9, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b9_str) +80002fb0: 0007a203 lw x4,0(x15) +80002fb4: 01f20863 beq x4,x31,80002fc4 +80002fb8: 548022ef jal x5,80005500 +80002fbc: 80002fac .word 0x80002fac +80002fc0: 8000e59b .word 0x8000e59b +80002fc4: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x0155fe91 +80002fc8: 00092503 lw x10,0(x18) +80002fcc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x59a54f79 +80002fd0: 00092503 lw x10,0(x18) +80002fd4: 00490913 addi x18,x18,4 + +80002fd8 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b10: + sha512sum0r x20, x10, x10 # perform operation +80002fd8: 50a50a33 sha512sum0r x20,x10,x10 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b10, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b10_str) +80002fdc: 0007a203 lw x4,0(x15) +80002fe0: 01420863 beq x4,x20,80002ff0 +80002fe4: 51c022ef jal x5,80005500 +80002fe8: 80002fd8 .word 0x80002fd8 +80002fec: 8000e5da .word 0x8000e5da +80002ff0: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xc280ac57 +80002ff4: 00092583 lw x11,0(x18) +80002ff8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x8783b08c +80002ffc: 00092583 lw x11,0(x18) +80003000: 00490913 addi x18,x18,4 + +80003004 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b11: + sha512sum0r x6, x11, x11 # perform operation +80003004: 50b58333 sha512sum0r x6,x11,x11 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b11, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b11_str) +80003008: 0007a203 lw x4,0(x15) +8000300c: 00620863 beq x4,x6,8000301c +80003010: 4f0022ef jal x5,80005500 +80003014: 80003004 .word 0x80003004 +80003018: 8000e61a .word 0x8000e61a +8000301c: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x9a9cca4e +80003020: 00092603 lw x12,0(x18) +80003024: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x266da0f5 +80003028: 00092603 lw x12,0(x18) +8000302c: 00490913 addi x18,x18,4 + +80003030 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b12: + sha512sum0r x2, x12, x12 # perform operation +80003030: 50c60133 sha512sum0r x2,x12,x12 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b12, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b12_str) +80003034: 0007a203 lw x4,0(x15) +80003038: 00220863 beq x4,x2,80003048 +8000303c: 4c4022ef jal x5,80005500 +80003040: 80003030 .word 0x80003030 +80003044: 8000e65a .word 0x8000e65a +80003048: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xc7373a50 +8000304c: 00092683 lw x13,0(x18) +80003050: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xd82a5747 +80003054: 00092683 lw x13,0(x18) +80003058: 00490913 addi x18,x18,4 + +8000305c : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b13: + sha512sum0r x22, x13, x13 # perform operation +8000305c: 50d68b33 sha512sum0r x22,x13,x13 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b13, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b13_str) +80003060: 0007a203 lw x4,0(x15) +80003064: 01620863 beq x4,x22,80003074 +80003068: 498022ef jal x5,80005500 +8000306c: 8000305c .word 0x8000305c +80003070: 8000e69a .word 0x8000e69a +80003074: 00478793 addi x15,x15,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x140cbeab +80003078: 00092703 lw x14,0(x18) +8000307c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x130d99a8 +80003080: 00092703 lw x14,0(x18) +80003084: 00490913 addi x18,x18,4 + +80003088 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b14: + sha512sum0r x20, x14, x14 # perform operation +80003088: 50e70a33 sha512sum0r x20,x14,x14 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b14, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b14_str) +8000308c: 0007a203 lw x4,0(x15) +80003090: 01420863 beq x4,x20,800030a0 +80003094: 46c022ef jal x5,80005500 +80003098: 80003088 .word 0x80003088 +8000309c: 8000e6da .word 0x8000e6da +800030a0: 00478793 addi x15,x15,4 + + mv x28, x15 # switch signature pointer register to avoid conflict with test +800030a4: 00078e13 addi x28,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x476c3d10 +800030a8: 00092783 lw x15,0(x18) +800030ac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xd9419a4f +800030b0: 00092783 lw x15,0(x18) +800030b4: 00490913 addi x18,x18,4 + +800030b8 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b15: + sha512sum0r x23, x15, x15 # perform operation +800030b8: 50f78bb3 sha512sum0r x23,x15,x15 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b15, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b15_str) +800030bc: 000e2203 lw x4,0(x28) +800030c0: 01720863 beq x4,x23,800030d0 +800030c4: 43c022ef jal x5,80005500 +800030c8: 800030b8 .word 0x800030b8 +800030cc: 8000e71a .word 0x8000e71a +800030d0: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x4f36dfa8 +800030d4: 00092803 lw x16,0(x18) +800030d8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x377f71a8 +800030dc: 00092803 lw x16,0(x18) +800030e0: 00490913 addi x18,x18,4 + +800030e4 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b16: + sha512sum0r x13, x16, x16 # perform operation +800030e4: 510806b3 sha512sum0r x13,x16,x16 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b16, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b16_str) +800030e8: 000e2203 lw x4,0(x28) +800030ec: 00d20863 beq x4,x13,800030fc +800030f0: 410022ef jal x5,80005500 +800030f4: 800030e4 .word 0x800030e4 +800030f8: 8000e75a .word 0x8000e75a +800030fc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xca83ff15 +80003100: 00092883 lw x17,0(x18) +80003104: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x0cb4ce24 +80003108: 00092883 lw x17,0(x18) +8000310c: 00490913 addi x18,x18,4 + +80003110 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b17: + sha512sum0r x6, x17, x17 # perform operation +80003110: 51188333 sha512sum0r x6,x17,x17 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b17, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b17_str) +80003114: 000e2203 lw x4,0(x28) +80003118: 00620863 beq x4,x6,80003128 +8000311c: 3e4022ef jal x5,80005500 +80003120: 80003110 .word 0x80003110 +80003124: 8000e79a .word 0x8000e79a +80003128: 004e0e13 addi x28,x28,4 + + mv x25, x18 # switch data pointer register to avoid conflict with test +8000312c: 00090c93 addi x25,x18,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x0a8f8a21 +80003130: 000ca903 lw x18,0(x25) +80003134: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0xfaf86bdd +80003138: 000ca903 lw x18,0(x25) +8000313c: 004c8c93 addi x25,x25,4 + +80003140 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b18: + sha512sum0r x17, x18, x18 # perform operation +80003140: 512908b3 sha512sum0r x17,x18,x18 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b18, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b18_str) +80003144: 000e2203 lw x4,0(x28) +80003148: 01120863 beq x4,x17,80003158 +8000314c: 3b4022ef jal x5,80005500 +80003150: 80003140 .word 0x80003140 +80003154: 8000e7da .word 0x8000e7da +80003158: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xb3a1772f +8000315c: 000ca983 lw x19,0(x25) +80003160: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x49cb0341 +80003164: 000ca983 lw x19,0(x25) +80003168: 004c8c93 addi x25,x25,4 + +8000316c : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b19: + sha512sum0r x24, x19, x19 # perform operation +8000316c: 51398c33 sha512sum0r x24,x19,x19 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b19, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b19_str) +80003170: 000e2203 lw x4,0(x28) +80003174: 01820863 beq x4,x24,80003184 +80003178: 388022ef jal x5,80005500 +8000317c: 8000316c .word 0x8000316c +80003180: 8000e81a .word 0x8000e81a +80003184: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x6957e99c +80003188: 000caa03 lw x20,0(x25) +8000318c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xab258275 +80003190: 000caa03 lw x20,0(x25) +80003194: 004c8c93 addi x25,x25,4 + +80003198 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b20: + sha512sum0r x1, x20, x20 # perform operation +80003198: 514a00b3 sha512sum0r x1,x20,x20 + # Check if x1 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x1, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b20, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b20_str) +8000319c: 000e2203 lw x4,0(x28) +800031a0: 00120863 beq x4,x1,800031b0 +800031a4: 35c022ef jal x5,80005500 +800031a8: 80003198 .word 0x80003198 +800031ac: 8000e85a .word 0x8000e85a +800031b0: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x87a9b512 +800031b4: 000caa83 lw x21,0(x25) +800031b8: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x43c1f713 +800031bc: 000caa83 lw x21,0(x25) +800031c0: 004c8c93 addi x25,x25,4 + +800031c4 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b21: + sha512sum0r x22, x21, x21 # perform operation +800031c4: 515a8b33 sha512sum0r x22,x21,x21 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b21, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b21_str) +800031c8: 000e2203 lw x4,0(x28) +800031cc: 01620863 beq x4,x22,800031dc +800031d0: 330022ef jal x5,80005500 +800031d4: 800031c4 .word 0x800031c4 +800031d8: 8000e89a .word 0x8000e89a +800031dc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x7ce4d8c7 +800031e0: 000cab03 lw x22,0(x25) +800031e4: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x9e484896 +800031e8: 000cab03 lw x22,0(x25) +800031ec: 004c8c93 addi x25,x25,4 + +800031f0 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b22: + sha512sum0r x12, x22, x22 # perform operation +800031f0: 516b0633 sha512sum0r x12,x22,x22 + # Check if x12 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x12, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b22, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b22_str) +800031f4: 000e2203 lw x4,0(x28) +800031f8: 00c20863 beq x4,x12,80003208 +800031fc: 304022ef jal x5,80005500 +80003200: 800031f0 .word 0x800031f0 +80003204: 8000e8da .word 0x8000e8da +80003208: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0xc2ed5042 +8000320c: 000cab83 lw x23,0(x25) +80003210: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xd95abd16 +80003214: 000cab83 lw x23,0(x25) +80003218: 004c8c93 addi x25,x25,4 + +8000321c : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b23: + sha512sum0r x16, x23, x23 # perform operation +8000321c: 517b8833 sha512sum0r x16,x23,x23 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b23, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b23_str) +80003220: 000e2203 lw x4,0(x28) +80003224: 01020863 beq x4,x16,80003234 +80003228: 2d8022ef jal x5,80005500 +8000322c: 8000321c .word 0x8000321c +80003230: 8000e91a .word 0x8000e91a +80003234: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x63adf7f5 +80003238: 000cac03 lw x24,0(x25) +8000323c: 004c8c93 addi x25,x25,4 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x71496183 +80003240: 000cac03 lw x24,0(x25) +80003244: 004c8c93 addi x25,x25,4 + +80003248 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b24: + sha512sum0r x13, x24, x24 # perform operation +80003248: 518c06b3 sha512sum0r x13,x24,x24 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b24, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b24_str) +8000324c: 000e2203 lw x4,0(x28) +80003250: 00d20863 beq x4,x13,80003260 +80003254: 2ac022ef jal x5,80005500 +80003258: 80003248 .word 0x80003248 +8000325c: 8000e95a .word 0x8000e95a +80003260: 004e0e13 addi x28,x28,4 + + mv x2, x25 # switch data pointer register to avoid conflict with test +80003264: 000c8113 addi x2,x25,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xcd639c6a +80003268: 00012c83 lw x25,0(x2) +8000326c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x89e94ce4 +80003270: 00012c83 lw x25,0(x2) +80003274: 00410113 addi x2,x2,4 + +80003278 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b25: + sha512sum0r x20, x25, x25 # perform operation +80003278: 519c8a33 sha512sum0r x20,x25,x25 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b25, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b25_str) +8000327c: 000e2203 lw x4,0(x28) +80003280: 01420863 beq x4,x20,80003290 +80003284: 27c022ef jal x5,80005500 +80003288: 80003278 .word 0x80003278 +8000328c: 8000e99a .word 0x8000e99a +80003290: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x38f58643 +80003294: 00012d03 lw x26,0(x2) +80003298: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2ce71260 +8000329c: 00012d03 lw x26,0(x2) +800032a0: 00410113 addi x2,x2,4 + +800032a4 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b26: + sha512sum0r x21, x26, x26 # perform operation +800032a4: 51ad0ab3 sha512sum0r x21,x26,x26 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b26, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b26_str) +800032a8: 000e2203 lw x4,0(x28) +800032ac: 01520863 beq x4,x21,800032bc +800032b0: 250022ef jal x5,80005500 +800032b4: 800032a4 .word 0x800032a4 +800032b8: 8000e9da .word 0x8000e9da +800032bc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xbf5a6114 +800032c0: 00012d83 lw x27,0(x2) +800032c4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xa467f101 +800032c8: 00012d83 lw x27,0(x2) +800032cc: 00410113 addi x2,x2,4 + +800032d0 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b27: + sha512sum0r x10, x27, x27 # perform operation +800032d0: 51bd8533 sha512sum0r x10,x27,x27 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b27, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b27_str) +800032d4: 000e2203 lw x4,0(x28) +800032d8: 00a20863 beq x4,x10,800032e8 +800032dc: 224022ef jal x5,80005500 +800032e0: 800032d0 .word 0x800032d0 +800032e4: 8000ea1a .word 0x8000ea1a +800032e8: 004e0e13 addi x28,x28,4 + + mv x9, x28 # switch signature pointer register to avoid conflict with test +800032ec: 000e0493 addi x9,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xc25cbd17 +800032f0: 00012e03 lw x28,0(x2) +800032f4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xea32a331 +800032f8: 00012e03 lw x28,0(x2) +800032fc: 00410113 addi x2,x2,4 + +80003300 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b28: + sha512sum0r x23, x28, x28 # perform operation +80003300: 51ce0bb3 sha512sum0r x23,x28,x28 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b28, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b28_str) +80003304: 0004a203 lw x4,0(x9) +80003308: 01720863 beq x4,x23,80003318 +8000330c: 1f4022ef jal x5,80005500 +80003310: 80003300 .word 0x80003300 +80003314: 8000ea5a .word 0x8000ea5a +80003318: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xc4d3fde8 +8000331c: 00012e83 lw x29,0(x2) +80003320: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xf52a81c4 +80003324: 00012e83 lw x29,0(x2) +80003328: 00410113 addi x2,x2,4 + +8000332c : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b29: + sha512sum0r x16, x29, x29 # perform operation +8000332c: 51de8833 sha512sum0r x16,x29,x29 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b29, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b29_str) +80003330: 0004a203 lw x4,0(x9) +80003334: 01020863 beq x4,x16,80003344 +80003338: 1c8022ef jal x5,80005500 +8000333c: 8000332c .word 0x8000332c +80003340: 8000ea9a .word 0x8000ea9a +80003344: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x180e811b +80003348: 00012f03 lw x30,0(x2) +8000334c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xc40900c5 +80003350: 00012f03 lw x30,0(x2) +80003354: 00410113 addi x2,x2,4 + +80003358 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b30: + sha512sum0r x23, x30, x30 # perform operation +80003358: 51ef0bb3 sha512sum0r x23,x30,x30 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b30, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b30_str) +8000335c: 0004a203 lw x4,0(x9) +80003360: 01720863 beq x4,x23,80003370 +80003364: 19c022ef jal x5,80005500 +80003368: 80003358 .word 0x80003358 +8000336c: 8000eada .word 0x8000eada +80003370: 00448493 addi x9,x9,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x5e6f0826 +80003374: 00012f83 lw x31,0(x2) +80003378: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x2e244f52 +8000337c: 00012f83 lw x31,0(x2) +80003380: 00410113 addi x2,x2,4 + +80003384 : +Zknh_sha512sum0r_cg_cmp_rs1_rs2_b31: + sha512sum0r x29, x31, x31 # perform operation +80003384: 51ff8eb3 sha512sum0r x29,x31,x31 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b31, Zknh_sha512sum0r_cg_cmp_rs1_rs2_b31_str) +80003388: 0004a203 lw x4,0(x9) +8000338c: 01d20863 beq x4,x29,8000339c +80003390: 170022ef jal x5,80005500 +80003394: 80003384 .word 0x80003384 +80003398: 8000eb1a .word 0x8000eb1a +8000339c: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x705f443a +800033a0: 00012003 lw x0,0(x2) +800033a4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xf1f59874 +800033a8: 00012f03 lw x30,0(x2) +800033ac: 00410113 addi x2,x2,4 + +800033b0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b0: + sha512sum0r x0, x0, x30 # perform operation +800033b0: 51e00033 sha512sum0r x0,x0,x30 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zknh_sha512sum0r_cg_cmp_rd_rs1_b0, Zknh_sha512sum0r_cg_cmp_rd_rs1_b0_str) +800033b4: 0004a203 lw x4,0(x9) +800033b8: 00020863 beq x4,x0,800033c8 +800033bc: 144022ef jal x5,80005500 +800033c0: 800033b0 .word 0x800033b0 +800033c4: 8000eb5a .word 0x8000eb5a +800033c8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x93e5caa8 +800033cc: 00012083 lw x1,0(x2) +800033d0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xcfd70074 +800033d4: 00012e83 lw x29,0(x2) +800033d8: 00410113 addi x2,x2,4 + +800033dc : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b1: + sha512sum0r x1, x1, x29 # perform operation +800033dc: 51d080b3 sha512sum0r x1,x1,x29 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zknh_sha512sum0r_cg_cmp_rd_rs1_b1, Zknh_sha512sum0r_cg_cmp_rd_rs1_b1_str) +800033e0: 0004a203 lw x4,0(x9) +800033e4: 00120863 beq x4,x1,800033f4 +800033e8: 118022ef jal x5,80005500 +800033ec: 800033dc .word 0x800033dc +800033f0: 8000eb98 .word 0x8000eb98 +800033f4: 00448493 addi x9,x9,4 + + mv x15, x2 # switch data pointer register to avoid conflict with test +800033f8: 00010793 addi x15,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x751b059a +800033fc: 0007a103 lw x2,0(x15) +80003400: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x947eef97 +80003404: 0007a803 lw x16,0(x15) +80003408: 00478793 addi x15,x15,4 + +8000340c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b2: + sha512sum0r x2, x2, x16 # perform operation +8000340c: 51010133 sha512sum0r x2,x2,x16 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zknh_sha512sum0r_cg_cmp_rd_rs1_b2, Zknh_sha512sum0r_cg_cmp_rd_rs1_b2_str) +80003410: 0004a203 lw x4,0(x9) +80003414: 00220863 beq x4,x2,80003424 +80003418: 0e8022ef jal x5,80005500 +8000341c: 8000340c .word 0x8000340c +80003420: 8000ebd6 .word 0x8000ebd6 +80003424: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x4de57161 +80003428: 0007a183 lw x3,0(x15) +8000342c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x76a2c2f8 +80003430: 0007a103 lw x2,0(x15) +80003434: 00478793 addi x15,x15,4 + +80003438 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b3: + sha512sum0r x3, x3, x2 # perform operation +80003438: 502181b3 sha512sum0r x3,x3,x2 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zknh_sha512sum0r_cg_cmp_rd_rs1_b3, Zknh_sha512sum0r_cg_cmp_rd_rs1_b3_str) +8000343c: 0004a203 lw x4,0(x9) +80003440: 00320863 beq x4,x3,80003450 +80003444: 0bc022ef jal x5,80005500 +80003448: 80003438 .word 0x80003438 +8000344c: 8000ec14 .word 0x8000ec14 +80003450: 00448493 addi x9,x9,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003454: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003458: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x0266051d +8000345c: 0007a203 lw x4,0(x15) +80003460: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x5d80e7ec +80003464: 0007af83 lw x31,0(x15) +80003468: 00478793 addi x15,x15,4 + +8000346c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b4: + sha512sum0r x4, x4, x31 # perform operation +8000346c: 51f20233 sha512sum0r x4,x4,x31 + # Check if x4 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x4, Zknh_sha512sum0r_cg_cmp_rd_rs1_b4, Zknh_sha512sum0r_cg_cmp_rd_rs1_b4_str) +80003470: 0004a683 lw x13,0(x9) +80003474: 00468863 beq x13,x4,80003484 +80003478: 0c80276f jal x14,80005540 +8000347c: 8000346c .word 0x8000346c +80003480: 8000ec52 .word 0x8000ec52 +80003484: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xe5681a30 +80003488: 0007a283 lw x5,0(x15) +8000348c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x5d3206db +80003490: 0007aa83 lw x21,0(x15) +80003494: 00478793 addi x15,x15,4 + +80003498 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b5: + sha512sum0r x5, x5, x21 # perform operation +80003498: 515282b3 sha512sum0r x5,x5,x21 + # Check if x5 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x5, Zknh_sha512sum0r_cg_cmp_rd_rs1_b5, Zknh_sha512sum0r_cg_cmp_rd_rs1_b5_str) +8000349c: 0004a683 lw x13,0(x9) +800034a0: 00568863 beq x13,x5,800034b0 +800034a4: 09c0276f jal x14,80005540 +800034a8: 80003498 .word 0x80003498 +800034ac: 8000ec90 .word 0x8000ec90 +800034b0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x13f6ff75 +800034b4: 0007a303 lw x6,0(x15) +800034b8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xe4be583a +800034bc: 0007a403 lw x8,0(x15) +800034c0: 00478793 addi x15,x15,4 + +800034c4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b6: + sha512sum0r x6, x6, x8 # perform operation +800034c4: 50830333 sha512sum0r x6,x6,x8 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zknh_sha512sum0r_cg_cmp_rd_rs1_b6, Zknh_sha512sum0r_cg_cmp_rd_rs1_b6_str) +800034c8: 0004a683 lw x13,0(x9) +800034cc: 00668863 beq x13,x6,800034dc +800034d0: 0700276f jal x14,80005540 +800034d4: 800034c4 .word 0x800034c4 +800034d8: 8000ecce .word 0x8000ecce +800034dc: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xaf768d6e +800034e0: 0007a383 lw x7,0(x15) +800034e4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xd73e7e3a +800034e8: 0007aa83 lw x21,0(x15) +800034ec: 00478793 addi x15,x15,4 + +800034f0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b7: + sha512sum0r x7, x7, x21 # perform operation +800034f0: 515383b3 sha512sum0r x7,x7,x21 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zknh_sha512sum0r_cg_cmp_rd_rs1_b7, Zknh_sha512sum0r_cg_cmp_rd_rs1_b7_str) +800034f4: 0004a683 lw x13,0(x9) +800034f8: 00768863 beq x13,x7,80003508 +800034fc: 0440276f jal x14,80005540 +80003500: 800034f0 .word 0x800034f0 +80003504: 8000ed0c .word 0x8000ed0c +80003508: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xa2df3bef +8000350c: 0007a403 lw x8,0(x15) +80003510: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0xeb200909 +80003514: 0007a003 lw x0,0(x15) +80003518: 00478793 addi x15,x15,4 + +8000351c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b8: + sha512sum0r x8, x8, x0 # perform operation +8000351c: 50040433 sha512sum0r x8,x8,x0 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zknh_sha512sum0r_cg_cmp_rd_rs1_b8, Zknh_sha512sum0r_cg_cmp_rd_rs1_b8_str) +80003520: 0004a683 lw x13,0(x9) +80003524: 00868863 beq x13,x8,80003534 +80003528: 0180276f jal x14,80005540 +8000352c: 8000351c .word 0x8000351c +80003530: 8000ed4a .word 0x8000ed4a +80003534: 00448493 addi x9,x9,4 + + mv x23, x9 # switch signature pointer register to avoid conflict with test +80003538: 00048b93 addi x23,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x30d2bbb9 +8000353c: 0007a483 lw x9,0(x15) +80003540: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x13bf331d +80003544: 0007af03 lw x30,0(x15) +80003548: 00478793 addi x15,x15,4 + +8000354c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b9: + sha512sum0r x9, x9, x30 # perform operation +8000354c: 51e484b3 sha512sum0r x9,x9,x30 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zknh_sha512sum0r_cg_cmp_rd_rs1_b9, Zknh_sha512sum0r_cg_cmp_rd_rs1_b9_str) +80003550: 000ba683 lw x13,0(x23) +80003554: 00968863 beq x13,x9,80003564 +80003558: 7e90176f jal x14,80005540 +8000355c: 8000354c .word 0x8000354c +80003560: 8000ed88 .word 0x8000ed88 +80003564: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xf50a2499 +80003568: 0007a503 lw x10,0(x15) +8000356c: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x4254ddb8 +80003570: 0007a583 lw x11,0(x15) +80003574: 00478793 addi x15,x15,4 + +80003578 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b10: + sha512sum0r x10, x10, x11 # perform operation +80003578: 50b50533 sha512sum0r x10,x10,x11 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknh_sha512sum0r_cg_cmp_rd_rs1_b10, Zknh_sha512sum0r_cg_cmp_rd_rs1_b10_str) +8000357c: 000ba683 lw x13,0(x23) +80003580: 00a68863 beq x13,x10,80003590 +80003584: 7bd0176f jal x14,80005540 +80003588: 80003578 .word 0x80003578 +8000358c: 8000edc6 .word 0x8000edc6 +80003590: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xc75c6de7 +80003594: 0007a583 lw x11,0(x15) +80003598: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x265bd8f8 +8000359c: 0007aa83 lw x21,0(x15) +800035a0: 00478793 addi x15,x15,4 + +800035a4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b11: + sha512sum0r x11, x11, x21 # perform operation +800035a4: 515585b3 sha512sum0r x11,x11,x21 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknh_sha512sum0r_cg_cmp_rd_rs1_b11, Zknh_sha512sum0r_cg_cmp_rd_rs1_b11_str) +800035a8: 000ba683 lw x13,0(x23) +800035ac: 00b68863 beq x13,x11,800035bc +800035b0: 7910176f jal x14,80005540 +800035b4: 800035a4 .word 0x800035a4 +800035b8: 8000ee05 .word 0x8000ee05 +800035bc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xbec594c4 +800035c0: 0007a603 lw x12,0(x15) +800035c4: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x456631ee +800035c8: 0007a883 lw x17,0(x15) +800035cc: 00478793 addi x15,x15,4 + +800035d0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b12: + sha512sum0r x12, x12, x17 # perform operation +800035d0: 51160633 sha512sum0r x12,x12,x17 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zknh_sha512sum0r_cg_cmp_rd_rs1_b12, Zknh_sha512sum0r_cg_cmp_rd_rs1_b12_str) +800035d4: 000ba683 lw x13,0(x23) +800035d8: 00c68863 beq x13,x12,800035e8 +800035dc: 7650176f jal x14,80005540 +800035e0: 800035d0 .word 0x800035d0 +800035e4: 8000ee44 .word 0x8000ee44 +800035e8: 004b8b93 addi x23,x23,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800035ec: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800035f0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x0a4e3398 +800035f4: 0007a683 lw x13,0(x15) +800035f8: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x933565ed +800035fc: 0007ad03 lw x26,0(x15) +80003600: 00478793 addi x15,x15,4 + +80003604 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b13: + sha512sum0r x13, x13, x26 # perform operation +80003604: 51a686b3 sha512sum0r x13,x13,x26 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zknh_sha512sum0r_cg_cmp_rd_rs1_b13, Zknh_sha512sum0r_cg_cmp_rd_rs1_b13_str) +80003608: 000ba203 lw x4,0(x23) +8000360c: 00d20863 beq x4,x13,8000361c +80003610: 6f1012ef jal x5,80005500 +80003614: 80003604 .word 0x80003604 +80003618: 8000ee83 .word 0x8000ee83 +8000361c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x92a16c8c +80003620: 0007a703 lw x14,0(x15) +80003624: 00478793 addi x15,x15,4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x2dc6321c +80003628: 0007a883 lw x17,0(x15) +8000362c: 00478793 addi x15,x15,4 + +80003630 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b14: + sha512sum0r x14, x14, x17 # perform operation +80003630: 51170733 sha512sum0r x14,x14,x17 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zknh_sha512sum0r_cg_cmp_rd_rs1_b14, Zknh_sha512sum0r_cg_cmp_rd_rs1_b14_str) +80003634: 000ba203 lw x4,0(x23) +80003638: 00e20863 beq x4,x14,80003648 +8000363c: 6c5012ef jal x5,80005500 +80003640: 80003630 .word 0x80003630 +80003644: 8000eec2 .word 0x8000eec2 +80003648: 004b8b93 addi x23,x23,4 + + mv x26, x15 # switch data pointer register to avoid conflict with test +8000364c: 00078d13 addi x26,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x8a0cb1a6 +80003650: 000d2783 lw x15,0(x26) +80003654: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0xcc698da6 +80003658: 000d2503 lw x10,0(x26) +8000365c: 004d0d13 addi x26,x26,4 + +80003660 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b15: + sha512sum0r x15, x15, x10 # perform operation +80003660: 50a787b3 sha512sum0r x15,x15,x10 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknh_sha512sum0r_cg_cmp_rd_rs1_b15, Zknh_sha512sum0r_cg_cmp_rd_rs1_b15_str) +80003664: 000ba203 lw x4,0(x23) +80003668: 00f20863 beq x4,x15,80003678 +8000366c: 695012ef jal x5,80005500 +80003670: 80003660 .word 0x80003660 +80003674: 8000ef01 .word 0x8000ef01 +80003678: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x14d48b0c +8000367c: 000d2803 lw x16,0(x26) +80003680: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xd569fcb6 +80003684: 000d2703 lw x14,0(x26) +80003688: 004d0d13 addi x26,x26,4 + +8000368c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b16: + sha512sum0r x16, x16, x14 # perform operation +8000368c: 50e80833 sha512sum0r x16,x16,x14 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zknh_sha512sum0r_cg_cmp_rd_rs1_b16, Zknh_sha512sum0r_cg_cmp_rd_rs1_b16_str) +80003690: 000ba203 lw x4,0(x23) +80003694: 01020863 beq x4,x16,800036a4 +80003698: 669012ef jal x5,80005500 +8000369c: 8000368c .word 0x8000368c +800036a0: 8000ef40 .word 0x8000ef40 +800036a4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x096f0654 +800036a8: 000d2883 lw x17,0(x26) +800036ac: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xfdf221d0 +800036b0: 000d2483 lw x9,0(x26) +800036b4: 004d0d13 addi x26,x26,4 + +800036b8 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b17: + sha512sum0r x17, x17, x9 # perform operation +800036b8: 509888b3 sha512sum0r x17,x17,x9 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zknh_sha512sum0r_cg_cmp_rd_rs1_b17, Zknh_sha512sum0r_cg_cmp_rd_rs1_b17_str) +800036bc: 000ba203 lw x4,0(x23) +800036c0: 01120863 beq x4,x17,800036d0 +800036c4: 63d012ef jal x5,80005500 +800036c8: 800036b8 .word 0x800036b8 +800036cc: 8000ef7f .word 0x8000ef7f +800036d0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x4ca4b70a +800036d4: 000d2903 lw x18,0(x26) +800036d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x208667f5 +800036dc: 000d2483 lw x9,0(x26) +800036e0: 004d0d13 addi x26,x26,4 + +800036e4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b18: + sha512sum0r x18, x18, x9 # perform operation +800036e4: 50990933 sha512sum0r x18,x18,x9 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zknh_sha512sum0r_cg_cmp_rd_rs1_b18, Zknh_sha512sum0r_cg_cmp_rd_rs1_b18_str) +800036e8: 000ba203 lw x4,0(x23) +800036ec: 01220863 beq x4,x18,800036fc +800036f0: 611012ef jal x5,80005500 +800036f4: 800036e4 .word 0x800036e4 +800036f8: 8000efbe .word 0x8000efbe +800036fc: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xe0566a42 +80003700: 000d2983 lw x19,0(x26) +80003704: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x804f911c +80003708: 000d2c03 lw x24,0(x26) +8000370c: 004d0d13 addi x26,x26,4 + +80003710 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b19: + sha512sum0r x19, x19, x24 # perform operation +80003710: 518989b3 sha512sum0r x19,x19,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknh_sha512sum0r_cg_cmp_rd_rs1_b19, Zknh_sha512sum0r_cg_cmp_rd_rs1_b19_str) +80003714: 000ba203 lw x4,0(x23) +80003718: 01320863 beq x4,x19,80003728 +8000371c: 5e5012ef jal x5,80005500 +80003720: 80003710 .word 0x80003710 +80003724: 8000effd .word 0x8000effd +80003728: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x22e28eb1 +8000372c: 000d2a03 lw x20,0(x26) +80003730: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x226984a6 +80003734: 000d2c03 lw x24,0(x26) +80003738: 004d0d13 addi x26,x26,4 + +8000373c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b20: + sha512sum0r x20, x20, x24 # perform operation +8000373c: 518a0a33 sha512sum0r x20,x20,x24 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zknh_sha512sum0r_cg_cmp_rd_rs1_b20, Zknh_sha512sum0r_cg_cmp_rd_rs1_b20_str) +80003740: 000ba203 lw x4,0(x23) +80003744: 01420863 beq x4,x20,80003754 +80003748: 5b9012ef jal x5,80005500 +8000374c: 8000373c .word 0x8000373c +80003750: 8000f03c .word 0x8000f03c +80003754: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x5d4c1dae +80003758: 000d2a83 lw x21,0(x26) +8000375c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x24149cd6 +80003760: 000d2a03 lw x20,0(x26) +80003764: 004d0d13 addi x26,x26,4 + +80003768 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b21: + sha512sum0r x21, x21, x20 # perform operation +80003768: 514a8ab3 sha512sum0r x21,x21,x20 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknh_sha512sum0r_cg_cmp_rd_rs1_b21, Zknh_sha512sum0r_cg_cmp_rd_rs1_b21_str) +8000376c: 000ba203 lw x4,0(x23) +80003770: 01520863 beq x4,x21,80003780 +80003774: 58d012ef jal x5,80005500 +80003778: 80003768 .word 0x80003768 +8000377c: 8000f07b .word 0x8000f07b +80003780: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x31e9ecf5 +80003784: 000d2b03 lw x22,0(x26) +80003788: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x42155aa2 +8000378c: 000d2e03 lw x28,0(x26) +80003790: 004d0d13 addi x26,x26,4 + +80003794 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b22: + sha512sum0r x22, x22, x28 # perform operation +80003794: 51cb0b33 sha512sum0r x22,x22,x28 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zknh_sha512sum0r_cg_cmp_rd_rs1_b22, Zknh_sha512sum0r_cg_cmp_rd_rs1_b22_str) +80003798: 000ba203 lw x4,0(x23) +8000379c: 01620863 beq x4,x22,800037ac +800037a0: 561012ef jal x5,80005500 +800037a4: 80003794 .word 0x80003794 +800037a8: 8000f0ba .word 0x8000f0ba +800037ac: 004b8b93 addi x23,x23,4 + + mv x16, x23 # switch signature pointer register to avoid conflict with test +800037b0: 000b8813 addi x16,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x5945b276 +800037b4: 000d2b83 lw x23,0(x26) +800037b8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x18e81be7 +800037bc: 000d2483 lw x9,0(x26) +800037c0: 004d0d13 addi x26,x26,4 + +800037c4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b23: + sha512sum0r x23, x23, x9 # perform operation +800037c4: 509b8bb3 sha512sum0r x23,x23,x9 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rd_rs1_b23, Zknh_sha512sum0r_cg_cmp_rd_rs1_b23_str) +800037c8: 00082203 lw x4,0(x16) +800037cc: 01720863 beq x4,x23,800037dc +800037d0: 531012ef jal x5,80005500 +800037d4: 800037c4 .word 0x800037c4 +800037d8: 8000f0f9 .word 0x8000f0f9 +800037dc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x48fc30d9 +800037e0: 000d2c03 lw x24,0(x26) +800037e4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x4d67f663 +800037e8: 000d2603 lw x12,0(x26) +800037ec: 004d0d13 addi x26,x26,4 + +800037f0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b24: + sha512sum0r x24, x24, x12 # perform operation +800037f0: 50cc0c33 sha512sum0r x24,x24,x12 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknh_sha512sum0r_cg_cmp_rd_rs1_b24, Zknh_sha512sum0r_cg_cmp_rd_rs1_b24_str) +800037f4: 00082203 lw x4,0(x16) +800037f8: 01820863 beq x4,x24,80003808 +800037fc: 505012ef jal x5,80005500 +80003800: 800037f0 .word 0x800037f0 +80003804: 8000f138 .word 0x8000f138 +80003808: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xcef4c03c +8000380c: 000d2c83 lw x25,0(x26) +80003810: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xf6885d03 +80003814: 000d2883 lw x17,0(x26) +80003818: 004d0d13 addi x26,x26,4 + +8000381c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b25: + sha512sum0r x25, x25, x17 # perform operation +8000381c: 511c8cb3 sha512sum0r x25,x25,x17 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknh_sha512sum0r_cg_cmp_rd_rs1_b25, Zknh_sha512sum0r_cg_cmp_rd_rs1_b25_str) +80003820: 00082203 lw x4,0(x16) +80003824: 01920863 beq x4,x25,80003834 +80003828: 4d9012ef jal x5,80005500 +8000382c: 8000381c .word 0x8000381c +80003830: 8000f177 .word 0x8000f177 +80003834: 00480813 addi x16,x16,4 + + mv x27, x26 # switch data pointer register to avoid conflict with test +80003838: 000d0d93 addi x27,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x8121c9cc +8000383c: 000dad03 lw x26,0(x27) +80003840: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x2592b3b7 +80003844: 000da783 lw x15,0(x27) +80003848: 004d8d93 addi x27,x27,4 + +8000384c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b26: + sha512sum0r x26, x26, x15 # perform operation +8000384c: 50fd0d33 sha512sum0r x26,x26,x15 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknh_sha512sum0r_cg_cmp_rd_rs1_b26, Zknh_sha512sum0r_cg_cmp_rd_rs1_b26_str) +80003850: 00082203 lw x4,0(x16) +80003854: 01a20863 beq x4,x26,80003864 +80003858: 4a9012ef jal x5,80005500 +8000385c: 8000384c .word 0x8000384c +80003860: 8000f1b6 .word 0x8000f1b6 +80003864: 00480813 addi x16,x16,4 + + mv x1, x27 # switch data pointer register to avoid conflict with test +80003868: 000d8093 addi x1,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xc511d500 +8000386c: 0000ad83 lw x27,0(x1) +80003870: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x91f3eb81 +80003874: 0000ac83 lw x25,0(x1) +80003878: 00408093 addi x1,x1,4 + +8000387c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b27: + sha512sum0r x27, x27, x25 # perform operation +8000387c: 519d8db3 sha512sum0r x27,x27,x25 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknh_sha512sum0r_cg_cmp_rd_rs1_b27, Zknh_sha512sum0r_cg_cmp_rd_rs1_b27_str) +80003880: 00082203 lw x4,0(x16) +80003884: 01b20863 beq x4,x27,80003894 +80003888: 479012ef jal x5,80005500 +8000388c: 8000387c .word 0x8000387c +80003890: 8000f1f5 .word 0x8000f1f5 +80003894: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x162e05bb +80003898: 0000ae03 lw x28,0(x1) +8000389c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x2318c568 +800038a0: 0000a403 lw x8,0(x1) +800038a4: 00408093 addi x1,x1,4 + +800038a8 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b28: + sha512sum0r x28, x28, x8 # perform operation +800038a8: 508e0e33 sha512sum0r x28,x28,x8 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknh_sha512sum0r_cg_cmp_rd_rs1_b28, Zknh_sha512sum0r_cg_cmp_rd_rs1_b28_str) +800038ac: 00082203 lw x4,0(x16) +800038b0: 01c20863 beq x4,x28,800038c0 +800038b4: 44d012ef jal x5,80005500 +800038b8: 800038a8 .word 0x800038a8 +800038bc: 8000f234 .word 0x8000f234 +800038c0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x33095fe3 +800038c4: 0000ae83 lw x29,0(x1) +800038c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xf3bcd51b +800038cc: 0000ab03 lw x22,0(x1) +800038d0: 00408093 addi x1,x1,4 + +800038d4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b29: + sha512sum0r x29, x29, x22 # perform operation +800038d4: 516e8eb3 sha512sum0r x29,x29,x22 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknh_sha512sum0r_cg_cmp_rd_rs1_b29, Zknh_sha512sum0r_cg_cmp_rd_rs1_b29_str) +800038d8: 00082203 lw x4,0(x16) +800038dc: 01d20863 beq x4,x29,800038ec +800038e0: 421012ef jal x5,80005500 +800038e4: 800038d4 .word 0x800038d4 +800038e8: 8000f273 .word 0x8000f273 +800038ec: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x18bc4f1e +800038f0: 0000af03 lw x30,0(x1) +800038f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xdb2df450 +800038f8: 0000a383 lw x7,0(x1) +800038fc: 00408093 addi x1,x1,4 + +80003900 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b30: + sha512sum0r x30, x30, x7 # perform operation +80003900: 507f0f33 sha512sum0r x30,x30,x7 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknh_sha512sum0r_cg_cmp_rd_rs1_b30, Zknh_sha512sum0r_cg_cmp_rd_rs1_b30_str) +80003904: 00082203 lw x4,0(x16) +80003908: 01e20863 beq x4,x30,80003918 +8000390c: 3f5012ef jal x5,80005500 +80003910: 80003900 .word 0x80003900 +80003914: 8000f2b2 .word 0x8000f2b2 +80003918: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x2a74afb3 +8000391c: 0000af83 lw x31,0(x1) +80003920: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x26450a00 +80003924: 0000a483 lw x9,0(x1) +80003928: 00408093 addi x1,x1,4 + +8000392c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_b31: + sha512sum0r x31, x31, x9 # perform operation +8000392c: 509f8fb3 sha512sum0r x31,x31,x9 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknh_sha512sum0r_cg_cmp_rd_rs1_b31, Zknh_sha512sum0r_cg_cmp_rd_rs1_b31_str) +80003930: 00082203 lw x4,0(x16) +80003934: 01f20863 beq x4,x31,80003944 +80003938: 3c9012ef jal x5,80005500 +8000393c: 8000392c .word 0x8000392c +80003940: 8000f2f1 .word 0x8000f2f1 +80003944: 00480813 addi x16,x16,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x5cc98817 +80003948: 0000af03 lw x30,0(x1) +8000394c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x7ae7e28b +80003950: 0000a003 lw x0,0(x1) +80003954: 00408093 addi x1,x1,4 + +80003958 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b0: + sha512sum0r x0, x30, x0 # perform operation +80003958: 500f0033 sha512sum0r x0,x30,x0 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zknh_sha512sum0r_cg_cmp_rd_rs2_b0, Zknh_sha512sum0r_cg_cmp_rd_rs2_b0_str) +8000395c: 00082203 lw x4,0(x16) +80003960: 00020863 beq x4,x0,80003970 +80003964: 39d012ef jal x5,80005500 +80003968: 80003958 .word 0x80003958 +8000396c: 8000f330 .word 0x8000f330 +80003970: 00480813 addi x16,x16,4 + + mv x27, x1 # switch data pointer register to avoid conflict with test +80003974: 00008d93 addi x27,x1,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0x69390938 +80003978: 000da003 lw x0,0(x27) +8000397c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0xe6dd5368 +80003980: 000da083 lw x1,0(x27) +80003984: 004d8d93 addi x27,x27,4 + +80003988 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b1: + sha512sum0r x1, x0, x1 # perform operation +80003988: 501000b3 sha512sum0r x1,x0,x1 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknh_sha512sum0r_cg_cmp_rd_rs2_b1, Zknh_sha512sum0r_cg_cmp_rd_rs2_b1_str) +8000398c: 00082203 lw x4,0(x16) +80003990: 00120863 beq x4,x1,800039a0 +80003994: 36d012ef jal x5,80005500 +80003998: 80003988 .word 0x80003988 +8000399c: 8000f36e .word 0x8000f36e +800039a0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xba124d9c +800039a4: 000dac03 lw x24,0(x27) +800039a8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0x1d5bc8ad +800039ac: 000da103 lw x2,0(x27) +800039b0: 004d8d93 addi x27,x27,4 + +800039b4 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b2: + sha512sum0r x2, x24, x2 # perform operation +800039b4: 502c0133 sha512sum0r x2,x24,x2 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknh_sha512sum0r_cg_cmp_rd_rs2_b2, Zknh_sha512sum0r_cg_cmp_rd_rs2_b2_str) +800039b8: 00082203 lw x4,0(x16) +800039bc: 00220863 beq x4,x2,800039cc +800039c0: 341012ef jal x5,80005500 +800039c4: 800039b4 .word 0x800039b4 +800039c8: 8000f3ac .word 0x8000f3ac +800039cc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x191fceea +800039d0: 000daf03 lw x30,0(x27) +800039d4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0x103874b6 +800039d8: 000da183 lw x3,0(x27) +800039dc: 004d8d93 addi x27,x27,4 + +800039e0 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b3: + sha512sum0r x3, x30, x3 # perform operation +800039e0: 503f01b3 sha512sum0r x3,x30,x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknh_sha512sum0r_cg_cmp_rd_rs2_b3, Zknh_sha512sum0r_cg_cmp_rd_rs2_b3_str) +800039e4: 00082203 lw x4,0(x16) +800039e8: 00320863 beq x4,x3,800039f8 +800039ec: 315012ef jal x5,80005500 +800039f0: 800039e0 .word 0x800039e0 +800039f4: 8000f3ea .word 0x8000f3ea +800039f8: 00480813 addi x16,x16,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800039fc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003a00: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0xca8867ab +80003a04: 000da383 lw x7,0(x27) +80003a08: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs2: x4 = 0x0f55b56d +80003a0c: 000da203 lw x4,0(x27) +80003a10: 004d8d93 addi x27,x27,4 + +80003a14 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b4: + sha512sum0r x4, x7, x4 # perform operation +80003a14: 50438233 sha512sum0r x4,x7,x4 + # Check if x4 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x4, Zknh_sha512sum0r_cg_cmp_rd_rs2_b4, Zknh_sha512sum0r_cg_cmp_rd_rs2_b4_str) +80003a18: 00082683 lw x13,0(x16) +80003a1c: 00468863 beq x13,x4,80003a2c +80003a20: 3210176f jal x14,80005540 +80003a24: 80003a14 .word 0x80003a14 +80003a28: 8000f428 .word 0x8000f428 +80003a2c: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x481a9459 +80003a30: 000da583 lw x11,0(x27) +80003a34: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0xed66c593 +80003a38: 000da283 lw x5,0(x27) +80003a3c: 004d8d93 addi x27,x27,4 + +80003a40 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b5: + sha512sum0r x5, x11, x5 # perform operation +80003a40: 505582b3 sha512sum0r x5,x11,x5 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zknh_sha512sum0r_cg_cmp_rd_rs2_b5, Zknh_sha512sum0r_cg_cmp_rd_rs2_b5_str) +80003a44: 00082683 lw x13,0(x16) +80003a48: 00568863 beq x13,x5,80003a58 +80003a4c: 2f50176f jal x14,80005540 +80003a50: 80003a40 .word 0x80003a40 +80003a54: 8000f466 .word 0x8000f466 +80003a58: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0xcbe741b5 +80003a5c: 000da503 lw x10,0(x27) +80003a60: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0x16ca6387 +80003a64: 000da303 lw x6,0(x27) +80003a68: 004d8d93 addi x27,x27,4 + +80003a6c : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b6: + sha512sum0r x6, x10, x6 # perform operation +80003a6c: 50650333 sha512sum0r x6,x10,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x6, Zknh_sha512sum0r_cg_cmp_rd_rs2_b6, Zknh_sha512sum0r_cg_cmp_rd_rs2_b6_str) +80003a70: 00082683 lw x13,0(x16) +80003a74: 00668863 beq x13,x6,80003a84 +80003a78: 2c90176f jal x14,80005540 +80003a7c: 80003a6c .word 0x80003a6c +80003a80: 8000f4a4 .word 0x8000f4a4 +80003a84: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x5e00df9e +80003a88: 000da403 lw x8,0(x27) +80003a8c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs2: x7 = 0x4bc06079 +80003a90: 000da383 lw x7,0(x27) +80003a94: 004d8d93 addi x27,x27,4 + +80003a98 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b7: + sha512sum0r x7, x8, x7 # perform operation +80003a98: 507403b3 sha512sum0r x7,x8,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zknh_sha512sum0r_cg_cmp_rd_rs2_b7, Zknh_sha512sum0r_cg_cmp_rd_rs2_b7_str) +80003a9c: 00082683 lw x13,0(x16) +80003aa0: 00768863 beq x13,x7,80003ab0 +80003aa4: 29d0176f jal x14,80005540 +80003aa8: 80003a98 .word 0x80003a98 +80003aac: 8000f4e2 .word 0x8000f4e2 +80003ab0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x41868d6c +80003ab4: 000dab03 lw x22,0(x27) +80003ab8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0x43dc38ef +80003abc: 000da403 lw x8,0(x27) +80003ac0: 004d8d93 addi x27,x27,4 + +80003ac4 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b8: + sha512sum0r x8, x22, x8 # perform operation +80003ac4: 508b0433 sha512sum0r x8,x22,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zknh_sha512sum0r_cg_cmp_rd_rs2_b8, Zknh_sha512sum0r_cg_cmp_rd_rs2_b8_str) +80003ac8: 00082683 lw x13,0(x16) +80003acc: 00868863 beq x13,x8,80003adc +80003ad0: 2710176f jal x14,80005540 +80003ad4: 80003ac4 .word 0x80003ac4 +80003ad8: 8000f520 .word 0x8000f520 +80003adc: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xeff6e1df +80003ae0: 000dac03 lw x24,0(x27) +80003ae4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0x23e84963 +80003ae8: 000da483 lw x9,0(x27) +80003aec: 004d8d93 addi x27,x27,4 + +80003af0 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b9: + sha512sum0r x9, x24, x9 # perform operation +80003af0: 509c04b3 sha512sum0r x9,x24,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zknh_sha512sum0r_cg_cmp_rd_rs2_b9, Zknh_sha512sum0r_cg_cmp_rd_rs2_b9_str) +80003af4: 00082683 lw x13,0(x16) +80003af8: 00968863 beq x13,x9,80003b08 +80003afc: 2450176f jal x14,80005540 +80003b00: 80003af0 .word 0x80003af0 +80003b04: 8000f55e .word 0x8000f55e +80003b08: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x23053606 +80003b0c: 000da483 lw x9,0(x27) +80003b10: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0x3b5b829f +80003b14: 000da503 lw x10,0(x27) +80003b18: 004d8d93 addi x27,x27,4 + +80003b1c : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b10: + sha512sum0r x10, x9, x10 # perform operation +80003b1c: 50a48533 sha512sum0r x10,x9,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zknh_sha512sum0r_cg_cmp_rd_rs2_b10, Zknh_sha512sum0r_cg_cmp_rd_rs2_b10_str) +80003b20: 00082683 lw x13,0(x16) +80003b24: 00a68863 beq x13,x10,80003b34 +80003b28: 2190176f jal x14,80005540 +80003b2c: 80003b1c .word 0x80003b1c +80003b30: 8000f59c .word 0x8000f59c +80003b34: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x0b741e71 +80003b38: 000dad03 lw x26,0(x27) +80003b3c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x522f2833 +80003b40: 000da583 lw x11,0(x27) +80003b44: 004d8d93 addi x27,x27,4 + +80003b48 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b11: + sha512sum0r x11, x26, x11 # perform operation +80003b48: 50bd05b3 sha512sum0r x11,x26,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zknh_sha512sum0r_cg_cmp_rd_rs2_b11, Zknh_sha512sum0r_cg_cmp_rd_rs2_b11_str) +80003b4c: 00082683 lw x13,0(x16) +80003b50: 00b68863 beq x13,x11,80003b60 +80003b54: 1ed0176f jal x14,80005540 +80003b58: 80003b48 .word 0x80003b48 +80003b5c: 8000f5db .word 0x8000f5db +80003b60: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0xa6d036c4 +80003b64: 000daf03 lw x30,0(x27) +80003b68: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x6c0254d9 +80003b6c: 000da603 lw x12,0(x27) +80003b70: 004d8d93 addi x27,x27,4 + +80003b74 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b12: + sha512sum0r x12, x30, x12 # perform operation +80003b74: 50cf0633 sha512sum0r x12,x30,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zknh_sha512sum0r_cg_cmp_rd_rs2_b12, Zknh_sha512sum0r_cg_cmp_rd_rs2_b12_str) +80003b78: 00082683 lw x13,0(x16) +80003b7c: 00c68863 beq x13,x12,80003b8c +80003b80: 1c10176f jal x14,80005540 +80003b84: 80003b74 .word 0x80003b74 +80003b88: 8000f61a .word 0x8000f61a +80003b8c: 00480813 addi x16,x16,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b90: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003b94: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x55a3fcb1 +80003b98: 000dad03 lw x26,0(x27) +80003b9c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xd06f75c5 +80003ba0: 000da683 lw x13,0(x27) +80003ba4: 004d8d93 addi x27,x27,4 + +80003ba8 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b13: + sha512sum0r x13, x26, x13 # perform operation +80003ba8: 50dd06b3 sha512sum0r x13,x26,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zknh_sha512sum0r_cg_cmp_rd_rs2_b13, Zknh_sha512sum0r_cg_cmp_rd_rs2_b13_str) +80003bac: 00082383 lw x7,0(x16) +80003bb0: 00d38863 beq x7,x13,80003bc0 +80003bb4: 1650146f jal x8,80005518 +80003bb8: 80003ba8 .word 0x80003ba8 +80003bbc: 8000f659 .word 0x8000f659 +80003bc0: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0x72f5cb06 +80003bc4: 000da003 lw x0,0(x27) +80003bc8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x5b7921ea +80003bcc: 000da703 lw x14,0(x27) +80003bd0: 004d8d93 addi x27,x27,4 + +80003bd4 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b14: + sha512sum0r x14, x0, x14 # perform operation +80003bd4: 50e00733 sha512sum0r x14,x0,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x14, Zknh_sha512sum0r_cg_cmp_rd_rs2_b14, Zknh_sha512sum0r_cg_cmp_rd_rs2_b14_str) +80003bd8: 00082383 lw x7,0(x16) +80003bdc: 00e38863 beq x7,x14,80003bec +80003be0: 1390146f jal x8,80005518 +80003be4: 80003bd4 .word 0x80003bd4 +80003be8: 8000f698 .word 0x8000f698 +80003bec: 00480813 addi x16,x16,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0x0d7324af +80003bf0: 000dae03 lw x28,0(x27) +80003bf4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x063afdf8 +80003bf8: 000da783 lw x15,0(x27) +80003bfc: 004d8d93 addi x27,x27,4 + +80003c00 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b15: + sha512sum0r x15, x28, x15 # perform operation +80003c00: 50fe07b3 sha512sum0r x15,x28,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x15, Zknh_sha512sum0r_cg_cmp_rd_rs2_b15, Zknh_sha512sum0r_cg_cmp_rd_rs2_b15_str) +80003c04: 00082383 lw x7,0(x16) +80003c08: 00f38863 beq x7,x15,80003c18 +80003c0c: 10d0146f jal x8,80005518 +80003c10: 80003c00 .word 0x80003c00 +80003c14: 8000f6d7 .word 0x8000f6d7 +80003c18: 00480813 addi x16,x16,4 + + mv x28, x16 # switch signature pointer register to avoid conflict with test +80003c1c: 00080e13 addi x28,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x554faaa1 +80003c20: 000dab83 lw x23,0(x27) +80003c24: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x2f1e2a3c +80003c28: 000da803 lw x16,0(x27) +80003c2c: 004d8d93 addi x27,x27,4 + +80003c30 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b16: + sha512sum0r x16, x23, x16 # perform operation +80003c30: 510b8833 sha512sum0r x16,x23,x16 + # Check if x16 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x16, Zknh_sha512sum0r_cg_cmp_rd_rs2_b16, Zknh_sha512sum0r_cg_cmp_rd_rs2_b16_str) +80003c34: 000e2383 lw x7,0(x28) +80003c38: 01038863 beq x7,x16,80003c48 +80003c3c: 0dd0146f jal x8,80005518 +80003c40: 80003c30 .word 0x80003c30 +80003c44: 8000f716 .word 0x8000f716 +80003c48: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0xaeea3e28 +80003c4c: 000daf83 lw x31,0(x27) +80003c50: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0xdcfbe50f +80003c54: 000da883 lw x17,0(x27) +80003c58: 004d8d93 addi x27,x27,4 + +80003c5c : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b17: + sha512sum0r x17, x31, x17 # perform operation +80003c5c: 511f88b3 sha512sum0r x17,x31,x17 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zknh_sha512sum0r_cg_cmp_rd_rs2_b17, Zknh_sha512sum0r_cg_cmp_rd_rs2_b17_str) +80003c60: 000e2383 lw x7,0(x28) +80003c64: 01138863 beq x7,x17,80003c74 +80003c68: 0b10146f jal x8,80005518 +80003c6c: 80003c5c .word 0x80003c5c +80003c70: 8000f755 .word 0x8000f755 +80003c74: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x14f3fd3b +80003c78: 000da583 lw x11,0(x27) +80003c7c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x957f4057 +80003c80: 000da903 lw x18,0(x27) +80003c84: 004d8d93 addi x27,x27,4 + +80003c88 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b18: + sha512sum0r x18, x11, x18 # perform operation +80003c88: 51258933 sha512sum0r x18,x11,x18 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zknh_sha512sum0r_cg_cmp_rd_rs2_b18, Zknh_sha512sum0r_cg_cmp_rd_rs2_b18_str) +80003c8c: 000e2383 lw x7,0(x28) +80003c90: 01238863 beq x7,x18,80003ca0 +80003c94: 0850146f jal x8,80005518 +80003c98: 80003c88 .word 0x80003c88 +80003c9c: 8000f794 .word 0x8000f794 +80003ca0: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs1: x4 = 0xc451dc5c +80003ca4: 000da203 lw x4,0(x27) +80003ca8: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0x37adadaf +80003cac: 000da983 lw x19,0(x27) +80003cb0: 004d8d93 addi x27,x27,4 + +80003cb4 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b19: + sha512sum0r x19, x4, x19 # perform operation +80003cb4: 513209b3 sha512sum0r x19,x4,x19 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zknh_sha512sum0r_cg_cmp_rd_rs2_b19, Zknh_sha512sum0r_cg_cmp_rd_rs2_b19_str) +80003cb8: 000e2383 lw x7,0(x28) +80003cbc: 01338863 beq x7,x19,80003ccc +80003cc0: 0590146f jal x8,80005518 +80003cc4: 80003cb4 .word 0x80003cb4 +80003cc8: 8000f7d3 .word 0x8000f7d3 +80003ccc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xd0dac232 +80003cd0: 000dab03 lw x22,0(x27) +80003cd4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x1394b85a +80003cd8: 000daa03 lw x20,0(x27) +80003cdc: 004d8d93 addi x27,x27,4 + +80003ce0 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b20: + sha512sum0r x20, x22, x20 # perform operation +80003ce0: 514b0a33 sha512sum0r x20,x22,x20 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zknh_sha512sum0r_cg_cmp_rd_rs2_b20, Zknh_sha512sum0r_cg_cmp_rd_rs2_b20_str) +80003ce4: 000e2383 lw x7,0(x28) +80003ce8: 01438863 beq x7,x20,80003cf8 +80003cec: 02d0146f jal x8,80005518 +80003cf0: 80003ce0 .word 0x80003ce0 +80003cf4: 8000f812 .word 0x8000f812 +80003cf8: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0xd2bd932f +80003cfc: 000da803 lw x16,0(x27) +80003d00: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x37923a88 +80003d04: 000daa83 lw x21,0(x27) +80003d08: 004d8d93 addi x27,x27,4 + +80003d0c : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b21: + sha512sum0r x21, x16, x21 # perform operation +80003d0c: 51580ab3 sha512sum0r x21,x16,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zknh_sha512sum0r_cg_cmp_rd_rs2_b21, Zknh_sha512sum0r_cg_cmp_rd_rs2_b21_str) +80003d10: 000e2383 lw x7,0(x28) +80003d14: 01538863 beq x7,x21,80003d24 +80003d18: 0010146f jal x8,80005518 +80003d1c: 80003d0c .word 0x80003d0c +80003d20: 8000f851 .word 0x8000f851 +80003d24: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x4150fec0 +80003d28: 000da903 lw x18,0(x27) +80003d2c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xb40025d3 +80003d30: 000dab03 lw x22,0(x27) +80003d34: 004d8d93 addi x27,x27,4 + +80003d38 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b22: + sha512sum0r x22, x18, x22 # perform operation +80003d38: 51690b33 sha512sum0r x22,x18,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zknh_sha512sum0r_cg_cmp_rd_rs2_b22, Zknh_sha512sum0r_cg_cmp_rd_rs2_b22_str) +80003d3c: 000e2383 lw x7,0(x28) +80003d40: 01638863 beq x7,x22,80003d50 +80003d44: 7d40146f jal x8,80005518 +80003d48: 80003d38 .word 0x80003d38 +80003d4c: 8000f890 .word 0x8000f890 +80003d50: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x7db39ac7 +80003d54: 000da783 lw x15,0(x27) +80003d58: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x183147d4 +80003d5c: 000dab83 lw x23,0(x27) +80003d60: 004d8d93 addi x27,x27,4 + +80003d64 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b23: + sha512sum0r x23, x15, x23 # perform operation +80003d64: 51778bb3 sha512sum0r x23,x15,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zknh_sha512sum0r_cg_cmp_rd_rs2_b23, Zknh_sha512sum0r_cg_cmp_rd_rs2_b23_str) +80003d68: 000e2383 lw x7,0(x28) +80003d6c: 01738863 beq x7,x23,80003d7c +80003d70: 7a80146f jal x8,80005518 +80003d74: 80003d64 .word 0x80003d64 +80003d78: 8000f8cf .word 0x8000f8cf +80003d7c: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x6157e990 +80003d80: 000da883 lw x17,0(x27) +80003d84: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0xa8effd62 +80003d88: 000dac03 lw x24,0(x27) +80003d8c: 004d8d93 addi x27,x27,4 + +80003d90 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b24: + sha512sum0r x24, x17, x24 # perform operation +80003d90: 51888c33 sha512sum0r x24,x17,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zknh_sha512sum0r_cg_cmp_rd_rs2_b24, Zknh_sha512sum0r_cg_cmp_rd_rs2_b24_str) +80003d94: 000e2383 lw x7,0(x28) +80003d98: 01838863 beq x7,x24,80003da8 +80003d9c: 77c0146f jal x8,80005518 +80003da0: 80003d90 .word 0x80003d90 +80003da4: 8000f90e .word 0x8000f90e +80003da8: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0xb112ed90 +80003dac: 000da103 lw x2,0(x27) +80003db0: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x84445d68 +80003db4: 000dac83 lw x25,0(x27) +80003db8: 004d8d93 addi x27,x27,4 + +80003dbc : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b25: + sha512sum0r x25, x2, x25 # perform operation +80003dbc: 51910cb3 sha512sum0r x25,x2,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknh_sha512sum0r_cg_cmp_rd_rs2_b25, Zknh_sha512sum0r_cg_cmp_rd_rs2_b25_str) +80003dc0: 000e2383 lw x7,0(x28) +80003dc4: 01938863 beq x7,x25,80003dd4 +80003dc8: 7500146f jal x8,80005518 +80003dcc: 80003dbc .word 0x80003dbc +80003dd0: 8000f94d .word 0x8000f94d +80003dd4: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0xe7c39af2 +80003dd8: 000da483 lw x9,0(x27) +80003ddc: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x867f1068 +80003de0: 000dad03 lw x26,0(x27) +80003de4: 004d8d93 addi x27,x27,4 + +80003de8 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b26: + sha512sum0r x26, x9, x26 # perform operation +80003de8: 51a48d33 sha512sum0r x26,x9,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zknh_sha512sum0r_cg_cmp_rd_rs2_b26, Zknh_sha512sum0r_cg_cmp_rd_rs2_b26_str) +80003dec: 000e2383 lw x7,0(x28) +80003df0: 01a38863 beq x7,x26,80003e00 +80003df4: 7240146f jal x8,80005518 +80003df8: 80003de8 .word 0x80003de8 +80003dfc: 8000f98c .word 0x8000f98c +80003e00: 004e0e13 addi x28,x28,4 + + mv x30, x27 # switch data pointer register to avoid conflict with test +80003e04: 000d8f13 addi x30,x27,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x427f6be2 +80003e08: 000f2903 lw x18,0(x30) +80003e0c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x6fcf5864 +80003e10: 000f2d83 lw x27,0(x30) +80003e14: 004f0f13 addi x30,x30,4 + +80003e18 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b27: + sha512sum0r x27, x18, x27 # perform operation +80003e18: 51b90db3 sha512sum0r x27,x18,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zknh_sha512sum0r_cg_cmp_rd_rs2_b27, Zknh_sha512sum0r_cg_cmp_rd_rs2_b27_str) +80003e1c: 000e2383 lw x7,0(x28) +80003e20: 01b38863 beq x7,x27,80003e30 +80003e24: 6f40146f jal x8,80005518 +80003e28: 80003e18 .word 0x80003e18 +80003e2c: 8000f9cb .word 0x8000f9cb +80003e30: 004e0e13 addi x28,x28,4 + + mv x24, x28 # switch signature pointer register to avoid conflict with test +80003e34: 000e0c13 addi x24,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x7a9b92c5 +80003e38: 000f2103 lw x2,0(x30) +80003e3c: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x72db0a28 +80003e40: 000f2e03 lw x28,0(x30) +80003e44: 004f0f13 addi x30,x30,4 + +80003e48 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b28: + sha512sum0r x28, x2, x28 # perform operation +80003e48: 51c10e33 sha512sum0r x28,x2,x28 + # Check if x28 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x28, Zknh_sha512sum0r_cg_cmp_rd_rs2_b28, Zknh_sha512sum0r_cg_cmp_rd_rs2_b28_str) +80003e4c: 000c2383 lw x7,0(x24) +80003e50: 01c38863 beq x7,x28,80003e60 +80003e54: 6c40146f jal x8,80005518 +80003e58: 80003e48 .word 0x80003e48 +80003e5c: 8000fa0a .word 0x8000fa0a +80003e60: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x286fadd5 +80003e64: 000f2883 lw x17,0(x30) +80003e68: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x8e49d13e +80003e6c: 000f2e83 lw x29,0(x30) +80003e70: 004f0f13 addi x30,x30,4 + +80003e74 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b29: + sha512sum0r x29, x17, x29 # perform operation +80003e74: 51d88eb3 sha512sum0r x29,x17,x29 + # Check if x29 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x29, Zknh_sha512sum0r_cg_cmp_rd_rs2_b29, Zknh_sha512sum0r_cg_cmp_rd_rs2_b29_str) +80003e78: 000c2383 lw x7,0(x24) +80003e7c: 01d38863 beq x7,x29,80003e8c +80003e80: 6980146f jal x8,80005518 +80003e84: 80003e74 .word 0x80003e74 +80003e88: 8000fa49 .word 0x8000fa49 +80003e8c: 004c0c13 addi x24,x24,4 + + mv x20, x30 # switch data pointer register to avoid conflict with test +80003e90: 000f0a13 addi x20,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x37c55bb0 +80003e94: 000a2803 lw x16,0(x20) +80003e98: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x62a61c8d +80003e9c: 000a2f03 lw x30,0(x20) +80003ea0: 004a0a13 addi x20,x20,4 + +80003ea4 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b30: + sha512sum0r x30, x16, x30 # perform operation +80003ea4: 51e80f33 sha512sum0r x30,x16,x30 + # Check if x30 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x30, Zknh_sha512sum0r_cg_cmp_rd_rs2_b30, Zknh_sha512sum0r_cg_cmp_rd_rs2_b30_str) +80003ea8: 000c2383 lw x7,0(x24) +80003eac: 01e38863 beq x7,x30,80003ebc +80003eb0: 6680146f jal x8,80005518 +80003eb4: 80003ea4 .word 0x80003ea4 +80003eb8: 8000fa88 .word 0x8000fa88 +80003ebc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x4483a8fc +80003ec0: 000a2203 lw x4,0(x20) +80003ec4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xb4a54a7b +80003ec8: 000a2f83 lw x31,0(x20) +80003ecc: 004a0a13 addi x20,x20,4 + +80003ed0 : +Zknh_sha512sum0r_cg_cmp_rd_rs2_b31: + sha512sum0r x31, x4, x31 # perform operation +80003ed0: 51f20fb3 sha512sum0r x31,x4,x31 + # Check if x31 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x31, Zknh_sha512sum0r_cg_cmp_rd_rs2_b31, Zknh_sha512sum0r_cg_cmp_rd_rs2_b31_str) +80003ed4: 000c2383 lw x7,0(x24) +80003ed8: 01f38863 beq x7,x31,80003ee8 +80003edc: 63c0146f jal x8,80005518 +80003ee0: 80003ed0 .word 0x80003ed0 +80003ee4: 8000fac7 .word 0x8000fac7 +80003ee8: 004c0c13 addi x24,x24,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x9ae17f07 +80003eec: 000a2003 lw x0,0(x20) +80003ef0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xc39ad75e +80003ef4: 000a2003 lw x0,0(x20) +80003ef8: 004a0a13 addi x20,x20,4 + +80003efc : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b0: + sha512sum0r x0, x0, x0 # perform operation +80003efc: 50000033 sha512sum0r x0,x0,x0 + # Check if x0 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x0, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b0_str) +80003f00: 000c2383 lw x7,0(x24) +80003f04: 00038863 beq x7,x0,80003f14 +80003f08: 6100146f jal x8,80005518 +80003f0c: 80003efc .word 0x80003efc +80003f10: 8000fb06 .word 0x8000fb06 +80003f14: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x06d8b6e7 +80003f18: 000a2083 lw x1,0(x20) +80003f1c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x950a4d06 +80003f20: 000a2083 lw x1,0(x20) +80003f24: 004a0a13 addi x20,x20,4 + +80003f28 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b1: + sha512sum0r x1, x1, x1 # perform operation +80003f28: 501080b3 sha512sum0r x1,x1,x1 + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b1_str) +80003f2c: 000c2383 lw x7,0(x24) +80003f30: 00138863 beq x7,x1,80003f40 +80003f34: 5e40146f jal x8,80005518 +80003f38: 80003f28 .word 0x80003f28 +80003f3c: 8000fb48 .word 0x8000fb48 +80003f40: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x783c9be6 +80003f44: 000a2103 lw x2,0(x20) +80003f48: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xdb168fbc +80003f4c: 000a2103 lw x2,0(x20) +80003f50: 004a0a13 addi x20,x20,4 + +80003f54 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b2: + sha512sum0r x2, x2, x2 # perform operation +80003f54: 50210133 sha512sum0r x2,x2,x2 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b2_str) +80003f58: 000c2383 lw x7,0(x24) +80003f5c: 00238863 beq x7,x2,80003f6c +80003f60: 5b80146f jal x8,80005518 +80003f64: 80003f54 .word 0x80003f54 +80003f68: 8000fb8a .word 0x8000fb8a +80003f6c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x231ec214 +80003f70: 000a2183 lw x3,0(x20) +80003f74: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xbb993a34 +80003f78: 000a2183 lw x3,0(x20) +80003f7c: 004a0a13 addi x20,x20,4 + +80003f80 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b3: + sha512sum0r x3, x3, x3 # perform operation +80003f80: 503181b3 sha512sum0r x3,x3,x3 + # Check if x3 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x3, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b3_str) +80003f84: 000c2383 lw x7,0(x24) +80003f88: 00338863 beq x7,x3,80003f98 +80003f8c: 58c0146f jal x8,80005518 +80003f90: 80003f80 .word 0x80003f80 +80003f94: 8000fbcc .word 0x8000fbcc +80003f98: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x3995d212 +80003f9c: 000a2203 lw x4,0(x20) +80003fa0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xda32f319 +80003fa4: 000a2203 lw x4,0(x20) +80003fa8: 004a0a13 addi x20,x20,4 + +80003fac : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b4: + sha512sum0r x4, x4, x4 # perform operation +80003fac: 50420233 sha512sum0r x4,x4,x4 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b4_str) +80003fb0: 000c2383 lw x7,0(x24) +80003fb4: 00438863 beq x7,x4,80003fc4 +80003fb8: 5600146f jal x8,80005518 +80003fbc: 80003fac .word 0x80003fac +80003fc0: 8000fc0e .word 0x8000fc0e +80003fc4: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x2fd85e54 +80003fc8: 000a2283 lw x5,0(x20) +80003fcc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x87e8b151 +80003fd0: 000a2283 lw x5,0(x20) +80003fd4: 004a0a13 addi x20,x20,4 + +80003fd8 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b5: + sha512sum0r x5, x5, x5 # perform operation +80003fd8: 505282b3 sha512sum0r x5,x5,x5 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b5_str) +80003fdc: 000c2383 lw x7,0(x24) +80003fe0: 00538863 beq x7,x5,80003ff0 +80003fe4: 5340146f jal x8,80005518 +80003fe8: 80003fd8 .word 0x80003fd8 +80003fec: 8000fc50 .word 0x8000fc50 +80003ff0: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x056be73e +80003ff4: 000a2303 lw x6,0(x20) +80003ff8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x62342e79 +80003ffc: 000a2303 lw x6,0(x20) +80004000: 004a0a13 addi x20,x20,4 + +80004004 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b6: + sha512sum0r x6, x6, x6 # perform operation +80004004: 50630333 sha512sum0r x6,x6,x6 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b6_str) +80004008: 000c2383 lw x7,0(x24) +8000400c: 00638863 beq x7,x6,8000401c +80004010: 5080146f jal x8,80005518 +80004014: 80004004 .word 0x80004004 +80004018: 8000fc92 .word 0x8000fc92 +8000401c: 004c0c13 addi x24,x24,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004020: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80004024: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x6316015a +80004028: 000a2383 lw x7,0(x20) +8000402c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x2f77e47a +80004030: 000a2383 lw x7,0(x20) +80004034: 004a0a13 addi x20,x20,4 + +80004038 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b7: + sha512sum0r x7, x7, x7 # perform operation +80004038: 507383b3 sha512sum0r x7,x7,x7 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b7_str) +8000403c: 000c2203 lw x4,0(x24) +80004040: 00720863 beq x4,x7,80004050 +80004044: 4bc012ef jal x5,80005500 +80004048: 80004038 .word 0x80004038 +8000404c: 8000fcd4 .word 0x8000fcd4 +80004050: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x003feb77 +80004054: 000a2403 lw x8,0(x20) +80004058: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xe3db4d68 +8000405c: 000a2403 lw x8,0(x20) +80004060: 004a0a13 addi x20,x20,4 + +80004064 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b8: + sha512sum0r x8, x8, x8 # perform operation +80004064: 50840433 sha512sum0r x8,x8,x8 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b8_str) +80004068: 000c2203 lw x4,0(x24) +8000406c: 00820863 beq x4,x8,8000407c +80004070: 490012ef jal x5,80005500 +80004074: 80004064 .word 0x80004064 +80004078: 8000fd16 .word 0x8000fd16 +8000407c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xf9077b8c +80004080: 000a2483 lw x9,0(x20) +80004084: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xe1d37f67 +80004088: 000a2483 lw x9,0(x20) +8000408c: 004a0a13 addi x20,x20,4 + +80004090 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b9: + sha512sum0r x9, x9, x9 # perform operation +80004090: 509484b3 sha512sum0r x9,x9,x9 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b9_str) +80004094: 000c2203 lw x4,0(x24) +80004098: 00920863 beq x4,x9,800040a8 +8000409c: 464012ef jal x5,80005500 +800040a0: 80004090 .word 0x80004090 +800040a4: 8000fd58 .word 0x8000fd58 +800040a8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x9e7f3197 +800040ac: 000a2503 lw x10,0(x20) +800040b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xaa8910a9 +800040b4: 000a2503 lw x10,0(x20) +800040b8: 004a0a13 addi x20,x20,4 + +800040bc : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b10: + sha512sum0r x10, x10, x10 # perform operation +800040bc: 50a50533 sha512sum0r x10,x10,x10 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b10_str) +800040c0: 000c2203 lw x4,0(x24) +800040c4: 00a20863 beq x4,x10,800040d4 +800040c8: 438012ef jal x5,80005500 +800040cc: 800040bc .word 0x800040bc +800040d0: 8000fd9a .word 0x8000fd9a +800040d4: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x73ec7ae3 +800040d8: 000a2583 lw x11,0(x20) +800040dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x18b55812 +800040e0: 000a2583 lw x11,0(x20) +800040e4: 004a0a13 addi x20,x20,4 + +800040e8 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b11: + sha512sum0r x11, x11, x11 # perform operation +800040e8: 50b585b3 sha512sum0r x11,x11,x11 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b11_str) +800040ec: 000c2203 lw x4,0(x24) +800040f0: 00b20863 beq x4,x11,80004100 +800040f4: 40c012ef jal x5,80005500 +800040f8: 800040e8 .word 0x800040e8 +800040fc: 8000fddd .word 0x8000fddd +80004100: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x3262fe1e +80004104: 000a2603 lw x12,0(x20) +80004108: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xb321acb6 +8000410c: 000a2603 lw x12,0(x20) +80004110: 004a0a13 addi x20,x20,4 + +80004114 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b12: + sha512sum0r x12, x12, x12 # perform operation +80004114: 50c60633 sha512sum0r x12,x12,x12 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b12_str) +80004118: 000c2203 lw x4,0(x24) +8000411c: 00c20863 beq x4,x12,8000412c +80004120: 3e0012ef jal x5,80005500 +80004124: 80004114 .word 0x80004114 +80004128: 8000fe20 .word 0x8000fe20 +8000412c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xdf017813 +80004130: 000a2683 lw x13,0(x20) +80004134: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x9eda6313 +80004138: 000a2683 lw x13,0(x20) +8000413c: 004a0a13 addi x20,x20,4 + +80004140 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b13: + sha512sum0r x13, x13, x13 # perform operation +80004140: 50d686b3 sha512sum0r x13,x13,x13 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b13_str) +80004144: 000c2203 lw x4,0(x24) +80004148: 00d20863 beq x4,x13,80004158 +8000414c: 3b4012ef jal x5,80005500 +80004150: 80004140 .word 0x80004140 +80004154: 8000fe63 .word 0x8000fe63 +80004158: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x78cde784 +8000415c: 000a2703 lw x14,0(x20) +80004160: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x5900b4d3 +80004164: 000a2703 lw x14,0(x20) +80004168: 004a0a13 addi x20,x20,4 + +8000416c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b14: + sha512sum0r x14, x14, x14 # perform operation +8000416c: 50e70733 sha512sum0r x14,x14,x14 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b14_str) +80004170: 000c2203 lw x4,0(x24) +80004174: 00e20863 beq x4,x14,80004184 +80004178: 388012ef jal x5,80005500 +8000417c: 8000416c .word 0x8000416c +80004180: 8000fea6 .word 0x8000fea6 +80004184: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xebb5907c +80004188: 000a2783 lw x15,0(x20) +8000418c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xc44e9daa +80004190: 000a2783 lw x15,0(x20) +80004194: 004a0a13 addi x20,x20,4 + +80004198 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b15: + sha512sum0r x15, x15, x15 # perform operation +80004198: 50f787b3 sha512sum0r x15,x15,x15 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b15_str) +8000419c: 000c2203 lw x4,0(x24) +800041a0: 00f20863 beq x4,x15,800041b0 +800041a4: 35c012ef jal x5,80005500 +800041a8: 80004198 .word 0x80004198 +800041ac: 8000fee9 .word 0x8000fee9 +800041b0: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x575b11ba +800041b4: 000a2803 lw x16,0(x20) +800041b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xb85be479 +800041bc: 000a2803 lw x16,0(x20) +800041c0: 004a0a13 addi x20,x20,4 + +800041c4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b16: + sha512sum0r x16, x16, x16 # perform operation +800041c4: 51080833 sha512sum0r x16,x16,x16 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b16_str) +800041c8: 000c2203 lw x4,0(x24) +800041cc: 01020863 beq x4,x16,800041dc +800041d0: 330012ef jal x5,80005500 +800041d4: 800041c4 .word 0x800041c4 +800041d8: 8000ff2c .word 0x8000ff2c +800041dc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xc1ab34b2 +800041e0: 000a2883 lw x17,0(x20) +800041e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xa5d58906 +800041e8: 000a2883 lw x17,0(x20) +800041ec: 004a0a13 addi x20,x20,4 + +800041f0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b17: + sha512sum0r x17, x17, x17 # perform operation +800041f0: 511888b3 sha512sum0r x17,x17,x17 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b17_str) +800041f4: 000c2203 lw x4,0(x24) +800041f8: 01120863 beq x4,x17,80004208 +800041fc: 304012ef jal x5,80005500 +80004200: 800041f0 .word 0x800041f0 +80004204: 8000ff6f .word 0x8000ff6f +80004208: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xb5b916ca +8000420c: 000a2903 lw x18,0(x20) +80004210: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x7383a3de +80004214: 000a2903 lw x18,0(x20) +80004218: 004a0a13 addi x20,x20,4 + +8000421c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b18: + sha512sum0r x18, x18, x18 # perform operation +8000421c: 51290933 sha512sum0r x18,x18,x18 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b18_str) +80004220: 000c2203 lw x4,0(x24) +80004224: 01220863 beq x4,x18,80004234 +80004228: 2d8012ef jal x5,80005500 +8000422c: 8000421c .word 0x8000421c +80004230: 8000ffb2 .word 0x8000ffb2 +80004234: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x5e148b31 +80004238: 000a2983 lw x19,0(x20) +8000423c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xcbbdfe74 +80004240: 000a2983 lw x19,0(x20) +80004244: 004a0a13 addi x20,x20,4 + +80004248 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b19: + sha512sum0r x19, x19, x19 # perform operation +80004248: 513989b3 sha512sum0r x19,x19,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b19_str) +8000424c: 000c2203 lw x4,0(x24) +80004250: 01320863 beq x4,x19,80004260 +80004254: 2ac012ef jal x5,80005500 +80004258: 80004248 .word 0x80004248 +8000425c: 8000fff5 .word 0x8000fff5 +80004260: 004c0c13 addi x24,x24,4 + + mv x31, x20 # switch data pointer register to avoid conflict with test +80004264: 000a0f93 addi x31,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x41257e27 +80004268: 000faa03 lw x20,0(x31) +8000426c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x8bde628f +80004270: 000faa03 lw x20,0(x31) +80004274: 004f8f93 addi x31,x31,4 + +80004278 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b20: + sha512sum0r x20, x20, x20 # perform operation +80004278: 514a0a33 sha512sum0r x20,x20,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b20_str) +8000427c: 000c2203 lw x4,0(x24) +80004280: 01420863 beq x4,x20,80004290 +80004284: 27c012ef jal x5,80005500 +80004288: 80004278 .word 0x80004278 +8000428c: 80010038 .word 0x80010038 +80004290: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xdcfa5983 +80004294: 000faa83 lw x21,0(x31) +80004298: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0x45bce3f8 +8000429c: 000faa83 lw x21,0(x31) +800042a0: 004f8f93 addi x31,x31,4 + +800042a4 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b21: + sha512sum0r x21, x21, x21 # perform operation +800042a4: 515a8ab3 sha512sum0r x21,x21,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b21_str) +800042a8: 000c2203 lw x4,0(x24) +800042ac: 01520863 beq x4,x21,800042bc +800042b0: 250012ef jal x5,80005500 +800042b4: 800042a4 .word 0x800042a4 +800042b8: 8001007b .word 0x8001007b +800042bc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xd703c102 +800042c0: 000fab03 lw x22,0(x31) +800042c4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0xe4435fe2 +800042c8: 000fab03 lw x22,0(x31) +800042cc: 004f8f93 addi x31,x31,4 + +800042d0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b22: + sha512sum0r x22, x22, x22 # perform operation +800042d0: 516b0b33 sha512sum0r x22,x22,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b22_str) +800042d4: 000c2203 lw x4,0(x24) +800042d8: 01620863 beq x4,x22,800042e8 +800042dc: 224012ef jal x5,80005500 +800042e0: 800042d0 .word 0x800042d0 +800042e4: 800100be .word 0x800100be +800042e8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x24d3e06a +800042ec: 000fab83 lw x23,0(x31) +800042f0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x0b7332bf +800042f4: 000fab83 lw x23,0(x31) +800042f8: 004f8f93 addi x31,x31,4 + +800042fc : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b23: + sha512sum0r x23, x23, x23 # perform operation +800042fc: 517b8bb3 sha512sum0r x23,x23,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b23_str) +80004300: 000c2203 lw x4,0(x24) +80004304: 01720863 beq x4,x23,80004314 +80004308: 1f8012ef jal x5,80005500 +8000430c: 800042fc .word 0x800042fc +80004310: 80010101 .word 0x80010101 +80004314: 004c0c13 addi x24,x24,4 + + mv x30, x24 # switch signature pointer register to avoid conflict with test +80004318: 000c0f13 addi x30,x24,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x26a0a646 +8000431c: 000fac03 lw x24,0(x31) +80004320: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x867e6d9e +80004324: 000fac03 lw x24,0(x31) +80004328: 004f8f93 addi x31,x31,4 + +8000432c : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b24: + sha512sum0r x24, x24, x24 # perform operation +8000432c: 518c0c33 sha512sum0r x24,x24,x24 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b24_str) +80004330: 000f2203 lw x4,0(x30) +80004334: 01820863 beq x4,x24,80004344 +80004338: 1c8012ef jal x5,80005500 +8000433c: 8000432c .word 0x8000432c +80004340: 80010144 .word 0x80010144 +80004344: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x6e906786 +80004348: 000fac83 lw x25,0(x31) +8000434c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xc69168d1 +80004350: 000fac83 lw x25,0(x31) +80004354: 004f8f93 addi x31,x31,4 + +80004358 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b25: + sha512sum0r x25, x25, x25 # perform operation +80004358: 519c8cb3 sha512sum0r x25,x25,x25 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b25_str) +8000435c: 000f2203 lw x4,0(x30) +80004360: 01920863 beq x4,x25,80004370 +80004364: 19c012ef jal x5,80005500 +80004368: 80004358 .word 0x80004358 +8000436c: 80010187 .word 0x80010187 +80004370: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0xde3f67b4 +80004374: 000fad03 lw x26,0(x31) +80004378: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xc20de781 +8000437c: 000fad03 lw x26,0(x31) +80004380: 004f8f93 addi x31,x31,4 + +80004384 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b26: + sha512sum0r x26, x26, x26 # perform operation +80004384: 51ad0d33 sha512sum0r x26,x26,x26 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b26_str) +80004388: 000f2203 lw x4,0(x30) +8000438c: 01a20863 beq x4,x26,8000439c +80004390: 170012ef jal x5,80005500 +80004394: 80004384 .word 0x80004384 +80004398: 800101ca .word 0x800101ca +8000439c: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x6c57d3f1 +800043a0: 000fad83 lw x27,0(x31) +800043a4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x9eafa89f +800043a8: 000fad83 lw x27,0(x31) +800043ac: 004f8f93 addi x31,x31,4 + +800043b0 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b27: + sha512sum0r x27, x27, x27 # perform operation +800043b0: 51bd8db3 sha512sum0r x27,x27,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b27_str) +800043b4: 000f2203 lw x4,0(x30) +800043b8: 01b20863 beq x4,x27,800043c8 +800043bc: 144012ef jal x5,80005500 +800043c0: 800043b0 .word 0x800043b0 +800043c4: 8001020d .word 0x8001020d +800043c8: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x96f7d999 +800043cc: 000fae03 lw x28,0(x31) +800043d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x47db9f1a +800043d4: 000fae03 lw x28,0(x31) +800043d8: 004f8f93 addi x31,x31,4 + +800043dc : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b28: + sha512sum0r x28, x28, x28 # perform operation +800043dc: 51ce0e33 sha512sum0r x28,x28,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b28_str) +800043e0: 000f2203 lw x4,0(x30) +800043e4: 01c20863 beq x4,x28,800043f4 +800043e8: 118012ef jal x5,80005500 +800043ec: 800043dc .word 0x800043dc +800043f0: 80010250 .word 0x80010250 +800043f4: 004f0f13 addi x30,x30,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x599cb4a7 +800043f8: 000fae83 lw x29,0(x31) +800043fc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xc69b3dfa +80004400: 000fae83 lw x29,0(x31) +80004404: 004f8f93 addi x31,x31,4 + +80004408 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b29: + sha512sum0r x29, x29, x29 # perform operation +80004408: 51de8eb3 sha512sum0r x29,x29,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b29_str) +8000440c: 000f2203 lw x4,0(x30) +80004410: 01d20863 beq x4,x29,80004420 +80004414: 0ec012ef jal x5,80005500 +80004418: 80004408 .word 0x80004408 +8000441c: 80010293 .word 0x80010293 +80004420: 004f0f13 addi x30,x30,4 + + mv x3, x30 # switch signature pointer register to avoid conflict with test +80004424: 000f0193 addi x3,x30,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x85581a34 +80004428: 000faf03 lw x30,0(x31) +8000442c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x73fbe407 +80004430: 000faf03 lw x30,0(x31) +80004434: 004f8f93 addi x31,x31,4 + +80004438 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b30: + sha512sum0r x30, x30, x30 # perform operation +80004438: 51ef0f33 sha512sum0r x30,x30,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b30_str) +8000443c: 0001a203 lw x4,0(x3) +80004440: 01e20863 beq x4,x30,80004450 +80004444: 0bc012ef jal x5,80005500 +80004448: 80004438 .word 0x80004438 +8000444c: 800102d6 .word 0x800102d6 +80004450: 00418193 addi x3,x3,4 + + mv x20, x31 # switch data pointer register to avoid conflict with test +80004454: 000f8a13 addi x20,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x55db73c2 +80004458: 000a2f83 lw x31,0(x20) +8000445c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xf760758b +80004460: 000a2f83 lw x31,0(x20) +80004464: 004a0a13 addi x20,x20,4 + +80004468 : +Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b31: + sha512sum0r x31, x31, x31 # perform operation +80004468: 51ff8fb3 sha512sum0r x31,x31,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sum0r_cg_cmp_rd_rs1_rs2_b31_str) +8000446c: 0001a203 lw x4,0(x3) +80004470: 01f20863 beq x4,x31,80004480 +80004474: 08c012ef jal x5,80005500 +80004478: 80004468 .word 0x80004468 +8000447c: 80010319 .word 0x80010319 +80004480: 00418193 addi x3,x3,4 + + mv x2, x3 # restore signature pointer to default register for teardown +80004484: 00018113 addi x2,x3,0 + +80004488 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004488: 00000513 addi x10,x0,0 +8000448c: 00000073 ecall +80004490: fff00513 addi x10,x0,-1 +80004494: 1d800413 addi x8,x0,472 + +80004498 : +80004498: 34002373 csrrs x6,mscratch,x0 + +8000449c : +8000449c: 23832383 lw x7,568(x6) +800044a0: 23c32483 lw x9,572(x6) + +800044a4 : +800044a4: 22032383 lw x7,544(x6) + +800044a8 : +800044a8: 25032483 lw x9,592(x6) +800044ac: 34049073 csrrw x0,mscratch,x9 + +800044b0 : +800044b0: 24832483 lw x9,584(x6) +800044b4: 305493f3 csrrw x7,mtvec,x9 +800044b8: ffc4f493 andi x9,x9,-4 +800044bc: ffc3f393 andi x7,x7,-4 +800044c0: 00749e63 bne x9,x7,800044dc + +800044c4 : +800044c4: 00030493 addi x9,x6,0 + +800044c8 : +800044c8: 0004a783 lw x15,0(x9) +800044cc: 00f3a023 sw x15,0(x7) +800044d0: 00438393 addi x7,x7,4 +800044d4: 00448493 addi x9,x9,4 +800044d8: fe83c8e3 blt x7,x8,800044c8 +800044dc: 0000100f fence.i + +800044e0 : +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 4c550513 addi x10,x10,1221 # 800109e5 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001e097 auipc x1,0x1e +80004544: 024080e7 jalr x1,36(x1) # 80022564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 4c550513 addi x10,x10,1221 # 80010a25 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001e097 auipc x1,0x1e +80004584: fe4080e7 jalr x1,-28(x1) # 80022564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 4e550513 addi x10,x10,1253 # 80010a85 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001e097 auipc x1,0x1e +800045c4: fa4080e7 jalr x1,-92(x1) # 80022564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 05050513 addi x10,x10,80 # 80011630 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001e097 auipc x1,0x1e +80004604: f64080e7 jalr x1,-156(x1) # 80022564 +80004608: 0001e097 auipc x1,0x1e +8000460c: fbc080e7 jalr x1,-68(x1) # 800225c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 0a838393 addi x7,x7,168 # 80012708 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 06040413 addi x8,x8,96 # 80012700 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 80010bd9 .word 0x80010bd9 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 80010a47 .word 0x80010a47 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 2a450513 addi x10,x10,676 # 800109a4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001e097 auipc x1,0x1e +80004724: e44080e7 jalr x1,-444(x1) # 80022564 +80004728: 0001e097 auipc x1,0x1e +8000472c: e7c080e7 jalr x1,-388(x1) # 800225a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 2a550513 addi x10,x10,677 # 800109e5 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001e097 auipc x1,0x1e +80004764: e04080e7 jalr x1,-508(x1) # 80022564 +80004768: 0001e097 auipc x1,0x1e +8000476c: e5c080e7 jalr x1,-420(x1) # 800225c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: ce9ff06f jal x0,80004488 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047ac: cddff06f jal x0,80004488 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b8030313 addi x6,x6,-1152 # 800044e0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 52750513 addi x10,x10,1319 # 80012067 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001e097 auipc x1,0x1e +80004b64: a04080e7 jalr x1,-1532(x1) # 80022564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000c517 auipc x10,0xc +80004b84: 94850513 addi x10,x10,-1720 # 800104c8 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: f2e50513 addi x10,x10,-210 # 80010aee +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: de550513 addi x10,x10,-539 # 800109e5 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 0001e097 auipc x1,0x1e +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800225c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 4c848493 addi x9,x9,1224 # 800104a8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 14c40413 addi x8,x8,332 # 8002116c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010bf0 .word 0x80010bf0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010cf2 .word 0x80010cf2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010ded .word 0x80010ded +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010ee0 .word 0x80010ee0 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80011053 .word 0x80011053 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80022000 .word 0x80022000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80022014 .word 0x80022014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022030 .word 0x80022030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000b217 auipc x4,0xb +80005504: e6020213 addi x4,x4,-416 # 80010360 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000b397 auipc x7,0xb +8000551c: e4838393 addi x7,x7,-440 # 80010360 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000b697 auipc x13,0xb +80005544: e2068693 addi x13,x13,-480 # 80010360 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000b497 auipc x9,0xb +8000556c: df848493 addi x9,x9,-520 # 80010360 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000b497 auipc x9,0xb +80005610: d544a483 lw x9,-684(x9) # 80010360 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000d417 auipc x8,0xd +800056c4: 9f040413 addi x8,x8,-1552 # 800120b0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001c417 auipc x8,0x1c +80005704: a7040413 addi x8,x8,-1424 # 80021170 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000b497 auipc x9,0xb +80005744: d4848493 addi x9,x9,-696 # 80010488 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000b817 auipc x16,0xb +800057b4: ce880813 addi x16,x16,-792 # 80010498 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000b817 auipc x16,0xb +800057c8: cd480813 addi x16,x16,-812 # 80010498 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 40938393 addi x7,x7,1033 # 80010bd9 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000b817 auipc x16,0xb +800057e4: cb080813 addi x16,x16,-848 # 80010490 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 40438393 addi x7,x7,1028 # 80010bf0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 4ee38393 addi x7,x7,1262 # 80010cf2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 5d138393 addi x7,x7,1489 # 80010ded +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: 6ac38393 addi x7,x7,1708 # 80010ee0 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000c397 auipc x7,0xc +80005850: 80738393 addi x7,x7,-2041 # 80011053 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: 77338393 addi x7,x7,1907 # 80010fd7 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: 79938393 addi x7,x7,1945 # 80011015 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 39c38393 addi x7,x7,924 # 80010c30 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 48438393 addi x7,x7,1156 # 80010d30 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 56538393 addi x7,x7,1381 # 80010e29 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 64138393 addi x7,x7,1601 # 80010f1d +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: 79a38393 addi x7,x7,1946 # 8001108e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 36438393 addi x7,x7,868 # 80010c70 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 44a38393 addi x7,x7,1098 # 80010d6e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 52938393 addi x7,x7,1321 # 80010e65 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 60638393 addi x7,x7,1542 # 80010f5a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: 75d38393 addi x7,x7,1885 # 800110c9 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 32d38393 addi x7,x7,813 # 80010cb1 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 41138393 addi x7,x7,1041 # 80010dad +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 4ee38393 addi x7,x7,1262 # 80010ea2 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 5cc38393 addi x7,x7,1484 # 80010f98 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: 72138393 addi x7,x7,1825 # 80011105 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: 74638393 addi x7,x7,1862 # 80011142 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: 77d38393 addi x7,x7,1917 # 80011191 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000c397 auipc x7,0xc +80005a30: 86038393 addi x7,x7,-1952 # 8001128c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000c397 auipc x7,0xc +80005a48: 94438393 addi x7,x7,-1724 # 80011388 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000b817 auipc x16,0xb +80005a68: a2c80813 addi x16,x16,-1492 # 80010490 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000b817 auipc x16,0xb +80005a78: a1c80813 addi x16,x16,-1508 # 80010490 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000b817 auipc x16,0xb +80005a84: a1480813 addi x16,x16,-1516 # 80010494 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000b817 auipc x16,0xb +80005a94: a0080813 addi x16,x16,-1536 # 80010490 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: f0550513 addi x10,x10,-251 # 800109e5 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001d097 auipc x1,0x1d +80005b04: a64080e7 jalr x1,-1436(x1) # 80022564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: f0550513 addi x10,x10,-251 # 80010a25 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: f7c50513 addi x10,x10,-132 # 80010adc +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 0000b517 auipc x10,0xb +80005b8c: 8f852503 lw x10,-1800(x10) # 80010480 +80005b90: 0001d097 auipc x1,0x1d +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80022564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f4e50513 addi x10,x10,-178 # 80010aee +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 79852503 lw x10,1944(x10) # 80010360 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f1050513 addi x10,x10,-240 # 80010af0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000b517 auipc x10,0xb +80005c0c: 85852503 lw x10,-1960(x10) # 80010460 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000b517 auipc x10,0xb +80005c44: 88850513 addi x10,x10,-1912 # 800104c8 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001d097 auipc x1,0x1d +80005c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: e8450513 addi x10,x10,-380 # 80010b04 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 7c052503 lw x10,1984(x10) # 80010468 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: 80850513 addi x10,x10,-2040 # 800104c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000c517 auipc x10,0xc +80005d04: 83b50513 addi x10,x10,-1989 # 8001153b +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 63852503 lw x10,1592(x10) # 80010360 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: 78860613 addi x12,x12,1928 # 800104c8 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 6fc52503 lw x10,1788(x10) # 80010464 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000c517 auipc x10,0xc +80005da4: 8b150513 addi x10,x10,-1871 # 80011651 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001c097 auipc x1,0x1c +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80022564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: 6e860613 addi x12,x12,1768 # 800104c8 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: 65c52503 lw x10,1628(x10) # 80010464 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: 6d450513 addi x10,x10,1748 # 80011534 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001c097 auipc x1,0x1c +80005e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 62850513 addi x10,x10,1576 # 800104c8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 66c50513 addi x10,x10,1644 # 8001154c +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 45852503 lw x10,1112(x10) # 80010360 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 55852503 lw x10,1368(x10) # 80010470 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 54452503 lw x10,1348(x10) # 80010470 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 58850513 addi x10,x10,1416 # 800104c8 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001c097 auipc x1,0x1c +80005f64: 604080e7 jalr x1,1540(x1) # 80022564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 52052503 lw x10,1312(x10) # 80010488 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 5e350513 addi x10,x10,1507 # 80011563 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 3b852503 lw x10,952(x10) # 80010360 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 4c052503 lw x10,1216(x10) # 80010478 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 4ac52503 lw x10,1196(x10) # 80010478 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001c097 auipc x1,0x1c +80006004: 564080e7 jalr x1,1380(x1) # 80022564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 55a50513 addi x10,x10,1370 # 8001157a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 0000a517 auipc x10,0xa +8000604c: 43052503 lw x10,1072(x10) # 80010478 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 46850513 addi x10,x10,1128 # 800104c8 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 53850513 addi x10,x10,1336 # 800115d8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 3b052503 lw x10,944(x10) # 80010478 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 3e850513 addi x10,x10,1000 # 800104c8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 38442403 lw x8,900(x8) # 80010490 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 55d50513 addi x10,x10,1373 # 8001167d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 54950513 addi x10,x10,1353 # 800116a9 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 0000a817 auipc x16,0xa +8000618c: 31080813 addi x16,x16,784 # 80010498 +80006190: 00082503 lw x10,0(x16) +80006194: 0001c097 auipc x1,0x1c +80006198: 3d0080e7 jalr x1,976(x1) # 80022564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 94e50513 addi x10,x10,-1714 # 80010aee +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 4d950513 addi x10,x10,1241 # 800116b9 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 0000a517 auipc x10,0xa +8000620c: 27052503 lw x10,624(x10) # 80010478 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 2a850513 addi x10,x10,680 # 800104c8 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 48450513 addi x10,x10,1156 # 800116e4 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 0000a517 auipc x10,0xa +8000628c: 1e852503 lw x10,488(x10) # 80010470 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 22850513 addi x10,x10,552 # 800104c8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 1a832303 lw x6,424(x6) # 80010470 +800062d0: 0000a397 auipc x7,0xa +800062d4: 1a83a383 lw x7,424(x7) # 80010478 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 43350513 addi x10,x10,1075 # 80011713 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 45b50513 addi x10,x10,1115 # 8001177b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 0000a317 auipc x6,0xa +8000634c: 12832303 lw x6,296(x6) # 80010470 +80006350: 0000a397 auipc x7,0xa +80006354: 1283a383 lw x7,296(x7) # 80010478 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 14850513 addi x10,x10,328 # 800104c8 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001c097 auipc x1,0x1c +800063a4: 1c4080e7 jalr x1,452(x1) # 80022564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 3e250513 addi x10,x10,994 # 800117a2 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 33f50513 addi x10,x10,831 # 8001173f +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 33b50513 addi x10,x10,827 # 8001177b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 0000a317 auipc x6,0xa +8000646c: 01032303 lw x6,16(x6) # 80010478 +80006470: 0000a397 auipc x7,0xa +80006474: 0003a383 lw x7,0(x7) # 80010470 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 02850513 addi x10,x10,40 # 800104c8 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001c097 auipc x1,0x1c +800064c4: 0a4080e7 jalr x1,164(x1) # 80022564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 3aa50513 addi x10,x10,938 # 8001188a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 45150513 addi x10,x10,1105 # 80011971 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0000a517 auipc x10,0xa +8000654c: f4c52503 lw x10,-180(x10) # 80010494 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 42d50513 addi x10,x10,1069 # 800119ad +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3cb50513 addi x10,x10,971 # 8001198b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 39350513 addi x10,x10,915 # 80011993 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35b50513 addi x10,x10,859 # 8001199b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 32450513 addi x10,x10,804 # 800119a4 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001c097 auipc x1,0x1c +800066a4: ec4080e7 jalr x1,-316(x1) # 80022564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2f650513 addi x10,x10,758 # 800119b6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 0000a517 auipc x10,0xa +800066ec: da852503 lw x10,-600(x10) # 80010490 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 3cd50513 addi x10,x10,973 # 80011b0d +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 25050513 addi x10,x10,592 # 800119d0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 24150513 addi x10,x10,577 # 80011a01 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 22150513 addi x10,x10,545 # 80011a21 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1ff50513 addi x10,x10,511 # 80011a3f +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1de50513 addi x10,x10,478 # 80011a5e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 1c650513 addi x10,x10,454 # 80011a86 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 1b250513 addi x10,x10,434 # 80011ab2 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 19e50513 addi x10,x10,414 # 80011ade +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001c097 auipc x1,0x1c +80006964: c04080e7 jalr x1,-1020(x1) # 80022564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 19c50513 addi x10,x10,412 # 80011b1c +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 0000a517 auipc x10,0xa +800069ac: ad052503 lw x10,-1328(x10) # 80010478 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: b0850513 addi x10,x10,-1272 # 800104c8 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 13350513 addi x10,x10,307 # 80011b33 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 0000a517 auipc x10,0xa +80006a2c: a4852503 lw x10,-1464(x10) # 80010470 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: a8850513 addi x10,x10,-1400 # 800104c8 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a2852503 lw x10,-1496(x10) # 80010490 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 0ca50513 addi x10,x10,202 # 80011b4a +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9d052503 lw x10,-1584(x10) # 80010478 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001c097 auipc x1,0x1c +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80022564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 0a150513 addi x10,x10,161 # 80011b61 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 98852503 lw x10,-1656(x10) # 80010470 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 0000a517 auipc x10,0xa +80006b08: 98c52503 lw x10,-1652(x10) # 80010490 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 0b750513 addi x10,x10,183 # 80011bd7 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001c097 auipc x1,0x1c +80006b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 14d50513 addi x10,x10,333 # 80011cad +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 20050513 addi x10,x10,512 # 80011da0 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 2bb50513 addi x10,x10,699 # 80011e9b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 36250513 addi x10,x10,866 # 80011f82 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: f2f50513 addi x10,x10,-209 # 80011b8f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 0000a617 auipc x12,0xa +80006c8c: 82062603 lw x12,-2016(x12) # 800104a8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: ed850513 addi x10,x10,-296 # 80010b78 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 7c850513 addi x10,x10,1992 # 800104c8 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001c097 auipc x1,0x1c +80006d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 7b058593 addi x11,x11,1968 # 800104f0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 7e458593 addi x11,x11,2020 # 80010550 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 0000a517 auipc x10,0xa +80006da4: bee50513 addi x10,x10,-1042 # 8001098e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000b517 auipc x10,0xb +80006de4: 85050513 addi x10,x10,-1968 # 80011630 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001b097 auipc x1,0x1b +80006e04: 764080e7 jalr x1,1892(x1) # 80022564 + +80006e08 : +80006e08: 0001b097 auipc x1,0x1b +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800225c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: 69060613 addi x12,x12,1680 # 800104a0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d7950513 addi x10,x10,-647 # 80010b99 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: 66052503 lw x10,1632(x10) # 800104a8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 66850513 addi x10,x10,1640 # 800104c8 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 0000a517 auipc x10,0xa +80006ea4: d0950513 addi x10,x10,-759 # 80010ba9 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 5e852503 lw x10,1512(x10) # 800104b0 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 0000a517 auipc x10,0xa +80006f24: c9950513 addi x10,x10,-871 # 80010bb9 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 57052503 lw x10,1392(x10) # 800104b8 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 56850513 addi x10,x10,1384 # 800104c8 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 0000a517 auipc x10,0xa +80006fa4: c2950513 addi x10,x10,-983 # 80010bc9 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 4f852503 lw x10,1272(x10) # 800104c0 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009617 auipc x12,0x9 +8000700c: 49860613 addi x12,x12,1176 # 800104a0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 4a860613 addi x12,x12,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 1f838393 addi x7,x7,504 # 80005200 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 1dc38393 addi x7,x7,476 # 80005200 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 1c438393 addi x7,x7,452 # 80005200 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1b038393 addi x7,x7,432 # 80005200 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1a438393 addi x7,x7,420 # 80005200 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 17038393 addi x7,x7,368 # 80005200 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 3ec30313 addi x6,x6,1004 # 80004488 +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 15838393 addi x7,x7,344 # 80005200 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3d430313 addi x6,x6,980 # 80004488 +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 14038393 addi x7,x7,320 # 80005200 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3bc30313 addi x6,x6,956 # 80004488 +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 12838393 addi x7,x7,296 # 80005200 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 25878793 addi x15,x15,600 # 80004498 +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 02018193 addi x3,x3,32 # 80005500 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zknh-sha512sum1r-00.elf.objdump b/riscv-tests/rv32-Zknh-sha512sum1r-00.elf.objdump new file mode 100644 index 0000000..1429888 --- /dev/null +++ b/riscv-tests/rv32-Zknh-sha512sum1r-00.elf.objdump @@ -0,0 +1,13193 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sum1r-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zknh/Zknh-sha512sum1r-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00023640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00007100 memsz 0x00007100 flags r-x + LOAD off 0x00009000 vaddr 0x80008000 paddr 0x80008000 align 2**12 + filesz 0x0001a640 memsz 0x0001a640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000070c0 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00019170 80008000 80008000 00009000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80021200 80021200 00022200 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80022000 80022000 00023000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00023640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000265e 00000000 00000000 0002367b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000081 00000000 00000000 00025cd9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00025d5a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00025d7d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00025d90 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008f 00000000 00000000 00025db8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 00025e47 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80008000 l d .data 00000000 .data +80021200 l d .tohost 00000000 .tohost +80022000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cc276DVS.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800220e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b0 +80005500 l .text.rvtest 00000000 failedtest_x5_x4 +80008ff0 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b1 +80009028 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b2 +80009060 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b3 +80009098 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b4 +80005518 l .text.rvtest 00000000 failedtest_x8_x7 +800090d0 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b5 +80009108 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b6 +80009140 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b6_str +8000019c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b7 +80009178 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b7_str +800001c8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b8 +800091b0 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b8_str +800001f4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b9 +800091e8 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b9_str +80000220 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b10 +80009221 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b10_str +8000024c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b11 +8000925b l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b11_str +80000278 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b12 +80009295 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b12_str +800002a4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b13 +800092cf l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b13_str +800002d0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b14 +80009309 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b14_str +800002fc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b15 +80009343 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b15_str +80000328 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b16 +8000937d l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b16_str +80000354 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b17 +800093b7 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b17_str +80000380 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b18 +800093f1 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b18_str +800003ac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b19 +8000942b l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b19_str +800003d8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b20 +80009465 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b20_str +80000404 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b21 +8000949f l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b21_str +80000430 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b22 +800094d9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b22_str +8000045c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b23 +80009513 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b23_str +80000488 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b24 +8000954d l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b24_str +800004b4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b25 +80009587 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b25_str +800004e0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b26 +800095c1 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b26_str +8000050c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b27 +800095fb l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b27_str +80000538 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b28 +80009635 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b28_str +80000568 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b29 +8000966f l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b29_str +80000594 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b30 +800096a9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b30_str +800005c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_b31 +800096e3 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_b31_str +800005ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b0 +8000971d l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b0_str +80000618 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b1 +80009756 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b1_str +80000648 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b2 +8000978f l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b2_str +80000674 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b3 +800097c8 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b3_str +800006a8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b4 +80005540 l .text.rvtest 00000000 failedtest_x14_x13 +80009801 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b4_str +800006d4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b5 +8000983a l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b5_str +80000700 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b6 +80009873 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b6_str +8000072c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b7 +800098ac l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b7_str +80000758 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b8 +800098e5 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b8_str +80000784 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b9 +8000991e l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b9_str +800007b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b10 +80009957 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b10_str +800007dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b11 +80009991 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b11_str +80000808 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b12 +800099cb l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b12_str +8000083c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b13 +80009a05 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b13_str +80000868 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b14 +80009a3f l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b14_str +80000894 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b15 +80009a79 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b15_str +800008c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b16 +80009ab3 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b16_str +800008ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b17 +80009aed l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b17_str +80000918 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b18 +80009b27 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b18_str +80000944 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b19 +80009b61 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b19_str +80000970 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b20 +80009b9b l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b20_str +8000099c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b21 +80009bd5 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b21_str +800009c8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b22 +80009c0f l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b22_str +800009f4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b23 +80009c49 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b23_str +80000a24 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b24 +80009c83 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b24_str +80000a50 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b25 +80009cbd l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b25_str +80000a7c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b26 +80009cf7 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b26_str +80000aa8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b27 +80009d31 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b27_str +80000ad8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b28 +80009d6b l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b28_str +80000b04 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b29 +80009da5 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b29_str +80000b30 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b30 +80009ddf l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b30_str +80000b60 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_b31 +80009e19 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_b31_str +80000b8c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b0 +80009e53 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b0_str +80000bb8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b1 +80009e8b l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b1_str +80000be4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b2 +80009ec3 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b2_str +80000c10 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b3 +80009efb l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b3_str +80000c3c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b4 +80009f33 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b4_str +80000c68 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b5 +80009f6b l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b5_str +80000c94 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b6 +80009fa3 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b6_str +80000cc8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b7 +80009fdb l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b7_str +80000cf4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b8 +8000a013 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b8_str +80000d20 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b9 +8000a04b l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b9_str +80000d4c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b10 +8000a083 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b10_str +80000d78 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b11 +8000a0bc l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b11_str +80000da4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b12 +8000a0f5 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b12_str +80000dd8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b13 +8000a12e l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b13_str +80000e04 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b14 +8000a167 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b14_str +80000e30 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b15 +8000a1a0 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b15_str +80000e5c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b16 +8000a1d9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b16_str +80000e88 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b17 +8000a212 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b17_str +80000eb4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b18 +8000a24b l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b18_str +80000ee0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b19 +8000a284 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b19_str +80000f0c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b20 +8000a2bd l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b20_str +80000f3c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b21 +8000a2f6 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b21_str +80000f68 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b22 +8000a32f l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b22_str +80000f94 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b23 +8000a368 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b23_str +80000fc0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b24 +8000a3a1 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b24_str +80000fec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b25 +8000a3da l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b25_str +80001018 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b26 +8000a413 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b26_str +80001044 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b27 +8000a44c l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b27_str +80001074 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b28 +8000a485 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b28_str +800010a0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b29 +8000a4be l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b29_str +800010cc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b30 +8000a4f7 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b30_str +800010f8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rd_b31 +8000a530 l .data 00000000 Zknh_sha512sum1r_cg_cp_rd_b31_str +80001124 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x0 +8000a569 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x0_str +80001150 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x1 +8000a5a9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x1_str +8000117c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x2 +8000a5e9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x2_str +800011a8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000000 +8000a629 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000000_str +800011d4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000001 +8000a671 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000001_str +80001200 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x7fffffff +8000a6b9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x7fffffff_str +8000122c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x7ffffffe +8000a701 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x7ffffffe_str +80001258 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xffffffff +8000a749 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xffffffff_str +80001284 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xfffffffe +8000a791 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xfffffffe_str +800012b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x5bbc8872 +8000a7d9 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x5bbc8872_str +800012dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xaaaaaaaa +8000a821 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0xaaaaaaaa_str +80001308 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x55555555 +8000a869 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs1_edges_0x55555555_str +80001334 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x0 +8000a8b1 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x0_str +80001360 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x1 +8000a8f2 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x1_str +8000138c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x2 +8000a933 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x2_str +800013b8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000000 +8000a974 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000000_str +800013e4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000001 +8000a9bc l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000001_str +80001410 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x7fffffff +8000aa04 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x7fffffff_str +8000143c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x7ffffffe +8000aa4c l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x7ffffffe_str +80001468 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xffffffff +8000aa94 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xffffffff_str +80001494 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xfffffffe +8000aadc l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xfffffffe_str +800014c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x5bbc8872 +8000ab24 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x5bbc8872_str +800014ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xaaaaaaaa +8000ab6c l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0xaaaaaaaa_str +80001518 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x55555555 +8000abb4 l .data 00000000 Zknh_sha512sum1r_cg_cp_rs2_edges_0x55555555_str +80001544 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000abfc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001570 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000ac54 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +8000159c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000acac l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015c8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000ad04 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +800015f4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000ad63 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001620 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000adc2 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +8000164c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000ae21 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001678 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000ae80 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016a4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000aedf l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016d0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000af3e l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +800016fc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000af9d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001728 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000affc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001754 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000b05b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001780 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000b0b3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017ac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000b10b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017d8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000b163 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001804 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000b1c2 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001830 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000b221 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +8000185c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000b280 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +80001888 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000b2df l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018b4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000b33e l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018e0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000b39d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +8000190c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000b3fc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001938 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000b45b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001964 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000b4ba l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +80001990 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000b512 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019bc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000b56a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +800019e8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000b5c2 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a14 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000b621 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a40 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000b680 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a6c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000b6df l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001a98 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000b73e l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ac4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000b79d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001af0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000b7fc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b1c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000b85b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b48 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000b8ba l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b74 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000b919 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001ba0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000b978 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bcc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000b9d7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001bf8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ba36 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c24 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ba9c l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c50 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000bb02 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c7c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8000bb68 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001ca8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +8000bbce l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cd4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +8000bc34 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d00 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +8000bc9a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d2c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +8000bd00 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d58 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +8000bd66 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d84 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +8000bdcc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001db0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +8000be2b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001ddc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +8000be8a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e08 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +8000bee9 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e34 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +8000bf4f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e60 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +8000bfb5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001e8c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +8000c01b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001eb8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +8000c081 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001ee4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +8000c0e7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f10 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +8000c14d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f3c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +8000c1b3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f68 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +8000c219 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001f94 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8000c27f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fc0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +8000c2de l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80001fec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +8000c33d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002018 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +8000c39c l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002044 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8000c402 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002070 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +8000c468 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +8000209c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8000c4ce l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020c8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +8000c534 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +800020f4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +8000c59a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002120 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +8000c600 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +8000214c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +8000c666 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002178 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +8000c6cc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021a4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +8000c732 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021d0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +8000c791 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +800021fc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +8000c7f0 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002228 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +8000c84f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002254 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +8000c8b5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002280 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +8000c91b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022ac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +8000c981 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022d8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +8000c9e7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002304 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +8000ca4d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002330 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +8000cab3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +8000235c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +8000cb19 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +80002388 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +8000cb7f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023b4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +8000cbe5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023e0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +8000cc44 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +8000240c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +8000cca3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002438 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +8000cd02 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002464 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +8000cd68 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +80002490 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +8000cdce l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024bc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8000ce34 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +800024e8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8000ce9a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002514 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +8000cf00 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002540 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8000cf66 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +8000256c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +8000cfcc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +80002598 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8000d032 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025c4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +8000d098 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +800025f0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +8000d0f7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +8000261c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +8000d156 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002648 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8000d1b5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002674 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +8000d21b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026a0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +8000d281 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026cc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +8000d2e7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +800026f8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +8000d34d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002724 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +8000d3b3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002750 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +8000d419 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +8000277c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +8000d47f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027a8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +8000d4e5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027d4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +8000d54b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002800 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +8000d5aa l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +8000282c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +8000d609 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002858 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +8000d668 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +80002884 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +8000d6ce l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +8000d734 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +8000d79a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002908 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +8000d800 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002934 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +8000d866 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002960 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +8000d8cc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +8000298c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +8000d932 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029b8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +8000d998 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029e4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +8000d9fe l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a10 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +8000da5d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a3c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +8000dabc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a68 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +8000db1b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002a94 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +8000db81 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ac0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +8000dbe7 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002aec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +8000dc4d l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b18 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +8000dcb3 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b44 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +8000dd19 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b70 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +8000dd7f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002b9c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +8000dde5 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bc8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +8000de4b l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002bf4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +8000deb1 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c20 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8000df10 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c4c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +8000df6f l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c78 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +8000dfce l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002ca4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +8000e034 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cd0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +8000e09a l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002cfc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +8000e100 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d28 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +8000e166 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d54 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +8000e1cc l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d80 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +8000e232 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8000e298 l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dd8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +8000e2fe l .data 00000000 Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e04 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b0 +8000e364 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b0_str +80002e30 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b1 +8000e3a3 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b1_str +80002e5c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b2 +8000e3e2 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b2_str +80002e88 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b3 +8000e421 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b3_str +80002ebc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b4 +8000e460 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b4_str +80002ee8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b5 +8000e49f l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b5_str +80002f14 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b6 +8000e4de l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b6_str +80002f40 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b7 +8000e51d l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b7_str +80002f6c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b8 +8000e55c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b8_str +80002f98 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b9 +8000e59b l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b9_str +80002fc8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b10 +8000e5da l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b10_str +80002ff4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b11 +8000e61a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b11_str +80003024 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b12 +8000e65a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b12_str +80003058 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b13 +8000e69a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b13_str +80003084 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b14 +8000e6da l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b14_str +800030b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b15 +8000e71a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b15_str +800030dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b16 +8000e75a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b16_str +8000310c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b17 +8000e79a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b17_str +80003138 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b18 +8000e7da l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b18_str +80003164 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b19 +8000e81a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b19_str +80003190 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b20 +8000e85a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b20_str +800031c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b21 +8000e89a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b21_str +800031f0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b22 +8000e8da l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b22_str +8000321c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b23 +8000e91a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b23_str +80003248 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b24 +8000e95a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b24_str +80003274 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b25 +8000e99a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b25_str +800032a0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b26 +8000e9da l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b26_str +800032d0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b27 +8000ea1a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b27_str +80003300 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b28 +8000ea5a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b28_str +8000332c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b29 +8000ea9a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b29_str +80003358 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b30 +8000eada l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b30_str +80003384 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b31 +8000eb1a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rs1_rs2_b31_str +800033b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b0 +8000eb5a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b0_str +800033dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b1 +8000eb98 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b1_str +80003408 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b2 +8000ebd6 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b2_str +80003434 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b3 +8000ec14 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b3_str +80003460 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b4 +8000ec52 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b4_str +8000348c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b5 +8000ec90 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b5_str +800034b8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b6 +8000ecce l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b6_str +800034ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b7 +8000ed0c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b7_str +80003518 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b8 +8000ed4a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b8_str +80003544 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b9 +8000ed88 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b9_str +80003570 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b10 +8000edc6 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b10_str +8000359c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b11 +8000ee05 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b11_str +800035c8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b12 +8000ee44 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b12_str +800035f4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b13 +8000ee83 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b13_str +80003620 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b14 +8000eec2 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b14_str +8000364c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b15 +8000ef01 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b15_str +80003678 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b16 +8000ef40 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b16_str +800036a4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b17 +8000ef7f l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b17_str +800036d4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b18 +8000efbe l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b18_str +80003700 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b19 +8000effd l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b19_str +80003730 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b20 +8000f03c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b20_str +8000375c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b21 +8000f07b l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b21_str +80003788 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b22 +8000f0ba l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b22_str +800037b4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b23 +8000f0f9 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b23_str +800037e0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b24 +8000f138 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b24_str +8000380c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b25 +8000f177 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b25_str +80003838 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b26 +8000f1b6 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b26_str +80003864 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b27 +8000f1f5 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b27_str +80003894 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b28 +8000f234 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b28_str +800038c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b29 +8000f273 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b29_str +800038ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b30 +8000f2b2 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b30_str +80003918 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b31 +8000f2f1 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_b31_str +80003944 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b0 +8000f330 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b0_str +80003974 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b1 +8000f36e l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b1_str +800039a4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b2 +8000f3ac l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b2_str +800039d0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b3 +8000f3ea l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b3_str +80003a04 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b4 +8000f428 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b4_str +80003a30 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b5 +8000f466 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b5_str +80003a5c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b6 +8000f4a4 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b6_str +80003a90 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b7 +8000f4e2 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b7_str +80003abc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b8 +8000f520 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b8_str +80003ae8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b9 +8000f55e l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b9_str +80003b14 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b10 +8000f59c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b10_str +80003b40 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b11 +8000f5db l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b11_str +80003b6c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b12 +8000f61a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b12_str +80003b98 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b13 +8000f659 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b13_str +80003bc4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b14 +8000f698 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b14_str +80003bf0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b15 +8000f6d7 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b15_str +80003c1c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b16 +8000f716 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b16_str +80003c48 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b17 +8000f755 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b17_str +80003c74 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b18 +8000f794 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b18_str +80003ca0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b19 +8000f7d3 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b19_str +80003ccc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b20 +8000f812 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b20_str +80003cf8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b21 +8000f851 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b21_str +80003d24 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b22 +8000f890 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b22_str +80003d50 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b23 +8000f8cf l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b23_str +80003d80 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b24 +8000f90e l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b24_str +80003dac l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b25 +8000f94d l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b25_str +80003dd8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b26 +8000f98c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b26_str +80003e04 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b27 +8000f9cb l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b27_str +80003e30 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b28 +8000fa0a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b28_str +80003e5c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b29 +8000fa49 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b29_str +80003e88 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b30 +8000fa88 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b30_str +80003eb8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b31 +8000fac7 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs2_b31_str +80003ee4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b0 +8000fb06 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b0_str +80003f10 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b1 +8000fb48 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b1_str +80003f3c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b2 +8000fb8a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b2_str +80003f6c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b3 +8000fbcc l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b3_str +80003fa0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b4 +8000fc0e l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b4_str +80003fcc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b5 +8000fc50 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b5_str +80003ff8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b6 +8000fc92 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b6_str +8000402c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b7 +8000fcd4 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b7_str +80004058 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b8 +8000fd16 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b8_str +80004084 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b9 +8000fd58 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b9_str +800040b0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b10 +8000fd9a l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b10_str +800040dc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b11 +8000fddd l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b11_str +80004108 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b12 +8000fe20 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b12_str +8000413c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b13 +8000fe63 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b13_str +80004168 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b14 +8000fea6 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b14_str +80004194 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b15 +8000fee9 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b15_str +800041c0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b16 +8000ff2c l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b16_str +800041ec l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b17 +8000ff6f l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b17_str +80004218 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b18 +8000ffb2 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b18_str +80004244 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b19 +8000fff5 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b19_str +80004270 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b20 +80010038 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b20_str +800042a0 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b21 +8001007b l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b21_str +800042cc l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b22 +800100be l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b22_str +800042f8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b23 +80010101 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b23_str +80004324 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b24 +80010144 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b24_str +80004350 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b25 +80010187 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b25_str +8000437c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b26 +800101ca l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b26_str +800043a8 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b27 +8001020d l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b27_str +800043d4 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b28 +80010250 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b28_str +80004400 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b29 +80010293 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b29_str +8000442c l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b30 +800102d6 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b30_str +80004458 l .text.rvtest 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b31 +80010319 l .data 00000000 Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80004488 l .text.rvtest 00000000 exit_Mcleanup +8000448c l .text.rvtest 00000000 resto_Medeleg +80004494 l .text.rvtest 00000000 resto_Msatp +80004498 l .text.rvtest 00000000 resto_Mscratch +800044a0 l .text.rvtest 00000000 resto_Mxtvec +800044b4 l .text.rvtest 00000000 resto_Mtramp +800044b8 l .text.rvtest 00000000 resto_Mloop +800044d0 l .text.rvtest 00000000 check_trap_sig_overflow +80004770 l .text.rvtest 00000000 trap_sig_overflow +80004610 l .text.rvtest 00000000 check_trap_sig_offset +800109e5 l .data 00000000 failstr +80022564 l .text.rvmodel 00000000 rvmodel_io_write_str +80010a25 l .data 00000000 begin_debugstr +80010a85 l .data 00000000 trap_sig_overflowstr +80011630 l .data 00000000 endstr +800225c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80008328 l .data 00000000 Mtrap_sig +80012708 l .data 00000000 trap_sigptr +80012700 l .data 00000000 final_trap_sig_offset +800046d4 l .text.rvtest 00000000 check_abort_test +80005568 l .text.rvtest 00000000 failedtest_trap_x7_x9 +80010bd9 l .data 00000000 trap_sig_offset_mismatch +800046f0 l .text.rvtest 00000000 exit_cleanup +800047a4 l .text.rvtest 00000000 abort_test +80010a47 l .data 00000000 abortstr +800109a4 l .data 00000000 successstr +800225a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80004840 l .text.rvtest 00000000 trap_Mhandler +80004960 l .text.rvtest 00000000 rvtest_Mendtest +80004984 l .text.rvtest 00000000 common_Mhandler +800049f0 l .text.rvtest 00000000 spcl_M2mmode_test +800049fc l .text.rvtest 00000000 spcl_Mchk4alt +80004a0c l .text.rvtest 00000000 spcl_Mchk4ecall +80004a04 l .text.rvtest 00000000 spcl_Mparam_chk +80005490 l .text.rvtest 00000000 Mrtn2mmode +80004f94 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80004a18 l .text.rvtest 00000000 Mgoto_mchk +80004a1c l .text.rvtest 00000000 tsbi_Mdispatch +80004a44 l .text.rvtest 00000000 tsbi_Mgoto_mode +80004a34 l .text.rvtest 00000000 tsbi_Mecall_test +80004ab0 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80005200 l .text.rvtest 00000000 resto_Mrtn +80004a70 l .text.rvtest 00000000 tsbi_Mgoto_m +80004a80 l .text.rvtest 00000000 tsbi_Mgoto_s +80004a9c l .text.rvtest 00000000 tsbi_Mgoto_u +80004aac l .text.rvtest 00000000 tsbi_Mhandle_forwarded +80004c30 l .text.rvtest 00000000 tsbi_instr_table +80004ae0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80004af4 l .text.rvtest 00000000 found_instr +80004b38 l .text.rvtest 00000000 tsbi_instr_not_found +80004b24 l .text.rvtest 00000000 tsbi_instr_rtn +80012067 l .data 00000000 tsbi_instr_not_found_str +80007018 l .text.rvtest 00000000 failedtest_hex_to_str +800104c8 l .data 00000000 ascii_buffer +80010aee l .data 00000000 newlinestr +80004fb0 l .text.rvtest 00000000 Mxcpt_sig_sv +80004f9c l .text.rvtest 00000000 Mint_sig_sv +80004fb0 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +800104a8 l .data 00000000 saved_xepc +8002116c l .data 00000000 sig_end_canary +80005048 l .text.rvtest 00000000 sv_Mvect +80010bf0 l .data 00000000 sv_Mvect_str +800050ec l .text.rvtest 00000000 sv_Mcause +80010cf2 l .data 00000000 sv_Mcause_str +80005220 l .text.rvtest 00000000 common_Mint_handler +80005114 l .text.rvtest 00000000 common_Mexcpt_handler +80005120 l .text.rvtest 00000000 vmem_adj_Mepc +80005174 l .text.rvtest 00000000 sv_Mepc +80005148 l .text.rvtest 00000000 code_adj_Mepc +80005170 l .text.rvtest 00000000 adj_Mepc +8000515c l .text.rvtest 00000000 data_adj_Mepc +80010ded l .data 00000000 sv_Mepc_str +80005194 l .text.rvtest 00000000 skpsv_Mepc +800051bc l .text.rvtest 00000000 adj_Mepc_rtn +800051c8 l .text.rvtest 00000000 skp_adj_Mepc +800051cc l .text.rvtest 00000000 sv_Mtval +80010ee0 l .data 00000000 sv_Mtval_str +800051ec l .text.rvtest 00000000 skp_Mtval +800051f8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80005258 l .text.rvtest 00000000 spcl_Mhandler +80005234 l .text.rvtest 00000000 sv_Mip +80011053 l .data 00000000 sv_Mip_str +80005274 l .text.rvtest 00000000 spcl_Mdispatch_handling +8000528c l .text.rvtest 00000000 spcl_Mdispatch +80005290 l .text.rvtest 00000000 clrint_Mtbl +80022000 l .text.rvmodel 00000000 Mclr_Msw_int +80022014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80022030 l .text.rvmodel 00000000 Mclr_Mext_int +80005390 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80022048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002205c l .text.rvmodel 00000000 Mclr_Stmr_int +80022068 l .text.rvmodel 00000000 Mclr_Sext_int +8002209c l .text.rvmodel 00000000 Mclr_Vsw_int +800220b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800220cc l .text.rvmodel 00000000 Mclr_Vext_int +800054e0 l .text.rvtest 00000000 rtn_fm_mmode +800054cc l .text.rvtest 00000000 from_hs_u +800054bc l .text.rvtest 00000000 from_vs +80010360 l .data 00000000 begin_failure_scratch +8000559c l .text.rvtest 00000000 failedtest_saveregs +8000560c l .text.rvtest 00000000 failedtest_saveresults +80010360 l .data 00000000 failure_type +800057ac l .text.rvtest 00000000 failedtest_saveresults_trap +8000561c l .text.rvtest 00000000 failedtest_saveresults_int +80005734 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000576c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80005aa0 l .text.rvtest 00000000 failedtest_saveresults_common +80010488 l .data 00000000 failure_diag_type +80010498 l .data 00000000 trap_diag_fail_str_ptr +80005a60 l .text.rvtest 00000000 trap_diag_offset_mismatch +80010490 l .data 00000000 trap_diag_subtype +80005a74 l .text.rvtest 00000000 trap_diag_field_identified +80010fd7 l .data 00000000 sv_Mtval2_str +80011015 l .data 00000000 sv_Mtinst_str +80010c30 l .data 00000000 sv_Svect_str +80010d30 l .data 00000000 sv_Scause_str +80010e29 l .data 00000000 sv_Sepc_str +80010f1d l .data 00000000 sv_Stval_str +8001108e l .data 00000000 sv_Sip_str +80010c70 l .data 00000000 sv_Hvect_str +80010d6e l .data 00000000 sv_Hcause_str +80010e65 l .data 00000000 sv_Hepc_str +80010f5a l .data 00000000 sv_Htval_str +800110c9 l .data 00000000 sv_Hip_str +80010cb1 l .data 00000000 sv_Vvect_str +80010dad l .data 00000000 sv_Vcause_str +80010ea2 l .data 00000000 sv_Vepc_str +80010f98 l .data 00000000 sv_Vtval_str +80011105 l .data 00000000 sv_Vip_str +80011142 l .data 00000000 Mclr_Mext_int_str +80011191 l .data 00000000 Mclr_Sext_int_str +8001128c l .data 00000000 Sclr_Sext_int_str +80011388 l .data 00000000 Hclr_Sext_int_str +80005a90 l .text.rvtest 00000000 trap_diag_generic_report +80010494 l .data 00000000 trap_diag_mode +80005ad0 l .text.rvtest 00000000 failedtest_report +80005ad0 l .text.rvtest 00000000 print_failstr +80005b48 l .text.rvtest 00000000 print_testnamestr +80010adc l .data 00000000 testnamestr +80005b88 l .text.rvtest 00000000 print_failure_test_name_str +80010480 l .data 00000000 failure_string_ptr +80005b98 l .text.rvtest 00000000 print_newline_str +8000610c l .text.rvtest 00000000 failedtest_report_trap_detailed +80010af0 l .data 00000000 inststr +80010460 l .data 00000000 failing_instruction +80010b04 l .data 00000000 addrstr +80010468 l .data 00000000 failing_addr +8001153b l .data 00000000 regstr +80005d78 l .text.rvtest 00000000 failedtest_report_not_intreg +80010464 l .data 00000000 failing_reg +80007094 l .text.rvtest 00000000 failedtest_dec_to_str +80005e8c l .text.rvtest 00000000 failedtest_report_print_regstr +80005dcc l .text.rvtest 00000000 failedtest_report_fpreg +80005e18 l .text.rvtest 00000000 failedtest_report_vecreg +80005e54 l .text.rvtest 00000000 failedtest_report_vxsat +80011651 l .data 00000000 fflagsstr +80005ec8 l .text.rvtest 00000000 failedtest_report_after_reg +80011534 l .data 00000000 vxsatstr +8001154c l .data 00000000 badvalstr +80005f2c l .text.rvtest 00000000 failedtest_report_badval_not_fp +80010470 l .data 00000000 failing_value +80005f3c l .text.rvtest 00000000 failedtest_report_badval_done +8000600c l .text.rvtest 00000000 failedtest_report_diag +80011563 l .data 00000000 expvalstr +80005fcc l .text.rvtest 00000000 failedtest_report_expval_not_fp +80010478 l .data 00000000 expected_value +80005fdc l .text.rvtest 00000000 failedtest_report_expval_done +80006dc4 l .text.rvtest 00000000 failedtest_report_end +8000608c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80006014 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +8001157a l .data 00000000 failure_diag_bad_instr_str +800115d8 l .data 00000000 failure_diag_bad_ptr_str +800061d0 l .text.rvtest 00000000 trap_report_offset_mismatch +8001167d l .data 00000000 trap_diag_header_str +800116a9 l .data 00000000 trap_diag_origstr_label +80006c50 l .text.rvtest 00000000 trap_report_generic +8000650c l .text.rvtest 00000000 trap_report_field_mismatch +800116b9 l .data 00000000 trap_diag_expected_offset_str +800116e4 l .data 00000000 trap_diag_actual_offset_str +800063ec l .text.rvtest 00000000 trap_report_missing_traps +800062dc l .text.rvtest 00000000 trap_report_extra_traps +80011713 l .data 00000000 trap_diag_extra_traps_str +8001177b l .data 00000000 trap_diag_diff_bytes_str +800117a2 l .data 00000000 trap_diag_extra_next_step_str +8001173f l .data 00000000 trap_diag_missing_traps_str +8001188a l .data 00000000 trap_diag_missing_next_step_str +80011971 l .data 00000000 trap_diag_handler_mode_str +800065a4 l .text.rvtest 00000000 trap_mode_m +800065e4 l .text.rvtest 00000000 trap_mode_s +80006624 l .text.rvtest 00000000 trap_mode_h +80006664 l .text.rvtest 00000000 trap_mode_v +800119ad l .data 00000000 trap_diag_mode_unknown_str +800066a0 l .text.rvtest 00000000 trap_mode_print +8001198b l .data 00000000 trap_diag_mode_m_str +80011993 l .data 00000000 trap_diag_mode_s_str +8001199b l .data 00000000 trap_diag_mode_hs_str +800119a4 l .data 00000000 trap_diag_mode_vs_str +800119b6 l .data 00000000 trap_diag_field_str +80006764 l .text.rvtest 00000000 trap_field_vect +800067a4 l .text.rvtest 00000000 trap_field_cause +800067e4 l .text.rvtest 00000000 trap_field_epc +80006824 l .text.rvtest 00000000 trap_field_tval +80006864 l .text.rvtest 00000000 trap_field_ip +800068a4 l .text.rvtest 00000000 trap_field_tval2 +800068e4 l .text.rvtest 00000000 trap_field_tinst +80006924 l .text.rvtest 00000000 trap_field_intid +80011b0d l .data 00000000 trap_diag_field_unknown_str +80006960 l .text.rvtest 00000000 trap_field_print +800119d0 l .data 00000000 trap_diag_field_vect_str +80011a01 l .data 00000000 trap_diag_field_cause_str +80011a21 l .data 00000000 trap_diag_field_epc_str +80011a3f l .data 00000000 trap_diag_field_tval_str +80011a5e l .data 00000000 trap_diag_field_ip_str +80011a86 l .data 00000000 trap_diag_field_tval2_str +80011ab2 l .data 00000000 trap_diag_field_tinst_str +80011ade l .data 00000000 trap_diag_field_intid_str +80011b1c l .data 00000000 trap_diag_expected_str +80011b33 l .data 00000000 trap_diag_actual_str +80006afc l .text.rvtest 00000000 trap_field_not_cause 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l .data 00000000 csr_context_ret_addr +80010b99 l .data 00000000 mepcstr +80010ba9 l .data 00000000 mcausestr +800104b0 l .data 00000000 saved_xcause +80010bb9 l .data 00000000 mtvalstr +800104b8 l .data 00000000 saved_xtval +80010bc9 l .data 00000000 mstatusstr +800104c0 l .data 00000000 saved_xstatus +80007058 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80007074 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80007078 l .text.rvtest 00000000 failedtest_hex_to_str_write +800220e4 l .text.rvmodel 00000000 uart_init +800220e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80022120 l .text.rvmodel 00000000 init_Mscratch +80022128 l .text.rvmodel 00000000 init_Mtimecmp +8002213c l .text.rvmodel 00000000 init_Medeleg +80022144 l .text.rvmodel 00000000 init_Msatp +80022144 l .text.rvmodel 00000000 init_Mtvec +80022264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80022224 l .text.rvmodel 00000000 abortMtest +8002217c l .text.rvmodel 00000000 init_Mtramp +800221ec l .text.rvmodel 00000000 overwt_tt_Mloop +800221ec l .text.rvmodel 00000000 ovlpok_Mtramp +80022214 l .text.rvmodel 00000000 endcopy_Mtramp +80022268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80022324 l .text.rvmodel 00000000 rvtest_init_regs +800120b0 l .data 00000000 signature_base +800224c0 l .text.rvmodel 00000000 canary_check +80011659 l .data 00000000 canary_mismatch +800225b0 l .text.rvmodel 00000000 write_tohost_pass +800225b8 l .text.rvmodel 00000000 pass +800225d0 l .text.rvmodel 00000000 write_tohost_fail +800225d8 l .text.rvmodel 00000000 fail +800225e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800225f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80022600 l .text.rvmodel 00000000 rvtest_set_mext_int +80022614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80008000 l .data 00000000 scratch +800082e8 l .data 00000000 Msave_area +800082e8 l .data 00000000 Mcode_bgn_ptr +800082f0 l .data 00000000 Mcode_seg_sz +800082f8 l .data 00000000 Mdata_bgn_ptr +80008300 l .data 00000000 Mdata_seg_sz +80008308 l .data 00000000 Msig_bgn_ptr +80008310 l .data 00000000 Msig_seg_sz +80008318 l .data 00000000 Mvmem_bgn_ptr +80008320 l .data 00000000 Mvmem_seg_sz +80008330 l .data 00000000 Msatp_sv +80008338 l .data 00000000 Msved_misa +80008338 l .data 00000000 Msved_hgatp +80008338 l .data 00000000 Msved_mpp +80008338 l .data 00000000 Munused +80008340 l .data 00000000 Mtentry_sv +80008348 l .data 00000000 Medeleg_sv +80008350 l .data 00000000 Mtvec_new +80008358 l .data 00000000 Mtvec_save +80008360 l .data 00000000 Mscratch_save +80008368 l .data 00000000 Mtrapreg_sv +80008388 l .data 00000000 Mrvmodel_sv +800083a8 l .data 00000000 Msv_area_end +800104f0 l .data 00000000 end_failure_scratch +80010590 l .data 00000000 trap_excpt_name_0 +800105b0 l .data 00000000 trap_excpt_name_1 +800105ca l .data 00000000 trap_excpt_name_2 +800105df l .data 00000000 trap_excpt_name_3 +800105eb l .data 00000000 trap_excpt_name_4 +80010604 l .data 00000000 trap_excpt_name_5 +80010617 l .data 00000000 trap_excpt_name_6 +80010635 l .data 00000000 trap_excpt_name_7 +8001064d l .data 00000000 trap_excpt_name_8 +8001066b l .data 00000000 trap_excpt_name_9 +80010689 l .data 00000000 trap_excpt_name_10 +800106a8 l .data 00000000 trap_excpt_name_11 +800106c6 l .data 00000000 trap_excpt_name_12 +800106de l .data 00000000 trap_excpt_name_13 +800106ef l .data 00000000 trap_excpt_name_14 +800106fe l .data 00000000 trap_excpt_name_15 +80010714 l .data 00000000 trap_excpt_name_16 +80010721 l .data 00000000 trap_excpt_name_17 +80010730 l .data 00000000 trap_excpt_name_18 +80010740 l .data 00000000 trap_excpt_name_19 +80010750 l .data 00000000 trap_excpt_name_20 +8001076e l .data 00000000 trap_excpt_name_21 +80010785 l .data 00000000 trap_excpt_name_22 +8001079a l .data 00000000 trap_excpt_name_23 +800107b6 l .data 00000000 trap_int_name_0 +800107ce l .data 00000000 trap_int_name_1 +800107ed l .data 00000000 trap_int_name_2 +80010814 l .data 00000000 trap_int_name_3 +80010830 l .data 00000000 trap_int_name_4 +80010848 l .data 00000000 trap_int_name_5 +80010864 l .data 00000000 trap_int_name_6 +80010888 l .data 00000000 trap_int_name_7 +800108a1 l .data 00000000 trap_int_name_8 +800108b9 l .data 00000000 trap_int_name_9 +800108d8 l .data 00000000 trap_int_name_10 +800108ff l .data 00000000 trap_int_name_11 +8001091b l .data 00000000 trap_int_name_12 +80010940 l .data 00000000 trap_int_name_13 +8001095c l .data 00000000 trap_int_name_14 +80010975 l .data 00000000 trap_int_name_15 +80010b45 l .data 00000000 xepcstr +800111e3 l .data 00000000 Mclr_Vext_int_str +8001123d l .data 00000000 Sclr_Mext_int_str +800112de l .data 00000000 Sclr_Vext_int_str +80011338 l .data 00000000 Hclr_Mext_int_str +800113db l .data 00000000 Hclr_Vext_int_str +80011436 l .data 00000000 Vclr_Mext_int_str +80011486 l .data 00000000 Vclr_Sext_int_str +800114d9 l .data 00000000 Vclr_Vext_int_str +80011b78 l .data 00000000 trap_diag_curr_xepc_str +80021170 g .data 00000000 end_signature +80022580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80021170 g .data 00000000 rvtest_sig_end +80004998 g .text.rvtest 00000000 common_Mentry +800044d0 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +800120b0 g .data 00000000 begin_signature +80008108 g .data 00000000 rvtest_trap_count +80004478 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +800120b0 g .data 00000000 rvtest_sig_begin +800083b0 g .data 00000000 rvtest_data_begin +80008110 g .data 00000000 Mtramptbl_sv +800120ab g .data 00000000 rvtest_data_end +80004478 g .text.rvtest 00000000 cleanup_epilogs +80023000 g .text.rvmodel 00000000 _end +80021300 g .tohost 00000000 fromhost +80021200 g .tohost 00000000 tohost +80004730 g .text.rvtest 00000000 rvtest_fail_summary +800047c0 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00022097 auipc x1,0x22 +80000004: 0e408093 addi x1,x1,228 # 800220e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xbac82698 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x8a92bf27 +80000048: 0001a903 lw x18,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zknh_sha512sum1r_cg_cp_rs1_b0: + sha512sum1r x6, x0, x18 # perform operation +80000050: 53200333 sha512sum1r x6,x0,x18 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha512sum1r_cg_cp_rs1_b0, Zknh_sha512sum1r_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00620863 beq x4,x6,80000068 +8000005c: 4a4052ef jal x5,80005500 +80000060: 80000050 .word 0x80000050 +80000064: 80008ff0 .word 0x80008ff0 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x8dd60724 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x582d3557 +80000074: 0001a683 lw x13,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zknh_sha512sum1r_cg_cp_rs1_b1: + sha512sum1r x22, x1, x13 # perform operation +8000007c: 52d08b33 sha512sum1r x22,x1,x13 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknh_sha512sum1r_cg_cp_rs1_b1, Zknh_sha512sum1r_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01620863 beq x4,x22,80000094 +80000088: 478052ef jal x5,80005500 +8000008c: 8000007c .word 0x8000007c +80000090: 80009028 .word 0x80009028 +80000094: 00410113 addi x2,x2,4 + + mv x29, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010e93 addi x29,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xe9c656d5 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x6efd2e3a +800000a4: 0001a003 lw x0,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zknh_sha512sum1r_cg_cp_rs1_b2: + sha512sum1r x31, x2, x0 # perform operation +800000ac: 52010fb3 sha512sum1r x31,x2,x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zknh_sha512sum1r_cg_cp_rs1_b2, Zknh_sha512sum1r_cg_cp_rs1_b2_str) +800000b0: 000ea203 lw x4,0(x29) +800000b4: 01f20863 beq x4,x31,800000c4 +800000b8: 448052ef jal x5,80005500 +800000bc: 800000ac .word 0x800000ac +800000c0: 80009060 .word 0x80009060 +800000c4: 004e8e93 addi x29,x29,4 + + mv x2, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018113 addi x2,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xe42d5d7f +800000cc: 00012183 lw x3,0(x2) +800000d0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xd317bbe6 +800000d4: 00012983 lw x19,0(x2) +800000d8: 00410113 addi x2,x2,4 + +800000dc : +Zknh_sha512sum1r_cg_cp_rs1_b3: + sha512sum1r x10, x3, x19 # perform operation +800000dc: 53318533 sha512sum1r x10,x3,x19 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zknh_sha512sum1r_cg_cp_rs1_b3, Zknh_sha512sum1r_cg_cp_rs1_b3_str) +800000e0: 000ea203 lw x4,0(x29) +800000e4: 00a20863 beq x4,x10,800000f4 +800000e8: 418052ef jal x5,80005500 +800000ec: 800000dc .word 0x800000dc +800000f0: 80009098 .word 0x80009098 +800000f4: 004e8e93 addi x29,x29,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x2, x4) # load rs1: x4 = 0xdaf2c96e +80000100: 00012203 lw x4,0(x2) +80000104: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xa2df50f9 +80000108: 00012d83 lw x27,0(x2) +8000010c: 00410113 addi x2,x2,4 + +80000110 : +Zknh_sha512sum1r_cg_cp_rs1_b4: + sha512sum1r x26, x4, x27 # perform operation +80000110: 53b20d33 sha512sum1r x26,x4,x27 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zknh_sha512sum1r_cg_cp_rs1_b4, Zknh_sha512sum1r_cg_cp_rs1_b4_str) +80000114: 000ea383 lw x7,0(x29) +80000118: 01a38863 beq x7,x26,80000128 +8000011c: 3fc0546f jal x8,80005518 +80000120: 80000110 .word 0x80000110 +80000124: 800090d0 .word 0x800090d0 +80000128: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0x421eeb51 +8000012c: 00012283 lw x5,0(x2) +80000130: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x9b2a7b07 +80000134: 00012083 lw x1,0(x2) +80000138: 00410113 addi x2,x2,4 + +8000013c : +Zknh_sha512sum1r_cg_cp_rs1_b5: + sha512sum1r x11, x5, x1 # perform operation +8000013c: 521285b3 sha512sum1r x11,x5,x1 + # Check if x11 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x11, Zknh_sha512sum1r_cg_cp_rs1_b5, Zknh_sha512sum1r_cg_cp_rs1_b5_str) +80000140: 000ea383 lw x7,0(x29) +80000144: 00b38863 beq x7,x11,80000154 +80000148: 3d00546f jal x8,80005518 +8000014c: 8000013c .word 0x8000013c +80000150: 80009108 .word 0x80009108 +80000154: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x82ff418d +80000158: 00012303 lw x6,0(x2) +8000015c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xd1dc00c7 +80000160: 00012703 lw x14,0(x2) +80000164: 00410113 addi x2,x2,4 + +80000168 : +Zknh_sha512sum1r_cg_cp_rs1_b6: + sha512sum1r x3, x6, x14 # perform operation +80000168: 52e301b3 sha512sum1r x3,x6,x14 + # Check if x3 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x3, Zknh_sha512sum1r_cg_cp_rs1_b6, Zknh_sha512sum1r_cg_cp_rs1_b6_str) +8000016c: 000ea383 lw x7,0(x29) +80000170: 00338863 beq x7,x3,80000180 +80000174: 3a40546f jal x8,80005518 +80000178: 80000168 .word 0x80000168 +8000017c: 80009140 .word 0x80009140 +80000180: 004e8e93 addi x29,x29,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x8f653d3d +8000018c: 00012383 lw x7,0(x2) +80000190: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xf74127da +80000194: 00012783 lw x15,0(x2) +80000198: 00410113 addi x2,x2,4 + +8000019c : +Zknh_sha512sum1r_cg_cp_rs1_b7: + sha512sum1r x11, x7, x15 # perform operation +8000019c: 52f385b3 sha512sum1r x11,x7,x15 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zknh_sha512sum1r_cg_cp_rs1_b7, Zknh_sha512sum1r_cg_cp_rs1_b7_str) +800001a0: 000ea203 lw x4,0(x29) +800001a4: 00b20863 beq x4,x11,800001b4 +800001a8: 358052ef jal x5,80005500 +800001ac: 8000019c .word 0x8000019c +800001b0: 80009178 .word 0x80009178 +800001b4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x35413d44 +800001b8: 00012403 lw x8,0(x2) +800001bc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x11567453 +800001c0: 00012603 lw x12,0(x2) +800001c4: 00410113 addi x2,x2,4 + +800001c8 : +Zknh_sha512sum1r_cg_cp_rs1_b8: + sha512sum1r x10, x8, x12 # perform operation +800001c8: 52c40533 sha512sum1r x10,x8,x12 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zknh_sha512sum1r_cg_cp_rs1_b8, Zknh_sha512sum1r_cg_cp_rs1_b8_str) +800001cc: 000ea203 lw x4,0(x29) +800001d0: 00a20863 beq x4,x10,800001e0 +800001d4: 32c052ef jal x5,80005500 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 800091b0 .word 0x800091b0 +800001e0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x6009f079 +800001e4: 00012483 lw x9,0(x2) +800001e8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xc08bba6d +800001ec: 00012403 lw x8,0(x2) +800001f0: 00410113 addi x2,x2,4 + +800001f4 : +Zknh_sha512sum1r_cg_cp_rs1_b9: + sha512sum1r x14, x9, x8 # perform operation +800001f4: 52848733 sha512sum1r x14,x9,x8 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zknh_sha512sum1r_cg_cp_rs1_b9, Zknh_sha512sum1r_cg_cp_rs1_b9_str) +800001f8: 000ea203 lw x4,0(x29) +800001fc: 00e20863 beq x4,x14,8000020c +80000200: 300052ef jal x5,80005500 +80000204: 800001f4 .word 0x800001f4 +80000208: 800091e8 .word 0x800091e8 +8000020c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xef88a8cb +80000210: 00012503 lw x10,0(x2) +80000214: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x760d7025 +80000218: 00012403 lw x8,0(x2) +8000021c: 00410113 addi x2,x2,4 + +80000220 : +Zknh_sha512sum1r_cg_cp_rs1_b10: + sha512sum1r x16, x10, x8 # perform operation +80000220: 52850833 sha512sum1r x16,x10,x8 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zknh_sha512sum1r_cg_cp_rs1_b10, Zknh_sha512sum1r_cg_cp_rs1_b10_str) +80000224: 000ea203 lw x4,0(x29) +80000228: 01020863 beq x4,x16,80000238 +8000022c: 2d4052ef jal x5,80005500 +80000230: 80000220 .word 0x80000220 +80000234: 80009221 .word 0x80009221 +80000238: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x32b48deb +8000023c: 00012583 lw x11,0(x2) +80000240: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x27ef3c60 +80000244: 00012803 lw x16,0(x2) +80000248: 00410113 addi x2,x2,4 + +8000024c : +Zknh_sha512sum1r_cg_cp_rs1_b11: + sha512sum1r x8, x11, x16 # perform operation +8000024c: 53058433 sha512sum1r x8,x11,x16 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zknh_sha512sum1r_cg_cp_rs1_b11, Zknh_sha512sum1r_cg_cp_rs1_b11_str) +80000250: 000ea203 lw x4,0(x29) +80000254: 00820863 beq x4,x8,80000264 +80000258: 2a8052ef jal x5,80005500 +8000025c: 8000024c .word 0x8000024c +80000260: 8000925b .word 0x8000925b +80000264: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xcc24cd2c +80000268: 00012603 lw x12,0(x2) +8000026c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x9f992ce2 +80000270: 00012e03 lw x28,0(x2) +80000274: 00410113 addi x2,x2,4 + +80000278 : +Zknh_sha512sum1r_cg_cp_rs1_b12: + sha512sum1r x23, x12, x28 # perform operation +80000278: 53c60bb3 sha512sum1r x23,x12,x28 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zknh_sha512sum1r_cg_cp_rs1_b12, Zknh_sha512sum1r_cg_cp_rs1_b12_str) +8000027c: 000ea203 lw x4,0(x29) +80000280: 01720863 beq x4,x23,80000290 +80000284: 27c052ef jal x5,80005500 +80000288: 80000278 .word 0x80000278 +8000028c: 80009295 .word 0x80009295 +80000290: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x375c1a52 +80000294: 00012683 lw x13,0(x2) +80000298: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x8e6cd57a +8000029c: 00012c83 lw x25,0(x2) +800002a0: 00410113 addi x2,x2,4 + +800002a4 : +Zknh_sha512sum1r_cg_cp_rs1_b13: + sha512sum1r x21, x13, x25 # perform operation +800002a4: 53968ab3 sha512sum1r x21,x13,x25 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zknh_sha512sum1r_cg_cp_rs1_b13, Zknh_sha512sum1r_cg_cp_rs1_b13_str) +800002a8: 000ea203 lw x4,0(x29) +800002ac: 01520863 beq x4,x21,800002bc +800002b0: 250052ef jal x5,80005500 +800002b4: 800002a4 .word 0x800002a4 +800002b8: 800092cf .word 0x800092cf +800002bc: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x939775cd +800002c0: 00012703 lw x14,0(x2) +800002c4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xdb02ad0a +800002c8: 00012803 lw x16,0(x2) +800002cc: 00410113 addi x2,x2,4 + +800002d0 : +Zknh_sha512sum1r_cg_cp_rs1_b14: + sha512sum1r x7, x14, x16 # perform operation +800002d0: 530703b3 sha512sum1r x7,x14,x16 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zknh_sha512sum1r_cg_cp_rs1_b14, Zknh_sha512sum1r_cg_cp_rs1_b14_str) +800002d4: 000ea203 lw x4,0(x29) +800002d8: 00720863 beq x4,x7,800002e8 +800002dc: 224052ef jal x5,80005500 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 80009309 .word 0x80009309 +800002e8: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x430dbe32 +800002ec: 00012783 lw x15,0(x2) +800002f0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x83335b1a +800002f4: 00012e03 lw x28,0(x2) +800002f8: 00410113 addi x2,x2,4 + +800002fc : +Zknh_sha512sum1r_cg_cp_rs1_b15: + sha512sum1r x22, x15, x28 # perform operation +800002fc: 53c78b33 sha512sum1r x22,x15,x28 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zknh_sha512sum1r_cg_cp_rs1_b15, Zknh_sha512sum1r_cg_cp_rs1_b15_str) +80000300: 000ea203 lw x4,0(x29) +80000304: 01620863 beq x4,x22,80000314 +80000308: 1f8052ef jal x5,80005500 +8000030c: 800002fc .word 0x800002fc +80000310: 80009343 .word 0x80009343 +80000314: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xb94192cf +80000318: 00012803 lw x16,0(x2) +8000031c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x947f5ecb +80000320: 00012783 lw x15,0(x2) +80000324: 00410113 addi x2,x2,4 + +80000328 : +Zknh_sha512sum1r_cg_cp_rs1_b16: + sha512sum1r x10, x16, x15 # perform operation +80000328: 52f80533 sha512sum1r x10,x16,x15 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zknh_sha512sum1r_cg_cp_rs1_b16, Zknh_sha512sum1r_cg_cp_rs1_b16_str) +8000032c: 000ea203 lw x4,0(x29) +80000330: 00a20863 beq x4,x10,80000340 +80000334: 1cc052ef jal x5,80005500 +80000338: 80000328 .word 0x80000328 +8000033c: 8000937d .word 0x8000937d +80000340: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x6e85f6b4 +80000344: 00012883 lw x17,0(x2) +80000348: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x77d999d8 +8000034c: 00012503 lw x10,0(x2) +80000350: 00410113 addi x2,x2,4 + +80000354 : +Zknh_sha512sum1r_cg_cp_rs1_b17: + sha512sum1r x8, x17, x10 # perform operation +80000354: 52a88433 sha512sum1r x8,x17,x10 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zknh_sha512sum1r_cg_cp_rs1_b17, Zknh_sha512sum1r_cg_cp_rs1_b17_str) +80000358: 000ea203 lw x4,0(x29) +8000035c: 00820863 beq x4,x8,8000036c +80000360: 1a0052ef jal x5,80005500 +80000364: 80000354 .word 0x80000354 +80000368: 800093b7 .word 0x800093b7 +8000036c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x08fb445a +80000370: 00012903 lw x18,0(x2) +80000374: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xe5b9640d +80000378: 00012c03 lw x24,0(x2) +8000037c: 00410113 addi x2,x2,4 + +80000380 : +Zknh_sha512sum1r_cg_cp_rs1_b18: + sha512sum1r x16, x18, x24 # perform operation +80000380: 53890833 sha512sum1r x16,x18,x24 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zknh_sha512sum1r_cg_cp_rs1_b18, Zknh_sha512sum1r_cg_cp_rs1_b18_str) +80000384: 000ea203 lw x4,0(x29) +80000388: 01020863 beq x4,x16,80000398 +8000038c: 174052ef jal x5,80005500 +80000390: 80000380 .word 0x80000380 +80000394: 800093f1 .word 0x800093f1 +80000398: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x27fcbdb9 +8000039c: 00012983 lw x19,0(x2) +800003a0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x37729c82 +800003a4: 00012683 lw x13,0(x2) +800003a8: 00410113 addi x2,x2,4 + +800003ac : +Zknh_sha512sum1r_cg_cp_rs1_b19: + sha512sum1r x23, x19, x13 # perform operation +800003ac: 52d98bb3 sha512sum1r x23,x19,x13 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zknh_sha512sum1r_cg_cp_rs1_b19, Zknh_sha512sum1r_cg_cp_rs1_b19_str) +800003b0: 000ea203 lw x4,0(x29) +800003b4: 01720863 beq x4,x23,800003c4 +800003b8: 148052ef jal x5,80005500 +800003bc: 800003ac .word 0x800003ac +800003c0: 8000942b .word 0x8000942b +800003c4: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x2caeb3f6 +800003c8: 00012a03 lw x20,0(x2) +800003cc: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x37ad496b +800003d0: 00012c03 lw x24,0(x2) +800003d4: 00410113 addi x2,x2,4 + +800003d8 : +Zknh_sha512sum1r_cg_cp_rs1_b20: + sha512sum1r x21, x20, x24 # perform operation +800003d8: 538a0ab3 sha512sum1r x21,x20,x24 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zknh_sha512sum1r_cg_cp_rs1_b20, Zknh_sha512sum1r_cg_cp_rs1_b20_str) +800003dc: 000ea203 lw x4,0(x29) +800003e0: 01520863 beq x4,x21,800003f0 +800003e4: 11c052ef jal x5,80005500 +800003e8: 800003d8 .word 0x800003d8 +800003ec: 80009465 .word 0x80009465 +800003f0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x6c739c22 +800003f4: 00012a83 lw x21,0(x2) +800003f8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0bb1a2a8 +800003fc: 00012903 lw x18,0(x2) +80000400: 00410113 addi x2,x2,4 + +80000404 : +Zknh_sha512sum1r_cg_cp_rs1_b21: + sha512sum1r x25, x21, x18 # perform operation +80000404: 532a8cb3 sha512sum1r x25,x21,x18 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zknh_sha512sum1r_cg_cp_rs1_b21, Zknh_sha512sum1r_cg_cp_rs1_b21_str) +80000408: 000ea203 lw x4,0(x29) +8000040c: 01920863 beq x4,x25,8000041c +80000410: 0f0052ef jal x5,80005500 +80000414: 80000404 .word 0x80000404 +80000418: 8000949f .word 0x8000949f +8000041c: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xeeedd5aa +80000420: 00012b03 lw x22,0(x2) +80000424: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x6181da5a +80000428: 00012303 lw x6,0(x2) +8000042c: 00410113 addi x2,x2,4 + +80000430 : +Zknh_sha512sum1r_cg_cp_rs1_b22: + sha512sum1r x19, x22, x6 # perform operation +80000430: 526b09b3 sha512sum1r x19,x22,x6 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zknh_sha512sum1r_cg_cp_rs1_b22, Zknh_sha512sum1r_cg_cp_rs1_b22_str) +80000434: 000ea203 lw x4,0(x29) +80000438: 01320863 beq x4,x19,80000448 +8000043c: 0c4052ef jal x5,80005500 +80000440: 80000430 .word 0x80000430 +80000444: 800094d9 .word 0x800094d9 +80000448: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x83055211 +8000044c: 00012b83 lw x23,0(x2) +80000450: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xfe673cd1 +80000454: 00012183 lw x3,0(x2) +80000458: 00410113 addi x2,x2,4 + +8000045c : +Zknh_sha512sum1r_cg_cp_rs1_b23: + sha512sum1r x1, x23, x3 # perform operation +8000045c: 523b80b3 sha512sum1r x1,x23,x3 + # Check if x1 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x1, Zknh_sha512sum1r_cg_cp_rs1_b23, Zknh_sha512sum1r_cg_cp_rs1_b23_str) +80000460: 000ea203 lw x4,0(x29) +80000464: 00120863 beq x4,x1,80000474 +80000468: 098052ef jal x5,80005500 +8000046c: 8000045c .word 0x8000045c +80000470: 80009513 .word 0x80009513 +80000474: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x8d6824b3 +80000478: 00012c03 lw x24,0(x2) +8000047c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x4dee5f48 +80000480: 00012303 lw x6,0(x2) +80000484: 00410113 addi x2,x2,4 + +80000488 : +Zknh_sha512sum1r_cg_cp_rs1_b24: + sha512sum1r x12, x24, x6 # perform operation +80000488: 526c0633 sha512sum1r x12,x24,x6 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zknh_sha512sum1r_cg_cp_rs1_b24, Zknh_sha512sum1r_cg_cp_rs1_b24_str) +8000048c: 000ea203 lw x4,0(x29) +80000490: 00c20863 beq x4,x12,800004a0 +80000494: 06c052ef jal x5,80005500 +80000498: 80000488 .word 0x80000488 +8000049c: 8000954d .word 0x8000954d +800004a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xc921a6b8 +800004a4: 00012c83 lw x25,0(x2) +800004a8: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xe7324231 +800004ac: 00012083 lw x1,0(x2) +800004b0: 00410113 addi x2,x2,4 + +800004b4 : +Zknh_sha512sum1r_cg_cp_rs1_b25: + sha512sum1r x15, x25, x1 # perform operation +800004b4: 521c87b3 sha512sum1r x15,x25,x1 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zknh_sha512sum1r_cg_cp_rs1_b25, Zknh_sha512sum1r_cg_cp_rs1_b25_str) +800004b8: 000ea203 lw x4,0(x29) +800004bc: 00f20863 beq x4,x15,800004cc +800004c0: 040052ef jal x5,80005500 +800004c4: 800004b4 .word 0x800004b4 +800004c8: 80009587 .word 0x80009587 +800004cc: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x55075852 +800004d0: 00012d03 lw x26,0(x2) +800004d4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xf3a5c9c8 +800004d8: 00012083 lw x1,0(x2) +800004dc: 00410113 addi x2,x2,4 + +800004e0 : +Zknh_sha512sum1r_cg_cp_rs1_b26: + sha512sum1r x10, x26, x1 # perform operation +800004e0: 521d0533 sha512sum1r x10,x26,x1 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zknh_sha512sum1r_cg_cp_rs1_b26, Zknh_sha512sum1r_cg_cp_rs1_b26_str) +800004e4: 000ea203 lw x4,0(x29) +800004e8: 00a20863 beq x4,x10,800004f8 +800004ec: 014052ef jal x5,80005500 +800004f0: 800004e0 .word 0x800004e0 +800004f4: 800095c1 .word 0x800095c1 +800004f8: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xb709cde3 +800004fc: 00012d83 lw x27,0(x2) +80000500: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xc4e01e1b +80000504: 00012783 lw x15,0(x2) +80000508: 00410113 addi x2,x2,4 + +8000050c : +Zknh_sha512sum1r_cg_cp_rs1_b27: + sha512sum1r x13, x27, x15 # perform operation +8000050c: 52fd86b3 sha512sum1r x13,x27,x15 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zknh_sha512sum1r_cg_cp_rs1_b27, Zknh_sha512sum1r_cg_cp_rs1_b27_str) +80000510: 000ea203 lw x4,0(x29) +80000514: 00d20863 beq x4,x13,80000524 +80000518: 7e9042ef jal x5,80005500 +8000051c: 8000050c .word 0x8000050c +80000520: 800095fb .word 0x800095fb +80000524: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xaa47cdc1 +80000528: 00012e03 lw x28,0(x2) +8000052c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2c7a5151 +80000530: 00012d03 lw x26,0(x2) +80000534: 00410113 addi x2,x2,4 + +80000538 : +Zknh_sha512sum1r_cg_cp_rs1_b28: + sha512sum1r x14, x28, x26 # perform operation +80000538: 53ae0733 sha512sum1r x14,x28,x26 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zknh_sha512sum1r_cg_cp_rs1_b28, Zknh_sha512sum1r_cg_cp_rs1_b28_str) +8000053c: 000ea203 lw x4,0(x29) +80000540: 00e20863 beq x4,x14,80000550 +80000544: 7bd042ef jal x5,80005500 +80000548: 80000538 .word 0x80000538 +8000054c: 80009635 .word 0x80009635 +80000550: 004e8e93 addi x29,x29,4 + + mv x24, x29 # switch signature pointer register to avoid conflict with test +80000554: 000e8c13 addi x24,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xc36d7b53 +80000558: 00012e83 lw x29,0(x2) +8000055c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xed20ff8c +80000560: 00012083 lw x1,0(x2) +80000564: 00410113 addi x2,x2,4 + +80000568 : +Zknh_sha512sum1r_cg_cp_rs1_b29: + sha512sum1r x0, x29, x1 # perform operation +80000568: 521e8033 sha512sum1r x0,x29,x1 + # Check if x0 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x0, Zknh_sha512sum1r_cg_cp_rs1_b29, Zknh_sha512sum1r_cg_cp_rs1_b29_str) +8000056c: 000c2203 lw x4,0(x24) +80000570: 00020863 beq x4,x0,80000580 +80000574: 78d042ef jal x5,80005500 +80000578: 80000568 .word 0x80000568 +8000057c: 8000966f .word 0x8000966f +80000580: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x9c20f5cb +80000584: 00012f03 lw x30,0(x2) +80000588: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xccaa32e7 +8000058c: 00012a03 lw x20,0(x2) +80000590: 00410113 addi x2,x2,4 + +80000594 : +Zknh_sha512sum1r_cg_cp_rs1_b30: + sha512sum1r x11, x30, x20 # perform operation +80000594: 534f05b3 sha512sum1r x11,x30,x20 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zknh_sha512sum1r_cg_cp_rs1_b30, Zknh_sha512sum1r_cg_cp_rs1_b30_str) +80000598: 000c2203 lw x4,0(x24) +8000059c: 00b20863 beq x4,x11,800005ac +800005a0: 761042ef jal x5,80005500 +800005a4: 80000594 .word 0x80000594 +800005a8: 800096a9 .word 0x800096a9 +800005ac: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xd70fb77f +800005b0: 00012f83 lw x31,0(x2) +800005b4: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x52c05acc +800005b8: 00012583 lw x11,0(x2) +800005bc: 00410113 addi x2,x2,4 + +800005c0 : +Zknh_sha512sum1r_cg_cp_rs1_b31: + sha512sum1r x30, x31, x11 # perform operation +800005c0: 52bf8f33 sha512sum1r x30,x31,x11 + # Check if x30 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x30, Zknh_sha512sum1r_cg_cp_rs1_b31, Zknh_sha512sum1r_cg_cp_rs1_b31_str) +800005c4: 000c2203 lw x4,0(x24) +800005c8: 01e20863 beq x4,x30,800005d8 +800005cc: 735042ef jal x5,80005500 +800005d0: 800005c0 .word 0x800005c0 +800005d4: 800096e3 .word 0x800096e3 +800005d8: 004c0c13 addi x24,x24,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xd7e63944 +800005dc: 00012603 lw x12,0(x2) +800005e0: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xfc6195f2 +800005e4: 00012003 lw x0,0(x2) +800005e8: 00410113 addi x2,x2,4 + +800005ec : +Zknh_sha512sum1r_cg_cp_rs2_b0: + sha512sum1r x7, x12, x0 # perform operation +800005ec: 520603b3 sha512sum1r x7,x12,x0 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zknh_sha512sum1r_cg_cp_rs2_b0, Zknh_sha512sum1r_cg_cp_rs2_b0_str) +800005f0: 000c2203 lw x4,0(x24) +800005f4: 00720863 beq x4,x7,80000604 +800005f8: 709042ef jal x5,80005500 +800005fc: 800005ec .word 0x800005ec +80000600: 8000971d .word 0x8000971d +80000604: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x1cf11e07 +80000608: 00012883 lw x17,0(x2) +8000060c: 00410113 addi x2,x2,4 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x90dda92b +80000610: 00012083 lw x1,0(x2) +80000614: 00410113 addi x2,x2,4 + +80000618 : +Zknh_sha512sum1r_cg_cp_rs2_b1: + sha512sum1r x9, x17, x1 # perform operation +80000618: 521884b3 sha512sum1r x9,x17,x1 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zknh_sha512sum1r_cg_cp_rs2_b1, Zknh_sha512sum1r_cg_cp_rs2_b1_str) +8000061c: 000c2203 lw x4,0(x24) +80000620: 00920863 beq x4,x9,80000630 +80000624: 6dd042ef jal x5,80005500 +80000628: 80000618 .word 0x80000618 +8000062c: 80009756 .word 0x80009756 +80000630: 004c0c13 addi x24,x24,4 + + mv x31, x2 # switch data pointer register to avoid conflict with test +80000634: 00010f93 addi x31,x2,0 +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0xc37f5b47 +80000638: 000fa803 lw x16,0(x31) +8000063c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xd2ca8f9e +80000640: 000fa103 lw x2,0(x31) +80000644: 004f8f93 addi x31,x31,4 + +80000648 : +Zknh_sha512sum1r_cg_cp_rs2_b2: + sha512sum1r x15, x16, x2 # perform operation +80000648: 522807b3 sha512sum1r x15,x16,x2 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zknh_sha512sum1r_cg_cp_rs2_b2, Zknh_sha512sum1r_cg_cp_rs2_b2_str) +8000064c: 000c2203 lw x4,0(x24) +80000650: 00f20863 beq x4,x15,80000660 +80000654: 6ad042ef jal x5,80005500 +80000658: 80000648 .word 0x80000648 +8000065c: 8000978f .word 0x8000978f +80000660: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x5d979e2b +80000664: 000fa703 lw x14,0(x31) +80000668: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0xe2a096bb +8000066c: 000fa183 lw x3,0(x31) +80000670: 004f8f93 addi x31,x31,4 + +80000674 : +Zknh_sha512sum1r_cg_cp_rs2_b3: + sha512sum1r x8, x14, x3 # perform operation +80000674: 52370433 sha512sum1r x8,x14,x3 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zknh_sha512sum1r_cg_cp_rs2_b3, Zknh_sha512sum1r_cg_cp_rs2_b3_str) +80000678: 000c2203 lw x4,0(x24) +8000067c: 00820863 beq x4,x8,8000068c +80000680: 681042ef jal x5,80005500 +80000684: 80000674 .word 0x80000674 +80000688: 800097c8 .word 0x800097c8 +8000068c: 004c0c13 addi x24,x24,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000690: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000694: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x964351e1 +80000698: 000fa903 lw x18,0(x31) +8000069c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0x5ccb62b6 +800006a0: 000fa203 lw x4,0(x31) +800006a4: 004f8f93 addi x31,x31,4 + +800006a8 : +Zknh_sha512sum1r_cg_cp_rs2_b4: + sha512sum1r x7, x18, x4 # perform operation +800006a8: 524903b3 sha512sum1r x7,x18,x4 + # Check if x7 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x7, Zknh_sha512sum1r_cg_cp_rs2_b4, Zknh_sha512sum1r_cg_cp_rs2_b4_str) +800006ac: 000c2683 lw x13,0(x24) +800006b0: 00768863 beq x13,x7,800006c0 +800006b4: 68d0476f jal x14,80005540 +800006b8: 800006a8 .word 0x800006a8 +800006bc: 80009801 .word 0x80009801 +800006c0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x7e2728e0 +800006c4: 000fa603 lw x12,0(x31) +800006c8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x5ea5a3d2 +800006cc: 000fa283 lw x5,0(x31) +800006d0: 004f8f93 addi x31,x31,4 + +800006d4 : +Zknh_sha512sum1r_cg_cp_rs2_b5: + sha512sum1r x0, x12, x5 # perform operation +800006d4: 52560033 sha512sum1r x0,x12,x5 + # Check if x0 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x0, Zknh_sha512sum1r_cg_cp_rs2_b5, Zknh_sha512sum1r_cg_cp_rs2_b5_str) +800006d8: 000c2683 lw x13,0(x24) +800006dc: 00068863 beq x13,x0,800006ec +800006e0: 6610476f jal x14,80005540 +800006e4: 800006d4 .word 0x800006d4 +800006e8: 8000983a .word 0x8000983a +800006ec: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0xcf323a6a +800006f0: 000fa983 lw x19,0(x31) +800006f4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x8ccc5151 +800006f8: 000fa303 lw x6,0(x31) +800006fc: 004f8f93 addi x31,x31,4 + +80000700 : +Zknh_sha512sum1r_cg_cp_rs2_b6: + sha512sum1r x1, x19, x6 # perform operation +80000700: 526980b3 sha512sum1r x1,x19,x6 + # Check if x1 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x1, Zknh_sha512sum1r_cg_cp_rs2_b6, Zknh_sha512sum1r_cg_cp_rs2_b6_str) +80000704: 000c2683 lw x13,0(x24) +80000708: 00168863 beq x13,x1,80000718 +8000070c: 6350476f jal x14,80005540 +80000710: 80000700 .word 0x80000700 +80000714: 80009873 .word 0x80009873 +80000718: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x709718f8 +8000071c: 000fa583 lw x11,0(x31) +80000720: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x8c8cf811 +80000724: 000fa383 lw x7,0(x31) +80000728: 004f8f93 addi x31,x31,4 + +8000072c : +Zknh_sha512sum1r_cg_cp_rs2_b7: + sha512sum1r x16, x11, x7 # perform operation +8000072c: 52758833 sha512sum1r x16,x11,x7 + # Check if x16 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x16, Zknh_sha512sum1r_cg_cp_rs2_b7, Zknh_sha512sum1r_cg_cp_rs2_b7_str) +80000730: 000c2683 lw x13,0(x24) +80000734: 01068863 beq x13,x16,80000744 +80000738: 6090476f jal x14,80005540 +8000073c: 8000072c .word 0x8000072c +80000740: 800098ac .word 0x800098ac +80000744: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x6037d4ff +80000748: 000faa03 lw x20,0(x31) +8000074c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0xda49e796 +80000750: 000fa403 lw x8,0(x31) +80000754: 004f8f93 addi x31,x31,4 + +80000758 : +Zknh_sha512sum1r_cg_cp_rs2_b8: + sha512sum1r x15, x20, x8 # perform operation +80000758: 528a07b3 sha512sum1r x15,x20,x8 + # Check if x15 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x15, Zknh_sha512sum1r_cg_cp_rs2_b8, Zknh_sha512sum1r_cg_cp_rs2_b8_str) +8000075c: 000c2683 lw x13,0(x24) +80000760: 00f68863 beq x13,x15,80000770 +80000764: 5dd0476f jal x14,80005540 +80000768: 80000758 .word 0x80000758 +8000076c: 800098e5 .word 0x800098e5 +80000770: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xf5a92e24 +80000774: 000faa03 lw x20,0(x31) +80000778: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0x7a79f740 +8000077c: 000fa483 lw x9,0(x31) +80000780: 004f8f93 addi x31,x31,4 + +80000784 : +Zknh_sha512sum1r_cg_cp_rs2_b9: + sha512sum1r x2, x20, x9 # perform operation +80000784: 529a0133 sha512sum1r x2,x20,x9 + # Check if x2 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x2, Zknh_sha512sum1r_cg_cp_rs2_b9, Zknh_sha512sum1r_cg_cp_rs2_b9_str) +80000788: 000c2683 lw x13,0(x24) +8000078c: 00268863 beq x13,x2,8000079c +80000790: 5b10476f jal x14,80005540 +80000794: 80000784 .word 0x80000784 +80000798: 8000991e .word 0x8000991e +8000079c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x409a1187 +800007a0: 000fad83 lw x27,0(x31) +800007a4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0xd700def8 +800007a8: 000fa503 lw x10,0(x31) +800007ac: 004f8f93 addi x31,x31,4 + +800007b0 : +Zknh_sha512sum1r_cg_cp_rs2_b10: + sha512sum1r x9, x27, x10 # perform operation +800007b0: 52ad84b3 sha512sum1r x9,x27,x10 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zknh_sha512sum1r_cg_cp_rs2_b10, Zknh_sha512sum1r_cg_cp_rs2_b10_str) +800007b4: 000c2683 lw x13,0(x24) +800007b8: 00968863 beq x13,x9,800007c8 +800007bc: 5850476f jal x14,80005540 +800007c0: 800007b0 .word 0x800007b0 +800007c4: 80009957 .word 0x80009957 +800007c8: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0xfd10fd41 +800007cc: 000fa383 lw x7,0(x31) +800007d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x01e094e9 +800007d4: 000fa583 lw x11,0(x31) +800007d8: 004f8f93 addi x31,x31,4 + +800007dc : +Zknh_sha512sum1r_cg_cp_rs2_b11: + sha512sum1r x27, x7, x11 # perform operation +800007dc: 52b38db3 sha512sum1r x27,x7,x11 + # Check if x27 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x27, Zknh_sha512sum1r_cg_cp_rs2_b11, Zknh_sha512sum1r_cg_cp_rs2_b11_str) +800007e0: 000c2683 lw x13,0(x24) +800007e4: 01b68863 beq x13,x27,800007f4 +800007e8: 5590476f jal x14,80005540 +800007ec: 800007dc .word 0x800007dc +800007f0: 80009991 .word 0x80009991 +800007f4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x87df3696 +800007f8: 000fa383 lw x7,0(x31) +800007fc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0x421ebf0d +80000800: 000fa603 lw x12,0(x31) +80000804: 004f8f93 addi x31,x31,4 + +80000808 : +Zknh_sha512sum1r_cg_cp_rs2_b12: + sha512sum1r x9, x7, x12 # perform operation +80000808: 52c384b3 sha512sum1r x9,x7,x12 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zknh_sha512sum1r_cg_cp_rs2_b12, Zknh_sha512sum1r_cg_cp_rs2_b12_str) +8000080c: 000c2683 lw x13,0(x24) +80000810: 00968863 beq x13,x9,80000820 +80000814: 52d0476f jal x14,80005540 +80000818: 80000808 .word 0x80000808 +8000081c: 800099cb .word 0x800099cb +80000820: 004c0c13 addi x24,x24,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000824: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000828: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x80a4f01d +8000082c: 000faa83 lw x21,0(x31) +80000830: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0xef92925c +80000834: 000fa683 lw x13,0(x31) +80000838: 004f8f93 addi x31,x31,4 + +8000083c : +Zknh_sha512sum1r_cg_cp_rs2_b13: + sha512sum1r x18, x21, x13 # perform operation +8000083c: 52da8933 sha512sum1r x18,x21,x13 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zknh_sha512sum1r_cg_cp_rs2_b13, Zknh_sha512sum1r_cg_cp_rs2_b13_str) +80000840: 000c2383 lw x7,0(x24) +80000844: 01238863 beq x7,x18,80000854 +80000848: 4d10446f jal x8,80005518 +8000084c: 8000083c .word 0x8000083c +80000850: 80009a05 .word 0x80009a05 +80000854: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x657e59d3 +80000858: 000fad03 lw x26,0(x31) +8000085c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0xd8747a2b +80000860: 000fa703 lw x14,0(x31) +80000864: 004f8f93 addi x31,x31,4 + +80000868 : +Zknh_sha512sum1r_cg_cp_rs2_b14: + sha512sum1r x5, x26, x14 # perform operation +80000868: 52ed02b3 sha512sum1r x5,x26,x14 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknh_sha512sum1r_cg_cp_rs2_b14, Zknh_sha512sum1r_cg_cp_rs2_b14_str) +8000086c: 000c2383 lw x7,0(x24) +80000870: 00538863 beq x7,x5,80000880 +80000874: 4a50446f jal x8,80005518 +80000878: 80000868 .word 0x80000868 +8000087c: 80009a3f .word 0x80009a3f +80000880: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x89aea057 +80000884: 000fa583 lw x11,0(x31) +80000888: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xf525cb4e +8000088c: 000fa783 lw x15,0(x31) +80000890: 004f8f93 addi x31,x31,4 + +80000894 : +Zknh_sha512sum1r_cg_cp_rs2_b15: + sha512sum1r x1, x11, x15 # perform operation +80000894: 52f580b3 sha512sum1r x1,x11,x15 + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zknh_sha512sum1r_cg_cp_rs2_b15, Zknh_sha512sum1r_cg_cp_rs2_b15_str) +80000898: 000c2383 lw x7,0(x24) +8000089c: 00138863 beq x7,x1,800008ac +800008a0: 4790446f jal x8,80005518 +800008a4: 80000894 .word 0x80000894 +800008a8: 80009a79 .word 0x80009a79 +800008ac: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0xb09fd00c +800008b0: 000fa703 lw x14,0(x31) +800008b4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x598ff627 +800008b8: 000fa803 lw x16,0(x31) +800008bc: 004f8f93 addi x31,x31,4 + +800008c0 : +Zknh_sha512sum1r_cg_cp_rs2_b16: + sha512sum1r x19, x14, x16 # perform operation +800008c0: 530709b3 sha512sum1r x19,x14,x16 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zknh_sha512sum1r_cg_cp_rs2_b16, Zknh_sha512sum1r_cg_cp_rs2_b16_str) +800008c4: 000c2383 lw x7,0(x24) +800008c8: 01338863 beq x7,x19,800008d8 +800008cc: 44d0446f jal x8,80005518 +800008d0: 800008c0 .word 0x800008c0 +800008d4: 80009ab3 .word 0x80009ab3 +800008d8: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xf43b7114 +800008dc: 000fab03 lw x22,0(x31) +800008e0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0x0cf5795a +800008e4: 000fa883 lw x17,0(x31) +800008e8: 004f8f93 addi x31,x31,4 + +800008ec : +Zknh_sha512sum1r_cg_cp_rs2_b17: + sha512sum1r x16, x22, x17 # perform operation +800008ec: 531b0833 sha512sum1r x16,x22,x17 + # Check if x16 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x16, Zknh_sha512sum1r_cg_cp_rs2_b17, Zknh_sha512sum1r_cg_cp_rs2_b17_str) +800008f0: 000c2383 lw x7,0(x24) +800008f4: 01038863 beq x7,x16,80000904 +800008f8: 4210446f jal x8,80005518 +800008fc: 800008ec .word 0x800008ec +80000900: 80009aed .word 0x80009aed +80000904: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xfc0fde01 +80000908: 000faf03 lw x30,0(x31) +8000090c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x4598740e +80000910: 000fa903 lw x18,0(x31) +80000914: 004f8f93 addi x31,x31,4 + +80000918 : +Zknh_sha512sum1r_cg_cp_rs2_b18: + sha512sum1r x22, x30, x18 # perform operation +80000918: 532f0b33 sha512sum1r x22,x30,x18 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zknh_sha512sum1r_cg_cp_rs2_b18, Zknh_sha512sum1r_cg_cp_rs2_b18_str) +8000091c: 000c2383 lw x7,0(x24) +80000920: 01638863 beq x7,x22,80000930 +80000924: 3f50446f jal x8,80005518 +80000928: 80000918 .word 0x80000918 +8000092c: 80009b27 .word 0x80009b27 +80000930: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x9ee45d66 +80000934: 000fae83 lw x29,0(x31) +80000938: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x862a4a2f +8000093c: 000fa983 lw x19,0(x31) +80000940: 004f8f93 addi x31,x31,4 + +80000944 : +Zknh_sha512sum1r_cg_cp_rs2_b19: + sha512sum1r x6, x29, x19 # perform operation +80000944: 533e8333 sha512sum1r x6,x29,x19 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknh_sha512sum1r_cg_cp_rs2_b19, Zknh_sha512sum1r_cg_cp_rs2_b19_str) +80000948: 000c2383 lw x7,0(x24) +8000094c: 00638863 beq x7,x6,8000095c +80000950: 3c90446f jal x8,80005518 +80000954: 80000944 .word 0x80000944 +80000958: 80009b61 .word 0x80009b61 +8000095c: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xbf7fea6b +80000960: 000fa183 lw x3,0(x31) +80000964: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x7f966653 +80000968: 000faa03 lw x20,0(x31) +8000096c: 004f8f93 addi x31,x31,4 + +80000970 : +Zknh_sha512sum1r_cg_cp_rs2_b20: + sha512sum1r x28, x3, x20 # perform operation +80000970: 53418e33 sha512sum1r x28,x3,x20 + # Check if x28 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x28, Zknh_sha512sum1r_cg_cp_rs2_b20, Zknh_sha512sum1r_cg_cp_rs2_b20_str) +80000974: 000c2383 lw x7,0(x24) +80000978: 01c38863 beq x7,x28,80000988 +8000097c: 39d0446f jal x8,80005518 +80000980: 80000970 .word 0x80000970 +80000984: 80009b9b .word 0x80009b9b +80000988: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0x8930e487 +8000098c: 000fa203 lw x4,0(x31) +80000990: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0x3d2ffc11 +80000994: 000faa83 lw x21,0(x31) +80000998: 004f8f93 addi x31,x31,4 + +8000099c : +Zknh_sha512sum1r_cg_cp_rs2_b21: + sha512sum1r x29, x4, x21 # perform operation +8000099c: 53520eb3 sha512sum1r x29,x4,x21 + # Check if x29 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x29, Zknh_sha512sum1r_cg_cp_rs2_b21, Zknh_sha512sum1r_cg_cp_rs2_b21_str) +800009a0: 000c2383 lw x7,0(x24) +800009a4: 01d38863 beq x7,x29,800009b4 +800009a8: 3710446f jal x8,80005518 +800009ac: 8000099c .word 0x8000099c +800009b0: 80009bd5 .word 0x80009bd5 +800009b4: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x4741b618 +800009b8: 000fa683 lw x13,0(x31) +800009bc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0xbeeab7fc +800009c0: 000fab03 lw x22,0(x31) +800009c4: 004f8f93 addi x31,x31,4 + +800009c8 : +Zknh_sha512sum1r_cg_cp_rs2_b22: + sha512sum1r x0, x13, x22 # perform operation +800009c8: 53668033 sha512sum1r x0,x13,x22 + # Check if x0 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x0, Zknh_sha512sum1r_cg_cp_rs2_b22, Zknh_sha512sum1r_cg_cp_rs2_b22_str) +800009cc: 000c2383 lw x7,0(x24) +800009d0: 00038863 beq x7,x0,800009e0 +800009d4: 3450446f jal x8,80005518 +800009d8: 800009c8 .word 0x800009c8 +800009dc: 80009c0f .word 0x80009c0f +800009e0: 004c0c13 addi x24,x24,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x3cd9f076 +800009e4: 000fa903 lw x18,0(x31) +800009e8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x0da4e7fa +800009ec: 000fab83 lw x23,0(x31) +800009f0: 004f8f93 addi x31,x31,4 + +800009f4 : +Zknh_sha512sum1r_cg_cp_rs2_b23: + sha512sum1r x4, x18, x23 # perform operation +800009f4: 53790233 sha512sum1r x4,x18,x23 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknh_sha512sum1r_cg_cp_rs2_b23, Zknh_sha512sum1r_cg_cp_rs2_b23_str) +800009f8: 000c2383 lw x7,0(x24) +800009fc: 00438863 beq x7,x4,80000a0c +80000a00: 3190446f jal x8,80005518 +80000a04: 800009f4 .word 0x800009f4 +80000a08: 80009c49 .word 0x80009c49 +80000a0c: 004c0c13 addi x24,x24,4 + + mv x28, x24 # switch signature pointer register to avoid conflict with test +80000a10: 000c0e13 addi x28,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xa3e46ffd +80000a14: 000fa783 lw x15,0(x31) +80000a18: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x7114e5d6 +80000a1c: 000fac03 lw x24,0(x31) +80000a20: 004f8f93 addi x31,x31,4 + +80000a24 : +Zknh_sha512sum1r_cg_cp_rs2_b24: + sha512sum1r x14, x15, x24 # perform operation +80000a24: 53878733 sha512sum1r x14,x15,x24 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zknh_sha512sum1r_cg_cp_rs2_b24, Zknh_sha512sum1r_cg_cp_rs2_b24_str) +80000a28: 000e2383 lw x7,0(x28) +80000a2c: 00e38863 beq x7,x14,80000a3c +80000a30: 2e90446f jal x8,80005518 +80000a34: 80000a24 .word 0x80000a24 +80000a38: 80009c83 .word 0x80009c83 +80000a3c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0xbd360873 +80000a40: 000fa083 lw x1,0(x31) +80000a44: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x4b88a67f +80000a48: 000fac83 lw x25,0(x31) +80000a4c: 004f8f93 addi x31,x31,4 + +80000a50 : +Zknh_sha512sum1r_cg_cp_rs2_b25: + sha512sum1r x15, x1, x25 # perform operation +80000a50: 539087b3 sha512sum1r x15,x1,x25 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zknh_sha512sum1r_cg_cp_rs2_b25, Zknh_sha512sum1r_cg_cp_rs2_b25_str) +80000a54: 000e2383 lw x7,0(x28) +80000a58: 00f38863 beq x7,x15,80000a68 +80000a5c: 2bd0446f jal x8,80005518 +80000a60: 80000a50 .word 0x80000a50 +80000a64: 80009cbd .word 0x80009cbd +80000a68: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0x72edcb82 +80000a6c: 000fa103 lw x2,0(x31) +80000a70: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x2b6de0c9 +80000a74: 000fad03 lw x26,0(x31) +80000a78: 004f8f93 addi x31,x31,4 + +80000a7c : +Zknh_sha512sum1r_cg_cp_rs2_b26: + sha512sum1r x25, x2, x26 # perform operation +80000a7c: 53a10cb3 sha512sum1r x25,x2,x26 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknh_sha512sum1r_cg_cp_rs2_b26, Zknh_sha512sum1r_cg_cp_rs2_b26_str) +80000a80: 000e2383 lw x7,0(x28) +80000a84: 01938863 beq x7,x25,80000a94 +80000a88: 2910446f jal x8,80005518 +80000a8c: 80000a7c .word 0x80000a7c +80000a90: 80009cf7 .word 0x80009cf7 +80000a94: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x5aa5fc50 +80000a98: 000fa703 lw x14,0(x31) +80000a9c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xc0876823 +80000aa0: 000fad83 lw x27,0(x31) +80000aa4: 004f8f93 addi x31,x31,4 + +80000aa8 : +Zknh_sha512sum1r_cg_cp_rs2_b27: + sha512sum1r x10, x14, x27 # perform operation +80000aa8: 53b70533 sha512sum1r x10,x14,x27 + # Check if x10 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x10, Zknh_sha512sum1r_cg_cp_rs2_b27, Zknh_sha512sum1r_cg_cp_rs2_b27_str) +80000aac: 000e2383 lw x7,0(x28) +80000ab0: 00a38863 beq x7,x10,80000ac0 +80000ab4: 2650446f jal x8,80005518 +80000ab8: 80000aa8 .word 0x80000aa8 +80000abc: 80009d31 .word 0x80009d31 +80000ac0: 004e0e13 addi x28,x28,4 + + mv x21, x28 # switch signature pointer register to avoid conflict with test +80000ac4: 000e0a93 addi x21,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xc5200959 +80000ac8: 000fa183 lw x3,0(x31) +80000acc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x421abbf1 +80000ad0: 000fae03 lw x28,0(x31) +80000ad4: 004f8f93 addi x31,x31,4 + +80000ad8 : +Zknh_sha512sum1r_cg_cp_rs2_b28: + sha512sum1r x10, x3, x28 # perform operation +80000ad8: 53c18533 sha512sum1r x10,x3,x28 + # Check if x10 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x10, Zknh_sha512sum1r_cg_cp_rs2_b28, Zknh_sha512sum1r_cg_cp_rs2_b28_str) +80000adc: 000aa383 lw x7,0(x21) +80000ae0: 00a38863 beq x7,x10,80000af0 +80000ae4: 2350446f jal x8,80005518 +80000ae8: 80000ad8 .word 0x80000ad8 +80000aec: 80009d6b .word 0x80009d6b +80000af0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x656ee9f9 +80000af4: 000fa283 lw x5,0(x31) +80000af8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xf425e9b0 +80000afc: 000fae83 lw x29,0(x31) +80000b00: 004f8f93 addi x31,x31,4 + +80000b04 : +Zknh_sha512sum1r_cg_cp_rs2_b29: + sha512sum1r x23, x5, x29 # perform operation +80000b04: 53d28bb3 sha512sum1r x23,x5,x29 + # Check if x23 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x23, Zknh_sha512sum1r_cg_cp_rs2_b29, Zknh_sha512sum1r_cg_cp_rs2_b29_str) +80000b08: 000aa383 lw x7,0(x21) +80000b0c: 01738863 beq x7,x23,80000b1c +80000b10: 2090446f jal x8,80005518 +80000b14: 80000b04 .word 0x80000b04 +80000b18: 80009da5 .word 0x80009da5 +80000b1c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x9310ed9d +80000b20: 000fab83 lw x23,0(x31) +80000b24: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x966a1baa +80000b28: 000faf03 lw x30,0(x31) +80000b2c: 004f8f93 addi x31,x31,4 + +80000b30 : +Zknh_sha512sum1r_cg_cp_rs2_b30: + sha512sum1r x24, x23, x30 # perform operation +80000b30: 53eb8c33 sha512sum1r x24,x23,x30 + # Check if x24 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x24, Zknh_sha512sum1r_cg_cp_rs2_b30, Zknh_sha512sum1r_cg_cp_rs2_b30_str) +80000b34: 000aa383 lw x7,0(x21) +80000b38: 01838863 beq x7,x24,80000b48 +80000b3c: 1dd0446f jal x8,80005518 +80000b40: 80000b30 .word 0x80000b30 +80000b44: 80009ddf .word 0x80009ddf +80000b48: 004a8a93 addi x21,x21,4 + + mv x28, x31 # switch data pointer register to avoid conflict with test +80000b4c: 000f8e13 addi x28,x31,0 +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0xa37f2824 +80000b50: 000e2f03 lw x30,0(x28) +80000b54: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0x57726fa3 +80000b58: 000e2f83 lw x31,0(x28) +80000b5c: 004e0e13 addi x28,x28,4 + +80000b60 : +Zknh_sha512sum1r_cg_cp_rs2_b31: + sha512sum1r x4, x30, x31 # perform operation +80000b60: 53ff0233 sha512sum1r x4,x30,x31 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknh_sha512sum1r_cg_cp_rs2_b31, Zknh_sha512sum1r_cg_cp_rs2_b31_str) +80000b64: 000aa383 lw x7,0(x21) +80000b68: 00438863 beq x7,x4,80000b78 +80000b6c: 1ad0446f jal x8,80005518 +80000b70: 80000b60 .word 0x80000b60 +80000b74: 80009e19 .word 0x80009e19 +80000b78: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x8012e5af +80000b7c: 000e2183 lw x3,0(x28) +80000b80: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0xa0d57314 +80000b84: 000e2d83 lw x27,0(x28) +80000b88: 004e0e13 addi x28,x28,4 + +80000b8c : +Zknh_sha512sum1r_cg_cp_rd_b0: + sha512sum1r x0, x3, x27 # perform operation +80000b8c: 53b18033 sha512sum1r x0,x3,x27 + # Check if x0 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x0, Zknh_sha512sum1r_cg_cp_rd_b0, Zknh_sha512sum1r_cg_cp_rd_b0_str) +80000b90: 000aa383 lw x7,0(x21) +80000b94: 00038863 beq x7,x0,80000ba4 +80000b98: 1810446f jal x8,80005518 +80000b9c: 80000b8c .word 0x80000b8c +80000ba0: 80009e53 .word 0x80009e53 +80000ba4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x2decf069 +80000ba8: 000e2983 lw x19,0(x28) +80000bac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0xb5e1f5d1 +80000bb0: 000e2483 lw x9,0(x28) +80000bb4: 004e0e13 addi x28,x28,4 + +80000bb8 : +Zknh_sha512sum1r_cg_cp_rd_b1: + sha512sum1r x1, x19, x9 # perform operation +80000bb8: 529980b3 sha512sum1r x1,x19,x9 + # Check if x1 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x1, Zknh_sha512sum1r_cg_cp_rd_b1, Zknh_sha512sum1r_cg_cp_rd_b1_str) +80000bbc: 000aa383 lw x7,0(x21) +80000bc0: 00138863 beq x7,x1,80000bd0 +80000bc4: 1550446f jal x8,80005518 +80000bc8: 80000bb8 .word 0x80000bb8 +80000bcc: 80009e8b .word 0x80009e8b +80000bd0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x7ef240eb +80000bd4: 000e2603 lw x12,0(x28) +80000bd8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xedf5540b +80000bdc: 000e2a03 lw x20,0(x28) +80000be0: 004e0e13 addi x28,x28,4 + +80000be4 : +Zknh_sha512sum1r_cg_cp_rd_b2: + sha512sum1r x2, x12, x20 # perform operation +80000be4: 53460133 sha512sum1r x2,x12,x20 + # Check if x2 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x2, Zknh_sha512sum1r_cg_cp_rd_b2, Zknh_sha512sum1r_cg_cp_rd_b2_str) +80000be8: 000aa383 lw x7,0(x21) +80000bec: 00238863 beq x7,x2,80000bfc +80000bf0: 1290446f jal x8,80005518 +80000bf4: 80000be4 .word 0x80000be4 +80000bf8: 80009ec3 .word 0x80009ec3 +80000bfc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0x84f1884d +80000c00: 000e2103 lw x2,0(x28) +80000c04: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x355eacd6 +80000c08: 000e2e83 lw x29,0(x28) +80000c0c: 004e0e13 addi x28,x28,4 + +80000c10 : +Zknh_sha512sum1r_cg_cp_rd_b3: + sha512sum1r x3, x2, x29 # perform operation +80000c10: 53d101b3 sha512sum1r x3,x2,x29 + # Check if x3 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x3, Zknh_sha512sum1r_cg_cp_rd_b3, Zknh_sha512sum1r_cg_cp_rd_b3_str) +80000c14: 000aa383 lw x7,0(x21) +80000c18: 00338863 beq x7,x3,80000c28 +80000c1c: 0fd0446f jal x8,80005518 +80000c20: 80000c10 .word 0x80000c10 +80000c24: 80009efb .word 0x80009efb +80000c28: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xa72830c7 +80000c2c: 000e2d03 lw x26,0(x28) +80000c30: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs2: x1 = 0x8fd96ea0 +80000c34: 000e2083 lw x1,0(x28) +80000c38: 004e0e13 addi x28,x28,4 + +80000c3c : +Zknh_sha512sum1r_cg_cp_rd_b4: + sha512sum1r x4, x26, x1 # perform operation +80000c3c: 521d0233 sha512sum1r x4,x26,x1 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknh_sha512sum1r_cg_cp_rd_b4, Zknh_sha512sum1r_cg_cp_rd_b4_str) +80000c40: 000aa383 lw x7,0(x21) +80000c44: 00438863 beq x7,x4,80000c54 +80000c48: 0d10446f jal x8,80005518 +80000c4c: 80000c3c .word 0x80000c3c +80000c50: 80009f33 .word 0x80009f33 +80000c54: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0xff2b658e +80000c58: 000e2483 lw x9,0(x28) +80000c5c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x4) # load rs2: x4 = 0x7aea3372 +80000c60: 000e2203 lw x4,0(x28) +80000c64: 004e0e13 addi x28,x28,4 + +80000c68 : +Zknh_sha512sum1r_cg_cp_rd_b5: + sha512sum1r x5, x9, x4 # perform operation +80000c68: 524482b3 sha512sum1r x5,x9,x4 + # Check if x5 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x5, Zknh_sha512sum1r_cg_cp_rd_b5, Zknh_sha512sum1r_cg_cp_rd_b5_str) +80000c6c: 000aa383 lw x7,0(x21) +80000c70: 00538863 beq x7,x5,80000c80 +80000c74: 0a50446f jal x8,80005518 +80000c78: 80000c68 .word 0x80000c68 +80000c7c: 80009f6b .word 0x80009f6b +80000c80: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x6ef01e05 +80000c84: 000e2d03 lw x26,0(x28) +80000c88: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs2: x15 = 0xe8ec4a48 +80000c8c: 000e2783 lw x15,0(x28) +80000c90: 004e0e13 addi x28,x28,4 + +80000c94 : +Zknh_sha512sum1r_cg_cp_rd_b6: + sha512sum1r x6, x26, x15 # perform operation +80000c94: 52fd0333 sha512sum1r x6,x26,x15 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zknh_sha512sum1r_cg_cp_rd_b6, Zknh_sha512sum1r_cg_cp_rd_b6_str) +80000c98: 000aa383 lw x7,0(x21) +80000c9c: 00638863 beq x7,x6,80000cac +80000ca0: 0790446f jal x8,80005518 +80000ca4: 80000c94 .word 0x80000c94 +80000ca8: 80009fa3 .word 0x80009fa3 +80000cac: 004a8a93 addi x21,x21,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cb0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cb4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xc7a40a83 +80000cb8: 000e2883 lw x17,0(x28) +80000cbc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x4) # load rs2: x4 = 0xb680f8fa +80000cc0: 000e2203 lw x4,0(x28) +80000cc4: 004e0e13 addi x28,x28,4 + +80000cc8 : +Zknh_sha512sum1r_cg_cp_rd_b7: + sha512sum1r x7, x17, x4 # perform operation +80000cc8: 524883b3 sha512sum1r x7,x17,x4 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zknh_sha512sum1r_cg_cp_rd_b7, Zknh_sha512sum1r_cg_cp_rd_b7_str) +80000ccc: 000aa683 lw x13,0(x21) +80000cd0: 00768863 beq x13,x7,80000ce0 +80000cd4: 06d0476f jal x14,80005540 +80000cd8: 80000cc8 .word 0x80000cc8 +80000cdc: 80009fdb .word 0x80009fdb +80000ce0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x073dd52f +80000ce4: 000e2b03 lw x22,0(x28) +80000ce8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x180ccc73 +80000cec: 000e2c03 lw x24,0(x28) +80000cf0: 004e0e13 addi x28,x28,4 + +80000cf4 : +Zknh_sha512sum1r_cg_cp_rd_b8: + sha512sum1r x8, x22, x24 # perform operation +80000cf4: 538b0433 sha512sum1r x8,x22,x24 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zknh_sha512sum1r_cg_cp_rd_b8, Zknh_sha512sum1r_cg_cp_rd_b8_str) +80000cf8: 000aa683 lw x13,0(x21) +80000cfc: 00868863 beq x13,x8,80000d0c +80000d00: 0410476f jal x14,80005540 +80000d04: 80000cf4 .word 0x80000cf4 +80000d08: 8000a013 .word 0x8000a013 +80000d0c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xaa0bd88c +80000d10: 000e2d03 lw x26,0(x28) +80000d14: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xff77e24e +80000d18: 000e2a03 lw x20,0(x28) +80000d1c: 004e0e13 addi x28,x28,4 + +80000d20 : +Zknh_sha512sum1r_cg_cp_rd_b9: + sha512sum1r x9, x26, x20 # perform operation +80000d20: 534d04b3 sha512sum1r x9,x26,x20 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zknh_sha512sum1r_cg_cp_rd_b9, Zknh_sha512sum1r_cg_cp_rd_b9_str) +80000d24: 000aa683 lw x13,0(x21) +80000d28: 00968863 beq x13,x9,80000d38 +80000d2c: 0150476f jal x14,80005540 +80000d30: 80000d20 .word 0x80000d20 +80000d34: 8000a04b .word 0x8000a04b +80000d38: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xcc98c7d8 +80000d3c: 000e2883 lw x17,0(x28) +80000d40: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x41627691 +80000d44: 000e2c03 lw x24,0(x28) +80000d48: 004e0e13 addi x28,x28,4 + +80000d4c : +Zknh_sha512sum1r_cg_cp_rd_b10: + sha512sum1r x10, x17, x24 # perform operation +80000d4c: 53888533 sha512sum1r x10,x17,x24 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zknh_sha512sum1r_cg_cp_rd_b10, Zknh_sha512sum1r_cg_cp_rd_b10_str) +80000d50: 000aa683 lw x13,0(x21) +80000d54: 00a68863 beq x13,x10,80000d64 +80000d58: 7e80476f jal x14,80005540 +80000d5c: 80000d4c .word 0x80000d4c +80000d60: 8000a083 .word 0x8000a083 +80000d64: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs1: x5 = 0x15555799 +80000d68: 000e2283 lw x5,0(x28) +80000d6c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x9d5f7ef8 +80000d70: 000e2c03 lw x24,0(x28) +80000d74: 004e0e13 addi x28,x28,4 + +80000d78 : +Zknh_sha512sum1r_cg_cp_rd_b11: + sha512sum1r x11, x5, x24 # perform operation +80000d78: 538285b3 sha512sum1r x11,x5,x24 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zknh_sha512sum1r_cg_cp_rd_b11, Zknh_sha512sum1r_cg_cp_rd_b11_str) +80000d7c: 000aa683 lw x13,0(x21) +80000d80: 00b68863 beq x13,x11,80000d90 +80000d84: 7bc0476f jal x14,80005540 +80000d88: 80000d78 .word 0x80000d78 +80000d8c: 8000a0bc .word 0x8000a0bc +80000d90: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs1: x5 = 0x01c69034 +80000d94: 000e2283 lw x5,0(x28) +80000d98: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x0688eaba +80000d9c: 000e2e83 lw x29,0(x28) +80000da0: 004e0e13 addi x28,x28,4 + +80000da4 : +Zknh_sha512sum1r_cg_cp_rd_b12: + sha512sum1r x12, x5, x29 # perform operation +80000da4: 53d28633 sha512sum1r x12,x5,x29 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknh_sha512sum1r_cg_cp_rd_b12, Zknh_sha512sum1r_cg_cp_rd_b12_str) +80000da8: 000aa683 lw x13,0(x21) +80000dac: 00c68863 beq x13,x12,80000dbc +80000db0: 7900476f jal x14,80005540 +80000db4: 80000da4 .word 0x80000da4 +80000db8: 8000a0f5 .word 0x8000a0f5 +80000dbc: 004a8a93 addi x21,x21,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000dc0: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000dc4: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0x4ac02837 +80000dc8: 000e2783 lw x15,0(x28) +80000dcc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xe1d8d222 +80000dd0: 000e2c03 lw x24,0(x28) +80000dd4: 004e0e13 addi x28,x28,4 + +80000dd8 : +Zknh_sha512sum1r_cg_cp_rd_b13: + sha512sum1r x13, x15, x24 # perform operation +80000dd8: 538786b3 sha512sum1r x13,x15,x24 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zknh_sha512sum1r_cg_cp_rd_b13, Zknh_sha512sum1r_cg_cp_rd_b13_str) +80000ddc: 000aa203 lw x4,0(x21) +80000de0: 00d20863 beq x4,x13,80000df0 +80000de4: 71c042ef jal x5,80005500 +80000de8: 80000dd8 .word 0x80000dd8 +80000dec: 8000a12e .word 0x8000a12e +80000df0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x517881fd +80000df4: 000e2583 lw x11,0(x28) +80000df8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0xc3740e05 +80000dfc: 000e2683 lw x13,0(x28) +80000e00: 004e0e13 addi x28,x28,4 + +80000e04 : +Zknh_sha512sum1r_cg_cp_rd_b14: + sha512sum1r x14, x11, x13 # perform operation +80000e04: 52d58733 sha512sum1r x14,x11,x13 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha512sum1r_cg_cp_rd_b14, Zknh_sha512sum1r_cg_cp_rd_b14_str) +80000e08: 000aa203 lw x4,0(x21) +80000e0c: 00e20863 beq x4,x14,80000e1c +80000e10: 6f0042ef jal x5,80005500 +80000e14: 80000e04 .word 0x80000e04 +80000e18: 8000a167 .word 0x8000a167 +80000e1c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0xf90dd003 +80000e20: 000e2003 lw x0,0(x28) +80000e24: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x89143b2d +80000e28: 000e2c03 lw x24,0(x28) +80000e2c: 004e0e13 addi x28,x28,4 + +80000e30 : +Zknh_sha512sum1r_cg_cp_rd_b15: + sha512sum1r x15, x0, x24 # perform operation +80000e30: 538007b3 sha512sum1r x15,x0,x24 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha512sum1r_cg_cp_rd_b15, Zknh_sha512sum1r_cg_cp_rd_b15_str) +80000e34: 000aa203 lw x4,0(x21) +80000e38: 00f20863 beq x4,x15,80000e48 +80000e3c: 6c4042ef jal x5,80005500 +80000e40: 80000e30 .word 0x80000e30 +80000e44: 8000a1a0 .word 0x8000a1a0 +80000e48: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x4f27b04f +80000e4c: 000e2583 lw x11,0(x28) +80000e50: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs2: x7 = 0xfff8055e +80000e54: 000e2383 lw x7,0(x28) +80000e58: 004e0e13 addi x28,x28,4 + +80000e5c : +Zknh_sha512sum1r_cg_cp_rd_b16: + sha512sum1r x16, x11, x7 # perform operation +80000e5c: 52758833 sha512sum1r x16,x11,x7 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sum1r_cg_cp_rd_b16, Zknh_sha512sum1r_cg_cp_rd_b16_str) +80000e60: 000aa203 lw x4,0(x21) +80000e64: 01020863 beq x4,x16,80000e74 +80000e68: 698042ef jal x5,80005500 +80000e6c: 80000e5c .word 0x80000e5c +80000e70: 8000a1d9 .word 0x8000a1d9 +80000e74: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x354643a5 +80000e78: 000e2e83 lw x29,0(x28) +80000e7c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x651e7702 +80000e80: 000e2503 lw x10,0(x28) +80000e84: 004e0e13 addi x28,x28,4 + +80000e88 : +Zknh_sha512sum1r_cg_cp_rd_b17: + sha512sum1r x17, x29, x10 # perform operation +80000e88: 52ae88b3 sha512sum1r x17,x29,x10 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha512sum1r_cg_cp_rd_b17, Zknh_sha512sum1r_cg_cp_rd_b17_str) +80000e8c: 000aa203 lw x4,0(x21) +80000e90: 01120863 beq x4,x17,80000ea0 +80000e94: 66c042ef jal x5,80005500 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 8000a212 .word 0x8000a212 +80000ea0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x97af6065 +80000ea4: 000e2d03 lw x26,0(x28) +80000ea8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs2: x6 = 0xa4ebcd4e +80000eac: 000e2303 lw x6,0(x28) +80000eb0: 004e0e13 addi x28,x28,4 + +80000eb4 : +Zknh_sha512sum1r_cg_cp_rd_b18: + sha512sum1r x18, x26, x6 # perform operation +80000eb4: 526d0933 sha512sum1r x18,x26,x6 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sum1r_cg_cp_rd_b18, Zknh_sha512sum1r_cg_cp_rd_b18_str) +80000eb8: 000aa203 lw x4,0(x21) +80000ebc: 01220863 beq x4,x18,80000ecc +80000ec0: 640042ef jal x5,80005500 +80000ec4: 80000eb4 .word 0x80000eb4 +80000ec8: 8000a24b .word 0x8000a24b +80000ecc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0x8dc9d541 +80000ed0: 000e2683 lw x13,0(x28) +80000ed4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs2: x29 = 0x7deedc43 +80000ed8: 000e2e83 lw x29,0(x28) +80000edc: 004e0e13 addi x28,x28,4 + +80000ee0 : +Zknh_sha512sum1r_cg_cp_rd_b19: + sha512sum1r x19, x13, x29 # perform operation +80000ee0: 53d689b3 sha512sum1r x19,x13,x29 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sum1r_cg_cp_rd_b19, Zknh_sha512sum1r_cg_cp_rd_b19_str) +80000ee4: 000aa203 lw x4,0(x21) +80000ee8: 01320863 beq x4,x19,80000ef8 +80000eec: 614042ef jal x5,80005500 +80000ef0: 80000ee0 .word 0x80000ee0 +80000ef4: 8000a284 .word 0x8000a284 +80000ef8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x59b8b642 +80000efc: 000e2603 lw x12,0(x28) +80000f00: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x9a223596 +80000f04: 000e2c83 lw x25,0(x28) +80000f08: 004e0e13 addi x28,x28,4 + +80000f0c : +Zknh_sha512sum1r_cg_cp_rd_b20: + sha512sum1r x20, x12, x25 # perform operation +80000f0c: 53960a33 sha512sum1r x20,x12,x25 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sum1r_cg_cp_rd_b20, Zknh_sha512sum1r_cg_cp_rd_b20_str) +80000f10: 000aa203 lw x4,0(x21) +80000f14: 01420863 beq x4,x20,80000f24 +80000f18: 5e8042ef jal x5,80005500 +80000f1c: 80000f0c .word 0x80000f0c +80000f20: 8000a2bd .word 0x8000a2bd +80000f24: 004a8a93 addi x21,x21,4 + + mv x10, x21 # switch signature pointer register to avoid conflict with test +80000f28: 000a8513 addi x10,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0xaa40296c +80000f2c: 000e2483 lw x9,0(x28) +80000f30: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x2eece3eb +80000f34: 000e2983 lw x19,0(x28) +80000f38: 004e0e13 addi x28,x28,4 + +80000f3c : +Zknh_sha512sum1r_cg_cp_rd_b21: + sha512sum1r x21, x9, x19 # perform operation +80000f3c: 53348ab3 sha512sum1r x21,x9,x19 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cp_rd_b21, Zknh_sha512sum1r_cg_cp_rd_b21_str) +80000f40: 00052203 lw x4,0(x10) +80000f44: 01520863 beq x4,x21,80000f54 +80000f48: 5b8042ef jal x5,80005500 +80000f4c: 80000f3c .word 0x80000f3c +80000f50: 8000a2f6 .word 0x8000a2f6 +80000f54: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x4bf8a505 +80000f58: 000e2583 lw x11,0(x28) +80000f5c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x8c3b22ff +80000f60: 000e2183 lw x3,0(x28) +80000f64: 004e0e13 addi x28,x28,4 + +80000f68 : +Zknh_sha512sum1r_cg_cp_rd_b22: + sha512sum1r x22, x11, x3 # perform operation +80000f68: 52358b33 sha512sum1r x22,x11,x3 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zknh_sha512sum1r_cg_cp_rd_b22, Zknh_sha512sum1r_cg_cp_rd_b22_str) +80000f6c: 00052203 lw x4,0(x10) +80000f70: 01620863 beq x4,x22,80000f80 +80000f74: 58c042ef jal x5,80005500 +80000f78: 80000f68 .word 0x80000f68 +80000f7c: 8000a32f .word 0x8000a32f +80000f80: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x82c1c955 +80000f84: 000e2c03 lw x24,0(x28) +80000f88: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs2: x13 = 0x1adb382e +80000f8c: 000e2683 lw x13,0(x28) +80000f90: 004e0e13 addi x28,x28,4 + +80000f94 : +Zknh_sha512sum1r_cg_cp_rd_b23: + sha512sum1r x23, x24, x13 # perform operation +80000f94: 52dc0bb3 sha512sum1r x23,x24,x13 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cp_rd_b23, Zknh_sha512sum1r_cg_cp_rd_b23_str) +80000f98: 00052203 lw x4,0(x10) +80000f9c: 01720863 beq x4,x23,80000fac +80000fa0: 560042ef jal x5,80005500 +80000fa4: 80000f94 .word 0x80000f94 +80000fa8: 8000a368 .word 0x8000a368 +80000fac: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x2ff8881d +80000fb0: 000e2483 lw x9,0(x28) +80000fb4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs2: x0 = 0x324dc4f1 +80000fb8: 000e2003 lw x0,0(x28) +80000fbc: 004e0e13 addi x28,x28,4 + +80000fc0 : +Zknh_sha512sum1r_cg_cp_rd_b24: + sha512sum1r x24, x9, x0 # perform operation +80000fc0: 52048c33 sha512sum1r x24,x9,x0 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknh_sha512sum1r_cg_cp_rd_b24, Zknh_sha512sum1r_cg_cp_rd_b24_str) +80000fc4: 00052203 lw x4,0(x10) +80000fc8: 01820863 beq x4,x24,80000fd8 +80000fcc: 534042ef jal x5,80005500 +80000fd0: 80000fc0 .word 0x80000fc0 +80000fd4: 8000a3a1 .word 0x8000a3a1 +80000fd8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x610fcb03 +80000fdc: 000e2883 lw x17,0(x28) +80000fe0: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0x334db697 +80000fe4: 000e2103 lw x2,0(x28) +80000fe8: 004e0e13 addi x28,x28,4 + +80000fec : +Zknh_sha512sum1r_cg_cp_rd_b25: + sha512sum1r x25, x17, x2 # perform operation +80000fec: 52288cb3 sha512sum1r x25,x17,x2 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cp_rd_b25, Zknh_sha512sum1r_cg_cp_rd_b25_str) +80000ff0: 00052203 lw x4,0(x10) +80000ff4: 01920863 beq x4,x25,80001004 +80000ff8: 508042ef jal x5,80005500 +80000ffc: 80000fec .word 0x80000fec +80001000: 8000a3da .word 0x8000a3da +80001004: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0x53cb0518 +80001008: 000e2e83 lw x29,0(x28) +8000100c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x9751a145 +80001010: 000e2983 lw x19,0(x28) +80001014: 004e0e13 addi x28,x28,4 + +80001018 : +Zknh_sha512sum1r_cg_cp_rd_b26: + sha512sum1r x26, x29, x19 # perform operation +80001018: 533e8d33 sha512sum1r x26,x29,x19 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cp_rd_b26, Zknh_sha512sum1r_cg_cp_rd_b26_str) +8000101c: 00052203 lw x4,0(x10) +80001020: 01a20863 beq x4,x26,80001030 +80001024: 4dc042ef jal x5,80005500 +80001028: 80001018 .word 0x80001018 +8000102c: 8000a413 .word 0x8000a413 +80001030: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0x35037ab5 +80001034: 000e2f83 lw x31,0(x28) +80001038: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0x8b44eeba +8000103c: 000e2483 lw x9,0(x28) +80001040: 004e0e13 addi x28,x28,4 + +80001044 : +Zknh_sha512sum1r_cg_cp_rd_b27: + sha512sum1r x27, x31, x9 # perform operation +80001044: 529f8db3 sha512sum1r x27,x31,x9 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cp_rd_b27, Zknh_sha512sum1r_cg_cp_rd_b27_str) +80001048: 00052203 lw x4,0(x10) +8000104c: 01b20863 beq x4,x27,8000105c +80001050: 4b0042ef jal x5,80005500 +80001054: 80001044 .word 0x80001044 +80001058: 8000a44c .word 0x8000a44c +8000105c: 00450513 addi x10,x10,4 + + mv x12, x28 # switch data pointer register to avoid conflict with test +80001060: 000e0613 addi x12,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x34eeca02 +80001064: 00062b83 lw x23,0(x12) +80001068: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x1311705c +8000106c: 00062003 lw x0,0(x12) +80001070: 00460613 addi x12,x12,4 + +80001074 : +Zknh_sha512sum1r_cg_cp_rd_b28: + sha512sum1r x28, x23, x0 # perform operation +80001074: 520b8e33 sha512sum1r x28,x23,x0 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zknh_sha512sum1r_cg_cp_rd_b28, Zknh_sha512sum1r_cg_cp_rd_b28_str) +80001078: 00052203 lw x4,0(x10) +8000107c: 01c20863 beq x4,x28,8000108c +80001080: 480042ef jal x5,80005500 +80001084: 80001074 .word 0x80001074 +80001088: 8000a485 .word 0x8000a485 +8000108c: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x118525d5 +80001090: 00062183 lw x3,0(x12) +80001094: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xee62897a +80001098: 00062683 lw x13,0(x12) +8000109c: 00460613 addi x12,x12,4 + +800010a0 : +Zknh_sha512sum1r_cg_cp_rd_b29: + sha512sum1r x29, x3, x13 # perform operation +800010a0: 52d18eb3 sha512sum1r x29,x3,x13 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zknh_sha512sum1r_cg_cp_rd_b29, Zknh_sha512sum1r_cg_cp_rd_b29_str) +800010a4: 00052203 lw x4,0(x10) +800010a8: 01d20863 beq x4,x29,800010b8 +800010ac: 454042ef jal x5,80005500 +800010b0: 800010a0 .word 0x800010a0 +800010b4: 8000a4be .word 0x8000a4be +800010b8: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x36387f57 +800010bc: 00062183 lw x3,0(x12) +800010c0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x97a671f7 +800010c4: 00062b83 lw x23,0(x12) +800010c8: 00460613 addi x12,x12,4 + +800010cc : +Zknh_sha512sum1r_cg_cp_rd_b30: + sha512sum1r x30, x3, x23 # perform operation +800010cc: 53718f33 sha512sum1r x30,x3,x23 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cp_rd_b30, Zknh_sha512sum1r_cg_cp_rd_b30_str) +800010d0: 00052203 lw x4,0(x10) +800010d4: 01e20863 beq x4,x30,800010e4 +800010d8: 428042ef jal x5,80005500 +800010dc: 800010cc .word 0x800010cc +800010e0: 8000a4f7 .word 0x8000a4f7 +800010e4: 00450513 addi x10,x10,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xaea9ea1f +800010e8: 00062083 lw x1,0(x12) +800010ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x95fa8509 +800010f0: 00062003 lw x0,0(x12) +800010f4: 00460613 addi x12,x12,4 + +800010f8 : +Zknh_sha512sum1r_cg_cp_rd_b31: + sha512sum1r x31, x1, x0 # perform operation +800010f8: 52008fb3 sha512sum1r x31,x1,x0 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cp_rd_b31, Zknh_sha512sum1r_cg_cp_rd_b31_str) +800010fc: 00052203 lw x4,0(x10) +80001100: 01f20863 beq x4,x31,80001110 +80001104: 3fc042ef jal x5,80005500 +80001108: 800010f8 .word 0x800010f8 +8000110c: 8000a530 .word 0x8000a530 +80001110: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000000 +80001114: 00062303 lw x6,0(x12) +80001118: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x1e6d1a30 +8000111c: 00062c83 lw x25,0(x12) +80001120: 00460613 addi x12,x12,4 + +80001124 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x0: + sha512sum1r x20, x6, x25 # perform operation +80001124: 53930a33 sha512sum1r x20,x6,x25 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cp_rs1_edges_0x0, Zknh_sha512sum1r_cg_cp_rs1_edges_0x0_str) +80001128: 00052203 lw x4,0(x10) +8000112c: 01420863 beq x4,x20,8000113c +80001130: 3d0042ef jal x5,80005500 +80001134: 80001124 .word 0x80001124 +80001138: 8000a569 .word 0x8000a569 +8000113c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x00000001 +80001140: 00062b83 lw x23,0(x12) +80001144: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x2388138b +80001148: 00062183 lw x3,0(x12) +8000114c: 00460613 addi x12,x12,4 + +80001150 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x1: + sha512sum1r x22, x23, x3 # perform operation +80001150: 523b8b33 sha512sum1r x22,x23,x3 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zknh_sha512sum1r_cg_cp_rs1_edges_0x1, Zknh_sha512sum1r_cg_cp_rs1_edges_0x1_str) +80001154: 00052203 lw x4,0(x10) +80001158: 01620863 beq x4,x22,80001168 +8000115c: 3a4042ef jal x5,80005500 +80001160: 80001150 .word 0x80001150 +80001164: 8000a5a9 .word 0x8000a5a9 +80001168: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000002 +8000116c: 00062303 lw x6,0(x12) +80001170: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x34d394b5 +80001174: 00062083 lw x1,0(x12) +80001178: 00460613 addi x12,x12,4 + +8000117c : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x2: + sha512sum1r x28, x6, x1 # perform operation +8000117c: 52130e33 sha512sum1r x28,x6,x1 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zknh_sha512sum1r_cg_cp_rs1_edges_0x2, Zknh_sha512sum1r_cg_cp_rs1_edges_0x2_str) +80001180: 00052203 lw x4,0(x10) +80001184: 01c20863 beq x4,x28,80001194 +80001188: 378042ef jal x5,80005500 +8000118c: 8000117c .word 0x8000117c +80001190: 8000a5e9 .word 0x8000a5e9 +80001194: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x80000000 +80001198: 00062e03 lw x28,0(x12) +8000119c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xbfde736e +800011a0: 00062a83 lw x21,0(x12) +800011a4: 00460613 addi x12,x12,4 + +800011a8 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000000: + sha512sum1r x26, x28, x21 # perform operation +800011a8: 535e0d33 sha512sum1r x26,x28,x21 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000000, Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000000_str) +800011ac: 00052203 lw x4,0(x10) +800011b0: 01a20863 beq x4,x26,800011c0 +800011b4: 34c042ef jal x5,80005500 +800011b8: 800011a8 .word 0x800011a8 +800011bc: 8000a629 .word 0x8000a629 +800011c0: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x80000001 +800011c4: 00062d83 lw x27,0(x12) +800011c8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xaa91ce38 +800011cc: 00062d03 lw x26,0(x12) +800011d0: 00460613 addi x12,x12,4 + +800011d4 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000001: + sha512sum1r x15, x27, x26 # perform operation +800011d4: 53ad87b3 sha512sum1r x15,x27,x26 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000001, Zknh_sha512sum1r_cg_cp_rs1_edges_0x80000001_str) +800011d8: 00052203 lw x4,0(x10) +800011dc: 00f20863 beq x4,x15,800011ec +800011e0: 320042ef jal x5,80005500 +800011e4: 800011d4 .word 0x800011d4 +800011e8: 8000a671 .word 0x8000a671 +800011ec: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7fffffff +800011f0: 00062b83 lw x23,0(x12) +800011f4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x74f505ba +800011f8: 00062803 lw x16,0(x12) +800011fc: 00460613 addi x12,x12,4 + +80001200 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x7fffffff: + sha512sum1r x25, x23, x16 # perform operation +80001200: 530b8cb3 sha512sum1r x25,x23,x16 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cp_rs1_edges_0x7fffffff, Zknh_sha512sum1r_cg_cp_rs1_edges_0x7fffffff_str) +80001204: 00052203 lw x4,0(x10) +80001208: 01920863 beq x4,x25,80001218 +8000120c: 2f4042ef jal x5,80005500 +80001210: 80001200 .word 0x80001200 +80001214: 8000a6b9 .word 0x8000a6b9 +80001218: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x7ffffffe +8000121c: 00062583 lw x11,0(x12) +80001220: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x1a95b341 +80001224: 00062083 lw x1,0(x12) +80001228: 00460613 addi x12,x12,4 + +8000122c : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x7ffffffe: + sha512sum1r x20, x11, x1 # perform operation +8000122c: 52158a33 sha512sum1r x20,x11,x1 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cp_rs1_edges_0x7ffffffe, Zknh_sha512sum1r_cg_cp_rs1_edges_0x7ffffffe_str) +80001230: 00052203 lw x4,0(x10) +80001234: 01420863 beq x4,x20,80001244 +80001238: 2c8042ef jal x5,80005500 +8000123c: 8000122c .word 0x8000122c +80001240: 8000a701 .word 0x8000a701 +80001244: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xffffffff +80001248: 00062c83 lw x25,0(x12) +8000124c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5826f429 +80001250: 00062a83 lw x21,0(x12) +80001254: 00460613 addi x12,x12,4 + +80001258 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0xffffffff: + sha512sum1r x26, x25, x21 # perform operation +80001258: 535c8d33 sha512sum1r x26,x25,x21 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sum1r_cg_cp_rs1_edges_0xffffffff_str) +8000125c: 00052203 lw x4,0(x10) +80001260: 01a20863 beq x4,x26,80001270 +80001264: 29c042ef jal x5,80005500 +80001268: 80001258 .word 0x80001258 +8000126c: 8000a749 .word 0x8000a749 +80001270: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xfffffffe +80001274: 00062483 lw x9,0(x12) +80001278: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x2c474177 +8000127c: 00062e83 lw x29,0(x12) +80001280: 00460613 addi x12,x12,4 + +80001284 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0xfffffffe: + sha512sum1r x26, x9, x29 # perform operation +80001284: 53d48d33 sha512sum1r x26,x9,x29 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sum1r_cg_cp_rs1_edges_0xfffffffe_str) +80001288: 00052203 lw x4,0(x10) +8000128c: 01a20863 beq x4,x26,8000129c +80001290: 270042ef jal x5,80005500 +80001294: 80001284 .word 0x80001284 +80001298: 8000a791 .word 0x8000a791 +8000129c: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x5bbc8872 +800012a0: 00062d83 lw x27,0(x12) +800012a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xbb32e261 +800012a8: 00062a03 lw x20,0(x12) +800012ac: 00460613 addi x12,x12,4 + +800012b0 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x5bbc8872: + sha512sum1r x9, x27, x20 # perform operation +800012b0: 534d84b3 sha512sum1r x9,x27,x20 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cp_rs1_edges_0x5bbc8872, Zknh_sha512sum1r_cg_cp_rs1_edges_0x5bbc8872_str) +800012b4: 00052203 lw x4,0(x10) +800012b8: 00920863 beq x4,x9,800012c8 +800012bc: 244042ef jal x5,80005500 +800012c0: 800012b0 .word 0x800012b0 +800012c4: 8000a7d9 .word 0x8000a7d9 +800012c8: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xaaaaaaaa +800012cc: 00062d83 lw x27,0(x12) +800012d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xa356dc84 +800012d4: 00062183 lw x3,0(x12) +800012d8: 00460613 addi x12,x12,4 + +800012dc : +Zknh_sha512sum1r_cg_cp_rs1_edges_0xaaaaaaaa: + sha512sum1r x21, x27, x3 # perform operation +800012dc: 523d8ab3 sha512sum1r x21,x27,x3 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cp_rs1_edges_0xaaaaaaaa, Zknh_sha512sum1r_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012e0: 00052203 lw x4,0(x10) +800012e4: 01520863 beq x4,x21,800012f4 +800012e8: 218042ef jal x5,80005500 +800012ec: 800012dc .word 0x800012dc +800012f0: 8000a821 .word 0x8000a821 +800012f4: 00450513 addi x10,x10,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x55555555 +800012f8: 00062103 lw x2,0(x12) +800012fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xaa2eea58 +80001300: 00062703 lw x14,0(x12) +80001304: 00460613 addi x12,x12,4 + +80001308 : +Zknh_sha512sum1r_cg_cp_rs1_edges_0x55555555: + sha512sum1r x23, x2, x14 # perform operation +80001308: 52e10bb3 sha512sum1r x23,x2,x14 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cp_rs1_edges_0x55555555, Zknh_sha512sum1r_cg_cp_rs1_edges_0x55555555_str) +8000130c: 00052203 lw x4,0(x10) +80001310: 01720863 beq x4,x23,80001320 +80001314: 1ec042ef jal x5,80005500 +80001318: 80001308 .word 0x80001308 +8000131c: 8000a869 .word 0x8000a869 +80001320: 00450513 addi x10,x10,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x7006628f +80001324: 00062183 lw x3,0(x12) +80001328: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000000 +8000132c: 00062f03 lw x30,0(x12) +80001330: 00460613 addi x12,x12,4 + +80001334 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x0: + sha512sum1r x15, x3, x30 # perform operation +80001334: 53e187b3 sha512sum1r x15,x3,x30 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cp_rs2_edges_0x0, Zknh_sha512sum1r_cg_cp_rs2_edges_0x0_str) +80001338: 00052203 lw x4,0(x10) +8000133c: 00f20863 beq x4,x15,8000134c +80001340: 1c0042ef jal x5,80005500 +80001344: 80001334 .word 0x80001334 +80001348: 8000a8b1 .word 0x8000a8b1 +8000134c: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x00425dc6 +80001350: 00062683 lw x13,0(x12) +80001354: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000001 +80001358: 00062f03 lw x30,0(x12) +8000135c: 00460613 addi x12,x12,4 + +80001360 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x1: + sha512sum1r x18, x13, x30 # perform operation +80001360: 53e68933 sha512sum1r x18,x13,x30 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cp_rs2_edges_0x1, Zknh_sha512sum1r_cg_cp_rs2_edges_0x1_str) +80001364: 00052203 lw x4,0(x10) +80001368: 01220863 beq x4,x18,80001378 +8000136c: 194042ef jal x5,80005500 +80001370: 80001360 .word 0x80001360 +80001374: 8000a8f2 .word 0x8000a8f2 +80001378: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x06da7d77 +8000137c: 00062c03 lw x24,0(x12) +80001380: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x00000002 +80001384: 00062a83 lw x21,0(x12) +80001388: 00460613 addi x12,x12,4 + +8000138c : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x2: + sha512sum1r x31, x24, x21 # perform operation +8000138c: 535c0fb3 sha512sum1r x31,x24,x21 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cp_rs2_edges_0x2, Zknh_sha512sum1r_cg_cp_rs2_edges_0x2_str) +80001390: 00052203 lw x4,0(x10) +80001394: 01f20863 beq x4,x31,800013a4 +80001398: 168042ef jal x5,80005500 +8000139c: 8000138c .word 0x8000138c +800013a0: 8000a933 .word 0x8000a933 +800013a4: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xb473f6b6 +800013a8: 00062f03 lw x30,0(x12) +800013ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x80000000 +800013b0: 00062583 lw x11,0(x12) +800013b4: 00460613 addi x12,x12,4 + +800013b8 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000000: + sha512sum1r x25, x30, x11 # perform operation +800013b8: 52bf0cb3 sha512sum1r x25,x30,x11 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000000, Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000000_str) +800013bc: 00052203 lw x4,0(x10) +800013c0: 01920863 beq x4,x25,800013d0 +800013c4: 13c042ef jal x5,80005500 +800013c8: 800013b8 .word 0x800013b8 +800013cc: 8000a974 .word 0x8000a974 +800013d0: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x20c11dc5 +800013d4: 00062803 lw x16,0(x12) +800013d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000001 +800013dc: 00062d03 lw x26,0(x12) +800013e0: 00460613 addi x12,x12,4 + +800013e4 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000001: + sha512sum1r x31, x16, x26 # perform operation +800013e4: 53a80fb3 sha512sum1r x31,x16,x26 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000001, Zknh_sha512sum1r_cg_cp_rs2_edges_0x80000001_str) +800013e8: 00052203 lw x4,0(x10) +800013ec: 01f20863 beq x4,x31,800013fc +800013f0: 110042ef jal x5,80005500 +800013f4: 800013e4 .word 0x800013e4 +800013f8: 8000a9bc .word 0x8000a9bc +800013fc: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x4d8bc186 +80001400: 00062103 lw x2,0(x12) +80001404: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7fffffff +80001408: 00062b83 lw x23,0(x12) +8000140c: 00460613 addi x12,x12,4 + +80001410 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x7fffffff: + sha512sum1r x11, x2, x23 # perform operation +80001410: 537105b3 sha512sum1r x11,x2,x23 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cp_rs2_edges_0x7fffffff, Zknh_sha512sum1r_cg_cp_rs2_edges_0x7fffffff_str) +80001414: 00052203 lw x4,0(x10) +80001418: 00b20863 beq x4,x11,80001428 +8000141c: 0e4042ef jal x5,80005500 +80001420: 80001410 .word 0x80001410 +80001424: 8000aa04 .word 0x8000aa04 +80001428: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x48841718 +8000142c: 00062583 lw x11,0(x12) +80001430: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x7ffffffe +80001434: 00062e83 lw x29,0(x12) +80001438: 00460613 addi x12,x12,4 + +8000143c : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x7ffffffe: + sha512sum1r x23, x11, x29 # perform operation +8000143c: 53d58bb3 sha512sum1r x23,x11,x29 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cp_rs2_edges_0x7ffffffe, Zknh_sha512sum1r_cg_cp_rs2_edges_0x7ffffffe_str) +80001440: 00052203 lw x4,0(x10) +80001444: 01720863 beq x4,x23,80001454 +80001448: 0b8042ef jal x5,80005500 +8000144c: 8000143c .word 0x8000143c +80001450: 8000aa4c .word 0x8000aa4c +80001454: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x282aad9c +80001458: 00062b83 lw x23,0(x12) +8000145c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xffffffff +80001460: 00062803 lw x16,0(x12) +80001464: 00460613 addi x12,x12,4 + +80001468 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0xffffffff: + sha512sum1r x8, x23, x16 # perform operation +80001468: 530b8433 sha512sum1r x8,x23,x16 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha512sum1r_cg_cp_rs2_edges_0xffffffff, Zknh_sha512sum1r_cg_cp_rs2_edges_0xffffffff_str) +8000146c: 00052203 lw x4,0(x10) +80001470: 00820863 beq x4,x8,80001480 +80001474: 08c042ef jal x5,80005500 +80001478: 80001468 .word 0x80001468 +8000147c: 8000aa94 .word 0x8000aa94 +80001480: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xa3c26495 +80001484: 00062f83 lw x31,0(x12) +80001488: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xfffffffe +8000148c: 00062c03 lw x24,0(x12) +80001490: 00460613 addi x12,x12,4 + +80001494 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0xfffffffe: + sha512sum1r x3, x31, x24 # perform operation +80001494: 538f81b3 sha512sum1r x3,x31,x24 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknh_sha512sum1r_cg_cp_rs2_edges_0xfffffffe, Zknh_sha512sum1r_cg_cp_rs2_edges_0xfffffffe_str) +80001498: 00052203 lw x4,0(x10) +8000149c: 00320863 beq x4,x3,800014ac +800014a0: 060042ef jal x5,80005500 +800014a4: 80001494 .word 0x80001494 +800014a8: 8000aadc .word 0x8000aadc +800014ac: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x66591f25 +800014b0: 00062a03 lw x20,0(x12) +800014b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x5bbc8872 +800014b8: 00062c83 lw x25,0(x12) +800014bc: 00460613 addi x12,x12,4 + +800014c0 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x5bbc8872: + sha512sum1r x7, x20, x25 # perform operation +800014c0: 539a03b3 sha512sum1r x7,x20,x25 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cp_rs2_edges_0x5bbc8872, Zknh_sha512sum1r_cg_cp_rs2_edges_0x5bbc8872_str) +800014c4: 00052203 lw x4,0(x10) +800014c8: 00720863 beq x4,x7,800014d8 +800014cc: 034042ef jal x5,80005500 +800014d0: 800014c0 .word 0x800014c0 +800014d4: 8000ab24 .word 0x8000ab24 +800014d8: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x1d05fc2f +800014dc: 00062a03 lw x20,0(x12) +800014e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xaaaaaaaa +800014e4: 00062703 lw x14,0(x12) +800014e8: 00460613 addi x12,x12,4 + +800014ec : +Zknh_sha512sum1r_cg_cp_rs2_edges_0xaaaaaaaa: + sha512sum1r x18, x20, x14 # perform operation +800014ec: 52ea0933 sha512sum1r x18,x20,x14 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cp_rs2_edges_0xaaaaaaaa, Zknh_sha512sum1r_cg_cp_rs2_edges_0xaaaaaaaa_str) +800014f0: 00052203 lw x4,0(x10) +800014f4: 01220863 beq x4,x18,80001504 +800014f8: 008042ef jal x5,80005500 +800014fc: 800014ec .word 0x800014ec +80001500: 8000ab6c .word 0x8000ab6c +80001504: 00450513 addi x10,x10,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x3798f18a +80001508: 00062f03 lw x30,0(x12) +8000150c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x55555555 +80001510: 00062783 lw x15,0(x12) +80001514: 00460613 addi x12,x12,4 + +80001518 : +Zknh_sha512sum1r_cg_cp_rs2_edges_0x55555555: + sha512sum1r x26, x30, x15 # perform operation +80001518: 52ff0d33 sha512sum1r x26,x30,x15 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cp_rs2_edges_0x55555555, Zknh_sha512sum1r_cg_cp_rs2_edges_0x55555555_str) +8000151c: 00052203 lw x4,0(x10) +80001520: 01a20863 beq x4,x26,80001530 +80001524: 7dd032ef jal x5,80005500 +80001528: 80001518 .word 0x80001518 +8000152c: 8000abb4 .word 0x8000abb4 +80001530: 00450513 addi x10,x10,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000000 +80001534: 00062c83 lw x25,0(x12) +80001538: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x00000000 +8000153c: 00062303 lw x6,0(x12) +80001540: 00460613 addi x12,x12,4 + +80001544 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sha512sum1r x23, x25, x6 # perform operation +80001544: 526c8bb3 sha512sum1r x23,x25,x6 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001548: 00052203 lw x4,0(x10) +8000154c: 01720863 beq x4,x23,8000155c +80001550: 7b1032ef jal x5,80005500 +80001554: 80001544 .word 0x80001544 +80001558: 8000abfc .word 0x8000abfc +8000155c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x00000000 +80001560: 00062083 lw x1,0(x12) +80001564: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000001 +80001568: 00062683 lw x13,0(x12) +8000156c: 00460613 addi x12,x12,4 + +80001570 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sha512sum1r x25, x1, x13 # perform operation +80001570: 52d08cb3 sha512sum1r x25,x1,x13 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001574: 00052203 lw x4,0(x10) +80001578: 01920863 beq x4,x25,80001588 +8000157c: 785032ef jal x5,80005500 +80001580: 80001570 .word 0x80001570 +80001584: 8000ac54 .word 0x8000ac54 +80001588: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x00000000 +8000158c: 00062b03 lw x22,0(x12) +80001590: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000002 +80001594: 00062e03 lw x28,0(x12) +80001598: 00460613 addi x12,x12,4 + +8000159c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sha512sum1r x20, x22, x28 # perform operation +8000159c: 53cb0a33 sha512sum1r x20,x22,x28 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015a0: 00052203 lw x4,0(x10) +800015a4: 01420863 beq x4,x20,800015b4 +800015a8: 759032ef jal x5,80005500 +800015ac: 8000159c .word 0x8000159c +800015b0: 8000acac .word 0x8000acac +800015b4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000000 +800015b8: 00062e83 lw x29,0(x12) +800015bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x80000000 +800015c0: 00062a03 lw x20,0(x12) +800015c4: 00460613 addi x12,x12,4 + +800015c8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sha512sum1r x11, x29, x20 # perform operation +800015c8: 534e85b3 sha512sum1r x11,x29,x20 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015cc: 00052203 lw x4,0(x10) +800015d0: 00b20863 beq x4,x11,800015e0 +800015d4: 72d032ef jal x5,80005500 +800015d8: 800015c8 .word 0x800015c8 +800015dc: 8000ad04 .word 0x8000ad04 +800015e0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x00000000 +800015e4: 00062e03 lw x28,0(x12) +800015e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x80000001 +800015ec: 00062383 lw x7,0(x12) +800015f0: 00460613 addi x12,x12,4 + +800015f4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sha512sum1r x21, x28, x7 # perform operation +800015f4: 527e0ab3 sha512sum1r x21,x28,x7 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +800015f8: 00052203 lw x4,0(x10) +800015fc: 01520863 beq x4,x21,8000160c +80001600: 701032ef jal x5,80005500 +80001604: 800015f4 .word 0x800015f4 +80001608: 8000ad63 .word 0x8000ad63 +8000160c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x00000000 +80001610: 00062483 lw x9,0(x12) +80001614: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7fffffff +80001618: 00062c03 lw x24,0(x12) +8000161c: 00460613 addi x12,x12,4 + +80001620 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sha512sum1r x16, x9, x24 # perform operation +80001620: 53848833 sha512sum1r x16,x9,x24 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001624: 00052203 lw x4,0(x10) +80001628: 01020863 beq x4,x16,80001638 +8000162c: 6d5032ef jal x5,80005500 +80001630: 80001620 .word 0x80001620 +80001634: 8000adc2 .word 0x8000adc2 +80001638: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x00000000 +8000163c: 00062b03 lw x22,0(x12) +80001640: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x7ffffffe +80001644: 00062d83 lw x27,0(x12) +80001648: 00460613 addi x12,x12,4 + +8000164c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sha512sum1r x18, x22, x27 # perform operation +8000164c: 53bb0933 sha512sum1r x18,x22,x27 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001650: 00052203 lw x4,0(x10) +80001654: 01220863 beq x4,x18,80001664 +80001658: 6a9032ef jal x5,80005500 +8000165c: 8000164c .word 0x8000164c +80001660: 8000ae21 .word 0x8000ae21 +80001664: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x00000000 +80001668: 00062783 lw x15,0(x12) +8000166c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xffffffff +80001670: 00062883 lw x17,0(x12) +80001674: 00460613 addi x12,x12,4 + +80001678 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sha512sum1r x2, x15, x17 # perform operation +80001678: 53178133 sha512sum1r x2,x15,x17 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +8000167c: 00052203 lw x4,0(x10) +80001680: 00220863 beq x4,x2,80001690 +80001684: 67d032ef jal x5,80005500 +80001688: 80001678 .word 0x80001678 +8000168c: 8000ae80 .word 0x8000ae80 +80001690: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000000 +80001694: 00062883 lw x17,0(x12) +80001698: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xfffffffe +8000169c: 00062d03 lw x26,0(x12) +800016a0: 00460613 addi x12,x12,4 + +800016a4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sha512sum1r x30, x17, x26 # perform operation +800016a4: 53a88f33 sha512sum1r x30,x17,x26 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016a8: 00052203 lw x4,0(x10) +800016ac: 01e20863 beq x4,x30,800016bc +800016b0: 651032ef jal x5,80005500 +800016b4: 800016a4 .word 0x800016a4 +800016b8: 8000aedf .word 0x8000aedf +800016bc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000000 +800016c0: 00062583 lw x11,0(x12) +800016c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5bbc8872 +800016c8: 00062a83 lw x21,0(x12) +800016cc: 00460613 addi x12,x12,4 + +800016d0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sha512sum1r x8, x11, x21 # perform operation +800016d0: 53558433 sha512sum1r x8,x11,x21 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016d4: 00052203 lw x4,0(x10) +800016d8: 00820863 beq x4,x8,800016e8 +800016dc: 625032ef jal x5,80005500 +800016e0: 800016d0 .word 0x800016d0 +800016e4: 8000af3e .word 0x8000af3e +800016e8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x00000000 +800016ec: 00062b03 lw x22,0(x12) +800016f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xaaaaaaaa +800016f4: 00062683 lw x13,0(x12) +800016f8: 00460613 addi x12,x12,4 + +800016fc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sha512sum1r x11, x22, x13 # perform operation +800016fc: 52db05b3 sha512sum1r x11,x22,x13 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001700: 00052203 lw x4,0(x10) +80001704: 00b20863 beq x4,x11,80001714 +80001708: 5f9032ef jal x5,80005500 +8000170c: 800016fc .word 0x800016fc +80001710: 8000af9d .word 0x8000af9d +80001714: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x00000000 +80001718: 00062383 lw x7,0(x12) +8000171c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x55555555 +80001720: 00062d03 lw x26,0(x12) +80001724: 00460613 addi x12,x12,4 + +80001728 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sha512sum1r x30, x7, x26 # perform operation +80001728: 53a38f33 sha512sum1r x30,x7,x26 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +8000172c: 00052203 lw x4,0(x10) +80001730: 01e20863 beq x4,x30,80001740 +80001734: 5cd032ef jal x5,80005500 +80001738: 80001728 .word 0x80001728 +8000173c: 8000affc .word 0x8000affc +80001740: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000001 +80001744: 00062e83 lw x29,0(x12) +80001748: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000000 +8000174c: 00062c03 lw x24,0(x12) +80001750: 00460613 addi x12,x12,4 + +80001754 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sha512sum1r x14, x29, x24 # perform operation +80001754: 538e8733 sha512sum1r x14,x29,x24 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001758: 00052203 lw x4,0(x10) +8000175c: 00e20863 beq x4,x14,8000176c +80001760: 5a1032ef jal x5,80005500 +80001764: 80001754 .word 0x80001754 +80001768: 8000b05b .word 0x8000b05b +8000176c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000001 +80001770: 00062883 lw x17,0(x12) +80001774: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x00000001 +80001778: 00062703 lw x14,0(x12) +8000177c: 00460613 addi x12,x12,4 + +80001780 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sha512sum1r x11, x17, x14 # perform operation +80001780: 52e885b3 sha512sum1r x11,x17,x14 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +80001784: 00052203 lw x4,0(x10) +80001788: 00b20863 beq x4,x11,80001798 +8000178c: 575032ef jal x5,80005500 +80001790: 80001780 .word 0x80001780 +80001794: 8000b0b3 .word 0x8000b0b3 +80001798: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x00000001 +8000179c: 00062383 lw x7,0(x12) +800017a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x00000002 +800017a4: 00062083 lw x1,0(x12) +800017a8: 00460613 addi x12,x12,4 + +800017ac : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sha512sum1r x23, x7, x1 # perform operation +800017ac: 52138bb3 sha512sum1r x23,x7,x1 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017b0: 00052203 lw x4,0(x10) +800017b4: 01720863 beq x4,x23,800017c4 +800017b8: 549032ef jal x5,80005500 +800017bc: 800017ac .word 0x800017ac +800017c0: 8000b10b .word 0x8000b10b +800017c4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x00000001 +800017c8: 00062903 lw x18,0(x12) +800017cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x80000000 +800017d0: 00062703 lw x14,0(x12) +800017d4: 00460613 addi x12,x12,4 + +800017d8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sha512sum1r x15, x18, x14 # perform operation +800017d8: 52e907b3 sha512sum1r x15,x18,x14 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017dc: 00052203 lw x4,0(x10) +800017e0: 00f20863 beq x4,x15,800017f0 +800017e4: 51d032ef jal x5,80005500 +800017e8: 800017d8 .word 0x800017d8 +800017ec: 8000b163 .word 0x8000b163 +800017f0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000001 +800017f4: 00062c83 lw x25,0(x12) +800017f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x80000001 +800017fc: 00062f03 lw x30,0(x12) +80001800: 00460613 addi x12,x12,4 + +80001804 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sha512sum1r x6, x25, x30 # perform operation +80001804: 53ec8333 sha512sum1r x6,x25,x30 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001808: 00052203 lw x4,0(x10) +8000180c: 00620863 beq x4,x6,8000181c +80001810: 4f1032ef jal x5,80005500 +80001814: 80001804 .word 0x80001804 +80001818: 8000b1c2 .word 0x8000b1c2 +8000181c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x00000001 +80001820: 00062583 lw x11,0(x12) +80001824: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x7fffffff +80001828: 00062683 lw x13,0(x12) +8000182c: 00460613 addi x12,x12,4 + +80001830 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sha512sum1r x20, x11, x13 # perform operation +80001830: 52d58a33 sha512sum1r x20,x11,x13 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001834: 00052203 lw x4,0(x10) +80001838: 01420863 beq x4,x20,80001848 +8000183c: 4c5032ef jal x5,80005500 +80001840: 80001830 .word 0x80001830 +80001844: 8000b221 .word 0x8000b221 +80001848: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000001 +8000184c: 00062883 lw x17,0(x12) +80001850: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7ffffffe +80001854: 00062f03 lw x30,0(x12) +80001858: 00460613 addi x12,x12,4 + +8000185c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sha512sum1r x21, x17, x30 # perform operation +8000185c: 53e88ab3 sha512sum1r x21,x17,x30 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001860: 00052203 lw x4,0(x10) +80001864: 01520863 beq x4,x21,80001874 +80001868: 499032ef jal x5,80005500 +8000186c: 8000185c .word 0x8000185c +80001870: 8000b280 .word 0x8000b280 +80001874: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x00000001 +80001878: 00062a03 lw x20,0(x12) +8000187c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xffffffff +80001880: 00062e03 lw x28,0(x12) +80001884: 00460613 addi x12,x12,4 + +80001888 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sha512sum1r x23, x20, x28 # perform operation +80001888: 53ca0bb3 sha512sum1r x23,x20,x28 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +8000188c: 00052203 lw x4,0(x10) +80001890: 01720863 beq x4,x23,800018a0 +80001894: 46d032ef jal x5,80005500 +80001898: 80001888 .word 0x80001888 +8000189c: 8000b2df .word 0x8000b2df +800018a0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x00000001 +800018a4: 00062c03 lw x24,0(x12) +800018a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xfffffffe +800018ac: 00062f03 lw x30,0(x12) +800018b0: 00460613 addi x12,x12,4 + +800018b4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sha512sum1r x1, x24, x30 # perform operation +800018b4: 53ec00b3 sha512sum1r x1,x24,x30 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018b8: 00052203 lw x4,0(x10) +800018bc: 00120863 beq x4,x1,800018cc +800018c0: 441032ef jal x5,80005500 +800018c4: 800018b4 .word 0x800018b4 +800018c8: 8000b33e .word 0x8000b33e +800018cc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000001 +800018d0: 00062c83 lw x25,0(x12) +800018d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x5bbc8872 +800018d8: 00062803 lw x16,0(x12) +800018dc: 00460613 addi x12,x12,4 + +800018e0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sha512sum1r x8, x25, x16 # perform operation +800018e0: 530c8433 sha512sum1r x8,x25,x16 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018e4: 00052203 lw x4,0(x10) +800018e8: 00820863 beq x4,x8,800018f8 +800018ec: 415032ef jal x5,80005500 +800018f0: 800018e0 .word 0x800018e0 +800018f4: 8000b39d .word 0x8000b39d +800018f8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x00000001 +800018fc: 00062d03 lw x26,0(x12) +80001900: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xaaaaaaaa +80001904: 00062f83 lw x31,0(x12) +80001908: 00460613 addi x12,x12,4 + +8000190c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sha512sum1r x14, x26, x31 # perform operation +8000190c: 53fd0733 sha512sum1r x14,x26,x31 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001910: 00052203 lw x4,0(x10) +80001914: 00e20863 beq x4,x14,80001924 +80001918: 3e9032ef jal x5,80005500 +8000191c: 8000190c .word 0x8000190c +80001920: 8000b3fc .word 0x8000b3fc +80001924: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x00000001 +80001928: 00062c83 lw x25,0(x12) +8000192c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x55555555 +80001930: 00062783 lw x15,0(x12) +80001934: 00460613 addi x12,x12,4 + +80001938 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sha512sum1r x22, x25, x15 # perform operation +80001938: 52fc8b33 sha512sum1r x22,x25,x15 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +8000193c: 00052203 lw x4,0(x10) +80001940: 01620863 beq x4,x22,80001950 +80001944: 3bd032ef jal x5,80005500 +80001948: 80001938 .word 0x80001938 +8000194c: 8000b45b .word 0x8000b45b +80001950: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x00000002 +80001954: 00062083 lw x1,0(x12) +80001958: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x00000000 +8000195c: 00062783 lw x15,0(x12) +80001960: 00460613 addi x12,x12,4 + +80001964 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sha512sum1r x26, x1, x15 # perform operation +80001964: 52f08d33 sha512sum1r x26,x1,x15 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001968: 00052203 lw x4,0(x10) +8000196c: 01a20863 beq x4,x26,8000197c +80001970: 391032ef jal x5,80005500 +80001974: 80001964 .word 0x80001964 +80001978: 8000b4ba .word 0x8000b4ba +8000197c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000002 +80001980: 00062183 lw x3,0(x12) +80001984: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x00000001 +80001988: 00062d83 lw x27,0(x12) +8000198c: 00460613 addi x12,x12,4 + +80001990 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sha512sum1r x11, x3, x27 # perform operation +80001990: 53b185b3 sha512sum1r x11,x3,x27 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +80001994: 00052203 lw x4,0(x10) +80001998: 00b20863 beq x4,x11,800019a8 +8000199c: 365032ef jal x5,80005500 +800019a0: 80001990 .word 0x80001990 +800019a4: 8000b512 .word 0x8000b512 +800019a8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x00000002 +800019ac: 00062c03 lw x24,0(x12) +800019b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x00000002 +800019b4: 00062e03 lw x28,0(x12) +800019b8: 00460613 addi x12,x12,4 + +800019bc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sha512sum1r x11, x24, x28 # perform operation +800019bc: 53cc05b3 sha512sum1r x11,x24,x28 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019c0: 00052203 lw x4,0(x10) +800019c4: 00b20863 beq x4,x11,800019d4 +800019c8: 339032ef jal x5,80005500 +800019cc: 800019bc .word 0x800019bc +800019d0: 8000b56a .word 0x8000b56a +800019d4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x00000002 +800019d8: 00062483 lw x9,0(x12) +800019dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x80000000 +800019e0: 00062683 lw x13,0(x12) +800019e4: 00460613 addi x12,x12,4 + +800019e8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sha512sum1r x28, x9, x13 # perform operation +800019e8: 52d48e33 sha512sum1r x28,x9,x13 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +800019ec: 00052203 lw x4,0(x10) +800019f0: 01c20863 beq x4,x28,80001a00 +800019f4: 30d032ef jal x5,80005500 +800019f8: 800019e8 .word 0x800019e8 +800019fc: 8000b5c2 .word 0x8000b5c2 +80001a00: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x00000002 +80001a04: 00062f03 lw x30,0(x12) +80001a08: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x80000001 +80001a0c: 00062303 lw x6,0(x12) +80001a10: 00460613 addi x12,x12,4 + +80001a14 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sha512sum1r x20, x30, x6 # perform operation +80001a14: 526f0a33 sha512sum1r x20,x30,x6 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a18: 00052203 lw x4,0(x10) +80001a1c: 01420863 beq x4,x20,80001a2c +80001a20: 2e1032ef jal x5,80005500 +80001a24: 80001a14 .word 0x80001a14 +80001a28: 8000b621 .word 0x8000b621 +80001a2c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x00000002 +80001a30: 00062303 lw x6,0(x12) +80001a34: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x7fffffff +80001a38: 00062683 lw x13,0(x12) +80001a3c: 00460613 addi x12,x12,4 + +80001a40 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sha512sum1r x9, x6, x13 # perform operation +80001a40: 52d304b3 sha512sum1r x9,x6,x13 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a44: 00052203 lw x4,0(x10) +80001a48: 00920863 beq x4,x9,80001a58 +80001a4c: 2b5032ef jal x5,80005500 +80001a50: 80001a40 .word 0x80001a40 +80001a54: 8000b680 .word 0x8000b680 +80001a58: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x00000002 +80001a5c: 00062103 lw x2,0(x12) +80001a60: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x7ffffffe +80001a64: 00062983 lw x19,0(x12) +80001a68: 00460613 addi x12,x12,4 + +80001a6c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sha512sum1r x20, x2, x19 # perform operation +80001a6c: 53310a33 sha512sum1r x20,x2,x19 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a70: 00052203 lw x4,0(x10) +80001a74: 01420863 beq x4,x20,80001a84 +80001a78: 289032ef jal x5,80005500 +80001a7c: 80001a6c .word 0x80001a6c +80001a80: 8000b6df .word 0x8000b6df +80001a84: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000002 +80001a88: 00062e83 lw x29,0(x12) +80001a8c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xffffffff +80001a90: 00062a03 lw x20,0(x12) +80001a94: 00460613 addi x12,x12,4 + +80001a98 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sha512sum1r x24, x29, x20 # perform operation +80001a98: 534e8c33 sha512sum1r x24,x29,x20 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001a9c: 00052203 lw x4,0(x10) +80001aa0: 01820863 beq x4,x24,80001ab0 +80001aa4: 25d032ef jal x5,80005500 +80001aa8: 80001a98 .word 0x80001a98 +80001aac: 8000b73e .word 0x8000b73e +80001ab0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x00000002 +80001ab4: 00062e83 lw x29,0(x12) +80001ab8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xfffffffe +80001abc: 00062f03 lw x30,0(x12) +80001ac0: 00460613 addi x12,x12,4 + +80001ac4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sha512sum1r x25, x29, x30 # perform operation +80001ac4: 53ee8cb3 sha512sum1r x25,x29,x30 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ac8: 00052203 lw x4,0(x10) +80001acc: 01920863 beq x4,x25,80001adc +80001ad0: 231032ef jal x5,80005500 +80001ad4: 80001ac4 .word 0x80001ac4 +80001ad8: 8000b79d .word 0x8000b79d +80001adc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x00000002 +80001ae0: 00062b83 lw x23,0(x12) +80001ae4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x5bbc8872 +80001ae8: 00062883 lw x17,0(x12) +80001aec: 00460613 addi x12,x12,4 + +80001af0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sha512sum1r x19, x23, x17 # perform operation +80001af0: 531b89b3 sha512sum1r x19,x23,x17 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001af4: 00052203 lw x4,0(x10) +80001af8: 01320863 beq x4,x19,80001b08 +80001afc: 205032ef jal x5,80005500 +80001b00: 80001af0 .word 0x80001af0 +80001b04: 8000b7fc .word 0x8000b7fc +80001b08: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000002 +80001b0c: 00062883 lw x17,0(x12) +80001b10: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xaaaaaaaa +80001b14: 00062703 lw x14,0(x12) +80001b18: 00460613 addi x12,x12,4 + +80001b1c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sha512sum1r x20, x17, x14 # perform operation +80001b1c: 52e88a33 sha512sum1r x20,x17,x14 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b20: 00052203 lw x4,0(x10) +80001b24: 01420863 beq x4,x20,80001b34 +80001b28: 1d9032ef jal x5,80005500 +80001b2c: 80001b1c .word 0x80001b1c +80001b30: 8000b85b .word 0x8000b85b +80001b34: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x00000002 +80001b38: 00062f03 lw x30,0(x12) +80001b3c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x55555555 +80001b40: 00062683 lw x13,0(x12) +80001b44: 00460613 addi x12,x12,4 + +80001b48 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sha512sum1r x16, x30, x13 # perform operation +80001b48: 52df0833 sha512sum1r x16,x30,x13 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b4c: 00052203 lw x4,0(x10) +80001b50: 01020863 beq x4,x16,80001b60 +80001b54: 1ad032ef jal x5,80005500 +80001b58: 80001b48 .word 0x80001b48 +80001b5c: 8000b8ba .word 0x8000b8ba +80001b60: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x80000000 +80001b64: 00062403 lw x8,0(x12) +80001b68: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x00000000 +80001b6c: 00062483 lw x9,0(x12) +80001b70: 00460613 addi x12,x12,4 + +80001b74 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sha512sum1r x2, x8, x9 # perform operation +80001b74: 52940133 sha512sum1r x2,x8,x9 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b78: 00052203 lw x4,0(x10) +80001b7c: 00220863 beq x4,x2,80001b8c +80001b80: 181032ef jal x5,80005500 +80001b84: 80001b74 .word 0x80001b74 +80001b88: 8000b919 .word 0x8000b919 +80001b8c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000000 +80001b90: 00062a83 lw x21,0(x12) +80001b94: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x00000001 +80001b98: 00062d83 lw x27,0(x12) +80001b9c: 00460613 addi x12,x12,4 + +80001ba0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sha512sum1r x17, x21, x27 # perform operation +80001ba0: 53ba88b3 sha512sum1r x17,x21,x27 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001ba4: 00052203 lw x4,0(x10) +80001ba8: 01120863 beq x4,x17,80001bb8 +80001bac: 155032ef jal x5,80005500 +80001bb0: 80001ba0 .word 0x80001ba0 +80001bb4: 8000b978 .word 0x8000b978 +80001bb8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x80000000 +80001bbc: 00062d03 lw x26,0(x12) +80001bc0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x00000002 +80001bc4: 00062c03 lw x24,0(x12) +80001bc8: 00460613 addi x12,x12,4 + +80001bcc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sha512sum1r x7, x26, x24 # perform operation +80001bcc: 538d03b3 sha512sum1r x7,x26,x24 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bd0: 00052203 lw x4,0(x10) +80001bd4: 00720863 beq x4,x7,80001be4 +80001bd8: 129032ef jal x5,80005500 +80001bdc: 80001bcc .word 0x80001bcc +80001be0: 8000b9d7 .word 0x8000b9d7 +80001be4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x80000000 +80001be8: 00062683 lw x13,0(x12) +80001bec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000000 +80001bf0: 00062d03 lw x26,0(x12) +80001bf4: 00460613 addi x12,x12,4 + +80001bf8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sha512sum1r x23, x13, x26 # perform operation +80001bf8: 53a68bb3 sha512sum1r x23,x13,x26 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001bfc: 00052203 lw x4,0(x10) +80001c00: 01720863 beq x4,x23,80001c10 +80001c04: 0fd032ef jal x5,80005500 +80001c08: 80001bf8 .word 0x80001bf8 +80001c0c: 8000ba36 .word 0x8000ba36 +80001c10: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x80000000 +80001c14: 00062903 lw x18,0(x12) +80001c18: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x80000001 +80001c1c: 00062b83 lw x23,0(x12) +80001c20: 00460613 addi x12,x12,4 + +80001c24 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sha512sum1r x7, x18, x23 # perform operation +80001c24: 537903b3 sha512sum1r x7,x18,x23 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c28: 00052203 lw x4,0(x10) +80001c2c: 00720863 beq x4,x7,80001c3c +80001c30: 0d1032ef jal x5,80005500 +80001c34: 80001c24 .word 0x80001c24 +80001c38: 8000ba9c .word 0x8000ba9c +80001c3c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x80000000 +80001c40: 00062183 lw x3,0(x12) +80001c44: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x7fffffff +80001c48: 00062e83 lw x29,0(x12) +80001c4c: 00460613 addi x12,x12,4 + +80001c50 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sha512sum1r x6, x3, x29 # perform operation +80001c50: 53d18333 sha512sum1r x6,x3,x29 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c54: 00052203 lw x4,0(x10) +80001c58: 00620863 beq x4,x6,80001c68 +80001c5c: 0a5032ef jal x5,80005500 +80001c60: 80001c50 .word 0x80001c50 +80001c64: 8000bb02 .word 0x8000bb02 +80001c68: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x80000000 +80001c6c: 00062303 lw x6,0(x12) +80001c70: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x7ffffffe +80001c74: 00062e03 lw x28,0(x12) +80001c78: 00460613 addi x12,x12,4 + +80001c7c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sha512sum1r x21, x6, x28 # perform operation +80001c7c: 53c30ab3 sha512sum1r x21,x6,x28 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c80: 00052203 lw x4,0(x10) +80001c84: 01520863 beq x4,x21,80001c94 +80001c88: 079032ef jal x5,80005500 +80001c8c: 80001c7c .word 0x80001c7c +80001c90: 8000bb68 .word 0x8000bb68 +80001c94: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x80000000 +80001c98: 00062f03 lw x30,0(x12) +80001c9c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xffffffff +80001ca0: 00062c03 lw x24,0(x12) +80001ca4: 00460613 addi x12,x12,4 + +80001ca8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sha512sum1r x18, x30, x24 # perform operation +80001ca8: 538f0933 sha512sum1r x18,x30,x24 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cac: 00052203 lw x4,0(x10) +80001cb0: 01220863 beq x4,x18,80001cc0 +80001cb4: 04d032ef jal x5,80005500 +80001cb8: 80001ca8 .word 0x80001ca8 +80001cbc: 8000bbce .word 0x8000bbce +80001cc0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x80000000 +80001cc4: 00062c83 lw x25,0(x12) +80001cc8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xfffffffe +80001ccc: 00062583 lw x11,0(x12) +80001cd0: 00460613 addi x12,x12,4 + +80001cd4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sha512sum1r x31, x25, x11 # perform operation +80001cd4: 52bc8fb3 sha512sum1r x31,x25,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cd8: 00052203 lw x4,0(x10) +80001cdc: 01f20863 beq x4,x31,80001cec +80001ce0: 021032ef jal x5,80005500 +80001ce4: 80001cd4 .word 0x80001cd4 +80001ce8: 8000bc34 .word 0x8000bc34 +80001cec: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x80000000 +80001cf0: 00062a83 lw x21,0(x12) +80001cf4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x5bbc8872 +80001cf8: 00062e03 lw x28,0(x12) +80001cfc: 00460613 addi x12,x12,4 + +80001d00 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sha512sum1r x24, x21, x28 # perform operation +80001d00: 53ca8c33 sha512sum1r x24,x21,x28 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d04: 00052203 lw x4,0(x10) +80001d08: 01820863 beq x4,x24,80001d18 +80001d0c: 7f4032ef jal x5,80005500 +80001d10: 80001d00 .word 0x80001d00 +80001d14: 8000bc9a .word 0x8000bc9a +80001d18: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x80000000 +80001d1c: 00062b03 lw x22,0(x12) +80001d20: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xaaaaaaaa +80001d24: 00062b83 lw x23,0(x12) +80001d28: 00460613 addi x12,x12,4 + +80001d2c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sha512sum1r x26, x22, x23 # perform operation +80001d2c: 537b0d33 sha512sum1r x26,x22,x23 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d30: 00052203 lw x4,0(x10) +80001d34: 01a20863 beq x4,x26,80001d44 +80001d38: 7c8032ef jal x5,80005500 +80001d3c: 80001d2c .word 0x80001d2c +80001d40: 8000bd00 .word 0x8000bd00 +80001d44: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x80000000 +80001d48: 00062383 lw x7,0(x12) +80001d4c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x55555555 +80001d50: 00062e83 lw x29,0(x12) +80001d54: 00460613 addi x12,x12,4 + +80001d58 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sha512sum1r x14, x7, x29 # perform operation +80001d58: 53d38733 sha512sum1r x14,x7,x29 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d5c: 00052203 lw x4,0(x10) +80001d60: 00e20863 beq x4,x14,80001d70 +80001d64: 79c032ef jal x5,80005500 +80001d68: 80001d58 .word 0x80001d58 +80001d6c: 8000bd66 .word 0x8000bd66 +80001d70: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x80000001 +80001d74: 00062d83 lw x27,0(x12) +80001d78: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x00000000 +80001d7c: 00062f03 lw x30,0(x12) +80001d80: 00460613 addi x12,x12,4 + +80001d84 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sha512sum1r x6, x27, x30 # perform operation +80001d84: 53ed8333 sha512sum1r x6,x27,x30 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001d88: 00052203 lw x4,0(x10) +80001d8c: 00620863 beq x4,x6,80001d9c +80001d90: 770032ef jal x5,80005500 +80001d94: 80001d84 .word 0x80001d84 +80001d98: 8000bdcc .word 0x8000bdcc +80001d9c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x80000001 +80001da0: 00062c03 lw x24,0(x12) +80001da4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x00000001 +80001da8: 00062483 lw x9,0(x12) +80001dac: 00460613 addi x12,x12,4 + +80001db0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sha512sum1r x2, x24, x9 # perform operation +80001db0: 529c0133 sha512sum1r x2,x24,x9 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001db4: 00052203 lw x4,0(x10) +80001db8: 00220863 beq x4,x2,80001dc8 +80001dbc: 744032ef jal x5,80005500 +80001dc0: 80001db0 .word 0x80001db0 +80001dc4: 8000be2b .word 0x8000be2b +80001dc8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x80000001 +80001dcc: 00062403 lw x8,0(x12) +80001dd0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x00000002 +80001dd4: 00062983 lw x19,0(x12) +80001dd8: 00460613 addi x12,x12,4 + +80001ddc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sha512sum1r x26, x8, x19 # perform operation +80001ddc: 53340d33 sha512sum1r x26,x8,x19 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001de0: 00052203 lw x4,0(x10) +80001de4: 01a20863 beq x4,x26,80001df4 +80001de8: 718032ef jal x5,80005500 +80001dec: 80001ddc .word 0x80001ddc +80001df0: 8000be8a .word 0x8000be8a +80001df4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x80000001 +80001df8: 00062183 lw x3,0(x12) +80001dfc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x80000000 +80001e00: 00062d83 lw x27,0(x12) +80001e04: 00460613 addi x12,x12,4 + +80001e08 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sha512sum1r x17, x3, x27 # perform operation +80001e08: 53b188b3 sha512sum1r x17,x3,x27 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e0c: 00052203 lw x4,0(x10) +80001e10: 01120863 beq x4,x17,80001e20 +80001e14: 6ec032ef jal x5,80005500 +80001e18: 80001e08 .word 0x80001e08 +80001e1c: 8000bee9 .word 0x8000bee9 +80001e20: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x80000001 +80001e24: 00062983 lw x19,0(x12) +80001e28: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x80000001 +80001e2c: 00062783 lw x15,0(x12) +80001e30: 00460613 addi x12,x12,4 + +80001e34 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sha512sum1r x30, x19, x15 # perform operation +80001e34: 52f98f33 sha512sum1r x30,x19,x15 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e38: 00052203 lw x4,0(x10) +80001e3c: 01e20863 beq x4,x30,80001e4c +80001e40: 6c0032ef jal x5,80005500 +80001e44: 80001e34 .word 0x80001e34 +80001e48: 8000bf4f .word 0x8000bf4f +80001e4c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x80000001 +80001e50: 00062583 lw x11,0(x12) +80001e54: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7fffffff +80001e58: 00062d03 lw x26,0(x12) +80001e5c: 00460613 addi x12,x12,4 + +80001e60 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sha512sum1r x20, x11, x26 # perform operation +80001e60: 53a58a33 sha512sum1r x20,x11,x26 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e64: 00052203 lw x4,0(x10) +80001e68: 01420863 beq x4,x20,80001e78 +80001e6c: 694032ef jal x5,80005500 +80001e70: 80001e60 .word 0x80001e60 +80001e74: 8000bfb5 .word 0x8000bfb5 +80001e78: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x80000001 +80001e7c: 00062b83 lw x23,0(x12) +80001e80: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7ffffffe +80001e84: 00062c03 lw x24,0(x12) +80001e88: 00460613 addi x12,x12,4 + +80001e8c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sha512sum1r x21, x23, x24 # perform operation +80001e8c: 538b8ab3 sha512sum1r x21,x23,x24 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001e90: 00052203 lw x4,0(x10) +80001e94: 01520863 beq x4,x21,80001ea4 +80001e98: 668032ef jal x5,80005500 +80001e9c: 80001e8c .word 0x80001e8c +80001ea0: 8000c01b .word 0x8000c01b +80001ea4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x80000001 +80001ea8: 00062e03 lw x28,0(x12) +80001eac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xffffffff +80001eb0: 00062703 lw x14,0(x12) +80001eb4: 00460613 addi x12,x12,4 + +80001eb8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sha512sum1r x9, x28, x14 # perform operation +80001eb8: 52ee04b3 sha512sum1r x9,x28,x14 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ebc: 00052203 lw x4,0(x10) +80001ec0: 00920863 beq x4,x9,80001ed0 +80001ec4: 63c032ef jal x5,80005500 +80001ec8: 80001eb8 .word 0x80001eb8 +80001ecc: 8000c081 .word 0x8000c081 +80001ed0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x80000001 +80001ed4: 00062083 lw x1,0(x12) +80001ed8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xfffffffe +80001edc: 00062c03 lw x24,0(x12) +80001ee0: 00460613 addi x12,x12,4 + +80001ee4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sha512sum1r x19, x1, x24 # perform operation +80001ee4: 538089b3 sha512sum1r x19,x1,x24 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001ee8: 00052203 lw x4,0(x10) +80001eec: 01320863 beq x4,x19,80001efc +80001ef0: 610032ef jal x5,80005500 +80001ef4: 80001ee4 .word 0x80001ee4 +80001ef8: 8000c0e7 .word 0x8000c0e7 +80001efc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x80000001 +80001f00: 00062783 lw x15,0(x12) +80001f04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x5bbc8872 +80001f08: 00062c03 lw x24,0(x12) +80001f0c: 00460613 addi x12,x12,4 + +80001f10 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sha512sum1r x19, x15, x24 # perform operation +80001f10: 538789b3 sha512sum1r x19,x15,x24 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f14: 00052203 lw x4,0(x10) +80001f18: 01320863 beq x4,x19,80001f28 +80001f1c: 5e4032ef jal x5,80005500 +80001f20: 80001f10 .word 0x80001f10 +80001f24: 8000c14d .word 0x8000c14d +80001f28: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x80000001 +80001f2c: 00062103 lw x2,0(x12) +80001f30: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xaaaaaaaa +80001f34: 00062d03 lw x26,0(x12) +80001f38: 00460613 addi x12,x12,4 + +80001f3c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sha512sum1r x1, x2, x26 # perform operation +80001f3c: 53a100b3 sha512sum1r x1,x2,x26 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f40: 00052203 lw x4,0(x10) +80001f44: 00120863 beq x4,x1,80001f54 +80001f48: 5b8032ef jal x5,80005500 +80001f4c: 80001f3c .word 0x80001f3c +80001f50: 8000c1b3 .word 0x8000c1b3 +80001f54: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x80000001 +80001f58: 00062783 lw x15,0(x12) +80001f5c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x55555555 +80001f60: 00062b03 lw x22,0(x12) +80001f64: 00460613 addi x12,x12,4 + +80001f68 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sha512sum1r x7, x15, x22 # perform operation +80001f68: 536783b3 sha512sum1r x7,x15,x22 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f6c: 00052203 lw x4,0(x10) +80001f70: 00720863 beq x4,x7,80001f80 +80001f74: 58c032ef jal x5,80005500 +80001f78: 80001f68 .word 0x80001f68 +80001f7c: 8000c219 .word 0x8000c219 +80001f80: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7fffffff +80001f84: 00062e83 lw x29,0(x12) +80001f88: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x00000000 +80001f8c: 00062803 lw x16,0(x12) +80001f90: 00460613 addi x12,x12,4 + +80001f94 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sha512sum1r x14, x29, x16 # perform operation +80001f94: 530e8733 sha512sum1r x14,x29,x16 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001f98: 00052203 lw x4,0(x10) +80001f9c: 00e20863 beq x4,x14,80001fac +80001fa0: 560032ef jal x5,80005500 +80001fa4: 80001f94 .word 0x80001f94 +80001fa8: 8000c27f .word 0x8000c27f +80001fac: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7fffffff +80001fb0: 00062383 lw x7,0(x12) +80001fb4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +80001fb8: 00062c83 lw x25,0(x12) +80001fbc: 00460613 addi x12,x12,4 + +80001fc0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sha512sum1r x14, x7, x25 # perform operation +80001fc0: 53938733 sha512sum1r x14,x7,x25 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fc4: 00052203 lw x4,0(x10) +80001fc8: 00e20863 beq x4,x14,80001fd8 +80001fcc: 534032ef jal x5,80005500 +80001fd0: 80001fc0 .word 0x80001fc0 +80001fd4: 8000c2de .word 0x8000c2de +80001fd8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x7fffffff +80001fdc: 00062103 lw x2,0(x12) +80001fe0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x00000002 +80001fe4: 00062403 lw x8,0(x12) +80001fe8: 00460613 addi x12,x12,4 + +80001fec : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sha512sum1r x9, x2, x8 # perform operation +80001fec: 528104b3 sha512sum1r x9,x2,x8 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80001ff0: 00052203 lw x4,0(x10) +80001ff4: 00920863 beq x4,x9,80002004 +80001ff8: 508032ef jal x5,80005500 +80001ffc: 80001fec .word 0x80001fec +80002000: 8000c33d .word 0x8000c33d +80002004: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7fffffff +80002008: 00062f03 lw x30,0(x12) +8000200c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x80000000 +80002010: 00062b83 lw x23,0(x12) +80002014: 00460613 addi x12,x12,4 + +80002018 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sha512sum1r x14, x30, x23 # perform operation +80002018: 537f0733 sha512sum1r x14,x30,x23 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +8000201c: 00052203 lw x4,0(x10) +80002020: 00e20863 beq x4,x14,80002030 +80002024: 4dc032ef jal x5,80005500 +80002028: 80002018 .word 0x80002018 +8000202c: 8000c39c .word 0x8000c39c +80002030: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x7fffffff +80002034: 00062c03 lw x24,0(x12) +80002038: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x80000001 +8000203c: 00062403 lw x8,0(x12) +80002040: 00460613 addi x12,x12,4 + +80002044 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sha512sum1r x9, x24, x8 # perform operation +80002044: 528c04b3 sha512sum1r x9,x24,x8 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002048: 00052203 lw x4,0(x10) +8000204c: 00920863 beq x4,x9,8000205c +80002050: 4b0032ef jal x5,80005500 +80002054: 80002044 .word 0x80002044 +80002058: 8000c402 .word 0x8000c402 +8000205c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7fffffff +80002060: 00062b83 lw x23,0(x12) +80002064: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7fffffff +80002068: 00062c03 lw x24,0(x12) +8000206c: 00460613 addi x12,x12,4 + +80002070 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sha512sum1r x8, x23, x24 # perform operation +80002070: 538b8433 sha512sum1r x8,x23,x24 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002074: 00052203 lw x4,0(x10) +80002078: 00820863 beq x4,x8,80002088 +8000207c: 484032ef jal x5,80005500 +80002080: 80002070 .word 0x80002070 +80002084: 8000c468 .word 0x8000c468 +80002088: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x7fffffff +8000208c: 00062383 lw x7,0(x12) +80002090: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7ffffffe +80002094: 00062d03 lw x26,0(x12) +80002098: 00460613 addi x12,x12,4 + +8000209c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sha512sum1r x30, x7, x26 # perform operation +8000209c: 53a38f33 sha512sum1r x30,x7,x26 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020a0: 00052203 lw x4,0(x10) +800020a4: 01e20863 beq x4,x30,800020b4 +800020a8: 458032ef jal x5,80005500 +800020ac: 8000209c .word 0x8000209c +800020b0: 8000c4ce .word 0x8000c4ce +800020b4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x7fffffff +800020b8: 00062883 lw x17,0(x12) +800020bc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xffffffff +800020c0: 00062583 lw x11,0(x12) +800020c4: 00460613 addi x12,x12,4 + +800020c8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sha512sum1r x15, x17, x11 # perform operation +800020c8: 52b887b3 sha512sum1r x15,x17,x11 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020cc: 00052203 lw x4,0(x10) +800020d0: 00f20863 beq x4,x15,800020e0 +800020d4: 42c032ef jal x5,80005500 +800020d8: 800020c8 .word 0x800020c8 +800020dc: 8000c534 .word 0x8000c534 +800020e0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x7fffffff +800020e4: 00062e03 lw x28,0(x12) +800020e8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xfffffffe +800020ec: 00062883 lw x17,0(x12) +800020f0: 00460613 addi x12,x12,4 + +800020f4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sha512sum1r x9, x28, x17 # perform operation +800020f4: 531e04b3 sha512sum1r x9,x28,x17 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +800020f8: 00052203 lw x4,0(x10) +800020fc: 00920863 beq x4,x9,8000210c +80002100: 400032ef jal x5,80005500 +80002104: 800020f4 .word 0x800020f4 +80002108: 8000c59a .word 0x8000c59a +8000210c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7fffffff +80002110: 00062a03 lw x20,0(x12) +80002114: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x5bbc8872 +80002118: 00062d03 lw x26,0(x12) +8000211c: 00460613 addi x12,x12,4 + +80002120 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sha512sum1r x27, x20, x26 # perform operation +80002120: 53aa0db3 sha512sum1r x27,x20,x26 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002124: 00052203 lw x4,0(x10) +80002128: 01b20863 beq x4,x27,80002138 +8000212c: 3d4032ef jal x5,80005500 +80002130: 80002120 .word 0x80002120 +80002134: 8000c600 .word 0x8000c600 +80002138: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x7fffffff +8000213c: 00062583 lw x11,0(x12) +80002140: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xaaaaaaaa +80002144: 00062b03 lw x22,0(x12) +80002148: 00460613 addi x12,x12,4 + +8000214c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sha512sum1r x2, x11, x22 # perform operation +8000214c: 53658133 sha512sum1r x2,x11,x22 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002150: 00052203 lw x4,0(x10) +80002154: 00220863 beq x4,x2,80002164 +80002158: 3a8032ef jal x5,80005500 +8000215c: 8000214c .word 0x8000214c +80002160: 8000c666 .word 0x8000c666 +80002164: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7fffffff +80002168: 00062e83 lw x29,0(x12) +8000216c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x55555555 +80002170: 00062d83 lw x27,0(x12) +80002174: 00460613 addi x12,x12,4 + +80002178 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sha512sum1r x14, x29, x27 # perform operation +80002178: 53be8733 sha512sum1r x14,x29,x27 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +8000217c: 00052203 lw x4,0(x10) +80002180: 00e20863 beq x4,x14,80002190 +80002184: 37c032ef jal x5,80005500 +80002188: 80002178 .word 0x80002178 +8000218c: 8000c6cc .word 0x8000c6cc +80002190: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7ffffffe +80002194: 00062f03 lw x30,0(x12) +80002198: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x00000000 +8000219c: 00062403 lw x8,0(x12) +800021a0: 00460613 addi x12,x12,4 + +800021a4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sha512sum1r x18, x30, x8 # perform operation +800021a4: 528f0933 sha512sum1r x18,x30,x8 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021a8: 00052203 lw x4,0(x10) +800021ac: 01220863 beq x4,x18,800021bc +800021b0: 350032ef jal x5,80005500 +800021b4: 800021a4 .word 0x800021a4 +800021b8: 8000c732 .word 0x8000c732 +800021bc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7ffffffe +800021c0: 00062483 lw x9,0(x12) +800021c4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x00000001 +800021c8: 00062103 lw x2,0(x12) +800021cc: 00460613 addi x12,x12,4 + +800021d0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sha512sum1r x27, x9, x2 # perform operation +800021d0: 52248db3 sha512sum1r x27,x9,x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021d4: 00052203 lw x4,0(x10) +800021d8: 01b20863 beq x4,x27,800021e8 +800021dc: 324032ef jal x5,80005500 +800021e0: 800021d0 .word 0x800021d0 +800021e4: 8000c791 .word 0x8000c791 +800021e8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x7ffffffe +800021ec: 00062703 lw x14,0(x12) +800021f0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000002 +800021f4: 00062683 lw x13,0(x12) +800021f8: 00460613 addi x12,x12,4 + +800021fc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sha512sum1r x11, x14, x13 # perform operation +800021fc: 52d705b3 sha512sum1r x11,x14,x13 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002200: 00052203 lw x4,0(x10) +80002204: 00b20863 beq x4,x11,80002214 +80002208: 2f8032ef jal x5,80005500 +8000220c: 800021fc .word 0x800021fc +80002210: 8000c7f0 .word 0x8000c7f0 +80002214: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x7ffffffe +80002218: 00062903 lw x18,0(x12) +8000221c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x80000000 +80002220: 00062b03 lw x22,0(x12) +80002224: 00460613 addi x12,x12,4 + +80002228 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sha512sum1r x23, x18, x22 # perform operation +80002228: 53690bb3 sha512sum1r x23,x18,x22 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +8000222c: 00052203 lw x4,0(x10) +80002230: 01720863 beq x4,x23,80002240 +80002234: 2cc032ef jal x5,80005500 +80002238: 80002228 .word 0x80002228 +8000223c: 8000c84f .word 0x8000c84f +80002240: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7ffffffe +80002244: 00062e83 lw x29,0(x12) +80002248: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x80000001 +8000224c: 00062f83 lw x31,0(x12) +80002250: 00460613 addi x12,x12,4 + +80002254 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sha512sum1r x6, x29, x31 # perform operation +80002254: 53fe8333 sha512sum1r x6,x29,x31 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002258: 00052203 lw x4,0(x10) +8000225c: 00620863 beq x4,x6,8000226c +80002260: 2a0032ef jal x5,80005500 +80002264: 80002254 .word 0x80002254 +80002268: 8000c8b5 .word 0x8000c8b5 +8000226c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x7ffffffe +80002270: 00062083 lw x1,0(x12) +80002274: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x7fffffff +80002278: 00062103 lw x2,0(x12) +8000227c: 00460613 addi x12,x12,4 + +80002280 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sha512sum1r x27, x1, x2 # perform operation +80002280: 52208db3 sha512sum1r x27,x1,x2 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +80002284: 00052203 lw x4,0(x10) +80002288: 01b20863 beq x4,x27,80002298 +8000228c: 274032ef jal x5,80005500 +80002290: 80002280 .word 0x80002280 +80002294: 8000c91b .word 0x8000c91b +80002298: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x7ffffffe +8000229c: 00062803 lw x16,0(x12) +800022a0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x7ffffffe +800022a4: 00062a83 lw x21,0(x12) +800022a8: 00460613 addi x12,x12,4 + +800022ac : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sha512sum1r x7, x16, x21 # perform operation +800022ac: 535803b3 sha512sum1r x7,x16,x21 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022b0: 00052203 lw x4,0(x10) +800022b4: 00720863 beq x4,x7,800022c4 +800022b8: 248032ef jal x5,80005500 +800022bc: 800022ac .word 0x800022ac +800022c0: 8000c981 .word 0x8000c981 +800022c4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x7ffffffe +800022c8: 00062703 lw x14,0(x12) +800022cc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xffffffff +800022d0: 00062d83 lw x27,0(x12) +800022d4: 00460613 addi x12,x12,4 + +800022d8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sha512sum1r x3, x14, x27 # perform operation +800022d8: 53b701b3 sha512sum1r x3,x14,x27 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022dc: 00052203 lw x4,0(x10) +800022e0: 00320863 beq x4,x3,800022f0 +800022e4: 21c032ef jal x5,80005500 +800022e8: 800022d8 .word 0x800022d8 +800022ec: 8000c9e7 .word 0x8000c9e7 +800022f0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7ffffffe +800022f4: 00062b83 lw x23,0(x12) +800022f8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xfffffffe +800022fc: 00062a03 lw x20,0(x12) +80002300: 00460613 addi x12,x12,4 + +80002304 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sha512sum1r x15, x23, x20 # perform operation +80002304: 534b87b3 sha512sum1r x15,x23,x20 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002308: 00052203 lw x4,0(x10) +8000230c: 00f20863 beq x4,x15,8000231c +80002310: 1f0032ef jal x5,80005500 +80002314: 80002304 .word 0x80002304 +80002318: 8000ca4d .word 0x8000ca4d +8000231c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x7ffffffe +80002320: 00062403 lw x8,0(x12) +80002324: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x5bbc8872 +80002328: 00062903 lw x18,0(x12) +8000232c: 00460613 addi x12,x12,4 + +80002330 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sha512sum1r x3, x8, x18 # perform operation +80002330: 532401b3 sha512sum1r x3,x8,x18 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002334: 00052203 lw x4,0(x10) +80002338: 00320863 beq x4,x3,80002348 +8000233c: 1c4032ef jal x5,80005500 +80002340: 80002330 .word 0x80002330 +80002344: 8000cab3 .word 0x8000cab3 +80002348: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x7ffffffe +8000234c: 00062303 lw x6,0(x12) +80002350: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xaaaaaaaa +80002354: 00062e03 lw x28,0(x12) +80002358: 00460613 addi x12,x12,4 + +8000235c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sha512sum1r x25, x6, x28 # perform operation +8000235c: 53c30cb3 sha512sum1r x25,x6,x28 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002360: 00052203 lw x4,0(x10) +80002364: 01920863 beq x4,x25,80002374 +80002368: 198032ef jal x5,80005500 +8000236c: 8000235c .word 0x8000235c +80002370: 8000cb19 .word 0x8000cb19 +80002374: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7ffffffe +80002378: 00062b83 lw x23,0(x12) +8000237c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x55555555 +80002380: 00062e03 lw x28,0(x12) +80002384: 00460613 addi x12,x12,4 + +80002388 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sha512sum1r x27, x23, x28 # perform operation +80002388: 53cb8db3 sha512sum1r x27,x23,x28 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +8000238c: 00052203 lw x4,0(x10) +80002390: 01b20863 beq x4,x27,800023a0 +80002394: 16c032ef jal x5,80005500 +80002398: 80002388 .word 0x80002388 +8000239c: 8000cb7f .word 0x8000cb7f +800023a0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xffffffff +800023a4: 00062c03 lw x24,0(x12) +800023a8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000000 +800023ac: 00062b03 lw x22,0(x12) +800023b0: 00460613 addi x12,x12,4 + +800023b4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sha512sum1r x31, x24, x22 # perform operation +800023b4: 536c0fb3 sha512sum1r x31,x24,x22 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023b8: 00052203 lw x4,0(x10) +800023bc: 01f20863 beq x4,x31,800023cc +800023c0: 140032ef jal x5,80005500 +800023c4: 800023b4 .word 0x800023b4 +800023c8: 8000cbe5 .word 0x8000cbe5 +800023cc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xffffffff +800023d0: 00062883 lw x17,0(x12) +800023d4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x00000001 +800023d8: 00062083 lw x1,0(x12) +800023dc: 00460613 addi x12,x12,4 + +800023e0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sha512sum1r x29, x17, x1 # perform operation +800023e0: 52188eb3 sha512sum1r x29,x17,x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023e4: 00052203 lw x4,0(x10) +800023e8: 01d20863 beq x4,x29,800023f8 +800023ec: 114032ef jal x5,80005500 +800023f0: 800023e0 .word 0x800023e0 +800023f4: 8000cc44 .word 0x8000cc44 +800023f8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xffffffff +800023fc: 00062483 lw x9,0(x12) +80002400: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000002 +80002404: 00062e83 lw x29,0(x12) +80002408: 00460613 addi x12,x12,4 + +8000240c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sha512sum1r x16, x9, x29 # perform operation +8000240c: 53d48833 sha512sum1r x16,x9,x29 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002410: 00052203 lw x4,0(x10) +80002414: 01020863 beq x4,x16,80002424 +80002418: 0e8032ef jal x5,80005500 +8000241c: 8000240c .word 0x8000240c +80002420: 8000cca3 .word 0x8000cca3 +80002424: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xffffffff +80002428: 00062b83 lw x23,0(x12) +8000242c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x80000000 +80002430: 00062683 lw x13,0(x12) +80002434: 00460613 addi x12,x12,4 + +80002438 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sha512sum1r x21, x23, x13 # perform operation +80002438: 52db8ab3 sha512sum1r x21,x23,x13 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +8000243c: 00052203 lw x4,0(x10) +80002440: 01520863 beq x4,x21,80002450 +80002444: 0bc032ef jal x5,80005500 +80002448: 80002438 .word 0x80002438 +8000244c: 8000cd02 .word 0x8000cd02 +80002450: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +80002454: 00062783 lw x15,0(x12) +80002458: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x80000001 +8000245c: 00062103 lw x2,0(x12) +80002460: 00460613 addi x12,x12,4 + +80002464 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sha512sum1r x14, x15, x2 # perform operation +80002464: 52278733 sha512sum1r x14,x15,x2 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002468: 00052203 lw x4,0(x10) +8000246c: 00e20863 beq x4,x14,8000247c +80002470: 090032ef jal x5,80005500 +80002474: 80002464 .word 0x80002464 +80002478: 8000cd68 .word 0x8000cd68 +8000247c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xffffffff +80002480: 00062783 lw x15,0(x12) +80002484: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x7fffffff +80002488: 00062083 lw x1,0(x12) +8000248c: 00460613 addi x12,x12,4 + +80002490 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sha512sum1r x31, x15, x1 # perform operation +80002490: 52178fb3 sha512sum1r x31,x15,x1 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +80002494: 00052203 lw x4,0(x10) +80002498: 01f20863 beq x4,x31,800024a8 +8000249c: 064032ef jal x5,80005500 +800024a0: 80002490 .word 0x80002490 +800024a4: 8000cdce .word 0x8000cdce +800024a8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xffffffff +800024ac: 00062b03 lw x22,0(x12) +800024b0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x7ffffffe +800024b4: 00062c03 lw x24,0(x12) +800024b8: 00460613 addi x12,x12,4 + +800024bc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sha512sum1r x20, x22, x24 # perform operation +800024bc: 538b0a33 sha512sum1r x20,x22,x24 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024c0: 00052203 lw x4,0(x10) +800024c4: 01420863 beq x4,x20,800024d4 +800024c8: 038032ef jal x5,80005500 +800024cc: 800024bc .word 0x800024bc +800024d0: 8000ce34 .word 0x8000ce34 +800024d4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xffffffff +800024d8: 00062883 lw x17,0(x12) +800024dc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xffffffff +800024e0: 00062d03 lw x26,0(x12) +800024e4: 00460613 addi x12,x12,4 + +800024e8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sha512sum1r x13, x17, x26 # perform operation +800024e8: 53a886b3 sha512sum1r x13,x17,x26 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +800024ec: 00052203 lw x4,0(x10) +800024f0: 00d20863 beq x4,x13,80002500 +800024f4: 00c032ef jal x5,80005500 +800024f8: 800024e8 .word 0x800024e8 +800024fc: 8000ce9a .word 0x8000ce9a +80002500: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xffffffff +80002504: 00062803 lw x16,0(x12) +80002508: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xfffffffe +8000250c: 00062083 lw x1,0(x12) +80002510: 00460613 addi x12,x12,4 + +80002514 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sha512sum1r x15, x16, x1 # perform operation +80002514: 521807b3 sha512sum1r x15,x16,x1 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002518: 00052203 lw x4,0(x10) +8000251c: 00f20863 beq x4,x15,8000252c +80002520: 7e1022ef jal x5,80005500 +80002524: 80002514 .word 0x80002514 +80002528: 8000cf00 .word 0x8000cf00 +8000252c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xffffffff +80002530: 00062c83 lw x25,0(x12) +80002534: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x5bbc8872 +80002538: 00062783 lw x15,0(x12) +8000253c: 00460613 addi x12,x12,4 + +80002540 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sha512sum1r x7, x25, x15 # perform operation +80002540: 52fc83b3 sha512sum1r x7,x25,x15 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002544: 00052203 lw x4,0(x10) +80002548: 00720863 beq x4,x7,80002558 +8000254c: 7b5022ef jal x5,80005500 +80002550: 80002540 .word 0x80002540 +80002554: 8000cf66 .word 0x8000cf66 +80002558: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xffffffff +8000255c: 00062303 lw x6,0(x12) +80002560: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xaaaaaaaa +80002564: 00062083 lw x1,0(x12) +80002568: 00460613 addi x12,x12,4 + +8000256c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sha512sum1r x2, x6, x1 # perform operation +8000256c: 52130133 sha512sum1r x2,x6,x1 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002570: 00052203 lw x4,0(x10) +80002574: 00220863 beq x4,x2,80002584 +80002578: 789022ef jal x5,80005500 +8000257c: 8000256c .word 0x8000256c +80002580: 8000cfcc .word 0x8000cfcc +80002584: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xffffffff +80002588: 00062b83 lw x23,0(x12) +8000258c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x55555555 +80002590: 00062c83 lw x25,0(x12) +80002594: 00460613 addi x12,x12,4 + +80002598 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sha512sum1r x30, x23, x25 # perform operation +80002598: 539b8f33 sha512sum1r x30,x23,x25 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +8000259c: 00052203 lw x4,0(x10) +800025a0: 01e20863 beq x4,x30,800025b0 +800025a4: 75d022ef jal x5,80005500 +800025a8: 80002598 .word 0x80002598 +800025ac: 8000d032 .word 0x8000d032 +800025b0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xfffffffe +800025b4: 00062303 lw x6,0(x12) +800025b8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x00000000 +800025bc: 00062b03 lw x22,0(x12) +800025c0: 00460613 addi x12,x12,4 + +800025c4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sha512sum1r x24, x6, x22 # perform operation +800025c4: 53630c33 sha512sum1r x24,x6,x22 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025c8: 00052203 lw x4,0(x10) +800025cc: 01820863 beq x4,x24,800025dc +800025d0: 731022ef jal x5,80005500 +800025d4: 800025c4 .word 0x800025c4 +800025d8: 8000d098 .word 0x8000d098 +800025dc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xfffffffe +800025e0: 00062983 lw x19,0(x12) +800025e4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +800025e8: 00062c83 lw x25,0(x12) +800025ec: 00460613 addi x12,x12,4 + +800025f0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sha512sum1r x2, x19, x25 # perform operation +800025f0: 53998133 sha512sum1r x2,x19,x25 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +800025f4: 00052203 lw x4,0(x10) +800025f8: 00220863 beq x4,x2,80002608 +800025fc: 705022ef jal x5,80005500 +80002600: 800025f0 .word 0x800025f0 +80002604: 8000d0f7 .word 0x8000d0f7 +80002608: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xfffffffe +8000260c: 00062c03 lw x24,0(x12) +80002610: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x00000002 +80002614: 00062d03 lw x26,0(x12) +80002618: 00460613 addi x12,x12,4 + +8000261c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sha512sum1r x1, x24, x26 # perform operation +8000261c: 53ac00b3 sha512sum1r x1,x24,x26 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002620: 00052203 lw x4,0(x10) +80002624: 00120863 beq x4,x1,80002634 +80002628: 6d9022ef jal x5,80005500 +8000262c: 8000261c .word 0x8000261c +80002630: 8000d156 .word 0x8000d156 +80002634: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xfffffffe +80002638: 00062303 lw x6,0(x12) +8000263c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x80000000 +80002640: 00062a03 lw x20,0(x12) +80002644: 00460613 addi x12,x12,4 + +80002648 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sha512sum1r x23, x6, x20 # perform operation +80002648: 53430bb3 sha512sum1r x23,x6,x20 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +8000264c: 00052203 lw x4,0(x10) +80002650: 01720863 beq x4,x23,80002660 +80002654: 6ad022ef jal x5,80005500 +80002658: 80002648 .word 0x80002648 +8000265c: 8000d1b5 .word 0x8000d1b5 +80002660: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xfffffffe +80002664: 00062b83 lw x23,0(x12) +80002668: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x80000001 +8000266c: 00062783 lw x15,0(x12) +80002670: 00460613 addi x12,x12,4 + +80002674 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sha512sum1r x27, x23, x15 # perform operation +80002674: 52fb8db3 sha512sum1r x27,x23,x15 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002678: 00052203 lw x4,0(x10) +8000267c: 01b20863 beq x4,x27,8000268c +80002680: 681022ef jal x5,80005500 +80002684: 80002674 .word 0x80002674 +80002688: 8000d21b .word 0x8000d21b +8000268c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xfffffffe +80002690: 00062903 lw x18,0(x12) +80002694: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x7fffffff +80002698: 00062103 lw x2,0(x12) +8000269c: 00460613 addi x12,x12,4 + +800026a0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sha512sum1r x23, x18, x2 # perform operation +800026a0: 52290bb3 sha512sum1r x23,x18,x2 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026a4: 00052203 lw x4,0(x10) +800026a8: 01720863 beq x4,x23,800026b8 +800026ac: 655022ef jal x5,80005500 +800026b0: 800026a0 .word 0x800026a0 +800026b4: 8000d281 .word 0x8000d281 +800026b8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xfffffffe +800026bc: 00062b83 lw x23,0(x12) +800026c0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x7ffffffe +800026c4: 00062683 lw x13,0(x12) +800026c8: 00460613 addi x12,x12,4 + +800026cc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sha512sum1r x20, x23, x13 # perform operation +800026cc: 52db8a33 sha512sum1r x20,x23,x13 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026d0: 00052203 lw x4,0(x10) +800026d4: 01420863 beq x4,x20,800026e4 +800026d8: 629022ef jal x5,80005500 +800026dc: 800026cc .word 0x800026cc +800026e0: 8000d2e7 .word 0x8000d2e7 +800026e4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xfffffffe +800026e8: 00062103 lw x2,0(x12) +800026ec: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xffffffff +800026f0: 00062483 lw x9,0(x12) +800026f4: 00460613 addi x12,x12,4 + +800026f8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sha512sum1r x13, x2, x9 # perform operation +800026f8: 529106b3 sha512sum1r x13,x2,x9 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +800026fc: 00052203 lw x4,0(x10) +80002700: 00d20863 beq x4,x13,80002710 +80002704: 5fd022ef jal x5,80005500 +80002708: 800026f8 .word 0x800026f8 +8000270c: 8000d34d .word 0x8000d34d +80002710: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0xfffffffe +80002714: 00062383 lw x7,0(x12) +80002718: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xfffffffe +8000271c: 00062c83 lw x25,0(x12) +80002720: 00460613 addi x12,x12,4 + +80002724 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sha512sum1r x15, x7, x25 # perform operation +80002724: 539387b3 sha512sum1r x15,x7,x25 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002728: 00052203 lw x4,0(x10) +8000272c: 00f20863 beq x4,x15,8000273c +80002730: 5d1022ef jal x5,80005500 +80002734: 80002724 .word 0x80002724 +80002738: 8000d3b3 .word 0x8000d3b3 +8000273c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xfffffffe +80002740: 00062883 lw x17,0(x12) +80002744: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x5bbc8872 +80002748: 00062a03 lw x20,0(x12) +8000274c: 00460613 addi x12,x12,4 + +80002750 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sha512sum1r x15, x17, x20 # perform operation +80002750: 534887b3 sha512sum1r x15,x17,x20 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002754: 00052203 lw x4,0(x10) +80002758: 00f20863 beq x4,x15,80002768 +8000275c: 5a5022ef jal x5,80005500 +80002760: 80002750 .word 0x80002750 +80002764: 8000d419 .word 0x8000d419 +80002768: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xfffffffe +8000276c: 00062f03 lw x30,0(x12) +80002770: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xaaaaaaaa +80002774: 00062c03 lw x24,0(x12) +80002778: 00460613 addi x12,x12,4 + +8000277c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sha512sum1r x18, x30, x24 # perform operation +8000277c: 538f0933 sha512sum1r x18,x30,x24 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002780: 00052203 lw x4,0(x10) +80002784: 01220863 beq x4,x18,80002794 +80002788: 579022ef jal x5,80005500 +8000278c: 8000277c .word 0x8000277c +80002790: 8000d47f .word 0x8000d47f +80002794: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xfffffffe +80002798: 00062703 lw x14,0(x12) +8000279c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x55555555 +800027a0: 00062103 lw x2,0(x12) +800027a4: 00460613 addi x12,x12,4 + +800027a8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sha512sum1r x19, x14, x2 # perform operation +800027a8: 522709b3 sha512sum1r x19,x14,x2 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027ac: 00052203 lw x4,0(x10) +800027b0: 01320863 beq x4,x19,800027c0 +800027b4: 54d022ef jal x5,80005500 +800027b8: 800027a8 .word 0x800027a8 +800027bc: 8000d4e5 .word 0x8000d4e5 +800027c0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x5bbc8872 +800027c4: 00062f03 lw x30,0(x12) +800027c8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000000 +800027cc: 00062683 lw x13,0(x12) +800027d0: 00460613 addi x12,x12,4 + +800027d4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sha512sum1r x28, x30, x13 # perform operation +800027d4: 52df0e33 sha512sum1r x28,x30,x13 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027d8: 00052203 lw x4,0(x10) +800027dc: 01c20863 beq x4,x28,800027ec +800027e0: 521022ef jal x5,80005500 +800027e4: 800027d4 .word 0x800027d4 +800027e8: 8000d54b .word 0x8000d54b +800027ec: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x5bbc8872 +800027f0: 00062a03 lw x20,0(x12) +800027f4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x00000001 +800027f8: 00062c83 lw x25,0(x12) +800027fc: 00460613 addi x12,x12,4 + +80002800 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sha512sum1r x23, x20, x25 # perform operation +80002800: 539a0bb3 sha512sum1r x23,x20,x25 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002804: 00052203 lw x4,0(x10) +80002808: 01720863 beq x4,x23,80002818 +8000280c: 4f5022ef jal x5,80005500 +80002810: 80002800 .word 0x80002800 +80002814: 8000d5aa .word 0x8000d5aa +80002818: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x5bbc8872 +8000281c: 00062183 lw x3,0(x12) +80002820: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x00000002 +80002824: 00062083 lw x1,0(x12) +80002828: 00460613 addi x12,x12,4 + +8000282c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sha512sum1r x24, x3, x1 # perform operation +8000282c: 52118c33 sha512sum1r x24,x3,x1 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002830: 00052203 lw x4,0(x10) +80002834: 01820863 beq x4,x24,80002844 +80002838: 4c9022ef jal x5,80005500 +8000283c: 8000282c .word 0x8000282c +80002840: 8000d609 .word 0x8000d609 +80002844: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x5bbc8872 +80002848: 00062c03 lw x24,0(x12) +8000284c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x80000000 +80002850: 00062e83 lw x29,0(x12) +80002854: 00460613 addi x12,x12,4 + +80002858 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sha512sum1r x2, x24, x29 # perform operation +80002858: 53dc0133 sha512sum1r x2,x24,x29 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +8000285c: 00052203 lw x4,0(x10) +80002860: 00220863 beq x4,x2,80002870 +80002864: 49d022ef jal x5,80005500 +80002868: 80002858 .word 0x80002858 +8000286c: 8000d668 .word 0x8000d668 +80002870: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x5bbc8872 +80002874: 00062683 lw x13,0(x12) +80002878: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x80000001 +8000287c: 00062c83 lw x25,0(x12) +80002880: 00460613 addi x12,x12,4 + +80002884 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sha512sum1r x27, x13, x25 # perform operation +80002884: 53968db3 sha512sum1r x27,x13,x25 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +80002888: 00052203 lw x4,0(x10) +8000288c: 01b20863 beq x4,x27,8000289c +80002890: 471022ef jal x5,80005500 +80002894: 80002884 .word 0x80002884 +80002898: 8000d6ce .word 0x8000d6ce +8000289c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x5bbc8872 +800028a0: 00062d03 lw x26,0(x12) +800028a4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x7fffffff +800028a8: 00062183 lw x3,0(x12) +800028ac: 00460613 addi x12,x12,4 + +800028b0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sha512sum1r x6, x26, x3 # perform operation +800028b0: 523d0333 sha512sum1r x6,x26,x3 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028b4: 00052203 lw x4,0(x10) +800028b8: 00620863 beq x4,x6,800028c8 +800028bc: 445022ef jal x5,80005500 +800028c0: 800028b0 .word 0x800028b0 +800028c4: 8000d734 .word 0x8000d734 +800028c8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x5bbc8872 +800028cc: 00062803 lw x16,0(x12) +800028d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x7ffffffe +800028d4: 00062303 lw x6,0(x12) +800028d8: 00460613 addi x12,x12,4 + +800028dc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sha512sum1r x19, x16, x6 # perform operation +800028dc: 526809b3 sha512sum1r x19,x16,x6 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028e0: 00052203 lw x4,0(x10) +800028e4: 01320863 beq x4,x19,800028f4 +800028e8: 419022ef jal x5,80005500 +800028ec: 800028dc .word 0x800028dc +800028f0: 8000d79a .word 0x8000d79a +800028f4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5bbc8872 +800028f8: 00062e83 lw x29,0(x12) +800028fc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xffffffff +80002900: 00062c03 lw x24,0(x12) +80002904: 00460613 addi x12,x12,4 + +80002908 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sha512sum1r x23, x29, x24 # perform operation +80002908: 538e8bb3 sha512sum1r x23,x29,x24 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +8000290c: 00052203 lw x4,0(x10) +80002910: 01720863 beq x4,x23,80002920 +80002914: 3ed022ef jal x5,80005500 +80002918: 80002908 .word 0x80002908 +8000291c: 8000d800 .word 0x8000d800 +80002920: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x5bbc8872 +80002924: 00062c03 lw x24,0(x12) +80002928: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xfffffffe +8000292c: 00062483 lw x9,0(x12) +80002930: 00460613 addi x12,x12,4 + +80002934 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sha512sum1r x2, x24, x9 # perform operation +80002934: 529c0133 sha512sum1r x2,x24,x9 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002938: 00052203 lw x4,0(x10) +8000293c: 00220863 beq x4,x2,8000294c +80002940: 3c1022ef jal x5,80005500 +80002944: 80002934 .word 0x80002934 +80002948: 8000d866 .word 0x8000d866 +8000294c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x5bbc8872 +80002950: 00062c03 lw x24,0(x12) +80002954: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x5bbc8872 +80002958: 00062a03 lw x20,0(x12) +8000295c: 00460613 addi x12,x12,4 + +80002960 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sha512sum1r x6, x24, x20 # perform operation +80002960: 534c0333 sha512sum1r x6,x24,x20 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002964: 00052203 lw x4,0(x10) +80002968: 00620863 beq x4,x6,80002978 +8000296c: 395022ef jal x5,80005500 +80002970: 80002960 .word 0x80002960 +80002974: 8000d8cc .word 0x8000d8cc +80002978: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x5bbc8872 +8000297c: 00062803 lw x16,0(x12) +80002980: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xaaaaaaaa +80002984: 00062c03 lw x24,0(x12) +80002988: 00460613 addi x12,x12,4 + +8000298c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sha512sum1r x3, x16, x24 # perform operation +8000298c: 538801b3 sha512sum1r x3,x16,x24 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +80002990: 00052203 lw x4,0(x10) +80002994: 00320863 beq x4,x3,800029a4 +80002998: 369022ef jal x5,80005500 +8000299c: 8000298c .word 0x8000298c +800029a0: 8000d932 .word 0x8000d932 +800029a4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x5bbc8872 +800029a8: 00062183 lw x3,0(x12) +800029ac: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x55555555 +800029b0: 00062383 lw x7,0(x12) +800029b4: 00460613 addi x12,x12,4 + +800029b8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sha512sum1r x1, x3, x7 # perform operation +800029b8: 527180b3 sha512sum1r x1,x3,x7 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029bc: 00052203 lw x4,0(x10) +800029c0: 00120863 beq x4,x1,800029d0 +800029c4: 33d022ef jal x5,80005500 +800029c8: 800029b8 .word 0x800029b8 +800029cc: 8000d998 .word 0x8000d998 +800029d0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xaaaaaaaa +800029d4: 00062483 lw x9,0(x12) +800029d8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x00000000 +800029dc: 00062b83 lw x23,0(x12) +800029e0: 00460613 addi x12,x12,4 + +800029e4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sha512sum1r x16, x9, x23 # perform operation +800029e4: 53748833 sha512sum1r x16,x9,x23 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +800029e8: 00052203 lw x4,0(x10) +800029ec: 01020863 beq x4,x16,800029fc +800029f0: 311022ef jal x5,80005500 +800029f4: 800029e4 .word 0x800029e4 +800029f8: 8000d9fe .word 0x8000d9fe +800029fc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xaaaaaaaa +80002a00: 00062a03 lw x20,0(x12) +80002a04: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x00000001 +80002a08: 00062683 lw x13,0(x12) +80002a0c: 00460613 addi x12,x12,4 + +80002a10 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sha512sum1r x16, x20, x13 # perform operation +80002a10: 52da0833 sha512sum1r x16,x20,x13 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a14: 00052203 lw x4,0(x10) +80002a18: 01020863 beq x4,x16,80002a28 +80002a1c: 2e5022ef jal x5,80005500 +80002a20: 80002a10 .word 0x80002a10 +80002a24: 8000da5d .word 0x8000da5d +80002a28: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xaaaaaaaa +80002a2c: 00062a03 lw x20,0(x12) +80002a30: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x00000002 +80002a34: 00062f83 lw x31,0(x12) +80002a38: 00460613 addi x12,x12,4 + +80002a3c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sha512sum1r x29, x20, x31 # perform operation +80002a3c: 53fa0eb3 sha512sum1r x29,x20,x31 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a40: 00052203 lw x4,0(x10) +80002a44: 01d20863 beq x4,x29,80002a54 +80002a48: 2b9022ef jal x5,80005500 +80002a4c: 80002a3c .word 0x80002a3c +80002a50: 8000dabc .word 0x8000dabc +80002a54: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xaaaaaaaa +80002a58: 00062703 lw x14,0(x12) +80002a5c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x80000000 +80002a60: 00062d03 lw x26,0(x12) +80002a64: 00460613 addi x12,x12,4 + +80002a68 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sha512sum1r x17, x14, x26 # perform operation +80002a68: 53a708b3 sha512sum1r x17,x14,x26 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a6c: 00052203 lw x4,0(x10) +80002a70: 01120863 beq x4,x17,80002a80 +80002a74: 28d022ef jal x5,80005500 +80002a78: 80002a68 .word 0x80002a68 +80002a7c: 8000db1b .word 0x8000db1b +80002a80: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xaaaaaaaa +80002a84: 00062e03 lw x28,0(x12) +80002a88: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x80000001 +80002a8c: 00062a83 lw x21,0(x12) +80002a90: 00460613 addi x12,x12,4 + +80002a94 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sha512sum1r x17, x28, x21 # perform operation +80002a94: 535e08b3 sha512sum1r x17,x28,x21 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002a98: 00052203 lw x4,0(x10) +80002a9c: 01120863 beq x4,x17,80002aac +80002aa0: 261022ef jal x5,80005500 +80002aa4: 80002a94 .word 0x80002a94 +80002aa8: 8000db81 .word 0x8000db81 +80002aac: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xaaaaaaaa +80002ab0: 00062f03 lw x30,0(x12) +80002ab4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x7fffffff +80002ab8: 00062403 lw x8,0(x12) +80002abc: 00460613 addi x12,x12,4 + +80002ac0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sha512sum1r x11, x30, x8 # perform operation +80002ac0: 528f05b3 sha512sum1r x11,x30,x8 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ac4: 00052203 lw x4,0(x10) +80002ac8: 00b20863 beq x4,x11,80002ad8 +80002acc: 235022ef jal x5,80005500 +80002ad0: 80002ac0 .word 0x80002ac0 +80002ad4: 8000dbe7 .word 0x8000dbe7 +80002ad8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xaaaaaaaa +80002adc: 00062f83 lw x31,0(x12) +80002ae0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x7ffffffe +80002ae4: 00062783 lw x15,0(x12) +80002ae8: 00460613 addi x12,x12,4 + +80002aec : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sha512sum1r x18, x31, x15 # perform operation +80002aec: 52ff8933 sha512sum1r x18,x31,x15 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002af0: 00052203 lw x4,0(x10) +80002af4: 01220863 beq x4,x18,80002b04 +80002af8: 209022ef jal x5,80005500 +80002afc: 80002aec .word 0x80002aec +80002b00: 8000dc4d .word 0x8000dc4d +80002b04: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xaaaaaaaa +80002b08: 00062f83 lw x31,0(x12) +80002b0c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xffffffff +80002b10: 00062883 lw x17,0(x12) +80002b14: 00460613 addi x12,x12,4 + +80002b18 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sha512sum1r x18, x31, x17 # perform operation +80002b18: 531f8933 sha512sum1r x18,x31,x17 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b1c: 00052203 lw x4,0(x10) +80002b20: 01220863 beq x4,x18,80002b30 +80002b24: 1dd022ef jal x5,80005500 +80002b28: 80002b18 .word 0x80002b18 +80002b2c: 8000dcb3 .word 0x8000dcb3 +80002b30: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xaaaaaaaa +80002b34: 00062403 lw x8,0(x12) +80002b38: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xfffffffe +80002b3c: 00062803 lw x16,0(x12) +80002b40: 00460613 addi x12,x12,4 + +80002b44 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sha512sum1r x9, x8, x16 # perform operation +80002b44: 530404b3 sha512sum1r x9,x8,x16 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b48: 00052203 lw x4,0(x10) +80002b4c: 00920863 beq x4,x9,80002b5c +80002b50: 1b1022ef jal x5,80005500 +80002b54: 80002b44 .word 0x80002b44 +80002b58: 8000dd19 .word 0x8000dd19 +80002b5c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xaaaaaaaa +80002b60: 00062d03 lw x26,0(x12) +80002b64: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x5bbc8872 +80002b68: 00062883 lw x17,0(x12) +80002b6c: 00460613 addi x12,x12,4 + +80002b70 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sha512sum1r x8, x26, x17 # perform operation +80002b70: 531d0433 sha512sum1r x8,x26,x17 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b74: 00052203 lw x4,0(x10) +80002b78: 00820863 beq x4,x8,80002b88 +80002b7c: 185022ef jal x5,80005500 +80002b80: 80002b70 .word 0x80002b70 +80002b84: 8000dd7f .word 0x8000dd7f +80002b88: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xaaaaaaaa +80002b8c: 00062303 lw x6,0(x12) +80002b90: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xaaaaaaaa +80002b94: 00062f03 lw x30,0(x12) +80002b98: 00460613 addi x12,x12,4 + +80002b9c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sha512sum1r x19, x6, x30 # perform operation +80002b9c: 53e309b3 sha512sum1r x19,x6,x30 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002ba0: 00052203 lw x4,0(x10) +80002ba4: 01320863 beq x4,x19,80002bb4 +80002ba8: 159022ef jal x5,80005500 +80002bac: 80002b9c .word 0x80002b9c +80002bb0: 8000dde5 .word 0x8000dde5 +80002bb4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xaaaaaaaa +80002bb8: 00062983 lw x19,0(x12) +80002bbc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x55555555 +80002bc0: 00062183 lw x3,0(x12) +80002bc4: 00460613 addi x12,x12,4 + +80002bc8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sha512sum1r x25, x19, x3 # perform operation +80002bc8: 52398cb3 sha512sum1r x25,x19,x3 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bcc: 00052203 lw x4,0(x10) +80002bd0: 01920863 beq x4,x25,80002be0 +80002bd4: 12d022ef jal x5,80005500 +80002bd8: 80002bc8 .word 0x80002bc8 +80002bdc: 8000de4b .word 0x8000de4b +80002be0: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x55555555 +80002be4: 00062f03 lw x30,0(x12) +80002be8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x00000000 +80002bec: 00062d03 lw x26,0(x12) +80002bf0: 00460613 addi x12,x12,4 + +80002bf4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sha512sum1r x13, x30, x26 # perform operation +80002bf4: 53af06b3 sha512sum1r x13,x30,x26 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002bf8: 00052203 lw x4,0(x10) +80002bfc: 00d20863 beq x4,x13,80002c0c +80002c00: 101022ef jal x5,80005500 +80002c04: 80002bf4 .word 0x80002bf4 +80002c08: 8000deb1 .word 0x8000deb1 +80002c0c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x55555555 +80002c10: 00062f03 lw x30,0(x12) +80002c14: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x00000001 +80002c18: 00062e83 lw x29,0(x12) +80002c1c: 00460613 addi x12,x12,4 + +80002c20 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sha512sum1r x1, x30, x29 # perform operation +80002c20: 53df00b3 sha512sum1r x1,x30,x29 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c24: 00052203 lw x4,0(x10) +80002c28: 00120863 beq x4,x1,80002c38 +80002c2c: 0d5022ef jal x5,80005500 +80002c30: 80002c20 .word 0x80002c20 +80002c34: 8000df10 .word 0x8000df10 +80002c38: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x55555555 +80002c3c: 00062483 lw x9,0(x12) +80002c40: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x00000002 +80002c44: 00062583 lw x11,0(x12) +80002c48: 00460613 addi x12,x12,4 + +80002c4c : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sha512sum1r x18, x9, x11 # perform operation +80002c4c: 52b48933 sha512sum1r x18,x9,x11 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c50: 00052203 lw x4,0(x10) +80002c54: 01220863 beq x4,x18,80002c64 +80002c58: 0a9022ef jal x5,80005500 +80002c5c: 80002c4c .word 0x80002c4c +80002c60: 8000df6f .word 0x8000df6f +80002c64: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x55555555 +80002c68: 00062183 lw x3,0(x12) +80002c6c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x80000000 +80002c70: 00062103 lw x2,0(x12) +80002c74: 00460613 addi x12,x12,4 + +80002c78 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sha512sum1r x13, x3, x2 # perform operation +80002c78: 522186b3 sha512sum1r x13,x3,x2 + # Check if x13 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x13, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c7c: 00052203 lw x4,0(x10) +80002c80: 00d20863 beq x4,x13,80002c90 +80002c84: 07d022ef jal x5,80005500 +80002c88: 80002c78 .word 0x80002c78 +80002c8c: 8000dfce .word 0x8000dfce +80002c90: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x55555555 +80002c94: 00062783 lw x15,0(x12) +80002c98: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x80000001 +80002c9c: 00062b03 lw x22,0(x12) +80002ca0: 00460613 addi x12,x12,4 + +80002ca4 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sha512sum1r x25, x15, x22 # perform operation +80002ca4: 53678cb3 sha512sum1r x25,x15,x22 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002ca8: 00052203 lw x4,0(x10) +80002cac: 01920863 beq x4,x25,80002cbc +80002cb0: 051022ef jal x5,80005500 +80002cb4: 80002ca4 .word 0x80002ca4 +80002cb8: 8000e034 .word 0x8000e034 +80002cbc: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x55555555 +80002cc0: 00062883 lw x17,0(x12) +80002cc4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x7fffffff +80002cc8: 00062583 lw x11,0(x12) +80002ccc: 00460613 addi x12,x12,4 + +80002cd0 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sha512sum1r x19, x17, x11 # perform operation +80002cd0: 52b889b3 sha512sum1r x19,x17,x11 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cd4: 00052203 lw x4,0(x10) +80002cd8: 01320863 beq x4,x19,80002ce8 +80002cdc: 025022ef jal x5,80005500 +80002ce0: 80002cd0 .word 0x80002cd0 +80002ce4: 8000e09a .word 0x8000e09a +80002ce8: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x55555555 +80002cec: 00062983 lw x19,0(x12) +80002cf0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x7ffffffe +80002cf4: 00062d03 lw x26,0(x12) +80002cf8: 00460613 addi x12,x12,4 + +80002cfc : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sha512sum1r x23, x19, x26 # perform operation +80002cfc: 53a98bb3 sha512sum1r x23,x19,x26 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d00: 00052203 lw x4,0(x10) +80002d04: 01720863 beq x4,x23,80002d14 +80002d08: 7f8022ef jal x5,80005500 +80002d0c: 80002cfc .word 0x80002cfc +80002d10: 8000e100 .word 0x8000e100 +80002d14: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x55555555 +80002d18: 00062103 lw x2,0(x12) +80002d1c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xffffffff +80002d20: 00062a83 lw x21,0(x12) +80002d24: 00460613 addi x12,x12,4 + +80002d28 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sha512sum1r x15, x2, x21 # perform operation +80002d28: 535107b3 sha512sum1r x15,x2,x21 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d2c: 00052203 lw x4,0(x10) +80002d30: 00f20863 beq x4,x15,80002d40 +80002d34: 7cc022ef jal x5,80005500 +80002d38: 80002d28 .word 0x80002d28 +80002d3c: 8000e166 .word 0x8000e166 +80002d40: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x55555555 +80002d44: 00062e03 lw x28,0(x12) +80002d48: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xfffffffe +80002d4c: 00062f83 lw x31,0(x12) +80002d50: 00460613 addi x12,x12,4 + +80002d54 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sha512sum1r x16, x28, x31 # perform operation +80002d54: 53fe0833 sha512sum1r x16,x28,x31 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d58: 00052203 lw x4,0(x10) +80002d5c: 01020863 beq x4,x16,80002d6c +80002d60: 7a0022ef jal x5,80005500 +80002d64: 80002d54 .word 0x80002d54 +80002d68: 8000e1cc .word 0x8000e1cc +80002d6c: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x55555555 +80002d70: 00062583 lw x11,0(x12) +80002d74: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x5bbc8872 +80002d78: 00062883 lw x17,0(x12) +80002d7c: 00460613 addi x12,x12,4 + +80002d80 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sha512sum1r x31, x11, x17 # perform operation +80002d80: 53158fb3 sha512sum1r x31,x11,x17 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d84: 00052203 lw x4,0(x10) +80002d88: 01f20863 beq x4,x31,80002d98 +80002d8c: 774022ef jal x5,80005500 +80002d90: 80002d80 .word 0x80002d80 +80002d94: 8000e232 .word 0x8000e232 +80002d98: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x55555555 +80002d9c: 00062783 lw x15,0(x12) +80002da0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xaaaaaaaa +80002da4: 00062803 lw x16,0(x12) +80002da8: 00460613 addi x12,x12,4 + +80002dac : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sha512sum1r x17, x15, x16 # perform operation +80002dac: 530788b3 sha512sum1r x17,x15,x16 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002db0: 00052203 lw x4,0(x10) +80002db4: 01120863 beq x4,x17,80002dc4 +80002db8: 748022ef jal x5,80005500 +80002dbc: 80002dac .word 0x80002dac +80002dc0: 8000e298 .word 0x8000e298 +80002dc4: 00450513 addi x10,x10,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x55555555 +80002dc8: 00062103 lw x2,0(x12) +80002dcc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x55555555 +80002dd0: 00062d03 lw x26,0(x12) +80002dd4: 00460613 addi x12,x12,4 + +80002dd8 : +Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sha512sum1r x25, x2, x26 # perform operation +80002dd8: 53a10cb3 sha512sum1r x25,x2,x26 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zknh_sha512sum1r_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002ddc: 00052203 lw x4,0(x10) +80002de0: 01920863 beq x4,x25,80002df0 +80002de4: 71c022ef jal x5,80005500 +80002de8: 80002dd8 .word 0x80002dd8 +80002dec: 8000e2fe .word 0x8000e2fe +80002df0: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x1ec79e9d +80002df4: 00062003 lw x0,0(x12) +80002df8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0xafd85004 +80002dfc: 00062003 lw x0,0(x12) +80002e00: 00460613 addi x12,x12,4 + +80002e04 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b0: + sha512sum1r x15, x0, x0 # perform operation +80002e04: 520007b3 sha512sum1r x15,x0,x0 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b0, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b0_str) +80002e08: 00052203 lw x4,0(x10) +80002e0c: 00f20863 beq x4,x15,80002e1c +80002e10: 6f0022ef jal x5,80005500 +80002e14: 80002e04 .word 0x80002e04 +80002e18: 8000e364 .word 0x8000e364 +80002e1c: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x612723c5 +80002e20: 00062083 lw x1,0(x12) +80002e24: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xab459814 +80002e28: 00062083 lw x1,0(x12) +80002e2c: 00460613 addi x12,x12,4 + +80002e30 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b1: + sha512sum1r x21, x1, x1 # perform operation +80002e30: 52108ab3 sha512sum1r x21,x1,x1 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b1, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b1_str) +80002e34: 00052203 lw x4,0(x10) +80002e38: 01520863 beq x4,x21,80002e48 +80002e3c: 6c4022ef jal x5,80005500 +80002e40: 80002e30 .word 0x80002e30 +80002e44: 8000e3a3 .word 0x8000e3a3 +80002e48: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x6ba9e972 +80002e4c: 00062103 lw x2,0(x12) +80002e50: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x25f49451 +80002e54: 00062103 lw x2,0(x12) +80002e58: 00460613 addi x12,x12,4 + +80002e5c : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b2: + sha512sum1r x31, x2, x2 # perform operation +80002e5c: 52210fb3 sha512sum1r x31,x2,x2 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b2, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b2_str) +80002e60: 00052203 lw x4,0(x10) +80002e64: 01f20863 beq x4,x31,80002e74 +80002e68: 698022ef jal x5,80005500 +80002e6c: 80002e5c .word 0x80002e5c +80002e70: 8000e3e2 .word 0x8000e3e2 +80002e74: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xd659b19d +80002e78: 00062183 lw x3,0(x12) +80002e7c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x4d5053b9 +80002e80: 00062183 lw x3,0(x12) +80002e84: 00460613 addi x12,x12,4 + +80002e88 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b3: + sha512sum1r x1, x3, x3 # perform operation +80002e88: 523180b3 sha512sum1r x1,x3,x3 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b3, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b3_str) +80002e8c: 00052203 lw x4,0(x10) +80002e90: 00120863 beq x4,x1,80002ea0 +80002e94: 66c022ef jal x5,80005500 +80002e98: 80002e88 .word 0x80002e88 +80002e9c: 8000e421 .word 0x8000e421 +80002ea0: 00450513 addi x10,x10,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80002ea4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80002ea8: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xc9638453 +80002eac: 00062203 lw x4,0(x12) +80002eb0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x89062b6e +80002eb4: 00062203 lw x4,0(x12) +80002eb8: 00460613 addi x12,x12,4 + +80002ebc : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b4: + sha512sum1r x18, x4, x4 # perform operation +80002ebc: 52420933 sha512sum1r x18,x4,x4 + # Check if x18 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x18, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b4, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b4_str) +80002ec0: 00052683 lw x13,0(x10) +80002ec4: 01268863 beq x13,x18,80002ed4 +80002ec8: 6780276f jal x14,80005540 +80002ecc: 80002ebc .word 0x80002ebc +80002ed0: 8000e460 .word 0x8000e460 +80002ed4: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x3e42d474 +80002ed8: 00062283 lw x5,0(x12) +80002edc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x2305ea43 +80002ee0: 00062283 lw x5,0(x12) +80002ee4: 00460613 addi x12,x12,4 + +80002ee8 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b5: + sha512sum1r x9, x5, x5 # perform operation +80002ee8: 525284b3 sha512sum1r x9,x5,x5 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b5, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b5_str) +80002eec: 00052683 lw x13,0(x10) +80002ef0: 00968863 beq x13,x9,80002f00 +80002ef4: 64c0276f jal x14,80005540 +80002ef8: 80002ee8 .word 0x80002ee8 +80002efc: 8000e49f .word 0x8000e49f +80002f00: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xa4a216eb +80002f04: 00062303 lw x6,0(x12) +80002f08: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xb8a7574d +80002f0c: 00062303 lw x6,0(x12) +80002f10: 00460613 addi x12,x12,4 + +80002f14 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b6: + sha512sum1r x3, x6, x6 # perform operation +80002f14: 526301b3 sha512sum1r x3,x6,x6 + # Check if x3 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x3, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b6, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b6_str) +80002f18: 00052683 lw x13,0(x10) +80002f1c: 00368863 beq x13,x3,80002f2c +80002f20: 6200276f jal x14,80005540 +80002f24: 80002f14 .word 0x80002f14 +80002f28: 8000e4de .word 0x8000e4de +80002f2c: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x507eda57 +80002f30: 00062383 lw x7,0(x12) +80002f34: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xc98ee29f +80002f38: 00062383 lw x7,0(x12) +80002f3c: 00460613 addi x12,x12,4 + +80002f40 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b7: + sha512sum1r x27, x7, x7 # perform operation +80002f40: 52738db3 sha512sum1r x27,x7,x7 + # Check if x27 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x27, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b7, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b7_str) +80002f44: 00052683 lw x13,0(x10) +80002f48: 01b68863 beq x13,x27,80002f58 +80002f4c: 5f40276f jal x14,80005540 +80002f50: 80002f40 .word 0x80002f40 +80002f54: 8000e51d .word 0x8000e51d +80002f58: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x7bbd6bf0 +80002f5c: 00062403 lw x8,0(x12) +80002f60: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x796e4dfa +80002f64: 00062403 lw x8,0(x12) +80002f68: 00460613 addi x12,x12,4 + +80002f6c : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b8: + sha512sum1r x26, x8, x8 # perform operation +80002f6c: 52840d33 sha512sum1r x26,x8,x8 + # Check if x26 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x26, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b8, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b8_str) +80002f70: 00052683 lw x13,0(x10) +80002f74: 01a68863 beq x13,x26,80002f84 +80002f78: 5c80276f jal x14,80005540 +80002f7c: 80002f6c .word 0x80002f6c +80002f80: 8000e55c .word 0x8000e55c +80002f84: 00450513 addi x10,x10,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x8846729c +80002f88: 00062483 lw x9,0(x12) +80002f8c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x8a92a051 +80002f90: 00062483 lw x9,0(x12) +80002f94: 00460613 addi x12,x12,4 + +80002f98 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b9: + sha512sum1r x0, x9, x9 # perform operation +80002f98: 52948033 sha512sum1r x0,x9,x9 + # Check if x0 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x0, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b9, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b9_str) +80002f9c: 00052683 lw x13,0(x10) +80002fa0: 00068863 beq x13,x0,80002fb0 +80002fa4: 59c0276f jal x14,80005540 +80002fa8: 80002f98 .word 0x80002f98 +80002fac: 8000e59b .word 0x8000e59b +80002fb0: 00450513 addi x10,x10,4 + + mv x17, x10 # switch signature pointer register to avoid conflict with test +80002fb4: 00050893 addi x17,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x1ce8a0ff +80002fb8: 00062503 lw x10,0(x12) +80002fbc: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x90ff7bbf +80002fc0: 00062503 lw x10,0(x12) +80002fc4: 00460613 addi x12,x12,4 + +80002fc8 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b10: + sha512sum1r x24, x10, x10 # perform operation +80002fc8: 52a50c33 sha512sum1r x24,x10,x10 + # Check if x24 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x24, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b10, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b10_str) +80002fcc: 0008a683 lw x13,0(x17) +80002fd0: 01868863 beq x13,x24,80002fe0 +80002fd4: 56c0276f jal x14,80005540 +80002fd8: 80002fc8 .word 0x80002fc8 +80002fdc: 8000e5da .word 0x8000e5da +80002fe0: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x71151341 +80002fe4: 00062583 lw x11,0(x12) +80002fe8: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xdf6bc611 +80002fec: 00062583 lw x11,0(x12) +80002ff0: 00460613 addi x12,x12,4 + +80002ff4 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b11: + sha512sum1r x18, x11, x11 # perform operation +80002ff4: 52b58933 sha512sum1r x18,x11,x11 + # Check if x18 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x18, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b11, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b11_str) +80002ff8: 0008a683 lw x13,0(x17) +80002ffc: 01268863 beq x13,x18,8000300c +80003000: 5400276f jal x14,80005540 +80003004: 80002ff4 .word 0x80002ff4 +80003008: 8000e61a .word 0x8000e61a +8000300c: 00488893 addi x17,x17,4 + + mv x21, x12 # switch data pointer register to avoid conflict with test +80003010: 00060a93 addi x21,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x5f486ba6 +80003014: 000aa603 lw x12,0(x21) +80003018: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xcc566c7a +8000301c: 000aa603 lw x12,0(x21) +80003020: 004a8a93 addi x21,x21,4 + +80003024 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b12: + sha512sum1r x19, x12, x12 # perform operation +80003024: 52c609b3 sha512sum1r x19,x12,x12 + # Check if x19 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x19, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b12, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b12_str) +80003028: 0008a683 lw x13,0(x17) +8000302c: 01368863 beq x13,x19,8000303c +80003030: 5100276f jal x14,80005540 +80003034: 80003024 .word 0x80003024 +80003038: 8000e65a .word 0x8000e65a +8000303c: 00488893 addi x17,x17,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003040: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003044: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x3e3ca462 +80003048: 000aa683 lw x13,0(x21) +8000304c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x70e0184f +80003050: 000aa683 lw x13,0(x21) +80003054: 004a8a93 addi x21,x21,4 + +80003058 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b13: + sha512sum1r x10, x13, x13 # perform operation +80003058: 52d68533 sha512sum1r x10,x13,x13 + # Check if x10 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x10, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b13, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b13_str) +8000305c: 0008a383 lw x7,0(x17) +80003060: 00a38863 beq x7,x10,80003070 +80003064: 4b40246f jal x8,80005518 +80003068: 80003058 .word 0x80003058 +8000306c: 8000e69a .word 0x8000e69a +80003070: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xee2af8fc +80003074: 000aa703 lw x14,0(x21) +80003078: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x5a977a62 +8000307c: 000aa703 lw x14,0(x21) +80003080: 004a8a93 addi x21,x21,4 + +80003084 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b14: + sha512sum1r x31, x14, x14 # perform operation +80003084: 52e70fb3 sha512sum1r x31,x14,x14 + # Check if x31 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x31, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b14, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b14_str) +80003088: 0008a383 lw x7,0(x17) +8000308c: 01f38863 beq x7,x31,8000309c +80003090: 4880246f jal x8,80005518 +80003094: 80003084 .word 0x80003084 +80003098: 8000e6da .word 0x8000e6da +8000309c: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xda6798bb +800030a0: 000aa783 lw x15,0(x21) +800030a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x6d6fb11a +800030a8: 000aa783 lw x15,0(x21) +800030ac: 004a8a93 addi x21,x21,4 + +800030b0 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b15: + sha512sum1r x26, x15, x15 # perform operation +800030b0: 52f78d33 sha512sum1r x26,x15,x15 + # Check if x26 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x26, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b15, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b15_str) +800030b4: 0008a383 lw x7,0(x17) +800030b8: 01a38863 beq x7,x26,800030c8 +800030bc: 45c0246f jal x8,80005518 +800030c0: 800030b0 .word 0x800030b0 +800030c4: 8000e71a .word 0x8000e71a +800030c8: 00488893 addi x17,x17,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x21350b16 +800030cc: 000aa803 lw x16,0(x21) +800030d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xcde5f99b +800030d4: 000aa803 lw x16,0(x21) +800030d8: 004a8a93 addi x21,x21,4 + +800030dc : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b16: + sha512sum1r x27, x16, x16 # perform operation +800030dc: 53080db3 sha512sum1r x27,x16,x16 + # Check if x27 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x27, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b16, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b16_str) +800030e0: 0008a383 lw x7,0(x17) +800030e4: 01b38863 beq x7,x27,800030f4 +800030e8: 4300246f jal x8,80005518 +800030ec: 800030dc .word 0x800030dc +800030f0: 8000e75a .word 0x8000e75a +800030f4: 00488893 addi x17,x17,4 + + mv x22, x17 # switch signature pointer register to avoid conflict with test +800030f8: 00088b13 addi x22,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xaf3e035a +800030fc: 000aa883 lw x17,0(x21) +80003100: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x665487dc +80003104: 000aa883 lw x17,0(x21) +80003108: 004a8a93 addi x21,x21,4 + +8000310c : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b17: + sha512sum1r x12, x17, x17 # perform operation +8000310c: 53188633 sha512sum1r x12,x17,x17 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b17, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b17_str) +80003110: 000b2383 lw x7,0(x22) +80003114: 00c38863 beq x7,x12,80003124 +80003118: 4000246f jal x8,80005518 +8000311c: 8000310c .word 0x8000310c +80003120: 8000e79a .word 0x8000e79a +80003124: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xdfde95ed +80003128: 000aa903 lw x18,0(x21) +8000312c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xff0618d1 +80003130: 000aa903 lw x18,0(x21) +80003134: 004a8a93 addi x21,x21,4 + +80003138 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b18: + sha512sum1r x26, x18, x18 # perform operation +80003138: 53290d33 sha512sum1r x26,x18,x18 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b18, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b18_str) +8000313c: 000b2383 lw x7,0(x22) +80003140: 01a38863 beq x7,x26,80003150 +80003144: 3d40246f jal x8,80005518 +80003148: 80003138 .word 0x80003138 +8000314c: 8000e7da .word 0x8000e7da +80003150: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x383fc665 +80003154: 000aa983 lw x19,0(x21) +80003158: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xd4a1fe08 +8000315c: 000aa983 lw x19,0(x21) +80003160: 004a8a93 addi x21,x21,4 + +80003164 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b19: + sha512sum1r x10, x19, x19 # perform operation +80003164: 53398533 sha512sum1r x10,x19,x19 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b19, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b19_str) +80003168: 000b2383 lw x7,0(x22) +8000316c: 00a38863 beq x7,x10,8000317c +80003170: 3a80246f jal x8,80005518 +80003174: 80003164 .word 0x80003164 +80003178: 8000e81a .word 0x8000e81a +8000317c: 004b0b13 addi x22,x22,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x6dcbab81 +80003180: 000aaa03 lw x20,0(x21) +80003184: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x41702eae +80003188: 000aaa03 lw x20,0(x21) +8000318c: 004a8a93 addi x21,x21,4 + +80003190 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b20: + sha512sum1r x1, x20, x20 # perform operation +80003190: 534a00b3 sha512sum1r x1,x20,x20 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b20, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b20_str) +80003194: 000b2383 lw x7,0(x22) +80003198: 00138863 beq x7,x1,800031a8 +8000319c: 37c0246f jal x8,80005518 +800031a0: 80003190 .word 0x80003190 +800031a4: 8000e85a .word 0x8000e85a +800031a8: 004b0b13 addi x22,x22,4 + + mv x27, x21 # switch data pointer register to avoid conflict with test +800031ac: 000a8d93 addi x27,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xd6cb7899 +800031b0: 000daa83 lw x21,0(x27) +800031b4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xb16b3b17 +800031b8: 000daa83 lw x21,0(x27) +800031bc: 004d8d93 addi x27,x27,4 + +800031c0 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b21: + sha512sum1r x14, x21, x21 # perform operation +800031c0: 535a8733 sha512sum1r x14,x21,x21 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b21, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b21_str) +800031c4: 000b2383 lw x7,0(x22) +800031c8: 00e38863 beq x7,x14,800031d8 +800031cc: 34c0246f jal x8,80005518 +800031d0: 800031c0 .word 0x800031c0 +800031d4: 8000e89a .word 0x8000e89a +800031d8: 004b0b13 addi x22,x22,4 + + mv x18, x22 # switch signature pointer register to avoid conflict with test +800031dc: 000b0913 addi x18,x22,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x94b6411f +800031e0: 000dab03 lw x22,0(x27) +800031e4: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x175a2d61 +800031e8: 000dab03 lw x22,0(x27) +800031ec: 004d8d93 addi x27,x27,4 + +800031f0 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b22: + sha512sum1r x19, x22, x22 # perform operation +800031f0: 536b09b3 sha512sum1r x19,x22,x22 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b22, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b22_str) +800031f4: 00092383 lw x7,0(x18) +800031f8: 01338863 beq x7,x19,80003208 +800031fc: 31c0246f jal x8,80005518 +80003200: 800031f0 .word 0x800031f0 +80003204: 8000e8da .word 0x8000e8da +80003208: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x75033950 +8000320c: 000dab83 lw x23,0(x27) +80003210: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0xf31194d4 +80003214: 000dab83 lw x23,0(x27) +80003218: 004d8d93 addi x27,x27,4 + +8000321c : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b23: + sha512sum1r x10, x23, x23 # perform operation +8000321c: 537b8533 sha512sum1r x10,x23,x23 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b23, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b23_str) +80003220: 00092383 lw x7,0(x18) +80003224: 00a38863 beq x7,x10,80003234 +80003228: 2f00246f jal x8,80005518 +8000322c: 8000321c .word 0x8000321c +80003230: 8000e91a .word 0x8000e91a +80003234: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x8a63ca01 +80003238: 000dac03 lw x24,0(x27) +8000323c: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x8e8f4164 +80003240: 000dac03 lw x24,0(x27) +80003244: 004d8d93 addi x27,x27,4 + +80003248 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b24: + sha512sum1r x30, x24, x24 # perform operation +80003248: 538c0f33 sha512sum1r x30,x24,x24 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b24, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b24_str) +8000324c: 00092383 lw x7,0(x18) +80003250: 01e38863 beq x7,x30,80003260 +80003254: 2c40246f jal x8,80005518 +80003258: 80003248 .word 0x80003248 +8000325c: 8000e95a .word 0x8000e95a +80003260: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xb13024a5 +80003264: 000dac83 lw x25,0(x27) +80003268: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x1065d4af +8000326c: 000dac83 lw x25,0(x27) +80003270: 004d8d93 addi x27,x27,4 + +80003274 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b25: + sha512sum1r x13, x25, x25 # perform operation +80003274: 539c86b3 sha512sum1r x13,x25,x25 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b25, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b25_str) +80003278: 00092383 lw x7,0(x18) +8000327c: 00d38863 beq x7,x13,8000328c +80003280: 2980246f jal x8,80005518 +80003284: 80003274 .word 0x80003274 +80003288: 8000e99a .word 0x8000e99a +8000328c: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x1c0bae79 +80003290: 000dad03 lw x26,0(x27) +80003294: 004d8d93 addi x27,x27,4 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x9799cf6e +80003298: 000dad03 lw x26,0(x27) +8000329c: 004d8d93 addi x27,x27,4 + +800032a0 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b26: + sha512sum1r x0, x26, x26 # perform operation +800032a0: 53ad0033 sha512sum1r x0,x26,x26 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b26, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b26_str) +800032a4: 00092383 lw x7,0(x18) +800032a8: 00038863 beq x7,x0,800032b8 +800032ac: 26c0246f jal x8,80005518 +800032b0: 800032a0 .word 0x800032a0 +800032b4: 8000e9da .word 0x8000e9da +800032b8: 00490913 addi x18,x18,4 + + mv x28, x27 # switch data pointer register to avoid conflict with test +800032bc: 000d8e13 addi x28,x27,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x1230a369 +800032c0: 000e2d83 lw x27,0(x28) +800032c4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x6ec48f23 +800032c8: 000e2d83 lw x27,0(x28) +800032cc: 004e0e13 addi x28,x28,4 + +800032d0 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b27: + sha512sum1r x23, x27, x27 # perform operation +800032d0: 53bd8bb3 sha512sum1r x23,x27,x27 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b27, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b27_str) +800032d4: 00092383 lw x7,0(x18) +800032d8: 01738863 beq x7,x23,800032e8 +800032dc: 23c0246f jal x8,80005518 +800032e0: 800032d0 .word 0x800032d0 +800032e4: 8000ea1a .word 0x8000ea1a +800032e8: 00490913 addi x18,x18,4 + + mv x20, x28 # switch data pointer register to avoid conflict with test +800032ec: 000e0a13 addi x20,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x810b3e54 +800032f0: 000a2e03 lw x28,0(x20) +800032f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x6d54ac44 +800032f8: 000a2e03 lw x28,0(x20) +800032fc: 004a0a13 addi x20,x20,4 + +80003300 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b28: + sha512sum1r x16, x28, x28 # perform operation +80003300: 53ce0833 sha512sum1r x16,x28,x28 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b28, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b28_str) +80003304: 00092383 lw x7,0(x18) +80003308: 01038863 beq x7,x16,80003318 +8000330c: 20c0246f jal x8,80005518 +80003310: 80003300 .word 0x80003300 +80003314: 8000ea5a .word 0x8000ea5a +80003318: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x88600ba4 +8000331c: 000a2e83 lw x29,0(x20) +80003320: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x4462e3eb +80003324: 000a2e83 lw x29,0(x20) +80003328: 004a0a13 addi x20,x20,4 + +8000332c : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b29: + sha512sum1r x9, x29, x29 # perform operation +8000332c: 53de84b3 sha512sum1r x9,x29,x29 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b29, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b29_str) +80003330: 00092383 lw x7,0(x18) +80003334: 00938863 beq x7,x9,80003344 +80003338: 1e00246f jal x8,80005518 +8000333c: 8000332c .word 0x8000332c +80003340: 8000ea9a .word 0x8000ea9a +80003344: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x4b384fe9 +80003348: 000a2f03 lw x30,0(x20) +8000334c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0xafb6298d +80003350: 000a2f03 lw x30,0(x20) +80003354: 004a0a13 addi x20,x20,4 + +80003358 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b30: + sha512sum1r x22, x30, x30 # perform operation +80003358: 53ef0b33 sha512sum1r x22,x30,x30 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b30, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b30_str) +8000335c: 00092383 lw x7,0(x18) +80003360: 01638863 beq x7,x22,80003370 +80003364: 1b40246f jal x8,80005518 +80003368: 80003358 .word 0x80003358 +8000336c: 8000eada .word 0x8000eada +80003370: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xb95369e8 +80003374: 000a2f83 lw x31,0(x20) +80003378: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x779a9239 +8000337c: 000a2f83 lw x31,0(x20) +80003380: 004a0a13 addi x20,x20,4 + +80003384 : +Zknh_sha512sum1r_cg_cmp_rs1_rs2_b31: + sha512sum1r x21, x31, x31 # perform operation +80003384: 53ff8ab3 sha512sum1r x21,x31,x31 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b31, Zknh_sha512sum1r_cg_cmp_rs1_rs2_b31_str) +80003388: 00092383 lw x7,0(x18) +8000338c: 01538863 beq x7,x21,8000339c +80003390: 1880246f jal x8,80005518 +80003394: 80003384 .word 0x80003384 +80003398: 8000eb1a .word 0x8000eb1a +8000339c: 00490913 addi x18,x18,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x0217f30f +800033a0: 000a2003 lw x0,0(x20) +800033a4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x2c3fc0ec +800033a8: 000a2103 lw x2,0(x20) +800033ac: 004a0a13 addi x20,x20,4 + +800033b0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b0: + sha512sum1r x0, x0, x2 # perform operation +800033b0: 52200033 sha512sum1r x0,x0,x2 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zknh_sha512sum1r_cg_cmp_rd_rs1_b0, Zknh_sha512sum1r_cg_cmp_rd_rs1_b0_str) +800033b4: 00092383 lw x7,0(x18) +800033b8: 00038863 beq x7,x0,800033c8 +800033bc: 15c0246f jal x8,80005518 +800033c0: 800033b0 .word 0x800033b0 +800033c4: 8000eb5a .word 0x8000eb5a +800033c8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x12f0eaf2 +800033cc: 000a2083 lw x1,0(x20) +800033d0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0xbd742db8 +800033d4: 000a2a83 lw x21,0(x20) +800033d8: 004a0a13 addi x20,x20,4 + +800033dc : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b1: + sha512sum1r x1, x1, x21 # perform operation +800033dc: 535080b3 sha512sum1r x1,x1,x21 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zknh_sha512sum1r_cg_cmp_rd_rs1_b1, Zknh_sha512sum1r_cg_cmp_rd_rs1_b1_str) +800033e0: 00092383 lw x7,0(x18) +800033e4: 00138863 beq x7,x1,800033f4 +800033e8: 1300246f jal x8,80005518 +800033ec: 800033dc .word 0x800033dc +800033f0: 8000eb98 .word 0x8000eb98 +800033f4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x76b3e619 +800033f8: 000a2103 lw x2,0(x20) +800033fc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x3f5502c4 +80003400: 000a2e83 lw x29,0(x20) +80003404: 004a0a13 addi x20,x20,4 + +80003408 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b2: + sha512sum1r x2, x2, x29 # perform operation +80003408: 53d10133 sha512sum1r x2,x2,x29 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zknh_sha512sum1r_cg_cmp_rd_rs1_b2, Zknh_sha512sum1r_cg_cmp_rd_rs1_b2_str) +8000340c: 00092383 lw x7,0(x18) +80003410: 00238863 beq x7,x2,80003420 +80003414: 1040246f jal x8,80005518 +80003418: 80003408 .word 0x80003408 +8000341c: 8000ebd6 .word 0x8000ebd6 +80003420: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x946f33be +80003424: 000a2183 lw x3,0(x20) +80003428: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x16e3a8c4 +8000342c: 000a2583 lw x11,0(x20) +80003430: 004a0a13 addi x20,x20,4 + +80003434 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b3: + sha512sum1r x3, x3, x11 # perform operation +80003434: 52b181b3 sha512sum1r x3,x3,x11 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zknh_sha512sum1r_cg_cmp_rd_rs1_b3, Zknh_sha512sum1r_cg_cmp_rd_rs1_b3_str) +80003438: 00092383 lw x7,0(x18) +8000343c: 00338863 beq x7,x3,8000344c +80003440: 0d80246f jal x8,80005518 +80003444: 80003434 .word 0x80003434 +80003448: 8000ec14 .word 0x8000ec14 +8000344c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xb2464326 +80003450: 000a2203 lw x4,0(x20) +80003454: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0xaaa314f9 +80003458: 000a2c83 lw x25,0(x20) +8000345c: 004a0a13 addi x20,x20,4 + +80003460 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b4: + sha512sum1r x4, x4, x25 # perform operation +80003460: 53920233 sha512sum1r x4,x4,x25 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zknh_sha512sum1r_cg_cmp_rd_rs1_b4, Zknh_sha512sum1r_cg_cmp_rd_rs1_b4_str) +80003464: 00092383 lw x7,0(x18) +80003468: 00438863 beq x7,x4,80003478 +8000346c: 0ac0246f jal x8,80005518 +80003470: 80003460 .word 0x80003460 +80003474: 8000ec52 .word 0x8000ec52 +80003478: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xdf5515f2 +8000347c: 000a2283 lw x5,0(x20) +80003480: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x87245c4f +80003484: 000a2783 lw x15,0(x20) +80003488: 004a0a13 addi x20,x20,4 + +8000348c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b5: + sha512sum1r x5, x5, x15 # perform operation +8000348c: 52f282b3 sha512sum1r x5,x5,x15 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zknh_sha512sum1r_cg_cmp_rd_rs1_b5, Zknh_sha512sum1r_cg_cmp_rd_rs1_b5_str) +80003490: 00092383 lw x7,0(x18) +80003494: 00538863 beq x7,x5,800034a4 +80003498: 0800246f jal x8,80005518 +8000349c: 8000348c .word 0x8000348c +800034a0: 8000ec90 .word 0x8000ec90 +800034a4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xb9549f95 +800034a8: 000a2303 lw x6,0(x20) +800034ac: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x5ff8e360 +800034b0: 000a2083 lw x1,0(x20) +800034b4: 004a0a13 addi x20,x20,4 + +800034b8 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b6: + sha512sum1r x6, x6, x1 # perform operation +800034b8: 52130333 sha512sum1r x6,x6,x1 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zknh_sha512sum1r_cg_cmp_rd_rs1_b6, Zknh_sha512sum1r_cg_cmp_rd_rs1_b6_str) +800034bc: 00092383 lw x7,0(x18) +800034c0: 00638863 beq x7,x6,800034d0 +800034c4: 0540246f jal x8,80005518 +800034c8: 800034b8 .word 0x800034b8 +800034cc: 8000ecce .word 0x8000ecce +800034d0: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800034d4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800034d8: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x200dec77 +800034dc: 000a2383 lw x7,0(x20) +800034e0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x94d6dc9c +800034e4: 000a2c83 lw x25,0(x20) +800034e8: 004a0a13 addi x20,x20,4 + +800034ec : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b7: + sha512sum1r x7, x7, x25 # perform operation +800034ec: 539383b3 sha512sum1r x7,x7,x25 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zknh_sha512sum1r_cg_cmp_rd_rs1_b7, Zknh_sha512sum1r_cg_cmp_rd_rs1_b7_str) +800034f0: 00092203 lw x4,0(x18) +800034f4: 00720863 beq x4,x7,80003504 +800034f8: 008022ef jal x5,80005500 +800034fc: 800034ec .word 0x800034ec +80003500: 8000ed0c .word 0x8000ed0c +80003504: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x6f7678bf +80003508: 000a2403 lw x8,0(x20) +8000350c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xa3286417 +80003510: 000a2b83 lw x23,0(x20) +80003514: 004a0a13 addi x20,x20,4 + +80003518 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b8: + sha512sum1r x8, x8, x23 # perform operation +80003518: 53740433 sha512sum1r x8,x8,x23 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknh_sha512sum1r_cg_cmp_rd_rs1_b8, Zknh_sha512sum1r_cg_cmp_rd_rs1_b8_str) +8000351c: 00092203 lw x4,0(x18) +80003520: 00820863 beq x4,x8,80003530 +80003524: 7dd012ef jal x5,80005500 +80003528: 80003518 .word 0x80003518 +8000352c: 8000ed4a .word 0x8000ed4a +80003530: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x0c9b79f5 +80003534: 000a2483 lw x9,0(x20) +80003538: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x7ab72608 +8000353c: 000a2d03 lw x26,0(x20) +80003540: 004a0a13 addi x20,x20,4 + +80003544 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b9: + sha512sum1r x9, x9, x26 # perform operation +80003544: 53a484b3 sha512sum1r x9,x9,x26 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zknh_sha512sum1r_cg_cmp_rd_rs1_b9, Zknh_sha512sum1r_cg_cmp_rd_rs1_b9_str) +80003548: 00092203 lw x4,0(x18) +8000354c: 00920863 beq x4,x9,8000355c +80003550: 7b1012ef jal x5,80005500 +80003554: 80003544 .word 0x80003544 +80003558: 8000ed88 .word 0x8000ed88 +8000355c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x37e06719 +80003560: 000a2503 lw x10,0(x20) +80003564: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x9e824582 +80003568: 000a2c83 lw x25,0(x20) +8000356c: 004a0a13 addi x20,x20,4 + +80003570 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b10: + sha512sum1r x10, x10, x25 # perform operation +80003570: 53950533 sha512sum1r x10,x10,x25 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zknh_sha512sum1r_cg_cmp_rd_rs1_b10, Zknh_sha512sum1r_cg_cmp_rd_rs1_b10_str) +80003574: 00092203 lw x4,0(x18) +80003578: 00a20863 beq x4,x10,80003588 +8000357c: 785012ef jal x5,80005500 +80003580: 80003570 .word 0x80003570 +80003584: 8000edc6 .word 0x8000edc6 +80003588: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x6bf4ba9e +8000358c: 000a2583 lw x11,0(x20) +80003590: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x4fdc7e2a +80003594: 000a2483 lw x9,0(x20) +80003598: 004a0a13 addi x20,x20,4 + +8000359c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b11: + sha512sum1r x11, x11, x9 # perform operation +8000359c: 529585b3 sha512sum1r x11,x11,x9 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zknh_sha512sum1r_cg_cmp_rd_rs1_b11, Zknh_sha512sum1r_cg_cmp_rd_rs1_b11_str) +800035a0: 00092203 lw x4,0(x18) +800035a4: 00b20863 beq x4,x11,800035b4 +800035a8: 759012ef jal x5,80005500 +800035ac: 8000359c .word 0x8000359c +800035b0: 8000ee05 .word 0x8000ee05 +800035b4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xba9e1067 +800035b8: 000a2603 lw x12,0(x20) +800035bc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x69ad1c2c +800035c0: 000a2003 lw x0,0(x20) +800035c4: 004a0a13 addi x20,x20,4 + +800035c8 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b12: + sha512sum1r x12, x12, x0 # perform operation +800035c8: 52060633 sha512sum1r x12,x12,x0 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zknh_sha512sum1r_cg_cmp_rd_rs1_b12, Zknh_sha512sum1r_cg_cmp_rd_rs1_b12_str) +800035cc: 00092203 lw x4,0(x18) +800035d0: 00c20863 beq x4,x12,800035e0 +800035d4: 72d012ef jal x5,80005500 +800035d8: 800035c8 .word 0x800035c8 +800035dc: 8000ee44 .word 0x8000ee44 +800035e0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x961cd843 +800035e4: 000a2683 lw x13,0(x20) +800035e8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xedf83a13 +800035ec: 000a2403 lw x8,0(x20) +800035f0: 004a0a13 addi x20,x20,4 + +800035f4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b13: + sha512sum1r x13, x13, x8 # perform operation +800035f4: 528686b3 sha512sum1r x13,x13,x8 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zknh_sha512sum1r_cg_cmp_rd_rs1_b13, Zknh_sha512sum1r_cg_cmp_rd_rs1_b13_str) +800035f8: 00092203 lw x4,0(x18) +800035fc: 00d20863 beq x4,x13,8000360c +80003600: 701012ef jal x5,80005500 +80003604: 800035f4 .word 0x800035f4 +80003608: 8000ee83 .word 0x8000ee83 +8000360c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x621bd6d6 +80003610: 000a2703 lw x14,0(x20) +80003614: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x2f08bb9d +80003618: 000a2c83 lw x25,0(x20) +8000361c: 004a0a13 addi x20,x20,4 + +80003620 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b14: + sha512sum1r x14, x14, x25 # perform operation +80003620: 53970733 sha512sum1r x14,x14,x25 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zknh_sha512sum1r_cg_cmp_rd_rs1_b14, Zknh_sha512sum1r_cg_cmp_rd_rs1_b14_str) +80003624: 00092203 lw x4,0(x18) +80003628: 00e20863 beq x4,x14,80003638 +8000362c: 6d5012ef jal x5,80005500 +80003630: 80003620 .word 0x80003620 +80003634: 8000eec2 .word 0x8000eec2 +80003638: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x8f26e059 +8000363c: 000a2783 lw x15,0(x20) +80003640: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x5a50e1e5 +80003644: 000a2583 lw x11,0(x20) +80003648: 004a0a13 addi x20,x20,4 + +8000364c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b15: + sha512sum1r x15, x15, x11 # perform operation +8000364c: 52b787b3 sha512sum1r x15,x15,x11 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zknh_sha512sum1r_cg_cmp_rd_rs1_b15, Zknh_sha512sum1r_cg_cmp_rd_rs1_b15_str) +80003650: 00092203 lw x4,0(x18) +80003654: 00f20863 beq x4,x15,80003664 +80003658: 6a9012ef jal x5,80005500 +8000365c: 8000364c .word 0x8000364c +80003660: 8000ef01 .word 0x8000ef01 +80003664: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x39866fa6 +80003668: 000a2803 lw x16,0(x20) +8000366c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x295789a8 +80003670: 000a2483 lw x9,0(x20) +80003674: 004a0a13 addi x20,x20,4 + +80003678 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b16: + sha512sum1r x16, x16, x9 # perform operation +80003678: 52980833 sha512sum1r x16,x16,x9 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zknh_sha512sum1r_cg_cmp_rd_rs1_b16, Zknh_sha512sum1r_cg_cmp_rd_rs1_b16_str) +8000367c: 00092203 lw x4,0(x18) +80003680: 01020863 beq x4,x16,80003690 +80003684: 67d012ef jal x5,80005500 +80003688: 80003678 .word 0x80003678 +8000368c: 8000ef40 .word 0x8000ef40 +80003690: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x51531fe6 +80003694: 000a2883 lw x17,0(x20) +80003698: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0xd9a07786 +8000369c: 000a2a83 lw x21,0(x20) +800036a0: 004a0a13 addi x20,x20,4 + +800036a4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b17: + sha512sum1r x17, x17, x21 # perform operation +800036a4: 535888b3 sha512sum1r x17,x17,x21 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zknh_sha512sum1r_cg_cmp_rd_rs1_b17, Zknh_sha512sum1r_cg_cmp_rd_rs1_b17_str) +800036a8: 00092203 lw x4,0(x18) +800036ac: 01120863 beq x4,x17,800036bc +800036b0: 651012ef jal x5,80005500 +800036b4: 800036a4 .word 0x800036a4 +800036b8: 8000ef7f .word 0x8000ef7f +800036bc: 00490913 addi x18,x18,4 + + mv x28, x18 # switch signature pointer register to avoid conflict with test +800036c0: 00090e13 addi x28,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x6b2bbb27 +800036c4: 000a2903 lw x18,0(x20) +800036c8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x3726cd7e +800036cc: 000a2503 lw x10,0(x20) +800036d0: 004a0a13 addi x20,x20,4 + +800036d4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b18: + sha512sum1r x18, x18, x10 # perform operation +800036d4: 52a90933 sha512sum1r x18,x18,x10 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zknh_sha512sum1r_cg_cmp_rd_rs1_b18, Zknh_sha512sum1r_cg_cmp_rd_rs1_b18_str) +800036d8: 000e2203 lw x4,0(x28) +800036dc: 01220863 beq x4,x18,800036ec +800036e0: 621012ef jal x5,80005500 +800036e4: 800036d4 .word 0x800036d4 +800036e8: 8000efbe .word 0x8000efbe +800036ec: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xe15d5b6c +800036f0: 000a2983 lw x19,0(x20) +800036f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xf18a3537 +800036f8: 000a2903 lw x18,0(x20) +800036fc: 004a0a13 addi x20,x20,4 + +80003700 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b19: + sha512sum1r x19, x19, x18 # perform operation +80003700: 532989b3 sha512sum1r x19,x19,x18 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zknh_sha512sum1r_cg_cmp_rd_rs1_b19, Zknh_sha512sum1r_cg_cmp_rd_rs1_b19_str) +80003704: 000e2203 lw x4,0(x28) +80003708: 01320863 beq x4,x19,80003718 +8000370c: 5f5012ef jal x5,80005500 +80003710: 80003700 .word 0x80003700 +80003714: 8000effd .word 0x8000effd +80003718: 004e0e13 addi x28,x28,4 + + mv x1, x20 # switch data pointer register to avoid conflict with test +8000371c: 000a0093 addi x1,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ea0fb5f +80003720: 0000aa03 lw x20,0(x1) +80003724: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x108107aa +80003728: 0000ad83 lw x27,0(x1) +8000372c: 00408093 addi x1,x1,4 + +80003730 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b20: + sha512sum1r x20, x20, x27 # perform operation +80003730: 53ba0a33 sha512sum1r x20,x20,x27 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknh_sha512sum1r_cg_cmp_rd_rs1_b20, Zknh_sha512sum1r_cg_cmp_rd_rs1_b20_str) +80003734: 000e2203 lw x4,0(x28) +80003738: 01420863 beq x4,x20,80003748 +8000373c: 5c5012ef jal x5,80005500 +80003740: 80003730 .word 0x80003730 +80003744: 8000f03c .word 0x8000f03c +80003748: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x6b8dd4c8 +8000374c: 0000aa83 lw x21,0(x1) +80003750: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x17599964 +80003754: 0000af83 lw x31,0(x1) +80003758: 00408093 addi x1,x1,4 + +8000375c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b21: + sha512sum1r x21, x21, x31 # perform operation +8000375c: 53fa8ab3 sha512sum1r x21,x21,x31 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zknh_sha512sum1r_cg_cmp_rd_rs1_b21, Zknh_sha512sum1r_cg_cmp_rd_rs1_b21_str) +80003760: 000e2203 lw x4,0(x28) +80003764: 01520863 beq x4,x21,80003774 +80003768: 599012ef jal x5,80005500 +8000376c: 8000375c .word 0x8000375c +80003770: 8000f07b .word 0x8000f07b +80003774: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xe5995ece +80003778: 0000ab03 lw x22,0(x1) +8000377c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x33ec65d6 +80003780: 0000a183 lw x3,0(x1) +80003784: 00408093 addi x1,x1,4 + +80003788 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b22: + sha512sum1r x22, x22, x3 # perform operation +80003788: 523b0b33 sha512sum1r x22,x22,x3 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zknh_sha512sum1r_cg_cmp_rd_rs1_b22, Zknh_sha512sum1r_cg_cmp_rd_rs1_b22_str) +8000378c: 000e2203 lw x4,0(x28) +80003790: 01620863 beq x4,x22,800037a0 +80003794: 56d012ef jal x5,80005500 +80003798: 80003788 .word 0x80003788 +8000379c: 8000f0ba .word 0x8000f0ba +800037a0: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xba40b001 +800037a4: 0000ab83 lw x23,0(x1) +800037a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x19fb5aee +800037ac: 0000a703 lw x14,0(x1) +800037b0: 00408093 addi x1,x1,4 + +800037b4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b23: + sha512sum1r x23, x23, x14 # perform operation +800037b4: 52eb8bb3 sha512sum1r x23,x23,x14 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zknh_sha512sum1r_cg_cmp_rd_rs1_b23, Zknh_sha512sum1r_cg_cmp_rd_rs1_b23_str) +800037b8: 000e2203 lw x4,0(x28) +800037bc: 01720863 beq x4,x23,800037cc +800037c0: 541012ef jal x5,80005500 +800037c4: 800037b4 .word 0x800037b4 +800037c8: 8000f0f9 .word 0x8000f0f9 +800037cc: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x5cfac20f +800037d0: 0000ac03 lw x24,0(x1) +800037d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x00fe3ce6 +800037d8: 0000aa83 lw x21,0(x1) +800037dc: 00408093 addi x1,x1,4 + +800037e0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b24: + sha512sum1r x24, x24, x21 # perform operation +800037e0: 535c0c33 sha512sum1r x24,x24,x21 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zknh_sha512sum1r_cg_cmp_rd_rs1_b24, Zknh_sha512sum1r_cg_cmp_rd_rs1_b24_str) +800037e4: 000e2203 lw x4,0(x28) +800037e8: 01820863 beq x4,x24,800037f8 +800037ec: 515012ef jal x5,80005500 +800037f0: 800037e0 .word 0x800037e0 +800037f4: 8000f138 .word 0x8000f138 +800037f8: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x95e70d54 +800037fc: 0000ac83 lw x25,0(x1) +80003800: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xf02226d2 +80003804: 0000ae83 lw x29,0(x1) +80003808: 00408093 addi x1,x1,4 + +8000380c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b25: + sha512sum1r x25, x25, x29 # perform operation +8000380c: 53dc8cb3 sha512sum1r x25,x25,x29 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zknh_sha512sum1r_cg_cmp_rd_rs1_b25, Zknh_sha512sum1r_cg_cmp_rd_rs1_b25_str) +80003810: 000e2203 lw x4,0(x28) +80003814: 01920863 beq x4,x25,80003824 +80003818: 4e9012ef jal x5,80005500 +8000381c: 8000380c .word 0x8000380c +80003820: 8000f177 .word 0x8000f177 +80003824: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xc6db4302 +80003828: 0000ad03 lw x26,0(x1) +8000382c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5f02ab7a +80003830: 0000a483 lw x9,0(x1) +80003834: 00408093 addi x1,x1,4 + +80003838 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b26: + sha512sum1r x26, x26, x9 # perform operation +80003838: 529d0d33 sha512sum1r x26,x26,x9 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zknh_sha512sum1r_cg_cmp_rd_rs1_b26, Zknh_sha512sum1r_cg_cmp_rd_rs1_b26_str) +8000383c: 000e2203 lw x4,0(x28) +80003840: 01a20863 beq x4,x26,80003850 +80003844: 4bd012ef jal x5,80005500 +80003848: 80003838 .word 0x80003838 +8000384c: 8000f1b6 .word 0x8000f1b6 +80003850: 004e0e13 addi x28,x28,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5df76e0a +80003854: 0000ad83 lw x27,0(x1) +80003858: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x58c41dea +8000385c: 0000a403 lw x8,0(x1) +80003860: 00408093 addi x1,x1,4 + +80003864 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b27: + sha512sum1r x27, x27, x8 # perform operation +80003864: 528d8db3 sha512sum1r x27,x27,x8 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zknh_sha512sum1r_cg_cmp_rd_rs1_b27, Zknh_sha512sum1r_cg_cmp_rd_rs1_b27_str) +80003868: 000e2203 lw x4,0(x28) +8000386c: 01b20863 beq x4,x27,8000387c +80003870: 491012ef jal x5,80005500 +80003874: 80003864 .word 0x80003864 +80003878: 8000f1f5 .word 0x8000f1f5 +8000387c: 004e0e13 addi x28,x28,4 + + mv x2, x28 # switch signature pointer register to avoid conflict with test +80003880: 000e0113 addi x2,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xb20f9271 +80003884: 0000ae03 lw x28,0(x1) +80003888: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xc4386c1d +8000388c: 0000aa03 lw x20,0(x1) +80003890: 00408093 addi x1,x1,4 + +80003894 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b28: + sha512sum1r x28, x28, x20 # perform operation +80003894: 534e0e33 sha512sum1r x28,x28,x20 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha512sum1r_cg_cmp_rd_rs1_b28, Zknh_sha512sum1r_cg_cmp_rd_rs1_b28_str) +80003898: 00012203 lw x4,0(x2) +8000389c: 01c20863 beq x4,x28,800038ac +800038a0: 461012ef jal x5,80005500 +800038a4: 80003894 .word 0x80003894 +800038a8: 8000f234 .word 0x8000f234 +800038ac: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x46f4086c +800038b0: 0000ae83 lw x29,0(x1) +800038b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x32b57c87 +800038b8: 0000a003 lw x0,0(x1) +800038bc: 00408093 addi x1,x1,4 + +800038c0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b29: + sha512sum1r x29, x29, x0 # perform operation +800038c0: 520e8eb3 sha512sum1r x29,x29,x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknh_sha512sum1r_cg_cmp_rd_rs1_b29, Zknh_sha512sum1r_cg_cmp_rd_rs1_b29_str) +800038c4: 00012203 lw x4,0(x2) +800038c8: 01d20863 beq x4,x29,800038d8 +800038cc: 435012ef jal x5,80005500 +800038d0: 800038c0 .word 0x800038c0 +800038d4: 8000f273 .word 0x8000f273 +800038d8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xb210c6e0 +800038dc: 0000af03 lw x30,0(x1) +800038e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x479c9b88 +800038e4: 0000a403 lw x8,0(x1) +800038e8: 00408093 addi x1,x1,4 + +800038ec : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b30: + sha512sum1r x30, x30, x8 # perform operation +800038ec: 528f0f33 sha512sum1r x30,x30,x8 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha512sum1r_cg_cmp_rd_rs1_b30, Zknh_sha512sum1r_cg_cmp_rd_rs1_b30_str) +800038f0: 00012203 lw x4,0(x2) +800038f4: 01e20863 beq x4,x30,80003904 +800038f8: 409012ef jal x5,80005500 +800038fc: 800038ec .word 0x800038ec +80003900: 8000f2b2 .word 0x8000f2b2 +80003904: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x6dcd74af +80003908: 0000af83 lw x31,0(x1) +8000390c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x75527cde +80003910: 0000a783 lw x15,0(x1) +80003914: 00408093 addi x1,x1,4 + +80003918 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_b31: + sha512sum1r x31, x31, x15 # perform operation +80003918: 52ff8fb3 sha512sum1r x31,x31,x15 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha512sum1r_cg_cmp_rd_rs1_b31, Zknh_sha512sum1r_cg_cmp_rd_rs1_b31_str) +8000391c: 00012203 lw x4,0(x2) +80003920: 01f20863 beq x4,x31,80003930 +80003924: 3dd012ef jal x5,80005500 +80003928: 80003918 .word 0x80003918 +8000392c: 8000f2f1 .word 0x8000f2f1 +80003930: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x20c5a2d8 +80003934: 0000a603 lw x12,0(x1) +80003938: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xff23c9a9 +8000393c: 0000a003 lw x0,0(x1) +80003940: 00408093 addi x1,x1,4 + +80003944 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b0: + sha512sum1r x0, x12, x0 # perform operation +80003944: 52060033 sha512sum1r x0,x12,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknh_sha512sum1r_cg_cmp_rd_rs2_b0, Zknh_sha512sum1r_cg_cmp_rd_rs2_b0_str) +80003948: 00012203 lw x4,0(x2) +8000394c: 00020863 beq x4,x0,8000395c +80003950: 3b1012ef jal x5,80005500 +80003954: 80003944 .word 0x80003944 +80003958: 8000f330 .word 0x8000f330 +8000395c: 00410113 addi x2,x2,4 + + mv x31, x1 # switch data pointer register to avoid conflict with test +80003960: 00008f93 addi x31,x1,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x6207b90c +80003964: 000fab83 lw x23,0(x31) +80003968: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0xad0c0407 +8000396c: 000fa083 lw x1,0(x31) +80003970: 004f8f93 addi x31,x31,4 + +80003974 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b1: + sha512sum1r x1, x23, x1 # perform operation +80003974: 521b80b3 sha512sum1r x1,x23,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknh_sha512sum1r_cg_cmp_rd_rs2_b1, Zknh_sha512sum1r_cg_cmp_rd_rs2_b1_str) +80003978: 00012203 lw x4,0(x2) +8000397c: 00120863 beq x4,x1,8000398c +80003980: 381012ef jal x5,80005500 +80003984: 80003974 .word 0x80003974 +80003988: 8000f36e .word 0x8000f36e +8000398c: 00410113 addi x2,x2,4 + + mv x24, x2 # switch signature pointer register to avoid conflict with test +80003990: 00010c13 addi x24,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x5578ae81 +80003994: 000fa983 lw x19,0(x31) +80003998: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x4c82a13d +8000399c: 000fa103 lw x2,0(x31) +800039a0: 004f8f93 addi x31,x31,4 + +800039a4 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b2: + sha512sum1r x2, x19, x2 # perform operation +800039a4: 52298133 sha512sum1r x2,x19,x2 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zknh_sha512sum1r_cg_cmp_rd_rs2_b2, Zknh_sha512sum1r_cg_cmp_rd_rs2_b2_str) +800039a8: 000c2203 lw x4,0(x24) +800039ac: 00220863 beq x4,x2,800039bc +800039b0: 351012ef jal x5,80005500 +800039b4: 800039a4 .word 0x800039a4 +800039b8: 8000f3ac .word 0x8000f3ac +800039bc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xba833103 +800039c0: 000fa483 lw x9,0(x31) +800039c4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0xe60d4e0a +800039c8: 000fa183 lw x3,0(x31) +800039cc: 004f8f93 addi x31,x31,4 + +800039d0 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b3: + sha512sum1r x3, x9, x3 # perform operation +800039d0: 523481b3 sha512sum1r x3,x9,x3 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zknh_sha512sum1r_cg_cmp_rd_rs2_b3, Zknh_sha512sum1r_cg_cmp_rd_rs2_b3_str) +800039d4: 000c2203 lw x4,0(x24) +800039d8: 00320863 beq x4,x3,800039e8 +800039dc: 325012ef jal x5,80005500 +800039e0: 800039d0 .word 0x800039d0 +800039e4: 8000f3ea .word 0x8000f3ea +800039e8: 004c0c13 addi x24,x24,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800039ec: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800039f0: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x26da8f26 +800039f4: 000fa583 lw x11,0(x31) +800039f8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0x2257a0d5 +800039fc: 000fa203 lw x4,0(x31) +80003a00: 004f8f93 addi x31,x31,4 + +80003a04 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b4: + sha512sum1r x4, x11, x4 # perform operation +80003a04: 52458233 sha512sum1r x4,x11,x4 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknh_sha512sum1r_cg_cmp_rd_rs2_b4, Zknh_sha512sum1r_cg_cmp_rd_rs2_b4_str) +80003a08: 000c2383 lw x7,0(x24) +80003a0c: 00438863 beq x7,x4,80003a1c +80003a10: 3090146f jal x8,80005518 +80003a14: 80003a04 .word 0x80003a04 +80003a18: 8000f428 .word 0x8000f428 +80003a1c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xa95c8917 +80003a20: 000fa783 lw x15,0(x31) +80003a24: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x6de2c3da +80003a28: 000fa283 lw x5,0(x31) +80003a2c: 004f8f93 addi x31,x31,4 + +80003a30 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b5: + sha512sum1r x5, x15, x5 # perform operation +80003a30: 525782b3 sha512sum1r x5,x15,x5 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknh_sha512sum1r_cg_cmp_rd_rs2_b5, Zknh_sha512sum1r_cg_cmp_rd_rs2_b5_str) +80003a34: 000c2383 lw x7,0(x24) +80003a38: 00538863 beq x7,x5,80003a48 +80003a3c: 2dd0146f jal x8,80005518 +80003a40: 80003a30 .word 0x80003a30 +80003a44: 8000f466 .word 0x8000f466 +80003a48: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0xd5c757fe +80003a4c: 000fa103 lw x2,0(x31) +80003a50: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x8ede7b6e +80003a54: 000fa303 lw x6,0(x31) +80003a58: 004f8f93 addi x31,x31,4 + +80003a5c : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b6: + sha512sum1r x6, x2, x6 # perform operation +80003a5c: 52610333 sha512sum1r x6,x2,x6 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknh_sha512sum1r_cg_cmp_rd_rs2_b6, Zknh_sha512sum1r_cg_cmp_rd_rs2_b6_str) +80003a60: 000c2383 lw x7,0(x24) +80003a64: 00638863 beq x7,x6,80003a74 +80003a68: 2b10146f jal x8,80005518 +80003a6c: 80003a5c .word 0x80003a5c +80003a70: 8000f4a4 .word 0x8000f4a4 +80003a74: 004c0c13 addi x24,x24,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a78: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a7c: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x0ce695ff +80003a80: 000fa803 lw x16,0(x31) +80003a84: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0xa10941b0 +80003a88: 000fa383 lw x7,0(x31) +80003a8c: 004f8f93 addi x31,x31,4 + +80003a90 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b7: + sha512sum1r x7, x16, x7 # perform operation +80003a90: 527803b3 sha512sum1r x7,x16,x7 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zknh_sha512sum1r_cg_cmp_rd_rs2_b7, Zknh_sha512sum1r_cg_cmp_rd_rs2_b7_str) +80003a94: 000c2203 lw x4,0(x24) +80003a98: 00720863 beq x4,x7,80003aa8 +80003a9c: 265012ef jal x5,80005500 +80003aa0: 80003a90 .word 0x80003a90 +80003aa4: 8000f4e2 .word 0x8000f4e2 +80003aa8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x5db59d6d +80003aac: 000fa783 lw x15,0(x31) +80003ab0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0xa118e225 +80003ab4: 000fa403 lw x8,0(x31) +80003ab8: 004f8f93 addi x31,x31,4 + +80003abc : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b8: + sha512sum1r x8, x15, x8 # perform operation +80003abc: 52878433 sha512sum1r x8,x15,x8 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zknh_sha512sum1r_cg_cmp_rd_rs2_b8, Zknh_sha512sum1r_cg_cmp_rd_rs2_b8_str) +80003ac0: 000c2203 lw x4,0(x24) +80003ac4: 00820863 beq x4,x8,80003ad4 +80003ac8: 239012ef jal x5,80005500 +80003acc: 80003abc .word 0x80003abc +80003ad0: 8000f520 .word 0x8000f520 +80003ad4: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x25356ca2 +80003ad8: 000fa803 lw x16,0(x31) +80003adc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0x7cb98c37 +80003ae0: 000fa483 lw x9,0(x31) +80003ae4: 004f8f93 addi x31,x31,4 + +80003ae8 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b9: + sha512sum1r x9, x16, x9 # perform operation +80003ae8: 529804b3 sha512sum1r x9,x16,x9 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zknh_sha512sum1r_cg_cmp_rd_rs2_b9, Zknh_sha512sum1r_cg_cmp_rd_rs2_b9_str) +80003aec: 000c2203 lw x4,0(x24) +80003af0: 00920863 beq x4,x9,80003b00 +80003af4: 20d012ef jal x5,80005500 +80003af8: 80003ae8 .word 0x80003ae8 +80003afc: 8000f55e .word 0x8000f55e +80003b00: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x0212af25 +80003b04: 000fa683 lw x13,0(x31) +80003b08: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0x4b5fc9ae +80003b0c: 000fa503 lw x10,0(x31) +80003b10: 004f8f93 addi x31,x31,4 + +80003b14 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b10: + sha512sum1r x10, x13, x10 # perform operation +80003b14: 52a68533 sha512sum1r x10,x13,x10 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zknh_sha512sum1r_cg_cmp_rd_rs2_b10, Zknh_sha512sum1r_cg_cmp_rd_rs2_b10_str) +80003b18: 000c2203 lw x4,0(x24) +80003b1c: 00a20863 beq x4,x10,80003b2c +80003b20: 1e1012ef jal x5,80005500 +80003b24: 80003b14 .word 0x80003b14 +80003b28: 8000f59c .word 0x8000f59c +80003b2c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xf02d2465 +80003b30: 000faa03 lw x20,0(x31) +80003b34: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x498b5bd1 +80003b38: 000fa583 lw x11,0(x31) +80003b3c: 004f8f93 addi x31,x31,4 + +80003b40 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b11: + sha512sum1r x11, x20, x11 # perform operation +80003b40: 52ba05b3 sha512sum1r x11,x20,x11 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zknh_sha512sum1r_cg_cmp_rd_rs2_b11, Zknh_sha512sum1r_cg_cmp_rd_rs2_b11_str) +80003b44: 000c2203 lw x4,0(x24) +80003b48: 00b20863 beq x4,x11,80003b58 +80003b4c: 1b5012ef jal x5,80005500 +80003b50: 80003b40 .word 0x80003b40 +80003b54: 8000f5db .word 0x8000f5db +80003b58: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0x28c92f79 +80003b5c: 000fa303 lw x6,0(x31) +80003b60: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0x7996be1e +80003b64: 000fa603 lw x12,0(x31) +80003b68: 004f8f93 addi x31,x31,4 + +80003b6c : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b12: + sha512sum1r x12, x6, x12 # perform operation +80003b6c: 52c30633 sha512sum1r x12,x6,x12 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zknh_sha512sum1r_cg_cmp_rd_rs2_b12, Zknh_sha512sum1r_cg_cmp_rd_rs2_b12_str) +80003b70: 000c2203 lw x4,0(x24) +80003b74: 00c20863 beq x4,x12,80003b84 +80003b78: 189012ef jal x5,80005500 +80003b7c: 80003b6c .word 0x80003b6c +80003b80: 8000f61a .word 0x8000f61a +80003b84: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x432b204e +80003b88: 000fa083 lw x1,0(x31) +80003b8c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0x46677f68 +80003b90: 000fa683 lw x13,0(x31) +80003b94: 004f8f93 addi x31,x31,4 + +80003b98 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b13: + sha512sum1r x13, x1, x13 # perform operation +80003b98: 52d086b3 sha512sum1r x13,x1,x13 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zknh_sha512sum1r_cg_cmp_rd_rs2_b13, Zknh_sha512sum1r_cg_cmp_rd_rs2_b13_str) +80003b9c: 000c2203 lw x4,0(x24) +80003ba0: 00d20863 beq x4,x13,80003bb0 +80003ba4: 15d012ef jal x5,80005500 +80003ba8: 80003b98 .word 0x80003b98 +80003bac: 8000f659 .word 0x8000f659 +80003bb0: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x9572bcf9 +80003bb4: 000fa503 lw x10,0(x31) +80003bb8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0x81c39db1 +80003bbc: 000fa703 lw x14,0(x31) +80003bc0: 004f8f93 addi x31,x31,4 + +80003bc4 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b14: + sha512sum1r x14, x10, x14 # perform operation +80003bc4: 52e50733 sha512sum1r x14,x10,x14 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zknh_sha512sum1r_cg_cmp_rd_rs2_b14, Zknh_sha512sum1r_cg_cmp_rd_rs2_b14_str) +80003bc8: 000c2203 lw x4,0(x24) +80003bcc: 00e20863 beq x4,x14,80003bdc +80003bd0: 131012ef jal x5,80005500 +80003bd4: 80003bc4 .word 0x80003bc4 +80003bd8: 8000f698 .word 0x8000f698 +80003bdc: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xca3e7940 +80003be0: 000fae03 lw x28,0(x31) +80003be4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xddc95068 +80003be8: 000fa783 lw x15,0(x31) +80003bec: 004f8f93 addi x31,x31,4 + +80003bf0 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b15: + sha512sum1r x15, x28, x15 # perform operation +80003bf0: 52fe07b3 sha512sum1r x15,x28,x15 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zknh_sha512sum1r_cg_cmp_rd_rs2_b15, Zknh_sha512sum1r_cg_cmp_rd_rs2_b15_str) +80003bf4: 000c2203 lw x4,0(x24) +80003bf8: 00f20863 beq x4,x15,80003c08 +80003bfc: 105012ef jal x5,80005500 +80003c00: 80003bf0 .word 0x80003bf0 +80003c04: 8000f6d7 .word 0x8000f6d7 +80003c08: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xec659b93 +80003c0c: 000fad83 lw x27,0(x31) +80003c10: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x6cd9e8a2 +80003c14: 000fa803 lw x16,0(x31) +80003c18: 004f8f93 addi x31,x31,4 + +80003c1c : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b16: + sha512sum1r x16, x27, x16 # perform operation +80003c1c: 530d8833 sha512sum1r x16,x27,x16 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zknh_sha512sum1r_cg_cmp_rd_rs2_b16, Zknh_sha512sum1r_cg_cmp_rd_rs2_b16_str) +80003c20: 000c2203 lw x4,0(x24) +80003c24: 01020863 beq x4,x16,80003c34 +80003c28: 0d9012ef jal x5,80005500 +80003c2c: 80003c1c .word 0x80003c1c +80003c30: 8000f716 .word 0x8000f716 +80003c34: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xf6600173 +80003c38: 000fa683 lw x13,0(x31) +80003c3c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0x4c2bdb45 +80003c40: 000fa883 lw x17,0(x31) +80003c44: 004f8f93 addi x31,x31,4 + +80003c48 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b17: + sha512sum1r x17, x13, x17 # perform operation +80003c48: 531688b3 sha512sum1r x17,x13,x17 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknh_sha512sum1r_cg_cmp_rd_rs2_b17, Zknh_sha512sum1r_cg_cmp_rd_rs2_b17_str) +80003c4c: 000c2203 lw x4,0(x24) +80003c50: 01120863 beq x4,x17,80003c60 +80003c54: 0ad012ef jal x5,80005500 +80003c58: 80003c48 .word 0x80003c48 +80003c5c: 8000f755 .word 0x8000f755 +80003c60: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x27ec2b90 +80003c64: 000fae03 lw x28,0(x31) +80003c68: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x29b704f7 +80003c6c: 000fa903 lw x18,0(x31) +80003c70: 004f8f93 addi x31,x31,4 + +80003c74 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b18: + sha512sum1r x18, x28, x18 # perform operation +80003c74: 532e0933 sha512sum1r x18,x28,x18 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zknh_sha512sum1r_cg_cmp_rd_rs2_b18, Zknh_sha512sum1r_cg_cmp_rd_rs2_b18_str) +80003c78: 000c2203 lw x4,0(x24) +80003c7c: 01220863 beq x4,x18,80003c8c +80003c80: 081012ef jal x5,80005500 +80003c84: 80003c74 .word 0x80003c74 +80003c88: 8000f794 .word 0x8000f794 +80003c8c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xeedeaa3e +80003c90: 000fa503 lw x10,0(x31) +80003c94: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xed296fdc +80003c98: 000fa983 lw x19,0(x31) +80003c9c: 004f8f93 addi x31,x31,4 + +80003ca0 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b19: + sha512sum1r x19, x10, x19 # perform operation +80003ca0: 533509b3 sha512sum1r x19,x10,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zknh_sha512sum1r_cg_cmp_rd_rs2_b19, Zknh_sha512sum1r_cg_cmp_rd_rs2_b19_str) +80003ca4: 000c2203 lw x4,0(x24) +80003ca8: 01320863 beq x4,x19,80003cb8 +80003cac: 055012ef jal x5,80005500 +80003cb0: 80003ca0 .word 0x80003ca0 +80003cb4: 8000f7d3 .word 0x8000f7d3 +80003cb8: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x7ea0dd03 +80003cbc: 000fac83 lw x25,0(x31) +80003cc0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x091f176c +80003cc4: 000faa03 lw x20,0(x31) +80003cc8: 004f8f93 addi x31,x31,4 + +80003ccc : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b20: + sha512sum1r x20, x25, x20 # perform operation +80003ccc: 534c8a33 sha512sum1r x20,x25,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zknh_sha512sum1r_cg_cmp_rd_rs2_b20, Zknh_sha512sum1r_cg_cmp_rd_rs2_b20_str) +80003cd0: 000c2203 lw x4,0(x24) +80003cd4: 01420863 beq x4,x20,80003ce4 +80003cd8: 029012ef jal x5,80005500 +80003cdc: 80003ccc .word 0x80003ccc +80003ce0: 8000f812 .word 0x8000f812 +80003ce4: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x1e29b2b6 +80003ce8: 000fa583 lw x11,0(x31) +80003cec: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0x496cd8b3 +80003cf0: 000faa83 lw x21,0(x31) +80003cf4: 004f8f93 addi x31,x31,4 + +80003cf8 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b21: + sha512sum1r x21, x11, x21 # perform operation +80003cf8: 53558ab3 sha512sum1r x21,x11,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknh_sha512sum1r_cg_cmp_rd_rs2_b21, Zknh_sha512sum1r_cg_cmp_rd_rs2_b21_str) +80003cfc: 000c2203 lw x4,0(x24) +80003d00: 01520863 beq x4,x21,80003d10 +80003d04: 7fc012ef jal x5,80005500 +80003d08: 80003cf8 .word 0x80003cf8 +80003d0c: 8000f851 .word 0x8000f851 +80003d10: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x5f0257ef +80003d14: 000fa083 lw x1,0(x31) +80003d18: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0xf182f7b1 +80003d1c: 000fab03 lw x22,0(x31) +80003d20: 004f8f93 addi x31,x31,4 + +80003d24 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b22: + sha512sum1r x22, x1, x22 # perform operation +80003d24: 53608b33 sha512sum1r x22,x1,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zknh_sha512sum1r_cg_cmp_rd_rs2_b22, Zknh_sha512sum1r_cg_cmp_rd_rs2_b22_str) +80003d28: 000c2203 lw x4,0(x24) +80003d2c: 01620863 beq x4,x22,80003d3c +80003d30: 7d0012ef jal x5,80005500 +80003d34: 80003d24 .word 0x80003d24 +80003d38: 8000f890 .word 0x8000f890 +80003d3c: 004c0c13 addi x24,x24,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x0cc7b559 +80003d40: 000fa083 lw x1,0(x31) +80003d44: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x3a204a0c +80003d48: 000fab83 lw x23,0(x31) +80003d4c: 004f8f93 addi x31,x31,4 + +80003d50 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b23: + sha512sum1r x23, x1, x23 # perform operation +80003d50: 53708bb3 sha512sum1r x23,x1,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha512sum1r_cg_cmp_rd_rs2_b23, Zknh_sha512sum1r_cg_cmp_rd_rs2_b23_str) +80003d54: 000c2203 lw x4,0(x24) +80003d58: 01720863 beq x4,x23,80003d68 +80003d5c: 7a4012ef jal x5,80005500 +80003d60: 80003d50 .word 0x80003d50 +80003d64: 8000f8cf .word 0x8000f8cf +80003d68: 004c0c13 addi x24,x24,4 + + mv x3, x24 # switch signature pointer register to avoid conflict with test +80003d6c: 000c0193 addi x3,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x545620aa +80003d70: 000fa683 lw x13,0(x31) +80003d74: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x910e993a +80003d78: 000fac03 lw x24,0(x31) +80003d7c: 004f8f93 addi x31,x31,4 + +80003d80 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b24: + sha512sum1r x24, x13, x24 # perform operation +80003d80: 53868c33 sha512sum1r x24,x13,x24 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zknh_sha512sum1r_cg_cmp_rd_rs2_b24, Zknh_sha512sum1r_cg_cmp_rd_rs2_b24_str) +80003d84: 0001a203 lw x4,0(x3) +80003d88: 01820863 beq x4,x24,80003d98 +80003d8c: 774012ef jal x5,80005500 +80003d90: 80003d80 .word 0x80003d80 +80003d94: 8000f90e .word 0x8000f90e +80003d98: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0x9b35cf14 +80003d9c: 000fa103 lw x2,0(x31) +80003da0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xe16f9d49 +80003da4: 000fac83 lw x25,0(x31) +80003da8: 004f8f93 addi x31,x31,4 + +80003dac : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b25: + sha512sum1r x25, x2, x25 # perform operation +80003dac: 53910cb3 sha512sum1r x25,x2,x25 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zknh_sha512sum1r_cg_cmp_rd_rs2_b25, Zknh_sha512sum1r_cg_cmp_rd_rs2_b25_str) +80003db0: 0001a203 lw x4,0(x3) +80003db4: 01920863 beq x4,x25,80003dc4 +80003db8: 748012ef jal x5,80005500 +80003dbc: 80003dac .word 0x80003dac +80003dc0: 8000f94d .word 0x8000f94d +80003dc4: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xc16bfa27 +80003dc8: 000fa883 lw x17,0(x31) +80003dcc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xc7600b97 +80003dd0: 000fad03 lw x26,0(x31) +80003dd4: 004f8f93 addi x31,x31,4 + +80003dd8 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b26: + sha512sum1r x26, x17, x26 # perform operation +80003dd8: 53a88d33 sha512sum1r x26,x17,x26 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zknh_sha512sum1r_cg_cmp_rd_rs2_b26, Zknh_sha512sum1r_cg_cmp_rd_rs2_b26_str) +80003ddc: 0001a203 lw x4,0(x3) +80003de0: 01a20863 beq x4,x26,80003df0 +80003de4: 71c012ef jal x5,80005500 +80003de8: 80003dd8 .word 0x80003dd8 +80003dec: 8000f98c .word 0x8000f98c +80003df0: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x9968ca1b +80003df4: 000fa083 lw x1,0(x31) +80003df8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xf307540a +80003dfc: 000fad83 lw x27,0(x31) +80003e00: 004f8f93 addi x31,x31,4 + +80003e04 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b27: + sha512sum1r x27, x1, x27 # perform operation +80003e04: 53b08db3 sha512sum1r x27,x1,x27 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zknh_sha512sum1r_cg_cmp_rd_rs2_b27, Zknh_sha512sum1r_cg_cmp_rd_rs2_b27_str) +80003e08: 0001a203 lw x4,0(x3) +80003e0c: 01b20863 beq x4,x27,80003e1c +80003e10: 6f0012ef jal x5,80005500 +80003e14: 80003e04 .word 0x80003e04 +80003e18: 8000f9cb .word 0x8000f9cb +80003e1c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x4c6d60bd +80003e20: 000fa983 lw x19,0(x31) +80003e24: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0xbe2a30d0 +80003e28: 000fae03 lw x28,0(x31) +80003e2c: 004f8f93 addi x31,x31,4 + +80003e30 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b28: + sha512sum1r x28, x19, x28 # perform operation +80003e30: 53c98e33 sha512sum1r x28,x19,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zknh_sha512sum1r_cg_cmp_rd_rs2_b28, Zknh_sha512sum1r_cg_cmp_rd_rs2_b28_str) +80003e34: 0001a203 lw x4,0(x3) +80003e38: 01c20863 beq x4,x28,80003e48 +80003e3c: 6c4012ef jal x5,80005500 +80003e40: 80003e30 .word 0x80003e30 +80003e44: 8000fa0a .word 0x8000fa0a +80003e48: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x8cf5cac5 +80003e4c: 000fae03 lw x28,0(x31) +80003e50: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x283276c1 +80003e54: 000fae83 lw x29,0(x31) +80003e58: 004f8f93 addi x31,x31,4 + +80003e5c : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b29: + sha512sum1r x29, x28, x29 # perform operation +80003e5c: 53de0eb3 sha512sum1r x29,x28,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zknh_sha512sum1r_cg_cmp_rd_rs2_b29, Zknh_sha512sum1r_cg_cmp_rd_rs2_b29_str) +80003e60: 0001a203 lw x4,0(x3) +80003e64: 01d20863 beq x4,x29,80003e74 +80003e68: 698012ef jal x5,80005500 +80003e6c: 80003e5c .word 0x80003e5c +80003e70: 8000fa49 .word 0x8000fa49 +80003e74: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x9c939cab +80003e78: 000fab03 lw x22,0(x31) +80003e7c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0xa27d5f7b +80003e80: 000faf03 lw x30,0(x31) +80003e84: 004f8f93 addi x31,x31,4 + +80003e88 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b30: + sha512sum1r x30, x22, x30 # perform operation +80003e88: 53eb0f33 sha512sum1r x30,x22,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zknh_sha512sum1r_cg_cmp_rd_rs2_b30, Zknh_sha512sum1r_cg_cmp_rd_rs2_b30_str) +80003e8c: 0001a203 lw x4,0(x3) +80003e90: 01e20863 beq x4,x30,80003ea0 +80003e94: 66c012ef jal x5,80005500 +80003e98: 80003e88 .word 0x80003e88 +80003e9c: 8000fa88 .word 0x8000fa88 +80003ea0: 00418193 addi x3,x3,4 + + mv x21, x31 # switch data pointer register to avoid conflict with test +80003ea4: 000f8a93 addi x21,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x239a62e0 +80003ea8: 000aa403 lw x8,0(x21) +80003eac: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xc9788e07 +80003eb0: 000aaf83 lw x31,0(x21) +80003eb4: 004a8a93 addi x21,x21,4 + +80003eb8 : +Zknh_sha512sum1r_cg_cmp_rd_rs2_b31: + sha512sum1r x31, x8, x31 # perform operation +80003eb8: 53f40fb3 sha512sum1r x31,x8,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zknh_sha512sum1r_cg_cmp_rd_rs2_b31, Zknh_sha512sum1r_cg_cmp_rd_rs2_b31_str) +80003ebc: 0001a203 lw x4,0(x3) +80003ec0: 01f20863 beq x4,x31,80003ed0 +80003ec4: 63c012ef jal x5,80005500 +80003ec8: 80003eb8 .word 0x80003eb8 +80003ecc: 8000fac7 .word 0x8000fac7 +80003ed0: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x3d22576c +80003ed4: 000aa003 lw x0,0(x21) +80003ed8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0xe3e93660 +80003edc: 000aa003 lw x0,0(x21) +80003ee0: 004a8a93 addi x21,x21,4 + +80003ee4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b0: + sha512sum1r x0, x0, x0 # perform operation +80003ee4: 52000033 sha512sum1r x0,x0,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b0, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b0_str) +80003ee8: 0001a203 lw x4,0(x3) +80003eec: 00020863 beq x4,x0,80003efc +80003ef0: 610012ef jal x5,80005500 +80003ef4: 80003ee4 .word 0x80003ee4 +80003ef8: 8000fb06 .word 0x8000fb06 +80003efc: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x33d3a98b +80003f00: 000aa083 lw x1,0(x21) +80003f04: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xf1ec06ce +80003f08: 000aa083 lw x1,0(x21) +80003f0c: 004a8a93 addi x21,x21,4 + +80003f10 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b1: + sha512sum1r x1, x1, x1 # perform operation +80003f10: 521080b3 sha512sum1r x1,x1,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b1, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b1_str) +80003f14: 0001a203 lw x4,0(x3) +80003f18: 00120863 beq x4,x1,80003f28 +80003f1c: 5e4012ef jal x5,80005500 +80003f20: 80003f10 .word 0x80003f10 +80003f24: 8000fb48 .word 0x8000fb48 +80003f28: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x4916daef +80003f2c: 000aa103 lw x2,0(x21) +80003f30: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xa2c270dc +80003f34: 000aa103 lw x2,0(x21) +80003f38: 004a8a93 addi x21,x21,4 + +80003f3c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b2: + sha512sum1r x2, x2, x2 # perform operation +80003f3c: 52210133 sha512sum1r x2,x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b2, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b2_str) +80003f40: 0001a203 lw x4,0(x3) +80003f44: 00220863 beq x4,x2,80003f54 +80003f48: 5b8012ef jal x5,80005500 +80003f4c: 80003f3c .word 0x80003f3c +80003f50: 8000fb8a .word 0x8000fb8a +80003f54: 00418193 addi x3,x3,4 + + mv x1, x3 # switch signature pointer register to avoid conflict with test +80003f58: 00018093 addi x1,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x28837ed4 +80003f5c: 000aa183 lw x3,0(x21) +80003f60: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xa1323a1c +80003f64: 000aa183 lw x3,0(x21) +80003f68: 004a8a93 addi x21,x21,4 + +80003f6c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b3: + sha512sum1r x3, x3, x3 # perform operation +80003f6c: 523181b3 sha512sum1r x3,x3,x3 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b3, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b3_str) +80003f70: 0000a203 lw x4,0(x1) +80003f74: 00320863 beq x4,x3,80003f84 +80003f78: 588012ef jal x5,80005500 +80003f7c: 80003f6c .word 0x80003f6c +80003f80: 8000fbcc .word 0x8000fbcc +80003f84: 00408093 addi x1,x1,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80003f88: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80003f8c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x43b0391f +80003f90: 000aa203 lw x4,0(x21) +80003f94: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x4899933d +80003f98: 000aa203 lw x4,0(x21) +80003f9c: 004a8a93 addi x21,x21,4 + +80003fa0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b4: + sha512sum1r x4, x4, x4 # perform operation +80003fa0: 52420233 sha512sum1r x4,x4,x4 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b4, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b4_str) +80003fa4: 0000a383 lw x7,0(x1) +80003fa8: 00438863 beq x7,x4,80003fb8 +80003fac: 56c0146f jal x8,80005518 +80003fb0: 80003fa0 .word 0x80003fa0 +80003fb4: 8000fc0e .word 0x8000fc0e +80003fb8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x23e703d9 +80003fbc: 000aa283 lw x5,0(x21) +80003fc0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0xa8907cbf +80003fc4: 000aa283 lw x5,0(x21) +80003fc8: 004a8a93 addi x21,x21,4 + +80003fcc : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b5: + sha512sum1r x5, x5, x5 # perform operation +80003fcc: 525282b3 sha512sum1r x5,x5,x5 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b5, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b5_str) +80003fd0: 0000a383 lw x7,0(x1) +80003fd4: 00538863 beq x7,x5,80003fe4 +80003fd8: 5400146f jal x8,80005518 +80003fdc: 80003fcc .word 0x80003fcc +80003fe0: 8000fc50 .word 0x8000fc50 +80003fe4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xf360a5ff +80003fe8: 000aa303 lw x6,0(x21) +80003fec: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x61052547 +80003ff0: 000aa303 lw x6,0(x21) +80003ff4: 004a8a93 addi x21,x21,4 + +80003ff8 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b6: + sha512sum1r x6, x6, x6 # perform operation +80003ff8: 52630333 sha512sum1r x6,x6,x6 + # Check if x6 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x6, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b6, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b6_str) +80003ffc: 0000a383 lw x7,0(x1) +80004000: 00638863 beq x7,x6,80004010 +80004004: 5140146f jal x8,80005518 +80004008: 80003ff8 .word 0x80003ff8 +8000400c: 8000fc92 .word 0x8000fc92 +80004010: 00408093 addi x1,x1,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80004014: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80004018: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x8a8cccb5 +8000401c: 000aa383 lw x7,0(x21) +80004020: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xe054f79b +80004024: 000aa383 lw x7,0(x21) +80004028: 004a8a93 addi x21,x21,4 + +8000402c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b7: + sha512sum1r x7, x7, x7 # perform operation +8000402c: 527383b3 sha512sum1r x7,x7,x7 + # Check if x7 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x7, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b7, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b7_str) +80004030: 0000a683 lw x13,0(x1) +80004034: 00768863 beq x13,x7,80004044 +80004038: 5080176f jal x14,80005540 +8000403c: 8000402c .word 0x8000402c +80004040: 8000fcd4 .word 0x8000fcd4 +80004044: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x14f69597 +80004048: 000aa403 lw x8,0(x21) +8000404c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xb2f6ac69 +80004050: 000aa403 lw x8,0(x21) +80004054: 004a8a93 addi x21,x21,4 + +80004058 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b8: + sha512sum1r x8, x8, x8 # perform operation +80004058: 52840433 sha512sum1r x8,x8,x8 + # Check if x8 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x8, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b8, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b8_str) +8000405c: 0000a683 lw x13,0(x1) +80004060: 00868863 beq x13,x8,80004070 +80004064: 4dc0176f jal x14,80005540 +80004068: 80004058 .word 0x80004058 +8000406c: 8000fd16 .word 0x8000fd16 +80004070: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x8f066850 +80004074: 000aa483 lw x9,0(x21) +80004078: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xaa04ca29 +8000407c: 000aa483 lw x9,0(x21) +80004080: 004a8a93 addi x21,x21,4 + +80004084 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b9: + sha512sum1r x9, x9, x9 # perform operation +80004084: 529484b3 sha512sum1r x9,x9,x9 + # Check if x9 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x9, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b9, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b9_str) +80004088: 0000a683 lw x13,0(x1) +8000408c: 00968863 beq x13,x9,8000409c +80004090: 4b00176f jal x14,80005540 +80004094: 80004084 .word 0x80004084 +80004098: 8000fd58 .word 0x8000fd58 +8000409c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x3dd3fc86 +800040a0: 000aa503 lw x10,0(x21) +800040a4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x77f48dcc +800040a8: 000aa503 lw x10,0(x21) +800040ac: 004a8a93 addi x21,x21,4 + +800040b0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b10: + sha512sum1r x10, x10, x10 # perform operation +800040b0: 52a50533 sha512sum1r x10,x10,x10 + # Check if x10 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x10, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b10, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b10_str) +800040b4: 0000a683 lw x13,0(x1) +800040b8: 00a68863 beq x13,x10,800040c8 +800040bc: 4840176f jal x14,80005540 +800040c0: 800040b0 .word 0x800040b0 +800040c4: 8000fd9a .word 0x8000fd9a +800040c8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xc6c651cf +800040cc: 000aa583 lw x11,0(x21) +800040d0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x8782aea9 +800040d4: 000aa583 lw x11,0(x21) +800040d8: 004a8a93 addi x21,x21,4 + +800040dc : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b11: + sha512sum1r x11, x11, x11 # perform operation +800040dc: 52b585b3 sha512sum1r x11,x11,x11 + # Check if x11 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x11, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b11, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b11_str) +800040e0: 0000a683 lw x13,0(x1) +800040e4: 00b68863 beq x13,x11,800040f4 +800040e8: 4580176f jal x14,80005540 +800040ec: 800040dc .word 0x800040dc +800040f0: 8000fddd .word 0x8000fddd +800040f4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x3fedad14 +800040f8: 000aa603 lw x12,0(x21) +800040fc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x42b977f6 +80004100: 000aa603 lw x12,0(x21) +80004104: 004a8a93 addi x21,x21,4 + +80004108 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b12: + sha512sum1r x12, x12, x12 # perform operation +80004108: 52c60633 sha512sum1r x12,x12,x12 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b12, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b12_str) +8000410c: 0000a683 lw x13,0(x1) +80004110: 00c68863 beq x13,x12,80004120 +80004114: 42c0176f jal x14,80005540 +80004118: 80004108 .word 0x80004108 +8000411c: 8000fe20 .word 0x8000fe20 +80004120: 00408093 addi x1,x1,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80004124: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80004128: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xe17586e0 +8000412c: 000aa683 lw x13,0(x21) +80004130: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xdef46b58 +80004134: 000aa683 lw x13,0(x21) +80004138: 004a8a93 addi x21,x21,4 + +8000413c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b13: + sha512sum1r x13, x13, x13 # perform operation +8000413c: 52d686b3 sha512sum1r x13,x13,x13 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b13, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b13_str) +80004140: 0000a383 lw x7,0(x1) +80004144: 00d38863 beq x7,x13,80004154 +80004148: 3d00146f jal x8,80005518 +8000414c: 8000413c .word 0x8000413c +80004150: 8000fe63 .word 0x8000fe63 +80004154: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x027d33dd +80004158: 000aa703 lw x14,0(x21) +8000415c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x226a7d7a +80004160: 000aa703 lw x14,0(x21) +80004164: 004a8a93 addi x21,x21,4 + +80004168 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b14: + sha512sum1r x14, x14, x14 # perform operation +80004168: 52e70733 sha512sum1r x14,x14,x14 + # Check if x14 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x14, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b14, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b14_str) +8000416c: 0000a383 lw x7,0(x1) +80004170: 00e38863 beq x7,x14,80004180 +80004174: 3a40146f jal x8,80005518 +80004178: 80004168 .word 0x80004168 +8000417c: 8000fea6 .word 0x8000fea6 +80004180: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xa5422f97 +80004184: 000aa783 lw x15,0(x21) +80004188: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x42ad7d1a +8000418c: 000aa783 lw x15,0(x21) +80004190: 004a8a93 addi x21,x21,4 + +80004194 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b15: + sha512sum1r x15, x15, x15 # perform operation +80004194: 52f787b3 sha512sum1r x15,x15,x15 + # Check if x15 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x15, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b15, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b15_str) +80004198: 0000a383 lw x7,0(x1) +8000419c: 00f38863 beq x7,x15,800041ac +800041a0: 3780146f jal x8,80005518 +800041a4: 80004194 .word 0x80004194 +800041a8: 8000fee9 .word 0x8000fee9 +800041ac: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x040f2049 +800041b0: 000aa803 lw x16,0(x21) +800041b4: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xfe4003ec +800041b8: 000aa803 lw x16,0(x21) +800041bc: 004a8a93 addi x21,x21,4 + +800041c0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b16: + sha512sum1r x16, x16, x16 # perform operation +800041c0: 53080833 sha512sum1r x16,x16,x16 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b16, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b16_str) +800041c4: 0000a383 lw x7,0(x1) +800041c8: 01038863 beq x7,x16,800041d8 +800041cc: 34c0146f jal x8,80005518 +800041d0: 800041c0 .word 0x800041c0 +800041d4: 8000ff2c .word 0x8000ff2c +800041d8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x2ad222dd +800041dc: 000aa883 lw x17,0(x21) +800041e0: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xb976aec5 +800041e4: 000aa883 lw x17,0(x21) +800041e8: 004a8a93 addi x21,x21,4 + +800041ec : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b17: + sha512sum1r x17, x17, x17 # perform operation +800041ec: 531888b3 sha512sum1r x17,x17,x17 + # Check if x17 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x17, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b17, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b17_str) +800041f0: 0000a383 lw x7,0(x1) +800041f4: 01138863 beq x7,x17,80004204 +800041f8: 3200146f jal x8,80005518 +800041fc: 800041ec .word 0x800041ec +80004200: 8000ff6f .word 0x8000ff6f +80004204: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x6a6e50d0 +80004208: 000aa903 lw x18,0(x21) +8000420c: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xfbdb6e23 +80004210: 000aa903 lw x18,0(x21) +80004214: 004a8a93 addi x21,x21,4 + +80004218 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b18: + sha512sum1r x18, x18, x18 # perform operation +80004218: 53290933 sha512sum1r x18,x18,x18 + # Check if x18 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x18, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b18, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b18_str) +8000421c: 0000a383 lw x7,0(x1) +80004220: 01238863 beq x7,x18,80004230 +80004224: 2f40146f jal x8,80005518 +80004228: 80004218 .word 0x80004218 +8000422c: 8000ffb2 .word 0x8000ffb2 +80004230: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x61118375 +80004234: 000aa983 lw x19,0(x21) +80004238: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xf17ccdcf +8000423c: 000aa983 lw x19,0(x21) +80004240: 004a8a93 addi x21,x21,4 + +80004244 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b19: + sha512sum1r x19, x19, x19 # perform operation +80004244: 533989b3 sha512sum1r x19,x19,x19 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b19, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b19_str) +80004248: 0000a383 lw x7,0(x1) +8000424c: 01338863 beq x7,x19,8000425c +80004250: 2c80146f jal x8,80005518 +80004254: 80004244 .word 0x80004244 +80004258: 8000fff5 .word 0x8000fff5 +8000425c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xe1f72aec +80004260: 000aaa03 lw x20,0(x21) +80004264: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xc1519bbf +80004268: 000aaa03 lw x20,0(x21) +8000426c: 004a8a93 addi x21,x21,4 + +80004270 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b20: + sha512sum1r x20, x20, x20 # perform operation +80004270: 534a0a33 sha512sum1r x20,x20,x20 + # Check if x20 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x20, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b20, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b20_str) +80004274: 0000a383 lw x7,0(x1) +80004278: 01438863 beq x7,x20,80004288 +8000427c: 29c0146f jal x8,80005518 +80004280: 80004270 .word 0x80004270 +80004284: 80010038 .word 0x80010038 +80004288: 00408093 addi x1,x1,4 + + mv x18, x21 # switch data pointer register to avoid conflict with test +8000428c: 000a8913 addi x18,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x056e85a0 +80004290: 00092a83 lw x21,0(x18) +80004294: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x13fa769a +80004298: 00092a83 lw x21,0(x18) +8000429c: 00490913 addi x18,x18,4 + +800042a0 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b21: + sha512sum1r x21, x21, x21 # perform operation +800042a0: 535a8ab3 sha512sum1r x21,x21,x21 + # Check if x21 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x21, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b21, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b21_str) +800042a4: 0000a383 lw x7,0(x1) +800042a8: 01538863 beq x7,x21,800042b8 +800042ac: 26c0146f jal x8,80005518 +800042b0: 800042a0 .word 0x800042a0 +800042b4: 8001007b .word 0x8001007b +800042b8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0xd3d4879b +800042bc: 00092b03 lw x22,0(x18) +800042c0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x20b61c30 +800042c4: 00092b03 lw x22,0(x18) +800042c8: 00490913 addi x18,x18,4 + +800042cc : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b22: + sha512sum1r x22, x22, x22 # perform operation +800042cc: 536b0b33 sha512sum1r x22,x22,x22 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b22, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b22_str) +800042d0: 0000a383 lw x7,0(x1) +800042d4: 01638863 beq x7,x22,800042e4 +800042d8: 2400146f jal x8,80005518 +800042dc: 800042cc .word 0x800042cc +800042e0: 800100be .word 0x800100be +800042e4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x7d1767fc +800042e8: 00092b83 lw x23,0(x18) +800042ec: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xc0ffcea9 +800042f0: 00092b83 lw x23,0(x18) +800042f4: 00490913 addi x18,x18,4 + +800042f8 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b23: + sha512sum1r x23, x23, x23 # perform operation +800042f8: 537b8bb3 sha512sum1r x23,x23,x23 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b23, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b23_str) +800042fc: 0000a383 lw x7,0(x1) +80004300: 01738863 beq x7,x23,80004310 +80004304: 2140146f jal x8,80005518 +80004308: 800042f8 .word 0x800042f8 +8000430c: 80010101 .word 0x80010101 +80004310: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x4e298c7e +80004314: 00092c03 lw x24,0(x18) +80004318: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x3dfc21e1 +8000431c: 00092c03 lw x24,0(x18) +80004320: 00490913 addi x18,x18,4 + +80004324 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b24: + sha512sum1r x24, x24, x24 # perform operation +80004324: 538c0c33 sha512sum1r x24,x24,x24 + # Check if x24 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x24, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b24, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b24_str) +80004328: 0000a383 lw x7,0(x1) +8000432c: 01838863 beq x7,x24,8000433c +80004330: 1e80146f jal x8,80005518 +80004334: 80004324 .word 0x80004324 +80004338: 80010144 .word 0x80010144 +8000433c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xab388ea5 +80004340: 00092c83 lw x25,0(x18) +80004344: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x1328668b +80004348: 00092c83 lw x25,0(x18) +8000434c: 00490913 addi x18,x18,4 + +80004350 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b25: + sha512sum1r x25, x25, x25 # perform operation +80004350: 539c8cb3 sha512sum1r x25,x25,x25 + # Check if x25 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x25, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b25, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b25_str) +80004354: 0000a383 lw x7,0(x1) +80004358: 01938863 beq x7,x25,80004368 +8000435c: 1bc0146f jal x8,80005518 +80004360: 80004350 .word 0x80004350 +80004364: 80010187 .word 0x80010187 +80004368: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x43635ab9 +8000436c: 00092d03 lw x26,0(x18) +80004370: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x34401b60 +80004374: 00092d03 lw x26,0(x18) +80004378: 00490913 addi x18,x18,4 + +8000437c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b26: + sha512sum1r x26, x26, x26 # perform operation +8000437c: 53ad0d33 sha512sum1r x26,x26,x26 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b26, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b26_str) +80004380: 0000a383 lw x7,0(x1) +80004384: 01a38863 beq x7,x26,80004394 +80004388: 1900146f jal x8,80005518 +8000438c: 8000437c .word 0x8000437c +80004390: 800101ca .word 0x800101ca +80004394: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x73e2cc0d +80004398: 00092d83 lw x27,0(x18) +8000439c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x54763b33 +800043a0: 00092d83 lw x27,0(x18) +800043a4: 00490913 addi x18,x18,4 + +800043a8 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b27: + sha512sum1r x27, x27, x27 # perform operation +800043a8: 53bd8db3 sha512sum1r x27,x27,x27 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b27, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b27_str) +800043ac: 0000a383 lw x7,0(x1) +800043b0: 01b38863 beq x7,x27,800043c0 +800043b4: 1640146f jal x8,80005518 +800043b8: 800043a8 .word 0x800043a8 +800043bc: 8001020d .word 0x8001020d +800043c0: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x7ea36d45 +800043c4: 00092e03 lw x28,0(x18) +800043c8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x201a8e86 +800043cc: 00092e03 lw x28,0(x18) +800043d0: 00490913 addi x18,x18,4 + +800043d4 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b28: + sha512sum1r x28, x28, x28 # perform operation +800043d4: 53ce0e33 sha512sum1r x28,x28,x28 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b28, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b28_str) +800043d8: 0000a383 lw x7,0(x1) +800043dc: 01c38863 beq x7,x28,800043ec +800043e0: 1380146f jal x8,80005518 +800043e4: 800043d4 .word 0x800043d4 +800043e8: 80010250 .word 0x80010250 +800043ec: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x0f4a5844 +800043f0: 00092e83 lw x29,0(x18) +800043f4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x5d0dca50 +800043f8: 00092e83 lw x29,0(x18) +800043fc: 00490913 addi x18,x18,4 + +80004400 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b29: + sha512sum1r x29, x29, x29 # perform operation +80004400: 53de8eb3 sha512sum1r x29,x29,x29 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b29, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b29_str) +80004404: 0000a383 lw x7,0(x1) +80004408: 01d38863 beq x7,x29,80004418 +8000440c: 10c0146f jal x8,80005518 +80004410: 80004400 .word 0x80004400 +80004414: 80010293 .word 0x80010293 +80004418: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x30a2ce6f +8000441c: 00092f03 lw x30,0(x18) +80004420: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x72af227f +80004424: 00092f03 lw x30,0(x18) +80004428: 00490913 addi x18,x18,4 + +8000442c : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b30: + sha512sum1r x30, x30, x30 # perform operation +8000442c: 53ef0f33 sha512sum1r x30,x30,x30 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b30, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b30_str) +80004430: 0000a383 lw x7,0(x1) +80004434: 01e38863 beq x7,x30,80004444 +80004438: 0e00146f jal x8,80005518 +8000443c: 8000442c .word 0x8000442c +80004440: 800102d6 .word 0x800102d6 +80004444: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x52e7d86a +80004448: 00092f83 lw x31,0(x18) +8000444c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xedb2bdc9 +80004450: 00092f83 lw x31,0(x18) +80004454: 00490913 addi x18,x18,4 + +80004458 : +Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b31: + sha512sum1r x31, x31, x31 # perform operation +80004458: 53ff8fb3 sha512sum1r x31,x31,x31 + # Check if x31 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x31, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b31, Zknh_sha512sum1r_cg_cmp_rd_rs1_rs2_b31_str) +8000445c: 0000a383 lw x7,0(x1) +80004460: 01f38863 beq x7,x31,80004470 +80004464: 0b40146f jal x8,80005518 +80004468: 80004458 .word 0x80004458 +8000446c: 80010319 .word 0x80010319 +80004470: 00408093 addi x1,x1,4 + + mv x2, x1 # restore signature pointer to default register for teardown +80004474: 00008113 addi x2,x1,0 + +80004478 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80004478: 00000513 addi x10,x0,0 +8000447c: 00000073 ecall +80004480: fff00513 addi x10,x0,-1 +80004484: 1d800413 addi x8,x0,472 + +80004488 : +80004488: 34002373 csrrs x6,mscratch,x0 + +8000448c : +8000448c: 23832383 lw x7,568(x6) +80004490: 23c32483 lw x9,572(x6) + +80004494 : +80004494: 22032383 lw x7,544(x6) + +80004498 : +80004498: 25032483 lw x9,592(x6) +8000449c: 34049073 csrrw x0,mscratch,x9 + +800044a0 : +800044a0: 24832483 lw x9,584(x6) +800044a4: 305493f3 csrrw x7,mtvec,x9 +800044a8: ffc4f493 andi x9,x9,-4 +800044ac: ffc3f393 andi x7,x7,-4 +800044b0: 00749e63 bne x9,x7,800044cc + +800044b4 : +800044b4: 00030493 addi x9,x6,0 + +800044b8 : +800044b8: 0004a783 lw x15,0(x9) +800044bc: 00f3a023 sw x15,0(x7) +800044c0: 00438393 addi x7,x7,4 +800044c4: 00448493 addi x9,x9,4 +800044c8: fe83c8e3 blt x7,x8,800044b8 +800044cc: 0000100f fence.i + +800044d0 : +800044d0: 00000013 addi x0,x0,0 +800044d4: 00000013 addi x0,x0,0 +800044d8: 00000013 addi x0,x0,0 +800044dc: 00000013 addi x0,x0,0 +800044e0: 00000497 auipc x9,0x0 +800044e4: 29048493 addi x9,x9,656 # 80004770 +800044e8: 00000013 addi x0,x0,0 +800044ec: 00000013 addi x0,x0,0 +800044f0: 00000013 addi x0,x0,0 +800044f4: 00000013 addi x0,x0,0 +800044f8: 00000013 addi x0,x0,0 +800044fc: 00000013 addi x0,x0,0 +80004500: 10e49863 bne x9,x14,80004610 +80004504: 00000013 addi x0,x0,0 +80004508: 00000013 addi x0,x0,0 +8000450c: 00000013 addi x0,x0,0 +80004510: 00000013 addi x0,x0,0 +80004514: 00000013 addi x0,x0,0 +80004518: 00000013 addi x0,x0,0 +8000451c: 00000013 addi x0,x0,0 +80004520: 0000c517 auipc x10,0xc +80004524: 4c550513 addi x10,x10,1221 # 800109e5 +80004528: 00000013 addi x0,x0,0 +8000452c: 00000013 addi x0,x0,0 +80004530: 00000013 addi x0,x0,0 +80004534: 00000013 addi x0,x0,0 +80004538: 00000013 addi x0,x0,0 +8000453c: 00000013 addi x0,x0,0 +80004540: 0001e097 auipc x1,0x1e +80004544: 024080e7 jalr x1,36(x1) # 80022564 +80004548: 00000013 addi x0,x0,0 +8000454c: 00000013 addi x0,x0,0 +80004550: 00000013 addi x0,x0,0 +80004554: 00000013 addi x0,x0,0 +80004558: 00000013 addi x0,x0,0 +8000455c: 00000013 addi x0,x0,0 +80004560: 0000c517 auipc x10,0xc +80004564: 4c550513 addi x10,x10,1221 # 80010a25 +80004568: 00000013 addi x0,x0,0 +8000456c: 00000013 addi x0,x0,0 +80004570: 00000013 addi x0,x0,0 +80004574: 00000013 addi x0,x0,0 +80004578: 00000013 addi x0,x0,0 +8000457c: 00000013 addi x0,x0,0 +80004580: 0001e097 auipc x1,0x1e +80004584: fe4080e7 jalr x1,-28(x1) # 80022564 +80004588: 00000013 addi x0,x0,0 +8000458c: 00000013 addi x0,x0,0 +80004590: 00000013 addi x0,x0,0 +80004594: 00000013 addi x0,x0,0 +80004598: 00000013 addi x0,x0,0 +8000459c: 00000013 addi x0,x0,0 +800045a0: 0000c517 auipc x10,0xc +800045a4: 4e550513 addi x10,x10,1253 # 80010a85 +800045a8: 00000013 addi x0,x0,0 +800045ac: 00000013 addi x0,x0,0 +800045b0: 00000013 addi x0,x0,0 +800045b4: 00000013 addi x0,x0,0 +800045b8: 00000013 addi x0,x0,0 +800045bc: 00000013 addi x0,x0,0 +800045c0: 0001e097 auipc x1,0x1e +800045c4: fa4080e7 jalr x1,-92(x1) # 80022564 +800045c8: 00000013 addi x0,x0,0 +800045cc: 00000013 addi x0,x0,0 +800045d0: 00000013 addi x0,x0,0 +800045d4: 00000013 addi x0,x0,0 +800045d8: 00000013 addi x0,x0,0 +800045dc: 00000013 addi x0,x0,0 +800045e0: 0000d517 auipc x10,0xd +800045e4: 05050513 addi x10,x10,80 # 80011630 +800045e8: 00000013 addi x0,x0,0 +800045ec: 00000013 addi x0,x0,0 +800045f0: 00000013 addi x0,x0,0 +800045f4: 00000013 addi x0,x0,0 +800045f8: 00000013 addi x0,x0,0 +800045fc: 00000013 addi x0,x0,0 +80004600: 0001e097 auipc x1,0x1e +80004604: f64080e7 jalr x1,-156(x1) # 80022564 +80004608: 0001e097 auipc x1,0x1e +8000460c: fbc080e7 jalr x1,-68(x1) # 800225c4 + +80004610 : +80004610: 00000013 addi x0,x0,0 +80004614: 00000013 addi x0,x0,0 +80004618: 00000013 addi x0,x0,0 +8000461c: 00000013 addi x0,x0,0 +80004620: 00004317 auipc x6,0x4 +80004624: d0830313 addi x6,x6,-760 # 80008328 +80004628: 00000013 addi x0,x0,0 +8000462c: 00000013 addi x0,x0,0 +80004630: 00000013 addi x0,x0,0 +80004634: 00000013 addi x0,x0,0 +80004638: 00000013 addi x0,x0,0 +8000463c: 00000013 addi x0,x0,0 +80004640: 00032303 lw x6,0(x6) +80004644: 00000013 addi x0,x0,0 +80004648: 00000013 addi x0,x0,0 +8000464c: 00000013 addi x0,x0,0 +80004650: 00000013 addi x0,x0,0 +80004654: 00000013 addi x0,x0,0 +80004658: 00000013 addi x0,x0,0 +8000465c: 00000013 addi x0,x0,0 +80004660: 0000e397 auipc x7,0xe +80004664: 0a838393 addi x7,x7,168 # 80012708 +80004668: 00000013 addi x0,x0,0 +8000466c: 00000013 addi x0,x0,0 +80004670: 00000013 addi x0,x0,0 +80004674: 00000013 addi x0,x0,0 +80004678: 00000013 addi x0,x0,0 +8000467c: 00000013 addi x0,x0,0 +80004680: 40730333 sub x6,x6,x7 +80004684: 00000013 addi x0,x0,0 +80004688: 00000013 addi x0,x0,0 +8000468c: 00000013 addi x0,x0,0 +80004690: 00000013 addi x0,x0,0 +80004694: 00000013 addi x0,x0,0 +80004698: 00000013 addi x0,x0,0 +8000469c: 00000013 addi x0,x0,0 +800046a0: 0000e417 auipc x8,0xe +800046a4: 06040413 addi x8,x8,96 # 80012700 +800046a8: 00000013 addi x0,x0,0 +800046ac: 00000013 addi x0,x0,0 +800046b0: 00000013 addi x0,x0,0 +800046b4: 00000013 addi x0,x0,0 +800046b8: 00000013 addi x0,x0,0 +800046bc: 00000013 addi x0,x0,0 +800046c0: 00042203 lw x4,0(x8) +800046c4: 00620863 beq x4,x6,800046d4 +800046c8: 6a1003ef jal x7,80005568 +800046cc: 80004610 .word 0x80004610 +800046d0: 80010bd9 .word 0x80010bd9 + +800046d4 : +800046d4: bad0e4b7 lui x9,0xbad0e +800046d8: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3aceaead> +800046dc: 00e49a63 bne x9,x14,800046f0 +800046e0: 689003ef jal x7,80005568 +800046e4: 800047a4 .word 0x800047a4 +800046e8: 80010a47 .word 0x80010a47 +800046ec: 00000341 .word 0x00000341 + +800046f0 : +800046f0: 00000013 addi x0,x0,0 +800046f4: 00000013 addi x0,x0,0 +800046f8: 00000013 addi x0,x0,0 +800046fc: 00000013 addi x0,x0,0 +80004700: 0000c517 auipc x10,0xc +80004704: 2a450513 addi x10,x10,676 # 800109a4 +80004708: 00000013 addi x0,x0,0 +8000470c: 00000013 addi x0,x0,0 +80004710: 00000013 addi x0,x0,0 +80004714: 00000013 addi x0,x0,0 +80004718: 00000013 addi x0,x0,0 +8000471c: 00000013 addi x0,x0,0 +80004720: 0001e097 auipc x1,0x1e +80004724: e44080e7 jalr x1,-444(x1) # 80022564 +80004728: 0001e097 auipc x1,0x1e +8000472c: e7c080e7 jalr x1,-388(x1) # 800225a4 + +80004730 : +80004730: 00000013 addi x0,x0,0 +80004734: 00000013 addi x0,x0,0 +80004738: 00000013 addi x0,x0,0 +8000473c: 00000013 addi x0,x0,0 +80004740: 0000c517 auipc x10,0xc +80004744: 2a550513 addi x10,x10,677 # 800109e5 +80004748: 00000013 addi x0,x0,0 +8000474c: 00000013 addi x0,x0,0 +80004750: 00000013 addi x0,x0,0 +80004754: 00000013 addi x0,x0,0 +80004758: 00000013 addi x0,x0,0 +8000475c: 00000013 addi x0,x0,0 +80004760: 0001e097 auipc x1,0x1e +80004764: e04080e7 jalr x1,-508(x1) # 80022564 +80004768: 0001e097 auipc x1,0x1e +8000476c: e5c080e7 jalr x1,-420(x1) # 800225c4 + +80004770 : +80004770: 00000013 addi x0,x0,0 +80004774: 00000013 addi x0,x0,0 +80004778: 00000013 addi x0,x0,0 +8000477c: 00000013 addi x0,x0,0 +80004780: 00000717 auipc x14,0x0 +80004784: ff070713 addi x14,x14,-16 # 80004770 +80004788: 00000013 addi x0,x0,0 +8000478c: 00000013 addi x0,x0,0 +80004790: 00000013 addi x0,x0,0 +80004794: 00000013 addi x0,x0,0 +80004798: 00000013 addi x0,x0,0 +8000479c: 00000013 addi x0,x0,0 +800047a0: cd9ff06f jal x0,80004478 + +800047a4 : +800047a4: bad0e737 lui x14,0xbad0e +800047a8: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3aceaead> +800047ac: ccdff06f jal x0,80004478 +800047b0: 00000013 addi x0,x0,0 +800047b4: 00000013 addi x0,x0,0 +800047b8: 00000013 addi x0,x0,0 +800047bc: 00000013 addi x0,x0,0 + +800047c0 : +800047c0: 0800006f jal x0,80004840 +800047c4: 0880006f jal x0,8000484c +800047c8: 0900006f jal x0,80004858 +800047cc: 0980006f jal x0,80004864 +800047d0: 0a00006f jal x0,80004870 +800047d4: 0a80006f jal x0,8000487c +800047d8: 0b00006f jal x0,80004888 +800047dc: 0b80006f jal x0,80004894 +800047e0: 0c00006f jal x0,800048a0 +800047e4: 0c80006f jal x0,800048ac +800047e8: 0d00006f jal x0,800048b8 +800047ec: 0d80006f jal x0,800048c4 +800047f0: 0e00006f jal x0,800048d0 +800047f4: 0e80006f jal x0,800048dc +800047f8: 0f00006f jal x0,800048e8 +800047fc: 0f80006f jal x0,800048f4 +80004800: 1000006f jal x0,80004900 +80004804: 1080006f jal x0,8000490c +80004808: 1100006f jal x0,80004918 +8000480c: 1180006f jal x0,80004924 +80004810: 1200006f jal x0,80004930 +80004814: 1280006f jal x0,8000493c +80004818: 1300006f jal x0,80004948 +8000481c: 1380006f jal x0,80004954 +80004820: 1400006f jal x0,80004960 +80004824: 13c0006f jal x0,80004960 +80004828: 1380006f jal x0,80004960 +8000482c: 1340006f jal x0,80004960 +80004830: 1300006f jal x0,80004960 +80004834: 12c0006f jal x0,80004960 +80004838: 1280006f jal x0,80004960 +8000483c: 1240006f jal x0,80004960 + +80004840 : +80004840: 34011173 csrrw x2,mscratch,x2 +80004844: 26f12823 sw x15,624(x2) +80004848: 13c007ef jal x15,80004984 +8000484c: 34011173 csrrw x2,mscratch,x2 +80004850: 26f12823 sw x15,624(x2) +80004854: 130007ef jal x15,80004984 +80004858: 34011173 csrrw x2,mscratch,x2 +8000485c: 26f12823 sw x15,624(x2) +80004860: 124007ef jal x15,80004984 +80004864: 34011173 csrrw x2,mscratch,x2 +80004868: 26f12823 sw x15,624(x2) +8000486c: 118007ef jal x15,80004984 +80004870: 34011173 csrrw x2,mscratch,x2 +80004874: 26f12823 sw x15,624(x2) +80004878: 10c007ef jal x15,80004984 +8000487c: 34011173 csrrw x2,mscratch,x2 +80004880: 26f12823 sw x15,624(x2) +80004884: 100007ef jal x15,80004984 +80004888: 34011173 csrrw x2,mscratch,x2 +8000488c: 26f12823 sw x15,624(x2) +80004890: 0f4007ef jal x15,80004984 +80004894: 34011173 csrrw x2,mscratch,x2 +80004898: 26f12823 sw x15,624(x2) +8000489c: 0e8007ef jal x15,80004984 +800048a0: 34011173 csrrw x2,mscratch,x2 +800048a4: 26f12823 sw x15,624(x2) +800048a8: 0dc007ef jal x15,80004984 +800048ac: 34011173 csrrw x2,mscratch,x2 +800048b0: 26f12823 sw x15,624(x2) +800048b4: 0d0007ef jal x15,80004984 +800048b8: 34011173 csrrw x2,mscratch,x2 +800048bc: 26f12823 sw x15,624(x2) +800048c0: 0c4007ef jal x15,80004984 +800048c4: 34011173 csrrw x2,mscratch,x2 +800048c8: 26f12823 sw x15,624(x2) +800048cc: 0b8007ef jal x15,80004984 +800048d0: 34011173 csrrw x2,mscratch,x2 +800048d4: 26f12823 sw x15,624(x2) +800048d8: 0ac007ef jal x15,80004984 +800048dc: 34011173 csrrw x2,mscratch,x2 +800048e0: 26f12823 sw x15,624(x2) +800048e4: 0a0007ef jal x15,80004984 +800048e8: 34011173 csrrw x2,mscratch,x2 +800048ec: 26f12823 sw x15,624(x2) +800048f0: 094007ef jal x15,80004984 +800048f4: 34011173 csrrw x2,mscratch,x2 +800048f8: 26f12823 sw x15,624(x2) +800048fc: 088007ef jal x15,80004984 +80004900: 34011173 csrrw x2,mscratch,x2 +80004904: 26f12823 sw x15,624(x2) +80004908: 07c007ef jal x15,80004984 +8000490c: 34011173 csrrw x2,mscratch,x2 +80004910: 26f12823 sw x15,624(x2) +80004914: 070007ef jal x15,80004984 +80004918: 34011173 csrrw x2,mscratch,x2 +8000491c: 26f12823 sw x15,624(x2) +80004920: 064007ef jal x15,80004984 +80004924: 34011173 csrrw x2,mscratch,x2 +80004928: 26f12823 sw x15,624(x2) +8000492c: 058007ef jal x15,80004984 +80004930: 34011173 csrrw x2,mscratch,x2 +80004934: 26f12823 sw x15,624(x2) +80004938: 04c007ef jal x15,80004984 +8000493c: 34011173 csrrw x2,mscratch,x2 +80004940: 26f12823 sw x15,624(x2) +80004944: 040007ef jal x15,80004984 +80004948: 34011173 csrrw x2,mscratch,x2 +8000494c: 26f12823 sw x15,624(x2) +80004950: 034007ef jal x15,80004984 +80004954: 34011173 csrrw x2,mscratch,x2 +80004958: 26f12823 sw x15,624(x2) +8000495c: 028007ef jal x15,80004984 + +80004960 : +80004960: 00000317 auipc x6,0x0 +80004964: b7030313 addi x6,x6,-1168 # 800044d0 +80004968: 00000013 addi x0,x0,0 +8000496c: 00000013 addi x0,x0,0 +80004970: 00000013 addi x0,x0,0 +80004974: 00000013 addi x0,x0,0 +80004978: 00000013 addi x0,x0,0 +8000497c: 00000013 addi x0,x0,0 +80004980: 00030067 jalr x0,0(x6) + +80004984 : +80004984: 26e12623 sw x14,620(x2) +80004988: 34011773 csrrw x14,mscratch,x2 +8000498c: 26e12a23 sw x14,628(x2) +80004990: 23012703 lw x14,560(x2) +80004994: 00070067 jalr x0,0(x14) + +80004998 : +80004998: 26912423 sw x9,616(x2) +8000499c: 26812223 sw x8,612(x2) +800049a0: 26712023 sw x7,608(x2) +800049a4: 24612e23 sw x6,604(x2) +800049a8: 00000013 addi x0,x0,0 +800049ac: 00000013 addi x0,x0,0 +800049b0: 00000013 addi x0,x0,0 +800049b4: 00000013 addi x0,x0,0 +800049b8: 00000013 addi x0,x0,0 +800049bc: 00000013 addi x0,x0,0 +800049c0: 00003317 auipc x6,0x3 +800049c4: 74830313 addi x6,x6,1864 # 80008108 +800049c8: 00000013 addi x0,x0,0 +800049cc: 00000013 addi x0,x0,0 +800049d0: 00000013 addi x0,x0,0 +800049d4: 00000013 addi x0,x0,0 +800049d8: 00000013 addi x0,x0,0 +800049dc: 00000013 addi x0,x0,0 +800049e0: 00032383 lw x7,0(x6) +800049e4: 00138393 addi x7,x7,1 +800049e8: 00732023 sw x7,0(x6) +800049ec: 34202773 csrrs x14,mcause,x0 + +800049f0 : +800049f0: 800014b7 lui x9,0x80001 +800049f4: fff48493 addi x9,x9,-1 # 80000fff +800049f8: 00e4f4b3 and x9,x9,x14 + +800049fc : +800049fc: ffe48413 addi x8,x9,-2 +80004a00: 00041663 bne x8,x0,80004a0c + +80004a04 : +80004a04: 280506e3 beq x10,x0,80005490 +80004a08: 58c0006f jal x0,80004f94 + +80004a0c : +80004a0c: ff848413 addi x8,x9,-8 +80004a10: 00245413 srli x8,x8,0x2 +80004a14: 58041063 bne x8,x0,80004f94 + +80004a18 : +80004a18: 26050ce3 beq x10,x0,80005490 + +80004a1c : +80004a1c: fff50493 addi x9,x10,-1 +80004a20: 00500393 addi x7,x0,5 +80004a24: 0274e063 bltu x9,x7,80004a44 +80004a28: 07300393 addi x7,x0,115 +80004a2c: 00750463 beq x10,x7,80004a34 +80004a30: 0800006f jal x0,80004ab0 + +80004a34 : +80004a34: 34102573 csrrs x10,mepc,x0 +80004a38: 00450413 addi x8,x10,4 +80004a3c: 34141073 csrrw x0,mepc,x8 +80004a40: 7c00006f jal x0,80005200 + +80004a44 : +80004a44: 341024f3 csrrs x9,mepc,x0 +80004a48: 00448493 addi x9,x9,4 +80004a4c: 34149073 csrrw x0,mepc,x9 +80004a50: 00100393 addi x7,x0,1 +80004a54: 00750e63 beq x10,x7,80004a70 +80004a58: 00200393 addi x7,x0,2 +80004a5c: 02750263 beq x10,x7,80004a80 +80004a60: 00300393 addi x7,x0,3 +80004a64: 02750c63 beq x10,x7,80004a9c +80004a68: fff00513 addi x10,x0,-1 +80004a6c: 7940006f jal x0,80005200 + +80004a70 : +80004a70: 000024b7 lui x9,0x2 +80004a74: 80048493 addi x9,x9,-2048 # 1800 +80004a78: 3004a073 csrrs x0,mstatus,x9 +80004a7c: 7840006f jal x0,80005200 + +80004a80 : +80004a80: 000024b7 lui x9,0x2 +80004a84: 80048493 addi x9,x9,-2048 # 1800 +80004a88: 3004b073 csrrc x0,mstatus,x9 +80004a8c: 000014b7 lui x9,0x1 +80004a90: 80048493 addi x9,x9,-2048 # 800 +80004a94: 3004a073 csrrs x0,mstatus,x9 +80004a98: 7680006f jal x0,80005200 + +80004a9c : +80004a9c: 000024b7 lui x9,0x2 +80004aa0: 80048493 addi x9,x9,-2048 # 1800 +80004aa4: 3004b073 csrrc x0,mstatus,x9 +80004aa8: 7580006f jal x0,80005200 + +80004aac : +80004aac: 00000013 addi x0,x0,0 + +80004ab0 : +80004ab0: 00000013 addi x0,x0,0 +80004ab4: 00000013 addi x0,x0,0 +80004ab8: 00000013 addi x0,x0,0 +80004abc: 00000013 addi x0,x0,0 +80004ac0: 00000397 auipc x7,0x0 +80004ac4: 17038393 addi x7,x7,368 # 80004c30 +80004ac8: 00000013 addi x0,x0,0 +80004acc: 00000013 addi x0,x0,0 +80004ad0: 00000013 addi x0,x0,0 +80004ad4: 00000013 addi x0,x0,0 +80004ad8: 00000013 addi x0,x0,0 +80004adc: 00000013 addi x0,x0,0 + +80004ae0 : +80004ae0: 0003a403 lw x8,0(x7) +80004ae4: 00a40863 beq x8,x10,80004af4 +80004ae8: 04040863 beq x8,x0,80004b38 +80004aec: 00838393 addi x7,x7,8 +80004af0: ff1ff06f jal x0,80004ae0 + +80004af4 : +80004af4: 00008493 addi x9,x1,0 +80004af8: 00000013 addi x0,x0,0 +80004afc: 00000013 addi x0,x0,0 +80004b00: 00000097 auipc x1,0x0 +80004b04: 02408093 addi x1,x1,36 # 80004b24 +80004b08: 00000013 addi x0,x0,0 +80004b0c: 00000013 addi x0,x0,0 +80004b10: 00000013 addi x0,x0,0 +80004b14: 00000013 addi x0,x0,0 +80004b18: 00000013 addi x0,x0,0 +80004b1c: 00000013 addi x0,x0,0 +80004b20: 00038067 jalr x0,0(x7) + +80004b24 : +80004b24: 00048093 addi x1,x9,0 +80004b28: 34102473 csrrs x8,mepc,x0 +80004b2c: 00440413 addi x8,x8,4 +80004b30: 34141073 csrrw x0,mepc,x8 +80004b34: 6cc0006f jal x0,80005200 + +80004b38 : +80004b38: 00050493 addi x9,x10,0 +80004b3c: 00000013 addi x0,x0,0 +80004b40: 0000d517 auipc x10,0xd +80004b44: 52750513 addi x10,x10,1319 # 80012067 +80004b48: 00000013 addi x0,x0,0 +80004b4c: 00000013 addi x0,x0,0 +80004b50: 00000013 addi x0,x0,0 +80004b54: 00000013 addi x0,x0,0 +80004b58: 00000013 addi x0,x0,0 +80004b5c: 00000013 addi x0,x0,0 +80004b60: 0001e097 auipc x1,0x1e +80004b64: a04080e7 jalr x1,-1532(x1) # 80022564 +80004b68: 00048513 addi x10,x9,0 +80004b6c: 02000593 addi x11,x0,32 +80004b70: 4a8020ef jal x1,80007018 +80004b74: 00000013 addi x0,x0,0 +80004b78: 00000013 addi x0,x0,0 +80004b7c: 00000013 addi x0,x0,0 +80004b80: 0000c517 auipc x10,0xc +80004b84: 94850513 addi x10,x10,-1720 # 800104c8 +80004b88: 00000013 addi x0,x0,0 +80004b8c: 00000013 addi x0,x0,0 +80004b90: 00000013 addi x0,x0,0 +80004b94: 00000013 addi x0,x0,0 +80004b98: 00000013 addi x0,x0,0 +80004b9c: 00000013 addi x0,x0,0 +80004ba0: 0001e097 auipc x1,0x1e +80004ba4: 9c4080e7 jalr x1,-1596(x1) # 80022564 +80004ba8: 00000013 addi x0,x0,0 +80004bac: 00000013 addi x0,x0,0 +80004bb0: 00000013 addi x0,x0,0 +80004bb4: 00000013 addi x0,x0,0 +80004bb8: 00000013 addi x0,x0,0 +80004bbc: 00000013 addi x0,x0,0 +80004bc0: 0000c517 auipc x10,0xc +80004bc4: f2e50513 addi x10,x10,-210 # 80010aee +80004bc8: 00000013 addi x0,x0,0 +80004bcc: 00000013 addi x0,x0,0 +80004bd0: 00000013 addi x0,x0,0 +80004bd4: 00000013 addi x0,x0,0 +80004bd8: 00000013 addi x0,x0,0 +80004bdc: 00000013 addi x0,x0,0 +80004be0: 0001e097 auipc x1,0x1e +80004be4: 984080e7 jalr x1,-1660(x1) # 80022564 +80004be8: 00000013 addi x0,x0,0 +80004bec: 00000013 addi x0,x0,0 +80004bf0: 00000013 addi x0,x0,0 +80004bf4: 00000013 addi x0,x0,0 +80004bf8: 00000013 addi x0,x0,0 +80004bfc: 00000013 addi x0,x0,0 +80004c00: 0000c517 auipc x10,0xc +80004c04: de550513 addi x10,x10,-539 # 800109e5 +80004c08: 00000013 addi x0,x0,0 +80004c0c: 00000013 addi x0,x0,0 +80004c10: 00000013 addi x0,x0,0 +80004c14: 00000013 addi x0,x0,0 +80004c18: 00000013 addi x0,x0,0 +80004c1c: 00000013 addi x0,x0,0 +80004c20: 0001e097 auipc x1,0x1e +80004c24: 944080e7 jalr x1,-1724(x1) # 80022564 +80004c28: 0001e097 auipc x1,0x1e +80004c2c: 99c080e7 jalr x1,-1636(x1) # 800225c4 + +80004c30 : +80004c30: 30002573 .word 0x30002573 +80004c34: 00008067 jalr x0,0(x1) +80004c38: 30059073 .word 0x30059073 +80004c3c: 00008067 jalr x0,0(x1) +80004c40: 3005a073 .word 0x3005a073 +80004c44: 00008067 jalr x0,0(x1) +80004c48: 3005b073 .word 0x3005b073 +80004c4c: 00008067 jalr x0,0(x1) +80004c50: 30402573 .word 0x30402573 +80004c54: 00008067 jalr x0,0(x1) +80004c58: 30459073 .word 0x30459073 +80004c5c: 00008067 jalr x0,0(x1) +80004c60: 3045a073 .word 0x3045a073 +80004c64: 00008067 jalr x0,0(x1) +80004c68: 3045b073 .word 0x3045b073 +80004c6c: 00008067 jalr x0,0(x1) +80004c70: 30602573 .word 0x30602573 +80004c74: 00008067 jalr x0,0(x1) +80004c78: 30659073 .word 0x30659073 +80004c7c: 00008067 jalr x0,0(x1) +80004c80: 3065a073 .word 0x3065a073 +80004c84: 00008067 jalr x0,0(x1) +80004c88: 3065b073 .word 0x3065b073 +80004c8c: 00008067 jalr x0,0(x1) +80004c90: 30a02573 .word 0x30a02573 +80004c94: 00008067 jalr x0,0(x1) +80004c98: 30a59073 .word 0x30a59073 +80004c9c: 00008067 jalr x0,0(x1) +80004ca0: 30a5a073 .word 0x30a5a073 +80004ca4: 00008067 jalr x0,0(x1) +80004ca8: 30a5b073 .word 0x30a5b073 +80004cac: 00008067 jalr x0,0(x1) +80004cb0: 34402573 .word 0x34402573 +80004cb4: 00008067 jalr x0,0(x1) +80004cb8: 34459073 .word 0x34459073 +80004cbc: 00008067 jalr x0,0(x1) +80004cc0: 3445a073 .word 0x3445a073 +80004cc4: 00008067 jalr x0,0(x1) +80004cc8: 3445b073 .word 0x3445b073 +80004ccc: 00008067 jalr x0,0(x1) +80004cd0: 74702573 .word 0x74702573 +80004cd4: 00008067 jalr x0,0(x1) +80004cd8: 74759073 .word 0x74759073 +80004cdc: 00008067 jalr x0,0(x1) +80004ce0: 7475a073 .word 0x7475a073 +80004ce4: 00008067 jalr x0,0(x1) +80004ce8: 7475b073 .word 0x7475b073 +80004cec: 00008067 jalr x0,0(x1) +80004cf0: 32002573 .word 0x32002573 +80004cf4: 00008067 jalr x0,0(x1) +80004cf8: 32059073 .word 0x32059073 +80004cfc: 00008067 jalr x0,0(x1) +80004d00: 3205a073 .word 0x3205a073 +80004d04: 00008067 jalr x0,0(x1) +80004d08: 3205b073 .word 0x3205b073 +80004d0c: 00008067 jalr x0,0(x1) +80004d10: b0002573 .word 0xb0002573 +80004d14: 00008067 jalr x0,0(x1) +80004d18: b0059073 .word 0xb0059073 +80004d1c: 00008067 jalr x0,0(x1) +80004d20: b005a073 .word 0xb005a073 +80004d24: 00008067 jalr x0,0(x1) +80004d28: b005b073 .word 0xb005b073 +80004d2c: 00008067 jalr x0,0(x1) +80004d30: b0202573 .word 0xb0202573 +80004d34: 00008067 jalr x0,0(x1) +80004d38: b0259073 .word 0xb0259073 +80004d3c: 00008067 jalr x0,0(x1) +80004d40: b025a073 .word 0xb025a073 +80004d44: 00008067 jalr x0,0(x1) +80004d48: b025b073 .word 0xb025b073 +80004d4c: 00008067 jalr x0,0(x1) +80004d50: 10002573 .word 0x10002573 +80004d54: 00008067 jalr x0,0(x1) +80004d58: 10059073 .word 0x10059073 +80004d5c: 00008067 jalr x0,0(x1) +80004d60: 1005a073 .word 0x1005a073 +80004d64: 00008067 jalr x0,0(x1) +80004d68: 1005b073 .word 0x1005b073 +80004d6c: 00008067 jalr x0,0(x1) +80004d70: 10402573 .word 0x10402573 +80004d74: 00008067 jalr x0,0(x1) +80004d78: 10459073 .word 0x10459073 +80004d7c: 00008067 jalr x0,0(x1) +80004d80: 1045a073 .word 0x1045a073 +80004d84: 00008067 jalr x0,0(x1) +80004d88: 1045b073 .word 0x1045b073 +80004d8c: 00008067 jalr x0,0(x1) +80004d90: 10602573 .word 0x10602573 +80004d94: 00008067 jalr x0,0(x1) +80004d98: 10659073 .word 0x10659073 +80004d9c: 00008067 jalr x0,0(x1) +80004da0: 1065a073 .word 0x1065a073 +80004da4: 00008067 jalr x0,0(x1) +80004da8: 1065b073 .word 0x1065b073 +80004dac: 00008067 jalr x0,0(x1) +80004db0: 10a02573 .word 0x10a02573 +80004db4: 00008067 jalr x0,0(x1) +80004db8: 10a59073 .word 0x10a59073 +80004dbc: 00008067 jalr x0,0(x1) +80004dc0: 10a5a073 .word 0x10a5a073 +80004dc4: 00008067 jalr x0,0(x1) +80004dc8: 10a5b073 .word 0x10a5b073 +80004dcc: 00008067 jalr x0,0(x1) +80004dd0: 14402573 .word 0x14402573 +80004dd4: 00008067 jalr x0,0(x1) +80004dd8: 14459073 .word 0x14459073 +80004ddc: 00008067 jalr x0,0(x1) +80004de0: 1445a073 .word 0x1445a073 +80004de4: 00008067 jalr x0,0(x1) +80004de8: 1445b073 .word 0x1445b073 +80004dec: 00008067 jalr x0,0(x1) +80004df0: 14d02573 .word 0x14d02573 +80004df4: 00008067 jalr x0,0(x1) +80004df8: 14d59073 .word 0x14d59073 +80004dfc: 00008067 jalr x0,0(x1) +80004e00: 14d5a073 .word 0x14d5a073 +80004e04: 00008067 jalr x0,0(x1) +80004e08: 14d5b073 .word 0x14d5b073 +80004e0c: 00008067 jalr x0,0(x1) +80004e10: 18002573 .word 0x18002573 +80004e14: 00008067 jalr x0,0(x1) +80004e18: 18059073 .word 0x18059073 +80004e1c: 00008067 jalr x0,0(x1) +80004e20: 1805a073 .word 0x1805a073 +80004e24: 00008067 jalr x0,0(x1) +80004e28: 1805b073 .word 0x1805b073 +80004e2c: 00008067 jalr x0,0(x1) +80004e30: 7a002573 .word 0x7a002573 +80004e34: 00008067 jalr x0,0(x1) +80004e38: 7a059073 .word 0x7a059073 +80004e3c: 00008067 jalr x0,0(x1) +80004e40: 7a05a073 .word 0x7a05a073 +80004e44: 00008067 jalr x0,0(x1) +80004e48: 7a05b073 .word 0x7a05b073 +80004e4c: 00008067 jalr x0,0(x1) +80004e50: 7a102573 .word 0x7a102573 +80004e54: 00008067 jalr x0,0(x1) +80004e58: 7a159073 .word 0x7a159073 +80004e5c: 00008067 jalr x0,0(x1) +80004e60: 7a15a073 .word 0x7a15a073 +80004e64: 00008067 jalr x0,0(x1) +80004e68: 7a15b073 .word 0x7a15b073 +80004e6c: 00008067 jalr x0,0(x1) +80004e70: 7a202573 .word 0x7a202573 +80004e74: 00008067 jalr x0,0(x1) +80004e78: 7a259073 .word 0x7a259073 +80004e7c: 00008067 jalr x0,0(x1) +80004e80: 7a25a073 .word 0x7a25a073 +80004e84: 00008067 jalr x0,0(x1) +80004e88: 7a25b073 .word 0x7a25b073 +80004e8c: 00008067 jalr x0,0(x1) +80004e90: 7a302573 .word 0x7a302573 +80004e94: 00008067 jalr x0,0(x1) +80004e98: 7a359073 .word 0x7a359073 +80004e9c: 00008067 jalr x0,0(x1) +80004ea0: 7a35a073 .word 0x7a35a073 +80004ea4: 00008067 jalr x0,0(x1) +80004ea8: 7a35b073 .word 0x7a35b073 +80004eac: 00008067 jalr x0,0(x1) +80004eb0: 7a402573 .word 0x7a402573 +80004eb4: 00008067 jalr x0,0(x1) +80004eb8: 7a459073 .word 0x7a459073 +80004ebc: 00008067 jalr x0,0(x1) +80004ec0: 7a45a073 .word 0x7a45a073 +80004ec4: 00008067 jalr x0,0(x1) +80004ec8: 7a45b073 .word 0x7a45b073 +80004ecc: 00008067 jalr x0,0(x1) +80004ed0: 7a502573 .word 0x7a502573 +80004ed4: 00008067 jalr x0,0(x1) +80004ed8: 7a559073 .word 0x7a559073 +80004edc: 00008067 jalr x0,0(x1) +80004ee0: 7a55a073 .word 0x7a55a073 +80004ee4: 00008067 jalr x0,0(x1) +80004ee8: 7a55b073 .word 0x7a55b073 +80004eec: 00008067 jalr x0,0(x1) +80004ef0: 7a802573 .word 0x7a802573 +80004ef4: 00008067 jalr x0,0(x1) +80004ef8: 7a859073 .word 0x7a859073 +80004efc: 00008067 jalr x0,0(x1) +80004f00: 7a85a073 .word 0x7a85a073 +80004f04: 00008067 jalr x0,0(x1) +80004f08: 7a85b073 .word 0x7a85b073 +80004f0c: 00008067 jalr x0,0(x1) +80004f10: 7aa02573 .word 0x7aa02573 +80004f14: 00008067 jalr x0,0(x1) +80004f18: 7aa59073 .word 0x7aa59073 +80004f1c: 00008067 jalr x0,0(x1) +80004f20: 7aa5a073 .word 0x7aa5a073 +80004f24: 00008067 jalr x0,0(x1) +80004f28: 7aa5b073 .word 0x7aa5b073 +80004f2c: 00008067 jalr x0,0(x1) +80004f30: 5a802573 .word 0x5a802573 +80004f34: 00008067 jalr x0,0(x1) +80004f38: 5a859073 .word 0x5a859073 +80004f3c: 00008067 jalr x0,0(x1) +80004f40: 5a85a073 .word 0x5a85a073 +80004f44: 00008067 jalr x0,0(x1) +80004f48: 5a85b073 .word 0x5a85b073 +80004f4c: 00008067 jalr x0,0(x1) +80004f50: 6a802573 .word 0x6a802573 +80004f54: 00008067 jalr x0,0(x1) +80004f58: 6a859073 .word 0x6a859073 +80004f5c: 00008067 jalr x0,0(x1) +80004f60: 6a85a073 .word 0x6a85a073 +80004f64: 00008067 jalr x0,0(x1) +80004f68: 6a85b073 .word 0x6a85b073 +80004f6c: 00008067 jalr x0,0(x1) +80004f70: 0005a503 lw x10,0(x11) +80004f74: 00008067 jalr x0,0(x1) +80004f78: 0045a503 lw x10,4(x11) +80004f7c: 00008067 jalr x0,0(x1) +80004f80: 00c5a023 sw x12,0(x11) +80004f84: 00008067 jalr x0,0(x1) +80004f88: 00c5a223 sw x12,4(x11) +80004f8c: 00008067 jalr x0,0(x1) +80004f90: 00000000 .word 0x00000000 + +80004f94 : +80004f94: 01000393 addi x7,x0,16 +80004f98: 00075c63 bge x14,x0,80004fb0 + +80004f9c : +80004f9c: 00171413 slli x8,x14,0x1 +80004fa0: ff240413 addi x8,x8,-14 +80004fa4: 00045663 bge x8,x0,80004fb0 +80004fa8: 00c00393 addi x7,x0,12 +80004fac: 0040006f jal x0,80004fb0 + +80004fb0 : +80004fb0: d6810113 addi x2,x2,-664 +80004fb4: 4b012303 lw x6,1200(x2) +80004fb8: 007304b3 add x9,x6,x7 +80004fbc: 4a912823 sw x9,1200(x2) +80004fc0: 49012403 lw x8,1168(x2) +80004fc4: 40830333 sub x6,x6,x8 +80004fc8: 29810113 addi x2,x2,664 +80004fcc: 1f812403 lw x8,504(x2) +80004fd0: 00830333 add x6,x6,x8 +80004fd4: 34102473 csrrs x8,mepc,x0 +80004fd8: 00000013 addi x0,x0,0 +80004fdc: 00000013 addi x0,x0,0 +80004fe0: 0000b497 auipc x9,0xb +80004fe4: 4c848493 addi x9,x9,1224 # 800104a8 +80004fe8: 00000013 addi x0,x0,0 +80004fec: 00000013 addi x0,x0,0 +80004ff0: 00000013 addi x0,x0,0 +80004ff4: 00000013 addi x0,x0,0 +80004ff8: 00000013 addi x0,x0,0 +80004ffc: 00000013 addi x0,x0,0 +80005000: 0084a023 sw x8,0(x9) +80005004: 00e4a423 sw x14,8(x9) +80005008: 34302473 csrrs x8,mtval,x0 +8000500c: 0084a823 sw x8,16(x9) +80005010: 30002473 csrrs x8,mstatus,x0 +80005014: 0084ac23 sw x8,24(x9) +80005018: 00000013 addi x0,x0,0 +8000501c: 00000013 addi x0,x0,0 +80005020: 0001c417 auipc x8,0x1c +80005024: 14c40413 addi x8,x8,332 # 8002116c +80005028: 00000013 addi x0,x0,0 +8000502c: 00000013 addi x0,x0,0 +80005030: 00000013 addi x0,x0,0 +80005034: 00000013 addi x0,x0,0 +80005038: 00000013 addi x0,x0,0 +8000503c: 00000013 addi x0,x0,0 +80005040: 007304b3 add x9,x6,x7 +80005044: f2946663 bltu x8,x9,80004770 + +80005048 : +80005048: 24012403 lw x8,576(x2) +8000504c: 408787b3 sub x15,x15,x8 +80005050: 00179493 slli x9,x15,0x1 +80005054: 009787b3 add x15,x15,x9 +80005058: 0057d793 srli x15,x15,0x5 +8000505c: 00679793 slli x15,x15,0x6 +80005060: 0077e7b3 or x15,x15,x7 +80005064: 00378793 addi x15,x15,3 +80005068: 02075a63 bge x14,x0,8000509c +8000506c: 00f00413 addi x8,x0,15 +80005070: 00877433 and x8,x14,x8 +80005074: 304024f3 csrrs x9,mie,x0 +80005078: 0084d4b3 srl x9,x9,x8 +8000507c: 0014f493 andi x9,x9,1 +80005080: 00b49493 slli x9,x9,0xb +80005084: 0097e7b3 or x15,x15,x9 +80005088: 344024f3 csrrs x9,mip,x0 +8000508c: 0084d4b3 srl x9,x9,x8 +80005090: 0014f493 andi x9,x9,1 +80005094: 00c49493 slli x9,x9,0xc +80005098: 0097e7b3 or x15,x15,x9 +8000509c: 300023f3 csrrs x7,mstatus,x0 +800050a0: 00f39393 slli x7,x7,0xf +800050a4: 0023d393 srli x7,x7,0x2 +800050a8: 0021a437 lui x8,0x21a +800050ac: fe540413 addi x8,x8,-27 # 219fe5 +800050b0: fff44413 xori x8,x8,-1 +800050b4: 0083f433 and x8,x7,x8 +800050b8: 0087e433 or x8,x15,x8 +800050bc: 310024f3 csrrs x9,0x310,x0 +800050c0: 1c04f493 andi x9,x9,448 +800050c4: 00849493 slli x9,x9,0x8 +800050c8: 00946433 or x8,x8,x9 +800050cc: 00032483 lw x9,0(x6) +800050d0: 00848e63 beq x9,x8,800050ec +800050d4: 00040313 addi x6,x8,0 +800050d8: 00048213 addi x4,x9,0 +800050dc: 48c003ef jal x7,80005568 +800050e0: 80005048 .word 0x80005048 +800050e4: 80010bf0 .word 0x80010bf0 +800050e8: 00000341 .word 0x00000341 + +800050ec : +800050ec: 00070413 addi x8,x14,0 +800050f0: 00432483 lw x9,4(x6) +800050f4: 00848e63 beq x9,x8,80005110 +800050f8: 00040313 addi x6,x8,0 +800050fc: 00048213 addi x4,x9,0 +80005100: 468003ef jal x7,80005568 +80005104: 800050ec .word 0x800050ec +80005108: 80010cf2 .word 0x80010cf2 +8000510c: 00000341 .word 0x00000341 +80005110: 10074863 blt x14,x0,80005220 + +80005114 : +80005114: 34102473 csrrs x8,mepc,x0 +80005118: 00010493 addi x9,x2,0 +8000511c: 0040006f jal x0,80005120 + +80005120 : +80005120: 08000393 addi x7,x0,128 +80005124: 04740863 beq x8,x7,80005174 +80005128: 00238393 addi x7,x7,2 +8000512c: 04740463 beq x8,x7,80005174 +80005130: 04040263 beq x8,x0,80005174 +80005134: 2084a383 lw x7,520(x9) +80005138: 2104a783 lw x15,528(x9) +8000513c: 007787b3 add x15,x15,x7 +80005140: 00f47463 bgeu x8,x15,80005148 +80005144: 02747663 bgeu x8,x7,80005170 + +80005148 : +80005148: 1d84a383 lw x7,472(x9) +8000514c: 1e04a783 lw x15,480(x9) +80005150: 007787b3 add x15,x15,x7 +80005154: 00f47463 bgeu x8,x15,8000515c +80005158: 00747c63 bgeu x8,x7,80005170 + +8000515c : +8000515c: 1e84a383 lw x7,488(x9) +80005160: 1f04a783 lw x15,496(x9) +80005164: 007787b3 add x15,x15,x7 +80005168: e2f47e63 bgeu x8,x15,800047a4 +8000516c: e2746c63 bltu x8,x7,800047a4 + +80005170 : +80005170: 40740433 sub x8,x8,x7 + +80005174 : +80005174: 00832483 lw x9,8(x6) +80005178: 00848e63 beq x9,x8,80005194 +8000517c: 00040313 addi x6,x8,0 +80005180: 00048213 addi x4,x9,0 +80005184: 3e4003ef jal x7,80005568 +80005188: 80005174 .word 0x80005174 +8000518c: 80010ded .word 0x80010ded +80005190: 00000341 .word 0x00000341 + +80005194 : +80005194: 34102473 csrrs x8,mepc,x0 +80005198: 342023f3 csrrs x7,mcause,x0 +8000519c: 00c00793 addi x15,x0,12 +800051a0: 00f38a63 beq x7,x15,800051b4 +800051a4: 00100793 addi x15,x0,1 +800051a8: 00f38663 beq x7,x15,800051b4 +800051ac: 01400793 addi x15,x0,20 +800051b0: 00f39663 bne x7,x15,800051bc +800051b4: 34109073 csrrw x0,mepc,x1 +800051b8: 0100006f jal x0,800051c8 + +800051bc : +800051bc: 00400393 addi x7,x0,4 +800051c0: 00740433 add x8,x8,x7 +800051c4: 34141073 csrrw x0,mepc,x8 + +800051c8 : +800051c8: 34302473 csrrs x8,mtval,x0 + +800051cc : +800051cc: 00c32483 lw x9,12(x6) +800051d0: 00848e63 beq x9,x8,800051ec +800051d4: 00040313 addi x6,x8,0 +800051d8: 00048213 addi x4,x9,0 +800051dc: 38c003ef jal x7,80005568 +800051e0: 800051cc .word 0x800051cc +800051e4: 80010ee0 .word 0x80010ee0 +800051e8: 00000341 .word 0x00000341 + +800051ec : +800051ec: 30102473 csrrs x8,misa,x0 +800051f0: 01841413 slli x8,x8,0x18 +800051f4: 00045263 bge x8,x0,800051f8 + +800051f8 : +800051f8: 10000393 addi x7,x0,256 +800051fc: 05c0006f jal x0,80005258 + +80005200 : +80005200: 25c12303 lw x6,604(x2) +80005204: 26012383 lw x7,608(x2) +80005208: 26412403 lw x8,612(x2) +8000520c: 26812483 lw x9,616(x2) +80005210: 26c12703 lw x14,620(x2) +80005214: 27012783 lw x15,624(x2) +80005218: 27412103 lw x2,628(x2) +8000521c: 30200073 mret + +80005220 : +80005220: 00100413 addi x8,x0,1 +80005224: 01f77393 andi x7,x14,31 +80005228: 00741433 sll x8,x8,x7 +8000522c: 304434f3 csrrc x9,mie,x8 +80005230: 34443473 csrrc x8,mip,x8 + +80005234 : +80005234: 00832483 lw x9,8(x6) +80005238: 00848e63 beq x9,x8,80005254 +8000523c: 00040313 addi x6,x8,0 +80005240: 00048213 addi x4,x9,0 +80005244: 324003ef jal x7,80005568 +80005248: 80005234 .word 0x80005234 +8000524c: 80011053 .word 0x80011053 +80005250: 00000341 .word 0x00000341 +80005254: 00000393 addi x7,x0,0 + +80005258 : +80005258: 00000417 auipc x8,0x0 +8000525c: 03c40413 addi x8,x8,60 # 80005294 +80005260: 00740433 add x8,x8,x7 +80005264: 00371393 slli x7,x14,0x3 +80005268: 00740433 add x8,x8,x7 +8000526c: ff847413 andi x8,x8,-8 +80005270: 00042403 lw x8,0(x8) + +80005274 : +80005274: 00040a63 beq x8,x0,80005288 +80005278: 01f41393 slli x7,x8,0x1f +8000527c: 0003d863 bge x7,x0,8000528c +80005280: 00145413 srli x8,x8,0x1 +80005284: f6870ee3 beq x14,x8,80005200 +80005288: d1cff06f jal x0,800047a4 + +8000528c : +8000528c: 00040067 jalr x0,0(x8) + +80005290 : + ... +80005298: 00000001 .word 0x00000001 +8000529c: 00000000 .word 0x00000000 +800052a0: 00000001 .word 0x00000001 +800052a4: 00000000 .word 0x00000000 +800052a8: 80022000 .word 0x80022000 + ... +800052b8: 00000001 .word 0x00000001 +800052bc: 00000000 .word 0x00000000 +800052c0: 00000001 .word 0x00000001 +800052c4: 00000000 .word 0x00000000 +800052c8: 80022014 .word 0x80022014 + ... +800052d8: 00000001 .word 0x00000001 +800052dc: 00000000 .word 0x00000000 +800052e0: 00000001 .word 0x00000001 +800052e4: 00000000 .word 0x00000000 +800052e8: 80022030 .word 0x80022030 +800052ec: 00000000 .word 0x00000000 +800052f0: 00000001 .word 0x00000001 +800052f4: 00000000 .word 0x00000000 +800052f8: 00000001 .word 0x00000001 +800052fc: 00000000 .word 0x00000000 +80005300: 00000001 .word 0x00000001 +80005304: 00000000 .word 0x00000000 +80005308: 00000001 .word 0x00000001 +8000530c: 00000000 .word 0x00000000 +80005310: 00000001 .word 0x00000001 +80005314: 00000000 .word 0x00000000 +80005318: 00000001 .word 0x00000001 +8000531c: 00000000 .word 0x00000000 +80005320: 00000001 .word 0x00000001 +80005324: 00000000 .word 0x00000000 +80005328: 00000001 .word 0x00000001 +8000532c: 00000000 .word 0x00000000 +80005330: 00000001 .word 0x00000001 +80005334: 00000000 .word 0x00000000 +80005338: 00000001 .word 0x00000001 +8000533c: 00000000 .word 0x00000000 +80005340: 00000001 .word 0x00000001 +80005344: 00000000 .word 0x00000000 +80005348: 00000001 .word 0x00000001 + ... + +80005390 : +80005390: 00000001 .word 0x00000001 +80005394: 00000000 .word 0x00000000 +80005398: 00000003 .word 0x00000003 +8000539c: 00000000 .word 0x00000000 +800053a0: 00000005 .word 0x00000005 +800053a4: 00000000 .word 0x00000000 +800053a8: 00000007 .word 0x00000007 +800053ac: 00000000 .word 0x00000000 +800053b0: 00000009 .word 0x00000009 +800053b4: 00000000 .word 0x00000000 +800053b8: 0000000b .word 0x0000000b +800053bc: 00000000 .word 0x00000000 +800053c0: 0000000d .word 0x0000000d +800053c4: 00000000 .word 0x00000000 +800053c8: 0000000f .word 0x0000000f +800053cc: 00000000 .word 0x00000000 +800053d0: 00000011 .word 0x00000011 +800053d4: 00000000 .word 0x00000000 +800053d8: 00000013 .word 0x00000013 +800053dc: 00000000 .word 0x00000000 +800053e0: 00000015 .word 0x00000015 +800053e4: 00000000 .word 0x00000000 +800053e8: 00000017 .word 0x00000017 +800053ec: 00000000 .word 0x00000000 +800053f0: 00000019 .word 0x00000019 +800053f4: 00000000 .word 0x00000000 +800053f8: 0000001b .word 0x0000001b +800053fc: 00000000 .word 0x00000000 +80005400: 0000001d .word 0x0000001d +80005404: 00000000 .word 0x00000000 +80005408: 0000001f .word 0x0000001f +8000540c: 00000000 .word 0x00000000 +80005410: 00000021 .word 0x00000021 +80005414: 00000000 .word 0x00000000 +80005418: 00000023 .word 0x00000023 +8000541c: 00000000 .word 0x00000000 +80005420: 00000025 .word 0x00000025 +80005424: 00000000 .word 0x00000000 +80005428: 00000027 .word 0x00000027 +8000542c: 00000000 .word 0x00000000 +80005430: 00000029 .word 0x00000029 +80005434: 00000000 .word 0x00000000 +80005438: 0000002b .word 0x0000002b +8000543c: 00000000 .word 0x00000000 +80005440: 0000002d .word 0x0000002d +80005444: 00000000 .word 0x00000000 +80005448: 0000002f .word 0x0000002f + ... + +80005490 : +80005490: 300023f3 csrrs x7,mstatus,x0 +80005494: 00b3d493 srli x9,x7,0xb +80005498: 0034f493 andi x9,x9,3 +8000549c: ffd48413 addi x8,x9,-3 +800054a0: 341023f3 csrrs x7,mepc,x0 +800054a4: 00000493 addi x9,x0,0 +800054a8: 02040c63 beq x8,x0,800054e0 +800054ac: 29810113 addi x2,x2,664 +800054b0: 310023f3 csrrs x7,0x310,x0 +800054b4: 01839393 slli x7,x7,0x18 +800054b8: 0003da63 bge x7,x0,800054cc + +800054bc : +800054bc: 29810113 addi x2,x2,664 +800054c0: 47012783 lw x15,1136(x2) +800054c4: d6810113 addi x2,x2,-664 +800054c8: 0080006f jal x0,800054d0 + +800054cc : +800054cc: f4012783 lw x15,-192(x2) +800054d0: 341023f3 csrrs x7,mepc,x0 +800054d4: 40f383b3 sub x7,x7,x15 +800054d8: d6810113 addi x2,x2,-664 +800054dc: 1d812483 lw x9,472(x2) + +800054e0 : +800054e0: 007483b3 add x7,x9,x7 +800054e4: 25c12303 lw x6,604(x2) +800054e8: 26412403 lw x8,612(x2) +800054ec: 26812483 lw x9,616(x2) +800054f0: 26c12703 lw x14,620(x2) +800054f4: 27012783 lw x15,624(x2) +800054f8: 27412103 lw x2,628(x2) +800054fc: 00438067 jalr x0,4(x7) + +80005500 : +80005500: 0000b217 auipc x4,0xb +80005504: e6020213 addi x4,x4,-416 # 80010360 +80005508: 02522423 sw x5,40(x4) # 28 +8000550c: 00122423 sw x1,8(x4) # 8 +80005510: 00022023 sw x0,0(x4) # 0 +80005514: 0880006f jal x0,8000559c + +80005518 : +80005518: 0000b397 auipc x7,0xb +8000551c: e4838393 addi x7,x7,-440 # 80010360 +80005520: 0483a023 sw x8,64(x7) +80005524: 0243a023 sw x4,32(x7) +80005528: 0253a423 sw x5,40(x7) +8000552c: 0013a423 sw x1,8(x7) +80005530: 0003a023 sw x0,0(x7) +80005534: 00038213 addi x4,x7,0 +80005538: 00040293 addi x5,x8,0 +8000553c: 0600006f jal x0,8000559c + +80005540 : +80005540: 0000b697 auipc x13,0xb +80005544: e2068693 addi x13,x13,-480 # 80010360 +80005548: 06e6a823 sw x14,112(x13) +8000554c: 0246a023 sw x4,32(x13) +80005550: 0256a423 sw x5,40(x13) +80005554: 0016a423 sw x1,8(x13) +80005558: 0006a023 sw x0,0(x13) +8000555c: 00068213 addi x4,x13,0 +80005560: 00070293 addi x5,x14,0 +80005564: 0380006f jal x0,8000559c + +80005568 : +80005568: 0000b497 auipc x9,0xb +8000556c: df848493 addi x9,x9,-520 # 80010360 +80005570: 0674a423 sw x7,104(x9) +80005574: 0244a023 sw x4,32(x9) +80005578: 0254a423 sw x5,40(x9) +8000557c: 0014a423 sw x1,8(x9) +80005580: 00300093 addi x1,x0,3 +80005584: 0014a023 sw x1,0(x9) +80005588: 1064a823 sw x6,272(x9) +8000558c: 1044ac23 sw x4,280(x9) +80005590: 00048213 addi x4,x9,0 +80005594: 00038293 addi x5,x7,0 +80005598: 0040006f jal x0,8000559c + +8000559c : +8000559c: 00222823 sw x2,16(x4) # 10 +800055a0: 00322c23 sw x3,24(x4) # 18 +800055a4: 02622823 sw x6,48(x4) # 30 +800055a8: 02722c23 sw x7,56(x4) # 38 +800055ac: 04822023 sw x8,64(x4) # 40 +800055b0: 04922423 sw x9,72(x4) # 48 +800055b4: 04a22823 sw x10,80(x4) # 50 +800055b8: 04b22c23 sw x11,88(x4) # 58 +800055bc: 06c22023 sw x12,96(x4) # 60 +800055c0: 06d22423 sw x13,104(x4) # 68 +800055c4: 06e22823 sw x14,112(x4) # 70 +800055c8: 06f22c23 sw x15,120(x4) # 78 +800055cc: 09022023 sw x16,128(x4) # 80 +800055d0: 09122423 sw x17,136(x4) # 88 +800055d4: 09222823 sw x18,144(x4) # 90 +800055d8: 09322c23 sw x19,152(x4) # 98 +800055dc: 0b422023 sw x20,160(x4) # a0 +800055e0: 0b522423 sw x21,168(x4) # a8 +800055e4: 0b622823 sw x22,176(x4) # b0 +800055e8: 0b722c23 sw x23,184(x4) # b8 +800055ec: 0d822023 sw x24,192(x4) # c0 +800055f0: 0d922423 sw x25,200(x4) # c8 +800055f4: 0da22823 sw x26,208(x4) # d0 +800055f8: 0db22c23 sw x27,216(x4) # d8 +800055fc: 0fc22023 sw x28,224(x4) # e0 +80005600: 0fd22423 sw x29,232(x4) # e8 +80005604: 0fe22823 sw x30,240(x4) # f0 +80005608: 0ff22c23 sw x31,248(x4) # f8 + +8000560c : +8000560c: 0000b497 auipc x9,0xb +80005610: d544a483 lw x9,-684(x9) # 80010360 +80005614: 00300513 addi x10,x0,3 +80005618: 18a48a63 beq x9,x10,800057ac + +8000561c : +8000561c: ffa2d303 lhu x6,-6(x5) +80005620: ff82d383 lhu x7,-8(x5) +80005624: 01031313 slli x6,x6,0x10 +80005628: 00736333 or x6,x6,x7 +8000562c: 00f35393 srli x7,x6,0xf +80005630: 01f3f393 andi x7,x7,31 +80005634: 01435413 srli x8,x6,0x14 +80005638: 01f47413 andi x8,x8,31 +8000563c: 10822223 sw x8,260(x4) # 104 +80005640: 00341313 slli x6,x8,0x3 +80005644: 00620333 add x6,x4,x6 +80005648: 00032303 lw x6,0(x6) +8000564c: 10622823 sw x6,272(x4) # 110 +80005650: ff62d303 lhu x6,-10(x5) +80005654: ff42d383 lhu x7,-12(x5) +80005658: 01031313 slli x6,x6,0x10 +8000565c: 00736333 or x6,x6,x7 +80005660: 00030513 addi x10,x6,0 +80005664: 07f37413 andi x8,x6,127 +80005668: 00300493 addi x9,x0,3 +8000566c: 0c941463 bne x8,x9,80005734 +80005670: 00c35413 srli x8,x6,0xc +80005674: 00747413 andi x8,x8,7 +80005678: 00200493 addi x9,x0,2 +8000567c: 0a941c63 bne x8,x9,80005734 +80005680: 41435393 srai x7,x6,0x14 +80005684: 00f35313 srli x6,x6,0xf +80005688: 01f37313 andi x6,x6,31 +8000568c: 00331313 slli x6,x6,0x3 +80005690: 00620333 add x6,x4,x6 +80005694: 00032303 lw x6,0(x6) +80005698: 00730333 add x6,x6,x7 +8000569c: 00337413 andi x8,x6,3 +800056a0: 0c041663 bne x8,x0,8000576c +800056a4: 00000013 addi x0,x0,0 +800056a8: 00000013 addi x0,x0,0 +800056ac: 00000013 addi x0,x0,0 +800056b0: 00000013 addi x0,x0,0 +800056b4: 00000013 addi x0,x0,0 +800056b8: 00000013 addi x0,x0,0 +800056bc: 00000013 addi x0,x0,0 +800056c0: 0000d417 auipc x8,0xd +800056c4: 9f040413 addi x8,x8,-1552 # 800120b0 +800056c8: 00000013 addi x0,x0,0 +800056cc: 00000013 addi x0,x0,0 +800056d0: 00000013 addi x0,x0,0 +800056d4: 00000013 addi x0,x0,0 +800056d8: 00000013 addi x0,x0,0 +800056dc: 00000013 addi x0,x0,0 +800056e0: 08836663 bltu x6,x8,8000576c +800056e4: 00000013 addi x0,x0,0 +800056e8: 00000013 addi x0,x0,0 +800056ec: 00000013 addi x0,x0,0 +800056f0: 00000013 addi x0,x0,0 +800056f4: 00000013 addi x0,x0,0 +800056f8: 00000013 addi x0,x0,0 +800056fc: 00000013 addi x0,x0,0 +80005700: 0001c417 auipc x8,0x1c +80005704: a7040413 addi x8,x8,-1424 # 80021170 +80005708: 00000013 addi x0,x0,0 +8000570c: 00000013 addi x0,x0,0 +80005710: 00000013 addi x0,x0,0 +80005714: 00000013 addi x0,x0,0 +80005718: 00000013 addi x0,x0,0 +8000571c: 00000013 addi x0,x0,0 +80005720: ffc40413 addi x8,x8,-4 +80005724: 04646463 bltu x8,x6,8000576c +80005728: 00032303 lw x6,0(x6) +8000572c: 10622c23 sw x6,280(x4) # 118 +80005730: 3700006f jal x0,80005aa0 + +80005734 : +80005734: 00100413 addi x8,x0,1 +80005738: 00000013 addi x0,x0,0 +8000573c: 00000013 addi x0,x0,0 +80005740: 0000b497 auipc x9,0xb +80005744: d4848493 addi x9,x9,-696 # 80010488 +80005748: 00000013 addi x0,x0,0 +8000574c: 00000013 addi x0,x0,0 +80005750: 00000013 addi x0,x0,0 +80005754: 00000013 addi x0,x0,0 +80005758: 00000013 addi x0,x0,0 +8000575c: 00000013 addi x0,x0,0 +80005760: 0084a023 sw x8,0(x9) +80005764: 10a22c23 sw x10,280(x4) # 118 +80005768: 3380006f jal x0,80005aa0 + +8000576c : +8000576c: 00200413 addi x8,x0,2 +80005770: 00000013 addi x0,x0,0 +80005774: 00000013 addi x0,x0,0 +80005778: 00000013 addi x0,x0,0 +8000577c: 00000013 addi x0,x0,0 +80005780: 0000b497 auipc x9,0xb +80005784: d0848493 addi x9,x9,-760 # 80010488 +80005788: 00000013 addi x0,x0,0 +8000578c: 00000013 addi x0,x0,0 +80005790: 00000013 addi x0,x0,0 +80005794: 00000013 addi x0,x0,0 +80005798: 00000013 addi x0,x0,0 +8000579c: 00000013 addi x0,x0,0 +800057a0: 0084a023 sw x8,0(x9) +800057a4: 10622c23 sw x6,280(x4) # 118 +800057a8: 2f80006f jal x0,80005aa0 + +800057ac : +800057ac: 0042a303 lw x6,4(x5) +800057b0: 0000b817 auipc x16,0xb +800057b4: ce880813 addi x16,x16,-792 # 80010498 +800057b8: 00682023 sw x6,0(x16) +800057bc: 0002a303 lw x6,0(x5) +800057c0: 10622423 sw x6,264(x4) # 108 +800057c4: 0000b817 auipc x16,0xb +800057c8: cd480813 addi x16,x16,-812 # 80010498 +800057cc: 00082303 lw x6,0(x16) +800057d0: 0000b397 auipc x7,0xb +800057d4: 40938393 addi x7,x7,1033 # 80010bd9 +800057d8: 28730463 beq x6,x7,80005a60 +800057dc: 00000413 addi x8,x0,0 +800057e0: 0000b817 auipc x16,0xb +800057e4: cb080813 addi x16,x16,-848 # 80010490 +800057e8: 00882023 sw x8,0(x16) +800057ec: 0000b397 auipc x7,0xb +800057f0: 40438393 addi x7,x7,1028 # 80010bf0 +800057f4: 00731863 bne x6,x7,80005804 +800057f8: 00100413 addi x8,x0,1 +800057fc: 00000493 addi x9,x0,0 +80005800: 2740006f jal x0,80005a74 +80005804: 0000b397 auipc x7,0xb +80005808: 4ee38393 addi x7,x7,1262 # 80010cf2 +8000580c: 00731863 bne x6,x7,8000581c +80005810: 00200413 addi x8,x0,2 +80005814: 00000493 addi x9,x0,0 +80005818: 25c0006f jal x0,80005a74 +8000581c: 0000b397 auipc x7,0xb +80005820: 5d138393 addi x7,x7,1489 # 80010ded +80005824: 00731863 bne x6,x7,80005834 +80005828: 00300413 addi x8,x0,3 +8000582c: 00000493 addi x9,x0,0 +80005830: 2440006f jal x0,80005a74 +80005834: 0000b397 auipc x7,0xb +80005838: 6ac38393 addi x7,x7,1708 # 80010ee0 +8000583c: 00731863 bne x6,x7,8000584c +80005840: 00400413 addi x8,x0,4 +80005844: 00000493 addi x9,x0,0 +80005848: 22c0006f jal x0,80005a74 +8000584c: 0000c397 auipc x7,0xc +80005850: 80738393 addi x7,x7,-2041 # 80011053 +80005854: 00731863 bne x6,x7,80005864 +80005858: 00500413 addi x8,x0,5 +8000585c: 00000493 addi x9,x0,0 +80005860: 2140006f jal x0,80005a74 +80005864: 0000b397 auipc x7,0xb +80005868: 77338393 addi x7,x7,1907 # 80010fd7 +8000586c: 00731863 bne x6,x7,8000587c +80005870: 00600413 addi x8,x0,6 +80005874: 00000493 addi x9,x0,0 +80005878: 1fc0006f jal x0,80005a74 +8000587c: 0000b397 auipc x7,0xb +80005880: 79938393 addi x7,x7,1945 # 80011015 +80005884: 00731863 bne x6,x7,80005894 +80005888: 00700413 addi x8,x0,7 +8000588c: 00000493 addi x9,x0,0 +80005890: 1e40006f jal x0,80005a74 +80005894: 0000b397 auipc x7,0xb +80005898: 39c38393 addi x7,x7,924 # 80010c30 +8000589c: 00731863 bne x6,x7,800058ac +800058a0: 00100413 addi x8,x0,1 +800058a4: 00100493 addi x9,x0,1 +800058a8: 1cc0006f jal x0,80005a74 +800058ac: 0000b397 auipc x7,0xb +800058b0: 48438393 addi x7,x7,1156 # 80010d30 +800058b4: 00731863 bne x6,x7,800058c4 +800058b8: 00200413 addi x8,x0,2 +800058bc: 00100493 addi x9,x0,1 +800058c0: 1b40006f jal x0,80005a74 +800058c4: 0000b397 auipc x7,0xb +800058c8: 56538393 addi x7,x7,1381 # 80010e29 +800058cc: 00731863 bne x6,x7,800058dc +800058d0: 00300413 addi x8,x0,3 +800058d4: 00100493 addi x9,x0,1 +800058d8: 19c0006f jal x0,80005a74 +800058dc: 0000b397 auipc x7,0xb +800058e0: 64138393 addi x7,x7,1601 # 80010f1d +800058e4: 00731863 bne x6,x7,800058f4 +800058e8: 00400413 addi x8,x0,4 +800058ec: 00100493 addi x9,x0,1 +800058f0: 1840006f jal x0,80005a74 +800058f4: 0000b397 auipc x7,0xb +800058f8: 79a38393 addi x7,x7,1946 # 8001108e +800058fc: 00731863 bne x6,x7,8000590c +80005900: 00500413 addi x8,x0,5 +80005904: 00100493 addi x9,x0,1 +80005908: 16c0006f jal x0,80005a74 +8000590c: 0000b397 auipc x7,0xb +80005910: 36438393 addi x7,x7,868 # 80010c70 +80005914: 00731863 bne x6,x7,80005924 +80005918: 00100413 addi x8,x0,1 +8000591c: 00200493 addi x9,x0,2 +80005920: 1540006f jal x0,80005a74 +80005924: 0000b397 auipc x7,0xb +80005928: 44a38393 addi x7,x7,1098 # 80010d6e +8000592c: 00731863 bne x6,x7,8000593c +80005930: 00200413 addi x8,x0,2 +80005934: 00200493 addi x9,x0,2 +80005938: 13c0006f jal x0,80005a74 +8000593c: 0000b397 auipc x7,0xb +80005940: 52938393 addi x7,x7,1321 # 80010e65 +80005944: 00731863 bne x6,x7,80005954 +80005948: 00300413 addi x8,x0,3 +8000594c: 00200493 addi x9,x0,2 +80005950: 1240006f jal x0,80005a74 +80005954: 0000b397 auipc x7,0xb +80005958: 60638393 addi x7,x7,1542 # 80010f5a +8000595c: 00731863 bne x6,x7,8000596c +80005960: 00400413 addi x8,x0,4 +80005964: 00200493 addi x9,x0,2 +80005968: 10c0006f jal x0,80005a74 +8000596c: 0000b397 auipc x7,0xb +80005970: 75d38393 addi x7,x7,1885 # 800110c9 +80005974: 00731863 bne x6,x7,80005984 +80005978: 00500413 addi x8,x0,5 +8000597c: 00200493 addi x9,x0,2 +80005980: 0f40006f jal x0,80005a74 +80005984: 0000b397 auipc x7,0xb +80005988: 32d38393 addi x7,x7,813 # 80010cb1 +8000598c: 00731863 bne x6,x7,8000599c +80005990: 00100413 addi x8,x0,1 +80005994: 00300493 addi x9,x0,3 +80005998: 0dc0006f jal x0,80005a74 +8000599c: 0000b397 auipc x7,0xb +800059a0: 41138393 addi x7,x7,1041 # 80010dad +800059a4: 00731863 bne x6,x7,800059b4 +800059a8: 00200413 addi x8,x0,2 +800059ac: 00300493 addi x9,x0,3 +800059b0: 0c40006f jal x0,80005a74 +800059b4: 0000b397 auipc x7,0xb +800059b8: 4ee38393 addi x7,x7,1262 # 80010ea2 +800059bc: 00731863 bne x6,x7,800059cc +800059c0: 00300413 addi x8,x0,3 +800059c4: 00300493 addi x9,x0,3 +800059c8: 0ac0006f jal x0,80005a74 +800059cc: 0000b397 auipc x7,0xb +800059d0: 5cc38393 addi x7,x7,1484 # 80010f98 +800059d4: 00731863 bne x6,x7,800059e4 +800059d8: 00400413 addi x8,x0,4 +800059dc: 00300493 addi x9,x0,3 +800059e0: 0940006f jal x0,80005a74 +800059e4: 0000b397 auipc x7,0xb +800059e8: 72138393 addi x7,x7,1825 # 80011105 +800059ec: 00731863 bne x6,x7,800059fc +800059f0: 00500413 addi x8,x0,5 +800059f4: 00300493 addi x9,x0,3 +800059f8: 07c0006f jal x0,80005a74 +800059fc: 0000b397 auipc x7,0xb +80005a00: 74638393 addi x7,x7,1862 # 80011142 +80005a04: 00731863 bne x6,x7,80005a14 +80005a08: 00800413 addi x8,x0,8 +80005a0c: 00000493 addi x9,x0,0 +80005a10: 0640006f jal x0,80005a74 +80005a14: 0000b397 auipc x7,0xb +80005a18: 77d38393 addi x7,x7,1917 # 80011191 +80005a1c: 00731863 bne x6,x7,80005a2c +80005a20: 00800413 addi x8,x0,8 +80005a24: 00000493 addi x9,x0,0 +80005a28: 04c0006f jal x0,80005a74 +80005a2c: 0000c397 auipc x7,0xc +80005a30: 86038393 addi x7,x7,-1952 # 8001128c +80005a34: 00731863 bne x6,x7,80005a44 +80005a38: 00800413 addi x8,x0,8 +80005a3c: 00100493 addi x9,x0,1 +80005a40: 0340006f jal x0,80005a74 +80005a44: 0000c397 auipc x7,0xc +80005a48: 94438393 addi x7,x7,-1724 # 80011388 +80005a4c: 00731863 bne x6,x7,80005a5c +80005a50: 00800413 addi x8,x0,8 +80005a54: 00200493 addi x9,x0,2 +80005a58: 01c0006f jal x0,80005a74 +80005a5c: 0340006f jal x0,80005a90 + +80005a60 : +80005a60: 00900413 addi x8,x0,9 +80005a64: 0000b817 auipc x16,0xb +80005a68: a2c80813 addi x16,x16,-1492 # 80010490 +80005a6c: 00882023 sw x8,0(x16) +80005a70: 0300006f jal x0,80005aa0 + +80005a74 : +80005a74: 0000b817 auipc x16,0xb +80005a78: a1c80813 addi x16,x16,-1508 # 80010490 +80005a7c: 00882023 sw x8,0(x16) +80005a80: 0000b817 auipc x16,0xb +80005a84: a1480813 addi x16,x16,-1516 # 80010494 +80005a88: 00982023 sw x9,0(x16) +80005a8c: 0140006f jal x0,80005aa0 + +80005a90 : +80005a90: 0000b817 auipc x16,0xb +80005a94: a0080813 addi x16,x16,-1536 # 80010490 +80005a98: 00082023 sw x0,0(x16) +80005a9c: 0040006f jal x0,80005aa0 + +80005aa0 : +80005aa0: 0002a303 lw x6,0(x5) +80005aa4: 10622423 sw x6,264(x4) # 108 +80005aa8: 00035383 lhu x7,0(x6) +80005aac: 0033f413 andi x8,x7,3 +80005ab0: 00300493 addi x9,x0,3 +80005ab4: 00941863 bne x8,x9,80005ac4 +80005ab8: 00235403 lhu x8,2(x6) +80005abc: 01041413 slli x8,x8,0x10 +80005ac0: 0083e3b3 or x7,x7,x8 +80005ac4: 10722023 sw x7,256(x4) # 100 +80005ac8: 0042a303 lw x6,4(x5) +80005acc: 12622023 sw x6,288(x4) # 120 + +80005ad0 : +80005ad0: 00000013 addi x0,x0,0 +80005ad4: 00000013 addi x0,x0,0 +80005ad8: 00000013 addi x0,x0,0 +80005adc: 00000013 addi x0,x0,0 +80005ae0: 0000b517 auipc x10,0xb +80005ae4: f0550513 addi x10,x10,-251 # 800109e5 +80005ae8: 00000013 addi x0,x0,0 +80005aec: 00000013 addi x0,x0,0 +80005af0: 00000013 addi x0,x0,0 +80005af4: 00000013 addi x0,x0,0 +80005af8: 00000013 addi x0,x0,0 +80005afc: 00000013 addi x0,x0,0 +80005b00: 0001d097 auipc x1,0x1d +80005b04: a64080e7 jalr x1,-1436(x1) # 80022564 +80005b08: 00000013 addi x0,x0,0 +80005b0c: 00000013 addi x0,x0,0 +80005b10: 00000013 addi x0,x0,0 +80005b14: 00000013 addi x0,x0,0 +80005b18: 00000013 addi x0,x0,0 +80005b1c: 00000013 addi x0,x0,0 +80005b20: 0000b517 auipc x10,0xb +80005b24: f0550513 addi x10,x10,-251 # 80010a25 +80005b28: 00000013 addi x0,x0,0 +80005b2c: 00000013 addi x0,x0,0 +80005b30: 00000013 addi x0,x0,0 +80005b34: 00000013 addi x0,x0,0 +80005b38: 00000013 addi x0,x0,0 +80005b3c: 00000013 addi x0,x0,0 +80005b40: 0001d097 auipc x1,0x1d +80005b44: a24080e7 jalr x1,-1500(x1) # 80022564 + +80005b48 : +80005b48: 00000013 addi x0,x0,0 +80005b4c: 00000013 addi x0,x0,0 +80005b50: 00000013 addi x0,x0,0 +80005b54: 00000013 addi x0,x0,0 +80005b58: 00000013 addi x0,x0,0 +80005b5c: 00000013 addi x0,x0,0 +80005b60: 0000b517 auipc x10,0xb +80005b64: f7c50513 addi x10,x10,-132 # 80010adc +80005b68: 00000013 addi x0,x0,0 +80005b6c: 00000013 addi x0,x0,0 +80005b70: 00000013 addi x0,x0,0 +80005b74: 00000013 addi x0,x0,0 +80005b78: 00000013 addi x0,x0,0 +80005b7c: 00000013 addi x0,x0,0 +80005b80: 0001d097 auipc x1,0x1d +80005b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 + +80005b88 : +80005b88: 0000b517 auipc x10,0xb +80005b8c: 8f852503 lw x10,-1800(x10) # 80010480 +80005b90: 0001d097 auipc x1,0x1d +80005b94: 9d4080e7 jalr x1,-1580(x1) # 80022564 + +80005b98 : +80005b98: 00000013 addi x0,x0,0 +80005b9c: 00000013 addi x0,x0,0 +80005ba0: 0000b517 auipc x10,0xb +80005ba4: f4e50513 addi x10,x10,-178 # 80010aee +80005ba8: 00000013 addi x0,x0,0 +80005bac: 00000013 addi x0,x0,0 +80005bb0: 00000013 addi x0,x0,0 +80005bb4: 00000013 addi x0,x0,0 +80005bb8: 00000013 addi x0,x0,0 +80005bbc: 00000013 addi x0,x0,0 +80005bc0: 0001d097 auipc x1,0x1d +80005bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80005bc8: 0000a517 auipc x10,0xa +80005bcc: 79852503 lw x10,1944(x10) # 80010360 +80005bd0: 00300593 addi x11,x0,3 +80005bd4: 52b50c63 beq x10,x11,8000610c +80005bd8: 00000013 addi x0,x0,0 +80005bdc: 00000013 addi x0,x0,0 +80005be0: 0000b517 auipc x10,0xb +80005be4: f1050513 addi x10,x10,-240 # 80010af0 +80005be8: 00000013 addi x0,x0,0 +80005bec: 00000013 addi x0,x0,0 +80005bf0: 00000013 addi x0,x0,0 +80005bf4: 00000013 addi x0,x0,0 +80005bf8: 00000013 addi x0,x0,0 +80005bfc: 00000013 addi x0,x0,0 +80005c00: 0001d097 auipc x1,0x1d +80005c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80005c08: 0000b517 auipc x10,0xb +80005c0c: 85852503 lw x10,-1960(x10) # 80010460 +80005c10: 02000593 addi x11,x0,32 +80005c14: 00357613 andi x12,x10,3 +80005c18: 00300693 addi x13,x0,3 +80005c1c: 00d60463 beq x12,x13,80005c24 +80005c20: 01000593 addi x11,x0,16 +80005c24: 3f4010ef jal x1,80007018 +80005c28: 00000013 addi x0,x0,0 +80005c2c: 00000013 addi x0,x0,0 +80005c30: 00000013 addi x0,x0,0 +80005c34: 00000013 addi x0,x0,0 +80005c38: 00000013 addi x0,x0,0 +80005c3c: 00000013 addi x0,x0,0 +80005c40: 0000b517 auipc x10,0xb +80005c44: 88850513 addi x10,x10,-1912 # 800104c8 +80005c48: 00000013 addi x0,x0,0 +80005c4c: 00000013 addi x0,x0,0 +80005c50: 00000013 addi x0,x0,0 +80005c54: 00000013 addi x0,x0,0 +80005c58: 00000013 addi x0,x0,0 +80005c5c: 00000013 addi x0,x0,0 +80005c60: 0001d097 auipc x1,0x1d +80005c64: 904080e7 jalr x1,-1788(x1) # 80022564 +80005c68: 00000013 addi x0,x0,0 +80005c6c: 00000013 addi x0,x0,0 +80005c70: 00000013 addi x0,x0,0 +80005c74: 00000013 addi x0,x0,0 +80005c78: 00000013 addi x0,x0,0 +80005c7c: 00000013 addi x0,x0,0 +80005c80: 0000b517 auipc x10,0xb +80005c84: e8450513 addi x10,x10,-380 # 80010b04 +80005c88: 00000013 addi x0,x0,0 +80005c8c: 00000013 addi x0,x0,0 +80005c90: 00000013 addi x0,x0,0 +80005c94: 00000013 addi x0,x0,0 +80005c98: 00000013 addi x0,x0,0 +80005c9c: 00000013 addi x0,x0,0 +80005ca0: 0001d097 auipc x1,0x1d +80005ca4: 8c4080e7 jalr x1,-1852(x1) # 80022564 +80005ca8: 0000a517 auipc x10,0xa +80005cac: 7c052503 lw x10,1984(x10) # 80010468 +80005cb0: 02000593 addi x11,x0,32 +80005cb4: 364010ef jal x1,80007018 +80005cb8: 00000013 addi x0,x0,0 +80005cbc: 00000013 addi x0,x0,0 +80005cc0: 0000b517 auipc x10,0xb +80005cc4: 80850513 addi x10,x10,-2040 # 800104c8 +80005cc8: 00000013 addi x0,x0,0 +80005ccc: 00000013 addi x0,x0,0 +80005cd0: 00000013 addi x0,x0,0 +80005cd4: 00000013 addi x0,x0,0 +80005cd8: 00000013 addi x0,x0,0 +80005cdc: 00000013 addi x0,x0,0 +80005ce0: 0001d097 auipc x1,0x1d +80005ce4: 884080e7 jalr x1,-1916(x1) # 80022564 +80005ce8: 00000013 addi x0,x0,0 +80005cec: 00000013 addi x0,x0,0 +80005cf0: 00000013 addi x0,x0,0 +80005cf4: 00000013 addi x0,x0,0 +80005cf8: 00000013 addi x0,x0,0 +80005cfc: 00000013 addi x0,x0,0 +80005d00: 0000c517 auipc x10,0xc +80005d04: 83b50513 addi x10,x10,-1989 # 8001153b +80005d08: 00000013 addi x0,x0,0 +80005d0c: 00000013 addi x0,x0,0 +80005d10: 00000013 addi x0,x0,0 +80005d14: 00000013 addi x0,x0,0 +80005d18: 00000013 addi x0,x0,0 +80005d1c: 00000013 addi x0,x0,0 +80005d20: 0001d097 auipc x1,0x1d +80005d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80005d28: 0000a517 auipc x10,0xa +80005d2c: 63852503 lw x10,1592(x10) # 80010360 +80005d30: 00050663 beq x10,x0,80005d3c +80005d34: 00300593 addi x11,x0,3 +80005d38: 04b51063 bne x10,x11,80005d78 +80005d3c: 07800593 addi x11,x0,120 +80005d40: 0000a617 auipc x12,0xa +80005d44: 78860613 addi x12,x12,1928 # 800104c8 +80005d48: 00000013 addi x0,x0,0 +80005d4c: 00000013 addi x0,x0,0 +80005d50: 00000013 addi x0,x0,0 +80005d54: 00000013 addi x0,x0,0 +80005d58: 00000013 addi x0,x0,0 +80005d5c: 00000013 addi x0,x0,0 +80005d60: 00b60023 sb x11,0(x12) +80005d64: 00160613 addi x12,x12,1 +80005d68: 0000a517 auipc x10,0xa +80005d6c: 6fc52503 lw x10,1788(x10) # 80010464 +80005d70: 324010ef jal x1,80007094 +80005d74: 1180006f jal x0,80005e8c + +80005d78 : +80005d78: 00100593 addi x11,x0,1 +80005d7c: 04b50863 beq x10,x11,80005dcc +80005d80: 00400593 addi x11,x0,4 +80005d84: 08b50a63 beq x10,x11,80005e18 +80005d88: 00500593 addi x11,x0,5 +80005d8c: 0cb50463 beq x10,x11,80005e54 +80005d90: 00000013 addi x0,x0,0 +80005d94: 00000013 addi x0,x0,0 +80005d98: 00000013 addi x0,x0,0 +80005d9c: 00000013 addi x0,x0,0 +80005da0: 0000c517 auipc x10,0xc +80005da4: 8b150513 addi x10,x10,-1871 # 80011651 +80005da8: 00000013 addi x0,x0,0 +80005dac: 00000013 addi x0,x0,0 +80005db0: 00000013 addi x0,x0,0 +80005db4: 00000013 addi x0,x0,0 +80005db8: 00000013 addi x0,x0,0 +80005dbc: 00000013 addi x0,x0,0 +80005dc0: 0001c097 auipc x1,0x1c +80005dc4: 7a4080e7 jalr x1,1956(x1) # 80022564 +80005dc8: 1000006f jal x0,80005ec8 + +80005dcc : +80005dcc: 06600593 addi x11,x0,102 +80005dd0: 00000013 addi x0,x0,0 +80005dd4: 00000013 addi x0,x0,0 +80005dd8: 00000013 addi x0,x0,0 +80005ddc: 00000013 addi x0,x0,0 +80005de0: 0000a617 auipc x12,0xa +80005de4: 6e860613 addi x12,x12,1768 # 800104c8 +80005de8: 00000013 addi x0,x0,0 +80005dec: 00000013 addi x0,x0,0 +80005df0: 00000013 addi x0,x0,0 +80005df4: 00000013 addi x0,x0,0 +80005df8: 00000013 addi x0,x0,0 +80005dfc: 00000013 addi x0,x0,0 +80005e00: 00b60023 sb x11,0(x12) +80005e04: 00160613 addi x12,x12,1 +80005e08: 0000a517 auipc x10,0xa +80005e0c: 65c52503 lw x10,1628(x10) # 80010464 +80005e10: 284010ef jal x1,80007094 +80005e14: 0780006f jal x0,80005e8c + +80005e18 : +80005e18: 07600593 addi x11,x0,118 +80005e1c: 00000013 addi x0,x0,0 +80005e20: 0000a617 auipc x12,0xa +80005e24: 6a860613 addi x12,x12,1704 # 800104c8 +80005e28: 00000013 addi x0,x0,0 +80005e2c: 00000013 addi x0,x0,0 +80005e30: 00000013 addi x0,x0,0 +80005e34: 00000013 addi x0,x0,0 +80005e38: 00000013 addi x0,x0,0 +80005e3c: 00000013 addi x0,x0,0 +80005e40: 00b60023 sb x11,0(x12) +80005e44: 00160613 addi x12,x12,1 +80005e48: 0000a517 auipc x10,0xa +80005e4c: 61c52503 lw x10,1564(x10) # 80010464 +80005e50: 244010ef jal x1,80007094 + +80005e54 : +80005e54: 00000013 addi x0,x0,0 +80005e58: 00000013 addi x0,x0,0 +80005e5c: 00000013 addi x0,x0,0 +80005e60: 0000b517 auipc x10,0xb +80005e64: 6d450513 addi x10,x10,1748 # 80011534 +80005e68: 00000013 addi x0,x0,0 +80005e6c: 00000013 addi x0,x0,0 +80005e70: 00000013 addi x0,x0,0 +80005e74: 00000013 addi x0,x0,0 +80005e78: 00000013 addi x0,x0,0 +80005e7c: 00000013 addi x0,x0,0 +80005e80: 0001c097 auipc x1,0x1c +80005e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80005e88: 0400006f jal x0,80005ec8 + +80005e8c : +80005e8c: 00000013 addi x0,x0,0 +80005e90: 00000013 addi x0,x0,0 +80005e94: 00000013 addi x0,x0,0 +80005e98: 00000013 addi x0,x0,0 +80005e9c: 00000013 addi x0,x0,0 +80005ea0: 0000a517 auipc x10,0xa +80005ea4: 62850513 addi x10,x10,1576 # 800104c8 +80005ea8: 00000013 addi x0,x0,0 +80005eac: 00000013 addi x0,x0,0 +80005eb0: 00000013 addi x0,x0,0 +80005eb4: 00000013 addi x0,x0,0 +80005eb8: 00000013 addi x0,x0,0 +80005ebc: 00000013 addi x0,x0,0 +80005ec0: 0001c097 auipc x1,0x1c +80005ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 + +80005ec8 : +80005ec8: 00000013 addi x0,x0,0 +80005ecc: 00000013 addi x0,x0,0 +80005ed0: 00000013 addi x0,x0,0 +80005ed4: 00000013 addi x0,x0,0 +80005ed8: 00000013 addi x0,x0,0 +80005edc: 00000013 addi x0,x0,0 +80005ee0: 0000b517 auipc x10,0xb +80005ee4: 66c50513 addi x10,x10,1644 # 8001154c +80005ee8: 00000013 addi x0,x0,0 +80005eec: 00000013 addi x0,x0,0 +80005ef0: 00000013 addi x0,x0,0 +80005ef4: 00000013 addi x0,x0,0 +80005ef8: 00000013 addi x0,x0,0 +80005efc: 00000013 addi x0,x0,0 +80005f00: 0001c097 auipc x1,0x1c +80005f04: 664080e7 jalr x1,1636(x1) # 80022564 +80005f08: 0000a517 auipc x10,0xa +80005f0c: 45852503 lw x10,1112(x10) # 80010360 +80005f10: 00100593 addi x11,x0,1 +80005f14: 00b51c63 bne x10,x11,80005f2c +80005f18: 0000a517 auipc x10,0xa +80005f1c: 55852503 lw x10,1368(x10) # 80010470 +80005f20: 02000593 addi x11,x0,32 +80005f24: 0f4010ef jal x1,80007018 +80005f28: 0140006f jal x0,80005f3c + +80005f2c : +80005f2c: 0000a517 auipc x10,0xa +80005f30: 54452503 lw x10,1348(x10) # 80010470 +80005f34: 02000593 addi x11,x0,32 +80005f38: 0e0010ef jal x1,80007018 + +80005f3c : +80005f3c: 00000013 addi x0,x0,0 +80005f40: 0000a517 auipc x10,0xa +80005f44: 58850513 addi x10,x10,1416 # 800104c8 +80005f48: 00000013 addi x0,x0,0 +80005f4c: 00000013 addi x0,x0,0 +80005f50: 00000013 addi x0,x0,0 +80005f54: 00000013 addi x0,x0,0 +80005f58: 00000013 addi x0,x0,0 +80005f5c: 00000013 addi x0,x0,0 +80005f60: 0001c097 auipc x1,0x1c +80005f64: 604080e7 jalr x1,1540(x1) # 80022564 +80005f68: 0000a517 auipc x10,0xa +80005f6c: 52052503 lw x10,1312(x10) # 80010488 +80005f70: 08051e63 bne x10,x0,8000600c +80005f74: 00000013 addi x0,x0,0 +80005f78: 00000013 addi x0,x0,0 +80005f7c: 00000013 addi x0,x0,0 +80005f80: 0000b517 auipc x10,0xb +80005f84: 5e350513 addi x10,x10,1507 # 80011563 +80005f88: 00000013 addi x0,x0,0 +80005f8c: 00000013 addi x0,x0,0 +80005f90: 00000013 addi x0,x0,0 +80005f94: 00000013 addi x0,x0,0 +80005f98: 00000013 addi x0,x0,0 +80005f9c: 00000013 addi x0,x0,0 +80005fa0: 0001c097 auipc x1,0x1c +80005fa4: 5c4080e7 jalr x1,1476(x1) # 80022564 +80005fa8: 0000a517 auipc x10,0xa +80005fac: 3b852503 lw x10,952(x10) # 80010360 +80005fb0: 00100593 addi x11,x0,1 +80005fb4: 00b51c63 bne x10,x11,80005fcc +80005fb8: 0000a517 auipc x10,0xa +80005fbc: 4c052503 lw x10,1216(x10) # 80010478 +80005fc0: 02000593 addi x11,x0,32 +80005fc4: 054010ef jal x1,80007018 +80005fc8: 0140006f jal x0,80005fdc + +80005fcc : +80005fcc: 0000a517 auipc x10,0xa +80005fd0: 4ac52503 lw x10,1196(x10) # 80010478 +80005fd4: 02000593 addi x11,x0,32 +80005fd8: 040010ef jal x1,80007018 + +80005fdc : +80005fdc: 00000013 addi x0,x0,0 +80005fe0: 0000a517 auipc x10,0xa +80005fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80005fe8: 00000013 addi x0,x0,0 +80005fec: 00000013 addi x0,x0,0 +80005ff0: 00000013 addi x0,x0,0 +80005ff4: 00000013 addi x0,x0,0 +80005ff8: 00000013 addi x0,x0,0 +80005ffc: 00000013 addi x0,x0,0 +80006000: 0001c097 auipc x1,0x1c +80006004: 564080e7 jalr x1,1380(x1) # 80022564 +80006008: 5bd0006f jal x0,80006dc4 + +8000600c : +8000600c: 00100593 addi x11,x0,1 +80006010: 06b51e63 bne x10,x11,8000608c + +80006014 : +80006014: 00000013 addi x0,x0,0 +80006018: 00000013 addi x0,x0,0 +8000601c: 00000013 addi x0,x0,0 +80006020: 0000b517 auipc x10,0xb +80006024: 55a50513 addi x10,x10,1370 # 8001157a +80006028: 00000013 addi x0,x0,0 +8000602c: 00000013 addi x0,x0,0 +80006030: 00000013 addi x0,x0,0 +80006034: 00000013 addi x0,x0,0 +80006038: 00000013 addi x0,x0,0 +8000603c: 00000013 addi x0,x0,0 +80006040: 0001c097 auipc x1,0x1c +80006044: 524080e7 jalr x1,1316(x1) # 80022564 +80006048: 0000a517 auipc x10,0xa +8000604c: 43052503 lw x10,1072(x10) # 80010478 +80006050: 02000593 addi x11,x0,32 +80006054: 7c5000ef jal x1,80007018 +80006058: 00000013 addi x0,x0,0 +8000605c: 00000013 addi x0,x0,0 +80006060: 0000a517 auipc x10,0xa +80006064: 46850513 addi x10,x10,1128 # 800104c8 +80006068: 00000013 addi x0,x0,0 +8000606c: 00000013 addi x0,x0,0 +80006070: 00000013 addi x0,x0,0 +80006074: 00000013 addi x0,x0,0 +80006078: 00000013 addi x0,x0,0 +8000607c: 00000013 addi x0,x0,0 +80006080: 0001c097 auipc x1,0x1c +80006084: 4e4080e7 jalr x1,1252(x1) # 80022564 +80006088: 53d0006f jal x0,80006dc4 + +8000608c : +8000608c: 00000013 addi x0,x0,0 +80006090: 00000013 addi x0,x0,0 +80006094: 00000013 addi x0,x0,0 +80006098: 00000013 addi x0,x0,0 +8000609c: 00000013 addi x0,x0,0 +800060a0: 0000b517 auipc x10,0xb +800060a4: 53850513 addi x10,x10,1336 # 800115d8 +800060a8: 00000013 addi x0,x0,0 +800060ac: 00000013 addi x0,x0,0 +800060b0: 00000013 addi x0,x0,0 +800060b4: 00000013 addi x0,x0,0 +800060b8: 00000013 addi x0,x0,0 +800060bc: 00000013 addi x0,x0,0 +800060c0: 0001c097 auipc x1,0x1c +800060c4: 4a4080e7 jalr x1,1188(x1) # 80022564 +800060c8: 0000a517 auipc x10,0xa +800060cc: 3b052503 lw x10,944(x10) # 80010478 +800060d0: 02000593 addi x11,x0,32 +800060d4: 745000ef jal x1,80007018 +800060d8: 00000013 addi x0,x0,0 +800060dc: 00000013 addi x0,x0,0 +800060e0: 0000a517 auipc x10,0xa +800060e4: 3e850513 addi x10,x10,1000 # 800104c8 +800060e8: 00000013 addi x0,x0,0 +800060ec: 00000013 addi x0,x0,0 +800060f0: 00000013 addi x0,x0,0 +800060f4: 00000013 addi x0,x0,0 +800060f8: 00000013 addi x0,x0,0 +800060fc: 00000013 addi x0,x0,0 +80006100: 0001c097 auipc x1,0x1c +80006104: 464080e7 jalr x1,1124(x1) # 80022564 +80006108: 4bd0006f jal x0,80006dc4 + +8000610c : +8000610c: 0000a417 auipc x8,0xa +80006110: 38442403 lw x8,900(x8) # 80010490 +80006114: 00900493 addi x9,x0,9 +80006118: 0a940c63 beq x8,x9,800061d0 +8000611c: 00000013 addi x0,x0,0 +80006120: 0000b517 auipc x10,0xb +80006124: 55d50513 addi x10,x10,1373 # 8001167d +80006128: 00000013 addi x0,x0,0 +8000612c: 00000013 addi x0,x0,0 +80006130: 00000013 addi x0,x0,0 +80006134: 00000013 addi x0,x0,0 +80006138: 00000013 addi x0,x0,0 +8000613c: 00000013 addi x0,x0,0 +80006140: 0001c097 auipc x1,0x1c +80006144: 424080e7 jalr x1,1060(x1) # 80022564 +80006148: 00000013 addi x0,x0,0 +8000614c: 00000013 addi x0,x0,0 +80006150: 00000013 addi x0,x0,0 +80006154: 00000013 addi x0,x0,0 +80006158: 00000013 addi x0,x0,0 +8000615c: 00000013 addi x0,x0,0 +80006160: 0000b517 auipc x10,0xb +80006164: 54950513 addi x10,x10,1353 # 800116a9 +80006168: 00000013 addi x0,x0,0 +8000616c: 00000013 addi x0,x0,0 +80006170: 00000013 addi x0,x0,0 +80006174: 00000013 addi x0,x0,0 +80006178: 00000013 addi x0,x0,0 +8000617c: 00000013 addi x0,x0,0 +80006180: 0001c097 auipc x1,0x1c +80006184: 3e4080e7 jalr x1,996(x1) # 80022564 +80006188: 0000a817 auipc x16,0xa +8000618c: 31080813 addi x16,x16,784 # 80010498 +80006190: 00082503 lw x10,0(x16) +80006194: 0001c097 auipc x1,0x1c +80006198: 3d0080e7 jalr x1,976(x1) # 80022564 +8000619c: 00000013 addi x0,x0,0 +800061a0: 0000b517 auipc x10,0xb +800061a4: 94e50513 addi x10,x10,-1714 # 80010aee +800061a8: 00000013 addi x0,x0,0 +800061ac: 00000013 addi x0,x0,0 +800061b0: 00000013 addi x0,x0,0 +800061b4: 00000013 addi x0,x0,0 +800061b8: 00000013 addi x0,x0,0 +800061bc: 00000013 addi x0,x0,0 +800061c0: 0001c097 auipc x1,0x1c +800061c4: 3a4080e7 jalr x1,932(x1) # 80022564 +800061c8: 280404e3 beq x8,x0,80006c50 +800061cc: 3400006f jal x0,8000650c + +800061d0 : +800061d0: 00000013 addi x0,x0,0 +800061d4: 00000013 addi x0,x0,0 +800061d8: 00000013 addi x0,x0,0 +800061dc: 00000013 addi x0,x0,0 +800061e0: 0000b517 auipc x10,0xb +800061e4: 4d950513 addi x10,x10,1241 # 800116b9 +800061e8: 00000013 addi x0,x0,0 +800061ec: 00000013 addi x0,x0,0 +800061f0: 00000013 addi x0,x0,0 +800061f4: 00000013 addi x0,x0,0 +800061f8: 00000013 addi x0,x0,0 +800061fc: 00000013 addi x0,x0,0 +80006200: 0001c097 auipc x1,0x1c +80006204: 364080e7 jalr x1,868(x1) # 80022564 +80006208: 0000a517 auipc x10,0xa +8000620c: 27052503 lw x10,624(x10) # 80010478 +80006210: 02000593 addi x11,x0,32 +80006214: 605000ef jal x1,80007018 +80006218: 00000013 addi x0,x0,0 +8000621c: 00000013 addi x0,x0,0 +80006220: 0000a517 auipc x10,0xa +80006224: 2a850513 addi x10,x10,680 # 800104c8 +80006228: 00000013 addi x0,x0,0 +8000622c: 00000013 addi x0,x0,0 +80006230: 00000013 addi x0,x0,0 +80006234: 00000013 addi x0,x0,0 +80006238: 00000013 addi x0,x0,0 +8000623c: 00000013 addi x0,x0,0 +80006240: 0001c097 auipc x1,0x1c +80006244: 324080e7 jalr x1,804(x1) # 80022564 +80006248: 00000013 addi x0,x0,0 +8000624c: 00000013 addi x0,x0,0 +80006250: 00000013 addi x0,x0,0 +80006254: 00000013 addi x0,x0,0 +80006258: 00000013 addi x0,x0,0 +8000625c: 00000013 addi x0,x0,0 +80006260: 0000b517 auipc x10,0xb +80006264: 48450513 addi x10,x10,1156 # 800116e4 +80006268: 00000013 addi x0,x0,0 +8000626c: 00000013 addi x0,x0,0 +80006270: 00000013 addi x0,x0,0 +80006274: 00000013 addi x0,x0,0 +80006278: 00000013 addi x0,x0,0 +8000627c: 00000013 addi x0,x0,0 +80006280: 0001c097 auipc x1,0x1c +80006284: 2e4080e7 jalr x1,740(x1) # 80022564 +80006288: 0000a517 auipc x10,0xa +8000628c: 1e852503 lw x10,488(x10) # 80010470 +80006290: 02000593 addi x11,x0,32 +80006294: 585000ef jal x1,80007018 +80006298: 00000013 addi x0,x0,0 +8000629c: 00000013 addi x0,x0,0 +800062a0: 0000a517 auipc x10,0xa +800062a4: 22850513 addi x10,x10,552 # 800104c8 +800062a8: 00000013 addi x0,x0,0 +800062ac: 00000013 addi x0,x0,0 +800062b0: 00000013 addi x0,x0,0 +800062b4: 00000013 addi x0,x0,0 +800062b8: 00000013 addi x0,x0,0 +800062bc: 00000013 addi x0,x0,0 +800062c0: 0001c097 auipc x1,0x1c +800062c4: 2a4080e7 jalr x1,676(x1) # 80022564 +800062c8: 0000a317 auipc x6,0xa +800062cc: 1a832303 lw x6,424(x6) # 80010470 +800062d0: 0000a397 auipc x7,0xa +800062d4: 1a83a383 lw x7,424(x7) # 80010478 +800062d8: 10736a63 bltu x6,x7,800063ec + +800062dc : +800062dc: 00000013 addi x0,x0,0 +800062e0: 0000b517 auipc x10,0xb +800062e4: 43350513 addi x10,x10,1075 # 80011713 +800062e8: 00000013 addi x0,x0,0 +800062ec: 00000013 addi x0,x0,0 +800062f0: 00000013 addi x0,x0,0 +800062f4: 00000013 addi x0,x0,0 +800062f8: 00000013 addi x0,x0,0 +800062fc: 00000013 addi x0,x0,0 +80006300: 0001c097 auipc x1,0x1c +80006304: 264080e7 jalr x1,612(x1) # 80022564 +80006308: 00000013 addi x0,x0,0 +8000630c: 00000013 addi x0,x0,0 +80006310: 00000013 addi x0,x0,0 +80006314: 00000013 addi x0,x0,0 +80006318: 00000013 addi x0,x0,0 +8000631c: 00000013 addi x0,x0,0 +80006320: 0000b517 auipc x10,0xb +80006324: 45b50513 addi x10,x10,1115 # 8001177b +80006328: 00000013 addi x0,x0,0 +8000632c: 00000013 addi x0,x0,0 +80006330: 00000013 addi x0,x0,0 +80006334: 00000013 addi x0,x0,0 +80006338: 00000013 addi x0,x0,0 +8000633c: 00000013 addi x0,x0,0 +80006340: 0001c097 auipc x1,0x1c +80006344: 224080e7 jalr x1,548(x1) # 80022564 +80006348: 0000a317 auipc x6,0xa +8000634c: 12832303 lw x6,296(x6) # 80010470 +80006350: 0000a397 auipc x7,0xa +80006354: 1283a383 lw x7,296(x7) # 80010478 +80006358: 40730533 sub x10,x6,x7 +8000635c: 02000593 addi x11,x0,32 +80006360: 4b9000ef jal x1,80007018 +80006364: 00000013 addi x0,x0,0 +80006368: 00000013 addi x0,x0,0 +8000636c: 00000013 addi x0,x0,0 +80006370: 00000013 addi x0,x0,0 +80006374: 00000013 addi x0,x0,0 +80006378: 00000013 addi x0,x0,0 +8000637c: 00000013 addi x0,x0,0 +80006380: 0000a517 auipc x10,0xa +80006384: 14850513 addi x10,x10,328 # 800104c8 +80006388: 00000013 addi x0,x0,0 +8000638c: 00000013 addi x0,x0,0 +80006390: 00000013 addi x0,x0,0 +80006394: 00000013 addi x0,x0,0 +80006398: 00000013 addi x0,x0,0 +8000639c: 00000013 addi x0,x0,0 +800063a0: 0001c097 auipc x1,0x1c +800063a4: 1c4080e7 jalr x1,452(x1) # 80022564 +800063a8: 00000013 addi x0,x0,0 +800063ac: 00000013 addi x0,x0,0 +800063b0: 00000013 addi x0,x0,0 +800063b4: 00000013 addi x0,x0,0 +800063b8: 00000013 addi x0,x0,0 +800063bc: 00000013 addi x0,x0,0 +800063c0: 0000b517 auipc x10,0xb +800063c4: 3e250513 addi x10,x10,994 # 800117a2 +800063c8: 00000013 addi x0,x0,0 +800063cc: 00000013 addi x0,x0,0 +800063d0: 00000013 addi x0,x0,0 +800063d4: 00000013 addi x0,x0,0 +800063d8: 00000013 addi x0,x0,0 +800063dc: 00000013 addi x0,x0,0 +800063e0: 0001c097 auipc x1,0x1c +800063e4: 184080e7 jalr x1,388(x1) # 80022564 +800063e8: 1dd0006f jal x0,80006dc4 + +800063ec : +800063ec: 00000013 addi x0,x0,0 +800063f0: 00000013 addi x0,x0,0 +800063f4: 00000013 addi x0,x0,0 +800063f8: 00000013 addi x0,x0,0 +800063fc: 00000013 addi x0,x0,0 +80006400: 0000b517 auipc x10,0xb +80006404: 33f50513 addi x10,x10,831 # 8001173f +80006408: 00000013 addi x0,x0,0 +8000640c: 00000013 addi x0,x0,0 +80006410: 00000013 addi x0,x0,0 +80006414: 00000013 addi x0,x0,0 +80006418: 00000013 addi x0,x0,0 +8000641c: 00000013 addi x0,x0,0 +80006420: 0001c097 auipc x1,0x1c +80006424: 144080e7 jalr x1,324(x1) # 80022564 +80006428: 00000013 addi x0,x0,0 +8000642c: 00000013 addi x0,x0,0 +80006430: 00000013 addi x0,x0,0 +80006434: 00000013 addi x0,x0,0 +80006438: 00000013 addi x0,x0,0 +8000643c: 00000013 addi x0,x0,0 +80006440: 0000b517 auipc x10,0xb +80006444: 33b50513 addi x10,x10,827 # 8001177b +80006448: 00000013 addi x0,x0,0 +8000644c: 00000013 addi x0,x0,0 +80006450: 00000013 addi x0,x0,0 +80006454: 00000013 addi x0,x0,0 +80006458: 00000013 addi x0,x0,0 +8000645c: 00000013 addi x0,x0,0 +80006460: 0001c097 auipc x1,0x1c +80006464: 104080e7 jalr x1,260(x1) # 80022564 +80006468: 0000a317 auipc x6,0xa +8000646c: 01032303 lw x6,16(x6) # 80010478 +80006470: 0000a397 auipc x7,0xa +80006474: 0003a383 lw x7,0(x7) # 80010470 +80006478: 40730533 sub x10,x6,x7 +8000647c: 02000593 addi x11,x0,32 +80006480: 399000ef jal x1,80007018 +80006484: 00000013 addi x0,x0,0 +80006488: 00000013 addi x0,x0,0 +8000648c: 00000013 addi x0,x0,0 +80006490: 00000013 addi x0,x0,0 +80006494: 00000013 addi x0,x0,0 +80006498: 00000013 addi x0,x0,0 +8000649c: 00000013 addi x0,x0,0 +800064a0: 0000a517 auipc x10,0xa +800064a4: 02850513 addi x10,x10,40 # 800104c8 +800064a8: 00000013 addi x0,x0,0 +800064ac: 00000013 addi x0,x0,0 +800064b0: 00000013 addi x0,x0,0 +800064b4: 00000013 addi x0,x0,0 +800064b8: 00000013 addi x0,x0,0 +800064bc: 00000013 addi x0,x0,0 +800064c0: 0001c097 auipc x1,0x1c +800064c4: 0a4080e7 jalr x1,164(x1) # 80022564 +800064c8: 00000013 addi x0,x0,0 +800064cc: 00000013 addi x0,x0,0 +800064d0: 00000013 addi x0,x0,0 +800064d4: 00000013 addi x0,x0,0 +800064d8: 00000013 addi x0,x0,0 +800064dc: 00000013 addi x0,x0,0 +800064e0: 0000b517 auipc x10,0xb +800064e4: 3aa50513 addi x10,x10,938 # 8001188a +800064e8: 00000013 addi x0,x0,0 +800064ec: 00000013 addi x0,x0,0 +800064f0: 00000013 addi x0,x0,0 +800064f4: 00000013 addi x0,x0,0 +800064f8: 00000013 addi x0,x0,0 +800064fc: 00000013 addi x0,x0,0 +80006500: 0001c097 auipc x1,0x1c +80006504: 064080e7 jalr x1,100(x1) # 80022564 +80006508: 0bd0006f jal x0,80006dc4 + +8000650c : +8000650c: 00000013 addi x0,x0,0 +80006510: 00000013 addi x0,x0,0 +80006514: 00000013 addi x0,x0,0 +80006518: 00000013 addi x0,x0,0 +8000651c: 00000013 addi x0,x0,0 +80006520: 0000b517 auipc x10,0xb +80006524: 45150513 addi x10,x10,1105 # 80011971 +80006528: 00000013 addi x0,x0,0 +8000652c: 00000013 addi x0,x0,0 +80006530: 00000013 addi x0,x0,0 +80006534: 00000013 addi x0,x0,0 +80006538: 00000013 addi x0,x0,0 +8000653c: 00000013 addi x0,x0,0 +80006540: 0001c097 auipc x1,0x1c +80006544: 024080e7 jalr x1,36(x1) # 80022564 +80006548: 0000a517 auipc x10,0xa +8000654c: f4c52503 lw x10,-180(x10) # 80010494 +80006550: 04050a63 beq x10,x0,800065a4 +80006554: 00100593 addi x11,x0,1 +80006558: 08b50663 beq x10,x11,800065e4 +8000655c: 00200593 addi x11,x0,2 +80006560: 0cb50263 beq x10,x11,80006624 +80006564: 00300593 addi x11,x0,3 +80006568: 0eb50e63 beq x10,x11,80006664 +8000656c: 00000013 addi x0,x0,0 +80006570: 00000013 addi x0,x0,0 +80006574: 00000013 addi x0,x0,0 +80006578: 00000013 addi x0,x0,0 +8000657c: 00000013 addi x0,x0,0 +80006580: 0000b517 auipc x10,0xb +80006584: 42d50513 addi x10,x10,1069 # 800119ad +80006588: 00000013 addi x0,x0,0 +8000658c: 00000013 addi x0,x0,0 +80006590: 00000013 addi x0,x0,0 +80006594: 00000013 addi x0,x0,0 +80006598: 00000013 addi x0,x0,0 +8000659c: 00000013 addi x0,x0,0 +800065a0: 1000006f jal x0,800066a0 + +800065a4 : +800065a4: 00000013 addi x0,x0,0 +800065a8: 00000013 addi x0,x0,0 +800065ac: 00000013 addi x0,x0,0 +800065b0: 00000013 addi x0,x0,0 +800065b4: 00000013 addi x0,x0,0 +800065b8: 00000013 addi x0,x0,0 +800065bc: 00000013 addi x0,x0,0 +800065c0: 0000b517 auipc x10,0xb +800065c4: 3cb50513 addi x10,x10,971 # 8001198b +800065c8: 00000013 addi x0,x0,0 +800065cc: 00000013 addi x0,x0,0 +800065d0: 00000013 addi x0,x0,0 +800065d4: 00000013 addi x0,x0,0 +800065d8: 00000013 addi x0,x0,0 +800065dc: 00000013 addi x0,x0,0 +800065e0: 0c00006f jal x0,800066a0 + +800065e4 : +800065e4: 00000013 addi x0,x0,0 +800065e8: 00000013 addi x0,x0,0 +800065ec: 00000013 addi x0,x0,0 +800065f0: 00000013 addi x0,x0,0 +800065f4: 00000013 addi x0,x0,0 +800065f8: 00000013 addi x0,x0,0 +800065fc: 00000013 addi x0,x0,0 +80006600: 0000b517 auipc x10,0xb +80006604: 39350513 addi x10,x10,915 # 80011993 +80006608: 00000013 addi x0,x0,0 +8000660c: 00000013 addi x0,x0,0 +80006610: 00000013 addi x0,x0,0 +80006614: 00000013 addi x0,x0,0 +80006618: 00000013 addi x0,x0,0 +8000661c: 00000013 addi x0,x0,0 +80006620: 0800006f jal x0,800066a0 + +80006624 : +80006624: 00000013 addi x0,x0,0 +80006628: 00000013 addi x0,x0,0 +8000662c: 00000013 addi x0,x0,0 +80006630: 00000013 addi x0,x0,0 +80006634: 00000013 addi x0,x0,0 +80006638: 00000013 addi x0,x0,0 +8000663c: 00000013 addi x0,x0,0 +80006640: 0000b517 auipc x10,0xb +80006644: 35b50513 addi x10,x10,859 # 8001199b +80006648: 00000013 addi x0,x0,0 +8000664c: 00000013 addi x0,x0,0 +80006650: 00000013 addi x0,x0,0 +80006654: 00000013 addi x0,x0,0 +80006658: 00000013 addi x0,x0,0 +8000665c: 00000013 addi x0,x0,0 +80006660: 0400006f jal x0,800066a0 + +80006664 : +80006664: 00000013 addi x0,x0,0 +80006668: 00000013 addi x0,x0,0 +8000666c: 00000013 addi x0,x0,0 +80006670: 00000013 addi x0,x0,0 +80006674: 00000013 addi x0,x0,0 +80006678: 00000013 addi x0,x0,0 +8000667c: 00000013 addi x0,x0,0 +80006680: 0000b517 auipc x10,0xb +80006684: 32450513 addi x10,x10,804 # 800119a4 +80006688: 00000013 addi x0,x0,0 +8000668c: 00000013 addi x0,x0,0 +80006690: 00000013 addi x0,x0,0 +80006694: 00000013 addi x0,x0,0 +80006698: 00000013 addi x0,x0,0 +8000669c: 00000013 addi x0,x0,0 + +800066a0 : +800066a0: 0001c097 auipc x1,0x1c +800066a4: ec4080e7 jalr x1,-316(x1) # 80022564 +800066a8: 00000013 addi x0,x0,0 +800066ac: 00000013 addi x0,x0,0 +800066b0: 00000013 addi x0,x0,0 +800066b4: 00000013 addi x0,x0,0 +800066b8: 00000013 addi x0,x0,0 +800066bc: 00000013 addi x0,x0,0 +800066c0: 0000b517 auipc x10,0xb +800066c4: 2f650513 addi x10,x10,758 # 800119b6 +800066c8: 00000013 addi x0,x0,0 +800066cc: 00000013 addi x0,x0,0 +800066d0: 00000013 addi x0,x0,0 +800066d4: 00000013 addi x0,x0,0 +800066d8: 00000013 addi x0,x0,0 +800066dc: 00000013 addi x0,x0,0 +800066e0: 0001c097 auipc x1,0x1c +800066e4: e84080e7 jalr x1,-380(x1) # 80022564 +800066e8: 0000a517 auipc x10,0xa +800066ec: da852503 lw x10,-600(x10) # 80010490 +800066f0: 00100593 addi x11,x0,1 +800066f4: 06b50863 beq x10,x11,80006764 +800066f8: 00200593 addi x11,x0,2 +800066fc: 0ab50463 beq x10,x11,800067a4 +80006700: 00300593 addi x11,x0,3 +80006704: 0eb50063 beq x10,x11,800067e4 +80006708: 00400593 addi x11,x0,4 +8000670c: 10b50c63 beq x10,x11,80006824 +80006710: 00500593 addi x11,x0,5 +80006714: 14b50863 beq x10,x11,80006864 +80006718: 00600593 addi x11,x0,6 +8000671c: 18b50463 beq x10,x11,800068a4 +80006720: 00700593 addi x11,x0,7 +80006724: 1cb50063 beq x10,x11,800068e4 +80006728: 00800593 addi x11,x0,8 +8000672c: 1eb50c63 beq x10,x11,80006924 +80006730: 00000013 addi x0,x0,0 +80006734: 00000013 addi x0,x0,0 +80006738: 00000013 addi x0,x0,0 +8000673c: 00000013 addi x0,x0,0 +80006740: 0000b517 auipc x10,0xb +80006744: 3cd50513 addi x10,x10,973 # 80011b0d +80006748: 00000013 addi x0,x0,0 +8000674c: 00000013 addi x0,x0,0 +80006750: 00000013 addi x0,x0,0 +80006754: 00000013 addi x0,x0,0 +80006758: 00000013 addi x0,x0,0 +8000675c: 00000013 addi x0,x0,0 +80006760: 2000006f jal x0,80006960 + +80006764 : +80006764: 00000013 addi x0,x0,0 +80006768: 00000013 addi x0,x0,0 +8000676c: 00000013 addi x0,x0,0 +80006770: 00000013 addi x0,x0,0 +80006774: 00000013 addi x0,x0,0 +80006778: 00000013 addi x0,x0,0 +8000677c: 00000013 addi x0,x0,0 +80006780: 0000b517 auipc x10,0xb +80006784: 25050513 addi x10,x10,592 # 800119d0 +80006788: 00000013 addi x0,x0,0 +8000678c: 00000013 addi x0,x0,0 +80006790: 00000013 addi x0,x0,0 +80006794: 00000013 addi x0,x0,0 +80006798: 00000013 addi x0,x0,0 +8000679c: 00000013 addi x0,x0,0 +800067a0: 1c00006f jal x0,80006960 + +800067a4 : +800067a4: 00000013 addi x0,x0,0 +800067a8: 00000013 addi x0,x0,0 +800067ac: 00000013 addi x0,x0,0 +800067b0: 00000013 addi x0,x0,0 +800067b4: 00000013 addi x0,x0,0 +800067b8: 00000013 addi x0,x0,0 +800067bc: 00000013 addi x0,x0,0 +800067c0: 0000b517 auipc x10,0xb +800067c4: 24150513 addi x10,x10,577 # 80011a01 +800067c8: 00000013 addi x0,x0,0 +800067cc: 00000013 addi x0,x0,0 +800067d0: 00000013 addi x0,x0,0 +800067d4: 00000013 addi x0,x0,0 +800067d8: 00000013 addi x0,x0,0 +800067dc: 00000013 addi x0,x0,0 +800067e0: 1800006f jal x0,80006960 + +800067e4 : +800067e4: 00000013 addi x0,x0,0 +800067e8: 00000013 addi x0,x0,0 +800067ec: 00000013 addi x0,x0,0 +800067f0: 00000013 addi x0,x0,0 +800067f4: 00000013 addi x0,x0,0 +800067f8: 00000013 addi x0,x0,0 +800067fc: 00000013 addi x0,x0,0 +80006800: 0000b517 auipc x10,0xb +80006804: 22150513 addi x10,x10,545 # 80011a21 +80006808: 00000013 addi x0,x0,0 +8000680c: 00000013 addi x0,x0,0 +80006810: 00000013 addi x0,x0,0 +80006814: 00000013 addi x0,x0,0 +80006818: 00000013 addi x0,x0,0 +8000681c: 00000013 addi x0,x0,0 +80006820: 1400006f jal x0,80006960 + +80006824 : +80006824: 00000013 addi x0,x0,0 +80006828: 00000013 addi x0,x0,0 +8000682c: 00000013 addi x0,x0,0 +80006830: 00000013 addi x0,x0,0 +80006834: 00000013 addi x0,x0,0 +80006838: 00000013 addi x0,x0,0 +8000683c: 00000013 addi x0,x0,0 +80006840: 0000b517 auipc x10,0xb +80006844: 1ff50513 addi x10,x10,511 # 80011a3f +80006848: 00000013 addi x0,x0,0 +8000684c: 00000013 addi x0,x0,0 +80006850: 00000013 addi x0,x0,0 +80006854: 00000013 addi x0,x0,0 +80006858: 00000013 addi x0,x0,0 +8000685c: 00000013 addi x0,x0,0 +80006860: 1000006f jal x0,80006960 + +80006864 : +80006864: 00000013 addi x0,x0,0 +80006868: 00000013 addi x0,x0,0 +8000686c: 00000013 addi x0,x0,0 +80006870: 00000013 addi x0,x0,0 +80006874: 00000013 addi x0,x0,0 +80006878: 00000013 addi x0,x0,0 +8000687c: 00000013 addi x0,x0,0 +80006880: 0000b517 auipc x10,0xb +80006884: 1de50513 addi x10,x10,478 # 80011a5e +80006888: 00000013 addi x0,x0,0 +8000688c: 00000013 addi x0,x0,0 +80006890: 00000013 addi x0,x0,0 +80006894: 00000013 addi x0,x0,0 +80006898: 00000013 addi x0,x0,0 +8000689c: 00000013 addi x0,x0,0 +800068a0: 0c00006f jal x0,80006960 + +800068a4 : +800068a4: 00000013 addi x0,x0,0 +800068a8: 00000013 addi x0,x0,0 +800068ac: 00000013 addi x0,x0,0 +800068b0: 00000013 addi x0,x0,0 +800068b4: 00000013 addi x0,x0,0 +800068b8: 00000013 addi x0,x0,0 +800068bc: 00000013 addi x0,x0,0 +800068c0: 0000b517 auipc x10,0xb +800068c4: 1c650513 addi x10,x10,454 # 80011a86 +800068c8: 00000013 addi x0,x0,0 +800068cc: 00000013 addi x0,x0,0 +800068d0: 00000013 addi x0,x0,0 +800068d4: 00000013 addi x0,x0,0 +800068d8: 00000013 addi x0,x0,0 +800068dc: 00000013 addi x0,x0,0 +800068e0: 0800006f jal x0,80006960 + +800068e4 : +800068e4: 00000013 addi x0,x0,0 +800068e8: 00000013 addi x0,x0,0 +800068ec: 00000013 addi x0,x0,0 +800068f0: 00000013 addi x0,x0,0 +800068f4: 00000013 addi x0,x0,0 +800068f8: 00000013 addi x0,x0,0 +800068fc: 00000013 addi x0,x0,0 +80006900: 0000b517 auipc x10,0xb +80006904: 1b250513 addi x10,x10,434 # 80011ab2 +80006908: 00000013 addi x0,x0,0 +8000690c: 00000013 addi x0,x0,0 +80006910: 00000013 addi x0,x0,0 +80006914: 00000013 addi x0,x0,0 +80006918: 00000013 addi x0,x0,0 +8000691c: 00000013 addi x0,x0,0 +80006920: 0400006f jal x0,80006960 + +80006924 : +80006924: 00000013 addi x0,x0,0 +80006928: 00000013 addi x0,x0,0 +8000692c: 00000013 addi x0,x0,0 +80006930: 00000013 addi x0,x0,0 +80006934: 00000013 addi x0,x0,0 +80006938: 00000013 addi x0,x0,0 +8000693c: 00000013 addi x0,x0,0 +80006940: 0000b517 auipc x10,0xb +80006944: 19e50513 addi x10,x10,414 # 80011ade +80006948: 00000013 addi x0,x0,0 +8000694c: 00000013 addi x0,x0,0 +80006950: 00000013 addi x0,x0,0 +80006954: 00000013 addi x0,x0,0 +80006958: 00000013 addi x0,x0,0 +8000695c: 00000013 addi x0,x0,0 + +80006960 : +80006960: 0001c097 auipc x1,0x1c +80006964: c04080e7 jalr x1,-1020(x1) # 80022564 +80006968: 00000013 addi x0,x0,0 +8000696c: 00000013 addi x0,x0,0 +80006970: 00000013 addi x0,x0,0 +80006974: 00000013 addi x0,x0,0 +80006978: 00000013 addi x0,x0,0 +8000697c: 00000013 addi x0,x0,0 +80006980: 0000b517 auipc x10,0xb +80006984: 19c50513 addi x10,x10,412 # 80011b1c +80006988: 00000013 addi x0,x0,0 +8000698c: 00000013 addi x0,x0,0 +80006990: 00000013 addi x0,x0,0 +80006994: 00000013 addi x0,x0,0 +80006998: 00000013 addi x0,x0,0 +8000699c: 00000013 addi x0,x0,0 +800069a0: 0001c097 auipc x1,0x1c +800069a4: bc4080e7 jalr x1,-1084(x1) # 80022564 +800069a8: 0000a517 auipc x10,0xa +800069ac: ad052503 lw x10,-1328(x10) # 80010478 +800069b0: 02000593 addi x11,x0,32 +800069b4: 664000ef jal x1,80007018 +800069b8: 00000013 addi x0,x0,0 +800069bc: 00000013 addi x0,x0,0 +800069c0: 0000a517 auipc x10,0xa +800069c4: b0850513 addi x10,x10,-1272 # 800104c8 +800069c8: 00000013 addi x0,x0,0 +800069cc: 00000013 addi x0,x0,0 +800069d0: 00000013 addi x0,x0,0 +800069d4: 00000013 addi x0,x0,0 +800069d8: 00000013 addi x0,x0,0 +800069dc: 00000013 addi x0,x0,0 +800069e0: 0001c097 auipc x1,0x1c +800069e4: b84080e7 jalr x1,-1148(x1) # 80022564 +800069e8: 00000013 addi x0,x0,0 +800069ec: 00000013 addi x0,x0,0 +800069f0: 00000013 addi x0,x0,0 +800069f4: 00000013 addi x0,x0,0 +800069f8: 00000013 addi x0,x0,0 +800069fc: 00000013 addi x0,x0,0 +80006a00: 0000b517 auipc x10,0xb +80006a04: 13350513 addi x10,x10,307 # 80011b33 +80006a08: 00000013 addi x0,x0,0 +80006a0c: 00000013 addi x0,x0,0 +80006a10: 00000013 addi x0,x0,0 +80006a14: 00000013 addi x0,x0,0 +80006a18: 00000013 addi x0,x0,0 +80006a1c: 00000013 addi x0,x0,0 +80006a20: 0001c097 auipc x1,0x1c +80006a24: b44080e7 jalr x1,-1212(x1) # 80022564 +80006a28: 0000a517 auipc x10,0xa +80006a2c: a4852503 lw x10,-1464(x10) # 80010470 +80006a30: 02000593 addi x11,x0,32 +80006a34: 5e4000ef jal x1,80007018 +80006a38: 00000013 addi x0,x0,0 +80006a3c: 00000013 addi x0,x0,0 +80006a40: 0000a517 auipc x10,0xa +80006a44: a8850513 addi x10,x10,-1400 # 800104c8 +80006a48: 00000013 addi x0,x0,0 +80006a4c: 00000013 addi x0,x0,0 +80006a50: 00000013 addi x0,x0,0 +80006a54: 00000013 addi x0,x0,0 +80006a58: 00000013 addi x0,x0,0 +80006a5c: 00000013 addi x0,x0,0 +80006a60: 0001c097 auipc x1,0x1c +80006a64: b04080e7 jalr x1,-1276(x1) # 80022564 +80006a68: 0000a517 auipc x10,0xa +80006a6c: a2852503 lw x10,-1496(x10) # 80010490 +80006a70: 00200593 addi x11,x0,2 +80006a74: 08b51463 bne x10,x11,80006afc +80006a78: 00000013 addi x0,x0,0 +80006a7c: 00000013 addi x0,x0,0 +80006a80: 0000b517 auipc x10,0xb +80006a84: 0ca50513 addi x10,x10,202 # 80011b4a +80006a88: 00000013 addi x0,x0,0 +80006a8c: 00000013 addi x0,x0,0 +80006a90: 00000013 addi x0,x0,0 +80006a94: 00000013 addi x0,x0,0 +80006a98: 00000013 addi x0,x0,0 +80006a9c: 00000013 addi x0,x0,0 +80006aa0: 0001c097 auipc x1,0x1c +80006aa4: ac4080e7 jalr x1,-1340(x1) # 80022564 +80006aa8: 0000a517 auipc x10,0xa +80006aac: 9d052503 lw x10,-1584(x10) # 80010478 +80006ab0: 284000ef jal x1,80006d34 +80006ab4: 0001c097 auipc x1,0x1c +80006ab8: ab0080e7 jalr x1,-1360(x1) # 80022564 +80006abc: 00000013 addi x0,x0,0 +80006ac0: 0000b517 auipc x10,0xb +80006ac4: 0a150513 addi x10,x10,161 # 80011b61 +80006ac8: 00000013 addi x0,x0,0 +80006acc: 00000013 addi x0,x0,0 +80006ad0: 00000013 addi x0,x0,0 +80006ad4: 00000013 addi x0,x0,0 +80006ad8: 00000013 addi x0,x0,0 +80006adc: 00000013 addi x0,x0,0 +80006ae0: 0001c097 auipc x1,0x1c +80006ae4: a84080e7 jalr x1,-1404(x1) # 80022564 +80006ae8: 0000a517 auipc x10,0xa +80006aec: 98852503 lw x10,-1656(x10) # 80010470 +80006af0: 244000ef jal x1,80006d34 +80006af4: 0001c097 auipc x1,0x1c +80006af8: a70080e7 jalr x1,-1424(x1) # 80022564 + +80006afc : +80006afc: 00000097 auipc x1,0x0 +80006b00: 314080e7 jalr x1,788(x1) # 80006e10 +80006b04: 0000a517 auipc x10,0xa +80006b08: 98c52503 lw x10,-1652(x10) # 80010490 +80006b0c: 00100593 addi x11,x0,1 +80006b10: 02b51e63 bne x10,x11,80006b4c +80006b14: 00000013 addi x0,x0,0 +80006b18: 00000013 addi x0,x0,0 +80006b1c: 00000013 addi x0,x0,0 +80006b20: 0000b517 auipc x10,0xb +80006b24: 0b750513 addi x10,x10,183 # 80011bd7 +80006b28: 00000013 addi x0,x0,0 +80006b2c: 00000013 addi x0,x0,0 +80006b30: 00000013 addi x0,x0,0 +80006b34: 00000013 addi x0,x0,0 +80006b38: 00000013 addi x0,x0,0 +80006b3c: 00000013 addi x0,x0,0 +80006b40: 0001c097 auipc x1,0x1c +80006b44: a24080e7 jalr x1,-1500(x1) # 80022564 +80006b48: 27c0006f jal x0,80006dc4 +80006b4c: 00200593 addi x11,x0,2 +80006b50: 02b51e63 bne x10,x11,80006b8c +80006b54: 00000013 addi x0,x0,0 +80006b58: 00000013 addi x0,x0,0 +80006b5c: 00000013 addi x0,x0,0 +80006b60: 0000b517 auipc x10,0xb +80006b64: 14d50513 addi x10,x10,333 # 80011cad +80006b68: 00000013 addi x0,x0,0 +80006b6c: 00000013 addi x0,x0,0 +80006b70: 00000013 addi x0,x0,0 +80006b74: 00000013 addi x0,x0,0 +80006b78: 00000013 addi x0,x0,0 +80006b7c: 00000013 addi x0,x0,0 +80006b80: 0001c097 auipc x1,0x1c +80006b84: 9e4080e7 jalr x1,-1564(x1) # 80022564 +80006b88: 23c0006f jal x0,80006dc4 +80006b8c: 00300593 addi x11,x0,3 +80006b90: 02b51e63 bne x10,x11,80006bcc +80006b94: 00000013 addi x0,x0,0 +80006b98: 00000013 addi x0,x0,0 +80006b9c: 00000013 addi x0,x0,0 +80006ba0: 0000b517 auipc x10,0xb +80006ba4: 20050513 addi x10,x10,512 # 80011da0 +80006ba8: 00000013 addi x0,x0,0 +80006bac: 00000013 addi x0,x0,0 +80006bb0: 00000013 addi x0,x0,0 +80006bb4: 00000013 addi x0,x0,0 +80006bb8: 00000013 addi x0,x0,0 +80006bbc: 00000013 addi x0,x0,0 +80006bc0: 0001c097 auipc x1,0x1c +80006bc4: 9a4080e7 jalr x1,-1628(x1) # 80022564 +80006bc8: 1fc0006f jal x0,80006dc4 +80006bcc: 00400593 addi x11,x0,4 +80006bd0: 02b51e63 bne x10,x11,80006c0c +80006bd4: 00000013 addi x0,x0,0 +80006bd8: 00000013 addi x0,x0,0 +80006bdc: 00000013 addi x0,x0,0 +80006be0: 0000b517 auipc x10,0xb +80006be4: 2bb50513 addi x10,x10,699 # 80011e9b +80006be8: 00000013 addi x0,x0,0 +80006bec: 00000013 addi x0,x0,0 +80006bf0: 00000013 addi x0,x0,0 +80006bf4: 00000013 addi x0,x0,0 +80006bf8: 00000013 addi x0,x0,0 +80006bfc: 00000013 addi x0,x0,0 +80006c00: 0001c097 auipc x1,0x1c +80006c04: 964080e7 jalr x1,-1692(x1) # 80022564 +80006c08: 1bc0006f jal x0,80006dc4 +80006c0c: 00500593 addi x11,x0,5 +80006c10: 02b51e63 bne x10,x11,80006c4c +80006c14: 00000013 addi x0,x0,0 +80006c18: 00000013 addi x0,x0,0 +80006c1c: 00000013 addi x0,x0,0 +80006c20: 0000b517 auipc x10,0xb +80006c24: 36250513 addi x10,x10,866 # 80011f82 +80006c28: 00000013 addi x0,x0,0 +80006c2c: 00000013 addi x0,x0,0 +80006c30: 00000013 addi x0,x0,0 +80006c34: 00000013 addi x0,x0,0 +80006c38: 00000013 addi x0,x0,0 +80006c3c: 00000013 addi x0,x0,0 +80006c40: 0001c097 auipc x1,0x1c +80006c44: 924080e7 jalr x1,-1756(x1) # 80022564 +80006c48: 17c0006f jal x0,80006dc4 +80006c4c: 1780006f jal x0,80006dc4 + +80006c50 : +80006c50: 00000013 addi x0,x0,0 +80006c54: 00000013 addi x0,x0,0 +80006c58: 00000013 addi x0,x0,0 +80006c5c: 00000013 addi x0,x0,0 +80006c60: 0000b517 auipc x10,0xb +80006c64: f2f50513 addi x10,x10,-209 # 80011b8f +80006c68: 00000013 addi x0,x0,0 +80006c6c: 00000013 addi x0,x0,0 +80006c70: 00000013 addi x0,x0,0 +80006c74: 00000013 addi x0,x0,0 +80006c78: 00000013 addi x0,x0,0 +80006c7c: 00000013 addi x0,x0,0 +80006c80: 0001c097 auipc x1,0x1c +80006c84: 8e4080e7 jalr x1,-1820(x1) # 80022564 +80006c88: 0000a617 auipc x12,0xa +80006c8c: 82062603 lw x12,-2016(x12) # 800104a8 +80006c90: 00000013 addi x0,x0,0 +80006c94: 00000013 addi x0,x0,0 +80006c98: 00000013 addi x0,x0,0 +80006c9c: 00000013 addi x0,x0,0 +80006ca0: 0000a517 auipc x10,0xa +80006ca4: ed850513 addi x10,x10,-296 # 80010b78 +80006ca8: 00000013 addi x0,x0,0 +80006cac: 00000013 addi x0,x0,0 +80006cb0: 00000013 addi x0,x0,0 +80006cb4: 00000013 addi x0,x0,0 +80006cb8: 00000013 addi x0,x0,0 +80006cbc: 00000013 addi x0,x0,0 +80006cc0: 0001c097 auipc x1,0x1c +80006cc4: 8a4080e7 jalr x1,-1884(x1) # 80022564 +80006cc8: 00065503 lhu x10,0(x12) +80006ccc: 01000593 addi x11,x0,16 +80006cd0: 00357413 andi x8,x10,3 +80006cd4: 00300493 addi x9,x0,3 +80006cd8: 00941a63 bne x8,x9,80006cec +80006cdc: 00265403 lhu x8,2(x12) +80006ce0: 01041413 slli x8,x8,0x10 +80006ce4: 00856533 or x10,x10,x8 +80006ce8: 02000593 addi x11,x0,32 +80006cec: 32c000ef jal x1,80007018 +80006cf0: 00000013 addi x0,x0,0 +80006cf4: 00000013 addi x0,x0,0 +80006cf8: 00000013 addi x0,x0,0 +80006cfc: 00000013 addi x0,x0,0 +80006d00: 00009517 auipc x10,0x9 +80006d04: 7c850513 addi x10,x10,1992 # 800104c8 +80006d08: 00000013 addi x0,x0,0 +80006d0c: 00000013 addi x0,x0,0 +80006d10: 00000013 addi x0,x0,0 +80006d14: 00000013 addi x0,x0,0 +80006d18: 00000013 addi x0,x0,0 +80006d1c: 00000013 addi x0,x0,0 +80006d20: 0001c097 auipc x1,0x1c +80006d24: 844080e7 jalr x1,-1980(x1) # 80022564 +80006d28: 00000097 auipc x1,0x0 +80006d2c: 0e8080e7 jalr x1,232(x1) # 80006e10 +80006d30: 0940006f jal x0,80006dc4 + +80006d34 : +80006d34: 02054263 blt x10,x0,80006d58 + +80006d38 : +80006d38: 01800593 addi x11,x0,24 +80006d3c: 04b55463 bge x10,x11,80006d84 +80006d40: 00009597 auipc x11,0x9 +80006d44: 7b058593 addi x11,x11,1968 # 800104f0 +80006d48: 00251613 slli x12,x10,0x2 +80006d4c: 00c585b3 add x11,x11,x12 +80006d50: 0005a503 lw x10,0(x11) +80006d54: 00008067 jalr x0,0(x1) + +80006d58 : +80006d58: 00100593 addi x11,x0,1 +80006d5c: 01f59593 slli x11,x11,0x1f +80006d60: 00b54533 xor x10,x10,x11 +80006d64: 01000593 addi x11,x0,16 +80006d68: 00b55e63 bge x10,x11,80006d84 +80006d6c: 00009597 auipc x11,0x9 +80006d70: 7e458593 addi x11,x11,2020 # 80010550 +80006d74: 00251613 slli x12,x10,0x2 +80006d78: 00c585b3 add x11,x11,x12 +80006d7c: 0005a503 lw x10,0(x11) +80006d80: 00008067 jalr x0,0(x1) + +80006d84 : +80006d84: 00000013 addi x0,x0,0 +80006d88: 00000013 addi x0,x0,0 +80006d8c: 00000013 addi x0,x0,0 +80006d90: 00000013 addi x0,x0,0 +80006d94: 00000013 addi x0,x0,0 +80006d98: 00000013 addi x0,x0,0 +80006d9c: 00000013 addi x0,x0,0 +80006da0: 0000a517 auipc x10,0xa +80006da4: bee50513 addi x10,x10,-1042 # 8001098e +80006da8: 00000013 addi x0,x0,0 +80006dac: 00000013 addi x0,x0,0 +80006db0: 00000013 addi x0,x0,0 +80006db4: 00000013 addi x0,x0,0 +80006db8: 00000013 addi x0,x0,0 +80006dbc: 00000013 addi x0,x0,0 +80006dc0: 00008067 jalr x0,0(x1) + +80006dc4 : +80006dc4: 00000013 addi x0,x0,0 +80006dc8: 00000013 addi x0,x0,0 +80006dcc: 00000013 addi x0,x0,0 +80006dd0: 00000013 addi x0,x0,0 +80006dd4: 00000013 addi x0,x0,0 +80006dd8: 00000013 addi x0,x0,0 +80006ddc: 00000013 addi x0,x0,0 +80006de0: 0000b517 auipc x10,0xb +80006de4: 85050513 addi x10,x10,-1968 # 80011630 +80006de8: 00000013 addi x0,x0,0 +80006dec: 00000013 addi x0,x0,0 +80006df0: 00000013 addi x0,x0,0 +80006df4: 00000013 addi x0,x0,0 +80006df8: 00000013 addi x0,x0,0 +80006dfc: 00000013 addi x0,x0,0 +80006e00: 0001b097 auipc x1,0x1b +80006e04: 764080e7 jalr x1,1892(x1) # 80022564 + +80006e08 : +80006e08: 0001b097 auipc x1,0x1b +80006e0c: 7bc080e7 jalr x1,1980(x1) # 800225c4 + +80006e10 : +80006e10: 00009617 auipc x12,0x9 +80006e14: 69060613 addi x12,x12,1680 # 800104a0 +80006e18: 00162023 sw x1,0(x12) +80006e1c: 00000013 addi x0,x0,0 +80006e20: 0000a517 auipc x10,0xa +80006e24: d7950513 addi x10,x10,-647 # 80010b99 +80006e28: 00000013 addi x0,x0,0 +80006e2c: 00000013 addi x0,x0,0 +80006e30: 00000013 addi x0,x0,0 +80006e34: 00000013 addi x0,x0,0 +80006e38: 00000013 addi x0,x0,0 +80006e3c: 00000013 addi x0,x0,0 +80006e40: 0001b097 auipc x1,0x1b +80006e44: 724080e7 jalr x1,1828(x1) # 80022564 +80006e48: 00009517 auipc x10,0x9 +80006e4c: 66052503 lw x10,1632(x10) # 800104a8 +80006e50: 02000593 addi x11,x0,32 +80006e54: 1c4000ef jal x1,80007018 +80006e58: 00000013 addi x0,x0,0 +80006e5c: 00000013 addi x0,x0,0 +80006e60: 00009517 auipc x10,0x9 +80006e64: 66850513 addi x10,x10,1640 # 800104c8 +80006e68: 00000013 addi x0,x0,0 +80006e6c: 00000013 addi x0,x0,0 +80006e70: 00000013 addi x0,x0,0 +80006e74: 00000013 addi x0,x0,0 +80006e78: 00000013 addi x0,x0,0 +80006e7c: 00000013 addi x0,x0,0 +80006e80: 0001b097 auipc x1,0x1b +80006e84: 6e4080e7 jalr x1,1764(x1) # 80022564 +80006e88: 00000013 addi x0,x0,0 +80006e8c: 00000013 addi x0,x0,0 +80006e90: 00000013 addi x0,x0,0 +80006e94: 00000013 addi x0,x0,0 +80006e98: 00000013 addi x0,x0,0 +80006e9c: 00000013 addi x0,x0,0 +80006ea0: 0000a517 auipc x10,0xa +80006ea4: d0950513 addi x10,x10,-759 # 80010ba9 +80006ea8: 00000013 addi x0,x0,0 +80006eac: 00000013 addi x0,x0,0 +80006eb0: 00000013 addi x0,x0,0 +80006eb4: 00000013 addi x0,x0,0 +80006eb8: 00000013 addi x0,x0,0 +80006ebc: 00000013 addi x0,x0,0 +80006ec0: 0001b097 auipc x1,0x1b +80006ec4: 6a4080e7 jalr x1,1700(x1) # 80022564 +80006ec8: 00009517 auipc x10,0x9 +80006ecc: 5e852503 lw x10,1512(x10) # 800104b0 +80006ed0: 02000593 addi x11,x0,32 +80006ed4: 144000ef jal x1,80007018 +80006ed8: 00000013 addi x0,x0,0 +80006edc: 00000013 addi x0,x0,0 +80006ee0: 00009517 auipc x10,0x9 +80006ee4: 5e850513 addi x10,x10,1512 # 800104c8 +80006ee8: 00000013 addi x0,x0,0 +80006eec: 00000013 addi x0,x0,0 +80006ef0: 00000013 addi x0,x0,0 +80006ef4: 00000013 addi x0,x0,0 +80006ef8: 00000013 addi x0,x0,0 +80006efc: 00000013 addi x0,x0,0 +80006f00: 0001b097 auipc x1,0x1b +80006f04: 664080e7 jalr x1,1636(x1) # 80022564 +80006f08: 00000013 addi x0,x0,0 +80006f0c: 00000013 addi x0,x0,0 +80006f10: 00000013 addi x0,x0,0 +80006f14: 00000013 addi x0,x0,0 +80006f18: 00000013 addi x0,x0,0 +80006f1c: 00000013 addi x0,x0,0 +80006f20: 0000a517 auipc x10,0xa +80006f24: c9950513 addi x10,x10,-871 # 80010bb9 +80006f28: 00000013 addi x0,x0,0 +80006f2c: 00000013 addi x0,x0,0 +80006f30: 00000013 addi x0,x0,0 +80006f34: 00000013 addi x0,x0,0 +80006f38: 00000013 addi x0,x0,0 +80006f3c: 00000013 addi x0,x0,0 +80006f40: 0001b097 auipc x1,0x1b +80006f44: 624080e7 jalr x1,1572(x1) # 80022564 +80006f48: 00009517 auipc x10,0x9 +80006f4c: 57052503 lw x10,1392(x10) # 800104b8 +80006f50: 02000593 addi x11,x0,32 +80006f54: 0c4000ef jal x1,80007018 +80006f58: 00000013 addi x0,x0,0 +80006f5c: 00000013 addi x0,x0,0 +80006f60: 00009517 auipc x10,0x9 +80006f64: 56850513 addi x10,x10,1384 # 800104c8 +80006f68: 00000013 addi x0,x0,0 +80006f6c: 00000013 addi x0,x0,0 +80006f70: 00000013 addi x0,x0,0 +80006f74: 00000013 addi x0,x0,0 +80006f78: 00000013 addi x0,x0,0 +80006f7c: 00000013 addi x0,x0,0 +80006f80: 0001b097 auipc x1,0x1b +80006f84: 5e4080e7 jalr x1,1508(x1) # 80022564 +80006f88: 00000013 addi x0,x0,0 +80006f8c: 00000013 addi x0,x0,0 +80006f90: 00000013 addi x0,x0,0 +80006f94: 00000013 addi x0,x0,0 +80006f98: 00000013 addi x0,x0,0 +80006f9c: 00000013 addi x0,x0,0 +80006fa0: 0000a517 auipc x10,0xa +80006fa4: c2950513 addi x10,x10,-983 # 80010bc9 +80006fa8: 00000013 addi x0,x0,0 +80006fac: 00000013 addi x0,x0,0 +80006fb0: 00000013 addi x0,x0,0 +80006fb4: 00000013 addi x0,x0,0 +80006fb8: 00000013 addi x0,x0,0 +80006fbc: 00000013 addi x0,x0,0 +80006fc0: 0001b097 auipc x1,0x1b +80006fc4: 5a4080e7 jalr x1,1444(x1) # 80022564 +80006fc8: 00009517 auipc x10,0x9 +80006fcc: 4f852503 lw x10,1272(x10) # 800104c0 +80006fd0: 02000593 addi x11,x0,32 +80006fd4: 044000ef jal x1,80007018 +80006fd8: 00000013 addi x0,x0,0 +80006fdc: 00000013 addi x0,x0,0 +80006fe0: 00009517 auipc x10,0x9 +80006fe4: 4e850513 addi x10,x10,1256 # 800104c8 +80006fe8: 00000013 addi x0,x0,0 +80006fec: 00000013 addi x0,x0,0 +80006ff0: 00000013 addi x0,x0,0 +80006ff4: 00000013 addi x0,x0,0 +80006ff8: 00000013 addi x0,x0,0 +80006ffc: 00000013 addi x0,x0,0 +80007000: 0001b097 auipc x1,0x1b +80007004: 564080e7 jalr x1,1380(x1) # 80022564 +80007008: 00009617 auipc x12,0x9 +8000700c: 49860613 addi x12,x12,1176 # 800104a0 +80007010: 00062083 lw x1,0(x12) +80007014: 00008067 jalr x0,0(x1) + +80007018 : +80007018: 00000013 addi x0,x0,0 +8000701c: 00000013 addi x0,x0,0 +80007020: 00009617 auipc x12,0x9 +80007024: 4a860613 addi x12,x12,1192 # 800104c8 +80007028: 00000013 addi x0,x0,0 +8000702c: 00000013 addi x0,x0,0 +80007030: 00000013 addi x0,x0,0 +80007034: 00000013 addi x0,x0,0 +80007038: 00000013 addi x0,x0,0 +8000703c: 00000013 addi x0,x0,0 +80007040: 03000693 addi x13,x0,48 +80007044: 00d60023 sb x13,0(x12) +80007048: 07800693 addi x13,x0,120 +8000704c: 00d600a3 sb x13,1(x12) +80007050: 00260613 addi x12,x12,2 +80007054: 00058693 addi x13,x11,0 + +80007058 : +80007058: ffc68693 addi x13,x13,-4 +8000705c: 00d55733 srl x14,x10,x13 +80007060: 00f77713 andi x14,x14,15 +80007064: 00a00793 addi x15,x0,10 +80007068: 00f74663 blt x14,x15,80007074 +8000706c: 05770713 addi x14,x14,87 +80007070: 0080006f jal x0,80007078 + +80007074 : +80007074: 03070713 addi x14,x14,48 + +80007078 : +80007078: 00e60023 sb x14,0(x12) +8000707c: 00160613 addi x12,x12,1 +80007080: fc069ce3 bne x13,x0,80007058 +80007084: 00a00693 addi x13,x0,10 +80007088: 00d60023 sb x13,0(x12) +8000708c: 000600a3 sb x0,1(x12) +80007090: 00008067 jalr x0,0(x1) + +80007094 : +80007094: 00a00693 addi x13,x0,10 +80007098: 02d54663 blt x10,x13,800070c4 +8000709c: ff650513 addi x10,x10,-10 +800070a0: 03100713 addi x14,x0,49 +800070a4: 00d54c63 blt x10,x13,800070bc +800070a8: ff650513 addi x10,x10,-10 +800070ac: 03200713 addi x14,x0,50 +800070b0: 00d54663 blt x10,x13,800070bc +800070b4: ff650513 addi x10,x10,-10 +800070b8: 03300713 addi x14,x0,51 +800070bc: 00e60023 sb x14,0(x12) +800070c0: 00160613 addi x12,x12,1 +800070c4: 03050513 addi x10,x10,48 +800070c8: 00a60023 sb x10,0(x12) +800070cc: 00a00693 addi x13,x0,10 +800070d0: 00d600a3 sb x13,1(x12) +800070d4: 00060123 sb x0,2(x12) +800070d8: 00008067 jalr x0,0(x1) +800070dc: 00000013 addi x0,x0,0 +800070e0: 00000013 addi x0,x0,0 +800070e4: 00000013 addi x0,x0,0 +800070e8: 00000013 addi x0,x0,0 +800070ec: 00000013 addi x0,x0,0 +800070f0: 00000013 addi x0,x0,0 +800070f4: 00000013 addi x0,x0,0 +800070f8: 00000013 addi x0,x0,0 +800070fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80022000 : +80022000: 10010737 lui x14,0x10010 +80022004: 00072023 sw x0,0(x14) # 10010000 +80022008: fffe3397 auipc x7,0xfffe3 +8002200c: 1f838393 addi x7,x7,504 # 80005200 +80022010: 00038067 jalr x0,0(x7) + +80022014 : +80022014: fff00713 addi x14,x0,-1 +80022018: 100143b7 lui x7,0x10014 +8002201c: 00e3a023 sw x14,0(x7) # 10014000 +80022020: 00e3a223 sw x14,4(x7) +80022024: fffe3397 auipc x7,0xfffe3 +80022028: 1dc38393 addi x7,x7,476 # 80005200 +8002202c: 00038067 jalr x0,0(x7) + +80022030 : +80022030: 10000737 lui x14,0x10000 +80022034: 01070713 addi x14,x14,16 # 10000010 +80022038: 00070023 sb x0,0(x14) +8002203c: fffe3397 auipc x7,0xfffe3 +80022040: 1c438393 addi x7,x7,452 # 80005200 +80022044: 00038067 jalr x0,0(x7) + +80022048 : +80022048: 00200393 addi x7,x0,2 +8002204c: 3443b073 csrrc x0,mip,x7 +80022050: fffe3397 auipc x7,0xfffe3 +80022054: 1b038393 addi x7,x7,432 # 80005200 +80022058: 00038067 jalr x0,0(x7) + +8002205c : +8002205c: fffe3397 auipc x7,0xfffe3 +80022060: 1a438393 addi x7,x7,420 # 80005200 +80022064: 00038067 jalr x0,0(x7) + +80022068 : +80022068: 20000413 addi x8,x0,512 +8002206c: 34443073 csrrc x0,mip,x8 +80022070: 34402473 csrrs x8,mip,x0 +80022074: 00001337 lui x6,0x1 +80022078: 80030313 addi x6,x6,-2048 # 800 +8002207c: 00647433 and x8,x8,x6 +80022080: 00830863 beq x6,x8,80022090 +80022084: 10000737 lui x14,0x10000 +80022088: 01870713 addi x14,x14,24 # 10000018 +8002208c: 00070023 sb x0,0(x14) +80022090: fffe3397 auipc x7,0xfffe3 +80022094: 17038393 addi x7,x7,368 # 80005200 +80022098: 00038067 jalr x0,0(x7) + +8002209c : +8002209c: fffe2317 auipc x6,0xfffe2 +800220a0: 3dc30313 addi x6,x6,988 # 80004478 +800220a4: 00030067 jalr x0,0(x6) +800220a8: fffe3397 auipc x7,0xfffe3 +800220ac: 15838393 addi x7,x7,344 # 80005200 +800220b0: 00038067 jalr x0,0(x7) + +800220b4 : +800220b4: fffe2317 auipc x6,0xfffe2 +800220b8: 3c430313 addi x6,x6,964 # 80004478 +800220bc: 00030067 jalr x0,0(x6) +800220c0: fffe3397 auipc x7,0xfffe3 +800220c4: 14038393 addi x7,x7,320 # 80005200 +800220c8: 00038067 jalr x0,0(x7) + +800220cc : +800220cc: fffe2317 auipc x6,0xfffe2 +800220d0: 3ac30313 addi x6,x6,940 # 80004478 +800220d4: 00030067 jalr x0,0(x6) +800220d8: fffe3397 auipc x7,0xfffe3 +800220dc: 12838393 addi x7,x7,296 # 80005200 +800220e0: 00038067 jalr x0,0(x7) + +800220e4 : +800220e4: 30401073 csrrw x0,mie,x0 +800220e8: 34401073 csrrw x0,mip,x0 +800220ec: 34101073 csrrw x0,mepc,x0 +800220f0: 34301073 csrrw x0,mtval,x0 +800220f4: 34201073 csrrw x0,mcause,x0 +800220f8: 00000013 addi x0,x0,0 +800220fc: 00000013 addi x0,x0,0 +80022100: fffe6317 auipc x6,0xfffe6 +80022104: 01030313 addi x6,x6,16 # 80008110 +80022108: 00000013 addi x0,x0,0 +8002210c: 00000013 addi x0,x0,0 +80022110: 00000013 addi x0,x0,0 +80022114: 00000013 addi x0,x0,0 +80022118: 00000013 addi x0,x0,0 +8002211c: 00000013 addi x0,x0,0 + +80022120 : +80022120: 34031473 csrrw x8,mscratch,x6 +80022124: 24832823 sw x8,592(x6) + +80022128 : +80022128: fff00393 addi x7,x0,-1 +8002212c: 100144b7 lui x9,0x10014 +80022130: 0074a023 sw x7,0(x9) # 10014000 +80022134: 0074a223 sw x7,4(x9) +80022138: 00000013 addi x0,x0,0 + +8002213c : +8002213c: 00000393 addi x7,x0,0 +80022140: 22732c23 sw x7,568(x6) + +80022144 : +80022144: 30502473 csrrs x8,mtvec,x0 +80022148: 24832423 sw x8,584(x6) +8002214c: 00347393 andi x7,x8,3 +80022150: ffc3f393 andi x7,x7,-4 +80022154: 23032483 lw x9,560(x6) +80022158: e2848493 addi x9,x9,-472 +8002215c: 0074e3b3 or x7,x9,x7 +80022160: 24732023 sw x7,576(x6) +80022164: 30539073 csrrw x0,mtvec,x7 +80022168: 30502773 csrrs x14,mtvec,x0 +8002216c: 0e770c63 beq x14,x7,80022264 +80022170: 30541073 csrrw x0,mtvec,x8 +80022174: 0a040863 beq x8,x0,80022224 +80022178: 24832023 sw x8,576(x6) + +8002217c : +8002217c: ffc47393 andi x7,x8,-4 +80022180: 1d838413 addi x8,x7,472 +80022184: 00030113 addi x2,x6,0 +80022188: 00000013 addi x0,x0,0 +8002218c: 00000013 addi x0,x0,0 +80022190: 00000013 addi x0,x0,0 +80022194: 00000013 addi x0,x0,0 +80022198: 00000013 addi x0,x0,0 +8002219c: 00000013 addi x0,x0,0 +800221a0: 00000717 auipc x14,0x0 +800221a4: 04c70713 addi x14,x14,76 # 800221ec +800221a8: 00000013 addi x0,x0,0 +800221ac: 00000013 addi x0,x0,0 +800221b0: 00000013 addi x0,x0,0 +800221b4: 00000013 addi x0,x0,0 +800221b8: 00000013 addi x0,x0,0 +800221bc: 00000013 addi x0,x0,0 +800221c0: 00000797 auipc x15,0x0 +800221c4: 0a478793 addi x15,x15,164 # 80022264 +800221c8: 00000013 addi x0,x0,0 +800221cc: 00000013 addi x0,x0,0 +800221d0: 00000013 addi x0,x0,0 +800221d4: 00000013 addi x0,x0,0 +800221d8: 00000013 addi x0,x0,0 +800221dc: 00000013 addi x0,x0,0 +800221e0: 00f3f663 bgeu x7,x15,800221ec +800221e4: 00877463 bgeu x14,x8,800221ec +800221e8: 03c0006f jal x0,80022224 + +800221ec : +800221ec: 0003a783 lw x15,0(x7) +800221f0: 00f32023 sw x15,0(x6) +800221f4: 0004a703 lw x14,0(x9) +800221f8: 00e3a023 sw x14,0(x7) +800221fc: 0003a783 lw x15,0(x7) +80022200: 00e79a63 bne x15,x14,80022214 +80022204: 00438393 addi x7,x7,4 +80022208: 00430313 addi x6,x6,4 +8002220c: 00448493 addi x9,x9,4 +80022210: fc741ee3 bne x8,x7,800221ec + +80022214 : +80022214: 0000100f fence.i +80022218: 34002373 csrrs x6,mscratch,x0 +8002221c: 22932823 sw x9,560(x6) +80022220: 04740263 beq x8,x7,80022264 + +80022224 : +80022224: 00038413 addi x8,x7,0 +80022228: 00000013 addi x0,x0,0 +8002222c: 00000013 addi x0,x0,0 +80022230: 00000013 addi x0,x0,0 +80022234: 00000013 addi x0,x0,0 +80022238: 00000013 addi x0,x0,0 +8002223c: 00000013 addi x0,x0,0 +80022240: fffe2797 auipc x15,0xfffe2 +80022244: 24878793 addi x15,x15,584 # 80004488 +80022248: 00000013 addi x0,x0,0 +8002224c: 00000013 addi x0,x0,0 +80022250: 00000013 addi x0,x0,0 +80022254: 00000013 addi x0,x0,0 +80022258: 00000013 addi x0,x0,0 +8002225c: 00000013 addi x0,x0,0 +80022260: 00078067 jalr x0,0(x15) + +80022264 : +80022264: 00000013 addi x0,x0,0 + +80022268 : +80022268: 000022b7 lui x5,0x2 +8002226c: 80028293 addi x5,x5,-2048 # 1800 +80022270: 30029073 csrrw x0,mstatus,x5 +80022274: 31001073 csrrw x0,0x310,x0 +80022278: 32001073 csrrw x0,mcountinhibit,x0 +8002227c: 32301073 csrrw x0,mhpmevent3,x0 +80022280: 32401073 csrrw x0,mhpmevent4,x0 +80022284: 32501073 csrrw x0,mhpmevent5,x0 +80022288: 32601073 csrrw x0,mhpmevent6,x0 +8002228c: 32701073 csrrw x0,mhpmevent7,x0 +80022290: 32801073 csrrw x0,mhpmevent8,x0 +80022294: 32901073 csrrw x0,mhpmevent9,x0 +80022298: 32a01073 csrrw x0,mhpmevent10,x0 +8002229c: 32b01073 csrrw x0,mhpmevent11,x0 +800222a0: 32c01073 csrrw x0,mhpmevent12,x0 +800222a4: 32d01073 csrrw x0,mhpmevent13,x0 +800222a8: 32e01073 csrrw x0,mhpmevent14,x0 +800222ac: 32f01073 csrrw x0,mhpmevent15,x0 +800222b0: 33001073 csrrw x0,mhpmevent16,x0 +800222b4: 33101073 csrrw x0,mhpmevent17,x0 +800222b8: 33201073 csrrw x0,mhpmevent18,x0 +800222bc: 33301073 csrrw x0,mhpmevent19,x0 +800222c0: 33401073 csrrw x0,mhpmevent20,x0 +800222c4: 33501073 csrrw x0,mhpmevent21,x0 +800222c8: 33601073 csrrw x0,mhpmevent22,x0 +800222cc: 33701073 csrrw x0,mhpmevent23,x0 +800222d0: 33801073 csrrw x0,mhpmevent24,x0 +800222d4: 33901073 csrrw x0,mhpmevent25,x0 +800222d8: 33a01073 csrrw x0,mhpmevent26,x0 +800222dc: 33b01073 csrrw x0,mhpmevent27,x0 +800222e0: 33c01073 csrrw x0,mhpmevent28,x0 +800222e4: 33d01073 csrrw x0,mhpmevent29,x0 +800222e8: 33e01073 csrrw x0,mhpmevent30,x0 +800222ec: 33f01073 csrrw x0,mhpmevent31,x0 +800222f0: 00000013 addi x0,x0,0 +800222f4: 00000013 addi x0,x0,0 +800222f8: 00000013 addi x0,x0,0 +800222fc: 00000013 addi x0,x0,0 +80022300: fffe6317 auipc x6,0xfffe6 +80022304: e0830313 addi x6,x6,-504 # 80008108 +80022308: 00000013 addi x0,x0,0 +8002230c: 00000013 addi x0,x0,0 +80022310: 00000013 addi x0,x0,0 +80022314: 00000013 addi x0,x0,0 +80022318: 00000013 addi x0,x0,0 +8002231c: 00000013 addi x0,x0,0 +80022320: 00032023 sw x0,0(x6) + +80022324 : +80022324: feedc0b7 lui x1,0xfeedc +80022328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb8ead> +8002232c: 01909793 slli x15,x1,0x19 +80022330: 0070d113 srli x2,x1,0x7 +80022334: 00f16133 or x2,x2,x15 +80022338: 01911793 slli x15,x2,0x19 +8002233c: 00715193 srli x3,x2,0x7 +80022340: 00f1e1b3 or x3,x3,x15 +80022344: 01919793 slli x15,x3,0x19 +80022348: 0071d213 srli x4,x3,0x7 +8002234c: 00f26233 or x4,x4,x15 +80022350: 01921793 slli x15,x4,0x19 +80022354: 00725293 srli x5,x4,0x7 +80022358: 00f2e2b3 or x5,x5,x15 +8002235c: 01929793 slli x15,x5,0x19 +80022360: 0072d313 srli x6,x5,0x7 +80022364: 00f36333 or x6,x6,x15 +80022368: 01931793 slli x15,x6,0x19 +8002236c: 00735393 srli x7,x6,0x7 +80022370: 00f3e3b3 or x7,x7,x15 +80022374: 01939793 slli x15,x7,0x19 +80022378: 0073d413 srli x8,x7,0x7 +8002237c: 00f46433 or x8,x8,x15 +80022380: 01941793 slli x15,x8,0x19 +80022384: 00745493 srli x9,x8,0x7 +80022388: 00f4e4b3 or x9,x9,x15 +8002238c: 01949793 slli x15,x9,0x19 +80022390: 0074d513 srli x10,x9,0x7 +80022394: 00f56533 or x10,x10,x15 +80022398: 01951793 slli x15,x10,0x19 +8002239c: 00755593 srli x11,x10,0x7 +800223a0: 00f5e5b3 or x11,x11,x15 +800223a4: 01959793 slli x15,x11,0x19 +800223a8: 0075d613 srli x12,x11,0x7 +800223ac: 00f66633 or x12,x12,x15 +800223b0: 01961793 slli x15,x12,0x19 +800223b4: 00765693 srli x13,x12,0x7 +800223b8: 00f6e6b3 or x13,x13,x15 +800223bc: 01969793 slli x15,x13,0x19 +800223c0: 0076d713 srli x14,x13,0x7 +800223c4: 00f76733 or x14,x14,x15 +800223c8: fab807b7 lui x15,0xfab80 +800223cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab5cbb6> +800223d0: 7d5c0837 lui x16,0x7d5c0 +800223d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800223d8: 01981793 slli x15,x16,0x19 +800223dc: 00785893 srli x17,x16,0x7 +800223e0: 00f8e8b3 or x17,x17,x15 +800223e4: 01989793 slli x15,x17,0x19 +800223e8: 0078d913 srli x18,x17,0x7 +800223ec: 00f96933 or x18,x18,x15 +800223f0: 01991793 slli x15,x18,0x19 +800223f4: 00795993 srli x19,x18,0x7 +800223f8: 00f9e9b3 or x19,x19,x15 +800223fc: 01999793 slli x15,x19,0x19 +80022400: 0079da13 srli x20,x19,0x7 +80022404: 00fa6a33 or x20,x20,x15 +80022408: 019a1793 slli x15,x20,0x19 +8002240c: 007a5a93 srli x21,x20,0x7 +80022410: 00faeab3 or x21,x21,x15 +80022414: 019a9793 slli x15,x21,0x19 +80022418: 007adb13 srli x22,x21,0x7 +8002241c: 00fb6b33 or x22,x22,x15 +80022420: 019b1793 slli x15,x22,0x19 +80022424: 007b5b93 srli x23,x22,0x7 +80022428: 00fbebb3 or x23,x23,x15 +8002242c: 019b9793 slli x15,x23,0x19 +80022430: 007bdc13 srli x24,x23,0x7 +80022434: 00fc6c33 or x24,x24,x15 +80022438: 019c1793 slli x15,x24,0x19 +8002243c: 007c5c93 srli x25,x24,0x7 +80022440: 00fcecb3 or x25,x25,x15 +80022444: 019c9793 slli x15,x25,0x19 +80022448: 007cdd13 srli x26,x25,0x7 +8002244c: 00fd6d33 or x26,x26,x15 +80022450: 019d1793 slli x15,x26,0x19 +80022454: 007d5d93 srli x27,x26,0x7 +80022458: 00fdedb3 or x27,x27,x15 +8002245c: 019d9793 slli x15,x27,0x19 +80022460: 007dde13 srli x28,x27,0x7 +80022464: 00fe6e33 or x28,x28,x15 +80022468: 019e1793 slli x15,x28,0x19 +8002246c: 007e5e93 srli x29,x28,0x7 +80022470: 00feeeb3 or x29,x29,x15 +80022474: 019e9793 slli x15,x29,0x19 +80022478: 007edf13 srli x30,x29,0x7 +8002247c: 00ff6f33 or x30,x30,x15 +80022480: 019f1793 slli x15,x30,0x19 +80022484: 007f5f93 srli x31,x30,0x7 +80022488: 00ffefb3 or x31,x31,x15 +8002248c: 00000013 addi x0,x0,0 +80022490: 00000013 addi x0,x0,0 +80022494: 00000013 addi x0,x0,0 +80022498: 00000013 addi x0,x0,0 +8002249c: 00000013 addi x0,x0,0 +800224a0: ffff0117 auipc x2,0xffff0 +800224a4: c1010113 addi x2,x2,-1008 # 800120b0 +800224a8: 00000013 addi x0,x0,0 +800224ac: 00000013 addi x0,x0,0 +800224b0: 00000013 addi x0,x0,0 +800224b4: 00000013 addi x0,x0,0 +800224b8: 00000013 addi x0,x0,0 +800224bc: 00000013 addi x0,x0,0 + +800224c0 : +800224c0: 6f5ca337 lui x6,0x6f5ca +800224c4: 30930313 addi x6,x6,777 # 6f5ca309 +800224c8: 00000013 addi x0,x0,0 +800224cc: 00000013 addi x0,x0,0 +800224d0: 00000013 addi x0,x0,0 +800224d4: 00000013 addi x0,x0,0 +800224d8: 00000013 addi x0,x0,0 +800224dc: 00000013 addi x0,x0,0 +800224e0: fffe3197 auipc x3,0xfffe3 +800224e4: 02018193 addi x3,x3,32 # 80005500 +800224e8: 00000013 addi x0,x0,0 +800224ec: 00000013 addi x0,x0,0 +800224f0: 00000013 addi x0,x0,0 +800224f4: 00000013 addi x0,x0,0 +800224f8: 00000013 addi x0,x0,0 +800224fc: 00000013 addi x0,x0,0 +80022500: 00012203 lw x4,0(x2) +80022504: 00620863 beq x4,x6,80022514 +80022508: 000182e7 jalr x5,0(x3) +8002250c: 800224c0 .word 0x800224c0 +80022510: 80011659 .word 0x80011659 +80022514: 00410113 addi x2,x2,4 +80022518: 00000013 addi x0,x0,0 +8002251c: 00000013 addi x0,x0,0 +80022520: fffe6197 auipc x3,0xfffe6 +80022524: e9018193 addi x3,x3,-368 # 800083b0 +80022528: 00000013 addi x0,x0,0 +8002252c: 00000013 addi x0,x0,0 +80022530: 00000013 addi x0,x0,0 +80022534: 00000013 addi x0,x0,0 +80022538: 00000013 addi x0,x0,0 +8002253c: 00000013 addi x0,x0,0 +80022540: fffde317 auipc x6,0xfffde +80022544: b0030313 addi x6,x6,-1280 # 80000040 +80022548: 00000013 addi x0,x0,0 +8002254c: 00000013 addi x0,x0,0 +80022550: 00000013 addi x0,x0,0 +80022554: 00000013 addi x0,x0,0 +80022558: 00000013 addi x0,x0,0 +8002255c: 00000013 addi x0,x0,0 +80022560: 00030067 jalr x0,0(x6) + +80022564 : +80022564: 00054303 lbu x6,0(x10) +80022568: 00030a63 beq x6,x0,8002257c +8002256c: 100003b7 lui x7,0x10000 +80022570: 00638023 sb x6,0(x7) # 10000000 +80022574: 00150513 addi x10,x10,1 +80022578: fedff06f jal x0,80022564 +8002257c: 00008067 jalr x0,0(x1) + +80022580 : +80022580: ff010113 addi x2,x2,-16 +80022584: 00112023 sw x1,0(x2) +80022588: 00812223 sw x8,4(x2) +8002258c: 00000097 auipc x1,0x0 +80022590: fd8080e7 jalr x1,-40(x1) # 80022564 +80022594: 00412403 lw x8,4(x2) +80022598: 00012083 lw x1,0(x2) +8002259c: 01010113 addi x2,x2,16 +800225a0: 00008067 jalr x0,0(x1) + +800225a4 : +800225a4: 00100093 addi x1,x0,1 +800225a8: fffff297 auipc x5,0xfffff +800225ac: c5828293 addi x5,x5,-936 # 80021200 + +800225b0 : +800225b0: 0012a023 sw x1,0(x5) +800225b4: 0002a223 sw x0,4(x5) + +800225b8 : +800225b8: 00000013 addi x0,x0,0 +800225bc: ffdff06f jal x0,800225b8 +800225c0: 0000006f jal x0,800225c0 + +800225c4 : +800225c4: 00300093 addi x1,x0,3 +800225c8: fffff297 auipc x5,0xfffff +800225cc: c3828293 addi x5,x5,-968 # 80021200 + +800225d0 : +800225d0: 0012a023 sw x1,0(x5) +800225d4: 0002a223 sw x0,4(x5) + +800225d8 : +800225d8: 00000013 addi x0,x0,0 +800225dc: ffdff06f jal x0,800225d8 +800225e0: 0000006f jal x0,800225e0 + +800225e4 : +800225e4: 00100513 addi x10,x0,1 +800225e8: 100105b7 lui x11,0x10010 +800225ec: 00a5a023 sw x10,0(x11) # 10010000 +800225f0: 00008067 jalr x0,0(x1) + +800225f4 : +800225f4: 100105b7 lui x11,0x10010 +800225f8: 0005a023 sw x0,0(x11) # 10010000 +800225fc: 00008067 jalr x0,0(x1) + +80022600 : +80022600: 00100513 addi x10,x0,1 +80022604: 100005b7 lui x11,0x10000 +80022608: 01058593 addi x11,x11,16 # 10000010 +8002260c: 00a58023 sb x10,0(x11) +80022610: 00008067 jalr x0,0(x1) + +80022614 : +80022614: 100005b7 lui x11,0x10000 +80022618: 01058593 addi x11,x11,16 # 10000010 +8002261c: 00058023 sb x0,0(x11) +80022620: 00008067 jalr x0,0(x1) +80022624: 00000013 addi x0,x0,0 +80022628: 00000013 addi x0,x0,0 +8002262c: 00000013 addi x0,x0,0 +80022630: 00000013 addi x0,x0,0 +80022634: 00000013 addi x0,x0,0 +80022638: 00000013 addi x0,x0,0 +8002263c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zksed-sm4ed-00.elf.objdump b/riscv-tests/rv32-Zksed-sm4ed-00.elf.objdump new file mode 100644 index 0000000..4dd9309 --- /dev/null +++ b/riscv-tests/rv32-Zksed-sm4ed-00.elf.objdump @@ -0,0 +1,19184 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksed/Zksed-sm4ed-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksed/Zksed-sm4ed-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003c memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009dc0 memsz 0x00009dc0 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009d80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001ce60 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80028f00 80028f00 00027f00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003c 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003ec4 00000000 00000000 0002967c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 00000000 00000000 0002d540 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5bd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d5e0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d5f8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 00000000 00000000 0002d620 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d6ab 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80028f00 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 cckUQXcY.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b0 +800081c0 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b1 +8000d843 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b2 +8000d876 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b3 +8000d8a9 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b4 +80008200 l .text.rvtest 00000000 failedtest_x14_x13 +8000d8dc l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b5 +8000d90f l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b5_str +80000168 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b6 +8000d942 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b6_str +80000194 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b7 +8000d975 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b7_str +800001c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b8 +8000d9a8 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b8_str +800001ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b9 +8000d9db l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b9_str +80000218 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b10 +8000da0f l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b10_str +80000244 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b11 +8000da44 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b11_str +80000274 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b12 +8000da79 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b13 +800081d8 l .text.rvtest 00000000 failedtest_x8_x7 +8000daae l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b14 +8000dae3 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b15 +8000db18 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b15_str +80000330 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b16 +8000db4d l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b16_str +8000035c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b17 +8000db82 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b17_str +80000388 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b18 +8000dbb7 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b18_str +800003b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b19 +8000dbec l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b19_str +800003e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b20 +8000dc21 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b20_str +8000040c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b21 +8000dc56 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b21_str +80000438 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b22 +8000dc8b l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b22_str +80000464 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b23 +8000dcc0 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b23_str +80000494 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b24 +8000dcf5 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b24_str +800004c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b25 +8000dd2a l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b26 +8000dd5f l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b26_str +8000051c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b27 +8000dd94 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b27_str +80000548 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b28 +8000ddc9 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b28_str +80000578 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b29 +8000ddfe l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b29_str +800005a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b30 +8000de33 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b30_str +800005d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_b31 +8000de68 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_b31_str +800005fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b0 +8000de9d l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b0_str +80000628 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b1 +8000ded1 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b1_str +80000654 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b2 +8000df05 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b3 +8000df39 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b3_str +800006ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b4 +8000df6d l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b4_str +800006d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b5 +8000dfa1 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b5_str +80000704 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b6 +8000dfd5 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b6_str +80000738 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b7 +8000e009 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b7_str +80000764 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b8 +8000e03d l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b8_str +80000790 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b9 +8000e071 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b9_str +800007bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b10 +8000e0a5 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b10_str +800007ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b11 +8000e0da l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b11_str +80000818 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b12 +8000e10f l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b12_str +8000084c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b13 +8000e144 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b13_str +80000878 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b14 +8000e179 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b14_str +800008a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b15 +8000e1ae l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b15_str +800008d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b16 +8000e1e3 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b16_str +800008fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b17 +8000e218 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b17_str +80000928 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b18 +8000e24d l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b18_str +80000954 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b19 +8000e282 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b19_str +80000984 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b20 +8000e2b7 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b20_str +800009b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b21 +8000e2ec l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b21_str +800009dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b22 +8000e321 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b22_str +80000a08 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b23 +8000e356 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b23_str +80000a34 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b24 +8000e38b l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b24_str +80000a60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b25 +8000e3c0 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b25_str +80000a8c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b26 +8000e3f5 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b26_str +80000ab8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b27 +8000e42a l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b27_str +80000ae8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b28 +8000e45f l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b28_str +80000b14 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b29 +8000e494 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b29_str +80000b40 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b30 +8000e4c9 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b30_str +80000b6c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_b31 +8000e4fe l .data 00000000 Zksed_sm4ed_cg_cp_rs2_b31_str +80000b98 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b0 +8000e533 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b0_str +80000bc4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b1 +8000e566 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b1_str +80000bf4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b2 +8000e599 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b2_str +80000c20 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b3 +8000e5cc l .data 00000000 Zksed_sm4ed_cg_cp_rd_b3_str +80000c54 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b4 +8000e5ff l .data 00000000 Zksed_sm4ed_cg_cp_rd_b4_str +80000c80 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b5 +8000e632 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b5_str +80000cac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b6 +8000e665 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b6_str +80000ce0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b7 +8000e698 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b7_str +80000d0c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b8 +8000e6cb l .data 00000000 Zksed_sm4ed_cg_cp_rd_b8_str +80000d38 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b9 +8000e6fe l .data 00000000 Zksed_sm4ed_cg_cp_rd_b9_str +80000d64 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b10 +8000e731 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b10_str +80000d90 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b11 +8000e765 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b11_str +80000dbc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b12 +8000e799 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b12_str +80000de8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b13 +8000e7cd l .data 00000000 Zksed_sm4ed_cg_cp_rd_b13_str +80000e14 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b14 +8000e801 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b14_str +80000e40 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b15 +8000e835 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b15_str +80000e6c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b16 +8000e869 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b16_str +80000e98 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b17 +8000e89d l .data 00000000 Zksed_sm4ed_cg_cp_rd_b17_str +80000ec8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b18 +8000e8d1 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b18_str +80000ef4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b19 +8000e905 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b19_str +80000f20 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b20 +8000e939 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b20_str +80000f50 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b21 +8000e96d l .data 00000000 Zksed_sm4ed_cg_cp_rd_b21_str +80000f7c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b22 +8000e9a1 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b22_str +80000fa8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b23 +8000e9d5 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b23_str +80000fd4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b24 +8000ea09 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b24_str +80001000 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b25 +8000ea3d l .data 00000000 Zksed_sm4ed_cg_cp_rd_b25_str +8000102c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b26 +8000ea71 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b26_str +80001058 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b27 +8000eaa5 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b27_str +80001088 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b28 +8000ead9 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b28_str +800010b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b29 +8000eb0d l .data 00000000 Zksed_sm4ed_cg_cp_rd_b29_str +800010e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b30 +8000eb41 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b30_str +80001110 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rd_b31 +8000eb75 l .data 00000000 Zksed_sm4ed_cg_cp_rd_b31_str +8000113c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x0 +8000eba9 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x0_str +80001168 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x1 +8000ebe4 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x1_str +80001194 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x2 +8000ec1f l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x2_str +800011c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x80000000 +8000ec5a l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x80000000_str +800011ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x80000001 +8000ec9d l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x80000001_str +80001218 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffff +8000ece0 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffff_str +80001244 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffe +8000ed23 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffe_str +80001270 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff +8000ed66 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff_str +8000129c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe +8000eda9 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe_str +800012c8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc8872 +8000edec l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc8872_str +800012f4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaa +8000ee2f l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaa_str +80001320 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x55555555 +8000ee72 l .data 00000000 Zksed_sm4ed_cg_cp_rs1_edges_0x55555555_str +8000134c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x0 +8000eeb5 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x0_str +80001378 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x1 +8000eef1 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x1_str +800013a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x2 +8000ef2d l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x2_str +800013d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x80000000 +8000ef69 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x80000000_str +800013fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x80000001 +8000efac l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x80000001_str +80001428 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffff +8000efef l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffff_str +80001454 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffe +8000f032 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffe_str +80001480 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff +8000f075 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff_str +800014ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe +8000f0b8 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe_str +800014d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc8872 +8000f0fb l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc8872_str +80001504 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaa +8000f13e l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaa_str +80001530 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x55555555 +8000f181 l .data 00000000 Zksed_sm4ed_cg_cp_rs2_edges_0x55555555_str +8000155c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f1c4 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001588 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f217 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f26a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f2bd l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +8000160c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f317 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001638 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f371 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001664 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f3cb l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +80001690 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f425 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f47f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f4d9 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001714 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f533 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +80001740 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f58d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +8000176c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f5e7 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +80001798 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f63a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f68d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f6e0 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +8000181c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f73a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001848 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f794 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001874 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f7ee l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f848 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000f8a2 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +800018f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000f8fc l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001924 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000f956 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +80001950 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000f9b0 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +8000197c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fa0a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fa5d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fab0 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a00 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fb03 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a2c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fb5d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a58 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fbb7 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a84 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fc11 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001ab0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fc6b l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001adc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fcc5 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b08 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000fd1f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b34 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000fd79 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000fdd3 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b8c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000fe2d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bb8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000fe87 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001be4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000fee1 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c10 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ff3b l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c3c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ff9c l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c68 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000fffd l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001c94 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8001005e l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001cc0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +800100bf l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cec l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +80010120 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d18 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +80010181 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d44 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +800101e2 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d70 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010243 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001d9c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +800102a4 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dc8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +800102fe l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001df4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +80010358 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e20 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +800103b2 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e4c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +80010413 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e78 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +80010474 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001ea4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +800104d5 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001ed0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010536 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001efc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +80010597 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f28 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +800105f8 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f54 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +80010659 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f80 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +800106ba l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fac l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8001071b l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fd8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +80010775 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002004 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +800107cf l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +80002030 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010829 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +8000205c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8001088a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002088 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +800108eb l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8001094c l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +800109ad l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +8000210c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010a0e l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002138 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010a6f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002164 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010ad0 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +80002190 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010b31 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010b92 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010bec l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002214 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010c46 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +80002240 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010ca0 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +8000226c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010d01 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +80002298 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010d62 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80010dc3 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80010e24 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +8000231c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +80010e85 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002348 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80010ee6 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002374 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +80010f47 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +80010fa8 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +80011009 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +800023f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +80011063 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002424 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +800110bd l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +80002450 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +80011117 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +8000247c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +80011178 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +800111d9 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8001123a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +80002500 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8001129b l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +8000252c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +800112fc l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002558 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8001135d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002584 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +800113be l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8001141f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011480 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002608 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +800114da l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002634 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +80011534 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +80002660 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8001158e l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +8000268c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +800115ef l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026b8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +80011650 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026e4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +800116b1 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +80002710 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +80011712 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +8000273c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011773 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002768 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +800117d4 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +80002794 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +80011835 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011896 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +800118f7 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002818 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011951 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002844 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +800119ab l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +80002870 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011a05 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +8000289c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011a66 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028c8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011ac7 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +800028f4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011b28 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +80002920 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011b89 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +8000294c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011bea l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002978 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011c4b l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011cac l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011d0d l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +800029fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +80011d6e l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a28 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +80011dc8 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a54 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +80011e22 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a80 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80011e7c l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002aac l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +80011edd l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ad8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +80011f3e l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b04 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +80011f9f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b30 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +80012000 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b5c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012061 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b88 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800120c2 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bb4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012123 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002be0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +80012184 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c0c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800121e5 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c38 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8001223f l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c64 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012299 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c90 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800122f3 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cbc l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012354 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002ce8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800123b5 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d14 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +80012416 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d40 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +80012477 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d6c l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800124d8 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002d98 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012539 l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dc4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8001259a l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002df0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +800125fb l .data 00000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e1c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b0 +8001265c l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b0_str +80002e48 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b1 +80012696 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b1_str +80002e74 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b2 +800126d0 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b2_str +80002ea0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b3 +8001270a l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b3_str +80002ed4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b4 +80012744 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b4_str +80002f00 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b5 +8001277e l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b5_str +80002f2c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b6 +800127b8 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b6_str +80002f60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b7 +800127f2 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b7_str +80002f8c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b8 +8001282c l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b8_str +80002fb8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b9 +80012866 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b9_str +80002fe4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b10 +800128a0 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b10_str +80003010 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b11 +800128db l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b11_str +8000303c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b12 +80012916 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b12_str +80003068 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b13 +80012951 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b13_str +80003094 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b14 +8001298c l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b14_str +800030c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b15 +800129c7 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b15_str +800030ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b16 +80012a02 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b16_str +80003118 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b17 +80012a3d l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b17_str +80003144 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b18 +80012a78 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b18_str +80003170 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b19 +80012ab3 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b19_str +800031a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b20 +80012aee l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b20_str +800031d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b21 +80012b29 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b21_str +800031fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b22 +80012b64 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b22_str +8000322c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b23 +80012b9f l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b23_str +80003258 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b24 +80012bda l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b24_str +80003284 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b25 +80012c15 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b25_str +800032b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b26 +80012c50 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b26_str +800032dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b27 +80012c8b l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b27_str +80003308 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b28 +80012cc6 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b28_str +80003334 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b29 +80012d01 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b29_str +80003360 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b30 +80012d3c l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b30_str +8000338c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b31 +80012d77 l .data 00000000 Zksed_sm4ed_cg_cmp_rs1_rs2_b31_str +800033b8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b0 +80012db2 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b0_str +800033e4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b1 +80012deb l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b1_str +80003410 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b2 +80012e24 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b2_str +80003440 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b3 +80012e5d l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b3_str +80003474 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b4 +80012e96 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b4_str +800034a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b5 +80012ecf l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b5_str +800034d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b6 +80012f08 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b6_str +800034fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b7 +80012f41 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b7_str +80003528 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b8 +80012f7a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b8_str +80003554 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b9 +80012fb3 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b9_str +80003580 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b10 +80012fec l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b10_str +800035ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b11 +80013026 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b11_str +800035d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b12 +80013060 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b12_str +8000360c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b13 +8001309a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b13_str +80003638 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b14 +800130d4 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b14_str +80003664 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b15 +8001310e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b15_str +80003690 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b16 +80013148 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b16_str +800036bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b17 +80013182 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b17_str +800036e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b18 +800131bc l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b18_str +80003714 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b19 +800131f6 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b19_str +80003740 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b20 +80013230 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b20_str +8000376c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b21 +8001326a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b21_str +80003798 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b22 +800132a4 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b22_str +800037c8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b23 +800132de l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b23_str +800037f4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b24 +80013318 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b24_str +80003820 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b25 +80013352 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b25_str +8000384c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b26 +8001338c l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b26_str +80003878 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b27 +800133c6 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b27_str +800038a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b28 +80013400 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b28_str +800038d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b29 +8001343a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b29_str +800038fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b30 +80013474 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b30_str +80003928 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b31 +800134ae l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_b31_str +80003954 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b0 +800134e8 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b0_str +80003980 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b1 +80013521 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b1_str +800039b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b2 +8001355a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b2_str +800039dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b3 +80013593 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b3_str +80003a08 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b4 +800135cc l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b4_str +80003a34 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b5 +80013605 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b5_str +80003a60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b6 +8001363e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b6_str +80003a94 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b7 +80013677 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b7_str +80003ac0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b8 +800136b0 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b8_str +80003aec l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b9 +800136e9 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b9_str +80003b1c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b10 +80013722 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b10_str +80003b48 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b11 +8001375c l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b11_str +80003b74 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b12 +80013796 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b12_str +80003ba0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b13 +800137d0 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b13_str +80003bcc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b14 +8001380a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b14_str +80003bf8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b15 +80013844 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b15_str +80003c24 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b16 +8001387e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b16_str +80003c50 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b17 +800138b8 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b17_str +80003c7c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b18 +800138f2 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b18_str +80003ca8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b19 +8001392c l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b19_str +80003cd8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b20 +80013966 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b20_str +80003d04 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b21 +800139a0 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b21_str +80003d30 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b22 +800139da l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b22_str +80003d60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b23 +80013a14 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b23_str +80003d8c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b24 +80013a4e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b24_str +80003db8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b25 +80013a88 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b25_str +80003de4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b26 +80013ac2 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b26_str +80003e10 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b27 +80013afc l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b27_str +80003e40 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b28 +80013b36 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b28_str +80003e6c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b29 +80013b70 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b29_str +80003e98 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b30 +80013baa l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b30_str +80003ec4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b31 +80013be4 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs2_b31_str +80003ef0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0 +80013c1e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0_str +80003f1c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1 +80013c5b l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1_str +80003f48 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2 +80013c98 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2_str +80003f74 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3 +80013cd5 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3_str +80003fa8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4 +80013d12 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4_str +80003fd4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5 +80013d4f l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5_str +80004000 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6 +80013d8c l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6_str +8000402c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7 +80013dc9 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7_str +80004058 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8 +80013e06 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8_str +80004084 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9 +80013e43 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9_str +800040b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10 +80013e80 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10_str +800040dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11 +80013ebe l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11_str +80004108 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12 +80013efc l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12_str +8000413c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13 +80013f3a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13_str +80004168 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14 +80013f78 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14_str +80004194 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15 +80013fb6 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15_str +800041c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16 +80013ff4 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16_str +800041ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17 +80014032 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17_str +80004218 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18 +80014070 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18_str +80004244 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19 +800140ae l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19_str +80004270 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20 +800140ec l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20_str +800042a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21 +8001412a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21_str +800042cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22 +80014168 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22_str +800042f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23 +800141a6 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23_str +80004328 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24 +800141e4 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24_str +80004354 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25 +80014222 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25_str +80004380 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26 +80014260 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26_str +800043ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27 +8001429e l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27_str +800043d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28 +800142dc l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28_str +80004404 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29 +8001431a l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29_str +80004430 l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30 +80014358 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30_str +8000445c l .text.rvtest 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31 +80014396 l .data 00000000 Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31_str +80004488 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_bs_b0 +800143d4 l .data 00000000 Zksed_sm4ed_cg_cp_bs_b0_str +800044b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_bs_b1 +80014408 l .data 00000000 Zksed_sm4ed_cg_cp_bs_b1_str +800044e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_bs_b2 +8001443c l .data 00000000 Zksed_sm4ed_cg_cp_bs_b2_str +8000450c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_bs_b3 +80014470 l .data 00000000 Zksed_sm4ed_cg_cp_bs_b3_str +80004538 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b0 +800144a4 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b0_str +80004564 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b1 +800144da l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b1_str +80004590 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b2 +80014510 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b2_str +800045bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b3 +80014546 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b3_str +800045e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b4 +8001457c l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b4_str +80004614 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b5 +800145b2 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b5_str +80004640 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b6 +800145e8 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b6_str +8000466c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b7 +8001461e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b7_str +80004698 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b8 +80014654 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b8_str +800046c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b9 +8001468a l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b9_str +800046f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b10 +800146c0 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b10_str +8000471c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b11 +800146f7 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b11_str +80004748 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b12 +8001472e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b12_str +80004774 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b13 +80014765 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b13_str +800047a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b14 +8001479c l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b14_str +800047cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b15 +800147d3 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b15_str +800047f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b16 +8001480a l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b16_str +80004824 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b17 +80014841 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b17_str +80004850 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b18 +80014878 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b18_str +8000487c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b19 +800148af l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b19_str +800048a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b20 +800148e6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b20_str +800048d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b21 +8001491d l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b21_str +80004900 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b22 +80014954 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b22_str +8000492c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b23 +8001498b l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b23_str +80004958 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b24 +800149c2 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b24_str +80004984 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b25 +800149f9 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b25_str +800049b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b26 +80014a30 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b26_str +800049dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b27 +80014a67 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b27_str +80004a08 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b28 +80014a9e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b28_str +80004a34 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b29 +80014ad5 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b29_str +80004a60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b30 +80014b0c l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b30_str +80004a8c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b31 +80014b43 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b31_str +80004ab8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b32 +80014b7a l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b32_str +80004ae4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b33 +80014bb1 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b33_str +80004b10 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b34 +80014be8 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b34_str +80004b3c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b35 +80014c1f l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b35_str +80004b68 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b36 +80014c56 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b36_str +80004b94 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b37 +80014c8d l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b37_str +80004bc0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b38 +80014cc4 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b38_str +80004bec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b39 +80014cfb l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b39_str +80004c18 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b40 +80014d32 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b40_str +80004c44 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b41 +80014d69 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b41_str +80004c70 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b42 +80014da0 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b42_str +80004c9c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b43 +80014dd7 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b43_str +80004cc8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b44 +80014e0e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b44_str +80004cf4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b45 +80014e45 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b45_str +80004d20 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b46 +80014e7c l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b46_str +80004d4c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b47 +80014eb3 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b47_str +80004d78 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b48 +80014eea l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b48_str +80004da4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b49 +80014f21 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b49_str +80004dd0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b50 +80014f58 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b50_str +80004dfc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b51 +80014f8f l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b51_str +80004e28 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b52 +80014fc6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b52_str +80004e54 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b53 +80014ffd l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b53_str +80004e80 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b54 +80015034 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b54_str +80004eac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b55 +8001506b l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b55_str +80004ed8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b56 +800150a2 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b56_str +80004f04 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b57 +800150d9 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b57_str +80004f30 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b58 +80015110 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b58_str +80004f5c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b59 +80015147 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b59_str +80004f88 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b60 +8001517e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b60_str +80004fb4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b61 +800151b5 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b61_str +80004fe0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b62 +800151ec l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b62_str +8000500c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b63 +80015223 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b63_str +80005038 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b64 +8001525a l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b64_str +80005064 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b65 +80015291 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b65_str +80005090 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b66 +800152c8 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b66_str +800050bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b67 +800152ff l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b67_str +800050e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b68 +80015336 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b68_str +80005114 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b69 +8001536d l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b69_str +80005140 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b70 +800153a4 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b70_str +8000516c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b71 +800153db l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b71_str +80005198 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b72 +80015412 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b72_str +800051c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b73 +80015449 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b73_str +800051f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b74 +80015480 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b74_str +8000521c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b75 +800154b7 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b75_str +80005248 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b76 +800154ee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b76_str +80005274 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b77 +80015525 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b77_str +800052a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b78 +8001555c l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b78_str +800052cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b79 +80015593 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b79_str +800052f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b80 +800155ca l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b80_str +80005324 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b81 +80015601 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b81_str +80005350 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b82 +80015638 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b82_str +8000537c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b83 +8001566f l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b83_str +800053a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b84 +800156a6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b84_str +800053d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b85 +800156dd l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b85_str +80005400 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b86 +80015714 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b86_str +8000542c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b87 +8001574b l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b87_str +80005458 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b88 +80015782 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b88_str +80005484 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b89 +800157b9 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b89_str +800054b0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b90 +800157f0 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b90_str +800054dc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b91 +80015827 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b91_str +80005508 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b92 +8001585e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b92_str +80005534 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b93 +80015895 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b93_str +80005560 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b94 +800158cc l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b94_str +8000558c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b95 +80015903 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b95_str +800055b8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b96 +8001593a l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b96_str +800055e4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b97 +80015971 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b97_str +80005610 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b98 +800159a8 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b98_str +8000563c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b99 +800159df l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b99_str +80005668 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b100 +80015a16 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b100_str +80005694 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b101 +80015a4e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b101_str +800056c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b102 +80015a86 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b102_str +800056ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b103 +80015abe l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b103_str +80005718 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b104 +80015af6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b104_str +80005744 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b105 +80015b2e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b105_str +80005770 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b106 +80015b66 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b106_str +8000579c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b107 +80015b9e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b107_str +800057c8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b108 +80015bd6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b108_str +800057f4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b109 +80015c0e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b109_str +80005820 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b110 +80015c46 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b110_str +8000584c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b111 +80015c7e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b111_str +80005878 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b112 +80015cb6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b112_str +800058a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b113 +80015cee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b113_str +800058d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b114 +80015d26 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b114_str +800058fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b115 +80015d5e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b115_str +80005928 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b116 +80015d96 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b116_str +80005954 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b117 +80015dce l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b117_str +80005980 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b118 +80015e06 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b118_str +800059ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b119 +80015e3e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b119_str +800059d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b120 +80015e76 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b120_str +80005a04 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b121 +80015eae l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b121_str +80005a30 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b122 +80015ee6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b122_str +80005a5c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b123 +80015f1e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b123_str +80005a88 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b124 +80015f56 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b124_str +80005ab4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b125 +80015f8e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b125_str +80005ae0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b126 +80015fc6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b126_str +80005b0c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b127 +80015ffe l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b127_str +80005b38 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b128 +80016036 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b128_str +80005b64 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b129 +8001606e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b129_str +80005b90 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b130 +800160a6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b130_str +80005bbc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b131 +800160de l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b131_str +80005be8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b132 +80016116 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b132_str +80005c14 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b133 +8001614e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b133_str +80005c40 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b134 +80016186 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b134_str +80005c6c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b135 +800161be l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b135_str +80005c98 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b136 +800161f6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b136_str +80005cc4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b137 +8001622e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b137_str +80005cf0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b138 +80016266 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b138_str +80005d1c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b139 +8001629e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b139_str +80005d48 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b140 +800162d6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b140_str +80005d74 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b141 +8001630e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b141_str +80005da0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b142 +80016346 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b142_str +80005dcc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b143 +8001637e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b143_str +80005df8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b144 +800163b6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b144_str +80005e24 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b145 +800163ee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b145_str +80005e50 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b146 +80016426 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b146_str +80005e7c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b147 +8001645e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b147_str +80005ea8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b148 +80016496 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b148_str +80005ed4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b149 +800164ce l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b149_str +80005f00 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b150 +80016506 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b150_str +80005f2c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b151 +8001653e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b151_str +80005f58 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b152 +80016576 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b152_str +80005f84 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b153 +800165ae l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b153_str +80005fb0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b154 +800165e6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b154_str +80005fdc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b155 +8001661e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b155_str +80006008 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b156 +80016656 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b156_str +80006034 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b157 +8001668e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b157_str +80006060 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b158 +800166c6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b158_str +8000608c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b159 +800166fe l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b159_str +800060b8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b160 +80016736 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b160_str +800060e4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b161 +8001676e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b161_str +80006110 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b162 +800167a6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b162_str +8000613c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b163 +800167de l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b163_str +80006168 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b164 +80016816 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b164_str +80006194 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b165 +8001684e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b165_str +800061c0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b166 +80016886 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b166_str +800061ec l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b167 +800168be l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b167_str +80006218 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b168 +800168f6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b168_str +80006244 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b169 +8001692e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b169_str +80006270 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b170 +80016966 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b170_str +8000629c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b171 +8001699e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b171_str +800062c8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b172 +800169d6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b172_str +800062f4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b173 +80016a0e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b173_str +80006320 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b174 +80016a46 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b174_str +8000634c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b175 +80016a7e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b175_str +80006378 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b176 +80016ab6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b176_str +800063a4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b177 +80016aee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b177_str +800063d0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b178 +80016b26 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b178_str +800063fc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b179 +80016b5e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b179_str +80006428 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b180 +80016b96 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b180_str +80006454 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b181 +80016bce l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b181_str +80006480 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b182 +80016c06 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b182_str +800064ac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b183 +80016c3e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b183_str +800064d8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b184 +80016c76 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b184_str +80006504 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b185 +80016cae l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b185_str +80006530 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b186 +80016ce6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b186_str +8000655c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b187 +80016d1e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b187_str +80006588 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b188 +80016d56 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b188_str +800065b4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b189 +80016d8e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b189_str +800065e0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b190 +80016dc6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b190_str +8000660c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b191 +80016dfe l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b191_str +80006638 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b192 +80016e36 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b192_str +80006664 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b193 +80016e6e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b193_str +80006690 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b194 +80016ea6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b194_str +800066bc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b195 +80016ede l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b195_str +800066e8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b196 +80016f16 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b196_str +80006714 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b197 +80016f4e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b197_str +80006740 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b198 +80016f86 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b198_str +8000676c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b199 +80016fbe l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b199_str +80006798 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b200 +80016ff6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b200_str +800067c4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b201 +8001702e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b201_str +800067f0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b202 +80017066 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b202_str +8000681c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b203 +8001709e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b203_str +80006848 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b204 +800170d6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b204_str +80006874 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b205 +8001710e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b205_str +800068a0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b206 +80017146 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b206_str +800068cc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b207 +8001717e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b207_str +800068f8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b208 +800171b6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b208_str +80006924 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b209 +800171ee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b209_str +80006950 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b210 +80017226 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b210_str +8000697c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b211 +8001725e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b211_str +800069a8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b212 +80017296 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b212_str +800069d4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b213 +800172ce l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b213_str +80006a00 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b214 +80017306 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b214_str +80006a2c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b215 +8001733e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b215_str +80006a58 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b216 +80017376 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b216_str +80006a84 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b217 +800173ae l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b217_str +80006ab0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b218 +800173e6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b218_str +80006adc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b219 +8001741e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b219_str +80006b08 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b220 +80017456 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b220_str +80006b34 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b221 +8001748e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b221_str +80006b60 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b222 +800174c6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b222_str 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00000000 Zksed_sm4ed_cg_cp_sbox_b231 +800176be l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b231_str +80006d18 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b232 +800176f6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b232_str +80006d44 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b233 +8001772e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b233_str +80006d70 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b234 +80017766 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b234_str +80006d9c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b235 +8001779e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b235_str +80006dc8 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b236 +800177d6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b236_str +80006df4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b237 +8001780e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b237_str +80006e20 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b238 +80017846 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b238_str +80006e4c l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b239 +8001787e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b239_str +80006e78 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b240 +800178b6 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b240_str +80006ea4 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b241 +800178ee l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b241_str +80006ed0 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b242 +80017926 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b242_str +80006efc l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b243 +8001795e l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b243_str +80006f28 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b244 +80017996 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b244_str +80006f54 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b245 +800179ce l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b245_str +80006f80 l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b246 +80017a06 l .data 00000000 Zksed_sm4ed_cg_cp_sbox_b246_str +80006fac l .text.rvtest 00000000 Zksed_sm4ed_cg_cp_sbox_b247 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value +80007500 l .text.rvtest 00000000 trap_Mhandler +80007620 l .text.rvtest 00000000 rvtest_Mendtest +80007644 l .text.rvtest 00000000 common_Mhandler +800076b0 l .text.rvtest 00000000 spcl_M2mmode_test +800076bc l .text.rvtest 00000000 spcl_Mchk4alt +800076cc l .text.rvtest 00000000 spcl_Mchk4ecall +800076c4 l .text.rvtest 00000000 spcl_Mparam_chk +80008150 l .text.rvtest 00000000 Mrtn2mmode +80007c54 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800076d8 l .text.rvtest 00000000 Mgoto_mchk +800076dc l .text.rvtest 00000000 tsbi_Mdispatch +80007704 l .text.rvtest 00000000 tsbi_Mgoto_mode +800076f4 l .text.rvtest 00000000 tsbi_Mecall_test +80007770 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007ec0 l .text.rvtest 00000000 resto_Mrtn +80007730 l .text.rvtest 00000000 tsbi_Mgoto_m +80007740 l .text.rvtest 00000000 tsbi_Mgoto_s +8000775c l .text.rvtest 00000000 tsbi_Mgoto_u +8000776c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800078f0 l .text.rvtest 00000000 tsbi_instr_table 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excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081a0 l .text.rvtest 00000000 rtn_fm_mmode +8000818c l .text.rvtest 00000000 from_hs_u +8000817c l .text.rvtest 00000000 from_vs +80017c40 l .data 00000000 begin_failure_scratch +8000825c l .text.rvtest 00000000 failedtest_saveregs +800082cc l .text.rvtest 00000000 failedtest_saveresults +80017c40 l .data 00000000 failure_type +8000846c l .text.rvtest 00000000 failedtest_saveresults_trap +800082dc l .text.rvtest 00000000 failedtest_saveresults_int +800083f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000842c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80008760 l .text.rvtest 00000000 failedtest_saveresults_common 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00000000 Mclr_Sext_int_str +80018b62 l .data 00000000 Sclr_Sext_int_str +80018c5e l .data 00000000 Hclr_Sext_int_str +80008750 l .text.rvtest 00000000 trap_diag_generic_report +80017d74 l .data 00000000 trap_diag_mode +80008790 l .text.rvtest 00000000 failedtest_report +80008790 l .text.rvtest 00000000 print_failstr +80008808 l .text.rvtest 00000000 print_testnamestr +800183b2 l .data 00000000 testnamestr +80008848 l .text.rvtest 00000000 print_failure_test_name_str +80017d60 l .data 00000000 failure_string_ptr +80008858 l .text.rvtest 00000000 print_newline_str +80008dcc l .text.rvtest 00000000 failedtest_report_trap_detailed +800183c6 l .data 00000000 inststr +80017d40 l .data 00000000 failing_instruction +800183da l .data 00000000 addrstr +80017d48 l .data 00000000 failing_addr +80018e11 l .data 00000000 regstr +80008a38 l .text.rvtest 00000000 failedtest_report_not_intreg +80017d44 l .data 00000000 failing_reg +80009d54 l .text.rvtest 00000000 failedtest_dec_to_str +80008b4c l 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failedtest_report_bad_instr_diag +80018e50 l .data 00000000 failure_diag_bad_instr_str +80018eae l .data 00000000 failure_diag_bad_ptr_str +80008e90 l .text.rvtest 00000000 trap_report_offset_mismatch +80018f53 l .data 00000000 trap_diag_header_str +80018f7f l .data 00000000 trap_diag_origstr_label +80009910 l .text.rvtest 00000000 trap_report_generic +800091cc l .text.rvtest 00000000 trap_report_field_mismatch +80018f8f l .data 00000000 trap_diag_expected_offset_str +80018fba l .data 00000000 trap_diag_actual_offset_str +800090ac l .text.rvtest 00000000 trap_report_missing_traps +80008f9c l .text.rvtest 00000000 trap_report_extra_traps +80018fe9 l .data 00000000 trap_diag_extra_traps_str +80019051 l .data 00000000 trap_diag_diff_bytes_str +80019078 l .data 00000000 trap_diag_extra_next_step_str +80019015 l .data 00000000 trap_diag_missing_traps_str +80019160 l .data 00000000 trap_diag_missing_next_step_str +80019247 l .data 00000000 trap_diag_handler_mode_str +80009264 l .text.rvtest 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failedtest_hex_to_str_digit +80009d38 l .text.rvtest 00000000 failedtest_hex_to_str_write +8002a0e4 l .text.rvmodel 00000000 uart_init +8002a0e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +8002a120 l .text.rvmodel 00000000 init_Mscratch +8002a128 l .text.rvmodel 00000000 init_Mtimecmp +8002a13c l .text.rvmodel 00000000 init_Medeleg +8002a144 l .text.rvmodel 00000000 init_Msatp +8002a144 l .text.rvmodel 00000000 init_Mtvec +8002a264 l .text.rvmodel 00000000 rvtest_Mprolog_done +8002a224 l .text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +80019990 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +80018f2f l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +80017dd0 l .data 00000000 end_failure_scratch +80017e70 l .data 00000000 trap_excpt_name_0 +80017e90 l .data 00000000 trap_excpt_name_1 +80017eaa l .data 00000000 trap_excpt_name_2 +80017ebf l .data 00000000 trap_excpt_name_3 +80017ecb l .data 00000000 trap_excpt_name_4 +80017ee4 l .data 00000000 trap_excpt_name_5 +80017ef7 l .data 00000000 trap_excpt_name_6 +80017f15 l .data 00000000 trap_excpt_name_7 +80017f2d l .data 00000000 trap_excpt_name_8 +80017f4b l .data 00000000 trap_excpt_name_9 +80017f69 l .data 00000000 trap_excpt_name_10 +80017f88 l .data 00000000 trap_excpt_name_11 +80017fa6 l .data 00000000 trap_excpt_name_12 +80017fbe l .data 00000000 trap_excpt_name_13 +80017fcf l .data 00000000 trap_excpt_name_14 +80017fde l .data 00000000 trap_excpt_name_15 +80017ff4 l .data 00000000 trap_excpt_name_16 +80018001 l .data 00000000 trap_excpt_name_17 +80018010 l .data 00000000 trap_excpt_name_18 +80018020 l .data 00000000 trap_excpt_name_19 +80018030 l .data 00000000 trap_excpt_name_20 +8001804e l .data 00000000 trap_excpt_name_21 +80018065 l .data 00000000 trap_excpt_name_22 +8001807a l .data 00000000 trap_excpt_name_23 +80018096 l .data 00000000 trap_int_name_0 +800180ae l .data 00000000 trap_int_name_1 +800180cd l .data 00000000 trap_int_name_2 +800180f4 l .data 00000000 trap_int_name_3 +80018110 l .data 00000000 trap_int_name_4 +80018128 l .data 00000000 trap_int_name_5 +80018144 l .data 00000000 trap_int_name_6 +80018168 l .data 00000000 trap_int_name_7 +80018181 l .data 00000000 trap_int_name_8 +80018199 l .data 00000000 trap_int_name_9 +800181b8 l .data 00000000 trap_int_name_10 +800181df l .data 00000000 trap_int_name_11 +800181fb l .data 00000000 trap_int_name_12 +80018220 l .data 00000000 trap_int_name_13 +8001823c l .data 00000000 trap_int_name_14 +80018255 l .data 00000000 trap_int_name_15 +8001841b l .data 00000000 xepcstr +80018ab9 l .data 00000000 Mclr_Vext_int_str +80018b13 l .data 00000000 Sclr_Mext_int_str +80018bb4 l .data 00000000 Sclr_Vext_int_str +80018c0e l .data 00000000 Hclr_Mext_int_str +80018cb1 l .data 00000000 Hclr_Vext_int_str +80018d0c l .data 00000000 Vclr_Mext_int_str +80018d5c l .data 00000000 Vclr_Sext_int_str +80018daf l .data 00000000 Vclr_Vext_int_str +8001944e l .data 00000000 trap_diag_curr_xepc_str +80028e60 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80028e60 g .data 00000000 rvtest_sig_end +80007658 g .text.rvtest 00000000 common_Mentry +80007184 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80019990 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +8000712c g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80019990 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +80019981 g .data 00000000 rvtest_data_end +8000712c g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029000 g .tohost 00000000 fromhost +80028f00 g .tohost 00000000 tohost +800073f0 g .text.rvtest 00000000 rvtest_fail_summary +80007480 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xb26d170a +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xdee9fa33 +80000048: 0001aa03 lw x20,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zksed_sm4ed_cg_cp_rs1_b0: + sm4ed x25, x0, x20, 2 # perform operation +80000050: b1400cb3 sm4ed x25,x0,x20,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_b0, Zksed_sm4ed_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 01920863 beq x4,x25,80000068 +8000005c: 164082ef jal x5,800081c0 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x0229bdc8 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x4e58216e +80000074: 0001aa83 lw x21,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zksed_sm4ed_cg_cp_rs1_b1: + sm4ed x11, x1, x21, 2 # perform operation +8000007c: b15085b3 sm4ed x11,x1,x21,0x2 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ed_cg_cp_rs1_b1, Zksed_sm4ed_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 00b20863 beq x4,x11,80000094 +80000088: 138082ef jal x5,800081c0 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d843 .word 0x8000d843 +80000094: 00410113 addi x2,x2,4 + + mv x16, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010813 addi x16,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc10a7f0c +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xf40191d2 +800000a4: 0001aa83 lw x21,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zksed_sm4ed_cg_cp_rs1_b2: + sm4ed x30, x2, x21, 1 # perform operation +800000ac: 71510f33 sm4ed x30,x2,x21,0x1 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zksed_sm4ed_cg_cp_rs1_b2, Zksed_sm4ed_cg_cp_rs1_b2_str) +800000b0: 00082203 lw x4,0(x16) +800000b4: 01e20863 beq x4,x30,800000c4 +800000b8: 108082ef jal x5,800081c0 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d876 .word 0x8000d876 +800000c4: 00480813 addi x16,x16,4 + + mv x12, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018613 addi x12,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xefe7b29a +800000cc: 00062183 lw x3,0(x12) +800000d0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x6b5b3366 +800000d4: 00062883 lw x17,0(x12) +800000d8: 00460613 addi x12,x12,4 + +800000dc : +Zksed_sm4ed_cg_cp_rs1_b3: + sm4ed x18, x3, x17, 1 # perform operation +800000dc: 71118933 sm4ed x18,x3,x17,0x1 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zksed_sm4ed_cg_cp_rs1_b3, Zksed_sm4ed_cg_cp_rs1_b3_str) +800000e0: 00082203 lw x4,0(x16) +800000e4: 01220863 beq x4,x18,800000f4 +800000e8: 0d8082ef jal x5,800081c0 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8a9 .word 0x8000d8a9 +800000f4: 00480813 addi x16,x16,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x8c7e3bac +80000100: 00062203 lw x4,0(x12) +80000104: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x60663846 +80000108: 00062303 lw x6,0(x12) +8000010c: 00460613 addi x12,x12,4 + +80000110 : +Zksed_sm4ed_cg_cp_rs1_b4: + sm4ed x30, x4, x6, 3 # perform operation +80000110: f0620f33 sm4ed x30,x4,x6,0x3 + # Check if x30 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x30, Zksed_sm4ed_cg_cp_rs1_b4, Zksed_sm4ed_cg_cp_rs1_b4_str) +80000114: 00082683 lw x13,0(x16) +80000118: 01e68863 beq x13,x30,80000128 +8000011c: 0e40876f jal x14,80008200 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8dc .word 0x8000d8dc +80000128: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x3f45a8d5 +8000012c: 00062283 lw x5,0(x12) +80000130: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x4cd68e00 +80000134: 00062c03 lw x24,0(x12) +80000138: 00460613 addi x12,x12,4 + +8000013c : +Zksed_sm4ed_cg_cp_rs1_b5: + sm4ed x28, x5, x24, 2 # perform operation +8000013c: b1828e33 sm4ed x28,x5,x24,0x2 + # Check if x28 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x28, Zksed_sm4ed_cg_cp_rs1_b5, Zksed_sm4ed_cg_cp_rs1_b5_str) +80000140: 00082683 lw x13,0(x16) +80000144: 01c68863 beq x13,x28,80000154 +80000148: 0b80876f jal x14,80008200 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d90f .word 0x8000d90f +80000154: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x79a64d9c +80000158: 00062303 lw x6,0(x12) +8000015c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x64b05ba7 +80000160: 00062f83 lw x31,0(x12) +80000164: 00460613 addi x12,x12,4 + +80000168 : +Zksed_sm4ed_cg_cp_rs1_b6: + sm4ed x21, x6, x31, 1 # perform operation +80000168: 71f30ab3 sm4ed x21,x6,x31,0x1 + # Check if x21 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x21, Zksed_sm4ed_cg_cp_rs1_b6, Zksed_sm4ed_cg_cp_rs1_b6_str) +8000016c: 00082683 lw x13,0(x16) +80000170: 01568863 beq x13,x21,80000180 +80000174: 08c0876f jal x14,80008200 +80000178: 80000168 .word 0x80000168 +8000017c: 8000d942 .word 0x8000d942 +80000180: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x0a56204b +80000184: 00062383 lw x7,0(x12) +80000188: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x1fac2052 +8000018c: 00062183 lw x3,0(x12) +80000190: 00460613 addi x12,x12,4 + +80000194 : +Zksed_sm4ed_cg_cp_rs1_b7: + sm4ed x5, x7, x3, 0 # perform operation +80000194: 303382b3 sm4ed x5,x7,x3,0x0 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zksed_sm4ed_cg_cp_rs1_b7, Zksed_sm4ed_cg_cp_rs1_b7_str) +80000198: 00082683 lw x13,0(x16) +8000019c: 00568863 beq x13,x5,800001ac +800001a0: 0600876f jal x14,80008200 +800001a4: 80000194 .word 0x80000194 +800001a8: 8000d975 .word 0x8000d975 +800001ac: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x836b9b25 +800001b0: 00062403 lw x8,0(x12) +800001b4: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xf53b08ca +800001b8: 00062783 lw x15,0(x12) +800001bc: 00460613 addi x12,x12,4 + +800001c0 : +Zksed_sm4ed_cg_cp_rs1_b8: + sm4ed x5, x8, x15, 3 # perform operation +800001c0: f0f402b3 sm4ed x5,x8,x15,0x3 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zksed_sm4ed_cg_cp_rs1_b8, Zksed_sm4ed_cg_cp_rs1_b8_str) +800001c4: 00082683 lw x13,0(x16) +800001c8: 00568863 beq x13,x5,800001d8 +800001cc: 0340876f jal x14,80008200 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 8000d9a8 .word 0x8000d9a8 +800001d8: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xc20fce19 +800001dc: 00062483 lw x9,0(x12) +800001e0: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xe723c431 +800001e4: 00062403 lw x8,0(x12) +800001e8: 00460613 addi x12,x12,4 + +800001ec : +Zksed_sm4ed_cg_cp_rs1_b9: + sm4ed x1, x9, x8, 3 # perform operation +800001ec: f08480b3 sm4ed x1,x9,x8,0x3 + # Check if x1 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x1, Zksed_sm4ed_cg_cp_rs1_b9, Zksed_sm4ed_cg_cp_rs1_b9_str) +800001f0: 00082683 lw x13,0(x16) +800001f4: 00168863 beq x13,x1,80000204 +800001f8: 0080876f jal x14,80008200 +800001fc: 800001ec .word 0x800001ec +80000200: 8000d9db .word 0x8000d9db +80000204: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x6e66436d +80000208: 00062503 lw x10,0(x12) +8000020c: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xc5d0b454 +80000210: 00062c83 lw x25,0(x12) +80000214: 00460613 addi x12,x12,4 + +80000218 : +Zksed_sm4ed_cg_cp_rs1_b10: + sm4ed x23, x10, x25, 0 # perform operation +80000218: 31950bb3 sm4ed x23,x10,x25,0x0 + # Check if x23 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x23, Zksed_sm4ed_cg_cp_rs1_b10, Zksed_sm4ed_cg_cp_rs1_b10_str) +8000021c: 00082683 lw x13,0(x16) +80000220: 01768863 beq x13,x23,80000230 +80000224: 7dd0776f jal x14,80008200 +80000228: 80000218 .word 0x80000218 +8000022c: 8000da0f .word 0x8000da0f +80000230: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xa5edd7d0 +80000234: 00062583 lw x11,0(x12) +80000238: 00460613 addi x12,x12,4 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x8459a632 +8000023c: 00062983 lw x19,0(x12) +80000240: 00460613 addi x12,x12,4 + +80000244 : +Zksed_sm4ed_cg_cp_rs1_b11: + sm4ed x27, x11, x19, 2 # perform operation +80000244: b1358db3 sm4ed x27,x11,x19,0x2 + # Check if x27 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x27, Zksed_sm4ed_cg_cp_rs1_b11, Zksed_sm4ed_cg_cp_rs1_b11_str) +80000248: 00082683 lw x13,0(x16) +8000024c: 01b68863 beq x13,x27,8000025c +80000250: 7b10776f jal x14,80008200 +80000254: 80000244 .word 0x80000244 +80000258: 8000da44 .word 0x8000da44 +8000025c: 00480813 addi x16,x16,4 + + mv x24, x12 # switch data pointer register to avoid conflict with test +80000260: 00060c13 addi x24,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xb2b5a214 +80000264: 000c2603 lw x12,0(x24) +80000268: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xee7451b7 +8000026c: 000c2903 lw x18,0(x24) +80000270: 004c0c13 addi x24,x24,4 + +80000274 : +Zksed_sm4ed_cg_cp_rs1_b12: + sm4ed x11, x12, x18, 1 # perform operation +80000274: 712605b3 sm4ed x11,x12,x18,0x1 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zksed_sm4ed_cg_cp_rs1_b12, Zksed_sm4ed_cg_cp_rs1_b12_str) +80000278: 00082683 lw x13,0(x16) +8000027c: 00b68863 beq x13,x11,8000028c +80000280: 7810776f jal x14,80008200 +80000284: 80000274 .word 0x80000274 +80000288: 8000da79 .word 0x8000da79 +8000028c: 00480813 addi x16,x16,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000290: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000294: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xcfbfcbfc +80000298: 000c2683 lw x13,0(x24) +8000029c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xefd85247 +800002a0: 000c2483 lw x9,0(x24) +800002a4: 004c0c13 addi x24,x24,4 + +800002a8 : +Zksed_sm4ed_cg_cp_rs1_b13: + sm4ed x28, x13, x9, 3 # perform operation +800002a8: f0968e33 sm4ed x28,x13,x9,0x3 + # Check if x28 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x28, Zksed_sm4ed_cg_cp_rs1_b13, Zksed_sm4ed_cg_cp_rs1_b13_str) +800002ac: 00082383 lw x7,0(x16) +800002b0: 01c38863 beq x7,x28,800002c0 +800002b4: 7250746f jal x8,800081d8 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 8000daae .word 0x8000daae +800002c0: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xb73c7c5f +800002c4: 000c2703 lw x14,0(x24) +800002c8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x5c1fe5b8 +800002cc: 000c2b03 lw x22,0(x24) +800002d0: 004c0c13 addi x24,x24,4 + +800002d4 : +Zksed_sm4ed_cg_cp_rs1_b14: + sm4ed x21, x14, x22, 1 # perform operation +800002d4: 71670ab3 sm4ed x21,x14,x22,0x1 + # Check if x21 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x21, Zksed_sm4ed_cg_cp_rs1_b14, Zksed_sm4ed_cg_cp_rs1_b14_str) +800002d8: 00082383 lw x7,0(x16) +800002dc: 01538863 beq x7,x21,800002ec +800002e0: 6f90746f jal x8,800081d8 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 8000dae3 .word 0x8000dae3 +800002ec: 00480813 addi x16,x16,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xa5c207cf +800002f0: 000c2783 lw x15,0(x24) +800002f4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x2ab7d239 +800002f8: 000c2c83 lw x25,0(x24) +800002fc: 004c0c13 addi x24,x24,4 + +80000300 : +Zksed_sm4ed_cg_cp_rs1_b15: + sm4ed x6, x15, x25, 0 # perform operation +80000300: 31978333 sm4ed x6,x15,x25,0x0 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zksed_sm4ed_cg_cp_rs1_b15, Zksed_sm4ed_cg_cp_rs1_b15_str) +80000304: 00082383 lw x7,0(x16) +80000308: 00638863 beq x7,x6,80000318 +8000030c: 6cd0746f jal x8,800081d8 +80000310: 80000300 .word 0x80000300 +80000314: 8000db18 .word 0x8000db18 +80000318: 00480813 addi x16,x16,4 + + mv x25, x16 # switch signature pointer register to avoid conflict with test +8000031c: 00080c93 addi x25,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x21e32634 +80000320: 000c2803 lw x16,0(x24) +80000324: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xb7c3b181 +80000328: 000c2483 lw x9,0(x24) +8000032c: 004c0c13 addi x24,x24,4 + +80000330 : +Zksed_sm4ed_cg_cp_rs1_b16: + sm4ed x27, x16, x9, 3 # perform operation +80000330: f0980db3 sm4ed x27,x16,x9,0x3 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zksed_sm4ed_cg_cp_rs1_b16, Zksed_sm4ed_cg_cp_rs1_b16_str) +80000334: 000ca383 lw x7,0(x25) +80000338: 01b38863 beq x7,x27,80000348 +8000033c: 69d0746f jal x8,800081d8 +80000340: 80000330 .word 0x80000330 +80000344: 8000db4d .word 0x8000db4d +80000348: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x06f209cf +8000034c: 000c2883 lw x17,0(x24) +80000350: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x3cab3c87 +80000354: 000c2483 lw x9,0(x24) +80000358: 004c0c13 addi x24,x24,4 + +8000035c : +Zksed_sm4ed_cg_cp_rs1_b17: + sm4ed x10, x17, x9, 2 # perform operation +8000035c: b0988533 sm4ed x10,x17,x9,0x2 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zksed_sm4ed_cg_cp_rs1_b17, Zksed_sm4ed_cg_cp_rs1_b17_str) +80000360: 000ca383 lw x7,0(x25) +80000364: 00a38863 beq x7,x10,80000374 +80000368: 6710746f jal x8,800081d8 +8000036c: 8000035c .word 0x8000035c +80000370: 8000db82 .word 0x8000db82 +80000374: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x3ac9b57c +80000378: 000c2903 lw x18,0(x24) +8000037c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x2b399d29 +80000380: 000c2683 lw x13,0(x24) +80000384: 004c0c13 addi x24,x24,4 + +80000388 : +Zksed_sm4ed_cg_cp_rs1_b18: + sm4ed x30, x18, x13, 0 # perform operation +80000388: 30d90f33 sm4ed x30,x18,x13,0x0 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zksed_sm4ed_cg_cp_rs1_b18, Zksed_sm4ed_cg_cp_rs1_b18_str) +8000038c: 000ca383 lw x7,0(x25) +80000390: 01e38863 beq x7,x30,800003a0 +80000394: 6450746f jal x8,800081d8 +80000398: 80000388 .word 0x80000388 +8000039c: 8000dbb7 .word 0x8000dbb7 +800003a0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x73a7c55f +800003a4: 000c2983 lw x19,0(x24) +800003a8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0xc5677362 +800003ac: 000c2d03 lw x26,0(x24) +800003b0: 004c0c13 addi x24,x24,4 + +800003b4 : +Zksed_sm4ed_cg_cp_rs1_b19: + sm4ed x11, x19, x26, 0 # perform operation +800003b4: 31a985b3 sm4ed x11,x19,x26,0x0 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zksed_sm4ed_cg_cp_rs1_b19, Zksed_sm4ed_cg_cp_rs1_b19_str) +800003b8: 000ca383 lw x7,0(x25) +800003bc: 00b38863 beq x7,x11,800003cc +800003c0: 6190746f jal x8,800081d8 +800003c4: 800003b4 .word 0x800003b4 +800003c8: 8000dbec .word 0x8000dbec +800003cc: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xd8936204 +800003d0: 000c2a03 lw x20,0(x24) +800003d4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x0598ff87 +800003d8: 000c2883 lw x17,0(x24) +800003dc: 004c0c13 addi x24,x24,4 + +800003e0 : +Zksed_sm4ed_cg_cp_rs1_b20: + sm4ed x3, x20, x17, 0 # perform operation +800003e0: 311a01b3 sm4ed x3,x20,x17,0x0 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zksed_sm4ed_cg_cp_rs1_b20, Zksed_sm4ed_cg_cp_rs1_b20_str) +800003e4: 000ca383 lw x7,0(x25) +800003e8: 00338863 beq x7,x3,800003f8 +800003ec: 5ed0746f jal x8,800081d8 +800003f0: 800003e0 .word 0x800003e0 +800003f4: 8000dc21 .word 0x8000dc21 +800003f8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x8e39416c +800003fc: 000c2a83 lw x21,0(x24) +80000400: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x6fb6e744 +80000404: 000c2d83 lw x27,0(x24) +80000408: 004c0c13 addi x24,x24,4 + +8000040c : +Zksed_sm4ed_cg_cp_rs1_b21: + sm4ed x14, x21, x27, 0 # perform operation +8000040c: 31ba8733 sm4ed x14,x21,x27,0x0 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zksed_sm4ed_cg_cp_rs1_b21, Zksed_sm4ed_cg_cp_rs1_b21_str) +80000410: 000ca383 lw x7,0(x25) +80000414: 00e38863 beq x7,x14,80000424 +80000418: 5c10746f jal x8,800081d8 +8000041c: 8000040c .word 0x8000040c +80000420: 8000dc56 .word 0x8000dc56 +80000424: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x47b5a1ce +80000428: 000c2b03 lw x22,0(x24) +8000042c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x5723a6c1 +80000430: 000c2f83 lw x31,0(x24) +80000434: 004c0c13 addi x24,x24,4 + +80000438 : +Zksed_sm4ed_cg_cp_rs1_b22: + sm4ed x5, x22, x31, 3 # perform operation +80000438: f1fb02b3 sm4ed x5,x22,x31,0x3 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zksed_sm4ed_cg_cp_rs1_b22, Zksed_sm4ed_cg_cp_rs1_b22_str) +8000043c: 000ca383 lw x7,0(x25) +80000440: 00538863 beq x7,x5,80000450 +80000444: 5950746f jal x8,800081d8 +80000448: 80000438 .word 0x80000438 +8000044c: 8000dc8b .word 0x8000dc8b +80000450: 004c8c93 addi x25,x25,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x27f8f9f8 +80000454: 000c2b83 lw x23,0(x24) +80000458: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x8ca26447 +8000045c: 000c2703 lw x14,0(x24) +80000460: 004c0c13 addi x24,x24,4 + +80000464 : +Zksed_sm4ed_cg_cp_rs1_b23: + sm4ed x1, x23, x14, 2 # perform operation +80000464: b0eb80b3 sm4ed x1,x23,x14,0x2 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zksed_sm4ed_cg_cp_rs1_b23, Zksed_sm4ed_cg_cp_rs1_b23_str) +80000468: 000ca383 lw x7,0(x25) +8000046c: 00138863 beq x7,x1,8000047c +80000470: 5690746f jal x8,800081d8 +80000474: 80000464 .word 0x80000464 +80000478: 8000dcc0 .word 0x8000dcc0 +8000047c: 004c8c93 addi x25,x25,4 + + mv x29, x24 # switch data pointer register to avoid conflict with test +80000480: 000c0e93 addi x29,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xd5318d4a +80000484: 000eac03 lw x24,0(x29) +80000488: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0xc4f79da6 +8000048c: 000ea703 lw x14,0(x29) +80000490: 004e8e93 addi x29,x29,4 + +80000494 : +Zksed_sm4ed_cg_cp_rs1_b24: + sm4ed x15, x24, x14, 3 # perform operation +80000494: f0ec07b3 sm4ed x15,x24,x14,0x3 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zksed_sm4ed_cg_cp_rs1_b24, Zksed_sm4ed_cg_cp_rs1_b24_str) +80000498: 000ca383 lw x7,0(x25) +8000049c: 00f38863 beq x7,x15,800004ac +800004a0: 5390746f jal x8,800081d8 +800004a4: 80000494 .word 0x80000494 +800004a8: 8000dcf5 .word 0x8000dcf5 +800004ac: 004c8c93 addi x25,x25,4 + + mv x11, x25 # switch signature pointer register to avoid conflict with test +800004b0: 000c8593 addi x11,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0xe6c4a692 +800004b4: 000eac83 lw x25,0(x29) +800004b8: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0xdf0658c7 +800004bc: 000ea703 lw x14,0(x29) +800004c0: 004e8e93 addi x29,x29,4 + +800004c4 : +Zksed_sm4ed_cg_cp_rs1_b25: + sm4ed x4, x25, x14, 2 # perform operation +800004c4: b0ec8233 sm4ed x4,x25,x14,0x2 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zksed_sm4ed_cg_cp_rs1_b25, Zksed_sm4ed_cg_cp_rs1_b25_str) +800004c8: 0005a383 lw x7,0(x11) +800004cc: 00438863 beq x7,x4,800004dc +800004d0: 5090746f jal x8,800081d8 +800004d4: 800004c4 .word 0x800004c4 +800004d8: 8000dd2a .word 0x8000dd2a +800004dc: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xc8689140 +800004e0: 000ead03 lw x26,0(x29) +800004e4: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xc615c8f4 +800004e8: 000eab03 lw x22,0(x29) +800004ec: 004e8e93 addi x29,x29,4 + +800004f0 : +Zksed_sm4ed_cg_cp_rs1_b26: + sm4ed x2, x26, x22, 0 # perform operation +800004f0: 316d0133 sm4ed x2,x26,x22,0x0 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zksed_sm4ed_cg_cp_rs1_b26, Zksed_sm4ed_cg_cp_rs1_b26_str) +800004f4: 0005a383 lw x7,0(x11) +800004f8: 00238863 beq x7,x2,80000508 +800004fc: 4dd0746f jal x8,800081d8 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000dd5f .word 0x8000dd5f +80000508: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x6480688f +8000050c: 000ead83 lw x27,0(x29) +80000510: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x2d6aa0ee +80000514: 000eae03 lw x28,0(x29) +80000518: 004e8e93 addi x29,x29,4 + +8000051c : +Zksed_sm4ed_cg_cp_rs1_b27: + sm4ed x3, x27, x28, 1 # perform operation +8000051c: 71cd81b3 sm4ed x3,x27,x28,0x1 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zksed_sm4ed_cg_cp_rs1_b27, Zksed_sm4ed_cg_cp_rs1_b27_str) +80000520: 0005a383 lw x7,0(x11) +80000524: 00338863 beq x7,x3,80000534 +80000528: 4b10746f jal x8,800081d8 +8000052c: 8000051c .word 0x8000051c +80000530: 8000dd94 .word 0x8000dd94 +80000534: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x49b45b67 +80000538: 000eae03 lw x28,0(x29) +8000053c: 004e8e93 addi x29,x29,4 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x6500f588 +80000540: 000eac83 lw x25,0(x29) +80000544: 004e8e93 addi x29,x29,4 + +80000548 : +Zksed_sm4ed_cg_cp_rs1_b28: + sm4ed x17, x28, x25, 1 # perform operation +80000548: 719e08b3 sm4ed x17,x28,x25,0x1 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zksed_sm4ed_cg_cp_rs1_b28, Zksed_sm4ed_cg_cp_rs1_b28_str) +8000054c: 0005a383 lw x7,0(x11) +80000550: 01138863 beq x7,x17,80000560 +80000554: 4850746f jal x8,800081d8 +80000558: 80000548 .word 0x80000548 +8000055c: 8000ddc9 .word 0x8000ddc9 +80000560: 00458593 addi x11,x11,4 + + mv x20, x29 # switch data pointer register to avoid conflict with test +80000564: 000e8a13 addi x20,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x13e6630f +80000568: 000a2e83 lw x29,0(x20) +8000056c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x77629765 +80000570: 000a2d03 lw x26,0(x20) +80000574: 004a0a13 addi x20,x20,4 + +80000578 : +Zksed_sm4ed_cg_cp_rs1_b29: + sm4ed x18, x29, x26, 0 # perform operation +80000578: 31ae8933 sm4ed x18,x29,x26,0x0 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zksed_sm4ed_cg_cp_rs1_b29, Zksed_sm4ed_cg_cp_rs1_b29_str) +8000057c: 0005a383 lw x7,0(x11) +80000580: 01238863 beq x7,x18,80000590 +80000584: 4550746f jal x8,800081d8 +80000588: 80000578 .word 0x80000578 +8000058c: 8000ddfe .word 0x8000ddfe +80000590: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x9835ed5f +80000594: 000a2f03 lw x30,0(x20) +80000598: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x3cec068b +8000059c: 000a2683 lw x13,0(x20) +800005a0: 004a0a13 addi x20,x20,4 + +800005a4 : +Zksed_sm4ed_cg_cp_rs1_b30: + sm4ed x21, x30, x13, 1 # perform operation +800005a4: 70df0ab3 sm4ed x21,x30,x13,0x1 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zksed_sm4ed_cg_cp_rs1_b30, Zksed_sm4ed_cg_cp_rs1_b30_str) +800005a8: 0005a383 lw x7,0(x11) +800005ac: 01538863 beq x7,x21,800005bc +800005b0: 4290746f jal x8,800081d8 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 8000de33 .word 0x8000de33 +800005bc: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xc8d786f3 +800005c0: 000a2f83 lw x31,0(x20) +800005c4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x79236453 +800005c8: 000a2083 lw x1,0(x20) +800005cc: 004a0a13 addi x20,x20,4 + +800005d0 : +Zksed_sm4ed_cg_cp_rs1_b31: + sm4ed x4, x31, x1, 0 # perform operation +800005d0: 301f8233 sm4ed x4,x31,x1,0x0 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zksed_sm4ed_cg_cp_rs1_b31, Zksed_sm4ed_cg_cp_rs1_b31_str) +800005d4: 0005a383 lw x7,0(x11) +800005d8: 00438863 beq x7,x4,800005e8 +800005dc: 3fd0746f jal x8,800081d8 +800005e0: 800005d0 .word 0x800005d0 +800005e4: 8000de68 .word 0x8000de68 +800005e8: 00458593 addi x11,x11,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xa40d5081 +800005ec: 000a2103 lw x2,0(x20) +800005f0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x22283687 +800005f4: 000a2003 lw x0,0(x20) +800005f8: 004a0a13 addi x20,x20,4 + +800005fc : +Zksed_sm4ed_cg_cp_rs2_b0: + sm4ed x3, x2, x0, 2 # perform operation +800005fc: b00101b3 sm4ed x3,x2,x0,0x2 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zksed_sm4ed_cg_cp_rs2_b0, Zksed_sm4ed_cg_cp_rs2_b0_str) +80000600: 0005a383 lw x7,0(x11) +80000604: 00338863 beq x7,x3,80000614 +80000608: 3d10746f jal x8,800081d8 +8000060c: 800005fc .word 0x800005fc +80000610: 8000de9d .word 0x8000de9d +80000614: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x93e30043 +80000618: 000a2d83 lw x27,0(x20) +8000061c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xbf5f1c67 +80000620: 000a2083 lw x1,0(x20) +80000624: 004a0a13 addi x20,x20,4 + +80000628 : +Zksed_sm4ed_cg_cp_rs2_b1: + sm4ed x5, x27, x1, 2 # perform operation +80000628: b01d82b3 sm4ed x5,x27,x1,0x2 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b1, Zksed_sm4ed_cg_cp_rs2_b1_str) +8000062c: 0005a383 lw x7,0(x11) +80000630: 00538863 beq x7,x5,80000640 +80000634: 3a50746f jal x8,800081d8 +80000638: 80000628 .word 0x80000628 +8000063c: 8000ded1 .word 0x8000ded1 +80000640: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xefad912e +80000644: 000a2e83 lw x29,0(x20) +80000648: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xab45e000 +8000064c: 000a2103 lw x2,0(x20) +80000650: 004a0a13 addi x20,x20,4 + +80000654 : +Zksed_sm4ed_cg_cp_rs2_b2: + sm4ed x23, x29, x2, 0 # perform operation +80000654: 302e8bb3 sm4ed x23,x29,x2,0x0 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zksed_sm4ed_cg_cp_rs2_b2, Zksed_sm4ed_cg_cp_rs2_b2_str) +80000658: 0005a383 lw x7,0(x11) +8000065c: 01738863 beq x7,x23,8000066c +80000660: 3790746f jal x8,800081d8 +80000664: 80000654 .word 0x80000654 +80000668: 8000df05 .word 0x8000df05 +8000066c: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0xd2ba0ae2 +80000670: 000a2d03 lw x26,0(x20) +80000674: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x4876879f +80000678: 000a2183 lw x3,0(x20) +8000067c: 004a0a13 addi x20,x20,4 + +80000680 : +Zksed_sm4ed_cg_cp_rs2_b3: + sm4ed x5, x26, x3, 3 # perform operation +80000680: f03d02b3 sm4ed x5,x26,x3,0x3 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b3, Zksed_sm4ed_cg_cp_rs2_b3_str) +80000684: 0005a383 lw x7,0(x11) +80000688: 00538863 beq x7,x5,80000698 +8000068c: 34d0746f jal x8,800081d8 +80000690: 80000680 .word 0x80000680 +80000694: 8000df39 .word 0x8000df39 +80000698: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xe61c46c4 +8000069c: 000a2903 lw x18,0(x20) +800006a0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x7e0ff559 +800006a4: 000a2203 lw x4,0(x20) +800006a8: 004a0a13 addi x20,x20,4 + +800006ac : +Zksed_sm4ed_cg_cp_rs2_b4: + sm4ed x5, x18, x4, 2 # perform operation +800006ac: b04902b3 sm4ed x5,x18,x4,0x2 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b4, Zksed_sm4ed_cg_cp_rs2_b4_str) +800006b0: 0005a383 lw x7,0(x11) +800006b4: 00538863 beq x7,x5,800006c4 +800006b8: 3210746f jal x8,800081d8 +800006bc: 800006ac .word 0x800006ac +800006c0: 8000df6d .word 0x8000df6d +800006c4: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x916ed148 +800006c8: 000a2983 lw x19,0(x20) +800006cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0xc1c051df +800006d0: 000a2283 lw x5,0(x20) +800006d4: 004a0a13 addi x20,x20,4 + +800006d8 : +Zksed_sm4ed_cg_cp_rs2_b5: + sm4ed x4, x19, x5, 0 # perform operation +800006d8: 30598233 sm4ed x4,x19,x5,0x0 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zksed_sm4ed_cg_cp_rs2_b5, Zksed_sm4ed_cg_cp_rs2_b5_str) +800006dc: 0005a383 lw x7,0(x11) +800006e0: 00438863 beq x7,x4,800006f0 +800006e4: 2f50746f jal x8,800081d8 +800006e8: 800006d8 .word 0x800006d8 +800006ec: 8000dfa1 .word 0x8000dfa1 +800006f0: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x8425b020 +800006f4: 000a2903 lw x18,0(x20) +800006f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x075305f7 +800006fc: 000a2303 lw x6,0(x20) +80000700: 004a0a13 addi x20,x20,4 + +80000704 : +Zksed_sm4ed_cg_cp_rs2_b6: + sm4ed x19, x18, x6, 3 # perform operation +80000704: f06909b3 sm4ed x19,x18,x6,0x3 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zksed_sm4ed_cg_cp_rs2_b6, Zksed_sm4ed_cg_cp_rs2_b6_str) +80000708: 0005a383 lw x7,0(x11) +8000070c: 01338863 beq x7,x19,8000071c +80000710: 2c90746f jal x8,800081d8 +80000714: 80000704 .word 0x80000704 +80000718: 8000dfd5 .word 0x8000dfd5 +8000071c: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000720: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000724: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x6d843a66 +80000728: 000a2f03 lw x30,0(x20) +8000072c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xec303bfd +80000730: 000a2383 lw x7,0(x20) +80000734: 004a0a13 addi x20,x20,4 + +80000738 : +Zksed_sm4ed_cg_cp_rs2_b7: + sm4ed x1, x30, x7, 3 # perform operation +80000738: f07f00b3 sm4ed x1,x30,x7,0x3 + # Check if x1 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x1, Zksed_sm4ed_cg_cp_rs2_b7, Zksed_sm4ed_cg_cp_rs2_b7_str) +8000073c: 0005a683 lw x13,0(x11) +80000740: 00168863 beq x13,x1,80000750 +80000744: 2bd0776f jal x14,80008200 +80000748: 80000738 .word 0x80000738 +8000074c: 8000e009 .word 0x8000e009 +80000750: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x67257065 +80000754: 000a2c83 lw x25,0(x20) +80000758: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x83a1544f +8000075c: 000a2403 lw x8,0(x20) +80000760: 004a0a13 addi x20,x20,4 + +80000764 : +Zksed_sm4ed_cg_cp_rs2_b8: + sm4ed x30, x25, x8, 3 # perform operation +80000764: f08c8f33 sm4ed x30,x25,x8,0x3 + # Check if x30 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x30, Zksed_sm4ed_cg_cp_rs2_b8, Zksed_sm4ed_cg_cp_rs2_b8_str) +80000768: 0005a683 lw x13,0(x11) +8000076c: 01e68863 beq x13,x30,8000077c +80000770: 2910776f jal x14,80008200 +80000774: 80000764 .word 0x80000764 +80000778: 8000e03d .word 0x8000e03d +8000077c: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x9313c48b +80000780: 000a2403 lw x8,0(x20) +80000784: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x0a63bb17 +80000788: 000a2483 lw x9,0(x20) +8000078c: 004a0a13 addi x20,x20,4 + +80000790 : +Zksed_sm4ed_cg_cp_rs2_b9: + sm4ed x26, x8, x9, 1 # perform operation +80000790: 70940d33 sm4ed x26,x8,x9,0x1 + # Check if x26 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x26, Zksed_sm4ed_cg_cp_rs2_b9, Zksed_sm4ed_cg_cp_rs2_b9_str) +80000794: 0005a683 lw x13,0(x11) +80000798: 01a68863 beq x13,x26,800007a8 +8000079c: 2650776f jal x14,80008200 +800007a0: 80000790 .word 0x80000790 +800007a4: 8000e071 .word 0x8000e071 +800007a8: 00458593 addi x11,x11,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xe3b1cea7 +800007ac: 000a2783 lw x15,0(x20) +800007b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xed128094 +800007b4: 000a2503 lw x10,0(x20) +800007b8: 004a0a13 addi x20,x20,4 + +800007bc : +Zksed_sm4ed_cg_cp_rs2_b10: + sm4ed x5, x15, x10, 1 # perform operation +800007bc: 70a782b3 sm4ed x5,x15,x10,0x1 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zksed_sm4ed_cg_cp_rs2_b10, Zksed_sm4ed_cg_cp_rs2_b10_str) +800007c0: 0005a683 lw x13,0(x11) +800007c4: 00568863 beq x13,x5,800007d4 +800007c8: 2390776f jal x14,80008200 +800007cc: 800007bc .word 0x800007bc +800007d0: 8000e0a5 .word 0x8000e0a5 +800007d4: 00458593 addi x11,x11,4 + + mv x28, x11 # switch signature pointer register to avoid conflict with test +800007d8: 00058e13 addi x28,x11,0 +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x81936eb2 +800007dc: 000a2503 lw x10,0(x20) +800007e0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xd4d7138a +800007e4: 000a2583 lw x11,0(x20) +800007e8: 004a0a13 addi x20,x20,4 + +800007ec : +Zksed_sm4ed_cg_cp_rs2_b11: + sm4ed x22, x10, x11, 1 # perform operation +800007ec: 70b50b33 sm4ed x22,x10,x11,0x1 + # Check if x22 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x22, Zksed_sm4ed_cg_cp_rs2_b11, Zksed_sm4ed_cg_cp_rs2_b11_str) +800007f0: 000e2683 lw x13,0(x28) +800007f4: 01668863 beq x13,x22,80000804 +800007f8: 2090776f jal x14,80008200 +800007fc: 800007ec .word 0x800007ec +80000800: 8000e0da .word 0x8000e0da +80000804: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x70b1b5d9 +80000808: 000a2103 lw x2,0(x20) +8000080c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x59579c3d +80000810: 000a2603 lw x12,0(x20) +80000814: 004a0a13 addi x20,x20,4 + +80000818 : +Zksed_sm4ed_cg_cp_rs2_b12: + sm4ed x31, x2, x12, 1 # perform operation +80000818: 70c10fb3 sm4ed x31,x2,x12,0x1 + # Check if x31 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x31, Zksed_sm4ed_cg_cp_rs2_b12, Zksed_sm4ed_cg_cp_rs2_b12_str) +8000081c: 000e2683 lw x13,0(x28) +80000820: 01f68863 beq x13,x31,80000830 +80000824: 1dd0776f jal x14,80008200 +80000828: 80000818 .word 0x80000818 +8000082c: 8000e10f .word 0x8000e10f +80000830: 004e0e13 addi x28,x28,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000834: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80000838: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xf798f609 +8000083c: 000a2c83 lw x25,0(x20) +80000840: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x322902c6 +80000844: 000a2683 lw x13,0(x20) +80000848: 004a0a13 addi x20,x20,4 + +8000084c : +Zksed_sm4ed_cg_cp_rs2_b13: + sm4ed x7, x25, x13, 2 # perform operation +8000084c: b0dc83b3 sm4ed x7,x25,x13,0x2 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zksed_sm4ed_cg_cp_rs2_b13, Zksed_sm4ed_cg_cp_rs2_b13_str) +80000850: 000e2203 lw x4,0(x28) +80000854: 00720863 beq x4,x7,80000864 +80000858: 169072ef jal x5,800081c0 +8000085c: 8000084c .word 0x8000084c +80000860: 8000e144 .word 0x8000e144 +80000864: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x8081fa6b +80000868: 000a2483 lw x9,0(x20) +8000086c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x5a5ed4b6 +80000870: 000a2703 lw x14,0(x20) +80000874: 004a0a13 addi x20,x20,4 + +80000878 : +Zksed_sm4ed_cg_cp_rs2_b14: + sm4ed x15, x9, x14, 1 # perform operation +80000878: 70e487b3 sm4ed x15,x9,x14,0x1 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zksed_sm4ed_cg_cp_rs2_b14, Zksed_sm4ed_cg_cp_rs2_b14_str) +8000087c: 000e2203 lw x4,0(x28) +80000880: 00f20863 beq x4,x15,80000890 +80000884: 13d072ef jal x5,800081c0 +80000888: 80000878 .word 0x80000878 +8000088c: 8000e179 .word 0x8000e179 +80000890: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xa8ad9560 +80000894: 000a2903 lw x18,0(x20) +80000898: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xe53e0017 +8000089c: 000a2783 lw x15,0(x20) +800008a0: 004a0a13 addi x20,x20,4 + +800008a4 : +Zksed_sm4ed_cg_cp_rs2_b15: + sm4ed x14, x18, x15, 0 # perform operation +800008a4: 30f90733 sm4ed x14,x18,x15,0x0 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zksed_sm4ed_cg_cp_rs2_b15, Zksed_sm4ed_cg_cp_rs2_b15_str) +800008a8: 000e2203 lw x4,0(x28) +800008ac: 00e20863 beq x4,x14,800008bc +800008b0: 111072ef jal x5,800081c0 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 8000e1ae .word 0x8000e1ae +800008bc: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x5b21fbad +800008c0: 000a2503 lw x10,0(x20) +800008c4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x032a7afe +800008c8: 000a2803 lw x16,0(x20) +800008cc: 004a0a13 addi x20,x20,4 + +800008d0 : +Zksed_sm4ed_cg_cp_rs2_b16: + sm4ed x14, x10, x16, 3 # perform operation +800008d0: f1050733 sm4ed x14,x10,x16,0x3 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zksed_sm4ed_cg_cp_rs2_b16, Zksed_sm4ed_cg_cp_rs2_b16_str) +800008d4: 000e2203 lw x4,0(x28) +800008d8: 00e20863 beq x4,x14,800008e8 +800008dc: 0e5072ef jal x5,800081c0 +800008e0: 800008d0 .word 0x800008d0 +800008e4: 8000e1e3 .word 0x8000e1e3 +800008e8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xd8aeca18 +800008ec: 000a2983 lw x19,0(x20) +800008f0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x784992d1 +800008f4: 000a2883 lw x17,0(x20) +800008f8: 004a0a13 addi x20,x20,4 + +800008fc : +Zksed_sm4ed_cg_cp_rs2_b17: + sm4ed x30, x19, x17, 1 # perform operation +800008fc: 71198f33 sm4ed x30,x19,x17,0x1 + # Check if x30 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x30, Zksed_sm4ed_cg_cp_rs2_b17, Zksed_sm4ed_cg_cp_rs2_b17_str) +80000900: 000e2203 lw x4,0(x28) +80000904: 01e20863 beq x4,x30,80000914 +80000908: 0b9072ef jal x5,800081c0 +8000090c: 800008fc .word 0x800008fc +80000910: 8000e218 .word 0x8000e218 +80000914: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x88c36de2 +80000918: 000a2083 lw x1,0(x20) +8000091c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x91fe61a7 +80000920: 000a2903 lw x18,0(x20) +80000924: 004a0a13 addi x20,x20,4 + +80000928 : +Zksed_sm4ed_cg_cp_rs2_b18: + sm4ed x10, x1, x18, 2 # perform operation +80000928: b1208533 sm4ed x10,x1,x18,0x2 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zksed_sm4ed_cg_cp_rs2_b18, Zksed_sm4ed_cg_cp_rs2_b18_str) +8000092c: 000e2203 lw x4,0(x28) +80000930: 00a20863 beq x4,x10,80000940 +80000934: 08d072ef jal x5,800081c0 +80000938: 80000928 .word 0x80000928 +8000093c: 8000e24d .word 0x8000e24d +80000940: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x79f730b9 +80000944: 000a2e83 lw x29,0(x20) +80000948: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x6baf5180 +8000094c: 000a2983 lw x19,0(x20) +80000950: 004a0a13 addi x20,x20,4 + +80000954 : +Zksed_sm4ed_cg_cp_rs2_b19: + sm4ed x26, x29, x19, 0 # perform operation +80000954: 313e8d33 sm4ed x26,x29,x19,0x0 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zksed_sm4ed_cg_cp_rs2_b19, Zksed_sm4ed_cg_cp_rs2_b19_str) +80000958: 000e2203 lw x4,0(x28) +8000095c: 01a20863 beq x4,x26,8000096c +80000960: 061072ef jal x5,800081c0 +80000964: 80000954 .word 0x80000954 +80000968: 8000e282 .word 0x8000e282 +8000096c: 004e0e13 addi x28,x28,4 + + mv x18, x20 # switch data pointer register to avoid conflict with test +80000970: 000a0913 addi x18,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x4e0c4f15 +80000974: 00092b03 lw x22,0(x18) +80000978: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x10fa5fe4 +8000097c: 00092a03 lw x20,0(x18) +80000980: 00490913 addi x18,x18,4 + +80000984 : +Zksed_sm4ed_cg_cp_rs2_b20: + sm4ed x8, x22, x20, 3 # perform operation +80000984: f14b0433 sm4ed x8,x22,x20,0x3 + # Check if x8 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x8, Zksed_sm4ed_cg_cp_rs2_b20, Zksed_sm4ed_cg_cp_rs2_b20_str) +80000988: 000e2203 lw x4,0(x28) +8000098c: 00820863 beq x4,x8,8000099c +80000990: 031072ef jal x5,800081c0 +80000994: 80000984 .word 0x80000984 +80000998: 8000e2b7 .word 0x8000e2b7 +8000099c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xef8d1b41 +800009a0: 00092783 lw x15,0(x18) +800009a4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x5ed9ad08 +800009a8: 00092a83 lw x21,0(x18) +800009ac: 00490913 addi x18,x18,4 + +800009b0 : +Zksed_sm4ed_cg_cp_rs2_b21: + sm4ed x7, x15, x21, 3 # perform operation +800009b0: f15783b3 sm4ed x7,x15,x21,0x3 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zksed_sm4ed_cg_cp_rs2_b21, Zksed_sm4ed_cg_cp_rs2_b21_str) +800009b4: 000e2203 lw x4,0(x28) +800009b8: 00720863 beq x4,x7,800009c8 +800009bc: 005072ef jal x5,800081c0 +800009c0: 800009b0 .word 0x800009b0 +800009c4: 8000e2ec .word 0x8000e2ec +800009c8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0xdc4c4d37 +800009cc: 00092a03 lw x20,0(x18) +800009d0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0xa2676b76 +800009d4: 00092b03 lw x22,0(x18) +800009d8: 00490913 addi x18,x18,4 + +800009dc : +Zksed_sm4ed_cg_cp_rs2_b22: + sm4ed x10, x20, x22, 1 # perform operation +800009dc: 716a0533 sm4ed x10,x20,x22,0x1 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zksed_sm4ed_cg_cp_rs2_b22, Zksed_sm4ed_cg_cp_rs2_b22_str) +800009e0: 000e2203 lw x4,0(x28) +800009e4: 00a20863 beq x4,x10,800009f4 +800009e8: 7d8072ef jal x5,800081c0 +800009ec: 800009dc .word 0x800009dc +800009f0: 8000e321 .word 0x8000e321 +800009f4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xf1132322 +800009f8: 00092603 lw x12,0(x18) +800009fc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xcf67397d +80000a00: 00092b83 lw x23,0(x18) +80000a04: 00490913 addi x18,x18,4 + +80000a08 : +Zksed_sm4ed_cg_cp_rs2_b23: + sm4ed x27, x12, x23, 3 # perform operation +80000a08: f1760db3 sm4ed x27,x12,x23,0x3 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zksed_sm4ed_cg_cp_rs2_b23, Zksed_sm4ed_cg_cp_rs2_b23_str) +80000a0c: 000e2203 lw x4,0(x28) +80000a10: 01b20863 beq x4,x27,80000a20 +80000a14: 7ac072ef jal x5,800081c0 +80000a18: 80000a08 .word 0x80000a08 +80000a1c: 8000e356 .word 0x8000e356 +80000a20: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x02e3f5db +80000a24: 00092d03 lw x26,0(x18) +80000a28: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xf37ed847 +80000a2c: 00092c03 lw x24,0(x18) +80000a30: 00490913 addi x18,x18,4 + +80000a34 : +Zksed_sm4ed_cg_cp_rs2_b24: + sm4ed x31, x26, x24, 3 # perform operation +80000a34: f18d0fb3 sm4ed x31,x26,x24,0x3 + # Check if x31 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x31, Zksed_sm4ed_cg_cp_rs2_b24, Zksed_sm4ed_cg_cp_rs2_b24_str) +80000a38: 000e2203 lw x4,0(x28) +80000a3c: 01f20863 beq x4,x31,80000a4c +80000a40: 780072ef jal x5,800081c0 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 8000e38b .word 0x8000e38b +80000a4c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0xc5a57817 +80000a50: 00092b83 lw x23,0(x18) +80000a54: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x58fb071f +80000a58: 00092c83 lw x25,0(x18) +80000a5c: 00490913 addi x18,x18,4 + +80000a60 : +Zksed_sm4ed_cg_cp_rs2_b25: + sm4ed x3, x23, x25, 1 # perform operation +80000a60: 719b81b3 sm4ed x3,x23,x25,0x1 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zksed_sm4ed_cg_cp_rs2_b25, Zksed_sm4ed_cg_cp_rs2_b25_str) +80000a64: 000e2203 lw x4,0(x28) +80000a68: 00320863 beq x4,x3,80000a78 +80000a6c: 754072ef jal x5,800081c0 +80000a70: 80000a60 .word 0x80000a60 +80000a74: 8000e3c0 .word 0x8000e3c0 +80000a78: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x7f52778d +80000a7c: 00092603 lw x12,0(x18) +80000a80: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x6a5fd091 +80000a84: 00092d03 lw x26,0(x18) +80000a88: 00490913 addi x18,x18,4 + +80000a8c : +Zksed_sm4ed_cg_cp_rs2_b26: + sm4ed x27, x12, x26, 3 # perform operation +80000a8c: f1a60db3 sm4ed x27,x12,x26,0x3 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zksed_sm4ed_cg_cp_rs2_b26, Zksed_sm4ed_cg_cp_rs2_b26_str) +80000a90: 000e2203 lw x4,0(x28) +80000a94: 01b20863 beq x4,x27,80000aa4 +80000a98: 728072ef jal x5,800081c0 +80000a9c: 80000a8c .word 0x80000a8c +80000aa0: 8000e3f5 .word 0x8000e3f5 +80000aa4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x7a904034 +80000aa8: 00092703 lw x14,0(x18) +80000aac: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x5ea57f75 +80000ab0: 00092d83 lw x27,0(x18) +80000ab4: 00490913 addi x18,x18,4 + +80000ab8 : +Zksed_sm4ed_cg_cp_rs2_b27: + sm4ed x31, x14, x27, 1 # perform operation +80000ab8: 71b70fb3 sm4ed x31,x14,x27,0x1 + # Check if x31 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x31, Zksed_sm4ed_cg_cp_rs2_b27, Zksed_sm4ed_cg_cp_rs2_b27_str) +80000abc: 000e2203 lw x4,0(x28) +80000ac0: 01f20863 beq x4,x31,80000ad0 +80000ac4: 6fc072ef jal x5,800081c0 +80000ac8: 80000ab8 .word 0x80000ab8 +80000acc: 8000e42a .word 0x8000e42a +80000ad0: 004e0e13 addi x28,x28,4 + + mv x2, x28 # switch signature pointer register to avoid conflict with test +80000ad4: 000e0113 addi x2,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x1b88477a +80000ad8: 00092603 lw x12,0(x18) +80000adc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x2cfc437d +80000ae0: 00092e03 lw x28,0(x18) +80000ae4: 00490913 addi x18,x18,4 + +80000ae8 : +Zksed_sm4ed_cg_cp_rs2_b28: + sm4ed x27, x12, x28, 3 # perform operation +80000ae8: f1c60db3 sm4ed x27,x12,x28,0x3 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ed_cg_cp_rs2_b28, Zksed_sm4ed_cg_cp_rs2_b28_str) +80000aec: 00012203 lw x4,0(x2) +80000af0: 01b20863 beq x4,x27,80000b00 +80000af4: 6cc072ef jal x5,800081c0 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 8000e45f .word 0x8000e45f +80000b00: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x335eb8c0 +80000b04: 00092303 lw x6,0(x18) +80000b08: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x3f78752b +80000b0c: 00092e83 lw x29,0(x18) +80000b10: 00490913 addi x18,x18,4 + +80000b14 : +Zksed_sm4ed_cg_cp_rs2_b29: + sm4ed x1, x6, x29, 3 # perform operation +80000b14: f1d300b3 sm4ed x1,x6,x29,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ed_cg_cp_rs2_b29, Zksed_sm4ed_cg_cp_rs2_b29_str) +80000b18: 00012203 lw x4,0(x2) +80000b1c: 00120863 beq x4,x1,80000b2c +80000b20: 6a0072ef jal x5,800081c0 +80000b24: 80000b14 .word 0x80000b14 +80000b28: 8000e494 .word 0x8000e494 +80000b2c: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0xa5d90c93 +80000b30: 00092a83 lw x21,0(x18) +80000b34: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x37040c26 +80000b38: 00092f03 lw x30,0(x18) +80000b3c: 00490913 addi x18,x18,4 + +80000b40 : +Zksed_sm4ed_cg_cp_rs2_b30: + sm4ed x9, x21, x30, 1 # perform operation +80000b40: 71ea84b3 sm4ed x9,x21,x30,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ed_cg_cp_rs2_b30, Zksed_sm4ed_cg_cp_rs2_b30_str) +80000b44: 00012203 lw x4,0(x2) +80000b48: 00920863 beq x4,x9,80000b58 +80000b4c: 674072ef jal x5,800081c0 +80000b50: 80000b40 .word 0x80000b40 +80000b54: 8000e4c9 .word 0x8000e4c9 +80000b58: 00410113 addi x2,x2,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x32e883a8 +80000b5c: 00092083 lw x1,0(x18) +80000b60: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x1913d951 +80000b64: 00092f83 lw x31,0(x18) +80000b68: 00490913 addi x18,x18,4 + +80000b6c : +Zksed_sm4ed_cg_cp_rs2_b31: + sm4ed x24, x1, x31, 2 # perform operation +80000b6c: b1f08c33 sm4ed x24,x1,x31,0x2 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ed_cg_cp_rs2_b31, Zksed_sm4ed_cg_cp_rs2_b31_str) +80000b70: 00012203 lw x4,0(x2) +80000b74: 01820863 beq x4,x24,80000b84 +80000b78: 648072ef jal x5,800081c0 +80000b7c: 80000b6c .word 0x80000b6c +80000b80: 8000e4fe .word 0x8000e4fe +80000b84: 00410113 addi x2,x2,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x29852296 +80000b88: 00092703 lw x14,0(x18) +80000b8c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x53fd467c +80000b90: 00092483 lw x9,0(x18) +80000b94: 00490913 addi x18,x18,4 + +80000b98 : +Zksed_sm4ed_cg_cp_rd_b0: + sm4ed x0, x14, x9, 2 # perform operation +80000b98: b0970033 sm4ed x0,x14,x9,0x2 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zksed_sm4ed_cg_cp_rd_b0, Zksed_sm4ed_cg_cp_rd_b0_str) +80000b9c: 00012203 lw x4,0(x2) +80000ba0: 00020863 beq x4,x0,80000bb0 +80000ba4: 61c072ef jal x5,800081c0 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 8000e533 .word 0x8000e533 +80000bb0: 00410113 addi x2,x2,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x464e03ce +80000bb4: 00092a03 lw x20,0(x18) +80000bb8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x895a1fac +80000bbc: 00092e83 lw x29,0(x18) +80000bc0: 00490913 addi x18,x18,4 + +80000bc4 : +Zksed_sm4ed_cg_cp_rd_b1: + sm4ed x1, x20, x29, 0 # perform operation +80000bc4: 31da00b3 sm4ed x1,x20,x29,0x0 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ed_cg_cp_rd_b1, Zksed_sm4ed_cg_cp_rd_b1_str) +80000bc8: 00012203 lw x4,0(x2) +80000bcc: 00120863 beq x4,x1,80000bdc +80000bd0: 5f0072ef jal x5,800081c0 +80000bd4: 80000bc4 .word 0x80000bc4 +80000bd8: 8000e566 .word 0x8000e566 +80000bdc: 00410113 addi x2,x2,4 + + mv x28, x2 # switch signature pointer register to avoid conflict with test +80000be0: 00010e13 addi x28,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x59657eaa +80000be4: 00092003 lw x0,0(x18) +80000be8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x77568af6 +80000bec: 00092683 lw x13,0(x18) +80000bf0: 00490913 addi x18,x18,4 + +80000bf4 : +Zksed_sm4ed_cg_cp_rd_b2: + sm4ed x2, x0, x13, 1 # perform operation +80000bf4: 70d00133 sm4ed x2,x0,x13,0x1 + # Check if x2 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x2, Zksed_sm4ed_cg_cp_rd_b2, Zksed_sm4ed_cg_cp_rd_b2_str) +80000bf8: 000e2203 lw x4,0(x28) +80000bfc: 00220863 beq x4,x2,80000c0c +80000c00: 5c0072ef jal x5,800081c0 +80000c04: 80000bf4 .word 0x80000bf4 +80000c08: 8000e599 .word 0x8000e599 +80000c0c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x6d81a2da +80000c10: 00092f03 lw x30,0(x18) +80000c14: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x97d976a7 +80000c18: 00092703 lw x14,0(x18) +80000c1c: 00490913 addi x18,x18,4 + +80000c20 : +Zksed_sm4ed_cg_cp_rd_b3: + sm4ed x3, x30, x14, 2 # perform operation +80000c20: b0ef01b3 sm4ed x3,x30,x14,0x2 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zksed_sm4ed_cg_cp_rd_b3, Zksed_sm4ed_cg_cp_rd_b3_str) +80000c24: 000e2203 lw x4,0(x28) +80000c28: 00320863 beq x4,x3,80000c38 +80000c2c: 594072ef jal x5,800081c0 +80000c30: 80000c20 .word 0x80000c20 +80000c34: 8000e5cc .word 0x8000e5cc +80000c38: 004e0e13 addi x28,x28,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c3c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c40: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xaa8402ed +80000c44: 00092103 lw x2,0(x18) +80000c48: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xae3df015 +80000c4c: 00092503 lw x10,0(x18) +80000c50: 00490913 addi x18,x18,4 + +80000c54 : +Zksed_sm4ed_cg_cp_rd_b4: + sm4ed x4, x2, x10, 2 # perform operation +80000c54: b0a10233 sm4ed x4,x2,x10,0x2 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zksed_sm4ed_cg_cp_rd_b4, Zksed_sm4ed_cg_cp_rd_b4_str) +80000c58: 000e2383 lw x7,0(x28) +80000c5c: 00438863 beq x7,x4,80000c6c +80000c60: 5780746f jal x8,800081d8 +80000c64: 80000c54 .word 0x80000c54 +80000c68: 8000e5ff .word 0x8000e5ff +80000c6c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0xa2ad6749 +80000c70: 00092003 lw x0,0(x18) +80000c74: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xa66a7724 +80000c78: 00092603 lw x12,0(x18) +80000c7c: 00490913 addi x18,x18,4 + +80000c80 : +Zksed_sm4ed_cg_cp_rd_b5: + sm4ed x5, x0, x12, 0 # perform operation +80000c80: 30c002b3 sm4ed x5,x0,x12,0x0 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zksed_sm4ed_cg_cp_rd_b5, Zksed_sm4ed_cg_cp_rd_b5_str) +80000c84: 000e2383 lw x7,0(x28) +80000c88: 00538863 beq x7,x5,80000c98 +80000c8c: 54c0746f jal x8,800081d8 +80000c90: 80000c80 .word 0x80000c80 +80000c94: 8000e632 .word 0x8000e632 +80000c98: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x82d379b6 +80000c9c: 00092d83 lw x27,0(x18) +80000ca0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x3fdb7469 +80000ca4: 00092603 lw x12,0(x18) +80000ca8: 00490913 addi x18,x18,4 + +80000cac : +Zksed_sm4ed_cg_cp_rd_b6: + sm4ed x6, x27, x12, 2 # perform operation +80000cac: b0cd8333 sm4ed x6,x27,x12,0x2 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zksed_sm4ed_cg_cp_rd_b6, Zksed_sm4ed_cg_cp_rd_b6_str) +80000cb0: 000e2383 lw x7,0(x28) +80000cb4: 00638863 beq x7,x6,80000cc4 +80000cb8: 5200746f jal x8,800081d8 +80000cbc: 80000cac .word 0x80000cac +80000cc0: 8000e665 .word 0x8000e665 +80000cc4: 004e0e13 addi x28,x28,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000cc8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000ccc: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xa0343c2a +80000cd0: 00092403 lw x8,0(x18) +80000cd4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x952a55f8 +80000cd8: 00092183 lw x3,0(x18) +80000cdc: 00490913 addi x18,x18,4 + +80000ce0 : +Zksed_sm4ed_cg_cp_rd_b7: + sm4ed x7, x8, x3, 1 # perform operation +80000ce0: 703403b3 sm4ed x7,x8,x3,0x1 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zksed_sm4ed_cg_cp_rd_b7, Zksed_sm4ed_cg_cp_rd_b7_str) +80000ce4: 000e2203 lw x4,0(x28) +80000ce8: 00720863 beq x4,x7,80000cf8 +80000cec: 4d4072ef jal x5,800081c0 +80000cf0: 80000ce0 .word 0x80000ce0 +80000cf4: 8000e698 .word 0x8000e698 +80000cf8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x9ea5c061 +80000cfc: 00092c03 lw x24,0(x18) +80000d00: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x2c7113cf +80000d04: 00092a83 lw x21,0(x18) +80000d08: 00490913 addi x18,x18,4 + +80000d0c : +Zksed_sm4ed_cg_cp_rd_b8: + sm4ed x8, x24, x21, 1 # perform operation +80000d0c: 715c0433 sm4ed x8,x24,x21,0x1 + # Check if x8 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x8, Zksed_sm4ed_cg_cp_rd_b8, Zksed_sm4ed_cg_cp_rd_b8_str) +80000d10: 000e2203 lw x4,0(x28) +80000d14: 00820863 beq x4,x8,80000d24 +80000d18: 4a8072ef jal x5,800081c0 +80000d1c: 80000d0c .word 0x80000d0c +80000d20: 8000e6cb .word 0x8000e6cb +80000d24: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x920c1207 +80000d28: 00092783 lw x15,0(x18) +80000d2c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xcce05ec0 +80000d30: 00092003 lw x0,0(x18) +80000d34: 00490913 addi x18,x18,4 + +80000d38 : +Zksed_sm4ed_cg_cp_rd_b9: + sm4ed x9, x15, x0, 3 # perform operation +80000d38: f00784b3 sm4ed x9,x15,x0,0x3 + # Check if x9 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x9, Zksed_sm4ed_cg_cp_rd_b9, Zksed_sm4ed_cg_cp_rd_b9_str) +80000d3c: 000e2203 lw x4,0(x28) +80000d40: 00920863 beq x4,x9,80000d50 +80000d44: 47c072ef jal x5,800081c0 +80000d48: 80000d38 .word 0x80000d38 +80000d4c: 8000e6fe .word 0x8000e6fe +80000d50: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xb95f332b +80000d54: 00092683 lw x13,0(x18) +80000d58: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xb429890b +80000d5c: 00092583 lw x11,0(x18) +80000d60: 00490913 addi x18,x18,4 + +80000d64 : +Zksed_sm4ed_cg_cp_rd_b10: + sm4ed x10, x13, x11, 0 # perform operation +80000d64: 30b68533 sm4ed x10,x13,x11,0x0 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zksed_sm4ed_cg_cp_rd_b10, Zksed_sm4ed_cg_cp_rd_b10_str) +80000d68: 000e2203 lw x4,0(x28) +80000d6c: 00a20863 beq x4,x10,80000d7c +80000d70: 450072ef jal x5,800081c0 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 8000e731 .word 0x8000e731 +80000d7c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x888d3eab +80000d80: 00092003 lw x0,0(x18) +80000d84: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xc5489c3d +80000d88: 00092983 lw x19,0(x18) +80000d8c: 00490913 addi x18,x18,4 + +80000d90 : +Zksed_sm4ed_cg_cp_rd_b11: + sm4ed x11, x0, x19, 0 # perform operation +80000d90: 313005b3 sm4ed x11,x0,x19,0x0 + # Check if x11 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x11, Zksed_sm4ed_cg_cp_rd_b11, Zksed_sm4ed_cg_cp_rd_b11_str) +80000d94: 000e2203 lw x4,0(x28) +80000d98: 00b20863 beq x4,x11,80000da8 +80000d9c: 424072ef jal x5,800081c0 +80000da0: 80000d90 .word 0x80000d90 +80000da4: 8000e765 .word 0x8000e765 +80000da8: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x414aea9d +80000dac: 00092083 lw x1,0(x18) +80000db0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x7ee1ceaf +80000db4: 00092303 lw x6,0(x18) +80000db8: 00490913 addi x18,x18,4 + +80000dbc : +Zksed_sm4ed_cg_cp_rd_b12: + sm4ed x12, x1, x6, 0 # perform operation +80000dbc: 30608633 sm4ed x12,x1,x6,0x0 + # Check if x12 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x12, Zksed_sm4ed_cg_cp_rd_b12, Zksed_sm4ed_cg_cp_rd_b12_str) +80000dc0: 000e2203 lw x4,0(x28) +80000dc4: 00c20863 beq x4,x12,80000dd4 +80000dc8: 3f8072ef jal x5,800081c0 +80000dcc: 80000dbc .word 0x80000dbc +80000dd0: 8000e799 .word 0x8000e799 +80000dd4: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x0b3a3e36 +80000dd8: 00092f03 lw x30,0(x18) +80000ddc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x7e8b8ed8 +80000de0: 00092b03 lw x22,0(x18) +80000de4: 00490913 addi x18,x18,4 + +80000de8 : +Zksed_sm4ed_cg_cp_rd_b13: + sm4ed x13, x30, x22, 2 # perform operation +80000de8: b16f06b3 sm4ed x13,x30,x22,0x2 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zksed_sm4ed_cg_cp_rd_b13, Zksed_sm4ed_cg_cp_rd_b13_str) +80000dec: 000e2203 lw x4,0(x28) +80000df0: 00d20863 beq x4,x13,80000e00 +80000df4: 3cc072ef jal x5,800081c0 +80000df8: 80000de8 .word 0x80000de8 +80000dfc: 8000e7cd .word 0x8000e7cd +80000e00: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x3b4bf751 +80000e04: 00092d83 lw x27,0(x18) +80000e08: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x06e2c08f +80000e0c: 00092103 lw x2,0(x18) +80000e10: 00490913 addi x18,x18,4 + +80000e14 : +Zksed_sm4ed_cg_cp_rd_b14: + sm4ed x14, x27, x2, 1 # perform operation +80000e14: 702d8733 sm4ed x14,x27,x2,0x1 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zksed_sm4ed_cg_cp_rd_b14, Zksed_sm4ed_cg_cp_rd_b14_str) +80000e18: 000e2203 lw x4,0(x28) +80000e1c: 00e20863 beq x4,x14,80000e2c +80000e20: 3a0072ef jal x5,800081c0 +80000e24: 80000e14 .word 0x80000e14 +80000e28: 8000e801 .word 0x8000e801 +80000e2c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x3ccdcf8f +80000e30: 00092703 lw x14,0(x18) +80000e34: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xf245c758 +80000e38: 00092603 lw x12,0(x18) +80000e3c: 00490913 addi x18,x18,4 + +80000e40 : +Zksed_sm4ed_cg_cp_rd_b15: + sm4ed x15, x14, x12, 1 # perform operation +80000e40: 70c707b3 sm4ed x15,x14,x12,0x1 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zksed_sm4ed_cg_cp_rd_b15, Zksed_sm4ed_cg_cp_rd_b15_str) +80000e44: 000e2203 lw x4,0(x28) +80000e48: 00f20863 beq x4,x15,80000e58 +80000e4c: 374072ef jal x5,800081c0 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 8000e835 .word 0x8000e835 +80000e58: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xd63f2af5 +80000e5c: 00092083 lw x1,0(x18) +80000e60: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xdea20883 +80000e64: 00092103 lw x2,0(x18) +80000e68: 00490913 addi x18,x18,4 + +80000e6c : +Zksed_sm4ed_cg_cp_rd_b16: + sm4ed x16, x1, x2, 3 # perform operation +80000e6c: f0208833 sm4ed x16,x1,x2,0x3 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zksed_sm4ed_cg_cp_rd_b16, Zksed_sm4ed_cg_cp_rd_b16_str) +80000e70: 000e2203 lw x4,0(x28) +80000e74: 01020863 beq x4,x16,80000e84 +80000e78: 348072ef jal x5,800081c0 +80000e7c: 80000e6c .word 0x80000e6c +80000e80: 8000e869 .word 0x8000e869 +80000e84: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x55e1b6b0 +80000e88: 00092483 lw x9,0(x18) +80000e8c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x268887e6 +80000e90: 00092503 lw x10,0(x18) +80000e94: 00490913 addi x18,x18,4 + +80000e98 : +Zksed_sm4ed_cg_cp_rd_b17: + sm4ed x17, x9, x10, 3 # perform operation +80000e98: f0a488b3 sm4ed x17,x9,x10,0x3 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zksed_sm4ed_cg_cp_rd_b17, Zksed_sm4ed_cg_cp_rd_b17_str) +80000e9c: 000e2203 lw x4,0(x28) +80000ea0: 01120863 beq x4,x17,80000eb0 +80000ea4: 31c072ef jal x5,800081c0 +80000ea8: 80000e98 .word 0x80000e98 +80000eac: 8000e89d .word 0x8000e89d +80000eb0: 004e0e13 addi x28,x28,4 + + mv x21, x18 # switch data pointer register to avoid conflict with test +80000eb4: 00090a93 addi x21,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x1505376b +80000eb8: 000aa883 lw x17,0(x21) +80000ebc: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xc6ee58ce +80000ec0: 000aa503 lw x10,0(x21) +80000ec4: 004a8a93 addi x21,x21,4 + +80000ec8 : +Zksed_sm4ed_cg_cp_rd_b18: + sm4ed x18, x17, x10, 2 # perform operation +80000ec8: b0a88933 sm4ed x18,x17,x10,0x2 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zksed_sm4ed_cg_cp_rd_b18, Zksed_sm4ed_cg_cp_rd_b18_str) +80000ecc: 000e2203 lw x4,0(x28) +80000ed0: 01220863 beq x4,x18,80000ee0 +80000ed4: 2ec072ef jal x5,800081c0 +80000ed8: 80000ec8 .word 0x80000ec8 +80000edc: 8000e8d1 .word 0x8000e8d1 +80000ee0: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xe392d068 +80000ee4: 000aa583 lw x11,0(x21) +80000ee8: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x52b4bba4 +80000eec: 000aab03 lw x22,0(x21) +80000ef0: 004a8a93 addi x21,x21,4 + +80000ef4 : +Zksed_sm4ed_cg_cp_rd_b19: + sm4ed x19, x11, x22, 0 # perform operation +80000ef4: 316589b3 sm4ed x19,x11,x22,0x0 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zksed_sm4ed_cg_cp_rd_b19, Zksed_sm4ed_cg_cp_rd_b19_str) +80000ef8: 000e2203 lw x4,0(x28) +80000efc: 01320863 beq x4,x19,80000f0c +80000f00: 2c0072ef jal x5,800081c0 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 8000e905 .word 0x8000e905 +80000f0c: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xfe592922 +80000f10: 000aaf03 lw x30,0(x21) +80000f14: 004a8a93 addi x21,x21,4 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x7a02360c +80000f18: 000aa503 lw x10,0(x21) +80000f1c: 004a8a93 addi x21,x21,4 + +80000f20 : +Zksed_sm4ed_cg_cp_rd_b20: + sm4ed x20, x30, x10, 0 # perform operation +80000f20: 30af0a33 sm4ed x20,x30,x10,0x0 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zksed_sm4ed_cg_cp_rd_b20, Zksed_sm4ed_cg_cp_rd_b20_str) +80000f24: 000e2203 lw x4,0(x28) +80000f28: 01420863 beq x4,x20,80000f38 +80000f2c: 294072ef jal x5,800081c0 +80000f30: 80000f20 .word 0x80000f20 +80000f34: 8000e939 .word 0x8000e939 +80000f38: 004e0e13 addi x28,x28,4 + + mv x20, x21 # switch data pointer register to avoid conflict with test +80000f3c: 000a8a13 addi x20,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x1b8db6f2 +80000f40: 000a2983 lw x19,0(x20) +80000f44: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x2b1305fd +80000f48: 000a2903 lw x18,0(x20) +80000f4c: 004a0a13 addi x20,x20,4 + +80000f50 : +Zksed_sm4ed_cg_cp_rd_b21: + sm4ed x21, x19, x18, 0 # perform operation +80000f50: 31298ab3 sm4ed x21,x19,x18,0x0 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zksed_sm4ed_cg_cp_rd_b21, Zksed_sm4ed_cg_cp_rd_b21_str) +80000f54: 000e2203 lw x4,0(x28) +80000f58: 01520863 beq x4,x21,80000f68 +80000f5c: 264072ef jal x5,800081c0 +80000f60: 80000f50 .word 0x80000f50 +80000f64: 8000e96d .word 0x8000e96d +80000f68: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xd762a3f3 +80000f6c: 000a2483 lw x9,0(x20) +80000f70: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xf3188810 +80000f74: 000a2983 lw x19,0(x20) +80000f78: 004a0a13 addi x20,x20,4 + +80000f7c : +Zksed_sm4ed_cg_cp_rd_b22: + sm4ed x22, x9, x19, 1 # perform operation +80000f7c: 71348b33 sm4ed x22,x9,x19,0x1 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zksed_sm4ed_cg_cp_rd_b22, Zksed_sm4ed_cg_cp_rd_b22_str) +80000f80: 000e2203 lw x4,0(x28) +80000f84: 01620863 beq x4,x22,80000f94 +80000f88: 238072ef jal x5,800081c0 +80000f8c: 80000f7c .word 0x80000f7c +80000f90: 8000e9a1 .word 0x8000e9a1 +80000f94: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x7e2d7607 +80000f98: 000a2383 lw x7,0(x20) +80000f9c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x219e0ef1 +80000fa0: 000a2483 lw x9,0(x20) +80000fa4: 004a0a13 addi x20,x20,4 + +80000fa8 : +Zksed_sm4ed_cg_cp_rd_b23: + sm4ed x23, x7, x9, 1 # perform operation +80000fa8: 70938bb3 sm4ed x23,x7,x9,0x1 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zksed_sm4ed_cg_cp_rd_b23, Zksed_sm4ed_cg_cp_rd_b23_str) +80000fac: 000e2203 lw x4,0(x28) +80000fb0: 01720863 beq x4,x23,80000fc0 +80000fb4: 20c072ef jal x5,800081c0 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 8000e9d5 .word 0x8000e9d5 +80000fc0: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xd540ab64 +80000fc4: 000a2503 lw x10,0(x20) +80000fc8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x1dc757ce +80000fcc: 000a2b03 lw x22,0(x20) +80000fd0: 004a0a13 addi x20,x20,4 + +80000fd4 : +Zksed_sm4ed_cg_cp_rd_b24: + sm4ed x24, x10, x22, 2 # perform operation +80000fd4: b1650c33 sm4ed x24,x10,x22,0x2 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zksed_sm4ed_cg_cp_rd_b24, Zksed_sm4ed_cg_cp_rd_b24_str) +80000fd8: 000e2203 lw x4,0(x28) +80000fdc: 01820863 beq x4,x24,80000fec +80000fe0: 1e0072ef jal x5,800081c0 +80000fe4: 80000fd4 .word 0x80000fd4 +80000fe8: 8000ea09 .word 0x8000ea09 +80000fec: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x96e77e4a +80000ff0: 000a2983 lw x19,0(x20) +80000ff4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x69d2797c +80000ff8: 000a2683 lw x13,0(x20) +80000ffc: 004a0a13 addi x20,x20,4 + +80001000 : +Zksed_sm4ed_cg_cp_rd_b25: + sm4ed x25, x19, x13, 0 # perform operation +80001000: 30d98cb3 sm4ed x25,x19,x13,0x0 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zksed_sm4ed_cg_cp_rd_b25, Zksed_sm4ed_cg_cp_rd_b25_str) +80001004: 000e2203 lw x4,0(x28) +80001008: 01920863 beq x4,x25,80001018 +8000100c: 1b4072ef jal x5,800081c0 +80001010: 80001000 .word 0x80001000 +80001014: 8000ea3d .word 0x8000ea3d +80001018: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x274e45b2 +8000101c: 000a2903 lw x18,0(x20) +80001020: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x674c5395 +80001024: 000a2003 lw x0,0(x20) +80001028: 004a0a13 addi x20,x20,4 + +8000102c : +Zksed_sm4ed_cg_cp_rd_b26: + sm4ed x26, x18, x0, 1 # perform operation +8000102c: 70090d33 sm4ed x26,x18,x0,0x1 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zksed_sm4ed_cg_cp_rd_b26, Zksed_sm4ed_cg_cp_rd_b26_str) +80001030: 000e2203 lw x4,0(x28) +80001034: 01a20863 beq x4,x26,80001044 +80001038: 188072ef jal x5,800081c0 +8000103c: 8000102c .word 0x8000102c +80001040: 8000ea71 .word 0x8000ea71 +80001044: 004e0e13 addi x28,x28,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x57bf6286 +80001048: 000a2b03 lw x22,0(x20) +8000104c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x892992b5 +80001050: 000a2083 lw x1,0(x20) +80001054: 004a0a13 addi x20,x20,4 + +80001058 : +Zksed_sm4ed_cg_cp_rd_b27: + sm4ed x27, x22, x1, 3 # perform operation +80001058: f01b0db3 sm4ed x27,x22,x1,0x3 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zksed_sm4ed_cg_cp_rd_b27, Zksed_sm4ed_cg_cp_rd_b27_str) +8000105c: 000e2203 lw x4,0(x28) +80001060: 01b20863 beq x4,x27,80001070 +80001064: 15c072ef jal x5,800081c0 +80001068: 80001058 .word 0x80001058 +8000106c: 8000eaa5 .word 0x8000eaa5 +80001070: 004e0e13 addi x28,x28,4 + + mv x31, x28 # switch signature pointer register to avoid conflict with test +80001074: 000e0f93 addi x31,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x7ddba9fa +80001078: 000a2803 lw x16,0(x20) +8000107c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x3b1d7883 +80001080: 000a2c03 lw x24,0(x20) +80001084: 004a0a13 addi x20,x20,4 + +80001088 : +Zksed_sm4ed_cg_cp_rd_b28: + sm4ed x28, x16, x24, 3 # perform operation +80001088: f1880e33 sm4ed x28,x16,x24,0x3 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zksed_sm4ed_cg_cp_rd_b28, Zksed_sm4ed_cg_cp_rd_b28_str) +8000108c: 000fa203 lw x4,0(x31) +80001090: 01c20863 beq x4,x28,800010a0 +80001094: 12c072ef jal x5,800081c0 +80001098: 80001088 .word 0x80001088 +8000109c: 8000ead9 .word 0x8000ead9 +800010a0: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x7c930e4f +800010a4: 000a2c83 lw x25,0(x20) +800010a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xbef27dd9 +800010ac: 000a2303 lw x6,0(x20) +800010b0: 004a0a13 addi x20,x20,4 + +800010b4 : +Zksed_sm4ed_cg_cp_rd_b29: + sm4ed x29, x25, x6, 0 # perform operation +800010b4: 306c8eb3 sm4ed x29,x25,x6,0x0 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zksed_sm4ed_cg_cp_rd_b29, Zksed_sm4ed_cg_cp_rd_b29_str) +800010b8: 000fa203 lw x4,0(x31) +800010bc: 01d20863 beq x4,x29,800010cc +800010c0: 100072ef jal x5,800081c0 +800010c4: 800010b4 .word 0x800010b4 +800010c8: 8000eb0d .word 0x8000eb0d +800010cc: 004f8f93 addi x31,x31,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x28f05a97 +800010d0: 000a2d03 lw x26,0(x20) +800010d4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xb7d66377 +800010d8: 000a2b83 lw x23,0(x20) +800010dc: 004a0a13 addi x20,x20,4 + +800010e0 : +Zksed_sm4ed_cg_cp_rd_b30: + sm4ed x30, x26, x23, 1 # perform operation +800010e0: 717d0f33 sm4ed x30,x26,x23,0x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zksed_sm4ed_cg_cp_rd_b30, Zksed_sm4ed_cg_cp_rd_b30_str) +800010e4: 000fa203 lw x4,0(x31) +800010e8: 01e20863 beq x4,x30,800010f8 +800010ec: 0d4072ef jal x5,800081c0 +800010f0: 800010e0 .word 0x800010e0 +800010f4: 8000eb41 .word 0x8000eb41 +800010f8: 004f8f93 addi x31,x31,4 + + mv x21, x31 # switch signature pointer register to avoid conflict with test +800010fc: 000f8a93 addi x21,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xfad8502f +80001100: 000a2883 lw x17,0(x20) +80001104: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x29254064 +80001108: 000a2c83 lw x25,0(x20) +8000110c: 004a0a13 addi x20,x20,4 + +80001110 : +Zksed_sm4ed_cg_cp_rd_b31: + sm4ed x31, x17, x25, 2 # perform operation +80001110: b1988fb3 sm4ed x31,x17,x25,0x2 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cp_rd_b31, Zksed_sm4ed_cg_cp_rd_b31_str) +80001114: 000aa203 lw x4,0(x21) +80001118: 01f20863 beq x4,x31,80001128 +8000111c: 0a4072ef jal x5,800081c0 +80001120: 80001110 .word 0x80001110 +80001124: 8000eb75 .word 0x8000eb75 +80001128: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000000 +8000112c: 000a2503 lw x10,0(x20) +80001130: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x1259d59c +80001134: 000a2c03 lw x24,0(x20) +80001138: 004a0a13 addi x20,x20,4 + +8000113c : +Zksed_sm4ed_cg_cp_rs1_edges_0x0: + sm4ed x16, x10, x24, 0 # perform operation +8000113c: 31850833 sm4ed x16,x10,x24,0x0 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cp_rs1_edges_0x0, Zksed_sm4ed_cg_cp_rs1_edges_0x0_str) +80001140: 000aa203 lw x4,0(x21) +80001144: 01020863 beq x4,x16,80001154 +80001148: 078072ef jal x5,800081c0 +8000114c: 8000113c .word 0x8000113c +80001150: 8000eba9 .word 0x8000eba9 +80001154: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x00000001 +80001158: 000a2b83 lw x23,0(x20) +8000115c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x8784d8ec +80001160: 000a2c83 lw x25,0(x20) +80001164: 004a0a13 addi x20,x20,4 + +80001168 : +Zksed_sm4ed_cg_cp_rs1_edges_0x1: + sm4ed x6, x23, x25, 2 # perform operation +80001168: b19b8333 sm4ed x6,x23,x25,0x2 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cp_rs1_edges_0x1, Zksed_sm4ed_cg_cp_rs1_edges_0x1_str) +8000116c: 000aa203 lw x4,0(x21) +80001170: 00620863 beq x4,x6,80001180 +80001174: 04c072ef jal x5,800081c0 +80001178: 80001168 .word 0x80001168 +8000117c: 8000ebe4 .word 0x8000ebe4 +80001180: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x00000002 +80001184: 000a2d83 lw x27,0(x20) +80001188: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x24a65025 +8000118c: 000a2603 lw x12,0(x20) +80001190: 004a0a13 addi x20,x20,4 + +80001194 : +Zksed_sm4ed_cg_cp_rs1_edges_0x2: + sm4ed x17, x27, x12, 0 # perform operation +80001194: 30cd88b3 sm4ed x17,x27,x12,0x0 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zksed_sm4ed_cg_cp_rs1_edges_0x2, Zksed_sm4ed_cg_cp_rs1_edges_0x2_str) +80001198: 000aa203 lw x4,0(x21) +8000119c: 01120863 beq x4,x17,800011ac +800011a0: 020072ef jal x5,800081c0 +800011a4: 80001194 .word 0x80001194 +800011a8: 8000ec1f .word 0x8000ec1f +800011ac: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x80000000 +800011b0: 000a2b83 lw x23,0(x20) +800011b4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x79ac13c6 +800011b8: 000a2703 lw x14,0(x20) +800011bc: 004a0a13 addi x20,x20,4 + +800011c0 : +Zksed_sm4ed_cg_cp_rs1_edges_0x80000000: + sm4ed x11, x23, x14, 0 # perform operation +800011c0: 30eb85b3 sm4ed x11,x23,x14,0x0 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cp_rs1_edges_0x80000000, Zksed_sm4ed_cg_cp_rs1_edges_0x80000000_str) +800011c4: 000aa203 lw x4,0(x21) +800011c8: 00b20863 beq x4,x11,800011d8 +800011cc: 7f5062ef jal x5,800081c0 +800011d0: 800011c0 .word 0x800011c0 +800011d4: 8000ec5a .word 0x8000ec5a +800011d8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x80000001 +800011dc: 000a2e83 lw x29,0(x20) +800011e0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xd2f1ada0 +800011e4: 000a2883 lw x17,0(x20) +800011e8: 004a0a13 addi x20,x20,4 + +800011ec : +Zksed_sm4ed_cg_cp_rs1_edges_0x80000001: + sm4ed x25, x29, x17, 0 # perform operation +800011ec: 311e8cb3 sm4ed x25,x29,x17,0x0 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_edges_0x80000001, Zksed_sm4ed_cg_cp_rs1_edges_0x80000001_str) +800011f0: 000aa203 lw x4,0(x21) +800011f4: 01920863 beq x4,x25,80001204 +800011f8: 7c9062ef jal x5,800081c0 +800011fc: 800011ec .word 0x800011ec +80001200: 8000ec9d .word 0x8000ec9d +80001204: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x7fffffff +80001208: 000a2d03 lw x26,0(x20) +8000120c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x4513fdb6 +80001210: 000a2c83 lw x25,0(x20) +80001214: 004a0a13 addi x20,x20,4 + +80001218 : +Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffff: + sm4ed x12, x26, x25, 3 # perform operation +80001218: f19d0633 sm4ed x12,x26,x25,0x3 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffff, Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffff_str) +8000121c: 000aa203 lw x4,0(x21) +80001220: 00c20863 beq x4,x12,80001230 +80001224: 79d062ef jal x5,800081c0 +80001228: 80001218 .word 0x80001218 +8000122c: 8000ece0 .word 0x8000ece0 +80001230: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x7ffffffe +80001234: 000a2383 lw x7,0(x20) +80001238: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x1ee0dbfa +8000123c: 000a2083 lw x1,0(x20) +80001240: 004a0a13 addi x20,x20,4 + +80001244 : +Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffe: + sm4ed x23, x7, x1, 0 # perform operation +80001244: 30138bb3 sm4ed x23,x7,x1,0x0 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffe, Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffe_str) +80001248: 000aa203 lw x4,0(x21) +8000124c: 01720863 beq x4,x23,8000125c +80001250: 771062ef jal x5,800081c0 +80001254: 80001244 .word 0x80001244 +80001258: 8000ed23 .word 0x8000ed23 +8000125c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xffffffff +80001260: 000a2103 lw x2,0(x20) +80001264: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xba8d2d77 +80001268: 000a2e03 lw x28,0(x20) +8000126c: 004a0a13 addi x20,x20,4 + +80001270 : +Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff: + sm4ed x16, x2, x28, 2 # perform operation +80001270: b1c10833 sm4ed x16,x2,x28,0x2 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff_str) +80001274: 000aa203 lw x4,0(x21) +80001278: 01020863 beq x4,x16,80001288 +8000127c: 745062ef jal x5,800081c0 +80001280: 80001270 .word 0x80001270 +80001284: 8000ed66 .word 0x8000ed66 +80001288: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xfffffffe +8000128c: 000a2b03 lw x22,0(x20) +80001290: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x3213d847 +80001294: 000a2083 lw x1,0(x20) +80001298: 004a0a13 addi x20,x20,4 + +8000129c : +Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe: + sm4ed x23, x22, x1, 2 # perform operation +8000129c: b01b0bb3 sm4ed x23,x22,x1,0x2 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe_str) +800012a0: 000aa203 lw x4,0(x21) +800012a4: 01720863 beq x4,x23,800012b4 +800012a8: 719062ef jal x5,800081c0 +800012ac: 8000129c .word 0x8000129c +800012b0: 8000eda9 .word 0x8000eda9 +800012b4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x5bbc8872 +800012b8: 000a2603 lw x12,0(x20) +800012bc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xa8415df5 +800012c0: 000a2783 lw x15,0(x20) +800012c4: 004a0a13 addi x20,x20,4 + +800012c8 : +Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc8872: + sm4ed x24, x12, x15, 3 # perform operation +800012c8: f0f60c33 sm4ed x24,x12,x15,0x3 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc8872, Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc8872_str) +800012cc: 000aa203 lw x4,0(x21) +800012d0: 01820863 beq x4,x24,800012e0 +800012d4: 6ed062ef jal x5,800081c0 +800012d8: 800012c8 .word 0x800012c8 +800012dc: 8000edec .word 0x8000edec +800012e0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xaaaaaaaa +800012e4: 000a2f03 lw x30,0(x20) +800012e8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xbf81f442 +800012ec: 000a2983 lw x19,0(x20) +800012f0: 004a0a13 addi x20,x20,4 + +800012f4 : +Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaa: + sm4ed x26, x30, x19, 0 # perform operation +800012f4: 313f0d33 sm4ed x26,x30,x19,0x0 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaa, Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaa_str) +800012f8: 000aa203 lw x4,0(x21) +800012fc: 01a20863 beq x4,x26,8000130c +80001300: 6c1062ef jal x5,800081c0 +80001304: 800012f4 .word 0x800012f4 +80001308: 8000ee2f .word 0x8000ee2f +8000130c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x55555555 +80001310: 000a2183 lw x3,0(x20) +80001314: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x9148a9c3 +80001318: 000a2503 lw x10,0(x20) +8000131c: 004a0a13 addi x20,x20,4 + +80001320 : +Zksed_sm4ed_cg_cp_rs1_edges_0x55555555: + sm4ed x14, x3, x10, 3 # perform operation +80001320: f0a18733 sm4ed x14,x3,x10,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cp_rs1_edges_0x55555555, Zksed_sm4ed_cg_cp_rs1_edges_0x55555555_str) +80001324: 000aa203 lw x4,0(x21) +80001328: 00e20863 beq x4,x14,80001338 +8000132c: 695062ef jal x5,800081c0 +80001330: 80001320 .word 0x80001320 +80001334: 8000ee72 .word 0x8000ee72 +80001338: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0xf6f81831 +8000133c: 000a2c03 lw x24,0(x20) +80001340: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x00000000 +80001344: 000a2e83 lw x29,0(x20) +80001348: 004a0a13 addi x20,x20,4 + +8000134c : +Zksed_sm4ed_cg_cp_rs2_edges_0x0: + sm4ed x18, x24, x29, 3 # perform operation +8000134c: f1dc0933 sm4ed x18,x24,x29,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cp_rs2_edges_0x0, Zksed_sm4ed_cg_cp_rs2_edges_0x0_str) +80001350: 000aa203 lw x4,0(x21) +80001354: 01220863 beq x4,x18,80001364 +80001358: 669062ef jal x5,800081c0 +8000135c: 8000134c .word 0x8000134c +80001360: 8000eeb5 .word 0x8000eeb5 +80001364: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x1aa7f1ce +80001368: 000a2e83 lw x29,0(x20) +8000136c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x00000001 +80001370: 000a2783 lw x15,0(x20) +80001374: 004a0a13 addi x20,x20,4 + +80001378 : +Zksed_sm4ed_cg_cp_rs2_edges_0x1: + sm4ed x31, x29, x15, 1 # perform operation +80001378: 70fe8fb3 sm4ed x31,x29,x15,0x1 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cp_rs2_edges_0x1, Zksed_sm4ed_cg_cp_rs2_edges_0x1_str) +8000137c: 000aa203 lw x4,0(x21) +80001380: 01f20863 beq x4,x31,80001390 +80001384: 63d062ef jal x5,800081c0 +80001388: 80001378 .word 0x80001378 +8000138c: 8000eef1 .word 0x8000eef1 +80001390: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x95b42937 +80001394: 000a2803 lw x16,0(x20) +80001398: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x00000002 +8000139c: 000a2483 lw x9,0(x20) +800013a0: 004a0a13 addi x20,x20,4 + +800013a4 : +Zksed_sm4ed_cg_cp_rs2_edges_0x2: + sm4ed x29, x16, x9, 0 # perform operation +800013a4: 30980eb3 sm4ed x29,x16,x9,0x0 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cp_rs2_edges_0x2, Zksed_sm4ed_cg_cp_rs2_edges_0x2_str) +800013a8: 000aa203 lw x4,0(x21) +800013ac: 01d20863 beq x4,x29,800013bc +800013b0: 611062ef jal x5,800081c0 +800013b4: 800013a4 .word 0x800013a4 +800013b8: 8000ef2d .word 0x8000ef2d +800013bc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0xc313be76 +800013c0: 000a2d83 lw x27,0(x20) +800013c4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x80000000 +800013c8: 000a2883 lw x17,0(x20) +800013cc: 004a0a13 addi x20,x20,4 + +800013d0 : +Zksed_sm4ed_cg_cp_rs2_edges_0x80000000: + sm4ed x14, x27, x17, 3 # perform operation +800013d0: f11d8733 sm4ed x14,x27,x17,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cp_rs2_edges_0x80000000, Zksed_sm4ed_cg_cp_rs2_edges_0x80000000_str) +800013d4: 000aa203 lw x4,0(x21) +800013d8: 00e20863 beq x4,x14,800013e8 +800013dc: 5e5062ef jal x5,800081c0 +800013e0: 800013d0 .word 0x800013d0 +800013e4: 8000ef69 .word 0x8000ef69 +800013e8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x461b77fc +800013ec: 000a2983 lw x19,0(x20) +800013f0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x80000001 +800013f4: 000a2c83 lw x25,0(x20) +800013f8: 004a0a13 addi x20,x20,4 + +800013fc : +Zksed_sm4ed_cg_cp_rs2_edges_0x80000001: + sm4ed x17, x19, x25, 3 # perform operation +800013fc: f19988b3 sm4ed x17,x19,x25,0x3 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zksed_sm4ed_cg_cp_rs2_edges_0x80000001, Zksed_sm4ed_cg_cp_rs2_edges_0x80000001_str) +80001400: 000aa203 lw x4,0(x21) +80001404: 01120863 beq x4,x17,80001414 +80001408: 5b9062ef jal x5,800081c0 +8000140c: 800013fc .word 0x800013fc +80001410: 8000efac .word 0x8000efac +80001414: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x7af1065b +80001418: 000a2583 lw x11,0(x20) +8000141c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x7fffffff +80001420: 000a2d03 lw x26,0(x20) +80001424: 004a0a13 addi x20,x20,4 + +80001428 : +Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffff: + sm4ed x15, x11, x26, 2 # perform operation +80001428: b1a587b3 sm4ed x15,x11,x26,0x2 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffff, Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffff_str) +8000142c: 000aa203 lw x4,0(x21) +80001430: 00f20863 beq x4,x15,80001440 +80001434: 58d062ef jal x5,800081c0 +80001438: 80001428 .word 0x80001428 +8000143c: 8000efef .word 0x8000efef +80001440: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x77627690 +80001444: 000a2503 lw x10,0(x20) +80001448: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x7ffffffe +8000144c: 000a2f83 lw x31,0(x20) +80001450: 004a0a13 addi x20,x20,4 + +80001454 : +Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffe: + sm4ed x29, x10, x31, 3 # perform operation +80001454: f1f50eb3 sm4ed x29,x10,x31,0x3 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffe, Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffe_str) +80001458: 000aa203 lw x4,0(x21) +8000145c: 01d20863 beq x4,x29,8000146c +80001460: 561062ef jal x5,800081c0 +80001464: 80001454 .word 0x80001454 +80001468: 8000f032 .word 0x8000f032 +8000146c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x9612619b +80001470: 000a2b83 lw x23,0(x20) +80001474: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xffffffff +80001478: 000a2083 lw x1,0(x20) +8000147c: 004a0a13 addi x20,x20,4 + +80001480 : +Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff: + sm4ed x7, x23, x1, 1 # perform operation +80001480: 701b83b3 sm4ed x7,x23,x1,0x1 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff_str) +80001484: 000aa203 lw x4,0(x21) +80001488: 00720863 beq x4,x7,80001498 +8000148c: 535062ef jal x5,800081c0 +80001490: 80001480 .word 0x80001480 +80001494: 8000f075 .word 0x8000f075 +80001498: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xd5dc0d01 +8000149c: 000a2c83 lw x25,0(x20) +800014a0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xfffffffe +800014a4: 000a2583 lw x11,0(x20) +800014a8: 004a0a13 addi x20,x20,4 + +800014ac : +Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe: + sm4ed x16, x25, x11, 3 # perform operation +800014ac: f0bc8833 sm4ed x16,x25,x11,0x3 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe_str) +800014b0: 000aa203 lw x4,0(x21) +800014b4: 01020863 beq x4,x16,800014c4 +800014b8: 509062ef jal x5,800081c0 +800014bc: 800014ac .word 0x800014ac +800014c0: 8000f0b8 .word 0x8000f0b8 +800014c4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xb25c64aa +800014c8: 000a2583 lw x11,0(x20) +800014cc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x5bbc8872 +800014d0: 000a2d03 lw x26,0(x20) +800014d4: 004a0a13 addi x20,x20,4 + +800014d8 : +Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc8872: + sm4ed x19, x11, x26, 0 # perform operation +800014d8: 31a589b3 sm4ed x19,x11,x26,0x0 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc8872, Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc8872_str) +800014dc: 000aa203 lw x4,0(x21) +800014e0: 01320863 beq x4,x19,800014f0 +800014e4: 4dd062ef jal x5,800081c0 +800014e8: 800014d8 .word 0x800014d8 +800014ec: 8000f0fb .word 0x8000f0fb +800014f0: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x11b18ed6 +800014f4: 000a2903 lw x18,0(x20) +800014f8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xaaaaaaaa +800014fc: 000a2183 lw x3,0(x20) +80001500: 004a0a13 addi x20,x20,4 + +80001504 : +Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaa: + sm4ed x12, x18, x3, 3 # perform operation +80001504: f0390633 sm4ed x12,x18,x3,0x3 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaa, Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001508: 000aa203 lw x4,0(x21) +8000150c: 00c20863 beq x4,x12,8000151c +80001510: 4b1062ef jal x5,800081c0 +80001514: 80001504 .word 0x80001504 +80001518: 8000f13e .word 0x8000f13e +8000151c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x867b41f0 +80001520: 000a2683 lw x13,0(x20) +80001524: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x55555555 +80001528: 000a2b03 lw x22,0(x20) +8000152c: 004a0a13 addi x20,x20,4 + +80001530 : +Zksed_sm4ed_cg_cp_rs2_edges_0x55555555: + sm4ed x2, x13, x22, 0 # perform operation +80001530: 31668133 sm4ed x2,x13,x22,0x0 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cp_rs2_edges_0x55555555, Zksed_sm4ed_cg_cp_rs2_edges_0x55555555_str) +80001534: 000aa203 lw x4,0(x21) +80001538: 00220863 beq x4,x2,80001548 +8000153c: 485062ef jal x5,800081c0 +80001540: 80001530 .word 0x80001530 +80001544: 8000f181 .word 0x8000f181 +80001548: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000000 +8000154c: 000a2d03 lw x26,0(x20) +80001550: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x00000000 +80001554: 000a2083 lw x1,0(x20) +80001558: 004a0a13 addi x20,x20,4 + +8000155c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sm4ed x10, x26, x1, 3 # perform operation +8000155c: f01d0533 sm4ed x10,x26,x1,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +80001560: 000aa203 lw x4,0(x21) +80001564: 00a20863 beq x4,x10,80001574 +80001568: 459062ef jal x5,800081c0 +8000156c: 8000155c .word 0x8000155c +80001570: 8000f1c4 .word 0x8000f1c4 +80001574: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x00000000 +80001578: 000a2e03 lw x28,0(x20) +8000157c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000001 +80001580: 000a2883 lw x17,0(x20) +80001584: 004a0a13 addi x20,x20,4 + +80001588 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sm4ed x15, x28, x17, 1 # perform operation +80001588: 711e07b3 sm4ed x15,x28,x17,0x1 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +8000158c: 000aa203 lw x4,0(x21) +80001590: 00f20863 beq x4,x15,800015a0 +80001594: 42d062ef jal x5,800081c0 +80001598: 80001588 .word 0x80001588 +8000159c: 8000f217 .word 0x8000f217 +800015a0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x00000000 +800015a4: 000a2303 lw x6,0(x20) +800015a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x00000002 +800015ac: 000a2383 lw x7,0(x20) +800015b0: 004a0a13 addi x20,x20,4 + +800015b4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sm4ed x16, x6, x7, 2 # perform operation +800015b4: b0730833 sm4ed x16,x6,x7,0x2 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015b8: 000aa203 lw x4,0(x21) +800015bc: 01020863 beq x4,x16,800015cc +800015c0: 401062ef jal x5,800081c0 +800015c4: 800015b4 .word 0x800015b4 +800015c8: 8000f26a .word 0x8000f26a +800015cc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x00000000 +800015d0: 000a2183 lw x3,0(x20) +800015d4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x80000000 +800015d8: 000a2483 lw x9,0(x20) +800015dc: 004a0a13 addi x20,x20,4 + +800015e0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sm4ed x31, x3, x9, 0 # perform operation +800015e0: 30918fb3 sm4ed x31,x3,x9,0x0 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015e4: 000aa203 lw x4,0(x21) +800015e8: 01f20863 beq x4,x31,800015f8 +800015ec: 3d5062ef jal x5,800081c0 +800015f0: 800015e0 .word 0x800015e0 +800015f4: 8000f2bd .word 0x8000f2bd +800015f8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x00000000 +800015fc: 000a2383 lw x7,0(x20) +80001600: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x80000001 +80001604: 000a2403 lw x8,0(x20) +80001608: 004a0a13 addi x20,x20,4 + +8000160c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sm4ed x1, x7, x8, 1 # perform operation +8000160c: 708380b3 sm4ed x1,x7,x8,0x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +80001610: 000aa203 lw x4,0(x21) +80001614: 00120863 beq x4,x1,80001624 +80001618: 3a9062ef jal x5,800081c0 +8000161c: 8000160c .word 0x8000160c +80001620: 8000f317 .word 0x8000f317 +80001624: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x00000000 +80001628: 000a2e83 lw x29,0(x20) +8000162c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x7fffffff +80001630: 000a2303 lw x6,0(x20) +80001634: 004a0a13 addi x20,x20,4 + +80001638 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sm4ed x22, x29, x6, 2 # perform operation +80001638: b06e8b33 sm4ed x22,x29,x6,0x2 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +8000163c: 000aa203 lw x4,0(x21) +80001640: 01620863 beq x4,x22,80001650 +80001644: 37d062ef jal x5,800081c0 +80001648: 80001638 .word 0x80001638 +8000164c: 8000f371 .word 0x8000f371 +80001650: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000000 +80001654: 000a2c03 lw x24,0(x20) +80001658: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x7ffffffe +8000165c: 000a2803 lw x16,0(x20) +80001660: 004a0a13 addi x20,x20,4 + +80001664 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sm4ed x29, x24, x16, 2 # perform operation +80001664: b10c0eb3 sm4ed x29,x24,x16,0x2 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001668: 000aa203 lw x4,0(x21) +8000166c: 01d20863 beq x4,x29,8000167c +80001670: 351062ef jal x5,800081c0 +80001674: 80001664 .word 0x80001664 +80001678: 8000f3cb .word 0x8000f3cb +8000167c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000000 +80001680: 000a2503 lw x10,0(x20) +80001684: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xffffffff +80001688: 000a2b83 lw x23,0(x20) +8000168c: 004a0a13 addi x20,x20,4 + +80001690 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sm4ed x25, x10, x23, 0 # perform operation +80001690: 31750cb3 sm4ed x25,x10,x23,0x0 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +80001694: 000aa203 lw x4,0(x21) +80001698: 01920863 beq x4,x25,800016a8 +8000169c: 325062ef jal x5,800081c0 +800016a0: 80001690 .word 0x80001690 +800016a4: 8000f425 .word 0x8000f425 +800016a8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x00000000 +800016ac: 000a2403 lw x8,0(x20) +800016b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xfffffffe +800016b4: 000a2c03 lw x24,0(x20) +800016b8: 004a0a13 addi x20,x20,4 + +800016bc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sm4ed x26, x8, x24, 0 # perform operation +800016bc: 31840d33 sm4ed x26,x8,x24,0x0 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016c0: 000aa203 lw x4,0(x21) +800016c4: 01a20863 beq x4,x26,800016d4 +800016c8: 2f9062ef jal x5,800081c0 +800016cc: 800016bc .word 0x800016bc +800016d0: 8000f47f .word 0x8000f47f +800016d4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x00000000 +800016d8: 000a2e03 lw x28,0(x20) +800016dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x5bbc8872 +800016e0: 000a2583 lw x11,0(x20) +800016e4: 004a0a13 addi x20,x20,4 + +800016e8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sm4ed x3, x28, x11, 2 # perform operation +800016e8: b0be01b3 sm4ed x3,x28,x11,0x2 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016ec: 000aa203 lw x4,0(x21) +800016f0: 00320863 beq x4,x3,80001700 +800016f4: 2cd062ef jal x5,800081c0 +800016f8: 800016e8 .word 0x800016e8 +800016fc: 8000f4d9 .word 0x8000f4d9 +80001700: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x00000000 +80001704: 000a2e83 lw x29,0(x20) +80001708: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xaaaaaaaa +8000170c: 000a2783 lw x15,0(x20) +80001710: 004a0a13 addi x20,x20,4 + +80001714 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sm4ed x6, x29, x15, 2 # perform operation +80001714: b0fe8333 sm4ed x6,x29,x15,0x2 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001718: 000aa203 lw x4,0(x21) +8000171c: 00620863 beq x4,x6,8000172c +80001720: 2a1062ef jal x5,800081c0 +80001724: 80001714 .word 0x80001714 +80001728: 8000f533 .word 0x8000f533 +8000172c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x00000000 +80001730: 000a2d83 lw x27,0(x20) +80001734: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x55555555 +80001738: 000a2083 lw x1,0(x20) +8000173c: 004a0a13 addi x20,x20,4 + +80001740 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sm4ed x17, x27, x1, 2 # perform operation +80001740: b01d88b3 sm4ed x17,x27,x1,0x2 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001744: 000aa203 lw x4,0(x21) +80001748: 01120863 beq x4,x17,80001758 +8000174c: 275062ef jal x5,800081c0 +80001750: 80001740 .word 0x80001740 +80001754: 8000f58d .word 0x8000f58d +80001758: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x00000001 +8000175c: 000a2e03 lw x28,0(x20) +80001760: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x00000000 +80001764: 000a2803 lw x16,0(x20) +80001768: 004a0a13 addi x20,x20,4 + +8000176c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sm4ed x6, x28, x16, 3 # perform operation +8000176c: f10e0333 sm4ed x6,x28,x16,0x3 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +80001770: 000aa203 lw x4,0(x21) +80001774: 00620863 beq x4,x6,80001784 +80001778: 249062ef jal x5,800081c0 +8000177c: 8000176c .word 0x8000176c +80001780: 8000f5e7 .word 0x8000f5e7 +80001784: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x00000001 +80001788: 000a2b83 lw x23,0(x20) +8000178c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x00000001 +80001790: 000a2b03 lw x22,0(x20) +80001794: 004a0a13 addi x20,x20,4 + +80001798 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sm4ed x14, x23, x22, 2 # perform operation +80001798: b16b8733 sm4ed x14,x23,x22,0x2 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +8000179c: 000aa203 lw x4,0(x21) +800017a0: 00e20863 beq x4,x14,800017b0 +800017a4: 21d062ef jal x5,800081c0 +800017a8: 80001798 .word 0x80001798 +800017ac: 8000f63a .word 0x8000f63a +800017b0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x00000001 +800017b4: 000a2603 lw x12,0(x20) +800017b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000002 +800017bc: 000a2d83 lw x27,0(x20) +800017c0: 004a0a13 addi x20,x20,4 + +800017c4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sm4ed x28, x12, x27, 2 # perform operation +800017c4: b1b60e33 sm4ed x28,x12,x27,0x2 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017c8: 000aa203 lw x4,0(x21) +800017cc: 01c20863 beq x4,x28,800017dc +800017d0: 1f1062ef jal x5,800081c0 +800017d4: 800017c4 .word 0x800017c4 +800017d8: 8000f68d .word 0x8000f68d +800017dc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x00000001 +800017e0: 000a2e03 lw x28,0(x20) +800017e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x80000000 +800017e8: 000a2983 lw x19,0(x20) +800017ec: 004a0a13 addi x20,x20,4 + +800017f0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sm4ed x22, x28, x19, 1 # perform operation +800017f0: 713e0b33 sm4ed x22,x28,x19,0x1 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +800017f4: 000aa203 lw x4,0(x21) +800017f8: 01620863 beq x4,x22,80001808 +800017fc: 1c5062ef jal x5,800081c0 +80001800: 800017f0 .word 0x800017f0 +80001804: 8000f6e0 .word 0x8000f6e0 +80001808: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x00000001 +8000180c: 000a2b83 lw x23,0(x20) +80001810: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x80000001 +80001814: 000a2483 lw x9,0(x20) +80001818: 004a0a13 addi x20,x20,4 + +8000181c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sm4ed x1, x23, x9, 1 # perform operation +8000181c: 709b80b3 sm4ed x1,x23,x9,0x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +80001820: 000aa203 lw x4,0(x21) +80001824: 00120863 beq x4,x1,80001834 +80001828: 199062ef jal x5,800081c0 +8000182c: 8000181c .word 0x8000181c +80001830: 8000f73a .word 0x8000f73a +80001834: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000001 +80001838: 000a2c03 lw x24,0(x20) +8000183c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x7fffffff +80001840: 000a2403 lw x8,0(x20) +80001844: 004a0a13 addi x20,x20,4 + +80001848 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sm4ed x6, x24, x8, 3 # perform operation +80001848: f08c0333 sm4ed x6,x24,x8,0x3 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +8000184c: 000aa203 lw x4,0(x21) +80001850: 00620863 beq x4,x6,80001860 +80001854: 16d062ef jal x5,800081c0 +80001858: 80001848 .word 0x80001848 +8000185c: 8000f794 .word 0x8000f794 +80001860: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x00000001 +80001864: 000a2703 lw x14,0(x20) +80001868: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x7ffffffe +8000186c: 000a2183 lw x3,0(x20) +80001870: 004a0a13 addi x20,x20,4 + +80001874 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sm4ed x9, x14, x3, 2 # perform operation +80001874: b03704b3 sm4ed x9,x14,x3,0x2 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001878: 000aa203 lw x4,0(x21) +8000187c: 00920863 beq x4,x9,8000188c +80001880: 141062ef jal x5,800081c0 +80001884: 80001874 .word 0x80001874 +80001888: 8000f7ee .word 0x8000f7ee +8000188c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x00000001 +80001890: 000a2c83 lw x25,0(x20) +80001894: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xffffffff +80001898: 000a2483 lw x9,0(x20) +8000189c: 004a0a13 addi x20,x20,4 + +800018a0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sm4ed x16, x25, x9, 0 # perform operation +800018a0: 309c8833 sm4ed x16,x25,x9,0x0 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018a4: 000aa203 lw x4,0(x21) +800018a8: 01020863 beq x4,x16,800018b8 +800018ac: 115062ef jal x5,800081c0 +800018b0: 800018a0 .word 0x800018a0 +800018b4: 8000f848 .word 0x8000f848 +800018b8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x00000001 +800018bc: 000a2883 lw x17,0(x20) +800018c0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xfffffffe +800018c4: 000a2e03 lw x28,0(x20) +800018c8: 004a0a13 addi x20,x20,4 + +800018cc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sm4ed x9, x17, x28, 3 # perform operation +800018cc: f1c884b3 sm4ed x9,x17,x28,0x3 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018d0: 000aa203 lw x4,0(x21) +800018d4: 00920863 beq x4,x9,800018e4 +800018d8: 0e9062ef jal x5,800081c0 +800018dc: 800018cc .word 0x800018cc +800018e0: 8000f8a2 .word 0x8000f8a2 +800018e4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000001 +800018e8: 000a2503 lw x10,0(x20) +800018ec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x5bbc8872 +800018f0: 000a2f03 lw x30,0(x20) +800018f4: 004a0a13 addi x20,x20,4 + +800018f8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sm4ed x18, x10, x30, 3 # perform operation +800018f8: f1e50933 sm4ed x18,x10,x30,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +800018fc: 000aa203 lw x4,0(x21) +80001900: 01220863 beq x4,x18,80001910 +80001904: 0bd062ef jal x5,800081c0 +80001908: 800018f8 .word 0x800018f8 +8000190c: 8000f8fc .word 0x8000f8fc +80001910: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x00000001 +80001914: 000a2b03 lw x22,0(x20) +80001918: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xaaaaaaaa +8000191c: 000a2883 lw x17,0(x20) +80001920: 004a0a13 addi x20,x20,4 + +80001924 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sm4ed x1, x22, x17, 1 # perform operation +80001924: 711b00b3 sm4ed x1,x22,x17,0x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001928: 000aa203 lw x4,0(x21) +8000192c: 00120863 beq x4,x1,8000193c +80001930: 091062ef jal x5,800081c0 +80001934: 80001924 .word 0x80001924 +80001938: 8000f956 .word 0x8000f956 +8000193c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x00000001 +80001940: 000a2603 lw x12,0(x20) +80001944: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x55555555 +80001948: 000a2b03 lw x22,0(x20) +8000194c: 004a0a13 addi x20,x20,4 + +80001950 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sm4ed x1, x12, x22, 1 # perform operation +80001950: 716600b3 sm4ed x1,x12,x22,0x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001954: 000aa203 lw x4,0(x21) +80001958: 00120863 beq x4,x1,80001968 +8000195c: 065062ef jal x5,800081c0 +80001960: 80001950 .word 0x80001950 +80001964: 8000f9b0 .word 0x8000f9b0 +80001968: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000002 +8000196c: 000a2d03 lw x26,0(x20) +80001970: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x00000000 +80001974: 000a2583 lw x11,0(x20) +80001978: 004a0a13 addi x20,x20,4 + +8000197c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sm4ed x15, x26, x11, 2 # perform operation +8000197c: b0bd07b3 sm4ed x15,x26,x11,0x2 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +80001980: 000aa203 lw x4,0(x21) +80001984: 00f20863 beq x4,x15,80001994 +80001988: 039062ef jal x5,800081c0 +8000198c: 8000197c .word 0x8000197c +80001990: 8000fa0a .word 0x8000fa0a +80001994: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x00000002 +80001998: 000a2883 lw x17,0(x20) +8000199c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x00000001 +800019a0: 000a2983 lw x19,0(x20) +800019a4: 004a0a13 addi x20,x20,4 + +800019a8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sm4ed x10, x17, x19, 3 # perform operation +800019a8: f1388533 sm4ed x10,x17,x19,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019ac: 000aa203 lw x4,0(x21) +800019b0: 00a20863 beq x4,x10,800019c0 +800019b4: 00d062ef jal x5,800081c0 +800019b8: 800019a8 .word 0x800019a8 +800019bc: 8000fa5d .word 0x8000fa5d +800019c0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000002 +800019c4: 000a2503 lw x10,0(x20) +800019c8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x00000002 +800019cc: 000a2803 lw x16,0(x20) +800019d0: 004a0a13 addi x20,x20,4 + +800019d4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sm4ed x8, x10, x16, 0 # perform operation +800019d4: 31050433 sm4ed x8,x10,x16,0x0 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019d8: 000aa203 lw x4,0(x21) +800019dc: 00820863 beq x4,x8,800019ec +800019e0: 7e0062ef jal x5,800081c0 +800019e4: 800019d4 .word 0x800019d4 +800019e8: 8000fab0 .word 0x8000fab0 +800019ec: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x00000002 +800019f0: 000a2603 lw x12,0(x20) +800019f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x80000000 +800019f8: 000a2f03 lw x30,0(x20) +800019fc: 004a0a13 addi x20,x20,4 + +80001a00 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sm4ed x29, x12, x30, 3 # perform operation +80001a00: f1e60eb3 sm4ed x29,x12,x30,0x3 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a04: 000aa203 lw x4,0(x21) +80001a08: 01d20863 beq x4,x29,80001a18 +80001a0c: 7b4062ef jal x5,800081c0 +80001a10: 80001a00 .word 0x80001a00 +80001a14: 8000fb03 .word 0x8000fb03 +80001a18: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x00000002 +80001a1c: 000a2403 lw x8,0(x20) +80001a20: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x80000001 +80001a24: 000a2083 lw x1,0(x20) +80001a28: 004a0a13 addi x20,x20,4 + +80001a2c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sm4ed x10, x8, x1, 2 # perform operation +80001a2c: b0140533 sm4ed x10,x8,x1,0x2 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a30: 000aa203 lw x4,0(x21) +80001a34: 00a20863 beq x4,x10,80001a44 +80001a38: 788062ef jal x5,800081c0 +80001a3c: 80001a2c .word 0x80001a2c +80001a40: 8000fb5d .word 0x8000fb5d +80001a44: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000002 +80001a48: 000a2503 lw x10,0(x20) +80001a4c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x7fffffff +80001a50: 000a2183 lw x3,0(x20) +80001a54: 004a0a13 addi x20,x20,4 + +80001a58 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sm4ed x15, x10, x3, 3 # perform operation +80001a58: f03507b3 sm4ed x15,x10,x3,0x3 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a5c: 000aa203 lw x4,0(x21) +80001a60: 00f20863 beq x4,x15,80001a70 +80001a64: 75c062ef jal x5,800081c0 +80001a68: 80001a58 .word 0x80001a58 +80001a6c: 8000fbb7 .word 0x8000fbb7 +80001a70: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000002 +80001a74: 000a2c03 lw x24,0(x20) +80001a78: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x7ffffffe +80001a7c: 000a2f03 lw x30,0(x20) +80001a80: 004a0a13 addi x20,x20,4 + +80001a84 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sm4ed x11, x24, x30, 1 # perform operation +80001a84: 71ec05b3 sm4ed x11,x24,x30,0x1 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a88: 000aa203 lw x4,0(x21) +80001a8c: 00b20863 beq x4,x11,80001a9c +80001a90: 730062ef jal x5,800081c0 +80001a94: 80001a84 .word 0x80001a84 +80001a98: 8000fc11 .word 0x8000fc11 +80001a9c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x00000002 +80001aa0: 000a2783 lw x15,0(x20) +80001aa4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xffffffff +80001aa8: 000a2e83 lw x29,0(x20) +80001aac: 004a0a13 addi x20,x20,4 + +80001ab0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sm4ed x30, x15, x29, 1 # perform operation +80001ab0: 71d78f33 sm4ed x30,x15,x29,0x1 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ab4: 000aa203 lw x4,0(x21) +80001ab8: 01e20863 beq x4,x30,80001ac8 +80001abc: 704062ef jal x5,800081c0 +80001ac0: 80001ab0 .word 0x80001ab0 +80001ac4: 8000fc6b .word 0x8000fc6b +80001ac8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x00000002 +80001acc: 000a2303 lw x6,0(x20) +80001ad0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xfffffffe +80001ad4: 000a2803 lw x16,0(x20) +80001ad8: 004a0a13 addi x20,x20,4 + +80001adc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sm4ed x13, x6, x16, 3 # perform operation +80001adc: f10306b3 sm4ed x13,x6,x16,0x3 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001ae0: 000aa203 lw x4,0(x21) +80001ae4: 00d20863 beq x4,x13,80001af4 +80001ae8: 6d8062ef jal x5,800081c0 +80001aec: 80001adc .word 0x80001adc +80001af0: 8000fcc5 .word 0x8000fcc5 +80001af4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x00000002 +80001af8: 000a2883 lw x17,0(x20) +80001afc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x5bbc8872 +80001b00: 000a2f03 lw x30,0(x20) +80001b04: 004a0a13 addi x20,x20,4 + +80001b08 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sm4ed x29, x17, x30, 3 # perform operation +80001b08: f1e88eb3 sm4ed x29,x17,x30,0x3 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b0c: 000aa203 lw x4,0(x21) +80001b10: 01d20863 beq x4,x29,80001b20 +80001b14: 6ac062ef jal x5,800081c0 +80001b18: 80001b08 .word 0x80001b08 +80001b1c: 8000fd1f .word 0x8000fd1f +80001b20: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x00000002 +80001b24: 000a2f83 lw x31,0(x20) +80001b28: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xaaaaaaaa +80001b2c: 000a2903 lw x18,0(x20) +80001b30: 004a0a13 addi x20,x20,4 + +80001b34 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sm4ed x24, x31, x18, 0 # perform operation +80001b34: 312f8c33 sm4ed x24,x31,x18,0x0 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b38: 000aa203 lw x4,0(x21) +80001b3c: 01820863 beq x4,x24,80001b4c +80001b40: 680062ef jal x5,800081c0 +80001b44: 80001b34 .word 0x80001b34 +80001b48: 8000fd79 .word 0x8000fd79 +80001b4c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x00000002 +80001b50: 000a2483 lw x9,0(x20) +80001b54: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x55555555 +80001b58: 000a2183 lw x3,0(x20) +80001b5c: 004a0a13 addi x20,x20,4 + +80001b60 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sm4ed x7, x9, x3, 2 # perform operation +80001b60: b03483b3 sm4ed x7,x9,x3,0x2 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b64: 000aa203 lw x4,0(x21) +80001b68: 00720863 beq x4,x7,80001b78 +80001b6c: 654062ef jal x5,800081c0 +80001b70: 80001b60 .word 0x80001b60 +80001b74: 8000fdd3 .word 0x8000fdd3 +80001b78: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x80000000 +80001b7c: 000a2e83 lw x29,0(x20) +80001b80: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x00000000 +80001b84: 000a2603 lw x12,0(x20) +80001b88: 004a0a13 addi x20,x20,4 + +80001b8c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sm4ed x9, x29, x12, 0 # perform operation +80001b8c: 30ce84b3 sm4ed x9,x29,x12,0x0 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b90: 000aa203 lw x4,0(x21) +80001b94: 00920863 beq x4,x9,80001ba4 +80001b98: 628062ef jal x5,800081c0 +80001b9c: 80001b8c .word 0x80001b8c +80001ba0: 8000fe2d .word 0x8000fe2d +80001ba4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x80000000 +80001ba8: 000a2d03 lw x26,0(x20) +80001bac: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x00000001 +80001bb0: 000a2e03 lw x28,0(x20) +80001bb4: 004a0a13 addi x20,x20,4 + +80001bb8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sm4ed x12, x26, x28, 0 # perform operation +80001bb8: 31cd0633 sm4ed x12,x26,x28,0x0 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bbc: 000aa203 lw x4,0(x21) +80001bc0: 00c20863 beq x4,x12,80001bd0 +80001bc4: 5fc062ef jal x5,800081c0 +80001bc8: 80001bb8 .word 0x80001bb8 +80001bcc: 8000fe87 .word 0x8000fe87 +80001bd0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x80000000 +80001bd4: 000a2603 lw x12,0(x20) +80001bd8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x00000002 +80001bdc: 000a2c03 lw x24,0(x20) +80001be0: 004a0a13 addi x20,x20,4 + +80001be4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sm4ed x13, x12, x24, 3 # perform operation +80001be4: f18606b3 sm4ed x13,x12,x24,0x3 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001be8: 000aa203 lw x4,0(x21) +80001bec: 00d20863 beq x4,x13,80001bfc +80001bf0: 5d0062ef jal x5,800081c0 +80001bf4: 80001be4 .word 0x80001be4 +80001bf8: 8000fee1 .word 0x8000fee1 +80001bfc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x80000000 +80001c00: 000a2883 lw x17,0(x20) +80001c04: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x80000000 +80001c08: 000a2103 lw x2,0(x20) +80001c0c: 004a0a13 addi x20,x20,4 + +80001c10 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sm4ed x27, x17, x2, 0 # perform operation +80001c10: 30288db3 sm4ed x27,x17,x2,0x0 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c14: 000aa203 lw x4,0(x21) +80001c18: 01b20863 beq x4,x27,80001c28 +80001c1c: 5a4062ef jal x5,800081c0 +80001c20: 80001c10 .word 0x80001c10 +80001c24: 8000ff3b .word 0x8000ff3b +80001c28: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x80000000 +80001c2c: 000a2d83 lw x27,0(x20) +80001c30: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x80000001 +80001c34: 000a2683 lw x13,0(x20) +80001c38: 004a0a13 addi x20,x20,4 + +80001c3c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sm4ed x25, x27, x13, 0 # perform operation +80001c3c: 30dd8cb3 sm4ed x25,x27,x13,0x0 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c40: 000aa203 lw x4,0(x21) +80001c44: 01920863 beq x4,x25,80001c54 +80001c48: 578062ef jal x5,800081c0 +80001c4c: 80001c3c .word 0x80001c3c +80001c50: 8000ff9c .word 0x8000ff9c +80001c54: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x80000000 +80001c58: 000a2483 lw x9,0(x20) +80001c5c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x7fffffff +80001c60: 000a2903 lw x18,0(x20) +80001c64: 004a0a13 addi x20,x20,4 + +80001c68 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sm4ed x15, x9, x18, 1 # perform operation +80001c68: 712487b3 sm4ed x15,x9,x18,0x1 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c6c: 000aa203 lw x4,0(x21) +80001c70: 00f20863 beq x4,x15,80001c80 +80001c74: 54c062ef jal x5,800081c0 +80001c78: 80001c68 .word 0x80001c68 +80001c7c: 8000fffd .word 0x8000fffd +80001c80: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x80000000 +80001c84: 000a2c83 lw x25,0(x20) +80001c88: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x7ffffffe +80001c8c: 000a2983 lw x19,0(x20) +80001c90: 004a0a13 addi x20,x20,4 + +80001c94 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sm4ed x27, x25, x19, 2 # perform operation +80001c94: b13c8db3 sm4ed x27,x25,x19,0x2 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001c98: 000aa203 lw x4,0(x21) +80001c9c: 01b20863 beq x4,x27,80001cac +80001ca0: 520062ef jal x5,800081c0 +80001ca4: 80001c94 .word 0x80001c94 +80001ca8: 8001005e .word 0x8001005e +80001cac: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x80000000 +80001cb0: 000a2e03 lw x28,0(x20) +80001cb4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xffffffff +80001cb8: 000a2483 lw x9,0(x20) +80001cbc: 004a0a13 addi x20,x20,4 + +80001cc0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sm4ed x2, x28, x9, 1 # perform operation +80001cc0: 709e0133 sm4ed x2,x28,x9,0x1 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cc4: 000aa203 lw x4,0(x21) +80001cc8: 00220863 beq x4,x2,80001cd8 +80001ccc: 4f4062ef jal x5,800081c0 +80001cd0: 80001cc0 .word 0x80001cc0 +80001cd4: 800100bf .word 0x800100bf +80001cd8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x80000000 +80001cdc: 000a2883 lw x17,0(x20) +80001ce0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xfffffffe +80001ce4: 000a2383 lw x7,0(x20) +80001ce8: 004a0a13 addi x20,x20,4 + +80001cec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sm4ed x9, x17, x7, 3 # perform operation +80001cec: f07884b3 sm4ed x9,x17,x7,0x3 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cf0: 000aa203 lw x4,0(x21) +80001cf4: 00920863 beq x4,x9,80001d04 +80001cf8: 4c8062ef jal x5,800081c0 +80001cfc: 80001cec .word 0x80001cec +80001d00: 80010120 .word 0x80010120 +80001d04: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x80000000 +80001d08: 000a2b83 lw x23,0(x20) +80001d0c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x5bbc8872 +80001d10: 000a2303 lw x6,0(x20) +80001d14: 004a0a13 addi x20,x20,4 + +80001d18 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sm4ed x11, x23, x6, 0 # perform operation +80001d18: 306b85b3 sm4ed x11,x23,x6,0x0 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d1c: 000aa203 lw x4,0(x21) +80001d20: 00b20863 beq x4,x11,80001d30 +80001d24: 49c062ef jal x5,800081c0 +80001d28: 80001d18 .word 0x80001d18 +80001d2c: 80010181 .word 0x80010181 +80001d30: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x80000000 +80001d34: 000a2e03 lw x28,0(x20) +80001d38: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xaaaaaaaa +80001d3c: 000a2403 lw x8,0(x20) +80001d40: 004a0a13 addi x20,x20,4 + +80001d44 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sm4ed x3, x28, x8, 3 # perform operation +80001d44: f08e01b3 sm4ed x3,x28,x8,0x3 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d48: 000aa203 lw x4,0(x21) +80001d4c: 00320863 beq x4,x3,80001d5c +80001d50: 470062ef jal x5,800081c0 +80001d54: 80001d44 .word 0x80001d44 +80001d58: 800101e2 .word 0x800101e2 +80001d5c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x80000000 +80001d60: 000a2b03 lw x22,0(x20) +80001d64: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x55555555 +80001d68: 000a2f83 lw x31,0(x20) +80001d6c: 004a0a13 addi x20,x20,4 + +80001d70 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sm4ed x2, x22, x31, 1 # perform operation +80001d70: 71fb0133 sm4ed x2,x22,x31,0x1 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d74: 000aa203 lw x4,0(x21) +80001d78: 00220863 beq x4,x2,80001d88 +80001d7c: 444062ef jal x5,800081c0 +80001d80: 80001d70 .word 0x80001d70 +80001d84: 80010243 .word 0x80010243 +80001d88: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x80000001 +80001d8c: 000a2e03 lw x28,0(x20) +80001d90: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000000 +80001d94: 000a2d83 lw x27,0(x20) +80001d98: 004a0a13 addi x20,x20,4 + +80001d9c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sm4ed x14, x28, x27, 2 # perform operation +80001d9c: b1be0733 sm4ed x14,x28,x27,0x2 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001da0: 000aa203 lw x4,0(x21) +80001da4: 00e20863 beq x4,x14,80001db4 +80001da8: 418062ef jal x5,800081c0 +80001dac: 80001d9c .word 0x80001d9c +80001db0: 800102a4 .word 0x800102a4 +80001db4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x80000001 +80001db8: 000a2583 lw x11,0(x20) +80001dbc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x00000001 +80001dc0: 000a2183 lw x3,0(x20) +80001dc4: 004a0a13 addi x20,x20,4 + +80001dc8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sm4ed x14, x11, x3, 2 # perform operation +80001dc8: b0358733 sm4ed x14,x11,x3,0x2 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dcc: 000aa203 lw x4,0(x21) +80001dd0: 00e20863 beq x4,x14,80001de0 +80001dd4: 3ec062ef jal x5,800081c0 +80001dd8: 80001dc8 .word 0x80001dc8 +80001ddc: 800102fe .word 0x800102fe +80001de0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x80000001 +80001de4: 000a2403 lw x8,0(x20) +80001de8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000002 +80001dec: 000a2d83 lw x27,0(x20) +80001df0: 004a0a13 addi x20,x20,4 + +80001df4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sm4ed x29, x8, x27, 2 # perform operation +80001df4: b1b40eb3 sm4ed x29,x8,x27,0x2 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001df8: 000aa203 lw x4,0(x21) +80001dfc: 01d20863 beq x4,x29,80001e0c +80001e00: 3c0062ef jal x5,800081c0 +80001e04: 80001df4 .word 0x80001df4 +80001e08: 80010358 .word 0x80010358 +80001e0c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x80000001 +80001e10: 000a2c83 lw x25,0(x20) +80001e14: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x80000000 +80001e18: 000a2e03 lw x28,0(x20) +80001e1c: 004a0a13 addi x20,x20,4 + +80001e20 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sm4ed x14, x25, x28, 3 # perform operation +80001e20: f1cc8733 sm4ed x14,x25,x28,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e24: 000aa203 lw x4,0(x21) +80001e28: 00e20863 beq x4,x14,80001e38 +80001e2c: 394062ef jal x5,800081c0 +80001e30: 80001e20 .word 0x80001e20 +80001e34: 800103b2 .word 0x800103b2 +80001e38: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x80000001 +80001e3c: 000a2b03 lw x22,0(x20) +80001e40: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x80000001 +80001e44: 000a2783 lw x15,0(x20) +80001e48: 004a0a13 addi x20,x20,4 + +80001e4c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sm4ed x7, x22, x15, 1 # perform operation +80001e4c: 70fb03b3 sm4ed x7,x22,x15,0x1 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e50: 000aa203 lw x4,0(x21) +80001e54: 00720863 beq x4,x7,80001e64 +80001e58: 368062ef jal x5,800081c0 +80001e5c: 80001e4c .word 0x80001e4c +80001e60: 80010413 .word 0x80010413 +80001e64: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x80000001 +80001e68: 000a2b03 lw x22,0(x20) +80001e6c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x7fffffff +80001e70: 000a2e03 lw x28,0(x20) +80001e74: 004a0a13 addi x20,x20,4 + +80001e78 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sm4ed x19, x22, x28, 1 # perform operation +80001e78: 71cb09b3 sm4ed x19,x22,x28,0x1 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e7c: 000aa203 lw x4,0(x21) +80001e80: 01320863 beq x4,x19,80001e90 +80001e84: 33c062ef jal x5,800081c0 +80001e88: 80001e78 .word 0x80001e78 +80001e8c: 80010474 .word 0x80010474 +80001e90: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x80000001 +80001e94: 000a2083 lw x1,0(x20) +80001e98: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x7ffffffe +80001e9c: 000a2f03 lw x30,0(x20) +80001ea0: 004a0a13 addi x20,x20,4 + +80001ea4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sm4ed x23, x1, x30, 0 # perform operation +80001ea4: 31e08bb3 sm4ed x23,x1,x30,0x0 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001ea8: 000aa203 lw x4,0(x21) +80001eac: 01720863 beq x4,x23,80001ebc +80001eb0: 310062ef jal x5,800081c0 +80001eb4: 80001ea4 .word 0x80001ea4 +80001eb8: 800104d5 .word 0x800104d5 +80001ebc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x80000001 +80001ec0: 000a2e03 lw x28,0(x20) +80001ec4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xffffffff +80001ec8: 000a2303 lw x6,0(x20) +80001ecc: 004a0a13 addi x20,x20,4 + +80001ed0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sm4ed x23, x28, x6, 0 # perform operation +80001ed0: 306e0bb3 sm4ed x23,x28,x6,0x0 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ed4: 000aa203 lw x4,0(x21) +80001ed8: 01720863 beq x4,x23,80001ee8 +80001edc: 2e4062ef jal x5,800081c0 +80001ee0: 80001ed0 .word 0x80001ed0 +80001ee4: 80010536 .word 0x80010536 +80001ee8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x80000001 +80001eec: 000a2e83 lw x29,0(x20) +80001ef0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xfffffffe +80001ef4: 000a2c03 lw x24,0(x20) +80001ef8: 004a0a13 addi x20,x20,4 + +80001efc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sm4ed x31, x29, x24, 3 # perform operation +80001efc: f18e8fb3 sm4ed x31,x29,x24,0x3 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f00: 000aa203 lw x4,0(x21) +80001f04: 01f20863 beq x4,x31,80001f14 +80001f08: 2b8062ef jal x5,800081c0 +80001f0c: 80001efc .word 0x80001efc +80001f10: 80010597 .word 0x80010597 +80001f14: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x80000001 +80001f18: 000a2f83 lw x31,0(x20) +80001f1c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x5bbc8872 +80001f20: 000a2d03 lw x26,0(x20) +80001f24: 004a0a13 addi x20,x20,4 + +80001f28 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sm4ed x18, x31, x26, 1 # perform operation +80001f28: 71af8933 sm4ed x18,x31,x26,0x1 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f2c: 000aa203 lw x4,0(x21) +80001f30: 01220863 beq x4,x18,80001f40 +80001f34: 28c062ef jal x5,800081c0 +80001f38: 80001f28 .word 0x80001f28 +80001f3c: 800105f8 .word 0x800105f8 +80001f40: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x80000001 +80001f44: 000a2e83 lw x29,0(x20) +80001f48: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xaaaaaaaa +80001f4c: 000a2e03 lw x28,0(x20) +80001f50: 004a0a13 addi x20,x20,4 + +80001f54 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sm4ed x6, x29, x28, 0 # perform operation +80001f54: 31ce8333 sm4ed x6,x29,x28,0x0 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f58: 000aa203 lw x4,0(x21) +80001f5c: 00620863 beq x4,x6,80001f6c +80001f60: 260062ef jal x5,800081c0 +80001f64: 80001f54 .word 0x80001f54 +80001f68: 80010659 .word 0x80010659 +80001f6c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x80000001 +80001f70: 000a2c03 lw x24,0(x20) +80001f74: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x55555555 +80001f78: 000a2103 lw x2,0(x20) +80001f7c: 004a0a13 addi x20,x20,4 + +80001f80 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sm4ed x3, x24, x2, 1 # perform operation +80001f80: 702c01b3 sm4ed x3,x24,x2,0x1 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f84: 000aa203 lw x4,0(x21) +80001f88: 00320863 beq x4,x3,80001f98 +80001f8c: 234062ef jal x5,800081c0 +80001f90: 80001f80 .word 0x80001f80 +80001f94: 800106ba .word 0x800106ba +80001f98: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x7fffffff +80001f9c: 000a2d03 lw x26,0(x20) +80001fa0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x00000000 +80001fa4: 000a2f83 lw x31,0(x20) +80001fa8: 004a0a13 addi x20,x20,4 + +80001fac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sm4ed x11, x26, x31, 1 # perform operation +80001fac: 71fd05b3 sm4ed x11,x26,x31,0x1 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fb0: 000aa203 lw x4,0(x21) +80001fb4: 00b20863 beq x4,x11,80001fc4 +80001fb8: 208062ef jal x5,800081c0 +80001fbc: 80001fac .word 0x80001fac +80001fc0: 8001071b .word 0x8001071b +80001fc4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x7fffffff +80001fc8: 000a2383 lw x7,0(x20) +80001fcc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x00000001 +80001fd0: 000a2783 lw x15,0(x20) +80001fd4: 004a0a13 addi x20,x20,4 + +80001fd8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sm4ed x29, x7, x15, 0 # perform operation +80001fd8: 30f38eb3 sm4ed x29,x7,x15,0x0 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fdc: 000aa203 lw x4,0(x21) +80001fe0: 01d20863 beq x4,x29,80001ff0 +80001fe4: 1dc062ef jal x5,800081c0 +80001fe8: 80001fd8 .word 0x80001fd8 +80001fec: 80010775 .word 0x80010775 +80001ff0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x7fffffff +80001ff4: 000a2583 lw x11,0(x20) +80001ff8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000002 +80001ffc: 000a2d83 lw x27,0(x20) +80002000: 004a0a13 addi x20,x20,4 + +80002004 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sm4ed x3, x11, x27, 2 # perform operation +80002004: b1b581b3 sm4ed x3,x11,x27,0x2 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002008: 000aa203 lw x4,0(x21) +8000200c: 00320863 beq x4,x3,8000201c +80002010: 1b0062ef jal x5,800081c0 +80002014: 80002004 .word 0x80002004 +80002018: 800107cf .word 0x800107cf +8000201c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x7fffffff +80002020: 000a2c03 lw x24,0(x20) +80002024: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x80000000 +80002028: 000a2983 lw x19,0(x20) +8000202c: 004a0a13 addi x20,x20,4 + +80002030 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sm4ed x8, x24, x19, 2 # perform operation +80002030: b13c0433 sm4ed x8,x24,x19,0x2 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002034: 000aa203 lw x4,0(x21) +80002038: 00820863 beq x4,x8,80002048 +8000203c: 184062ef jal x5,800081c0 +80002040: 80002030 .word 0x80002030 +80002044: 80010829 .word 0x80010829 +80002048: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x7fffffff +8000204c: 000a2403 lw x8,0(x20) +80002050: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x80000001 +80002054: 000a2883 lw x17,0(x20) +80002058: 004a0a13 addi x20,x20,4 + +8000205c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sm4ed x18, x8, x17, 0 # perform operation +8000205c: 31140933 sm4ed x18,x8,x17,0x0 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +80002060: 000aa203 lw x4,0(x21) +80002064: 01220863 beq x4,x18,80002074 +80002068: 158062ef jal x5,800081c0 +8000206c: 8000205c .word 0x8000205c +80002070: 8001088a .word 0x8001088a +80002074: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x7fffffff +80002078: 000a2983 lw x19,0(x20) +8000207c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x7fffffff +80002080: 000a2583 lw x11,0(x20) +80002084: 004a0a13 addi x20,x20,4 + +80002088 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sm4ed x29, x19, x11, 0 # perform operation +80002088: 30b98eb3 sm4ed x29,x19,x11,0x0 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +8000208c: 000aa203 lw x4,0(x21) +80002090: 01d20863 beq x4,x29,800020a0 +80002094: 12c062ef jal x5,800081c0 +80002098: 80002088 .word 0x80002088 +8000209c: 800108eb .word 0x800108eb +800020a0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x7fffffff +800020a4: 000a2103 lw x2,0(x20) +800020a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x7ffffffe +800020ac: 000a2d83 lw x27,0(x20) +800020b0: 004a0a13 addi x20,x20,4 + +800020b4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sm4ed x22, x2, x27, 3 # perform operation +800020b4: f1b10b33 sm4ed x22,x2,x27,0x3 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020b8: 000aa203 lw x4,0(x21) +800020bc: 01620863 beq x4,x22,800020cc +800020c0: 100062ef jal x5,800081c0 +800020c4: 800020b4 .word 0x800020b4 +800020c8: 8001094c .word 0x8001094c +800020cc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x7fffffff +800020d0: 000a2b03 lw x22,0(x20) +800020d4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xffffffff +800020d8: 000a2483 lw x9,0(x20) +800020dc: 004a0a13 addi x20,x20,4 + +800020e0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sm4ed x16, x22, x9, 3 # perform operation +800020e0: f09b0833 sm4ed x16,x22,x9,0x3 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020e4: 000aa203 lw x4,0(x21) +800020e8: 01020863 beq x4,x16,800020f8 +800020ec: 0d4062ef jal x5,800081c0 +800020f0: 800020e0 .word 0x800020e0 +800020f4: 800109ad .word 0x800109ad +800020f8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x7fffffff +800020fc: 000a2603 lw x12,0(x20) +80002100: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xfffffffe +80002104: 000a2483 lw x9,0(x20) +80002108: 004a0a13 addi x20,x20,4 + +8000210c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sm4ed x1, x12, x9, 3 # perform operation +8000210c: f09600b3 sm4ed x1,x12,x9,0x3 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +80002110: 000aa203 lw x4,0(x21) +80002114: 00120863 beq x4,x1,80002124 +80002118: 0a8062ef jal x5,800081c0 +8000211c: 8000210c .word 0x8000210c +80002120: 80010a0e .word 0x80010a0e +80002124: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x7fffffff +80002128: 000a2583 lw x11,0(x20) +8000212c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x5bbc8872 +80002130: 000a2c83 lw x25,0(x20) +80002134: 004a0a13 addi x20,x20,4 + +80002138 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sm4ed x26, x11, x25, 2 # perform operation +80002138: b1958d33 sm4ed x26,x11,x25,0x2 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +8000213c: 000aa203 lw x4,0(x21) +80002140: 01a20863 beq x4,x26,80002150 +80002144: 07c062ef jal x5,800081c0 +80002148: 80002138 .word 0x80002138 +8000214c: 80010a6f .word 0x80010a6f +80002150: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x7fffffff +80002154: 000a2d03 lw x26,0(x20) +80002158: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xaaaaaaaa +8000215c: 000a2403 lw x8,0(x20) +80002160: 004a0a13 addi x20,x20,4 + +80002164 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sm4ed x29, x26, x8, 2 # perform operation +80002164: b08d0eb3 sm4ed x29,x26,x8,0x2 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002168: 000aa203 lw x4,0(x21) +8000216c: 01d20863 beq x4,x29,8000217c +80002170: 050062ef jal x5,800081c0 +80002174: 80002164 .word 0x80002164 +80002178: 80010ad0 .word 0x80010ad0 +8000217c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x7fffffff +80002180: 000a2783 lw x15,0(x20) +80002184: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x55555555 +80002188: 000a2b03 lw x22,0(x20) +8000218c: 004a0a13 addi x20,x20,4 + +80002190 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sm4ed x14, x15, x22, 3 # perform operation +80002190: f1678733 sm4ed x14,x15,x22,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +80002194: 000aa203 lw x4,0(x21) +80002198: 00e20863 beq x4,x14,800021a8 +8000219c: 024062ef jal x5,800081c0 +800021a0: 80002190 .word 0x80002190 +800021a4: 80010b31 .word 0x80010b31 +800021a8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x7ffffffe +800021ac: 000a2b83 lw x23,0(x20) +800021b0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x00000000 +800021b4: 000a2103 lw x2,0(x20) +800021b8: 004a0a13 addi x20,x20,4 + +800021bc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sm4ed x25, x23, x2, 3 # perform operation +800021bc: f02b8cb3 sm4ed x25,x23,x2,0x3 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021c0: 000aa203 lw x4,0(x21) +800021c4: 01920863 beq x4,x25,800021d4 +800021c8: 7f9052ef jal x5,800081c0 +800021cc: 800021bc .word 0x800021bc +800021d0: 80010b92 .word 0x80010b92 +800021d4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x7ffffffe +800021d8: 000a2803 lw x16,0(x20) +800021dc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x00000001 +800021e0: 000a2403 lw x8,0(x20) +800021e4: 004a0a13 addi x20,x20,4 + +800021e8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sm4ed x24, x16, x8, 3 # perform operation +800021e8: f0880c33 sm4ed x24,x16,x8,0x3 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021ec: 000aa203 lw x4,0(x21) +800021f0: 01820863 beq x4,x24,80002200 +800021f4: 7cd052ef jal x5,800081c0 +800021f8: 800021e8 .word 0x800021e8 +800021fc: 80010bec .word 0x80010bec +80002200: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x7ffffffe +80002204: 000a2083 lw x1,0(x20) +80002208: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000002 +8000220c: 000a2d83 lw x27,0(x20) +80002210: 004a0a13 addi x20,x20,4 + +80002214 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sm4ed x28, x1, x27, 0 # perform operation +80002214: 31b08e33 sm4ed x28,x1,x27,0x0 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002218: 000aa203 lw x4,0(x21) +8000221c: 01c20863 beq x4,x28,8000222c +80002220: 7a1052ef jal x5,800081c0 +80002224: 80002214 .word 0x80002214 +80002228: 80010c46 .word 0x80010c46 +8000222c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x7ffffffe +80002230: 000a2c83 lw x25,0(x20) +80002234: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x80000000 +80002238: 000a2403 lw x8,0(x20) +8000223c: 004a0a13 addi x20,x20,4 + +80002240 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sm4ed x12, x25, x8, 3 # perform operation +80002240: f08c8633 sm4ed x12,x25,x8,0x3 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002244: 000aa203 lw x4,0(x21) +80002248: 00c20863 beq x4,x12,80002258 +8000224c: 775052ef jal x5,800081c0 +80002250: 80002240 .word 0x80002240 +80002254: 80010ca0 .word 0x80010ca0 +80002258: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x7ffffffe +8000225c: 000a2103 lw x2,0(x20) +80002260: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x80000001 +80002264: 000a2783 lw x15,0(x20) +80002268: 004a0a13 addi x20,x20,4 + +8000226c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sm4ed x7, x2, x15, 3 # perform operation +8000226c: f0f103b3 sm4ed x7,x2,x15,0x3 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +80002270: 000aa203 lw x4,0(x21) +80002274: 00720863 beq x4,x7,80002284 +80002278: 749052ef jal x5,800081c0 +8000227c: 8000226c .word 0x8000226c +80002280: 80010d01 .word 0x80010d01 +80002284: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x7ffffffe +80002288: 000a2f03 lw x30,0(x20) +8000228c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x7fffffff +80002290: 000a2403 lw x8,0(x20) +80002294: 004a0a13 addi x20,x20,4 + +80002298 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sm4ed x12, x30, x8, 1 # perform operation +80002298: 708f0633 sm4ed x12,x30,x8,0x1 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +8000229c: 000aa203 lw x4,0(x21) +800022a0: 00c20863 beq x4,x12,800022b0 +800022a4: 71d052ef jal x5,800081c0 +800022a8: 80002298 .word 0x80002298 +800022ac: 80010d62 .word 0x80010d62 +800022b0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x7ffffffe +800022b4: 000a2503 lw x10,0(x20) +800022b8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x7ffffffe +800022bc: 000a2b03 lw x22,0(x20) +800022c0: 004a0a13 addi x20,x20,4 + +800022c4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sm4ed x16, x10, x22, 3 # perform operation +800022c4: f1650833 sm4ed x16,x10,x22,0x3 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022c8: 000aa203 lw x4,0(x21) +800022cc: 01020863 beq x4,x16,800022dc +800022d0: 6f1052ef jal x5,800081c0 +800022d4: 800022c4 .word 0x800022c4 +800022d8: 80010dc3 .word 0x80010dc3 +800022dc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x7ffffffe +800022e0: 000a2b03 lw x22,0(x20) +800022e4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xffffffff +800022e8: 000a2f83 lw x31,0(x20) +800022ec: 004a0a13 addi x20,x20,4 + +800022f0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sm4ed x24, x22, x31, 1 # perform operation +800022f0: 71fb0c33 sm4ed x24,x22,x31,0x1 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +800022f4: 000aa203 lw x4,0(x21) +800022f8: 01820863 beq x4,x24,80002308 +800022fc: 6c5052ef jal x5,800081c0 +80002300: 800022f0 .word 0x800022f0 +80002304: 80010e24 .word 0x80010e24 +80002308: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x7ffffffe +8000230c: 000a2103 lw x2,0(x20) +80002310: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xfffffffe +80002314: 000a2e03 lw x28,0(x20) +80002318: 004a0a13 addi x20,x20,4 + +8000231c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sm4ed x10, x2, x28, 3 # perform operation +8000231c: f1c10533 sm4ed x10,x2,x28,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +80002320: 000aa203 lw x4,0(x21) +80002324: 00a20863 beq x4,x10,80002334 +80002328: 699052ef jal x5,800081c0 +8000232c: 8000231c .word 0x8000231c +80002330: 80010e85 .word 0x80010e85 +80002334: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x7ffffffe +80002338: 000a2903 lw x18,0(x20) +8000233c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x5bbc8872 +80002340: 000a2583 lw x11,0(x20) +80002344: 004a0a13 addi x20,x20,4 + +80002348 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sm4ed x27, x18, x11, 2 # perform operation +80002348: b0b90db3 sm4ed x27,x18,x11,0x2 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +8000234c: 000aa203 lw x4,0(x21) +80002350: 01b20863 beq x4,x27,80002360 +80002354: 66d052ef jal x5,800081c0 +80002358: 80002348 .word 0x80002348 +8000235c: 80010ee6 .word 0x80010ee6 +80002360: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x7ffffffe +80002364: 000a2f03 lw x30,0(x20) +80002368: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xaaaaaaaa +8000236c: 000a2f83 lw x31,0(x20) +80002370: 004a0a13 addi x20,x20,4 + +80002374 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sm4ed x22, x30, x31, 0 # perform operation +80002374: 31ff0b33 sm4ed x22,x30,x31,0x0 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002378: 000aa203 lw x4,0(x21) +8000237c: 01620863 beq x4,x22,8000238c +80002380: 641052ef jal x5,800081c0 +80002384: 80002374 .word 0x80002374 +80002388: 80010f47 .word 0x80010f47 +8000238c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x7ffffffe +80002390: 000a2683 lw x13,0(x20) +80002394: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x55555555 +80002398: 000a2083 lw x1,0(x20) +8000239c: 004a0a13 addi x20,x20,4 + +800023a0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sm4ed x24, x13, x1, 0 # perform operation +800023a0: 30168c33 sm4ed x24,x13,x1,0x0 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023a4: 000aa203 lw x4,0(x21) +800023a8: 01820863 beq x4,x24,800023b8 +800023ac: 615052ef jal x5,800081c0 +800023b0: 800023a0 .word 0x800023a0 +800023b4: 80010fa8 .word 0x80010fa8 +800023b8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0xffffffff +800023bc: 000a2c03 lw x24,0(x20) +800023c0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x00000000 +800023c4: 000a2303 lw x6,0(x20) +800023c8: 004a0a13 addi x20,x20,4 + +800023cc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sm4ed x3, x24, x6, 2 # perform operation +800023cc: b06c01b3 sm4ed x3,x24,x6,0x2 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023d0: 000aa203 lw x4,0(x21) +800023d4: 00320863 beq x4,x3,800023e4 +800023d8: 5e9052ef jal x5,800081c0 +800023dc: 800023cc .word 0x800023cc +800023e0: 80011009 .word 0x80011009 +800023e4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xffffffff +800023e8: 000a2383 lw x7,0(x20) +800023ec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x00000001 +800023f0: 000a2603 lw x12,0(x20) +800023f4: 004a0a13 addi x20,x20,4 + +800023f8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sm4ed x29, x7, x12, 0 # perform operation +800023f8: 30c38eb3 sm4ed x29,x7,x12,0x0 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +800023fc: 000aa203 lw x4,0(x21) +80002400: 01d20863 beq x4,x29,80002410 +80002404: 5bd052ef jal x5,800081c0 +80002408: 800023f8 .word 0x800023f8 +8000240c: 80011063 .word 0x80011063 +80002410: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xffffffff +80002414: 000a2f83 lw x31,0(x20) +80002418: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x00000002 +8000241c: 000a2903 lw x18,0(x20) +80002420: 004a0a13 addi x20,x20,4 + +80002424 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sm4ed x22, x31, x18, 3 # perform operation +80002424: f12f8b33 sm4ed x22,x31,x18,0x3 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002428: 000aa203 lw x4,0(x21) +8000242c: 01620863 beq x4,x22,8000243c +80002430: 591052ef jal x5,800081c0 +80002434: 80002424 .word 0x80002424 +80002438: 800110bd .word 0x800110bd +8000243c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xffffffff +80002440: 000a2883 lw x17,0(x20) +80002444: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x80000000 +80002448: 000a2103 lw x2,0(x20) +8000244c: 004a0a13 addi x20,x20,4 + +80002450 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sm4ed x18, x17, x2, 0 # perform operation +80002450: 30288933 sm4ed x18,x17,x2,0x0 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002454: 000aa203 lw x4,0(x21) +80002458: 01220863 beq x4,x18,80002468 +8000245c: 565052ef jal x5,800081c0 +80002460: 80002450 .word 0x80002450 +80002464: 80011117 .word 0x80011117 +80002468: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xffffffff +8000246c: 000a2383 lw x7,0(x20) +80002470: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x80000001 +80002474: 000a2683 lw x13,0(x20) +80002478: 004a0a13 addi x20,x20,4 + +8000247c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sm4ed x2, x7, x13, 1 # perform operation +8000247c: 70d38133 sm4ed x2,x7,x13,0x1 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +80002480: 000aa203 lw x4,0(x21) +80002484: 00220863 beq x4,x2,80002494 +80002488: 539052ef jal x5,800081c0 +8000248c: 8000247c .word 0x8000247c +80002490: 80011178 .word 0x80011178 +80002494: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xffffffff +80002498: 000a2483 lw x9,0(x20) +8000249c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x7fffffff +800024a0: 000a2703 lw x14,0(x20) +800024a4: 004a0a13 addi x20,x20,4 + +800024a8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sm4ed x13, x9, x14, 2 # perform operation +800024a8: b0e486b3 sm4ed x13,x9,x14,0x2 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024ac: 000aa203 lw x4,0(x21) +800024b0: 00d20863 beq x4,x13,800024c0 +800024b4: 50d052ef jal x5,800081c0 +800024b8: 800024a8 .word 0x800024a8 +800024bc: 800111d9 .word 0x800111d9 +800024c0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xffffffff +800024c4: 000a2583 lw x11,0(x20) +800024c8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x7ffffffe +800024cc: 000a2d83 lw x27,0(x20) +800024d0: 004a0a13 addi x20,x20,4 + +800024d4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sm4ed x18, x11, x27, 2 # perform operation +800024d4: b1b58933 sm4ed x18,x11,x27,0x2 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024d8: 000aa203 lw x4,0(x21) +800024dc: 01220863 beq x4,x18,800024ec +800024e0: 4e1052ef jal x5,800081c0 +800024e4: 800024d4 .word 0x800024d4 +800024e8: 8001123a .word 0x8001123a +800024ec: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xffffffff +800024f0: 000a2783 lw x15,0(x20) +800024f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xffffffff +800024f8: 000a2b83 lw x23,0(x20) +800024fc: 004a0a13 addi x20,x20,4 + +80002500 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sm4ed x31, x15, x23, 0 # perform operation +80002500: 31778fb3 sm4ed x31,x15,x23,0x0 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002504: 000aa203 lw x4,0(x21) +80002508: 01f20863 beq x4,x31,80002518 +8000250c: 4b5052ef jal x5,800081c0 +80002510: 80002500 .word 0x80002500 +80002514: 8001129b .word 0x8001129b +80002518: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xffffffff +8000251c: 000a2703 lw x14,0(x20) +80002520: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0xfffffffe +80002524: 000a2c83 lw x25,0(x20) +80002528: 004a0a13 addi x20,x20,4 + +8000252c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sm4ed x24, x14, x25, 2 # perform operation +8000252c: b1970c33 sm4ed x24,x14,x25,0x2 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +80002530: 000aa203 lw x4,0(x21) +80002534: 01820863 beq x4,x24,80002544 +80002538: 489052ef jal x5,800081c0 +8000253c: 8000252c .word 0x8000252c +80002540: 800112fc .word 0x800112fc +80002544: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xffffffff +80002548: 000a2883 lw x17,0(x20) +8000254c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x5bbc8872 +80002550: 000a2e83 lw x29,0(x20) +80002554: 004a0a13 addi x20,x20,4 + +80002558 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sm4ed x19, x17, x29, 0 # perform operation +80002558: 31d889b3 sm4ed x19,x17,x29,0x0 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +8000255c: 000aa203 lw x4,0(x21) +80002560: 01320863 beq x4,x19,80002570 +80002564: 45d052ef jal x5,800081c0 +80002568: 80002558 .word 0x80002558 +8000256c: 8001135d .word 0x8001135d +80002570: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xffffffff +80002574: 000a2083 lw x1,0(x20) +80002578: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xaaaaaaaa +8000257c: 000a2403 lw x8,0(x20) +80002580: 004a0a13 addi x20,x20,4 + +80002584 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sm4ed x31, x1, x8, 1 # perform operation +80002584: 70808fb3 sm4ed x31,x1,x8,0x1 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002588: 000aa203 lw x4,0(x21) +8000258c: 01f20863 beq x4,x31,8000259c +80002590: 431052ef jal x5,800081c0 +80002594: 80002584 .word 0x80002584 +80002598: 800113be .word 0x800113be +8000259c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0xffffffff +800025a0: 000a2c03 lw x24,0(x20) +800025a4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x55555555 +800025a8: 000a2883 lw x17,0(x20) +800025ac: 004a0a13 addi x20,x20,4 + +800025b0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sm4ed x11, x24, x17, 2 # perform operation +800025b0: b11c05b3 sm4ed x11,x24,x17,0x2 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025b4: 000aa203 lw x4,0(x21) +800025b8: 00b20863 beq x4,x11,800025c8 +800025bc: 405052ef jal x5,800081c0 +800025c0: 800025b0 .word 0x800025b0 +800025c4: 8001141f .word 0x8001141f +800025c8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xfffffffe +800025cc: 000a2903 lw x18,0(x20) +800025d0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x00000000 +800025d4: 000a2783 lw x15,0(x20) +800025d8: 004a0a13 addi x20,x20,4 + +800025dc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sm4ed x25, x18, x15, 1 # perform operation +800025dc: 70f90cb3 sm4ed x25,x18,x15,0x1 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025e0: 000aa203 lw x4,0(x21) +800025e4: 01920863 beq x4,x25,800025f4 +800025e8: 3d9052ef jal x5,800081c0 +800025ec: 800025dc .word 0x800025dc +800025f0: 80011480 .word 0x80011480 +800025f4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xfffffffe +800025f8: 000a2c83 lw x25,0(x20) +800025fc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000001 +80002600: 000a2883 lw x17,0(x20) +80002604: 004a0a13 addi x20,x20,4 + +80002608 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sm4ed x18, x25, x17, 3 # perform operation +80002608: f11c8933 sm4ed x18,x25,x17,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +8000260c: 000aa203 lw x4,0(x21) +80002610: 01220863 beq x4,x18,80002620 +80002614: 3ad052ef jal x5,800081c0 +80002618: 80002608 .word 0x80002608 +8000261c: 800114da .word 0x800114da +80002620: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xfffffffe +80002624: 000a2883 lw x17,0(x20) +80002628: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x00000002 +8000262c: 000a2e83 lw x29,0(x20) +80002630: 004a0a13 addi x20,x20,4 + +80002634 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sm4ed x2, x17, x29, 2 # perform operation +80002634: b1d88133 sm4ed x2,x17,x29,0x2 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002638: 000aa203 lw x4,0(x21) +8000263c: 00220863 beq x4,x2,8000264c +80002640: 381052ef jal x5,800081c0 +80002644: 80002634 .word 0x80002634 +80002648: 80011534 .word 0x80011534 +8000264c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xfffffffe +80002650: 000a2183 lw x3,0(x20) +80002654: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x80000000 +80002658: 000a2483 lw x9,0(x20) +8000265c: 004a0a13 addi x20,x20,4 + +80002660 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sm4ed x19, x3, x9, 2 # perform operation +80002660: b09189b3 sm4ed x19,x3,x9,0x2 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002664: 000aa203 lw x4,0(x21) +80002668: 01320863 beq x4,x19,80002678 +8000266c: 355052ef jal x5,800081c0 +80002670: 80002660 .word 0x80002660 +80002674: 8001158e .word 0x8001158e +80002678: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xfffffffe +8000267c: 000a2103 lw x2,0(x20) +80002680: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x80000001 +80002684: 000a2383 lw x7,0(x20) +80002688: 004a0a13 addi x20,x20,4 + +8000268c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sm4ed x26, x2, x7, 0 # perform operation +8000268c: 30710d33 sm4ed x26,x2,x7,0x0 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +80002690: 000aa203 lw x4,0(x21) +80002694: 01a20863 beq x4,x26,800026a4 +80002698: 329052ef jal x5,800081c0 +8000269c: 8000268c .word 0x8000268c +800026a0: 800115ef .word 0x800115ef +800026a4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xfffffffe +800026a8: 000a2603 lw x12,0(x20) +800026ac: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x7fffffff +800026b0: 000a2803 lw x16,0(x20) +800026b4: 004a0a13 addi x20,x20,4 + +800026b8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sm4ed x10, x12, x16, 3 # perform operation +800026b8: f1060533 sm4ed x10,x12,x16,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026bc: 000aa203 lw x4,0(x21) +800026c0: 00a20863 beq x4,x10,800026d0 +800026c4: 2fd052ef jal x5,800081c0 +800026c8: 800026b8 .word 0x800026b8 +800026cc: 80011650 .word 0x80011650 +800026d0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xfffffffe +800026d4: 000a2f83 lw x31,0(x20) +800026d8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x7ffffffe +800026dc: 000a2703 lw x14,0(x20) +800026e0: 004a0a13 addi x20,x20,4 + +800026e4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sm4ed x18, x31, x14, 3 # perform operation +800026e4: f0ef8933 sm4ed x18,x31,x14,0x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026e8: 000aa203 lw x4,0(x21) +800026ec: 01220863 beq x4,x18,800026fc +800026f0: 2d1052ef jal x5,800081c0 +800026f4: 800026e4 .word 0x800026e4 +800026f8: 800116b1 .word 0x800116b1 +800026fc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xfffffffe +80002700: 000a2983 lw x19,0(x20) +80002704: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xffffffff +80002708: 000a2703 lw x14,0(x20) +8000270c: 004a0a13 addi x20,x20,4 + +80002710 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sm4ed x10, x19, x14, 3 # perform operation +80002710: f0e98533 sm4ed x10,x19,x14,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002714: 000aa203 lw x4,0(x21) +80002718: 00a20863 beq x4,x10,80002728 +8000271c: 2a5052ef jal x5,800081c0 +80002720: 80002710 .word 0x80002710 +80002724: 80011712 .word 0x80011712 +80002728: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xfffffffe +8000272c: 000a2e03 lw x28,0(x20) +80002730: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xfffffffe +80002734: 000a2983 lw x19,0(x20) +80002738: 004a0a13 addi x20,x20,4 + +8000273c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sm4ed x7, x28, x19, 0 # perform operation +8000273c: 313e03b3 sm4ed x7,x28,x19,0x0 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +80002740: 000aa203 lw x4,0(x21) +80002744: 00720863 beq x4,x7,80002754 +80002748: 279052ef jal x5,800081c0 +8000274c: 8000273c .word 0x8000273c +80002750: 80011773 .word 0x80011773 +80002754: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xfffffffe +80002758: 000a2803 lw x16,0(x20) +8000275c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x5bbc8872 +80002760: 000a2583 lw x11,0(x20) +80002764: 004a0a13 addi x20,x20,4 + +80002768 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sm4ed x31, x16, x11, 0 # perform operation +80002768: 30b80fb3 sm4ed x31,x16,x11,0x0 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +8000276c: 000aa203 lw x4,0(x21) +80002770: 01f20863 beq x4,x31,80002780 +80002774: 24d052ef jal x5,800081c0 +80002778: 80002768 .word 0x80002768 +8000277c: 800117d4 .word 0x800117d4 +80002780: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xfffffffe +80002784: 000a2183 lw x3,0(x20) +80002788: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xaaaaaaaa +8000278c: 000a2c03 lw x24,0(x20) +80002790: 004a0a13 addi x20,x20,4 + +80002794 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sm4ed x25, x3, x24, 2 # perform operation +80002794: b1818cb3 sm4ed x25,x3,x24,0x2 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +80002798: 000aa203 lw x4,0(x21) +8000279c: 01920863 beq x4,x25,800027ac +800027a0: 221052ef jal x5,800081c0 +800027a4: 80002794 .word 0x80002794 +800027a8: 80011835 .word 0x80011835 +800027ac: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xfffffffe +800027b0: 000a2b83 lw x23,0(x20) +800027b4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x55555555 +800027b8: 000a2f03 lw x30,0(x20) +800027bc: 004a0a13 addi x20,x20,4 + +800027c0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sm4ed x9, x23, x30, 0 # perform operation +800027c0: 31eb84b3 sm4ed x9,x23,x30,0x0 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027c4: 000aa203 lw x4,0(x21) +800027c8: 00920863 beq x4,x9,800027d8 +800027cc: 1f5052ef jal x5,800081c0 +800027d0: 800027c0 .word 0x800027c0 +800027d4: 80011896 .word 0x80011896 +800027d8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x5bbc8872 +800027dc: 000a2183 lw x3,0(x20) +800027e0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x00000000 +800027e4: 000a2f83 lw x31,0(x20) +800027e8: 004a0a13 addi x20,x20,4 + +800027ec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sm4ed x10, x3, x31, 3 # perform operation +800027ec: f1f18533 sm4ed x10,x3,x31,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027f0: 000aa203 lw x4,0(x21) +800027f4: 00a20863 beq x4,x10,80002804 +800027f8: 1c9052ef jal x5,800081c0 +800027fc: 800027ec .word 0x800027ec +80002800: 800118f7 .word 0x800118f7 +80002804: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x5bbc8872 +80002808: 000a2583 lw x11,0(x20) +8000280c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000001 +80002810: 000a2883 lw x17,0(x20) +80002814: 004a0a13 addi x20,x20,4 + +80002818 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sm4ed x25, x11, x17, 1 # perform operation +80002818: 71158cb3 sm4ed x25,x11,x17,0x1 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +8000281c: 000aa203 lw x4,0(x21) +80002820: 01920863 beq x4,x25,80002830 +80002824: 19d052ef jal x5,800081c0 +80002828: 80002818 .word 0x80002818 +8000282c: 80011951 .word 0x80011951 +80002830: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x5bbc8872 +80002834: 000a2f83 lw x31,0(x20) +80002838: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x00000002 +8000283c: 000a2483 lw x9,0(x20) +80002840: 004a0a13 addi x20,x20,4 + +80002844 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sm4ed x3, x31, x9, 1 # perform operation +80002844: 709f81b3 sm4ed x3,x31,x9,0x1 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002848: 000aa203 lw x4,0(x21) +8000284c: 00320863 beq x4,x3,8000285c +80002850: 171052ef jal x5,800081c0 +80002854: 80002844 .word 0x80002844 +80002858: 800119ab .word 0x800119ab +8000285c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x5bbc8872 +80002860: 000a2383 lw x7,0(x20) +80002864: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x80000000 +80002868: 000a2803 lw x16,0(x20) +8000286c: 004a0a13 addi x20,x20,4 + +80002870 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sm4ed x25, x7, x16, 3 # perform operation +80002870: f1038cb3 sm4ed x25,x7,x16,0x3 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002874: 000aa203 lw x4,0(x21) +80002878: 01920863 beq x4,x25,80002888 +8000287c: 145052ef jal x5,800081c0 +80002880: 80002870 .word 0x80002870 +80002884: 80011a05 .word 0x80011a05 +80002888: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x5bbc8872 +8000288c: 000a2703 lw x14,0(x20) +80002890: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x80000001 +80002894: 000a2c83 lw x25,0(x20) +80002898: 004a0a13 addi x20,x20,4 + +8000289c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sm4ed x28, x14, x25, 2 # perform operation +8000289c: b1970e33 sm4ed x28,x14,x25,0x2 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028a0: 000aa203 lw x4,0(x21) +800028a4: 01c20863 beq x4,x28,800028b4 +800028a8: 119052ef jal x5,800081c0 +800028ac: 8000289c .word 0x8000289c +800028b0: 80011a66 .word 0x80011a66 +800028b4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x5bbc8872 +800028b8: 000a2103 lw x2,0(x20) +800028bc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x7fffffff +800028c0: 000a2183 lw x3,0(x20) +800028c4: 004a0a13 addi x20,x20,4 + +800028c8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sm4ed x24, x2, x3, 1 # perform operation +800028c8: 70310c33 sm4ed x24,x2,x3,0x1 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028cc: 000aa203 lw x4,0(x21) +800028d0: 01820863 beq x4,x24,800028e0 +800028d4: 0ed052ef jal x5,800081c0 +800028d8: 800028c8 .word 0x800028c8 +800028dc: 80011ac7 .word 0x80011ac7 +800028e0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x5bbc8872 +800028e4: 000a2483 lw x9,0(x20) +800028e8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x7ffffffe +800028ec: 000a2583 lw x11,0(x20) +800028f0: 004a0a13 addi x20,x20,4 + +800028f4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sm4ed x30, x9, x11, 2 # perform operation +800028f4: b0b48f33 sm4ed x30,x9,x11,0x2 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +800028f8: 000aa203 lw x4,0(x21) +800028fc: 01e20863 beq x4,x30,8000290c +80002900: 0c1052ef jal x5,800081c0 +80002904: 800028f4 .word 0x800028f4 +80002908: 80011b28 .word 0x80011b28 +8000290c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x5bbc8872 +80002910: 000a2e83 lw x29,0(x20) +80002914: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xffffffff +80002918: 000a2383 lw x7,0(x20) +8000291c: 004a0a13 addi x20,x20,4 + +80002920 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sm4ed x19, x29, x7, 1 # perform operation +80002920: 707e89b3 sm4ed x19,x29,x7,0x1 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002924: 000aa203 lw x4,0(x21) +80002928: 01320863 beq x4,x19,80002938 +8000292c: 095052ef jal x5,800081c0 +80002930: 80002920 .word 0x80002920 +80002934: 80011b89 .word 0x80011b89 +80002938: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x5bbc8872 +8000293c: 000a2d03 lw x26,0(x20) +80002940: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xfffffffe +80002944: 000a2703 lw x14,0(x20) +80002948: 004a0a13 addi x20,x20,4 + +8000294c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sm4ed x16, x26, x14, 3 # perform operation +8000294c: f0ed0833 sm4ed x16,x26,x14,0x3 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +80002950: 000aa203 lw x4,0(x21) +80002954: 01020863 beq x4,x16,80002964 +80002958: 069052ef jal x5,800081c0 +8000295c: 8000294c .word 0x8000294c +80002960: 80011bea .word 0x80011bea +80002964: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x5bbc8872 +80002968: 000a2703 lw x14,0(x20) +8000296c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x5bbc8872 +80002970: 000a2983 lw x19,0(x20) +80002974: 004a0a13 addi x20,x20,4 + +80002978 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sm4ed x26, x14, x19, 2 # perform operation +80002978: b1370d33 sm4ed x26,x14,x19,0x2 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +8000297c: 000aa203 lw x4,0(x21) +80002980: 01a20863 beq x4,x26,80002990 +80002984: 03d052ef jal x5,800081c0 +80002988: 80002978 .word 0x80002978 +8000298c: 80011c4b .word 0x80011c4b +80002990: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x5bbc8872 +80002994: 000a2d83 lw x27,0(x20) +80002998: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xaaaaaaaa +8000299c: 000a2903 lw x18,0(x20) +800029a0: 004a0a13 addi x20,x20,4 + +800029a4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sm4ed x22, x27, x18, 0 # perform operation +800029a4: 312d8b33 sm4ed x22,x27,x18,0x0 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029a8: 000aa203 lw x4,0(x21) +800029ac: 01620863 beq x4,x22,800029bc +800029b0: 011052ef jal x5,800081c0 +800029b4: 800029a4 .word 0x800029a4 +800029b8: 80011cac .word 0x80011cac +800029bc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x5bbc8872 +800029c0: 000a2e83 lw x29,0(x20) +800029c4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x55555555 +800029c8: 000a2f03 lw x30,0(x20) +800029cc: 004a0a13 addi x20,x20,4 + +800029d0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sm4ed x3, x29, x30, 0 # perform operation +800029d0: 31ee81b3 sm4ed x3,x29,x30,0x0 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029d4: 000aa203 lw x4,0(x21) +800029d8: 00320863 beq x4,x3,800029e8 +800029dc: 7e4052ef jal x5,800081c0 +800029e0: 800029d0 .word 0x800029d0 +800029e4: 80011d0d .word 0x80011d0d +800029e8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xaaaaaaaa +800029ec: 000a2f03 lw x30,0(x20) +800029f0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x00000000 +800029f4: 000a2503 lw x10,0(x20) +800029f8: 004a0a13 addi x20,x20,4 + +800029fc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sm4ed x15, x30, x10, 3 # perform operation +800029fc: f0af07b3 sm4ed x15,x30,x10,0x3 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a00: 000aa203 lw x4,0(x21) +80002a04: 00f20863 beq x4,x15,80002a14 +80002a08: 7b8052ef jal x5,800081c0 +80002a0c: 800029fc .word 0x800029fc +80002a10: 80011d6e .word 0x80011d6e +80002a14: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xaaaaaaaa +80002a18: 000a2b03 lw x22,0(x20) +80002a1c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000001 +80002a20: 000a2883 lw x17,0(x20) +80002a24: 004a0a13 addi x20,x20,4 + +80002a28 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sm4ed x10, x22, x17, 0 # perform operation +80002a28: 311b0533 sm4ed x10,x22,x17,0x0 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a2c: 000aa203 lw x4,0(x21) +80002a30: 00a20863 beq x4,x10,80002a40 +80002a34: 78c052ef jal x5,800081c0 +80002a38: 80002a28 .word 0x80002a28 +80002a3c: 80011dc8 .word 0x80011dc8 +80002a40: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xaaaaaaaa +80002a44: 000a2303 lw x6,0(x20) +80002a48: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x00000002 +80002a4c: 000a2b03 lw x22,0(x20) +80002a50: 004a0a13 addi x20,x20,4 + +80002a54 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sm4ed x11, x6, x22, 3 # perform operation +80002a54: f16305b3 sm4ed x11,x6,x22,0x3 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a58: 000aa203 lw x4,0(x21) +80002a5c: 00b20863 beq x4,x11,80002a6c +80002a60: 760052ef jal x5,800081c0 +80002a64: 80002a54 .word 0x80002a54 +80002a68: 80011e22 .word 0x80011e22 +80002a6c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xaaaaaaaa +80002a70: 000a2683 lw x13,0(x20) +80002a74: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x80000000 +80002a78: 000a2783 lw x15,0(x20) +80002a7c: 004a0a13 addi x20,x20,4 + +80002a80 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sm4ed x27, x13, x15, 0 # perform operation +80002a80: 30f68db3 sm4ed x27,x13,x15,0x0 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a84: 000aa203 lw x4,0(x21) +80002a88: 01b20863 beq x4,x27,80002a98 +80002a8c: 734052ef jal x5,800081c0 +80002a90: 80002a80 .word 0x80002a80 +80002a94: 80011e7c .word 0x80011e7c +80002a98: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0xaaaaaaaa +80002a9c: 000a2d83 lw x27,0(x20) +80002aa0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x80000001 +80002aa4: 000a2d03 lw x26,0(x20) +80002aa8: 004a0a13 addi x20,x20,4 + +80002aac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sm4ed x10, x27, x26, 3 # perform operation +80002aac: f1ad8533 sm4ed x10,x27,x26,0x3 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002ab0: 000aa203 lw x4,0(x21) +80002ab4: 00a20863 beq x4,x10,80002ac4 +80002ab8: 708052ef jal x5,800081c0 +80002abc: 80002aac .word 0x80002aac +80002ac0: 80011edd .word 0x80011edd +80002ac4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xaaaaaaaa +80002ac8: 000a2b03 lw x22,0(x20) +80002acc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x7fffffff +80002ad0: 000a2603 lw x12,0(x20) +80002ad4: 004a0a13 addi x20,x20,4 + +80002ad8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sm4ed x15, x22, x12, 3 # perform operation +80002ad8: f0cb07b3 sm4ed x15,x22,x12,0x3 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002adc: 000aa203 lw x4,0(x21) +80002ae0: 00f20863 beq x4,x15,80002af0 +80002ae4: 6dc052ef jal x5,800081c0 +80002ae8: 80002ad8 .word 0x80002ad8 +80002aec: 80011f3e .word 0x80011f3e +80002af0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xaaaaaaaa +80002af4: 000a2903 lw x18,0(x20) +80002af8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x7ffffffe +80002afc: 000a2f83 lw x31,0(x20) +80002b00: 004a0a13 addi x20,x20,4 + +80002b04 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sm4ed x7, x18, x31, 1 # perform operation +80002b04: 71f903b3 sm4ed x7,x18,x31,0x1 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b08: 000aa203 lw x4,0(x21) +80002b0c: 00720863 beq x4,x7,80002b1c +80002b10: 6b0052ef jal x5,800081c0 +80002b14: 80002b04 .word 0x80002b04 +80002b18: 80011f9f .word 0x80011f9f +80002b1c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xaaaaaaaa +80002b20: 000a2e83 lw x29,0(x20) +80002b24: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xffffffff +80002b28: 000a2c03 lw x24,0(x20) +80002b2c: 004a0a13 addi x20,x20,4 + +80002b30 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sm4ed x3, x29, x24, 1 # perform operation +80002b30: 718e81b3 sm4ed x3,x29,x24,0x1 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b34: 000aa203 lw x4,0(x21) +80002b38: 00320863 beq x4,x3,80002b48 +80002b3c: 684052ef jal x5,800081c0 +80002b40: 80002b30 .word 0x80002b30 +80002b44: 80012000 .word 0x80012000 +80002b48: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xaaaaaaaa +80002b4c: 000a2503 lw x10,0(x20) +80002b50: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xfffffffe +80002b54: 000a2903 lw x18,0(x20) +80002b58: 004a0a13 addi x20,x20,4 + +80002b5c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sm4ed x6, x10, x18, 0 # perform operation +80002b5c: 31250333 sm4ed x6,x10,x18,0x0 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b60: 000aa203 lw x4,0(x21) +80002b64: 00620863 beq x4,x6,80002b74 +80002b68: 658052ef jal x5,800081c0 +80002b6c: 80002b5c .word 0x80002b5c +80002b70: 80012061 .word 0x80012061 +80002b74: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xaaaaaaaa +80002b78: 000a2f83 lw x31,0(x20) +80002b7c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x5bbc8872 +80002b80: 000a2503 lw x10,0(x20) +80002b84: 004a0a13 addi x20,x20,4 + +80002b88 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sm4ed x3, x31, x10, 1 # perform operation +80002b88: 70af81b3 sm4ed x3,x31,x10,0x1 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b8c: 000aa203 lw x4,0(x21) +80002b90: 00320863 beq x4,x3,80002ba0 +80002b94: 62c052ef jal x5,800081c0 +80002b98: 80002b88 .word 0x80002b88 +80002b9c: 800120c2 .word 0x800120c2 +80002ba0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0xaaaaaaaa +80002ba4: 000a2d03 lw x26,0(x20) +80002ba8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xaaaaaaaa +80002bac: 000a2983 lw x19,0(x20) +80002bb0: 004a0a13 addi x20,x20,4 + +80002bb4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sm4ed x22, x26, x19, 3 # perform operation +80002bb4: f13d0b33 sm4ed x22,x26,x19,0x3 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bb8: 000aa203 lw x4,0(x21) +80002bbc: 01620863 beq x4,x22,80002bcc +80002bc0: 600052ef jal x5,800081c0 +80002bc4: 80002bb4 .word 0x80002bb4 +80002bc8: 80012123 .word 0x80012123 +80002bcc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xaaaaaaaa +80002bd0: 000a2383 lw x7,0(x20) +80002bd4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x55555555 +80002bd8: 000a2c03 lw x24,0(x20) +80002bdc: 004a0a13 addi x20,x20,4 + +80002be0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sm4ed x30, x7, x24, 2 # perform operation +80002be0: b1838f33 sm4ed x30,x7,x24,0x2 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002be4: 000aa203 lw x4,0(x21) +80002be8: 01e20863 beq x4,x30,80002bf8 +80002bec: 5d4052ef jal x5,800081c0 +80002bf0: 80002be0 .word 0x80002be0 +80002bf4: 80012184 .word 0x80012184 +80002bf8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x55555555 +80002bfc: 000a2c83 lw x25,0(x20) +80002c00: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x00000000 +80002c04: 000a2683 lw x13,0(x20) +80002c08: 004a0a13 addi x20,x20,4 + +80002c0c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sm4ed x12, x25, x13, 1 # perform operation +80002c0c: 70dc8633 sm4ed x12,x25,x13,0x1 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c10: 000aa203 lw x4,0(x21) +80002c14: 00c20863 beq x4,x12,80002c24 +80002c18: 5a8052ef jal x5,800081c0 +80002c1c: 80002c0c .word 0x80002c0c +80002c20: 800121e5 .word 0x800121e5 +80002c24: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x55555555 +80002c28: 000a2f83 lw x31,0(x20) +80002c2c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x00000001 +80002c30: 000a2d83 lw x27,0(x20) +80002c34: 004a0a13 addi x20,x20,4 + +80002c38 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sm4ed x6, x31, x27, 0 # perform operation +80002c38: 31bf8333 sm4ed x6,x31,x27,0x0 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c3c: 000aa203 lw x4,0(x21) +80002c40: 00620863 beq x4,x6,80002c50 +80002c44: 57c052ef jal x5,800081c0 +80002c48: 80002c38 .word 0x80002c38 +80002c4c: 8001223f .word 0x8001223f +80002c50: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x55555555 +80002c54: 000a2683 lw x13,0(x20) +80002c58: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x00000002 +80002c5c: 000a2803 lw x16,0(x20) +80002c60: 004a0a13 addi x20,x20,4 + +80002c64 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sm4ed x30, x13, x16, 2 # perform operation +80002c64: b1068f33 sm4ed x30,x13,x16,0x2 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c68: 000aa203 lw x4,0(x21) +80002c6c: 01e20863 beq x4,x30,80002c7c +80002c70: 550052ef jal x5,800081c0 +80002c74: 80002c64 .word 0x80002c64 +80002c78: 80012299 .word 0x80012299 +80002c7c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x55555555 +80002c80: 000a2e83 lw x29,0(x20) +80002c84: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x80000000 +80002c88: 000a2083 lw x1,0(x20) +80002c8c: 004a0a13 addi x20,x20,4 + +80002c90 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sm4ed x12, x29, x1, 2 # perform operation +80002c90: b01e8633 sm4ed x12,x29,x1,0x2 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002c94: 000aa203 lw x4,0(x21) +80002c98: 00c20863 beq x4,x12,80002ca8 +80002c9c: 524052ef jal x5,800081c0 +80002ca0: 80002c90 .word 0x80002c90 +80002ca4: 800122f3 .word 0x800122f3 +80002ca8: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x55555555 +80002cac: 000a2b83 lw x23,0(x20) +80002cb0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x80000001 +80002cb4: 000a2703 lw x14,0(x20) +80002cb8: 004a0a13 addi x20,x20,4 + +80002cbc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sm4ed x6, x23, x14, 2 # perform operation +80002cbc: b0eb8333 sm4ed x6,x23,x14,0x2 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002cc0: 000aa203 lw x4,0(x21) +80002cc4: 00620863 beq x4,x6,80002cd4 +80002cc8: 4f8052ef jal x5,800081c0 +80002ccc: 80002cbc .word 0x80002cbc +80002cd0: 80012354 .word 0x80012354 +80002cd4: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x55555555 +80002cd8: 000a2b83 lw x23,0(x20) +80002cdc: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x7fffffff +80002ce0: 000a2c83 lw x25,0(x20) +80002ce4: 004a0a13 addi x20,x20,4 + +80002ce8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sm4ed x12, x23, x25, 3 # perform operation +80002ce8: f19b8633 sm4ed x12,x23,x25,0x3 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cec: 000aa203 lw x4,0(x21) +80002cf0: 00c20863 beq x4,x12,80002d00 +80002cf4: 4cc052ef jal x5,800081c0 +80002cf8: 80002ce8 .word 0x80002ce8 +80002cfc: 800123b5 .word 0x800123b5 +80002d00: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x55555555 +80002d04: 000a2703 lw x14,0(x20) +80002d08: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x7ffffffe +80002d0c: 000a2783 lw x15,0(x20) +80002d10: 004a0a13 addi x20,x20,4 + +80002d14 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sm4ed x11, x14, x15, 3 # perform operation +80002d14: f0f705b3 sm4ed x11,x14,x15,0x3 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d18: 000aa203 lw x4,0(x21) +80002d1c: 00b20863 beq x4,x11,80002d2c +80002d20: 4a0052ef jal x5,800081c0 +80002d24: 80002d14 .word 0x80002d14 +80002d28: 80012416 .word 0x80012416 +80002d2c: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x55555555 +80002d30: 000a2783 lw x15,0(x20) +80002d34: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xffffffff +80002d38: 000a2483 lw x9,0(x20) +80002d3c: 004a0a13 addi x20,x20,4 + +80002d40 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sm4ed x23, x15, x9, 1 # perform operation +80002d40: 70978bb3 sm4ed x23,x15,x9,0x1 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d44: 000aa203 lw x4,0(x21) +80002d48: 01720863 beq x4,x23,80002d58 +80002d4c: 474052ef jal x5,800081c0 +80002d50: 80002d40 .word 0x80002d40 +80002d54: 80012477 .word 0x80012477 +80002d58: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x55555555 +80002d5c: 000a2503 lw x10,0(x20) +80002d60: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xfffffffe +80002d64: 000a2c03 lw x24,0(x20) +80002d68: 004a0a13 addi x20,x20,4 + +80002d6c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sm4ed x22, x10, x24, 0 # perform operation +80002d6c: 31850b33 sm4ed x22,x10,x24,0x0 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d70: 000aa203 lw x4,0(x21) +80002d74: 01620863 beq x4,x22,80002d84 +80002d78: 448052ef jal x5,800081c0 +80002d7c: 80002d6c .word 0x80002d6c +80002d80: 800124d8 .word 0x800124d8 +80002d84: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x55555555 +80002d88: 000a2083 lw x1,0(x20) +80002d8c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x5bbc8872 +80002d90: 000a2383 lw x7,0(x20) +80002d94: 004a0a13 addi x20,x20,4 + +80002d98 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sm4ed x27, x1, x7, 1 # perform operation +80002d98: 70708db3 sm4ed x27,x1,x7,0x1 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002d9c: 000aa203 lw x4,0(x21) +80002da0: 01b20863 beq x4,x27,80002db0 +80002da4: 41c052ef jal x5,800081c0 +80002da8: 80002d98 .word 0x80002d98 +80002dac: 80012539 .word 0x80012539 +80002db0: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x55555555 +80002db4: 000a2603 lw x12,0(x20) +80002db8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0xaaaaaaaa +80002dbc: 000a2f03 lw x30,0(x20) +80002dc0: 004a0a13 addi x20,x20,4 + +80002dc4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sm4ed x27, x12, x30, 2 # perform operation +80002dc4: b1e60db3 sm4ed x27,x12,x30,0x2 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dc8: 000aa203 lw x4,0(x21) +80002dcc: 01b20863 beq x4,x27,80002ddc +80002dd0: 3f0052ef jal x5,800081c0 +80002dd4: 80002dc4 .word 0x80002dc4 +80002dd8: 8001259a .word 0x8001259a +80002ddc: 004a8a93 addi x21,x21,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x55555555 +80002de0: 000a2883 lw x17,0(x20) +80002de4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x55555555 +80002de8: 000a2d03 lw x26,0(x20) +80002dec: 004a0a13 addi x20,x20,4 + +80002df0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sm4ed x22, x17, x26, 1 # perform operation +80002df0: 71a88b33 sm4ed x22,x17,x26,0x1 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002df4: 000aa203 lw x4,0(x21) +80002df8: 01620863 beq x4,x22,80002e08 +80002dfc: 3c4052ef jal x5,800081c0 +80002e00: 80002df0 .word 0x80002df0 +80002e04: 800125fb .word 0x800125fb +80002e08: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0xd03ef340 +80002e0c: 000a2003 lw x0,0(x20) +80002e10: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x06e35b09 +80002e14: 000a2003 lw x0,0(x20) +80002e18: 004a0a13 addi x20,x20,4 + +80002e1c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b0: + sm4ed x27, x0, x0, 3 # perform operation +80002e1c: f0000db3 sm4ed x27,x0,x0,0x3 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b0, Zksed_sm4ed_cg_cmp_rs1_rs2_b0_str) +80002e20: 000aa203 lw x4,0(x21) +80002e24: 01b20863 beq x4,x27,80002e34 +80002e28: 398052ef jal x5,800081c0 +80002e2c: 80002e1c .word 0x80002e1c +80002e30: 8001265c .word 0x8001265c +80002e34: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xcf0e5bfa +80002e38: 000a2083 lw x1,0(x20) +80002e3c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xd392fc99 +80002e40: 000a2083 lw x1,0(x20) +80002e44: 004a0a13 addi x20,x20,4 + +80002e48 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b1: + sm4ed x22, x1, x1, 3 # perform operation +80002e48: f0108b33 sm4ed x22,x1,x1,0x3 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cmp_rs1_rs2_b1, Zksed_sm4ed_cg_cmp_rs1_rs2_b1_str) +80002e4c: 000aa203 lw x4,0(x21) +80002e50: 01620863 beq x4,x22,80002e60 +80002e54: 36c052ef jal x5,800081c0 +80002e58: 80002e48 .word 0x80002e48 +80002e5c: 80012696 .word 0x80012696 +80002e60: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xd00074a7 +80002e64: 000a2103 lw x2,0(x20) +80002e68: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xdad50ba1 +80002e6c: 000a2103 lw x2,0(x20) +80002e70: 004a0a13 addi x20,x20,4 + +80002e74 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b2: + sm4ed x30, x2, x2, 2 # perform operation +80002e74: b0210f33 sm4ed x30,x2,x2,0x2 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cmp_rs1_rs2_b2, Zksed_sm4ed_cg_cmp_rs1_rs2_b2_str) +80002e78: 000aa203 lw x4,0(x21) +80002e7c: 01e20863 beq x4,x30,80002e8c +80002e80: 340052ef jal x5,800081c0 +80002e84: 80002e74 .word 0x80002e74 +80002e88: 800126d0 .word 0x800126d0 +80002e8c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x304d4baf +80002e90: 000a2183 lw x3,0(x20) +80002e94: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x3c2d92fb +80002e98: 000a2183 lw x3,0(x20) +80002e9c: 004a0a13 addi x20,x20,4 + +80002ea0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b3: + sm4ed x27, x3, x3, 2 # perform operation +80002ea0: b0318db3 sm4ed x27,x3,x3,0x2 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b3, Zksed_sm4ed_cg_cmp_rs1_rs2_b3_str) +80002ea4: 000aa203 lw x4,0(x21) +80002ea8: 01b20863 beq x4,x27,80002eb8 +80002eac: 314052ef jal x5,800081c0 +80002eb0: 80002ea0 .word 0x80002ea0 +80002eb4: 8001270a .word 0x8001270a +80002eb8: 004a8a93 addi x21,x21,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80002ebc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80002ec0: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x9fc1ff6c +80002ec4: 000a2203 lw x4,0(x20) +80002ec8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x0f96c2ed +80002ecc: 000a2203 lw x4,0(x20) +80002ed0: 004a0a13 addi x20,x20,4 + +80002ed4 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b4: + sm4ed x29, x4, x4, 2 # perform operation +80002ed4: b0420eb3 sm4ed x29,x4,x4,0x2 + # Check if x29 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x29, Zksed_sm4ed_cg_cmp_rs1_rs2_b4, Zksed_sm4ed_cg_cmp_rs1_rs2_b4_str) +80002ed8: 000aa383 lw x7,0(x21) +80002edc: 01d38863 beq x7,x29,80002eec +80002ee0: 2f80546f jal x8,800081d8 +80002ee4: 80002ed4 .word 0x80002ed4 +80002ee8: 80012744 .word 0x80012744 +80002eec: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x277ab92f +80002ef0: 000a2283 lw x5,0(x20) +80002ef4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x1247e284 +80002ef8: 000a2283 lw x5,0(x20) +80002efc: 004a0a13 addi x20,x20,4 + +80002f00 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b5: + sm4ed x12, x5, x5, 2 # perform operation +80002f00: b0528633 sm4ed x12,x5,x5,0x2 + # Check if x12 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x12, Zksed_sm4ed_cg_cmp_rs1_rs2_b5, Zksed_sm4ed_cg_cmp_rs1_rs2_b5_str) +80002f04: 000aa383 lw x7,0(x21) +80002f08: 00c38863 beq x7,x12,80002f18 +80002f0c: 2cc0546f jal x8,800081d8 +80002f10: 80002f00 .word 0x80002f00 +80002f14: 8001277e .word 0x8001277e +80002f18: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xa35799d8 +80002f1c: 000a2303 lw x6,0(x20) +80002f20: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x5d168da2 +80002f24: 000a2303 lw x6,0(x20) +80002f28: 004a0a13 addi x20,x20,4 + +80002f2c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b6: + sm4ed x9, x6, x6, 2 # perform operation +80002f2c: b06304b3 sm4ed x9,x6,x6,0x2 + # Check if x9 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x9, Zksed_sm4ed_cg_cmp_rs1_rs2_b6, Zksed_sm4ed_cg_cmp_rs1_rs2_b6_str) +80002f30: 000aa383 lw x7,0(x21) +80002f34: 00938863 beq x7,x9,80002f44 +80002f38: 2a00546f jal x8,800081d8 +80002f3c: 80002f2c .word 0x80002f2c +80002f40: 800127b8 .word 0x800127b8 +80002f44: 004a8a93 addi x21,x21,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f48: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f4c: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xe714ca28 +80002f50: 000a2383 lw x7,0(x20) +80002f54: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xf13244a8 +80002f58: 000a2383 lw x7,0(x20) +80002f5c: 004a0a13 addi x20,x20,4 + +80002f60 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b7: + sm4ed x10, x7, x7, 0 # perform operation +80002f60: 30738533 sm4ed x10,x7,x7,0x0 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zksed_sm4ed_cg_cmp_rs1_rs2_b7, Zksed_sm4ed_cg_cmp_rs1_rs2_b7_str) +80002f64: 000aa203 lw x4,0(x21) +80002f68: 00a20863 beq x4,x10,80002f78 +80002f6c: 254052ef jal x5,800081c0 +80002f70: 80002f60 .word 0x80002f60 +80002f74: 800127f2 .word 0x800127f2 +80002f78: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0xffe1095c +80002f7c: 000a2403 lw x8,0(x20) +80002f80: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0xc8319d02 +80002f84: 000a2403 lw x8,0(x20) +80002f88: 004a0a13 addi x20,x20,4 + +80002f8c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b8: + sm4ed x15, x8, x8, 1 # perform operation +80002f8c: 708407b3 sm4ed x15,x8,x8,0x1 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cmp_rs1_rs2_b8, Zksed_sm4ed_cg_cmp_rs1_rs2_b8_str) +80002f90: 000aa203 lw x4,0(x21) +80002f94: 00f20863 beq x4,x15,80002fa4 +80002f98: 228052ef jal x5,800081c0 +80002f9c: 80002f8c .word 0x80002f8c +80002fa0: 8001282c .word 0x8001282c +80002fa4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x151f24a5 +80002fa8: 000a2483 lw x9,0(x20) +80002fac: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x493ac16d +80002fb0: 000a2483 lw x9,0(x20) +80002fb4: 004a0a13 addi x20,x20,4 + +80002fb8 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b9: + sm4ed x16, x9, x9, 0 # perform operation +80002fb8: 30948833 sm4ed x16,x9,x9,0x0 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cmp_rs1_rs2_b9, Zksed_sm4ed_cg_cmp_rs1_rs2_b9_str) +80002fbc: 000aa203 lw x4,0(x21) +80002fc0: 01020863 beq x4,x16,80002fd0 +80002fc4: 1fc052ef jal x5,800081c0 +80002fc8: 80002fb8 .word 0x80002fb8 +80002fcc: 80012866 .word 0x80012866 +80002fd0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x72653b98 +80002fd4: 000a2503 lw x10,0(x20) +80002fd8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x2b8ef9f7 +80002fdc: 000a2503 lw x10,0(x20) +80002fe0: 004a0a13 addi x20,x20,4 + +80002fe4 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b10: + sm4ed x27, x10, x10, 1 # perform operation +80002fe4: 70a50db3 sm4ed x27,x10,x10,0x1 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b10, Zksed_sm4ed_cg_cmp_rs1_rs2_b10_str) +80002fe8: 000aa203 lw x4,0(x21) +80002fec: 01b20863 beq x4,x27,80002ffc +80002ff0: 1d0052ef jal x5,800081c0 +80002ff4: 80002fe4 .word 0x80002fe4 +80002ff8: 800128a0 .word 0x800128a0 +80002ffc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x42a1605c +80003000: 000a2583 lw x11,0(x20) +80003004: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x9dbc8886 +80003008: 000a2583 lw x11,0(x20) +8000300c: 004a0a13 addi x20,x20,4 + +80003010 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b11: + sm4ed x29, x11, x11, 2 # perform operation +80003010: b0b58eb3 sm4ed x29,x11,x11,0x2 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cmp_rs1_rs2_b11, Zksed_sm4ed_cg_cmp_rs1_rs2_b11_str) +80003014: 000aa203 lw x4,0(x21) +80003018: 01d20863 beq x4,x29,80003028 +8000301c: 1a4052ef jal x5,800081c0 +80003020: 80003010 .word 0x80003010 +80003024: 800128db .word 0x800128db +80003028: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x118c4b10 +8000302c: 000a2603 lw x12,0(x20) +80003030: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xc3316be2 +80003034: 000a2603 lw x12,0(x20) +80003038: 004a0a13 addi x20,x20,4 + +8000303c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b12: + sm4ed x15, x12, x12, 2 # perform operation +8000303c: b0c607b3 sm4ed x15,x12,x12,0x2 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cmp_rs1_rs2_b12, Zksed_sm4ed_cg_cmp_rs1_rs2_b12_str) +80003040: 000aa203 lw x4,0(x21) +80003044: 00f20863 beq x4,x15,80003054 +80003048: 178052ef jal x5,800081c0 +8000304c: 8000303c .word 0x8000303c +80003050: 80012916 .word 0x80012916 +80003054: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xedb6c480 +80003058: 000a2683 lw x13,0(x20) +8000305c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x5121d8db +80003060: 000a2683 lw x13,0(x20) +80003064: 004a0a13 addi x20,x20,4 + +80003068 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b13: + sm4ed x6, x13, x13, 3 # perform operation +80003068: f0d68333 sm4ed x6,x13,x13,0x3 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cmp_rs1_rs2_b13, Zksed_sm4ed_cg_cmp_rs1_rs2_b13_str) +8000306c: 000aa203 lw x4,0(x21) +80003070: 00620863 beq x4,x6,80003080 +80003074: 14c052ef jal x5,800081c0 +80003078: 80003068 .word 0x80003068 +8000307c: 80012951 .word 0x80012951 +80003080: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x4cf85f5f +80003084: 000a2703 lw x14,0(x20) +80003088: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x243b55c4 +8000308c: 000a2703 lw x14,0(x20) +80003090: 004a0a13 addi x20,x20,4 + +80003094 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b14: + sm4ed x26, x14, x14, 1 # perform operation +80003094: 70e70d33 sm4ed x26,x14,x14,0x1 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cmp_rs1_rs2_b14, Zksed_sm4ed_cg_cmp_rs1_rs2_b14_str) +80003098: 000aa203 lw x4,0(x21) +8000309c: 01a20863 beq x4,x26,800030ac +800030a0: 120052ef jal x5,800081c0 +800030a4: 80003094 .word 0x80003094 +800030a8: 8001298c .word 0x8001298c +800030ac: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x39225721 +800030b0: 000a2783 lw x15,0(x20) +800030b4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x9803e80d +800030b8: 000a2783 lw x15,0(x20) +800030bc: 004a0a13 addi x20,x20,4 + +800030c0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b15: + sm4ed x3, x15, x15, 3 # perform operation +800030c0: f0f781b3 sm4ed x3,x15,x15,0x3 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cmp_rs1_rs2_b15, Zksed_sm4ed_cg_cmp_rs1_rs2_b15_str) +800030c4: 000aa203 lw x4,0(x21) +800030c8: 00320863 beq x4,x3,800030d8 +800030cc: 0f4052ef jal x5,800081c0 +800030d0: 800030c0 .word 0x800030c0 +800030d4: 800129c7 .word 0x800129c7 +800030d8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xb6145722 +800030dc: 000a2803 lw x16,0(x20) +800030e0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xdd4859dc +800030e4: 000a2803 lw x16,0(x20) +800030e8: 004a0a13 addi x20,x20,4 + +800030ec : +Zksed_sm4ed_cg_cmp_rs1_rs2_b16: + sm4ed x1, x16, x16, 3 # perform operation +800030ec: f10800b3 sm4ed x1,x16,x16,0x3 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cmp_rs1_rs2_b16, Zksed_sm4ed_cg_cmp_rs1_rs2_b16_str) +800030f0: 000aa203 lw x4,0(x21) +800030f4: 00120863 beq x4,x1,80003104 +800030f8: 0c8052ef jal x5,800081c0 +800030fc: 800030ec .word 0x800030ec +80003100: 80012a02 .word 0x80012a02 +80003104: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x4625c9ba +80003108: 000a2883 lw x17,0(x20) +8000310c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x7a631fba +80003110: 000a2883 lw x17,0(x20) +80003114: 004a0a13 addi x20,x20,4 + +80003118 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b17: + sm4ed x22, x17, x17, 2 # perform operation +80003118: b1188b33 sm4ed x22,x17,x17,0x2 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zksed_sm4ed_cg_cmp_rs1_rs2_b17, Zksed_sm4ed_cg_cmp_rs1_rs2_b17_str) +8000311c: 000aa203 lw x4,0(x21) +80003120: 01620863 beq x4,x22,80003130 +80003124: 09c052ef jal x5,800081c0 +80003128: 80003118 .word 0x80003118 +8000312c: 80012a3d .word 0x80012a3d +80003130: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x41556678 +80003134: 000a2903 lw x18,0(x20) +80003138: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xc9f035fc +8000313c: 000a2903 lw x18,0(x20) +80003140: 004a0a13 addi x20,x20,4 + +80003144 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b18: + sm4ed x27, x18, x18, 2 # perform operation +80003144: b1290db3 sm4ed x27,x18,x18,0x2 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b18, Zksed_sm4ed_cg_cmp_rs1_rs2_b18_str) +80003148: 000aa203 lw x4,0(x21) +8000314c: 01b20863 beq x4,x27,8000315c +80003150: 070052ef jal x5,800081c0 +80003154: 80003144 .word 0x80003144 +80003158: 80012a78 .word 0x80012a78 +8000315c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xe78eb3e6 +80003160: 000a2983 lw x19,0(x20) +80003164: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x538bf8bb +80003168: 000a2983 lw x19,0(x20) +8000316c: 004a0a13 addi x20,x20,4 + +80003170 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b19: + sm4ed x6, x19, x19, 1 # perform operation +80003170: 71398333 sm4ed x6,x19,x19,0x1 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cmp_rs1_rs2_b19, Zksed_sm4ed_cg_cmp_rs1_rs2_b19_str) +80003174: 000aa203 lw x4,0(x21) +80003178: 00620863 beq x4,x6,80003188 +8000317c: 044052ef jal x5,800081c0 +80003180: 80003170 .word 0x80003170 +80003184: 80012ab3 .word 0x80012ab3 +80003188: 004a8a93 addi x21,x21,4 + + mv x23, x20 # switch data pointer register to avoid conflict with test +8000318c: 000a0b93 addi x23,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x9ad40994 +80003190: 000baa03 lw x20,0(x23) +80003194: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x793b91d3 +80003198: 000baa03 lw x20,0(x23) +8000319c: 004b8b93 addi x23,x23,4 + +800031a0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b20: + sm4ed x6, x20, x20, 3 # perform operation +800031a0: f14a0333 sm4ed x6,x20,x20,0x3 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zksed_sm4ed_cg_cmp_rs1_rs2_b20, Zksed_sm4ed_cg_cmp_rs1_rs2_b20_str) +800031a4: 000aa203 lw x4,0(x21) +800031a8: 00620863 beq x4,x6,800031b8 +800031ac: 014052ef jal x5,800081c0 +800031b0: 800031a0 .word 0x800031a0 +800031b4: 80012aee .word 0x80012aee +800031b8: 004a8a93 addi x21,x21,4 + + mv x3, x21 # switch signature pointer register to avoid conflict with test +800031bc: 000a8193 addi x3,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xd6da8d21 +800031c0: 000baa83 lw x21,0(x23) +800031c4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x50b335e7 +800031c8: 000baa83 lw x21,0(x23) +800031cc: 004b8b93 addi x23,x23,4 + +800031d0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b21: + sm4ed x22, x21, x21, 2 # perform operation +800031d0: b15a8b33 sm4ed x22,x21,x21,0x2 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zksed_sm4ed_cg_cmp_rs1_rs2_b21, Zksed_sm4ed_cg_cmp_rs1_rs2_b21_str) +800031d4: 0001a203 lw x4,0(x3) +800031d8: 01620863 beq x4,x22,800031e8 +800031dc: 7e5042ef jal x5,800081c0 +800031e0: 800031d0 .word 0x800031d0 +800031e4: 80012b29 .word 0x80012b29 +800031e8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x62529962 +800031ec: 000bab03 lw x22,0(x23) +800031f0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x61c4ae47 +800031f4: 000bab03 lw x22,0(x23) +800031f8: 004b8b93 addi x23,x23,4 + +800031fc : +Zksed_sm4ed_cg_cmp_rs1_rs2_b22: + sm4ed x16, x22, x22, 3 # perform operation +800031fc: f16b0833 sm4ed x16,x22,x22,0x3 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zksed_sm4ed_cg_cmp_rs1_rs2_b22, Zksed_sm4ed_cg_cmp_rs1_rs2_b22_str) +80003200: 0001a203 lw x4,0(x3) +80003204: 01020863 beq x4,x16,80003214 +80003208: 7b9042ef jal x5,800081c0 +8000320c: 800031fc .word 0x800031fc +80003210: 80012b64 .word 0x80012b64 +80003214: 00418193 addi x3,x3,4 + + mv x6, x23 # switch data pointer register to avoid conflict with test +80003218: 000b8313 addi x6,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xb9bc8736 +8000321c: 00032b83 lw x23,0(x6) +80003220: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xbe19f38f +80003224: 00032b83 lw x23,0(x6) +80003228: 00430313 addi x6,x6,4 + +8000322c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b23: + sm4ed x0, x23, x23, 3 # perform operation +8000322c: f17b8033 sm4ed x0,x23,x23,0x3 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zksed_sm4ed_cg_cmp_rs1_rs2_b23, Zksed_sm4ed_cg_cmp_rs1_rs2_b23_str) +80003230: 0001a203 lw x4,0(x3) +80003234: 00020863 beq x4,x0,80003244 +80003238: 789042ef jal x5,800081c0 +8000323c: 8000322c .word 0x8000322c +80003240: 80012b9f .word 0x80012b9f +80003244: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x933d1cb0 +80003248: 00032c03 lw x24,0(x6) +8000324c: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x99c129f9 +80003250: 00032c03 lw x24,0(x6) +80003254: 00430313 addi x6,x6,4 + +80003258 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b24: + sm4ed x15, x24, x24, 2 # perform operation +80003258: b18c07b3 sm4ed x15,x24,x24,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zksed_sm4ed_cg_cmp_rs1_rs2_b24, Zksed_sm4ed_cg_cmp_rs1_rs2_b24_str) +8000325c: 0001a203 lw x4,0(x3) +80003260: 00f20863 beq x4,x15,80003270 +80003264: 75d042ef jal x5,800081c0 +80003268: 80003258 .word 0x80003258 +8000326c: 80012bda .word 0x80012bda +80003270: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x80c138a7 +80003274: 00032c83 lw x25,0(x6) +80003278: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7559823c +8000327c: 00032c83 lw x25,0(x6) +80003280: 00430313 addi x6,x6,4 + +80003284 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b25: + sm4ed x10, x25, x25, 0 # perform operation +80003284: 319c8533 sm4ed x10,x25,x25,0x0 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zksed_sm4ed_cg_cmp_rs1_rs2_b25, Zksed_sm4ed_cg_cmp_rs1_rs2_b25_str) +80003288: 0001a203 lw x4,0(x3) +8000328c: 00a20863 beq x4,x10,8000329c +80003290: 731042ef jal x5,800081c0 +80003294: 80003284 .word 0x80003284 +80003298: 80012c15 .word 0x80012c15 +8000329c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x10197523 +800032a0: 00032d03 lw x26,0(x6) +800032a4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8136af8b +800032a8: 00032d03 lw x26,0(x6) +800032ac: 00430313 addi x6,x6,4 + +800032b0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b26: + sm4ed x20, x26, x26, 1 # perform operation +800032b0: 71ad0a33 sm4ed x20,x26,x26,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zksed_sm4ed_cg_cmp_rs1_rs2_b26, Zksed_sm4ed_cg_cmp_rs1_rs2_b26_str) +800032b4: 0001a203 lw x4,0(x3) +800032b8: 01420863 beq x4,x20,800032c8 +800032bc: 705042ef jal x5,800081c0 +800032c0: 800032b0 .word 0x800032b0 +800032c4: 80012c50 .word 0x80012c50 +800032c8: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xe8d7262c +800032cc: 00032d83 lw x27,0(x6) +800032d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xfc7dd270 +800032d4: 00032d83 lw x27,0(x6) +800032d8: 00430313 addi x6,x6,4 + +800032dc : +Zksed_sm4ed_cg_cmp_rs1_rs2_b27: + sm4ed x12, x27, x27, 2 # perform operation +800032dc: b1bd8633 sm4ed x12,x27,x27,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zksed_sm4ed_cg_cmp_rs1_rs2_b27, Zksed_sm4ed_cg_cmp_rs1_rs2_b27_str) +800032e0: 0001a203 lw x4,0(x3) +800032e4: 00c20863 beq x4,x12,800032f4 +800032e8: 6d9042ef jal x5,800081c0 +800032ec: 800032dc .word 0x800032dc +800032f0: 80012c8b .word 0x80012c8b +800032f4: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x981625a7 +800032f8: 00032e03 lw x28,0(x6) +800032fc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xeecaa705 +80003300: 00032e03 lw x28,0(x6) +80003304: 00430313 addi x6,x6,4 + +80003308 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b28: + sm4ed x30, x28, x28, 0 # perform operation +80003308: 31ce0f33 sm4ed x30,x28,x28,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zksed_sm4ed_cg_cmp_rs1_rs2_b28, Zksed_sm4ed_cg_cmp_rs1_rs2_b28_str) +8000330c: 0001a203 lw x4,0(x3) +80003310: 01e20863 beq x4,x30,80003320 +80003314: 6ad042ef jal x5,800081c0 +80003318: 80003308 .word 0x80003308 +8000331c: 80012cc6 .word 0x80012cc6 +80003320: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xa98fe40a +80003324: 00032e83 lw x29,0(x6) +80003328: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x356ef2e8 +8000332c: 00032e83 lw x29,0(x6) +80003330: 00430313 addi x6,x6,4 + +80003334 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b29: + sm4ed x8, x29, x29, 0 # perform operation +80003334: 31de8433 sm4ed x8,x29,x29,0x0 + # Check if x8 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x8, Zksed_sm4ed_cg_cmp_rs1_rs2_b29, Zksed_sm4ed_cg_cmp_rs1_rs2_b29_str) +80003338: 0001a203 lw x4,0(x3) +8000333c: 00820863 beq x4,x8,8000334c +80003340: 681042ef jal x5,800081c0 +80003344: 80003334 .word 0x80003334 +80003348: 80012d01 .word 0x80012d01 +8000334c: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7e078001 +80003350: 00032f03 lw x30,0(x6) +80003354: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xc41a16a4 +80003358: 00032f03 lw x30,0(x6) +8000335c: 00430313 addi x6,x6,4 + +80003360 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b30: + sm4ed x10, x30, x30, 3 # perform operation +80003360: f1ef0533 sm4ed x10,x30,x30,0x3 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zksed_sm4ed_cg_cmp_rs1_rs2_b30, Zksed_sm4ed_cg_cmp_rs1_rs2_b30_str) +80003364: 0001a203 lw x4,0(x3) +80003368: 00a20863 beq x4,x10,80003378 +8000336c: 655042ef jal x5,800081c0 +80003370: 80003360 .word 0x80003360 +80003374: 80012d3c .word 0x80012d3c +80003378: 00418193 addi x3,x3,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xffac54c3 +8000337c: 00032f83 lw x31,0(x6) +80003380: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xbc2a3746 +80003384: 00032f83 lw x31,0(x6) +80003388: 00430313 addi x6,x6,4 + +8000338c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b31: + sm4ed x14, x31, x31, 1 # perform operation +8000338c: 71ff8733 sm4ed x14,x31,x31,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zksed_sm4ed_cg_cmp_rs1_rs2_b31, Zksed_sm4ed_cg_cmp_rs1_rs2_b31_str) +80003390: 0001a203 lw x4,0(x3) +80003394: 00e20863 beq x4,x14,800033a4 +80003398: 629042ef jal x5,800081c0 +8000339c: 8000338c .word 0x8000338c +800033a0: 80012d77 .word 0x80012d77 +800033a4: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x3779d156 +800033a8: 00032003 lw x0,0(x6) +800033ac: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x3de851dd +800033b0: 00032783 lw x15,0(x6) +800033b4: 00430313 addi x6,x6,4 + +800033b8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b0: + sm4ed x0, x0, x15, 1 # perform operation +800033b8: 70f00033 sm4ed x0,x0,x15,0x1 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zksed_sm4ed_cg_cmp_rd_rs1_b0, Zksed_sm4ed_cg_cmp_rd_rs1_b0_str) +800033bc: 0001a203 lw x4,0(x3) +800033c0: 00020863 beq x4,x0,800033d0 +800033c4: 5fd042ef jal x5,800081c0 +800033c8: 800033b8 .word 0x800033b8 +800033cc: 80012db2 .word 0x80012db2 +800033d0: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xa7c6c457 +800033d4: 00032083 lw x1,0(x6) +800033d8: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x7894a9a3 +800033dc: 00032483 lw x9,0(x6) +800033e0: 00430313 addi x6,x6,4 + +800033e4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b1: + sm4ed x1, x1, x9, 1 # perform operation +800033e4: 709080b3 sm4ed x1,x1,x9,0x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zksed_sm4ed_cg_cmp_rd_rs1_b1, Zksed_sm4ed_cg_cmp_rd_rs1_b1_str) +800033e8: 0001a203 lw x4,0(x3) +800033ec: 00120863 beq x4,x1,800033fc +800033f0: 5d1042ef jal x5,800081c0 +800033f4: 800033e4 .word 0x800033e4 +800033f8: 80012deb .word 0x80012deb +800033fc: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xaf980a87 +80003400: 00032103 lw x2,0(x6) +80003404: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x058caf13 +80003408: 00032083 lw x1,0(x6) +8000340c: 00430313 addi x6,x6,4 + +80003410 : +Zksed_sm4ed_cg_cmp_rd_rs1_b2: + sm4ed x2, x2, x1, 2 # perform operation +80003410: b0110133 sm4ed x2,x2,x1,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zksed_sm4ed_cg_cmp_rd_rs1_b2, Zksed_sm4ed_cg_cmp_rd_rs1_b2_str) +80003414: 0001a203 lw x4,0(x3) +80003418: 00220863 beq x4,x2,80003428 +8000341c: 5a5042ef jal x5,800081c0 +80003420: 80003410 .word 0x80003410 +80003424: 80012e24 .word 0x80012e24 +80003428: 00418193 addi x3,x3,4 + + mv x2, x3 # switch signature pointer register to avoid conflict with test +8000342c: 00018113 addi x2,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xaf2acdba +80003430: 00032183 lw x3,0(x6) +80003434: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xd41b8f78 +80003438: 00032783 lw x15,0(x6) +8000343c: 00430313 addi x6,x6,4 + +80003440 : +Zksed_sm4ed_cg_cmp_rd_rs1_b3: + sm4ed x3, x3, x15, 2 # perform operation +80003440: b0f181b3 sm4ed x3,x3,x15,0x2 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ed_cg_cmp_rd_rs1_b3, Zksed_sm4ed_cg_cmp_rd_rs1_b3_str) +80003444: 00012203 lw x4,0(x2) +80003448: 00320863 beq x4,x3,80003458 +8000344c: 575042ef jal x5,800081c0 +80003450: 80003440 .word 0x80003440 +80003454: 80012e5d .word 0x80012e5d +80003458: 00410113 addi x2,x2,4 + + mv x13, x4 # switch temp register to avoid conflict with test +8000345c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003460: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x63e279a6 +80003464: 00032203 lw x4,0(x6) +80003468: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xd4608abf +8000346c: 00032d83 lw x27,0(x6) +80003470: 00430313 addi x6,x6,4 + +80003474 : +Zksed_sm4ed_cg_cmp_rd_rs1_b4: + sm4ed x4, x4, x27, 3 # perform operation +80003474: f1b20233 sm4ed x4,x4,x27,0x3 + # Check if x4 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x4, Zksed_sm4ed_cg_cmp_rd_rs1_b4, Zksed_sm4ed_cg_cmp_rd_rs1_b4_str) +80003478: 00012683 lw x13,0(x2) +8000347c: 00468863 beq x13,x4,8000348c +80003480: 5810476f jal x14,80008200 +80003484: 80003474 .word 0x80003474 +80003488: 80012e96 .word 0x80012e96 +8000348c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xad756863 +80003490: 00032283 lw x5,0(x6) +80003494: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xf89f8fcd +80003498: 00032b83 lw x23,0(x6) +8000349c: 00430313 addi x6,x6,4 + +800034a0 : +Zksed_sm4ed_cg_cmp_rd_rs1_b5: + sm4ed x5, x5, x23, 1 # perform operation +800034a0: 717282b3 sm4ed x5,x5,x23,0x1 + # Check if x5 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x5, Zksed_sm4ed_cg_cmp_rd_rs1_b5, Zksed_sm4ed_cg_cmp_rd_rs1_b5_str) +800034a4: 00012683 lw x13,0(x2) +800034a8: 00568863 beq x13,x5,800034b8 +800034ac: 5550476f jal x14,80008200 +800034b0: 800034a0 .word 0x800034a0 +800034b4: 80012ecf .word 0x80012ecf +800034b8: 00410113 addi x2,x2,4 + + mv x23, x6 # switch data pointer register to avoid conflict with test +800034bc: 00030b93 addi x23,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x357b3c94 +800034c0: 000ba303 lw x6,0(x23) +800034c4: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x3e3f48fd +800034c8: 000bad83 lw x27,0(x23) +800034cc: 004b8b93 addi x23,x23,4 + +800034d0 : +Zksed_sm4ed_cg_cmp_rd_rs1_b6: + sm4ed x6, x6, x27, 2 # perform operation +800034d0: b1b30333 sm4ed x6,x6,x27,0x2 + # Check if x6 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x6, Zksed_sm4ed_cg_cmp_rd_rs1_b6, Zksed_sm4ed_cg_cmp_rd_rs1_b6_str) +800034d4: 00012683 lw x13,0(x2) +800034d8: 00668863 beq x13,x6,800034e8 +800034dc: 5250476f jal x14,80008200 +800034e0: 800034d0 .word 0x800034d0 +800034e4: 80012f08 .word 0x80012f08 +800034e8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x04062215 +800034ec: 000ba383 lw x7,0(x23) +800034f0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xf851e5b7 +800034f4: 000ba483 lw x9,0(x23) +800034f8: 004b8b93 addi x23,x23,4 + +800034fc : +Zksed_sm4ed_cg_cmp_rd_rs1_b7: + sm4ed x7, x7, x9, 2 # perform operation +800034fc: b09383b3 sm4ed x7,x7,x9,0x2 + # Check if x7 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x7, Zksed_sm4ed_cg_cmp_rd_rs1_b7, Zksed_sm4ed_cg_cmp_rd_rs1_b7_str) +80003500: 00012683 lw x13,0(x2) +80003504: 00768863 beq x13,x7,80003514 +80003508: 4f90476f jal x14,80008200 +8000350c: 800034fc .word 0x800034fc +80003510: 80012f41 .word 0x80012f41 +80003514: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x4db0bc29 +80003518: 000ba403 lw x8,0(x23) +8000351c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xde94b7a0 +80003520: 000bae03 lw x28,0(x23) +80003524: 004b8b93 addi x23,x23,4 + +80003528 : +Zksed_sm4ed_cg_cmp_rd_rs1_b8: + sm4ed x8, x8, x28, 2 # perform operation +80003528: b1c40433 sm4ed x8,x8,x28,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x8, Zksed_sm4ed_cg_cmp_rd_rs1_b8, Zksed_sm4ed_cg_cmp_rd_rs1_b8_str) +8000352c: 00012683 lw x13,0(x2) +80003530: 00868863 beq x13,x8,80003540 +80003534: 4cd0476f jal x14,80008200 +80003538: 80003528 .word 0x80003528 +8000353c: 80012f7a .word 0x80012f7a +80003540: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x8684104e +80003544: 000ba483 lw x9,0(x23) +80003548: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xeacf8a6b +8000354c: 000bad03 lw x26,0(x23) +80003550: 004b8b93 addi x23,x23,4 + +80003554 : +Zksed_sm4ed_cg_cmp_rd_rs1_b9: + sm4ed x9, x9, x26, 2 # perform operation +80003554: b1a484b3 sm4ed x9,x9,x26,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x9, Zksed_sm4ed_cg_cmp_rd_rs1_b9, Zksed_sm4ed_cg_cmp_rd_rs1_b9_str) +80003558: 00012683 lw x13,0(x2) +8000355c: 00968863 beq x13,x9,8000356c +80003560: 4a10476f jal x14,80008200 +80003564: 80003554 .word 0x80003554 +80003568: 80012fb3 .word 0x80012fb3 +8000356c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x10c1cbee +80003570: 000ba503 lw x10,0(x23) +80003574: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x6267dc08 +80003578: 000ba983 lw x19,0(x23) +8000357c: 004b8b93 addi x23,x23,4 + +80003580 : +Zksed_sm4ed_cg_cmp_rd_rs1_b10: + sm4ed x10, x10, x19, 0 # perform operation +80003580: 31350533 sm4ed x10,x10,x19,0x0 + # Check if x10 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x10, Zksed_sm4ed_cg_cmp_rd_rs1_b10, Zksed_sm4ed_cg_cmp_rd_rs1_b10_str) +80003584: 00012683 lw x13,0(x2) +80003588: 00a68863 beq x13,x10,80003598 +8000358c: 4750476f jal x14,80008200 +80003590: 80003580 .word 0x80003580 +80003594: 80012fec .word 0x80012fec +80003598: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x01445a1c +8000359c: 000ba583 lw x11,0(x23) +800035a0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x051f4cd7 +800035a4: 000ba283 lw x5,0(x23) +800035a8: 004b8b93 addi x23,x23,4 + +800035ac : +Zksed_sm4ed_cg_cmp_rd_rs1_b11: + sm4ed x11, x11, x5, 3 # perform operation +800035ac: f05585b3 sm4ed x11,x11,x5,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x11, Zksed_sm4ed_cg_cmp_rd_rs1_b11, Zksed_sm4ed_cg_cmp_rd_rs1_b11_str) +800035b0: 00012683 lw x13,0(x2) +800035b4: 00b68863 beq x13,x11,800035c4 +800035b8: 4490476f jal x14,80008200 +800035bc: 800035ac .word 0x800035ac +800035c0: 80013026 .word 0x80013026 +800035c4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xcb96098e +800035c8: 000ba603 lw x12,0(x23) +800035cc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x648ae8a1 +800035d0: 000ba503 lw x10,0(x23) +800035d4: 004b8b93 addi x23,x23,4 + +800035d8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b12: + sm4ed x12, x12, x10, 2 # perform operation +800035d8: b0a60633 sm4ed x12,x12,x10,0x2 + # Check if x12 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x12, Zksed_sm4ed_cg_cmp_rd_rs1_b12, Zksed_sm4ed_cg_cmp_rd_rs1_b12_str) +800035dc: 00012683 lw x13,0(x2) +800035e0: 00c68863 beq x13,x12,800035f0 +800035e4: 41d0476f jal x14,80008200 +800035e8: 800035d8 .word 0x800035d8 +800035ec: 80013060 .word 0x80013060 +800035f0: 00410113 addi x2,x2,4 + + mv x7, x13 # switch temp register to avoid conflict with test +800035f4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +800035f8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x797424b3 +800035fc: 000ba683 lw x13,0(x23) +80003600: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xabfc0587 +80003604: 000ba503 lw x10,0(x23) +80003608: 004b8b93 addi x23,x23,4 + +8000360c : +Zksed_sm4ed_cg_cmp_rd_rs1_b13: + sm4ed x13, x13, x10, 1 # perform operation +8000360c: 70a686b3 sm4ed x13,x13,x10,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zksed_sm4ed_cg_cmp_rd_rs1_b13, Zksed_sm4ed_cg_cmp_rd_rs1_b13_str) +80003610: 00012383 lw x7,0(x2) +80003614: 00d38863 beq x7,x13,80003624 +80003618: 3c10446f jal x8,800081d8 +8000361c: 8000360c .word 0x8000360c +80003620: 8001309a .word 0x8001309a +80003624: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xfc7136e8 +80003628: 000ba703 lw x14,0(x23) +8000362c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x82406d3a +80003630: 000ba783 lw x15,0(x23) +80003634: 004b8b93 addi x23,x23,4 + +80003638 : +Zksed_sm4ed_cg_cmp_rd_rs1_b14: + sm4ed x14, x14, x15, 0 # perform operation +80003638: 30f70733 sm4ed x14,x14,x15,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zksed_sm4ed_cg_cmp_rd_rs1_b14, Zksed_sm4ed_cg_cmp_rd_rs1_b14_str) +8000363c: 00012383 lw x7,0(x2) +80003640: 00e38863 beq x7,x14,80003650 +80003644: 3950446f jal x8,800081d8 +80003648: 80003638 .word 0x80003638 +8000364c: 800130d4 .word 0x800130d4 +80003650: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xf9b5fed7 +80003654: 000ba783 lw x15,0(x23) +80003658: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xc9869a22 +8000365c: 000ba603 lw x12,0(x23) +80003660: 004b8b93 addi x23,x23,4 + +80003664 : +Zksed_sm4ed_cg_cmp_rd_rs1_b15: + sm4ed x15, x15, x12, 0 # perform operation +80003664: 30c787b3 sm4ed x15,x15,x12,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zksed_sm4ed_cg_cmp_rd_rs1_b15, Zksed_sm4ed_cg_cmp_rd_rs1_b15_str) +80003668: 00012383 lw x7,0(x2) +8000366c: 00f38863 beq x7,x15,8000367c +80003670: 3690446f jal x8,800081d8 +80003674: 80003664 .word 0x80003664 +80003678: 8001310e .word 0x8001310e +8000367c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xf68bf187 +80003680: 000ba803 lw x16,0(x23) +80003684: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x13d8e9b1 +80003688: 000baf83 lw x31,0(x23) +8000368c: 004b8b93 addi x23,x23,4 + +80003690 : +Zksed_sm4ed_cg_cmp_rd_rs1_b16: + sm4ed x16, x16, x31, 1 # perform operation +80003690: 71f80833 sm4ed x16,x16,x31,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zksed_sm4ed_cg_cmp_rd_rs1_b16, Zksed_sm4ed_cg_cmp_rd_rs1_b16_str) +80003694: 00012383 lw x7,0(x2) +80003698: 01038863 beq x7,x16,800036a8 +8000369c: 33d0446f jal x8,800081d8 +800036a0: 80003690 .word 0x80003690 +800036a4: 80013148 .word 0x80013148 +800036a8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xa439ad69 +800036ac: 000ba883 lw x17,0(x23) +800036b0: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x26a45dc2 +800036b4: 000ba803 lw x16,0(x23) +800036b8: 004b8b93 addi x23,x23,4 + +800036bc : +Zksed_sm4ed_cg_cmp_rd_rs1_b17: + sm4ed x17, x17, x16, 0 # perform operation +800036bc: 310888b3 sm4ed x17,x17,x16,0x0 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zksed_sm4ed_cg_cmp_rd_rs1_b17, Zksed_sm4ed_cg_cmp_rd_rs1_b17_str) +800036c0: 00012383 lw x7,0(x2) +800036c4: 01138863 beq x7,x17,800036d4 +800036c8: 3110446f jal x8,800081d8 +800036cc: 800036bc .word 0x800036bc +800036d0: 80013182 .word 0x80013182 +800036d4: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x319a7e05 +800036d8: 000ba903 lw x18,0(x23) +800036dc: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x7ab466cc +800036e0: 000bac83 lw x25,0(x23) +800036e4: 004b8b93 addi x23,x23,4 + +800036e8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b18: + sm4ed x18, x18, x25, 2 # perform operation +800036e8: b1990933 sm4ed x18,x18,x25,0x2 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zksed_sm4ed_cg_cmp_rd_rs1_b18, Zksed_sm4ed_cg_cmp_rd_rs1_b18_str) +800036ec: 00012383 lw x7,0(x2) +800036f0: 01238863 beq x7,x18,80003700 +800036f4: 2e50446f jal x8,800081d8 +800036f8: 800036e8 .word 0x800036e8 +800036fc: 800131bc .word 0x800131bc +80003700: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xfe0d8157 +80003704: 000ba983 lw x19,0(x23) +80003708: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xeb304f59 +8000370c: 000bad03 lw x26,0(x23) +80003710: 004b8b93 addi x23,x23,4 + +80003714 : +Zksed_sm4ed_cg_cmp_rd_rs1_b19: + sm4ed x19, x19, x26, 2 # perform operation +80003714: b1a989b3 sm4ed x19,x19,x26,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zksed_sm4ed_cg_cmp_rd_rs1_b19, Zksed_sm4ed_cg_cmp_rd_rs1_b19_str) +80003718: 00012383 lw x7,0(x2) +8000371c: 01338863 beq x7,x19,8000372c +80003720: 2b90446f jal x8,800081d8 +80003724: 80003714 .word 0x80003714 +80003728: 800131f6 .word 0x800131f6 +8000372c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x24c902c6 +80003730: 000baa03 lw x20,0(x23) +80003734: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x680def6b +80003738: 000ba183 lw x3,0(x23) +8000373c: 004b8b93 addi x23,x23,4 + +80003740 : +Zksed_sm4ed_cg_cmp_rd_rs1_b20: + sm4ed x20, x20, x3, 2 # perform operation +80003740: b03a0a33 sm4ed x20,x20,x3,0x2 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zksed_sm4ed_cg_cmp_rd_rs1_b20, Zksed_sm4ed_cg_cmp_rd_rs1_b20_str) +80003744: 00012383 lw x7,0(x2) +80003748: 01438863 beq x7,x20,80003758 +8000374c: 28d0446f jal x8,800081d8 +80003750: 80003740 .word 0x80003740 +80003754: 80013230 .word 0x80013230 +80003758: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xbbd733d8 +8000375c: 000baa83 lw x21,0(x23) +80003760: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xf8a6f974 +80003764: 000bae03 lw x28,0(x23) +80003768: 004b8b93 addi x23,x23,4 + +8000376c : +Zksed_sm4ed_cg_cmp_rd_rs1_b21: + sm4ed x21, x21, x28, 0 # perform operation +8000376c: 31ca8ab3 sm4ed x21,x21,x28,0x0 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zksed_sm4ed_cg_cmp_rd_rs1_b21, Zksed_sm4ed_cg_cmp_rd_rs1_b21_str) +80003770: 00012383 lw x7,0(x2) +80003774: 01538863 beq x7,x21,80003784 +80003778: 2610446f jal x8,800081d8 +8000377c: 8000376c .word 0x8000376c +80003780: 8001326a .word 0x8001326a +80003784: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xf2f35c4a +80003788: 000bab03 lw x22,0(x23) +8000378c: 004b8b93 addi x23,x23,4 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x5519a398 +80003790: 000bac83 lw x25,0(x23) +80003794: 004b8b93 addi x23,x23,4 + +80003798 : +Zksed_sm4ed_cg_cmp_rd_rs1_b22: + sm4ed x22, x22, x25, 3 # perform operation +80003798: f19b0b33 sm4ed x22,x22,x25,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zksed_sm4ed_cg_cmp_rd_rs1_b22, Zksed_sm4ed_cg_cmp_rd_rs1_b22_str) +8000379c: 00012383 lw x7,0(x2) +800037a0: 01638863 beq x7,x22,800037b0 +800037a4: 2350446f jal x8,800081d8 +800037a8: 80003798 .word 0x80003798 +800037ac: 800132a4 .word 0x800132a4 +800037b0: 00410113 addi x2,x2,4 + + mv x10, x23 # switch data pointer register to avoid conflict with test +800037b4: 000b8513 addi x10,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xc3eca5d1 +800037b8: 00052b83 lw x23,0(x10) +800037bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xa1a7ad0b +800037c0: 00052f83 lw x31,0(x10) +800037c4: 00450513 addi x10,x10,4 + +800037c8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b23: + sm4ed x23, x23, x31, 2 # perform operation +800037c8: b1fb8bb3 sm4ed x23,x23,x31,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zksed_sm4ed_cg_cmp_rd_rs1_b23, Zksed_sm4ed_cg_cmp_rd_rs1_b23_str) +800037cc: 00012383 lw x7,0(x2) +800037d0: 01738863 beq x7,x23,800037e0 +800037d4: 2050446f jal x8,800081d8 +800037d8: 800037c8 .word 0x800037c8 +800037dc: 800132de .word 0x800132de +800037e0: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xcfcd4c0d +800037e4: 00052c03 lw x24,0(x10) +800037e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xe467aa63 +800037ec: 00052e03 lw x28,0(x10) +800037f0: 00450513 addi x10,x10,4 + +800037f4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b24: + sm4ed x24, x24, x28, 1 # perform operation +800037f4: 71cc0c33 sm4ed x24,x24,x28,0x1 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zksed_sm4ed_cg_cmp_rd_rs1_b24, Zksed_sm4ed_cg_cmp_rd_rs1_b24_str) +800037f8: 00012383 lw x7,0(x2) +800037fc: 01838863 beq x7,x24,8000380c +80003800: 1d90446f jal x8,800081d8 +80003804: 800037f4 .word 0x800037f4 +80003808: 80013318 .word 0x80013318 +8000380c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x87f73568 +80003810: 00052c83 lw x25,0(x10) +80003814: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xcb1a8e28 +80003818: 00052683 lw x13,0(x10) +8000381c: 00450513 addi x10,x10,4 + +80003820 : +Zksed_sm4ed_cg_cmp_rd_rs1_b25: + sm4ed x25, x25, x13, 1 # perform operation +80003820: 70dc8cb3 sm4ed x25,x25,x13,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zksed_sm4ed_cg_cmp_rd_rs1_b25, Zksed_sm4ed_cg_cmp_rd_rs1_b25_str) +80003824: 00012383 lw x7,0(x2) +80003828: 01938863 beq x7,x25,80003838 +8000382c: 1ad0446f jal x8,800081d8 +80003830: 80003820 .word 0x80003820 +80003834: 80013352 .word 0x80013352 +80003838: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xeca3696a +8000383c: 00052d03 lw x26,0(x10) +80003840: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x912af7d3 +80003844: 00052783 lw x15,0(x10) +80003848: 00450513 addi x10,x10,4 + +8000384c : +Zksed_sm4ed_cg_cmp_rd_rs1_b26: + sm4ed x26, x26, x15, 0 # perform operation +8000384c: 30fd0d33 sm4ed x26,x26,x15,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zksed_sm4ed_cg_cmp_rd_rs1_b26, Zksed_sm4ed_cg_cmp_rd_rs1_b26_str) +80003850: 00012383 lw x7,0(x2) +80003854: 01a38863 beq x7,x26,80003864 +80003858: 1810446f jal x8,800081d8 +8000385c: 8000384c .word 0x8000384c +80003860: 8001338c .word 0x8001338c +80003864: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xff15d43f +80003868: 00052d83 lw x27,0(x10) +8000386c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5837228b +80003870: 00052683 lw x13,0(x10) +80003874: 00450513 addi x10,x10,4 + +80003878 : +Zksed_sm4ed_cg_cmp_rd_rs1_b27: + sm4ed x27, x27, x13, 0 # perform operation +80003878: 30dd8db3 sm4ed x27,x27,x13,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zksed_sm4ed_cg_cmp_rd_rs1_b27, Zksed_sm4ed_cg_cmp_rd_rs1_b27_str) +8000387c: 00012383 lw x7,0(x2) +80003880: 01b38863 beq x7,x27,80003890 +80003884: 1550446f jal x8,800081d8 +80003888: 80003878 .word 0x80003878 +8000388c: 800133c6 .word 0x800133c6 +80003890: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xbe2c0398 +80003894: 00052e03 lw x28,0(x10) +80003898: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x2e206045 +8000389c: 00052003 lw x0,0(x10) +800038a0: 00450513 addi x10,x10,4 + +800038a4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b28: + sm4ed x28, x28, x0, 2 # perform operation +800038a4: b00e0e33 sm4ed x28,x28,x0,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zksed_sm4ed_cg_cmp_rd_rs1_b28, Zksed_sm4ed_cg_cmp_rd_rs1_b28_str) +800038a8: 00012383 lw x7,0(x2) +800038ac: 01c38863 beq x7,x28,800038bc +800038b0: 1290446f jal x8,800081d8 +800038b4: 800038a4 .word 0x800038a4 +800038b8: 80013400 .word 0x80013400 +800038bc: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x51e8b733 +800038c0: 00052e83 lw x29,0(x10) +800038c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x253204bd +800038c8: 00052983 lw x19,0(x10) +800038cc: 00450513 addi x10,x10,4 + +800038d0 : +Zksed_sm4ed_cg_cmp_rd_rs1_b29: + sm4ed x29, x29, x19, 0 # perform operation +800038d0: 313e8eb3 sm4ed x29,x29,x19,0x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zksed_sm4ed_cg_cmp_rd_rs1_b29, Zksed_sm4ed_cg_cmp_rd_rs1_b29_str) +800038d4: 00012383 lw x7,0(x2) +800038d8: 01d38863 beq x7,x29,800038e8 +800038dc: 0fd0446f jal x8,800081d8 +800038e0: 800038d0 .word 0x800038d0 +800038e4: 8001343a .word 0x8001343a +800038e8: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8e98c6b4 +800038ec: 00052f03 lw x30,0(x10) +800038f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xac4fa12a +800038f4: 00052003 lw x0,0(x10) +800038f8: 00450513 addi x10,x10,4 + +800038fc : +Zksed_sm4ed_cg_cmp_rd_rs1_b30: + sm4ed x30, x30, x0, 2 # perform operation +800038fc: b00f0f33 sm4ed x30,x30,x0,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zksed_sm4ed_cg_cmp_rd_rs1_b30, Zksed_sm4ed_cg_cmp_rd_rs1_b30_str) +80003900: 00012383 lw x7,0(x2) +80003904: 01e38863 beq x7,x30,80003914 +80003908: 0d10446f jal x8,800081d8 +8000390c: 800038fc .word 0x800038fc +80003910: 80013474 .word 0x80013474 +80003914: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x11cbff80 +80003918: 00052f83 lw x31,0(x10) +8000391c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xa1ea7723 +80003920: 00052203 lw x4,0(x10) +80003924: 00450513 addi x10,x10,4 + +80003928 : +Zksed_sm4ed_cg_cmp_rd_rs1_b31: + sm4ed x31, x31, x4, 0 # perform operation +80003928: 304f8fb3 sm4ed x31,x31,x4,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zksed_sm4ed_cg_cmp_rd_rs1_b31, Zksed_sm4ed_cg_cmp_rd_rs1_b31_str) +8000392c: 00012383 lw x7,0(x2) +80003930: 01f38863 beq x7,x31,80003940 +80003934: 0a50446f jal x8,800081d8 +80003938: 80003928 .word 0x80003928 +8000393c: 800134ae .word 0x800134ae +80003940: 00410113 addi x2,x2,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x64b450f2 +80003944: 00052e03 lw x28,0(x10) +80003948: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x6e499dac +8000394c: 00052003 lw x0,0(x10) +80003950: 00450513 addi x10,x10,4 + +80003954 : +Zksed_sm4ed_cg_cmp_rd_rs2_b0: + sm4ed x0, x28, x0, 1 # perform operation +80003954: 700e0033 sm4ed x0,x28,x0,0x1 + # Check if x0 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x0, Zksed_sm4ed_cg_cmp_rd_rs2_b0, Zksed_sm4ed_cg_cmp_rd_rs2_b0_str) +80003958: 00012383 lw x7,0(x2) +8000395c: 00038863 beq x7,x0,8000396c +80003960: 0790446f jal x8,800081d8 +80003964: 80003954 .word 0x80003954 +80003968: 800134e8 .word 0x800134e8 +8000396c: 00410113 addi x2,x2,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x48b4397b +80003970: 00052a03 lw x20,0(x10) +80003974: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x55a4920f +80003978: 00052083 lw x1,0(x10) +8000397c: 00450513 addi x10,x10,4 + +80003980 : +Zksed_sm4ed_cg_cmp_rd_rs2_b1: + sm4ed x1, x20, x1, 0 # perform operation +80003980: 301a00b3 sm4ed x1,x20,x1,0x0 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zksed_sm4ed_cg_cmp_rd_rs2_b1, Zksed_sm4ed_cg_cmp_rd_rs2_b1_str) +80003984: 00012383 lw x7,0(x2) +80003988: 00138863 beq x7,x1,80003998 +8000398c: 04d0446f jal x8,800081d8 +80003990: 80003980 .word 0x80003980 +80003994: 80013521 .word 0x80013521 +80003998: 00410113 addi x2,x2,4 + + mv x23, x2 # switch signature pointer register to avoid conflict with test +8000399c: 00010b93 addi x23,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x73a492ca +800039a0: 00052283 lw x5,0(x10) +800039a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x6408ec52 +800039a8: 00052103 lw x2,0(x10) +800039ac: 00450513 addi x10,x10,4 + +800039b0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b2: + sm4ed x2, x5, x2, 3 # perform operation +800039b0: f0228133 sm4ed x2,x5,x2,0x3 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zksed_sm4ed_cg_cmp_rd_rs2_b2, Zksed_sm4ed_cg_cmp_rd_rs2_b2_str) +800039b4: 000ba383 lw x7,0(x23) +800039b8: 00238863 beq x7,x2,800039c8 +800039bc: 01d0446f jal x8,800081d8 +800039c0: 800039b0 .word 0x800039b0 +800039c4: 8001355a .word 0x8001355a +800039c8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x075c4dfa +800039cc: 00052803 lw x16,0(x10) +800039d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x417c50aa +800039d4: 00052183 lw x3,0(x10) +800039d8: 00450513 addi x10,x10,4 + +800039dc : +Zksed_sm4ed_cg_cmp_rd_rs2_b3: + sm4ed x3, x16, x3, 2 # perform operation +800039dc: b03801b3 sm4ed x3,x16,x3,0x2 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zksed_sm4ed_cg_cmp_rd_rs2_b3, Zksed_sm4ed_cg_cmp_rd_rs2_b3_str) +800039e0: 000ba383 lw x7,0(x23) +800039e4: 00338863 beq x7,x3,800039f4 +800039e8: 7f00446f jal x8,800081d8 +800039ec: 800039dc .word 0x800039dc +800039f0: 80013593 .word 0x80013593 +800039f4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfccc23dc +800039f8: 00052b03 lw x22,0(x10) +800039fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x588c6627 +80003a00: 00052203 lw x4,0(x10) +80003a04: 00450513 addi x10,x10,4 + +80003a08 : +Zksed_sm4ed_cg_cmp_rd_rs2_b4: + sm4ed x4, x22, x4, 0 # perform operation +80003a08: 304b0233 sm4ed x4,x22,x4,0x0 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zksed_sm4ed_cg_cmp_rd_rs2_b4, Zksed_sm4ed_cg_cmp_rd_rs2_b4_str) +80003a0c: 000ba383 lw x7,0(x23) +80003a10: 00438863 beq x7,x4,80003a20 +80003a14: 7c40446f jal x8,800081d8 +80003a18: 80003a08 .word 0x80003a08 +80003a1c: 800135cc .word 0x800135cc +80003a20: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x3b6e887a +80003a24: 00052783 lw x15,0(x10) +80003a28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7f3a12d6 +80003a2c: 00052283 lw x5,0(x10) +80003a30: 00450513 addi x10,x10,4 + +80003a34 : +Zksed_sm4ed_cg_cmp_rd_rs2_b5: + sm4ed x5, x15, x5, 0 # perform operation +80003a34: 305782b3 sm4ed x5,x15,x5,0x0 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zksed_sm4ed_cg_cmp_rd_rs2_b5, Zksed_sm4ed_cg_cmp_rd_rs2_b5_str) +80003a38: 000ba383 lw x7,0(x23) +80003a3c: 00538863 beq x7,x5,80003a4c +80003a40: 7980446f jal x8,800081d8 +80003a44: 80003a34 .word 0x80003a34 +80003a48: 80013605 .word 0x80013605 +80003a4c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x41fb28ce +80003a50: 00052983 lw x19,0(x10) +80003a54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x01fdb4a5 +80003a58: 00052303 lw x6,0(x10) +80003a5c: 00450513 addi x10,x10,4 + +80003a60 : +Zksed_sm4ed_cg_cmp_rd_rs2_b6: + sm4ed x6, x19, x6, 2 # perform operation +80003a60: b0698333 sm4ed x6,x19,x6,0x2 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zksed_sm4ed_cg_cmp_rd_rs2_b6, Zksed_sm4ed_cg_cmp_rd_rs2_b6_str) +80003a64: 000ba383 lw x7,0(x23) +80003a68: 00638863 beq x7,x6,80003a78 +80003a6c: 76c0446f jal x8,800081d8 +80003a70: 80003a60 .word 0x80003a60 +80003a74: 8001363e .word 0x8001363e +80003a78: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80003a7c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80003a80: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0f5da075 +80003a84: 00052f83 lw x31,0(x10) +80003a88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x189b9ed4 +80003a8c: 00052383 lw x7,0(x10) +80003a90: 00450513 addi x10,x10,4 + +80003a94 : +Zksed_sm4ed_cg_cmp_rd_rs2_b7: + sm4ed x7, x31, x7, 0 # perform operation +80003a94: 307f83b3 sm4ed x7,x31,x7,0x0 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zksed_sm4ed_cg_cmp_rd_rs2_b7, Zksed_sm4ed_cg_cmp_rd_rs2_b7_str) +80003a98: 000ba203 lw x4,0(x23) +80003a9c: 00720863 beq x4,x7,80003aac +80003aa0: 720042ef jal x5,800081c0 +80003aa4: 80003a94 .word 0x80003a94 +80003aa8: 80013677 .word 0x80013677 +80003aac: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x862960c5 +80003ab0: 00052003 lw x0,0(x10) +80003ab4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xd85572fa +80003ab8: 00052403 lw x8,0(x10) +80003abc: 00450513 addi x10,x10,4 + +80003ac0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b8: + sm4ed x8, x0, x8, 0 # perform operation +80003ac0: 30800433 sm4ed x8,x0,x8,0x0 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zksed_sm4ed_cg_cmp_rd_rs2_b8, Zksed_sm4ed_cg_cmp_rd_rs2_b8_str) +80003ac4: 000ba203 lw x4,0(x23) +80003ac8: 00820863 beq x4,x8,80003ad8 +80003acc: 6f4042ef jal x5,800081c0 +80003ad0: 80003ac0 .word 0x80003ac0 +80003ad4: 800136b0 .word 0x800136b0 +80003ad8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x44c5b560 +80003adc: 00052a83 lw x21,0(x10) +80003ae0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x940f999c +80003ae4: 00052483 lw x9,0(x10) +80003ae8: 00450513 addi x10,x10,4 + +80003aec : +Zksed_sm4ed_cg_cmp_rd_rs2_b9: + sm4ed x9, x21, x9, 3 # perform operation +80003aec: f09a84b3 sm4ed x9,x21,x9,0x3 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zksed_sm4ed_cg_cmp_rd_rs2_b9, Zksed_sm4ed_cg_cmp_rd_rs2_b9_str) +80003af0: 000ba203 lw x4,0(x23) +80003af4: 00920863 beq x4,x9,80003b04 +80003af8: 6c8042ef jal x5,800081c0 +80003afc: 80003aec .word 0x80003aec +80003b00: 800136e9 .word 0x800136e9 +80003b04: 004b8b93 addi x23,x23,4 + + mv x20, x10 # switch data pointer register to avoid conflict with test +80003b08: 00050a13 addi x20,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xa85c2635 +80003b0c: 000a2083 lw x1,0(x20) +80003b10: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xfd953dc3 +80003b14: 000a2503 lw x10,0(x20) +80003b18: 004a0a13 addi x20,x20,4 + +80003b1c : +Zksed_sm4ed_cg_cmp_rd_rs2_b10: + sm4ed x10, x1, x10, 0 # perform operation +80003b1c: 30a08533 sm4ed x10,x1,x10,0x0 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zksed_sm4ed_cg_cmp_rd_rs2_b10, Zksed_sm4ed_cg_cmp_rd_rs2_b10_str) +80003b20: 000ba203 lw x4,0(x23) +80003b24: 00a20863 beq x4,x10,80003b34 +80003b28: 698042ef jal x5,800081c0 +80003b2c: 80003b1c .word 0x80003b1c +80003b30: 80013722 .word 0x80013722 +80003b34: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x18c06b29 +80003b38: 000a2703 lw x14,0(x20) +80003b3c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x2a37fc20 +80003b40: 000a2583 lw x11,0(x20) +80003b44: 004a0a13 addi x20,x20,4 + +80003b48 : +Zksed_sm4ed_cg_cmp_rd_rs2_b11: + sm4ed x11, x14, x11, 2 # perform operation +80003b48: b0b705b3 sm4ed x11,x14,x11,0x2 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zksed_sm4ed_cg_cmp_rd_rs2_b11, Zksed_sm4ed_cg_cmp_rd_rs2_b11_str) +80003b4c: 000ba203 lw x4,0(x23) +80003b50: 00b20863 beq x4,x11,80003b60 +80003b54: 66c042ef jal x5,800081c0 +80003b58: 80003b48 .word 0x80003b48 +80003b5c: 8001375c .word 0x8001375c +80003b60: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x036ae95c +80003b64: 000a2e03 lw x28,0(x20) +80003b68: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x806f8c7e +80003b6c: 000a2603 lw x12,0(x20) +80003b70: 004a0a13 addi x20,x20,4 + +80003b74 : +Zksed_sm4ed_cg_cmp_rd_rs2_b12: + sm4ed x12, x28, x12, 1 # perform operation +80003b74: 70ce0633 sm4ed x12,x28,x12,0x1 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zksed_sm4ed_cg_cmp_rd_rs2_b12, Zksed_sm4ed_cg_cmp_rd_rs2_b12_str) +80003b78: 000ba203 lw x4,0(x23) +80003b7c: 00c20863 beq x4,x12,80003b8c +80003b80: 640042ef jal x5,800081c0 +80003b84: 80003b74 .word 0x80003b74 +80003b88: 80013796 .word 0x80013796 +80003b8c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x67d93519 +80003b90: 000a2483 lw x9,0(x20) +80003b94: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x2cc30674 +80003b98: 000a2683 lw x13,0(x20) +80003b9c: 004a0a13 addi x20,x20,4 + +80003ba0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b13: + sm4ed x13, x9, x13, 2 # perform operation +80003ba0: b0d486b3 sm4ed x13,x9,x13,0x2 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zksed_sm4ed_cg_cmp_rd_rs2_b13, Zksed_sm4ed_cg_cmp_rd_rs2_b13_str) +80003ba4: 000ba203 lw x4,0(x23) +80003ba8: 00d20863 beq x4,x13,80003bb8 +80003bac: 614042ef jal x5,800081c0 +80003bb0: 80003ba0 .word 0x80003ba0 +80003bb4: 800137d0 .word 0x800137d0 +80003bb8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x3079ae1b +80003bbc: 000a2683 lw x13,0(x20) +80003bc0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xb5ed8465 +80003bc4: 000a2703 lw x14,0(x20) +80003bc8: 004a0a13 addi x20,x20,4 + +80003bcc : +Zksed_sm4ed_cg_cmp_rd_rs2_b14: + sm4ed x14, x13, x14, 1 # perform operation +80003bcc: 70e68733 sm4ed x14,x13,x14,0x1 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zksed_sm4ed_cg_cmp_rd_rs2_b14, Zksed_sm4ed_cg_cmp_rd_rs2_b14_str) +80003bd0: 000ba203 lw x4,0(x23) +80003bd4: 00e20863 beq x4,x14,80003be4 +80003bd8: 5e8042ef jal x5,800081c0 +80003bdc: 80003bcc .word 0x80003bcc +80003be0: 8001380a .word 0x8001380a +80003be4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x8d60306a +80003be8: 000a2c83 lw x25,0(x20) +80003bec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x99830dfd +80003bf0: 000a2783 lw x15,0(x20) +80003bf4: 004a0a13 addi x20,x20,4 + +80003bf8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b15: + sm4ed x15, x25, x15, 2 # perform operation +80003bf8: b0fc87b3 sm4ed x15,x25,x15,0x2 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zksed_sm4ed_cg_cmp_rd_rs2_b15, Zksed_sm4ed_cg_cmp_rd_rs2_b15_str) +80003bfc: 000ba203 lw x4,0(x23) +80003c00: 00f20863 beq x4,x15,80003c10 +80003c04: 5bc042ef jal x5,800081c0 +80003c08: 80003bf8 .word 0x80003bf8 +80003c0c: 80013844 .word 0x80013844 +80003c10: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x1449f0ed +80003c14: 000a2003 lw x0,0(x20) +80003c18: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xb1aaff9c +80003c1c: 000a2803 lw x16,0(x20) +80003c20: 004a0a13 addi x20,x20,4 + +80003c24 : +Zksed_sm4ed_cg_cmp_rd_rs2_b16: + sm4ed x16, x0, x16, 0 # perform operation +80003c24: 31000833 sm4ed x16,x0,x16,0x0 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zksed_sm4ed_cg_cmp_rd_rs2_b16, Zksed_sm4ed_cg_cmp_rd_rs2_b16_str) +80003c28: 000ba203 lw x4,0(x23) +80003c2c: 01020863 beq x4,x16,80003c3c +80003c30: 590042ef jal x5,800081c0 +80003c34: 80003c24 .word 0x80003c24 +80003c38: 8001387e .word 0x8001387e +80003c3c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x26cb3fdd +80003c40: 000a2b03 lw x22,0(x20) +80003c44: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xdef5d7e4 +80003c48: 000a2883 lw x17,0(x20) +80003c4c: 004a0a13 addi x20,x20,4 + +80003c50 : +Zksed_sm4ed_cg_cmp_rd_rs2_b17: + sm4ed x17, x22, x17, 1 # perform operation +80003c50: 711b08b3 sm4ed x17,x22,x17,0x1 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zksed_sm4ed_cg_cmp_rd_rs2_b17, Zksed_sm4ed_cg_cmp_rd_rs2_b17_str) +80003c54: 000ba203 lw x4,0(x23) +80003c58: 01120863 beq x4,x17,80003c68 +80003c5c: 564042ef jal x5,800081c0 +80003c60: 80003c50 .word 0x80003c50 +80003c64: 800138b8 .word 0x800138b8 +80003c68: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x55bf4e74 +80003c6c: 000a2c83 lw x25,0(x20) +80003c70: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x0d79abc0 +80003c74: 000a2903 lw x18,0(x20) +80003c78: 004a0a13 addi x20,x20,4 + +80003c7c : +Zksed_sm4ed_cg_cmp_rd_rs2_b18: + sm4ed x18, x25, x18, 3 # perform operation +80003c7c: f12c8933 sm4ed x18,x25,x18,0x3 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zksed_sm4ed_cg_cmp_rd_rs2_b18, Zksed_sm4ed_cg_cmp_rd_rs2_b18_str) +80003c80: 000ba203 lw x4,0(x23) +80003c84: 01220863 beq x4,x18,80003c94 +80003c88: 538042ef jal x5,800081c0 +80003c8c: 80003c7c .word 0x80003c7c +80003c90: 800138f2 .word 0x800138f2 +80003c94: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x36ca9f31 +80003c98: 000a2503 lw x10,0(x20) +80003c9c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xc9e6e9b9 +80003ca0: 000a2983 lw x19,0(x20) +80003ca4: 004a0a13 addi x20,x20,4 + +80003ca8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b19: + sm4ed x19, x10, x19, 0 # perform operation +80003ca8: 313509b3 sm4ed x19,x10,x19,0x0 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zksed_sm4ed_cg_cmp_rd_rs2_b19, Zksed_sm4ed_cg_cmp_rd_rs2_b19_str) +80003cac: 000ba203 lw x4,0(x23) +80003cb0: 01320863 beq x4,x19,80003cc0 +80003cb4: 50c042ef jal x5,800081c0 +80003cb8: 80003ca8 .word 0x80003ca8 +80003cbc: 8001392c .word 0x8001392c +80003cc0: 004b8b93 addi x23,x23,4 + + mv x28, x20 # switch data pointer register to avoid conflict with test +80003cc4: 000a0e13 addi x28,x20,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0xbd471ee2 +80003cc8: 000e2103 lw x2,0(x28) +80003ccc: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xffef362c +80003cd0: 000e2a03 lw x20,0(x28) +80003cd4: 004e0e13 addi x28,x28,4 + +80003cd8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b20: + sm4ed x20, x2, x20, 0 # perform operation +80003cd8: 31410a33 sm4ed x20,x2,x20,0x0 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zksed_sm4ed_cg_cmp_rd_rs2_b20, Zksed_sm4ed_cg_cmp_rd_rs2_b20_str) +80003cdc: 000ba203 lw x4,0(x23) +80003ce0: 01420863 beq x4,x20,80003cf0 +80003ce4: 4dc042ef jal x5,800081c0 +80003ce8: 80003cd8 .word 0x80003cd8 +80003cec: 80013966 .word 0x80013966 +80003cf0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x492cef55 +80003cf4: 000e2f03 lw x30,0(x28) +80003cf8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x80055cfd +80003cfc: 000e2a83 lw x21,0(x28) +80003d00: 004e0e13 addi x28,x28,4 + +80003d04 : +Zksed_sm4ed_cg_cmp_rd_rs2_b21: + sm4ed x21, x30, x21, 2 # perform operation +80003d04: b15f0ab3 sm4ed x21,x30,x21,0x2 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zksed_sm4ed_cg_cmp_rd_rs2_b21, Zksed_sm4ed_cg_cmp_rd_rs2_b21_str) +80003d08: 000ba203 lw x4,0(x23) +80003d0c: 01520863 beq x4,x21,80003d1c +80003d10: 4b0042ef jal x5,800081c0 +80003d14: 80003d04 .word 0x80003d04 +80003d18: 800139a0 .word 0x800139a0 +80003d1c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0x938dcb24 +80003d20: 000e2f83 lw x31,0(x28) +80003d24: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xf37dd9b2 +80003d28: 000e2b03 lw x22,0(x28) +80003d2c: 004e0e13 addi x28,x28,4 + +80003d30 : +Zksed_sm4ed_cg_cmp_rd_rs2_b22: + sm4ed x22, x31, x22, 1 # perform operation +80003d30: 716f8b33 sm4ed x22,x31,x22,0x1 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zksed_sm4ed_cg_cmp_rd_rs2_b22, Zksed_sm4ed_cg_cmp_rd_rs2_b22_str) +80003d34: 000ba203 lw x4,0(x23) +80003d38: 01620863 beq x4,x22,80003d48 +80003d3c: 484042ef jal x5,800081c0 +80003d40: 80003d30 .word 0x80003d30 +80003d44: 800139da .word 0x800139da +80003d48: 004b8b93 addi x23,x23,4 + + mv x21, x23 # switch signature pointer register to avoid conflict with test +80003d4c: 000b8a93 addi x21,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xe0ca2504 +80003d50: 000e2883 lw x17,0(x28) +80003d54: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xbb5d4879 +80003d58: 000e2b83 lw x23,0(x28) +80003d5c: 004e0e13 addi x28,x28,4 + +80003d60 : +Zksed_sm4ed_cg_cmp_rd_rs2_b23: + sm4ed x23, x17, x23, 3 # perform operation +80003d60: f1788bb3 sm4ed x23,x17,x23,0x3 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zksed_sm4ed_cg_cmp_rd_rs2_b23, Zksed_sm4ed_cg_cmp_rd_rs2_b23_str) +80003d64: 000aa203 lw x4,0(x21) +80003d68: 01720863 beq x4,x23,80003d78 +80003d6c: 454042ef jal x5,800081c0 +80003d70: 80003d60 .word 0x80003d60 +80003d74: 80013a14 .word 0x80013a14 +80003d78: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0xd0de740e +80003d7c: 000e2183 lw x3,0(x28) +80003d80: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x2bc21472 +80003d84: 000e2c03 lw x24,0(x28) +80003d88: 004e0e13 addi x28,x28,4 + +80003d8c : +Zksed_sm4ed_cg_cmp_rd_rs2_b24: + sm4ed x24, x3, x24, 2 # perform operation +80003d8c: b1818c33 sm4ed x24,x3,x24,0x2 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zksed_sm4ed_cg_cmp_rd_rs2_b24, Zksed_sm4ed_cg_cmp_rd_rs2_b24_str) +80003d90: 000aa203 lw x4,0(x21) +80003d94: 01820863 beq x4,x24,80003da4 +80003d98: 428042ef jal x5,800081c0 +80003d9c: 80003d8c .word 0x80003d8c +80003da0: 80013a4e .word 0x80013a4e +80003da4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs1: x7 = 0x2b8621e1 +80003da8: 000e2383 lw x7,0(x28) +80003dac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x34ed235c +80003db0: 000e2c83 lw x25,0(x28) +80003db4: 004e0e13 addi x28,x28,4 + +80003db8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b25: + sm4ed x25, x7, x25, 2 # perform operation +80003db8: b1938cb3 sm4ed x25,x7,x25,0x2 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zksed_sm4ed_cg_cmp_rd_rs2_b25, Zksed_sm4ed_cg_cmp_rd_rs2_b25_str) +80003dbc: 000aa203 lw x4,0(x21) +80003dc0: 01920863 beq x4,x25,80003dd0 +80003dc4: 3fc042ef jal x5,800081c0 +80003dc8: 80003db8 .word 0x80003db8 +80003dcc: 80013a88 .word 0x80013a88 +80003dd0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0x5ddcaeb1 +80003dd4: 000e2183 lw x3,0(x28) +80003dd8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x1c626347 +80003ddc: 000e2d03 lw x26,0(x28) +80003de0: 004e0e13 addi x28,x28,4 + +80003de4 : +Zksed_sm4ed_cg_cmp_rd_rs2_b26: + sm4ed x26, x3, x26, 1 # perform operation +80003de4: 71a18d33 sm4ed x26,x3,x26,0x1 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zksed_sm4ed_cg_cmp_rd_rs2_b26, Zksed_sm4ed_cg_cmp_rd_rs2_b26_str) +80003de8: 000aa203 lw x4,0(x21) +80003dec: 01a20863 beq x4,x26,80003dfc +80003df0: 3d0042ef jal x5,800081c0 +80003df4: 80003de4 .word 0x80003de4 +80003df8: 80013ac2 .word 0x80013ac2 +80003dfc: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xa49b83c1 +80003e00: 000e2783 lw x15,0(x28) +80003e04: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0xf51cb972 +80003e08: 000e2d83 lw x27,0(x28) +80003e0c: 004e0e13 addi x28,x28,4 + +80003e10 : +Zksed_sm4ed_cg_cmp_rd_rs2_b27: + sm4ed x27, x15, x27, 0 # perform operation +80003e10: 31b78db3 sm4ed x27,x15,x27,0x0 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zksed_sm4ed_cg_cmp_rd_rs2_b27, Zksed_sm4ed_cg_cmp_rd_rs2_b27_str) +80003e14: 000aa203 lw x4,0(x21) +80003e18: 01b20863 beq x4,x27,80003e28 +80003e1c: 3a4042ef jal x5,800081c0 +80003e20: 80003e10 .word 0x80003e10 +80003e24: 80013afc .word 0x80013afc +80003e28: 004a8a93 addi x21,x21,4 + + mv x24, x28 # switch data pointer register to avoid conflict with test +80003e2c: 000e0c13 addi x24,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x082122cf +80003e30: 000c2f03 lw x30,0(x24) +80003e34: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0xf47a3efe +80003e38: 000c2e03 lw x28,0(x24) +80003e3c: 004c0c13 addi x24,x24,4 + +80003e40 : +Zksed_sm4ed_cg_cmp_rd_rs2_b28: + sm4ed x28, x30, x28, 1 # perform operation +80003e40: 71cf0e33 sm4ed x28,x30,x28,0x1 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zksed_sm4ed_cg_cmp_rd_rs2_b28, Zksed_sm4ed_cg_cmp_rd_rs2_b28_str) +80003e44: 000aa203 lw x4,0(x21) +80003e48: 01c20863 beq x4,x28,80003e58 +80003e4c: 374042ef jal x5,800081c0 +80003e50: 80003e40 .word 0x80003e40 +80003e54: 80013b36 .word 0x80013b36 +80003e58: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x6aeecaec +80003e5c: 000c2603 lw x12,0(x24) +80003e60: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x36a161cc +80003e64: 000c2e83 lw x29,0(x24) +80003e68: 004c0c13 addi x24,x24,4 + +80003e6c : +Zksed_sm4ed_cg_cmp_rd_rs2_b29: + sm4ed x29, x12, x29, 0 # perform operation +80003e6c: 31d60eb3 sm4ed x29,x12,x29,0x0 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zksed_sm4ed_cg_cmp_rd_rs2_b29, Zksed_sm4ed_cg_cmp_rd_rs2_b29_str) +80003e70: 000aa203 lw x4,0(x21) +80003e74: 01d20863 beq x4,x29,80003e84 +80003e78: 348042ef jal x5,800081c0 +80003e7c: 80003e6c .word 0x80003e6c +80003e80: 80013b70 .word 0x80013b70 +80003e84: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x320e54f1 +80003e88: 000c2183 lw x3,0(x24) +80003e8c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0xa4b1a0cc +80003e90: 000c2f03 lw x30,0(x24) +80003e94: 004c0c13 addi x24,x24,4 + +80003e98 : +Zksed_sm4ed_cg_cmp_rd_rs2_b30: + sm4ed x30, x3, x30, 0 # perform operation +80003e98: 31e18f33 sm4ed x30,x3,x30,0x0 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zksed_sm4ed_cg_cmp_rd_rs2_b30, Zksed_sm4ed_cg_cmp_rd_rs2_b30_str) +80003e9c: 000aa203 lw x4,0(x21) +80003ea0: 01e20863 beq x4,x30,80003eb0 +80003ea4: 31c042ef jal x5,800081c0 +80003ea8: 80003e98 .word 0x80003e98 +80003eac: 80013baa .word 0x80013baa +80003eb0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xe28583c5 +80003eb4: 000c2e83 lw x29,0(x24) +80003eb8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0xf8abe1ce +80003ebc: 000c2f83 lw x31,0(x24) +80003ec0: 004c0c13 addi x24,x24,4 + +80003ec4 : +Zksed_sm4ed_cg_cmp_rd_rs2_b31: + sm4ed x31, x29, x31, 1 # perform operation +80003ec4: 71fe8fb3 sm4ed x31,x29,x31,0x1 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zksed_sm4ed_cg_cmp_rd_rs2_b31, Zksed_sm4ed_cg_cmp_rd_rs2_b31_str) +80003ec8: 000aa203 lw x4,0(x21) +80003ecc: 01f20863 beq x4,x31,80003edc +80003ed0: 2f0042ef jal x5,800081c0 +80003ed4: 80003ec4 .word 0x80003ec4 +80003ed8: 80013be4 .word 0x80013be4 +80003edc: 004a8a93 addi x21,x21,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x878728e6 +80003ee0: 000c2003 lw x0,0(x24) +80003ee4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x7f15976e +80003ee8: 000c2003 lw x0,0(x24) +80003eec: 004c0c13 addi x24,x24,4 + +80003ef0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0: + sm4ed x0, x0, x0, 2 # perform operation +80003ef0: b0000033 sm4ed x0,x0,x0,0x2 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0_str) +80003ef4: 000aa203 lw x4,0(x21) +80003ef8: 00020863 beq x4,x0,80003f08 +80003efc: 2c4042ef jal x5,800081c0 +80003f00: 80003ef0 .word 0x80003ef0 +80003f04: 80013c1e .word 0x80013c1e +80003f08: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x67dcbdbf +80003f0c: 000c2083 lw x1,0(x24) +80003f10: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0xd2b4c1d5 +80003f14: 000c2083 lw x1,0(x24) +80003f18: 004c0c13 addi x24,x24,4 + +80003f1c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1: + sm4ed x1, x1, x1, 2 # perform operation +80003f1c: b01080b3 sm4ed x1,x1,x1,0x2 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1_str) +80003f20: 000aa203 lw x4,0(x21) +80003f24: 00120863 beq x4,x1,80003f34 +80003f28: 298042ef jal x5,800081c0 +80003f2c: 80003f1c .word 0x80003f1c +80003f30: 80013c5b .word 0x80013c5b +80003f34: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x98315102 +80003f38: 000c2103 lw x2,0(x24) +80003f3c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x7939096b +80003f40: 000c2103 lw x2,0(x24) +80003f44: 004c0c13 addi x24,x24,4 + +80003f48 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2: + sm4ed x2, x2, x2, 2 # perform operation +80003f48: b0210133 sm4ed x2,x2,x2,0x2 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2_str) +80003f4c: 000aa203 lw x4,0(x21) +80003f50: 00220863 beq x4,x2,80003f60 +80003f54: 26c042ef jal x5,800081c0 +80003f58: 80003f48 .word 0x80003f48 +80003f5c: 80013c98 .word 0x80013c98 +80003f60: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x8c9dc784 +80003f64: 000c2183 lw x3,0(x24) +80003f68: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xc2014e9e +80003f6c: 000c2183 lw x3,0(x24) +80003f70: 004c0c13 addi x24,x24,4 + +80003f74 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3: + sm4ed x3, x3, x3, 1 # perform operation +80003f74: 703181b3 sm4ed x3,x3,x3,0x1 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3_str) +80003f78: 000aa203 lw x4,0(x21) +80003f7c: 00320863 beq x4,x3,80003f8c +80003f80: 240042ef jal x5,800081c0 +80003f84: 80003f74 .word 0x80003f74 +80003f88: 80013cd5 .word 0x80013cd5 +80003f8c: 004a8a93 addi x21,x21,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003f90: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003f94: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xb62ceb4c +80003f98: 000c2203 lw x4,0(x24) +80003f9c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0xc36636b3 +80003fa0: 000c2203 lw x4,0(x24) +80003fa4: 004c0c13 addi x24,x24,4 + +80003fa8 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4: + sm4ed x4, x4, x4, 1 # perform operation +80003fa8: 70420233 sm4ed x4,x4,x4,0x1 + # Check if x4 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x4, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4_str) +80003fac: 000aa683 lw x13,0(x21) +80003fb0: 00468863 beq x13,x4,80003fc0 +80003fb4: 24c0476f jal x14,80008200 +80003fb8: 80003fa8 .word 0x80003fa8 +80003fbc: 80013d12 .word 0x80013d12 +80003fc0: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x753d9e23 +80003fc4: 000c2283 lw x5,0(x24) +80003fc8: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x829b51ad +80003fcc: 000c2283 lw x5,0(x24) +80003fd0: 004c0c13 addi x24,x24,4 + +80003fd4 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5: + sm4ed x5, x5, x5, 1 # perform operation +80003fd4: 705282b3 sm4ed x5,x5,x5,0x1 + # Check if x5 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x5, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5_str) +80003fd8: 000aa683 lw x13,0(x21) +80003fdc: 00568863 beq x13,x5,80003fec +80003fe0: 2200476f jal x14,80008200 +80003fe4: 80003fd4 .word 0x80003fd4 +80003fe8: 80013d4f .word 0x80013d4f +80003fec: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x519abac9 +80003ff0: 000c2303 lw x6,0(x24) +80003ff4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x24c63248 +80003ff8: 000c2303 lw x6,0(x24) +80003ffc: 004c0c13 addi x24,x24,4 + +80004000 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6: + sm4ed x6, x6, x6, 1 # perform operation +80004000: 70630333 sm4ed x6,x6,x6,0x1 + # Check if x6 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x6, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6_str) +80004004: 000aa683 lw x13,0(x21) +80004008: 00668863 beq x13,x6,80004018 +8000400c: 1f40476f jal x14,80008200 +80004010: 80004000 .word 0x80004000 +80004014: 80013d8c .word 0x80013d8c +80004018: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x797b213b +8000401c: 000c2383 lw x7,0(x24) +80004020: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x1f662229 +80004024: 000c2383 lw x7,0(x24) +80004028: 004c0c13 addi x24,x24,4 + +8000402c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7: + sm4ed x7, x7, x7, 0 # perform operation +8000402c: 307383b3 sm4ed x7,x7,x7,0x0 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7_str) +80004030: 000aa683 lw x13,0(x21) +80004034: 00768863 beq x13,x7,80004044 +80004038: 1c80476f jal x14,80008200 +8000403c: 8000402c .word 0x8000402c +80004040: 80013dc9 .word 0x80013dc9 +80004044: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x5f8ae6f9 +80004048: 000c2403 lw x8,0(x24) +8000404c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0xc6170919 +80004050: 000c2403 lw x8,0(x24) +80004054: 004c0c13 addi x24,x24,4 + +80004058 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8: + sm4ed x8, x8, x8, 3 # perform operation +80004058: f0840433 sm4ed x8,x8,x8,0x3 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8_str) +8000405c: 000aa683 lw x13,0(x21) +80004060: 00868863 beq x13,x8,80004070 +80004064: 19c0476f jal x14,80008200 +80004068: 80004058 .word 0x80004058 +8000406c: 80013e06 .word 0x80013e06 +80004070: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xfb8c6de5 +80004074: 000c2483 lw x9,0(x24) +80004078: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x7473dfb1 +8000407c: 000c2483 lw x9,0(x24) +80004080: 004c0c13 addi x24,x24,4 + +80004084 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9: + sm4ed x9, x9, x9, 3 # perform operation +80004084: f09484b3 sm4ed x9,x9,x9,0x3 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9_str) +80004088: 000aa683 lw x13,0(x21) +8000408c: 00968863 beq x13,x9,8000409c +80004090: 1700476f jal x14,80008200 +80004094: 80004084 .word 0x80004084 +80004098: 80013e43 .word 0x80013e43 +8000409c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x16c6da0f +800040a0: 000c2503 lw x10,0(x24) +800040a4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x0eb1843c +800040a8: 000c2503 lw x10,0(x24) +800040ac: 004c0c13 addi x24,x24,4 + +800040b0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10: + sm4ed x10, x10, x10, 2 # perform operation +800040b0: b0a50533 sm4ed x10,x10,x10,0x2 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10_str) +800040b4: 000aa683 lw x13,0(x21) +800040b8: 00a68863 beq x13,x10,800040c8 +800040bc: 1440476f jal x14,80008200 +800040c0: 800040b0 .word 0x800040b0 +800040c4: 80013e80 .word 0x80013e80 +800040c8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x4367afd1 +800040cc: 000c2583 lw x11,0(x24) +800040d0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xe580342b +800040d4: 000c2583 lw x11,0(x24) +800040d8: 004c0c13 addi x24,x24,4 + +800040dc : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11: + sm4ed x11, x11, x11, 2 # perform operation +800040dc: b0b585b3 sm4ed x11,x11,x11,0x2 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11_str) +800040e0: 000aa683 lw x13,0(x21) +800040e4: 00b68863 beq x13,x11,800040f4 +800040e8: 1180476f jal x14,80008200 +800040ec: 800040dc .word 0x800040dc +800040f0: 80013ebe .word 0x80013ebe +800040f4: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xcc71ba95 +800040f8: 000c2603 lw x12,0(x24) +800040fc: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xb444a891 +80004100: 000c2603 lw x12,0(x24) +80004104: 004c0c13 addi x24,x24,4 + +80004108 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12: + sm4ed x12, x12, x12, 2 # perform operation +80004108: b0c60633 sm4ed x12,x12,x12,0x2 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12_str) +8000410c: 000aa683 lw x13,0(x21) +80004110: 00c68863 beq x13,x12,80004120 +80004114: 0ec0476f jal x14,80008200 +80004118: 80004108 .word 0x80004108 +8000411c: 80013efc .word 0x80013efc +80004120: 004a8a93 addi x21,x21,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80004124: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80004128: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xcd5ecc36 +8000412c: 000c2683 lw x13,0(x24) +80004130: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xc3caeacc +80004134: 000c2683 lw x13,0(x24) +80004138: 004c0c13 addi x24,x24,4 + +8000413c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13: + sm4ed x13, x13, x13, 3 # perform operation +8000413c: f0d686b3 sm4ed x13,x13,x13,0x3 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13_str) +80004140: 000aa203 lw x4,0(x21) +80004144: 00d20863 beq x4,x13,80004154 +80004148: 078042ef jal x5,800081c0 +8000414c: 8000413c .word 0x8000413c +80004150: 80013f3a .word 0x80013f3a +80004154: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x2bee7fbd +80004158: 000c2703 lw x14,0(x24) +8000415c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xbf352ff8 +80004160: 000c2703 lw x14,0(x24) +80004164: 004c0c13 addi x24,x24,4 + +80004168 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14: + sm4ed x14, x14, x14, 3 # perform operation +80004168: f0e70733 sm4ed x14,x14,x14,0x3 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14_str) +8000416c: 000aa203 lw x4,0(x21) +80004170: 00e20863 beq x4,x14,80004180 +80004174: 04c042ef jal x5,800081c0 +80004178: 80004168 .word 0x80004168 +8000417c: 80013f78 .word 0x80013f78 +80004180: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x3d40c837 +80004184: 000c2783 lw x15,0(x24) +80004188: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x57ee1644 +8000418c: 000c2783 lw x15,0(x24) +80004190: 004c0c13 addi x24,x24,4 + +80004194 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15: + sm4ed x15, x15, x15, 0 # perform operation +80004194: 30f787b3 sm4ed x15,x15,x15,0x0 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15_str) +80004198: 000aa203 lw x4,0(x21) +8000419c: 00f20863 beq x4,x15,800041ac +800041a0: 020042ef jal x5,800081c0 +800041a4: 80004194 .word 0x80004194 +800041a8: 80013fb6 .word 0x80013fb6 +800041ac: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x1ff41595 +800041b0: 000c2803 lw x16,0(x24) +800041b4: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x10f6e13c +800041b8: 000c2803 lw x16,0(x24) +800041bc: 004c0c13 addi x24,x24,4 + +800041c0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16: + sm4ed x16, x16, x16, 2 # perform operation +800041c0: b1080833 sm4ed x16,x16,x16,0x2 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16_str) +800041c4: 000aa203 lw x4,0(x21) +800041c8: 01020863 beq x4,x16,800041d8 +800041cc: 7f5032ef jal x5,800081c0 +800041d0: 800041c0 .word 0x800041c0 +800041d4: 80013ff4 .word 0x80013ff4 +800041d8: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xe975c881 +800041dc: 000c2883 lw x17,0(x24) +800041e0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xadbf3968 +800041e4: 000c2883 lw x17,0(x24) +800041e8: 004c0c13 addi x24,x24,4 + +800041ec : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17: + sm4ed x17, x17, x17, 0 # perform operation +800041ec: 311888b3 sm4ed x17,x17,x17,0x0 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17_str) +800041f0: 000aa203 lw x4,0(x21) +800041f4: 01120863 beq x4,x17,80004204 +800041f8: 7c9032ef jal x5,800081c0 +800041fc: 800041ec .word 0x800041ec +80004200: 80014032 .word 0x80014032 +80004204: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xc2a994d3 +80004208: 000c2903 lw x18,0(x24) +8000420c: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xe7d374a4 +80004210: 000c2903 lw x18,0(x24) +80004214: 004c0c13 addi x24,x24,4 + +80004218 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18: + sm4ed x18, x18, x18, 2 # perform operation +80004218: b1290933 sm4ed x18,x18,x18,0x2 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18_str) +8000421c: 000aa203 lw x4,0(x21) +80004220: 01220863 beq x4,x18,80004230 +80004224: 79d032ef jal x5,800081c0 +80004228: 80004218 .word 0x80004218 +8000422c: 80014070 .word 0x80014070 +80004230: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x9ca6aec1 +80004234: 000c2983 lw x19,0(x24) +80004238: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x1eec8b36 +8000423c: 000c2983 lw x19,0(x24) +80004240: 004c0c13 addi x24,x24,4 + +80004244 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19: + sm4ed x19, x19, x19, 3 # perform operation +80004244: f13989b3 sm4ed x19,x19,x19,0x3 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19_str) +80004248: 000aa203 lw x4,0(x21) +8000424c: 01320863 beq x4,x19,8000425c +80004250: 771032ef jal x5,800081c0 +80004254: 80004244 .word 0x80004244 +80004258: 800140ae .word 0x800140ae +8000425c: 004a8a93 addi x21,x21,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xa15140cf +80004260: 000c2a03 lw x20,0(x24) +80004264: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xee83b9cc +80004268: 000c2a03 lw x20,0(x24) +8000426c: 004c0c13 addi x24,x24,4 + +80004270 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20: + sm4ed x20, x20, x20, 1 # perform operation +80004270: 714a0a33 sm4ed x20,x20,x20,0x1 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20_str) +80004274: 000aa203 lw x4,0(x21) +80004278: 01420863 beq x4,x20,80004288 +8000427c: 745032ef jal x5,800081c0 +80004280: 80004270 .word 0x80004270 +80004284: 800140ec .word 0x800140ec +80004288: 004a8a93 addi x21,x21,4 + + mv x9, x21 # switch signature pointer register to avoid conflict with test +8000428c: 000a8493 addi x9,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x1b7f49df +80004290: 000c2a83 lw x21,0(x24) +80004294: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x7a799e31 +80004298: 000c2a83 lw x21,0(x24) +8000429c: 004c0c13 addi x24,x24,4 + +800042a0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21: + sm4ed x21, x21, x21, 1 # perform operation +800042a0: 715a8ab3 sm4ed x21,x21,x21,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21_str) +800042a4: 0004a203 lw x4,0(x9) +800042a8: 01520863 beq x4,x21,800042b8 +800042ac: 715032ef jal x5,800081c0 +800042b0: 800042a0 .word 0x800042a0 +800042b4: 8001412a .word 0x8001412a +800042b8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x403c6f21 +800042bc: 000c2b03 lw x22,0(x24) +800042c0: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x4b6b8da2 +800042c4: 000c2b03 lw x22,0(x24) +800042c8: 004c0c13 addi x24,x24,4 + +800042cc : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22: + sm4ed x22, x22, x22, 3 # perform operation +800042cc: f16b0b33 sm4ed x22,x22,x22,0x3 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22_str) +800042d0: 0004a203 lw x4,0(x9) +800042d4: 01620863 beq x4,x22,800042e4 +800042d8: 6e9032ef jal x5,800081c0 +800042dc: 800042cc .word 0x800042cc +800042e0: 80014168 .word 0x80014168 +800042e4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xe5e2a947 +800042e8: 000c2b83 lw x23,0(x24) +800042ec: 004c0c13 addi x24,x24,4 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0xfb6cee12 +800042f0: 000c2b83 lw x23,0(x24) +800042f4: 004c0c13 addi x24,x24,4 + +800042f8 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23: + sm4ed x23, x23, x23, 1 # perform operation +800042f8: 717b8bb3 sm4ed x23,x23,x23,0x1 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23_str) +800042fc: 0004a203 lw x4,0(x9) +80004300: 01720863 beq x4,x23,80004310 +80004304: 6bd032ef jal x5,800081c0 +80004308: 800042f8 .word 0x800042f8 +8000430c: 800141a6 .word 0x800141a6 +80004310: 00448493 addi x9,x9,4 + + mv x10, x24 # switch data pointer register to avoid conflict with test +80004314: 000c0513 addi x10,x24,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xb700863a +80004318: 00052c03 lw x24,0(x10) +8000431c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xfc8da572 +80004320: 00052c03 lw x24,0(x10) +80004324: 00450513 addi x10,x10,4 + +80004328 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24: + sm4ed x24, x24, x24, 2 # perform operation +80004328: b18c0c33 sm4ed x24,x24,x24,0x2 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24_str) +8000432c: 0004a203 lw x4,0(x9) +80004330: 01820863 beq x4,x24,80004340 +80004334: 68d032ef jal x5,800081c0 +80004338: 80004328 .word 0x80004328 +8000433c: 800141e4 .word 0x800141e4 +80004340: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x4145220d +80004344: 00052c83 lw x25,0(x10) +80004348: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x9a76850f +8000434c: 00052c83 lw x25,0(x10) +80004350: 00450513 addi x10,x10,4 + +80004354 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25: + sm4ed x25, x25, x25, 0 # perform operation +80004354: 319c8cb3 sm4ed x25,x25,x25,0x0 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25_str) +80004358: 0004a203 lw x4,0(x9) +8000435c: 01920863 beq x4,x25,8000436c +80004360: 661032ef jal x5,800081c0 +80004364: 80004354 .word 0x80004354 +80004368: 80014222 .word 0x80014222 +8000436c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xbd708176 +80004370: 00052d03 lw x26,0(x10) +80004374: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0416884c +80004378: 00052d03 lw x26,0(x10) +8000437c: 00450513 addi x10,x10,4 + +80004380 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26: + sm4ed x26, x26, x26, 1 # perform operation +80004380: 71ad0d33 sm4ed x26,x26,x26,0x1 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26_str) +80004384: 0004a203 lw x4,0(x9) +80004388: 01a20863 beq x4,x26,80004398 +8000438c: 635032ef jal x5,800081c0 +80004390: 80004380 .word 0x80004380 +80004394: 80014260 .word 0x80014260 +80004398: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xf4ae69cb +8000439c: 00052d83 lw x27,0(x10) +800043a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x38f9a267 +800043a4: 00052d83 lw x27,0(x10) +800043a8: 00450513 addi x10,x10,4 + +800043ac : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27: + sm4ed x27, x27, x27, 2 # perform operation +800043ac: b1bd8db3 sm4ed x27,x27,x27,0x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27_str) +800043b0: 0004a203 lw x4,0(x9) +800043b4: 01b20863 beq x4,x27,800043c4 +800043b8: 609032ef jal x5,800081c0 +800043bc: 800043ac .word 0x800043ac +800043c0: 8001429e .word 0x8001429e +800043c4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xabe1fa54 +800043c8: 00052e03 lw x28,0(x10) +800043cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xacbba4f4 +800043d0: 00052e03 lw x28,0(x10) +800043d4: 00450513 addi x10,x10,4 + +800043d8 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28: + sm4ed x28, x28, x28, 0 # perform operation +800043d8: 31ce0e33 sm4ed x28,x28,x28,0x0 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28_str) +800043dc: 0004a203 lw x4,0(x9) +800043e0: 01c20863 beq x4,x28,800043f0 +800043e4: 5dd032ef jal x5,800081c0 +800043e8: 800043d8 .word 0x800043d8 +800043ec: 800142dc .word 0x800142dc +800043f0: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x6f54252b +800043f4: 00052e83 lw x29,0(x10) +800043f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xeb64acb3 +800043fc: 00052e83 lw x29,0(x10) +80004400: 00450513 addi x10,x10,4 + +80004404 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29: + sm4ed x29, x29, x29, 3 # perform operation +80004404: f1de8eb3 sm4ed x29,x29,x29,0x3 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29_str) +80004408: 0004a203 lw x4,0(x9) +8000440c: 01d20863 beq x4,x29,8000441c +80004410: 5b1032ef jal x5,800081c0 +80004414: 80004404 .word 0x80004404 +80004418: 8001431a .word 0x8001431a +8000441c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xe8104e70 +80004420: 00052f03 lw x30,0(x10) +80004424: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x53e2561e +80004428: 00052f03 lw x30,0(x10) +8000442c: 00450513 addi x10,x10,4 + +80004430 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30: + sm4ed x30, x30, x30, 1 # perform operation +80004430: 71ef0f33 sm4ed x30,x30,x30,0x1 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30_str) +80004434: 0004a203 lw x4,0(x9) +80004438: 01e20863 beq x4,x30,80004448 +8000443c: 585032ef jal x5,800081c0 +80004440: 80004430 .word 0x80004430 +80004444: 80014358 .word 0x80014358 +80004448: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x86af824f +8000444c: 00052f83 lw x31,0(x10) +80004450: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xcee5a4ce +80004454: 00052f83 lw x31,0(x10) +80004458: 00450513 addi x10,x10,4 + +8000445c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31: + sm4ed x31, x31, x31, 1 # perform operation +8000445c: 71ff8fb3 sm4ed x31,x31,x31,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31_str) +80004460: 0004a203 lw x4,0(x9) +80004464: 01f20863 beq x4,x31,80004474 +80004468: 559032ef jal x5,800081c0 +8000446c: 8000445c .word 0x8000445c +80004470: 80014396 .word 0x80014396 +80004474: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x07b731ac +80004478: 00052383 lw x7,0(x10) +8000447c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x515730df +80004480: 00052903 lw x18,0(x10) +80004484: 00450513 addi x10,x10,4 + +80004488 : +Zksed_sm4ed_cg_cp_bs_b0: + sm4ed x8, x7, x18, 0 # perform operation +80004488: 31238433 sm4ed x8,x7,x18,0x0 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_bs_b0, Zksed_sm4ed_cg_cp_bs_b0_str) +8000448c: 0004a203 lw x4,0(x9) +80004490: 00820863 beq x4,x8,800044a0 +80004494: 52d032ef jal x5,800081c0 +80004498: 80004488 .word 0x80004488 +8000449c: 800143d4 .word 0x800143d4 +800044a0: 00448493 addi x9,x9,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0bb429ba +800044a4: 00052b83 lw x23,0(x10) +800044a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7c7c8749 +800044ac: 00052f83 lw x31,0(x10) +800044b0: 00450513 addi x10,x10,4 + +800044b4 : +Zksed_sm4ed_cg_cp_bs_b1: + sm4ed x27, x23, x31, 1 # perform operation +800044b4: 71fb8db3 sm4ed x27,x23,x31,0x1 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_bs_b1, Zksed_sm4ed_cg_cp_bs_b1_str) +800044b8: 0004a203 lw x4,0(x9) +800044bc: 01b20863 beq x4,x27,800044cc +800044c0: 501032ef jal x5,800081c0 +800044c4: 800044b4 .word 0x800044b4 +800044c8: 80014408 .word 0x80014408 +800044cc: 00448493 addi x9,x9,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x055d1115 +800044d0: 00052783 lw x15,0(x10) +800044d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x885c9f5e +800044d8: 00052f83 lw x31,0(x10) +800044dc: 00450513 addi x10,x10,4 + +800044e0 : +Zksed_sm4ed_cg_cp_bs_b2: + sm4ed x25, x15, x31, 2 # perform operation +800044e0: b1f78cb3 sm4ed x25,x15,x31,0x2 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_bs_b2, Zksed_sm4ed_cg_cp_bs_b2_str) +800044e4: 0004a203 lw x4,0(x9) +800044e8: 01920863 beq x4,x25,800044f8 +800044ec: 4d5032ef jal x5,800081c0 +800044f0: 800044e0 .word 0x800044e0 +800044f4: 8001443c .word 0x8001443c +800044f8: 00448493 addi x9,x9,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x932011ba +800044fc: 00052e83 lw x29,0(x10) +80004500: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xe502efdc +80004504: 00052103 lw x2,0(x10) +80004508: 00450513 addi x10,x10,4 + +8000450c : +Zksed_sm4ed_cg_cp_bs_b3: + sm4ed x13, x29, x2, 3 # perform operation +8000450c: f02e86b3 sm4ed x13,x29,x2,0x3 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_bs_b3, Zksed_sm4ed_cg_cp_bs_b3_str) +80004510: 0004a203 lw x4,0(x9) +80004514: 00d20863 beq x4,x13,80004524 +80004518: 4a9032ef jal x5,800081c0 +8000451c: 8000450c .word 0x8000450c +80004520: 80014470 .word 0x80014470 +80004524: 00448493 addi x9,x9,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000 +80004528: 00052683 lw x13,0(x10) +8000452c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000 +80004530: 00052e03 lw x28,0(x10) +80004534: 00450513 addi x10,x10,4 + +80004538 : +Zksed_sm4ed_cg_cp_sbox_b0: + sm4ed x30, x13, x28, 3 # perform operation +80004538: f1c68f33 sm4ed x30,x13,x28,0x3 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b0, Zksed_sm4ed_cg_cp_sbox_b0_str) +8000453c: 0004a203 lw x4,0(x9) +80004540: 01e20863 beq x4,x30,80004550 +80004544: 47d032ef jal x5,800081c0 +80004548: 80004538 .word 0x80004538 +8000454c: 800144a4 .word 0x800144a4 +80004550: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x01010101 +80004554: 00052d83 lw x27,0(x10) +80004558: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x01010101 +8000455c: 00052e03 lw x28,0(x10) +80004560: 00450513 addi x10,x10,4 + +80004564 : +Zksed_sm4ed_cg_cp_sbox_b1: + sm4ed x8, x27, x28, 2 # perform operation +80004564: b1cd8433 sm4ed x8,x27,x28,0x2 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b1, Zksed_sm4ed_cg_cp_sbox_b1_str) +80004568: 0004a203 lw x4,0(x9) +8000456c: 00820863 beq x4,x8,8000457c +80004570: 451032ef jal x5,800081c0 +80004574: 80004564 .word 0x80004564 +80004578: 800144da .word 0x800144da +8000457c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x02020202 +80004580: 00052b03 lw x22,0(x10) +80004584: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x02020202 +80004588: 00052103 lw x2,0(x10) +8000458c: 00450513 addi x10,x10,4 + +80004590 : +Zksed_sm4ed_cg_cp_sbox_b2: + sm4ed x28, x22, x2, 1 # perform operation +80004590: 702b0e33 sm4ed x28,x22,x2,0x1 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b2, Zksed_sm4ed_cg_cp_sbox_b2_str) +80004594: 0004a203 lw x4,0(x9) +80004598: 01c20863 beq x4,x28,800045a8 +8000459c: 425032ef jal x5,800081c0 +800045a0: 80004590 .word 0x80004590 +800045a4: 80014510 .word 0x80014510 +800045a8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x03030303 +800045ac: 00052a03 lw x20,0(x10) +800045b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x03030303 +800045b4: 00052083 lw x1,0(x10) +800045b8: 00450513 addi x10,x10,4 + +800045bc : +Zksed_sm4ed_cg_cp_sbox_b3: + sm4ed x17, x20, x1, 3 # perform operation +800045bc: f01a08b3 sm4ed x17,x20,x1,0x3 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b3, Zksed_sm4ed_cg_cp_sbox_b3_str) +800045c0: 0004a203 lw x4,0(x9) +800045c4: 01120863 beq x4,x17,800045d4 +800045c8: 3f9032ef jal x5,800081c0 +800045cc: 800045bc .word 0x800045bc +800045d0: 80014546 .word 0x80014546 +800045d4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x04040404 +800045d8: 00052903 lw x18,0(x10) +800045dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x04040404 +800045e0: 00052383 lw x7,0(x10) +800045e4: 00450513 addi x10,x10,4 + +800045e8 : +Zksed_sm4ed_cg_cp_sbox_b4: + sm4ed x19, x18, x7, 3 # perform operation +800045e8: f07909b3 sm4ed x19,x18,x7,0x3 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b4, Zksed_sm4ed_cg_cp_sbox_b4_str) +800045ec: 0004a203 lw x4,0(x9) +800045f0: 01320863 beq x4,x19,80004600 +800045f4: 3cd032ef jal x5,800081c0 +800045f8: 800045e8 .word 0x800045e8 +800045fc: 8001457c .word 0x8001457c +80004600: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x05050505 +80004604: 00052f83 lw x31,0(x10) +80004608: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x05050505 +8000460c: 00052783 lw x15,0(x10) +80004610: 00450513 addi x10,x10,4 + +80004614 : +Zksed_sm4ed_cg_cp_sbox_b5: + sm4ed x30, x31, x15, 3 # perform operation +80004614: f0ff8f33 sm4ed x30,x31,x15,0x3 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b5, Zksed_sm4ed_cg_cp_sbox_b5_str) +80004618: 0004a203 lw x4,0(x9) +8000461c: 01e20863 beq x4,x30,8000462c +80004620: 3a1032ef jal x5,800081c0 +80004624: 80004614 .word 0x80004614 +80004628: 800145b2 .word 0x800145b2 +8000462c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x06060606 +80004630: 00052883 lw x17,0(x10) +80004634: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x06060606 +80004638: 00052e03 lw x28,0(x10) +8000463c: 00450513 addi x10,x10,4 + +80004640 : +Zksed_sm4ed_cg_cp_sbox_b6: + sm4ed x1, x17, x28, 0 # perform operation +80004640: 31c880b3 sm4ed x1,x17,x28,0x0 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b6, Zksed_sm4ed_cg_cp_sbox_b6_str) +80004644: 0004a203 lw x4,0(x9) +80004648: 00120863 beq x4,x1,80004658 +8000464c: 375032ef jal x5,800081c0 +80004650: 80004640 .word 0x80004640 +80004654: 800145e8 .word 0x800145e8 +80004658: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x07070707 +8000465c: 00052b83 lw x23,0(x10) +80004660: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x07070707 +80004664: 00052303 lw x6,0(x10) +80004668: 00450513 addi x10,x10,4 + +8000466c : +Zksed_sm4ed_cg_cp_sbox_b7: + sm4ed x11, x23, x6, 3 # perform operation +8000466c: f06b85b3 sm4ed x11,x23,x6,0x3 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b7, Zksed_sm4ed_cg_cp_sbox_b7_str) +80004670: 0004a203 lw x4,0(x9) +80004674: 00b20863 beq x4,x11,80004684 +80004678: 349032ef jal x5,800081c0 +8000467c: 8000466c .word 0x8000466c +80004680: 8001461e .word 0x8001461e +80004684: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x08080808 +80004688: 00052c03 lw x24,0(x10) +8000468c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x08080808 +80004690: 00052303 lw x6,0(x10) +80004694: 00450513 addi x10,x10,4 + +80004698 : +Zksed_sm4ed_cg_cp_sbox_b8: + sm4ed x30, x24, x6, 2 # perform operation +80004698: b06c0f33 sm4ed x30,x24,x6,0x2 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b8, Zksed_sm4ed_cg_cp_sbox_b8_str) +8000469c: 0004a203 lw x4,0(x9) +800046a0: 01e20863 beq x4,x30,800046b0 +800046a4: 31d032ef jal x5,800081c0 +800046a8: 80004698 .word 0x80004698 +800046ac: 80014654 .word 0x80014654 +800046b0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x09090909 +800046b4: 00052783 lw x15,0(x10) +800046b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x09090909 +800046bc: 00052b03 lw x22,0(x10) +800046c0: 00450513 addi x10,x10,4 + +800046c4 : +Zksed_sm4ed_cg_cp_sbox_b9: + sm4ed x29, x15, x22, 1 # perform operation +800046c4: 71678eb3 sm4ed x29,x15,x22,0x1 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b9, Zksed_sm4ed_cg_cp_sbox_b9_str) +800046c8: 0004a203 lw x4,0(x9) +800046cc: 01d20863 beq x4,x29,800046dc +800046d0: 2f1032ef jal x5,800081c0 +800046d4: 800046c4 .word 0x800046c4 +800046d8: 8001468a .word 0x8001468a +800046dc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0a0a0a0a +800046e0: 00052b83 lw x23,0(x10) +800046e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0a0a0a0a +800046e8: 00052e83 lw x29,0(x10) +800046ec: 00450513 addi x10,x10,4 + +800046f0 : +Zksed_sm4ed_cg_cp_sbox_b10: + sm4ed x7, x23, x29, 2 # perform operation +800046f0: b1db83b3 sm4ed x7,x23,x29,0x2 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b10, Zksed_sm4ed_cg_cp_sbox_b10_str) +800046f4: 0004a203 lw x4,0(x9) +800046f8: 00720863 beq x4,x7,80004708 +800046fc: 2c5032ef jal x5,800081c0 +80004700: 800046f0 .word 0x800046f0 +80004704: 800146c0 .word 0x800146c0 +80004708: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0b0b0b0b +8000470c: 00052a03 lw x20,0(x10) +80004710: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0b0b0b0b +80004714: 00052403 lw x8,0(x10) +80004718: 00450513 addi x10,x10,4 + +8000471c : +Zksed_sm4ed_cg_cp_sbox_b11: + sm4ed x2, x20, x8, 0 # perform operation +8000471c: 308a0133 sm4ed x2,x20,x8,0x0 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b11, Zksed_sm4ed_cg_cp_sbox_b11_str) +80004720: 0004a203 lw x4,0(x9) +80004724: 00220863 beq x4,x2,80004734 +80004728: 299032ef jal x5,800081c0 +8000472c: 8000471c .word 0x8000471c +80004730: 800146f7 .word 0x800146f7 +80004734: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0c0c0c0c +80004738: 00052d03 lw x26,0(x10) +8000473c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0c0c0c0c +80004740: 00052683 lw x13,0(x10) +80004744: 00450513 addi x10,x10,4 + +80004748 : +Zksed_sm4ed_cg_cp_sbox_b12: + sm4ed x11, x26, x13, 1 # perform operation +80004748: 70dd05b3 sm4ed x11,x26,x13,0x1 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b12, Zksed_sm4ed_cg_cp_sbox_b12_str) +8000474c: 0004a203 lw x4,0(x9) +80004750: 00b20863 beq x4,x11,80004760 +80004754: 26d032ef jal x5,800081c0 +80004758: 80004748 .word 0x80004748 +8000475c: 8001472e .word 0x8001472e +80004760: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0d0d0d0d +80004764: 00052603 lw x12,0(x10) +80004768: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0d0d0d0d +8000476c: 00052883 lw x17,0(x10) +80004770: 00450513 addi x10,x10,4 + +80004774 : +Zksed_sm4ed_cg_cp_sbox_b13: + sm4ed x7, x12, x17, 3 # perform operation +80004774: f11603b3 sm4ed x7,x12,x17,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b13, Zksed_sm4ed_cg_cp_sbox_b13_str) +80004778: 0004a203 lw x4,0(x9) +8000477c: 00720863 beq x4,x7,8000478c +80004780: 241032ef jal x5,800081c0 +80004784: 80004774 .word 0x80004774 +80004788: 80014765 .word 0x80014765 +8000478c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0e0e0e0e +80004790: 00052983 lw x19,0(x10) +80004794: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0e0e0e0e +80004798: 00052383 lw x7,0(x10) +8000479c: 00450513 addi x10,x10,4 + +800047a0 : +Zksed_sm4ed_cg_cp_sbox_b14: + sm4ed x20, x19, x7, 0 # perform operation +800047a0: 30798a33 sm4ed x20,x19,x7,0x0 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b14, Zksed_sm4ed_cg_cp_sbox_b14_str) +800047a4: 0004a203 lw x4,0(x9) +800047a8: 01420863 beq x4,x20,800047b8 +800047ac: 215032ef jal x5,800081c0 +800047b0: 800047a0 .word 0x800047a0 +800047b4: 8001479c .word 0x8001479c +800047b8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0f0f0f0f +800047bc: 00052383 lw x7,0(x10) +800047c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0f0f0f0f +800047c4: 00052a03 lw x20,0(x10) +800047c8: 00450513 addi x10,x10,4 + +800047cc : +Zksed_sm4ed_cg_cp_sbox_b15: + sm4ed x18, x7, x20, 3 # perform operation +800047cc: f1438933 sm4ed x18,x7,x20,0x3 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b15, Zksed_sm4ed_cg_cp_sbox_b15_str) +800047d0: 0004a203 lw x4,0(x9) +800047d4: 01220863 beq x4,x18,800047e4 +800047d8: 1e9032ef jal x5,800081c0 +800047dc: 800047cc .word 0x800047cc +800047e0: 800147d3 .word 0x800147d3 +800047e4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x10101010 +800047e8: 00052583 lw x11,0(x10) +800047ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x10101010 +800047f0: 00052903 lw x18,0(x10) +800047f4: 00450513 addi x10,x10,4 + +800047f8 : +Zksed_sm4ed_cg_cp_sbox_b16: + sm4ed x6, x11, x18, 0 # perform operation +800047f8: 31258333 sm4ed x6,x11,x18,0x0 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b16, Zksed_sm4ed_cg_cp_sbox_b16_str) +800047fc: 0004a203 lw x4,0(x9) +80004800: 00620863 beq x4,x6,80004810 +80004804: 1bd032ef jal x5,800081c0 +80004808: 800047f8 .word 0x800047f8 +8000480c: 8001480a .word 0x8001480a +80004810: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x11111111 +80004814: 00052a83 lw x21,0(x10) +80004818: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x11111111 +8000481c: 00052703 lw x14,0(x10) +80004820: 00450513 addi x10,x10,4 + +80004824 : +Zksed_sm4ed_cg_cp_sbox_b17: + sm4ed x11, x21, x14, 3 # perform operation +80004824: f0ea85b3 sm4ed x11,x21,x14,0x3 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b17, Zksed_sm4ed_cg_cp_sbox_b17_str) +80004828: 0004a203 lw x4,0(x9) +8000482c: 00b20863 beq x4,x11,8000483c +80004830: 191032ef jal x5,800081c0 +80004834: 80004824 .word 0x80004824 +80004838: 80014841 .word 0x80014841 +8000483c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x12121212 +80004840: 00052a83 lw x21,0(x10) +80004844: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x12121212 +80004848: 00052d03 lw x26,0(x10) +8000484c: 00450513 addi x10,x10,4 + +80004850 : +Zksed_sm4ed_cg_cp_sbox_b18: + sm4ed x17, x21, x26, 3 # perform operation +80004850: f1aa88b3 sm4ed x17,x21,x26,0x3 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b18, Zksed_sm4ed_cg_cp_sbox_b18_str) +80004854: 0004a203 lw x4,0(x9) +80004858: 01120863 beq x4,x17,80004868 +8000485c: 165032ef jal x5,800081c0 +80004860: 80004850 .word 0x80004850 +80004864: 80014878 .word 0x80014878 +80004868: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x13131313 +8000486c: 00052083 lw x1,0(x10) +80004870: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x13131313 +80004874: 00052d03 lw x26,0(x10) +80004878: 00450513 addi x10,x10,4 + +8000487c : +Zksed_sm4ed_cg_cp_sbox_b19: + sm4ed x16, x1, x26, 0 # perform operation +8000487c: 31a08833 sm4ed x16,x1,x26,0x0 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b19, Zksed_sm4ed_cg_cp_sbox_b19_str) +80004880: 0004a203 lw x4,0(x9) +80004884: 01020863 beq x4,x16,80004894 +80004888: 139032ef jal x5,800081c0 +8000488c: 8000487c .word 0x8000487c +80004890: 800148af .word 0x800148af +80004894: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x14141414 +80004898: 00052883 lw x17,0(x10) +8000489c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x14141414 +800048a0: 00052983 lw x19,0(x10) +800048a4: 00450513 addi x10,x10,4 + +800048a8 : +Zksed_sm4ed_cg_cp_sbox_b20: + sm4ed x29, x17, x19, 3 # perform operation +800048a8: f1388eb3 sm4ed x29,x17,x19,0x3 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b20, Zksed_sm4ed_cg_cp_sbox_b20_str) +800048ac: 0004a203 lw x4,0(x9) +800048b0: 01d20863 beq x4,x29,800048c0 +800048b4: 10d032ef jal x5,800081c0 +800048b8: 800048a8 .word 0x800048a8 +800048bc: 800148e6 .word 0x800148e6 +800048c0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x15151515 +800048c4: 00052b03 lw x22,0(x10) +800048c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x15151515 +800048cc: 00052d03 lw x26,0(x10) +800048d0: 00450513 addi x10,x10,4 + +800048d4 : +Zksed_sm4ed_cg_cp_sbox_b21: + sm4ed x1, x22, x26, 3 # perform operation +800048d4: f1ab00b3 sm4ed x1,x22,x26,0x3 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b21, Zksed_sm4ed_cg_cp_sbox_b21_str) +800048d8: 0004a203 lw x4,0(x9) +800048dc: 00120863 beq x4,x1,800048ec +800048e0: 0e1032ef jal x5,800081c0 +800048e4: 800048d4 .word 0x800048d4 +800048e8: 8001491d .word 0x8001491d +800048ec: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x16161616 +800048f0: 00052f03 lw x30,0(x10) +800048f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x16161616 +800048f8: 00052d83 lw x27,0(x10) +800048fc: 00450513 addi x10,x10,4 + +80004900 : +Zksed_sm4ed_cg_cp_sbox_b22: + sm4ed x3, x30, x27, 2 # perform operation +80004900: b1bf01b3 sm4ed x3,x30,x27,0x2 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b22, Zksed_sm4ed_cg_cp_sbox_b22_str) +80004904: 0004a203 lw x4,0(x9) +80004908: 00320863 beq x4,x3,80004918 +8000490c: 0b5032ef jal x5,800081c0 +80004910: 80004900 .word 0x80004900 +80004914: 80014954 .word 0x80014954 +80004918: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x17171717 +8000491c: 00052583 lw x11,0(x10) +80004920: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x17171717 +80004924: 00052d83 lw x27,0(x10) +80004928: 00450513 addi x10,x10,4 + +8000492c : +Zksed_sm4ed_cg_cp_sbox_b23: + sm4ed x22, x11, x27, 3 # perform operation +8000492c: f1b58b33 sm4ed x22,x11,x27,0x3 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b23, Zksed_sm4ed_cg_cp_sbox_b23_str) +80004930: 0004a203 lw x4,0(x9) +80004934: 01620863 beq x4,x22,80004944 +80004938: 089032ef jal x5,800081c0 +8000493c: 8000492c .word 0x8000492c +80004940: 8001498b .word 0x8001498b +80004944: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x18181818 +80004948: 00052603 lw x12,0(x10) +8000494c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x18181818 +80004950: 00052f03 lw x30,0(x10) +80004954: 00450513 addi x10,x10,4 + +80004958 : +Zksed_sm4ed_cg_cp_sbox_b24: + sm4ed x31, x12, x30, 0 # perform operation +80004958: 31e60fb3 sm4ed x31,x12,x30,0x0 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b24, Zksed_sm4ed_cg_cp_sbox_b24_str) +8000495c: 0004a203 lw x4,0(x9) +80004960: 01f20863 beq x4,x31,80004970 +80004964: 05d032ef jal x5,800081c0 +80004968: 80004958 .word 0x80004958 +8000496c: 800149c2 .word 0x800149c2 +80004970: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x19191919 +80004974: 00052383 lw x7,0(x10) +80004978: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x19191919 +8000497c: 00052a83 lw x21,0(x10) +80004980: 00450513 addi x10,x10,4 + +80004984 : +Zksed_sm4ed_cg_cp_sbox_b25: + sm4ed x12, x7, x21, 1 # perform operation +80004984: 71538633 sm4ed x12,x7,x21,0x1 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b25, Zksed_sm4ed_cg_cp_sbox_b25_str) +80004988: 0004a203 lw x4,0(x9) +8000498c: 00c20863 beq x4,x12,8000499c +80004990: 031032ef jal x5,800081c0 +80004994: 80004984 .word 0x80004984 +80004998: 800149f9 .word 0x800149f9 +8000499c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x1a1a1a1a +800049a0: 00052383 lw x7,0(x10) +800049a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x1a1a1a1a +800049a8: 00052b03 lw x22,0(x10) +800049ac: 00450513 addi x10,x10,4 + +800049b0 : +Zksed_sm4ed_cg_cp_sbox_b26: + sm4ed x31, x7, x22, 3 # perform operation +800049b0: f1638fb3 sm4ed x31,x7,x22,0x3 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b26, Zksed_sm4ed_cg_cp_sbox_b26_str) +800049b4: 0004a203 lw x4,0(x9) +800049b8: 01f20863 beq x4,x31,800049c8 +800049bc: 005032ef jal x5,800081c0 +800049c0: 800049b0 .word 0x800049b0 +800049c4: 80014a30 .word 0x80014a30 +800049c8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x1b1b1b1b +800049cc: 00052783 lw x15,0(x10) +800049d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x1b1b1b1b +800049d4: 00052b83 lw x23,0(x10) +800049d8: 00450513 addi x10,x10,4 + +800049dc : +Zksed_sm4ed_cg_cp_sbox_b27: + sm4ed x18, x15, x23, 2 # perform operation +800049dc: b1778933 sm4ed x18,x15,x23,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b27, Zksed_sm4ed_cg_cp_sbox_b27_str) +800049e0: 0004a203 lw x4,0(x9) +800049e4: 01220863 beq x4,x18,800049f4 +800049e8: 7d8032ef jal x5,800081c0 +800049ec: 800049dc .word 0x800049dc +800049f0: 80014a67 .word 0x80014a67 +800049f4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x1c1c1c1c +800049f8: 00052603 lw x12,0(x10) +800049fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x1c1c1c1c +80004a00: 00052b03 lw x22,0(x10) +80004a04: 00450513 addi x10,x10,4 + +80004a08 : +Zksed_sm4ed_cg_cp_sbox_b28: + sm4ed x15, x12, x22, 3 # perform operation +80004a08: f16607b3 sm4ed x15,x12,x22,0x3 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b28, Zksed_sm4ed_cg_cp_sbox_b28_str) +80004a0c: 0004a203 lw x4,0(x9) +80004a10: 00f20863 beq x4,x15,80004a20 +80004a14: 7ac032ef jal x5,800081c0 +80004a18: 80004a08 .word 0x80004a08 +80004a1c: 80014a9e .word 0x80014a9e +80004a20: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x1d1d1d1d +80004a24: 00052b83 lw x23,0(x10) +80004a28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x1d1d1d1d +80004a2c: 00052983 lw x19,0(x10) +80004a30: 00450513 addi x10,x10,4 + +80004a34 : +Zksed_sm4ed_cg_cp_sbox_b29: + sm4ed x26, x23, x19, 0 # perform operation +80004a34: 313b8d33 sm4ed x26,x23,x19,0x0 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cp_sbox_b29, Zksed_sm4ed_cg_cp_sbox_b29_str) +80004a38: 0004a203 lw x4,0(x9) +80004a3c: 01a20863 beq x4,x26,80004a4c +80004a40: 780032ef jal x5,800081c0 +80004a44: 80004a34 .word 0x80004a34 +80004a48: 80014ad5 .word 0x80014ad5 +80004a4c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x1e1e1e1e +80004a50: 00052e83 lw x29,0(x10) +80004a54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x1e1e1e1e +80004a58: 00052c03 lw x24,0(x10) +80004a5c: 00450513 addi x10,x10,4 + +80004a60 : +Zksed_sm4ed_cg_cp_sbox_b30: + sm4ed x26, x29, x24, 2 # perform operation +80004a60: b18e8d33 sm4ed x26,x29,x24,0x2 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cp_sbox_b30, Zksed_sm4ed_cg_cp_sbox_b30_str) +80004a64: 0004a203 lw x4,0(x9) +80004a68: 01a20863 beq x4,x26,80004a78 +80004a6c: 754032ef jal x5,800081c0 +80004a70: 80004a60 .word 0x80004a60 +80004a74: 80014b0c .word 0x80014b0c +80004a78: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x1f1f1f1f +80004a7c: 00052703 lw x14,0(x10) +80004a80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x1f1f1f1f +80004a84: 00052883 lw x17,0(x10) +80004a88: 00450513 addi x10,x10,4 + +80004a8c : +Zksed_sm4ed_cg_cp_sbox_b31: + sm4ed x2, x14, x17, 2 # perform operation +80004a8c: b1170133 sm4ed x2,x14,x17,0x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b31, Zksed_sm4ed_cg_cp_sbox_b31_str) +80004a90: 0004a203 lw x4,0(x9) +80004a94: 00220863 beq x4,x2,80004aa4 +80004a98: 728032ef jal x5,800081c0 +80004a9c: 80004a8c .word 0x80004a8c +80004aa0: 80014b43 .word 0x80014b43 +80004aa4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x20202020 +80004aa8: 00052383 lw x7,0(x10) +80004aac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x20202020 +80004ab0: 00052b83 lw x23,0(x10) +80004ab4: 00450513 addi x10,x10,4 + +80004ab8 : +Zksed_sm4ed_cg_cp_sbox_b32: + sm4ed x21, x7, x23, 0 # perform operation +80004ab8: 31738ab3 sm4ed x21,x7,x23,0x0 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b32, Zksed_sm4ed_cg_cp_sbox_b32_str) +80004abc: 0004a203 lw x4,0(x9) +80004ac0: 01520863 beq x4,x21,80004ad0 +80004ac4: 6fc032ef jal x5,800081c0 +80004ac8: 80004ab8 .word 0x80004ab8 +80004acc: 80014b7a .word 0x80014b7a +80004ad0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x21212121 +80004ad4: 00052083 lw x1,0(x10) +80004ad8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x21212121 +80004adc: 00052e83 lw x29,0(x10) +80004ae0: 00450513 addi x10,x10,4 + +80004ae4 : +Zksed_sm4ed_cg_cp_sbox_b33: + sm4ed x7, x1, x29, 3 # perform operation +80004ae4: f1d083b3 sm4ed x7,x1,x29,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b33, Zksed_sm4ed_cg_cp_sbox_b33_str) +80004ae8: 0004a203 lw x4,0(x9) +80004aec: 00720863 beq x4,x7,80004afc +80004af0: 6d0032ef jal x5,800081c0 +80004af4: 80004ae4 .word 0x80004ae4 +80004af8: 80014bb1 .word 0x80014bb1 +80004afc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x22222222 +80004b00: 00052e03 lw x28,0(x10) +80004b04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x22222222 +80004b08: 00052703 lw x14,0(x10) +80004b0c: 00450513 addi x10,x10,4 + +80004b10 : +Zksed_sm4ed_cg_cp_sbox_b34: + sm4ed x13, x28, x14, 2 # perform operation +80004b10: b0ee06b3 sm4ed x13,x28,x14,0x2 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b34, Zksed_sm4ed_cg_cp_sbox_b34_str) +80004b14: 0004a203 lw x4,0(x9) +80004b18: 00d20863 beq x4,x13,80004b28 +80004b1c: 6a4032ef jal x5,800081c0 +80004b20: 80004b10 .word 0x80004b10 +80004b24: 80014be8 .word 0x80014be8 +80004b28: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x23232323 +80004b2c: 00052b83 lw x23,0(x10) +80004b30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x23232323 +80004b34: 00052a83 lw x21,0(x10) +80004b38: 00450513 addi x10,x10,4 + +80004b3c : +Zksed_sm4ed_cg_cp_sbox_b35: + sm4ed x29, x23, x21, 2 # perform operation +80004b3c: b15b8eb3 sm4ed x29,x23,x21,0x2 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b35, Zksed_sm4ed_cg_cp_sbox_b35_str) +80004b40: 0004a203 lw x4,0(x9) +80004b44: 01d20863 beq x4,x29,80004b54 +80004b48: 678032ef jal x5,800081c0 +80004b4c: 80004b3c .word 0x80004b3c +80004b50: 80014c1f .word 0x80014c1f +80004b54: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x24242424 +80004b58: 00052d03 lw x26,0(x10) +80004b5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x24242424 +80004b60: 00052083 lw x1,0(x10) +80004b64: 00450513 addi x10,x10,4 + +80004b68 : +Zksed_sm4ed_cg_cp_sbox_b36: + sm4ed x23, x26, x1, 2 # perform operation +80004b68: b01d0bb3 sm4ed x23,x26,x1,0x2 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cp_sbox_b36, Zksed_sm4ed_cg_cp_sbox_b36_str) +80004b6c: 0004a203 lw x4,0(x9) +80004b70: 01720863 beq x4,x23,80004b80 +80004b74: 64c032ef jal x5,800081c0 +80004b78: 80004b68 .word 0x80004b68 +80004b7c: 80014c56 .word 0x80014c56 +80004b80: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x25252525 +80004b84: 00052d03 lw x26,0(x10) +80004b88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x25252525 +80004b8c: 00052083 lw x1,0(x10) +80004b90: 00450513 addi x10,x10,4 + +80004b94 : +Zksed_sm4ed_cg_cp_sbox_b37: + sm4ed x15, x26, x1, 2 # perform operation +80004b94: b01d07b3 sm4ed x15,x26,x1,0x2 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b37, Zksed_sm4ed_cg_cp_sbox_b37_str) +80004b98: 0004a203 lw x4,0(x9) +80004b9c: 00f20863 beq x4,x15,80004bac +80004ba0: 620032ef jal x5,800081c0 +80004ba4: 80004b94 .word 0x80004b94 +80004ba8: 80014c8d .word 0x80014c8d +80004bac: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x26262626 +80004bb0: 00052a83 lw x21,0(x10) +80004bb4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x26262626 +80004bb8: 00052403 lw x8,0(x10) +80004bbc: 00450513 addi x10,x10,4 + +80004bc0 : +Zksed_sm4ed_cg_cp_sbox_b38: + sm4ed x28, x21, x8, 1 # perform operation +80004bc0: 708a8e33 sm4ed x28,x21,x8,0x1 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b38, Zksed_sm4ed_cg_cp_sbox_b38_str) +80004bc4: 0004a203 lw x4,0(x9) +80004bc8: 01c20863 beq x4,x28,80004bd8 +80004bcc: 5f4032ef jal x5,800081c0 +80004bd0: 80004bc0 .word 0x80004bc0 +80004bd4: 80014cc4 .word 0x80014cc4 +80004bd8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x27272727 +80004bdc: 00052c03 lw x24,0(x10) +80004be0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x27272727 +80004be4: 00052d83 lw x27,0(x10) +80004be8: 00450513 addi x10,x10,4 + +80004bec : +Zksed_sm4ed_cg_cp_sbox_b39: + sm4ed x1, x24, x27, 1 # perform operation +80004bec: 71bc00b3 sm4ed x1,x24,x27,0x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b39, Zksed_sm4ed_cg_cp_sbox_b39_str) +80004bf0: 0004a203 lw x4,0(x9) +80004bf4: 00120863 beq x4,x1,80004c04 +80004bf8: 5c8032ef jal x5,800081c0 +80004bfc: 80004bec .word 0x80004bec +80004c00: 80014cfb .word 0x80014cfb +80004c04: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x28282828 +80004c08: 00052703 lw x14,0(x10) +80004c0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x28282828 +80004c10: 00052183 lw x3,0(x10) +80004c14: 00450513 addi x10,x10,4 + +80004c18 : +Zksed_sm4ed_cg_cp_sbox_b40: + sm4ed x22, x14, x3, 0 # perform operation +80004c18: 30370b33 sm4ed x22,x14,x3,0x0 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b40, Zksed_sm4ed_cg_cp_sbox_b40_str) +80004c1c: 0004a203 lw x4,0(x9) +80004c20: 01620863 beq x4,x22,80004c30 +80004c24: 59c032ef jal x5,800081c0 +80004c28: 80004c18 .word 0x80004c18 +80004c2c: 80014d32 .word 0x80014d32 +80004c30: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x29292929 +80004c34: 00052e03 lw x28,0(x10) +80004c38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x29292929 +80004c3c: 00052403 lw x8,0(x10) +80004c40: 00450513 addi x10,x10,4 + +80004c44 : +Zksed_sm4ed_cg_cp_sbox_b41: + sm4ed x29, x28, x8, 3 # perform operation +80004c44: f08e0eb3 sm4ed x29,x28,x8,0x3 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b41, Zksed_sm4ed_cg_cp_sbox_b41_str) +80004c48: 0004a203 lw x4,0(x9) +80004c4c: 01d20863 beq x4,x29,80004c5c +80004c50: 570032ef jal x5,800081c0 +80004c54: 80004c44 .word 0x80004c44 +80004c58: 80014d69 .word 0x80014d69 +80004c5c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x2a2a2a2a +80004c60: 00052f83 lw x31,0(x10) +80004c64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x2a2a2a2a +80004c68: 00052e83 lw x29,0(x10) +80004c6c: 00450513 addi x10,x10,4 + +80004c70 : +Zksed_sm4ed_cg_cp_sbox_b42: + sm4ed x27, x31, x29, 1 # perform operation +80004c70: 71df8db3 sm4ed x27,x31,x29,0x1 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b42, Zksed_sm4ed_cg_cp_sbox_b42_str) +80004c74: 0004a203 lw x4,0(x9) +80004c78: 01b20863 beq x4,x27,80004c88 +80004c7c: 544032ef jal x5,800081c0 +80004c80: 80004c70 .word 0x80004c70 +80004c84: 80014da0 .word 0x80014da0 +80004c88: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x2b2b2b2b +80004c8c: 00052303 lw x6,0(x10) +80004c90: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x2b2b2b2b +80004c94: 00052c83 lw x25,0(x10) +80004c98: 00450513 addi x10,x10,4 + +80004c9c : +Zksed_sm4ed_cg_cp_sbox_b43: + sm4ed x20, x6, x25, 1 # perform operation +80004c9c: 71930a33 sm4ed x20,x6,x25,0x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b43, Zksed_sm4ed_cg_cp_sbox_b43_str) +80004ca0: 0004a203 lw x4,0(x9) +80004ca4: 01420863 beq x4,x20,80004cb4 +80004ca8: 518032ef jal x5,800081c0 +80004cac: 80004c9c .word 0x80004c9c +80004cb0: 80014dd7 .word 0x80014dd7 +80004cb4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x2c2c2c2c +80004cb8: 00052903 lw x18,0(x10) +80004cbc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x2c2c2c2c +80004cc0: 00052303 lw x6,0(x10) +80004cc4: 00450513 addi x10,x10,4 + +80004cc8 : +Zksed_sm4ed_cg_cp_sbox_b44: + sm4ed x26, x18, x6, 0 # perform operation +80004cc8: 30690d33 sm4ed x26,x18,x6,0x0 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cp_sbox_b44, Zksed_sm4ed_cg_cp_sbox_b44_str) +80004ccc: 0004a203 lw x4,0(x9) +80004cd0: 01a20863 beq x4,x26,80004ce0 +80004cd4: 4ec032ef jal x5,800081c0 +80004cd8: 80004cc8 .word 0x80004cc8 +80004cdc: 80014e0e .word 0x80014e0e +80004ce0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x2d2d2d2d +80004ce4: 00052b83 lw x23,0(x10) +80004ce8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x2d2d2d2d +80004cec: 00052e03 lw x28,0(x10) +80004cf0: 00450513 addi x10,x10,4 + +80004cf4 : +Zksed_sm4ed_cg_cp_sbox_b45: + sm4ed x31, x23, x28, 2 # perform operation +80004cf4: b1cb8fb3 sm4ed x31,x23,x28,0x2 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b45, Zksed_sm4ed_cg_cp_sbox_b45_str) +80004cf8: 0004a203 lw x4,0(x9) +80004cfc: 01f20863 beq x4,x31,80004d0c +80004d00: 4c0032ef jal x5,800081c0 +80004d04: 80004cf4 .word 0x80004cf4 +80004d08: 80014e45 .word 0x80014e45 +80004d0c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x2e2e2e2e +80004d10: 00052a83 lw x21,0(x10) +80004d14: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x2e2e2e2e +80004d18: 00052c03 lw x24,0(x10) +80004d1c: 00450513 addi x10,x10,4 + +80004d20 : +Zksed_sm4ed_cg_cp_sbox_b46: + sm4ed x6, x21, x24, 3 # perform operation +80004d20: f18a8333 sm4ed x6,x21,x24,0x3 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b46, Zksed_sm4ed_cg_cp_sbox_b46_str) +80004d24: 0004a203 lw x4,0(x9) +80004d28: 00620863 beq x4,x6,80004d38 +80004d2c: 494032ef jal x5,800081c0 +80004d30: 80004d20 .word 0x80004d20 +80004d34: 80014e7c .word 0x80014e7c +80004d38: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x2f2f2f2f +80004d3c: 00052b83 lw x23,0(x10) +80004d40: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x2f2f2f2f +80004d44: 00052c83 lw x25,0(x10) +80004d48: 00450513 addi x10,x10,4 + +80004d4c : +Zksed_sm4ed_cg_cp_sbox_b47: + sm4ed x15, x23, x25, 1 # perform operation +80004d4c: 719b87b3 sm4ed x15,x23,x25,0x1 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b47, Zksed_sm4ed_cg_cp_sbox_b47_str) +80004d50: 0004a203 lw x4,0(x9) +80004d54: 00f20863 beq x4,x15,80004d64 +80004d58: 468032ef jal x5,800081c0 +80004d5c: 80004d4c .word 0x80004d4c +80004d60: 80014eb3 .word 0x80014eb3 +80004d64: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x30303030 +80004d68: 00052783 lw x15,0(x10) +80004d6c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x30303030 +80004d70: 00052103 lw x2,0(x10) +80004d74: 00450513 addi x10,x10,4 + +80004d78 : +Zksed_sm4ed_cg_cp_sbox_b48: + sm4ed x8, x15, x2, 2 # perform operation +80004d78: b0278433 sm4ed x8,x15,x2,0x2 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b48, Zksed_sm4ed_cg_cp_sbox_b48_str) +80004d7c: 0004a203 lw x4,0(x9) +80004d80: 00820863 beq x4,x8,80004d90 +80004d84: 43c032ef jal x5,800081c0 +80004d88: 80004d78 .word 0x80004d78 +80004d8c: 80014eea .word 0x80014eea +80004d90: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x31313131 +80004d94: 00052683 lw x13,0(x10) +80004d98: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x31313131 +80004d9c: 00052603 lw x12,0(x10) +80004da0: 00450513 addi x10,x10,4 + +80004da4 : +Zksed_sm4ed_cg_cp_sbox_b49: + sm4ed x15, x13, x12, 1 # perform operation +80004da4: 70c687b3 sm4ed x15,x13,x12,0x1 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b49, Zksed_sm4ed_cg_cp_sbox_b49_str) +80004da8: 0004a203 lw x4,0(x9) +80004dac: 00f20863 beq x4,x15,80004dbc +80004db0: 410032ef jal x5,800081c0 +80004db4: 80004da4 .word 0x80004da4 +80004db8: 80014f21 .word 0x80014f21 +80004dbc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x32323232 +80004dc0: 00052f03 lw x30,0(x10) +80004dc4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x32323232 +80004dc8: 00052703 lw x14,0(x10) +80004dcc: 00450513 addi x10,x10,4 + +80004dd0 : +Zksed_sm4ed_cg_cp_sbox_b50: + sm4ed x24, x30, x14, 2 # perform operation +80004dd0: b0ef0c33 sm4ed x24,x30,x14,0x2 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b50, Zksed_sm4ed_cg_cp_sbox_b50_str) +80004dd4: 0004a203 lw x4,0(x9) +80004dd8: 01820863 beq x4,x24,80004de8 +80004ddc: 3e4032ef jal x5,800081c0 +80004de0: 80004dd0 .word 0x80004dd0 +80004de4: 80014f58 .word 0x80014f58 +80004de8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x33333333 +80004dec: 00052703 lw x14,0(x10) +80004df0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x33333333 +80004df4: 00052403 lw x8,0(x10) +80004df8: 00450513 addi x10,x10,4 + +80004dfc : +Zksed_sm4ed_cg_cp_sbox_b51: + sm4ed x31, x14, x8, 3 # perform operation +80004dfc: f0870fb3 sm4ed x31,x14,x8,0x3 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b51, Zksed_sm4ed_cg_cp_sbox_b51_str) +80004e00: 0004a203 lw x4,0(x9) +80004e04: 01f20863 beq x4,x31,80004e14 +80004e08: 3b8032ef jal x5,800081c0 +80004e0c: 80004dfc .word 0x80004dfc +80004e10: 80014f8f .word 0x80014f8f +80004e14: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x34343434 +80004e18: 00052d83 lw x27,0(x10) +80004e1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x34343434 +80004e20: 00052b83 lw x23,0(x10) +80004e24: 00450513 addi x10,x10,4 + +80004e28 : +Zksed_sm4ed_cg_cp_sbox_b52: + sm4ed x15, x27, x23, 3 # perform operation +80004e28: f17d87b3 sm4ed x15,x27,x23,0x3 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b52, Zksed_sm4ed_cg_cp_sbox_b52_str) +80004e2c: 0004a203 lw x4,0(x9) +80004e30: 00f20863 beq x4,x15,80004e40 +80004e34: 38c032ef jal x5,800081c0 +80004e38: 80004e28 .word 0x80004e28 +80004e3c: 80014fc6 .word 0x80014fc6 +80004e40: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x35353535 +80004e44: 00052e03 lw x28,0(x10) +80004e48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x35353535 +80004e4c: 00052983 lw x19,0(x10) +80004e50: 00450513 addi x10,x10,4 + +80004e54 : +Zksed_sm4ed_cg_cp_sbox_b53: + sm4ed x29, x28, x19, 2 # perform operation +80004e54: b13e0eb3 sm4ed x29,x28,x19,0x2 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b53, Zksed_sm4ed_cg_cp_sbox_b53_str) +80004e58: 0004a203 lw x4,0(x9) +80004e5c: 01d20863 beq x4,x29,80004e6c +80004e60: 360032ef jal x5,800081c0 +80004e64: 80004e54 .word 0x80004e54 +80004e68: 80014ffd .word 0x80014ffd +80004e6c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x36363636 +80004e70: 00052d83 lw x27,0(x10) +80004e74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x36363636 +80004e78: 00052783 lw x15,0(x10) +80004e7c: 00450513 addi x10,x10,4 + +80004e80 : +Zksed_sm4ed_cg_cp_sbox_b54: + sm4ed x20, x27, x15, 1 # perform operation +80004e80: 70fd8a33 sm4ed x20,x27,x15,0x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b54, Zksed_sm4ed_cg_cp_sbox_b54_str) +80004e84: 0004a203 lw x4,0(x9) +80004e88: 01420863 beq x4,x20,80004e98 +80004e8c: 334032ef jal x5,800081c0 +80004e90: 80004e80 .word 0x80004e80 +80004e94: 80015034 .word 0x80015034 +80004e98: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x37373737 +80004e9c: 00052983 lw x19,0(x10) +80004ea0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x37373737 +80004ea4: 00052583 lw x11,0(x10) +80004ea8: 00450513 addi x10,x10,4 + +80004eac : +Zksed_sm4ed_cg_cp_sbox_b55: + sm4ed x20, x19, x11, 0 # perform operation +80004eac: 30b98a33 sm4ed x20,x19,x11,0x0 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b55, Zksed_sm4ed_cg_cp_sbox_b55_str) +80004eb0: 0004a203 lw x4,0(x9) +80004eb4: 01420863 beq x4,x20,80004ec4 +80004eb8: 308032ef jal x5,800081c0 +80004ebc: 80004eac .word 0x80004eac +80004ec0: 8001506b .word 0x8001506b +80004ec4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x38383838 +80004ec8: 00052083 lw x1,0(x10) +80004ecc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x38383838 +80004ed0: 00052f83 lw x31,0(x10) +80004ed4: 00450513 addi x10,x10,4 + +80004ed8 : +Zksed_sm4ed_cg_cp_sbox_b56: + sm4ed x15, x1, x31, 1 # perform operation +80004ed8: 71f087b3 sm4ed x15,x1,x31,0x1 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b56, Zksed_sm4ed_cg_cp_sbox_b56_str) +80004edc: 0004a203 lw x4,0(x9) +80004ee0: 00f20863 beq x4,x15,80004ef0 +80004ee4: 2dc032ef jal x5,800081c0 +80004ee8: 80004ed8 .word 0x80004ed8 +80004eec: 800150a2 .word 0x800150a2 +80004ef0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x39393939 +80004ef4: 00052083 lw x1,0(x10) +80004ef8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x39393939 +80004efc: 00052d03 lw x26,0(x10) +80004f00: 00450513 addi x10,x10,4 + +80004f04 : +Zksed_sm4ed_cg_cp_sbox_b57: + sm4ed x7, x1, x26, 2 # perform operation +80004f04: b1a083b3 sm4ed x7,x1,x26,0x2 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b57, Zksed_sm4ed_cg_cp_sbox_b57_str) +80004f08: 0004a203 lw x4,0(x9) +80004f0c: 00720863 beq x4,x7,80004f1c +80004f10: 2b0032ef jal x5,800081c0 +80004f14: 80004f04 .word 0x80004f04 +80004f18: 800150d9 .word 0x800150d9 +80004f1c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x3a3a3a3a +80004f20: 00052403 lw x8,0(x10) +80004f24: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x3a3a3a3a +80004f28: 00052783 lw x15,0(x10) +80004f2c: 00450513 addi x10,x10,4 + +80004f30 : +Zksed_sm4ed_cg_cp_sbox_b58: + sm4ed x29, x8, x15, 0 # perform operation +80004f30: 30f40eb3 sm4ed x29,x8,x15,0x0 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b58, Zksed_sm4ed_cg_cp_sbox_b58_str) +80004f34: 0004a203 lw x4,0(x9) +80004f38: 01d20863 beq x4,x29,80004f48 +80004f3c: 284032ef jal x5,800081c0 +80004f40: 80004f30 .word 0x80004f30 +80004f44: 80015110 .word 0x80015110 +80004f48: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x3b3b3b3b +80004f4c: 00052883 lw x17,0(x10) +80004f50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x3b3b3b3b +80004f54: 00052f83 lw x31,0(x10) +80004f58: 00450513 addi x10,x10,4 + +80004f5c : +Zksed_sm4ed_cg_cp_sbox_b59: + sm4ed x15, x17, x31, 3 # perform operation +80004f5c: f1f887b3 sm4ed x15,x17,x31,0x3 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b59, Zksed_sm4ed_cg_cp_sbox_b59_str) +80004f60: 0004a203 lw x4,0(x9) +80004f64: 00f20863 beq x4,x15,80004f74 +80004f68: 258032ef jal x5,800081c0 +80004f6c: 80004f5c .word 0x80004f5c +80004f70: 80015147 .word 0x80015147 +80004f74: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x3c3c3c3c +80004f78: 00052c03 lw x24,0(x10) +80004f7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x3c3c3c3c +80004f80: 00052783 lw x15,0(x10) +80004f84: 00450513 addi x10,x10,4 + +80004f88 : +Zksed_sm4ed_cg_cp_sbox_b60: + sm4ed x3, x24, x15, 1 # perform operation +80004f88: 70fc01b3 sm4ed x3,x24,x15,0x1 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b60, Zksed_sm4ed_cg_cp_sbox_b60_str) +80004f8c: 0004a203 lw x4,0(x9) +80004f90: 00320863 beq x4,x3,80004fa0 +80004f94: 22c032ef jal x5,800081c0 +80004f98: 80004f88 .word 0x80004f88 +80004f9c: 8001517e .word 0x8001517e +80004fa0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x3d3d3d3d +80004fa4: 00052103 lw x2,0(x10) +80004fa8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x3d3d3d3d +80004fac: 00052883 lw x17,0(x10) +80004fb0: 00450513 addi x10,x10,4 + +80004fb4 : +Zksed_sm4ed_cg_cp_sbox_b61: + sm4ed x21, x2, x17, 3 # perform operation +80004fb4: f1110ab3 sm4ed x21,x2,x17,0x3 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b61, Zksed_sm4ed_cg_cp_sbox_b61_str) +80004fb8: 0004a203 lw x4,0(x9) +80004fbc: 01520863 beq x4,x21,80004fcc +80004fc0: 200032ef jal x5,800081c0 +80004fc4: 80004fb4 .word 0x80004fb4 +80004fc8: 800151b5 .word 0x800151b5 +80004fcc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x3e3e3e3e +80004fd0: 00052183 lw x3,0(x10) +80004fd4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x3e3e3e3e +80004fd8: 00052e83 lw x29,0(x10) +80004fdc: 00450513 addi x10,x10,4 + +80004fe0 : +Zksed_sm4ed_cg_cp_sbox_b62: + sm4ed x17, x3, x29, 3 # perform operation +80004fe0: f1d188b3 sm4ed x17,x3,x29,0x3 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b62, Zksed_sm4ed_cg_cp_sbox_b62_str) +80004fe4: 0004a203 lw x4,0(x9) +80004fe8: 01120863 beq x4,x17,80004ff8 +80004fec: 1d4032ef jal x5,800081c0 +80004ff0: 80004fe0 .word 0x80004fe0 +80004ff4: 800151ec .word 0x800151ec +80004ff8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x3f3f3f3f +80004ffc: 00052803 lw x16,0(x10) +80005000: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x3f3f3f3f +80005004: 00052f83 lw x31,0(x10) +80005008: 00450513 addi x10,x10,4 + +8000500c : +Zksed_sm4ed_cg_cp_sbox_b63: + sm4ed x26, x16, x31, 3 # perform operation +8000500c: f1f80d33 sm4ed x26,x16,x31,0x3 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cp_sbox_b63, Zksed_sm4ed_cg_cp_sbox_b63_str) +80005010: 0004a203 lw x4,0(x9) +80005014: 01a20863 beq x4,x26,80005024 +80005018: 1a8032ef jal x5,800081c0 +8000501c: 8000500c .word 0x8000500c +80005020: 80015223 .word 0x80015223 +80005024: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x40404040 +80005028: 00052903 lw x18,0(x10) +8000502c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x40404040 +80005030: 00052f83 lw x31,0(x10) +80005034: 00450513 addi x10,x10,4 + +80005038 : +Zksed_sm4ed_cg_cp_sbox_b64: + sm4ed x16, x18, x31, 1 # perform operation +80005038: 71f90833 sm4ed x16,x18,x31,0x1 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b64, Zksed_sm4ed_cg_cp_sbox_b64_str) +8000503c: 0004a203 lw x4,0(x9) +80005040: 01020863 beq x4,x16,80005050 +80005044: 17c032ef jal x5,800081c0 +80005048: 80005038 .word 0x80005038 +8000504c: 8001525a .word 0x8001525a +80005050: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x41414141 +80005054: 00052583 lw x11,0(x10) +80005058: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x41414141 +8000505c: 00052103 lw x2,0(x10) +80005060: 00450513 addi x10,x10,4 + +80005064 : +Zksed_sm4ed_cg_cp_sbox_b65: + sm4ed x16, x11, x2, 0 # perform operation +80005064: 30258833 sm4ed x16,x11,x2,0x0 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b65, Zksed_sm4ed_cg_cp_sbox_b65_str) +80005068: 0004a203 lw x4,0(x9) +8000506c: 01020863 beq x4,x16,8000507c +80005070: 150032ef jal x5,800081c0 +80005074: 80005064 .word 0x80005064 +80005078: 80015291 .word 0x80015291 +8000507c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x42424242 +80005080: 00052f03 lw x30,0(x10) +80005084: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x42424242 +80005088: 00052e83 lw x29,0(x10) +8000508c: 00450513 addi x10,x10,4 + +80005090 : +Zksed_sm4ed_cg_cp_sbox_b66: + sm4ed x25, x30, x29, 3 # perform operation +80005090: f1df0cb3 sm4ed x25,x30,x29,0x3 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b66, Zksed_sm4ed_cg_cp_sbox_b66_str) +80005094: 0004a203 lw x4,0(x9) +80005098: 01920863 beq x4,x25,800050a8 +8000509c: 124032ef jal x5,800081c0 +800050a0: 80005090 .word 0x80005090 +800050a4: 800152c8 .word 0x800152c8 +800050a8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x43434343 +800050ac: 00052b83 lw x23,0(x10) +800050b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x43434343 +800050b4: 00052b03 lw x22,0(x10) +800050b8: 00450513 addi x10,x10,4 + +800050bc : +Zksed_sm4ed_cg_cp_sbox_b67: + sm4ed x27, x23, x22, 0 # perform operation +800050bc: 316b8db3 sm4ed x27,x23,x22,0x0 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b67, Zksed_sm4ed_cg_cp_sbox_b67_str) +800050c0: 0004a203 lw x4,0(x9) +800050c4: 01b20863 beq x4,x27,800050d4 +800050c8: 0f8032ef jal x5,800081c0 +800050cc: 800050bc .word 0x800050bc +800050d0: 800152ff .word 0x800152ff +800050d4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x44444444 +800050d8: 00052d83 lw x27,0(x10) +800050dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x44444444 +800050e0: 00052a83 lw x21,0(x10) +800050e4: 00450513 addi x10,x10,4 + +800050e8 : +Zksed_sm4ed_cg_cp_sbox_b68: + sm4ed x24, x27, x21, 0 # perform operation +800050e8: 315d8c33 sm4ed x24,x27,x21,0x0 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b68, Zksed_sm4ed_cg_cp_sbox_b68_str) +800050ec: 0004a203 lw x4,0(x9) +800050f0: 01820863 beq x4,x24,80005100 +800050f4: 0cc032ef jal x5,800081c0 +800050f8: 800050e8 .word 0x800050e8 +800050fc: 80015336 .word 0x80015336 +80005100: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x45454545 +80005104: 00052b03 lw x22,0(x10) +80005108: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x45454545 +8000510c: 00052a03 lw x20,0(x10) +80005110: 00450513 addi x10,x10,4 + +80005114 : +Zksed_sm4ed_cg_cp_sbox_b69: + sm4ed x17, x22, x20, 2 # perform operation +80005114: b14b08b3 sm4ed x17,x22,x20,0x2 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b69, Zksed_sm4ed_cg_cp_sbox_b69_str) +80005118: 0004a203 lw x4,0(x9) +8000511c: 01120863 beq x4,x17,8000512c +80005120: 0a0032ef jal x5,800081c0 +80005124: 80005114 .word 0x80005114 +80005128: 8001536d .word 0x8001536d +8000512c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x46464646 +80005130: 00052b03 lw x22,0(x10) +80005134: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x46464646 +80005138: 00052c03 lw x24,0(x10) +8000513c: 00450513 addi x10,x10,4 + +80005140 : +Zksed_sm4ed_cg_cp_sbox_b70: + sm4ed x16, x22, x24, 1 # perform operation +80005140: 718b0833 sm4ed x16,x22,x24,0x1 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b70, Zksed_sm4ed_cg_cp_sbox_b70_str) +80005144: 0004a203 lw x4,0(x9) +80005148: 01020863 beq x4,x16,80005158 +8000514c: 074032ef jal x5,800081c0 +80005150: 80005140 .word 0x80005140 +80005154: 800153a4 .word 0x800153a4 +80005158: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x47474747 +8000515c: 00052d83 lw x27,0(x10) +80005160: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x47474747 +80005164: 00052983 lw x19,0(x10) +80005168: 00450513 addi x10,x10,4 + +8000516c : +Zksed_sm4ed_cg_cp_sbox_b71: + sm4ed x23, x27, x19, 1 # perform operation +8000516c: 713d8bb3 sm4ed x23,x27,x19,0x1 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cp_sbox_b71, Zksed_sm4ed_cg_cp_sbox_b71_str) +80005170: 0004a203 lw x4,0(x9) +80005174: 01720863 beq x4,x23,80005184 +80005178: 048032ef jal x5,800081c0 +8000517c: 8000516c .word 0x8000516c +80005180: 800153db .word 0x800153db +80005184: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x48484848 +80005188: 00052403 lw x8,0(x10) +8000518c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x48484848 +80005190: 00052783 lw x15,0(x10) +80005194: 00450513 addi x10,x10,4 + +80005198 : +Zksed_sm4ed_cg_cp_sbox_b72: + sm4ed x6, x8, x15, 2 # perform operation +80005198: b0f40333 sm4ed x6,x8,x15,0x2 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b72, Zksed_sm4ed_cg_cp_sbox_b72_str) +8000519c: 0004a203 lw x4,0(x9) +800051a0: 00620863 beq x4,x6,800051b0 +800051a4: 01c032ef jal x5,800081c0 +800051a8: 80005198 .word 0x80005198 +800051ac: 80015412 .word 0x80015412 +800051b0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x49494949 +800051b4: 00052d83 lw x27,0(x10) +800051b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x49494949 +800051bc: 00052403 lw x8,0(x10) +800051c0: 00450513 addi x10,x10,4 + +800051c4 : +Zksed_sm4ed_cg_cp_sbox_b73: + sm4ed x18, x27, x8, 3 # perform operation +800051c4: f08d8933 sm4ed x18,x27,x8,0x3 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b73, Zksed_sm4ed_cg_cp_sbox_b73_str) +800051c8: 0004a203 lw x4,0(x9) +800051cc: 01220863 beq x4,x18,800051dc +800051d0: 7f1022ef jal x5,800081c0 +800051d4: 800051c4 .word 0x800051c4 +800051d8: 80015449 .word 0x80015449 +800051dc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x4a4a4a4a +800051e0: 00052983 lw x19,0(x10) +800051e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x4a4a4a4a +800051e8: 00052a03 lw x20,0(x10) +800051ec: 00450513 addi x10,x10,4 + +800051f0 : +Zksed_sm4ed_cg_cp_sbox_b74: + sm4ed x31, x19, x20, 1 # perform operation +800051f0: 71498fb3 sm4ed x31,x19,x20,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b74, Zksed_sm4ed_cg_cp_sbox_b74_str) +800051f4: 0004a203 lw x4,0(x9) +800051f8: 01f20863 beq x4,x31,80005208 +800051fc: 7c5022ef jal x5,800081c0 +80005200: 800051f0 .word 0x800051f0 +80005204: 80015480 .word 0x80015480 +80005208: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x4b4b4b4b +8000520c: 00052a03 lw x20,0(x10) +80005210: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x4b4b4b4b +80005214: 00052703 lw x14,0(x10) +80005218: 00450513 addi x10,x10,4 + +8000521c : +Zksed_sm4ed_cg_cp_sbox_b75: + sm4ed x6, x20, x14, 3 # perform operation +8000521c: f0ea0333 sm4ed x6,x20,x14,0x3 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b75, Zksed_sm4ed_cg_cp_sbox_b75_str) +80005220: 0004a203 lw x4,0(x9) +80005224: 00620863 beq x4,x6,80005234 +80005228: 799022ef jal x5,800081c0 +8000522c: 8000521c .word 0x8000521c +80005230: 800154b7 .word 0x800154b7 +80005234: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x4c4c4c4c +80005238: 00052e83 lw x29,0(x10) +8000523c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x4c4c4c4c +80005240: 00052803 lw x16,0(x10) +80005244: 00450513 addi x10,x10,4 + +80005248 : +Zksed_sm4ed_cg_cp_sbox_b76: + sm4ed x21, x29, x16, 1 # perform operation +80005248: 710e8ab3 sm4ed x21,x29,x16,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b76, Zksed_sm4ed_cg_cp_sbox_b76_str) +8000524c: 0004a203 lw x4,0(x9) +80005250: 01520863 beq x4,x21,80005260 +80005254: 76d022ef jal x5,800081c0 +80005258: 80005248 .word 0x80005248 +8000525c: 800154ee .word 0x800154ee +80005260: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x4d4d4d4d +80005264: 00052b03 lw x22,0(x10) +80005268: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x4d4d4d4d +8000526c: 00052183 lw x3,0(x10) +80005270: 00450513 addi x10,x10,4 + +80005274 : +Zksed_sm4ed_cg_cp_sbox_b77: + sm4ed x31, x22, x3, 1 # perform operation +80005274: 703b0fb3 sm4ed x31,x22,x3,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b77, Zksed_sm4ed_cg_cp_sbox_b77_str) +80005278: 0004a203 lw x4,0(x9) +8000527c: 01f20863 beq x4,x31,8000528c +80005280: 741022ef jal x5,800081c0 +80005284: 80005274 .word 0x80005274 +80005288: 80015525 .word 0x80015525 +8000528c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x4e4e4e4e +80005290: 00052983 lw x19,0(x10) +80005294: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x4e4e4e4e +80005298: 00052a03 lw x20,0(x10) +8000529c: 00450513 addi x10,x10,4 + +800052a0 : +Zksed_sm4ed_cg_cp_sbox_b78: + sm4ed x17, x19, x20, 1 # perform operation +800052a0: 714988b3 sm4ed x17,x19,x20,0x1 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b78, Zksed_sm4ed_cg_cp_sbox_b78_str) +800052a4: 0004a203 lw x4,0(x9) +800052a8: 01120863 beq x4,x17,800052b8 +800052ac: 715022ef jal x5,800081c0 +800052b0: 800052a0 .word 0x800052a0 +800052b4: 8001555c .word 0x8001555c +800052b8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x4f4f4f4f +800052bc: 00052c03 lw x24,0(x10) +800052c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x4f4f4f4f +800052c4: 00052c83 lw x25,0(x10) +800052c8: 00450513 addi x10,x10,4 + +800052cc : +Zksed_sm4ed_cg_cp_sbox_b79: + sm4ed x8, x24, x25, 2 # perform operation +800052cc: b19c0433 sm4ed x8,x24,x25,0x2 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b79, Zksed_sm4ed_cg_cp_sbox_b79_str) +800052d0: 0004a203 lw x4,0(x9) +800052d4: 00820863 beq x4,x8,800052e4 +800052d8: 6e9022ef jal x5,800081c0 +800052dc: 800052cc .word 0x800052cc +800052e0: 80015593 .word 0x80015593 +800052e4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x50505050 +800052e8: 00052b03 lw x22,0(x10) +800052ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x50505050 +800052f0: 00052b83 lw x23,0(x10) +800052f4: 00450513 addi x10,x10,4 + +800052f8 : +Zksed_sm4ed_cg_cp_sbox_b80: + sm4ed x20, x22, x23, 3 # perform operation +800052f8: f17b0a33 sm4ed x20,x22,x23,0x3 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b80, Zksed_sm4ed_cg_cp_sbox_b80_str) +800052fc: 0004a203 lw x4,0(x9) +80005300: 01420863 beq x4,x20,80005310 +80005304: 6bd022ef jal x5,800081c0 +80005308: 800052f8 .word 0x800052f8 +8000530c: 800155ca .word 0x800155ca +80005310: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x51515151 +80005314: 00052683 lw x13,0(x10) +80005318: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x51515151 +8000531c: 00052603 lw x12,0(x10) +80005320: 00450513 addi x10,x10,4 + +80005324 : +Zksed_sm4ed_cg_cp_sbox_b81: + sm4ed x2, x13, x12, 2 # perform operation +80005324: b0c68133 sm4ed x2,x13,x12,0x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b81, Zksed_sm4ed_cg_cp_sbox_b81_str) +80005328: 0004a203 lw x4,0(x9) +8000532c: 00220863 beq x4,x2,8000533c +80005330: 691022ef jal x5,800081c0 +80005334: 80005324 .word 0x80005324 +80005338: 80015601 .word 0x80015601 +8000533c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x52525252 +80005340: 00052f83 lw x31,0(x10) +80005344: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x52525252 +80005348: 00052803 lw x16,0(x10) +8000534c: 00450513 addi x10,x10,4 + +80005350 : +Zksed_sm4ed_cg_cp_sbox_b82: + sm4ed x13, x31, x16, 2 # perform operation +80005350: b10f86b3 sm4ed x13,x31,x16,0x2 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b82, Zksed_sm4ed_cg_cp_sbox_b82_str) +80005354: 0004a203 lw x4,0(x9) +80005358: 00d20863 beq x4,x13,80005368 +8000535c: 665022ef jal x5,800081c0 +80005360: 80005350 .word 0x80005350 +80005364: 80015638 .word 0x80015638 +80005368: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x53535353 +8000536c: 00052e03 lw x28,0(x10) +80005370: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x53535353 +80005374: 00052683 lw x13,0(x10) +80005378: 00450513 addi x10,x10,4 + +8000537c : +Zksed_sm4ed_cg_cp_sbox_b83: + sm4ed x30, x28, x13, 0 # perform operation +8000537c: 30de0f33 sm4ed x30,x28,x13,0x0 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b83, Zksed_sm4ed_cg_cp_sbox_b83_str) +80005380: 0004a203 lw x4,0(x9) +80005384: 01e20863 beq x4,x30,80005394 +80005388: 639022ef jal x5,800081c0 +8000538c: 8000537c .word 0x8000537c +80005390: 8001566f .word 0x8001566f +80005394: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x54545454 +80005398: 00052383 lw x7,0(x10) +8000539c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x54545454 +800053a0: 00052d03 lw x26,0(x10) +800053a4: 00450513 addi x10,x10,4 + +800053a8 : +Zksed_sm4ed_cg_cp_sbox_b84: + sm4ed x25, x7, x26, 3 # perform operation +800053a8: f1a38cb3 sm4ed x25,x7,x26,0x3 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b84, Zksed_sm4ed_cg_cp_sbox_b84_str) +800053ac: 0004a203 lw x4,0(x9) +800053b0: 01920863 beq x4,x25,800053c0 +800053b4: 60d022ef jal x5,800081c0 +800053b8: 800053a8 .word 0x800053a8 +800053bc: 800156a6 .word 0x800156a6 +800053c0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x55555555 +800053c4: 00052803 lw x16,0(x10) +800053c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x55555555 +800053cc: 00052f03 lw x30,0(x10) +800053d0: 00450513 addi x10,x10,4 + +800053d4 : +Zksed_sm4ed_cg_cp_sbox_b85: + sm4ed x31, x16, x30, 0 # perform operation +800053d4: 31e80fb3 sm4ed x31,x16,x30,0x0 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b85, Zksed_sm4ed_cg_cp_sbox_b85_str) +800053d8: 0004a203 lw x4,0(x9) +800053dc: 01f20863 beq x4,x31,800053ec +800053e0: 5e1022ef jal x5,800081c0 +800053e4: 800053d4 .word 0x800053d4 +800053e8: 800156dd .word 0x800156dd +800053ec: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x56565656 +800053f0: 00052a83 lw x21,0(x10) +800053f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x56565656 +800053f8: 00052f03 lw x30,0(x10) +800053fc: 00450513 addi x10,x10,4 + +80005400 : +Zksed_sm4ed_cg_cp_sbox_b86: + sm4ed x3, x21, x30, 3 # perform operation +80005400: f1ea81b3 sm4ed x3,x21,x30,0x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b86, Zksed_sm4ed_cg_cp_sbox_b86_str) +80005404: 0004a203 lw x4,0(x9) +80005408: 00320863 beq x4,x3,80005418 +8000540c: 5b5022ef jal x5,800081c0 +80005410: 80005400 .word 0x80005400 +80005414: 80015714 .word 0x80015714 +80005418: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x57575757 +8000541c: 00052403 lw x8,0(x10) +80005420: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x57575757 +80005424: 00052803 lw x16,0(x10) +80005428: 00450513 addi x10,x10,4 + +8000542c : +Zksed_sm4ed_cg_cp_sbox_b87: + sm4ed x2, x8, x16, 1 # perform operation +8000542c: 71040133 sm4ed x2,x8,x16,0x1 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b87, Zksed_sm4ed_cg_cp_sbox_b87_str) +80005430: 0004a203 lw x4,0(x9) +80005434: 00220863 beq x4,x2,80005444 +80005438: 589022ef jal x5,800081c0 +8000543c: 8000542c .word 0x8000542c +80005440: 8001574b .word 0x8001574b +80005444: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x58585858 +80005448: 00052883 lw x17,0(x10) +8000544c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x58585858 +80005450: 00052183 lw x3,0(x10) +80005454: 00450513 addi x10,x10,4 + +80005458 : +Zksed_sm4ed_cg_cp_sbox_b88: + sm4ed x12, x17, x3, 0 # perform operation +80005458: 30388633 sm4ed x12,x17,x3,0x0 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b88, Zksed_sm4ed_cg_cp_sbox_b88_str) +8000545c: 0004a203 lw x4,0(x9) +80005460: 00c20863 beq x4,x12,80005470 +80005464: 55d022ef jal x5,800081c0 +80005468: 80005458 .word 0x80005458 +8000546c: 80015782 .word 0x80015782 +80005470: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x59595959 +80005474: 00052c03 lw x24,0(x10) +80005478: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x59595959 +8000547c: 00052d83 lw x27,0(x10) +80005480: 00450513 addi x10,x10,4 + +80005484 : +Zksed_sm4ed_cg_cp_sbox_b89: + sm4ed x31, x24, x27, 3 # perform operation +80005484: f1bc0fb3 sm4ed x31,x24,x27,0x3 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b89, Zksed_sm4ed_cg_cp_sbox_b89_str) +80005488: 0004a203 lw x4,0(x9) +8000548c: 01f20863 beq x4,x31,8000549c +80005490: 531022ef jal x5,800081c0 +80005494: 80005484 .word 0x80005484 +80005498: 800157b9 .word 0x800157b9 +8000549c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5a5a5a5a +800054a0: 00052683 lw x13,0(x10) +800054a4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5a5a5a5a +800054a8: 00052a83 lw x21,0(x10) +800054ac: 00450513 addi x10,x10,4 + +800054b0 : +Zksed_sm4ed_cg_cp_sbox_b90: + sm4ed x25, x13, x21, 0 # perform operation +800054b0: 31568cb3 sm4ed x25,x13,x21,0x0 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b90, Zksed_sm4ed_cg_cp_sbox_b90_str) +800054b4: 0004a203 lw x4,0(x9) +800054b8: 01920863 beq x4,x25,800054c8 +800054bc: 505022ef jal x5,800081c0 +800054c0: 800054b0 .word 0x800054b0 +800054c4: 800157f0 .word 0x800157f0 +800054c8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5b5b5b5b +800054cc: 00052d83 lw x27,0(x10) +800054d0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5b5b5b5b +800054d4: 00052b03 lw x22,0(x10) +800054d8: 00450513 addi x10,x10,4 + +800054dc : +Zksed_sm4ed_cg_cp_sbox_b91: + sm4ed x11, x27, x22, 0 # perform operation +800054dc: 316d85b3 sm4ed x11,x27,x22,0x0 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b91, Zksed_sm4ed_cg_cp_sbox_b91_str) +800054e0: 0004a203 lw x4,0(x9) +800054e4: 00b20863 beq x4,x11,800054f4 +800054e8: 4d9022ef jal x5,800081c0 +800054ec: 800054dc .word 0x800054dc +800054f0: 80015827 .word 0x80015827 +800054f4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5c5c5c5c +800054f8: 00052c03 lw x24,0(x10) +800054fc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5c5c5c5c +80005500: 00052d03 lw x26,0(x10) +80005504: 00450513 addi x10,x10,4 + +80005508 : +Zksed_sm4ed_cg_cp_sbox_b92: + sm4ed x11, x24, x26, 2 # perform operation +80005508: b1ac05b3 sm4ed x11,x24,x26,0x2 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b92, Zksed_sm4ed_cg_cp_sbox_b92_str) +8000550c: 0004a203 lw x4,0(x9) +80005510: 00b20863 beq x4,x11,80005520 +80005514: 4ad022ef jal x5,800081c0 +80005518: 80005508 .word 0x80005508 +8000551c: 8001585e .word 0x8001585e +80005520: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5d5d5d5d +80005524: 00052403 lw x8,0(x10) +80005528: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5d5d5d5d +8000552c: 00052703 lw x14,0(x10) +80005530: 00450513 addi x10,x10,4 + +80005534 : +Zksed_sm4ed_cg_cp_sbox_b93: + sm4ed x29, x8, x14, 0 # perform operation +80005534: 30e40eb3 sm4ed x29,x8,x14,0x0 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b93, Zksed_sm4ed_cg_cp_sbox_b93_str) +80005538: 0004a203 lw x4,0(x9) +8000553c: 01d20863 beq x4,x29,8000554c +80005540: 481022ef jal x5,800081c0 +80005544: 80005534 .word 0x80005534 +80005548: 80015895 .word 0x80015895 +8000554c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5e5e5e5e +80005550: 00052683 lw x13,0(x10) +80005554: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5e5e5e5e +80005558: 00052703 lw x14,0(x10) +8000555c: 00450513 addi x10,x10,4 + +80005560 : +Zksed_sm4ed_cg_cp_sbox_b94: + sm4ed x22, x13, x14, 2 # perform operation +80005560: b0e68b33 sm4ed x22,x13,x14,0x2 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b94, Zksed_sm4ed_cg_cp_sbox_b94_str) +80005564: 0004a203 lw x4,0(x9) +80005568: 01620863 beq x4,x22,80005578 +8000556c: 455022ef jal x5,800081c0 +80005570: 80005560 .word 0x80005560 +80005574: 800158cc .word 0x800158cc +80005578: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x5f5f5f5f +8000557c: 00052303 lw x6,0(x10) +80005580: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5f5f5f5f +80005584: 00052783 lw x15,0(x10) +80005588: 00450513 addi x10,x10,4 + +8000558c : +Zksed_sm4ed_cg_cp_sbox_b95: + sm4ed x7, x6, x15, 3 # perform operation +8000558c: f0f303b3 sm4ed x7,x6,x15,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b95, Zksed_sm4ed_cg_cp_sbox_b95_str) +80005590: 0004a203 lw x4,0(x9) +80005594: 00720863 beq x4,x7,800055a4 +80005598: 429022ef jal x5,800081c0 +8000559c: 8000558c .word 0x8000558c +800055a0: 80015903 .word 0x80015903 +800055a4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x60606060 +800055a8: 00052383 lw x7,0(x10) +800055ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x60606060 +800055b0: 00052703 lw x14,0(x10) +800055b4: 00450513 addi x10,x10,4 + +800055b8 : +Zksed_sm4ed_cg_cp_sbox_b96: + sm4ed x15, x7, x14, 2 # perform operation +800055b8: b0e387b3 sm4ed x15,x7,x14,0x2 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b96, Zksed_sm4ed_cg_cp_sbox_b96_str) +800055bc: 0004a203 lw x4,0(x9) +800055c0: 00f20863 beq x4,x15,800055d0 +800055c4: 3fd022ef jal x5,800081c0 +800055c8: 800055b8 .word 0x800055b8 +800055cc: 8001593a .word 0x8001593a +800055d0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x61616161 +800055d4: 00052583 lw x11,0(x10) +800055d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x61616161 +800055dc: 00052b03 lw x22,0(x10) +800055e0: 00450513 addi x10,x10,4 + +800055e4 : +Zksed_sm4ed_cg_cp_sbox_b97: + sm4ed x20, x11, x22, 3 # perform operation +800055e4: f1658a33 sm4ed x20,x11,x22,0x3 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b97, Zksed_sm4ed_cg_cp_sbox_b97_str) +800055e8: 0004a203 lw x4,0(x9) +800055ec: 01420863 beq x4,x20,800055fc +800055f0: 3d1022ef jal x5,800081c0 +800055f4: 800055e4 .word 0x800055e4 +800055f8: 80015971 .word 0x80015971 +800055fc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x62626262 +80005600: 00052f03 lw x30,0(x10) +80005604: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x62626262 +80005608: 00052883 lw x17,0(x10) +8000560c: 00450513 addi x10,x10,4 + +80005610 : +Zksed_sm4ed_cg_cp_sbox_b98: + sm4ed x21, x30, x17, 2 # perform operation +80005610: b11f0ab3 sm4ed x21,x30,x17,0x2 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b98, Zksed_sm4ed_cg_cp_sbox_b98_str) +80005614: 0004a203 lw x4,0(x9) +80005618: 01520863 beq x4,x21,80005628 +8000561c: 3a5022ef jal x5,800081c0 +80005620: 80005610 .word 0x80005610 +80005624: 800159a8 .word 0x800159a8 +80005628: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x63636363 +8000562c: 00052083 lw x1,0(x10) +80005630: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x63636363 +80005634: 00052783 lw x15,0(x10) +80005638: 00450513 addi x10,x10,4 + +8000563c : +Zksed_sm4ed_cg_cp_sbox_b99: + sm4ed x18, x1, x15, 2 # perform operation +8000563c: b0f08933 sm4ed x18,x1,x15,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b99, Zksed_sm4ed_cg_cp_sbox_b99_str) +80005640: 0004a203 lw x4,0(x9) +80005644: 01220863 beq x4,x18,80005654 +80005648: 379022ef jal x5,800081c0 +8000564c: 8000563c .word 0x8000563c +80005650: 800159df .word 0x800159df +80005654: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x64646464 +80005658: 00052903 lw x18,0(x10) +8000565c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x64646464 +80005660: 00052983 lw x19,0(x10) +80005664: 00450513 addi x10,x10,4 + +80005668 : +Zksed_sm4ed_cg_cp_sbox_b100: + sm4ed x26, x18, x19, 0 # perform operation +80005668: 31390d33 sm4ed x26,x18,x19,0x0 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zksed_sm4ed_cg_cp_sbox_b100, Zksed_sm4ed_cg_cp_sbox_b100_str) +8000566c: 0004a203 lw x4,0(x9) +80005670: 01a20863 beq x4,x26,80005680 +80005674: 34d022ef jal x5,800081c0 +80005678: 80005668 .word 0x80005668 +8000567c: 80015a16 .word 0x80015a16 +80005680: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x65656565 +80005684: 00052383 lw x7,0(x10) +80005688: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x65656565 +8000568c: 00052b03 lw x22,0(x10) +80005690: 00450513 addi x10,x10,4 + +80005694 : +Zksed_sm4ed_cg_cp_sbox_b101: + sm4ed x1, x7, x22, 1 # perform operation +80005694: 716380b3 sm4ed x1,x7,x22,0x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b101, Zksed_sm4ed_cg_cp_sbox_b101_str) +80005698: 0004a203 lw x4,0(x9) +8000569c: 00120863 beq x4,x1,800056ac +800056a0: 321022ef jal x5,800081c0 +800056a4: 80005694 .word 0x80005694 +800056a8: 80015a4e .word 0x80015a4e +800056ac: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x66666666 +800056b0: 00052383 lw x7,0(x10) +800056b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x66666666 +800056b8: 00052f83 lw x31,0(x10) +800056bc: 00450513 addi x10,x10,4 + +800056c0 : +Zksed_sm4ed_cg_cp_sbox_b102: + sm4ed x17, x7, x31, 2 # perform operation +800056c0: b1f388b3 sm4ed x17,x7,x31,0x2 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b102, Zksed_sm4ed_cg_cp_sbox_b102_str) +800056c4: 0004a203 lw x4,0(x9) +800056c8: 01120863 beq x4,x17,800056d8 +800056cc: 2f5022ef jal x5,800081c0 +800056d0: 800056c0 .word 0x800056c0 +800056d4: 80015a86 .word 0x80015a86 +800056d8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x67676767 +800056dc: 00052c83 lw x25,0(x10) +800056e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x67676767 +800056e4: 00052d83 lw x27,0(x10) +800056e8: 00450513 addi x10,x10,4 + +800056ec : +Zksed_sm4ed_cg_cp_sbox_b103: + sm4ed x21, x25, x27, 0 # perform operation +800056ec: 31bc8ab3 sm4ed x21,x25,x27,0x0 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b103, Zksed_sm4ed_cg_cp_sbox_b103_str) +800056f0: 0004a203 lw x4,0(x9) +800056f4: 01520863 beq x4,x21,80005704 +800056f8: 2c9022ef jal x5,800081c0 +800056fc: 800056ec .word 0x800056ec +80005700: 80015abe .word 0x80015abe +80005704: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x68686868 +80005708: 00052403 lw x8,0(x10) +8000570c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x68686868 +80005710: 00052383 lw x7,0(x10) +80005714: 00450513 addi x10,x10,4 + +80005718 : +Zksed_sm4ed_cg_cp_sbox_b104: + sm4ed x20, x8, x7, 3 # perform operation +80005718: f0740a33 sm4ed x20,x8,x7,0x3 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b104, Zksed_sm4ed_cg_cp_sbox_b104_str) +8000571c: 0004a203 lw x4,0(x9) +80005720: 01420863 beq x4,x20,80005730 +80005724: 29d022ef jal x5,800081c0 +80005728: 80005718 .word 0x80005718 +8000572c: 80015af6 .word 0x80015af6 +80005730: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x69696969 +80005734: 00052883 lw x17,0(x10) +80005738: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x69696969 +8000573c: 00052b03 lw x22,0(x10) +80005740: 00450513 addi x10,x10,4 + +80005744 : +Zksed_sm4ed_cg_cp_sbox_b105: + sm4ed x28, x17, x22, 2 # perform operation +80005744: b1688e33 sm4ed x28,x17,x22,0x2 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b105, Zksed_sm4ed_cg_cp_sbox_b105_str) +80005748: 0004a203 lw x4,0(x9) +8000574c: 01c20863 beq x4,x28,8000575c +80005750: 271022ef jal x5,800081c0 +80005754: 80005744 .word 0x80005744 +80005758: 80015b2e .word 0x80015b2e +8000575c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x6a6a6a6a +80005760: 00052303 lw x6,0(x10) +80005764: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x6a6a6a6a +80005768: 00052d83 lw x27,0(x10) +8000576c: 00450513 addi x10,x10,4 + +80005770 : +Zksed_sm4ed_cg_cp_sbox_b106: + sm4ed x14, x6, x27, 3 # perform operation +80005770: f1b30733 sm4ed x14,x6,x27,0x3 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b106, Zksed_sm4ed_cg_cp_sbox_b106_str) +80005774: 0004a203 lw x4,0(x9) +80005778: 00e20863 beq x4,x14,80005788 +8000577c: 245022ef jal x5,800081c0 +80005780: 80005770 .word 0x80005770 +80005784: 80015b66 .word 0x80015b66 +80005788: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x6b6b6b6b +8000578c: 00052d03 lw x26,0(x10) +80005790: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x6b6b6b6b +80005794: 00052c03 lw x24,0(x10) +80005798: 00450513 addi x10,x10,4 + +8000579c : +Zksed_sm4ed_cg_cp_sbox_b107: + sm4ed x7, x26, x24, 0 # perform operation +8000579c: 318d03b3 sm4ed x7,x26,x24,0x0 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b107, Zksed_sm4ed_cg_cp_sbox_b107_str) +800057a0: 0004a203 lw x4,0(x9) +800057a4: 00720863 beq x4,x7,800057b4 +800057a8: 219022ef jal x5,800081c0 +800057ac: 8000579c .word 0x8000579c +800057b0: 80015b9e .word 0x80015b9e +800057b4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x6c6c6c6c +800057b8: 00052983 lw x19,0(x10) +800057bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x6c6c6c6c +800057c0: 00052d03 lw x26,0(x10) +800057c4: 00450513 addi x10,x10,4 + +800057c8 : +Zksed_sm4ed_cg_cp_sbox_b108: + sm4ed x16, x19, x26, 1 # perform operation +800057c8: 71a98833 sm4ed x16,x19,x26,0x1 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b108, Zksed_sm4ed_cg_cp_sbox_b108_str) +800057cc: 0004a203 lw x4,0(x9) +800057d0: 01020863 beq x4,x16,800057e0 +800057d4: 1ed022ef jal x5,800081c0 +800057d8: 800057c8 .word 0x800057c8 +800057dc: 80015bd6 .word 0x80015bd6 +800057e0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6d6d6d6d +800057e4: 00052403 lw x8,0(x10) +800057e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x6d6d6d6d +800057ec: 00052603 lw x12,0(x10) +800057f0: 00450513 addi x10,x10,4 + +800057f4 : +Zksed_sm4ed_cg_cp_sbox_b109: + sm4ed x24, x8, x12, 1 # perform operation +800057f4: 70c40c33 sm4ed x24,x8,x12,0x1 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b109, Zksed_sm4ed_cg_cp_sbox_b109_str) +800057f8: 0004a203 lw x4,0(x9) +800057fc: 01820863 beq x4,x24,8000580c +80005800: 1c1022ef jal x5,800081c0 +80005804: 800057f4 .word 0x800057f4 +80005808: 80015c0e .word 0x80015c0e +8000580c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x6e6e6e6e +80005810: 00052d83 lw x27,0(x10) +80005814: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x6e6e6e6e +80005818: 00052183 lw x3,0(x10) +8000581c: 00450513 addi x10,x10,4 + +80005820 : +Zksed_sm4ed_cg_cp_sbox_b110: + sm4ed x2, x27, x3, 3 # perform operation +80005820: f03d8133 sm4ed x2,x27,x3,0x3 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b110, Zksed_sm4ed_cg_cp_sbox_b110_str) +80005824: 0004a203 lw x4,0(x9) +80005828: 00220863 beq x4,x2,80005838 +8000582c: 195022ef jal x5,800081c0 +80005830: 80005820 .word 0x80005820 +80005834: 80015c46 .word 0x80015c46 +80005838: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x6f6f6f6f +8000583c: 00052e03 lw x28,0(x10) +80005840: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x6f6f6f6f +80005844: 00052e83 lw x29,0(x10) +80005848: 00450513 addi x10,x10,4 + +8000584c : +Zksed_sm4ed_cg_cp_sbox_b111: + sm4ed x18, x28, x29, 2 # perform operation +8000584c: b1de0933 sm4ed x18,x28,x29,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b111, Zksed_sm4ed_cg_cp_sbox_b111_str) +80005850: 0004a203 lw x4,0(x9) +80005854: 01220863 beq x4,x18,80005864 +80005858: 169022ef jal x5,800081c0 +8000585c: 8000584c .word 0x8000584c +80005860: 80015c7e .word 0x80015c7e +80005864: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x70707070 +80005868: 00052b03 lw x22,0(x10) +8000586c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x70707070 +80005870: 00052b83 lw x23,0(x10) +80005874: 00450513 addi x10,x10,4 + +80005878 : +Zksed_sm4ed_cg_cp_sbox_b112: + sm4ed x12, x22, x23, 2 # perform operation +80005878: b17b0633 sm4ed x12,x22,x23,0x2 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b112, Zksed_sm4ed_cg_cp_sbox_b112_str) +8000587c: 0004a203 lw x4,0(x9) +80005880: 00c20863 beq x4,x12,80005890 +80005884: 13d022ef jal x5,800081c0 +80005888: 80005878 .word 0x80005878 +8000588c: 80015cb6 .word 0x80015cb6 +80005890: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x71717171 +80005894: 00052c03 lw x24,0(x10) +80005898: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x71717171 +8000589c: 00052b03 lw x22,0(x10) +800058a0: 00450513 addi x10,x10,4 + +800058a4 : +Zksed_sm4ed_cg_cp_sbox_b113: + sm4ed x21, x24, x22, 1 # perform operation +800058a4: 716c0ab3 sm4ed x21,x24,x22,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b113, Zksed_sm4ed_cg_cp_sbox_b113_str) +800058a8: 0004a203 lw x4,0(x9) +800058ac: 01520863 beq x4,x21,800058bc +800058b0: 111022ef jal x5,800081c0 +800058b4: 800058a4 .word 0x800058a4 +800058b8: 80015cee .word 0x80015cee +800058bc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x72727272 +800058c0: 00052903 lw x18,0(x10) +800058c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x72727272 +800058c8: 00052c83 lw x25,0(x10) +800058cc: 00450513 addi x10,x10,4 + +800058d0 : +Zksed_sm4ed_cg_cp_sbox_b114: + sm4ed x14, x18, x25, 1 # perform operation +800058d0: 71990733 sm4ed x14,x18,x25,0x1 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b114, Zksed_sm4ed_cg_cp_sbox_b114_str) +800058d4: 0004a203 lw x4,0(x9) +800058d8: 00e20863 beq x4,x14,800058e8 +800058dc: 0e5022ef jal x5,800081c0 +800058e0: 800058d0 .word 0x800058d0 +800058e4: 80015d26 .word 0x80015d26 +800058e8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x73737373 +800058ec: 00052a83 lw x21,0(x10) +800058f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x73737373 +800058f4: 00052f83 lw x31,0(x10) +800058f8: 00450513 addi x10,x10,4 + +800058fc : +Zksed_sm4ed_cg_cp_sbox_b115: + sm4ed x24, x21, x31, 0 # perform operation +800058fc: 31fa8c33 sm4ed x24,x21,x31,0x0 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b115, Zksed_sm4ed_cg_cp_sbox_b115_str) +80005900: 0004a203 lw x4,0(x9) +80005904: 01820863 beq x4,x24,80005914 +80005908: 0b9022ef jal x5,800081c0 +8000590c: 800058fc .word 0x800058fc +80005910: 80015d5e .word 0x80015d5e +80005914: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x74747474 +80005918: 00052583 lw x11,0(x10) +8000591c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x74747474 +80005920: 00052f83 lw x31,0(x10) +80005924: 00450513 addi x10,x10,4 + +80005928 : +Zksed_sm4ed_cg_cp_sbox_b116: + sm4ed x21, x11, x31, 1 # perform operation +80005928: 71f58ab3 sm4ed x21,x11,x31,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b116, Zksed_sm4ed_cg_cp_sbox_b116_str) +8000592c: 0004a203 lw x4,0(x9) +80005930: 01520863 beq x4,x21,80005940 +80005934: 08d022ef jal x5,800081c0 +80005938: 80005928 .word 0x80005928 +8000593c: 80015d96 .word 0x80015d96 +80005940: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x75757575 +80005944: 00052e83 lw x29,0(x10) +80005948: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x75757575 +8000594c: 00052b83 lw x23,0(x10) +80005950: 00450513 addi x10,x10,4 + +80005954 : +Zksed_sm4ed_cg_cp_sbox_b117: + sm4ed x19, x29, x23, 2 # perform operation +80005954: b17e89b3 sm4ed x19,x29,x23,0x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b117, Zksed_sm4ed_cg_cp_sbox_b117_str) +80005958: 0004a203 lw x4,0(x9) +8000595c: 01320863 beq x4,x19,8000596c +80005960: 061022ef jal x5,800081c0 +80005964: 80005954 .word 0x80005954 +80005968: 80015dce .word 0x80015dce +8000596c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x76767676 +80005970: 00052083 lw x1,0(x10) +80005974: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x76767676 +80005978: 00052903 lw x18,0(x10) +8000597c: 00450513 addi x10,x10,4 + +80005980 : +Zksed_sm4ed_cg_cp_sbox_b118: + sm4ed x25, x1, x18, 1 # perform operation +80005980: 71208cb3 sm4ed x25,x1,x18,0x1 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b118, Zksed_sm4ed_cg_cp_sbox_b118_str) +80005984: 0004a203 lw x4,0(x9) +80005988: 01920863 beq x4,x25,80005998 +8000598c: 035022ef jal x5,800081c0 +80005990: 80005980 .word 0x80005980 +80005994: 80015e06 .word 0x80015e06 +80005998: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x77777777 +8000599c: 00052903 lw x18,0(x10) +800059a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x77777777 +800059a4: 00052a83 lw x21,0(x10) +800059a8: 00450513 addi x10,x10,4 + +800059ac : +Zksed_sm4ed_cg_cp_sbox_b119: + sm4ed x1, x18, x21, 2 # perform operation +800059ac: b15900b3 sm4ed x1,x18,x21,0x2 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b119, Zksed_sm4ed_cg_cp_sbox_b119_str) +800059b0: 0004a203 lw x4,0(x9) +800059b4: 00120863 beq x4,x1,800059c4 +800059b8: 009022ef jal x5,800081c0 +800059bc: 800059ac .word 0x800059ac +800059c0: 80015e3e .word 0x80015e3e +800059c4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x78787878 +800059c8: 00052383 lw x7,0(x10) +800059cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x78787878 +800059d0: 00052403 lw x8,0(x10) +800059d4: 00450513 addi x10,x10,4 + +800059d8 : +Zksed_sm4ed_cg_cp_sbox_b120: + sm4ed x2, x7, x8, 0 # perform operation +800059d8: 30838133 sm4ed x2,x7,x8,0x0 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b120, Zksed_sm4ed_cg_cp_sbox_b120_str) +800059dc: 0004a203 lw x4,0(x9) +800059e0: 00220863 beq x4,x2,800059f0 +800059e4: 7dc022ef jal x5,800081c0 +800059e8: 800059d8 .word 0x800059d8 +800059ec: 80015e76 .word 0x80015e76 +800059f0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x79797979 +800059f4: 00052b83 lw x23,0(x10) +800059f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x79797979 +800059fc: 00052603 lw x12,0(x10) +80005a00: 00450513 addi x10,x10,4 + +80005a04 : +Zksed_sm4ed_cg_cp_sbox_b121: + sm4ed x7, x23, x12, 3 # perform operation +80005a04: f0cb83b3 sm4ed x7,x23,x12,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b121, Zksed_sm4ed_cg_cp_sbox_b121_str) +80005a08: 0004a203 lw x4,0(x9) +80005a0c: 00720863 beq x4,x7,80005a1c +80005a10: 7b0022ef jal x5,800081c0 +80005a14: 80005a04 .word 0x80005a04 +80005a18: 80015eae .word 0x80015eae +80005a1c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x7a7a7a7a +80005a20: 00052983 lw x19,0(x10) +80005a24: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7a7a7a7a +80005a28: 00052f83 lw x31,0(x10) +80005a2c: 00450513 addi x10,x10,4 + +80005a30 : +Zksed_sm4ed_cg_cp_sbox_b122: + sm4ed x11, x19, x31, 0 # perform operation +80005a30: 31f985b3 sm4ed x11,x19,x31,0x0 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b122, Zksed_sm4ed_cg_cp_sbox_b122_str) +80005a34: 0004a203 lw x4,0(x9) +80005a38: 00b20863 beq x4,x11,80005a48 +80005a3c: 784022ef jal x5,800081c0 +80005a40: 80005a30 .word 0x80005a30 +80005a44: 80015ee6 .word 0x80015ee6 +80005a48: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x7b7b7b7b +80005a4c: 00052903 lw x18,0(x10) +80005a50: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7b7b7b7b +80005a54: 00052583 lw x11,0(x10) +80005a58: 00450513 addi x10,x10,4 + +80005a5c : +Zksed_sm4ed_cg_cp_sbox_b123: + sm4ed x17, x18, x11, 2 # perform operation +80005a5c: b0b908b3 sm4ed x17,x18,x11,0x2 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b123, Zksed_sm4ed_cg_cp_sbox_b123_str) +80005a60: 0004a203 lw x4,0(x9) +80005a64: 01120863 beq x4,x17,80005a74 +80005a68: 758022ef jal x5,800081c0 +80005a6c: 80005a5c .word 0x80005a5c +80005a70: 80015f1e .word 0x80015f1e +80005a74: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7c7c7c7c +80005a78: 00052c03 lw x24,0(x10) +80005a7c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7c7c7c7c +80005a80: 00052e83 lw x29,0(x10) +80005a84: 00450513 addi x10,x10,4 + +80005a88 : +Zksed_sm4ed_cg_cp_sbox_b124: + sm4ed x20, x24, x29, 2 # perform operation +80005a88: b1dc0a33 sm4ed x20,x24,x29,0x2 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b124, Zksed_sm4ed_cg_cp_sbox_b124_str) +80005a8c: 0004a203 lw x4,0(x9) +80005a90: 01420863 beq x4,x20,80005aa0 +80005a94: 72c022ef jal x5,800081c0 +80005a98: 80005a88 .word 0x80005a88 +80005a9c: 80015f56 .word 0x80015f56 +80005aa0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7d7d7d7d +80005aa4: 00052b83 lw x23,0(x10) +80005aa8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7d7d7d7d +80005aac: 00052f83 lw x31,0(x10) +80005ab0: 00450513 addi x10,x10,4 + +80005ab4 : +Zksed_sm4ed_cg_cp_sbox_b125: + sm4ed x11, x23, x31, 0 # perform operation +80005ab4: 31fb85b3 sm4ed x11,x23,x31,0x0 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b125, Zksed_sm4ed_cg_cp_sbox_b125_str) +80005ab8: 0004a203 lw x4,0(x9) +80005abc: 00b20863 beq x4,x11,80005acc +80005ac0: 700022ef jal x5,800081c0 +80005ac4: 80005ab4 .word 0x80005ab4 +80005ac8: 80015f8e .word 0x80015f8e +80005acc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7e7e7e7e +80005ad0: 00052b83 lw x23,0(x10) +80005ad4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7e7e7e7e +80005ad8: 00052a83 lw x21,0(x10) +80005adc: 00450513 addi x10,x10,4 + +80005ae0 : +Zksed_sm4ed_cg_cp_sbox_b126: + sm4ed x13, x23, x21, 2 # perform operation +80005ae0: b15b86b3 sm4ed x13,x23,x21,0x2 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b126, Zksed_sm4ed_cg_cp_sbox_b126_str) +80005ae4: 0004a203 lw x4,0(x9) +80005ae8: 00d20863 beq x4,x13,80005af8 +80005aec: 6d4022ef jal x5,800081c0 +80005af0: 80005ae0 .word 0x80005ae0 +80005af4: 80015fc6 .word 0x80015fc6 +80005af8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7f7f7f7f +80005afc: 00052b03 lw x22,0(x10) +80005b00: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7f7f7f7f +80005b04: 00052f83 lw x31,0(x10) +80005b08: 00450513 addi x10,x10,4 + +80005b0c : +Zksed_sm4ed_cg_cp_sbox_b127: + sm4ed x15, x22, x31, 0 # perform operation +80005b0c: 31fb07b3 sm4ed x15,x22,x31,0x0 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b127, Zksed_sm4ed_cg_cp_sbox_b127_str) +80005b10: 0004a203 lw x4,0(x9) +80005b14: 00f20863 beq x4,x15,80005b24 +80005b18: 6a8022ef jal x5,800081c0 +80005b1c: 80005b0c .word 0x80005b0c +80005b20: 80015ffe .word 0x80015ffe +80005b24: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x80808080 +80005b28: 00052383 lw x7,0(x10) +80005b2c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x80808080 +80005b30: 00052303 lw x6,0(x10) +80005b34: 00450513 addi x10,x10,4 + +80005b38 : +Zksed_sm4ed_cg_cp_sbox_b128: + sm4ed x14, x7, x6, 1 # perform operation +80005b38: 70638733 sm4ed x14,x7,x6,0x1 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b128, Zksed_sm4ed_cg_cp_sbox_b128_str) +80005b3c: 0004a203 lw x4,0(x9) +80005b40: 00e20863 beq x4,x14,80005b50 +80005b44: 67c022ef jal x5,800081c0 +80005b48: 80005b38 .word 0x80005b38 +80005b4c: 80016036 .word 0x80016036 +80005b50: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x81818181 +80005b54: 00052c83 lw x25,0(x10) +80005b58: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x81818181 +80005b5c: 00052683 lw x13,0(x10) +80005b60: 00450513 addi x10,x10,4 + +80005b64 : +Zksed_sm4ed_cg_cp_sbox_b129: + sm4ed x12, x25, x13, 1 # perform operation +80005b64: 70dc8633 sm4ed x12,x25,x13,0x1 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b129, Zksed_sm4ed_cg_cp_sbox_b129_str) +80005b68: 0004a203 lw x4,0(x9) +80005b6c: 00c20863 beq x4,x12,80005b7c +80005b70: 650022ef jal x5,800081c0 +80005b74: 80005b64 .word 0x80005b64 +80005b78: 8001606e .word 0x8001606e +80005b7c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x82828282 +80005b80: 00052383 lw x7,0(x10) +80005b84: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x82828282 +80005b88: 00052e83 lw x29,0(x10) +80005b8c: 00450513 addi x10,x10,4 + +80005b90 : +Zksed_sm4ed_cg_cp_sbox_b130: + sm4ed x13, x7, x29, 0 # perform operation +80005b90: 31d386b3 sm4ed x13,x7,x29,0x0 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b130, Zksed_sm4ed_cg_cp_sbox_b130_str) +80005b94: 0004a203 lw x4,0(x9) +80005b98: 00d20863 beq x4,x13,80005ba8 +80005b9c: 624022ef jal x5,800081c0 +80005ba0: 80005b90 .word 0x80005b90 +80005ba4: 800160a6 .word 0x800160a6 +80005ba8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x83838383 +80005bac: 00052703 lw x14,0(x10) +80005bb0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x83838383 +80005bb4: 00052d03 lw x26,0(x10) +80005bb8: 00450513 addi x10,x10,4 + +80005bbc : +Zksed_sm4ed_cg_cp_sbox_b131: + sm4ed x22, x14, x26, 1 # perform operation +80005bbc: 71a70b33 sm4ed x22,x14,x26,0x1 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b131, Zksed_sm4ed_cg_cp_sbox_b131_str) +80005bc0: 0004a203 lw x4,0(x9) +80005bc4: 01620863 beq x4,x22,80005bd4 +80005bc8: 5f8022ef jal x5,800081c0 +80005bcc: 80005bbc .word 0x80005bbc +80005bd0: 800160de .word 0x800160de +80005bd4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x84848484 +80005bd8: 00052c03 lw x24,0(x10) +80005bdc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x84848484 +80005be0: 00052f03 lw x30,0(x10) +80005be4: 00450513 addi x10,x10,4 + +80005be8 : +Zksed_sm4ed_cg_cp_sbox_b132: + sm4ed x28, x24, x30, 2 # perform operation +80005be8: b1ec0e33 sm4ed x28,x24,x30,0x2 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b132, Zksed_sm4ed_cg_cp_sbox_b132_str) +80005bec: 0004a203 lw x4,0(x9) +80005bf0: 01c20863 beq x4,x28,80005c00 +80005bf4: 5cc022ef jal x5,800081c0 +80005bf8: 80005be8 .word 0x80005be8 +80005bfc: 80016116 .word 0x80016116 +80005c00: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x85858585 +80005c04: 00052703 lw x14,0(x10) +80005c08: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x85858585 +80005c0c: 00052a03 lw x20,0(x10) +80005c10: 00450513 addi x10,x10,4 + +80005c14 : +Zksed_sm4ed_cg_cp_sbox_b133: + sm4ed x19, x14, x20, 1 # perform operation +80005c14: 714709b3 sm4ed x19,x14,x20,0x1 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b133, Zksed_sm4ed_cg_cp_sbox_b133_str) +80005c18: 0004a203 lw x4,0(x9) +80005c1c: 01320863 beq x4,x19,80005c2c +80005c20: 5a0022ef jal x5,800081c0 +80005c24: 80005c14 .word 0x80005c14 +80005c28: 8001614e .word 0x8001614e +80005c2c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x86868686 +80005c30: 00052c83 lw x25,0(x10) +80005c34: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x86868686 +80005c38: 00052c03 lw x24,0(x10) +80005c3c: 00450513 addi x10,x10,4 + +80005c40 : +Zksed_sm4ed_cg_cp_sbox_b134: + sm4ed x13, x25, x24, 0 # perform operation +80005c40: 318c86b3 sm4ed x13,x25,x24,0x0 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b134, Zksed_sm4ed_cg_cp_sbox_b134_str) +80005c44: 0004a203 lw x4,0(x9) +80005c48: 00d20863 beq x4,x13,80005c58 +80005c4c: 574022ef jal x5,800081c0 +80005c50: 80005c40 .word 0x80005c40 +80005c54: 80016186 .word 0x80016186 +80005c58: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x87878787 +80005c5c: 00052183 lw x3,0(x10) +80005c60: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x87878787 +80005c64: 00052b03 lw x22,0(x10) +80005c68: 00450513 addi x10,x10,4 + +80005c6c : +Zksed_sm4ed_cg_cp_sbox_b135: + sm4ed x15, x3, x22, 2 # perform operation +80005c6c: b16187b3 sm4ed x15,x3,x22,0x2 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b135, Zksed_sm4ed_cg_cp_sbox_b135_str) +80005c70: 0004a203 lw x4,0(x9) +80005c74: 00f20863 beq x4,x15,80005c84 +80005c78: 548022ef jal x5,800081c0 +80005c7c: 80005c6c .word 0x80005c6c +80005c80: 800161be .word 0x800161be +80005c84: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x88888888 +80005c88: 00052803 lw x16,0(x10) +80005c8c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x88888888 +80005c90: 00052b03 lw x22,0(x10) +80005c94: 00450513 addi x10,x10,4 + +80005c98 : +Zksed_sm4ed_cg_cp_sbox_b136: + sm4ed x8, x16, x22, 2 # perform operation +80005c98: b1680433 sm4ed x8,x16,x22,0x2 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b136, Zksed_sm4ed_cg_cp_sbox_b136_str) +80005c9c: 0004a203 lw x4,0(x9) +80005ca0: 00820863 beq x4,x8,80005cb0 +80005ca4: 51c022ef jal x5,800081c0 +80005ca8: 80005c98 .word 0x80005c98 +80005cac: 800161f6 .word 0x800161f6 +80005cb0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x89898989 +80005cb4: 00052c83 lw x25,0(x10) +80005cb8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x89898989 +80005cbc: 00052703 lw x14,0(x10) +80005cc0: 00450513 addi x10,x10,4 + +80005cc4 : +Zksed_sm4ed_cg_cp_sbox_b137: + sm4ed x23, x25, x14, 1 # perform operation +80005cc4: 70ec8bb3 sm4ed x23,x25,x14,0x1 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cp_sbox_b137, Zksed_sm4ed_cg_cp_sbox_b137_str) +80005cc8: 0004a203 lw x4,0(x9) +80005ccc: 01720863 beq x4,x23,80005cdc +80005cd0: 4f0022ef jal x5,800081c0 +80005cd4: 80005cc4 .word 0x80005cc4 +80005cd8: 8001622e .word 0x8001622e +80005cdc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x8a8a8a8a +80005ce0: 00052b03 lw x22,0(x10) +80005ce4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x8a8a8a8a +80005ce8: 00052f03 lw x30,0(x10) +80005cec: 00450513 addi x10,x10,4 + +80005cf0 : +Zksed_sm4ed_cg_cp_sbox_b138: + sm4ed x25, x22, x30, 2 # perform operation +80005cf0: b1eb0cb3 sm4ed x25,x22,x30,0x2 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b138, Zksed_sm4ed_cg_cp_sbox_b138_str) +80005cf4: 0004a203 lw x4,0(x9) +80005cf8: 01920863 beq x4,x25,80005d08 +80005cfc: 4c4022ef jal x5,800081c0 +80005d00: 80005cf0 .word 0x80005cf0 +80005d04: 80016266 .word 0x80016266 +80005d08: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8b8b8b8b +80005d0c: 00052703 lw x14,0(x10) +80005d10: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8b8b8b8b +80005d14: 00052f83 lw x31,0(x10) +80005d18: 00450513 addi x10,x10,4 + +80005d1c : +Zksed_sm4ed_cg_cp_sbox_b139: + sm4ed x12, x14, x31, 3 # perform operation +80005d1c: f1f70633 sm4ed x12,x14,x31,0x3 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b139, Zksed_sm4ed_cg_cp_sbox_b139_str) +80005d20: 0004a203 lw x4,0(x9) +80005d24: 00c20863 beq x4,x12,80005d34 +80005d28: 498022ef jal x5,800081c0 +80005d2c: 80005d1c .word 0x80005d1c +80005d30: 8001629e .word 0x8001629e +80005d34: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8c8c8c8c +80005d38: 00052603 lw x12,0(x10) +80005d3c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x8c8c8c8c +80005d40: 00052583 lw x11,0(x10) +80005d44: 00450513 addi x10,x10,4 + +80005d48 : +Zksed_sm4ed_cg_cp_sbox_b140: + sm4ed x17, x12, x11, 2 # perform operation +80005d48: b0b608b3 sm4ed x17,x12,x11,0x2 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b140, Zksed_sm4ed_cg_cp_sbox_b140_str) +80005d4c: 0004a203 lw x4,0(x9) +80005d50: 01120863 beq x4,x17,80005d60 +80005d54: 46c022ef jal x5,800081c0 +80005d58: 80005d48 .word 0x80005d48 +80005d5c: 800162d6 .word 0x800162d6 +80005d60: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8d8d8d8d +80005d64: 00052e83 lw x29,0(x10) +80005d68: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8d8d8d8d +80005d6c: 00052983 lw x19,0(x10) +80005d70: 00450513 addi x10,x10,4 + +80005d74 : +Zksed_sm4ed_cg_cp_sbox_b141: + sm4ed x16, x29, x19, 1 # perform operation +80005d74: 713e8833 sm4ed x16,x29,x19,0x1 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b141, Zksed_sm4ed_cg_cp_sbox_b141_str) +80005d78: 0004a203 lw x4,0(x9) +80005d7c: 01020863 beq x4,x16,80005d8c +80005d80: 440022ef jal x5,800081c0 +80005d84: 80005d74 .word 0x80005d74 +80005d88: 8001630e .word 0x8001630e +80005d8c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8e8e8e8e +80005d90: 00052303 lw x6,0(x10) +80005d94: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8e8e8e8e +80005d98: 00052f83 lw x31,0(x10) +80005d9c: 00450513 addi x10,x10,4 + +80005da0 : +Zksed_sm4ed_cg_cp_sbox_b142: + sm4ed x13, x6, x31, 3 # perform operation +80005da0: f1f306b3 sm4ed x13,x6,x31,0x3 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b142, Zksed_sm4ed_cg_cp_sbox_b142_str) +80005da4: 0004a203 lw x4,0(x9) +80005da8: 00d20863 beq x4,x13,80005db8 +80005dac: 414022ef jal x5,800081c0 +80005db0: 80005da0 .word 0x80005da0 +80005db4: 80016346 .word 0x80016346 +80005db8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8f8f8f8f +80005dbc: 00052703 lw x14,0(x10) +80005dc0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x8f8f8f8f +80005dc4: 00052e83 lw x29,0(x10) +80005dc8: 00450513 addi x10,x10,4 + +80005dcc : +Zksed_sm4ed_cg_cp_sbox_b143: + sm4ed x3, x14, x29, 3 # perform operation +80005dcc: f1d701b3 sm4ed x3,x14,x29,0x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b143, Zksed_sm4ed_cg_cp_sbox_b143_str) +80005dd0: 0004a203 lw x4,0(x9) +80005dd4: 00320863 beq x4,x3,80005de4 +80005dd8: 3e8022ef jal x5,800081c0 +80005ddc: 80005dcc .word 0x80005dcc +80005de0: 8001637e .word 0x8001637e +80005de4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x90909090 +80005de8: 00052083 lw x1,0(x10) +80005dec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x90909090 +80005df0: 00052c83 lw x25,0(x10) +80005df4: 00450513 addi x10,x10,4 + +80005df8 : +Zksed_sm4ed_cg_cp_sbox_b144: + sm4ed x31, x1, x25, 0 # perform operation +80005df8: 31908fb3 sm4ed x31,x1,x25,0x0 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b144, Zksed_sm4ed_cg_cp_sbox_b144_str) +80005dfc: 0004a203 lw x4,0(x9) +80005e00: 01f20863 beq x4,x31,80005e10 +80005e04: 3bc022ef jal x5,800081c0 +80005e08: 80005df8 .word 0x80005df8 +80005e0c: 800163b6 .word 0x800163b6 +80005e10: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x91919191 +80005e14: 00052803 lw x16,0(x10) +80005e18: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x91919191 +80005e1c: 00052403 lw x8,0(x10) +80005e20: 00450513 addi x10,x10,4 + +80005e24 : +Zksed_sm4ed_cg_cp_sbox_b145: + sm4ed x31, x16, x8, 2 # perform operation +80005e24: b0880fb3 sm4ed x31,x16,x8,0x2 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b145, Zksed_sm4ed_cg_cp_sbox_b145_str) +80005e28: 0004a203 lw x4,0(x9) +80005e2c: 01f20863 beq x4,x31,80005e3c +80005e30: 390022ef jal x5,800081c0 +80005e34: 80005e24 .word 0x80005e24 +80005e38: 800163ee .word 0x800163ee +80005e3c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x92929292 +80005e40: 00052803 lw x16,0(x10) +80005e44: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x92929292 +80005e48: 00052383 lw x7,0(x10) +80005e4c: 00450513 addi x10,x10,4 + +80005e50 : +Zksed_sm4ed_cg_cp_sbox_b146: + sm4ed x2, x16, x7, 1 # perform operation +80005e50: 70780133 sm4ed x2,x16,x7,0x1 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b146, Zksed_sm4ed_cg_cp_sbox_b146_str) +80005e54: 0004a203 lw x4,0(x9) +80005e58: 00220863 beq x4,x2,80005e68 +80005e5c: 364022ef jal x5,800081c0 +80005e60: 80005e50 .word 0x80005e50 +80005e64: 80016426 .word 0x80016426 +80005e68: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x93939393 +80005e6c: 00052983 lw x19,0(x10) +80005e70: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x93939393 +80005e74: 00052f83 lw x31,0(x10) +80005e78: 00450513 addi x10,x10,4 + +80005e7c : +Zksed_sm4ed_cg_cp_sbox_b147: + sm4ed x28, x19, x31, 3 # perform operation +80005e7c: f1f98e33 sm4ed x28,x19,x31,0x3 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b147, Zksed_sm4ed_cg_cp_sbox_b147_str) +80005e80: 0004a203 lw x4,0(x9) +80005e84: 01c20863 beq x4,x28,80005e94 +80005e88: 338022ef jal x5,800081c0 +80005e8c: 80005e7c .word 0x80005e7c +80005e90: 8001645e .word 0x8001645e +80005e94: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x94949494 +80005e98: 00052c83 lw x25,0(x10) +80005e9c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x94949494 +80005ea0: 00052803 lw x16,0(x10) +80005ea4: 00450513 addi x10,x10,4 + +80005ea8 : +Zksed_sm4ed_cg_cp_sbox_b148: + sm4ed x17, x25, x16, 3 # perform operation +80005ea8: f10c88b3 sm4ed x17,x25,x16,0x3 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b148, Zksed_sm4ed_cg_cp_sbox_b148_str) +80005eac: 0004a203 lw x4,0(x9) +80005eb0: 01120863 beq x4,x17,80005ec0 +80005eb4: 30c022ef jal x5,800081c0 +80005eb8: 80005ea8 .word 0x80005ea8 +80005ebc: 80016496 .word 0x80016496 +80005ec0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x95959595 +80005ec4: 00052f83 lw x31,0(x10) +80005ec8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x95959595 +80005ecc: 00052c83 lw x25,0(x10) +80005ed0: 00450513 addi x10,x10,4 + +80005ed4 : +Zksed_sm4ed_cg_cp_sbox_b149: + sm4ed x21, x31, x25, 3 # perform operation +80005ed4: f19f8ab3 sm4ed x21,x31,x25,0x3 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b149, Zksed_sm4ed_cg_cp_sbox_b149_str) +80005ed8: 0004a203 lw x4,0(x9) +80005edc: 01520863 beq x4,x21,80005eec +80005ee0: 2e0022ef jal x5,800081c0 +80005ee4: 80005ed4 .word 0x80005ed4 +80005ee8: 800164ce .word 0x800164ce +80005eec: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x96969696 +80005ef0: 00052f03 lw x30,0(x10) +80005ef4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x96969696 +80005ef8: 00052183 lw x3,0(x10) +80005efc: 00450513 addi x10,x10,4 + +80005f00 : +Zksed_sm4ed_cg_cp_sbox_b150: + sm4ed x28, x30, x3, 2 # perform operation +80005f00: b03f0e33 sm4ed x28,x30,x3,0x2 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b150, Zksed_sm4ed_cg_cp_sbox_b150_str) +80005f04: 0004a203 lw x4,0(x9) +80005f08: 01c20863 beq x4,x28,80005f18 +80005f0c: 2b4022ef jal x5,800081c0 +80005f10: 80005f00 .word 0x80005f00 +80005f14: 80016506 .word 0x80016506 +80005f18: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x97979797 +80005f1c: 00052683 lw x13,0(x10) +80005f20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x97979797 +80005f24: 00052d83 lw x27,0(x10) +80005f28: 00450513 addi x10,x10,4 + +80005f2c : +Zksed_sm4ed_cg_cp_sbox_b151: + sm4ed x18, x13, x27, 2 # perform operation +80005f2c: b1b68933 sm4ed x18,x13,x27,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b151, Zksed_sm4ed_cg_cp_sbox_b151_str) +80005f30: 0004a203 lw x4,0(x9) +80005f34: 01220863 beq x4,x18,80005f44 +80005f38: 288022ef jal x5,800081c0 +80005f3c: 80005f2c .word 0x80005f2c +80005f40: 8001653e .word 0x8001653e +80005f44: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x98989898 +80005f48: 00052d83 lw x27,0(x10) +80005f4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x98989898 +80005f50: 00052303 lw x6,0(x10) +80005f54: 00450513 addi x10,x10,4 + +80005f58 : +Zksed_sm4ed_cg_cp_sbox_b152: + sm4ed x1, x27, x6, 3 # perform operation +80005f58: f06d80b3 sm4ed x1,x27,x6,0x3 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b152, Zksed_sm4ed_cg_cp_sbox_b152_str) +80005f5c: 0004a203 lw x4,0(x9) +80005f60: 00120863 beq x4,x1,80005f70 +80005f64: 25c022ef jal x5,800081c0 +80005f68: 80005f58 .word 0x80005f58 +80005f6c: 80016576 .word 0x80016576 +80005f70: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x99999999 +80005f74: 00052b03 lw x22,0(x10) +80005f78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x99999999 +80005f7c: 00052f03 lw x30,0(x10) +80005f80: 00450513 addi x10,x10,4 + +80005f84 : +Zksed_sm4ed_cg_cp_sbox_b153: + sm4ed x25, x22, x30, 1 # perform operation +80005f84: 71eb0cb3 sm4ed x25,x22,x30,0x1 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b153, Zksed_sm4ed_cg_cp_sbox_b153_str) +80005f88: 0004a203 lw x4,0(x9) +80005f8c: 01920863 beq x4,x25,80005f9c +80005f90: 230022ef jal x5,800081c0 +80005f94: 80005f84 .word 0x80005f84 +80005f98: 800165ae .word 0x800165ae +80005f9c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x9a9a9a9a +80005fa0: 00052c03 lw x24,0(x10) +80005fa4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x9a9a9a9a +80005fa8: 00052e03 lw x28,0(x10) +80005fac: 00450513 addi x10,x10,4 + +80005fb0 : +Zksed_sm4ed_cg_cp_sbox_b154: + sm4ed x19, x24, x28, 0 # perform operation +80005fb0: 31cc09b3 sm4ed x19,x24,x28,0x0 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b154, Zksed_sm4ed_cg_cp_sbox_b154_str) +80005fb4: 0004a203 lw x4,0(x9) +80005fb8: 01320863 beq x4,x19,80005fc8 +80005fbc: 204022ef jal x5,800081c0 +80005fc0: 80005fb0 .word 0x80005fb0 +80005fc4: 800165e6 .word 0x800165e6 +80005fc8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x9b9b9b9b +80005fcc: 00052103 lw x2,0(x10) +80005fd0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x9b9b9b9b +80005fd4: 00052c03 lw x24,0(x10) +80005fd8: 00450513 addi x10,x10,4 + +80005fdc : +Zksed_sm4ed_cg_cp_sbox_b155: + sm4ed x19, x2, x24, 0 # perform operation +80005fdc: 318109b3 sm4ed x19,x2,x24,0x0 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b155, Zksed_sm4ed_cg_cp_sbox_b155_str) +80005fe0: 0004a203 lw x4,0(x9) +80005fe4: 01320863 beq x4,x19,80005ff4 +80005fe8: 1d8022ef jal x5,800081c0 +80005fec: 80005fdc .word 0x80005fdc +80005ff0: 8001661e .word 0x8001661e +80005ff4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x9c9c9c9c +80005ff8: 00052103 lw x2,0(x10) +80005ffc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x9c9c9c9c +80006000: 00052183 lw x3,0(x10) +80006004: 00450513 addi x10,x10,4 + +80006008 : +Zksed_sm4ed_cg_cp_sbox_b156: + sm4ed x27, x2, x3, 2 # perform operation +80006008: b0310db3 sm4ed x27,x2,x3,0x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b156, Zksed_sm4ed_cg_cp_sbox_b156_str) +8000600c: 0004a203 lw x4,0(x9) +80006010: 01b20863 beq x4,x27,80006020 +80006014: 1ac022ef jal x5,800081c0 +80006018: 80006008 .word 0x80006008 +8000601c: 80016656 .word 0x80016656 +80006020: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x9d9d9d9d +80006024: 00052d03 lw x26,0(x10) +80006028: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x9d9d9d9d +8000602c: 00052803 lw x16,0(x10) +80006030: 00450513 addi x10,x10,4 + +80006034 : +Zksed_sm4ed_cg_cp_sbox_b157: + sm4ed x11, x26, x16, 2 # perform operation +80006034: b10d05b3 sm4ed x11,x26,x16,0x2 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b157, Zksed_sm4ed_cg_cp_sbox_b157_str) +80006038: 0004a203 lw x4,0(x9) +8000603c: 00b20863 beq x4,x11,8000604c +80006040: 180022ef jal x5,800081c0 +80006044: 80006034 .word 0x80006034 +80006048: 8001668e .word 0x8001668e +8000604c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x9e9e9e9e +80006050: 00052d83 lw x27,0(x10) +80006054: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x9e9e9e9e +80006058: 00052303 lw x6,0(x10) +8000605c: 00450513 addi x10,x10,4 + +80006060 : +Zksed_sm4ed_cg_cp_sbox_b158: + sm4ed x8, x27, x6, 3 # perform operation +80006060: f06d8433 sm4ed x8,x27,x6,0x3 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b158, Zksed_sm4ed_cg_cp_sbox_b158_str) +80006064: 0004a203 lw x4,0(x9) +80006068: 00820863 beq x4,x8,80006078 +8000606c: 154022ef jal x5,800081c0 +80006070: 80006060 .word 0x80006060 +80006074: 800166c6 .word 0x800166c6 +80006078: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x9f9f9f9f +8000607c: 00052103 lw x2,0(x10) +80006080: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x9f9f9f9f +80006084: 00052e83 lw x29,0(x10) +80006088: 00450513 addi x10,x10,4 + +8000608c : +Zksed_sm4ed_cg_cp_sbox_b159: + sm4ed x17, x2, x29, 1 # perform operation +8000608c: 71d108b3 sm4ed x17,x2,x29,0x1 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b159, Zksed_sm4ed_cg_cp_sbox_b159_str) +80006090: 0004a203 lw x4,0(x9) +80006094: 01120863 beq x4,x17,800060a4 +80006098: 128022ef jal x5,800081c0 +8000609c: 8000608c .word 0x8000608c +800060a0: 800166fe .word 0x800166fe +800060a4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xa0a0a0a0 +800060a8: 00052e83 lw x29,0(x10) +800060ac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xa0a0a0a0 +800060b0: 00052983 lw x19,0(x10) +800060b4: 00450513 addi x10,x10,4 + +800060b8 : +Zksed_sm4ed_cg_cp_sbox_b160: + sm4ed x27, x29, x19, 2 # perform operation +800060b8: b13e8db3 sm4ed x27,x29,x19,0x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b160, Zksed_sm4ed_cg_cp_sbox_b160_str) +800060bc: 0004a203 lw x4,0(x9) +800060c0: 01b20863 beq x4,x27,800060d0 +800060c4: 0fc022ef jal x5,800081c0 +800060c8: 800060b8 .word 0x800060b8 +800060cc: 80016736 .word 0x80016736 +800060d0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xa1a1a1a1 +800060d4: 00052f83 lw x31,0(x10) +800060d8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xa1a1a1a1 +800060dc: 00052983 lw x19,0(x10) +800060e0: 00450513 addi x10,x10,4 + +800060e4 : +Zksed_sm4ed_cg_cp_sbox_b161: + sm4ed x25, x31, x19, 1 # perform operation +800060e4: 713f8cb3 sm4ed x25,x31,x19,0x1 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b161, Zksed_sm4ed_cg_cp_sbox_b161_str) +800060e8: 0004a203 lw x4,0(x9) +800060ec: 01920863 beq x4,x25,800060fc +800060f0: 0d0022ef jal x5,800081c0 +800060f4: 800060e4 .word 0x800060e4 +800060f8: 8001676e .word 0x8001676e +800060fc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xa2a2a2a2 +80006100: 00052983 lw x19,0(x10) +80006104: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xa2a2a2a2 +80006108: 00052583 lw x11,0(x10) +8000610c: 00450513 addi x10,x10,4 + +80006110 : +Zksed_sm4ed_cg_cp_sbox_b162: + sm4ed x20, x19, x11, 1 # perform operation +80006110: 70b98a33 sm4ed x20,x19,x11,0x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b162, Zksed_sm4ed_cg_cp_sbox_b162_str) +80006114: 0004a203 lw x4,0(x9) +80006118: 01420863 beq x4,x20,80006128 +8000611c: 0a4022ef jal x5,800081c0 +80006120: 80006110 .word 0x80006110 +80006124: 800167a6 .word 0x800167a6 +80006128: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xa3a3a3a3 +8000612c: 00052303 lw x6,0(x10) +80006130: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xa3a3a3a3 +80006134: 00052b83 lw x23,0(x10) +80006138: 00450513 addi x10,x10,4 + +8000613c : +Zksed_sm4ed_cg_cp_sbox_b163: + sm4ed x22, x6, x23, 1 # perform operation +8000613c: 71730b33 sm4ed x22,x6,x23,0x1 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b163, Zksed_sm4ed_cg_cp_sbox_b163_str) +80006140: 0004a203 lw x4,0(x9) +80006144: 01620863 beq x4,x22,80006154 +80006148: 078022ef jal x5,800081c0 +8000614c: 8000613c .word 0x8000613c +80006150: 800167de .word 0x800167de +80006154: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xa4a4a4a4 +80006158: 00052883 lw x17,0(x10) +8000615c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xa4a4a4a4 +80006160: 00052103 lw x2,0(x10) +80006164: 00450513 addi x10,x10,4 + +80006168 : +Zksed_sm4ed_cg_cp_sbox_b164: + sm4ed x21, x17, x2, 1 # perform operation +80006168: 70288ab3 sm4ed x21,x17,x2,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b164, Zksed_sm4ed_cg_cp_sbox_b164_str) +8000616c: 0004a203 lw x4,0(x9) +80006170: 01520863 beq x4,x21,80006180 +80006174: 04c022ef jal x5,800081c0 +80006178: 80006168 .word 0x80006168 +8000617c: 80016816 .word 0x80016816 +80006180: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xa5a5a5a5 +80006184: 00052083 lw x1,0(x10) +80006188: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xa5a5a5a5 +8000618c: 00052683 lw x13,0(x10) +80006190: 00450513 addi x10,x10,4 + +80006194 : +Zksed_sm4ed_cg_cp_sbox_b165: + sm4ed x27, x1, x13, 3 # perform operation +80006194: f0d08db3 sm4ed x27,x1,x13,0x3 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b165, Zksed_sm4ed_cg_cp_sbox_b165_str) +80006198: 0004a203 lw x4,0(x9) +8000619c: 01b20863 beq x4,x27,800061ac +800061a0: 020022ef jal x5,800081c0 +800061a4: 80006194 .word 0x80006194 +800061a8: 8001684e .word 0x8001684e +800061ac: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xa6a6a6a6 +800061b0: 00052d83 lw x27,0(x10) +800061b4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xa6a6a6a6 +800061b8: 00052f03 lw x30,0(x10) +800061bc: 00450513 addi x10,x10,4 + +800061c0 : +Zksed_sm4ed_cg_cp_sbox_b166: + sm4ed x8, x27, x30, 1 # perform operation +800061c0: 71ed8433 sm4ed x8,x27,x30,0x1 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b166, Zksed_sm4ed_cg_cp_sbox_b166_str) +800061c4: 0004a203 lw x4,0(x9) +800061c8: 00820863 beq x4,x8,800061d8 +800061cc: 7f5012ef jal x5,800081c0 +800061d0: 800061c0 .word 0x800061c0 +800061d4: 80016886 .word 0x80016886 +800061d8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xa7a7a7a7 +800061dc: 00052683 lw x13,0(x10) +800061e0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xa7a7a7a7 +800061e4: 00052903 lw x18,0(x10) +800061e8: 00450513 addi x10,x10,4 + +800061ec : +Zksed_sm4ed_cg_cp_sbox_b167: + sm4ed x3, x13, x18, 3 # perform operation +800061ec: f12681b3 sm4ed x3,x13,x18,0x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b167, Zksed_sm4ed_cg_cp_sbox_b167_str) +800061f0: 0004a203 lw x4,0(x9) +800061f4: 00320863 beq x4,x3,80006204 +800061f8: 7c9012ef jal x5,800081c0 +800061fc: 800061ec .word 0x800061ec +80006200: 800168be .word 0x800168be +80006204: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xa8a8a8a8 +80006208: 00052a83 lw x21,0(x10) +8000620c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xa8a8a8a8 +80006210: 00052b83 lw x23,0(x10) +80006214: 00450513 addi x10,x10,4 + +80006218 : +Zksed_sm4ed_cg_cp_sbox_b168: + sm4ed x22, x21, x23, 3 # perform operation +80006218: f17a8b33 sm4ed x22,x21,x23,0x3 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b168, Zksed_sm4ed_cg_cp_sbox_b168_str) +8000621c: 0004a203 lw x4,0(x9) +80006220: 01620863 beq x4,x22,80006230 +80006224: 79d012ef jal x5,800081c0 +80006228: 80006218 .word 0x80006218 +8000622c: 800168f6 .word 0x800168f6 +80006230: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xa9a9a9a9 +80006234: 00052903 lw x18,0(x10) +80006238: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xa9a9a9a9 +8000623c: 00052d03 lw x26,0(x10) +80006240: 00450513 addi x10,x10,4 + +80006244 : +Zksed_sm4ed_cg_cp_sbox_b169: + sm4ed x1, x18, x26, 3 # perform operation +80006244: f1a900b3 sm4ed x1,x18,x26,0x3 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b169, Zksed_sm4ed_cg_cp_sbox_b169_str) +80006248: 0004a203 lw x4,0(x9) +8000624c: 00120863 beq x4,x1,8000625c +80006250: 771012ef jal x5,800081c0 +80006254: 80006244 .word 0x80006244 +80006258: 8001692e .word 0x8001692e +8000625c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaa +80006260: 00052f83 lw x31,0(x10) +80006264: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaa +80006268: 00052a83 lw x21,0(x10) +8000626c: 00450513 addi x10,x10,4 + +80006270 : +Zksed_sm4ed_cg_cp_sbox_b170: + sm4ed x20, x31, x21, 0 # perform operation +80006270: 315f8a33 sm4ed x20,x31,x21,0x0 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b170, Zksed_sm4ed_cg_cp_sbox_b170_str) +80006274: 0004a203 lw x4,0(x9) +80006278: 01420863 beq x4,x20,80006288 +8000627c: 745012ef jal x5,800081c0 +80006280: 80006270 .word 0x80006270 +80006284: 80016966 .word 0x80016966 +80006288: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xabababab +8000628c: 00052183 lw x3,0(x10) +80006290: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xabababab +80006294: 00052a83 lw x21,0(x10) +80006298: 00450513 addi x10,x10,4 + +8000629c : +Zksed_sm4ed_cg_cp_sbox_b171: + sm4ed x8, x3, x21, 3 # perform operation +8000629c: f1518433 sm4ed x8,x3,x21,0x3 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b171, Zksed_sm4ed_cg_cp_sbox_b171_str) +800062a0: 0004a203 lw x4,0(x9) +800062a4: 00820863 beq x4,x8,800062b4 +800062a8: 719012ef jal x5,800081c0 +800062ac: 8000629c .word 0x8000629c +800062b0: 8001699e .word 0x8001699e +800062b4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xacacacac +800062b8: 00052b03 lw x22,0(x10) +800062bc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xacacacac +800062c0: 00052703 lw x14,0(x10) +800062c4: 00450513 addi x10,x10,4 + +800062c8 : +Zksed_sm4ed_cg_cp_sbox_b172: + sm4ed x23, x22, x14, 1 # perform operation +800062c8: 70eb0bb3 sm4ed x23,x22,x14,0x1 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cp_sbox_b172, Zksed_sm4ed_cg_cp_sbox_b172_str) +800062cc: 0004a203 lw x4,0(x9) +800062d0: 01720863 beq x4,x23,800062e0 +800062d4: 6ed012ef jal x5,800081c0 +800062d8: 800062c8 .word 0x800062c8 +800062dc: 800169d6 .word 0x800169d6 +800062e0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xadadadad +800062e4: 00052e03 lw x28,0(x10) +800062e8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xadadadad +800062ec: 00052983 lw x19,0(x10) +800062f0: 00450513 addi x10,x10,4 + +800062f4 : +Zksed_sm4ed_cg_cp_sbox_b173: + sm4ed x12, x28, x19, 1 # perform operation +800062f4: 713e0633 sm4ed x12,x28,x19,0x1 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b173, Zksed_sm4ed_cg_cp_sbox_b173_str) +800062f8: 0004a203 lw x4,0(x9) +800062fc: 00c20863 beq x4,x12,8000630c +80006300: 6c1012ef jal x5,800081c0 +80006304: 800062f4 .word 0x800062f4 +80006308: 80016a0e .word 0x80016a0e +8000630c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xaeaeaeae +80006310: 00052d83 lw x27,0(x10) +80006314: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xaeaeaeae +80006318: 00052983 lw x19,0(x10) +8000631c: 00450513 addi x10,x10,4 + +80006320 : +Zksed_sm4ed_cg_cp_sbox_b174: + sm4ed x14, x27, x19, 0 # perform operation +80006320: 313d8733 sm4ed x14,x27,x19,0x0 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b174, Zksed_sm4ed_cg_cp_sbox_b174_str) +80006324: 0004a203 lw x4,0(x9) +80006328: 00e20863 beq x4,x14,80006338 +8000632c: 695012ef jal x5,800081c0 +80006330: 80006320 .word 0x80006320 +80006334: 80016a46 .word 0x80016a46 +80006338: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xafafafaf +8000633c: 00052883 lw x17,0(x10) +80006340: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xafafafaf +80006344: 00052683 lw x13,0(x10) +80006348: 00450513 addi x10,x10,4 + +8000634c : +Zksed_sm4ed_cg_cp_sbox_b175: + sm4ed x18, x17, x13, 2 # perform operation +8000634c: b0d88933 sm4ed x18,x17,x13,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b175, Zksed_sm4ed_cg_cp_sbox_b175_str) +80006350: 0004a203 lw x4,0(x9) +80006354: 01220863 beq x4,x18,80006364 +80006358: 669012ef jal x5,800081c0 +8000635c: 8000634c .word 0x8000634c +80006360: 80016a7e .word 0x80016a7e +80006364: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xb0b0b0b0 +80006368: 00052703 lw x14,0(x10) +8000636c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xb0b0b0b0 +80006370: 00052103 lw x2,0(x10) +80006374: 00450513 addi x10,x10,4 + +80006378 : +Zksed_sm4ed_cg_cp_sbox_b176: + sm4ed x16, x14, x2, 2 # perform operation +80006378: b0270833 sm4ed x16,x14,x2,0x2 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b176, Zksed_sm4ed_cg_cp_sbox_b176_str) +8000637c: 0004a203 lw x4,0(x9) +80006380: 01020863 beq x4,x16,80006390 +80006384: 63d012ef jal x5,800081c0 +80006388: 80006378 .word 0x80006378 +8000638c: 80016ab6 .word 0x80016ab6 +80006390: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xb1b1b1b1 +80006394: 00052803 lw x16,0(x10) +80006398: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xb1b1b1b1 +8000639c: 00052b83 lw x23,0(x10) +800063a0: 00450513 addi x10,x10,4 + +800063a4 : +Zksed_sm4ed_cg_cp_sbox_b177: + sm4ed x22, x16, x23, 1 # perform operation +800063a4: 71780b33 sm4ed x22,x16,x23,0x1 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b177, Zksed_sm4ed_cg_cp_sbox_b177_str) +800063a8: 0004a203 lw x4,0(x9) +800063ac: 01620863 beq x4,x22,800063bc +800063b0: 611012ef jal x5,800081c0 +800063b4: 800063a4 .word 0x800063a4 +800063b8: 80016aee .word 0x80016aee +800063bc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xb2b2b2b2 +800063c0: 00052d03 lw x26,0(x10) +800063c4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xb2b2b2b2 +800063c8: 00052583 lw x11,0(x10) +800063cc: 00450513 addi x10,x10,4 + +800063d0 : +Zksed_sm4ed_cg_cp_sbox_b178: + sm4ed x13, x26, x11, 0 # perform operation +800063d0: 30bd06b3 sm4ed x13,x26,x11,0x0 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b178, Zksed_sm4ed_cg_cp_sbox_b178_str) +800063d4: 0004a203 lw x4,0(x9) +800063d8: 00d20863 beq x4,x13,800063e8 +800063dc: 5e5012ef jal x5,800081c0 +800063e0: 800063d0 .word 0x800063d0 +800063e4: 80016b26 .word 0x80016b26 +800063e8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xb3b3b3b3 +800063ec: 00052783 lw x15,0(x10) +800063f0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xb3b3b3b3 +800063f4: 00052a83 lw x21,0(x10) +800063f8: 00450513 addi x10,x10,4 + +800063fc : +Zksed_sm4ed_cg_cp_sbox_b179: + sm4ed x16, x15, x21, 3 # perform operation +800063fc: f1578833 sm4ed x16,x15,x21,0x3 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b179, Zksed_sm4ed_cg_cp_sbox_b179_str) +80006400: 0004a203 lw x4,0(x9) +80006404: 01020863 beq x4,x16,80006414 +80006408: 5b9012ef jal x5,800081c0 +8000640c: 800063fc .word 0x800063fc +80006410: 80016b5e .word 0x80016b5e +80006414: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xb4b4b4b4 +80006418: 00052303 lw x6,0(x10) +8000641c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xb4b4b4b4 +80006420: 00052e83 lw x29,0(x10) +80006424: 00450513 addi x10,x10,4 + +80006428 : +Zksed_sm4ed_cg_cp_sbox_b180: + sm4ed x13, x6, x29, 3 # perform operation +80006428: f1d306b3 sm4ed x13,x6,x29,0x3 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b180, Zksed_sm4ed_cg_cp_sbox_b180_str) +8000642c: 0004a203 lw x4,0(x9) +80006430: 00d20863 beq x4,x13,80006440 +80006434: 58d012ef jal x5,800081c0 +80006438: 80006428 .word 0x80006428 +8000643c: 80016b96 .word 0x80016b96 +80006440: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xb5b5b5b5 +80006444: 00052083 lw x1,0(x10) +80006448: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xb5b5b5b5 +8000644c: 00052703 lw x14,0(x10) +80006450: 00450513 addi x10,x10,4 + +80006454 : +Zksed_sm4ed_cg_cp_sbox_b181: + sm4ed x30, x1, x14, 2 # perform operation +80006454: b0e08f33 sm4ed x30,x1,x14,0x2 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b181, Zksed_sm4ed_cg_cp_sbox_b181_str) +80006458: 0004a203 lw x4,0(x9) +8000645c: 01e20863 beq x4,x30,8000646c +80006460: 561012ef jal x5,800081c0 +80006464: 80006454 .word 0x80006454 +80006468: 80016bce .word 0x80016bce +8000646c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xb6b6b6b6 +80006470: 00052983 lw x19,0(x10) +80006474: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xb6b6b6b6 +80006478: 00052703 lw x14,0(x10) +8000647c: 00450513 addi x10,x10,4 + +80006480 : +Zksed_sm4ed_cg_cp_sbox_b182: + sm4ed x24, x19, x14, 1 # perform operation +80006480: 70e98c33 sm4ed x24,x19,x14,0x1 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b182, Zksed_sm4ed_cg_cp_sbox_b182_str) +80006484: 0004a203 lw x4,0(x9) +80006488: 01820863 beq x4,x24,80006498 +8000648c: 535012ef jal x5,800081c0 +80006490: 80006480 .word 0x80006480 +80006494: 80016c06 .word 0x80016c06 +80006498: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xb7b7b7b7 +8000649c: 00052e03 lw x28,0(x10) +800064a0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xb7b7b7b7 +800064a4: 00052a03 lw x20,0(x10) +800064a8: 00450513 addi x10,x10,4 + +800064ac : +Zksed_sm4ed_cg_cp_sbox_b183: + sm4ed x29, x28, x20, 1 # perform operation +800064ac: 714e0eb3 sm4ed x29,x28,x20,0x1 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b183, Zksed_sm4ed_cg_cp_sbox_b183_str) +800064b0: 0004a203 lw x4,0(x9) +800064b4: 01d20863 beq x4,x29,800064c4 +800064b8: 509012ef jal x5,800081c0 +800064bc: 800064ac .word 0x800064ac +800064c0: 80016c3e .word 0x80016c3e +800064c4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xb8b8b8b8 +800064c8: 00052983 lw x19,0(x10) +800064cc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xb8b8b8b8 +800064d0: 00052f03 lw x30,0(x10) +800064d4: 00450513 addi x10,x10,4 + +800064d8 : +Zksed_sm4ed_cg_cp_sbox_b184: + sm4ed x29, x19, x30, 1 # perform operation +800064d8: 71e98eb3 sm4ed x29,x19,x30,0x1 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b184, Zksed_sm4ed_cg_cp_sbox_b184_str) +800064dc: 0004a203 lw x4,0(x9) +800064e0: 01d20863 beq x4,x29,800064f0 +800064e4: 4dd012ef jal x5,800081c0 +800064e8: 800064d8 .word 0x800064d8 +800064ec: 80016c76 .word 0x80016c76 +800064f0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xb9b9b9b9 +800064f4: 00052d03 lw x26,0(x10) +800064f8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xb9b9b9b9 +800064fc: 00052383 lw x7,0(x10) +80006500: 00450513 addi x10,x10,4 + +80006504 : +Zksed_sm4ed_cg_cp_sbox_b185: + sm4ed x3, x26, x7, 1 # perform operation +80006504: 707d01b3 sm4ed x3,x26,x7,0x1 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b185, Zksed_sm4ed_cg_cp_sbox_b185_str) +80006508: 0004a203 lw x4,0(x9) +8000650c: 00320863 beq x4,x3,8000651c +80006510: 4b1012ef jal x5,800081c0 +80006514: 80006504 .word 0x80006504 +80006518: 80016cae .word 0x80016cae +8000651c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xbabababa +80006520: 00052983 lw x19,0(x10) +80006524: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xbabababa +80006528: 00052703 lw x14,0(x10) +8000652c: 00450513 addi x10,x10,4 + +80006530 : +Zksed_sm4ed_cg_cp_sbox_b186: + sm4ed x27, x19, x14, 3 # perform operation +80006530: f0e98db3 sm4ed x27,x19,x14,0x3 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b186, Zksed_sm4ed_cg_cp_sbox_b186_str) +80006534: 0004a203 lw x4,0(x9) +80006538: 01b20863 beq x4,x27,80006548 +8000653c: 485012ef jal x5,800081c0 +80006540: 80006530 .word 0x80006530 +80006544: 80016ce6 .word 0x80016ce6 +80006548: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xbbbbbbbb +8000654c: 00052083 lw x1,0(x10) +80006550: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xbbbbbbbb +80006554: 00052c83 lw x25,0(x10) +80006558: 00450513 addi x10,x10,4 + +8000655c : +Zksed_sm4ed_cg_cp_sbox_b187: + sm4ed x3, x1, x25, 3 # perform operation +8000655c: f19081b3 sm4ed x3,x1,x25,0x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b187, Zksed_sm4ed_cg_cp_sbox_b187_str) +80006560: 0004a203 lw x4,0(x9) +80006564: 00320863 beq x4,x3,80006574 +80006568: 459012ef jal x5,800081c0 +8000656c: 8000655c .word 0x8000655c +80006570: 80016d1e .word 0x80016d1e +80006574: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xbcbcbcbc +80006578: 00052783 lw x15,0(x10) +8000657c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xbcbcbcbc +80006580: 00052903 lw x18,0(x10) +80006584: 00450513 addi x10,x10,4 + +80006588 : +Zksed_sm4ed_cg_cp_sbox_b188: + sm4ed x27, x15, x18, 3 # perform operation +80006588: f1278db3 sm4ed x27,x15,x18,0x3 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b188, Zksed_sm4ed_cg_cp_sbox_b188_str) +8000658c: 0004a203 lw x4,0(x9) +80006590: 01b20863 beq x4,x27,800065a0 +80006594: 42d012ef jal x5,800081c0 +80006598: 80006588 .word 0x80006588 +8000659c: 80016d56 .word 0x80016d56 +800065a0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xbdbdbdbd +800065a4: 00052f03 lw x30,0(x10) +800065a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xbdbdbdbd +800065ac: 00052083 lw x1,0(x10) +800065b0: 00450513 addi x10,x10,4 + +800065b4 : +Zksed_sm4ed_cg_cp_sbox_b189: + sm4ed x19, x30, x1, 3 # perform operation +800065b4: f01f09b3 sm4ed x19,x30,x1,0x3 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b189, Zksed_sm4ed_cg_cp_sbox_b189_str) +800065b8: 0004a203 lw x4,0(x9) +800065bc: 01320863 beq x4,x19,800065cc +800065c0: 401012ef jal x5,800081c0 +800065c4: 800065b4 .word 0x800065b4 +800065c8: 80016d8e .word 0x80016d8e +800065cc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xbebebebe +800065d0: 00052683 lw x13,0(x10) +800065d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xbebebebe +800065d8: 00052f83 lw x31,0(x10) +800065dc: 00450513 addi x10,x10,4 + +800065e0 : +Zksed_sm4ed_cg_cp_sbox_b190: + sm4ed x22, x13, x31, 1 # perform operation +800065e0: 71f68b33 sm4ed x22,x13,x31,0x1 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b190, Zksed_sm4ed_cg_cp_sbox_b190_str) +800065e4: 0004a203 lw x4,0(x9) +800065e8: 01620863 beq x4,x22,800065f8 +800065ec: 3d5012ef jal x5,800081c0 +800065f0: 800065e0 .word 0x800065e0 +800065f4: 80016dc6 .word 0x80016dc6 +800065f8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xbfbfbfbf +800065fc: 00052583 lw x11,0(x10) +80006600: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xbfbfbfbf +80006604: 00052683 lw x13,0(x10) +80006608: 00450513 addi x10,x10,4 + +8000660c : +Zksed_sm4ed_cg_cp_sbox_b191: + sm4ed x14, x11, x13, 0 # perform operation +8000660c: 30d58733 sm4ed x14,x11,x13,0x0 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b191, Zksed_sm4ed_cg_cp_sbox_b191_str) +80006610: 0004a203 lw x4,0(x9) +80006614: 00e20863 beq x4,x14,80006624 +80006618: 3a9012ef jal x5,800081c0 +8000661c: 8000660c .word 0x8000660c +80006620: 80016dfe .word 0x80016dfe +80006624: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xc0c0c0c0 +80006628: 00052883 lw x17,0(x10) +8000662c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xc0c0c0c0 +80006630: 00052983 lw x19,0(x10) +80006634: 00450513 addi x10,x10,4 + +80006638 : +Zksed_sm4ed_cg_cp_sbox_b192: + sm4ed x20, x17, x19, 2 # perform operation +80006638: b1388a33 sm4ed x20,x17,x19,0x2 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zksed_sm4ed_cg_cp_sbox_b192, Zksed_sm4ed_cg_cp_sbox_b192_str) +8000663c: 0004a203 lw x4,0(x9) +80006640: 01420863 beq x4,x20,80006650 +80006644: 37d012ef jal x5,800081c0 +80006648: 80006638 .word 0x80006638 +8000664c: 80016e36 .word 0x80016e36 +80006650: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xc1c1c1c1 +80006654: 00052c83 lw x25,0(x10) +80006658: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xc1c1c1c1 +8000665c: 00052703 lw x14,0(x10) +80006660: 00450513 addi x10,x10,4 + +80006664 : +Zksed_sm4ed_cg_cp_sbox_b193: + sm4ed x24, x25, x14, 1 # perform operation +80006664: 70ec8c33 sm4ed x24,x25,x14,0x1 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b193, Zksed_sm4ed_cg_cp_sbox_b193_str) +80006668: 0004a203 lw x4,0(x9) +8000666c: 01820863 beq x4,x24,8000667c +80006670: 351012ef jal x5,800081c0 +80006674: 80006664 .word 0x80006664 +80006678: 80016e6e .word 0x80016e6e +8000667c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xc2c2c2c2 +80006680: 00052603 lw x12,0(x10) +80006684: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xc2c2c2c2 +80006688: 00052c83 lw x25,0(x10) +8000668c: 00450513 addi x10,x10,4 + +80006690 : +Zksed_sm4ed_cg_cp_sbox_b194: + sm4ed x13, x12, x25, 2 # perform operation +80006690: b19606b3 sm4ed x13,x12,x25,0x2 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zksed_sm4ed_cg_cp_sbox_b194, Zksed_sm4ed_cg_cp_sbox_b194_str) +80006694: 0004a203 lw x4,0(x9) +80006698: 00d20863 beq x4,x13,800066a8 +8000669c: 325012ef jal x5,800081c0 +800066a0: 80006690 .word 0x80006690 +800066a4: 80016ea6 .word 0x80016ea6 +800066a8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xc3c3c3c3 +800066ac: 00052c03 lw x24,0(x10) +800066b0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xc3c3c3c3 +800066b4: 00052a03 lw x20,0(x10) +800066b8: 00450513 addi x10,x10,4 + +800066bc : +Zksed_sm4ed_cg_cp_sbox_b195: + sm4ed x2, x24, x20, 0 # perform operation +800066bc: 314c0133 sm4ed x2,x24,x20,0x0 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b195, Zksed_sm4ed_cg_cp_sbox_b195_str) +800066c0: 0004a203 lw x4,0(x9) +800066c4: 00220863 beq x4,x2,800066d4 +800066c8: 2f9012ef jal x5,800081c0 +800066cc: 800066bc .word 0x800066bc +800066d0: 80016ede .word 0x80016ede +800066d4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xc4c4c4c4 +800066d8: 00052303 lw x6,0(x10) +800066dc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xc4c4c4c4 +800066e0: 00052c83 lw x25,0(x10) +800066e4: 00450513 addi x10,x10,4 + +800066e8 : +Zksed_sm4ed_cg_cp_sbox_b196: + sm4ed x30, x6, x25, 0 # perform operation +800066e8: 31930f33 sm4ed x30,x6,x25,0x0 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b196, Zksed_sm4ed_cg_cp_sbox_b196_str) +800066ec: 0004a203 lw x4,0(x9) +800066f0: 01e20863 beq x4,x30,80006700 +800066f4: 2cd012ef jal x5,800081c0 +800066f8: 800066e8 .word 0x800066e8 +800066fc: 80016f16 .word 0x80016f16 +80006700: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xc5c5c5c5 +80006704: 00052883 lw x17,0(x10) +80006708: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xc5c5c5c5 +8000670c: 00052103 lw x2,0(x10) +80006710: 00450513 addi x10,x10,4 + +80006714 : +Zksed_sm4ed_cg_cp_sbox_b197: + sm4ed x12, x17, x2, 1 # perform operation +80006714: 70288633 sm4ed x12,x17,x2,0x1 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b197, Zksed_sm4ed_cg_cp_sbox_b197_str) +80006718: 0004a203 lw x4,0(x9) +8000671c: 00c20863 beq x4,x12,8000672c +80006720: 2a1012ef jal x5,800081c0 +80006724: 80006714 .word 0x80006714 +80006728: 80016f4e .word 0x80016f4e +8000672c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xc6c6c6c6 +80006730: 00052883 lw x17,0(x10) +80006734: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xc6c6c6c6 +80006738: 00052a03 lw x20,0(x10) +8000673c: 00450513 addi x10,x10,4 + +80006740 : +Zksed_sm4ed_cg_cp_sbox_b198: + sm4ed x22, x17, x20, 1 # perform operation +80006740: 71488b33 sm4ed x22,x17,x20,0x1 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b198, Zksed_sm4ed_cg_cp_sbox_b198_str) +80006744: 0004a203 lw x4,0(x9) +80006748: 01620863 beq x4,x22,80006758 +8000674c: 275012ef jal x5,800081c0 +80006750: 80006740 .word 0x80006740 +80006754: 80016f86 .word 0x80016f86 +80006758: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xc7c7c7c7 +8000675c: 00052383 lw x7,0(x10) +80006760: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xc7c7c7c7 +80006764: 00052e83 lw x29,0(x10) +80006768: 00450513 addi x10,x10,4 + +8000676c : +Zksed_sm4ed_cg_cp_sbox_b199: + sm4ed x15, x7, x29, 3 # perform operation +8000676c: f1d387b3 sm4ed x15,x7,x29,0x3 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zksed_sm4ed_cg_cp_sbox_b199, Zksed_sm4ed_cg_cp_sbox_b199_str) +80006770: 0004a203 lw x4,0(x9) +80006774: 00f20863 beq x4,x15,80006784 +80006778: 249012ef jal x5,800081c0 +8000677c: 8000676c .word 0x8000676c +80006780: 80016fbe .word 0x80016fbe +80006784: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xc8c8c8c8 +80006788: 00052d83 lw x27,0(x10) +8000678c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xc8c8c8c8 +80006790: 00052f83 lw x31,0(x10) +80006794: 00450513 addi x10,x10,4 + +80006798 : +Zksed_sm4ed_cg_cp_sbox_b200: + sm4ed x7, x27, x31, 0 # perform operation +80006798: 31fd83b3 sm4ed x7,x27,x31,0x0 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b200, Zksed_sm4ed_cg_cp_sbox_b200_str) +8000679c: 0004a203 lw x4,0(x9) +800067a0: 00720863 beq x4,x7,800067b0 +800067a4: 21d012ef jal x5,800081c0 +800067a8: 80006798 .word 0x80006798 +800067ac: 80016ff6 .word 0x80016ff6 +800067b0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xc9c9c9c9 +800067b4: 00052183 lw x3,0(x10) +800067b8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xc9c9c9c9 +800067bc: 00052603 lw x12,0(x10) +800067c0: 00450513 addi x10,x10,4 + +800067c4 : +Zksed_sm4ed_cg_cp_sbox_b201: + sm4ed x21, x3, x12, 1 # perform operation +800067c4: 70c18ab3 sm4ed x21,x3,x12,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b201, Zksed_sm4ed_cg_cp_sbox_b201_str) +800067c8: 0004a203 lw x4,0(x9) +800067cc: 01520863 beq x4,x21,800067dc +800067d0: 1f1012ef jal x5,800081c0 +800067d4: 800067c4 .word 0x800067c4 +800067d8: 8001702e .word 0x8001702e +800067dc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xcacacaca +800067e0: 00052183 lw x3,0(x10) +800067e4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xcacacaca +800067e8: 00052c03 lw x24,0(x10) +800067ec: 00450513 addi x10,x10,4 + +800067f0 : +Zksed_sm4ed_cg_cp_sbox_b202: + sm4ed x31, x3, x24, 1 # perform operation +800067f0: 71818fb3 sm4ed x31,x3,x24,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b202, Zksed_sm4ed_cg_cp_sbox_b202_str) +800067f4: 0004a203 lw x4,0(x9) +800067f8: 01f20863 beq x4,x31,80006808 +800067fc: 1c5012ef jal x5,800081c0 +80006800: 800067f0 .word 0x800067f0 +80006804: 80017066 .word 0x80017066 +80006808: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xcbcbcbcb +8000680c: 00052783 lw x15,0(x10) +80006810: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xcbcbcbcb +80006814: 00052b83 lw x23,0(x10) +80006818: 00450513 addi x10,x10,4 + +8000681c : +Zksed_sm4ed_cg_cp_sbox_b203: + sm4ed x14, x15, x23, 2 # perform operation +8000681c: b1778733 sm4ed x14,x15,x23,0x2 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zksed_sm4ed_cg_cp_sbox_b203, Zksed_sm4ed_cg_cp_sbox_b203_str) +80006820: 0004a203 lw x4,0(x9) +80006824: 00e20863 beq x4,x14,80006834 +80006828: 199012ef jal x5,800081c0 +8000682c: 8000681c .word 0x8000681c +80006830: 8001709e .word 0x8001709e +80006834: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xcccccccc +80006838: 00052f03 lw x30,0(x10) +8000683c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xcccccccc +80006840: 00052603 lw x12,0(x10) +80006844: 00450513 addi x10,x10,4 + +80006848 : +Zksed_sm4ed_cg_cp_sbox_b204: + sm4ed x22, x30, x12, 3 # perform operation +80006848: f0cf0b33 sm4ed x22,x30,x12,0x3 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b204, Zksed_sm4ed_cg_cp_sbox_b204_str) +8000684c: 0004a203 lw x4,0(x9) +80006850: 01620863 beq x4,x22,80006860 +80006854: 16d012ef jal x5,800081c0 +80006858: 80006848 .word 0x80006848 +8000685c: 800170d6 .word 0x800170d6 +80006860: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xcdcdcdcd +80006864: 00052d83 lw x27,0(x10) +80006868: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xcdcdcdcd +8000686c: 00052083 lw x1,0(x10) +80006870: 00450513 addi x10,x10,4 + +80006874 : +Zksed_sm4ed_cg_cp_sbox_b205: + sm4ed x7, x27, x1, 1 # perform operation +80006874: 701d83b3 sm4ed x7,x27,x1,0x1 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b205, Zksed_sm4ed_cg_cp_sbox_b205_str) +80006878: 0004a203 lw x4,0(x9) +8000687c: 00720863 beq x4,x7,8000688c +80006880: 141012ef jal x5,800081c0 +80006884: 80006874 .word 0x80006874 +80006888: 8001710e .word 0x8001710e +8000688c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xcececece +80006890: 00052703 lw x14,0(x10) +80006894: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xcececece +80006898: 00052f83 lw x31,0(x10) +8000689c: 00450513 addi x10,x10,4 + +800068a0 : +Zksed_sm4ed_cg_cp_sbox_b206: + sm4ed x7, x14, x31, 0 # perform operation +800068a0: 31f703b3 sm4ed x7,x14,x31,0x0 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b206, Zksed_sm4ed_cg_cp_sbox_b206_str) +800068a4: 0004a203 lw x4,0(x9) +800068a8: 00720863 beq x4,x7,800068b8 +800068ac: 115012ef jal x5,800081c0 +800068b0: 800068a0 .word 0x800068a0 +800068b4: 80017146 .word 0x80017146 +800068b8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xcfcfcfcf +800068bc: 00052a83 lw x21,0(x10) +800068c0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xcfcfcfcf +800068c4: 00052c83 lw x25,0(x10) +800068c8: 00450513 addi x10,x10,4 + +800068cc : +Zksed_sm4ed_cg_cp_sbox_b207: + sm4ed x19, x21, x25, 2 # perform operation +800068cc: b19a89b3 sm4ed x19,x21,x25,0x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b207, Zksed_sm4ed_cg_cp_sbox_b207_str) +800068d0: 0004a203 lw x4,0(x9) +800068d4: 01320863 beq x4,x19,800068e4 +800068d8: 0e9012ef jal x5,800081c0 +800068dc: 800068cc .word 0x800068cc +800068e0: 8001717e .word 0x8001717e +800068e4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xd0d0d0d0 +800068e8: 00052683 lw x13,0(x10) +800068ec: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xd0d0d0d0 +800068f0: 00052383 lw x7,0(x10) +800068f4: 00450513 addi x10,x10,4 + +800068f8 : +Zksed_sm4ed_cg_cp_sbox_b208: + sm4ed x25, x13, x7, 2 # perform operation +800068f8: b0768cb3 sm4ed x25,x13,x7,0x2 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b208, Zksed_sm4ed_cg_cp_sbox_b208_str) +800068fc: 0004a203 lw x4,0(x9) +80006900: 01920863 beq x4,x25,80006910 +80006904: 0bd012ef jal x5,800081c0 +80006908: 800068f8 .word 0x800068f8 +8000690c: 800171b6 .word 0x800171b6 +80006910: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xd1d1d1d1 +80006914: 00052f03 lw x30,0(x10) +80006918: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xd1d1d1d1 +8000691c: 00052703 lw x14,0(x10) +80006920: 00450513 addi x10,x10,4 + +80006924 : +Zksed_sm4ed_cg_cp_sbox_b209: + sm4ed x11, x30, x14, 1 # perform operation +80006924: 70ef05b3 sm4ed x11,x30,x14,0x1 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b209, Zksed_sm4ed_cg_cp_sbox_b209_str) +80006928: 0004a203 lw x4,0(x9) +8000692c: 00b20863 beq x4,x11,8000693c +80006930: 091012ef jal x5,800081c0 +80006934: 80006924 .word 0x80006924 +80006938: 800171ee .word 0x800171ee +8000693c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xd2d2d2d2 +80006940: 00052b83 lw x23,0(x10) +80006944: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xd2d2d2d2 +80006948: 00052803 lw x16,0(x10) +8000694c: 00450513 addi x10,x10,4 + +80006950 : +Zksed_sm4ed_cg_cp_sbox_b210: + sm4ed x6, x23, x16, 0 # perform operation +80006950: 310b8333 sm4ed x6,x23,x16,0x0 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b210, Zksed_sm4ed_cg_cp_sbox_b210_str) +80006954: 0004a203 lw x4,0(x9) +80006958: 00620863 beq x4,x6,80006968 +8000695c: 065012ef jal x5,800081c0 +80006960: 80006950 .word 0x80006950 +80006964: 80017226 .word 0x80017226 +80006968: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xd3d3d3d3 +8000696c: 00052583 lw x11,0(x10) +80006970: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xd3d3d3d3 +80006974: 00052183 lw x3,0(x10) +80006978: 00450513 addi x10,x10,4 + +8000697c : +Zksed_sm4ed_cg_cp_sbox_b211: + sm4ed x17, x11, x3, 0 # perform operation +8000697c: 303588b3 sm4ed x17,x11,x3,0x0 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b211, Zksed_sm4ed_cg_cp_sbox_b211_str) +80006980: 0004a203 lw x4,0(x9) +80006984: 01120863 beq x4,x17,80006994 +80006988: 039012ef jal x5,800081c0 +8000698c: 8000697c .word 0x8000697c +80006990: 8001725e .word 0x8001725e +80006994: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xd4d4d4d4 +80006998: 00052e83 lw x29,0(x10) +8000699c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xd4d4d4d4 +800069a0: 00052603 lw x12,0(x10) +800069a4: 00450513 addi x10,x10,4 + +800069a8 : +Zksed_sm4ed_cg_cp_sbox_b212: + sm4ed x21, x29, x12, 3 # perform operation +800069a8: f0ce8ab3 sm4ed x21,x29,x12,0x3 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b212, Zksed_sm4ed_cg_cp_sbox_b212_str) +800069ac: 0004a203 lw x4,0(x9) +800069b0: 01520863 beq x4,x21,800069c0 +800069b4: 00d012ef jal x5,800081c0 +800069b8: 800069a8 .word 0x800069a8 +800069bc: 80017296 .word 0x80017296 +800069c0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xd5d5d5d5 +800069c4: 00052403 lw x8,0(x10) +800069c8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xd5d5d5d5 +800069cc: 00052c03 lw x24,0(x10) +800069d0: 00450513 addi x10,x10,4 + +800069d4 : +Zksed_sm4ed_cg_cp_sbox_b213: + sm4ed x23, x8, x24, 3 # perform operation +800069d4: f1840bb3 sm4ed x23,x8,x24,0x3 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zksed_sm4ed_cg_cp_sbox_b213, Zksed_sm4ed_cg_cp_sbox_b213_str) +800069d8: 0004a203 lw x4,0(x9) +800069dc: 01720863 beq x4,x23,800069ec +800069e0: 7e0012ef jal x5,800081c0 +800069e4: 800069d4 .word 0x800069d4 +800069e8: 800172ce .word 0x800172ce +800069ec: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xd6d6d6d6 +800069f0: 00052b03 lw x22,0(x10) +800069f4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xd6d6d6d6 +800069f8: 00052983 lw x19,0(x10) +800069fc: 00450513 addi x10,x10,4 + +80006a00 : +Zksed_sm4ed_cg_cp_sbox_b214: + sm4ed x11, x22, x19, 0 # perform operation +80006a00: 313b05b3 sm4ed x11,x22,x19,0x0 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zksed_sm4ed_cg_cp_sbox_b214, Zksed_sm4ed_cg_cp_sbox_b214_str) +80006a04: 0004a203 lw x4,0(x9) +80006a08: 00b20863 beq x4,x11,80006a18 +80006a0c: 7b4012ef jal x5,800081c0 +80006a10: 80006a00 .word 0x80006a00 +80006a14: 80017306 .word 0x80017306 +80006a18: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xd7d7d7d7 +80006a1c: 00052d83 lw x27,0(x10) +80006a20: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xd7d7d7d7 +80006a24: 00052c83 lw x25,0(x10) +80006a28: 00450513 addi x10,x10,4 + +80006a2c : +Zksed_sm4ed_cg_cp_sbox_b215: + sm4ed x28, x27, x25, 2 # perform operation +80006a2c: b19d8e33 sm4ed x28,x27,x25,0x2 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b215, Zksed_sm4ed_cg_cp_sbox_b215_str) +80006a30: 0004a203 lw x4,0(x9) +80006a34: 01c20863 beq x4,x28,80006a44 +80006a38: 788012ef jal x5,800081c0 +80006a3c: 80006a2c .word 0x80006a2c +80006a40: 8001733e .word 0x8001733e +80006a44: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xd8d8d8d8 +80006a48: 00052f83 lw x31,0(x10) +80006a4c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xd8d8d8d8 +80006a50: 00052a03 lw x20,0(x10) +80006a54: 00450513 addi x10,x10,4 + +80006a58 : +Zksed_sm4ed_cg_cp_sbox_b216: + sm4ed x29, x31, x20, 3 # perform operation +80006a58: f14f8eb3 sm4ed x29,x31,x20,0x3 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b216, Zksed_sm4ed_cg_cp_sbox_b216_str) +80006a5c: 0004a203 lw x4,0(x9) +80006a60: 01d20863 beq x4,x29,80006a70 +80006a64: 75c012ef jal x5,800081c0 +80006a68: 80006a58 .word 0x80006a58 +80006a6c: 80017376 .word 0x80017376 +80006a70: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xd9d9d9d9 +80006a74: 00052a03 lw x20,0(x10) +80006a78: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xd9d9d9d9 +80006a7c: 00052903 lw x18,0(x10) +80006a80: 00450513 addi x10,x10,4 + +80006a84 : +Zksed_sm4ed_cg_cp_sbox_b217: + sm4ed x22, x20, x18, 0 # perform operation +80006a84: 312a0b33 sm4ed x22,x20,x18,0x0 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b217, Zksed_sm4ed_cg_cp_sbox_b217_str) +80006a88: 0004a203 lw x4,0(x9) +80006a8c: 01620863 beq x4,x22,80006a9c +80006a90: 730012ef jal x5,800081c0 +80006a94: 80006a84 .word 0x80006a84 +80006a98: 800173ae .word 0x800173ae +80006a9c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xdadadada +80006aa0: 00052303 lw x6,0(x10) +80006aa4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xdadadada +80006aa8: 00052403 lw x8,0(x10) +80006aac: 00450513 addi x10,x10,4 + +80006ab0 : +Zksed_sm4ed_cg_cp_sbox_b218: + sm4ed x28, x6, x8, 3 # perform operation +80006ab0: f0830e33 sm4ed x28,x6,x8,0x3 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b218, Zksed_sm4ed_cg_cp_sbox_b218_str) +80006ab4: 0004a203 lw x4,0(x9) +80006ab8: 01c20863 beq x4,x28,80006ac8 +80006abc: 704012ef jal x5,800081c0 +80006ac0: 80006ab0 .word 0x80006ab0 +80006ac4: 800173e6 .word 0x800173e6 +80006ac8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xdbdbdbdb +80006acc: 00052683 lw x13,0(x10) +80006ad0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xdbdbdbdb +80006ad4: 00052e03 lw x28,0(x10) +80006ad8: 00450513 addi x10,x10,4 + +80006adc : +Zksed_sm4ed_cg_cp_sbox_b219: + sm4ed x24, x13, x28, 2 # perform operation +80006adc: b1c68c33 sm4ed x24,x13,x28,0x2 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b219, Zksed_sm4ed_cg_cp_sbox_b219_str) +80006ae0: 0004a203 lw x4,0(x9) +80006ae4: 01820863 beq x4,x24,80006af4 +80006ae8: 6d8012ef jal x5,800081c0 +80006aec: 80006adc .word 0x80006adc +80006af0: 8001741e .word 0x8001741e +80006af4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xdcdcdcdc +80006af8: 00052983 lw x19,0(x10) +80006afc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xdcdcdcdc +80006b00: 00052303 lw x6,0(x10) +80006b04: 00450513 addi x10,x10,4 + +80006b08 : +Zksed_sm4ed_cg_cp_sbox_b220: + sm4ed x21, x19, x6, 3 # perform operation +80006b08: f0698ab3 sm4ed x21,x19,x6,0x3 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zksed_sm4ed_cg_cp_sbox_b220, Zksed_sm4ed_cg_cp_sbox_b220_str) +80006b0c: 0004a203 lw x4,0(x9) +80006b10: 01520863 beq x4,x21,80006b20 +80006b14: 6ac012ef jal x5,800081c0 +80006b18: 80006b08 .word 0x80006b08 +80006b1c: 80017456 .word 0x80017456 +80006b20: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xdddddddd +80006b24: 00052303 lw x6,0(x10) +80006b28: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xdddddddd +80006b2c: 00052103 lw x2,0(x10) +80006b30: 00450513 addi x10,x10,4 + +80006b34 : +Zksed_sm4ed_cg_cp_sbox_b221: + sm4ed x3, x6, x2, 1 # perform operation +80006b34: 702301b3 sm4ed x3,x6,x2,0x1 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ed_cg_cp_sbox_b221, Zksed_sm4ed_cg_cp_sbox_b221_str) +80006b38: 0004a203 lw x4,0(x9) +80006b3c: 00320863 beq x4,x3,80006b4c +80006b40: 680012ef jal x5,800081c0 +80006b44: 80006b34 .word 0x80006b34 +80006b48: 8001748e .word 0x8001748e +80006b4c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xdededede +80006b50: 00052783 lw x15,0(x10) +80006b54: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xdededede +80006b58: 00052c83 lw x25,0(x10) +80006b5c: 00450513 addi x10,x10,4 + +80006b60 : +Zksed_sm4ed_cg_cp_sbox_b222: + sm4ed x6, x15, x25, 1 # perform operation +80006b60: 71978333 sm4ed x6,x15,x25,0x1 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b222, Zksed_sm4ed_cg_cp_sbox_b222_str) +80006b64: 0004a203 lw x4,0(x9) +80006b68: 00620863 beq x4,x6,80006b78 +80006b6c: 654012ef jal x5,800081c0 +80006b70: 80006b60 .word 0x80006b60 +80006b74: 800174c6 .word 0x800174c6 +80006b78: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xdfdfdfdf +80006b7c: 00052a03 lw x20,0(x10) +80006b80: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xdfdfdfdf +80006b84: 00052703 lw x14,0(x10) +80006b88: 00450513 addi x10,x10,4 + +80006b8c : +Zksed_sm4ed_cg_cp_sbox_b223: + sm4ed x12, x20, x14, 0 # perform operation +80006b8c: 30ea0633 sm4ed x12,x20,x14,0x0 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b223, Zksed_sm4ed_cg_cp_sbox_b223_str) +80006b90: 0004a203 lw x4,0(x9) +80006b94: 00c20863 beq x4,x12,80006ba4 +80006b98: 628012ef jal x5,800081c0 +80006b9c: 80006b8c .word 0x80006b8c +80006ba0: 800174fe .word 0x800174fe +80006ba4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xe0e0e0e0 +80006ba8: 00052f83 lw x31,0(x10) +80006bac: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xe0e0e0e0 +80006bb0: 00052883 lw x17,0(x10) +80006bb4: 00450513 addi x10,x10,4 + +80006bb8 : +Zksed_sm4ed_cg_cp_sbox_b224: + sm4ed x12, x31, x17, 0 # perform operation +80006bb8: 311f8633 sm4ed x12,x31,x17,0x0 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b224, Zksed_sm4ed_cg_cp_sbox_b224_str) +80006bbc: 0004a203 lw x4,0(x9) +80006bc0: 00c20863 beq x4,x12,80006bd0 +80006bc4: 5fc012ef jal x5,800081c0 +80006bc8: 80006bb8 .word 0x80006bb8 +80006bcc: 80017536 .word 0x80017536 +80006bd0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xe1e1e1e1 +80006bd4: 00052183 lw x3,0(x10) +80006bd8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xe1e1e1e1 +80006bdc: 00052303 lw x6,0(x10) +80006be0: 00450513 addi x10,x10,4 + +80006be4 : +Zksed_sm4ed_cg_cp_sbox_b225: + sm4ed x2, x3, x6, 0 # perform operation +80006be4: 30618133 sm4ed x2,x3,x6,0x0 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b225, Zksed_sm4ed_cg_cp_sbox_b225_str) +80006be8: 0004a203 lw x4,0(x9) +80006bec: 00220863 beq x4,x2,80006bfc +80006bf0: 5d0012ef jal x5,800081c0 +80006bf4: 80006be4 .word 0x80006be4 +80006bf8: 8001756e .word 0x8001756e +80006bfc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xe2e2e2e2 +80006c00: 00052f03 lw x30,0(x10) +80006c04: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xe2e2e2e2 +80006c08: 00052083 lw x1,0(x10) +80006c0c: 00450513 addi x10,x10,4 + +80006c10 : +Zksed_sm4ed_cg_cp_sbox_b226: + sm4ed x27, x30, x1, 2 # perform operation +80006c10: b01f0db3 sm4ed x27,x30,x1,0x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b226, Zksed_sm4ed_cg_cp_sbox_b226_str) +80006c14: 0004a203 lw x4,0(x9) +80006c18: 01b20863 beq x4,x27,80006c28 +80006c1c: 5a4012ef jal x5,800081c0 +80006c20: 80006c10 .word 0x80006c10 +80006c24: 800175a6 .word 0x800175a6 +80006c28: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xe3e3e3e3 +80006c2c: 00052883 lw x17,0(x10) +80006c30: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xe3e3e3e3 +80006c34: 00052e03 lw x28,0(x10) +80006c38: 00450513 addi x10,x10,4 + +80006c3c : +Zksed_sm4ed_cg_cp_sbox_b227: + sm4ed x19, x17, x28, 3 # perform operation +80006c3c: f1c889b3 sm4ed x19,x17,x28,0x3 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b227, Zksed_sm4ed_cg_cp_sbox_b227_str) +80006c40: 0004a203 lw x4,0(x9) +80006c44: 01320863 beq x4,x19,80006c54 +80006c48: 578012ef jal x5,800081c0 +80006c4c: 80006c3c .word 0x80006c3c +80006c50: 800175de .word 0x800175de +80006c54: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xe4e4e4e4 +80006c58: 00052c03 lw x24,0(x10) +80006c5c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xe4e4e4e4 +80006c60: 00052583 lw x11,0(x10) +80006c64: 00450513 addi x10,x10,4 + +80006c68 : +Zksed_sm4ed_cg_cp_sbox_b228: + sm4ed x29, x24, x11, 3 # perform operation +80006c68: f0bc0eb3 sm4ed x29,x24,x11,0x3 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b228, Zksed_sm4ed_cg_cp_sbox_b228_str) +80006c6c: 0004a203 lw x4,0(x9) +80006c70: 01d20863 beq x4,x29,80006c80 +80006c74: 54c012ef jal x5,800081c0 +80006c78: 80006c68 .word 0x80006c68 +80006c7c: 80017616 .word 0x80017616 +80006c80: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xe5e5e5e5 +80006c84: 00052d03 lw x26,0(x10) +80006c88: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xe5e5e5e5 +80006c8c: 00052f03 lw x30,0(x10) +80006c90: 00450513 addi x10,x10,4 + +80006c94 : +Zksed_sm4ed_cg_cp_sbox_b229: + sm4ed x18, x26, x30, 2 # perform operation +80006c94: b1ed0933 sm4ed x18,x26,x30,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b229, Zksed_sm4ed_cg_cp_sbox_b229_str) +80006c98: 0004a203 lw x4,0(x9) +80006c9c: 01220863 beq x4,x18,80006cac +80006ca0: 520012ef jal x5,800081c0 +80006ca4: 80006c94 .word 0x80006c94 +80006ca8: 8001764e .word 0x8001764e +80006cac: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xe6e6e6e6 +80006cb0: 00052683 lw x13,0(x10) +80006cb4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xe6e6e6e6 +80006cb8: 00052c03 lw x24,0(x10) +80006cbc: 00450513 addi x10,x10,4 + +80006cc0 : +Zksed_sm4ed_cg_cp_sbox_b230: + sm4ed x2, x13, x24, 3 # perform operation +80006cc0: f1868133 sm4ed x2,x13,x24,0x3 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ed_cg_cp_sbox_b230, Zksed_sm4ed_cg_cp_sbox_b230_str) +80006cc4: 0004a203 lw x4,0(x9) +80006cc8: 00220863 beq x4,x2,80006cd8 +80006ccc: 4f4012ef jal x5,800081c0 +80006cd0: 80006cc0 .word 0x80006cc0 +80006cd4: 80017686 .word 0x80017686 +80006cd8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xe7e7e7e7 +80006cdc: 00052783 lw x15,0(x10) +80006ce0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xe7e7e7e7 +80006ce4: 00052b03 lw x22,0(x10) +80006ce8: 00450513 addi x10,x10,4 + +80006cec : +Zksed_sm4ed_cg_cp_sbox_b231: + sm4ed x31, x15, x22, 0 # perform operation +80006cec: 31678fb3 sm4ed x31,x15,x22,0x0 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ed_cg_cp_sbox_b231, Zksed_sm4ed_cg_cp_sbox_b231_str) +80006cf0: 0004a203 lw x4,0(x9) +80006cf4: 01f20863 beq x4,x31,80006d04 +80006cf8: 4c8012ef jal x5,800081c0 +80006cfc: 80006cec .word 0x80006cec +80006d00: 800176be .word 0x800176be +80006d04: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xe8e8e8e8 +80006d08: 00052903 lw x18,0(x10) +80006d0c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xe8e8e8e8 +80006d10: 00052f83 lw x31,0(x10) +80006d14: 00450513 addi x10,x10,4 + +80006d18 : +Zksed_sm4ed_cg_cp_sbox_b232: + sm4ed x28, x18, x31, 3 # perform operation +80006d18: f1f90e33 sm4ed x28,x18,x31,0x3 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zksed_sm4ed_cg_cp_sbox_b232, Zksed_sm4ed_cg_cp_sbox_b232_str) +80006d1c: 0004a203 lw x4,0(x9) +80006d20: 01c20863 beq x4,x28,80006d30 +80006d24: 49c012ef jal x5,800081c0 +80006d28: 80006d18 .word 0x80006d18 +80006d2c: 800176f6 .word 0x800176f6 +80006d30: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xe9e9e9e9 +80006d34: 00052103 lw x2,0(x10) +80006d38: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xe9e9e9e9 +80006d3c: 00052983 lw x19,0(x10) +80006d40: 00450513 addi x10,x10,4 + +80006d44 : +Zksed_sm4ed_cg_cp_sbox_b233: + sm4ed x6, x2, x19, 1 # perform operation +80006d44: 71310333 sm4ed x6,x2,x19,0x1 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b233, Zksed_sm4ed_cg_cp_sbox_b233_str) +80006d48: 0004a203 lw x4,0(x9) +80006d4c: 00620863 beq x4,x6,80006d5c +80006d50: 470012ef jal x5,800081c0 +80006d54: 80006d44 .word 0x80006d44 +80006d58: 8001772e .word 0x8001772e +80006d5c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xeaeaeaea +80006d60: 00052583 lw x11,0(x10) +80006d64: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xeaeaeaea +80006d68: 00052983 lw x19,0(x10) +80006d6c: 00450513 addi x10,x10,4 + +80006d70 : +Zksed_sm4ed_cg_cp_sbox_b234: + sm4ed x29, x11, x19, 1 # perform operation +80006d70: 71358eb3 sm4ed x29,x11,x19,0x1 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ed_cg_cp_sbox_b234, Zksed_sm4ed_cg_cp_sbox_b234_str) +80006d74: 0004a203 lw x4,0(x9) +80006d78: 01d20863 beq x4,x29,80006d88 +80006d7c: 444012ef jal x5,800081c0 +80006d80: 80006d70 .word 0x80006d70 +80006d84: 80017766 .word 0x80017766 +80006d88: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xebebebeb +80006d8c: 00052983 lw x19,0(x10) +80006d90: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xebebebeb +80006d94: 00052803 lw x16,0(x10) +80006d98: 00450513 addi x10,x10,4 + +80006d9c : +Zksed_sm4ed_cg_cp_sbox_b235: + sm4ed x25, x19, x16, 0 # perform operation +80006d9c: 31098cb3 sm4ed x25,x19,x16,0x0 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b235, Zksed_sm4ed_cg_cp_sbox_b235_str) +80006da0: 0004a203 lw x4,0(x9) +80006da4: 01920863 beq x4,x25,80006db4 +80006da8: 418012ef jal x5,800081c0 +80006dac: 80006d9c .word 0x80006d9c +80006db0: 8001779e .word 0x8001779e +80006db4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xecececec +80006db8: 00052783 lw x15,0(x10) +80006dbc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xecececec +80006dc0: 00052d83 lw x27,0(x10) +80006dc4: 00450513 addi x10,x10,4 + +80006dc8 : +Zksed_sm4ed_cg_cp_sbox_b236: + sm4ed x30, x15, x27, 2 # perform operation +80006dc8: b1b78f33 sm4ed x30,x15,x27,0x2 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ed_cg_cp_sbox_b236, Zksed_sm4ed_cg_cp_sbox_b236_str) +80006dcc: 0004a203 lw x4,0(x9) +80006dd0: 01e20863 beq x4,x30,80006de0 +80006dd4: 3ec012ef jal x5,800081c0 +80006dd8: 80006dc8 .word 0x80006dc8 +80006ddc: 800177d6 .word 0x800177d6 +80006de0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xedededed +80006de4: 00052703 lw x14,0(x10) +80006de8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xedededed +80006dec: 00052983 lw x19,0(x10) +80006df0: 00450513 addi x10,x10,4 + +80006df4 : +Zksed_sm4ed_cg_cp_sbox_b237: + sm4ed x16, x14, x19, 0 # perform operation +80006df4: 31370833 sm4ed x16,x14,x19,0x0 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zksed_sm4ed_cg_cp_sbox_b237, Zksed_sm4ed_cg_cp_sbox_b237_str) +80006df8: 0004a203 lw x4,0(x9) +80006dfc: 01020863 beq x4,x16,80006e0c +80006e00: 3c0012ef jal x5,800081c0 +80006e04: 80006df4 .word 0x80006df4 +80006e08: 8001780e .word 0x8001780e +80006e0c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xeeeeeeee +80006e10: 00052b83 lw x23,0(x10) +80006e14: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xeeeeeeee +80006e18: 00052a03 lw x20,0(x10) +80006e1c: 00450513 addi x10,x10,4 + +80006e20 : +Zksed_sm4ed_cg_cp_sbox_b238: + sm4ed x27, x23, x20, 0 # perform operation +80006e20: 314b8db3 sm4ed x27,x23,x20,0x0 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b238, Zksed_sm4ed_cg_cp_sbox_b238_str) +80006e24: 0004a203 lw x4,0(x9) +80006e28: 01b20863 beq x4,x27,80006e38 +80006e2c: 394012ef jal x5,800081c0 +80006e30: 80006e20 .word 0x80006e20 +80006e34: 80017846 .word 0x80017846 +80006e38: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xefefefef +80006e3c: 00052e83 lw x29,0(x10) +80006e40: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xefefefef +80006e44: 00052c03 lw x24,0(x10) +80006e48: 00450513 addi x10,x10,4 + +80006e4c : +Zksed_sm4ed_cg_cp_sbox_b239: + sm4ed x6, x29, x24, 0 # perform operation +80006e4c: 318e8333 sm4ed x6,x29,x24,0x0 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zksed_sm4ed_cg_cp_sbox_b239, Zksed_sm4ed_cg_cp_sbox_b239_str) +80006e50: 0004a203 lw x4,0(x9) +80006e54: 00620863 beq x4,x6,80006e64 +80006e58: 368012ef jal x5,800081c0 +80006e5c: 80006e4c .word 0x80006e4c +80006e60: 8001787e .word 0x8001787e +80006e64: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xf0f0f0f0 +80006e68: 00052d03 lw x26,0(x10) +80006e6c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xf0f0f0f0 +80006e70: 00052403 lw x8,0(x10) +80006e74: 00450513 addi x10,x10,4 + +80006e78 : +Zksed_sm4ed_cg_cp_sbox_b240: + sm4ed x17, x26, x8, 1 # perform operation +80006e78: 708d08b3 sm4ed x17,x26,x8,0x1 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zksed_sm4ed_cg_cp_sbox_b240, Zksed_sm4ed_cg_cp_sbox_b240_str) +80006e7c: 0004a203 lw x4,0(x9) +80006e80: 01120863 beq x4,x17,80006e90 +80006e84: 33c012ef jal x5,800081c0 +80006e88: 80006e78 .word 0x80006e78 +80006e8c: 800178b6 .word 0x800178b6 +80006e90: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xf1f1f1f1 +80006e94: 00052a83 lw x21,0(x10) +80006e98: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xf1f1f1f1 +80006e9c: 00052883 lw x17,0(x10) +80006ea0: 00450513 addi x10,x10,4 + +80006ea4 : +Zksed_sm4ed_cg_cp_sbox_b241: + sm4ed x19, x21, x17, 0 # perform operation +80006ea4: 311a89b3 sm4ed x19,x21,x17,0x0 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zksed_sm4ed_cg_cp_sbox_b241, Zksed_sm4ed_cg_cp_sbox_b241_str) +80006ea8: 0004a203 lw x4,0(x9) +80006eac: 01320863 beq x4,x19,80006ebc +80006eb0: 310012ef jal x5,800081c0 +80006eb4: 80006ea4 .word 0x80006ea4 +80006eb8: 800178ee .word 0x800178ee +80006ebc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xf2f2f2f2 +80006ec0: 00052603 lw x12,0(x10) +80006ec4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xf2f2f2f2 +80006ec8: 00052d03 lw x26,0(x10) +80006ecc: 00450513 addi x10,x10,4 + +80006ed0 : +Zksed_sm4ed_cg_cp_sbox_b242: + sm4ed x7, x12, x26, 1 # perform operation +80006ed0: 71a603b3 sm4ed x7,x12,x26,0x1 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b242, Zksed_sm4ed_cg_cp_sbox_b242_str) +80006ed4: 0004a203 lw x4,0(x9) +80006ed8: 00720863 beq x4,x7,80006ee8 +80006edc: 2e4012ef jal x5,800081c0 +80006ee0: 80006ed0 .word 0x80006ed0 +80006ee4: 80017926 .word 0x80017926 +80006ee8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xf3f3f3f3 +80006eec: 00052f83 lw x31,0(x10) +80006ef0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xf3f3f3f3 +80006ef4: 00052883 lw x17,0(x10) +80006ef8: 00450513 addi x10,x10,4 + +80006efc : +Zksed_sm4ed_cg_cp_sbox_b243: + sm4ed x27, x31, x17, 2 # perform operation +80006efc: b11f8db3 sm4ed x27,x31,x17,0x2 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zksed_sm4ed_cg_cp_sbox_b243, Zksed_sm4ed_cg_cp_sbox_b243_str) +80006f00: 0004a203 lw x4,0(x9) +80006f04: 01b20863 beq x4,x27,80006f14 +80006f08: 2b8012ef jal x5,800081c0 +80006f0c: 80006efc .word 0x80006efc +80006f10: 8001795e .word 0x8001795e +80006f14: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xf4f4f4f4 +80006f18: 00052e03 lw x28,0(x10) +80006f1c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xf4f4f4f4 +80006f20: 00052c03 lw x24,0(x10) +80006f24: 00450513 addi x10,x10,4 + +80006f28 : +Zksed_sm4ed_cg_cp_sbox_b244: + sm4ed x8, x28, x24, 1 # perform operation +80006f28: 718e0433 sm4ed x8,x28,x24,0x1 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zksed_sm4ed_cg_cp_sbox_b244, Zksed_sm4ed_cg_cp_sbox_b244_str) +80006f2c: 0004a203 lw x4,0(x9) +80006f30: 00820863 beq x4,x8,80006f40 +80006f34: 28c012ef jal x5,800081c0 +80006f38: 80006f28 .word 0x80006f28 +80006f3c: 80017996 .word 0x80017996 +80006f40: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xf5f5f5f5 +80006f44: 00052103 lw x2,0(x10) +80006f48: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xf5f5f5f5 +80006f4c: 00052403 lw x8,0(x10) +80006f50: 00450513 addi x10,x10,4 + +80006f54 : +Zksed_sm4ed_cg_cp_sbox_b245: + sm4ed x25, x2, x8, 3 # perform operation +80006f54: f0810cb3 sm4ed x25,x2,x8,0x3 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b245, Zksed_sm4ed_cg_cp_sbox_b245_str) +80006f58: 0004a203 lw x4,0(x9) +80006f5c: 01920863 beq x4,x25,80006f6c +80006f60: 260012ef jal x5,800081c0 +80006f64: 80006f54 .word 0x80006f54 +80006f68: 800179ce .word 0x800179ce +80006f6c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xf6f6f6f6 +80006f70: 00052783 lw x15,0(x10) +80006f74: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xf6f6f6f6 +80006f78: 00052e83 lw x29,0(x10) +80006f7c: 00450513 addi x10,x10,4 + +80006f80 : +Zksed_sm4ed_cg_cp_sbox_b246: + sm4ed x18, x15, x29, 2 # perform operation +80006f80: b1d78933 sm4ed x18,x15,x29,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b246, Zksed_sm4ed_cg_cp_sbox_b246_str) +80006f84: 0004a203 lw x4,0(x9) +80006f88: 01220863 beq x4,x18,80006f98 +80006f8c: 234012ef jal x5,800081c0 +80006f90: 80006f80 .word 0x80006f80 +80006f94: 80017a06 .word 0x80017a06 +80006f98: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xf7f7f7f7 +80006f9c: 00052803 lw x16,0(x10) +80006fa0: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xf7f7f7f7 +80006fa4: 00052903 lw x18,0(x10) +80006fa8: 00450513 addi x10,x10,4 + +80006fac : +Zksed_sm4ed_cg_cp_sbox_b247: + sm4ed x7, x16, x18, 3 # perform operation +80006fac: f12803b3 sm4ed x7,x16,x18,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b247, Zksed_sm4ed_cg_cp_sbox_b247_str) +80006fb0: 0004a203 lw x4,0(x9) +80006fb4: 00720863 beq x4,x7,80006fc4 +80006fb8: 208012ef jal x5,800081c0 +80006fbc: 80006fac .word 0x80006fac +80006fc0: 80017a3e .word 0x80017a3e +80006fc4: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf8f8f8f8 +80006fc8: 00052303 lw x6,0(x10) +80006fcc: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xf8f8f8f8 +80006fd0: 00052103 lw x2,0(x10) +80006fd4: 00450513 addi x10,x10,4 + +80006fd8 : +Zksed_sm4ed_cg_cp_sbox_b248: + sm4ed x25, x6, x2, 0 # perform operation +80006fd8: 30230cb3 sm4ed x25,x6,x2,0x0 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b248, Zksed_sm4ed_cg_cp_sbox_b248_str) +80006fdc: 0004a203 lw x4,0(x9) +80006fe0: 01920863 beq x4,x25,80006ff0 +80006fe4: 1dc012ef jal x5,800081c0 +80006fe8: 80006fd8 .word 0x80006fd8 +80006fec: 80017a76 .word 0x80017a76 +80006ff0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xf9f9f9f9 +80006ff4: 00052f83 lw x31,0(x10) +80006ff8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xf9f9f9f9 +80006ffc: 00052c83 lw x25,0(x10) +80007000: 00450513 addi x10,x10,4 + +80007004 : +Zksed_sm4ed_cg_cp_sbox_b249: + sm4ed x12, x31, x25, 3 # perform operation +80007004: f19f8633 sm4ed x12,x31,x25,0x3 + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zksed_sm4ed_cg_cp_sbox_b249, Zksed_sm4ed_cg_cp_sbox_b249_str) +80007008: 0004a203 lw x4,0(x9) +8000700c: 00c20863 beq x4,x12,8000701c +80007010: 1b0012ef jal x5,800081c0 +80007014: 80007004 .word 0x80007004 +80007018: 80017aae .word 0x80017aae +8000701c: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xfafafafa +80007020: 00052183 lw x3,0(x10) +80007024: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xfafafafa +80007028: 00052c03 lw x24,0(x10) +8000702c: 00450513 addi x10,x10,4 + +80007030 : +Zksed_sm4ed_cg_cp_sbox_b250: + sm4ed x25, x3, x24, 0 # perform operation +80007030: 31818cb3 sm4ed x25,x3,x24,0x0 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zksed_sm4ed_cg_cp_sbox_b250, Zksed_sm4ed_cg_cp_sbox_b250_str) +80007034: 0004a203 lw x4,0(x9) +80007038: 01920863 beq x4,x25,80007048 +8000703c: 184012ef jal x5,800081c0 +80007040: 80007030 .word 0x80007030 +80007044: 80017ae6 .word 0x80017ae6 +80007048: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xfbfbfbfb +8000704c: 00052f83 lw x31,0(x10) +80007050: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfbfbfbfb +80007054: 00052883 lw x17,0(x10) +80007058: 00450513 addi x10,x10,4 + +8000705c : +Zksed_sm4ed_cg_cp_sbox_b251: + sm4ed x24, x31, x17, 0 # perform operation +8000705c: 311f8c33 sm4ed x24,x31,x17,0x0 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zksed_sm4ed_cg_cp_sbox_b251, Zksed_sm4ed_cg_cp_sbox_b251_str) +80007060: 0004a203 lw x4,0(x9) +80007064: 01820863 beq x4,x24,80007074 +80007068: 158012ef jal x5,800081c0 +8000706c: 8000705c .word 0x8000705c +80007070: 80017b1e .word 0x80017b1e +80007074: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xfcfcfcfc +80007078: 00052303 lw x6,0(x10) +8000707c: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xfcfcfcfc +80007080: 00052a03 lw x20,0(x10) +80007084: 00450513 addi x10,x10,4 + +80007088 : +Zksed_sm4ed_cg_cp_sbox_b252: + sm4ed x22, x6, x20, 2 # perform operation +80007088: b1430b33 sm4ed x22,x6,x20,0x2 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zksed_sm4ed_cg_cp_sbox_b252, Zksed_sm4ed_cg_cp_sbox_b252_str) +8000708c: 0004a203 lw x4,0(x9) +80007090: 01620863 beq x4,x22,800070a0 +80007094: 12c012ef jal x5,800081c0 +80007098: 80007088 .word 0x80007088 +8000709c: 80017b56 .word 0x80017b56 +800070a0: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfdfdfdfd +800070a4: 00052883 lw x17,0(x10) +800070a8: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xfdfdfdfd +800070ac: 00052403 lw x8,0(x10) +800070b0: 00450513 addi x10,x10,4 + +800070b4 : +Zksed_sm4ed_cg_cp_sbox_b253: + sm4ed x18, x17, x8, 2 # perform operation +800070b4: b0888933 sm4ed x18,x17,x8,0x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zksed_sm4ed_cg_cp_sbox_b253, Zksed_sm4ed_cg_cp_sbox_b253_str) +800070b8: 0004a203 lw x4,0(x9) +800070bc: 01220863 beq x4,x18,800070cc +800070c0: 100012ef jal x5,800081c0 +800070c4: 800070b4 .word 0x800070b4 +800070c8: 80017b8e .word 0x80017b8e +800070cc: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfefefefe +800070d0: 00052803 lw x16,0(x10) +800070d4: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xfefefefe +800070d8: 00052583 lw x11,0(x10) +800070dc: 00450513 addi x10,x10,4 + +800070e0 : +Zksed_sm4ed_cg_cp_sbox_b254: + sm4ed x7, x16, x11, 3 # perform operation +800070e0: f0b803b3 sm4ed x7,x16,x11,0x3 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zksed_sm4ed_cg_cp_sbox_b254, Zksed_sm4ed_cg_cp_sbox_b254_str) +800070e4: 0004a203 lw x4,0(x9) +800070e8: 00720863 beq x4,x7,800070f8 +800070ec: 0d4012ef jal x5,800081c0 +800070f0: 800070e0 .word 0x800070e0 +800070f4: 80017bc6 .word 0x80017bc6 +800070f8: 00448493 addi x9,x9,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xffffffff +800070fc: 00052d83 lw x27,0(x10) +80007100: 00450513 addi x10,x10,4 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xffffffff +80007104: 00052783 lw x15,0(x10) +80007108: 00450513 addi x10,x10,4 + +8000710c : +Zksed_sm4ed_cg_cp_sbox_b255: + sm4ed x1, x27, x15, 2 # perform operation +8000710c: b0fd80b3 sm4ed x1,x27,x15,0x2 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ed_cg_cp_sbox_b255, Zksed_sm4ed_cg_cp_sbox_b255_str) +80007110: 0004a203 lw x4,0(x9) +80007114: 00120863 beq x4,x1,80007124 +80007118: 0a8012ef jal x5,800081c0 +8000711c: 8000710c .word 0x8000710c +80007120: 80017bfe .word 0x80017bfe +80007124: 00448493 addi x9,x9,4 + + mv x2, x9 # restore signature pointer to default register for teardown +80007128: 00048113 addi x2,x9,0 + +8000712c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +8000712c: 00000513 addi x10,x0,0 +80007130: 00000073 ecall +80007134: fff00513 addi x10,x0,-1 +80007138: 1d800413 addi x8,x0,472 + +8000713c : +8000713c: 34002373 csrrs x6,mscratch,x0 + +80007140 : +80007140: 23832383 lw x7,568(x6) +80007144: 23c32483 lw x9,572(x6) + +80007148 : +80007148: 22032383 lw x7,544(x6) + +8000714c : +8000714c: 25032483 lw x9,592(x6) +80007150: 34049073 csrrw x0,mscratch,x9 + +80007154 : +80007154: 24832483 lw x9,584(x6) +80007158: 305493f3 csrrw x7,mtvec,x9 +8000715c: ffc4f493 andi x9,x9,-4 +80007160: ffc3f393 andi x7,x7,-4 +80007164: 00749e63 bne x9,x7,80007180 + +80007168 : +80007168: 00030493 addi x9,x6,0 + +8000716c : +8000716c: 0004a783 lw x15,0(x9) +80007170: 00f3a023 sw x15,0(x7) +80007174: 00438393 addi x7,x7,4 +80007178: 00448493 addi x9,x9,4 +8000717c: fe83c8e3 blt x7,x8,8000716c +80007180: 0000100f fence.i + +80007184 : +80007184: 00000013 addi x0,x0,0 +80007188: 00000013 addi x0,x0,0 +8000718c: 00000013 addi x0,x0,0 +80007190: 00000013 addi x0,x0,0 +80007194: 00000013 addi x0,x0,0 +80007198: 00000013 addi x0,x0,0 +8000719c: 00000013 addi x0,x0,0 +800071a0: 00000497 auipc x9,0x0 +800071a4: 29048493 addi x9,x9,656 # 80007430 +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 10e49863 bne x9,x14,800072d0 +800071c4: 00000013 addi x0,x0,0 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 00011517 auipc x10,0x11 +800071e4: 0e050513 addi x10,x10,224 # 800182c0 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00023097 auipc x1,0x23 +80007204: 364080e7 jalr x1,868(x1) # 8002a564 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00011517 auipc x10,0x11 +80007224: 0db50513 addi x10,x10,219 # 800182fb +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00023097 auipc x1,0x23 +80007244: 324080e7 jalr x1,804(x1) # 8002a564 +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00011517 auipc x10,0x11 +80007264: 0fb50513 addi x10,x10,251 # 8001835b +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00023097 auipc x1,0x23 +80007284: 2e4080e7 jalr x1,740(x1) # 8002a564 +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00012517 auipc x10,0x12 +800072a4: c6650513 addi x10,x10,-922 # 80018f06 +800072a8: 00000013 addi x0,x0,0 +800072ac: 00000013 addi x0,x0,0 +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00023097 auipc x1,0x23 +800072c4: 2a4080e7 jalr x1,676(x1) # 8002a564 +800072c8: 00023097 auipc x1,0x23 +800072cc: 2fc080e7 jalr x1,764(x1) # 8002a5c4 + +800072d0 : +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00005317 auipc x6,0x5 +800072e4: 04830313 addi x6,x6,72 # 8000c328 +800072e8: 00000013 addi x0,x0,0 +800072ec: 00000013 addi x0,x0,0 +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00032303 lw x6,0(x6) +80007304: 00000013 addi x0,x0,0 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 00013397 auipc x7,0x13 +80007324: 0d838393 addi x7,x7,216 # 8001a3f8 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 40730333 sub x6,x6,x7 +80007344: 00000013 addi x0,x0,0 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 00013417 auipc x8,0x13 +80007364: 09040413 addi x8,x8,144 # 8001a3f0 +80007368: 00000013 addi x0,x0,0 +8000736c: 00000013 addi x0,x0,0 +80007370: 00000013 addi x0,x0,0 +80007374: 00000013 addi x0,x0,0 +80007378: 00000013 addi x0,x0,0 +8000737c: 00000013 addi x0,x0,0 +80007380: 00042203 lw x4,0(x8) +80007384: 00620863 beq x4,x6,80007394 +80007388: 6a1003ef jal x7,80008228 +8000738c: 800072d0 .word 0x800072d0 +80007390: 800184af .word 0x800184af + +80007394 : +80007394: bad0e4b7 lui x9,0xbad0e +80007398: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +8000739c: 00e49a63 bne x9,x14,800073b0 +800073a0: 689003ef jal x7,80008228 +800073a4: 80007464 .word 0x80007464 +800073a8: 8001831d .word 0x8001831d +800073ac: 00000341 .word 0x00000341 + +800073b0 : +800073b0: 00000013 addi x0,x0,0 +800073b4: 00000013 addi x0,x0,0 +800073b8: 00000013 addi x0,x0,0 +800073bc: 00000013 addi x0,x0,0 +800073c0: 00011517 auipc x10,0x11 +800073c4: ec450513 addi x10,x10,-316 # 80018284 +800073c8: 00000013 addi x0,x0,0 +800073cc: 00000013 addi x0,x0,0 +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00023097 auipc x1,0x23 +800073e4: 184080e7 jalr x1,388(x1) # 8002a564 +800073e8: 00023097 auipc x1,0x23 +800073ec: 1bc080e7 jalr x1,444(x1) # 8002a5a4 + +800073f0 : +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00011517 auipc x10,0x11 +80007404: ec050513 addi x10,x10,-320 # 800182c0 +80007408: 00000013 addi x0,x0,0 +8000740c: 00000013 addi x0,x0,0 +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00023097 auipc x1,0x23 +80007424: 144080e7 jalr x1,324(x1) # 8002a564 +80007428: 00023097 auipc x1,0x23 +8000742c: 19c080e7 jalr x1,412(x1) # 8002a5c4 + +80007430 : +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: 00000717 auipc x14,0x0 +80007444: ff070713 addi x14,x14,-16 # 80007430 +80007448: 00000013 addi x0,x0,0 +8000744c: 00000013 addi x0,x0,0 +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: ccdff06f jal x0,8000712c + +80007464 : +80007464: bad0e737 lui x14,0xbad0e +80007468: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000746c: cc1ff06f jal x0,8000712c +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 + +80007480 : +80007480: 0800006f jal x0,80007500 +80007484: 0880006f jal x0,8000750c +80007488: 0900006f jal x0,80007518 +8000748c: 0980006f jal x0,80007524 +80007490: 0a00006f jal x0,80007530 +80007494: 0a80006f jal x0,8000753c +80007498: 0b00006f jal x0,80007548 +8000749c: 0b80006f jal x0,80007554 +800074a0: 0c00006f jal x0,80007560 +800074a4: 0c80006f jal x0,8000756c +800074a8: 0d00006f jal x0,80007578 +800074ac: 0d80006f jal x0,80007584 +800074b0: 0e00006f jal x0,80007590 +800074b4: 0e80006f jal x0,8000759c +800074b8: 0f00006f jal x0,800075a8 +800074bc: 0f80006f jal x0,800075b4 +800074c0: 1000006f jal x0,800075c0 +800074c4: 1080006f jal x0,800075cc +800074c8: 1100006f jal x0,800075d8 +800074cc: 1180006f jal x0,800075e4 +800074d0: 1200006f jal x0,800075f0 +800074d4: 1280006f jal x0,800075fc +800074d8: 1300006f jal x0,80007608 +800074dc: 1380006f jal x0,80007614 +800074e0: 1400006f jal x0,80007620 +800074e4: 13c0006f jal x0,80007620 +800074e8: 1380006f jal x0,80007620 +800074ec: 1340006f jal x0,80007620 +800074f0: 1300006f jal x0,80007620 +800074f4: 12c0006f jal x0,80007620 +800074f8: 1280006f jal x0,80007620 +800074fc: 1240006f jal x0,80007620 + +80007500 : +80007500: 34011173 csrrw x2,mscratch,x2 +80007504: 26f12823 sw x15,624(x2) +80007508: 13c007ef jal x15,80007644 +8000750c: 34011173 csrrw x2,mscratch,x2 +80007510: 26f12823 sw x15,624(x2) +80007514: 130007ef jal x15,80007644 +80007518: 34011173 csrrw x2,mscratch,x2 +8000751c: 26f12823 sw x15,624(x2) +80007520: 124007ef jal x15,80007644 +80007524: 34011173 csrrw x2,mscratch,x2 +80007528: 26f12823 sw x15,624(x2) +8000752c: 118007ef jal x15,80007644 +80007530: 34011173 csrrw x2,mscratch,x2 +80007534: 26f12823 sw x15,624(x2) +80007538: 10c007ef jal x15,80007644 +8000753c: 34011173 csrrw x2,mscratch,x2 +80007540: 26f12823 sw x15,624(x2) +80007544: 100007ef jal x15,80007644 +80007548: 34011173 csrrw x2,mscratch,x2 +8000754c: 26f12823 sw x15,624(x2) +80007550: 0f4007ef jal x15,80007644 +80007554: 34011173 csrrw x2,mscratch,x2 +80007558: 26f12823 sw x15,624(x2) +8000755c: 0e8007ef jal x15,80007644 +80007560: 34011173 csrrw x2,mscratch,x2 +80007564: 26f12823 sw x15,624(x2) +80007568: 0dc007ef jal x15,80007644 +8000756c: 34011173 csrrw x2,mscratch,x2 +80007570: 26f12823 sw x15,624(x2) +80007574: 0d0007ef jal x15,80007644 +80007578: 34011173 csrrw x2,mscratch,x2 +8000757c: 26f12823 sw x15,624(x2) +80007580: 0c4007ef jal x15,80007644 +80007584: 34011173 csrrw x2,mscratch,x2 +80007588: 26f12823 sw x15,624(x2) +8000758c: 0b8007ef jal x15,80007644 +80007590: 34011173 csrrw x2,mscratch,x2 +80007594: 26f12823 sw x15,624(x2) +80007598: 0ac007ef jal x15,80007644 +8000759c: 34011173 csrrw x2,mscratch,x2 +800075a0: 26f12823 sw x15,624(x2) +800075a4: 0a0007ef jal x15,80007644 +800075a8: 34011173 csrrw x2,mscratch,x2 +800075ac: 26f12823 sw x15,624(x2) +800075b0: 094007ef jal x15,80007644 +800075b4: 34011173 csrrw x2,mscratch,x2 +800075b8: 26f12823 sw x15,624(x2) +800075bc: 088007ef jal x15,80007644 +800075c0: 34011173 csrrw x2,mscratch,x2 +800075c4: 26f12823 sw x15,624(x2) +800075c8: 07c007ef jal x15,80007644 +800075cc: 34011173 csrrw x2,mscratch,x2 +800075d0: 26f12823 sw x15,624(x2) +800075d4: 070007ef jal x15,80007644 +800075d8: 34011173 csrrw x2,mscratch,x2 +800075dc: 26f12823 sw x15,624(x2) +800075e0: 064007ef jal x15,80007644 +800075e4: 34011173 csrrw x2,mscratch,x2 +800075e8: 26f12823 sw x15,624(x2) +800075ec: 058007ef jal x15,80007644 +800075f0: 34011173 csrrw x2,mscratch,x2 +800075f4: 26f12823 sw x15,624(x2) +800075f8: 04c007ef jal x15,80007644 +800075fc: 34011173 csrrw x2,mscratch,x2 +80007600: 26f12823 sw x15,624(x2) +80007604: 040007ef jal x15,80007644 +80007608: 34011173 csrrw x2,mscratch,x2 +8000760c: 26f12823 sw x15,624(x2) +80007610: 034007ef jal x15,80007644 +80007614: 34011173 csrrw x2,mscratch,x2 +80007618: 26f12823 sw x15,624(x2) +8000761c: 028007ef jal x15,80007644 + +80007620 : +80007620: 00000317 auipc x6,0x0 +80007624: b6430313 addi x6,x6,-1180 # 80007184 +80007628: 00000013 addi x0,x0,0 +8000762c: 00000013 addi x0,x0,0 +80007630: 00000013 addi x0,x0,0 +80007634: 00000013 addi x0,x0,0 +80007638: 00000013 addi x0,x0,0 +8000763c: 00000013 addi x0,x0,0 +80007640: 00030067 jalr x0,0(x6) + +80007644 : +80007644: 26e12623 sw x14,620(x2) +80007648: 34011773 csrrw x14,mscratch,x2 +8000764c: 26e12a23 sw x14,628(x2) +80007650: 23012703 lw x14,560(x2) +80007654: 00070067 jalr x0,0(x14) + +80007658 : +80007658: 26912423 sw x9,616(x2) +8000765c: 26812223 sw x8,612(x2) +80007660: 26712023 sw x7,608(x2) +80007664: 24612e23 sw x6,604(x2) +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00005317 auipc x6,0x5 +80007684: a8830313 addi x6,x6,-1400 # 8000c108 +80007688: 00000013 addi x0,x0,0 +8000768c: 00000013 addi x0,x0,0 +80007690: 00000013 addi x0,x0,0 +80007694: 00000013 addi x0,x0,0 +80007698: 00000013 addi x0,x0,0 +8000769c: 00000013 addi x0,x0,0 +800076a0: 00032383 lw x7,0(x6) +800076a4: 00138393 addi x7,x7,1 +800076a8: 00732023 sw x7,0(x6) +800076ac: 34202773 csrrs x14,mcause,x0 + +800076b0 : +800076b0: 800014b7 lui x9,0x80001 +800076b4: fff48493 addi x9,x9,-1 # 80000fff +800076b8: 00e4f4b3 and x9,x9,x14 + +800076bc : +800076bc: ffe48413 addi x8,x9,-2 +800076c0: 00041663 bne x8,x0,800076cc + +800076c4 : +800076c4: 280506e3 beq x10,x0,80008150 +800076c8: 58c0006f jal x0,80007c54 + +800076cc : +800076cc: ff848413 addi x8,x9,-8 +800076d0: 00245413 srli x8,x8,0x2 +800076d4: 58041063 bne x8,x0,80007c54 + +800076d8 : +800076d8: 26050ce3 beq x10,x0,80008150 + +800076dc : +800076dc: fff50493 addi x9,x10,-1 +800076e0: 00500393 addi x7,x0,5 +800076e4: 0274e063 bltu x9,x7,80007704 +800076e8: 07300393 addi x7,x0,115 +800076ec: 00750463 beq x10,x7,800076f4 +800076f0: 0800006f jal x0,80007770 + +800076f4 : +800076f4: 34102573 csrrs x10,mepc,x0 +800076f8: 00450413 addi x8,x10,4 +800076fc: 34141073 csrrw x0,mepc,x8 +80007700: 7c00006f jal x0,80007ec0 + +80007704 : +80007704: 341024f3 csrrs x9,mepc,x0 +80007708: 00448493 addi x9,x9,4 +8000770c: 34149073 csrrw x0,mepc,x9 +80007710: 00100393 addi x7,x0,1 +80007714: 00750e63 beq x10,x7,80007730 +80007718: 00200393 addi x7,x0,2 +8000771c: 02750263 beq x10,x7,80007740 +80007720: 00300393 addi x7,x0,3 +80007724: 02750c63 beq x10,x7,8000775c +80007728: fff00513 addi x10,x0,-1 +8000772c: 7940006f jal x0,80007ec0 + +80007730 : +80007730: 000024b7 lui x9,0x2 +80007734: 80048493 addi x9,x9,-2048 # 1800 +80007738: 3004a073 csrrs x0,mstatus,x9 +8000773c: 7840006f jal x0,80007ec0 + +80007740 : +80007740: 000024b7 lui x9,0x2 +80007744: 80048493 addi x9,x9,-2048 # 1800 +80007748: 3004b073 csrrc x0,mstatus,x9 +8000774c: 000014b7 lui x9,0x1 +80007750: 80048493 addi x9,x9,-2048 # 800 +80007754: 3004a073 csrrs x0,mstatus,x9 +80007758: 7680006f jal x0,80007ec0 + +8000775c : +8000775c: 000024b7 lui x9,0x2 +80007760: 80048493 addi x9,x9,-2048 # 1800 +80007764: 3004b073 csrrc x0,mstatus,x9 +80007768: 7580006f jal x0,80007ec0 + +8000776c : +8000776c: 00000013 addi x0,x0,0 + +80007770 : +80007770: 00000013 addi x0,x0,0 +80007774: 00000013 addi x0,x0,0 +80007778: 00000013 addi x0,x0,0 +8000777c: 00000013 addi x0,x0,0 +80007780: 00000397 auipc x7,0x0 +80007784: 17038393 addi x7,x7,368 # 800078f0 +80007788: 00000013 addi x0,x0,0 +8000778c: 00000013 addi x0,x0,0 +80007790: 00000013 addi x0,x0,0 +80007794: 00000013 addi x0,x0,0 +80007798: 00000013 addi x0,x0,0 +8000779c: 00000013 addi x0,x0,0 + +800077a0 : +800077a0: 0003a403 lw x8,0(x7) +800077a4: 00a40863 beq x8,x10,800077b4 +800077a8: 04040863 beq x8,x0,800077f8 +800077ac: 00838393 addi x7,x7,8 +800077b0: ff1ff06f jal x0,800077a0 + +800077b4 : +800077b4: 00008493 addi x9,x1,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000097 auipc x1,0x0 +800077c4: 02408093 addi x1,x1,36 # 800077e4 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 +800077e0: 00038067 jalr x0,0(x7) + +800077e4 : +800077e4: 00048093 addi x1,x9,0 +800077e8: 34102473 csrrs x8,mepc,x0 +800077ec: 00440413 addi x8,x8,4 +800077f0: 34141073 csrrw x0,mepc,x8 +800077f4: 6cc0006f jal x0,80007ec0 + +800077f8 : +800077f8: 00050493 addi x9,x10,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00012517 auipc x10,0x12 +80007804: 13d50513 addi x10,x10,317 # 8001993d +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00023097 auipc x1,0x23 +80007824: d44080e7 jalr x1,-700(x1) # 8002a564 +80007828: 00048513 addi x10,x9,0 +8000782c: 02000593 addi x11,x0,32 +80007830: 4a8020ef jal x1,80009cd8 +80007834: 00000013 addi x0,x0,0 +80007838: 00000013 addi x0,x0,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00010517 auipc x10,0x10 +80007844: 56850513 addi x10,x10,1384 # 80017da8 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00000013 addi x0,x0,0 +8000786c: 00000013 addi x0,x0,0 +80007870: 00000013 addi x0,x0,0 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: b4450513 addi x10,x10,-1212 # 800183c4 +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: a0050513 addi x10,x10,-1536 # 800182c0 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00023097 auipc x1,0x23 +800078ec: cdc080e7 jalr x1,-804(x1) # 8002a5c4 + +800078f0 : +800078f0: 30002573 .word 0x30002573 +800078f4: 00008067 jalr x0,0(x1) +800078f8: 30059073 .word 0x30059073 +800078fc: 00008067 jalr x0,0(x1) +80007900: 3005a073 .word 0x3005a073 +80007904: 00008067 jalr x0,0(x1) +80007908: 3005b073 .word 0x3005b073 +8000790c: 00008067 jalr x0,0(x1) +80007910: 30402573 .word 0x30402573 +80007914: 00008067 jalr x0,0(x1) +80007918: 30459073 .word 0x30459073 +8000791c: 00008067 jalr x0,0(x1) +80007920: 3045a073 .word 0x3045a073 +80007924: 00008067 jalr x0,0(x1) +80007928: 3045b073 .word 0x3045b073 +8000792c: 00008067 jalr x0,0(x1) +80007930: 30602573 .word 0x30602573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30659073 .word 0x30659073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3065a073 .word 0x3065a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3065b073 .word 0x3065b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30a02573 .word 0x30a02573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30a59073 .word 0x30a59073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 30a5a073 .word 0x30a5a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 30a5b073 .word 0x30a5b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 34402573 .word 0x34402573 +80007974: 00008067 jalr x0,0(x1) +80007978: 34459073 .word 0x34459073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3445a073 .word 0x3445a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3445b073 .word 0x3445b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 74702573 .word 0x74702573 +80007994: 00008067 jalr x0,0(x1) +80007998: 74759073 .word 0x74759073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 7475a073 .word 0x7475a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 7475b073 .word 0x7475b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 32002573 .word 0x32002573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 32059073 .word 0x32059073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3205a073 .word 0x3205a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3205b073 .word 0x3205b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: b0002573 .word 0xb0002573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: b0059073 .word 0xb0059073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: b005a073 .word 0xb005a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: b005b073 .word 0xb005b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: b0202573 .word 0xb0202573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: b0259073 .word 0xb0259073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: b025a073 .word 0xb025a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: b025b073 .word 0xb025b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: 10002573 .word 0x10002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: 10059073 .word 0x10059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: 1005a073 .word 0x1005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: 1005b073 .word 0x1005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: 10402573 .word 0x10402573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: 10459073 .word 0x10459073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: 1045a073 .word 0x1045a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: 1045b073 .word 0x1045b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10602573 .word 0x10602573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10659073 .word 0x10659073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1065a073 .word 0x1065a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1065b073 .word 0x1065b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10a02573 .word 0x10a02573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10a59073 .word 0x10a59073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 10a5a073 .word 0x10a5a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 10a5b073 .word 0x10a5b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 14402573 .word 0x14402573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 14459073 .word 0x14459073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1445a073 .word 0x1445a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1445b073 .word 0x1445b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 14d02573 .word 0x14d02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 14d59073 .word 0x14d59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 14d5a073 .word 0x14d5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 14d5b073 .word 0x14d5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 18002573 .word 0x18002573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 18059073 .word 0x18059073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1805a073 .word 0x1805a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1805b073 .word 0x1805b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 7a002573 .word 0x7a002573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 7a059073 .word 0x7a059073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 7a05a073 .word 0x7a05a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 7a05b073 .word 0x7a05b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 7a102573 .word 0x7a102573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 7a159073 .word 0x7a159073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 7a15a073 .word 0x7a15a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 7a15b073 .word 0x7a15b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a202573 .word 0x7a202573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a259073 .word 0x7a259073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a25a073 .word 0x7a25a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a25b073 .word 0x7a25b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a302573 .word 0x7a302573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a359073 .word 0x7a359073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a35a073 .word 0x7a35a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a35b073 .word 0x7a35b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a402573 .word 0x7a402573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a459073 .word 0x7a459073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a45a073 .word 0x7a45a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a45b073 .word 0x7a45b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a502573 .word 0x7a502573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a559073 .word 0x7a559073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a55a073 .word 0x7a55a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a55b073 .word 0x7a55b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a802573 .word 0x7a802573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a859073 .word 0x7a859073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a85a073 .word 0x7a85a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a85b073 .word 0x7a85b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7aa02573 .word 0x7aa02573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7aa59073 .word 0x7aa59073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7aa5a073 .word 0x7aa5a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7aa5b073 .word 0x7aa5b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 5a802573 .word 0x5a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 5a859073 .word 0x5a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 5a85a073 .word 0x5a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 5a85b073 .word 0x5a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 6a802573 .word 0x6a802573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 6a859073 .word 0x6a859073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 6a85a073 .word 0x6a85a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 6a85b073 .word 0x6a85b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 0005a503 lw x10,0(x11) +80007c34: 00008067 jalr x0,0(x1) +80007c38: 0045a503 lw x10,4(x11) +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 00c5a023 sw x12,0(x11) +80007c44: 00008067 jalr x0,0(x1) +80007c48: 00c5a223 sw x12,4(x11) +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 00000000 .word 0x00000000 + +80007c54 : +80007c54: 01000393 addi x7,x0,16 +80007c58: 00075c63 bge x14,x0,80007c70 + +80007c5c : +80007c5c: 00171413 slli x8,x14,0x1 +80007c60: ff240413 addi x8,x8,-14 +80007c64: 00045663 bge x8,x0,80007c70 +80007c68: 00c00393 addi x7,x0,12 +80007c6c: 0040006f jal x0,80007c70 + +80007c70 : +80007c70: d6810113 addi x2,x2,-664 +80007c74: 4b012303 lw x6,1200(x2) +80007c78: 007304b3 add x9,x6,x7 +80007c7c: 4a912823 sw x9,1200(x2) +80007c80: 49012403 lw x8,1168(x2) +80007c84: 40830333 sub x6,x6,x8 +80007c88: 29810113 addi x2,x2,664 +80007c8c: 1f812403 lw x8,504(x2) +80007c90: 00830333 add x6,x6,x8 +80007c94: 34102473 csrrs x8,mepc,x0 +80007c98: 00000013 addi x0,x0,0 +80007c9c: 00000013 addi x0,x0,0 +80007ca0: 00010497 auipc x9,0x10 +80007ca4: 0e848493 addi x9,x9,232 # 80017d88 +80007ca8: 00000013 addi x0,x0,0 +80007cac: 00000013 addi x0,x0,0 +80007cb0: 00000013 addi x0,x0,0 +80007cb4: 00000013 addi x0,x0,0 +80007cb8: 00000013 addi x0,x0,0 +80007cbc: 00000013 addi x0,x0,0 +80007cc0: 0084a023 sw x8,0(x9) +80007cc4: 00e4a423 sw x14,8(x9) +80007cc8: 34302473 csrrs x8,mtval,x0 +80007ccc: 0084a823 sw x8,16(x9) +80007cd0: 30002473 csrrs x8,mstatus,x0 +80007cd4: 0084ac23 sw x8,24(x9) +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00021417 auipc x8,0x21 +80007ce4: 17c40413 addi x8,x8,380 # 80028e5c +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 007304b3 add x9,x6,x7 +80007d04: f2946663 bltu x8,x9,80007430 + +80007d08 : +80007d08: 24012403 lw x8,576(x2) +80007d0c: 408787b3 sub x15,x15,x8 +80007d10: 00179493 slli x9,x15,0x1 +80007d14: 009787b3 add x15,x15,x9 +80007d18: 0057d793 srli x15,x15,0x5 +80007d1c: 00679793 slli x15,x15,0x6 +80007d20: 0077e7b3 or x15,x15,x7 +80007d24: 00378793 addi x15,x15,3 +80007d28: 02075a63 bge x14,x0,80007d5c +80007d2c: 00f00413 addi x8,x0,15 +80007d30: 00877433 and x8,x14,x8 +80007d34: 304024f3 csrrs x9,mie,x0 +80007d38: 0084d4b3 srl x9,x9,x8 +80007d3c: 0014f493 andi x9,x9,1 +80007d40: 00b49493 slli x9,x9,0xb +80007d44: 0097e7b3 or x15,x15,x9 +80007d48: 344024f3 csrrs x9,mip,x0 +80007d4c: 0084d4b3 srl x9,x9,x8 +80007d50: 0014f493 andi x9,x9,1 +80007d54: 00c49493 slli x9,x9,0xc +80007d58: 0097e7b3 or x15,x15,x9 +80007d5c: 300023f3 csrrs x7,mstatus,x0 +80007d60: 00f39393 slli x7,x7,0xf +80007d64: 0023d393 srli x7,x7,0x2 +80007d68: 0021a437 lui x8,0x21a +80007d6c: fe540413 addi x8,x8,-27 # 219fe5 +80007d70: fff44413 xori x8,x8,-1 +80007d74: 0083f433 and x8,x7,x8 +80007d78: 0087e433 or x8,x15,x8 +80007d7c: 310024f3 csrrs x9,0x310,x0 +80007d80: 1c04f493 andi x9,x9,448 +80007d84: 00849493 slli x9,x9,0x8 +80007d88: 00946433 or x8,x8,x9 +80007d8c: 00032483 lw x9,0(x6) +80007d90: 00848e63 beq x9,x8,80007dac +80007d94: 00040313 addi x6,x8,0 +80007d98: 00048213 addi x4,x9,0 +80007d9c: 48c003ef jal x7,80008228 +80007da0: 80007d08 .word 0x80007d08 +80007da4: 800184c6 .word 0x800184c6 +80007da8: 00000341 .word 0x00000341 + +80007dac : +80007dac: 00070413 addi x8,x14,0 +80007db0: 00432483 lw x9,4(x6) +80007db4: 00848e63 beq x9,x8,80007dd0 +80007db8: 00040313 addi x6,x8,0 +80007dbc: 00048213 addi x4,x9,0 +80007dc0: 468003ef jal x7,80008228 +80007dc4: 80007dac .word 0x80007dac +80007dc8: 800185c8 .word 0x800185c8 +80007dcc: 00000341 .word 0x00000341 +80007dd0: 10074863 blt x14,x0,80007ee0 + +80007dd4 : +80007dd4: 34102473 csrrs x8,mepc,x0 +80007dd8: 00010493 addi x9,x2,0 +80007ddc: 0040006f jal x0,80007de0 + +80007de0 : +80007de0: 08000393 addi x7,x0,128 +80007de4: 04740863 beq x8,x7,80007e34 +80007de8: 00238393 addi x7,x7,2 +80007dec: 04740463 beq x8,x7,80007e34 +80007df0: 04040263 beq x8,x0,80007e34 +80007df4: 2084a383 lw x7,520(x9) +80007df8: 2104a783 lw x15,528(x9) +80007dfc: 007787b3 add x15,x15,x7 +80007e00: 00f47463 bgeu x8,x15,80007e08 +80007e04: 02747663 bgeu x8,x7,80007e30 + +80007e08 : +80007e08: 1d84a383 lw x7,472(x9) +80007e0c: 1e04a783 lw x15,480(x9) +80007e10: 007787b3 add x15,x15,x7 +80007e14: 00f47463 bgeu x8,x15,80007e1c +80007e18: 00747c63 bgeu x8,x7,80007e30 + +80007e1c : +80007e1c: 1e84a383 lw x7,488(x9) +80007e20: 1f04a783 lw x15,496(x9) +80007e24: 007787b3 add x15,x15,x7 +80007e28: e2f47e63 bgeu x8,x15,80007464 +80007e2c: e2746c63 bltu x8,x7,80007464 + +80007e30 : +80007e30: 40740433 sub x8,x8,x7 + +80007e34 : +80007e34: 00832483 lw x9,8(x6) +80007e38: 00848e63 beq x9,x8,80007e54 +80007e3c: 00040313 addi x6,x8,0 +80007e40: 00048213 addi x4,x9,0 +80007e44: 3e4003ef jal x7,80008228 +80007e48: 80007e34 .word 0x80007e34 +80007e4c: 800186c3 .word 0x800186c3 +80007e50: 00000341 .word 0x00000341 + +80007e54 : +80007e54: 34102473 csrrs x8,mepc,x0 +80007e58: 342023f3 csrrs x7,mcause,x0 +80007e5c: 00c00793 addi x15,x0,12 +80007e60: 00f38a63 beq x7,x15,80007e74 +80007e64: 00100793 addi x15,x0,1 +80007e68: 00f38663 beq x7,x15,80007e74 +80007e6c: 01400793 addi x15,x0,20 +80007e70: 00f39663 bne x7,x15,80007e7c +80007e74: 34109073 csrrw x0,mepc,x1 +80007e78: 0100006f jal x0,80007e88 + +80007e7c : +80007e7c: 00400393 addi x7,x0,4 +80007e80: 00740433 add x8,x8,x7 +80007e84: 34141073 csrrw x0,mepc,x8 + +80007e88 : +80007e88: 34302473 csrrs x8,mtval,x0 + +80007e8c : +80007e8c: 00c32483 lw x9,12(x6) +80007e90: 00848e63 beq x9,x8,80007eac +80007e94: 00040313 addi x6,x8,0 +80007e98: 00048213 addi x4,x9,0 +80007e9c: 38c003ef jal x7,80008228 +80007ea0: 80007e8c .word 0x80007e8c +80007ea4: 800187b6 .word 0x800187b6 +80007ea8: 00000341 .word 0x00000341 + +80007eac : +80007eac: 30102473 csrrs x8,misa,x0 +80007eb0: 01841413 slli x8,x8,0x18 +80007eb4: 00045263 bge x8,x0,80007eb8 + +80007eb8 : +80007eb8: 10000393 addi x7,x0,256 +80007ebc: 05c0006f jal x0,80007f18 + +80007ec0 : +80007ec0: 25c12303 lw x6,604(x2) +80007ec4: 26012383 lw x7,608(x2) +80007ec8: 26412403 lw x8,612(x2) +80007ecc: 26812483 lw x9,616(x2) +80007ed0: 26c12703 lw x14,620(x2) +80007ed4: 27012783 lw x15,624(x2) +80007ed8: 27412103 lw x2,628(x2) +80007edc: 30200073 mret + +80007ee0 : +80007ee0: 00100413 addi x8,x0,1 +80007ee4: 01f77393 andi x7,x14,31 +80007ee8: 00741433 sll x8,x8,x7 +80007eec: 304434f3 csrrc x9,mie,x8 +80007ef0: 34443473 csrrc x8,mip,x8 + +80007ef4 : +80007ef4: 00832483 lw x9,8(x6) +80007ef8: 00848e63 beq x9,x8,80007f14 +80007efc: 00040313 addi x6,x8,0 +80007f00: 00048213 addi x4,x9,0 +80007f04: 324003ef jal x7,80008228 +80007f08: 80007ef4 .word 0x80007ef4 +80007f0c: 80018929 .word 0x80018929 +80007f10: 00000341 .word 0x00000341 +80007f14: 00000393 addi x7,x0,0 + +80007f18 : +80007f18: 00000417 auipc x8,0x0 +80007f1c: 03c40413 addi x8,x8,60 # 80007f54 +80007f20: 00740433 add x8,x8,x7 +80007f24: 00371393 slli x7,x14,0x3 +80007f28: 00740433 add x8,x8,x7 +80007f2c: ff847413 andi x8,x8,-8 +80007f30: 00042403 lw x8,0(x8) + +80007f34 : +80007f34: 00040a63 beq x8,x0,80007f48 +80007f38: 01f41393 slli x7,x8,0x1f +80007f3c: 0003d863 bge x7,x0,80007f4c +80007f40: 00145413 srli x8,x8,0x1 +80007f44: f6870ee3 beq x14,x8,80007ec0 +80007f48: d1cff06f jal x0,80007464 + +80007f4c : +80007f4c: 00040067 jalr x0,0(x8) + +80007f50 : + ... +80007f58: 00000001 .word 0x00000001 +80007f5c: 00000000 .word 0x00000000 +80007f60: 00000001 .word 0x00000001 +80007f64: 00000000 .word 0x00000000 +80007f68: 8002a000 .word 0x8002a000 + ... +80007f78: 00000001 .word 0x00000001 +80007f7c: 00000000 .word 0x00000000 +80007f80: 00000001 .word 0x00000001 +80007f84: 00000000 .word 0x00000000 +80007f88: 8002a014 .word 0x8002a014 + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a030 .word 0x8002a030 +80007fac: 00000000 .word 0x00000000 +80007fb0: 00000001 .word 0x00000001 +80007fb4: 00000000 .word 0x00000000 +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 00000001 .word 0x00000001 +80007fcc: 00000000 .word 0x00000000 +80007fd0: 00000001 .word 0x00000001 +80007fd4: 00000000 .word 0x00000000 +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 00000001 .word 0x00000001 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 + ... + +80008050 : +80008050: 00000001 .word 0x00000001 +80008054: 00000000 .word 0x00000000 +80008058: 00000003 .word 0x00000003 +8000805c: 00000000 .word 0x00000000 +80008060: 00000005 .word 0x00000005 +80008064: 00000000 .word 0x00000000 +80008068: 00000007 .word 0x00000007 +8000806c: 00000000 .word 0x00000000 +80008070: 00000009 .word 0x00000009 +80008074: 00000000 .word 0x00000000 +80008078: 0000000b .word 0x0000000b +8000807c: 00000000 .word 0x00000000 +80008080: 0000000d .word 0x0000000d +80008084: 00000000 .word 0x00000000 +80008088: 0000000f .word 0x0000000f +8000808c: 00000000 .word 0x00000000 +80008090: 00000011 .word 0x00000011 +80008094: 00000000 .word 0x00000000 +80008098: 00000013 .word 0x00000013 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000015 .word 0x00000015 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000017 .word 0x00000017 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000019 .word 0x00000019 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000001b .word 0x0000001b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000001d .word 0x0000001d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000001f .word 0x0000001f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000021 .word 0x00000021 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000023 .word 0x00000023 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000025 .word 0x00000025 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000027 .word 0x00000027 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000029 .word 0x00000029 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000002b .word 0x0000002b +800080fc: 00000000 .word 0x00000000 +80008100: 0000002d .word 0x0000002d +80008104: 00000000 .word 0x00000000 +80008108: 0000002f .word 0x0000002f + ... + +80008150 : +80008150: 300023f3 csrrs x7,mstatus,x0 +80008154: 00b3d493 srli x9,x7,0xb +80008158: 0034f493 andi x9,x9,3 +8000815c: ffd48413 addi x8,x9,-3 +80008160: 341023f3 csrrs x7,mepc,x0 +80008164: 00000493 addi x9,x0,0 +80008168: 02040c63 beq x8,x0,800081a0 +8000816c: 29810113 addi x2,x2,664 +80008170: 310023f3 csrrs x7,0x310,x0 +80008174: 01839393 slli x7,x7,0x18 +80008178: 0003da63 bge x7,x0,8000818c + +8000817c : +8000817c: 29810113 addi x2,x2,664 +80008180: 47012783 lw x15,1136(x2) +80008184: d6810113 addi x2,x2,-664 +80008188: 0080006f jal x0,80008190 + +8000818c : +8000818c: f4012783 lw x15,-192(x2) +80008190: 341023f3 csrrs x7,mepc,x0 +80008194: 40f383b3 sub x7,x7,x15 +80008198: d6810113 addi x2,x2,-664 +8000819c: 1d812483 lw x9,472(x2) + +800081a0 : +800081a0: 007483b3 add x7,x9,x7 +800081a4: 25c12303 lw x6,604(x2) +800081a8: 26412403 lw x8,612(x2) +800081ac: 26812483 lw x9,616(x2) +800081b0: 26c12703 lw x14,620(x2) +800081b4: 27012783 lw x15,624(x2) +800081b8: 27412103 lw x2,628(x2) +800081bc: 00438067 jalr x0,4(x7) + +800081c0 : +800081c0: 00010217 auipc x4,0x10 +800081c4: a8020213 addi x4,x4,-1408 # 80017c40 +800081c8: 02522423 sw x5,40(x4) # 28 +800081cc: 00122423 sw x1,8(x4) # 8 +800081d0: 00022023 sw x0,0(x4) # 0 +800081d4: 0880006f jal x0,8000825c + +800081d8 : +800081d8: 00010397 auipc x7,0x10 +800081dc: a6838393 addi x7,x7,-1432 # 80017c40 +800081e0: 0483a023 sw x8,64(x7) +800081e4: 0243a023 sw x4,32(x7) +800081e8: 0253a423 sw x5,40(x7) +800081ec: 0013a423 sw x1,8(x7) +800081f0: 0003a023 sw x0,0(x7) +800081f4: 00038213 addi x4,x7,0 +800081f8: 00040293 addi x5,x8,0 +800081fc: 0600006f jal x0,8000825c + +80008200 : +80008200: 00010697 auipc x13,0x10 +80008204: a4068693 addi x13,x13,-1472 # 80017c40 +80008208: 06e6a823 sw x14,112(x13) +8000820c: 0246a023 sw x4,32(x13) +80008210: 0256a423 sw x5,40(x13) +80008214: 0016a423 sw x1,8(x13) +80008218: 0006a023 sw x0,0(x13) +8000821c: 00068213 addi x4,x13,0 +80008220: 00070293 addi x5,x14,0 +80008224: 0380006f jal x0,8000825c + +80008228 : +80008228: 00010497 auipc x9,0x10 +8000822c: a1848493 addi x9,x9,-1512 # 80017c40 +80008230: 0674a423 sw x7,104(x9) +80008234: 0244a023 sw x4,32(x9) +80008238: 0254a423 sw x5,40(x9) +8000823c: 0014a423 sw x1,8(x9) +80008240: 00300093 addi x1,x0,3 +80008244: 0014a023 sw x1,0(x9) +80008248: 1064a823 sw x6,272(x9) +8000824c: 1044ac23 sw x4,280(x9) +80008250: 00048213 addi x4,x9,0 +80008254: 00038293 addi x5,x7,0 +80008258: 0040006f jal x0,8000825c + +8000825c : +8000825c: 00222823 sw x2,16(x4) # 10 +80008260: 00322c23 sw x3,24(x4) # 18 +80008264: 02622823 sw x6,48(x4) # 30 +80008268: 02722c23 sw x7,56(x4) # 38 +8000826c: 04822023 sw x8,64(x4) # 40 +80008270: 04922423 sw x9,72(x4) # 48 +80008274: 04a22823 sw x10,80(x4) # 50 +80008278: 04b22c23 sw x11,88(x4) # 58 +8000827c: 06c22023 sw x12,96(x4) # 60 +80008280: 06d22423 sw x13,104(x4) # 68 +80008284: 06e22823 sw x14,112(x4) # 70 +80008288: 06f22c23 sw x15,120(x4) # 78 +8000828c: 09022023 sw x16,128(x4) # 80 +80008290: 09122423 sw x17,136(x4) # 88 +80008294: 09222823 sw x18,144(x4) # 90 +80008298: 09322c23 sw x19,152(x4) # 98 +8000829c: 0b422023 sw x20,160(x4) # a0 +800082a0: 0b522423 sw x21,168(x4) # a8 +800082a4: 0b622823 sw x22,176(x4) # b0 +800082a8: 0b722c23 sw x23,184(x4) # b8 +800082ac: 0d822023 sw x24,192(x4) # c0 +800082b0: 0d922423 sw x25,200(x4) # c8 +800082b4: 0da22823 sw x26,208(x4) # d0 +800082b8: 0db22c23 sw x27,216(x4) # d8 +800082bc: 0fc22023 sw x28,224(x4) # e0 +800082c0: 0fd22423 sw x29,232(x4) # e8 +800082c4: 0fe22823 sw x30,240(x4) # f0 +800082c8: 0ff22c23 sw x31,248(x4) # f8 + +800082cc : +800082cc: 00010497 auipc x9,0x10 +800082d0: 9744a483 lw x9,-1676(x9) # 80017c40 +800082d4: 00300513 addi x10,x0,3 +800082d8: 18a48a63 beq x9,x10,8000846c + +800082dc : +800082dc: ffa2d303 lhu x6,-6(x5) +800082e0: ff82d383 lhu x7,-8(x5) +800082e4: 01031313 slli x6,x6,0x10 +800082e8: 00736333 or x6,x6,x7 +800082ec: 00f35393 srli x7,x6,0xf +800082f0: 01f3f393 andi x7,x7,31 +800082f4: 01435413 srli x8,x6,0x14 +800082f8: 01f47413 andi x8,x8,31 +800082fc: 10822223 sw x8,260(x4) # 104 +80008300: 00341313 slli x6,x8,0x3 +80008304: 00620333 add x6,x4,x6 +80008308: 00032303 lw x6,0(x6) +8000830c: 10622823 sw x6,272(x4) # 110 +80008310: ff62d303 lhu x6,-10(x5) +80008314: ff42d383 lhu x7,-12(x5) +80008318: 01031313 slli x6,x6,0x10 +8000831c: 00736333 or x6,x6,x7 +80008320: 00030513 addi x10,x6,0 +80008324: 07f37413 andi x8,x6,127 +80008328: 00300493 addi x9,x0,3 +8000832c: 0c941463 bne x8,x9,800083f4 +80008330: 00c35413 srli x8,x6,0xc +80008334: 00747413 andi x8,x8,7 +80008338: 00200493 addi x9,x0,2 +8000833c: 0a941c63 bne x8,x9,800083f4 +80008340: 41435393 srai x7,x6,0x14 +80008344: 00f35313 srli x6,x6,0xf +80008348: 01f37313 andi x6,x6,31 +8000834c: 00331313 slli x6,x6,0x3 +80008350: 00620333 add x6,x4,x6 +80008354: 00032303 lw x6,0(x6) +80008358: 00730333 add x6,x6,x7 +8000835c: 00337413 andi x8,x6,3 +80008360: 0c041663 bne x8,x0,8000842c +80008364: 00000013 addi x0,x0,0 +80008368: 00000013 addi x0,x0,0 +8000836c: 00000013 addi x0,x0,0 +80008370: 00000013 addi x0,x0,0 +80008374: 00000013 addi x0,x0,0 +80008378: 00000013 addi x0,x0,0 +8000837c: 00000013 addi x0,x0,0 +80008380: 00011417 auipc x8,0x11 +80008384: 61040413 addi x8,x8,1552 # 80019990 +80008388: 00000013 addi x0,x0,0 +8000838c: 00000013 addi x0,x0,0 +80008390: 00000013 addi x0,x0,0 +80008394: 00000013 addi x0,x0,0 +80008398: 00000013 addi x0,x0,0 +8000839c: 00000013 addi x0,x0,0 +800083a0: 08836663 bltu x6,x8,8000842c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00021417 auipc x8,0x21 +800083c4: aa040413 addi x8,x8,-1376 # 80028e60 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: ffc40413 addi x8,x8,-4 +800083e4: 04646463 bltu x8,x6,8000842c +800083e8: 00032303 lw x6,0(x6) +800083ec: 10622c23 sw x6,280(x4) # 118 +800083f0: 3700006f jal x0,80008760 + +800083f4 : +800083f4: 00100413 addi x8,x0,1 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00010497 auipc x9,0x10 +80008404: 96848493 addi x9,x9,-1688 # 80017d68 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: 0084a023 sw x8,0(x9) +80008424: 10a22c23 sw x10,280(x4) # 118 +80008428: 3380006f jal x0,80008760 + +8000842c : +8000842c: 00200413 addi x8,x0,2 +80008430: 00000013 addi x0,x0,0 +80008434: 00000013 addi x0,x0,0 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: 92848493 addi x9,x9,-1752 # 80017d68 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10622c23 sw x6,280(x4) # 118 +80008468: 2f80006f jal x0,80008760 + +8000846c : +8000846c: 0042a303 lw x6,4(x5) +80008470: 00010817 auipc x16,0x10 +80008474: 90880813 addi x16,x16,-1784 # 80017d78 +80008478: 00682023 sw x6,0(x16) +8000847c: 0002a303 lw x6,0(x5) +80008480: 10622423 sw x6,264(x4) # 108 +80008484: 00010817 auipc x16,0x10 +80008488: 8f480813 addi x16,x16,-1804 # 80017d78 +8000848c: 00082303 lw x6,0(x16) +80008490: 00010397 auipc x7,0x10 +80008494: 01f38393 addi x7,x7,31 # 800184af +80008498: 28730463 beq x6,x7,80008720 +8000849c: 00000413 addi x8,x0,0 +800084a0: 00010817 auipc x16,0x10 +800084a4: 8d080813 addi x16,x16,-1840 # 80017d70 +800084a8: 00882023 sw x8,0(x16) +800084ac: 00010397 auipc x7,0x10 +800084b0: 01a38393 addi x7,x7,26 # 800184c6 +800084b4: 00731863 bne x6,x7,800084c4 +800084b8: 00100413 addi x8,x0,1 +800084bc: 00000493 addi x9,x0,0 +800084c0: 2740006f jal x0,80008734 +800084c4: 00010397 auipc x7,0x10 +800084c8: 10438393 addi x7,x7,260 # 800185c8 +800084cc: 00731863 bne x6,x7,800084dc +800084d0: 00200413 addi x8,x0,2 +800084d4: 00000493 addi x9,x0,0 +800084d8: 25c0006f jal x0,80008734 +800084dc: 00010397 auipc x7,0x10 +800084e0: 1e738393 addi x7,x7,487 # 800186c3 +800084e4: 00731863 bne x6,x7,800084f4 +800084e8: 00300413 addi x8,x0,3 +800084ec: 00000493 addi x9,x0,0 +800084f0: 2440006f jal x0,80008734 +800084f4: 00010397 auipc x7,0x10 +800084f8: 2c238393 addi x7,x7,706 # 800187b6 +800084fc: 00731863 bne x6,x7,8000850c +80008500: 00400413 addi x8,x0,4 +80008504: 00000493 addi x9,x0,0 +80008508: 22c0006f jal x0,80008734 +8000850c: 00010397 auipc x7,0x10 +80008510: 41d38393 addi x7,x7,1053 # 80018929 +80008514: 00731863 bne x6,x7,80008524 +80008518: 00500413 addi x8,x0,5 +8000851c: 00000493 addi x9,x0,0 +80008520: 2140006f jal x0,80008734 +80008524: 00010397 auipc x7,0x10 +80008528: 38938393 addi x7,x7,905 # 800188ad +8000852c: 00731863 bne x6,x7,8000853c +80008530: 00600413 addi x8,x0,6 +80008534: 00000493 addi x9,x0,0 +80008538: 1fc0006f jal x0,80008734 +8000853c: 00010397 auipc x7,0x10 +80008540: 3af38393 addi x7,x7,943 # 800188eb +80008544: 00731863 bne x6,x7,80008554 +80008548: 00700413 addi x8,x0,7 +8000854c: 00000493 addi x9,x0,0 +80008550: 1e40006f jal x0,80008734 +80008554: 00010397 auipc x7,0x10 +80008558: fb238393 addi x7,x7,-78 # 80018506 +8000855c: 00731863 bne x6,x7,8000856c +80008560: 00100413 addi x8,x0,1 +80008564: 00100493 addi x9,x0,1 +80008568: 1cc0006f jal x0,80008734 +8000856c: 00010397 auipc x7,0x10 +80008570: 09a38393 addi x7,x7,154 # 80018606 +80008574: 00731863 bne x6,x7,80008584 +80008578: 00200413 addi x8,x0,2 +8000857c: 00100493 addi x9,x0,1 +80008580: 1b40006f jal x0,80008734 +80008584: 00010397 auipc x7,0x10 +80008588: 17b38393 addi x7,x7,379 # 800186ff +8000858c: 00731863 bne x6,x7,8000859c +80008590: 00300413 addi x8,x0,3 +80008594: 00100493 addi x9,x0,1 +80008598: 19c0006f jal x0,80008734 +8000859c: 00010397 auipc x7,0x10 +800085a0: 25738393 addi x7,x7,599 # 800187f3 +800085a4: 00731863 bne x6,x7,800085b4 +800085a8: 00400413 addi x8,x0,4 +800085ac: 00100493 addi x9,x0,1 +800085b0: 1840006f jal x0,80008734 +800085b4: 00010397 auipc x7,0x10 +800085b8: 3b038393 addi x7,x7,944 # 80018964 +800085bc: 00731863 bne x6,x7,800085cc +800085c0: 00500413 addi x8,x0,5 +800085c4: 00100493 addi x9,x0,1 +800085c8: 16c0006f jal x0,80008734 +800085cc: 00010397 auipc x7,0x10 +800085d0: f7a38393 addi x7,x7,-134 # 80018546 +800085d4: 00731863 bne x6,x7,800085e4 +800085d8: 00100413 addi x8,x0,1 +800085dc: 00200493 addi x9,x0,2 +800085e0: 1540006f jal x0,80008734 +800085e4: 00010397 auipc x7,0x10 +800085e8: 06038393 addi x7,x7,96 # 80018644 +800085ec: 00731863 bne x6,x7,800085fc +800085f0: 00200413 addi x8,x0,2 +800085f4: 00200493 addi x9,x0,2 +800085f8: 13c0006f jal x0,80008734 +800085fc: 00010397 auipc x7,0x10 +80008600: 13f38393 addi x7,x7,319 # 8001873b +80008604: 00731863 bne x6,x7,80008614 +80008608: 00300413 addi x8,x0,3 +8000860c: 00200493 addi x9,x0,2 +80008610: 1240006f jal x0,80008734 +80008614: 00010397 auipc x7,0x10 +80008618: 21c38393 addi x7,x7,540 # 80018830 +8000861c: 00731863 bne x6,x7,8000862c +80008620: 00400413 addi x8,x0,4 +80008624: 00200493 addi x9,x0,2 +80008628: 10c0006f jal x0,80008734 +8000862c: 00010397 auipc x7,0x10 +80008630: 37338393 addi x7,x7,883 # 8001899f +80008634: 00731863 bne x6,x7,80008644 +80008638: 00500413 addi x8,x0,5 +8000863c: 00200493 addi x9,x0,2 +80008640: 0f40006f jal x0,80008734 +80008644: 00010397 auipc x7,0x10 +80008648: f4338393 addi x7,x7,-189 # 80018587 +8000864c: 00731863 bne x6,x7,8000865c +80008650: 00100413 addi x8,x0,1 +80008654: 00300493 addi x9,x0,3 +80008658: 0dc0006f jal x0,80008734 +8000865c: 00010397 auipc x7,0x10 +80008660: 02738393 addi x7,x7,39 # 80018683 +80008664: 00731863 bne x6,x7,80008674 +80008668: 00200413 addi x8,x0,2 +8000866c: 00300493 addi x9,x0,3 +80008670: 0c40006f jal x0,80008734 +80008674: 00010397 auipc x7,0x10 +80008678: 10438393 addi x7,x7,260 # 80018778 +8000867c: 00731863 bne x6,x7,8000868c +80008680: 00300413 addi x8,x0,3 +80008684: 00300493 addi x9,x0,3 +80008688: 0ac0006f jal x0,80008734 +8000868c: 00010397 auipc x7,0x10 +80008690: 1e238393 addi x7,x7,482 # 8001886e +80008694: 00731863 bne x6,x7,800086a4 +80008698: 00400413 addi x8,x0,4 +8000869c: 00300493 addi x9,x0,3 +800086a0: 0940006f jal x0,80008734 +800086a4: 00010397 auipc x7,0x10 +800086a8: 33738393 addi x7,x7,823 # 800189db +800086ac: 00731863 bne x6,x7,800086bc +800086b0: 00500413 addi x8,x0,5 +800086b4: 00300493 addi x9,x0,3 +800086b8: 07c0006f jal x0,80008734 +800086bc: 00010397 auipc x7,0x10 +800086c0: 35c38393 addi x7,x7,860 # 80018a18 +800086c4: 00731863 bne x6,x7,800086d4 +800086c8: 00800413 addi x8,x0,8 +800086cc: 00000493 addi x9,x0,0 +800086d0: 0640006f jal x0,80008734 +800086d4: 00010397 auipc x7,0x10 +800086d8: 39338393 addi x7,x7,915 # 80018a67 +800086dc: 00731863 bne x6,x7,800086ec +800086e0: 00800413 addi x8,x0,8 +800086e4: 00000493 addi x9,x0,0 +800086e8: 04c0006f jal x0,80008734 +800086ec: 00010397 auipc x7,0x10 +800086f0: 47638393 addi x7,x7,1142 # 80018b62 +800086f4: 00731863 bne x6,x7,80008704 +800086f8: 00800413 addi x8,x0,8 +800086fc: 00100493 addi x9,x0,1 +80008700: 0340006f jal x0,80008734 +80008704: 00010397 auipc x7,0x10 +80008708: 55a38393 addi x7,x7,1370 # 80018c5e +8000870c: 00731863 bne x6,x7,8000871c +80008710: 00800413 addi x8,x0,8 +80008714: 00200493 addi x9,x0,2 +80008718: 01c0006f jal x0,80008734 +8000871c: 0340006f jal x0,80008750 + +80008720 : +80008720: 00900413 addi x8,x0,9 +80008724: 0000f817 auipc x16,0xf +80008728: 64c80813 addi x16,x16,1612 # 80017d70 +8000872c: 00882023 sw x8,0(x16) +80008730: 0300006f jal x0,80008760 + +80008734 : +80008734: 0000f817 auipc x16,0xf +80008738: 63c80813 addi x16,x16,1596 # 80017d70 +8000873c: 00882023 sw x8,0(x16) +80008740: 0000f817 auipc x16,0xf +80008744: 63480813 addi x16,x16,1588 # 80017d74 +80008748: 00982023 sw x9,0(x16) +8000874c: 0140006f jal x0,80008760 + +80008750 : +80008750: 0000f817 auipc x16,0xf +80008754: 62080813 addi x16,x16,1568 # 80017d70 +80008758: 00082023 sw x0,0(x16) +8000875c: 0040006f jal x0,80008760 + +80008760 : +80008760: 0002a303 lw x6,0(x5) +80008764: 10622423 sw x6,264(x4) # 108 +80008768: 00035383 lhu x7,0(x6) +8000876c: 0033f413 andi x8,x7,3 +80008770: 00300493 addi x9,x0,3 +80008774: 00941863 bne x8,x9,80008784 +80008778: 00235403 lhu x8,2(x6) +8000877c: 01041413 slli x8,x8,0x10 +80008780: 0083e3b3 or x7,x7,x8 +80008784: 10722023 sw x7,256(x4) # 100 +80008788: 0042a303 lw x6,4(x5) +8000878c: 12622023 sw x6,288(x4) # 120 + +80008790 : +80008790: 00000013 addi x0,x0,0 +80008794: 00000013 addi x0,x0,0 +80008798: 00000013 addi x0,x0,0 +8000879c: 00000013 addi x0,x0,0 +800087a0: 00010517 auipc x10,0x10 +800087a4: b2050513 addi x10,x10,-1248 # 800182c0 +800087a8: 00000013 addi x0,x0,0 +800087ac: 00000013 addi x0,x0,0 +800087b0: 00000013 addi x0,x0,0 +800087b4: 00000013 addi x0,x0,0 +800087b8: 00000013 addi x0,x0,0 +800087bc: 00000013 addi x0,x0,0 +800087c0: 00022097 auipc x1,0x22 +800087c4: da4080e7 jalr x1,-604(x1) # 8002a564 +800087c8: 00000013 addi x0,x0,0 +800087cc: 00000013 addi x0,x0,0 +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: b1b50513 addi x10,x10,-1253 # 800182fb +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 + +80008808 : +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: b9250513 addi x10,x10,-1134 # 800183b2 +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 0000f517 auipc x10,0xf +8000884c: 51852503 lw x10,1304(x10) # 80017d60 +80008850: 00022097 auipc x1,0x22 +80008854: d14080e7 jalr x1,-748(x1) # 8002a564 + +80008858 : +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: b6450513 addi x10,x10,-1180 # 800183c4 +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80008888: 0000f517 auipc x10,0xf +8000888c: 3b852503 lw x10,952(x10) # 80017c40 +80008890: 00300593 addi x11,x0,3 +80008894: 52b50c63 beq x10,x11,80008dcc +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: b2650513 addi x10,x10,-1242 # 800183c6 +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 0000f517 auipc x10,0xf +800088cc: 47852503 lw x10,1144(x10) # 80017d40 +800088d0: 02000593 addi x11,x0,32 +800088d4: 00357613 andi x12,x10,3 +800088d8: 00300693 addi x13,x0,3 +800088dc: 00d60463 beq x12,x13,800088e4 +800088e0: 01000593 addi x11,x0,16 +800088e4: 3f4010ef jal x1,80009cd8 +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 0000f517 auipc x10,0xf +80008904: 4a850513 addi x10,x10,1192 # 80017da8 +80008908: 00000013 addi x0,x0,0 +8000890c: 00000013 addi x0,x0,0 +80008910: 00000013 addi x0,x0,0 +80008914: 00000013 addi x0,x0,0 +80008918: 00000013 addi x0,x0,0 +8000891c: 00000013 addi x0,x0,0 +80008920: 00022097 auipc x1,0x22 +80008924: c44080e7 jalr x1,-956(x1) # 8002a564 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: a9a50513 addi x10,x10,-1382 # 800183da +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 0000f517 auipc x10,0xf +8000896c: 3e052503 lw x10,992(x10) # 80017d48 +80008970: 02000593 addi x11,x0,32 +80008974: 364010ef jal x1,80009cd8 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 0000f517 auipc x10,0xf +80008984: 42850513 addi x10,x10,1064 # 80017da8 +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00000013 addi x0,x0,0 +800089ac: 00000013 addi x0,x0,0 +800089b0: 00000013 addi x0,x0,0 +800089b4: 00000013 addi x0,x0,0 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00010517 auipc x10,0x10 +800089c4: 45150513 addi x10,x10,1105 # 80018e11 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 0000f517 auipc x10,0xf +800089ec: 25852503 lw x10,600(x10) # 80017c40 +800089f0: 00050663 beq x10,x0,800089fc +800089f4: 00300593 addi x11,x0,3 +800089f8: 04b51063 bne x10,x11,80008a38 +800089fc: 07800593 addi x11,x0,120 +80008a00: 0000f617 auipc x12,0xf +80008a04: 3a860613 addi x12,x12,936 # 80017da8 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00b60023 sb x11,0(x12) +80008a24: 00160613 addi x12,x12,1 +80008a28: 0000f517 auipc x10,0xf +80008a2c: 31c52503 lw x10,796(x10) # 80017d44 +80008a30: 324010ef jal x1,80009d54 +80008a34: 1180006f jal x0,80008b4c + +80008a38 : +80008a38: 00100593 addi x11,x0,1 +80008a3c: 04b50863 beq x10,x11,80008a8c +80008a40: 00400593 addi x11,x0,4 +80008a44: 08b50a63 beq x10,x11,80008ad8 +80008a48: 00500593 addi x11,x0,5 +80008a4c: 0cb50463 beq x10,x11,80008b14 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00010517 auipc x10,0x10 +80008a64: 4c750513 addi x10,x10,1223 # 80018f27 +80008a68: 00000013 addi x0,x0,0 +80008a6c: 00000013 addi x0,x0,0 +80008a70: 00000013 addi x0,x0,0 +80008a74: 00000013 addi x0,x0,0 +80008a78: 00000013 addi x0,x0,0 +80008a7c: 00000013 addi x0,x0,0 +80008a80: 00022097 auipc x1,0x22 +80008a84: ae4080e7 jalr x1,-1308(x1) # 8002a564 +80008a88: 1000006f jal x0,80008b88 + +80008a8c : +80008a8c: 06600593 addi x11,x0,102 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 0000f617 auipc x12,0xf +80008aa4: 30860613 addi x12,x12,776 # 80017da8 +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00b60023 sb x11,0(x12) +80008ac4: 00160613 addi x12,x12,1 +80008ac8: 0000f517 auipc x10,0xf +80008acc: 27c52503 lw x10,636(x10) # 80017d44 +80008ad0: 284010ef jal x1,80009d54 +80008ad4: 0780006f jal x0,80008b4c + +80008ad8 : +80008ad8: 07600593 addi x11,x0,118 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 0000f617 auipc x12,0xf +80008ae4: 2c860613 addi x12,x12,712 # 80017da8 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 0000f517 auipc x10,0xf +80008b0c: 23c52503 lw x10,572(x10) # 80017d44 +80008b10: 244010ef jal x1,80009d54 + +80008b14 : +80008b14: 00000013 addi x0,x0,0 +80008b18: 00000013 addi x0,x0,0 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 00010517 auipc x10,0x10 +80008b24: 2ea50513 addi x10,x10,746 # 80018e0a +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00022097 auipc x1,0x22 +80008b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80008b48: 0400006f jal x0,80008b88 + +80008b4c : +80008b4c: 00000013 addi x0,x0,0 +80008b50: 00000013 addi x0,x0,0 +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 0000f517 auipc x10,0xf +80008b64: 24850513 addi x10,x10,584 # 80017da8 +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 + +80008b88 : +80008b88: 00000013 addi x0,x0,0 +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 00010517 auipc x10,0x10 +80008ba4: 28250513 addi x10,x10,642 # 80018e22 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80008bc8: 0000f517 auipc x10,0xf +80008bcc: 07852503 lw x10,120(x10) # 80017c40 +80008bd0: 00100593 addi x11,x0,1 +80008bd4: 00b51c63 bne x10,x11,80008bec +80008bd8: 0000f517 auipc x10,0xf +80008bdc: 17852503 lw x10,376(x10) # 80017d50 +80008be0: 02000593 addi x11,x0,32 +80008be4: 0f4010ef jal x1,80009cd8 +80008be8: 0140006f jal x0,80008bfc + +80008bec : +80008bec: 0000f517 auipc x10,0xf +80008bf0: 16452503 lw x10,356(x10) # 80017d50 +80008bf4: 02000593 addi x11,x0,32 +80008bf8: 0e0010ef jal x1,80009cd8 + +80008bfc : +80008bfc: 00000013 addi x0,x0,0 +80008c00: 0000f517 auipc x10,0xf +80008c04: 1a850513 addi x10,x10,424 # 80017da8 +80008c08: 00000013 addi x0,x0,0 +80008c0c: 00000013 addi x0,x0,0 +80008c10: 00000013 addi x0,x0,0 +80008c14: 00000013 addi x0,x0,0 +80008c18: 00000013 addi x0,x0,0 +80008c1c: 00000013 addi x0,x0,0 +80008c20: 00022097 auipc x1,0x22 +80008c24: 944080e7 jalr x1,-1724(x1) # 8002a564 +80008c28: 0000f517 auipc x10,0xf +80008c2c: 14052503 lw x10,320(x10) # 80017d68 +80008c30: 08051e63 bne x10,x0,80008ccc +80008c34: 00000013 addi x0,x0,0 +80008c38: 00000013 addi x0,x0,0 +80008c3c: 00000013 addi x0,x0,0 +80008c40: 00010517 auipc x10,0x10 +80008c44: 1f950513 addi x10,x10,505 # 80018e39 +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: fd852503 lw x10,-40(x10) # 80017c40 +80008c70: 00100593 addi x11,x0,1 +80008c74: 00b51c63 bne x10,x11,80008c8c +80008c78: 0000f517 auipc x10,0xf +80008c7c: 0e052503 lw x10,224(x10) # 80017d58 +80008c80: 02000593 addi x11,x0,32 +80008c84: 054010ef jal x1,80009cd8 +80008c88: 0140006f jal x0,80008c9c + +80008c8c : +80008c8c: 0000f517 auipc x10,0xf +80008c90: 0cc52503 lw x10,204(x10) # 80017d58 +80008c94: 02000593 addi x11,x0,32 +80008c98: 040010ef jal x1,80009cd8 + +80008c9c : +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 0000f517 auipc x10,0xf +80008ca4: 10850513 addi x10,x10,264 # 80017da8 +80008ca8: 00000013 addi x0,x0,0 +80008cac: 00000013 addi x0,x0,0 +80008cb0: 00000013 addi x0,x0,0 +80008cb4: 00000013 addi x0,x0,0 +80008cb8: 00000013 addi x0,x0,0 +80008cbc: 00000013 addi x0,x0,0 +80008cc0: 00022097 auipc x1,0x22 +80008cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80008cc8: 5bd0006f jal x0,80009a84 + +80008ccc : +80008ccc: 00100593 addi x11,x0,1 +80008cd0: 06b51e63 bne x10,x11,80008d4c + +80008cd4 : +80008cd4: 00000013 addi x0,x0,0 +80008cd8: 00000013 addi x0,x0,0 +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 00010517 auipc x10,0x10 +80008ce4: 17050513 addi x10,x10,368 # 80018e50 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 0000f517 auipc x10,0xf +80008d0c: 05052503 lw x10,80(x10) # 80017d58 +80008d10: 02000593 addi x11,x0,32 +80008d14: 7c5000ef jal x1,80009cd8 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 0000f517 auipc x10,0xf +80008d24: 08850513 addi x10,x10,136 # 80017da8 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 53d0006f jal x0,80009a84 + +80008d4c : +80008d4c: 00000013 addi x0,x0,0 +80008d50: 00000013 addi x0,x0,0 +80008d54: 00000013 addi x0,x0,0 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 00010517 auipc x10,0x10 +80008d64: 14e50513 addi x10,x10,334 # 80018eae +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 0000f517 auipc x10,0xf +80008d8c: fd052503 lw x10,-48(x10) # 80017d58 +80008d90: 02000593 addi x11,x0,32 +80008d94: 745000ef jal x1,80009cd8 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 0000f517 auipc x10,0xf +80008da4: 00850513 addi x10,x10,8 # 80017da8 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 4bd0006f jal x0,80009a84 + +80008dcc : +80008dcc: 0000f417 auipc x8,0xf +80008dd0: fa442403 lw x8,-92(x8) # 80017d70 +80008dd4: 00900493 addi x9,x0,9 +80008dd8: 0a940c63 beq x8,x9,80008e90 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 00010517 auipc x10,0x10 +80008de4: 17350513 addi x10,x10,371 # 80018f53 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 00000013 addi x0,x0,0 +80008e0c: 00000013 addi x0,x0,0 +80008e10: 00000013 addi x0,x0,0 +80008e14: 00000013 addi x0,x0,0 +80008e18: 00000013 addi x0,x0,0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00010517 auipc x10,0x10 +80008e24: 15f50513 addi x10,x10,351 # 80018f7f +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 0000f817 auipc x16,0xf +80008e4c: f3080813 addi x16,x16,-208 # 80017d78 +80008e50: 00082503 lw x10,0(x16) +80008e54: 00021097 auipc x1,0x21 +80008e58: 710080e7 jalr x1,1808(x1) # 8002a564 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 0000f517 auipc x10,0xf +80008e64: 56450513 addi x10,x10,1380 # 800183c4 +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 280404e3 beq x8,x0,80009910 +80008e8c: 3400006f jal x0,800091cc + +80008e90 : +80008e90: 00000013 addi x0,x0,0 +80008e94: 00000013 addi x0,x0,0 +80008e98: 00000013 addi x0,x0,0 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00010517 auipc x10,0x10 +80008ea4: 0ef50513 addi x10,x10,239 # 80018f8f +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 0000f517 auipc x10,0xf +80008ecc: e9052503 lw x10,-368(x10) # 80017d58 +80008ed0: 02000593 addi x11,x0,32 +80008ed4: 605000ef jal x1,80009cd8 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 0000f517 auipc x10,0xf +80008ee4: ec850513 addi x10,x10,-312 # 80017da8 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 00000013 addi x0,x0,0 +80008f0c: 00000013 addi x0,x0,0 +80008f10: 00000013 addi x0,x0,0 +80008f14: 00000013 addi x0,x0,0 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 00010517 auipc x10,0x10 +80008f24: 09a50513 addi x10,x10,154 # 80018fba +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 0000f517 auipc x10,0xf +80008f4c: e0852503 lw x10,-504(x10) # 80017d50 +80008f50: 02000593 addi x11,x0,32 +80008f54: 585000ef jal x1,80009cd8 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 0000f517 auipc x10,0xf +80008f64: e4850513 addi x10,x10,-440 # 80017da8 +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f317 auipc x6,0xf +80008f8c: dc832303 lw x6,-568(x6) # 80017d50 +80008f90: 0000f397 auipc x7,0xf +80008f94: dc83a383 lw x7,-568(x7) # 80017d58 +80008f98: 10736a63 bltu x6,x7,800090ac + +80008f9c : +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 00010517 auipc x10,0x10 +80008fa4: 04950513 addi x10,x10,73 # 80018fe9 +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 00000013 addi x0,x0,0 +80008fcc: 00000013 addi x0,x0,0 +80008fd0: 00000013 addi x0,x0,0 +80008fd4: 00000013 addi x0,x0,0 +80008fd8: 00000013 addi x0,x0,0 +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00010517 auipc x10,0x10 +80008fe4: 07150513 addi x10,x10,113 # 80019051 +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 0000f317 auipc x6,0xf +8000900c: d4832303 lw x6,-696(x6) # 80017d50 +80009010: 0000f397 auipc x7,0xf +80009014: d483a383 lw x7,-696(x7) # 80017d58 +80009018: 40730533 sub x10,x6,x7 +8000901c: 02000593 addi x11,x0,32 +80009020: 4b9000ef jal x1,80009cd8 +80009024: 00000013 addi x0,x0,0 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 0000f517 auipc x10,0xf +80009044: d6850513 addi x10,x10,-664 # 80017da8 +80009048: 00000013 addi x0,x0,0 +8000904c: 00000013 addi x0,x0,0 +80009050: 00000013 addi x0,x0,0 +80009054: 00000013 addi x0,x0,0 +80009058: 00000013 addi x0,x0,0 +8000905c: 00000013 addi x0,x0,0 +80009060: 00021097 auipc x1,0x21 +80009064: 504080e7 jalr x1,1284(x1) # 8002a564 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 00010517 auipc x10,0x10 +80009084: ff850513 addi x10,x10,-8 # 80019078 +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 1dd0006f jal x0,80009a84 + +800090ac : +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: f5550513 addi x10,x10,-171 # 80019015 +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 00000013 addi x0,x0,0 +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: f5150513 addi x10,x10,-175 # 80019051 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 0000f317 auipc x6,0xf +8000912c: c3032303 lw x6,-976(x6) # 80017d58 +80009130: 0000f397 auipc x7,0xf +80009134: c203a383 lw x7,-992(x7) # 80017d50 +80009138: 40730533 sub x10,x6,x7 +8000913c: 02000593 addi x11,x0,32 +80009140: 399000ef jal x1,80009cd8 +80009144: 00000013 addi x0,x0,0 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 0000f517 auipc x10,0xf +80009164: c4850513 addi x10,x10,-952 # 80017da8 +80009168: 00000013 addi x0,x0,0 +8000916c: 00000013 addi x0,x0,0 +80009170: 00000013 addi x0,x0,0 +80009174: 00000013 addi x0,x0,0 +80009178: 00000013 addi x0,x0,0 +8000917c: 00000013 addi x0,x0,0 +80009180: 00021097 auipc x1,0x21 +80009184: 3e4080e7 jalr x1,996(x1) # 8002a564 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 00010517 auipc x10,0x10 +800091a4: fc050513 addi x10,x10,-64 # 80019160 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 0bd0006f jal x0,80009a84 + +800091cc : +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00010517 auipc x10,0x10 +800091e4: 06750513 addi x10,x10,103 # 80019247 +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0000f517 auipc x10,0xf +8000920c: b6c52503 lw x10,-1172(x10) # 80017d74 +80009210: 04050a63 beq x10,x0,80009264 +80009214: 00100593 addi x11,x0,1 +80009218: 08b50663 beq x10,x11,800092a4 +8000921c: 00200593 addi x11,x0,2 +80009220: 0cb50263 beq x10,x11,800092e4 +80009224: 00300593 addi x11,x0,3 +80009228: 0eb50e63 beq x10,x11,80009324 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00010517 auipc x10,0x10 +80009244: 04350513 addi x10,x10,67 # 80019283 +80009248: 00000013 addi x0,x0,0 +8000924c: 00000013 addi x0,x0,0 +80009250: 00000013 addi x0,x0,0 +80009254: 00000013 addi x0,x0,0 +80009258: 00000013 addi x0,x0,0 +8000925c: 00000013 addi x0,x0,0 +80009260: 1000006f jal x0,80009360 + +80009264 : +80009264: 00000013 addi x0,x0,0 +80009268: 00000013 addi x0,x0,0 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: fe150513 addi x10,x10,-31 # 80019261 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 0c00006f jal x0,80009360 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: fa950513 addi x10,x10,-87 # 80019269 +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0800006f jal x0,80009360 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: f7150513 addi x10,x10,-143 # 80019271 +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0400006f jal x0,80009360 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: f3a50513 addi x10,x10,-198 # 8001927a +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 + +80009360 : +80009360: 00021097 auipc x1,0x21 +80009364: 204080e7 jalr x1,516(x1) # 8002a564 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: f0c50513 addi x10,x10,-244 # 8001928c +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 0000f517 auipc x10,0xf +800093ac: 9c852503 lw x10,-1592(x10) # 80017d70 +800093b0: 00100593 addi x11,x0,1 +800093b4: 06b50863 beq x10,x11,80009424 +800093b8: 00200593 addi x11,x0,2 +800093bc: 0ab50463 beq x10,x11,80009464 +800093c0: 00300593 addi x11,x0,3 +800093c4: 0eb50063 beq x10,x11,800094a4 +800093c8: 00400593 addi x11,x0,4 +800093cc: 10b50c63 beq x10,x11,800094e4 +800093d0: 00500593 addi x11,x0,5 +800093d4: 14b50863 beq x10,x11,80009524 +800093d8: 00600593 addi x11,x0,6 +800093dc: 18b50463 beq x10,x11,80009564 +800093e0: 00700593 addi x11,x0,7 +800093e4: 1cb50063 beq x10,x11,800095a4 +800093e8: 00800593 addi x11,x0,8 +800093ec: 1eb50c63 beq x10,x11,800095e4 +800093f0: 00000013 addi x0,x0,0 +800093f4: 00000013 addi x0,x0,0 +800093f8: 00000013 addi x0,x0,0 +800093fc: 00000013 addi x0,x0,0 +80009400: 00010517 auipc x10,0x10 +80009404: fe350513 addi x10,x10,-29 # 800193e3 +80009408: 00000013 addi x0,x0,0 +8000940c: 00000013 addi x0,x0,0 +80009410: 00000013 addi x0,x0,0 +80009414: 00000013 addi x0,x0,0 +80009418: 00000013 addi x0,x0,0 +8000941c: 00000013 addi x0,x0,0 +80009420: 2000006f jal x0,80009620 + +80009424 : +80009424: 00000013 addi x0,x0,0 +80009428: 00000013 addi x0,x0,0 +8000942c: 00000013 addi x0,x0,0 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: e6650513 addi x10,x10,-410 # 800192a6 +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 1c00006f jal x0,80009620 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: e5750513 addi x10,x10,-425 # 800192d7 +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1800006f jal x0,80009620 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: e3750513 addi x10,x10,-457 # 800192f7 +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1400006f jal x0,80009620 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: e1550513 addi x10,x10,-491 # 80019315 +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1000006f jal x0,80009620 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: df450513 addi x10,x10,-524 # 80019334 +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 0c00006f jal x0,80009620 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: ddc50513 addi x10,x10,-548 # 8001935c +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0800006f jal x0,80009620 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: dc850513 addi x10,x10,-568 # 80019388 +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0400006f jal x0,80009620 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: db450513 addi x10,x10,-588 # 800193b4 +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 + +80009620 : +80009620: 00021097 auipc x1,0x21 +80009624: f44080e7 jalr x1,-188(x1) # 8002a564 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: db250513 addi x10,x10,-590 # 800193f2 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 0000e517 auipc x10,0xe +8000966c: 6f052503 lw x10,1776(x10) # 80017d58 +80009670: 02000593 addi x11,x0,32 +80009674: 664000ef jal x1,80009cd8 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 0000e517 auipc x10,0xe +80009684: 72850513 addi x10,x10,1832 # 80017da8 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 00000013 addi x0,x0,0 +800096ac: 00000013 addi x0,x0,0 +800096b0: 00000013 addi x0,x0,0 +800096b4: 00000013 addi x0,x0,0 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 00010517 auipc x10,0x10 +800096c4: d4950513 addi x10,x10,-695 # 80019409 +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 0000e517 auipc x10,0xe +800096ec: 66852503 lw x10,1640(x10) # 80017d50 +800096f0: 02000593 addi x11,x0,32 +800096f4: 5e4000ef jal x1,80009cd8 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 0000e517 auipc x10,0xe +80009704: 6a850513 addi x10,x10,1704 # 80017da8 +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000e517 auipc x10,0xe +8000972c: 64852503 lw x10,1608(x10) # 80017d70 +80009730: 00200593 addi x11,x0,2 +80009734: 08b51463 bne x10,x11,800097bc +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 00010517 auipc x10,0x10 +80009744: ce050513 addi x10,x10,-800 # 80019420 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000e517 auipc x10,0xe +8000976c: 5f052503 lw x10,1520(x10) # 80017d58 +80009770: 284000ef jal x1,800099f4 +80009774: 00021097 auipc x1,0x21 +80009778: df0080e7 jalr x1,-528(x1) # 8002a564 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: cb750513 addi x10,x10,-841 # 80019437 +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000e517 auipc x10,0xe +800097ac: 5a852503 lw x10,1448(x10) # 80017d50 +800097b0: 244000ef jal x1,800099f4 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 + +800097bc : +800097bc: 00000097 auipc x1,0x0 +800097c0: 314080e7 jalr x1,788(x1) # 80009ad0 +800097c4: 0000e517 auipc x10,0xe +800097c8: 5ac52503 lw x10,1452(x10) # 80017d70 +800097cc: 00100593 addi x11,x0,1 +800097d0: 02b51e63 bne x10,x11,8000980c +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00010517 auipc x10,0x10 +800097e4: ccd50513 addi x10,x10,-819 # 800194ad +800097e8: 00000013 addi x0,x0,0 +800097ec: 00000013 addi x0,x0,0 +800097f0: 00000013 addi x0,x0,0 +800097f4: 00000013 addi x0,x0,0 +800097f8: 00000013 addi x0,x0,0 +800097fc: 00000013 addi x0,x0,0 +80009800: 00021097 auipc x1,0x21 +80009804: d64080e7 jalr x1,-668(x1) # 8002a564 +80009808: 27c0006f jal x0,80009a84 +8000980c: 00200593 addi x11,x0,2 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: d6350513 addi x10,x10,-669 # 80019583 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 23c0006f jal x0,80009a84 +8000984c: 00300593 addi x11,x0,3 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: e1650513 addi x10,x10,-490 # 80019676 +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 1fc0006f jal x0,80009a84 +8000988c: 00400593 addi x11,x0,4 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: ed150513 addi x10,x10,-303 # 80019771 +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1bc0006f jal x0,80009a84 +800098cc: 00500593 addi x11,x0,5 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: f7850513 addi x10,x10,-136 # 80019858 +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 17c0006f jal x0,80009a84 +8000990c: 1780006f jal x0,80009a84 + +80009910 : +80009910: 00000013 addi x0,x0,0 +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: b4550513 addi x10,x10,-1211 # 80019465 +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 0000e617 auipc x12,0xe +8000994c: 44062603 lw x12,1088(x12) # 80017d88 +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 0000f517 auipc x10,0xf +80009964: aee50513 addi x10,x10,-1298 # 8001844e +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 00065503 lhu x10,0(x12) +8000998c: 01000593 addi x11,x0,16 +80009990: 00357413 andi x8,x10,3 +80009994: 00300493 addi x9,x0,3 +80009998: 00941a63 bne x8,x9,800099ac +8000999c: 00265403 lhu x8,2(x12) +800099a0: 01041413 slli x8,x8,0x10 +800099a4: 00856533 or x10,x10,x8 +800099a8: 02000593 addi x11,x0,32 +800099ac: 32c000ef jal x1,80009cd8 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 0000e517 auipc x10,0xe +800099c4: 3e850513 addi x10,x10,1000 # 80017da8 +800099c8: 00000013 addi x0,x0,0 +800099cc: 00000013 addi x0,x0,0 +800099d0: 00000013 addi x0,x0,0 +800099d4: 00000013 addi x0,x0,0 +800099d8: 00000013 addi x0,x0,0 +800099dc: 00000013 addi x0,x0,0 +800099e0: 00021097 auipc x1,0x21 +800099e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800099e8: 00000097 auipc x1,0x0 +800099ec: 0e8080e7 jalr x1,232(x1) # 80009ad0 +800099f0: 0940006f jal x0,80009a84 + +800099f4 : +800099f4: 02054263 blt x10,x0,80009a18 + +800099f8 : +800099f8: 01800593 addi x11,x0,24 +800099fc: 04b55463 bge x10,x11,80009a44 +80009a00: 0000e597 auipc x11,0xe +80009a04: 3d058593 addi x11,x11,976 # 80017dd0 +80009a08: 00251613 slli x12,x10,0x2 +80009a0c: 00c585b3 add x11,x11,x12 +80009a10: 0005a503 lw x10,0(x11) +80009a14: 00008067 jalr x0,0(x1) + +80009a18 : +80009a18: 00100593 addi x11,x0,1 +80009a1c: 01f59593 slli x11,x11,0x1f +80009a20: 00b54533 xor x10,x10,x11 +80009a24: 01000593 addi x11,x0,16 +80009a28: 00b55e63 bge x10,x11,80009a44 +80009a2c: 0000e597 auipc x11,0xe +80009a30: 40458593 addi x11,x11,1028 # 80017e30 +80009a34: 00251613 slli x12,x10,0x2 +80009a38: 00c585b3 add x11,x11,x12 +80009a3c: 0005a503 lw x10,0(x11) +80009a40: 00008067 jalr x0,0(x1) + +80009a44 : +80009a44: 00000013 addi x0,x0,0 +80009a48: 00000013 addi x0,x0,0 +80009a4c: 00000013 addi x0,x0,0 +80009a50: 00000013 addi x0,x0,0 +80009a54: 00000013 addi x0,x0,0 +80009a58: 00000013 addi x0,x0,0 +80009a5c: 00000013 addi x0,x0,0 +80009a60: 0000f517 auipc x10,0xf +80009a64: 80e50513 addi x10,x10,-2034 # 8001826e +80009a68: 00000013 addi x0,x0,0 +80009a6c: 00000013 addi x0,x0,0 +80009a70: 00000013 addi x0,x0,0 +80009a74: 00000013 addi x0,x0,0 +80009a78: 00000013 addi x0,x0,0 +80009a7c: 00000013 addi x0,x0,0 +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 0000f517 auipc x10,0xf +80009aa4: 46650513 addi x10,x10,1126 # 80018f06 +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00021097 auipc x1,0x21 +80009ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 + +80009ac8 : +80009ac8: 00021097 auipc x1,0x21 +80009acc: afc080e7 jalr x1,-1284(x1) # 8002a5c4 + +80009ad0 : +80009ad0: 0000e617 auipc x12,0xe +80009ad4: 2b060613 addi x12,x12,688 # 80017d80 +80009ad8: 00162023 sw x1,0(x12) +80009adc: 00000013 addi x0,x0,0 +80009ae0: 0000f517 auipc x10,0xf +80009ae4: 98f50513 addi x10,x10,-1649 # 8001846f +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 +80009b08: 0000e517 auipc x10,0xe +80009b0c: 28052503 lw x10,640(x10) # 80017d88 +80009b10: 02000593 addi x11,x0,32 +80009b14: 1c4000ef jal x1,80009cd8 +80009b18: 00000013 addi x0,x0,0 +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000e517 auipc x10,0xe +80009b24: 28850513 addi x10,x10,648 # 80017da8 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 00000013 addi x0,x0,0 +80009b4c: 00000013 addi x0,x0,0 +80009b50: 00000013 addi x0,x0,0 +80009b54: 00000013 addi x0,x0,0 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000f517 auipc x10,0xf +80009b64: 91f50513 addi x10,x10,-1761 # 8001847f +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 0000e517 auipc x10,0xe +80009b8c: 20852503 lw x10,520(x10) # 80017d90 +80009b90: 02000593 addi x11,x0,32 +80009b94: 144000ef jal x1,80009cd8 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000e517 auipc x10,0xe +80009ba4: 20850513 addi x10,x10,520 # 80017da8 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 00000013 addi x0,x0,0 +80009bcc: 00000013 addi x0,x0,0 +80009bd0: 00000013 addi x0,x0,0 +80009bd4: 00000013 addi x0,x0,0 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000f517 auipc x10,0xf +80009be4: 8af50513 addi x10,x10,-1873 # 8001848f +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 0000e517 auipc x10,0xe +80009c0c: 19052503 lw x10,400(x10) # 80017d98 +80009c10: 02000593 addi x11,x0,32 +80009c14: 0c4000ef jal x1,80009cd8 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000e517 auipc x10,0xe +80009c24: 18850513 addi x10,x10,392 # 80017da8 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 00000013 addi x0,x0,0 +80009c4c: 00000013 addi x0,x0,0 +80009c50: 00000013 addi x0,x0,0 +80009c54: 00000013 addi x0,x0,0 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000f517 auipc x10,0xf +80009c64: 83f50513 addi x10,x10,-1985 # 8001849f +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 0000e517 auipc x10,0xe +80009c8c: 11852503 lw x10,280(x10) # 80017da0 +80009c90: 02000593 addi x11,x0,32 +80009c94: 044000ef jal x1,80009cd8 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000e517 auipc x10,0xe +80009ca4: 10850513 addi x10,x10,264 # 80017da8 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000e617 auipc x12,0xe +80009ccc: 0b860613 addi x12,x12,184 # 80017d80 +80009cd0: 00062083 lw x1,0(x12) +80009cd4: 00008067 jalr x0,0(x1) + +80009cd8 : +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000e617 auipc x12,0xe +80009ce4: 0c860613 addi x12,x12,200 # 80017da8 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 03000693 addi x13,x0,48 +80009d04: 00d60023 sb x13,0(x12) +80009d08: 07800693 addi x13,x0,120 +80009d0c: 00d600a3 sb x13,1(x12) +80009d10: 00260613 addi x12,x12,2 +80009d14: 00058693 addi x13,x11,0 + +80009d18 : +80009d18: ffc68693 addi x13,x13,-4 +80009d1c: 00d55733 srl x14,x10,x13 +80009d20: 00f77713 andi x14,x14,15 +80009d24: 00a00793 addi x15,x0,10 +80009d28: 00f74663 blt x14,x15,80009d34 +80009d2c: 05770713 addi x14,x14,87 +80009d30: 0080006f jal x0,80009d38 + +80009d34 : +80009d34: 03070713 addi x14,x14,48 + +80009d38 : +80009d38: 00e60023 sb x14,0(x12) +80009d3c: 00160613 addi x12,x12,1 +80009d40: fc069ce3 bne x13,x0,80009d18 +80009d44: 00a00693 addi x13,x0,10 +80009d48: 00d60023 sb x13,0(x12) +80009d4c: 000600a3 sb x0,1(x12) +80009d50: 00008067 jalr x0,0(x1) + +80009d54 : +80009d54: 00a00693 addi x13,x0,10 +80009d58: 02d54663 blt x10,x13,80009d84 +80009d5c: ff650513 addi x10,x10,-10 +80009d60: 03100713 addi x14,x0,49 +80009d64: 00d54c63 blt x10,x13,80009d7c +80009d68: ff650513 addi x10,x10,-10 +80009d6c: 03200713 addi x14,x0,50 +80009d70: 00d54663 blt x10,x13,80009d7c +80009d74: ff650513 addi x10,x10,-10 +80009d78: 03300713 addi x14,x0,51 +80009d7c: 00e60023 sb x14,0(x12) +80009d80: 00160613 addi x12,x12,1 +80009d84: 03050513 addi x10,x10,48 +80009d88: 00a60023 sb x10,0(x12) +80009d8c: 00a00693 addi x13,x0,10 +80009d90: 00d600a3 sb x13,1(x12) +80009d94: 00060123 sb x0,2(x12) +80009d98: 00008067 jalr x0,0(x1) +80009d9c: 00000013 addi x0,x0,0 +80009da0: 00000013 addi x0,x0,0 +80009da4: 00000013 addi x0,x0,0 +80009da8: 00000013 addi x0,x0,0 +80009dac: 00000013 addi x0,x0,0 +80009db0: 00000013 addi x0,x0,0 +80009db4: 00000013 addi x0,x0,0 +80009db8: 00000013 addi x0,x0,0 +80009dbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: eb838393 addi x7,x7,-328 # 80007ec0 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: e9c38393 addi x7,x7,-356 # 80007ec0 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: e8438393 addi x7,x7,-380 # 80007ec0 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: e7038393 addi x7,x7,-400 # 80007ec0 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: e6438393 addi x7,x7,-412 # 80007ec0 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e3038393 addi x7,x7,-464 # 80007ec0 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 09030313 addi x6,x6,144 # 8000712c +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e1838393 addi x7,x7,-488 # 80007ec0 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 07830313 addi x6,x6,120 # 8000712c +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e0038393 addi x7,x7,-512 # 80007ec0 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 06030313 addi x6,x6,96 # 8000712c +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: de838393 addi x7,x7,-536 # 80007ec0 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: efc78793 addi x15,x15,-260 # 8000713c +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: fffef117 auipc x2,0xfffef +8002a4a4: 4f010113 addi x2,x2,1264 # 80019990 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: ce018193 addi x3,x3,-800 # 800081c0 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 80018f2f .word 0x80018f2f +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: 95828293 addi x5,x5,-1704 # 80028f00 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: 93828293 addi x5,x5,-1736 # 80028f00 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zksed-sm4ks-00.elf.objdump b/riscv-tests/rv32-Zksed-sm4ks-00.elf.objdump new file mode 100644 index 0000000..1bd7d35 --- /dev/null +++ b/riscv-tests/rv32-Zksed-sm4ks-00.elf.objdump @@ -0,0 +1,19186 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksed/Zksed-sm4ks-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksed/Zksed-sm4ks-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00029640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003c memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00009dc0 memsz 0x00009dc0 flags r-x + LOAD off 0x0000b000 vaddr 0x8000c000 paddr 0x8000c000 align 2**12 + filesz 0x0001e640 memsz 0x0001e640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009d80 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0001ce60 8000c000 8000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80028f00 80028f00 00027f00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 8002a000 8002a000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003c 00000000 00000000 00029640 2**0 + CONTENTS, READONLY + 6 .debug_line 00003ed0 00000000 00000000 0002967c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 00000000 00000000 0002d54c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 0002d5c9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 0002d5ec 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 0002d600 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 00000000 00000000 0002d628 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001b 00000000 00000000 0002d6b3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +8000c000 l d .data 00000000 .data +80028f00 l d .tohost 00000000 .tohost +8002a000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccyNVocs.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +8002a0e4 l .text.rvmodel 00000000 rvmodel_boot +80000050 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b0 +800081c0 l .text.rvtest 00000000 failedtest_x5_x4 +8000d810 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b0_str +8000007c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b1 +8000d843 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b1_str +800000ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b2 +8000d876 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b2_str +800000dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b3 +8000d8a9 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b3_str +80000110 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b4 +800081d8 l .text.rvtest 00000000 failedtest_x8_x7 +8000d8dc l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b4_str +8000013c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b5 +8000d90f l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b5_str +8000016c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b6 +8000d942 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b6_str +800001a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b7 +8000d975 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b7_str +800001cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b8 +8000d9a8 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b8_str +800001f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b9 +8000d9db l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b9_str +80000224 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b10 +8000da0f l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b10_str +80000250 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b11 +8000da44 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b11_str +8000027c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b12 +8000da79 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b12_str +800002a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b13 +8000daae l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b13_str +800002d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b14 +8000dae3 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b14_str +80000300 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b15 +8000db18 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b15_str +8000032c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b16 +8000db4d l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b16_str +80000358 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b17 +8000db82 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b17_str +80000388 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b18 +8000dbb7 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b18_str +800003b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b19 +8000dbec l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b19_str +800003e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b20 +8000dc21 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b20_str +80000410 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b21 +8000dc56 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b21_str +8000043c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b22 +8000dc8b l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b22_str +80000468 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b23 +8000dcc0 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b23_str +80000494 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b24 +8000dcf5 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b24_str +800004c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b25 +8000dd2a l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b25_str +800004f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b26 +8000dd5f l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b26_str +8000051c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b27 +8000dd94 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b27_str +80000548 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b28 +8000ddc9 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b28_str +80000578 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b29 +8000ddfe l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b29_str +800005a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b30 +8000de33 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b30_str +800005d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_b31 +8000de68 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_b31_str +800005fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b0 +8000de9d l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b0_str +80000628 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b1 +8000ded1 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b1_str +80000654 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b2 +8000df05 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b2_str +80000680 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b3 +8000df39 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b3_str +800006b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b4 +8000df6d l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b4_str +800006e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b5 +8000dfa1 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b5_str +8000070c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b6 +8000dfd5 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b6_str +80000740 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b7 +80008200 l .text.rvtest 00000000 failedtest_x14_x13 +8000e009 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b7_str +8000076c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b8 +8000e03d l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b8_str +80000798 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b9 +8000e071 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b9_str +800007c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b10 +8000e0a5 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b10_str +800007f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b11 +8000e0da l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b11_str +8000081c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b12 +8000e10f l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b12_str +80000850 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b13 +8000e144 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b13_str +8000087c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b14 +8000e179 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b14_str +800008a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b15 +8000e1ae l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b15_str +800008d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b16 +8000e1e3 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b16_str +80000904 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b17 +8000e218 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b17_str +80000930 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b18 +8000e24d l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b18_str +8000095c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b19 +8000e282 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b19_str +8000098c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b20 +8000e2b7 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b20_str +800009b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b21 +8000e2ec l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b21_str +800009e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b22 +8000e321 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b22_str +80000a10 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b23 +8000e356 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b23_str +80000a3c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b24 +8000e38b l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b24_str +80000a68 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b25 +8000e3c0 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b25_str +80000a94 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b26 +8000e3f5 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b26_str +80000ac0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b27 +8000e42a l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b27_str +80000af0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b28 +8000e45f l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b28_str +80000b1c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b29 +8000e494 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b29_str +80000b4c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b30 +8000e4c9 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b30_str +80000b78 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_b31 +8000e4fe l .data 00000000 Zksed_sm4ks_cg_cp_rs2_b31_str +80000ba4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b0 +8000e533 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b0_str +80000bd0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b1 +8000e566 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b1_str +80000bfc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b2 +8000e599 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b2_str +80000c2c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b3 +8000e5cc l .data 00000000 Zksed_sm4ks_cg_cp_rd_b3_str +80000c60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b4 +8000e5ff l .data 00000000 Zksed_sm4ks_cg_cp_rd_b4_str +80000c8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b5 +8000e632 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b5_str +80000cb8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b6 +8000e665 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b6_str +80000cec l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b7 +8000e698 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b7_str +80000d18 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b8 +8000e6cb l .data 00000000 Zksed_sm4ks_cg_cp_rd_b8_str +80000d44 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b9 +8000e6fe l .data 00000000 Zksed_sm4ks_cg_cp_rd_b9_str +80000d70 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b10 +8000e731 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b10_str +80000d9c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b11 +8000e765 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b11_str +80000dc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b12 +8000e799 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b12_str +80000dfc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b13 +8000e7cd l .data 00000000 Zksed_sm4ks_cg_cp_rd_b13_str +80000e28 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b14 +8000e801 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b14_str +80000e54 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b15 +8000e835 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b15_str +80000e84 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b16 +8000e869 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b16_str +80000eb0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b17 +8000e89d l .data 00000000 Zksed_sm4ks_cg_cp_rd_b17_str +80000edc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b18 +8000e8d1 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b18_str +80000f08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b19 +8000e905 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b19_str +80000f34 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b20 +8000e939 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b20_str +80000f60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b21 +8000e96d l .data 00000000 Zksed_sm4ks_cg_cp_rd_b21_str +80000f8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b22 +8000e9a1 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b22_str +80000fb8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b23 +8000e9d5 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b23_str +80000fe4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b24 +8000ea09 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b24_str +80001014 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b25 +8000ea3d l .data 00000000 Zksed_sm4ks_cg_cp_rd_b25_str +80001040 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b26 +8000ea71 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b26_str +8000106c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b27 +8000eaa5 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b27_str +80001098 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b28 +8000ead9 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b28_str +800010c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b29 +8000eb0d l .data 00000000 Zksed_sm4ks_cg_cp_rd_b29_str +800010f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b30 +8000eb41 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b30_str +8000111c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rd_b31 +8000eb75 l .data 00000000 Zksed_sm4ks_cg_cp_rd_b31_str +80001148 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x0 +8000eba9 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x0_str +80001174 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x1 +8000ebe4 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x1_str +800011a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x2 +8000ec1f l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x2_str +800011cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x80000000 +8000ec5a l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x80000000_str +800011f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x80000001 +8000ec9d l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x80000001_str +80001224 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffff +8000ece0 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffff_str +80001250 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffe +8000ed23 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffe_str +8000127c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff +8000ed66 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff_str +800012a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe +8000eda9 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe_str +800012d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc8872 +8000edec l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc8872_str +80001300 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaa +8000ee2f l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaa_str +8000132c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x55555555 +8000ee72 l .data 00000000 Zksed_sm4ks_cg_cp_rs1_edges_0x55555555_str +80001358 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x0 +8000eeb5 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x0_str +80001384 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x1 +8000eef1 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x1_str +800013b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x2 +8000ef2d l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x2_str +800013dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x80000000 +8000ef69 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x80000000_str +80001408 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x80000001 +8000efac l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x80000001_str +80001434 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffff +8000efef l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffff_str +80001460 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffe +8000f032 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffe_str +8000148c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff +8000f075 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff_str +800014b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe +8000f0b8 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe_str +800014e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc8872 +8000f0fb l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc8872_str +80001510 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaa +8000f13e l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaa_str +8000153c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x55555555 +8000f181 l .data 00000000 Zksed_sm4ks_cg_cp_rs2_edges_0x55555555_str +80001568 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0 +8000f1c4 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str +80001594 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1 +8000f217 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str +800015c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2 +8000f26a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str +800015ec l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000 +8000f2bd l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str +80001618 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001 +8000f317 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str +80001644 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff +8000f371 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str +80001670 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe +8000f3cb l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str +8000169c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff +8000f425 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str +800016c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe +8000f47f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str +800016f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872 +8000f4d9 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str +80001720 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa +8000f533 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str +8000174c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555 +8000f58d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str +80001778 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0 +8000f5e7 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str +800017a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1 +8000f63a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str +800017d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2 +8000f68d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str +800017fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000 +8000f6e0 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str +80001828 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001 +8000f73a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str +80001854 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff +8000f794 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str +80001880 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe +8000f7ee l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str +800018ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff +8000f848 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str +800018d8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe +8000f8a2 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str +80001904 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872 +8000f8fc l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str +80001930 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa +8000f956 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str +8000195c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555 +8000f9b0 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str +80001988 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0 +8000fa0a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str +800019b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1 +8000fa5d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str +800019e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2 +8000fab0 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str +80001a0c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000 +8000fb03 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str +80001a38 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001 +8000fb5d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str +80001a64 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff +8000fbb7 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str +80001a90 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe +8000fc11 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str +80001abc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff +8000fc6b l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str +80001ae8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe +8000fcc5 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str +80001b14 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872 +8000fd1f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str +80001b40 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa +8000fd79 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str +80001b6c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555 +8000fdd3 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str +80001b98 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0 +8000fe2d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str +80001bc4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1 +8000fe87 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str +80001bf0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2 +8000fee1 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str +80001c1c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000 +8000ff3b l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str +80001c48 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001 +8000ff9c l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str +80001c74 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff +8000fffd l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str +80001ca0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe +8001005e l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str +80001ccc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff +800100bf l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str +80001cf8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe +80010120 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str +80001d24 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872 +80010181 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str +80001d50 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa +800101e2 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str +80001d7c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555 +80010243 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str +80001da8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0 +800102a4 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str +80001dd4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1 +800102fe l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str +80001e00 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2 +80010358 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str +80001e2c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000 +800103b2 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str +80001e58 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001 +80010413 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str +80001e84 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff +80010474 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str +80001eb0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe +800104d5 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str +80001edc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff +80010536 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str +80001f08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe +80010597 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str +80001f34 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872 +800105f8 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str +80001f60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa +80010659 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str +80001f8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555 +800106ba l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str +80001fb8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0 +8001071b l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str +80001fe4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1 +80010775 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str +80002010 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2 +800107cf l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str +8000203c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000 +80010829 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str +80002068 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001 +8001088a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str +80002094 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff +800108eb l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str +800020c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe +8001094c l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str +800020ec l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff +800109ad l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str +80002118 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe +80010a0e l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str +80002144 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872 +80010a6f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str +80002170 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa +80010ad0 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str +8000219c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555 +80010b31 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str +800021c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0 +80010b92 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str +800021f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1 +80010bec l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str +80002220 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2 +80010c46 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str +8000224c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000 +80010ca0 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str +80002278 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001 +80010d01 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str +800022a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff +80010d62 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str +800022d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe +80010dc3 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str +800022fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff +80010e24 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str +80002328 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe +80010e85 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str +80002354 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872 +80010ee6 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str +80002380 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa +80010f47 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str +800023ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555 +80010fa8 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str +800023d8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +80011009 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +80002404 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +80011063 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +80002430 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +800110bd l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +8000245c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000 +80011117 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str +80002488 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001 +80011178 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str +800024b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff +800111d9 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str +800024e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe +8001123a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str +8000250c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +8001129b l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +80002538 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +800112fc l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +80002564 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872 +8001135d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str +80002590 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa +800113be l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str +800025bc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555 +8001141f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str +800025e8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +80011480 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +80002614 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +800114da l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +80002640 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +80011534 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +8000266c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000 +8001158e l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str +80002698 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001 +800115ef l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str +800026c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff +80011650 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str +800026f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe +800116b1 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str +8000271c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +80011712 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +80002748 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +80011773 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +80002774 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872 +800117d4 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str +800027a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa +80011835 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str +800027cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555 +80011896 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str +800027f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0 +800118f7 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str +80002824 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1 +80011951 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str +80002850 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2 +800119ab l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str +8000287c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000 +80011a05 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str +800028a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001 +80011a66 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str +800028d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff +80011ac7 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str +80002900 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe +80011b28 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str +8000292c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff +80011b89 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str +80002958 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe +80011bea l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str +80002984 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872 +80011c4b l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str +800029b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa +80011cac l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str +800029dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555 +80011d0d l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str +80002a08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0 +80011d6e l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str +80002a34 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1 +80011dc8 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str +80002a60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2 +80011e22 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str +80002a8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000 +80011e7c l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str +80002ab8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001 +80011edd l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str +80002ae4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff +80011f3e l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str +80002b10 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe +80011f9f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str +80002b3c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff +80012000 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str +80002b68 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe +80012061 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str +80002b94 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872 +800120c2 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str +80002bc0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa +80012123 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str +80002bec l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555 +80012184 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str +80002c18 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0 +800121e5 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str +80002c44 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1 +8001223f l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str +80002c70 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2 +80012299 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str +80002c9c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000 +800122f3 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str +80002cc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001 +80012354 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str +80002cf4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff +800123b5 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str +80002d20 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe +80012416 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str +80002d4c l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff +80012477 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str +80002d78 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe +800124d8 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str +80002da4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872 +80012539 l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str +80002dd0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa +8001259a l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str +80002dfc l .text.rvtest 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555 +800125fb l .data 00000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str +80002e28 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b0 +8001265c l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b0_str +80002e54 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b1 +80012696 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b1_str +80002e80 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b2 +800126d0 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b2_str +80002eb0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b3 +8001270a l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b3_str +80002edc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b4 +80012744 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b4_str +80002f08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b5 +8001277e l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b5_str +80002f38 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b6 +800127b8 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b6_str +80002f6c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b7 +800127f2 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b7_str +80002f98 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b8 +8001282c l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b8_str +80002fc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b9 +80012866 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b9_str +80002ff4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b10 +800128a0 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b10_str +80003020 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b11 +800128db l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b11_str +8000304c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b12 +80012916 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b12_str +80003078 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b13 +80012951 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b13_str +800030a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b14 +8001298c l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b14_str +800030d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b15 +800129c7 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b15_str +800030fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b16 +80012a02 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b16_str +80003128 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b17 +80012a3d l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b17_str +80003158 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b18 +80012a78 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b18_str +80003184 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b19 +80012ab3 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b19_str +800031b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b20 +80012aee l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b20_str +800031dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b21 +80012b29 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b21_str +80003208 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b22 +80012b64 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b22_str +80003234 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b23 +80012b9f l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b23_str +80003260 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b24 +80012bda l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b24_str +8000328c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b25 +80012c15 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b25_str +800032b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b26 +80012c50 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b26_str +800032e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b27 +80012c8b l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b27_str +80003310 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b28 +80012cc6 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b28_str +8000333c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b29 +80012d01 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b29_str +80003368 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b30 +80012d3c l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b30_str +80003398 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b31 +80012d77 l .data 00000000 Zksed_sm4ks_cg_cmp_rs1_rs2_b31_str +800033c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b0 +80012db2 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b0_str +800033f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b1 +80012deb l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b1_str +80003420 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b2 +80012e24 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b2_str +8000344c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b3 +80012e5d l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b3_str +80003480 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b4 +80012e96 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b4_str +800034ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b5 +80012ecf l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b5_str +800034d8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b6 +80012f08 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b6_str +80003504 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b7 +80012f41 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b7_str +80003530 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b8 +80012f7a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b8_str +8000355c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b9 +80012fb3 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b9_str +8000358c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b10 +80012fec l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b10_str +800035b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b11 +80013026 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b11_str +800035e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b12 +80013060 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b12_str +80003618 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b13 +8001309a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b13_str +80003644 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b14 +800130d4 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b14_str +80003670 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b15 +8001310e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b15_str +8000369c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b16 +80013148 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b16_str +800036c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b17 +80013182 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b17_str +800036f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b18 +800131bc l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b18_str +80003720 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b19 +800131f6 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b19_str +8000374c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b20 +80013230 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b20_str +80003778 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b21 +8001326a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b21_str +800037a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b22 +800132a4 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b22_str +800037d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b23 +800132de l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b23_str +800037fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b24 +80013318 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b24_str +80003828 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b25 +80013352 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b25_str +80003854 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b26 +8001338c l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b26_str +80003880 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b27 +800133c6 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b27_str +800038ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b28 +80013400 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b28_str +800038dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b29 +8001343a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b29_str +80003908 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b30 +80013474 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b30_str +80003938 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b31 +800134ae l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_b31_str +80003964 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b0 +800134e8 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b0_str +80003990 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b1 +80013521 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b1_str +800039bc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b2 +8001355a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b2_str +800039e8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b3 +80013593 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b3_str +80003a1c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b4 +800135cc l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b4_str +80003a48 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b5 +80013605 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b5_str +80003a74 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b6 +8001363e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b6_str +80003aa0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b7 +80013677 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b7_str +80003acc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b8 +800136b0 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b8_str +80003afc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b9 +800136e9 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b9_str +80003b28 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b10 +80013722 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b10_str +80003b54 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b11 +8001375c l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b11_str +80003b80 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b12 +80013796 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b12_str +80003bb4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b13 +800137d0 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b13_str +80003be0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b14 +8001380a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b14_str +80003c0c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b15 +80013844 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b15_str +80003c38 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b16 +8001387e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b16_str +80003c64 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b17 +800138b8 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b17_str +80003c90 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b18 +800138f2 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b18_str +80003cc0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b19 +8001392c l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b19_str +80003cec l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b20 +80013966 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b20_str +80003d18 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b21 +800139a0 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b21_str +80003d44 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b22 +800139da l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b22_str +80003d70 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b23 +80013a14 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b23_str +80003d9c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b24 +80013a4e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b24_str +80003dc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b25 +80013a88 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b25_str +80003df4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b26 +80013ac2 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b26_str +80003e20 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b27 +80013afc l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b27_str +80003e4c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b28 +80013b36 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b28_str +80003e78 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b29 +80013b70 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b29_str +80003ea4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b30 +80013baa l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b30_str +80003ed0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b31 +80013be4 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs2_b31_str +80003efc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0 +80013c1e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0_str +80003f2c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1 +80013c5b l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1_str +80003f58 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2 +80013c98 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2_str +80003f84 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3 +80013cd5 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3_str +80003fb0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4 +80013d12 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4_str +80003fdc l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5 +80013d4f l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5_str +80004008 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6 +80013d8c l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6_str +8000403c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7 +80013dc9 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7_str +80004068 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8 +80013e06 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8_str +80004094 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9 +80013e43 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9_str +800040c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10 +80013e80 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10_str +800040ec l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11 +80013ebe l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11_str +80004118 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12 +80013efc l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12_str +80004144 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13 +80013f3a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13_str +80004170 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14 +80013f78 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14_str +8000419c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15 +80013fb6 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15_str +800041c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16 +80013ff4 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16_str +800041f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17 +80014032 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17_str +80004224 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18 +80014070 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18_str +80004250 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19 +800140ae l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19_str +8000427c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20 +800140ec l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20_str +800042a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21 +8001412a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21_str +800042d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22 +80014168 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22_str +80004304 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23 +800141a6 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23_str +80004330 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24 +800141e4 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24_str +8000435c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25 +80014222 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25_str +80004388 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26 +80014260 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26_str +800043b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27 +8001429e l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27_str +800043e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28 +800142dc l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28_str +8000440c l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29 +8001431a l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29_str +80004438 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30 +80014358 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30_str +80004464 l .text.rvtest 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31 +80014396 l .data 00000000 Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31_str +80004490 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_bs_b0 +800143d4 l .data 00000000 Zksed_sm4ks_cg_cp_bs_b0_str +800044bc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_bs_b1 +80014408 l .data 00000000 Zksed_sm4ks_cg_cp_bs_b1_str +800044e8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_bs_b2 +8001443c l .data 00000000 Zksed_sm4ks_cg_cp_bs_b2_str +80004514 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_bs_b3 +80014470 l .data 00000000 Zksed_sm4ks_cg_cp_bs_b3_str +80004540 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b0 +800144a4 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b0_str +8000456c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b1 +800144da l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b1_str +80004598 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b2 +80014510 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b2_str +800045c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b3 +80014546 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b3_str +800045f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b4 +8001457c l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b4_str +8000461c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b5 +800145b2 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b5_str +80004648 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b6 +800145e8 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b6_str +80004674 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b7 +8001461e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b7_str +800046a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b8 +80014654 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b8_str +800046cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b9 +8001468a l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b9_str +800046f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b10 +800146c0 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b10_str +80004724 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b11 +800146f7 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b11_str +80004750 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b12 +8001472e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b12_str +8000477c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b13 +80014765 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b13_str +800047a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b14 +8001479c l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b14_str +800047d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b15 +800147d3 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b15_str +80004800 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b16 +8001480a l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b16_str +8000482c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b17 +80014841 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b17_str +80004858 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b18 +80014878 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b18_str +80004884 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b19 +800148af l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b19_str +800048b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b20 +800148e6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b20_str +800048dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b21 +8001491d l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b21_str +80004908 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b22 +80014954 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b22_str +80004934 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b23 +8001498b l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b23_str +80004960 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b24 +800149c2 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b24_str +8000498c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b25 +800149f9 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b25_str +800049b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b26 +80014a30 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b26_str +800049e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b27 +80014a67 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b27_str +80004a10 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b28 +80014a9e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b28_str +80004a3c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b29 +80014ad5 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b29_str +80004a68 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b30 +80014b0c l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b30_str +80004a94 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b31 +80014b43 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b31_str +80004ac0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b32 +80014b7a l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b32_str +80004aec l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b33 +80014bb1 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b33_str +80004b18 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b34 +80014be8 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b34_str +80004b44 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b35 +80014c1f l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b35_str +80004b70 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b36 +80014c56 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b36_str +80004b9c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b37 +80014c8d l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b37_str +80004bc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b38 +80014cc4 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b38_str +80004bf4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b39 +80014cfb l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b39_str +80004c20 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b40 +80014d32 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b40_str +80004c4c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b41 +80014d69 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b41_str +80004c78 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b42 +80014da0 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b42_str +80004ca4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b43 +80014dd7 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b43_str +80004cd0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b44 +80014e0e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b44_str +80004cfc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b45 +80014e45 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b45_str +80004d28 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b46 +80014e7c l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b46_str +80004d54 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b47 +80014eb3 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b47_str +80004d80 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b48 +80014eea l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b48_str +80004dac l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b49 +80014f21 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b49_str +80004dd8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b50 +80014f58 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b50_str +80004e04 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b51 +80014f8f l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b51_str +80004e30 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b52 +80014fc6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b52_str +80004e5c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b53 +80014ffd l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b53_str +80004e88 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b54 +80015034 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b54_str +80004eb4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b55 +8001506b l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b55_str +80004ee0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b56 +800150a2 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b56_str +80004f0c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b57 +800150d9 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b57_str +80004f38 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b58 +80015110 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b58_str +80004f64 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b59 +80015147 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b59_str +80004f90 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b60 +8001517e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b60_str +80004fbc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b61 +800151b5 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b61_str +80004fe8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b62 +800151ec l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b62_str +80005014 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b63 +80015223 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b63_str +80005040 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b64 +8001525a l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b64_str +8000506c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b65 +80015291 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b65_str +80005098 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b66 +800152c8 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b66_str +800050c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b67 +800152ff l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b67_str +800050f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b68 +80015336 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b68_str +8000511c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b69 +8001536d l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b69_str +80005148 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b70 +800153a4 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b70_str +80005174 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b71 +800153db l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b71_str +800051a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b72 +80015412 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b72_str +800051cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b73 +80015449 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b73_str +800051f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b74 +80015480 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b74_str +80005224 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b75 +800154b7 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b75_str +80005250 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b76 +800154ee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b76_str +8000527c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b77 +80015525 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b77_str +800052a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b78 +8001555c l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b78_str +800052d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b79 +80015593 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b79_str +80005300 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b80 +800155ca l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b80_str +8000532c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b81 +80015601 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b81_str +80005358 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b82 +80015638 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b82_str +80005384 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b83 +8001566f l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b83_str +800053b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b84 +800156a6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b84_str +800053dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b85 +800156dd l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b85_str +80005408 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b86 +80015714 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b86_str +80005434 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b87 +8001574b l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b87_str +80005460 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b88 +80015782 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b88_str +8000548c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b89 +800157b9 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b89_str +800054b8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b90 +800157f0 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b90_str +800054e4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b91 +80015827 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b91_str +80005510 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b92 +8001585e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b92_str +8000553c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b93 +80015895 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b93_str +80005568 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b94 +800158cc l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b94_str +80005594 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b95 +80015903 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b95_str +800055c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b96 +8001593a l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b96_str +800055ec l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b97 +80015971 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b97_str +80005618 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b98 +800159a8 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b98_str +80005644 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b99 +800159df l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b99_str +80005670 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b100 +80015a16 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b100_str +8000569c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b101 +80015a4e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b101_str +800056c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b102 +80015a86 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b102_str +800056f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b103 +80015abe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b103_str +80005720 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b104 +80015af6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b104_str +8000574c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b105 +80015b2e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b105_str +80005778 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b106 +80015b66 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b106_str +800057a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b107 +80015b9e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b107_str +800057d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b108 +80015bd6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b108_str +800057fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b109 +80015c0e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b109_str +80005828 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b110 +80015c46 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b110_str +80005854 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b111 +80015c7e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b111_str +80005880 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b112 +80015cb6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b112_str +800058ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b113 +80015cee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b113_str +800058d8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b114 +80015d26 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b114_str +80005904 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b115 +80015d5e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b115_str +80005930 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b116 +80015d96 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b116_str +8000595c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b117 +80015dce l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b117_str +80005988 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b118 +80015e06 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b118_str +800059b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b119 +80015e3e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b119_str +800059e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b120 +80015e76 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b120_str +80005a0c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b121 +80015eae l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b121_str +80005a38 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b122 +80015ee6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b122_str +80005a64 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b123 +80015f1e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b123_str +80005a90 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b124 +80015f56 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b124_str +80005abc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b125 +80015f8e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b125_str +80005ae8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b126 +80015fc6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b126_str +80005b14 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b127 +80015ffe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b127_str +80005b40 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b128 +80016036 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b128_str +80005b6c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b129 +8001606e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b129_str +80005b98 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b130 +800160a6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b130_str +80005bc4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b131 +800160de l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b131_str +80005bf0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b132 +80016116 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b132_str +80005c1c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b133 +8001614e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b133_str +80005c48 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b134 +80016186 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b134_str +80005c74 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b135 +800161be l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b135_str +80005ca0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b136 +800161f6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b136_str +80005ccc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b137 +8001622e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b137_str +80005cf8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b138 +80016266 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b138_str +80005d24 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b139 +8001629e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b139_str +80005d50 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b140 +800162d6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b140_str +80005d7c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b141 +8001630e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b141_str +80005da8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b142 +80016346 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b142_str +80005dd4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b143 +8001637e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b143_str +80005e00 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b144 +800163b6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b144_str +80005e2c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b145 +800163ee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b145_str +80005e58 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b146 +80016426 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b146_str +80005e84 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b147 +8001645e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b147_str +80005eb0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b148 +80016496 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b148_str +80005edc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b149 +800164ce l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b149_str +80005f08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b150 +80016506 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b150_str +80005f34 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b151 +8001653e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b151_str +80005f60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b152 +80016576 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b152_str +80005f8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b153 +800165ae l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b153_str +80005fb8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b154 +800165e6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b154_str +80005fe4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b155 +8001661e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b155_str +80006010 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b156 +80016656 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b156_str +8000603c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b157 +8001668e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b157_str +80006068 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b158 +800166c6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b158_str +80006094 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b159 +800166fe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b159_str +800060c0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b160 +80016736 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b160_str +800060ec l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b161 +8001676e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b161_str +80006118 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b162 +800167a6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b162_str +80006144 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b163 +800167de l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b163_str +80006170 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b164 +80016816 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b164_str +8000619c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b165 +8001684e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b165_str +800061c8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b166 +80016886 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b166_str +800061f4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b167 +800168be l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b167_str +80006220 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b168 +800168f6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b168_str +8000624c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b169 +8001692e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b169_str +80006278 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b170 +80016966 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b170_str +800062a4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b171 +8001699e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b171_str +800062d0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b172 +800169d6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b172_str +800062fc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b173 +80016a0e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b173_str +80006328 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b174 +80016a46 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b174_str +80006354 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b175 +80016a7e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b175_str +80006380 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b176 +80016ab6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b176_str +800063ac l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b177 +80016aee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b177_str +800063d8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b178 +80016b26 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b178_str +80006404 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b179 +80016b5e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b179_str +80006430 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b180 +80016b96 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b180_str +8000645c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b181 +80016bce l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b181_str +80006488 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b182 +80016c06 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b182_str +800064b4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b183 +80016c3e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b183_str +800064e0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b184 +80016c76 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b184_str +8000650c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b185 +80016cae l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b185_str +80006538 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b186 +80016ce6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b186_str +80006564 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b187 +80016d1e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b187_str +80006590 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b188 +80016d56 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b188_str +800065bc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b189 +80016d8e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b189_str +800065e8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b190 +80016dc6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b190_str +80006614 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b191 +80016dfe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b191_str +80006640 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b192 +80016e36 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b192_str +8000666c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b193 +80016e6e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b193_str +80006698 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b194 +80016ea6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b194_str +800066c4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b195 +80016ede l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b195_str +800066f0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b196 +80016f16 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b196_str +8000671c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b197 +80016f4e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b197_str +80006748 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b198 +80016f86 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b198_str +80006774 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b199 +80016fbe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b199_str +800067a0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b200 +80016ff6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b200_str +800067cc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b201 +8001702e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b201_str +800067f8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b202 +80017066 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b202_str +80006824 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b203 +8001709e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b203_str +80006850 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b204 +800170d6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b204_str +8000687c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b205 +8001710e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b205_str +800068a8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b206 +80017146 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b206_str +800068d4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b207 +8001717e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b207_str +80006900 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b208 +800171b6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b208_str +8000692c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b209 +800171ee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b209_str +80006958 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b210 +80017226 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b210_str +80006984 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b211 +8001725e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b211_str +800069b0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b212 +80017296 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b212_str +800069dc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b213 +800172ce l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b213_str +80006a08 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b214 +80017306 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b214_str +80006a34 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b215 +8001733e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b215_str +80006a60 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b216 +80017376 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b216_str +80006a8c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b217 +800173ae l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b217_str +80006ab8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b218 +800173e6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b218_str +80006ae4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b219 +8001741e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b219_str +80006b10 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b220 +80017456 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b220_str +80006b3c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b221 +8001748e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b221_str +80006b68 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b222 +800174c6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b222_str +80006b94 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b223 +800174fe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b223_str +80006bc0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b224 +80017536 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b224_str +80006bec l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b225 +8001756e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b225_str +80006c18 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b226 +800175a6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b226_str +80006c44 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b227 +800175de l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b227_str +80006c70 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b228 +80017616 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b228_str +80006c9c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b229 +8001764e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b229_str +80006cc8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b230 +80017686 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b230_str +80006cf4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b231 +800176be l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b231_str +80006d20 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b232 +800176f6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b232_str +80006d4c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b233 +8001772e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b233_str +80006d78 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b234 +80017766 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b234_str +80006da4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b235 +8001779e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b235_str +80006dd0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b236 +800177d6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b236_str +80006dfc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b237 +8001780e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b237_str +80006e28 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b238 +80017846 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b238_str +80006e54 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b239 +8001787e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b239_str +80006e80 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b240 +800178b6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b240_str +80006eac l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b241 +800178ee l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b241_str +80006ed8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b242 +80017926 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b242_str +80006f04 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b243 +8001795e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b243_str +80006f30 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b244 +80017996 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b244_str +80006f5c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b245 +800179ce l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b245_str +80006f88 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b246 +80017a06 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b246_str +80006fb4 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b247 +80017a3e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b247_str +80006fe0 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b248 +80017a76 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b248_str +8000700c l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b249 +80017aae l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b249_str +80007038 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b250 +80017ae6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b250_str +80007064 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b251 +80017b1e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b251_str +80007090 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b252 +80017b56 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b252_str +800070bc l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b253 +80017b8e l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b253_str +800070e8 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b254 +80017bc6 l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b254_str +80007114 l .text.rvtest 00000000 Zksed_sm4ks_cg_cp_sbox_b255 +80017bfe l .data 00000000 Zksed_sm4ks_cg_cp_sbox_b255_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80007144 l .text.rvtest 00000000 exit_Mcleanup +80007148 l .text.rvtest 00000000 resto_Medeleg +80007150 l .text.rvtest 00000000 resto_Msatp +80007154 l .text.rvtest 00000000 resto_Mscratch +8000715c l .text.rvtest 00000000 resto_Mxtvec +80007170 l .text.rvtest 00000000 resto_Mtramp +80007174 l .text.rvtest 00000000 resto_Mloop +8000718c l .text.rvtest 00000000 check_trap_sig_overflow +80007430 l .text.rvtest 00000000 trap_sig_overflow +800072d0 l .text.rvtest 00000000 check_trap_sig_offset +800182c0 l .data 00000000 failstr +8002a564 l .text.rvmodel 00000000 rvmodel_io_write_str +800182fb l .data 00000000 begin_debugstr +8001835b l .data 00000000 trap_sig_overflowstr +80018f06 l .data 00000000 endstr +8002a5c4 l .text.rvmodel 00000000 rvmodel_halt_fail +8000c328 l .data 00000000 Mtrap_sig +8001a3f8 l .data 00000000 trap_sigptr +8001a3f0 l .data 00000000 final_trap_sig_offset +80007394 l .text.rvtest 00000000 check_abort_test +80008228 l .text.rvtest 00000000 failedtest_trap_x7_x9 +800184af l .data 00000000 trap_sig_offset_mismatch +800073b0 l .text.rvtest 00000000 exit_cleanup +80007464 l .text.rvtest 00000000 abort_test +8001831d l .data 00000000 abortstr +80018284 l .data 00000000 successstr +8002a5a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +80007500 l .text.rvtest 00000000 trap_Mhandler +80007620 l .text.rvtest 00000000 rvtest_Mendtest +80007644 l .text.rvtest 00000000 common_Mhandler +800076b0 l .text.rvtest 00000000 spcl_M2mmode_test +800076bc l .text.rvtest 00000000 spcl_Mchk4alt +800076cc l .text.rvtest 00000000 spcl_Mchk4ecall +800076c4 l .text.rvtest 00000000 spcl_Mparam_chk +80008150 l .text.rvtest 00000000 Mrtn2mmode +80007c54 l .text.rvtest 00000000 Mtrapsig_ptr_upd +800076d8 l .text.rvtest 00000000 Mgoto_mchk +800076dc l .text.rvtest 00000000 tsbi_Mdispatch +80007704 l .text.rvtest 00000000 tsbi_Mgoto_mode +800076f4 l .text.rvtest 00000000 tsbi_Mecall_test +80007770 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80007ec0 l .text.rvtest 00000000 resto_Mrtn +80007730 l .text.rvtest 00000000 tsbi_Mgoto_m +80007740 l .text.rvtest 00000000 tsbi_Mgoto_s +8000775c l .text.rvtest 00000000 tsbi_Mgoto_u +8000776c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800078f0 l .text.rvtest 00000000 tsbi_instr_table +800077a0 l .text.rvtest 00000000 tsbi_instr_table_search_loop +800077b4 l .text.rvtest 00000000 found_instr +800077f8 l .text.rvtest 00000000 tsbi_instr_not_found +800077e4 l .text.rvtest 00000000 tsbi_instr_rtn +8001993d l .data 00000000 tsbi_instr_not_found_str +80009cd8 l .text.rvtest 00000000 failedtest_hex_to_str +80017da8 l .data 00000000 ascii_buffer +800183c4 l .data 00000000 newlinestr +80007c70 l .text.rvtest 00000000 Mxcpt_sig_sv +80007c5c l .text.rvtest 00000000 Mint_sig_sv +80007c70 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80017d88 l .data 00000000 saved_xepc +80028e5c l .data 00000000 sig_end_canary +80007d08 l .text.rvtest 00000000 sv_Mvect +800184c6 l .data 00000000 sv_Mvect_str +80007dac l .text.rvtest 00000000 sv_Mcause +800185c8 l .data 00000000 sv_Mcause_str +80007ee0 l .text.rvtest 00000000 common_Mint_handler +80007dd4 l .text.rvtest 00000000 common_Mexcpt_handler +80007de0 l .text.rvtest 00000000 vmem_adj_Mepc +80007e34 l .text.rvtest 00000000 sv_Mepc +80007e08 l .text.rvtest 00000000 code_adj_Mepc +80007e30 l .text.rvtest 00000000 adj_Mepc +80007e1c l .text.rvtest 00000000 data_adj_Mepc +800186c3 l .data 00000000 sv_Mepc_str +80007e54 l .text.rvtest 00000000 skpsv_Mepc +80007e7c l .text.rvtest 00000000 adj_Mepc_rtn +80007e88 l .text.rvtest 00000000 skp_adj_Mepc +80007e8c l .text.rvtest 00000000 sv_Mtval +800187b6 l .data 00000000 sv_Mtval_str +80007eac l .text.rvtest 00000000 skp_Mtval +80007eb8 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80007f18 l .text.rvtest 00000000 spcl_Mhandler +80007ef4 l .text.rvtest 00000000 sv_Mip +80018929 l .data 00000000 sv_Mip_str +80007f34 l .text.rvtest 00000000 spcl_Mdispatch_handling +80007f4c l .text.rvtest 00000000 spcl_Mdispatch +80007f50 l .text.rvtest 00000000 clrint_Mtbl +8002a000 l .text.rvmodel 00000000 Mclr_Msw_int +8002a014 l .text.rvmodel 00000000 Mclr_Mtmr_int +8002a030 l .text.rvmodel 00000000 Mclr_Mext_int +80008050 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +8002a048 l .text.rvmodel 00000000 Mclr_Ssw_int +8002a05c l .text.rvmodel 00000000 Mclr_Stmr_int +8002a068 l .text.rvmodel 00000000 Mclr_Sext_int +8002a09c l .text.rvmodel 00000000 Mclr_Vsw_int +8002a0b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +8002a0cc l .text.rvmodel 00000000 Mclr_Vext_int +800081a0 l .text.rvtest 00000000 rtn_fm_mmode +8000818c l .text.rvtest 00000000 from_hs_u +8000817c l .text.rvtest 00000000 from_vs +80017c40 l .data 00000000 begin_failure_scratch +8000825c l .text.rvtest 00000000 failedtest_saveregs +800082cc l .text.rvtest 00000000 failedtest_saveresults +80017c40 l .data 00000000 failure_type +8000846c l .text.rvtest 00000000 failedtest_saveresults_trap +800082dc l .text.rvtest 00000000 failedtest_saveresults_int +800083f4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +8000842c l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80008760 l .text.rvtest 00000000 failedtest_saveresults_common +80017d68 l .data 00000000 failure_diag_type +80017d78 l .data 00000000 trap_diag_fail_str_ptr +80008720 l .text.rvtest 00000000 trap_diag_offset_mismatch +80017d70 l .data 00000000 trap_diag_subtype +80008734 l .text.rvtest 00000000 trap_diag_field_identified +800188ad l .data 00000000 sv_Mtval2_str +800188eb l .data 00000000 sv_Mtinst_str +80018506 l .data 00000000 sv_Svect_str +80018606 l .data 00000000 sv_Scause_str +800186ff l .data 00000000 sv_Sepc_str +800187f3 l .data 00000000 sv_Stval_str +80018964 l .data 00000000 sv_Sip_str +80018546 l .data 00000000 sv_Hvect_str +80018644 l .data 00000000 sv_Hcause_str +8001873b l .data 00000000 sv_Hepc_str +80018830 l .data 00000000 sv_Htval_str +8001899f l .data 00000000 sv_Hip_str +80018587 l .data 00000000 sv_Vvect_str +80018683 l .data 00000000 sv_Vcause_str +80018778 l .data 00000000 sv_Vepc_str +8001886e l .data 00000000 sv_Vtval_str +800189db l .data 00000000 sv_Vip_str +80018a18 l .data 00000000 Mclr_Mext_int_str +80018a67 l .data 00000000 Mclr_Sext_int_str +80018b62 l .data 00000000 Sclr_Sext_int_str +80018c5e l .data 00000000 Hclr_Sext_int_str +80008750 l .text.rvtest 00000000 trap_diag_generic_report +80017d74 l .data 00000000 trap_diag_mode +80008790 l .text.rvtest 00000000 failedtest_report +80008790 l .text.rvtest 00000000 print_failstr +80008808 l .text.rvtest 00000000 print_testnamestr +800183b2 l .data 00000000 testnamestr +80008848 l .text.rvtest 00000000 print_failure_test_name_str +80017d60 l .data 00000000 failure_string_ptr +80008858 l .text.rvtest 00000000 print_newline_str +80008dcc l .text.rvtest 00000000 failedtest_report_trap_detailed +800183c6 l .data 00000000 inststr +80017d40 l .data 00000000 failing_instruction +800183da l .data 00000000 addrstr +80017d48 l .data 00000000 failing_addr +80018e11 l .data 00000000 regstr +80008a38 l .text.rvtest 00000000 failedtest_report_not_intreg +80017d44 l .data 00000000 failing_reg +80009d54 l .text.rvtest 00000000 failedtest_dec_to_str +80008b4c l .text.rvtest 00000000 failedtest_report_print_regstr +80008a8c l .text.rvtest 00000000 failedtest_report_fpreg +80008ad8 l .text.rvtest 00000000 failedtest_report_vecreg +80008b14 l .text.rvtest 00000000 failedtest_report_vxsat +80018f27 l .data 00000000 fflagsstr +80008b88 l .text.rvtest 00000000 failedtest_report_after_reg +80018e0a l .data 00000000 vxsatstr +80018e22 l .data 00000000 badvalstr +80008bec l .text.rvtest 00000000 failedtest_report_badval_not_fp +80017d50 l .data 00000000 failing_value +80008bfc l .text.rvtest 00000000 failedtest_report_badval_done +80008ccc l .text.rvtest 00000000 failedtest_report_diag +80018e39 l .data 00000000 expvalstr +80008c8c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80017d58 l .data 00000000 expected_value +80008c9c l .text.rvtest 00000000 failedtest_report_expval_done +80009a84 l .text.rvtest 00000000 failedtest_report_end +80008d4c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80008cd4 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80018e50 l .data 00000000 failure_diag_bad_instr_str +80018eae l .data 00000000 failure_diag_bad_ptr_str +80008e90 l .text.rvtest 00000000 trap_report_offset_mismatch +80018f53 l .data 00000000 trap_diag_header_str +80018f7f l .data 00000000 trap_diag_origstr_label +80009910 l .text.rvtest 00000000 trap_report_generic +800091cc l .text.rvtest 00000000 trap_report_field_mismatch +80018f8f l .data 00000000 trap_diag_expected_offset_str +80018fba l .data 00000000 trap_diag_actual_offset_str +800090ac l .text.rvtest 00000000 trap_report_missing_traps +80008f9c l .text.rvtest 00000000 trap_report_extra_traps +80018fe9 l .data 00000000 trap_diag_extra_traps_str +80019051 l .data 00000000 trap_diag_diff_bytes_str +80019078 l .data 00000000 trap_diag_extra_next_step_str +80019015 l .data 00000000 trap_diag_missing_traps_str +80019160 l .data 00000000 trap_diag_missing_next_step_str +80019247 l .data 00000000 trap_diag_handler_mode_str +80009264 l .text.rvtest 00000000 trap_mode_m +800092a4 l .text.rvtest 00000000 trap_mode_s +800092e4 l .text.rvtest 00000000 trap_mode_h +80009324 l .text.rvtest 00000000 trap_mode_v +80019283 l .data 00000000 trap_diag_mode_unknown_str +80009360 l .text.rvtest 00000000 trap_mode_print +80019261 l .data 00000000 trap_diag_mode_m_str +80019269 l .data 00000000 trap_diag_mode_s_str +80019271 l .data 00000000 trap_diag_mode_hs_str +8001927a l .data 00000000 trap_diag_mode_vs_str +8001928c l .data 00000000 trap_diag_field_str +80009424 l .text.rvtest 00000000 trap_field_vect +80009464 l .text.rvtest 00000000 trap_field_cause +800094a4 l .text.rvtest 00000000 trap_field_epc +800094e4 l .text.rvtest 00000000 trap_field_tval +80009524 l .text.rvtest 00000000 trap_field_ip +80009564 l .text.rvtest 00000000 trap_field_tval2 +800095a4 l .text.rvtest 00000000 trap_field_tinst +800095e4 l .text.rvtest 00000000 trap_field_intid +800193e3 l .data 00000000 trap_diag_field_unknown_str +80009620 l .text.rvtest 00000000 trap_field_print +800192a6 l .data 00000000 trap_diag_field_vect_str +800192d7 l .data 00000000 trap_diag_field_cause_str +800192f7 l .data 00000000 trap_diag_field_epc_str +80019315 l .data 00000000 trap_diag_field_tval_str +80019334 l .data 00000000 trap_diag_field_ip_str +8001935c l .data 00000000 trap_diag_field_tval2_str +80019388 l .data 00000000 trap_diag_field_tinst_str +800193b4 l .data 00000000 trap_diag_field_intid_str +800193f2 l .data 00000000 trap_diag_expected_str +80019409 l .data 00000000 trap_diag_actual_str +800097bc l .text.rvtest 00000000 trap_field_not_cause +80019420 l .data 00000000 trap_diag_expected_cause_name_str +800099f4 l .text.rvtest 00000000 trap_cause_to_str +80019437 l .data 00000000 trap_diag_actual_cause_name_str +800097bc l .text.rvtest 00000000 trap_field_not_epc +80009ad0 l .text.rvtest 00000000 failedtest_print_csr_context +800194ad l .data 00000000 trap_diag_hint_vect_str +80019583 l .data 00000000 trap_diag_hint_cause_str +80019676 l .data 00000000 trap_diag_hint_epc_str +80019771 l .data 00000000 trap_diag_hint_tval_str +80019858 l .data 00000000 trap_diag_hint_ip_str +80019465 l .data 00000000 trap_diag_generic_str +8001844e l .data 00000000 xepcinstrstr +80009a18 l .text.rvtest 00000000 trap_cause_interrupt +800099f8 l .text.rvtest 00000000 trap_cause_exception +80009a44 l .text.rvtest 00000000 trap_cause_unknown +80017dd0 l .data 00000000 trap_excpt_name_tbl +80017e30 l .data 00000000 trap_int_name_tbl +8001826e l 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.text.rvmodel 00000000 abortMtest +8002a17c l .text.rvmodel 00000000 init_Mtramp +8002a1ec l .text.rvmodel 00000000 overwt_tt_Mloop +8002a1ec l .text.rvmodel 00000000 ovlpok_Mtramp +8002a214 l .text.rvmodel 00000000 endcopy_Mtramp +8002a268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +8002a324 l .text.rvmodel 00000000 rvtest_init_regs +80019990 l .data 00000000 signature_base +8002a4c0 l .text.rvmodel 00000000 canary_check +80018f2f l .data 00000000 canary_mismatch +8002a5b0 l .text.rvmodel 00000000 write_tohost_pass +8002a5b8 l .text.rvmodel 00000000 pass +8002a5d0 l .text.rvmodel 00000000 write_tohost_fail +8002a5d8 l .text.rvmodel 00000000 fail +8002a5e4 l .text.rvmodel 00000000 rvtest_set_msw_int +8002a5f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +8002a600 l .text.rvmodel 00000000 rvtest_set_mext_int +8002a614 l .text.rvmodel 00000000 rvtest_clr_mext_int +8000c000 l .data 00000000 scratch +8000c2e8 l .data 00000000 Msave_area +8000c2e8 l .data 00000000 Mcode_bgn_ptr +8000c2f0 l .data 00000000 Mcode_seg_sz +8000c2f8 l .data 00000000 Mdata_bgn_ptr +8000c300 l .data 00000000 Mdata_seg_sz +8000c308 l .data 00000000 Msig_bgn_ptr +8000c310 l .data 00000000 Msig_seg_sz +8000c318 l .data 00000000 Mvmem_bgn_ptr +8000c320 l .data 00000000 Mvmem_seg_sz +8000c330 l .data 00000000 Msatp_sv +8000c338 l .data 00000000 Msved_misa +8000c338 l .data 00000000 Msved_hgatp +8000c338 l .data 00000000 Msved_mpp +8000c338 l .data 00000000 Munused +8000c340 l .data 00000000 Mtentry_sv +8000c348 l .data 00000000 Medeleg_sv +8000c350 l .data 00000000 Mtvec_new +8000c358 l .data 00000000 Mtvec_save +8000c360 l .data 00000000 Mscratch_save +8000c368 l .data 00000000 Mtrapreg_sv +8000c388 l .data 00000000 Mrvmodel_sv +8000c3a8 l .data 00000000 Msv_area_end +80017dd0 l .data 00000000 end_failure_scratch +80017e70 l .data 00000000 trap_excpt_name_0 +80017e90 l .data 00000000 trap_excpt_name_1 +80017eaa l .data 00000000 trap_excpt_name_2 +80017ebf l .data 00000000 trap_excpt_name_3 +80017ecb l .data 00000000 trap_excpt_name_4 +80017ee4 l .data 00000000 trap_excpt_name_5 +80017ef7 l .data 00000000 trap_excpt_name_6 +80017f15 l .data 00000000 trap_excpt_name_7 +80017f2d l .data 00000000 trap_excpt_name_8 +80017f4b l .data 00000000 trap_excpt_name_9 +80017f69 l .data 00000000 trap_excpt_name_10 +80017f88 l .data 00000000 trap_excpt_name_11 +80017fa6 l .data 00000000 trap_excpt_name_12 +80017fbe l .data 00000000 trap_excpt_name_13 +80017fcf l .data 00000000 trap_excpt_name_14 +80017fde l .data 00000000 trap_excpt_name_15 +80017ff4 l .data 00000000 trap_excpt_name_16 +80018001 l .data 00000000 trap_excpt_name_17 +80018010 l .data 00000000 trap_excpt_name_18 +80018020 l .data 00000000 trap_excpt_name_19 +80018030 l .data 00000000 trap_excpt_name_20 +8001804e l .data 00000000 trap_excpt_name_21 +80018065 l .data 00000000 trap_excpt_name_22 +8001807a l .data 00000000 trap_excpt_name_23 +80018096 l .data 00000000 trap_int_name_0 +800180ae l .data 00000000 trap_int_name_1 +800180cd l .data 00000000 trap_int_name_2 +800180f4 l .data 00000000 trap_int_name_3 +80018110 l .data 00000000 trap_int_name_4 +80018128 l .data 00000000 trap_int_name_5 +80018144 l .data 00000000 trap_int_name_6 +80018168 l .data 00000000 trap_int_name_7 +80018181 l .data 00000000 trap_int_name_8 +80018199 l .data 00000000 trap_int_name_9 +800181b8 l .data 00000000 trap_int_name_10 +800181df l .data 00000000 trap_int_name_11 +800181fb l .data 00000000 trap_int_name_12 +80018220 l .data 00000000 trap_int_name_13 +8001823c l .data 00000000 trap_int_name_14 +80018255 l .data 00000000 trap_int_name_15 +8001841b l .data 00000000 xepcstr +80018ab9 l .data 00000000 Mclr_Vext_int_str +80018b13 l .data 00000000 Sclr_Mext_int_str +80018bb4 l .data 00000000 Sclr_Vext_int_str +80018c0e l .data 00000000 Hclr_Mext_int_str +80018cb1 l .data 00000000 Hclr_Vext_int_str +80018d0c l .data 00000000 Vclr_Mext_int_str +80018d5c l .data 00000000 Vclr_Sext_int_str +80018daf l .data 00000000 Vclr_Vext_int_str +8001944e l .data 00000000 trap_diag_curr_xepc_str +80028e60 g .data 00000000 end_signature +8002a580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +80028e60 g .data 00000000 rvtest_sig_end +80007658 g .text.rvtest 00000000 common_Mentry +8000718c g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80019990 g .data 00000000 begin_signature +8000c108 g .data 00000000 rvtest_trap_count +80007134 g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80019990 g .data 00000000 rvtest_sig_begin +8000c3b0 g .data 00000000 rvtest_data_begin +8000c110 g .data 00000000 Mtramptbl_sv +80019981 g .data 00000000 rvtest_data_end +80007134 g .text.rvtest 00000000 cleanup_epilogs +8002b000 g .text.rvmodel 00000000 _end +80029000 g .tohost 00000000 fromhost +80028f00 g .tohost 00000000 tohost +800073f0 g .text.rvtest 00000000 rvtest_fail_summary +80007480 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 0002a097 auipc x1,0x2a +80000004: 0e408093 addi x1,x1,228 # 8002a0e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x196834c8 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xe398c323 +80000048: 0001ad83 lw x27,0(x3) +8000004c: 00418193 addi x3,x3,4 + +80000050 : +Zksed_sm4ks_cg_cp_rs1_b0: + sm4ks x15, x0, x27, 1 # perform operation +80000050: 75b007b3 sm4ks x15,x0,x27,0x1 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_rs1_b0, Zksed_sm4ks_cg_cp_rs1_b0_str) +80000054: 00012203 lw x4,0(x2) +80000058: 00f20863 beq x4,x15,80000068 +8000005c: 164082ef jal x5,800081c0 +80000060: 80000050 .word 0x80000050 +80000064: 8000d810 .word 0x8000d810 +80000068: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x10cc2632 +8000006c: 0001a083 lw x1,0(x3) +80000070: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x742e5711 +80000074: 0001a303 lw x6,0(x3) +80000078: 00418193 addi x3,x3,4 + +8000007c : +Zksed_sm4ks_cg_cp_rs1_b1: + sm4ks x19, x1, x6, 3 # perform operation +8000007c: f46089b3 sm4ks x19,x1,x6,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_rs1_b1, Zksed_sm4ks_cg_cp_rs1_b1_str) +80000080: 00012203 lw x4,0(x2) +80000084: 01320863 beq x4,x19,80000094 +80000088: 138082ef jal x5,800081c0 +8000008c: 8000007c .word 0x8000007c +80000090: 8000d843 .word 0x8000d843 +80000094: 00410113 addi x2,x2,4 + + mv x18, x2 # switch signature pointer register to avoid conflict with test +80000098: 00010913 addi x18,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xe71cb033 +8000009c: 0001a103 lw x2,0(x3) +800000a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x6afebadb +800000a4: 0001ad83 lw x27,0(x3) +800000a8: 00418193 addi x3,x3,4 + +800000ac : +Zksed_sm4ks_cg_cp_rs1_b2: + sm4ks x28, x2, x27, 3 # perform operation +800000ac: f5b10e33 sm4ks x28,x2,x27,0x3 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zksed_sm4ks_cg_cp_rs1_b2, Zksed_sm4ks_cg_cp_rs1_b2_str) +800000b0: 00092203 lw x4,0(x18) +800000b4: 01c20863 beq x4,x28,800000c4 +800000b8: 108082ef jal x5,800081c0 +800000bc: 800000ac .word 0x800000ac +800000c0: 8000d876 .word 0x8000d876 +800000c4: 00490913 addi x18,x18,4 + + mv x6, x3 # switch data pointer register to avoid conflict with test +800000c8: 00018313 addi x6,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x77bf2b44 +800000cc: 00032183 lw x3,0(x6) +800000d0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x39c670c8 +800000d4: 00032883 lw x17,0(x6) +800000d8: 00430313 addi x6,x6,4 + +800000dc : +Zksed_sm4ks_cg_cp_rs1_b3: + sm4ks x24, x3, x17, 3 # perform operation +800000dc: f5118c33 sm4ks x24,x3,x17,0x3 + # Check if x24 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x24, Zksed_sm4ks_cg_cp_rs1_b3, Zksed_sm4ks_cg_cp_rs1_b3_str) +800000e0: 00092203 lw x4,0(x18) +800000e4: 01820863 beq x4,x24,800000f4 +800000e8: 0d8082ef jal x5,800081c0 +800000ec: 800000dc .word 0x800000dc +800000f0: 8000d8a9 .word 0x8000d8a9 +800000f4: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x7a9a6c65 +80000100: 00032203 lw x4,0(x6) +80000104: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x2ba64370 +80000108: 00032283 lw x5,0(x6) +8000010c: 00430313 addi x6,x6,4 + +80000110 : +Zksed_sm4ks_cg_cp_rs1_b4: + sm4ks x17, x4, x5, 1 # perform operation +80000110: 745208b3 sm4ks x17,x4,x5,0x1 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cp_rs1_b4, Zksed_sm4ks_cg_cp_rs1_b4_str) +80000114: 00092383 lw x7,0(x18) +80000118: 01138863 beq x7,x17,80000128 +8000011c: 0bc0846f jal x8,800081d8 +80000120: 80000110 .word 0x80000110 +80000124: 8000d8dc .word 0x8000d8dc +80000128: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x58b073b3 +8000012c: 00032283 lw x5,0(x6) +80000130: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x74d4f34d +80000134: 00032e83 lw x29,0(x6) +80000138: 00430313 addi x6,x6,4 + +8000013c : +Zksed_sm4ks_cg_cp_rs1_b5: + sm4ks x28, x5, x29, 3 # perform operation +8000013c: f5d28e33 sm4ks x28,x5,x29,0x3 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cp_rs1_b5, Zksed_sm4ks_cg_cp_rs1_b5_str) +80000140: 00092383 lw x7,0(x18) +80000144: 01c38863 beq x7,x28,80000154 +80000148: 0900846f jal x8,800081d8 +8000014c: 8000013c .word 0x8000013c +80000150: 8000d90f .word 0x8000d90f +80000154: 00490913 addi x18,x18,4 + + mv x20, x6 # switch data pointer register to avoid conflict with test +80000158: 00030a13 addi x20,x6,0 +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xcfa7e368 +8000015c: 000a2303 lw x6,0(x20) +80000160: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x72e4909f +80000164: 000a2003 lw x0,0(x20) +80000168: 004a0a13 addi x20,x20,4 + +8000016c : +Zksed_sm4ks_cg_cp_rs1_b6: + sm4ks x14, x6, x0, 2 # perform operation +8000016c: b4030733 sm4ks x14,x6,x0,0x2 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zksed_sm4ks_cg_cp_rs1_b6, Zksed_sm4ks_cg_cp_rs1_b6_str) +80000170: 00092383 lw x7,0(x18) +80000174: 00e38863 beq x7,x14,80000184 +80000178: 0600846f jal x8,800081d8 +8000017c: 8000016c .word 0x8000016c +80000180: 8000d942 .word 0x8000d942 +80000184: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000188: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +8000018c: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x53e3c607 +80000190: 000a2383 lw x7,0(x20) +80000194: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x8511f20e +80000198: 000a2403 lw x8,0(x20) +8000019c: 004a0a13 addi x20,x20,4 + +800001a0 : +Zksed_sm4ks_cg_cp_rs1_b7: + sm4ks x22, x7, x8, 1 # perform operation +800001a0: 74838b33 sm4ks x22,x7,x8,0x1 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zksed_sm4ks_cg_cp_rs1_b7, Zksed_sm4ks_cg_cp_rs1_b7_str) +800001a4: 00092203 lw x4,0(x18) +800001a8: 01620863 beq x4,x22,800001b8 +800001ac: 014082ef jal x5,800081c0 +800001b0: 800001a0 .word 0x800001a0 +800001b4: 8000d975 .word 0x8000d975 +800001b8: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x44424818 +800001bc: 000a2403 lw x8,0(x20) +800001c0: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x898bfba0 +800001c4: 000a2583 lw x11,0(x20) +800001c8: 004a0a13 addi x20,x20,4 + +800001cc : +Zksed_sm4ks_cg_cp_rs1_b8: + sm4ks x29, x8, x11, 1 # perform operation +800001cc: 74b40eb3 sm4ks x29,x8,x11,0x1 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zksed_sm4ks_cg_cp_rs1_b8, Zksed_sm4ks_cg_cp_rs1_b8_str) +800001d0: 00092203 lw x4,0(x18) +800001d4: 01d20863 beq x4,x29,800001e4 +800001d8: 7e9072ef jal x5,800081c0 +800001dc: 800001cc .word 0x800001cc +800001e0: 8000d9a8 .word 0x8000d9a8 +800001e4: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x4861bfd9 +800001e8: 000a2483 lw x9,0(x20) +800001ec: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x74058f97 +800001f0: 000a2503 lw x10,0(x20) +800001f4: 004a0a13 addi x20,x20,4 + +800001f8 : +Zksed_sm4ks_cg_cp_rs1_b9: + sm4ks x1, x9, x10, 3 # perform operation +800001f8: f4a480b3 sm4ks x1,x9,x10,0x3 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksed_sm4ks_cg_cp_rs1_b9, Zksed_sm4ks_cg_cp_rs1_b9_str) +800001fc: 00092203 lw x4,0(x18) +80000200: 00120863 beq x4,x1,80000210 +80000204: 7bd072ef jal x5,800081c0 +80000208: 800001f8 .word 0x800001f8 +8000020c: 8000d9db .word 0x8000d9db +80000210: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x19823993 +80000214: 000a2503 lw x10,0(x20) +80000218: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x1eab3825 +8000021c: 000a2683 lw x13,0(x20) +80000220: 004a0a13 addi x20,x20,4 + +80000224 : +Zksed_sm4ks_cg_cp_rs1_b10: + sm4ks x14, x10, x13, 1 # perform operation +80000224: 74d50733 sm4ks x14,x10,x13,0x1 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zksed_sm4ks_cg_cp_rs1_b10, Zksed_sm4ks_cg_cp_rs1_b10_str) +80000228: 00092203 lw x4,0(x18) +8000022c: 00e20863 beq x4,x14,8000023c +80000230: 791072ef jal x5,800081c0 +80000234: 80000224 .word 0x80000224 +80000238: 8000da0f .word 0x8000da0f +8000023c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x54f7c425 +80000240: 000a2583 lw x11,0(x20) +80000244: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xed111600 +80000248: 000a2503 lw x10,0(x20) +8000024c: 004a0a13 addi x20,x20,4 + +80000250 : +Zksed_sm4ks_cg_cp_rs1_b11: + sm4ks x22, x11, x10, 2 # perform operation +80000250: b4a58b33 sm4ks x22,x11,x10,0x2 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zksed_sm4ks_cg_cp_rs1_b11, Zksed_sm4ks_cg_cp_rs1_b11_str) +80000254: 00092203 lw x4,0(x18) +80000258: 01620863 beq x4,x22,80000268 +8000025c: 765072ef jal x5,800081c0 +80000260: 80000250 .word 0x80000250 +80000264: 8000da44 .word 0x8000da44 +80000268: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x7471497a +8000026c: 000a2603 lw x12,0(x20) +80000270: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xf27e3a4d +80000274: 000a2b83 lw x23,0(x20) +80000278: 004a0a13 addi x20,x20,4 + +8000027c : +Zksed_sm4ks_cg_cp_rs1_b12: + sm4ks x6, x12, x23, 3 # perform operation +8000027c: f5760333 sm4ks x6,x12,x23,0x3 + # Check if x6 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x6, Zksed_sm4ks_cg_cp_rs1_b12, Zksed_sm4ks_cg_cp_rs1_b12_str) +80000280: 00092203 lw x4,0(x18) +80000284: 00620863 beq x4,x6,80000294 +80000288: 739072ef jal x5,800081c0 +8000028c: 8000027c .word 0x8000027c +80000290: 8000da79 .word 0x8000da79 +80000294: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xbf906d8d +80000298: 000a2683 lw x13,0(x20) +8000029c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xde6d31a5 +800002a0: 000a2c03 lw x24,0(x20) +800002a4: 004a0a13 addi x20,x20,4 + +800002a8 : +Zksed_sm4ks_cg_cp_rs1_b13: + sm4ks x27, x13, x24, 0 # perform operation +800002a8: 35868db3 sm4ks x27,x13,x24,0x0 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zksed_sm4ks_cg_cp_rs1_b13, Zksed_sm4ks_cg_cp_rs1_b13_str) +800002ac: 00092203 lw x4,0(x18) +800002b0: 01b20863 beq x4,x27,800002c0 +800002b4: 70d072ef jal x5,800081c0 +800002b8: 800002a8 .word 0x800002a8 +800002bc: 8000daae .word 0x8000daae +800002c0: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x6452ea4f +800002c4: 000a2703 lw x14,0(x20) +800002c8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x5a35ef9c +800002cc: 000a2a83 lw x21,0(x20) +800002d0: 004a0a13 addi x20,x20,4 + +800002d4 : +Zksed_sm4ks_cg_cp_rs1_b14: + sm4ks x24, x14, x21, 0 # perform operation +800002d4: 35570c33 sm4ks x24,x14,x21,0x0 + # Check if x24 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x24, Zksed_sm4ks_cg_cp_rs1_b14, Zksed_sm4ks_cg_cp_rs1_b14_str) +800002d8: 00092203 lw x4,0(x18) +800002dc: 01820863 beq x4,x24,800002ec +800002e0: 6e1072ef jal x5,800081c0 +800002e4: 800002d4 .word 0x800002d4 +800002e8: 8000dae3 .word 0x8000dae3 +800002ec: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x5f89ce27 +800002f0: 000a2783 lw x15,0(x20) +800002f4: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x29fadd71 +800002f8: 000a2383 lw x7,0(x20) +800002fc: 004a0a13 addi x20,x20,4 + +80000300 : +Zksed_sm4ks_cg_cp_rs1_b15: + sm4ks x31, x15, x7, 0 # perform operation +80000300: 34778fb3 sm4ks x31,x15,x7,0x0 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zksed_sm4ks_cg_cp_rs1_b15, Zksed_sm4ks_cg_cp_rs1_b15_str) +80000304: 00092203 lw x4,0(x18) +80000308: 01f20863 beq x4,x31,80000318 +8000030c: 6b5072ef jal x5,800081c0 +80000310: 80000300 .word 0x80000300 +80000314: 8000db18 .word 0x8000db18 +80000318: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x9aada88a +8000031c: 000a2803 lw x16,0(x20) +80000320: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x2ac095b0 +80000324: 000a2d83 lw x27,0(x20) +80000328: 004a0a13 addi x20,x20,4 + +8000032c : +Zksed_sm4ks_cg_cp_rs1_b16: + sm4ks x13, x16, x27, 0 # perform operation +8000032c: 35b806b3 sm4ks x13,x16,x27,0x0 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zksed_sm4ks_cg_cp_rs1_b16, Zksed_sm4ks_cg_cp_rs1_b16_str) +80000330: 00092203 lw x4,0(x18) +80000334: 00d20863 beq x4,x13,80000344 +80000338: 689072ef jal x5,800081c0 +8000033c: 8000032c .word 0x8000032c +80000340: 8000db4d .word 0x8000db4d +80000344: 00490913 addi x18,x18,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x69b16789 +80000348: 000a2883 lw x17,0(x20) +8000034c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x8d29a082 +80000350: 000a2103 lw x2,0(x20) +80000354: 004a0a13 addi x20,x20,4 + +80000358 : +Zksed_sm4ks_cg_cp_rs1_b17: + sm4ks x10, x17, x2, 1 # perform operation +80000358: 74288533 sm4ks x10,x17,x2,0x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zksed_sm4ks_cg_cp_rs1_b17, Zksed_sm4ks_cg_cp_rs1_b17_str) +8000035c: 00092203 lw x4,0(x18) +80000360: 00a20863 beq x4,x10,80000370 +80000364: 65d072ef jal x5,800081c0 +80000368: 80000358 .word 0x80000358 +8000036c: 8000db82 .word 0x8000db82 +80000370: 00490913 addi x18,x18,4 + + mv x29, x18 # switch signature pointer register to avoid conflict with test +80000374: 00090e93 addi x29,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x7e5e6f6d +80000378: 000a2903 lw x18,0(x20) +8000037c: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x84d91e3a +80000380: 000a2983 lw x19,0(x20) +80000384: 004a0a13 addi x20,x20,4 + +80000388 : +Zksed_sm4ks_cg_cp_rs1_b18: + sm4ks x27, x18, x19, 0 # perform operation +80000388: 35390db3 sm4ks x27,x18,x19,0x0 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zksed_sm4ks_cg_cp_rs1_b18, Zksed_sm4ks_cg_cp_rs1_b18_str) +8000038c: 000ea203 lw x4,0(x29) +80000390: 01b20863 beq x4,x27,800003a0 +80000394: 62d072ef jal x5,800081c0 +80000398: 80000388 .word 0x80000388 +8000039c: 8000dbb7 .word 0x8000dbb7 +800003a0: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x1adaad74 +800003a4: 000a2983 lw x19,0(x20) +800003a8: 004a0a13 addi x20,x20,4 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x68da4300 +800003ac: 000a2103 lw x2,0(x20) +800003b0: 004a0a13 addi x20,x20,4 + +800003b4 : +Zksed_sm4ks_cg_cp_rs1_b19: + sm4ks x9, x19, x2, 1 # perform operation +800003b4: 742984b3 sm4ks x9,x19,x2,0x1 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zksed_sm4ks_cg_cp_rs1_b19, Zksed_sm4ks_cg_cp_rs1_b19_str) +800003b8: 000ea203 lw x4,0(x29) +800003bc: 00920863 beq x4,x9,800003cc +800003c0: 601072ef jal x5,800081c0 +800003c4: 800003b4 .word 0x800003b4 +800003c8: 8000dbec .word 0x8000dbec +800003cc: 004e8e93 addi x29,x29,4 + + mv x26, x20 # switch data pointer register to avoid conflict with test +800003d0: 000a0d13 addi x26,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x25618dd6 +800003d4: 000d2a03 lw x20,0(x26) +800003d8: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x31a0bbd8 +800003dc: 000d2903 lw x18,0(x26) +800003e0: 004d0d13 addi x26,x26,4 + +800003e4 : +Zksed_sm4ks_cg_cp_rs1_b20: + sm4ks x27, x20, x18, 0 # perform operation +800003e4: 352a0db3 sm4ks x27,x20,x18,0x0 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zksed_sm4ks_cg_cp_rs1_b20, Zksed_sm4ks_cg_cp_rs1_b20_str) +800003e8: 000ea203 lw x4,0(x29) +800003ec: 01b20863 beq x4,x27,800003fc +800003f0: 5d1072ef jal x5,800081c0 +800003f4: 800003e4 .word 0x800003e4 +800003f8: 8000dc21 .word 0x8000dc21 +800003fc: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x7a3b5fff +80000400: 000d2a83 lw x21,0(x26) +80000404: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xe9d1ac1e +80000408: 000d2983 lw x19,0(x26) +8000040c: 004d0d13 addi x26,x26,4 + +80000410 : +Zksed_sm4ks_cg_cp_rs1_b21: + sm4ks x6, x21, x19, 1 # perform operation +80000410: 753a8333 sm4ks x6,x21,x19,0x1 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zksed_sm4ks_cg_cp_rs1_b21, Zksed_sm4ks_cg_cp_rs1_b21_str) +80000414: 000ea203 lw x4,0(x29) +80000418: 00620863 beq x4,x6,80000428 +8000041c: 5a5072ef jal x5,800081c0 +80000420: 80000410 .word 0x80000410 +80000424: 8000dc56 .word 0x8000dc56 +80000428: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x727019a5 +8000042c: 000d2b03 lw x22,0(x26) +80000430: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x120bce24 +80000434: 000d2803 lw x16,0(x26) +80000438: 004d0d13 addi x26,x26,4 + +8000043c : +Zksed_sm4ks_cg_cp_rs1_b22: + sm4ks x6, x22, x16, 2 # perform operation +8000043c: b50b0333 sm4ks x6,x22,x16,0x2 + # Check if x6 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x6, Zksed_sm4ks_cg_cp_rs1_b22, Zksed_sm4ks_cg_cp_rs1_b22_str) +80000440: 000ea203 lw x4,0(x29) +80000444: 00620863 beq x4,x6,80000454 +80000448: 579072ef jal x5,800081c0 +8000044c: 8000043c .word 0x8000043c +80000450: 8000dc8b .word 0x8000dc8b +80000454: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x7d3cfe87 +80000458: 000d2b83 lw x23,0(x26) +8000045c: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0x8f9f855d +80000460: 000d2f83 lw x31,0(x26) +80000464: 004d0d13 addi x26,x26,4 + +80000468 : +Zksed_sm4ks_cg_cp_rs1_b23: + sm4ks x19, x23, x31, 2 # perform operation +80000468: b5fb89b3 sm4ks x19,x23,x31,0x2 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zksed_sm4ks_cg_cp_rs1_b23, Zksed_sm4ks_cg_cp_rs1_b23_str) +8000046c: 000ea203 lw x4,0(x29) +80000470: 01320863 beq x4,x19,80000480 +80000474: 54d072ef jal x5,800081c0 +80000478: 80000468 .word 0x80000468 +8000047c: 8000dcc0 .word 0x8000dcc0 +80000480: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x5bb557d0 +80000484: 000d2c03 lw x24,0(x26) +80000488: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0xba14bb96 +8000048c: 000d2b03 lw x22,0(x26) +80000490: 004d0d13 addi x26,x26,4 + +80000494 : +Zksed_sm4ks_cg_cp_rs1_b24: + sm4ks x18, x24, x22, 2 # perform operation +80000494: b56c0933 sm4ks x18,x24,x22,0x2 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zksed_sm4ks_cg_cp_rs1_b24, Zksed_sm4ks_cg_cp_rs1_b24_str) +80000498: 000ea203 lw x4,0(x29) +8000049c: 01220863 beq x4,x18,800004ac +800004a0: 521072ef jal x5,800081c0 +800004a4: 80000494 .word 0x80000494 +800004a8: 8000dcf5 .word 0x8000dcf5 +800004ac: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x82b2d996 +800004b0: 000d2c83 lw x25,0(x26) +800004b4: 004d0d13 addi x26,x26,4 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x6b6de184 +800004b8: 000d2303 lw x6,0(x26) +800004bc: 004d0d13 addi x26,x26,4 + +800004c0 : +Zksed_sm4ks_cg_cp_rs1_b25: + sm4ks x10, x25, x6, 3 # perform operation +800004c0: f46c8533 sm4ks x10,x25,x6,0x3 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zksed_sm4ks_cg_cp_rs1_b25, Zksed_sm4ks_cg_cp_rs1_b25_str) +800004c4: 000ea203 lw x4,0(x29) +800004c8: 00a20863 beq x4,x10,800004d8 +800004cc: 4f5072ef jal x5,800081c0 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 8000dd2a .word 0x8000dd2a +800004d8: 004e8e93 addi x29,x29,4 + + mv x17, x26 # switch data pointer register to avoid conflict with test +800004dc: 000d0893 addi x17,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x696cbafb +800004e0: 0008ad03 lw x26,0(x17) +800004e4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x8ceaf449 +800004e8: 0008a003 lw x0,0(x17) +800004ec: 00488893 addi x17,x17,4 + +800004f0 : +Zksed_sm4ks_cg_cp_rs1_b26: + sm4ks x14, x26, x0, 1 # perform operation +800004f0: 740d0733 sm4ks x14,x26,x0,0x1 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zksed_sm4ks_cg_cp_rs1_b26, Zksed_sm4ks_cg_cp_rs1_b26_str) +800004f4: 000ea203 lw x4,0(x29) +800004f8: 00e20863 beq x4,x14,80000508 +800004fc: 4c5072ef jal x5,800081c0 +80000500: 800004f0 .word 0x800004f0 +80000504: 8000dd5f .word 0x8000dd5f +80000508: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x7eed37ec +8000050c: 0008ad83 lw x27,0(x17) +80000510: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x30bbe6e6 +80000514: 0008a503 lw x10,0(x17) +80000518: 00488893 addi x17,x17,4 + +8000051c : +Zksed_sm4ks_cg_cp_rs1_b27: + sm4ks x31, x27, x10, 0 # perform operation +8000051c: 34ad8fb3 sm4ks x31,x27,x10,0x0 + # Check if x31 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x31, Zksed_sm4ks_cg_cp_rs1_b27, Zksed_sm4ks_cg_cp_rs1_b27_str) +80000520: 000ea203 lw x4,0(x29) +80000524: 01f20863 beq x4,x31,80000534 +80000528: 499072ef jal x5,800081c0 +8000052c: 8000051c .word 0x8000051c +80000530: 8000dd94 .word 0x8000dd94 +80000534: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x1023d2af +80000538: 0008ae03 lw x28,0(x17) +8000053c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x69b413c6 +80000540: 0008a383 lw x7,0(x17) +80000544: 00488893 addi x17,x17,4 + +80000548 : +Zksed_sm4ks_cg_cp_rs1_b28: + sm4ks x20, x28, x7, 2 # perform operation +80000548: b47e0a33 sm4ks x20,x28,x7,0x2 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zksed_sm4ks_cg_cp_rs1_b28, Zksed_sm4ks_cg_cp_rs1_b28_str) +8000054c: 000ea203 lw x4,0(x29) +80000550: 01420863 beq x4,x20,80000560 +80000554: 46d072ef jal x5,800081c0 +80000558: 80000548 .word 0x80000548 +8000055c: 8000ddc9 .word 0x8000ddc9 +80000560: 004e8e93 addi x29,x29,4 + + mv x20, x29 # switch signature pointer register to avoid conflict with test +80000564: 000e8a13 addi x20,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x6a63263d +80000568: 0008ae83 lw x29,0(x17) +8000056c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xd2d0fcff +80000570: 0008a683 lw x13,0(x17) +80000574: 00488893 addi x17,x17,4 + +80000578 : +Zksed_sm4ks_cg_cp_rs1_b29: + sm4ks x15, x29, x13, 2 # perform operation +80000578: b4de87b3 sm4ks x15,x29,x13,0x2 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zksed_sm4ks_cg_cp_rs1_b29, Zksed_sm4ks_cg_cp_rs1_b29_str) +8000057c: 000a2203 lw x4,0(x20) +80000580: 00f20863 beq x4,x15,80000590 +80000584: 43d072ef jal x5,800081c0 +80000588: 80000578 .word 0x80000578 +8000058c: 8000ddfe .word 0x8000ddfe +80000590: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xf8bf89b3 +80000594: 0008af03 lw x30,0(x17) +80000598: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x1b22f26f +8000059c: 0008ac03 lw x24,0(x17) +800005a0: 00488893 addi x17,x17,4 + +800005a4 : +Zksed_sm4ks_cg_cp_rs1_b30: + sm4ks x23, x30, x24, 1 # perform operation +800005a4: 758f0bb3 sm4ks x23,x30,x24,0x1 + # Check if x23 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x23, Zksed_sm4ks_cg_cp_rs1_b30, Zksed_sm4ks_cg_cp_rs1_b30_str) +800005a8: 000a2203 lw x4,0(x20) +800005ac: 01720863 beq x4,x23,800005bc +800005b0: 411072ef jal x5,800081c0 +800005b4: 800005a4 .word 0x800005a4 +800005b8: 8000de33 .word 0x8000de33 +800005bc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xc09adbd6 +800005c0: 0008af83 lw x31,0(x17) +800005c4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x27913cef +800005c8: 0008ab03 lw x22,0(x17) +800005cc: 00488893 addi x17,x17,4 + +800005d0 : +Zksed_sm4ks_cg_cp_rs1_b31: + sm4ks x3, x31, x22, 3 # perform operation +800005d0: f56f81b3 sm4ks x3,x31,x22,0x3 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zksed_sm4ks_cg_cp_rs1_b31, Zksed_sm4ks_cg_cp_rs1_b31_str) +800005d4: 000a2203 lw x4,0(x20) +800005d8: 00320863 beq x4,x3,800005e8 +800005dc: 3e5072ef jal x5,800081c0 +800005e0: 800005d0 .word 0x800005d0 +800005e4: 8000de68 .word 0x8000de68 +800005e8: 004a0a13 addi x20,x20,4 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x521f6095 +800005ec: 0008a683 lw x13,0(x17) +800005f0: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x506f9da4 +800005f4: 0008a003 lw x0,0(x17) +800005f8: 00488893 addi x17,x17,4 + +800005fc : +Zksed_sm4ks_cg_cp_rs2_b0: + sm4ks x2, x13, x0, 1 # perform operation +800005fc: 74068133 sm4ks x2,x13,x0,0x1 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zksed_sm4ks_cg_cp_rs2_b0, Zksed_sm4ks_cg_cp_rs2_b0_str) +80000600: 000a2203 lw x4,0(x20) +80000604: 00220863 beq x4,x2,80000614 +80000608: 3b9072ef jal x5,800081c0 +8000060c: 800005fc .word 0x800005fc +80000610: 8000de9d .word 0x8000de9d +80000614: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7d7b56f5 +80000618: 0008af83 lw x31,0(x17) +8000061c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x90bb6f29 +80000620: 0008a083 lw x1,0(x17) +80000624: 00488893 addi x17,x17,4 + +80000628 : +Zksed_sm4ks_cg_cp_rs2_b1: + sm4ks x28, x31, x1, 2 # perform operation +80000628: b41f8e33 sm4ks x28,x31,x1,0x2 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zksed_sm4ks_cg_cp_rs2_b1, Zksed_sm4ks_cg_cp_rs2_b1_str) +8000062c: 000a2203 lw x4,0(x20) +80000630: 01c20863 beq x4,x28,80000640 +80000634: 38d072ef jal x5,800081c0 +80000638: 80000628 .word 0x80000628 +8000063c: 8000ded1 .word 0x8000ded1 +80000640: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x6b47777e +80000644: 0008a583 lw x11,0(x17) +80000648: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x90ccb71d +8000064c: 0008a103 lw x2,0(x17) +80000650: 00488893 addi x17,x17,4 + +80000654 : +Zksed_sm4ks_cg_cp_rs2_b2: + sm4ks x0, x11, x2, 0 # perform operation +80000654: 34258033 sm4ks x0,x11,x2,0x0 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zksed_sm4ks_cg_cp_rs2_b2, Zksed_sm4ks_cg_cp_rs2_b2_str) +80000658: 000a2203 lw x4,0(x20) +8000065c: 00020863 beq x4,x0,8000066c +80000660: 361072ef jal x5,800081c0 +80000664: 80000654 .word 0x80000654 +80000668: 8000df05 .word 0x8000df05 +8000066c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x2ffed73e +80000670: 0008af03 lw x30,0(x17) +80000674: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x04bf467f +80000678: 0008a183 lw x3,0(x17) +8000067c: 00488893 addi x17,x17,4 + +80000680 : +Zksed_sm4ks_cg_cp_rs2_b3: + sm4ks x0, x30, x3, 3 # perform operation +80000680: f43f0033 sm4ks x0,x30,x3,0x3 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zksed_sm4ks_cg_cp_rs2_b3, Zksed_sm4ks_cg_cp_rs2_b3_str) +80000684: 000a2203 lw x4,0(x20) +80000688: 00020863 beq x4,x0,80000698 +8000068c: 335072ef jal x5,800081c0 +80000690: 80000680 .word 0x80000680 +80000694: 8000df39 .word 0x8000df39 +80000698: 004a0a13 addi x20,x20,4 + + mv x7, x4 # switch temp register to avoid conflict with test +8000069c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800006a0: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xf1d78597 +800006a4: 0008a603 lw x12,0(x17) +800006a8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xdba66a84 +800006ac: 0008a203 lw x4,0(x17) +800006b0: 00488893 addi x17,x17,4 + +800006b4 : +Zksed_sm4ks_cg_cp_rs2_b4: + sm4ks x21, x12, x4, 2 # perform operation +800006b4: b4460ab3 sm4ks x21,x12,x4,0x2 + # Check if x21 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x21, Zksed_sm4ks_cg_cp_rs2_b4, Zksed_sm4ks_cg_cp_rs2_b4_str) +800006b8: 000a2383 lw x7,0(x20) +800006bc: 01538863 beq x7,x21,800006cc +800006c0: 3190746f jal x8,800081d8 +800006c4: 800006b4 .word 0x800006b4 +800006c8: 8000df6d .word 0x8000df6d +800006cc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x93136a94 +800006d0: 0008aa83 lw x21,0(x17) +800006d4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x85823593 +800006d8: 0008a283 lw x5,0(x17) +800006dc: 00488893 addi x17,x17,4 + +800006e0 : +Zksed_sm4ks_cg_cp_rs2_b5: + sm4ks x26, x21, x5, 2 # perform operation +800006e0: b45a8d33 sm4ks x26,x21,x5,0x2 + # Check if x26 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x26, Zksed_sm4ks_cg_cp_rs2_b5, Zksed_sm4ks_cg_cp_rs2_b5_str) +800006e4: 000a2383 lw x7,0(x20) +800006e8: 01a38863 beq x7,x26,800006f8 +800006ec: 2ed0746f jal x8,800081d8 +800006f0: 800006e0 .word 0x800006e0 +800006f4: 8000dfa1 .word 0x8000dfa1 +800006f8: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xc8d659b9 +800006fc: 0008ad83 lw x27,0(x17) +80000700: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x882f790b +80000704: 0008a303 lw x6,0(x17) +80000708: 00488893 addi x17,x17,4 + +8000070c : +Zksed_sm4ks_cg_cp_rs2_b6: + sm4ks x16, x27, x6, 1 # perform operation +8000070c: 746d8833 sm4ks x16,x27,x6,0x1 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zksed_sm4ks_cg_cp_rs2_b6, Zksed_sm4ks_cg_cp_rs2_b6_str) +80000710: 000a2383 lw x7,0(x20) +80000714: 01038863 beq x7,x16,80000724 +80000718: 2c10746f jal x8,800081d8 +8000071c: 8000070c .word 0x8000070c +80000720: 8000dfd5 .word 0x8000dfd5 +80000724: 004a0a13 addi x20,x20,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000728: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +8000072c: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x81d58238 +80000730: 0008af03 lw x30,0(x17) +80000734: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x01baee5b +80000738: 0008a383 lw x7,0(x17) +8000073c: 00488893 addi x17,x17,4 + +80000740 : +Zksed_sm4ks_cg_cp_rs2_b7: + sm4ks x4, x30, x7, 2 # perform operation +80000740: b47f0233 sm4ks x4,x30,x7,0x2 + # Check if x4 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x4, Zksed_sm4ks_cg_cp_rs2_b7, Zksed_sm4ks_cg_cp_rs2_b7_str) +80000744: 000a2683 lw x13,0(x20) +80000748: 00468863 beq x13,x4,80000758 +8000074c: 2b50776f jal x14,80008200 +80000750: 80000740 .word 0x80000740 +80000754: 8000e009 .word 0x8000e009 +80000758: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xd768f995 +8000075c: 0008ab03 lw x22,0(x17) +80000760: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xafa0e18a +80000764: 0008a403 lw x8,0(x17) +80000768: 00488893 addi x17,x17,4 + +8000076c : +Zksed_sm4ks_cg_cp_rs2_b8: + sm4ks x10, x22, x8, 2 # perform operation +8000076c: b48b0533 sm4ks x10,x22,x8,0x2 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zksed_sm4ks_cg_cp_rs2_b8, Zksed_sm4ks_cg_cp_rs2_b8_str) +80000770: 000a2683 lw x13,0(x20) +80000774: 00a68863 beq x13,x10,80000784 +80000778: 2890776f jal x14,80008200 +8000077c: 8000076c .word 0x8000076c +80000780: 8000e03d .word 0x8000e03d +80000784: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x0784f24f +80000788: 0008a403 lw x8,0(x17) +8000078c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xd32c1a8d +80000790: 0008a483 lw x9,0(x17) +80000794: 00488893 addi x17,x17,4 + +80000798 : +Zksed_sm4ks_cg_cp_rs2_b9: + sm4ks x5, x8, x9, 3 # perform operation +80000798: f49402b3 sm4ks x5,x8,x9,0x3 + # Check if x5 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x5, Zksed_sm4ks_cg_cp_rs2_b9, Zksed_sm4ks_cg_cp_rs2_b9_str) +8000079c: 000a2683 lw x13,0(x20) +800007a0: 00568863 beq x13,x5,800007b0 +800007a4: 25d0776f jal x14,80008200 +800007a8: 80000798 .word 0x80000798 +800007ac: 8000e071 .word 0x8000e071 +800007b0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xd7b88790 +800007b4: 0008af03 lw x30,0(x17) +800007b8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x03f5a9a6 +800007bc: 0008a503 lw x10,0(x17) +800007c0: 00488893 addi x17,x17,4 + +800007c4 : +Zksed_sm4ks_cg_cp_rs2_b10: + sm4ks x9, x30, x10, 2 # perform operation +800007c4: b4af04b3 sm4ks x9,x30,x10,0x2 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zksed_sm4ks_cg_cp_rs2_b10, Zksed_sm4ks_cg_cp_rs2_b10_str) +800007c8: 000a2683 lw x13,0(x20) +800007cc: 00968863 beq x13,x9,800007dc +800007d0: 2310776f jal x14,80008200 +800007d4: 800007c4 .word 0x800007c4 +800007d8: 8000e0a5 .word 0x8000e0a5 +800007dc: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x199cff9b +800007e0: 0008ab03 lw x22,0(x17) +800007e4: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7d9535fc +800007e8: 0008a583 lw x11,0(x17) +800007ec: 00488893 addi x17,x17,4 + +800007f0 : +Zksed_sm4ks_cg_cp_rs2_b11: + sm4ks x16, x22, x11, 1 # perform operation +800007f0: 74bb0833 sm4ks x16,x22,x11,0x1 + # Check if x16 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x16, Zksed_sm4ks_cg_cp_rs2_b11, Zksed_sm4ks_cg_cp_rs2_b11_str) +800007f4: 000a2683 lw x13,0(x20) +800007f8: 01068863 beq x13,x16,80000808 +800007fc: 2050776f jal x14,80008200 +80000800: 800007f0 .word 0x800007f0 +80000804: 8000e0da .word 0x8000e0da +80000808: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x5db2a3c8 +8000080c: 0008ae03 lw x28,0(x17) +80000810: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x948d32ed +80000814: 0008a603 lw x12,0(x17) +80000818: 00488893 addi x17,x17,4 + +8000081c : +Zksed_sm4ks_cg_cp_rs2_b12: + sm4ks x1, x28, x12, 1 # perform operation +8000081c: 74ce00b3 sm4ks x1,x28,x12,0x1 + # Check if x1 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x1, Zksed_sm4ks_cg_cp_rs2_b12, Zksed_sm4ks_cg_cp_rs2_b12_str) +80000820: 000a2683 lw x13,0(x20) +80000824: 00168863 beq x13,x1,80000834 +80000828: 1d90776f jal x14,80008200 +8000082c: 8000081c .word 0x8000081c +80000830: 8000e10f .word 0x8000e10f +80000834: 004a0a13 addi x20,x20,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80000838: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +8000083c: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x7e6451e4 +80000840: 0008ae03 lw x28,0(x17) +80000844: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xb8aac10e +80000848: 0008a683 lw x13,0(x17) +8000084c: 00488893 addi x17,x17,4 + +80000850 : +Zksed_sm4ks_cg_cp_rs2_b13: + sm4ks x12, x28, x13, 3 # perform operation +80000850: f4de0633 sm4ks x12,x28,x13,0x3 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zksed_sm4ks_cg_cp_rs2_b13, Zksed_sm4ks_cg_cp_rs2_b13_str) +80000854: 000a2203 lw x4,0(x20) +80000858: 00c20863 beq x4,x12,80000868 +8000085c: 165072ef jal x5,800081c0 +80000860: 80000850 .word 0x80000850 +80000864: 8000e144 .word 0x8000e144 +80000868: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x69db5fa6 +8000086c: 0008ab83 lw x23,0(x17) +80000870: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x353aee6a +80000874: 0008a703 lw x14,0(x17) +80000878: 00488893 addi x17,x17,4 + +8000087c : +Zksed_sm4ks_cg_cp_rs2_b14: + sm4ks x18, x23, x14, 2 # perform operation +8000087c: b4eb8933 sm4ks x18,x23,x14,0x2 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zksed_sm4ks_cg_cp_rs2_b14, Zksed_sm4ks_cg_cp_rs2_b14_str) +80000880: 000a2203 lw x4,0(x20) +80000884: 01220863 beq x4,x18,80000894 +80000888: 139072ef jal x5,800081c0 +8000088c: 8000087c .word 0x8000087c +80000890: 8000e179 .word 0x8000e179 +80000894: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x58faac9d +80000898: 0008a803 lw x16,0(x17) +8000089c: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x7d22d99d +800008a0: 0008a783 lw x15,0(x17) +800008a4: 00488893 addi x17,x17,4 + +800008a8 : +Zksed_sm4ks_cg_cp_rs2_b15: + sm4ks x0, x16, x15, 3 # perform operation +800008a8: f4f80033 sm4ks x0,x16,x15,0x3 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zksed_sm4ks_cg_cp_rs2_b15, Zksed_sm4ks_cg_cp_rs2_b15_str) +800008ac: 000a2203 lw x4,0(x20) +800008b0: 00020863 beq x4,x0,800008c0 +800008b4: 10d072ef jal x5,800081c0 +800008b8: 800008a8 .word 0x800008a8 +800008bc: 8000e1ae .word 0x8000e1ae +800008c0: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x6ede7186 +800008c4: 0008a583 lw x11,0(x17) +800008c8: 00488893 addi x17,x17,4 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x707b37df +800008cc: 0008a803 lw x16,0(x17) +800008d0: 00488893 addi x17,x17,4 + +800008d4 : +Zksed_sm4ks_cg_cp_rs2_b16: + sm4ks x28, x11, x16, 2 # perform operation +800008d4: b5058e33 sm4ks x28,x11,x16,0x2 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zksed_sm4ks_cg_cp_rs2_b16, Zksed_sm4ks_cg_cp_rs2_b16_str) +800008d8: 000a2203 lw x4,0(x20) +800008dc: 01c20863 beq x4,x28,800008ec +800008e0: 0e1072ef jal x5,800081c0 +800008e4: 800008d4 .word 0x800008d4 +800008e8: 8000e1e3 .word 0x8000e1e3 +800008ec: 004a0a13 addi x20,x20,4 + + mv x28, x17 # switch data pointer register to avoid conflict with test +800008f0: 00088e13 addi x28,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0xd124186f +800008f4: 000e2103 lw x2,0(x28) +800008f8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x159f16bf +800008fc: 000e2883 lw x17,0(x28) +80000900: 004e0e13 addi x28,x28,4 + +80000904 : +Zksed_sm4ks_cg_cp_rs2_b17: + sm4ks x6, x2, x17, 2 # perform operation +80000904: b5110333 sm4ks x6,x2,x17,0x2 + # Check if x6 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x6, Zksed_sm4ks_cg_cp_rs2_b17, Zksed_sm4ks_cg_cp_rs2_b17_str) +80000908: 000a2203 lw x4,0(x20) +8000090c: 00620863 beq x4,x6,8000091c +80000910: 0b1072ef jal x5,800081c0 +80000914: 80000904 .word 0x80000904 +80000918: 8000e218 .word 0x8000e218 +8000091c: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x29) # load rs1: x29 = 0xf85c51e4 +80000920: 000e2e83 lw x29,0(x28) +80000924: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0xe13c4fa7 +80000928: 000e2903 lw x18,0(x28) +8000092c: 004e0e13 addi x28,x28,4 + +80000930 : +Zksed_sm4ks_cg_cp_rs2_b18: + sm4ks x8, x29, x18, 3 # perform operation +80000930: f52e8433 sm4ks x8,x29,x18,0x3 + # Check if x8 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x8, Zksed_sm4ks_cg_cp_rs2_b18, Zksed_sm4ks_cg_cp_rs2_b18_str) +80000934: 000a2203 lw x4,0(x20) +80000938: 00820863 beq x4,x8,80000948 +8000093c: 085072ef jal x5,800081c0 +80000940: 80000930 .word 0x80000930 +80000944: 8000e24d .word 0x8000e24d +80000948: 004a0a13 addi x20,x20,4 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xbe955b3b +8000094c: 000e2d03 lw x26,0(x28) +80000950: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0x59e9124c +80000954: 000e2983 lw x19,0(x28) +80000958: 004e0e13 addi x28,x28,4 + +8000095c : +Zksed_sm4ks_cg_cp_rs2_b19: + sm4ks x30, x26, x19, 2 # perform operation +8000095c: b53d0f33 sm4ks x30,x26,x19,0x2 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zksed_sm4ks_cg_cp_rs2_b19, Zksed_sm4ks_cg_cp_rs2_b19_str) +80000960: 000a2203 lw x4,0(x20) +80000964: 01e20863 beq x4,x30,80000974 +80000968: 059072ef jal x5,800081c0 +8000096c: 8000095c .word 0x8000095c +80000970: 8000e282 .word 0x8000e282 +80000974: 004a0a13 addi x20,x20,4 + + mv x3, x20 # switch signature pointer register to avoid conflict with test +80000978: 000a0193 addi x3,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x9e7495f0 +8000097c: 000e2a83 lw x21,0(x28) +80000980: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x77efa406 +80000984: 000e2a03 lw x20,0(x28) +80000988: 004e0e13 addi x28,x28,4 + +8000098c : +Zksed_sm4ks_cg_cp_rs2_b20: + sm4ks x11, x21, x20, 3 # perform operation +8000098c: f54a85b3 sm4ks x11,x21,x20,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zksed_sm4ks_cg_cp_rs2_b20, Zksed_sm4ks_cg_cp_rs2_b20_str) +80000990: 0001a203 lw x4,0(x3) +80000994: 00b20863 beq x4,x11,800009a4 +80000998: 029072ef jal x5,800081c0 +8000099c: 8000098c .word 0x8000098c +800009a0: 8000e2b7 .word 0x8000e2b7 +800009a4: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xaf69051e +800009a8: 000e2783 lw x15,0(x28) +800009ac: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x8614bfb0 +800009b0: 000e2a83 lw x21,0(x28) +800009b4: 004e0e13 addi x28,x28,4 + +800009b8 : +Zksed_sm4ks_cg_cp_rs2_b21: + sm4ks x13, x15, x21, 0 # perform operation +800009b8: 355786b3 sm4ks x13,x15,x21,0x0 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zksed_sm4ks_cg_cp_rs2_b21, Zksed_sm4ks_cg_cp_rs2_b21_str) +800009bc: 0001a203 lw x4,0(x3) +800009c0: 00d20863 beq x4,x13,800009d0 +800009c4: 7fc072ef jal x5,800081c0 +800009c8: 800009b8 .word 0x800009b8 +800009cc: 8000e2ec .word 0x8000e2ec +800009d0: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0x83ba72a6 +800009d4: 000e2683 lw x13,0(x28) +800009d8: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xcce3b307 +800009dc: 000e2b03 lw x22,0(x28) +800009e0: 004e0e13 addi x28,x28,4 + +800009e4 : +Zksed_sm4ks_cg_cp_rs2_b22: + sm4ks x6, x13, x22, 0 # perform operation +800009e4: 35668333 sm4ks x6,x13,x22,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zksed_sm4ks_cg_cp_rs2_b22, Zksed_sm4ks_cg_cp_rs2_b22_str) +800009e8: 0001a203 lw x4,0(x3) +800009ec: 00620863 beq x4,x6,800009fc +800009f0: 7d0072ef jal x5,800081c0 +800009f4: 800009e4 .word 0x800009e4 +800009f8: 8000e321 .word 0x8000e321 +800009fc: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0xd56326b7 +80000a00: 000e2a83 lw x21,0(x28) +80000a04: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x0cf1a2bf +80000a08: 000e2b83 lw x23,0(x28) +80000a0c: 004e0e13 addi x28,x28,4 + +80000a10 : +Zksed_sm4ks_cg_cp_rs2_b23: + sm4ks x10, x21, x23, 1 # perform operation +80000a10: 757a8533 sm4ks x10,x21,x23,0x1 + # Check if x10 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x10, Zksed_sm4ks_cg_cp_rs2_b23, Zksed_sm4ks_cg_cp_rs2_b23_str) +80000a14: 0001a203 lw x4,0(x3) +80000a18: 00a20863 beq x4,x10,80000a28 +80000a1c: 7a4072ef jal x5,800081c0 +80000a20: 80000a10 .word 0x80000a10 +80000a24: 8000e356 .word 0x8000e356 +80000a28: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0xc15f1051 +80000a2c: 000e2503 lw x10,0(x28) +80000a30: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xbcd543d7 +80000a34: 000e2c03 lw x24,0(x28) +80000a38: 004e0e13 addi x28,x28,4 + +80000a3c : +Zksed_sm4ks_cg_cp_rs2_b24: + sm4ks x12, x10, x24, 0 # perform operation +80000a3c: 35850633 sm4ks x12,x10,x24,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zksed_sm4ks_cg_cp_rs2_b24, Zksed_sm4ks_cg_cp_rs2_b24_str) +80000a40: 0001a203 lw x4,0(x3) +80000a44: 00c20863 beq x4,x12,80000a54 +80000a48: 778072ef jal x5,800081c0 +80000a4c: 80000a3c .word 0x80000a3c +80000a50: 8000e38b .word 0x8000e38b +80000a54: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0x0325aff6 +80000a58: 000e2083 lw x1,0(x28) +80000a5c: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xcaa47ec5 +80000a60: 000e2c83 lw x25,0(x28) +80000a64: 004e0e13 addi x28,x28,4 + +80000a68 : +Zksed_sm4ks_cg_cp_rs2_b25: + sm4ks x14, x1, x25, 0 # perform operation +80000a68: 35908733 sm4ks x14,x1,x25,0x0 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zksed_sm4ks_cg_cp_rs2_b25, Zksed_sm4ks_cg_cp_rs2_b25_str) +80000a6c: 0001a203 lw x4,0(x3) +80000a70: 00e20863 beq x4,x14,80000a80 +80000a74: 74c072ef jal x5,800081c0 +80000a78: 80000a68 .word 0x80000a68 +80000a7c: 8000e3c0 .word 0x8000e3c0 +80000a80: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x3846292f +80000a84: 000e2a03 lw x20,0(x28) +80000a88: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x5381109f +80000a8c: 000e2d03 lw x26,0(x28) +80000a90: 004e0e13 addi x28,x28,4 + +80000a94 : +Zksed_sm4ks_cg_cp_rs2_b26: + sm4ks x29, x20, x26, 2 # perform operation +80000a94: b5aa0eb3 sm4ks x29,x20,x26,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zksed_sm4ks_cg_cp_rs2_b26, Zksed_sm4ks_cg_cp_rs2_b26_str) +80000a98: 0001a203 lw x4,0(x3) +80000a9c: 01d20863 beq x4,x29,80000aac +80000aa0: 720072ef jal x5,800081c0 +80000aa4: 80000a94 .word 0x80000a94 +80000aa8: 8000e3f5 .word 0x8000e3f5 +80000aac: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x33063c60 +80000ab0: 000e2603 lw x12,0(x28) +80000ab4: 004e0e13 addi x28,x28,4 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x380d9a21 +80000ab8: 000e2d83 lw x27,0(x28) +80000abc: 004e0e13 addi x28,x28,4 + +80000ac0 : +Zksed_sm4ks_cg_cp_rs2_b27: + sm4ks x20, x12, x27, 1 # perform operation +80000ac0: 75b60a33 sm4ks x20,x12,x27,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zksed_sm4ks_cg_cp_rs2_b27, Zksed_sm4ks_cg_cp_rs2_b27_str) +80000ac4: 0001a203 lw x4,0(x3) +80000ac8: 01420863 beq x4,x20,80000ad8 +80000acc: 6f4072ef jal x5,800081c0 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 8000e42a .word 0x8000e42a +80000ad8: 00418193 addi x3,x3,4 + + mv x30, x28 # switch data pointer register to avoid conflict with test +80000adc: 000e0f13 addi x30,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x3dfef689 +80000ae0: 000f2883 lw x17,0(x30) +80000ae4: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x5040948c +80000ae8: 000f2e03 lw x28,0(x30) +80000aec: 004f0f13 addi x30,x30,4 + +80000af0 : +Zksed_sm4ks_cg_cp_rs2_b28: + sm4ks x24, x17, x28, 1 # perform operation +80000af0: 75c88c33 sm4ks x24,x17,x28,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zksed_sm4ks_cg_cp_rs2_b28, Zksed_sm4ks_cg_cp_rs2_b28_str) +80000af4: 0001a203 lw x4,0(x3) +80000af8: 01820863 beq x4,x24,80000b08 +80000afc: 6c4072ef jal x5,800081c0 +80000b00: 80000af0 .word 0x80000af0 +80000b04: 8000e45f .word 0x8000e45f +80000b08: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x17b509f7 +80000b0c: 000f2c03 lw x24,0(x30) +80000b10: 004f0f13 addi x30,x30,4 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x48229d75 +80000b14: 000f2e83 lw x29,0(x30) +80000b18: 004f0f13 addi x30,x30,4 + +80000b1c : +Zksed_sm4ks_cg_cp_rs2_b29: + sm4ks x31, x24, x29, 1 # perform operation +80000b1c: 75dc0fb3 sm4ks x31,x24,x29,0x1 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zksed_sm4ks_cg_cp_rs2_b29, Zksed_sm4ks_cg_cp_rs2_b29_str) +80000b20: 0001a203 lw x4,0(x3) +80000b24: 01f20863 beq x4,x31,80000b34 +80000b28: 698072ef jal x5,800081c0 +80000b2c: 80000b1c .word 0x80000b1c +80000b30: 8000e494 .word 0x8000e494 +80000b34: 00418193 addi x3,x3,4 + + mv x16, x30 # switch data pointer register to avoid conflict with test +80000b38: 000f0813 addi x16,x30,0 +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xba40d754 +80000b3c: 00082103 lw x2,0(x16) +80000b40: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xfbadad0a +80000b44: 00082f03 lw x30,0(x16) +80000b48: 00480813 addi x16,x16,4 + +80000b4c : +Zksed_sm4ks_cg_cp_rs2_b30: + sm4ks x9, x2, x30, 0 # perform operation +80000b4c: 35e104b3 sm4ks x9,x2,x30,0x0 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zksed_sm4ks_cg_cp_rs2_b30, Zksed_sm4ks_cg_cp_rs2_b30_str) +80000b50: 0001a203 lw x4,0(x3) +80000b54: 00920863 beq x4,x9,80000b64 +80000b58: 668072ef jal x5,800081c0 +80000b5c: 80000b4c .word 0x80000b4c +80000b60: 8000e4c9 .word 0x8000e4c9 +80000b64: 00418193 addi x3,x3,4 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x931dda71 +80000b68: 00082403 lw x8,0(x16) +80000b6c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x7c31a57a +80000b70: 00082f83 lw x31,0(x16) +80000b74: 00480813 addi x16,x16,4 + +80000b78 : +Zksed_sm4ks_cg_cp_rs2_b31: + sm4ks x20, x8, x31, 3 # perform operation +80000b78: f5f40a33 sm4ks x20,x8,x31,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zksed_sm4ks_cg_cp_rs2_b31, Zksed_sm4ks_cg_cp_rs2_b31_str) +80000b7c: 0001a203 lw x4,0(x3) +80000b80: 01420863 beq x4,x20,80000b90 +80000b84: 63c072ef jal x5,800081c0 +80000b88: 80000b78 .word 0x80000b78 +80000b8c: 8000e4fe .word 0x8000e4fe +80000b90: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x6b349169 +80000b94: 00082683 lw x13,0(x16) +80000b98: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x1e6e3d20 +80000b9c: 00082e03 lw x28,0(x16) +80000ba0: 00480813 addi x16,x16,4 + +80000ba4 : +Zksed_sm4ks_cg_cp_rd_b0: + sm4ks x0, x13, x28, 1 # perform operation +80000ba4: 75c68033 sm4ks x0,x13,x28,0x1 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zksed_sm4ks_cg_cp_rd_b0, Zksed_sm4ks_cg_cp_rd_b0_str) +80000ba8: 0001a203 lw x4,0(x3) +80000bac: 00020863 beq x4,x0,80000bbc +80000bb0: 610072ef jal x5,800081c0 +80000bb4: 80000ba4 .word 0x80000ba4 +80000bb8: 8000e533 .word 0x8000e533 +80000bbc: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x0843c946 +80000bc0: 00082883 lw x17,0(x16) +80000bc4: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x5490d654 +80000bc8: 00082383 lw x7,0(x16) +80000bcc: 00480813 addi x16,x16,4 + +80000bd0 : +Zksed_sm4ks_cg_cp_rd_b1: + sm4ks x1, x17, x7, 1 # perform operation +80000bd0: 747880b3 sm4ks x1,x17,x7,0x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zksed_sm4ks_cg_cp_rd_b1, Zksed_sm4ks_cg_cp_rd_b1_str) +80000bd4: 0001a203 lw x4,0(x3) +80000bd8: 00120863 beq x4,x1,80000be8 +80000bdc: 5e4072ef jal x5,800081c0 +80000be0: 80000bd0 .word 0x80000bd0 +80000be4: 8000e566 .word 0x8000e566 +80000be8: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x7510a41f +80000bec: 00082583 lw x11,0(x16) +80000bf0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x61d985a7 +80000bf4: 00082603 lw x12,0(x16) +80000bf8: 00480813 addi x16,x16,4 + +80000bfc : +Zksed_sm4ks_cg_cp_rd_b2: + sm4ks x2, x11, x12, 3 # perform operation +80000bfc: f4c58133 sm4ks x2,x11,x12,0x3 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zksed_sm4ks_cg_cp_rd_b2, Zksed_sm4ks_cg_cp_rd_b2_str) +80000c00: 0001a203 lw x4,0(x3) +80000c04: 00220863 beq x4,x2,80000c14 +80000c08: 5b8072ef jal x5,800081c0 +80000c0c: 80000bfc .word 0x80000bfc +80000c10: 8000e599 .word 0x8000e599 +80000c14: 00418193 addi x3,x3,4 + + mv x25, x3 # switch signature pointer register to avoid conflict with test +80000c18: 00018c93 addi x25,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xe09a51c7 +80000c1c: 00082083 lw x1,0(x16) +80000c20: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xb7bc7a08 +80000c24: 00082103 lw x2,0(x16) +80000c28: 00480813 addi x16,x16,4 + +80000c2c : +Zksed_sm4ks_cg_cp_rd_b3: + sm4ks x3, x1, x2, 1 # perform operation +80000c2c: 742081b3 sm4ks x3,x1,x2,0x1 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zksed_sm4ks_cg_cp_rd_b3, Zksed_sm4ks_cg_cp_rd_b3_str) +80000c30: 000ca203 lw x4,0(x25) +80000c34: 00320863 beq x4,x3,80000c44 +80000c38: 588072ef jal x5,800081c0 +80000c3c: 80000c2c .word 0x80000c2c +80000c40: 8000e5cc .word 0x8000e5cc +80000c44: 004c8c93 addi x25,x25,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000c48: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000c4c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x3d72009a +80000c50: 00082903 lw x18,0(x16) +80000c54: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x90d502a1 +80000c58: 00082303 lw x6,0(x16) +80000c5c: 00480813 addi x16,x16,4 + +80000c60 : +Zksed_sm4ks_cg_cp_rd_b4: + sm4ks x4, x18, x6, 2 # perform operation +80000c60: b4690233 sm4ks x4,x18,x6,0x2 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zksed_sm4ks_cg_cp_rd_b4, Zksed_sm4ks_cg_cp_rd_b4_str) +80000c64: 000ca383 lw x7,0(x25) +80000c68: 00438863 beq x7,x4,80000c78 +80000c6c: 56c0746f jal x8,800081d8 +80000c70: 80000c60 .word 0x80000c60 +80000c74: 8000e5ff .word 0x8000e5ff +80000c78: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x8d25cc5d +80000c7c: 00082783 lw x15,0(x16) +80000c80: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x4b3af358 +80000c84: 00082e03 lw x28,0(x16) +80000c88: 00480813 addi x16,x16,4 + +80000c8c : +Zksed_sm4ks_cg_cp_rd_b5: + sm4ks x5, x15, x28, 3 # perform operation +80000c8c: f5c782b3 sm4ks x5,x15,x28,0x3 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zksed_sm4ks_cg_cp_rd_b5, Zksed_sm4ks_cg_cp_rd_b5_str) +80000c90: 000ca383 lw x7,0(x25) +80000c94: 00538863 beq x7,x5,80000ca4 +80000c98: 5400746f jal x8,800081d8 +80000c9c: 80000c8c .word 0x80000c8c +80000ca0: 8000e632 .word 0x8000e632 +80000ca4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xd9c2d02f +80000ca8: 00082d83 lw x27,0(x16) +80000cac: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xa67e3890 +80000cb0: 00082c03 lw x24,0(x16) +80000cb4: 00480813 addi x16,x16,4 + +80000cb8 : +Zksed_sm4ks_cg_cp_rd_b6: + sm4ks x6, x27, x24, 1 # perform operation +80000cb8: 758d8333 sm4ks x6,x27,x24,0x1 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zksed_sm4ks_cg_cp_rd_b6, Zksed_sm4ks_cg_cp_rd_b6_str) +80000cbc: 000ca383 lw x7,0(x25) +80000cc0: 00638863 beq x7,x6,80000cd0 +80000cc4: 5140746f jal x8,800081d8 +80000cc8: 80000cb8 .word 0x80000cb8 +80000ccc: 8000e665 .word 0x8000e665 +80000cd0: 004c8c93 addi x25,x25,4 + + mv x13, x7 # switch temp register to avoid conflict with test +80000cd4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000cd8: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x660d61b7 +80000cdc: 00082d03 lw x26,0(x16) +80000ce0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x1ee905a2 +80000ce4: 00082403 lw x8,0(x16) +80000ce8: 00480813 addi x16,x16,4 + +80000cec : +Zksed_sm4ks_cg_cp_rd_b7: + sm4ks x7, x26, x8, 3 # perform operation +80000cec: f48d03b3 sm4ks x7,x26,x8,0x3 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zksed_sm4ks_cg_cp_rd_b7, Zksed_sm4ks_cg_cp_rd_b7_str) +80000cf0: 000ca683 lw x13,0(x25) +80000cf4: 00768863 beq x13,x7,80000d04 +80000cf8: 5080776f jal x14,80008200 +80000cfc: 80000cec .word 0x80000cec +80000d00: 8000e698 .word 0x8000e698 +80000d04: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xb61ae318 +80000d08: 00082383 lw x7,0(x16) +80000d0c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x35ec3205 +80000d10: 00082183 lw x3,0(x16) +80000d14: 00480813 addi x16,x16,4 + +80000d18 : +Zksed_sm4ks_cg_cp_rd_b8: + sm4ks x8, x7, x3, 3 # perform operation +80000d18: f4338433 sm4ks x8,x7,x3,0x3 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zksed_sm4ks_cg_cp_rd_b8, Zksed_sm4ks_cg_cp_rd_b8_str) +80000d1c: 000ca683 lw x13,0(x25) +80000d20: 00868863 beq x13,x8,80000d30 +80000d24: 4dc0776f jal x14,80008200 +80000d28: 80000d18 .word 0x80000d18 +80000d2c: 8000e6cb .word 0x8000e6cb +80000d30: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x101d20b1 +80000d34: 00082083 lw x1,0(x16) +80000d38: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x977ea7c5 +80000d3c: 00082a03 lw x20,0(x16) +80000d40: 00480813 addi x16,x16,4 + +80000d44 : +Zksed_sm4ks_cg_cp_rd_b9: + sm4ks x9, x1, x20, 1 # perform operation +80000d44: 754084b3 sm4ks x9,x1,x20,0x1 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zksed_sm4ks_cg_cp_rd_b9, Zksed_sm4ks_cg_cp_rd_b9_str) +80000d48: 000ca683 lw x13,0(x25) +80000d4c: 00968863 beq x13,x9,80000d5c +80000d50: 4b00776f jal x14,80008200 +80000d54: 80000d44 .word 0x80000d44 +80000d58: 8000e6fe .word 0x8000e6fe +80000d5c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x6cf5a2a2 +80000d60: 00082583 lw x11,0(x16) +80000d64: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xe6622281 +80000d68: 00082e83 lw x29,0(x16) +80000d6c: 00480813 addi x16,x16,4 + +80000d70 : +Zksed_sm4ks_cg_cp_rd_b10: + sm4ks x10, x11, x29, 0 # perform operation +80000d70: 35d58533 sm4ks x10,x11,x29,0x0 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zksed_sm4ks_cg_cp_rd_b10, Zksed_sm4ks_cg_cp_rd_b10_str) +80000d74: 000ca683 lw x13,0(x25) +80000d78: 00a68863 beq x13,x10,80000d88 +80000d7c: 4840776f jal x14,80008200 +80000d80: 80000d70 .word 0x80000d70 +80000d84: 8000e731 .word 0x8000e731 +80000d88: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xa86314ab +80000d8c: 00082e83 lw x29,0(x16) +80000d90: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x774de95c +80000d94: 00082a03 lw x20,0(x16) +80000d98: 00480813 addi x16,x16,4 + +80000d9c : +Zksed_sm4ks_cg_cp_rd_b11: + sm4ks x11, x29, x20, 3 # perform operation +80000d9c: f54e85b3 sm4ks x11,x29,x20,0x3 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zksed_sm4ks_cg_cp_rd_b11, Zksed_sm4ks_cg_cp_rd_b11_str) +80000da0: 000ca683 lw x13,0(x25) +80000da4: 00b68863 beq x13,x11,80000db4 +80000da8: 4580776f jal x14,80008200 +80000dac: 80000d9c .word 0x80000d9c +80000db0: 8000e765 .word 0x8000e765 +80000db4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x48766a9b +80000db8: 00082d03 lw x26,0(x16) +80000dbc: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xb3303938 +80000dc0: 00082f03 lw x30,0(x16) +80000dc4: 00480813 addi x16,x16,4 + +80000dc8 : +Zksed_sm4ks_cg_cp_rd_b12: + sm4ks x12, x26, x30, 1 # perform operation +80000dc8: 75ed0633 sm4ks x12,x26,x30,0x1 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zksed_sm4ks_cg_cp_rd_b12, Zksed_sm4ks_cg_cp_rd_b12_str) +80000dcc: 000ca683 lw x13,0(x25) +80000dd0: 00c68863 beq x13,x12,80000de0 +80000dd4: 42c0776f jal x14,80008200 +80000dd8: 80000dc8 .word 0x80000dc8 +80000ddc: 8000e799 .word 0x8000e799 +80000de0: 004c8c93 addi x25,x25,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000de4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000de8: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xcf4d2434 +80000dec: 00082b03 lw x22,0(x16) +80000df0: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x7fd49752 +80000df4: 00082b83 lw x23,0(x16) +80000df8: 00480813 addi x16,x16,4 + +80000dfc : +Zksed_sm4ks_cg_cp_rd_b13: + sm4ks x13, x22, x23, 0 # perform operation +80000dfc: 357b06b3 sm4ks x13,x22,x23,0x0 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zksed_sm4ks_cg_cp_rd_b13, Zksed_sm4ks_cg_cp_rd_b13_str) +80000e00: 000ca383 lw x7,0(x25) +80000e04: 00d38863 beq x7,x13,80000e14 +80000e08: 3d00746f jal x8,800081d8 +80000e0c: 80000dfc .word 0x80000dfc +80000e10: 8000e7cd .word 0x8000e7cd +80000e14: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xbce73c07 +80000e18: 00082103 lw x2,0(x16) +80000e1c: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xa218a9a3 +80000e20: 00082783 lw x15,0(x16) +80000e24: 00480813 addi x16,x16,4 + +80000e28 : +Zksed_sm4ks_cg_cp_rd_b14: + sm4ks x14, x2, x15, 2 # perform operation +80000e28: b4f10733 sm4ks x14,x2,x15,0x2 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zksed_sm4ks_cg_cp_rd_b14, Zksed_sm4ks_cg_cp_rd_b14_str) +80000e2c: 000ca383 lw x7,0(x25) +80000e30: 00e38863 beq x7,x14,80000e40 +80000e34: 3a40746f jal x8,800081d8 +80000e38: 80000e28 .word 0x80000e28 +80000e3c: 8000e801 .word 0x8000e801 +80000e40: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x50da200c +80000e44: 00082003 lw x0,0(x16) +80000e48: 00480813 addi x16,x16,4 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x75cfe379 +80000e4c: 00082903 lw x18,0(x16) +80000e50: 00480813 addi x16,x16,4 + +80000e54 : +Zksed_sm4ks_cg_cp_rd_b15: + sm4ks x15, x0, x18, 1 # perform operation +80000e54: 752007b3 sm4ks x15,x0,x18,0x1 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zksed_sm4ks_cg_cp_rd_b15, Zksed_sm4ks_cg_cp_rd_b15_str) +80000e58: 000ca383 lw x7,0(x25) +80000e5c: 00f38863 beq x7,x15,80000e6c +80000e60: 3780746f jal x8,800081d8 +80000e64: 80000e54 .word 0x80000e54 +80000e68: 8000e835 .word 0x8000e835 +80000e6c: 004c8c93 addi x25,x25,4 + + mv x3, x16 # switch data pointer register to avoid conflict with test +80000e70: 00080193 addi x3,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0feefa12 +80000e74: 0001a883 lw x17,0(x3) +80000e78: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xca1656ef +80000e7c: 0001a783 lw x15,0(x3) +80000e80: 00418193 addi x3,x3,4 + +80000e84 : +Zksed_sm4ks_cg_cp_rd_b16: + sm4ks x16, x17, x15, 2 # perform operation +80000e84: b4f88833 sm4ks x16,x17,x15,0x2 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zksed_sm4ks_cg_cp_rd_b16, Zksed_sm4ks_cg_cp_rd_b16_str) +80000e88: 000ca383 lw x7,0(x25) +80000e8c: 01038863 beq x7,x16,80000e9c +80000e90: 3480746f jal x8,800081d8 +80000e94: 80000e84 .word 0x80000e84 +80000e98: 8000e869 .word 0x8000e869 +80000e9c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xd4038b7f +80000ea0: 0001ac03 lw x24,0(x3) +80000ea4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xd30626de +80000ea8: 0001aa83 lw x21,0(x3) +80000eac: 00418193 addi x3,x3,4 + +80000eb0 : +Zksed_sm4ks_cg_cp_rd_b17: + sm4ks x17, x24, x21, 3 # perform operation +80000eb0: f55c08b3 sm4ks x17,x24,x21,0x3 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zksed_sm4ks_cg_cp_rd_b17, Zksed_sm4ks_cg_cp_rd_b17_str) +80000eb4: 000ca383 lw x7,0(x25) +80000eb8: 01138863 beq x7,x17,80000ec8 +80000ebc: 31c0746f jal x8,800081d8 +80000ec0: 80000eb0 .word 0x80000eb0 +80000ec4: 8000e89d .word 0x8000e89d +80000ec8: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xeac04425 +80000ecc: 0001a003 lw x0,0(x3) +80000ed0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xe7b799b8 +80000ed4: 0001ab83 lw x23,0(x3) +80000ed8: 00418193 addi x3,x3,4 + +80000edc : +Zksed_sm4ks_cg_cp_rd_b18: + sm4ks x18, x0, x23, 3 # perform operation +80000edc: f5700933 sm4ks x18,x0,x23,0x3 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zksed_sm4ks_cg_cp_rd_b18, Zksed_sm4ks_cg_cp_rd_b18_str) +80000ee0: 000ca383 lw x7,0(x25) +80000ee4: 01238863 beq x7,x18,80000ef4 +80000ee8: 2f00746f jal x8,800081d8 +80000eec: 80000edc .word 0x80000edc +80000ef0: 8000e8d1 .word 0x8000e8d1 +80000ef4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x096a3d10 +80000ef8: 0001a283 lw x5,0(x3) +80000efc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x5449c38e +80000f00: 0001a003 lw x0,0(x3) +80000f04: 00418193 addi x3,x3,4 + +80000f08 : +Zksed_sm4ks_cg_cp_rd_b19: + sm4ks x19, x5, x0, 0 # perform operation +80000f08: 340289b3 sm4ks x19,x5,x0,0x0 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zksed_sm4ks_cg_cp_rd_b19, Zksed_sm4ks_cg_cp_rd_b19_str) +80000f0c: 000ca383 lw x7,0(x25) +80000f10: 01338863 beq x7,x19,80000f20 +80000f14: 2c40746f jal x8,800081d8 +80000f18: 80000f08 .word 0x80000f08 +80000f1c: 8000e905 .word 0x8000e905 +80000f20: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x170145aa +80000f24: 0001a283 lw x5,0(x3) +80000f28: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x48521c82 +80000f2c: 0001ae03 lw x28,0(x3) +80000f30: 00418193 addi x3,x3,4 + +80000f34 : +Zksed_sm4ks_cg_cp_rd_b20: + sm4ks x20, x5, x28, 3 # perform operation +80000f34: f5c28a33 sm4ks x20,x5,x28,0x3 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zksed_sm4ks_cg_cp_rd_b20, Zksed_sm4ks_cg_cp_rd_b20_str) +80000f38: 000ca383 lw x7,0(x25) +80000f3c: 01438863 beq x7,x20,80000f4c +80000f40: 2980746f jal x8,800081d8 +80000f44: 80000f34 .word 0x80000f34 +80000f48: 8000e939 .word 0x8000e939 +80000f4c: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x115f2102 +80000f50: 0001ae83 lw x29,0(x3) +80000f54: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x345b3351 +80000f58: 0001a503 lw x10,0(x3) +80000f5c: 00418193 addi x3,x3,4 + +80000f60 : +Zksed_sm4ks_cg_cp_rd_b21: + sm4ks x21, x29, x10, 0 # perform operation +80000f60: 34ae8ab3 sm4ks x21,x29,x10,0x0 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zksed_sm4ks_cg_cp_rd_b21, Zksed_sm4ks_cg_cp_rd_b21_str) +80000f64: 000ca383 lw x7,0(x25) +80000f68: 01538863 beq x7,x21,80000f78 +80000f6c: 26c0746f jal x8,800081d8 +80000f70: 80000f60 .word 0x80000f60 +80000f74: 8000e96d .word 0x8000e96d +80000f78: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xa10f5d49 +80000f7c: 0001a103 lw x2,0(x3) +80000f80: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xb0191b08 +80000f84: 0001a283 lw x5,0(x3) +80000f88: 00418193 addi x3,x3,4 + +80000f8c : +Zksed_sm4ks_cg_cp_rd_b22: + sm4ks x22, x2, x5, 1 # perform operation +80000f8c: 74510b33 sm4ks x22,x2,x5,0x1 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zksed_sm4ks_cg_cp_rd_b22, Zksed_sm4ks_cg_cp_rd_b22_str) +80000f90: 000ca383 lw x7,0(x25) +80000f94: 01638863 beq x7,x22,80000fa4 +80000f98: 2400746f jal x8,800081d8 +80000f9c: 80000f8c .word 0x80000f8c +80000fa0: 8000e9a1 .word 0x8000e9a1 +80000fa4: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x9e0d9598 +80000fa8: 0001a803 lw x16,0(x3) +80000fac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x2a0a6cf0 +80000fb0: 0001a203 lw x4,0(x3) +80000fb4: 00418193 addi x3,x3,4 + +80000fb8 : +Zksed_sm4ks_cg_cp_rd_b23: + sm4ks x23, x16, x4, 0 # perform operation +80000fb8: 34480bb3 sm4ks x23,x16,x4,0x0 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zksed_sm4ks_cg_cp_rd_b23, Zksed_sm4ks_cg_cp_rd_b23_str) +80000fbc: 000ca383 lw x7,0(x25) +80000fc0: 01738863 beq x7,x23,80000fd0 +80000fc4: 2140746f jal x8,800081d8 +80000fc8: 80000fb8 .word 0x80000fb8 +80000fcc: 8000e9d5 .word 0x8000e9d5 +80000fd0: 004c8c93 addi x25,x25,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xa7329065 +80000fd4: 0001a103 lw x2,0(x3) +80000fd8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7b6b4f81 +80000fdc: 0001a903 lw x18,0(x3) +80000fe0: 00418193 addi x3,x3,4 + +80000fe4 : +Zksed_sm4ks_cg_cp_rd_b24: + sm4ks x24, x2, x18, 2 # perform operation +80000fe4: b5210c33 sm4ks x24,x2,x18,0x2 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zksed_sm4ks_cg_cp_rd_b24, Zksed_sm4ks_cg_cp_rd_b24_str) +80000fe8: 000ca383 lw x7,0(x25) +80000fec: 01838863 beq x7,x24,80000ffc +80000ff0: 1e80746f jal x8,800081d8 +80000ff4: 80000fe4 .word 0x80000fe4 +80000ff8: 8000ea09 .word 0x8000ea09 +80000ffc: 004c8c93 addi x25,x25,4 + + mv x18, x25 # switch signature pointer register to avoid conflict with test +80001000: 000c8913 addi x18,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x993bbd31 +80001004: 0001a803 lw x16,0(x3) +80001008: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x290c3aee +8000100c: 0001ad03 lw x26,0(x3) +80001010: 00418193 addi x3,x3,4 + +80001014 : +Zksed_sm4ks_cg_cp_rd_b25: + sm4ks x25, x16, x26, 3 # perform operation +80001014: f5a80cb3 sm4ks x25,x16,x26,0x3 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zksed_sm4ks_cg_cp_rd_b25, Zksed_sm4ks_cg_cp_rd_b25_str) +80001018: 00092383 lw x7,0(x18) +8000101c: 01938863 beq x7,x25,8000102c +80001020: 1b80746f jal x8,800081d8 +80001024: 80001014 .word 0x80001014 +80001028: 8000ea3d .word 0x8000ea3d +8000102c: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x2f289ba0 +80001030: 0001a883 lw x17,0(x3) +80001034: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xa865c249 +80001038: 0001a283 lw x5,0(x3) +8000103c: 00418193 addi x3,x3,4 + +80001040 : +Zksed_sm4ks_cg_cp_rd_b26: + sm4ks x26, x17, x5, 3 # perform operation +80001040: f4588d33 sm4ks x26,x17,x5,0x3 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cp_rd_b26, Zksed_sm4ks_cg_cp_rd_b26_str) +80001044: 00092383 lw x7,0(x18) +80001048: 01a38863 beq x7,x26,80001058 +8000104c: 18c0746f jal x8,800081d8 +80001050: 80001040 .word 0x80001040 +80001054: 8000ea71 .word 0x8000ea71 +80001058: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x81cd2291 +8000105c: 0001a103 lw x2,0(x3) +80001060: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xc293c3e1 +80001064: 0001aa03 lw x20,0(x3) +80001068: 00418193 addi x3,x3,4 + +8000106c : +Zksed_sm4ks_cg_cp_rd_b27: + sm4ks x27, x2, x20, 2 # perform operation +8000106c: b5410db3 sm4ks x27,x2,x20,0x2 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cp_rd_b27, Zksed_sm4ks_cg_cp_rd_b27_str) +80001070: 00092383 lw x7,0(x18) +80001074: 01b38863 beq x7,x27,80001084 +80001078: 1600746f jal x8,800081d8 +8000107c: 8000106c .word 0x8000106c +80001080: 8000eaa5 .word 0x8000eaa5 +80001084: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x2d59a62f +80001088: 0001a583 lw x11,0(x3) +8000108c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x97eba836 +80001090: 0001a983 lw x19,0(x3) +80001094: 00418193 addi x3,x3,4 + +80001098 : +Zksed_sm4ks_cg_cp_rd_b28: + sm4ks x28, x11, x19, 2 # perform operation +80001098: b5358e33 sm4ks x28,x11,x19,0x2 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cp_rd_b28, Zksed_sm4ks_cg_cp_rd_b28_str) +8000109c: 00092383 lw x7,0(x18) +800010a0: 01c38863 beq x7,x28,800010b0 +800010a4: 1340746f jal x8,800081d8 +800010a8: 80001098 .word 0x80001098 +800010ac: 8000ead9 .word 0x8000ead9 +800010b0: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x4f39ab0a +800010b4: 0001a303 lw x6,0(x3) +800010b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x5fd6939b +800010bc: 0001a283 lw x5,0(x3) +800010c0: 00418193 addi x3,x3,4 + +800010c4 : +Zksed_sm4ks_cg_cp_rd_b29: + sm4ks x29, x6, x5, 0 # perform operation +800010c4: 34530eb3 sm4ks x29,x6,x5,0x0 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cp_rd_b29, Zksed_sm4ks_cg_cp_rd_b29_str) +800010c8: 00092383 lw x7,0(x18) +800010cc: 01d38863 beq x7,x29,800010dc +800010d0: 1080746f jal x8,800081d8 +800010d4: 800010c4 .word 0x800010c4 +800010d8: 8000eb0d .word 0x8000eb0d +800010dc: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7b2277c7 +800010e0: 0001af83 lw x31,0(x3) +800010e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x4bcc3c6c +800010e8: 0001a583 lw x11,0(x3) +800010ec: 00418193 addi x3,x3,4 + +800010f0 : +Zksed_sm4ks_cg_cp_rd_b30: + sm4ks x30, x31, x11, 1 # perform operation +800010f0: 74bf8f33 sm4ks x30,x31,x11,0x1 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cp_rd_b30, Zksed_sm4ks_cg_cp_rd_b30_str) +800010f4: 00092383 lw x7,0(x18) +800010f8: 01e38863 beq x7,x30,80001108 +800010fc: 0dc0746f jal x8,800081d8 +80001100: 800010f0 .word 0x800010f0 +80001104: 8000eb41 .word 0x8000eb41 +80001108: 00490913 addi x18,x18,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xd76450d2 +8000110c: 0001a683 lw x13,0(x3) +80001110: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x94d85ebc +80001114: 0001aa83 lw x21,0(x3) +80001118: 00418193 addi x3,x3,4 + +8000111c : +Zksed_sm4ks_cg_cp_rd_b31: + sm4ks x31, x13, x21, 3 # perform operation +8000111c: f5568fb3 sm4ks x31,x13,x21,0x3 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cp_rd_b31, Zksed_sm4ks_cg_cp_rd_b31_str) +80001120: 00092383 lw x7,0(x18) +80001124: 01f38863 beq x7,x31,80001134 +80001128: 0b00746f jal x8,800081d8 +8000112c: 8000111c .word 0x8000111c +80001130: 8000eb75 .word 0x8000eb75 +80001134: 00490913 addi x18,x18,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +80001138: 0001af03 lw x30,0(x3) +8000113c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xc851ee40 +80001140: 0001ab83 lw x23,0(x3) +80001144: 00418193 addi x3,x3,4 + +80001148 : +Zksed_sm4ks_cg_cp_rs1_edges_0x0: + sm4ks x24, x30, x23, 1 # perform operation +80001148: 757f0c33 sm4ks x24,x30,x23,0x1 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zksed_sm4ks_cg_cp_rs1_edges_0x0, Zksed_sm4ks_cg_cp_rs1_edges_0x0_str) +8000114c: 00092383 lw x7,0(x18) +80001150: 01838863 beq x7,x24,80001160 +80001154: 0840746f jal x8,800081d8 +80001158: 80001148 .word 0x80001148 +8000115c: 8000eba9 .word 0x8000eba9 +80001160: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x00000001 +80001164: 0001ad03 lw x26,0(x3) +80001168: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x644f4e23 +8000116c: 0001a803 lw x16,0(x3) +80001170: 00418193 addi x3,x3,4 + +80001174 : +Zksed_sm4ks_cg_cp_rs1_edges_0x1: + sm4ks x20, x26, x16, 3 # perform operation +80001174: f50d0a33 sm4ks x20,x26,x16,0x3 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cp_rs1_edges_0x1, Zksed_sm4ks_cg_cp_rs1_edges_0x1_str) +80001178: 00092383 lw x7,0(x18) +8000117c: 01438863 beq x7,x20,8000118c +80001180: 0580746f jal x8,800081d8 +80001184: 80001174 .word 0x80001174 +80001188: 8000ebe4 .word 0x8000ebe4 +8000118c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000002 +80001190: 0001af83 lw x31,0(x3) +80001194: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xbfb26729 +80001198: 0001ac83 lw x25,0(x3) +8000119c: 00418193 addi x3,x3,4 + +800011a0 : +Zksed_sm4ks_cg_cp_rs1_edges_0x2: + sm4ks x21, x31, x25, 3 # perform operation +800011a0: f59f8ab3 sm4ks x21,x31,x25,0x3 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zksed_sm4ks_cg_cp_rs1_edges_0x2, Zksed_sm4ks_cg_cp_rs1_edges_0x2_str) +800011a4: 00092383 lw x7,0(x18) +800011a8: 01538863 beq x7,x21,800011b8 +800011ac: 02c0746f jal x8,800081d8 +800011b0: 800011a0 .word 0x800011a0 +800011b4: 8000ec1f .word 0x8000ec1f +800011b8: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x80000000 +800011bc: 0001a703 lw x14,0(x3) +800011c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0xb0641f16 +800011c4: 0001a483 lw x9,0(x3) +800011c8: 00418193 addi x3,x3,4 + +800011cc : +Zksed_sm4ks_cg_cp_rs1_edges_0x80000000: + sm4ks x12, x14, x9, 1 # perform operation +800011cc: 74970633 sm4ks x12,x14,x9,0x1 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cp_rs1_edges_0x80000000, Zksed_sm4ks_cg_cp_rs1_edges_0x80000000_str) +800011d0: 00092383 lw x7,0(x18) +800011d4: 00c38863 beq x7,x12,800011e4 +800011d8: 0000746f jal x8,800081d8 +800011dc: 800011cc .word 0x800011cc +800011e0: 8000ec5a .word 0x8000ec5a +800011e4: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x80000001 +800011e8: 0001ac83 lw x25,0(x3) +800011ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x878692f1 +800011f0: 0001a303 lw x6,0(x3) +800011f4: 00418193 addi x3,x3,4 + +800011f8 : +Zksed_sm4ks_cg_cp_rs1_edges_0x80000001: + sm4ks x9, x25, x6, 3 # perform operation +800011f8: f46c84b3 sm4ks x9,x25,x6,0x3 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cp_rs1_edges_0x80000001, Zksed_sm4ks_cg_cp_rs1_edges_0x80000001_str) +800011fc: 00092383 lw x7,0(x18) +80001200: 00938863 beq x7,x9,80001210 +80001204: 7d50646f jal x8,800081d8 +80001208: 800011f8 .word 0x800011f8 +8000120c: 8000ec9d .word 0x8000ec9d +80001210: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x7fffffff +80001214: 0001ae03 lw x28,0(x3) +80001218: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xc3d07519 +8000121c: 0001a783 lw x15,0(x3) +80001220: 00418193 addi x3,x3,4 + +80001224 : +Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffff: + sm4ks x26, x28, x15, 0 # perform operation +80001224: 34fe0d33 sm4ks x26,x28,x15,0x0 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffff, Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffff_str) +80001228: 00092383 lw x7,0(x18) +8000122c: 01a38863 beq x7,x26,8000123c +80001230: 7a90646f jal x8,800081d8 +80001234: 80001224 .word 0x80001224 +80001238: 8000ece0 .word 0x8000ece0 +8000123c: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x7ffffffe +80001240: 0001ae83 lw x29,0(x3) +80001244: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xd5b1709b +80001248: 0001a103 lw x2,0(x3) +8000124c: 00418193 addi x3,x3,4 + +80001250 : +Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffe: + sm4ks x13, x29, x2, 1 # perform operation +80001250: 742e86b3 sm4ks x13,x29,x2,0x1 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffe, Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffe_str) +80001254: 00092383 lw x7,0(x18) +80001258: 00d38863 beq x7,x13,80001268 +8000125c: 77d0646f jal x8,800081d8 +80001260: 80001250 .word 0x80001250 +80001264: 8000ed23 .word 0x8000ed23 +80001268: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xffffffff +8000126c: 0001a783 lw x15,0(x3) +80001270: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x20545833 +80001274: 0001a983 lw x19,0(x3) +80001278: 00418193 addi x3,x3,4 + +8000127c : +Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff: + sm4ks x10, x15, x19, 0 # perform operation +8000127c: 35378533 sm4ks x10,x15,x19,0x0 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff_str) +80001280: 00092383 lw x7,0(x18) +80001284: 00a38863 beq x7,x10,80001294 +80001288: 7510646f jal x8,800081d8 +8000128c: 8000127c .word 0x8000127c +80001290: 8000ed66 .word 0x8000ed66 +80001294: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0xfffffffe +80001298: 0001a203 lw x4,0(x3) +8000129c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x6ca3ca95 +800012a0: 0001ab83 lw x23,0(x3) +800012a4: 00418193 addi x3,x3,4 + +800012a8 : +Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe: + sm4ks x15, x4, x23, 2 # perform operation +800012a8: b57207b3 sm4ks x15,x4,x23,0x2 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe_str) +800012ac: 00092383 lw x7,0(x18) +800012b0: 00f38863 beq x7,x15,800012c0 +800012b4: 7250646f jal x8,800081d8 +800012b8: 800012a8 .word 0x800012a8 +800012bc: 8000eda9 .word 0x8000eda9 +800012c0: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x5bbc8872 +800012c4: 0001a483 lw x9,0(x3) +800012c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x94b1b0fb +800012cc: 0001aa83 lw x21,0(x3) +800012d0: 00418193 addi x3,x3,4 + +800012d4 : +Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc8872: + sm4ks x1, x9, x21, 0 # perform operation +800012d4: 355480b3 sm4ks x1,x9,x21,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc8872, Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc8872_str) +800012d8: 00092383 lw x7,0(x18) +800012dc: 00138863 beq x7,x1,800012ec +800012e0: 6f90646f jal x8,800081d8 +800012e4: 800012d4 .word 0x800012d4 +800012e8: 8000edec .word 0x8000edec +800012ec: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0xaaaaaaaa +800012f0: 0001a283 lw x5,0(x3) +800012f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xc2ad8efa +800012f8: 0001ac03 lw x24,0(x3) +800012fc: 00418193 addi x3,x3,4 + +80001300 : +Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaa: + sm4ks x30, x5, x24, 0 # perform operation +80001300: 35828f33 sm4ks x30,x5,x24,0x0 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaa, Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaa_str) +80001304: 00092383 lw x7,0(x18) +80001308: 01e38863 beq x7,x30,80001318 +8000130c: 6cd0646f jal x8,800081d8 +80001310: 80001300 .word 0x80001300 +80001314: 8000ee2f .word 0x8000ee2f +80001318: 00490913 addi x18,x18,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x55555555 +8000131c: 0001a883 lw x17,0(x3) +80001320: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x0fb1004a +80001324: 0001af03 lw x30,0(x3) +80001328: 00418193 addi x3,x3,4 + +8000132c : +Zksed_sm4ks_cg_cp_rs1_edges_0x55555555: + sm4ks x25, x17, x30, 1 # perform operation +8000132c: 75e88cb3 sm4ks x25,x17,x30,0x1 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zksed_sm4ks_cg_cp_rs1_edges_0x55555555, Zksed_sm4ks_cg_cp_rs1_edges_0x55555555_str) +80001330: 00092383 lw x7,0(x18) +80001334: 01938863 beq x7,x25,80001344 +80001338: 6a10646f jal x8,800081d8 +8000133c: 8000132c .word 0x8000132c +80001340: 8000ee72 .word 0x8000ee72 +80001344: 00490913 addi x18,x18,4 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x48a74151 +80001348: 0001ab83 lw x23,0(x3) +8000134c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x00000000 +80001350: 0001a483 lw x9,0(x3) +80001354: 00418193 addi x3,x3,4 + +80001358 : +Zksed_sm4ks_cg_cp_rs2_edges_0x0: + sm4ks x30, x23, x9, 2 # perform operation +80001358: b49b8f33 sm4ks x30,x23,x9,0x2 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cp_rs2_edges_0x0, Zksed_sm4ks_cg_cp_rs2_edges_0x0_str) +8000135c: 00092383 lw x7,0(x18) +80001360: 01e38863 beq x7,x30,80001370 +80001364: 6750646f jal x8,800081d8 +80001368: 80001358 .word 0x80001358 +8000136c: 8000eeb5 .word 0x8000eeb5 +80001370: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x5e3c6528 +80001374: 0001a803 lw x16,0(x3) +80001378: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000001 +8000137c: 0001a983 lw x19,0(x3) +80001380: 00418193 addi x3,x3,4 + +80001384 : +Zksed_sm4ks_cg_cp_rs2_edges_0x1: + sm4ks x10, x16, x19, 3 # perform operation +80001384: f5380533 sm4ks x10,x16,x19,0x3 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cp_rs2_edges_0x1, Zksed_sm4ks_cg_cp_rs2_edges_0x1_str) +80001388: 00092383 lw x7,0(x18) +8000138c: 00a38863 beq x7,x10,8000139c +80001390: 6490646f jal x8,800081d8 +80001394: 80001384 .word 0x80001384 +80001398: 8000eef1 .word 0x8000eef1 +8000139c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x935feaa7 +800013a0: 0001ae03 lw x28,0(x3) +800013a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000002 +800013a8: 0001a983 lw x19,0(x3) +800013ac: 00418193 addi x3,x3,4 + +800013b0 : +Zksed_sm4ks_cg_cp_rs2_edges_0x2: + sm4ks x10, x28, x19, 2 # perform operation +800013b0: b53e0533 sm4ks x10,x28,x19,0x2 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cp_rs2_edges_0x2, Zksed_sm4ks_cg_cp_rs2_edges_0x2_str) +800013b4: 00092383 lw x7,0(x18) +800013b8: 00a38863 beq x7,x10,800013c8 +800013bc: 61d0646f jal x8,800081d8 +800013c0: 800013b0 .word 0x800013b0 +800013c4: 8000ef2d .word 0x8000ef2d +800013c8: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x8eef215a +800013cc: 0001ad83 lw x27,0(x3) +800013d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x80000000 +800013d4: 0001a503 lw x10,0(x3) +800013d8: 00418193 addi x3,x3,4 + +800013dc : +Zksed_sm4ks_cg_cp_rs2_edges_0x80000000: + sm4ks x12, x27, x10, 0 # perform operation +800013dc: 34ad8633 sm4ks x12,x27,x10,0x0 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cp_rs2_edges_0x80000000, Zksed_sm4ks_cg_cp_rs2_edges_0x80000000_str) +800013e0: 00092383 lw x7,0(x18) +800013e4: 00c38863 beq x7,x12,800013f4 +800013e8: 5f10646f jal x8,800081d8 +800013ec: 800013dc .word 0x800013dc +800013f0: 8000ef69 .word 0x8000ef69 +800013f4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x0d099369 +800013f8: 0001ad83 lw x27,0(x3) +800013fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000001 +80001400: 0001a783 lw x15,0(x3) +80001404: 00418193 addi x3,x3,4 + +80001408 : +Zksed_sm4ks_cg_cp_rs2_edges_0x80000001: + sm4ks x25, x27, x15, 0 # perform operation +80001408: 34fd8cb3 sm4ks x25,x27,x15,0x0 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zksed_sm4ks_cg_cp_rs2_edges_0x80000001, Zksed_sm4ks_cg_cp_rs2_edges_0x80000001_str) +8000140c: 00092383 lw x7,0(x18) +80001410: 01938863 beq x7,x25,80001420 +80001414: 5c50646f jal x8,800081d8 +80001418: 80001408 .word 0x80001408 +8000141c: 8000efac .word 0x8000efac +80001420: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0xce292a8e +80001424: 0001a303 lw x6,0(x3) +80001428: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x7fffffff +8000142c: 0001a203 lw x4,0(x3) +80001430: 00418193 addi x3,x3,4 + +80001434 : +Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffff: + sm4ks x20, x6, x4, 0 # perform operation +80001434: 34430a33 sm4ks x20,x6,x4,0x0 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffff, Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffff_str) +80001438: 00092383 lw x7,0(x18) +8000143c: 01438863 beq x7,x20,8000144c +80001440: 5990646f jal x8,800081d8 +80001444: 80001434 .word 0x80001434 +80001448: 8000efef .word 0x8000efef +8000144c: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x39aa6c2b +80001450: 0001a703 lw x14,0(x3) +80001454: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7ffffffe +80001458: 0001aa03 lw x20,0(x3) +8000145c: 00418193 addi x3,x3,4 + +80001460 : +Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffe: + sm4ks x30, x14, x20, 0 # perform operation +80001460: 35470f33 sm4ks x30,x14,x20,0x0 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffe, Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffe_str) +80001464: 00092383 lw x7,0(x18) +80001468: 01e38863 beq x7,x30,80001478 +8000146c: 56d0646f jal x8,800081d8 +80001470: 80001460 .word 0x80001460 +80001474: 8000f032 .word 0x8000f032 +80001478: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x757c02b2 +8000147c: 0001a283 lw x5,0(x3) +80001480: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xffffffff +80001484: 0001a083 lw x1,0(x3) +80001488: 00418193 addi x3,x3,4 + +8000148c : +Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff: + sm4ks x29, x5, x1, 2 # perform operation +8000148c: b4128eb3 sm4ks x29,x5,x1,0x2 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff_str) +80001490: 00092383 lw x7,0(x18) +80001494: 01d38863 beq x7,x29,800014a4 +80001498: 5410646f jal x8,800081d8 +8000149c: 8000148c .word 0x8000148c +800014a0: 8000f075 .word 0x8000f075 +800014a4: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x131b496c +800014a8: 0001a483 lw x9,0(x3) +800014ac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0xfffffffe +800014b0: 0001a303 lw x6,0(x3) +800014b4: 00418193 addi x3,x3,4 + +800014b8 : +Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe: + sm4ks x16, x9, x6, 0 # perform operation +800014b8: 34648833 sm4ks x16,x9,x6,0x0 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe_str) +800014bc: 00092383 lw x7,0(x18) +800014c0: 01038863 beq x7,x16,800014d0 +800014c4: 5150646f jal x8,800081d8 +800014c8: 800014b8 .word 0x800014b8 +800014cc: 8000f0b8 .word 0x8000f0b8 +800014d0: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x99a827c1 +800014d4: 0001a983 lw x19,0(x3) +800014d8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x5bbc8872 +800014dc: 0001a083 lw x1,0(x3) +800014e0: 00418193 addi x3,x3,4 + +800014e4 : +Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc8872: + sm4ks x11, x19, x1, 2 # perform operation +800014e4: b41985b3 sm4ks x11,x19,x1,0x2 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc8872, Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc8872_str) +800014e8: 00092383 lw x7,0(x18) +800014ec: 00b38863 beq x7,x11,800014fc +800014f0: 4e90646f jal x8,800081d8 +800014f4: 800014e4 .word 0x800014e4 +800014f8: 8000f0fb .word 0x8000f0fb +800014fc: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x249338ff +80001500: 0001a483 lw x9,0(x3) +80001504: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xaaaaaaaa +80001508: 0001aa83 lw x21,0(x3) +8000150c: 00418193 addi x3,x3,4 + +80001510 : +Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaa: + sm4ks x10, x9, x21, 3 # perform operation +80001510: f5548533 sm4ks x10,x9,x21,0x3 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaa, Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaa_str) +80001514: 00092383 lw x7,0(x18) +80001518: 00a38863 beq x7,x10,80001528 +8000151c: 4bd0646f jal x8,800081d8 +80001520: 80001510 .word 0x80001510 +80001524: 8000f13e .word 0x8000f13e +80001528: 00490913 addi x18,x18,4 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x530f900f +8000152c: 0001ab03 lw x22,0(x3) +80001530: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80001534: 0001ae03 lw x28,0(x3) +80001538: 00418193 addi x3,x3,4 + +8000153c : +Zksed_sm4ks_cg_cp_rs2_edges_0x55555555: + sm4ks x20, x22, x28, 2 # perform operation +8000153c: b5cb0a33 sm4ks x20,x22,x28,0x2 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cp_rs2_edges_0x55555555, Zksed_sm4ks_cg_cp_rs2_edges_0x55555555_str) +80001540: 00092383 lw x7,0(x18) +80001544: 01438863 beq x7,x20,80001554 +80001548: 4910646f jal x8,800081d8 +8000154c: 8000153c .word 0x8000153c +80001550: 8000f181 .word 0x8000f181 +80001554: 00490913 addi x18,x18,4 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +80001558: 0001af03 lw x30,0(x3) +8000155c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x00000000 +80001560: 0001ad03 lw x26,0(x3) +80001564: 00418193 addi x3,x3,4 + +80001568 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sm4ks x15, x30, x26, 3 # perform operation +80001568: f5af07b3 sm4ks x15,x30,x26,0x3 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) +8000156c: 00092383 lw x7,0(x18) +80001570: 00f38863 beq x7,x15,80001580 +80001574: 4650646f jal x8,800081d8 +80001578: 80001568 .word 0x80001568 +8000157c: 8000f1c4 .word 0x8000f1c4 +80001580: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x00000000 +80001584: 0001ab03 lw x22,0(x3) +80001588: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x00000001 +8000158c: 0001a203 lw x4,0(x3) +80001590: 00418193 addi x3,x3,4 + +80001594 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sm4ks x29, x22, x4, 3 # perform operation +80001594: f44b0eb3 sm4ks x29,x22,x4,0x3 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) +80001598: 00092383 lw x7,0(x18) +8000159c: 01d38863 beq x7,x29,800015ac +800015a0: 4390646f jal x8,800081d8 +800015a4: 80001594 .word 0x80001594 +800015a8: 8000f217 .word 0x8000f217 +800015ac: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x00000000 +800015b0: 0001a203 lw x4,0(x3) +800015b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x00000002 +800015b8: 0001ac03 lw x24,0(x3) +800015bc: 00418193 addi x3,x3,4 + +800015c0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sm4ks x9, x4, x24, 3 # perform operation +800015c0: f58204b3 sm4ks x9,x4,x24,0x3 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) +800015c4: 00092383 lw x7,0(x18) +800015c8: 00938863 beq x7,x9,800015d8 +800015cc: 40d0646f jal x8,800081d8 +800015d0: 800015c0 .word 0x800015c0 +800015d4: 8000f26a .word 0x8000f26a +800015d8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000000 +800015dc: 0001a803 lw x16,0(x3) +800015e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000000 +800015e4: 0001ab03 lw x22,0(x3) +800015e8: 00418193 addi x3,x3,4 + +800015ec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000: + sm4ks x20, x16, x22, 2 # perform operation +800015ec: b5680a33 sm4ks x20,x16,x22,0x2 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000000_str) +800015f0: 00092383 lw x7,0(x18) +800015f4: 01438863 beq x7,x20,80001604 +800015f8: 3e10646f jal x8,800081d8 +800015fc: 800015ec .word 0x800015ec +80001600: 8000f2bd .word 0x8000f2bd +80001604: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000000 +80001608: 0001a683 lw x13,0(x3) +8000160c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x80000001 +80001610: 0001ad83 lw x27,0(x3) +80001614: 00418193 addi x3,x3,4 + +80001618 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001: + sm4ks x6, x13, x27, 1 # perform operation +80001618: 75b68333 sm4ks x6,x13,x27,0x1 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x80000001_str) +8000161c: 00092383 lw x7,0(x18) +80001620: 00638863 beq x7,x6,80001630 +80001624: 3b50646f jal x8,800081d8 +80001628: 80001618 .word 0x80001618 +8000162c: 8000f317 .word 0x8000f317 +80001630: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x00000000 +80001634: 0001ad03 lw x26,0(x3) +80001638: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x7fffffff +8000163c: 0001a783 lw x15,0(x3) +80001640: 00418193 addi x3,x3,4 + +80001644 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff: + sm4ks x4, x26, x15, 0 # perform operation +80001644: 34fd0233 sm4ks x4,x26,x15,0x0 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffff_str) +80001648: 00092383 lw x7,0(x18) +8000164c: 00438863 beq x7,x4,8000165c +80001650: 3890646f jal x8,800081d8 +80001654: 80001644 .word 0x80001644 +80001658: 8000f371 .word 0x8000f371 +8000165c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x00000000 +80001660: 0001a503 lw x10,0(x3) +80001664: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x7ffffffe +80001668: 0001ac83 lw x25,0(x3) +8000166c: 00418193 addi x3,x3,4 + +80001670 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe: + sm4ks x24, x10, x25, 0 # perform operation +80001670: 35950c33 sm4ks x24,x10,x25,0x0 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffe_str) +80001674: 00092383 lw x7,0(x18) +80001678: 01838863 beq x7,x24,80001688 +8000167c: 35d0646f jal x8,800081d8 +80001680: 80001670 .word 0x80001670 +80001684: 8000f3cb .word 0x8000f3cb +80001688: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000000 +8000168c: 0001aa03 lw x20,0(x3) +80001690: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xffffffff +80001694: 0001ab83 lw x23,0(x3) +80001698: 00418193 addi x3,x3,4 + +8000169c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sm4ks x17, x20, x23, 3 # perform operation +8000169c: f57a08b3 sm4ks x17,x20,x23,0x3 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) +800016a0: 00092383 lw x7,0(x18) +800016a4: 01138863 beq x7,x17,800016b4 +800016a8: 3310646f jal x8,800081d8 +800016ac: 8000169c .word 0x8000169c +800016b0: 8000f425 .word 0x8000f425 +800016b4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +800016b8: 0001af83 lw x31,0(x3) +800016bc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffe +800016c0: 0001ab83 lw x23,0(x3) +800016c4: 00418193 addi x3,x3,4 + +800016c8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sm4ks x22, x31, x23, 3 # perform operation +800016c8: f57f8b33 sm4ks x22,x31,x23,0x3 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) +800016cc: 00092383 lw x7,0(x18) +800016d0: 01638863 beq x7,x22,800016e0 +800016d4: 3050646f jal x8,800081d8 +800016d8: 800016c8 .word 0x800016c8 +800016dc: 8000f47f .word 0x8000f47f +800016e0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000 +800016e4: 0001af03 lw x30,0(x3) +800016e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x5bbc8872 +800016ec: 0001a983 lw x19,0(x3) +800016f0: 00418193 addi x3,x3,4 + +800016f4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872: + sm4ks x27, x30, x19, 0 # perform operation +800016f4: 353f0db3 sm4ks x27,x30,x19,0x0 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc8872_str) +800016f8: 00092383 lw x7,0(x18) +800016fc: 01b38863 beq x7,x27,8000170c +80001700: 2d90646f jal x8,800081d8 +80001704: 800016f4 .word 0x800016f4 +80001708: 8000f4d9 .word 0x8000f4d9 +8000170c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x00000000 +80001710: 0001a283 lw x5,0(x3) +80001714: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xaaaaaaaa +80001718: 0001aa83 lw x21,0(x3) +8000171c: 00418193 addi x3,x3,4 + +80001720 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa: + sm4ks x27, x5, x21, 1 # perform operation +80001720: 75528db3 sm4ks x27,x5,x21,0x1 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaa_str) +80001724: 00092383 lw x7,0(x18) +80001728: 01b38863 beq x7,x27,80001738 +8000172c: 2ad0646f jal x8,800081d8 +80001730: 80001720 .word 0x80001720 +80001734: 8000f533 .word 0x8000f533 +80001738: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000 +8000173c: 0001af83 lw x31,0(x3) +80001740: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x55555555 +80001744: 0001a083 lw x1,0(x3) +80001748: 00418193 addi x3,x3,4 + +8000174c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555: + sm4ks x2, x31, x1, 1 # perform operation +8000174c: 741f8133 sm4ks x2,x31,x1,0x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x55555555_str) +80001750: 00092383 lw x7,0(x18) +80001754: 00238863 beq x7,x2,80001764 +80001758: 2810646f jal x8,800081d8 +8000175c: 8000174c .word 0x8000174c +80001760: 8000f58d .word 0x8000f58d +80001764: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000001 +80001768: 0001ac83 lw x25,0(x3) +8000176c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x00000000 +80001770: 0001a483 lw x9,0(x3) +80001774: 00418193 addi x3,x3,4 + +80001778 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sm4ks x26, x25, x9, 2 # perform operation +80001778: b49c8d33 sm4ks x26,x25,x9,0x2 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) +8000177c: 00092383 lw x7,0(x18) +80001780: 01a38863 beq x7,x26,80001790 +80001784: 2550646f jal x8,800081d8 +80001788: 80001778 .word 0x80001778 +8000178c: 8000f5e7 .word 0x8000f5e7 +80001790: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000001 +80001794: 0001a803 lw x16,0(x3) +80001798: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x00000001 +8000179c: 0001ad83 lw x27,0(x3) +800017a0: 00418193 addi x3,x3,4 + +800017a4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sm4ks x26, x16, x27, 3 # perform operation +800017a4: f5b80d33 sm4ks x26,x16,x27,0x3 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) +800017a8: 00092383 lw x7,0(x18) +800017ac: 01a38863 beq x7,x26,800017bc +800017b0: 2290646f jal x8,800081d8 +800017b4: 800017a4 .word 0x800017a4 +800017b8: 8000f63a .word 0x8000f63a +800017bc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000001 +800017c0: 0001a683 lw x13,0(x3) +800017c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x00000002 +800017c8: 0001a803 lw x16,0(x3) +800017cc: 00418193 addi x3,x3,4 + +800017d0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sm4ks x29, x13, x16, 1 # perform operation +800017d0: 75068eb3 sm4ks x29,x13,x16,0x1 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) +800017d4: 00092383 lw x7,0(x18) +800017d8: 01d38863 beq x7,x29,800017e8 +800017dc: 1fd0646f jal x8,800081d8 +800017e0: 800017d0 .word 0x800017d0 +800017e4: 8000f68d .word 0x8000f68d +800017e8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x00000001 +800017ec: 0001aa83 lw x21,0(x3) +800017f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x80000000 +800017f4: 0001a203 lw x4,0(x3) +800017f8: 00418193 addi x3,x3,4 + +800017fc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000: + sm4ks x26, x21, x4, 1 # perform operation +800017fc: 744a8d33 sm4ks x26,x21,x4,0x1 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000000_str) +80001800: 00092383 lw x7,0(x18) +80001804: 01a38863 beq x7,x26,80001814 +80001808: 1d10646f jal x8,800081d8 +8000180c: 800017fc .word 0x800017fc +80001810: 8000f6e0 .word 0x8000f6e0 +80001814: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x00000001 +80001818: 0001a483 lw x9,0(x3) +8000181c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x80000001 +80001820: 0001a203 lw x4,0(x3) +80001824: 00418193 addi x3,x3,4 + +80001828 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001: + sm4ks x10, x9, x4, 3 # perform operation +80001828: f4448533 sm4ks x10,x9,x4,0x3 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x80000001_str) +8000182c: 00092383 lw x7,0(x18) +80001830: 00a38863 beq x7,x10,80001840 +80001834: 1a50646f jal x8,800081d8 +80001838: 80001828 .word 0x80001828 +8000183c: 8000f73a .word 0x8000f73a +80001840: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000001 +80001844: 0001af03 lw x30,0(x3) +80001848: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x7fffffff +8000184c: 0001ae03 lw x28,0(x3) +80001850: 00418193 addi x3,x3,4 + +80001854 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff: + sm4ks x31, x30, x28, 3 # perform operation +80001854: f5cf0fb3 sm4ks x31,x30,x28,0x3 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffff_str) +80001858: 00092383 lw x7,0(x18) +8000185c: 01f38863 beq x7,x31,8000186c +80001860: 1790646f jal x8,800081d8 +80001864: 80001854 .word 0x80001854 +80001868: 8000f794 .word 0x8000f794 +8000186c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x00000001 +80001870: 0001a083 lw x1,0(x3) +80001874: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x7ffffffe +80001878: 0001ad83 lw x27,0(x3) +8000187c: 00418193 addi x3,x3,4 + +80001880 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe: + sm4ks x17, x1, x27, 0 # perform operation +80001880: 35b088b3 sm4ks x17,x1,x27,0x0 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffe_str) +80001884: 00092383 lw x7,0(x18) +80001888: 01138863 beq x7,x17,80001898 +8000188c: 14d0646f jal x8,800081d8 +80001890: 80001880 .word 0x80001880 +80001894: 8000f7ee .word 0x8000f7ee +80001898: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x00000001 +8000189c: 0001a603 lw x12,0(x3) +800018a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xffffffff +800018a4: 0001a283 lw x5,0(x3) +800018a8: 00418193 addi x3,x3,4 + +800018ac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sm4ks x11, x12, x5, 3 # perform operation +800018ac: f45605b3 sm4ks x11,x12,x5,0x3 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) +800018b0: 00092383 lw x7,0(x18) +800018b4: 00b38863 beq x7,x11,800018c4 +800018b8: 1210646f jal x8,800081d8 +800018bc: 800018ac .word 0x800018ac +800018c0: 8000f848 .word 0x8000f848 +800018c4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x00000001 +800018c8: 0001aa83 lw x21,0(x3) +800018cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xfffffffe +800018d0: 0001a083 lw x1,0(x3) +800018d4: 00418193 addi x3,x3,4 + +800018d8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sm4ks x4, x21, x1, 1 # perform operation +800018d8: 741a8233 sm4ks x4,x21,x1,0x1 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) +800018dc: 00092383 lw x7,0(x18) +800018e0: 00438863 beq x7,x4,800018f0 +800018e4: 0f50646f jal x8,800081d8 +800018e8: 800018d8 .word 0x800018d8 +800018ec: 8000f8a2 .word 0x8000f8a2 +800018f0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000001 +800018f4: 0001a703 lw x14,0(x3) +800018f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x5bbc8872 +800018fc: 0001af03 lw x30,0(x3) +80001900: 00418193 addi x3,x3,4 + +80001904 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872: + sm4ks x21, x14, x30, 1 # perform operation +80001904: 75e70ab3 sm4ks x21,x14,x30,0x1 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc8872_str) +80001908: 00092383 lw x7,0(x18) +8000190c: 01538863 beq x7,x21,8000191c +80001910: 0c90646f jal x8,800081d8 +80001914: 80001904 .word 0x80001904 +80001918: 8000f8fc .word 0x8000f8fc +8000191c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000001 +80001920: 0001a703 lw x14,0(x3) +80001924: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaa +80001928: 0001a883 lw x17,0(x3) +8000192c: 00418193 addi x3,x3,4 + +80001930 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa: + sm4ks x19, x14, x17, 2 # perform operation +80001930: b51709b3 sm4ks x19,x14,x17,0x2 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaa_str) +80001934: 00092383 lw x7,0(x18) +80001938: 01338863 beq x7,x19,80001948 +8000193c: 09d0646f jal x8,800081d8 +80001940: 80001930 .word 0x80001930 +80001944: 8000f956 .word 0x8000f956 +80001948: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000001 +8000194c: 0001aa03 lw x20,0(x3) +80001950: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x55555555 +80001954: 0001ac03 lw x24,0(x3) +80001958: 00418193 addi x3,x3,4 + +8000195c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555: + sm4ks x13, x20, x24, 1 # perform operation +8000195c: 758a06b3 sm4ks x13,x20,x24,0x1 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x55555555_str) +80001960: 00092383 lw x7,0(x18) +80001964: 00d38863 beq x7,x13,80001974 +80001968: 0710646f jal x8,800081d8 +8000196c: 8000195c .word 0x8000195c +80001970: 8000f9b0 .word 0x8000f9b0 +80001974: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x00000002 +80001978: 0001ad83 lw x27,0(x3) +8000197c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000000 +80001980: 0001a683 lw x13,0(x3) +80001984: 00418193 addi x3,x3,4 + +80001988 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sm4ks x28, x27, x13, 1 # perform operation +80001988: 74dd8e33 sm4ks x28,x27,x13,0x1 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) +8000198c: 00092383 lw x7,0(x18) +80001990: 01c38863 beq x7,x28,800019a0 +80001994: 0450646f jal x8,800081d8 +80001998: 80001988 .word 0x80001988 +8000199c: 8000fa0a .word 0x8000fa0a +800019a0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x00000002 +800019a4: 0001a503 lw x10,0(x3) +800019a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x00000001 +800019ac: 0001a203 lw x4,0(x3) +800019b0: 00418193 addi x3,x3,4 + +800019b4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sm4ks x9, x10, x4, 1 # perform operation +800019b4: 744504b3 sm4ks x9,x10,x4,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) +800019b8: 00092383 lw x7,0(x18) +800019bc: 00938863 beq x7,x9,800019cc +800019c0: 0190646f jal x8,800081d8 +800019c4: 800019b4 .word 0x800019b4 +800019c8: 8000fa5d .word 0x8000fa5d +800019cc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000002 +800019d0: 0001ac03 lw x24,0(x3) +800019d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x00000002 +800019d8: 0001ae83 lw x29,0(x3) +800019dc: 00418193 addi x3,x3,4 + +800019e0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sm4ks x25, x24, x29, 2 # perform operation +800019e0: b5dc0cb3 sm4ks x25,x24,x29,0x2 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) +800019e4: 00092383 lw x7,0(x18) +800019e8: 01938863 beq x7,x25,800019f8 +800019ec: 7ec0646f jal x8,800081d8 +800019f0: 800019e0 .word 0x800019e0 +800019f4: 8000fab0 .word 0x8000fab0 +800019f8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x00000002 +800019fc: 0001a583 lw x11,0(x3) +80001a00: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x80000000 +80001a04: 0001a703 lw x14,0(x3) +80001a08: 00418193 addi x3,x3,4 + +80001a0c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000: + sm4ks x28, x11, x14, 0 # perform operation +80001a0c: 34e58e33 sm4ks x28,x11,x14,0x0 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000000_str) +80001a10: 00092383 lw x7,0(x18) +80001a14: 01c38863 beq x7,x28,80001a24 +80001a18: 7c00646f jal x8,800081d8 +80001a1c: 80001a0c .word 0x80001a0c +80001a20: 8000fb03 .word 0x8000fb03 +80001a24: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000002 +80001a28: 0001ac03 lw x24,0(x3) +80001a2c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x80000001 +80001a30: 0001a783 lw x15,0(x3) +80001a34: 00418193 addi x3,x3,4 + +80001a38 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001: + sm4ks x4, x24, x15, 1 # perform operation +80001a38: 74fc0233 sm4ks x4,x24,x15,0x1 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x80000001_str) +80001a3c: 00092383 lw x7,0(x18) +80001a40: 00438863 beq x7,x4,80001a50 +80001a44: 7940646f jal x8,800081d8 +80001a48: 80001a38 .word 0x80001a38 +80001a4c: 8000fb5d .word 0x8000fb5d +80001a50: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000002 +80001a54: 0001a803 lw x16,0(x3) +80001a58: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7fffffff +80001a5c: 0001ac03 lw x24,0(x3) +80001a60: 00418193 addi x3,x3,4 + +80001a64 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff: + sm4ks x23, x16, x24, 0 # perform operation +80001a64: 35880bb3 sm4ks x23,x16,x24,0x0 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffff_str) +80001a68: 00092383 lw x7,0(x18) +80001a6c: 01738863 beq x7,x23,80001a7c +80001a70: 7680646f jal x8,800081d8 +80001a74: 80001a64 .word 0x80001a64 +80001a78: 8000fbb7 .word 0x8000fbb7 +80001a7c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000002 +80001a80: 0001aa03 lw x20,0(x3) +80001a84: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x7ffffffe +80001a88: 0001a503 lw x10,0(x3) +80001a8c: 00418193 addi x3,x3,4 + +80001a90 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe: + sm4ks x24, x20, x10, 1 # perform operation +80001a90: 74aa0c33 sm4ks x24,x20,x10,0x1 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffe_str) +80001a94: 00092383 lw x7,0(x18) +80001a98: 01838863 beq x7,x24,80001aa8 +80001a9c: 73c0646f jal x8,800081d8 +80001aa0: 80001a90 .word 0x80001a90 +80001aa4: 8000fc11 .word 0x8000fc11 +80001aa8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000002 +80001aac: 0001a803 lw x16,0(x3) +80001ab0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffff +80001ab4: 0001a603 lw x12,0(x3) +80001ab8: 00418193 addi x3,x3,4 + +80001abc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sm4ks x17, x16, x12, 0 # perform operation +80001abc: 34c808b3 sm4ks x17,x16,x12,0x0 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) +80001ac0: 00092383 lw x7,0(x18) +80001ac4: 01138863 beq x7,x17,80001ad4 +80001ac8: 7100646f jal x8,800081d8 +80001acc: 80001abc .word 0x80001abc +80001ad0: 8000fc6b .word 0x8000fc6b +80001ad4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x00000002 +80001ad8: 0001a983 lw x19,0(x3) +80001adc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xfffffffe +80001ae0: 0001ae03 lw x28,0(x3) +80001ae4: 00418193 addi x3,x3,4 + +80001ae8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sm4ks x5, x19, x28, 2 # perform operation +80001ae8: b5c982b3 sm4ks x5,x19,x28,0x2 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) +80001aec: 00092383 lw x7,0(x18) +80001af0: 00538863 beq x7,x5,80001b00 +80001af4: 6e40646f jal x8,800081d8 +80001af8: 80001ae8 .word 0x80001ae8 +80001afc: 8000fcc5 .word 0x8000fcc5 +80001b00: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x00000002 +80001b04: 0001a783 lw x15,0(x3) +80001b08: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x5bbc8872 +80001b0c: 0001a803 lw x16,0(x3) +80001b10: 00418193 addi x3,x3,4 + +80001b14 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872: + sm4ks x1, x15, x16, 2 # perform operation +80001b14: b50780b3 sm4ks x1,x15,x16,0x2 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc8872_str) +80001b18: 00092383 lw x7,0(x18) +80001b1c: 00138863 beq x7,x1,80001b2c +80001b20: 6b80646f jal x8,800081d8 +80001b24: 80001b14 .word 0x80001b14 +80001b28: 8000fd1f .word 0x8000fd1f +80001b2c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000002 +80001b30: 0001a703 lw x14,0(x3) +80001b34: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xaaaaaaaa +80001b38: 0001a683 lw x13,0(x3) +80001b3c: 00418193 addi x3,x3,4 + +80001b40 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa: + sm4ks x9, x14, x13, 1 # perform operation +80001b40: 74d704b3 sm4ks x9,x14,x13,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaa_str) +80001b44: 00092383 lw x7,0(x18) +80001b48: 00938863 beq x7,x9,80001b58 +80001b4c: 68c0646f jal x8,800081d8 +80001b50: 80001b40 .word 0x80001b40 +80001b54: 8000fd79 .word 0x8000fd79 +80001b58: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000002 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x00000002 +80001b5c: 0001a783 lw x15,0(x3) +80001b60: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x55555555 +80001b64: 0001a483 lw x9,0(x3) +80001b68: 00418193 addi x3,x3,4 + +80001b6c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555: + sm4ks x28, x15, x9, 3 # perform operation +80001b6c: f4978e33 sm4ks x28,x15,x9,0x3 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x55555555_str) +80001b70: 00092383 lw x7,0(x18) +80001b74: 01c38863 beq x7,x28,80001b84 +80001b78: 6600646f jal x8,800081d8 +80001b7c: 80001b6c .word 0x80001b6c +80001b80: 8000fdd3 .word 0x8000fdd3 +80001b84: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x80000000 +80001b88: 0001a683 lw x13,0(x3) +80001b8c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000000 +80001b90: 0001a783 lw x15,0(x3) +80001b94: 00418193 addi x3,x3,4 + +80001b98 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0: + sm4ks x22, x13, x15, 0 # perform operation +80001b98: 34f68b33 sm4ks x22,x13,x15,0x0 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x0_str) +80001b9c: 00092383 lw x7,0(x18) +80001ba0: 01638863 beq x7,x22,80001bb0 +80001ba4: 6340646f jal x8,800081d8 +80001ba8: 80001b98 .word 0x80001b98 +80001bac: 8000fe2d .word 0x8000fe2d +80001bb0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x80000000 +80001bb4: 0001a683 lw x13,0(x3) +80001bb8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x00000001 +80001bbc: 0001a203 lw x4,0(x3) +80001bc0: 00418193 addi x3,x3,4 + +80001bc4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1: + sm4ks x10, x13, x4, 0 # perform operation +80001bc4: 34468533 sm4ks x10,x13,x4,0x0 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x1_str) +80001bc8: 00092383 lw x7,0(x18) +80001bcc: 00a38863 beq x7,x10,80001bdc +80001bd0: 6080646f jal x8,800081d8 +80001bd4: 80001bc4 .word 0x80001bc4 +80001bd8: 8000fe87 .word 0x8000fe87 +80001bdc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x80000000 +80001be0: 0001a603 lw x12,0(x3) +80001be4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000002 +80001be8: 0001af83 lw x31,0(x3) +80001bec: 00418193 addi x3,x3,4 + +80001bf0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2: + sm4ks x1, x12, x31, 3 # perform operation +80001bf0: f5f600b3 sm4ks x1,x12,x31,0x3 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x2_str) +80001bf4: 00092383 lw x7,0(x18) +80001bf8: 00138863 beq x7,x1,80001c08 +80001bfc: 5dc0646f jal x8,800081d8 +80001c00: 80001bf0 .word 0x80001bf0 +80001c04: 8000fee1 .word 0x8000fee1 +80001c08: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x80000000 +80001c0c: 0001ad83 lw x27,0(x3) +80001c10: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0x80000000 +80001c14: 0001a203 lw x4,0(x3) +80001c18: 00418193 addi x3,x3,4 + +80001c1c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000: + sm4ks x12, x27, x4, 0 # perform operation +80001c1c: 344d8633 sm4ks x12,x27,x4,0x0 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000000_str) +80001c20: 00092383 lw x7,0(x18) +80001c24: 00c38863 beq x7,x12,80001c34 +80001c28: 5b00646f jal x8,800081d8 +80001c2c: 80001c1c .word 0x80001c1c +80001c30: 8000ff3b .word 0x8000ff3b +80001c34: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x80000000 +80001c38: 0001af03 lw x30,0(x3) +80001c3c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x80000001 +80001c40: 0001ab83 lw x23,0(x3) +80001c44: 00418193 addi x3,x3,4 + +80001c48 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001: + sm4ks x19, x30, x23, 3 # perform operation +80001c48: f57f09b3 sm4ks x19,x30,x23,0x3 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x80000001_str) +80001c4c: 00092383 lw x7,0(x18) +80001c50: 01338863 beq x7,x19,80001c60 +80001c54: 5840646f jal x8,800081d8 +80001c58: 80001c48 .word 0x80001c48 +80001c5c: 8000ff9c .word 0x8000ff9c +80001c60: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x80000000 +80001c64: 0001ac03 lw x24,0(x3) +80001c68: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x7fffffff +80001c6c: 0001ae83 lw x29,0(x3) +80001c70: 00418193 addi x3,x3,4 + +80001c74 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff: + sm4ks x9, x24, x29, 1 # perform operation +80001c74: 75dc04b3 sm4ks x9,x24,x29,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7fffffff_str) +80001c78: 00092383 lw x7,0(x18) +80001c7c: 00938863 beq x7,x9,80001c8c +80001c80: 5580646f jal x8,800081d8 +80001c84: 80001c74 .word 0x80001c74 +80001c88: 8000fffd .word 0x8000fffd +80001c8c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x80000000 +80001c90: 0001a503 lw x10,0(x3) +80001c94: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7ffffffe +80001c98: 0001a883 lw x17,0(x3) +80001c9c: 00418193 addi x3,x3,4 + +80001ca0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe: + sm4ks x27, x10, x17, 3 # perform operation +80001ca0: f5150db3 sm4ks x27,x10,x17,0x3 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x7ffffffe_str) +80001ca4: 00092383 lw x7,0(x18) +80001ca8: 01b38863 beq x7,x27,80001cb8 +80001cac: 52c0646f jal x8,800081d8 +80001cb0: 80001ca0 .word 0x80001ca0 +80001cb4: 8001005e .word 0x8001005e +80001cb8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x80000000 +80001cbc: 0001a883 lw x17,0(x3) +80001cc0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xffffffff +80001cc4: 0001af83 lw x31,0(x3) +80001cc8: 00418193 addi x3,x3,4 + +80001ccc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff: + sm4ks x1, x17, x31, 3 # perform operation +80001ccc: f5f880b3 sm4ks x1,x17,x31,0x3 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xffffffff_str) +80001cd0: 00092383 lw x7,0(x18) +80001cd4: 00138863 beq x7,x1,80001ce4 +80001cd8: 5000646f jal x8,800081d8 +80001cdc: 80001ccc .word 0x80001ccc +80001ce0: 800100bf .word 0x800100bf +80001ce4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x80000000 +80001ce8: 0001af83 lw x31,0(x3) +80001cec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0xfffffffe +80001cf0: 0001a203 lw x4,0(x3) +80001cf4: 00418193 addi x3,x3,4 + +80001cf8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe: + sm4ks x20, x31, x4, 2 # perform operation +80001cf8: b44f8a33 sm4ks x20,x31,x4,0x2 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xfffffffe_str) +80001cfc: 00092383 lw x7,0(x18) +80001d00: 01438863 beq x7,x20,80001d10 +80001d04: 4d40646f jal x8,800081d8 +80001d08: 80001cf8 .word 0x80001cf8 +80001d0c: 80010120 .word 0x80010120 +80001d10: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x80000000 +80001d14: 0001aa83 lw x21,0(x3) +80001d18: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc8872 +80001d1c: 0001ab83 lw x23,0(x3) +80001d20: 00418193 addi x3,x3,4 + +80001d24 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872: + sm4ks x2, x21, x23, 1 # perform operation +80001d24: 757a8133 sm4ks x2,x21,x23,0x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x5bbc8872_str) +80001d28: 00092383 lw x7,0(x18) +80001d2c: 00238863 beq x7,x2,80001d3c +80001d30: 4a80646f jal x8,800081d8 +80001d34: 80001d24 .word 0x80001d24 +80001d38: 80010181 .word 0x80010181 +80001d3c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x80000000 +80001d40: 0001a783 lw x15,0(x3) +80001d44: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xaaaaaaaa +80001d48: 0001af83 lw x31,0(x3) +80001d4c: 00418193 addi x3,x3,4 + +80001d50 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa: + sm4ks x29, x15, x31, 0 # perform operation +80001d50: 35f78eb3 sm4ks x29,x15,x31,0x0 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0xaaaaaaaa_str) +80001d54: 00092383 lw x7,0(x18) +80001d58: 01d38863 beq x7,x29,80001d68 +80001d5c: 47c0646f jal x8,800081d8 +80001d60: 80001d50 .word 0x80001d50 +80001d64: 800101e2 .word 0x800101e2 +80001d68: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000000 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x80000000 +80001d6c: 0001ab03 lw x22,0(x3) +80001d70: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x55555555 +80001d74: 0001a703 lw x14,0(x3) +80001d78: 00418193 addi x3,x3,4 + +80001d7c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555: + sm4ks x11, x22, x14, 0 # perform operation +80001d7c: 34eb05b3 sm4ks x11,x22,x14,0x0 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000000_rs2val_0x55555555_str) +80001d80: 00092383 lw x7,0(x18) +80001d84: 00b38863 beq x7,x11,80001d94 +80001d88: 4500646f jal x8,800081d8 +80001d8c: 80001d7c .word 0x80001d7c +80001d90: 80010243 .word 0x80010243 +80001d94: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x80000001 +80001d98: 0001af03 lw x30,0(x3) +80001d9c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000000 +80001da0: 0001a683 lw x13,0(x3) +80001da4: 00418193 addi x3,x3,4 + +80001da8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0: + sm4ks x6, x30, x13, 1 # perform operation +80001da8: 74df0333 sm4ks x6,x30,x13,0x1 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x0_str) +80001dac: 00092383 lw x7,0(x18) +80001db0: 00638863 beq x7,x6,80001dc0 +80001db4: 4240646f jal x8,800081d8 +80001db8: 80001da8 .word 0x80001da8 +80001dbc: 800102a4 .word 0x800102a4 +80001dc0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x80000001 +80001dc4: 0001a983 lw x19,0(x3) +80001dc8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x00000001 +80001dcc: 0001ab83 lw x23,0(x3) +80001dd0: 00418193 addi x3,x3,4 + +80001dd4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1: + sm4ks x14, x19, x23, 1 # perform operation +80001dd4: 75798733 sm4ks x14,x19,x23,0x1 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x1_str) +80001dd8: 00092383 lw x7,0(x18) +80001ddc: 00e38863 beq x7,x14,80001dec +80001de0: 3f80646f jal x8,800081d8 +80001de4: 80001dd4 .word 0x80001dd4 +80001de8: 800102fe .word 0x800102fe +80001dec: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x80000001 +80001df0: 0001a603 lw x12,0(x3) +80001df4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000002 +80001df8: 0001aa03 lw x20,0(x3) +80001dfc: 00418193 addi x3,x3,4 + +80001e00 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2: + sm4ks x28, x12, x20, 3 # perform operation +80001e00: f5460e33 sm4ks x28,x12,x20,0x3 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x2_str) +80001e04: 00092383 lw x7,0(x18) +80001e08: 01c38863 beq x7,x28,80001e18 +80001e0c: 3cc0646f jal x8,800081d8 +80001e10: 80001e00 .word 0x80001e00 +80001e14: 80010358 .word 0x80010358 +80001e18: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x80000001 +80001e1c: 0001ae03 lw x28,0(x3) +80001e20: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x80000000 +80001e24: 0001a503 lw x10,0(x3) +80001e28: 00418193 addi x3,x3,4 + +80001e2c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000: + sm4ks x17, x28, x10, 1 # perform operation +80001e2c: 74ae08b3 sm4ks x17,x28,x10,0x1 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000000_str) +80001e30: 00092383 lw x7,0(x18) +80001e34: 01138863 beq x7,x17,80001e44 +80001e38: 3a00646f jal x8,800081d8 +80001e3c: 80001e2c .word 0x80001e2c +80001e40: 800103b2 .word 0x800103b2 +80001e44: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x80000001 +80001e48: 0001a683 lw x13,0(x3) +80001e4c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x80000001 +80001e50: 0001a483 lw x9,0(x3) +80001e54: 00418193 addi x3,x3,4 + +80001e58 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001: + sm4ks x4, x13, x9, 0 # perform operation +80001e58: 34968233 sm4ks x4,x13,x9,0x0 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x80000001_str) +80001e5c: 00092383 lw x7,0(x18) +80001e60: 00438863 beq x7,x4,80001e70 +80001e64: 3740646f jal x8,800081d8 +80001e68: 80001e58 .word 0x80001e58 +80001e6c: 80010413 .word 0x80010413 +80001e70: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x80000001 +80001e74: 0001aa83 lw x21,0(x3) +80001e78: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x7fffffff +80001e7c: 0001af83 lw x31,0(x3) +80001e80: 00418193 addi x3,x3,4 + +80001e84 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff: + sm4ks x5, x21, x31, 2 # perform operation +80001e84: b5fa82b3 sm4ks x5,x21,x31,0x2 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7fffffff_str) +80001e88: 00092383 lw x7,0(x18) +80001e8c: 00538863 beq x7,x5,80001e9c +80001e90: 3480646f jal x8,800081d8 +80001e94: 80001e84 .word 0x80001e84 +80001e98: 80010474 .word 0x80010474 +80001e9c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x80000001 +80001ea0: 0001af83 lw x31,0(x3) +80001ea4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7ffffffe +80001ea8: 0001a883 lw x17,0(x3) +80001eac: 00418193 addi x3,x3,4 + +80001eb0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe: + sm4ks x12, x31, x17, 3 # perform operation +80001eb0: f51f8633 sm4ks x12,x31,x17,0x3 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x7ffffffe_str) +80001eb4: 00092383 lw x7,0(x18) +80001eb8: 00c38863 beq x7,x12,80001ec8 +80001ebc: 31c0646f jal x8,800081d8 +80001ec0: 80001eb0 .word 0x80001eb0 +80001ec4: 800104d5 .word 0x800104d5 +80001ec8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x80000001 +80001ecc: 0001ad03 lw x26,0(x3) +80001ed0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xffffffff +80001ed4: 0001ae03 lw x28,0(x3) +80001ed8: 00418193 addi x3,x3,4 + +80001edc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff: + sm4ks x10, x26, x28, 0 # perform operation +80001edc: 35cd0533 sm4ks x10,x26,x28,0x0 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xffffffff_str) +80001ee0: 00092383 lw x7,0(x18) +80001ee4: 00a38863 beq x7,x10,80001ef4 +80001ee8: 2f00646f jal x8,800081d8 +80001eec: 80001edc .word 0x80001edc +80001ef0: 80010536 .word 0x80010536 +80001ef4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x80000001 +80001ef8: 0001ae83 lw x29,0(x3) +80001efc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xfffffffe +80001f00: 0001a603 lw x12,0(x3) +80001f04: 00418193 addi x3,x3,4 + +80001f08 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe: + sm4ks x1, x29, x12, 0 # perform operation +80001f08: 34ce80b3 sm4ks x1,x29,x12,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xfffffffe_str) +80001f0c: 00092383 lw x7,0(x18) +80001f10: 00138863 beq x7,x1,80001f20 +80001f14: 2c40646f jal x8,800081d8 +80001f18: 80001f08 .word 0x80001f08 +80001f1c: 80010597 .word 0x80010597 +80001f20: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000001 +80001f24: 0001a583 lw x11,0(x3) +80001f28: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc8872 +80001f2c: 0001ab83 lw x23,0(x3) +80001f30: 00418193 addi x3,x3,4 + +80001f34 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872: + sm4ks x15, x11, x23, 0 # perform operation +80001f34: 357587b3 sm4ks x15,x11,x23,0x0 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x5bbc8872_str) +80001f38: 00092383 lw x7,0(x18) +80001f3c: 00f38863 beq x7,x15,80001f4c +80001f40: 2980646f jal x8,800081d8 +80001f44: 80001f34 .word 0x80001f34 +80001f48: 800105f8 .word 0x800105f8 +80001f4c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x80000001 +80001f50: 0001a583 lw x11,0(x3) +80001f54: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xaaaaaaaa +80001f58: 0001ac83 lw x25,0(x3) +80001f5c: 00418193 addi x3,x3,4 + +80001f60 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa: + sm4ks x4, x11, x25, 2 # perform operation +80001f60: b5958233 sm4ks x4,x11,x25,0x2 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0xaaaaaaaa_str) +80001f64: 00092383 lw x7,0(x18) +80001f68: 00438863 beq x7,x4,80001f78 +80001f6c: 26c0646f jal x8,800081d8 +80001f70: 80001f60 .word 0x80001f60 +80001f74: 80010659 .word 0x80010659 +80001f78: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x80000001 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x80000001 +80001f7c: 0001aa03 lw x20,0(x3) +80001f80: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x55555555 +80001f84: 0001a583 lw x11,0(x3) +80001f88: 00418193 addi x3,x3,4 + +80001f8c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555: + sm4ks x31, x20, x11, 3 # perform operation +80001f8c: f4ba0fb3 sm4ks x31,x20,x11,0x3 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x80000001_rs2val_0x55555555_str) +80001f90: 00092383 lw x7,0(x18) +80001f94: 01f38863 beq x7,x31,80001fa4 +80001f98: 2400646f jal x8,800081d8 +80001f9c: 80001f8c .word 0x80001f8c +80001fa0: 800106ba .word 0x800106ba +80001fa4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x7fffffff +80001fa8: 0001ab83 lw x23,0(x3) +80001fac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000000 +80001fb0: 0001a983 lw x19,0(x3) +80001fb4: 00418193 addi x3,x3,4 + +80001fb8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0: + sm4ks x6, x23, x19, 0 # perform operation +80001fb8: 353b8333 sm4ks x6,x23,x19,0x0 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x0_str) +80001fbc: 00092383 lw x7,0(x18) +80001fc0: 00638863 beq x7,x6,80001fd0 +80001fc4: 2140646f jal x8,800081d8 +80001fc8: 80001fb8 .word 0x80001fb8 +80001fcc: 8001071b .word 0x8001071b +80001fd0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7fffffff +80001fd4: 0001a583 lw x11,0(x3) +80001fd8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000001 +80001fdc: 0001a783 lw x15,0(x3) +80001fe0: 00418193 addi x3,x3,4 + +80001fe4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1: + sm4ks x30, x11, x15, 3 # perform operation +80001fe4: f4f58f33 sm4ks x30,x11,x15,0x3 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x1_str) +80001fe8: 00092383 lw x7,0(x18) +80001fec: 01e38863 beq x7,x30,80001ffc +80001ff0: 1e80646f jal x8,800081d8 +80001ff4: 80001fe4 .word 0x80001fe4 +80001ff8: 80010775 .word 0x80010775 +80001ffc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x7fffffff +80002000: 0001a103 lw x2,0(x3) +80002004: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000002 +80002008: 0001aa03 lw x20,0(x3) +8000200c: 00418193 addi x3,x3,4 + +80002010 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2: + sm4ks x16, x2, x20, 3 # perform operation +80002010: f5410833 sm4ks x16,x2,x20,0x3 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x2_str) +80002014: 00092383 lw x7,0(x18) +80002018: 01038863 beq x7,x16,80002028 +8000201c: 1bc0646f jal x8,800081d8 +80002020: 80002010 .word 0x80002010 +80002024: 800107cf .word 0x800107cf +80002028: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x7fffffff +8000202c: 0001ae03 lw x28,0(x3) +80002030: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x80000000 +80002034: 0001a583 lw x11,0(x3) +80002038: 00418193 addi x3,x3,4 + +8000203c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000: + sm4ks x9, x28, x11, 2 # perform operation +8000203c: b4be04b3 sm4ks x9,x28,x11,0x2 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000000_str) +80002040: 00092383 lw x7,0(x18) +80002044: 00938863 beq x7,x9,80002054 +80002048: 1900646f jal x8,800081d8 +8000204c: 8000203c .word 0x8000203c +80002050: 80010829 .word 0x80010829 +80002054: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x7fffffff +80002058: 0001af03 lw x30,0(x3) +8000205c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x80000001 +80002060: 0001af83 lw x31,0(x3) +80002064: 00418193 addi x3,x3,4 + +80002068 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001: + sm4ks x17, x30, x31, 3 # perform operation +80002068: f5ff08b3 sm4ks x17,x30,x31,0x3 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x80000001_str) +8000206c: 00092383 lw x7,0(x18) +80002070: 01138863 beq x7,x17,80002080 +80002074: 1640646f jal x8,800081d8 +80002078: 80002068 .word 0x80002068 +8000207c: 8001088a .word 0x8001088a +80002080: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x7fffffff +80002084: 0001a703 lw x14,0(x3) +80002088: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x7fffffff +8000208c: 0001ae83 lw x29,0(x3) +80002090: 00418193 addi x3,x3,4 + +80002094 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff: + sm4ks x21, x14, x29, 2 # perform operation +80002094: b5d70ab3 sm4ks x21,x14,x29,0x2 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7fffffff_str) +80002098: 00092383 lw x7,0(x18) +8000209c: 01538863 beq x7,x21,800020ac +800020a0: 1380646f jal x8,800081d8 +800020a4: 80002094 .word 0x80002094 +800020a8: 800108eb .word 0x800108eb +800020ac: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7fffffff +800020b0: 0001ad03 lw x26,0(x3) +800020b4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7ffffffe +800020b8: 0001ac03 lw x24,0(x3) +800020bc: 00418193 addi x3,x3,4 + +800020c0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe: + sm4ks x31, x26, x24, 1 # perform operation +800020c0: 758d0fb3 sm4ks x31,x26,x24,0x1 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x7ffffffe_str) +800020c4: 00092383 lw x7,0(x18) +800020c8: 01f38863 beq x7,x31,800020d8 +800020cc: 10c0646f jal x8,800081d8 +800020d0: 800020c0 .word 0x800020c0 +800020d4: 8001094c .word 0x8001094c +800020d8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x7fffffff +800020dc: 0001af03 lw x30,0(x3) +800020e0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xffffffff +800020e4: 0001ad03 lw x26,0(x3) +800020e8: 00418193 addi x3,x3,4 + +800020ec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff: + sm4ks x17, x30, x26, 0 # perform operation +800020ec: 35af08b3 sm4ks x17,x30,x26,0x0 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xffffffff_str) +800020f0: 00092383 lw x7,0(x18) +800020f4: 01138863 beq x7,x17,80002104 +800020f8: 0e00646f jal x8,800081d8 +800020fc: 800020ec .word 0x800020ec +80002100: 800109ad .word 0x800109ad +80002104: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7fffffff +80002108: 0001aa83 lw x21,0(x3) +8000210c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xfffffffe +80002110: 0001a683 lw x13,0(x3) +80002114: 00418193 addi x3,x3,4 + +80002118 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe: + sm4ks x20, x21, x13, 0 # perform operation +80002118: 34da8a33 sm4ks x20,x21,x13,0x0 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xfffffffe_str) +8000211c: 00092383 lw x7,0(x18) +80002120: 01438863 beq x7,x20,80002130 +80002124: 0b40646f jal x8,800081d8 +80002128: 80002118 .word 0x80002118 +8000212c: 80010a0e .word 0x80010a0e +80002130: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x7fffffff +80002134: 0001a503 lw x10,0(x3) +80002138: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x5bbc8872 +8000213c: 0001ad83 lw x27,0(x3) +80002140: 00418193 addi x3,x3,4 + +80002144 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872: + sm4ks x21, x10, x27, 2 # perform operation +80002144: b5b50ab3 sm4ks x21,x10,x27,0x2 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x5bbc8872_str) +80002148: 00092383 lw x7,0(x18) +8000214c: 01538863 beq x7,x21,8000215c +80002150: 0880646f jal x8,800081d8 +80002154: 80002144 .word 0x80002144 +80002158: 80010a6f .word 0x80010a6f +8000215c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x7fffffff +80002160: 0001ad83 lw x27,0(x3) +80002164: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xaaaaaaaa +80002168: 0001a603 lw x12,0(x3) +8000216c: 00418193 addi x3,x3,4 + +80002170 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa: + sm4ks x23, x27, x12, 2 # perform operation +80002170: b4cd8bb3 sm4ks x23,x27,x12,0x2 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0xaaaaaaaa_str) +80002174: 00092383 lw x7,0(x18) +80002178: 01738863 beq x7,x23,80002188 +8000217c: 05c0646f jal x8,800081d8 +80002180: 80002170 .word 0x80002170 +80002184: 80010ad0 .word 0x80010ad0 +80002188: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x7fffffff +8000218c: 0001af03 lw x30,0(x3) +80002190: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x55555555 +80002194: 0001ae03 lw x28,0(x3) +80002198: 00418193 addi x3,x3,4 + +8000219c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555: + sm4ks x2, x30, x28, 2 # perform operation +8000219c: b5cf0133 sm4ks x2,x30,x28,0x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffff_rs2val_0x55555555_str) +800021a0: 00092383 lw x7,0(x18) +800021a4: 00238863 beq x7,x2,800021b4 +800021a8: 0300646f jal x8,800081d8 +800021ac: 8000219c .word 0x8000219c +800021b0: 80010b31 .word 0x80010b31 +800021b4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7ffffffe +800021b8: 0001ac03 lw x24,0(x3) +800021bc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000000 +800021c0: 0001a983 lw x19,0(x3) +800021c4: 00418193 addi x3,x3,4 + +800021c8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0: + sm4ks x31, x24, x19, 1 # perform operation +800021c8: 753c0fb3 sm4ks x31,x24,x19,0x1 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x0_str) +800021cc: 00092383 lw x7,0(x18) +800021d0: 01f38863 beq x7,x31,800021e0 +800021d4: 0040646f jal x8,800081d8 +800021d8: 800021c8 .word 0x800021c8 +800021dc: 80010b92 .word 0x80010b92 +800021e0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x7ffffffe +800021e4: 0001a703 lw x14,0(x3) +800021e8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000001 +800021ec: 0001a883 lw x17,0(x3) +800021f0: 00418193 addi x3,x3,4 + +800021f4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1: + sm4ks x15, x14, x17, 0 # perform operation +800021f4: 351707b3 sm4ks x15,x14,x17,0x0 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x1_str) +800021f8: 00092383 lw x7,0(x18) +800021fc: 00f38863 beq x7,x15,8000220c +80002200: 7d90546f jal x8,800081d8 +80002204: 800021f4 .word 0x800021f4 +80002208: 80010bec .word 0x80010bec +8000220c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x7ffffffe +80002210: 0001a883 lw x17,0(x3) +80002214: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000002 +80002218: 0001a783 lw x15,0(x3) +8000221c: 00418193 addi x3,x3,4 + +80002220 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2: + sm4ks x12, x17, x15, 2 # perform operation +80002220: b4f88633 sm4ks x12,x17,x15,0x2 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x2_str) +80002224: 00092383 lw x7,0(x18) +80002228: 00c38863 beq x7,x12,80002238 +8000222c: 7ad0546f jal x8,800081d8 +80002230: 80002220 .word 0x80002220 +80002234: 80010c46 .word 0x80010c46 +80002238: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7ffffffe +8000223c: 0001af83 lw x31,0(x3) +80002240: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x80000000 +80002244: 0001af03 lw x30,0(x3) +80002248: 00418193 addi x3,x3,4 + +8000224c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000: + sm4ks x1, x31, x30, 0 # perform operation +8000224c: 35ef80b3 sm4ks x1,x31,x30,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000000_str) +80002250: 00092383 lw x7,0(x18) +80002254: 00138863 beq x7,x1,80002264 +80002258: 7810546f jal x8,800081d8 +8000225c: 8000224c .word 0x8000224c +80002260: 80010ca0 .word 0x80010ca0 +80002264: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7ffffffe +80002268: 0001aa83 lw x21,0(x3) +8000226c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x80000001 +80002270: 0001ae03 lw x28,0(x3) +80002274: 00418193 addi x3,x3,4 + +80002278 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001: + sm4ks x6, x21, x28, 2 # perform operation +80002278: b5ca8333 sm4ks x6,x21,x28,0x2 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x80000001_str) +8000227c: 00092383 lw x7,0(x18) +80002280: 00638863 beq x7,x6,80002290 +80002284: 7550546f jal x8,800081d8 +80002288: 80002278 .word 0x80002278 +8000228c: 80010d01 .word 0x80010d01 +80002290: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7ffffffe +80002294: 0001ac83 lw x25,0(x3) +80002298: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x7fffffff +8000229c: 0001ab03 lw x22,0(x3) +800022a0: 00418193 addi x3,x3,4 + +800022a4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff: + sm4ks x27, x25, x22, 1 # perform operation +800022a4: 756c8db3 sm4ks x27,x25,x22,0x1 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7fffffff_str) +800022a8: 00092383 lw x7,0(x18) +800022ac: 01b38863 beq x7,x27,800022bc +800022b0: 7290546f jal x8,800081d8 +800022b4: 800022a4 .word 0x800022a4 +800022b8: 80010d62 .word 0x80010d62 +800022bc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7ffffffe +800022c0: 0001aa83 lw x21,0(x3) +800022c4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x7ffffffe +800022c8: 0001a983 lw x19,0(x3) +800022cc: 00418193 addi x3,x3,4 + +800022d0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe: + sm4ks x2, x21, x19, 1 # perform operation +800022d0: 753a8133 sm4ks x2,x21,x19,0x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x7ffffffe_str) +800022d4: 00092383 lw x7,0(x18) +800022d8: 00238863 beq x7,x2,800022e8 +800022dc: 6fd0546f jal x8,800081d8 +800022e0: 800022d0 .word 0x800022d0 +800022e4: 80010dc3 .word 0x80010dc3 +800022e8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x7ffffffe +800022ec: 0001aa03 lw x20,0(x3) +800022f0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xffffffff +800022f4: 0001a783 lw x15,0(x3) +800022f8: 00418193 addi x3,x3,4 + +800022fc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff: + sm4ks x30, x20, x15, 2 # perform operation +800022fc: b4fa0f33 sm4ks x30,x20,x15,0x2 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xffffffff_str) +80002300: 00092383 lw x7,0(x18) +80002304: 01e38863 beq x7,x30,80002314 +80002308: 6d10546f jal x8,800081d8 +8000230c: 800022fc .word 0x800022fc +80002310: 80010e24 .word 0x80010e24 +80002314: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x7ffffffe +80002318: 0001aa03 lw x20,0(x3) +8000231c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xfffffffe +80002320: 0001a703 lw x14,0(x3) +80002324: 00418193 addi x3,x3,4 + +80002328 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe: + sm4ks x9, x20, x14, 3 # perform operation +80002328: f4ea04b3 sm4ks x9,x20,x14,0x3 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xfffffffe_str) +8000232c: 00092383 lw x7,0(x18) +80002330: 00938863 beq x7,x9,80002340 +80002334: 6a50546f jal x8,800081d8 +80002338: 80002328 .word 0x80002328 +8000233c: 80010e85 .word 0x80010e85 +80002340: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x7ffffffe +80002344: 0001ab83 lw x23,0(x3) +80002348: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0x5bbc8872 +8000234c: 0001a283 lw x5,0(x3) +80002350: 00418193 addi x3,x3,4 + +80002354 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872: + sm4ks x17, x23, x5, 1 # perform operation +80002354: 745b88b3 sm4ks x17,x23,x5,0x1 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x5bbc8872_str) +80002358: 00092383 lw x7,0(x18) +8000235c: 01138863 beq x7,x17,8000236c +80002360: 6790546f jal x8,800081d8 +80002364: 80002354 .word 0x80002354 +80002368: 80010ee6 .word 0x80010ee6 +8000236c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x7ffffffe +80002370: 0001aa83 lw x21,0(x3) +80002374: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs2: x4 = 0xaaaaaaaa +80002378: 0001a203 lw x4,0(x3) +8000237c: 00418193 addi x3,x3,4 + +80002380 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa: + sm4ks x6, x21, x4, 3 # perform operation +80002380: f44a8333 sm4ks x6,x21,x4,0x3 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0xaaaaaaaa_str) +80002384: 00092383 lw x7,0(x18) +80002388: 00638863 beq x7,x6,80002398 +8000238c: 64d0546f jal x8,800081d8 +80002390: 80002380 .word 0x80002380 +80002394: 80010f47 .word 0x80010f47 +80002398: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7ffffffe +8000239c: 0001ac03 lw x24,0(x3) +800023a0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x55555555 +800023a4: 0001a803 lw x16,0(x3) +800023a8: 00418193 addi x3,x3,4 + +800023ac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555: + sm4ks x1, x24, x16, 1 # perform operation +800023ac: 750c00b3 sm4ks x1,x24,x16,0x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffe_rs2val_0x55555555_str) +800023b0: 00092383 lw x7,0(x18) +800023b4: 00138863 beq x7,x1,800023c4 +800023b8: 6210546f jal x8,800081d8 +800023bc: 800023ac .word 0x800023ac +800023c0: 80010fa8 .word 0x80010fa8 +800023c4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xffffffff +800023c8: 0001aa83 lw x21,0(x3) +800023cc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x00000000 +800023d0: 0001a303 lw x6,0(x3) +800023d4: 00418193 addi x3,x3,4 + +800023d8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sm4ks x24, x21, x6, 0 # perform operation +800023d8: 346a8c33 sm4ks x24,x21,x6,0x0 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) +800023dc: 00092383 lw x7,0(x18) +800023e0: 01838863 beq x7,x24,800023f0 +800023e4: 5f50546f jal x8,800081d8 +800023e8: 800023d8 .word 0x800023d8 +800023ec: 80011009 .word 0x80011009 +800023f0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xffffffff +800023f4: 0001af03 lw x30,0(x3) +800023f8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000001 +800023fc: 0001a883 lw x17,0(x3) +80002400: 00418193 addi x3,x3,4 + +80002404 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sm4ks x12, x30, x17, 3 # perform operation +80002404: f51f0633 sm4ks x12,x30,x17,0x3 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) +80002408: 00092383 lw x7,0(x18) +8000240c: 00c38863 beq x7,x12,8000241c +80002410: 5c90546f jal x8,800081d8 +80002414: 80002404 .word 0x80002404 +80002418: 80011063 .word 0x80011063 +8000241c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xffffffff +80002420: 0001a783 lw x15,0(x3) +80002424: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x00000002 +80002428: 0001a083 lw x1,0(x3) +8000242c: 00418193 addi x3,x3,4 + +80002430 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sm4ks x29, x15, x1, 3 # perform operation +80002430: f4178eb3 sm4ks x29,x15,x1,0x3 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) +80002434: 00092383 lw x7,0(x18) +80002438: 01d38863 beq x7,x29,80002448 +8000243c: 59d0546f jal x8,800081d8 +80002440: 80002430 .word 0x80002430 +80002444: 800110bd .word 0x800110bd +80002448: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xffffffff +8000244c: 0001ac83 lw x25,0(x3) +80002450: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000000 +80002454: 0001ab03 lw x22,0(x3) +80002458: 00418193 addi x3,x3,4 + +8000245c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000: + sm4ks x17, x25, x22, 2 # perform operation +8000245c: b56c88b3 sm4ks x17,x25,x22,0x2 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000000_str) +80002460: 00092383 lw x7,0(x18) +80002464: 01138863 beq x7,x17,80002474 +80002468: 5710546f jal x8,800081d8 +8000246c: 8000245c .word 0x8000245c +80002470: 80011117 .word 0x80011117 +80002474: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xffffffff +80002478: 0001a683 lw x13,0(x3) +8000247c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x80000001 +80002480: 0001a583 lw x11,0(x3) +80002484: 00418193 addi x3,x3,4 + +80002488 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001: + sm4ks x29, x13, x11, 0 # perform operation +80002488: 34b68eb3 sm4ks x29,x13,x11,0x0 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x80000001_str) +8000248c: 00092383 lw x7,0(x18) +80002490: 01d38863 beq x7,x29,800024a0 +80002494: 5450546f jal x8,800081d8 +80002498: 80002488 .word 0x80002488 +8000249c: 80011178 .word 0x80011178 +800024a0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xffffffff +800024a4: 0001a483 lw x9,0(x3) +800024a8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x7fffffff +800024ac: 0001a303 lw x6,0(x3) +800024b0: 00418193 addi x3,x3,4 + +800024b4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff: + sm4ks x10, x9, x6, 3 # perform operation +800024b4: f4648533 sm4ks x10,x9,x6,0x3 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffff_str) +800024b8: 00092383 lw x7,0(x18) +800024bc: 00a38863 beq x7,x10,800024cc +800024c0: 5190546f jal x8,800081d8 +800024c4: 800024b4 .word 0x800024b4 +800024c8: 800111d9 .word 0x800111d9 +800024cc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xffffffff +800024d0: 0001a103 lw x2,0(x3) +800024d4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7ffffffe +800024d8: 0001ac03 lw x24,0(x3) +800024dc: 00418193 addi x3,x3,4 + +800024e0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe: + sm4ks x30, x2, x24, 1 # perform operation +800024e0: 75810f33 sm4ks x30,x2,x24,0x1 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffe_str) +800024e4: 00092383 lw x7,0(x18) +800024e8: 01e38863 beq x7,x30,800024f8 +800024ec: 4ed0546f jal x8,800081d8 +800024f0: 800024e0 .word 0x800024e0 +800024f4: 8001123a .word 0x8001123a +800024f8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xffffffff +800024fc: 0001aa83 lw x21,0(x3) +80002500: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xffffffff +80002504: 0001a283 lw x5,0(x3) +80002508: 00418193 addi x3,x3,4 + +8000250c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sm4ks x9, x21, x5, 2 # perform operation +8000250c: b45a84b3 sm4ks x9,x21,x5,0x2 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) +80002510: 00092383 lw x7,0(x18) +80002514: 00938863 beq x7,x9,80002524 +80002518: 4c10546f jal x8,800081d8 +8000251c: 8000250c .word 0x8000250c +80002520: 8001129b .word 0x8001129b +80002524: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xffffffff +80002528: 0001af83 lw x31,0(x3) +8000252c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xfffffffe +80002530: 0001aa03 lw x20,0(x3) +80002534: 00418193 addi x3,x3,4 + +80002538 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sm4ks x9, x31, x20, 1 # perform operation +80002538: 754f84b3 sm4ks x9,x31,x20,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) +8000253c: 00092383 lw x7,0(x18) +80002540: 00938863 beq x7,x9,80002550 +80002544: 4950546f jal x8,800081d8 +80002548: 80002538 .word 0x80002538 +8000254c: 800112fc .word 0x800112fc +80002550: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xffffffff +80002554: 0001af03 lw x30,0(x3) +80002558: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x5bbc8872 +8000255c: 0001a783 lw x15,0(x3) +80002560: 00418193 addi x3,x3,4 + +80002564 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872: + sm4ks x1, x30, x15, 0 # perform operation +80002564: 34ff00b3 sm4ks x1,x30,x15,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc8872_str) +80002568: 00092383 lw x7,0(x18) +8000256c: 00138863 beq x7,x1,8000257c +80002570: 4690546f jal x8,800081d8 +80002574: 80002564 .word 0x80002564 +80002578: 8001135d .word 0x8001135d +8000257c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xffffffff +80002580: 0001aa83 lw x21,0(x3) +80002584: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xaaaaaaaa +80002588: 0001af03 lw x30,0(x3) +8000258c: 00418193 addi x3,x3,4 + +80002590 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa: + sm4ks x23, x21, x30, 3 # perform operation +80002590: f5ea8bb3 sm4ks x23,x21,x30,0x3 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaa_str) +80002594: 00092383 lw x7,0(x18) +80002598: 01738863 beq x7,x23,800025a8 +8000259c: 43d0546f jal x8,800081d8 +800025a0: 80002590 .word 0x80002590 +800025a4: 800113be .word 0x800113be +800025a8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffff rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xffffffff +800025ac: 0001a083 lw x1,0(x3) +800025b0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x55555555 +800025b4: 0001a983 lw x19,0(x3) +800025b8: 00418193 addi x3,x3,4 + +800025bc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555: + sm4ks x27, x1, x19, 3 # perform operation +800025bc: f5308db3 sm4ks x27,x1,x19,0x3 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x55555555_str) +800025c0: 00092383 lw x7,0(x18) +800025c4: 01b38863 beq x7,x27,800025d4 +800025c8: 4110546f jal x8,800081d8 +800025cc: 800025bc .word 0x800025bc +800025d0: 8001141f .word 0x8001141f +800025d4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +800025d8: 0001af83 lw x31,0(x3) +800025dc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000000 +800025e0: 0001a103 lw x2,0(x3) +800025e4: 00418193 addi x3,x3,4 + +800025e8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sm4ks x6, x31, x2, 0 # perform operation +800025e8: 342f8333 sm4ks x6,x31,x2,0x0 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) +800025ec: 00092383 lw x7,0(x18) +800025f0: 00638863 beq x7,x6,80002600 +800025f4: 3e50546f jal x8,800081d8 +800025f8: 800025e8 .word 0x800025e8 +800025fc: 80011480 .word 0x80011480 +80002600: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0xfffffffe +80002604: 0001a683 lw x13,0(x3) +80002608: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000001 +8000260c: 0001aa03 lw x20,0(x3) +80002610: 00418193 addi x3,x3,4 + +80002614 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sm4ks x30, x13, x20, 2 # perform operation +80002614: b5468f33 sm4ks x30,x13,x20,0x2 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) +80002618: 00092383 lw x7,0(x18) +8000261c: 01e38863 beq x7,x30,8000262c +80002620: 3b90546f jal x8,800081d8 +80002624: 80002614 .word 0x80002614 +80002628: 800114da .word 0x800114da +8000262c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +80002630: 0001af83 lw x31,0(x3) +80002634: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000002 +80002638: 0001a883 lw x17,0(x3) +8000263c: 00418193 addi x3,x3,4 + +80002640 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sm4ks x10, x31, x17, 2 # perform operation +80002640: b51f8533 sm4ks x10,x31,x17,0x2 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) +80002644: 00092383 lw x7,0(x18) +80002648: 00a38863 beq x7,x10,80002658 +8000264c: 38d0546f jal x8,800081d8 +80002650: 80002640 .word 0x80002640 +80002654: 80011534 .word 0x80011534 +80002658: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffe +8000265c: 0001af83 lw x31,0(x3) +80002660: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x80000000 +80002664: 0001a983 lw x19,0(x3) +80002668: 00418193 addi x3,x3,4 + +8000266c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000: + sm4ks x1, x31, x19, 3 # perform operation +8000266c: f53f80b3 sm4ks x1,x31,x19,0x3 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000000_str) +80002670: 00092383 lw x7,0(x18) +80002674: 00138863 beq x7,x1,80002684 +80002678: 3610546f jal x8,800081d8 +8000267c: 8000266c .word 0x8000266c +80002680: 8001158e .word 0x8001158e +80002684: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0xfffffffe +80002688: 0001a503 lw x10,0(x3) +8000268c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x80000001 +80002690: 0001ad03 lw x26,0(x3) +80002694: 00418193 addi x3,x3,4 + +80002698 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001: + sm4ks x11, x10, x26, 2 # perform operation +80002698: b5a505b3 sm4ks x11,x10,x26,0x2 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x80000001_str) +8000269c: 00092383 lw x7,0(x18) +800026a0: 00b38863 beq x7,x11,800026b0 +800026a4: 3350546f jal x8,800081d8 +800026a8: 80002698 .word 0x80002698 +800026ac: 800115ef .word 0x800115ef +800026b0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xfffffffe +800026b4: 0001ad03 lw x26,0(x3) +800026b8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x7fffffff +800026bc: 0001a083 lw x1,0(x3) +800026c0: 00418193 addi x3,x3,4 + +800026c4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff: + sm4ks x22, x26, x1, 1 # perform operation +800026c4: 741d0b33 sm4ks x22,x26,x1,0x1 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffff_str) +800026c8: 00092383 lw x7,0(x18) +800026cc: 01638863 beq x7,x22,800026dc +800026d0: 3090546f jal x8,800081d8 +800026d4: 800026c4 .word 0x800026c4 +800026d8: 80011650 .word 0x80011650 +800026dc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xfffffffe +800026e0: 0001ae03 lw x28,0(x3) +800026e4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x7ffffffe +800026e8: 0001a083 lw x1,0(x3) +800026ec: 00418193 addi x3,x3,4 + +800026f0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe: + sm4ks x23, x28, x1, 3 # perform operation +800026f0: f41e0bb3 sm4ks x23,x28,x1,0x3 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffe_str) +800026f4: 00092383 lw x7,0(x18) +800026f8: 01738863 beq x7,x23,80002708 +800026fc: 2dd0546f jal x8,800081d8 +80002700: 800026f0 .word 0x800026f0 +80002704: 800116b1 .word 0x800116b1 +80002708: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xfffffffe +8000270c: 0001a103 lw x2,0(x3) +80002710: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs2: x5 = 0xffffffff +80002714: 0001a283 lw x5,0(x3) +80002718: 00418193 addi x3,x3,4 + +8000271c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sm4ks x13, x2, x5, 1 # perform operation +8000271c: 745106b3 sm4ks x13,x2,x5,0x1 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) +80002720: 00092383 lw x7,0(x18) +80002724: 00d38863 beq x7,x13,80002734 +80002728: 2b10546f jal x8,800081d8 +8000272c: 8000271c .word 0x8000271c +80002730: 80011712 .word 0x80011712 +80002734: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xfffffffe +80002738: 0001ac03 lw x24,0(x3) +8000273c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xfffffffe +80002740: 0001ae83 lw x29,0(x3) +80002744: 00418193 addi x3,x3,4 + +80002748 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sm4ks x4, x24, x29, 0 # perform operation +80002748: 35dc0233 sm4ks x4,x24,x29,0x0 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) +8000274c: 00092383 lw x7,0(x18) +80002750: 00438863 beq x7,x4,80002760 +80002754: 2850546f jal x8,800081d8 +80002758: 80002748 .word 0x80002748 +8000275c: 80011773 .word 0x80011773 +80002760: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xfffffffe +80002764: 0001a603 lw x12,0(x3) +80002768: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x5bbc8872 +8000276c: 0001aa03 lw x20,0(x3) +80002770: 00418193 addi x3,x3,4 + +80002774 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872: + sm4ks x30, x12, x20, 3 # perform operation +80002774: f5460f33 sm4ks x30,x12,x20,0x3 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc8872_str) +80002778: 00092383 lw x7,0(x18) +8000277c: 01e38863 beq x7,x30,8000278c +80002780: 2590546f jal x8,800081d8 +80002784: 80002774 .word 0x80002774 +80002788: 800117d4 .word 0x800117d4 +8000278c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xfffffffe +80002790: 0001ab83 lw x23,0(x3) +80002794: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xaaaaaaaa +80002798: 0001ac03 lw x24,0(x3) +8000279c: 00418193 addi x3,x3,4 + +800027a0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa: + sm4ks x6, x23, x24, 0 # perform operation +800027a0: 358b8333 sm4ks x6,x23,x24,0x0 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaa_str) +800027a4: 00092383 lw x7,0(x18) +800027a8: 00638863 beq x7,x6,800027b8 +800027ac: 22d0546f jal x8,800081d8 +800027b0: 800027a0 .word 0x800027a0 +800027b4: 80011835 .word 0x80011835 +800027b8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffe rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xfffffffe +800027bc: 0001a583 lw x11,0(x3) +800027c0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x55555555 +800027c4: 0001a603 lw x12,0(x3) +800027c8: 00418193 addi x3,x3,4 + +800027cc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555: + sm4ks x1, x11, x12, 0 # perform operation +800027cc: 34c580b3 sm4ks x1,x11,x12,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x55555555_str) +800027d0: 00092383 lw x7,0(x18) +800027d4: 00138863 beq x7,x1,800027e4 +800027d8: 2010546f jal x8,800081d8 +800027dc: 800027cc .word 0x800027cc +800027e0: 80011896 .word 0x80011896 +800027e4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x5bbc8872 +800027e8: 0001a683 lw x13,0(x3) +800027ec: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000000 +800027f0: 0001a103 lw x2,0(x3) +800027f4: 00418193 addi x3,x3,4 + +800027f8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0: + sm4ks x11, x13, x2, 3 # perform operation +800027f8: f42685b3 sm4ks x11,x13,x2,0x3 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x0_str) +800027fc: 00092383 lw x7,0(x18) +80002800: 00b38863 beq x7,x11,80002810 +80002804: 1d50546f jal x8,800081d8 +80002808: 800027f8 .word 0x800027f8 +8000280c: 800118f7 .word 0x800118f7 +80002810: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5bbc8872 +80002814: 0001a603 lw x12,0(x3) +80002818: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000001 +8000281c: 0001af83 lw x31,0(x3) +80002820: 00418193 addi x3,x3,4 + +80002824 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1: + sm4ks x22, x12, x31, 1 # perform operation +80002824: 75f60b33 sm4ks x22,x12,x31,0x1 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x1_str) +80002828: 00092383 lw x7,0(x18) +8000282c: 01638863 beq x7,x22,8000283c +80002830: 1a90546f jal x8,800081d8 +80002834: 80002824 .word 0x80002824 +80002838: 80011951 .word 0x80011951 +8000283c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5bbc8872 +80002840: 0001ac83 lw x25,0(x3) +80002844: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x00000002 +80002848: 0001aa03 lw x20,0(x3) +8000284c: 00418193 addi x3,x3,4 + +80002850 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2: + sm4ks x14, x25, x20, 0 # perform operation +80002850: 354c8733 sm4ks x14,x25,x20,0x0 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x2_str) +80002854: 00092383 lw x7,0(x18) +80002858: 00e38863 beq x7,x14,80002868 +8000285c: 17d0546f jal x8,800081d8 +80002860: 80002850 .word 0x80002850 +80002864: 800119ab .word 0x800119ab +80002868: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x5bbc8872 +8000286c: 0001ad83 lw x27,0(x3) +80002870: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x80000000 +80002874: 0001ac83 lw x25,0(x3) +80002878: 00418193 addi x3,x3,4 + +8000287c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000: + sm4ks x22, x27, x25, 3 # perform operation +8000287c: f59d8b33 sm4ks x22,x27,x25,0x3 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000000_str) +80002880: 00092383 lw x7,0(x18) +80002884: 01638863 beq x7,x22,80002894 +80002888: 1510546f jal x8,800081d8 +8000288c: 8000287c .word 0x8000287c +80002890: 80011a05 .word 0x80011a05 +80002894: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x5bbc8872 +80002898: 0001a683 lw x13,0(x3) +8000289c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x80000001 +800028a0: 0001ab03 lw x22,0(x3) +800028a4: 00418193 addi x3,x3,4 + +800028a8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001: + sm4ks x16, x13, x22, 3 # perform operation +800028a8: f5668833 sm4ks x16,x13,x22,0x3 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x80000001_str) +800028ac: 00092383 lw x7,0(x18) +800028b0: 01038863 beq x7,x16,800028c0 +800028b4: 1250546f jal x8,800081d8 +800028b8: 800028a8 .word 0x800028a8 +800028bc: 80011a66 .word 0x80011a66 +800028c0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x5bbc8872 +800028c4: 0001a203 lw x4,0(x3) +800028c8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x7fffffff +800028cc: 0001a983 lw x19,0(x3) +800028d0: 00418193 addi x3,x3,4 + +800028d4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff: + sm4ks x6, x4, x19, 2 # perform operation +800028d4: b5320333 sm4ks x6,x4,x19,0x2 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7fffffff_str) +800028d8: 00092383 lw x7,0(x18) +800028dc: 00638863 beq x7,x6,800028ec +800028e0: 0f90546f jal x8,800081d8 +800028e4: 800028d4 .word 0x800028d4 +800028e8: 80011ac7 .word 0x80011ac7 +800028ec: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x5bbc8872 +800028f0: 0001aa03 lw x20,0(x3) +800028f4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7ffffffe +800028f8: 0001ab83 lw x23,0(x3) +800028fc: 00418193 addi x3,x3,4 + +80002900 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe: + sm4ks x19, x20, x23, 0 # perform operation +80002900: 357a09b3 sm4ks x19,x20,x23,0x0 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x7ffffffe_str) +80002904: 00092383 lw x7,0(x18) +80002908: 01338863 beq x7,x19,80002918 +8000290c: 0cd0546f jal x8,800081d8 +80002910: 80002900 .word 0x80002900 +80002914: 80011b28 .word 0x80011b28 +80002918: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x5bbc8872 +8000291c: 0001aa03 lw x20,0(x3) +80002920: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xffffffff +80002924: 0001ad83 lw x27,0(x3) +80002928: 00418193 addi x3,x3,4 + +8000292c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff: + sm4ks x26, x20, x27, 2 # perform operation +8000292c: b5ba0d33 sm4ks x26,x20,x27,0x2 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xffffffff_str) +80002930: 00092383 lw x7,0(x18) +80002934: 01a38863 beq x7,x26,80002944 +80002938: 0a10546f jal x8,800081d8 +8000293c: 8000292c .word 0x8000292c +80002940: 80011b89 .word 0x80011b89 +80002944: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x5bbc8872 +80002948: 0001aa83 lw x21,0(x3) +8000294c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xfffffffe +80002950: 0001ad83 lw x27,0(x3) +80002954: 00418193 addi x3,x3,4 + +80002958 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe: + sm4ks x30, x21, x27, 2 # perform operation +80002958: b5ba8f33 sm4ks x30,x21,x27,0x2 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xfffffffe_str) +8000295c: 00092383 lw x7,0(x18) +80002960: 01e38863 beq x7,x30,80002970 +80002964: 0750546f jal x8,800081d8 +80002968: 80002958 .word 0x80002958 +8000296c: 80011bea .word 0x80011bea +80002970: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5bbc8872 +80002974: 0001a503 lw x10,0(x3) +80002978: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x5bbc8872 +8000297c: 0001a483 lw x9,0(x3) +80002980: 00418193 addi x3,x3,4 + +80002984 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872: + sm4ks x30, x10, x9, 3 # perform operation +80002984: f4950f33 sm4ks x30,x10,x9,0x3 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x5bbc8872_str) +80002988: 00092383 lw x7,0(x18) +8000298c: 01e38863 beq x7,x30,8000299c +80002990: 0490546f jal x8,800081d8 +80002994: 80002984 .word 0x80002984 +80002998: 80011c4b .word 0x80011c4b +8000299c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x5bbc8872 +800029a0: 0001ac03 lw x24,0(x3) +800029a4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xaaaaaaaa +800029a8: 0001ad03 lw x26,0(x3) +800029ac: 00418193 addi x3,x3,4 + +800029b0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa: + sm4ks x28, x24, x26, 1 # perform operation +800029b0: 75ac0e33 sm4ks x28,x24,x26,0x1 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0xaaaaaaaa_str) +800029b4: 00092383 lw x7,0(x18) +800029b8: 01c38863 beq x7,x28,800029c8 +800029bc: 01d0546f jal x8,800081d8 +800029c0: 800029b0 .word 0x800029b0 +800029c4: 80011cac .word 0x80011cac +800029c8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc8872 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x5bbc8872 +800029cc: 0001a883 lw x17,0(x3) +800029d0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x55555555 +800029d4: 0001ac03 lw x24,0(x3) +800029d8: 00418193 addi x3,x3,4 + +800029dc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555: + sm4ks x23, x17, x24, 1 # perform operation +800029dc: 75888bb3 sm4ks x23,x17,x24,0x1 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc8872_rs2val_0x55555555_str) +800029e0: 00092383 lw x7,0(x18) +800029e4: 01738863 beq x7,x23,800029f4 +800029e8: 7f00546f jal x8,800081d8 +800029ec: 800029dc .word 0x800029dc +800029f0: 80011d0d .word 0x80011d0d +800029f4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xaaaaaaaa +800029f8: 0001a083 lw x1,0(x3) +800029fc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x00000000 +80002a00: 0001ae83 lw x29,0(x3) +80002a04: 00418193 addi x3,x3,4 + +80002a08 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0: + sm4ks x16, x1, x29, 0 # perform operation +80002a08: 35d08833 sm4ks x16,x1,x29,0x0 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x0_str) +80002a0c: 00092383 lw x7,0(x18) +80002a10: 01038863 beq x7,x16,80002a20 +80002a14: 7c40546f jal x8,800081d8 +80002a18: 80002a08 .word 0x80002a08 +80002a1c: 80011d6e .word 0x80011d6e +80002a20: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xaaaaaaaa +80002a24: 0001a783 lw x15,0(x3) +80002a28: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000001 +80002a2c: 0001a683 lw x13,0(x3) +80002a30: 00418193 addi x3,x3,4 + +80002a34 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1: + sm4ks x2, x15, x13, 2 # perform operation +80002a34: b4d78133 sm4ks x2,x15,x13,0x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x1_str) +80002a38: 00092383 lw x7,0(x18) +80002a3c: 00238863 beq x7,x2,80002a4c +80002a40: 7980546f jal x8,800081d8 +80002a44: 80002a34 .word 0x80002a34 +80002a48: 80011dc8 .word 0x80011dc8 +80002a4c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xaaaaaaaa +80002a50: 0001a883 lw x17,0(x3) +80002a54: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000002 +80002a58: 0001a603 lw x12,0(x3) +80002a5c: 00418193 addi x3,x3,4 + +80002a60 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2: + sm4ks x9, x17, x12, 1 # perform operation +80002a60: 74c884b3 sm4ks x9,x17,x12,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x2_str) +80002a64: 00092383 lw x7,0(x18) +80002a68: 00938863 beq x7,x9,80002a78 +80002a6c: 76c0546f jal x8,800081d8 +80002a70: 80002a60 .word 0x80002a60 +80002a74: 80011e22 .word 0x80011e22 +80002a78: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0xaaaaaaaa +80002a7c: 0001a283 lw x5,0(x3) +80002a80: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x80000000 +80002a84: 0001ad03 lw x26,0(x3) +80002a88: 00418193 addi x3,x3,4 + +80002a8c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000: + sm4ks x1, x5, x26, 3 # perform operation +80002a8c: f5a280b3 sm4ks x1,x5,x26,0x3 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000000_str) +80002a90: 00092383 lw x7,0(x18) +80002a94: 00138863 beq x7,x1,80002aa4 +80002a98: 7400546f jal x8,800081d8 +80002a9c: 80002a8c .word 0x80002a8c +80002aa0: 80011e7c .word 0x80011e7c +80002aa4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xaaaaaaaa +80002aa8: 0001a703 lw x14,0(x3) +80002aac: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x80000001 +80002ab0: 0001ad83 lw x27,0(x3) +80002ab4: 00418193 addi x3,x3,4 + +80002ab8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001: + sm4ks x28, x14, x27, 0 # perform operation +80002ab8: 35b70e33 sm4ks x28,x14,x27,0x0 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x80000001_str) +80002abc: 00092383 lw x7,0(x18) +80002ac0: 01c38863 beq x7,x28,80002ad0 +80002ac4: 7140546f jal x8,800081d8 +80002ac8: 80002ab8 .word 0x80002ab8 +80002acc: 80011edd .word 0x80011edd +80002ad0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xaaaaaaaa +80002ad4: 0001ab03 lw x22,0(x3) +80002ad8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x7fffffff +80002adc: 0001a983 lw x19,0(x3) +80002ae0: 00418193 addi x3,x3,4 + +80002ae4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff: + sm4ks x11, x22, x19, 1 # perform operation +80002ae4: 753b05b3 sm4ks x11,x22,x19,0x1 + # Check if x11 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7fffffff_str) +80002ae8: 00092383 lw x7,0(x18) +80002aec: 00b38863 beq x7,x11,80002afc +80002af0: 6e80546f jal x8,800081d8 +80002af4: 80002ae4 .word 0x80002ae4 +80002af8: 80011f3e .word 0x80011f3e +80002afc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xaaaaaaaa +80002b00: 0001ad03 lw x26,0(x3) +80002b04: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x7ffffffe +80002b08: 0001a483 lw x9,0(x3) +80002b0c: 00418193 addi x3,x3,4 + +80002b10 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe: + sm4ks x29, x26, x9, 2 # perform operation +80002b10: b49d0eb3 sm4ks x29,x26,x9,0x2 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x7ffffffe_str) +80002b14: 00092383 lw x7,0(x18) +80002b18: 01d38863 beq x7,x29,80002b28 +80002b1c: 6bc0546f jal x8,800081d8 +80002b20: 80002b10 .word 0x80002b10 +80002b24: 80011f9f .word 0x80011f9f +80002b28: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaaaaaaaa +80002b2c: 0001a483 lw x9,0(x3) +80002b30: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffff +80002b34: 0001a603 lw x12,0(x3) +80002b38: 00418193 addi x3,x3,4 + +80002b3c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff: + sm4ks x4, x9, x12, 3 # perform operation +80002b3c: f4c48233 sm4ks x4,x9,x12,0x3 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xffffffff_str) +80002b40: 00092383 lw x7,0(x18) +80002b44: 00438863 beq x7,x4,80002b54 +80002b48: 6900546f jal x8,800081d8 +80002b4c: 80002b3c .word 0x80002b3c +80002b50: 80012000 .word 0x80012000 +80002b54: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xaaaaaaaa +80002b58: 0001a583 lw x11,0(x3) +80002b5c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffe +80002b60: 0001ab83 lw x23,0(x3) +80002b64: 00418193 addi x3,x3,4 + +80002b68 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe: + sm4ks x14, x11, x23, 1 # perform operation +80002b68: 75758733 sm4ks x14,x11,x23,0x1 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xfffffffe_str) +80002b6c: 00092383 lw x7,0(x18) +80002b70: 00e38863 beq x7,x14,80002b80 +80002b74: 6640546f jal x8,800081d8 +80002b78: 80002b68 .word 0x80002b68 +80002b7c: 80012061 .word 0x80012061 +80002b80: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xaaaaaaaa +80002b84: 0001aa83 lw x21,0(x3) +80002b88: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x5bbc8872 +80002b8c: 0001ac83 lw x25,0(x3) +80002b90: 00418193 addi x3,x3,4 + +80002b94 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872: + sm4ks x1, x21, x25, 0 # perform operation +80002b94: 359a80b3 sm4ks x1,x21,x25,0x0 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x5bbc8872_str) +80002b98: 00092383 lw x7,0(x18) +80002b9c: 00138863 beq x7,x1,80002bac +80002ba0: 6380546f jal x8,800081d8 +80002ba4: 80002b94 .word 0x80002b94 +80002ba8: 800120c2 .word 0x800120c2 +80002bac: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xaaaaaaaa +80002bb0: 0001ab03 lw x22,0(x3) +80002bb4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xaaaaaaaa +80002bb8: 0001ac03 lw x24,0(x3) +80002bbc: 00418193 addi x3,x3,4 + +80002bc0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa: + sm4ks x16, x22, x24, 0 # perform operation +80002bc0: 358b0833 sm4ks x16,x22,x24,0x0 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0xaaaaaaaa_str) +80002bc4: 00092383 lw x7,0(x18) +80002bc8: 01038863 beq x7,x16,80002bd8 +80002bcc: 60c0546f jal x8,800081d8 +80002bd0: 80002bc0 .word 0x80002bc0 +80002bd4: 80012123 .word 0x80012123 +80002bd8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaa rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaaaaaaaa +80002bdc: 0001a103 lw x2,0(x3) +80002be0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x55555555 +80002be4: 0001a503 lw x10,0(x3) +80002be8: 00418193 addi x3,x3,4 + +80002bec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555: + sm4ks x17, x2, x10, 1 # perform operation +80002bec: 74a108b3 sm4ks x17,x2,x10,0x1 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaa_rs2val_0x55555555_str) +80002bf0: 00092383 lw x7,0(x18) +80002bf4: 01138863 beq x7,x17,80002c04 +80002bf8: 5e00546f jal x8,800081d8 +80002bfc: 80002bec .word 0x80002bec +80002c00: 80012184 .word 0x80012184 +80002c04: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x55555555 +80002c08: 0001a983 lw x19,0(x3) +80002c0c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000000 +80002c10: 0001a103 lw x2,0(x3) +80002c14: 00418193 addi x3,x3,4 + +80002c18 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0: + sm4ks x17, x19, x2, 0 # perform operation +80002c18: 342988b3 sm4ks x17,x19,x2,0x0 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x0_str) +80002c1c: 00092383 lw x7,0(x18) +80002c20: 01138863 beq x7,x17,80002c30 +80002c24: 5b40546f jal x8,800081d8 +80002c28: 80002c18 .word 0x80002c18 +80002c2c: 800121e5 .word 0x800121e5 +80002c30: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x55555555 +80002c34: 0001ae83 lw x29,0(x3) +80002c38: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000001 +80002c3c: 0001a683 lw x13,0(x3) +80002c40: 00418193 addi x3,x3,4 + +80002c44 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1: + sm4ks x15, x29, x13, 2 # perform operation +80002c44: b4de87b3 sm4ks x15,x29,x13,0x2 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x1_str) +80002c48: 00092383 lw x7,0(x18) +80002c4c: 00f38863 beq x7,x15,80002c5c +80002c50: 5880546f jal x8,800081d8 +80002c54: 80002c44 .word 0x80002c44 +80002c58: 8001223f .word 0x8001223f +80002c5c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x3, x5) # load rs1: x5 = 0x55555555 +80002c60: 0001a283 lw x5,0(x3) +80002c64: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000002 +80002c68: 0001a103 lw x2,0(x3) +80002c6c: 00418193 addi x3,x3,4 + +80002c70 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2: + sm4ks x28, x5, x2, 2 # perform operation +80002c70: b4228e33 sm4ks x28,x5,x2,0x2 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x2_str) +80002c74: 00092383 lw x7,0(x18) +80002c78: 01c38863 beq x7,x28,80002c88 +80002c7c: 55c0546f jal x8,800081d8 +80002c80: 80002c70 .word 0x80002c70 +80002c84: 80012299 .word 0x80012299 +80002c88: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x55555555 +80002c8c: 0001a483 lw x9,0(x3) +80002c90: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x80000000 +80002c94: 0001af03 lw x30,0(x3) +80002c98: 00418193 addi x3,x3,4 + +80002c9c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000: + sm4ks x10, x9, x30, 1 # perform operation +80002c9c: 75e48533 sm4ks x10,x9,x30,0x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000000_str) +80002ca0: 00092383 lw x7,0(x18) +80002ca4: 00a38863 beq x7,x10,80002cb4 +80002ca8: 5300546f jal x8,800081d8 +80002cac: 80002c9c .word 0x80002c9c +80002cb0: 800122f3 .word 0x800122f3 +80002cb4: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x55555555 +80002cb8: 0001a083 lw x1,0(x3) +80002cbc: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x80000001 +80002cc0: 0001ab83 lw x23,0(x3) +80002cc4: 00418193 addi x3,x3,4 + +80002cc8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001: + sm4ks x6, x1, x23, 2 # perform operation +80002cc8: b5708333 sm4ks x6,x1,x23,0x2 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x80000001_str) +80002ccc: 00092383 lw x7,0(x18) +80002cd0: 00638863 beq x7,x6,80002ce0 +80002cd4: 5040546f jal x8,800081d8 +80002cd8: 80002cc8 .word 0x80002cc8 +80002cdc: 80012354 .word 0x80012354 +80002ce0: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x55555555 +80002ce4: 0001ac03 lw x24,0(x3) +80002ce8: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x7fffffff +80002cec: 0001a503 lw x10,0(x3) +80002cf0: 00418193 addi x3,x3,4 + +80002cf4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff: + sm4ks x22, x24, x10, 1 # perform operation +80002cf4: 74ac0b33 sm4ks x22,x24,x10,0x1 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7fffffff_str) +80002cf8: 00092383 lw x7,0(x18) +80002cfc: 01638863 beq x7,x22,80002d0c +80002d00: 4d80546f jal x8,800081d8 +80002d04: 80002cf4 .word 0x80002cf4 +80002d08: 800123b5 .word 0x800123b5 +80002d0c: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x55555555 +80002d10: 0001ae03 lw x28,0(x3) +80002d14: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x7ffffffe +80002d18: 0001af03 lw x30,0(x3) +80002d1c: 00418193 addi x3,x3,4 + +80002d20 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe: + sm4ks x12, x28, x30, 2 # perform operation +80002d20: b5ee0633 sm4ks x12,x28,x30,0x2 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x7ffffffe_str) +80002d24: 00092383 lw x7,0(x18) +80002d28: 00c38863 beq x7,x12,80002d38 +80002d2c: 4ac0546f jal x8,800081d8 +80002d30: 80002d20 .word 0x80002d20 +80002d34: 80012416 .word 0x80012416 +80002d38: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x55555555 +80002d3c: 0001a583 lw x11,0(x3) +80002d40: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xffffffff +80002d44: 0001aa03 lw x20,0(x3) +80002d48: 00418193 addi x3,x3,4 + +80002d4c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff: + sm4ks x9, x11, x20, 2 # perform operation +80002d4c: b54584b3 sm4ks x9,x11,x20,0x2 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xffffffff_str) +80002d50: 00092383 lw x7,0(x18) +80002d54: 00938863 beq x7,x9,80002d64 +80002d58: 4800546f jal x8,800081d8 +80002d5c: 80002d4c .word 0x80002d4c +80002d60: 80012477 .word 0x80012477 +80002d64: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x55555555 +80002d68: 0001a203 lw x4,0(x3) +80002d6c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffe +80002d70: 0001ab83 lw x23,0(x3) +80002d74: 00418193 addi x3,x3,4 + +80002d78 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe: + sm4ks x10, x4, x23, 1 # perform operation +80002d78: 75720533 sm4ks x10,x4,x23,0x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x10, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xfffffffe_str) +80002d7c: 00092383 lw x7,0(x18) +80002d80: 00a38863 beq x7,x10,80002d90 +80002d84: 4540546f jal x8,800081d8 +80002d88: 80002d78 .word 0x80002d78 +80002d8c: 800124d8 .word 0x800124d8 +80002d90: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x55555555 +80002d94: 0001a603 lw x12,0(x3) +80002d98: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x5bbc8872 +80002d9c: 0001a483 lw x9,0(x3) +80002da0: 00418193 addi x3,x3,4 + +80002da4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872: + sm4ks x22, x12, x9, 3 # perform operation +80002da4: f4960b33 sm4ks x22,x12,x9,0x3 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x5bbc8872_str) +80002da8: 00092383 lw x7,0(x18) +80002dac: 01638863 beq x7,x22,80002dbc +80002db0: 4280546f jal x8,800081d8 +80002db4: 80002da4 .word 0x80002da4 +80002db8: 80012539 .word 0x80012539 +80002dbc: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x4) # load rs1: x4 = 0x55555555 +80002dc0: 0001a203 lw x4,0(x3) +80002dc4: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0xaaaaaaaa +80002dc8: 0001a483 lw x9,0(x3) +80002dcc: 00418193 addi x3,x3,4 + +80002dd0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa: + sm4ks x17, x4, x9, 1 # perform operation +80002dd0: 749208b3 sm4ks x17,x4,x9,0x1 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0xaaaaaaaa_str) +80002dd4: 00092383 lw x7,0(x18) +80002dd8: 01138863 beq x7,x17,80002de8 +80002ddc: 3fc0546f jal x8,800081d8 +80002de0: 80002dd0 .word 0x80002dd0 +80002de4: 8001259a .word 0x8001259a +80002de8: 00490913 addi x18,x18,4 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x55555555 rs2 = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x55555555 +80002dec: 0001ac03 lw x24,0(x3) +80002df0: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x55555555 +80002df4: 0001ab03 lw x22,0(x3) +80002df8: 00418193 addi x3,x3,4 + +80002dfc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555: + sm4ks x12, x24, x22, 3 # perform operation +80002dfc: f56c0633 sm4ks x12,x24,x22,0x3 + # Check if x12 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x55555555_rs2val_0x55555555_str) +80002e00: 00092383 lw x7,0(x18) +80002e04: 00c38863 beq x7,x12,80002e14 +80002e08: 3d00546f jal x8,800081d8 +80002e0c: 80002dfc .word 0x80002dfc +80002e10: 800125fb .word 0x800125fb +80002e14: 00490913 addi x18,x18,4 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xa5cd1f91 +80002e18: 0001a003 lw x0,0(x3) +80002e1c: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x8c5e273b +80002e20: 0001a003 lw x0,0(x3) +80002e24: 00418193 addi x3,x3,4 + +80002e28 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b0: + sm4ks x9, x0, x0, 1 # perform operation +80002e28: 740004b3 sm4ks x9,x0,x0,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zksed_sm4ks_cg_cmp_rs1_rs2_b0, Zksed_sm4ks_cg_cmp_rs1_rs2_b0_str) +80002e2c: 00092383 lw x7,0(x18) +80002e30: 00938863 beq x7,x9,80002e40 +80002e34: 3a40546f jal x8,800081d8 +80002e38: 80002e28 .word 0x80002e28 +80002e3c: 8001265c .word 0x8001265c +80002e40: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x28236310 +80002e44: 0001a083 lw x1,0(x3) +80002e48: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x1e337fe2 +80002e4c: 0001a083 lw x1,0(x3) +80002e50: 00418193 addi x3,x3,4 + +80002e54 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b1: + sm4ks x27, x1, x1, 2 # perform operation +80002e54: b4108db3 sm4ks x27,x1,x1,0x2 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zksed_sm4ks_cg_cmp_rs1_rs2_b1, Zksed_sm4ks_cg_cmp_rs1_rs2_b1_str) +80002e58: 00092383 lw x7,0(x18) +80002e5c: 01b38863 beq x7,x27,80002e6c +80002e60: 3780546f jal x8,800081d8 +80002e64: 80002e54 .word 0x80002e54 +80002e68: 80012696 .word 0x80012696 +80002e6c: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xdcde1e3e +80002e70: 0001a103 lw x2,0(x3) +80002e74: 00418193 addi x3,x3,4 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xcce789c6 +80002e78: 0001a103 lw x2,0(x3) +80002e7c: 00418193 addi x3,x3,4 + +80002e80 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b2: + sm4ks x5, x2, x2, 3 # perform operation +80002e80: f42102b3 sm4ks x5,x2,x2,0x3 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cmp_rs1_rs2_b2, Zksed_sm4ks_cg_cmp_rs1_rs2_b2_str) +80002e84: 00092383 lw x7,0(x18) +80002e88: 00538863 beq x7,x5,80002e98 +80002e8c: 34c0546f jal x8,800081d8 +80002e90: 80002e80 .word 0x80002e80 +80002e94: 800126d0 .word 0x800126d0 +80002e98: 00490913 addi x18,x18,4 + + mv x6, x3 # switch data pointer register to avoid conflict with test +80002e9c: 00018313 addi x6,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xcaac50fd +80002ea0: 00032183 lw x3,0(x6) +80002ea4: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xbe91c721 +80002ea8: 00032183 lw x3,0(x6) +80002eac: 00430313 addi x6,x6,4 + +80002eb0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b3: + sm4ks x5, x3, x3, 3 # perform operation +80002eb0: f43182b3 sm4ks x5,x3,x3,0x3 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cmp_rs1_rs2_b3, Zksed_sm4ks_cg_cmp_rs1_rs2_b3_str) +80002eb4: 00092383 lw x7,0(x18) +80002eb8: 00538863 beq x7,x5,80002ec8 +80002ebc: 31c0546f jal x8,800081d8 +80002ec0: 80002eb0 .word 0x80002eb0 +80002ec4: 8001270a .word 0x8001270a +80002ec8: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xfd5b4459 +80002ecc: 00032203 lw x4,0(x6) +80002ed0: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0xb45458d2 +80002ed4: 00032203 lw x4,0(x6) +80002ed8: 00430313 addi x6,x6,4 + +80002edc : +Zksed_sm4ks_cg_cmp_rs1_rs2_b4: + sm4ks x5, x4, x4, 0 # perform operation +80002edc: 344202b3 sm4ks x5,x4,x4,0x0 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cmp_rs1_rs2_b4, Zksed_sm4ks_cg_cmp_rs1_rs2_b4_str) +80002ee0: 00092383 lw x7,0(x18) +80002ee4: 00538863 beq x7,x5,80002ef4 +80002ee8: 2f00546f jal x8,800081d8 +80002eec: 80002edc .word 0x80002edc +80002ef0: 80012744 .word 0x80012744 +80002ef4: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x73cf861a +80002ef8: 00032283 lw x5,0(x6) +80002efc: 00430313 addi x6,x6,4 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x3314ddd1 +80002f00: 00032283 lw x5,0(x6) +80002f04: 00430313 addi x6,x6,4 + +80002f08 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b5: + sm4ks x1, x5, x5, 2 # perform operation +80002f08: b45280b3 sm4ks x1,x5,x5,0x2 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zksed_sm4ks_cg_cmp_rs1_rs2_b5, Zksed_sm4ks_cg_cmp_rs1_rs2_b5_str) +80002f0c: 00092383 lw x7,0(x18) +80002f10: 00138863 beq x7,x1,80002f20 +80002f14: 2c40546f jal x8,800081d8 +80002f18: 80002f08 .word 0x80002f08 +80002f1c: 8001277e .word 0x8001277e +80002f20: 00490913 addi x18,x18,4 + + mv x9, x6 # switch data pointer register to avoid conflict with test +80002f24: 00030493 addi x9,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x4605812c +80002f28: 0004a303 lw x6,0(x9) +80002f2c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x8f654ed2 +80002f30: 0004a303 lw x6,0(x9) +80002f34: 00448493 addi x9,x9,4 + +80002f38 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b6: + sm4ks x31, x6, x6, 3 # perform operation +80002f38: f4630fb3 sm4ks x31,x6,x6,0x3 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zksed_sm4ks_cg_cmp_rs1_rs2_b6, Zksed_sm4ks_cg_cmp_rs1_rs2_b6_str) +80002f3c: 00092383 lw x7,0(x18) +80002f40: 01f38863 beq x7,x31,80002f50 +80002f44: 2940546f jal x8,800081d8 +80002f48: 80002f38 .word 0x80002f38 +80002f4c: 800127b8 .word 0x800127b8 +80002f50: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80002f54: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80002f58: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x26e1fe3b +80002f5c: 0004a383 lw x7,0(x9) +80002f60: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xda0fe56a +80002f64: 0004a383 lw x7,0(x9) +80002f68: 00448493 addi x9,x9,4 + +80002f6c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b7: + sm4ks x1, x7, x7, 2 # perform operation +80002f6c: b47380b3 sm4ks x1,x7,x7,0x2 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksed_sm4ks_cg_cmp_rs1_rs2_b7, Zksed_sm4ks_cg_cmp_rs1_rs2_b7_str) +80002f70: 00092203 lw x4,0(x18) +80002f74: 00120863 beq x4,x1,80002f84 +80002f78: 248052ef jal x5,800081c0 +80002f7c: 80002f6c .word 0x80002f6c +80002f80: 800127f2 .word 0x800127f2 +80002f84: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xae7e1764 +80002f88: 0004a403 lw x8,0(x9) +80002f8c: 00448493 addi x9,x9,4 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xf93c3055 +80002f90: 0004a403 lw x8,0(x9) +80002f94: 00448493 addi x9,x9,4 + +80002f98 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b8: + sm4ks x25, x8, x8, 3 # perform operation +80002f98: f4840cb3 sm4ks x25,x8,x8,0x3 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zksed_sm4ks_cg_cmp_rs1_rs2_b8, Zksed_sm4ks_cg_cmp_rs1_rs2_b8_str) +80002f9c: 00092203 lw x4,0(x18) +80002fa0: 01920863 beq x4,x25,80002fb0 +80002fa4: 21c052ef jal x5,800081c0 +80002fa8: 80002f98 .word 0x80002f98 +80002fac: 8001282c .word 0x8001282c +80002fb0: 00490913 addi x18,x18,4 + + mv x1, x9 # switch data pointer register to avoid conflict with test +80002fb4: 00048093 addi x1,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x09e7c149 +80002fb8: 0000a483 lw x9,0(x1) +80002fbc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5813e65a +80002fc0: 0000a483 lw x9,0(x1) +80002fc4: 00408093 addi x1,x1,4 + +80002fc8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b9: + sm4ks x20, x9, x9, 1 # perform operation +80002fc8: 74948a33 sm4ks x20,x9,x9,0x1 + # Check if x20 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x20, Zksed_sm4ks_cg_cmp_rs1_rs2_b9, Zksed_sm4ks_cg_cmp_rs1_rs2_b9_str) +80002fcc: 00092203 lw x4,0(x18) +80002fd0: 01420863 beq x4,x20,80002fe0 +80002fd4: 1ec052ef jal x5,800081c0 +80002fd8: 80002fc8 .word 0x80002fc8 +80002fdc: 80012866 .word 0x80012866 +80002fe0: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0ea2e046 +80002fe4: 0000a503 lw x10,0(x1) +80002fe8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xb22b8fe0 +80002fec: 0000a503 lw x10,0(x1) +80002ff0: 00408093 addi x1,x1,4 + +80002ff4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b10: + sm4ks x13, x10, x10, 0 # perform operation +80002ff4: 34a506b3 sm4ks x13,x10,x10,0x0 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zksed_sm4ks_cg_cmp_rs1_rs2_b10, Zksed_sm4ks_cg_cmp_rs1_rs2_b10_str) +80002ff8: 00092203 lw x4,0(x18) +80002ffc: 00d20863 beq x4,x13,8000300c +80003000: 1c0052ef jal x5,800081c0 +80003004: 80002ff4 .word 0x80002ff4 +80003008: 800128a0 .word 0x800128a0 +8000300c: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x600b375d +80003010: 0000a583 lw x11,0(x1) +80003014: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xc0d7460d +80003018: 0000a583 lw x11,0(x1) +8000301c: 00408093 addi x1,x1,4 + +80003020 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b11: + sm4ks x0, x11, x11, 3 # perform operation +80003020: f4b58033 sm4ks x0,x11,x11,0x3 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zksed_sm4ks_cg_cmp_rs1_rs2_b11, Zksed_sm4ks_cg_cmp_rs1_rs2_b11_str) +80003024: 00092203 lw x4,0(x18) +80003028: 00020863 beq x4,x0,80003038 +8000302c: 194052ef jal x5,800081c0 +80003030: 80003020 .word 0x80003020 +80003034: 800128db .word 0x800128db +80003038: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xcb2928dc +8000303c: 0000a603 lw x12,0(x1) +80003040: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x3321ff5f +80003044: 0000a603 lw x12,0(x1) +80003048: 00408093 addi x1,x1,4 + +8000304c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b12: + sm4ks x3, x12, x12, 0 # perform operation +8000304c: 34c601b3 sm4ks x3,x12,x12,0x0 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zksed_sm4ks_cg_cmp_rs1_rs2_b12, Zksed_sm4ks_cg_cmp_rs1_rs2_b12_str) +80003050: 00092203 lw x4,0(x18) +80003054: 00320863 beq x4,x3,80003064 +80003058: 168052ef jal x5,800081c0 +8000305c: 8000304c .word 0x8000304c +80003060: 80012916 .word 0x80012916 +80003064: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xecf6233e +80003068: 0000a683 lw x13,0(x1) +8000306c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xfbb6acd0 +80003070: 0000a683 lw x13,0(x1) +80003074: 00408093 addi x1,x1,4 + +80003078 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b13: + sm4ks x10, x13, x13, 1 # perform operation +80003078: 74d68533 sm4ks x10,x13,x13,0x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zksed_sm4ks_cg_cmp_rs1_rs2_b13, Zksed_sm4ks_cg_cmp_rs1_rs2_b13_str) +8000307c: 00092203 lw x4,0(x18) +80003080: 00a20863 beq x4,x10,80003090 +80003084: 13c052ef jal x5,800081c0 +80003088: 80003078 .word 0x80003078 +8000308c: 80012951 .word 0x80012951 +80003090: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xe3c1bd48 +80003094: 0000a703 lw x14,0(x1) +80003098: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x6b51907d +8000309c: 0000a703 lw x14,0(x1) +800030a0: 00408093 addi x1,x1,4 + +800030a4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b14: + sm4ks x16, x14, x14, 3 # perform operation +800030a4: f4e70833 sm4ks x16,x14,x14,0x3 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zksed_sm4ks_cg_cmp_rs1_rs2_b14, Zksed_sm4ks_cg_cmp_rs1_rs2_b14_str) +800030a8: 00092203 lw x4,0(x18) +800030ac: 01020863 beq x4,x16,800030bc +800030b0: 110052ef jal x5,800081c0 +800030b4: 800030a4 .word 0x800030a4 +800030b8: 8001298c .word 0x8001298c +800030bc: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x961d4b47 +800030c0: 0000a783 lw x15,0(x1) +800030c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x16f96988 +800030c8: 0000a783 lw x15,0(x1) +800030cc: 00408093 addi x1,x1,4 + +800030d0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b15: + sm4ks x2, x15, x15, 2 # perform operation +800030d0: b4f78133 sm4ks x2,x15,x15,0x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b15, Zksed_sm4ks_cg_cmp_rs1_rs2_b15_str) +800030d4: 00092203 lw x4,0(x18) +800030d8: 00220863 beq x4,x2,800030e8 +800030dc: 0e4052ef jal x5,800081c0 +800030e0: 800030d0 .word 0x800030d0 +800030e4: 800129c7 .word 0x800129c7 +800030e8: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xd057f8ef +800030ec: 0000a803 lw x16,0(x1) +800030f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xda812ee8 +800030f4: 0000a803 lw x16,0(x1) +800030f8: 00408093 addi x1,x1,4 + +800030fc : +Zksed_sm4ks_cg_cmp_rs1_rs2_b16: + sm4ks x21, x16, x16, 0 # perform operation +800030fc: 35080ab3 sm4ks x21,x16,x16,0x0 + # Check if x21 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x21, Zksed_sm4ks_cg_cmp_rs1_rs2_b16, Zksed_sm4ks_cg_cmp_rs1_rs2_b16_str) +80003100: 00092203 lw x4,0(x18) +80003104: 01520863 beq x4,x21,80003114 +80003108: 0b8052ef jal x5,800081c0 +8000310c: 800030fc .word 0x800030fc +80003110: 80012a02 .word 0x80012a02 +80003114: 00490913 addi x18,x18,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xe05c7866 +80003118: 0000a883 lw x17,0(x1) +8000311c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x27634cbb +80003120: 0000a883 lw x17,0(x1) +80003124: 00408093 addi x1,x1,4 + +80003128 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b17: + sm4ks x14, x17, x17, 0 # perform operation +80003128: 35188733 sm4ks x14,x17,x17,0x0 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zksed_sm4ks_cg_cmp_rs1_rs2_b17, Zksed_sm4ks_cg_cmp_rs1_rs2_b17_str) +8000312c: 00092203 lw x4,0(x18) +80003130: 00e20863 beq x4,x14,80003140 +80003134: 08c052ef jal x5,800081c0 +80003138: 80003128 .word 0x80003128 +8000313c: 80012a3d .word 0x80012a3d +80003140: 00490913 addi x18,x18,4 + + mv x31, x18 # switch signature pointer register to avoid conflict with test +80003144: 00090f93 addi x31,x18,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x841e72b1 +80003148: 0000a903 lw x18,0(x1) +8000314c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x9350d16f +80003150: 0000a903 lw x18,0(x1) +80003154: 00408093 addi x1,x1,4 + +80003158 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b18: + sm4ks x25, x18, x18, 1 # perform operation +80003158: 75290cb3 sm4ks x25,x18,x18,0x1 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zksed_sm4ks_cg_cmp_rs1_rs2_b18, Zksed_sm4ks_cg_cmp_rs1_rs2_b18_str) +8000315c: 000fa203 lw x4,0(x31) +80003160: 01920863 beq x4,x25,80003170 +80003164: 05c052ef jal x5,800081c0 +80003168: 80003158 .word 0x80003158 +8000316c: 80012a78 .word 0x80012a78 +80003170: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0daa5a1a +80003174: 0000a983 lw x19,0(x1) +80003178: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xae2af7a7 +8000317c: 0000a983 lw x19,0(x1) +80003180: 00408093 addi x1,x1,4 + +80003184 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b19: + sm4ks x23, x19, x19, 3 # perform operation +80003184: f5398bb3 sm4ks x23,x19,x19,0x3 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zksed_sm4ks_cg_cmp_rs1_rs2_b19, Zksed_sm4ks_cg_cmp_rs1_rs2_b19_str) +80003188: 000fa203 lw x4,0(x31) +8000318c: 01720863 beq x4,x23,8000319c +80003190: 030052ef jal x5,800081c0 +80003194: 80003184 .word 0x80003184 +80003198: 80012ab3 .word 0x80012ab3 +8000319c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xe8db8cd3 +800031a0: 0000aa03 lw x20,0(x1) +800031a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xe4fac83f +800031a8: 0000aa03 lw x20,0(x1) +800031ac: 00408093 addi x1,x1,4 + +800031b0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b20: + sm4ks x10, x20, x20, 3 # perform operation +800031b0: f54a0533 sm4ks x10,x20,x20,0x3 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zksed_sm4ks_cg_cmp_rs1_rs2_b20, Zksed_sm4ks_cg_cmp_rs1_rs2_b20_str) +800031b4: 000fa203 lw x4,0(x31) +800031b8: 00a20863 beq x4,x10,800031c8 +800031bc: 004052ef jal x5,800081c0 +800031c0: 800031b0 .word 0x800031b0 +800031c4: 80012aee .word 0x80012aee +800031c8: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xe08a30b7 +800031cc: 0000aa83 lw x21,0(x1) +800031d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xd250abd8 +800031d4: 0000aa83 lw x21,0(x1) +800031d8: 00408093 addi x1,x1,4 + +800031dc : +Zksed_sm4ks_cg_cmp_rs1_rs2_b21: + sm4ks x19, x21, x21, 2 # perform operation +800031dc: b55a89b3 sm4ks x19,x21,x21,0x2 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksed_sm4ks_cg_cmp_rs1_rs2_b21, Zksed_sm4ks_cg_cmp_rs1_rs2_b21_str) +800031e0: 000fa203 lw x4,0(x31) +800031e4: 01320863 beq x4,x19,800031f4 +800031e8: 7d9042ef jal x5,800081c0 +800031ec: 800031dc .word 0x800031dc +800031f0: 80012b29 .word 0x80012b29 +800031f4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xd2770d83 +800031f8: 0000ab03 lw x22,0(x1) +800031fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xb66050ab +80003200: 0000ab03 lw x22,0(x1) +80003204: 00408093 addi x1,x1,4 + +80003208 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b22: + sm4ks x14, x22, x22, 1 # perform operation +80003208: 756b0733 sm4ks x14,x22,x22,0x1 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zksed_sm4ks_cg_cmp_rs1_rs2_b22, Zksed_sm4ks_cg_cmp_rs1_rs2_b22_str) +8000320c: 000fa203 lw x4,0(x31) +80003210: 00e20863 beq x4,x14,80003220 +80003214: 7ad042ef jal x5,800081c0 +80003218: 80003208 .word 0x80003208 +8000321c: 80012b64 .word 0x80012b64 +80003220: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x6780b18c +80003224: 0000ab83 lw x23,0(x1) +80003228: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x69736f61 +8000322c: 0000ab83 lw x23,0(x1) +80003230: 00408093 addi x1,x1,4 + +80003234 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b23: + sm4ks x6, x23, x23, 1 # perform operation +80003234: 757b8333 sm4ks x6,x23,x23,0x1 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zksed_sm4ks_cg_cmp_rs1_rs2_b23, Zksed_sm4ks_cg_cmp_rs1_rs2_b23_str) +80003238: 000fa203 lw x4,0(x31) +8000323c: 00620863 beq x4,x6,8000324c +80003240: 781042ef jal x5,800081c0 +80003244: 80003234 .word 0x80003234 +80003248: 80012b9f .word 0x80012b9f +8000324c: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x4bd2ece3 +80003250: 0000ac03 lw x24,0(x1) +80003254: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x624a005c +80003258: 0000ac03 lw x24,0(x1) +8000325c: 00408093 addi x1,x1,4 + +80003260 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b24: + sm4ks x18, x24, x24, 1 # perform operation +80003260: 758c0933 sm4ks x18,x24,x24,0x1 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zksed_sm4ks_cg_cmp_rs1_rs2_b24, Zksed_sm4ks_cg_cmp_rs1_rs2_b24_str) +80003264: 000fa203 lw x4,0(x31) +80003268: 01220863 beq x4,x18,80003278 +8000326c: 755042ef jal x5,800081c0 +80003270: 80003260 .word 0x80003260 +80003274: 80012bda .word 0x80012bda +80003278: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xb467d945 +8000327c: 0000ac83 lw x25,0(x1) +80003280: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x13576d82 +80003284: 0000ac83 lw x25,0(x1) +80003288: 00408093 addi x1,x1,4 + +8000328c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b25: + sm4ks x13, x25, x25, 3 # perform operation +8000328c: f59c86b3 sm4ks x13,x25,x25,0x3 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zksed_sm4ks_cg_cmp_rs1_rs2_b25, Zksed_sm4ks_cg_cmp_rs1_rs2_b25_str) +80003290: 000fa203 lw x4,0(x31) +80003294: 00d20863 beq x4,x13,800032a4 +80003298: 729042ef jal x5,800081c0 +8000329c: 8000328c .word 0x8000328c +800032a0: 80012c15 .word 0x80012c15 +800032a4: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xa6598df3 +800032a8: 0000ad03 lw x26,0(x1) +800032ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x65fab75e +800032b0: 0000ad03 lw x26,0(x1) +800032b4: 00408093 addi x1,x1,4 + +800032b8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b26: + sm4ks x20, x26, x26, 2 # perform operation +800032b8: b5ad0a33 sm4ks x20,x26,x26,0x2 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zksed_sm4ks_cg_cmp_rs1_rs2_b26, Zksed_sm4ks_cg_cmp_rs1_rs2_b26_str) +800032bc: 000fa203 lw x4,0(x31) +800032c0: 01420863 beq x4,x20,800032d0 +800032c4: 6fd042ef jal x5,800081c0 +800032c8: 800032b8 .word 0x800032b8 +800032cc: 80012c50 .word 0x80012c50 +800032d0: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x4a1a1501 +800032d4: 0000ad83 lw x27,0(x1) +800032d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x38844e3b +800032dc: 0000ad83 lw x27,0(x1) +800032e0: 00408093 addi x1,x1,4 + +800032e4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b27: + sm4ks x2, x27, x27, 1 # perform operation +800032e4: 75bd8133 sm4ks x2,x27,x27,0x1 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b27, Zksed_sm4ks_cg_cmp_rs1_rs2_b27_str) +800032e8: 000fa203 lw x4,0(x31) +800032ec: 00220863 beq x4,x2,800032fc +800032f0: 6d1042ef jal x5,800081c0 +800032f4: 800032e4 .word 0x800032e4 +800032f8: 80012c8b .word 0x80012c8b +800032fc: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xf99240ac +80003300: 0000ae03 lw x28,0(x1) +80003304: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x27081b19 +80003308: 0000ae03 lw x28,0(x1) +8000330c: 00408093 addi x1,x1,4 + +80003310 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b28: + sm4ks x25, x28, x28, 2 # perform operation +80003310: b5ce0cb3 sm4ks x25,x28,x28,0x2 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zksed_sm4ks_cg_cmp_rs1_rs2_b28, Zksed_sm4ks_cg_cmp_rs1_rs2_b28_str) +80003314: 000fa203 lw x4,0(x31) +80003318: 01920863 beq x4,x25,80003328 +8000331c: 6a5042ef jal x5,800081c0 +80003320: 80003310 .word 0x80003310 +80003324: 80012cc6 .word 0x80012cc6 +80003328: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0d5fed54 +8000332c: 0000ae83 lw x29,0(x1) +80003330: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xcd51dd80 +80003334: 0000ae83 lw x29,0(x1) +80003338: 00408093 addi x1,x1,4 + +8000333c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b29: + sm4ks x24, x29, x29, 1 # perform operation +8000333c: 75de8c33 sm4ks x24,x29,x29,0x1 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zksed_sm4ks_cg_cmp_rs1_rs2_b29, Zksed_sm4ks_cg_cmp_rs1_rs2_b29_str) +80003340: 000fa203 lw x4,0(x31) +80003344: 01820863 beq x4,x24,80003354 +80003348: 679042ef jal x5,800081c0 +8000334c: 8000333c .word 0x8000333c +80003350: 80012d01 .word 0x80012d01 +80003354: 004f8f93 addi x31,x31,4 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x38c86754 +80003358: 0000af03 lw x30,0(x1) +8000335c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xce3f5864 +80003360: 0000af03 lw x30,0(x1) +80003364: 00408093 addi x1,x1,4 + +80003368 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b30: + sm4ks x17, x30, x30, 1 # perform operation +80003368: 75ef08b3 sm4ks x17,x30,x30,0x1 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zksed_sm4ks_cg_cmp_rs1_rs2_b30, Zksed_sm4ks_cg_cmp_rs1_rs2_b30_str) +8000336c: 000fa203 lw x4,0(x31) +80003370: 01120863 beq x4,x17,80003380 +80003374: 64d042ef jal x5,800081c0 +80003378: 80003368 .word 0x80003368 +8000337c: 80012d3c .word 0x80012d3c +80003380: 004f8f93 addi x31,x31,4 + + mv x10, x31 # switch signature pointer register to avoid conflict with test +80003384: 000f8513 addi x10,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x7916687e +80003388: 0000af83 lw x31,0(x1) +8000338c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x9d4a9774 +80003390: 0000af83 lw x31,0(x1) +80003394: 00408093 addi x1,x1,4 + +80003398 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b31: + sm4ks x9, x31, x31, 2 # perform operation +80003398: b5ff84b3 sm4ks x9,x31,x31,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zksed_sm4ks_cg_cmp_rs1_rs2_b31, Zksed_sm4ks_cg_cmp_rs1_rs2_b31_str) +8000339c: 00052203 lw x4,0(x10) +800033a0: 00920863 beq x4,x9,800033b0 +800033a4: 61d042ef jal x5,800081c0 +800033a8: 80003398 .word 0x80003398 +800033ac: 80012d77 .word 0x80012d77 +800033b0: 00450513 addi x10,x10,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x76e8ae32 +800033b4: 0000a003 lw x0,0(x1) +800033b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x52eb15fb +800033bc: 0000af03 lw x30,0(x1) +800033c0: 00408093 addi x1,x1,4 + +800033c4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b0: + sm4ks x0, x0, x30, 0 # perform operation +800033c4: 35e00033 sm4ks x0,x0,x30,0x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zksed_sm4ks_cg_cmp_rd_rs1_b0, Zksed_sm4ks_cg_cmp_rd_rs1_b0_str) +800033c8: 00052203 lw x4,0(x10) +800033cc: 00020863 beq x4,x0,800033dc +800033d0: 5f1042ef jal x5,800081c0 +800033d4: 800033c4 .word 0x800033c4 +800033d8: 80012db2 .word 0x80012db2 +800033dc: 00450513 addi x10,x10,4 + + mv x31, x1 # switch data pointer register to avoid conflict with test +800033e0: 00008f93 addi x31,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0x282bea52 +800033e4: 000fa083 lw x1,0(x31) +800033e8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0xf1406bd8 +800033ec: 000fa383 lw x7,0(x31) +800033f0: 004f8f93 addi x31,x31,4 + +800033f4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b1: + sm4ks x1, x1, x7, 1 # perform operation +800033f4: 747080b3 sm4ks x1,x1,x7,0x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zksed_sm4ks_cg_cmp_rd_rs1_b1, Zksed_sm4ks_cg_cmp_rd_rs1_b1_str) +800033f8: 00052203 lw x4,0(x10) +800033fc: 00120863 beq x4,x1,8000340c +80003400: 5c1042ef jal x5,800081c0 +80003404: 800033f4 .word 0x800033f4 +80003408: 80012deb .word 0x80012deb +8000340c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0x88c6dfe7 +80003410: 000fa103 lw x2,0(x31) +80003414: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x343cabe4 +80003418: 000fad03 lw x26,0(x31) +8000341c: 004f8f93 addi x31,x31,4 + +80003420 : +Zksed_sm4ks_cg_cmp_rd_rs1_b2: + sm4ks x2, x2, x26, 0 # perform operation +80003420: 35a10133 sm4ks x2,x2,x26,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zksed_sm4ks_cg_cmp_rd_rs1_b2, Zksed_sm4ks_cg_cmp_rd_rs1_b2_str) +80003424: 00052203 lw x4,0(x10) +80003428: 00220863 beq x4,x2,80003438 +8000342c: 595042ef jal x5,800081c0 +80003430: 80003420 .word 0x80003420 +80003434: 80012e24 .word 0x80012e24 +80003438: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xa3e774ab +8000343c: 000fa183 lw x3,0(x31) +80003440: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x65375153 +80003444: 000faf03 lw x30,0(x31) +80003448: 004f8f93 addi x31,x31,4 + +8000344c : +Zksed_sm4ks_cg_cmp_rd_rs1_b3: + sm4ks x3, x3, x30, 3 # perform operation +8000344c: f5e181b3 sm4ks x3,x3,x30,0x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zksed_sm4ks_cg_cmp_rd_rs1_b3, Zksed_sm4ks_cg_cmp_rd_rs1_b3_str) +80003450: 00052203 lw x4,0(x10) +80003454: 00320863 beq x4,x3,80003464 +80003458: 569042ef jal x5,800081c0 +8000345c: 8000344c .word 0x8000344c +80003460: 80012e5d .word 0x80012e5d +80003464: 00450513 addi x10,x10,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003468: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +8000346c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0x9c349aad +80003470: 000fa203 lw x4,0(x31) +80003474: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xb11400dd +80003478: 000fad83 lw x27,0(x31) +8000347c: 004f8f93 addi x31,x31,4 + +80003480 : +Zksed_sm4ks_cg_cmp_rd_rs1_b4: + sm4ks x4, x4, x27, 1 # perform operation +80003480: 75b20233 sm4ks x4,x4,x27,0x1 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zksed_sm4ks_cg_cmp_rd_rs1_b4, Zksed_sm4ks_cg_cmp_rd_rs1_b4_str) +80003484: 00052683 lw x13,0(x10) +80003488: 00468863 beq x13,x4,80003498 +8000348c: 5750476f jal x14,80008200 +80003490: 80003480 .word 0x80003480 +80003494: 80012e96 .word 0x80012e96 +80003498: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x97d465f6 +8000349c: 000fa283 lw x5,0(x31) +800034a0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x2ecd3fc5 +800034a4: 000fa583 lw x11,0(x31) +800034a8: 004f8f93 addi x31,x31,4 + +800034ac : +Zksed_sm4ks_cg_cmp_rd_rs1_b5: + sm4ks x5, x5, x11, 0 # perform operation +800034ac: 34b282b3 sm4ks x5,x5,x11,0x0 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zksed_sm4ks_cg_cmp_rd_rs1_b5, Zksed_sm4ks_cg_cmp_rd_rs1_b5_str) +800034b0: 00052683 lw x13,0(x10) +800034b4: 00568863 beq x13,x5,800034c4 +800034b8: 5490476f jal x14,80008200 +800034bc: 800034ac .word 0x800034ac +800034c0: 80012ecf .word 0x80012ecf +800034c4: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xe71b6b25 +800034c8: 000fa303 lw x6,0(x31) +800034cc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0xa03eb611 +800034d0: 000fa383 lw x7,0(x31) +800034d4: 004f8f93 addi x31,x31,4 + +800034d8 : +Zksed_sm4ks_cg_cmp_rd_rs1_b6: + sm4ks x6, x6, x7, 2 # perform operation +800034d8: b4730333 sm4ks x6,x6,x7,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x6, Zksed_sm4ks_cg_cmp_rd_rs1_b6, Zksed_sm4ks_cg_cmp_rd_rs1_b6_str) +800034dc: 00052683 lw x13,0(x10) +800034e0: 00668863 beq x13,x6,800034f0 +800034e4: 51d0476f jal x14,80008200 +800034e8: 800034d8 .word 0x800034d8 +800034ec: 80012f08 .word 0x80012f08 +800034f0: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x757c9a98 +800034f4: 000fa383 lw x7,0(x31) +800034f8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0xaea10f4f +800034fc: 000fac03 lw x24,0(x31) +80003500: 004f8f93 addi x31,x31,4 + +80003504 : +Zksed_sm4ks_cg_cmp_rd_rs1_b7: + sm4ks x7, x7, x24, 3 # perform operation +80003504: f58383b3 sm4ks x7,x7,x24,0x3 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zksed_sm4ks_cg_cmp_rd_rs1_b7, Zksed_sm4ks_cg_cmp_rd_rs1_b7_str) +80003508: 00052683 lw x13,0(x10) +8000350c: 00768863 beq x13,x7,8000351c +80003510: 4f10476f jal x14,80008200 +80003514: 80003504 .word 0x80003504 +80003518: 80012f41 .word 0x80012f41 +8000351c: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x0185597e +80003520: 000fa403 lw x8,0(x31) +80003524: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0xfecaa953 +80003528: 000faa03 lw x20,0(x31) +8000352c: 004f8f93 addi x31,x31,4 + +80003530 : +Zksed_sm4ks_cg_cmp_rd_rs1_b8: + sm4ks x8, x8, x20, 0 # perform operation +80003530: 35440433 sm4ks x8,x8,x20,0x0 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zksed_sm4ks_cg_cmp_rd_rs1_b8, Zksed_sm4ks_cg_cmp_rd_rs1_b8_str) +80003534: 00052683 lw x13,0(x10) +80003538: 00868863 beq x13,x8,80003548 +8000353c: 4c50476f jal x14,80008200 +80003540: 80003530 .word 0x80003530 +80003544: 80012f7a .word 0x80012f7a +80003548: 00450513 addi x10,x10,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x14693913 +8000354c: 000fa483 lw x9,0(x31) +80003550: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xc28c54c8 +80003554: 000faa83 lw x21,0(x31) +80003558: 004f8f93 addi x31,x31,4 + +8000355c : +Zksed_sm4ks_cg_cmp_rd_rs1_b9: + sm4ks x9, x9, x21, 0 # perform operation +8000355c: 355484b3 sm4ks x9,x9,x21,0x0 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zksed_sm4ks_cg_cmp_rd_rs1_b9, Zksed_sm4ks_cg_cmp_rd_rs1_b9_str) +80003560: 00052683 lw x13,0(x10) +80003564: 00968863 beq x13,x9,80003574 +80003568: 4990476f jal x14,80008200 +8000356c: 8000355c .word 0x8000355c +80003570: 80012fb3 .word 0x80012fb3 +80003574: 00450513 addi x10,x10,4 + + mv x29, x10 # switch signature pointer register to avoid conflict with test +80003578: 00050e93 addi x29,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xc7621c55 +8000357c: 000fa503 lw x10,0(x31) +80003580: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x2528a2bd +80003584: 000fad03 lw x26,0(x31) +80003588: 004f8f93 addi x31,x31,4 + +8000358c : +Zksed_sm4ks_cg_cmp_rd_rs1_b10: + sm4ks x10, x10, x26, 2 # perform operation +8000358c: b5a50533 sm4ks x10,x10,x26,0x2 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zksed_sm4ks_cg_cmp_rd_rs1_b10, Zksed_sm4ks_cg_cmp_rd_rs1_b10_str) +80003590: 000ea683 lw x13,0(x29) +80003594: 00a68863 beq x13,x10,800035a4 +80003598: 4690476f jal x14,80008200 +8000359c: 8000358c .word 0x8000358c +800035a0: 80012fec .word 0x80012fec +800035a4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x1444488b +800035a8: 000fa583 lw x11,0(x31) +800035ac: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x291b6f40 +800035b0: 000fa983 lw x19,0(x31) +800035b4: 004f8f93 addi x31,x31,4 + +800035b8 : +Zksed_sm4ks_cg_cmp_rd_rs1_b11: + sm4ks x11, x11, x19, 2 # perform operation +800035b8: b53585b3 sm4ks x11,x11,x19,0x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zksed_sm4ks_cg_cmp_rd_rs1_b11, Zksed_sm4ks_cg_cmp_rd_rs1_b11_str) +800035bc: 000ea683 lw x13,0(x29) +800035c0: 00b68863 beq x13,x11,800035d0 +800035c4: 43d0476f jal x14,80008200 +800035c8: 800035b8 .word 0x800035b8 +800035cc: 80013026 .word 0x80013026 +800035d0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0xb515dc4e +800035d4: 000fa603 lw x12,0(x31) +800035d8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x5e8e7846 +800035dc: 000fa903 lw x18,0(x31) +800035e0: 004f8f93 addi x31,x31,4 + +800035e4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b12: + sm4ks x12, x12, x18, 2 # perform operation +800035e4: b5260633 sm4ks x12,x12,x18,0x2 + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zksed_sm4ks_cg_cmp_rd_rs1_b12, Zksed_sm4ks_cg_cmp_rd_rs1_b12_str) +800035e8: 000ea683 lw x13,0(x29) +800035ec: 00c68863 beq x13,x12,800035fc +800035f0: 4110476f jal x14,80008200 +800035f4: 800035e4 .word 0x800035e4 +800035f8: 80013060 .word 0x80013060 +800035fc: 004e8e93 addi x29,x29,4 + + mv x4, x13 # switch temp register to avoid conflict with test +80003600: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +80003604: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xbac67bcd +80003608: 000fa683 lw x13,0(x31) +8000360c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x593b40f7 +80003610: 000faa03 lw x20,0(x31) +80003614: 004f8f93 addi x31,x31,4 + +80003618 : +Zksed_sm4ks_cg_cmp_rd_rs1_b13: + sm4ks x13, x13, x20, 1 # perform operation +80003618: 754686b3 sm4ks x13,x13,x20,0x1 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zksed_sm4ks_cg_cmp_rd_rs1_b13, Zksed_sm4ks_cg_cmp_rd_rs1_b13_str) +8000361c: 000ea203 lw x4,0(x29) +80003620: 00d20863 beq x4,x13,80003630 +80003624: 39d042ef jal x5,800081c0 +80003628: 80003618 .word 0x80003618 +8000362c: 8001309a .word 0x8001309a +80003630: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x827a461c +80003634: 000fa703 lw x14,0(x31) +80003638: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0x57264a57 +8000363c: 000fa403 lw x8,0(x31) +80003640: 004f8f93 addi x31,x31,4 + +80003644 : +Zksed_sm4ks_cg_cmp_rd_rs1_b14: + sm4ks x14, x14, x8, 1 # perform operation +80003644: 74870733 sm4ks x14,x14,x8,0x1 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zksed_sm4ks_cg_cmp_rd_rs1_b14, Zksed_sm4ks_cg_cmp_rd_rs1_b14_str) +80003648: 000ea203 lw x4,0(x29) +8000364c: 00e20863 beq x4,x14,8000365c +80003650: 371042ef jal x5,800081c0 +80003654: 80003644 .word 0x80003644 +80003658: 800130d4 .word 0x800130d4 +8000365c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x572cfdc0 +80003660: 000fa783 lw x15,0(x31) +80003664: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x29ae344d +80003668: 000fac83 lw x25,0(x31) +8000366c: 004f8f93 addi x31,x31,4 + +80003670 : +Zksed_sm4ks_cg_cmp_rd_rs1_b15: + sm4ks x15, x15, x25, 3 # perform operation +80003670: f59787b3 sm4ks x15,x15,x25,0x3 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zksed_sm4ks_cg_cmp_rd_rs1_b15, Zksed_sm4ks_cg_cmp_rd_rs1_b15_str) +80003674: 000ea203 lw x4,0(x29) +80003678: 00f20863 beq x4,x15,80003688 +8000367c: 345042ef jal x5,800081c0 +80003680: 80003670 .word 0x80003670 +80003684: 8001310e .word 0x8001310e +80003688: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x2c97007d +8000368c: 000fa803 lw x16,0(x31) +80003690: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0xf1f7223e +80003694: 000fa683 lw x13,0(x31) +80003698: 004f8f93 addi x31,x31,4 + +8000369c : +Zksed_sm4ks_cg_cmp_rd_rs1_b16: + sm4ks x16, x16, x13, 1 # perform operation +8000369c: 74d80833 sm4ks x16,x16,x13,0x1 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zksed_sm4ks_cg_cmp_rd_rs1_b16, Zksed_sm4ks_cg_cmp_rd_rs1_b16_str) +800036a0: 000ea203 lw x4,0(x29) +800036a4: 01020863 beq x4,x16,800036b4 +800036a8: 319042ef jal x5,800081c0 +800036ac: 8000369c .word 0x8000369c +800036b0: 80013148 .word 0x80013148 +800036b4: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x1249f94b +800036b8: 000fa883 lw x17,0(x31) +800036bc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0x6d168aa7 +800036c0: 000fa403 lw x8,0(x31) +800036c4: 004f8f93 addi x31,x31,4 + +800036c8 : +Zksed_sm4ks_cg_cmp_rd_rs1_b17: + sm4ks x17, x17, x8, 0 # perform operation +800036c8: 348888b3 sm4ks x17,x17,x8,0x0 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zksed_sm4ks_cg_cmp_rd_rs1_b17, Zksed_sm4ks_cg_cmp_rd_rs1_b17_str) +800036cc: 000ea203 lw x4,0(x29) +800036d0: 01120863 beq x4,x17,800036e0 +800036d4: 2ed042ef jal x5,800081c0 +800036d8: 800036c8 .word 0x800036c8 +800036dc: 80013182 .word 0x80013182 +800036e0: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x815a8fa9 +800036e4: 000fa903 lw x18,0(x31) +800036e8: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xd7758b74 +800036ec: 000fa983 lw x19,0(x31) +800036f0: 004f8f93 addi x31,x31,4 + +800036f4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b18: + sm4ks x18, x18, x19, 1 # perform operation +800036f4: 75390933 sm4ks x18,x18,x19,0x1 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zksed_sm4ks_cg_cmp_rd_rs1_b18, Zksed_sm4ks_cg_cmp_rd_rs1_b18_str) +800036f8: 000ea203 lw x4,0(x29) +800036fc: 01220863 beq x4,x18,8000370c +80003700: 2c1042ef jal x5,800081c0 +80003704: 800036f4 .word 0x800036f4 +80003708: 800131bc .word 0x800131bc +8000370c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x8a4499d0 +80003710: 000fa983 lw x19,0(x31) +80003714: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0xc44a8458 +80003718: 000fa503 lw x10,0(x31) +8000371c: 004f8f93 addi x31,x31,4 + +80003720 : +Zksed_sm4ks_cg_cmp_rd_rs1_b19: + sm4ks x19, x19, x10, 2 # perform operation +80003720: b4a989b3 sm4ks x19,x19,x10,0x2 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zksed_sm4ks_cg_cmp_rd_rs1_b19, Zksed_sm4ks_cg_cmp_rd_rs1_b19_str) +80003724: 000ea203 lw x4,0(x29) +80003728: 01320863 beq x4,x19,80003738 +8000372c: 295042ef jal x5,800081c0 +80003730: 80003720 .word 0x80003720 +80003734: 800131f6 .word 0x800131f6 +80003738: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xb6a252e3 +8000373c: 000faa03 lw x20,0(x31) +80003740: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0x4e2abf6c +80003744: 000fa603 lw x12,0(x31) +80003748: 004f8f93 addi x31,x31,4 + +8000374c : +Zksed_sm4ks_cg_cmp_rd_rs1_b20: + sm4ks x20, x20, x12, 1 # perform operation +8000374c: 74ca0a33 sm4ks x20,x20,x12,0x1 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zksed_sm4ks_cg_cmp_rd_rs1_b20, Zksed_sm4ks_cg_cmp_rd_rs1_b20_str) +80003750: 000ea203 lw x4,0(x29) +80003754: 01420863 beq x4,x20,80003764 +80003758: 269042ef jal x5,800081c0 +8000375c: 8000374c .word 0x8000374c +80003760: 80013230 .word 0x80013230 +80003764: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x05d152f7 +80003768: 000faa83 lw x21,0(x31) +8000376c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0xd079397d +80003770: 000fac03 lw x24,0(x31) +80003774: 004f8f93 addi x31,x31,4 + +80003778 : +Zksed_sm4ks_cg_cmp_rd_rs1_b21: + sm4ks x21, x21, x24, 0 # perform operation +80003778: 358a8ab3 sm4ks x21,x21,x24,0x0 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zksed_sm4ks_cg_cmp_rd_rs1_b21, Zksed_sm4ks_cg_cmp_rd_rs1_b21_str) +8000377c: 000ea203 lw x4,0(x29) +80003780: 01520863 beq x4,x21,80003790 +80003784: 23d042ef jal x5,800081c0 +80003788: 80003778 .word 0x80003778 +8000378c: 8001326a .word 0x8001326a +80003790: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x41db9d76 +80003794: 000fab03 lw x22,0(x31) +80003798: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x7bec5d0e +8000379c: 000fa383 lw x7,0(x31) +800037a0: 004f8f93 addi x31,x31,4 + +800037a4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b22: + sm4ks x22, x22, x7, 0 # perform operation +800037a4: 347b0b33 sm4ks x22,x22,x7,0x0 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zksed_sm4ks_cg_cmp_rd_rs1_b22, Zksed_sm4ks_cg_cmp_rd_rs1_b22_str) +800037a8: 000ea203 lw x4,0(x29) +800037ac: 01620863 beq x4,x22,800037bc +800037b0: 211042ef jal x5,800081c0 +800037b4: 800037a4 .word 0x800037a4 +800037b8: 800132a4 .word 0x800132a4 +800037bc: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x1905f9f0 +800037c0: 000fab83 lw x23,0(x31) +800037c4: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xb81104f0 +800037c8: 000fa983 lw x19,0(x31) +800037cc: 004f8f93 addi x31,x31,4 + +800037d0 : +Zksed_sm4ks_cg_cmp_rd_rs1_b23: + sm4ks x23, x23, x19, 3 # perform operation +800037d0: f53b8bb3 sm4ks x23,x23,x19,0x3 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zksed_sm4ks_cg_cmp_rd_rs1_b23, Zksed_sm4ks_cg_cmp_rd_rs1_b23_str) +800037d4: 000ea203 lw x4,0(x29) +800037d8: 01720863 beq x4,x23,800037e8 +800037dc: 1e5042ef jal x5,800081c0 +800037e0: 800037d0 .word 0x800037d0 +800037e4: 800132de .word 0x800132de +800037e8: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xecb3bfa4 +800037ec: 000fac03 lw x24,0(x31) +800037f0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0x430d7c53 +800037f4: 000fa483 lw x9,0(x31) +800037f8: 004f8f93 addi x31,x31,4 + +800037fc : +Zksed_sm4ks_cg_cmp_rd_rs1_b24: + sm4ks x24, x24, x9, 1 # perform operation +800037fc: 749c0c33 sm4ks x24,x24,x9,0x1 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zksed_sm4ks_cg_cmp_rd_rs1_b24, Zksed_sm4ks_cg_cmp_rd_rs1_b24_str) +80003800: 000ea203 lw x4,0(x29) +80003804: 01820863 beq x4,x24,80003814 +80003808: 1b9042ef jal x5,800081c0 +8000380c: 800037fc .word 0x800037fc +80003810: 80013318 .word 0x80013318 +80003814: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x5ddadbc1 +80003818: 000fac83 lw x25,0(x31) +8000381c: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0xe8eeef12 +80003820: 000fa603 lw x12,0(x31) +80003824: 004f8f93 addi x31,x31,4 + +80003828 : +Zksed_sm4ks_cg_cmp_rd_rs1_b25: + sm4ks x25, x25, x12, 2 # perform operation +80003828: b4cc8cb3 sm4ks x25,x25,x12,0x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zksed_sm4ks_cg_cmp_rd_rs1_b25, Zksed_sm4ks_cg_cmp_rd_rs1_b25_str) +8000382c: 000ea203 lw x4,0(x29) +80003830: 01920863 beq x4,x25,80003840 +80003834: 18d042ef jal x5,800081c0 +80003838: 80003828 .word 0x80003828 +8000383c: 80013352 .word 0x80013352 +80003840: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x8e0a6e2b +80003844: 000fad03 lw x26,0(x31) +80003848: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x46daa21e +8000384c: 000fa983 lw x19,0(x31) +80003850: 004f8f93 addi x31,x31,4 + +80003854 : +Zksed_sm4ks_cg_cmp_rd_rs1_b26: + sm4ks x26, x26, x19, 1 # perform operation +80003854: 753d0d33 sm4ks x26,x26,x19,0x1 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zksed_sm4ks_cg_cmp_rd_rs1_b26, Zksed_sm4ks_cg_cmp_rd_rs1_b26_str) +80003858: 000ea203 lw x4,0(x29) +8000385c: 01a20863 beq x4,x26,8000386c +80003860: 161042ef jal x5,800081c0 +80003864: 80003854 .word 0x80003854 +80003868: 8001338c .word 0x8001338c +8000386c: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xf05a6b53 +80003870: 000fad83 lw x27,0(x31) +80003874: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x40c09d00 +80003878: 000fa803 lw x16,0(x31) +8000387c: 004f8f93 addi x31,x31,4 + +80003880 : +Zksed_sm4ks_cg_cmp_rd_rs1_b27: + sm4ks x27, x27, x16, 2 # perform operation +80003880: b50d8db3 sm4ks x27,x27,x16,0x2 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zksed_sm4ks_cg_cmp_rd_rs1_b27, Zksed_sm4ks_cg_cmp_rd_rs1_b27_str) +80003884: 000ea203 lw x4,0(x29) +80003888: 01b20863 beq x4,x27,80003898 +8000388c: 135042ef jal x5,800081c0 +80003890: 80003880 .word 0x80003880 +80003894: 800133c6 .word 0x800133c6 +80003898: 004e8e93 addi x29,x29,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x503d8021 +8000389c: 000fae03 lw x28,0(x31) +800038a0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0xf8602bb2 +800038a4: 000fa883 lw x17,0(x31) +800038a8: 004f8f93 addi x31,x31,4 + +800038ac : +Zksed_sm4ks_cg_cmp_rd_rs1_b28: + sm4ks x28, x28, x17, 1 # perform operation +800038ac: 751e0e33 sm4ks x28,x28,x17,0x1 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zksed_sm4ks_cg_cmp_rd_rs1_b28, Zksed_sm4ks_cg_cmp_rd_rs1_b28_str) +800038b0: 000ea203 lw x4,0(x29) +800038b4: 01c20863 beq x4,x28,800038c4 +800038b8: 109042ef jal x5,800081c0 +800038bc: 800038ac .word 0x800038ac +800038c0: 80013400 .word 0x80013400 +800038c4: 004e8e93 addi x29,x29,4 + + mv x9, x29 # switch signature pointer register to avoid conflict with test +800038c8: 000e8493 addi x9,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x1e043d54 +800038cc: 000fae83 lw x29,0(x31) +800038d0: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xdfc49a99 +800038d4: 000fac83 lw x25,0(x31) +800038d8: 004f8f93 addi x31,x31,4 + +800038dc : +Zksed_sm4ks_cg_cmp_rd_rs1_b29: + sm4ks x29, x29, x25, 0 # perform operation +800038dc: 359e8eb3 sm4ks x29,x29,x25,0x0 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zksed_sm4ks_cg_cmp_rd_rs1_b29, Zksed_sm4ks_cg_cmp_rd_rs1_b29_str) +800038e0: 0004a203 lw x4,0(x9) +800038e4: 01d20863 beq x4,x29,800038f4 +800038e8: 0d9042ef jal x5,800081c0 +800038ec: 800038dc .word 0x800038dc +800038f0: 8001343a .word 0x8001343a +800038f4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xf29f8519 +800038f8: 000faf03 lw x30,0(x31) +800038fc: 004f8f93 addi x31,x31,4 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x97e69c7b +80003900: 000faa03 lw x20,0(x31) +80003904: 004f8f93 addi x31,x31,4 + +80003908 : +Zksed_sm4ks_cg_cmp_rd_rs1_b30: + sm4ks x30, x30, x20, 2 # perform operation +80003908: b54f0f33 sm4ks x30,x30,x20,0x2 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zksed_sm4ks_cg_cmp_rd_rs1_b30, Zksed_sm4ks_cg_cmp_rd_rs1_b30_str) +8000390c: 0004a203 lw x4,0(x9) +80003910: 01e20863 beq x4,x30,80003920 +80003914: 0ad042ef jal x5,800081c0 +80003918: 80003908 .word 0x80003908 +8000391c: 80013474 .word 0x80013474 +80003920: 00448493 addi x9,x9,4 + + mv x19, x31 # switch data pointer register to avoid conflict with test +80003924: 000f8993 addi x19,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x63537832 +80003928: 0009af83 lw x31,0(x19) +8000392c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs2: x20 = 0x28aff49d +80003930: 0009aa03 lw x20,0(x19) +80003934: 00498993 addi x19,x19,4 + +80003938 : +Zksed_sm4ks_cg_cmp_rd_rs1_b31: + sm4ks x31, x31, x20, 1 # perform operation +80003938: 754f8fb3 sm4ks x31,x31,x20,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zksed_sm4ks_cg_cmp_rd_rs1_b31, Zksed_sm4ks_cg_cmp_rd_rs1_b31_str) +8000393c: 0004a203 lw x4,0(x9) +80003940: 01f20863 beq x4,x31,80003950 +80003944: 07d042ef jal x5,800081c0 +80003948: 80003938 .word 0x80003938 +8000394c: 800134ae .word 0x800134ae +80003950: 00448493 addi x9,x9,4 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x131cf288 +80003954: 0009a903 lw x18,0(x19) +80003958: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0x63771aff +8000395c: 0009a003 lw x0,0(x19) +80003960: 00498993 addi x19,x19,4 + +80003964 : +Zksed_sm4ks_cg_cmp_rd_rs2_b0: + sm4ks x0, x18, x0, 0 # perform operation +80003964: 34090033 sm4ks x0,x18,x0,0x0 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zksed_sm4ks_cg_cmp_rd_rs2_b0, Zksed_sm4ks_cg_cmp_rd_rs2_b0_str) +80003968: 0004a203 lw x4,0(x9) +8000396c: 00020863 beq x4,x0,8000397c +80003970: 051042ef jal x5,800081c0 +80003974: 80003964 .word 0x80003964 +80003978: 800134e8 .word 0x800134e8 +8000397c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x361aa73f +80003980: 0009a303 lw x6,0(x19) +80003984: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xfb9b70e7 +80003988: 0009a083 lw x1,0(x19) +8000398c: 00498993 addi x19,x19,4 + +80003990 : +Zksed_sm4ks_cg_cmp_rd_rs2_b1: + sm4ks x1, x6, x1, 0 # perform operation +80003990: 341300b3 sm4ks x1,x6,x1,0x0 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zksed_sm4ks_cg_cmp_rd_rs2_b1, Zksed_sm4ks_cg_cmp_rd_rs2_b1_str) +80003994: 0004a203 lw x4,0(x9) +80003998: 00120863 beq x4,x1,800039a8 +8000399c: 025042ef jal x5,800081c0 +800039a0: 80003990 .word 0x80003990 +800039a4: 80013521 .word 0x80013521 +800039a8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0xd52feb73 +800039ac: 0009a083 lw x1,0(x19) +800039b0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x2d629bbf +800039b4: 0009a103 lw x2,0(x19) +800039b8: 00498993 addi x19,x19,4 + +800039bc : +Zksed_sm4ks_cg_cmp_rd_rs2_b2: + sm4ks x2, x1, x2, 2 # perform operation +800039bc: b4208133 sm4ks x2,x1,x2,0x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zksed_sm4ks_cg_cmp_rd_rs2_b2, Zksed_sm4ks_cg_cmp_rd_rs2_b2_str) +800039c0: 0004a203 lw x4,0(x9) +800039c4: 00220863 beq x4,x2,800039d4 +800039c8: 7f8042ef jal x5,800081c0 +800039cc: 800039bc .word 0x800039bc +800039d0: 8001355a .word 0x8001355a +800039d4: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0xe69189a6 +800039d8: 0009a103 lw x2,0(x19) +800039dc: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x3f8954e4 +800039e0: 0009a183 lw x3,0(x19) +800039e4: 00498993 addi x19,x19,4 + +800039e8 : +Zksed_sm4ks_cg_cmp_rd_rs2_b3: + sm4ks x3, x2, x3, 3 # perform operation +800039e8: f43101b3 sm4ks x3,x2,x3,0x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zksed_sm4ks_cg_cmp_rd_rs2_b3, Zksed_sm4ks_cg_cmp_rd_rs2_b3_str) +800039ec: 0004a203 lw x4,0(x9) +800039f0: 00320863 beq x4,x3,80003a00 +800039f4: 7cc042ef jal x5,800081c0 +800039f8: 800039e8 .word 0x800039e8 +800039fc: 80013593 .word 0x80013593 +80003a00: 00448493 addi x9,x9,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80003a04: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80003a08: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x34a1a7d4 +80003a0c: 0009a583 lw x11,0(x19) +80003a10: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x47f94972 +80003a14: 0009a203 lw x4,0(x19) +80003a18: 00498993 addi x19,x19,4 + +80003a1c : +Zksed_sm4ks_cg_cmp_rd_rs2_b4: + sm4ks x4, x11, x4, 2 # perform operation +80003a1c: b4458233 sm4ks x4,x11,x4,0x2 + # Check if x4 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x4, Zksed_sm4ks_cg_cmp_rd_rs2_b4, Zksed_sm4ks_cg_cmp_rd_rs2_b4_str) +80003a20: 0004a683 lw x13,0(x9) +80003a24: 00468863 beq x13,x4,80003a34 +80003a28: 7d80476f jal x14,80008200 +80003a2c: 80003a1c .word 0x80003a1c +80003a30: 800135cc .word 0x800135cc +80003a34: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xbd29a795 +80003a38: 0009af03 lw x30,0(x19) +80003a3c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x7f44a890 +80003a40: 0009a283 lw x5,0(x19) +80003a44: 00498993 addi x19,x19,4 + +80003a48 : +Zksed_sm4ks_cg_cmp_rd_rs2_b5: + sm4ks x5, x30, x5, 2 # perform operation +80003a48: b45f02b3 sm4ks x5,x30,x5,0x2 + # Check if x5 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x5, Zksed_sm4ks_cg_cmp_rd_rs2_b5, Zksed_sm4ks_cg_cmp_rd_rs2_b5_str) +80003a4c: 0004a683 lw x13,0(x9) +80003a50: 00568863 beq x13,x5,80003a60 +80003a54: 7ac0476f jal x14,80008200 +80003a58: 80003a48 .word 0x80003a48 +80003a5c: 80013605 .word 0x80013605 +80003a60: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xd8aa9f7c +80003a64: 0009a503 lw x10,0(x19) +80003a68: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x74fd4dc9 +80003a6c: 0009a303 lw x6,0(x19) +80003a70: 00498993 addi x19,x19,4 + +80003a74 : +Zksed_sm4ks_cg_cmp_rd_rs2_b6: + sm4ks x6, x10, x6, 1 # perform operation +80003a74: 74650333 sm4ks x6,x10,x6,0x1 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zksed_sm4ks_cg_cmp_rd_rs2_b6, Zksed_sm4ks_cg_cmp_rd_rs2_b6_str) +80003a78: 0004a683 lw x13,0(x9) +80003a7c: 00668863 beq x13,x6,80003a8c +80003a80: 7800476f jal x14,80008200 +80003a84: 80003a74 .word 0x80003a74 +80003a88: 8001363e .word 0x8001363e +80003a8c: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x298985ad +80003a90: 0009a083 lw x1,0(x19) +80003a94: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xa926942f +80003a98: 0009a383 lw x7,0(x19) +80003a9c: 00498993 addi x19,x19,4 + +80003aa0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b7: + sm4ks x7, x1, x7, 1 # perform operation +80003aa0: 747083b3 sm4ks x7,x1,x7,0x1 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zksed_sm4ks_cg_cmp_rd_rs2_b7, Zksed_sm4ks_cg_cmp_rd_rs2_b7_str) +80003aa4: 0004a683 lw x13,0(x9) +80003aa8: 00768863 beq x13,x7,80003ab8 +80003aac: 7540476f jal x14,80008200 +80003ab0: 80003aa0 .word 0x80003aa0 +80003ab4: 80013677 .word 0x80013677 +80003ab8: 00448493 addi x9,x9,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x2b27eecd +80003abc: 0009a283 lw x5,0(x19) +80003ac0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x3b88bb99 +80003ac4: 0009a403 lw x8,0(x19) +80003ac8: 00498993 addi x19,x19,4 + +80003acc : +Zksed_sm4ks_cg_cmp_rd_rs2_b8: + sm4ks x8, x5, x8, 0 # perform operation +80003acc: 34828433 sm4ks x8,x5,x8,0x0 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zksed_sm4ks_cg_cmp_rd_rs2_b8, Zksed_sm4ks_cg_cmp_rd_rs2_b8_str) +80003ad0: 0004a683 lw x13,0(x9) +80003ad4: 00868863 beq x13,x8,80003ae4 +80003ad8: 7280476f jal x14,80008200 +80003adc: 80003acc .word 0x80003acc +80003ae0: 800136b0 .word 0x800136b0 +80003ae4: 00448493 addi x9,x9,4 + + mv x1, x9 # switch signature pointer register to avoid conflict with test +80003ae8: 00048093 addi x1,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x2f696b10 +80003aec: 0009aa03 lw x20,0(x19) +80003af0: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xb652396c +80003af4: 0009a483 lw x9,0(x19) +80003af8: 00498993 addi x19,x19,4 + +80003afc : +Zksed_sm4ks_cg_cmp_rd_rs2_b9: + sm4ks x9, x20, x9, 0 # perform operation +80003afc: 349a04b3 sm4ks x9,x20,x9,0x0 + # Check if x9 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x9, Zksed_sm4ks_cg_cmp_rd_rs2_b9, Zksed_sm4ks_cg_cmp_rd_rs2_b9_str) +80003b00: 0000a683 lw x13,0(x1) +80003b04: 00968863 beq x13,x9,80003b14 +80003b08: 6f80476f jal x14,80008200 +80003b0c: 80003afc .word 0x80003afc +80003b10: 800136e9 .word 0x800136e9 +80003b14: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0xf28f5dae +80003b18: 0009a003 lw x0,0(x19) +80003b1c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x0ec54f9c +80003b20: 0009a503 lw x10,0(x19) +80003b24: 00498993 addi x19,x19,4 + +80003b28 : +Zksed_sm4ks_cg_cmp_rd_rs2_b10: + sm4ks x10, x0, x10, 1 # perform operation +80003b28: 74a00533 sm4ks x10,x0,x10,0x1 + # Check if x10 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x10, Zksed_sm4ks_cg_cmp_rd_rs2_b10, Zksed_sm4ks_cg_cmp_rd_rs2_b10_str) +80003b2c: 0000a683 lw x13,0(x1) +80003b30: 00a68863 beq x13,x10,80003b40 +80003b34: 6cc0476f jal x14,80008200 +80003b38: 80003b28 .word 0x80003b28 +80003b3c: 80013722 .word 0x80013722 +80003b40: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0x63633513 +80003b44: 0009ac03 lw x24,0(x19) +80003b48: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x45ebba42 +80003b4c: 0009a583 lw x11,0(x19) +80003b50: 00498993 addi x19,x19,4 + +80003b54 : +Zksed_sm4ks_cg_cmp_rd_rs2_b11: + sm4ks x11, x24, x11, 3 # perform operation +80003b54: f4bc05b3 sm4ks x11,x24,x11,0x3 + # Check if x11 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x11, Zksed_sm4ks_cg_cmp_rd_rs2_b11, Zksed_sm4ks_cg_cmp_rd_rs2_b11_str) +80003b58: 0000a683 lw x13,0(x1) +80003b5c: 00b68863 beq x13,x11,80003b6c +80003b60: 6a00476f jal x14,80008200 +80003b64: 80003b54 .word 0x80003b54 +80003b68: 8001375c .word 0x8001375c +80003b6c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x8e172559 +80003b70: 0009ac83 lw x25,0(x19) +80003b74: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xbedca7e0 +80003b78: 0009a603 lw x12,0(x19) +80003b7c: 00498993 addi x19,x19,4 + +80003b80 : +Zksed_sm4ks_cg_cmp_rd_rs2_b12: + sm4ks x12, x25, x12, 1 # perform operation +80003b80: 74cc8633 sm4ks x12,x25,x12,0x1 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zksed_sm4ks_cg_cmp_rd_rs2_b12, Zksed_sm4ks_cg_cmp_rd_rs2_b12_str) +80003b84: 0000a683 lw x13,0(x1) +80003b88: 00c68863 beq x13,x12,80003b98 +80003b8c: 6740476f jal x14,80008200 +80003b90: 80003b80 .word 0x80003b80 +80003b94: 80013796 .word 0x80013796 +80003b98: 00408093 addi x1,x1,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80003b9c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80003ba0: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x2249ecb7 +80003ba4: 0009a003 lw x0,0(x19) +80003ba8: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xcb099c1a +80003bac: 0009a683 lw x13,0(x19) +80003bb0: 00498993 addi x19,x19,4 + +80003bb4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b13: + sm4ks x13, x0, x13, 0 # perform operation +80003bb4: 34d006b3 sm4ks x13,x0,x13,0x0 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zksed_sm4ks_cg_cmp_rd_rs2_b13, Zksed_sm4ks_cg_cmp_rd_rs2_b13_str) +80003bb8: 0000a383 lw x7,0(x1) +80003bbc: 00d38863 beq x7,x13,80003bcc +80003bc0: 6180446f jal x8,800081d8 +80003bc4: 80003bb4 .word 0x80003bb4 +80003bc8: 800137d0 .word 0x800137d0 +80003bcc: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x9e8c7a57 +80003bd0: 0009a503 lw x10,0(x19) +80003bd4: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xad9bd05d +80003bd8: 0009a703 lw x14,0(x19) +80003bdc: 00498993 addi x19,x19,4 + +80003be0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b14: + sm4ks x14, x10, x14, 1 # perform operation +80003be0: 74e50733 sm4ks x14,x10,x14,0x1 + # Check if x14 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x14, Zksed_sm4ks_cg_cmp_rd_rs2_b14, Zksed_sm4ks_cg_cmp_rd_rs2_b14_str) +80003be4: 0000a383 lw x7,0(x1) +80003be8: 00e38863 beq x7,x14,80003bf8 +80003bec: 5ec0446f jal x8,800081d8 +80003bf0: 80003be0 .word 0x80003be0 +80003bf4: 8001380a .word 0x8001380a +80003bf8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x0ed1c58a +80003bfc: 0009aa83 lw x21,0(x19) +80003c00: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0xc81d5820 +80003c04: 0009a783 lw x15,0(x19) +80003c08: 00498993 addi x19,x19,4 + +80003c0c : +Zksed_sm4ks_cg_cmp_rd_rs2_b15: + sm4ks x15, x21, x15, 3 # perform operation +80003c0c: f4fa87b3 sm4ks x15,x21,x15,0x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x15, Zksed_sm4ks_cg_cmp_rd_rs2_b15, Zksed_sm4ks_cg_cmp_rd_rs2_b15_str) +80003c10: 0000a383 lw x7,0(x1) +80003c14: 00f38863 beq x7,x15,80003c24 +80003c18: 5c00446f jal x8,800081d8 +80003c1c: 80003c0c .word 0x80003c0c +80003c20: 80013844 .word 0x80013844 +80003c24: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x02e167f0 +80003c28: 0009ad03 lw x26,0(x19) +80003c2c: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xffd2d53f +80003c30: 0009a803 lw x16,0(x19) +80003c34: 00498993 addi x19,x19,4 + +80003c38 : +Zksed_sm4ks_cg_cmp_rd_rs2_b16: + sm4ks x16, x26, x16, 2 # perform operation +80003c38: b50d0833 sm4ks x16,x26,x16,0x2 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zksed_sm4ks_cg_cmp_rd_rs2_b16, Zksed_sm4ks_cg_cmp_rd_rs2_b16_str) +80003c3c: 0000a383 lw x7,0(x1) +80003c40: 01038863 beq x7,x16,80003c50 +80003c44: 5940446f jal x8,800081d8 +80003c48: 80003c38 .word 0x80003c38 +80003c4c: 8001387e .word 0x8001387e +80003c50: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xa52bf30a +80003c54: 0009ab83 lw x23,0(x19) +80003c58: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xea8be01f +80003c5c: 0009a883 lw x17,0(x19) +80003c60: 00498993 addi x19,x19,4 + +80003c64 : +Zksed_sm4ks_cg_cmp_rd_rs2_b17: + sm4ks x17, x23, x17, 0 # perform operation +80003c64: 351b88b3 sm4ks x17,x23,x17,0x0 + # Check if x17 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x17, Zksed_sm4ks_cg_cmp_rd_rs2_b17, Zksed_sm4ks_cg_cmp_rd_rs2_b17_str) +80003c68: 0000a383 lw x7,0(x1) +80003c6c: 01138863 beq x7,x17,80003c7c +80003c70: 5680446f jal x8,800081d8 +80003c74: 80003c64 .word 0x80003c64 +80003c78: 800138b8 .word 0x800138b8 +80003c7c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x99115417 +80003c80: 0009af83 lw x31,0(x19) +80003c84: 00498993 addi x19,x19,4 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x4ba41d3f +80003c88: 0009a903 lw x18,0(x19) +80003c8c: 00498993 addi x19,x19,4 + +80003c90 : +Zksed_sm4ks_cg_cmp_rd_rs2_b18: + sm4ks x18, x31, x18, 1 # perform operation +80003c90: 752f8933 sm4ks x18,x31,x18,0x1 + # Check if x18 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x18, Zksed_sm4ks_cg_cmp_rd_rs2_b18, Zksed_sm4ks_cg_cmp_rd_rs2_b18_str) +80003c94: 0000a383 lw x7,0(x1) +80003c98: 01238863 beq x7,x18,80003ca8 +80003c9c: 53c0446f jal x8,800081d8 +80003ca0: 80003c90 .word 0x80003c90 +80003ca4: 800138f2 .word 0x800138f2 +80003ca8: 00408093 addi x1,x1,4 + + mv x18, x19 # switch data pointer register to avoid conflict with test +80003cac: 00098913 addi x18,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x9eb719f9 +80003cb0: 00092303 lw x6,0(x18) +80003cb4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x05b0736a +80003cb8: 00092983 lw x19,0(x18) +80003cbc: 00490913 addi x18,x18,4 + +80003cc0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b19: + sm4ks x19, x6, x19, 2 # perform operation +80003cc0: b53309b3 sm4ks x19,x6,x19,0x2 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zksed_sm4ks_cg_cmp_rd_rs2_b19, Zksed_sm4ks_cg_cmp_rd_rs2_b19_str) +80003cc4: 0000a383 lw x7,0(x1) +80003cc8: 01338863 beq x7,x19,80003cd8 +80003ccc: 50c0446f jal x8,800081d8 +80003cd0: 80003cc0 .word 0x80003cc0 +80003cd4: 8001392c .word 0x8001392c +80003cd8: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x21ff62ad +80003cdc: 00092983 lw x19,0(x18) +80003ce0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x42972497 +80003ce4: 00092a03 lw x20,0(x18) +80003ce8: 00490913 addi x18,x18,4 + +80003cec : +Zksed_sm4ks_cg_cmp_rd_rs2_b20: + sm4ks x20, x19, x20, 2 # perform operation +80003cec: b5498a33 sm4ks x20,x19,x20,0x2 + # Check if x20 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x20, Zksed_sm4ks_cg_cmp_rd_rs2_b20, Zksed_sm4ks_cg_cmp_rd_rs2_b20_str) +80003cf0: 0000a383 lw x7,0(x1) +80003cf4: 01438863 beq x7,x20,80003d04 +80003cf8: 4e00446f jal x8,800081d8 +80003cfc: 80003cec .word 0x80003cec +80003d00: 80013966 .word 0x80013966 +80003d04: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x7a94c52a +80003d08: 00092c03 lw x24,0(x18) +80003d0c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xe7508d16 +80003d10: 00092a83 lw x21,0(x18) +80003d14: 00490913 addi x18,x18,4 + +80003d18 : +Zksed_sm4ks_cg_cmp_rd_rs2_b21: + sm4ks x21, x24, x21, 2 # perform operation +80003d18: b55c0ab3 sm4ks x21,x24,x21,0x2 + # Check if x21 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x21, Zksed_sm4ks_cg_cmp_rd_rs2_b21, Zksed_sm4ks_cg_cmp_rd_rs2_b21_str) +80003d1c: 0000a383 lw x7,0(x1) +80003d20: 01538863 beq x7,x21,80003d30 +80003d24: 4b40446f jal x8,800081d8 +80003d28: 80003d18 .word 0x80003d18 +80003d2c: 800139a0 .word 0x800139a0 +80003d30: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x381ada0a +80003d34: 00092683 lw x13,0(x18) +80003d38: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x1e692efa +80003d3c: 00092b03 lw x22,0(x18) +80003d40: 00490913 addi x18,x18,4 + +80003d44 : +Zksed_sm4ks_cg_cmp_rd_rs2_b22: + sm4ks x22, x13, x22, 1 # perform operation +80003d44: 75668b33 sm4ks x22,x13,x22,0x1 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zksed_sm4ks_cg_cmp_rd_rs2_b22, Zksed_sm4ks_cg_cmp_rd_rs2_b22_str) +80003d48: 0000a383 lw x7,0(x1) +80003d4c: 01638863 beq x7,x22,80003d5c +80003d50: 4880446f jal x8,800081d8 +80003d54: 80003d44 .word 0x80003d44 +80003d58: 800139da .word 0x800139da +80003d5c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xf947651a +80003d60: 00092603 lw x12,0(x18) +80003d64: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x4c0ad5c0 +80003d68: 00092b83 lw x23,0(x18) +80003d6c: 00490913 addi x18,x18,4 + +80003d70 : +Zksed_sm4ks_cg_cmp_rd_rs2_b23: + sm4ks x23, x12, x23, 1 # perform operation +80003d70: 75760bb3 sm4ks x23,x12,x23,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zksed_sm4ks_cg_cmp_rd_rs2_b23, Zksed_sm4ks_cg_cmp_rd_rs2_b23_str) +80003d74: 0000a383 lw x7,0(x1) +80003d78: 01738863 beq x7,x23,80003d88 +80003d7c: 45c0446f jal x8,800081d8 +80003d80: 80003d70 .word 0x80003d70 +80003d84: 80013a14 .word 0x80013a14 +80003d88: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x637573ef +80003d8c: 00092f03 lw x30,0(x18) +80003d90: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x9d089d9a +80003d94: 00092c03 lw x24,0(x18) +80003d98: 00490913 addi x18,x18,4 + +80003d9c : +Zksed_sm4ks_cg_cmp_rd_rs2_b24: + sm4ks x24, x30, x24, 0 # perform operation +80003d9c: 358f0c33 sm4ks x24,x30,x24,0x0 + # Check if x24 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x24, Zksed_sm4ks_cg_cmp_rd_rs2_b24, Zksed_sm4ks_cg_cmp_rd_rs2_b24_str) +80003da0: 0000a383 lw x7,0(x1) +80003da4: 01838863 beq x7,x24,80003db4 +80003da8: 4300446f jal x8,800081d8 +80003dac: 80003d9c .word 0x80003d9c +80003db0: 80013a4e .word 0x80013a4e +80003db4: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xb5fb9412 +80003db8: 00092283 lw x5,0(x18) +80003dbc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x833043c7 +80003dc0: 00092c83 lw x25,0(x18) +80003dc4: 00490913 addi x18,x18,4 + +80003dc8 : +Zksed_sm4ks_cg_cmp_rd_rs2_b25: + sm4ks x25, x5, x25, 0 # perform operation +80003dc8: 35928cb3 sm4ks x25,x5,x25,0x0 + # Check if x25 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x25, Zksed_sm4ks_cg_cmp_rd_rs2_b25, Zksed_sm4ks_cg_cmp_rd_rs2_b25_str) +80003dcc: 0000a383 lw x7,0(x1) +80003dd0: 01938863 beq x7,x25,80003de0 +80003dd4: 4040446f jal x8,800081d8 +80003dd8: 80003dc8 .word 0x80003dc8 +80003ddc: 80013a88 .word 0x80013a88 +80003de0: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x7da6eb60 +80003de4: 00092c83 lw x25,0(x18) +80003de8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xf326b92f +80003dec: 00092d03 lw x26,0(x18) +80003df0: 00490913 addi x18,x18,4 + +80003df4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b26: + sm4ks x26, x25, x26, 1 # perform operation +80003df4: 75ac8d33 sm4ks x26,x25,x26,0x1 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zksed_sm4ks_cg_cmp_rd_rs2_b26, Zksed_sm4ks_cg_cmp_rd_rs2_b26_str) +80003df8: 0000a383 lw x7,0(x1) +80003dfc: 01a38863 beq x7,x26,80003e0c +80003e00: 3d80446f jal x8,800081d8 +80003e04: 80003df4 .word 0x80003df4 +80003e08: 80013ac2 .word 0x80013ac2 +80003e0c: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xa2ba4359 +80003e10: 00092d03 lw x26,0(x18) +80003e14: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x498037b9 +80003e18: 00092d83 lw x27,0(x18) +80003e1c: 00490913 addi x18,x18,4 + +80003e20 : +Zksed_sm4ks_cg_cmp_rd_rs2_b27: + sm4ks x27, x26, x27, 3 # perform operation +80003e20: f5bd0db3 sm4ks x27,x26,x27,0x3 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zksed_sm4ks_cg_cmp_rd_rs2_b27, Zksed_sm4ks_cg_cmp_rd_rs2_b27_str) +80003e24: 0000a383 lw x7,0(x1) +80003e28: 01b38863 beq x7,x27,80003e38 +80003e2c: 3ac0446f jal x8,800081d8 +80003e30: 80003e20 .word 0x80003e20 +80003e34: 80013afc .word 0x80013afc +80003e38: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xfd975a96 +80003e3c: 00092603 lw x12,0(x18) +80003e40: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xb5c84dba +80003e44: 00092e03 lw x28,0(x18) +80003e48: 00490913 addi x18,x18,4 + +80003e4c : +Zksed_sm4ks_cg_cmp_rd_rs2_b28: + sm4ks x28, x12, x28, 2 # perform operation +80003e4c: b5c60e33 sm4ks x28,x12,x28,0x2 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zksed_sm4ks_cg_cmp_rd_rs2_b28, Zksed_sm4ks_cg_cmp_rd_rs2_b28_str) +80003e50: 0000a383 lw x7,0(x1) +80003e54: 01c38863 beq x7,x28,80003e64 +80003e58: 3800446f jal x8,800081d8 +80003e5c: 80003e4c .word 0x80003e4c +80003e60: 80013b36 .word 0x80013b36 +80003e64: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x88f0e277 +80003e68: 00092b03 lw x22,0(x18) +80003e6c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x98f57e55 +80003e70: 00092e83 lw x29,0(x18) +80003e74: 00490913 addi x18,x18,4 + +80003e78 : +Zksed_sm4ks_cg_cmp_rd_rs2_b29: + sm4ks x29, x22, x29, 3 # perform operation +80003e78: f5db0eb3 sm4ks x29,x22,x29,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zksed_sm4ks_cg_cmp_rd_rs2_b29, Zksed_sm4ks_cg_cmp_rd_rs2_b29_str) +80003e7c: 0000a383 lw x7,0(x1) +80003e80: 01d38863 beq x7,x29,80003e90 +80003e84: 3540446f jal x8,800081d8 +80003e88: 80003e78 .word 0x80003e78 +80003e8c: 80013b70 .word 0x80013b70 +80003e90: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x42a9f3e2 +80003e94: 00092f83 lw x31,0(x18) +80003e98: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0xce36e03d +80003e9c: 00092f03 lw x30,0(x18) +80003ea0: 00490913 addi x18,x18,4 + +80003ea4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b30: + sm4ks x30, x31, x30, 3 # perform operation +80003ea4: f5ef8f33 sm4ks x30,x31,x30,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zksed_sm4ks_cg_cmp_rd_rs2_b30, Zksed_sm4ks_cg_cmp_rd_rs2_b30_str) +80003ea8: 0000a383 lw x7,0(x1) +80003eac: 01e38863 beq x7,x30,80003ebc +80003eb0: 3280446f jal x8,800081d8 +80003eb4: 80003ea4 .word 0x80003ea4 +80003eb8: 80013baa .word 0x80013baa +80003ebc: 00408093 addi x1,x1,4 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0xa03c4b6a +80003ec0: 00092983 lw x19,0(x18) +80003ec4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x6ed1f8eb +80003ec8: 00092f83 lw x31,0(x18) +80003ecc: 00490913 addi x18,x18,4 + +80003ed0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b31: + sm4ks x31, x19, x31, 0 # perform operation +80003ed0: 35f98fb3 sm4ks x31,x19,x31,0x0 + # Check if x31 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x31, Zksed_sm4ks_cg_cmp_rd_rs2_b31, Zksed_sm4ks_cg_cmp_rd_rs2_b31_str) +80003ed4: 0000a383 lw x7,0(x1) +80003ed8: 01f38863 beq x7,x31,80003ee8 +80003edc: 2fc0446f jal x8,800081d8 +80003ee0: 80003ed0 .word 0x80003ed0 +80003ee4: 80013be4 .word 0x80013be4 +80003ee8: 00408093 addi x1,x1,4 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0xe2f54641 +80003eec: 00092003 lw x0,0(x18) +80003ef0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xdadd1d26 +80003ef4: 00092003 lw x0,0(x18) +80003ef8: 00490913 addi x18,x18,4 + +80003efc : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0: + sm4ks x0, x0, x0, 1 # perform operation +80003efc: 74000033 sm4ks x0,x0,x0,0x1 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0_str) +80003f00: 0000a383 lw x7,0(x1) +80003f04: 00038863 beq x7,x0,80003f14 +80003f08: 2d00446f jal x8,800081d8 +80003f0c: 80003efc .word 0x80003efc +80003f10: 80013c1e .word 0x80013c1e +80003f14: 00408093 addi x1,x1,4 + + mv x23, x1 # switch signature pointer register to avoid conflict with test +80003f18: 00008b93 addi x23,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xfe42f7b9 +80003f1c: 00092083 lw x1,0(x18) +80003f20: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x223b32cd +80003f24: 00092083 lw x1,0(x18) +80003f28: 00490913 addi x18,x18,4 + +80003f2c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1: + sm4ks x1, x1, x1, 3 # perform operation +80003f2c: f41080b3 sm4ks x1,x1,x1,0x3 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1_str) +80003f30: 000ba383 lw x7,0(x23) +80003f34: 00138863 beq x7,x1,80003f44 +80003f38: 2a00446f jal x8,800081d8 +80003f3c: 80003f2c .word 0x80003f2c +80003f40: 80013c5b .word 0x80013c5b +80003f44: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xd0a8a0a6 +80003f48: 00092103 lw x2,0(x18) +80003f4c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x33e21092 +80003f50: 00092103 lw x2,0(x18) +80003f54: 00490913 addi x18,x18,4 + +80003f58 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2: + sm4ks x2, x2, x2, 0 # perform operation +80003f58: 34210133 sm4ks x2,x2,x2,0x0 + # Check if x2 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x2, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2_str) +80003f5c: 000ba383 lw x7,0(x23) +80003f60: 00238863 beq x7,x2,80003f70 +80003f64: 2740446f jal x8,800081d8 +80003f68: 80003f58 .word 0x80003f58 +80003f6c: 80013c98 .word 0x80013c98 +80003f70: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xf9b45b7a +80003f74: 00092183 lw x3,0(x18) +80003f78: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x91086544 +80003f7c: 00092183 lw x3,0(x18) +80003f80: 00490913 addi x18,x18,4 + +80003f84 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3: + sm4ks x3, x3, x3, 0 # perform operation +80003f84: 343181b3 sm4ks x3,x3,x3,0x0 + # Check if x3 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x3, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3_str) +80003f88: 000ba383 lw x7,0(x23) +80003f8c: 00338863 beq x7,x3,80003f9c +80003f90: 2480446f jal x8,800081d8 +80003f94: 80003f84 .word 0x80003f84 +80003f98: 80013cd5 .word 0x80013cd5 +80003f9c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xdc8f2597 +80003fa0: 00092203 lw x4,0(x18) +80003fa4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x331fe941 +80003fa8: 00092203 lw x4,0(x18) +80003fac: 00490913 addi x18,x18,4 + +80003fb0 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4: + sm4ks x4, x4, x4, 0 # perform operation +80003fb0: 34420233 sm4ks x4,x4,x4,0x0 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4_str) +80003fb4: 000ba383 lw x7,0(x23) +80003fb8: 00438863 beq x7,x4,80003fc8 +80003fbc: 21c0446f jal x8,800081d8 +80003fc0: 80003fb0 .word 0x80003fb0 +80003fc4: 80013d12 .word 0x80013d12 +80003fc8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x4b406470 +80003fcc: 00092283 lw x5,0(x18) +80003fd0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x4d4e0e66 +80003fd4: 00092283 lw x5,0(x18) +80003fd8: 00490913 addi x18,x18,4 + +80003fdc : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5: + sm4ks x5, x5, x5, 0 # perform operation +80003fdc: 345282b3 sm4ks x5,x5,x5,0x0 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5_str) +80003fe0: 000ba383 lw x7,0(x23) +80003fe4: 00538863 beq x7,x5,80003ff4 +80003fe8: 1f00446f jal x8,800081d8 +80003fec: 80003fdc .word 0x80003fdc +80003ff0: 80013d4f .word 0x80013d4f +80003ff4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x6ad94e1f +80003ff8: 00092303 lw x6,0(x18) +80003ffc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x05a4fb6e +80004000: 00092303 lw x6,0(x18) +80004004: 00490913 addi x18,x18,4 + +80004008 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6: + sm4ks x6, x6, x6, 2 # perform operation +80004008: b4630333 sm4ks x6,x6,x6,0x2 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6_str) +8000400c: 000ba383 lw x7,0(x23) +80004010: 00638863 beq x7,x6,80004020 +80004014: 1c40446f jal x8,800081d8 +80004018: 80004008 .word 0x80004008 +8000401c: 80013d8c .word 0x80013d8c +80004020: 004b8b93 addi x23,x23,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80004024: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80004028: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x62067c53 +8000402c: 00092383 lw x7,0(x18) +80004030: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x5d6d595e +80004034: 00092383 lw x7,0(x18) +80004038: 00490913 addi x18,x18,4 + +8000403c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7: + sm4ks x7, x7, x7, 3 # perform operation +8000403c: f47383b3 sm4ks x7,x7,x7,0x3 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7_str) +80004040: 000ba203 lw x4,0(x23) +80004044: 00720863 beq x4,x7,80004054 +80004048: 178042ef jal x5,800081c0 +8000404c: 8000403c .word 0x8000403c +80004050: 80013dc9 .word 0x80013dc9 +80004054: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x4c529738 +80004058: 00092403 lw x8,0(x18) +8000405c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xdab9471f +80004060: 00092403 lw x8,0(x18) +80004064: 00490913 addi x18,x18,4 + +80004068 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8: + sm4ks x8, x8, x8, 3 # perform operation +80004068: f4840433 sm4ks x8,x8,x8,0x3 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8_str) +8000406c: 000ba203 lw x4,0(x23) +80004070: 00820863 beq x4,x8,80004080 +80004074: 14c042ef jal x5,800081c0 +80004078: 80004068 .word 0x80004068 +8000407c: 80013e06 .word 0x80013e06 +80004080: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x5a435865 +80004084: 00092483 lw x9,0(x18) +80004088: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x9e5fc437 +8000408c: 00092483 lw x9,0(x18) +80004090: 00490913 addi x18,x18,4 + +80004094 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9: + sm4ks x9, x9, x9, 2 # perform operation +80004094: b49484b3 sm4ks x9,x9,x9,0x2 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9_str) +80004098: 000ba203 lw x4,0(x23) +8000409c: 00920863 beq x4,x9,800040ac +800040a0: 120042ef jal x5,800081c0 +800040a4: 80004094 .word 0x80004094 +800040a8: 80013e43 .word 0x80013e43 +800040ac: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xdc74561a +800040b0: 00092503 lw x10,0(x18) +800040b4: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xb2bb49f8 +800040b8: 00092503 lw x10,0(x18) +800040bc: 00490913 addi x18,x18,4 + +800040c0 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10: + sm4ks x10, x10, x10, 3 # perform operation +800040c0: f4a50533 sm4ks x10,x10,x10,0x3 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10_str) +800040c4: 000ba203 lw x4,0(x23) +800040c8: 00a20863 beq x4,x10,800040d8 +800040cc: 0f4042ef jal x5,800081c0 +800040d0: 800040c0 .word 0x800040c0 +800040d4: 80013e80 .word 0x80013e80 +800040d8: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x09804163 +800040dc: 00092583 lw x11,0(x18) +800040e0: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x067188be +800040e4: 00092583 lw x11,0(x18) +800040e8: 00490913 addi x18,x18,4 + +800040ec : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11: + sm4ks x11, x11, x11, 2 # perform operation +800040ec: b4b585b3 sm4ks x11,x11,x11,0x2 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11_str) +800040f0: 000ba203 lw x4,0(x23) +800040f4: 00b20863 beq x4,x11,80004104 +800040f8: 0c8042ef jal x5,800081c0 +800040fc: 800040ec .word 0x800040ec +80004100: 80013ebe .word 0x80013ebe +80004104: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x7f353a8f +80004108: 00092603 lw x12,0(x18) +8000410c: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xe344be1a +80004110: 00092603 lw x12,0(x18) +80004114: 00490913 addi x18,x18,4 + +80004118 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12: + sm4ks x12, x12, x12, 2 # perform operation +80004118: b4c60633 sm4ks x12,x12,x12,0x2 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12_str) +8000411c: 000ba203 lw x4,0(x23) +80004120: 00c20863 beq x4,x12,80004130 +80004124: 09c042ef jal x5,800081c0 +80004128: 80004118 .word 0x80004118 +8000412c: 80013efc .word 0x80013efc +80004130: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x33241a1d +80004134: 00092683 lw x13,0(x18) +80004138: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xaeb23ca9 +8000413c: 00092683 lw x13,0(x18) +80004140: 00490913 addi x18,x18,4 + +80004144 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13: + sm4ks x13, x13, x13, 0 # perform operation +80004144: 34d686b3 sm4ks x13,x13,x13,0x0 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13_str) +80004148: 000ba203 lw x4,0(x23) +8000414c: 00d20863 beq x4,x13,8000415c +80004150: 070042ef jal x5,800081c0 +80004154: 80004144 .word 0x80004144 +80004158: 80013f3a .word 0x80013f3a +8000415c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x899b3de6 +80004160: 00092703 lw x14,0(x18) +80004164: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x664af868 +80004168: 00092703 lw x14,0(x18) +8000416c: 00490913 addi x18,x18,4 + +80004170 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14: + sm4ks x14, x14, x14, 0 # perform operation +80004170: 34e70733 sm4ks x14,x14,x14,0x0 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14_str) +80004174: 000ba203 lw x4,0(x23) +80004178: 00e20863 beq x4,x14,80004188 +8000417c: 044042ef jal x5,800081c0 +80004180: 80004170 .word 0x80004170 +80004184: 80013f78 .word 0x80013f78 +80004188: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xb74347ad +8000418c: 00092783 lw x15,0(x18) +80004190: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xdc279b2d +80004194: 00092783 lw x15,0(x18) +80004198: 00490913 addi x18,x18,4 + +8000419c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15: + sm4ks x15, x15, x15, 1 # perform operation +8000419c: 74f787b3 sm4ks x15,x15,x15,0x1 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15_str) +800041a0: 000ba203 lw x4,0(x23) +800041a4: 00f20863 beq x4,x15,800041b4 +800041a8: 018042ef jal x5,800081c0 +800041ac: 8000419c .word 0x8000419c +800041b0: 80013fb6 .word 0x80013fb6 +800041b4: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0xb39c0fea +800041b8: 00092803 lw x16,0(x18) +800041bc: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xb4d22faa +800041c0: 00092803 lw x16,0(x18) +800041c4: 00490913 addi x18,x18,4 + +800041c8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16: + sm4ks x16, x16, x16, 0 # perform operation +800041c8: 35080833 sm4ks x16,x16,x16,0x0 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16_str) +800041cc: 000ba203 lw x4,0(x23) +800041d0: 01020863 beq x4,x16,800041e0 +800041d4: 7ed032ef jal x5,800081c0 +800041d8: 800041c8 .word 0x800041c8 +800041dc: 80013ff4 .word 0x80013ff4 +800041e0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x72a586a9 +800041e4: 00092883 lw x17,0(x18) +800041e8: 00490913 addi x18,x18,4 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xfb2af216 +800041ec: 00092883 lw x17,0(x18) +800041f0: 00490913 addi x18,x18,4 + +800041f4 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17: + sm4ks x17, x17, x17, 2 # perform operation +800041f4: b51888b3 sm4ks x17,x17,x17,0x2 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17_str) +800041f8: 000ba203 lw x4,0(x23) +800041fc: 01120863 beq x4,x17,8000420c +80004200: 7c1032ef jal x5,800081c0 +80004204: 800041f4 .word 0x800041f4 +80004208: 80014032 .word 0x80014032 +8000420c: 004b8b93 addi x23,x23,4 + + mv x1, x18 # switch data pointer register to avoid conflict with test +80004210: 00090093 addi x1,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x8bd01039 +80004214: 0000a903 lw x18,0(x1) +80004218: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x57462ff8 +8000421c: 0000a903 lw x18,0(x1) +80004220: 00408093 addi x1,x1,4 + +80004224 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18: + sm4ks x18, x18, x18, 3 # perform operation +80004224: f5290933 sm4ks x18,x18,x18,0x3 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18_str) +80004228: 000ba203 lw x4,0(x23) +8000422c: 01220863 beq x4,x18,8000423c +80004230: 791032ef jal x5,800081c0 +80004234: 80004224 .word 0x80004224 +80004238: 80014070 .word 0x80014070 +8000423c: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x607cbbb3 +80004240: 0000a983 lw x19,0(x1) +80004244: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xffe3c3cc +80004248: 0000a983 lw x19,0(x1) +8000424c: 00408093 addi x1,x1,4 + +80004250 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19: + sm4ks x19, x19, x19, 0 # perform operation +80004250: 353989b3 sm4ks x19,x19,x19,0x0 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19_str) +80004254: 000ba203 lw x4,0(x23) +80004258: 01320863 beq x4,x19,80004268 +8000425c: 765032ef jal x5,800081c0 +80004260: 80004250 .word 0x80004250 +80004264: 800140ae .word 0x800140ae +80004268: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x6e6af56d +8000426c: 0000aa03 lw x20,0(x1) +80004270: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x58736e40 +80004274: 0000aa03 lw x20,0(x1) +80004278: 00408093 addi x1,x1,4 + +8000427c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20: + sm4ks x20, x20, x20, 0 # perform operation +8000427c: 354a0a33 sm4ks x20,x20,x20,0x0 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20_str) +80004280: 000ba203 lw x4,0(x23) +80004284: 01420863 beq x4,x20,80004294 +80004288: 739032ef jal x5,800081c0 +8000428c: 8000427c .word 0x8000427c +80004290: 800140ec .word 0x800140ec +80004294: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x897b2394 +80004298: 0000aa83 lw x21,0(x1) +8000429c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xf2e02b3d +800042a0: 0000aa83 lw x21,0(x1) +800042a4: 00408093 addi x1,x1,4 + +800042a8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21: + sm4ks x21, x21, x21, 2 # perform operation +800042a8: b55a8ab3 sm4ks x21,x21,x21,0x2 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21_str) +800042ac: 000ba203 lw x4,0(x23) +800042b0: 01520863 beq x4,x21,800042c0 +800042b4: 70d032ef jal x5,800081c0 +800042b8: 800042a8 .word 0x800042a8 +800042bc: 8001412a .word 0x8001412a +800042c0: 004b8b93 addi x23,x23,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x07aff49a +800042c4: 0000ab03 lw x22,0(x1) +800042c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x3b668311 +800042cc: 0000ab03 lw x22,0(x1) +800042d0: 00408093 addi x1,x1,4 + +800042d4 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22: + sm4ks x22, x22, x22, 2 # perform operation +800042d4: b56b0b33 sm4ks x22,x22,x22,0x2 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22_str) +800042d8: 000ba203 lw x4,0(x23) +800042dc: 01620863 beq x4,x22,800042ec +800042e0: 6e1032ef jal x5,800081c0 +800042e4: 800042d4 .word 0x800042d4 +800042e8: 80014168 .word 0x80014168 +800042ec: 004b8b93 addi x23,x23,4 + + mv x19, x23 # switch signature pointer register to avoid conflict with test +800042f0: 000b8993 addi x19,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xf84e6876 +800042f4: 0000ab83 lw x23,0(x1) +800042f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x9a762acf +800042fc: 0000ab83 lw x23,0(x1) +80004300: 00408093 addi x1,x1,4 + +80004304 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23: + sm4ks x23, x23, x23, 0 # perform operation +80004304: 357b8bb3 sm4ks x23,x23,x23,0x0 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23_str) +80004308: 0009a203 lw x4,0(x19) +8000430c: 01720863 beq x4,x23,8000431c +80004310: 6b1032ef jal x5,800081c0 +80004314: 80004304 .word 0x80004304 +80004318: 800141a6 .word 0x800141a6 +8000431c: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x63969c79 +80004320: 0000ac03 lw x24,0(x1) +80004324: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xc638c5c2 +80004328: 0000ac03 lw x24,0(x1) +8000432c: 00408093 addi x1,x1,4 + +80004330 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24: + sm4ks x24, x24, x24, 0 # perform operation +80004330: 358c0c33 sm4ks x24,x24,x24,0x0 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24_str) +80004334: 0009a203 lw x4,0(x19) +80004338: 01820863 beq x4,x24,80004348 +8000433c: 685032ef jal x5,800081c0 +80004340: 80004330 .word 0x80004330 +80004344: 800141e4 .word 0x800141e4 +80004348: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xd3bc5e9f +8000434c: 0000ac83 lw x25,0(x1) +80004350: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8af2dd44 +80004354: 0000ac83 lw x25,0(x1) +80004358: 00408093 addi x1,x1,4 + +8000435c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25: + sm4ks x25, x25, x25, 0 # perform operation +8000435c: 359c8cb3 sm4ks x25,x25,x25,0x0 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25_str) +80004360: 0009a203 lw x4,0(x19) +80004364: 01920863 beq x4,x25,80004374 +80004368: 659032ef jal x5,800081c0 +8000436c: 8000435c .word 0x8000435c +80004370: 80014222 .word 0x80014222 +80004374: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x89d19033 +80004378: 0000ad03 lw x26,0(x1) +8000437c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xf70726a6 +80004380: 0000ad03 lw x26,0(x1) +80004384: 00408093 addi x1,x1,4 + +80004388 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26: + sm4ks x26, x26, x26, 3 # perform operation +80004388: f5ad0d33 sm4ks x26,x26,x26,0x3 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26_str) +8000438c: 0009a203 lw x4,0(x19) +80004390: 01a20863 beq x4,x26,800043a0 +80004394: 62d032ef jal x5,800081c0 +80004398: 80004388 .word 0x80004388 +8000439c: 80014260 .word 0x80014260 +800043a0: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x6ae255e3 +800043a4: 0000ad83 lw x27,0(x1) +800043a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x4cc59ca6 +800043ac: 0000ad83 lw x27,0(x1) +800043b0: 00408093 addi x1,x1,4 + +800043b4 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27: + sm4ks x27, x27, x27, 1 # perform operation +800043b4: 75bd8db3 sm4ks x27,x27,x27,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27_str) +800043b8: 0009a203 lw x4,0(x19) +800043bc: 01b20863 beq x4,x27,800043cc +800043c0: 601032ef jal x5,800081c0 +800043c4: 800043b4 .word 0x800043b4 +800043c8: 8001429e .word 0x8001429e +800043cc: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xa4baa173 +800043d0: 0000ae03 lw x28,0(x1) +800043d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xf9fca75e +800043d8: 0000ae03 lw x28,0(x1) +800043dc: 00408093 addi x1,x1,4 + +800043e0 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28: + sm4ks x28, x28, x28, 3 # perform operation +800043e0: f5ce0e33 sm4ks x28,x28,x28,0x3 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28_str) +800043e4: 0009a203 lw x4,0(x19) +800043e8: 01c20863 beq x4,x28,800043f8 +800043ec: 5d5032ef jal x5,800081c0 +800043f0: 800043e0 .word 0x800043e0 +800043f4: 800142dc .word 0x800142dc +800043f8: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x82632398 +800043fc: 0000ae83 lw x29,0(x1) +80004400: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xfd37fe0d +80004404: 0000ae83 lw x29,0(x1) +80004408: 00408093 addi x1,x1,4 + +8000440c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29: + sm4ks x29, x29, x29, 0 # perform operation +8000440c: 35de8eb3 sm4ks x29,x29,x29,0x0 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29_str) +80004410: 0009a203 lw x4,0(x19) +80004414: 01d20863 beq x4,x29,80004424 +80004418: 5a9032ef jal x5,800081c0 +8000441c: 8000440c .word 0x8000440c +80004420: 8001431a .word 0x8001431a +80004424: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x770b9be8 +80004428: 0000af03 lw x30,0(x1) +8000442c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7017ca1d +80004430: 0000af03 lw x30,0(x1) +80004434: 00408093 addi x1,x1,4 + +80004438 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30: + sm4ks x30, x30, x30, 3 # perform operation +80004438: f5ef0f33 sm4ks x30,x30,x30,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30_str) +8000443c: 0009a203 lw x4,0(x19) +80004440: 01e20863 beq x4,x30,80004450 +80004444: 57d032ef jal x5,800081c0 +80004448: 80004438 .word 0x80004438 +8000444c: 80014358 .word 0x80014358 +80004450: 00498993 addi x19,x19,4 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x978723d0 +80004454: 0000af83 lw x31,0(x1) +80004458: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xba2f6f4f +8000445c: 0000af83 lw x31,0(x1) +80004460: 00408093 addi x1,x1,4 + +80004464 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31: + sm4ks x31, x31, x31, 1 # perform operation +80004464: 75ff8fb3 sm4ks x31,x31,x31,0x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31_str) +80004468: 0009a203 lw x4,0(x19) +8000446c: 01f20863 beq x4,x31,8000447c +80004470: 551032ef jal x5,800081c0 +80004474: 80004464 .word 0x80004464 +80004478: 80014396 .word 0x80014396 +8000447c: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x839d1dcf +80004480: 0000a503 lw x10,0(x1) +80004484: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x431328af +80004488: 0000a103 lw x2,0(x1) +8000448c: 00408093 addi x1,x1,4 + +80004490 : +Zksed_sm4ks_cg_cp_bs_b0: + sm4ks x20, x10, x2, 0 # perform operation +80004490: 34250a33 sm4ks x20,x10,x2,0x0 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_bs_b0, Zksed_sm4ks_cg_cp_bs_b0_str) +80004494: 0009a203 lw x4,0(x19) +80004498: 01420863 beq x4,x20,800044a8 +8000449c: 525032ef jal x5,800081c0 +800044a0: 80004490 .word 0x80004490 +800044a4: 800143d4 .word 0x800143d4 +800044a8: 00498993 addi x19,x19,4 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x336bdd95 +800044ac: 0000a303 lw x6,0(x1) +800044b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xf16c9644 +800044b4: 0000af03 lw x30,0(x1) +800044b8: 00408093 addi x1,x1,4 + +800044bc : +Zksed_sm4ks_cg_cp_bs_b1: + sm4ks x27, x6, x30, 1 # perform operation +800044bc: 75e30db3 sm4ks x27,x6,x30,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_bs_b1, Zksed_sm4ks_cg_cp_bs_b1_str) +800044c0: 0009a203 lw x4,0(x19) +800044c4: 01b20863 beq x4,x27,800044d4 +800044c8: 4f9032ef jal x5,800081c0 +800044cc: 800044bc .word 0x800044bc +800044d0: 80014408 .word 0x80014408 +800044d4: 00498993 addi x19,x19,4 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x2d8e17a1 +800044d8: 0000a303 lw x6,0(x1) +800044dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x82051bc1 +800044e0: 0000a403 lw x8,0(x1) +800044e4: 00408093 addi x1,x1,4 + +800044e8 : +Zksed_sm4ks_cg_cp_bs_b2: + sm4ks x15, x6, x8, 2 # perform operation +800044e8: b48307b3 sm4ks x15,x6,x8,0x2 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_bs_b2, Zksed_sm4ks_cg_cp_bs_b2_str) +800044ec: 0009a203 lw x4,0(x19) +800044f0: 00f20863 beq x4,x15,80004500 +800044f4: 4cd032ef jal x5,800081c0 +800044f8: 800044e8 .word 0x800044e8 +800044fc: 8001443c .word 0x8001443c +80004500: 00498993 addi x19,x19,4 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xa5008888 +80004504: 0000a103 lw x2,0(x1) +80004508: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xd2b38d44 +8000450c: 0000a683 lw x13,0(x1) +80004510: 00408093 addi x1,x1,4 + +80004514 : +Zksed_sm4ks_cg_cp_bs_b3: + sm4ks x29, x2, x13, 3 # perform operation +80004514: f4d10eb3 sm4ks x29,x2,x13,0x3 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_bs_b3, Zksed_sm4ks_cg_cp_bs_b3_str) +80004518: 0009a203 lw x4,0(x19) +8000451c: 01d20863 beq x4,x29,8000452c +80004520: 4a1032ef jal x5,800081c0 +80004524: 80004514 .word 0x80004514 +80004528: 80014470 .word 0x80014470 +8000452c: 00498993 addi x19,x19,4 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x00000000 +80004530: 0000ac83 lw x25,0(x1) +80004534: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x00000000 +80004538: 0000a903 lw x18,0(x1) +8000453c: 00408093 addi x1,x1,4 + +80004540 : +Zksed_sm4ks_cg_cp_sbox_b0: + sm4ks x2, x25, x18, 3 # perform operation +80004540: f52c8133 sm4ks x2,x25,x18,0x3 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b0, Zksed_sm4ks_cg_cp_sbox_b0_str) +80004544: 0009a203 lw x4,0(x19) +80004548: 00220863 beq x4,x2,80004558 +8000454c: 475032ef jal x5,800081c0 +80004550: 80004540 .word 0x80004540 +80004554: 800144a4 .word 0x800144a4 +80004558: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x01010101 +8000455c: 0000a703 lw x14,0(x1) +80004560: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x01010101 +80004564: 0000a683 lw x13,0(x1) +80004568: 00408093 addi x1,x1,4 + +8000456c : +Zksed_sm4ks_cg_cp_sbox_b1: + sm4ks x11, x14, x13, 1 # perform operation +8000456c: 74d705b3 sm4ks x11,x14,x13,0x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b1, Zksed_sm4ks_cg_cp_sbox_b1_str) +80004570: 0009a203 lw x4,0(x19) +80004574: 00b20863 beq x4,x11,80004584 +80004578: 449032ef jal x5,800081c0 +8000457c: 8000456c .word 0x8000456c +80004580: 800144da .word 0x800144da +80004584: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x02020202 +80004588: 0000a483 lw x9,0(x1) +8000458c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x02020202 +80004590: 0000a503 lw x10,0(x1) +80004594: 00408093 addi x1,x1,4 + +80004598 : +Zksed_sm4ks_cg_cp_sbox_b2: + sm4ks x18, x9, x10, 1 # perform operation +80004598: 74a48933 sm4ks x18,x9,x10,0x1 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b2, Zksed_sm4ks_cg_cp_sbox_b2_str) +8000459c: 0009a203 lw x4,0(x19) +800045a0: 01220863 beq x4,x18,800045b0 +800045a4: 41d032ef jal x5,800081c0 +800045a8: 80004598 .word 0x80004598 +800045ac: 80014510 .word 0x80014510 +800045b0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x03030303 +800045b4: 0000af83 lw x31,0(x1) +800045b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x03030303 +800045bc: 0000ae83 lw x29,0(x1) +800045c0: 00408093 addi x1,x1,4 + +800045c4 : +Zksed_sm4ks_cg_cp_sbox_b3: + sm4ks x15, x31, x29, 0 # perform operation +800045c4: 35df87b3 sm4ks x15,x31,x29,0x0 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b3, Zksed_sm4ks_cg_cp_sbox_b3_str) +800045c8: 0009a203 lw x4,0(x19) +800045cc: 00f20863 beq x4,x15,800045dc +800045d0: 3f1032ef jal x5,800081c0 +800045d4: 800045c4 .word 0x800045c4 +800045d8: 80014546 .word 0x80014546 +800045dc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x04040404 +800045e0: 0000ab83 lw x23,0(x1) +800045e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x04040404 +800045e8: 0000a583 lw x11,0(x1) +800045ec: 00408093 addi x1,x1,4 + +800045f0 : +Zksed_sm4ks_cg_cp_sbox_b4: + sm4ks x21, x23, x11, 2 # perform operation +800045f0: b4bb8ab3 sm4ks x21,x23,x11,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b4, Zksed_sm4ks_cg_cp_sbox_b4_str) +800045f4: 0009a203 lw x4,0(x19) +800045f8: 01520863 beq x4,x21,80004608 +800045fc: 3c5032ef jal x5,800081c0 +80004600: 800045f0 .word 0x800045f0 +80004604: 8001457c .word 0x8001457c +80004608: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x05050505 +8000460c: 0000a503 lw x10,0(x1) +80004610: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x05050505 +80004614: 0000ae83 lw x29,0(x1) +80004618: 00408093 addi x1,x1,4 + +8000461c : +Zksed_sm4ks_cg_cp_sbox_b5: + sm4ks x22, x10, x29, 2 # perform operation +8000461c: b5d50b33 sm4ks x22,x10,x29,0x2 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b5, Zksed_sm4ks_cg_cp_sbox_b5_str) +80004620: 0009a203 lw x4,0(x19) +80004624: 01620863 beq x4,x22,80004634 +80004628: 399032ef jal x5,800081c0 +8000462c: 8000461c .word 0x8000461c +80004630: 800145b2 .word 0x800145b2 +80004634: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x06060606 +80004638: 0000a303 lw x6,0(x1) +8000463c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x06060606 +80004640: 0000a183 lw x3,0(x1) +80004644: 00408093 addi x1,x1,4 + +80004648 : +Zksed_sm4ks_cg_cp_sbox_b6: + sm4ks x10, x6, x3, 3 # perform operation +80004648: f4330533 sm4ks x10,x6,x3,0x3 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b6, Zksed_sm4ks_cg_cp_sbox_b6_str) +8000464c: 0009a203 lw x4,0(x19) +80004650: 00a20863 beq x4,x10,80004660 +80004654: 36d032ef jal x5,800081c0 +80004658: 80004648 .word 0x80004648 +8000465c: 800145e8 .word 0x800145e8 +80004660: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x07070707 +80004664: 0000ad03 lw x26,0(x1) +80004668: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x07070707 +8000466c: 0000ae03 lw x28,0(x1) +80004670: 00408093 addi x1,x1,4 + +80004674 : +Zksed_sm4ks_cg_cp_sbox_b7: + sm4ks x31, x26, x28, 2 # perform operation +80004674: b5cd0fb3 sm4ks x31,x26,x28,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b7, Zksed_sm4ks_cg_cp_sbox_b7_str) +80004678: 0009a203 lw x4,0(x19) +8000467c: 01f20863 beq x4,x31,8000468c +80004680: 341032ef jal x5,800081c0 +80004684: 80004674 .word 0x80004674 +80004688: 8001461e .word 0x8001461e +8000468c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x08080808 +80004690: 0000a303 lw x6,0(x1) +80004694: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x08080808 +80004698: 0000ad83 lw x27,0(x1) +8000469c: 00408093 addi x1,x1,4 + +800046a0 : +Zksed_sm4ks_cg_cp_sbox_b8: + sm4ks x25, x6, x27, 1 # perform operation +800046a0: 75b30cb3 sm4ks x25,x6,x27,0x1 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b8, Zksed_sm4ks_cg_cp_sbox_b8_str) +800046a4: 0009a203 lw x4,0(x19) +800046a8: 01920863 beq x4,x25,800046b8 +800046ac: 315032ef jal x5,800081c0 +800046b0: 800046a0 .word 0x800046a0 +800046b4: 80014654 .word 0x80014654 +800046b8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x09090909 +800046bc: 0000ae03 lw x28,0(x1) +800046c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x09090909 +800046c4: 0000a583 lw x11,0(x1) +800046c8: 00408093 addi x1,x1,4 + +800046cc : +Zksed_sm4ks_cg_cp_sbox_b9: + sm4ks x8, x28, x11, 1 # perform operation +800046cc: 74be0433 sm4ks x8,x28,x11,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b9, Zksed_sm4ks_cg_cp_sbox_b9_str) +800046d0: 0009a203 lw x4,0(x19) +800046d4: 00820863 beq x4,x8,800046e4 +800046d8: 2e9032ef jal x5,800081c0 +800046dc: 800046cc .word 0x800046cc +800046e0: 8001468a .word 0x8001468a +800046e4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0a0a0a0a +800046e8: 0000af83 lw x31,0(x1) +800046ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0a0a0a0a +800046f0: 0000a803 lw x16,0(x1) +800046f4: 00408093 addi x1,x1,4 + +800046f8 : +Zksed_sm4ks_cg_cp_sbox_b10: + sm4ks x29, x31, x16, 2 # perform operation +800046f8: b50f8eb3 sm4ks x29,x31,x16,0x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b10, Zksed_sm4ks_cg_cp_sbox_b10_str) +800046fc: 0009a203 lw x4,0(x19) +80004700: 01d20863 beq x4,x29,80004710 +80004704: 2bd032ef jal x5,800081c0 +80004708: 800046f8 .word 0x800046f8 +8000470c: 800146c0 .word 0x800146c0 +80004710: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x0b0b0b0b +80004714: 0000ad03 lw x26,0(x1) +80004718: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x0b0b0b0b +8000471c: 0000a783 lw x15,0(x1) +80004720: 00408093 addi x1,x1,4 + +80004724 : +Zksed_sm4ks_cg_cp_sbox_b11: + sm4ks x14, x26, x15, 3 # perform operation +80004724: f4fd0733 sm4ks x14,x26,x15,0x3 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b11, Zksed_sm4ks_cg_cp_sbox_b11_str) +80004728: 0009a203 lw x4,0(x19) +8000472c: 00e20863 beq x4,x14,8000473c +80004730: 291032ef jal x5,800081c0 +80004734: 80004724 .word 0x80004724 +80004738: 800146f7 .word 0x800146f7 +8000473c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x0c0c0c0c +80004740: 0000ad83 lw x27,0(x1) +80004744: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x0c0c0c0c +80004748: 0000a483 lw x9,0(x1) +8000474c: 00408093 addi x1,x1,4 + +80004750 : +Zksed_sm4ks_cg_cp_sbox_b12: + sm4ks x17, x27, x9, 1 # perform operation +80004750: 749d88b3 sm4ks x17,x27,x9,0x1 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b12, Zksed_sm4ks_cg_cp_sbox_b12_str) +80004754: 0009a203 lw x4,0(x19) +80004758: 01120863 beq x4,x17,80004768 +8000475c: 265032ef jal x5,800081c0 +80004760: 80004750 .word 0x80004750 +80004764: 8001472e .word 0x8001472e +80004768: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0d0d0d0d +8000476c: 0000a903 lw x18,0(x1) +80004770: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0d0d0d0d +80004774: 0000a503 lw x10,0(x1) +80004778: 00408093 addi x1,x1,4 + +8000477c : +Zksed_sm4ks_cg_cp_sbox_b13: + sm4ks x30, x18, x10, 3 # perform operation +8000477c: f4a90f33 sm4ks x30,x18,x10,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b13, Zksed_sm4ks_cg_cp_sbox_b13_str) +80004780: 0009a203 lw x4,0(x19) +80004784: 01e20863 beq x4,x30,80004794 +80004788: 239032ef jal x5,800081c0 +8000478c: 8000477c .word 0x8000477c +80004790: 80014765 .word 0x80014765 +80004794: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0e0e0e0e +80004798: 0000a683 lw x13,0(x1) +8000479c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0e0e0e0e +800047a0: 0000a583 lw x11,0(x1) +800047a4: 00408093 addi x1,x1,4 + +800047a8 : +Zksed_sm4ks_cg_cp_sbox_b14: + sm4ks x26, x13, x11, 2 # perform operation +800047a8: b4b68d33 sm4ks x26,x13,x11,0x2 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b14, Zksed_sm4ks_cg_cp_sbox_b14_str) +800047ac: 0009a203 lw x4,0(x19) +800047b0: 01a20863 beq x4,x26,800047c0 +800047b4: 20d032ef jal x5,800081c0 +800047b8: 800047a8 .word 0x800047a8 +800047bc: 8001479c .word 0x8001479c +800047c0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0f0f0f0f +800047c4: 0000a183 lw x3,0(x1) +800047c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0f0f0f0f +800047cc: 0000ab03 lw x22,0(x1) +800047d0: 00408093 addi x1,x1,4 + +800047d4 : +Zksed_sm4ks_cg_cp_sbox_b15: + sm4ks x15, x3, x22, 2 # perform operation +800047d4: b56187b3 sm4ks x15,x3,x22,0x2 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b15, Zksed_sm4ks_cg_cp_sbox_b15_str) +800047d8: 0009a203 lw x4,0(x19) +800047dc: 00f20863 beq x4,x15,800047ec +800047e0: 1e1032ef jal x5,800081c0 +800047e4: 800047d4 .word 0x800047d4 +800047e8: 800147d3 .word 0x800147d3 +800047ec: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x10101010 +800047f0: 0000a403 lw x8,0(x1) +800047f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x10101010 +800047f8: 0000a703 lw x14,0(x1) +800047fc: 00408093 addi x1,x1,4 + +80004800 : +Zksed_sm4ks_cg_cp_sbox_b16: + sm4ks x31, x8, x14, 1 # perform operation +80004800: 74e40fb3 sm4ks x31,x8,x14,0x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b16, Zksed_sm4ks_cg_cp_sbox_b16_str) +80004804: 0009a203 lw x4,0(x19) +80004808: 01f20863 beq x4,x31,80004818 +8000480c: 1b5032ef jal x5,800081c0 +80004810: 80004800 .word 0x80004800 +80004814: 8001480a .word 0x8001480a +80004818: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x11111111 +8000481c: 0000a503 lw x10,0(x1) +80004820: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x11111111 +80004824: 0000a583 lw x11,0(x1) +80004828: 00408093 addi x1,x1,4 + +8000482c : +Zksed_sm4ks_cg_cp_sbox_b17: + sm4ks x26, x10, x11, 1 # perform operation +8000482c: 74b50d33 sm4ks x26,x10,x11,0x1 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b17, Zksed_sm4ks_cg_cp_sbox_b17_str) +80004830: 0009a203 lw x4,0(x19) +80004834: 01a20863 beq x4,x26,80004844 +80004838: 189032ef jal x5,800081c0 +8000483c: 8000482c .word 0x8000482c +80004840: 80014841 .word 0x80014841 +80004844: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x12121212 +80004848: 0000a183 lw x3,0(x1) +8000484c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x12121212 +80004850: 0000ac83 lw x25,0(x1) +80004854: 00408093 addi x1,x1,4 + +80004858 : +Zksed_sm4ks_cg_cp_sbox_b18: + sm4ks x27, x3, x25, 1 # perform operation +80004858: 75918db3 sm4ks x27,x3,x25,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b18, Zksed_sm4ks_cg_cp_sbox_b18_str) +8000485c: 0009a203 lw x4,0(x19) +80004860: 01b20863 beq x4,x27,80004870 +80004864: 15d032ef jal x5,800081c0 +80004868: 80004858 .word 0x80004858 +8000486c: 80014878 .word 0x80014878 +80004870: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x13131313 +80004874: 0000aa83 lw x21,0(x1) +80004878: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x13131313 +8000487c: 0000ac83 lw x25,0(x1) +80004880: 00408093 addi x1,x1,4 + +80004884 : +Zksed_sm4ks_cg_cp_sbox_b19: + sm4ks x8, x21, x25, 3 # perform operation +80004884: f59a8433 sm4ks x8,x21,x25,0x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b19, Zksed_sm4ks_cg_cp_sbox_b19_str) +80004888: 0009a203 lw x4,0(x19) +8000488c: 00820863 beq x4,x8,8000489c +80004890: 131032ef jal x5,800081c0 +80004894: 80004884 .word 0x80004884 +80004898: 800148af .word 0x800148af +8000489c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x14141414 +800048a0: 0000a703 lw x14,0(x1) +800048a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x14141414 +800048a8: 0000aa03 lw x20,0(x1) +800048ac: 00408093 addi x1,x1,4 + +800048b0 : +Zksed_sm4ks_cg_cp_sbox_b20: + sm4ks x21, x14, x20, 3 # perform operation +800048b0: f5470ab3 sm4ks x21,x14,x20,0x3 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b20, Zksed_sm4ks_cg_cp_sbox_b20_str) +800048b4: 0009a203 lw x4,0(x19) +800048b8: 01520863 beq x4,x21,800048c8 +800048bc: 105032ef jal x5,800081c0 +800048c0: 800048b0 .word 0x800048b0 +800048c4: 800148e6 .word 0x800148e6 +800048c8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x15151515 +800048cc: 0000ac83 lw x25,0(x1) +800048d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x15151515 +800048d4: 0000a903 lw x18,0(x1) +800048d8: 00408093 addi x1,x1,4 + +800048dc : +Zksed_sm4ks_cg_cp_sbox_b21: + sm4ks x6, x25, x18, 1 # perform operation +800048dc: 752c8333 sm4ks x6,x25,x18,0x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b21, Zksed_sm4ks_cg_cp_sbox_b21_str) +800048e0: 0009a203 lw x4,0(x19) +800048e4: 00620863 beq x4,x6,800048f4 +800048e8: 0d9032ef jal x5,800081c0 +800048ec: 800048dc .word 0x800048dc +800048f0: 8001491d .word 0x8001491d +800048f4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x16161616 +800048f8: 0000ac03 lw x24,0(x1) +800048fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x16161616 +80004900: 0000aa83 lw x21,0(x1) +80004904: 00408093 addi x1,x1,4 + +80004908 : +Zksed_sm4ks_cg_cp_sbox_b22: + sm4ks x23, x24, x21, 1 # perform operation +80004908: 755c0bb3 sm4ks x23,x24,x21,0x1 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b22, Zksed_sm4ks_cg_cp_sbox_b22_str) +8000490c: 0009a203 lw x4,0(x19) +80004910: 01720863 beq x4,x23,80004920 +80004914: 0ad032ef jal x5,800081c0 +80004918: 80004908 .word 0x80004908 +8000491c: 80014954 .word 0x80014954 +80004920: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x17171717 +80004924: 0000ae03 lw x28,0(x1) +80004928: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x17171717 +8000492c: 0000ab03 lw x22,0(x1) +80004930: 00408093 addi x1,x1,4 + +80004934 : +Zksed_sm4ks_cg_cp_sbox_b23: + sm4ks x25, x28, x22, 3 # perform operation +80004934: f56e0cb3 sm4ks x25,x28,x22,0x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b23, Zksed_sm4ks_cg_cp_sbox_b23_str) +80004938: 0009a203 lw x4,0(x19) +8000493c: 01920863 beq x4,x25,8000494c +80004940: 081032ef jal x5,800081c0 +80004944: 80004934 .word 0x80004934 +80004948: 8001498b .word 0x8001498b +8000494c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x18181818 +80004950: 0000a803 lw x16,0(x1) +80004954: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x18181818 +80004958: 0000aa03 lw x20,0(x1) +8000495c: 00408093 addi x1,x1,4 + +80004960 : +Zksed_sm4ks_cg_cp_sbox_b24: + sm4ks x9, x16, x20, 1 # perform operation +80004960: 754804b3 sm4ks x9,x16,x20,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b24, Zksed_sm4ks_cg_cp_sbox_b24_str) +80004964: 0009a203 lw x4,0(x19) +80004968: 00920863 beq x4,x9,80004978 +8000496c: 055032ef jal x5,800081c0 +80004970: 80004960 .word 0x80004960 +80004974: 800149c2 .word 0x800149c2 +80004978: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x19191919 +8000497c: 0000a703 lw x14,0(x1) +80004980: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x19191919 +80004984: 0000ad83 lw x27,0(x1) +80004988: 00408093 addi x1,x1,4 + +8000498c : +Zksed_sm4ks_cg_cp_sbox_b25: + sm4ks x22, x14, x27, 1 # perform operation +8000498c: 75b70b33 sm4ks x22,x14,x27,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b25, Zksed_sm4ks_cg_cp_sbox_b25_str) +80004990: 0009a203 lw x4,0(x19) +80004994: 01620863 beq x4,x22,800049a4 +80004998: 029032ef jal x5,800081c0 +8000499c: 8000498c .word 0x8000498c +800049a0: 800149f9 .word 0x800149f9 +800049a4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x1a1a1a1a +800049a8: 0000a503 lw x10,0(x1) +800049ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x1a1a1a1a +800049b0: 0000a903 lw x18,0(x1) +800049b4: 00408093 addi x1,x1,4 + +800049b8 : +Zksed_sm4ks_cg_cp_sbox_b26: + sm4ks x30, x10, x18, 3 # perform operation +800049b8: f5250f33 sm4ks x30,x10,x18,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b26, Zksed_sm4ks_cg_cp_sbox_b26_str) +800049bc: 0009a203 lw x4,0(x19) +800049c0: 01e20863 beq x4,x30,800049d0 +800049c4: 7fc032ef jal x5,800081c0 +800049c8: 800049b8 .word 0x800049b8 +800049cc: 80014a30 .word 0x80014a30 +800049d0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x1b1b1b1b +800049d4: 0000ad03 lw x26,0(x1) +800049d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x1b1b1b1b +800049dc: 0000a703 lw x14,0(x1) +800049e0: 00408093 addi x1,x1,4 + +800049e4 : +Zksed_sm4ks_cg_cp_sbox_b27: + sm4ks x8, x26, x14, 3 # perform operation +800049e4: f4ed0433 sm4ks x8,x26,x14,0x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b27, Zksed_sm4ks_cg_cp_sbox_b27_str) +800049e8: 0009a203 lw x4,0(x19) +800049ec: 00820863 beq x4,x8,800049fc +800049f0: 7d0032ef jal x5,800081c0 +800049f4: 800049e4 .word 0x800049e4 +800049f8: 80014a67 .word 0x80014a67 +800049fc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x1c1c1c1c +80004a00: 0000ae83 lw x29,0(x1) +80004a04: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x1c1c1c1c +80004a08: 0000ac83 lw x25,0(x1) +80004a0c: 00408093 addi x1,x1,4 + +80004a10 : +Zksed_sm4ks_cg_cp_sbox_b28: + sm4ks x3, x29, x25, 1 # perform operation +80004a10: 759e81b3 sm4ks x3,x29,x25,0x1 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b28, Zksed_sm4ks_cg_cp_sbox_b28_str) +80004a14: 0009a203 lw x4,0(x19) +80004a18: 00320863 beq x4,x3,80004a28 +80004a1c: 7a4032ef jal x5,800081c0 +80004a20: 80004a10 .word 0x80004a10 +80004a24: 80014a9e .word 0x80014a9e +80004a28: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x1d1d1d1d +80004a2c: 0000a103 lw x2,0(x1) +80004a30: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x1d1d1d1d +80004a34: 0000a403 lw x8,0(x1) +80004a38: 00408093 addi x1,x1,4 + +80004a3c : +Zksed_sm4ks_cg_cp_sbox_b29: + sm4ks x12, x2, x8, 1 # perform operation +80004a3c: 74810633 sm4ks x12,x2,x8,0x1 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b29, Zksed_sm4ks_cg_cp_sbox_b29_str) +80004a40: 0009a203 lw x4,0(x19) +80004a44: 00c20863 beq x4,x12,80004a54 +80004a48: 778032ef jal x5,800081c0 +80004a4c: 80004a3c .word 0x80004a3c +80004a50: 80014ad5 .word 0x80014ad5 +80004a54: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x1e1e1e1e +80004a58: 0000af03 lw x30,0(x1) +80004a5c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x1e1e1e1e +80004a60: 0000a303 lw x6,0(x1) +80004a64: 00408093 addi x1,x1,4 + +80004a68 : +Zksed_sm4ks_cg_cp_sbox_b30: + sm4ks x26, x30, x6, 1 # perform operation +80004a68: 746f0d33 sm4ks x26,x30,x6,0x1 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b30, Zksed_sm4ks_cg_cp_sbox_b30_str) +80004a6c: 0009a203 lw x4,0(x19) +80004a70: 01a20863 beq x4,x26,80004a80 +80004a74: 74c032ef jal x5,800081c0 +80004a78: 80004a68 .word 0x80004a68 +80004a7c: 80014b0c .word 0x80014b0c +80004a80: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x1f1f1f1f +80004a84: 0000af83 lw x31,0(x1) +80004a88: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x1f1f1f1f +80004a8c: 0000ad83 lw x27,0(x1) +80004a90: 00408093 addi x1,x1,4 + +80004a94 : +Zksed_sm4ks_cg_cp_sbox_b31: + sm4ks x29, x31, x27, 2 # perform operation +80004a94: b5bf8eb3 sm4ks x29,x31,x27,0x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b31, Zksed_sm4ks_cg_cp_sbox_b31_str) +80004a98: 0009a203 lw x4,0(x19) +80004a9c: 01d20863 beq x4,x29,80004aac +80004aa0: 720032ef jal x5,800081c0 +80004aa4: 80004a94 .word 0x80004a94 +80004aa8: 80014b43 .word 0x80014b43 +80004aac: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x20202020 +80004ab0: 0000a383 lw x7,0(x1) +80004ab4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x20202020 +80004ab8: 0000a583 lw x11,0(x1) +80004abc: 00408093 addi x1,x1,4 + +80004ac0 : +Zksed_sm4ks_cg_cp_sbox_b32: + sm4ks x28, x7, x11, 0 # perform operation +80004ac0: 34b38e33 sm4ks x28,x7,x11,0x0 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b32, Zksed_sm4ks_cg_cp_sbox_b32_str) +80004ac4: 0009a203 lw x4,0(x19) +80004ac8: 01c20863 beq x4,x28,80004ad8 +80004acc: 6f4032ef jal x5,800081c0 +80004ad0: 80004ac0 .word 0x80004ac0 +80004ad4: 80014b7a .word 0x80014b7a +80004ad8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x21212121 +80004adc: 0000ab83 lw x23,0(x1) +80004ae0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x21212121 +80004ae4: 0000a103 lw x2,0(x1) +80004ae8: 00408093 addi x1,x1,4 + +80004aec : +Zksed_sm4ks_cg_cp_sbox_b33: + sm4ks x15, x23, x2, 0 # perform operation +80004aec: 342b87b3 sm4ks x15,x23,x2,0x0 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b33, Zksed_sm4ks_cg_cp_sbox_b33_str) +80004af0: 0009a203 lw x4,0(x19) +80004af4: 00f20863 beq x4,x15,80004b04 +80004af8: 6c8032ef jal x5,800081c0 +80004afc: 80004aec .word 0x80004aec +80004b00: 80014bb1 .word 0x80014bb1 +80004b04: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x22222222 +80004b08: 0000ac03 lw x24,0(x1) +80004b0c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x22222222 +80004b10: 0000aa03 lw x20,0(x1) +80004b14: 00408093 addi x1,x1,4 + +80004b18 : +Zksed_sm4ks_cg_cp_sbox_b34: + sm4ks x10, x24, x20, 0 # perform operation +80004b18: 354c0533 sm4ks x10,x24,x20,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b34, Zksed_sm4ks_cg_cp_sbox_b34_str) +80004b1c: 0009a203 lw x4,0(x19) +80004b20: 00a20863 beq x4,x10,80004b30 +80004b24: 69c032ef jal x5,800081c0 +80004b28: 80004b18 .word 0x80004b18 +80004b2c: 80014be8 .word 0x80014be8 +80004b30: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x23232323 +80004b34: 0000af83 lw x31,0(x1) +80004b38: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x23232323 +80004b3c: 0000a603 lw x12,0(x1) +80004b40: 00408093 addi x1,x1,4 + +80004b44 : +Zksed_sm4ks_cg_cp_sbox_b35: + sm4ks x30, x31, x12, 2 # perform operation +80004b44: b4cf8f33 sm4ks x30,x31,x12,0x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b35, Zksed_sm4ks_cg_cp_sbox_b35_str) +80004b48: 0009a203 lw x4,0(x19) +80004b4c: 01e20863 beq x4,x30,80004b5c +80004b50: 670032ef jal x5,800081c0 +80004b54: 80004b44 .word 0x80004b44 +80004b58: 80014c1f .word 0x80014c1f +80004b5c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x24242424 +80004b60: 0000a303 lw x6,0(x1) +80004b64: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x24242424 +80004b68: 0000af83 lw x31,0(x1) +80004b6c: 00408093 addi x1,x1,4 + +80004b70 : +Zksed_sm4ks_cg_cp_sbox_b36: + sm4ks x14, x6, x31, 0 # perform operation +80004b70: 35f30733 sm4ks x14,x6,x31,0x0 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b36, Zksed_sm4ks_cg_cp_sbox_b36_str) +80004b74: 0009a203 lw x4,0(x19) +80004b78: 00e20863 beq x4,x14,80004b88 +80004b7c: 644032ef jal x5,800081c0 +80004b80: 80004b70 .word 0x80004b70 +80004b84: 80014c56 .word 0x80014c56 +80004b88: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x25252525 +80004b8c: 0000a303 lw x6,0(x1) +80004b90: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x25252525 +80004b94: 0000a583 lw x11,0(x1) +80004b98: 00408093 addi x1,x1,4 + +80004b9c : +Zksed_sm4ks_cg_cp_sbox_b37: + sm4ks x23, x6, x11, 3 # perform operation +80004b9c: f4b30bb3 sm4ks x23,x6,x11,0x3 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b37, Zksed_sm4ks_cg_cp_sbox_b37_str) +80004ba0: 0009a203 lw x4,0(x19) +80004ba4: 01720863 beq x4,x23,80004bb4 +80004ba8: 618032ef jal x5,800081c0 +80004bac: 80004b9c .word 0x80004b9c +80004bb0: 80014c8d .word 0x80014c8d +80004bb4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x26262626 +80004bb8: 0000af83 lw x31,0(x1) +80004bbc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x26262626 +80004bc0: 0000a403 lw x8,0(x1) +80004bc4: 00408093 addi x1,x1,4 + +80004bc8 : +Zksed_sm4ks_cg_cp_sbox_b38: + sm4ks x18, x31, x8, 0 # perform operation +80004bc8: 348f8933 sm4ks x18,x31,x8,0x0 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b38, Zksed_sm4ks_cg_cp_sbox_b38_str) +80004bcc: 0009a203 lw x4,0(x19) +80004bd0: 01220863 beq x4,x18,80004be0 +80004bd4: 5ec032ef jal x5,800081c0 +80004bd8: 80004bc8 .word 0x80004bc8 +80004bdc: 80014cc4 .word 0x80014cc4 +80004be0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x27272727 +80004be4: 0000a483 lw x9,0(x1) +80004be8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x27272727 +80004bec: 0000ad83 lw x27,0(x1) +80004bf0: 00408093 addi x1,x1,4 + +80004bf4 : +Zksed_sm4ks_cg_cp_sbox_b39: + sm4ks x3, x9, x27, 0 # perform operation +80004bf4: 35b481b3 sm4ks x3,x9,x27,0x0 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b39, Zksed_sm4ks_cg_cp_sbox_b39_str) +80004bf8: 0009a203 lw x4,0(x19) +80004bfc: 00320863 beq x4,x3,80004c0c +80004c00: 5c0032ef jal x5,800081c0 +80004c04: 80004bf4 .word 0x80004bf4 +80004c08: 80014cfb .word 0x80014cfb +80004c0c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x28282828 +80004c10: 0000ab83 lw x23,0(x1) +80004c14: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x28282828 +80004c18: 0000a603 lw x12,0(x1) +80004c1c: 00408093 addi x1,x1,4 + +80004c20 : +Zksed_sm4ks_cg_cp_sbox_b40: + sm4ks x11, x23, x12, 1 # perform operation +80004c20: 74cb85b3 sm4ks x11,x23,x12,0x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b40, Zksed_sm4ks_cg_cp_sbox_b40_str) +80004c24: 0009a203 lw x4,0(x19) +80004c28: 00b20863 beq x4,x11,80004c38 +80004c2c: 594032ef jal x5,800081c0 +80004c30: 80004c20 .word 0x80004c20 +80004c34: 80014d32 .word 0x80014d32 +80004c38: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x29292929 +80004c3c: 0000af03 lw x30,0(x1) +80004c40: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x29292929 +80004c44: 0000af83 lw x31,0(x1) +80004c48: 00408093 addi x1,x1,4 + +80004c4c : +Zksed_sm4ks_cg_cp_sbox_b41: + sm4ks x16, x30, x31, 2 # perform operation +80004c4c: b5ff0833 sm4ks x16,x30,x31,0x2 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b41, Zksed_sm4ks_cg_cp_sbox_b41_str) +80004c50: 0009a203 lw x4,0(x19) +80004c54: 01020863 beq x4,x16,80004c64 +80004c58: 568032ef jal x5,800081c0 +80004c5c: 80004c4c .word 0x80004c4c +80004c60: 80014d69 .word 0x80014d69 +80004c64: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x2a2a2a2a +80004c68: 0000a303 lw x6,0(x1) +80004c6c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x2a2a2a2a +80004c70: 0000aa03 lw x20,0(x1) +80004c74: 00408093 addi x1,x1,4 + +80004c78 : +Zksed_sm4ks_cg_cp_sbox_b42: + sm4ks x3, x6, x20, 1 # perform operation +80004c78: 754301b3 sm4ks x3,x6,x20,0x1 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b42, Zksed_sm4ks_cg_cp_sbox_b42_str) +80004c7c: 0009a203 lw x4,0(x19) +80004c80: 00320863 beq x4,x3,80004c90 +80004c84: 53c032ef jal x5,800081c0 +80004c88: 80004c78 .word 0x80004c78 +80004c8c: 80014da0 .word 0x80014da0 +80004c90: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x2b2b2b2b +80004c94: 0000a703 lw x14,0(x1) +80004c98: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x2b2b2b2b +80004c9c: 0000a803 lw x16,0(x1) +80004ca0: 00408093 addi x1,x1,4 + +80004ca4 : +Zksed_sm4ks_cg_cp_sbox_b43: + sm4ks x13, x14, x16, 0 # perform operation +80004ca4: 350706b3 sm4ks x13,x14,x16,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b43, Zksed_sm4ks_cg_cp_sbox_b43_str) +80004ca8: 0009a203 lw x4,0(x19) +80004cac: 00d20863 beq x4,x13,80004cbc +80004cb0: 510032ef jal x5,800081c0 +80004cb4: 80004ca4 .word 0x80004ca4 +80004cb8: 80014dd7 .word 0x80014dd7 +80004cbc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x2c2c2c2c +80004cc0: 0000a903 lw x18,0(x1) +80004cc4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x2c2c2c2c +80004cc8: 0000a403 lw x8,0(x1) +80004ccc: 00408093 addi x1,x1,4 + +80004cd0 : +Zksed_sm4ks_cg_cp_sbox_b44: + sm4ks x21, x18, x8, 0 # perform operation +80004cd0: 34890ab3 sm4ks x21,x18,x8,0x0 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b44, Zksed_sm4ks_cg_cp_sbox_b44_str) +80004cd4: 0009a203 lw x4,0(x19) +80004cd8: 01520863 beq x4,x21,80004ce8 +80004cdc: 4e4032ef jal x5,800081c0 +80004ce0: 80004cd0 .word 0x80004cd0 +80004ce4: 80014e0e .word 0x80014e0e +80004ce8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x2d2d2d2d +80004cec: 0000a683 lw x13,0(x1) +80004cf0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x2d2d2d2d +80004cf4: 0000a783 lw x15,0(x1) +80004cf8: 00408093 addi x1,x1,4 + +80004cfc : +Zksed_sm4ks_cg_cp_sbox_b45: + sm4ks x11, x13, x15, 0 # perform operation +80004cfc: 34f685b3 sm4ks x11,x13,x15,0x0 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b45, Zksed_sm4ks_cg_cp_sbox_b45_str) +80004d00: 0009a203 lw x4,0(x19) +80004d04: 00b20863 beq x4,x11,80004d14 +80004d08: 4b8032ef jal x5,800081c0 +80004d0c: 80004cfc .word 0x80004cfc +80004d10: 80014e45 .word 0x80014e45 +80004d14: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x2e2e2e2e +80004d18: 0000ad03 lw x26,0(x1) +80004d1c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x2e2e2e2e +80004d20: 0000a683 lw x13,0(x1) +80004d24: 00408093 addi x1,x1,4 + +80004d28 : +Zksed_sm4ks_cg_cp_sbox_b46: + sm4ks x15, x26, x13, 3 # perform operation +80004d28: f4dd07b3 sm4ks x15,x26,x13,0x3 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b46, Zksed_sm4ks_cg_cp_sbox_b46_str) +80004d2c: 0009a203 lw x4,0(x19) +80004d30: 00f20863 beq x4,x15,80004d40 +80004d34: 48c032ef jal x5,800081c0 +80004d38: 80004d28 .word 0x80004d28 +80004d3c: 80014e7c .word 0x80014e7c +80004d40: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x2f2f2f2f +80004d44: 0000a803 lw x16,0(x1) +80004d48: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x2f2f2f2f +80004d4c: 0000a403 lw x8,0(x1) +80004d50: 00408093 addi x1,x1,4 + +80004d54 : +Zksed_sm4ks_cg_cp_sbox_b47: + sm4ks x30, x16, x8, 3 # perform operation +80004d54: f4880f33 sm4ks x30,x16,x8,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b47, Zksed_sm4ks_cg_cp_sbox_b47_str) +80004d58: 0009a203 lw x4,0(x19) +80004d5c: 01e20863 beq x4,x30,80004d6c +80004d60: 460032ef jal x5,800081c0 +80004d64: 80004d54 .word 0x80004d54 +80004d68: 80014eb3 .word 0x80014eb3 +80004d6c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x30303030 +80004d70: 0000ae03 lw x28,0(x1) +80004d74: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x30303030 +80004d78: 0000a403 lw x8,0(x1) +80004d7c: 00408093 addi x1,x1,4 + +80004d80 : +Zksed_sm4ks_cg_cp_sbox_b48: + sm4ks x20, x28, x8, 0 # perform operation +80004d80: 348e0a33 sm4ks x20,x28,x8,0x0 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b48, Zksed_sm4ks_cg_cp_sbox_b48_str) +80004d84: 0009a203 lw x4,0(x19) +80004d88: 01420863 beq x4,x20,80004d98 +80004d8c: 434032ef jal x5,800081c0 +80004d90: 80004d80 .word 0x80004d80 +80004d94: 80014eea .word 0x80014eea +80004d98: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x31313131 +80004d9c: 0000a903 lw x18,0(x1) +80004da0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x31313131 +80004da4: 0000af83 lw x31,0(x1) +80004da8: 00408093 addi x1,x1,4 + +80004dac : +Zksed_sm4ks_cg_cp_sbox_b49: + sm4ks x9, x18, x31, 0 # perform operation +80004dac: 35f904b3 sm4ks x9,x18,x31,0x0 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b49, Zksed_sm4ks_cg_cp_sbox_b49_str) +80004db0: 0009a203 lw x4,0(x19) +80004db4: 00920863 beq x4,x9,80004dc4 +80004db8: 408032ef jal x5,800081c0 +80004dbc: 80004dac .word 0x80004dac +80004dc0: 80014f21 .word 0x80014f21 +80004dc4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x32323232 +80004dc8: 0000a303 lw x6,0(x1) +80004dcc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x32323232 +80004dd0: 0000a503 lw x10,0(x1) +80004dd4: 00408093 addi x1,x1,4 + +80004dd8 : +Zksed_sm4ks_cg_cp_sbox_b50: + sm4ks x28, x6, x10, 2 # perform operation +80004dd8: b4a30e33 sm4ks x28,x6,x10,0x2 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b50, Zksed_sm4ks_cg_cp_sbox_b50_str) +80004ddc: 0009a203 lw x4,0(x19) +80004de0: 01c20863 beq x4,x28,80004df0 +80004de4: 3dc032ef jal x5,800081c0 +80004de8: 80004dd8 .word 0x80004dd8 +80004dec: 80014f58 .word 0x80014f58 +80004df0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x33333333 +80004df4: 0000ab03 lw x22,0(x1) +80004df8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x33333333 +80004dfc: 0000ac03 lw x24,0(x1) +80004e00: 00408093 addi x1,x1,4 + +80004e04 : +Zksed_sm4ks_cg_cp_sbox_b51: + sm4ks x31, x22, x24, 2 # perform operation +80004e04: b58b0fb3 sm4ks x31,x22,x24,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b51, Zksed_sm4ks_cg_cp_sbox_b51_str) +80004e08: 0009a203 lw x4,0(x19) +80004e0c: 01f20863 beq x4,x31,80004e1c +80004e10: 3b0032ef jal x5,800081c0 +80004e14: 80004e04 .word 0x80004e04 +80004e18: 80014f8f .word 0x80014f8f +80004e1c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x34343434 +80004e20: 0000ab03 lw x22,0(x1) +80004e24: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x34343434 +80004e28: 0000aa03 lw x20,0(x1) +80004e2c: 00408093 addi x1,x1,4 + +80004e30 : +Zksed_sm4ks_cg_cp_sbox_b52: + sm4ks x26, x22, x20, 1 # perform operation +80004e30: 754b0d33 sm4ks x26,x22,x20,0x1 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b52, Zksed_sm4ks_cg_cp_sbox_b52_str) +80004e34: 0009a203 lw x4,0(x19) +80004e38: 01a20863 beq x4,x26,80004e48 +80004e3c: 384032ef jal x5,800081c0 +80004e40: 80004e30 .word 0x80004e30 +80004e44: 80014fc6 .word 0x80014fc6 +80004e48: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x35353535 +80004e4c: 0000aa03 lw x20,0(x1) +80004e50: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x35353535 +80004e54: 0000a503 lw x10,0(x1) +80004e58: 00408093 addi x1,x1,4 + +80004e5c : +Zksed_sm4ks_cg_cp_sbox_b53: + sm4ks x26, x20, x10, 1 # perform operation +80004e5c: 74aa0d33 sm4ks x26,x20,x10,0x1 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b53, Zksed_sm4ks_cg_cp_sbox_b53_str) +80004e60: 0009a203 lw x4,0(x19) +80004e64: 01a20863 beq x4,x26,80004e74 +80004e68: 358032ef jal x5,800081c0 +80004e6c: 80004e5c .word 0x80004e5c +80004e70: 80014ffd .word 0x80014ffd +80004e74: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x36363636 +80004e78: 0000ab03 lw x22,0(x1) +80004e7c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x36363636 +80004e80: 0000a383 lw x7,0(x1) +80004e84: 00408093 addi x1,x1,4 + +80004e88 : +Zksed_sm4ks_cg_cp_sbox_b54: + sm4ks x27, x22, x7, 3 # perform operation +80004e88: f47b0db3 sm4ks x27,x22,x7,0x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b54, Zksed_sm4ks_cg_cp_sbox_b54_str) +80004e8c: 0009a203 lw x4,0(x19) +80004e90: 01b20863 beq x4,x27,80004ea0 +80004e94: 32c032ef jal x5,800081c0 +80004e98: 80004e88 .word 0x80004e88 +80004e9c: 80015034 .word 0x80015034 +80004ea0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x37373737 +80004ea4: 0000a603 lw x12,0(x1) +80004ea8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x37373737 +80004eac: 0000af03 lw x30,0(x1) +80004eb0: 00408093 addi x1,x1,4 + +80004eb4 : +Zksed_sm4ks_cg_cp_sbox_b55: + sm4ks x25, x12, x30, 3 # perform operation +80004eb4: f5e60cb3 sm4ks x25,x12,x30,0x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b55, Zksed_sm4ks_cg_cp_sbox_b55_str) +80004eb8: 0009a203 lw x4,0(x19) +80004ebc: 01920863 beq x4,x25,80004ecc +80004ec0: 300032ef jal x5,800081c0 +80004ec4: 80004eb4 .word 0x80004eb4 +80004ec8: 8001506b .word 0x8001506b +80004ecc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x38383838 +80004ed0: 0000a503 lw x10,0(x1) +80004ed4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x38383838 +80004ed8: 0000a883 lw x17,0(x1) +80004edc: 00408093 addi x1,x1,4 + +80004ee0 : +Zksed_sm4ks_cg_cp_sbox_b56: + sm4ks x22, x10, x17, 3 # perform operation +80004ee0: f5150b33 sm4ks x22,x10,x17,0x3 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b56, Zksed_sm4ks_cg_cp_sbox_b56_str) +80004ee4: 0009a203 lw x4,0(x19) +80004ee8: 01620863 beq x4,x22,80004ef8 +80004eec: 2d4032ef jal x5,800081c0 +80004ef0: 80004ee0 .word 0x80004ee0 +80004ef4: 800150a2 .word 0x800150a2 +80004ef8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x39393939 +80004efc: 0000aa03 lw x20,0(x1) +80004f00: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x39393939 +80004f04: 0000a583 lw x11,0(x1) +80004f08: 00408093 addi x1,x1,4 + +80004f0c : +Zksed_sm4ks_cg_cp_sbox_b57: + sm4ks x29, x20, x11, 1 # perform operation +80004f0c: 74ba0eb3 sm4ks x29,x20,x11,0x1 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b57, Zksed_sm4ks_cg_cp_sbox_b57_str) +80004f10: 0009a203 lw x4,0(x19) +80004f14: 01d20863 beq x4,x29,80004f24 +80004f18: 2a8032ef jal x5,800081c0 +80004f1c: 80004f0c .word 0x80004f0c +80004f20: 800150d9 .word 0x800150d9 +80004f24: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x3a3a3a3a +80004f28: 0000af83 lw x31,0(x1) +80004f2c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x3a3a3a3a +80004f30: 0000a303 lw x6,0(x1) +80004f34: 00408093 addi x1,x1,4 + +80004f38 : +Zksed_sm4ks_cg_cp_sbox_b58: + sm4ks x21, x31, x6, 3 # perform operation +80004f38: f46f8ab3 sm4ks x21,x31,x6,0x3 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b58, Zksed_sm4ks_cg_cp_sbox_b58_str) +80004f3c: 0009a203 lw x4,0(x19) +80004f40: 01520863 beq x4,x21,80004f50 +80004f44: 27c032ef jal x5,800081c0 +80004f48: 80004f38 .word 0x80004f38 +80004f4c: 80015110 .word 0x80015110 +80004f50: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x3b3b3b3b +80004f54: 0000a103 lw x2,0(x1) +80004f58: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x3b3b3b3b +80004f5c: 0000aa03 lw x20,0(x1) +80004f60: 00408093 addi x1,x1,4 + +80004f64 : +Zksed_sm4ks_cg_cp_sbox_b59: + sm4ks x16, x2, x20, 1 # perform operation +80004f64: 75410833 sm4ks x16,x2,x20,0x1 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b59, Zksed_sm4ks_cg_cp_sbox_b59_str) +80004f68: 0009a203 lw x4,0(x19) +80004f6c: 01020863 beq x4,x16,80004f7c +80004f70: 250032ef jal x5,800081c0 +80004f74: 80004f64 .word 0x80004f64 +80004f78: 80015147 .word 0x80015147 +80004f7c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x3c3c3c3c +80004f80: 0000a603 lw x12,0(x1) +80004f84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x3c3c3c3c +80004f88: 0000aa83 lw x21,0(x1) +80004f8c: 00408093 addi x1,x1,4 + +80004f90 : +Zksed_sm4ks_cg_cp_sbox_b60: + sm4ks x9, x12, x21, 3 # perform operation +80004f90: f55604b3 sm4ks x9,x12,x21,0x3 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b60, Zksed_sm4ks_cg_cp_sbox_b60_str) +80004f94: 0009a203 lw x4,0(x19) +80004f98: 00920863 beq x4,x9,80004fa8 +80004f9c: 224032ef jal x5,800081c0 +80004fa0: 80004f90 .word 0x80004f90 +80004fa4: 8001517e .word 0x8001517e +80004fa8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x3d3d3d3d +80004fac: 0000ad03 lw x26,0(x1) +80004fb0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x3d3d3d3d +80004fb4: 0000a483 lw x9,0(x1) +80004fb8: 00408093 addi x1,x1,4 + +80004fbc : +Zksed_sm4ks_cg_cp_sbox_b61: + sm4ks x20, x26, x9, 1 # perform operation +80004fbc: 749d0a33 sm4ks x20,x26,x9,0x1 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b61, Zksed_sm4ks_cg_cp_sbox_b61_str) +80004fc0: 0009a203 lw x4,0(x19) +80004fc4: 01420863 beq x4,x20,80004fd4 +80004fc8: 1f8032ef jal x5,800081c0 +80004fcc: 80004fbc .word 0x80004fbc +80004fd0: 800151b5 .word 0x800151b5 +80004fd4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x3e3e3e3e +80004fd8: 0000ab03 lw x22,0(x1) +80004fdc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x3e3e3e3e +80004fe0: 0000a503 lw x10,0(x1) +80004fe4: 00408093 addi x1,x1,4 + +80004fe8 : +Zksed_sm4ks_cg_cp_sbox_b62: + sm4ks x27, x22, x10, 2 # perform operation +80004fe8: b4ab0db3 sm4ks x27,x22,x10,0x2 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b62, Zksed_sm4ks_cg_cp_sbox_b62_str) +80004fec: 0009a203 lw x4,0(x19) +80004ff0: 01b20863 beq x4,x27,80005000 +80004ff4: 1cc032ef jal x5,800081c0 +80004ff8: 80004fe8 .word 0x80004fe8 +80004ffc: 800151ec .word 0x800151ec +80005000: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x3f3f3f3f +80005004: 0000a303 lw x6,0(x1) +80005008: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x3f3f3f3f +8000500c: 0000a503 lw x10,0(x1) +80005010: 00408093 addi x1,x1,4 + +80005014 : +Zksed_sm4ks_cg_cp_sbox_b63: + sm4ks x20, x6, x10, 3 # perform operation +80005014: f4a30a33 sm4ks x20,x6,x10,0x3 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b63, Zksed_sm4ks_cg_cp_sbox_b63_str) +80005018: 0009a203 lw x4,0(x19) +8000501c: 01420863 beq x4,x20,8000502c +80005020: 1a0032ef jal x5,800081c0 +80005024: 80005014 .word 0x80005014 +80005028: 80015223 .word 0x80015223 +8000502c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x40404040 +80005030: 0000aa83 lw x21,0(x1) +80005034: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x40404040 +80005038: 0000a783 lw x15,0(x1) +8000503c: 00408093 addi x1,x1,4 + +80005040 : +Zksed_sm4ks_cg_cp_sbox_b64: + sm4ks x8, x21, x15, 2 # perform operation +80005040: b4fa8433 sm4ks x8,x21,x15,0x2 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b64, Zksed_sm4ks_cg_cp_sbox_b64_str) +80005044: 0009a203 lw x4,0(x19) +80005048: 00820863 beq x4,x8,80005058 +8000504c: 174032ef jal x5,800081c0 +80005050: 80005040 .word 0x80005040 +80005054: 8001525a .word 0x8001525a +80005058: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x41414141 +8000505c: 0000a703 lw x14,0(x1) +80005060: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x41414141 +80005064: 0000a503 lw x10,0(x1) +80005068: 00408093 addi x1,x1,4 + +8000506c : +Zksed_sm4ks_cg_cp_sbox_b65: + sm4ks x16, x14, x10, 2 # perform operation +8000506c: b4a70833 sm4ks x16,x14,x10,0x2 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b65, Zksed_sm4ks_cg_cp_sbox_b65_str) +80005070: 0009a203 lw x4,0(x19) +80005074: 01020863 beq x4,x16,80005084 +80005078: 148032ef jal x5,800081c0 +8000507c: 8000506c .word 0x8000506c +80005080: 80015291 .word 0x80015291 +80005084: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x42424242 +80005088: 0000a403 lw x8,0(x1) +8000508c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x42424242 +80005090: 0000a583 lw x11,0(x1) +80005094: 00408093 addi x1,x1,4 + +80005098 : +Zksed_sm4ks_cg_cp_sbox_b66: + sm4ks x24, x8, x11, 3 # perform operation +80005098: f4b40c33 sm4ks x24,x8,x11,0x3 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b66, Zksed_sm4ks_cg_cp_sbox_b66_str) +8000509c: 0009a203 lw x4,0(x19) +800050a0: 01820863 beq x4,x24,800050b0 +800050a4: 11c032ef jal x5,800081c0 +800050a8: 80005098 .word 0x80005098 +800050ac: 800152c8 .word 0x800152c8 +800050b0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x43434343 +800050b4: 0000ae03 lw x28,0(x1) +800050b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x43434343 +800050bc: 0000a383 lw x7,0(x1) +800050c0: 00408093 addi x1,x1,4 + +800050c4 : +Zksed_sm4ks_cg_cp_sbox_b67: + sm4ks x15, x28, x7, 3 # perform operation +800050c4: f47e07b3 sm4ks x15,x28,x7,0x3 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b67, Zksed_sm4ks_cg_cp_sbox_b67_str) +800050c8: 0009a203 lw x4,0(x19) +800050cc: 00f20863 beq x4,x15,800050dc +800050d0: 0f0032ef jal x5,800081c0 +800050d4: 800050c4 .word 0x800050c4 +800050d8: 800152ff .word 0x800152ff +800050dc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x44444444 +800050e0: 0000a483 lw x9,0(x1) +800050e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x44444444 +800050e8: 0000ab83 lw x23,0(x1) +800050ec: 00408093 addi x1,x1,4 + +800050f0 : +Zksed_sm4ks_cg_cp_sbox_b68: + sm4ks x21, x9, x23, 3 # perform operation +800050f0: f5748ab3 sm4ks x21,x9,x23,0x3 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b68, Zksed_sm4ks_cg_cp_sbox_b68_str) +800050f4: 0009a203 lw x4,0(x19) +800050f8: 01520863 beq x4,x21,80005108 +800050fc: 0c4032ef jal x5,800081c0 +80005100: 800050f0 .word 0x800050f0 +80005104: 80015336 .word 0x80015336 +80005108: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x45454545 +8000510c: 0000aa03 lw x20,0(x1) +80005110: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x45454545 +80005114: 0000af03 lw x30,0(x1) +80005118: 00408093 addi x1,x1,4 + +8000511c : +Zksed_sm4ks_cg_cp_sbox_b69: + sm4ks x27, x20, x30, 1 # perform operation +8000511c: 75ea0db3 sm4ks x27,x20,x30,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b69, Zksed_sm4ks_cg_cp_sbox_b69_str) +80005120: 0009a203 lw x4,0(x19) +80005124: 01b20863 beq x4,x27,80005134 +80005128: 098032ef jal x5,800081c0 +8000512c: 8000511c .word 0x8000511c +80005130: 8001536d .word 0x8001536d +80005134: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x46464646 +80005138: 0000a703 lw x14,0(x1) +8000513c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x46464646 +80005140: 0000ab03 lw x22,0(x1) +80005144: 00408093 addi x1,x1,4 + +80005148 : +Zksed_sm4ks_cg_cp_sbox_b70: + sm4ks x3, x14, x22, 0 # perform operation +80005148: 356701b3 sm4ks x3,x14,x22,0x0 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b70, Zksed_sm4ks_cg_cp_sbox_b70_str) +8000514c: 0009a203 lw x4,0(x19) +80005150: 00320863 beq x4,x3,80005160 +80005154: 06c032ef jal x5,800081c0 +80005158: 80005148 .word 0x80005148 +8000515c: 800153a4 .word 0x800153a4 +80005160: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x47474747 +80005164: 0000aa83 lw x21,0(x1) +80005168: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x47474747 +8000516c: 0000ac83 lw x25,0(x1) +80005170: 00408093 addi x1,x1,4 + +80005174 : +Zksed_sm4ks_cg_cp_sbox_b71: + sm4ks x13, x21, x25, 0 # perform operation +80005174: 359a86b3 sm4ks x13,x21,x25,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b71, Zksed_sm4ks_cg_cp_sbox_b71_str) +80005178: 0009a203 lw x4,0(x19) +8000517c: 00d20863 beq x4,x13,8000518c +80005180: 040032ef jal x5,800081c0 +80005184: 80005174 .word 0x80005174 +80005188: 800153db .word 0x800153db +8000518c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x48484848 +80005190: 0000a783 lw x15,0(x1) +80005194: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x48484848 +80005198: 0000af83 lw x31,0(x1) +8000519c: 00408093 addi x1,x1,4 + +800051a0 : +Zksed_sm4ks_cg_cp_sbox_b72: + sm4ks x6, x15, x31, 0 # perform operation +800051a0: 35f78333 sm4ks x6,x15,x31,0x0 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b72, Zksed_sm4ks_cg_cp_sbox_b72_str) +800051a4: 0009a203 lw x4,0(x19) +800051a8: 00620863 beq x4,x6,800051b8 +800051ac: 014032ef jal x5,800081c0 +800051b0: 800051a0 .word 0x800051a0 +800051b4: 80015412 .word 0x80015412 +800051b8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x49494949 +800051bc: 0000ab83 lw x23,0(x1) +800051c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x49494949 +800051c4: 0000ad03 lw x26,0(x1) +800051c8: 00408093 addi x1,x1,4 + +800051cc : +Zksed_sm4ks_cg_cp_sbox_b73: + sm4ks x29, x23, x26, 1 # perform operation +800051cc: 75ab8eb3 sm4ks x29,x23,x26,0x1 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b73, Zksed_sm4ks_cg_cp_sbox_b73_str) +800051d0: 0009a203 lw x4,0(x19) +800051d4: 01d20863 beq x4,x29,800051e4 +800051d8: 7e9022ef jal x5,800081c0 +800051dc: 800051cc .word 0x800051cc +800051e0: 80015449 .word 0x80015449 +800051e4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x4a4a4a4a +800051e8: 0000a803 lw x16,0(x1) +800051ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x4a4a4a4a +800051f0: 0000a703 lw x14,0(x1) +800051f4: 00408093 addi x1,x1,4 + +800051f8 : +Zksed_sm4ks_cg_cp_sbox_b74: + sm4ks x25, x16, x14, 0 # perform operation +800051f8: 34e80cb3 sm4ks x25,x16,x14,0x0 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b74, Zksed_sm4ks_cg_cp_sbox_b74_str) +800051fc: 0009a203 lw x4,0(x19) +80005200: 01920863 beq x4,x25,80005210 +80005204: 7bd022ef jal x5,800081c0 +80005208: 800051f8 .word 0x800051f8 +8000520c: 80015480 .word 0x80015480 +80005210: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x4b4b4b4b +80005214: 0000ac03 lw x24,0(x1) +80005218: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x4b4b4b4b +8000521c: 0000a883 lw x17,0(x1) +80005220: 00408093 addi x1,x1,4 + +80005224 : +Zksed_sm4ks_cg_cp_sbox_b75: + sm4ks x7, x24, x17, 3 # perform operation +80005224: f51c03b3 sm4ks x7,x24,x17,0x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b75, Zksed_sm4ks_cg_cp_sbox_b75_str) +80005228: 0009a203 lw x4,0(x19) +8000522c: 00720863 beq x4,x7,8000523c +80005230: 791022ef jal x5,800081c0 +80005234: 80005224 .word 0x80005224 +80005238: 800154b7 .word 0x800154b7 +8000523c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x4c4c4c4c +80005240: 0000a603 lw x12,0(x1) +80005244: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x4c4c4c4c +80005248: 0000a903 lw x18,0(x1) +8000524c: 00408093 addi x1,x1,4 + +80005250 : +Zksed_sm4ks_cg_cp_sbox_b76: + sm4ks x10, x12, x18, 0 # perform operation +80005250: 35260533 sm4ks x10,x12,x18,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b76, Zksed_sm4ks_cg_cp_sbox_b76_str) +80005254: 0009a203 lw x4,0(x19) +80005258: 00a20863 beq x4,x10,80005268 +8000525c: 765022ef jal x5,800081c0 +80005260: 80005250 .word 0x80005250 +80005264: 800154ee .word 0x800154ee +80005268: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x4d4d4d4d +8000526c: 0000a603 lw x12,0(x1) +80005270: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x4d4d4d4d +80005274: 0000aa83 lw x21,0(x1) +80005278: 00408093 addi x1,x1,4 + +8000527c : +Zksed_sm4ks_cg_cp_sbox_b77: + sm4ks x8, x12, x21, 3 # perform operation +8000527c: f5560433 sm4ks x8,x12,x21,0x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b77, Zksed_sm4ks_cg_cp_sbox_b77_str) +80005280: 0009a203 lw x4,0(x19) +80005284: 00820863 beq x4,x8,80005294 +80005288: 739022ef jal x5,800081c0 +8000528c: 8000527c .word 0x8000527c +80005290: 80015525 .word 0x80015525 +80005294: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x4e4e4e4e +80005298: 0000ad03 lw x26,0(x1) +8000529c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x4e4e4e4e +800052a0: 0000a503 lw x10,0(x1) +800052a4: 00408093 addi x1,x1,4 + +800052a8 : +Zksed_sm4ks_cg_cp_sbox_b78: + sm4ks x8, x26, x10, 0 # perform operation +800052a8: 34ad0433 sm4ks x8,x26,x10,0x0 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b78, Zksed_sm4ks_cg_cp_sbox_b78_str) +800052ac: 0009a203 lw x4,0(x19) +800052b0: 00820863 beq x4,x8,800052c0 +800052b4: 70d022ef jal x5,800081c0 +800052b8: 800052a8 .word 0x800052a8 +800052bc: 8001555c .word 0x8001555c +800052c0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x4f4f4f4f +800052c4: 0000a603 lw x12,0(x1) +800052c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x4f4f4f4f +800052cc: 0000a883 lw x17,0(x1) +800052d0: 00408093 addi x1,x1,4 + +800052d4 : +Zksed_sm4ks_cg_cp_sbox_b79: + sm4ks x24, x12, x17, 3 # perform operation +800052d4: f5160c33 sm4ks x24,x12,x17,0x3 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b79, Zksed_sm4ks_cg_cp_sbox_b79_str) +800052d8: 0009a203 lw x4,0(x19) +800052dc: 01820863 beq x4,x24,800052ec +800052e0: 6e1022ef jal x5,800081c0 +800052e4: 800052d4 .word 0x800052d4 +800052e8: 80015593 .word 0x80015593 +800052ec: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x50505050 +800052f0: 0000a303 lw x6,0(x1) +800052f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x50505050 +800052f8: 0000ae03 lw x28,0(x1) +800052fc: 00408093 addi x1,x1,4 + +80005300 : +Zksed_sm4ks_cg_cp_sbox_b80: + sm4ks x7, x6, x28, 3 # perform operation +80005300: f5c303b3 sm4ks x7,x6,x28,0x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b80, Zksed_sm4ks_cg_cp_sbox_b80_str) +80005304: 0009a203 lw x4,0(x19) +80005308: 00720863 beq x4,x7,80005318 +8000530c: 6b5022ef jal x5,800081c0 +80005310: 80005300 .word 0x80005300 +80005314: 800155ca .word 0x800155ca +80005318: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x51515151 +8000531c: 0000ac03 lw x24,0(x1) +80005320: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x51515151 +80005324: 0000a483 lw x9,0(x1) +80005328: 00408093 addi x1,x1,4 + +8000532c : +Zksed_sm4ks_cg_cp_sbox_b81: + sm4ks x21, x24, x9, 1 # perform operation +8000532c: 749c0ab3 sm4ks x21,x24,x9,0x1 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b81, Zksed_sm4ks_cg_cp_sbox_b81_str) +80005330: 0009a203 lw x4,0(x19) +80005334: 01520863 beq x4,x21,80005344 +80005338: 689022ef jal x5,800081c0 +8000533c: 8000532c .word 0x8000532c +80005340: 80015601 .word 0x80015601 +80005344: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x52525252 +80005348: 0000ac03 lw x24,0(x1) +8000534c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x52525252 +80005350: 0000a803 lw x16,0(x1) +80005354: 00408093 addi x1,x1,4 + +80005358 : +Zksed_sm4ks_cg_cp_sbox_b82: + sm4ks x29, x24, x16, 1 # perform operation +80005358: 750c0eb3 sm4ks x29,x24,x16,0x1 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b82, Zksed_sm4ks_cg_cp_sbox_b82_str) +8000535c: 0009a203 lw x4,0(x19) +80005360: 01d20863 beq x4,x29,80005370 +80005364: 65d022ef jal x5,800081c0 +80005368: 80005358 .word 0x80005358 +8000536c: 80015638 .word 0x80015638 +80005370: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x53535353 +80005374: 0000a183 lw x3,0(x1) +80005378: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x53535353 +8000537c: 0000a803 lw x16,0(x1) +80005380: 00408093 addi x1,x1,4 + +80005384 : +Zksed_sm4ks_cg_cp_sbox_b83: + sm4ks x17, x3, x16, 0 # perform operation +80005384: 350188b3 sm4ks x17,x3,x16,0x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b83, Zksed_sm4ks_cg_cp_sbox_b83_str) +80005388: 0009a203 lw x4,0(x19) +8000538c: 01120863 beq x4,x17,8000539c +80005390: 631022ef jal x5,800081c0 +80005394: 80005384 .word 0x80005384 +80005398: 8001566f .word 0x8001566f +8000539c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x54545454 +800053a0: 0000a303 lw x6,0(x1) +800053a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x54545454 +800053a8: 0000a883 lw x17,0(x1) +800053ac: 00408093 addi x1,x1,4 + +800053b0 : +Zksed_sm4ks_cg_cp_sbox_b84: + sm4ks x23, x6, x17, 2 # perform operation +800053b0: b5130bb3 sm4ks x23,x6,x17,0x2 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b84, Zksed_sm4ks_cg_cp_sbox_b84_str) +800053b4: 0009a203 lw x4,0(x19) +800053b8: 01720863 beq x4,x23,800053c8 +800053bc: 605022ef jal x5,800081c0 +800053c0: 800053b0 .word 0x800053b0 +800053c4: 800156a6 .word 0x800156a6 +800053c8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x55555555 +800053cc: 0000ae03 lw x28,0(x1) +800053d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x55555555 +800053d4: 0000ab03 lw x22,0(x1) +800053d8: 00408093 addi x1,x1,4 + +800053dc : +Zksed_sm4ks_cg_cp_sbox_b85: + sm4ks x13, x28, x22, 0 # perform operation +800053dc: 356e06b3 sm4ks x13,x28,x22,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b85, Zksed_sm4ks_cg_cp_sbox_b85_str) +800053e0: 0009a203 lw x4,0(x19) +800053e4: 00d20863 beq x4,x13,800053f4 +800053e8: 5d9022ef jal x5,800081c0 +800053ec: 800053dc .word 0x800053dc +800053f0: 800156dd .word 0x800156dd +800053f4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x56565656 +800053f8: 0000a683 lw x13,0(x1) +800053fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x56565656 +80005400: 0000a403 lw x8,0(x1) +80005404: 00408093 addi x1,x1,4 + +80005408 : +Zksed_sm4ks_cg_cp_sbox_b86: + sm4ks x7, x13, x8, 2 # perform operation +80005408: b48683b3 sm4ks x7,x13,x8,0x2 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b86, Zksed_sm4ks_cg_cp_sbox_b86_str) +8000540c: 0009a203 lw x4,0(x19) +80005410: 00720863 beq x4,x7,80005420 +80005414: 5ad022ef jal x5,800081c0 +80005418: 80005408 .word 0x80005408 +8000541c: 80015714 .word 0x80015714 +80005420: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x57575757 +80005424: 0000a583 lw x11,0(x1) +80005428: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x57575757 +8000542c: 0000aa03 lw x20,0(x1) +80005430: 00408093 addi x1,x1,4 + +80005434 : +Zksed_sm4ks_cg_cp_sbox_b87: + sm4ks x7, x11, x20, 2 # perform operation +80005434: b54583b3 sm4ks x7,x11,x20,0x2 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b87, Zksed_sm4ks_cg_cp_sbox_b87_str) +80005438: 0009a203 lw x4,0(x19) +8000543c: 00720863 beq x4,x7,8000544c +80005440: 581022ef jal x5,800081c0 +80005444: 80005434 .word 0x80005434 +80005448: 8001574b .word 0x8001574b +8000544c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x58585858 +80005450: 0000a503 lw x10,0(x1) +80005454: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x58585858 +80005458: 0000ae83 lw x29,0(x1) +8000545c: 00408093 addi x1,x1,4 + +80005460 : +Zksed_sm4ks_cg_cp_sbox_b88: + sm4ks x21, x10, x29, 2 # perform operation +80005460: b5d50ab3 sm4ks x21,x10,x29,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b88, Zksed_sm4ks_cg_cp_sbox_b88_str) +80005464: 0009a203 lw x4,0(x19) +80005468: 01520863 beq x4,x21,80005478 +8000546c: 555022ef jal x5,800081c0 +80005470: 80005460 .word 0x80005460 +80005474: 80015782 .word 0x80015782 +80005478: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x59595959 +8000547c: 0000ad83 lw x27,0(x1) +80005480: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x59595959 +80005484: 0000af03 lw x30,0(x1) +80005488: 00408093 addi x1,x1,4 + +8000548c : +Zksed_sm4ks_cg_cp_sbox_b89: + sm4ks x2, x27, x30, 2 # perform operation +8000548c: b5ed8133 sm4ks x2,x27,x30,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b89, Zksed_sm4ks_cg_cp_sbox_b89_str) +80005490: 0009a203 lw x4,0(x19) +80005494: 00220863 beq x4,x2,800054a4 +80005498: 529022ef jal x5,800081c0 +8000549c: 8000548c .word 0x8000548c +800054a0: 800157b9 .word 0x800157b9 +800054a4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x5a5a5a5a +800054a8: 0000a483 lw x9,0(x1) +800054ac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x5a5a5a5a +800054b0: 0000ab03 lw x22,0(x1) +800054b4: 00408093 addi x1,x1,4 + +800054b8 : +Zksed_sm4ks_cg_cp_sbox_b90: + sm4ks x2, x9, x22, 2 # perform operation +800054b8: b5648133 sm4ks x2,x9,x22,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b90, Zksed_sm4ks_cg_cp_sbox_b90_str) +800054bc: 0009a203 lw x4,0(x19) +800054c0: 00220863 beq x4,x2,800054d0 +800054c4: 4fd022ef jal x5,800081c0 +800054c8: 800054b8 .word 0x800054b8 +800054cc: 800157f0 .word 0x800157f0 +800054d0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5b5b5b5b +800054d4: 0000a683 lw x13,0(x1) +800054d8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x5b5b5b5b +800054dc: 0000a103 lw x2,0(x1) +800054e0: 00408093 addi x1,x1,4 + +800054e4 : +Zksed_sm4ks_cg_cp_sbox_b91: + sm4ks x30, x13, x2, 0 # perform operation +800054e4: 34268f33 sm4ks x30,x13,x2,0x0 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b91, Zksed_sm4ks_cg_cp_sbox_b91_str) +800054e8: 0009a203 lw x4,0(x19) +800054ec: 01e20863 beq x4,x30,800054fc +800054f0: 4d1022ef jal x5,800081c0 +800054f4: 800054e4 .word 0x800054e4 +800054f8: 80015827 .word 0x80015827 +800054fc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x5c5c5c5c +80005500: 0000a503 lw x10,0(x1) +80005504: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x5c5c5c5c +80005508: 0000aa03 lw x20,0(x1) +8000550c: 00408093 addi x1,x1,4 + +80005510 : +Zksed_sm4ks_cg_cp_sbox_b92: + sm4ks x22, x10, x20, 3 # perform operation +80005510: f5450b33 sm4ks x22,x10,x20,0x3 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b92, Zksed_sm4ks_cg_cp_sbox_b92_str) +80005514: 0009a203 lw x4,0(x19) +80005518: 01620863 beq x4,x22,80005528 +8000551c: 4a5022ef jal x5,800081c0 +80005520: 80005510 .word 0x80005510 +80005524: 8001585e .word 0x8001585e +80005528: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x5d5d5d5d +8000552c: 0000af83 lw x31,0(x1) +80005530: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x5d5d5d5d +80005534: 0000a183 lw x3,0(x1) +80005538: 00408093 addi x1,x1,4 + +8000553c : +Zksed_sm4ks_cg_cp_sbox_b93: + sm4ks x8, x31, x3, 1 # perform operation +8000553c: 743f8433 sm4ks x8,x31,x3,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b93, Zksed_sm4ks_cg_cp_sbox_b93_str) +80005540: 0009a203 lw x4,0(x19) +80005544: 00820863 beq x4,x8,80005554 +80005548: 479022ef jal x5,800081c0 +8000554c: 8000553c .word 0x8000553c +80005550: 80015895 .word 0x80015895 +80005554: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5e5e5e5e +80005558: 0000ad83 lw x27,0(x1) +8000555c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x5e5e5e5e +80005560: 0000ae83 lw x29,0(x1) +80005564: 00408093 addi x1,x1,4 + +80005568 : +Zksed_sm4ks_cg_cp_sbox_b94: + sm4ks x22, x27, x29, 0 # perform operation +80005568: 35dd8b33 sm4ks x22,x27,x29,0x0 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b94, Zksed_sm4ks_cg_cp_sbox_b94_str) +8000556c: 0009a203 lw x4,0(x19) +80005570: 01620863 beq x4,x22,80005580 +80005574: 44d022ef jal x5,800081c0 +80005578: 80005568 .word 0x80005568 +8000557c: 800158cc .word 0x800158cc +80005580: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x5f5f5f5f +80005584: 0000ae83 lw x29,0(x1) +80005588: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x5f5f5f5f +8000558c: 0000a903 lw x18,0(x1) +80005590: 00408093 addi x1,x1,4 + +80005594 : +Zksed_sm4ks_cg_cp_sbox_b95: + sm4ks x13, x29, x18, 0 # perform operation +80005594: 352e86b3 sm4ks x13,x29,x18,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b95, Zksed_sm4ks_cg_cp_sbox_b95_str) +80005598: 0009a203 lw x4,0(x19) +8000559c: 00d20863 beq x4,x13,800055ac +800055a0: 421022ef jal x5,800081c0 +800055a4: 80005594 .word 0x80005594 +800055a8: 80015903 .word 0x80015903 +800055ac: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x60606060 +800055b0: 0000a703 lw x14,0(x1) +800055b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x60606060 +800055b8: 0000a583 lw x11,0(x1) +800055bc: 00408093 addi x1,x1,4 + +800055c0 : +Zksed_sm4ks_cg_cp_sbox_b96: + sm4ks x13, x14, x11, 0 # perform operation +800055c0: 34b706b3 sm4ks x13,x14,x11,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b96, Zksed_sm4ks_cg_cp_sbox_b96_str) +800055c4: 0009a203 lw x4,0(x19) +800055c8: 00d20863 beq x4,x13,800055d8 +800055cc: 3f5022ef jal x5,800081c0 +800055d0: 800055c0 .word 0x800055c0 +800055d4: 8001593a .word 0x8001593a +800055d8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x61616161 +800055dc: 0000a883 lw x17,0(x1) +800055e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x61616161 +800055e4: 0000aa83 lw x21,0(x1) +800055e8: 00408093 addi x1,x1,4 + +800055ec : +Zksed_sm4ks_cg_cp_sbox_b97: + sm4ks x23, x17, x21, 1 # perform operation +800055ec: 75588bb3 sm4ks x23,x17,x21,0x1 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b97, Zksed_sm4ks_cg_cp_sbox_b97_str) +800055f0: 0009a203 lw x4,0(x19) +800055f4: 01720863 beq x4,x23,80005604 +800055f8: 3c9022ef jal x5,800081c0 +800055fc: 800055ec .word 0x800055ec +80005600: 80015971 .word 0x80015971 +80005604: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x62626262 +80005608: 0000ad03 lw x26,0(x1) +8000560c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x62626262 +80005610: 0000a403 lw x8,0(x1) +80005614: 00408093 addi x1,x1,4 + +80005618 : +Zksed_sm4ks_cg_cp_sbox_b98: + sm4ks x29, x26, x8, 2 # perform operation +80005618: b48d0eb3 sm4ks x29,x26,x8,0x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b98, Zksed_sm4ks_cg_cp_sbox_b98_str) +8000561c: 0009a203 lw x4,0(x19) +80005620: 01d20863 beq x4,x29,80005630 +80005624: 39d022ef jal x5,800081c0 +80005628: 80005618 .word 0x80005618 +8000562c: 800159a8 .word 0x800159a8 +80005630: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x63636363 +80005634: 0000ac83 lw x25,0(x1) +80005638: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x63636363 +8000563c: 0000ac03 lw x24,0(x1) +80005640: 00408093 addi x1,x1,4 + +80005644 : +Zksed_sm4ks_cg_cp_sbox_b99: + sm4ks x18, x25, x24, 3 # perform operation +80005644: f58c8933 sm4ks x18,x25,x24,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b99, Zksed_sm4ks_cg_cp_sbox_b99_str) +80005648: 0009a203 lw x4,0(x19) +8000564c: 01220863 beq x4,x18,8000565c +80005650: 371022ef jal x5,800081c0 +80005654: 80005644 .word 0x80005644 +80005658: 800159df .word 0x800159df +8000565c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x64646464 +80005660: 0000ae83 lw x29,0(x1) +80005664: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x64646464 +80005668: 0000a503 lw x10,0(x1) +8000566c: 00408093 addi x1,x1,4 + +80005670 : +Zksed_sm4ks_cg_cp_sbox_b100: + sm4ks x24, x29, x10, 0 # perform operation +80005670: 34ae8c33 sm4ks x24,x29,x10,0x0 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b100, Zksed_sm4ks_cg_cp_sbox_b100_str) +80005674: 0009a203 lw x4,0(x19) +80005678: 01820863 beq x4,x24,80005688 +8000567c: 345022ef jal x5,800081c0 +80005680: 80005670 .word 0x80005670 +80005684: 80015a16 .word 0x80015a16 +80005688: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x65656565 +8000568c: 0000ab83 lw x23,0(x1) +80005690: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x65656565 +80005694: 0000a503 lw x10,0(x1) +80005698: 00408093 addi x1,x1,4 + +8000569c : +Zksed_sm4ks_cg_cp_sbox_b101: + sm4ks x16, x23, x10, 1 # perform operation +8000569c: 74ab8833 sm4ks x16,x23,x10,0x1 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b101, Zksed_sm4ks_cg_cp_sbox_b101_str) +800056a0: 0009a203 lw x4,0(x19) +800056a4: 01020863 beq x4,x16,800056b4 +800056a8: 319022ef jal x5,800081c0 +800056ac: 8000569c .word 0x8000569c +800056b0: 80015a4e .word 0x80015a4e +800056b4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x66666666 +800056b8: 0000a403 lw x8,0(x1) +800056bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x66666666 +800056c0: 0000a303 lw x6,0(x1) +800056c4: 00408093 addi x1,x1,4 + +800056c8 : +Zksed_sm4ks_cg_cp_sbox_b102: + sm4ks x12, x8, x6, 0 # perform operation +800056c8: 34640633 sm4ks x12,x8,x6,0x0 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b102, Zksed_sm4ks_cg_cp_sbox_b102_str) +800056cc: 0009a203 lw x4,0(x19) +800056d0: 00c20863 beq x4,x12,800056e0 +800056d4: 2ed022ef jal x5,800081c0 +800056d8: 800056c8 .word 0x800056c8 +800056dc: 80015a86 .word 0x80015a86 +800056e0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x67676767 +800056e4: 0000ae03 lw x28,0(x1) +800056e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x67676767 +800056ec: 0000af03 lw x30,0(x1) +800056f0: 00408093 addi x1,x1,4 + +800056f4 : +Zksed_sm4ks_cg_cp_sbox_b103: + sm4ks x31, x28, x30, 1 # perform operation +800056f4: 75ee0fb3 sm4ks x31,x28,x30,0x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b103, Zksed_sm4ks_cg_cp_sbox_b103_str) +800056f8: 0009a203 lw x4,0(x19) +800056fc: 01f20863 beq x4,x31,8000570c +80005700: 2c1022ef jal x5,800081c0 +80005704: 800056f4 .word 0x800056f4 +80005708: 80015abe .word 0x80015abe +8000570c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x68686868 +80005710: 0000ad03 lw x26,0(x1) +80005714: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x68686868 +80005718: 0000ac03 lw x24,0(x1) +8000571c: 00408093 addi x1,x1,4 + +80005720 : +Zksed_sm4ks_cg_cp_sbox_b104: + sm4ks x17, x26, x24, 2 # perform operation +80005720: b58d08b3 sm4ks x17,x26,x24,0x2 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b104, Zksed_sm4ks_cg_cp_sbox_b104_str) +80005724: 0009a203 lw x4,0(x19) +80005728: 01120863 beq x4,x17,80005738 +8000572c: 295022ef jal x5,800081c0 +80005730: 80005720 .word 0x80005720 +80005734: 80015af6 .word 0x80015af6 +80005738: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x69696969 +8000573c: 0000ac83 lw x25,0(x1) +80005740: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x69696969 +80005744: 0000a303 lw x6,0(x1) +80005748: 00408093 addi x1,x1,4 + +8000574c : +Zksed_sm4ks_cg_cp_sbox_b105: + sm4ks x12, x25, x6, 0 # perform operation +8000574c: 346c8633 sm4ks x12,x25,x6,0x0 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b105, Zksed_sm4ks_cg_cp_sbox_b105_str) +80005750: 0009a203 lw x4,0(x19) +80005754: 00c20863 beq x4,x12,80005764 +80005758: 269022ef jal x5,800081c0 +8000575c: 8000574c .word 0x8000574c +80005760: 80015b2e .word 0x80015b2e +80005764: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x6a6a6a6a +80005768: 0000aa03 lw x20,0(x1) +8000576c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x6a6a6a6a +80005770: 0000a483 lw x9,0(x1) +80005774: 00408093 addi x1,x1,4 + +80005778 : +Zksed_sm4ks_cg_cp_sbox_b106: + sm4ks x14, x20, x9, 2 # perform operation +80005778: b49a0733 sm4ks x14,x20,x9,0x2 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b106, Zksed_sm4ks_cg_cp_sbox_b106_str) +8000577c: 0009a203 lw x4,0(x19) +80005780: 00e20863 beq x4,x14,80005790 +80005784: 23d022ef jal x5,800081c0 +80005788: 80005778 .word 0x80005778 +8000578c: 80015b66 .word 0x80015b66 +80005790: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x6b6b6b6b +80005794: 0000af03 lw x30,0(x1) +80005798: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x6b6b6b6b +8000579c: 0000a703 lw x14,0(x1) +800057a0: 00408093 addi x1,x1,4 + +800057a4 : +Zksed_sm4ks_cg_cp_sbox_b107: + sm4ks x20, x30, x14, 3 # perform operation +800057a4: f4ef0a33 sm4ks x20,x30,x14,0x3 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b107, Zksed_sm4ks_cg_cp_sbox_b107_str) +800057a8: 0009a203 lw x4,0(x19) +800057ac: 01420863 beq x4,x20,800057bc +800057b0: 211022ef jal x5,800081c0 +800057b4: 800057a4 .word 0x800057a4 +800057b8: 80015b9e .word 0x80015b9e +800057bc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x6c6c6c6c +800057c0: 0000ae03 lw x28,0(x1) +800057c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x6c6c6c6c +800057c8: 0000a183 lw x3,0(x1) +800057cc: 00408093 addi x1,x1,4 + +800057d0 : +Zksed_sm4ks_cg_cp_sbox_b108: + sm4ks x31, x28, x3, 2 # perform operation +800057d0: b43e0fb3 sm4ks x31,x28,x3,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b108, Zksed_sm4ks_cg_cp_sbox_b108_str) +800057d4: 0009a203 lw x4,0(x19) +800057d8: 01f20863 beq x4,x31,800057e8 +800057dc: 1e5022ef jal x5,800081c0 +800057e0: 800057d0 .word 0x800057d0 +800057e4: 80015bd6 .word 0x80015bd6 +800057e8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x6d6d6d6d +800057ec: 0000a783 lw x15,0(x1) +800057f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x6d6d6d6d +800057f4: 0000a603 lw x12,0(x1) +800057f8: 00408093 addi x1,x1,4 + +800057fc : +Zksed_sm4ks_cg_cp_sbox_b109: + sm4ks x13, x15, x12, 2 # perform operation +800057fc: b4c786b3 sm4ks x13,x15,x12,0x2 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b109, Zksed_sm4ks_cg_cp_sbox_b109_str) +80005800: 0009a203 lw x4,0(x19) +80005804: 00d20863 beq x4,x13,80005814 +80005808: 1b9022ef jal x5,800081c0 +8000580c: 800057fc .word 0x800057fc +80005810: 80015c0e .word 0x80015c0e +80005814: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x6e6e6e6e +80005818: 0000a503 lw x10,0(x1) +8000581c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x6e6e6e6e +80005820: 0000a483 lw x9,0(x1) +80005824: 00408093 addi x1,x1,4 + +80005828 : +Zksed_sm4ks_cg_cp_sbox_b110: + sm4ks x21, x10, x9, 2 # perform operation +80005828: b4950ab3 sm4ks x21,x10,x9,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b110, Zksed_sm4ks_cg_cp_sbox_b110_str) +8000582c: 0009a203 lw x4,0(x19) +80005830: 01520863 beq x4,x21,80005840 +80005834: 18d022ef jal x5,800081c0 +80005838: 80005828 .word 0x80005828 +8000583c: 80015c46 .word 0x80015c46 +80005840: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x6f6f6f6f +80005844: 0000ad03 lw x26,0(x1) +80005848: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x6f6f6f6f +8000584c: 0000ab03 lw x22,0(x1) +80005850: 00408093 addi x1,x1,4 + +80005854 : +Zksed_sm4ks_cg_cp_sbox_b111: + sm4ks x6, x26, x22, 0 # perform operation +80005854: 356d0333 sm4ks x6,x26,x22,0x0 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b111, Zksed_sm4ks_cg_cp_sbox_b111_str) +80005858: 0009a203 lw x4,0(x19) +8000585c: 00620863 beq x4,x6,8000586c +80005860: 161022ef jal x5,800081c0 +80005864: 80005854 .word 0x80005854 +80005868: 80015c7e .word 0x80015c7e +8000586c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x70707070 +80005870: 0000af83 lw x31,0(x1) +80005874: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x70707070 +80005878: 0000a483 lw x9,0(x1) +8000587c: 00408093 addi x1,x1,4 + +80005880 : +Zksed_sm4ks_cg_cp_sbox_b112: + sm4ks x24, x31, x9, 3 # perform operation +80005880: f49f8c33 sm4ks x24,x31,x9,0x3 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b112, Zksed_sm4ks_cg_cp_sbox_b112_str) +80005884: 0009a203 lw x4,0(x19) +80005888: 01820863 beq x4,x24,80005898 +8000588c: 135022ef jal x5,800081c0 +80005890: 80005880 .word 0x80005880 +80005894: 80015cb6 .word 0x80015cb6 +80005898: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x71717171 +8000589c: 0000aa03 lw x20,0(x1) +800058a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x71717171 +800058a4: 0000af03 lw x30,0(x1) +800058a8: 00408093 addi x1,x1,4 + +800058ac : +Zksed_sm4ks_cg_cp_sbox_b113: + sm4ks x8, x20, x30, 0 # perform operation +800058ac: 35ea0433 sm4ks x8,x20,x30,0x0 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b113, Zksed_sm4ks_cg_cp_sbox_b113_str) +800058b0: 0009a203 lw x4,0(x19) +800058b4: 00820863 beq x4,x8,800058c4 +800058b8: 109022ef jal x5,800081c0 +800058bc: 800058ac .word 0x800058ac +800058c0: 80015cee .word 0x80015cee +800058c4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x72727272 +800058c8: 0000ac03 lw x24,0(x1) +800058cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x72727272 +800058d0: 0000a583 lw x11,0(x1) +800058d4: 00408093 addi x1,x1,4 + +800058d8 : +Zksed_sm4ks_cg_cp_sbox_b114: + sm4ks x31, x24, x11, 0 # perform operation +800058d8: 34bc0fb3 sm4ks x31,x24,x11,0x0 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b114, Zksed_sm4ks_cg_cp_sbox_b114_str) +800058dc: 0009a203 lw x4,0(x19) +800058e0: 01f20863 beq x4,x31,800058f0 +800058e4: 0dd022ef jal x5,800081c0 +800058e8: 800058d8 .word 0x800058d8 +800058ec: 80015d26 .word 0x80015d26 +800058f0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x73737373 +800058f4: 0000a103 lw x2,0(x1) +800058f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x73737373 +800058fc: 0000a183 lw x3,0(x1) +80005900: 00408093 addi x1,x1,4 + +80005904 : +Zksed_sm4ks_cg_cp_sbox_b115: + sm4ks x11, x2, x3, 1 # perform operation +80005904: 743105b3 sm4ks x11,x2,x3,0x1 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b115, Zksed_sm4ks_cg_cp_sbox_b115_str) +80005908: 0009a203 lw x4,0(x19) +8000590c: 00b20863 beq x4,x11,8000591c +80005910: 0b1022ef jal x5,800081c0 +80005914: 80005904 .word 0x80005904 +80005918: 80015d5e .word 0x80015d5e +8000591c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x74747474 +80005920: 0000a503 lw x10,0(x1) +80005924: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x74747474 +80005928: 0000a803 lw x16,0(x1) +8000592c: 00408093 addi x1,x1,4 + +80005930 : +Zksed_sm4ks_cg_cp_sbox_b116: + sm4ks x23, x10, x16, 2 # perform operation +80005930: b5050bb3 sm4ks x23,x10,x16,0x2 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b116, Zksed_sm4ks_cg_cp_sbox_b116_str) +80005934: 0009a203 lw x4,0(x19) +80005938: 01720863 beq x4,x23,80005948 +8000593c: 085022ef jal x5,800081c0 +80005940: 80005930 .word 0x80005930 +80005944: 80015d96 .word 0x80015d96 +80005948: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x75757575 +8000594c: 0000a583 lw x11,0(x1) +80005950: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x75757575 +80005954: 0000ab83 lw x23,0(x1) +80005958: 00408093 addi x1,x1,4 + +8000595c : +Zksed_sm4ks_cg_cp_sbox_b117: + sm4ks x22, x11, x23, 1 # perform operation +8000595c: 75758b33 sm4ks x22,x11,x23,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b117, Zksed_sm4ks_cg_cp_sbox_b117_str) +80005960: 0009a203 lw x4,0(x19) +80005964: 01620863 beq x4,x22,80005974 +80005968: 059022ef jal x5,800081c0 +8000596c: 8000595c .word 0x8000595c +80005970: 80015dce .word 0x80015dce +80005974: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x76767676 +80005978: 0000a403 lw x8,0(x1) +8000597c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x76767676 +80005980: 0000a383 lw x7,0(x1) +80005984: 00408093 addi x1,x1,4 + +80005988 : +Zksed_sm4ks_cg_cp_sbox_b118: + sm4ks x29, x8, x7, 2 # perform operation +80005988: b4740eb3 sm4ks x29,x8,x7,0x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b118, Zksed_sm4ks_cg_cp_sbox_b118_str) +8000598c: 0009a203 lw x4,0(x19) +80005990: 01d20863 beq x4,x29,800059a0 +80005994: 02d022ef jal x5,800081c0 +80005998: 80005988 .word 0x80005988 +8000599c: 80015e06 .word 0x80015e06 +800059a0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x77777777 +800059a4: 0000ac83 lw x25,0(x1) +800059a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x77777777 +800059ac: 0000a403 lw x8,0(x1) +800059b0: 00408093 addi x1,x1,4 + +800059b4 : +Zksed_sm4ks_cg_cp_sbox_b119: + sm4ks x7, x25, x8, 0 # perform operation +800059b4: 348c83b3 sm4ks x7,x25,x8,0x0 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b119, Zksed_sm4ks_cg_cp_sbox_b119_str) +800059b8: 0009a203 lw x4,0(x19) +800059bc: 00720863 beq x4,x7,800059cc +800059c0: 001022ef jal x5,800081c0 +800059c4: 800059b4 .word 0x800059b4 +800059c8: 80015e3e .word 0x80015e3e +800059cc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x78787878 +800059d0: 0000aa03 lw x20,0(x1) +800059d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x78787878 +800059d8: 0000a783 lw x15,0(x1) +800059dc: 00408093 addi x1,x1,4 + +800059e0 : +Zksed_sm4ks_cg_cp_sbox_b120: + sm4ks x9, x20, x15, 1 # perform operation +800059e0: 74fa04b3 sm4ks x9,x20,x15,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b120, Zksed_sm4ks_cg_cp_sbox_b120_str) +800059e4: 0009a203 lw x4,0(x19) +800059e8: 00920863 beq x4,x9,800059f8 +800059ec: 7d4022ef jal x5,800081c0 +800059f0: 800059e0 .word 0x800059e0 +800059f4: 80015e76 .word 0x80015e76 +800059f8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x79797979 +800059fc: 0000a703 lw x14,0(x1) +80005a00: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x79797979 +80005a04: 0000ae03 lw x28,0(x1) +80005a08: 00408093 addi x1,x1,4 + +80005a0c : +Zksed_sm4ks_cg_cp_sbox_b121: + sm4ks x22, x14, x28, 0 # perform operation +80005a0c: 35c70b33 sm4ks x22,x14,x28,0x0 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b121, Zksed_sm4ks_cg_cp_sbox_b121_str) +80005a10: 0009a203 lw x4,0(x19) +80005a14: 01620863 beq x4,x22,80005a24 +80005a18: 7a8022ef jal x5,800081c0 +80005a1c: 80005a0c .word 0x80005a0c +80005a20: 80015eae .word 0x80015eae +80005a24: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7a7a7a7a +80005a28: 0000ab03 lw x22,0(x1) +80005a2c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7a7a7a7a +80005a30: 0000ae03 lw x28,0(x1) +80005a34: 00408093 addi x1,x1,4 + +80005a38 : +Zksed_sm4ks_cg_cp_sbox_b122: + sm4ks x12, x22, x28, 2 # perform operation +80005a38: b5cb0633 sm4ks x12,x22,x28,0x2 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b122, Zksed_sm4ks_cg_cp_sbox_b122_str) +80005a3c: 0009a203 lw x4,0(x19) +80005a40: 00c20863 beq x4,x12,80005a50 +80005a44: 77c022ef jal x5,800081c0 +80005a48: 80005a38 .word 0x80005a38 +80005a4c: 80015ee6 .word 0x80015ee6 +80005a50: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x7b7b7b7b +80005a54: 0000ac83 lw x25,0(x1) +80005a58: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7b7b7b7b +80005a5c: 0000af03 lw x30,0(x1) +80005a60: 00408093 addi x1,x1,4 + +80005a64 : +Zksed_sm4ks_cg_cp_sbox_b123: + sm4ks x28, x25, x30, 3 # perform operation +80005a64: f5ec8e33 sm4ks x28,x25,x30,0x3 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b123, Zksed_sm4ks_cg_cp_sbox_b123_str) +80005a68: 0009a203 lw x4,0(x19) +80005a6c: 01c20863 beq x4,x28,80005a7c +80005a70: 750022ef jal x5,800081c0 +80005a74: 80005a64 .word 0x80005a64 +80005a78: 80015f1e .word 0x80015f1e +80005a7c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x7c7c7c7c +80005a80: 0000af03 lw x30,0(x1) +80005a84: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7c7c7c7c +80005a88: 0000ac03 lw x24,0(x1) +80005a8c: 00408093 addi x1,x1,4 + +80005a90 : +Zksed_sm4ks_cg_cp_sbox_b124: + sm4ks x11, x30, x24, 0 # perform operation +80005a90: 358f05b3 sm4ks x11,x30,x24,0x0 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b124, Zksed_sm4ks_cg_cp_sbox_b124_str) +80005a94: 0009a203 lw x4,0(x19) +80005a98: 00b20863 beq x4,x11,80005aa8 +80005a9c: 724022ef jal x5,800081c0 +80005aa0: 80005a90 .word 0x80005a90 +80005aa4: 80015f56 .word 0x80015f56 +80005aa8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x7d7d7d7d +80005aac: 0000aa83 lw x21,0(x1) +80005ab0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x7d7d7d7d +80005ab4: 0000a303 lw x6,0(x1) +80005ab8: 00408093 addi x1,x1,4 + +80005abc : +Zksed_sm4ks_cg_cp_sbox_b125: + sm4ks x18, x21, x6, 2 # perform operation +80005abc: b46a8933 sm4ks x18,x21,x6,0x2 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b125, Zksed_sm4ks_cg_cp_sbox_b125_str) +80005ac0: 0009a203 lw x4,0(x19) +80005ac4: 01220863 beq x4,x18,80005ad4 +80005ac8: 6f8022ef jal x5,800081c0 +80005acc: 80005abc .word 0x80005abc +80005ad0: 80015f8e .word 0x80015f8e +80005ad4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x7e7e7e7e +80005ad8: 0000aa83 lw x21,0(x1) +80005adc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7e7e7e7e +80005ae0: 0000af03 lw x30,0(x1) +80005ae4: 00408093 addi x1,x1,4 + +80005ae8 : +Zksed_sm4ks_cg_cp_sbox_b126: + sm4ks x17, x21, x30, 3 # perform operation +80005ae8: f5ea88b3 sm4ks x17,x21,x30,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b126, Zksed_sm4ks_cg_cp_sbox_b126_str) +80005aec: 0009a203 lw x4,0(x19) +80005af0: 01120863 beq x4,x17,80005b00 +80005af4: 6cc022ef jal x5,800081c0 +80005af8: 80005ae8 .word 0x80005ae8 +80005afc: 80015fc6 .word 0x80015fc6 +80005b00: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x7f7f7f7f +80005b04: 0000a703 lw x14,0(x1) +80005b08: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x7f7f7f7f +80005b0c: 0000a383 lw x7,0(x1) +80005b10: 00408093 addi x1,x1,4 + +80005b14 : +Zksed_sm4ks_cg_cp_sbox_b127: + sm4ks x31, x14, x7, 2 # perform operation +80005b14: b4770fb3 sm4ks x31,x14,x7,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b127, Zksed_sm4ks_cg_cp_sbox_b127_str) +80005b18: 0009a203 lw x4,0(x19) +80005b1c: 01f20863 beq x4,x31,80005b2c +80005b20: 6a0022ef jal x5,800081c0 +80005b24: 80005b14 .word 0x80005b14 +80005b28: 80015ffe .word 0x80015ffe +80005b2c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x80808080 +80005b30: 0000a183 lw x3,0(x1) +80005b34: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x80808080 +80005b38: 0000a403 lw x8,0(x1) +80005b3c: 00408093 addi x1,x1,4 + +80005b40 : +Zksed_sm4ks_cg_cp_sbox_b128: + sm4ks x22, x3, x8, 1 # perform operation +80005b40: 74818b33 sm4ks x22,x3,x8,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b128, Zksed_sm4ks_cg_cp_sbox_b128_str) +80005b44: 0009a203 lw x4,0(x19) +80005b48: 01620863 beq x4,x22,80005b58 +80005b4c: 674022ef jal x5,800081c0 +80005b50: 80005b40 .word 0x80005b40 +80005b54: 80016036 .word 0x80016036 +80005b58: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x81818181 +80005b5c: 0000a403 lw x8,0(x1) +80005b60: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x81818181 +80005b64: 0000ad03 lw x26,0(x1) +80005b68: 00408093 addi x1,x1,4 + +80005b6c : +Zksed_sm4ks_cg_cp_sbox_b129: + sm4ks x16, x8, x26, 0 # perform operation +80005b6c: 35a40833 sm4ks x16,x8,x26,0x0 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b129, Zksed_sm4ks_cg_cp_sbox_b129_str) +80005b70: 0009a203 lw x4,0(x19) +80005b74: 01020863 beq x4,x16,80005b84 +80005b78: 648022ef jal x5,800081c0 +80005b7c: 80005b6c .word 0x80005b6c +80005b80: 8001606e .word 0x8001606e +80005b84: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x82828282 +80005b88: 0000a703 lw x14,0(x1) +80005b8c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x82828282 +80005b90: 0000ae03 lw x28,0(x1) +80005b94: 00408093 addi x1,x1,4 + +80005b98 : +Zksed_sm4ks_cg_cp_sbox_b130: + sm4ks x12, x14, x28, 1 # perform operation +80005b98: 75c70633 sm4ks x12,x14,x28,0x1 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b130, Zksed_sm4ks_cg_cp_sbox_b130_str) +80005b9c: 0009a203 lw x4,0(x19) +80005ba0: 00c20863 beq x4,x12,80005bb0 +80005ba4: 61c022ef jal x5,800081c0 +80005ba8: 80005b98 .word 0x80005b98 +80005bac: 800160a6 .word 0x800160a6 +80005bb0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x83838383 +80005bb4: 0000a383 lw x7,0(x1) +80005bb8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x83838383 +80005bbc: 0000af83 lw x31,0(x1) +80005bc0: 00408093 addi x1,x1,4 + +80005bc4 : +Zksed_sm4ks_cg_cp_sbox_b131: + sm4ks x3, x7, x31, 2 # perform operation +80005bc4: b5f381b3 sm4ks x3,x7,x31,0x2 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b131, Zksed_sm4ks_cg_cp_sbox_b131_str) +80005bc8: 0009a203 lw x4,0(x19) +80005bcc: 00320863 beq x4,x3,80005bdc +80005bd0: 5f0022ef jal x5,800081c0 +80005bd4: 80005bc4 .word 0x80005bc4 +80005bd8: 800160de .word 0x800160de +80005bdc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x84848484 +80005be0: 0000a903 lw x18,0(x1) +80005be4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x84848484 +80005be8: 0000ae03 lw x28,0(x1) +80005bec: 00408093 addi x1,x1,4 + +80005bf0 : +Zksed_sm4ks_cg_cp_sbox_b132: + sm4ks x31, x18, x28, 2 # perform operation +80005bf0: b5c90fb3 sm4ks x31,x18,x28,0x2 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b132, Zksed_sm4ks_cg_cp_sbox_b132_str) +80005bf4: 0009a203 lw x4,0(x19) +80005bf8: 01f20863 beq x4,x31,80005c08 +80005bfc: 5c4022ef jal x5,800081c0 +80005c00: 80005bf0 .word 0x80005bf0 +80005c04: 80016116 .word 0x80016116 +80005c08: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x85858585 +80005c0c: 0000ac03 lw x24,0(x1) +80005c10: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x85858585 +80005c14: 0000a603 lw x12,0(x1) +80005c18: 00408093 addi x1,x1,4 + +80005c1c : +Zksed_sm4ks_cg_cp_sbox_b133: + sm4ks x17, x24, x12, 3 # perform operation +80005c1c: f4cc08b3 sm4ks x17,x24,x12,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b133, Zksed_sm4ks_cg_cp_sbox_b133_str) +80005c20: 0009a203 lw x4,0(x19) +80005c24: 01120863 beq x4,x17,80005c34 +80005c28: 598022ef jal x5,800081c0 +80005c2c: 80005c1c .word 0x80005c1c +80005c30: 8001614e .word 0x8001614e +80005c34: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x86868686 +80005c38: 0000aa83 lw x21,0(x1) +80005c3c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x86868686 +80005c40: 0000aa03 lw x20,0(x1) +80005c44: 00408093 addi x1,x1,4 + +80005c48 : +Zksed_sm4ks_cg_cp_sbox_b134: + sm4ks x2, x21, x20, 1 # perform operation +80005c48: 754a8133 sm4ks x2,x21,x20,0x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b134, Zksed_sm4ks_cg_cp_sbox_b134_str) +80005c4c: 0009a203 lw x4,0(x19) +80005c50: 00220863 beq x4,x2,80005c60 +80005c54: 56c022ef jal x5,800081c0 +80005c58: 80005c48 .word 0x80005c48 +80005c5c: 80016186 .word 0x80016186 +80005c60: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x87878787 +80005c64: 0000ac03 lw x24,0(x1) +80005c68: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x87878787 +80005c6c: 0000a583 lw x11,0(x1) +80005c70: 00408093 addi x1,x1,4 + +80005c74 : +Zksed_sm4ks_cg_cp_sbox_b135: + sm4ks x22, x24, x11, 0 # perform operation +80005c74: 34bc0b33 sm4ks x22,x24,x11,0x0 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b135, Zksed_sm4ks_cg_cp_sbox_b135_str) +80005c78: 0009a203 lw x4,0(x19) +80005c7c: 01620863 beq x4,x22,80005c8c +80005c80: 540022ef jal x5,800081c0 +80005c84: 80005c74 .word 0x80005c74 +80005c88: 800161be .word 0x800161be +80005c8c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x88888888 +80005c90: 0000af83 lw x31,0(x1) +80005c94: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x88888888 +80005c98: 0000a483 lw x9,0(x1) +80005c9c: 00408093 addi x1,x1,4 + +80005ca0 : +Zksed_sm4ks_cg_cp_sbox_b136: + sm4ks x21, x31, x9, 1 # perform operation +80005ca0: 749f8ab3 sm4ks x21,x31,x9,0x1 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b136, Zksed_sm4ks_cg_cp_sbox_b136_str) +80005ca4: 0009a203 lw x4,0(x19) +80005ca8: 01520863 beq x4,x21,80005cb8 +80005cac: 514022ef jal x5,800081c0 +80005cb0: 80005ca0 .word 0x80005ca0 +80005cb4: 800161f6 .word 0x800161f6 +80005cb8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x89898989 +80005cbc: 0000aa83 lw x21,0(x1) +80005cc0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x89898989 +80005cc4: 0000ab03 lw x22,0(x1) +80005cc8: 00408093 addi x1,x1,4 + +80005ccc : +Zksed_sm4ks_cg_cp_sbox_b137: + sm4ks x10, x21, x22, 3 # perform operation +80005ccc: f56a8533 sm4ks x10,x21,x22,0x3 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b137, Zksed_sm4ks_cg_cp_sbox_b137_str) +80005cd0: 0009a203 lw x4,0(x19) +80005cd4: 00a20863 beq x4,x10,80005ce4 +80005cd8: 4e8022ef jal x5,800081c0 +80005cdc: 80005ccc .word 0x80005ccc +80005ce0: 8001622e .word 0x8001622e +80005ce4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8a8a8a8a +80005ce8: 0000ad83 lw x27,0(x1) +80005cec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8a8a8a8a +80005cf0: 0000a803 lw x16,0(x1) +80005cf4: 00408093 addi x1,x1,4 + +80005cf8 : +Zksed_sm4ks_cg_cp_sbox_b138: + sm4ks x18, x27, x16, 0 # perform operation +80005cf8: 350d8933 sm4ks x18,x27,x16,0x0 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b138, Zksed_sm4ks_cg_cp_sbox_b138_str) +80005cfc: 0009a203 lw x4,0(x19) +80005d00: 01220863 beq x4,x18,80005d10 +80005d04: 4bc022ef jal x5,800081c0 +80005d08: 80005cf8 .word 0x80005cf8 +80005d0c: 80016266 .word 0x80016266 +80005d10: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8b8b8b8b +80005d14: 0000a103 lw x2,0(x1) +80005d18: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x8b8b8b8b +80005d1c: 0000a383 lw x7,0(x1) +80005d20: 00408093 addi x1,x1,4 + +80005d24 : +Zksed_sm4ks_cg_cp_sbox_b139: + sm4ks x27, x2, x7, 1 # perform operation +80005d24: 74710db3 sm4ks x27,x2,x7,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b139, Zksed_sm4ks_cg_cp_sbox_b139_str) +80005d28: 0009a203 lw x4,0(x19) +80005d2c: 01b20863 beq x4,x27,80005d3c +80005d30: 490022ef jal x5,800081c0 +80005d34: 80005d24 .word 0x80005d24 +80005d38: 8001629e .word 0x8001629e +80005d3c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x8c8c8c8c +80005d40: 0000a183 lw x3,0(x1) +80005d44: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x8c8c8c8c +80005d48: 0000a583 lw x11,0(x1) +80005d4c: 00408093 addi x1,x1,4 + +80005d50 : +Zksed_sm4ks_cg_cp_sbox_b140: + sm4ks x10, x3, x11, 2 # perform operation +80005d50: b4b18533 sm4ks x10,x3,x11,0x2 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b140, Zksed_sm4ks_cg_cp_sbox_b140_str) +80005d54: 0009a203 lw x4,0(x19) +80005d58: 00a20863 beq x4,x10,80005d68 +80005d5c: 464022ef jal x5,800081c0 +80005d60: 80005d50 .word 0x80005d50 +80005d64: 800162d6 .word 0x800162d6 +80005d68: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x8d8d8d8d +80005d6c: 0000a783 lw x15,0(x1) +80005d70: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x8d8d8d8d +80005d74: 0000a403 lw x8,0(x1) +80005d78: 00408093 addi x1,x1,4 + +80005d7c : +Zksed_sm4ks_cg_cp_sbox_b141: + sm4ks x25, x15, x8, 2 # perform operation +80005d7c: b4878cb3 sm4ks x25,x15,x8,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b141, Zksed_sm4ks_cg_cp_sbox_b141_str) +80005d80: 0009a203 lw x4,0(x19) +80005d84: 01920863 beq x4,x25,80005d94 +80005d88: 438022ef jal x5,800081c0 +80005d8c: 80005d7c .word 0x80005d7c +80005d90: 8001630e .word 0x8001630e +80005d94: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8e8e8e8e +80005d98: 0000af83 lw x31,0(x1) +80005d9c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x8e8e8e8e +80005da0: 0000a683 lw x13,0(x1) +80005da4: 00408093 addi x1,x1,4 + +80005da8 : +Zksed_sm4ks_cg_cp_sbox_b142: + sm4ks x28, x31, x13, 2 # perform operation +80005da8: b4df8e33 sm4ks x28,x31,x13,0x2 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b142, Zksed_sm4ks_cg_cp_sbox_b142_str) +80005dac: 0009a203 lw x4,0(x19) +80005db0: 01c20863 beq x4,x28,80005dc0 +80005db4: 40c022ef jal x5,800081c0 +80005db8: 80005da8 .word 0x80005da8 +80005dbc: 80016346 .word 0x80016346 +80005dc0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x8f8f8f8f +80005dc4: 0000a503 lw x10,0(x1) +80005dc8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x8f8f8f8f +80005dcc: 0000ab03 lw x22,0(x1) +80005dd0: 00408093 addi x1,x1,4 + +80005dd4 : +Zksed_sm4ks_cg_cp_sbox_b143: + sm4ks x13, x10, x22, 3 # perform operation +80005dd4: f56506b3 sm4ks x13,x10,x22,0x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b143, Zksed_sm4ks_cg_cp_sbox_b143_str) +80005dd8: 0009a203 lw x4,0(x19) +80005ddc: 00d20863 beq x4,x13,80005dec +80005de0: 3e0022ef jal x5,800081c0 +80005de4: 80005dd4 .word 0x80005dd4 +80005de8: 8001637e .word 0x8001637e +80005dec: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x90909090 +80005df0: 0000af83 lw x31,0(x1) +80005df4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x90909090 +80005df8: 0000ad03 lw x26,0(x1) +80005dfc: 00408093 addi x1,x1,4 + +80005e00 : +Zksed_sm4ks_cg_cp_sbox_b144: + sm4ks x21, x31, x26, 3 # perform operation +80005e00: f5af8ab3 sm4ks x21,x31,x26,0x3 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b144, Zksed_sm4ks_cg_cp_sbox_b144_str) +80005e04: 0009a203 lw x4,0(x19) +80005e08: 01520863 beq x4,x21,80005e18 +80005e0c: 3b4022ef jal x5,800081c0 +80005e10: 80005e00 .word 0x80005e00 +80005e14: 800163b6 .word 0x800163b6 +80005e18: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x91919191 +80005e1c: 0000af03 lw x30,0(x1) +80005e20: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x91919191 +80005e24: 0000a583 lw x11,0(x1) +80005e28: 00408093 addi x1,x1,4 + +80005e2c : +Zksed_sm4ks_cg_cp_sbox_b145: + sm4ks x17, x30, x11, 0 # perform operation +80005e2c: 34bf08b3 sm4ks x17,x30,x11,0x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b145, Zksed_sm4ks_cg_cp_sbox_b145_str) +80005e30: 0009a203 lw x4,0(x19) +80005e34: 01120863 beq x4,x17,80005e44 +80005e38: 388022ef jal x5,800081c0 +80005e3c: 80005e2c .word 0x80005e2c +80005e40: 800163ee .word 0x800163ee +80005e44: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x92929292 +80005e48: 0000ab83 lw x23,0(x1) +80005e4c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x92929292 +80005e50: 0000a183 lw x3,0(x1) +80005e54: 00408093 addi x1,x1,4 + +80005e58 : +Zksed_sm4ks_cg_cp_sbox_b146: + sm4ks x7, x23, x3, 2 # perform operation +80005e58: b43b83b3 sm4ks x7,x23,x3,0x2 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b146, Zksed_sm4ks_cg_cp_sbox_b146_str) +80005e5c: 0009a203 lw x4,0(x19) +80005e60: 00720863 beq x4,x7,80005e70 +80005e64: 35c022ef jal x5,800081c0 +80005e68: 80005e58 .word 0x80005e58 +80005e6c: 80016426 .word 0x80016426 +80005e70: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x93939393 +80005e74: 0000ad83 lw x27,0(x1) +80005e78: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x93939393 +80005e7c: 0000aa03 lw x20,0(x1) +80005e80: 00408093 addi x1,x1,4 + +80005e84 : +Zksed_sm4ks_cg_cp_sbox_b147: + sm4ks x13, x27, x20, 0 # perform operation +80005e84: 354d86b3 sm4ks x13,x27,x20,0x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b147, Zksed_sm4ks_cg_cp_sbox_b147_str) +80005e88: 0009a203 lw x4,0(x19) +80005e8c: 00d20863 beq x4,x13,80005e9c +80005e90: 330022ef jal x5,800081c0 +80005e94: 80005e84 .word 0x80005e84 +80005e98: 8001645e .word 0x8001645e +80005e9c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x94949494 +80005ea0: 0000aa83 lw x21,0(x1) +80005ea4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x94949494 +80005ea8: 0000ac03 lw x24,0(x1) +80005eac: 00408093 addi x1,x1,4 + +80005eb0 : +Zksed_sm4ks_cg_cp_sbox_b148: + sm4ks x12, x21, x24, 2 # perform operation +80005eb0: b58a8633 sm4ks x12,x21,x24,0x2 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b148, Zksed_sm4ks_cg_cp_sbox_b148_str) +80005eb4: 0009a203 lw x4,0(x19) +80005eb8: 00c20863 beq x4,x12,80005ec8 +80005ebc: 304022ef jal x5,800081c0 +80005ec0: 80005eb0 .word 0x80005eb0 +80005ec4: 80016496 .word 0x80016496 +80005ec8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x95959595 +80005ecc: 0000aa83 lw x21,0(x1) +80005ed0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x95959595 +80005ed4: 0000a403 lw x8,0(x1) +80005ed8: 00408093 addi x1,x1,4 + +80005edc : +Zksed_sm4ks_cg_cp_sbox_b149: + sm4ks x9, x21, x8, 2 # perform operation +80005edc: b48a84b3 sm4ks x9,x21,x8,0x2 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b149, Zksed_sm4ks_cg_cp_sbox_b149_str) +80005ee0: 0009a203 lw x4,0(x19) +80005ee4: 00920863 beq x4,x9,80005ef4 +80005ee8: 2d8022ef jal x5,800081c0 +80005eec: 80005edc .word 0x80005edc +80005ef0: 800164ce .word 0x800164ce +80005ef4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x96969696 +80005ef8: 0000ac83 lw x25,0(x1) +80005efc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x96969696 +80005f00: 0000af03 lw x30,0(x1) +80005f04: 00408093 addi x1,x1,4 + +80005f08 : +Zksed_sm4ks_cg_cp_sbox_b150: + sm4ks x28, x25, x30, 1 # perform operation +80005f08: 75ec8e33 sm4ks x28,x25,x30,0x1 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b150, Zksed_sm4ks_cg_cp_sbox_b150_str) +80005f0c: 0009a203 lw x4,0(x19) +80005f10: 01c20863 beq x4,x28,80005f20 +80005f14: 2ac022ef jal x5,800081c0 +80005f18: 80005f08 .word 0x80005f08 +80005f1c: 80016506 .word 0x80016506 +80005f20: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x97979797 +80005f24: 0000a903 lw x18,0(x1) +80005f28: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x97979797 +80005f2c: 0000a183 lw x3,0(x1) +80005f30: 00408093 addi x1,x1,4 + +80005f34 : +Zksed_sm4ks_cg_cp_sbox_b151: + sm4ks x15, x18, x3, 3 # perform operation +80005f34: f43907b3 sm4ks x15,x18,x3,0x3 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b151, Zksed_sm4ks_cg_cp_sbox_b151_str) +80005f38: 0009a203 lw x4,0(x19) +80005f3c: 00f20863 beq x4,x15,80005f4c +80005f40: 280022ef jal x5,800081c0 +80005f44: 80005f34 .word 0x80005f34 +80005f48: 8001653e .word 0x8001653e +80005f4c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x98989898 +80005f50: 0000a403 lw x8,0(x1) +80005f54: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x98989898 +80005f58: 0000af03 lw x30,0(x1) +80005f5c: 00408093 addi x1,x1,4 + +80005f60 : +Zksed_sm4ks_cg_cp_sbox_b152: + sm4ks x18, x8, x30, 2 # perform operation +80005f60: b5e40933 sm4ks x18,x8,x30,0x2 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b152, Zksed_sm4ks_cg_cp_sbox_b152_str) +80005f64: 0009a203 lw x4,0(x19) +80005f68: 01220863 beq x4,x18,80005f78 +80005f6c: 254022ef jal x5,800081c0 +80005f70: 80005f60 .word 0x80005f60 +80005f74: 80016576 .word 0x80016576 +80005f78: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x99999999 +80005f7c: 0000af03 lw x30,0(x1) +80005f80: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x99999999 +80005f84: 0000a683 lw x13,0(x1) +80005f88: 00408093 addi x1,x1,4 + +80005f8c : +Zksed_sm4ks_cg_cp_sbox_b153: + sm4ks x8, x30, x13, 2 # perform operation +80005f8c: b4df0433 sm4ks x8,x30,x13,0x2 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b153, Zksed_sm4ks_cg_cp_sbox_b153_str) +80005f90: 0009a203 lw x4,0(x19) +80005f94: 00820863 beq x4,x8,80005fa4 +80005f98: 228022ef jal x5,800081c0 +80005f9c: 80005f8c .word 0x80005f8c +80005fa0: 800165ae .word 0x800165ae +80005fa4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x9a9a9a9a +80005fa8: 0000ae03 lw x28,0(x1) +80005fac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x9a9a9a9a +80005fb0: 0000a183 lw x3,0(x1) +80005fb4: 00408093 addi x1,x1,4 + +80005fb8 : +Zksed_sm4ks_cg_cp_sbox_b154: + sm4ks x25, x28, x3, 0 # perform operation +80005fb8: 343e0cb3 sm4ks x25,x28,x3,0x0 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b154, Zksed_sm4ks_cg_cp_sbox_b154_str) +80005fbc: 0009a203 lw x4,0(x19) +80005fc0: 01920863 beq x4,x25,80005fd0 +80005fc4: 1fc022ef jal x5,800081c0 +80005fc8: 80005fb8 .word 0x80005fb8 +80005fcc: 800165e6 .word 0x800165e6 +80005fd0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x9b9b9b9b +80005fd4: 0000aa03 lw x20,0(x1) +80005fd8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x9b9b9b9b +80005fdc: 0000a503 lw x10,0(x1) +80005fe0: 00408093 addi x1,x1,4 + +80005fe4 : +Zksed_sm4ks_cg_cp_sbox_b155: + sm4ks x13, x20, x10, 1 # perform operation +80005fe4: 74aa06b3 sm4ks x13,x20,x10,0x1 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b155, Zksed_sm4ks_cg_cp_sbox_b155_str) +80005fe8: 0009a203 lw x4,0(x19) +80005fec: 00d20863 beq x4,x13,80005ffc +80005ff0: 1d0022ef jal x5,800081c0 +80005ff4: 80005fe4 .word 0x80005fe4 +80005ff8: 8001661e .word 0x8001661e +80005ffc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x9c9c9c9c +80006000: 0000ae03 lw x28,0(x1) +80006004: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x9c9c9c9c +80006008: 0000a503 lw x10,0(x1) +8000600c: 00408093 addi x1,x1,4 + +80006010 : +Zksed_sm4ks_cg_cp_sbox_b156: + sm4ks x29, x28, x10, 0 # perform operation +80006010: 34ae0eb3 sm4ks x29,x28,x10,0x0 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b156, Zksed_sm4ks_cg_cp_sbox_b156_str) +80006014: 0009a203 lw x4,0(x19) +80006018: 01d20863 beq x4,x29,80006028 +8000601c: 1a4022ef jal x5,800081c0 +80006020: 80006010 .word 0x80006010 +80006024: 80016656 .word 0x80016656 +80006028: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x9d9d9d9d +8000602c: 0000a903 lw x18,0(x1) +80006030: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x9d9d9d9d +80006034: 0000a583 lw x11,0(x1) +80006038: 00408093 addi x1,x1,4 + +8000603c : +Zksed_sm4ks_cg_cp_sbox_b157: + sm4ks x8, x18, x11, 0 # perform operation +8000603c: 34b90433 sm4ks x8,x18,x11,0x0 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b157, Zksed_sm4ks_cg_cp_sbox_b157_str) +80006040: 0009a203 lw x4,0(x19) +80006044: 00820863 beq x4,x8,80006054 +80006048: 178022ef jal x5,800081c0 +8000604c: 8000603c .word 0x8000603c +80006050: 8001668e .word 0x8001668e +80006054: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x9e9e9e9e +80006058: 0000a903 lw x18,0(x1) +8000605c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x9e9e9e9e +80006060: 0000ad83 lw x27,0(x1) +80006064: 00408093 addi x1,x1,4 + +80006068 : +Zksed_sm4ks_cg_cp_sbox_b158: + sm4ks x6, x18, x27, 3 # perform operation +80006068: f5b90333 sm4ks x6,x18,x27,0x3 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b158, Zksed_sm4ks_cg_cp_sbox_b158_str) +8000606c: 0009a203 lw x4,0(x19) +80006070: 00620863 beq x4,x6,80006080 +80006074: 14c022ef jal x5,800081c0 +80006078: 80006068 .word 0x80006068 +8000607c: 800166c6 .word 0x800166c6 +80006080: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x9f9f9f9f +80006084: 0000a403 lw x8,0(x1) +80006088: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x9f9f9f9f +8000608c: 0000ac03 lw x24,0(x1) +80006090: 00408093 addi x1,x1,4 + +80006094 : +Zksed_sm4ks_cg_cp_sbox_b159: + sm4ks x16, x8, x24, 1 # perform operation +80006094: 75840833 sm4ks x16,x8,x24,0x1 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b159, Zksed_sm4ks_cg_cp_sbox_b159_str) +80006098: 0009a203 lw x4,0(x19) +8000609c: 01020863 beq x4,x16,800060ac +800060a0: 120022ef jal x5,800081c0 +800060a4: 80006094 .word 0x80006094 +800060a8: 800166fe .word 0x800166fe +800060ac: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xa0a0a0a0 +800060b0: 0000a303 lw x6,0(x1) +800060b4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xa0a0a0a0 +800060b8: 0000ad03 lw x26,0(x1) +800060bc: 00408093 addi x1,x1,4 + +800060c0 : +Zksed_sm4ks_cg_cp_sbox_b160: + sm4ks x25, x6, x26, 2 # perform operation +800060c0: b5a30cb3 sm4ks x25,x6,x26,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b160, Zksed_sm4ks_cg_cp_sbox_b160_str) +800060c4: 0009a203 lw x4,0(x19) +800060c8: 01920863 beq x4,x25,800060d8 +800060cc: 0f4022ef jal x5,800081c0 +800060d0: 800060c0 .word 0x800060c0 +800060d4: 80016736 .word 0x80016736 +800060d8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xa1a1a1a1 +800060dc: 0000ac03 lw x24,0(x1) +800060e0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xa1a1a1a1 +800060e4: 0000a383 lw x7,0(x1) +800060e8: 00408093 addi x1,x1,4 + +800060ec : +Zksed_sm4ks_cg_cp_sbox_b161: + sm4ks x15, x24, x7, 0 # perform operation +800060ec: 347c07b3 sm4ks x15,x24,x7,0x0 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b161, Zksed_sm4ks_cg_cp_sbox_b161_str) +800060f0: 0009a203 lw x4,0(x19) +800060f4: 00f20863 beq x4,x15,80006104 +800060f8: 0c8022ef jal x5,800081c0 +800060fc: 800060ec .word 0x800060ec +80006100: 8001676e .word 0x8001676e +80006104: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xa2a2a2a2 +80006108: 0000a803 lw x16,0(x1) +8000610c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xa2a2a2a2 +80006110: 0000ac83 lw x25,0(x1) +80006114: 00408093 addi x1,x1,4 + +80006118 : +Zksed_sm4ks_cg_cp_sbox_b162: + sm4ks x22, x16, x25, 1 # perform operation +80006118: 75980b33 sm4ks x22,x16,x25,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b162, Zksed_sm4ks_cg_cp_sbox_b162_str) +8000611c: 0009a203 lw x4,0(x19) +80006120: 01620863 beq x4,x22,80006130 +80006124: 09c022ef jal x5,800081c0 +80006128: 80006118 .word 0x80006118 +8000612c: 800167a6 .word 0x800167a6 +80006130: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xa3a3a3a3 +80006134: 0000a303 lw x6,0(x1) +80006138: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xa3a3a3a3 +8000613c: 0000a583 lw x11,0(x1) +80006140: 00408093 addi x1,x1,4 + +80006144 : +Zksed_sm4ks_cg_cp_sbox_b163: + sm4ks x22, x6, x11, 1 # perform operation +80006144: 74b30b33 sm4ks x22,x6,x11,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b163, Zksed_sm4ks_cg_cp_sbox_b163_str) +80006148: 0009a203 lw x4,0(x19) +8000614c: 01620863 beq x4,x22,8000615c +80006150: 070022ef jal x5,800081c0 +80006154: 80006144 .word 0x80006144 +80006158: 800167de .word 0x800167de +8000615c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xa4a4a4a4 +80006160: 0000a603 lw x12,0(x1) +80006164: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xa4a4a4a4 +80006168: 0000a303 lw x6,0(x1) +8000616c: 00408093 addi x1,x1,4 + +80006170 : +Zksed_sm4ks_cg_cp_sbox_b164: + sm4ks x2, x12, x6, 3 # perform operation +80006170: f4660133 sm4ks x2,x12,x6,0x3 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b164, Zksed_sm4ks_cg_cp_sbox_b164_str) +80006174: 0009a203 lw x4,0(x19) +80006178: 00220863 beq x4,x2,80006188 +8000617c: 044022ef jal x5,800081c0 +80006180: 80006170 .word 0x80006170 +80006184: 80016816 .word 0x80016816 +80006188: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xa5a5a5a5 +8000618c: 0000ac83 lw x25,0(x1) +80006190: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xa5a5a5a5 +80006194: 0000a503 lw x10,0(x1) +80006198: 00408093 addi x1,x1,4 + +8000619c : +Zksed_sm4ks_cg_cp_sbox_b165: + sm4ks x30, x25, x10, 2 # perform operation +8000619c: b4ac8f33 sm4ks x30,x25,x10,0x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b165, Zksed_sm4ks_cg_cp_sbox_b165_str) +800061a0: 0009a203 lw x4,0(x19) +800061a4: 01e20863 beq x4,x30,800061b4 +800061a8: 018022ef jal x5,800081c0 +800061ac: 8000619c .word 0x8000619c +800061b0: 8001684e .word 0x8001684e +800061b4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xa6a6a6a6 +800061b8: 0000ad03 lw x26,0(x1) +800061bc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xa6a6a6a6 +800061c0: 0000a483 lw x9,0(x1) +800061c4: 00408093 addi x1,x1,4 + +800061c8 : +Zksed_sm4ks_cg_cp_sbox_b166: + sm4ks x23, x26, x9, 3 # perform operation +800061c8: f49d0bb3 sm4ks x23,x26,x9,0x3 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b166, Zksed_sm4ks_cg_cp_sbox_b166_str) +800061cc: 0009a203 lw x4,0(x19) +800061d0: 01720863 beq x4,x23,800061e0 +800061d4: 7ed012ef jal x5,800081c0 +800061d8: 800061c8 .word 0x800061c8 +800061dc: 80016886 .word 0x80016886 +800061e0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xa7a7a7a7 +800061e4: 0000ad83 lw x27,0(x1) +800061e8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xa7a7a7a7 +800061ec: 0000ae03 lw x28,0(x1) +800061f0: 00408093 addi x1,x1,4 + +800061f4 : +Zksed_sm4ks_cg_cp_sbox_b167: + sm4ks x17, x27, x28, 0 # perform operation +800061f4: 35cd88b3 sm4ks x17,x27,x28,0x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b167, Zksed_sm4ks_cg_cp_sbox_b167_str) +800061f8: 0009a203 lw x4,0(x19) +800061fc: 01120863 beq x4,x17,8000620c +80006200: 7c1012ef jal x5,800081c0 +80006204: 800061f4 .word 0x800061f4 +80006208: 800168be .word 0x800168be +8000620c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xa8a8a8a8 +80006210: 0000a603 lw x12,0(x1) +80006214: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xa8a8a8a8 +80006218: 0000ab83 lw x23,0(x1) +8000621c: 00408093 addi x1,x1,4 + +80006220 : +Zksed_sm4ks_cg_cp_sbox_b168: + sm4ks x18, x12, x23, 3 # perform operation +80006220: f5760933 sm4ks x18,x12,x23,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b168, Zksed_sm4ks_cg_cp_sbox_b168_str) +80006224: 0009a203 lw x4,0(x19) +80006228: 01220863 beq x4,x18,80006238 +8000622c: 795012ef jal x5,800081c0 +80006230: 80006220 .word 0x80006220 +80006234: 800168f6 .word 0x800168f6 +80006238: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xa9a9a9a9 +8000623c: 0000a683 lw x13,0(x1) +80006240: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xa9a9a9a9 +80006244: 0000ad03 lw x26,0(x1) +80006248: 00408093 addi x1,x1,4 + +8000624c : +Zksed_sm4ks_cg_cp_sbox_b169: + sm4ks x27, x13, x26, 0 # perform operation +8000624c: 35a68db3 sm4ks x27,x13,x26,0x0 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b169, Zksed_sm4ks_cg_cp_sbox_b169_str) +80006250: 0009a203 lw x4,0(x19) +80006254: 01b20863 beq x4,x27,80006264 +80006258: 769012ef jal x5,800081c0 +8000625c: 8000624c .word 0x8000624c +80006260: 8001692e .word 0x8001692e +80006264: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaa +80006268: 0000a503 lw x10,0(x1) +8000626c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xaaaaaaaa +80006270: 0000ad03 lw x26,0(x1) +80006274: 00408093 addi x1,x1,4 + +80006278 : +Zksed_sm4ks_cg_cp_sbox_b170: + sm4ks x31, x10, x26, 0 # perform operation +80006278: 35a50fb3 sm4ks x31,x10,x26,0x0 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b170, Zksed_sm4ks_cg_cp_sbox_b170_str) +8000627c: 0009a203 lw x4,0(x19) +80006280: 01f20863 beq x4,x31,80006290 +80006284: 73d012ef jal x5,800081c0 +80006288: 80006278 .word 0x80006278 +8000628c: 80016966 .word 0x80016966 +80006290: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xabababab +80006294: 0000ad03 lw x26,0(x1) +80006298: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xabababab +8000629c: 0000a683 lw x13,0(x1) +800062a0: 00408093 addi x1,x1,4 + +800062a4 : +Zksed_sm4ks_cg_cp_sbox_b171: + sm4ks x17, x26, x13, 3 # perform operation +800062a4: f4dd08b3 sm4ks x17,x26,x13,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b171, Zksed_sm4ks_cg_cp_sbox_b171_str) +800062a8: 0009a203 lw x4,0(x19) +800062ac: 01120863 beq x4,x17,800062bc +800062b0: 711012ef jal x5,800081c0 +800062b4: 800062a4 .word 0x800062a4 +800062b8: 8001699e .word 0x8001699e +800062bc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xacacacac +800062c0: 0000aa03 lw x20,0(x1) +800062c4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xacacacac +800062c8: 0000a403 lw x8,0(x1) +800062cc: 00408093 addi x1,x1,4 + +800062d0 : +Zksed_sm4ks_cg_cp_sbox_b172: + sm4ks x17, x20, x8, 1 # perform operation +800062d0: 748a08b3 sm4ks x17,x20,x8,0x1 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b172, Zksed_sm4ks_cg_cp_sbox_b172_str) +800062d4: 0009a203 lw x4,0(x19) +800062d8: 01120863 beq x4,x17,800062e8 +800062dc: 6e5012ef jal x5,800081c0 +800062e0: 800062d0 .word 0x800062d0 +800062e4: 800169d6 .word 0x800169d6 +800062e8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xadadadad +800062ec: 0000aa83 lw x21,0(x1) +800062f0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xadadadad +800062f4: 0000af03 lw x30,0(x1) +800062f8: 00408093 addi x1,x1,4 + +800062fc : +Zksed_sm4ks_cg_cp_sbox_b173: + sm4ks x13, x21, x30, 3 # perform operation +800062fc: f5ea86b3 sm4ks x13,x21,x30,0x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b173, Zksed_sm4ks_cg_cp_sbox_b173_str) +80006300: 0009a203 lw x4,0(x19) +80006304: 00d20863 beq x4,x13,80006314 +80006308: 6b9012ef jal x5,800081c0 +8000630c: 800062fc .word 0x800062fc +80006310: 80016a0e .word 0x80016a0e +80006314: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xaeaeaeae +80006318: 0000a903 lw x18,0(x1) +8000631c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xaeaeaeae +80006320: 0000aa03 lw x20,0(x1) +80006324: 00408093 addi x1,x1,4 + +80006328 : +Zksed_sm4ks_cg_cp_sbox_b174: + sm4ks x25, x18, x20, 3 # perform operation +80006328: f5490cb3 sm4ks x25,x18,x20,0x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b174, Zksed_sm4ks_cg_cp_sbox_b174_str) +8000632c: 0009a203 lw x4,0(x19) +80006330: 01920863 beq x4,x25,80006340 +80006334: 68d012ef jal x5,800081c0 +80006338: 80006328 .word 0x80006328 +8000633c: 80016a46 .word 0x80016a46 +80006340: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xafafafaf +80006344: 0000ab03 lw x22,0(x1) +80006348: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xafafafaf +8000634c: 0000a483 lw x9,0(x1) +80006350: 00408093 addi x1,x1,4 + +80006354 : +Zksed_sm4ks_cg_cp_sbox_b175: + sm4ks x8, x22, x9, 1 # perform operation +80006354: 749b0433 sm4ks x8,x22,x9,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b175, Zksed_sm4ks_cg_cp_sbox_b175_str) +80006358: 0009a203 lw x4,0(x19) +8000635c: 00820863 beq x4,x8,8000636c +80006360: 661012ef jal x5,800081c0 +80006364: 80006354 .word 0x80006354 +80006368: 80016a7e .word 0x80016a7e +8000636c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xb0b0b0b0 +80006370: 0000a603 lw x12,0(x1) +80006374: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xb0b0b0b0 +80006378: 0000a483 lw x9,0(x1) +8000637c: 00408093 addi x1,x1,4 + +80006380 : +Zksed_sm4ks_cg_cp_sbox_b176: + sm4ks x28, x12, x9, 1 # perform operation +80006380: 74960e33 sm4ks x28,x12,x9,0x1 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b176, Zksed_sm4ks_cg_cp_sbox_b176_str) +80006384: 0009a203 lw x4,0(x19) +80006388: 01c20863 beq x4,x28,80006398 +8000638c: 635012ef jal x5,800081c0 +80006390: 80006380 .word 0x80006380 +80006394: 80016ab6 .word 0x80016ab6 +80006398: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xb1b1b1b1 +8000639c: 0000af83 lw x31,0(x1) +800063a0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xb1b1b1b1 +800063a4: 0000a103 lw x2,0(x1) +800063a8: 00408093 addi x1,x1,4 + +800063ac : +Zksed_sm4ks_cg_cp_sbox_b177: + sm4ks x30, x31, x2, 3 # perform operation +800063ac: f42f8f33 sm4ks x30,x31,x2,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b177, Zksed_sm4ks_cg_cp_sbox_b177_str) +800063b0: 0009a203 lw x4,0(x19) +800063b4: 01e20863 beq x4,x30,800063c4 +800063b8: 609012ef jal x5,800081c0 +800063bc: 800063ac .word 0x800063ac +800063c0: 80016aee .word 0x80016aee +800063c4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xb2b2b2b2 +800063c8: 0000a583 lw x11,0(x1) +800063cc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xb2b2b2b2 +800063d0: 0000ac83 lw x25,0(x1) +800063d4: 00408093 addi x1,x1,4 + +800063d8 : +Zksed_sm4ks_cg_cp_sbox_b178: + sm4ks x27, x11, x25, 3 # perform operation +800063d8: f5958db3 sm4ks x27,x11,x25,0x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b178, Zksed_sm4ks_cg_cp_sbox_b178_str) +800063dc: 0009a203 lw x4,0(x19) +800063e0: 01b20863 beq x4,x27,800063f0 +800063e4: 5dd012ef jal x5,800081c0 +800063e8: 800063d8 .word 0x800063d8 +800063ec: 80016b26 .word 0x80016b26 +800063f0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xb3b3b3b3 +800063f4: 0000ab03 lw x22,0(x1) +800063f8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xb3b3b3b3 +800063fc: 0000a583 lw x11,0(x1) +80006400: 00408093 addi x1,x1,4 + +80006404 : +Zksed_sm4ks_cg_cp_sbox_b179: + sm4ks x10, x22, x11, 1 # perform operation +80006404: 74bb0533 sm4ks x10,x22,x11,0x1 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b179, Zksed_sm4ks_cg_cp_sbox_b179_str) +80006408: 0009a203 lw x4,0(x19) +8000640c: 00a20863 beq x4,x10,8000641c +80006410: 5b1012ef jal x5,800081c0 +80006414: 80006404 .word 0x80006404 +80006418: 80016b5e .word 0x80016b5e +8000641c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xb4b4b4b4 +80006420: 0000a383 lw x7,0(x1) +80006424: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xb4b4b4b4 +80006428: 0000a503 lw x10,0(x1) +8000642c: 00408093 addi x1,x1,4 + +80006430 : +Zksed_sm4ks_cg_cp_sbox_b180: + sm4ks x12, x7, x10, 2 # perform operation +80006430: b4a38633 sm4ks x12,x7,x10,0x2 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b180, Zksed_sm4ks_cg_cp_sbox_b180_str) +80006434: 0009a203 lw x4,0(x19) +80006438: 00c20863 beq x4,x12,80006448 +8000643c: 585012ef jal x5,800081c0 +80006440: 80006430 .word 0x80006430 +80006444: 80016b96 .word 0x80016b96 +80006448: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xb5b5b5b5 +8000644c: 0000a603 lw x12,0(x1) +80006450: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xb5b5b5b5 +80006454: 0000a403 lw x8,0(x1) +80006458: 00408093 addi x1,x1,4 + +8000645c : +Zksed_sm4ks_cg_cp_sbox_b181: + sm4ks x14, x12, x8, 2 # perform operation +8000645c: b4860733 sm4ks x14,x12,x8,0x2 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b181, Zksed_sm4ks_cg_cp_sbox_b181_str) +80006460: 0009a203 lw x4,0(x19) +80006464: 00e20863 beq x4,x14,80006474 +80006468: 559012ef jal x5,800081c0 +8000646c: 8000645c .word 0x8000645c +80006470: 80016bce .word 0x80016bce +80006474: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xb6b6b6b6 +80006478: 0000a503 lw x10,0(x1) +8000647c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xb6b6b6b6 +80006480: 0000a303 lw x6,0(x1) +80006484: 00408093 addi x1,x1,4 + +80006488 : +Zksed_sm4ks_cg_cp_sbox_b182: + sm4ks x9, x10, x6, 1 # perform operation +80006488: 746504b3 sm4ks x9,x10,x6,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b182, Zksed_sm4ks_cg_cp_sbox_b182_str) +8000648c: 0009a203 lw x4,0(x19) +80006490: 00920863 beq x4,x9,800064a0 +80006494: 52d012ef jal x5,800081c0 +80006498: 80006488 .word 0x80006488 +8000649c: 80016c06 .word 0x80016c06 +800064a0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xb7b7b7b7 +800064a4: 0000a703 lw x14,0(x1) +800064a8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xb7b7b7b7 +800064ac: 0000aa03 lw x20,0(x1) +800064b0: 00408093 addi x1,x1,4 + +800064b4 : +Zksed_sm4ks_cg_cp_sbox_b183: + sm4ks x18, x14, x20, 3 # perform operation +800064b4: f5470933 sm4ks x18,x14,x20,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b183, Zksed_sm4ks_cg_cp_sbox_b183_str) +800064b8: 0009a203 lw x4,0(x19) +800064bc: 01220863 beq x4,x18,800064cc +800064c0: 501012ef jal x5,800081c0 +800064c4: 800064b4 .word 0x800064b4 +800064c8: 80016c3e .word 0x80016c3e +800064cc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xb8b8b8b8 +800064d0: 0000a583 lw x11,0(x1) +800064d4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xb8b8b8b8 +800064d8: 0000a483 lw x9,0(x1) +800064dc: 00408093 addi x1,x1,4 + +800064e0 : +Zksed_sm4ks_cg_cp_sbox_b184: + sm4ks x22, x11, x9, 3 # perform operation +800064e0: f4958b33 sm4ks x22,x11,x9,0x3 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b184, Zksed_sm4ks_cg_cp_sbox_b184_str) +800064e4: 0009a203 lw x4,0(x19) +800064e8: 01620863 beq x4,x22,800064f8 +800064ec: 4d5012ef jal x5,800081c0 +800064f0: 800064e0 .word 0x800064e0 +800064f4: 80016c76 .word 0x80016c76 +800064f8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xb9b9b9b9 +800064fc: 0000a703 lw x14,0(x1) +80006500: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xb9b9b9b9 +80006504: 0000a103 lw x2,0(x1) +80006508: 00408093 addi x1,x1,4 + +8000650c : +Zksed_sm4ks_cg_cp_sbox_b185: + sm4ks x3, x14, x2, 2 # perform operation +8000650c: b42701b3 sm4ks x3,x14,x2,0x2 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b185, Zksed_sm4ks_cg_cp_sbox_b185_str) +80006510: 0009a203 lw x4,0(x19) +80006514: 00320863 beq x4,x3,80006524 +80006518: 4a9012ef jal x5,800081c0 +8000651c: 8000650c .word 0x8000650c +80006520: 80016cae .word 0x80016cae +80006524: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xbabababa +80006528: 0000ae03 lw x28,0(x1) +8000652c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xbabababa +80006530: 0000a683 lw x13,0(x1) +80006534: 00408093 addi x1,x1,4 + +80006538 : +Zksed_sm4ks_cg_cp_sbox_b186: + sm4ks x27, x28, x13, 1 # perform operation +80006538: 74de0db3 sm4ks x27,x28,x13,0x1 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b186, Zksed_sm4ks_cg_cp_sbox_b186_str) +8000653c: 0009a203 lw x4,0(x19) +80006540: 01b20863 beq x4,x27,80006550 +80006544: 47d012ef jal x5,800081c0 +80006548: 80006538 .word 0x80006538 +8000654c: 80016ce6 .word 0x80016ce6 +80006550: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xbbbbbbbb +80006554: 0000a103 lw x2,0(x1) +80006558: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xbbbbbbbb +8000655c: 0000ad03 lw x26,0(x1) +80006560: 00408093 addi x1,x1,4 + +80006564 : +Zksed_sm4ks_cg_cp_sbox_b187: + sm4ks x15, x2, x26, 0 # perform operation +80006564: 35a107b3 sm4ks x15,x2,x26,0x0 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b187, Zksed_sm4ks_cg_cp_sbox_b187_str) +80006568: 0009a203 lw x4,0(x19) +8000656c: 00f20863 beq x4,x15,8000657c +80006570: 451012ef jal x5,800081c0 +80006574: 80006564 .word 0x80006564 +80006578: 80016d1e .word 0x80016d1e +8000657c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xbcbcbcbc +80006580: 0000a183 lw x3,0(x1) +80006584: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xbcbcbcbc +80006588: 0000a403 lw x8,0(x1) +8000658c: 00408093 addi x1,x1,4 + +80006590 : +Zksed_sm4ks_cg_cp_sbox_b188: + sm4ks x7, x3, x8, 3 # perform operation +80006590: f48183b3 sm4ks x7,x3,x8,0x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b188, Zksed_sm4ks_cg_cp_sbox_b188_str) +80006594: 0009a203 lw x4,0(x19) +80006598: 00720863 beq x4,x7,800065a8 +8000659c: 425012ef jal x5,800081c0 +800065a0: 80006590 .word 0x80006590 +800065a4: 80016d56 .word 0x80016d56 +800065a8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xbdbdbdbd +800065ac: 0000a183 lw x3,0(x1) +800065b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xbdbdbdbd +800065b4: 0000ac03 lw x24,0(x1) +800065b8: 00408093 addi x1,x1,4 + +800065bc : +Zksed_sm4ks_cg_cp_sbox_b189: + sm4ks x8, x3, x24, 3 # perform operation +800065bc: f5818433 sm4ks x8,x3,x24,0x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b189, Zksed_sm4ks_cg_cp_sbox_b189_str) +800065c0: 0009a203 lw x4,0(x19) +800065c4: 00820863 beq x4,x8,800065d4 +800065c8: 3f9012ef jal x5,800081c0 +800065cc: 800065bc .word 0x800065bc +800065d0: 80016d8e .word 0x80016d8e +800065d4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xbebebebe +800065d8: 0000a783 lw x15,0(x1) +800065dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xbebebebe +800065e0: 0000a703 lw x14,0(x1) +800065e4: 00408093 addi x1,x1,4 + +800065e8 : +Zksed_sm4ks_cg_cp_sbox_b190: + sm4ks x2, x15, x14, 1 # perform operation +800065e8: 74e78133 sm4ks x2,x15,x14,0x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b190, Zksed_sm4ks_cg_cp_sbox_b190_str) +800065ec: 0009a203 lw x4,0(x19) +800065f0: 00220863 beq x4,x2,80006600 +800065f4: 3cd012ef jal x5,800081c0 +800065f8: 800065e8 .word 0x800065e8 +800065fc: 80016dc6 .word 0x80016dc6 +80006600: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xbfbfbfbf +80006604: 0000ac03 lw x24,0(x1) +80006608: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xbfbfbfbf +8000660c: 0000a103 lw x2,0(x1) +80006610: 00408093 addi x1,x1,4 + +80006614 : +Zksed_sm4ks_cg_cp_sbox_b191: + sm4ks x29, x24, x2, 2 # perform operation +80006614: b42c0eb3 sm4ks x29,x24,x2,0x2 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b191, Zksed_sm4ks_cg_cp_sbox_b191_str) +80006618: 0009a203 lw x4,0(x19) +8000661c: 01d20863 beq x4,x29,8000662c +80006620: 3a1012ef jal x5,800081c0 +80006624: 80006614 .word 0x80006614 +80006628: 80016dfe .word 0x80016dfe +8000662c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xc0c0c0c0 +80006630: 0000a883 lw x17,0(x1) +80006634: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xc0c0c0c0 +80006638: 0000ae83 lw x29,0(x1) +8000663c: 00408093 addi x1,x1,4 + +80006640 : +Zksed_sm4ks_cg_cp_sbox_b192: + sm4ks x28, x17, x29, 3 # perform operation +80006640: f5d88e33 sm4ks x28,x17,x29,0x3 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b192, Zksed_sm4ks_cg_cp_sbox_b192_str) +80006644: 0009a203 lw x4,0(x19) +80006648: 01c20863 beq x4,x28,80006658 +8000664c: 375012ef jal x5,800081c0 +80006650: 80006640 .word 0x80006640 +80006654: 80016e36 .word 0x80016e36 +80006658: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xc1c1c1c1 +8000665c: 0000a803 lw x16,0(x1) +80006660: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xc1c1c1c1 +80006664: 0000a383 lw x7,0(x1) +80006668: 00408093 addi x1,x1,4 + +8000666c : +Zksed_sm4ks_cg_cp_sbox_b193: + sm4ks x24, x16, x7, 3 # perform operation +8000666c: f4780c33 sm4ks x24,x16,x7,0x3 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b193, Zksed_sm4ks_cg_cp_sbox_b193_str) +80006670: 0009a203 lw x4,0(x19) +80006674: 01820863 beq x4,x24,80006684 +80006678: 349012ef jal x5,800081c0 +8000667c: 8000666c .word 0x8000666c +80006680: 80016e6e .word 0x80016e6e +80006684: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xc2c2c2c2 +80006688: 0000a103 lw x2,0(x1) +8000668c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xc2c2c2c2 +80006690: 0000a303 lw x6,0(x1) +80006694: 00408093 addi x1,x1,4 + +80006698 : +Zksed_sm4ks_cg_cp_sbox_b194: + sm4ks x24, x2, x6, 0 # perform operation +80006698: 34610c33 sm4ks x24,x2,x6,0x0 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b194, Zksed_sm4ks_cg_cp_sbox_b194_str) +8000669c: 0009a203 lw x4,0(x19) +800066a0: 01820863 beq x4,x24,800066b0 +800066a4: 31d012ef jal x5,800081c0 +800066a8: 80006698 .word 0x80006698 +800066ac: 80016ea6 .word 0x80016ea6 +800066b0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xc3c3c3c3 +800066b4: 0000a803 lw x16,0(x1) +800066b8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xc3c3c3c3 +800066bc: 0000a403 lw x8,0(x1) +800066c0: 00408093 addi x1,x1,4 + +800066c4 : +Zksed_sm4ks_cg_cp_sbox_b195: + sm4ks x10, x16, x8, 3 # perform operation +800066c4: f4880533 sm4ks x10,x16,x8,0x3 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b195, Zksed_sm4ks_cg_cp_sbox_b195_str) +800066c8: 0009a203 lw x4,0(x19) +800066cc: 00a20863 beq x4,x10,800066dc +800066d0: 2f1012ef jal x5,800081c0 +800066d4: 800066c4 .word 0x800066c4 +800066d8: 80016ede .word 0x80016ede +800066dc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xc4c4c4c4 +800066e0: 0000ac83 lw x25,0(x1) +800066e4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xc4c4c4c4 +800066e8: 0000a703 lw x14,0(x1) +800066ec: 00408093 addi x1,x1,4 + +800066f0 : +Zksed_sm4ks_cg_cp_sbox_b196: + sm4ks x20, x25, x14, 3 # perform operation +800066f0: f4ec8a33 sm4ks x20,x25,x14,0x3 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b196, Zksed_sm4ks_cg_cp_sbox_b196_str) +800066f4: 0009a203 lw x4,0(x19) +800066f8: 01420863 beq x4,x20,80006708 +800066fc: 2c5012ef jal x5,800081c0 +80006700: 800066f0 .word 0x800066f0 +80006704: 80016f16 .word 0x80016f16 +80006708: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xc5c5c5c5 +8000670c: 0000ad83 lw x27,0(x1) +80006710: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xc5c5c5c5 +80006714: 0000a683 lw x13,0(x1) +80006718: 00408093 addi x1,x1,4 + +8000671c : +Zksed_sm4ks_cg_cp_sbox_b197: + sm4ks x12, x27, x13, 0 # perform operation +8000671c: 34dd8633 sm4ks x12,x27,x13,0x0 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b197, Zksed_sm4ks_cg_cp_sbox_b197_str) +80006720: 0009a203 lw x4,0(x19) +80006724: 00c20863 beq x4,x12,80006734 +80006728: 299012ef jal x5,800081c0 +8000672c: 8000671c .word 0x8000671c +80006730: 80016f4e .word 0x80016f4e +80006734: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xc6c6c6c6 +80006738: 0000ad83 lw x27,0(x1) +8000673c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xc6c6c6c6 +80006740: 0000ac83 lw x25,0(x1) +80006744: 00408093 addi x1,x1,4 + +80006748 : +Zksed_sm4ks_cg_cp_sbox_b198: + sm4ks x28, x27, x25, 1 # perform operation +80006748: 759d8e33 sm4ks x28,x27,x25,0x1 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b198, Zksed_sm4ks_cg_cp_sbox_b198_str) +8000674c: 0009a203 lw x4,0(x19) +80006750: 01c20863 beq x4,x28,80006760 +80006754: 26d012ef jal x5,800081c0 +80006758: 80006748 .word 0x80006748 +8000675c: 80016f86 .word 0x80016f86 +80006760: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xc7c7c7c7 +80006764: 0000a903 lw x18,0(x1) +80006768: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xc7c7c7c7 +8000676c: 0000a683 lw x13,0(x1) +80006770: 00408093 addi x1,x1,4 + +80006774 : +Zksed_sm4ks_cg_cp_sbox_b199: + sm4ks x2, x18, x13, 2 # perform operation +80006774: b4d90133 sm4ks x2,x18,x13,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b199, Zksed_sm4ks_cg_cp_sbox_b199_str) +80006778: 0009a203 lw x4,0(x19) +8000677c: 00220863 beq x4,x2,8000678c +80006780: 241012ef jal x5,800081c0 +80006784: 80006774 .word 0x80006774 +80006788: 80016fbe .word 0x80016fbe +8000678c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xc8c8c8c8 +80006790: 0000ae03 lw x28,0(x1) +80006794: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xc8c8c8c8 +80006798: 0000a403 lw x8,0(x1) +8000679c: 00408093 addi x1,x1,4 + +800067a0 : +Zksed_sm4ks_cg_cp_sbox_b200: + sm4ks x11, x28, x8, 2 # perform operation +800067a0: b48e05b3 sm4ks x11,x28,x8,0x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b200, Zksed_sm4ks_cg_cp_sbox_b200_str) +800067a4: 0009a203 lw x4,0(x19) +800067a8: 00b20863 beq x4,x11,800067b8 +800067ac: 215012ef jal x5,800081c0 +800067b0: 800067a0 .word 0x800067a0 +800067b4: 80016ff6 .word 0x80016ff6 +800067b8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xc9c9c9c9 +800067bc: 0000aa03 lw x20,0(x1) +800067c0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xc9c9c9c9 +800067c4: 0000ae83 lw x29,0(x1) +800067c8: 00408093 addi x1,x1,4 + +800067cc : +Zksed_sm4ks_cg_cp_sbox_b201: + sm4ks x25, x20, x29, 2 # perform operation +800067cc: b5da0cb3 sm4ks x25,x20,x29,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b201, Zksed_sm4ks_cg_cp_sbox_b201_str) +800067d0: 0009a203 lw x4,0(x19) +800067d4: 01920863 beq x4,x25,800067e4 +800067d8: 1e9012ef jal x5,800081c0 +800067dc: 800067cc .word 0x800067cc +800067e0: 8001702e .word 0x8001702e +800067e4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xcacacaca +800067e8: 0000a103 lw x2,0(x1) +800067ec: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xcacacaca +800067f0: 0000af83 lw x31,0(x1) +800067f4: 00408093 addi x1,x1,4 + +800067f8 : +Zksed_sm4ks_cg_cp_sbox_b202: + sm4ks x27, x2, x31, 0 # perform operation +800067f8: 35f10db3 sm4ks x27,x2,x31,0x0 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b202, Zksed_sm4ks_cg_cp_sbox_b202_str) +800067fc: 0009a203 lw x4,0(x19) +80006800: 01b20863 beq x4,x27,80006810 +80006804: 1bd012ef jal x5,800081c0 +80006808: 800067f8 .word 0x800067f8 +8000680c: 80017066 .word 0x80017066 +80006810: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xcbcbcbcb +80006814: 0000ac83 lw x25,0(x1) +80006818: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xcbcbcbcb +8000681c: 0000a883 lw x17,0(x1) +80006820: 00408093 addi x1,x1,4 + +80006824 : +Zksed_sm4ks_cg_cp_sbox_b203: + sm4ks x9, x25, x17, 1 # perform operation +80006824: 751c84b3 sm4ks x9,x25,x17,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b203, Zksed_sm4ks_cg_cp_sbox_b203_str) +80006828: 0009a203 lw x4,0(x19) +8000682c: 00920863 beq x4,x9,8000683c +80006830: 191012ef jal x5,800081c0 +80006834: 80006824 .word 0x80006824 +80006838: 8001709e .word 0x8001709e +8000683c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xcccccccc +80006840: 0000a583 lw x11,0(x1) +80006844: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xcccccccc +80006848: 0000ac83 lw x25,0(x1) +8000684c: 00408093 addi x1,x1,4 + +80006850 : +Zksed_sm4ks_cg_cp_sbox_b204: + sm4ks x14, x11, x25, 0 # perform operation +80006850: 35958733 sm4ks x14,x11,x25,0x0 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b204, Zksed_sm4ks_cg_cp_sbox_b204_str) +80006854: 0009a203 lw x4,0(x19) +80006858: 00e20863 beq x4,x14,80006868 +8000685c: 165012ef jal x5,800081c0 +80006860: 80006850 .word 0x80006850 +80006864: 800170d6 .word 0x800170d6 +80006868: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xcdcdcdcd +8000686c: 0000af83 lw x31,0(x1) +80006870: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xcdcdcdcd +80006874: 0000ac03 lw x24,0(x1) +80006878: 00408093 addi x1,x1,4 + +8000687c : +Zksed_sm4ks_cg_cp_sbox_b205: + sm4ks x30, x31, x24, 2 # perform operation +8000687c: b58f8f33 sm4ks x30,x31,x24,0x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b205, Zksed_sm4ks_cg_cp_sbox_b205_str) +80006880: 0009a203 lw x4,0(x19) +80006884: 01e20863 beq x4,x30,80006894 +80006888: 139012ef jal x5,800081c0 +8000688c: 8000687c .word 0x8000687c +80006890: 8001710e .word 0x8001710e +80006894: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xcececece +80006898: 0000ab03 lw x22,0(x1) +8000689c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xcececece +800068a0: 0000aa03 lw x20,0(x1) +800068a4: 00408093 addi x1,x1,4 + +800068a8 : +Zksed_sm4ks_cg_cp_sbox_b206: + sm4ks x31, x22, x20, 0 # perform operation +800068a8: 354b0fb3 sm4ks x31,x22,x20,0x0 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b206, Zksed_sm4ks_cg_cp_sbox_b206_str) +800068ac: 0009a203 lw x4,0(x19) +800068b0: 01f20863 beq x4,x31,800068c0 +800068b4: 10d012ef jal x5,800081c0 +800068b8: 800068a8 .word 0x800068a8 +800068bc: 80017146 .word 0x80017146 +800068c0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xcfcfcfcf +800068c4: 0000a903 lw x18,0(x1) +800068c8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xcfcfcfcf +800068cc: 0000ab83 lw x23,0(x1) +800068d0: 00408093 addi x1,x1,4 + +800068d4 : +Zksed_sm4ks_cg_cp_sbox_b207: + sm4ks x14, x18, x23, 3 # perform operation +800068d4: f5790733 sm4ks x14,x18,x23,0x3 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b207, Zksed_sm4ks_cg_cp_sbox_b207_str) +800068d8: 0009a203 lw x4,0(x19) +800068dc: 00e20863 beq x4,x14,800068ec +800068e0: 0e1012ef jal x5,800081c0 +800068e4: 800068d4 .word 0x800068d4 +800068e8: 8001717e .word 0x8001717e +800068ec: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xd0d0d0d0 +800068f0: 0000a783 lw x15,0(x1) +800068f4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xd0d0d0d0 +800068f8: 0000a403 lw x8,0(x1) +800068fc: 00408093 addi x1,x1,4 + +80006900 : +Zksed_sm4ks_cg_cp_sbox_b208: + sm4ks x11, x15, x8, 3 # perform operation +80006900: f48785b3 sm4ks x11,x15,x8,0x3 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b208, Zksed_sm4ks_cg_cp_sbox_b208_str) +80006904: 0009a203 lw x4,0(x19) +80006908: 00b20863 beq x4,x11,80006918 +8000690c: 0b5012ef jal x5,800081c0 +80006910: 80006900 .word 0x80006900 +80006914: 800171b6 .word 0x800171b6 +80006918: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xd1d1d1d1 +8000691c: 0000a903 lw x18,0(x1) +80006920: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xd1d1d1d1 +80006924: 0000ae83 lw x29,0(x1) +80006928: 00408093 addi x1,x1,4 + +8000692c : +Zksed_sm4ks_cg_cp_sbox_b209: + sm4ks x10, x18, x29, 0 # perform operation +8000692c: 35d90533 sm4ks x10,x18,x29,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b209, Zksed_sm4ks_cg_cp_sbox_b209_str) +80006930: 0009a203 lw x4,0(x19) +80006934: 00a20863 beq x4,x10,80006944 +80006938: 089012ef jal x5,800081c0 +8000693c: 8000692c .word 0x8000692c +80006940: 800171ee .word 0x800171ee +80006944: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xd2d2d2d2 +80006948: 0000ac83 lw x25,0(x1) +8000694c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xd2d2d2d2 +80006950: 0000a683 lw x13,0(x1) +80006954: 00408093 addi x1,x1,4 + +80006958 : +Zksed_sm4ks_cg_cp_sbox_b210: + sm4ks x15, x25, x13, 1 # perform operation +80006958: 74dc87b3 sm4ks x15,x25,x13,0x1 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b210, Zksed_sm4ks_cg_cp_sbox_b210_str) +8000695c: 0009a203 lw x4,0(x19) +80006960: 00f20863 beq x4,x15,80006970 +80006964: 05d012ef jal x5,800081c0 +80006968: 80006958 .word 0x80006958 +8000696c: 80017226 .word 0x80017226 +80006970: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xd3d3d3d3 +80006974: 0000a783 lw x15,0(x1) +80006978: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xd3d3d3d3 +8000697c: 0000a903 lw x18,0(x1) +80006980: 00408093 addi x1,x1,4 + +80006984 : +Zksed_sm4ks_cg_cp_sbox_b211: + sm4ks x14, x15, x18, 1 # perform operation +80006984: 75278733 sm4ks x14,x15,x18,0x1 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b211, Zksed_sm4ks_cg_cp_sbox_b211_str) +80006988: 0009a203 lw x4,0(x19) +8000698c: 00e20863 beq x4,x14,8000699c +80006990: 031012ef jal x5,800081c0 +80006994: 80006984 .word 0x80006984 +80006998: 8001725e .word 0x8001725e +8000699c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xd4d4d4d4 +800069a0: 0000a303 lw x6,0(x1) +800069a4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xd4d4d4d4 +800069a8: 0000ac83 lw x25,0(x1) +800069ac: 00408093 addi x1,x1,4 + +800069b0 : +Zksed_sm4ks_cg_cp_sbox_b212: + sm4ks x21, x6, x25, 2 # perform operation +800069b0: b5930ab3 sm4ks x21,x6,x25,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b212, Zksed_sm4ks_cg_cp_sbox_b212_str) +800069b4: 0009a203 lw x4,0(x19) +800069b8: 01520863 beq x4,x21,800069c8 +800069bc: 005012ef jal x5,800081c0 +800069c0: 800069b0 .word 0x800069b0 +800069c4: 80017296 .word 0x80017296 +800069c8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xd5d5d5d5 +800069cc: 0000aa83 lw x21,0(x1) +800069d0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xd5d5d5d5 +800069d4: 0000ac03 lw x24,0(x1) +800069d8: 00408093 addi x1,x1,4 + +800069dc : +Zksed_sm4ks_cg_cp_sbox_b213: + sm4ks x8, x21, x24, 2 # perform operation +800069dc: b58a8433 sm4ks x8,x21,x24,0x2 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b213, Zksed_sm4ks_cg_cp_sbox_b213_str) +800069e0: 0009a203 lw x4,0(x19) +800069e4: 00820863 beq x4,x8,800069f4 +800069e8: 7d8012ef jal x5,800081c0 +800069ec: 800069dc .word 0x800069dc +800069f0: 800172ce .word 0x800172ce +800069f4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xd6d6d6d6 +800069f8: 0000a483 lw x9,0(x1) +800069fc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xd6d6d6d6 +80006a00: 0000a883 lw x17,0(x1) +80006a04: 00408093 addi x1,x1,4 + +80006a08 : +Zksed_sm4ks_cg_cp_sbox_b214: + sm4ks x21, x9, x17, 0 # perform operation +80006a08: 35148ab3 sm4ks x21,x9,x17,0x0 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b214, Zksed_sm4ks_cg_cp_sbox_b214_str) +80006a0c: 0009a203 lw x4,0(x19) +80006a10: 01520863 beq x4,x21,80006a20 +80006a14: 7ac012ef jal x5,800081c0 +80006a18: 80006a08 .word 0x80006a08 +80006a1c: 80017306 .word 0x80017306 +80006a20: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xd7d7d7d7 +80006a24: 0000af03 lw x30,0(x1) +80006a28: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xd7d7d7d7 +80006a2c: 0000aa83 lw x21,0(x1) +80006a30: 00408093 addi x1,x1,4 + +80006a34 : +Zksed_sm4ks_cg_cp_sbox_b215: + sm4ks x6, x30, x21, 1 # perform operation +80006a34: 755f0333 sm4ks x6,x30,x21,0x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b215, Zksed_sm4ks_cg_cp_sbox_b215_str) +80006a38: 0009a203 lw x4,0(x19) +80006a3c: 00620863 beq x4,x6,80006a4c +80006a40: 780012ef jal x5,800081c0 +80006a44: 80006a34 .word 0x80006a34 +80006a48: 8001733e .word 0x8001733e +80006a4c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xd8d8d8d8 +80006a50: 0000ae83 lw x29,0(x1) +80006a54: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xd8d8d8d8 +80006a58: 0000af03 lw x30,0(x1) +80006a5c: 00408093 addi x1,x1,4 + +80006a60 : +Zksed_sm4ks_cg_cp_sbox_b216: + sm4ks x26, x29, x30, 0 # perform operation +80006a60: 35ee8d33 sm4ks x26,x29,x30,0x0 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b216, Zksed_sm4ks_cg_cp_sbox_b216_str) +80006a64: 0009a203 lw x4,0(x19) +80006a68: 01a20863 beq x4,x26,80006a78 +80006a6c: 754012ef jal x5,800081c0 +80006a70: 80006a60 .word 0x80006a60 +80006a74: 80017376 .word 0x80017376 +80006a78: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xd9d9d9d9 +80006a7c: 0000ac83 lw x25,0(x1) +80006a80: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xd9d9d9d9 +80006a84: 0000ab03 lw x22,0(x1) +80006a88: 00408093 addi x1,x1,4 + +80006a8c : +Zksed_sm4ks_cg_cp_sbox_b217: + sm4ks x8, x25, x22, 3 # perform operation +80006a8c: f56c8433 sm4ks x8,x25,x22,0x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b217, Zksed_sm4ks_cg_cp_sbox_b217_str) +80006a90: 0009a203 lw x4,0(x19) +80006a94: 00820863 beq x4,x8,80006aa4 +80006a98: 728012ef jal x5,800081c0 +80006a9c: 80006a8c .word 0x80006a8c +80006aa0: 800173ae .word 0x800173ae +80006aa4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xdadadada +80006aa8: 0000ad83 lw x27,0(x1) +80006aac: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xdadadada +80006ab0: 0000a403 lw x8,0(x1) +80006ab4: 00408093 addi x1,x1,4 + +80006ab8 : +Zksed_sm4ks_cg_cp_sbox_b218: + sm4ks x13, x27, x8, 2 # perform operation +80006ab8: b48d86b3 sm4ks x13,x27,x8,0x2 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b218, Zksed_sm4ks_cg_cp_sbox_b218_str) +80006abc: 0009a203 lw x4,0(x19) +80006ac0: 00d20863 beq x4,x13,80006ad0 +80006ac4: 6fc012ef jal x5,800081c0 +80006ac8: 80006ab8 .word 0x80006ab8 +80006acc: 800173e6 .word 0x800173e6 +80006ad0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xdbdbdbdb +80006ad4: 0000ab03 lw x22,0(x1) +80006ad8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xdbdbdbdb +80006adc: 0000ae03 lw x28,0(x1) +80006ae0: 00408093 addi x1,x1,4 + +80006ae4 : +Zksed_sm4ks_cg_cp_sbox_b219: + sm4ks x2, x22, x28, 2 # perform operation +80006ae4: b5cb0133 sm4ks x2,x22,x28,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b219, Zksed_sm4ks_cg_cp_sbox_b219_str) +80006ae8: 0009a203 lw x4,0(x19) +80006aec: 00220863 beq x4,x2,80006afc +80006af0: 6d0012ef jal x5,800081c0 +80006af4: 80006ae4 .word 0x80006ae4 +80006af8: 8001741e .word 0x8001741e +80006afc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xdcdcdcdc +80006b00: 0000a583 lw x11,0(x1) +80006b04: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xdcdcdcdc +80006b08: 0000af03 lw x30,0(x1) +80006b0c: 00408093 addi x1,x1,4 + +80006b10 : +Zksed_sm4ks_cg_cp_sbox_b220: + sm4ks x16, x11, x30, 0 # perform operation +80006b10: 35e58833 sm4ks x16,x11,x30,0x0 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b220, Zksed_sm4ks_cg_cp_sbox_b220_str) +80006b14: 0009a203 lw x4,0(x19) +80006b18: 01020863 beq x4,x16,80006b28 +80006b1c: 6a4012ef jal x5,800081c0 +80006b20: 80006b10 .word 0x80006b10 +80006b24: 80017456 .word 0x80017456 +80006b28: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xdddddddd +80006b2c: 0000a903 lw x18,0(x1) +80006b30: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xdddddddd +80006b34: 0000a803 lw x16,0(x1) +80006b38: 00408093 addi x1,x1,4 + +80006b3c : +Zksed_sm4ks_cg_cp_sbox_b221: + sm4ks x2, x18, x16, 3 # perform operation +80006b3c: f5090133 sm4ks x2,x18,x16,0x3 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b221, Zksed_sm4ks_cg_cp_sbox_b221_str) +80006b40: 0009a203 lw x4,0(x19) +80006b44: 00220863 beq x4,x2,80006b54 +80006b48: 678012ef jal x5,800081c0 +80006b4c: 80006b3c .word 0x80006b3c +80006b50: 8001748e .word 0x8001748e +80006b54: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xdededede +80006b58: 0000ac83 lw x25,0(x1) +80006b5c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xdededede +80006b60: 0000af83 lw x31,0(x1) +80006b64: 00408093 addi x1,x1,4 + +80006b68 : +Zksed_sm4ks_cg_cp_sbox_b222: + sm4ks x6, x25, x31, 1 # perform operation +80006b68: 75fc8333 sm4ks x6,x25,x31,0x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b222, Zksed_sm4ks_cg_cp_sbox_b222_str) +80006b6c: 0009a203 lw x4,0(x19) +80006b70: 00620863 beq x4,x6,80006b80 +80006b74: 64c012ef jal x5,800081c0 +80006b78: 80006b68 .word 0x80006b68 +80006b7c: 800174c6 .word 0x800174c6 +80006b80: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xdfdfdfdf +80006b84: 0000a603 lw x12,0(x1) +80006b88: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xdfdfdfdf +80006b8c: 0000a303 lw x6,0(x1) +80006b90: 00408093 addi x1,x1,4 + +80006b94 : +Zksed_sm4ks_cg_cp_sbox_b223: + sm4ks x18, x12, x6, 3 # perform operation +80006b94: f4660933 sm4ks x18,x12,x6,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b223, Zksed_sm4ks_cg_cp_sbox_b223_str) +80006b98: 0009a203 lw x4,0(x19) +80006b9c: 01220863 beq x4,x18,80006bac +80006ba0: 620012ef jal x5,800081c0 +80006ba4: 80006b94 .word 0x80006b94 +80006ba8: 800174fe .word 0x800174fe +80006bac: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xe0e0e0e0 +80006bb0: 0000a903 lw x18,0(x1) +80006bb4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xe0e0e0e0 +80006bb8: 0000a883 lw x17,0(x1) +80006bbc: 00408093 addi x1,x1,4 + +80006bc0 : +Zksed_sm4ks_cg_cp_sbox_b224: + sm4ks x23, x18, x17, 2 # perform operation +80006bc0: b5190bb3 sm4ks x23,x18,x17,0x2 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b224, Zksed_sm4ks_cg_cp_sbox_b224_str) +80006bc4: 0009a203 lw x4,0(x19) +80006bc8: 01720863 beq x4,x23,80006bd8 +80006bcc: 5f4012ef jal x5,800081c0 +80006bd0: 80006bc0 .word 0x80006bc0 +80006bd4: 80017536 .word 0x80017536 +80006bd8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xe1e1e1e1 +80006bdc: 0000a403 lw x8,0(x1) +80006be0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xe1e1e1e1 +80006be4: 0000a503 lw x10,0(x1) +80006be8: 00408093 addi x1,x1,4 + +80006bec : +Zksed_sm4ks_cg_cp_sbox_b225: + sm4ks x30, x8, x10, 1 # perform operation +80006bec: 74a40f33 sm4ks x30,x8,x10,0x1 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b225, Zksed_sm4ks_cg_cp_sbox_b225_str) +80006bf0: 0009a203 lw x4,0(x19) +80006bf4: 01e20863 beq x4,x30,80006c04 +80006bf8: 5c8012ef jal x5,800081c0 +80006bfc: 80006bec .word 0x80006bec +80006c00: 8001756e .word 0x8001756e +80006c04: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xe2e2e2e2 +80006c08: 0000ab03 lw x22,0(x1) +80006c0c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xe2e2e2e2 +80006c10: 0000a603 lw x12,0(x1) +80006c14: 00408093 addi x1,x1,4 + +80006c18 : +Zksed_sm4ks_cg_cp_sbox_b226: + sm4ks x25, x22, x12, 3 # perform operation +80006c18: f4cb0cb3 sm4ks x25,x22,x12,0x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b226, Zksed_sm4ks_cg_cp_sbox_b226_str) +80006c1c: 0009a203 lw x4,0(x19) +80006c20: 01920863 beq x4,x25,80006c30 +80006c24: 59c012ef jal x5,800081c0 +80006c28: 80006c18 .word 0x80006c18 +80006c2c: 800175a6 .word 0x800175a6 +80006c30: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xe3e3e3e3 +80006c34: 0000a403 lw x8,0(x1) +80006c38: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xe3e3e3e3 +80006c3c: 0000ab83 lw x23,0(x1) +80006c40: 00408093 addi x1,x1,4 + +80006c44 : +Zksed_sm4ks_cg_cp_sbox_b227: + sm4ks x6, x8, x23, 1 # perform operation +80006c44: 75740333 sm4ks x6,x8,x23,0x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zksed_sm4ks_cg_cp_sbox_b227, Zksed_sm4ks_cg_cp_sbox_b227_str) +80006c48: 0009a203 lw x4,0(x19) +80006c4c: 00620863 beq x4,x6,80006c5c +80006c50: 570012ef jal x5,800081c0 +80006c54: 80006c44 .word 0x80006c44 +80006c58: 800175de .word 0x800175de +80006c5c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xe4e4e4e4 +80006c60: 0000a683 lw x13,0(x1) +80006c64: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xe4e4e4e4 +80006c68: 0000ae03 lw x28,0(x1) +80006c6c: 00408093 addi x1,x1,4 + +80006c70 : +Zksed_sm4ks_cg_cp_sbox_b228: + sm4ks x17, x13, x28, 2 # perform operation +80006c70: b5c688b3 sm4ks x17,x13,x28,0x2 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b228, Zksed_sm4ks_cg_cp_sbox_b228_str) +80006c74: 0009a203 lw x4,0(x19) +80006c78: 01120863 beq x4,x17,80006c88 +80006c7c: 544012ef jal x5,800081c0 +80006c80: 80006c70 .word 0x80006c70 +80006c84: 80017616 .word 0x80017616 +80006c88: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xe5e5e5e5 +80006c8c: 0000a103 lw x2,0(x1) +80006c90: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xe5e5e5e5 +80006c94: 0000a683 lw x13,0(x1) +80006c98: 00408093 addi x1,x1,4 + +80006c9c : +Zksed_sm4ks_cg_cp_sbox_b229: + sm4ks x27, x2, x13, 2 # perform operation +80006c9c: b4d10db3 sm4ks x27,x2,x13,0x2 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b229, Zksed_sm4ks_cg_cp_sbox_b229_str) +80006ca0: 0009a203 lw x4,0(x19) +80006ca4: 01b20863 beq x4,x27,80006cb4 +80006ca8: 518012ef jal x5,800081c0 +80006cac: 80006c9c .word 0x80006c9c +80006cb0: 8001764e .word 0x8001764e +80006cb4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xe6e6e6e6 +80006cb8: 0000a883 lw x17,0(x1) +80006cbc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xe6e6e6e6 +80006cc0: 0000af03 lw x30,0(x1) +80006cc4: 00408093 addi x1,x1,4 + +80006cc8 : +Zksed_sm4ks_cg_cp_sbox_b230: + sm4ks x21, x17, x30, 1 # perform operation +80006cc8: 75e88ab3 sm4ks x21,x17,x30,0x1 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b230, Zksed_sm4ks_cg_cp_sbox_b230_str) +80006ccc: 0009a203 lw x4,0(x19) +80006cd0: 01520863 beq x4,x21,80006ce0 +80006cd4: 4ec012ef jal x5,800081c0 +80006cd8: 80006cc8 .word 0x80006cc8 +80006cdc: 80017686 .word 0x80017686 +80006ce0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xe7e7e7e7 +80006ce4: 0000a183 lw x3,0(x1) +80006ce8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xe7e7e7e7 +80006cec: 0000a583 lw x11,0(x1) +80006cf0: 00408093 addi x1,x1,4 + +80006cf4 : +Zksed_sm4ks_cg_cp_sbox_b231: + sm4ks x17, x3, x11, 3 # perform operation +80006cf4: f4b188b3 sm4ks x17,x3,x11,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b231, Zksed_sm4ks_cg_cp_sbox_b231_str) +80006cf8: 0009a203 lw x4,0(x19) +80006cfc: 01120863 beq x4,x17,80006d0c +80006d00: 4c0012ef jal x5,800081c0 +80006d04: 80006cf4 .word 0x80006cf4 +80006d08: 800176be .word 0x800176be +80006d0c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xe8e8e8e8 +80006d10: 0000a183 lw x3,0(x1) +80006d14: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xe8e8e8e8 +80006d18: 0000ab03 lw x22,0(x1) +80006d1c: 00408093 addi x1,x1,4 + +80006d20 : +Zksed_sm4ks_cg_cp_sbox_b232: + sm4ks x25, x3, x22, 0 # perform operation +80006d20: 35618cb3 sm4ks x25,x3,x22,0x0 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b232, Zksed_sm4ks_cg_cp_sbox_b232_str) +80006d24: 0009a203 lw x4,0(x19) +80006d28: 01920863 beq x4,x25,80006d38 +80006d2c: 494012ef jal x5,800081c0 +80006d30: 80006d20 .word 0x80006d20 +80006d34: 800176f6 .word 0x800176f6 +80006d38: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xe9e9e9e9 +80006d3c: 0000ae03 lw x28,0(x1) +80006d40: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xe9e9e9e9 +80006d44: 0000a103 lw x2,0(x1) +80006d48: 00408093 addi x1,x1,4 + +80006d4c : +Zksed_sm4ks_cg_cp_sbox_b233: + sm4ks x3, x28, x2, 3 # perform operation +80006d4c: f42e01b3 sm4ks x3,x28,x2,0x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b233, Zksed_sm4ks_cg_cp_sbox_b233_str) +80006d50: 0009a203 lw x4,0(x19) +80006d54: 00320863 beq x4,x3,80006d64 +80006d58: 468012ef jal x5,800081c0 +80006d5c: 80006d4c .word 0x80006d4c +80006d60: 8001772e .word 0x8001772e +80006d64: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xeaeaeaea +80006d68: 0000a783 lw x15,0(x1) +80006d6c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xeaeaeaea +80006d70: 0000a383 lw x7,0(x1) +80006d74: 00408093 addi x1,x1,4 + +80006d78 : +Zksed_sm4ks_cg_cp_sbox_b234: + sm4ks x17, x15, x7, 3 # perform operation +80006d78: f47788b3 sm4ks x17,x15,x7,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b234, Zksed_sm4ks_cg_cp_sbox_b234_str) +80006d7c: 0009a203 lw x4,0(x19) +80006d80: 01120863 beq x4,x17,80006d90 +80006d84: 43c012ef jal x5,800081c0 +80006d88: 80006d78 .word 0x80006d78 +80006d8c: 80017766 .word 0x80017766 +80006d90: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xebebebeb +80006d94: 0000a883 lw x17,0(x1) +80006d98: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xebebebeb +80006d9c: 0000ab83 lw x23,0(x1) +80006da0: 00408093 addi x1,x1,4 + +80006da4 : +Zksed_sm4ks_cg_cp_sbox_b235: + sm4ks x3, x17, x23, 3 # perform operation +80006da4: f57881b3 sm4ks x3,x17,x23,0x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b235, Zksed_sm4ks_cg_cp_sbox_b235_str) +80006da8: 0009a203 lw x4,0(x19) +80006dac: 00320863 beq x4,x3,80006dbc +80006db0: 410012ef jal x5,800081c0 +80006db4: 80006da4 .word 0x80006da4 +80006db8: 8001779e .word 0x8001779e +80006dbc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xecececec +80006dc0: 0000a703 lw x14,0(x1) +80006dc4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xecececec +80006dc8: 0000a483 lw x9,0(x1) +80006dcc: 00408093 addi x1,x1,4 + +80006dd0 : +Zksed_sm4ks_cg_cp_sbox_b236: + sm4ks x8, x14, x9, 0 # perform operation +80006dd0: 34970433 sm4ks x8,x14,x9,0x0 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b236, Zksed_sm4ks_cg_cp_sbox_b236_str) +80006dd4: 0009a203 lw x4,0(x19) +80006dd8: 00820863 beq x4,x8,80006de8 +80006ddc: 3e4012ef jal x5,800081c0 +80006de0: 80006dd0 .word 0x80006dd0 +80006de4: 800177d6 .word 0x800177d6 +80006de8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xedededed +80006dec: 0000ad83 lw x27,0(x1) +80006df0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xedededed +80006df4: 0000ae03 lw x28,0(x1) +80006df8: 00408093 addi x1,x1,4 + +80006dfc : +Zksed_sm4ks_cg_cp_sbox_b237: + sm4ks x25, x27, x28, 2 # perform operation +80006dfc: b5cd8cb3 sm4ks x25,x27,x28,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b237, Zksed_sm4ks_cg_cp_sbox_b237_str) +80006e00: 0009a203 lw x4,0(x19) +80006e04: 01920863 beq x4,x25,80006e14 +80006e08: 3b8012ef jal x5,800081c0 +80006e0c: 80006dfc .word 0x80006dfc +80006e10: 8001780e .word 0x8001780e +80006e14: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xeeeeeeee +80006e18: 0000a803 lw x16,0(x1) +80006e1c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xeeeeeeee +80006e20: 0000a183 lw x3,0(x1) +80006e24: 00408093 addi x1,x1,4 + +80006e28 : +Zksed_sm4ks_cg_cp_sbox_b238: + sm4ks x14, x16, x3, 0 # perform operation +80006e28: 34380733 sm4ks x14,x16,x3,0x0 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b238, Zksed_sm4ks_cg_cp_sbox_b238_str) +80006e2c: 0009a203 lw x4,0(x19) +80006e30: 00e20863 beq x4,x14,80006e40 +80006e34: 38c012ef jal x5,800081c0 +80006e38: 80006e28 .word 0x80006e28 +80006e3c: 80017846 .word 0x80017846 +80006e40: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xefefefef +80006e44: 0000a603 lw x12,0(x1) +80006e48: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xefefefef +80006e4c: 0000ae83 lw x29,0(x1) +80006e50: 00408093 addi x1,x1,4 + +80006e54 : +Zksed_sm4ks_cg_cp_sbox_b239: + sm4ks x18, x12, x29, 1 # perform operation +80006e54: 75d60933 sm4ks x18,x12,x29,0x1 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b239, Zksed_sm4ks_cg_cp_sbox_b239_str) +80006e58: 0009a203 lw x4,0(x19) +80006e5c: 01220863 beq x4,x18,80006e6c +80006e60: 360012ef jal x5,800081c0 +80006e64: 80006e54 .word 0x80006e54 +80006e68: 8001787e .word 0x8001787e +80006e6c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xf0f0f0f0 +80006e70: 0000ae83 lw x29,0(x1) +80006e74: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xf0f0f0f0 +80006e78: 0000a183 lw x3,0(x1) +80006e7c: 00408093 addi x1,x1,4 + +80006e80 : +Zksed_sm4ks_cg_cp_sbox_b240: + sm4ks x17, x29, x3, 0 # perform operation +80006e80: 343e88b3 sm4ks x17,x29,x3,0x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b240, Zksed_sm4ks_cg_cp_sbox_b240_str) +80006e84: 0009a203 lw x4,0(x19) +80006e88: 01120863 beq x4,x17,80006e98 +80006e8c: 334012ef jal x5,800081c0 +80006e90: 80006e80 .word 0x80006e80 +80006e94: 800178b6 .word 0x800178b6 +80006e98: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xf1f1f1f1 +80006e9c: 0000a683 lw x13,0(x1) +80006ea0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xf1f1f1f1 +80006ea4: 0000ab83 lw x23,0(x1) +80006ea8: 00408093 addi x1,x1,4 + +80006eac : +Zksed_sm4ks_cg_cp_sbox_b241: + sm4ks x9, x13, x23, 1 # perform operation +80006eac: 757684b3 sm4ks x9,x13,x23,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b241, Zksed_sm4ks_cg_cp_sbox_b241_str) +80006eb0: 0009a203 lw x4,0(x19) +80006eb4: 00920863 beq x4,x9,80006ec4 +80006eb8: 308012ef jal x5,800081c0 +80006ebc: 80006eac .word 0x80006eac +80006ec0: 800178ee .word 0x800178ee +80006ec4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xf2f2f2f2 +80006ec8: 0000af03 lw x30,0(x1) +80006ecc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xf2f2f2f2 +80006ed0: 0000a403 lw x8,0(x1) +80006ed4: 00408093 addi x1,x1,4 + +80006ed8 : +Zksed_sm4ks_cg_cp_sbox_b242: + sm4ks x18, x30, x8, 2 # perform operation +80006ed8: b48f0933 sm4ks x18,x30,x8,0x2 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b242, Zksed_sm4ks_cg_cp_sbox_b242_str) +80006edc: 0009a203 lw x4,0(x19) +80006ee0: 01220863 beq x4,x18,80006ef0 +80006ee4: 2dc012ef jal x5,800081c0 +80006ee8: 80006ed8 .word 0x80006ed8 +80006eec: 80017926 .word 0x80017926 +80006ef0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xf3f3f3f3 +80006ef4: 0000ab03 lw x22,0(x1) +80006ef8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xf3f3f3f3 +80006efc: 0000a883 lw x17,0(x1) +80006f00: 00408093 addi x1,x1,4 + +80006f04 : +Zksed_sm4ks_cg_cp_sbox_b243: + sm4ks x23, x22, x17, 2 # perform operation +80006f04: b51b0bb3 sm4ks x23,x22,x17,0x2 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b243, Zksed_sm4ks_cg_cp_sbox_b243_str) +80006f08: 0009a203 lw x4,0(x19) +80006f0c: 01720863 beq x4,x23,80006f1c +80006f10: 2b0012ef jal x5,800081c0 +80006f14: 80006f04 .word 0x80006f04 +80006f18: 8001795e .word 0x8001795e +80006f1c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xf4f4f4f4 +80006f20: 0000a783 lw x15,0(x1) +80006f24: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xf4f4f4f4 +80006f28: 0000a603 lw x12,0(x1) +80006f2c: 00408093 addi x1,x1,4 + +80006f30 : +Zksed_sm4ks_cg_cp_sbox_b244: + sm4ks x30, x15, x12, 2 # perform operation +80006f30: b4c78f33 sm4ks x30,x15,x12,0x2 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b244, Zksed_sm4ks_cg_cp_sbox_b244_str) +80006f34: 0009a203 lw x4,0(x19) +80006f38: 01e20863 beq x4,x30,80006f48 +80006f3c: 284012ef jal x5,800081c0 +80006f40: 80006f30 .word 0x80006f30 +80006f44: 80017996 .word 0x80017996 +80006f48: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xf5f5f5f5 +80006f4c: 0000a603 lw x12,0(x1) +80006f50: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xf5f5f5f5 +80006f54: 0000a103 lw x2,0(x1) +80006f58: 00408093 addi x1,x1,4 + +80006f5c : +Zksed_sm4ks_cg_cp_sbox_b245: + sm4ks x30, x12, x2, 0 # perform operation +80006f5c: 34260f33 sm4ks x30,x12,x2,0x0 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b245, Zksed_sm4ks_cg_cp_sbox_b245_str) +80006f60: 0009a203 lw x4,0(x19) +80006f64: 01e20863 beq x4,x30,80006f74 +80006f68: 258012ef jal x5,800081c0 +80006f6c: 80006f5c .word 0x80006f5c +80006f70: 800179ce .word 0x800179ce +80006f74: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xf6f6f6f6 +80006f78: 0000ac03 lw x24,0(x1) +80006f7c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xf6f6f6f6 +80006f80: 0000ab83 lw x23,0(x1) +80006f84: 00408093 addi x1,x1,4 + +80006f88 : +Zksed_sm4ks_cg_cp_sbox_b246: + sm4ks x8, x24, x23, 1 # perform operation +80006f88: 757c0433 sm4ks x8,x24,x23,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b246, Zksed_sm4ks_cg_cp_sbox_b246_str) +80006f8c: 0009a203 lw x4,0(x19) +80006f90: 00820863 beq x4,x8,80006fa0 +80006f94: 22c012ef jal x5,800081c0 +80006f98: 80006f88 .word 0x80006f88 +80006f9c: 80017a06 .word 0x80017a06 +80006fa0: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xf7f7f7f7 +80006fa4: 0000a303 lw x6,0(x1) +80006fa8: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xf7f7f7f7 +80006fac: 0000ad03 lw x26,0(x1) +80006fb0: 00408093 addi x1,x1,4 + +80006fb4 : +Zksed_sm4ks_cg_cp_sbox_b247: + sm4ks x11, x6, x26, 2 # perform operation +80006fb4: b5a305b3 sm4ks x11,x6,x26,0x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b247, Zksed_sm4ks_cg_cp_sbox_b247_str) +80006fb8: 0009a203 lw x4,0(x19) +80006fbc: 00b20863 beq x4,x11,80006fcc +80006fc0: 200012ef jal x5,800081c0 +80006fc4: 80006fb4 .word 0x80006fb4 +80006fc8: 80017a3e .word 0x80017a3e +80006fcc: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xf8f8f8f8 +80006fd0: 0000ac03 lw x24,0(x1) +80006fd4: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xf8f8f8f8 +80006fd8: 0000aa83 lw x21,0(x1) +80006fdc: 00408093 addi x1,x1,4 + +80006fe0 : +Zksed_sm4ks_cg_cp_sbox_b248: + sm4ks x2, x24, x21, 0 # perform operation +80006fe0: 355c0133 sm4ks x2,x24,x21,0x0 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b248, Zksed_sm4ks_cg_cp_sbox_b248_str) +80006fe4: 0009a203 lw x4,0(x19) +80006fe8: 00220863 beq x4,x2,80006ff8 +80006fec: 1d4012ef jal x5,800081c0 +80006ff0: 80006fe0 .word 0x80006fe0 +80006ff4: 80017a76 .word 0x80017a76 +80006ff8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xf9f9f9f9 +80006ffc: 0000a383 lw x7,0(x1) +80007000: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xf9f9f9f9 +80007004: 0000a903 lw x18,0(x1) +80007008: 00408093 addi x1,x1,4 + +8000700c : +Zksed_sm4ks_cg_cp_sbox_b249: + sm4ks x11, x7, x18, 2 # perform operation +8000700c: b52385b3 sm4ks x11,x7,x18,0x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b249, Zksed_sm4ks_cg_cp_sbox_b249_str) +80007010: 0009a203 lw x4,0(x19) +80007014: 00b20863 beq x4,x11,80007024 +80007018: 1a8012ef jal x5,800081c0 +8000701c: 8000700c .word 0x8000700c +80007020: 80017aae .word 0x80017aae +80007024: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xfafafafa +80007028: 0000a503 lw x10,0(x1) +8000702c: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xfafafafa +80007030: 0000a683 lw x13,0(x1) +80007034: 00408093 addi x1,x1,4 + +80007038 : +Zksed_sm4ks_cg_cp_sbox_b250: + sm4ks x9, x10, x13, 3 # perform operation +80007038: f4d504b3 sm4ks x9,x10,x13,0x3 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b250, Zksed_sm4ks_cg_cp_sbox_b250_str) +8000703c: 0009a203 lw x4,0(x19) +80007040: 00920863 beq x4,x9,80007050 +80007044: 17c012ef jal x5,800081c0 +80007048: 80007038 .word 0x80007038 +8000704c: 80017ae6 .word 0x80017ae6 +80007050: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfbfbfbfb +80007054: 0000ad03 lw x26,0(x1) +80007058: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xfbfbfbfb +8000705c: 0000ac03 lw x24,0(x1) +80007060: 00408093 addi x1,x1,4 + +80007064 : +Zksed_sm4ks_cg_cp_sbox_b251: + sm4ks x21, x26, x24, 2 # perform operation +80007064: b58d0ab3 sm4ks x21,x26,x24,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b251, Zksed_sm4ks_cg_cp_sbox_b251_str) +80007068: 0009a203 lw x4,0(x19) +8000706c: 01520863 beq x4,x21,8000707c +80007070: 150012ef jal x5,800081c0 +80007074: 80007064 .word 0x80007064 +80007078: 80017b1e .word 0x80017b1e +8000707c: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xfcfcfcfc +80007080: 0000ab03 lw x22,0(x1) +80007084: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xfcfcfcfc +80007088: 0000af83 lw x31,0(x1) +8000708c: 00408093 addi x1,x1,4 + +80007090 : +Zksed_sm4ks_cg_cp_sbox_b252: + sm4ks x12, x22, x31, 3 # perform operation +80007090: f5fb0633 sm4ks x12,x22,x31,0x3 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b252, Zksed_sm4ks_cg_cp_sbox_b252_str) +80007094: 0009a203 lw x4,0(x19) +80007098: 00c20863 beq x4,x12,800070a8 +8000709c: 124012ef jal x5,800081c0 +800070a0: 80007090 .word 0x80007090 +800070a4: 80017b56 .word 0x80017b56 +800070a8: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xfdfdfdfd +800070ac: 0000a383 lw x7,0(x1) +800070b0: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xfdfdfdfd +800070b4: 0000af83 lw x31,0(x1) +800070b8: 00408093 addi x1,x1,4 + +800070bc : +Zksed_sm4ks_cg_cp_sbox_b253: + sm4ks x2, x7, x31, 3 # perform operation +800070bc: f5f38133 sm4ks x2,x7,x31,0x3 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b253, Zksed_sm4ks_cg_cp_sbox_b253_str) +800070c0: 0009a203 lw x4,0(x19) +800070c4: 00220863 beq x4,x2,800070d4 +800070c8: 0f8012ef jal x5,800081c0 +800070cc: 800070bc .word 0x800070bc +800070d0: 80017b8e .word 0x80017b8e +800070d4: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xfefefefe +800070d8: 0000af83 lw x31,0(x1) +800070dc: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xfefefefe +800070e0: 0000ac03 lw x24,0(x1) +800070e4: 00408093 addi x1,x1,4 + +800070e8 : +Zksed_sm4ks_cg_cp_sbox_b254: + sm4ks x2, x31, x24, 1 # perform operation +800070e8: 758f8133 sm4ks x2,x31,x24,0x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_sbox_b254, Zksed_sm4ks_cg_cp_sbox_b254_str) +800070ec: 0009a203 lw x4,0(x19) +800070f0: 00220863 beq x4,x2,80007100 +800070f4: 0cc012ef jal x5,800081c0 +800070f8: 800070e8 .word 0x800070e8 +800070fc: 80017bc6 .word 0x80017bc6 +80007100: 00498993 addi x19,x19,4 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xffffffff +80007104: 0000a603 lw x12,0(x1) +80007108: 00408093 addi x1,x1,4 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffff +8000710c: 0000a183 lw x3,0(x1) +80007110: 00408093 addi x1,x1,4 + +80007114 : +Zksed_sm4ks_cg_cp_sbox_b255: + sm4ks x15, x12, x3, 2 # perform operation +80007114: b43607b3 sm4ks x15,x12,x3,0x2 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b255, Zksed_sm4ks_cg_cp_sbox_b255_str) +80007118: 0009a203 lw x4,0(x19) +8000711c: 00f20863 beq x4,x15,8000712c +80007120: 0a0012ef jal x5,800081c0 +80007124: 80007114 .word 0x80007114 +80007128: 80017bfe .word 0x80017bfe +8000712c: 00498993 addi x19,x19,4 + + mv x2, x19 # restore signature pointer to default register for teardown +80007130: 00098113 addi x2,x19,0 + +80007134 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80007134: 00000513 addi x10,x0,0 +80007138: 00000073 ecall +8000713c: fff00513 addi x10,x0,-1 +80007140: 1d800413 addi x8,x0,472 + +80007144 : +80007144: 34002373 csrrs x6,mscratch,x0 + +80007148 : +80007148: 23832383 lw x7,568(x6) +8000714c: 23c32483 lw x9,572(x6) + +80007150 : +80007150: 22032383 lw x7,544(x6) + +80007154 : +80007154: 25032483 lw x9,592(x6) +80007158: 34049073 csrrw x0,mscratch,x9 + +8000715c : +8000715c: 24832483 lw x9,584(x6) +80007160: 305493f3 csrrw x7,mtvec,x9 +80007164: ffc4f493 andi x9,x9,-4 +80007168: ffc3f393 andi x7,x7,-4 +8000716c: 00749e63 bne x9,x7,80007188 + +80007170 : +80007170: 00030493 addi x9,x6,0 + +80007174 : +80007174: 0004a783 lw x15,0(x9) +80007178: 00f3a023 sw x15,0(x7) +8000717c: 00438393 addi x7,x7,4 +80007180: 00448493 addi x9,x9,4 +80007184: fe83c8e3 blt x7,x8,80007174 +80007188: 0000100f fence.i + +8000718c : +8000718c: 00000013 addi x0,x0,0 +80007190: 00000013 addi x0,x0,0 +80007194: 00000013 addi x0,x0,0 +80007198: 00000013 addi x0,x0,0 +8000719c: 00000013 addi x0,x0,0 +800071a0: 00000497 auipc x9,0x0 +800071a4: 29048493 addi x9,x9,656 # 80007430 +800071a8: 00000013 addi x0,x0,0 +800071ac: 00000013 addi x0,x0,0 +800071b0: 00000013 addi x0,x0,0 +800071b4: 00000013 addi x0,x0,0 +800071b8: 00000013 addi x0,x0,0 +800071bc: 00000013 addi x0,x0,0 +800071c0: 10e49863 bne x9,x14,800072d0 +800071c4: 00000013 addi x0,x0,0 +800071c8: 00000013 addi x0,x0,0 +800071cc: 00000013 addi x0,x0,0 +800071d0: 00000013 addi x0,x0,0 +800071d4: 00000013 addi x0,x0,0 +800071d8: 00000013 addi x0,x0,0 +800071dc: 00000013 addi x0,x0,0 +800071e0: 00011517 auipc x10,0x11 +800071e4: 0e050513 addi x10,x10,224 # 800182c0 +800071e8: 00000013 addi x0,x0,0 +800071ec: 00000013 addi x0,x0,0 +800071f0: 00000013 addi x0,x0,0 +800071f4: 00000013 addi x0,x0,0 +800071f8: 00000013 addi x0,x0,0 +800071fc: 00000013 addi x0,x0,0 +80007200: 00023097 auipc x1,0x23 +80007204: 364080e7 jalr x1,868(x1) # 8002a564 +80007208: 00000013 addi x0,x0,0 +8000720c: 00000013 addi x0,x0,0 +80007210: 00000013 addi x0,x0,0 +80007214: 00000013 addi x0,x0,0 +80007218: 00000013 addi x0,x0,0 +8000721c: 00000013 addi x0,x0,0 +80007220: 00011517 auipc x10,0x11 +80007224: 0db50513 addi x10,x10,219 # 800182fb +80007228: 00000013 addi x0,x0,0 +8000722c: 00000013 addi x0,x0,0 +80007230: 00000013 addi x0,x0,0 +80007234: 00000013 addi x0,x0,0 +80007238: 00000013 addi x0,x0,0 +8000723c: 00000013 addi x0,x0,0 +80007240: 00023097 auipc x1,0x23 +80007244: 324080e7 jalr x1,804(x1) # 8002a564 +80007248: 00000013 addi x0,x0,0 +8000724c: 00000013 addi x0,x0,0 +80007250: 00000013 addi x0,x0,0 +80007254: 00000013 addi x0,x0,0 +80007258: 00000013 addi x0,x0,0 +8000725c: 00000013 addi x0,x0,0 +80007260: 00011517 auipc x10,0x11 +80007264: 0fb50513 addi x10,x10,251 # 8001835b +80007268: 00000013 addi x0,x0,0 +8000726c: 00000013 addi x0,x0,0 +80007270: 00000013 addi x0,x0,0 +80007274: 00000013 addi x0,x0,0 +80007278: 00000013 addi x0,x0,0 +8000727c: 00000013 addi x0,x0,0 +80007280: 00023097 auipc x1,0x23 +80007284: 2e4080e7 jalr x1,740(x1) # 8002a564 +80007288: 00000013 addi x0,x0,0 +8000728c: 00000013 addi x0,x0,0 +80007290: 00000013 addi x0,x0,0 +80007294: 00000013 addi x0,x0,0 +80007298: 00000013 addi x0,x0,0 +8000729c: 00000013 addi x0,x0,0 +800072a0: 00012517 auipc x10,0x12 +800072a4: c6650513 addi x10,x10,-922 # 80018f06 +800072a8: 00000013 addi x0,x0,0 +800072ac: 00000013 addi x0,x0,0 +800072b0: 00000013 addi x0,x0,0 +800072b4: 00000013 addi x0,x0,0 +800072b8: 00000013 addi x0,x0,0 +800072bc: 00000013 addi x0,x0,0 +800072c0: 00023097 auipc x1,0x23 +800072c4: 2a4080e7 jalr x1,676(x1) # 8002a564 +800072c8: 00023097 auipc x1,0x23 +800072cc: 2fc080e7 jalr x1,764(x1) # 8002a5c4 + +800072d0 : +800072d0: 00000013 addi x0,x0,0 +800072d4: 00000013 addi x0,x0,0 +800072d8: 00000013 addi x0,x0,0 +800072dc: 00000013 addi x0,x0,0 +800072e0: 00005317 auipc x6,0x5 +800072e4: 04830313 addi x6,x6,72 # 8000c328 +800072e8: 00000013 addi x0,x0,0 +800072ec: 00000013 addi x0,x0,0 +800072f0: 00000013 addi x0,x0,0 +800072f4: 00000013 addi x0,x0,0 +800072f8: 00000013 addi x0,x0,0 +800072fc: 00000013 addi x0,x0,0 +80007300: 00032303 lw x6,0(x6) +80007304: 00000013 addi x0,x0,0 +80007308: 00000013 addi x0,x0,0 +8000730c: 00000013 addi x0,x0,0 +80007310: 00000013 addi x0,x0,0 +80007314: 00000013 addi x0,x0,0 +80007318: 00000013 addi x0,x0,0 +8000731c: 00000013 addi x0,x0,0 +80007320: 00013397 auipc x7,0x13 +80007324: 0d838393 addi x7,x7,216 # 8001a3f8 +80007328: 00000013 addi x0,x0,0 +8000732c: 00000013 addi x0,x0,0 +80007330: 00000013 addi x0,x0,0 +80007334: 00000013 addi x0,x0,0 +80007338: 00000013 addi x0,x0,0 +8000733c: 00000013 addi x0,x0,0 +80007340: 40730333 sub x6,x6,x7 +80007344: 00000013 addi x0,x0,0 +80007348: 00000013 addi x0,x0,0 +8000734c: 00000013 addi x0,x0,0 +80007350: 00000013 addi x0,x0,0 +80007354: 00000013 addi x0,x0,0 +80007358: 00000013 addi x0,x0,0 +8000735c: 00000013 addi x0,x0,0 +80007360: 00013417 auipc x8,0x13 +80007364: 09040413 addi x8,x8,144 # 8001a3f0 +80007368: 00000013 addi x0,x0,0 +8000736c: 00000013 addi x0,x0,0 +80007370: 00000013 addi x0,x0,0 +80007374: 00000013 addi x0,x0,0 +80007378: 00000013 addi x0,x0,0 +8000737c: 00000013 addi x0,x0,0 +80007380: 00042203 lw x4,0(x8) +80007384: 00620863 beq x4,x6,80007394 +80007388: 6a1003ef jal x7,80008228 +8000738c: 800072d0 .word 0x800072d0 +80007390: 800184af .word 0x800184af + +80007394 : +80007394: bad0e4b7 lui x9,0xbad0e +80007398: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3ace2ead> +8000739c: 00e49a63 bne x9,x14,800073b0 +800073a0: 689003ef jal x7,80008228 +800073a4: 80007464 .word 0x80007464 +800073a8: 8001831d .word 0x8001831d +800073ac: 00000341 .word 0x00000341 + +800073b0 : +800073b0: 00000013 addi x0,x0,0 +800073b4: 00000013 addi x0,x0,0 +800073b8: 00000013 addi x0,x0,0 +800073bc: 00000013 addi x0,x0,0 +800073c0: 00011517 auipc x10,0x11 +800073c4: ec450513 addi x10,x10,-316 # 80018284 +800073c8: 00000013 addi x0,x0,0 +800073cc: 00000013 addi x0,x0,0 +800073d0: 00000013 addi x0,x0,0 +800073d4: 00000013 addi x0,x0,0 +800073d8: 00000013 addi x0,x0,0 +800073dc: 00000013 addi x0,x0,0 +800073e0: 00023097 auipc x1,0x23 +800073e4: 184080e7 jalr x1,388(x1) # 8002a564 +800073e8: 00023097 auipc x1,0x23 +800073ec: 1bc080e7 jalr x1,444(x1) # 8002a5a4 + +800073f0 : +800073f0: 00000013 addi x0,x0,0 +800073f4: 00000013 addi x0,x0,0 +800073f8: 00000013 addi x0,x0,0 +800073fc: 00000013 addi x0,x0,0 +80007400: 00011517 auipc x10,0x11 +80007404: ec050513 addi x10,x10,-320 # 800182c0 +80007408: 00000013 addi x0,x0,0 +8000740c: 00000013 addi x0,x0,0 +80007410: 00000013 addi x0,x0,0 +80007414: 00000013 addi x0,x0,0 +80007418: 00000013 addi x0,x0,0 +8000741c: 00000013 addi x0,x0,0 +80007420: 00023097 auipc x1,0x23 +80007424: 144080e7 jalr x1,324(x1) # 8002a564 +80007428: 00023097 auipc x1,0x23 +8000742c: 19c080e7 jalr x1,412(x1) # 8002a5c4 + +80007430 : +80007430: 00000013 addi x0,x0,0 +80007434: 00000013 addi x0,x0,0 +80007438: 00000013 addi x0,x0,0 +8000743c: 00000013 addi x0,x0,0 +80007440: 00000717 auipc x14,0x0 +80007444: ff070713 addi x14,x14,-16 # 80007430 +80007448: 00000013 addi x0,x0,0 +8000744c: 00000013 addi x0,x0,0 +80007450: 00000013 addi x0,x0,0 +80007454: 00000013 addi x0,x0,0 +80007458: 00000013 addi x0,x0,0 +8000745c: 00000013 addi x0,x0,0 +80007460: cd5ff06f jal x0,80007134 + +80007464 : +80007464: bad0e737 lui x14,0xbad0e +80007468: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3ace2ead> +8000746c: cc9ff06f jal x0,80007134 +80007470: 00000013 addi x0,x0,0 +80007474: 00000013 addi x0,x0,0 +80007478: 00000013 addi x0,x0,0 +8000747c: 00000013 addi x0,x0,0 + +80007480 : +80007480: 0800006f jal x0,80007500 +80007484: 0880006f jal x0,8000750c +80007488: 0900006f jal x0,80007518 +8000748c: 0980006f jal x0,80007524 +80007490: 0a00006f jal x0,80007530 +80007494: 0a80006f jal x0,8000753c +80007498: 0b00006f jal x0,80007548 +8000749c: 0b80006f jal x0,80007554 +800074a0: 0c00006f jal x0,80007560 +800074a4: 0c80006f jal x0,8000756c +800074a8: 0d00006f jal x0,80007578 +800074ac: 0d80006f jal x0,80007584 +800074b0: 0e00006f jal x0,80007590 +800074b4: 0e80006f jal x0,8000759c +800074b8: 0f00006f jal x0,800075a8 +800074bc: 0f80006f jal x0,800075b4 +800074c0: 1000006f jal x0,800075c0 +800074c4: 1080006f jal x0,800075cc +800074c8: 1100006f jal x0,800075d8 +800074cc: 1180006f jal x0,800075e4 +800074d0: 1200006f jal x0,800075f0 +800074d4: 1280006f jal x0,800075fc +800074d8: 1300006f jal x0,80007608 +800074dc: 1380006f jal x0,80007614 +800074e0: 1400006f jal x0,80007620 +800074e4: 13c0006f jal x0,80007620 +800074e8: 1380006f jal x0,80007620 +800074ec: 1340006f jal x0,80007620 +800074f0: 1300006f jal x0,80007620 +800074f4: 12c0006f jal x0,80007620 +800074f8: 1280006f jal x0,80007620 +800074fc: 1240006f jal x0,80007620 + +80007500 : +80007500: 34011173 csrrw x2,mscratch,x2 +80007504: 26f12823 sw x15,624(x2) +80007508: 13c007ef jal x15,80007644 +8000750c: 34011173 csrrw x2,mscratch,x2 +80007510: 26f12823 sw x15,624(x2) +80007514: 130007ef jal x15,80007644 +80007518: 34011173 csrrw x2,mscratch,x2 +8000751c: 26f12823 sw x15,624(x2) +80007520: 124007ef jal x15,80007644 +80007524: 34011173 csrrw x2,mscratch,x2 +80007528: 26f12823 sw x15,624(x2) +8000752c: 118007ef jal x15,80007644 +80007530: 34011173 csrrw x2,mscratch,x2 +80007534: 26f12823 sw x15,624(x2) +80007538: 10c007ef jal x15,80007644 +8000753c: 34011173 csrrw x2,mscratch,x2 +80007540: 26f12823 sw x15,624(x2) +80007544: 100007ef jal x15,80007644 +80007548: 34011173 csrrw x2,mscratch,x2 +8000754c: 26f12823 sw x15,624(x2) +80007550: 0f4007ef jal x15,80007644 +80007554: 34011173 csrrw x2,mscratch,x2 +80007558: 26f12823 sw x15,624(x2) +8000755c: 0e8007ef jal x15,80007644 +80007560: 34011173 csrrw x2,mscratch,x2 +80007564: 26f12823 sw x15,624(x2) +80007568: 0dc007ef jal x15,80007644 +8000756c: 34011173 csrrw x2,mscratch,x2 +80007570: 26f12823 sw x15,624(x2) +80007574: 0d0007ef jal x15,80007644 +80007578: 34011173 csrrw x2,mscratch,x2 +8000757c: 26f12823 sw x15,624(x2) +80007580: 0c4007ef jal x15,80007644 +80007584: 34011173 csrrw x2,mscratch,x2 +80007588: 26f12823 sw x15,624(x2) +8000758c: 0b8007ef jal x15,80007644 +80007590: 34011173 csrrw x2,mscratch,x2 +80007594: 26f12823 sw x15,624(x2) +80007598: 0ac007ef jal x15,80007644 +8000759c: 34011173 csrrw x2,mscratch,x2 +800075a0: 26f12823 sw x15,624(x2) +800075a4: 0a0007ef jal x15,80007644 +800075a8: 34011173 csrrw x2,mscratch,x2 +800075ac: 26f12823 sw x15,624(x2) +800075b0: 094007ef jal x15,80007644 +800075b4: 34011173 csrrw x2,mscratch,x2 +800075b8: 26f12823 sw x15,624(x2) +800075bc: 088007ef jal x15,80007644 +800075c0: 34011173 csrrw x2,mscratch,x2 +800075c4: 26f12823 sw x15,624(x2) +800075c8: 07c007ef jal x15,80007644 +800075cc: 34011173 csrrw x2,mscratch,x2 +800075d0: 26f12823 sw x15,624(x2) +800075d4: 070007ef jal x15,80007644 +800075d8: 34011173 csrrw x2,mscratch,x2 +800075dc: 26f12823 sw x15,624(x2) +800075e0: 064007ef jal x15,80007644 +800075e4: 34011173 csrrw x2,mscratch,x2 +800075e8: 26f12823 sw x15,624(x2) +800075ec: 058007ef jal x15,80007644 +800075f0: 34011173 csrrw x2,mscratch,x2 +800075f4: 26f12823 sw x15,624(x2) +800075f8: 04c007ef jal x15,80007644 +800075fc: 34011173 csrrw x2,mscratch,x2 +80007600: 26f12823 sw x15,624(x2) +80007604: 040007ef jal x15,80007644 +80007608: 34011173 csrrw x2,mscratch,x2 +8000760c: 26f12823 sw x15,624(x2) +80007610: 034007ef jal x15,80007644 +80007614: 34011173 csrrw x2,mscratch,x2 +80007618: 26f12823 sw x15,624(x2) +8000761c: 028007ef jal x15,80007644 + +80007620 : +80007620: 00000317 auipc x6,0x0 +80007624: b6c30313 addi x6,x6,-1172 # 8000718c +80007628: 00000013 addi x0,x0,0 +8000762c: 00000013 addi x0,x0,0 +80007630: 00000013 addi x0,x0,0 +80007634: 00000013 addi x0,x0,0 +80007638: 00000013 addi x0,x0,0 +8000763c: 00000013 addi x0,x0,0 +80007640: 00030067 jalr x0,0(x6) + +80007644 : +80007644: 26e12623 sw x14,620(x2) +80007648: 34011773 csrrw x14,mscratch,x2 +8000764c: 26e12a23 sw x14,628(x2) +80007650: 23012703 lw x14,560(x2) +80007654: 00070067 jalr x0,0(x14) + +80007658 : +80007658: 26912423 sw x9,616(x2) +8000765c: 26812223 sw x8,612(x2) +80007660: 26712023 sw x7,608(x2) +80007664: 24612e23 sw x6,604(x2) +80007668: 00000013 addi x0,x0,0 +8000766c: 00000013 addi x0,x0,0 +80007670: 00000013 addi x0,x0,0 +80007674: 00000013 addi x0,x0,0 +80007678: 00000013 addi x0,x0,0 +8000767c: 00000013 addi x0,x0,0 +80007680: 00005317 auipc x6,0x5 +80007684: a8830313 addi x6,x6,-1400 # 8000c108 +80007688: 00000013 addi x0,x0,0 +8000768c: 00000013 addi x0,x0,0 +80007690: 00000013 addi x0,x0,0 +80007694: 00000013 addi x0,x0,0 +80007698: 00000013 addi x0,x0,0 +8000769c: 00000013 addi x0,x0,0 +800076a0: 00032383 lw x7,0(x6) +800076a4: 00138393 addi x7,x7,1 +800076a8: 00732023 sw x7,0(x6) +800076ac: 34202773 csrrs x14,mcause,x0 + +800076b0 : +800076b0: 800014b7 lui x9,0x80001 +800076b4: fff48493 addi x9,x9,-1 # 80000fff +800076b8: 00e4f4b3 and x9,x9,x14 + +800076bc : +800076bc: ffe48413 addi x8,x9,-2 +800076c0: 00041663 bne x8,x0,800076cc + +800076c4 : +800076c4: 280506e3 beq x10,x0,80008150 +800076c8: 58c0006f jal x0,80007c54 + +800076cc : +800076cc: ff848413 addi x8,x9,-8 +800076d0: 00245413 srli x8,x8,0x2 +800076d4: 58041063 bne x8,x0,80007c54 + +800076d8 : +800076d8: 26050ce3 beq x10,x0,80008150 + +800076dc : +800076dc: fff50493 addi x9,x10,-1 +800076e0: 00500393 addi x7,x0,5 +800076e4: 0274e063 bltu x9,x7,80007704 +800076e8: 07300393 addi x7,x0,115 +800076ec: 00750463 beq x10,x7,800076f4 +800076f0: 0800006f jal x0,80007770 + +800076f4 : +800076f4: 34102573 csrrs x10,mepc,x0 +800076f8: 00450413 addi x8,x10,4 +800076fc: 34141073 csrrw x0,mepc,x8 +80007700: 7c00006f jal x0,80007ec0 + +80007704 : +80007704: 341024f3 csrrs x9,mepc,x0 +80007708: 00448493 addi x9,x9,4 +8000770c: 34149073 csrrw x0,mepc,x9 +80007710: 00100393 addi x7,x0,1 +80007714: 00750e63 beq x10,x7,80007730 +80007718: 00200393 addi x7,x0,2 +8000771c: 02750263 beq x10,x7,80007740 +80007720: 00300393 addi x7,x0,3 +80007724: 02750c63 beq x10,x7,8000775c +80007728: fff00513 addi x10,x0,-1 +8000772c: 7940006f jal x0,80007ec0 + +80007730 : +80007730: 000024b7 lui x9,0x2 +80007734: 80048493 addi x9,x9,-2048 # 1800 +80007738: 3004a073 csrrs x0,mstatus,x9 +8000773c: 7840006f jal x0,80007ec0 + +80007740 : +80007740: 000024b7 lui x9,0x2 +80007744: 80048493 addi x9,x9,-2048 # 1800 +80007748: 3004b073 csrrc x0,mstatus,x9 +8000774c: 000014b7 lui x9,0x1 +80007750: 80048493 addi x9,x9,-2048 # 800 +80007754: 3004a073 csrrs x0,mstatus,x9 +80007758: 7680006f jal x0,80007ec0 + +8000775c : +8000775c: 000024b7 lui x9,0x2 +80007760: 80048493 addi x9,x9,-2048 # 1800 +80007764: 3004b073 csrrc x0,mstatus,x9 +80007768: 7580006f jal x0,80007ec0 + +8000776c : +8000776c: 00000013 addi x0,x0,0 + +80007770 : +80007770: 00000013 addi x0,x0,0 +80007774: 00000013 addi x0,x0,0 +80007778: 00000013 addi x0,x0,0 +8000777c: 00000013 addi x0,x0,0 +80007780: 00000397 auipc x7,0x0 +80007784: 17038393 addi x7,x7,368 # 800078f0 +80007788: 00000013 addi x0,x0,0 +8000778c: 00000013 addi x0,x0,0 +80007790: 00000013 addi x0,x0,0 +80007794: 00000013 addi x0,x0,0 +80007798: 00000013 addi x0,x0,0 +8000779c: 00000013 addi x0,x0,0 + +800077a0 : +800077a0: 0003a403 lw x8,0(x7) +800077a4: 00a40863 beq x8,x10,800077b4 +800077a8: 04040863 beq x8,x0,800077f8 +800077ac: 00838393 addi x7,x7,8 +800077b0: ff1ff06f jal x0,800077a0 + +800077b4 : +800077b4: 00008493 addi x9,x1,0 +800077b8: 00000013 addi x0,x0,0 +800077bc: 00000013 addi x0,x0,0 +800077c0: 00000097 auipc x1,0x0 +800077c4: 02408093 addi x1,x1,36 # 800077e4 +800077c8: 00000013 addi x0,x0,0 +800077cc: 00000013 addi x0,x0,0 +800077d0: 00000013 addi x0,x0,0 +800077d4: 00000013 addi x0,x0,0 +800077d8: 00000013 addi x0,x0,0 +800077dc: 00000013 addi x0,x0,0 +800077e0: 00038067 jalr x0,0(x7) + +800077e4 : +800077e4: 00048093 addi x1,x9,0 +800077e8: 34102473 csrrs x8,mepc,x0 +800077ec: 00440413 addi x8,x8,4 +800077f0: 34141073 csrrw x0,mepc,x8 +800077f4: 6cc0006f jal x0,80007ec0 + +800077f8 : +800077f8: 00050493 addi x9,x10,0 +800077fc: 00000013 addi x0,x0,0 +80007800: 00012517 auipc x10,0x12 +80007804: 13d50513 addi x10,x10,317 # 8001993d +80007808: 00000013 addi x0,x0,0 +8000780c: 00000013 addi x0,x0,0 +80007810: 00000013 addi x0,x0,0 +80007814: 00000013 addi x0,x0,0 +80007818: 00000013 addi x0,x0,0 +8000781c: 00000013 addi x0,x0,0 +80007820: 00023097 auipc x1,0x23 +80007824: d44080e7 jalr x1,-700(x1) # 8002a564 +80007828: 00048513 addi x10,x9,0 +8000782c: 02000593 addi x11,x0,32 +80007830: 4a8020ef jal x1,80009cd8 +80007834: 00000013 addi x0,x0,0 +80007838: 00000013 addi x0,x0,0 +8000783c: 00000013 addi x0,x0,0 +80007840: 00010517 auipc x10,0x10 +80007844: 56850513 addi x10,x10,1384 # 80017da8 +80007848: 00000013 addi x0,x0,0 +8000784c: 00000013 addi x0,x0,0 +80007850: 00000013 addi x0,x0,0 +80007854: 00000013 addi x0,x0,0 +80007858: 00000013 addi x0,x0,0 +8000785c: 00000013 addi x0,x0,0 +80007860: 00023097 auipc x1,0x23 +80007864: d04080e7 jalr x1,-764(x1) # 8002a564 +80007868: 00000013 addi x0,x0,0 +8000786c: 00000013 addi x0,x0,0 +80007870: 00000013 addi x0,x0,0 +80007874: 00000013 addi x0,x0,0 +80007878: 00000013 addi x0,x0,0 +8000787c: 00000013 addi x0,x0,0 +80007880: 00011517 auipc x10,0x11 +80007884: b4450513 addi x10,x10,-1212 # 800183c4 +80007888: 00000013 addi x0,x0,0 +8000788c: 00000013 addi x0,x0,0 +80007890: 00000013 addi x0,x0,0 +80007894: 00000013 addi x0,x0,0 +80007898: 00000013 addi x0,x0,0 +8000789c: 00000013 addi x0,x0,0 +800078a0: 00023097 auipc x1,0x23 +800078a4: cc4080e7 jalr x1,-828(x1) # 8002a564 +800078a8: 00000013 addi x0,x0,0 +800078ac: 00000013 addi x0,x0,0 +800078b0: 00000013 addi x0,x0,0 +800078b4: 00000013 addi x0,x0,0 +800078b8: 00000013 addi x0,x0,0 +800078bc: 00000013 addi x0,x0,0 +800078c0: 00011517 auipc x10,0x11 +800078c4: a0050513 addi x10,x10,-1536 # 800182c0 +800078c8: 00000013 addi x0,x0,0 +800078cc: 00000013 addi x0,x0,0 +800078d0: 00000013 addi x0,x0,0 +800078d4: 00000013 addi x0,x0,0 +800078d8: 00000013 addi x0,x0,0 +800078dc: 00000013 addi x0,x0,0 +800078e0: 00023097 auipc x1,0x23 +800078e4: c84080e7 jalr x1,-892(x1) # 8002a564 +800078e8: 00023097 auipc x1,0x23 +800078ec: cdc080e7 jalr x1,-804(x1) # 8002a5c4 + +800078f0 : +800078f0: 30002573 .word 0x30002573 +800078f4: 00008067 jalr x0,0(x1) +800078f8: 30059073 .word 0x30059073 +800078fc: 00008067 jalr x0,0(x1) +80007900: 3005a073 .word 0x3005a073 +80007904: 00008067 jalr x0,0(x1) +80007908: 3005b073 .word 0x3005b073 +8000790c: 00008067 jalr x0,0(x1) +80007910: 30402573 .word 0x30402573 +80007914: 00008067 jalr x0,0(x1) +80007918: 30459073 .word 0x30459073 +8000791c: 00008067 jalr x0,0(x1) +80007920: 3045a073 .word 0x3045a073 +80007924: 00008067 jalr x0,0(x1) +80007928: 3045b073 .word 0x3045b073 +8000792c: 00008067 jalr x0,0(x1) +80007930: 30602573 .word 0x30602573 +80007934: 00008067 jalr x0,0(x1) +80007938: 30659073 .word 0x30659073 +8000793c: 00008067 jalr x0,0(x1) +80007940: 3065a073 .word 0x3065a073 +80007944: 00008067 jalr x0,0(x1) +80007948: 3065b073 .word 0x3065b073 +8000794c: 00008067 jalr x0,0(x1) +80007950: 30a02573 .word 0x30a02573 +80007954: 00008067 jalr x0,0(x1) +80007958: 30a59073 .word 0x30a59073 +8000795c: 00008067 jalr x0,0(x1) +80007960: 30a5a073 .word 0x30a5a073 +80007964: 00008067 jalr x0,0(x1) +80007968: 30a5b073 .word 0x30a5b073 +8000796c: 00008067 jalr x0,0(x1) +80007970: 34402573 .word 0x34402573 +80007974: 00008067 jalr x0,0(x1) +80007978: 34459073 .word 0x34459073 +8000797c: 00008067 jalr x0,0(x1) +80007980: 3445a073 .word 0x3445a073 +80007984: 00008067 jalr x0,0(x1) +80007988: 3445b073 .word 0x3445b073 +8000798c: 00008067 jalr x0,0(x1) +80007990: 74702573 .word 0x74702573 +80007994: 00008067 jalr x0,0(x1) +80007998: 74759073 .word 0x74759073 +8000799c: 00008067 jalr x0,0(x1) +800079a0: 7475a073 .word 0x7475a073 +800079a4: 00008067 jalr x0,0(x1) +800079a8: 7475b073 .word 0x7475b073 +800079ac: 00008067 jalr x0,0(x1) +800079b0: 32002573 .word 0x32002573 +800079b4: 00008067 jalr x0,0(x1) +800079b8: 32059073 .word 0x32059073 +800079bc: 00008067 jalr x0,0(x1) +800079c0: 3205a073 .word 0x3205a073 +800079c4: 00008067 jalr x0,0(x1) +800079c8: 3205b073 .word 0x3205b073 +800079cc: 00008067 jalr x0,0(x1) +800079d0: b0002573 .word 0xb0002573 +800079d4: 00008067 jalr x0,0(x1) +800079d8: b0059073 .word 0xb0059073 +800079dc: 00008067 jalr x0,0(x1) +800079e0: b005a073 .word 0xb005a073 +800079e4: 00008067 jalr x0,0(x1) +800079e8: b005b073 .word 0xb005b073 +800079ec: 00008067 jalr x0,0(x1) +800079f0: b0202573 .word 0xb0202573 +800079f4: 00008067 jalr x0,0(x1) +800079f8: b0259073 .word 0xb0259073 +800079fc: 00008067 jalr x0,0(x1) +80007a00: b025a073 .word 0xb025a073 +80007a04: 00008067 jalr x0,0(x1) +80007a08: b025b073 .word 0xb025b073 +80007a0c: 00008067 jalr x0,0(x1) +80007a10: 10002573 .word 0x10002573 +80007a14: 00008067 jalr x0,0(x1) +80007a18: 10059073 .word 0x10059073 +80007a1c: 00008067 jalr x0,0(x1) +80007a20: 1005a073 .word 0x1005a073 +80007a24: 00008067 jalr x0,0(x1) +80007a28: 1005b073 .word 0x1005b073 +80007a2c: 00008067 jalr x0,0(x1) +80007a30: 10402573 .word 0x10402573 +80007a34: 00008067 jalr x0,0(x1) +80007a38: 10459073 .word 0x10459073 +80007a3c: 00008067 jalr x0,0(x1) +80007a40: 1045a073 .word 0x1045a073 +80007a44: 00008067 jalr x0,0(x1) +80007a48: 1045b073 .word 0x1045b073 +80007a4c: 00008067 jalr x0,0(x1) +80007a50: 10602573 .word 0x10602573 +80007a54: 00008067 jalr x0,0(x1) +80007a58: 10659073 .word 0x10659073 +80007a5c: 00008067 jalr x0,0(x1) +80007a60: 1065a073 .word 0x1065a073 +80007a64: 00008067 jalr x0,0(x1) +80007a68: 1065b073 .word 0x1065b073 +80007a6c: 00008067 jalr x0,0(x1) +80007a70: 10a02573 .word 0x10a02573 +80007a74: 00008067 jalr x0,0(x1) +80007a78: 10a59073 .word 0x10a59073 +80007a7c: 00008067 jalr x0,0(x1) +80007a80: 10a5a073 .word 0x10a5a073 +80007a84: 00008067 jalr x0,0(x1) +80007a88: 10a5b073 .word 0x10a5b073 +80007a8c: 00008067 jalr x0,0(x1) +80007a90: 14402573 .word 0x14402573 +80007a94: 00008067 jalr x0,0(x1) +80007a98: 14459073 .word 0x14459073 +80007a9c: 00008067 jalr x0,0(x1) +80007aa0: 1445a073 .word 0x1445a073 +80007aa4: 00008067 jalr x0,0(x1) +80007aa8: 1445b073 .word 0x1445b073 +80007aac: 00008067 jalr x0,0(x1) +80007ab0: 14d02573 .word 0x14d02573 +80007ab4: 00008067 jalr x0,0(x1) +80007ab8: 14d59073 .word 0x14d59073 +80007abc: 00008067 jalr x0,0(x1) +80007ac0: 14d5a073 .word 0x14d5a073 +80007ac4: 00008067 jalr x0,0(x1) +80007ac8: 14d5b073 .word 0x14d5b073 +80007acc: 00008067 jalr x0,0(x1) +80007ad0: 18002573 .word 0x18002573 +80007ad4: 00008067 jalr x0,0(x1) +80007ad8: 18059073 .word 0x18059073 +80007adc: 00008067 jalr x0,0(x1) +80007ae0: 1805a073 .word 0x1805a073 +80007ae4: 00008067 jalr x0,0(x1) +80007ae8: 1805b073 .word 0x1805b073 +80007aec: 00008067 jalr x0,0(x1) +80007af0: 7a002573 .word 0x7a002573 +80007af4: 00008067 jalr x0,0(x1) +80007af8: 7a059073 .word 0x7a059073 +80007afc: 00008067 jalr x0,0(x1) +80007b00: 7a05a073 .word 0x7a05a073 +80007b04: 00008067 jalr x0,0(x1) +80007b08: 7a05b073 .word 0x7a05b073 +80007b0c: 00008067 jalr x0,0(x1) +80007b10: 7a102573 .word 0x7a102573 +80007b14: 00008067 jalr x0,0(x1) +80007b18: 7a159073 .word 0x7a159073 +80007b1c: 00008067 jalr x0,0(x1) +80007b20: 7a15a073 .word 0x7a15a073 +80007b24: 00008067 jalr x0,0(x1) +80007b28: 7a15b073 .word 0x7a15b073 +80007b2c: 00008067 jalr x0,0(x1) +80007b30: 7a202573 .word 0x7a202573 +80007b34: 00008067 jalr x0,0(x1) +80007b38: 7a259073 .word 0x7a259073 +80007b3c: 00008067 jalr x0,0(x1) +80007b40: 7a25a073 .word 0x7a25a073 +80007b44: 00008067 jalr x0,0(x1) +80007b48: 7a25b073 .word 0x7a25b073 +80007b4c: 00008067 jalr x0,0(x1) +80007b50: 7a302573 .word 0x7a302573 +80007b54: 00008067 jalr x0,0(x1) +80007b58: 7a359073 .word 0x7a359073 +80007b5c: 00008067 jalr x0,0(x1) +80007b60: 7a35a073 .word 0x7a35a073 +80007b64: 00008067 jalr x0,0(x1) +80007b68: 7a35b073 .word 0x7a35b073 +80007b6c: 00008067 jalr x0,0(x1) +80007b70: 7a402573 .word 0x7a402573 +80007b74: 00008067 jalr x0,0(x1) +80007b78: 7a459073 .word 0x7a459073 +80007b7c: 00008067 jalr x0,0(x1) +80007b80: 7a45a073 .word 0x7a45a073 +80007b84: 00008067 jalr x0,0(x1) +80007b88: 7a45b073 .word 0x7a45b073 +80007b8c: 00008067 jalr x0,0(x1) +80007b90: 7a502573 .word 0x7a502573 +80007b94: 00008067 jalr x0,0(x1) +80007b98: 7a559073 .word 0x7a559073 +80007b9c: 00008067 jalr x0,0(x1) +80007ba0: 7a55a073 .word 0x7a55a073 +80007ba4: 00008067 jalr x0,0(x1) +80007ba8: 7a55b073 .word 0x7a55b073 +80007bac: 00008067 jalr x0,0(x1) +80007bb0: 7a802573 .word 0x7a802573 +80007bb4: 00008067 jalr x0,0(x1) +80007bb8: 7a859073 .word 0x7a859073 +80007bbc: 00008067 jalr x0,0(x1) +80007bc0: 7a85a073 .word 0x7a85a073 +80007bc4: 00008067 jalr x0,0(x1) +80007bc8: 7a85b073 .word 0x7a85b073 +80007bcc: 00008067 jalr x0,0(x1) +80007bd0: 7aa02573 .word 0x7aa02573 +80007bd4: 00008067 jalr x0,0(x1) +80007bd8: 7aa59073 .word 0x7aa59073 +80007bdc: 00008067 jalr x0,0(x1) +80007be0: 7aa5a073 .word 0x7aa5a073 +80007be4: 00008067 jalr x0,0(x1) +80007be8: 7aa5b073 .word 0x7aa5b073 +80007bec: 00008067 jalr x0,0(x1) +80007bf0: 5a802573 .word 0x5a802573 +80007bf4: 00008067 jalr x0,0(x1) +80007bf8: 5a859073 .word 0x5a859073 +80007bfc: 00008067 jalr x0,0(x1) +80007c00: 5a85a073 .word 0x5a85a073 +80007c04: 00008067 jalr x0,0(x1) +80007c08: 5a85b073 .word 0x5a85b073 +80007c0c: 00008067 jalr x0,0(x1) +80007c10: 6a802573 .word 0x6a802573 +80007c14: 00008067 jalr x0,0(x1) +80007c18: 6a859073 .word 0x6a859073 +80007c1c: 00008067 jalr x0,0(x1) +80007c20: 6a85a073 .word 0x6a85a073 +80007c24: 00008067 jalr x0,0(x1) +80007c28: 6a85b073 .word 0x6a85b073 +80007c2c: 00008067 jalr x0,0(x1) +80007c30: 0005a503 lw x10,0(x11) +80007c34: 00008067 jalr x0,0(x1) +80007c38: 0045a503 lw x10,4(x11) +80007c3c: 00008067 jalr x0,0(x1) +80007c40: 00c5a023 sw x12,0(x11) +80007c44: 00008067 jalr x0,0(x1) +80007c48: 00c5a223 sw x12,4(x11) +80007c4c: 00008067 jalr x0,0(x1) +80007c50: 00000000 .word 0x00000000 + +80007c54 : +80007c54: 01000393 addi x7,x0,16 +80007c58: 00075c63 bge x14,x0,80007c70 + +80007c5c : +80007c5c: 00171413 slli x8,x14,0x1 +80007c60: ff240413 addi x8,x8,-14 +80007c64: 00045663 bge x8,x0,80007c70 +80007c68: 00c00393 addi x7,x0,12 +80007c6c: 0040006f jal x0,80007c70 + +80007c70 : +80007c70: d6810113 addi x2,x2,-664 +80007c74: 4b012303 lw x6,1200(x2) +80007c78: 007304b3 add x9,x6,x7 +80007c7c: 4a912823 sw x9,1200(x2) +80007c80: 49012403 lw x8,1168(x2) +80007c84: 40830333 sub x6,x6,x8 +80007c88: 29810113 addi x2,x2,664 +80007c8c: 1f812403 lw x8,504(x2) +80007c90: 00830333 add x6,x6,x8 +80007c94: 34102473 csrrs x8,mepc,x0 +80007c98: 00000013 addi x0,x0,0 +80007c9c: 00000013 addi x0,x0,0 +80007ca0: 00010497 auipc x9,0x10 +80007ca4: 0e848493 addi x9,x9,232 # 80017d88 +80007ca8: 00000013 addi x0,x0,0 +80007cac: 00000013 addi x0,x0,0 +80007cb0: 00000013 addi x0,x0,0 +80007cb4: 00000013 addi x0,x0,0 +80007cb8: 00000013 addi x0,x0,0 +80007cbc: 00000013 addi x0,x0,0 +80007cc0: 0084a023 sw x8,0(x9) +80007cc4: 00e4a423 sw x14,8(x9) +80007cc8: 34302473 csrrs x8,mtval,x0 +80007ccc: 0084a823 sw x8,16(x9) +80007cd0: 30002473 csrrs x8,mstatus,x0 +80007cd4: 0084ac23 sw x8,24(x9) +80007cd8: 00000013 addi x0,x0,0 +80007cdc: 00000013 addi x0,x0,0 +80007ce0: 00021417 auipc x8,0x21 +80007ce4: 17c40413 addi x8,x8,380 # 80028e5c +80007ce8: 00000013 addi x0,x0,0 +80007cec: 00000013 addi x0,x0,0 +80007cf0: 00000013 addi x0,x0,0 +80007cf4: 00000013 addi x0,x0,0 +80007cf8: 00000013 addi x0,x0,0 +80007cfc: 00000013 addi x0,x0,0 +80007d00: 007304b3 add x9,x6,x7 +80007d04: f2946663 bltu x8,x9,80007430 + +80007d08 : +80007d08: 24012403 lw x8,576(x2) +80007d0c: 408787b3 sub x15,x15,x8 +80007d10: 00179493 slli x9,x15,0x1 +80007d14: 009787b3 add x15,x15,x9 +80007d18: 0057d793 srli x15,x15,0x5 +80007d1c: 00679793 slli x15,x15,0x6 +80007d20: 0077e7b3 or x15,x15,x7 +80007d24: 00378793 addi x15,x15,3 +80007d28: 02075a63 bge x14,x0,80007d5c +80007d2c: 00f00413 addi x8,x0,15 +80007d30: 00877433 and x8,x14,x8 +80007d34: 304024f3 csrrs x9,mie,x0 +80007d38: 0084d4b3 srl x9,x9,x8 +80007d3c: 0014f493 andi x9,x9,1 +80007d40: 00b49493 slli x9,x9,0xb +80007d44: 0097e7b3 or x15,x15,x9 +80007d48: 344024f3 csrrs x9,mip,x0 +80007d4c: 0084d4b3 srl x9,x9,x8 +80007d50: 0014f493 andi x9,x9,1 +80007d54: 00c49493 slli x9,x9,0xc +80007d58: 0097e7b3 or x15,x15,x9 +80007d5c: 300023f3 csrrs x7,mstatus,x0 +80007d60: 00f39393 slli x7,x7,0xf +80007d64: 0023d393 srli x7,x7,0x2 +80007d68: 0021a437 lui x8,0x21a +80007d6c: fe540413 addi x8,x8,-27 # 219fe5 +80007d70: fff44413 xori x8,x8,-1 +80007d74: 0083f433 and x8,x7,x8 +80007d78: 0087e433 or x8,x15,x8 +80007d7c: 310024f3 csrrs x9,0x310,x0 +80007d80: 1c04f493 andi x9,x9,448 +80007d84: 00849493 slli x9,x9,0x8 +80007d88: 00946433 or x8,x8,x9 +80007d8c: 00032483 lw x9,0(x6) +80007d90: 00848e63 beq x9,x8,80007dac +80007d94: 00040313 addi x6,x8,0 +80007d98: 00048213 addi x4,x9,0 +80007d9c: 48c003ef jal x7,80008228 +80007da0: 80007d08 .word 0x80007d08 +80007da4: 800184c6 .word 0x800184c6 +80007da8: 00000341 .word 0x00000341 + +80007dac : +80007dac: 00070413 addi x8,x14,0 +80007db0: 00432483 lw x9,4(x6) +80007db4: 00848e63 beq x9,x8,80007dd0 +80007db8: 00040313 addi x6,x8,0 +80007dbc: 00048213 addi x4,x9,0 +80007dc0: 468003ef jal x7,80008228 +80007dc4: 80007dac .word 0x80007dac +80007dc8: 800185c8 .word 0x800185c8 +80007dcc: 00000341 .word 0x00000341 +80007dd0: 10074863 blt x14,x0,80007ee0 + +80007dd4 : +80007dd4: 34102473 csrrs x8,mepc,x0 +80007dd8: 00010493 addi x9,x2,0 +80007ddc: 0040006f jal x0,80007de0 + +80007de0 : +80007de0: 08000393 addi x7,x0,128 +80007de4: 04740863 beq x8,x7,80007e34 +80007de8: 00238393 addi x7,x7,2 +80007dec: 04740463 beq x8,x7,80007e34 +80007df0: 04040263 beq x8,x0,80007e34 +80007df4: 2084a383 lw x7,520(x9) +80007df8: 2104a783 lw x15,528(x9) +80007dfc: 007787b3 add x15,x15,x7 +80007e00: 00f47463 bgeu x8,x15,80007e08 +80007e04: 02747663 bgeu x8,x7,80007e30 + +80007e08 : +80007e08: 1d84a383 lw x7,472(x9) +80007e0c: 1e04a783 lw x15,480(x9) +80007e10: 007787b3 add x15,x15,x7 +80007e14: 00f47463 bgeu x8,x15,80007e1c +80007e18: 00747c63 bgeu x8,x7,80007e30 + +80007e1c : +80007e1c: 1e84a383 lw x7,488(x9) +80007e20: 1f04a783 lw x15,496(x9) +80007e24: 007787b3 add x15,x15,x7 +80007e28: e2f47e63 bgeu x8,x15,80007464 +80007e2c: e2746c63 bltu x8,x7,80007464 + +80007e30 : +80007e30: 40740433 sub x8,x8,x7 + +80007e34 : +80007e34: 00832483 lw x9,8(x6) +80007e38: 00848e63 beq x9,x8,80007e54 +80007e3c: 00040313 addi x6,x8,0 +80007e40: 00048213 addi x4,x9,0 +80007e44: 3e4003ef jal x7,80008228 +80007e48: 80007e34 .word 0x80007e34 +80007e4c: 800186c3 .word 0x800186c3 +80007e50: 00000341 .word 0x00000341 + +80007e54 : +80007e54: 34102473 csrrs x8,mepc,x0 +80007e58: 342023f3 csrrs x7,mcause,x0 +80007e5c: 00c00793 addi x15,x0,12 +80007e60: 00f38a63 beq x7,x15,80007e74 +80007e64: 00100793 addi x15,x0,1 +80007e68: 00f38663 beq x7,x15,80007e74 +80007e6c: 01400793 addi x15,x0,20 +80007e70: 00f39663 bne x7,x15,80007e7c +80007e74: 34109073 csrrw x0,mepc,x1 +80007e78: 0100006f jal x0,80007e88 + +80007e7c : +80007e7c: 00400393 addi x7,x0,4 +80007e80: 00740433 add x8,x8,x7 +80007e84: 34141073 csrrw x0,mepc,x8 + +80007e88 : +80007e88: 34302473 csrrs x8,mtval,x0 + +80007e8c : +80007e8c: 00c32483 lw x9,12(x6) +80007e90: 00848e63 beq x9,x8,80007eac +80007e94: 00040313 addi x6,x8,0 +80007e98: 00048213 addi x4,x9,0 +80007e9c: 38c003ef jal x7,80008228 +80007ea0: 80007e8c .word 0x80007e8c +80007ea4: 800187b6 .word 0x800187b6 +80007ea8: 00000341 .word 0x00000341 + +80007eac : +80007eac: 30102473 csrrs x8,misa,x0 +80007eb0: 01841413 slli x8,x8,0x18 +80007eb4: 00045263 bge x8,x0,80007eb8 + +80007eb8 : +80007eb8: 10000393 addi x7,x0,256 +80007ebc: 05c0006f jal x0,80007f18 + +80007ec0 : +80007ec0: 25c12303 lw x6,604(x2) +80007ec4: 26012383 lw x7,608(x2) +80007ec8: 26412403 lw x8,612(x2) +80007ecc: 26812483 lw x9,616(x2) +80007ed0: 26c12703 lw x14,620(x2) +80007ed4: 27012783 lw x15,624(x2) +80007ed8: 27412103 lw x2,628(x2) +80007edc: 30200073 mret + +80007ee0 : +80007ee0: 00100413 addi x8,x0,1 +80007ee4: 01f77393 andi x7,x14,31 +80007ee8: 00741433 sll x8,x8,x7 +80007eec: 304434f3 csrrc x9,mie,x8 +80007ef0: 34443473 csrrc x8,mip,x8 + +80007ef4 : +80007ef4: 00832483 lw x9,8(x6) +80007ef8: 00848e63 beq x9,x8,80007f14 +80007efc: 00040313 addi x6,x8,0 +80007f00: 00048213 addi x4,x9,0 +80007f04: 324003ef jal x7,80008228 +80007f08: 80007ef4 .word 0x80007ef4 +80007f0c: 80018929 .word 0x80018929 +80007f10: 00000341 .word 0x00000341 +80007f14: 00000393 addi x7,x0,0 + +80007f18 : +80007f18: 00000417 auipc x8,0x0 +80007f1c: 03c40413 addi x8,x8,60 # 80007f54 +80007f20: 00740433 add x8,x8,x7 +80007f24: 00371393 slli x7,x14,0x3 +80007f28: 00740433 add x8,x8,x7 +80007f2c: ff847413 andi x8,x8,-8 +80007f30: 00042403 lw x8,0(x8) + +80007f34 : +80007f34: 00040a63 beq x8,x0,80007f48 +80007f38: 01f41393 slli x7,x8,0x1f +80007f3c: 0003d863 bge x7,x0,80007f4c +80007f40: 00145413 srli x8,x8,0x1 +80007f44: f6870ee3 beq x14,x8,80007ec0 +80007f48: d1cff06f jal x0,80007464 + +80007f4c : +80007f4c: 00040067 jalr x0,0(x8) + +80007f50 : + ... +80007f58: 00000001 .word 0x00000001 +80007f5c: 00000000 .word 0x00000000 +80007f60: 00000001 .word 0x00000001 +80007f64: 00000000 .word 0x00000000 +80007f68: 8002a000 .word 0x8002a000 + ... +80007f78: 00000001 .word 0x00000001 +80007f7c: 00000000 .word 0x00000000 +80007f80: 00000001 .word 0x00000001 +80007f84: 00000000 .word 0x00000000 +80007f88: 8002a014 .word 0x8002a014 + ... +80007f98: 00000001 .word 0x00000001 +80007f9c: 00000000 .word 0x00000000 +80007fa0: 00000001 .word 0x00000001 +80007fa4: 00000000 .word 0x00000000 +80007fa8: 8002a030 .word 0x8002a030 +80007fac: 00000000 .word 0x00000000 +80007fb0: 00000001 .word 0x00000001 +80007fb4: 00000000 .word 0x00000000 +80007fb8: 00000001 .word 0x00000001 +80007fbc: 00000000 .word 0x00000000 +80007fc0: 00000001 .word 0x00000001 +80007fc4: 00000000 .word 0x00000000 +80007fc8: 00000001 .word 0x00000001 +80007fcc: 00000000 .word 0x00000000 +80007fd0: 00000001 .word 0x00000001 +80007fd4: 00000000 .word 0x00000000 +80007fd8: 00000001 .word 0x00000001 +80007fdc: 00000000 .word 0x00000000 +80007fe0: 00000001 .word 0x00000001 +80007fe4: 00000000 .word 0x00000000 +80007fe8: 00000001 .word 0x00000001 +80007fec: 00000000 .word 0x00000000 +80007ff0: 00000001 .word 0x00000001 +80007ff4: 00000000 .word 0x00000000 +80007ff8: 00000001 .word 0x00000001 +80007ffc: 00000000 .word 0x00000000 +80008000: 00000001 .word 0x00000001 +80008004: 00000000 .word 0x00000000 +80008008: 00000001 .word 0x00000001 + ... + +80008050 : +80008050: 00000001 .word 0x00000001 +80008054: 00000000 .word 0x00000000 +80008058: 00000003 .word 0x00000003 +8000805c: 00000000 .word 0x00000000 +80008060: 00000005 .word 0x00000005 +80008064: 00000000 .word 0x00000000 +80008068: 00000007 .word 0x00000007 +8000806c: 00000000 .word 0x00000000 +80008070: 00000009 .word 0x00000009 +80008074: 00000000 .word 0x00000000 +80008078: 0000000b .word 0x0000000b +8000807c: 00000000 .word 0x00000000 +80008080: 0000000d .word 0x0000000d +80008084: 00000000 .word 0x00000000 +80008088: 0000000f .word 0x0000000f +8000808c: 00000000 .word 0x00000000 +80008090: 00000011 .word 0x00000011 +80008094: 00000000 .word 0x00000000 +80008098: 00000013 .word 0x00000013 +8000809c: 00000000 .word 0x00000000 +800080a0: 00000015 .word 0x00000015 +800080a4: 00000000 .word 0x00000000 +800080a8: 00000017 .word 0x00000017 +800080ac: 00000000 .word 0x00000000 +800080b0: 00000019 .word 0x00000019 +800080b4: 00000000 .word 0x00000000 +800080b8: 0000001b .word 0x0000001b +800080bc: 00000000 .word 0x00000000 +800080c0: 0000001d .word 0x0000001d +800080c4: 00000000 .word 0x00000000 +800080c8: 0000001f .word 0x0000001f +800080cc: 00000000 .word 0x00000000 +800080d0: 00000021 .word 0x00000021 +800080d4: 00000000 .word 0x00000000 +800080d8: 00000023 .word 0x00000023 +800080dc: 00000000 .word 0x00000000 +800080e0: 00000025 .word 0x00000025 +800080e4: 00000000 .word 0x00000000 +800080e8: 00000027 .word 0x00000027 +800080ec: 00000000 .word 0x00000000 +800080f0: 00000029 .word 0x00000029 +800080f4: 00000000 .word 0x00000000 +800080f8: 0000002b .word 0x0000002b +800080fc: 00000000 .word 0x00000000 +80008100: 0000002d .word 0x0000002d +80008104: 00000000 .word 0x00000000 +80008108: 0000002f .word 0x0000002f + ... + +80008150 : +80008150: 300023f3 csrrs x7,mstatus,x0 +80008154: 00b3d493 srli x9,x7,0xb +80008158: 0034f493 andi x9,x9,3 +8000815c: ffd48413 addi x8,x9,-3 +80008160: 341023f3 csrrs x7,mepc,x0 +80008164: 00000493 addi x9,x0,0 +80008168: 02040c63 beq x8,x0,800081a0 +8000816c: 29810113 addi x2,x2,664 +80008170: 310023f3 csrrs x7,0x310,x0 +80008174: 01839393 slli x7,x7,0x18 +80008178: 0003da63 bge x7,x0,8000818c + +8000817c : +8000817c: 29810113 addi x2,x2,664 +80008180: 47012783 lw x15,1136(x2) +80008184: d6810113 addi x2,x2,-664 +80008188: 0080006f jal x0,80008190 + +8000818c : +8000818c: f4012783 lw x15,-192(x2) +80008190: 341023f3 csrrs x7,mepc,x0 +80008194: 40f383b3 sub x7,x7,x15 +80008198: d6810113 addi x2,x2,-664 +8000819c: 1d812483 lw x9,472(x2) + +800081a0 : +800081a0: 007483b3 add x7,x9,x7 +800081a4: 25c12303 lw x6,604(x2) +800081a8: 26412403 lw x8,612(x2) +800081ac: 26812483 lw x9,616(x2) +800081b0: 26c12703 lw x14,620(x2) +800081b4: 27012783 lw x15,624(x2) +800081b8: 27412103 lw x2,628(x2) +800081bc: 00438067 jalr x0,4(x7) + +800081c0 : +800081c0: 00010217 auipc x4,0x10 +800081c4: a8020213 addi x4,x4,-1408 # 80017c40 +800081c8: 02522423 sw x5,40(x4) # 28 +800081cc: 00122423 sw x1,8(x4) # 8 +800081d0: 00022023 sw x0,0(x4) # 0 +800081d4: 0880006f jal x0,8000825c + +800081d8 : +800081d8: 00010397 auipc x7,0x10 +800081dc: a6838393 addi x7,x7,-1432 # 80017c40 +800081e0: 0483a023 sw x8,64(x7) +800081e4: 0243a023 sw x4,32(x7) +800081e8: 0253a423 sw x5,40(x7) +800081ec: 0013a423 sw x1,8(x7) +800081f0: 0003a023 sw x0,0(x7) +800081f4: 00038213 addi x4,x7,0 +800081f8: 00040293 addi x5,x8,0 +800081fc: 0600006f jal x0,8000825c + +80008200 : +80008200: 00010697 auipc x13,0x10 +80008204: a4068693 addi x13,x13,-1472 # 80017c40 +80008208: 06e6a823 sw x14,112(x13) +8000820c: 0246a023 sw x4,32(x13) +80008210: 0256a423 sw x5,40(x13) +80008214: 0016a423 sw x1,8(x13) +80008218: 0006a023 sw x0,0(x13) +8000821c: 00068213 addi x4,x13,0 +80008220: 00070293 addi x5,x14,0 +80008224: 0380006f jal x0,8000825c + +80008228 : +80008228: 00010497 auipc x9,0x10 +8000822c: a1848493 addi x9,x9,-1512 # 80017c40 +80008230: 0674a423 sw x7,104(x9) +80008234: 0244a023 sw x4,32(x9) +80008238: 0254a423 sw x5,40(x9) +8000823c: 0014a423 sw x1,8(x9) +80008240: 00300093 addi x1,x0,3 +80008244: 0014a023 sw x1,0(x9) +80008248: 1064a823 sw x6,272(x9) +8000824c: 1044ac23 sw x4,280(x9) +80008250: 00048213 addi x4,x9,0 +80008254: 00038293 addi x5,x7,0 +80008258: 0040006f jal x0,8000825c + +8000825c : +8000825c: 00222823 sw x2,16(x4) # 10 +80008260: 00322c23 sw x3,24(x4) # 18 +80008264: 02622823 sw x6,48(x4) # 30 +80008268: 02722c23 sw x7,56(x4) # 38 +8000826c: 04822023 sw x8,64(x4) # 40 +80008270: 04922423 sw x9,72(x4) # 48 +80008274: 04a22823 sw x10,80(x4) # 50 +80008278: 04b22c23 sw x11,88(x4) # 58 +8000827c: 06c22023 sw x12,96(x4) # 60 +80008280: 06d22423 sw x13,104(x4) # 68 +80008284: 06e22823 sw x14,112(x4) # 70 +80008288: 06f22c23 sw x15,120(x4) # 78 +8000828c: 09022023 sw x16,128(x4) # 80 +80008290: 09122423 sw x17,136(x4) # 88 +80008294: 09222823 sw x18,144(x4) # 90 +80008298: 09322c23 sw x19,152(x4) # 98 +8000829c: 0b422023 sw x20,160(x4) # a0 +800082a0: 0b522423 sw x21,168(x4) # a8 +800082a4: 0b622823 sw x22,176(x4) # b0 +800082a8: 0b722c23 sw x23,184(x4) # b8 +800082ac: 0d822023 sw x24,192(x4) # c0 +800082b0: 0d922423 sw x25,200(x4) # c8 +800082b4: 0da22823 sw x26,208(x4) # d0 +800082b8: 0db22c23 sw x27,216(x4) # d8 +800082bc: 0fc22023 sw x28,224(x4) # e0 +800082c0: 0fd22423 sw x29,232(x4) # e8 +800082c4: 0fe22823 sw x30,240(x4) # f0 +800082c8: 0ff22c23 sw x31,248(x4) # f8 + +800082cc : +800082cc: 00010497 auipc x9,0x10 +800082d0: 9744a483 lw x9,-1676(x9) # 80017c40 +800082d4: 00300513 addi x10,x0,3 +800082d8: 18a48a63 beq x9,x10,8000846c + +800082dc : +800082dc: ffa2d303 lhu x6,-6(x5) +800082e0: ff82d383 lhu x7,-8(x5) +800082e4: 01031313 slli x6,x6,0x10 +800082e8: 00736333 or x6,x6,x7 +800082ec: 00f35393 srli x7,x6,0xf +800082f0: 01f3f393 andi x7,x7,31 +800082f4: 01435413 srli x8,x6,0x14 +800082f8: 01f47413 andi x8,x8,31 +800082fc: 10822223 sw x8,260(x4) # 104 +80008300: 00341313 slli x6,x8,0x3 +80008304: 00620333 add x6,x4,x6 +80008308: 00032303 lw x6,0(x6) +8000830c: 10622823 sw x6,272(x4) # 110 +80008310: ff62d303 lhu x6,-10(x5) +80008314: ff42d383 lhu x7,-12(x5) +80008318: 01031313 slli x6,x6,0x10 +8000831c: 00736333 or x6,x6,x7 +80008320: 00030513 addi x10,x6,0 +80008324: 07f37413 andi x8,x6,127 +80008328: 00300493 addi x9,x0,3 +8000832c: 0c941463 bne x8,x9,800083f4 +80008330: 00c35413 srli x8,x6,0xc +80008334: 00747413 andi x8,x8,7 +80008338: 00200493 addi x9,x0,2 +8000833c: 0a941c63 bne x8,x9,800083f4 +80008340: 41435393 srai x7,x6,0x14 +80008344: 00f35313 srli x6,x6,0xf +80008348: 01f37313 andi x6,x6,31 +8000834c: 00331313 slli x6,x6,0x3 +80008350: 00620333 add x6,x4,x6 +80008354: 00032303 lw x6,0(x6) +80008358: 00730333 add x6,x6,x7 +8000835c: 00337413 andi x8,x6,3 +80008360: 0c041663 bne x8,x0,8000842c +80008364: 00000013 addi x0,x0,0 +80008368: 00000013 addi x0,x0,0 +8000836c: 00000013 addi x0,x0,0 +80008370: 00000013 addi x0,x0,0 +80008374: 00000013 addi x0,x0,0 +80008378: 00000013 addi x0,x0,0 +8000837c: 00000013 addi x0,x0,0 +80008380: 00011417 auipc x8,0x11 +80008384: 61040413 addi x8,x8,1552 # 80019990 +80008388: 00000013 addi x0,x0,0 +8000838c: 00000013 addi x0,x0,0 +80008390: 00000013 addi x0,x0,0 +80008394: 00000013 addi x0,x0,0 +80008398: 00000013 addi x0,x0,0 +8000839c: 00000013 addi x0,x0,0 +800083a0: 08836663 bltu x6,x8,8000842c +800083a4: 00000013 addi x0,x0,0 +800083a8: 00000013 addi x0,x0,0 +800083ac: 00000013 addi x0,x0,0 +800083b0: 00000013 addi x0,x0,0 +800083b4: 00000013 addi x0,x0,0 +800083b8: 00000013 addi x0,x0,0 +800083bc: 00000013 addi x0,x0,0 +800083c0: 00021417 auipc x8,0x21 +800083c4: aa040413 addi x8,x8,-1376 # 80028e60 +800083c8: 00000013 addi x0,x0,0 +800083cc: 00000013 addi x0,x0,0 +800083d0: 00000013 addi x0,x0,0 +800083d4: 00000013 addi x0,x0,0 +800083d8: 00000013 addi x0,x0,0 +800083dc: 00000013 addi x0,x0,0 +800083e0: ffc40413 addi x8,x8,-4 +800083e4: 04646463 bltu x8,x6,8000842c +800083e8: 00032303 lw x6,0(x6) +800083ec: 10622c23 sw x6,280(x4) # 118 +800083f0: 3700006f jal x0,80008760 + +800083f4 : +800083f4: 00100413 addi x8,x0,1 +800083f8: 00000013 addi x0,x0,0 +800083fc: 00000013 addi x0,x0,0 +80008400: 00010497 auipc x9,0x10 +80008404: 96848493 addi x9,x9,-1688 # 80017d68 +80008408: 00000013 addi x0,x0,0 +8000840c: 00000013 addi x0,x0,0 +80008410: 00000013 addi x0,x0,0 +80008414: 00000013 addi x0,x0,0 +80008418: 00000013 addi x0,x0,0 +8000841c: 00000013 addi x0,x0,0 +80008420: 0084a023 sw x8,0(x9) +80008424: 10a22c23 sw x10,280(x4) # 118 +80008428: 3380006f jal x0,80008760 + +8000842c : +8000842c: 00200413 addi x8,x0,2 +80008430: 00000013 addi x0,x0,0 +80008434: 00000013 addi x0,x0,0 +80008438: 00000013 addi x0,x0,0 +8000843c: 00000013 addi x0,x0,0 +80008440: 00010497 auipc x9,0x10 +80008444: 92848493 addi x9,x9,-1752 # 80017d68 +80008448: 00000013 addi x0,x0,0 +8000844c: 00000013 addi x0,x0,0 +80008450: 00000013 addi x0,x0,0 +80008454: 00000013 addi x0,x0,0 +80008458: 00000013 addi x0,x0,0 +8000845c: 00000013 addi x0,x0,0 +80008460: 0084a023 sw x8,0(x9) +80008464: 10622c23 sw x6,280(x4) # 118 +80008468: 2f80006f jal x0,80008760 + +8000846c : +8000846c: 0042a303 lw x6,4(x5) +80008470: 00010817 auipc x16,0x10 +80008474: 90880813 addi x16,x16,-1784 # 80017d78 +80008478: 00682023 sw x6,0(x16) +8000847c: 0002a303 lw x6,0(x5) +80008480: 10622423 sw x6,264(x4) # 108 +80008484: 00010817 auipc x16,0x10 +80008488: 8f480813 addi x16,x16,-1804 # 80017d78 +8000848c: 00082303 lw x6,0(x16) +80008490: 00010397 auipc x7,0x10 +80008494: 01f38393 addi x7,x7,31 # 800184af +80008498: 28730463 beq x6,x7,80008720 +8000849c: 00000413 addi x8,x0,0 +800084a0: 00010817 auipc x16,0x10 +800084a4: 8d080813 addi x16,x16,-1840 # 80017d70 +800084a8: 00882023 sw x8,0(x16) +800084ac: 00010397 auipc x7,0x10 +800084b0: 01a38393 addi x7,x7,26 # 800184c6 +800084b4: 00731863 bne x6,x7,800084c4 +800084b8: 00100413 addi x8,x0,1 +800084bc: 00000493 addi x9,x0,0 +800084c0: 2740006f jal x0,80008734 +800084c4: 00010397 auipc x7,0x10 +800084c8: 10438393 addi x7,x7,260 # 800185c8 +800084cc: 00731863 bne x6,x7,800084dc +800084d0: 00200413 addi x8,x0,2 +800084d4: 00000493 addi x9,x0,0 +800084d8: 25c0006f jal x0,80008734 +800084dc: 00010397 auipc x7,0x10 +800084e0: 1e738393 addi x7,x7,487 # 800186c3 +800084e4: 00731863 bne x6,x7,800084f4 +800084e8: 00300413 addi x8,x0,3 +800084ec: 00000493 addi x9,x0,0 +800084f0: 2440006f jal x0,80008734 +800084f4: 00010397 auipc x7,0x10 +800084f8: 2c238393 addi x7,x7,706 # 800187b6 +800084fc: 00731863 bne x6,x7,8000850c +80008500: 00400413 addi x8,x0,4 +80008504: 00000493 addi x9,x0,0 +80008508: 22c0006f jal x0,80008734 +8000850c: 00010397 auipc x7,0x10 +80008510: 41d38393 addi x7,x7,1053 # 80018929 +80008514: 00731863 bne x6,x7,80008524 +80008518: 00500413 addi x8,x0,5 +8000851c: 00000493 addi x9,x0,0 +80008520: 2140006f jal x0,80008734 +80008524: 00010397 auipc x7,0x10 +80008528: 38938393 addi x7,x7,905 # 800188ad +8000852c: 00731863 bne x6,x7,8000853c +80008530: 00600413 addi x8,x0,6 +80008534: 00000493 addi x9,x0,0 +80008538: 1fc0006f jal x0,80008734 +8000853c: 00010397 auipc x7,0x10 +80008540: 3af38393 addi x7,x7,943 # 800188eb +80008544: 00731863 bne x6,x7,80008554 +80008548: 00700413 addi x8,x0,7 +8000854c: 00000493 addi x9,x0,0 +80008550: 1e40006f jal x0,80008734 +80008554: 00010397 auipc x7,0x10 +80008558: fb238393 addi x7,x7,-78 # 80018506 +8000855c: 00731863 bne x6,x7,8000856c +80008560: 00100413 addi x8,x0,1 +80008564: 00100493 addi x9,x0,1 +80008568: 1cc0006f jal x0,80008734 +8000856c: 00010397 auipc x7,0x10 +80008570: 09a38393 addi x7,x7,154 # 80018606 +80008574: 00731863 bne x6,x7,80008584 +80008578: 00200413 addi x8,x0,2 +8000857c: 00100493 addi x9,x0,1 +80008580: 1b40006f jal x0,80008734 +80008584: 00010397 auipc x7,0x10 +80008588: 17b38393 addi x7,x7,379 # 800186ff +8000858c: 00731863 bne x6,x7,8000859c +80008590: 00300413 addi x8,x0,3 +80008594: 00100493 addi x9,x0,1 +80008598: 19c0006f jal x0,80008734 +8000859c: 00010397 auipc x7,0x10 +800085a0: 25738393 addi x7,x7,599 # 800187f3 +800085a4: 00731863 bne x6,x7,800085b4 +800085a8: 00400413 addi x8,x0,4 +800085ac: 00100493 addi x9,x0,1 +800085b0: 1840006f jal x0,80008734 +800085b4: 00010397 auipc x7,0x10 +800085b8: 3b038393 addi x7,x7,944 # 80018964 +800085bc: 00731863 bne x6,x7,800085cc +800085c0: 00500413 addi x8,x0,5 +800085c4: 00100493 addi x9,x0,1 +800085c8: 16c0006f jal x0,80008734 +800085cc: 00010397 auipc x7,0x10 +800085d0: f7a38393 addi x7,x7,-134 # 80018546 +800085d4: 00731863 bne x6,x7,800085e4 +800085d8: 00100413 addi x8,x0,1 +800085dc: 00200493 addi x9,x0,2 +800085e0: 1540006f jal x0,80008734 +800085e4: 00010397 auipc x7,0x10 +800085e8: 06038393 addi x7,x7,96 # 80018644 +800085ec: 00731863 bne x6,x7,800085fc +800085f0: 00200413 addi x8,x0,2 +800085f4: 00200493 addi x9,x0,2 +800085f8: 13c0006f jal x0,80008734 +800085fc: 00010397 auipc x7,0x10 +80008600: 13f38393 addi x7,x7,319 # 8001873b +80008604: 00731863 bne x6,x7,80008614 +80008608: 00300413 addi x8,x0,3 +8000860c: 00200493 addi x9,x0,2 +80008610: 1240006f jal x0,80008734 +80008614: 00010397 auipc x7,0x10 +80008618: 21c38393 addi x7,x7,540 # 80018830 +8000861c: 00731863 bne x6,x7,8000862c +80008620: 00400413 addi x8,x0,4 +80008624: 00200493 addi x9,x0,2 +80008628: 10c0006f jal x0,80008734 +8000862c: 00010397 auipc x7,0x10 +80008630: 37338393 addi x7,x7,883 # 8001899f +80008634: 00731863 bne x6,x7,80008644 +80008638: 00500413 addi x8,x0,5 +8000863c: 00200493 addi x9,x0,2 +80008640: 0f40006f jal x0,80008734 +80008644: 00010397 auipc x7,0x10 +80008648: f4338393 addi x7,x7,-189 # 80018587 +8000864c: 00731863 bne x6,x7,8000865c +80008650: 00100413 addi x8,x0,1 +80008654: 00300493 addi x9,x0,3 +80008658: 0dc0006f jal x0,80008734 +8000865c: 00010397 auipc x7,0x10 +80008660: 02738393 addi x7,x7,39 # 80018683 +80008664: 00731863 bne x6,x7,80008674 +80008668: 00200413 addi x8,x0,2 +8000866c: 00300493 addi x9,x0,3 +80008670: 0c40006f jal x0,80008734 +80008674: 00010397 auipc x7,0x10 +80008678: 10438393 addi x7,x7,260 # 80018778 +8000867c: 00731863 bne x6,x7,8000868c +80008680: 00300413 addi x8,x0,3 +80008684: 00300493 addi x9,x0,3 +80008688: 0ac0006f jal x0,80008734 +8000868c: 00010397 auipc x7,0x10 +80008690: 1e238393 addi x7,x7,482 # 8001886e +80008694: 00731863 bne x6,x7,800086a4 +80008698: 00400413 addi x8,x0,4 +8000869c: 00300493 addi x9,x0,3 +800086a0: 0940006f jal x0,80008734 +800086a4: 00010397 auipc x7,0x10 +800086a8: 33738393 addi x7,x7,823 # 800189db +800086ac: 00731863 bne x6,x7,800086bc +800086b0: 00500413 addi x8,x0,5 +800086b4: 00300493 addi x9,x0,3 +800086b8: 07c0006f jal x0,80008734 +800086bc: 00010397 auipc x7,0x10 +800086c0: 35c38393 addi x7,x7,860 # 80018a18 +800086c4: 00731863 bne x6,x7,800086d4 +800086c8: 00800413 addi x8,x0,8 +800086cc: 00000493 addi x9,x0,0 +800086d0: 0640006f jal x0,80008734 +800086d4: 00010397 auipc x7,0x10 +800086d8: 39338393 addi x7,x7,915 # 80018a67 +800086dc: 00731863 bne x6,x7,800086ec +800086e0: 00800413 addi x8,x0,8 +800086e4: 00000493 addi x9,x0,0 +800086e8: 04c0006f jal x0,80008734 +800086ec: 00010397 auipc x7,0x10 +800086f0: 47638393 addi x7,x7,1142 # 80018b62 +800086f4: 00731863 bne x6,x7,80008704 +800086f8: 00800413 addi x8,x0,8 +800086fc: 00100493 addi x9,x0,1 +80008700: 0340006f jal x0,80008734 +80008704: 00010397 auipc x7,0x10 +80008708: 55a38393 addi x7,x7,1370 # 80018c5e +8000870c: 00731863 bne x6,x7,8000871c +80008710: 00800413 addi x8,x0,8 +80008714: 00200493 addi x9,x0,2 +80008718: 01c0006f jal x0,80008734 +8000871c: 0340006f jal x0,80008750 + +80008720 : +80008720: 00900413 addi x8,x0,9 +80008724: 0000f817 auipc x16,0xf +80008728: 64c80813 addi x16,x16,1612 # 80017d70 +8000872c: 00882023 sw x8,0(x16) +80008730: 0300006f jal x0,80008760 + +80008734 : +80008734: 0000f817 auipc x16,0xf +80008738: 63c80813 addi x16,x16,1596 # 80017d70 +8000873c: 00882023 sw x8,0(x16) +80008740: 0000f817 auipc x16,0xf +80008744: 63480813 addi x16,x16,1588 # 80017d74 +80008748: 00982023 sw x9,0(x16) +8000874c: 0140006f jal x0,80008760 + +80008750 : +80008750: 0000f817 auipc x16,0xf +80008754: 62080813 addi x16,x16,1568 # 80017d70 +80008758: 00082023 sw x0,0(x16) +8000875c: 0040006f jal x0,80008760 + +80008760 : +80008760: 0002a303 lw x6,0(x5) +80008764: 10622423 sw x6,264(x4) # 108 +80008768: 00035383 lhu x7,0(x6) +8000876c: 0033f413 andi x8,x7,3 +80008770: 00300493 addi x9,x0,3 +80008774: 00941863 bne x8,x9,80008784 +80008778: 00235403 lhu x8,2(x6) +8000877c: 01041413 slli x8,x8,0x10 +80008780: 0083e3b3 or x7,x7,x8 +80008784: 10722023 sw x7,256(x4) # 100 +80008788: 0042a303 lw x6,4(x5) +8000878c: 12622023 sw x6,288(x4) # 120 + +80008790 : +80008790: 00000013 addi x0,x0,0 +80008794: 00000013 addi x0,x0,0 +80008798: 00000013 addi x0,x0,0 +8000879c: 00000013 addi x0,x0,0 +800087a0: 00010517 auipc x10,0x10 +800087a4: b2050513 addi x10,x10,-1248 # 800182c0 +800087a8: 00000013 addi x0,x0,0 +800087ac: 00000013 addi x0,x0,0 +800087b0: 00000013 addi x0,x0,0 +800087b4: 00000013 addi x0,x0,0 +800087b8: 00000013 addi x0,x0,0 +800087bc: 00000013 addi x0,x0,0 +800087c0: 00022097 auipc x1,0x22 +800087c4: da4080e7 jalr x1,-604(x1) # 8002a564 +800087c8: 00000013 addi x0,x0,0 +800087cc: 00000013 addi x0,x0,0 +800087d0: 00000013 addi x0,x0,0 +800087d4: 00000013 addi x0,x0,0 +800087d8: 00000013 addi x0,x0,0 +800087dc: 00000013 addi x0,x0,0 +800087e0: 00010517 auipc x10,0x10 +800087e4: b1b50513 addi x10,x10,-1253 # 800182fb +800087e8: 00000013 addi x0,x0,0 +800087ec: 00000013 addi x0,x0,0 +800087f0: 00000013 addi x0,x0,0 +800087f4: 00000013 addi x0,x0,0 +800087f8: 00000013 addi x0,x0,0 +800087fc: 00000013 addi x0,x0,0 +80008800: 00022097 auipc x1,0x22 +80008804: d64080e7 jalr x1,-668(x1) # 8002a564 + +80008808 : +80008808: 00000013 addi x0,x0,0 +8000880c: 00000013 addi x0,x0,0 +80008810: 00000013 addi x0,x0,0 +80008814: 00000013 addi x0,x0,0 +80008818: 00000013 addi x0,x0,0 +8000881c: 00000013 addi x0,x0,0 +80008820: 00010517 auipc x10,0x10 +80008824: b9250513 addi x10,x10,-1134 # 800183b2 +80008828: 00000013 addi x0,x0,0 +8000882c: 00000013 addi x0,x0,0 +80008830: 00000013 addi x0,x0,0 +80008834: 00000013 addi x0,x0,0 +80008838: 00000013 addi x0,x0,0 +8000883c: 00000013 addi x0,x0,0 +80008840: 00022097 auipc x1,0x22 +80008844: d24080e7 jalr x1,-732(x1) # 8002a564 + +80008848 : +80008848: 0000f517 auipc x10,0xf +8000884c: 51852503 lw x10,1304(x10) # 80017d60 +80008850: 00022097 auipc x1,0x22 +80008854: d14080e7 jalr x1,-748(x1) # 8002a564 + +80008858 : +80008858: 00000013 addi x0,x0,0 +8000885c: 00000013 addi x0,x0,0 +80008860: 00010517 auipc x10,0x10 +80008864: b6450513 addi x10,x10,-1180 # 800183c4 +80008868: 00000013 addi x0,x0,0 +8000886c: 00000013 addi x0,x0,0 +80008870: 00000013 addi x0,x0,0 +80008874: 00000013 addi x0,x0,0 +80008878: 00000013 addi x0,x0,0 +8000887c: 00000013 addi x0,x0,0 +80008880: 00022097 auipc x1,0x22 +80008884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80008888: 0000f517 auipc x10,0xf +8000888c: 3b852503 lw x10,952(x10) # 80017c40 +80008890: 00300593 addi x11,x0,3 +80008894: 52b50c63 beq x10,x11,80008dcc +80008898: 00000013 addi x0,x0,0 +8000889c: 00000013 addi x0,x0,0 +800088a0: 00010517 auipc x10,0x10 +800088a4: b2650513 addi x10,x10,-1242 # 800183c6 +800088a8: 00000013 addi x0,x0,0 +800088ac: 00000013 addi x0,x0,0 +800088b0: 00000013 addi x0,x0,0 +800088b4: 00000013 addi x0,x0,0 +800088b8: 00000013 addi x0,x0,0 +800088bc: 00000013 addi x0,x0,0 +800088c0: 00022097 auipc x1,0x22 +800088c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800088c8: 0000f517 auipc x10,0xf +800088cc: 47852503 lw x10,1144(x10) # 80017d40 +800088d0: 02000593 addi x11,x0,32 +800088d4: 00357613 andi x12,x10,3 +800088d8: 00300693 addi x13,x0,3 +800088dc: 00d60463 beq x12,x13,800088e4 +800088e0: 01000593 addi x11,x0,16 +800088e4: 3f4010ef jal x1,80009cd8 +800088e8: 00000013 addi x0,x0,0 +800088ec: 00000013 addi x0,x0,0 +800088f0: 00000013 addi x0,x0,0 +800088f4: 00000013 addi x0,x0,0 +800088f8: 00000013 addi x0,x0,0 +800088fc: 00000013 addi x0,x0,0 +80008900: 0000f517 auipc x10,0xf +80008904: 4a850513 addi x10,x10,1192 # 80017da8 +80008908: 00000013 addi x0,x0,0 +8000890c: 00000013 addi x0,x0,0 +80008910: 00000013 addi x0,x0,0 +80008914: 00000013 addi x0,x0,0 +80008918: 00000013 addi x0,x0,0 +8000891c: 00000013 addi x0,x0,0 +80008920: 00022097 auipc x1,0x22 +80008924: c44080e7 jalr x1,-956(x1) # 8002a564 +80008928: 00000013 addi x0,x0,0 +8000892c: 00000013 addi x0,x0,0 +80008930: 00000013 addi x0,x0,0 +80008934: 00000013 addi x0,x0,0 +80008938: 00000013 addi x0,x0,0 +8000893c: 00000013 addi x0,x0,0 +80008940: 00010517 auipc x10,0x10 +80008944: a9a50513 addi x10,x10,-1382 # 800183da +80008948: 00000013 addi x0,x0,0 +8000894c: 00000013 addi x0,x0,0 +80008950: 00000013 addi x0,x0,0 +80008954: 00000013 addi x0,x0,0 +80008958: 00000013 addi x0,x0,0 +8000895c: 00000013 addi x0,x0,0 +80008960: 00022097 auipc x1,0x22 +80008964: c04080e7 jalr x1,-1020(x1) # 8002a564 +80008968: 0000f517 auipc x10,0xf +8000896c: 3e052503 lw x10,992(x10) # 80017d48 +80008970: 02000593 addi x11,x0,32 +80008974: 364010ef jal x1,80009cd8 +80008978: 00000013 addi x0,x0,0 +8000897c: 00000013 addi x0,x0,0 +80008980: 0000f517 auipc x10,0xf +80008984: 42850513 addi x10,x10,1064 # 80017da8 +80008988: 00000013 addi x0,x0,0 +8000898c: 00000013 addi x0,x0,0 +80008990: 00000013 addi x0,x0,0 +80008994: 00000013 addi x0,x0,0 +80008998: 00000013 addi x0,x0,0 +8000899c: 00000013 addi x0,x0,0 +800089a0: 00022097 auipc x1,0x22 +800089a4: bc4080e7 jalr x1,-1084(x1) # 8002a564 +800089a8: 00000013 addi x0,x0,0 +800089ac: 00000013 addi x0,x0,0 +800089b0: 00000013 addi x0,x0,0 +800089b4: 00000013 addi x0,x0,0 +800089b8: 00000013 addi x0,x0,0 +800089bc: 00000013 addi x0,x0,0 +800089c0: 00010517 auipc x10,0x10 +800089c4: 45150513 addi x10,x10,1105 # 80018e11 +800089c8: 00000013 addi x0,x0,0 +800089cc: 00000013 addi x0,x0,0 +800089d0: 00000013 addi x0,x0,0 +800089d4: 00000013 addi x0,x0,0 +800089d8: 00000013 addi x0,x0,0 +800089dc: 00000013 addi x0,x0,0 +800089e0: 00022097 auipc x1,0x22 +800089e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800089e8: 0000f517 auipc x10,0xf +800089ec: 25852503 lw x10,600(x10) # 80017c40 +800089f0: 00050663 beq x10,x0,800089fc +800089f4: 00300593 addi x11,x0,3 +800089f8: 04b51063 bne x10,x11,80008a38 +800089fc: 07800593 addi x11,x0,120 +80008a00: 0000f617 auipc x12,0xf +80008a04: 3a860613 addi x12,x12,936 # 80017da8 +80008a08: 00000013 addi x0,x0,0 +80008a0c: 00000013 addi x0,x0,0 +80008a10: 00000013 addi x0,x0,0 +80008a14: 00000013 addi x0,x0,0 +80008a18: 00000013 addi x0,x0,0 +80008a1c: 00000013 addi x0,x0,0 +80008a20: 00b60023 sb x11,0(x12) +80008a24: 00160613 addi x12,x12,1 +80008a28: 0000f517 auipc x10,0xf +80008a2c: 31c52503 lw x10,796(x10) # 80017d44 +80008a30: 324010ef jal x1,80009d54 +80008a34: 1180006f jal x0,80008b4c + +80008a38 : +80008a38: 00100593 addi x11,x0,1 +80008a3c: 04b50863 beq x10,x11,80008a8c +80008a40: 00400593 addi x11,x0,4 +80008a44: 08b50a63 beq x10,x11,80008ad8 +80008a48: 00500593 addi x11,x0,5 +80008a4c: 0cb50463 beq x10,x11,80008b14 +80008a50: 00000013 addi x0,x0,0 +80008a54: 00000013 addi x0,x0,0 +80008a58: 00000013 addi x0,x0,0 +80008a5c: 00000013 addi x0,x0,0 +80008a60: 00010517 auipc x10,0x10 +80008a64: 4c750513 addi x10,x10,1223 # 80018f27 +80008a68: 00000013 addi x0,x0,0 +80008a6c: 00000013 addi x0,x0,0 +80008a70: 00000013 addi x0,x0,0 +80008a74: 00000013 addi x0,x0,0 +80008a78: 00000013 addi x0,x0,0 +80008a7c: 00000013 addi x0,x0,0 +80008a80: 00022097 auipc x1,0x22 +80008a84: ae4080e7 jalr x1,-1308(x1) # 8002a564 +80008a88: 1000006f jal x0,80008b88 + +80008a8c : +80008a8c: 06600593 addi x11,x0,102 +80008a90: 00000013 addi x0,x0,0 +80008a94: 00000013 addi x0,x0,0 +80008a98: 00000013 addi x0,x0,0 +80008a9c: 00000013 addi x0,x0,0 +80008aa0: 0000f617 auipc x12,0xf +80008aa4: 30860613 addi x12,x12,776 # 80017da8 +80008aa8: 00000013 addi x0,x0,0 +80008aac: 00000013 addi x0,x0,0 +80008ab0: 00000013 addi x0,x0,0 +80008ab4: 00000013 addi x0,x0,0 +80008ab8: 00000013 addi x0,x0,0 +80008abc: 00000013 addi x0,x0,0 +80008ac0: 00b60023 sb x11,0(x12) +80008ac4: 00160613 addi x12,x12,1 +80008ac8: 0000f517 auipc x10,0xf +80008acc: 27c52503 lw x10,636(x10) # 80017d44 +80008ad0: 284010ef jal x1,80009d54 +80008ad4: 0780006f jal x0,80008b4c + +80008ad8 : +80008ad8: 07600593 addi x11,x0,118 +80008adc: 00000013 addi x0,x0,0 +80008ae0: 0000f617 auipc x12,0xf +80008ae4: 2c860613 addi x12,x12,712 # 80017da8 +80008ae8: 00000013 addi x0,x0,0 +80008aec: 00000013 addi x0,x0,0 +80008af0: 00000013 addi x0,x0,0 +80008af4: 00000013 addi x0,x0,0 +80008af8: 00000013 addi x0,x0,0 +80008afc: 00000013 addi x0,x0,0 +80008b00: 00b60023 sb x11,0(x12) +80008b04: 00160613 addi x12,x12,1 +80008b08: 0000f517 auipc x10,0xf +80008b0c: 23c52503 lw x10,572(x10) # 80017d44 +80008b10: 244010ef jal x1,80009d54 + +80008b14 : +80008b14: 00000013 addi x0,x0,0 +80008b18: 00000013 addi x0,x0,0 +80008b1c: 00000013 addi x0,x0,0 +80008b20: 00010517 auipc x10,0x10 +80008b24: 2ea50513 addi x10,x10,746 # 80018e0a +80008b28: 00000013 addi x0,x0,0 +80008b2c: 00000013 addi x0,x0,0 +80008b30: 00000013 addi x0,x0,0 +80008b34: 00000013 addi x0,x0,0 +80008b38: 00000013 addi x0,x0,0 +80008b3c: 00000013 addi x0,x0,0 +80008b40: 00022097 auipc x1,0x22 +80008b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80008b48: 0400006f jal x0,80008b88 + +80008b4c : +80008b4c: 00000013 addi x0,x0,0 +80008b50: 00000013 addi x0,x0,0 +80008b54: 00000013 addi x0,x0,0 +80008b58: 00000013 addi x0,x0,0 +80008b5c: 00000013 addi x0,x0,0 +80008b60: 0000f517 auipc x10,0xf +80008b64: 24850513 addi x10,x10,584 # 80017da8 +80008b68: 00000013 addi x0,x0,0 +80008b6c: 00000013 addi x0,x0,0 +80008b70: 00000013 addi x0,x0,0 +80008b74: 00000013 addi x0,x0,0 +80008b78: 00000013 addi x0,x0,0 +80008b7c: 00000013 addi x0,x0,0 +80008b80: 00022097 auipc x1,0x22 +80008b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 + +80008b88 : +80008b88: 00000013 addi x0,x0,0 +80008b8c: 00000013 addi x0,x0,0 +80008b90: 00000013 addi x0,x0,0 +80008b94: 00000013 addi x0,x0,0 +80008b98: 00000013 addi x0,x0,0 +80008b9c: 00000013 addi x0,x0,0 +80008ba0: 00010517 auipc x10,0x10 +80008ba4: 28250513 addi x10,x10,642 # 80018e22 +80008ba8: 00000013 addi x0,x0,0 +80008bac: 00000013 addi x0,x0,0 +80008bb0: 00000013 addi x0,x0,0 +80008bb4: 00000013 addi x0,x0,0 +80008bb8: 00000013 addi x0,x0,0 +80008bbc: 00000013 addi x0,x0,0 +80008bc0: 00022097 auipc x1,0x22 +80008bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80008bc8: 0000f517 auipc x10,0xf +80008bcc: 07852503 lw x10,120(x10) # 80017c40 +80008bd0: 00100593 addi x11,x0,1 +80008bd4: 00b51c63 bne x10,x11,80008bec +80008bd8: 0000f517 auipc x10,0xf +80008bdc: 17852503 lw x10,376(x10) # 80017d50 +80008be0: 02000593 addi x11,x0,32 +80008be4: 0f4010ef jal x1,80009cd8 +80008be8: 0140006f jal x0,80008bfc + +80008bec : +80008bec: 0000f517 auipc x10,0xf +80008bf0: 16452503 lw x10,356(x10) # 80017d50 +80008bf4: 02000593 addi x11,x0,32 +80008bf8: 0e0010ef jal x1,80009cd8 + +80008bfc : +80008bfc: 00000013 addi x0,x0,0 +80008c00: 0000f517 auipc x10,0xf +80008c04: 1a850513 addi x10,x10,424 # 80017da8 +80008c08: 00000013 addi x0,x0,0 +80008c0c: 00000013 addi x0,x0,0 +80008c10: 00000013 addi x0,x0,0 +80008c14: 00000013 addi x0,x0,0 +80008c18: 00000013 addi x0,x0,0 +80008c1c: 00000013 addi x0,x0,0 +80008c20: 00022097 auipc x1,0x22 +80008c24: 944080e7 jalr x1,-1724(x1) # 8002a564 +80008c28: 0000f517 auipc x10,0xf +80008c2c: 14052503 lw x10,320(x10) # 80017d68 +80008c30: 08051e63 bne x10,x0,80008ccc +80008c34: 00000013 addi x0,x0,0 +80008c38: 00000013 addi x0,x0,0 +80008c3c: 00000013 addi x0,x0,0 +80008c40: 00010517 auipc x10,0x10 +80008c44: 1f950513 addi x10,x10,505 # 80018e39 +80008c48: 00000013 addi x0,x0,0 +80008c4c: 00000013 addi x0,x0,0 +80008c50: 00000013 addi x0,x0,0 +80008c54: 00000013 addi x0,x0,0 +80008c58: 00000013 addi x0,x0,0 +80008c5c: 00000013 addi x0,x0,0 +80008c60: 00022097 auipc x1,0x22 +80008c64: 904080e7 jalr x1,-1788(x1) # 8002a564 +80008c68: 0000f517 auipc x10,0xf +80008c6c: fd852503 lw x10,-40(x10) # 80017c40 +80008c70: 00100593 addi x11,x0,1 +80008c74: 00b51c63 bne x10,x11,80008c8c +80008c78: 0000f517 auipc x10,0xf +80008c7c: 0e052503 lw x10,224(x10) # 80017d58 +80008c80: 02000593 addi x11,x0,32 +80008c84: 054010ef jal x1,80009cd8 +80008c88: 0140006f jal x0,80008c9c + +80008c8c : +80008c8c: 0000f517 auipc x10,0xf +80008c90: 0cc52503 lw x10,204(x10) # 80017d58 +80008c94: 02000593 addi x11,x0,32 +80008c98: 040010ef jal x1,80009cd8 + +80008c9c : +80008c9c: 00000013 addi x0,x0,0 +80008ca0: 0000f517 auipc x10,0xf +80008ca4: 10850513 addi x10,x10,264 # 80017da8 +80008ca8: 00000013 addi x0,x0,0 +80008cac: 00000013 addi x0,x0,0 +80008cb0: 00000013 addi x0,x0,0 +80008cb4: 00000013 addi x0,x0,0 +80008cb8: 00000013 addi x0,x0,0 +80008cbc: 00000013 addi x0,x0,0 +80008cc0: 00022097 auipc x1,0x22 +80008cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80008cc8: 5bd0006f jal x0,80009a84 + +80008ccc : +80008ccc: 00100593 addi x11,x0,1 +80008cd0: 06b51e63 bne x10,x11,80008d4c + +80008cd4 : +80008cd4: 00000013 addi x0,x0,0 +80008cd8: 00000013 addi x0,x0,0 +80008cdc: 00000013 addi x0,x0,0 +80008ce0: 00010517 auipc x10,0x10 +80008ce4: 17050513 addi x10,x10,368 # 80018e50 +80008ce8: 00000013 addi x0,x0,0 +80008cec: 00000013 addi x0,x0,0 +80008cf0: 00000013 addi x0,x0,0 +80008cf4: 00000013 addi x0,x0,0 +80008cf8: 00000013 addi x0,x0,0 +80008cfc: 00000013 addi x0,x0,0 +80008d00: 00022097 auipc x1,0x22 +80008d04: 864080e7 jalr x1,-1948(x1) # 8002a564 +80008d08: 0000f517 auipc x10,0xf +80008d0c: 05052503 lw x10,80(x10) # 80017d58 +80008d10: 02000593 addi x11,x0,32 +80008d14: 7c5000ef jal x1,80009cd8 +80008d18: 00000013 addi x0,x0,0 +80008d1c: 00000013 addi x0,x0,0 +80008d20: 0000f517 auipc x10,0xf +80008d24: 08850513 addi x10,x10,136 # 80017da8 +80008d28: 00000013 addi x0,x0,0 +80008d2c: 00000013 addi x0,x0,0 +80008d30: 00000013 addi x0,x0,0 +80008d34: 00000013 addi x0,x0,0 +80008d38: 00000013 addi x0,x0,0 +80008d3c: 00000013 addi x0,x0,0 +80008d40: 00022097 auipc x1,0x22 +80008d44: 824080e7 jalr x1,-2012(x1) # 8002a564 +80008d48: 53d0006f jal x0,80009a84 + +80008d4c : +80008d4c: 00000013 addi x0,x0,0 +80008d50: 00000013 addi x0,x0,0 +80008d54: 00000013 addi x0,x0,0 +80008d58: 00000013 addi x0,x0,0 +80008d5c: 00000013 addi x0,x0,0 +80008d60: 00010517 auipc x10,0x10 +80008d64: 14e50513 addi x10,x10,334 # 80018eae +80008d68: 00000013 addi x0,x0,0 +80008d6c: 00000013 addi x0,x0,0 +80008d70: 00000013 addi x0,x0,0 +80008d74: 00000013 addi x0,x0,0 +80008d78: 00000013 addi x0,x0,0 +80008d7c: 00000013 addi x0,x0,0 +80008d80: 00021097 auipc x1,0x21 +80008d84: 7e4080e7 jalr x1,2020(x1) # 8002a564 +80008d88: 0000f517 auipc x10,0xf +80008d8c: fd052503 lw x10,-48(x10) # 80017d58 +80008d90: 02000593 addi x11,x0,32 +80008d94: 745000ef jal x1,80009cd8 +80008d98: 00000013 addi x0,x0,0 +80008d9c: 00000013 addi x0,x0,0 +80008da0: 0000f517 auipc x10,0xf +80008da4: 00850513 addi x10,x10,8 # 80017da8 +80008da8: 00000013 addi x0,x0,0 +80008dac: 00000013 addi x0,x0,0 +80008db0: 00000013 addi x0,x0,0 +80008db4: 00000013 addi x0,x0,0 +80008db8: 00000013 addi x0,x0,0 +80008dbc: 00000013 addi x0,x0,0 +80008dc0: 00021097 auipc x1,0x21 +80008dc4: 7a4080e7 jalr x1,1956(x1) # 8002a564 +80008dc8: 4bd0006f jal x0,80009a84 + +80008dcc : +80008dcc: 0000f417 auipc x8,0xf +80008dd0: fa442403 lw x8,-92(x8) # 80017d70 +80008dd4: 00900493 addi x9,x0,9 +80008dd8: 0a940c63 beq x8,x9,80008e90 +80008ddc: 00000013 addi x0,x0,0 +80008de0: 00010517 auipc x10,0x10 +80008de4: 17350513 addi x10,x10,371 # 80018f53 +80008de8: 00000013 addi x0,x0,0 +80008dec: 00000013 addi x0,x0,0 +80008df0: 00000013 addi x0,x0,0 +80008df4: 00000013 addi x0,x0,0 +80008df8: 00000013 addi x0,x0,0 +80008dfc: 00000013 addi x0,x0,0 +80008e00: 00021097 auipc x1,0x21 +80008e04: 764080e7 jalr x1,1892(x1) # 8002a564 +80008e08: 00000013 addi x0,x0,0 +80008e0c: 00000013 addi x0,x0,0 +80008e10: 00000013 addi x0,x0,0 +80008e14: 00000013 addi x0,x0,0 +80008e18: 00000013 addi x0,x0,0 +80008e1c: 00000013 addi x0,x0,0 +80008e20: 00010517 auipc x10,0x10 +80008e24: 15f50513 addi x10,x10,351 # 80018f7f +80008e28: 00000013 addi x0,x0,0 +80008e2c: 00000013 addi x0,x0,0 +80008e30: 00000013 addi x0,x0,0 +80008e34: 00000013 addi x0,x0,0 +80008e38: 00000013 addi x0,x0,0 +80008e3c: 00000013 addi x0,x0,0 +80008e40: 00021097 auipc x1,0x21 +80008e44: 724080e7 jalr x1,1828(x1) # 8002a564 +80008e48: 0000f817 auipc x16,0xf +80008e4c: f3080813 addi x16,x16,-208 # 80017d78 +80008e50: 00082503 lw x10,0(x16) +80008e54: 00021097 auipc x1,0x21 +80008e58: 710080e7 jalr x1,1808(x1) # 8002a564 +80008e5c: 00000013 addi x0,x0,0 +80008e60: 0000f517 auipc x10,0xf +80008e64: 56450513 addi x10,x10,1380 # 800183c4 +80008e68: 00000013 addi x0,x0,0 +80008e6c: 00000013 addi x0,x0,0 +80008e70: 00000013 addi x0,x0,0 +80008e74: 00000013 addi x0,x0,0 +80008e78: 00000013 addi x0,x0,0 +80008e7c: 00000013 addi x0,x0,0 +80008e80: 00021097 auipc x1,0x21 +80008e84: 6e4080e7 jalr x1,1764(x1) # 8002a564 +80008e88: 280404e3 beq x8,x0,80009910 +80008e8c: 3400006f jal x0,800091cc + +80008e90 : +80008e90: 00000013 addi x0,x0,0 +80008e94: 00000013 addi x0,x0,0 +80008e98: 00000013 addi x0,x0,0 +80008e9c: 00000013 addi x0,x0,0 +80008ea0: 00010517 auipc x10,0x10 +80008ea4: 0ef50513 addi x10,x10,239 # 80018f8f +80008ea8: 00000013 addi x0,x0,0 +80008eac: 00000013 addi x0,x0,0 +80008eb0: 00000013 addi x0,x0,0 +80008eb4: 00000013 addi x0,x0,0 +80008eb8: 00000013 addi x0,x0,0 +80008ebc: 00000013 addi x0,x0,0 +80008ec0: 00021097 auipc x1,0x21 +80008ec4: 6a4080e7 jalr x1,1700(x1) # 8002a564 +80008ec8: 0000f517 auipc x10,0xf +80008ecc: e9052503 lw x10,-368(x10) # 80017d58 +80008ed0: 02000593 addi x11,x0,32 +80008ed4: 605000ef jal x1,80009cd8 +80008ed8: 00000013 addi x0,x0,0 +80008edc: 00000013 addi x0,x0,0 +80008ee0: 0000f517 auipc x10,0xf +80008ee4: ec850513 addi x10,x10,-312 # 80017da8 +80008ee8: 00000013 addi x0,x0,0 +80008eec: 00000013 addi x0,x0,0 +80008ef0: 00000013 addi x0,x0,0 +80008ef4: 00000013 addi x0,x0,0 +80008ef8: 00000013 addi x0,x0,0 +80008efc: 00000013 addi x0,x0,0 +80008f00: 00021097 auipc x1,0x21 +80008f04: 664080e7 jalr x1,1636(x1) # 8002a564 +80008f08: 00000013 addi x0,x0,0 +80008f0c: 00000013 addi x0,x0,0 +80008f10: 00000013 addi x0,x0,0 +80008f14: 00000013 addi x0,x0,0 +80008f18: 00000013 addi x0,x0,0 +80008f1c: 00000013 addi x0,x0,0 +80008f20: 00010517 auipc x10,0x10 +80008f24: 09a50513 addi x10,x10,154 # 80018fba +80008f28: 00000013 addi x0,x0,0 +80008f2c: 00000013 addi x0,x0,0 +80008f30: 00000013 addi x0,x0,0 +80008f34: 00000013 addi x0,x0,0 +80008f38: 00000013 addi x0,x0,0 +80008f3c: 00000013 addi x0,x0,0 +80008f40: 00021097 auipc x1,0x21 +80008f44: 624080e7 jalr x1,1572(x1) # 8002a564 +80008f48: 0000f517 auipc x10,0xf +80008f4c: e0852503 lw x10,-504(x10) # 80017d50 +80008f50: 02000593 addi x11,x0,32 +80008f54: 585000ef jal x1,80009cd8 +80008f58: 00000013 addi x0,x0,0 +80008f5c: 00000013 addi x0,x0,0 +80008f60: 0000f517 auipc x10,0xf +80008f64: e4850513 addi x10,x10,-440 # 80017da8 +80008f68: 00000013 addi x0,x0,0 +80008f6c: 00000013 addi x0,x0,0 +80008f70: 00000013 addi x0,x0,0 +80008f74: 00000013 addi x0,x0,0 +80008f78: 00000013 addi x0,x0,0 +80008f7c: 00000013 addi x0,x0,0 +80008f80: 00021097 auipc x1,0x21 +80008f84: 5e4080e7 jalr x1,1508(x1) # 8002a564 +80008f88: 0000f317 auipc x6,0xf +80008f8c: dc832303 lw x6,-568(x6) # 80017d50 +80008f90: 0000f397 auipc x7,0xf +80008f94: dc83a383 lw x7,-568(x7) # 80017d58 +80008f98: 10736a63 bltu x6,x7,800090ac + +80008f9c : +80008f9c: 00000013 addi x0,x0,0 +80008fa0: 00010517 auipc x10,0x10 +80008fa4: 04950513 addi x10,x10,73 # 80018fe9 +80008fa8: 00000013 addi x0,x0,0 +80008fac: 00000013 addi x0,x0,0 +80008fb0: 00000013 addi x0,x0,0 +80008fb4: 00000013 addi x0,x0,0 +80008fb8: 00000013 addi x0,x0,0 +80008fbc: 00000013 addi x0,x0,0 +80008fc0: 00021097 auipc x1,0x21 +80008fc4: 5a4080e7 jalr x1,1444(x1) # 8002a564 +80008fc8: 00000013 addi x0,x0,0 +80008fcc: 00000013 addi x0,x0,0 +80008fd0: 00000013 addi x0,x0,0 +80008fd4: 00000013 addi x0,x0,0 +80008fd8: 00000013 addi x0,x0,0 +80008fdc: 00000013 addi x0,x0,0 +80008fe0: 00010517 auipc x10,0x10 +80008fe4: 07150513 addi x10,x10,113 # 80019051 +80008fe8: 00000013 addi x0,x0,0 +80008fec: 00000013 addi x0,x0,0 +80008ff0: 00000013 addi x0,x0,0 +80008ff4: 00000013 addi x0,x0,0 +80008ff8: 00000013 addi x0,x0,0 +80008ffc: 00000013 addi x0,x0,0 +80009000: 00021097 auipc x1,0x21 +80009004: 564080e7 jalr x1,1380(x1) # 8002a564 +80009008: 0000f317 auipc x6,0xf +8000900c: d4832303 lw x6,-696(x6) # 80017d50 +80009010: 0000f397 auipc x7,0xf +80009014: d483a383 lw x7,-696(x7) # 80017d58 +80009018: 40730533 sub x10,x6,x7 +8000901c: 02000593 addi x11,x0,32 +80009020: 4b9000ef jal x1,80009cd8 +80009024: 00000013 addi x0,x0,0 +80009028: 00000013 addi x0,x0,0 +8000902c: 00000013 addi x0,x0,0 +80009030: 00000013 addi x0,x0,0 +80009034: 00000013 addi x0,x0,0 +80009038: 00000013 addi x0,x0,0 +8000903c: 00000013 addi x0,x0,0 +80009040: 0000f517 auipc x10,0xf +80009044: d6850513 addi x10,x10,-664 # 80017da8 +80009048: 00000013 addi x0,x0,0 +8000904c: 00000013 addi x0,x0,0 +80009050: 00000013 addi x0,x0,0 +80009054: 00000013 addi x0,x0,0 +80009058: 00000013 addi x0,x0,0 +8000905c: 00000013 addi x0,x0,0 +80009060: 00021097 auipc x1,0x21 +80009064: 504080e7 jalr x1,1284(x1) # 8002a564 +80009068: 00000013 addi x0,x0,0 +8000906c: 00000013 addi x0,x0,0 +80009070: 00000013 addi x0,x0,0 +80009074: 00000013 addi x0,x0,0 +80009078: 00000013 addi x0,x0,0 +8000907c: 00000013 addi x0,x0,0 +80009080: 00010517 auipc x10,0x10 +80009084: ff850513 addi x10,x10,-8 # 80019078 +80009088: 00000013 addi x0,x0,0 +8000908c: 00000013 addi x0,x0,0 +80009090: 00000013 addi x0,x0,0 +80009094: 00000013 addi x0,x0,0 +80009098: 00000013 addi x0,x0,0 +8000909c: 00000013 addi x0,x0,0 +800090a0: 00021097 auipc x1,0x21 +800090a4: 4c4080e7 jalr x1,1220(x1) # 8002a564 +800090a8: 1dd0006f jal x0,80009a84 + +800090ac : +800090ac: 00000013 addi x0,x0,0 +800090b0: 00000013 addi x0,x0,0 +800090b4: 00000013 addi x0,x0,0 +800090b8: 00000013 addi x0,x0,0 +800090bc: 00000013 addi x0,x0,0 +800090c0: 00010517 auipc x10,0x10 +800090c4: f5550513 addi x10,x10,-171 # 80019015 +800090c8: 00000013 addi x0,x0,0 +800090cc: 00000013 addi x0,x0,0 +800090d0: 00000013 addi x0,x0,0 +800090d4: 00000013 addi x0,x0,0 +800090d8: 00000013 addi x0,x0,0 +800090dc: 00000013 addi x0,x0,0 +800090e0: 00021097 auipc x1,0x21 +800090e4: 484080e7 jalr x1,1156(x1) # 8002a564 +800090e8: 00000013 addi x0,x0,0 +800090ec: 00000013 addi x0,x0,0 +800090f0: 00000013 addi x0,x0,0 +800090f4: 00000013 addi x0,x0,0 +800090f8: 00000013 addi x0,x0,0 +800090fc: 00000013 addi x0,x0,0 +80009100: 00010517 auipc x10,0x10 +80009104: f5150513 addi x10,x10,-175 # 80019051 +80009108: 00000013 addi x0,x0,0 +8000910c: 00000013 addi x0,x0,0 +80009110: 00000013 addi x0,x0,0 +80009114: 00000013 addi x0,x0,0 +80009118: 00000013 addi x0,x0,0 +8000911c: 00000013 addi x0,x0,0 +80009120: 00021097 auipc x1,0x21 +80009124: 444080e7 jalr x1,1092(x1) # 8002a564 +80009128: 0000f317 auipc x6,0xf +8000912c: c3032303 lw x6,-976(x6) # 80017d58 +80009130: 0000f397 auipc x7,0xf +80009134: c203a383 lw x7,-992(x7) # 80017d50 +80009138: 40730533 sub x10,x6,x7 +8000913c: 02000593 addi x11,x0,32 +80009140: 399000ef jal x1,80009cd8 +80009144: 00000013 addi x0,x0,0 +80009148: 00000013 addi x0,x0,0 +8000914c: 00000013 addi x0,x0,0 +80009150: 00000013 addi x0,x0,0 +80009154: 00000013 addi x0,x0,0 +80009158: 00000013 addi x0,x0,0 +8000915c: 00000013 addi x0,x0,0 +80009160: 0000f517 auipc x10,0xf +80009164: c4850513 addi x10,x10,-952 # 80017da8 +80009168: 00000013 addi x0,x0,0 +8000916c: 00000013 addi x0,x0,0 +80009170: 00000013 addi x0,x0,0 +80009174: 00000013 addi x0,x0,0 +80009178: 00000013 addi x0,x0,0 +8000917c: 00000013 addi x0,x0,0 +80009180: 00021097 auipc x1,0x21 +80009184: 3e4080e7 jalr x1,996(x1) # 8002a564 +80009188: 00000013 addi x0,x0,0 +8000918c: 00000013 addi x0,x0,0 +80009190: 00000013 addi x0,x0,0 +80009194: 00000013 addi x0,x0,0 +80009198: 00000013 addi x0,x0,0 +8000919c: 00000013 addi x0,x0,0 +800091a0: 00010517 auipc x10,0x10 +800091a4: fc050513 addi x10,x10,-64 # 80019160 +800091a8: 00000013 addi x0,x0,0 +800091ac: 00000013 addi x0,x0,0 +800091b0: 00000013 addi x0,x0,0 +800091b4: 00000013 addi x0,x0,0 +800091b8: 00000013 addi x0,x0,0 +800091bc: 00000013 addi x0,x0,0 +800091c0: 00021097 auipc x1,0x21 +800091c4: 3a4080e7 jalr x1,932(x1) # 8002a564 +800091c8: 0bd0006f jal x0,80009a84 + +800091cc : +800091cc: 00000013 addi x0,x0,0 +800091d0: 00000013 addi x0,x0,0 +800091d4: 00000013 addi x0,x0,0 +800091d8: 00000013 addi x0,x0,0 +800091dc: 00000013 addi x0,x0,0 +800091e0: 00010517 auipc x10,0x10 +800091e4: 06750513 addi x10,x10,103 # 80019247 +800091e8: 00000013 addi x0,x0,0 +800091ec: 00000013 addi x0,x0,0 +800091f0: 00000013 addi x0,x0,0 +800091f4: 00000013 addi x0,x0,0 +800091f8: 00000013 addi x0,x0,0 +800091fc: 00000013 addi x0,x0,0 +80009200: 00021097 auipc x1,0x21 +80009204: 364080e7 jalr x1,868(x1) # 8002a564 +80009208: 0000f517 auipc x10,0xf +8000920c: b6c52503 lw x10,-1172(x10) # 80017d74 +80009210: 04050a63 beq x10,x0,80009264 +80009214: 00100593 addi x11,x0,1 +80009218: 08b50663 beq x10,x11,800092a4 +8000921c: 00200593 addi x11,x0,2 +80009220: 0cb50263 beq x10,x11,800092e4 +80009224: 00300593 addi x11,x0,3 +80009228: 0eb50e63 beq x10,x11,80009324 +8000922c: 00000013 addi x0,x0,0 +80009230: 00000013 addi x0,x0,0 +80009234: 00000013 addi x0,x0,0 +80009238: 00000013 addi x0,x0,0 +8000923c: 00000013 addi x0,x0,0 +80009240: 00010517 auipc x10,0x10 +80009244: 04350513 addi x10,x10,67 # 80019283 +80009248: 00000013 addi x0,x0,0 +8000924c: 00000013 addi x0,x0,0 +80009250: 00000013 addi x0,x0,0 +80009254: 00000013 addi x0,x0,0 +80009258: 00000013 addi x0,x0,0 +8000925c: 00000013 addi x0,x0,0 +80009260: 1000006f jal x0,80009360 + +80009264 : +80009264: 00000013 addi x0,x0,0 +80009268: 00000013 addi x0,x0,0 +8000926c: 00000013 addi x0,x0,0 +80009270: 00000013 addi x0,x0,0 +80009274: 00000013 addi x0,x0,0 +80009278: 00000013 addi x0,x0,0 +8000927c: 00000013 addi x0,x0,0 +80009280: 00010517 auipc x10,0x10 +80009284: fe150513 addi x10,x10,-31 # 80019261 +80009288: 00000013 addi x0,x0,0 +8000928c: 00000013 addi x0,x0,0 +80009290: 00000013 addi x0,x0,0 +80009294: 00000013 addi x0,x0,0 +80009298: 00000013 addi x0,x0,0 +8000929c: 00000013 addi x0,x0,0 +800092a0: 0c00006f jal x0,80009360 + +800092a4 : +800092a4: 00000013 addi x0,x0,0 +800092a8: 00000013 addi x0,x0,0 +800092ac: 00000013 addi x0,x0,0 +800092b0: 00000013 addi x0,x0,0 +800092b4: 00000013 addi x0,x0,0 +800092b8: 00000013 addi x0,x0,0 +800092bc: 00000013 addi x0,x0,0 +800092c0: 00010517 auipc x10,0x10 +800092c4: fa950513 addi x10,x10,-87 # 80019269 +800092c8: 00000013 addi x0,x0,0 +800092cc: 00000013 addi x0,x0,0 +800092d0: 00000013 addi x0,x0,0 +800092d4: 00000013 addi x0,x0,0 +800092d8: 00000013 addi x0,x0,0 +800092dc: 00000013 addi x0,x0,0 +800092e0: 0800006f jal x0,80009360 + +800092e4 : +800092e4: 00000013 addi x0,x0,0 +800092e8: 00000013 addi x0,x0,0 +800092ec: 00000013 addi x0,x0,0 +800092f0: 00000013 addi x0,x0,0 +800092f4: 00000013 addi x0,x0,0 +800092f8: 00000013 addi x0,x0,0 +800092fc: 00000013 addi x0,x0,0 +80009300: 00010517 auipc x10,0x10 +80009304: f7150513 addi x10,x10,-143 # 80019271 +80009308: 00000013 addi x0,x0,0 +8000930c: 00000013 addi x0,x0,0 +80009310: 00000013 addi x0,x0,0 +80009314: 00000013 addi x0,x0,0 +80009318: 00000013 addi x0,x0,0 +8000931c: 00000013 addi x0,x0,0 +80009320: 0400006f jal x0,80009360 + +80009324 : +80009324: 00000013 addi x0,x0,0 +80009328: 00000013 addi x0,x0,0 +8000932c: 00000013 addi x0,x0,0 +80009330: 00000013 addi x0,x0,0 +80009334: 00000013 addi x0,x0,0 +80009338: 00000013 addi x0,x0,0 +8000933c: 00000013 addi x0,x0,0 +80009340: 00010517 auipc x10,0x10 +80009344: f3a50513 addi x10,x10,-198 # 8001927a +80009348: 00000013 addi x0,x0,0 +8000934c: 00000013 addi x0,x0,0 +80009350: 00000013 addi x0,x0,0 +80009354: 00000013 addi x0,x0,0 +80009358: 00000013 addi x0,x0,0 +8000935c: 00000013 addi x0,x0,0 + +80009360 : +80009360: 00021097 auipc x1,0x21 +80009364: 204080e7 jalr x1,516(x1) # 8002a564 +80009368: 00000013 addi x0,x0,0 +8000936c: 00000013 addi x0,x0,0 +80009370: 00000013 addi x0,x0,0 +80009374: 00000013 addi x0,x0,0 +80009378: 00000013 addi x0,x0,0 +8000937c: 00000013 addi x0,x0,0 +80009380: 00010517 auipc x10,0x10 +80009384: f0c50513 addi x10,x10,-244 # 8001928c +80009388: 00000013 addi x0,x0,0 +8000938c: 00000013 addi x0,x0,0 +80009390: 00000013 addi x0,x0,0 +80009394: 00000013 addi x0,x0,0 +80009398: 00000013 addi x0,x0,0 +8000939c: 00000013 addi x0,x0,0 +800093a0: 00021097 auipc x1,0x21 +800093a4: 1c4080e7 jalr x1,452(x1) # 8002a564 +800093a8: 0000f517 auipc x10,0xf +800093ac: 9c852503 lw x10,-1592(x10) # 80017d70 +800093b0: 00100593 addi x11,x0,1 +800093b4: 06b50863 beq x10,x11,80009424 +800093b8: 00200593 addi x11,x0,2 +800093bc: 0ab50463 beq x10,x11,80009464 +800093c0: 00300593 addi x11,x0,3 +800093c4: 0eb50063 beq x10,x11,800094a4 +800093c8: 00400593 addi x11,x0,4 +800093cc: 10b50c63 beq x10,x11,800094e4 +800093d0: 00500593 addi x11,x0,5 +800093d4: 14b50863 beq x10,x11,80009524 +800093d8: 00600593 addi x11,x0,6 +800093dc: 18b50463 beq x10,x11,80009564 +800093e0: 00700593 addi x11,x0,7 +800093e4: 1cb50063 beq x10,x11,800095a4 +800093e8: 00800593 addi x11,x0,8 +800093ec: 1eb50c63 beq x10,x11,800095e4 +800093f0: 00000013 addi x0,x0,0 +800093f4: 00000013 addi x0,x0,0 +800093f8: 00000013 addi x0,x0,0 +800093fc: 00000013 addi x0,x0,0 +80009400: 00010517 auipc x10,0x10 +80009404: fe350513 addi x10,x10,-29 # 800193e3 +80009408: 00000013 addi x0,x0,0 +8000940c: 00000013 addi x0,x0,0 +80009410: 00000013 addi x0,x0,0 +80009414: 00000013 addi x0,x0,0 +80009418: 00000013 addi x0,x0,0 +8000941c: 00000013 addi x0,x0,0 +80009420: 2000006f jal x0,80009620 + +80009424 : +80009424: 00000013 addi x0,x0,0 +80009428: 00000013 addi x0,x0,0 +8000942c: 00000013 addi x0,x0,0 +80009430: 00000013 addi x0,x0,0 +80009434: 00000013 addi x0,x0,0 +80009438: 00000013 addi x0,x0,0 +8000943c: 00000013 addi x0,x0,0 +80009440: 00010517 auipc x10,0x10 +80009444: e6650513 addi x10,x10,-410 # 800192a6 +80009448: 00000013 addi x0,x0,0 +8000944c: 00000013 addi x0,x0,0 +80009450: 00000013 addi x0,x0,0 +80009454: 00000013 addi x0,x0,0 +80009458: 00000013 addi x0,x0,0 +8000945c: 00000013 addi x0,x0,0 +80009460: 1c00006f jal x0,80009620 + +80009464 : +80009464: 00000013 addi x0,x0,0 +80009468: 00000013 addi x0,x0,0 +8000946c: 00000013 addi x0,x0,0 +80009470: 00000013 addi x0,x0,0 +80009474: 00000013 addi x0,x0,0 +80009478: 00000013 addi x0,x0,0 +8000947c: 00000013 addi x0,x0,0 +80009480: 00010517 auipc x10,0x10 +80009484: e5750513 addi x10,x10,-425 # 800192d7 +80009488: 00000013 addi x0,x0,0 +8000948c: 00000013 addi x0,x0,0 +80009490: 00000013 addi x0,x0,0 +80009494: 00000013 addi x0,x0,0 +80009498: 00000013 addi x0,x0,0 +8000949c: 00000013 addi x0,x0,0 +800094a0: 1800006f jal x0,80009620 + +800094a4 : +800094a4: 00000013 addi x0,x0,0 +800094a8: 00000013 addi x0,x0,0 +800094ac: 00000013 addi x0,x0,0 +800094b0: 00000013 addi x0,x0,0 +800094b4: 00000013 addi x0,x0,0 +800094b8: 00000013 addi x0,x0,0 +800094bc: 00000013 addi x0,x0,0 +800094c0: 00010517 auipc x10,0x10 +800094c4: e3750513 addi x10,x10,-457 # 800192f7 +800094c8: 00000013 addi x0,x0,0 +800094cc: 00000013 addi x0,x0,0 +800094d0: 00000013 addi x0,x0,0 +800094d4: 00000013 addi x0,x0,0 +800094d8: 00000013 addi x0,x0,0 +800094dc: 00000013 addi x0,x0,0 +800094e0: 1400006f jal x0,80009620 + +800094e4 : +800094e4: 00000013 addi x0,x0,0 +800094e8: 00000013 addi x0,x0,0 +800094ec: 00000013 addi x0,x0,0 +800094f0: 00000013 addi x0,x0,0 +800094f4: 00000013 addi x0,x0,0 +800094f8: 00000013 addi x0,x0,0 +800094fc: 00000013 addi x0,x0,0 +80009500: 00010517 auipc x10,0x10 +80009504: e1550513 addi x10,x10,-491 # 80019315 +80009508: 00000013 addi x0,x0,0 +8000950c: 00000013 addi x0,x0,0 +80009510: 00000013 addi x0,x0,0 +80009514: 00000013 addi x0,x0,0 +80009518: 00000013 addi x0,x0,0 +8000951c: 00000013 addi x0,x0,0 +80009520: 1000006f jal x0,80009620 + +80009524 : +80009524: 00000013 addi x0,x0,0 +80009528: 00000013 addi x0,x0,0 +8000952c: 00000013 addi x0,x0,0 +80009530: 00000013 addi x0,x0,0 +80009534: 00000013 addi x0,x0,0 +80009538: 00000013 addi x0,x0,0 +8000953c: 00000013 addi x0,x0,0 +80009540: 00010517 auipc x10,0x10 +80009544: df450513 addi x10,x10,-524 # 80019334 +80009548: 00000013 addi x0,x0,0 +8000954c: 00000013 addi x0,x0,0 +80009550: 00000013 addi x0,x0,0 +80009554: 00000013 addi x0,x0,0 +80009558: 00000013 addi x0,x0,0 +8000955c: 00000013 addi x0,x0,0 +80009560: 0c00006f jal x0,80009620 + +80009564 : +80009564: 00000013 addi x0,x0,0 +80009568: 00000013 addi x0,x0,0 +8000956c: 00000013 addi x0,x0,0 +80009570: 00000013 addi x0,x0,0 +80009574: 00000013 addi x0,x0,0 +80009578: 00000013 addi x0,x0,0 +8000957c: 00000013 addi x0,x0,0 +80009580: 00010517 auipc x10,0x10 +80009584: ddc50513 addi x10,x10,-548 # 8001935c +80009588: 00000013 addi x0,x0,0 +8000958c: 00000013 addi x0,x0,0 +80009590: 00000013 addi x0,x0,0 +80009594: 00000013 addi x0,x0,0 +80009598: 00000013 addi x0,x0,0 +8000959c: 00000013 addi x0,x0,0 +800095a0: 0800006f jal x0,80009620 + +800095a4 : +800095a4: 00000013 addi x0,x0,0 +800095a8: 00000013 addi x0,x0,0 +800095ac: 00000013 addi x0,x0,0 +800095b0: 00000013 addi x0,x0,0 +800095b4: 00000013 addi x0,x0,0 +800095b8: 00000013 addi x0,x0,0 +800095bc: 00000013 addi x0,x0,0 +800095c0: 00010517 auipc x10,0x10 +800095c4: dc850513 addi x10,x10,-568 # 80019388 +800095c8: 00000013 addi x0,x0,0 +800095cc: 00000013 addi x0,x0,0 +800095d0: 00000013 addi x0,x0,0 +800095d4: 00000013 addi x0,x0,0 +800095d8: 00000013 addi x0,x0,0 +800095dc: 00000013 addi x0,x0,0 +800095e0: 0400006f jal x0,80009620 + +800095e4 : +800095e4: 00000013 addi x0,x0,0 +800095e8: 00000013 addi x0,x0,0 +800095ec: 00000013 addi x0,x0,0 +800095f0: 00000013 addi x0,x0,0 +800095f4: 00000013 addi x0,x0,0 +800095f8: 00000013 addi x0,x0,0 +800095fc: 00000013 addi x0,x0,0 +80009600: 00010517 auipc x10,0x10 +80009604: db450513 addi x10,x10,-588 # 800193b4 +80009608: 00000013 addi x0,x0,0 +8000960c: 00000013 addi x0,x0,0 +80009610: 00000013 addi x0,x0,0 +80009614: 00000013 addi x0,x0,0 +80009618: 00000013 addi x0,x0,0 +8000961c: 00000013 addi x0,x0,0 + +80009620 : +80009620: 00021097 auipc x1,0x21 +80009624: f44080e7 jalr x1,-188(x1) # 8002a564 +80009628: 00000013 addi x0,x0,0 +8000962c: 00000013 addi x0,x0,0 +80009630: 00000013 addi x0,x0,0 +80009634: 00000013 addi x0,x0,0 +80009638: 00000013 addi x0,x0,0 +8000963c: 00000013 addi x0,x0,0 +80009640: 00010517 auipc x10,0x10 +80009644: db250513 addi x10,x10,-590 # 800193f2 +80009648: 00000013 addi x0,x0,0 +8000964c: 00000013 addi x0,x0,0 +80009650: 00000013 addi x0,x0,0 +80009654: 00000013 addi x0,x0,0 +80009658: 00000013 addi x0,x0,0 +8000965c: 00000013 addi x0,x0,0 +80009660: 00021097 auipc x1,0x21 +80009664: f04080e7 jalr x1,-252(x1) # 8002a564 +80009668: 0000e517 auipc x10,0xe +8000966c: 6f052503 lw x10,1776(x10) # 80017d58 +80009670: 02000593 addi x11,x0,32 +80009674: 664000ef jal x1,80009cd8 +80009678: 00000013 addi x0,x0,0 +8000967c: 00000013 addi x0,x0,0 +80009680: 0000e517 auipc x10,0xe +80009684: 72850513 addi x10,x10,1832 # 80017da8 +80009688: 00000013 addi x0,x0,0 +8000968c: 00000013 addi x0,x0,0 +80009690: 00000013 addi x0,x0,0 +80009694: 00000013 addi x0,x0,0 +80009698: 00000013 addi x0,x0,0 +8000969c: 00000013 addi x0,x0,0 +800096a0: 00021097 auipc x1,0x21 +800096a4: ec4080e7 jalr x1,-316(x1) # 8002a564 +800096a8: 00000013 addi x0,x0,0 +800096ac: 00000013 addi x0,x0,0 +800096b0: 00000013 addi x0,x0,0 +800096b4: 00000013 addi x0,x0,0 +800096b8: 00000013 addi x0,x0,0 +800096bc: 00000013 addi x0,x0,0 +800096c0: 00010517 auipc x10,0x10 +800096c4: d4950513 addi x10,x10,-695 # 80019409 +800096c8: 00000013 addi x0,x0,0 +800096cc: 00000013 addi x0,x0,0 +800096d0: 00000013 addi x0,x0,0 +800096d4: 00000013 addi x0,x0,0 +800096d8: 00000013 addi x0,x0,0 +800096dc: 00000013 addi x0,x0,0 +800096e0: 00021097 auipc x1,0x21 +800096e4: e84080e7 jalr x1,-380(x1) # 8002a564 +800096e8: 0000e517 auipc x10,0xe +800096ec: 66852503 lw x10,1640(x10) # 80017d50 +800096f0: 02000593 addi x11,x0,32 +800096f4: 5e4000ef jal x1,80009cd8 +800096f8: 00000013 addi x0,x0,0 +800096fc: 00000013 addi x0,x0,0 +80009700: 0000e517 auipc x10,0xe +80009704: 6a850513 addi x10,x10,1704 # 80017da8 +80009708: 00000013 addi x0,x0,0 +8000970c: 00000013 addi x0,x0,0 +80009710: 00000013 addi x0,x0,0 +80009714: 00000013 addi x0,x0,0 +80009718: 00000013 addi x0,x0,0 +8000971c: 00000013 addi x0,x0,0 +80009720: 00021097 auipc x1,0x21 +80009724: e44080e7 jalr x1,-444(x1) # 8002a564 +80009728: 0000e517 auipc x10,0xe +8000972c: 64852503 lw x10,1608(x10) # 80017d70 +80009730: 00200593 addi x11,x0,2 +80009734: 08b51463 bne x10,x11,800097bc +80009738: 00000013 addi x0,x0,0 +8000973c: 00000013 addi x0,x0,0 +80009740: 00010517 auipc x10,0x10 +80009744: ce050513 addi x10,x10,-800 # 80019420 +80009748: 00000013 addi x0,x0,0 +8000974c: 00000013 addi x0,x0,0 +80009750: 00000013 addi x0,x0,0 +80009754: 00000013 addi x0,x0,0 +80009758: 00000013 addi x0,x0,0 +8000975c: 00000013 addi x0,x0,0 +80009760: 00021097 auipc x1,0x21 +80009764: e04080e7 jalr x1,-508(x1) # 8002a564 +80009768: 0000e517 auipc x10,0xe +8000976c: 5f052503 lw x10,1520(x10) # 80017d58 +80009770: 284000ef jal x1,800099f4 +80009774: 00021097 auipc x1,0x21 +80009778: df0080e7 jalr x1,-528(x1) # 8002a564 +8000977c: 00000013 addi x0,x0,0 +80009780: 00010517 auipc x10,0x10 +80009784: cb750513 addi x10,x10,-841 # 80019437 +80009788: 00000013 addi x0,x0,0 +8000978c: 00000013 addi x0,x0,0 +80009790: 00000013 addi x0,x0,0 +80009794: 00000013 addi x0,x0,0 +80009798: 00000013 addi x0,x0,0 +8000979c: 00000013 addi x0,x0,0 +800097a0: 00021097 auipc x1,0x21 +800097a4: dc4080e7 jalr x1,-572(x1) # 8002a564 +800097a8: 0000e517 auipc x10,0xe +800097ac: 5a852503 lw x10,1448(x10) # 80017d50 +800097b0: 244000ef jal x1,800099f4 +800097b4: 00021097 auipc x1,0x21 +800097b8: db0080e7 jalr x1,-592(x1) # 8002a564 + +800097bc : +800097bc: 00000097 auipc x1,0x0 +800097c0: 314080e7 jalr x1,788(x1) # 80009ad0 +800097c4: 0000e517 auipc x10,0xe +800097c8: 5ac52503 lw x10,1452(x10) # 80017d70 +800097cc: 00100593 addi x11,x0,1 +800097d0: 02b51e63 bne x10,x11,8000980c +800097d4: 00000013 addi x0,x0,0 +800097d8: 00000013 addi x0,x0,0 +800097dc: 00000013 addi x0,x0,0 +800097e0: 00010517 auipc x10,0x10 +800097e4: ccd50513 addi x10,x10,-819 # 800194ad +800097e8: 00000013 addi x0,x0,0 +800097ec: 00000013 addi x0,x0,0 +800097f0: 00000013 addi x0,x0,0 +800097f4: 00000013 addi x0,x0,0 +800097f8: 00000013 addi x0,x0,0 +800097fc: 00000013 addi x0,x0,0 +80009800: 00021097 auipc x1,0x21 +80009804: d64080e7 jalr x1,-668(x1) # 8002a564 +80009808: 27c0006f jal x0,80009a84 +8000980c: 00200593 addi x11,x0,2 +80009810: 02b51e63 bne x10,x11,8000984c +80009814: 00000013 addi x0,x0,0 +80009818: 00000013 addi x0,x0,0 +8000981c: 00000013 addi x0,x0,0 +80009820: 00010517 auipc x10,0x10 +80009824: d6350513 addi x10,x10,-669 # 80019583 +80009828: 00000013 addi x0,x0,0 +8000982c: 00000013 addi x0,x0,0 +80009830: 00000013 addi x0,x0,0 +80009834: 00000013 addi x0,x0,0 +80009838: 00000013 addi x0,x0,0 +8000983c: 00000013 addi x0,x0,0 +80009840: 00021097 auipc x1,0x21 +80009844: d24080e7 jalr x1,-732(x1) # 8002a564 +80009848: 23c0006f jal x0,80009a84 +8000984c: 00300593 addi x11,x0,3 +80009850: 02b51e63 bne x10,x11,8000988c +80009854: 00000013 addi x0,x0,0 +80009858: 00000013 addi x0,x0,0 +8000985c: 00000013 addi x0,x0,0 +80009860: 00010517 auipc x10,0x10 +80009864: e1650513 addi x10,x10,-490 # 80019676 +80009868: 00000013 addi x0,x0,0 +8000986c: 00000013 addi x0,x0,0 +80009870: 00000013 addi x0,x0,0 +80009874: 00000013 addi x0,x0,0 +80009878: 00000013 addi x0,x0,0 +8000987c: 00000013 addi x0,x0,0 +80009880: 00021097 auipc x1,0x21 +80009884: ce4080e7 jalr x1,-796(x1) # 8002a564 +80009888: 1fc0006f jal x0,80009a84 +8000988c: 00400593 addi x11,x0,4 +80009890: 02b51e63 bne x10,x11,800098cc +80009894: 00000013 addi x0,x0,0 +80009898: 00000013 addi x0,x0,0 +8000989c: 00000013 addi x0,x0,0 +800098a0: 00010517 auipc x10,0x10 +800098a4: ed150513 addi x10,x10,-303 # 80019771 +800098a8: 00000013 addi x0,x0,0 +800098ac: 00000013 addi x0,x0,0 +800098b0: 00000013 addi x0,x0,0 +800098b4: 00000013 addi x0,x0,0 +800098b8: 00000013 addi x0,x0,0 +800098bc: 00000013 addi x0,x0,0 +800098c0: 00021097 auipc x1,0x21 +800098c4: ca4080e7 jalr x1,-860(x1) # 8002a564 +800098c8: 1bc0006f jal x0,80009a84 +800098cc: 00500593 addi x11,x0,5 +800098d0: 02b51e63 bne x10,x11,8000990c +800098d4: 00000013 addi x0,x0,0 +800098d8: 00000013 addi x0,x0,0 +800098dc: 00000013 addi x0,x0,0 +800098e0: 00010517 auipc x10,0x10 +800098e4: f7850513 addi x10,x10,-136 # 80019858 +800098e8: 00000013 addi x0,x0,0 +800098ec: 00000013 addi x0,x0,0 +800098f0: 00000013 addi x0,x0,0 +800098f4: 00000013 addi x0,x0,0 +800098f8: 00000013 addi x0,x0,0 +800098fc: 00000013 addi x0,x0,0 +80009900: 00021097 auipc x1,0x21 +80009904: c64080e7 jalr x1,-924(x1) # 8002a564 +80009908: 17c0006f jal x0,80009a84 +8000990c: 1780006f jal x0,80009a84 + +80009910 : +80009910: 00000013 addi x0,x0,0 +80009914: 00000013 addi x0,x0,0 +80009918: 00000013 addi x0,x0,0 +8000991c: 00000013 addi x0,x0,0 +80009920: 00010517 auipc x10,0x10 +80009924: b4550513 addi x10,x10,-1211 # 80019465 +80009928: 00000013 addi x0,x0,0 +8000992c: 00000013 addi x0,x0,0 +80009930: 00000013 addi x0,x0,0 +80009934: 00000013 addi x0,x0,0 +80009938: 00000013 addi x0,x0,0 +8000993c: 00000013 addi x0,x0,0 +80009940: 00021097 auipc x1,0x21 +80009944: c24080e7 jalr x1,-988(x1) # 8002a564 +80009948: 0000e617 auipc x12,0xe +8000994c: 44062603 lw x12,1088(x12) # 80017d88 +80009950: 00000013 addi x0,x0,0 +80009954: 00000013 addi x0,x0,0 +80009958: 00000013 addi x0,x0,0 +8000995c: 00000013 addi x0,x0,0 +80009960: 0000f517 auipc x10,0xf +80009964: aee50513 addi x10,x10,-1298 # 8001844e +80009968: 00000013 addi x0,x0,0 +8000996c: 00000013 addi x0,x0,0 +80009970: 00000013 addi x0,x0,0 +80009974: 00000013 addi x0,x0,0 +80009978: 00000013 addi x0,x0,0 +8000997c: 00000013 addi x0,x0,0 +80009980: 00021097 auipc x1,0x21 +80009984: be4080e7 jalr x1,-1052(x1) # 8002a564 +80009988: 00065503 lhu x10,0(x12) +8000998c: 01000593 addi x11,x0,16 +80009990: 00357413 andi x8,x10,3 +80009994: 00300493 addi x9,x0,3 +80009998: 00941a63 bne x8,x9,800099ac +8000999c: 00265403 lhu x8,2(x12) +800099a0: 01041413 slli x8,x8,0x10 +800099a4: 00856533 or x10,x10,x8 +800099a8: 02000593 addi x11,x0,32 +800099ac: 32c000ef jal x1,80009cd8 +800099b0: 00000013 addi x0,x0,0 +800099b4: 00000013 addi x0,x0,0 +800099b8: 00000013 addi x0,x0,0 +800099bc: 00000013 addi x0,x0,0 +800099c0: 0000e517 auipc x10,0xe +800099c4: 3e850513 addi x10,x10,1000 # 80017da8 +800099c8: 00000013 addi x0,x0,0 +800099cc: 00000013 addi x0,x0,0 +800099d0: 00000013 addi x0,x0,0 +800099d4: 00000013 addi x0,x0,0 +800099d8: 00000013 addi x0,x0,0 +800099dc: 00000013 addi x0,x0,0 +800099e0: 00021097 auipc x1,0x21 +800099e4: b84080e7 jalr x1,-1148(x1) # 8002a564 +800099e8: 00000097 auipc x1,0x0 +800099ec: 0e8080e7 jalr x1,232(x1) # 80009ad0 +800099f0: 0940006f jal x0,80009a84 + +800099f4 : +800099f4: 02054263 blt x10,x0,80009a18 + +800099f8 : +800099f8: 01800593 addi x11,x0,24 +800099fc: 04b55463 bge x10,x11,80009a44 +80009a00: 0000e597 auipc x11,0xe +80009a04: 3d058593 addi x11,x11,976 # 80017dd0 +80009a08: 00251613 slli x12,x10,0x2 +80009a0c: 00c585b3 add x11,x11,x12 +80009a10: 0005a503 lw x10,0(x11) +80009a14: 00008067 jalr x0,0(x1) + +80009a18 : +80009a18: 00100593 addi x11,x0,1 +80009a1c: 01f59593 slli x11,x11,0x1f +80009a20: 00b54533 xor x10,x10,x11 +80009a24: 01000593 addi x11,x0,16 +80009a28: 00b55e63 bge x10,x11,80009a44 +80009a2c: 0000e597 auipc x11,0xe +80009a30: 40458593 addi x11,x11,1028 # 80017e30 +80009a34: 00251613 slli x12,x10,0x2 +80009a38: 00c585b3 add x11,x11,x12 +80009a3c: 0005a503 lw x10,0(x11) +80009a40: 00008067 jalr x0,0(x1) + +80009a44 : +80009a44: 00000013 addi x0,x0,0 +80009a48: 00000013 addi x0,x0,0 +80009a4c: 00000013 addi x0,x0,0 +80009a50: 00000013 addi x0,x0,0 +80009a54: 00000013 addi x0,x0,0 +80009a58: 00000013 addi x0,x0,0 +80009a5c: 00000013 addi x0,x0,0 +80009a60: 0000f517 auipc x10,0xf +80009a64: 80e50513 addi x10,x10,-2034 # 8001826e +80009a68: 00000013 addi x0,x0,0 +80009a6c: 00000013 addi x0,x0,0 +80009a70: 00000013 addi x0,x0,0 +80009a74: 00000013 addi x0,x0,0 +80009a78: 00000013 addi x0,x0,0 +80009a7c: 00000013 addi x0,x0,0 +80009a80: 00008067 jalr x0,0(x1) + +80009a84 : +80009a84: 00000013 addi x0,x0,0 +80009a88: 00000013 addi x0,x0,0 +80009a8c: 00000013 addi x0,x0,0 +80009a90: 00000013 addi x0,x0,0 +80009a94: 00000013 addi x0,x0,0 +80009a98: 00000013 addi x0,x0,0 +80009a9c: 00000013 addi x0,x0,0 +80009aa0: 0000f517 auipc x10,0xf +80009aa4: 46650513 addi x10,x10,1126 # 80018f06 +80009aa8: 00000013 addi x0,x0,0 +80009aac: 00000013 addi x0,x0,0 +80009ab0: 00000013 addi x0,x0,0 +80009ab4: 00000013 addi x0,x0,0 +80009ab8: 00000013 addi x0,x0,0 +80009abc: 00000013 addi x0,x0,0 +80009ac0: 00021097 auipc x1,0x21 +80009ac4: aa4080e7 jalr x1,-1372(x1) # 8002a564 + +80009ac8 : +80009ac8: 00021097 auipc x1,0x21 +80009acc: afc080e7 jalr x1,-1284(x1) # 8002a5c4 + +80009ad0 : +80009ad0: 0000e617 auipc x12,0xe +80009ad4: 2b060613 addi x12,x12,688 # 80017d80 +80009ad8: 00162023 sw x1,0(x12) +80009adc: 00000013 addi x0,x0,0 +80009ae0: 0000f517 auipc x10,0xf +80009ae4: 98f50513 addi x10,x10,-1649 # 8001846f +80009ae8: 00000013 addi x0,x0,0 +80009aec: 00000013 addi x0,x0,0 +80009af0: 00000013 addi x0,x0,0 +80009af4: 00000013 addi x0,x0,0 +80009af8: 00000013 addi x0,x0,0 +80009afc: 00000013 addi x0,x0,0 +80009b00: 00021097 auipc x1,0x21 +80009b04: a64080e7 jalr x1,-1436(x1) # 8002a564 +80009b08: 0000e517 auipc x10,0xe +80009b0c: 28052503 lw x10,640(x10) # 80017d88 +80009b10: 02000593 addi x11,x0,32 +80009b14: 1c4000ef jal x1,80009cd8 +80009b18: 00000013 addi x0,x0,0 +80009b1c: 00000013 addi x0,x0,0 +80009b20: 0000e517 auipc x10,0xe +80009b24: 28850513 addi x10,x10,648 # 80017da8 +80009b28: 00000013 addi x0,x0,0 +80009b2c: 00000013 addi x0,x0,0 +80009b30: 00000013 addi x0,x0,0 +80009b34: 00000013 addi x0,x0,0 +80009b38: 00000013 addi x0,x0,0 +80009b3c: 00000013 addi x0,x0,0 +80009b40: 00021097 auipc x1,0x21 +80009b44: a24080e7 jalr x1,-1500(x1) # 8002a564 +80009b48: 00000013 addi x0,x0,0 +80009b4c: 00000013 addi x0,x0,0 +80009b50: 00000013 addi x0,x0,0 +80009b54: 00000013 addi x0,x0,0 +80009b58: 00000013 addi x0,x0,0 +80009b5c: 00000013 addi x0,x0,0 +80009b60: 0000f517 auipc x10,0xf +80009b64: 91f50513 addi x10,x10,-1761 # 8001847f +80009b68: 00000013 addi x0,x0,0 +80009b6c: 00000013 addi x0,x0,0 +80009b70: 00000013 addi x0,x0,0 +80009b74: 00000013 addi x0,x0,0 +80009b78: 00000013 addi x0,x0,0 +80009b7c: 00000013 addi x0,x0,0 +80009b80: 00021097 auipc x1,0x21 +80009b84: 9e4080e7 jalr x1,-1564(x1) # 8002a564 +80009b88: 0000e517 auipc x10,0xe +80009b8c: 20852503 lw x10,520(x10) # 80017d90 +80009b90: 02000593 addi x11,x0,32 +80009b94: 144000ef jal x1,80009cd8 +80009b98: 00000013 addi x0,x0,0 +80009b9c: 00000013 addi x0,x0,0 +80009ba0: 0000e517 auipc x10,0xe +80009ba4: 20850513 addi x10,x10,520 # 80017da8 +80009ba8: 00000013 addi x0,x0,0 +80009bac: 00000013 addi x0,x0,0 +80009bb0: 00000013 addi x0,x0,0 +80009bb4: 00000013 addi x0,x0,0 +80009bb8: 00000013 addi x0,x0,0 +80009bbc: 00000013 addi x0,x0,0 +80009bc0: 00021097 auipc x1,0x21 +80009bc4: 9a4080e7 jalr x1,-1628(x1) # 8002a564 +80009bc8: 00000013 addi x0,x0,0 +80009bcc: 00000013 addi x0,x0,0 +80009bd0: 00000013 addi x0,x0,0 +80009bd4: 00000013 addi x0,x0,0 +80009bd8: 00000013 addi x0,x0,0 +80009bdc: 00000013 addi x0,x0,0 +80009be0: 0000f517 auipc x10,0xf +80009be4: 8af50513 addi x10,x10,-1873 # 8001848f +80009be8: 00000013 addi x0,x0,0 +80009bec: 00000013 addi x0,x0,0 +80009bf0: 00000013 addi x0,x0,0 +80009bf4: 00000013 addi x0,x0,0 +80009bf8: 00000013 addi x0,x0,0 +80009bfc: 00000013 addi x0,x0,0 +80009c00: 00021097 auipc x1,0x21 +80009c04: 964080e7 jalr x1,-1692(x1) # 8002a564 +80009c08: 0000e517 auipc x10,0xe +80009c0c: 19052503 lw x10,400(x10) # 80017d98 +80009c10: 02000593 addi x11,x0,32 +80009c14: 0c4000ef jal x1,80009cd8 +80009c18: 00000013 addi x0,x0,0 +80009c1c: 00000013 addi x0,x0,0 +80009c20: 0000e517 auipc x10,0xe +80009c24: 18850513 addi x10,x10,392 # 80017da8 +80009c28: 00000013 addi x0,x0,0 +80009c2c: 00000013 addi x0,x0,0 +80009c30: 00000013 addi x0,x0,0 +80009c34: 00000013 addi x0,x0,0 +80009c38: 00000013 addi x0,x0,0 +80009c3c: 00000013 addi x0,x0,0 +80009c40: 00021097 auipc x1,0x21 +80009c44: 924080e7 jalr x1,-1756(x1) # 8002a564 +80009c48: 00000013 addi x0,x0,0 +80009c4c: 00000013 addi x0,x0,0 +80009c50: 00000013 addi x0,x0,0 +80009c54: 00000013 addi x0,x0,0 +80009c58: 00000013 addi x0,x0,0 +80009c5c: 00000013 addi x0,x0,0 +80009c60: 0000f517 auipc x10,0xf +80009c64: 83f50513 addi x10,x10,-1985 # 8001849f +80009c68: 00000013 addi x0,x0,0 +80009c6c: 00000013 addi x0,x0,0 +80009c70: 00000013 addi x0,x0,0 +80009c74: 00000013 addi x0,x0,0 +80009c78: 00000013 addi x0,x0,0 +80009c7c: 00000013 addi x0,x0,0 +80009c80: 00021097 auipc x1,0x21 +80009c84: 8e4080e7 jalr x1,-1820(x1) # 8002a564 +80009c88: 0000e517 auipc x10,0xe +80009c8c: 11852503 lw x10,280(x10) # 80017da0 +80009c90: 02000593 addi x11,x0,32 +80009c94: 044000ef jal x1,80009cd8 +80009c98: 00000013 addi x0,x0,0 +80009c9c: 00000013 addi x0,x0,0 +80009ca0: 0000e517 auipc x10,0xe +80009ca4: 10850513 addi x10,x10,264 # 80017da8 +80009ca8: 00000013 addi x0,x0,0 +80009cac: 00000013 addi x0,x0,0 +80009cb0: 00000013 addi x0,x0,0 +80009cb4: 00000013 addi x0,x0,0 +80009cb8: 00000013 addi x0,x0,0 +80009cbc: 00000013 addi x0,x0,0 +80009cc0: 00021097 auipc x1,0x21 +80009cc4: 8a4080e7 jalr x1,-1884(x1) # 8002a564 +80009cc8: 0000e617 auipc x12,0xe +80009ccc: 0b860613 addi x12,x12,184 # 80017d80 +80009cd0: 00062083 lw x1,0(x12) +80009cd4: 00008067 jalr x0,0(x1) + +80009cd8 : +80009cd8: 00000013 addi x0,x0,0 +80009cdc: 00000013 addi x0,x0,0 +80009ce0: 0000e617 auipc x12,0xe +80009ce4: 0c860613 addi x12,x12,200 # 80017da8 +80009ce8: 00000013 addi x0,x0,0 +80009cec: 00000013 addi x0,x0,0 +80009cf0: 00000013 addi x0,x0,0 +80009cf4: 00000013 addi x0,x0,0 +80009cf8: 00000013 addi x0,x0,0 +80009cfc: 00000013 addi x0,x0,0 +80009d00: 03000693 addi x13,x0,48 +80009d04: 00d60023 sb x13,0(x12) +80009d08: 07800693 addi x13,x0,120 +80009d0c: 00d600a3 sb x13,1(x12) +80009d10: 00260613 addi x12,x12,2 +80009d14: 00058693 addi x13,x11,0 + +80009d18 : +80009d18: ffc68693 addi x13,x13,-4 +80009d1c: 00d55733 srl x14,x10,x13 +80009d20: 00f77713 andi x14,x14,15 +80009d24: 00a00793 addi x15,x0,10 +80009d28: 00f74663 blt x14,x15,80009d34 +80009d2c: 05770713 addi x14,x14,87 +80009d30: 0080006f jal x0,80009d38 + +80009d34 : +80009d34: 03070713 addi x14,x14,48 + +80009d38 : +80009d38: 00e60023 sb x14,0(x12) +80009d3c: 00160613 addi x12,x12,1 +80009d40: fc069ce3 bne x13,x0,80009d18 +80009d44: 00a00693 addi x13,x0,10 +80009d48: 00d60023 sb x13,0(x12) +80009d4c: 000600a3 sb x0,1(x12) +80009d50: 00008067 jalr x0,0(x1) + +80009d54 : +80009d54: 00a00693 addi x13,x0,10 +80009d58: 02d54663 blt x10,x13,80009d84 +80009d5c: ff650513 addi x10,x10,-10 +80009d60: 03100713 addi x14,x0,49 +80009d64: 00d54c63 blt x10,x13,80009d7c +80009d68: ff650513 addi x10,x10,-10 +80009d6c: 03200713 addi x14,x0,50 +80009d70: 00d54663 blt x10,x13,80009d7c +80009d74: ff650513 addi x10,x10,-10 +80009d78: 03300713 addi x14,x0,51 +80009d7c: 00e60023 sb x14,0(x12) +80009d80: 00160613 addi x12,x12,1 +80009d84: 03050513 addi x10,x10,48 +80009d88: 00a60023 sb x10,0(x12) +80009d8c: 00a00693 addi x13,x0,10 +80009d90: 00d600a3 sb x13,1(x12) +80009d94: 00060123 sb x0,2(x12) +80009d98: 00008067 jalr x0,0(x1) +80009d9c: 00000013 addi x0,x0,0 +80009da0: 00000013 addi x0,x0,0 +80009da4: 00000013 addi x0,x0,0 +80009da8: 00000013 addi x0,x0,0 +80009dac: 00000013 addi x0,x0,0 +80009db0: 00000013 addi x0,x0,0 +80009db4: 00000013 addi x0,x0,0 +80009db8: 00000013 addi x0,x0,0 +80009dbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +8002a000 : +8002a000: 10010737 lui x14,0x10010 +8002a004: 00072023 sw x0,0(x14) # 10010000 +8002a008: fffde397 auipc x7,0xfffde +8002a00c: eb838393 addi x7,x7,-328 # 80007ec0 +8002a010: 00038067 jalr x0,0(x7) + +8002a014 : +8002a014: fff00713 addi x14,x0,-1 +8002a018: 100143b7 lui x7,0x10014 +8002a01c: 00e3a023 sw x14,0(x7) # 10014000 +8002a020: 00e3a223 sw x14,4(x7) +8002a024: fffde397 auipc x7,0xfffde +8002a028: e9c38393 addi x7,x7,-356 # 80007ec0 +8002a02c: 00038067 jalr x0,0(x7) + +8002a030 : +8002a030: 10000737 lui x14,0x10000 +8002a034: 01070713 addi x14,x14,16 # 10000010 +8002a038: 00070023 sb x0,0(x14) +8002a03c: fffde397 auipc x7,0xfffde +8002a040: e8438393 addi x7,x7,-380 # 80007ec0 +8002a044: 00038067 jalr x0,0(x7) + +8002a048 : +8002a048: 00200393 addi x7,x0,2 +8002a04c: 3443b073 csrrc x0,mip,x7 +8002a050: fffde397 auipc x7,0xfffde +8002a054: e7038393 addi x7,x7,-400 # 80007ec0 +8002a058: 00038067 jalr x0,0(x7) + +8002a05c : +8002a05c: fffde397 auipc x7,0xfffde +8002a060: e6438393 addi x7,x7,-412 # 80007ec0 +8002a064: 00038067 jalr x0,0(x7) + +8002a068 : +8002a068: 20000413 addi x8,x0,512 +8002a06c: 34443073 csrrc x0,mip,x8 +8002a070: 34402473 csrrs x8,mip,x0 +8002a074: 00001337 lui x6,0x1 +8002a078: 80030313 addi x6,x6,-2048 # 800 +8002a07c: 00647433 and x8,x8,x6 +8002a080: 00830863 beq x6,x8,8002a090 +8002a084: 10000737 lui x14,0x10000 +8002a088: 01870713 addi x14,x14,24 # 10000018 +8002a08c: 00070023 sb x0,0(x14) +8002a090: fffde397 auipc x7,0xfffde +8002a094: e3038393 addi x7,x7,-464 # 80007ec0 +8002a098: 00038067 jalr x0,0(x7) + +8002a09c : +8002a09c: fffdd317 auipc x6,0xfffdd +8002a0a0: 09830313 addi x6,x6,152 # 80007134 +8002a0a4: 00030067 jalr x0,0(x6) +8002a0a8: fffde397 auipc x7,0xfffde +8002a0ac: e1838393 addi x7,x7,-488 # 80007ec0 +8002a0b0: 00038067 jalr x0,0(x7) + +8002a0b4 : +8002a0b4: fffdd317 auipc x6,0xfffdd +8002a0b8: 08030313 addi x6,x6,128 # 80007134 +8002a0bc: 00030067 jalr x0,0(x6) +8002a0c0: fffde397 auipc x7,0xfffde +8002a0c4: e0038393 addi x7,x7,-512 # 80007ec0 +8002a0c8: 00038067 jalr x0,0(x7) + +8002a0cc : +8002a0cc: fffdd317 auipc x6,0xfffdd +8002a0d0: 06830313 addi x6,x6,104 # 80007134 +8002a0d4: 00030067 jalr x0,0(x6) +8002a0d8: fffde397 auipc x7,0xfffde +8002a0dc: de838393 addi x7,x7,-536 # 80007ec0 +8002a0e0: 00038067 jalr x0,0(x7) + +8002a0e4 : +8002a0e4: 30401073 csrrw x0,mie,x0 +8002a0e8: 34401073 csrrw x0,mip,x0 +8002a0ec: 34101073 csrrw x0,mepc,x0 +8002a0f0: 34301073 csrrw x0,mtval,x0 +8002a0f4: 34201073 csrrw x0,mcause,x0 +8002a0f8: 00000013 addi x0,x0,0 +8002a0fc: 00000013 addi x0,x0,0 +8002a100: fffe2317 auipc x6,0xfffe2 +8002a104: 01030313 addi x6,x6,16 # 8000c110 +8002a108: 00000013 addi x0,x0,0 +8002a10c: 00000013 addi x0,x0,0 +8002a110: 00000013 addi x0,x0,0 +8002a114: 00000013 addi x0,x0,0 +8002a118: 00000013 addi x0,x0,0 +8002a11c: 00000013 addi x0,x0,0 + +8002a120 : +8002a120: 34031473 csrrw x8,mscratch,x6 +8002a124: 24832823 sw x8,592(x6) + +8002a128 : +8002a128: fff00393 addi x7,x0,-1 +8002a12c: 100144b7 lui x9,0x10014 +8002a130: 0074a023 sw x7,0(x9) # 10014000 +8002a134: 0074a223 sw x7,4(x9) +8002a138: 00000013 addi x0,x0,0 + +8002a13c : +8002a13c: 00000393 addi x7,x0,0 +8002a140: 22732c23 sw x7,568(x6) + +8002a144 : +8002a144: 30502473 csrrs x8,mtvec,x0 +8002a148: 24832423 sw x8,584(x6) +8002a14c: 00347393 andi x7,x8,3 +8002a150: ffc3f393 andi x7,x7,-4 +8002a154: 23032483 lw x9,560(x6) +8002a158: e2848493 addi x9,x9,-472 +8002a15c: 0074e3b3 or x7,x9,x7 +8002a160: 24732023 sw x7,576(x6) +8002a164: 30539073 csrrw x0,mtvec,x7 +8002a168: 30502773 csrrs x14,mtvec,x0 +8002a16c: 0e770c63 beq x14,x7,8002a264 +8002a170: 30541073 csrrw x0,mtvec,x8 +8002a174: 0a040863 beq x8,x0,8002a224 +8002a178: 24832023 sw x8,576(x6) + +8002a17c : +8002a17c: ffc47393 andi x7,x8,-4 +8002a180: 1d838413 addi x8,x7,472 +8002a184: 00030113 addi x2,x6,0 +8002a188: 00000013 addi x0,x0,0 +8002a18c: 00000013 addi x0,x0,0 +8002a190: 00000013 addi x0,x0,0 +8002a194: 00000013 addi x0,x0,0 +8002a198: 00000013 addi x0,x0,0 +8002a19c: 00000013 addi x0,x0,0 +8002a1a0: 00000717 auipc x14,0x0 +8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec +8002a1a8: 00000013 addi x0,x0,0 +8002a1ac: 00000013 addi x0,x0,0 +8002a1b0: 00000013 addi x0,x0,0 +8002a1b4: 00000013 addi x0,x0,0 +8002a1b8: 00000013 addi x0,x0,0 +8002a1bc: 00000013 addi x0,x0,0 +8002a1c0: 00000797 auipc x15,0x0 +8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 +8002a1c8: 00000013 addi x0,x0,0 +8002a1cc: 00000013 addi x0,x0,0 +8002a1d0: 00000013 addi x0,x0,0 +8002a1d4: 00000013 addi x0,x0,0 +8002a1d8: 00000013 addi x0,x0,0 +8002a1dc: 00000013 addi x0,x0,0 +8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec +8002a1e4: 00877463 bgeu x14,x8,8002a1ec +8002a1e8: 03c0006f jal x0,8002a224 + +8002a1ec : +8002a1ec: 0003a783 lw x15,0(x7) +8002a1f0: 00f32023 sw x15,0(x6) +8002a1f4: 0004a703 lw x14,0(x9) +8002a1f8: 00e3a023 sw x14,0(x7) +8002a1fc: 0003a783 lw x15,0(x7) +8002a200: 00e79a63 bne x15,x14,8002a214 +8002a204: 00438393 addi x7,x7,4 +8002a208: 00430313 addi x6,x6,4 +8002a20c: 00448493 addi x9,x9,4 +8002a210: fc741ee3 bne x8,x7,8002a1ec + +8002a214 : +8002a214: 0000100f fence.i +8002a218: 34002373 csrrs x6,mscratch,x0 +8002a21c: 22932823 sw x9,560(x6) +8002a220: 04740263 beq x8,x7,8002a264 + +8002a224 : +8002a224: 00038413 addi x8,x7,0 +8002a228: 00000013 addi x0,x0,0 +8002a22c: 00000013 addi x0,x0,0 +8002a230: 00000013 addi x0,x0,0 +8002a234: 00000013 addi x0,x0,0 +8002a238: 00000013 addi x0,x0,0 +8002a23c: 00000013 addi x0,x0,0 +8002a240: fffdd797 auipc x15,0xfffdd +8002a244: f0478793 addi x15,x15,-252 # 80007144 +8002a248: 00000013 addi x0,x0,0 +8002a24c: 00000013 addi x0,x0,0 +8002a250: 00000013 addi x0,x0,0 +8002a254: 00000013 addi x0,x0,0 +8002a258: 00000013 addi x0,x0,0 +8002a25c: 00000013 addi x0,x0,0 +8002a260: 00078067 jalr x0,0(x15) + +8002a264 : +8002a264: 00000013 addi x0,x0,0 + +8002a268 : +8002a268: 000022b7 lui x5,0x2 +8002a26c: 80028293 addi x5,x5,-2048 # 1800 +8002a270: 30029073 csrrw x0,mstatus,x5 +8002a274: 31001073 csrrw x0,0x310,x0 +8002a278: 32001073 csrrw x0,mcountinhibit,x0 +8002a27c: 32301073 csrrw x0,mhpmevent3,x0 +8002a280: 32401073 csrrw x0,mhpmevent4,x0 +8002a284: 32501073 csrrw x0,mhpmevent5,x0 +8002a288: 32601073 csrrw x0,mhpmevent6,x0 +8002a28c: 32701073 csrrw x0,mhpmevent7,x0 +8002a290: 32801073 csrrw x0,mhpmevent8,x0 +8002a294: 32901073 csrrw x0,mhpmevent9,x0 +8002a298: 32a01073 csrrw x0,mhpmevent10,x0 +8002a29c: 32b01073 csrrw x0,mhpmevent11,x0 +8002a2a0: 32c01073 csrrw x0,mhpmevent12,x0 +8002a2a4: 32d01073 csrrw x0,mhpmevent13,x0 +8002a2a8: 32e01073 csrrw x0,mhpmevent14,x0 +8002a2ac: 32f01073 csrrw x0,mhpmevent15,x0 +8002a2b0: 33001073 csrrw x0,mhpmevent16,x0 +8002a2b4: 33101073 csrrw x0,mhpmevent17,x0 +8002a2b8: 33201073 csrrw x0,mhpmevent18,x0 +8002a2bc: 33301073 csrrw x0,mhpmevent19,x0 +8002a2c0: 33401073 csrrw x0,mhpmevent20,x0 +8002a2c4: 33501073 csrrw x0,mhpmevent21,x0 +8002a2c8: 33601073 csrrw x0,mhpmevent22,x0 +8002a2cc: 33701073 csrrw x0,mhpmevent23,x0 +8002a2d0: 33801073 csrrw x0,mhpmevent24,x0 +8002a2d4: 33901073 csrrw x0,mhpmevent25,x0 +8002a2d8: 33a01073 csrrw x0,mhpmevent26,x0 +8002a2dc: 33b01073 csrrw x0,mhpmevent27,x0 +8002a2e0: 33c01073 csrrw x0,mhpmevent28,x0 +8002a2e4: 33d01073 csrrw x0,mhpmevent29,x0 +8002a2e8: 33e01073 csrrw x0,mhpmevent30,x0 +8002a2ec: 33f01073 csrrw x0,mhpmevent31,x0 +8002a2f0: 00000013 addi x0,x0,0 +8002a2f4: 00000013 addi x0,x0,0 +8002a2f8: 00000013 addi x0,x0,0 +8002a2fc: 00000013 addi x0,x0,0 +8002a300: fffe2317 auipc x6,0xfffe2 +8002a304: e0830313 addi x6,x6,-504 # 8000c108 +8002a308: 00000013 addi x0,x0,0 +8002a30c: 00000013 addi x0,x0,0 +8002a310: 00000013 addi x0,x0,0 +8002a314: 00000013 addi x0,x0,0 +8002a318: 00000013 addi x0,x0,0 +8002a31c: 00000013 addi x0,x0,0 +8002a320: 00032023 sw x0,0(x6) + +8002a324 : +8002a324: feedc0b7 lui x1,0xfeedc +8002a328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eeb0ead> +8002a32c: 01909793 slli x15,x1,0x19 +8002a330: 0070d113 srli x2,x1,0x7 +8002a334: 00f16133 or x2,x2,x15 +8002a338: 01911793 slli x15,x2,0x19 +8002a33c: 00715193 srli x3,x2,0x7 +8002a340: 00f1e1b3 or x3,x3,x15 +8002a344: 01919793 slli x15,x3,0x19 +8002a348: 0071d213 srli x4,x3,0x7 +8002a34c: 00f26233 or x4,x4,x15 +8002a350: 01921793 slli x15,x4,0x19 +8002a354: 00725293 srli x5,x4,0x7 +8002a358: 00f2e2b3 or x5,x5,x15 +8002a35c: 01929793 slli x15,x5,0x19 +8002a360: 0072d313 srli x6,x5,0x7 +8002a364: 00f36333 or x6,x6,x15 +8002a368: 01931793 slli x15,x6,0x19 +8002a36c: 00735393 srli x7,x6,0x7 +8002a370: 00f3e3b3 or x7,x7,x15 +8002a374: 01939793 slli x15,x7,0x19 +8002a378: 0073d413 srli x8,x7,0x7 +8002a37c: 00f46433 or x8,x8,x15 +8002a380: 01941793 slli x15,x8,0x19 +8002a384: 00745493 srli x9,x8,0x7 +8002a388: 00f4e4b3 or x9,x9,x15 +8002a38c: 01949793 slli x15,x9,0x19 +8002a390: 0074d513 srli x10,x9,0x7 +8002a394: 00f56533 or x10,x10,x15 +8002a398: 01951793 slli x15,x10,0x19 +8002a39c: 00755593 srli x11,x10,0x7 +8002a3a0: 00f5e5b3 or x11,x11,x15 +8002a3a4: 01959793 slli x15,x11,0x19 +8002a3a8: 0075d613 srli x12,x11,0x7 +8002a3ac: 00f66633 or x12,x12,x15 +8002a3b0: 01961793 slli x15,x12,0x19 +8002a3b4: 00765693 srli x13,x12,0x7 +8002a3b8: 00f6e6b3 or x13,x13,x15 +8002a3bc: 01969793 slli x15,x13,0x19 +8002a3c0: 0076d713 srli x14,x13,0x7 +8002a3c4: 00f76733 or x14,x14,x15 +8002a3c8: fab807b7 lui x15,0xfab80 +8002a3cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab54bb6> +8002a3d0: 7d5c0837 lui x16,0x7d5c0 +8002a3d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +8002a3d8: 01981793 slli x15,x16,0x19 +8002a3dc: 00785893 srli x17,x16,0x7 +8002a3e0: 00f8e8b3 or x17,x17,x15 +8002a3e4: 01989793 slli x15,x17,0x19 +8002a3e8: 0078d913 srli x18,x17,0x7 +8002a3ec: 00f96933 or x18,x18,x15 +8002a3f0: 01991793 slli x15,x18,0x19 +8002a3f4: 00795993 srli x19,x18,0x7 +8002a3f8: 00f9e9b3 or x19,x19,x15 +8002a3fc: 01999793 slli x15,x19,0x19 +8002a400: 0079da13 srli x20,x19,0x7 +8002a404: 00fa6a33 or x20,x20,x15 +8002a408: 019a1793 slli x15,x20,0x19 +8002a40c: 007a5a93 srli x21,x20,0x7 +8002a410: 00faeab3 or x21,x21,x15 +8002a414: 019a9793 slli x15,x21,0x19 +8002a418: 007adb13 srli x22,x21,0x7 +8002a41c: 00fb6b33 or x22,x22,x15 +8002a420: 019b1793 slli x15,x22,0x19 +8002a424: 007b5b93 srli x23,x22,0x7 +8002a428: 00fbebb3 or x23,x23,x15 +8002a42c: 019b9793 slli x15,x23,0x19 +8002a430: 007bdc13 srli x24,x23,0x7 +8002a434: 00fc6c33 or x24,x24,x15 +8002a438: 019c1793 slli x15,x24,0x19 +8002a43c: 007c5c93 srli x25,x24,0x7 +8002a440: 00fcecb3 or x25,x25,x15 +8002a444: 019c9793 slli x15,x25,0x19 +8002a448: 007cdd13 srli x26,x25,0x7 +8002a44c: 00fd6d33 or x26,x26,x15 +8002a450: 019d1793 slli x15,x26,0x19 +8002a454: 007d5d93 srli x27,x26,0x7 +8002a458: 00fdedb3 or x27,x27,x15 +8002a45c: 019d9793 slli x15,x27,0x19 +8002a460: 007dde13 srli x28,x27,0x7 +8002a464: 00fe6e33 or x28,x28,x15 +8002a468: 019e1793 slli x15,x28,0x19 +8002a46c: 007e5e93 srli x29,x28,0x7 +8002a470: 00feeeb3 or x29,x29,x15 +8002a474: 019e9793 slli x15,x29,0x19 +8002a478: 007edf13 srli x30,x29,0x7 +8002a47c: 00ff6f33 or x30,x30,x15 +8002a480: 019f1793 slli x15,x30,0x19 +8002a484: 007f5f93 srli x31,x30,0x7 +8002a488: 00ffefb3 or x31,x31,x15 +8002a48c: 00000013 addi x0,x0,0 +8002a490: 00000013 addi x0,x0,0 +8002a494: 00000013 addi x0,x0,0 +8002a498: 00000013 addi x0,x0,0 +8002a49c: 00000013 addi x0,x0,0 +8002a4a0: fffef117 auipc x2,0xfffef +8002a4a4: 4f010113 addi x2,x2,1264 # 80019990 +8002a4a8: 00000013 addi x0,x0,0 +8002a4ac: 00000013 addi x0,x0,0 +8002a4b0: 00000013 addi x0,x0,0 +8002a4b4: 00000013 addi x0,x0,0 +8002a4b8: 00000013 addi x0,x0,0 +8002a4bc: 00000013 addi x0,x0,0 + +8002a4c0 : +8002a4c0: 6f5ca337 lui x6,0x6f5ca +8002a4c4: 30930313 addi x6,x6,777 # 6f5ca309 +8002a4c8: 00000013 addi x0,x0,0 +8002a4cc: 00000013 addi x0,x0,0 +8002a4d0: 00000013 addi x0,x0,0 +8002a4d4: 00000013 addi x0,x0,0 +8002a4d8: 00000013 addi x0,x0,0 +8002a4dc: 00000013 addi x0,x0,0 +8002a4e0: fffde197 auipc x3,0xfffde +8002a4e4: ce018193 addi x3,x3,-800 # 800081c0 +8002a4e8: 00000013 addi x0,x0,0 +8002a4ec: 00000013 addi x0,x0,0 +8002a4f0: 00000013 addi x0,x0,0 +8002a4f4: 00000013 addi x0,x0,0 +8002a4f8: 00000013 addi x0,x0,0 +8002a4fc: 00000013 addi x0,x0,0 +8002a500: 00012203 lw x4,0(x2) +8002a504: 00620863 beq x4,x6,8002a514 +8002a508: 000182e7 jalr x5,0(x3) +8002a50c: 8002a4c0 .word 0x8002a4c0 +8002a510: 80018f2f .word 0x80018f2f +8002a514: 00410113 addi x2,x2,4 +8002a518: 00000013 addi x0,x0,0 +8002a51c: 00000013 addi x0,x0,0 +8002a520: fffe2197 auipc x3,0xfffe2 +8002a524: e9018193 addi x3,x3,-368 # 8000c3b0 +8002a528: 00000013 addi x0,x0,0 +8002a52c: 00000013 addi x0,x0,0 +8002a530: 00000013 addi x0,x0,0 +8002a534: 00000013 addi x0,x0,0 +8002a538: 00000013 addi x0,x0,0 +8002a53c: 00000013 addi x0,x0,0 +8002a540: fffd6317 auipc x6,0xfffd6 +8002a544: b0030313 addi x6,x6,-1280 # 80000040 +8002a548: 00000013 addi x0,x0,0 +8002a54c: 00000013 addi x0,x0,0 +8002a550: 00000013 addi x0,x0,0 +8002a554: 00000013 addi x0,x0,0 +8002a558: 00000013 addi x0,x0,0 +8002a55c: 00000013 addi x0,x0,0 +8002a560: 00030067 jalr x0,0(x6) + +8002a564 : +8002a564: 00054303 lbu x6,0(x10) +8002a568: 00030a63 beq x6,x0,8002a57c +8002a56c: 100003b7 lui x7,0x10000 +8002a570: 00638023 sb x6,0(x7) # 10000000 +8002a574: 00150513 addi x10,x10,1 +8002a578: fedff06f jal x0,8002a564 +8002a57c: 00008067 jalr x0,0(x1) + +8002a580 : +8002a580: ff010113 addi x2,x2,-16 +8002a584: 00112023 sw x1,0(x2) +8002a588: 00812223 sw x8,4(x2) +8002a58c: 00000097 auipc x1,0x0 +8002a590: fd8080e7 jalr x1,-40(x1) # 8002a564 +8002a594: 00412403 lw x8,4(x2) +8002a598: 00012083 lw x1,0(x2) +8002a59c: 01010113 addi x2,x2,16 +8002a5a0: 00008067 jalr x0,0(x1) + +8002a5a4 : +8002a5a4: 00100093 addi x1,x0,1 +8002a5a8: fffff297 auipc x5,0xfffff +8002a5ac: 95828293 addi x5,x5,-1704 # 80028f00 + +8002a5b0 : +8002a5b0: 0012a023 sw x1,0(x5) +8002a5b4: 0002a223 sw x0,4(x5) + +8002a5b8 : +8002a5b8: 00000013 addi x0,x0,0 +8002a5bc: ffdff06f jal x0,8002a5b8 +8002a5c0: 0000006f jal x0,8002a5c0 + +8002a5c4 : +8002a5c4: 00300093 addi x1,x0,3 +8002a5c8: fffff297 auipc x5,0xfffff +8002a5cc: 93828293 addi x5,x5,-1736 # 80028f00 + +8002a5d0 : +8002a5d0: 0012a023 sw x1,0(x5) +8002a5d4: 0002a223 sw x0,4(x5) + +8002a5d8 : +8002a5d8: 00000013 addi x0,x0,0 +8002a5dc: ffdff06f jal x0,8002a5d8 +8002a5e0: 0000006f jal x0,8002a5e0 + +8002a5e4 : +8002a5e4: 00100513 addi x10,x0,1 +8002a5e8: 100105b7 lui x11,0x10010 +8002a5ec: 00a5a023 sw x10,0(x11) # 10010000 +8002a5f0: 00008067 jalr x0,0(x1) + +8002a5f4 : +8002a5f4: 100105b7 lui x11,0x10010 +8002a5f8: 0005a023 sw x0,0(x11) # 10010000 +8002a5fc: 00008067 jalr x0,0(x1) + +8002a600 : +8002a600: 00100513 addi x10,x0,1 +8002a604: 100005b7 lui x11,0x10000 +8002a608: 01058593 addi x11,x11,16 # 10000010 +8002a60c: 00a58023 sb x10,0(x11) +8002a610: 00008067 jalr x0,0(x1) + +8002a614 : +8002a614: 100005b7 lui x11,0x10000 +8002a618: 01058593 addi x11,x11,16 # 10000010 +8002a61c: 00058023 sb x0,0(x11) +8002a620: 00008067 jalr x0,0(x1) +8002a624: 00000013 addi x0,x0,0 +8002a628: 00000013 addi x0,x0,0 +8002a62c: 00000013 addi x0,x0,0 +8002a630: 00000013 addi x0,x0,0 +8002a634: 00000013 addi x0,x0,0 +8002a638: 00000013 addi x0,x0,0 +8002a63c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zksh-sm3p0-00.elf.objdump b/riscv-tests/rv32-Zksh-sm3p0-00.elf.objdump new file mode 100644 index 0000000..580cea0 --- /dev/null +++ b/riscv-tests/rv32-Zksh-sm3p0-00.elf.objdump @@ -0,0 +1,6276 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksh/Zksh-sm3p0-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksh/Zksh-sm3p0-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000125b0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016600 80016600 00017600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 000008ac 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00018f27 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018fa2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018fc5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fd8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00019000 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019089 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016600 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccPdcZCM.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b1 +80004592 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b2 +800045c4 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b3 +800045f6 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b4 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +80004628 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b5 +8000465a l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b6 +8000468c l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b6_str +8000015c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b7 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +800046be l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b7_str +80000180 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b8 +800046f0 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b8_str +800001a4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b9 +80004722 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b9_str +800001c8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b10 +80004755 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b10_str +800001ec l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b11 +80004789 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b11_str +80000214 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b12 +800047bd l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b12_str +80000240 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b13 +800047f1 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b13_str +80000264 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b14 +80004825 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b14_str +80000288 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b15 +80004859 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b15_str +800002ac l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b16 +8000488d l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b16_str +800002d0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b17 +800048c1 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b17_str +800002f4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b18 +800048f5 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b18_str +8000031c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b19 +80004929 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b19_str +80000340 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b20 +8000495d l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b20_str +80000364 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b21 +80004991 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b21_str +80000388 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b22 +800049c5 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b22_str +800003ac l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b23 +800049f9 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b23_str +800003d0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b24 +80004a2d l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b24_str +800003f4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b25 +80004a61 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b25_str +8000041c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b26 +80004a95 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b26_str +80000440 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b27 +80004ac9 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b27_str +80000464 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b28 +80004afd l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b28_str +8000048c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b29 +80004b31 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b29_str +800004b0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b30 +80004b65 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b30_str +800004d4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_b31 +80004b99 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_b31_str +800004f8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b0 +80004bcd l .data 00000000 Zksh_sm3p0_cg_cp_rd_b0_str +80000520 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b1 +80004bff l .data 00000000 Zksh_sm3p0_cg_cp_rd_b1_str +80000544 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b2 +80004c31 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b2_str +80000568 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b3 +80004c63 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b3_str +8000058c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b4 +80004c95 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b4_str +800005b0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b5 +80004cc7 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b5_str +800005d4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b6 +80004cf9 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b6_str +80000600 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b7 +80004d2b l .data 00000000 Zksh_sm3p0_cg_cp_rd_b7_str +80000624 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b8 +80004d5d l .data 00000000 Zksh_sm3p0_cg_cp_rd_b8_str +8000064c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b9 +80004d8f l .data 00000000 Zksh_sm3p0_cg_cp_rd_b9_str +80000674 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b10 +80004dc1 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b10_str +8000069c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b11 +80004df4 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b11_str +800006c0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b12 +80004e27 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b12_str +800006ec l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b13 +80004e5a l .data 00000000 Zksh_sm3p0_cg_cp_rd_b13_str +80000710 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b14 +80004e8d l .data 00000000 Zksh_sm3p0_cg_cp_rd_b14_str +80000734 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b15 +80004ec0 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b15_str +80000758 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b16 +80004ef3 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b16_str +8000077c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b17 +80004f26 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b17_str +800007a0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b18 +80004f59 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b18_str +800007c4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b19 +80004f8c l .data 00000000 Zksh_sm3p0_cg_cp_rd_b19_str +800007e8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b20 +80004fbf l .data 00000000 Zksh_sm3p0_cg_cp_rd_b20_str +80000810 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b21 +80004ff2 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b21_str +80000834 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b22 +80005025 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b22_str +80000858 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b23 +80005058 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b23_str +8000087c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b24 +8000508b l .data 00000000 Zksh_sm3p0_cg_cp_rd_b24_str +800008a0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b25 +800050be l .data 00000000 Zksh_sm3p0_cg_cp_rd_b25_str +800008c8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b26 +800050f1 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b26_str +800008ec l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b27 +80005124 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b27_str +80000910 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b28 +80005157 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b28_str +80000934 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b29 +8000518a l .data 00000000 Zksh_sm3p0_cg_cp_rd_b29_str +80000958 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b30 +800051bd l .data 00000000 Zksh_sm3p0_cg_cp_rd_b30_str +8000097c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rd_b31 +800051f0 l .data 00000000 Zksh_sm3p0_cg_cp_rd_b31_str +800009a0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x0 +80005223 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x0_str +800009c4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x1 +8000525d l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x1_str +800009e8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x2 +80005297 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x2_str +80000a0c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x80000000 +800052d1 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x80000000_str +80000a30 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x80000001 +80005312 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x80000001_str +80000a54 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffff +80005353 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffff_str +80000a78 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffe +80005394 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffe_str +80000a9c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff +800053d5 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff_str +80000ac0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe +80005416 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe_str +80000ae4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc8872 +80005457 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc8872_str +80000b08 l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaa +80005498 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b2c l .text.rvtest 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x55555555 +800054d9 l .data 00000000 Zksh_sm3p0_cg_cp_rs1_edges_0x55555555_str +80000b50 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b0 +8000551a l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b0_str +80000b74 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b1 +80005551 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b1_str +80000b98 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b2 +80005588 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b2_str +80000bc0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b3 +800055bf l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b3_str +80000bec l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b4 +800055f6 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b4_str +80000c10 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b5 +8000562d l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b5_str +80000c38 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b6 +80005664 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b6_str +80000c64 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b7 +8000569b l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b7_str +80000c88 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b8 +800056d2 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b8_str +80000cac l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b9 +80005709 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b9_str +80000cd0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b10 +80005740 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b10_str +80000cf4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b11 +80005778 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b11_str +80000d18 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b12 +800057b0 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b12_str +80000d3c l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b13 +800057e8 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b13_str +80000d60 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b14 +80005820 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b14_str +80000d84 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b15 +80005858 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b15_str +80000da8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b16 +80005890 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b16_str +80000dcc l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b17 +800058c8 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b17_str +80000df4 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b18 +80005900 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b18_str +80000e18 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b19 +80005938 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b19_str +80000e3c l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b20 +80005970 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b20_str +80000e60 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b21 +800059a8 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b21_str +80000e84 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b22 +800059e0 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b22_str +80000ea8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b23 +80005a18 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b23_str +80000ecc l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b24 +80005a51 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b24_str +80000ef0 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b25 +80005a8a l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b25_str +80000f14 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b26 +80005ac3 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b26_str +80000f38 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b27 +80005afc l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b27_str +80000f5c l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b28 +80005b35 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b28_str +80000f80 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b29 +80005b6e l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b29_str +80000fa8 l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b30 +80005ba7 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b30_str +80000fcc l .text.rvtest 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b31 +80005be0 l .data 00000000 Zksh_sm3p0_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000ffc l .text.rvtest 00000000 exit_Mcleanup +80001000 l .text.rvtest 00000000 resto_Medeleg +80001008 l .text.rvtest 00000000 resto_Msatp +8000100c l .text.rvtest 00000000 resto_Mscratch +80001014 l .text.rvtest 00000000 resto_Mxtvec +80001028 l .text.rvtest 00000000 resto_Mtramp +8000102c l .text.rvtest 00000000 resto_Mloop +80001044 l .text.rvtest 00000000 check_trap_sig_overflow +800012f0 l .text.rvtest 00000000 trap_sig_overflow +80001190 l .text.rvtest 00000000 check_trap_sig_offset +8000629f l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +800062d9 l .data 00000000 begin_debugstr +80006339 l .data 00000000 trap_sig_overflowstr +80006ee4 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007b48 l .data 00000000 trap_sigptr +80007b40 l .data 00000000 final_trap_sig_offset +80001254 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000648d l .data 00000000 trap_sig_offset_mismatch +80001270 l .text.rvtest 00000000 exit_cleanup +80001324 l .text.rvtest 00000000 abort_test +800062fb l .data 00000000 abortstr +80006264 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +8000791b l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005d88 l .data 00000000 ascii_buffer +800063a2 l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005d68 l .data 00000000 saved_xepc +800165ac l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800064a4 l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800065a6 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800066a1 l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +80006794 l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006907 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005c20 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005c20 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005d48 l .data 00000000 failure_diag_type +80005d58 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005d50 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +8000688b l .data 00000000 sv_Mtval2_str +800068c9 l .data 00000000 sv_Mtinst_str +800064e4 l .data 00000000 sv_Svect_str +800065e4 l .data 00000000 sv_Scause_str +800066dd l .data 00000000 sv_Sepc_str +800067d1 l .data 00000000 sv_Stval_str +80006942 l .data 00000000 sv_Sip_str +80006524 l .data 00000000 sv_Hvect_str +80006622 l .data 00000000 sv_Hcause_str +80006719 l .data 00000000 sv_Hepc_str +8000680e l .data 00000000 sv_Htval_str +8000697d l .data 00000000 sv_Hip_str +80006565 l .data 00000000 sv_Vvect_str +80006661 l .data 00000000 sv_Vcause_str +80006756 l .data 00000000 sv_Vepc_str +8000684c l .data 00000000 sv_Vtval_str +800069b9 l .data 00000000 sv_Vip_str +800069f6 l .data 00000000 Mclr_Mext_int_str +80006a45 l .data 00000000 Mclr_Sext_int_str +80006b40 l .data 00000000 Sclr_Sext_int_str +80006c3c l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005d54 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +80006390 l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005d40 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800063a4 l .data 00000000 inststr +80005d20 l .data 00000000 failing_instruction +800063b8 l .data 00000000 addrstr +80005d28 l .data 00000000 failing_addr +80006def l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005d24 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +80006f05 l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80006de8 l .data 00000000 vxsatstr +80006e00 l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005d30 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80006e17 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005d38 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006e2e l .data 00000000 failure_diag_bad_instr_str +80006e8c l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +80006f31 l .data 00000000 trap_diag_header_str +80006f5d l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80006f6d l .data 00000000 trap_diag_expected_offset_str +80006f98 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +80006fc7 l .data 00000000 trap_diag_extra_traps_str +8000702f l .data 00000000 trap_diag_diff_bytes_str +80007056 l .data 00000000 trap_diag_extra_next_step_str +80006ff3 l .data 00000000 trap_diag_missing_traps_str +8000713e l .data 00000000 trap_diag_missing_next_step_str +80007225 l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +80007261 l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +8000723f l .data 00000000 trap_diag_mode_m_str +80007247 l .data 00000000 trap_diag_mode_s_str +8000724f l .data 00000000 trap_diag_mode_hs_str +80007258 l .data 00000000 trap_diag_mode_vs_str +8000726a l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800073c1 l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +80007284 l .data 00000000 trap_diag_field_vect_str +800072b5 l .data 00000000 trap_diag_field_cause_str +800072d5 l .data 00000000 trap_diag_field_epc_str +800072f3 l .data 00000000 trap_diag_field_tval_str +80007312 l .data 00000000 trap_diag_field_ip_str +8000733a l .data 00000000 trap_diag_field_tval2_str +80007366 l .data 00000000 trap_diag_field_tinst_str +80007392 l .data 00000000 trap_diag_field_intid_str +800073d0 l .data 00000000 trap_diag_expected_str +800073e7 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +800073fe l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +80007415 l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +8000748b l .data 00000000 trap_diag_hint_vect_str +80007561 l .data 00000000 trap_diag_hint_cause_str +80007654 l .data 00000000 trap_diag_hint_epc_str +8000774f l .data 00000000 trap_diag_hint_tval_str +80007836 l .data 00000000 trap_diag_hint_ip_str +80007443 l .data 00000000 trap_diag_generic_str +8000642c l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005db0 l .data 00000000 trap_excpt_name_tbl +80005e10 l .data 00000000 trap_int_name_tbl +8000624e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005d60 l .data 00000000 csr_context_ret_addr +8000644d l .data 00000000 mepcstr +8000645d l .data 00000000 mcausestr +80005d70 l .data 00000000 saved_xcause +8000646d l .data 00000000 mtvalstr +80005d78 l .data 00000000 saved_xtval +8000647d l .data 00000000 mstatusstr +80005d80 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007960 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006f0d l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005db0 l .data 00000000 end_failure_scratch +80005e50 l .data 00000000 trap_excpt_name_0 +80005e70 l .data 00000000 trap_excpt_name_1 +80005e8a l .data 00000000 trap_excpt_name_2 +80005e9f l .data 00000000 trap_excpt_name_3 +80005eab l .data 00000000 trap_excpt_name_4 +80005ec4 l .data 00000000 trap_excpt_name_5 +80005ed7 l .data 00000000 trap_excpt_name_6 +80005ef5 l .data 00000000 trap_excpt_name_7 +80005f0d l .data 00000000 trap_excpt_name_8 +80005f2b l .data 00000000 trap_excpt_name_9 +80005f49 l .data 00000000 trap_excpt_name_10 +80005f68 l .data 00000000 trap_excpt_name_11 +80005f86 l .data 00000000 trap_excpt_name_12 +80005f9e l .data 00000000 trap_excpt_name_13 +80005faf l .data 00000000 trap_excpt_name_14 +80005fbe l .data 00000000 trap_excpt_name_15 +80005fd4 l .data 00000000 trap_excpt_name_16 +80005fe1 l .data 00000000 trap_excpt_name_17 +80005ff0 l .data 00000000 trap_excpt_name_18 +80006000 l .data 00000000 trap_excpt_name_19 +80006010 l .data 00000000 trap_excpt_name_20 +8000602e l .data 00000000 trap_excpt_name_21 +80006045 l .data 00000000 trap_excpt_name_22 +8000605a l .data 00000000 trap_excpt_name_23 +80006076 l .data 00000000 trap_int_name_0 +8000608e l .data 00000000 trap_int_name_1 +800060ad l .data 00000000 trap_int_name_2 +800060d4 l .data 00000000 trap_int_name_3 +800060f0 l .data 00000000 trap_int_name_4 +80006108 l .data 00000000 trap_int_name_5 +80006124 l .data 00000000 trap_int_name_6 +80006148 l .data 00000000 trap_int_name_7 +80006161 l .data 00000000 trap_int_name_8 +80006179 l .data 00000000 trap_int_name_9 +80006198 l .data 00000000 trap_int_name_10 +800061bf l .data 00000000 trap_int_name_11 +800061db l .data 00000000 trap_int_name_12 +80006200 l .data 00000000 trap_int_name_13 +8000621c l .data 00000000 trap_int_name_14 +80006235 l .data 00000000 trap_int_name_15 +800063f9 l .data 00000000 xepcstr +80006a97 l .data 00000000 Mclr_Vext_int_str +80006af1 l .data 00000000 Sclr_Mext_int_str +80006b92 l .data 00000000 Sclr_Vext_int_str +80006bec l .data 00000000 Hclr_Mext_int_str +80006c8f l .data 00000000 Hclr_Vext_int_str +80006cea l .data 00000000 Vclr_Mext_int_str +80006d3a l .data 00000000 Vclr_Sext_int_str +80006d8d l .data 00000000 Vclr_Vext_int_str +8000742c l .data 00000000 trap_diag_curr_xepc_str +800165b0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800165b0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001044 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007960 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fec g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007960 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +8000795f g .data 00000000 rvtest_data_end +80000fec g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016700 g .tohost 00000000 fromhost +80016600 g .tohost 00000000 tohost +800012b0 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xc38c565d +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zksh_sm3p0_cg_cp_rs1_b0: + sm3p0 x8, x0 # perform operation +80000048: 10801413 sm3p0 x8,x0 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksh_sm3p0_cg_cp_rs1_b0, Zksh_sm3p0_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 00820863 beq x4,x8,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1db79002 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zksh_sm3p0_cg_cp_rs1_b1: + sm3p0 x28, x1 # perform operation +8000006c: 10809e13 sm3p0 x28,x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksh_sm3p0_cg_cp_rs1_b1, Zksh_sm3p0_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01c20863 beq x4,x28,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004592 .word 0x80004592 +80000084: 00410113 addi x2,x2,4 + + mv x12, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010613 addi x12,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x2bff1f7c +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zksh_sm3p0_cg_cp_rs1_b2: + sm3p0 x0, x2 # perform operation +80000094: 10811013 sm3p0 x0,x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zksh_sm3p0_cg_cp_rs1_b2, Zksh_sm3p0_cg_cp_rs1_b2_str) +80000098: 00062203 lw x4,0(x12) +8000009c: 00020863 beq x4,x0,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c4 .word 0x800045c4 +800000ac: 00460613 addi x12,x12,4 + + mv x1, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018093 addi x1,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x73589671 +800000b4: 0000a183 lw x3,0(x1) +800000b8: 00408093 addi x1,x1,4 + +800000bc : +Zksh_sm3p0_cg_cp_rs1_b3: + sm3p0 x17, x3 # perform operation +800000bc: 10819893 sm3p0 x17,x3 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zksh_sm3p0_cg_cp_rs1_b3, Zksh_sm3p0_cg_cp_rs1_b3_str) +800000c0: 00062203 lw x4,0(x12) +800000c4: 01120863 beq x4,x17,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f6 .word 0x800045f6 +800000d4: 00460613 addi x12,x12,4 + + mv x7, x4 # switch temp register to avoid conflict with test +800000d8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x15e839f0 +800000e0: 0000a203 lw x4,0(x1) +800000e4: 00408093 addi x1,x1,4 + +800000e8 : +Zksh_sm3p0_cg_cp_rs1_b4: + sm3p0 x13, x4 # perform operation +800000e8: 10821693 sm3p0 x13,x4 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zksh_sm3p0_cg_cp_rs1_b4, Zksh_sm3p0_cg_cp_rs1_b4_str) +800000ec: 00062383 lw x7,0(x12) +800000f0: 00d38863 beq x7,x13,80000100 +800000f4: 7a50146f jal x8,80002098 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004628 .word 0x80004628 +80000100: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x3d72feb3 +80000104: 0000a283 lw x5,0(x1) +80000108: 00408093 addi x1,x1,4 + +8000010c : +Zksh_sm3p0_cg_cp_rs1_b5: + sm3p0 x0, x5 # perform operation +8000010c: 10829013 sm3p0 x0,x5 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zksh_sm3p0_cg_cp_rs1_b5, Zksh_sm3p0_cg_cp_rs1_b5_str) +80000110: 00062383 lw x7,0(x12) +80000114: 00038863 beq x7,x0,80000124 +80000118: 7810146f jal x8,80002098 +8000011c: 8000010c .word 0x8000010c +80000120: 8000465a .word 0x8000465a +80000124: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x86dac244 +80000128: 0000a303 lw x6,0(x1) +8000012c: 00408093 addi x1,x1,4 + +80000130 : +Zksh_sm3p0_cg_cp_rs1_b6: + sm3p0 x20, x6 # perform operation +80000130: 10831a13 sm3p0 x20,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zksh_sm3p0_cg_cp_rs1_b6, Zksh_sm3p0_cg_cp_rs1_b6_str) +80000134: 00062383 lw x7,0(x12) +80000138: 01438863 beq x7,x20,80000148 +8000013c: 75d0146f jal x8,80002098 +80000140: 80000130 .word 0x80000130 +80000144: 8000468c .word 0x8000468c +80000148: 00460613 addi x12,x12,4 + + mv x13, x7 # switch temp register to avoid conflict with test +8000014c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +80000150: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x13c5740d +80000154: 0000a383 lw x7,0(x1) +80000158: 00408093 addi x1,x1,4 + +8000015c : +Zksh_sm3p0_cg_cp_rs1_b7: + sm3p0 x15, x7 # perform operation +8000015c: 10839793 sm3p0 x15,x7 + # Check if x15 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x15, Zksh_sm3p0_cg_cp_rs1_b7, Zksh_sm3p0_cg_cp_rs1_b7_str) +80000160: 00062683 lw x13,0(x12) +80000164: 00f68863 beq x13,x15,80000174 +80000168: 7590176f jal x14,800020c0 +8000016c: 8000015c .word 0x8000015c +80000170: 800046be .word 0x800046be +80000174: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xc4528a07 +80000178: 0000a403 lw x8,0(x1) +8000017c: 00408093 addi x1,x1,4 + +80000180 : +Zksh_sm3p0_cg_cp_rs1_b8: + sm3p0 x29, x8 # perform operation +80000180: 10841e93 sm3p0 x29,x8 + # Check if x29 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x29, Zksh_sm3p0_cg_cp_rs1_b8, Zksh_sm3p0_cg_cp_rs1_b8_str) +80000184: 00062683 lw x13,0(x12) +80000188: 01d68863 beq x13,x29,80000198 +8000018c: 7350176f jal x14,800020c0 +80000190: 80000180 .word 0x80000180 +80000194: 800046f0 .word 0x800046f0 +80000198: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xbb4c8e3f +8000019c: 0000a483 lw x9,0(x1) +800001a0: 00408093 addi x1,x1,4 + +800001a4 : +Zksh_sm3p0_cg_cp_rs1_b9: + sm3p0 x25, x9 # perform operation +800001a4: 10849c93 sm3p0 x25,x9 + # Check if x25 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x25, Zksh_sm3p0_cg_cp_rs1_b9, Zksh_sm3p0_cg_cp_rs1_b9_str) +800001a8: 00062683 lw x13,0(x12) +800001ac: 01968863 beq x13,x25,800001bc +800001b0: 7110176f jal x14,800020c0 +800001b4: 800001a4 .word 0x800001a4 +800001b8: 80004722 .word 0x80004722 +800001bc: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x28525de9 +800001c0: 0000a503 lw x10,0(x1) +800001c4: 00408093 addi x1,x1,4 + +800001c8 : +Zksh_sm3p0_cg_cp_rs1_b10: + sm3p0 x29, x10 # perform operation +800001c8: 10851e93 sm3p0 x29,x10 + # Check if x29 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x29, Zksh_sm3p0_cg_cp_rs1_b10, Zksh_sm3p0_cg_cp_rs1_b10_str) +800001cc: 00062683 lw x13,0(x12) +800001d0: 01d68863 beq x13,x29,800001e0 +800001d4: 6ed0176f jal x14,800020c0 +800001d8: 800001c8 .word 0x800001c8 +800001dc: 80004755 .word 0x80004755 +800001e0: 00460613 addi x12,x12,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x860cb39a +800001e4: 0000a583 lw x11,0(x1) +800001e8: 00408093 addi x1,x1,4 + +800001ec : +Zksh_sm3p0_cg_cp_rs1_b11: + sm3p0 x30, x11 # perform operation +800001ec: 10859f13 sm3p0 x30,x11 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zksh_sm3p0_cg_cp_rs1_b11, Zksh_sm3p0_cg_cp_rs1_b11_str) +800001f0: 00062683 lw x13,0(x12) +800001f4: 01e68863 beq x13,x30,80000204 +800001f8: 6c90176f jal x14,800020c0 +800001fc: 800001ec .word 0x800001ec +80000200: 80004789 .word 0x80004789 +80000204: 00460613 addi x12,x12,4 + + mv x19, x12 # switch signature pointer register to avoid conflict with test +80000208: 00060993 addi x19,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xc3ddb70e +8000020c: 0000a603 lw x12,0(x1) +80000210: 00408093 addi x1,x1,4 + +80000214 : +Zksh_sm3p0_cg_cp_rs1_b12: + sm3p0 x23, x12 # perform operation +80000214: 10861b93 sm3p0 x23,x12 + # Check if x23 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x23, Zksh_sm3p0_cg_cp_rs1_b12, Zksh_sm3p0_cg_cp_rs1_b12_str) +80000218: 0009a683 lw x13,0(x19) +8000021c: 01768863 beq x13,x23,8000022c +80000220: 6a10176f jal x14,800020c0 +80000224: 80000214 .word 0x80000214 +80000228: 800047bd .word 0x800047bd +8000022c: 00498993 addi x19,x19,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000230: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000234: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xfdbfa0e8 +80000238: 0000a683 lw x13,0(x1) +8000023c: 00408093 addi x1,x1,4 + +80000240 : +Zksh_sm3p0_cg_cp_rs1_b13: + sm3p0 x4, x13 # perform operation +80000240: 10869213 sm3p0 x4,x13 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zksh_sm3p0_cg_cp_rs1_b13, Zksh_sm3p0_cg_cp_rs1_b13_str) +80000244: 0009a383 lw x7,0(x19) +80000248: 00438863 beq x7,x4,80000258 +8000024c: 64d0146f jal x8,80002098 +80000250: 80000240 .word 0x80000240 +80000254: 800047f1 .word 0x800047f1 +80000258: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xf0b48d69 +8000025c: 0000a703 lw x14,0(x1) +80000260: 00408093 addi x1,x1,4 + +80000264 : +Zksh_sm3p0_cg_cp_rs1_b14: + sm3p0 x0, x14 # perform operation +80000264: 10871013 sm3p0 x0,x14 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zksh_sm3p0_cg_cp_rs1_b14, Zksh_sm3p0_cg_cp_rs1_b14_str) +80000268: 0009a383 lw x7,0(x19) +8000026c: 00038863 beq x7,x0,8000027c +80000270: 6290146f jal x8,80002098 +80000274: 80000264 .word 0x80000264 +80000278: 80004825 .word 0x80004825 +8000027c: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x5ad11f62 +80000280: 0000a783 lw x15,0(x1) +80000284: 00408093 addi x1,x1,4 + +80000288 : +Zksh_sm3p0_cg_cp_rs1_b15: + sm3p0 x23, x15 # perform operation +80000288: 10879b93 sm3p0 x23,x15 + # Check if x23 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x23, Zksh_sm3p0_cg_cp_rs1_b15, Zksh_sm3p0_cg_cp_rs1_b15_str) +8000028c: 0009a383 lw x7,0(x19) +80000290: 01738863 beq x7,x23,800002a0 +80000294: 6050146f jal x8,80002098 +80000298: 80000288 .word 0x80000288 +8000029c: 80004859 .word 0x80004859 +800002a0: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xe7d88dc2 +800002a4: 0000a803 lw x16,0(x1) +800002a8: 00408093 addi x1,x1,4 + +800002ac : +Zksh_sm3p0_cg_cp_rs1_b16: + sm3p0 x2, x16 # perform operation +800002ac: 10881113 sm3p0 x2,x16 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zksh_sm3p0_cg_cp_rs1_b16, Zksh_sm3p0_cg_cp_rs1_b16_str) +800002b0: 0009a383 lw x7,0(x19) +800002b4: 00238863 beq x7,x2,800002c4 +800002b8: 5e10146f jal x8,80002098 +800002bc: 800002ac .word 0x800002ac +800002c0: 8000488d .word 0x8000488d +800002c4: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x39e6a678 +800002c8: 0000a883 lw x17,0(x1) +800002cc: 00408093 addi x1,x1,4 + +800002d0 : +Zksh_sm3p0_cg_cp_rs1_b17: + sm3p0 x21, x17 # perform operation +800002d0: 10889a93 sm3p0 x21,x17 + # Check if x21 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x21, Zksh_sm3p0_cg_cp_rs1_b17, Zksh_sm3p0_cg_cp_rs1_b17_str) +800002d4: 0009a383 lw x7,0(x19) +800002d8: 01538863 beq x7,x21,800002e8 +800002dc: 5bd0146f jal x8,80002098 +800002e0: 800002d0 .word 0x800002d0 +800002e4: 800048c1 .word 0x800048c1 +800002e8: 00498993 addi x19,x19,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x1aa832ea +800002ec: 0000a903 lw x18,0(x1) +800002f0: 00408093 addi x1,x1,4 + +800002f4 : +Zksh_sm3p0_cg_cp_rs1_b18: + sm3p0 x27, x18 # perform operation +800002f4: 10891d93 sm3p0 x27,x18 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zksh_sm3p0_cg_cp_rs1_b18, Zksh_sm3p0_cg_cp_rs1_b18_str) +800002f8: 0009a383 lw x7,0(x19) +800002fc: 01b38863 beq x7,x27,8000030c +80000300: 5990146f jal x8,80002098 +80000304: 800002f4 .word 0x800002f4 +80000308: 800048f5 .word 0x800048f5 +8000030c: 00498993 addi x19,x19,4 + + mv x26, x19 # switch signature pointer register to avoid conflict with test +80000310: 00098d13 addi x26,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x5ce7aa46 +80000314: 0000a983 lw x19,0(x1) +80000318: 00408093 addi x1,x1,4 + +8000031c : +Zksh_sm3p0_cg_cp_rs1_b19: + sm3p0 x16, x19 # perform operation +8000031c: 10899813 sm3p0 x16,x19 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zksh_sm3p0_cg_cp_rs1_b19, Zksh_sm3p0_cg_cp_rs1_b19_str) +80000320: 000d2383 lw x7,0(x26) +80000324: 01038863 beq x7,x16,80000334 +80000328: 5710146f jal x8,80002098 +8000032c: 8000031c .word 0x8000031c +80000330: 80004929 .word 0x80004929 +80000334: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x3569b6a6 +80000338: 0000aa03 lw x20,0(x1) +8000033c: 00408093 addi x1,x1,4 + +80000340 : +Zksh_sm3p0_cg_cp_rs1_b20: + sm3p0 x13, x20 # perform operation +80000340: 108a1693 sm3p0 x13,x20 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zksh_sm3p0_cg_cp_rs1_b20, Zksh_sm3p0_cg_cp_rs1_b20_str) +80000344: 000d2383 lw x7,0(x26) +80000348: 00d38863 beq x7,x13,80000358 +8000034c: 54d0146f jal x8,80002098 +80000350: 80000340 .word 0x80000340 +80000354: 8000495d .word 0x8000495d +80000358: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x5e657923 +8000035c: 0000aa83 lw x21,0(x1) +80000360: 00408093 addi x1,x1,4 + +80000364 : +Zksh_sm3p0_cg_cp_rs1_b21: + sm3p0 x3, x21 # perform operation +80000364: 108a9193 sm3p0 x3,x21 + # Check if x3 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x3, Zksh_sm3p0_cg_cp_rs1_b21, Zksh_sm3p0_cg_cp_rs1_b21_str) +80000368: 000d2383 lw x7,0(x26) +8000036c: 00338863 beq x7,x3,8000037c +80000370: 5290146f jal x8,80002098 +80000374: 80000364 .word 0x80000364 +80000378: 80004991 .word 0x80004991 +8000037c: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xd359032b +80000380: 0000ab03 lw x22,0(x1) +80000384: 00408093 addi x1,x1,4 + +80000388 : +Zksh_sm3p0_cg_cp_rs1_b22: + sm3p0 x14, x22 # perform operation +80000388: 108b1713 sm3p0 x14,x22 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zksh_sm3p0_cg_cp_rs1_b22, Zksh_sm3p0_cg_cp_rs1_b22_str) +8000038c: 000d2383 lw x7,0(x26) +80000390: 00e38863 beq x7,x14,800003a0 +80000394: 5050146f jal x8,80002098 +80000398: 80000388 .word 0x80000388 +8000039c: 800049c5 .word 0x800049c5 +800003a0: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xe05db4c3 +800003a4: 0000ab83 lw x23,0(x1) +800003a8: 00408093 addi x1,x1,4 + +800003ac : +Zksh_sm3p0_cg_cp_rs1_b23: + sm3p0 x29, x23 # perform operation +800003ac: 108b9e93 sm3p0 x29,x23 + # Check if x29 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x29, Zksh_sm3p0_cg_cp_rs1_b23, Zksh_sm3p0_cg_cp_rs1_b23_str) +800003b0: 000d2383 lw x7,0(x26) +800003b4: 01d38863 beq x7,x29,800003c4 +800003b8: 4e10146f jal x8,80002098 +800003bc: 800003ac .word 0x800003ac +800003c0: 800049f9 .word 0x800049f9 +800003c4: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x9b3d6c89 +800003c8: 0000ac03 lw x24,0(x1) +800003cc: 00408093 addi x1,x1,4 + +800003d0 : +Zksh_sm3p0_cg_cp_rs1_b24: + sm3p0 x10, x24 # perform operation +800003d0: 108c1513 sm3p0 x10,x24 + # Check if x10 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x10, Zksh_sm3p0_cg_cp_rs1_b24, Zksh_sm3p0_cg_cp_rs1_b24_str) +800003d4: 000d2383 lw x7,0(x26) +800003d8: 00a38863 beq x7,x10,800003e8 +800003dc: 4bd0146f jal x8,80002098 +800003e0: 800003d0 .word 0x800003d0 +800003e4: 80004a2d .word 0x80004a2d +800003e8: 004d0d13 addi x26,x26,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x478fc0fc +800003ec: 0000ac83 lw x25,0(x1) +800003f0: 00408093 addi x1,x1,4 + +800003f4 : +Zksh_sm3p0_cg_cp_rs1_b25: + sm3p0 x9, x25 # perform operation +800003f4: 108c9493 sm3p0 x9,x25 + # Check if x9 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x9, Zksh_sm3p0_cg_cp_rs1_b25, Zksh_sm3p0_cg_cp_rs1_b25_str) +800003f8: 000d2383 lw x7,0(x26) +800003fc: 00938863 beq x7,x9,8000040c +80000400: 4990146f jal x8,80002098 +80000404: 800003f4 .word 0x800003f4 +80000408: 80004a61 .word 0x80004a61 +8000040c: 004d0d13 addi x26,x26,4 + + mv x29, x26 # switch signature pointer register to avoid conflict with test +80000410: 000d0e93 addi x29,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x554fe2f8 +80000414: 0000ad03 lw x26,0(x1) +80000418: 00408093 addi x1,x1,4 + +8000041c : +Zksh_sm3p0_cg_cp_rs1_b26: + sm3p0 x19, x26 # perform operation +8000041c: 108d1993 sm3p0 x19,x26 + # Check if x19 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x19, Zksh_sm3p0_cg_cp_rs1_b26, Zksh_sm3p0_cg_cp_rs1_b26_str) +80000420: 000ea383 lw x7,0(x29) +80000424: 01338863 beq x7,x19,80000434 +80000428: 4710146f jal x8,80002098 +8000042c: 8000041c .word 0x8000041c +80000430: 80004a95 .word 0x80004a95 +80000434: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x54c1cc2a +80000438: 0000ad83 lw x27,0(x1) +8000043c: 00408093 addi x1,x1,4 + +80000440 : +Zksh_sm3p0_cg_cp_rs1_b27: + sm3p0 x2, x27 # perform operation +80000440: 108d9113 sm3p0 x2,x27 + # Check if x2 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x2, Zksh_sm3p0_cg_cp_rs1_b27, Zksh_sm3p0_cg_cp_rs1_b27_str) +80000444: 000ea383 lw x7,0(x29) +80000448: 00238863 beq x7,x2,80000458 +8000044c: 44d0146f jal x8,80002098 +80000450: 80000440 .word 0x80000440 +80000454: 80004ac9 .word 0x80004ac9 +80000458: 004e8e93 addi x29,x29,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xf4efd57f +8000045c: 0000ae03 lw x28,0(x1) +80000460: 00408093 addi x1,x1,4 + +80000464 : +Zksh_sm3p0_cg_cp_rs1_b28: + sm3p0 x17, x28 # perform operation +80000464: 108e1893 sm3p0 x17,x28 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zksh_sm3p0_cg_cp_rs1_b28, Zksh_sm3p0_cg_cp_rs1_b28_str) +80000468: 000ea383 lw x7,0(x29) +8000046c: 01138863 beq x7,x17,8000047c +80000470: 4290146f jal x8,80002098 +80000474: 80000464 .word 0x80000464 +80000478: 80004afd .word 0x80004afd +8000047c: 004e8e93 addi x29,x29,4 + + mv x11, x29 # switch signature pointer register to avoid conflict with test +80000480: 000e8593 addi x11,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xfb11298d +80000484: 0000ae83 lw x29,0(x1) +80000488: 00408093 addi x1,x1,4 + +8000048c : +Zksh_sm3p0_cg_cp_rs1_b29: + sm3p0 x24, x29 # perform operation +8000048c: 108e9c13 sm3p0 x24,x29 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zksh_sm3p0_cg_cp_rs1_b29, Zksh_sm3p0_cg_cp_rs1_b29_str) +80000490: 0005a383 lw x7,0(x11) +80000494: 01838863 beq x7,x24,800004a4 +80000498: 4010146f jal x8,80002098 +8000049c: 8000048c .word 0x8000048c +800004a0: 80004b31 .word 0x80004b31 +800004a4: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x64a6e484 +800004a8: 0000af03 lw x30,0(x1) +800004ac: 00408093 addi x1,x1,4 + +800004b0 : +Zksh_sm3p0_cg_cp_rs1_b30: + sm3p0 x19, x30 # perform operation +800004b0: 108f1993 sm3p0 x19,x30 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zksh_sm3p0_cg_cp_rs1_b30, Zksh_sm3p0_cg_cp_rs1_b30_str) +800004b4: 0005a383 lw x7,0(x11) +800004b8: 01338863 beq x7,x19,800004c8 +800004bc: 3dd0146f jal x8,80002098 +800004c0: 800004b0 .word 0x800004b0 +800004c4: 80004b65 .word 0x80004b65 +800004c8: 00458593 addi x11,x11,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x186b207f +800004cc: 0000af83 lw x31,0(x1) +800004d0: 00408093 addi x1,x1,4 + +800004d4 : +Zksh_sm3p0_cg_cp_rs1_b31: + sm3p0 x30, x31 # perform operation +800004d4: 108f9f13 sm3p0 x30,x31 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zksh_sm3p0_cg_cp_rs1_b31, Zksh_sm3p0_cg_cp_rs1_b31_str) +800004d8: 0005a383 lw x7,0(x11) +800004dc: 01e38863 beq x7,x30,800004ec +800004e0: 3b90146f jal x8,80002098 +800004e4: 800004d4 .word 0x800004d4 +800004e8: 80004b99 .word 0x80004b99 +800004ec: 00458593 addi x11,x11,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x64535e01 +800004f0: 0000ad83 lw x27,0(x1) +800004f4: 00408093 addi x1,x1,4 + +800004f8 : +Zksh_sm3p0_cg_cp_rd_b0: + sm3p0 x0, x27 # perform operation +800004f8: 108d9013 sm3p0 x0,x27 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zksh_sm3p0_cg_cp_rd_b0, Zksh_sm3p0_cg_cp_rd_b0_str) +800004fc: 0005a383 lw x7,0(x11) +80000500: 00038863 beq x7,x0,80000510 +80000504: 3950146f jal x8,80002098 +80000508: 800004f8 .word 0x800004f8 +8000050c: 80004bcd .word 0x80004bcd +80000510: 00458593 addi x11,x11,4 + + mv x9, x1 # switch data pointer register to avoid conflict with test +80000514: 00008493 addi x9,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x3f71fd89 +80000518: 0004a103 lw x2,0(x9) +8000051c: 00448493 addi x9,x9,4 + +80000520 : +Zksh_sm3p0_cg_cp_rd_b1: + sm3p0 x1, x2 # perform operation +80000520: 10811093 sm3p0 x1,x2 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zksh_sm3p0_cg_cp_rd_b1, Zksh_sm3p0_cg_cp_rd_b1_str) +80000524: 0005a383 lw x7,0(x11) +80000528: 00138863 beq x7,x1,80000538 +8000052c: 36d0146f jal x8,80002098 +80000530: 80000520 .word 0x80000520 +80000534: 80004bff .word 0x80004bff +80000538: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xd41cf1e6 +8000053c: 0004aa03 lw x20,0(x9) +80000540: 00448493 addi x9,x9,4 + +80000544 : +Zksh_sm3p0_cg_cp_rd_b2: + sm3p0 x2, x20 # perform operation +80000544: 108a1113 sm3p0 x2,x20 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zksh_sm3p0_cg_cp_rd_b2, Zksh_sm3p0_cg_cp_rd_b2_str) +80000548: 0005a383 lw x7,0(x11) +8000054c: 00238863 beq x7,x2,8000055c +80000550: 3490146f jal x8,80002098 +80000554: 80000544 .word 0x80000544 +80000558: 80004c31 .word 0x80004c31 +8000055c: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x59242c21 +80000560: 0004aa83 lw x21,0(x9) +80000564: 00448493 addi x9,x9,4 + +80000568 : +Zksh_sm3p0_cg_cp_rd_b3: + sm3p0 x3, x21 # perform operation +80000568: 108a9193 sm3p0 x3,x21 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zksh_sm3p0_cg_cp_rd_b3, Zksh_sm3p0_cg_cp_rd_b3_str) +8000056c: 0005a383 lw x7,0(x11) +80000570: 00338863 beq x7,x3,80000580 +80000574: 3250146f jal x8,80002098 +80000578: 80000568 .word 0x80000568 +8000057c: 80004c63 .word 0x80004c63 +80000580: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xec2878dd +80000584: 0004aa03 lw x20,0(x9) +80000588: 00448493 addi x9,x9,4 + +8000058c : +Zksh_sm3p0_cg_cp_rd_b4: + sm3p0 x4, x20 # perform operation +8000058c: 108a1213 sm3p0 x4,x20 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zksh_sm3p0_cg_cp_rd_b4, Zksh_sm3p0_cg_cp_rd_b4_str) +80000590: 0005a383 lw x7,0(x11) +80000594: 00438863 beq x7,x4,800005a4 +80000598: 3010146f jal x8,80002098 +8000059c: 8000058c .word 0x8000058c +800005a0: 80004c95 .word 0x80004c95 +800005a4: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xb060771e +800005a8: 0004a303 lw x6,0(x9) +800005ac: 00448493 addi x9,x9,4 + +800005b0 : +Zksh_sm3p0_cg_cp_rd_b5: + sm3p0 x5, x6 # perform operation +800005b0: 10831293 sm3p0 x5,x6 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zksh_sm3p0_cg_cp_rd_b5, Zksh_sm3p0_cg_cp_rd_b5_str) +800005b4: 0005a383 lw x7,0(x11) +800005b8: 00538863 beq x7,x5,800005c8 +800005bc: 2dd0146f jal x8,80002098 +800005c0: 800005b0 .word 0x800005b0 +800005c4: 80004cc7 .word 0x80004cc7 +800005c8: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x74b46f2e +800005cc: 0004a803 lw x16,0(x9) +800005d0: 00448493 addi x9,x9,4 + +800005d4 : +Zksh_sm3p0_cg_cp_rd_b6: + sm3p0 x6, x16 # perform operation +800005d4: 10881313 sm3p0 x6,x16 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zksh_sm3p0_cg_cp_rd_b6, Zksh_sm3p0_cg_cp_rd_b6_str) +800005d8: 0005a383 lw x7,0(x11) +800005dc: 00638863 beq x7,x6,800005ec +800005e0: 2b90146f jal x8,80002098 +800005e4: 800005d4 .word 0x800005d4 +800005e8: 80004cf9 .word 0x80004cf9 +800005ec: 00458593 addi x11,x11,4 + + mv x13, x7 # switch temp register to avoid conflict with test +800005f0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test +800005f4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xe9960d14 +800005f8: 0004ab83 lw x23,0(x9) +800005fc: 00448493 addi x9,x9,4 + +80000600 : +Zksh_sm3p0_cg_cp_rd_b7: + sm3p0 x7, x23 # perform operation +80000600: 108b9393 sm3p0 x7,x23 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zksh_sm3p0_cg_cp_rd_b7, Zksh_sm3p0_cg_cp_rd_b7_str) +80000604: 0005a683 lw x13,0(x11) +80000608: 00768863 beq x13,x7,80000618 +8000060c: 2b50176f jal x14,800020c0 +80000610: 80000600 .word 0x80000600 +80000614: 80004d2b .word 0x80004d2b +80000618: 00458593 addi x11,x11,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xc23ef752 +8000061c: 0004a283 lw x5,0(x9) +80000620: 00448493 addi x9,x9,4 + +80000624 : +Zksh_sm3p0_cg_cp_rd_b8: + sm3p0 x8, x5 # perform operation +80000624: 10829413 sm3p0 x8,x5 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zksh_sm3p0_cg_cp_rd_b8, Zksh_sm3p0_cg_cp_rd_b8_str) +80000628: 0005a683 lw x13,0(x11) +8000062c: 00868863 beq x13,x8,8000063c +80000630: 2910176f jal x14,800020c0 +80000634: 80000624 .word 0x80000624 +80000638: 80004d5d .word 0x80004d5d +8000063c: 00458593 addi x11,x11,4 + + mv x10, x9 # switch data pointer register to avoid conflict with test +80000640: 00048513 addi x10,x9,0 +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x6b470904 +80000644: 00052a83 lw x21,0(x10) +80000648: 00450513 addi x10,x10,4 + +8000064c : +Zksh_sm3p0_cg_cp_rd_b9: + sm3p0 x9, x21 # perform operation +8000064c: 108a9493 sm3p0 x9,x21 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zksh_sm3p0_cg_cp_rd_b9, Zksh_sm3p0_cg_cp_rd_b9_str) +80000650: 0005a683 lw x13,0(x11) +80000654: 00968863 beq x13,x9,80000664 +80000658: 2690176f jal x14,800020c0 +8000065c: 8000064c .word 0x8000064c +80000660: 80004d8f .word 0x80004d8f +80000664: 00458593 addi x11,x11,4 + + mv x26, x10 # switch data pointer register to avoid conflict with test +80000668: 00050d13 addi x26,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x0fd2e692 +8000066c: 000d2283 lw x5,0(x26) +80000670: 004d0d13 addi x26,x26,4 + +80000674 : +Zksh_sm3p0_cg_cp_rd_b10: + sm3p0 x10, x5 # perform operation +80000674: 10829513 sm3p0 x10,x5 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zksh_sm3p0_cg_cp_rd_b10, Zksh_sm3p0_cg_cp_rd_b10_str) +80000678: 0005a683 lw x13,0(x11) +8000067c: 00a68863 beq x13,x10,8000068c +80000680: 2410176f jal x14,800020c0 +80000684: 80000674 .word 0x80000674 +80000688: 80004dc1 .word 0x80004dc1 +8000068c: 00458593 addi x11,x11,4 + + mv x21, x11 # switch signature pointer register to avoid conflict with test +80000690: 00058a93 addi x21,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x50dc4758 +80000694: 000d2883 lw x17,0(x26) +80000698: 004d0d13 addi x26,x26,4 + +8000069c : +Zksh_sm3p0_cg_cp_rd_b11: + sm3p0 x11, x17 # perform operation +8000069c: 10889593 sm3p0 x11,x17 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zksh_sm3p0_cg_cp_rd_b11, Zksh_sm3p0_cg_cp_rd_b11_str) +800006a0: 000aa683 lw x13,0(x21) +800006a4: 00b68863 beq x13,x11,800006b4 +800006a8: 2190176f jal x14,800020c0 +800006ac: 8000069c .word 0x8000069c +800006b0: 80004df4 .word 0x80004df4 +800006b4: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs1: x30 = 0x5cc75ec4 +800006b8: 000d2f03 lw x30,0(x26) +800006bc: 004d0d13 addi x26,x26,4 + +800006c0 : +Zksh_sm3p0_cg_cp_rd_b12: + sm3p0 x12, x30 # perform operation +800006c0: 108f1613 sm3p0 x12,x30 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zksh_sm3p0_cg_cp_rd_b12, Zksh_sm3p0_cg_cp_rd_b12_str) +800006c4: 000aa683 lw x13,0(x21) +800006c8: 00c68863 beq x13,x12,800006d8 +800006cc: 1f50176f jal x14,800020c0 +800006d0: 800006c0 .word 0x800006c0 +800006d4: 80004e27 .word 0x80004e27 +800006d8: 004a8a93 addi x21,x21,4 + + mv x4, x13 # switch temp register to avoid conflict with test +800006dc: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test +800006e0: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x4f3cfea9 +800006e4: 000d2f83 lw x31,0(x26) +800006e8: 004d0d13 addi x26,x26,4 + +800006ec : +Zksh_sm3p0_cg_cp_rd_b13: + sm3p0 x13, x31 # perform operation +800006ec: 108f9693 sm3p0 x13,x31 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zksh_sm3p0_cg_cp_rd_b13, Zksh_sm3p0_cg_cp_rd_b13_str) +800006f0: 000aa203 lw x4,0(x21) +800006f4: 00d20863 beq x4,x13,80000704 +800006f8: 189012ef jal x5,80002080 +800006fc: 800006ec .word 0x800006ec +80000700: 80004e5a .word 0x80004e5a +80000704: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xd483e728 +80000708: 000d2483 lw x9,0(x26) +8000070c: 004d0d13 addi x26,x26,4 + +80000710 : +Zksh_sm3p0_cg_cp_rd_b14: + sm3p0 x14, x9 # perform operation +80000710: 10849713 sm3p0 x14,x9 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zksh_sm3p0_cg_cp_rd_b14, Zksh_sm3p0_cg_cp_rd_b14_str) +80000714: 000aa203 lw x4,0(x21) +80000718: 00e20863 beq x4,x14,80000728 +8000071c: 165012ef jal x5,80002080 +80000720: 80000710 .word 0x80000710 +80000724: 80004e8d .word 0x80004e8d +80000728: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x70060955 +8000072c: 000d2983 lw x19,0(x26) +80000730: 004d0d13 addi x26,x26,4 + +80000734 : +Zksh_sm3p0_cg_cp_rd_b15: + sm3p0 x15, x19 # perform operation +80000734: 10899793 sm3p0 x15,x19 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zksh_sm3p0_cg_cp_rd_b15, Zksh_sm3p0_cg_cp_rd_b15_str) +80000738: 000aa203 lw x4,0(x21) +8000073c: 00f20863 beq x4,x15,8000074c +80000740: 141012ef jal x5,80002080 +80000744: 80000734 .word 0x80000734 +80000748: 80004ec0 .word 0x80004ec0 +8000074c: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xf7e285d1 +80000750: 000d2483 lw x9,0(x26) +80000754: 004d0d13 addi x26,x26,4 + +80000758 : +Zksh_sm3p0_cg_cp_rd_b16: + sm3p0 x16, x9 # perform operation +80000758: 10849813 sm3p0 x16,x9 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zksh_sm3p0_cg_cp_rd_b16, Zksh_sm3p0_cg_cp_rd_b16_str) +8000075c: 000aa203 lw x4,0(x21) +80000760: 01020863 beq x4,x16,80000770 +80000764: 11d012ef jal x5,80002080 +80000768: 80000758 .word 0x80000758 +8000076c: 80004ef3 .word 0x80004ef3 +80000770: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x4d551a50 +80000774: 000d2703 lw x14,0(x26) +80000778: 004d0d13 addi x26,x26,4 + +8000077c : +Zksh_sm3p0_cg_cp_rd_b17: + sm3p0 x17, x14 # perform operation +8000077c: 10871893 sm3p0 x17,x14 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zksh_sm3p0_cg_cp_rd_b17, Zksh_sm3p0_cg_cp_rd_b17_str) +80000780: 000aa203 lw x4,0(x21) +80000784: 01120863 beq x4,x17,80000794 +80000788: 0f9012ef jal x5,80002080 +8000078c: 8000077c .word 0x8000077c +80000790: 80004f26 .word 0x80004f26 +80000794: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x9d183994 +80000798: 000d2c83 lw x25,0(x26) +8000079c: 004d0d13 addi x26,x26,4 + +800007a0 : +Zksh_sm3p0_cg_cp_rd_b18: + sm3p0 x18, x25 # perform operation +800007a0: 108c9913 sm3p0 x18,x25 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zksh_sm3p0_cg_cp_rd_b18, Zksh_sm3p0_cg_cp_rd_b18_str) +800007a4: 000aa203 lw x4,0(x21) +800007a8: 01220863 beq x4,x18,800007b8 +800007ac: 0d5012ef jal x5,80002080 +800007b0: 800007a0 .word 0x800007a0 +800007b4: 80004f59 .word 0x80004f59 +800007b8: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x880a3223 +800007bc: 000d2783 lw x15,0(x26) +800007c0: 004d0d13 addi x26,x26,4 + +800007c4 : +Zksh_sm3p0_cg_cp_rd_b19: + sm3p0 x19, x15 # perform operation +800007c4: 10879993 sm3p0 x19,x15 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zksh_sm3p0_cg_cp_rd_b19, Zksh_sm3p0_cg_cp_rd_b19_str) +800007c8: 000aa203 lw x4,0(x21) +800007cc: 01320863 beq x4,x19,800007dc +800007d0: 0b1012ef jal x5,80002080 +800007d4: 800007c4 .word 0x800007c4 +800007d8: 80004f8c .word 0x80004f8c +800007dc: 004a8a93 addi x21,x21,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xb4233e02 +800007e0: 000d2883 lw x17,0(x26) +800007e4: 004d0d13 addi x26,x26,4 + +800007e8 : +Zksh_sm3p0_cg_cp_rd_b20: + sm3p0 x20, x17 # perform operation +800007e8: 10889a13 sm3p0 x20,x17 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zksh_sm3p0_cg_cp_rd_b20, Zksh_sm3p0_cg_cp_rd_b20_str) +800007ec: 000aa203 lw x4,0(x21) +800007f0: 01420863 beq x4,x20,80000800 +800007f4: 08d012ef jal x5,80002080 +800007f8: 800007e8 .word 0x800007e8 +800007fc: 80004fbf .word 0x80004fbf +80000800: 004a8a93 addi x21,x21,4 + + mv x3, x21 # switch signature pointer register to avoid conflict with test +80000804: 000a8193 addi x3,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0x05fcbf61 +80000808: 000d2e03 lw x28,0(x26) +8000080c: 004d0d13 addi x26,x26,4 + +80000810 : +Zksh_sm3p0_cg_cp_rd_b21: + sm3p0 x21, x28 # perform operation +80000810: 108e1a93 sm3p0 x21,x28 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zksh_sm3p0_cg_cp_rd_b21, Zksh_sm3p0_cg_cp_rd_b21_str) +80000814: 0001a203 lw x4,0(x3) +80000818: 01520863 beq x4,x21,80000828 +8000081c: 065012ef jal x5,80002080 +80000820: 80000810 .word 0x80000810 +80000824: 80004ff2 .word 0x80004ff2 +80000828: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x1a119308 +8000082c: 000d2403 lw x8,0(x26) +80000830: 004d0d13 addi x26,x26,4 + +80000834 : +Zksh_sm3p0_cg_cp_rd_b22: + sm3p0 x22, x8 # perform operation +80000834: 10841b13 sm3p0 x22,x8 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zksh_sm3p0_cg_cp_rd_b22, Zksh_sm3p0_cg_cp_rd_b22_str) +80000838: 0001a203 lw x4,0(x3) +8000083c: 01620863 beq x4,x22,8000084c +80000840: 041012ef jal x5,80002080 +80000844: 80000834 .word 0x80000834 +80000848: 80005025 .word 0x80005025 +8000084c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xc0b1b40d +80000850: 000d2c83 lw x25,0(x26) +80000854: 004d0d13 addi x26,x26,4 + +80000858 : +Zksh_sm3p0_cg_cp_rd_b23: + sm3p0 x23, x25 # perform operation +80000858: 108c9b93 sm3p0 x23,x25 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zksh_sm3p0_cg_cp_rd_b23, Zksh_sm3p0_cg_cp_rd_b23_str) +8000085c: 0001a203 lw x4,0(x3) +80000860: 01720863 beq x4,x23,80000870 +80000864: 01d012ef jal x5,80002080 +80000868: 80000858 .word 0x80000858 +8000086c: 80005058 .word 0x80005058 +80000870: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x4fb0b609 +80000874: 000d2983 lw x19,0(x26) +80000878: 004d0d13 addi x26,x26,4 + +8000087c : +Zksh_sm3p0_cg_cp_rd_b24: + sm3p0 x24, x19 # perform operation +8000087c: 10899c13 sm3p0 x24,x19 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zksh_sm3p0_cg_cp_rd_b24, Zksh_sm3p0_cg_cp_rd_b24_str) +80000880: 0001a203 lw x4,0(x3) +80000884: 01820863 beq x4,x24,80000894 +80000888: 7f8012ef jal x5,80002080 +8000088c: 8000087c .word 0x8000087c +80000890: 8000508b .word 0x8000508b +80000894: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xa520ad06 +80000898: 000d2c03 lw x24,0(x26) +8000089c: 004d0d13 addi x26,x26,4 + +800008a0 : +Zksh_sm3p0_cg_cp_rd_b25: + sm3p0 x25, x24 # perform operation +800008a0: 108c1c93 sm3p0 x25,x24 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zksh_sm3p0_cg_cp_rd_b25, Zksh_sm3p0_cg_cp_rd_b25_str) +800008a4: 0001a203 lw x4,0(x3) +800008a8: 01920863 beq x4,x25,800008b8 +800008ac: 7d4012ef jal x5,80002080 +800008b0: 800008a0 .word 0x800008a0 +800008b4: 800050be .word 0x800050be +800008b8: 00418193 addi x3,x3,4 + + mv x6, x26 # switch data pointer register to avoid conflict with test +800008bc: 000d0313 addi x6,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x97532849 +800008c0: 00032703 lw x14,0(x6) +800008c4: 00430313 addi x6,x6,4 + +800008c8 : +Zksh_sm3p0_cg_cp_rd_b26: + sm3p0 x26, x14 # perform operation +800008c8: 10871d13 sm3p0 x26,x14 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zksh_sm3p0_cg_cp_rd_b26, Zksh_sm3p0_cg_cp_rd_b26_str) +800008cc: 0001a203 lw x4,0(x3) +800008d0: 01a20863 beq x4,x26,800008e0 +800008d4: 7ac012ef jal x5,80002080 +800008d8: 800008c8 .word 0x800008c8 +800008dc: 800050f1 .word 0x800050f1 +800008e0: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x4c29c0d9 +800008e4: 00032483 lw x9,0(x6) +800008e8: 00430313 addi x6,x6,4 + +800008ec : +Zksh_sm3p0_cg_cp_rd_b27: + sm3p0 x27, x9 # perform operation +800008ec: 10849d93 sm3p0 x27,x9 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zksh_sm3p0_cg_cp_rd_b27, Zksh_sm3p0_cg_cp_rd_b27_str) +800008f0: 0001a203 lw x4,0(x3) +800008f4: 01b20863 beq x4,x27,80000904 +800008f8: 788012ef jal x5,80002080 +800008fc: 800008ec .word 0x800008ec +80000900: 80005124 .word 0x80005124 +80000904: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x5bac77bb +80000908: 00032103 lw x2,0(x6) +8000090c: 00430313 addi x6,x6,4 + +80000910 : +Zksh_sm3p0_cg_cp_rd_b28: + sm3p0 x28, x2 # perform operation +80000910: 10811e13 sm3p0 x28,x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zksh_sm3p0_cg_cp_rd_b28, Zksh_sm3p0_cg_cp_rd_b28_str) +80000914: 0001a203 lw x4,0(x3) +80000918: 01c20863 beq x4,x28,80000928 +8000091c: 764012ef jal x5,80002080 +80000920: 80000910 .word 0x80000910 +80000924: 80005157 .word 0x80005157 +80000928: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xe6fc23d5 +8000092c: 00032703 lw x14,0(x6) +80000930: 00430313 addi x6,x6,4 + +80000934 : +Zksh_sm3p0_cg_cp_rd_b29: + sm3p0 x29, x14 # perform operation +80000934: 10871e93 sm3p0 x29,x14 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zksh_sm3p0_cg_cp_rd_b29, Zksh_sm3p0_cg_cp_rd_b29_str) +80000938: 0001a203 lw x4,0(x3) +8000093c: 01d20863 beq x4,x29,8000094c +80000940: 740012ef jal x5,80002080 +80000944: 80000934 .word 0x80000934 +80000948: 8000518a .word 0x8000518a +8000094c: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x00b8e018 +80000950: 00032d83 lw x27,0(x6) +80000954: 00430313 addi x6,x6,4 + +80000958 : +Zksh_sm3p0_cg_cp_rd_b30: + sm3p0 x30, x27 # perform operation +80000958: 108d9f13 sm3p0 x30,x27 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zksh_sm3p0_cg_cp_rd_b30, Zksh_sm3p0_cg_cp_rd_b30_str) +8000095c: 0001a203 lw x4,0(x3) +80000960: 01e20863 beq x4,x30,80000970 +80000964: 71c012ef jal x5,80002080 +80000968: 80000958 .word 0x80000958 +8000096c: 800051bd .word 0x800051bd +80000970: 00418193 addi x3,x3,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x502cca7c +80000974: 00032b83 lw x23,0(x6) +80000978: 00430313 addi x6,x6,4 + +8000097c : +Zksh_sm3p0_cg_cp_rd_b31: + sm3p0 x31, x23 # perform operation +8000097c: 108b9f93 sm3p0 x31,x23 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zksh_sm3p0_cg_cp_rd_b31, Zksh_sm3p0_cg_cp_rd_b31_str) +80000980: 0001a203 lw x4,0(x3) +80000984: 01f20863 beq x4,x31,80000994 +80000988: 6f8012ef jal x5,80002080 +8000098c: 8000097c .word 0x8000097c +80000990: 800051f0 .word 0x800051f0 +80000994: 00418193 addi x3,x3,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x00000000 +80000998: 00032983 lw x19,0(x6) +8000099c: 00430313 addi x6,x6,4 + +800009a0 : +Zksh_sm3p0_cg_cp_rs1_edges_0x0: + sm3p0 x13, x19 # perform operation +800009a0: 10899693 sm3p0 x13,x19 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zksh_sm3p0_cg_cp_rs1_edges_0x0, Zksh_sm3p0_cg_cp_rs1_edges_0x0_str) +800009a4: 0001a203 lw x4,0(x3) +800009a8: 00d20863 beq x4,x13,800009b8 +800009ac: 6d4012ef jal x5,80002080 +800009b0: 800009a0 .word 0x800009a0 +800009b4: 80005223 .word 0x80005223 +800009b8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000001 +800009bc: 00032103 lw x2,0(x6) +800009c0: 00430313 addi x6,x6,4 + +800009c4 : +Zksh_sm3p0_cg_cp_rs1_edges_0x1: + sm3p0 x30, x2 # perform operation +800009c4: 10811f13 sm3p0 x30,x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zksh_sm3p0_cg_cp_rs1_edges_0x1, Zksh_sm3p0_cg_cp_rs1_edges_0x1_str) +800009c8: 0001a203 lw x4,0(x3) +800009cc: 01e20863 beq x4,x30,800009dc +800009d0: 6b0012ef jal x5,80002080 +800009d4: 800009c4 .word 0x800009c4 +800009d8: 8000525d .word 0x8000525d +800009dc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x00000002 +800009e0: 00032883 lw x17,0(x6) +800009e4: 00430313 addi x6,x6,4 + +800009e8 : +Zksh_sm3p0_cg_cp_rs1_edges_0x2: + sm3p0 x12, x17 # perform operation +800009e8: 10889613 sm3p0 x12,x17 + # Check if x12 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x12, Zksh_sm3p0_cg_cp_rs1_edges_0x2, Zksh_sm3p0_cg_cp_rs1_edges_0x2_str) +800009ec: 0001a203 lw x4,0(x3) +800009f0: 00c20863 beq x4,x12,80000a00 +800009f4: 68c012ef jal x5,80002080 +800009f8: 800009e8 .word 0x800009e8 +800009fc: 80005297 .word 0x80005297 +80000a00: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x80000000 +80000a04: 00032883 lw x17,0(x6) +80000a08: 00430313 addi x6,x6,4 + +80000a0c : +Zksh_sm3p0_cg_cp_rs1_edges_0x80000000: + sm3p0 x9, x17 # perform operation +80000a0c: 10889493 sm3p0 x9,x17 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zksh_sm3p0_cg_cp_rs1_edges_0x80000000, Zksh_sm3p0_cg_cp_rs1_edges_0x80000000_str) +80000a10: 0001a203 lw x4,0(x3) +80000a14: 00920863 beq x4,x9,80000a24 +80000a18: 668012ef jal x5,80002080 +80000a1c: 80000a0c .word 0x80000a0c +80000a20: 800052d1 .word 0x800052d1 +80000a24: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x80000001 +80000a28: 00032083 lw x1,0(x6) +80000a2c: 00430313 addi x6,x6,4 + +80000a30 : +Zksh_sm3p0_cg_cp_rs1_edges_0x80000001: + sm3p0 x9, x1 # perform operation +80000a30: 10809493 sm3p0 x9,x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zksh_sm3p0_cg_cp_rs1_edges_0x80000001, Zksh_sm3p0_cg_cp_rs1_edges_0x80000001_str) +80000a34: 0001a203 lw x4,0(x3) +80000a38: 00920863 beq x4,x9,80000a48 +80000a3c: 644012ef jal x5,80002080 +80000a40: 80000a30 .word 0x80000a30 +80000a44: 80005312 .word 0x80005312 +80000a48: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7fffffff +80000a4c: 00032683 lw x13,0(x6) +80000a50: 00430313 addi x6,x6,4 + +80000a54 : +Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffff: + sm3p0 x1, x13 # perform operation +80000a54: 10869093 sm3p0 x1,x13 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffff, Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffff_str) +80000a58: 0001a203 lw x4,0(x3) +80000a5c: 00120863 beq x4,x1,80000a6c +80000a60: 620012ef jal x5,80002080 +80000a64: 80000a54 .word 0x80000a54 +80000a68: 80005353 .word 0x80005353 +80000a6c: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x7ffffffe +80000a70: 00032d03 lw x26,0(x6) +80000a74: 00430313 addi x6,x6,4 + +80000a78 : +Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffe: + sm3p0 x11, x26 # perform operation +80000a78: 108d1593 sm3p0 x11,x26 + # Check if x11 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x11, Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffe, Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffe_str) +80000a7c: 0001a203 lw x4,0(x3) +80000a80: 00b20863 beq x4,x11,80000a90 +80000a84: 5fc012ef jal x5,80002080 +80000a88: 80000a78 .word 0x80000a78 +80000a8c: 80005394 .word 0x80005394 +80000a90: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xffffffff +80000a94: 00032a83 lw x21,0(x6) +80000a98: 00430313 addi x6,x6,4 + +80000a9c : +Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff: + sm3p0 x18, x21 # perform operation +80000a9c: 108a9913 sm3p0 x18,x21 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff_str) +80000aa0: 0001a203 lw x4,0(x3) +80000aa4: 01220863 beq x4,x18,80000ab4 +80000aa8: 5d8012ef jal x5,80002080 +80000aac: 80000a9c .word 0x80000a9c +80000ab0: 800053d5 .word 0x800053d5 +80000ab4: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xfffffffe +80000ab8: 00032403 lw x8,0(x6) +80000abc: 00430313 addi x6,x6,4 + +80000ac0 : +Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe: + sm3p0 x22, x8 # perform operation +80000ac0: 10841b13 sm3p0 x22,x8 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe_str) +80000ac4: 0001a203 lw x4,0(x3) +80000ac8: 01620863 beq x4,x22,80000ad8 +80000acc: 5b4012ef jal x5,80002080 +80000ad0: 80000ac0 .word 0x80000ac0 +80000ad4: 80005416 .word 0x80005416 +80000ad8: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x5bbc8872 +80000adc: 00032083 lw x1,0(x6) +80000ae0: 00430313 addi x6,x6,4 + +80000ae4 : +Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc8872: + sm3p0 x2, x1 # perform operation +80000ae4: 10809113 sm3p0 x2,x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc8872, Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc8872_str) +80000ae8: 0001a203 lw x4,0(x3) +80000aec: 00220863 beq x4,x2,80000afc +80000af0: 590012ef jal x5,80002080 +80000af4: 80000ae4 .word 0x80000ae4 +80000af8: 80005457 .word 0x80005457 +80000afc: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xaaaaaaaa +80000b00: 00032703 lw x14,0(x6) +80000b04: 00430313 addi x6,x6,4 + +80000b08 : +Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaa: + sm3p0 x31, x14 # perform operation +80000b08: 10871f93 sm3p0 x31,x14 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaa, Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000b0c: 0001a203 lw x4,0(x3) +80000b10: 01f20863 beq x4,x31,80000b20 +80000b14: 56c012ef jal x5,80002080 +80000b18: 80000b08 .word 0x80000b08 +80000b1c: 80005498 .word 0x80005498 +80000b20: 00418193 addi x3,x3,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x55555555 +80000b24: 00032c83 lw x25,0(x6) +80000b28: 00430313 addi x6,x6,4 + +80000b2c : +Zksh_sm3p0_cg_cp_rs1_edges_0x55555555: + sm3p0 x20, x25 # perform operation +80000b2c: 108c9a13 sm3p0 x20,x25 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zksh_sm3p0_cg_cp_rs1_edges_0x55555555, Zksh_sm3p0_cg_cp_rs1_edges_0x55555555_str) +80000b30: 0001a203 lw x4,0(x3) +80000b34: 01420863 beq x4,x20,80000b44 +80000b38: 548012ef jal x5,80002080 +80000b3c: 80000b2c .word 0x80000b2c +80000b40: 800054d9 .word 0x800054d9 +80000b44: 00418193 addi x3,x3,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x330bc744 +80000b48: 00032003 lw x0,0(x6) +80000b4c: 00430313 addi x6,x6,4 + +80000b50 : +Zksh_sm3p0_cg_cmp_rd_rs1_b0: + sm3p0 x0, x0 # perform operation +80000b50: 10801013 sm3p0 x0,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zksh_sm3p0_cg_cmp_rd_rs1_b0, Zksh_sm3p0_cg_cmp_rd_rs1_b0_str) +80000b54: 0001a203 lw x4,0(x3) +80000b58: 00020863 beq x4,x0,80000b68 +80000b5c: 524012ef jal x5,80002080 +80000b60: 80000b50 .word 0x80000b50 +80000b64: 8000551a .word 0x8000551a +80000b68: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x9be52bde +80000b6c: 00032083 lw x1,0(x6) +80000b70: 00430313 addi x6,x6,4 + +80000b74 : +Zksh_sm3p0_cg_cmp_rd_rs1_b1: + sm3p0 x1, x1 # perform operation +80000b74: 10809093 sm3p0 x1,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zksh_sm3p0_cg_cmp_rd_rs1_b1, Zksh_sm3p0_cg_cmp_rd_rs1_b1_str) +80000b78: 0001a203 lw x4,0(x3) +80000b7c: 00120863 beq x4,x1,80000b8c +80000b80: 500012ef jal x5,80002080 +80000b84: 80000b74 .word 0x80000b74 +80000b88: 80005551 .word 0x80005551 +80000b8c: 00418193 addi x3,x3,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x8539cc9b +80000b90: 00032103 lw x2,0(x6) +80000b94: 00430313 addi x6,x6,4 + +80000b98 : +Zksh_sm3p0_cg_cmp_rd_rs1_b2: + sm3p0 x2, x2 # perform operation +80000b98: 10811113 sm3p0 x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zksh_sm3p0_cg_cmp_rd_rs1_b2, Zksh_sm3p0_cg_cmp_rd_rs1_b2_str) +80000b9c: 0001a203 lw x4,0(x3) +80000ba0: 00220863 beq x4,x2,80000bb0 +80000ba4: 4dc012ef jal x5,80002080 +80000ba8: 80000b98 .word 0x80000b98 +80000bac: 80005588 .word 0x80005588 +80000bb0: 00418193 addi x3,x3,4 + + mv x18, x3 # switch signature pointer register to avoid conflict with test +80000bb4: 00018913 addi x18,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8bd42d2b +80000bb8: 00032183 lw x3,0(x6) +80000bbc: 00430313 addi x6,x6,4 + +80000bc0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b3: + sm3p0 x3, x3 # perform operation +80000bc0: 10819193 sm3p0 x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zksh_sm3p0_cg_cmp_rd_rs1_b3, Zksh_sm3p0_cg_cmp_rd_rs1_b3_str) +80000bc4: 00092203 lw x4,0(x18) +80000bc8: 00320863 beq x4,x3,80000bd8 +80000bcc: 4b4012ef jal x5,80002080 +80000bd0: 80000bc0 .word 0x80000bc0 +80000bd4: 800055bf .word 0x800055bf +80000bd8: 00490913 addi x18,x18,4 + + mv x7, x4 # switch temp register to avoid conflict with test +80000bdc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test +80000be0: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x638075d6 +80000be4: 00032203 lw x4,0(x6) +80000be8: 00430313 addi x6,x6,4 + +80000bec : +Zksh_sm3p0_cg_cmp_rd_rs1_b4: + sm3p0 x4, x4 # perform operation +80000bec: 10821213 sm3p0 x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksh_sm3p0_cg_cmp_rd_rs1_b4, Zksh_sm3p0_cg_cmp_rd_rs1_b4_str) +80000bf0: 00092383 lw x7,0(x18) +80000bf4: 00438863 beq x7,x4,80000c04 +80000bf8: 4a00146f jal x8,80002098 +80000bfc: 80000bec .word 0x80000bec +80000c00: 800055f6 .word 0x800055f6 +80000c04: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x76ac1ed3 +80000c08: 00032283 lw x5,0(x6) +80000c0c: 00430313 addi x6,x6,4 + +80000c10 : +Zksh_sm3p0_cg_cmp_rd_rs1_b5: + sm3p0 x5, x5 # perform operation +80000c10: 10829293 sm3p0 x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksh_sm3p0_cg_cmp_rd_rs1_b5, Zksh_sm3p0_cg_cmp_rd_rs1_b5_str) +80000c14: 00092383 lw x7,0(x18) +80000c18: 00538863 beq x7,x5,80000c28 +80000c1c: 47c0146f jal x8,80002098 +80000c20: 80000c10 .word 0x80000c10 +80000c24: 8000562d .word 0x8000562d +80000c28: 00490913 addi x18,x18,4 + + mv x30, x6 # switch data pointer register to avoid conflict with test +80000c2c: 00030f13 addi x30,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x6c916828 +80000c30: 000f2303 lw x6,0(x30) +80000c34: 004f0f13 addi x30,x30,4 + +80000c38 : +Zksh_sm3p0_cg_cmp_rd_rs1_b6: + sm3p0 x6, x6 # perform operation +80000c38: 10831313 sm3p0 x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksh_sm3p0_cg_cmp_rd_rs1_b6, Zksh_sm3p0_cg_cmp_rd_rs1_b6_str) +80000c3c: 00092383 lw x7,0(x18) +80000c40: 00638863 beq x7,x6,80000c50 +80000c44: 4540146f jal x8,80002098 +80000c48: 80000c38 .word 0x80000c38 +80000c4c: 80005664 .word 0x80005664 +80000c50: 00490913 addi x18,x18,4 + + mv x4, x7 # switch temp register to avoid conflict with test +80000c54: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +80000c58: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x073d0010 +80000c5c: 000f2383 lw x7,0(x30) +80000c60: 004f0f13 addi x30,x30,4 + +80000c64 : +Zksh_sm3p0_cg_cmp_rd_rs1_b7: + sm3p0 x7, x7 # perform operation +80000c64: 10839393 sm3p0 x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zksh_sm3p0_cg_cmp_rd_rs1_b7, Zksh_sm3p0_cg_cmp_rd_rs1_b7_str) +80000c68: 00092203 lw x4,0(x18) +80000c6c: 00720863 beq x4,x7,80000c7c +80000c70: 410012ef jal x5,80002080 +80000c74: 80000c64 .word 0x80000c64 +80000c78: 8000569b .word 0x8000569b +80000c7c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x77713165 +80000c80: 000f2403 lw x8,0(x30) +80000c84: 004f0f13 addi x30,x30,4 + +80000c88 : +Zksh_sm3p0_cg_cmp_rd_rs1_b8: + sm3p0 x8, x8 # perform operation +80000c88: 10841413 sm3p0 x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zksh_sm3p0_cg_cmp_rd_rs1_b8, Zksh_sm3p0_cg_cmp_rd_rs1_b8_str) +80000c8c: 00092203 lw x4,0(x18) +80000c90: 00820863 beq x4,x8,80000ca0 +80000c94: 3ec012ef jal x5,80002080 +80000c98: 80000c88 .word 0x80000c88 +80000c9c: 800056d2 .word 0x800056d2 +80000ca0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x4e84104a +80000ca4: 000f2483 lw x9,0(x30) +80000ca8: 004f0f13 addi x30,x30,4 + +80000cac : +Zksh_sm3p0_cg_cmp_rd_rs1_b9: + sm3p0 x9, x9 # perform operation +80000cac: 10849493 sm3p0 x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zksh_sm3p0_cg_cmp_rd_rs1_b9, Zksh_sm3p0_cg_cmp_rd_rs1_b9_str) +80000cb0: 00092203 lw x4,0(x18) +80000cb4: 00920863 beq x4,x9,80000cc4 +80000cb8: 3c8012ef jal x5,80002080 +80000cbc: 80000cac .word 0x80000cac +80000cc0: 80005709 .word 0x80005709 +80000cc4: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x1a50980b +80000cc8: 000f2503 lw x10,0(x30) +80000ccc: 004f0f13 addi x30,x30,4 + +80000cd0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b10: + sm3p0 x10, x10 # perform operation +80000cd0: 10851513 sm3p0 x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zksh_sm3p0_cg_cmp_rd_rs1_b10, Zksh_sm3p0_cg_cmp_rd_rs1_b10_str) +80000cd4: 00092203 lw x4,0(x18) +80000cd8: 00a20863 beq x4,x10,80000ce8 +80000cdc: 3a4012ef jal x5,80002080 +80000ce0: 80000cd0 .word 0x80000cd0 +80000ce4: 80005740 .word 0x80005740 +80000ce8: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x8faf3fcd +80000cec: 000f2583 lw x11,0(x30) +80000cf0: 004f0f13 addi x30,x30,4 + +80000cf4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b11: + sm3p0 x11, x11 # perform operation +80000cf4: 10859593 sm3p0 x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zksh_sm3p0_cg_cmp_rd_rs1_b11, Zksh_sm3p0_cg_cmp_rd_rs1_b11_str) +80000cf8: 00092203 lw x4,0(x18) +80000cfc: 00b20863 beq x4,x11,80000d0c +80000d00: 380012ef jal x5,80002080 +80000d04: 80000cf4 .word 0x80000cf4 +80000d08: 80005778 .word 0x80005778 +80000d0c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xf7291114 +80000d10: 000f2603 lw x12,0(x30) +80000d14: 004f0f13 addi x30,x30,4 + +80000d18 : +Zksh_sm3p0_cg_cmp_rd_rs1_b12: + sm3p0 x12, x12 # perform operation +80000d18: 10861613 sm3p0 x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zksh_sm3p0_cg_cmp_rd_rs1_b12, Zksh_sm3p0_cg_cmp_rd_rs1_b12_str) +80000d1c: 00092203 lw x4,0(x18) +80000d20: 00c20863 beq x4,x12,80000d30 +80000d24: 35c012ef jal x5,80002080 +80000d28: 80000d18 .word 0x80000d18 +80000d2c: 800057b0 .word 0x800057b0 +80000d30: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xdae5870d +80000d34: 000f2683 lw x13,0(x30) +80000d38: 004f0f13 addi x30,x30,4 + +80000d3c : +Zksh_sm3p0_cg_cmp_rd_rs1_b13: + sm3p0 x13, x13 # perform operation +80000d3c: 10869693 sm3p0 x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zksh_sm3p0_cg_cmp_rd_rs1_b13, Zksh_sm3p0_cg_cmp_rd_rs1_b13_str) +80000d40: 00092203 lw x4,0(x18) +80000d44: 00d20863 beq x4,x13,80000d54 +80000d48: 338012ef jal x5,80002080 +80000d4c: 80000d3c .word 0x80000d3c +80000d50: 800057e8 .word 0x800057e8 +80000d54: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x08f0ec52 +80000d58: 000f2703 lw x14,0(x30) +80000d5c: 004f0f13 addi x30,x30,4 + +80000d60 : +Zksh_sm3p0_cg_cmp_rd_rs1_b14: + sm3p0 x14, x14 # perform operation +80000d60: 10871713 sm3p0 x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zksh_sm3p0_cg_cmp_rd_rs1_b14, Zksh_sm3p0_cg_cmp_rd_rs1_b14_str) +80000d64: 00092203 lw x4,0(x18) +80000d68: 00e20863 beq x4,x14,80000d78 +80000d6c: 314012ef jal x5,80002080 +80000d70: 80000d60 .word 0x80000d60 +80000d74: 80005820 .word 0x80005820 +80000d78: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x7204ea76 +80000d7c: 000f2783 lw x15,0(x30) +80000d80: 004f0f13 addi x30,x30,4 + +80000d84 : +Zksh_sm3p0_cg_cmp_rd_rs1_b15: + sm3p0 x15, x15 # perform operation +80000d84: 10879793 sm3p0 x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zksh_sm3p0_cg_cmp_rd_rs1_b15, Zksh_sm3p0_cg_cmp_rd_rs1_b15_str) +80000d88: 00092203 lw x4,0(x18) +80000d8c: 00f20863 beq x4,x15,80000d9c +80000d90: 2f0012ef jal x5,80002080 +80000d94: 80000d84 .word 0x80000d84 +80000d98: 80005858 .word 0x80005858 +80000d9c: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xaa261f35 +80000da0: 000f2803 lw x16,0(x30) +80000da4: 004f0f13 addi x30,x30,4 + +80000da8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b16: + sm3p0 x16, x16 # perform operation +80000da8: 10881813 sm3p0 x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zksh_sm3p0_cg_cmp_rd_rs1_b16, Zksh_sm3p0_cg_cmp_rd_rs1_b16_str) +80000dac: 00092203 lw x4,0(x18) +80000db0: 01020863 beq x4,x16,80000dc0 +80000db4: 2cc012ef jal x5,80002080 +80000db8: 80000da8 .word 0x80000da8 +80000dbc: 80005890 .word 0x80005890 +80000dc0: 00490913 addi x18,x18,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x207d1c00 +80000dc4: 000f2883 lw x17,0(x30) +80000dc8: 004f0f13 addi x30,x30,4 + +80000dcc : +Zksh_sm3p0_cg_cmp_rd_rs1_b17: + sm3p0 x17, x17 # perform operation +80000dcc: 10889893 sm3p0 x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zksh_sm3p0_cg_cmp_rd_rs1_b17, Zksh_sm3p0_cg_cmp_rd_rs1_b17_str) +80000dd0: 00092203 lw x4,0(x18) +80000dd4: 01120863 beq x4,x17,80000de4 +80000dd8: 2a8012ef jal x5,80002080 +80000ddc: 80000dcc .word 0x80000dcc +80000de0: 800058c8 .word 0x800058c8 +80000de4: 00490913 addi x18,x18,4 + + mv x15, x18 # switch signature pointer register to avoid conflict with test +80000de8: 00090793 addi x15,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x0d086ae3 +80000dec: 000f2903 lw x18,0(x30) +80000df0: 004f0f13 addi x30,x30,4 + +80000df4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b18: + sm3p0 x18, x18 # perform operation +80000df4: 10891913 sm3p0 x18,x18 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksh_sm3p0_cg_cmp_rd_rs1_b18, Zksh_sm3p0_cg_cmp_rd_rs1_b18_str) +80000df8: 0007a203 lw x4,0(x15) +80000dfc: 01220863 beq x4,x18,80000e0c +80000e00: 280012ef jal x5,80002080 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80005900 .word 0x80005900 +80000e0c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xf68f8de4 +80000e10: 000f2983 lw x19,0(x30) +80000e14: 004f0f13 addi x30,x30,4 + +80000e18 : +Zksh_sm3p0_cg_cmp_rd_rs1_b19: + sm3p0 x19, x19 # perform operation +80000e18: 10899993 sm3p0 x19,x19 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksh_sm3p0_cg_cmp_rd_rs1_b19, Zksh_sm3p0_cg_cmp_rd_rs1_b19_str) +80000e1c: 0007a203 lw x4,0(x15) +80000e20: 01320863 beq x4,x19,80000e30 +80000e24: 25c012ef jal x5,80002080 +80000e28: 80000e18 .word 0x80000e18 +80000e2c: 80005938 .word 0x80005938 +80000e30: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x1d628418 +80000e34: 000f2a03 lw x20,0(x30) +80000e38: 004f0f13 addi x30,x30,4 + +80000e3c : +Zksh_sm3p0_cg_cmp_rd_rs1_b20: + sm3p0 x20, x20 # perform operation +80000e3c: 108a1a13 sm3p0 x20,x20 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksh_sm3p0_cg_cmp_rd_rs1_b20, Zksh_sm3p0_cg_cmp_rd_rs1_b20_str) +80000e40: 0007a203 lw x4,0(x15) +80000e44: 01420863 beq x4,x20,80000e54 +80000e48: 238012ef jal x5,80002080 +80000e4c: 80000e3c .word 0x80000e3c +80000e50: 80005970 .word 0x80005970 +80000e54: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x70f20fba +80000e58: 000f2a83 lw x21,0(x30) +80000e5c: 004f0f13 addi x30,x30,4 + +80000e60 : +Zksh_sm3p0_cg_cmp_rd_rs1_b21: + sm3p0 x21, x21 # perform operation +80000e60: 108a9a93 sm3p0 x21,x21 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksh_sm3p0_cg_cmp_rd_rs1_b21, Zksh_sm3p0_cg_cmp_rd_rs1_b21_str) +80000e64: 0007a203 lw x4,0(x15) +80000e68: 01520863 beq x4,x21,80000e78 +80000e6c: 214012ef jal x5,80002080 +80000e70: 80000e60 .word 0x80000e60 +80000e74: 800059a8 .word 0x800059a8 +80000e78: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x8e39b884 +80000e7c: 000f2b03 lw x22,0(x30) +80000e80: 004f0f13 addi x30,x30,4 + +80000e84 : +Zksh_sm3p0_cg_cmp_rd_rs1_b22: + sm3p0 x22, x22 # perform operation +80000e84: 108b1b13 sm3p0 x22,x22 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksh_sm3p0_cg_cmp_rd_rs1_b22, Zksh_sm3p0_cg_cmp_rd_rs1_b22_str) +80000e88: 0007a203 lw x4,0(x15) +80000e8c: 01620863 beq x4,x22,80000e9c +80000e90: 1f0012ef jal x5,80002080 +80000e94: 80000e84 .word 0x80000e84 +80000e98: 800059e0 .word 0x800059e0 +80000e9c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xe8aef531 +80000ea0: 000f2b83 lw x23,0(x30) +80000ea4: 004f0f13 addi x30,x30,4 + +80000ea8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b23: + sm3p0 x23, x23 # perform operation +80000ea8: 108b9b93 sm3p0 x23,x23 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksh_sm3p0_cg_cmp_rd_rs1_b23, Zksh_sm3p0_cg_cmp_rd_rs1_b23_str) +80000eac: 0007a203 lw x4,0(x15) +80000eb0: 01720863 beq x4,x23,80000ec0 +80000eb4: 1cc012ef jal x5,80002080 +80000eb8: 80000ea8 .word 0x80000ea8 +80000ebc: 80005a18 .word 0x80005a18 +80000ec0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x7de80095 +80000ec4: 000f2c03 lw x24,0(x30) +80000ec8: 004f0f13 addi x30,x30,4 + +80000ecc : +Zksh_sm3p0_cg_cmp_rd_rs1_b24: + sm3p0 x24, x24 # perform operation +80000ecc: 108c1c13 sm3p0 x24,x24 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksh_sm3p0_cg_cmp_rd_rs1_b24, Zksh_sm3p0_cg_cmp_rd_rs1_b24_str) +80000ed0: 0007a203 lw x4,0(x15) +80000ed4: 01820863 beq x4,x24,80000ee4 +80000ed8: 1a8012ef jal x5,80002080 +80000edc: 80000ecc .word 0x80000ecc +80000ee0: 80005a51 .word 0x80005a51 +80000ee4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x9bc88a15 +80000ee8: 000f2c83 lw x25,0(x30) +80000eec: 004f0f13 addi x30,x30,4 + +80000ef0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b25: + sm3p0 x25, x25 # perform operation +80000ef0: 108c9c93 sm3p0 x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksh_sm3p0_cg_cmp_rd_rs1_b25, Zksh_sm3p0_cg_cmp_rd_rs1_b25_str) +80000ef4: 0007a203 lw x4,0(x15) +80000ef8: 01920863 beq x4,x25,80000f08 +80000efc: 184012ef jal x5,80002080 +80000f00: 80000ef0 .word 0x80000ef0 +80000f04: 80005a8a .word 0x80005a8a +80000f08: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xdaba689a +80000f0c: 000f2d03 lw x26,0(x30) +80000f10: 004f0f13 addi x30,x30,4 + +80000f14 : +Zksh_sm3p0_cg_cmp_rd_rs1_b26: + sm3p0 x26, x26 # perform operation +80000f14: 108d1d13 sm3p0 x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksh_sm3p0_cg_cmp_rd_rs1_b26, Zksh_sm3p0_cg_cmp_rd_rs1_b26_str) +80000f18: 0007a203 lw x4,0(x15) +80000f1c: 01a20863 beq x4,x26,80000f2c +80000f20: 160012ef jal x5,80002080 +80000f24: 80000f14 .word 0x80000f14 +80000f28: 80005ac3 .word 0x80005ac3 +80000f2c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x2b60d245 +80000f30: 000f2d83 lw x27,0(x30) +80000f34: 004f0f13 addi x30,x30,4 + +80000f38 : +Zksh_sm3p0_cg_cmp_rd_rs1_b27: + sm3p0 x27, x27 # perform operation +80000f38: 108d9d93 sm3p0 x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksh_sm3p0_cg_cmp_rd_rs1_b27, Zksh_sm3p0_cg_cmp_rd_rs1_b27_str) +80000f3c: 0007a203 lw x4,0(x15) +80000f40: 01b20863 beq x4,x27,80000f50 +80000f44: 13c012ef jal x5,80002080 +80000f48: 80000f38 .word 0x80000f38 +80000f4c: 80005afc .word 0x80005afc +80000f50: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x7cda2d63 +80000f54: 000f2e03 lw x28,0(x30) +80000f58: 004f0f13 addi x30,x30,4 + +80000f5c : +Zksh_sm3p0_cg_cmp_rd_rs1_b28: + sm3p0 x28, x28 # perform operation +80000f5c: 108e1e13 sm3p0 x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksh_sm3p0_cg_cmp_rd_rs1_b28, Zksh_sm3p0_cg_cmp_rd_rs1_b28_str) +80000f60: 0007a203 lw x4,0(x15) +80000f64: 01c20863 beq x4,x28,80000f74 +80000f68: 118012ef jal x5,80002080 +80000f6c: 80000f5c .word 0x80000f5c +80000f70: 80005b35 .word 0x80005b35 +80000f74: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x112abf64 +80000f78: 000f2e83 lw x29,0(x30) +80000f7c: 004f0f13 addi x30,x30,4 + +80000f80 : +Zksh_sm3p0_cg_cmp_rd_rs1_b29: + sm3p0 x29, x29 # perform operation +80000f80: 108e9e93 sm3p0 x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksh_sm3p0_cg_cmp_rd_rs1_b29, Zksh_sm3p0_cg_cmp_rd_rs1_b29_str) +80000f84: 0007a203 lw x4,0(x15) +80000f88: 01d20863 beq x4,x29,80000f98 +80000f8c: 0f4012ef jal x5,80002080 +80000f90: 80000f80 .word 0x80000f80 +80000f94: 80005b6e .word 0x80005b6e +80000f98: 00478793 addi x15,x15,4 + + mv x29, x30 # switch data pointer register to avoid conflict with test +80000f9c: 000f0e93 addi x29,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs1: x30 = 0x4eba264e +80000fa0: 000eaf03 lw x30,0(x29) +80000fa4: 004e8e93 addi x29,x29,4 + +80000fa8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b30: + sm3p0 x30, x30 # perform operation +80000fa8: 108f1f13 sm3p0 x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksh_sm3p0_cg_cmp_rd_rs1_b30, Zksh_sm3p0_cg_cmp_rd_rs1_b30_str) +80000fac: 0007a203 lw x4,0(x15) +80000fb0: 01e20863 beq x4,x30,80000fc0 +80000fb4: 0cc012ef jal x5,80002080 +80000fb8: 80000fa8 .word 0x80000fa8 +80000fbc: 80005ba7 .word 0x80005ba7 +80000fc0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs1: x31 = 0x1a040254 +80000fc4: 000eaf83 lw x31,0(x29) +80000fc8: 004e8e93 addi x29,x29,4 + +80000fcc : +Zksh_sm3p0_cg_cmp_rd_rs1_b31: + sm3p0 x31, x31 # perform operation +80000fcc: 108f9f93 sm3p0 x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksh_sm3p0_cg_cmp_rd_rs1_b31, Zksh_sm3p0_cg_cmp_rd_rs1_b31_str) +80000fd0: 0007a203 lw x4,0(x15) +80000fd4: 01f20863 beq x4,x31,80000fe4 +80000fd8: 0a8012ef jal x5,80002080 +80000fdc: 80000fcc .word 0x80000fcc +80000fe0: 80005be0 .word 0x80005be0 +80000fe4: 00478793 addi x15,x15,4 + + mv x2, x15 # restore signature pointer to default register for teardown +80000fe8: 00078113 addi x2,x15,0 + +80000fec : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fec: 00000513 addi x10,x0,0 +80000ff0: 00000073 ecall +80000ff4: fff00513 addi x10,x0,-1 +80000ff8: 1d800413 addi x8,x0,472 + +80000ffc : +80000ffc: 34002373 csrrs x6,mscratch,x0 + +80001000 : +80001000: 23832383 lw x7,568(x6) +80001004: 23c32483 lw x9,572(x6) + +80001008 : +80001008: 22032383 lw x7,544(x6) + +8000100c : +8000100c: 25032483 lw x9,592(x6) +80001010: 34049073 csrrw x0,mscratch,x9 + +80001014 : +80001014: 24832483 lw x9,584(x6) +80001018: 305493f3 csrrw x7,mtvec,x9 +8000101c: ffc4f493 andi x9,x9,-4 +80001020: ffc3f393 andi x7,x7,-4 +80001024: 00749e63 bne x9,x7,80001040 + +80001028 : +80001028: 00030493 addi x9,x6,0 + +8000102c : +8000102c: 0004a783 lw x15,0(x9) +80001030: 00f3a023 sw x15,0(x7) +80001034: 00438393 addi x7,x7,4 +80001038: 00448493 addi x9,x9,4 +8000103c: fe83c8e3 blt x7,x8,8000102c +80001040: 0000100f fence.i + +80001044 : +80001044: 00000013 addi x0,x0,0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 00000497 auipc x9,0x0 +80001064: 29048493 addi x9,x9,656 # 800012f0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 10e49863 bne x9,x14,80001190 +80001084: 00000013 addi x0,x0,0 +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00005517 auipc x10,0x5 +800010a4: 1ff50513 addi x10,x10,511 # 8000629f +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00016097 auipc x1,0x16 +800010c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00005517 auipc x10,0x5 +800010e4: 1f950513 addi x10,x10,505 # 800062d9 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00016097 auipc x1,0x16 +80001104: 464080e7 jalr x1,1124(x1) # 80017564 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00005517 auipc x10,0x5 +80001124: 21950513 addi x10,x10,537 # 80006339 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00016097 auipc x1,0x16 +80001144: 424080e7 jalr x1,1060(x1) # 80017564 +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00006517 auipc x10,0x6 +80001164: d8450513 addi x10,x10,-636 # 80006ee4 +80001168: 00000013 addi x0,x0,0 +8000116c: 00000013 addi x0,x0,0 +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00016097 auipc x1,0x16 +80001184: 3e4080e7 jalr x1,996(x1) # 80017564 +80001188: 00016097 auipc x1,0x16 +8000118c: 43c080e7 jalr x1,1084(x1) # 800175c4 + +80001190 : +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00003317 auipc x6,0x3 +800011a4: 18830313 addi x6,x6,392 # 80004328 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00032303 lw x6,0(x6) +800011c4: 00000013 addi x0,x0,0 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 00007397 auipc x7,0x7 +800011e4: 96838393 addi x7,x7,-1688 # 80007b48 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 40730333 sub x6,x6,x7 +80001204: 00000013 addi x0,x0,0 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00007417 auipc x8,0x7 +80001224: 92040413 addi x8,x8,-1760 # 80007b40 +80001228: 00000013 addi x0,x0,0 +8000122c: 00000013 addi x0,x0,0 +80001230: 00000013 addi x0,x0,0 +80001234: 00000013 addi x0,x0,0 +80001238: 00000013 addi x0,x0,0 +8000123c: 00000013 addi x0,x0,0 +80001240: 00042203 lw x4,0(x8) +80001244: 00620863 beq x4,x6,80001254 +80001248: 6a1003ef jal x7,800020e8 +8000124c: 80001190 .word 0x80001190 +80001250: 8000648d .word 0x8000648d + +80001254 : +80001254: bad0e4b7 lui x9,0xbad0e +80001258: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000125c: 00e49a63 bne x9,x14,80001270 +80001260: 689003ef jal x7,800020e8 +80001264: 80001324 .word 0x80001324 +80001268: 800062fb .word 0x800062fb +8000126c: 00000341 .word 0x00000341 + +80001270 : +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00005517 auipc x10,0x5 +80001284: fe450513 addi x10,x10,-28 # 80006264 +80001288: 00000013 addi x0,x0,0 +8000128c: 00000013 addi x0,x0,0 +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00016097 auipc x1,0x16 +800012a4: 2c4080e7 jalr x1,708(x1) # 80017564 +800012a8: 00016097 auipc x1,0x16 +800012ac: 2fc080e7 jalr x1,764(x1) # 800175a4 + +800012b0 : +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00005517 auipc x10,0x5 +800012c4: fdf50513 addi x10,x10,-33 # 8000629f +800012c8: 00000013 addi x0,x0,0 +800012cc: 00000013 addi x0,x0,0 +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00016097 auipc x1,0x16 +800012e4: 284080e7 jalr x1,644(x1) # 80017564 +800012e8: 00016097 auipc x1,0x16 +800012ec: 2dc080e7 jalr x1,732(x1) # 800175c4 + +800012f0 : +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: 00000717 auipc x14,0x0 +80001304: ff070713 addi x14,x14,-16 # 800012f0 +80001308: 00000013 addi x0,x0,0 +8000130c: 00000013 addi x0,x0,0 +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: ccdff06f jal x0,80000fec + +80001324 : +80001324: bad0e737 lui x14,0xbad0e +80001328: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000132c: cc1ff06f jal x0,80000fec +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b6430313 addi x6,x6,-1180 # 80001044 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 25b50513 addi x10,x10,603 # 8000791b +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00004517 auipc x10,0x4 +80001704: 68850513 addi x10,x10,1672 # 80005d88 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: c6250513 addi x10,x10,-926 # 800063a2 +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: b1f50513 addi x10,x10,-1249 # 8000629f +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 20848493 addi x9,x9,520 # 80005d68 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: a0c40413 addi x8,x8,-1524 # 800165ac +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f2946663 bltu x8,x9,800012f0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800064a4 .word 0x800064a4 +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800065a6 .word 0x800065a6 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e2f47e63 bgeu x8,x15,80001324 +80001cec: e2746c63 bltu x8,x7,80001324 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800066a1 .word 0x800066a1 +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 80006794 .word 0x80006794 +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006907 .word 0x80006907 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: d1cff06f jal x0,80001324 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: ba020213 addi x4,x4,-1120 # 80005c20 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: b8838393 addi x7,x7,-1144 # 80005c20 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: b6068693 addi x13,x13,-1184 # 80005c20 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: b3848493 addi x9,x9,-1224 # 80005c20 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: a944a483 lw x9,-1388(x9) # 80005c20 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00005417 auipc x8,0x5 +80002244: 72040413 addi x8,x8,1824 # 80007960 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 33040413 addi x8,x8,816 # 800165b0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: a8848493 addi x9,x9,-1400 # 80005d48 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: a4848493 addi x9,x9,-1464 # 80005d48 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: a2880813 addi x16,x16,-1496 # 80005d58 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: a1480813 addi x16,x16,-1516 # 80005d58 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 13d38393 addi x7,x7,317 # 8000648d +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: 9f080813 addi x16,x16,-1552 # 80005d50 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 13838393 addi x7,x7,312 # 800064a4 +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 22238393 addi x7,x7,546 # 800065a6 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 30538393 addi x7,x7,773 # 800066a1 +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 3e038393 addi x7,x7,992 # 80006794 +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 53b38393 addi x7,x7,1339 # 80006907 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 4a738393 addi x7,x7,1191 # 8000688b +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 4cd38393 addi x7,x7,1229 # 800068c9 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 0d038393 addi x7,x7,208 # 800064e4 +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 1b838393 addi x7,x7,440 # 800065e4 +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 29938393 addi x7,x7,665 # 800066dd +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 37538393 addi x7,x7,885 # 800067d1 +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 4ce38393 addi x7,x7,1230 # 80006942 +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 09838393 addi x7,x7,152 # 80006524 +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 17e38393 addi x7,x7,382 # 80006622 +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 25d38393 addi x7,x7,605 # 80006719 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 33a38393 addi x7,x7,826 # 8000680e +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 49138393 addi x7,x7,1169 # 8000697d +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 06138393 addi x7,x7,97 # 80006565 +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 14538393 addi x7,x7,325 # 80006661 +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 22238393 addi x7,x7,546 # 80006756 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 30038393 addi x7,x7,768 # 8000684c +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 45538393 addi x7,x7,1109 # 800069b9 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 47a38393 addi x7,x7,1146 # 800069f6 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 4b138393 addi x7,x7,1201 # 80006a45 +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 59438393 addi x7,x7,1428 # 80006b40 +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00004397 auipc x7,0x4 +800025c8: 67838393 addi x7,x7,1656 # 80006c3c +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00003817 auipc x16,0x3 +800025e8: 76c80813 addi x16,x16,1900 # 80005d50 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00003817 auipc x16,0x3 +800025f8: 75c80813 addi x16,x16,1884 # 80005d50 +800025fc: 00882023 sw x8,0(x16) +80002600: 00003817 auipc x16,0x3 +80002604: 75480813 addi x16,x16,1876 # 80005d54 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00003817 auipc x16,0x3 +80002614: 74080813 addi x16,x16,1856 # 80005d50 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: c3f50513 addi x10,x10,-961 # 8000629f +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: c3950513 addi x10,x10,-967 # 800062d9 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: cb050513 addi x10,x10,-848 # 80006390 +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00003517 auipc x10,0x3 +8000270c: 63852503 lw x10,1592(x10) # 80005d40 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: c8250513 addi x10,x10,-894 # 800063a2 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 4d852503 lw x10,1240(x10) # 80005c20 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: c4450513 addi x10,x10,-956 # 800063a4 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 59852503 lw x10,1432(x10) # 80005d20 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 5c850513 addi x10,x10,1480 # 80005d88 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: bb850513 addi x10,x10,-1096 # 800063b8 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 50052503 lw x10,1280(x10) # 80005d28 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 54850513 addi x10,x10,1352 # 80005d88 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 56f50513 addi x10,x10,1391 # 80006def +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 37852503 lw x10,888(x10) # 80005c20 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 4c860613 addi x12,x12,1224 # 80005d88 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 43c52503 lw x10,1084(x10) # 80005d24 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00004517 auipc x10,0x4 +80002924: 5e550513 addi x10,x10,1509 # 80006f05 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 42860613 addi x12,x12,1064 # 80005d88 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 39c52503 lw x10,924(x10) # 80005d24 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 3e860613 addi x12,x12,1000 # 80005d88 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 35c52503 lw x10,860(x10) # 80005d24 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 40850513 addi x10,x10,1032 # 80006de8 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 36850513 addi x10,x10,872 # 80005d88 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 3a050513 addi x10,x10,928 # 80006e00 +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 19852503 lw x10,408(x10) # 80005c20 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 29852503 lw x10,664(x10) # 80005d30 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 28452503 lw x10,644(x10) # 80005d30 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 2c850513 addi x10,x10,712 # 80005d88 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 26052503 lw x10,608(x10) # 80005d48 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 31750513 addi x10,x10,791 # 80006e17 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 0f852503 lw x10,248(x10) # 80005c20 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 20052503 lw x10,512(x10) # 80005d38 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 1ec52503 lw x10,492(x10) # 80005d38 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 22850513 addi x10,x10,552 # 80005d88 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 28e50513 addi x10,x10,654 # 80006e2e +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 17052503 lw x10,368(x10) # 80005d38 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 1a850513 addi x10,x10,424 # 80005d88 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 26c50513 addi x10,x10,620 # 80006e8c +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 0f052503 lw x10,240(x10) # 80005d38 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 12850513 addi x10,x10,296 # 80005d88 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 0c442403 lw x8,196(x8) # 80005d50 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 29150513 addi x10,x10,657 # 80006f31 +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 27d50513 addi x10,x10,637 # 80006f5d +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 05080813 addi x16,x16,80 # 80005d58 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00003517 auipc x10,0x3 +80002d24: 68250513 addi x10,x10,1666 # 800063a2 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 20d50513 addi x10,x10,525 # 80006f6d +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: fb052503 lw x10,-80(x10) # 80005d38 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: fe850513 addi x10,x10,-24 # 80005d88 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 1b850513 addi x10,x10,440 # 80006f98 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: f2852503 lw x10,-216(x10) # 80005d30 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: f6850513 addi x10,x10,-152 # 80005d88 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: ee832303 lw x6,-280(x6) # 80005d30 +80002e50: 00003397 auipc x7,0x3 +80002e54: ee83a383 lw x7,-280(x7) # 80005d38 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 16750513 addi x10,x10,359 # 80006fc7 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 18f50513 addi x10,x10,399 # 8000702f +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: e6832303 lw x6,-408(x6) # 80005d30 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: e683a383 lw x7,-408(x7) # 80005d38 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: e8850513 addi x10,x10,-376 # 80005d88 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 11650513 addi x10,x10,278 # 80007056 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 07350513 addi x10,x10,115 # 80006ff3 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 06f50513 addi x10,x10,111 # 8000702f +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: d5032303 lw x6,-688(x6) # 80005d38 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: d403a383 lw x7,-704(x7) # 80005d30 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: d6850513 addi x10,x10,-664 # 80005d88 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 0de50513 addi x10,x10,222 # 8000713e +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 18550513 addi x10,x10,389 # 80007225 +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: c8c52503 lw x10,-884(x10) # 80005d54 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 16150513 addi x10,x10,353 # 80007261 +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 0ff50513 addi x10,x10,255 # 8000723f +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 0c750513 addi x10,x10,199 # 80007247 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 08f50513 addi x10,x10,143 # 8000724f +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 05850513 addi x10,x10,88 # 80007258 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 02a50513 addi x10,x10,42 # 8000726a +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: ae852503 lw x10,-1304(x10) # 80005d50 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 10150513 addi x10,x10,257 # 800073c1 +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: f8450513 addi x10,x10,-124 # 80007284 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: f7550513 addi x10,x10,-139 # 800072b5 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: f5550513 addi x10,x10,-171 # 800072d5 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: f3350513 addi x10,x10,-205 # 800072f3 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: f1250513 addi x10,x10,-238 # 80007312 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: efa50513 addi x10,x10,-262 # 8000733a +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: ee650513 addi x10,x10,-282 # 80007366 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: ed250513 addi x10,x10,-302 # 80007392 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: ed050513 addi x10,x10,-304 # 800073d0 +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: 81052503 lw x10,-2032(x10) # 80005d38 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: 84850513 addi x10,x10,-1976 # 80005d88 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: e6750513 addi x10,x10,-409 # 800073e7 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 78852503 lw x10,1928(x10) # 80005d30 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00002517 auipc x10,0x2 +800035c4: 7c850513 addi x10,x10,1992 # 80005d88 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 76852503 lw x10,1896(x10) # 80005d50 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: dfe50513 addi x10,x10,-514 # 800073fe +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 71052503 lw x10,1808(x10) # 80005d38 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: dd550513 addi x10,x10,-555 # 80007415 +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00002517 auipc x10,0x2 +8000366c: 6c852503 lw x10,1736(x10) # 80005d30 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00002517 auipc x10,0x2 +80003688: 6cc52503 lw x10,1740(x10) # 80005d50 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: deb50513 addi x10,x10,-533 # 8000748b +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: e8150513 addi x10,x10,-383 # 80007561 +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: f3450513 addi x10,x10,-204 # 80007654 +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: fef50513 addi x10,x10,-17 # 8000774f +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 09650513 addi x10,x10,150 # 80007836 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: c6350513 addi x10,x10,-925 # 80007443 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 56062603 lw x12,1376(x12) # 80005d68 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: c0c50513 addi x10,x10,-1012 # 8000642c +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 50850513 addi x10,x10,1288 # 80005d88 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 4f058593 addi x11,x11,1264 # 80005db0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 52458593 addi x11,x11,1316 # 80005e10 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 92e50513 addi x10,x10,-1746 # 8000624e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 58450513 addi x10,x10,1412 # 80006ee4 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 3d060613 addi x12,x12,976 # 80005d60 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: aad50513 addi x10,x10,-1363 # 8000644d +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 3a052503 lw x10,928(x10) # 80005d68 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 3a850513 addi x10,x10,936 # 80005d88 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: a3d50513 addi x10,x10,-1475 # 8000645d +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 32852503 lw x10,808(x10) # 80005d70 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 32850513 addi x10,x10,808 # 80005d88 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: 9cd50513 addi x10,x10,-1587 # 8000646d +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 2b052503 lw x10,688(x10) # 80005d78 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 2a850513 addi x10,x10,680 # 80005d88 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: 95d50513 addi x10,x10,-1699 # 8000647d +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 23852503 lw x10,568(x10) # 80005d80 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 22850513 addi x10,x10,552 # 80005d88 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 1d860613 addi x12,x12,472 # 80005d60 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 1e860613 addi x12,x12,488 # 80005d88 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f5030313 addi x6,x6,-176 # 80000fec +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f3830313 addi x6,x6,-200 # 80000fec +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f2030313 addi x6,x6,-224 # 80000fec +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: dbc78793 addi x15,x15,-580 # 80000ffc +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 4c010113 addi x2,x2,1216 # 80007960 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006f0d .word 0x80006f0d +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 05828293 addi x5,x5,88 # 80016600 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 03828293 addi x5,x5,56 # 80016600 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv32-Zksh-sm3p1-00.elf.objdump b/riscv-tests/rv32-Zksh-sm3p1-00.elf.objdump new file mode 100644 index 0000000..99a345d --- /dev/null +++ b/riscv-tests/rv32-Zksh-sm3p1-00.elf.objdump @@ -0,0 +1,6268 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksh/Zksh-sm3p1-00.elf: file format elf32-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv32-k-min/elfs/rv32i/Zksh/Zksh-sm3p1-00.elf +architecture: riscv:rv32, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x80000000 + +Program Header: +0x70000003 off 0x00018640 vaddr 0x00000000 paddr 0x00000000 align 2**0 + filesz 0x0000003b memsz 0x00000000 flags r-- + LOAD off 0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12 + filesz 0x00003c80 memsz 0x00003c80 flags r-x + LOAD off 0x00005000 vaddr 0x80004000 paddr 0x80004000 align 2**12 + filesz 0x00013640 memsz 0x00013640 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 80000000 80000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00003c40 80000040 80000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000125b0 80004000 80004000 00005000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 80016600 80016600 00017600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000640 80017000 80017000 00018000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 00000000 00000000 00018640 2**0 + CONTENTS, READONLY + 6 .debug_line 0000087c 00000000 00000000 0001867b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 00000000 00000000 00018ef7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 00000000 00000000 00018f72 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 00000000 00000000 00018f95 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000028 00000000 00000000 00018fa8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 00000000 00000000 00018fd0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 0000001a 00000000 00000000 00019059 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +80000000 l d .text.init 00000000 .text.init +80000040 l d .text.rvtest 00000000 .text.rvtest +80004000 l d .data 00000000 .data +80016600 l d .tohost 00000000 .tohost +80017000 l d .text.rvmodel 00000000 .text.rvmodel +00000000 l d .riscv.attributes 00000000 .riscv.attributes +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_line_str 00000000 .debug_line_str +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_rnglists 00000000 .debug_rnglists +00000000 l df *ABS* 00000000 ccEXYwvf.o +10000000 l *ABS* 00000000 UART_BASE_ADDR +10000000 l *ABS* 00000000 UART_PUTC +00000003 l *ABS* 00000000 MMODE_SIG +00000001 l *ABS* 00000000 SMODE_SIG +00000001 l *ABS* 00000000 HMODE_SIG +00000002 l *ABS* 00000000 VMODE_SIG +800170e4 l .text.rvmodel 00000000 rvmodel_boot +80000048 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b0 +80002080 l .text.rvtest 00000000 failedtest_x5_x4 +80004560 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b0_str +8000006c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b1 +80004592 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b1_str +80000094 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b2 +800045c4 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b2_str +800000bc l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b3 +800045f6 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b3_str +800000e8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b4 +800020c0 l .text.rvtest 00000000 failedtest_x14_x13 +80004628 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b4_str +8000010c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b5 +8000465a l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b5_str +80000130 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b6 +8000468c l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b6_str +80000154 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b7 +800046be l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b7_str +80000178 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b8 +800046f0 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b8_str +8000019c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b9 +80004722 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b9_str +800001c0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b10 +80004755 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b10_str +800001e4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b11 +80004789 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b11_str +80000208 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b12 +800047bd l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b12_str +80000234 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b13 +80002098 l .text.rvtest 00000000 failedtest_x8_x7 +800047f1 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b13_str +80000258 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b14 +80004825 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b14_str +8000027c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b15 +80004859 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b15_str +800002a0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b16 +8000488d l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b16_str +800002c4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b17 +800048c1 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b17_str +800002e8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b18 +800048f5 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b18_str +80000310 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b19 +80004929 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b19_str +80000334 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b20 +8000495d l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b20_str +80000358 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b21 +80004991 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b21_str +8000037c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b22 +800049c5 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b22_str +800003a0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b23 +800049f9 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b23_str +800003c4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b24 +80004a2d l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b24_str +800003e8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b25 +80004a61 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b25_str +8000040c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b26 +80004a95 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b26_str +80000430 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b27 +80004ac9 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b27_str +80000454 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b28 +80004afd l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b28_str +80000478 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b29 +80004b31 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b29_str +8000049c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b30 +80004b65 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b30_str +800004c0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_b31 +80004b99 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_b31_str +800004e4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b0 +80004bcd l .data 00000000 Zksh_sm3p1_cg_cp_rd_b0_str +8000050c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b1 +80004bff l .data 00000000 Zksh_sm3p1_cg_cp_rd_b1_str +80000530 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b2 +80004c31 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b2_str +80000558 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b3 +80004c63 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b3_str +8000057c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b4 +80004c95 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b4_str +800005a0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b5 +80004cc7 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b5_str +800005c4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b6 +80004cf9 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b6_str +800005f0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b7 +80004d2b l .data 00000000 Zksh_sm3p1_cg_cp_rd_b7_str +80000614 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b8 +80004d5d l .data 00000000 Zksh_sm3p1_cg_cp_rd_b8_str +80000638 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b9 +80004d8f l .data 00000000 Zksh_sm3p1_cg_cp_rd_b9_str +8000065c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b10 +80004dc1 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b10_str +80000680 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b11 +80004df4 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b11_str +800006a4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b12 +80004e27 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b12_str +800006c8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b13 +80004e5a l .data 00000000 Zksh_sm3p1_cg_cp_rd_b13_str +800006ec l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b14 +80004e8d l .data 00000000 Zksh_sm3p1_cg_cp_rd_b14_str +80000710 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b15 +80004ec0 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b15_str +80000734 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b16 +80004ef3 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b16_str +80000758 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b17 +80004f26 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b17_str +8000077c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b18 +80004f59 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b18_str +800007a4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b19 +80004f8c l .data 00000000 Zksh_sm3p1_cg_cp_rd_b19_str +800007c8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b20 +80004fbf l .data 00000000 Zksh_sm3p1_cg_cp_rd_b20_str +800007ec l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b21 +80004ff2 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b21_str +80000814 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b22 +80005025 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b22_str +80000838 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b23 +80005058 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b23_str +8000085c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b24 +8000508b l .data 00000000 Zksh_sm3p1_cg_cp_rd_b24_str +80000880 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b25 +800050be l .data 00000000 Zksh_sm3p1_cg_cp_rd_b25_str +800008a4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b26 +800050f1 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b26_str +800008cc l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b27 +80005124 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b27_str +800008f0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b28 +80005157 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b28_str +80000914 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b29 +8000518a l .data 00000000 Zksh_sm3p1_cg_cp_rd_b29_str +80000938 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b30 +800051bd l .data 00000000 Zksh_sm3p1_cg_cp_rd_b30_str +8000095c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rd_b31 +800051f0 l .data 00000000 Zksh_sm3p1_cg_cp_rd_b31_str +80000980 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x0 +80005223 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x0_str +800009a4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x1 +8000525d l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x1_str +800009c8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x2 +80005297 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x2_str +800009ec l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x80000000 +800052d1 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x80000000_str +80000a10 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x80000001 +80005312 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x80000001_str +80000a34 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffff +80005353 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffff_str +80000a58 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffe +80005394 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffe_str +80000a7c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff +800053d5 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff_str +80000aa0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe +80005416 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe_str +80000ac4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc8872 +80005457 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc8872_str +80000ae8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaa +80005498 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaa_str +80000b0c l .text.rvtest 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x55555555 +800054d9 l .data 00000000 Zksh_sm3p1_cg_cp_rs1_edges_0x55555555_str +80000b30 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b0 +8000551a l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b0_str +80000b58 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b1 +80005551 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b1_str +80000b7c l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b2 +80005588 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b2_str +80000ba0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b3 +800055bf l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b3_str +80000bcc l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b4 +800055f6 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b4_str +80000bf0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b5 +8000562d l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b5_str +80000c14 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b6 +80005664 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b6_str +80000c38 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b7 +8000569b l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b7_str +80000c5c l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b8 +800056d2 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b8_str +80000c80 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b9 +80005709 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b9_str +80000ca4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b10 +80005740 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b10_str +80000cc8 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b11 +80005778 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b11_str +80000cec l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b12 +800057b0 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b12_str +80000d18 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b13 +800057e8 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b13_str +80000d3c l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b14 +80005820 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b14_str +80000d64 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b15 +80005858 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b15_str +80000d88 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b16 +80005890 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b16_str +80000dac l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b17 +800058c8 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b17_str +80000dd0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b18 +80005900 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b18_str +80000df4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b19 +80005938 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b19_str +80000e1c l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b20 +80005970 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b20_str +80000e40 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b21 +800059a8 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b21_str +80000e64 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b22 +800059e0 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b22_str +80000e88 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b23 +80005a18 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b23_str +80000eac l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b24 +80005a51 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b24_str +80000ed0 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b25 +80005a8a l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b25_str +80000ef4 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b26 +80005ac3 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b26_str +80000f18 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b27 +80005afc l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b27_str +80000f3c l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b28 +80005b35 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b28_str +80000f60 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b29 +80005b6e l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b29_str +80000f88 l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b30 +80005ba7 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b30_str +80000fac l .text.rvtest 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b31 +80005be0 l .data 00000000 Zksh_sm3p1_cg_cmp_rd_rs1_b31_str +00000300 l *ABS* 00000000 CSR_XSTATUS +00000304 l *ABS* 00000000 CSR_XIE +00000344 l *ABS* 00000000 CSR_XIP +00000180 l *ABS* 00000000 CSR_XSATP +00000343 l *ABS* 00000000 CSR_XTVAL +00000302 l *ABS* 00000000 CSR_XEDELEG +00000303 l *ABS* 00000000 CSR_XIDELEG +0000030a l *ABS* 00000000 CSR_XENVCFG +00000306 l *ABS* 00000000 CSR_XCOUNTEREN +00000305 l *ABS* 00000000 CSR_XTVEC +00000340 l *ABS* 00000000 CSR_XSCRATCH +00000341 l *ABS* 00000000 CSR_XEPC +00000342 l *ABS* 00000000 CSR_XCAUSE +00000312 l *ABS* 00000000 CSR_XEDELEGH +6f5ca309 l *ABS* 00000000 immx +6f5ca309 l *ABS* 00000000 absimm +00000000 l *ABS* 00000000 cry +00000309 l *ABS* 00000000 imm12 +80000fdc l .text.rvtest 00000000 exit_Mcleanup +80000fe0 l .text.rvtest 00000000 resto_Medeleg +80000fe8 l .text.rvtest 00000000 resto_Msatp +80000fec l .text.rvtest 00000000 resto_Mscratch +80000ff4 l .text.rvtest 00000000 resto_Mxtvec +80001008 l .text.rvtest 00000000 resto_Mtramp +8000100c l .text.rvtest 00000000 resto_Mloop +80001024 l .text.rvtest 00000000 check_trap_sig_overflow +800012d0 l .text.rvtest 00000000 trap_sig_overflow +80001170 l .text.rvtest 00000000 check_trap_sig_offset +8000629f l .data 00000000 failstr +80017564 l .text.rvmodel 00000000 rvmodel_io_write_str +800062d9 l .data 00000000 begin_debugstr +80006339 l .data 00000000 trap_sig_overflowstr +80006ee4 l .data 00000000 endstr +800175c4 l .text.rvmodel 00000000 rvmodel_halt_fail +80004328 l .data 00000000 Mtrap_sig +80007b48 l .data 00000000 trap_sigptr +80007b40 l .data 00000000 final_trap_sig_offset +80001234 l .text.rvtest 00000000 check_abort_test +800020e8 l .text.rvtest 00000000 failedtest_trap_x7_x9 +8000648d l .data 00000000 trap_sig_offset_mismatch +80001250 l .text.rvtest 00000000 exit_cleanup +80001304 l .text.rvtest 00000000 abort_test +800062fb l .data 00000000 abortstr +80006264 l .data 00000000 successstr +800175a4 l .text.rvmodel 00000000 rvmodel_halt_pass +00000120 l *ABS* 00000000 value +800013c0 l .text.rvtest 00000000 trap_Mhandler +800014e0 l .text.rvtest 00000000 rvtest_Mendtest +80001504 l .text.rvtest 00000000 common_Mhandler +80001570 l .text.rvtest 00000000 spcl_M2mmode_test +8000157c l .text.rvtest 00000000 spcl_Mchk4alt +8000158c l .text.rvtest 00000000 spcl_Mchk4ecall +80001584 l .text.rvtest 00000000 spcl_Mparam_chk +80002010 l .text.rvtest 00000000 Mrtn2mmode +80001b14 l .text.rvtest 00000000 Mtrapsig_ptr_upd +80001598 l .text.rvtest 00000000 Mgoto_mchk +8000159c l .text.rvtest 00000000 tsbi_Mdispatch +800015c4 l .text.rvtest 00000000 tsbi_Mgoto_mode +800015b4 l .text.rvtest 00000000 tsbi_Mecall_test +80001630 l .text.rvtest 00000000 tsbi_instr_table_dispatch +80001d80 l .text.rvtest 00000000 resto_Mrtn +800015f0 l .text.rvtest 00000000 tsbi_Mgoto_m +80001600 l .text.rvtest 00000000 tsbi_Mgoto_s +8000161c l .text.rvtest 00000000 tsbi_Mgoto_u +8000162c l .text.rvtest 00000000 tsbi_Mhandle_forwarded +800017b0 l .text.rvtest 00000000 tsbi_instr_table +80001660 l .text.rvtest 00000000 tsbi_instr_table_search_loop +80001674 l .text.rvtest 00000000 found_instr +800016b8 l .text.rvtest 00000000 tsbi_instr_not_found +800016a4 l .text.rvtest 00000000 tsbi_instr_rtn +8000791b l .data 00000000 tsbi_instr_not_found_str +80003b98 l .text.rvtest 00000000 failedtest_hex_to_str +80005d88 l .data 00000000 ascii_buffer +800063a2 l .data 00000000 newlinestr +80001b30 l .text.rvtest 00000000 Mxcpt_sig_sv +80001b1c l .text.rvtest 00000000 Mint_sig_sv +80001b30 l .text.rvtest 00000000 Mtrap_sig_sv +00000298 l *ABS* 00000000 sv_area_off +80005d68 l .data 00000000 saved_xepc +800165ac l .data 00000000 sig_end_canary +80001bc8 l .text.rvtest 00000000 sv_Mvect +800064a4 l .data 00000000 sv_Mvect_str +80001c6c l .text.rvtest 00000000 sv_Mcause +800065a6 l .data 00000000 sv_Mcause_str +80001da0 l .text.rvtest 00000000 common_Mint_handler +80001c94 l .text.rvtest 00000000 common_Mexcpt_handler +80001ca0 l .text.rvtest 00000000 vmem_adj_Mepc +80001cf4 l .text.rvtest 00000000 sv_Mepc +80001cc8 l .text.rvtest 00000000 code_adj_Mepc +80001cf0 l .text.rvtest 00000000 adj_Mepc +80001cdc l .text.rvtest 00000000 data_adj_Mepc +800066a1 l .data 00000000 sv_Mepc_str +80001d14 l .text.rvtest 00000000 skpsv_Mepc +80001d3c l .text.rvtest 00000000 adj_Mepc_rtn +80001d48 l .text.rvtest 00000000 skp_adj_Mepc +80001d4c l .text.rvtest 00000000 sv_Mtval +80006794 l .data 00000000 sv_Mtval_str +80001d6c l .text.rvtest 00000000 skp_Mtval +80001d78 l .text.rvtest 00000000 dispatch_Mspcl_excpt_handler +80001dd8 l .text.rvtest 00000000 spcl_Mhandler +80001db4 l .text.rvtest 00000000 sv_Mip +80006907 l .data 00000000 sv_Mip_str +80001df4 l .text.rvtest 00000000 spcl_Mdispatch_handling +80001e0c l .text.rvtest 00000000 spcl_Mdispatch +80001e10 l .text.rvtest 00000000 clrint_Mtbl +80017000 l .text.rvmodel 00000000 Mclr_Msw_int +80017014 l .text.rvmodel 00000000 Mclr_Mtmr_int +80017030 l .text.rvmodel 00000000 Mclr_Mext_int +80001f10 l .text.rvtest 00000000 excpt_Mhndlr_tbl +00000018 l *ABS* 00000000 causeidx +80017048 l .text.rvmodel 00000000 Mclr_Ssw_int +8001705c l .text.rvmodel 00000000 Mclr_Stmr_int +80017068 l .text.rvmodel 00000000 Mclr_Sext_int +8001709c l .text.rvmodel 00000000 Mclr_Vsw_int +800170b4 l .text.rvmodel 00000000 Mclr_Vtmr_int +800170cc l .text.rvmodel 00000000 Mclr_Vext_int +80002060 l .text.rvtest 00000000 rtn_fm_mmode +8000204c l .text.rvtest 00000000 from_hs_u +8000203c l .text.rvtest 00000000 from_vs +80005c20 l .data 00000000 begin_failure_scratch +8000211c l .text.rvtest 00000000 failedtest_saveregs +8000218c l .text.rvtest 00000000 failedtest_saveresults +80005c20 l .data 00000000 failure_type +8000232c l .text.rvtest 00000000 failedtest_saveresults_trap +8000219c l .text.rvtest 00000000 failedtest_saveresults_int +800022b4 l .text.rvtest 00000000 failedtest_saveresults_bad_instr +800022ec l .text.rvtest 00000000 failedtest_saveresults_bad_ptr +80002620 l .text.rvtest 00000000 failedtest_saveresults_common +80005d48 l .data 00000000 failure_diag_type +80005d58 l .data 00000000 trap_diag_fail_str_ptr +800025e0 l .text.rvtest 00000000 trap_diag_offset_mismatch +80005d50 l .data 00000000 trap_diag_subtype +800025f4 l .text.rvtest 00000000 trap_diag_field_identified +8000688b l .data 00000000 sv_Mtval2_str +800068c9 l .data 00000000 sv_Mtinst_str +800064e4 l .data 00000000 sv_Svect_str +800065e4 l .data 00000000 sv_Scause_str +800066dd l .data 00000000 sv_Sepc_str +800067d1 l .data 00000000 sv_Stval_str +80006942 l .data 00000000 sv_Sip_str +80006524 l .data 00000000 sv_Hvect_str +80006622 l .data 00000000 sv_Hcause_str +80006719 l .data 00000000 sv_Hepc_str +8000680e l .data 00000000 sv_Htval_str +8000697d l .data 00000000 sv_Hip_str +80006565 l .data 00000000 sv_Vvect_str +80006661 l .data 00000000 sv_Vcause_str +80006756 l .data 00000000 sv_Vepc_str +8000684c l .data 00000000 sv_Vtval_str +800069b9 l .data 00000000 sv_Vip_str +800069f6 l .data 00000000 Mclr_Mext_int_str +80006a45 l .data 00000000 Mclr_Sext_int_str +80006b40 l .data 00000000 Sclr_Sext_int_str +80006c3c l .data 00000000 Hclr_Sext_int_str +80002610 l .text.rvtest 00000000 trap_diag_generic_report +80005d54 l .data 00000000 trap_diag_mode +80002650 l .text.rvtest 00000000 failedtest_report +80002650 l .text.rvtest 00000000 print_failstr +800026c8 l .text.rvtest 00000000 print_testnamestr +80006390 l .data 00000000 testnamestr +80002708 l .text.rvtest 00000000 print_failure_test_name_str +80005d40 l .data 00000000 failure_string_ptr +80002718 l .text.rvtest 00000000 print_newline_str +80002c8c l .text.rvtest 00000000 failedtest_report_trap_detailed +800063a4 l .data 00000000 inststr +80005d20 l .data 00000000 failing_instruction +800063b8 l .data 00000000 addrstr +80005d28 l .data 00000000 failing_addr +80006def l .data 00000000 regstr +800028f8 l .text.rvtest 00000000 failedtest_report_not_intreg +80005d24 l .data 00000000 failing_reg +80003c14 l .text.rvtest 00000000 failedtest_dec_to_str +80002a0c l .text.rvtest 00000000 failedtest_report_print_regstr +8000294c l .text.rvtest 00000000 failedtest_report_fpreg +80002998 l .text.rvtest 00000000 failedtest_report_vecreg +800029d4 l .text.rvtest 00000000 failedtest_report_vxsat +80006f05 l .data 00000000 fflagsstr +80002a48 l .text.rvtest 00000000 failedtest_report_after_reg +80006de8 l .data 00000000 vxsatstr +80006e00 l .data 00000000 badvalstr +80002aac l .text.rvtest 00000000 failedtest_report_badval_not_fp +80005d30 l .data 00000000 failing_value +80002abc l .text.rvtest 00000000 failedtest_report_badval_done +80002b8c l .text.rvtest 00000000 failedtest_report_diag +80006e17 l .data 00000000 expvalstr +80002b4c l .text.rvtest 00000000 failedtest_report_expval_not_fp +80005d38 l .data 00000000 expected_value +80002b5c l .text.rvtest 00000000 failedtest_report_expval_done +80003944 l .text.rvtest 00000000 failedtest_report_end +80002c0c l .text.rvtest 00000000 failedtest_report_bad_pointer_diag +80002b94 l .text.rvtest 00000000 failedtest_report_bad_instr_diag +80006e2e l .data 00000000 failure_diag_bad_instr_str +80006e8c l .data 00000000 failure_diag_bad_ptr_str +80002d50 l .text.rvtest 00000000 trap_report_offset_mismatch +80006f31 l .data 00000000 trap_diag_header_str +80006f5d l .data 00000000 trap_diag_origstr_label +800037d0 l .text.rvtest 00000000 trap_report_generic +8000308c l .text.rvtest 00000000 trap_report_field_mismatch +80006f6d l .data 00000000 trap_diag_expected_offset_str +80006f98 l .data 00000000 trap_diag_actual_offset_str +80002f6c l .text.rvtest 00000000 trap_report_missing_traps +80002e5c l .text.rvtest 00000000 trap_report_extra_traps +80006fc7 l .data 00000000 trap_diag_extra_traps_str +8000702f l .data 00000000 trap_diag_diff_bytes_str +80007056 l .data 00000000 trap_diag_extra_next_step_str +80006ff3 l .data 00000000 trap_diag_missing_traps_str +8000713e l .data 00000000 trap_diag_missing_next_step_str +80007225 l .data 00000000 trap_diag_handler_mode_str +80003124 l .text.rvtest 00000000 trap_mode_m +80003164 l .text.rvtest 00000000 trap_mode_s +800031a4 l .text.rvtest 00000000 trap_mode_h +800031e4 l .text.rvtest 00000000 trap_mode_v +80007261 l .data 00000000 trap_diag_mode_unknown_str +80003220 l .text.rvtest 00000000 trap_mode_print +8000723f l .data 00000000 trap_diag_mode_m_str +80007247 l .data 00000000 trap_diag_mode_s_str +8000724f l .data 00000000 trap_diag_mode_hs_str +80007258 l .data 00000000 trap_diag_mode_vs_str +8000726a l .data 00000000 trap_diag_field_str +800032e4 l .text.rvtest 00000000 trap_field_vect +80003324 l .text.rvtest 00000000 trap_field_cause +80003364 l .text.rvtest 00000000 trap_field_epc +800033a4 l .text.rvtest 00000000 trap_field_tval +800033e4 l .text.rvtest 00000000 trap_field_ip +80003424 l .text.rvtest 00000000 trap_field_tval2 +80003464 l .text.rvtest 00000000 trap_field_tinst +800034a4 l .text.rvtest 00000000 trap_field_intid +800073c1 l .data 00000000 trap_diag_field_unknown_str +800034e0 l .text.rvtest 00000000 trap_field_print +80007284 l .data 00000000 trap_diag_field_vect_str +800072b5 l .data 00000000 trap_diag_field_cause_str +800072d5 l .data 00000000 trap_diag_field_epc_str +800072f3 l .data 00000000 trap_diag_field_tval_str +80007312 l .data 00000000 trap_diag_field_ip_str +8000733a l .data 00000000 trap_diag_field_tval2_str +80007366 l .data 00000000 trap_diag_field_tinst_str +80007392 l .data 00000000 trap_diag_field_intid_str +800073d0 l .data 00000000 trap_diag_expected_str +800073e7 l .data 00000000 trap_diag_actual_str +8000367c l .text.rvtest 00000000 trap_field_not_cause +800073fe l .data 00000000 trap_diag_expected_cause_name_str +800038b4 l .text.rvtest 00000000 trap_cause_to_str +80007415 l .data 00000000 trap_diag_actual_cause_name_str +8000367c l .text.rvtest 00000000 trap_field_not_epc +80003990 l .text.rvtest 00000000 failedtest_print_csr_context +8000748b l .data 00000000 trap_diag_hint_vect_str +80007561 l .data 00000000 trap_diag_hint_cause_str +80007654 l .data 00000000 trap_diag_hint_epc_str +8000774f l .data 00000000 trap_diag_hint_tval_str +80007836 l .data 00000000 trap_diag_hint_ip_str +80007443 l .data 00000000 trap_diag_generic_str +8000642c l .data 00000000 xepcinstrstr +800038d8 l .text.rvtest 00000000 trap_cause_interrupt +800038b8 l .text.rvtest 00000000 trap_cause_exception +80003904 l .text.rvtest 00000000 trap_cause_unknown +80005db0 l .data 00000000 trap_excpt_name_tbl +80005e10 l .data 00000000 trap_int_name_tbl +8000624e l .data 00000000 trap_cause_unknown_str +80003988 l .text.rvtest 00000000 failedtest_terminate +80005d60 l .data 00000000 csr_context_ret_addr +8000644d l .data 00000000 mepcstr +8000645d l .data 00000000 mcausestr +80005d70 l .data 00000000 saved_xcause +8000646d l .data 00000000 mtvalstr +80005d78 l .data 00000000 saved_xtval +8000647d l .data 00000000 mstatusstr +80005d80 l .data 00000000 saved_xstatus +80003bd8 l .text.rvtest 00000000 failedtest_hex_to_str_loop +80003bf4 l .text.rvtest 00000000 failedtest_hex_to_str_digit +80003bf8 l .text.rvtest 00000000 failedtest_hex_to_str_write +800170e4 l .text.rvmodel 00000000 uart_init +800170e4 l .text.rvmodel 00000000 rvtest_boot_to_mmode +80017120 l .text.rvmodel 00000000 init_Mscratch +80017128 l .text.rvmodel 00000000 init_Mtimecmp +8001713c l .text.rvmodel 00000000 init_Medeleg +80017144 l .text.rvmodel 00000000 init_Msatp +80017144 l .text.rvmodel 00000000 init_Mtvec +80017264 l .text.rvmodel 00000000 rvtest_Mprolog_done +80017224 l .text.rvmodel 00000000 abortMtest +8001717c l .text.rvmodel 00000000 init_Mtramp +800171ec l .text.rvmodel 00000000 overwt_tt_Mloop +800171ec l .text.rvmodel 00000000 ovlpok_Mtramp +80017214 l .text.rvmodel 00000000 endcopy_Mtramp +80017268 l .text.rvmodel 00000000 rvtest_boot_to_mmode_csr_init +80017324 l .text.rvmodel 00000000 rvtest_init_regs +80007960 l .data 00000000 signature_base +800174c0 l .text.rvmodel 00000000 canary_check +80006f0d l .data 00000000 canary_mismatch +800175b0 l .text.rvmodel 00000000 write_tohost_pass +800175b8 l .text.rvmodel 00000000 pass +800175d0 l .text.rvmodel 00000000 write_tohost_fail +800175d8 l .text.rvmodel 00000000 fail +800175e4 l .text.rvmodel 00000000 rvtest_set_msw_int +800175f4 l .text.rvmodel 00000000 rvtest_clr_msw_int +80017600 l .text.rvmodel 00000000 rvtest_set_mext_int +80017614 l .text.rvmodel 00000000 rvtest_clr_mext_int +80004000 l .data 00000000 scratch +800042e8 l .data 00000000 Msave_area +800042e8 l .data 00000000 Mcode_bgn_ptr +800042f0 l .data 00000000 Mcode_seg_sz +800042f8 l .data 00000000 Mdata_bgn_ptr +80004300 l .data 00000000 Mdata_seg_sz +80004308 l .data 00000000 Msig_bgn_ptr +80004310 l .data 00000000 Msig_seg_sz +80004318 l .data 00000000 Mvmem_bgn_ptr +80004320 l .data 00000000 Mvmem_seg_sz +80004330 l .data 00000000 Msatp_sv +80004338 l .data 00000000 Msved_misa +80004338 l .data 00000000 Msved_hgatp +80004338 l .data 00000000 Msved_mpp +80004338 l .data 00000000 Munused +80004340 l .data 00000000 Mtentry_sv +80004348 l .data 00000000 Medeleg_sv +80004350 l .data 00000000 Mtvec_new +80004358 l .data 00000000 Mtvec_save +80004360 l .data 00000000 Mscratch_save +80004368 l .data 00000000 Mtrapreg_sv +80004388 l .data 00000000 Mrvmodel_sv +800043a8 l .data 00000000 Msv_area_end +80005db0 l .data 00000000 end_failure_scratch +80005e50 l .data 00000000 trap_excpt_name_0 +80005e70 l .data 00000000 trap_excpt_name_1 +80005e8a l .data 00000000 trap_excpt_name_2 +80005e9f l .data 00000000 trap_excpt_name_3 +80005eab l .data 00000000 trap_excpt_name_4 +80005ec4 l .data 00000000 trap_excpt_name_5 +80005ed7 l .data 00000000 trap_excpt_name_6 +80005ef5 l .data 00000000 trap_excpt_name_7 +80005f0d l .data 00000000 trap_excpt_name_8 +80005f2b l .data 00000000 trap_excpt_name_9 +80005f49 l .data 00000000 trap_excpt_name_10 +80005f68 l .data 00000000 trap_excpt_name_11 +80005f86 l .data 00000000 trap_excpt_name_12 +80005f9e l .data 00000000 trap_excpt_name_13 +80005faf l .data 00000000 trap_excpt_name_14 +80005fbe l .data 00000000 trap_excpt_name_15 +80005fd4 l .data 00000000 trap_excpt_name_16 +80005fe1 l .data 00000000 trap_excpt_name_17 +80005ff0 l .data 00000000 trap_excpt_name_18 +80006000 l .data 00000000 trap_excpt_name_19 +80006010 l .data 00000000 trap_excpt_name_20 +8000602e l .data 00000000 trap_excpt_name_21 +80006045 l .data 00000000 trap_excpt_name_22 +8000605a l .data 00000000 trap_excpt_name_23 +80006076 l .data 00000000 trap_int_name_0 +8000608e l .data 00000000 trap_int_name_1 +800060ad l .data 00000000 trap_int_name_2 +800060d4 l .data 00000000 trap_int_name_3 +800060f0 l .data 00000000 trap_int_name_4 +80006108 l .data 00000000 trap_int_name_5 +80006124 l .data 00000000 trap_int_name_6 +80006148 l .data 00000000 trap_int_name_7 +80006161 l .data 00000000 trap_int_name_8 +80006179 l .data 00000000 trap_int_name_9 +80006198 l .data 00000000 trap_int_name_10 +800061bf l .data 00000000 trap_int_name_11 +800061db l .data 00000000 trap_int_name_12 +80006200 l .data 00000000 trap_int_name_13 +8000621c l .data 00000000 trap_int_name_14 +80006235 l .data 00000000 trap_int_name_15 +800063f9 l .data 00000000 xepcstr +80006a97 l .data 00000000 Mclr_Vext_int_str +80006af1 l .data 00000000 Sclr_Mext_int_str +80006b92 l .data 00000000 Sclr_Vext_int_str +80006bec l .data 00000000 Hclr_Mext_int_str +80006c8f l .data 00000000 Hclr_Vext_int_str +80006cea l .data 00000000 Vclr_Mext_int_str +80006d3a l .data 00000000 Vclr_Sext_int_str +80006d8d l .data 00000000 Vclr_Vext_int_str +8000742c l .data 00000000 trap_diag_curr_xepc_str +800165b0 g .data 00000000 end_signature +80017580 g .text.rvmodel 00000000 rvmodel_io_write_str_c +800165b0 g .data 00000000 rvtest_sig_end +80001518 g .text.rvtest 00000000 common_Mentry +80001024 g .text.rvtest 00000000 rvtest_Mend +80000000 g .text.init 00000000 rvtest_entry_point +80007960 g .data 00000000 begin_signature +80004108 g .data 00000000 rvtest_trap_count +80000fcc g .text.rvtest 00000000 rvtest_code_end +80000040 g .text.rvtest 00000000 rvtest_code_begin +80007960 g .data 00000000 rvtest_sig_begin +800043b0 g .data 00000000 rvtest_data_begin +80004110 g .data 00000000 Mtramptbl_sv +8000795f g .data 00000000 rvtest_data_end +80000fcc g .text.rvtest 00000000 cleanup_epilogs +80018000 g .text.rvmodel 00000000 _end +80016700 g .tohost 00000000 fromhost +80016600 g .tohost 00000000 tohost +80001290 g .text.rvtest 00000000 rvtest_fail_summary +80001340 g .text.rvtest 00000000 Mtrampoline + + + +Disassembly of section .text.init: + +80000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN +80000000: 00017097 auipc x1,0x17 +80000004: 0e408093 addi x1,x1,228 # 800170e4 +80000008: 00000013 addi x0,x0,0 +8000000c: 00000013 addi x0,x0,0 +80000010: 00000013 addi x0,x0,0 +80000014: 00000013 addi x0,x0,0 +80000018: 00000013 addi x0,x0,0 +8000001c: 00000013 addi x0,x0,0 +80000020: 000080e7 jalr x1,0(x1) +80000024: 00000013 addi x0,x0,0 +80000028: 00000013 addi x0,x0,0 +8000002c: 00000013 addi x0,x0,0 +80000030: 00000013 addi x0,x0,0 +80000034: 00000013 addi x0,x0,0 +80000038: 00000013 addi x0,x0,0 +8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +80000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xa85dd212 +80000040: 0001a003 lw x0,0(x3) +80000044: 00418193 addi x3,x3,4 + +80000048 : +Zksh_sm3p1_cg_cp_rs1_b0: + sm3p1 x31, x0 # perform operation +80000048: 10901f93 sm3p1 x31,x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_b0, Zksh_sm3p1_cg_cp_rs1_b0_str) +8000004c: 00012203 lw x4,0(x2) +80000050: 01f20863 beq x4,x31,80000060 +80000054: 02c022ef jal x5,80002080 +80000058: 80000048 .word 0x80000048 +8000005c: 80004560 .word 0x80004560 +80000060: 00410113 addi x2,x2,4 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x3bf16ae7 +80000064: 0001a083 lw x1,0(x3) +80000068: 00418193 addi x3,x3,4 + +8000006c : +Zksh_sm3p1_cg_cp_rs1_b1: + sm3p1 x18, x1 # perform operation +8000006c: 10909913 sm3p1 x18,x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksh_sm3p1_cg_cp_rs1_b1, Zksh_sm3p1_cg_cp_rs1_b1_str) +80000070: 00012203 lw x4,0(x2) +80000074: 01220863 beq x4,x18,80000084 +80000078: 008022ef jal x5,80002080 +8000007c: 8000006c .word 0x8000006c +80000080: 80004592 .word 0x80004592 +80000084: 00410113 addi x2,x2,4 + + mv x1, x2 # switch signature pointer register to avoid conflict with test +80000088: 00010093 addi x1,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xa6cc9d7e +8000008c: 0001a103 lw x2,0(x3) +80000090: 00418193 addi x3,x3,4 + +80000094 : +Zksh_sm3p1_cg_cp_rs1_b2: + sm3p1 x24, x2 # perform operation +80000094: 10911c13 sm3p1 x24,x2 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zksh_sm3p1_cg_cp_rs1_b2, Zksh_sm3p1_cg_cp_rs1_b2_str) +80000098: 0000a203 lw x4,0(x1) +8000009c: 01820863 beq x4,x24,800000ac +800000a0: 7e1012ef jal x5,80002080 +800000a4: 80000094 .word 0x80000094 +800000a8: 800045c4 .word 0x800045c4 +800000ac: 00408093 addi x1,x1,4 + + mv x19, x3 # switch data pointer register to avoid conflict with test +800000b0: 00018993 addi x19,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x6328f011 +800000b4: 0009a183 lw x3,0(x19) +800000b8: 00498993 addi x19,x19,4 + +800000bc : +Zksh_sm3p1_cg_cp_rs1_b3: + sm3p1 x28, x3 # perform operation +800000bc: 10919e13 sm3p1 x28,x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zksh_sm3p1_cg_cp_rs1_b3, Zksh_sm3p1_cg_cp_rs1_b3_str) +800000c0: 0000a203 lw x4,0(x1) +800000c4: 01c20863 beq x4,x28,800000d4 +800000c8: 7b9012ef jal x5,80002080 +800000cc: 800000bc .word 0x800000bc +800000d0: 800045f6 .word 0x800045f6 +800000d4: 00408093 addi x1,x1,4 + + mv x13, x4 # switch temp register to avoid conflict with test +800000d8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +800000dc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x7e9d0880 +800000e0: 0009a203 lw x4,0(x19) +800000e4: 00498993 addi x19,x19,4 + +800000e8 : +Zksh_sm3p1_cg_cp_rs1_b4: + sm3p1 x17, x4 # perform operation +800000e8: 10921893 sm3p1 x17,x4 + # Check if x17 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x17, Zksh_sm3p1_cg_cp_rs1_b4, Zksh_sm3p1_cg_cp_rs1_b4_str) +800000ec: 0000a683 lw x13,0(x1) +800000f0: 01168863 beq x13,x17,80000100 +800000f4: 7cd0176f jal x14,800020c0 +800000f8: 800000e8 .word 0x800000e8 +800000fc: 80004628 .word 0x80004628 +80000100: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0xbb0aef1a +80000104: 0009a283 lw x5,0(x19) +80000108: 00498993 addi x19,x19,4 + +8000010c : +Zksh_sm3p1_cg_cp_rs1_b5: + sm3p1 x25, x5 # perform operation +8000010c: 10929c93 sm3p1 x25,x5 + # Check if x25 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x25, Zksh_sm3p1_cg_cp_rs1_b5, Zksh_sm3p1_cg_cp_rs1_b5_str) +80000110: 0000a683 lw x13,0(x1) +80000114: 01968863 beq x13,x25,80000124 +80000118: 7a90176f jal x14,800020c0 +8000011c: 8000010c .word 0x8000010c +80000120: 8000465a .word 0x8000465a +80000124: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x3186261a +80000128: 0009a303 lw x6,0(x19) +8000012c: 00498993 addi x19,x19,4 + +80000130 : +Zksh_sm3p1_cg_cp_rs1_b6: + sm3p1 x18, x6 # perform operation +80000130: 10931913 sm3p1 x18,x6 + # Check if x18 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x18, Zksh_sm3p1_cg_cp_rs1_b6, Zksh_sm3p1_cg_cp_rs1_b6_str) +80000134: 0000a683 lw x13,0(x1) +80000138: 01268863 beq x13,x18,80000148 +8000013c: 7850176f jal x14,800020c0 +80000140: 80000130 .word 0x80000130 +80000144: 8000468c .word 0x8000468c +80000148: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x2274210c +8000014c: 0009a383 lw x7,0(x19) +80000150: 00498993 addi x19,x19,4 + +80000154 : +Zksh_sm3p1_cg_cp_rs1_b7: + sm3p1 x29, x7 # perform operation +80000154: 10939e93 sm3p1 x29,x7 + # Check if x29 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x29, Zksh_sm3p1_cg_cp_rs1_b7, Zksh_sm3p1_cg_cp_rs1_b7_str) +80000158: 0000a683 lw x13,0(x1) +8000015c: 01d68863 beq x13,x29,8000016c +80000160: 7610176f jal x14,800020c0 +80000164: 80000154 .word 0x80000154 +80000168: 800046be .word 0x800046be +8000016c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xe4ec7bdf +80000170: 0009a403 lw x8,0(x19) +80000174: 00498993 addi x19,x19,4 + +80000178 : +Zksh_sm3p1_cg_cp_rs1_b8: + sm3p1 x29, x8 # perform operation +80000178: 10941e93 sm3p1 x29,x8 + # Check if x29 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x29, Zksh_sm3p1_cg_cp_rs1_b8, Zksh_sm3p1_cg_cp_rs1_b8_str) +8000017c: 0000a683 lw x13,0(x1) +80000180: 01d68863 beq x13,x29,80000190 +80000184: 73d0176f jal x14,800020c0 +80000188: 80000178 .word 0x80000178 +8000018c: 800046f0 .word 0x800046f0 +80000190: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xacdeadfc +80000194: 0009a483 lw x9,0(x19) +80000198: 00498993 addi x19,x19,4 + +8000019c : +Zksh_sm3p1_cg_cp_rs1_b9: + sm3p1 x23, x9 # perform operation +8000019c: 10949b93 sm3p1 x23,x9 + # Check if x23 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x23, Zksh_sm3p1_cg_cp_rs1_b9, Zksh_sm3p1_cg_cp_rs1_b9_str) +800001a0: 0000a683 lw x13,0(x1) +800001a4: 01768863 beq x13,x23,800001b4 +800001a8: 7190176f jal x14,800020c0 +800001ac: 8000019c .word 0x8000019c +800001b0: 80004722 .word 0x80004722 +800001b4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xff3db898 +800001b8: 0009a503 lw x10,0(x19) +800001bc: 00498993 addi x19,x19,4 + +800001c0 : +Zksh_sm3p1_cg_cp_rs1_b10: + sm3p1 x18, x10 # perform operation +800001c0: 10951913 sm3p1 x18,x10 + # Check if x18 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x18, Zksh_sm3p1_cg_cp_rs1_b10, Zksh_sm3p1_cg_cp_rs1_b10_str) +800001c4: 0000a683 lw x13,0(x1) +800001c8: 01268863 beq x13,x18,800001d8 +800001cc: 6f50176f jal x14,800020c0 +800001d0: 800001c0 .word 0x800001c0 +800001d4: 80004755 .word 0x80004755 +800001d8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x093f763e +800001dc: 0009a583 lw x11,0(x19) +800001e0: 00498993 addi x19,x19,4 + +800001e4 : +Zksh_sm3p1_cg_cp_rs1_b11: + sm3p1 x31, x11 # perform operation +800001e4: 10959f93 sm3p1 x31,x11 + # Check if x31 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x31, Zksh_sm3p1_cg_cp_rs1_b11, Zksh_sm3p1_cg_cp_rs1_b11_str) +800001e8: 0000a683 lw x13,0(x1) +800001ec: 01f68863 beq x13,x31,800001fc +800001f0: 6d10176f jal x14,800020c0 +800001f4: 800001e4 .word 0x800001e4 +800001f8: 80004789 .word 0x80004789 +800001fc: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xcf2f8ae4 +80000200: 0009a603 lw x12,0(x19) +80000204: 00498993 addi x19,x19,4 + +80000208 : +Zksh_sm3p1_cg_cp_rs1_b12: + sm3p1 x5, x12 # perform operation +80000208: 10961293 sm3p1 x5,x12 + # Check if x5 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x5, Zksh_sm3p1_cg_cp_rs1_b12, Zksh_sm3p1_cg_cp_rs1_b12_str) +8000020c: 0000a683 lw x13,0(x1) +80000210: 00568863 beq x13,x5,80000220 +80000214: 6ad0176f jal x14,800020c0 +80000218: 80000208 .word 0x80000208 +8000021c: 800047bd .word 0x800047bd +80000220: 00408093 addi x1,x1,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000224: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000228: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x5ff4b3c1 +8000022c: 0009a683 lw x13,0(x19) +80000230: 00498993 addi x19,x19,4 + +80000234 : +Zksh_sm3p1_cg_cp_rs1_b13: + sm3p1 x29, x13 # perform operation +80000234: 10969e93 sm3p1 x29,x13 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zksh_sm3p1_cg_cp_rs1_b13, Zksh_sm3p1_cg_cp_rs1_b13_str) +80000238: 0000a383 lw x7,0(x1) +8000023c: 01d38863 beq x7,x29,8000024c +80000240: 6590146f jal x8,80002098 +80000244: 80000234 .word 0x80000234 +80000248: 800047f1 .word 0x800047f1 +8000024c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xad7c6d86 +80000250: 0009a703 lw x14,0(x19) +80000254: 00498993 addi x19,x19,4 + +80000258 : +Zksh_sm3p1_cg_cp_rs1_b14: + sm3p1 x4, x14 # perform operation +80000258: 10971213 sm3p1 x4,x14 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zksh_sm3p1_cg_cp_rs1_b14, Zksh_sm3p1_cg_cp_rs1_b14_str) +8000025c: 0000a383 lw x7,0(x1) +80000260: 00438863 beq x7,x4,80000270 +80000264: 6350146f jal x8,80002098 +80000268: 80000258 .word 0x80000258 +8000026c: 80004825 .word 0x80004825 +80000270: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x2002d210 +80000274: 0009a783 lw x15,0(x19) +80000278: 00498993 addi x19,x19,4 + +8000027c : +Zksh_sm3p1_cg_cp_rs1_b15: + sm3p1 x28, x15 # perform operation +8000027c: 10979e13 sm3p1 x28,x15 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zksh_sm3p1_cg_cp_rs1_b15, Zksh_sm3p1_cg_cp_rs1_b15_str) +80000280: 0000a383 lw x7,0(x1) +80000284: 01c38863 beq x7,x28,80000294 +80000288: 6110146f jal x8,80002098 +8000028c: 8000027c .word 0x8000027c +80000290: 80004859 .word 0x80004859 +80000294: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0xa0ed7032 +80000298: 0009a803 lw x16,0(x19) +8000029c: 00498993 addi x19,x19,4 + +800002a0 : +Zksh_sm3p1_cg_cp_rs1_b16: + sm3p1 x14, x16 # perform operation +800002a0: 10981713 sm3p1 x14,x16 + # Check if x14 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x14, Zksh_sm3p1_cg_cp_rs1_b16, Zksh_sm3p1_cg_cp_rs1_b16_str) +800002a4: 0000a383 lw x7,0(x1) +800002a8: 00e38863 beq x7,x14,800002b8 +800002ac: 5ed0146f jal x8,80002098 +800002b0: 800002a0 .word 0x800002a0 +800002b4: 8000488d .word 0x8000488d +800002b8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x04a7dbfe +800002bc: 0009a883 lw x17,0(x19) +800002c0: 00498993 addi x19,x19,4 + +800002c4 : +Zksh_sm3p1_cg_cp_rs1_b17: + sm3p1 x6, x17 # perform operation +800002c4: 10989313 sm3p1 x6,x17 + # Check if x6 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x6, Zksh_sm3p1_cg_cp_rs1_b17, Zksh_sm3p1_cg_cp_rs1_b17_str) +800002c8: 0000a383 lw x7,0(x1) +800002cc: 00638863 beq x7,x6,800002dc +800002d0: 5c90146f jal x8,80002098 +800002d4: 800002c4 .word 0x800002c4 +800002d8: 800048c1 .word 0x800048c1 +800002dc: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x17810d49 +800002e0: 0009a903 lw x18,0(x19) +800002e4: 00498993 addi x19,x19,4 + +800002e8 : +Zksh_sm3p1_cg_cp_rs1_b18: + sm3p1 x16, x18 # perform operation +800002e8: 10991813 sm3p1 x16,x18 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zksh_sm3p1_cg_cp_rs1_b18, Zksh_sm3p1_cg_cp_rs1_b18_str) +800002ec: 0000a383 lw x7,0(x1) +800002f0: 01038863 beq x7,x16,80000300 +800002f4: 5a50146f jal x8,80002098 +800002f8: 800002e8 .word 0x800002e8 +800002fc: 800048f5 .word 0x800048f5 +80000300: 00408093 addi x1,x1,4 + + mv x3, x19 # switch data pointer register to avoid conflict with test +80000304: 00098193 addi x3,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x9911dca9 +80000308: 0001a983 lw x19,0(x3) +8000030c: 00418193 addi x3,x3,4 + +80000310 : +Zksh_sm3p1_cg_cp_rs1_b19: + sm3p1 x22, x19 # perform operation +80000310: 10999b13 sm3p1 x22,x19 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zksh_sm3p1_cg_cp_rs1_b19, Zksh_sm3p1_cg_cp_rs1_b19_str) +80000314: 0000a383 lw x7,0(x1) +80000318: 01638863 beq x7,x22,80000328 +8000031c: 57d0146f jal x8,80002098 +80000320: 80000310 .word 0x80000310 +80000324: 80004929 .word 0x80004929 +80000328: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xc388ca98 +8000032c: 0001aa03 lw x20,0(x3) +80000330: 00418193 addi x3,x3,4 + +80000334 : +Zksh_sm3p1_cg_cp_rs1_b20: + sm3p1 x11, x20 # perform operation +80000334: 109a1593 sm3p1 x11,x20 + # Check if x11 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x11, Zksh_sm3p1_cg_cp_rs1_b20, Zksh_sm3p1_cg_cp_rs1_b20_str) +80000338: 0000a383 lw x7,0(x1) +8000033c: 00b38863 beq x7,x11,8000034c +80000340: 5590146f jal x8,80002098 +80000344: 80000334 .word 0x80000334 +80000348: 8000495d .word 0x8000495d +8000034c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x153e6c03 +80000350: 0001aa83 lw x21,0(x3) +80000354: 00418193 addi x3,x3,4 + +80000358 : +Zksh_sm3p1_cg_cp_rs1_b21: + sm3p1 x0, x21 # perform operation +80000358: 109a9013 sm3p1 x0,x21 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zksh_sm3p1_cg_cp_rs1_b21, Zksh_sm3p1_cg_cp_rs1_b21_str) +8000035c: 0000a383 lw x7,0(x1) +80000360: 00038863 beq x7,x0,80000370 +80000364: 5350146f jal x8,80002098 +80000368: 80000358 .word 0x80000358 +8000036c: 80004991 .word 0x80004991 +80000370: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xadb059c1 +80000374: 0001ab03 lw x22,0(x3) +80000378: 00418193 addi x3,x3,4 + +8000037c : +Zksh_sm3p1_cg_cp_rs1_b22: + sm3p1 x0, x22 # perform operation +8000037c: 109b1013 sm3p1 x0,x22 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zksh_sm3p1_cg_cp_rs1_b22, Zksh_sm3p1_cg_cp_rs1_b22_str) +80000380: 0000a383 lw x7,0(x1) +80000384: 00038863 beq x7,x0,80000394 +80000388: 5110146f jal x8,80002098 +8000038c: 8000037c .word 0x8000037c +80000390: 800049c5 .word 0x800049c5 +80000394: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xab4de636 +80000398: 0001ab83 lw x23,0(x3) +8000039c: 00418193 addi x3,x3,4 + +800003a0 : +Zksh_sm3p1_cg_cp_rs1_b23: + sm3p1 x27, x23 # perform operation +800003a0: 109b9d93 sm3p1 x27,x23 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zksh_sm3p1_cg_cp_rs1_b23, Zksh_sm3p1_cg_cp_rs1_b23_str) +800003a4: 0000a383 lw x7,0(x1) +800003a8: 01b38863 beq x7,x27,800003b8 +800003ac: 4ed0146f jal x8,80002098 +800003b0: 800003a0 .word 0x800003a0 +800003b4: 800049f9 .word 0x800049f9 +800003b8: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xb7cdfe21 +800003bc: 0001ac03 lw x24,0(x3) +800003c0: 00418193 addi x3,x3,4 + +800003c4 : +Zksh_sm3p1_cg_cp_rs1_b24: + sm3p1 x10, x24 # perform operation +800003c4: 109c1513 sm3p1 x10,x24 + # Check if x10 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x10, Zksh_sm3p1_cg_cp_rs1_b24, Zksh_sm3p1_cg_cp_rs1_b24_str) +800003c8: 0000a383 lw x7,0(x1) +800003cc: 00a38863 beq x7,x10,800003dc +800003d0: 4c90146f jal x8,80002098 +800003d4: 800003c4 .word 0x800003c4 +800003d8: 80004a2d .word 0x80004a2d +800003dc: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xab3911b2 +800003e0: 0001ac83 lw x25,0(x3) +800003e4: 00418193 addi x3,x3,4 + +800003e8 : +Zksh_sm3p1_cg_cp_rs1_b25: + sm3p1 x5, x25 # perform operation +800003e8: 109c9293 sm3p1 x5,x25 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zksh_sm3p1_cg_cp_rs1_b25, Zksh_sm3p1_cg_cp_rs1_b25_str) +800003ec: 0000a383 lw x7,0(x1) +800003f0: 00538863 beq x7,x5,80000400 +800003f4: 4a50146f jal x8,80002098 +800003f8: 800003e8 .word 0x800003e8 +800003fc: 80004a61 .word 0x80004a61 +80000400: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x9e8897d2 +80000404: 0001ad03 lw x26,0(x3) +80000408: 00418193 addi x3,x3,4 + +8000040c : +Zksh_sm3p1_cg_cp_rs1_b26: + sm3p1 x13, x26 # perform operation +8000040c: 109d1693 sm3p1 x13,x26 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zksh_sm3p1_cg_cp_rs1_b26, Zksh_sm3p1_cg_cp_rs1_b26_str) +80000410: 0000a383 lw x7,0(x1) +80000414: 00d38863 beq x7,x13,80000424 +80000418: 4810146f jal x8,80002098 +8000041c: 8000040c .word 0x8000040c +80000420: 80004a95 .word 0x80004a95 +80000424: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x73af34d0 +80000428: 0001ad83 lw x27,0(x3) +8000042c: 00418193 addi x3,x3,4 + +80000430 : +Zksh_sm3p1_cg_cp_rs1_b27: + sm3p1 x29, x27 # perform operation +80000430: 109d9e93 sm3p1 x29,x27 + # Check if x29 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x29, Zksh_sm3p1_cg_cp_rs1_b27, Zksh_sm3p1_cg_cp_rs1_b27_str) +80000434: 0000a383 lw x7,0(x1) +80000438: 01d38863 beq x7,x29,80000448 +8000043c: 45d0146f jal x8,80002098 +80000440: 80000430 .word 0x80000430 +80000444: 80004ac9 .word 0x80004ac9 +80000448: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xf139024e +8000044c: 0001ae03 lw x28,0(x3) +80000450: 00418193 addi x3,x3,4 + +80000454 : +Zksh_sm3p1_cg_cp_rs1_b28: + sm3p1 x22, x28 # perform operation +80000454: 109e1b13 sm3p1 x22,x28 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zksh_sm3p1_cg_cp_rs1_b28, Zksh_sm3p1_cg_cp_rs1_b28_str) +80000458: 0000a383 lw x7,0(x1) +8000045c: 01638863 beq x7,x22,8000046c +80000460: 4390146f jal x8,80002098 +80000464: 80000454 .word 0x80000454 +80000468: 80004afd .word 0x80004afd +8000046c: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x82ba696f +80000470: 0001ae83 lw x29,0(x3) +80000474: 00418193 addi x3,x3,4 + +80000478 : +Zksh_sm3p1_cg_cp_rs1_b29: + sm3p1 x22, x29 # perform operation +80000478: 109e9b13 sm3p1 x22,x29 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zksh_sm3p1_cg_cp_rs1_b29, Zksh_sm3p1_cg_cp_rs1_b29_str) +8000047c: 0000a383 lw x7,0(x1) +80000480: 01638863 beq x7,x22,80000490 +80000484: 4150146f jal x8,80002098 +80000488: 80000478 .word 0x80000478 +8000048c: 80004b31 .word 0x80004b31 +80000490: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x1f052165 +80000494: 0001af03 lw x30,0(x3) +80000498: 00418193 addi x3,x3,4 + +8000049c : +Zksh_sm3p1_cg_cp_rs1_b30: + sm3p1 x25, x30 # perform operation +8000049c: 109f1c93 sm3p1 x25,x30 + # Check if x25 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x25, Zksh_sm3p1_cg_cp_rs1_b30, Zksh_sm3p1_cg_cp_rs1_b30_str) +800004a0: 0000a383 lw x7,0(x1) +800004a4: 01938863 beq x7,x25,800004b4 +800004a8: 3f10146f jal x8,80002098 +800004ac: 8000049c .word 0x8000049c +800004b0: 80004b65 .word 0x80004b65 +800004b4: 00408093 addi x1,x1,4 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x27b345b8 +800004b8: 0001af83 lw x31,0(x3) +800004bc: 00418193 addi x3,x3,4 + +800004c0 : +Zksh_sm3p1_cg_cp_rs1_b31: + sm3p1 x26, x31 # perform operation +800004c0: 109f9d13 sm3p1 x26,x31 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zksh_sm3p1_cg_cp_rs1_b31, Zksh_sm3p1_cg_cp_rs1_b31_str) +800004c4: 0000a383 lw x7,0(x1) +800004c8: 01a38863 beq x7,x26,800004d8 +800004cc: 3cd0146f jal x8,80002098 +800004d0: 800004c0 .word 0x800004c0 +800004d4: 80004b99 .word 0x80004b99 +800004d8: 00408093 addi x1,x1,4 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xb7645e40 +800004dc: 0001af83 lw x31,0(x3) +800004e0: 00418193 addi x3,x3,4 + +800004e4 : +Zksh_sm3p1_cg_cp_rd_b0: + sm3p1 x0, x31 # perform operation +800004e4: 109f9013 sm3p1 x0,x31 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zksh_sm3p1_cg_cp_rd_b0, Zksh_sm3p1_cg_cp_rd_b0_str) +800004e8: 0000a383 lw x7,0(x1) +800004ec: 00038863 beq x7,x0,800004fc +800004f0: 3a90146f jal x8,80002098 +800004f4: 800004e4 .word 0x800004e4 +800004f8: 80004bcd .word 0x80004bcd +800004fc: 00408093 addi x1,x1,4 + + mv x22, x1 # switch signature pointer register to avoid conflict with test +80000500: 00008b13 addi x22,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xf776836f +80000504: 0001ac83 lw x25,0(x3) +80000508: 00418193 addi x3,x3,4 + +8000050c : +Zksh_sm3p1_cg_cp_rd_b1: + sm3p1 x1, x25 # perform operation +8000050c: 109c9093 sm3p1 x1,x25 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksh_sm3p1_cg_cp_rd_b1, Zksh_sm3p1_cg_cp_rd_b1_str) +80000510: 000b2383 lw x7,0(x22) +80000514: 00138863 beq x7,x1,80000524 +80000518: 3810146f jal x8,80002098 +8000051c: 8000050c .word 0x8000050c +80000520: 80004bff .word 0x80004bff +80000524: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xad68891e +80000528: 0001aa83 lw x21,0(x3) +8000052c: 00418193 addi x3,x3,4 + +80000530 : +Zksh_sm3p1_cg_cp_rd_b2: + sm3p1 x2, x21 # perform operation +80000530: 109a9113 sm3p1 x2,x21 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksh_sm3p1_cg_cp_rd_b2, Zksh_sm3p1_cg_cp_rd_b2_str) +80000534: 000b2383 lw x7,0(x22) +80000538: 00238863 beq x7,x2,80000548 +8000053c: 35d0146f jal x8,80002098 +80000540: 80000530 .word 0x80000530 +80000544: 80004c31 .word 0x80004c31 +80000548: 004b0b13 addi x22,x22,4 + + mv x19, x3 # switch data pointer register to avoid conflict with test +8000054c: 00018993 addi x19,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x0ef99d60 +80000550: 0009a303 lw x6,0(x19) +80000554: 00498993 addi x19,x19,4 + +80000558 : +Zksh_sm3p1_cg_cp_rd_b3: + sm3p1 x3, x6 # perform operation +80000558: 10931193 sm3p1 x3,x6 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksh_sm3p1_cg_cp_rd_b3, Zksh_sm3p1_cg_cp_rd_b3_str) +8000055c: 000b2383 lw x7,0(x22) +80000560: 00338863 beq x7,x3,80000570 +80000564: 3350146f jal x8,80002098 +80000568: 80000558 .word 0x80000558 +8000056c: 80004c63 .word 0x80004c63 +80000570: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x3a441645 +80000574: 0009aa83 lw x21,0(x19) +80000578: 00498993 addi x19,x19,4 + +8000057c : +Zksh_sm3p1_cg_cp_rd_b4: + sm3p1 x4, x21 # perform operation +8000057c: 109a9213 sm3p1 x4,x21 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksh_sm3p1_cg_cp_rd_b4, Zksh_sm3p1_cg_cp_rd_b4_str) +80000580: 000b2383 lw x7,0(x22) +80000584: 00438863 beq x7,x4,80000594 +80000588: 3110146f jal x8,80002098 +8000058c: 8000057c .word 0x8000057c +80000590: 80004c95 .word 0x80004c95 +80000594: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x35268ccb +80000598: 0009ae83 lw x29,0(x19) +8000059c: 00498993 addi x19,x19,4 + +800005a0 : +Zksh_sm3p1_cg_cp_rd_b5: + sm3p1 x5, x29 # perform operation +800005a0: 109e9293 sm3p1 x5,x29 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksh_sm3p1_cg_cp_rd_b5, Zksh_sm3p1_cg_cp_rd_b5_str) +800005a4: 000b2383 lw x7,0(x22) +800005a8: 00538863 beq x7,x5,800005b8 +800005ac: 2ed0146f jal x8,80002098 +800005b0: 800005a0 .word 0x800005a0 +800005b4: 80004cc7 .word 0x80004cc7 +800005b8: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x39b619d0 +800005bc: 0009ad83 lw x27,0(x19) +800005c0: 00498993 addi x19,x19,4 + +800005c4 : +Zksh_sm3p1_cg_cp_rd_b6: + sm3p1 x6, x27 # perform operation +800005c4: 109d9313 sm3p1 x6,x27 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksh_sm3p1_cg_cp_rd_b6, Zksh_sm3p1_cg_cp_rd_b6_str) +800005c8: 000b2383 lw x7,0(x22) +800005cc: 00638863 beq x7,x6,800005dc +800005d0: 2c90146f jal x8,80002098 +800005d4: 800005c4 .word 0x800005c4 +800005d8: 80004cf9 .word 0x80004cf9 +800005dc: 004b0b13 addi x22,x22,4 + + mv x4, x7 # switch temp register to avoid conflict with test +800005e0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test +800005e4: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x3efede47 +800005e8: 0009ab83 lw x23,0(x19) +800005ec: 00498993 addi x19,x19,4 + +800005f0 : +Zksh_sm3p1_cg_cp_rd_b7: + sm3p1 x7, x23 # perform operation +800005f0: 109b9393 sm3p1 x7,x23 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zksh_sm3p1_cg_cp_rd_b7, Zksh_sm3p1_cg_cp_rd_b7_str) +800005f4: 000b2203 lw x4,0(x22) +800005f8: 00720863 beq x4,x7,80000608 +800005fc: 285012ef jal x5,80002080 +80000600: 800005f0 .word 0x800005f0 +80000604: 80004d2b .word 0x80004d2b +80000608: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x7c1de229 +8000060c: 0009ae83 lw x29,0(x19) +80000610: 00498993 addi x19,x19,4 + +80000614 : +Zksh_sm3p1_cg_cp_rd_b8: + sm3p1 x8, x29 # perform operation +80000614: 109e9413 sm3p1 x8,x29 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zksh_sm3p1_cg_cp_rd_b8, Zksh_sm3p1_cg_cp_rd_b8_str) +80000618: 000b2203 lw x4,0(x22) +8000061c: 00820863 beq x4,x8,8000062c +80000620: 261012ef jal x5,80002080 +80000624: 80000614 .word 0x80000614 +80000628: 80004d5d .word 0x80004d5d +8000062c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x2501b1bf +80000630: 0009aa03 lw x20,0(x19) +80000634: 00498993 addi x19,x19,4 + +80000638 : +Zksh_sm3p1_cg_cp_rd_b9: + sm3p1 x9, x20 # perform operation +80000638: 109a1493 sm3p1 x9,x20 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zksh_sm3p1_cg_cp_rd_b9, Zksh_sm3p1_cg_cp_rd_b9_str) +8000063c: 000b2203 lw x4,0(x22) +80000640: 00920863 beq x4,x9,80000650 +80000644: 23d012ef jal x5,80002080 +80000648: 80000638 .word 0x80000638 +8000064c: 80004d8f .word 0x80004d8f +80000650: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xd09cac42 +80000654: 0009a603 lw x12,0(x19) +80000658: 00498993 addi x19,x19,4 + +8000065c : +Zksh_sm3p1_cg_cp_rd_b10: + sm3p1 x10, x12 # perform operation +8000065c: 10961513 sm3p1 x10,x12 + # Check if x10 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x10, Zksh_sm3p1_cg_cp_rd_b10, Zksh_sm3p1_cg_cp_rd_b10_str) +80000660: 000b2203 lw x4,0(x22) +80000664: 00a20863 beq x4,x10,80000674 +80000668: 219012ef jal x5,80002080 +8000066c: 8000065c .word 0x8000065c +80000670: 80004dc1 .word 0x80004dc1 +80000674: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xf9048d94 +80000678: 0009a403 lw x8,0(x19) +8000067c: 00498993 addi x19,x19,4 + +80000680 : +Zksh_sm3p1_cg_cp_rd_b11: + sm3p1 x11, x8 # perform operation +80000680: 10941593 sm3p1 x11,x8 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zksh_sm3p1_cg_cp_rd_b11, Zksh_sm3p1_cg_cp_rd_b11_str) +80000684: 000b2203 lw x4,0(x22) +80000688: 00b20863 beq x4,x11,80000698 +8000068c: 1f5012ef jal x5,80002080 +80000690: 80000680 .word 0x80000680 +80000694: 80004df4 .word 0x80004df4 +80000698: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0xb854f8fa +8000069c: 0009a383 lw x7,0(x19) +800006a0: 00498993 addi x19,x19,4 + +800006a4 : +Zksh_sm3p1_cg_cp_rd_b12: + sm3p1 x12, x7 # perform operation +800006a4: 10939613 sm3p1 x12,x7 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zksh_sm3p1_cg_cp_rd_b12, Zksh_sm3p1_cg_cp_rd_b12_str) +800006a8: 000b2203 lw x4,0(x22) +800006ac: 00c20863 beq x4,x12,800006bc +800006b0: 1d1012ef jal x5,80002080 +800006b4: 800006a4 .word 0x800006a4 +800006b8: 80004e27 .word 0x80004e27 +800006bc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x26a469c5 +800006c0: 0009a883 lw x17,0(x19) +800006c4: 00498993 addi x19,x19,4 + +800006c8 : +Zksh_sm3p1_cg_cp_rd_b13: + sm3p1 x13, x17 # perform operation +800006c8: 10989693 sm3p1 x13,x17 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zksh_sm3p1_cg_cp_rd_b13, Zksh_sm3p1_cg_cp_rd_b13_str) +800006cc: 000b2203 lw x4,0(x22) +800006d0: 00d20863 beq x4,x13,800006e0 +800006d4: 1ad012ef jal x5,80002080 +800006d8: 800006c8 .word 0x800006c8 +800006dc: 80004e5a .word 0x80004e5a +800006e0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0xba7346c7 +800006e4: 0009a003 lw x0,0(x19) +800006e8: 00498993 addi x19,x19,4 + +800006ec : +Zksh_sm3p1_cg_cp_rd_b14: + sm3p1 x14, x0 # perform operation +800006ec: 10901713 sm3p1 x14,x0 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zksh_sm3p1_cg_cp_rd_b14, Zksh_sm3p1_cg_cp_rd_b14_str) +800006f0: 000b2203 lw x4,0(x22) +800006f4: 00e20863 beq x4,x14,80000704 +800006f8: 189012ef jal x5,80002080 +800006fc: 800006ec .word 0x800006ec +80000700: 80004e8d .word 0x80004e8d +80000704: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x3cb9ed7a +80000708: 0009ae83 lw x29,0(x19) +8000070c: 00498993 addi x19,x19,4 + +80000710 : +Zksh_sm3p1_cg_cp_rd_b15: + sm3p1 x15, x29 # perform operation +80000710: 109e9793 sm3p1 x15,x29 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zksh_sm3p1_cg_cp_rd_b15, Zksh_sm3p1_cg_cp_rd_b15_str) +80000714: 000b2203 lw x4,0(x22) +80000718: 00f20863 beq x4,x15,80000728 +8000071c: 165012ef jal x5,80002080 +80000720: 80000710 .word 0x80000710 +80000724: 80004ec0 .word 0x80004ec0 +80000728: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x616fd3be +8000072c: 0009a503 lw x10,0(x19) +80000730: 00498993 addi x19,x19,4 + +80000734 : +Zksh_sm3p1_cg_cp_rd_b16: + sm3p1 x16, x10 # perform operation +80000734: 10951813 sm3p1 x16,x10 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zksh_sm3p1_cg_cp_rd_b16, Zksh_sm3p1_cg_cp_rd_b16_str) +80000738: 000b2203 lw x4,0(x22) +8000073c: 01020863 beq x4,x16,8000074c +80000740: 141012ef jal x5,80002080 +80000744: 80000734 .word 0x80000734 +80000748: 80004ef3 .word 0x80004ef3 +8000074c: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x81cb3b19 +80000750: 0009aa83 lw x21,0(x19) +80000754: 00498993 addi x19,x19,4 + +80000758 : +Zksh_sm3p1_cg_cp_rd_b17: + sm3p1 x17, x21 # perform operation +80000758: 109a9893 sm3p1 x17,x21 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zksh_sm3p1_cg_cp_rd_b17, Zksh_sm3p1_cg_cp_rd_b17_str) +8000075c: 000b2203 lw x4,0(x22) +80000760: 01120863 beq x4,x17,80000770 +80000764: 11d012ef jal x5,80002080 +80000768: 80000758 .word 0x80000758 +8000076c: 80004f26 .word 0x80004f26 +80000770: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x25f64300 +80000774: 0009a303 lw x6,0(x19) +80000778: 00498993 addi x19,x19,4 + +8000077c : +Zksh_sm3p1_cg_cp_rd_b18: + sm3p1 x18, x6 # perform operation +8000077c: 10931913 sm3p1 x18,x6 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zksh_sm3p1_cg_cp_rd_b18, Zksh_sm3p1_cg_cp_rd_b18_str) +80000780: 000b2203 lw x4,0(x22) +80000784: 01220863 beq x4,x18,80000794 +80000788: 0f9012ef jal x5,80002080 +8000078c: 8000077c .word 0x8000077c +80000790: 80004f59 .word 0x80004f59 +80000794: 004b0b13 addi x22,x22,4 + + mv x1, x19 # switch data pointer register to avoid conflict with test +80000798: 00098093 addi x1,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x771a389a +8000079c: 0000a683 lw x13,0(x1) +800007a0: 00408093 addi x1,x1,4 + +800007a4 : +Zksh_sm3p1_cg_cp_rd_b19: + sm3p1 x19, x13 # perform operation +800007a4: 10969993 sm3p1 x19,x13 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zksh_sm3p1_cg_cp_rd_b19, Zksh_sm3p1_cg_cp_rd_b19_str) +800007a8: 000b2203 lw x4,0(x22) +800007ac: 01320863 beq x4,x19,800007bc +800007b0: 0d1012ef jal x5,80002080 +800007b4: 800007a4 .word 0x800007a4 +800007b8: 80004f8c .word 0x80004f8c +800007bc: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x2ca83bfc +800007c0: 0000a383 lw x7,0(x1) +800007c4: 00408093 addi x1,x1,4 + +800007c8 : +Zksh_sm3p1_cg_cp_rd_b20: + sm3p1 x20, x7 # perform operation +800007c8: 10939a13 sm3p1 x20,x7 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zksh_sm3p1_cg_cp_rd_b20, Zksh_sm3p1_cg_cp_rd_b20_str) +800007cc: 000b2203 lw x4,0(x22) +800007d0: 01420863 beq x4,x20,800007e0 +800007d4: 0ad012ef jal x5,80002080 +800007d8: 800007c8 .word 0x800007c8 +800007dc: 80004fbf .word 0x80004fbf +800007e0: 004b0b13 addi x22,x22,4 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x57e7f90a +800007e4: 0000ae83 lw x29,0(x1) +800007e8: 00408093 addi x1,x1,4 + +800007ec : +Zksh_sm3p1_cg_cp_rd_b21: + sm3p1 x21, x29 # perform operation +800007ec: 109e9a93 sm3p1 x21,x29 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zksh_sm3p1_cg_cp_rd_b21, Zksh_sm3p1_cg_cp_rd_b21_str) +800007f0: 000b2203 lw x4,0(x22) +800007f4: 01520863 beq x4,x21,80000804 +800007f8: 089012ef jal x5,80002080 +800007fc: 800007ec .word 0x800007ec +80000800: 80004ff2 .word 0x80004ff2 +80000804: 004b0b13 addi x22,x22,4 + + mv x27, x22 # switch signature pointer register to avoid conflict with test +80000808: 000b0d93 addi x27,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x173fe7a5 +8000080c: 0000a383 lw x7,0(x1) +80000810: 00408093 addi x1,x1,4 + +80000814 : +Zksh_sm3p1_cg_cp_rd_b22: + sm3p1 x22, x7 # perform operation +80000814: 10939b13 sm3p1 x22,x7 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zksh_sm3p1_cg_cp_rd_b22, Zksh_sm3p1_cg_cp_rd_b22_str) +80000818: 000da203 lw x4,0(x27) +8000081c: 01620863 beq x4,x22,8000082c +80000820: 061012ef jal x5,80002080 +80000824: 80000814 .word 0x80000814 +80000828: 80005025 .word 0x80005025 +8000082c: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x76f6b4b1 +80000830: 0000aa03 lw x20,0(x1) +80000834: 00408093 addi x1,x1,4 + +80000838 : +Zksh_sm3p1_cg_cp_rd_b23: + sm3p1 x23, x20 # perform operation +80000838: 109a1b93 sm3p1 x23,x20 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zksh_sm3p1_cg_cp_rd_b23, Zksh_sm3p1_cg_cp_rd_b23_str) +8000083c: 000da203 lw x4,0(x27) +80000840: 01720863 beq x4,x23,80000850 +80000844: 03d012ef jal x5,80002080 +80000848: 80000838 .word 0x80000838 +8000084c: 80005058 .word 0x80005058 +80000850: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7398c423 +80000854: 0000aa03 lw x20,0(x1) +80000858: 00408093 addi x1,x1,4 + +8000085c : +Zksh_sm3p1_cg_cp_rd_b24: + sm3p1 x24, x20 # perform operation +8000085c: 109a1c13 sm3p1 x24,x20 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zksh_sm3p1_cg_cp_rd_b24, Zksh_sm3p1_cg_cp_rd_b24_str) +80000860: 000da203 lw x4,0(x27) +80000864: 01820863 beq x4,x24,80000874 +80000868: 019012ef jal x5,80002080 +8000086c: 8000085c .word 0x8000085c +80000870: 8000508b .word 0x8000508b +80000874: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x1b00101c +80000878: 0000a983 lw x19,0(x1) +8000087c: 00408093 addi x1,x1,4 + +80000880 : +Zksh_sm3p1_cg_cp_rd_b25: + sm3p1 x25, x19 # perform operation +80000880: 10999c93 sm3p1 x25,x19 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zksh_sm3p1_cg_cp_rd_b25, Zksh_sm3p1_cg_cp_rd_b25_str) +80000884: 000da203 lw x4,0(x27) +80000888: 01920863 beq x4,x25,80000898 +8000088c: 7f4012ef jal x5,80002080 +80000890: 80000880 .word 0x80000880 +80000894: 800050be .word 0x800050be +80000898: 004d8d93 addi x27,x27,4 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xe27586e9 +8000089c: 0000a403 lw x8,0(x1) +800008a0: 00408093 addi x1,x1,4 + +800008a4 : +Zksh_sm3p1_cg_cp_rd_b26: + sm3p1 x26, x8 # perform operation +800008a4: 10941d13 sm3p1 x26,x8 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zksh_sm3p1_cg_cp_rd_b26, Zksh_sm3p1_cg_cp_rd_b26_str) +800008a8: 000da203 lw x4,0(x27) +800008ac: 01a20863 beq x4,x26,800008bc +800008b0: 7d0012ef jal x5,80002080 +800008b4: 800008a4 .word 0x800008a4 +800008b8: 800050f1 .word 0x800050f1 +800008bc: 004d8d93 addi x27,x27,4 + + mv x15, x27 # switch signature pointer register to avoid conflict with test +800008c0: 000d8793 addi x15,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xb9082ec1 +800008c4: 0000ad03 lw x26,0(x1) +800008c8: 00408093 addi x1,x1,4 + +800008cc : +Zksh_sm3p1_cg_cp_rd_b27: + sm3p1 x27, x26 # perform operation +800008cc: 109d1d93 sm3p1 x27,x26 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksh_sm3p1_cg_cp_rd_b27, Zksh_sm3p1_cg_cp_rd_b27_str) +800008d0: 0007a203 lw x4,0(x15) +800008d4: 01b20863 beq x4,x27,800008e4 +800008d8: 7a8012ef jal x5,80002080 +800008dc: 800008cc .word 0x800008cc +800008e0: 80005124 .word 0x80005124 +800008e4: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7964158c +800008e8: 0000ad83 lw x27,0(x1) +800008ec: 00408093 addi x1,x1,4 + +800008f0 : +Zksh_sm3p1_cg_cp_rd_b28: + sm3p1 x28, x27 # perform operation +800008f0: 109d9e13 sm3p1 x28,x27 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksh_sm3p1_cg_cp_rd_b28, Zksh_sm3p1_cg_cp_rd_b28_str) +800008f4: 0007a203 lw x4,0(x15) +800008f8: 01c20863 beq x4,x28,80000908 +800008fc: 784012ef jal x5,80002080 +80000900: 800008f0 .word 0x800008f0 +80000904: 80005157 .word 0x80005157 +80000908: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xf892f590 +8000090c: 0000a883 lw x17,0(x1) +80000910: 00408093 addi x1,x1,4 + +80000914 : +Zksh_sm3p1_cg_cp_rd_b29: + sm3p1 x29, x17 # perform operation +80000914: 10989e93 sm3p1 x29,x17 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksh_sm3p1_cg_cp_rd_b29, Zksh_sm3p1_cg_cp_rd_b29_str) +80000918: 0007a203 lw x4,0(x15) +8000091c: 01d20863 beq x4,x29,8000092c +80000920: 760012ef jal x5,80002080 +80000924: 80000914 .word 0x80000914 +80000928: 8000518a .word 0x8000518a +8000092c: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x81c52001 +80000930: 0000a803 lw x16,0(x1) +80000934: 00408093 addi x1,x1,4 + +80000938 : +Zksh_sm3p1_cg_cp_rd_b30: + sm3p1 x30, x16 # perform operation +80000938: 10981f13 sm3p1 x30,x16 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksh_sm3p1_cg_cp_rd_b30, Zksh_sm3p1_cg_cp_rd_b30_str) +8000093c: 0007a203 lw x4,0(x15) +80000940: 01e20863 beq x4,x30,80000950 +80000944: 73c012ef jal x5,80002080 +80000948: 80000938 .word 0x80000938 +8000094c: 800051bd .word 0x800051bd +80000950: 00478793 addi x15,x15,4 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x406b7161 +80000954: 0000a383 lw x7,0(x1) +80000958: 00408093 addi x1,x1,4 + +8000095c : +Zksh_sm3p1_cg_cp_rd_b31: + sm3p1 x31, x7 # perform operation +8000095c: 10939f93 sm3p1 x31,x7 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksh_sm3p1_cg_cp_rd_b31, Zksh_sm3p1_cg_cp_rd_b31_str) +80000960: 0007a203 lw x4,0(x15) +80000964: 01f20863 beq x4,x31,80000974 +80000968: 718012ef jal x5,80002080 +8000096c: 8000095c .word 0x8000095c +80000970: 800051f0 .word 0x800051f0 +80000974: 00478793 addi x15,x15,4 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x00000000 +80000978: 0000a883 lw x17,0(x1) +8000097c: 00408093 addi x1,x1,4 + +80000980 : +Zksh_sm3p1_cg_cp_rs1_edges_0x0: + sm3p1 x13, x17 # perform operation +80000980: 10989693 sm3p1 x13,x17 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksh_sm3p1_cg_cp_rs1_edges_0x0, Zksh_sm3p1_cg_cp_rs1_edges_0x0_str) +80000984: 0007a203 lw x4,0(x15) +80000988: 00d20863 beq x4,x13,80000998 +8000098c: 6f4012ef jal x5,80002080 +80000990: 80000980 .word 0x80000980 +80000994: 80005223 .word 0x80005223 +80000998: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000001 +8000099c: 0000ae83 lw x29,0(x1) +800009a0: 00408093 addi x1,x1,4 + +800009a4 : +Zksh_sm3p1_cg_cp_rs1_edges_0x1: + sm3p1 x20, x29 # perform operation +800009a4: 109e9a13 sm3p1 x20,x29 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksh_sm3p1_cg_cp_rs1_edges_0x1, Zksh_sm3p1_cg_cp_rs1_edges_0x1_str) +800009a8: 0007a203 lw x4,0(x15) +800009ac: 01420863 beq x4,x20,800009bc +800009b0: 6d0012ef jal x5,80002080 +800009b4: 800009a4 .word 0x800009a4 +800009b8: 8000525d .word 0x8000525d +800009bc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000002) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000002 +800009c0: 0000a483 lw x9,0(x1) +800009c4: 00408093 addi x1,x1,4 + +800009c8 : +Zksh_sm3p1_cg_cp_rs1_edges_0x2: + sm3p1 x8, x9 # perform operation +800009c8: 10949413 sm3p1 x8,x9 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksh_sm3p1_cg_cp_rs1_edges_0x2, Zksh_sm3p1_cg_cp_rs1_edges_0x2_str) +800009cc: 0007a203 lw x4,0(x15) +800009d0: 00820863 beq x4,x8,800009e0 +800009d4: 6ac012ef jal x5,80002080 +800009d8: 800009c8 .word 0x800009c8 +800009dc: 80005297 .word 0x80005297 +800009e0: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000000) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x80000000 +800009e4: 0000a903 lw x18,0(x1) +800009e8: 00408093 addi x1,x1,4 + +800009ec : +Zksh_sm3p1_cg_cp_rs1_edges_0x80000000: + sm3p1 x31, x18 # perform operation +800009ec: 10991f93 sm3p1 x31,x18 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_edges_0x80000000, Zksh_sm3p1_cg_cp_rs1_edges_0x80000000_str) +800009f0: 0007a203 lw x4,0(x15) +800009f4: 01f20863 beq x4,x31,80000a04 +800009f8: 688012ef jal x5,80002080 +800009fc: 800009ec .word 0x800009ec +80000a00: 800052d1 .word 0x800052d1 +80000a04: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x80000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x80000001 +80000a08: 0000a603 lw x12,0(x1) +80000a0c: 00408093 addi x1,x1,4 + +80000a10 : +Zksh_sm3p1_cg_cp_rs1_edges_0x80000001: + sm3p1 x26, x12 # perform operation +80000a10: 10961d13 sm3p1 x26,x12 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksh_sm3p1_cg_cp_rs1_edges_0x80000001, Zksh_sm3p1_cg_cp_rs1_edges_0x80000001_str) +80000a14: 0007a203 lw x4,0(x15) +80000a18: 01a20863 beq x4,x26,80000a28 +80000a1c: 664012ef jal x5,80002080 +80000a20: 80000a10 .word 0x80000a10 +80000a24: 80005312 .word 0x80005312 +80000a28: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7fffffff +80000a2c: 0000a103 lw x2,0(x1) +80000a30: 00408093 addi x1,x1,4 + +80000a34 : +Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffff: + sm3p1 x29, x2 # perform operation +80000a34: 10911e93 sm3p1 x29,x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffff, Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffff_str) +80000a38: 0007a203 lw x4,0(x15) +80000a3c: 01d20863 beq x4,x29,80000a4c +80000a40: 640012ef jal x5,80002080 +80000a44: 80000a34 .word 0x80000a34 +80000a48: 80005353 .word 0x80005353 +80000a4c: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x7ffffffe +80000a50: 0000af83 lw x31,0(x1) +80000a54: 00408093 addi x1,x1,4 + +80000a58 : +Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffe: + sm3p1 x3, x31 # perform operation +80000a58: 109f9193 sm3p1 x3,x31 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffe, Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffe_str) +80000a5c: 0007a203 lw x4,0(x15) +80000a60: 00320863 beq x4,x3,80000a70 +80000a64: 61c012ef jal x5,80002080 +80000a68: 80000a58 .word 0x80000a58 +80000a6c: 80005394 .word 0x80005394 +80000a70: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xffffffff +80000a74: 0000a983 lw x19,0(x1) +80000a78: 00408093 addi x1,x1,4 + +80000a7c : +Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff: + sm3p1 x30, x19 # perform operation +80000a7c: 10999f13 sm3p1 x30,x19 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff_str) +80000a80: 0007a203 lw x4,0(x15) +80000a84: 01e20863 beq x4,x30,80000a94 +80000a88: 5f8012ef jal x5,80002080 +80000a8c: 80000a7c .word 0x80000a7c +80000a90: 800053d5 .word 0x800053d5 +80000a94: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xfffffffe +80000a98: 0000a903 lw x18,0(x1) +80000a9c: 00408093 addi x1,x1,4 + +80000aa0 : +Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe: + sm3p1 x31, x18 # perform operation +80000aa0: 10991f93 sm3p1 x31,x18 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe_str) +80000aa4: 0007a203 lw x4,0(x15) +80000aa8: 01f20863 beq x4,x31,80000ab8 +80000aac: 5d4012ef jal x5,80002080 +80000ab0: 80000aa0 .word 0x80000aa0 +80000ab4: 80005416 .word 0x80005416 +80000ab8: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc8872) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x5bbc8872 +80000abc: 0000a983 lw x19,0(x1) +80000ac0: 00408093 addi x1,x1,4 + +80000ac4 : +Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc8872: + sm3p1 x6, x19 # perform operation +80000ac4: 10999313 sm3p1 x6,x19 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc8872, Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc8872_str) +80000ac8: 0007a203 lw x4,0(x15) +80000acc: 00620863 beq x4,x6,80000adc +80000ad0: 5b0012ef jal x5,80002080 +80000ad4: 80000ac4 .word 0x80000ac4 +80000ad8: 80005457 .word 0x80005457 +80000adc: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xaaaaaaaa +80000ae0: 0000a403 lw x8,0(x1) +80000ae4: 00408093 addi x1,x1,4 + +80000ae8 : +Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaa: + sm3p1 x21, x8 # perform operation +80000ae8: 10941a93 sm3p1 x21,x8 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaa, Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaa_str) +80000aec: 0007a203 lw x4,0(x15) +80000af0: 01520863 beq x4,x21,80000b00 +80000af4: 58c012ef jal x5,80002080 +80000af8: 80000ae8 .word 0x80000ae8 +80000afc: 80005498 .word 0x80005498 +80000b00: 00478793 addi x15,x15,4 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x55555555) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x55555555 +80000b04: 0000ae83 lw x29,0(x1) +80000b08: 00408093 addi x1,x1,4 + +80000b0c : +Zksh_sm3p1_cg_cp_rs1_edges_0x55555555: + sm3p1 x2, x29 # perform operation +80000b0c: 109e9113 sm3p1 x2,x29 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksh_sm3p1_cg_cp_rs1_edges_0x55555555, Zksh_sm3p1_cg_cp_rs1_edges_0x55555555_str) +80000b10: 0007a203 lw x4,0(x15) +80000b14: 00220863 beq x4,x2,80000b24 +80000b18: 568012ef jal x5,80002080 +80000b1c: 80000b0c .word 0x80000b0c +80000b20: 800054d9 .word 0x800054d9 +80000b24: 00478793 addi x15,x15,4 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x5f5dd3d8 +80000b28: 0000a003 lw x0,0(x1) +80000b2c: 00408093 addi x1,x1,4 + +80000b30 : +Zksh_sm3p1_cg_cmp_rd_rs1_b0: + sm3p1 x0, x0 # perform operation +80000b30: 10901013 sm3p1 x0,x0 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zksh_sm3p1_cg_cmp_rd_rs1_b0, Zksh_sm3p1_cg_cmp_rd_rs1_b0_str) +80000b34: 0007a203 lw x4,0(x15) +80000b38: 00020863 beq x4,x0,80000b48 +80000b3c: 544012ef jal x5,80002080 +80000b40: 80000b30 .word 0x80000b30 +80000b44: 8000551a .word 0x8000551a +80000b48: 00478793 addi x15,x15,4 + + mv x20, x1 # switch data pointer register to avoid conflict with test +80000b4c: 00008a13 addi x20,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x8022fcb8 +80000b50: 000a2083 lw x1,0(x20) +80000b54: 004a0a13 addi x20,x20,4 + +80000b58 : +Zksh_sm3p1_cg_cmp_rd_rs1_b1: + sm3p1 x1, x1 # perform operation +80000b58: 10909093 sm3p1 x1,x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksh_sm3p1_cg_cmp_rd_rs1_b1, Zksh_sm3p1_cg_cmp_rd_rs1_b1_str) +80000b5c: 0007a203 lw x4,0(x15) +80000b60: 00120863 beq x4,x1,80000b70 +80000b64: 51c012ef jal x5,80002080 +80000b68: 80000b58 .word 0x80000b58 +80000b6c: 80005551 .word 0x80005551 +80000b70: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xbc319cb7 +80000b74: 000a2103 lw x2,0(x20) +80000b78: 004a0a13 addi x20,x20,4 + +80000b7c : +Zksh_sm3p1_cg_cmp_rd_rs1_b2: + sm3p1 x2, x2 # perform operation +80000b7c: 10911113 sm3p1 x2,x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksh_sm3p1_cg_cmp_rd_rs1_b2, Zksh_sm3p1_cg_cmp_rd_rs1_b2_str) +80000b80: 0007a203 lw x4,0(x15) +80000b84: 00220863 beq x4,x2,80000b94 +80000b88: 4f8012ef jal x5,80002080 +80000b8c: 80000b7c .word 0x80000b7c +80000b90: 80005588 .word 0x80005588 +80000b94: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xf34a360c +80000b98: 000a2183 lw x3,0(x20) +80000b9c: 004a0a13 addi x20,x20,4 + +80000ba0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b3: + sm3p1 x3, x3 # perform operation +80000ba0: 10919193 sm3p1 x3,x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksh_sm3p1_cg_cmp_rd_rs1_b3, Zksh_sm3p1_cg_cmp_rd_rs1_b3_str) +80000ba4: 0007a203 lw x4,0(x15) +80000ba8: 00320863 beq x4,x3,80000bb8 +80000bac: 4d4012ef jal x5,80002080 +80000bb0: 80000ba0 .word 0x80000ba0 +80000bb4: 800055bf .word 0x800055bf +80000bb8: 00478793 addi x15,x15,4 + + mv x13, x4 # switch temp register to avoid conflict with test +80000bbc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test +80000bc0: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xf7951d1b +80000bc4: 000a2203 lw x4,0(x20) +80000bc8: 004a0a13 addi x20,x20,4 + +80000bcc : +Zksh_sm3p1_cg_cmp_rd_rs1_b4: + sm3p1 x4, x4 # perform operation +80000bcc: 10921213 sm3p1 x4,x4 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zksh_sm3p1_cg_cmp_rd_rs1_b4, Zksh_sm3p1_cg_cmp_rd_rs1_b4_str) +80000bd0: 0007a683 lw x13,0(x15) +80000bd4: 00468863 beq x13,x4,80000be4 +80000bd8: 4e80176f jal x14,800020c0 +80000bdc: 80000bcc .word 0x80000bcc +80000be0: 800055f6 .word 0x800055f6 +80000be4: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x2cad2394 +80000be8: 000a2283 lw x5,0(x20) +80000bec: 004a0a13 addi x20,x20,4 + +80000bf0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b5: + sm3p1 x5, x5 # perform operation +80000bf0: 10929293 sm3p1 x5,x5 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zksh_sm3p1_cg_cmp_rd_rs1_b5, Zksh_sm3p1_cg_cmp_rd_rs1_b5_str) +80000bf4: 0007a683 lw x13,0(x15) +80000bf8: 00568863 beq x13,x5,80000c08 +80000bfc: 4c40176f jal x14,800020c0 +80000c00: 80000bf0 .word 0x80000bf0 +80000c04: 8000562d .word 0x8000562d +80000c08: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xc7dcd368 +80000c0c: 000a2303 lw x6,0(x20) +80000c10: 004a0a13 addi x20,x20,4 + +80000c14 : +Zksh_sm3p1_cg_cmp_rd_rs1_b6: + sm3p1 x6, x6 # perform operation +80000c14: 10931313 sm3p1 x6,x6 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zksh_sm3p1_cg_cmp_rd_rs1_b6, Zksh_sm3p1_cg_cmp_rd_rs1_b6_str) +80000c18: 0007a683 lw x13,0(x15) +80000c1c: 00668863 beq x13,x6,80000c2c +80000c20: 4a00176f jal x14,800020c0 +80000c24: 80000c14 .word 0x80000c14 +80000c28: 80005664 .word 0x80005664 +80000c2c: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xba4aa309 +80000c30: 000a2383 lw x7,0(x20) +80000c34: 004a0a13 addi x20,x20,4 + +80000c38 : +Zksh_sm3p1_cg_cmp_rd_rs1_b7: + sm3p1 x7, x7 # perform operation +80000c38: 10939393 sm3p1 x7,x7 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zksh_sm3p1_cg_cmp_rd_rs1_b7, Zksh_sm3p1_cg_cmp_rd_rs1_b7_str) +80000c3c: 0007a683 lw x13,0(x15) +80000c40: 00768863 beq x13,x7,80000c50 +80000c44: 47c0176f jal x14,800020c0 +80000c48: 80000c38 .word 0x80000c38 +80000c4c: 8000569b .word 0x8000569b +80000c50: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x47450e65 +80000c54: 000a2403 lw x8,0(x20) +80000c58: 004a0a13 addi x20,x20,4 + +80000c5c : +Zksh_sm3p1_cg_cmp_rd_rs1_b8: + sm3p1 x8, x8 # perform operation +80000c5c: 10941413 sm3p1 x8,x8 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zksh_sm3p1_cg_cmp_rd_rs1_b8, Zksh_sm3p1_cg_cmp_rd_rs1_b8_str) +80000c60: 0007a683 lw x13,0(x15) +80000c64: 00868863 beq x13,x8,80000c74 +80000c68: 4580176f jal x14,800020c0 +80000c6c: 80000c5c .word 0x80000c5c +80000c70: 800056d2 .word 0x800056d2 +80000c74: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xb7268eea +80000c78: 000a2483 lw x9,0(x20) +80000c7c: 004a0a13 addi x20,x20,4 + +80000c80 : +Zksh_sm3p1_cg_cmp_rd_rs1_b9: + sm3p1 x9, x9 # perform operation +80000c80: 10949493 sm3p1 x9,x9 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zksh_sm3p1_cg_cmp_rd_rs1_b9, Zksh_sm3p1_cg_cmp_rd_rs1_b9_str) +80000c84: 0007a683 lw x13,0(x15) +80000c88: 00968863 beq x13,x9,80000c98 +80000c8c: 4340176f jal x14,800020c0 +80000c90: 80000c80 .word 0x80000c80 +80000c94: 80005709 .word 0x80005709 +80000c98: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xd29d2f69 +80000c9c: 000a2503 lw x10,0(x20) +80000ca0: 004a0a13 addi x20,x20,4 + +80000ca4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b10: + sm3p1 x10, x10 # perform operation +80000ca4: 10951513 sm3p1 x10,x10 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zksh_sm3p1_cg_cmp_rd_rs1_b10, Zksh_sm3p1_cg_cmp_rd_rs1_b10_str) +80000ca8: 0007a683 lw x13,0(x15) +80000cac: 00a68863 beq x13,x10,80000cbc +80000cb0: 4100176f jal x14,800020c0 +80000cb4: 80000ca4 .word 0x80000ca4 +80000cb8: 80005740 .word 0x80005740 +80000cbc: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xd3e39c5a +80000cc0: 000a2583 lw x11,0(x20) +80000cc4: 004a0a13 addi x20,x20,4 + +80000cc8 : +Zksh_sm3p1_cg_cmp_rd_rs1_b11: + sm3p1 x11, x11 # perform operation +80000cc8: 10959593 sm3p1 x11,x11 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zksh_sm3p1_cg_cmp_rd_rs1_b11, Zksh_sm3p1_cg_cmp_rd_rs1_b11_str) +80000ccc: 0007a683 lw x13,0(x15) +80000cd0: 00b68863 beq x13,x11,80000ce0 +80000cd4: 3ec0176f jal x14,800020c0 +80000cd8: 80000cc8 .word 0x80000cc8 +80000cdc: 80005778 .word 0x80005778 +80000ce0: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xb63c1e68 +80000ce4: 000a2603 lw x12,0(x20) +80000ce8: 004a0a13 addi x20,x20,4 + +80000cec : +Zksh_sm3p1_cg_cmp_rd_rs1_b12: + sm3p1 x12, x12 # perform operation +80000cec: 10961613 sm3p1 x12,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zksh_sm3p1_cg_cmp_rd_rs1_b12, Zksh_sm3p1_cg_cmp_rd_rs1_b12_str) +80000cf0: 0007a683 lw x13,0(x15) +80000cf4: 00c68863 beq x13,x12,80000d04 +80000cf8: 3c80176f jal x14,800020c0 +80000cfc: 80000cec .word 0x80000cec +80000d00: 800057b0 .word 0x800057b0 +80000d04: 00478793 addi x15,x15,4 + + mv x7, x13 # switch temp register to avoid conflict with test +80000d08: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test +80000d0c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x9dda2777 +80000d10: 000a2683 lw x13,0(x20) +80000d14: 004a0a13 addi x20,x20,4 + +80000d18 : +Zksh_sm3p1_cg_cmp_rd_rs1_b13: + sm3p1 x13, x13 # perform operation +80000d18: 10969693 sm3p1 x13,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zksh_sm3p1_cg_cmp_rd_rs1_b13, Zksh_sm3p1_cg_cmp_rd_rs1_b13_str) +80000d1c: 0007a383 lw x7,0(x15) +80000d20: 00d38863 beq x7,x13,80000d30 +80000d24: 3740146f jal x8,80002098 +80000d28: 80000d18 .word 0x80000d18 +80000d2c: 800057e8 .word 0x800057e8 +80000d30: 00478793 addi x15,x15,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xf9422ec1 +80000d34: 000a2703 lw x14,0(x20) +80000d38: 004a0a13 addi x20,x20,4 + +80000d3c : +Zksh_sm3p1_cg_cmp_rd_rs1_b14: + sm3p1 x14, x14 # perform operation +80000d3c: 10971713 sm3p1 x14,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zksh_sm3p1_cg_cmp_rd_rs1_b14, Zksh_sm3p1_cg_cmp_rd_rs1_b14_str) +80000d40: 0007a383 lw x7,0(x15) +80000d44: 00e38863 beq x7,x14,80000d54 +80000d48: 3500146f jal x8,80002098 +80000d4c: 80000d3c .word 0x80000d3c +80000d50: 80005820 .word 0x80005820 +80000d54: 00478793 addi x15,x15,4 + + mv x11, x15 # switch signature pointer register to avoid conflict with test +80000d58: 00078593 addi x11,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x96d5f0d0 +80000d5c: 000a2783 lw x15,0(x20) +80000d60: 004a0a13 addi x20,x20,4 + +80000d64 : +Zksh_sm3p1_cg_cmp_rd_rs1_b15: + sm3p1 x15, x15 # perform operation +80000d64: 10979793 sm3p1 x15,x15 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zksh_sm3p1_cg_cmp_rd_rs1_b15, Zksh_sm3p1_cg_cmp_rd_rs1_b15_str) +80000d68: 0005a383 lw x7,0(x11) +80000d6c: 00f38863 beq x7,x15,80000d7c +80000d70: 3280146f jal x8,80002098 +80000d74: 80000d64 .word 0x80000d64 +80000d78: 80005858 .word 0x80005858 +80000d7c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x445fdf92 +80000d80: 000a2803 lw x16,0(x20) +80000d84: 004a0a13 addi x20,x20,4 + +80000d88 : +Zksh_sm3p1_cg_cmp_rd_rs1_b16: + sm3p1 x16, x16 # perform operation +80000d88: 10981813 sm3p1 x16,x16 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zksh_sm3p1_cg_cmp_rd_rs1_b16, Zksh_sm3p1_cg_cmp_rd_rs1_b16_str) +80000d8c: 0005a383 lw x7,0(x11) +80000d90: 01038863 beq x7,x16,80000da0 +80000d94: 3040146f jal x8,80002098 +80000d98: 80000d88 .word 0x80000d88 +80000d9c: 80005890 .word 0x80005890 +80000da0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xb3b5367a +80000da4: 000a2883 lw x17,0(x20) +80000da8: 004a0a13 addi x20,x20,4 + +80000dac : +Zksh_sm3p1_cg_cmp_rd_rs1_b17: + sm3p1 x17, x17 # perform operation +80000dac: 10989893 sm3p1 x17,x17 + # Check if x17 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x17, Zksh_sm3p1_cg_cmp_rd_rs1_b17, Zksh_sm3p1_cg_cmp_rd_rs1_b17_str) +80000db0: 0005a383 lw x7,0(x11) +80000db4: 01138863 beq x7,x17,80000dc4 +80000db8: 2e00146f jal x8,80002098 +80000dbc: 80000dac .word 0x80000dac +80000dc0: 800058c8 .word 0x800058c8 +80000dc4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x67158a6c +80000dc8: 000a2903 lw x18,0(x20) +80000dcc: 004a0a13 addi x20,x20,4 + +80000dd0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b18: + sm3p1 x18, x18 # perform operation +80000dd0: 10991913 sm3p1 x18,x18 + # Check if x18 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x18, Zksh_sm3p1_cg_cmp_rd_rs1_b18, Zksh_sm3p1_cg_cmp_rd_rs1_b18_str) +80000dd4: 0005a383 lw x7,0(x11) +80000dd8: 01238863 beq x7,x18,80000de8 +80000ddc: 2bc0146f jal x8,80002098 +80000de0: 80000dd0 .word 0x80000dd0 +80000de4: 80005900 .word 0x80005900 +80000de8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xcd93534b +80000dec: 000a2983 lw x19,0(x20) +80000df0: 004a0a13 addi x20,x20,4 + +80000df4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b19: + sm3p1 x19, x19 # perform operation +80000df4: 10999993 sm3p1 x19,x19 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zksh_sm3p1_cg_cmp_rd_rs1_b19, Zksh_sm3p1_cg_cmp_rd_rs1_b19_str) +80000df8: 0005a383 lw x7,0(x11) +80000dfc: 01338863 beq x7,x19,80000e0c +80000e00: 2980146f jal x8,80002098 +80000e04: 80000df4 .word 0x80000df4 +80000e08: 80005938 .word 0x80005938 +80000e0c: 00458593 addi x11,x11,4 + + mv x30, x20 # switch data pointer register to avoid conflict with test +80000e10: 000a0f13 addi x30,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x1a0ff136 +80000e14: 000f2a03 lw x20,0(x30) +80000e18: 004f0f13 addi x30,x30,4 + +80000e1c : +Zksh_sm3p1_cg_cmp_rd_rs1_b20: + sm3p1 x20, x20 # perform operation +80000e1c: 109a1a13 sm3p1 x20,x20 + # Check if x20 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x20, Zksh_sm3p1_cg_cmp_rd_rs1_b20, Zksh_sm3p1_cg_cmp_rd_rs1_b20_str) +80000e20: 0005a383 lw x7,0(x11) +80000e24: 01438863 beq x7,x20,80000e34 +80000e28: 2700146f jal x8,80002098 +80000e2c: 80000e1c .word 0x80000e1c +80000e30: 80005970 .word 0x80005970 +80000e34: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x946a63ef +80000e38: 000f2a83 lw x21,0(x30) +80000e3c: 004f0f13 addi x30,x30,4 + +80000e40 : +Zksh_sm3p1_cg_cmp_rd_rs1_b21: + sm3p1 x21, x21 # perform operation +80000e40: 109a9a93 sm3p1 x21,x21 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zksh_sm3p1_cg_cmp_rd_rs1_b21, Zksh_sm3p1_cg_cmp_rd_rs1_b21_str) +80000e44: 0005a383 lw x7,0(x11) +80000e48: 01538863 beq x7,x21,80000e58 +80000e4c: 24c0146f jal x8,80002098 +80000e50: 80000e40 .word 0x80000e40 +80000e54: 800059a8 .word 0x800059a8 +80000e58: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x94b16a9a +80000e5c: 000f2b03 lw x22,0(x30) +80000e60: 004f0f13 addi x30,x30,4 + +80000e64 : +Zksh_sm3p1_cg_cmp_rd_rs1_b22: + sm3p1 x22, x22 # perform operation +80000e64: 109b1b13 sm3p1 x22,x22 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zksh_sm3p1_cg_cmp_rd_rs1_b22, Zksh_sm3p1_cg_cmp_rd_rs1_b22_str) +80000e68: 0005a383 lw x7,0(x11) +80000e6c: 01638863 beq x7,x22,80000e7c +80000e70: 2280146f jal x8,80002098 +80000e74: 80000e64 .word 0x80000e64 +80000e78: 800059e0 .word 0x800059e0 +80000e7c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xce09f618 +80000e80: 000f2b83 lw x23,0(x30) +80000e84: 004f0f13 addi x30,x30,4 + +80000e88 : +Zksh_sm3p1_cg_cmp_rd_rs1_b23: + sm3p1 x23, x23 # perform operation +80000e88: 109b9b93 sm3p1 x23,x23 + # Check if x23 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x23, Zksh_sm3p1_cg_cmp_rd_rs1_b23, Zksh_sm3p1_cg_cmp_rd_rs1_b23_str) +80000e8c: 0005a383 lw x7,0(x11) +80000e90: 01738863 beq x7,x23,80000ea0 +80000e94: 2040146f jal x8,80002098 +80000e98: 80000e88 .word 0x80000e88 +80000e9c: 80005a18 .word 0x80005a18 +80000ea0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0xb5a1cd3d +80000ea4: 000f2c03 lw x24,0(x30) +80000ea8: 004f0f13 addi x30,x30,4 + +80000eac : +Zksh_sm3p1_cg_cmp_rd_rs1_b24: + sm3p1 x24, x24 # perform operation +80000eac: 109c1c13 sm3p1 x24,x24 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zksh_sm3p1_cg_cmp_rd_rs1_b24, Zksh_sm3p1_cg_cmp_rd_rs1_b24_str) +80000eb0: 0005a383 lw x7,0(x11) +80000eb4: 01838863 beq x7,x24,80000ec4 +80000eb8: 1e00146f jal x8,80002098 +80000ebc: 80000eac .word 0x80000eac +80000ec0: 80005a51 .word 0x80005a51 +80000ec4: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xf2731e24 +80000ec8: 000f2c83 lw x25,0(x30) +80000ecc: 004f0f13 addi x30,x30,4 + +80000ed0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b25: + sm3p1 x25, x25 # perform operation +80000ed0: 109c9c93 sm3p1 x25,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zksh_sm3p1_cg_cmp_rd_rs1_b25, Zksh_sm3p1_cg_cmp_rd_rs1_b25_str) +80000ed4: 0005a383 lw x7,0(x11) +80000ed8: 01938863 beq x7,x25,80000ee8 +80000edc: 1bc0146f jal x8,80002098 +80000ee0: 80000ed0 .word 0x80000ed0 +80000ee4: 80005a8a .word 0x80005a8a +80000ee8: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xa7b22dc6 +80000eec: 000f2d03 lw x26,0(x30) +80000ef0: 004f0f13 addi x30,x30,4 + +80000ef4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b26: + sm3p1 x26, x26 # perform operation +80000ef4: 109d1d13 sm3p1 x26,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zksh_sm3p1_cg_cmp_rd_rs1_b26, Zksh_sm3p1_cg_cmp_rd_rs1_b26_str) +80000ef8: 0005a383 lw x7,0(x11) +80000efc: 01a38863 beq x7,x26,80000f0c +80000f00: 1980146f jal x8,80002098 +80000f04: 80000ef4 .word 0x80000ef4 +80000f08: 80005ac3 .word 0x80005ac3 +80000f0c: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x76600099 +80000f10: 000f2d83 lw x27,0(x30) +80000f14: 004f0f13 addi x30,x30,4 + +80000f18 : +Zksh_sm3p1_cg_cmp_rd_rs1_b27: + sm3p1 x27, x27 # perform operation +80000f18: 109d9d93 sm3p1 x27,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zksh_sm3p1_cg_cmp_rd_rs1_b27, Zksh_sm3p1_cg_cmp_rd_rs1_b27_str) +80000f1c: 0005a383 lw x7,0(x11) +80000f20: 01b38863 beq x7,x27,80000f30 +80000f24: 1740146f jal x8,80002098 +80000f28: 80000f18 .word 0x80000f18 +80000f2c: 80005afc .word 0x80005afc +80000f30: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x77ae09a2 +80000f34: 000f2e03 lw x28,0(x30) +80000f38: 004f0f13 addi x30,x30,4 + +80000f3c : +Zksh_sm3p1_cg_cmp_rd_rs1_b28: + sm3p1 x28, x28 # perform operation +80000f3c: 109e1e13 sm3p1 x28,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zksh_sm3p1_cg_cmp_rd_rs1_b28, Zksh_sm3p1_cg_cmp_rd_rs1_b28_str) +80000f40: 0005a383 lw x7,0(x11) +80000f44: 01c38863 beq x7,x28,80000f54 +80000f48: 1500146f jal x8,80002098 +80000f4c: 80000f3c .word 0x80000f3c +80000f50: 80005b35 .word 0x80005b35 +80000f54: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x249b71b8 +80000f58: 000f2e83 lw x29,0(x30) +80000f5c: 004f0f13 addi x30,x30,4 + +80000f60 : +Zksh_sm3p1_cg_cmp_rd_rs1_b29: + sm3p1 x29, x29 # perform operation +80000f60: 109e9e93 sm3p1 x29,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zksh_sm3p1_cg_cmp_rd_rs1_b29, Zksh_sm3p1_cg_cmp_rd_rs1_b29_str) +80000f64: 0005a383 lw x7,0(x11) +80000f68: 01d38863 beq x7,x29,80000f78 +80000f6c: 12c0146f jal x8,80002098 +80000f70: 80000f60 .word 0x80000f60 +80000f74: 80005b6e .word 0x80005b6e +80000f78: 00458593 addi x11,x11,4 + + mv x15, x30 # switch data pointer register to avoid conflict with test +80000f7c: 000f0793 addi x15,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x401f8a92 +80000f80: 0007af03 lw x30,0(x15) +80000f84: 00478793 addi x15,x15,4 + +80000f88 : +Zksh_sm3p1_cg_cmp_rd_rs1_b30: + sm3p1 x30, x30 # perform operation +80000f88: 109f1f13 sm3p1 x30,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zksh_sm3p1_cg_cmp_rd_rs1_b30, Zksh_sm3p1_cg_cmp_rd_rs1_b30_str) +80000f8c: 0005a383 lw x7,0(x11) +80000f90: 01e38863 beq x7,x30,80000fa0 +80000f94: 1040146f jal x8,80002098 +80000f98: 80000f88 .word 0x80000f88 +80000f9c: 80005ba7 .word 0x80005ba7 +80000fa0: 00458593 addi x11,x11,4 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xd195920e +80000fa4: 0007af83 lw x31,0(x15) +80000fa8: 00478793 addi x15,x15,4 + +80000fac : +Zksh_sm3p1_cg_cmp_rd_rs1_b31: + sm3p1 x31, x31 # perform operation +80000fac: 109f9f93 sm3p1 x31,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zksh_sm3p1_cg_cmp_rd_rs1_b31, Zksh_sm3p1_cg_cmp_rd_rs1_b31_str) +80000fb0: 0005a383 lw x7,0(x11) +80000fb4: 01f38863 beq x7,x31,80000fc4 +80000fb8: 0e00146f jal x8,80002098 +80000fbc: 80000fac .word 0x80000fac +80000fc0: 80005be0 .word 0x80005be0 +80000fc4: 00458593 addi x11,x11,4 + + mv x2, x11 # restore signature pointer to default register for teardown +80000fc8: 00058113 addi x2,x11,0 + +80000fcc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END +80000fcc: 00000513 addi x10,x0,0 +80000fd0: 00000073 ecall +80000fd4: fff00513 addi x10,x0,-1 +80000fd8: 1d800413 addi x8,x0,472 + +80000fdc : +80000fdc: 34002373 csrrs x6,mscratch,x0 + +80000fe0 : +80000fe0: 23832383 lw x7,568(x6) +80000fe4: 23c32483 lw x9,572(x6) + +80000fe8 : +80000fe8: 22032383 lw x7,544(x6) + +80000fec : +80000fec: 25032483 lw x9,592(x6) +80000ff0: 34049073 csrrw x0,mscratch,x9 + +80000ff4 : +80000ff4: 24832483 lw x9,584(x6) +80000ff8: 305493f3 csrrw x7,mtvec,x9 +80000ffc: ffc4f493 andi x9,x9,-4 +80001000: ffc3f393 andi x7,x7,-4 +80001004: 00749e63 bne x9,x7,80001020 + +80001008 : +80001008: 00030493 addi x9,x6,0 + +8000100c : +8000100c: 0004a783 lw x15,0(x9) +80001010: 00f3a023 sw x15,0(x7) +80001014: 00438393 addi x7,x7,4 +80001018: 00448493 addi x9,x9,4 +8000101c: fe83c8e3 blt x7,x8,8000100c +80001020: 0000100f fence.i + +80001024 : +80001024: 00000013 addi x0,x0,0 +80001028: 00000013 addi x0,x0,0 +8000102c: 00000013 addi x0,x0,0 +80001030: 00000013 addi x0,x0,0 +80001034: 00000013 addi x0,x0,0 +80001038: 00000013 addi x0,x0,0 +8000103c: 00000013 addi x0,x0,0 +80001040: 00000497 auipc x9,0x0 +80001044: 29048493 addi x9,x9,656 # 800012d0 +80001048: 00000013 addi x0,x0,0 +8000104c: 00000013 addi x0,x0,0 +80001050: 00000013 addi x0,x0,0 +80001054: 00000013 addi x0,x0,0 +80001058: 00000013 addi x0,x0,0 +8000105c: 00000013 addi x0,x0,0 +80001060: 10e49863 bne x9,x14,80001170 +80001064: 00000013 addi x0,x0,0 +80001068: 00000013 addi x0,x0,0 +8000106c: 00000013 addi x0,x0,0 +80001070: 00000013 addi x0,x0,0 +80001074: 00000013 addi x0,x0,0 +80001078: 00000013 addi x0,x0,0 +8000107c: 00000013 addi x0,x0,0 +80001080: 00005517 auipc x10,0x5 +80001084: 21f50513 addi x10,x10,543 # 8000629f +80001088: 00000013 addi x0,x0,0 +8000108c: 00000013 addi x0,x0,0 +80001090: 00000013 addi x0,x0,0 +80001094: 00000013 addi x0,x0,0 +80001098: 00000013 addi x0,x0,0 +8000109c: 00000013 addi x0,x0,0 +800010a0: 00016097 auipc x1,0x16 +800010a4: 4c4080e7 jalr x1,1220(x1) # 80017564 +800010a8: 00000013 addi x0,x0,0 +800010ac: 00000013 addi x0,x0,0 +800010b0: 00000013 addi x0,x0,0 +800010b4: 00000013 addi x0,x0,0 +800010b8: 00000013 addi x0,x0,0 +800010bc: 00000013 addi x0,x0,0 +800010c0: 00005517 auipc x10,0x5 +800010c4: 21950513 addi x10,x10,537 # 800062d9 +800010c8: 00000013 addi x0,x0,0 +800010cc: 00000013 addi x0,x0,0 +800010d0: 00000013 addi x0,x0,0 +800010d4: 00000013 addi x0,x0,0 +800010d8: 00000013 addi x0,x0,0 +800010dc: 00000013 addi x0,x0,0 +800010e0: 00016097 auipc x1,0x16 +800010e4: 484080e7 jalr x1,1156(x1) # 80017564 +800010e8: 00000013 addi x0,x0,0 +800010ec: 00000013 addi x0,x0,0 +800010f0: 00000013 addi x0,x0,0 +800010f4: 00000013 addi x0,x0,0 +800010f8: 00000013 addi x0,x0,0 +800010fc: 00000013 addi x0,x0,0 +80001100: 00005517 auipc x10,0x5 +80001104: 23950513 addi x10,x10,569 # 80006339 +80001108: 00000013 addi x0,x0,0 +8000110c: 00000013 addi x0,x0,0 +80001110: 00000013 addi x0,x0,0 +80001114: 00000013 addi x0,x0,0 +80001118: 00000013 addi x0,x0,0 +8000111c: 00000013 addi x0,x0,0 +80001120: 00016097 auipc x1,0x16 +80001124: 444080e7 jalr x1,1092(x1) # 80017564 +80001128: 00000013 addi x0,x0,0 +8000112c: 00000013 addi x0,x0,0 +80001130: 00000013 addi x0,x0,0 +80001134: 00000013 addi x0,x0,0 +80001138: 00000013 addi x0,x0,0 +8000113c: 00000013 addi x0,x0,0 +80001140: 00006517 auipc x10,0x6 +80001144: da450513 addi x10,x10,-604 # 80006ee4 +80001148: 00000013 addi x0,x0,0 +8000114c: 00000013 addi x0,x0,0 +80001150: 00000013 addi x0,x0,0 +80001154: 00000013 addi x0,x0,0 +80001158: 00000013 addi x0,x0,0 +8000115c: 00000013 addi x0,x0,0 +80001160: 00016097 auipc x1,0x16 +80001164: 404080e7 jalr x1,1028(x1) # 80017564 +80001168: 00016097 auipc x1,0x16 +8000116c: 45c080e7 jalr x1,1116(x1) # 800175c4 + +80001170 : +80001170: 00000013 addi x0,x0,0 +80001174: 00000013 addi x0,x0,0 +80001178: 00000013 addi x0,x0,0 +8000117c: 00000013 addi x0,x0,0 +80001180: 00003317 auipc x6,0x3 +80001184: 1a830313 addi x6,x6,424 # 80004328 +80001188: 00000013 addi x0,x0,0 +8000118c: 00000013 addi x0,x0,0 +80001190: 00000013 addi x0,x0,0 +80001194: 00000013 addi x0,x0,0 +80001198: 00000013 addi x0,x0,0 +8000119c: 00000013 addi x0,x0,0 +800011a0: 00032303 lw x6,0(x6) +800011a4: 00000013 addi x0,x0,0 +800011a8: 00000013 addi x0,x0,0 +800011ac: 00000013 addi x0,x0,0 +800011b0: 00000013 addi x0,x0,0 +800011b4: 00000013 addi x0,x0,0 +800011b8: 00000013 addi x0,x0,0 +800011bc: 00000013 addi x0,x0,0 +800011c0: 00007397 auipc x7,0x7 +800011c4: 98838393 addi x7,x7,-1656 # 80007b48 +800011c8: 00000013 addi x0,x0,0 +800011cc: 00000013 addi x0,x0,0 +800011d0: 00000013 addi x0,x0,0 +800011d4: 00000013 addi x0,x0,0 +800011d8: 00000013 addi x0,x0,0 +800011dc: 00000013 addi x0,x0,0 +800011e0: 40730333 sub x6,x6,x7 +800011e4: 00000013 addi x0,x0,0 +800011e8: 00000013 addi x0,x0,0 +800011ec: 00000013 addi x0,x0,0 +800011f0: 00000013 addi x0,x0,0 +800011f4: 00000013 addi x0,x0,0 +800011f8: 00000013 addi x0,x0,0 +800011fc: 00000013 addi x0,x0,0 +80001200: 00007417 auipc x8,0x7 +80001204: 94040413 addi x8,x8,-1728 # 80007b40 +80001208: 00000013 addi x0,x0,0 +8000120c: 00000013 addi x0,x0,0 +80001210: 00000013 addi x0,x0,0 +80001214: 00000013 addi x0,x0,0 +80001218: 00000013 addi x0,x0,0 +8000121c: 00000013 addi x0,x0,0 +80001220: 00042203 lw x4,0(x8) +80001224: 00620863 beq x4,x6,80001234 +80001228: 6c1003ef jal x7,800020e8 +8000122c: 80001170 .word 0x80001170 +80001230: 8000648d .word 0x8000648d + +80001234 : +80001234: bad0e4b7 lui x9,0xbad0e +80001238: ead48493 addi x9,x9,-339 # bad0dead <_end+0x3acf5ead> +8000123c: 00e49a63 bne x9,x14,80001250 +80001240: 6a9003ef jal x7,800020e8 +80001244: 80001304 .word 0x80001304 +80001248: 800062fb .word 0x800062fb +8000124c: 00000341 .word 0x00000341 + +80001250 : +80001250: 00000013 addi x0,x0,0 +80001254: 00000013 addi x0,x0,0 +80001258: 00000013 addi x0,x0,0 +8000125c: 00000013 addi x0,x0,0 +80001260: 00005517 auipc x10,0x5 +80001264: 00450513 addi x10,x10,4 # 80006264 +80001268: 00000013 addi x0,x0,0 +8000126c: 00000013 addi x0,x0,0 +80001270: 00000013 addi x0,x0,0 +80001274: 00000013 addi x0,x0,0 +80001278: 00000013 addi x0,x0,0 +8000127c: 00000013 addi x0,x0,0 +80001280: 00016097 auipc x1,0x16 +80001284: 2e4080e7 jalr x1,740(x1) # 80017564 +80001288: 00016097 auipc x1,0x16 +8000128c: 31c080e7 jalr x1,796(x1) # 800175a4 + +80001290 : +80001290: 00000013 addi x0,x0,0 +80001294: 00000013 addi x0,x0,0 +80001298: 00000013 addi x0,x0,0 +8000129c: 00000013 addi x0,x0,0 +800012a0: 00005517 auipc x10,0x5 +800012a4: fff50513 addi x10,x10,-1 # 8000629f +800012a8: 00000013 addi x0,x0,0 +800012ac: 00000013 addi x0,x0,0 +800012b0: 00000013 addi x0,x0,0 +800012b4: 00000013 addi x0,x0,0 +800012b8: 00000013 addi x0,x0,0 +800012bc: 00000013 addi x0,x0,0 +800012c0: 00016097 auipc x1,0x16 +800012c4: 2a4080e7 jalr x1,676(x1) # 80017564 +800012c8: 00016097 auipc x1,0x16 +800012cc: 2fc080e7 jalr x1,764(x1) # 800175c4 + +800012d0 : +800012d0: 00000013 addi x0,x0,0 +800012d4: 00000013 addi x0,x0,0 +800012d8: 00000013 addi x0,x0,0 +800012dc: 00000013 addi x0,x0,0 +800012e0: 00000717 auipc x14,0x0 +800012e4: ff070713 addi x14,x14,-16 # 800012d0 +800012e8: 00000013 addi x0,x0,0 +800012ec: 00000013 addi x0,x0,0 +800012f0: 00000013 addi x0,x0,0 +800012f4: 00000013 addi x0,x0,0 +800012f8: 00000013 addi x0,x0,0 +800012fc: 00000013 addi x0,x0,0 +80001300: ccdff06f jal x0,80000fcc + +80001304 : +80001304: bad0e737 lui x14,0xbad0e +80001308: ead70713 addi x14,x14,-339 # bad0dead <_end+0x3acf5ead> +8000130c: cc1ff06f jal x0,80000fcc +80001310: 00000013 addi x0,x0,0 +80001314: 00000013 addi x0,x0,0 +80001318: 00000013 addi x0,x0,0 +8000131c: 00000013 addi x0,x0,0 +80001320: 00000013 addi x0,x0,0 +80001324: 00000013 addi x0,x0,0 +80001328: 00000013 addi x0,x0,0 +8000132c: 00000013 addi x0,x0,0 +80001330: 00000013 addi x0,x0,0 +80001334: 00000013 addi x0,x0,0 +80001338: 00000013 addi x0,x0,0 +8000133c: 00000013 addi x0,x0,0 + +80001340 : +80001340: 0800006f jal x0,800013c0 +80001344: 0880006f jal x0,800013cc +80001348: 0900006f jal x0,800013d8 +8000134c: 0980006f jal x0,800013e4 +80001350: 0a00006f jal x0,800013f0 +80001354: 0a80006f jal x0,800013fc +80001358: 0b00006f jal x0,80001408 +8000135c: 0b80006f jal x0,80001414 +80001360: 0c00006f jal x0,80001420 +80001364: 0c80006f jal x0,8000142c +80001368: 0d00006f jal x0,80001438 +8000136c: 0d80006f jal x0,80001444 +80001370: 0e00006f jal x0,80001450 +80001374: 0e80006f jal x0,8000145c +80001378: 0f00006f jal x0,80001468 +8000137c: 0f80006f jal x0,80001474 +80001380: 1000006f jal x0,80001480 +80001384: 1080006f jal x0,8000148c +80001388: 1100006f jal x0,80001498 +8000138c: 1180006f jal x0,800014a4 +80001390: 1200006f jal x0,800014b0 +80001394: 1280006f jal x0,800014bc +80001398: 1300006f jal x0,800014c8 +8000139c: 1380006f jal x0,800014d4 +800013a0: 1400006f jal x0,800014e0 +800013a4: 13c0006f jal x0,800014e0 +800013a8: 1380006f jal x0,800014e0 +800013ac: 1340006f jal x0,800014e0 +800013b0: 1300006f jal x0,800014e0 +800013b4: 12c0006f jal x0,800014e0 +800013b8: 1280006f jal x0,800014e0 +800013bc: 1240006f jal x0,800014e0 + +800013c0 : +800013c0: 34011173 csrrw x2,mscratch,x2 +800013c4: 26f12823 sw x15,624(x2) +800013c8: 13c007ef jal x15,80001504 +800013cc: 34011173 csrrw x2,mscratch,x2 +800013d0: 26f12823 sw x15,624(x2) +800013d4: 130007ef jal x15,80001504 +800013d8: 34011173 csrrw x2,mscratch,x2 +800013dc: 26f12823 sw x15,624(x2) +800013e0: 124007ef jal x15,80001504 +800013e4: 34011173 csrrw x2,mscratch,x2 +800013e8: 26f12823 sw x15,624(x2) +800013ec: 118007ef jal x15,80001504 +800013f0: 34011173 csrrw x2,mscratch,x2 +800013f4: 26f12823 sw x15,624(x2) +800013f8: 10c007ef jal x15,80001504 +800013fc: 34011173 csrrw x2,mscratch,x2 +80001400: 26f12823 sw x15,624(x2) +80001404: 100007ef jal x15,80001504 +80001408: 34011173 csrrw x2,mscratch,x2 +8000140c: 26f12823 sw x15,624(x2) +80001410: 0f4007ef jal x15,80001504 +80001414: 34011173 csrrw x2,mscratch,x2 +80001418: 26f12823 sw x15,624(x2) +8000141c: 0e8007ef jal x15,80001504 +80001420: 34011173 csrrw x2,mscratch,x2 +80001424: 26f12823 sw x15,624(x2) +80001428: 0dc007ef jal x15,80001504 +8000142c: 34011173 csrrw x2,mscratch,x2 +80001430: 26f12823 sw x15,624(x2) +80001434: 0d0007ef jal x15,80001504 +80001438: 34011173 csrrw x2,mscratch,x2 +8000143c: 26f12823 sw x15,624(x2) +80001440: 0c4007ef jal x15,80001504 +80001444: 34011173 csrrw x2,mscratch,x2 +80001448: 26f12823 sw x15,624(x2) +8000144c: 0b8007ef jal x15,80001504 +80001450: 34011173 csrrw x2,mscratch,x2 +80001454: 26f12823 sw x15,624(x2) +80001458: 0ac007ef jal x15,80001504 +8000145c: 34011173 csrrw x2,mscratch,x2 +80001460: 26f12823 sw x15,624(x2) +80001464: 0a0007ef jal x15,80001504 +80001468: 34011173 csrrw x2,mscratch,x2 +8000146c: 26f12823 sw x15,624(x2) +80001470: 094007ef jal x15,80001504 +80001474: 34011173 csrrw x2,mscratch,x2 +80001478: 26f12823 sw x15,624(x2) +8000147c: 088007ef jal x15,80001504 +80001480: 34011173 csrrw x2,mscratch,x2 +80001484: 26f12823 sw x15,624(x2) +80001488: 07c007ef jal x15,80001504 +8000148c: 34011173 csrrw x2,mscratch,x2 +80001490: 26f12823 sw x15,624(x2) +80001494: 070007ef jal x15,80001504 +80001498: 34011173 csrrw x2,mscratch,x2 +8000149c: 26f12823 sw x15,624(x2) +800014a0: 064007ef jal x15,80001504 +800014a4: 34011173 csrrw x2,mscratch,x2 +800014a8: 26f12823 sw x15,624(x2) +800014ac: 058007ef jal x15,80001504 +800014b0: 34011173 csrrw x2,mscratch,x2 +800014b4: 26f12823 sw x15,624(x2) +800014b8: 04c007ef jal x15,80001504 +800014bc: 34011173 csrrw x2,mscratch,x2 +800014c0: 26f12823 sw x15,624(x2) +800014c4: 040007ef jal x15,80001504 +800014c8: 34011173 csrrw x2,mscratch,x2 +800014cc: 26f12823 sw x15,624(x2) +800014d0: 034007ef jal x15,80001504 +800014d4: 34011173 csrrw x2,mscratch,x2 +800014d8: 26f12823 sw x15,624(x2) +800014dc: 028007ef jal x15,80001504 + +800014e0 : +800014e0: 00000317 auipc x6,0x0 +800014e4: b4430313 addi x6,x6,-1212 # 80001024 +800014e8: 00000013 addi x0,x0,0 +800014ec: 00000013 addi x0,x0,0 +800014f0: 00000013 addi x0,x0,0 +800014f4: 00000013 addi x0,x0,0 +800014f8: 00000013 addi x0,x0,0 +800014fc: 00000013 addi x0,x0,0 +80001500: 00030067 jalr x0,0(x6) + +80001504 : +80001504: 26e12623 sw x14,620(x2) +80001508: 34011773 csrrw x14,mscratch,x2 +8000150c: 26e12a23 sw x14,628(x2) +80001510: 23012703 lw x14,560(x2) +80001514: 00070067 jalr x0,0(x14) + +80001518 : +80001518: 26912423 sw x9,616(x2) +8000151c: 26812223 sw x8,612(x2) +80001520: 26712023 sw x7,608(x2) +80001524: 24612e23 sw x6,604(x2) +80001528: 00000013 addi x0,x0,0 +8000152c: 00000013 addi x0,x0,0 +80001530: 00000013 addi x0,x0,0 +80001534: 00000013 addi x0,x0,0 +80001538: 00000013 addi x0,x0,0 +8000153c: 00000013 addi x0,x0,0 +80001540: 00003317 auipc x6,0x3 +80001544: bc830313 addi x6,x6,-1080 # 80004108 +80001548: 00000013 addi x0,x0,0 +8000154c: 00000013 addi x0,x0,0 +80001550: 00000013 addi x0,x0,0 +80001554: 00000013 addi x0,x0,0 +80001558: 00000013 addi x0,x0,0 +8000155c: 00000013 addi x0,x0,0 +80001560: 00032383 lw x7,0(x6) +80001564: 00138393 addi x7,x7,1 +80001568: 00732023 sw x7,0(x6) +8000156c: 34202773 csrrs x14,mcause,x0 + +80001570 : +80001570: 800014b7 lui x9,0x80001 +80001574: fff48493 addi x9,x9,-1 # 80000fff +80001578: 00e4f4b3 and x9,x9,x14 + +8000157c : +8000157c: ffe48413 addi x8,x9,-2 +80001580: 00041663 bne x8,x0,8000158c + +80001584 : +80001584: 280506e3 beq x10,x0,80002010 +80001588: 58c0006f jal x0,80001b14 + +8000158c : +8000158c: ff848413 addi x8,x9,-8 +80001590: 00245413 srli x8,x8,0x2 +80001594: 58041063 bne x8,x0,80001b14 + +80001598 : +80001598: 26050ce3 beq x10,x0,80002010 + +8000159c : +8000159c: fff50493 addi x9,x10,-1 +800015a0: 00500393 addi x7,x0,5 +800015a4: 0274e063 bltu x9,x7,800015c4 +800015a8: 07300393 addi x7,x0,115 +800015ac: 00750463 beq x10,x7,800015b4 +800015b0: 0800006f jal x0,80001630 + +800015b4 : +800015b4: 34102573 csrrs x10,mepc,x0 +800015b8: 00450413 addi x8,x10,4 +800015bc: 34141073 csrrw x0,mepc,x8 +800015c0: 7c00006f jal x0,80001d80 + +800015c4 : +800015c4: 341024f3 csrrs x9,mepc,x0 +800015c8: 00448493 addi x9,x9,4 +800015cc: 34149073 csrrw x0,mepc,x9 +800015d0: 00100393 addi x7,x0,1 +800015d4: 00750e63 beq x10,x7,800015f0 +800015d8: 00200393 addi x7,x0,2 +800015dc: 02750263 beq x10,x7,80001600 +800015e0: 00300393 addi x7,x0,3 +800015e4: 02750c63 beq x10,x7,8000161c +800015e8: fff00513 addi x10,x0,-1 +800015ec: 7940006f jal x0,80001d80 + +800015f0 : +800015f0: 000024b7 lui x9,0x2 +800015f4: 80048493 addi x9,x9,-2048 # 1800 +800015f8: 3004a073 csrrs x0,mstatus,x9 +800015fc: 7840006f jal x0,80001d80 + +80001600 : +80001600: 000024b7 lui x9,0x2 +80001604: 80048493 addi x9,x9,-2048 # 1800 +80001608: 3004b073 csrrc x0,mstatus,x9 +8000160c: 000014b7 lui x9,0x1 +80001610: 80048493 addi x9,x9,-2048 # 800 +80001614: 3004a073 csrrs x0,mstatus,x9 +80001618: 7680006f jal x0,80001d80 + +8000161c : +8000161c: 000024b7 lui x9,0x2 +80001620: 80048493 addi x9,x9,-2048 # 1800 +80001624: 3004b073 csrrc x0,mstatus,x9 +80001628: 7580006f jal x0,80001d80 + +8000162c : +8000162c: 00000013 addi x0,x0,0 + +80001630 : +80001630: 00000013 addi x0,x0,0 +80001634: 00000013 addi x0,x0,0 +80001638: 00000013 addi x0,x0,0 +8000163c: 00000013 addi x0,x0,0 +80001640: 00000397 auipc x7,0x0 +80001644: 17038393 addi x7,x7,368 # 800017b0 +80001648: 00000013 addi x0,x0,0 +8000164c: 00000013 addi x0,x0,0 +80001650: 00000013 addi x0,x0,0 +80001654: 00000013 addi x0,x0,0 +80001658: 00000013 addi x0,x0,0 +8000165c: 00000013 addi x0,x0,0 + +80001660 : +80001660: 0003a403 lw x8,0(x7) +80001664: 00a40863 beq x8,x10,80001674 +80001668: 04040863 beq x8,x0,800016b8 +8000166c: 00838393 addi x7,x7,8 +80001670: ff1ff06f jal x0,80001660 + +80001674 : +80001674: 00008493 addi x9,x1,0 +80001678: 00000013 addi x0,x0,0 +8000167c: 00000013 addi x0,x0,0 +80001680: 00000097 auipc x1,0x0 +80001684: 02408093 addi x1,x1,36 # 800016a4 +80001688: 00000013 addi x0,x0,0 +8000168c: 00000013 addi x0,x0,0 +80001690: 00000013 addi x0,x0,0 +80001694: 00000013 addi x0,x0,0 +80001698: 00000013 addi x0,x0,0 +8000169c: 00000013 addi x0,x0,0 +800016a0: 00038067 jalr x0,0(x7) + +800016a4 : +800016a4: 00048093 addi x1,x9,0 +800016a8: 34102473 csrrs x8,mepc,x0 +800016ac: 00440413 addi x8,x8,4 +800016b0: 34141073 csrrw x0,mepc,x8 +800016b4: 6cc0006f jal x0,80001d80 + +800016b8 : +800016b8: 00050493 addi x9,x10,0 +800016bc: 00000013 addi x0,x0,0 +800016c0: 00006517 auipc x10,0x6 +800016c4: 25b50513 addi x10,x10,603 # 8000791b +800016c8: 00000013 addi x0,x0,0 +800016cc: 00000013 addi x0,x0,0 +800016d0: 00000013 addi x0,x0,0 +800016d4: 00000013 addi x0,x0,0 +800016d8: 00000013 addi x0,x0,0 +800016dc: 00000013 addi x0,x0,0 +800016e0: 00016097 auipc x1,0x16 +800016e4: e84080e7 jalr x1,-380(x1) # 80017564 +800016e8: 00048513 addi x10,x9,0 +800016ec: 02000593 addi x11,x0,32 +800016f0: 4a8020ef jal x1,80003b98 +800016f4: 00000013 addi x0,x0,0 +800016f8: 00000013 addi x0,x0,0 +800016fc: 00000013 addi x0,x0,0 +80001700: 00004517 auipc x10,0x4 +80001704: 68850513 addi x10,x10,1672 # 80005d88 +80001708: 00000013 addi x0,x0,0 +8000170c: 00000013 addi x0,x0,0 +80001710: 00000013 addi x0,x0,0 +80001714: 00000013 addi x0,x0,0 +80001718: 00000013 addi x0,x0,0 +8000171c: 00000013 addi x0,x0,0 +80001720: 00016097 auipc x1,0x16 +80001724: e44080e7 jalr x1,-444(x1) # 80017564 +80001728: 00000013 addi x0,x0,0 +8000172c: 00000013 addi x0,x0,0 +80001730: 00000013 addi x0,x0,0 +80001734: 00000013 addi x0,x0,0 +80001738: 00000013 addi x0,x0,0 +8000173c: 00000013 addi x0,x0,0 +80001740: 00005517 auipc x10,0x5 +80001744: c6250513 addi x10,x10,-926 # 800063a2 +80001748: 00000013 addi x0,x0,0 +8000174c: 00000013 addi x0,x0,0 +80001750: 00000013 addi x0,x0,0 +80001754: 00000013 addi x0,x0,0 +80001758: 00000013 addi x0,x0,0 +8000175c: 00000013 addi x0,x0,0 +80001760: 00016097 auipc x1,0x16 +80001764: e04080e7 jalr x1,-508(x1) # 80017564 +80001768: 00000013 addi x0,x0,0 +8000176c: 00000013 addi x0,x0,0 +80001770: 00000013 addi x0,x0,0 +80001774: 00000013 addi x0,x0,0 +80001778: 00000013 addi x0,x0,0 +8000177c: 00000013 addi x0,x0,0 +80001780: 00005517 auipc x10,0x5 +80001784: b1f50513 addi x10,x10,-1249 # 8000629f +80001788: 00000013 addi x0,x0,0 +8000178c: 00000013 addi x0,x0,0 +80001790: 00000013 addi x0,x0,0 +80001794: 00000013 addi x0,x0,0 +80001798: 00000013 addi x0,x0,0 +8000179c: 00000013 addi x0,x0,0 +800017a0: 00016097 auipc x1,0x16 +800017a4: dc4080e7 jalr x1,-572(x1) # 80017564 +800017a8: 00016097 auipc x1,0x16 +800017ac: e1c080e7 jalr x1,-484(x1) # 800175c4 + +800017b0 : +800017b0: 30002573 .word 0x30002573 +800017b4: 00008067 jalr x0,0(x1) +800017b8: 30059073 .word 0x30059073 +800017bc: 00008067 jalr x0,0(x1) +800017c0: 3005a073 .word 0x3005a073 +800017c4: 00008067 jalr x0,0(x1) +800017c8: 3005b073 .word 0x3005b073 +800017cc: 00008067 jalr x0,0(x1) +800017d0: 30402573 .word 0x30402573 +800017d4: 00008067 jalr x0,0(x1) +800017d8: 30459073 .word 0x30459073 +800017dc: 00008067 jalr x0,0(x1) +800017e0: 3045a073 .word 0x3045a073 +800017e4: 00008067 jalr x0,0(x1) +800017e8: 3045b073 .word 0x3045b073 +800017ec: 00008067 jalr x0,0(x1) +800017f0: 30602573 .word 0x30602573 +800017f4: 00008067 jalr x0,0(x1) +800017f8: 30659073 .word 0x30659073 +800017fc: 00008067 jalr x0,0(x1) +80001800: 3065a073 .word 0x3065a073 +80001804: 00008067 jalr x0,0(x1) +80001808: 3065b073 .word 0x3065b073 +8000180c: 00008067 jalr x0,0(x1) +80001810: 30a02573 .word 0x30a02573 +80001814: 00008067 jalr x0,0(x1) +80001818: 30a59073 .word 0x30a59073 +8000181c: 00008067 jalr x0,0(x1) +80001820: 30a5a073 .word 0x30a5a073 +80001824: 00008067 jalr x0,0(x1) +80001828: 30a5b073 .word 0x30a5b073 +8000182c: 00008067 jalr x0,0(x1) +80001830: 34402573 .word 0x34402573 +80001834: 00008067 jalr x0,0(x1) +80001838: 34459073 .word 0x34459073 +8000183c: 00008067 jalr x0,0(x1) +80001840: 3445a073 .word 0x3445a073 +80001844: 00008067 jalr x0,0(x1) +80001848: 3445b073 .word 0x3445b073 +8000184c: 00008067 jalr x0,0(x1) +80001850: 74702573 .word 0x74702573 +80001854: 00008067 jalr x0,0(x1) +80001858: 74759073 .word 0x74759073 +8000185c: 00008067 jalr x0,0(x1) +80001860: 7475a073 .word 0x7475a073 +80001864: 00008067 jalr x0,0(x1) +80001868: 7475b073 .word 0x7475b073 +8000186c: 00008067 jalr x0,0(x1) +80001870: 32002573 .word 0x32002573 +80001874: 00008067 jalr x0,0(x1) +80001878: 32059073 .word 0x32059073 +8000187c: 00008067 jalr x0,0(x1) +80001880: 3205a073 .word 0x3205a073 +80001884: 00008067 jalr x0,0(x1) +80001888: 3205b073 .word 0x3205b073 +8000188c: 00008067 jalr x0,0(x1) +80001890: b0002573 .word 0xb0002573 +80001894: 00008067 jalr x0,0(x1) +80001898: b0059073 .word 0xb0059073 +8000189c: 00008067 jalr x0,0(x1) +800018a0: b005a073 .word 0xb005a073 +800018a4: 00008067 jalr x0,0(x1) +800018a8: b005b073 .word 0xb005b073 +800018ac: 00008067 jalr x0,0(x1) +800018b0: b0202573 .word 0xb0202573 +800018b4: 00008067 jalr x0,0(x1) +800018b8: b0259073 .word 0xb0259073 +800018bc: 00008067 jalr x0,0(x1) +800018c0: b025a073 .word 0xb025a073 +800018c4: 00008067 jalr x0,0(x1) +800018c8: b025b073 .word 0xb025b073 +800018cc: 00008067 jalr x0,0(x1) +800018d0: 10002573 .word 0x10002573 +800018d4: 00008067 jalr x0,0(x1) +800018d8: 10059073 .word 0x10059073 +800018dc: 00008067 jalr x0,0(x1) +800018e0: 1005a073 .word 0x1005a073 +800018e4: 00008067 jalr x0,0(x1) +800018e8: 1005b073 .word 0x1005b073 +800018ec: 00008067 jalr x0,0(x1) +800018f0: 10402573 .word 0x10402573 +800018f4: 00008067 jalr x0,0(x1) +800018f8: 10459073 .word 0x10459073 +800018fc: 00008067 jalr x0,0(x1) +80001900: 1045a073 .word 0x1045a073 +80001904: 00008067 jalr x0,0(x1) +80001908: 1045b073 .word 0x1045b073 +8000190c: 00008067 jalr x0,0(x1) +80001910: 10602573 .word 0x10602573 +80001914: 00008067 jalr x0,0(x1) +80001918: 10659073 .word 0x10659073 +8000191c: 00008067 jalr x0,0(x1) +80001920: 1065a073 .word 0x1065a073 +80001924: 00008067 jalr x0,0(x1) +80001928: 1065b073 .word 0x1065b073 +8000192c: 00008067 jalr x0,0(x1) +80001930: 10a02573 .word 0x10a02573 +80001934: 00008067 jalr x0,0(x1) +80001938: 10a59073 .word 0x10a59073 +8000193c: 00008067 jalr x0,0(x1) +80001940: 10a5a073 .word 0x10a5a073 +80001944: 00008067 jalr x0,0(x1) +80001948: 10a5b073 .word 0x10a5b073 +8000194c: 00008067 jalr x0,0(x1) +80001950: 14402573 .word 0x14402573 +80001954: 00008067 jalr x0,0(x1) +80001958: 14459073 .word 0x14459073 +8000195c: 00008067 jalr x0,0(x1) +80001960: 1445a073 .word 0x1445a073 +80001964: 00008067 jalr x0,0(x1) +80001968: 1445b073 .word 0x1445b073 +8000196c: 00008067 jalr x0,0(x1) +80001970: 14d02573 .word 0x14d02573 +80001974: 00008067 jalr x0,0(x1) +80001978: 14d59073 .word 0x14d59073 +8000197c: 00008067 jalr x0,0(x1) +80001980: 14d5a073 .word 0x14d5a073 +80001984: 00008067 jalr x0,0(x1) +80001988: 14d5b073 .word 0x14d5b073 +8000198c: 00008067 jalr x0,0(x1) +80001990: 18002573 .word 0x18002573 +80001994: 00008067 jalr x0,0(x1) +80001998: 18059073 .word 0x18059073 +8000199c: 00008067 jalr x0,0(x1) +800019a0: 1805a073 .word 0x1805a073 +800019a4: 00008067 jalr x0,0(x1) +800019a8: 1805b073 .word 0x1805b073 +800019ac: 00008067 jalr x0,0(x1) +800019b0: 7a002573 .word 0x7a002573 +800019b4: 00008067 jalr x0,0(x1) +800019b8: 7a059073 .word 0x7a059073 +800019bc: 00008067 jalr x0,0(x1) +800019c0: 7a05a073 .word 0x7a05a073 +800019c4: 00008067 jalr x0,0(x1) +800019c8: 7a05b073 .word 0x7a05b073 +800019cc: 00008067 jalr x0,0(x1) +800019d0: 7a102573 .word 0x7a102573 +800019d4: 00008067 jalr x0,0(x1) +800019d8: 7a159073 .word 0x7a159073 +800019dc: 00008067 jalr x0,0(x1) +800019e0: 7a15a073 .word 0x7a15a073 +800019e4: 00008067 jalr x0,0(x1) +800019e8: 7a15b073 .word 0x7a15b073 +800019ec: 00008067 jalr x0,0(x1) +800019f0: 7a202573 .word 0x7a202573 +800019f4: 00008067 jalr x0,0(x1) +800019f8: 7a259073 .word 0x7a259073 +800019fc: 00008067 jalr x0,0(x1) +80001a00: 7a25a073 .word 0x7a25a073 +80001a04: 00008067 jalr x0,0(x1) +80001a08: 7a25b073 .word 0x7a25b073 +80001a0c: 00008067 jalr x0,0(x1) +80001a10: 7a302573 .word 0x7a302573 +80001a14: 00008067 jalr x0,0(x1) +80001a18: 7a359073 .word 0x7a359073 +80001a1c: 00008067 jalr x0,0(x1) +80001a20: 7a35a073 .word 0x7a35a073 +80001a24: 00008067 jalr x0,0(x1) +80001a28: 7a35b073 .word 0x7a35b073 +80001a2c: 00008067 jalr x0,0(x1) +80001a30: 7a402573 .word 0x7a402573 +80001a34: 00008067 jalr x0,0(x1) +80001a38: 7a459073 .word 0x7a459073 +80001a3c: 00008067 jalr x0,0(x1) +80001a40: 7a45a073 .word 0x7a45a073 +80001a44: 00008067 jalr x0,0(x1) +80001a48: 7a45b073 .word 0x7a45b073 +80001a4c: 00008067 jalr x0,0(x1) +80001a50: 7a502573 .word 0x7a502573 +80001a54: 00008067 jalr x0,0(x1) +80001a58: 7a559073 .word 0x7a559073 +80001a5c: 00008067 jalr x0,0(x1) +80001a60: 7a55a073 .word 0x7a55a073 +80001a64: 00008067 jalr x0,0(x1) +80001a68: 7a55b073 .word 0x7a55b073 +80001a6c: 00008067 jalr x0,0(x1) +80001a70: 7a802573 .word 0x7a802573 +80001a74: 00008067 jalr x0,0(x1) +80001a78: 7a859073 .word 0x7a859073 +80001a7c: 00008067 jalr x0,0(x1) +80001a80: 7a85a073 .word 0x7a85a073 +80001a84: 00008067 jalr x0,0(x1) +80001a88: 7a85b073 .word 0x7a85b073 +80001a8c: 00008067 jalr x0,0(x1) +80001a90: 7aa02573 .word 0x7aa02573 +80001a94: 00008067 jalr x0,0(x1) +80001a98: 7aa59073 .word 0x7aa59073 +80001a9c: 00008067 jalr x0,0(x1) +80001aa0: 7aa5a073 .word 0x7aa5a073 +80001aa4: 00008067 jalr x0,0(x1) +80001aa8: 7aa5b073 .word 0x7aa5b073 +80001aac: 00008067 jalr x0,0(x1) +80001ab0: 5a802573 .word 0x5a802573 +80001ab4: 00008067 jalr x0,0(x1) +80001ab8: 5a859073 .word 0x5a859073 +80001abc: 00008067 jalr x0,0(x1) +80001ac0: 5a85a073 .word 0x5a85a073 +80001ac4: 00008067 jalr x0,0(x1) +80001ac8: 5a85b073 .word 0x5a85b073 +80001acc: 00008067 jalr x0,0(x1) +80001ad0: 6a802573 .word 0x6a802573 +80001ad4: 00008067 jalr x0,0(x1) +80001ad8: 6a859073 .word 0x6a859073 +80001adc: 00008067 jalr x0,0(x1) +80001ae0: 6a85a073 .word 0x6a85a073 +80001ae4: 00008067 jalr x0,0(x1) +80001ae8: 6a85b073 .word 0x6a85b073 +80001aec: 00008067 jalr x0,0(x1) +80001af0: 0005a503 lw x10,0(x11) +80001af4: 00008067 jalr x0,0(x1) +80001af8: 0045a503 lw x10,4(x11) +80001afc: 00008067 jalr x0,0(x1) +80001b00: 00c5a023 sw x12,0(x11) +80001b04: 00008067 jalr x0,0(x1) +80001b08: 00c5a223 sw x12,4(x11) +80001b0c: 00008067 jalr x0,0(x1) +80001b10: 00000000 .word 0x00000000 + +80001b14 : +80001b14: 01000393 addi x7,x0,16 +80001b18: 00075c63 bge x14,x0,80001b30 + +80001b1c : +80001b1c: 00171413 slli x8,x14,0x1 +80001b20: ff240413 addi x8,x8,-14 +80001b24: 00045663 bge x8,x0,80001b30 +80001b28: 00c00393 addi x7,x0,12 +80001b2c: 0040006f jal x0,80001b30 + +80001b30 : +80001b30: d6810113 addi x2,x2,-664 +80001b34: 4b012303 lw x6,1200(x2) +80001b38: 007304b3 add x9,x6,x7 +80001b3c: 4a912823 sw x9,1200(x2) +80001b40: 49012403 lw x8,1168(x2) +80001b44: 40830333 sub x6,x6,x8 +80001b48: 29810113 addi x2,x2,664 +80001b4c: 1f812403 lw x8,504(x2) +80001b50: 00830333 add x6,x6,x8 +80001b54: 34102473 csrrs x8,mepc,x0 +80001b58: 00000013 addi x0,x0,0 +80001b5c: 00000013 addi x0,x0,0 +80001b60: 00004497 auipc x9,0x4 +80001b64: 20848493 addi x9,x9,520 # 80005d68 +80001b68: 00000013 addi x0,x0,0 +80001b6c: 00000013 addi x0,x0,0 +80001b70: 00000013 addi x0,x0,0 +80001b74: 00000013 addi x0,x0,0 +80001b78: 00000013 addi x0,x0,0 +80001b7c: 00000013 addi x0,x0,0 +80001b80: 0084a023 sw x8,0(x9) +80001b84: 00e4a423 sw x14,8(x9) +80001b88: 34302473 csrrs x8,mtval,x0 +80001b8c: 0084a823 sw x8,16(x9) +80001b90: 30002473 csrrs x8,mstatus,x0 +80001b94: 0084ac23 sw x8,24(x9) +80001b98: 00000013 addi x0,x0,0 +80001b9c: 00000013 addi x0,x0,0 +80001ba0: 00015417 auipc x8,0x15 +80001ba4: a0c40413 addi x8,x8,-1524 # 800165ac +80001ba8: 00000013 addi x0,x0,0 +80001bac: 00000013 addi x0,x0,0 +80001bb0: 00000013 addi x0,x0,0 +80001bb4: 00000013 addi x0,x0,0 +80001bb8: 00000013 addi x0,x0,0 +80001bbc: 00000013 addi x0,x0,0 +80001bc0: 007304b3 add x9,x6,x7 +80001bc4: f0946663 bltu x8,x9,800012d0 + +80001bc8 : +80001bc8: 24012403 lw x8,576(x2) +80001bcc: 408787b3 sub x15,x15,x8 +80001bd0: 00179493 slli x9,x15,0x1 +80001bd4: 009787b3 add x15,x15,x9 +80001bd8: 0057d793 srli x15,x15,0x5 +80001bdc: 00679793 slli x15,x15,0x6 +80001be0: 0077e7b3 or x15,x15,x7 +80001be4: 00378793 addi x15,x15,3 +80001be8: 02075a63 bge x14,x0,80001c1c +80001bec: 00f00413 addi x8,x0,15 +80001bf0: 00877433 and x8,x14,x8 +80001bf4: 304024f3 csrrs x9,mie,x0 +80001bf8: 0084d4b3 srl x9,x9,x8 +80001bfc: 0014f493 andi x9,x9,1 +80001c00: 00b49493 slli x9,x9,0xb +80001c04: 0097e7b3 or x15,x15,x9 +80001c08: 344024f3 csrrs x9,mip,x0 +80001c0c: 0084d4b3 srl x9,x9,x8 +80001c10: 0014f493 andi x9,x9,1 +80001c14: 00c49493 slli x9,x9,0xc +80001c18: 0097e7b3 or x15,x15,x9 +80001c1c: 300023f3 csrrs x7,mstatus,x0 +80001c20: 00f39393 slli x7,x7,0xf +80001c24: 0023d393 srli x7,x7,0x2 +80001c28: 0021a437 lui x8,0x21a +80001c2c: fe540413 addi x8,x8,-27 # 219fe5 +80001c30: fff44413 xori x8,x8,-1 +80001c34: 0083f433 and x8,x7,x8 +80001c38: 0087e433 or x8,x15,x8 +80001c3c: 310024f3 csrrs x9,0x310,x0 +80001c40: 1c04f493 andi x9,x9,448 +80001c44: 00849493 slli x9,x9,0x8 +80001c48: 00946433 or x8,x8,x9 +80001c4c: 00032483 lw x9,0(x6) +80001c50: 00848e63 beq x9,x8,80001c6c +80001c54: 00040313 addi x6,x8,0 +80001c58: 00048213 addi x4,x9,0 +80001c5c: 48c003ef jal x7,800020e8 +80001c60: 80001bc8 .word 0x80001bc8 +80001c64: 800064a4 .word 0x800064a4 +80001c68: 00000341 .word 0x00000341 + +80001c6c : +80001c6c: 00070413 addi x8,x14,0 +80001c70: 00432483 lw x9,4(x6) +80001c74: 00848e63 beq x9,x8,80001c90 +80001c78: 00040313 addi x6,x8,0 +80001c7c: 00048213 addi x4,x9,0 +80001c80: 468003ef jal x7,800020e8 +80001c84: 80001c6c .word 0x80001c6c +80001c88: 800065a6 .word 0x800065a6 +80001c8c: 00000341 .word 0x00000341 +80001c90: 10074863 blt x14,x0,80001da0 + +80001c94 : +80001c94: 34102473 csrrs x8,mepc,x0 +80001c98: 00010493 addi x9,x2,0 +80001c9c: 0040006f jal x0,80001ca0 + +80001ca0 : +80001ca0: 08000393 addi x7,x0,128 +80001ca4: 04740863 beq x8,x7,80001cf4 +80001ca8: 00238393 addi x7,x7,2 +80001cac: 04740463 beq x8,x7,80001cf4 +80001cb0: 04040263 beq x8,x0,80001cf4 +80001cb4: 2084a383 lw x7,520(x9) +80001cb8: 2104a783 lw x15,528(x9) +80001cbc: 007787b3 add x15,x15,x7 +80001cc0: 00f47463 bgeu x8,x15,80001cc8 +80001cc4: 02747663 bgeu x8,x7,80001cf0 + +80001cc8 : +80001cc8: 1d84a383 lw x7,472(x9) +80001ccc: 1e04a783 lw x15,480(x9) +80001cd0: 007787b3 add x15,x15,x7 +80001cd4: 00f47463 bgeu x8,x15,80001cdc +80001cd8: 00747c63 bgeu x8,x7,80001cf0 + +80001cdc : +80001cdc: 1e84a383 lw x7,488(x9) +80001ce0: 1f04a783 lw x15,496(x9) +80001ce4: 007787b3 add x15,x15,x7 +80001ce8: e0f47e63 bgeu x8,x15,80001304 +80001cec: e0746c63 bltu x8,x7,80001304 + +80001cf0 : +80001cf0: 40740433 sub x8,x8,x7 + +80001cf4 : +80001cf4: 00832483 lw x9,8(x6) +80001cf8: 00848e63 beq x9,x8,80001d14 +80001cfc: 00040313 addi x6,x8,0 +80001d00: 00048213 addi x4,x9,0 +80001d04: 3e4003ef jal x7,800020e8 +80001d08: 80001cf4 .word 0x80001cf4 +80001d0c: 800066a1 .word 0x800066a1 +80001d10: 00000341 .word 0x00000341 + +80001d14 : +80001d14: 34102473 csrrs x8,mepc,x0 +80001d18: 342023f3 csrrs x7,mcause,x0 +80001d1c: 00c00793 addi x15,x0,12 +80001d20: 00f38a63 beq x7,x15,80001d34 +80001d24: 00100793 addi x15,x0,1 +80001d28: 00f38663 beq x7,x15,80001d34 +80001d2c: 01400793 addi x15,x0,20 +80001d30: 00f39663 bne x7,x15,80001d3c +80001d34: 34109073 csrrw x0,mepc,x1 +80001d38: 0100006f jal x0,80001d48 + +80001d3c : +80001d3c: 00400393 addi x7,x0,4 +80001d40: 00740433 add x8,x8,x7 +80001d44: 34141073 csrrw x0,mepc,x8 + +80001d48 : +80001d48: 34302473 csrrs x8,mtval,x0 + +80001d4c : +80001d4c: 00c32483 lw x9,12(x6) +80001d50: 00848e63 beq x9,x8,80001d6c +80001d54: 00040313 addi x6,x8,0 +80001d58: 00048213 addi x4,x9,0 +80001d5c: 38c003ef jal x7,800020e8 +80001d60: 80001d4c .word 0x80001d4c +80001d64: 80006794 .word 0x80006794 +80001d68: 00000341 .word 0x00000341 + +80001d6c : +80001d6c: 30102473 csrrs x8,misa,x0 +80001d70: 01841413 slli x8,x8,0x18 +80001d74: 00045263 bge x8,x0,80001d78 + +80001d78 : +80001d78: 10000393 addi x7,x0,256 +80001d7c: 05c0006f jal x0,80001dd8 + +80001d80 : +80001d80: 25c12303 lw x6,604(x2) +80001d84: 26012383 lw x7,608(x2) +80001d88: 26412403 lw x8,612(x2) +80001d8c: 26812483 lw x9,616(x2) +80001d90: 26c12703 lw x14,620(x2) +80001d94: 27012783 lw x15,624(x2) +80001d98: 27412103 lw x2,628(x2) +80001d9c: 30200073 mret + +80001da0 : +80001da0: 00100413 addi x8,x0,1 +80001da4: 01f77393 andi x7,x14,31 +80001da8: 00741433 sll x8,x8,x7 +80001dac: 304434f3 csrrc x9,mie,x8 +80001db0: 34443473 csrrc x8,mip,x8 + +80001db4 : +80001db4: 00832483 lw x9,8(x6) +80001db8: 00848e63 beq x9,x8,80001dd4 +80001dbc: 00040313 addi x6,x8,0 +80001dc0: 00048213 addi x4,x9,0 +80001dc4: 324003ef jal x7,800020e8 +80001dc8: 80001db4 .word 0x80001db4 +80001dcc: 80006907 .word 0x80006907 +80001dd0: 00000341 .word 0x00000341 +80001dd4: 00000393 addi x7,x0,0 + +80001dd8 : +80001dd8: 00000417 auipc x8,0x0 +80001ddc: 03c40413 addi x8,x8,60 # 80001e14 +80001de0: 00740433 add x8,x8,x7 +80001de4: 00371393 slli x7,x14,0x3 +80001de8: 00740433 add x8,x8,x7 +80001dec: ff847413 andi x8,x8,-8 +80001df0: 00042403 lw x8,0(x8) + +80001df4 : +80001df4: 00040a63 beq x8,x0,80001e08 +80001df8: 01f41393 slli x7,x8,0x1f +80001dfc: 0003d863 bge x7,x0,80001e0c +80001e00: 00145413 srli x8,x8,0x1 +80001e04: f6870ee3 beq x14,x8,80001d80 +80001e08: cfcff06f jal x0,80001304 + +80001e0c : +80001e0c: 00040067 jalr x0,0(x8) + +80001e10 : + ... +80001e18: 00000001 .word 0x00000001 +80001e1c: 00000000 .word 0x00000000 +80001e20: 00000001 .word 0x00000001 +80001e24: 00000000 .word 0x00000000 +80001e28: 80017000 .word 0x80017000 + ... +80001e38: 00000001 .word 0x00000001 +80001e3c: 00000000 .word 0x00000000 +80001e40: 00000001 .word 0x00000001 +80001e44: 00000000 .word 0x00000000 +80001e48: 80017014 .word 0x80017014 + ... +80001e58: 00000001 .word 0x00000001 +80001e5c: 00000000 .word 0x00000000 +80001e60: 00000001 .word 0x00000001 +80001e64: 00000000 .word 0x00000000 +80001e68: 80017030 .word 0x80017030 +80001e6c: 00000000 .word 0x00000000 +80001e70: 00000001 .word 0x00000001 +80001e74: 00000000 .word 0x00000000 +80001e78: 00000001 .word 0x00000001 +80001e7c: 00000000 .word 0x00000000 +80001e80: 00000001 .word 0x00000001 +80001e84: 00000000 .word 0x00000000 +80001e88: 00000001 .word 0x00000001 +80001e8c: 00000000 .word 0x00000000 +80001e90: 00000001 .word 0x00000001 +80001e94: 00000000 .word 0x00000000 +80001e98: 00000001 .word 0x00000001 +80001e9c: 00000000 .word 0x00000000 +80001ea0: 00000001 .word 0x00000001 +80001ea4: 00000000 .word 0x00000000 +80001ea8: 00000001 .word 0x00000001 +80001eac: 00000000 .word 0x00000000 +80001eb0: 00000001 .word 0x00000001 +80001eb4: 00000000 .word 0x00000000 +80001eb8: 00000001 .word 0x00000001 +80001ebc: 00000000 .word 0x00000000 +80001ec0: 00000001 .word 0x00000001 +80001ec4: 00000000 .word 0x00000000 +80001ec8: 00000001 .word 0x00000001 + ... + +80001f10 : +80001f10: 00000001 .word 0x00000001 +80001f14: 00000000 .word 0x00000000 +80001f18: 00000003 .word 0x00000003 +80001f1c: 00000000 .word 0x00000000 +80001f20: 00000005 .word 0x00000005 +80001f24: 00000000 .word 0x00000000 +80001f28: 00000007 .word 0x00000007 +80001f2c: 00000000 .word 0x00000000 +80001f30: 00000009 .word 0x00000009 +80001f34: 00000000 .word 0x00000000 +80001f38: 0000000b .word 0x0000000b +80001f3c: 00000000 .word 0x00000000 +80001f40: 0000000d .word 0x0000000d +80001f44: 00000000 .word 0x00000000 +80001f48: 0000000f .word 0x0000000f +80001f4c: 00000000 .word 0x00000000 +80001f50: 00000011 .word 0x00000011 +80001f54: 00000000 .word 0x00000000 +80001f58: 00000013 .word 0x00000013 +80001f5c: 00000000 .word 0x00000000 +80001f60: 00000015 .word 0x00000015 +80001f64: 00000000 .word 0x00000000 +80001f68: 00000017 .word 0x00000017 +80001f6c: 00000000 .word 0x00000000 +80001f70: 00000019 .word 0x00000019 +80001f74: 00000000 .word 0x00000000 +80001f78: 0000001b .word 0x0000001b +80001f7c: 00000000 .word 0x00000000 +80001f80: 0000001d .word 0x0000001d +80001f84: 00000000 .word 0x00000000 +80001f88: 0000001f .word 0x0000001f +80001f8c: 00000000 .word 0x00000000 +80001f90: 00000021 .word 0x00000021 +80001f94: 00000000 .word 0x00000000 +80001f98: 00000023 .word 0x00000023 +80001f9c: 00000000 .word 0x00000000 +80001fa0: 00000025 .word 0x00000025 +80001fa4: 00000000 .word 0x00000000 +80001fa8: 00000027 .word 0x00000027 +80001fac: 00000000 .word 0x00000000 +80001fb0: 00000029 .word 0x00000029 +80001fb4: 00000000 .word 0x00000000 +80001fb8: 0000002b .word 0x0000002b +80001fbc: 00000000 .word 0x00000000 +80001fc0: 0000002d .word 0x0000002d +80001fc4: 00000000 .word 0x00000000 +80001fc8: 0000002f .word 0x0000002f + ... + +80002010 : +80002010: 300023f3 csrrs x7,mstatus,x0 +80002014: 00b3d493 srli x9,x7,0xb +80002018: 0034f493 andi x9,x9,3 +8000201c: ffd48413 addi x8,x9,-3 +80002020: 341023f3 csrrs x7,mepc,x0 +80002024: 00000493 addi x9,x0,0 +80002028: 02040c63 beq x8,x0,80002060 +8000202c: 29810113 addi x2,x2,664 +80002030: 310023f3 csrrs x7,0x310,x0 +80002034: 01839393 slli x7,x7,0x18 +80002038: 0003da63 bge x7,x0,8000204c + +8000203c : +8000203c: 29810113 addi x2,x2,664 +80002040: 47012783 lw x15,1136(x2) +80002044: d6810113 addi x2,x2,-664 +80002048: 0080006f jal x0,80002050 + +8000204c : +8000204c: f4012783 lw x15,-192(x2) +80002050: 341023f3 csrrs x7,mepc,x0 +80002054: 40f383b3 sub x7,x7,x15 +80002058: d6810113 addi x2,x2,-664 +8000205c: 1d812483 lw x9,472(x2) + +80002060 : +80002060: 007483b3 add x7,x9,x7 +80002064: 25c12303 lw x6,604(x2) +80002068: 26412403 lw x8,612(x2) +8000206c: 26812483 lw x9,616(x2) +80002070: 26c12703 lw x14,620(x2) +80002074: 27012783 lw x15,624(x2) +80002078: 27412103 lw x2,628(x2) +8000207c: 00438067 jalr x0,4(x7) + +80002080 : +80002080: 00004217 auipc x4,0x4 +80002084: ba020213 addi x4,x4,-1120 # 80005c20 +80002088: 02522423 sw x5,40(x4) # 28 +8000208c: 00122423 sw x1,8(x4) # 8 +80002090: 00022023 sw x0,0(x4) # 0 +80002094: 0880006f jal x0,8000211c + +80002098 : +80002098: 00004397 auipc x7,0x4 +8000209c: b8838393 addi x7,x7,-1144 # 80005c20 +800020a0: 0483a023 sw x8,64(x7) +800020a4: 0243a023 sw x4,32(x7) +800020a8: 0253a423 sw x5,40(x7) +800020ac: 0013a423 sw x1,8(x7) +800020b0: 0003a023 sw x0,0(x7) +800020b4: 00038213 addi x4,x7,0 +800020b8: 00040293 addi x5,x8,0 +800020bc: 0600006f jal x0,8000211c + +800020c0 : +800020c0: 00004697 auipc x13,0x4 +800020c4: b6068693 addi x13,x13,-1184 # 80005c20 +800020c8: 06e6a823 sw x14,112(x13) +800020cc: 0246a023 sw x4,32(x13) +800020d0: 0256a423 sw x5,40(x13) +800020d4: 0016a423 sw x1,8(x13) +800020d8: 0006a023 sw x0,0(x13) +800020dc: 00068213 addi x4,x13,0 +800020e0: 00070293 addi x5,x14,0 +800020e4: 0380006f jal x0,8000211c + +800020e8 : +800020e8: 00004497 auipc x9,0x4 +800020ec: b3848493 addi x9,x9,-1224 # 80005c20 +800020f0: 0674a423 sw x7,104(x9) +800020f4: 0244a023 sw x4,32(x9) +800020f8: 0254a423 sw x5,40(x9) +800020fc: 0014a423 sw x1,8(x9) +80002100: 00300093 addi x1,x0,3 +80002104: 0014a023 sw x1,0(x9) +80002108: 1064a823 sw x6,272(x9) +8000210c: 1044ac23 sw x4,280(x9) +80002110: 00048213 addi x4,x9,0 +80002114: 00038293 addi x5,x7,0 +80002118: 0040006f jal x0,8000211c + +8000211c : +8000211c: 00222823 sw x2,16(x4) # 10 +80002120: 00322c23 sw x3,24(x4) # 18 +80002124: 02622823 sw x6,48(x4) # 30 +80002128: 02722c23 sw x7,56(x4) # 38 +8000212c: 04822023 sw x8,64(x4) # 40 +80002130: 04922423 sw x9,72(x4) # 48 +80002134: 04a22823 sw x10,80(x4) # 50 +80002138: 04b22c23 sw x11,88(x4) # 58 +8000213c: 06c22023 sw x12,96(x4) # 60 +80002140: 06d22423 sw x13,104(x4) # 68 +80002144: 06e22823 sw x14,112(x4) # 70 +80002148: 06f22c23 sw x15,120(x4) # 78 +8000214c: 09022023 sw x16,128(x4) # 80 +80002150: 09122423 sw x17,136(x4) # 88 +80002154: 09222823 sw x18,144(x4) # 90 +80002158: 09322c23 sw x19,152(x4) # 98 +8000215c: 0b422023 sw x20,160(x4) # a0 +80002160: 0b522423 sw x21,168(x4) # a8 +80002164: 0b622823 sw x22,176(x4) # b0 +80002168: 0b722c23 sw x23,184(x4) # b8 +8000216c: 0d822023 sw x24,192(x4) # c0 +80002170: 0d922423 sw x25,200(x4) # c8 +80002174: 0da22823 sw x26,208(x4) # d0 +80002178: 0db22c23 sw x27,216(x4) # d8 +8000217c: 0fc22023 sw x28,224(x4) # e0 +80002180: 0fd22423 sw x29,232(x4) # e8 +80002184: 0fe22823 sw x30,240(x4) # f0 +80002188: 0ff22c23 sw x31,248(x4) # f8 + +8000218c : +8000218c: 00004497 auipc x9,0x4 +80002190: a944a483 lw x9,-1388(x9) # 80005c20 +80002194: 00300513 addi x10,x0,3 +80002198: 18a48a63 beq x9,x10,8000232c + +8000219c : +8000219c: ffa2d303 lhu x6,-6(x5) +800021a0: ff82d383 lhu x7,-8(x5) +800021a4: 01031313 slli x6,x6,0x10 +800021a8: 00736333 or x6,x6,x7 +800021ac: 00f35393 srli x7,x6,0xf +800021b0: 01f3f393 andi x7,x7,31 +800021b4: 01435413 srli x8,x6,0x14 +800021b8: 01f47413 andi x8,x8,31 +800021bc: 10822223 sw x8,260(x4) # 104 +800021c0: 00341313 slli x6,x8,0x3 +800021c4: 00620333 add x6,x4,x6 +800021c8: 00032303 lw x6,0(x6) +800021cc: 10622823 sw x6,272(x4) # 110 +800021d0: ff62d303 lhu x6,-10(x5) +800021d4: ff42d383 lhu x7,-12(x5) +800021d8: 01031313 slli x6,x6,0x10 +800021dc: 00736333 or x6,x6,x7 +800021e0: 00030513 addi x10,x6,0 +800021e4: 07f37413 andi x8,x6,127 +800021e8: 00300493 addi x9,x0,3 +800021ec: 0c941463 bne x8,x9,800022b4 +800021f0: 00c35413 srli x8,x6,0xc +800021f4: 00747413 andi x8,x8,7 +800021f8: 00200493 addi x9,x0,2 +800021fc: 0a941c63 bne x8,x9,800022b4 +80002200: 41435393 srai x7,x6,0x14 +80002204: 00f35313 srli x6,x6,0xf +80002208: 01f37313 andi x6,x6,31 +8000220c: 00331313 slli x6,x6,0x3 +80002210: 00620333 add x6,x4,x6 +80002214: 00032303 lw x6,0(x6) +80002218: 00730333 add x6,x6,x7 +8000221c: 00337413 andi x8,x6,3 +80002220: 0c041663 bne x8,x0,800022ec +80002224: 00000013 addi x0,x0,0 +80002228: 00000013 addi x0,x0,0 +8000222c: 00000013 addi x0,x0,0 +80002230: 00000013 addi x0,x0,0 +80002234: 00000013 addi x0,x0,0 +80002238: 00000013 addi x0,x0,0 +8000223c: 00000013 addi x0,x0,0 +80002240: 00005417 auipc x8,0x5 +80002244: 72040413 addi x8,x8,1824 # 80007960 +80002248: 00000013 addi x0,x0,0 +8000224c: 00000013 addi x0,x0,0 +80002250: 00000013 addi x0,x0,0 +80002254: 00000013 addi x0,x0,0 +80002258: 00000013 addi x0,x0,0 +8000225c: 00000013 addi x0,x0,0 +80002260: 08836663 bltu x6,x8,800022ec +80002264: 00000013 addi x0,x0,0 +80002268: 00000013 addi x0,x0,0 +8000226c: 00000013 addi x0,x0,0 +80002270: 00000013 addi x0,x0,0 +80002274: 00000013 addi x0,x0,0 +80002278: 00000013 addi x0,x0,0 +8000227c: 00000013 addi x0,x0,0 +80002280: 00014417 auipc x8,0x14 +80002284: 33040413 addi x8,x8,816 # 800165b0 +80002288: 00000013 addi x0,x0,0 +8000228c: 00000013 addi x0,x0,0 +80002290: 00000013 addi x0,x0,0 +80002294: 00000013 addi x0,x0,0 +80002298: 00000013 addi x0,x0,0 +8000229c: 00000013 addi x0,x0,0 +800022a0: ffc40413 addi x8,x8,-4 +800022a4: 04646463 bltu x8,x6,800022ec +800022a8: 00032303 lw x6,0(x6) +800022ac: 10622c23 sw x6,280(x4) # 118 +800022b0: 3700006f jal x0,80002620 + +800022b4 : +800022b4: 00100413 addi x8,x0,1 +800022b8: 00000013 addi x0,x0,0 +800022bc: 00000013 addi x0,x0,0 +800022c0: 00004497 auipc x9,0x4 +800022c4: a8848493 addi x9,x9,-1400 # 80005d48 +800022c8: 00000013 addi x0,x0,0 +800022cc: 00000013 addi x0,x0,0 +800022d0: 00000013 addi x0,x0,0 +800022d4: 00000013 addi x0,x0,0 +800022d8: 00000013 addi x0,x0,0 +800022dc: 00000013 addi x0,x0,0 +800022e0: 0084a023 sw x8,0(x9) +800022e4: 10a22c23 sw x10,280(x4) # 118 +800022e8: 3380006f jal x0,80002620 + +800022ec : +800022ec: 00200413 addi x8,x0,2 +800022f0: 00000013 addi x0,x0,0 +800022f4: 00000013 addi x0,x0,0 +800022f8: 00000013 addi x0,x0,0 +800022fc: 00000013 addi x0,x0,0 +80002300: 00004497 auipc x9,0x4 +80002304: a4848493 addi x9,x9,-1464 # 80005d48 +80002308: 00000013 addi x0,x0,0 +8000230c: 00000013 addi x0,x0,0 +80002310: 00000013 addi x0,x0,0 +80002314: 00000013 addi x0,x0,0 +80002318: 00000013 addi x0,x0,0 +8000231c: 00000013 addi x0,x0,0 +80002320: 0084a023 sw x8,0(x9) +80002324: 10622c23 sw x6,280(x4) # 118 +80002328: 2f80006f jal x0,80002620 + +8000232c : +8000232c: 0042a303 lw x6,4(x5) +80002330: 00004817 auipc x16,0x4 +80002334: a2880813 addi x16,x16,-1496 # 80005d58 +80002338: 00682023 sw x6,0(x16) +8000233c: 0002a303 lw x6,0(x5) +80002340: 10622423 sw x6,264(x4) # 108 +80002344: 00004817 auipc x16,0x4 +80002348: a1480813 addi x16,x16,-1516 # 80005d58 +8000234c: 00082303 lw x6,0(x16) +80002350: 00004397 auipc x7,0x4 +80002354: 13d38393 addi x7,x7,317 # 8000648d +80002358: 28730463 beq x6,x7,800025e0 +8000235c: 00000413 addi x8,x0,0 +80002360: 00004817 auipc x16,0x4 +80002364: 9f080813 addi x16,x16,-1552 # 80005d50 +80002368: 00882023 sw x8,0(x16) +8000236c: 00004397 auipc x7,0x4 +80002370: 13838393 addi x7,x7,312 # 800064a4 +80002374: 00731863 bne x6,x7,80002384 +80002378: 00100413 addi x8,x0,1 +8000237c: 00000493 addi x9,x0,0 +80002380: 2740006f jal x0,800025f4 +80002384: 00004397 auipc x7,0x4 +80002388: 22238393 addi x7,x7,546 # 800065a6 +8000238c: 00731863 bne x6,x7,8000239c +80002390: 00200413 addi x8,x0,2 +80002394: 00000493 addi x9,x0,0 +80002398: 25c0006f jal x0,800025f4 +8000239c: 00004397 auipc x7,0x4 +800023a0: 30538393 addi x7,x7,773 # 800066a1 +800023a4: 00731863 bne x6,x7,800023b4 +800023a8: 00300413 addi x8,x0,3 +800023ac: 00000493 addi x9,x0,0 +800023b0: 2440006f jal x0,800025f4 +800023b4: 00004397 auipc x7,0x4 +800023b8: 3e038393 addi x7,x7,992 # 80006794 +800023bc: 00731863 bne x6,x7,800023cc +800023c0: 00400413 addi x8,x0,4 +800023c4: 00000493 addi x9,x0,0 +800023c8: 22c0006f jal x0,800025f4 +800023cc: 00004397 auipc x7,0x4 +800023d0: 53b38393 addi x7,x7,1339 # 80006907 +800023d4: 00731863 bne x6,x7,800023e4 +800023d8: 00500413 addi x8,x0,5 +800023dc: 00000493 addi x9,x0,0 +800023e0: 2140006f jal x0,800025f4 +800023e4: 00004397 auipc x7,0x4 +800023e8: 4a738393 addi x7,x7,1191 # 8000688b +800023ec: 00731863 bne x6,x7,800023fc +800023f0: 00600413 addi x8,x0,6 +800023f4: 00000493 addi x9,x0,0 +800023f8: 1fc0006f jal x0,800025f4 +800023fc: 00004397 auipc x7,0x4 +80002400: 4cd38393 addi x7,x7,1229 # 800068c9 +80002404: 00731863 bne x6,x7,80002414 +80002408: 00700413 addi x8,x0,7 +8000240c: 00000493 addi x9,x0,0 +80002410: 1e40006f jal x0,800025f4 +80002414: 00004397 auipc x7,0x4 +80002418: 0d038393 addi x7,x7,208 # 800064e4 +8000241c: 00731863 bne x6,x7,8000242c +80002420: 00100413 addi x8,x0,1 +80002424: 00100493 addi x9,x0,1 +80002428: 1cc0006f jal x0,800025f4 +8000242c: 00004397 auipc x7,0x4 +80002430: 1b838393 addi x7,x7,440 # 800065e4 +80002434: 00731863 bne x6,x7,80002444 +80002438: 00200413 addi x8,x0,2 +8000243c: 00100493 addi x9,x0,1 +80002440: 1b40006f jal x0,800025f4 +80002444: 00004397 auipc x7,0x4 +80002448: 29938393 addi x7,x7,665 # 800066dd +8000244c: 00731863 bne x6,x7,8000245c +80002450: 00300413 addi x8,x0,3 +80002454: 00100493 addi x9,x0,1 +80002458: 19c0006f jal x0,800025f4 +8000245c: 00004397 auipc x7,0x4 +80002460: 37538393 addi x7,x7,885 # 800067d1 +80002464: 00731863 bne x6,x7,80002474 +80002468: 00400413 addi x8,x0,4 +8000246c: 00100493 addi x9,x0,1 +80002470: 1840006f jal x0,800025f4 +80002474: 00004397 auipc x7,0x4 +80002478: 4ce38393 addi x7,x7,1230 # 80006942 +8000247c: 00731863 bne x6,x7,8000248c +80002480: 00500413 addi x8,x0,5 +80002484: 00100493 addi x9,x0,1 +80002488: 16c0006f jal x0,800025f4 +8000248c: 00004397 auipc x7,0x4 +80002490: 09838393 addi x7,x7,152 # 80006524 +80002494: 00731863 bne x6,x7,800024a4 +80002498: 00100413 addi x8,x0,1 +8000249c: 00200493 addi x9,x0,2 +800024a0: 1540006f jal x0,800025f4 +800024a4: 00004397 auipc x7,0x4 +800024a8: 17e38393 addi x7,x7,382 # 80006622 +800024ac: 00731863 bne x6,x7,800024bc +800024b0: 00200413 addi x8,x0,2 +800024b4: 00200493 addi x9,x0,2 +800024b8: 13c0006f jal x0,800025f4 +800024bc: 00004397 auipc x7,0x4 +800024c0: 25d38393 addi x7,x7,605 # 80006719 +800024c4: 00731863 bne x6,x7,800024d4 +800024c8: 00300413 addi x8,x0,3 +800024cc: 00200493 addi x9,x0,2 +800024d0: 1240006f jal x0,800025f4 +800024d4: 00004397 auipc x7,0x4 +800024d8: 33a38393 addi x7,x7,826 # 8000680e +800024dc: 00731863 bne x6,x7,800024ec +800024e0: 00400413 addi x8,x0,4 +800024e4: 00200493 addi x9,x0,2 +800024e8: 10c0006f jal x0,800025f4 +800024ec: 00004397 auipc x7,0x4 +800024f0: 49138393 addi x7,x7,1169 # 8000697d +800024f4: 00731863 bne x6,x7,80002504 +800024f8: 00500413 addi x8,x0,5 +800024fc: 00200493 addi x9,x0,2 +80002500: 0f40006f jal x0,800025f4 +80002504: 00004397 auipc x7,0x4 +80002508: 06138393 addi x7,x7,97 # 80006565 +8000250c: 00731863 bne x6,x7,8000251c +80002510: 00100413 addi x8,x0,1 +80002514: 00300493 addi x9,x0,3 +80002518: 0dc0006f jal x0,800025f4 +8000251c: 00004397 auipc x7,0x4 +80002520: 14538393 addi x7,x7,325 # 80006661 +80002524: 00731863 bne x6,x7,80002534 +80002528: 00200413 addi x8,x0,2 +8000252c: 00300493 addi x9,x0,3 +80002530: 0c40006f jal x0,800025f4 +80002534: 00004397 auipc x7,0x4 +80002538: 22238393 addi x7,x7,546 # 80006756 +8000253c: 00731863 bne x6,x7,8000254c +80002540: 00300413 addi x8,x0,3 +80002544: 00300493 addi x9,x0,3 +80002548: 0ac0006f jal x0,800025f4 +8000254c: 00004397 auipc x7,0x4 +80002550: 30038393 addi x7,x7,768 # 8000684c +80002554: 00731863 bne x6,x7,80002564 +80002558: 00400413 addi x8,x0,4 +8000255c: 00300493 addi x9,x0,3 +80002560: 0940006f jal x0,800025f4 +80002564: 00004397 auipc x7,0x4 +80002568: 45538393 addi x7,x7,1109 # 800069b9 +8000256c: 00731863 bne x6,x7,8000257c +80002570: 00500413 addi x8,x0,5 +80002574: 00300493 addi x9,x0,3 +80002578: 07c0006f jal x0,800025f4 +8000257c: 00004397 auipc x7,0x4 +80002580: 47a38393 addi x7,x7,1146 # 800069f6 +80002584: 00731863 bne x6,x7,80002594 +80002588: 00800413 addi x8,x0,8 +8000258c: 00000493 addi x9,x0,0 +80002590: 0640006f jal x0,800025f4 +80002594: 00004397 auipc x7,0x4 +80002598: 4b138393 addi x7,x7,1201 # 80006a45 +8000259c: 00731863 bne x6,x7,800025ac +800025a0: 00800413 addi x8,x0,8 +800025a4: 00000493 addi x9,x0,0 +800025a8: 04c0006f jal x0,800025f4 +800025ac: 00004397 auipc x7,0x4 +800025b0: 59438393 addi x7,x7,1428 # 80006b40 +800025b4: 00731863 bne x6,x7,800025c4 +800025b8: 00800413 addi x8,x0,8 +800025bc: 00100493 addi x9,x0,1 +800025c0: 0340006f jal x0,800025f4 +800025c4: 00004397 auipc x7,0x4 +800025c8: 67838393 addi x7,x7,1656 # 80006c3c +800025cc: 00731863 bne x6,x7,800025dc +800025d0: 00800413 addi x8,x0,8 +800025d4: 00200493 addi x9,x0,2 +800025d8: 01c0006f jal x0,800025f4 +800025dc: 0340006f jal x0,80002610 + +800025e0 : +800025e0: 00900413 addi x8,x0,9 +800025e4: 00003817 auipc x16,0x3 +800025e8: 76c80813 addi x16,x16,1900 # 80005d50 +800025ec: 00882023 sw x8,0(x16) +800025f0: 0300006f jal x0,80002620 + +800025f4 : +800025f4: 00003817 auipc x16,0x3 +800025f8: 75c80813 addi x16,x16,1884 # 80005d50 +800025fc: 00882023 sw x8,0(x16) +80002600: 00003817 auipc x16,0x3 +80002604: 75480813 addi x16,x16,1876 # 80005d54 +80002608: 00982023 sw x9,0(x16) +8000260c: 0140006f jal x0,80002620 + +80002610 : +80002610: 00003817 auipc x16,0x3 +80002614: 74080813 addi x16,x16,1856 # 80005d50 +80002618: 00082023 sw x0,0(x16) +8000261c: 0040006f jal x0,80002620 + +80002620 : +80002620: 0002a303 lw x6,0(x5) +80002624: 10622423 sw x6,264(x4) # 108 +80002628: 00035383 lhu x7,0(x6) +8000262c: 0033f413 andi x8,x7,3 +80002630: 00300493 addi x9,x0,3 +80002634: 00941863 bne x8,x9,80002644 +80002638: 00235403 lhu x8,2(x6) +8000263c: 01041413 slli x8,x8,0x10 +80002640: 0083e3b3 or x7,x7,x8 +80002644: 10722023 sw x7,256(x4) # 100 +80002648: 0042a303 lw x6,4(x5) +8000264c: 12622023 sw x6,288(x4) # 120 + +80002650 : +80002650: 00000013 addi x0,x0,0 +80002654: 00000013 addi x0,x0,0 +80002658: 00000013 addi x0,x0,0 +8000265c: 00000013 addi x0,x0,0 +80002660: 00004517 auipc x10,0x4 +80002664: c3f50513 addi x10,x10,-961 # 8000629f +80002668: 00000013 addi x0,x0,0 +8000266c: 00000013 addi x0,x0,0 +80002670: 00000013 addi x0,x0,0 +80002674: 00000013 addi x0,x0,0 +80002678: 00000013 addi x0,x0,0 +8000267c: 00000013 addi x0,x0,0 +80002680: 00015097 auipc x1,0x15 +80002684: ee4080e7 jalr x1,-284(x1) # 80017564 +80002688: 00000013 addi x0,x0,0 +8000268c: 00000013 addi x0,x0,0 +80002690: 00000013 addi x0,x0,0 +80002694: 00000013 addi x0,x0,0 +80002698: 00000013 addi x0,x0,0 +8000269c: 00000013 addi x0,x0,0 +800026a0: 00004517 auipc x10,0x4 +800026a4: c3950513 addi x10,x10,-967 # 800062d9 +800026a8: 00000013 addi x0,x0,0 +800026ac: 00000013 addi x0,x0,0 +800026b0: 00000013 addi x0,x0,0 +800026b4: 00000013 addi x0,x0,0 +800026b8: 00000013 addi x0,x0,0 +800026bc: 00000013 addi x0,x0,0 +800026c0: 00015097 auipc x1,0x15 +800026c4: ea4080e7 jalr x1,-348(x1) # 80017564 + +800026c8 : +800026c8: 00000013 addi x0,x0,0 +800026cc: 00000013 addi x0,x0,0 +800026d0: 00000013 addi x0,x0,0 +800026d4: 00000013 addi x0,x0,0 +800026d8: 00000013 addi x0,x0,0 +800026dc: 00000013 addi x0,x0,0 +800026e0: 00004517 auipc x10,0x4 +800026e4: cb050513 addi x10,x10,-848 # 80006390 +800026e8: 00000013 addi x0,x0,0 +800026ec: 00000013 addi x0,x0,0 +800026f0: 00000013 addi x0,x0,0 +800026f4: 00000013 addi x0,x0,0 +800026f8: 00000013 addi x0,x0,0 +800026fc: 00000013 addi x0,x0,0 +80002700: 00015097 auipc x1,0x15 +80002704: e64080e7 jalr x1,-412(x1) # 80017564 + +80002708 : +80002708: 00003517 auipc x10,0x3 +8000270c: 63852503 lw x10,1592(x10) # 80005d40 +80002710: 00015097 auipc x1,0x15 +80002714: e54080e7 jalr x1,-428(x1) # 80017564 + +80002718 : +80002718: 00000013 addi x0,x0,0 +8000271c: 00000013 addi x0,x0,0 +80002720: 00004517 auipc x10,0x4 +80002724: c8250513 addi x10,x10,-894 # 800063a2 +80002728: 00000013 addi x0,x0,0 +8000272c: 00000013 addi x0,x0,0 +80002730: 00000013 addi x0,x0,0 +80002734: 00000013 addi x0,x0,0 +80002738: 00000013 addi x0,x0,0 +8000273c: 00000013 addi x0,x0,0 +80002740: 00015097 auipc x1,0x15 +80002744: e24080e7 jalr x1,-476(x1) # 80017564 +80002748: 00003517 auipc x10,0x3 +8000274c: 4d852503 lw x10,1240(x10) # 80005c20 +80002750: 00300593 addi x11,x0,3 +80002754: 52b50c63 beq x10,x11,80002c8c +80002758: 00000013 addi x0,x0,0 +8000275c: 00000013 addi x0,x0,0 +80002760: 00004517 auipc x10,0x4 +80002764: c4450513 addi x10,x10,-956 # 800063a4 +80002768: 00000013 addi x0,x0,0 +8000276c: 00000013 addi x0,x0,0 +80002770: 00000013 addi x0,x0,0 +80002774: 00000013 addi x0,x0,0 +80002778: 00000013 addi x0,x0,0 +8000277c: 00000013 addi x0,x0,0 +80002780: 00015097 auipc x1,0x15 +80002784: de4080e7 jalr x1,-540(x1) # 80017564 +80002788: 00003517 auipc x10,0x3 +8000278c: 59852503 lw x10,1432(x10) # 80005d20 +80002790: 02000593 addi x11,x0,32 +80002794: 00357613 andi x12,x10,3 +80002798: 00300693 addi x13,x0,3 +8000279c: 00d60463 beq x12,x13,800027a4 +800027a0: 01000593 addi x11,x0,16 +800027a4: 3f4010ef jal x1,80003b98 +800027a8: 00000013 addi x0,x0,0 +800027ac: 00000013 addi x0,x0,0 +800027b0: 00000013 addi x0,x0,0 +800027b4: 00000013 addi x0,x0,0 +800027b8: 00000013 addi x0,x0,0 +800027bc: 00000013 addi x0,x0,0 +800027c0: 00003517 auipc x10,0x3 +800027c4: 5c850513 addi x10,x10,1480 # 80005d88 +800027c8: 00000013 addi x0,x0,0 +800027cc: 00000013 addi x0,x0,0 +800027d0: 00000013 addi x0,x0,0 +800027d4: 00000013 addi x0,x0,0 +800027d8: 00000013 addi x0,x0,0 +800027dc: 00000013 addi x0,x0,0 +800027e0: 00015097 auipc x1,0x15 +800027e4: d84080e7 jalr x1,-636(x1) # 80017564 +800027e8: 00000013 addi x0,x0,0 +800027ec: 00000013 addi x0,x0,0 +800027f0: 00000013 addi x0,x0,0 +800027f4: 00000013 addi x0,x0,0 +800027f8: 00000013 addi x0,x0,0 +800027fc: 00000013 addi x0,x0,0 +80002800: 00004517 auipc x10,0x4 +80002804: bb850513 addi x10,x10,-1096 # 800063b8 +80002808: 00000013 addi x0,x0,0 +8000280c: 00000013 addi x0,x0,0 +80002810: 00000013 addi x0,x0,0 +80002814: 00000013 addi x0,x0,0 +80002818: 00000013 addi x0,x0,0 +8000281c: 00000013 addi x0,x0,0 +80002820: 00015097 auipc x1,0x15 +80002824: d44080e7 jalr x1,-700(x1) # 80017564 +80002828: 00003517 auipc x10,0x3 +8000282c: 50052503 lw x10,1280(x10) # 80005d28 +80002830: 02000593 addi x11,x0,32 +80002834: 364010ef jal x1,80003b98 +80002838: 00000013 addi x0,x0,0 +8000283c: 00000013 addi x0,x0,0 +80002840: 00003517 auipc x10,0x3 +80002844: 54850513 addi x10,x10,1352 # 80005d88 +80002848: 00000013 addi x0,x0,0 +8000284c: 00000013 addi x0,x0,0 +80002850: 00000013 addi x0,x0,0 +80002854: 00000013 addi x0,x0,0 +80002858: 00000013 addi x0,x0,0 +8000285c: 00000013 addi x0,x0,0 +80002860: 00015097 auipc x1,0x15 +80002864: d04080e7 jalr x1,-764(x1) # 80017564 +80002868: 00000013 addi x0,x0,0 +8000286c: 00000013 addi x0,x0,0 +80002870: 00000013 addi x0,x0,0 +80002874: 00000013 addi x0,x0,0 +80002878: 00000013 addi x0,x0,0 +8000287c: 00000013 addi x0,x0,0 +80002880: 00004517 auipc x10,0x4 +80002884: 56f50513 addi x10,x10,1391 # 80006def +80002888: 00000013 addi x0,x0,0 +8000288c: 00000013 addi x0,x0,0 +80002890: 00000013 addi x0,x0,0 +80002894: 00000013 addi x0,x0,0 +80002898: 00000013 addi x0,x0,0 +8000289c: 00000013 addi x0,x0,0 +800028a0: 00015097 auipc x1,0x15 +800028a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800028a8: 00003517 auipc x10,0x3 +800028ac: 37852503 lw x10,888(x10) # 80005c20 +800028b0: 00050663 beq x10,x0,800028bc +800028b4: 00300593 addi x11,x0,3 +800028b8: 04b51063 bne x10,x11,800028f8 +800028bc: 07800593 addi x11,x0,120 +800028c0: 00003617 auipc x12,0x3 +800028c4: 4c860613 addi x12,x12,1224 # 80005d88 +800028c8: 00000013 addi x0,x0,0 +800028cc: 00000013 addi x0,x0,0 +800028d0: 00000013 addi x0,x0,0 +800028d4: 00000013 addi x0,x0,0 +800028d8: 00000013 addi x0,x0,0 +800028dc: 00000013 addi x0,x0,0 +800028e0: 00b60023 sb x11,0(x12) +800028e4: 00160613 addi x12,x12,1 +800028e8: 00003517 auipc x10,0x3 +800028ec: 43c52503 lw x10,1084(x10) # 80005d24 +800028f0: 324010ef jal x1,80003c14 +800028f4: 1180006f jal x0,80002a0c + +800028f8 : +800028f8: 00100593 addi x11,x0,1 +800028fc: 04b50863 beq x10,x11,8000294c +80002900: 00400593 addi x11,x0,4 +80002904: 08b50a63 beq x10,x11,80002998 +80002908: 00500593 addi x11,x0,5 +8000290c: 0cb50463 beq x10,x11,800029d4 +80002910: 00000013 addi x0,x0,0 +80002914: 00000013 addi x0,x0,0 +80002918: 00000013 addi x0,x0,0 +8000291c: 00000013 addi x0,x0,0 +80002920: 00004517 auipc x10,0x4 +80002924: 5e550513 addi x10,x10,1509 # 80006f05 +80002928: 00000013 addi x0,x0,0 +8000292c: 00000013 addi x0,x0,0 +80002930: 00000013 addi x0,x0,0 +80002934: 00000013 addi x0,x0,0 +80002938: 00000013 addi x0,x0,0 +8000293c: 00000013 addi x0,x0,0 +80002940: 00015097 auipc x1,0x15 +80002944: c24080e7 jalr x1,-988(x1) # 80017564 +80002948: 1000006f jal x0,80002a48 + +8000294c : +8000294c: 06600593 addi x11,x0,102 +80002950: 00000013 addi x0,x0,0 +80002954: 00000013 addi x0,x0,0 +80002958: 00000013 addi x0,x0,0 +8000295c: 00000013 addi x0,x0,0 +80002960: 00003617 auipc x12,0x3 +80002964: 42860613 addi x12,x12,1064 # 80005d88 +80002968: 00000013 addi x0,x0,0 +8000296c: 00000013 addi x0,x0,0 +80002970: 00000013 addi x0,x0,0 +80002974: 00000013 addi x0,x0,0 +80002978: 00000013 addi x0,x0,0 +8000297c: 00000013 addi x0,x0,0 +80002980: 00b60023 sb x11,0(x12) +80002984: 00160613 addi x12,x12,1 +80002988: 00003517 auipc x10,0x3 +8000298c: 39c52503 lw x10,924(x10) # 80005d24 +80002990: 284010ef jal x1,80003c14 +80002994: 0780006f jal x0,80002a0c + +80002998 : +80002998: 07600593 addi x11,x0,118 +8000299c: 00000013 addi x0,x0,0 +800029a0: 00003617 auipc x12,0x3 +800029a4: 3e860613 addi x12,x12,1000 # 80005d88 +800029a8: 00000013 addi x0,x0,0 +800029ac: 00000013 addi x0,x0,0 +800029b0: 00000013 addi x0,x0,0 +800029b4: 00000013 addi x0,x0,0 +800029b8: 00000013 addi x0,x0,0 +800029bc: 00000013 addi x0,x0,0 +800029c0: 00b60023 sb x11,0(x12) +800029c4: 00160613 addi x12,x12,1 +800029c8: 00003517 auipc x10,0x3 +800029cc: 35c52503 lw x10,860(x10) # 80005d24 +800029d0: 244010ef jal x1,80003c14 + +800029d4 : +800029d4: 00000013 addi x0,x0,0 +800029d8: 00000013 addi x0,x0,0 +800029dc: 00000013 addi x0,x0,0 +800029e0: 00004517 auipc x10,0x4 +800029e4: 40850513 addi x10,x10,1032 # 80006de8 +800029e8: 00000013 addi x0,x0,0 +800029ec: 00000013 addi x0,x0,0 +800029f0: 00000013 addi x0,x0,0 +800029f4: 00000013 addi x0,x0,0 +800029f8: 00000013 addi x0,x0,0 +800029fc: 00000013 addi x0,x0,0 +80002a00: 00015097 auipc x1,0x15 +80002a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80002a08: 0400006f jal x0,80002a48 + +80002a0c : +80002a0c: 00000013 addi x0,x0,0 +80002a10: 00000013 addi x0,x0,0 +80002a14: 00000013 addi x0,x0,0 +80002a18: 00000013 addi x0,x0,0 +80002a1c: 00000013 addi x0,x0,0 +80002a20: 00003517 auipc x10,0x3 +80002a24: 36850513 addi x10,x10,872 # 80005d88 +80002a28: 00000013 addi x0,x0,0 +80002a2c: 00000013 addi x0,x0,0 +80002a30: 00000013 addi x0,x0,0 +80002a34: 00000013 addi x0,x0,0 +80002a38: 00000013 addi x0,x0,0 +80002a3c: 00000013 addi x0,x0,0 +80002a40: 00015097 auipc x1,0x15 +80002a44: b24080e7 jalr x1,-1244(x1) # 80017564 + +80002a48 : +80002a48: 00000013 addi x0,x0,0 +80002a4c: 00000013 addi x0,x0,0 +80002a50: 00000013 addi x0,x0,0 +80002a54: 00000013 addi x0,x0,0 +80002a58: 00000013 addi x0,x0,0 +80002a5c: 00000013 addi x0,x0,0 +80002a60: 00004517 auipc x10,0x4 +80002a64: 3a050513 addi x10,x10,928 # 80006e00 +80002a68: 00000013 addi x0,x0,0 +80002a6c: 00000013 addi x0,x0,0 +80002a70: 00000013 addi x0,x0,0 +80002a74: 00000013 addi x0,x0,0 +80002a78: 00000013 addi x0,x0,0 +80002a7c: 00000013 addi x0,x0,0 +80002a80: 00015097 auipc x1,0x15 +80002a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80002a88: 00003517 auipc x10,0x3 +80002a8c: 19852503 lw x10,408(x10) # 80005c20 +80002a90: 00100593 addi x11,x0,1 +80002a94: 00b51c63 bne x10,x11,80002aac +80002a98: 00003517 auipc x10,0x3 +80002a9c: 29852503 lw x10,664(x10) # 80005d30 +80002aa0: 02000593 addi x11,x0,32 +80002aa4: 0f4010ef jal x1,80003b98 +80002aa8: 0140006f jal x0,80002abc + +80002aac : +80002aac: 00003517 auipc x10,0x3 +80002ab0: 28452503 lw x10,644(x10) # 80005d30 +80002ab4: 02000593 addi x11,x0,32 +80002ab8: 0e0010ef jal x1,80003b98 + +80002abc : +80002abc: 00000013 addi x0,x0,0 +80002ac0: 00003517 auipc x10,0x3 +80002ac4: 2c850513 addi x10,x10,712 # 80005d88 +80002ac8: 00000013 addi x0,x0,0 +80002acc: 00000013 addi x0,x0,0 +80002ad0: 00000013 addi x0,x0,0 +80002ad4: 00000013 addi x0,x0,0 +80002ad8: 00000013 addi x0,x0,0 +80002adc: 00000013 addi x0,x0,0 +80002ae0: 00015097 auipc x1,0x15 +80002ae4: a84080e7 jalr x1,-1404(x1) # 80017564 +80002ae8: 00003517 auipc x10,0x3 +80002aec: 26052503 lw x10,608(x10) # 80005d48 +80002af0: 08051e63 bne x10,x0,80002b8c +80002af4: 00000013 addi x0,x0,0 +80002af8: 00000013 addi x0,x0,0 +80002afc: 00000013 addi x0,x0,0 +80002b00: 00004517 auipc x10,0x4 +80002b04: 31750513 addi x10,x10,791 # 80006e17 +80002b08: 00000013 addi x0,x0,0 +80002b0c: 00000013 addi x0,x0,0 +80002b10: 00000013 addi x0,x0,0 +80002b14: 00000013 addi x0,x0,0 +80002b18: 00000013 addi x0,x0,0 +80002b1c: 00000013 addi x0,x0,0 +80002b20: 00015097 auipc x1,0x15 +80002b24: a44080e7 jalr x1,-1468(x1) # 80017564 +80002b28: 00003517 auipc x10,0x3 +80002b2c: 0f852503 lw x10,248(x10) # 80005c20 +80002b30: 00100593 addi x11,x0,1 +80002b34: 00b51c63 bne x10,x11,80002b4c +80002b38: 00003517 auipc x10,0x3 +80002b3c: 20052503 lw x10,512(x10) # 80005d38 +80002b40: 02000593 addi x11,x0,32 +80002b44: 054010ef jal x1,80003b98 +80002b48: 0140006f jal x0,80002b5c + +80002b4c : +80002b4c: 00003517 auipc x10,0x3 +80002b50: 1ec52503 lw x10,492(x10) # 80005d38 +80002b54: 02000593 addi x11,x0,32 +80002b58: 040010ef jal x1,80003b98 + +80002b5c : +80002b5c: 00000013 addi x0,x0,0 +80002b60: 00003517 auipc x10,0x3 +80002b64: 22850513 addi x10,x10,552 # 80005d88 +80002b68: 00000013 addi x0,x0,0 +80002b6c: 00000013 addi x0,x0,0 +80002b70: 00000013 addi x0,x0,0 +80002b74: 00000013 addi x0,x0,0 +80002b78: 00000013 addi x0,x0,0 +80002b7c: 00000013 addi x0,x0,0 +80002b80: 00015097 auipc x1,0x15 +80002b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80002b88: 5bd0006f jal x0,80003944 + +80002b8c : +80002b8c: 00100593 addi x11,x0,1 +80002b90: 06b51e63 bne x10,x11,80002c0c + +80002b94 : +80002b94: 00000013 addi x0,x0,0 +80002b98: 00000013 addi x0,x0,0 +80002b9c: 00000013 addi x0,x0,0 +80002ba0: 00004517 auipc x10,0x4 +80002ba4: 28e50513 addi x10,x10,654 # 80006e2e +80002ba8: 00000013 addi x0,x0,0 +80002bac: 00000013 addi x0,x0,0 +80002bb0: 00000013 addi x0,x0,0 +80002bb4: 00000013 addi x0,x0,0 +80002bb8: 00000013 addi x0,x0,0 +80002bbc: 00000013 addi x0,x0,0 +80002bc0: 00015097 auipc x1,0x15 +80002bc4: 9a4080e7 jalr x1,-1628(x1) # 80017564 +80002bc8: 00003517 auipc x10,0x3 +80002bcc: 17052503 lw x10,368(x10) # 80005d38 +80002bd0: 02000593 addi x11,x0,32 +80002bd4: 7c5000ef jal x1,80003b98 +80002bd8: 00000013 addi x0,x0,0 +80002bdc: 00000013 addi x0,x0,0 +80002be0: 00003517 auipc x10,0x3 +80002be4: 1a850513 addi x10,x10,424 # 80005d88 +80002be8: 00000013 addi x0,x0,0 +80002bec: 00000013 addi x0,x0,0 +80002bf0: 00000013 addi x0,x0,0 +80002bf4: 00000013 addi x0,x0,0 +80002bf8: 00000013 addi x0,x0,0 +80002bfc: 00000013 addi x0,x0,0 +80002c00: 00015097 auipc x1,0x15 +80002c04: 964080e7 jalr x1,-1692(x1) # 80017564 +80002c08: 53d0006f jal x0,80003944 + +80002c0c : +80002c0c: 00000013 addi x0,x0,0 +80002c10: 00000013 addi x0,x0,0 +80002c14: 00000013 addi x0,x0,0 +80002c18: 00000013 addi x0,x0,0 +80002c1c: 00000013 addi x0,x0,0 +80002c20: 00004517 auipc x10,0x4 +80002c24: 26c50513 addi x10,x10,620 # 80006e8c +80002c28: 00000013 addi x0,x0,0 +80002c2c: 00000013 addi x0,x0,0 +80002c30: 00000013 addi x0,x0,0 +80002c34: 00000013 addi x0,x0,0 +80002c38: 00000013 addi x0,x0,0 +80002c3c: 00000013 addi x0,x0,0 +80002c40: 00015097 auipc x1,0x15 +80002c44: 924080e7 jalr x1,-1756(x1) # 80017564 +80002c48: 00003517 auipc x10,0x3 +80002c4c: 0f052503 lw x10,240(x10) # 80005d38 +80002c50: 02000593 addi x11,x0,32 +80002c54: 745000ef jal x1,80003b98 +80002c58: 00000013 addi x0,x0,0 +80002c5c: 00000013 addi x0,x0,0 +80002c60: 00003517 auipc x10,0x3 +80002c64: 12850513 addi x10,x10,296 # 80005d88 +80002c68: 00000013 addi x0,x0,0 +80002c6c: 00000013 addi x0,x0,0 +80002c70: 00000013 addi x0,x0,0 +80002c74: 00000013 addi x0,x0,0 +80002c78: 00000013 addi x0,x0,0 +80002c7c: 00000013 addi x0,x0,0 +80002c80: 00015097 auipc x1,0x15 +80002c84: 8e4080e7 jalr x1,-1820(x1) # 80017564 +80002c88: 4bd0006f jal x0,80003944 + +80002c8c : +80002c8c: 00003417 auipc x8,0x3 +80002c90: 0c442403 lw x8,196(x8) # 80005d50 +80002c94: 00900493 addi x9,x0,9 +80002c98: 0a940c63 beq x8,x9,80002d50 +80002c9c: 00000013 addi x0,x0,0 +80002ca0: 00004517 auipc x10,0x4 +80002ca4: 29150513 addi x10,x10,657 # 80006f31 +80002ca8: 00000013 addi x0,x0,0 +80002cac: 00000013 addi x0,x0,0 +80002cb0: 00000013 addi x0,x0,0 +80002cb4: 00000013 addi x0,x0,0 +80002cb8: 00000013 addi x0,x0,0 +80002cbc: 00000013 addi x0,x0,0 +80002cc0: 00015097 auipc x1,0x15 +80002cc4: 8a4080e7 jalr x1,-1884(x1) # 80017564 +80002cc8: 00000013 addi x0,x0,0 +80002ccc: 00000013 addi x0,x0,0 +80002cd0: 00000013 addi x0,x0,0 +80002cd4: 00000013 addi x0,x0,0 +80002cd8: 00000013 addi x0,x0,0 +80002cdc: 00000013 addi x0,x0,0 +80002ce0: 00004517 auipc x10,0x4 +80002ce4: 27d50513 addi x10,x10,637 # 80006f5d +80002ce8: 00000013 addi x0,x0,0 +80002cec: 00000013 addi x0,x0,0 +80002cf0: 00000013 addi x0,x0,0 +80002cf4: 00000013 addi x0,x0,0 +80002cf8: 00000013 addi x0,x0,0 +80002cfc: 00000013 addi x0,x0,0 +80002d00: 00015097 auipc x1,0x15 +80002d04: 864080e7 jalr x1,-1948(x1) # 80017564 +80002d08: 00003817 auipc x16,0x3 +80002d0c: 05080813 addi x16,x16,80 # 80005d58 +80002d10: 00082503 lw x10,0(x16) +80002d14: 00015097 auipc x1,0x15 +80002d18: 850080e7 jalr x1,-1968(x1) # 80017564 +80002d1c: 00000013 addi x0,x0,0 +80002d20: 00003517 auipc x10,0x3 +80002d24: 68250513 addi x10,x10,1666 # 800063a2 +80002d28: 00000013 addi x0,x0,0 +80002d2c: 00000013 addi x0,x0,0 +80002d30: 00000013 addi x0,x0,0 +80002d34: 00000013 addi x0,x0,0 +80002d38: 00000013 addi x0,x0,0 +80002d3c: 00000013 addi x0,x0,0 +80002d40: 00015097 auipc x1,0x15 +80002d44: 824080e7 jalr x1,-2012(x1) # 80017564 +80002d48: 280404e3 beq x8,x0,800037d0 +80002d4c: 3400006f jal x0,8000308c + +80002d50 : +80002d50: 00000013 addi x0,x0,0 +80002d54: 00000013 addi x0,x0,0 +80002d58: 00000013 addi x0,x0,0 +80002d5c: 00000013 addi x0,x0,0 +80002d60: 00004517 auipc x10,0x4 +80002d64: 20d50513 addi x10,x10,525 # 80006f6d +80002d68: 00000013 addi x0,x0,0 +80002d6c: 00000013 addi x0,x0,0 +80002d70: 00000013 addi x0,x0,0 +80002d74: 00000013 addi x0,x0,0 +80002d78: 00000013 addi x0,x0,0 +80002d7c: 00000013 addi x0,x0,0 +80002d80: 00014097 auipc x1,0x14 +80002d84: 7e4080e7 jalr x1,2020(x1) # 80017564 +80002d88: 00003517 auipc x10,0x3 +80002d8c: fb052503 lw x10,-80(x10) # 80005d38 +80002d90: 02000593 addi x11,x0,32 +80002d94: 605000ef jal x1,80003b98 +80002d98: 00000013 addi x0,x0,0 +80002d9c: 00000013 addi x0,x0,0 +80002da0: 00003517 auipc x10,0x3 +80002da4: fe850513 addi x10,x10,-24 # 80005d88 +80002da8: 00000013 addi x0,x0,0 +80002dac: 00000013 addi x0,x0,0 +80002db0: 00000013 addi x0,x0,0 +80002db4: 00000013 addi x0,x0,0 +80002db8: 00000013 addi x0,x0,0 +80002dbc: 00000013 addi x0,x0,0 +80002dc0: 00014097 auipc x1,0x14 +80002dc4: 7a4080e7 jalr x1,1956(x1) # 80017564 +80002dc8: 00000013 addi x0,x0,0 +80002dcc: 00000013 addi x0,x0,0 +80002dd0: 00000013 addi x0,x0,0 +80002dd4: 00000013 addi x0,x0,0 +80002dd8: 00000013 addi x0,x0,0 +80002ddc: 00000013 addi x0,x0,0 +80002de0: 00004517 auipc x10,0x4 +80002de4: 1b850513 addi x10,x10,440 # 80006f98 +80002de8: 00000013 addi x0,x0,0 +80002dec: 00000013 addi x0,x0,0 +80002df0: 00000013 addi x0,x0,0 +80002df4: 00000013 addi x0,x0,0 +80002df8: 00000013 addi x0,x0,0 +80002dfc: 00000013 addi x0,x0,0 +80002e00: 00014097 auipc x1,0x14 +80002e04: 764080e7 jalr x1,1892(x1) # 80017564 +80002e08: 00003517 auipc x10,0x3 +80002e0c: f2852503 lw x10,-216(x10) # 80005d30 +80002e10: 02000593 addi x11,x0,32 +80002e14: 585000ef jal x1,80003b98 +80002e18: 00000013 addi x0,x0,0 +80002e1c: 00000013 addi x0,x0,0 +80002e20: 00003517 auipc x10,0x3 +80002e24: f6850513 addi x10,x10,-152 # 80005d88 +80002e28: 00000013 addi x0,x0,0 +80002e2c: 00000013 addi x0,x0,0 +80002e30: 00000013 addi x0,x0,0 +80002e34: 00000013 addi x0,x0,0 +80002e38: 00000013 addi x0,x0,0 +80002e3c: 00000013 addi x0,x0,0 +80002e40: 00014097 auipc x1,0x14 +80002e44: 724080e7 jalr x1,1828(x1) # 80017564 +80002e48: 00003317 auipc x6,0x3 +80002e4c: ee832303 lw x6,-280(x6) # 80005d30 +80002e50: 00003397 auipc x7,0x3 +80002e54: ee83a383 lw x7,-280(x7) # 80005d38 +80002e58: 10736a63 bltu x6,x7,80002f6c + +80002e5c : +80002e5c: 00000013 addi x0,x0,0 +80002e60: 00004517 auipc x10,0x4 +80002e64: 16750513 addi x10,x10,359 # 80006fc7 +80002e68: 00000013 addi x0,x0,0 +80002e6c: 00000013 addi x0,x0,0 +80002e70: 00000013 addi x0,x0,0 +80002e74: 00000013 addi x0,x0,0 +80002e78: 00000013 addi x0,x0,0 +80002e7c: 00000013 addi x0,x0,0 +80002e80: 00014097 auipc x1,0x14 +80002e84: 6e4080e7 jalr x1,1764(x1) # 80017564 +80002e88: 00000013 addi x0,x0,0 +80002e8c: 00000013 addi x0,x0,0 +80002e90: 00000013 addi x0,x0,0 +80002e94: 00000013 addi x0,x0,0 +80002e98: 00000013 addi x0,x0,0 +80002e9c: 00000013 addi x0,x0,0 +80002ea0: 00004517 auipc x10,0x4 +80002ea4: 18f50513 addi x10,x10,399 # 8000702f +80002ea8: 00000013 addi x0,x0,0 +80002eac: 00000013 addi x0,x0,0 +80002eb0: 00000013 addi x0,x0,0 +80002eb4: 00000013 addi x0,x0,0 +80002eb8: 00000013 addi x0,x0,0 +80002ebc: 00000013 addi x0,x0,0 +80002ec0: 00014097 auipc x1,0x14 +80002ec4: 6a4080e7 jalr x1,1700(x1) # 80017564 +80002ec8: 00003317 auipc x6,0x3 +80002ecc: e6832303 lw x6,-408(x6) # 80005d30 +80002ed0: 00003397 auipc x7,0x3 +80002ed4: e683a383 lw x7,-408(x7) # 80005d38 +80002ed8: 40730533 sub x10,x6,x7 +80002edc: 02000593 addi x11,x0,32 +80002ee0: 4b9000ef jal x1,80003b98 +80002ee4: 00000013 addi x0,x0,0 +80002ee8: 00000013 addi x0,x0,0 +80002eec: 00000013 addi x0,x0,0 +80002ef0: 00000013 addi x0,x0,0 +80002ef4: 00000013 addi x0,x0,0 +80002ef8: 00000013 addi x0,x0,0 +80002efc: 00000013 addi x0,x0,0 +80002f00: 00003517 auipc x10,0x3 +80002f04: e8850513 addi x10,x10,-376 # 80005d88 +80002f08: 00000013 addi x0,x0,0 +80002f0c: 00000013 addi x0,x0,0 +80002f10: 00000013 addi x0,x0,0 +80002f14: 00000013 addi x0,x0,0 +80002f18: 00000013 addi x0,x0,0 +80002f1c: 00000013 addi x0,x0,0 +80002f20: 00014097 auipc x1,0x14 +80002f24: 644080e7 jalr x1,1604(x1) # 80017564 +80002f28: 00000013 addi x0,x0,0 +80002f2c: 00000013 addi x0,x0,0 +80002f30: 00000013 addi x0,x0,0 +80002f34: 00000013 addi x0,x0,0 +80002f38: 00000013 addi x0,x0,0 +80002f3c: 00000013 addi x0,x0,0 +80002f40: 00004517 auipc x10,0x4 +80002f44: 11650513 addi x10,x10,278 # 80007056 +80002f48: 00000013 addi x0,x0,0 +80002f4c: 00000013 addi x0,x0,0 +80002f50: 00000013 addi x0,x0,0 +80002f54: 00000013 addi x0,x0,0 +80002f58: 00000013 addi x0,x0,0 +80002f5c: 00000013 addi x0,x0,0 +80002f60: 00014097 auipc x1,0x14 +80002f64: 604080e7 jalr x1,1540(x1) # 80017564 +80002f68: 1dd0006f jal x0,80003944 + +80002f6c : +80002f6c: 00000013 addi x0,x0,0 +80002f70: 00000013 addi x0,x0,0 +80002f74: 00000013 addi x0,x0,0 +80002f78: 00000013 addi x0,x0,0 +80002f7c: 00000013 addi x0,x0,0 +80002f80: 00004517 auipc x10,0x4 +80002f84: 07350513 addi x10,x10,115 # 80006ff3 +80002f88: 00000013 addi x0,x0,0 +80002f8c: 00000013 addi x0,x0,0 +80002f90: 00000013 addi x0,x0,0 +80002f94: 00000013 addi x0,x0,0 +80002f98: 00000013 addi x0,x0,0 +80002f9c: 00000013 addi x0,x0,0 +80002fa0: 00014097 auipc x1,0x14 +80002fa4: 5c4080e7 jalr x1,1476(x1) # 80017564 +80002fa8: 00000013 addi x0,x0,0 +80002fac: 00000013 addi x0,x0,0 +80002fb0: 00000013 addi x0,x0,0 +80002fb4: 00000013 addi x0,x0,0 +80002fb8: 00000013 addi x0,x0,0 +80002fbc: 00000013 addi x0,x0,0 +80002fc0: 00004517 auipc x10,0x4 +80002fc4: 06f50513 addi x10,x10,111 # 8000702f +80002fc8: 00000013 addi x0,x0,0 +80002fcc: 00000013 addi x0,x0,0 +80002fd0: 00000013 addi x0,x0,0 +80002fd4: 00000013 addi x0,x0,0 +80002fd8: 00000013 addi x0,x0,0 +80002fdc: 00000013 addi x0,x0,0 +80002fe0: 00014097 auipc x1,0x14 +80002fe4: 584080e7 jalr x1,1412(x1) # 80017564 +80002fe8: 00003317 auipc x6,0x3 +80002fec: d5032303 lw x6,-688(x6) # 80005d38 +80002ff0: 00003397 auipc x7,0x3 +80002ff4: d403a383 lw x7,-704(x7) # 80005d30 +80002ff8: 40730533 sub x10,x6,x7 +80002ffc: 02000593 addi x11,x0,32 +80003000: 399000ef jal x1,80003b98 +80003004: 00000013 addi x0,x0,0 +80003008: 00000013 addi x0,x0,0 +8000300c: 00000013 addi x0,x0,0 +80003010: 00000013 addi x0,x0,0 +80003014: 00000013 addi x0,x0,0 +80003018: 00000013 addi x0,x0,0 +8000301c: 00000013 addi x0,x0,0 +80003020: 00003517 auipc x10,0x3 +80003024: d6850513 addi x10,x10,-664 # 80005d88 +80003028: 00000013 addi x0,x0,0 +8000302c: 00000013 addi x0,x0,0 +80003030: 00000013 addi x0,x0,0 +80003034: 00000013 addi x0,x0,0 +80003038: 00000013 addi x0,x0,0 +8000303c: 00000013 addi x0,x0,0 +80003040: 00014097 auipc x1,0x14 +80003044: 524080e7 jalr x1,1316(x1) # 80017564 +80003048: 00000013 addi x0,x0,0 +8000304c: 00000013 addi x0,x0,0 +80003050: 00000013 addi x0,x0,0 +80003054: 00000013 addi x0,x0,0 +80003058: 00000013 addi x0,x0,0 +8000305c: 00000013 addi x0,x0,0 +80003060: 00004517 auipc x10,0x4 +80003064: 0de50513 addi x10,x10,222 # 8000713e +80003068: 00000013 addi x0,x0,0 +8000306c: 00000013 addi x0,x0,0 +80003070: 00000013 addi x0,x0,0 +80003074: 00000013 addi x0,x0,0 +80003078: 00000013 addi x0,x0,0 +8000307c: 00000013 addi x0,x0,0 +80003080: 00014097 auipc x1,0x14 +80003084: 4e4080e7 jalr x1,1252(x1) # 80017564 +80003088: 0bd0006f jal x0,80003944 + +8000308c : +8000308c: 00000013 addi x0,x0,0 +80003090: 00000013 addi x0,x0,0 +80003094: 00000013 addi x0,x0,0 +80003098: 00000013 addi x0,x0,0 +8000309c: 00000013 addi x0,x0,0 +800030a0: 00004517 auipc x10,0x4 +800030a4: 18550513 addi x10,x10,389 # 80007225 +800030a8: 00000013 addi x0,x0,0 +800030ac: 00000013 addi x0,x0,0 +800030b0: 00000013 addi x0,x0,0 +800030b4: 00000013 addi x0,x0,0 +800030b8: 00000013 addi x0,x0,0 +800030bc: 00000013 addi x0,x0,0 +800030c0: 00014097 auipc x1,0x14 +800030c4: 4a4080e7 jalr x1,1188(x1) # 80017564 +800030c8: 00003517 auipc x10,0x3 +800030cc: c8c52503 lw x10,-884(x10) # 80005d54 +800030d0: 04050a63 beq x10,x0,80003124 +800030d4: 00100593 addi x11,x0,1 +800030d8: 08b50663 beq x10,x11,80003164 +800030dc: 00200593 addi x11,x0,2 +800030e0: 0cb50263 beq x10,x11,800031a4 +800030e4: 00300593 addi x11,x0,3 +800030e8: 0eb50e63 beq x10,x11,800031e4 +800030ec: 00000013 addi x0,x0,0 +800030f0: 00000013 addi x0,x0,0 +800030f4: 00000013 addi x0,x0,0 +800030f8: 00000013 addi x0,x0,0 +800030fc: 00000013 addi x0,x0,0 +80003100: 00004517 auipc x10,0x4 +80003104: 16150513 addi x10,x10,353 # 80007261 +80003108: 00000013 addi x0,x0,0 +8000310c: 00000013 addi x0,x0,0 +80003110: 00000013 addi x0,x0,0 +80003114: 00000013 addi x0,x0,0 +80003118: 00000013 addi x0,x0,0 +8000311c: 00000013 addi x0,x0,0 +80003120: 1000006f jal x0,80003220 + +80003124 : +80003124: 00000013 addi x0,x0,0 +80003128: 00000013 addi x0,x0,0 +8000312c: 00000013 addi x0,x0,0 +80003130: 00000013 addi x0,x0,0 +80003134: 00000013 addi x0,x0,0 +80003138: 00000013 addi x0,x0,0 +8000313c: 00000013 addi x0,x0,0 +80003140: 00004517 auipc x10,0x4 +80003144: 0ff50513 addi x10,x10,255 # 8000723f +80003148: 00000013 addi x0,x0,0 +8000314c: 00000013 addi x0,x0,0 +80003150: 00000013 addi x0,x0,0 +80003154: 00000013 addi x0,x0,0 +80003158: 00000013 addi x0,x0,0 +8000315c: 00000013 addi x0,x0,0 +80003160: 0c00006f jal x0,80003220 + +80003164 : +80003164: 00000013 addi x0,x0,0 +80003168: 00000013 addi x0,x0,0 +8000316c: 00000013 addi x0,x0,0 +80003170: 00000013 addi x0,x0,0 +80003174: 00000013 addi x0,x0,0 +80003178: 00000013 addi x0,x0,0 +8000317c: 00000013 addi x0,x0,0 +80003180: 00004517 auipc x10,0x4 +80003184: 0c750513 addi x10,x10,199 # 80007247 +80003188: 00000013 addi x0,x0,0 +8000318c: 00000013 addi x0,x0,0 +80003190: 00000013 addi x0,x0,0 +80003194: 00000013 addi x0,x0,0 +80003198: 00000013 addi x0,x0,0 +8000319c: 00000013 addi x0,x0,0 +800031a0: 0800006f jal x0,80003220 + +800031a4 : +800031a4: 00000013 addi x0,x0,0 +800031a8: 00000013 addi x0,x0,0 +800031ac: 00000013 addi x0,x0,0 +800031b0: 00000013 addi x0,x0,0 +800031b4: 00000013 addi x0,x0,0 +800031b8: 00000013 addi x0,x0,0 +800031bc: 00000013 addi x0,x0,0 +800031c0: 00004517 auipc x10,0x4 +800031c4: 08f50513 addi x10,x10,143 # 8000724f +800031c8: 00000013 addi x0,x0,0 +800031cc: 00000013 addi x0,x0,0 +800031d0: 00000013 addi x0,x0,0 +800031d4: 00000013 addi x0,x0,0 +800031d8: 00000013 addi x0,x0,0 +800031dc: 00000013 addi x0,x0,0 +800031e0: 0400006f jal x0,80003220 + +800031e4 : +800031e4: 00000013 addi x0,x0,0 +800031e8: 00000013 addi x0,x0,0 +800031ec: 00000013 addi x0,x0,0 +800031f0: 00000013 addi x0,x0,0 +800031f4: 00000013 addi x0,x0,0 +800031f8: 00000013 addi x0,x0,0 +800031fc: 00000013 addi x0,x0,0 +80003200: 00004517 auipc x10,0x4 +80003204: 05850513 addi x10,x10,88 # 80007258 +80003208: 00000013 addi x0,x0,0 +8000320c: 00000013 addi x0,x0,0 +80003210: 00000013 addi x0,x0,0 +80003214: 00000013 addi x0,x0,0 +80003218: 00000013 addi x0,x0,0 +8000321c: 00000013 addi x0,x0,0 + +80003220 : +80003220: 00014097 auipc x1,0x14 +80003224: 344080e7 jalr x1,836(x1) # 80017564 +80003228: 00000013 addi x0,x0,0 +8000322c: 00000013 addi x0,x0,0 +80003230: 00000013 addi x0,x0,0 +80003234: 00000013 addi x0,x0,0 +80003238: 00000013 addi x0,x0,0 +8000323c: 00000013 addi x0,x0,0 +80003240: 00004517 auipc x10,0x4 +80003244: 02a50513 addi x10,x10,42 # 8000726a +80003248: 00000013 addi x0,x0,0 +8000324c: 00000013 addi x0,x0,0 +80003250: 00000013 addi x0,x0,0 +80003254: 00000013 addi x0,x0,0 +80003258: 00000013 addi x0,x0,0 +8000325c: 00000013 addi x0,x0,0 +80003260: 00014097 auipc x1,0x14 +80003264: 304080e7 jalr x1,772(x1) # 80017564 +80003268: 00003517 auipc x10,0x3 +8000326c: ae852503 lw x10,-1304(x10) # 80005d50 +80003270: 00100593 addi x11,x0,1 +80003274: 06b50863 beq x10,x11,800032e4 +80003278: 00200593 addi x11,x0,2 +8000327c: 0ab50463 beq x10,x11,80003324 +80003280: 00300593 addi x11,x0,3 +80003284: 0eb50063 beq x10,x11,80003364 +80003288: 00400593 addi x11,x0,4 +8000328c: 10b50c63 beq x10,x11,800033a4 +80003290: 00500593 addi x11,x0,5 +80003294: 14b50863 beq x10,x11,800033e4 +80003298: 00600593 addi x11,x0,6 +8000329c: 18b50463 beq x10,x11,80003424 +800032a0: 00700593 addi x11,x0,7 +800032a4: 1cb50063 beq x10,x11,80003464 +800032a8: 00800593 addi x11,x0,8 +800032ac: 1eb50c63 beq x10,x11,800034a4 +800032b0: 00000013 addi x0,x0,0 +800032b4: 00000013 addi x0,x0,0 +800032b8: 00000013 addi x0,x0,0 +800032bc: 00000013 addi x0,x0,0 +800032c0: 00004517 auipc x10,0x4 +800032c4: 10150513 addi x10,x10,257 # 800073c1 +800032c8: 00000013 addi x0,x0,0 +800032cc: 00000013 addi x0,x0,0 +800032d0: 00000013 addi x0,x0,0 +800032d4: 00000013 addi x0,x0,0 +800032d8: 00000013 addi x0,x0,0 +800032dc: 00000013 addi x0,x0,0 +800032e0: 2000006f jal x0,800034e0 + +800032e4 : +800032e4: 00000013 addi x0,x0,0 +800032e8: 00000013 addi x0,x0,0 +800032ec: 00000013 addi x0,x0,0 +800032f0: 00000013 addi x0,x0,0 +800032f4: 00000013 addi x0,x0,0 +800032f8: 00000013 addi x0,x0,0 +800032fc: 00000013 addi x0,x0,0 +80003300: 00004517 auipc x10,0x4 +80003304: f8450513 addi x10,x10,-124 # 80007284 +80003308: 00000013 addi x0,x0,0 +8000330c: 00000013 addi x0,x0,0 +80003310: 00000013 addi x0,x0,0 +80003314: 00000013 addi x0,x0,0 +80003318: 00000013 addi x0,x0,0 +8000331c: 00000013 addi x0,x0,0 +80003320: 1c00006f jal x0,800034e0 + +80003324 : +80003324: 00000013 addi x0,x0,0 +80003328: 00000013 addi x0,x0,0 +8000332c: 00000013 addi x0,x0,0 +80003330: 00000013 addi x0,x0,0 +80003334: 00000013 addi x0,x0,0 +80003338: 00000013 addi x0,x0,0 +8000333c: 00000013 addi x0,x0,0 +80003340: 00004517 auipc x10,0x4 +80003344: f7550513 addi x10,x10,-139 # 800072b5 +80003348: 00000013 addi x0,x0,0 +8000334c: 00000013 addi x0,x0,0 +80003350: 00000013 addi x0,x0,0 +80003354: 00000013 addi x0,x0,0 +80003358: 00000013 addi x0,x0,0 +8000335c: 00000013 addi x0,x0,0 +80003360: 1800006f jal x0,800034e0 + +80003364 : +80003364: 00000013 addi x0,x0,0 +80003368: 00000013 addi x0,x0,0 +8000336c: 00000013 addi x0,x0,0 +80003370: 00000013 addi x0,x0,0 +80003374: 00000013 addi x0,x0,0 +80003378: 00000013 addi x0,x0,0 +8000337c: 00000013 addi x0,x0,0 +80003380: 00004517 auipc x10,0x4 +80003384: f5550513 addi x10,x10,-171 # 800072d5 +80003388: 00000013 addi x0,x0,0 +8000338c: 00000013 addi x0,x0,0 +80003390: 00000013 addi x0,x0,0 +80003394: 00000013 addi x0,x0,0 +80003398: 00000013 addi x0,x0,0 +8000339c: 00000013 addi x0,x0,0 +800033a0: 1400006f jal x0,800034e0 + +800033a4 : +800033a4: 00000013 addi x0,x0,0 +800033a8: 00000013 addi x0,x0,0 +800033ac: 00000013 addi x0,x0,0 +800033b0: 00000013 addi x0,x0,0 +800033b4: 00000013 addi x0,x0,0 +800033b8: 00000013 addi x0,x0,0 +800033bc: 00000013 addi x0,x0,0 +800033c0: 00004517 auipc x10,0x4 +800033c4: f3350513 addi x10,x10,-205 # 800072f3 +800033c8: 00000013 addi x0,x0,0 +800033cc: 00000013 addi x0,x0,0 +800033d0: 00000013 addi x0,x0,0 +800033d4: 00000013 addi x0,x0,0 +800033d8: 00000013 addi x0,x0,0 +800033dc: 00000013 addi x0,x0,0 +800033e0: 1000006f jal x0,800034e0 + +800033e4 : +800033e4: 00000013 addi x0,x0,0 +800033e8: 00000013 addi x0,x0,0 +800033ec: 00000013 addi x0,x0,0 +800033f0: 00000013 addi x0,x0,0 +800033f4: 00000013 addi x0,x0,0 +800033f8: 00000013 addi x0,x0,0 +800033fc: 00000013 addi x0,x0,0 +80003400: 00004517 auipc x10,0x4 +80003404: f1250513 addi x10,x10,-238 # 80007312 +80003408: 00000013 addi x0,x0,0 +8000340c: 00000013 addi x0,x0,0 +80003410: 00000013 addi x0,x0,0 +80003414: 00000013 addi x0,x0,0 +80003418: 00000013 addi x0,x0,0 +8000341c: 00000013 addi x0,x0,0 +80003420: 0c00006f jal x0,800034e0 + +80003424 : +80003424: 00000013 addi x0,x0,0 +80003428: 00000013 addi x0,x0,0 +8000342c: 00000013 addi x0,x0,0 +80003430: 00000013 addi x0,x0,0 +80003434: 00000013 addi x0,x0,0 +80003438: 00000013 addi x0,x0,0 +8000343c: 00000013 addi x0,x0,0 +80003440: 00004517 auipc x10,0x4 +80003444: efa50513 addi x10,x10,-262 # 8000733a +80003448: 00000013 addi x0,x0,0 +8000344c: 00000013 addi x0,x0,0 +80003450: 00000013 addi x0,x0,0 +80003454: 00000013 addi x0,x0,0 +80003458: 00000013 addi x0,x0,0 +8000345c: 00000013 addi x0,x0,0 +80003460: 0800006f jal x0,800034e0 + +80003464 : +80003464: 00000013 addi x0,x0,0 +80003468: 00000013 addi x0,x0,0 +8000346c: 00000013 addi x0,x0,0 +80003470: 00000013 addi x0,x0,0 +80003474: 00000013 addi x0,x0,0 +80003478: 00000013 addi x0,x0,0 +8000347c: 00000013 addi x0,x0,0 +80003480: 00004517 auipc x10,0x4 +80003484: ee650513 addi x10,x10,-282 # 80007366 +80003488: 00000013 addi x0,x0,0 +8000348c: 00000013 addi x0,x0,0 +80003490: 00000013 addi x0,x0,0 +80003494: 00000013 addi x0,x0,0 +80003498: 00000013 addi x0,x0,0 +8000349c: 00000013 addi x0,x0,0 +800034a0: 0400006f jal x0,800034e0 + +800034a4 : +800034a4: 00000013 addi x0,x0,0 +800034a8: 00000013 addi x0,x0,0 +800034ac: 00000013 addi x0,x0,0 +800034b0: 00000013 addi x0,x0,0 +800034b4: 00000013 addi x0,x0,0 +800034b8: 00000013 addi x0,x0,0 +800034bc: 00000013 addi x0,x0,0 +800034c0: 00004517 auipc x10,0x4 +800034c4: ed250513 addi x10,x10,-302 # 80007392 +800034c8: 00000013 addi x0,x0,0 +800034cc: 00000013 addi x0,x0,0 +800034d0: 00000013 addi x0,x0,0 +800034d4: 00000013 addi x0,x0,0 +800034d8: 00000013 addi x0,x0,0 +800034dc: 00000013 addi x0,x0,0 + +800034e0 : +800034e0: 00014097 auipc x1,0x14 +800034e4: 084080e7 jalr x1,132(x1) # 80017564 +800034e8: 00000013 addi x0,x0,0 +800034ec: 00000013 addi x0,x0,0 +800034f0: 00000013 addi x0,x0,0 +800034f4: 00000013 addi x0,x0,0 +800034f8: 00000013 addi x0,x0,0 +800034fc: 00000013 addi x0,x0,0 +80003500: 00004517 auipc x10,0x4 +80003504: ed050513 addi x10,x10,-304 # 800073d0 +80003508: 00000013 addi x0,x0,0 +8000350c: 00000013 addi x0,x0,0 +80003510: 00000013 addi x0,x0,0 +80003514: 00000013 addi x0,x0,0 +80003518: 00000013 addi x0,x0,0 +8000351c: 00000013 addi x0,x0,0 +80003520: 00014097 auipc x1,0x14 +80003524: 044080e7 jalr x1,68(x1) # 80017564 +80003528: 00003517 auipc x10,0x3 +8000352c: 81052503 lw x10,-2032(x10) # 80005d38 +80003530: 02000593 addi x11,x0,32 +80003534: 664000ef jal x1,80003b98 +80003538: 00000013 addi x0,x0,0 +8000353c: 00000013 addi x0,x0,0 +80003540: 00003517 auipc x10,0x3 +80003544: 84850513 addi x10,x10,-1976 # 80005d88 +80003548: 00000013 addi x0,x0,0 +8000354c: 00000013 addi x0,x0,0 +80003550: 00000013 addi x0,x0,0 +80003554: 00000013 addi x0,x0,0 +80003558: 00000013 addi x0,x0,0 +8000355c: 00000013 addi x0,x0,0 +80003560: 00014097 auipc x1,0x14 +80003564: 004080e7 jalr x1,4(x1) # 80017564 +80003568: 00000013 addi x0,x0,0 +8000356c: 00000013 addi x0,x0,0 +80003570: 00000013 addi x0,x0,0 +80003574: 00000013 addi x0,x0,0 +80003578: 00000013 addi x0,x0,0 +8000357c: 00000013 addi x0,x0,0 +80003580: 00004517 auipc x10,0x4 +80003584: e6750513 addi x10,x10,-409 # 800073e7 +80003588: 00000013 addi x0,x0,0 +8000358c: 00000013 addi x0,x0,0 +80003590: 00000013 addi x0,x0,0 +80003594: 00000013 addi x0,x0,0 +80003598: 00000013 addi x0,x0,0 +8000359c: 00000013 addi x0,x0,0 +800035a0: 00014097 auipc x1,0x14 +800035a4: fc4080e7 jalr x1,-60(x1) # 80017564 +800035a8: 00002517 auipc x10,0x2 +800035ac: 78852503 lw x10,1928(x10) # 80005d30 +800035b0: 02000593 addi x11,x0,32 +800035b4: 5e4000ef jal x1,80003b98 +800035b8: 00000013 addi x0,x0,0 +800035bc: 00000013 addi x0,x0,0 +800035c0: 00002517 auipc x10,0x2 +800035c4: 7c850513 addi x10,x10,1992 # 80005d88 +800035c8: 00000013 addi x0,x0,0 +800035cc: 00000013 addi x0,x0,0 +800035d0: 00000013 addi x0,x0,0 +800035d4: 00000013 addi x0,x0,0 +800035d8: 00000013 addi x0,x0,0 +800035dc: 00000013 addi x0,x0,0 +800035e0: 00014097 auipc x1,0x14 +800035e4: f84080e7 jalr x1,-124(x1) # 80017564 +800035e8: 00002517 auipc x10,0x2 +800035ec: 76852503 lw x10,1896(x10) # 80005d50 +800035f0: 00200593 addi x11,x0,2 +800035f4: 08b51463 bne x10,x11,8000367c +800035f8: 00000013 addi x0,x0,0 +800035fc: 00000013 addi x0,x0,0 +80003600: 00004517 auipc x10,0x4 +80003604: dfe50513 addi x10,x10,-514 # 800073fe +80003608: 00000013 addi x0,x0,0 +8000360c: 00000013 addi x0,x0,0 +80003610: 00000013 addi x0,x0,0 +80003614: 00000013 addi x0,x0,0 +80003618: 00000013 addi x0,x0,0 +8000361c: 00000013 addi x0,x0,0 +80003620: 00014097 auipc x1,0x14 +80003624: f44080e7 jalr x1,-188(x1) # 80017564 +80003628: 00002517 auipc x10,0x2 +8000362c: 71052503 lw x10,1808(x10) # 80005d38 +80003630: 284000ef jal x1,800038b4 +80003634: 00014097 auipc x1,0x14 +80003638: f30080e7 jalr x1,-208(x1) # 80017564 +8000363c: 00000013 addi x0,x0,0 +80003640: 00004517 auipc x10,0x4 +80003644: dd550513 addi x10,x10,-555 # 80007415 +80003648: 00000013 addi x0,x0,0 +8000364c: 00000013 addi x0,x0,0 +80003650: 00000013 addi x0,x0,0 +80003654: 00000013 addi x0,x0,0 +80003658: 00000013 addi x0,x0,0 +8000365c: 00000013 addi x0,x0,0 +80003660: 00014097 auipc x1,0x14 +80003664: f04080e7 jalr x1,-252(x1) # 80017564 +80003668: 00002517 auipc x10,0x2 +8000366c: 6c852503 lw x10,1736(x10) # 80005d30 +80003670: 244000ef jal x1,800038b4 +80003674: 00014097 auipc x1,0x14 +80003678: ef0080e7 jalr x1,-272(x1) # 80017564 + +8000367c : +8000367c: 00000097 auipc x1,0x0 +80003680: 314080e7 jalr x1,788(x1) # 80003990 +80003684: 00002517 auipc x10,0x2 +80003688: 6cc52503 lw x10,1740(x10) # 80005d50 +8000368c: 00100593 addi x11,x0,1 +80003690: 02b51e63 bne x10,x11,800036cc +80003694: 00000013 addi x0,x0,0 +80003698: 00000013 addi x0,x0,0 +8000369c: 00000013 addi x0,x0,0 +800036a0: 00004517 auipc x10,0x4 +800036a4: deb50513 addi x10,x10,-533 # 8000748b +800036a8: 00000013 addi x0,x0,0 +800036ac: 00000013 addi x0,x0,0 +800036b0: 00000013 addi x0,x0,0 +800036b4: 00000013 addi x0,x0,0 +800036b8: 00000013 addi x0,x0,0 +800036bc: 00000013 addi x0,x0,0 +800036c0: 00014097 auipc x1,0x14 +800036c4: ea4080e7 jalr x1,-348(x1) # 80017564 +800036c8: 27c0006f jal x0,80003944 +800036cc: 00200593 addi x11,x0,2 +800036d0: 02b51e63 bne x10,x11,8000370c +800036d4: 00000013 addi x0,x0,0 +800036d8: 00000013 addi x0,x0,0 +800036dc: 00000013 addi x0,x0,0 +800036e0: 00004517 auipc x10,0x4 +800036e4: e8150513 addi x10,x10,-383 # 80007561 +800036e8: 00000013 addi x0,x0,0 +800036ec: 00000013 addi x0,x0,0 +800036f0: 00000013 addi x0,x0,0 +800036f4: 00000013 addi x0,x0,0 +800036f8: 00000013 addi x0,x0,0 +800036fc: 00000013 addi x0,x0,0 +80003700: 00014097 auipc x1,0x14 +80003704: e64080e7 jalr x1,-412(x1) # 80017564 +80003708: 23c0006f jal x0,80003944 +8000370c: 00300593 addi x11,x0,3 +80003710: 02b51e63 bne x10,x11,8000374c +80003714: 00000013 addi x0,x0,0 +80003718: 00000013 addi x0,x0,0 +8000371c: 00000013 addi x0,x0,0 +80003720: 00004517 auipc x10,0x4 +80003724: f3450513 addi x10,x10,-204 # 80007654 +80003728: 00000013 addi x0,x0,0 +8000372c: 00000013 addi x0,x0,0 +80003730: 00000013 addi x0,x0,0 +80003734: 00000013 addi x0,x0,0 +80003738: 00000013 addi x0,x0,0 +8000373c: 00000013 addi x0,x0,0 +80003740: 00014097 auipc x1,0x14 +80003744: e24080e7 jalr x1,-476(x1) # 80017564 +80003748: 1fc0006f jal x0,80003944 +8000374c: 00400593 addi x11,x0,4 +80003750: 02b51e63 bne x10,x11,8000378c +80003754: 00000013 addi x0,x0,0 +80003758: 00000013 addi x0,x0,0 +8000375c: 00000013 addi x0,x0,0 +80003760: 00004517 auipc x10,0x4 +80003764: fef50513 addi x10,x10,-17 # 8000774f +80003768: 00000013 addi x0,x0,0 +8000376c: 00000013 addi x0,x0,0 +80003770: 00000013 addi x0,x0,0 +80003774: 00000013 addi x0,x0,0 +80003778: 00000013 addi x0,x0,0 +8000377c: 00000013 addi x0,x0,0 +80003780: 00014097 auipc x1,0x14 +80003784: de4080e7 jalr x1,-540(x1) # 80017564 +80003788: 1bc0006f jal x0,80003944 +8000378c: 00500593 addi x11,x0,5 +80003790: 02b51e63 bne x10,x11,800037cc +80003794: 00000013 addi x0,x0,0 +80003798: 00000013 addi x0,x0,0 +8000379c: 00000013 addi x0,x0,0 +800037a0: 00004517 auipc x10,0x4 +800037a4: 09650513 addi x10,x10,150 # 80007836 +800037a8: 00000013 addi x0,x0,0 +800037ac: 00000013 addi x0,x0,0 +800037b0: 00000013 addi x0,x0,0 +800037b4: 00000013 addi x0,x0,0 +800037b8: 00000013 addi x0,x0,0 +800037bc: 00000013 addi x0,x0,0 +800037c0: 00014097 auipc x1,0x14 +800037c4: da4080e7 jalr x1,-604(x1) # 80017564 +800037c8: 17c0006f jal x0,80003944 +800037cc: 1780006f jal x0,80003944 + +800037d0 : +800037d0: 00000013 addi x0,x0,0 +800037d4: 00000013 addi x0,x0,0 +800037d8: 00000013 addi x0,x0,0 +800037dc: 00000013 addi x0,x0,0 +800037e0: 00004517 auipc x10,0x4 +800037e4: c6350513 addi x10,x10,-925 # 80007443 +800037e8: 00000013 addi x0,x0,0 +800037ec: 00000013 addi x0,x0,0 +800037f0: 00000013 addi x0,x0,0 +800037f4: 00000013 addi x0,x0,0 +800037f8: 00000013 addi x0,x0,0 +800037fc: 00000013 addi x0,x0,0 +80003800: 00014097 auipc x1,0x14 +80003804: d64080e7 jalr x1,-668(x1) # 80017564 +80003808: 00002617 auipc x12,0x2 +8000380c: 56062603 lw x12,1376(x12) # 80005d68 +80003810: 00000013 addi x0,x0,0 +80003814: 00000013 addi x0,x0,0 +80003818: 00000013 addi x0,x0,0 +8000381c: 00000013 addi x0,x0,0 +80003820: 00003517 auipc x10,0x3 +80003824: c0c50513 addi x10,x10,-1012 # 8000642c +80003828: 00000013 addi x0,x0,0 +8000382c: 00000013 addi x0,x0,0 +80003830: 00000013 addi x0,x0,0 +80003834: 00000013 addi x0,x0,0 +80003838: 00000013 addi x0,x0,0 +8000383c: 00000013 addi x0,x0,0 +80003840: 00014097 auipc x1,0x14 +80003844: d24080e7 jalr x1,-732(x1) # 80017564 +80003848: 00065503 lhu x10,0(x12) +8000384c: 01000593 addi x11,x0,16 +80003850: 00357413 andi x8,x10,3 +80003854: 00300493 addi x9,x0,3 +80003858: 00941a63 bne x8,x9,8000386c +8000385c: 00265403 lhu x8,2(x12) +80003860: 01041413 slli x8,x8,0x10 +80003864: 00856533 or x10,x10,x8 +80003868: 02000593 addi x11,x0,32 +8000386c: 32c000ef jal x1,80003b98 +80003870: 00000013 addi x0,x0,0 +80003874: 00000013 addi x0,x0,0 +80003878: 00000013 addi x0,x0,0 +8000387c: 00000013 addi x0,x0,0 +80003880: 00002517 auipc x10,0x2 +80003884: 50850513 addi x10,x10,1288 # 80005d88 +80003888: 00000013 addi x0,x0,0 +8000388c: 00000013 addi x0,x0,0 +80003890: 00000013 addi x0,x0,0 +80003894: 00000013 addi x0,x0,0 +80003898: 00000013 addi x0,x0,0 +8000389c: 00000013 addi x0,x0,0 +800038a0: 00014097 auipc x1,0x14 +800038a4: cc4080e7 jalr x1,-828(x1) # 80017564 +800038a8: 00000097 auipc x1,0x0 +800038ac: 0e8080e7 jalr x1,232(x1) # 80003990 +800038b0: 0940006f jal x0,80003944 + +800038b4 : +800038b4: 02054263 blt x10,x0,800038d8 + +800038b8 : +800038b8: 01800593 addi x11,x0,24 +800038bc: 04b55463 bge x10,x11,80003904 +800038c0: 00002597 auipc x11,0x2 +800038c4: 4f058593 addi x11,x11,1264 # 80005db0 +800038c8: 00251613 slli x12,x10,0x2 +800038cc: 00c585b3 add x11,x11,x12 +800038d0: 0005a503 lw x10,0(x11) +800038d4: 00008067 jalr x0,0(x1) + +800038d8 : +800038d8: 00100593 addi x11,x0,1 +800038dc: 01f59593 slli x11,x11,0x1f +800038e0: 00b54533 xor x10,x10,x11 +800038e4: 01000593 addi x11,x0,16 +800038e8: 00b55e63 bge x10,x11,80003904 +800038ec: 00002597 auipc x11,0x2 +800038f0: 52458593 addi x11,x11,1316 # 80005e10 +800038f4: 00251613 slli x12,x10,0x2 +800038f8: 00c585b3 add x11,x11,x12 +800038fc: 0005a503 lw x10,0(x11) +80003900: 00008067 jalr x0,0(x1) + +80003904 : +80003904: 00000013 addi x0,x0,0 +80003908: 00000013 addi x0,x0,0 +8000390c: 00000013 addi x0,x0,0 +80003910: 00000013 addi x0,x0,0 +80003914: 00000013 addi x0,x0,0 +80003918: 00000013 addi x0,x0,0 +8000391c: 00000013 addi x0,x0,0 +80003920: 00003517 auipc x10,0x3 +80003924: 92e50513 addi x10,x10,-1746 # 8000624e +80003928: 00000013 addi x0,x0,0 +8000392c: 00000013 addi x0,x0,0 +80003930: 00000013 addi x0,x0,0 +80003934: 00000013 addi x0,x0,0 +80003938: 00000013 addi x0,x0,0 +8000393c: 00000013 addi x0,x0,0 +80003940: 00008067 jalr x0,0(x1) + +80003944 : +80003944: 00000013 addi x0,x0,0 +80003948: 00000013 addi x0,x0,0 +8000394c: 00000013 addi x0,x0,0 +80003950: 00000013 addi x0,x0,0 +80003954: 00000013 addi x0,x0,0 +80003958: 00000013 addi x0,x0,0 +8000395c: 00000013 addi x0,x0,0 +80003960: 00003517 auipc x10,0x3 +80003964: 58450513 addi x10,x10,1412 # 80006ee4 +80003968: 00000013 addi x0,x0,0 +8000396c: 00000013 addi x0,x0,0 +80003970: 00000013 addi x0,x0,0 +80003974: 00000013 addi x0,x0,0 +80003978: 00000013 addi x0,x0,0 +8000397c: 00000013 addi x0,x0,0 +80003980: 00014097 auipc x1,0x14 +80003984: be4080e7 jalr x1,-1052(x1) # 80017564 + +80003988 : +80003988: 00014097 auipc x1,0x14 +8000398c: c3c080e7 jalr x1,-964(x1) # 800175c4 + +80003990 : +80003990: 00002617 auipc x12,0x2 +80003994: 3d060613 addi x12,x12,976 # 80005d60 +80003998: 00162023 sw x1,0(x12) +8000399c: 00000013 addi x0,x0,0 +800039a0: 00003517 auipc x10,0x3 +800039a4: aad50513 addi x10,x10,-1363 # 8000644d +800039a8: 00000013 addi x0,x0,0 +800039ac: 00000013 addi x0,x0,0 +800039b0: 00000013 addi x0,x0,0 +800039b4: 00000013 addi x0,x0,0 +800039b8: 00000013 addi x0,x0,0 +800039bc: 00000013 addi x0,x0,0 +800039c0: 00014097 auipc x1,0x14 +800039c4: ba4080e7 jalr x1,-1116(x1) # 80017564 +800039c8: 00002517 auipc x10,0x2 +800039cc: 3a052503 lw x10,928(x10) # 80005d68 +800039d0: 02000593 addi x11,x0,32 +800039d4: 1c4000ef jal x1,80003b98 +800039d8: 00000013 addi x0,x0,0 +800039dc: 00000013 addi x0,x0,0 +800039e0: 00002517 auipc x10,0x2 +800039e4: 3a850513 addi x10,x10,936 # 80005d88 +800039e8: 00000013 addi x0,x0,0 +800039ec: 00000013 addi x0,x0,0 +800039f0: 00000013 addi x0,x0,0 +800039f4: 00000013 addi x0,x0,0 +800039f8: 00000013 addi x0,x0,0 +800039fc: 00000013 addi x0,x0,0 +80003a00: 00014097 auipc x1,0x14 +80003a04: b64080e7 jalr x1,-1180(x1) # 80017564 +80003a08: 00000013 addi x0,x0,0 +80003a0c: 00000013 addi x0,x0,0 +80003a10: 00000013 addi x0,x0,0 +80003a14: 00000013 addi x0,x0,0 +80003a18: 00000013 addi x0,x0,0 +80003a1c: 00000013 addi x0,x0,0 +80003a20: 00003517 auipc x10,0x3 +80003a24: a3d50513 addi x10,x10,-1475 # 8000645d +80003a28: 00000013 addi x0,x0,0 +80003a2c: 00000013 addi x0,x0,0 +80003a30: 00000013 addi x0,x0,0 +80003a34: 00000013 addi x0,x0,0 +80003a38: 00000013 addi x0,x0,0 +80003a3c: 00000013 addi x0,x0,0 +80003a40: 00014097 auipc x1,0x14 +80003a44: b24080e7 jalr x1,-1244(x1) # 80017564 +80003a48: 00002517 auipc x10,0x2 +80003a4c: 32852503 lw x10,808(x10) # 80005d70 +80003a50: 02000593 addi x11,x0,32 +80003a54: 144000ef jal x1,80003b98 +80003a58: 00000013 addi x0,x0,0 +80003a5c: 00000013 addi x0,x0,0 +80003a60: 00002517 auipc x10,0x2 +80003a64: 32850513 addi x10,x10,808 # 80005d88 +80003a68: 00000013 addi x0,x0,0 +80003a6c: 00000013 addi x0,x0,0 +80003a70: 00000013 addi x0,x0,0 +80003a74: 00000013 addi x0,x0,0 +80003a78: 00000013 addi x0,x0,0 +80003a7c: 00000013 addi x0,x0,0 +80003a80: 00014097 auipc x1,0x14 +80003a84: ae4080e7 jalr x1,-1308(x1) # 80017564 +80003a88: 00000013 addi x0,x0,0 +80003a8c: 00000013 addi x0,x0,0 +80003a90: 00000013 addi x0,x0,0 +80003a94: 00000013 addi x0,x0,0 +80003a98: 00000013 addi x0,x0,0 +80003a9c: 00000013 addi x0,x0,0 +80003aa0: 00003517 auipc x10,0x3 +80003aa4: 9cd50513 addi x10,x10,-1587 # 8000646d +80003aa8: 00000013 addi x0,x0,0 +80003aac: 00000013 addi x0,x0,0 +80003ab0: 00000013 addi x0,x0,0 +80003ab4: 00000013 addi x0,x0,0 +80003ab8: 00000013 addi x0,x0,0 +80003abc: 00000013 addi x0,x0,0 +80003ac0: 00014097 auipc x1,0x14 +80003ac4: aa4080e7 jalr x1,-1372(x1) # 80017564 +80003ac8: 00002517 auipc x10,0x2 +80003acc: 2b052503 lw x10,688(x10) # 80005d78 +80003ad0: 02000593 addi x11,x0,32 +80003ad4: 0c4000ef jal x1,80003b98 +80003ad8: 00000013 addi x0,x0,0 +80003adc: 00000013 addi x0,x0,0 +80003ae0: 00002517 auipc x10,0x2 +80003ae4: 2a850513 addi x10,x10,680 # 80005d88 +80003ae8: 00000013 addi x0,x0,0 +80003aec: 00000013 addi x0,x0,0 +80003af0: 00000013 addi x0,x0,0 +80003af4: 00000013 addi x0,x0,0 +80003af8: 00000013 addi x0,x0,0 +80003afc: 00000013 addi x0,x0,0 +80003b00: 00014097 auipc x1,0x14 +80003b04: a64080e7 jalr x1,-1436(x1) # 80017564 +80003b08: 00000013 addi x0,x0,0 +80003b0c: 00000013 addi x0,x0,0 +80003b10: 00000013 addi x0,x0,0 +80003b14: 00000013 addi x0,x0,0 +80003b18: 00000013 addi x0,x0,0 +80003b1c: 00000013 addi x0,x0,0 +80003b20: 00003517 auipc x10,0x3 +80003b24: 95d50513 addi x10,x10,-1699 # 8000647d +80003b28: 00000013 addi x0,x0,0 +80003b2c: 00000013 addi x0,x0,0 +80003b30: 00000013 addi x0,x0,0 +80003b34: 00000013 addi x0,x0,0 +80003b38: 00000013 addi x0,x0,0 +80003b3c: 00000013 addi x0,x0,0 +80003b40: 00014097 auipc x1,0x14 +80003b44: a24080e7 jalr x1,-1500(x1) # 80017564 +80003b48: 00002517 auipc x10,0x2 +80003b4c: 23852503 lw x10,568(x10) # 80005d80 +80003b50: 02000593 addi x11,x0,32 +80003b54: 044000ef jal x1,80003b98 +80003b58: 00000013 addi x0,x0,0 +80003b5c: 00000013 addi x0,x0,0 +80003b60: 00002517 auipc x10,0x2 +80003b64: 22850513 addi x10,x10,552 # 80005d88 +80003b68: 00000013 addi x0,x0,0 +80003b6c: 00000013 addi x0,x0,0 +80003b70: 00000013 addi x0,x0,0 +80003b74: 00000013 addi x0,x0,0 +80003b78: 00000013 addi x0,x0,0 +80003b7c: 00000013 addi x0,x0,0 +80003b80: 00014097 auipc x1,0x14 +80003b84: 9e4080e7 jalr x1,-1564(x1) # 80017564 +80003b88: 00002617 auipc x12,0x2 +80003b8c: 1d860613 addi x12,x12,472 # 80005d60 +80003b90: 00062083 lw x1,0(x12) +80003b94: 00008067 jalr x0,0(x1) + +80003b98 : +80003b98: 00000013 addi x0,x0,0 +80003b9c: 00000013 addi x0,x0,0 +80003ba0: 00002617 auipc x12,0x2 +80003ba4: 1e860613 addi x12,x12,488 # 80005d88 +80003ba8: 00000013 addi x0,x0,0 +80003bac: 00000013 addi x0,x0,0 +80003bb0: 00000013 addi x0,x0,0 +80003bb4: 00000013 addi x0,x0,0 +80003bb8: 00000013 addi x0,x0,0 +80003bbc: 00000013 addi x0,x0,0 +80003bc0: 03000693 addi x13,x0,48 +80003bc4: 00d60023 sb x13,0(x12) +80003bc8: 07800693 addi x13,x0,120 +80003bcc: 00d600a3 sb x13,1(x12) +80003bd0: 00260613 addi x12,x12,2 +80003bd4: 00058693 addi x13,x11,0 + +80003bd8 : +80003bd8: ffc68693 addi x13,x13,-4 +80003bdc: 00d55733 srl x14,x10,x13 +80003be0: 00f77713 andi x14,x14,15 +80003be4: 00a00793 addi x15,x0,10 +80003be8: 00f74663 blt x14,x15,80003bf4 +80003bec: 05770713 addi x14,x14,87 +80003bf0: 0080006f jal x0,80003bf8 + +80003bf4 : +80003bf4: 03070713 addi x14,x14,48 + +80003bf8 : +80003bf8: 00e60023 sb x14,0(x12) +80003bfc: 00160613 addi x12,x12,1 +80003c00: fc069ce3 bne x13,x0,80003bd8 +80003c04: 00a00693 addi x13,x0,10 +80003c08: 00d60023 sb x13,0(x12) +80003c0c: 000600a3 sb x0,1(x12) +80003c10: 00008067 jalr x0,0(x1) + +80003c14 : +80003c14: 00a00693 addi x13,x0,10 +80003c18: 02d54663 blt x10,x13,80003c44 +80003c1c: ff650513 addi x10,x10,-10 +80003c20: 03100713 addi x14,x0,49 +80003c24: 00d54c63 blt x10,x13,80003c3c +80003c28: ff650513 addi x10,x10,-10 +80003c2c: 03200713 addi x14,x0,50 +80003c30: 00d54663 blt x10,x13,80003c3c +80003c34: ff650513 addi x10,x10,-10 +80003c38: 03300713 addi x14,x0,51 +80003c3c: 00e60023 sb x14,0(x12) +80003c40: 00160613 addi x12,x12,1 +80003c44: 03050513 addi x10,x10,48 +80003c48: 00a60023 sb x10,0(x12) +80003c4c: 00a00693 addi x13,x0,10 +80003c50: 00d600a3 sb x13,1(x12) +80003c54: 00060123 sb x0,2(x12) +80003c58: 00008067 jalr x0,0(x1) +80003c5c: 00000013 addi x0,x0,0 +80003c60: 00000013 addi x0,x0,0 +80003c64: 00000013 addi x0,x0,0 +80003c68: 00000013 addi x0,x0,0 +80003c6c: 00000013 addi x0,x0,0 +80003c70: 00000013 addi x0,x0,0 +80003c74: 00000013 addi x0,x0,0 +80003c78: 00000013 addi x0,x0,0 +80003c7c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +80017000 : +80017000: 10010737 lui x14,0x10010 +80017004: 00072023 sw x0,0(x14) # 10010000 +80017008: fffeb397 auipc x7,0xfffeb +8001700c: d7838393 addi x7,x7,-648 # 80001d80 +80017010: 00038067 jalr x0,0(x7) + +80017014 : +80017014: fff00713 addi x14,x0,-1 +80017018: 100143b7 lui x7,0x10014 +8001701c: 00e3a023 sw x14,0(x7) # 10014000 +80017020: 00e3a223 sw x14,4(x7) +80017024: fffeb397 auipc x7,0xfffeb +80017028: d5c38393 addi x7,x7,-676 # 80001d80 +8001702c: 00038067 jalr x0,0(x7) + +80017030 : +80017030: 10000737 lui x14,0x10000 +80017034: 01070713 addi x14,x14,16 # 10000010 +80017038: 00070023 sb x0,0(x14) +8001703c: fffeb397 auipc x7,0xfffeb +80017040: d4438393 addi x7,x7,-700 # 80001d80 +80017044: 00038067 jalr x0,0(x7) + +80017048 : +80017048: 00200393 addi x7,x0,2 +8001704c: 3443b073 csrrc x0,mip,x7 +80017050: fffeb397 auipc x7,0xfffeb +80017054: d3038393 addi x7,x7,-720 # 80001d80 +80017058: 00038067 jalr x0,0(x7) + +8001705c : +8001705c: fffeb397 auipc x7,0xfffeb +80017060: d2438393 addi x7,x7,-732 # 80001d80 +80017064: 00038067 jalr x0,0(x7) + +80017068 : +80017068: 20000413 addi x8,x0,512 +8001706c: 34443073 csrrc x0,mip,x8 +80017070: 34402473 csrrs x8,mip,x0 +80017074: 00001337 lui x6,0x1 +80017078: 80030313 addi x6,x6,-2048 # 800 +8001707c: 00647433 and x8,x8,x6 +80017080: 00830863 beq x6,x8,80017090 +80017084: 10000737 lui x14,0x10000 +80017088: 01870713 addi x14,x14,24 # 10000018 +8001708c: 00070023 sb x0,0(x14) +80017090: fffeb397 auipc x7,0xfffeb +80017094: cf038393 addi x7,x7,-784 # 80001d80 +80017098: 00038067 jalr x0,0(x7) + +8001709c : +8001709c: fffea317 auipc x6,0xfffea +800170a0: f3030313 addi x6,x6,-208 # 80000fcc +800170a4: 00030067 jalr x0,0(x6) +800170a8: fffeb397 auipc x7,0xfffeb +800170ac: cd838393 addi x7,x7,-808 # 80001d80 +800170b0: 00038067 jalr x0,0(x7) + +800170b4 : +800170b4: fffea317 auipc x6,0xfffea +800170b8: f1830313 addi x6,x6,-232 # 80000fcc +800170bc: 00030067 jalr x0,0(x6) +800170c0: fffeb397 auipc x7,0xfffeb +800170c4: cc038393 addi x7,x7,-832 # 80001d80 +800170c8: 00038067 jalr x0,0(x7) + +800170cc : +800170cc: fffea317 auipc x6,0xfffea +800170d0: f0030313 addi x6,x6,-256 # 80000fcc +800170d4: 00030067 jalr x0,0(x6) +800170d8: fffeb397 auipc x7,0xfffeb +800170dc: ca838393 addi x7,x7,-856 # 80001d80 +800170e0: 00038067 jalr x0,0(x7) + +800170e4 : +800170e4: 30401073 csrrw x0,mie,x0 +800170e8: 34401073 csrrw x0,mip,x0 +800170ec: 34101073 csrrw x0,mepc,x0 +800170f0: 34301073 csrrw x0,mtval,x0 +800170f4: 34201073 csrrw x0,mcause,x0 +800170f8: 00000013 addi x0,x0,0 +800170fc: 00000013 addi x0,x0,0 +80017100: fffed317 auipc x6,0xfffed +80017104: 01030313 addi x6,x6,16 # 80004110 +80017108: 00000013 addi x0,x0,0 +8001710c: 00000013 addi x0,x0,0 +80017110: 00000013 addi x0,x0,0 +80017114: 00000013 addi x0,x0,0 +80017118: 00000013 addi x0,x0,0 +8001711c: 00000013 addi x0,x0,0 + +80017120 : +80017120: 34031473 csrrw x8,mscratch,x6 +80017124: 24832823 sw x8,592(x6) + +80017128 : +80017128: fff00393 addi x7,x0,-1 +8001712c: 100144b7 lui x9,0x10014 +80017130: 0074a023 sw x7,0(x9) # 10014000 +80017134: 0074a223 sw x7,4(x9) +80017138: 00000013 addi x0,x0,0 + +8001713c : +8001713c: 00000393 addi x7,x0,0 +80017140: 22732c23 sw x7,568(x6) + +80017144 : +80017144: 30502473 csrrs x8,mtvec,x0 +80017148: 24832423 sw x8,584(x6) +8001714c: 00347393 andi x7,x8,3 +80017150: ffc3f393 andi x7,x7,-4 +80017154: 23032483 lw x9,560(x6) +80017158: e2848493 addi x9,x9,-472 +8001715c: 0074e3b3 or x7,x9,x7 +80017160: 24732023 sw x7,576(x6) +80017164: 30539073 csrrw x0,mtvec,x7 +80017168: 30502773 csrrs x14,mtvec,x0 +8001716c: 0e770c63 beq x14,x7,80017264 +80017170: 30541073 csrrw x0,mtvec,x8 +80017174: 0a040863 beq x8,x0,80017224 +80017178: 24832023 sw x8,576(x6) + +8001717c : +8001717c: ffc47393 andi x7,x8,-4 +80017180: 1d838413 addi x8,x7,472 +80017184: 00030113 addi x2,x6,0 +80017188: 00000013 addi x0,x0,0 +8001718c: 00000013 addi x0,x0,0 +80017190: 00000013 addi x0,x0,0 +80017194: 00000013 addi x0,x0,0 +80017198: 00000013 addi x0,x0,0 +8001719c: 00000013 addi x0,x0,0 +800171a0: 00000717 auipc x14,0x0 +800171a4: 04c70713 addi x14,x14,76 # 800171ec +800171a8: 00000013 addi x0,x0,0 +800171ac: 00000013 addi x0,x0,0 +800171b0: 00000013 addi x0,x0,0 +800171b4: 00000013 addi x0,x0,0 +800171b8: 00000013 addi x0,x0,0 +800171bc: 00000013 addi x0,x0,0 +800171c0: 00000797 auipc x15,0x0 +800171c4: 0a478793 addi x15,x15,164 # 80017264 +800171c8: 00000013 addi x0,x0,0 +800171cc: 00000013 addi x0,x0,0 +800171d0: 00000013 addi x0,x0,0 +800171d4: 00000013 addi x0,x0,0 +800171d8: 00000013 addi x0,x0,0 +800171dc: 00000013 addi x0,x0,0 +800171e0: 00f3f663 bgeu x7,x15,800171ec +800171e4: 00877463 bgeu x14,x8,800171ec +800171e8: 03c0006f jal x0,80017224 + +800171ec : +800171ec: 0003a783 lw x15,0(x7) +800171f0: 00f32023 sw x15,0(x6) +800171f4: 0004a703 lw x14,0(x9) +800171f8: 00e3a023 sw x14,0(x7) +800171fc: 0003a783 lw x15,0(x7) +80017200: 00e79a63 bne x15,x14,80017214 +80017204: 00438393 addi x7,x7,4 +80017208: 00430313 addi x6,x6,4 +8001720c: 00448493 addi x9,x9,4 +80017210: fc741ee3 bne x8,x7,800171ec + +80017214 : +80017214: 0000100f fence.i +80017218: 34002373 csrrs x6,mscratch,x0 +8001721c: 22932823 sw x9,560(x6) +80017220: 04740263 beq x8,x7,80017264 + +80017224 : +80017224: 00038413 addi x8,x7,0 +80017228: 00000013 addi x0,x0,0 +8001722c: 00000013 addi x0,x0,0 +80017230: 00000013 addi x0,x0,0 +80017234: 00000013 addi x0,x0,0 +80017238: 00000013 addi x0,x0,0 +8001723c: 00000013 addi x0,x0,0 +80017240: fffea797 auipc x15,0xfffea +80017244: d9c78793 addi x15,x15,-612 # 80000fdc +80017248: 00000013 addi x0,x0,0 +8001724c: 00000013 addi x0,x0,0 +80017250: 00000013 addi x0,x0,0 +80017254: 00000013 addi x0,x0,0 +80017258: 00000013 addi x0,x0,0 +8001725c: 00000013 addi x0,x0,0 +80017260: 00078067 jalr x0,0(x15) + +80017264 : +80017264: 00000013 addi x0,x0,0 + +80017268 : +80017268: 000022b7 lui x5,0x2 +8001726c: 80028293 addi x5,x5,-2048 # 1800 +80017270: 30029073 csrrw x0,mstatus,x5 +80017274: 31001073 csrrw x0,0x310,x0 +80017278: 32001073 csrrw x0,mcountinhibit,x0 +8001727c: 32301073 csrrw x0,mhpmevent3,x0 +80017280: 32401073 csrrw x0,mhpmevent4,x0 +80017284: 32501073 csrrw x0,mhpmevent5,x0 +80017288: 32601073 csrrw x0,mhpmevent6,x0 +8001728c: 32701073 csrrw x0,mhpmevent7,x0 +80017290: 32801073 csrrw x0,mhpmevent8,x0 +80017294: 32901073 csrrw x0,mhpmevent9,x0 +80017298: 32a01073 csrrw x0,mhpmevent10,x0 +8001729c: 32b01073 csrrw x0,mhpmevent11,x0 +800172a0: 32c01073 csrrw x0,mhpmevent12,x0 +800172a4: 32d01073 csrrw x0,mhpmevent13,x0 +800172a8: 32e01073 csrrw x0,mhpmevent14,x0 +800172ac: 32f01073 csrrw x0,mhpmevent15,x0 +800172b0: 33001073 csrrw x0,mhpmevent16,x0 +800172b4: 33101073 csrrw x0,mhpmevent17,x0 +800172b8: 33201073 csrrw x0,mhpmevent18,x0 +800172bc: 33301073 csrrw x0,mhpmevent19,x0 +800172c0: 33401073 csrrw x0,mhpmevent20,x0 +800172c4: 33501073 csrrw x0,mhpmevent21,x0 +800172c8: 33601073 csrrw x0,mhpmevent22,x0 +800172cc: 33701073 csrrw x0,mhpmevent23,x0 +800172d0: 33801073 csrrw x0,mhpmevent24,x0 +800172d4: 33901073 csrrw x0,mhpmevent25,x0 +800172d8: 33a01073 csrrw x0,mhpmevent26,x0 +800172dc: 33b01073 csrrw x0,mhpmevent27,x0 +800172e0: 33c01073 csrrw x0,mhpmevent28,x0 +800172e4: 33d01073 csrrw x0,mhpmevent29,x0 +800172e8: 33e01073 csrrw x0,mhpmevent30,x0 +800172ec: 33f01073 csrrw x0,mhpmevent31,x0 +800172f0: 00000013 addi x0,x0,0 +800172f4: 00000013 addi x0,x0,0 +800172f8: 00000013 addi x0,x0,0 +800172fc: 00000013 addi x0,x0,0 +80017300: fffed317 auipc x6,0xfffed +80017304: e0830313 addi x6,x6,-504 # 80004108 +80017308: 00000013 addi x0,x0,0 +8001730c: 00000013 addi x0,x0,0 +80017310: 00000013 addi x0,x0,0 +80017314: 00000013 addi x0,x0,0 +80017318: 00000013 addi x0,x0,0 +8001731c: 00000013 addi x0,x0,0 +80017320: 00032023 sw x0,0(x6) + +80017324 : +80017324: feedc0b7 lui x1,0xfeedc +80017328: ead08093 addi x1,x1,-339 # feedbead <_end+0x7eec3ead> +8001732c: 01909793 slli x15,x1,0x19 +80017330: 0070d113 srli x2,x1,0x7 +80017334: 00f16133 or x2,x2,x15 +80017338: 01911793 slli x15,x2,0x19 +8001733c: 00715193 srli x3,x2,0x7 +80017340: 00f1e1b3 or x3,x3,x15 +80017344: 01919793 slli x15,x3,0x19 +80017348: 0071d213 srli x4,x3,0x7 +8001734c: 00f26233 or x4,x4,x15 +80017350: 01921793 slli x15,x4,0x19 +80017354: 00725293 srli x5,x4,0x7 +80017358: 00f2e2b3 or x5,x5,x15 +8001735c: 01929793 slli x15,x5,0x19 +80017360: 0072d313 srli x6,x5,0x7 +80017364: 00f36333 or x6,x6,x15 +80017368: 01931793 slli x15,x6,0x19 +8001736c: 00735393 srli x7,x6,0x7 +80017370: 00f3e3b3 or x7,x7,x15 +80017374: 01939793 slli x15,x7,0x19 +80017378: 0073d413 srli x8,x7,0x7 +8001737c: 00f46433 or x8,x8,x15 +80017380: 01941793 slli x15,x8,0x19 +80017384: 00745493 srli x9,x8,0x7 +80017388: 00f4e4b3 or x9,x9,x15 +8001738c: 01949793 slli x15,x9,0x19 +80017390: 0074d513 srli x10,x9,0x7 +80017394: 00f56533 or x10,x10,x15 +80017398: 01951793 slli x15,x10,0x19 +8001739c: 00755593 srli x11,x10,0x7 +800173a0: 00f5e5b3 or x11,x11,x15 +800173a4: 01959793 slli x15,x11,0x19 +800173a8: 0075d613 srli x12,x11,0x7 +800173ac: 00f66633 or x12,x12,x15 +800173b0: 01961793 slli x15,x12,0x19 +800173b4: 00765693 srli x13,x12,0x7 +800173b8: 00f6e6b3 or x13,x13,x15 +800173bc: 01969793 slli x15,x13,0x19 +800173c0: 0076d713 srli x14,x13,0x7 +800173c4: 00f76733 or x14,x14,x15 +800173c8: fab807b7 lui x15,0xfab80 +800173cc: bb678793 addi x15,x15,-1098 # fab7fbb6 <_end+0x7ab67bb6> +800173d0: 7d5c0837 lui x16,0x7d5c0 +800173d4: ddb80813 addi x16,x16,-549 # 7d5bfddb +800173d8: 01981793 slli x15,x16,0x19 +800173dc: 00785893 srli x17,x16,0x7 +800173e0: 00f8e8b3 or x17,x17,x15 +800173e4: 01989793 slli x15,x17,0x19 +800173e8: 0078d913 srli x18,x17,0x7 +800173ec: 00f96933 or x18,x18,x15 +800173f0: 01991793 slli x15,x18,0x19 +800173f4: 00795993 srli x19,x18,0x7 +800173f8: 00f9e9b3 or x19,x19,x15 +800173fc: 01999793 slli x15,x19,0x19 +80017400: 0079da13 srli x20,x19,0x7 +80017404: 00fa6a33 or x20,x20,x15 +80017408: 019a1793 slli x15,x20,0x19 +8001740c: 007a5a93 srli x21,x20,0x7 +80017410: 00faeab3 or x21,x21,x15 +80017414: 019a9793 slli x15,x21,0x19 +80017418: 007adb13 srli x22,x21,0x7 +8001741c: 00fb6b33 or x22,x22,x15 +80017420: 019b1793 slli x15,x22,0x19 +80017424: 007b5b93 srli x23,x22,0x7 +80017428: 00fbebb3 or x23,x23,x15 +8001742c: 019b9793 slli x15,x23,0x19 +80017430: 007bdc13 srli x24,x23,0x7 +80017434: 00fc6c33 or x24,x24,x15 +80017438: 019c1793 slli x15,x24,0x19 +8001743c: 007c5c93 srli x25,x24,0x7 +80017440: 00fcecb3 or x25,x25,x15 +80017444: 019c9793 slli x15,x25,0x19 +80017448: 007cdd13 srli x26,x25,0x7 +8001744c: 00fd6d33 or x26,x26,x15 +80017450: 019d1793 slli x15,x26,0x19 +80017454: 007d5d93 srli x27,x26,0x7 +80017458: 00fdedb3 or x27,x27,x15 +8001745c: 019d9793 slli x15,x27,0x19 +80017460: 007dde13 srli x28,x27,0x7 +80017464: 00fe6e33 or x28,x28,x15 +80017468: 019e1793 slli x15,x28,0x19 +8001746c: 007e5e93 srli x29,x28,0x7 +80017470: 00feeeb3 or x29,x29,x15 +80017474: 019e9793 slli x15,x29,0x19 +80017478: 007edf13 srli x30,x29,0x7 +8001747c: 00ff6f33 or x30,x30,x15 +80017480: 019f1793 slli x15,x30,0x19 +80017484: 007f5f93 srli x31,x30,0x7 +80017488: 00ffefb3 or x31,x31,x15 +8001748c: 00000013 addi x0,x0,0 +80017490: 00000013 addi x0,x0,0 +80017494: 00000013 addi x0,x0,0 +80017498: 00000013 addi x0,x0,0 +8001749c: 00000013 addi x0,x0,0 +800174a0: ffff0117 auipc x2,0xffff0 +800174a4: 4c010113 addi x2,x2,1216 # 80007960 +800174a8: 00000013 addi x0,x0,0 +800174ac: 00000013 addi x0,x0,0 +800174b0: 00000013 addi x0,x0,0 +800174b4: 00000013 addi x0,x0,0 +800174b8: 00000013 addi x0,x0,0 +800174bc: 00000013 addi x0,x0,0 + +800174c0 : +800174c0: 6f5ca337 lui x6,0x6f5ca +800174c4: 30930313 addi x6,x6,777 # 6f5ca309 +800174c8: 00000013 addi x0,x0,0 +800174cc: 00000013 addi x0,x0,0 +800174d0: 00000013 addi x0,x0,0 +800174d4: 00000013 addi x0,x0,0 +800174d8: 00000013 addi x0,x0,0 +800174dc: 00000013 addi x0,x0,0 +800174e0: fffeb197 auipc x3,0xfffeb +800174e4: ba018193 addi x3,x3,-1120 # 80002080 +800174e8: 00000013 addi x0,x0,0 +800174ec: 00000013 addi x0,x0,0 +800174f0: 00000013 addi x0,x0,0 +800174f4: 00000013 addi x0,x0,0 +800174f8: 00000013 addi x0,x0,0 +800174fc: 00000013 addi x0,x0,0 +80017500: 00012203 lw x4,0(x2) +80017504: 00620863 beq x4,x6,80017514 +80017508: 000182e7 jalr x5,0(x3) +8001750c: 800174c0 .word 0x800174c0 +80017510: 80006f0d .word 0x80006f0d +80017514: 00410113 addi x2,x2,4 +80017518: 00000013 addi x0,x0,0 +8001751c: 00000013 addi x0,x0,0 +80017520: fffed197 auipc x3,0xfffed +80017524: e9018193 addi x3,x3,-368 # 800043b0 +80017528: 00000013 addi x0,x0,0 +8001752c: 00000013 addi x0,x0,0 +80017530: 00000013 addi x0,x0,0 +80017534: 00000013 addi x0,x0,0 +80017538: 00000013 addi x0,x0,0 +8001753c: 00000013 addi x0,x0,0 +80017540: fffe9317 auipc x6,0xfffe9 +80017544: b0030313 addi x6,x6,-1280 # 80000040 +80017548: 00000013 addi x0,x0,0 +8001754c: 00000013 addi x0,x0,0 +80017550: 00000013 addi x0,x0,0 +80017554: 00000013 addi x0,x0,0 +80017558: 00000013 addi x0,x0,0 +8001755c: 00000013 addi x0,x0,0 +80017560: 00030067 jalr x0,0(x6) + +80017564 : +80017564: 00054303 lbu x6,0(x10) +80017568: 00030a63 beq x6,x0,8001757c +8001756c: 100003b7 lui x7,0x10000 +80017570: 00638023 sb x6,0(x7) # 10000000 +80017574: 00150513 addi x10,x10,1 +80017578: fedff06f jal x0,80017564 +8001757c: 00008067 jalr x0,0(x1) + +80017580 : +80017580: ff010113 addi x2,x2,-16 +80017584: 00112023 sw x1,0(x2) +80017588: 00812223 sw x8,4(x2) +8001758c: 00000097 auipc x1,0x0 +80017590: fd8080e7 jalr x1,-40(x1) # 80017564 +80017594: 00412403 lw x8,4(x2) +80017598: 00012083 lw x1,0(x2) +8001759c: 01010113 addi x2,x2,16 +800175a0: 00008067 jalr x0,0(x1) + +800175a4 : +800175a4: 00100093 addi x1,x0,1 +800175a8: fffff297 auipc x5,0xfffff +800175ac: 05828293 addi x5,x5,88 # 80016600 + +800175b0 : +800175b0: 0012a023 sw x1,0(x5) +800175b4: 0002a223 sw x0,4(x5) + +800175b8 : +800175b8: 00000013 addi x0,x0,0 +800175bc: ffdff06f jal x0,800175b8 +800175c0: 0000006f jal x0,800175c0 + +800175c4 : +800175c4: 00300093 addi x1,x0,3 +800175c8: fffff297 auipc x5,0xfffff +800175cc: 03828293 addi x5,x5,56 # 80016600 + +800175d0 : +800175d0: 0012a023 sw x1,0(x5) +800175d4: 0002a223 sw x0,4(x5) + +800175d8 : +800175d8: 00000013 addi x0,x0,0 +800175dc: ffdff06f jal x0,800175d8 +800175e0: 0000006f jal x0,800175e0 + +800175e4 : +800175e4: 00100513 addi x10,x0,1 +800175e8: 100105b7 lui x11,0x10010 +800175ec: 00a5a023 sw x10,0(x11) # 10010000 +800175f0: 00008067 jalr x0,0(x1) + +800175f4 : +800175f4: 100105b7 lui x11,0x10010 +800175f8: 0005a023 sw x0,0(x11) # 10010000 +800175fc: 00008067 jalr x0,0(x1) + +80017600 : +80017600: 00100513 addi x10,x0,1 +80017604: 100005b7 lui x11,0x10000 +80017608: 01058593 addi x11,x11,16 # 10000010 +8001760c: 00a58023 sb x10,0(x11) +80017610: 00008067 jalr x0,0(x1) + +80017614 : +80017614: 100005b7 lui x11,0x10000 +80017618: 01058593 addi x11,x11,16 # 10000010 +8001761c: 00058023 sb x0,0(x11) +80017620: 00008067 jalr x0,0(x1) +80017624: 00000013 addi x0,x0,0 +80017628: 00000013 addi x0,x0,0 +8001762c: 00000013 addi x0,x0,0 +80017630: 00000013 addi x0,x0,0 +80017634: 00000013 addi x0,x0,0 +80017638: 00000013 addi x0,x0,0 +8001763c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-andn-00.elf.objdump b/riscv-tests/rv64-Zbkb-andn-00.elf.objdump new file mode 100644 index 0000000..93affa1 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-andn-00.elf.objdump @@ -0,0 +1,17098 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-andn-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-andn-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c510 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038600 0000000080038600 00037600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031ca 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 0000000000000000 0000000000000000 0003b885 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8ff 2**0 + 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Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080012d12 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +000000008000327c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080012d81 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032b0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +0000000080012df0 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032e4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +0000000080012e5f l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080003318 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +0000000080012ece l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +000000008000334c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +0000000080012f3d l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003380 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080012fac l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033b4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +000000008001301b l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033e8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +000000008001308a l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +000000008000341c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +00000000800130f1 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003450 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +0000000080013158 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +0000000080003484 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800131c0 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034b8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013228 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034ec l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +0000000080013288 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003520 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800132e8 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +0000000080003554 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +0000000080013348 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +0000000080003588 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800133b7 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035bc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080013426 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035f0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +0000000080013495 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080003624 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +0000000080013504 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003658 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080013573 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +000000008000368c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800135e2 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036c0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013651 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036f4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +00000000800136c0 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +0000000080003728 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +000000008001372f l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +000000008000375c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +0000000080013796 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003790 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +00000000800137fd l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037c4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013865 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037f8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +00000000800138cd l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +000000008000382c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +000000008001392d l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003860 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +000000008001398d l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003894 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +00000000800139ed l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038c8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080013a5c l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038fc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +0000000080013acb l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003930 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080013b3a l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +0000000080003964 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080013ba9 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +0000000080003998 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080013c18 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039cc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080013c87 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +0000000080003a00 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013cf6 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003a34 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555 +0000000080013d65 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str +0000000080003a68 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff +0000000080013dd4 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str +0000000080003a9c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe +0000000080013e3b l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str +0000000080003ad0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000 +0000000080013ea2 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str +0000000080003b04 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001 +0000000080013f0a l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str +0000000080003b38 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0 +0000000080013f72 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str +0000000080003b6c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1 +0000000080013fd2 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str +0000000080003ba0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2 +0000000080014032 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str +0000000080003bd4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000 +0000000080014092 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str +0000000080003c08 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001 +0000000080014101 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str +0000000080003c3c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff +0000000080014170 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str +0000000080003c70 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe +00000000800141df l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str +0000000080003ca4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff +000000008001424e l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str +0000000080003cd8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe +00000000800142bd l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003d0c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +000000008001432c l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d40 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +000000008001439b l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d74 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +000000008001440a l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003da8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +0000000080014479 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003ddc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +00000000800144e0 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e10 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +0000000080014547 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e44 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +00000000800145af l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e78 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0 +0000000080014617 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str +0000000080003eac l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1 +0000000080014677 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str +0000000080003ee0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2 +00000000800146d7 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str +0000000080003f14 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +0000000080014737 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f48 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +00000000800147a6 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f7c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +0000000080014815 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fb0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +0000000080014884 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fe4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +00000000800148f3 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004018 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +0000000080014962 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +000000008000404c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +00000000800149d1 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004080 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014a40 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040b4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014aaf l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014b1e l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +000000008000411c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014b85 l 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0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +0000000080015391 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +0000000080004594 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000 +00000000800153e9 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str +00000000800045c8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001 +0000000080015450 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str +00000000800045fc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff +00000000800154b7 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str +0000000080004630 l .text.rvtest 0000000000000000 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Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004a74 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555 +0000000080015d51 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str +0000000080004aa8 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff +0000000080015db9 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str +0000000080004adc l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe +0000000080015e19 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str +0000000080004b10 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000 +0000000080015e79 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str +0000000080004b44 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001 +0000000080015eda l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str +0000000080004b78 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0 +0000000080015f3b l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str +0000000080004bac l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1 +0000000080015f94 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str +0000000080004be0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2 +0000000080015fed l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str +0000000080004c14 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000 +0000000080016046 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str +0000000080004c48 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001 +00000000800160ae l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str +0000000080004c7c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff +0000000080016116 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str +0000000080004cb0 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe +000000008001617e l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str +0000000080004ce4 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff +00000000800161e6 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str +0000000080004d18 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe +000000008001624e l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str +0000000080004d4c l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2 +00000000800162b6 l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str +0000000080004d80 l .text.rvtest 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa +000000008001631e l .data 0000000000000000 Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004db4 l .text.rvtest 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0000000000000000 rvtest_sig_begin +000000008000c470 g .data 0000000000000000 rvtest_data_begin +000000008000c110 g .data 0000000000000000 Mtramptbl_sv +0000000080019fcd g .data 0000000000000000 rvtest_data_end +0000000080006930 g .text.rvtest 0000000000000000 cleanup_epilogs +000000008003a000 g .text.rvmodel 0000000000000000 _end +0000000080038700 g .tohost 0000000000000000 fromhost +0000000080038600 g .tohost 0000000000000000 tohost +0000000080006c10 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x429ae647c280eb13 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xf48a6b77ccda3396 + 80000048: 0001bb83 ld x23,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_andn_cg_cp_rs1_b0: + andn x29, x0, x23 # perform operation + 80000050: 41707eb3 andn x29,x0,x23 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkb_andn_cg_cp_rs1_b0, Zbkb_andn_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01d20c63 beq x4,x29,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xe0f5c3fa55ea8b05 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x279e5b0c61d9ba49 + 8000007c: 0001bf83 ld x31,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_andn_cg_cp_rs1_b1: + andn x24, x1, x31 # perform operation + 80000084: 41f0fc33 andn x24,x1,x31 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_andn_cg_cp_rs1_b1, Zbkb_andn_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01820c63 beq x4,x24,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a1 .word 0x8000e4a1 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x25, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc9803e6c6fe3fd09 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xb52164058ef83e57 + 800000b4: 0001bd03 ld x26,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_andn_cg_cp_rs1_b2: + andn x18, x2, x26 # perform operation + 800000bc: 41a17933 andn x18,x2,x26 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_andn_cg_cp_rs1_b2, Zbkb_andn_cg_cp_rs1_b2_str) + 800000c0: 000cb203 ld x4,0(x25) + 800000c4: 01220c63 beq x4,x18,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d2 .word 0x8000e4d2 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008c8c93 addi x25,x25,8 + + mv x19, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018993 addi x19,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x7edb713e3a84812a + 800000e4: 0009b183 ld x3,0(x19) + 800000e8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0x823979f11f57560a + 800000ec: 0009b503 ld x10,0(x19) + 800000f0: 00898993 addi x19,x19,8 + +00000000800000f4 : +Zbkb_andn_cg_cp_rs1_b3: + andn x16, x3, x10 # perform operation + 800000f4: 40a1f833 andn x16,x3,x10 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_andn_cg_cp_rs1_b3, Zbkb_andn_cg_cp_rs1_b3_str) + 800000f8: 000cb203 ld x4,0(x25) + 800000fc: 01020c63 beq x4,x16,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e503 .word 0x8000e503 + 80000110: 00000000 .word 0x00000000 + 80000114: 008c8c93 addi x25,x25,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x1a1b1085f035837f + 80000120: 0009b203 ld x4,0(x19) + 80000124: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xa454172bbd564b92 + 80000128: 0009b883 ld x17,0(x19) + 8000012c: 00898993 addi x19,x19,8 + +0000000080000130 : +Zbkb_andn_cg_cp_rs1_b4: + andn x11, x4, x17 # perform operation + 80000130: 411275b3 andn x11,x4,x17 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zbkb_andn_cg_cp_rs1_b4, Zbkb_andn_cg_cp_rs1_b4_str) + 80000134: 000cb683 ld x13,0(x25) + 80000138: 00b68c63 beq x13,x11,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e534 .word 0x8000e534 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x69e99c2e701df509 + 80000154: 0009b283 ld x5,0(x19) + 80000158: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x96f3e3657fcc1628 + 8000015c: 0009b103 ld x2,0(x19) + 80000160: 00898993 addi x19,x19,8 + +0000000080000164 : +Zbkb_andn_cg_cp_rs1_b5: + andn x26, x5, x2 # perform operation + 80000164: 4022fd33 andn x26,x5,x2 + # Check if x26 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x26, Zbkb_andn_cg_cp_rs1_b5, Zbkb_andn_cg_cp_rs1_b5_str) + 80000168: 000cb683 ld x13,0(x25) + 8000016c: 01a68c63 beq x13,x26,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e565 .word 0x8000e565 + 80000180: 00000000 .word 0x00000000 + 80000184: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0x7bf82801ef3249bc + 80000188: 0009b303 ld x6,0(x19) + 8000018c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x15de1a297c1c1724 + 80000190: 0009b203 ld x4,0(x19) + 80000194: 00898993 addi x19,x19,8 + +0000000080000198 : +Zbkb_andn_cg_cp_rs1_b6: + andn x8, x6, x4 # perform operation + 80000198: 40437433 andn x8,x6,x4 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zbkb_andn_cg_cp_rs1_b6, Zbkb_andn_cg_cp_rs1_b6_str) + 8000019c: 000cb683 ld x13,0(x25) + 800001a0: 00868c63 beq x13,x8,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e596 .word 0x8000e596 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x8edea332b0fc8a51 + 800001bc: 0009b383 ld x7,0(x19) + 800001c0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x42ece96427a5b508 + 800001c4: 0009b903 ld x18,0(x19) + 800001c8: 00898993 addi x19,x19,8 + +00000000800001cc : +Zbkb_andn_cg_cp_rs1_b7: + andn x17, x7, x18 # perform operation + 800001cc: 4123f8b3 andn x17,x7,x18 + # Check if x17 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x17, Zbkb_andn_cg_cp_rs1_b7, Zbkb_andn_cg_cp_rs1_b7_str) + 800001d0: 000cb683 ld x13,0(x25) + 800001d4: 01168c63 beq x13,x17,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5c7 .word 0x8000e5c7 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xea82f9b651b594b0 + 800001f0: 0009b403 ld x8,0(x19) + 800001f4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x3dc7c28b6e546ca0 + 800001f8: 0009b283 ld x5,0(x19) + 800001fc: 00898993 addi x19,x19,8 + +0000000080000200 : +Zbkb_andn_cg_cp_rs1_b8: + andn x1, x8, x5 # perform operation + 80000200: 405470b3 andn x1,x8,x5 + # Check if x1 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x1, Zbkb_andn_cg_cp_rs1_b8, Zbkb_andn_cg_cp_rs1_b8_str) + 80000204: 000cb683 ld x13,0(x25) + 80000208: 00168c63 beq x13,x1,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e5f8 .word 0x8000e5f8 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xf6cbf169b9e296b1 + 80000224: 0009b483 ld x9,0(x19) + 80000228: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0xfb2c5e6e24a38357 + 8000022c: 0009b783 ld x15,0(x19) + 80000230: 00898993 addi x19,x19,8 + +0000000080000234 : +Zbkb_andn_cg_cp_rs1_b9: + andn x1, x9, x15 # perform operation + 80000234: 40f4f0b3 andn x1,x9,x15 + # Check if x1 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x1, Zbkb_andn_cg_cp_rs1_b9, Zbkb_andn_cg_cp_rs1_b9_str) + 80000238: 000cb683 ld x13,0(x25) + 8000023c: 00168c63 beq x13,x1,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e629 .word 0x8000e629 + 80000250: 00000000 .word 0x00000000 + 80000254: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xfeb3496c801d7a86 + 80000258: 0009b503 ld x10,0(x19) + 8000025c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x2d8aed7bfa89a0df + 80000260: 0009b783 ld x15,0(x19) + 80000264: 00898993 addi x19,x19,8 + +0000000080000268 : +Zbkb_andn_cg_cp_rs1_b10: + andn x1, x10, x15 # perform operation + 80000268: 40f570b3 andn x1,x10,x15 + # Check if x1 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x1, Zbkb_andn_cg_cp_rs1_b10, Zbkb_andn_cg_cp_rs1_b10_str) + 8000026c: 000cb683 ld x13,0(x25) + 80000270: 00168c63 beq x13,x1,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e65b .word 0x8000e65b + 80000284: 00000000 .word 0x00000000 + 80000288: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x77daf72cef530cee + 8000028c: 0009b583 ld x11,0(x19) + 80000290: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x2de99c2f74877e10 + 80000294: 0009b103 ld x2,0(x19) + 80000298: 00898993 addi x19,x19,8 + +000000008000029c : +Zbkb_andn_cg_cp_rs1_b11: + andn x28, x11, x2 # perform operation + 8000029c: 4025fe33 andn x28,x11,x2 + # Check if x28 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x28, Zbkb_andn_cg_cp_rs1_b11, Zbkb_andn_cg_cp_rs1_b11_str) + 800002a0: 000cb683 ld x13,0(x25) + 800002a4: 01c68c63 beq x13,x28,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e68e .word 0x8000e68e + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x8c3ad72d68a8e30b + 800002c0: 0009b603 ld x12,0(x19) + 800002c4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0x300b441d248f0c2d + 800002c8: 0009b003 ld x0,0(x19) + 800002cc: 00898993 addi x19,x19,8 + +00000000800002d0 : +Zbkb_andn_cg_cp_rs1_b12: + andn x8, x12, x0 # perform operation + 800002d0: 40067433 andn x8,x12,x0 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zbkb_andn_cg_cp_rs1_b12, Zbkb_andn_cg_cp_rs1_b12_str) + 800002d4: 000cb683 ld x13,0(x25) + 800002d8: 00868c63 beq x13,x8,800002f0 + 800002dc: 2650776f jal x14,80007d40 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 8000e6c1 .word 0x8000e6c1 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008c8c93 addi x25,x25,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x1cec0ca9e892039d + 800002fc: 0009b683 ld x13,0(x19) + 80000300: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x78037dabc03652c6 + 80000304: 0009ba83 ld x21,0(x19) + 80000308: 00898993 addi x19,x19,8 + +000000008000030c : +Zbkb_andn_cg_cp_rs1_b13: + andn x7, x13, x21 # perform operation + 8000030c: 4156f3b3 andn x7,x13,x21 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkb_andn_cg_cp_rs1_b13, Zbkb_andn_cg_cp_rs1_b13_str) + 80000310: 000cb203 ld x4,0(x25) + 80000314: 00720c63 beq x4,x7,8000032c + 80000318: 1e9072ef jal x5,80007d00 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e6f4 .word 0x8000e6f4 + 80000328: 00000000 .word 0x00000000 + 8000032c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xa9ece99df7c73aee + 80000330: 0009b703 ld x14,0(x19) + 80000334: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xcaa86e0af2d4b8c8 + 80000338: 0009bb03 ld x22,0(x19) + 8000033c: 00898993 addi x19,x19,8 + +0000000080000340 : +Zbkb_andn_cg_cp_rs1_b14: + andn x13, x14, x22 # perform operation + 80000340: 416776b3 andn x13,x14,x22 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_andn_cg_cp_rs1_b14, Zbkb_andn_cg_cp_rs1_b14_str) + 80000344: 000cb203 ld x4,0(x25) + 80000348: 00d20c63 beq x4,x13,80000360 + 8000034c: 1b5072ef jal x5,80007d00 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e727 .word 0x8000e727 + 8000035c: 00000000 .word 0x00000000 + 80000360: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xc61e2ebde82c7ba4 + 80000364: 0009b783 ld x15,0(x19) + 80000368: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x7d482d70b73c8243 + 8000036c: 0009bf03 ld x30,0(x19) + 80000370: 00898993 addi x19,x19,8 + +0000000080000374 : +Zbkb_andn_cg_cp_rs1_b15: + andn x26, x15, x30 # perform operation + 80000374: 41e7fd33 andn x26,x15,x30 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zbkb_andn_cg_cp_rs1_b15, Zbkb_andn_cg_cp_rs1_b15_str) + 80000378: 000cb203 ld x4,0(x25) + 8000037c: 01a20c63 beq x4,x26,80000394 + 80000380: 181072ef jal x5,80007d00 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 8000e75a .word 0x8000e75a + 80000390: 00000000 .word 0x00000000 + 80000394: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x671a2bc1ca3e23de + 80000398: 0009b803 ld x16,0(x19) + 8000039c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xff9e737eca046bb9 + 800003a0: 0009b883 ld x17,0(x19) + 800003a4: 00898993 addi x19,x19,8 + +00000000800003a8 : +Zbkb_andn_cg_cp_rs1_b16: + andn x12, x16, x17 # perform operation + 800003a8: 41187633 andn x12,x16,x17 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_andn_cg_cp_rs1_b16, Zbkb_andn_cg_cp_rs1_b16_str) + 800003ac: 000cb203 ld x4,0(x25) + 800003b0: 00c20c63 beq x4,x12,800003c8 + 800003b4: 14d072ef jal x5,80007d00 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 8000e78d .word 0x8000e78d + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xca9b55b15da0ee36 + 800003cc: 0009b883 ld x17,0(x19) + 800003d0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x0ada7c93505c036f + 800003d4: 0009b403 ld x8,0(x19) + 800003d8: 00898993 addi x19,x19,8 + +00000000800003dc : +Zbkb_andn_cg_cp_rs1_b17: + andn x22, x17, x8 # perform operation + 800003dc: 4088fb33 andn x22,x17,x8 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_andn_cg_cp_rs1_b17, Zbkb_andn_cg_cp_rs1_b17_str) + 800003e0: 000cb203 ld x4,0(x25) + 800003e4: 01620c63 beq x4,x22,800003fc + 800003e8: 119072ef jal x5,80007d00 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 8000e7c0 .word 0x8000e7c0 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x656dca46d27b893b + 80000400: 0009b903 ld x18,0(x19) + 80000404: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x77ad2c3c01968f76 + 80000408: 0009b483 ld x9,0(x19) + 8000040c: 00898993 addi x19,x19,8 + +0000000080000410 : +Zbkb_andn_cg_cp_rs1_b18: + andn x1, x18, x9 # perform operation + 80000410: 409970b3 andn x1,x18,x9 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_andn_cg_cp_rs1_b18, Zbkb_andn_cg_cp_rs1_b18_str) + 80000414: 000cb203 ld x4,0(x25) + 80000418: 00120c63 beq x4,x1,80000430 + 8000041c: 0e5072ef jal x5,80007d00 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 8000e7f3 .word 0x8000e7f3 + 8000042c: 00000000 .word 0x00000000 + 80000430: 008c8c93 addi x25,x25,8 + + mv x20, x19 # switch data pointer register to avoid conflict with test + 80000434: 00098a13 addi x20,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x36081e3fe7a1e517 + 80000438: 000a3983 ld x19,0(x20) + 8000043c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xbd8025d64b89607d + 80000440: 000a3803 ld x16,0(x20) + 80000444: 008a0a13 addi x20,x20,8 + +0000000080000448 : +Zbkb_andn_cg_cp_rs1_b19: + andn x17, x19, x16 # perform operation + 80000448: 4109f8b3 andn x17,x19,x16 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_andn_cg_cp_rs1_b19, Zbkb_andn_cg_cp_rs1_b19_str) + 8000044c: 000cb203 ld x4,0(x25) + 80000450: 01120c63 beq x4,x17,80000468 + 80000454: 0ad072ef jal x5,80007d00 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8000e826 .word 0x8000e826 + 80000464: 00000000 .word 0x00000000 + 80000468: 008c8c93 addi x25,x25,8 + + mv x28, x20 # switch data pointer register to avoid conflict with test + 8000046c: 000a0e13 addi x28,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x3c3a571cb02d25cf + 80000470: 000e3a03 ld x20,0(x28) + 80000474: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xca4cd147e4fd905f + 80000478: 000e3983 ld x19,0(x28) + 8000047c: 008e0e13 addi x28,x28,8 + +0000000080000480 : +Zbkb_andn_cg_cp_rs1_b20: + andn x12, x20, x19 # perform operation + 80000480: 413a7633 andn x12,x20,x19 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_andn_cg_cp_rs1_b20, Zbkb_andn_cg_cp_rs1_b20_str) + 80000484: 000cb203 ld x4,0(x25) + 80000488: 00c20c63 beq x4,x12,800004a0 + 8000048c: 075072ef jal x5,80007d00 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 8000e859 .word 0x8000e859 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x7f134d34889bc310 + 800004a4: 000e3a83 ld x21,0(x28) + 800004a8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x05452d7cb330a4dd + 800004ac: 000e3183 ld x3,0(x28) + 800004b0: 008e0e13 addi x28,x28,8 + +00000000800004b4 : +Zbkb_andn_cg_cp_rs1_b21: + andn x13, x21, x3 # perform operation + 800004b4: 403af6b3 andn x13,x21,x3 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_andn_cg_cp_rs1_b21, Zbkb_andn_cg_cp_rs1_b21_str) + 800004b8: 000cb203 ld x4,0(x25) + 800004bc: 00d20c63 beq x4,x13,800004d4 + 800004c0: 041072ef jal x5,80007d00 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 8000e88c .word 0x8000e88c + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x156efa09ab4b2db5 + 800004d8: 000e3b03 ld x22,0(x28) + 800004dc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x683a7082bc300b7d + 800004e0: 000e3883 ld x17,0(x28) + 800004e4: 008e0e13 addi x28,x28,8 + +00000000800004e8 : +Zbkb_andn_cg_cp_rs1_b22: + andn x3, x22, x17 # perform operation + 800004e8: 411b71b3 andn x3,x22,x17 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_andn_cg_cp_rs1_b22, Zbkb_andn_cg_cp_rs1_b22_str) + 800004ec: 000cb203 ld x4,0(x25) + 800004f0: 00320c63 beq x4,x3,80000508 + 800004f4: 00d072ef jal x5,80007d00 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 8000e8bf .word 0x8000e8bf + 80000504: 00000000 .word 0x00000000 + 80000508: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0xa575a8302e947f24 + 8000050c: 000e3b83 ld x23,0(x28) + 80000510: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xdcf2bf6d2831c816 + 80000514: 000e3b03 ld x22,0(x28) + 80000518: 008e0e13 addi x28,x28,8 + +000000008000051c : +Zbkb_andn_cg_cp_rs1_b23: + andn x19, x23, x22 # perform operation + 8000051c: 416bf9b3 andn x19,x23,x22 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkb_andn_cg_cp_rs1_b23, Zbkb_andn_cg_cp_rs1_b23_str) + 80000520: 000cb203 ld x4,0(x25) + 80000524: 01320c63 beq x4,x19,8000053c + 80000528: 7d8072ef jal x5,80007d00 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8000e8f2 .word 0x8000e8f2 + 80000538: 00000000 .word 0x00000000 + 8000053c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xc8a29e4a6dfe9791 + 80000540: 000e3c03 ld x24,0(x28) + 80000544: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs2: x10 = 0x7059d8086bd10889 + 80000548: 000e3503 ld x10,0(x28) + 8000054c: 008e0e13 addi x28,x28,8 + +0000000080000550 : +Zbkb_andn_cg_cp_rs1_b24: + andn x23, x24, x10 # perform operation + 80000550: 40ac7bb3 andn x23,x24,x10 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_andn_cg_cp_rs1_b24, Zbkb_andn_cg_cp_rs1_b24_str) + 80000554: 000cb203 ld x4,0(x25) + 80000558: 01720c63 beq x4,x23,80000570 + 8000055c: 7a4072ef jal x5,80007d00 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e925 .word 0x8000e925 + 8000056c: 00000000 .word 0x00000000 + 80000570: 008c8c93 addi x25,x25,8 + + mv x15, x25 # switch signature pointer register to avoid conflict with test + 80000574: 000c8793 addi x15,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x3101de81c92d697d + 80000578: 000e3c83 ld x25,0(x28) + 8000057c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0xd0ea1464d72c4906 + 80000580: 000e3883 ld x17,0(x28) + 80000584: 008e0e13 addi x28,x28,8 + +0000000080000588 : +Zbkb_andn_cg_cp_rs1_b25: + andn x30, x25, x17 # perform operation + 80000588: 411cff33 andn x30,x25,x17 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_andn_cg_cp_rs1_b25, Zbkb_andn_cg_cp_rs1_b25_str) + 8000058c: 0007b203 ld x4,0(x15) + 80000590: 01e20c63 beq x4,x30,800005a8 + 80000594: 76c072ef jal x5,80007d00 + 80000598: 80000588 .word 0x80000588 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 8000e958 .word 0x8000e958 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xb901840a42236fa5 + 800005ac: 000e3d03 ld x26,0(x28) + 800005b0: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs2: x8 = 0x6d353886e13b4f10 + 800005b4: 000e3403 ld x8,0(x28) + 800005b8: 008e0e13 addi x28,x28,8 + +00000000800005bc : +Zbkb_andn_cg_cp_rs1_b26: + andn x16, x26, x8 # perform operation + 800005bc: 408d7833 andn x16,x26,x8 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zbkb_andn_cg_cp_rs1_b26, Zbkb_andn_cg_cp_rs1_b26_str) + 800005c0: 0007b203 ld x4,0(x15) + 800005c4: 01020c63 beq x4,x16,800005dc + 800005c8: 738072ef jal x5,80007d00 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 8000e98b .word 0x8000e98b + 800005d8: 00000000 .word 0x00000000 + 800005dc: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0xadfb28e02daf4451 + 800005e0: 000e3d83 ld x27,0(x28) + 800005e4: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs2: x0 = 0x7abfaf0c48556d81 + 800005e8: 000e3003 ld x0,0(x28) + 800005ec: 008e0e13 addi x28,x28,8 + +00000000800005f0 : +Zbkb_andn_cg_cp_rs1_b27: + andn x31, x27, x0 # perform operation + 800005f0: 400dffb3 andn x31,x27,x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_andn_cg_cp_rs1_b27, Zbkb_andn_cg_cp_rs1_b27_str) + 800005f4: 0007b203 ld x4,0(x15) + 800005f8: 01f20c63 beq x4,x31,80000610 + 800005fc: 704072ef jal x5,80007d00 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e9be .word 0x8000e9be + 8000060c: 00000000 .word 0x00000000 + 80000610: 00878793 addi x15,x15,8 + + mv x23, x28 # switch data pointer register to avoid conflict with test + 80000614: 000e0b93 addi x23,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xf6cd3b4a5127248f + 80000618: 000bbe03 ld x28,0(x23) + 8000061c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0xfa6cb4d63838b6ac + 80000620: 000bb003 ld x0,0(x23) + 80000624: 008b8b93 addi x23,x23,8 + +0000000080000628 : +Zbkb_andn_cg_cp_rs1_b28: + andn x16, x28, x0 # perform operation + 80000628: 400e7833 andn x16,x28,x0 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zbkb_andn_cg_cp_rs1_b28, Zbkb_andn_cg_cp_rs1_b28_str) + 8000062c: 0007b203 ld x4,0(x15) + 80000630: 01020c63 beq x4,x16,80000648 + 80000634: 6cc072ef jal x5,80007d00 + 80000638: 80000628 .word 0x80000628 + 8000063c: 00000000 .word 0x00000000 + 80000640: 8000e9f1 .word 0x8000e9f1 + 80000644: 00000000 .word 0x00000000 + 80000648: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x43f31dc3ec0a5d28 + 8000064c: 000bbe83 ld x29,0(x23) + 80000650: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xa0e12d3342d46227 + 80000654: 000bb503 ld x10,0(x23) + 80000658: 008b8b93 addi x23,x23,8 + +000000008000065c : +Zbkb_andn_cg_cp_rs1_b29: + andn x22, x29, x10 # perform operation + 8000065c: 40aefb33 andn x22,x29,x10 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_andn_cg_cp_rs1_b29, Zbkb_andn_cg_cp_rs1_b29_str) + 80000660: 0007b203 ld x4,0(x15) + 80000664: 01620c63 beq x4,x22,8000067c + 80000668: 698072ef jal x5,80007d00 + 8000066c: 8000065c .word 0x8000065c + 80000670: 00000000 .word 0x00000000 + 80000674: 8000ea24 .word 0x8000ea24 + 80000678: 00000000 .word 0x00000000 + 8000067c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x482f2a7975537a8a + 80000680: 000bbf03 ld x30,0(x23) + 80000684: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xce956a9939bb9459 + 80000688: 000bbc83 ld x25,0(x23) + 8000068c: 008b8b93 addi x23,x23,8 + +0000000080000690 : +Zbkb_andn_cg_cp_rs1_b30: + andn x17, x30, x25 # perform operation + 80000690: 419f78b3 andn x17,x30,x25 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_andn_cg_cp_rs1_b30, Zbkb_andn_cg_cp_rs1_b30_str) + 80000694: 0007b203 ld x4,0(x15) + 80000698: 01120c63 beq x4,x17,800006b0 + 8000069c: 664072ef jal x5,80007d00 + 800006a0: 80000690 .word 0x80000690 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 8000ea57 .word 0x8000ea57 + 800006ac: 00000000 .word 0x00000000 + 800006b0: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xc0ca3703f3313603 + 800006b4: 000bbf83 ld x31,0(x23) + 800006b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xb67e4d219e751d28 + 800006bc: 000bba83 ld x21,0(x23) + 800006c0: 008b8b93 addi x23,x23,8 + +00000000800006c4 : +Zbkb_andn_cg_cp_rs1_b31: + andn x30, x31, x21 # perform operation + 800006c4: 415fff33 andn x30,x31,x21 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_andn_cg_cp_rs1_b31, Zbkb_andn_cg_cp_rs1_b31_str) + 800006c8: 0007b203 ld x4,0(x15) + 800006cc: 01e20c63 beq x4,x30,800006e4 + 800006d0: 630072ef jal x5,80007d00 + 800006d4: 800006c4 .word 0x800006c4 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 8000ea8a .word 0x8000ea8a + 800006e0: 00000000 .word 0x00000000 + 800006e4: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xba78e51366135d02 + 800006e8: 000bb983 ld x19,0(x23) + 800006ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0xfbc8c0b08595cfca + 800006f0: 000bb003 ld x0,0(x23) + 800006f4: 008b8b93 addi x23,x23,8 + +00000000800006f8 : +Zbkb_andn_cg_cp_rs2_b0: + andn x25, x19, x0 # perform operation + 800006f8: 4009fcb3 andn x25,x19,x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_andn_cg_cp_rs2_b0, Zbkb_andn_cg_cp_rs2_b0_str) + 800006fc: 0007b203 ld x4,0(x15) + 80000700: 01920c63 beq x4,x25,80000718 + 80000704: 5fc072ef jal x5,80007d00 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 8000eabd .word 0x8000eabd + 80000714: 00000000 .word 0x00000000 + 80000718: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0995c3b2ecea20d2 + 8000071c: 000bbc03 ld x24,0(x23) + 80000720: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xfb4dc83f21f362b8 + 80000724: 000bb083 ld x1,0(x23) + 80000728: 008b8b93 addi x23,x23,8 + +000000008000072c : +Zbkb_andn_cg_cp_rs2_b1: + andn x7, x24, x1 # perform operation + 8000072c: 401c73b3 andn x7,x24,x1 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zbkb_andn_cg_cp_rs2_b1, Zbkb_andn_cg_cp_rs2_b1_str) + 80000730: 0007b203 ld x4,0(x15) + 80000734: 00720c63 beq x4,x7,8000074c + 80000738: 5c8072ef jal x5,80007d00 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000eaef .word 0x8000eaef + 80000748: 00000000 .word 0x00000000 + 8000074c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xe823928ded7a109f + 80000750: 000bb583 ld x11,0(x23) + 80000754: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xfe6458d6b3ba5be9 + 80000758: 000bb103 ld x2,0(x23) + 8000075c: 008b8b93 addi x23,x23,8 + +0000000080000760 : +Zbkb_andn_cg_cp_rs2_b2: + andn x17, x11, x2 # perform operation + 80000760: 4025f8b3 andn x17,x11,x2 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_andn_cg_cp_rs2_b2, Zbkb_andn_cg_cp_rs2_b2_str) + 80000764: 0007b203 ld x4,0(x15) + 80000768: 01120c63 beq x4,x17,80000780 + 8000076c: 594072ef jal x5,80007d00 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eb21 .word 0x8000eb21 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x5e55100bc4ea3f27 + 80000784: 000bbe83 ld x29,0(x23) + 80000788: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x1877716af595d899 + 8000078c: 000bb183 ld x3,0(x23) + 80000790: 008b8b93 addi x23,x23,8 + +0000000080000794 : +Zbkb_andn_cg_cp_rs2_b3: + andn x26, x29, x3 # perform operation + 80000794: 403efd33 andn x26,x29,x3 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zbkb_andn_cg_cp_rs2_b3, Zbkb_andn_cg_cp_rs2_b3_str) + 80000798: 0007b203 ld x4,0(x15) + 8000079c: 01a20c63 beq x4,x26,800007b4 + 800007a0: 560072ef jal x5,80007d00 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb53 .word 0x8000eb53 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00878793 addi x15,x15,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007bc: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xc454464615969df9 + 800007c0: 000bbb03 ld x22,0(x23) + 800007c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xd5ed10d21e9b8b09 + 800007c8: 000bb203 ld x4,0(x23) + 800007cc: 008b8b93 addi x23,x23,8 + +00000000800007d0 : +Zbkb_andn_cg_cp_rs2_b4: + andn x0, x22, x4 # perform operation + 800007d0: 404b7033 andn x0,x22,x4 + # Check if x0 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x0, Zbkb_andn_cg_cp_rs2_b4, Zbkb_andn_cg_cp_rs2_b4_str) + 800007d4: 0007b683 ld x13,0(x15) + 800007d8: 00068c63 beq x13,x0,800007f0 + 800007dc: 5640776f jal x14,80007d40 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000eb85 .word 0x8000eb85 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xb0c7304ba768f561 + 800007f4: 000bba83 ld x21,0(x23) + 800007f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xc20950ab61db1d82 + 800007fc: 000bb283 ld x5,0(x23) + 80000800: 008b8b93 addi x23,x23,8 + +0000000080000804 : +Zbkb_andn_cg_cp_rs2_b5: + andn x0, x21, x5 # perform operation + 80000804: 405af033 andn x0,x21,x5 + # Check if x0 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x0, Zbkb_andn_cg_cp_rs2_b5, Zbkb_andn_cg_cp_rs2_b5_str) + 80000808: 0007b683 ld x13,0(x15) + 8000080c: 00068c63 beq x13,x0,80000824 + 80000810: 5300776f jal x14,80007d40 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000ebb7 .word 0x8000ebb7 + 80000820: 00000000 .word 0x00000000 + 80000824: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x184a026aa7ef9c45 + 80000828: 000bb283 ld x5,0(x23) + 8000082c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x5337beb102b6eaaa + 80000830: 000bb303 ld x6,0(x23) + 80000834: 008b8b93 addi x23,x23,8 + +0000000080000838 : +Zbkb_andn_cg_cp_rs2_b6: + andn x12, x5, x6 # perform operation + 80000838: 4062f633 andn x12,x5,x6 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_andn_cg_cp_rs2_b6, Zbkb_andn_cg_cp_rs2_b6_str) + 8000083c: 0007b683 ld x13,0(x15) + 80000840: 00c68c63 beq x13,x12,80000858 + 80000844: 4fc0776f jal x14,80007d40 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ebe9 .word 0x8000ebe9 + 80000854: 00000000 .word 0x00000000 + 80000858: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x7038bcb6bb266d20 + 8000085c: 000bb003 ld x0,0(x23) + 80000860: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xcbbc155b7d0a9576 + 80000864: 000bb383 ld x7,0(x23) + 80000868: 008b8b93 addi x23,x23,8 + +000000008000086c : +Zbkb_andn_cg_cp_rs2_b7: + andn x21, x0, x7 # perform operation + 8000086c: 40707ab3 andn x21,x0,x7 + # Check if x21 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x21, Zbkb_andn_cg_cp_rs2_b7, Zbkb_andn_cg_cp_rs2_b7_str) + 80000870: 0007b683 ld x13,0(x15) + 80000874: 01568c63 beq x13,x21,8000088c + 80000878: 4c80776f jal x14,80007d40 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000ec1b .word 0x8000ec1b + 80000888: 00000000 .word 0x00000000 + 8000088c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x36184f9e4a406ed3 + 80000890: 000bba03 ld x20,0(x23) + 80000894: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xbe06cc336a21b429 + 80000898: 000bb403 ld x8,0(x23) + 8000089c: 008b8b93 addi x23,x23,8 + +00000000800008a0 : +Zbkb_andn_cg_cp_rs2_b8: + andn x19, x20, x8 # perform operation + 800008a0: 408a79b3 andn x19,x20,x8 + # Check if x19 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x19, Zbkb_andn_cg_cp_rs2_b8, Zbkb_andn_cg_cp_rs2_b8_str) + 800008a4: 0007b683 ld x13,0(x15) + 800008a8: 01368c63 beq x13,x19,800008c0 + 800008ac: 4940776f jal x14,80007d40 + 800008b0: 800008a0 .word 0x800008a0 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 8000ec4d .word 0x8000ec4d + 800008bc: 00000000 .word 0x00000000 + 800008c0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xfa5fc6f0a50a84a7 + 800008c4: 000bb183 ld x3,0(x23) + 800008c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x3ea083853054892b + 800008cc: 000bb483 ld x9,0(x23) + 800008d0: 008b8b93 addi x23,x23,8 + +00000000800008d4 : +Zbkb_andn_cg_cp_rs2_b9: + andn x1, x3, x9 # perform operation + 800008d4: 4091f0b3 andn x1,x3,x9 + # Check if x1 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x1, Zbkb_andn_cg_cp_rs2_b9, Zbkb_andn_cg_cp_rs2_b9_str) + 800008d8: 0007b683 ld x13,0(x15) + 800008dc: 00168c63 beq x13,x1,800008f4 + 800008e0: 4600776f jal x14,80007d40 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 8000ec7f .word 0x8000ec7f + 800008f0: 00000000 .word 0x00000000 + 800008f4: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x41b563285b6c4454 + 800008f8: 000bbd83 ld x27,0(x23) + 800008fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xc6423842b22aca13 + 80000900: 000bb503 ld x10,0(x23) + 80000904: 008b8b93 addi x23,x23,8 + +0000000080000908 : +Zbkb_andn_cg_cp_rs2_b10: + andn x4, x27, x10 # perform operation + 80000908: 40adf233 andn x4,x27,x10 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zbkb_andn_cg_cp_rs2_b10, Zbkb_andn_cg_cp_rs2_b10_str) + 8000090c: 0007b683 ld x13,0(x15) + 80000910: 00468c63 beq x13,x4,80000928 + 80000914: 42c0776f jal x14,80007d40 + 80000918: 80000908 .word 0x80000908 + 8000091c: 00000000 .word 0x00000000 + 80000920: 8000ecb1 .word 0x8000ecb1 + 80000924: 00000000 .word 0x00000000 + 80000928: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x78068744c7936d92 + 8000092c: 000bb103 ld x2,0(x23) + 80000930: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x59e35e7c376c98e1 + 80000934: 000bb583 ld x11,0(x23) + 80000938: 008b8b93 addi x23,x23,8 + +000000008000093c : +Zbkb_andn_cg_cp_rs2_b11: + andn x27, x2, x11 # perform operation + 8000093c: 40b17db3 andn x27,x2,x11 + # Check if x27 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x27, Zbkb_andn_cg_cp_rs2_b11, Zbkb_andn_cg_cp_rs2_b11_str) + 80000940: 0007b683 ld x13,0(x15) + 80000944: 01b68c63 beq x13,x27,8000095c + 80000948: 3f80776f jal x14,80007d40 + 8000094c: 8000093c .word 0x8000093c + 80000950: 00000000 .word 0x00000000 + 80000954: 8000ece4 .word 0x8000ece4 + 80000958: 00000000 .word 0x00000000 + 8000095c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x6f4e3feac8852baa + 80000960: 000bb303 ld x6,0(x23) + 80000964: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x12bb33f87e874b9c + 80000968: 000bb603 ld x12,0(x23) + 8000096c: 008b8b93 addi x23,x23,8 + +0000000080000970 : +Zbkb_andn_cg_cp_rs2_b12: + andn x5, x6, x12 # perform operation + 80000970: 40c372b3 andn x5,x6,x12 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zbkb_andn_cg_cp_rs2_b12, Zbkb_andn_cg_cp_rs2_b12_str) + 80000974: 0007b683 ld x13,0(x15) + 80000978: 00568c63 beq x13,x5,80000990 + 8000097c: 3c40776f jal x14,80007d40 + 80000980: 80000970 .word 0x80000970 + 80000984: 00000000 .word 0x00000000 + 80000988: 8000ed17 .word 0x8000ed17 + 8000098c: 00000000 .word 0x00000000 + 80000990: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000994: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000998: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xe7414d6f41aa707e + 8000099c: 000bbc83 ld x25,0(x23) + 800009a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x45d0f9669a53174c + 800009a4: 000bb683 ld x13,0(x23) + 800009a8: 008b8b93 addi x23,x23,8 + +00000000800009ac : +Zbkb_andn_cg_cp_rs2_b13: + andn x26, x25, x13 # perform operation + 800009ac: 40dcfd33 andn x26,x25,x13 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_andn_cg_cp_rs2_b13, Zbkb_andn_cg_cp_rs2_b13_str) + 800009b0: 0007b383 ld x7,0(x15) + 800009b4: 01a38c63 beq x7,x26,800009cc + 800009b8: 3600746f jal x8,80007d18 + 800009bc: 800009ac .word 0x800009ac + 800009c0: 00000000 .word 0x00000000 + 800009c4: 8000ed4a .word 0x8000ed4a + 800009c8: 00000000 .word 0x00000000 + 800009cc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x2f853b936e4af751 + 800009d0: 000bb503 ld x10,0(x23) + 800009d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x8a7cc79484bd7a11 + 800009d8: 000bb703 ld x14,0(x23) + 800009dc: 008b8b93 addi x23,x23,8 + +00000000800009e0 : +Zbkb_andn_cg_cp_rs2_b14: + andn x17, x10, x14 # perform operation + 800009e0: 40e578b3 andn x17,x10,x14 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zbkb_andn_cg_cp_rs2_b14, Zbkb_andn_cg_cp_rs2_b14_str) + 800009e4: 0007b383 ld x7,0(x15) + 800009e8: 01138c63 beq x7,x17,80000a00 + 800009ec: 32c0746f jal x8,80007d18 + 800009f0: 800009e0 .word 0x800009e0 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 8000ed7d .word 0x8000ed7d + 800009fc: 00000000 .word 0x00000000 + 80000a00: 00878793 addi x15,x15,8 + + mv x16, x15 # switch signature pointer register to avoid conflict with test + 80000a04: 00078813 addi x16,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x872e58538875fbe0 + 80000a08: 000bb083 ld x1,0(x23) + 80000a0c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0xa9a0c3461ba73a4e + 80000a10: 000bb783 ld x15,0(x23) + 80000a14: 008b8b93 addi x23,x23,8 + +0000000080000a18 : +Zbkb_andn_cg_cp_rs2_b15: + andn x13, x1, x15 # perform operation + 80000a18: 40f0f6b3 andn x13,x1,x15 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zbkb_andn_cg_cp_rs2_b15, Zbkb_andn_cg_cp_rs2_b15_str) + 80000a1c: 00083383 ld x7,0(x16) + 80000a20: 00d38c63 beq x7,x13,80000a38 + 80000a24: 2f40746f jal x8,80007d18 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 8000edb0 .word 0x8000edb0 + 80000a34: 00000000 .word 0x00000000 + 80000a38: 00880813 addi x16,x16,8 + + mv x3, x16 # switch signature pointer register to avoid conflict with test + 80000a3c: 00080193 addi x3,x16,0 +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x26b9bba5240458b7 + 80000a40: 000bb903 ld x18,0(x23) + 80000a44: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xcd4c98ae072aa299 + 80000a48: 000bb803 ld x16,0(x23) + 80000a4c: 008b8b93 addi x23,x23,8 + +0000000080000a50 : +Zbkb_andn_cg_cp_rs2_b16: + andn x2, x18, x16 # perform operation + 80000a50: 41097133 andn x2,x18,x16 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cp_rs2_b16, Zbkb_andn_cg_cp_rs2_b16_str) + 80000a54: 0001b383 ld x7,0(x3) + 80000a58: 00238c63 beq x7,x2,80000a70 + 80000a5c: 2bc0746f jal x8,80007d18 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000ede3 .word 0x8000ede3 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xf0453e5daa95559f + 80000a74: 000bba03 ld x20,0(x23) + 80000a78: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x6218660a8b2a81c5 + 80000a7c: 000bb883 ld x17,0(x23) + 80000a80: 008b8b93 addi x23,x23,8 + +0000000080000a84 : +Zbkb_andn_cg_cp_rs2_b17: + andn x28, x20, x17 # perform operation + 80000a84: 411a7e33 andn x28,x20,x17 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cp_rs2_b17, Zbkb_andn_cg_cp_rs2_b17_str) + 80000a88: 0001b383 ld x7,0(x3) + 80000a8c: 01c38c63 beq x7,x28,80000aa4 + 80000a90: 2880746f jal x8,80007d18 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 8000ee16 .word 0x8000ee16 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x1969dc2f33b990e0 + 80000aa8: 000bb303 ld x6,0(x23) + 80000aac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x7b22aa79789c9360 + 80000ab0: 000bb903 ld x18,0(x23) + 80000ab4: 008b8b93 addi x23,x23,8 + +0000000080000ab8 : +Zbkb_andn_cg_cp_rs2_b18: + andn x1, x6, x18 # perform operation + 80000ab8: 412370b3 andn x1,x6,x18 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zbkb_andn_cg_cp_rs2_b18, Zbkb_andn_cg_cp_rs2_b18_str) + 80000abc: 0001b383 ld x7,0(x3) + 80000ac0: 00138c63 beq x7,x1,80000ad8 + 80000ac4: 2540746f jal x8,80007d18 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 8000ee49 .word 0x8000ee49 + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x85191c4381090ae2 + 80000adc: 000bb103 ld x2,0(x23) + 80000ae0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x7ee607594f37db66 + 80000ae4: 000bb983 ld x19,0(x23) + 80000ae8: 008b8b93 addi x23,x23,8 + +0000000080000aec : +Zbkb_andn_cg_cp_rs2_b19: + andn x29, x2, x19 # perform operation + 80000aec: 41317eb3 andn x29,x2,x19 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cp_rs2_b19, Zbkb_andn_cg_cp_rs2_b19_str) + 80000af0: 0001b383 ld x7,0(x3) + 80000af4: 01d38c63 beq x7,x29,80000b0c + 80000af8: 2200746f jal x8,80007d18 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000ee7c .word 0x8000ee7c + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xd997371977882944 + 80000b10: 000bb683 ld x13,0(x23) + 80000b14: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xec8be576db1e90d5 + 80000b18: 000bba03 ld x20,0(x23) + 80000b1c: 008b8b93 addi x23,x23,8 + +0000000080000b20 : +Zbkb_andn_cg_cp_rs2_b20: + andn x14, x13, x20 # perform operation + 80000b20: 4146f733 andn x14,x13,x20 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cp_rs2_b20, Zbkb_andn_cg_cp_rs2_b20_str) + 80000b24: 0001b383 ld x7,0(x3) + 80000b28: 00e38c63 beq x7,x14,80000b40 + 80000b2c: 1ec0746f jal x8,80007d18 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 8000eeaf .word 0x8000eeaf + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x8f029d259a838215 + 80000b44: 000bbc83 ld x25,0(x23) + 80000b48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xfed8c86713047738 + 80000b4c: 000bba83 ld x21,0(x23) + 80000b50: 008b8b93 addi x23,x23,8 + +0000000080000b54 : +Zbkb_andn_cg_cp_rs2_b21: + andn x29, x25, x21 # perform operation + 80000b54: 415cfeb3 andn x29,x25,x21 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cp_rs2_b21, Zbkb_andn_cg_cp_rs2_b21_str) + 80000b58: 0001b383 ld x7,0(x3) + 80000b5c: 01d38c63 beq x7,x29,80000b74 + 80000b60: 1b80746f jal x8,80007d18 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000eee2 .word 0x8000eee2 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x765fdc419f73a754 + 80000b78: 000bb783 ld x15,0(x23) + 80000b7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x83dca73b7c545e49 + 80000b80: 000bbb03 ld x22,0(x23) + 80000b84: 008b8b93 addi x23,x23,8 + +0000000080000b88 : +Zbkb_andn_cg_cp_rs2_b22: + andn x6, x15, x22 # perform operation + 80000b88: 4167f333 andn x6,x15,x22 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cp_rs2_b22, Zbkb_andn_cg_cp_rs2_b22_str) + 80000b8c: 0001b383 ld x7,0(x3) + 80000b90: 00638c63 beq x7,x6,80000ba8 + 80000b94: 1840746f jal x8,80007d18 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000ef15 .word 0x8000ef15 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00818193 addi x3,x3,8 + + mv x25, x23 # switch data pointer register to avoid conflict with test + 80000bac: 000b8c93 addi x25,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xf219812ed99a81e5 + 80000bb0: 000cbc03 ld x24,0(x25) + 80000bb4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xfbf75a47e54ecb58 + 80000bb8: 000cbb83 ld x23,0(x25) + 80000bbc: 008c8c93 addi x25,x25,8 + +0000000080000bc0 : +Zbkb_andn_cg_cp_rs2_b23: + andn x13, x24, x23 # perform operation + 80000bc0: 417c76b3 andn x13,x24,x23 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cp_rs2_b23, Zbkb_andn_cg_cp_rs2_b23_str) + 80000bc4: 0001b383 ld x7,0(x3) + 80000bc8: 00d38c63 beq x7,x13,80000be0 + 80000bcc: 14c0746f jal x8,80007d18 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000ef48 .word 0x8000ef48 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x28b1115e51954c01 + 80000be4: 000cbf03 ld x30,0(x25) + 80000be8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xb9bdd1580ab54919 + 80000bec: 000cbc03 ld x24,0(x25) + 80000bf0: 008c8c93 addi x25,x25,8 + +0000000080000bf4 : +Zbkb_andn_cg_cp_rs2_b24: + andn x5, x30, x24 # perform operation + 80000bf4: 418f72b3 andn x5,x30,x24 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cp_rs2_b24, Zbkb_andn_cg_cp_rs2_b24_str) + 80000bf8: 0001b383 ld x7,0(x3) + 80000bfc: 00538c63 beq x7,x5,80000c14 + 80000c00: 1180746f jal x8,80007d18 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000ef7b .word 0x8000ef7b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00818193 addi x3,x3,8 + + mv x17, x25 # switch data pointer register to avoid conflict with test + 80000c18: 000c8893 addi x17,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5607b861b9cd9095 + 80000c1c: 0008b803 ld x16,0(x17) + 80000c20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xd0d155c1c5d52772 + 80000c24: 0008bc83 ld x25,0(x17) + 80000c28: 00888893 addi x17,x17,8 + +0000000080000c2c : +Zbkb_andn_cg_cp_rs2_b25: + andn x22, x16, x25 # perform operation + 80000c2c: 41987b33 andn x22,x16,x25 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cp_rs2_b25, Zbkb_andn_cg_cp_rs2_b25_str) + 80000c30: 0001b383 ld x7,0(x3) + 80000c34: 01638c63 beq x7,x22,80000c4c + 80000c38: 0e00746f jal x8,80007d18 + 80000c3c: 80000c2c .word 0x80000c2c + 80000c40: 00000000 .word 0x00000000 + 80000c44: 8000efae .word 0x8000efae + 80000c48: 00000000 .word 0x00000000 + 80000c4c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x4f83adc09e894d52 + 80000c50: 0008b903 ld x18,0(x17) + 80000c54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x30cec380038cf3c9 + 80000c58: 0008bd03 ld x26,0(x17) + 80000c5c: 00888893 addi x17,x17,8 + +0000000080000c60 : +Zbkb_andn_cg_cp_rs2_b26: + andn x22, x18, x26 # perform operation + 80000c60: 41a97b33 andn x22,x18,x26 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cp_rs2_b26, Zbkb_andn_cg_cp_rs2_b26_str) + 80000c64: 0001b383 ld x7,0(x3) + 80000c68: 01638c63 beq x7,x22,80000c80 + 80000c6c: 0ac0746f jal x8,80007d18 + 80000c70: 80000c60 .word 0x80000c60 + 80000c74: 00000000 .word 0x00000000 + 80000c78: 8000efe1 .word 0x8000efe1 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xf597fb518cd063f0 + 80000c84: 0008b303 ld x6,0(x17) + 80000c88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7a474a6f0c14a4ee + 80000c8c: 0008bd83 ld x27,0(x17) + 80000c90: 00888893 addi x17,x17,8 + +0000000080000c94 : +Zbkb_andn_cg_cp_rs2_b27: + andn x15, x6, x27 # perform operation + 80000c94: 41b377b3 andn x15,x6,x27 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cp_rs2_b27, Zbkb_andn_cg_cp_rs2_b27_str) + 80000c98: 0001b383 ld x7,0(x3) + 80000c9c: 00f38c63 beq x7,x15,80000cb4 + 80000ca0: 0780746f jal x8,80007d18 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000f014 .word 0x8000f014 + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x54fd3e4e76016d36 + 80000cb8: 0008bc03 ld x24,0(x17) + 80000cbc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x6df427d3d3aee540 + 80000cc0: 0008be03 ld x28,0(x17) + 80000cc4: 00888893 addi x17,x17,8 + +0000000080000cc8 : +Zbkb_andn_cg_cp_rs2_b28: + andn x10, x24, x28 # perform operation + 80000cc8: 41cc7533 andn x10,x24,x28 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cp_rs2_b28, Zbkb_andn_cg_cp_rs2_b28_str) + 80000ccc: 0001b383 ld x7,0(x3) + 80000cd0: 00a38c63 beq x7,x10,80000ce8 + 80000cd4: 0440746f jal x8,80007d18 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 8000f047 .word 0x8000f047 + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x2c6a5ab6691f5a74 + 80000cec: 0008bf83 ld x31,0(x17) + 80000cf0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x57fc13d62a50965b + 80000cf4: 0008be83 ld x29,0(x17) + 80000cf8: 00888893 addi x17,x17,8 + +0000000080000cfc : +Zbkb_andn_cg_cp_rs2_b29: + andn x2, x31, x29 # perform operation + 80000cfc: 41dff133 andn x2,x31,x29 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cp_rs2_b29, Zbkb_andn_cg_cp_rs2_b29_str) + 80000d00: 0001b383 ld x7,0(x3) + 80000d04: 00238c63 beq x7,x2,80000d1c + 80000d08: 0100746f jal x8,80007d18 + 80000d0c: 80000cfc .word 0x80000cfc + 80000d10: 00000000 .word 0x00000000 + 80000d14: 8000f07a .word 0x8000f07a + 80000d18: 00000000 .word 0x00000000 + 80000d1c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x5d522f4ca0178337 + 80000d20: 0008b603 ld x12,0(x17) + 80000d24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x3a5f98a2d2403bd0 + 80000d28: 0008bf03 ld x30,0(x17) + 80000d2c: 00888893 addi x17,x17,8 + +0000000080000d30 : +Zbkb_andn_cg_cp_rs2_b30: + andn x21, x12, x30 # perform operation + 80000d30: 41e67ab3 andn x21,x12,x30 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cp_rs2_b30, Zbkb_andn_cg_cp_rs2_b30_str) + 80000d34: 0001b383 ld x7,0(x3) + 80000d38: 01538c63 beq x7,x21,80000d50 + 80000d3c: 7dd0646f jal x8,80007d18 + 80000d40: 80000d30 .word 0x80000d30 + 80000d44: 00000000 .word 0x00000000 + 80000d48: 8000f0ad .word 0x8000f0ad + 80000d4c: 00000000 .word 0x00000000 + 80000d50: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x13229a16bf930a8a + 80000d54: 0008b003 ld x0,0(x17) + 80000d58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x063f00db196b8f1b + 80000d5c: 0008bf83 ld x31,0(x17) + 80000d60: 00888893 addi x17,x17,8 + +0000000080000d64 : +Zbkb_andn_cg_cp_rs2_b31: + andn x13, x0, x31 # perform operation + 80000d64: 41f076b3 andn x13,x0,x31 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cp_rs2_b31, Zbkb_andn_cg_cp_rs2_b31_str) + 80000d68: 0001b383 ld x7,0(x3) + 80000d6c: 00d38c63 beq x7,x13,80000d84 + 80000d70: 7a90646f jal x8,80007d18 + 80000d74: 80000d64 .word 0x80000d64 + 80000d78: 00000000 .word 0x00000000 + 80000d7c: 8000f0e0 .word 0x8000f0e0 + 80000d80: 00000000 .word 0x00000000 + 80000d84: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x87b3e234e5fd2295 + 80000d88: 0008b903 ld x18,0(x17) + 80000d8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xb66d40670f6582a4 + 80000d90: 0008ba83 ld x21,0(x17) + 80000d94: 00888893 addi x17,x17,8 + +0000000080000d98 : +Zbkb_andn_cg_cp_rd_b0: + andn x0, x18, x21 # perform operation + 80000d98: 41597033 andn x0,x18,x21 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_andn_cg_cp_rd_b0, Zbkb_andn_cg_cp_rd_b0_str) + 80000d9c: 0001b383 ld x7,0(x3) + 80000da0: 00038c63 beq x7,x0,80000db8 + 80000da4: 7750646f jal x8,80007d18 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000f113 .word 0x8000f113 + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x87abac3fc7b0a3ed + 80000dbc: 0008b303 ld x6,0(x17) + 80000dc0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xd36ba05ad13b767b + 80000dc4: 0008ba83 ld x21,0(x17) + 80000dc8: 00888893 addi x17,x17,8 + +0000000080000dcc : +Zbkb_andn_cg_cp_rd_b1: + andn x1, x6, x21 # perform operation + 80000dcc: 415370b3 andn x1,x6,x21 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zbkb_andn_cg_cp_rd_b1, Zbkb_andn_cg_cp_rd_b1_str) + 80000dd0: 0001b383 ld x7,0(x3) + 80000dd4: 00138c63 beq x7,x1,80000dec + 80000dd8: 7410646f jal x8,80007d18 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 8000f144 .word 0x8000f144 + 80000de8: 00000000 .word 0x00000000 + 80000dec: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xf417ba5d9d279816 + 80000df0: 0008b703 ld x14,0(x17) + 80000df4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xdf59e7cce2a75e8f + 80000df8: 0008be83 ld x29,0(x17) + 80000dfc: 00888893 addi x17,x17,8 + +0000000080000e00 : +Zbkb_andn_cg_cp_rd_b2: + andn x2, x14, x29 # perform operation + 80000e00: 41d77133 andn x2,x14,x29 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cp_rd_b2, Zbkb_andn_cg_cp_rd_b2_str) + 80000e04: 0001b383 ld x7,0(x3) + 80000e08: 00238c63 beq x7,x2,80000e20 + 80000e0c: 70d0646f jal x8,80007d18 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 8000f175 .word 0x8000f175 + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 00818193 addi x3,x3,8 + + mv x15, x3 # switch signature pointer register to avoid conflict with test + 80000e24: 00018793 addi x15,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x1efd002dc1bd6427 + 80000e28: 0008b303 ld x6,0(x17) + 80000e2c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x9eeea22b198cf713 + 80000e30: 0008b103 ld x2,0(x17) + 80000e34: 00888893 addi x17,x17,8 + +0000000080000e38 : +Zbkb_andn_cg_cp_rd_b3: + andn x3, x6, x2 # perform operation + 80000e38: 402371b3 andn x3,x6,x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_andn_cg_cp_rd_b3, Zbkb_andn_cg_cp_rd_b3_str) + 80000e3c: 0007b383 ld x7,0(x15) + 80000e40: 00338c63 beq x7,x3,80000e58 + 80000e44: 6d50646f jal x8,80007d18 + 80000e48: 80000e38 .word 0x80000e38 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 8000f1a6 .word 0x8000f1a6 + 80000e54: 00000000 .word 0x00000000 + 80000e58: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x2fe358d50f0dbc0e + 80000e5c: 0008b803 ld x16,0(x17) + 80000e60: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x631092c7891345ca + 80000e64: 0008b683 ld x13,0(x17) + 80000e68: 00888893 addi x17,x17,8 + +0000000080000e6c : +Zbkb_andn_cg_cp_rd_b4: + andn x4, x16, x13 # perform operation + 80000e6c: 40d87233 andn x4,x16,x13 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_andn_cg_cp_rd_b4, Zbkb_andn_cg_cp_rd_b4_str) + 80000e70: 0007b383 ld x7,0(x15) + 80000e74: 00438c63 beq x7,x4,80000e8c + 80000e78: 6a10646f jal x8,80007d18 + 80000e7c: 80000e6c .word 0x80000e6c + 80000e80: 00000000 .word 0x00000000 + 80000e84: 8000f1d7 .word 0x8000f1d7 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x1b0131671da31809 + 80000e90: 0008b983 ld x19,0(x17) + 80000e94: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x76f6f81a3026f94b + 80000e98: 0008bd03 ld x26,0(x17) + 80000e9c: 00888893 addi x17,x17,8 + +0000000080000ea0 : +Zbkb_andn_cg_cp_rd_b5: + andn x5, x19, x26 # perform operation + 80000ea0: 41a9f2b3 andn x5,x19,x26 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_andn_cg_cp_rd_b5, Zbkb_andn_cg_cp_rd_b5_str) + 80000ea4: 0007b383 ld x7,0(x15) + 80000ea8: 00538c63 beq x7,x5,80000ec0 + 80000eac: 66d0646f jal x8,80007d18 + 80000eb0: 80000ea0 .word 0x80000ea0 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 8000f208 .word 0x8000f208 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xe44d0455ebfee164 + 80000ec4: 0008b583 ld x11,0(x17) + 80000ec8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x7b27294d2aff4faf + 80000ecc: 0008bc03 ld x24,0(x17) + 80000ed0: 00888893 addi x17,x17,8 + +0000000080000ed4 : +Zbkb_andn_cg_cp_rd_b6: + andn x6, x11, x24 # perform operation + 80000ed4: 4185f333 andn x6,x11,x24 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_andn_cg_cp_rd_b6, Zbkb_andn_cg_cp_rd_b6_str) + 80000ed8: 0007b383 ld x7,0(x15) + 80000edc: 00638c63 beq x7,x6,80000ef4 + 80000ee0: 6390646f jal x8,80007d18 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 8000f239 .word 0x8000f239 + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 00878793 addi x15,x15,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ef8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000efc: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xbf3232af59bb2686 + 80000f00: 0008bf83 ld x31,0(x17) + 80000f04: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x857446c969aa6cab + 80000f08: 0008bc83 ld x25,0(x17) + 80000f0c: 00888893 addi x17,x17,8 + +0000000080000f10 : +Zbkb_andn_cg_cp_rd_b7: + andn x7, x31, x25 # perform operation + 80000f10: 419ff3b3 andn x7,x31,x25 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_andn_cg_cp_rd_b7, Zbkb_andn_cg_cp_rd_b7_str) + 80000f14: 0007b683 ld x13,0(x15) + 80000f18: 00768c63 beq x13,x7,80000f30 + 80000f1c: 6250676f jal x14,80007d40 + 80000f20: 80000f10 .word 0x80000f10 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 8000f26a .word 0x8000f26a + 80000f2c: 00000000 .word 0x00000000 + 80000f30: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x4fed61c1e000b2bc + 80000f34: 0008b583 ld x11,0(x17) + 80000f38: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x4fc5612a51d71eb7 + 80000f3c: 0008bf03 ld x30,0(x17) + 80000f40: 00888893 addi x17,x17,8 + +0000000080000f44 : +Zbkb_andn_cg_cp_rd_b8: + andn x8, x11, x30 # perform operation + 80000f44: 41e5f433 andn x8,x11,x30 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_andn_cg_cp_rd_b8, Zbkb_andn_cg_cp_rd_b8_str) + 80000f48: 0007b683 ld x13,0(x15) + 80000f4c: 00868c63 beq x13,x8,80000f64 + 80000f50: 5f10676f jal x14,80007d40 + 80000f54: 80000f44 .word 0x80000f44 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 8000f29b .word 0x8000f29b + 80000f60: 00000000 .word 0x00000000 + 80000f64: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x37f78c7a4af075c0 + 80000f68: 0008b003 ld x0,0(x17) + 80000f6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xea8fc24e83ed5f8f + 80000f70: 0008b083 ld x1,0(x17) + 80000f74: 00888893 addi x17,x17,8 + +0000000080000f78 : +Zbkb_andn_cg_cp_rd_b9: + andn x9, x0, x1 # perform operation + 80000f78: 401074b3 andn x9,x0,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_andn_cg_cp_rd_b9, Zbkb_andn_cg_cp_rd_b9_str) + 80000f7c: 0007b683 ld x13,0(x15) + 80000f80: 00968c63 beq x13,x9,80000f98 + 80000f84: 5bd0676f jal x14,80007d40 + 80000f88: 80000f78 .word 0x80000f78 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 8000f2cc .word 0x8000f2cc + 80000f94: 00000000 .word 0x00000000 + 80000f98: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x6a66218bf5bc81ec + 80000f9c: 0008b403 ld x8,0(x17) + 80000fa0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xaa1a904f973285c3 + 80000fa4: 0008bd03 ld x26,0(x17) + 80000fa8: 00888893 addi x17,x17,8 + +0000000080000fac : +Zbkb_andn_cg_cp_rd_b10: + andn x10, x8, x26 # perform operation + 80000fac: 41a47533 andn x10,x8,x26 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_andn_cg_cp_rd_b10, Zbkb_andn_cg_cp_rd_b10_str) + 80000fb0: 0007b683 ld x13,0(x15) + 80000fb4: 00a68c63 beq x13,x10,80000fcc + 80000fb8: 5890676f jal x14,80007d40 + 80000fbc: 80000fac .word 0x80000fac + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 8000f2fd .word 0x8000f2fd + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xce3ddb372d4f968d + 80000fd0: 0008ba03 ld x20,0(x17) + 80000fd4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x9aa5c0d60ca83e70 + 80000fd8: 0008b383 ld x7,0(x17) + 80000fdc: 00888893 addi x17,x17,8 + +0000000080000fe0 : +Zbkb_andn_cg_cp_rd_b11: + andn x11, x20, x7 # perform operation + 80000fe0: 407a75b3 andn x11,x20,x7 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_andn_cg_cp_rd_b11, Zbkb_andn_cg_cp_rd_b11_str) + 80000fe4: 0007b683 ld x13,0(x15) + 80000fe8: 00b68c63 beq x13,x11,80001000 + 80000fec: 5550676f jal x14,80007d40 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 8000f32f .word 0x8000f32f + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x5edb219b57e23641 + 80001004: 0008b103 ld x2,0(x17) + 80001008: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x9bada8b08bd48af8 + 8000100c: 0008b903 ld x18,0(x17) + 80001010: 00888893 addi x17,x17,8 + +0000000080001014 : +Zbkb_andn_cg_cp_rd_b12: + andn x12, x2, x18 # perform operation + 80001014: 41217633 andn x12,x2,x18 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_andn_cg_cp_rd_b12, Zbkb_andn_cg_cp_rd_b12_str) + 80001018: 0007b683 ld x13,0(x15) + 8000101c: 00c68c63 beq x13,x12,80001034 + 80001020: 5210676f jal x14,80007d40 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f361 .word 0x8000f361 + 80001030: 00000000 .word 0x00000000 + 80001034: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001038: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000103c: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x629af5f692fb5c68 + 80001040: 0008b983 ld x19,0(x17) + 80001044: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x4919d06b8c6ebe17 + 80001048: 0008b583 ld x11,0(x17) + 8000104c: 00888893 addi x17,x17,8 + +0000000080001050 : +Zbkb_andn_cg_cp_rd_b13: + andn x13, x19, x11 # perform operation + 80001050: 40b9f6b3 andn x13,x19,x11 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_andn_cg_cp_rd_b13, Zbkb_andn_cg_cp_rd_b13_str) + 80001054: 0007b383 ld x7,0(x15) + 80001058: 00d38c63 beq x7,x13,80001070 + 8000105c: 4bd0646f jal x8,80007d18 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f393 .word 0x8000f393 + 8000106c: 00000000 .word 0x00000000 + 80001070: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x14e668d996343157 + 80001074: 0008b003 ld x0,0(x17) + 80001078: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x2c3531311f4ba488 + 8000107c: 0008bc83 ld x25,0(x17) + 80001080: 00888893 addi x17,x17,8 + +0000000080001084 : +Zbkb_andn_cg_cp_rd_b14: + andn x14, x0, x25 # perform operation + 80001084: 41907733 andn x14,x0,x25 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_andn_cg_cp_rd_b14, Zbkb_andn_cg_cp_rd_b14_str) + 80001088: 0007b383 ld x7,0(x15) + 8000108c: 00e38c63 beq x7,x14,800010a4 + 80001090: 4890646f jal x8,80007d18 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f3c5 .word 0x8000f3c5 + 800010a0: 00000000 .word 0x00000000 + 800010a4: 00878793 addi x15,x15,8 + + mv x3, x15 # switch signature pointer register to avoid conflict with test + 800010a8: 00078193 addi x3,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x043f2247d06a9cf8 + 800010ac: 0008be03 ld x28,0(x17) + 800010b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x4689e22e78327cc2 + 800010b4: 0008b003 ld x0,0(x17) + 800010b8: 00888893 addi x17,x17,8 + +00000000800010bc : +Zbkb_andn_cg_cp_rd_b15: + andn x15, x28, x0 # perform operation + 800010bc: 400e77b3 andn x15,x28,x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cp_rd_b15, Zbkb_andn_cg_cp_rd_b15_str) + 800010c0: 0001b383 ld x7,0(x3) + 800010c4: 00f38c63 beq x7,x15,800010dc + 800010c8: 4510646f jal x8,80007d18 + 800010cc: 800010bc .word 0x800010bc + 800010d0: 00000000 .word 0x00000000 + 800010d4: 8000f3f7 .word 0x8000f3f7 + 800010d8: 00000000 .word 0x00000000 + 800010dc: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0bb57af438947379 + 800010e0: 0008b603 ld x12,0(x17) + 800010e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x34b62fe244e4e92f + 800010e8: 0008b503 ld x10,0(x17) + 800010ec: 00888893 addi x17,x17,8 + +00000000800010f0 : +Zbkb_andn_cg_cp_rd_b16: + andn x16, x12, x10 # perform operation + 800010f0: 40a67833 andn x16,x12,x10 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cp_rd_b16, Zbkb_andn_cg_cp_rd_b16_str) + 800010f4: 0001b383 ld x7,0(x3) + 800010f8: 01038c63 beq x7,x16,80001110 + 800010fc: 41d0646f jal x8,80007d18 + 80001100: 800010f0 .word 0x800010f0 + 80001104: 00000000 .word 0x00000000 + 80001108: 8000f429 .word 0x8000f429 + 8000110c: 00000000 .word 0x00000000 + 80001110: 00818193 addi x3,x3,8 + + mv x29, x17 # switch data pointer register to avoid conflict with test + 80001114: 00088e93 addi x29,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0xe117a6627f0b19df + 80001118: 000eb303 ld x6,0(x29) + 8000111c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x931d446dda2402d5 + 80001120: 000eb003 ld x0,0(x29) + 80001124: 008e8e93 addi x29,x29,8 + +0000000080001128 : +Zbkb_andn_cg_cp_rd_b17: + andn x17, x6, x0 # perform operation + 80001128: 400378b3 andn x17,x6,x0 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cp_rd_b17, Zbkb_andn_cg_cp_rd_b17_str) + 8000112c: 0001b383 ld x7,0(x3) + 80001130: 01138c63 beq x7,x17,80001148 + 80001134: 3e50646f jal x8,80007d18 + 80001138: 80001128 .word 0x80001128 + 8000113c: 00000000 .word 0x00000000 + 80001140: 8000f45b .word 0x8000f45b + 80001144: 00000000 .word 0x00000000 + 80001148: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0xed9b38392b30f515 + 8000114c: 000eb703 ld x14,0(x29) + 80001150: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs2: x1 = 0x4a90cc86d50c9de3 + 80001154: 000eb083 ld x1,0(x29) + 80001158: 008e8e93 addi x29,x29,8 + +000000008000115c : +Zbkb_andn_cg_cp_rd_b18: + andn x18, x14, x1 # perform operation + 8000115c: 40177933 andn x18,x14,x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cp_rd_b18, Zbkb_andn_cg_cp_rd_b18_str) + 80001160: 0001b383 ld x7,0(x3) + 80001164: 01238c63 beq x7,x18,8000117c + 80001168: 3b10646f jal x8,80007d18 + 8000116c: 8000115c .word 0x8000115c + 80001170: 00000000 .word 0x00000000 + 80001174: 8000f48d .word 0x8000f48d + 80001178: 00000000 .word 0x00000000 + 8000117c: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xcf020dcc96161ed5 + 80001180: 000eba03 ld x20,0(x29) + 80001184: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x1c69e1ecfedac35f + 80001188: 000eb803 ld x16,0(x29) + 8000118c: 008e8e93 addi x29,x29,8 + +0000000080001190 : +Zbkb_andn_cg_cp_rd_b19: + andn x19, x20, x16 # perform operation + 80001190: 410a79b3 andn x19,x20,x16 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cp_rd_b19, Zbkb_andn_cg_cp_rd_b19_str) + 80001194: 0001b383 ld x7,0(x3) + 80001198: 01338c63 beq x7,x19,800011b0 + 8000119c: 37d0646f jal x8,80007d18 + 800011a0: 80001190 .word 0x80001190 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 8000f4bf .word 0x8000f4bf + 800011ac: 00000000 .word 0x00000000 + 800011b0: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x387afb0863a54538 + 800011b4: 000eba83 ld x21,0(x29) + 800011b8: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs2: x19 = 0x67c6f3f056fbff9c + 800011bc: 000eb983 ld x19,0(x29) + 800011c0: 008e8e93 addi x29,x29,8 + +00000000800011c4 : +Zbkb_andn_cg_cp_rd_b20: + andn x20, x21, x19 # perform operation + 800011c4: 413afa33 andn x20,x21,x19 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cp_rd_b20, Zbkb_andn_cg_cp_rd_b20_str) + 800011c8: 0001b383 ld x7,0(x3) + 800011cc: 01438c63 beq x7,x20,800011e4 + 800011d0: 3490646f jal x8,80007d18 + 800011d4: 800011c4 .word 0x800011c4 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 8000f4f1 .word 0x8000f4f1 + 800011e0: 00000000 .word 0x00000000 + 800011e4: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0x88c3cef3af24c463 + 800011e8: 000eb283 ld x5,0(x29) + 800011ec: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs2: x4 = 0x09f075f16cd98ff3 + 800011f0: 000eb203 ld x4,0(x29) + 800011f4: 008e8e93 addi x29,x29,8 + +00000000800011f8 : +Zbkb_andn_cg_cp_rd_b21: + andn x21, x5, x4 # perform operation + 800011f8: 4042fab3 andn x21,x5,x4 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cp_rd_b21, Zbkb_andn_cg_cp_rd_b21_str) + 800011fc: 0001b383 ld x7,0(x3) + 80001200: 01538c63 beq x7,x21,80001218 + 80001204: 3150646f jal x8,80007d18 + 80001208: 800011f8 .word 0x800011f8 + 8000120c: 00000000 .word 0x00000000 + 80001210: 8000f523 .word 0x8000f523 + 80001214: 00000000 .word 0x00000000 + 80001218: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs1: x30 = 0xf4c3b24a9ef05447 + 8000121c: 000ebf03 ld x30,0(x29) + 80001220: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x32e22531cb119bb8 + 80001224: 000ebc83 ld x25,0(x29) + 80001228: 008e8e93 addi x29,x29,8 + +000000008000122c : +Zbkb_andn_cg_cp_rd_b22: + andn x22, x30, x25 # perform operation + 8000122c: 419f7b33 andn x22,x30,x25 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cp_rd_b22, Zbkb_andn_cg_cp_rd_b22_str) + 80001230: 0001b383 ld x7,0(x3) + 80001234: 01638c63 beq x7,x22,8000124c + 80001238: 2e10646f jal x8,80007d18 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 8000f555 .word 0x8000f555 + 80001248: 00000000 .word 0x00000000 + 8000124c: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x6d558e60ffcb9b63 + 80001250: 000eba83 ld x21,0(x29) + 80001254: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs2: x5 = 0x65ac7acb9c658f10 + 80001258: 000eb283 ld x5,0(x29) + 8000125c: 008e8e93 addi x29,x29,8 + +0000000080001260 : +Zbkb_andn_cg_cp_rd_b23: + andn x23, x21, x5 # perform operation + 80001260: 405afbb3 andn x23,x21,x5 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cp_rd_b23, Zbkb_andn_cg_cp_rd_b23_str) + 80001264: 0001b383 ld x7,0(x3) + 80001268: 01738c63 beq x7,x23,80001280 + 8000126c: 2ad0646f jal x8,80007d18 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 8000f587 .word 0x8000f587 + 8000127c: 00000000 .word 0x00000000 + 80001280: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs1: x2 = 0xca33d8d62b71a380 + 80001284: 000eb103 ld x2,0(x29) + 80001288: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0xe353db39a7117a2c + 8000128c: 000eb603 ld x12,0(x29) + 80001290: 008e8e93 addi x29,x29,8 + +0000000080001294 : +Zbkb_andn_cg_cp_rd_b24: + andn x24, x2, x12 # perform operation + 80001294: 40c17c33 andn x24,x2,x12 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cp_rd_b24, Zbkb_andn_cg_cp_rd_b24_str) + 80001298: 0001b383 ld x7,0(x3) + 8000129c: 01838c63 beq x7,x24,800012b4 + 800012a0: 2790646f jal x8,80007d18 + 800012a4: 80001294 .word 0x80001294 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 8000f5b9 .word 0x8000f5b9 + 800012b0: 00000000 .word 0x00000000 + 800012b4: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xa18cd754865c4717 + 800012b8: 000eb983 ld x19,0(x29) + 800012bc: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x367085cf667988a4 + 800012c0: 000eb003 ld x0,0(x29) + 800012c4: 008e8e93 addi x29,x29,8 + +00000000800012c8 : +Zbkb_andn_cg_cp_rd_b25: + andn x25, x19, x0 # perform operation + 800012c8: 4009fcb3 andn x25,x19,x0 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cp_rd_b25, Zbkb_andn_cg_cp_rd_b25_str) + 800012cc: 0001b383 ld x7,0(x3) + 800012d0: 01938c63 beq x7,x25,800012e8 + 800012d4: 2450646f jal x8,80007d18 + 800012d8: 800012c8 .word 0x800012c8 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 8000f5eb .word 0x8000f5eb + 800012e4: 00000000 .word 0x00000000 + 800012e8: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs1: x0 = 0x5b7607f75e5d6032 + 800012ec: 000eb003 ld x0,0(x29) + 800012f0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x63732608fee38e7e + 800012f4: 000ebf03 ld x30,0(x29) + 800012f8: 008e8e93 addi x29,x29,8 + +00000000800012fc : +Zbkb_andn_cg_cp_rd_b26: + andn x26, x0, x30 # perform operation + 800012fc: 41e07d33 andn x26,x0,x30 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cp_rd_b26, Zbkb_andn_cg_cp_rd_b26_str) + 80001300: 0001b383 ld x7,0(x3) + 80001304: 01a38c63 beq x7,x26,8000131c + 80001308: 2110646f jal x8,80007d18 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 8000f61d .word 0x8000f61d + 80001318: 00000000 .word 0x00000000 + 8000131c: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x1c425a11b72a24f3 + 80001320: 000ebb83 ld x23,0(x29) + 80001324: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x97dab98d75a548ea + 80001328: 000eb703 ld x14,0(x29) + 8000132c: 008e8e93 addi x29,x29,8 + +0000000080001330 : +Zbkb_andn_cg_cp_rd_b27: + andn x27, x23, x14 # perform operation + 80001330: 40ebfdb3 andn x27,x23,x14 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cp_rd_b27, Zbkb_andn_cg_cp_rd_b27_str) + 80001334: 0001b383 ld x7,0(x3) + 80001338: 01b38c63 beq x7,x27,80001350 + 8000133c: 1dd0646f jal x8,80007d18 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 8000f64f .word 0x8000f64f + 8000134c: 00000000 .word 0x00000000 + 80001350: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0x9f81393e1dbc5353 + 80001354: 000eb503 ld x10,0(x29) + 80001358: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x9ebd15c483324f3b + 8000135c: 000ebc03 ld x24,0(x29) + 80001360: 008e8e93 addi x29,x29,8 + +0000000080001364 : +Zbkb_andn_cg_cp_rd_b28: + andn x28, x10, x24 # perform operation + 80001364: 41857e33 andn x28,x10,x24 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cp_rd_b28, Zbkb_andn_cg_cp_rd_b28_str) + 80001368: 0001b383 ld x7,0(x3) + 8000136c: 01c38c63 beq x7,x28,80001384 + 80001370: 1a90646f jal x8,80007d18 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000f681 .word 0x8000f681 + 80001380: 00000000 .word 0x00000000 + 80001384: 00818193 addi x3,x3,8 + + mv x1, x29 # switch data pointer register to avoid conflict with test + 80001388: 000e8093 addi x1,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x1446f0a9109263c5 + 8000138c: 0000b903 ld x18,0(x1) + 80001390: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x7b58a689fbcdd05d + 80001394: 0000b583 ld x11,0(x1) + 80001398: 00808093 addi x1,x1,8 + +000000008000139c : +Zbkb_andn_cg_cp_rd_b29: + andn x29, x18, x11 # perform operation + 8000139c: 40b97eb3 andn x29,x18,x11 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cp_rd_b29, Zbkb_andn_cg_cp_rd_b29_str) + 800013a0: 0001b383 ld x7,0(x3) + 800013a4: 01d38c63 beq x7,x29,800013bc + 800013a8: 1710646f jal x8,80007d18 + 800013ac: 8000139c .word 0x8000139c + 800013b0: 00000000 .word 0x00000000 + 800013b4: 8000f6b3 .word 0x8000f6b3 + 800013b8: 00000000 .word 0x00000000 + 800013bc: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x34a08108e3e86cd2 + 800013c0: 0000b803 ld x16,0(x1) + 800013c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xdc38dca2ed01da35 + 800013c8: 0000be03 ld x28,0(x1) + 800013cc: 00808093 addi x1,x1,8 + +00000000800013d0 : +Zbkb_andn_cg_cp_rd_b30: + andn x30, x16, x28 # perform operation + 800013d0: 41c87f33 andn x30,x16,x28 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cp_rd_b30, Zbkb_andn_cg_cp_rd_b30_str) + 800013d4: 0001b383 ld x7,0(x3) + 800013d8: 01e38c63 beq x7,x30,800013f0 + 800013dc: 13d0646f jal x8,80007d18 + 800013e0: 800013d0 .word 0x800013d0 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 8000f6e5 .word 0x8000f6e5 + 800013ec: 00000000 .word 0x00000000 + 800013f0: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x2031fecf2aa66e9c + 800013f4: 0000be03 ld x28,0(x1) + 800013f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x307e7262f5c95421 + 800013fc: 0000b683 ld x13,0(x1) + 80001400: 00808093 addi x1,x1,8 + +0000000080001404 : +Zbkb_andn_cg_cp_rd_b31: + andn x31, x28, x13 # perform operation + 80001404: 40de7fb3 andn x31,x28,x13 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cp_rd_b31, Zbkb_andn_cg_cp_rd_b31_str) + 80001408: 0001b383 ld x7,0(x3) + 8000140c: 01f38c63 beq x7,x31,80001424 + 80001410: 1090646f jal x8,80007d18 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 8000f717 .word 0x8000f717 + 80001420: 00000000 .word 0x00000000 + 80001424: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000000 + 80001428: 0000b283 ld x5,0(x1) + 8000142c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x9a4f7ead3773f6a8 + 80001430: 0000b783 ld x15,0(x1) + 80001434: 00808093 addi x1,x1,8 + +0000000080001438 : +Zbkb_andn_cg_cp_rs1_edges_0x0: + andn x9, x5, x15 # perform operation + 80001438: 40f2f4b3 andn x9,x5,x15 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cp_rs1_edges_0x0, Zbkb_andn_cg_cp_rs1_edges_0x0_str) + 8000143c: 0001b383 ld x7,0(x3) + 80001440: 00938c63 beq x7,x9,80001458 + 80001444: 0d50646f jal x8,80007d18 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 8000f749 .word 0x8000f749 + 80001454: 00000000 .word 0x00000000 + 80001458: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x0000000000000001 + 8000145c: 0000bd03 ld x26,0(x1) + 80001460: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xa43f388a72ef4c5b + 80001464: 0000b103 ld x2,0(x1) + 80001468: 00808093 addi x1,x1,8 + +000000008000146c : +Zbkb_andn_cg_cp_rs1_edges_0x1: + andn x23, x26, x2 # perform operation + 8000146c: 402d7bb3 andn x23,x26,x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cp_rs1_edges_0x1, Zbkb_andn_cg_cp_rs1_edges_0x1_str) + 80001470: 0001b383 ld x7,0(x3) + 80001474: 01738c63 beq x7,x23,8000148c + 80001478: 0a10646f jal x8,80007d18 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 8000f782 .word 0x8000f782 + 80001488: 00000000 .word 0x00000000 + 8000148c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000002 + 80001490: 0000b883 ld x17,0(x1) + 80001494: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xb241b30acd1153ad + 80001498: 0000ba03 ld x20,0(x1) + 8000149c: 00808093 addi x1,x1,8 + +00000000800014a0 : +Zbkb_andn_cg_cp_rs1_edges_0x2: + andn x13, x17, x20 # perform operation + 800014a0: 4148f6b3 andn x13,x17,x20 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cp_rs1_edges_0x2, Zbkb_andn_cg_cp_rs1_edges_0x2_str) + 800014a4: 0001b383 ld x7,0(x3) + 800014a8: 00d38c63 beq x7,x13,800014c0 + 800014ac: 06d0646f jal x8,80007d18 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 8000f7bb .word 0x8000f7bb + 800014bc: 00000000 .word 0x00000000 + 800014c0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x8000000000000000 + 800014c4: 0000b583 ld x11,0(x1) + 800014c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xa24861ed20dda606 + 800014cc: 0000ba83 ld x21,0(x1) + 800014d0: 00808093 addi x1,x1,8 + +00000000800014d4 : +Zbkb_andn_cg_cp_rs1_edges_0x8000000000000000: + andn x5, x11, x21 # perform operation + 800014d4: 4155f2b3 andn x5,x11,x21 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cp_rs1_edges_0x8000000000000000, Zbkb_andn_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d8: 0001b383 ld x7,0(x3) + 800014dc: 00538c63 beq x7,x5,800014f4 + 800014e0: 0390646f jal x8,80007d18 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8000f7f4 .word 0x8000f7f4 + 800014f0: 00000000 .word 0x00000000 + 800014f4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x8000000000000001 + 800014f8: 0000b583 ld x11,0(x1) + 800014fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x1e66e6b1550ebd16 + 80001500: 0000bb03 ld x22,0(x1) + 80001504: 00808093 addi x1,x1,8 + +0000000080001508 : +Zbkb_andn_cg_cp_rs1_edges_0x8000000000000001: + andn x10, x11, x22 # perform operation + 80001508: 4165f533 andn x10,x11,x22 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cp_rs1_edges_0x8000000000000001, Zbkb_andn_cg_cp_rs1_edges_0x8000000000000001_str) + 8000150c: 0001b383 ld x7,0(x3) + 80001510: 00a38c63 beq x7,x10,80001528 + 80001514: 0050646f jal x8,80007d18 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 8000f83d .word 0x8000f83d + 80001524: 00000000 .word 0x00000000 + 80001528: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x7fffffffffffffff + 8000152c: 0000bf03 ld x30,0(x1) + 80001530: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xc181e22591fa41ce + 80001534: 0000b703 ld x14,0(x1) + 80001538: 00808093 addi x1,x1,8 + +000000008000153c : +Zbkb_andn_cg_cp_rs1_edges_0x7fffffffffffffff: + andn x18, x30, x14 # perform operation + 8000153c: 40ef7933 andn x18,x30,x14 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_andn_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001540: 0001b383 ld x7,0(x3) + 80001544: 01238c63 beq x7,x18,8000155c + 80001548: 7d00646f jal x8,80007d18 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 8000f886 .word 0x8000f886 + 80001558: 00000000 .word 0x00000000 + 8000155c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80001560: 0000b603 ld x12,0(x1) + 80001564: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x409f54a48215ac7f + 80001568: 0000ba03 ld x20,0(x1) + 8000156c: 00808093 addi x1,x1,8 + +0000000080001570 : +Zbkb_andn_cg_cp_rs1_edges_0x7ffffffffffffffe: + andn x27, x12, x20 # perform operation + 80001570: 41467db3 andn x27,x12,x20 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_andn_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001574: 0001b383 ld x7,0(x3) + 80001578: 01b38c63 beq x7,x27,80001590 + 8000157c: 79c0646f jal x8,80007d18 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 8000f8cf .word 0x8000f8cf + 8000158c: 00000000 .word 0x00000000 + 80001590: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xffffffffffffffff + 80001594: 0000b583 ld x11,0(x1) + 80001598: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x16b07c06e250ab9f + 8000159c: 0000b503 ld x10,0(x1) + 800015a0: 00808093 addi x1,x1,8 + +00000000800015a4 : +Zbkb_andn_cg_cp_rs1_edges_0xffffffffffffffff: + andn x15, x11, x10 # perform operation + 800015a4: 40a5f7b3 andn x15,x11,x10 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_andn_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a8: 0001b383 ld x7,0(x3) + 800015ac: 00f38c63 beq x7,x15,800015c4 + 800015b0: 7680646f jal x8,80007d18 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000f918 .word 0x8000f918 + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xfffffffffffffffe + 800015c8: 0000b903 ld x18,0(x1) + 800015cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x1facc43a7e30e156 + 800015d0: 0000bd03 ld x26,0(x1) + 800015d4: 00808093 addi x1,x1,8 + +00000000800015d8 : +Zbkb_andn_cg_cp_rs1_edges_0xfffffffffffffffe: + andn x10, x18, x26 # perform operation + 800015d8: 41a97533 andn x10,x18,x26 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_andn_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015dc: 0001b383 ld x7,0(x3) + 800015e0: 00a38c63 beq x7,x10,800015f8 + 800015e4: 7340646f jal x8,80007d18 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000f961 .word 0x8000f961 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800015fc: 0000b683 ld x13,0(x1) + 80001600: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x3e7d55aa0b36c9c1 + 80001604: 0000b883 ld x17,0(x1) + 80001608: 00808093 addi x1,x1,8 + +000000008000160c : +Zbkb_andn_cg_cp_rs1_edges_0x5bbc887763ae86f2: + andn x28, x13, x17 # perform operation + 8000160c: 4116fe33 andn x28,x13,x17 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_andn_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001610: 0001b383 ld x7,0(x3) + 80001614: 01c38c63 beq x7,x28,8000162c + 80001618: 7000646f jal x8,80007d18 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 8000f9aa .word 0x8000f9aa + 80001628: 00000000 .word 0x00000000 + 8000162c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80001630: 0000be03 ld x28,0(x1) + 80001634: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xbbb2edcd81815c5b + 80001638: 0000bb03 ld x22,0(x1) + 8000163c: 00808093 addi x1,x1,8 + +0000000080001640 : +Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + andn x16, x28, x22 # perform operation + 80001640: 416e7833 andn x16,x28,x22 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001644: 0001b383 ld x7,0(x3) + 80001648: 01038c63 beq x7,x16,80001660 + 8000164c: 6cc0646f jal x8,80007d18 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 8000f9f3 .word 0x8000f9f3 + 8000165c: 00000000 .word 0x00000000 + 80001660: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5555555555555555 + 80001664: 0000b683 ld x13,0(x1) + 80001668: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x00970a06fdd3cb52 + 8000166c: 0000b203 ld x4,0(x1) + 80001670: 00808093 addi x1,x1,8 + +0000000080001674 : +Zbkb_andn_cg_cp_rs1_edges_0x5555555555555555: + andn x10, x13, x4 # perform operation + 80001674: 4046f533 andn x10,x13,x4 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cp_rs1_edges_0x5555555555555555, Zbkb_andn_cg_cp_rs1_edges_0x5555555555555555_str) + 80001678: 0001b383 ld x7,0(x3) + 8000167c: 00a38c63 beq x7,x10,80001694 + 80001680: 6980646f jal x8,80007d18 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000fa3c .word 0x8000fa3c + 80001690: 00000000 .word 0x00000000 + 80001694: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000000ffffffff + 80001698: 0000ba83 ld x21,0(x1) + 8000169c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0d013e0113592839 + 800016a0: 0000bd03 ld x26,0(x1) + 800016a4: 00808093 addi x1,x1,8 + +00000000800016a8 : +Zbkb_andn_cg_cp_rs1_edges_0xffffffff: + andn x9, x21, x26 # perform operation + 800016a8: 41aaf4b3 andn x9,x21,x26 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cp_rs1_edges_0xffffffff, Zbkb_andn_cg_cp_rs1_edges_0xffffffff_str) + 800016ac: 0001b383 ld x7,0(x3) + 800016b0: 00938c63 beq x7,x9,800016c8 + 800016b4: 6640646f jal x8,80007d18 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 8000fa85 .word 0x8000fa85 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x00000000fffffffe + 800016cc: 0000b903 ld x18,0(x1) + 800016d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x77eb5186b880518a + 800016d4: 0000bc03 ld x24,0(x1) + 800016d8: 00808093 addi x1,x1,8 + +00000000800016dc : +Zbkb_andn_cg_cp_rs1_edges_0xfffffffe: + andn x22, x18, x24 # perform operation + 800016dc: 41897b33 andn x22,x18,x24 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cp_rs1_edges_0xfffffffe, Zbkb_andn_cg_cp_rs1_edges_0xfffffffe_str) + 800016e0: 0001b383 ld x7,0(x3) + 800016e4: 01638c63 beq x7,x22,800016fc + 800016e8: 6300646f jal x8,80007d18 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 8000fac6 .word 0x8000fac6 + 800016f8: 00000000 .word 0x00000000 + 800016fc: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000100000000 + 80001700: 0000b503 ld x10,0(x1) + 80001704: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xf5a415143a40c33d + 80001708: 0000b803 ld x16,0(x1) + 8000170c: 00808093 addi x1,x1,8 + +0000000080001710 : +Zbkb_andn_cg_cp_rs1_edges_0x100000000: + andn x15, x10, x16 # perform operation + 80001710: 410577b3 andn x15,x10,x16 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cp_rs1_edges_0x100000000, Zbkb_andn_cg_cp_rs1_edges_0x100000000_str) + 80001714: 0001b383 ld x7,0(x3) + 80001718: 00f38c63 beq x7,x15,80001730 + 8000171c: 5fc0646f jal x8,80007d18 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 8000fb07 .word 0x8000fb07 + 8000172c: 00000000 .word 0x00000000 + 80001730: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000100000001 + 80001734: 0000b703 ld x14,0(x1) + 80001738: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xa468287e40d8d14c + 8000173c: 0000bc03 ld x24,0(x1) + 80001740: 00808093 addi x1,x1,8 + +0000000080001744 : +Zbkb_andn_cg_cp_rs1_edges_0x100000001: + andn x9, x14, x24 # perform operation + 80001744: 418774b3 andn x9,x14,x24 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cp_rs1_edges_0x100000001, Zbkb_andn_cg_cp_rs1_edges_0x100000001_str) + 80001748: 0001b383 ld x7,0(x3) + 8000174c: 00938c63 beq x7,x9,80001764 + 80001750: 5c80646f jal x8,80007d18 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 8000fb49 .word 0x8000fb49 + 80001760: 00000000 .word 0x00000000 + 80001764: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7381f23f8a90e897 + 80001768: 0000bd03 ld x26,0(x1) + 8000176c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x0000000000000000 + 80001770: 0000ba03 ld x20,0(x1) + 80001774: 00808093 addi x1,x1,8 + +0000000080001778 : +Zbkb_andn_cg_cp_rs2_edges_0x0: + andn x16, x26, x20 # perform operation + 80001778: 414d7833 andn x16,x26,x20 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cp_rs2_edges_0x0, Zbkb_andn_cg_cp_rs2_edges_0x0_str) + 8000177c: 0001b383 ld x7,0(x3) + 80001780: 01038c63 beq x7,x16,80001798 + 80001784: 5940646f jal x8,80007d18 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 8000fb8b .word 0x8000fb8b + 80001794: 00000000 .word 0x00000000 + 80001798: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xd33262a12e9bce9e + 8000179c: 0000b883 ld x17,0(x1) + 800017a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000000000001 + 800017a4: 0000bb83 ld x23,0(x1) + 800017a8: 00808093 addi x1,x1,8 + +00000000800017ac : +Zbkb_andn_cg_cp_rs2_edges_0x1: + andn x20, x17, x23 # perform operation + 800017ac: 4178fa33 andn x20,x17,x23 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cp_rs2_edges_0x1, Zbkb_andn_cg_cp_rs2_edges_0x1_str) + 800017b0: 0001b383 ld x7,0(x3) + 800017b4: 01438c63 beq x7,x20,800017cc + 800017b8: 5600646f jal x8,80007d18 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 8000fbc5 .word 0x8000fbc5 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x30701c180a1f8471 + 800017d0: 0000b603 ld x12,0(x1) + 800017d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000002 + 800017d8: 0000bd03 ld x26,0(x1) + 800017dc: 00808093 addi x1,x1,8 + +00000000800017e0 : +Zbkb_andn_cg_cp_rs2_edges_0x2: + andn x16, x12, x26 # perform operation + 800017e0: 41a67833 andn x16,x12,x26 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cp_rs2_edges_0x2, Zbkb_andn_cg_cp_rs2_edges_0x2_str) + 800017e4: 0001b383 ld x7,0(x3) + 800017e8: 01038c63 beq x7,x16,80001800 + 800017ec: 52c0646f jal x8,80007d18 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 8000fbff .word 0x8000fbff + 800017fc: 00000000 .word 0x00000000 + 80001800: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xe1ac86246edf3851 + 80001804: 0000b303 ld x6,0(x1) + 80001808: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8000000000000000 + 8000180c: 0000b803 ld x16,0(x1) + 80001810: 00808093 addi x1,x1,8 + +0000000080001814 : +Zbkb_andn_cg_cp_rs2_edges_0x8000000000000000: + andn x26, x6, x16 # perform operation + 80001814: 41037d33 andn x26,x6,x16 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cp_rs2_edges_0x8000000000000000, Zbkb_andn_cg_cp_rs2_edges_0x8000000000000000_str) + 80001818: 0001b383 ld x7,0(x3) + 8000181c: 01a38c63 beq x7,x26,80001834 + 80001820: 4f80646f jal x8,80007d18 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000fc39 .word 0x8000fc39 + 80001830: 00000000 .word 0x00000000 + 80001834: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xdaabcb2006c9f5b1 + 80001838: 0000bc83 ld x25,0(x1) + 8000183c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x8000000000000001 + 80001840: 0000bb03 ld x22,0(x1) + 80001844: 00808093 addi x1,x1,8 + +0000000080001848 : +Zbkb_andn_cg_cp_rs2_edges_0x8000000000000001: + andn x18, x25, x22 # perform operation + 80001848: 416cf933 andn x18,x25,x22 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cp_rs2_edges_0x8000000000000001, Zbkb_andn_cg_cp_rs2_edges_0x8000000000000001_str) + 8000184c: 0001b383 ld x7,0(x3) + 80001850: 01238c63 beq x7,x18,80001868 + 80001854: 4c40646f jal x8,80007d18 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 8000fc82 .word 0x8000fc82 + 80001864: 00000000 .word 0x00000000 + 80001868: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xbddaf7f21a99d901 + 8000186c: 0000ba83 ld x21,0(x1) + 80001870: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x7fffffffffffffff + 80001874: 0000b283 ld x5,0(x1) + 80001878: 00808093 addi x1,x1,8 + +000000008000187c : +Zbkb_andn_cg_cp_rs2_edges_0x7fffffffffffffff: + andn x24, x21, x5 # perform operation + 8000187c: 405afc33 andn x24,x21,x5 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_andn_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001880: 0001b383 ld x7,0(x3) + 80001884: 01838c63 beq x7,x24,8000189c + 80001888: 4900646f jal x8,80007d18 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 8000fccb .word 0x8000fccb + 80001898: 00000000 .word 0x00000000 + 8000189c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x921fedbfba404e08 + 800018a0: 0000bc83 ld x25,0(x1) + 800018a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x7ffffffffffffffe + 800018a8: 0000b703 ld x14,0(x1) + 800018ac: 00808093 addi x1,x1,8 + +00000000800018b0 : +Zbkb_andn_cg_cp_rs2_edges_0x7ffffffffffffffe: + andn x21, x25, x14 # perform operation + 800018b0: 40ecfab3 andn x21,x25,x14 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_andn_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b4: 0001b383 ld x7,0(x3) + 800018b8: 01538c63 beq x7,x21,800018d0 + 800018bc: 45c0646f jal x8,80007d18 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 8000fd14 .word 0x8000fd14 + 800018cc: 00000000 .word 0x00000000 + 800018d0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0b856644c1fc31e8 + 800018d4: 0000b783 ld x15,0(x1) + 800018d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xffffffffffffffff + 800018dc: 0000bd83 ld x27,0(x1) + 800018e0: 00808093 addi x1,x1,8 + +00000000800018e4 : +Zbkb_andn_cg_cp_rs2_edges_0xffffffffffffffff: + andn x5, x15, x27 # perform operation + 800018e4: 41b7f2b3 andn x5,x15,x27 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_andn_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e8: 0001b383 ld x7,0(x3) + 800018ec: 00538c63 beq x7,x5,80001904 + 800018f0: 4280646f jal x8,80007d18 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 8000fd5d .word 0x8000fd5d + 80001900: 00000000 .word 0x00000000 + 80001904: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xc10f694698ff72d8 + 80001908: 0000b103 ld x2,0(x1) + 8000190c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xfffffffffffffffe + 80001910: 0000bb03 ld x22,0(x1) + 80001914: 00808093 addi x1,x1,8 + +0000000080001918 : +Zbkb_andn_cg_cp_rs2_edges_0xfffffffffffffffe: + andn x20, x2, x22 # perform operation + 80001918: 41617a33 andn x20,x2,x22 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_andn_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000191c: 0001b383 ld x7,0(x3) + 80001920: 01438c63 beq x7,x20,80001938 + 80001924: 3f40646f jal x8,80007d18 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 8000fda6 .word 0x8000fda6 + 80001934: 00000000 .word 0x00000000 + 80001938: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x5820a0f68711cda3 + 8000193c: 0000bb83 ld x23,0(x1) + 80001940: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80001944: 0000b583 ld x11,0(x1) + 80001948: 00808093 addi x1,x1,8 + +000000008000194c : +Zbkb_andn_cg_cp_rs2_edges_0x5bbc887763ae86f2: + andn x21, x23, x11 # perform operation + 8000194c: 40bbfab3 andn x21,x23,x11 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_andn_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001950: 0001b383 ld x7,0(x3) + 80001954: 01538c63 beq x7,x21,8000196c + 80001958: 3c00646f jal x8,80007d18 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 8000fdef .word 0x8000fdef + 80001968: 00000000 .word 0x00000000 + 8000196c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0578510afa6b497e + 80001970: 0000bf83 ld x31,0(x1) + 80001974: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80001978: 0000bc03 ld x24,0(x1) + 8000197c: 00808093 addi x1,x1,8 + +0000000080001980 : +Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + andn x17, x31, x24 # perform operation + 80001980: 418ff8b3 andn x17,x31,x24 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001984: 0001b383 ld x7,0(x3) + 80001988: 01138c63 beq x7,x17,800019a0 + 8000198c: 38c0646f jal x8,80007d18 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 8000fe38 .word 0x8000fe38 + 8000199c: 00000000 .word 0x00000000 + 800019a0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xcd4b64535da4c7a1 + 800019a4: 0000b783 ld x15,0(x1) + 800019a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x5555555555555555 + 800019ac: 0000bc83 ld x25,0(x1) + 800019b0: 00808093 addi x1,x1,8 + +00000000800019b4 : +Zbkb_andn_cg_cp_rs2_edges_0x5555555555555555: + andn x20, x15, x25 # perform operation + 800019b4: 4197fa33 andn x20,x15,x25 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cp_rs2_edges_0x5555555555555555, Zbkb_andn_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b8: 0001b383 ld x7,0(x3) + 800019bc: 01438c63 beq x7,x20,800019d4 + 800019c0: 3580646f jal x8,80007d18 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 8000fe81 .word 0x8000fe81 + 800019d0: 00000000 .word 0x00000000 + 800019d4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x951c88454582b38b + 800019d8: 0000ba83 ld x21,0(x1) + 800019dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000000ffffffff + 800019e0: 0000b803 ld x16,0(x1) + 800019e4: 00808093 addi x1,x1,8 + +00000000800019e8 : +Zbkb_andn_cg_cp_rs2_edges_0xffffffff: + andn x4, x21, x16 # perform operation + 800019e8: 410af233 andn x4,x21,x16 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cp_rs2_edges_0xffffffff, Zbkb_andn_cg_cp_rs2_edges_0xffffffff_str) + 800019ec: 0001b383 ld x7,0(x3) + 800019f0: 00438c63 beq x7,x4,80001a08 + 800019f4: 3240646f jal x8,80007d18 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 8000feca .word 0x8000feca + 80001a04: 00000000 .word 0x00000000 + 80001a08: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x03ec7afd31a97547 + 80001a0c: 0000b783 ld x15,0(x1) + 80001a10: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000000fffffffe + 80001a14: 0000b883 ld x17,0(x1) + 80001a18: 00808093 addi x1,x1,8 + +0000000080001a1c : +Zbkb_andn_cg_cp_rs2_edges_0xfffffffe: + andn x23, x15, x17 # perform operation + 80001a1c: 4117fbb3 andn x23,x15,x17 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cp_rs2_edges_0xfffffffe, Zbkb_andn_cg_cp_rs2_edges_0xfffffffe_str) + 80001a20: 0001b383 ld x7,0(x3) + 80001a24: 01738c63 beq x7,x23,80001a3c + 80001a28: 2f00646f jal x8,80007d18 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 8000ff0b .word 0x8000ff0b + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xfaf50e0a3d54336b + 80001a40: 0000b203 ld x4,0(x1) + 80001a44: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000100000000 + 80001a48: 0000b103 ld x2,0(x1) + 80001a4c: 00808093 addi x1,x1,8 + +0000000080001a50 : +Zbkb_andn_cg_cp_rs2_edges_0x100000000: + andn x12, x4, x2 # perform operation + 80001a50: 40227633 andn x12,x4,x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cp_rs2_edges_0x100000000, Zbkb_andn_cg_cp_rs2_edges_0x100000000_str) + 80001a54: 0001b383 ld x7,0(x3) + 80001a58: 00c38c63 beq x7,x12,80001a70 + 80001a5c: 2bc0646f jal x8,80007d18 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 8000ff4c .word 0x8000ff4c + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xa79986df0ed6e31d + 80001a74: 0000bb03 ld x22,0(x1) + 80001a78: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x0000000100000001 + 80001a7c: 0000b283 ld x5,0(x1) + 80001a80: 00808093 addi x1,x1,8 + +0000000080001a84 : +Zbkb_andn_cg_cp_rs2_edges_0x100000001: + andn x6, x22, x5 # perform operation + 80001a84: 405b7333 andn x6,x22,x5 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cp_rs2_edges_0x100000001, Zbkb_andn_cg_cp_rs2_edges_0x100000001_str) + 80001a88: 0001b383 ld x7,0(x3) + 80001a8c: 00638c63 beq x7,x6,80001aa4 + 80001a90: 2880646f jal x8,80007d18 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8000ff8e .word 0x8000ff8e + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 00818193 addi x3,x3,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000000 + 80001aa8: 0000b283 ld x5,0(x1) + 80001aac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x0000000000000000 + 80001ab0: 0000b903 ld x18,0(x1) + 80001ab4: 00808093 addi x1,x1,8 + +0000000080001ab8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + andn x4, x5, x18 # perform operation + 80001ab8: 4122f233 andn x4,x5,x18 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001abc: 0001b383 ld x7,0(x3) + 80001ac0: 00438c63 beq x7,x4,80001ad8 + 80001ac4: 2540646f jal x8,80007d18 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 8000ffd0 .word 0x8000ffd0 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x0000000000000000 + 80001adc: 0000bf03 ld x30,0(x1) + 80001ae0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000000000001 + 80001ae4: 0000b583 ld x11,0(x1) + 80001ae8: 00808093 addi x1,x1,8 + +0000000080001aec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + andn x19, x30, x11 # perform operation + 80001aec: 40bf79b3 andn x19,x30,x11 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af0: 0001b383 ld x7,0(x3) + 80001af4: 01338c63 beq x7,x19,80001b0c + 80001af8: 2200646f jal x8,80007d18 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 80010021 .word 0x80010021 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000000000000 + 80001b10: 0000b903 ld x18,0(x1) + 80001b14: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000000000002 + 80001b18: 0000b803 ld x16,0(x1) + 80001b1c: 00808093 addi x1,x1,8 + +0000000080001b20 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + andn x6, x18, x16 # perform operation + 80001b20: 41097333 andn x6,x18,x16 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b24: 0001b383 ld x7,0(x3) + 80001b28: 00638c63 beq x7,x6,80001b40 + 80001b2c: 1ec0646f jal x8,80007d18 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 80010072 .word 0x80010072 + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000000000000 + 80001b44: 0000bf83 ld x31,0(x1) + 80001b48: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x8000000000000000 + 80001b4c: 0000b583 ld x11,0(x1) + 80001b50: 00808093 addi x1,x1,8 + +0000000080001b54 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + andn x9, x31, x11 # perform operation + 80001b54: 40bff4b3 andn x9,x31,x11 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b58: 0001b383 ld x7,0(x3) + 80001b5c: 00938c63 beq x7,x9,80001b74 + 80001b60: 1b80646f jal x8,80007d18 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 800100c3 .word 0x800100c3 + 80001b70: 00000000 .word 0x00000000 + 80001b74: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000000000000 + 80001b78: 0000b303 ld x6,0(x1) + 80001b7c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x8000000000000001 + 80001b80: 0000b783 ld x15,0(x1) + 80001b84: 00808093 addi x1,x1,8 + +0000000080001b88 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + andn x4, x6, x15 # perform operation + 80001b88: 40f37233 andn x4,x6,x15 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b8c: 0001b383 ld x7,0(x3) + 80001b90: 00438c63 beq x7,x4,80001ba8 + 80001b94: 1840646f jal x8,80007d18 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 80010123 .word 0x80010123 + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000000 + 80001bac: 0000b883 ld x17,0(x1) + 80001bb0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7fffffffffffffff + 80001bb4: 0000bd83 ld x27,0(x1) + 80001bb8: 00808093 addi x1,x1,8 + +0000000080001bbc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + andn x29, x17, x27 # perform operation + 80001bbc: 41b8feb3 andn x29,x17,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc0: 0001b383 ld x7,0(x3) + 80001bc4: 01d38c63 beq x7,x29,80001bdc + 80001bc8: 1500646f jal x8,80007d18 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 80010183 .word 0x80010183 + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0000000000000000 + 80001be0: 0000b683 ld x13,0(x1) + 80001be4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80001be8: 0000ba03 ld x20,0(x1) + 80001bec: 00808093 addi x1,x1,8 + +0000000080001bf0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + andn x12, x13, x20 # perform operation + 80001bf0: 4146f633 andn x12,x13,x20 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf4: 0001b383 ld x7,0(x3) + 80001bf8: 00c38c63 beq x7,x12,80001c10 + 80001bfc: 11c0646f jal x8,80007d18 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 800101e3 .word 0x800101e3 + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000000000000 + 80001c14: 0000bf83 ld x31,0(x1) + 80001c18: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xffffffffffffffff + 80001c1c: 0000b203 ld x4,0(x1) + 80001c20: 00808093 addi x1,x1,8 + +0000000080001c24 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + andn x17, x31, x4 # perform operation + 80001c24: 404ff8b3 andn x17,x31,x4 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c28: 0001b383 ld x7,0(x3) + 80001c2c: 01138c63 beq x7,x17,80001c44 + 80001c30: 0e80646f jal x8,80007d18 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 80010243 .word 0x80010243 + 80001c40: 00000000 .word 0x00000000 + 80001c44: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000000000000 + 80001c48: 0000b483 ld x9,0(x1) + 80001c4c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xfffffffffffffffe + 80001c50: 0000bc03 ld x24,0(x1) + 80001c54: 00808093 addi x1,x1,8 + +0000000080001c58 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + andn x27, x9, x24 # perform operation + 80001c58: 4184fdb3 andn x27,x9,x24 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c5c: 0001b383 ld x7,0(x3) + 80001c60: 01b38c63 beq x7,x27,80001c78 + 80001c64: 0b40646f jal x8,80007d18 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 800102a3 .word 0x800102a3 + 80001c74: 00000000 .word 0x00000000 + 80001c78: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000000 + 80001c7c: 0000b283 ld x5,0(x1) + 80001c80: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80001c84: 0000b483 ld x9,0(x1) + 80001c88: 00808093 addi x1,x1,8 + +0000000080001c8c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + andn x21, x5, x9 # perform operation + 80001c8c: 4092fab3 andn x21,x5,x9 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c90: 0001b383 ld x7,0(x3) + 80001c94: 01538c63 beq x7,x21,80001cac + 80001c98: 0800646f jal x8,80007d18 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 80010303 .word 0x80010303 + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000000 + 80001cb0: 0000b883 ld x17,0(x1) + 80001cb4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80001cb8: 0000b603 ld x12,0(x1) + 80001cbc: 00808093 addi x1,x1,8 + +0000000080001cc0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + andn x15, x17, x12 # perform operation + 80001cc0: 40c8f7b3 andn x15,x17,x12 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc4: 0001b383 ld x7,0(x3) + 80001cc8: 00f38c63 beq x7,x15,80001ce0 + 80001ccc: 04c0646f jal x8,80007d18 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 80010363 .word 0x80010363 + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000000000000 + 80001ce4: 0000b603 ld x12,0(x1) + 80001ce8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x5555555555555555 + 80001cec: 0000bd83 ld x27,0(x1) + 80001cf0: 00808093 addi x1,x1,8 + +0000000080001cf4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + andn x10, x12, x27 # perform operation + 80001cf4: 41b67533 andn x10,x12,x27 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf8: 0001b383 ld x7,0(x3) + 80001cfc: 00a38c63 beq x7,x10,80001d14 + 80001d00: 0180646f jal x8,80007d18 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 800103c3 .word 0x800103c3 + 80001d10: 00000000 .word 0x00000000 + 80001d14: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000000 + 80001d18: 0000b803 ld x16,0(x1) + 80001d1c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000000ffffffff + 80001d20: 0000b883 ld x17,0(x1) + 80001d24: 00808093 addi x1,x1,8 + +0000000080001d28 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + andn x19, x16, x17 # perform operation + 80001d28: 411879b3 andn x19,x16,x17 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d2c: 0001b383 ld x7,0(x3) + 80001d30: 01338c63 beq x7,x19,80001d48 + 80001d34: 7e50546f jal x8,80007d18 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 80010423 .word 0x80010423 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000000000000 + 80001d4c: 0000b783 ld x15,0(x1) + 80001d50: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000000fffffffe + 80001d54: 0000b883 ld x17,0(x1) + 80001d58: 00808093 addi x1,x1,8 + +0000000080001d5c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + andn x26, x15, x17 # perform operation + 80001d5c: 4117fd33 andn x26,x15,x17 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d60: 0001b383 ld x7,0(x3) + 80001d64: 01a38c63 beq x7,x26,80001d7c + 80001d68: 7b10546f jal x8,80007d18 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 8001047b .word 0x8001047b + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000000 + 80001d80: 0000b983 ld x19,0(x1) + 80001d84: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000100000000 + 80001d88: 0000b303 ld x6,0(x1) + 80001d8c: 00808093 addi x1,x1,8 + +0000000080001d90 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + andn x11, x19, x6 # perform operation + 80001d90: 4069f5b3 andn x11,x19,x6 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d94: 0001b383 ld x7,0(x3) + 80001d98: 00b38c63 beq x7,x11,80001db0 + 80001d9c: 77d0546f jal x8,80007d18 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 800104d3 .word 0x800104d3 + 80001dac: 00000000 .word 0x00000000 + 80001db0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000000 + 80001db4: 0000b803 ld x16,0(x1) + 80001db8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000100000001 + 80001dbc: 0000bb83 ld x23,0(x1) + 80001dc0: 00808093 addi x1,x1,8 + +0000000080001dc4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + andn x4, x16, x23 # perform operation + 80001dc4: 41787233 andn x4,x16,x23 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc8: 0001b383 ld x7,0(x3) + 80001dcc: 00438c63 beq x7,x4,80001de4 + 80001dd0: 7490546f jal x8,80007d18 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 8001052c .word 0x8001052c + 80001de0: 00000000 .word 0x00000000 + 80001de4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000001 + 80001de8: 0000b883 ld x17,0(x1) + 80001dec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000000 + 80001df0: 0000bc03 ld x24,0(x1) + 80001df4: 00808093 addi x1,x1,8 + +0000000080001df8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + andn x22, x17, x24 # perform operation + 80001df8: 4188fb33 andn x22,x17,x24 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dfc: 0001b383 ld x7,0(x3) + 80001e00: 01638c63 beq x7,x22,80001e18 + 80001e04: 7150546f jal x8,80007d18 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 80010585 .word 0x80010585 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000000000001 + 80001e1c: 0000b783 ld x15,0(x1) + 80001e20: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000001 + 80001e24: 0000bc03 ld x24,0(x1) + 80001e28: 00808093 addi x1,x1,8 + +0000000080001e2c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + andn x2, x15, x24 # perform operation + 80001e2c: 4187f133 andn x2,x15,x24 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e30: 0001b383 ld x7,0(x3) + 80001e34: 00238c63 beq x7,x2,80001e4c + 80001e38: 6e10546f jal x8,80007d18 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 800105d6 .word 0x800105d6 + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000001 + 80001e50: 0000b803 ld x16,0(x1) + 80001e54: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000000000002 + 80001e58: 0000b703 ld x14,0(x1) + 80001e5c: 00808093 addi x1,x1,8 + +0000000080001e60 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + andn x30, x16, x14 # perform operation + 80001e60: 40e87f33 andn x30,x16,x14 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e64: 0001b383 ld x7,0(x3) + 80001e68: 01e38c63 beq x7,x30,80001e80 + 80001e6c: 6ad0546f jal x8,80007d18 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 80010627 .word 0x80010627 + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x0000000000000001 + 80001e84: 0000bb03 ld x22,0(x1) + 80001e88: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x8000000000000000 + 80001e8c: 0000b483 ld x9,0(x1) + 80001e90: 00808093 addi x1,x1,8 + +0000000080001e94 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + andn x10, x22, x9 # perform operation + 80001e94: 409b7533 andn x10,x22,x9 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e98: 0001b383 ld x7,0(x3) + 80001e9c: 00a38c63 beq x7,x10,80001eb4 + 80001ea0: 6790546f jal x8,80007d18 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 80010678 .word 0x80010678 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000000000001 + 80001eb8: 0000b503 ld x10,0(x1) + 80001ebc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x8000000000000001 + 80001ec0: 0000b483 ld x9,0(x1) + 80001ec4: 00808093 addi x1,x1,8 + +0000000080001ec8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + andn x25, x10, x9 # perform operation + 80001ec8: 40957cb3 andn x25,x10,x9 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ecc: 0001b383 ld x7,0(x3) + 80001ed0: 01938c63 beq x7,x25,80001ee8 + 80001ed4: 6450546f jal x8,80007d18 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 800106d8 .word 0x800106d8 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000001 + 80001eec: 0000b583 ld x11,0(x1) + 80001ef0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7fffffffffffffff + 80001ef4: 0000bb03 ld x22,0(x1) + 80001ef8: 00808093 addi x1,x1,8 + +0000000080001efc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + andn x28, x11, x22 # perform operation + 80001efc: 4165fe33 andn x28,x11,x22 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f00: 0001b383 ld x7,0(x3) + 80001f04: 01c38c63 beq x7,x28,80001f1c + 80001f08: 6110546f jal x8,80007d18 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 80010738 .word 0x80010738 + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000001 + 80001f20: 0000b283 ld x5,0(x1) + 80001f24: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7ffffffffffffffe + 80001f28: 0000be03 ld x28,0(x1) + 80001f2c: 00808093 addi x1,x1,8 + +0000000080001f30 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + andn x16, x5, x28 # perform operation + 80001f30: 41c2f833 andn x16,x5,x28 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f34: 0001b383 ld x7,0(x3) + 80001f38: 01038c63 beq x7,x16,80001f50 + 80001f3c: 5dd0546f jal x8,80007d18 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 80010798 .word 0x80010798 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000001 + 80001f54: 0000b883 ld x17,0(x1) + 80001f58: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xffffffffffffffff + 80001f5c: 0000ba83 ld x21,0(x1) + 80001f60: 00808093 addi x1,x1,8 + +0000000080001f64 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + andn x6, x17, x21 # perform operation + 80001f64: 4158f333 andn x6,x17,x21 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f68: 0001b383 ld x7,0(x3) + 80001f6c: 00638c63 beq x7,x6,80001f84 + 80001f70: 5a90546f jal x8,80007d18 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 800107f8 .word 0x800107f8 + 80001f80: 00000000 .word 0x00000000 + 80001f84: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000000000001 + 80001f88: 0000ba03 ld x20,0(x1) + 80001f8c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xfffffffffffffffe + 80001f90: 0000b583 ld x11,0(x1) + 80001f94: 00808093 addi x1,x1,8 + +0000000080001f98 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + andn x10, x20, x11 # perform operation + 80001f98: 40ba7533 andn x10,x20,x11 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f9c: 0001b383 ld x7,0(x3) + 80001fa0: 00a38c63 beq x7,x10,80001fb8 + 80001fa4: 5750546f jal x8,80007d18 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 80010858 .word 0x80010858 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000001 + 80001fbc: 0000b803 ld x16,0(x1) + 80001fc0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80001fc4: 0000b703 ld x14,0(x1) + 80001fc8: 00808093 addi x1,x1,8 + +0000000080001fcc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + andn x15, x16, x14 # perform operation + 80001fcc: 40e877b3 andn x15,x16,x14 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd0: 0001b383 ld x7,0(x3) + 80001fd4: 00f38c63 beq x7,x15,80001fec + 80001fd8: 5410546f jal x8,80007d18 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 800108b8 .word 0x800108b8 + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000001 + 80001ff0: 0000b803 ld x16,0(x1) + 80001ff4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80001ff8: 0000b583 ld x11,0(x1) + 80001ffc: 00808093 addi x1,x1,8 + +0000000080002000 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + andn x27, x16, x11 # perform operation + 80002000: 40b87db3 andn x27,x16,x11 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002004: 0001b383 ld x7,0(x3) + 80002008: 01b38c63 beq x7,x27,80002020 + 8000200c: 50d0546f jal x8,80007d18 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 80010918 .word 0x80010918 + 8000201c: 00000000 .word 0x00000000 + 80002020: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0000000000000001 + 80002024: 0000be83 ld x29,0(x1) + 80002028: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x5555555555555555 + 8000202c: 0000bb83 ld x23,0(x1) + 80002030: 00808093 addi x1,x1,8 + +0000000080002034 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + andn x26, x29, x23 # perform operation + 80002034: 417efd33 andn x26,x29,x23 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002038: 0001b383 ld x7,0(x3) + 8000203c: 01a38c63 beq x7,x26,80002054 + 80002040: 4d90546f jal x8,80007d18 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 80010978 .word 0x80010978 + 80002050: 00000000 .word 0x00000000 + 80002054: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000001 + 80002058: 0000b283 ld x5,0(x1) + 8000205c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000000ffffffff + 80002060: 0000b683 ld x13,0(x1) + 80002064: 00808093 addi x1,x1,8 + +0000000080002068 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + andn x29, x5, x13 # perform operation + 80002068: 40d2feb3 andn x29,x5,x13 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000206c: 0001b383 ld x7,0(x3) + 80002070: 01d38c63 beq x7,x29,80002088 + 80002074: 4a50546f jal x8,80007d18 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 800109d8 .word 0x800109d8 + 80002084: 00000000 .word 0x00000000 + 80002088: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000001 + 8000208c: 0000b283 ld x5,0(x1) + 80002090: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000fffffffe + 80002094: 0000b783 ld x15,0(x1) + 80002098: 00808093 addi x1,x1,8 + +000000008000209c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + andn x13, x5, x15 # perform operation + 8000209c: 40f2f6b3 andn x13,x5,x15 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a0: 0001b383 ld x7,0(x3) + 800020a4: 00d38c63 beq x7,x13,800020bc + 800020a8: 4710546f jal x8,80007d18 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80010a30 .word 0x80010a30 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000001 + 800020c0: 0000bc83 ld x25,0(x1) + 800020c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000100000000 + 800020c8: 0000b703 ld x14,0(x1) + 800020cc: 00808093 addi x1,x1,8 + +00000000800020d0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + andn x10, x25, x14 # perform operation + 800020d0: 40ecf533 andn x10,x25,x14 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d4: 0001b383 ld x7,0(x3) + 800020d8: 00a38c63 beq x7,x10,800020f0 + 800020dc: 43d0546f jal x8,80007d18 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 80010a88 .word 0x80010a88 + 800020ec: 00000000 .word 0x00000000 + 800020f0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000000000001 + 800020f4: 0000b603 ld x12,0(x1) + 800020f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000001 + 800020fc: 0000bf83 ld x31,0(x1) + 80002100: 00808093 addi x1,x1,8 + +0000000080002104 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + andn x2, x12, x31 # perform operation + 80002104: 41f67133 andn x2,x12,x31 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002108: 0001b383 ld x7,0(x3) + 8000210c: 00238c63 beq x7,x2,80002124 + 80002110: 4090546f jal x8,80007d18 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80010ae1 .word 0x80010ae1 + 80002120: 00000000 .word 0x00000000 + 80002124: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000000000002 + 80002128: 0000b783 ld x15,0(x1) + 8000212c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000000 + 80002130: 0000bd03 ld x26,0(x1) + 80002134: 00808093 addi x1,x1,8 + +0000000080002138 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + andn x20, x15, x26 # perform operation + 80002138: 41a7fa33 andn x20,x15,x26 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000213c: 0001b383 ld x7,0(x3) + 80002140: 01438c63 beq x7,x20,80002158 + 80002144: 3d50546f jal x8,80007d18 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80010b3a .word 0x80010b3a + 80002154: 00000000 .word 0x00000000 + 80002158: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000002 + 8000215c: 0000b983 ld x19,0(x1) + 80002160: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000001 + 80002164: 0000ba83 ld x21,0(x1) + 80002168: 00808093 addi x1,x1,8 + +000000008000216c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + andn x29, x19, x21 # perform operation + 8000216c: 4159feb3 andn x29,x19,x21 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002170: 0001b383 ld x7,0(x3) + 80002174: 01d38c63 beq x7,x29,8000218c + 80002178: 3a10546f jal x8,80007d18 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 80010b8b .word 0x80010b8b + 80002188: 00000000 .word 0x00000000 + 8000218c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000002 + 80002190: 0000bc83 ld x25,0(x1) + 80002194: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x0000000000000002 + 80002198: 0000b783 ld x15,0(x1) + 8000219c: 00808093 addi x1,x1,8 + +00000000800021a0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + andn x11, x25, x15 # perform operation + 800021a0: 40fcf5b3 andn x11,x25,x15 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a4: 0001b383 ld x7,0(x3) + 800021a8: 00b38c63 beq x7,x11,800021c0 + 800021ac: 36d0546f jal x8,80007d18 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80010bdc .word 0x80010bdc + 800021bc: 00000000 .word 0x00000000 + 800021c0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000002 + 800021c4: 0000b883 ld x17,0(x1) + 800021c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x8000000000000000 + 800021cc: 0000b103 ld x2,0(x1) + 800021d0: 00808093 addi x1,x1,8 + +00000000800021d4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + andn x11, x17, x2 # perform operation + 800021d4: 4028f5b3 andn x11,x17,x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d8: 0001b383 ld x7,0(x3) + 800021dc: 00b38c63 beq x7,x11,800021f4 + 800021e0: 3390546f jal x8,80007d18 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80010c2d .word 0x80010c2d + 800021f0: 00000000 .word 0x00000000 + 800021f4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000002 + 800021f8: 0000b703 ld x14,0(x1) + 800021fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x8000000000000001 + 80002200: 0000bd03 ld x26,0(x1) + 80002204: 00808093 addi x1,x1,8 + +0000000080002208 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + andn x4, x14, x26 # perform operation + 80002208: 41a77233 andn x4,x14,x26 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 8000220c: 0001b383 ld x7,0(x3) + 80002210: 00438c63 beq x7,x4,80002228 + 80002214: 3050546f jal x8,80007d18 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80010c8d .word 0x80010c8d + 80002224: 00000000 .word 0x00000000 + 80002228: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000002 + 8000222c: 0000bc83 ld x25,0(x1) + 80002230: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x7fffffffffffffff + 80002234: 0000b703 ld x14,0(x1) + 80002238: 00808093 addi x1,x1,8 + +000000008000223c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + andn x17, x25, x14 # perform operation + 8000223c: 40ecf8b3 andn x17,x25,x14 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002240: 0001b383 ld x7,0(x3) + 80002244: 01138c63 beq x7,x17,8000225c + 80002248: 2d10546f jal x8,80007d18 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80010ced .word 0x80010ced + 80002258: 00000000 .word 0x00000000 + 8000225c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000000000002 + 80002260: 0000b783 ld x15,0(x1) + 80002264: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x7ffffffffffffffe + 80002268: 0000b683 ld x13,0(x1) + 8000226c: 00808093 addi x1,x1,8 + +0000000080002270 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + andn x24, x15, x13 # perform operation + 80002270: 40d7fc33 andn x24,x15,x13 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002274: 0001b383 ld x7,0(x3) + 80002278: 01838c63 beq x7,x24,80002290 + 8000227c: 29d0546f jal x8,80007d18 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80010d4d .word 0x80010d4d + 8000228c: 00000000 .word 0x00000000 + 80002290: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000002 + 80002294: 0000b583 ld x11,0(x1) + 80002298: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 8000229c: 0000bf83 ld x31,0(x1) + 800022a0: 00808093 addi x1,x1,8 + +00000000800022a4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + andn x25, x11, x31 # perform operation + 800022a4: 41f5fcb3 andn x25,x11,x31 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a8: 0001b383 ld x7,0(x3) + 800022ac: 01938c63 beq x7,x25,800022c4 + 800022b0: 2690546f jal x8,80007d18 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80010dad .word 0x80010dad + 800022c0: 00000000 .word 0x00000000 + 800022c4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x0000000000000002 + 800022c8: 0000bb83 ld x23,0(x1) + 800022cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xfffffffffffffffe + 800022d0: 0000b203 ld x4,0(x1) + 800022d4: 00808093 addi x1,x1,8 + +00000000800022d8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + andn x13, x23, x4 # perform operation + 800022d8: 404bf6b3 andn x13,x23,x4 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022dc: 0001b383 ld x7,0(x3) + 800022e0: 00d38c63 beq x7,x13,800022f8 + 800022e4: 2350546f jal x8,80007d18 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 80010e0d .word 0x80010e0d + 800022f4: 00000000 .word 0x00000000 + 800022f8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x0000000000000002 + 800022fc: 0000bd83 ld x27,0(x1) + 80002300: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80002304: 0000ba83 ld x21,0(x1) + 80002308: 00808093 addi x1,x1,8 + +000000008000230c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + andn x15, x27, x21 # perform operation + 8000230c: 415df7b3 andn x15,x27,x21 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002310: 0001b383 ld x7,0(x3) + 80002314: 00f38c63 beq x7,x15,8000232c + 80002318: 2010546f jal x8,80007d18 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80010e6d .word 0x80010e6d + 80002328: 00000000 .word 0x00000000 + 8000232c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0000000000000002 + 80002330: 0000b683 ld x13,0(x1) + 80002334: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80002338: 0000b103 ld x2,0(x1) + 8000233c: 00808093 addi x1,x1,8 + +0000000080002340 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + andn x4, x13, x2 # perform operation + 80002340: 4026f233 andn x4,x13,x2 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002344: 0001b383 ld x7,0(x3) + 80002348: 00438c63 beq x7,x4,80002360 + 8000234c: 1cd0546f jal x8,80007d18 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 80010ecd .word 0x80010ecd + 8000235c: 00000000 .word 0x00000000 + 80002360: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000000000002 + 80002364: 0000ba83 ld x21,0(x1) + 80002368: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5555555555555555 + 8000236c: 0000b483 ld x9,0(x1) + 80002370: 00808093 addi x1,x1,8 + +0000000080002374 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + andn x15, x21, x9 # perform operation + 80002374: 409af7b3 andn x15,x21,x9 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002378: 0001b383 ld x7,0(x3) + 8000237c: 00f38c63 beq x7,x15,80002394 + 80002380: 1990546f jal x8,80007d18 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 80010f2d .word 0x80010f2d + 80002390: 00000000 .word 0x00000000 + 80002394: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000000000002 + 80002398: 0000ba83 ld x21,0(x1) + 8000239c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x00000000ffffffff + 800023a0: 0000bd03 ld x26,0(x1) + 800023a4: 00808093 addi x1,x1,8 + +00000000800023a8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + andn x18, x21, x26 # perform operation + 800023a8: 41aaf933 andn x18,x21,x26 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023ac: 0001b383 ld x7,0(x3) + 800023b0: 01238c63 beq x7,x18,800023c8 + 800023b4: 1650546f jal x8,80007d18 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 80010f8d .word 0x80010f8d + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000002 + 800023cc: 0000b983 ld x19,0(x1) + 800023d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000fffffffe + 800023d4: 0000b783 ld x15,0(x1) + 800023d8: 00808093 addi x1,x1,8 + +00000000800023dc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + andn x18, x19, x15 # perform operation + 800023dc: 40f9f933 andn x18,x19,x15 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e0: 0001b383 ld x7,0(x3) + 800023e4: 01238c63 beq x7,x18,800023fc + 800023e8: 1310546f jal x8,80007d18 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 80010fe5 .word 0x80010fe5 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x0000000000000002 + 80002400: 0000bb83 ld x23,0(x1) + 80002404: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000100000000 + 80002408: 0000b103 ld x2,0(x1) + 8000240c: 00808093 addi x1,x1,8 + +0000000080002410 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + andn x5, x23, x2 # perform operation + 80002410: 402bf2b3 andn x5,x23,x2 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002414: 0001b383 ld x7,0(x3) + 80002418: 00538c63 beq x7,x5,80002430 + 8000241c: 0fd0546f jal x8,80007d18 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 8001103d .word 0x8001103d + 8000242c: 00000000 .word 0x00000000 + 80002430: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000000000002 + 80002434: 0000ba83 ld x21,0(x1) + 80002438: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000100000001 + 8000243c: 0000bd83 ld x27,0(x1) + 80002440: 00808093 addi x1,x1,8 + +0000000080002444 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + andn x29, x21, x27 # perform operation + 80002444: 41bafeb3 andn x29,x21,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002448: 0001b383 ld x7,0(x3) + 8000244c: 01d38c63 beq x7,x29,80002464 + 80002450: 0c90546f jal x8,80007d18 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 80011096 .word 0x80011096 + 80002460: 00000000 .word 0x00000000 + 80002464: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8000000000000000 + 80002468: 0000b103 ld x2,0(x1) + 8000246c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x0000000000000000 + 80002470: 0000b203 ld x4,0(x1) + 80002474: 00808093 addi x1,x1,8 + +0000000080002478 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + andn x26, x2, x4 # perform operation + 80002478: 40417d33 andn x26,x2,x4 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000247c: 0001b383 ld x7,0(x3) + 80002480: 01a38c63 beq x7,x26,80002498 + 80002484: 0950546f jal x8,80007d18 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 800110ef .word 0x800110ef + 80002494: 00000000 .word 0x00000000 + 80002498: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x8000000000000000 + 8000249c: 0000b603 ld x12,0(x1) + 800024a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000001 + 800024a4: 0000bd83 ld x27,0(x1) + 800024a8: 00808093 addi x1,x1,8 + +00000000800024ac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + andn x29, x12, x27 # perform operation + 800024ac: 41b67eb3 andn x29,x12,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b0: 0001b383 ld x7,0(x3) + 800024b4: 01d38c63 beq x7,x29,800024cc + 800024b8: 0610546f jal x8,80007d18 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 8001114f .word 0x8001114f + 800024c8: 00000000 .word 0x00000000 + 800024cc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x8000000000000000 + 800024d0: 0000b583 ld x11,0(x1) + 800024d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000000000002 + 800024d8: 0000bb83 ld x23,0(x1) + 800024dc: 00808093 addi x1,x1,8 + +00000000800024e0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + andn x20, x11, x23 # perform operation + 800024e0: 4175fa33 andn x20,x11,x23 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e4: 0001b383 ld x7,0(x3) + 800024e8: 01438c63 beq x7,x20,80002500 + 800024ec: 02d0546f jal x8,80007d18 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 800111af .word 0x800111af + 800024fc: 00000000 .word 0x00000000 + 80002500: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x8000000000000000 + 80002504: 0000b683 ld x13,0(x1) + 80002508: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x8000000000000000 + 8000250c: 0000b503 ld x10,0(x1) + 80002510: 00808093 addi x1,x1,8 + +0000000080002514 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + andn x20, x13, x10 # perform operation + 80002514: 40a6fa33 andn x20,x13,x10 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002518: 0001b383 ld x7,0(x3) + 8000251c: 01438c63 beq x7,x20,80002534 + 80002520: 7f80546f jal x8,80007d18 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 8001120f .word 0x8001120f + 80002530: 00000000 .word 0x00000000 + 80002534: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x8000000000000000 + 80002538: 0000b303 ld x6,0(x1) + 8000253c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x8000000000000001 + 80002540: 0000bd03 ld x26,0(x1) + 80002544: 00808093 addi x1,x1,8 + +0000000080002548 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + andn x5, x6, x26 # perform operation + 80002548: 41a372b3 andn x5,x6,x26 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000254c: 0001b383 ld x7,0(x3) + 80002550: 00538c63 beq x7,x5,80002568 + 80002554: 7c40546f jal x8,80007d18 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 8001127e .word 0x8001127e + 80002564: 00000000 .word 0x00000000 + 80002568: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8000000000000000 + 8000256c: 0000bf83 ld x31,0(x1) + 80002570: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7fffffffffffffff + 80002574: 0000bb03 ld x22,0(x1) + 80002578: 00808093 addi x1,x1,8 + +000000008000257c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + andn x10, x31, x22 # perform operation + 8000257c: 416ff533 andn x10,x31,x22 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002580: 0001b383 ld x7,0(x3) + 80002584: 00a38c63 beq x7,x10,8000259c + 80002588: 7900546f jal x8,80007d18 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 800112ed .word 0x800112ed + 80002598: 00000000 .word 0x00000000 + 8000259c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x8000000000000000 + 800025a0: 0000ba83 ld x21,0(x1) + 800025a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x7ffffffffffffffe + 800025a8: 0000b783 ld x15,0(x1) + 800025ac: 00808093 addi x1,x1,8 + +00000000800025b0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + andn x19, x21, x15 # perform operation + 800025b0: 40faf9b3 andn x19,x21,x15 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b4: 0001b383 ld x7,0(x3) + 800025b8: 01338c63 beq x7,x19,800025d0 + 800025bc: 75c0546f jal x8,80007d18 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 8001135c .word 0x8001135c + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x8000000000000000 + 800025d4: 0000b283 ld x5,0(x1) + 800025d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xffffffffffffffff + 800025dc: 0000ba03 ld x20,0(x1) + 800025e0: 00808093 addi x1,x1,8 + +00000000800025e4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + andn x25, x5, x20 # perform operation + 800025e4: 4142fcb3 andn x25,x5,x20 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e8: 0001b383 ld x7,0(x3) + 800025ec: 01938c63 beq x7,x25,80002604 + 800025f0: 7280546f jal x8,80007d18 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 800113cb .word 0x800113cb + 80002600: 00000000 .word 0x00000000 + 80002604: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x8000000000000000 + 80002608: 0000be83 ld x29,0(x1) + 8000260c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xfffffffffffffffe + 80002610: 0000bb03 ld x22,0(x1) + 80002614: 00808093 addi x1,x1,8 + +0000000080002618 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + andn x15, x29, x22 # perform operation + 80002618: 416ef7b3 andn x15,x29,x22 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000261c: 0001b383 ld x7,0(x3) + 80002620: 00f38c63 beq x7,x15,80002638 + 80002624: 6f40546f jal x8,80007d18 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 8001143a .word 0x8001143a + 80002634: 00000000 .word 0x00000000 + 80002638: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x8000000000000000 + 8000263c: 0000b783 ld x15,0(x1) + 80002640: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80002644: 0000b483 ld x9,0(x1) + 80002648: 00808093 addi x1,x1,8 + +000000008000264c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + andn x27, x15, x9 # perform operation + 8000264c: 4097fdb3 andn x27,x15,x9 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002650: 0001b383 ld x7,0(x3) + 80002654: 01b38c63 beq x7,x27,8000266c + 80002658: 6c00546f jal x8,80007d18 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 800114a9 .word 0x800114a9 + 80002668: 00000000 .word 0x00000000 + 8000266c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x8000000000000000 + 80002670: 0000ba03 ld x20,0(x1) + 80002674: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80002678: 0000bf03 ld x30,0(x1) + 8000267c: 00808093 addi x1,x1,8 + +0000000080002680 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + andn x17, x20, x30 # perform operation + 80002680: 41ea78b3 andn x17,x20,x30 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002684: 0001b383 ld x7,0(x3) + 80002688: 01138c63 beq x7,x17,800026a0 + 8000268c: 68c0546f jal x8,80007d18 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 80011518 .word 0x80011518 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x8000000000000000 + 800026a4: 0000b703 ld x14,0(x1) + 800026a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5555555555555555 + 800026ac: 0000b603 ld x12,0(x1) + 800026b0: 00808093 addi x1,x1,8 + +00000000800026b4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + andn x13, x14, x12 # perform operation + 800026b4: 40c776b3 andn x13,x14,x12 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b8: 0001b383 ld x7,0(x3) + 800026bc: 00d38c63 beq x7,x13,800026d4 + 800026c0: 6580546f jal x8,80007d18 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 80011587 .word 0x80011587 + 800026d0: 00000000 .word 0x00000000 + 800026d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x8000000000000000 + 800026d8: 0000b883 ld x17,0(x1) + 800026dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x00000000ffffffff + 800026e0: 0000bd83 ld x27,0(x1) + 800026e4: 00808093 addi x1,x1,8 + +00000000800026e8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + andn x4, x17, x27 # perform operation + 800026e8: 41b8f233 andn x4,x17,x27 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026ec: 0001b383 ld x7,0(x3) + 800026f0: 00438c63 beq x7,x4,80002708 + 800026f4: 6240546f jal x8,80007d18 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 800115f6 .word 0x800115f6 + 80002704: 00000000 .word 0x00000000 + 80002708: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8000000000000000 + 8000270c: 0000bb03 ld x22,0(x1) + 80002710: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x00000000fffffffe + 80002714: 0000ba03 ld x20,0(x1) + 80002718: 00808093 addi x1,x1,8 + +000000008000271c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + andn x26, x22, x20 # perform operation + 8000271c: 414b7d33 andn x26,x22,x20 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002720: 0001b383 ld x7,0(x3) + 80002724: 01a38c63 beq x7,x26,8000273c + 80002728: 5f00546f jal x8,80007d18 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 8001165d .word 0x8001165d + 80002738: 00000000 .word 0x00000000 + 8000273c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x8000000000000000 + 80002740: 0000b583 ld x11,0(x1) + 80002744: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000100000000 + 80002748: 0000bb83 ld x23,0(x1) + 8000274c: 00808093 addi x1,x1,8 + +0000000080002750 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + andn x20, x11, x23 # perform operation + 80002750: 4175fa33 andn x20,x11,x23 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002754: 0001b383 ld x7,0(x3) + 80002758: 01438c63 beq x7,x20,80002770 + 8000275c: 5bc0546f jal x8,80007d18 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 800116c4 .word 0x800116c4 + 8000276c: 00000000 .word 0x00000000 + 80002770: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8000000000000000 + 80002774: 0000bf83 ld x31,0(x1) + 80002778: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000100000001 + 8000277c: 0000bc83 ld x25,0(x1) + 80002780: 00808093 addi x1,x1,8 + +0000000080002784 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + andn x30, x31, x25 # perform operation + 80002784: 419fff33 andn x30,x31,x25 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002788: 0001b383 ld x7,0(x3) + 8000278c: 01e38c63 beq x7,x30,800027a4 + 80002790: 5880546f jal x8,80007d18 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 8001172c .word 0x8001172c + 800027a0: 00000000 .word 0x00000000 + 800027a4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x8000000000000001 + 800027a8: 0000b903 ld x18,0(x1) + 800027ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000000 + 800027b0: 0000bc03 ld x24,0(x1) + 800027b4: 00808093 addi x1,x1,8 + +00000000800027b8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + andn x20, x18, x24 # perform operation + 800027b8: 41897a33 andn x20,x18,x24 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027bc: 0001b383 ld x7,0(x3) + 800027c0: 01438c63 beq x7,x20,800027d8 + 800027c4: 5540546f jal x8,80007d18 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 80011794 .word 0x80011794 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x8000000000000001 + 800027dc: 0000ba03 ld x20,0(x1) + 800027e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000000000001 + 800027e4: 0000b703 ld x14,0(x1) + 800027e8: 00808093 addi x1,x1,8 + +00000000800027ec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + andn x30, x20, x14 # perform operation + 800027ec: 40ea7f33 andn x30,x20,x14 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f0: 0001b383 ld x7,0(x3) + 800027f4: 01e38c63 beq x7,x30,8000280c + 800027f8: 5200546f jal x8,80007d18 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 800117f4 .word 0x800117f4 + 80002808: 00000000 .word 0x00000000 + 8000280c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8000000000000001 + 80002810: 0000b483 ld x9,0(x1) + 80002814: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000000000002 + 80002818: 0000b803 ld x16,0(x1) + 8000281c: 00808093 addi x1,x1,8 + +0000000080002820 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + andn x30, x9, x16 # perform operation + 80002820: 4104ff33 andn x30,x9,x16 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002824: 0001b383 ld x7,0(x3) + 80002828: 01e38c63 beq x7,x30,80002840 + 8000282c: 4ec0546f jal x8,80007d18 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 80011854 .word 0x80011854 + 8000283c: 00000000 .word 0x00000000 + 80002840: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x8000000000000001 + 80002844: 0000b883 ld x17,0(x1) + 80002848: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8000000000000000 + 8000284c: 0000bc83 ld x25,0(x1) + 80002850: 00808093 addi x1,x1,8 + +0000000080002854 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + andn x30, x17, x25 # perform operation + 80002854: 4198ff33 andn x30,x17,x25 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002858: 0001b383 ld x7,0(x3) + 8000285c: 01e38c63 beq x7,x30,80002874 + 80002860: 4b80546f jal x8,80007d18 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 800118b4 .word 0x800118b4 + 80002870: 00000000 .word 0x00000000 + 80002874: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x8000000000000001 + 80002878: 0000b303 ld x6,0(x1) + 8000287c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x8000000000000001 + 80002880: 0000bb03 ld x22,0(x1) + 80002884: 00808093 addi x1,x1,8 + +0000000080002888 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + andn x24, x6, x22 # perform operation + 80002888: 41637c33 andn x24,x6,x22 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000288c: 0001b383 ld x7,0(x3) + 80002890: 01838c63 beq x7,x24,800028a8 + 80002894: 4840546f jal x8,80007d18 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 80011923 .word 0x80011923 + 800028a4: 00000000 .word 0x00000000 + 800028a8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8000000000000001 + 800028ac: 0000b483 ld x9,0(x1) + 800028b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7fffffffffffffff + 800028b4: 0000be03 ld x28,0(x1) + 800028b8: 00808093 addi x1,x1,8 + +00000000800028bc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + andn x20, x9, x28 # perform operation + 800028bc: 41c4fa33 andn x20,x9,x28 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c0: 0001b383 ld x7,0(x3) + 800028c4: 01438c63 beq x7,x20,800028dc + 800028c8: 4500546f jal x8,80007d18 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 80011992 .word 0x80011992 + 800028d8: 00000000 .word 0x00000000 + 800028dc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x8000000000000001 + 800028e0: 0000ba03 ld x20,0(x1) + 800028e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x7ffffffffffffffe + 800028e8: 0000bf83 ld x31,0(x1) + 800028ec: 00808093 addi x1,x1,8 + +00000000800028f0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + andn x27, x20, x31 # perform operation + 800028f0: 41fa7db3 andn x27,x20,x31 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f4: 0001b383 ld x7,0(x3) + 800028f8: 01b38c63 beq x7,x27,80002910 + 800028fc: 41c0546f jal x8,80007d18 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 80011a01 .word 0x80011a01 + 8000290c: 00000000 .word 0x00000000 + 80002910: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x8000000000000001 + 80002914: 0000bb83 ld x23,0(x1) + 80002918: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xffffffffffffffff + 8000291c: 0000b583 ld x11,0(x1) + 80002920: 00808093 addi x1,x1,8 + +0000000080002924 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + andn x4, x23, x11 # perform operation + 80002924: 40bbf233 andn x4,x23,x11 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002928: 0001b383 ld x7,0(x3) + 8000292c: 00438c63 beq x7,x4,80002944 + 80002930: 3e80546f jal x8,80007d18 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 80011a70 .word 0x80011a70 + 80002940: 00000000 .word 0x00000000 + 80002944: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x8000000000000001 + 80002948: 0000bf03 ld x30,0(x1) + 8000294c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xfffffffffffffffe + 80002950: 0000bd83 ld x27,0(x1) + 80002954: 00808093 addi x1,x1,8 + +0000000080002958 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + andn x29, x30, x27 # perform operation + 80002958: 41bf7eb3 andn x29,x30,x27 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000295c: 0001b383 ld x7,0(x3) + 80002960: 01d38c63 beq x7,x29,80002978 + 80002964: 3b40546f jal x8,80007d18 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80011adf .word 0x80011adf + 80002974: 00000000 .word 0x00000000 + 80002978: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8000000000000001 + 8000297c: 0000b483 ld x9,0(x1) + 80002980: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002984: 0000bc03 ld x24,0(x1) + 80002988: 00808093 addi x1,x1,8 + +000000008000298c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + andn x12, x9, x24 # perform operation + 8000298c: 4184f633 andn x12,x9,x24 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002990: 0001b383 ld x7,0(x3) + 80002994: 00c38c63 beq x7,x12,800029ac + 80002998: 3800546f jal x8,80007d18 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 80011b4e .word 0x80011b4e + 800029a8: 00000000 .word 0x00000000 + 800029ac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x8000000000000001 + 800029b0: 0000bc83 ld x25,0(x1) + 800029b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 800029b8: 0000bc03 ld x24,0(x1) + 800029bc: 00808093 addi x1,x1,8 + +00000000800029c0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + andn x14, x25, x24 # perform operation + 800029c0: 418cf733 andn x14,x25,x24 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c4: 0001b383 ld x7,0(x3) + 800029c8: 00e38c63 beq x7,x14,800029e0 + 800029cc: 34c0546f jal x8,80007d18 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80011bbd .word 0x80011bbd + 800029dc: 00000000 .word 0x00000000 + 800029e0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8000000000000001 + 800029e4: 0000b483 ld x9,0(x1) + 800029e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x5555555555555555 + 800029ec: 0000bc03 ld x24,0(x1) + 800029f0: 00808093 addi x1,x1,8 + +00000000800029f4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + andn x10, x9, x24 # perform operation + 800029f4: 4184f533 andn x10,x9,x24 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f8: 0001b383 ld x7,0(x3) + 800029fc: 00a38c63 beq x7,x10,80002a14 + 80002a00: 3180546f jal x8,80007d18 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80011c2c .word 0x80011c2c + 80002a10: 00000000 .word 0x00000000 + 80002a14: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x8000000000000001 + 80002a18: 0000be83 ld x29,0(x1) + 80002a1c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000000ffffffff + 80002a20: 0000b803 ld x16,0(x1) + 80002a24: 00808093 addi x1,x1,8 + +0000000080002a28 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + andn x12, x29, x16 # perform operation + 80002a28: 410ef633 andn x12,x29,x16 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a2c: 0001b383 ld x7,0(x3) + 80002a30: 00c38c63 beq x7,x12,80002a48 + 80002a34: 2e40546f jal x8,80007d18 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80011c9b .word 0x80011c9b + 80002a44: 00000000 .word 0x00000000 + 80002a48: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8000000000000001 + 80002a4c: 0000b103 ld x2,0(x1) + 80002a50: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x00000000fffffffe + 80002a54: 0000ba83 ld x21,0(x1) + 80002a58: 00808093 addi x1,x1,8 + +0000000080002a5c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + andn x31, x2, x21 # perform operation + 80002a5c: 41517fb3 andn x31,x2,x21 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a60: 0001b383 ld x7,0(x3) + 80002a64: 01f38c63 beq x7,x31,80002a7c + 80002a68: 2b00546f jal x8,80007d18 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80011d02 .word 0x80011d02 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x8000000000000001 + 80002a80: 0000be03 ld x28,0(x1) + 80002a84: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000100000000 + 80002a88: 0000b883 ld x17,0(x1) + 80002a8c: 00808093 addi x1,x1,8 + +0000000080002a90 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + andn x21, x28, x17 # perform operation + 80002a90: 411e7ab3 andn x21,x28,x17 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a94: 0001b383 ld x7,0(x3) + 80002a98: 01538c63 beq x7,x21,80002ab0 + 80002a9c: 27c0546f jal x8,80007d18 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 80011d69 .word 0x80011d69 + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8000000000000001 + 80002ab4: 0000b103 ld x2,0(x1) + 80002ab8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000100000001 + 80002abc: 0000be03 ld x28,0(x1) + 80002ac0: 00808093 addi x1,x1,8 + +0000000080002ac4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + andn x18, x2, x28 # perform operation + 80002ac4: 41c17933 andn x18,x2,x28 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac8: 0001b383 ld x7,0(x3) + 80002acc: 01238c63 beq x7,x18,80002ae4 + 80002ad0: 2480546f jal x8,80007d18 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 80011dd1 .word 0x80011dd1 + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x7fffffffffffffff + 80002ae8: 0000b283 ld x5,0(x1) + 80002aec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000000000000 + 80002af0: 0000b803 ld x16,0(x1) + 80002af4: 00808093 addi x1,x1,8 + +0000000080002af8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + andn x31, x5, x16 # perform operation + 80002af8: 4102ffb3 andn x31,x5,x16 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002afc: 0001b383 ld x7,0(x3) + 80002b00: 01f38c63 beq x7,x31,80002b18 + 80002b04: 2140546f jal x8,80007d18 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 80011e39 .word 0x80011e39 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002b1c: 0000bc03 ld x24,0(x1) + 80002b20: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000001 + 80002b24: 0000ba83 ld x21,0(x1) + 80002b28: 00808093 addi x1,x1,8 + +0000000080002b2c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + andn x30, x24, x21 # perform operation + 80002b2c: 415c7f33 andn x30,x24,x21 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b30: 0001b383 ld x7,0(x3) + 80002b34: 01e38c63 beq x7,x30,80002b4c + 80002b38: 1e00546f jal x8,80007d18 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 80011e99 .word 0x80011e99 + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002b50: 0000b883 ld x17,0(x1) + 80002b54: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x0000000000000002 + 80002b58: 0000ba03 ld x20,0(x1) + 80002b5c: 00808093 addi x1,x1,8 + +0000000080002b60 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + andn x10, x17, x20 # perform operation + 80002b60: 4148f533 andn x10,x17,x20 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b64: 0001b383 ld x7,0(x3) + 80002b68: 00a38c63 beq x7,x10,80002b80 + 80002b6c: 1ac0546f jal x8,80007d18 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 80011ef9 .word 0x80011ef9 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002b84: 0000b703 ld x14,0(x1) + 80002b88: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8000000000000000 + 80002b8c: 0000bc83 ld x25,0(x1) + 80002b90: 00808093 addi x1,x1,8 + +0000000080002b94 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + andn x21, x14, x25 # perform operation + 80002b94: 41977ab3 andn x21,x14,x25 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b98: 0001b383 ld x7,0(x3) + 80002b9c: 01538c63 beq x7,x21,80002bb4 + 80002ba0: 1780546f jal x8,80007d18 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 80011f59 .word 0x80011f59 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002bb8: 0000b683 ld x13,0(x1) + 80002bbc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x8000000000000001 + 80002bc0: 0000b203 ld x4,0(x1) + 80002bc4: 00808093 addi x1,x1,8 + +0000000080002bc8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + andn x21, x13, x4 # perform operation + 80002bc8: 4046fab3 andn x21,x13,x4 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bcc: 0001b383 ld x7,0(x3) + 80002bd0: 01538c63 beq x7,x21,80002be8 + 80002bd4: 1440546f jal x8,80007d18 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80011fc8 .word 0x80011fc8 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002bec: 0000bf03 ld x30,0(x1) + 80002bf0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x7fffffffffffffff + 80002bf4: 0000b703 ld x14,0(x1) + 80002bf8: 00808093 addi x1,x1,8 + +0000000080002bfc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + andn x12, x30, x14 # perform operation + 80002bfc: 40ef7633 andn x12,x30,x14 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c00: 0001b383 ld x7,0(x3) + 80002c04: 00c38c63 beq x7,x12,80002c1c + 80002c08: 1100546f jal x8,80007d18 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 80012037 .word 0x80012037 + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002c20: 0000b683 ld x13,0(x1) + 80002c24: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002c28: 0000ba03 ld x20,0(x1) + 80002c2c: 00808093 addi x1,x1,8 + +0000000080002c30 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + andn x5, x13, x20 # perform operation + 80002c30: 4146f2b3 andn x5,x13,x20 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c34: 0001b383 ld x7,0(x3) + 80002c38: 00538c63 beq x7,x5,80002c50 + 80002c3c: 0dc0546f jal x8,80007d18 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 800120a6 .word 0x800120a6 + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002c54: 0000ba03 ld x20,0(x1) + 80002c58: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xffffffffffffffff + 80002c5c: 0000b783 ld x15,0(x1) + 80002c60: 00808093 addi x1,x1,8 + +0000000080002c64 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + andn x9, x20, x15 # perform operation + 80002c64: 40fa74b3 andn x9,x20,x15 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c68: 0001b383 ld x7,0(x3) + 80002c6c: 00938c63 beq x7,x9,80002c84 + 80002c70: 0a80546f jal x8,80007d18 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 80012115 .word 0x80012115 + 80002c80: 00000000 .word 0x00000000 + 80002c84: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002c88: 0000bc03 ld x24,0(x1) + 80002c8c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xfffffffffffffffe + 80002c90: 0000b803 ld x16,0(x1) + 80002c94: 00808093 addi x1,x1,8 + +0000000080002c98 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + andn x13, x24, x16 # perform operation + 80002c98: 410c76b3 andn x13,x24,x16 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c9c: 0001b383 ld x7,0(x3) + 80002ca0: 00d38c63 beq x7,x13,80002cb8 + 80002ca4: 0740546f jal x8,80007d18 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 80012184 .word 0x80012184 + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x7fffffffffffffff + 80002cbc: 0000b283 ld x5,0(x1) + 80002cc0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80002cc4: 0000b603 ld x12,0(x1) + 80002cc8: 00808093 addi x1,x1,8 + +0000000080002ccc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + andn x19, x5, x12 # perform operation + 80002ccc: 40c2f9b3 andn x19,x5,x12 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd0: 0001b383 ld x7,0(x3) + 80002cd4: 01338c63 beq x7,x19,80002cec + 80002cd8: 0400546f jal x8,80007d18 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 800121f3 .word 0x800121f3 + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002cf0: 0000b683 ld x13,0(x1) + 80002cf4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80002cf8: 0000be03 ld x28,0(x1) + 80002cfc: 00808093 addi x1,x1,8 + +0000000080002d00 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + andn x2, x13, x28 # perform operation + 80002d00: 41c6f133 andn x2,x13,x28 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d04: 0001b383 ld x7,0(x3) + 80002d08: 00238c63 beq x7,x2,80002d20 + 80002d0c: 00c0546f jal x8,80007d18 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 80012262 .word 0x80012262 + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002d24: 0000bd03 ld x26,0(x1) + 80002d28: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x5555555555555555 + 80002d2c: 0000bb83 ld x23,0(x1) + 80002d30: 00808093 addi x1,x1,8 + +0000000080002d34 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + andn x10, x26, x23 # perform operation + 80002d34: 417d7533 andn x10,x26,x23 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d38: 0001b383 ld x7,0(x3) + 80002d3c: 00a38c63 beq x7,x10,80002d54 + 80002d40: 7d90446f jal x8,80007d18 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 800122d1 .word 0x800122d1 + 80002d50: 00000000 .word 0x00000000 + 80002d54: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x7fffffffffffffff + 80002d58: 0000b203 ld x4,0(x1) + 80002d5c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x00000000ffffffff + 80002d60: 0000ba03 ld x20,0(x1) + 80002d64: 00808093 addi x1,x1,8 + +0000000080002d68 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + andn x6, x4, x20 # perform operation + 80002d68: 41427333 andn x6,x4,x20 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d6c: 0001b383 ld x7,0(x3) + 80002d70: 00638c63 beq x7,x6,80002d88 + 80002d74: 7a50446f jal x8,80007d18 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 80012340 .word 0x80012340 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002d8c: 0000b903 ld x18,0(x1) + 80002d90: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x00000000fffffffe + 80002d94: 0000bf83 ld x31,0(x1) + 80002d98: 00808093 addi x1,x1,8 + +0000000080002d9c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + andn x6, x18, x31 # perform operation + 80002d9c: 41f97333 andn x6,x18,x31 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da0: 0001b383 ld x7,0(x3) + 80002da4: 00638c63 beq x7,x6,80002dbc + 80002da8: 7710446f jal x8,80007d18 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 800123a7 .word 0x800123a7 + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002dc0: 0000b903 ld x18,0(x1) + 80002dc4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000000 + 80002dc8: 0000bf83 ld x31,0(x1) + 80002dcc: 00808093 addi x1,x1,8 + +0000000080002dd0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + andn x17, x18, x31 # perform operation + 80002dd0: 41f978b3 andn x17,x18,x31 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd4: 0001b383 ld x7,0(x3) + 80002dd8: 01138c63 beq x7,x17,80002df0 + 80002ddc: 73d0446f jal x8,80007d18 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 8001240e .word 0x8001240e + 80002dec: 00000000 .word 0x00000000 + 80002df0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002df4: 0000b103 ld x2,0(x1) + 80002df8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x0000000100000001 + 80002dfc: 0000b903 ld x18,0(x1) + 80002e00: 00808093 addi x1,x1,8 + +0000000080002e04 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + andn x9, x2, x18 # perform operation + 80002e04: 412174b3 andn x9,x2,x18 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e08: 0001b383 ld x7,0(x3) + 80002e0c: 00938c63 beq x7,x9,80002e24 + 80002e10: 7090446f jal x8,80007d18 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 80012476 .word 0x80012476 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x7ffffffffffffffe + 80002e28: 0000b803 ld x16,0(x1) + 80002e2c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000000000000 + 80002e30: 0000b703 ld x14,0(x1) + 80002e34: 00808093 addi x1,x1,8 + +0000000080002e38 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + andn x26, x16, x14 # perform operation + 80002e38: 40e87d33 andn x26,x16,x14 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e3c: 0001b383 ld x7,0(x3) + 80002e40: 01a38c63 beq x7,x26,80002e58 + 80002e44: 6d50446f jal x8,80007d18 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 800124de .word 0x800124de + 80002e54: 00000000 .word 0x00000000 + 80002e58: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002e5c: 0000b983 ld x19,0(x1) + 80002e60: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0000000000000001 + 80002e64: 0000b503 ld x10,0(x1) + 80002e68: 00808093 addi x1,x1,8 + +0000000080002e6c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + andn x26, x19, x10 # perform operation + 80002e6c: 40a9fd33 andn x26,x19,x10 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e70: 0001b383 ld x7,0(x3) + 80002e74: 01a38c63 beq x7,x26,80002e8c + 80002e78: 6a10446f jal x8,80007d18 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 8001253e .word 0x8001253e + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80002e90: 0000b503 ld x10,0(x1) + 80002e94: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000000000002 + 80002e98: 0000b603 ld x12,0(x1) + 80002e9c: 00808093 addi x1,x1,8 + +0000000080002ea0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + andn x15, x10, x12 # perform operation + 80002ea0: 40c577b3 andn x15,x10,x12 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea4: 0001b383 ld x7,0(x3) + 80002ea8: 00f38c63 beq x7,x15,80002ec0 + 80002eac: 66d0446f jal x8,80007d18 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 8001259e .word 0x8001259e + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002ec4: 0000b303 ld x6,0(x1) + 80002ec8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x8000000000000000 + 80002ecc: 0000b683 ld x13,0(x1) + 80002ed0: 00808093 addi x1,x1,8 + +0000000080002ed4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + andn x30, x6, x13 # perform operation + 80002ed4: 40d37f33 andn x30,x6,x13 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed8: 0001b383 ld x7,0(x3) + 80002edc: 01e38c63 beq x7,x30,80002ef4 + 80002ee0: 6390446f jal x8,80007d18 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 800125fe .word 0x800125fe + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002ef8: 0000b103 ld x2,0(x1) + 80002efc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x8000000000000001 + 80002f00: 0000b783 ld x15,0(x1) + 80002f04: 00808093 addi x1,x1,8 + +0000000080002f08 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + andn x11, x2, x15 # perform operation + 80002f08: 40f175b3 andn x11,x2,x15 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f0c: 0001b383 ld x7,0(x3) + 80002f10: 00b38c63 beq x7,x11,80002f28 + 80002f14: 6050446f jal x8,80007d18 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 8001266d .word 0x8001266d + 80002f24: 00000000 .word 0x00000000 + 80002f28: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002f2c: 0000ba03 ld x20,0(x1) + 80002f30: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x7fffffffffffffff + 80002f34: 0000b103 ld x2,0(x1) + 80002f38: 00808093 addi x1,x1,8 + +0000000080002f3c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + andn x29, x20, x2 # perform operation + 80002f3c: 402a7eb3 andn x29,x20,x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f40: 0001b383 ld x7,0(x3) + 80002f44: 01d38c63 beq x7,x29,80002f5c + 80002f48: 5d10446f jal x8,80007d18 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 800126dc .word 0x800126dc + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002f60: 0000b903 ld x18,0(x1) + 80002f64: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80002f68: 0000bf03 ld x30,0(x1) + 80002f6c: 00808093 addi x1,x1,8 + +0000000080002f70 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + andn x31, x18, x30 # perform operation + 80002f70: 41e97fb3 andn x31,x18,x30 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f74: 0001b383 ld x7,0(x3) + 80002f78: 01f38c63 beq x7,x31,80002f90 + 80002f7c: 59d0446f jal x8,80007d18 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 8001274b .word 0x8001274b + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002f94: 0000bd83 ld x27,0(x1) + 80002f98: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xffffffffffffffff + 80002f9c: 0000b303 ld x6,0(x1) + 80002fa0: 00808093 addi x1,x1,8 + +0000000080002fa4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + andn x11, x27, x6 # perform operation + 80002fa4: 406df5b3 andn x11,x27,x6 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa8: 0001b383 ld x7,0(x3) + 80002fac: 00b38c63 beq x7,x11,80002fc4 + 80002fb0: 5690446f jal x8,80007d18 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 800127ba .word 0x800127ba + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002fc8: 0000b103 ld x2,0(x1) + 80002fcc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xfffffffffffffffe + 80002fd0: 0000bc03 ld x24,0(x1) + 80002fd4: 00808093 addi x1,x1,8 + +0000000080002fd8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + andn x22, x2, x24 # perform operation + 80002fd8: 41817b33 andn x22,x2,x24 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fdc: 0001b383 ld x7,0(x3) + 80002fe0: 01638c63 beq x7,x22,80002ff8 + 80002fe4: 5350446f jal x8,80007d18 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 80012829 .word 0x80012829 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002ffc: 0000bd03 ld x26,0(x1) + 80003000: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80003004: 0000bc03 ld x24,0(x1) + 80003008: 00808093 addi x1,x1,8 + +000000008000300c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + andn x9, x26, x24 # perform operation + 8000300c: 418d74b3 andn x9,x26,x24 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003010: 0001b383 ld x7,0(x3) + 80003014: 00938c63 beq x7,x9,8000302c + 80003018: 5010446f jal x8,80007d18 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 80012898 .word 0x80012898 + 80003028: 00000000 .word 0x00000000 + 8000302c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80003030: 0000b203 ld x4,0(x1) + 80003034: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 80003038: 0000bd03 ld x26,0(x1) + 8000303c: 00808093 addi x1,x1,8 + +0000000080003040 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + andn x29, x4, x26 # perform operation + 80003040: 41a27eb3 andn x29,x4,x26 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003044: 0001b383 ld x7,0(x3) + 80003048: 01d38c63 beq x7,x29,80003060 + 8000304c: 4cd0446f jal x8,80007d18 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 80012907 .word 0x80012907 + 8000305c: 00000000 .word 0x00000000 + 80003060: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80003064: 0000bb03 ld x22,0(x1) + 80003068: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5555555555555555 + 8000306c: 0000b783 ld x15,0(x1) + 80003070: 00808093 addi x1,x1,8 + +0000000080003074 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + andn x18, x22, x15 # perform operation + 80003074: 40fb7933 andn x18,x22,x15 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003078: 0001b383 ld x7,0(x3) + 8000307c: 01238c63 beq x7,x18,80003094 + 80003080: 4990446f jal x8,80007d18 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 80012976 .word 0x80012976 + 80003090: 00000000 .word 0x00000000 + 80003094: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003098: 0000b703 ld x14,0(x1) + 8000309c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x00000000ffffffff + 800030a0: 0000bd83 ld x27,0(x1) + 800030a4: 00808093 addi x1,x1,8 + +00000000800030a8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + andn x12, x14, x27 # perform operation + 800030a8: 41b77633 andn x12,x14,x27 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030ac: 0001b383 ld x7,0(x3) + 800030b0: 00c38c63 beq x7,x12,800030c8 + 800030b4: 4650446f jal x8,80007d18 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 800129e5 .word 0x800129e5 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x7ffffffffffffffe + 800030cc: 0000b783 ld x15,0(x1) + 800030d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000fffffffe + 800030d4: 0000b503 ld x10,0(x1) + 800030d8: 00808093 addi x1,x1,8 + +00000000800030dc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + andn x31, x15, x10 # perform operation + 800030dc: 40a7ffb3 andn x31,x15,x10 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e0: 0001b383 ld x7,0(x3) + 800030e4: 01f38c63 beq x7,x31,800030fc + 800030e8: 4310446f jal x8,80007d18 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 80012a4c .word 0x80012a4c + 800030f8: 00000000 .word 0x00000000 + 800030fc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x7ffffffffffffffe + 80003100: 0000b283 ld x5,0(x1) + 80003104: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000100000000 + 80003108: 0000b803 ld x16,0(x1) + 8000310c: 00808093 addi x1,x1,8 + +0000000080003110 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + andn x17, x5, x16 # perform operation + 80003110: 4102f8b3 andn x17,x5,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003114: 0001b383 ld x7,0(x3) + 80003118: 01138c63 beq x7,x17,80003130 + 8000311c: 3fd0446f jal x8,80007d18 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 80012ab3 .word 0x80012ab3 + 8000312c: 00000000 .word 0x00000000 + 80003130: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80003134: 0000be03 ld x28,0(x1) + 80003138: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0000000100000001 + 8000313c: 0000bb03 ld x22,0(x1) + 80003140: 00808093 addi x1,x1,8 + +0000000080003144 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + andn x19, x28, x22 # perform operation + 80003144: 416e79b3 andn x19,x28,x22 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003148: 0001b383 ld x7,0(x3) + 8000314c: 01338c63 beq x7,x19,80003164 + 80003150: 3c90446f jal x8,80007d18 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 80012b1b .word 0x80012b1b + 80003160: 00000000 .word 0x00000000 + 80003164: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xffffffffffffffff + 80003168: 0000b783 ld x15,0(x1) + 8000316c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x0000000000000000 + 80003170: 0000b983 ld x19,0(x1) + 80003174: 00808093 addi x1,x1,8 + +0000000080003178 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + andn x13, x15, x19 # perform operation + 80003178: 4137f6b3 andn x13,x15,x19 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000317c: 0001b383 ld x7,0(x3) + 80003180: 00d38c63 beq x7,x13,80003198 + 80003184: 3950446f jal x8,80007d18 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 80012b83 .word 0x80012b83 + 80003194: 00000000 .word 0x00000000 + 80003198: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xffffffffffffffff + 8000319c: 0000b283 ld x5,0(x1) + 800031a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000000000001 + 800031a4: 0000b883 ld x17,0(x1) + 800031a8: 00808093 addi x1,x1,8 + +00000000800031ac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + andn x14, x5, x17 # perform operation + 800031ac: 4112f733 andn x14,x5,x17 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b0: 0001b383 ld x7,0(x3) + 800031b4: 00e38c63 beq x7,x14,800031cc + 800031b8: 3610446f jal x8,80007d18 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80012be3 .word 0x80012be3 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xffffffffffffffff + 800031d0: 0000b803 ld x16,0(x1) + 800031d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000000000002 + 800031d8: 0000be03 ld x28,0(x1) + 800031dc: 00808093 addi x1,x1,8 + +00000000800031e0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + andn x27, x16, x28 # perform operation + 800031e0: 41c87db3 andn x27,x16,x28 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e4: 0001b383 ld x7,0(x3) + 800031e8: 01b38c63 beq x7,x27,80003200 + 800031ec: 32d0446f jal x8,80007d18 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 80012c43 .word 0x80012c43 + 800031fc: 00000000 .word 0x00000000 + 80003200: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xffffffffffffffff + 80003204: 0000be03 ld x28,0(x1) + 80003208: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x8000000000000000 + 8000320c: 0000b603 ld x12,0(x1) + 80003210: 00808093 addi x1,x1,8 + +0000000080003214 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + andn x19, x28, x12 # perform operation + 80003214: 40ce79b3 andn x19,x28,x12 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003218: 0001b383 ld x7,0(x3) + 8000321c: 01338c63 beq x7,x19,80003234 + 80003220: 2f90446f jal x8,80007d18 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 80012ca3 .word 0x80012ca3 + 80003230: 00000000 .word 0x00000000 + 80003234: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xffffffffffffffff + 80003238: 0000b603 ld x12,0(x1) + 8000323c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x8000000000000001 + 80003240: 0000b703 ld x14,0(x1) + 80003244: 00808093 addi x1,x1,8 + +0000000080003248 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + andn x29, x12, x14 # perform operation + 80003248: 40e67eb3 andn x29,x12,x14 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000324c: 0001b383 ld x7,0(x3) + 80003250: 01d38c63 beq x7,x29,80003268 + 80003254: 2c50446f jal x8,80007d18 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 80012d12 .word 0x80012d12 + 80003264: 00000000 .word 0x00000000 + 80003268: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xffffffffffffffff + 8000326c: 0000b703 ld x14,0(x1) + 80003270: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x7fffffffffffffff + 80003274: 0000be83 ld x29,0(x1) + 80003278: 00808093 addi x1,x1,8 + +000000008000327c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + andn x4, x14, x29 # perform operation + 8000327c: 41d77233 andn x4,x14,x29 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003280: 0001b383 ld x7,0(x3) + 80003284: 00438c63 beq x7,x4,8000329c + 80003288: 2910446f jal x8,80007d18 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80012d81 .word 0x80012d81 + 80003298: 00000000 .word 0x00000000 + 8000329c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xffffffffffffffff + 800032a0: 0000bf03 ld x30,0(x1) + 800032a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800032a8: 0000b683 ld x13,0(x1) + 800032ac: 00808093 addi x1,x1,8 + +00000000800032b0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + andn x25, x30, x13 # perform operation + 800032b0: 40df7cb3 andn x25,x30,x13 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b4: 0001b383 ld x7,0(x3) + 800032b8: 01938c63 beq x7,x25,800032d0 + 800032bc: 25d0446f jal x8,80007d18 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 80012df0 .word 0x80012df0 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xffffffffffffffff + 800032d4: 0000b883 ld x17,0(x1) + 800032d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xffffffffffffffff + 800032dc: 0000b103 ld x2,0(x1) + 800032e0: 00808093 addi x1,x1,8 + +00000000800032e4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + andn x24, x17, x2 # perform operation + 800032e4: 4028fc33 andn x24,x17,x2 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e8: 0001b383 ld x7,0(x3) + 800032ec: 01838c63 beq x7,x24,80003304 + 800032f0: 2290446f jal x8,80007d18 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 80012e5f .word 0x80012e5f + 80003300: 00000000 .word 0x00000000 + 80003304: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xffffffffffffffff + 80003308: 0000b783 ld x15,0(x1) + 8000330c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xfffffffffffffffe + 80003310: 0000bd03 ld x26,0(x1) + 80003314: 00808093 addi x1,x1,8 + +0000000080003318 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + andn x28, x15, x26 # perform operation + 80003318: 41a7fe33 andn x28,x15,x26 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000331c: 0001b383 ld x7,0(x3) + 80003320: 01c38c63 beq x7,x28,80003338 + 80003324: 1f50446f jal x8,80007d18 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 80012ece .word 0x80012ece + 80003334: 00000000 .word 0x00000000 + 80003338: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xffffffffffffffff + 8000333c: 0000bf83 ld x31,0(x1) + 80003340: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 80003344: 0000bc83 ld x25,0(x1) + 80003348: 00808093 addi x1,x1,8 + +000000008000334c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + andn x28, x31, x25 # perform operation + 8000334c: 419ffe33 andn x28,x31,x25 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003350: 0001b383 ld x7,0(x3) + 80003354: 01c38c63 beq x7,x28,8000336c + 80003358: 1c10446f jal x8,80007d18 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80012f3d .word 0x80012f3d + 80003368: 00000000 .word 0x00000000 + 8000336c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xffffffffffffffff + 80003370: 0000b203 ld x4,0(x1) + 80003374: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80003378: 0000be03 ld x28,0(x1) + 8000337c: 00808093 addi x1,x1,8 + +0000000080003380 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + andn x13, x4, x28 # perform operation + 80003380: 41c276b3 andn x13,x4,x28 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003384: 0001b383 ld x7,0(x3) + 80003388: 00d38c63 beq x7,x13,800033a0 + 8000338c: 18d0446f jal x8,80007d18 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 80012fac .word 0x80012fac + 8000339c: 00000000 .word 0x00000000 + 800033a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xffffffffffffffff + 800033a4: 0000bd83 ld x27,0(x1) + 800033a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x5555555555555555 + 800033ac: 0000b683 ld x13,0(x1) + 800033b0: 00808093 addi x1,x1,8 + +00000000800033b4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + andn x20, x27, x13 # perform operation + 800033b4: 40ddfa33 andn x20,x27,x13 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b8: 0001b383 ld x7,0(x3) + 800033bc: 01438c63 beq x7,x20,800033d4 + 800033c0: 1590446f jal x8,80007d18 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 8001301b .word 0x8001301b + 800033d0: 00000000 .word 0x00000000 + 800033d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xffffffffffffffff + 800033d8: 0000b503 ld x10,0(x1) + 800033dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x00000000ffffffff + 800033e0: 0000b983 ld x19,0(x1) + 800033e4: 00808093 addi x1,x1,8 + +00000000800033e8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + andn x12, x10, x19 # perform operation + 800033e8: 41357633 andn x12,x10,x19 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033ec: 0001b383 ld x7,0(x3) + 800033f0: 00c38c63 beq x7,x12,80003408 + 800033f4: 1250446f jal x8,80007d18 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 8001308a .word 0x8001308a + 80003404: 00000000 .word 0x00000000 + 80003408: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xffffffffffffffff + 8000340c: 0000b903 ld x18,0(x1) + 80003410: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000000fffffffe + 80003414: 0000b683 ld x13,0(x1) + 80003418: 00808093 addi x1,x1,8 + +000000008000341c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + andn x30, x18, x13 # perform operation + 8000341c: 40d97f33 andn x30,x18,x13 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003420: 0001b383 ld x7,0(x3) + 80003424: 01e38c63 beq x7,x30,8000343c + 80003428: 0f10446f jal x8,80007d18 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 800130f1 .word 0x800130f1 + 80003438: 00000000 .word 0x00000000 + 8000343c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xffffffffffffffff + 80003440: 0000bb83 ld x23,0(x1) + 80003444: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000100000000 + 80003448: 0000b803 ld x16,0(x1) + 8000344c: 00808093 addi x1,x1,8 + +0000000080003450 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + andn x21, x23, x16 # perform operation + 80003450: 410bfab3 andn x21,x23,x16 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003454: 0001b383 ld x7,0(x3) + 80003458: 01538c63 beq x7,x21,80003470 + 8000345c: 0bd0446f jal x8,80007d18 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 80013158 .word 0x80013158 + 8000346c: 00000000 .word 0x00000000 + 80003470: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xffffffffffffffff + 80003474: 0000b603 ld x12,0(x1) + 80003478: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0000000100000001 + 8000347c: 0000b503 ld x10,0(x1) + 80003480: 00808093 addi x1,x1,8 + +0000000080003484 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + andn x26, x12, x10 # perform operation + 80003484: 40a67d33 andn x26,x12,x10 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003488: 0001b383 ld x7,0(x3) + 8000348c: 01a38c63 beq x7,x26,800034a4 + 80003490: 0890446f jal x8,80007d18 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 800131c0 .word 0x800131c0 + 800034a0: 00000000 .word 0x00000000 + 800034a4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xfffffffffffffffe + 800034a8: 0000b503 ld x10,0(x1) + 800034ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x0000000000000000 + 800034b0: 0000b903 ld x18,0(x1) + 800034b4: 00808093 addi x1,x1,8 + +00000000800034b8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + andn x26, x10, x18 # perform operation + 800034b8: 41257d33 andn x26,x10,x18 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034bc: 0001b383 ld x7,0(x3) + 800034c0: 01a38c63 beq x7,x26,800034d8 + 800034c4: 0550446f jal x8,80007d18 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80013228 .word 0x80013228 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xfffffffffffffffe + 800034dc: 0000bf83 ld x31,0(x1) + 800034e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000000000001 + 800034e4: 0000b603 ld x12,0(x1) + 800034e8: 00808093 addi x1,x1,8 + +00000000800034ec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + andn x10, x31, x12 # perform operation + 800034ec: 40cff533 andn x10,x31,x12 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f0: 0001b383 ld x7,0(x3) + 800034f4: 00a38c63 beq x7,x10,8000350c + 800034f8: 0210446f jal x8,80007d18 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 80013288 .word 0x80013288 + 80003508: 00000000 .word 0x00000000 + 8000350c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003510: 0000bd83 ld x27,0(x1) + 80003514: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000000000002 + 80003518: 0000bb83 ld x23,0(x1) + 8000351c: 00808093 addi x1,x1,8 + +0000000080003520 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + andn x9, x27, x23 # perform operation + 80003520: 417df4b3 andn x9,x27,x23 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003524: 0001b383 ld x7,0(x3) + 80003528: 00938c63 beq x7,x9,80003540 + 8000352c: 7ec0446f jal x8,80007d18 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 800132e8 .word 0x800132e8 + 8000353c: 00000000 .word 0x00000000 + 80003540: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003544: 0000be83 ld x29,0(x1) + 80003548: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x8000000000000000 + 8000354c: 0000b703 ld x14,0(x1) + 80003550: 00808093 addi x1,x1,8 + +0000000080003554 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + andn x27, x29, x14 # perform operation + 80003554: 40eefdb3 andn x27,x29,x14 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003558: 0001b383 ld x7,0(x3) + 8000355c: 01b38c63 beq x7,x27,80003574 + 80003560: 7b80446f jal x8,80007d18 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 80013348 .word 0x80013348 + 80003570: 00000000 .word 0x00000000 + 80003574: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xfffffffffffffffe + 80003578: 0000b283 ld x5,0(x1) + 8000357c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x8000000000000001 + 80003580: 0000b303 ld x6,0(x1) + 80003584: 00808093 addi x1,x1,8 + +0000000080003588 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + andn x29, x5, x6 # perform operation + 80003588: 4062feb3 andn x29,x5,x6 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000358c: 0001b383 ld x7,0(x3) + 80003590: 01d38c63 beq x7,x29,800035a8 + 80003594: 7840446f jal x8,80007d18 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 800133b7 .word 0x800133b7 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xfffffffffffffffe + 800035ac: 0000b983 ld x19,0(x1) + 800035b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x7fffffffffffffff + 800035b4: 0000b803 ld x16,0(x1) + 800035b8: 00808093 addi x1,x1,8 + +00000000800035bc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + andn x30, x19, x16 # perform operation + 800035bc: 4109ff33 andn x30,x19,x16 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c0: 0001b383 ld x7,0(x3) + 800035c4: 01e38c63 beq x7,x30,800035dc + 800035c8: 7500446f jal x8,80007d18 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 80013426 .word 0x80013426 + 800035d8: 00000000 .word 0x00000000 + 800035dc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xfffffffffffffffe + 800035e0: 0000bc03 ld x24,0(x1) + 800035e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x7ffffffffffffffe + 800035e8: 0000ba83 ld x21,0(x1) + 800035ec: 00808093 addi x1,x1,8 + +00000000800035f0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + andn x12, x24, x21 # perform operation + 800035f0: 415c7633 andn x12,x24,x21 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f4: 0001b383 ld x7,0(x3) + 800035f8: 00c38c63 beq x7,x12,80003610 + 800035fc: 71c0446f jal x8,80007d18 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 80013495 .word 0x80013495 + 8000360c: 00000000 .word 0x00000000 + 80003610: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xfffffffffffffffe + 80003614: 0000bb83 ld x23,0(x1) + 80003618: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0xffffffffffffffff + 8000361c: 0000b283 ld x5,0(x1) + 80003620: 00808093 addi x1,x1,8 + +0000000080003624 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + andn x11, x23, x5 # perform operation + 80003624: 405bf5b3 andn x11,x23,x5 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003628: 0001b383 ld x7,0(x3) + 8000362c: 00b38c63 beq x7,x11,80003644 + 80003630: 6e80446f jal x8,80007d18 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 80013504 .word 0x80013504 + 80003640: 00000000 .word 0x00000000 + 80003644: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003648: 0000b703 ld x14,0(x1) + 8000364c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xfffffffffffffffe + 80003650: 0000b983 ld x19,0(x1) + 80003654: 00808093 addi x1,x1,8 + +0000000080003658 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + andn x4, x14, x19 # perform operation + 80003658: 41377233 andn x4,x14,x19 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000365c: 0001b383 ld x7,0(x3) + 80003660: 00438c63 beq x7,x4,80003678 + 80003664: 6b40446f jal x8,80007d18 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 80013573 .word 0x80013573 + 80003674: 00000000 .word 0x00000000 + 80003678: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xfffffffffffffffe + 8000367c: 0000ba83 ld x21,0(x1) + 80003680: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80003684: 0000b783 ld x15,0(x1) + 80003688: 00808093 addi x1,x1,8 + +000000008000368c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + andn x4, x21, x15 # perform operation + 8000368c: 40faf233 andn x4,x21,x15 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003690: 0001b383 ld x7,0(x3) + 80003694: 00438c63 beq x7,x4,800036ac + 80003698: 6800446f jal x8,80007d18 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 800135e2 .word 0x800135e2 + 800036a8: 00000000 .word 0x00000000 + 800036ac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xfffffffffffffffe + 800036b0: 0000bc83 ld x25,0(x1) + 800036b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 800036b8: 0000bc03 ld x24,0(x1) + 800036bc: 00808093 addi x1,x1,8 + +00000000800036c0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + andn x17, x25, x24 # perform operation + 800036c0: 418cf8b3 andn x17,x25,x24 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c4: 0001b383 ld x7,0(x3) + 800036c8: 01138c63 beq x7,x17,800036e0 + 800036cc: 64c0446f jal x8,80007d18 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 80013651 .word 0x80013651 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xfffffffffffffffe + 800036e4: 0000ba83 ld x21,0(x1) + 800036e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x5555555555555555 + 800036ec: 0000bf03 ld x30,0(x1) + 800036f0: 00808093 addi x1,x1,8 + +00000000800036f4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + andn x18, x21, x30 # perform operation + 800036f4: 41eaf933 andn x18,x21,x30 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f8: 0001b383 ld x7,0(x3) + 800036fc: 01238c63 beq x7,x18,80003714 + 80003700: 6180446f jal x8,80007d18 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 800136c0 .word 0x800136c0 + 80003710: 00000000 .word 0x00000000 + 80003714: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xfffffffffffffffe + 80003718: 0000b803 ld x16,0(x1) + 8000371c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000000ffffffff + 80003720: 0000bf03 ld x30,0(x1) + 80003724: 00808093 addi x1,x1,8 + +0000000080003728 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + andn x9, x16, x30 # perform operation + 80003728: 41e874b3 andn x9,x16,x30 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000372c: 0001b383 ld x7,0(x3) + 80003730: 00938c63 beq x7,x9,80003748 + 80003734: 5e40446f jal x8,80007d18 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 8001372f .word 0x8001372f + 80003744: 00000000 .word 0x00000000 + 80003748: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xfffffffffffffffe + 8000374c: 0000bd83 ld x27,0(x1) + 80003750: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x00000000fffffffe + 80003754: 0000be03 ld x28,0(x1) + 80003758: 00808093 addi x1,x1,8 + +000000008000375c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + andn x14, x27, x28 # perform operation + 8000375c: 41cdf733 andn x14,x27,x28 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003760: 0001b383 ld x7,0(x3) + 80003764: 00e38c63 beq x7,x14,8000377c + 80003768: 5b00446f jal x8,80007d18 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80013796 .word 0x80013796 + 80003778: 00000000 .word 0x00000000 + 8000377c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003780: 0000b483 ld x9,0(x1) + 80003784: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000100000000 + 80003788: 0000bc83 ld x25,0(x1) + 8000378c: 00808093 addi x1,x1,8 + +0000000080003790 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + andn x24, x9, x25 # perform operation + 80003790: 4194fc33 andn x24,x9,x25 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003794: 0001b383 ld x7,0(x3) + 80003798: 01838c63 beq x7,x24,800037b0 + 8000379c: 57c0446f jal x8,80007d18 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 800137fd .word 0x800137fd + 800037ac: 00000000 .word 0x00000000 + 800037b0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xfffffffffffffffe + 800037b4: 0000b903 ld x18,0(x1) + 800037b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000100000001 + 800037bc: 0000b603 ld x12,0(x1) + 800037c0: 00808093 addi x1,x1,8 + +00000000800037c4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + andn x17, x18, x12 # perform operation + 800037c4: 40c978b3 andn x17,x18,x12 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c8: 0001b383 ld x7,0(x3) + 800037cc: 01138c63 beq x7,x17,800037e4 + 800037d0: 5480446f jal x8,80007d18 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 80013865 .word 0x80013865 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 800037e8: 0000b583 ld x11,0(x1) + 800037ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000000000000 + 800037f0: 0000b303 ld x6,0(x1) + 800037f4: 00808093 addi x1,x1,8 + +00000000800037f8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + andn x24, x11, x6 # perform operation + 800037f8: 4065fc33 andn x24,x11,x6 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037fc: 0001b383 ld x7,0(x3) + 80003800: 01838c63 beq x7,x24,80003818 + 80003804: 5140446f jal x8,80007d18 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 800138cd .word 0x800138cd + 80003814: 00000000 .word 0x00000000 + 80003818: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 8000381c: 0000b783 ld x15,0(x1) + 80003820: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000001 + 80003824: 0000bd03 ld x26,0(x1) + 80003828: 00808093 addi x1,x1,8 + +000000008000382c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + andn x23, x15, x26 # perform operation + 8000382c: 41a7fbb3 andn x23,x15,x26 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003830: 0001b383 ld x7,0(x3) + 80003834: 01738c63 beq x7,x23,8000384c + 80003838: 4e00446f jal x8,80007d18 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 8001392d .word 0x8001392d + 80003848: 00000000 .word 0x00000000 + 8000384c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003850: 0000bb83 ld x23,0(x1) + 80003854: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000002 + 80003858: 0000ba83 ld x21,0(x1) + 8000385c: 00808093 addi x1,x1,8 + +0000000080003860 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + andn x28, x23, x21 # perform operation + 80003860: 415bfe33 andn x28,x23,x21 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003864: 0001b383 ld x7,0(x3) + 80003868: 01c38c63 beq x7,x28,80003880 + 8000386c: 4ac0446f jal x8,80007d18 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 8001398d .word 0x8001398d + 8000387c: 00000000 .word 0x00000000 + 80003880: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003884: 0000bd83 ld x27,0(x1) + 80003888: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x8000000000000000 + 8000388c: 0000be03 ld x28,0(x1) + 80003890: 00808093 addi x1,x1,8 + +0000000080003894 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + andn x2, x27, x28 # perform operation + 80003894: 41cdf133 andn x2,x27,x28 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003898: 0001b383 ld x7,0(x3) + 8000389c: 00238c63 beq x7,x2,800038b4 + 800038a0: 4780446f jal x8,80007d18 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 800139ed .word 0x800139ed + 800038b0: 00000000 .word 0x00000000 + 800038b4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 800038b8: 0000b583 ld x11,0(x1) + 800038bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x8000000000000001 + 800038c0: 0000b303 ld x6,0(x1) + 800038c4: 00808093 addi x1,x1,8 + +00000000800038c8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + andn x30, x11, x6 # perform operation + 800038c8: 4065ff33 andn x30,x11,x6 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038cc: 0001b383 ld x7,0(x3) + 800038d0: 01e38c63 beq x7,x30,800038e8 + 800038d4: 4440446f jal x8,80007d18 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 80013a5c .word 0x80013a5c + 800038e4: 00000000 .word 0x00000000 + 800038e8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 800038ec: 0000bd83 ld x27,0(x1) + 800038f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7fffffffffffffff + 800038f4: 0000be03 ld x28,0(x1) + 800038f8: 00808093 addi x1,x1,8 + +00000000800038fc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + andn x23, x27, x28 # perform operation + 800038fc: 41cdfbb3 andn x23,x27,x28 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003900: 0001b383 ld x7,0(x3) + 80003904: 01738c63 beq x7,x23,8000391c + 80003908: 4100446f jal x8,80007d18 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 80013acb .word 0x80013acb + 80003918: 00000000 .word 0x00000000 + 8000391c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003920: 0000b683 ld x13,0(x1) + 80003924: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80003928: 0000b303 ld x6,0(x1) + 8000392c: 00808093 addi x1,x1,8 + +0000000080003930 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + andn x23, x13, x6 # perform operation + 80003930: 4066fbb3 andn x23,x13,x6 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003934: 0001b383 ld x7,0(x3) + 80003938: 01738c63 beq x7,x23,80003950 + 8000393c: 3dc0446f jal x8,80007d18 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 80013b3a .word 0x80013b3a + 8000394c: 00000000 .word 0x00000000 + 80003950: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003954: 0000b883 ld x17,0(x1) + 80003958: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 8000395c: 0000bf83 ld x31,0(x1) + 80003960: 00808093 addi x1,x1,8 + +0000000080003964 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + andn x22, x17, x31 # perform operation + 80003964: 41f8fb33 andn x22,x17,x31 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003968: 0001b383 ld x7,0(x3) + 8000396c: 01638c63 beq x7,x22,80003984 + 80003970: 3a80446f jal x8,80007d18 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80013ba9 .word 0x80013ba9 + 80003980: 00000000 .word 0x00000000 + 80003984: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003988: 0000b983 ld x19,0(x1) + 8000398c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xfffffffffffffffe + 80003990: 0000be83 ld x29,0(x1) + 80003994: 00808093 addi x1,x1,8 + +0000000080003998 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + andn x27, x19, x29 # perform operation + 80003998: 41d9fdb3 andn x27,x19,x29 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000399c: 0001b383 ld x7,0(x3) + 800039a0: 01b38c63 beq x7,x27,800039b8 + 800039a4: 3740446f jal x8,80007d18 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80013c18 .word 0x80013c18 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 800039bc: 0000bf03 ld x30,0(x1) + 800039c0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 800039c4: 0000bf83 ld x31,0(x1) + 800039c8: 00808093 addi x1,x1,8 + +00000000800039cc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + andn x10, x30, x31 # perform operation + 800039cc: 41ff7533 andn x10,x30,x31 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d0: 0001b383 ld x7,0(x3) + 800039d4: 00a38c63 beq x7,x10,800039ec + 800039d8: 3400446f jal x8,80007d18 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 80013c87 .word 0x80013c87 + 800039e8: 00000000 .word 0x00000000 + 800039ec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800039f0: 0000b683 ld x13,0(x1) + 800039f4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xaaaaaaaaaaaaaaaa + 800039f8: 0000b203 ld x4,0(x1) + 800039fc: 00808093 addi x1,x1,8 + +0000000080003a00 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + andn x15, x13, x4 # perform operation + 80003a00: 4046f7b3 andn x15,x13,x4 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a04: 0001b383 ld x7,0(x3) + 80003a08: 00f38c63 beq x7,x15,80003a20 + 80003a0c: 30c0446f jal x8,80007d18 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 80013cf6 .word 0x80013cf6 + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003a24: 0000b583 ld x11,0(x1) + 80003a28: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x5555555555555555 + 80003a2c: 0000bc03 ld x24,0(x1) + 80003a30: 00808093 addi x1,x1,8 + +0000000080003a34 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + andn x13, x11, x24 # perform operation + 80003a34: 4185f6b3 andn x13,x11,x24 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a38: 0001b383 ld x7,0(x3) + 80003a3c: 00d38c63 beq x7,x13,80003a54 + 80003a40: 2d80446f jal x8,80007d18 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 80013d65 .word 0x80013d65 + 80003a50: 00000000 .word 0x00000000 + 80003a54: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003a58: 0000b103 ld x2,0(x1) + 80003a5c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000ffffffff + 80003a60: 0000b783 ld x15,0(x1) + 80003a64: 00808093 addi x1,x1,8 + +0000000080003a68 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + andn x25, x2, x15 # perform operation + 80003a68: 40f17cb3 andn x25,x2,x15 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a6c: 0001b383 ld x7,0(x3) + 80003a70: 01938c63 beq x7,x25,80003a88 + 80003a74: 2a40446f jal x8,80007d18 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80013dd4 .word 0x80013dd4 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003a8c: 0000b303 ld x6,0(x1) + 80003a90: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x00000000fffffffe + 80003a94: 0000b483 ld x9,0(x1) + 80003a98: 00808093 addi x1,x1,8 + +0000000080003a9c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + andn x17, x6, x9 # perform operation + 80003a9c: 409378b3 andn x17,x6,x9 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa0: 0001b383 ld x7,0(x3) + 80003aa4: 01138c63 beq x7,x17,80003abc + 80003aa8: 2700446f jal x8,80007d18 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 80013e3b .word 0x80013e3b + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80003ac0: 0000b483 ld x9,0(x1) + 80003ac4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000000 + 80003ac8: 0000bf83 ld x31,0(x1) + 80003acc: 00808093 addi x1,x1,8 + +0000000080003ad0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + andn x27, x9, x31 # perform operation + 80003ad0: 41f4fdb3 andn x27,x9,x31 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad4: 0001b383 ld x7,0(x3) + 80003ad8: 01b38c63 beq x7,x27,80003af0 + 80003adc: 23c0446f jal x8,80007d18 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 80013ea2 .word 0x80013ea2 + 80003aec: 00000000 .word 0x00000000 + 80003af0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003af4: 0000bc03 ld x24,0(x1) + 80003af8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000100000001 + 80003afc: 0000b603 ld x12,0(x1) + 80003b00: 00808093 addi x1,x1,8 + +0000000080003b04 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + andn x26, x24, x12 # perform operation + 80003b04: 40cc7d33 andn x26,x24,x12 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b08: 0001b383 ld x7,0(x3) + 80003b0c: 01a38c63 beq x7,x26,80003b24 + 80003b10: 2080446f jal x8,80007d18 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80013f0a .word 0x80013f0a + 80003b20: 00000000 .word 0x00000000 + 80003b24: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003b28: 0000ba83 ld x21,0(x1) + 80003b2c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x0000000000000000 + 80003b30: 0000b283 ld x5,0(x1) + 80003b34: 00808093 addi x1,x1,8 + +0000000080003b38 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + andn x18, x21, x5 # perform operation + 80003b38: 405af933 andn x18,x21,x5 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b3c: 0001b383 ld x7,0(x3) + 80003b40: 01238c63 beq x7,x18,80003b58 + 80003b44: 1d40446f jal x8,80007d18 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 80013f72 .word 0x80013f72 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 0000bf03 ld x30,0(x1) + 80003b60: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000000000001 + 80003b64: 0000bf83 ld x31,0(x1) + 80003b68: 00808093 addi x1,x1,8 + +0000000080003b6c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + andn x22, x30, x31 # perform operation + 80003b6c: 41ff7b33 andn x22,x30,x31 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b70: 0001b383 ld x7,0(x3) + 80003b74: 01638c63 beq x7,x22,80003b8c + 80003b78: 1a00446f jal x8,80007d18 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80013fd2 .word 0x80013fd2 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003b90: 0000bb83 ld x23,0(x1) + 80003b94: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000002 + 80003b98: 0000be83 ld x29,0(x1) + 80003b9c: 00808093 addi x1,x1,8 + +0000000080003ba0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + andn x12, x23, x29 # perform operation + 80003ba0: 41dbf633 andn x12,x23,x29 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba4: 0001b383 ld x7,0(x3) + 80003ba8: 00c38c63 beq x7,x12,80003bc0 + 80003bac: 16c0446f jal x8,80007d18 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 80014032 .word 0x80014032 + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 0000bf83 ld x31,0(x1) + 80003bc8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x8000000000000000 + 80003bcc: 0000b583 ld x11,0(x1) + 80003bd0: 00808093 addi x1,x1,8 + +0000000080003bd4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + andn x21, x31, x11 # perform operation + 80003bd4: 40bffab3 andn x21,x31,x11 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd8: 0001b383 ld x7,0(x3) + 80003bdc: 01538c63 beq x7,x21,80003bf4 + 80003be0: 1380446f jal x8,80007d18 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 80014092 .word 0x80014092 + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 0000b283 ld x5,0(x1) + 80003bfc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8000000000000001 + 80003c00: 0000b803 ld x16,0(x1) + 80003c04: 00808093 addi x1,x1,8 + +0000000080003c08 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + andn x24, x5, x16 # perform operation + 80003c08: 4102fc33 andn x24,x5,x16 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c0c: 0001b383 ld x7,0(x3) + 80003c10: 01838c63 beq x7,x24,80003c28 + 80003c14: 1040446f jal x8,80007d18 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 80014101 .word 0x80014101 + 80003c24: 00000000 .word 0x00000000 + 80003c28: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 0000b203 ld x4,0(x1) + 80003c30: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x7fffffffffffffff + 80003c34: 0000b883 ld x17,0(x1) + 80003c38: 00808093 addi x1,x1,8 + +0000000080003c3c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + andn x22, x4, x17 # perform operation + 80003c3c: 41127b33 andn x22,x4,x17 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c40: 0001b383 ld x7,0(x3) + 80003c44: 01638c63 beq x7,x22,80003c5c + 80003c48: 0d00446f jal x8,80007d18 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 80014170 .word 0x80014170 + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003c60: 0000be03 ld x28,0(x1) + 80003c64: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80003c68: 0000b503 ld x10,0(x1) + 80003c6c: 00808093 addi x1,x1,8 + +0000000080003c70 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + andn x30, x28, x10 # perform operation + 80003c70: 40ae7f33 andn x30,x28,x10 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c74: 0001b383 ld x7,0(x3) + 80003c78: 01e38c63 beq x7,x30,80003c90 + 80003c7c: 09c0446f jal x8,80007d18 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 800141df .word 0x800141df + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003c94: 0000bf83 ld x31,0(x1) + 80003c98: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xffffffffffffffff + 80003c9c: 0000b903 ld x18,0(x1) + 80003ca0: 00808093 addi x1,x1,8 + +0000000080003ca4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + andn x23, x31, x18 # perform operation + 80003ca4: 412ffbb3 andn x23,x31,x18 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca8: 0001b383 ld x7,0(x3) + 80003cac: 01738c63 beq x7,x23,80003cc4 + 80003cb0: 0680446f jal x8,80007d18 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 8001424e .word 0x8001424e + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 0000b903 ld x18,0(x1) + 80003ccc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xfffffffffffffffe + 80003cd0: 0000b203 ld x4,0(x1) + 80003cd4: 00808093 addi x1,x1,8 + +0000000080003cd8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + andn x25, x18, x4 # perform operation + 80003cd8: 40497cb3 andn x25,x18,x4 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cdc: 0001b383 ld x7,0(x3) + 80003ce0: 01938c63 beq x7,x25,80003cf8 + 80003ce4: 0340446f jal x8,80007d18 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 800142bd .word 0x800142bd + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 0000bf03 ld x30,0(x1) + 80003d00: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80003d04: 0000b803 ld x16,0(x1) + 80003d08: 00808093 addi x1,x1,8 + +0000000080003d0c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + andn x21, x30, x16 # perform operation + 80003d0c: 410f7ab3 andn x21,x30,x16 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d10: 0001b383 ld x7,0(x3) + 80003d14: 01538c63 beq x7,x21,80003d2c + 80003d18: 0000446f jal x8,80007d18 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 8001432c .word 0x8001432c + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003d30: 0000b903 ld x18,0(x1) + 80003d34: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80003d38: 0000bf83 ld x31,0(x1) + 80003d3c: 00808093 addi x1,x1,8 + +0000000080003d40 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + andn x22, x18, x31 # perform operation + 80003d40: 41f97b33 andn x22,x18,x31 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d44: 0001b383 ld x7,0(x3) + 80003d48: 01638c63 beq x7,x22,80003d60 + 80003d4c: 7cd0346f jal x8,80007d18 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 8001439b .word 0x8001439b + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003d64: 0000b883 ld x17,0(x1) + 80003d68: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x5555555555555555 + 80003d6c: 0000bf03 ld x30,0(x1) + 80003d70: 00808093 addi x1,x1,8 + +0000000080003d74 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + andn x26, x17, x30 # perform operation + 80003d74: 41e8fd33 andn x26,x17,x30 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d78: 0001b383 ld x7,0(x3) + 80003d7c: 01a38c63 beq x7,x26,80003d94 + 80003d80: 7990346f jal x8,80007d18 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 8001440a .word 0x8001440a + 80003d90: 00000000 .word 0x00000000 + 80003d94: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003d98: 0000b903 ld x18,0(x1) + 80003d9c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x00000000ffffffff + 80003da0: 0000bf83 ld x31,0(x1) + 80003da4: 00808093 addi x1,x1,8 + +0000000080003da8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + andn x25, x18, x31 # perform operation + 80003da8: 41f97cb3 andn x25,x18,x31 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003dac: 0001b383 ld x7,0(x3) + 80003db0: 01938c63 beq x7,x25,80003dc8 + 80003db4: 7650346f jal x8,80007d18 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 80014479 .word 0x80014479 + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 0000be83 ld x29,0(x1) + 80003dd0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000fffffffe + 80003dd4: 0000b783 ld x15,0(x1) + 80003dd8: 00808093 addi x1,x1,8 + +0000000080003ddc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + andn x11, x29, x15 # perform operation + 80003ddc: 40fef5b3 andn x11,x29,x15 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de0: 0001b383 ld x7,0(x3) + 80003de4: 00b38c63 beq x7,x11,80003dfc + 80003de8: 7310346f jal x8,80007d18 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 800144e0 .word 0x800144e0 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003e00: 0000bb03 ld x22,0(x1) + 80003e04: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x0000000100000000 + 80003e08: 0000bf03 ld x30,0(x1) + 80003e0c: 00808093 addi x1,x1,8 + +0000000080003e10 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + andn x21, x22, x30 # perform operation + 80003e10: 41eb7ab3 andn x21,x22,x30 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e14: 0001b383 ld x7,0(x3) + 80003e18: 01538c63 beq x7,x21,80003e30 + 80003e1c: 6fd0346f jal x8,80007d18 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 80014547 .word 0x80014547 + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003e34: 0000b983 ld x19,0(x1) + 80003e38: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000100000001 + 80003e3c: 0000be03 ld x28,0(x1) + 80003e40: 00808093 addi x1,x1,8 + +0000000080003e44 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + andn x17, x19, x28 # perform operation + 80003e44: 41c9f8b3 andn x17,x19,x28 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e48: 0001b383 ld x7,0(x3) + 80003e4c: 01138c63 beq x7,x17,80003e64 + 80003e50: 6c90346f jal x8,80007d18 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 800145af .word 0x800145af + 80003e60: 00000000 .word 0x00000000 + 80003e64: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x5555555555555555 + 80003e68: 0000b203 ld x4,0(x1) + 80003e6c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000000000000 + 80003e70: 0000bc83 ld x25,0(x1) + 80003e74: 00808093 addi x1,x1,8 + +0000000080003e78 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + andn x5, x4, x25 # perform operation + 80003e78: 419272b3 andn x5,x4,x25 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e7c: 0001b383 ld x7,0(x3) + 80003e80: 00538c63 beq x7,x5,80003e98 + 80003e84: 6950346f jal x8,80007d18 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 80014617 .word 0x80014617 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x5555555555555555 + 80003e9c: 0000bd03 ld x26,0(x1) + 80003ea0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000001 + 80003ea4: 0000ba83 ld x21,0(x1) + 80003ea8: 00808093 addi x1,x1,8 + +0000000080003eac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + andn x16, x26, x21 # perform operation + 80003eac: 415d7833 andn x16,x26,x21 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb0: 0001b383 ld x7,0(x3) + 80003eb4: 01038c63 beq x7,x16,80003ecc + 80003eb8: 6610346f jal x8,80007d18 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 80014677 .word 0x80014677 + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x5555555555555555 + 80003ed0: 0000bd03 ld x26,0(x1) + 80003ed4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000002 + 80003ed8: 0000bc03 ld x24,0(x1) + 80003edc: 00808093 addi x1,x1,8 + +0000000080003ee0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + andn x20, x26, x24 # perform operation + 80003ee0: 418d7a33 andn x20,x26,x24 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee4: 0001b383 ld x7,0(x3) + 80003ee8: 01438c63 beq x7,x20,80003f00 + 80003eec: 62d0346f jal x8,80007d18 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 800146d7 .word 0x800146d7 + 80003efc: 00000000 .word 0x00000000 + 80003f00: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5555555555555555 + 80003f04: 0000be03 ld x28,0(x1) + 80003f08: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x8000000000000000 + 80003f0c: 0000b703 ld x14,0(x1) + 80003f10: 00808093 addi x1,x1,8 + +0000000080003f14 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + andn x25, x28, x14 # perform operation + 80003f14: 40ee7cb3 andn x25,x28,x14 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f18: 0001b383 ld x7,0(x3) + 80003f1c: 01938c63 beq x7,x25,80003f34 + 80003f20: 5f90346f jal x8,80007d18 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 80014737 .word 0x80014737 + 80003f30: 00000000 .word 0x00000000 + 80003f34: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x5555555555555555 + 80003f38: 0000be83 ld x29,0(x1) + 80003f3c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x8000000000000001 + 80003f40: 0000b283 ld x5,0(x1) + 80003f44: 00808093 addi x1,x1,8 + +0000000080003f48 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + andn x6, x29, x5 # perform operation + 80003f48: 405ef333 andn x6,x29,x5 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f4c: 0001b383 ld x7,0(x3) + 80003f50: 00638c63 beq x7,x6,80003f68 + 80003f54: 5c50346f jal x8,80007d18 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 800147a6 .word 0x800147a6 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x5555555555555555 + 80003f6c: 0000b503 ld x10,0(x1) + 80003f70: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x7fffffffffffffff + 80003f74: 0000b803 ld x16,0(x1) + 80003f78: 00808093 addi x1,x1,8 + +0000000080003f7c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + andn x5, x10, x16 # perform operation + 80003f7c: 410572b3 andn x5,x10,x16 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f80: 0001b383 ld x7,0(x3) + 80003f84: 00538c63 beq x7,x5,80003f9c + 80003f88: 5910346f jal x8,80007d18 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 80014815 .word 0x80014815 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x5555555555555555 + 80003fa0: 0000bb83 ld x23,0(x1) + 80003fa4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80003fa8: 0000b483 ld x9,0(x1) + 80003fac: 00808093 addi x1,x1,8 + +0000000080003fb0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + andn x13, x23, x9 # perform operation + 80003fb0: 409bf6b3 andn x13,x23,x9 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb4: 0001b383 ld x7,0(x3) + 80003fb8: 00d38c63 beq x7,x13,80003fd0 + 80003fbc: 55d0346f jal x8,80007d18 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 80014884 .word 0x80014884 + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x5555555555555555 + 80003fd4: 0000b603 ld x12,0(x1) + 80003fd8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xffffffffffffffff + 80003fdc: 0000b103 ld x2,0(x1) + 80003fe0: 00808093 addi x1,x1,8 + +0000000080003fe4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + andn x29, x12, x2 # perform operation + 80003fe4: 40267eb3 andn x29,x12,x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe8: 0001b383 ld x7,0(x3) + 80003fec: 01d38c63 beq x7,x29,80004004 + 80003ff0: 5290346f jal x8,80007d18 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 800148f3 .word 0x800148f3 + 80004000: 00000000 .word 0x00000000 + 80004004: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x5555555555555555 + 80004008: 0000b303 ld x6,0(x1) + 8000400c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xfffffffffffffffe + 80004010: 0000b203 ld x4,0(x1) + 80004014: 00808093 addi x1,x1,8 + +0000000080004018 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + andn x22, x6, x4 # perform operation + 80004018: 40437b33 andn x22,x6,x4 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000401c: 0001b383 ld x7,0(x3) + 80004020: 01638c63 beq x7,x22,80004038 + 80004024: 4f50346f jal x8,80007d18 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 80014962 .word 0x80014962 + 80004034: 00000000 .word 0x00000000 + 80004038: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5555555555555555 + 8000403c: 0000b703 ld x14,0(x1) + 80004040: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80004044: 0000b983 ld x19,0(x1) + 80004048: 00808093 addi x1,x1,8 + +000000008000404c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + andn x28, x14, x19 # perform operation + 8000404c: 41377e33 andn x28,x14,x19 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004050: 0001b383 ld x7,0(x3) + 80004054: 01c38c63 beq x7,x28,8000406c + 80004058: 4c10346f jal x8,80007d18 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 800149d1 .word 0x800149d1 + 80004068: 00000000 .word 0x00000000 + 8000406c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x5555555555555555 + 80004070: 0000bd03 ld x26,0(x1) + 80004074: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 80004078: 0000bc83 ld x25,0(x1) + 8000407c: 00808093 addi x1,x1,8 + +0000000080004080 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + andn x24, x26, x25 # perform operation + 80004080: 419d7c33 andn x24,x26,x25 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004084: 0001b383 ld x7,0(x3) + 80004088: 01838c63 beq x7,x24,800040a0 + 8000408c: 48d0346f jal x8,80007d18 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 80014a40 .word 0x80014a40 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x5555555555555555 + 800040a4: 0000b203 ld x4,0(x1) + 800040a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x5555555555555555 + 800040ac: 0000bc83 ld x25,0(x1) + 800040b0: 00808093 addi x1,x1,8 + +00000000800040b4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + andn x2, x4, x25 # perform operation + 800040b4: 41927133 andn x2,x4,x25 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b8: 0001b383 ld x7,0(x3) + 800040bc: 00238c63 beq x7,x2,800040d4 + 800040c0: 4590346f jal x8,80007d18 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80014aaf .word 0x80014aaf + 800040d0: 00000000 .word 0x00000000 + 800040d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x5555555555555555 + 800040d8: 0000b503 ld x10,0(x1) + 800040dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000000ffffffff + 800040e0: 0000b683 ld x13,0(x1) + 800040e4: 00808093 addi x1,x1,8 + +00000000800040e8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + andn x16, x10, x13 # perform operation + 800040e8: 40d57833 andn x16,x10,x13 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040ec: 0001b383 ld x7,0(x3) + 800040f0: 01038c63 beq x7,x16,80004108 + 800040f4: 4250346f jal x8,80007d18 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 80014b1e .word 0x80014b1e + 80004104: 00000000 .word 0x00000000 + 80004108: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5555555555555555 + 8000410c: 0000b703 ld x14,0(x1) + 80004110: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x00000000fffffffe + 80004114: 0000bb83 ld x23,0(x1) + 80004118: 00808093 addi x1,x1,8 + +000000008000411c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + andn x31, x14, x23 # perform operation + 8000411c: 41777fb3 andn x31,x14,x23 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004120: 0001b383 ld x7,0(x3) + 80004124: 01f38c63 beq x7,x31,8000413c + 80004128: 3f10346f jal x8,80007d18 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 80014b85 .word 0x80014b85 + 80004138: 00000000 .word 0x00000000 + 8000413c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5555555555555555 + 80004140: 0000be03 ld x28,0(x1) + 80004144: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000100000000 + 80004148: 0000bc83 ld x25,0(x1) + 8000414c: 00808093 addi x1,x1,8 + +0000000080004150 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + andn x10, x28, x25 # perform operation + 80004150: 419e7533 andn x10,x28,x25 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004154: 0001b383 ld x7,0(x3) + 80004158: 00a38c63 beq x7,x10,80004170 + 8000415c: 3bd0346f jal x8,80007d18 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 80014bec .word 0x80014bec + 8000416c: 00000000 .word 0x00000000 + 80004170: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x5555555555555555 + 80004174: 0000bf03 ld x30,0(x1) + 80004178: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0000000100000001 + 8000417c: 0000bb03 ld x22,0(x1) + 80004180: 00808093 addi x1,x1,8 + +0000000080004184 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + andn x20, x30, x22 # perform operation + 80004184: 416f7a33 andn x20,x30,x22 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004188: 0001b383 ld x7,0(x3) + 8000418c: 01438c63 beq x7,x20,800041a4 + 80004190: 3890346f jal x8,80007d18 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 80014c54 .word 0x80014c54 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x00000000ffffffff + 800041a8: 0000bb83 ld x23,0(x1) + 800041ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000000 + 800041b0: 0000ba83 ld x21,0(x1) + 800041b4: 00808093 addi x1,x1,8 + +00000000800041b8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + andn x27, x23, x21 # perform operation + 800041b8: 415bfdb3 andn x27,x23,x21 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041bc: 0001b383 ld x7,0(x3) + 800041c0: 01b38c63 beq x7,x27,800041d8 + 800041c4: 3550346f jal x8,80007d18 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 80014cbc .word 0x80014cbc + 800041d4: 00000000 .word 0x00000000 + 800041d8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000ffffffff + 800041dc: 0000bc03 ld x24,0(x1) + 800041e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x0000000000000001 + 800041e4: 0000b203 ld x4,0(x1) + 800041e8: 00808093 addi x1,x1,8 + +00000000800041ec : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + andn x14, x24, x4 # perform operation + 800041ec: 404c7733 andn x14,x24,x4 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f0: 0001b383 ld x7,0(x3) + 800041f4: 00e38c63 beq x7,x14,8000420c + 800041f8: 3210346f jal x8,80007d18 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 80014d14 .word 0x80014d14 + 80004208: 00000000 .word 0x00000000 + 8000420c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000000ffffffff + 80004210: 0000be83 ld x29,0(x1) + 80004214: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000002 + 80004218: 0000ba83 ld x21,0(x1) + 8000421c: 00808093 addi x1,x1,8 + +0000000080004220 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + andn x17, x29, x21 # perform operation + 80004220: 415ef8b3 andn x17,x29,x21 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004224: 0001b383 ld x7,0(x3) + 80004228: 01138c63 beq x7,x17,80004240 + 8000422c: 2ed0346f jal x8,80007d18 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 80014d6c .word 0x80014d6c + 8000423c: 00000000 .word 0x00000000 + 80004240: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x00000000ffffffff + 80004244: 0000bd03 ld x26,0(x1) + 80004248: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x8000000000000000 + 8000424c: 0000ba83 ld x21,0(x1) + 80004250: 00808093 addi x1,x1,8 + +0000000080004254 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + andn x11, x26, x21 # perform operation + 80004254: 415d75b3 andn x11,x26,x21 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004258: 0001b383 ld x7,0(x3) + 8000425c: 00b38c63 beq x7,x11,80004274 + 80004260: 2b90346f jal x8,80007d18 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 80014dc4 .word 0x80014dc4 + 80004270: 00000000 .word 0x00000000 + 80004274: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x00000000ffffffff + 80004278: 0000b703 ld x14,0(x1) + 8000427c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x8000000000000001 + 80004280: 0000b903 ld x18,0(x1) + 80004284: 00808093 addi x1,x1,8 + +0000000080004288 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + andn x4, x14, x18 # perform operation + 80004288: 41277233 andn x4,x14,x18 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000428c: 0001b383 ld x7,0(x3) + 80004290: 00438c63 beq x7,x4,800042a8 + 80004294: 2850346f jal x8,80007d18 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 80014e2b .word 0x80014e2b + 800042a4: 00000000 .word 0x00000000 + 800042a8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x00000000ffffffff + 800042ac: 0000b503 ld x10,0(x1) + 800042b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x7fffffffffffffff + 800042b4: 0000b603 ld x12,0(x1) + 800042b8: 00808093 addi x1,x1,8 + +00000000800042bc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + andn x15, x10, x12 # perform operation + 800042bc: 40c577b3 andn x15,x10,x12 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c0: 0001b383 ld x7,0(x3) + 800042c4: 00f38c63 beq x7,x15,800042dc + 800042c8: 2510346f jal x8,80007d18 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 80014e92 .word 0x80014e92 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000000ffffffff + 800042e0: 0000bf03 ld x30,0(x1) + 800042e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x7ffffffffffffffe + 800042e8: 0000b203 ld x4,0(x1) + 800042ec: 00808093 addi x1,x1,8 + +00000000800042f0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + andn x17, x30, x4 # perform operation + 800042f0: 404f78b3 andn x17,x30,x4 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f4: 0001b383 ld x7,0(x3) + 800042f8: 01138c63 beq x7,x17,80004310 + 800042fc: 21d0346f jal x8,80007d18 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 80014ef9 .word 0x80014ef9 + 8000430c: 00000000 .word 0x00000000 + 80004310: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000000ffffffff + 80004314: 0000be83 ld x29,0(x1) + 80004318: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0xffffffffffffffff + 8000431c: 0000b283 ld x5,0(x1) + 80004320: 00808093 addi x1,x1,8 + +0000000080004324 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + andn x28, x29, x5 # perform operation + 80004324: 405efe33 andn x28,x29,x5 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004328: 0001b383 ld x7,0(x3) + 8000432c: 01c38c63 beq x7,x28,80004344 + 80004330: 1e90346f jal x8,80007d18 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 80014f60 .word 0x80014f60 + 80004340: 00000000 .word 0x00000000 + 80004344: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x00000000ffffffff + 80004348: 0000b803 ld x16,0(x1) + 8000434c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xfffffffffffffffe + 80004350: 0000b103 ld x2,0(x1) + 80004354: 00808093 addi x1,x1,8 + +0000000080004358 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + andn x12, x16, x2 # perform operation + 80004358: 40287633 andn x12,x16,x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000435c: 0001b383 ld x7,0(x3) + 80004360: 00c38c63 beq x7,x12,80004378 + 80004364: 1b50346f jal x8,80007d18 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 80014fc7 .word 0x80014fc7 + 80004374: 00000000 .word 0x00000000 + 80004378: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x00000000ffffffff + 8000437c: 0000b903 ld x18,0(x1) + 80004380: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80004384: 0000ba83 ld x21,0(x1) + 80004388: 00808093 addi x1,x1,8 + +000000008000438c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + andn x30, x18, x21 # perform operation + 8000438c: 41597f33 andn x30,x18,x21 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004390: 0001b383 ld x7,0(x3) + 80004394: 01e38c63 beq x7,x30,800043ac + 80004398: 1810346f jal x8,80007d18 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 8001502e .word 0x8001502e + 800043a8: 00000000 .word 0x00000000 + 800043ac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x00000000ffffffff + 800043b0: 0000b603 ld x12,0(x1) + 800043b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 800043b8: 0000b783 ld x15,0(x1) + 800043bc: 00808093 addi x1,x1,8 + +00000000800043c0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + andn x27, x12, x15 # perform operation + 800043c0: 40f67db3 andn x27,x12,x15 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c4: 0001b383 ld x7,0(x3) + 800043c8: 01b38c63 beq x7,x27,800043e0 + 800043cc: 14d0346f jal x8,80007d18 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 80015095 .word 0x80015095 + 800043dc: 00000000 .word 0x00000000 + 800043e0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000ffffffff + 800043e4: 0000bc03 ld x24,0(x1) + 800043e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x5555555555555555 + 800043ec: 0000b903 ld x18,0(x1) + 800043f0: 00808093 addi x1,x1,8 + +00000000800043f4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + andn x2, x24, x18 # perform operation + 800043f4: 412c7133 andn x2,x24,x18 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f8: 0001b383 ld x7,0(x3) + 800043fc: 00238c63 beq x7,x2,80004414 + 80004400: 1190346f jal x8,80007d18 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 800150fc .word 0x800150fc + 80004410: 00000000 .word 0x00000000 + 80004414: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000ffffffff + 80004418: 0000b303 ld x6,0(x1) + 8000441c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x00000000ffffffff + 80004420: 0000bb83 ld x23,0(x1) + 80004424: 00808093 addi x1,x1,8 + +0000000080004428 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + andn x27, x6, x23 # perform operation + 80004428: 41737db3 andn x27,x6,x23 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000442c: 0001b383 ld x7,0(x3) + 80004430: 01b38c63 beq x7,x27,80004448 + 80004434: 0e50346f jal x8,80007d18 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 80015163 .word 0x80015163 + 80004444: 00000000 .word 0x00000000 + 80004448: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000ffffffff + 8000444c: 0000bc03 ld x24,0(x1) + 80004450: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x00000000fffffffe + 80004454: 0000ba03 ld x20,0(x1) + 80004458: 00808093 addi x1,x1,8 + +000000008000445c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + andn x17, x24, x20 # perform operation + 8000445c: 414c78b3 andn x17,x24,x20 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004460: 0001b383 ld x7,0(x3) + 80004464: 01138c63 beq x7,x17,8000447c + 80004468: 0b10346f jal x8,80007d18 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 800151c2 .word 0x800151c2 + 80004478: 00000000 .word 0x00000000 + 8000447c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000000ffffffff + 80004480: 0000bb03 ld x22,0(x1) + 80004484: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000100000000 + 80004488: 0000b583 ld x11,0(x1) + 8000448c: 00808093 addi x1,x1,8 + +0000000080004490 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + andn x9, x22, x11 # perform operation + 80004490: 40bb74b3 andn x9,x22,x11 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004494: 0001b383 ld x7,0(x3) + 80004498: 00938c63 beq x7,x9,800044b0 + 8000449c: 07d0346f jal x8,80007d18 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 80015221 .word 0x80015221 + 800044ac: 00000000 .word 0x00000000 + 800044b0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000ffffffff + 800044b4: 0000b303 ld x6,0(x1) + 800044b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x0000000100000001 + 800044bc: 0000b203 ld x4,0(x1) + 800044c0: 00808093 addi x1,x1,8 + +00000000800044c4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + andn x16, x6, x4 # perform operation + 800044c4: 40437833 andn x16,x6,x4 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c8: 0001b383 ld x7,0(x3) + 800044cc: 01038c63 beq x7,x16,800044e4 + 800044d0: 0490346f jal x8,80007d18 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 80015281 .word 0x80015281 + 800044e0: 00000000 .word 0x00000000 + 800044e4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000000fffffffe + 800044e8: 0000b483 ld x9,0(x1) + 800044ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000000 + 800044f0: 0000bd03 ld x26,0(x1) + 800044f4: 00808093 addi x1,x1,8 + +00000000800044f8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + andn x20, x9, x26 # perform operation + 800044f8: 41a4fa33 andn x20,x9,x26 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044fc: 0001b383 ld x7,0(x3) + 80004500: 01438c63 beq x7,x20,80004518 + 80004504: 0150346f jal x8,80007d18 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 800152e1 .word 0x800152e1 + 80004514: 00000000 .word 0x00000000 + 80004518: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000000fffffffe + 8000451c: 0000be83 ld x29,0(x1) + 80004520: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0000000000000001 + 80004524: 0000bb03 ld x22,0(x1) + 80004528: 00808093 addi x1,x1,8 + +000000008000452c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + andn x6, x29, x22 # perform operation + 8000452c: 416ef333 andn x6,x29,x22 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004530: 0001b383 ld x7,0(x3) + 80004534: 00638c63 beq x7,x6,8000454c + 80004538: 7e00346f jal x8,80007d18 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 80015339 .word 0x80015339 + 80004548: 00000000 .word 0x00000000 + 8000454c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x00000000fffffffe + 80004550: 0000bc83 ld x25,0(x1) + 80004554: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000002 + 80004558: 0000be83 ld x29,0(x1) + 8000455c: 00808093 addi x1,x1,8 + +0000000080004560 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + andn x23, x25, x29 # perform operation + 80004560: 41dcfbb3 andn x23,x25,x29 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004564: 0001b383 ld x7,0(x3) + 80004568: 01738c63 beq x7,x23,80004580 + 8000456c: 7ac0346f jal x8,80007d18 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 80015391 .word 0x80015391 + 8000457c: 00000000 .word 0x00000000 + 80004580: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000000fffffffe + 80004584: 0000b483 ld x9,0(x1) + 80004588: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x8000000000000000 + 8000458c: 0000b683 ld x13,0(x1) + 80004590: 00808093 addi x1,x1,8 + +0000000080004594 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + andn x19, x9, x13 # perform operation + 80004594: 40d4f9b3 andn x19,x9,x13 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004598: 0001b383 ld x7,0(x3) + 8000459c: 01338c63 beq x7,x19,800045b4 + 800045a0: 7780346f jal x8,80007d18 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 800153e9 .word 0x800153e9 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x00000000fffffffe + 800045b8: 0000be03 ld x28,0(x1) + 800045bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x8000000000000001 + 800045c0: 0000be83 ld x29,0(x1) + 800045c4: 00808093 addi x1,x1,8 + +00000000800045c8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + andn x30, x28, x29 # perform operation + 800045c8: 41de7f33 andn x30,x28,x29 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045cc: 0001b383 ld x7,0(x3) + 800045d0: 01e38c63 beq x7,x30,800045e8 + 800045d4: 7440346f jal x8,80007d18 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 80015450 .word 0x80015450 + 800045e4: 00000000 .word 0x00000000 + 800045e8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000000fffffffe + 800045ec: 0000ba83 ld x21,0(x1) + 800045f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7fffffffffffffff + 800045f4: 0000bf03 ld x30,0(x1) + 800045f8: 00808093 addi x1,x1,8 + +00000000800045fc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + andn x19, x21, x30 # perform operation + 800045fc: 41eaf9b3 andn x19,x21,x30 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004600: 0001b383 ld x7,0(x3) + 80004604: 01338c63 beq x7,x19,8000461c + 80004608: 7100346f jal x8,80007d18 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 800154b7 .word 0x800154b7 + 80004618: 00000000 .word 0x00000000 + 8000461c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x00000000fffffffe + 80004620: 0000bd83 ld x27,0(x1) + 80004624: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80004628: 0000b783 ld x15,0(x1) + 8000462c: 00808093 addi x1,x1,8 + +0000000080004630 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + andn x25, x27, x15 # perform operation + 80004630: 40fdfcb3 andn x25,x27,x15 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004634: 0001b383 ld x7,0(x3) + 80004638: 01938c63 beq x7,x25,80004650 + 8000463c: 6dc0346f jal x8,80007d18 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 8001551e .word 0x8001551e + 8000464c: 00000000 .word 0x00000000 + 80004650: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x00000000fffffffe + 80004654: 0000b103 ld x2,0(x1) + 80004658: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xffffffffffffffff + 8000465c: 0000b483 ld x9,0(x1) + 80004660: 00808093 addi x1,x1,8 + +0000000080004664 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + andn x6, x2, x9 # perform operation + 80004664: 40917333 andn x6,x2,x9 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004668: 0001b383 ld x7,0(x3) + 8000466c: 00638c63 beq x7,x6,80004684 + 80004670: 6a80346f jal x8,80007d18 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 80015585 .word 0x80015585 + 80004680: 00000000 .word 0x00000000 + 80004684: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000000fffffffe + 80004688: 0000bf03 ld x30,0(x1) + 8000468c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004690: 0000b583 ld x11,0(x1) + 80004694: 00808093 addi x1,x1,8 + +0000000080004698 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + andn x26, x30, x11 # perform operation + 80004698: 40bf7d33 andn x26,x30,x11 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000469c: 0001b383 ld x7,0(x3) + 800046a0: 01a38c63 beq x7,x26,800046b8 + 800046a4: 6740346f jal x8,80007d18 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 800155ec .word 0x800155ec + 800046b4: 00000000 .word 0x00000000 + 800046b8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x00000000fffffffe + 800046bc: 0000bc83 ld x25,0(x1) + 800046c0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 800046c4: 0000bb03 ld x22,0(x1) + 800046c8: 00808093 addi x1,x1,8 + +00000000800046cc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + andn x4, x25, x22 # perform operation + 800046cc: 416cf233 andn x4,x25,x22 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d0: 0001b383 ld x7,0(x3) + 800046d4: 00438c63 beq x7,x4,800046ec + 800046d8: 6400346f jal x8,80007d18 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 80015653 .word 0x80015653 + 800046e8: 00000000 .word 0x00000000 + 800046ec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x00000000fffffffe + 800046f0: 0000be83 ld x29,0(x1) + 800046f4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800046f8: 0000b583 ld x11,0(x1) + 800046fc: 00808093 addi x1,x1,8 + +0000000080004700 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + andn x27, x29, x11 # perform operation + 80004700: 40befdb3 andn x27,x29,x11 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004704: 0001b383 ld x7,0(x3) + 80004708: 01b38c63 beq x7,x27,80004720 + 8000470c: 60c0346f jal x8,80007d18 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 800156ba .word 0x800156ba + 8000471c: 00000000 .word 0x00000000 + 80004720: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000000fffffffe + 80004724: 0000bf03 ld x30,0(x1) + 80004728: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x5555555555555555 + 8000472c: 0000be83 ld x29,0(x1) + 80004730: 00808093 addi x1,x1,8 + +0000000080004734 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + andn x19, x30, x29 # perform operation + 80004734: 41df79b3 andn x19,x30,x29 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004738: 0001b383 ld x7,0(x3) + 8000473c: 01338c63 beq x7,x19,80004754 + 80004740: 5d80346f jal x8,80007d18 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 80015721 .word 0x80015721 + 80004750: 00000000 .word 0x00000000 + 80004754: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000000fffffffe + 80004758: 0000b783 ld x15,0(x1) + 8000475c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x00000000ffffffff + 80004760: 0000b883 ld x17,0(x1) + 80004764: 00808093 addi x1,x1,8 + +0000000080004768 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + andn x29, x15, x17 # perform operation + 80004768: 4117feb3 andn x29,x15,x17 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000476c: 0001b383 ld x7,0(x3) + 80004770: 01d38c63 beq x7,x29,80004788 + 80004774: 5a40346f jal x8,80007d18 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 80015788 .word 0x80015788 + 80004784: 00000000 .word 0x00000000 + 80004788: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x00000000fffffffe + 8000478c: 0000b283 ld x5,0(x1) + 80004790: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x00000000fffffffe + 80004794: 0000bb03 ld x22,0(x1) + 80004798: 00808093 addi x1,x1,8 + +000000008000479c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + andn x12, x5, x22 # perform operation + 8000479c: 4162f633 andn x12,x5,x22 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a0: 0001b383 ld x7,0(x3) + 800047a4: 00c38c63 beq x7,x12,800047bc + 800047a8: 5700346f jal x8,80007d18 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 800157e7 .word 0x800157e7 + 800047b8: 00000000 .word 0x00000000 + 800047bc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x00000000fffffffe + 800047c0: 0000be03 ld x28,0(x1) + 800047c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000000 + 800047c8: 0000bf83 ld x31,0(x1) + 800047cc: 00808093 addi x1,x1,8 + +00000000800047d0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + andn x19, x28, x31 # perform operation + 800047d0: 41fe79b3 andn x19,x28,x31 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d4: 0001b383 ld x7,0(x3) + 800047d8: 01338c63 beq x7,x19,800047f0 + 800047dc: 53c0346f jal x8,80007d18 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 80015846 .word 0x80015846 + 800047ec: 00000000 .word 0x00000000 + 800047f0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x00000000fffffffe + 800047f4: 0000b803 ld x16,0(x1) + 800047f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x0000000100000001 + 800047fc: 0000bb83 ld x23,0(x1) + 80004800: 00808093 addi x1,x1,8 + +0000000080004804 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + andn x20, x16, x23 # perform operation + 80004804: 41787a33 andn x20,x16,x23 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004808: 0001b383 ld x7,0(x3) + 8000480c: 01438c63 beq x7,x20,80004824 + 80004810: 5080346f jal x8,80007d18 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 800158a6 .word 0x800158a6 + 80004820: 00000000 .word 0x00000000 + 80004824: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000100000000 + 80004828: 0000b783 ld x15,0(x1) + 8000482c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000000000000 + 80004830: 0000bf83 ld x31,0(x1) + 80004834: 00808093 addi x1,x1,8 + +0000000080004838 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + andn x23, x15, x31 # perform operation + 80004838: 41f7fbb3 andn x23,x15,x31 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000483c: 0001b383 ld x7,0(x3) + 80004840: 01738c63 beq x7,x23,80004858 + 80004844: 4d40346f jal x8,80007d18 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 80015906 .word 0x80015906 + 80004854: 00000000 .word 0x00000000 + 80004858: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000100000000 + 8000485c: 0000b483 ld x9,0(x1) + 80004860: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000000000001 + 80004864: 0000bf83 ld x31,0(x1) + 80004868: 00808093 addi x1,x1,8 + +000000008000486c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + andn x20, x9, x31 # perform operation + 8000486c: 41f4fa33 andn x20,x9,x31 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004870: 0001b383 ld x7,0(x3) + 80004874: 01438c63 beq x7,x20,8000488c + 80004878: 4a00346f jal x8,80007d18 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 8001595f .word 0x8001595f + 80004888: 00000000 .word 0x00000000 + 8000488c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0x0000000100000000 + 80004890: 0000b203 ld x4,0(x1) + 80004894: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000000000002 + 80004898: 0000be03 ld x28,0(x1) + 8000489c: 00808093 addi x1,x1,8 + +00000000800048a0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + andn x20, x4, x28 # perform operation + 800048a0: 41c27a33 andn x20,x4,x28 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a4: 0001b383 ld x7,0(x3) + 800048a8: 01438c63 beq x7,x20,800048c0 + 800048ac: 46c0346f jal x8,80007d18 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 800159b8 .word 0x800159b8 + 800048bc: 00000000 .word 0x00000000 + 800048c0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0000000100000000 + 800048c4: 0000be03 ld x28,0(x1) + 800048c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x8000000000000000 + 800048cc: 0000b883 ld x17,0(x1) + 800048d0: 00808093 addi x1,x1,8 + +00000000800048d4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + andn x31, x28, x17 # perform operation + 800048d4: 411e7fb3 andn x31,x28,x17 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d8: 0001b383 ld x7,0(x3) + 800048dc: 01f38c63 beq x7,x31,800048f4 + 800048e0: 4380346f jal x8,80007d18 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 80015a11 .word 0x80015a11 + 800048f0: 00000000 .word 0x00000000 + 800048f4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000000 + 800048f8: 0000b983 ld x19,0(x1) + 800048fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x8000000000000001 + 80004900: 0000bf83 ld x31,0(x1) + 80004904: 00808093 addi x1,x1,8 + +0000000080004908 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + andn x6, x19, x31 # perform operation + 80004908: 41f9f333 andn x6,x19,x31 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 8000490c: 0001b383 ld x7,0(x3) + 80004910: 00638c63 beq x7,x6,80004928 + 80004914: 4040346f jal x8,80007d18 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 80015a79 .word 0x80015a79 + 80004924: 00000000 .word 0x00000000 + 80004928: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000100000000 + 8000492c: 0000b483 ld x9,0(x1) + 80004930: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7fffffffffffffff + 80004934: 0000ba03 ld x20,0(x1) + 80004938: 00808093 addi x1,x1,8 + +000000008000493c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + andn x15, x9, x20 # perform operation + 8000493c: 4144f7b3 andn x15,x9,x20 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004940: 0001b383 ld x7,0(x3) + 80004944: 00f38c63 beq x7,x15,8000495c + 80004948: 3d00346f jal x8,80007d18 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 80015ae1 .word 0x80015ae1 + 80004958: 00000000 .word 0x00000000 + 8000495c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000100000000 + 80004960: 0000b283 ld x5,0(x1) + 80004964: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80004968: 0000b703 ld x14,0(x1) + 8000496c: 00808093 addi x1,x1,8 + +0000000080004970 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + andn x29, x5, x14 # perform operation + 80004970: 40e2feb3 andn x29,x5,x14 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004974: 0001b383 ld x7,0(x3) + 80004978: 01d38c63 beq x7,x29,80004990 + 8000497c: 39c0346f jal x8,80007d18 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 80015b49 .word 0x80015b49 + 8000498c: 00000000 .word 0x00000000 + 80004990: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x0000000100000000 + 80004994: 0000bc03 ld x24,0(x1) + 80004998: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xffffffffffffffff + 8000499c: 0000b603 ld x12,0(x1) + 800049a0: 00808093 addi x1,x1,8 + +00000000800049a4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + andn x25, x24, x12 # perform operation + 800049a4: 40cc7cb3 andn x25,x24,x12 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a8: 0001b383 ld x7,0(x3) + 800049ac: 01938c63 beq x7,x25,800049c4 + 800049b0: 3680346f jal x8,80007d18 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 80015bb1 .word 0x80015bb1 + 800049c0: 00000000 .word 0x00000000 + 800049c4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000100000000 + 800049c8: 0000bc83 ld x25,0(x1) + 800049cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xfffffffffffffffe + 800049d0: 0000ba03 ld x20,0(x1) + 800049d4: 00808093 addi x1,x1,8 + +00000000800049d8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + andn x16, x25, x20 # perform operation + 800049d8: 414cf833 andn x16,x25,x20 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049dc: 0001b383 ld x7,0(x3) + 800049e0: 01038c63 beq x7,x16,800049f8 + 800049e4: 3340346f jal x8,80007d18 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 80015c19 .word 0x80015c19 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000100000000 + 800049fc: 0000b703 ld x14,0(x1) + 80004a00: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80004a04: 0000b583 ld x11,0(x1) + 80004a08: 00808093 addi x1,x1,8 + +0000000080004a0c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + andn x13, x14, x11 # perform operation + 80004a0c: 40b776b3 andn x13,x14,x11 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a10: 0001b383 ld x7,0(x3) + 80004a14: 00d38c63 beq x7,x13,80004a2c + 80004a18: 3000346f jal x8,80007d18 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 80015c81 .word 0x80015c81 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000100000000 + 80004a30: 0000b903 ld x18,0(x1) + 80004a34: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80004a38: 0000b503 ld x10,0(x1) + 80004a3c: 00808093 addi x1,x1,8 + +0000000080004a40 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + andn x4, x18, x10 # perform operation + 80004a40: 40a97233 andn x4,x18,x10 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a44: 0001b383 ld x7,0(x3) + 80004a48: 00438c63 beq x7,x4,80004a60 + 80004a4c: 2cc0346f jal x8,80007d18 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 80015ce9 .word 0x80015ce9 + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000100000000 + 80004a64: 0000b883 ld x17,0(x1) + 80004a68: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5555555555555555 + 80004a6c: 0000b603 ld x12,0(x1) + 80004a70: 00808093 addi x1,x1,8 + +0000000080004a74 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + andn x23, x17, x12 # perform operation + 80004a74: 40c8fbb3 andn x23,x17,x12 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a78: 0001b383 ld x7,0(x3) + 80004a7c: 01738c63 beq x7,x23,80004a94 + 80004a80: 2980346f jal x8,80007d18 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 80015d51 .word 0x80015d51 + 80004a90: 00000000 .word 0x00000000 + 80004a94: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0000000100000000 + 80004a98: 0000be03 ld x28,0(x1) + 80004a9c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000ffffffff + 80004aa0: 0000b783 ld x15,0(x1) + 80004aa4: 00808093 addi x1,x1,8 + +0000000080004aa8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + andn x13, x28, x15 # perform operation + 80004aa8: 40fe76b3 andn x13,x28,x15 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aac: 0001b383 ld x7,0(x3) + 80004ab0: 00d38c63 beq x7,x13,80004ac8 + 80004ab4: 2640346f jal x8,80007d18 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 80015db9 .word 0x80015db9 + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000100000000 + 80004acc: 0000b903 ld x18,0(x1) + 80004ad0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000000fffffffe + 80004ad4: 0000b703 ld x14,0(x1) + 80004ad8: 00808093 addi x1,x1,8 + +0000000080004adc : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + andn x4, x18, x14 # perform operation + 80004adc: 40e97233 andn x4,x18,x14 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae0: 0001b383 ld x7,0(x3) + 80004ae4: 00438c63 beq x7,x4,80004afc + 80004ae8: 2300346f jal x8,80007d18 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 80015e19 .word 0x80015e19 + 80004af8: 00000000 .word 0x00000000 + 80004afc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x0000000100000000 + 80004b00: 0000bd03 ld x26,0(x1) + 80004b04: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000100000000 + 80004b08: 0000b803 ld x16,0(x1) + 80004b0c: 00808093 addi x1,x1,8 + +0000000080004b10 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + andn x10, x26, x16 # perform operation + 80004b10: 410d7533 andn x10,x26,x16 + # Check if x10 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x10, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b14: 0001b383 ld x7,0(x3) + 80004b18: 00a38c63 beq x7,x10,80004b30 + 80004b1c: 1fc0346f jal x8,80007d18 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 80015e79 .word 0x80015e79 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x0000000100000000 + 80004b34: 0000bb03 ld x22,0(x1) + 80004b38: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000100000001 + 80004b3c: 0000bd03 ld x26,0(x1) + 80004b40: 00808093 addi x1,x1,8 + +0000000080004b44 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + andn x5, x22, x26 # perform operation + 80004b44: 41ab72b3 andn x5,x22,x26 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b48: 0001b383 ld x7,0(x3) + 80004b4c: 00538c63 beq x7,x5,80004b64 + 80004b50: 1c80346f jal x8,80007d18 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 80015eda .word 0x80015eda + 80004b60: 00000000 .word 0x00000000 + 80004b64: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000100000001 + 80004b68: 0000b803 ld x16,0(x1) + 80004b6c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0x0000000000000000 + 80004b70: 0000b203 ld x4,0(x1) + 80004b74: 00808093 addi x1,x1,8 + +0000000080004b78 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + andn x21, x16, x4 # perform operation + 80004b78: 40487ab3 andn x21,x16,x4 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b7c: 0001b383 ld x7,0(x3) + 80004b80: 01538c63 beq x7,x21,80004b98 + 80004b84: 1940346f jal x8,80007d18 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 80015f3b .word 0x80015f3b + 80004b94: 00000000 .word 0x00000000 + 80004b98: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x0000000100000001 + 80004b9c: 0000bd03 ld x26,0(x1) + 80004ba0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x0000000000000001 + 80004ba4: 0000bf03 ld x30,0(x1) + 80004ba8: 00808093 addi x1,x1,8 + +0000000080004bac : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + andn x20, x26, x30 # perform operation + 80004bac: 41ed7a33 andn x20,x26,x30 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb0: 0001b383 ld x7,0(x3) + 80004bb4: 01438c63 beq x7,x20,80004bcc + 80004bb8: 1600346f jal x8,80007d18 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 80015f94 .word 0x80015f94 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000100000001 + 80004bd0: 0000b603 ld x12,0(x1) + 80004bd4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x0000000000000002 + 80004bd8: 0000b783 ld x15,0(x1) + 80004bdc: 00808093 addi x1,x1,8 + +0000000080004be0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + andn x20, x12, x15 # perform operation + 80004be0: 40f67a33 andn x20,x12,x15 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be4: 0001b383 ld x7,0(x3) + 80004be8: 01438c63 beq x7,x20,80004c00 + 80004bec: 12c0346f jal x8,80007d18 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 80015fed .word 0x80015fed + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000100000001 + 80004c04: 0000bf83 ld x31,0(x1) + 80004c08: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x8000000000000000 + 80004c0c: 0000b483 ld x9,0(x1) + 80004c10: 00808093 addi x1,x1,8 + +0000000080004c14 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + andn x6, x31, x9 # perform operation + 80004c14: 409ff333 andn x6,x31,x9 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c18: 0001b383 ld x7,0(x3) + 80004c1c: 00638c63 beq x7,x6,80004c34 + 80004c20: 0f80346f jal x8,80007d18 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 80016046 .word 0x80016046 + 80004c30: 00000000 .word 0x00000000 + 80004c34: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000100000001 + 80004c38: 0000ba03 ld x20,0(x1) + 80004c3c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x8000000000000001 + 80004c40: 0000bb03 ld x22,0(x1) + 80004c44: 00808093 addi x1,x1,8 + +0000000080004c48 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + andn x27, x20, x22 # perform operation + 80004c48: 416a7db3 andn x27,x20,x22 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c4c: 0001b383 ld x7,0(x3) + 80004c50: 01b38c63 beq x7,x27,80004c68 + 80004c54: 0c40346f jal x8,80007d18 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 800160ae .word 0x800160ae + 80004c64: 00000000 .word 0x00000000 + 80004c68: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000100000001 + 80004c6c: 0000b503 ld x10,0(x1) + 80004c70: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x7fffffffffffffff + 80004c74: 0000b803 ld x16,0(x1) + 80004c78: 00808093 addi x1,x1,8 + +0000000080004c7c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + andn x31, x10, x16 # perform operation + 80004c7c: 41057fb3 andn x31,x10,x16 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c80: 0001b383 ld x7,0(x3) + 80004c84: 01f38c63 beq x7,x31,80004c9c + 80004c88: 0900346f jal x8,80007d18 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 80016116 .word 0x80016116 + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0000000100000001 + 80004ca0: 0000be03 ld x28,0(x1) + 80004ca4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80004ca8: 0000bb83 ld x23,0(x1) + 80004cac: 00808093 addi x1,x1,8 + +0000000080004cb0 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + andn x4, x28, x23 # perform operation + 80004cb0: 417e7233 andn x4,x28,x23 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb4: 0001b383 ld x7,0(x3) + 80004cb8: 00438c63 beq x7,x4,80004cd0 + 80004cbc: 05c0346f jal x8,80007d18 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 8001617e .word 0x8001617e + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000100000001 + 80004cd4: 0000b603 ld x12,0(x1) + 80004cd8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xffffffffffffffff + 80004cdc: 0000b683 ld x13,0(x1) + 80004ce0: 00808093 addi x1,x1,8 + +0000000080004ce4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + andn x20, x12, x13 # perform operation + 80004ce4: 40d67a33 andn x20,x12,x13 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce8: 0001b383 ld x7,0(x3) + 80004cec: 01438c63 beq x7,x20,80004d04 + 80004cf0: 0280346f jal x8,80007d18 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 800161e6 .word 0x800161e6 + 80004d00: 00000000 .word 0x00000000 + 80004d04: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000100000001 + 80004d08: 0000b283 ld x5,0(x1) + 80004d0c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xfffffffffffffffe + 80004d10: 0000b903 ld x18,0(x1) + 80004d14: 00808093 addi x1,x1,8 + +0000000080004d18 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + andn x15, x5, x18 # perform operation + 80004d18: 4122f7b3 andn x15,x5,x18 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d1c: 0001b383 ld x7,0(x3) + 80004d20: 00f38c63 beq x7,x15,80004d38 + 80004d24: 7f50246f jal x8,80007d18 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 8001624e .word 0x8001624e + 80004d34: 00000000 .word 0x00000000 + 80004d38: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x0000000100000001 + 80004d3c: 0000bb83 ld x23,0(x1) + 80004d40: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004d44: 0000b683 ld x13,0(x1) + 80004d48: 00808093 addi x1,x1,8 + +0000000080004d4c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + andn x4, x23, x13 # perform operation + 80004d4c: 40dbf233 andn x4,x23,x13 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d50: 0001b383 ld x7,0(x3) + 80004d54: 00438c63 beq x7,x4,80004d6c + 80004d58: 7c10246f jal x8,80007d18 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 800162b6 .word 0x800162b6 + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x0000000100000001 + 80004d70: 0000bb03 ld x22,0(x1) + 80004d74: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xaaaaaaaaaaaaaaaa + 80004d78: 0000b203 ld x4,0(x1) + 80004d7c: 00808093 addi x1,x1,8 + +0000000080004d80 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + andn x16, x22, x4 # perform operation + 80004d80: 404b7833 andn x16,x22,x4 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d84: 0001b383 ld x7,0(x3) + 80004d88: 01038c63 beq x7,x16,80004da0 + 80004d8c: 78d0246f jal x8,80007d18 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 8001631e .word 0x8001631e + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0000000100000001 + 80004da4: 0000b683 ld x13,0(x1) + 80004da8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x5555555555555555 + 80004dac: 0000b803 ld x16,0(x1) + 80004db0: 00808093 addi x1,x1,8 + +0000000080004db4 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + andn x14, x13, x16 # perform operation + 80004db4: 4106f733 andn x14,x13,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db8: 0001b383 ld x7,0(x3) + 80004dbc: 00e38c63 beq x7,x14,80004dd4 + 80004dc0: 7590246f jal x8,80007d18 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 80016386 .word 0x80016386 + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000100000001 + 80004dd8: 0000b883 ld x17,0(x1) + 80004ddc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs2: x5 = 0x00000000ffffffff + 80004de0: 0000b283 ld x5,0(x1) + 80004de4: 00808093 addi x1,x1,8 + +0000000080004de8 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + andn x14, x17, x5 # perform operation + 80004de8: 4058f733 andn x14,x17,x5 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dec: 0001b383 ld x7,0(x3) + 80004df0: 00e38c63 beq x7,x14,80004e08 + 80004df4: 7250246f jal x8,80007d18 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 800163ee .word 0x800163ee + 80004e04: 00000000 .word 0x00000000 + 80004e08: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000100000001 + 80004e0c: 0000b903 ld x18,0(x1) + 80004e10: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x00000000fffffffe + 80004e14: 0000b583 ld x11,0(x1) + 80004e18: 00808093 addi x1,x1,8 + +0000000080004e1c : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + andn x12, x18, x11 # perform operation + 80004e1c: 40b97633 andn x12,x18,x11 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e20: 0001b383 ld x7,0(x3) + 80004e24: 00c38c63 beq x7,x12,80004e3c + 80004e28: 6f10246f jal x8,80007d18 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 8001644e .word 0x8001644e + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000001 + 80004e40: 0000b983 ld x19,0(x1) + 80004e44: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000000 + 80004e48: 0000bf83 ld x31,0(x1) + 80004e4c: 00808093 addi x1,x1,8 + +0000000080004e50 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + andn x12, x19, x31 # perform operation + 80004e50: 41f9f633 andn x12,x19,x31 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e54: 0001b383 ld x7,0(x3) + 80004e58: 00c38c63 beq x7,x12,80004e70 + 80004e5c: 6bd0246f jal x8,80007d18 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 800164ae .word 0x800164ae + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000100000001 + 80004e74: 0000b603 ld x12,0(x1) + 80004e78: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000100000001 + 80004e7c: 0000b883 ld x17,0(x1) + 80004e80: 00808093 addi x1,x1,8 + +0000000080004e84 : +Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + andn x15, x12, x17 # perform operation + 80004e84: 411677b3 andn x15,x12,x17 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_andn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e88: 0001b383 ld x7,0(x3) + 80004e8c: 00f38c63 beq x7,x15,80004ea4 + 80004e90: 6890246f jal x8,80007d18 + 80004e94: 80004e84 .word 0x80004e84 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 8001650f .word 0x8001650f + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x351d1acec1394db0 + 80004ea8: 0000b003 ld x0,0(x1) + 80004eac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xaab07515112a0aa6 + 80004eb0: 0000b003 ld x0,0(x1) + 80004eb4: 00808093 addi x1,x1,8 + +0000000080004eb8 : +Zbkb_andn_cg_cmp_rs1_rs2_b0: + andn x20, x0, x0 # perform operation + 80004eb8: 40007a33 andn x20,x0,x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_andn_cg_cmp_rs1_rs2_b0, Zbkb_andn_cg_cmp_rs1_rs2_b0_str) + 80004ebc: 0001b383 ld x7,0(x3) + 80004ec0: 01438c63 beq x7,x20,80004ed8 + 80004ec4: 6550246f jal x8,80007d18 + 80004ec8: 80004eb8 .word 0x80004eb8 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 80016570 .word 0x80016570 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 00818193 addi x3,x3,8 + + mv x18, x1 # switch data pointer register to avoid conflict with test + 80004edc: 00008913 addi x18,x1,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0xc5145a6d4ca86297 + 80004ee0: 00093083 ld x1,0(x18) + 80004ee4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x758cc11678431ec6 + 80004ee8: 00093083 ld x1,0(x18) + 80004eec: 00890913 addi x18,x18,8 + +0000000080004ef0 : +Zbkb_andn_cg_cmp_rs1_rs2_b1: + andn x26, x1, x1 # perform operation + 80004ef0: 4010fd33 andn x26,x1,x1 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_andn_cg_cmp_rs1_rs2_b1, Zbkb_andn_cg_cmp_rs1_rs2_b1_str) + 80004ef4: 0001b383 ld x7,0(x3) + 80004ef8: 01a38c63 beq x7,x26,80004f10 + 80004efc: 61d0246f jal x8,80007d18 + 80004f00: 80004ef0 .word 0x80004ef0 + 80004f04: 00000000 .word 0x00000000 + 80004f08: 800165a8 .word 0x800165a8 + 80004f0c: 00000000 .word 0x00000000 + 80004f10: 00818193 addi x3,x3,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xce0d278fbb95030c + 80004f14: 00093103 ld x2,0(x18) + 80004f18: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0xdedb8d36e6a95c41 + 80004f1c: 00093103 ld x2,0(x18) + 80004f20: 00890913 addi x18,x18,8 + +0000000080004f24 : +Zbkb_andn_cg_cmp_rs1_rs2_b2: + andn x29, x2, x2 # perform operation + 80004f24: 40217eb3 andn x29,x2,x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_andn_cg_cmp_rs1_rs2_b2, Zbkb_andn_cg_cmp_rs1_rs2_b2_str) + 80004f28: 0001b383 ld x7,0(x3) + 80004f2c: 01d38c63 beq x7,x29,80004f44 + 80004f30: 5e90246f jal x8,80007d18 + 80004f34: 80004f24 .word 0x80004f24 + 80004f38: 00000000 .word 0x00000000 + 80004f3c: 800165e0 .word 0x800165e0 + 80004f40: 00000000 .word 0x00000000 + 80004f44: 00818193 addi x3,x3,8 + + mv x16, x3 # switch signature pointer register to avoid conflict with test + 80004f48: 00018813 addi x16,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x4c276882620097b1 + 80004f4c: 00093183 ld x3,0(x18) + 80004f50: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x141008d0cce766cb + 80004f54: 00093183 ld x3,0(x18) + 80004f58: 00890913 addi x18,x18,8 + +0000000080004f5c : +Zbkb_andn_cg_cmp_rs1_rs2_b3: + andn x22, x3, x3 # perform operation + 80004f5c: 4031fb33 andn x22,x3,x3 + # Check if x22 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x22, Zbkb_andn_cg_cmp_rs1_rs2_b3, Zbkb_andn_cg_cmp_rs1_rs2_b3_str) + 80004f60: 00083383 ld x7,0(x16) + 80004f64: 01638c63 beq x7,x22,80004f7c + 80004f68: 5b10246f jal x8,80007d18 + 80004f6c: 80004f5c .word 0x80004f5c + 80004f70: 00000000 .word 0x00000000 + 80004f74: 80016618 .word 0x80016618 + 80004f78: 00000000 .word 0x00000000 + 80004f7c: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xa316e74c94406c90 + 80004f80: 00093203 ld x4,0(x18) + 80004f84: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0xe3aac4b51bd36066 + 80004f88: 00093203 ld x4,0(x18) + 80004f8c: 00890913 addi x18,x18,8 + +0000000080004f90 : +Zbkb_andn_cg_cmp_rs1_rs2_b4: + andn x9, x4, x4 # perform operation + 80004f90: 404274b3 andn x9,x4,x4 + # Check if x9 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x9, Zbkb_andn_cg_cmp_rs1_rs2_b4, Zbkb_andn_cg_cmp_rs1_rs2_b4_str) + 80004f94: 00083383 ld x7,0(x16) + 80004f98: 00938c63 beq x7,x9,80004fb0 + 80004f9c: 57d0246f jal x8,80007d18 + 80004fa0: 80004f90 .word 0x80004f90 + 80004fa4: 00000000 .word 0x00000000 + 80004fa8: 80016650 .word 0x80016650 + 80004fac: 00000000 .word 0x00000000 + 80004fb0: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xb96489515eca5996 + 80004fb4: 00093283 ld x5,0(x18) + 80004fb8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0xaa1646c793329844 + 80004fbc: 00093283 ld x5,0(x18) + 80004fc0: 00890913 addi x18,x18,8 + +0000000080004fc4 : +Zbkb_andn_cg_cmp_rs1_rs2_b5: + andn x24, x5, x5 # perform operation + 80004fc4: 4052fc33 andn x24,x5,x5 + # Check if x24 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x24, Zbkb_andn_cg_cmp_rs1_rs2_b5, Zbkb_andn_cg_cmp_rs1_rs2_b5_str) + 80004fc8: 00083383 ld x7,0(x16) + 80004fcc: 01838c63 beq x7,x24,80004fe4 + 80004fd0: 5490246f jal x8,80007d18 + 80004fd4: 80004fc4 .word 0x80004fc4 + 80004fd8: 00000000 .word 0x00000000 + 80004fdc: 80016688 .word 0x80016688 + 80004fe0: 00000000 .word 0x00000000 + 80004fe4: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xf4dcc8668a8c14c9 + 80004fe8: 00093303 ld x6,0(x18) + 80004fec: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0xeede939237391629 + 80004ff0: 00093303 ld x6,0(x18) + 80004ff4: 00890913 addi x18,x18,8 + +0000000080004ff8 : +Zbkb_andn_cg_cmp_rs1_rs2_b6: + andn x23, x6, x6 # perform operation + 80004ff8: 40637bb3 andn x23,x6,x6 + # Check if x23 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x23, Zbkb_andn_cg_cmp_rs1_rs2_b6, Zbkb_andn_cg_cmp_rs1_rs2_b6_str) + 80004ffc: 00083383 ld x7,0(x16) + 80005000: 01738c63 beq x7,x23,80005018 + 80005004: 5150246f jal x8,80007d18 + 80005008: 80004ff8 .word 0x80004ff8 + 8000500c: 00000000 .word 0x00000000 + 80005010: 800166c0 .word 0x800166c0 + 80005014: 00000000 .word 0x00000000 + 80005018: 00880813 addi x16,x16,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000501c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005020: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x0373952da413303b + 80005024: 00093383 ld x7,0(x18) + 80005028: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xfe59b847bf877d72 + 8000502c: 00093383 ld x7,0(x18) + 80005030: 00890913 addi x18,x18,8 + +0000000080005034 : +Zbkb_andn_cg_cmp_rs1_rs2_b7: + andn x30, x7, x7 # perform operation + 80005034: 4073ff33 andn x30,x7,x7 + # Check if x30 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x30, Zbkb_andn_cg_cmp_rs1_rs2_b7, Zbkb_andn_cg_cmp_rs1_rs2_b7_str) + 80005038: 00083683 ld x13,0(x16) + 8000503c: 01e68c63 beq x13,x30,80005054 + 80005040: 5010276f jal x14,80007d40 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 800166f8 .word 0x800166f8 + 80005050: 00000000 .word 0x00000000 + 80005054: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xfc842cf00090cbf1 + 80005058: 00093403 ld x8,0(x18) + 8000505c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x75cb607d8d5a911b + 80005060: 00093403 ld x8,0(x18) + 80005064: 00890913 addi x18,x18,8 + +0000000080005068 : +Zbkb_andn_cg_cmp_rs1_rs2_b8: + andn x11, x8, x8 # perform operation + 80005068: 408475b3 andn x11,x8,x8 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zbkb_andn_cg_cmp_rs1_rs2_b8, Zbkb_andn_cg_cmp_rs1_rs2_b8_str) + 8000506c: 00083683 ld x13,0(x16) + 80005070: 00b68c63 beq x13,x11,80005088 + 80005074: 4cd0276f jal x14,80007d40 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 80016730 .word 0x80016730 + 80005084: 00000000 .word 0x00000000 + 80005088: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x1d210f9d9029e1d4 + 8000508c: 00093483 ld x9,0(x18) + 80005090: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xfa74ccf133e0d962 + 80005094: 00093483 ld x9,0(x18) + 80005098: 00890913 addi x18,x18,8 + +000000008000509c : +Zbkb_andn_cg_cmp_rs1_rs2_b9: + andn x20, x9, x9 # perform operation + 8000509c: 4094fa33 andn x20,x9,x9 + # Check if x20 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x20, Zbkb_andn_cg_cmp_rs1_rs2_b9, Zbkb_andn_cg_cmp_rs1_rs2_b9_str) + 800050a0: 00083683 ld x13,0(x16) + 800050a4: 01468c63 beq x13,x20,800050bc + 800050a8: 4990276f jal x14,80007d40 + 800050ac: 8000509c .word 0x8000509c + 800050b0: 00000000 .word 0x00000000 + 800050b4: 80016768 .word 0x80016768 + 800050b8: 00000000 .word 0x00000000 + 800050bc: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xb8257e9a27f59ea5 + 800050c0: 00093503 ld x10,0(x18) + 800050c4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x72406d50ba059217 + 800050c8: 00093503 ld x10,0(x18) + 800050cc: 00890913 addi x18,x18,8 + +00000000800050d0 : +Zbkb_andn_cg_cmp_rs1_rs2_b10: + andn x3, x10, x10 # perform operation + 800050d0: 40a571b3 andn x3,x10,x10 + # Check if x3 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x3, Zbkb_andn_cg_cmp_rs1_rs2_b10, Zbkb_andn_cg_cmp_rs1_rs2_b10_str) + 800050d4: 00083683 ld x13,0(x16) + 800050d8: 00368c63 beq x13,x3,800050f0 + 800050dc: 4650276f jal x14,80007d40 + 800050e0: 800050d0 .word 0x800050d0 + 800050e4: 00000000 .word 0x00000000 + 800050e8: 800167a0 .word 0x800167a0 + 800050ec: 00000000 .word 0x00000000 + 800050f0: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x9f3c6df36cac760b + 800050f4: 00093583 ld x11,0(x18) + 800050f8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xd997582d3ffd672f + 800050fc: 00093583 ld x11,0(x18) + 80005100: 00890913 addi x18,x18,8 + +0000000080005104 : +Zbkb_andn_cg_cmp_rs1_rs2_b11: + andn x19, x11, x11 # perform operation + 80005104: 40b5f9b3 andn x19,x11,x11 + # Check if x19 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x19, Zbkb_andn_cg_cmp_rs1_rs2_b11, Zbkb_andn_cg_cmp_rs1_rs2_b11_str) + 80005108: 00083683 ld x13,0(x16) + 8000510c: 01368c63 beq x13,x19,80005124 + 80005110: 4310276f jal x14,80007d40 + 80005114: 80005104 .word 0x80005104 + 80005118: 00000000 .word 0x00000000 + 8000511c: 800167d9 .word 0x800167d9 + 80005120: 00000000 .word 0x00000000 + 80005124: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x234968aa8a8aca39 + 80005128: 00093603 ld x12,0(x18) + 8000512c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x19960e6ea709e886 + 80005130: 00093603 ld x12,0(x18) + 80005134: 00890913 addi x18,x18,8 + +0000000080005138 : +Zbkb_andn_cg_cmp_rs1_rs2_b12: + andn x8, x12, x12 # perform operation + 80005138: 40c67433 andn x8,x12,x12 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zbkb_andn_cg_cmp_rs1_rs2_b12, Zbkb_andn_cg_cmp_rs1_rs2_b12_str) + 8000513c: 00083683 ld x13,0(x16) + 80005140: 00868c63 beq x13,x8,80005158 + 80005144: 3fd0276f jal x14,80007d40 + 80005148: 80005138 .word 0x80005138 + 8000514c: 00000000 .word 0x00000000 + 80005150: 80016812 .word 0x80016812 + 80005154: 00000000 .word 0x00000000 + 80005158: 00880813 addi x16,x16,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000515c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005160: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x648bfe943e8a93ce + 80005164: 00093683 ld x13,0(x18) + 80005168: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x88b5d307175f308f + 8000516c: 00093683 ld x13,0(x18) + 80005170: 00890913 addi x18,x18,8 + +0000000080005174 : +Zbkb_andn_cg_cmp_rs1_rs2_b13: + andn x11, x13, x13 # perform operation + 80005174: 40d6f5b3 andn x11,x13,x13 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_andn_cg_cmp_rs1_rs2_b13, Zbkb_andn_cg_cmp_rs1_rs2_b13_str) + 80005178: 00083203 ld x4,0(x16) + 8000517c: 00b20c63 beq x4,x11,80005194 + 80005180: 381022ef jal x5,80007d00 + 80005184: 80005174 .word 0x80005174 + 80005188: 00000000 .word 0x00000000 + 8000518c: 8001684b .word 0x8001684b + 80005190: 00000000 .word 0x00000000 + 80005194: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xe22f35f5099d77bb + 80005198: 00093703 ld x14,0(x18) + 8000519c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x8905b5ad7e3fa3d5 + 800051a0: 00093703 ld x14,0(x18) + 800051a4: 00890913 addi x18,x18,8 + +00000000800051a8 : +Zbkb_andn_cg_cmp_rs1_rs2_b14: + andn x20, x14, x14 # perform operation + 800051a8: 40e77a33 andn x20,x14,x14 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zbkb_andn_cg_cmp_rs1_rs2_b14, Zbkb_andn_cg_cmp_rs1_rs2_b14_str) + 800051ac: 00083203 ld x4,0(x16) + 800051b0: 01420c63 beq x4,x20,800051c8 + 800051b4: 34d022ef jal x5,80007d00 + 800051b8: 800051a8 .word 0x800051a8 + 800051bc: 00000000 .word 0x00000000 + 800051c0: 80016884 .word 0x80016884 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xea0d91d8cc0e13ad + 800051cc: 00093783 ld x15,0(x18) + 800051d0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xad31ab38e73c9ad4 + 800051d4: 00093783 ld x15,0(x18) + 800051d8: 00890913 addi x18,x18,8 + +00000000800051dc : +Zbkb_andn_cg_cmp_rs1_rs2_b15: + andn x2, x15, x15 # perform operation + 800051dc: 40f7f133 andn x2,x15,x15 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zbkb_andn_cg_cmp_rs1_rs2_b15, Zbkb_andn_cg_cmp_rs1_rs2_b15_str) + 800051e0: 00083203 ld x4,0(x16) + 800051e4: 00220c63 beq x4,x2,800051fc + 800051e8: 319022ef jal x5,80007d00 + 800051ec: 800051dc .word 0x800051dc + 800051f0: 00000000 .word 0x00000000 + 800051f4: 800168bd .word 0x800168bd + 800051f8: 00000000 .word 0x00000000 + 800051fc: 00880813 addi x16,x16,8 + + mv x10, x16 # switch signature pointer register to avoid conflict with test + 80005200: 00080513 addi x10,x16,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x6a25832e473d72bf + 80005204: 00093803 ld x16,0(x18) + 80005208: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x9dcc5512a28851dc + 8000520c: 00093803 ld x16,0(x18) + 80005210: 00890913 addi x18,x18,8 + +0000000080005214 : +Zbkb_andn_cg_cmp_rs1_rs2_b16: + andn x6, x16, x16 # perform operation + 80005214: 41087333 andn x6,x16,x16 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zbkb_andn_cg_cmp_rs1_rs2_b16, Zbkb_andn_cg_cmp_rs1_rs2_b16_str) + 80005218: 00053203 ld x4,0(x10) + 8000521c: 00620c63 beq x4,x6,80005234 + 80005220: 2e1022ef jal x5,80007d00 + 80005224: 80005214 .word 0x80005214 + 80005228: 00000000 .word 0x00000000 + 8000522c: 800168f6 .word 0x800168f6 + 80005230: 00000000 .word 0x00000000 + 80005234: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xb7b16cc3b807643e + 80005238: 00093883 ld x17,0(x18) + 8000523c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x9aebbe18cc630a34 + 80005240: 00093883 ld x17,0(x18) + 80005244: 00890913 addi x18,x18,8 + +0000000080005248 : +Zbkb_andn_cg_cmp_rs1_rs2_b17: + andn x14, x17, x17 # perform operation + 80005248: 4118f733 andn x14,x17,x17 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkb_andn_cg_cmp_rs1_rs2_b17, Zbkb_andn_cg_cmp_rs1_rs2_b17_str) + 8000524c: 00053203 ld x4,0(x10) + 80005250: 00e20c63 beq x4,x14,80005268 + 80005254: 2ad022ef jal x5,80007d00 + 80005258: 80005248 .word 0x80005248 + 8000525c: 00000000 .word 0x00000000 + 80005260: 8001692f .word 0x8001692f + 80005264: 00000000 .word 0x00000000 + 80005268: 00850513 addi x10,x10,8 + + mv x6, x18 # switch data pointer register to avoid conflict with test + 8000526c: 00090313 addi x6,x18,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xd0e9d7dab4f1f7a9 + 80005270: 00033903 ld x18,0(x6) + 80005274: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x67148a813d3dd738 + 80005278: 00033903 ld x18,0(x6) + 8000527c: 00830313 addi x6,x6,8 + +0000000080005280 : +Zbkb_andn_cg_cmp_rs1_rs2_b18: + andn x11, x18, x18 # perform operation + 80005280: 412975b3 andn x11,x18,x18 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkb_andn_cg_cmp_rs1_rs2_b18, Zbkb_andn_cg_cmp_rs1_rs2_b18_str) + 80005284: 00053203 ld x4,0(x10) + 80005288: 00b20c63 beq x4,x11,800052a0 + 8000528c: 275022ef jal x5,80007d00 + 80005290: 80005280 .word 0x80005280 + 80005294: 00000000 .word 0x00000000 + 80005298: 80016968 .word 0x80016968 + 8000529c: 00000000 .word 0x00000000 + 800052a0: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x7c5b8198a86043de + 800052a4: 00033983 ld x19,0(x6) + 800052a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x9b78e451acdce869 + 800052ac: 00033983 ld x19,0(x6) + 800052b0: 00830313 addi x6,x6,8 + +00000000800052b4 : +Zbkb_andn_cg_cmp_rs1_rs2_b19: + andn x18, x19, x19 # perform operation + 800052b4: 4139f933 andn x18,x19,x19 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zbkb_andn_cg_cmp_rs1_rs2_b19, Zbkb_andn_cg_cmp_rs1_rs2_b19_str) + 800052b8: 00053203 ld x4,0(x10) + 800052bc: 01220c63 beq x4,x18,800052d4 + 800052c0: 241022ef jal x5,80007d00 + 800052c4: 800052b4 .word 0x800052b4 + 800052c8: 00000000 .word 0x00000000 + 800052cc: 800169a1 .word 0x800169a1 + 800052d0: 00000000 .word 0x00000000 + 800052d4: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0f6aed53035f0b90 + 800052d8: 00033a03 ld x20,0(x6) + 800052dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xdcd35023d3812914 + 800052e0: 00033a03 ld x20,0(x6) + 800052e4: 00830313 addi x6,x6,8 + +00000000800052e8 : +Zbkb_andn_cg_cmp_rs1_rs2_b20: + andn x27, x20, x20 # perform operation + 800052e8: 414a7db3 andn x27,x20,x20 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkb_andn_cg_cmp_rs1_rs2_b20, Zbkb_andn_cg_cmp_rs1_rs2_b20_str) + 800052ec: 00053203 ld x4,0(x10) + 800052f0: 01b20c63 beq x4,x27,80005308 + 800052f4: 20d022ef jal x5,80007d00 + 800052f8: 800052e8 .word 0x800052e8 + 800052fc: 00000000 .word 0x00000000 + 80005300: 800169da .word 0x800169da + 80005304: 00000000 .word 0x00000000 + 80005308: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xccfc2ceda77f6cfd + 8000530c: 00033a83 ld x21,0(x6) + 80005310: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xb2814ae4f91c8586 + 80005314: 00033a83 ld x21,0(x6) + 80005318: 00830313 addi x6,x6,8 + +000000008000531c : +Zbkb_andn_cg_cmp_rs1_rs2_b21: + andn x29, x21, x21 # perform operation + 8000531c: 415afeb3 andn x29,x21,x21 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkb_andn_cg_cmp_rs1_rs2_b21, Zbkb_andn_cg_cmp_rs1_rs2_b21_str) + 80005320: 00053203 ld x4,0(x10) + 80005324: 01d20c63 beq x4,x29,8000533c + 80005328: 1d9022ef jal x5,80007d00 + 8000532c: 8000531c .word 0x8000531c + 80005330: 00000000 .word 0x00000000 + 80005334: 80016a13 .word 0x80016a13 + 80005338: 00000000 .word 0x00000000 + 8000533c: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xf2fcc720a667fe46 + 80005340: 00033b03 ld x22,0(x6) + 80005344: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x9575f2804ad082d9 + 80005348: 00033b03 ld x22,0(x6) + 8000534c: 00830313 addi x6,x6,8 + +0000000080005350 : +Zbkb_andn_cg_cmp_rs1_rs2_b22: + andn x11, x22, x22 # perform operation + 80005350: 416b75b3 andn x11,x22,x22 + # Check if x11 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x11, Zbkb_andn_cg_cmp_rs1_rs2_b22, Zbkb_andn_cg_cmp_rs1_rs2_b22_str) + 80005354: 00053203 ld x4,0(x10) + 80005358: 00b20c63 beq x4,x11,80005370 + 8000535c: 1a5022ef jal x5,80007d00 + 80005360: 80005350 .word 0x80005350 + 80005364: 00000000 .word 0x00000000 + 80005368: 80016a4c .word 0x80016a4c + 8000536c: 00000000 .word 0x00000000 + 80005370: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x62af22a68354cbf1 + 80005374: 00033b83 ld x23,0(x6) + 80005378: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xdf80e9922a7eda2c + 8000537c: 00033b83 ld x23,0(x6) + 80005380: 00830313 addi x6,x6,8 + +0000000080005384 : +Zbkb_andn_cg_cmp_rs1_rs2_b23: + andn x29, x23, x23 # perform operation + 80005384: 417bfeb3 andn x29,x23,x23 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkb_andn_cg_cmp_rs1_rs2_b23, Zbkb_andn_cg_cmp_rs1_rs2_b23_str) + 80005388: 00053203 ld x4,0(x10) + 8000538c: 01d20c63 beq x4,x29,800053a4 + 80005390: 171022ef jal x5,80007d00 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 80016a85 .word 0x80016a85 + 800053a0: 00000000 .word 0x00000000 + 800053a4: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xf003897aabde1d82 + 800053a8: 00033c03 ld x24,0(x6) + 800053ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xa6f05c98438e24f2 + 800053b0: 00033c03 ld x24,0(x6) + 800053b4: 00830313 addi x6,x6,8 + +00000000800053b8 : +Zbkb_andn_cg_cmp_rs1_rs2_b24: + andn x2, x24, x24 # perform operation + 800053b8: 418c7133 andn x2,x24,x24 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkb_andn_cg_cmp_rs1_rs2_b24, Zbkb_andn_cg_cmp_rs1_rs2_b24_str) + 800053bc: 00053203 ld x4,0(x10) + 800053c0: 00220c63 beq x4,x2,800053d8 + 800053c4: 13d022ef jal x5,80007d00 + 800053c8: 800053b8 .word 0x800053b8 + 800053cc: 00000000 .word 0x00000000 + 800053d0: 80016abe .word 0x80016abe + 800053d4: 00000000 .word 0x00000000 + 800053d8: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x73f3a9a3a7acab77 + 800053dc: 00033c83 ld x25,0(x6) + 800053e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x603713d928d87123 + 800053e4: 00033c83 ld x25,0(x6) + 800053e8: 00830313 addi x6,x6,8 + +00000000800053ec : +Zbkb_andn_cg_cmp_rs1_rs2_b25: + andn x14, x25, x25 # perform operation + 800053ec: 419cf733 andn x14,x25,x25 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zbkb_andn_cg_cmp_rs1_rs2_b25, Zbkb_andn_cg_cmp_rs1_rs2_b25_str) + 800053f0: 00053203 ld x4,0(x10) + 800053f4: 00e20c63 beq x4,x14,8000540c + 800053f8: 109022ef jal x5,80007d00 + 800053fc: 800053ec .word 0x800053ec + 80005400: 00000000 .word 0x00000000 + 80005404: 80016af7 .word 0x80016af7 + 80005408: 00000000 .word 0x00000000 + 8000540c: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x82699957630a141e + 80005410: 00033d03 ld x26,0(x6) + 80005414: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x591e63d18c7e4aed + 80005418: 00033d03 ld x26,0(x6) + 8000541c: 00830313 addi x6,x6,8 + +0000000080005420 : +Zbkb_andn_cg_cmp_rs1_rs2_b26: + andn x24, x26, x26 # perform operation + 80005420: 41ad7c33 andn x24,x26,x26 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkb_andn_cg_cmp_rs1_rs2_b26, Zbkb_andn_cg_cmp_rs1_rs2_b26_str) + 80005424: 00053203 ld x4,0(x10) + 80005428: 01820c63 beq x4,x24,80005440 + 8000542c: 0d5022ef jal x5,80007d00 + 80005430: 80005420 .word 0x80005420 + 80005434: 00000000 .word 0x00000000 + 80005438: 80016b30 .word 0x80016b30 + 8000543c: 00000000 .word 0x00000000 + 80005440: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xfb70b23f0042c9cb + 80005444: 00033d83 ld x27,0(x6) + 80005448: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x8a50dea2367ef7de + 8000544c: 00033d83 ld x27,0(x6) + 80005450: 00830313 addi x6,x6,8 + +0000000080005454 : +Zbkb_andn_cg_cmp_rs1_rs2_b27: + andn x15, x27, x27 # perform operation + 80005454: 41bdf7b3 andn x15,x27,x27 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zbkb_andn_cg_cmp_rs1_rs2_b27, Zbkb_andn_cg_cmp_rs1_rs2_b27_str) + 80005458: 00053203 ld x4,0(x10) + 8000545c: 00f20c63 beq x4,x15,80005474 + 80005460: 0a1022ef jal x5,80007d00 + 80005464: 80005454 .word 0x80005454 + 80005468: 00000000 .word 0x00000000 + 8000546c: 80016b69 .word 0x80016b69 + 80005470: 00000000 .word 0x00000000 + 80005474: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x5b7c1b716c02b535 + 80005478: 00033e03 ld x28,0(x6) + 8000547c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x52da793cd170f5f2 + 80005480: 00033e03 ld x28,0(x6) + 80005484: 00830313 addi x6,x6,8 + +0000000080005488 : +Zbkb_andn_cg_cmp_rs1_rs2_b28: + andn x31, x28, x28 # perform operation + 80005488: 41ce7fb3 andn x31,x28,x28 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkb_andn_cg_cmp_rs1_rs2_b28, Zbkb_andn_cg_cmp_rs1_rs2_b28_str) + 8000548c: 00053203 ld x4,0(x10) + 80005490: 01f20c63 beq x4,x31,800054a8 + 80005494: 06d022ef jal x5,80007d00 + 80005498: 80005488 .word 0x80005488 + 8000549c: 00000000 .word 0x00000000 + 800054a0: 80016ba2 .word 0x80016ba2 + 800054a4: 00000000 .word 0x00000000 + 800054a8: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x83edd382a7748c0f + 800054ac: 00033e83 ld x29,0(x6) + 800054b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xfdc6dddccc64dceb + 800054b4: 00033e83 ld x29,0(x6) + 800054b8: 00830313 addi x6,x6,8 + +00000000800054bc : +Zbkb_andn_cg_cmp_rs1_rs2_b29: + andn x8, x29, x29 # perform operation + 800054bc: 41def433 andn x8,x29,x29 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkb_andn_cg_cmp_rs1_rs2_b29, Zbkb_andn_cg_cmp_rs1_rs2_b29_str) + 800054c0: 00053203 ld x4,0(x10) + 800054c4: 00820c63 beq x4,x8,800054dc + 800054c8: 039022ef jal x5,80007d00 + 800054cc: 800054bc .word 0x800054bc + 800054d0: 00000000 .word 0x00000000 + 800054d4: 80016bdb .word 0x80016bdb + 800054d8: 00000000 .word 0x00000000 + 800054dc: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x76b9025b0d316230 + 800054e0: 00033f03 ld x30,0(x6) + 800054e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x646964694fb1a477 + 800054e8: 00033f03 ld x30,0(x6) + 800054ec: 00830313 addi x6,x6,8 + +00000000800054f0 : +Zbkb_andn_cg_cmp_rs1_rs2_b30: + andn x7, x30, x30 # perform operation + 800054f0: 41ef73b3 andn x7,x30,x30 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkb_andn_cg_cmp_rs1_rs2_b30, Zbkb_andn_cg_cmp_rs1_rs2_b30_str) + 800054f4: 00053203 ld x4,0(x10) + 800054f8: 00720c63 beq x4,x7,80005510 + 800054fc: 005022ef jal x5,80007d00 + 80005500: 800054f0 .word 0x800054f0 + 80005504: 00000000 .word 0x00000000 + 80005508: 80016c14 .word 0x80016c14 + 8000550c: 00000000 .word 0x00000000 + 80005510: 00850513 addi x10,x10,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x1a08f088f8f4546d + 80005514: 00033f83 ld x31,0(x6) + 80005518: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x689c606a10bbd0bd + 8000551c: 00033f83 ld x31,0(x6) + 80005520: 00830313 addi x6,x6,8 + +0000000080005524 : +Zbkb_andn_cg_cmp_rs1_rs2_b31: + andn x12, x31, x31 # perform operation + 80005524: 41fff633 andn x12,x31,x31 + # Check if x12 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x12, Zbkb_andn_cg_cmp_rs1_rs2_b31, Zbkb_andn_cg_cmp_rs1_rs2_b31_str) + 80005528: 00053203 ld x4,0(x10) + 8000552c: 00c20c63 beq x4,x12,80005544 + 80005530: 7d0022ef jal x5,80007d00 + 80005534: 80005524 .word 0x80005524 + 80005538: 00000000 .word 0x00000000 + 8000553c: 80016c4d .word 0x80016c4d + 80005540: 00000000 .word 0x00000000 + 80005544: 00850513 addi x10,x10,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x2f7b190e37f80246 + 80005548: 00033003 ld x0,0(x6) + 8000554c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x2b4bece9de5a1525 + 80005550: 00033583 ld x11,0(x6) + 80005554: 00830313 addi x6,x6,8 + +0000000080005558 : +Zbkb_andn_cg_cmp_rd_rs1_b0: + andn x0, x0, x11 # perform operation + 80005558: 40b07033 andn x0,x0,x11 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zbkb_andn_cg_cmp_rd_rs1_b0, Zbkb_andn_cg_cmp_rd_rs1_b0_str) + 8000555c: 00053203 ld x4,0(x10) + 80005560: 00020c63 beq x4,x0,80005578 + 80005564: 79c022ef jal x5,80007d00 + 80005568: 80005558 .word 0x80005558 + 8000556c: 00000000 .word 0x00000000 + 80005570: 80016c86 .word 0x80016c86 + 80005574: 00000000 .word 0x00000000 + 80005578: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xb044bd3195265547 + 8000557c: 00033083 ld x1,0(x6) + 80005580: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x4e7129524c522ae9 + 80005584: 00033683 ld x13,0(x6) + 80005588: 00830313 addi x6,x6,8 + +000000008000558c : +Zbkb_andn_cg_cmp_rd_rs1_b1: + andn x1, x1, x13 # perform operation + 8000558c: 40d0f0b3 andn x1,x1,x13 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkb_andn_cg_cmp_rd_rs1_b1, Zbkb_andn_cg_cmp_rd_rs1_b1_str) + 80005590: 00053203 ld x4,0(x10) + 80005594: 00120c63 beq x4,x1,800055ac + 80005598: 768022ef jal x5,80007d00 + 8000559c: 8000558c .word 0x8000558c + 800055a0: 00000000 .word 0x00000000 + 800055a4: 80016cbd .word 0x80016cbd + 800055a8: 00000000 .word 0x00000000 + 800055ac: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x10b45dcbfdb48f05 + 800055b0: 00033103 ld x2,0(x6) + 800055b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x56fe05d452ecb75b + 800055b8: 00033003 ld x0,0(x6) + 800055bc: 00830313 addi x6,x6,8 + +00000000800055c0 : +Zbkb_andn_cg_cmp_rd_rs1_b2: + andn x2, x2, x0 # perform operation + 800055c0: 40017133 andn x2,x2,x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkb_andn_cg_cmp_rd_rs1_b2, Zbkb_andn_cg_cmp_rd_rs1_b2_str) + 800055c4: 00053203 ld x4,0(x10) + 800055c8: 00220c63 beq x4,x2,800055e0 + 800055cc: 734022ef jal x5,80007d00 + 800055d0: 800055c0 .word 0x800055c0 + 800055d4: 00000000 .word 0x00000000 + 800055d8: 80016cf4 .word 0x80016cf4 + 800055dc: 00000000 .word 0x00000000 + 800055e0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x74ecaa569e17a0d4 + 800055e4: 00033183 ld x3,0(x6) + 800055e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xdfd239c6bd958257 + 800055ec: 00033c83 ld x25,0(x6) + 800055f0: 00830313 addi x6,x6,8 + +00000000800055f4 : +Zbkb_andn_cg_cmp_rd_rs1_b3: + andn x3, x3, x25 # perform operation + 800055f4: 4191f1b3 andn x3,x3,x25 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkb_andn_cg_cmp_rd_rs1_b3, Zbkb_andn_cg_cmp_rd_rs1_b3_str) + 800055f8: 00053203 ld x4,0(x10) + 800055fc: 00320c63 beq x4,x3,80005614 + 80005600: 700022ef jal x5,80007d00 + 80005604: 800055f4 .word 0x800055f4 + 80005608: 00000000 .word 0x00000000 + 8000560c: 80016d2b .word 0x80016d2b + 80005610: 00000000 .word 0x00000000 + 80005614: 00850513 addi x10,x10,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005618: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000561c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xa30e9e79b4d60859 + 80005620: 00033203 ld x4,0(x6) + 80005624: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xb2f40ffb84c454a2 + 80005628: 00033983 ld x19,0(x6) + 8000562c: 00830313 addi x6,x6,8 + +0000000080005630 : +Zbkb_andn_cg_cmp_rd_rs1_b4: + andn x4, x4, x19 # perform operation + 80005630: 41327233 andn x4,x4,x19 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_andn_cg_cmp_rd_rs1_b4, Zbkb_andn_cg_cmp_rd_rs1_b4_str) + 80005634: 00053383 ld x7,0(x10) + 80005638: 00438c63 beq x7,x4,80005650 + 8000563c: 6dc0246f jal x8,80007d18 + 80005640: 80005630 .word 0x80005630 + 80005644: 00000000 .word 0x00000000 + 80005648: 80016d62 .word 0x80016d62 + 8000564c: 00000000 .word 0x00000000 + 80005650: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x14c12b85cb4e6cd7 + 80005654: 00033283 ld x5,0(x6) + 80005658: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xf9fed4a2f18d228f + 8000565c: 00033f03 ld x30,0(x6) + 80005660: 00830313 addi x6,x6,8 + +0000000080005664 : +Zbkb_andn_cg_cmp_rd_rs1_b5: + andn x5, x5, x30 # perform operation + 80005664: 41e2f2b3 andn x5,x5,x30 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_andn_cg_cmp_rd_rs1_b5, Zbkb_andn_cg_cmp_rd_rs1_b5_str) + 80005668: 00053383 ld x7,0(x10) + 8000566c: 00538c63 beq x7,x5,80005684 + 80005670: 6a80246f jal x8,80007d18 + 80005674: 80005664 .word 0x80005664 + 80005678: 00000000 .word 0x00000000 + 8000567c: 80016d99 .word 0x80016d99 + 80005680: 00000000 .word 0x00000000 + 80005684: 00850513 addi x10,x10,8 + + mv x16, x6 # switch data pointer register to avoid conflict with test + 80005688: 00030813 addi x16,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xa4f0b1d002572817 + 8000568c: 00083303 ld x6,0(x16) + 80005690: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x6f7397e640c07a4e + 80005694: 00083483 ld x9,0(x16) + 80005698: 00880813 addi x16,x16,8 + +000000008000569c : +Zbkb_andn_cg_cmp_rd_rs1_b6: + andn x6, x6, x9 # perform operation + 8000569c: 40937333 andn x6,x6,x9 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_andn_cg_cmp_rd_rs1_b6, Zbkb_andn_cg_cmp_rd_rs1_b6_str) + 800056a0: 00053383 ld x7,0(x10) + 800056a4: 00638c63 beq x7,x6,800056bc + 800056a8: 6700246f jal x8,80007d18 + 800056ac: 8000569c .word 0x8000569c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 80016dd0 .word 0x80016dd0 + 800056b8: 00000000 .word 0x00000000 + 800056bc: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056c0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056c4: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x8fa42bbe56218018 + 800056c8: 00083383 ld x7,0(x16) + 800056cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x69a346ac7c182bec + 800056d0: 00083183 ld x3,0(x16) + 800056d4: 00880813 addi x16,x16,8 + +00000000800056d8 : +Zbkb_andn_cg_cmp_rd_rs1_b7: + andn x7, x7, x3 # perform operation + 800056d8: 4033f3b3 andn x7,x7,x3 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_andn_cg_cmp_rd_rs1_b7, Zbkb_andn_cg_cmp_rd_rs1_b7_str) + 800056dc: 00053683 ld x13,0(x10) + 800056e0: 00768c63 beq x13,x7,800056f8 + 800056e4: 65c0276f jal x14,80007d40 + 800056e8: 800056d8 .word 0x800056d8 + 800056ec: 00000000 .word 0x00000000 + 800056f0: 80016e07 .word 0x80016e07 + 800056f4: 00000000 .word 0x00000000 + 800056f8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xd76a2e9205f1f324 + 800056fc: 00083403 ld x8,0(x16) + 80005700: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x041966527ab4b28c + 80005704: 00083a03 ld x20,0(x16) + 80005708: 00880813 addi x16,x16,8 + +000000008000570c : +Zbkb_andn_cg_cmp_rd_rs1_b8: + andn x8, x8, x20 # perform operation + 8000570c: 41447433 andn x8,x8,x20 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_andn_cg_cmp_rd_rs1_b8, Zbkb_andn_cg_cmp_rd_rs1_b8_str) + 80005710: 00053683 ld x13,0(x10) + 80005714: 00868c63 beq x13,x8,8000572c + 80005718: 6280276f jal x14,80007d40 + 8000571c: 8000570c .word 0x8000570c + 80005720: 00000000 .word 0x00000000 + 80005724: 80016e3e .word 0x80016e3e + 80005728: 00000000 .word 0x00000000 + 8000572c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x498a590298564e0e + 80005730: 00083483 ld x9,0(x16) + 80005734: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x3e772583c2fc2eb8 + 80005738: 00083583 ld x11,0(x16) + 8000573c: 00880813 addi x16,x16,8 + +0000000080005740 : +Zbkb_andn_cg_cmp_rd_rs1_b9: + andn x9, x9, x11 # perform operation + 80005740: 40b4f4b3 andn x9,x9,x11 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_andn_cg_cmp_rd_rs1_b9, Zbkb_andn_cg_cmp_rd_rs1_b9_str) + 80005744: 00053683 ld x13,0(x10) + 80005748: 00968c63 beq x13,x9,80005760 + 8000574c: 5f40276f jal x14,80007d40 + 80005750: 80005740 .word 0x80005740 + 80005754: 00000000 .word 0x00000000 + 80005758: 80016e75 .word 0x80016e75 + 8000575c: 00000000 .word 0x00000000 + 80005760: 00850513 addi x10,x10,8 + + mv x26, x10 # switch signature pointer register to avoid conflict with test + 80005764: 00050d13 addi x26,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x0f75fe269c81a8cf + 80005768: 00083503 ld x10,0(x16) + 8000576c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xd71c6acc6c2e8166 + 80005770: 00083f83 ld x31,0(x16) + 80005774: 00880813 addi x16,x16,8 + +0000000080005778 : +Zbkb_andn_cg_cmp_rd_rs1_b10: + andn x10, x10, x31 # perform operation + 80005778: 41f57533 andn x10,x10,x31 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zbkb_andn_cg_cmp_rd_rs1_b10, Zbkb_andn_cg_cmp_rd_rs1_b10_str) + 8000577c: 000d3683 ld x13,0(x26) + 80005780: 00a68c63 beq x13,x10,80005798 + 80005784: 5bc0276f jal x14,80007d40 + 80005788: 80005778 .word 0x80005778 + 8000578c: 00000000 .word 0x00000000 + 80005790: 80016eac .word 0x80016eac + 80005794: 00000000 .word 0x00000000 + 80005798: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xee690554cc6e94b7 + 8000579c: 00083583 ld x11,0(x16) + 800057a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x924a335f0c447e59 + 800057a4: 00083b83 ld x23,0(x16) + 800057a8: 00880813 addi x16,x16,8 + +00000000800057ac : +Zbkb_andn_cg_cmp_rd_rs1_b11: + andn x11, x11, x23 # perform operation + 800057ac: 4175f5b3 andn x11,x11,x23 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zbkb_andn_cg_cmp_rd_rs1_b11, Zbkb_andn_cg_cmp_rd_rs1_b11_str) + 800057b0: 000d3683 ld x13,0(x26) + 800057b4: 00b68c63 beq x13,x11,800057cc + 800057b8: 5880276f jal x14,80007d40 + 800057bc: 800057ac .word 0x800057ac + 800057c0: 00000000 .word 0x00000000 + 800057c4: 80016ee4 .word 0x80016ee4 + 800057c8: 00000000 .word 0x00000000 + 800057cc: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x07e7d366b0205bef + 800057d0: 00083603 ld x12,0(x16) + 800057d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xa1f1df25a3966bae + 800057d8: 00083783 ld x15,0(x16) + 800057dc: 00880813 addi x16,x16,8 + +00000000800057e0 : +Zbkb_andn_cg_cmp_rd_rs1_b12: + andn x12, x12, x15 # perform operation + 800057e0: 40f67633 andn x12,x12,x15 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zbkb_andn_cg_cmp_rd_rs1_b12, Zbkb_andn_cg_cmp_rd_rs1_b12_str) + 800057e4: 000d3683 ld x13,0(x26) + 800057e8: 00c68c63 beq x13,x12,80005800 + 800057ec: 5540276f jal x14,80007d40 + 800057f0: 800057e0 .word 0x800057e0 + 800057f4: 00000000 .word 0x00000000 + 800057f8: 80016f1c .word 0x80016f1c + 800057fc: 00000000 .word 0x00000000 + 80005800: 008d0d13 addi x26,x26,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005804: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005808: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x8bd76fd8c63f654f + 8000580c: 00083683 ld x13,0(x16) + 80005810: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x23000c76fc5ef714 + 80005814: 00083503 ld x10,0(x16) + 80005818: 00880813 addi x16,x16,8 + +000000008000581c : +Zbkb_andn_cg_cmp_rd_rs1_b13: + andn x13, x13, x10 # perform operation + 8000581c: 40a6f6b3 andn x13,x13,x10 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zbkb_andn_cg_cmp_rd_rs1_b13, Zbkb_andn_cg_cmp_rd_rs1_b13_str) + 80005820: 000d3203 ld x4,0(x26) + 80005824: 00d20c63 beq x4,x13,8000583c + 80005828: 4d8022ef jal x5,80007d00 + 8000582c: 8000581c .word 0x8000581c + 80005830: 00000000 .word 0x00000000 + 80005834: 80016f54 .word 0x80016f54 + 80005838: 00000000 .word 0x00000000 + 8000583c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x5ce9afdea73310dc + 80005840: 00083703 ld x14,0(x16) + 80005844: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xf536ccd693218fe5 + 80005848: 00083f83 ld x31,0(x16) + 8000584c: 00880813 addi x16,x16,8 + +0000000080005850 : +Zbkb_andn_cg_cmp_rd_rs1_b14: + andn x14, x14, x31 # perform operation + 80005850: 41f77733 andn x14,x14,x31 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zbkb_andn_cg_cmp_rd_rs1_b14, Zbkb_andn_cg_cmp_rd_rs1_b14_str) + 80005854: 000d3203 ld x4,0(x26) + 80005858: 00e20c63 beq x4,x14,80005870 + 8000585c: 4a4022ef jal x5,80007d00 + 80005860: 80005850 .word 0x80005850 + 80005864: 00000000 .word 0x00000000 + 80005868: 80016f8c .word 0x80016f8c + 8000586c: 00000000 .word 0x00000000 + 80005870: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x385adf623bdd0e29 + 80005874: 00083783 ld x15,0(x16) + 80005878: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xb0635a3d41501f63 + 8000587c: 00083383 ld x7,0(x16) + 80005880: 00880813 addi x16,x16,8 + +0000000080005884 : +Zbkb_andn_cg_cmp_rd_rs1_b15: + andn x15, x15, x7 # perform operation + 80005884: 4077f7b3 andn x15,x15,x7 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zbkb_andn_cg_cmp_rd_rs1_b15, Zbkb_andn_cg_cmp_rd_rs1_b15_str) + 80005888: 000d3203 ld x4,0(x26) + 8000588c: 00f20c63 beq x4,x15,800058a4 + 80005890: 470022ef jal x5,80007d00 + 80005894: 80005884 .word 0x80005884 + 80005898: 00000000 .word 0x00000000 + 8000589c: 80016fc4 .word 0x80016fc4 + 800058a0: 00000000 .word 0x00000000 + 800058a4: 008d0d13 addi x26,x26,8 + + mv x2, x16 # switch data pointer register to avoid conflict with test + 800058a8: 00080113 addi x2,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x1d6b998934f30235 + 800058ac: 00013803 ld x16,0(x2) + 800058b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x325bb52d0efec06a + 800058b4: 00013f83 ld x31,0(x2) + 800058b8: 00810113 addi x2,x2,8 + +00000000800058bc : +Zbkb_andn_cg_cmp_rd_rs1_b16: + andn x16, x16, x31 # perform operation + 800058bc: 41f87833 andn x16,x16,x31 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zbkb_andn_cg_cmp_rd_rs1_b16, Zbkb_andn_cg_cmp_rd_rs1_b16_str) + 800058c0: 000d3203 ld x4,0(x26) + 800058c4: 01020c63 beq x4,x16,800058dc + 800058c8: 438022ef jal x5,80007d00 + 800058cc: 800058bc .word 0x800058bc + 800058d0: 00000000 .word 0x00000000 + 800058d4: 80016ffc .word 0x80016ffc + 800058d8: 00000000 .word 0x00000000 + 800058dc: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xae146b36e21b5b2f + 800058e0: 00013883 ld x17,0(x2) + 800058e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xeb28ab8ae1e903b8 + 800058e8: 00013703 ld x14,0(x2) + 800058ec: 00810113 addi x2,x2,8 + +00000000800058f0 : +Zbkb_andn_cg_cmp_rd_rs1_b17: + andn x17, x17, x14 # perform operation + 800058f0: 40e8f8b3 andn x17,x17,x14 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zbkb_andn_cg_cmp_rd_rs1_b17, Zbkb_andn_cg_cmp_rd_rs1_b17_str) + 800058f4: 000d3203 ld x4,0(x26) + 800058f8: 01120c63 beq x4,x17,80005910 + 800058fc: 404022ef jal x5,80007d00 + 80005900: 800058f0 .word 0x800058f0 + 80005904: 00000000 .word 0x00000000 + 80005908: 80017034 .word 0x80017034 + 8000590c: 00000000 .word 0x00000000 + 80005910: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x171f4561efcf5d55 + 80005914: 00013903 ld x18,0(x2) + 80005918: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xd0e134ce809ce69a + 8000591c: 00013f03 ld x30,0(x2) + 80005920: 00810113 addi x2,x2,8 + +0000000080005924 : +Zbkb_andn_cg_cmp_rd_rs1_b18: + andn x18, x18, x30 # perform operation + 80005924: 41e97933 andn x18,x18,x30 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zbkb_andn_cg_cmp_rd_rs1_b18, Zbkb_andn_cg_cmp_rd_rs1_b18_str) + 80005928: 000d3203 ld x4,0(x26) + 8000592c: 01220c63 beq x4,x18,80005944 + 80005930: 3d0022ef jal x5,80007d00 + 80005934: 80005924 .word 0x80005924 + 80005938: 00000000 .word 0x00000000 + 8000593c: 8001706c .word 0x8001706c + 80005940: 00000000 .word 0x00000000 + 80005944: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x991799ec871cba19 + 80005948: 00013983 ld x19,0(x2) + 8000594c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x7111075b936c1878 + 80005950: 00013803 ld x16,0(x2) + 80005954: 00810113 addi x2,x2,8 + +0000000080005958 : +Zbkb_andn_cg_cmp_rd_rs1_b19: + andn x19, x19, x16 # perform operation + 80005958: 4109f9b3 andn x19,x19,x16 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zbkb_andn_cg_cmp_rd_rs1_b19, Zbkb_andn_cg_cmp_rd_rs1_b19_str) + 8000595c: 000d3203 ld x4,0(x26) + 80005960: 01320c63 beq x4,x19,80005978 + 80005964: 39c022ef jal x5,80007d00 + 80005968: 80005958 .word 0x80005958 + 8000596c: 00000000 .word 0x00000000 + 80005970: 800170a4 .word 0x800170a4 + 80005974: 00000000 .word 0x00000000 + 80005978: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x8465db7d097db1a7 + 8000597c: 00013a03 ld x20,0(x2) + 80005980: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x2c55adbe44589e0a + 80005984: 00013e03 ld x28,0(x2) + 80005988: 00810113 addi x2,x2,8 + +000000008000598c : +Zbkb_andn_cg_cmp_rd_rs1_b20: + andn x20, x20, x28 # perform operation + 8000598c: 41ca7a33 andn x20,x20,x28 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zbkb_andn_cg_cmp_rd_rs1_b20, Zbkb_andn_cg_cmp_rd_rs1_b20_str) + 80005990: 000d3203 ld x4,0(x26) + 80005994: 01420c63 beq x4,x20,800059ac + 80005998: 368022ef jal x5,80007d00 + 8000599c: 8000598c .word 0x8000598c + 800059a0: 00000000 .word 0x00000000 + 800059a4: 800170dc .word 0x800170dc + 800059a8: 00000000 .word 0x00000000 + 800059ac: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xe46eade15c38765d + 800059b0: 00013a83 ld x21,0(x2) + 800059b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x8f189a3230bde686 + 800059b8: 00013483 ld x9,0(x2) + 800059bc: 00810113 addi x2,x2,8 + +00000000800059c0 : +Zbkb_andn_cg_cmp_rd_rs1_b21: + andn x21, x21, x9 # perform operation + 800059c0: 409afab3 andn x21,x21,x9 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zbkb_andn_cg_cmp_rd_rs1_b21, Zbkb_andn_cg_cmp_rd_rs1_b21_str) + 800059c4: 000d3203 ld x4,0(x26) + 800059c8: 01520c63 beq x4,x21,800059e0 + 800059cc: 334022ef jal x5,80007d00 + 800059d0: 800059c0 .word 0x800059c0 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 80017114 .word 0x80017114 + 800059dc: 00000000 .word 0x00000000 + 800059e0: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xb09273a9836703f8 + 800059e4: 00013b03 ld x22,0(x2) + 800059e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xb800642ccabf3863 + 800059ec: 00013e83 ld x29,0(x2) + 800059f0: 00810113 addi x2,x2,8 + +00000000800059f4 : +Zbkb_andn_cg_cmp_rd_rs1_b22: + andn x22, x22, x29 # perform operation + 800059f4: 41db7b33 andn x22,x22,x29 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zbkb_andn_cg_cmp_rd_rs1_b22, Zbkb_andn_cg_cmp_rd_rs1_b22_str) + 800059f8: 000d3203 ld x4,0(x26) + 800059fc: 01620c63 beq x4,x22,80005a14 + 80005a00: 300022ef jal x5,80007d00 + 80005a04: 800059f4 .word 0x800059f4 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 8001714c .word 0x8001714c + 80005a10: 00000000 .word 0x00000000 + 80005a14: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xc05ce62908ad584c + 80005a18: 00013b83 ld x23,0(x2) + 80005a1c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xce5b8b19aabaa5df + 80005a20: 00013583 ld x11,0(x2) + 80005a24: 00810113 addi x2,x2,8 + +0000000080005a28 : +Zbkb_andn_cg_cmp_rd_rs1_b23: + andn x23, x23, x11 # perform operation + 80005a28: 40bbfbb3 andn x23,x23,x11 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zbkb_andn_cg_cmp_rd_rs1_b23, Zbkb_andn_cg_cmp_rd_rs1_b23_str) + 80005a2c: 000d3203 ld x4,0(x26) + 80005a30: 01720c63 beq x4,x23,80005a48 + 80005a34: 2cc022ef jal x5,80007d00 + 80005a38: 80005a28 .word 0x80005a28 + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 80017184 .word 0x80017184 + 80005a44: 00000000 .word 0x00000000 + 80005a48: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7eaf43e93632bb91 + 80005a4c: 00013c03 ld x24,0(x2) + 80005a50: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x24f1b67e1915d3e5 + 80005a54: 00013f03 ld x30,0(x2) + 80005a58: 00810113 addi x2,x2,8 + +0000000080005a5c : +Zbkb_andn_cg_cmp_rd_rs1_b24: + andn x24, x24, x30 # perform operation + 80005a5c: 41ec7c33 andn x24,x24,x30 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zbkb_andn_cg_cmp_rd_rs1_b24, Zbkb_andn_cg_cmp_rd_rs1_b24_str) + 80005a60: 000d3203 ld x4,0(x26) + 80005a64: 01820c63 beq x4,x24,80005a7c + 80005a68: 298022ef jal x5,80007d00 + 80005a6c: 80005a5c .word 0x80005a5c + 80005a70: 00000000 .word 0x00000000 + 80005a74: 800171bc .word 0x800171bc + 80005a78: 00000000 .word 0x00000000 + 80005a7c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x5c75193e0956bf7c + 80005a80: 00013c83 ld x25,0(x2) + 80005a84: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xa469e10f58eb0515 + 80005a88: 00013383 ld x7,0(x2) + 80005a8c: 00810113 addi x2,x2,8 + +0000000080005a90 : +Zbkb_andn_cg_cmp_rd_rs1_b25: + andn x25, x25, x7 # perform operation + 80005a90: 407cfcb3 andn x25,x25,x7 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zbkb_andn_cg_cmp_rd_rs1_b25, Zbkb_andn_cg_cmp_rd_rs1_b25_str) + 80005a94: 000d3203 ld x4,0(x26) + 80005a98: 01920c63 beq x4,x25,80005ab0 + 80005a9c: 264022ef jal x5,80007d00 + 80005aa0: 80005a90 .word 0x80005a90 + 80005aa4: 00000000 .word 0x00000000 + 80005aa8: 800171f4 .word 0x800171f4 + 80005aac: 00000000 .word 0x00000000 + 80005ab0: 008d0d13 addi x26,x26,8 + + mv x31, x26 # switch signature pointer register to avoid conflict with test + 80005ab4: 000d0f93 addi x31,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xa4c7d152c0511ec1 + 80005ab8: 00013d03 ld x26,0(x2) + 80005abc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xf3637104417c1de9 + 80005ac0: 00013a03 ld x20,0(x2) + 80005ac4: 00810113 addi x2,x2,8 + +0000000080005ac8 : +Zbkb_andn_cg_cmp_rd_rs1_b26: + andn x26, x26, x20 # perform operation + 80005ac8: 414d7d33 andn x26,x26,x20 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_andn_cg_cmp_rd_rs1_b26, Zbkb_andn_cg_cmp_rd_rs1_b26_str) + 80005acc: 000fb203 ld x4,0(x31) + 80005ad0: 01a20c63 beq x4,x26,80005ae8 + 80005ad4: 22c022ef jal x5,80007d00 + 80005ad8: 80005ac8 .word 0x80005ac8 + 80005adc: 00000000 .word 0x00000000 + 80005ae0: 8001722c .word 0x8001722c + 80005ae4: 00000000 .word 0x00000000 + 80005ae8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xbaf28eb1a5a22057 + 80005aec: 00013d83 ld x27,0(x2) + 80005af0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xa55e57bf6eaa60b8 + 80005af4: 00013583 ld x11,0(x2) + 80005af8: 00810113 addi x2,x2,8 + +0000000080005afc : +Zbkb_andn_cg_cmp_rd_rs1_b27: + andn x27, x27, x11 # perform operation + 80005afc: 40bdfdb3 andn x27,x27,x11 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zbkb_andn_cg_cmp_rd_rs1_b27, Zbkb_andn_cg_cmp_rd_rs1_b27_str) + 80005b00: 000fb203 ld x4,0(x31) + 80005b04: 01b20c63 beq x4,x27,80005b1c + 80005b08: 1f8022ef jal x5,80007d00 + 80005b0c: 80005afc .word 0x80005afc + 80005b10: 00000000 .word 0x00000000 + 80005b14: 80017264 .word 0x80017264 + 80005b18: 00000000 .word 0x00000000 + 80005b1c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x44d5033cbebf6057 + 80005b20: 00013e03 ld x28,0(x2) + 80005b24: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xcba706a02b636c99 + 80005b28: 00013c83 ld x25,0(x2) + 80005b2c: 00810113 addi x2,x2,8 + +0000000080005b30 : +Zbkb_andn_cg_cmp_rd_rs1_b28: + andn x28, x28, x25 # perform operation + 80005b30: 419e7e33 andn x28,x28,x25 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_andn_cg_cmp_rd_rs1_b28, Zbkb_andn_cg_cmp_rd_rs1_b28_str) + 80005b34: 000fb203 ld x4,0(x31) + 80005b38: 01c20c63 beq x4,x28,80005b50 + 80005b3c: 1c4022ef jal x5,80007d00 + 80005b40: 80005b30 .word 0x80005b30 + 80005b44: 00000000 .word 0x00000000 + 80005b48: 8001729c .word 0x8001729c + 80005b4c: 00000000 .word 0x00000000 + 80005b50: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xb74c364e83efba6e + 80005b54: 00013e83 ld x29,0(x2) + 80005b58: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x4b330eee682f2dfa + 80005b5c: 00013183 ld x3,0(x2) + 80005b60: 00810113 addi x2,x2,8 + +0000000080005b64 : +Zbkb_andn_cg_cmp_rd_rs1_b29: + andn x29, x29, x3 # perform operation + 80005b64: 403efeb3 andn x29,x29,x3 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zbkb_andn_cg_cmp_rd_rs1_b29, Zbkb_andn_cg_cmp_rd_rs1_b29_str) + 80005b68: 000fb203 ld x4,0(x31) + 80005b6c: 01d20c63 beq x4,x29,80005b84 + 80005b70: 190022ef jal x5,80007d00 + 80005b74: 80005b64 .word 0x80005b64 + 80005b78: 00000000 .word 0x00000000 + 80005b7c: 800172d4 .word 0x800172d4 + 80005b80: 00000000 .word 0x00000000 + 80005b84: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x4014ceb870a3bdfa + 80005b88: 00013f03 ld x30,0(x2) + 80005b8c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x94e4fcf269c60fe7 + 80005b90: 00013983 ld x19,0(x2) + 80005b94: 00810113 addi x2,x2,8 + +0000000080005b98 : +Zbkb_andn_cg_cmp_rd_rs1_b30: + andn x30, x30, x19 # perform operation + 80005b98: 413f7f33 andn x30,x30,x19 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zbkb_andn_cg_cmp_rd_rs1_b30, Zbkb_andn_cg_cmp_rd_rs1_b30_str) + 80005b9c: 000fb203 ld x4,0(x31) + 80005ba0: 01e20c63 beq x4,x30,80005bb8 + 80005ba4: 15c022ef jal x5,80007d00 + 80005ba8: 80005b98 .word 0x80005b98 + 80005bac: 00000000 .word 0x00000000 + 80005bb0: 8001730c .word 0x8001730c + 80005bb4: 00000000 .word 0x00000000 + 80005bb8: 008f8f93 addi x31,x31,8 + + mv x19, x31 # switch signature pointer register to avoid conflict with test + 80005bbc: 000f8993 addi x19,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xc2935992440ec112 + 80005bc0: 00013f83 ld x31,0(x2) + 80005bc4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xbe0ae4dcbf6e2e63 + 80005bc8: 00013303 ld x6,0(x2) + 80005bcc: 00810113 addi x2,x2,8 + +0000000080005bd0 : +Zbkb_andn_cg_cmp_rd_rs1_b31: + andn x31, x31, x6 # perform operation + 80005bd0: 406fffb3 andn x31,x31,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_andn_cg_cmp_rd_rs1_b31, Zbkb_andn_cg_cmp_rd_rs1_b31_str) + 80005bd4: 0009b203 ld x4,0(x19) + 80005bd8: 01f20c63 beq x4,x31,80005bf0 + 80005bdc: 124022ef jal x5,80007d00 + 80005be0: 80005bd0 .word 0x80005bd0 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 80017344 .word 0x80017344 + 80005bec: 00000000 .word 0x00000000 + 80005bf0: 00898993 addi x19,x19,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xfa944d7aab91246c + 80005bf4: 00013483 ld x9,0(x2) + 80005bf8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xcf91e13d61bbb4ca + 80005bfc: 00013003 ld x0,0(x2) + 80005c00: 00810113 addi x2,x2,8 + +0000000080005c04 : +Zbkb_andn_cg_cmp_rd_rs2_b0: + andn x0, x9, x0 # perform operation + 80005c04: 4004f033 andn x0,x9,x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_andn_cg_cmp_rd_rs2_b0, Zbkb_andn_cg_cmp_rd_rs2_b0_str) + 80005c08: 0009b203 ld x4,0(x19) + 80005c0c: 00020c63 beq x4,x0,80005c24 + 80005c10: 0f0022ef jal x5,80007d00 + 80005c14: 80005c04 .word 0x80005c04 + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 8001737c .word 0x8001737c + 80005c20: 00000000 .word 0x00000000 + 80005c24: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xbf1fc9b6fb345d5e + 80005c28: 00013c03 ld x24,0(x2) + 80005c2c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x12aeb163f72d9dcb + 80005c30: 00013083 ld x1,0(x2) + 80005c34: 00810113 addi x2,x2,8 + +0000000080005c38 : +Zbkb_andn_cg_cmp_rd_rs2_b1: + andn x1, x24, x1 # perform operation + 80005c38: 401c70b3 andn x1,x24,x1 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_andn_cg_cmp_rd_rs2_b1, Zbkb_andn_cg_cmp_rd_rs2_b1_str) + 80005c3c: 0009b203 ld x4,0(x19) + 80005c40: 00120c63 beq x4,x1,80005c58 + 80005c44: 0bc022ef jal x5,80007d00 + 80005c48: 80005c38 .word 0x80005c38 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 800173b3 .word 0x800173b3 + 80005c54: 00000000 .word 0x00000000 + 80005c58: 00898993 addi x19,x19,8 + + mv x17, x2 # switch data pointer register to avoid conflict with test + 80005c5c: 00010893 addi x17,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x92ab7f24385b5e26 + 80005c60: 0008b003 ld x0,0(x17) + 80005c64: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x9e65a492aeb14fc1 + 80005c68: 0008b103 ld x2,0(x17) + 80005c6c: 00888893 addi x17,x17,8 + +0000000080005c70 : +Zbkb_andn_cg_cmp_rd_rs2_b2: + andn x2, x0, x2 # perform operation + 80005c70: 40207133 andn x2,x0,x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_andn_cg_cmp_rd_rs2_b2, Zbkb_andn_cg_cmp_rd_rs2_b2_str) + 80005c74: 0009b203 ld x4,0(x19) + 80005c78: 00220c63 beq x4,x2,80005c90 + 80005c7c: 084022ef jal x5,80007d00 + 80005c80: 80005c70 .word 0x80005c70 + 80005c84: 00000000 .word 0x00000000 + 80005c88: 800173ea .word 0x800173ea + 80005c8c: 00000000 .word 0x00000000 + 80005c90: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x0752be114ad3e1c9 + 80005c94: 0008bd03 ld x26,0(x17) + 80005c98: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x3f710682a8f2af07 + 80005c9c: 0008b183 ld x3,0(x17) + 80005ca0: 00888893 addi x17,x17,8 + +0000000080005ca4 : +Zbkb_andn_cg_cmp_rd_rs2_b3: + andn x3, x26, x3 # perform operation + 80005ca4: 403d71b3 andn x3,x26,x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_andn_cg_cmp_rd_rs2_b3, Zbkb_andn_cg_cmp_rd_rs2_b3_str) + 80005ca8: 0009b203 ld x4,0(x19) + 80005cac: 00320c63 beq x4,x3,80005cc4 + 80005cb0: 050022ef jal x5,80007d00 + 80005cb4: 80005ca4 .word 0x80005ca4 + 80005cb8: 00000000 .word 0x00000000 + 80005cbc: 80017421 .word 0x80017421 + 80005cc0: 00000000 .word 0x00000000 + 80005cc4: 00898993 addi x19,x19,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005cc8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005ccc: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x4c0f6dc6cb9560e3 + 80005cd0: 0008b283 ld x5,0(x17) + 80005cd4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xc8c071a359737b3c + 80005cd8: 0008b203 ld x4,0(x17) + 80005cdc: 00888893 addi x17,x17,8 + +0000000080005ce0 : +Zbkb_andn_cg_cmp_rd_rs2_b4: + andn x4, x5, x4 # perform operation + 80005ce0: 4042f233 andn x4,x5,x4 + # Check if x4 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x4, Zbkb_andn_cg_cmp_rd_rs2_b4, Zbkb_andn_cg_cmp_rd_rs2_b4_str) + 80005ce4: 0009b683 ld x13,0(x19) + 80005ce8: 00468c63 beq x13,x4,80005d00 + 80005cec: 0540276f jal x14,80007d40 + 80005cf0: 80005ce0 .word 0x80005ce0 + 80005cf4: 00000000 .word 0x00000000 + 80005cf8: 80017458 .word 0x80017458 + 80005cfc: 00000000 .word 0x00000000 + 80005d00: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x31d27069e0afaccc + 80005d04: 0008bd03 ld x26,0(x17) + 80005d08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xced4219a7b605c09 + 80005d0c: 0008b283 ld x5,0(x17) + 80005d10: 00888893 addi x17,x17,8 + +0000000080005d14 : +Zbkb_andn_cg_cmp_rd_rs2_b5: + andn x5, x26, x5 # perform operation + 80005d14: 405d72b3 andn x5,x26,x5 + # Check if x5 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x5, Zbkb_andn_cg_cmp_rd_rs2_b5, Zbkb_andn_cg_cmp_rd_rs2_b5_str) + 80005d18: 0009b683 ld x13,0(x19) + 80005d1c: 00568c63 beq x13,x5,80005d34 + 80005d20: 0200276f jal x14,80007d40 + 80005d24: 80005d14 .word 0x80005d14 + 80005d28: 00000000 .word 0x00000000 + 80005d2c: 8001748f .word 0x8001748f + 80005d30: 00000000 .word 0x00000000 + 80005d34: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x80a2353cb1a78462 + 80005d38: 0008be03 ld x28,0(x17) + 80005d3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x9c490dff6048e3b2 + 80005d40: 0008b303 ld x6,0(x17) + 80005d44: 00888893 addi x17,x17,8 + +0000000080005d48 : +Zbkb_andn_cg_cmp_rd_rs2_b6: + andn x6, x28, x6 # perform operation + 80005d48: 406e7333 andn x6,x28,x6 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zbkb_andn_cg_cmp_rd_rs2_b6, Zbkb_andn_cg_cmp_rd_rs2_b6_str) + 80005d4c: 0009b683 ld x13,0(x19) + 80005d50: 00668c63 beq x13,x6,80005d68 + 80005d54: 7ed0176f jal x14,80007d40 + 80005d58: 80005d48 .word 0x80005d48 + 80005d5c: 00000000 .word 0x00000000 + 80005d60: 800174c6 .word 0x800174c6 + 80005d64: 00000000 .word 0x00000000 + 80005d68: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xd8f0d23a1a92bc2f + 80005d6c: 0008b303 ld x6,0(x17) + 80005d70: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x36305bc328dc9265 + 80005d74: 0008b383 ld x7,0(x17) + 80005d78: 00888893 addi x17,x17,8 + +0000000080005d7c : +Zbkb_andn_cg_cmp_rd_rs2_b7: + andn x7, x6, x7 # perform operation + 80005d7c: 407373b3 andn x7,x6,x7 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_andn_cg_cmp_rd_rs2_b7, Zbkb_andn_cg_cmp_rd_rs2_b7_str) + 80005d80: 0009b683 ld x13,0(x19) + 80005d84: 00768c63 beq x13,x7,80005d9c + 80005d88: 7b90176f jal x14,80007d40 + 80005d8c: 80005d7c .word 0x80005d7c + 80005d90: 00000000 .word 0x00000000 + 80005d94: 800174fd .word 0x800174fd + 80005d98: 00000000 .word 0x00000000 + 80005d9c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xe0ab214be98c337c + 80005da0: 0008b603 ld x12,0(x17) + 80005da4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xb8ec6e861b5759db + 80005da8: 0008b403 ld x8,0(x17) + 80005dac: 00888893 addi x17,x17,8 + +0000000080005db0 : +Zbkb_andn_cg_cmp_rd_rs2_b8: + andn x8, x12, x8 # perform operation + 80005db0: 40867433 andn x8,x12,x8 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_andn_cg_cmp_rd_rs2_b8, Zbkb_andn_cg_cmp_rd_rs2_b8_str) + 80005db4: 0009b683 ld x13,0(x19) + 80005db8: 00868c63 beq x13,x8,80005dd0 + 80005dbc: 7850176f jal x14,80007d40 + 80005dc0: 80005db0 .word 0x80005db0 + 80005dc4: 00000000 .word 0x00000000 + 80005dc8: 80017534 .word 0x80017534 + 80005dcc: 00000000 .word 0x00000000 + 80005dd0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x990a535582356a46 + 80005dd4: 0008b383 ld x7,0(x17) + 80005dd8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xaccf154ac42d2beb + 80005ddc: 0008b483 ld x9,0(x17) + 80005de0: 00888893 addi x17,x17,8 + +0000000080005de4 : +Zbkb_andn_cg_cmp_rd_rs2_b9: + andn x9, x7, x9 # perform operation + 80005de4: 4093f4b3 andn x9,x7,x9 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_andn_cg_cmp_rd_rs2_b9, Zbkb_andn_cg_cmp_rd_rs2_b9_str) + 80005de8: 0009b683 ld x13,0(x19) + 80005dec: 00968c63 beq x13,x9,80005e04 + 80005df0: 7510176f jal x14,80007d40 + 80005df4: 80005de4 .word 0x80005de4 + 80005df8: 00000000 .word 0x00000000 + 80005dfc: 8001756b .word 0x8001756b + 80005e00: 00000000 .word 0x00000000 + 80005e04: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xe6c1a64f7dbacc29 + 80005e08: 0008b003 ld x0,0(x17) + 80005e0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x3a3da9201e4a0979 + 80005e10: 0008b503 ld x10,0(x17) + 80005e14: 00888893 addi x17,x17,8 + +0000000080005e18 : +Zbkb_andn_cg_cmp_rd_rs2_b10: + andn x10, x0, x10 # perform operation + 80005e18: 40a07533 andn x10,x0,x10 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_andn_cg_cmp_rd_rs2_b10, Zbkb_andn_cg_cmp_rd_rs2_b10_str) + 80005e1c: 0009b683 ld x13,0(x19) + 80005e20: 00a68c63 beq x13,x10,80005e38 + 80005e24: 71d0176f jal x14,80007d40 + 80005e28: 80005e18 .word 0x80005e18 + 80005e2c: 00000000 .word 0x00000000 + 80005e30: 800175a2 .word 0x800175a2 + 80005e34: 00000000 .word 0x00000000 + 80005e38: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xe6f20a006b08c839 + 80005e3c: 0008be03 ld x28,0(x17) + 80005e40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x3f67859d47d79a59 + 80005e44: 0008b583 ld x11,0(x17) + 80005e48: 00888893 addi x17,x17,8 + +0000000080005e4c : +Zbkb_andn_cg_cmp_rd_rs2_b11: + andn x11, x28, x11 # perform operation + 80005e4c: 40be75b3 andn x11,x28,x11 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_andn_cg_cmp_rd_rs2_b11, Zbkb_andn_cg_cmp_rd_rs2_b11_str) + 80005e50: 0009b683 ld x13,0(x19) + 80005e54: 00b68c63 beq x13,x11,80005e6c + 80005e58: 6e90176f jal x14,80007d40 + 80005e5c: 80005e4c .word 0x80005e4c + 80005e60: 00000000 .word 0x00000000 + 80005e64: 800175da .word 0x800175da + 80005e68: 00000000 .word 0x00000000 + 80005e6c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x718c7a6b6fce8c37 + 80005e70: 0008bc83 ld x25,0(x17) + 80005e74: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x650d919fc2ba845d + 80005e78: 0008b603 ld x12,0(x17) + 80005e7c: 00888893 addi x17,x17,8 + +0000000080005e80 : +Zbkb_andn_cg_cmp_rd_rs2_b12: + andn x12, x25, x12 # perform operation + 80005e80: 40ccf633 andn x12,x25,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_andn_cg_cmp_rd_rs2_b12, Zbkb_andn_cg_cmp_rd_rs2_b12_str) + 80005e84: 0009b683 ld x13,0(x19) + 80005e88: 00c68c63 beq x13,x12,80005ea0 + 80005e8c: 6b50176f jal x14,80007d40 + 80005e90: 80005e80 .word 0x80005e80 + 80005e94: 00000000 .word 0x00000000 + 80005e98: 80017612 .word 0x80017612 + 80005e9c: 00000000 .word 0x00000000 + 80005ea0: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005ea4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005ea8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x72111ab7904ef4ae + 80005eac: 0008b183 ld x3,0(x17) + 80005eb0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x8725d67034992582 + 80005eb4: 0008b683 ld x13,0(x17) + 80005eb8: 00888893 addi x17,x17,8 + +0000000080005ebc : +Zbkb_andn_cg_cmp_rd_rs2_b13: + andn x13, x3, x13 # perform operation + 80005ebc: 40d1f6b3 andn x13,x3,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_andn_cg_cmp_rd_rs2_b13, Zbkb_andn_cg_cmp_rd_rs2_b13_str) + 80005ec0: 0009b383 ld x7,0(x19) + 80005ec4: 00d38c63 beq x7,x13,80005edc + 80005ec8: 6510146f jal x8,80007d18 + 80005ecc: 80005ebc .word 0x80005ebc + 80005ed0: 00000000 .word 0x00000000 + 80005ed4: 8001764a .word 0x8001764a + 80005ed8: 00000000 .word 0x00000000 + 80005edc: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x26b8df5937246a9e + 80005ee0: 0008b803 ld x16,0(x17) + 80005ee4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x014dcb8b9262b675 + 80005ee8: 0008b703 ld x14,0(x17) + 80005eec: 00888893 addi x17,x17,8 + +0000000080005ef0 : +Zbkb_andn_cg_cmp_rd_rs2_b14: + andn x14, x16, x14 # perform operation + 80005ef0: 40e87733 andn x14,x16,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkb_andn_cg_cmp_rd_rs2_b14, Zbkb_andn_cg_cmp_rd_rs2_b14_str) + 80005ef4: 0009b383 ld x7,0(x19) + 80005ef8: 00e38c63 beq x7,x14,80005f10 + 80005efc: 61d0146f jal x8,80007d18 + 80005f00: 80005ef0 .word 0x80005ef0 + 80005f04: 00000000 .word 0x00000000 + 80005f08: 80017682 .word 0x80017682 + 80005f0c: 00000000 .word 0x00000000 + 80005f10: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x9271ed89d9354356 + 80005f14: 0008bd03 ld x26,0(x17) + 80005f18: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x5431397659b64e5f + 80005f1c: 0008b783 ld x15,0(x17) + 80005f20: 00888893 addi x17,x17,8 + +0000000080005f24 : +Zbkb_andn_cg_cmp_rd_rs2_b15: + andn x15, x26, x15 # perform operation + 80005f24: 40fd77b3 andn x15,x26,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkb_andn_cg_cmp_rd_rs2_b15, Zbkb_andn_cg_cmp_rd_rs2_b15_str) + 80005f28: 0009b383 ld x7,0(x19) + 80005f2c: 00f38c63 beq x7,x15,80005f44 + 80005f30: 5e90146f jal x8,80007d18 + 80005f34: 80005f24 .word 0x80005f24 + 80005f38: 00000000 .word 0x00000000 + 80005f3c: 800176ba .word 0x800176ba + 80005f40: 00000000 .word 0x00000000 + 80005f44: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xe33b2cd5667e630d + 80005f48: 0008b003 ld x0,0(x17) + 80005f4c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xd67f0dff2c54c0d1 + 80005f50: 0008b803 ld x16,0(x17) + 80005f54: 00888893 addi x17,x17,8 + +0000000080005f58 : +Zbkb_andn_cg_cmp_rd_rs2_b16: + andn x16, x0, x16 # perform operation + 80005f58: 41007833 andn x16,x0,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkb_andn_cg_cmp_rd_rs2_b16, Zbkb_andn_cg_cmp_rd_rs2_b16_str) + 80005f5c: 0009b383 ld x7,0(x19) + 80005f60: 01038c63 beq x7,x16,80005f78 + 80005f64: 5b50146f jal x8,80007d18 + 80005f68: 80005f58 .word 0x80005f58 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 800176f2 .word 0x800176f2 + 80005f74: 00000000 .word 0x00000000 + 80005f78: 00898993 addi x19,x19,8 + + mv x12, x17 # switch data pointer register to avoid conflict with test + 80005f7c: 00088613 addi x12,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x757e5f8ffaf57f19 + 80005f80: 00063203 ld x4,0(x12) + 80005f84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x236dd079ee9d3f85 + 80005f88: 00063883 ld x17,0(x12) + 80005f8c: 00860613 addi x12,x12,8 + +0000000080005f90 : +Zbkb_andn_cg_cmp_rd_rs2_b17: + andn x17, x4, x17 # perform operation + 80005f90: 411278b3 andn x17,x4,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkb_andn_cg_cmp_rd_rs2_b17, Zbkb_andn_cg_cmp_rd_rs2_b17_str) + 80005f94: 0009b383 ld x7,0(x19) + 80005f98: 01138c63 beq x7,x17,80005fb0 + 80005f9c: 57d0146f jal x8,80007d18 + 80005fa0: 80005f90 .word 0x80005f90 + 80005fa4: 00000000 .word 0x00000000 + 80005fa8: 8001772a .word 0x8001772a + 80005fac: 00000000 .word 0x00000000 + 80005fb0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x94437cff73fe91e7 + 80005fb4: 00063803 ld x16,0(x12) + 80005fb8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x026bca67c3ebd31c + 80005fbc: 00063903 ld x18,0(x12) + 80005fc0: 00860613 addi x12,x12,8 + +0000000080005fc4 : +Zbkb_andn_cg_cmp_rd_rs2_b18: + andn x18, x16, x18 # perform operation + 80005fc4: 41287933 andn x18,x16,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkb_andn_cg_cmp_rd_rs2_b18, Zbkb_andn_cg_cmp_rd_rs2_b18_str) + 80005fc8: 0009b383 ld x7,0(x19) + 80005fcc: 01238c63 beq x7,x18,80005fe4 + 80005fd0: 5490146f jal x8,80007d18 + 80005fd4: 80005fc4 .word 0x80005fc4 + 80005fd8: 00000000 .word 0x00000000 + 80005fdc: 80017762 .word 0x80017762 + 80005fe0: 00000000 .word 0x00000000 + 80005fe4: 00898993 addi x19,x19,8 + + mv x24, x19 # switch signature pointer register to avoid conflict with test + 80005fe8: 00098c13 addi x24,x19,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x4aab6186a18a19dc + 80005fec: 00063d83 ld x27,0(x12) + 80005ff0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x02d2405272b1a185 + 80005ff4: 00063983 ld x19,0(x12) + 80005ff8: 00860613 addi x12,x12,8 + +0000000080005ffc : +Zbkb_andn_cg_cmp_rd_rs2_b19: + andn x19, x27, x19 # perform operation + 80005ffc: 413df9b3 andn x19,x27,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zbkb_andn_cg_cmp_rd_rs2_b19, Zbkb_andn_cg_cmp_rd_rs2_b19_str) + 80006000: 000c3383 ld x7,0(x24) + 80006004: 01338c63 beq x7,x19,8000601c + 80006008: 5110146f jal x8,80007d18 + 8000600c: 80005ffc .word 0x80005ffc + 80006010: 00000000 .word 0x00000000 + 80006014: 8001779a .word 0x8001779a + 80006018: 00000000 .word 0x00000000 + 8000601c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x5d259984014bc2df + 80006020: 00063a83 ld x21,0(x12) + 80006024: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xc45f179c5cea8658 + 80006028: 00063a03 ld x20,0(x12) + 8000602c: 00860613 addi x12,x12,8 + +0000000080006030 : +Zbkb_andn_cg_cmp_rd_rs2_b20: + andn x20, x21, x20 # perform operation + 80006030: 414afa33 andn x20,x21,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zbkb_andn_cg_cmp_rd_rs2_b20, Zbkb_andn_cg_cmp_rd_rs2_b20_str) + 80006034: 000c3383 ld x7,0(x24) + 80006038: 01438c63 beq x7,x20,80006050 + 8000603c: 4dd0146f jal x8,80007d18 + 80006040: 80006030 .word 0x80006030 + 80006044: 00000000 .word 0x00000000 + 80006048: 800177d2 .word 0x800177d2 + 8000604c: 00000000 .word 0x00000000 + 80006050: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x13169dc902ca2970 + 80006054: 00063583 ld x11,0(x12) + 80006058: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x09ded47748f69556 + 8000605c: 00063a83 ld x21,0(x12) + 80006060: 00860613 addi x12,x12,8 + +0000000080006064 : +Zbkb_andn_cg_cmp_rd_rs2_b21: + andn x21, x11, x21 # perform operation + 80006064: 4155fab3 andn x21,x11,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x21, Zbkb_andn_cg_cmp_rd_rs2_b21, Zbkb_andn_cg_cmp_rd_rs2_b21_str) + 80006068: 000c3383 ld x7,0(x24) + 8000606c: 01538c63 beq x7,x21,80006084 + 80006070: 4a90146f jal x8,80007d18 + 80006074: 80006064 .word 0x80006064 + 80006078: 00000000 .word 0x00000000 + 8000607c: 8001780a .word 0x8001780a + 80006080: 00000000 .word 0x00000000 + 80006084: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x982f2831516b5265 + 80006088: 00063483 ld x9,0(x12) + 8000608c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x6d4033de1b4469ee + 80006090: 00063b03 ld x22,0(x12) + 80006094: 00860613 addi x12,x12,8 + +0000000080006098 : +Zbkb_andn_cg_cmp_rd_rs2_b22: + andn x22, x9, x22 # perform operation + 80006098: 4164fb33 andn x22,x9,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zbkb_andn_cg_cmp_rd_rs2_b22, Zbkb_andn_cg_cmp_rd_rs2_b22_str) + 8000609c: 000c3383 ld x7,0(x24) + 800060a0: 01638c63 beq x7,x22,800060b8 + 800060a4: 4750146f jal x8,80007d18 + 800060a8: 80006098 .word 0x80006098 + 800060ac: 00000000 .word 0x00000000 + 800060b0: 80017842 .word 0x80017842 + 800060b4: 00000000 .word 0x00000000 + 800060b8: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xcd756f6a36efb0f1 + 800060bc: 00063103 ld x2,0(x12) + 800060c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x23bb8ee30d85f64d + 800060c4: 00063b83 ld x23,0(x12) + 800060c8: 00860613 addi x12,x12,8 + +00000000800060cc : +Zbkb_andn_cg_cmp_rd_rs2_b23: + andn x23, x2, x23 # perform operation + 800060cc: 41717bb3 andn x23,x2,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zbkb_andn_cg_cmp_rd_rs2_b23, Zbkb_andn_cg_cmp_rd_rs2_b23_str) + 800060d0: 000c3383 ld x7,0(x24) + 800060d4: 01738c63 beq x7,x23,800060ec + 800060d8: 4410146f jal x8,80007d18 + 800060dc: 800060cc .word 0x800060cc + 800060e0: 00000000 .word 0x00000000 + 800060e4: 8001787a .word 0x8001787a + 800060e8: 00000000 .word 0x00000000 + 800060ec: 008c0c13 addi x24,x24,8 + + mv x19, x24 # switch signature pointer register to avoid conflict with test + 800060f0: 000c0993 addi x19,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xfbb2bf15200afa30 + 800060f4: 00063283 ld x5,0(x12) + 800060f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xf2802567ce7a1fec + 800060fc: 00063c03 ld x24,0(x12) + 80006100: 00860613 addi x12,x12,8 + +0000000080006104 : +Zbkb_andn_cg_cmp_rd_rs2_b24: + andn x24, x5, x24 # perform operation + 80006104: 4182fc33 andn x24,x5,x24 + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zbkb_andn_cg_cmp_rd_rs2_b24, Zbkb_andn_cg_cmp_rd_rs2_b24_str) + 80006108: 0009b383 ld x7,0(x19) + 8000610c: 01838c63 beq x7,x24,80006124 + 80006110: 4090146f jal x8,80007d18 + 80006114: 80006104 .word 0x80006104 + 80006118: 00000000 .word 0x00000000 + 8000611c: 800178b2 .word 0x800178b2 + 80006120: 00000000 .word 0x00000000 + 80006124: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x4ebadd80d49ab3cd + 80006128: 00063a03 ld x20,0(x12) + 8000612c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x65fde8bbfe9d1008 + 80006130: 00063c83 ld x25,0(x12) + 80006134: 00860613 addi x12,x12,8 + +0000000080006138 : +Zbkb_andn_cg_cmp_rd_rs2_b25: + andn x25, x20, x25 # perform operation + 80006138: 419a7cb3 andn x25,x20,x25 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zbkb_andn_cg_cmp_rd_rs2_b25, Zbkb_andn_cg_cmp_rd_rs2_b25_str) + 8000613c: 0009b383 ld x7,0(x19) + 80006140: 01938c63 beq x7,x25,80006158 + 80006144: 3d50146f jal x8,80007d18 + 80006148: 80006138 .word 0x80006138 + 8000614c: 00000000 .word 0x00000000 + 80006150: 800178ea .word 0x800178ea + 80006154: 00000000 .word 0x00000000 + 80006158: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x44818599db61d639 + 8000615c: 00063583 ld x11,0(x12) + 80006160: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x28f48293a8a959d8 + 80006164: 00063d03 ld x26,0(x12) + 80006168: 00860613 addi x12,x12,8 + +000000008000616c : +Zbkb_andn_cg_cmp_rd_rs2_b26: + andn x26, x11, x26 # perform operation + 8000616c: 41a5fd33 andn x26,x11,x26 + # Check if x26 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x26, Zbkb_andn_cg_cmp_rd_rs2_b26, Zbkb_andn_cg_cmp_rd_rs2_b26_str) + 80006170: 0009b383 ld x7,0(x19) + 80006174: 01a38c63 beq x7,x26,8000618c + 80006178: 3a10146f jal x8,80007d18 + 8000617c: 8000616c .word 0x8000616c + 80006180: 00000000 .word 0x00000000 + 80006184: 80017922 .word 0x80017922 + 80006188: 00000000 .word 0x00000000 + 8000618c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x53901498cc68c3cb + 80006190: 00063483 ld x9,0(x12) + 80006194: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x657c7a6ed2a4a695 + 80006198: 00063d83 ld x27,0(x12) + 8000619c: 00860613 addi x12,x12,8 + +00000000800061a0 : +Zbkb_andn_cg_cmp_rd_rs2_b27: + andn x27, x9, x27 # perform operation + 800061a0: 41b4fdb3 andn x27,x9,x27 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zbkb_andn_cg_cmp_rd_rs2_b27, Zbkb_andn_cg_cmp_rd_rs2_b27_str) + 800061a4: 0009b383 ld x7,0(x19) + 800061a8: 01b38c63 beq x7,x27,800061c0 + 800061ac: 36d0146f jal x8,80007d18 + 800061b0: 800061a0 .word 0x800061a0 + 800061b4: 00000000 .word 0x00000000 + 800061b8: 8001795a .word 0x8001795a + 800061bc: 00000000 .word 0x00000000 + 800061c0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x01b3b7a70333e24c + 800061c4: 00063583 ld x11,0(x12) + 800061c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x306152bb7b3aa21c + 800061cc: 00063e03 ld x28,0(x12) + 800061d0: 00860613 addi x12,x12,8 + +00000000800061d4 : +Zbkb_andn_cg_cmp_rd_rs2_b28: + andn x28, x11, x28 # perform operation + 800061d4: 41c5fe33 andn x28,x11,x28 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zbkb_andn_cg_cmp_rd_rs2_b28, Zbkb_andn_cg_cmp_rd_rs2_b28_str) + 800061d8: 0009b383 ld x7,0(x19) + 800061dc: 01c38c63 beq x7,x28,800061f4 + 800061e0: 3390146f jal x8,80007d18 + 800061e4: 800061d4 .word 0x800061d4 + 800061e8: 00000000 .word 0x00000000 + 800061ec: 80017992 .word 0x80017992 + 800061f0: 00000000 .word 0x00000000 + 800061f4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x6e46de62118c7aee + 800061f8: 00063a03 ld x20,0(x12) + 800061fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x94a304fca100719c + 80006200: 00063e83 ld x29,0(x12) + 80006204: 00860613 addi x12,x12,8 + +0000000080006208 : +Zbkb_andn_cg_cmp_rd_rs2_b29: + andn x29, x20, x29 # perform operation + 80006208: 41da7eb3 andn x29,x20,x29 + # Check if x29 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x29, Zbkb_andn_cg_cmp_rd_rs2_b29, Zbkb_andn_cg_cmp_rd_rs2_b29_str) + 8000620c: 0009b383 ld x7,0(x19) + 80006210: 01d38c63 beq x7,x29,80006228 + 80006214: 3050146f jal x8,80007d18 + 80006218: 80006208 .word 0x80006208 + 8000621c: 00000000 .word 0x00000000 + 80006220: 800179ca .word 0x800179ca + 80006224: 00000000 .word 0x00000000 + 80006228: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xc71b2a79125f0047 + 8000622c: 00063803 ld x16,0(x12) + 80006230: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x1bf735c747f85e94 + 80006234: 00063f03 ld x30,0(x12) + 80006238: 00860613 addi x12,x12,8 + +000000008000623c : +Zbkb_andn_cg_cmp_rd_rs2_b30: + andn x30, x16, x30 # perform operation + 8000623c: 41e87f33 andn x30,x16,x30 + # Check if x30 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x30, Zbkb_andn_cg_cmp_rd_rs2_b30, Zbkb_andn_cg_cmp_rd_rs2_b30_str) + 80006240: 0009b383 ld x7,0(x19) + 80006244: 01e38c63 beq x7,x30,8000625c + 80006248: 2d10146f jal x8,80007d18 + 8000624c: 8000623c .word 0x8000623c + 80006250: 00000000 .word 0x00000000 + 80006254: 80017a02 .word 0x80017a02 + 80006258: 00000000 .word 0x00000000 + 8000625c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x849c0f71d5bef81e + 80006260: 00063f03 ld x30,0(x12) + 80006264: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x05eab2392a2f68e5 + 80006268: 00063f83 ld x31,0(x12) + 8000626c: 00860613 addi x12,x12,8 + +0000000080006270 : +Zbkb_andn_cg_cmp_rd_rs2_b31: + andn x31, x30, x31 # perform operation + 80006270: 41ff7fb3 andn x31,x30,x31 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkb_andn_cg_cmp_rd_rs2_b31, Zbkb_andn_cg_cmp_rd_rs2_b31_str) + 80006274: 0009b383 ld x7,0(x19) + 80006278: 01f38c63 beq x7,x31,80006290 + 8000627c: 29d0146f jal x8,80007d18 + 80006280: 80006270 .word 0x80006270 + 80006284: 00000000 .word 0x00000000 + 80006288: 80017a3a .word 0x80017a3a + 8000628c: 00000000 .word 0x00000000 + 80006290: 00898993 addi x19,x19,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xc8c3f701b5a5eeb5 + 80006294: 00063003 ld x0,0(x12) + 80006298: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0xde0eec702450bdb0 + 8000629c: 00063003 ld x0,0(x12) + 800062a0: 00860613 addi x12,x12,8 + +00000000800062a4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b0: + andn x0, x0, x0 # perform operation + 800062a4: 40007033 andn x0,x0,x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zbkb_andn_cg_cmp_rd_rs1_rs2_b0, Zbkb_andn_cg_cmp_rd_rs1_rs2_b0_str) + 800062a8: 0009b383 ld x7,0(x19) + 800062ac: 00038c63 beq x7,x0,800062c4 + 800062b0: 2690146f jal x8,80007d18 + 800062b4: 800062a4 .word 0x800062a4 + 800062b8: 00000000 .word 0x00000000 + 800062bc: 80017a72 .word 0x80017a72 + 800062c0: 00000000 .word 0x00000000 + 800062c4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xf87da48db40e1bea + 800062c8: 00063083 ld x1,0(x12) + 800062cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x3b4fd76cc973b668 + 800062d0: 00063083 ld x1,0(x12) + 800062d4: 00860613 addi x12,x12,8 + +00000000800062d8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b1: + andn x1, x1, x1 # perform operation + 800062d8: 4010f0b3 andn x1,x1,x1 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zbkb_andn_cg_cmp_rd_rs1_rs2_b1, Zbkb_andn_cg_cmp_rd_rs1_rs2_b1_str) + 800062dc: 0009b383 ld x7,0(x19) + 800062e0: 00138c63 beq x7,x1,800062f8 + 800062e4: 2350146f jal x8,80007d18 + 800062e8: 800062d8 .word 0x800062d8 + 800062ec: 00000000 .word 0x00000000 + 800062f0: 80017aad .word 0x80017aad + 800062f4: 00000000 .word 0x00000000 + 800062f8: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x9372c8518e635ab8 + 800062fc: 00063103 ld x2,0(x12) + 80006300: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xcb5d9f3533de5ce7 + 80006304: 00063103 ld x2,0(x12) + 80006308: 00860613 addi x12,x12,8 + +000000008000630c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b2: + andn x2, x2, x2 # perform operation + 8000630c: 40217133 andn x2,x2,x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkb_andn_cg_cmp_rd_rs1_rs2_b2, Zbkb_andn_cg_cmp_rd_rs1_rs2_b2_str) + 80006310: 0009b383 ld x7,0(x19) + 80006314: 00238c63 beq x7,x2,8000632c + 80006318: 2010146f jal x8,80007d18 + 8000631c: 8000630c .word 0x8000630c + 80006320: 00000000 .word 0x00000000 + 80006324: 80017ae8 .word 0x80017ae8 + 80006328: 00000000 .word 0x00000000 + 8000632c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x2e4142eb19b07dea + 80006330: 00063183 ld x3,0(x12) + 80006334: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x66c17a9508273b27 + 80006338: 00063183 ld x3,0(x12) + 8000633c: 00860613 addi x12,x12,8 + +0000000080006340 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b3: + andn x3, x3, x3 # perform operation + 80006340: 4031f1b3 andn x3,x3,x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zbkb_andn_cg_cmp_rd_rs1_rs2_b3, Zbkb_andn_cg_cmp_rd_rs1_rs2_b3_str) + 80006344: 0009b383 ld x7,0(x19) + 80006348: 00338c63 beq x7,x3,80006360 + 8000634c: 1cd0146f jal x8,80007d18 + 80006350: 80006340 .word 0x80006340 + 80006354: 00000000 .word 0x00000000 + 80006358: 80017b23 .word 0x80017b23 + 8000635c: 00000000 .word 0x00000000 + 80006360: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xe4f61a8f3be8195a + 80006364: 00063203 ld x4,0(x12) + 80006368: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x9d85cce7f60ad694 + 8000636c: 00063203 ld x4,0(x12) + 80006370: 00860613 addi x12,x12,8 + +0000000080006374 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b4: + andn x4, x4, x4 # perform operation + 80006374: 40427233 andn x4,x4,x4 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zbkb_andn_cg_cmp_rd_rs1_rs2_b4, Zbkb_andn_cg_cmp_rd_rs1_rs2_b4_str) + 80006378: 0009b383 ld x7,0(x19) + 8000637c: 00438c63 beq x7,x4,80006394 + 80006380: 1990146f jal x8,80007d18 + 80006384: 80006374 .word 0x80006374 + 80006388: 00000000 .word 0x00000000 + 8000638c: 80017b5e .word 0x80017b5e + 80006390: 00000000 .word 0x00000000 + 80006394: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x39fdc53fd85aaa87 + 80006398: 00063283 ld x5,0(x12) + 8000639c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xffcdce3f414d97ad + 800063a0: 00063283 ld x5,0(x12) + 800063a4: 00860613 addi x12,x12,8 + +00000000800063a8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b5: + andn x5, x5, x5 # perform operation + 800063a8: 4052f2b3 andn x5,x5,x5 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zbkb_andn_cg_cmp_rd_rs1_rs2_b5, Zbkb_andn_cg_cmp_rd_rs1_rs2_b5_str) + 800063ac: 0009b383 ld x7,0(x19) + 800063b0: 00538c63 beq x7,x5,800063c8 + 800063b4: 1650146f jal x8,80007d18 + 800063b8: 800063a8 .word 0x800063a8 + 800063bc: 00000000 .word 0x00000000 + 800063c0: 80017b99 .word 0x80017b99 + 800063c4: 00000000 .word 0x00000000 + 800063c8: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x52050c2d79d5f25f + 800063cc: 00063303 ld x6,0(x12) + 800063d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xbd9900f02e4d3304 + 800063d4: 00063303 ld x6,0(x12) + 800063d8: 00860613 addi x12,x12,8 + +00000000800063dc : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b6: + andn x6, x6, x6 # perform operation + 800063dc: 40637333 andn x6,x6,x6 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zbkb_andn_cg_cmp_rd_rs1_rs2_b6, Zbkb_andn_cg_cmp_rd_rs1_rs2_b6_str) + 800063e0: 0009b383 ld x7,0(x19) + 800063e4: 00638c63 beq x7,x6,800063fc + 800063e8: 1310146f jal x8,80007d18 + 800063ec: 800063dc .word 0x800063dc + 800063f0: 00000000 .word 0x00000000 + 800063f4: 80017bd4 .word 0x80017bd4 + 800063f8: 00000000 .word 0x00000000 + 800063fc: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80006400: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80006404: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x20efc7afa7f363e9 + 80006408: 00063383 ld x7,0(x12) + 8000640c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xcb7fa6374c4d4d1e + 80006410: 00063383 ld x7,0(x12) + 80006414: 00860613 addi x12,x12,8 + +0000000080006418 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b7: + andn x7, x7, x7 # perform operation + 80006418: 4073f3b3 andn x7,x7,x7 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_andn_cg_cmp_rd_rs1_rs2_b7, Zbkb_andn_cg_cmp_rd_rs1_rs2_b7_str) + 8000641c: 0009b683 ld x13,0(x19) + 80006420: 00768c63 beq x13,x7,80006438 + 80006424: 11d0176f jal x14,80007d40 + 80006428: 80006418 .word 0x80006418 + 8000642c: 00000000 .word 0x00000000 + 80006430: 80017c0f .word 0x80017c0f + 80006434: 00000000 .word 0x00000000 + 80006438: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x47c4c093f03b1b42 + 8000643c: 00063403 ld x8,0(x12) + 80006440: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x8bc114fb89085c44 + 80006444: 00063403 ld x8,0(x12) + 80006448: 00860613 addi x12,x12,8 + +000000008000644c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b8: + andn x8, x8, x8 # perform operation + 8000644c: 40847433 andn x8,x8,x8 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_andn_cg_cmp_rd_rs1_rs2_b8, Zbkb_andn_cg_cmp_rd_rs1_rs2_b8_str) + 80006450: 0009b683 ld x13,0(x19) + 80006454: 00868c63 beq x13,x8,8000646c + 80006458: 0e90176f jal x14,80007d40 + 8000645c: 8000644c .word 0x8000644c + 80006460: 00000000 .word 0x00000000 + 80006464: 80017c4a .word 0x80017c4a + 80006468: 00000000 .word 0x00000000 + 8000646c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x775b0f459549203a + 80006470: 00063483 ld x9,0(x12) + 80006474: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7382618d84c6ddcd + 80006478: 00063483 ld x9,0(x12) + 8000647c: 00860613 addi x12,x12,8 + +0000000080006480 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b9: + andn x9, x9, x9 # perform operation + 80006480: 4094f4b3 andn x9,x9,x9 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_andn_cg_cmp_rd_rs1_rs2_b9, Zbkb_andn_cg_cmp_rd_rs1_rs2_b9_str) + 80006484: 0009b683 ld x13,0(x19) + 80006488: 00968c63 beq x13,x9,800064a0 + 8000648c: 0b50176f jal x14,80007d40 + 80006490: 80006480 .word 0x80006480 + 80006494: 00000000 .word 0x00000000 + 80006498: 80017c85 .word 0x80017c85 + 8000649c: 00000000 .word 0x00000000 + 800064a0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xda6c14bd6ecaa097 + 800064a4: 00063503 ld x10,0(x12) + 800064a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x1ddb86e3c5f94001 + 800064ac: 00063503 ld x10,0(x12) + 800064b0: 00860613 addi x12,x12,8 + +00000000800064b4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b10: + andn x10, x10, x10 # perform operation + 800064b4: 40a57533 andn x10,x10,x10 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_andn_cg_cmp_rd_rs1_rs2_b10, Zbkb_andn_cg_cmp_rd_rs1_rs2_b10_str) + 800064b8: 0009b683 ld x13,0(x19) + 800064bc: 00a68c63 beq x13,x10,800064d4 + 800064c0: 0810176f jal x14,80007d40 + 800064c4: 800064b4 .word 0x800064b4 + 800064c8: 00000000 .word 0x00000000 + 800064cc: 80017cc0 .word 0x80017cc0 + 800064d0: 00000000 .word 0x00000000 + 800064d4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x6219179e27e6a44f + 800064d8: 00063583 ld x11,0(x12) + 800064dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xe217ae169f9537c9 + 800064e0: 00063583 ld x11,0(x12) + 800064e4: 00860613 addi x12,x12,8 + +00000000800064e8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b11: + andn x11, x11, x11 # perform operation + 800064e8: 40b5f5b3 andn x11,x11,x11 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_andn_cg_cmp_rd_rs1_rs2_b11, Zbkb_andn_cg_cmp_rd_rs1_rs2_b11_str) + 800064ec: 0009b683 ld x13,0(x19) + 800064f0: 00b68c63 beq x13,x11,80006508 + 800064f4: 04d0176f jal x14,80007d40 + 800064f8: 800064e8 .word 0x800064e8 + 800064fc: 00000000 .word 0x00000000 + 80006500: 80017cfc .word 0x80017cfc + 80006504: 00000000 .word 0x00000000 + 80006508: 00898993 addi x19,x19,8 + + mv x11, x12 # switch data pointer register to avoid conflict with test + 8000650c: 00060593 addi x11,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x21c5c8bc2365db2d + 80006510: 0005b603 ld x12,0(x11) + 80006514: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0xacb0372ecb206776 + 80006518: 0005b603 ld x12,0(x11) + 8000651c: 00858593 addi x11,x11,8 + +0000000080006520 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b12: + andn x12, x12, x12 # perform operation + 80006520: 40c67633 andn x12,x12,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_andn_cg_cmp_rd_rs1_rs2_b12, Zbkb_andn_cg_cmp_rd_rs1_rs2_b12_str) + 80006524: 0009b683 ld x13,0(x19) + 80006528: 00c68c63 beq x13,x12,80006540 + 8000652c: 0150176f jal x14,80007d40 + 80006530: 80006520 .word 0x80006520 + 80006534: 00000000 .word 0x00000000 + 80006538: 80017d38 .word 0x80017d38 + 8000653c: 00000000 .word 0x00000000 + 80006540: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006544: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006548: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0xd255fa3d4e523383 + 8000654c: 0005b683 ld x13,0(x11) + 80006550: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0xa663a81c5fb6c747 + 80006554: 0005b683 ld x13,0(x11) + 80006558: 00858593 addi x11,x11,8 + +000000008000655c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b13: + andn x13, x13, x13 # perform operation + 8000655c: 40d6f6b3 andn x13,x13,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_andn_cg_cmp_rd_rs1_rs2_b13, Zbkb_andn_cg_cmp_rd_rs1_rs2_b13_str) + 80006560: 0009b383 ld x7,0(x19) + 80006564: 00d38c63 beq x7,x13,8000657c + 80006568: 7b00146f jal x8,80007d18 + 8000656c: 8000655c .word 0x8000655c + 80006570: 00000000 .word 0x00000000 + 80006574: 80017d74 .word 0x80017d74 + 80006578: 00000000 .word 0x00000000 + 8000657c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x6155cfb62fe62846 + 80006580: 0005b703 ld x14,0(x11) + 80006584: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x20574d62376bcdb6 + 80006588: 0005b703 ld x14,0(x11) + 8000658c: 00858593 addi x11,x11,8 + +0000000080006590 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b14: + andn x14, x14, x14 # perform operation + 80006590: 40e77733 andn x14,x14,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkb_andn_cg_cmp_rd_rs1_rs2_b14, Zbkb_andn_cg_cmp_rd_rs1_rs2_b14_str) + 80006594: 0009b383 ld x7,0(x19) + 80006598: 00e38c63 beq x7,x14,800065b0 + 8000659c: 77c0146f jal x8,80007d18 + 800065a0: 80006590 .word 0x80006590 + 800065a4: 00000000 .word 0x00000000 + 800065a8: 80017db0 .word 0x80017db0 + 800065ac: 00000000 .word 0x00000000 + 800065b0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0x4d9650cf6fda8ecd + 800065b4: 0005b783 ld x15,0(x11) + 800065b8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x1cff643e0468067a + 800065bc: 0005b783 ld x15,0(x11) + 800065c0: 00858593 addi x11,x11,8 + +00000000800065c4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b15: + andn x15, x15, x15 # perform operation + 800065c4: 40f7f7b3 andn x15,x15,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkb_andn_cg_cmp_rd_rs1_rs2_b15, Zbkb_andn_cg_cmp_rd_rs1_rs2_b15_str) + 800065c8: 0009b383 ld x7,0(x19) + 800065cc: 00f38c63 beq x7,x15,800065e4 + 800065d0: 7480146f jal x8,80007d18 + 800065d4: 800065c4 .word 0x800065c4 + 800065d8: 00000000 .word 0x00000000 + 800065dc: 80017dec .word 0x80017dec + 800065e0: 00000000 .word 0x00000000 + 800065e4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x9ff9dd84c00a819e + 800065e8: 0005b803 ld x16,0(x11) + 800065ec: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x3dc33354f209bacd + 800065f0: 0005b803 ld x16,0(x11) + 800065f4: 00858593 addi x11,x11,8 + +00000000800065f8 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b16: + andn x16, x16, x16 # perform operation + 800065f8: 41087833 andn x16,x16,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkb_andn_cg_cmp_rd_rs1_rs2_b16, Zbkb_andn_cg_cmp_rd_rs1_rs2_b16_str) + 800065fc: 0009b383 ld x7,0(x19) + 80006600: 01038c63 beq x7,x16,80006618 + 80006604: 7140146f jal x8,80007d18 + 80006608: 800065f8 .word 0x800065f8 + 8000660c: 00000000 .word 0x00000000 + 80006610: 80017e28 .word 0x80017e28 + 80006614: 00000000 .word 0x00000000 + 80006618: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x5f78629eca4e88f1 + 8000661c: 0005b883 ld x17,0(x11) + 80006620: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x18217d321975987c + 80006624: 0005b883 ld x17,0(x11) + 80006628: 00858593 addi x11,x11,8 + +000000008000662c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b17: + andn x17, x17, x17 # perform operation + 8000662c: 4118f8b3 andn x17,x17,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkb_andn_cg_cmp_rd_rs1_rs2_b17, Zbkb_andn_cg_cmp_rd_rs1_rs2_b17_str) + 80006630: 0009b383 ld x7,0(x19) + 80006634: 01138c63 beq x7,x17,8000664c + 80006638: 6e00146f jal x8,80007d18 + 8000663c: 8000662c .word 0x8000662c + 80006640: 00000000 .word 0x00000000 + 80006644: 80017e64 .word 0x80017e64 + 80006648: 00000000 .word 0x00000000 + 8000664c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x6671c0d8e31a938f + 80006650: 0005b903 ld x18,0(x11) + 80006654: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xce1dd93d0461c221 + 80006658: 0005b903 ld x18,0(x11) + 8000665c: 00858593 addi x11,x11,8 + +0000000080006660 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b18: + andn x18, x18, x18 # perform operation + 80006660: 41297933 andn x18,x18,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkb_andn_cg_cmp_rd_rs1_rs2_b18, Zbkb_andn_cg_cmp_rd_rs1_rs2_b18_str) + 80006664: 0009b383 ld x7,0(x19) + 80006668: 01238c63 beq x7,x18,80006680 + 8000666c: 6ac0146f jal x8,80007d18 + 80006670: 80006660 .word 0x80006660 + 80006674: 00000000 .word 0x00000000 + 80006678: 80017ea0 .word 0x80017ea0 + 8000667c: 00000000 .word 0x00000000 + 80006680: 00898993 addi x19,x19,8 + + mv x10, x19 # switch signature pointer register to avoid conflict with test + 80006684: 00098513 addi x10,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0xb60dd1a6243e6d1f + 80006688: 0005b983 ld x19,0(x11) + 8000668c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x53798f97e32a32b9 + 80006690: 0005b983 ld x19,0(x11) + 80006694: 00858593 addi x11,x11,8 + +0000000080006698 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b19: + andn x19, x19, x19 # perform operation + 80006698: 4139f9b3 andn x19,x19,x19 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkb_andn_cg_cmp_rd_rs1_rs2_b19, Zbkb_andn_cg_cmp_rd_rs1_rs2_b19_str) + 8000669c: 00053383 ld x7,0(x10) + 800066a0: 01338c63 beq x7,x19,800066b8 + 800066a4: 6740146f jal x8,80007d18 + 800066a8: 80006698 .word 0x80006698 + 800066ac: 00000000 .word 0x00000000 + 800066b0: 80017edc .word 0x80017edc + 800066b4: 00000000 .word 0x00000000 + 800066b8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x2632faadbd0caa07 + 800066bc: 0005ba03 ld x20,0(x11) + 800066c0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xe58687ce21ba3ecd + 800066c4: 0005ba03 ld x20,0(x11) + 800066c8: 00858593 addi x11,x11,8 + +00000000800066cc : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b20: + andn x20, x20, x20 # perform operation + 800066cc: 414a7a33 andn x20,x20,x20 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zbkb_andn_cg_cmp_rd_rs1_rs2_b20, Zbkb_andn_cg_cmp_rd_rs1_rs2_b20_str) + 800066d0: 00053383 ld x7,0(x10) + 800066d4: 01438c63 beq x7,x20,800066ec + 800066d8: 6400146f jal x8,80007d18 + 800066dc: 800066cc .word 0x800066cc + 800066e0: 00000000 .word 0x00000000 + 800066e4: 80017f18 .word 0x80017f18 + 800066e8: 00000000 .word 0x00000000 + 800066ec: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x28cb463dbdd10bf6 + 800066f0: 0005ba83 ld x21,0(x11) + 800066f4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x791df037fafd0bf0 + 800066f8: 0005ba83 ld x21,0(x11) + 800066fc: 00858593 addi x11,x11,8 + +0000000080006700 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b21: + andn x21, x21, x21 # perform operation + 80006700: 415afab3 andn x21,x21,x21 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zbkb_andn_cg_cmp_rd_rs1_rs2_b21, Zbkb_andn_cg_cmp_rd_rs1_rs2_b21_str) + 80006704: 00053383 ld x7,0(x10) + 80006708: 01538c63 beq x7,x21,80006720 + 8000670c: 60c0146f jal x8,80007d18 + 80006710: 80006700 .word 0x80006700 + 80006714: 00000000 .word 0x00000000 + 80006718: 80017f54 .word 0x80017f54 + 8000671c: 00000000 .word 0x00000000 + 80006720: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x0c742f33a64f6290 + 80006724: 0005bb03 ld x22,0(x11) + 80006728: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x922308a00501e6c6 + 8000672c: 0005bb03 ld x22,0(x11) + 80006730: 00858593 addi x11,x11,8 + +0000000080006734 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b22: + andn x22, x22, x22 # perform operation + 80006734: 416b7b33 andn x22,x22,x22 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_andn_cg_cmp_rd_rs1_rs2_b22, Zbkb_andn_cg_cmp_rd_rs1_rs2_b22_str) + 80006738: 00053383 ld x7,0(x10) + 8000673c: 01638c63 beq x7,x22,80006754 + 80006740: 5d80146f jal x8,80007d18 + 80006744: 80006734 .word 0x80006734 + 80006748: 00000000 .word 0x00000000 + 8000674c: 80017f90 .word 0x80017f90 + 80006750: 00000000 .word 0x00000000 + 80006754: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0xdd85971ec358f34f + 80006758: 0005bb83 ld x23,0(x11) + 8000675c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x0615087c4304aa11 + 80006760: 0005bb83 ld x23,0(x11) + 80006764: 00858593 addi x11,x11,8 + +0000000080006768 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b23: + andn x23, x23, x23 # perform operation + 80006768: 417bfbb3 andn x23,x23,x23 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zbkb_andn_cg_cmp_rd_rs1_rs2_b23, Zbkb_andn_cg_cmp_rd_rs1_rs2_b23_str) + 8000676c: 00053383 ld x7,0(x10) + 80006770: 01738c63 beq x7,x23,80006788 + 80006774: 5a40146f jal x8,80007d18 + 80006778: 80006768 .word 0x80006768 + 8000677c: 00000000 .word 0x00000000 + 80006780: 80017fcc .word 0x80017fcc + 80006784: 00000000 .word 0x00000000 + 80006788: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xf80466aacccae054 + 8000678c: 0005bc03 ld x24,0(x11) + 80006790: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0x72e75e4a8c27ea06 + 80006794: 0005bc03 ld x24,0(x11) + 80006798: 00858593 addi x11,x11,8 + +000000008000679c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b24: + andn x24, x24, x24 # perform operation + 8000679c: 418c7c33 andn x24,x24,x24 + # Check if x24 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x24, Zbkb_andn_cg_cmp_rd_rs1_rs2_b24, Zbkb_andn_cg_cmp_rd_rs1_rs2_b24_str) + 800067a0: 00053383 ld x7,0(x10) + 800067a4: 01838c63 beq x7,x24,800067bc + 800067a8: 5700146f jal x8,80007d18 + 800067ac: 8000679c .word 0x8000679c + 800067b0: 00000000 .word 0x00000000 + 800067b4: 80018008 .word 0x80018008 + 800067b8: 00000000 .word 0x00000000 + 800067bc: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0xbc5bb44ddb2d6ca3 + 800067c0: 0005bc83 ld x25,0(x11) + 800067c4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xbb432f109e0363e1 + 800067c8: 0005bc83 ld x25,0(x11) + 800067cc: 00858593 addi x11,x11,8 + +00000000800067d0 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b25: + andn x25, x25, x25 # perform operation + 800067d0: 419cfcb3 andn x25,x25,x25 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkb_andn_cg_cmp_rd_rs1_rs2_b25, Zbkb_andn_cg_cmp_rd_rs1_rs2_b25_str) + 800067d4: 00053383 ld x7,0(x10) + 800067d8: 01938c63 beq x7,x25,800067f0 + 800067dc: 53c0146f jal x8,80007d18 + 800067e0: 800067d0 .word 0x800067d0 + 800067e4: 00000000 .word 0x00000000 + 800067e8: 80018044 .word 0x80018044 + 800067ec: 00000000 .word 0x00000000 + 800067f0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x7d8cda0f4d41932a + 800067f4: 0005bd03 ld x26,0(x11) + 800067f8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xe7512066e1428157 + 800067fc: 0005bd03 ld x26,0(x11) + 80006800: 00858593 addi x11,x11,8 + +0000000080006804 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b26: + andn x26, x26, x26 # perform operation + 80006804: 41ad7d33 andn x26,x26,x26 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zbkb_andn_cg_cmp_rd_rs1_rs2_b26, Zbkb_andn_cg_cmp_rd_rs1_rs2_b26_str) + 80006808: 00053383 ld x7,0(x10) + 8000680c: 01a38c63 beq x7,x26,80006824 + 80006810: 5080146f jal x8,80007d18 + 80006814: 80006804 .word 0x80006804 + 80006818: 00000000 .word 0x00000000 + 8000681c: 80018080 .word 0x80018080 + 80006820: 00000000 .word 0x00000000 + 80006824: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0xe9f9f9c207605a44 + 80006828: 0005bd83 ld x27,0(x11) + 8000682c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xe38386bb9f18fe70 + 80006830: 0005bd83 ld x27,0(x11) + 80006834: 00858593 addi x11,x11,8 + +0000000080006838 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b27: + andn x27, x27, x27 # perform operation + 80006838: 41bdfdb3 andn x27,x27,x27 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zbkb_andn_cg_cmp_rd_rs1_rs2_b27, Zbkb_andn_cg_cmp_rd_rs1_rs2_b27_str) + 8000683c: 00053383 ld x7,0(x10) + 80006840: 01b38c63 beq x7,x27,80006858 + 80006844: 4d40146f jal x8,80007d18 + 80006848: 80006838 .word 0x80006838 + 8000684c: 00000000 .word 0x00000000 + 80006850: 800180bc .word 0x800180bc + 80006854: 00000000 .word 0x00000000 + 80006858: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xa922d41ce9244b73 + 8000685c: 0005be03 ld x28,0(x11) + 80006860: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0xbc53da90fa1934e8 + 80006864: 0005be03 ld x28,0(x11) + 80006868: 00858593 addi x11,x11,8 + +000000008000686c : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b28: + andn x28, x28, x28 # perform operation + 8000686c: 41ce7e33 andn x28,x28,x28 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zbkb_andn_cg_cmp_rd_rs1_rs2_b28, Zbkb_andn_cg_cmp_rd_rs1_rs2_b28_str) + 80006870: 00053383 ld x7,0(x10) + 80006874: 01c38c63 beq x7,x28,8000688c + 80006878: 4a00146f jal x8,80007d18 + 8000687c: 8000686c .word 0x8000686c + 80006880: 00000000 .word 0x00000000 + 80006884: 800180f8 .word 0x800180f8 + 80006888: 00000000 .word 0x00000000 + 8000688c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x9fa73201544ace5a + 80006890: 0005be83 ld x29,0(x11) + 80006894: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x4aed216b9517ec44 + 80006898: 0005be83 ld x29,0(x11) + 8000689c: 00858593 addi x11,x11,8 + +00000000800068a0 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b29: + andn x29, x29, x29 # perform operation + 800068a0: 41defeb3 andn x29,x29,x29 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_andn_cg_cmp_rd_rs1_rs2_b29, Zbkb_andn_cg_cmp_rd_rs1_rs2_b29_str) + 800068a4: 00053383 ld x7,0(x10) + 800068a8: 01d38c63 beq x7,x29,800068c0 + 800068ac: 46c0146f jal x8,80007d18 + 800068b0: 800068a0 .word 0x800068a0 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 80018134 .word 0x80018134 + 800068bc: 00000000 .word 0x00000000 + 800068c0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x8e87159d2c5e08f3 + 800068c4: 0005bf03 ld x30,0(x11) + 800068c8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xf470efd44ba70e2a + 800068cc: 0005bf03 ld x30,0(x11) + 800068d0: 00858593 addi x11,x11,8 + +00000000800068d4 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b30: + andn x30, x30, x30 # perform operation + 800068d4: 41ef7f33 andn x30,x30,x30 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zbkb_andn_cg_cmp_rd_rs1_rs2_b30, Zbkb_andn_cg_cmp_rd_rs1_rs2_b30_str) + 800068d8: 00053383 ld x7,0(x10) + 800068dc: 01e38c63 beq x7,x30,800068f4 + 800068e0: 4380146f jal x8,80007d18 + 800068e4: 800068d4 .word 0x800068d4 + 800068e8: 00000000 .word 0x00000000 + 800068ec: 80018170 .word 0x80018170 + 800068f0: 00000000 .word 0x00000000 + 800068f4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x61ffa58449b2e9e9 + 800068f8: 0005bf83 ld x31,0(x11) + 800068fc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xee7d9b9b95f73343 + 80006900: 0005bf83 ld x31,0(x11) + 80006904: 00858593 addi x11,x11,8 + +0000000080006908 : +Zbkb_andn_cg_cmp_rd_rs1_rs2_b31: + andn x31, x31, x31 # perform operation + 80006908: 41ffffb3 andn x31,x31,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zbkb_andn_cg_cmp_rd_rs1_rs2_b31, Zbkb_andn_cg_cmp_rd_rs1_rs2_b31_str) + 8000690c: 00053383 ld x7,0(x10) + 80006910: 01f38c63 beq x7,x31,80006928 + 80006914: 4040146f jal x8,80007d18 + 80006918: 80006908 .word 0x80006908 + 8000691c: 00000000 .word 0x00000000 + 80006920: 800181ac .word 0x800181ac + 80006924: 00000000 .word 0x00000000 + 80006928: 00850513 addi x10,x10,8 + + mv x2, x10 # restore signature pointer to default register for teardown + 8000692c: 00050113 addi x2,x10,0 + +0000000080006930 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006930: 00000513 addi x10,x0,0 + 80006934: 00000073 ecall + 80006938: fff00513 addi x10,x0,-1 + 8000693c: 25800413 addi x8,x0,600 + +0000000080006940 : + 80006940: 34002373 csrrs x6,mscratch,x0 + +0000000080006944 : + 80006944: 2b833383 ld x7,696(x6) + +0000000080006948 : + 80006948: 2a033383 ld x7,672(x6) + +000000008000694c : + 8000694c: 2d033483 ld x9,720(x6) + 80006950: 34049073 csrrw x0,mscratch,x9 + +0000000080006954 : + 80006954: 2c833483 ld x9,712(x6) + 80006958: 305493f3 csrrw x7,mtvec,x9 + 8000695c: ffc4f493 andi x9,x9,-4 + 80006960: ffc3f393 andi x7,x7,-4 + 80006964: 00749e63 bne x9,x7,80006980 + +0000000080006968 : + 80006968: 00030493 addi x9,x6,0 + +000000008000696c : + 8000696c: 0004a783 lw x15,0(x9) + 80006970: 00f3a023 sw x15,0(x7) + 80006974: 00438393 addi x7,x7,4 + 80006978: 00448493 addi x9,x9,4 + 8000697c: fe83c8e3 blt x7,x8,8000696c + 80006980: 0000100f fence.i + +0000000080006984 : + 80006984: 00000013 addi x0,x0,0 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 00000497 auipc x9,0x0 + 800069a4: 2b048493 addi x9,x9,688 # 80006c50 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 10e49863 bne x9,x14,80006ad0 + 800069c4: 00000013 addi x0,x0,0 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00012517 auipc x10,0x12 + 800069e4: f2e50513 addi x10,x10,-210 # 8001890e + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00033097 auipc x1,0x33 + 80006a04: ba4080e7 jalr x1,-1116(x1) # 800395a4 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00012517 auipc x10,0x12 + 80006a24: f2750513 addi x10,x10,-217 # 80018947 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00033097 auipc x1,0x33 + 80006a44: b64080e7 jalr x1,-1180(x1) # 800395a4 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00012517 auipc x10,0x12 + 80006a64: f4750513 addi x10,x10,-185 # 800189a7 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00033097 auipc x1,0x33 + 80006a84: b24080e7 jalr x1,-1244(x1) # 800395a4 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00013517 auipc x10,0x13 + 80006aa4: ab250513 addi x10,x10,-1358 # 80019552 + 80006aa8: 00000013 addi x0,x0,0 + 80006aac: 00000013 addi x0,x0,0 + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00033097 auipc x1,0x33 + 80006ac4: ae4080e7 jalr x1,-1308(x1) # 800395a4 + 80006ac8: 00033097 auipc x1,0x33 + 80006acc: b3c080e7 jalr x1,-1220(x1) # 80039604 + +0000000080006ad0 : + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00006317 auipc x6,0x6 + 80006ae4: 8c830313 addi x6,x6,-1848 # 8000c3a8 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00033303 ld x6,0(x6) + 80006b04: 00000013 addi x0,x0,0 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 00014397 auipc x7,0x14 + 80006b24: 52038393 addi x7,x7,1312 # 8001b040 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 40730333 sub x6,x6,x7 + 80006b44: 00000013 addi x0,x0,0 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00014417 auipc x8,0x14 + 80006b64: 4d040413 addi x8,x8,1232 # 8001b030 + 80006b68: 00000013 addi x0,x0,0 + 80006b6c: 00000013 addi x0,x0,0 + 80006b70: 00000013 addi x0,x0,0 + 80006b74: 00000013 addi x0,x0,0 + 80006b78: 00000013 addi x0,x0,0 + 80006b7c: 00000013 addi x0,x0,0 + 80006b80: 00043203 ld x4,0(x8) + 80006b84: 00620c63 beq x4,x6,80006b9c + 80006b88: 1e0013ef jal x7,80007d68 + 80006b8c: 80006ad0 .word 0x80006ad0 + 80006b90: 00000000 .word 0x00000000 + 80006b94: 80018afb .word 0x80018afb + 80006b98: 00000000 .word 0x00000000 + +0000000080006b9c : + 80006b9c: 000004b7 lui x9,0x0 + 80006ba0: 00048493 addi x9,x9,0 # 0 + 80006ba4: 00b49493 slli x9,x9,0xb + 80006ba8: 5d648493 addi x9,x9,1494 + 80006bac: 00b49493 slli x9,x9,0xb + 80006bb0: 43748493 addi x9,x9,1079 + 80006bb4: 00a49493 slli x9,x9,0xa + 80006bb8: 2ad48493 addi x9,x9,685 + 80006bbc: 00e49e63 bne x9,x14,80006bd8 + 80006bc0: 1a8013ef jal x7,80007d68 + 80006bc4: 80006c84 .word 0x80006c84 + 80006bc8: 00000000 .word 0x00000000 + 80006bcc: 80018969 .word 0x80018969 + 80006bd0: 00000000 .word 0x00000000 + 80006bd4: 00000341 .word 0x00000341 + +0000000080006bd8 : + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00012517 auipc x10,0x12 + 80006be4: cf450513 addi x10,x10,-780 # 800188d4 + 80006be8: 00000013 addi x0,x0,0 + 80006bec: 00000013 addi x0,x0,0 + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00033097 auipc x1,0x33 + 80006c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80006c08: 00033097 auipc x1,0x33 + 80006c0c: 9dc080e7 jalr x1,-1572(x1) # 800395e4 + +0000000080006c10 : + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00012517 auipc x10,0x12 + 80006c24: cee50513 addi x10,x10,-786 # 8001890e + 80006c28: 00000013 addi x0,x0,0 + 80006c2c: 00000013 addi x0,x0,0 + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00033097 auipc x1,0x33 + 80006c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80006c48: 00033097 auipc x1,0x33 + 80006c4c: 9bc080e7 jalr x1,-1604(x1) # 80039604 + +0000000080006c50 : + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: 00000717 auipc x14,0x0 + 80006c64: ff070713 addi x14,x14,-16 # 80006c50 + 80006c68: 00000013 addi x0,x0,0 + 80006c6c: 00000013 addi x0,x0,0 + 80006c70: 00000013 addi x0,x0,0 + 80006c74: 00000013 addi x0,x0,0 + 80006c78: 00000013 addi x0,x0,0 + 80006c7c: 00000013 addi x0,x0,0 + 80006c80: cb1ff06f jal x0,80006930 + +0000000080006c84 : + 80006c84: 00000737 lui x14,0x0 + 80006c88: 00070713 addi x14,x14,0 # 0 + 80006c8c: 00b71713 slli x14,x14,0xb + 80006c90: 5d670713 addi x14,x14,1494 + 80006c94: 00b71713 slli x14,x14,0xb + 80006c98: 43770713 addi x14,x14,1079 + 80006c9c: 00a71713 slli x14,x14,0xa + 80006ca0: 2ad70713 addi x14,x14,685 + 80006ca4: c8dff06f jal x0,80006930 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: aa430313 addi x6,x6,-1372 # 80006984 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: ea950513 addi x10,x10,-343 # 80019f89 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 23850513 addi x10,x10,568 # 80018358 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: 8b050513 addi x10,x10,-1872 # 80018a10 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00011517 auipc x10,0x11 + 800071a4: 76e50513 addi x10,x10,1902 # 8001890e + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: d9848493 addi x9,x9,-616 # 80018338 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: f2840413 addi x8,x8,-216 # 80038508 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e4946663 bltu x8,x9,80006c50 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018b12 .word 0x80018b12 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018c14 .word 0x80018c14 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d2f47a63 bgeu x8,x15,80006c84 + 80007754: d2746863 bltu x8,x7,80006c84 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018d0f .word 0x80018d0f + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80018e02 .word 0x80018e02 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80018f75 .word 0x80018f75 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bfcff06f jal x0,80006c84 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 4f020213 addi x4,x4,1264 # 800181f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 4d838393 addi x7,x7,1240 # 800181f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 4b068693 addi x13,x13,1200 # 800181f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 48848493 addi x9,x9,1160 # 800181f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 3e44a483 lw x9,996(x9) # 800181f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 11040413 addi x8,x8,272 # 80019fd0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00030417 auipc x8,0x30 + 80007f04: 61040413 addi x8,x8,1552 # 80038510 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 3d848493 addi x9,x9,984 # 80018318 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 39848493 addi x9,x9,920 # 80018318 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 36c80813 addi x16,x16,876 # 80018328 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 34c80813 addi x16,x16,844 # 80018328 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: b1338393 addi x7,x7,-1261 # 80018afb + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 32880813 addi x16,x16,808 # 80018320 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: b0e38393 addi x7,x7,-1266 # 80018b12 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: bf838393 addi x7,x7,-1032 # 80018c14 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: cdb38393 addi x7,x7,-805 # 80018d0f + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: db638393 addi x7,x7,-586 # 80018e02 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: f1138393 addi x7,x7,-239 # 80018f75 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: e7d38393 addi x7,x7,-387 # 80018ef9 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: ea338393 addi x7,x7,-349 # 80018f37 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: aa638393 addi x7,x7,-1370 # 80018b52 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: b8e38393 addi x7,x7,-1138 # 80018c52 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: c6f38393 addi x7,x7,-913 # 80018d4b + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: d4b38393 addi x7,x7,-693 # 80018e3f + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: ea438393 addi x7,x7,-348 # 80018fb0 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: a6e38393 addi x7,x7,-1426 # 80018b92 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: b5438393 addi x7,x7,-1196 # 80018c90 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: c3338393 addi x7,x7,-973 # 80018d87 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: d1038393 addi x7,x7,-752 # 80018e7c + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: e6738393 addi x7,x7,-409 # 80018feb + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: a3738393 addi x7,x7,-1481 # 80018bd3 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: b1b38393 addi x7,x7,-1253 # 80018ccf + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: bf838393 addi x7,x7,-1032 # 80018dc4 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: cd638393 addi x7,x7,-810 # 80018eba + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: e2b38393 addi x7,x7,-469 # 80019027 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: e5038393 addi x7,x7,-432 # 80019064 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: e8738393 addi x7,x7,-377 # 800190b3 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: f6a38393 addi x7,x7,-150 # 800191ae + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 04e38393 addi x7,x7,78 # 800192aa + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 0a480813 addi x16,x16,164 # 80018320 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 09480813 addi x16,x16,148 # 80018320 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 08c80813 addi x16,x16,140 # 80018324 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 07880813 addi x16,x16,120 # 80018320 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00010517 auipc x10,0x10 + 80008304: 60e50513 addi x10,x10,1550 # 8001890e + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00010517 auipc x10,0x10 + 80008344: 60750513 addi x10,x10,1543 # 80018947 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00010517 auipc x10,0x10 + 80008384: 67e50513 addi x10,x10,1662 # 800189fe + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: f6853503 ld x10,-152(x10) # 80018310 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00010517 auipc x10,0x10 + 800083c4: 65050513 addi x10,x10,1616 # 80018a10 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: e0852503 lw x10,-504(x10) # 800181f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00010517 auipc x10,0x10 + 80008404: 61250513 addi x10,x10,1554 # 80018a12 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: ec852503 lw x10,-312(x10) # 800182f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: ef850513 addi x10,x10,-264 # 80018358 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 58650513 addi x10,x10,1414 # 80018a26 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: e3053503 ld x10,-464(x10) # 800182f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: e7850513 addi x10,x10,-392 # 80018358 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: f3d50513 addi x10,x10,-195 # 8001945d + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: ca852503 lw x10,-856(x10) # 800181f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: df860613 addi x12,x12,-520 # 80018358 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: d6c52503 lw x10,-660(x10) # 800182f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: fb350513 addi x10,x10,-77 # 80019573 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: d5860613 addi x12,x12,-680 # 80018358 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: ccc52503 lw x10,-820(x10) # 800182f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: d1860613 addi x12,x12,-744 # 80018358 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: c8c52503 lw x10,-884(x10) # 800182f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: dd650513 addi x10,x10,-554 # 80019456 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: c9850513 addi x10,x10,-872 # 80018358 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: d6e50513 addi x10,x10,-658 # 8001946e + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: ac852503 lw x10,-1336(x10) # 800181f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: bc853503 ld x10,-1080(x10) # 80018300 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: bb453503 ld x10,-1100(x10) # 80018300 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: bf850513 addi x10,x10,-1032 # 80018358 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: b9052503 lw x10,-1136(x10) # 80018318 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ce550513 addi x10,x10,-795 # 80019485 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: a2852503 lw x10,-1496(x10) # 800181f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: b3053503 ld x10,-1232(x10) # 80018308 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: b1c53503 ld x10,-1252(x10) # 80018308 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: b5850513 addi x10,x10,-1192 # 80018358 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: c5c50513 addi x10,x10,-932 # 8001949c + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: aa053503 ld x10,-1376(x10) # 80018308 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: ad850513 addi x10,x10,-1320 # 80018358 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: c3a50513 addi x10,x10,-966 # 800194fa + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: a2053503 ld x10,-1504(x10) # 80018308 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: a5850513 addi x10,x10,-1448 # 80018358 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: 9f442403 lw x8,-1548(x8) # 80018320 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: c5f50513 addi x10,x10,-929 # 8001959f + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: c4b50513 addi x10,x10,-949 # 800195cb + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: 98080813 addi x16,x16,-1664 # 80018328 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 05050513 addi x10,x10,80 # 80018a10 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: bdb50513 addi x10,x10,-1061 # 800195db + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: 8e053503 ld x10,-1824(x10) # 80018308 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: 91850513 addi x10,x10,-1768 # 80018358 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: b8650513 addi x10,x10,-1146 # 80019606 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: 85853503 ld x10,-1960(x10) # 80018300 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: 89850513 addi x10,x10,-1896 # 80018358 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: 81833303 ld x6,-2024(x6) # 80018300 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: 8183b383 ld x7,-2024(x7) # 80018308 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: b3550513 addi x10,x10,-1227 # 80019635 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: b5d50513 addi x10,x10,-1187 # 8001969d + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 0000f317 auipc x6,0xf + 80008b6c: 79833303 ld x6,1944(x6) # 80018300 + 80008b70: 0000f397 auipc x7,0xf + 80008b74: 7983b383 ld x7,1944(x7) # 80018308 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 0000f517 auipc x10,0xf + 80008ba4: 7b850513 addi x10,x10,1976 # 80018358 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ae450513 addi x10,x10,-1308 # 800196c4 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: a4150513 addi x10,x10,-1471 # 80019661 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: a3d50513 addi x10,x10,-1475 # 8001969d + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 0000f317 auipc x6,0xf + 80008c8c: 68033303 ld x6,1664(x6) # 80018308 + 80008c90: 0000f397 auipc x7,0xf + 80008c94: 6703b383 ld x7,1648(x7) # 80018300 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 0000f517 auipc x10,0xf + 80008cc4: 69850513 addi x10,x10,1688 # 80018358 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: aac50513 addi x10,x10,-1364 # 800197ac + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: b5350513 addi x10,x10,-1197 # 80019893 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 5bc52503 lw x10,1468(x10) # 80018324 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: b2f50513 addi x10,x10,-1233 # 800198cf + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: acd50513 addi x10,x10,-1331 # 800198ad + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: a9550513 addi x10,x10,-1387 # 800198b5 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: a5d50513 addi x10,x10,-1443 # 800198bd + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: a2650513 addi x10,x10,-1498 # 800198c6 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: 9f850513 addi x10,x10,-1544 # 800198d8 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 41852503 lw x10,1048(x10) # 80018320 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: acf50513 addi x10,x10,-1329 # 80019a2f + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: 95250513 addi x10,x10,-1710 # 800198f2 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: 94350513 addi x10,x10,-1725 # 80019923 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: 92350513 addi x10,x10,-1757 # 80019943 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: 90150513 addi x10,x10,-1791 # 80019961 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: 8e050513 addi x10,x10,-1824 # 80019980 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: 8c850513 addi x10,x10,-1848 # 800199a8 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: 8b450513 addi x10,x10,-1868 # 800199d4 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: 8a050513 addi x10,x10,-1888 # 80019a00 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: 89e50513 addi x10,x10,-1890 # 80019a3e + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 14053503 ld x10,320(x10) # 80018308 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 17850513 addi x10,x10,376 # 80018358 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: 83550513 addi x10,x10,-1995 # 80019a55 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 0b853503 ld x10,184(x10) # 80018300 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 0f850513 addi x10,x10,248 # 80018358 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 09852503 lw x10,152(x10) # 80018320 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00010517 auipc x10,0x10 + 800092a4: 7cc50513 addi x10,x10,1996 # 80019a6c + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 04053503 ld x10,64(x10) # 80018308 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00010517 auipc x10,0x10 + 800092e4: 7a350513 addi x10,x10,1955 # 80019a83 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: ff853503 ld x10,-8(x10) # 80018300 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: ffc52503 lw x10,-4(x10) # 80018320 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00010517 auipc x10,0x10 + 80009344: 7b950513 addi x10,x10,1977 # 80019af9 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: 84f50513 addi x10,x10,-1969 # 80019bcf + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: 90250513 addi x10,x10,-1790 # 80019cc2 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: 9bd50513 addi x10,x10,-1603 # 80019dbd + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: a6450513 addi x10,x10,-1436 # 80019ea4 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00010517 auipc x10,0x10 + 80009484: 63150513 addi x10,x10,1585 # 80019ab1 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: e9063603 ld x12,-368(x12) # 80018338 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 5da50513 addi x10,x10,1498 # 80018a9a + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: e3850513 addi x10,x10,-456 # 80018358 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: e2058593 addi x11,x11,-480 # 80018380 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: eb058593 addi x11,x11,-336 # 80018440 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 2fe50513 addi x10,x10,766 # 800188be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: f5250513 addi x10,x10,-174 # 80019552 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: d0060613 addi x12,x12,-768 # 80018330 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 47b50513 addi x10,x10,1147 # 80018abb + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: cd053503 ld x10,-816(x10) # 80018338 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: cd850513 addi x10,x10,-808 # 80018358 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 40b50513 addi x10,x10,1035 # 80018acb + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: c5853503 ld x10,-936(x10) # 80018340 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: c5850513 addi x10,x10,-936 # 80018358 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 39b50513 addi x10,x10,923 # 80018adb + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: be053503 ld x10,-1056(x10) # 80018348 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: bd850513 addi x10,x10,-1064 # 80018358 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 32b50513 addi x10,x10,811 # 80018aeb + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: b6853503 ld x10,-1176(x10) # 80018350 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: b5850513 addi x10,x10,-1192 # 80018358 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: b0860613 addi x12,x12,-1272 # 80018330 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: b1860613 addi x12,x12,-1256 # 80018358 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89830313 addi x6,x6,-1896 # 80006930 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 88030313 addi x6,x6,-1920 # 80006930 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86830313 addi x6,x6,-1944 # 80006930 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 70078793 addi x15,x15,1792 # 80006940 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: af010113 addi x2,x2,-1296 # 80019fd0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001957b .word 0x8001957b + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 01828293 addi x5,x5,24 # 80038600 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: ff828293 addi x5,x5,-8 # 80038600 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-brev8-00.elf.objdump b/riscv-tests/rv64-Zbkb-brev8-00.elf.objdump new file mode 100644 index 0000000..316cc76 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-brev8-00.elf.objdump @@ -0,0 +1,6679 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-brev8-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-brev8-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000216a0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029700 0000000080029700 00027700 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008e4 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 0000000000000000 0000000000000000 00028f9f 2**0 + CONTENTS, READONLY, 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.text.rvtest 0000000000000000 rvtest_code_end +0000000080000040 g .text.rvtest 0000000000000000 rvtest_code_begin +000000008000bde0 g .data 0000000000000000 rvtest_sig_begin +0000000080008470 g .data 0000000000000000 rvtest_data_begin +0000000080008110 g .data 0000000000000000 Mtramptbl_sv +000000008000bddf g .data 0000000000000000 rvtest_data_end +00000000800013ec g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029800 g .tohost 0000000000000000 fromhost +0000000080029700 g .tohost 0000000000000000 tohost +00000000800016b0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7c9c0d76157629eb + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zbkb_brev8_cg_cp_rs1_b0: + brev8 x26, x0 # perform operation + 80000048: 68705d13 brev8 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_brev8_cg_cp_rs1_b0, Zbkb_brev8_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01a20c63 beq x4,x26,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xa66c581723880b2a + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zbkb_brev8_cg_cp_rs1_b1: + brev8 x11, x1 # perform operation + 80000074: 6870d593 brev8 x11,x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_brev8_cg_cp_rs1_b1, Zbkb_brev8_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00b20c63 beq x4,x11,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008822 .word 0x80008822 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x9, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010493 addi x9,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x18ee54c90aa26348 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zbkb_brev8_cg_cp_rs1_b2: + brev8 x19, x2 # perform operation + 800000a4: 68715993 brev8 x19,x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_brev8_cg_cp_rs1_b2, Zbkb_brev8_cg_cp_rs1_b2_str) + 800000a8: 0004b203 ld x4,0(x9) + 800000ac: 01320c63 beq x4,x19,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008854 .word 0x80008854 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00848493 addi x9,x9,8 + + mv x31, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018f93 addi x31,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0x9420627bc32ab1eb + 800000cc: 000fb183 ld x3,0(x31) + 800000d0: 008f8f93 addi x31,x31,8 + +00000000800000d4 : +Zbkb_brev8_cg_cp_rs1_b3: + brev8 x0, x3 # perform operation + 800000d4: 6871d013 brev8 x0,x3 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkb_brev8_cg_cp_rs1_b3, Zbkb_brev8_cg_cp_rs1_b3_str) + 800000d8: 0004b203 ld x4,0(x9) + 800000dc: 00020c63 beq x4,x0,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008886 .word 0x80008886 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00848493 addi x9,x9,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0x7d5fe551a852fde9 + 80000100: 000fb203 ld x4,0(x31) + 80000104: 008f8f93 addi x31,x31,8 + +0000000080000108 : +Zbkb_brev8_cg_cp_rs1_b4: + brev8 x11, x4 # perform operation + 80000108: 68725593 brev8 x11,x4 + # Check if x11 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x11, Zbkb_brev8_cg_cp_rs1_b4, Zbkb_brev8_cg_cp_rs1_b4_str) + 8000010c: 0004b683 ld x13,0(x9) + 80000110: 00b68c63 beq x13,x11,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088b8 .word 0x800088b8 + 80000124: 00000000 .word 0x00000000 + 80000128: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x30fa2080c058e73c + 8000012c: 000fb283 ld x5,0(x31) + 80000130: 008f8f93 addi x31,x31,8 + +0000000080000134 : +Zbkb_brev8_cg_cp_rs1_b5: + brev8 x1, x5 # perform operation + 80000134: 6872d093 brev8 x1,x5 + # Check if x1 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x1, Zbkb_brev8_cg_cp_rs1_b5, Zbkb_brev8_cg_cp_rs1_b5_str) + 80000138: 0004b683 ld x13,0(x9) + 8000013c: 00168c63 beq x13,x1,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 800088ea .word 0x800088ea + 80000150: 00000000 .word 0x00000000 + 80000154: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xb7d3e44ac61f30f9 + 80000158: 000fb303 ld x6,0(x31) + 8000015c: 008f8f93 addi x31,x31,8 + +0000000080000160 : +Zbkb_brev8_cg_cp_rs1_b6: + brev8 x7, x6 # perform operation + 80000160: 68735393 brev8 x7,x6 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkb_brev8_cg_cp_rs1_b6, Zbkb_brev8_cg_cp_rs1_b6_str) + 80000164: 0004b683 ld x13,0(x9) + 80000168: 00768c63 beq x13,x7,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000891c .word 0x8000891c + 8000017c: 00000000 .word 0x00000000 + 80000180: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x7de5ad571979c7a4 + 80000184: 000fb383 ld x7,0(x31) + 80000188: 008f8f93 addi x31,x31,8 + +000000008000018c : +Zbkb_brev8_cg_cp_rs1_b7: + brev8 x21, x7 # perform operation + 8000018c: 6873da93 brev8 x21,x7 + # Check if x21 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x21, Zbkb_brev8_cg_cp_rs1_b7, Zbkb_brev8_cg_cp_rs1_b7_str) + 80000190: 0004b683 ld x13,0(x9) + 80000194: 01568c63 beq x13,x21,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 8000894e .word 0x8000894e + 800001a8: 00000000 .word 0x00000000 + 800001ac: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x96fb5a89a792d21f + 800001b0: 000fb403 ld x8,0(x31) + 800001b4: 008f8f93 addi x31,x31,8 + +00000000800001b8 : +Zbkb_brev8_cg_cp_rs1_b8: + brev8 x2, x8 # perform operation + 800001b8: 68745113 brev8 x2,x8 + # Check if x2 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x2, Zbkb_brev8_cg_cp_rs1_b8, Zbkb_brev8_cg_cp_rs1_b8_str) + 800001bc: 0004b683 ld x13,0(x9) + 800001c0: 00268c63 beq x13,x2,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 80008980 .word 0x80008980 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 00848493 addi x9,x9,8 + + mv x27, x9 # switch signature pointer register to avoid conflict with test + 800001dc: 00048d93 addi x27,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x3dbd3277ade6943a + 800001e0: 000fb483 ld x9,0(x31) + 800001e4: 008f8f93 addi x31,x31,8 + +00000000800001e8 : +Zbkb_brev8_cg_cp_rs1_b9: + brev8 x29, x9 # perform operation + 800001e8: 6874de93 brev8 x29,x9 + # Check if x29 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x29, Zbkb_brev8_cg_cp_rs1_b9, Zbkb_brev8_cg_cp_rs1_b9_str) + 800001ec: 000db683 ld x13,0(x27) + 800001f0: 01d68c63 beq x13,x29,80000208 + 800001f4: 60c0276f jal x14,80002800 + 800001f8: 800001e8 .word 0x800001e8 + 800001fc: 00000000 .word 0x00000000 + 80000200: 800089b2 .word 0x800089b2 + 80000204: 00000000 .word 0x00000000 + 80000208: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xce64c80c91520349 + 8000020c: 000fb503 ld x10,0(x31) + 80000210: 008f8f93 addi x31,x31,8 + +0000000080000214 : +Zbkb_brev8_cg_cp_rs1_b10: + brev8 x17, x10 # perform operation + 80000214: 68755893 brev8 x17,x10 + # Check if x17 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x17, Zbkb_brev8_cg_cp_rs1_b10, Zbkb_brev8_cg_cp_rs1_b10_str) + 80000218: 000db683 ld x13,0(x27) + 8000021c: 01168c63 beq x13,x17,80000234 + 80000220: 5e00276f jal x14,80002800 + 80000224: 80000214 .word 0x80000214 + 80000228: 00000000 .word 0x00000000 + 8000022c: 800089e5 .word 0x800089e5 + 80000230: 00000000 .word 0x00000000 + 80000234: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0xd457354ad6b98dd5 + 80000238: 000fb583 ld x11,0(x31) + 8000023c: 008f8f93 addi x31,x31,8 + +0000000080000240 : +Zbkb_brev8_cg_cp_rs1_b11: + brev8 x10, x11 # perform operation + 80000240: 6875d513 brev8 x10,x11 + # Check if x10 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x10, Zbkb_brev8_cg_cp_rs1_b11, Zbkb_brev8_cg_cp_rs1_b11_str) + 80000244: 000db683 ld x13,0(x27) + 80000248: 00a68c63 beq x13,x10,80000260 + 8000024c: 5b40276f jal x14,80002800 + 80000250: 80000240 .word 0x80000240 + 80000254: 00000000 .word 0x00000000 + 80000258: 80008a19 .word 0x80008a19 + 8000025c: 00000000 .word 0x00000000 + 80000260: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0xcfd2fd3e09b7b29f + 80000264: 000fb603 ld x12,0(x31) + 80000268: 008f8f93 addi x31,x31,8 + +000000008000026c : +Zbkb_brev8_cg_cp_rs1_b12: + brev8 x1, x12 # perform operation + 8000026c: 68765093 brev8 x1,x12 + # Check if x1 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x1, Zbkb_brev8_cg_cp_rs1_b12, Zbkb_brev8_cg_cp_rs1_b12_str) + 80000270: 000db683 ld x13,0(x27) + 80000274: 00168c63 beq x13,x1,8000028c + 80000278: 5880276f jal x14,80002800 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 80008a4d .word 0x80008a4d + 80000288: 00000000 .word 0x00000000 + 8000028c: 008d8d93 addi x27,x27,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000290: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000294: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xee52321fab4ead8a + 80000298: 000fb683 ld x13,0(x31) + 8000029c: 008f8f93 addi x31,x31,8 + +00000000800002a0 : +Zbkb_brev8_cg_cp_rs1_b13: + brev8 x21, x13 # perform operation + 800002a0: 6876da93 brev8 x21,x13 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkb_brev8_cg_cp_rs1_b13, Zbkb_brev8_cg_cp_rs1_b13_str) + 800002a4: 000db203 ld x4,0(x27) + 800002a8: 01520c63 beq x4,x21,800002c0 + 800002ac: 514022ef jal x5,800027c0 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 80008a81 .word 0x80008a81 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0xbaba30b1b78f686d + 800002c4: 000fb703 ld x14,0(x31) + 800002c8: 008f8f93 addi x31,x31,8 + +00000000800002cc : +Zbkb_brev8_cg_cp_rs1_b14: + brev8 x12, x14 # perform operation + 800002cc: 68775613 brev8 x12,x14 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zbkb_brev8_cg_cp_rs1_b14, Zbkb_brev8_cg_cp_rs1_b14_str) + 800002d0: 000db203 ld x4,0(x27) + 800002d4: 00c20c63 beq x4,x12,800002ec + 800002d8: 4e8022ef jal x5,800027c0 + 800002dc: 800002cc .word 0x800002cc + 800002e0: 00000000 .word 0x00000000 + 800002e4: 80008ab5 .word 0x80008ab5 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xa11118218339a49c + 800002f0: 000fb783 ld x15,0(x31) + 800002f4: 008f8f93 addi x31,x31,8 + +00000000800002f8 : +Zbkb_brev8_cg_cp_rs1_b15: + brev8 x2, x15 # perform operation + 800002f8: 6877d113 brev8 x2,x15 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkb_brev8_cg_cp_rs1_b15, Zbkb_brev8_cg_cp_rs1_b15_str) + 800002fc: 000db203 ld x4,0(x27) + 80000300: 00220c63 beq x4,x2,80000318 + 80000304: 4bc022ef jal x5,800027c0 + 80000308: 800002f8 .word 0x800002f8 + 8000030c: 00000000 .word 0x00000000 + 80000310: 80008ae9 .word 0x80008ae9 + 80000314: 00000000 .word 0x00000000 + 80000318: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x394a2320721a7536 + 8000031c: 000fb803 ld x16,0(x31) + 80000320: 008f8f93 addi x31,x31,8 + +0000000080000324 : +Zbkb_brev8_cg_cp_rs1_b16: + brev8 x21, x16 # perform operation + 80000324: 68785a93 brev8 x21,x16 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkb_brev8_cg_cp_rs1_b16, Zbkb_brev8_cg_cp_rs1_b16_str) + 80000328: 000db203 ld x4,0(x27) + 8000032c: 01520c63 beq x4,x21,80000344 + 80000330: 490022ef jal x5,800027c0 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b1d .word 0x80008b1d + 80000340: 00000000 .word 0x00000000 + 80000344: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x44db20b3f5e41f0d + 80000348: 000fb883 ld x17,0(x31) + 8000034c: 008f8f93 addi x31,x31,8 + +0000000080000350 : +Zbkb_brev8_cg_cp_rs1_b17: + brev8 x11, x17 # perform operation + 80000350: 6878d593 brev8 x11,x17 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_brev8_cg_cp_rs1_b17, Zbkb_brev8_cg_cp_rs1_b17_str) + 80000354: 000db203 ld x4,0(x27) + 80000358: 00b20c63 beq x4,x11,80000370 + 8000035c: 464022ef jal x5,800027c0 + 80000360: 80000350 .word 0x80000350 + 80000364: 00000000 .word 0x00000000 + 80000368: 80008b51 .word 0x80008b51 + 8000036c: 00000000 .word 0x00000000 + 80000370: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x1bfa8e3f985330e0 + 80000374: 000fb903 ld x18,0(x31) + 80000378: 008f8f93 addi x31,x31,8 + +000000008000037c : +Zbkb_brev8_cg_cp_rs1_b18: + brev8 x15, x18 # perform operation + 8000037c: 68795793 brev8 x15,x18 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zbkb_brev8_cg_cp_rs1_b18, Zbkb_brev8_cg_cp_rs1_b18_str) + 80000380: 000db203 ld x4,0(x27) + 80000384: 00f20c63 beq x4,x15,8000039c + 80000388: 438022ef jal x5,800027c0 + 8000038c: 8000037c .word 0x8000037c + 80000390: 00000000 .word 0x00000000 + 80000394: 80008b85 .word 0x80008b85 + 80000398: 00000000 .word 0x00000000 + 8000039c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x73a602cdf93c2bde + 800003a0: 000fb983 ld x19,0(x31) + 800003a4: 008f8f93 addi x31,x31,8 + +00000000800003a8 : +Zbkb_brev8_cg_cp_rs1_b19: + brev8 x29, x19 # perform operation + 800003a8: 6879de93 brev8 x29,x19 + # Check if x29 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x29, Zbkb_brev8_cg_cp_rs1_b19, Zbkb_brev8_cg_cp_rs1_b19_str) + 800003ac: 000db203 ld x4,0(x27) + 800003b0: 01d20c63 beq x4,x29,800003c8 + 800003b4: 40c022ef jal x5,800027c0 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 80008bb9 .word 0x80008bb9 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xd6cac6044d23546b + 800003cc: 000fba03 ld x20,0(x31) + 800003d0: 008f8f93 addi x31,x31,8 + +00000000800003d4 : +Zbkb_brev8_cg_cp_rs1_b20: + brev8 x3, x20 # perform operation + 800003d4: 687a5193 brev8 x3,x20 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkb_brev8_cg_cp_rs1_b20, Zbkb_brev8_cg_cp_rs1_b20_str) + 800003d8: 000db203 ld x4,0(x27) + 800003dc: 00320c63 beq x4,x3,800003f4 + 800003e0: 3e0022ef jal x5,800027c0 + 800003e4: 800003d4 .word 0x800003d4 + 800003e8: 00000000 .word 0x00000000 + 800003ec: 80008bed .word 0x80008bed + 800003f0: 00000000 .word 0x00000000 + 800003f4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xc0053a1f43f191c7 + 800003f8: 000fba83 ld x21,0(x31) + 800003fc: 008f8f93 addi x31,x31,8 + +0000000080000400 : +Zbkb_brev8_cg_cp_rs1_b21: + brev8 x11, x21 # perform operation + 80000400: 687ad593 brev8 x11,x21 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_brev8_cg_cp_rs1_b21, Zbkb_brev8_cg_cp_rs1_b21_str) + 80000404: 000db203 ld x4,0(x27) + 80000408: 00b20c63 beq x4,x11,80000420 + 8000040c: 3b4022ef jal x5,800027c0 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c21 .word 0x80008c21 + 8000041c: 00000000 .word 0x00000000 + 80000420: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xedb834ce1c717604 + 80000424: 000fbb03 ld x22,0(x31) + 80000428: 008f8f93 addi x31,x31,8 + +000000008000042c : +Zbkb_brev8_cg_cp_rs1_b22: + brev8 x7, x22 # perform operation + 8000042c: 687b5393 brev8 x7,x22 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkb_brev8_cg_cp_rs1_b22, Zbkb_brev8_cg_cp_rs1_b22_str) + 80000430: 000db203 ld x4,0(x27) + 80000434: 00720c63 beq x4,x7,8000044c + 80000438: 388022ef jal x5,800027c0 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008c55 .word 0x80008c55 + 80000448: 00000000 .word 0x00000000 + 8000044c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x9663f2a19fc4c2de + 80000450: 000fbb83 ld x23,0(x31) + 80000454: 008f8f93 addi x31,x31,8 + +0000000080000458 : +Zbkb_brev8_cg_cp_rs1_b23: + brev8 x10, x23 # perform operation + 80000458: 687bd513 brev8 x10,x23 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkb_brev8_cg_cp_rs1_b23, Zbkb_brev8_cg_cp_rs1_b23_str) + 8000045c: 000db203 ld x4,0(x27) + 80000460: 00a20c63 beq x4,x10,80000478 + 80000464: 35c022ef jal x5,800027c0 + 80000468: 80000458 .word 0x80000458 + 8000046c: 00000000 .word 0x00000000 + 80000470: 80008c89 .word 0x80008c89 + 80000474: 00000000 .word 0x00000000 + 80000478: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x130a79e70f49f73e + 8000047c: 000fbc03 ld x24,0(x31) + 80000480: 008f8f93 addi x31,x31,8 + +0000000080000484 : +Zbkb_brev8_cg_cp_rs1_b24: + brev8 x17, x24 # perform operation + 80000484: 687c5893 brev8 x17,x24 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_brev8_cg_cp_rs1_b24, Zbkb_brev8_cg_cp_rs1_b24_str) + 80000488: 000db203 ld x4,0(x27) + 8000048c: 01120c63 beq x4,x17,800004a4 + 80000490: 330022ef jal x5,800027c0 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 80008cbd .word 0x80008cbd + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x8cc35ac6ead5805d + 800004a8: 000fbc83 ld x25,0(x31) + 800004ac: 008f8f93 addi x31,x31,8 + +00000000800004b0 : +Zbkb_brev8_cg_cp_rs1_b25: + brev8 x6, x25 # perform operation + 800004b0: 687cd313 brev8 x6,x25 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkb_brev8_cg_cp_rs1_b25, Zbkb_brev8_cg_cp_rs1_b25_str) + 800004b4: 000db203 ld x4,0(x27) + 800004b8: 00620c63 beq x4,x6,800004d0 + 800004bc: 304022ef jal x5,800027c0 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 80008cf1 .word 0x80008cf1 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x50155c4d742bd176 + 800004d4: 000fbd03 ld x26,0(x31) + 800004d8: 008f8f93 addi x31,x31,8 + +00000000800004dc : +Zbkb_brev8_cg_cp_rs1_b26: + brev8 x6, x26 # perform operation + 800004dc: 687d5313 brev8 x6,x26 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkb_brev8_cg_cp_rs1_b26, Zbkb_brev8_cg_cp_rs1_b26_str) + 800004e0: 000db203 ld x4,0(x27) + 800004e4: 00620c63 beq x4,x6,800004fc + 800004e8: 2d8022ef jal x5,800027c0 + 800004ec: 800004dc .word 0x800004dc + 800004f0: 00000000 .word 0x00000000 + 800004f4: 80008d25 .word 0x80008d25 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 008d8d93 addi x27,x27,8 + + mv x15, x27 # switch signature pointer register to avoid conflict with test + 80000500: 000d8793 addi x15,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xf1da6b42323afe5c + 80000504: 000fbd83 ld x27,0(x31) + 80000508: 008f8f93 addi x31,x31,8 + +000000008000050c : +Zbkb_brev8_cg_cp_rs1_b27: + brev8 x0, x27 # perform operation + 8000050c: 687dd013 brev8 x0,x27 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_brev8_cg_cp_rs1_b27, Zbkb_brev8_cg_cp_rs1_b27_str) + 80000510: 0007b203 ld x4,0(x15) + 80000514: 00020c63 beq x4,x0,8000052c + 80000518: 2a8022ef jal x5,800027c0 + 8000051c: 8000050c .word 0x8000050c + 80000520: 00000000 .word 0x00000000 + 80000524: 80008d59 .word 0x80008d59 + 80000528: 00000000 .word 0x00000000 + 8000052c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x842e06a8b2b98934 + 80000530: 000fbe03 ld x28,0(x31) + 80000534: 008f8f93 addi x31,x31,8 + +0000000080000538 : +Zbkb_brev8_cg_cp_rs1_b28: + brev8 x14, x28 # perform operation + 80000538: 687e5713 brev8 x14,x28 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_brev8_cg_cp_rs1_b28, Zbkb_brev8_cg_cp_rs1_b28_str) + 8000053c: 0007b203 ld x4,0(x15) + 80000540: 00e20c63 beq x4,x14,80000558 + 80000544: 27c022ef jal x5,800027c0 + 80000548: 80000538 .word 0x80000538 + 8000054c: 00000000 .word 0x00000000 + 80000550: 80008d8d .word 0x80008d8d + 80000554: 00000000 .word 0x00000000 + 80000558: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x230a81f3bda3b4ed + 8000055c: 000fbe83 ld x29,0(x31) + 80000560: 008f8f93 addi x31,x31,8 + +0000000080000564 : +Zbkb_brev8_cg_cp_rs1_b29: + brev8 x30, x29 # perform operation + 80000564: 687edf13 brev8 x30,x29 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_brev8_cg_cp_rs1_b29, Zbkb_brev8_cg_cp_rs1_b29_str) + 80000568: 0007b203 ld x4,0(x15) + 8000056c: 01e20c63 beq x4,x30,80000584 + 80000570: 250022ef jal x5,800027c0 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008dc1 .word 0x80008dc1 + 80000580: 00000000 .word 0x00000000 + 80000584: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xecb4a58a515fccd2 + 80000588: 000fbf03 ld x30,0(x31) + 8000058c: 008f8f93 addi x31,x31,8 + +0000000080000590 : +Zbkb_brev8_cg_cp_rs1_b30: + brev8 x26, x30 # perform operation + 80000590: 687f5d13 brev8 x26,x30 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zbkb_brev8_cg_cp_rs1_b30, Zbkb_brev8_cg_cp_rs1_b30_str) + 80000594: 0007b203 ld x4,0(x15) + 80000598: 01a20c63 beq x4,x26,800005b0 + 8000059c: 224022ef jal x5,800027c0 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008df5 .word 0x80008df5 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 00878793 addi x15,x15,8 + + mv x18, x31 # switch data pointer register to avoid conflict with test + 800005b4: 000f8913 addi x18,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x0bee9228edeacb75 + 800005b8: 00093f83 ld x31,0(x18) + 800005bc: 00890913 addi x18,x18,8 + +00000000800005c0 : +Zbkb_brev8_cg_cp_rs1_b31: + brev8 x30, x31 # perform operation + 800005c0: 687fdf13 brev8 x30,x31 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_brev8_cg_cp_rs1_b31, Zbkb_brev8_cg_cp_rs1_b31_str) + 800005c4: 0007b203 ld x4,0(x15) + 800005c8: 01e20c63 beq x4,x30,800005e0 + 800005cc: 1f4022ef jal x5,800027c0 + 800005d0: 800005c0 .word 0x800005c0 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 80008e29 .word 0x80008e29 + 800005dc: 00000000 .word 0x00000000 + 800005e0: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xa91a4bf204b8b89a + 800005e4: 00093583 ld x11,0(x18) + 800005e8: 00890913 addi x18,x18,8 + +00000000800005ec : +Zbkb_brev8_cg_cp_rd_b0: + brev8 x0, x11 # perform operation + 800005ec: 6875d013 brev8 x0,x11 + # Check if x0 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x0, Zbkb_brev8_cg_cp_rd_b0, Zbkb_brev8_cg_cp_rd_b0_str) + 800005f0: 0007b203 ld x4,0(x15) + 800005f4: 00020c63 beq x4,x0,8000060c + 800005f8: 1c8022ef jal x5,800027c0 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80008e5d .word 0x80008e5d + 80000608: 00000000 .word 0x00000000 + 8000060c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x1f22e60c19d7a973 + 80000610: 00093a83 ld x21,0(x18) + 80000614: 00890913 addi x18,x18,8 + +0000000080000618 : +Zbkb_brev8_cg_cp_rd_b1: + brev8 x1, x21 # perform operation + 80000618: 687ad093 brev8 x1,x21 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zbkb_brev8_cg_cp_rd_b1, Zbkb_brev8_cg_cp_rd_b1_str) + 8000061c: 0007b203 ld x4,0(x15) + 80000620: 00120c63 beq x4,x1,80000638 + 80000624: 19c022ef jal x5,800027c0 + 80000628: 80000618 .word 0x80000618 + 8000062c: 00000000 .word 0x00000000 + 80000630: 80008e8f .word 0x80008e8f + 80000634: 00000000 .word 0x00000000 + 80000638: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x5f64bc9d307c670f + 8000063c: 00093803 ld x16,0(x18) + 80000640: 00890913 addi x18,x18,8 + +0000000080000644 : +Zbkb_brev8_cg_cp_rd_b2: + brev8 x2, x16 # perform operation + 80000644: 68785113 brev8 x2,x16 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zbkb_brev8_cg_cp_rd_b2, Zbkb_brev8_cg_cp_rd_b2_str) + 80000648: 0007b203 ld x4,0(x15) + 8000064c: 00220c63 beq x4,x2,80000664 + 80000650: 170022ef jal x5,800027c0 + 80000654: 80000644 .word 0x80000644 + 80000658: 00000000 .word 0x00000000 + 8000065c: 80008ec1 .word 0x80008ec1 + 80000660: 00000000 .word 0x00000000 + 80000664: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x21b3a8bf4974ae71 + 80000668: 00093303 ld x6,0(x18) + 8000066c: 00890913 addi x18,x18,8 + +0000000080000670 : +Zbkb_brev8_cg_cp_rd_b3: + brev8 x3, x6 # perform operation + 80000670: 68735193 brev8 x3,x6 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_brev8_cg_cp_rd_b3, Zbkb_brev8_cg_cp_rd_b3_str) + 80000674: 0007b203 ld x4,0(x15) + 80000678: 00320c63 beq x4,x3,80000690 + 8000067c: 144022ef jal x5,800027c0 + 80000680: 80000670 .word 0x80000670 + 80000684: 00000000 .word 0x00000000 + 80000688: 80008ef3 .word 0x80008ef3 + 8000068c: 00000000 .word 0x00000000 + 80000690: 00878793 addi x15,x15,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000694: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000698: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xbb8c961e06249239 + 8000069c: 00093283 ld x5,0(x18) + 800006a0: 00890913 addi x18,x18,8 + +00000000800006a4 : +Zbkb_brev8_cg_cp_rd_b4: + brev8 x4, x5 # perform operation + 800006a4: 6872d213 brev8 x4,x5 + # Check if x4 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x4, Zbkb_brev8_cg_cp_rd_b4, Zbkb_brev8_cg_cp_rd_b4_str) + 800006a8: 0007b683 ld x13,0(x15) + 800006ac: 00468c63 beq x13,x4,800006c4 + 800006b0: 1500276f jal x14,80002800 + 800006b4: 800006a4 .word 0x800006a4 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 80008f25 .word 0x80008f25 + 800006c0: 00000000 .word 0x00000000 + 800006c4: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x79a1081c9458afa4 + 800006c8: 00093b03 ld x22,0(x18) + 800006cc: 00890913 addi x18,x18,8 + +00000000800006d0 : +Zbkb_brev8_cg_cp_rd_b5: + brev8 x5, x22 # perform operation + 800006d0: 687b5293 brev8 x5,x22 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zbkb_brev8_cg_cp_rd_b5, Zbkb_brev8_cg_cp_rd_b5_str) + 800006d4: 0007b683 ld x13,0(x15) + 800006d8: 00568c63 beq x13,x5,800006f0 + 800006dc: 1240276f jal x14,80002800 + 800006e0: 800006d0 .word 0x800006d0 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 80008f57 .word 0x80008f57 + 800006ec: 00000000 .word 0x00000000 + 800006f0: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xdf06657702d22fba + 800006f4: 00093f83 ld x31,0(x18) + 800006f8: 00890913 addi x18,x18,8 + +00000000800006fc : +Zbkb_brev8_cg_cp_rd_b6: + brev8 x6, x31 # perform operation + 800006fc: 687fd313 brev8 x6,x31 + # Check if x6 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x6, Zbkb_brev8_cg_cp_rd_b6, Zbkb_brev8_cg_cp_rd_b6_str) + 80000700: 0007b683 ld x13,0(x15) + 80000704: 00668c63 beq x13,x6,8000071c + 80000708: 0f80276f jal x14,80002800 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80008f89 .word 0x80008f89 + 80000718: 00000000 .word 0x00000000 + 8000071c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x597bb86c4f31a1be + 80000720: 00093d83 ld x27,0(x18) + 80000724: 00890913 addi x18,x18,8 + +0000000080000728 : +Zbkb_brev8_cg_cp_rd_b7: + brev8 x7, x27 # perform operation + 80000728: 687dd393 brev8 x7,x27 + # Check if x7 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x7, Zbkb_brev8_cg_cp_rd_b7, Zbkb_brev8_cg_cp_rd_b7_str) + 8000072c: 0007b683 ld x13,0(x15) + 80000730: 00768c63 beq x13,x7,80000748 + 80000734: 0cc0276f jal x14,80002800 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80008fbb .word 0x80008fbb + 80000744: 00000000 .word 0x00000000 + 80000748: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x45c601ae41fd3eb1 + 8000074c: 00093503 ld x10,0(x18) + 80000750: 00890913 addi x18,x18,8 + +0000000080000754 : +Zbkb_brev8_cg_cp_rd_b8: + brev8 x8, x10 # perform operation + 80000754: 68755413 brev8 x8,x10 + # Check if x8 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x8, Zbkb_brev8_cg_cp_rd_b8, Zbkb_brev8_cg_cp_rd_b8_str) + 80000758: 0007b683 ld x13,0(x15) + 8000075c: 00868c63 beq x13,x8,80000774 + 80000760: 0a00276f jal x14,80002800 + 80000764: 80000754 .word 0x80000754 + 80000768: 00000000 .word 0x00000000 + 8000076c: 80008fed .word 0x80008fed + 80000770: 00000000 .word 0x00000000 + 80000774: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x08754fb0e7b6fb94 + 80000778: 00093b03 ld x22,0(x18) + 8000077c: 00890913 addi x18,x18,8 + +0000000080000780 : +Zbkb_brev8_cg_cp_rd_b9: + brev8 x9, x22 # perform operation + 80000780: 687b5493 brev8 x9,x22 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_brev8_cg_cp_rd_b9, Zbkb_brev8_cg_cp_rd_b9_str) + 80000784: 0007b683 ld x13,0(x15) + 80000788: 00968c63 beq x13,x9,800007a0 + 8000078c: 0740276f jal x14,80002800 + 80000790: 80000780 .word 0x80000780 + 80000794: 00000000 .word 0x00000000 + 80000798: 8000901f .word 0x8000901f + 8000079c: 00000000 .word 0x00000000 + 800007a0: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x7679a7728d556c25 + 800007a4: 00093803 ld x16,0(x18) + 800007a8: 00890913 addi x18,x18,8 + +00000000800007ac : +Zbkb_brev8_cg_cp_rd_b10: + brev8 x10, x16 # perform operation + 800007ac: 68785513 brev8 x10,x16 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_brev8_cg_cp_rd_b10, Zbkb_brev8_cg_cp_rd_b10_str) + 800007b0: 0007b683 ld x13,0(x15) + 800007b4: 00a68c63 beq x13,x10,800007cc + 800007b8: 0480276f jal x14,80002800 + 800007bc: 800007ac .word 0x800007ac + 800007c0: 00000000 .word 0x00000000 + 800007c4: 80009051 .word 0x80009051 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x442bcfe644360b0b + 800007d0: 00093183 ld x3,0(x18) + 800007d4: 00890913 addi x18,x18,8 + +00000000800007d8 : +Zbkb_brev8_cg_cp_rd_b11: + brev8 x11, x3 # perform operation + 800007d8: 6871d593 brev8 x11,x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_brev8_cg_cp_rd_b11, Zbkb_brev8_cg_cp_rd_b11_str) + 800007dc: 0007b683 ld x13,0(x15) + 800007e0: 00b68c63 beq x13,x11,800007f8 + 800007e4: 01c0276f jal x14,80002800 + 800007e8: 800007d8 .word 0x800007d8 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 80009084 .word 0x80009084 + 800007f4: 00000000 .word 0x00000000 + 800007f8: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x7f71518954dec86d + 800007fc: 00093983 ld x19,0(x18) + 80000800: 00890913 addi x18,x18,8 + +0000000080000804 : +Zbkb_brev8_cg_cp_rd_b12: + brev8 x12, x19 # perform operation + 80000804: 6879d613 brev8 x12,x19 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_brev8_cg_cp_rd_b12, Zbkb_brev8_cg_cp_rd_b12_str) + 80000808: 0007b683 ld x13,0(x15) + 8000080c: 00c68c63 beq x13,x12,80000824 + 80000810: 7f10176f jal x14,80002800 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 800090b7 .word 0x800090b7 + 80000820: 00000000 .word 0x00000000 + 80000824: 00878793 addi x15,x15,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000828: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000082c: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xd6aab10a76e8cef1 + 80000830: 00093c03 ld x24,0(x18) + 80000834: 00890913 addi x18,x18,8 + +0000000080000838 : +Zbkb_brev8_cg_cp_rd_b13: + brev8 x13, x24 # perform operation + 80000838: 687c5693 brev8 x13,x24 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zbkb_brev8_cg_cp_rd_b13, Zbkb_brev8_cg_cp_rd_b13_str) + 8000083c: 0007b203 ld x4,0(x15) + 80000840: 00d20c63 beq x4,x13,80000858 + 80000844: 77d012ef jal x5,800027c0 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 800090ea .word 0x800090ea + 80000854: 00000000 .word 0x00000000 + 80000858: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xc796f7ac90d69063 + 8000085c: 00093103 ld x2,0(x18) + 80000860: 00890913 addi x18,x18,8 + +0000000080000864 : +Zbkb_brev8_cg_cp_rd_b14: + brev8 x14, x2 # perform operation + 80000864: 68715713 brev8 x14,x2 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_brev8_cg_cp_rd_b14, Zbkb_brev8_cg_cp_rd_b14_str) + 80000868: 0007b203 ld x4,0(x15) + 8000086c: 00e20c63 beq x4,x14,80000884 + 80000870: 751012ef jal x5,800027c0 + 80000874: 80000864 .word 0x80000864 + 80000878: 00000000 .word 0x00000000 + 8000087c: 8000911d .word 0x8000911d + 80000880: 00000000 .word 0x00000000 + 80000884: 00878793 addi x15,x15,8 + + mv x21, x15 # switch signature pointer register to avoid conflict with test + 80000888: 00078a93 addi x21,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x4ffe8903a87b7e65 + 8000088c: 00093e83 ld x29,0(x18) + 80000890: 00890913 addi x18,x18,8 + +0000000080000894 : +Zbkb_brev8_cg_cp_rd_b15: + brev8 x15, x29 # perform operation + 80000894: 687ed793 brev8 x15,x29 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zbkb_brev8_cg_cp_rd_b15, Zbkb_brev8_cg_cp_rd_b15_str) + 80000898: 000ab203 ld x4,0(x21) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 721012ef jal x5,800027c0 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 80009150 .word 0x80009150 + 800008b0: 00000000 .word 0x00000000 + 800008b4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x1389e145416aff28 + 800008b8: 00093303 ld x6,0(x18) + 800008bc: 00890913 addi x18,x18,8 + +00000000800008c0 : +Zbkb_brev8_cg_cp_rd_b16: + brev8 x16, x6 # perform operation + 800008c0: 68735813 brev8 x16,x6 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zbkb_brev8_cg_cp_rd_b16, Zbkb_brev8_cg_cp_rd_b16_str) + 800008c4: 000ab203 ld x4,0(x21) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 6f5012ef jal x5,800027c0 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 80009183 .word 0x80009183 + 800008dc: 00000000 .word 0x00000000 + 800008e0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x72b965559ebc955c + 800008e4: 00093483 ld x9,0(x18) + 800008e8: 00890913 addi x18,x18,8 + +00000000800008ec : +Zbkb_brev8_cg_cp_rd_b17: + brev8 x17, x9 # perform operation + 800008ec: 6874d893 brev8 x17,x9 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zbkb_brev8_cg_cp_rd_b17, Zbkb_brev8_cg_cp_rd_b17_str) + 800008f0: 000ab203 ld x4,0(x21) + 800008f4: 01120c63 beq x4,x17,8000090c + 800008f8: 6c9012ef jal x5,800027c0 + 800008fc: 800008ec .word 0x800008ec + 80000900: 00000000 .word 0x00000000 + 80000904: 800091b6 .word 0x800091b6 + 80000908: 00000000 .word 0x00000000 + 8000090c: 008a8a93 addi x21,x21,8 + + mv x2, x18 # switch data pointer register to avoid conflict with test + 80000910: 00090113 addi x2,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x470a8dc67d7a9f94 + 80000914: 00013c83 ld x25,0(x2) + 80000918: 00810113 addi x2,x2,8 + +000000008000091c : +Zbkb_brev8_cg_cp_rd_b18: + brev8 x18, x25 # perform operation + 8000091c: 687cd913 brev8 x18,x25 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkb_brev8_cg_cp_rd_b18, Zbkb_brev8_cg_cp_rd_b18_str) + 80000920: 000ab203 ld x4,0(x21) + 80000924: 01220c63 beq x4,x18,8000093c + 80000928: 699012ef jal x5,800027c0 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800091e9 .word 0x800091e9 + 80000938: 00000000 .word 0x00000000 + 8000093c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xb07c73f00f6a9780 + 80000940: 00013b03 ld x22,0(x2) + 80000944: 00810113 addi x2,x2,8 + +0000000080000948 : +Zbkb_brev8_cg_cp_rd_b19: + brev8 x19, x22 # perform operation + 80000948: 687b5993 brev8 x19,x22 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zbkb_brev8_cg_cp_rd_b19, Zbkb_brev8_cg_cp_rd_b19_str) + 8000094c: 000ab203 ld x4,0(x21) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000921c .word 0x8000921c + 80000964: 00000000 .word 0x00000000 + 80000968: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x9d4171e288c5529d + 8000096c: 00013083 ld x1,0(x2) + 80000970: 00810113 addi x2,x2,8 + +0000000080000974 : +Zbkb_brev8_cg_cp_rd_b20: + brev8 x20, x1 # perform operation + 80000974: 6870da13 brev8 x20,x1 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkb_brev8_cg_cp_rd_b20, Zbkb_brev8_cg_cp_rd_b20_str) + 80000978: 000ab203 ld x4,0(x21) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000924f .word 0x8000924f + 80000990: 00000000 .word 0x00000000 + 80000994: 008a8a93 addi x21,x21,8 + + mv x24, x21 # switch signature pointer register to avoid conflict with test + 80000998: 000a8c13 addi x24,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xcebd668e90d19c6b + 8000099c: 00013b83 ld x23,0(x2) + 800009a0: 00810113 addi x2,x2,8 + +00000000800009a4 : +Zbkb_brev8_cg_cp_rd_b21: + brev8 x21, x23 # perform operation + 800009a4: 687bda93 brev8 x21,x23 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zbkb_brev8_cg_cp_rd_b21, Zbkb_brev8_cg_cp_rd_b21_str) + 800009a8: 000c3203 ld x4,0(x24) + 800009ac: 01520c63 beq x4,x21,800009c4 + 800009b0: 611012ef jal x5,800027c0 + 800009b4: 800009a4 .word 0x800009a4 + 800009b8: 00000000 .word 0x00000000 + 800009bc: 80009282 .word 0x80009282 + 800009c0: 00000000 .word 0x00000000 + 800009c4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xca418915e9c011f1 + 800009c8: 00013583 ld x11,0(x2) + 800009cc: 00810113 addi x2,x2,8 + +00000000800009d0 : +Zbkb_brev8_cg_cp_rd_b22: + brev8 x22, x11 # perform operation + 800009d0: 6875db13 brev8 x22,x11 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zbkb_brev8_cg_cp_rd_b22, Zbkb_brev8_cg_cp_rd_b22_str) + 800009d4: 000c3203 ld x4,0(x24) + 800009d8: 01620c63 beq x4,x22,800009f0 + 800009dc: 5e5012ef jal x5,800027c0 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 800092b5 .word 0x800092b5 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xff895ea37ef580d3 + 800009f4: 00013703 ld x14,0(x2) + 800009f8: 00810113 addi x2,x2,8 + +00000000800009fc : +Zbkb_brev8_cg_cp_rd_b23: + brev8 x23, x14 # perform operation + 800009fc: 68775b93 brev8 x23,x14 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zbkb_brev8_cg_cp_rd_b23, Zbkb_brev8_cg_cp_rd_b23_str) + 80000a00: 000c3203 ld x4,0(x24) + 80000a04: 01720c63 beq x4,x23,80000a1c + 80000a08: 5b9012ef jal x5,800027c0 + 80000a0c: 800009fc .word 0x800009fc + 80000a10: 00000000 .word 0x00000000 + 80000a14: 800092e8 .word 0x800092e8 + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 008c0c13 addi x24,x24,8 + + mv x22, x24 # switch signature pointer register to avoid conflict with test + 80000a20: 000c0b13 addi x22,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xe34382808fa14e7d + 80000a24: 00013683 ld x13,0(x2) + 80000a28: 00810113 addi x2,x2,8 + +0000000080000a2c : +Zbkb_brev8_cg_cp_rd_b24: + brev8 x24, x13 # perform operation + 80000a2c: 6876dc13 brev8 x24,x13 + # Check if x24 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x24, Zbkb_brev8_cg_cp_rd_b24, Zbkb_brev8_cg_cp_rd_b24_str) + 80000a30: 000b3203 ld x4,0(x22) + 80000a34: 01820c63 beq x4,x24,80000a4c + 80000a38: 589012ef jal x5,800027c0 + 80000a3c: 80000a2c .word 0x80000a2c + 80000a40: 00000000 .word 0x00000000 + 80000a44: 8000931b .word 0x8000931b + 80000a48: 00000000 .word 0x00000000 + 80000a4c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xd73285988841a8cd + 80000a50: 00013303 ld x6,0(x2) + 80000a54: 00810113 addi x2,x2,8 + +0000000080000a58 : +Zbkb_brev8_cg_cp_rd_b25: + brev8 x25, x6 # perform operation + 80000a58: 68735c93 brev8 x25,x6 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zbkb_brev8_cg_cp_rd_b25, Zbkb_brev8_cg_cp_rd_b25_str) + 80000a5c: 000b3203 ld x4,0(x22) + 80000a60: 01920c63 beq x4,x25,80000a78 + 80000a64: 55d012ef jal x5,800027c0 + 80000a68: 80000a58 .word 0x80000a58 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 8000934e .word 0x8000934e + 80000a74: 00000000 .word 0x00000000 + 80000a78: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xaf02fc4c457aeaff + 80000a7c: 00013883 ld x17,0(x2) + 80000a80: 00810113 addi x2,x2,8 + +0000000080000a84 : +Zbkb_brev8_cg_cp_rd_b26: + brev8 x26, x17 # perform operation + 80000a84: 6878dd13 brev8 x26,x17 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zbkb_brev8_cg_cp_rd_b26, Zbkb_brev8_cg_cp_rd_b26_str) + 80000a88: 000b3203 ld x4,0(x22) + 80000a8c: 01a20c63 beq x4,x26,80000aa4 + 80000a90: 531012ef jal x5,800027c0 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 80009381 .word 0x80009381 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7760a4798f666a22 + 80000aa8: 00013c83 ld x25,0(x2) + 80000aac: 00810113 addi x2,x2,8 + +0000000080000ab0 : +Zbkb_brev8_cg_cp_rd_b27: + brev8 x27, x25 # perform operation + 80000ab0: 687cdd93 brev8 x27,x25 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zbkb_brev8_cg_cp_rd_b27, Zbkb_brev8_cg_cp_rd_b27_str) + 80000ab4: 000b3203 ld x4,0(x22) + 80000ab8: 01b20c63 beq x4,x27,80000ad0 + 80000abc: 505012ef jal x5,800027c0 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 800093b4 .word 0x800093b4 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x1a3ef45e9afdec74 + 80000ad4: 00013a03 ld x20,0(x2) + 80000ad8: 00810113 addi x2,x2,8 + +0000000080000adc : +Zbkb_brev8_cg_cp_rd_b28: + brev8 x28, x20 # perform operation + 80000adc: 687a5e13 brev8 x28,x20 + # Check if x28 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x28, Zbkb_brev8_cg_cp_rd_b28, Zbkb_brev8_cg_cp_rd_b28_str) + 80000ae0: 000b3203 ld x4,0(x22) + 80000ae4: 01c20c63 beq x4,x28,80000afc + 80000ae8: 4d9012ef jal x5,800027c0 + 80000aec: 80000adc .word 0x80000adc + 80000af0: 00000000 .word 0x00000000 + 80000af4: 800093e7 .word 0x800093e7 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x84c6a607fc6c7c4f + 80000b00: 00013883 ld x17,0(x2) + 80000b04: 00810113 addi x2,x2,8 + +0000000080000b08 : +Zbkb_brev8_cg_cp_rd_b29: + brev8 x29, x17 # perform operation + 80000b08: 6878de93 brev8 x29,x17 + # Check if x29 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x29, Zbkb_brev8_cg_cp_rd_b29, Zbkb_brev8_cg_cp_rd_b29_str) + 80000b0c: 000b3203 ld x4,0(x22) + 80000b10: 01d20c63 beq x4,x29,80000b28 + 80000b14: 4ad012ef jal x5,800027c0 + 80000b18: 80000b08 .word 0x80000b08 + 80000b1c: 00000000 .word 0x00000000 + 80000b20: 8000941a .word 0x8000941a + 80000b24: 00000000 .word 0x00000000 + 80000b28: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x3a616e1972f6c348 + 80000b2c: 00013003 ld x0,0(x2) + 80000b30: 00810113 addi x2,x2,8 + +0000000080000b34 : +Zbkb_brev8_cg_cp_rd_b30: + brev8 x30, x0 # perform operation + 80000b34: 68705f13 brev8 x30,x0 + # Check if x30 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x30, Zbkb_brev8_cg_cp_rd_b30, Zbkb_brev8_cg_cp_rd_b30_str) + 80000b38: 000b3203 ld x4,0(x22) + 80000b3c: 01e20c63 beq x4,x30,80000b54 + 80000b40: 481012ef jal x5,800027c0 + 80000b44: 80000b34 .word 0x80000b34 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 8000944d .word 0x8000944d + 80000b50: 00000000 .word 0x00000000 + 80000b54: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xe4407f2700b75422 + 80000b58: 00013383 ld x7,0(x2) + 80000b5c: 00810113 addi x2,x2,8 + +0000000080000b60 : +Zbkb_brev8_cg_cp_rd_b31: + brev8 x31, x7 # perform operation + 80000b60: 6873df93 brev8 x31,x7 + # Check if x31 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x31, Zbkb_brev8_cg_cp_rd_b31, Zbkb_brev8_cg_cp_rd_b31_str) + 80000b64: 000b3203 ld x4,0(x22) + 80000b68: 01f20c63 beq x4,x31,80000b80 + 80000b6c: 455012ef jal x5,800027c0 + 80000b70: 80000b60 .word 0x80000b60 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 80009480 .word 0x80009480 + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x0000000000000000 + 80000b84: 00013403 ld x8,0(x2) + 80000b88: 00810113 addi x2,x2,8 + +0000000080000b8c : +Zbkb_brev8_cg_cp_rs1_edges_0x0: + brev8 x27, x8 # perform operation + 80000b8c: 68745d93 brev8 x27,x8 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_edges_0x0, Zbkb_brev8_cg_cp_rs1_edges_0x0_str) + 80000b90: 000b3203 ld x4,0(x22) + 80000b94: 01b20c63 beq x4,x27,80000bac + 80000b98: 429012ef jal x5,800027c0 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 800094b3 .word 0x800094b3 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000000000001 + 80000bb0: 00013603 ld x12,0(x2) + 80000bb4: 00810113 addi x2,x2,8 + +0000000080000bb8 : +Zbkb_brev8_cg_cp_rs1_edges_0x1: + brev8 x7, x12 # perform operation + 80000bb8: 68765393 brev8 x7,x12 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zbkb_brev8_cg_cp_rs1_edges_0x1, Zbkb_brev8_cg_cp_rs1_edges_0x1_str) + 80000bbc: 000b3203 ld x4,0(x22) + 80000bc0: 00720c63 beq x4,x7,80000bd8 + 80000bc4: 3fd012ef jal x5,800027c0 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 800094ed .word 0x800094ed + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000000000002 + 80000bdc: 00013503 ld x10,0(x2) + 80000be0: 00810113 addi x2,x2,8 + +0000000080000be4 : +Zbkb_brev8_cg_cp_rs1_edges_0x2: + brev8 x6, x10 # perform operation + 80000be4: 68755313 brev8 x6,x10 + # Check if x6 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x6, Zbkb_brev8_cg_cp_rs1_edges_0x2, Zbkb_brev8_cg_cp_rs1_edges_0x2_str) + 80000be8: 000b3203 ld x4,0(x22) + 80000bec: 00620c63 beq x4,x6,80000c04 + 80000bf0: 3d1012ef jal x5,800027c0 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80009527 .word 0x80009527 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x8000000000000000 + 80000c08: 00013483 ld x9,0(x2) + 80000c0c: 00810113 addi x2,x2,8 + +0000000080000c10 : +Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000000: + brev8 x12, x9 # perform operation + 80000c10: 6874d613 brev8 x12,x9 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000000, Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c14: 000b3203 ld x4,0(x22) + 80000c18: 00c20c63 beq x4,x12,80000c30 + 80000c1c: 3a5012ef jal x5,800027c0 + 80000c20: 80000c10 .word 0x80000c10 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 80009561 .word 0x80009561 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x8000000000000001 + 80000c34: 00013583 ld x11,0(x2) + 80000c38: 00810113 addi x2,x2,8 + +0000000080000c3c : +Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000001: + brev8 x12, x11 # perform operation + 80000c3c: 6875d613 brev8 x12,x11 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000001, Zbkb_brev8_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c40: 000b3203 ld x4,0(x22) + 80000c44: 00c20c63 beq x4,x12,80000c5c + 80000c48: 379012ef jal x5,800027c0 + 80000c4c: 80000c3c .word 0x80000c3c + 80000c50: 00000000 .word 0x00000000 + 80000c54: 800095aa .word 0x800095aa + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x7fffffffffffffff + 80000c60: 00013803 ld x16,0(x2) + 80000c64: 00810113 addi x2,x2,8 + +0000000080000c68 : +Zbkb_brev8_cg_cp_rs1_edges_0x7fffffffffffffff: + brev8 x25, x16 # perform operation + 80000c68: 68785c93 brev8 x25,x16 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_brev8_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c6c: 000b3203 ld x4,0(x22) + 80000c70: 01920c63 beq x4,x25,80000c88 + 80000c74: 34d012ef jal x5,800027c0 + 80000c78: 80000c68 .word 0x80000c68 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 800095f3 .word 0x800095f3 + 80000c84: 00000000 .word 0x00000000 + 80000c88: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80000c8c: 00013303 ld x6,0(x2) + 80000c90: 00810113 addi x2,x2,8 + +0000000080000c94 : +Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffffffffffe: + brev8 x9, x6 # perform operation + 80000c94: 68735493 brev8 x9,x6 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_brev8_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c98: 000b3203 ld x4,0(x22) + 80000c9c: 00920c63 beq x4,x9,80000cb4 + 80000ca0: 321012ef jal x5,800027c0 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000963c .word 0x8000963c + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xffffffffffffffff + 80000cb8: 00013783 ld x15,0(x2) + 80000cbc: 00810113 addi x2,x2,8 + +0000000080000cc0 : +Zbkb_brev8_cg_cp_rs1_edges_0xffffffffffffffff: + brev8 x27, x15 # perform operation + 80000cc0: 6877dd93 brev8 x27,x15 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zbkb_brev8_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_brev8_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc4: 000b3203 ld x4,0(x22) + 80000cc8: 01b20c63 beq x4,x27,80000ce0 + 80000ccc: 2f5012ef jal x5,800027c0 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 80009685 .word 0x80009685 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xfffffffffffffffe + 80000ce4: 00013e83 ld x29,0(x2) + 80000ce8: 00810113 addi x2,x2,8 + +0000000080000cec : +Zbkb_brev8_cg_cp_rs1_edges_0xfffffffffffffffe: + brev8 x9, x29 # perform operation + 80000cec: 687ed493 brev8 x9,x29 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf0: 000b3203 ld x4,0(x22) + 80000cf4: 00920c63 beq x4,x9,80000d0c + 80000cf8: 2c9012ef jal x5,800027c0 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 800096ce .word 0x800096ce + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80000d10: 00013803 ld x16,0(x2) + 80000d14: 00810113 addi x2,x2,8 + +0000000080000d18 : +Zbkb_brev8_cg_cp_rs1_edges_0x5bbc887763ae86f2: + brev8 x25, x16 # perform operation + 80000d18: 68785c93 brev8 x25,x16 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_brev8_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d1c: 000b3203 ld x4,0(x22) + 80000d20: 01920c63 beq x4,x25,80000d38 + 80000d24: 29d012ef jal x5,800027c0 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 80009717 .word 0x80009717 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80000d3c: 00013303 ld x6,0(x2) + 80000d40: 00810113 addi x2,x2,8 + +0000000080000d44 : +Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + brev8 x12, x6 # perform operation + 80000d44: 68735613 brev8 x12,x6 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_brev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d48: 000b3203 ld x4,0(x22) + 80000d4c: 00c20c63 beq x4,x12,80000d64 + 80000d50: 271012ef jal x5,800027c0 + 80000d54: 80000d44 .word 0x80000d44 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 80009760 .word 0x80009760 + 80000d60: 00000000 .word 0x00000000 + 80000d64: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5555555555555555 + 80000d68: 00013183 ld x3,0(x2) + 80000d6c: 00810113 addi x2,x2,8 + +0000000080000d70 : +Zbkb_brev8_cg_cp_rs1_edges_0x5555555555555555: + brev8 x21, x3 # perform operation + 80000d70: 6871da93 brev8 x21,x3 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkb_brev8_cg_cp_rs1_edges_0x5555555555555555, Zbkb_brev8_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d74: 000b3203 ld x4,0(x22) + 80000d78: 01520c63 beq x4,x21,80000d90 + 80000d7c: 245012ef jal x5,800027c0 + 80000d80: 80000d70 .word 0x80000d70 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 800097a9 .word 0x800097a9 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x00000000ffffffff + 80000d94: 00013f83 ld x31,0(x2) + 80000d98: 00810113 addi x2,x2,8 + +0000000080000d9c : +Zbkb_brev8_cg_cp_rs1_edges_0xffffffff: + brev8 x25, x31 # perform operation + 80000d9c: 687fdc93 brev8 x25,x31 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0xffffffff, Zbkb_brev8_cg_cp_rs1_edges_0xffffffff_str) + 80000da0: 000b3203 ld x4,0(x22) + 80000da4: 01920c63 beq x4,x25,80000dbc + 80000da8: 219012ef jal x5,800027c0 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 800097f2 .word 0x800097f2 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x00000000fffffffe + 80000dc0: 00013083 ld x1,0(x2) + 80000dc4: 00810113 addi x2,x2,8 + +0000000080000dc8 : +Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe: + brev8 x8, x1 # perform operation + 80000dc8: 6870d413 brev8 x8,x1 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe, Zbkb_brev8_cg_cp_rs1_edges_0xfffffffe_str) + 80000dcc: 000b3203 ld x4,0(x22) + 80000dd0: 00820c63 beq x4,x8,80000de8 + 80000dd4: 1ed012ef jal x5,800027c0 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 80009833 .word 0x80009833 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x0000000100000000 + 80000dec: 00013a83 ld x21,0(x2) + 80000df0: 00810113 addi x2,x2,8 + +0000000080000df4 : +Zbkb_brev8_cg_cp_rs1_edges_0x100000000: + brev8 x7, x21 # perform operation + 80000df4: 687ad393 brev8 x7,x21 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zbkb_brev8_cg_cp_rs1_edges_0x100000000, Zbkb_brev8_cg_cp_rs1_edges_0x100000000_str) + 80000df8: 000b3203 ld x4,0(x22) + 80000dfc: 00720c63 beq x4,x7,80000e14 + 80000e00: 1c1012ef jal x5,800027c0 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 80009874 .word 0x80009874 + 80000e10: 00000000 .word 0x00000000 + 80000e14: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000100000001 + 80000e18: 00013683 ld x13,0(x2) + 80000e1c: 00810113 addi x2,x2,8 + +0000000080000e20 : +Zbkb_brev8_cg_cp_rs1_edges_0x100000001: + brev8 x25, x13 # perform operation + 80000e20: 6876dc93 brev8 x25,x13 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zbkb_brev8_cg_cp_rs1_edges_0x100000001, Zbkb_brev8_cg_cp_rs1_edges_0x100000001_str) + 80000e24: 000b3203 ld x4,0(x22) + 80000e28: 01920c63 beq x4,x25,80000e40 + 80000e2c: 195012ef jal x5,800027c0 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 800098b6 .word 0x800098b6 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x162551285bd610ab + 80000e44: 00013003 ld x0,0(x2) + 80000e48: 00810113 addi x2,x2,8 + +0000000080000e4c : +Zbkb_brev8_cg_cmp_rd_rs1_b0: + brev8 x0, x0 # perform operation + 80000e4c: 68705013 brev8 x0,x0 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zbkb_brev8_cg_cmp_rd_rs1_b0, Zbkb_brev8_cg_cmp_rd_rs1_b0_str) + 80000e50: 000b3203 ld x4,0(x22) + 80000e54: 00020c63 beq x4,x0,80000e6c + 80000e58: 169012ef jal x5,800027c0 + 80000e5c: 80000e4c .word 0x80000e4c + 80000e60: 00000000 .word 0x00000000 + 80000e64: 800098f8 .word 0x800098f8 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x76ac7c872f3c965c + 80000e70: 00013083 ld x1,0(x2) + 80000e74: 00810113 addi x2,x2,8 + +0000000080000e78 : +Zbkb_brev8_cg_cmp_rd_rs1_b1: + brev8 x1, x1 # perform operation + 80000e78: 6870d093 brev8 x1,x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zbkb_brev8_cg_cmp_rd_rs1_b1, Zbkb_brev8_cg_cmp_rd_rs1_b1_str) + 80000e7c: 000b3203 ld x4,0(x22) + 80000e80: 00120c63 beq x4,x1,80000e98 + 80000e84: 13d012ef jal x5,800027c0 + 80000e88: 80000e78 .word 0x80000e78 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 8000992f .word 0x8000992f + 80000e94: 00000000 .word 0x00000000 + 80000e98: 008b0b13 addi x22,x22,8 + + mv x27, x2 # switch data pointer register to avoid conflict with test + 80000e9c: 00010d93 addi x27,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0xa8565edb17151ac4 + 80000ea0: 000db103 ld x2,0(x27) + 80000ea4: 008d8d93 addi x27,x27,8 + +0000000080000ea8 : +Zbkb_brev8_cg_cmp_rd_rs1_b2: + brev8 x2, x2 # perform operation + 80000ea8: 68715113 brev8 x2,x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zbkb_brev8_cg_cmp_rd_rs1_b2, Zbkb_brev8_cg_cmp_rd_rs1_b2_str) + 80000eac: 000b3203 ld x4,0(x22) + 80000eb0: 00220c63 beq x4,x2,80000ec8 + 80000eb4: 10d012ef jal x5,800027c0 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 80009966 .word 0x80009966 + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x1405c98482dee7eb + 80000ecc: 000db183 ld x3,0(x27) + 80000ed0: 008d8d93 addi x27,x27,8 + +0000000080000ed4 : +Zbkb_brev8_cg_cmp_rd_rs1_b3: + brev8 x3, x3 # perform operation + 80000ed4: 6871d193 brev8 x3,x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zbkb_brev8_cg_cmp_rd_rs1_b3, Zbkb_brev8_cg_cmp_rd_rs1_b3_str) + 80000ed8: 000b3203 ld x4,0(x22) + 80000edc: 00320c63 beq x4,x3,80000ef4 + 80000ee0: 0e1012ef jal x5,800027c0 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 8000999d .word 0x8000999d + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 008b0b13 addi x22,x22,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000efc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs1: x4 = 0x57107c2faf666052 + 80000f00: 000db203 ld x4,0(x27) + 80000f04: 008d8d93 addi x27,x27,8 + +0000000080000f08 : +Zbkb_brev8_cg_cmp_rd_rs1_b4: + brev8 x4, x4 # perform operation + 80000f08: 68725213 brev8 x4,x4 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zbkb_brev8_cg_cmp_rd_rs1_b4, Zbkb_brev8_cg_cmp_rd_rs1_b4_str) + 80000f0c: 000b3383 ld x7,0(x22) + 80000f10: 00438c63 beq x7,x4,80000f28 + 80000f14: 0c50146f jal x8,800027d8 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 800099d4 .word 0x800099d4 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0x2c749864558d7359 + 80000f2c: 000db283 ld x5,0(x27) + 80000f30: 008d8d93 addi x27,x27,8 + +0000000080000f34 : +Zbkb_brev8_cg_cmp_rd_rs1_b5: + brev8 x5, x5 # perform operation + 80000f34: 6872d293 brev8 x5,x5 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zbkb_brev8_cg_cmp_rd_rs1_b5, Zbkb_brev8_cg_cmp_rd_rs1_b5_str) + 80000f38: 000b3383 ld x7,0(x22) + 80000f3c: 00538c63 beq x7,x5,80000f54 + 80000f40: 0990146f jal x8,800027d8 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 80009a0b .word 0x80009a0b + 80000f50: 00000000 .word 0x00000000 + 80000f54: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0xc4fa3c3fc29b38dd + 80000f58: 000db303 ld x6,0(x27) + 80000f5c: 008d8d93 addi x27,x27,8 + +0000000080000f60 : +Zbkb_brev8_cg_cmp_rd_rs1_b6: + brev8 x6, x6 # perform operation + 80000f60: 68735313 brev8 x6,x6 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zbkb_brev8_cg_cmp_rd_rs1_b6, Zbkb_brev8_cg_cmp_rd_rs1_b6_str) + 80000f64: 000b3383 ld x7,0(x22) + 80000f68: 00638c63 beq x7,x6,80000f80 + 80000f6c: 06d0146f jal x8,800027d8 + 80000f70: 80000f60 .word 0x80000f60 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 80009a42 .word 0x80009a42 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 008b0b13 addi x22,x22,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000f84: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000f88: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0x6b3530ade986570b + 80000f8c: 000db383 ld x7,0(x27) + 80000f90: 008d8d93 addi x27,x27,8 + +0000000080000f94 : +Zbkb_brev8_cg_cmp_rd_rs1_b7: + brev8 x7, x7 # perform operation + 80000f94: 6873d393 brev8 x7,x7 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zbkb_brev8_cg_cmp_rd_rs1_b7, Zbkb_brev8_cg_cmp_rd_rs1_b7_str) + 80000f98: 000b3683 ld x13,0(x22) + 80000f9c: 00768c63 beq x13,x7,80000fb4 + 80000fa0: 0610176f jal x14,80002800 + 80000fa4: 80000f94 .word 0x80000f94 + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 80009a79 .word 0x80009a79 + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x382aa6b2396e132b + 80000fb8: 000db403 ld x8,0(x27) + 80000fbc: 008d8d93 addi x27,x27,8 + +0000000080000fc0 : +Zbkb_brev8_cg_cmp_rd_rs1_b8: + brev8 x8, x8 # perform operation + 80000fc0: 68745413 brev8 x8,x8 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zbkb_brev8_cg_cmp_rd_rs1_b8, Zbkb_brev8_cg_cmp_rd_rs1_b8_str) + 80000fc4: 000b3683 ld x13,0(x22) + 80000fc8: 00868c63 beq x13,x8,80000fe0 + 80000fcc: 0350176f jal x14,80002800 + 80000fd0: 80000fc0 .word 0x80000fc0 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 80009ab0 .word 0x80009ab0 + 80000fdc: 00000000 .word 0x00000000 + 80000fe0: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x7ab4fbc8c6939367 + 80000fe4: 000db483 ld x9,0(x27) + 80000fe8: 008d8d93 addi x27,x27,8 + +0000000080000fec : +Zbkb_brev8_cg_cmp_rd_rs1_b9: + brev8 x9, x9 # perform operation + 80000fec: 6874d493 brev8 x9,x9 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zbkb_brev8_cg_cmp_rd_rs1_b9, Zbkb_brev8_cg_cmp_rd_rs1_b9_str) + 80000ff0: 000b3683 ld x13,0(x22) + 80000ff4: 00968c63 beq x13,x9,8000100c + 80000ff8: 0090176f jal x14,80002800 + 80000ffc: 80000fec .word 0x80000fec + 80001000: 00000000 .word 0x00000000 + 80001004: 80009ae7 .word 0x80009ae7 + 80001008: 00000000 .word 0x00000000 + 8000100c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0xbf767b4423253cdf + 80001010: 000db503 ld x10,0(x27) + 80001014: 008d8d93 addi x27,x27,8 + +0000000080001018 : +Zbkb_brev8_cg_cmp_rd_rs1_b10: + brev8 x10, x10 # perform operation + 80001018: 68755513 brev8 x10,x10 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zbkb_brev8_cg_cmp_rd_rs1_b10, Zbkb_brev8_cg_cmp_rd_rs1_b10_str) + 8000101c: 000b3683 ld x13,0(x22) + 80001020: 00a68c63 beq x13,x10,80001038 + 80001024: 7dc0176f jal x14,80002800 + 80001028: 80001018 .word 0x80001018 + 8000102c: 00000000 .word 0x00000000 + 80001030: 80009b1e .word 0x80009b1e + 80001034: 00000000 .word 0x00000000 + 80001038: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xa3f0eab94f2237b1 + 8000103c: 000db583 ld x11,0(x27) + 80001040: 008d8d93 addi x27,x27,8 + +0000000080001044 : +Zbkb_brev8_cg_cmp_rd_rs1_b11: + brev8 x11, x11 # perform operation + 80001044: 6875d593 brev8 x11,x11 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zbkb_brev8_cg_cmp_rd_rs1_b11, Zbkb_brev8_cg_cmp_rd_rs1_b11_str) + 80001048: 000b3683 ld x13,0(x22) + 8000104c: 00b68c63 beq x13,x11,80001064 + 80001050: 7b00176f jal x14,80002800 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 80009b56 .word 0x80009b56 + 80001060: 00000000 .word 0x00000000 + 80001064: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x3a2fe64c7c68d85a + 80001068: 000db603 ld x12,0(x27) + 8000106c: 008d8d93 addi x27,x27,8 + +0000000080001070 : +Zbkb_brev8_cg_cmp_rd_rs1_b12: + brev8 x12, x12 # perform operation + 80001070: 68765613 brev8 x12,x12 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zbkb_brev8_cg_cmp_rd_rs1_b12, Zbkb_brev8_cg_cmp_rd_rs1_b12_str) + 80001074: 000b3683 ld x13,0(x22) + 80001078: 00c68c63 beq x13,x12,80001090 + 8000107c: 7840176f jal x14,80002800 + 80001080: 80001070 .word 0x80001070 + 80001084: 00000000 .word 0x00000000 + 80001088: 80009b8e .word 0x80009b8e + 8000108c: 00000000 .word 0x00000000 + 80001090: 008b0b13 addi x22,x22,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001094: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001098: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0xd0a5d5e8d74c5c14 + 8000109c: 000db683 ld x13,0(x27) + 800010a0: 008d8d93 addi x27,x27,8 + +00000000800010a4 : +Zbkb_brev8_cg_cmp_rd_rs1_b13: + brev8 x13, x13 # perform operation + 800010a4: 6876d693 brev8 x13,x13 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zbkb_brev8_cg_cmp_rd_rs1_b13, Zbkb_brev8_cg_cmp_rd_rs1_b13_str) + 800010a8: 000b3383 ld x7,0(x22) + 800010ac: 00d38c63 beq x7,x13,800010c4 + 800010b0: 7280146f jal x8,800027d8 + 800010b4: 800010a4 .word 0x800010a4 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 80009bc6 .word 0x80009bc6 + 800010c0: 00000000 .word 0x00000000 + 800010c4: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x091b0736d0b81595 + 800010c8: 000db703 ld x14,0(x27) + 800010cc: 008d8d93 addi x27,x27,8 + +00000000800010d0 : +Zbkb_brev8_cg_cmp_rd_rs1_b14: + brev8 x14, x14 # perform operation + 800010d0: 68775713 brev8 x14,x14 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zbkb_brev8_cg_cmp_rd_rs1_b14, Zbkb_brev8_cg_cmp_rd_rs1_b14_str) + 800010d4: 000b3383 ld x7,0(x22) + 800010d8: 00e38c63 beq x7,x14,800010f0 + 800010dc: 6fc0146f jal x8,800027d8 + 800010e0: 800010d0 .word 0x800010d0 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 80009bfe .word 0x80009bfe + 800010ec: 00000000 .word 0x00000000 + 800010f0: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0xc6a1806c10c035c9 + 800010f4: 000db783 ld x15,0(x27) + 800010f8: 008d8d93 addi x27,x27,8 + +00000000800010fc : +Zbkb_brev8_cg_cmp_rd_rs1_b15: + brev8 x15, x15 # perform operation + 800010fc: 6877d793 brev8 x15,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zbkb_brev8_cg_cmp_rd_rs1_b15, Zbkb_brev8_cg_cmp_rd_rs1_b15_str) + 80001100: 000b3383 ld x7,0(x22) + 80001104: 00f38c63 beq x7,x15,8000111c + 80001108: 6d00146f jal x8,800027d8 + 8000110c: 800010fc .word 0x800010fc + 80001110: 00000000 .word 0x00000000 + 80001114: 80009c36 .word 0x80009c36 + 80001118: 00000000 .word 0x00000000 + 8000111c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x9fe6d046afc3c4f8 + 80001120: 000db803 ld x16,0(x27) + 80001124: 008d8d93 addi x27,x27,8 + +0000000080001128 : +Zbkb_brev8_cg_cmp_rd_rs1_b16: + brev8 x16, x16 # perform operation + 80001128: 68785813 brev8 x16,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zbkb_brev8_cg_cmp_rd_rs1_b16, Zbkb_brev8_cg_cmp_rd_rs1_b16_str) + 8000112c: 000b3383 ld x7,0(x22) + 80001130: 01038c63 beq x7,x16,80001148 + 80001134: 6a40146f jal x8,800027d8 + 80001138: 80001128 .word 0x80001128 + 8000113c: 00000000 .word 0x00000000 + 80001140: 80009c6e .word 0x80009c6e + 80001144: 00000000 .word 0x00000000 + 80001148: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xf489c1a975ced7c4 + 8000114c: 000db883 ld x17,0(x27) + 80001150: 008d8d93 addi x27,x27,8 + +0000000080001154 : +Zbkb_brev8_cg_cmp_rd_rs1_b17: + brev8 x17, x17 # perform operation + 80001154: 6878d893 brev8 x17,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zbkb_brev8_cg_cmp_rd_rs1_b17, Zbkb_brev8_cg_cmp_rd_rs1_b17_str) + 80001158: 000b3383 ld x7,0(x22) + 8000115c: 01138c63 beq x7,x17,80001174 + 80001160: 6780146f jal x8,800027d8 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 80009ca6 .word 0x80009ca6 + 80001170: 00000000 .word 0x00000000 + 80001174: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x710f6a42777123c1 + 80001178: 000db903 ld x18,0(x27) + 8000117c: 008d8d93 addi x27,x27,8 + +0000000080001180 : +Zbkb_brev8_cg_cmp_rd_rs1_b18: + brev8 x18, x18 # perform operation + 80001180: 68795913 brev8 x18,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zbkb_brev8_cg_cmp_rd_rs1_b18, Zbkb_brev8_cg_cmp_rd_rs1_b18_str) + 80001184: 000b3383 ld x7,0(x22) + 80001188: 01238c63 beq x7,x18,800011a0 + 8000118c: 64c0146f jal x8,800027d8 + 80001190: 80001180 .word 0x80001180 + 80001194: 00000000 .word 0x00000000 + 80001198: 80009cde .word 0x80009cde + 8000119c: 00000000 .word 0x00000000 + 800011a0: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x8618131b484a2ca3 + 800011a4: 000db983 ld x19,0(x27) + 800011a8: 008d8d93 addi x27,x27,8 + +00000000800011ac : +Zbkb_brev8_cg_cmp_rd_rs1_b19: + brev8 x19, x19 # perform operation + 800011ac: 6879d993 brev8 x19,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zbkb_brev8_cg_cmp_rd_rs1_b19, Zbkb_brev8_cg_cmp_rd_rs1_b19_str) + 800011b0: 000b3383 ld x7,0(x22) + 800011b4: 01338c63 beq x7,x19,800011cc + 800011b8: 6200146f jal x8,800027d8 + 800011bc: 800011ac .word 0x800011ac + 800011c0: 00000000 .word 0x00000000 + 800011c4: 80009d16 .word 0x80009d16 + 800011c8: 00000000 .word 0x00000000 + 800011cc: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x523189f6e3ac1b83 + 800011d0: 000dba03 ld x20,0(x27) + 800011d4: 008d8d93 addi x27,x27,8 + +00000000800011d8 : +Zbkb_brev8_cg_cmp_rd_rs1_b20: + brev8 x20, x20 # perform operation + 800011d8: 687a5a13 brev8 x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zbkb_brev8_cg_cmp_rd_rs1_b20, Zbkb_brev8_cg_cmp_rd_rs1_b20_str) + 800011dc: 000b3383 ld x7,0(x22) + 800011e0: 01438c63 beq x7,x20,800011f8 + 800011e4: 5f40146f jal x8,800027d8 + 800011e8: 800011d8 .word 0x800011d8 + 800011ec: 00000000 .word 0x00000000 + 800011f0: 80009d4f .word 0x80009d4f + 800011f4: 00000000 .word 0x00000000 + 800011f8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x1513e31fe305077b + 800011fc: 000dba83 ld x21,0(x27) + 80001200: 008d8d93 addi x27,x27,8 + +0000000080001204 : +Zbkb_brev8_cg_cmp_rd_rs1_b21: + brev8 x21, x21 # perform operation + 80001204: 687ada93 brev8 x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zbkb_brev8_cg_cmp_rd_rs1_b21, Zbkb_brev8_cg_cmp_rd_rs1_b21_str) + 80001208: 000b3383 ld x7,0(x22) + 8000120c: 01538c63 beq x7,x21,80001224 + 80001210: 5c80146f jal x8,800027d8 + 80001214: 80001204 .word 0x80001204 + 80001218: 00000000 .word 0x00000000 + 8000121c: 80009d88 .word 0x80009d88 + 80001220: 00000000 .word 0x00000000 + 80001224: 008b0b13 addi x22,x22,8 + + mv x6, x22 # switch signature pointer register to avoid conflict with test + 80001228: 000b0313 addi x6,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x3a3e6da708edf25e + 8000122c: 000dbb03 ld x22,0(x27) + 80001230: 008d8d93 addi x27,x27,8 + +0000000080001234 : +Zbkb_brev8_cg_cmp_rd_rs1_b22: + brev8 x22, x22 # perform operation + 80001234: 687b5b13 brev8 x22,x22 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkb_brev8_cg_cmp_rd_rs1_b22, Zbkb_brev8_cg_cmp_rd_rs1_b22_str) + 80001238: 00033383 ld x7,0(x6) + 8000123c: 01638c63 beq x7,x22,80001254 + 80001240: 5980146f jal x8,800027d8 + 80001244: 80001234 .word 0x80001234 + 80001248: 00000000 .word 0x00000000 + 8000124c: 80009dc1 .word 0x80009dc1 + 80001250: 00000000 .word 0x00000000 + 80001254: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x5f4580bf218d796f + 80001258: 000dbb83 ld x23,0(x27) + 8000125c: 008d8d93 addi x27,x27,8 + +0000000080001260 : +Zbkb_brev8_cg_cmp_rd_rs1_b23: + brev8 x23, x23 # perform operation + 80001260: 687bdb93 brev8 x23,x23 + # Check if x23 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x23, Zbkb_brev8_cg_cmp_rd_rs1_b23, Zbkb_brev8_cg_cmp_rd_rs1_b23_str) + 80001264: 00033383 ld x7,0(x6) + 80001268: 01738c63 beq x7,x23,80001280 + 8000126c: 56c0146f jal x8,800027d8 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 80009dfa .word 0x80009dfa + 8000127c: 00000000 .word 0x00000000 + 80001280: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x96642c430b427867 + 80001284: 000dbc03 ld x24,0(x27) + 80001288: 008d8d93 addi x27,x27,8 + +000000008000128c : +Zbkb_brev8_cg_cmp_rd_rs1_b24: + brev8 x24, x24 # perform operation + 8000128c: 687c5c13 brev8 x24,x24 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkb_brev8_cg_cmp_rd_rs1_b24, Zbkb_brev8_cg_cmp_rd_rs1_b24_str) + 80001290: 00033383 ld x7,0(x6) + 80001294: 01838c63 beq x7,x24,800012ac + 80001298: 5400146f jal x8,800027d8 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 80009e33 .word 0x80009e33 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xa011dd887c338f5b + 800012b0: 000dbc83 ld x25,0(x27) + 800012b4: 008d8d93 addi x27,x27,8 + +00000000800012b8 : +Zbkb_brev8_cg_cmp_rd_rs1_b25: + brev8 x25, x25 # perform operation + 800012b8: 687cdc93 brev8 x25,x25 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkb_brev8_cg_cmp_rd_rs1_b25, Zbkb_brev8_cg_cmp_rd_rs1_b25_str) + 800012bc: 00033383 ld x7,0(x6) + 800012c0: 01938c63 beq x7,x25,800012d8 + 800012c4: 5140146f jal x8,800027d8 + 800012c8: 800012b8 .word 0x800012b8 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 80009e6c .word 0x80009e6c + 800012d4: 00000000 .word 0x00000000 + 800012d8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x2c2aad81405ba755 + 800012dc: 000dbd03 ld x26,0(x27) + 800012e0: 008d8d93 addi x27,x27,8 + +00000000800012e4 : +Zbkb_brev8_cg_cmp_rd_rs1_b26: + brev8 x26, x26 # perform operation + 800012e4: 687d5d13 brev8 x26,x26 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkb_brev8_cg_cmp_rd_rs1_b26, Zbkb_brev8_cg_cmp_rd_rs1_b26_str) + 800012e8: 00033383 ld x7,0(x6) + 800012ec: 01a38c63 beq x7,x26,80001304 + 800012f0: 4e80146f jal x8,800027d8 + 800012f4: 800012e4 .word 0x800012e4 + 800012f8: 00000000 .word 0x00000000 + 800012fc: 80009ea5 .word 0x80009ea5 + 80001300: 00000000 .word 0x00000000 + 80001304: 00830313 addi x6,x6,8 + + mv x24, x27 # switch data pointer register to avoid conflict with test + 80001308: 000d8c13 addi x24,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xbe44f397177116e6 + 8000130c: 000c3d83 ld x27,0(x24) + 80001310: 008c0c13 addi x24,x24,8 + +0000000080001314 : +Zbkb_brev8_cg_cmp_rd_rs1_b27: + brev8 x27, x27 # perform operation + 80001314: 687ddd93 brev8 x27,x27 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkb_brev8_cg_cmp_rd_rs1_b27, Zbkb_brev8_cg_cmp_rd_rs1_b27_str) + 80001318: 00033383 ld x7,0(x6) + 8000131c: 01b38c63 beq x7,x27,80001334 + 80001320: 4b80146f jal x8,800027d8 + 80001324: 80001314 .word 0x80001314 + 80001328: 00000000 .word 0x00000000 + 8000132c: 80009ede .word 0x80009ede + 80001330: 00000000 .word 0x00000000 + 80001334: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x756587207c13ae28 + 80001338: 000c3e03 ld x28,0(x24) + 8000133c: 008c0c13 addi x24,x24,8 + +0000000080001340 : +Zbkb_brev8_cg_cmp_rd_rs1_b28: + brev8 x28, x28 # perform operation + 80001340: 687e5e13 brev8 x28,x28 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkb_brev8_cg_cmp_rd_rs1_b28, Zbkb_brev8_cg_cmp_rd_rs1_b28_str) + 80001344: 00033383 ld x7,0(x6) + 80001348: 01c38c63 beq x7,x28,80001360 + 8000134c: 48c0146f jal x8,800027d8 + 80001350: 80001340 .word 0x80001340 + 80001354: 00000000 .word 0x00000000 + 80001358: 80009f17 .word 0x80009f17 + 8000135c: 00000000 .word 0x00000000 + 80001360: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xcbd3c12d40c51a7b + 80001364: 000c3e83 ld x29,0(x24) + 80001368: 008c0c13 addi x24,x24,8 + +000000008000136c : +Zbkb_brev8_cg_cmp_rd_rs1_b29: + brev8 x29, x29 # perform operation + 8000136c: 687ede93 brev8 x29,x29 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkb_brev8_cg_cmp_rd_rs1_b29, Zbkb_brev8_cg_cmp_rd_rs1_b29_str) + 80001370: 00033383 ld x7,0(x6) + 80001374: 01d38c63 beq x7,x29,8000138c + 80001378: 4600146f jal x8,800027d8 + 8000137c: 8000136c .word 0x8000136c + 80001380: 00000000 .word 0x00000000 + 80001384: 80009f50 .word 0x80009f50 + 80001388: 00000000 .word 0x00000000 + 8000138c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0xefa2ba85c842ec23 + 80001390: 000c3f03 ld x30,0(x24) + 80001394: 008c0c13 addi x24,x24,8 + +0000000080001398 : +Zbkb_brev8_cg_cmp_rd_rs1_b30: + brev8 x30, x30 # perform operation + 80001398: 687f5f13 brev8 x30,x30 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkb_brev8_cg_cmp_rd_rs1_b30, Zbkb_brev8_cg_cmp_rd_rs1_b30_str) + 8000139c: 00033383 ld x7,0(x6) + 800013a0: 01e38c63 beq x7,x30,800013b8 + 800013a4: 4340146f jal x8,800027d8 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 80009f89 .word 0x80009f89 + 800013b4: 00000000 .word 0x00000000 + 800013b8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xe7eec4a702d67bb5 + 800013bc: 000c3f83 ld x31,0(x24) + 800013c0: 008c0c13 addi x24,x24,8 + +00000000800013c4 : +Zbkb_brev8_cg_cmp_rd_rs1_b31: + brev8 x31, x31 # perform operation + 800013c4: 687fdf93 brev8 x31,x31 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkb_brev8_cg_cmp_rd_rs1_b31, Zbkb_brev8_cg_cmp_rd_rs1_b31_str) + 800013c8: 00033383 ld x7,0(x6) + 800013cc: 01f38c63 beq x7,x31,800013e4 + 800013d0: 4080146f jal x8,800027d8 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 80009fc2 .word 0x80009fc2 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00830313 addi x6,x6,8 + + mv x2, x6 # restore signature pointer to default register for teardown + 800013e8: 00030113 addi x2,x6,0 + +00000000800013ec : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013ec: 00000513 addi x10,x0,0 + 800013f0: 00000073 ecall + 800013f4: fff00513 addi x10,x0,-1 + 800013f8: 25800413 addi x8,x0,600 + +00000000800013fc : + 800013fc: 34002373 csrrs x6,mscratch,x0 + +0000000080001400 : + 80001400: 2b833383 ld x7,696(x6) + +0000000080001404 : + 80001404: 2a033383 ld x7,672(x6) + +0000000080001408 : + 80001408: 2d033483 ld x9,720(x6) + 8000140c: 34049073 csrrw x0,mscratch,x9 + +0000000080001410 : + 80001410: 2c833483 ld x9,712(x6) + 80001414: 305493f3 csrrw x7,mtvec,x9 + 80001418: ffc4f493 andi x9,x9,-4 + 8000141c: ffc3f393 andi x7,x7,-4 + 80001420: 00749e63 bne x9,x7,8000143c + +0000000080001424 : + 80001424: 00030493 addi x9,x6,0 + +0000000080001428 : + 80001428: 0004a783 lw x15,0(x9) + 8000142c: 00f3a023 sw x15,0(x7) + 80001430: 00438393 addi x7,x7,4 + 80001434: 00448493 addi x9,x9,4 + 80001438: fe83c8e3 blt x7,x8,80001428 + 8000143c: 0000100f fence.i + +0000000080001440 : + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 29f50513 addi x10,x10,671 # 8000a71f + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 29950513 addi x10,x10,665 # 8000a759 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 2b950513 addi x10,x10,697 # 8000a7b9 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: e2450513 addi x10,x10,-476 # 8000b364 + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: c1038393 addi x7,x7,-1008 # 8000c1d0 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: bc040413 addi x8,x8,-1088 # 8000c1c0 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000a90d .word 0x8000a90d + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a77b .word 0x8000a77b + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 06450513 addi x10,x10,100 # 8000a6e4 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 05f50513 addi x10,x10,95 # 8000a71f + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: ccdff06f jal x0,800013ec + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca9ff06f jal x0,800013ec + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: aa030313 addi x6,x6,-1376 # 80001440 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 1fb50513 addi x10,x10,507 # 8000bd9b + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 58850513 addi x10,x10,1416 # 8000a168 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: c0250513 addi x10,x10,-1022 # 8000a822 + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: abf50513 addi x10,x10,-1345 # 8000a71f + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 0e848493 addi x9,x9,232 # 8000a148 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00027417 auipc x8,0x27 + 800020a4: 5f840413 addi x8,x8,1528 # 80029698 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000a924 .word 0x8000a924 + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000aa26 .word 0x8000aa26 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ab21 .word 0x8000ab21 + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ac14 .word 0x8000ac14 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000ad87 .word 0x8000ad87 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: 84020213 addi x4,x4,-1984 # 8000a000 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: 82838393 addi x7,x7,-2008 # 8000a000 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: 80068693 addi x13,x13,-2048 # 8000a000 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00007497 auipc x9,0x7 + 8000282c: 7d848493 addi x9,x9,2008 # 8000a000 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00007497 auipc x9,0x7 + 800028d0: 7344a483 lw x9,1844(x9) # 8000a000 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 46040413 addi x8,x8,1120 # 8000bde0 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: ce040413 addi x8,x8,-800 # 800296a0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00007497 auipc x9,0x7 + 80002a04: 72848493 addi x9,x9,1832 # 8000a128 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00007497 auipc x9,0x7 + 80002a44: 6e848493 addi x9,x9,1768 # 8000a128 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00007817 auipc x16,0x7 + 80002a80: 6bc80813 addi x16,x16,1724 # 8000a138 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00007817 auipc x16,0x7 + 80002aa0: 69c80813 addi x16,x16,1692 # 8000a138 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: e6538393 addi x7,x7,-411 # 8000a90d + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00007817 auipc x16,0x7 + 80002abc: 67880813 addi x16,x16,1656 # 8000a130 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: e6038393 addi x7,x7,-416 # 8000a924 + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: f4a38393 addi x7,x7,-182 # 8000aa26 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 02d38393 addi x7,x7,45 # 8000ab21 + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 10838393 addi x7,x7,264 # 8000ac14 + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 26338393 addi x7,x7,611 # 8000ad87 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 1cf38393 addi x7,x7,463 # 8000ad0b + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 1f538393 addi x7,x7,501 # 8000ad49 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: df838393 addi x7,x7,-520 # 8000a964 + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: ee038393 addi x7,x7,-288 # 8000aa64 + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: fc138393 addi x7,x7,-63 # 8000ab5d + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 09d38393 addi x7,x7,157 # 8000ac51 + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 1f638393 addi x7,x7,502 # 8000adc2 + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: dc038393 addi x7,x7,-576 # 8000a9a4 + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: ea638393 addi x7,x7,-346 # 8000aaa2 + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: f8538393 addi x7,x7,-123 # 8000ab99 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 06238393 addi x7,x7,98 # 8000ac8e + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 1b938393 addi x7,x7,441 # 8000adfd + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: d8938393 addi x7,x7,-631 # 8000a9e5 + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: e6d38393 addi x7,x7,-403 # 8000aae1 + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: f4a38393 addi x7,x7,-182 # 8000abd6 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 02838393 addi x7,x7,40 # 8000accc + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 17d38393 addi x7,x7,381 # 8000ae39 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 1a238393 addi x7,x7,418 # 8000ae76 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 1d938393 addi x7,x7,473 # 8000aec5 + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 2bc38393 addi x7,x7,700 # 8000afc0 + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 3a038393 addi x7,x7,928 # 8000b0bc + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 3f480813 addi x16,x16,1012 # 8000a130 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 3e480813 addi x16,x16,996 # 8000a130 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 3dc80813 addi x16,x16,988 # 8000a134 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 3c880813 addi x16,x16,968 # 8000a130 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: 95f50513 addi x10,x10,-1697 # 8000a71f + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: 95950513 addi x10,x10,-1703 # 8000a759 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: 9d050513 addi x10,x10,-1584 # 8000a810 + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 2b853503 ld x10,696(x10) # 8000a120 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: 9a250513 addi x10,x10,-1630 # 8000a822 + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 15852503 lw x10,344(x10) # 8000a000 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: 96450513 addi x10,x10,-1692 # 8000a824 + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 21852503 lw x10,536(x10) # 8000a100 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 24850513 addi x10,x10,584 # 8000a168 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: 8d850513 addi x10,x10,-1832 # 8000a838 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 18053503 ld x10,384(x10) # 8000a108 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 1c850513 addi x10,x10,456 # 8000a168 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 28f50513 addi x10,x10,655 # 8000b26f + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: ff852503 lw x10,-8(x10) # 8000a000 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 14860613 addi x12,x12,328 # 8000a168 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 0bc52503 lw x10,188(x10) # 8000a104 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 30550513 addi x10,x10,773 # 8000b385 + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 0a860613 addi x12,x12,168 # 8000a168 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 01c52503 lw x10,28(x10) # 8000a104 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 06860613 addi x12,x12,104 # 8000a168 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: fdc52503 lw x10,-36(x10) # 8000a104 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 12850513 addi x10,x10,296 # 8000b268 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: fe850513 addi x10,x10,-24 # 8000a168 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 0c050513 addi x10,x10,192 # 8000b280 + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: e1852503 lw x10,-488(x10) # 8000a000 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: f1853503 ld x10,-232(x10) # 8000a110 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: f0453503 ld x10,-252(x10) # 8000a110 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: f4850513 addi x10,x10,-184 # 8000a168 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: ee052503 lw x10,-288(x10) # 8000a128 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 03750513 addi x10,x10,55 # 8000b297 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: d7852503 lw x10,-648(x10) # 8000a000 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: e8053503 ld x10,-384(x10) # 8000a118 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: e6c53503 ld x10,-404(x10) # 8000a118 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: ea850513 addi x10,x10,-344 # 8000a168 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: fae50513 addi x10,x10,-82 # 8000b2ae + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: df053503 ld x10,-528(x10) # 8000a118 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: e2850513 addi x10,x10,-472 # 8000a168 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: f8c50513 addi x10,x10,-116 # 8000b30c + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: d7053503 ld x10,-656(x10) # 8000a118 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: da850513 addi x10,x10,-600 # 8000a168 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: d4442403 lw x8,-700(x8) # 8000a130 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: fb150513 addi x10,x10,-79 # 8000b3b1 + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: f9d50513 addi x10,x10,-99 # 8000b3dd + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: cd080813 addi x16,x16,-816 # 8000a138 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 3a250513 addi x10,x10,930 # 8000a822 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: f2d50513 addi x10,x10,-211 # 8000b3ed + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: c3053503 ld x10,-976(x10) # 8000a118 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: c6850513 addi x10,x10,-920 # 8000a168 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: ed850513 addi x10,x10,-296 # 8000b418 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: ba853503 ld x10,-1112(x10) # 8000a110 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: be850513 addi x10,x10,-1048 # 8000a168 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: b6833303 ld x6,-1176(x6) # 8000a110 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: b683b383 ld x7,-1176(x7) # 8000a118 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: e8750513 addi x10,x10,-377 # 8000b447 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: eaf50513 addi x10,x10,-337 # 8000b4af + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: ae833303 ld x6,-1304(x6) # 8000a110 + 80003630: 00007397 auipc x7,0x7 + 80003634: ae83b383 ld x7,-1304(x7) # 8000a118 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: b0850513 addi x10,x10,-1272 # 8000a168 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: e3650513 addi x10,x10,-458 # 8000b4d6 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: d9350513 addi x10,x10,-621 # 8000b473 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: d8f50513 addi x10,x10,-625 # 8000b4af + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: 9d033303 ld x6,-1584(x6) # 8000a118 + 80003750: 00007397 auipc x7,0x7 + 80003754: 9c03b383 ld x7,-1600(x7) # 8000a110 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: 9e850513 addi x10,x10,-1560 # 8000a168 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: dfe50513 addi x10,x10,-514 # 8000b5be + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: ea550513 addi x10,x10,-347 # 8000b6a5 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: 90c52503 lw x10,-1780(x10) # 8000a134 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: e8150513 addi x10,x10,-383 # 8000b6e1 + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: e1f50513 addi x10,x10,-481 # 8000b6bf + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: de750513 addi x10,x10,-537 # 8000b6c7 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: daf50513 addi x10,x10,-593 # 8000b6cf + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: d7850513 addi x10,x10,-648 # 8000b6d8 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: d4a50513 addi x10,x10,-694 # 8000b6ea + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00006517 auipc x10,0x6 + 800039cc: 76852503 lw x10,1896(x10) # 8000a130 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: e2150513 addi x10,x10,-479 # 8000b841 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ca450513 addi x10,x10,-860 # 8000b704 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: c9550513 addi x10,x10,-875 # 8000b735 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: c7550513 addi x10,x10,-907 # 8000b755 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: c5350513 addi x10,x10,-941 # 8000b773 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: c3250513 addi x10,x10,-974 # 8000b792 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: c1a50513 addi x10,x10,-998 # 8000b7ba + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: c0650513 addi x10,x10,-1018 # 8000b7e6 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: bf250513 addi x10,x10,-1038 # 8000b812 + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: bf050513 addi x10,x10,-1040 # 8000b850 + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 49053503 ld x10,1168(x10) # 8000a118 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 4c850513 addi x10,x10,1224 # 8000a168 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: b8750513 addi x10,x10,-1145 # 8000b867 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 40853503 ld x10,1032(x10) # 8000a110 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 44850513 addi x10,x10,1096 # 8000a168 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 3e852503 lw x10,1000(x10) # 8000a130 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: b1e50513 addi x10,x10,-1250 # 8000b87e + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 39053503 ld x10,912(x10) # 8000a118 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: af550513 addi x10,x10,-1291 # 8000b895 + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 34853503 ld x10,840(x10) # 8000a110 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 34c52503 lw x10,844(x10) # 8000a130 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: b0b50513 addi x10,x10,-1269 # 8000b90b + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ba150513 addi x10,x10,-1119 # 8000b9e1 + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: c5450513 addi x10,x10,-940 # 8000bad4 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: d0f50513 addi x10,x10,-753 # 8000bbcf + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: db650513 addi x10,x10,-586 # 8000bcb6 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: 98350513 addi x10,x10,-1661 # 8000b8c3 + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 1e063603 ld x12,480(x12) # 8000a148 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: 92c50513 addi x10,x10,-1748 # 8000a8ac + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 18850513 addi x10,x10,392 # 8000a168 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 17058593 addi x11,x11,368 # 8000a190 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 20058593 addi x11,x11,512 # 8000a250 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00006517 auipc x10,0x6 + 80004084: 64e50513 addi x10,x10,1614 # 8000a6ce + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 2a450513 addi x10,x10,676 # 8000b364 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 05060613 addi x12,x12,80 # 8000a140 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00006517 auipc x10,0x6 + 80004104: 7cd50513 addi x10,x10,1997 # 8000a8cd + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 02053503 ld x10,32(x10) # 8000a148 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 02850513 addi x10,x10,40 # 8000a168 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00006517 auipc x10,0x6 + 80004184: 75d50513 addi x10,x10,1885 # 8000a8dd + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: fa853503 ld x10,-88(x10) # 8000a150 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: fa850513 addi x10,x10,-88 # 8000a168 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00006517 auipc x10,0x6 + 80004204: 6ed50513 addi x10,x10,1773 # 8000a8ed + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: f3053503 ld x10,-208(x10) # 8000a158 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: f2850513 addi x10,x10,-216 # 8000a168 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00006517 auipc x10,0x6 + 80004284: 67d50513 addi x10,x10,1661 # 8000a8fd + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: eb853503 ld x10,-328(x10) # 8000a160 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: ea850513 addi x10,x10,-344 # 8000a168 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: e5860613 addi x12,x12,-424 # 8000a140 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: e6860613 addi x12,x12,-408 # 8000a168 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35430313 addi x6,x6,852 # 800013ec + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33c30313 addi x6,x6,828 # 800013ec + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32430313 addi x6,x6,804 # 800013ec + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1bc78793 addi x15,x15,444 # 800013fc + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: 90010113 addi x2,x2,-1792 # 8000bde0 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b38d .word 0x8000b38d + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 11828293 addi x5,x5,280 # 80029700 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 0f828293 addi x5,x5,248 # 80029700 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-orn-00.elf.objdump b/riscv-tests/rv64-Zbkb-orn-00.elf.objdump new file mode 100644 index 0000000..5648b3a --- /dev/null +++ b/riscv-tests/rv64-Zbkb-orn-00.elf.objdump @@ -0,0 +1,17099 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-orn-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-orn-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c310 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038400 0000000080038400 00037400 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, 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+00000000800133fd l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003648 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +000000008001346b l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +000000008000367c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800134d9 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036b0 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013547 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036e4 l .text.rvtest 0000000000000000 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Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013756 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037e8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +00000000800137bd l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +000000008000381c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +000000008001381c l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003850 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +000000008001387b l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003884 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +00000000800138da l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038b8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080013948 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038ec l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +00000000800139b6 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003920 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080013a24 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str 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Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003a24 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555 +0000000080013c4a l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str +0000000080003a58 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff +0000000080013cb8 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str +0000000080003a8c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe +0000000080013d1e l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str +0000000080003ac0 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000 +0000000080013d84 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str +0000000080003af4 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001 +0000000080013deb l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str +0000000080003b28 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0 +0000000080013e52 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str +0000000080003b5c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1 +0000000080013eb1 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str +0000000080003b90 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2 +0000000080013f10 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str +0000000080003bc4 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000 +0000000080013f6f l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str +0000000080003bf8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001 +0000000080013fdd l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str +0000000080003c2c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff +000000008001404b l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str +0000000080003c60 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe +00000000800140b9 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str +0000000080003c94 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff +0000000080014127 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str +0000000080003cc8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe +0000000080014195 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003cfc l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +0000000080014203 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d30 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014271 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d64 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +00000000800142df l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003d98 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +000000008001434d l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003dcc l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +00000000800143b3 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e00 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +0000000080014419 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e34 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +0000000080014480 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e68 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0 +00000000800144e7 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str +0000000080003e9c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1 +0000000080014546 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str +0000000080003ed0 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2 +00000000800145a5 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str +0000000080003f04 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +0000000080014604 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f38 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +0000000080014672 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f6c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +00000000800146e0 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fa0 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +000000008001474e l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fd4 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +00000000800147bc l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004008 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +000000008001482a l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +000000008000403c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014898 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004070 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014906 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040a4 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014974 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040d8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +00000000800149e2 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +000000008000410c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014a48 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004140 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014aae l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +0000000080004174 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001 +0000000080014b15 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str +00000000800041a8 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +0000000080014b7c l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +00000000800041dc l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +0000000080014bd3 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +0000000080004210 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +0000000080014c2a l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +0000000080004244 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000 +0000000080014c81 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str +0000000080004278 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001 +0000000080014ce7 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str +00000000800042ac l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff +0000000080014d4d l .data 0000000000000000 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Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str +00000000800043b0 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014f4b l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800043e4 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555 +0000000080014fb1 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str +0000000080004418 l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +0000000080015017 l .data 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +000000008000444c l .text.rvtest 0000000000000000 Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +0000000080015075 l .data 0000000000000000 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+0000000080038400 g .tohost 0000000000000000 tohost +0000000080006c10 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xb5d6858307d742f3 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xcb553a0e60e9eb24 + 80000048: 0001bc83 ld x25,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_orn_cg_cp_rs1_b0: + orn x19, x0, x25 # perform operation + 80000050: 419069b3 orn x19,x0,x25 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_orn_cg_cp_rs1_b0, Zbkb_orn_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01320c63 beq x4,x19,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6cc4f02f552b8076 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x29f3e05571be2160 + 8000007c: 0001b703 ld x14,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_orn_cg_cp_rs1_b1: + orn x30, x1, x14 # perform operation + 80000084: 40e0ef33 orn x30,x1,x14 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkb_orn_cg_cp_rs1_b1, Zbkb_orn_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01e20c63 beq x4,x30,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a0 .word 0x8000e4a0 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x17, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010893 addi x17,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3498224297bfe041 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x45755522720ee747 + 800000b4: 0001b083 ld x1,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_orn_cg_cp_rs1_b2: + orn x8, x2, x1 # perform operation + 800000bc: 40116433 orn x8,x2,x1 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkb_orn_cg_cp_rs1_b2, Zbkb_orn_cg_cp_rs1_b2_str) + 800000c0: 0008b203 ld x4,0(x17) + 800000c4: 00820c63 beq x4,x8,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d0 .word 0x8000e4d0 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00888893 addi x17,x17,8 + + mv x11, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xf08cc69dac64f405 + 800000e4: 0005b183 ld x3,0(x11) + 800000e8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0xa60aa870f6854403 + 800000ec: 0005b603 ld x12,0(x11) + 800000f0: 00858593 addi x11,x11,8 + +00000000800000f4 : +Zbkb_orn_cg_cp_rs1_b3: + orn x24, x3, x12 # perform operation + 800000f4: 40c1ec33 orn x24,x3,x12 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkb_orn_cg_cp_rs1_b3, Zbkb_orn_cg_cp_rs1_b3_str) + 800000f8: 0008b203 ld x4,0(x17) + 800000fc: 01820c63 beq x4,x24,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e500 .word 0x8000e500 + 80000110: 00000000 .word 0x00000000 + 80000114: 00888893 addi x17,x17,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x9371158160af5a04 + 80000120: 0005b203 ld x4,0(x11) + 80000124: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x4289a6a7c101eb5a + 80000128: 0005b183 ld x3,0(x11) + 8000012c: 00858593 addi x11,x11,8 + +0000000080000130 : +Zbkb_orn_cg_cp_rs1_b4: + orn x24, x4, x3 # perform operation + 80000130: 40326c33 orn x24,x4,x3 + # Check if x24 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x24, Zbkb_orn_cg_cp_rs1_b4, Zbkb_orn_cg_cp_rs1_b4_str) + 80000134: 0008b683 ld x13,0(x17) + 80000138: 01868c63 beq x13,x24,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e530 .word 0x8000e530 + 8000014c: 00000000 .word 0x00000000 + 80000150: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xa5c9ddfd53ad0d69 + 80000154: 0005b283 ld x5,0(x11) + 80000158: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x1c723fa7d96bc20c + 8000015c: 0005b103 ld x2,0(x11) + 80000160: 00858593 addi x11,x11,8 + +0000000080000164 : +Zbkb_orn_cg_cp_rs1_b5: + orn x25, x5, x2 # perform operation + 80000164: 4022ecb3 orn x25,x5,x2 + # Check if x25 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x25, Zbkb_orn_cg_cp_rs1_b5, Zbkb_orn_cg_cp_rs1_b5_str) + 80000168: 0008b683 ld x13,0(x17) + 8000016c: 01968c63 beq x13,x25,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e560 .word 0x8000e560 + 80000180: 00000000 .word 0x00000000 + 80000184: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x91371a5dbbbeb937 + 80000188: 0005b303 ld x6,0(x11) + 8000018c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x024e5af82498a045 + 80000190: 0005bc83 ld x25,0(x11) + 80000194: 00858593 addi x11,x11,8 + +0000000080000198 : +Zbkb_orn_cg_cp_rs1_b6: + orn x23, x6, x25 # perform operation + 80000198: 41936bb3 orn x23,x6,x25 + # Check if x23 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x23, Zbkb_orn_cg_cp_rs1_b6, Zbkb_orn_cg_cp_rs1_b6_str) + 8000019c: 0008b683 ld x13,0(x17) + 800001a0: 01768c63 beq x13,x23,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e590 .word 0x8000e590 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x4cfed39cb6acc162 + 800001bc: 0005b383 ld x7,0(x11) + 800001c0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0xbd74266f2d779896 + 800001c4: 0005b603 ld x12,0(x11) + 800001c8: 00858593 addi x11,x11,8 + +00000000800001cc : +Zbkb_orn_cg_cp_rs1_b7: + orn x4, x7, x12 # perform operation + 800001cc: 40c3e233 orn x4,x7,x12 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zbkb_orn_cg_cp_rs1_b7, Zbkb_orn_cg_cp_rs1_b7_str) + 800001d0: 0008b683 ld x13,0(x17) + 800001d4: 00468c63 beq x13,x4,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5c0 .word 0x8000e5c0 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x96d8efbd133696b7 + 800001f0: 0005b403 ld x8,0(x11) + 800001f4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xb2283595db3b6444 + 800001f8: 0005bd03 ld x26,0(x11) + 800001fc: 00858593 addi x11,x11,8 + +0000000080000200 : +Zbkb_orn_cg_cp_rs1_b8: + orn x9, x8, x26 # perform operation + 80000200: 41a464b3 orn x9,x8,x26 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zbkb_orn_cg_cp_rs1_b8, Zbkb_orn_cg_cp_rs1_b8_str) + 80000204: 0008b683 ld x13,0(x17) + 80000208: 00968c63 beq x13,x9,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e5f0 .word 0x8000e5f0 + 8000021c: 00000000 .word 0x00000000 + 80000220: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x88ef0f05c22e209a + 80000224: 0005b483 ld x9,0(x11) + 80000228: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x190393dee4cca341 + 8000022c: 0005bb03 ld x22,0(x11) + 80000230: 00858593 addi x11,x11,8 + +0000000080000234 : +Zbkb_orn_cg_cp_rs1_b9: + orn x8, x9, x22 # perform operation + 80000234: 4164e433 orn x8,x9,x22 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zbkb_orn_cg_cp_rs1_b9, Zbkb_orn_cg_cp_rs1_b9_str) + 80000238: 0008b683 ld x13,0(x17) + 8000023c: 00868c63 beq x13,x8,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e620 .word 0x8000e620 + 80000250: 00000000 .word 0x00000000 + 80000254: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x40cb57a719353de8 + 80000258: 0005b503 ld x10,0(x11) + 8000025c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x36c91685cfd53d6d + 80000260: 0005b983 ld x19,0(x11) + 80000264: 00858593 addi x11,x11,8 + +0000000080000268 : +Zbkb_orn_cg_cp_rs1_b10: + orn x30, x10, x19 # perform operation + 80000268: 41356f33 orn x30,x10,x19 + # Check if x30 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x30, Zbkb_orn_cg_cp_rs1_b10, Zbkb_orn_cg_cp_rs1_b10_str) + 8000026c: 0008b683 ld x13,0(x17) + 80000270: 01e68c63 beq x13,x30,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e651 .word 0x8000e651 + 80000284: 00000000 .word 0x00000000 + 80000288: 00888893 addi x17,x17,8 + + mv x21, x11 # switch data pointer register to avoid conflict with test + 8000028c: 00058a93 addi x21,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x5c010cf9a7a3dc78 + 80000290: 000ab583 ld x11,0(x21) + 80000294: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x98562b0c1af05ab9 + 80000298: 000abd83 ld x27,0(x21) + 8000029c: 008a8a93 addi x21,x21,8 + +00000000800002a0 : +Zbkb_orn_cg_cp_rs1_b11: + orn x16, x11, x27 # perform operation + 800002a0: 41b5e833 orn x16,x11,x27 + # Check if x16 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x16, Zbkb_orn_cg_cp_rs1_b11, Zbkb_orn_cg_cp_rs1_b11_str) + 800002a4: 0008b683 ld x13,0(x17) + 800002a8: 01068c63 beq x13,x16,800002c0 + 800002ac: 2950776f jal x14,80007d40 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 8000e683 .word 0x8000e683 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xa5b27d6995d2f387 + 800002c4: 000ab603 ld x12,0(x21) + 800002c8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x98691d437eee6538 + 800002cc: 000ab383 ld x7,0(x21) + 800002d0: 008a8a93 addi x21,x21,8 + +00000000800002d4 : +Zbkb_orn_cg_cp_rs1_b12: + orn x8, x12, x7 # perform operation + 800002d4: 40766433 orn x8,x12,x7 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zbkb_orn_cg_cp_rs1_b12, Zbkb_orn_cg_cp_rs1_b12_str) + 800002d8: 0008b683 ld x13,0(x17) + 800002dc: 00868c63 beq x13,x8,800002f4 + 800002e0: 2610776f jal x14,80007d40 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 8000e6b5 .word 0x8000e6b5 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002f8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002fc: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xb4de02f330d72c51 + 80000300: 000ab683 ld x13,0(x21) + 80000304: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x78c02cf7f90649b9 + 80000308: 000ab783 ld x15,0(x21) + 8000030c: 008a8a93 addi x21,x21,8 + +0000000080000310 : +Zbkb_orn_cg_cp_rs1_b13: + orn x19, x13, x15 # perform operation + 80000310: 40f6e9b3 orn x19,x13,x15 + # Check if x19 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x19, Zbkb_orn_cg_cp_rs1_b13, Zbkb_orn_cg_cp_rs1_b13_str) + 80000314: 0008b383 ld x7,0(x17) + 80000318: 01338c63 beq x7,x19,80000330 + 8000031c: 1fd0746f jal x8,80007d18 + 80000320: 80000310 .word 0x80000310 + 80000324: 00000000 .word 0x00000000 + 80000328: 8000e6e7 .word 0x8000e6e7 + 8000032c: 00000000 .word 0x00000000 + 80000330: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x25b462a5fd1b6d38 + 80000334: 000ab703 ld x14,0(x21) + 80000338: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xbe9ca9a2fefcf47d + 8000033c: 000ab183 ld x3,0(x21) + 80000340: 008a8a93 addi x21,x21,8 + +0000000080000344 : +Zbkb_orn_cg_cp_rs1_b14: + orn x15, x14, x3 # perform operation + 80000344: 403767b3 orn x15,x14,x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zbkb_orn_cg_cp_rs1_b14, Zbkb_orn_cg_cp_rs1_b14_str) + 80000348: 0008b383 ld x7,0(x17) + 8000034c: 00f38c63 beq x7,x15,80000364 + 80000350: 1c90746f jal x8,80007d18 + 80000354: 80000344 .word 0x80000344 + 80000358: 00000000 .word 0x00000000 + 8000035c: 8000e719 .word 0x8000e719 + 80000360: 00000000 .word 0x00000000 + 80000364: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x980a35018710edb9 + 80000368: 000ab783 ld x15,0(x21) + 8000036c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x5a1f6277d88a0044 + 80000370: 000abe03 ld x28,0(x21) + 80000374: 008a8a93 addi x21,x21,8 + +0000000080000378 : +Zbkb_orn_cg_cp_rs1_b15: + orn x4, x15, x28 # perform operation + 80000378: 41c7e233 orn x4,x15,x28 + # Check if x4 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x4, Zbkb_orn_cg_cp_rs1_b15, Zbkb_orn_cg_cp_rs1_b15_str) + 8000037c: 0008b383 ld x7,0(x17) + 80000380: 00438c63 beq x7,x4,80000398 + 80000384: 1950746f jal x8,80007d18 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e74b .word 0x8000e74b + 80000394: 00000000 .word 0x00000000 + 80000398: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x49b577258b70c5d6 + 8000039c: 000ab803 ld x16,0(x21) + 800003a0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x5bd61f9adf565b99 + 800003a4: 000ab303 ld x6,0(x21) + 800003a8: 008a8a93 addi x21,x21,8 + +00000000800003ac : +Zbkb_orn_cg_cp_rs1_b16: + orn x1, x16, x6 # perform operation + 800003ac: 406860b3 orn x1,x16,x6 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zbkb_orn_cg_cp_rs1_b16, Zbkb_orn_cg_cp_rs1_b16_str) + 800003b0: 0008b383 ld x7,0(x17) + 800003b4: 00138c63 beq x7,x1,800003cc + 800003b8: 1610746f jal x8,80007d18 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 8000e77d .word 0x8000e77d + 800003c8: 00000000 .word 0x00000000 + 800003cc: 00888893 addi x17,x17,8 + + mv x28, x17 # switch signature pointer register to avoid conflict with test + 800003d0: 00088e13 addi x28,x17,0 +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x45174f600ec54fe7 + 800003d4: 000ab883 ld x17,0(x21) + 800003d8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x25859068edd3bfa7 + 800003dc: 000ab103 ld x2,0(x21) + 800003e0: 008a8a93 addi x21,x21,8 + +00000000800003e4 : +Zbkb_orn_cg_cp_rs1_b17: + orn x11, x17, x2 # perform operation + 800003e4: 4028e5b3 orn x11,x17,x2 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zbkb_orn_cg_cp_rs1_b17, Zbkb_orn_cg_cp_rs1_b17_str) + 800003e8: 000e3383 ld x7,0(x28) + 800003ec: 00b38c63 beq x7,x11,80000404 + 800003f0: 1290746f jal x8,80007d18 + 800003f4: 800003e4 .word 0x800003e4 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 8000e7af .word 0x8000e7af + 80000400: 00000000 .word 0x00000000 + 80000404: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x73ed2636a52866e5 + 80000408: 000ab903 ld x18,0(x21) + 8000040c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xa8c5d27cb6d3af74 + 80000410: 000abd03 ld x26,0(x21) + 80000414: 008a8a93 addi x21,x21,8 + +0000000080000418 : +Zbkb_orn_cg_cp_rs1_b18: + orn x5, x18, x26 # perform operation + 80000418: 41a962b3 orn x5,x18,x26 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zbkb_orn_cg_cp_rs1_b18, Zbkb_orn_cg_cp_rs1_b18_str) + 8000041c: 000e3383 ld x7,0(x28) + 80000420: 00538c63 beq x7,x5,80000438 + 80000424: 0f50746f jal x8,80007d18 + 80000428: 80000418 .word 0x80000418 + 8000042c: 00000000 .word 0x00000000 + 80000430: 8000e7e1 .word 0x8000e7e1 + 80000434: 00000000 .word 0x00000000 + 80000438: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x11d43d38cc4dd46c + 8000043c: 000ab983 ld x19,0(x21) + 80000440: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xb7bf4b1d3868af1c + 80000444: 000ab483 ld x9,0(x21) + 80000448: 008a8a93 addi x21,x21,8 + +000000008000044c : +Zbkb_orn_cg_cp_rs1_b19: + orn x14, x19, x9 # perform operation + 8000044c: 4099e733 orn x14,x19,x9 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zbkb_orn_cg_cp_rs1_b19, Zbkb_orn_cg_cp_rs1_b19_str) + 80000450: 000e3383 ld x7,0(x28) + 80000454: 00e38c63 beq x7,x14,8000046c + 80000458: 0c10746f jal x8,80007d18 + 8000045c: 8000044c .word 0x8000044c + 80000460: 00000000 .word 0x00000000 + 80000464: 8000e813 .word 0x8000e813 + 80000468: 00000000 .word 0x00000000 + 8000046c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x7e360c600f6a4736 + 80000470: 000aba03 ld x20,0(x21) + 80000474: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x9730752aa960b4b5 + 80000478: 000ab103 ld x2,0(x21) + 8000047c: 008a8a93 addi x21,x21,8 + +0000000080000480 : +Zbkb_orn_cg_cp_rs1_b20: + orn x17, x20, x2 # perform operation + 80000480: 402a68b3 orn x17,x20,x2 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zbkb_orn_cg_cp_rs1_b20, Zbkb_orn_cg_cp_rs1_b20_str) + 80000484: 000e3383 ld x7,0(x28) + 80000488: 01138c63 beq x7,x17,800004a0 + 8000048c: 08d0746f jal x8,80007d18 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 8000e845 .word 0x8000e845 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008e0e13 addi x28,x28,8 + + mv x10, x21 # switch data pointer register to avoid conflict with test + 800004a4: 000a8513 addi x10,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xa8acc5c333d29155 + 800004a8: 00053a83 ld x21,0(x10) + 800004ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaa1e8962d5d4ed53 + 800004b0: 00053803 ld x16,0(x10) + 800004b4: 00850513 addi x10,x10,8 + +00000000800004b8 : +Zbkb_orn_cg_cp_rs1_b21: + orn x25, x21, x16 # perform operation + 800004b8: 410aecb3 orn x25,x21,x16 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkb_orn_cg_cp_rs1_b21, Zbkb_orn_cg_cp_rs1_b21_str) + 800004bc: 000e3383 ld x7,0(x28) + 800004c0: 01938c63 beq x7,x25,800004d8 + 800004c4: 0550746f jal x8,80007d18 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 8000e877 .word 0x8000e877 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xcd1c710833360398 + 800004dc: 00053b03 ld x22,0(x10) + 800004e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x56c10643efa9b10a + 800004e4: 00053183 ld x3,0(x10) + 800004e8: 00850513 addi x10,x10,8 + +00000000800004ec : +Zbkb_orn_cg_cp_rs1_b22: + orn x30, x22, x3 # perform operation + 800004ec: 403b6f33 orn x30,x22,x3 + # Check if x30 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x30, Zbkb_orn_cg_cp_rs1_b22, Zbkb_orn_cg_cp_rs1_b22_str) + 800004f0: 000e3383 ld x7,0(x28) + 800004f4: 01e38c63 beq x7,x30,8000050c + 800004f8: 0210746f jal x8,80007d18 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 8000e8a9 .word 0x8000e8a9 + 80000508: 00000000 .word 0x00000000 + 8000050c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x2c4164ba7ab61ac8 + 80000510: 00053b83 ld x23,0(x10) + 80000514: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x094b59f7c1f2cba4 + 80000518: 00053083 ld x1,0(x10) + 8000051c: 00850513 addi x10,x10,8 + +0000000080000520 : +Zbkb_orn_cg_cp_rs1_b23: + orn x31, x23, x1 # perform operation + 80000520: 401befb3 orn x31,x23,x1 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zbkb_orn_cg_cp_rs1_b23, Zbkb_orn_cg_cp_rs1_b23_str) + 80000524: 000e3383 ld x7,0(x28) + 80000528: 01f38c63 beq x7,x31,80000540 + 8000052c: 7ec0746f jal x8,80007d18 + 80000530: 80000520 .word 0x80000520 + 80000534: 00000000 .word 0x00000000 + 80000538: 8000e8db .word 0x8000e8db + 8000053c: 00000000 .word 0x00000000 + 80000540: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xa9394ef375edb299 + 80000544: 00053c03 ld x24,0(x10) + 80000548: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x6367a0597d0ba6bc + 8000054c: 00053b03 ld x22,0(x10) + 80000550: 00850513 addi x10,x10,8 + +0000000080000554 : +Zbkb_orn_cg_cp_rs1_b24: + orn x12, x24, x22 # perform operation + 80000554: 416c6633 orn x12,x24,x22 + # Check if x12 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x12, Zbkb_orn_cg_cp_rs1_b24, Zbkb_orn_cg_cp_rs1_b24_str) + 80000558: 000e3383 ld x7,0(x28) + 8000055c: 00c38c63 beq x7,x12,80000574 + 80000560: 7b80746f jal x8,80007d18 + 80000564: 80000554 .word 0x80000554 + 80000568: 00000000 .word 0x00000000 + 8000056c: 8000e90d .word 0x8000e90d + 80000570: 00000000 .word 0x00000000 + 80000574: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x398d857b576df6b1 + 80000578: 00053c83 ld x25,0(x10) + 8000057c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0b8dfb3f3e4a65e9 + 80000580: 00053b03 ld x22,0(x10) + 80000584: 00850513 addi x10,x10,8 + +0000000080000588 : +Zbkb_orn_cg_cp_rs1_b25: + orn x0, x25, x22 # perform operation + 80000588: 416ce033 orn x0,x25,x22 + # Check if x0 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x0, Zbkb_orn_cg_cp_rs1_b25, Zbkb_orn_cg_cp_rs1_b25_str) + 8000058c: 000e3383 ld x7,0(x28) + 80000590: 00038c63 beq x7,x0,800005a8 + 80000594: 7840746f jal x8,80007d18 + 80000598: 80000588 .word 0x80000588 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 8000e93f .word 0x8000e93f + 800005a4: 00000000 .word 0x00000000 + 800005a8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x68b183ab5516f126 + 800005ac: 00053d03 ld x26,0(x10) + 800005b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x82fe2d798a2414da + 800005b4: 00053303 ld x6,0(x10) + 800005b8: 00850513 addi x10,x10,8 + +00000000800005bc : +Zbkb_orn_cg_cp_rs1_b26: + orn x19, x26, x6 # perform operation + 800005bc: 406d69b3 orn x19,x26,x6 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zbkb_orn_cg_cp_rs1_b26, Zbkb_orn_cg_cp_rs1_b26_str) + 800005c0: 000e3383 ld x7,0(x28) + 800005c4: 01338c63 beq x7,x19,800005dc + 800005c8: 7500746f jal x8,80007d18 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 8000e971 .word 0x8000e971 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x06c2dcdb7940d51b + 800005e0: 00053d83 ld x27,0(x10) + 800005e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x94cdfa4bba1ade56 + 800005e8: 00053603 ld x12,0(x10) + 800005ec: 00850513 addi x10,x10,8 + +00000000800005f0 : +Zbkb_orn_cg_cp_rs1_b27: + orn x4, x27, x12 # perform operation + 800005f0: 40cde233 orn x4,x27,x12 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zbkb_orn_cg_cp_rs1_b27, Zbkb_orn_cg_cp_rs1_b27_str) + 800005f4: 000e3383 ld x7,0(x28) + 800005f8: 00438c63 beq x7,x4,80000610 + 800005fc: 71c0746f jal x8,80007d18 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e9a3 .word 0x8000e9a3 + 8000060c: 00000000 .word 0x00000000 + 80000610: 008e0e13 addi x28,x28,8 + + mv x21, x28 # switch signature pointer register to avoid conflict with test + 80000614: 000e0a93 addi x21,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x339d09c1fcf637c1 + 80000618: 00053e03 ld x28,0(x10) + 8000061c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xb3a9a2762d088a8f + 80000620: 00053e83 ld x29,0(x10) + 80000624: 00850513 addi x10,x10,8 + +0000000080000628 : +Zbkb_orn_cg_cp_rs1_b28: + orn x15, x28, x29 # perform operation + 80000628: 41de67b3 orn x15,x28,x29 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zbkb_orn_cg_cp_rs1_b28, Zbkb_orn_cg_cp_rs1_b28_str) + 8000062c: 000ab383 ld x7,0(x21) + 80000630: 00f38c63 beq x7,x15,80000648 + 80000634: 6e40746f jal x8,80007d18 + 80000638: 80000628 .word 0x80000628 + 8000063c: 00000000 .word 0x00000000 + 80000640: 8000e9d5 .word 0x8000e9d5 + 80000644: 00000000 .word 0x00000000 + 80000648: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x558b5f0ee179033b + 8000064c: 00053e83 ld x29,0(x10) + 80000650: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x4722b4851b811210 + 80000654: 00053783 ld x15,0(x10) + 80000658: 00850513 addi x10,x10,8 + +000000008000065c : +Zbkb_orn_cg_cp_rs1_b29: + orn x13, x29, x15 # perform operation + 8000065c: 40fee6b3 orn x13,x29,x15 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zbkb_orn_cg_cp_rs1_b29, Zbkb_orn_cg_cp_rs1_b29_str) + 80000660: 000ab383 ld x7,0(x21) + 80000664: 00d38c63 beq x7,x13,8000067c + 80000668: 6b00746f jal x8,80007d18 + 8000066c: 8000065c .word 0x8000065c + 80000670: 00000000 .word 0x00000000 + 80000674: 8000ea07 .word 0x8000ea07 + 80000678: 00000000 .word 0x00000000 + 8000067c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xebb4e5cb7af0c7f1 + 80000680: 00053f03 ld x30,0(x10) + 80000684: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x2b0968d47486fbc8 + 80000688: 00053303 ld x6,0(x10) + 8000068c: 00850513 addi x10,x10,8 + +0000000080000690 : +Zbkb_orn_cg_cp_rs1_b30: + orn x22, x30, x6 # perform operation + 80000690: 406f6b33 orn x22,x30,x6 + # Check if x22 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x22, Zbkb_orn_cg_cp_rs1_b30, Zbkb_orn_cg_cp_rs1_b30_str) + 80000694: 000ab383 ld x7,0(x21) + 80000698: 01638c63 beq x7,x22,800006b0 + 8000069c: 67c0746f jal x8,80007d18 + 800006a0: 80000690 .word 0x80000690 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 8000ea39 .word 0x8000ea39 + 800006ac: 00000000 .word 0x00000000 + 800006b0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x1f90103ff389ca5a + 800006b4: 00053f83 ld x31,0(x10) + 800006b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x3883afaae2731870 + 800006bc: 00053d83 ld x27,0(x10) + 800006c0: 00850513 addi x10,x10,8 + +00000000800006c4 : +Zbkb_orn_cg_cp_rs1_b31: + orn x19, x31, x27 # perform operation + 800006c4: 41bfe9b3 orn x19,x31,x27 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkb_orn_cg_cp_rs1_b31, Zbkb_orn_cg_cp_rs1_b31_str) + 800006c8: 000ab383 ld x7,0(x21) + 800006cc: 01338c63 beq x7,x19,800006e4 + 800006d0: 6480746f jal x8,80007d18 + 800006d4: 800006c4 .word 0x800006c4 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 8000ea6b .word 0x8000ea6b + 800006e0: 00000000 .word 0x00000000 + 800006e4: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x608c4a16b9acf7a1 + 800006e8: 00053703 ld x14,0(x10) + 800006ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x35de5839b9d889ec + 800006f0: 00053003 ld x0,0(x10) + 800006f4: 00850513 addi x10,x10,8 + +00000000800006f8 : +Zbkb_orn_cg_cp_rs2_b0: + orn x24, x14, x0 # perform operation + 800006f8: 40076c33 orn x24,x14,x0 + # Check if x24 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x24, Zbkb_orn_cg_cp_rs2_b0, Zbkb_orn_cg_cp_rs2_b0_str) + 800006fc: 000ab383 ld x7,0(x21) + 80000700: 01838c63 beq x7,x24,80000718 + 80000704: 6140746f jal x8,80007d18 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 8000ea9d .word 0x8000ea9d + 80000714: 00000000 .word 0x00000000 + 80000718: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xd4b913111241b75d + 8000071c: 00053d83 ld x27,0(x10) + 80000720: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7443781081d28907 + 80000724: 00053083 ld x1,0(x10) + 80000728: 00850513 addi x10,x10,8 + +000000008000072c : +Zbkb_orn_cg_cp_rs2_b1: + orn x13, x27, x1 # perform operation + 8000072c: 401de6b3 orn x13,x27,x1 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zbkb_orn_cg_cp_rs2_b1, Zbkb_orn_cg_cp_rs2_b1_str) + 80000730: 000ab383 ld x7,0(x21) + 80000734: 00d38c63 beq x7,x13,8000074c + 80000738: 5e00746f jal x8,80007d18 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000eace .word 0x8000eace + 80000748: 00000000 .word 0x00000000 + 8000074c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xb7a3a434f72c283f + 80000750: 00053b83 ld x23,0(x10) + 80000754: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x6ad5da84e9f48bfe + 80000758: 00053103 ld x2,0(x10) + 8000075c: 00850513 addi x10,x10,8 + +0000000080000760 : +Zbkb_orn_cg_cp_rs2_b2: + orn x11, x23, x2 # perform operation + 80000760: 402be5b3 orn x11,x23,x2 + # Check if x11 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x11, Zbkb_orn_cg_cp_rs2_b2, Zbkb_orn_cg_cp_rs2_b2_str) + 80000764: 000ab383 ld x7,0(x21) + 80000768: 00b38c63 beq x7,x11,80000780 + 8000076c: 5ac0746f jal x8,80007d18 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eaff .word 0x8000eaff + 8000077c: 00000000 .word 0x00000000 + 80000780: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x3ea111f5d986684d + 80000784: 00053a03 ld x20,0(x10) + 80000788: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xc98a8b4ffbebb82b + 8000078c: 00053183 ld x3,0(x10) + 80000790: 00850513 addi x10,x10,8 + +0000000080000794 : +Zbkb_orn_cg_cp_rs2_b3: + orn x18, x20, x3 # perform operation + 80000794: 403a6933 orn x18,x20,x3 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zbkb_orn_cg_cp_rs2_b3, Zbkb_orn_cg_cp_rs2_b3_str) + 80000798: 000ab383 ld x7,0(x21) + 8000079c: 01238c63 beq x7,x18,800007b4 + 800007a0: 5780746f jal x8,80007d18 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb30 .word 0x8000eb30 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x1779e938d3acbf7a + 800007b8: 00053e03 ld x28,0(x10) + 800007bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xbef8aac0436246ec + 800007c0: 00053203 ld x4,0(x10) + 800007c4: 00850513 addi x10,x10,8 + +00000000800007c8 : +Zbkb_orn_cg_cp_rs2_b4: + orn x12, x28, x4 # perform operation + 800007c8: 404e6633 orn x12,x28,x4 + # Check if x12 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x12, Zbkb_orn_cg_cp_rs2_b4, Zbkb_orn_cg_cp_rs2_b4_str) + 800007cc: 000ab383 ld x7,0(x21) + 800007d0: 00c38c63 beq x7,x12,800007e8 + 800007d4: 5440746f jal x8,80007d18 + 800007d8: 800007c8 .word 0x800007c8 + 800007dc: 00000000 .word 0x00000000 + 800007e0: 8000eb61 .word 0x8000eb61 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xe1c50b760e98fbdc + 800007ec: 00053c03 ld x24,0(x10) + 800007f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x6440dd3a468f5c70 + 800007f4: 00053283 ld x5,0(x10) + 800007f8: 00850513 addi x10,x10,8 + +00000000800007fc : +Zbkb_orn_cg_cp_rs2_b5: + orn x2, x24, x5 # perform operation + 800007fc: 405c6133 orn x2,x24,x5 + # Check if x2 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x2, Zbkb_orn_cg_cp_rs2_b5, Zbkb_orn_cg_cp_rs2_b5_str) + 80000800: 000ab383 ld x7,0(x21) + 80000804: 00238c63 beq x7,x2,8000081c + 80000808: 5100746f jal x8,80007d18 + 8000080c: 800007fc .word 0x800007fc + 80000810: 00000000 .word 0x00000000 + 80000814: 8000eb92 .word 0x8000eb92 + 80000818: 00000000 .word 0x00000000 + 8000081c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x63de2d9c1248fa42 + 80000820: 00053583 ld x11,0(x10) + 80000824: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x843356f3ad9ba789 + 80000828: 00053303 ld x6,0(x10) + 8000082c: 00850513 addi x10,x10,8 + +0000000080000830 : +Zbkb_orn_cg_cp_rs2_b6: + orn x24, x11, x6 # perform operation + 80000830: 4065ec33 orn x24,x11,x6 + # Check if x24 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x24, Zbkb_orn_cg_cp_rs2_b6, Zbkb_orn_cg_cp_rs2_b6_str) + 80000834: 000ab383 ld x7,0(x21) + 80000838: 01838c63 beq x7,x24,80000850 + 8000083c: 4dc0746f jal x8,80007d18 + 80000840: 80000830 .word 0x80000830 + 80000844: 00000000 .word 0x00000000 + 80000848: 8000ebc3 .word 0x8000ebc3 + 8000084c: 00000000 .word 0x00000000 + 80000850: 008a8a93 addi x21,x21,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000854: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000858: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xb145c1a66d691279 + 8000085c: 00053783 ld x15,0(x10) + 80000860: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xabee52e711dcbfb5 + 80000864: 00053383 ld x7,0(x10) + 80000868: 00850513 addi x10,x10,8 + +000000008000086c : +Zbkb_orn_cg_cp_rs2_b7: + orn x28, x15, x7 # perform operation + 8000086c: 4077ee33 orn x28,x15,x7 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zbkb_orn_cg_cp_rs2_b7, Zbkb_orn_cg_cp_rs2_b7_str) + 80000870: 000ab203 ld x4,0(x21) + 80000874: 01c20c63 beq x4,x28,8000088c + 80000878: 488072ef jal x5,80007d00 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000ebf4 .word 0x8000ebf4 + 80000888: 00000000 .word 0x00000000 + 8000088c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x2c8c57152caf4920 + 80000890: 00053d83 ld x27,0(x10) + 80000894: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x7ff0ae3ddd645d59 + 80000898: 00053403 ld x8,0(x10) + 8000089c: 00850513 addi x10,x10,8 + +00000000800008a0 : +Zbkb_orn_cg_cp_rs2_b8: + orn x3, x27, x8 # perform operation + 800008a0: 408de1b3 orn x3,x27,x8 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zbkb_orn_cg_cp_rs2_b8, Zbkb_orn_cg_cp_rs2_b8_str) + 800008a4: 000ab203 ld x4,0(x21) + 800008a8: 00320c63 beq x4,x3,800008c0 + 800008ac: 454072ef jal x5,80007d00 + 800008b0: 800008a0 .word 0x800008a0 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 8000ec25 .word 0x8000ec25 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x4e66c31172a574d3 + 800008c4: 00053003 ld x0,0(x10) + 800008c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x24f6cf2d07383e10 + 800008cc: 00053483 ld x9,0(x10) + 800008d0: 00850513 addi x10,x10,8 + +00000000800008d4 : +Zbkb_orn_cg_cp_rs2_b9: + orn x8, x0, x9 # perform operation + 800008d4: 40906433 orn x8,x0,x9 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zbkb_orn_cg_cp_rs2_b9, Zbkb_orn_cg_cp_rs2_b9_str) + 800008d8: 000ab203 ld x4,0(x21) + 800008dc: 00820c63 beq x4,x8,800008f4 + 800008e0: 420072ef jal x5,80007d00 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 8000ec56 .word 0x8000ec56 + 800008f0: 00000000 .word 0x00000000 + 800008f4: 008a8a93 addi x21,x21,8 + + mv x1, x10 # switch data pointer register to avoid conflict with test + 800008f8: 00050093 addi x1,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8b1f6d3f6fef5201 + 800008fc: 0000bb03 ld x22,0(x1) + 80000900: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xee396382a3bc46dd + 80000904: 0000b503 ld x10,0(x1) + 80000908: 00808093 addi x1,x1,8 + +000000008000090c : +Zbkb_orn_cg_cp_rs2_b10: + orn x15, x22, x10 # perform operation + 8000090c: 40ab67b3 orn x15,x22,x10 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zbkb_orn_cg_cp_rs2_b10, Zbkb_orn_cg_cp_rs2_b10_str) + 80000910: 000ab203 ld x4,0(x21) + 80000914: 00f20c63 beq x4,x15,8000092c + 80000918: 3e8072ef jal x5,80007d00 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 8000ec87 .word 0x8000ec87 + 80000928: 00000000 .word 0x00000000 + 8000092c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xc664b2262c73a4b2 + 80000930: 0000bf03 ld x30,0(x1) + 80000934: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xbd8085d19351e0ff + 80000938: 0000b583 ld x11,0(x1) + 8000093c: 00808093 addi x1,x1,8 + +0000000080000940 : +Zbkb_orn_cg_cp_rs2_b11: + orn x18, x30, x11 # perform operation + 80000940: 40bf6933 orn x18,x30,x11 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkb_orn_cg_cp_rs2_b11, Zbkb_orn_cg_cp_rs2_b11_str) + 80000944: 000ab203 ld x4,0(x21) + 80000948: 01220c63 beq x4,x18,80000960 + 8000094c: 3b4072ef jal x5,80007d00 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 8000ecb9 .word 0x8000ecb9 + 8000095c: 00000000 .word 0x00000000 + 80000960: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xe8fa6584f8f19746 + 80000964: 0000b303 ld x6,0(x1) + 80000968: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x54e49aea594f9569 + 8000096c: 0000b603 ld x12,0(x1) + 80000970: 00808093 addi x1,x1,8 + +0000000080000974 : +Zbkb_orn_cg_cp_rs2_b12: + orn x29, x6, x12 # perform operation + 80000974: 40c36eb3 orn x29,x6,x12 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zbkb_orn_cg_cp_rs2_b12, Zbkb_orn_cg_cp_rs2_b12_str) + 80000978: 000ab203 ld x4,0(x21) + 8000097c: 01d20c63 beq x4,x29,80000994 + 80000980: 380072ef jal x5,80007d00 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000eceb .word 0x8000eceb + 80000990: 00000000 .word 0x00000000 + 80000994: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xb2b9e2f776096798 + 80000998: 0000be83 ld x29,0(x1) + 8000099c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x7ebf911c143d66fc + 800009a0: 0000b683 ld x13,0(x1) + 800009a4: 00808093 addi x1,x1,8 + +00000000800009a8 : +Zbkb_orn_cg_cp_rs2_b13: + orn x3, x29, x13 # perform operation + 800009a8: 40dee1b3 orn x3,x29,x13 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zbkb_orn_cg_cp_rs2_b13, Zbkb_orn_cg_cp_rs2_b13_str) + 800009ac: 000ab203 ld x4,0(x21) + 800009b0: 00320c63 beq x4,x3,800009c8 + 800009b4: 34c072ef jal x5,80007d00 + 800009b8: 800009a8 .word 0x800009a8 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 8000ed1d .word 0x8000ed1d + 800009c4: 00000000 .word 0x00000000 + 800009c8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x393389d094479dd2 + 800009cc: 0000b303 ld x6,0(x1) + 800009d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x736cf19918969dbf + 800009d4: 0000b703 ld x14,0(x1) + 800009d8: 00808093 addi x1,x1,8 + +00000000800009dc : +Zbkb_orn_cg_cp_rs2_b14: + orn x22, x6, x14 # perform operation + 800009dc: 40e36b33 orn x22,x6,x14 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zbkb_orn_cg_cp_rs2_b14, Zbkb_orn_cg_cp_rs2_b14_str) + 800009e0: 000ab203 ld x4,0(x21) + 800009e4: 01620c63 beq x4,x22,800009fc + 800009e8: 318072ef jal x5,80007d00 + 800009ec: 800009dc .word 0x800009dc + 800009f0: 00000000 .word 0x00000000 + 800009f4: 8000ed4f .word 0x8000ed4f + 800009f8: 00000000 .word 0x00000000 + 800009fc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8dfeb6067e61ca95 + 80000a00: 0000bb03 ld x22,0(x1) + 80000a04: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x9bf8b9e12f50caa9 + 80000a08: 0000b783 ld x15,0(x1) + 80000a0c: 00808093 addi x1,x1,8 + +0000000080000a10 : +Zbkb_orn_cg_cp_rs2_b15: + orn x12, x22, x15 # perform operation + 80000a10: 40fb6633 orn x12,x22,x15 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zbkb_orn_cg_cp_rs2_b15, Zbkb_orn_cg_cp_rs2_b15_str) + 80000a14: 000ab203 ld x4,0(x21) + 80000a18: 00c20c63 beq x4,x12,80000a30 + 80000a1c: 2e4072ef jal x5,80007d00 + 80000a20: 80000a10 .word 0x80000a10 + 80000a24: 00000000 .word 0x00000000 + 80000a28: 8000ed81 .word 0x8000ed81 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xea0af178dbeb92c6 + 80000a34: 0000bf83 ld x31,0(x1) + 80000a38: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x3a8823237093db86 + 80000a3c: 0000b803 ld x16,0(x1) + 80000a40: 00808093 addi x1,x1,8 + +0000000080000a44 : +Zbkb_orn_cg_cp_rs2_b16: + orn x20, x31, x16 # perform operation + 80000a44: 410fea33 orn x20,x31,x16 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkb_orn_cg_cp_rs2_b16, Zbkb_orn_cg_cp_rs2_b16_str) + 80000a48: 000ab203 ld x4,0(x21) + 80000a4c: 01420c63 beq x4,x20,80000a64 + 80000a50: 2b0072ef jal x5,80007d00 + 80000a54: 80000a44 .word 0x80000a44 + 80000a58: 00000000 .word 0x00000000 + 80000a5c: 8000edb3 .word 0x8000edb3 + 80000a60: 00000000 .word 0x00000000 + 80000a64: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x791e00e89ecd16b1 + 80000a68: 0000b703 ld x14,0(x1) + 80000a6c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xf84f3b4b9a780ff8 + 80000a70: 0000b883 ld x17,0(x1) + 80000a74: 00808093 addi x1,x1,8 + +0000000080000a78 : +Zbkb_orn_cg_cp_rs2_b17: + orn x0, x14, x17 # perform operation + 80000a78: 41176033 orn x0,x14,x17 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zbkb_orn_cg_cp_rs2_b17, Zbkb_orn_cg_cp_rs2_b17_str) + 80000a7c: 000ab203 ld x4,0(x21) + 80000a80: 00020c63 beq x4,x0,80000a98 + 80000a84: 27c072ef jal x5,80007d00 + 80000a88: 80000a78 .word 0x80000a78 + 80000a8c: 00000000 .word 0x00000000 + 80000a90: 8000ede5 .word 0x8000ede5 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xb86af1335ba44004 + 80000a9c: 0000ba03 ld x20,0(x1) + 80000aa0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x31f6d73d4c7ba28c + 80000aa4: 0000b903 ld x18,0(x1) + 80000aa8: 00808093 addi x1,x1,8 + +0000000080000aac : +Zbkb_orn_cg_cp_rs2_b18: + orn x12, x20, x18 # perform operation + 80000aac: 412a6633 orn x12,x20,x18 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zbkb_orn_cg_cp_rs2_b18, Zbkb_orn_cg_cp_rs2_b18_str) + 80000ab0: 000ab203 ld x4,0(x21) + 80000ab4: 00c20c63 beq x4,x12,80000acc + 80000ab8: 248072ef jal x5,80007d00 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 8000ee17 .word 0x8000ee17 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x4dbe1e0e1a785e03 + 80000ad0: 0000b603 ld x12,0(x1) + 80000ad4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x61f4aec962d6691d + 80000ad8: 0000b983 ld x19,0(x1) + 80000adc: 00808093 addi x1,x1,8 + +0000000080000ae0 : +Zbkb_orn_cg_cp_rs2_b19: + orn x30, x12, x19 # perform operation + 80000ae0: 41366f33 orn x30,x12,x19 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zbkb_orn_cg_cp_rs2_b19, Zbkb_orn_cg_cp_rs2_b19_str) + 80000ae4: 000ab203 ld x4,0(x21) + 80000ae8: 01e20c63 beq x4,x30,80000b00 + 80000aec: 214072ef jal x5,80007d00 + 80000af0: 80000ae0 .word 0x80000ae0 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 8000ee49 .word 0x8000ee49 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x9d161268449d3748 + 80000b04: 0000b503 ld x10,0(x1) + 80000b08: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x70d13ff426a09f83 + 80000b0c: 0000ba03 ld x20,0(x1) + 80000b10: 00808093 addi x1,x1,8 + +0000000080000b14 : +Zbkb_orn_cg_cp_rs2_b20: + orn x18, x10, x20 # perform operation + 80000b14: 41456933 orn x18,x10,x20 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkb_orn_cg_cp_rs2_b20, Zbkb_orn_cg_cp_rs2_b20_str) + 80000b18: 000ab203 ld x4,0(x21) + 80000b1c: 01220c63 beq x4,x18,80000b34 + 80000b20: 1e0072ef jal x5,80007d00 + 80000b24: 80000b14 .word 0x80000b14 + 80000b28: 00000000 .word 0x00000000 + 80000b2c: 8000ee7b .word 0x8000ee7b + 80000b30: 00000000 .word 0x00000000 + 80000b34: 008a8a93 addi x21,x21,8 + + mv x12, x21 # switch signature pointer register to avoid conflict with test + 80000b38: 000a8613 addi x12,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x6f6efdc7e14ee512 + 80000b3c: 0000bb03 ld x22,0(x1) + 80000b40: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x5a1f3b1b623861c5 + 80000b44: 0000ba83 ld x21,0(x1) + 80000b48: 00808093 addi x1,x1,8 + +0000000080000b4c : +Zbkb_orn_cg_cp_rs2_b21: + orn x28, x22, x21 # perform operation + 80000b4c: 415b6e33 orn x28,x22,x21 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cp_rs2_b21, Zbkb_orn_cg_cp_rs2_b21_str) + 80000b50: 00063203 ld x4,0(x12) + 80000b54: 01c20c63 beq x4,x28,80000b6c + 80000b58: 1a8072ef jal x5,80007d00 + 80000b5c: 80000b4c .word 0x80000b4c + 80000b60: 00000000 .word 0x00000000 + 80000b64: 8000eead .word 0x8000eead + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xe2320903ee9c67e7 + 80000b70: 0000b703 ld x14,0(x1) + 80000b74: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7c9db631c8ec8a51 + 80000b78: 0000bb03 ld x22,0(x1) + 80000b7c: 00808093 addi x1,x1,8 + +0000000080000b80 : +Zbkb_orn_cg_cp_rs2_b22: + orn x16, x14, x22 # perform operation + 80000b80: 41676833 orn x16,x14,x22 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zbkb_orn_cg_cp_rs2_b22, Zbkb_orn_cg_cp_rs2_b22_str) + 80000b84: 00063203 ld x4,0(x12) + 80000b88: 01020c63 beq x4,x16,80000ba0 + 80000b8c: 174072ef jal x5,80007d00 + 80000b90: 80000b80 .word 0x80000b80 + 80000b94: 00000000 .word 0x00000000 + 80000b98: 8000eedf .word 0x8000eedf + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x02e9bb488b2ef429 + 80000ba4: 0000b183 ld x3,0(x1) + 80000ba8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xa75f12e88de42d0d + 80000bac: 0000bb83 ld x23,0(x1) + 80000bb0: 00808093 addi x1,x1,8 + +0000000080000bb4 : +Zbkb_orn_cg_cp_rs2_b23: + orn x29, x3, x23 # perform operation + 80000bb4: 4171eeb3 orn x29,x3,x23 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cp_rs2_b23, Zbkb_orn_cg_cp_rs2_b23_str) + 80000bb8: 00063203 ld x4,0(x12) + 80000bbc: 01d20c63 beq x4,x29,80000bd4 + 80000bc0: 140072ef jal x5,80007d00 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 8000ef11 .word 0x8000ef11 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xa506cbc8753edea9 + 80000bd8: 0000b783 ld x15,0(x1) + 80000bdc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x30ab1d9f0aca00bb + 80000be0: 0000bc03 ld x24,0(x1) + 80000be4: 00808093 addi x1,x1,8 + +0000000080000be8 : +Zbkb_orn_cg_cp_rs2_b24: + orn x29, x15, x24 # perform operation + 80000be8: 4187eeb3 orn x29,x15,x24 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cp_rs2_b24, Zbkb_orn_cg_cp_rs2_b24_str) + 80000bec: 00063203 ld x4,0(x12) + 80000bf0: 01d20c63 beq x4,x29,80000c08 + 80000bf4: 10c072ef jal x5,80007d00 + 80000bf8: 80000be8 .word 0x80000be8 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 8000ef43 .word 0x8000ef43 + 80000c04: 00000000 .word 0x00000000 + 80000c08: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x8219e2b3c1db2186 + 80000c0c: 0000b103 ld x2,0(x1) + 80000c10: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x643fa8b51067bb6f + 80000c14: 0000bc83 ld x25,0(x1) + 80000c18: 00808093 addi x1,x1,8 + +0000000080000c1c : +Zbkb_orn_cg_cp_rs2_b25: + orn x20, x2, x25 # perform operation + 80000c1c: 41916a33 orn x20,x2,x25 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_orn_cg_cp_rs2_b25, Zbkb_orn_cg_cp_rs2_b25_str) + 80000c20: 00063203 ld x4,0(x12) + 80000c24: 01420c63 beq x4,x20,80000c3c + 80000c28: 0d8072ef jal x5,80007d00 + 80000c2c: 80000c1c .word 0x80000c1c + 80000c30: 00000000 .word 0x00000000 + 80000c34: 8000ef75 .word 0x8000ef75 + 80000c38: 00000000 .word 0x00000000 + 80000c3c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xcadd3c5feca853f2 + 80000c40: 0000b103 ld x2,0(x1) + 80000c44: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xa22bba7d41a76bbe + 80000c48: 0000bd03 ld x26,0(x1) + 80000c4c: 00808093 addi x1,x1,8 + +0000000080000c50 : +Zbkb_orn_cg_cp_rs2_b26: + orn x10, x2, x26 # perform operation + 80000c50: 41a16533 orn x10,x2,x26 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkb_orn_cg_cp_rs2_b26, Zbkb_orn_cg_cp_rs2_b26_str) + 80000c54: 00063203 ld x4,0(x12) + 80000c58: 00a20c63 beq x4,x10,80000c70 + 80000c5c: 0a4072ef jal x5,80007d00 + 80000c60: 80000c50 .word 0x80000c50 + 80000c64: 00000000 .word 0x00000000 + 80000c68: 8000efa7 .word 0x8000efa7 + 80000c6c: 00000000 .word 0x00000000 + 80000c70: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x4133486b40521bde + 80000c74: 0000bb03 ld x22,0(x1) + 80000c78: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x1eba8884fcbf4246 + 80000c7c: 0000bd83 ld x27,0(x1) + 80000c80: 00808093 addi x1,x1,8 + +0000000080000c84 : +Zbkb_orn_cg_cp_rs2_b27: + orn x9, x22, x27 # perform operation + 80000c84: 41bb64b3 orn x9,x22,x27 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_orn_cg_cp_rs2_b27, Zbkb_orn_cg_cp_rs2_b27_str) + 80000c88: 00063203 ld x4,0(x12) + 80000c8c: 00920c63 beq x4,x9,80000ca4 + 80000c90: 070072ef jal x5,80007d00 + 80000c94: 80000c84 .word 0x80000c84 + 80000c98: 00000000 .word 0x00000000 + 80000c9c: 8000efd9 .word 0x8000efd9 + 80000ca0: 00000000 .word 0x00000000 + 80000ca4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x78e3b2b921dd9019 + 80000ca8: 0000bc83 ld x25,0(x1) + 80000cac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x36f32f7f267d292f + 80000cb0: 0000be03 ld x28,0(x1) + 80000cb4: 00808093 addi x1,x1,8 + +0000000080000cb8 : +Zbkb_orn_cg_cp_rs2_b28: + orn x9, x25, x28 # perform operation + 80000cb8: 41cce4b3 orn x9,x25,x28 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkb_orn_cg_cp_rs2_b28, Zbkb_orn_cg_cp_rs2_b28_str) + 80000cbc: 00063203 ld x4,0(x12) + 80000cc0: 00920c63 beq x4,x9,80000cd8 + 80000cc4: 03c072ef jal x5,80007d00 + 80000cc8: 80000cb8 .word 0x80000cb8 + 80000ccc: 00000000 .word 0x00000000 + 80000cd0: 8000f00b .word 0x8000f00b + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xb40ab04d519d16db + 80000cdc: 0000b803 ld x16,0(x1) + 80000ce0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x93d92597b130f14a + 80000ce4: 0000be83 ld x29,0(x1) + 80000ce8: 00808093 addi x1,x1,8 + +0000000080000cec : +Zbkb_orn_cg_cp_rs2_b29: + orn x0, x16, x29 # perform operation + 80000cec: 41d86033 orn x0,x16,x29 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkb_orn_cg_cp_rs2_b29, Zbkb_orn_cg_cp_rs2_b29_str) + 80000cf0: 00063203 ld x4,0(x12) + 80000cf4: 00020c63 beq x4,x0,80000d0c + 80000cf8: 008072ef jal x5,80007d00 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 8000f03d .word 0x8000f03d + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x47e0a0e164b44a97 + 80000d10: 0000b183 ld x3,0(x1) + 80000d14: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x3deba8788057d73f + 80000d18: 0000bf03 ld x30,0(x1) + 80000d1c: 00808093 addi x1,x1,8 + +0000000080000d20 : +Zbkb_orn_cg_cp_rs2_b30: + orn x23, x3, x30 # perform operation + 80000d20: 41e1ebb3 orn x23,x3,x30 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_orn_cg_cp_rs2_b30, Zbkb_orn_cg_cp_rs2_b30_str) + 80000d24: 00063203 ld x4,0(x12) + 80000d28: 01720c63 beq x4,x23,80000d40 + 80000d2c: 7d5062ef jal x5,80007d00 + 80000d30: 80000d20 .word 0x80000d20 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 8000f06f .word 0x8000f06f + 80000d3c: 00000000 .word 0x00000000 + 80000d40: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x9dc69551995886a7 + 80000d44: 0000b683 ld x13,0(x1) + 80000d48: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x89e0526803a0a109 + 80000d4c: 0000bf83 ld x31,0(x1) + 80000d50: 00808093 addi x1,x1,8 + +0000000080000d54 : +Zbkb_orn_cg_cp_rs2_b31: + orn x8, x13, x31 # perform operation + 80000d54: 41f6e433 orn x8,x13,x31 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkb_orn_cg_cp_rs2_b31, Zbkb_orn_cg_cp_rs2_b31_str) + 80000d58: 00063203 ld x4,0(x12) + 80000d5c: 00820c63 beq x4,x8,80000d74 + 80000d60: 7a1062ef jal x5,80007d00 + 80000d64: 80000d54 .word 0x80000d54 + 80000d68: 00000000 .word 0x00000000 + 80000d6c: 8000f0a1 .word 0x8000f0a1 + 80000d70: 00000000 .word 0x00000000 + 80000d74: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x42151d40ba47dce0 + 80000d78: 0000b483 ld x9,0(x1) + 80000d7c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x9d9b5538bb255701 + 80000d80: 0000ba03 ld x20,0(x1) + 80000d84: 00808093 addi x1,x1,8 + +0000000080000d88 : +Zbkb_orn_cg_cp_rd_b0: + orn x0, x9, x20 # perform operation + 80000d88: 4144e033 orn x0,x9,x20 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkb_orn_cg_cp_rd_b0, Zbkb_orn_cg_cp_rd_b0_str) + 80000d8c: 00063203 ld x4,0(x12) + 80000d90: 00020c63 beq x4,x0,80000da8 + 80000d94: 76d062ef jal x5,80007d00 + 80000d98: 80000d88 .word 0x80000d88 + 80000d9c: 00000000 .word 0x00000000 + 80000da0: 8000f0d3 .word 0x8000f0d3 + 80000da4: 00000000 .word 0x00000000 + 80000da8: 00860613 addi x12,x12,8 + + mv x20, x1 # switch data pointer register to avoid conflict with test + 80000dac: 00008a13 addi x20,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0xf41a5b4541c8f7db + 80000db0: 000a3383 ld x7,0(x20) + 80000db4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x4f17d27822458550 + 80000db8: 000a3c83 ld x25,0(x20) + 80000dbc: 008a0a13 addi x20,x20,8 + +0000000080000dc0 : +Zbkb_orn_cg_cp_rd_b1: + orn x1, x7, x25 # perform operation + 80000dc0: 4193e0b3 orn x1,x7,x25 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cp_rd_b1, Zbkb_orn_cg_cp_rd_b1_str) + 80000dc4: 00063203 ld x4,0(x12) + 80000dc8: 00120c63 beq x4,x1,80000de0 + 80000dcc: 735062ef jal x5,80007d00 + 80000dd0: 80000dc0 .word 0x80000dc0 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 8000f103 .word 0x8000f103 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xb4241f08b424494e + 80000de4: 000a3503 ld x10,0(x20) + 80000de8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x793144410bf69fc3 + 80000dec: 000a3003 ld x0,0(x20) + 80000df0: 008a0a13 addi x20,x20,8 + +0000000080000df4 : +Zbkb_orn_cg_cp_rd_b2: + orn x2, x10, x0 # perform operation + 80000df4: 40056133 orn x2,x10,x0 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cp_rd_b2, Zbkb_orn_cg_cp_rd_b2_str) + 80000df8: 00063203 ld x4,0(x12) + 80000dfc: 00220c63 beq x4,x2,80000e14 + 80000e00: 701062ef jal x5,80007d00 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 8000f133 .word 0x8000f133 + 80000e10: 00000000 .word 0x00000000 + 80000e14: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x6093cad17b09d424 + 80000e18: 000a3b03 ld x22,0(x20) + 80000e1c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xc729fa55842309d0 + 80000e20: 000a3003 ld x0,0(x20) + 80000e24: 008a0a13 addi x20,x20,8 + +0000000080000e28 : +Zbkb_orn_cg_cp_rd_b3: + orn x3, x22, x0 # perform operation + 80000e28: 400b61b3 orn x3,x22,x0 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cp_rd_b3, Zbkb_orn_cg_cp_rd_b3_str) + 80000e2c: 00063203 ld x4,0(x12) + 80000e30: 00320c63 beq x4,x3,80000e48 + 80000e34: 6cd062ef jal x5,80007d00 + 80000e38: 80000e28 .word 0x80000e28 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 8000f163 .word 0x8000f163 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e4c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e50: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xe28bdeb8091ba278 + 80000e54: 000a3283 ld x5,0(x20) + 80000e58: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x0c99822c64b0f001 + 80000e5c: 000a3d03 ld x26,0(x20) + 80000e60: 008a0a13 addi x20,x20,8 + +0000000080000e64 : +Zbkb_orn_cg_cp_rd_b4: + orn x4, x5, x26 # perform operation + 80000e64: 41a2e233 orn x4,x5,x26 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zbkb_orn_cg_cp_rd_b4, Zbkb_orn_cg_cp_rd_b4_str) + 80000e68: 00063683 ld x13,0(x12) + 80000e6c: 00468c63 beq x13,x4,80000e84 + 80000e70: 6d10676f jal x14,80007d40 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 8000f193 .word 0x8000f193 + 80000e80: 00000000 .word 0x00000000 + 80000e84: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xbe38512a1da8082c + 80000e88: 000a3103 ld x2,0(x20) + 80000e8c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x54b822fcef47bf0c + 80000e90: 000a3303 ld x6,0(x20) + 80000e94: 008a0a13 addi x20,x20,8 + +0000000080000e98 : +Zbkb_orn_cg_cp_rd_b5: + orn x5, x2, x6 # perform operation + 80000e98: 406162b3 orn x5,x2,x6 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zbkb_orn_cg_cp_rd_b5, Zbkb_orn_cg_cp_rd_b5_str) + 80000e9c: 00063683 ld x13,0(x12) + 80000ea0: 00568c63 beq x13,x5,80000eb8 + 80000ea4: 69d0676f jal x14,80007d40 + 80000ea8: 80000e98 .word 0x80000e98 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 8000f1c3 .word 0x8000f1c3 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xaa9565f1fe496166 + 80000ebc: 000a3083 ld x1,0(x20) + 80000ec0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xbf6c7537de01a673 + 80000ec4: 000a3383 ld x7,0(x20) + 80000ec8: 008a0a13 addi x20,x20,8 + +0000000080000ecc : +Zbkb_orn_cg_cp_rd_b6: + orn x6, x1, x7 # perform operation + 80000ecc: 4070e333 orn x6,x1,x7 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zbkb_orn_cg_cp_rd_b6, Zbkb_orn_cg_cp_rd_b6_str) + 80000ed0: 00063683 ld x13,0(x12) + 80000ed4: 00668c63 beq x13,x6,80000eec + 80000ed8: 6690676f jal x14,80007d40 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 8000f1f3 .word 0x8000f1f3 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x219eedaf779cfd3b + 80000ef0: 000a3103 ld x2,0(x20) + 80000ef4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x935f46fed2ac46e7 + 80000ef8: 000a3d83 ld x27,0(x20) + 80000efc: 008a0a13 addi x20,x20,8 + +0000000080000f00 : +Zbkb_orn_cg_cp_rd_b7: + orn x7, x2, x27 # perform operation + 80000f00: 41b163b3 orn x7,x2,x27 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkb_orn_cg_cp_rd_b7, Zbkb_orn_cg_cp_rd_b7_str) + 80000f04: 00063683 ld x13,0(x12) + 80000f08: 00768c63 beq x13,x7,80000f20 + 80000f0c: 6350676f jal x14,80007d40 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 8000f223 .word 0x8000f223 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xe431ee384d355f4e + 80000f24: 000a3203 ld x4,0(x20) + 80000f28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x1f8e29609e72e294 + 80000f2c: 000a3803 ld x16,0(x20) + 80000f30: 008a0a13 addi x20,x20,8 + +0000000080000f34 : +Zbkb_orn_cg_cp_rd_b8: + orn x8, x4, x16 # perform operation + 80000f34: 41026433 orn x8,x4,x16 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkb_orn_cg_cp_rd_b8, Zbkb_orn_cg_cp_rd_b8_str) + 80000f38: 00063683 ld x13,0(x12) + 80000f3c: 00868c63 beq x13,x8,80000f54 + 80000f40: 6010676f jal x14,80007d40 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 8000f253 .word 0x8000f253 + 80000f50: 00000000 .word 0x00000000 + 80000f54: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x4b5cfef4d7d94a8b + 80000f58: 000a3583 ld x11,0(x20) + 80000f5c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x04e39fabe6d8723e + 80000f60: 000a3503 ld x10,0(x20) + 80000f64: 008a0a13 addi x20,x20,8 + +0000000080000f68 : +Zbkb_orn_cg_cp_rd_b9: + orn x9, x11, x10 # perform operation + 80000f68: 40a5e4b3 orn x9,x11,x10 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkb_orn_cg_cp_rd_b9, Zbkb_orn_cg_cp_rd_b9_str) + 80000f6c: 00063683 ld x13,0(x12) + 80000f70: 00968c63 beq x13,x9,80000f88 + 80000f74: 5cd0676f jal x14,80007d40 + 80000f78: 80000f68 .word 0x80000f68 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 8000f283 .word 0x8000f283 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x5ac377edd4eda232 + 80000f8c: 000a3203 ld x4,0(x20) + 80000f90: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xc6b7083bd6ad2363 + 80000f94: 000a3883 ld x17,0(x20) + 80000f98: 008a0a13 addi x20,x20,8 + +0000000080000f9c : +Zbkb_orn_cg_cp_rd_b10: + orn x10, x4, x17 # perform operation + 80000f9c: 41126533 orn x10,x4,x17 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkb_orn_cg_cp_rd_b10, Zbkb_orn_cg_cp_rd_b10_str) + 80000fa0: 00063683 ld x13,0(x12) + 80000fa4: 00a68c63 beq x13,x10,80000fbc + 80000fa8: 5990676f jal x14,80007d40 + 80000fac: 80000f9c .word 0x80000f9c + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 8000f2b3 .word 0x8000f2b3 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x8940323a0c23f9ca + 80000fc0: 000a3383 ld x7,0(x20) + 80000fc4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xcabb00d8ea8a0292 + 80000fc8: 000a3b03 ld x22,0(x20) + 80000fcc: 008a0a13 addi x20,x20,8 + +0000000080000fd0 : +Zbkb_orn_cg_cp_rd_b11: + orn x11, x7, x22 # perform operation + 80000fd0: 4163e5b3 orn x11,x7,x22 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_orn_cg_cp_rd_b11, Zbkb_orn_cg_cp_rd_b11_str) + 80000fd4: 00063683 ld x13,0(x12) + 80000fd8: 00b68c63 beq x13,x11,80000ff0 + 80000fdc: 5650676f jal x14,80007d40 + 80000fe0: 80000fd0 .word 0x80000fd0 + 80000fe4: 00000000 .word 0x00000000 + 80000fe8: 8000f2e4 .word 0x8000f2e4 + 80000fec: 00000000 .word 0x00000000 + 80000ff0: 00860613 addi x12,x12,8 + + mv x26, x12 # switch signature pointer register to avoid conflict with test + 80000ff4: 00060d13 addi x26,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x7ad27ff3ff39a51f + 80000ff8: 000a3483 ld x9,0(x20) + 80000ffc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0397e7ef43d9ef94 + 80001000: 000a3b83 ld x23,0(x20) + 80001004: 008a0a13 addi x20,x20,8 + +0000000080001008 : +Zbkb_orn_cg_cp_rd_b12: + orn x12, x9, x23 # perform operation + 80001008: 4174e633 orn x12,x9,x23 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zbkb_orn_cg_cp_rd_b12, Zbkb_orn_cg_cp_rd_b12_str) + 8000100c: 000d3683 ld x13,0(x26) + 80001010: 00c68c63 beq x13,x12,80001028 + 80001014: 52d0676f jal x14,80007d40 + 80001018: 80001008 .word 0x80001008 + 8000101c: 00000000 .word 0x00000000 + 80001020: 8000f315 .word 0x8000f315 + 80001024: 00000000 .word 0x00000000 + 80001028: 008d0d13 addi x26,x26,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000102c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001030: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x526d050c8b077fae + 80001034: 000a3c83 ld x25,0(x20) + 80001038: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x9c5e5e3ee2cb8bee + 8000103c: 000a3f03 ld x30,0(x20) + 80001040: 008a0a13 addi x20,x20,8 + +0000000080001044 : +Zbkb_orn_cg_cp_rd_b13: + orn x13, x25, x30 # perform operation + 80001044: 41ece6b3 orn x13,x25,x30 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zbkb_orn_cg_cp_rd_b13, Zbkb_orn_cg_cp_rd_b13_str) + 80001048: 000d3383 ld x7,0(x26) + 8000104c: 00d38c63 beq x7,x13,80001064 + 80001050: 4c90646f jal x8,80007d18 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 8000f346 .word 0x8000f346 + 80001060: 00000000 .word 0x00000000 + 80001064: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x16f212f182c31c75 + 80001068: 000a3883 ld x17,0(x20) + 8000106c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x652af749b25a8bb5 + 80001070: 000a3b83 ld x23,0(x20) + 80001074: 008a0a13 addi x20,x20,8 + +0000000080001078 : +Zbkb_orn_cg_cp_rd_b14: + orn x14, x17, x23 # perform operation + 80001078: 4178e733 orn x14,x17,x23 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zbkb_orn_cg_cp_rd_b14, Zbkb_orn_cg_cp_rd_b14_str) + 8000107c: 000d3383 ld x7,0(x26) + 80001080: 00e38c63 beq x7,x14,80001098 + 80001084: 4950646f jal x8,80007d18 + 80001088: 80001078 .word 0x80001078 + 8000108c: 00000000 .word 0x00000000 + 80001090: 8000f377 .word 0x8000f377 + 80001094: 00000000 .word 0x00000000 + 80001098: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xbaab3d04dc666019 + 8000109c: 000a3903 ld x18,0(x20) + 800010a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x0a971d3c8d4fcd2c + 800010a4: 000a3883 ld x17,0(x20) + 800010a8: 008a0a13 addi x20,x20,8 + +00000000800010ac : +Zbkb_orn_cg_cp_rd_b15: + orn x15, x18, x17 # perform operation + 800010ac: 411967b3 orn x15,x18,x17 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zbkb_orn_cg_cp_rd_b15, Zbkb_orn_cg_cp_rd_b15_str) + 800010b0: 000d3383 ld x7,0(x26) + 800010b4: 00f38c63 beq x7,x15,800010cc + 800010b8: 4610646f jal x8,80007d18 + 800010bc: 800010ac .word 0x800010ac + 800010c0: 00000000 .word 0x00000000 + 800010c4: 8000f3a8 .word 0x8000f3a8 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x5db56fd57615d3d7 + 800010d0: 000a3603 ld x12,0(x20) + 800010d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xfd7b8367de8a8de1 + 800010d8: 000a3b83 ld x23,0(x20) + 800010dc: 008a0a13 addi x20,x20,8 + +00000000800010e0 : +Zbkb_orn_cg_cp_rd_b16: + orn x16, x12, x23 # perform operation + 800010e0: 41766833 orn x16,x12,x23 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zbkb_orn_cg_cp_rd_b16, Zbkb_orn_cg_cp_rd_b16_str) + 800010e4: 000d3383 ld x7,0(x26) + 800010e8: 01038c63 beq x7,x16,80001100 + 800010ec: 42d0646f jal x8,80007d18 + 800010f0: 800010e0 .word 0x800010e0 + 800010f4: 00000000 .word 0x00000000 + 800010f8: 8000f3d9 .word 0x8000f3d9 + 800010fc: 00000000 .word 0x00000000 + 80001100: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x6b5b3d7943c18fc5 + 80001104: 000a3683 ld x13,0(x20) + 80001108: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xfed2655f0da450d3 + 8000110c: 000a3603 ld x12,0(x20) + 80001110: 008a0a13 addi x20,x20,8 + +0000000080001114 : +Zbkb_orn_cg_cp_rd_b17: + orn x17, x13, x12 # perform operation + 80001114: 40c6e8b3 orn x17,x13,x12 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zbkb_orn_cg_cp_rd_b17, Zbkb_orn_cg_cp_rd_b17_str) + 80001118: 000d3383 ld x7,0(x26) + 8000111c: 01138c63 beq x7,x17,80001134 + 80001120: 3f90646f jal x8,80007d18 + 80001124: 80001114 .word 0x80001114 + 80001128: 00000000 .word 0x00000000 + 8000112c: 8000f40a .word 0x8000f40a + 80001130: 00000000 .word 0x00000000 + 80001134: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x0decbd8047f7494f + 80001138: 000a3703 ld x14,0(x20) + 8000113c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x090a22bb2ab2d88e + 80001140: 000a3b83 ld x23,0(x20) + 80001144: 008a0a13 addi x20,x20,8 + +0000000080001148 : +Zbkb_orn_cg_cp_rd_b18: + orn x18, x14, x23 # perform operation + 80001148: 41776933 orn x18,x14,x23 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zbkb_orn_cg_cp_rd_b18, Zbkb_orn_cg_cp_rd_b18_str) + 8000114c: 000d3383 ld x7,0(x26) + 80001150: 01238c63 beq x7,x18,80001168 + 80001154: 3c50646f jal x8,80007d18 + 80001158: 80001148 .word 0x80001148 + 8000115c: 00000000 .word 0x00000000 + 80001160: 8000f43b .word 0x8000f43b + 80001164: 00000000 .word 0x00000000 + 80001168: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x59c5ecccc3646f20 + 8000116c: 000a3803 ld x16,0(x20) + 80001170: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x805486256a1c110d + 80001174: 000a3083 ld x1,0(x20) + 80001178: 008a0a13 addi x20,x20,8 + +000000008000117c : +Zbkb_orn_cg_cp_rd_b19: + orn x19, x16, x1 # perform operation + 8000117c: 401869b3 orn x19,x16,x1 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zbkb_orn_cg_cp_rd_b19, Zbkb_orn_cg_cp_rd_b19_str) + 80001180: 000d3383 ld x7,0(x26) + 80001184: 01338c63 beq x7,x19,8000119c + 80001188: 3910646f jal x8,80007d18 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 8000f46c .word 0x8000f46c + 80001198: 00000000 .word 0x00000000 + 8000119c: 008d0d13 addi x26,x26,8 + + mv x15, x20 # switch data pointer register to avoid conflict with test + 800011a0: 000a0793 addi x15,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x38626d3efad952b7 + 800011a4: 0007bc03 ld x24,0(x15) + 800011a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xfbf50569d785db2d + 800011ac: 0007b883 ld x17,0(x15) + 800011b0: 00878793 addi x15,x15,8 + +00000000800011b4 : +Zbkb_orn_cg_cp_rd_b20: + orn x20, x24, x17 # perform operation + 800011b4: 411c6a33 orn x20,x24,x17 + # Check if x20 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x20, Zbkb_orn_cg_cp_rd_b20, Zbkb_orn_cg_cp_rd_b20_str) + 800011b8: 000d3383 ld x7,0(x26) + 800011bc: 01438c63 beq x7,x20,800011d4 + 800011c0: 3590646f jal x8,80007d18 + 800011c4: 800011b4 .word 0x800011b4 + 800011c8: 00000000 .word 0x00000000 + 800011cc: 8000f49d .word 0x8000f49d + 800011d0: 00000000 .word 0x00000000 + 800011d4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xbf9fff1d9b67134c + 800011d8: 0007be83 ld x29,0(x15) + 800011dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x3841770f2f9ef41f + 800011e0: 0007b183 ld x3,0(x15) + 800011e4: 00878793 addi x15,x15,8 + +00000000800011e8 : +Zbkb_orn_cg_cp_rd_b21: + orn x21, x29, x3 # perform operation + 800011e8: 403eeab3 orn x21,x29,x3 + # Check if x21 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x21, Zbkb_orn_cg_cp_rd_b21, Zbkb_orn_cg_cp_rd_b21_str) + 800011ec: 000d3383 ld x7,0(x26) + 800011f0: 01538c63 beq x7,x21,80001208 + 800011f4: 3250646f jal x8,80007d18 + 800011f8: 800011e8 .word 0x800011e8 + 800011fc: 00000000 .word 0x00000000 + 80001200: 8000f4ce .word 0x8000f4ce + 80001204: 00000000 .word 0x00000000 + 80001208: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x6f5915aa73e7a604 + 8000120c: 0007b883 ld x17,0(x15) + 80001210: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xc949f1e047a7dfee + 80001214: 0007be03 ld x28,0(x15) + 80001218: 00878793 addi x15,x15,8 + +000000008000121c : +Zbkb_orn_cg_cp_rd_b22: + orn x22, x17, x28 # perform operation + 8000121c: 41c8eb33 orn x22,x17,x28 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zbkb_orn_cg_cp_rd_b22, Zbkb_orn_cg_cp_rd_b22_str) + 80001220: 000d3383 ld x7,0(x26) + 80001224: 01638c63 beq x7,x22,8000123c + 80001228: 2f10646f jal x8,80007d18 + 8000122c: 8000121c .word 0x8000121c + 80001230: 00000000 .word 0x00000000 + 80001234: 8000f4ff .word 0x8000f4ff + 80001238: 00000000 .word 0x00000000 + 8000123c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x70d98c1be03ab769 + 80001240: 0007b503 ld x10,0(x15) + 80001244: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xb71c31dd480e8acd + 80001248: 0007b803 ld x16,0(x15) + 8000124c: 00878793 addi x15,x15,8 + +0000000080001250 : +Zbkb_orn_cg_cp_rd_b23: + orn x23, x10, x16 # perform operation + 80001250: 41056bb3 orn x23,x10,x16 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zbkb_orn_cg_cp_rd_b23, Zbkb_orn_cg_cp_rd_b23_str) + 80001254: 000d3383 ld x7,0(x26) + 80001258: 01738c63 beq x7,x23,80001270 + 8000125c: 2bd0646f jal x8,80007d18 + 80001260: 80001250 .word 0x80001250 + 80001264: 00000000 .word 0x00000000 + 80001268: 8000f530 .word 0x8000f530 + 8000126c: 00000000 .word 0x00000000 + 80001270: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xabe9c0eef95a86d9 + 80001274: 0007bf83 ld x31,0(x15) + 80001278: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x2e2b75cc647e3277 + 8000127c: 0007b503 ld x10,0(x15) + 80001280: 00878793 addi x15,x15,8 + +0000000080001284 : +Zbkb_orn_cg_cp_rd_b24: + orn x24, x31, x10 # perform operation + 80001284: 40afec33 orn x24,x31,x10 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zbkb_orn_cg_cp_rd_b24, Zbkb_orn_cg_cp_rd_b24_str) + 80001288: 000d3383 ld x7,0(x26) + 8000128c: 01838c63 beq x7,x24,800012a4 + 80001290: 2890646f jal x8,80007d18 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000f561 .word 0x8000f561 + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x037c034c024d7282 + 800012a8: 0007b003 ld x0,0(x15) + 800012ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xf98cfd4584448b40 + 800012b0: 0007bf83 ld x31,0(x15) + 800012b4: 00878793 addi x15,x15,8 + +00000000800012b8 : +Zbkb_orn_cg_cp_rd_b25: + orn x25, x0, x31 # perform operation + 800012b8: 41f06cb3 orn x25,x0,x31 + # Check if x25 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x25, Zbkb_orn_cg_cp_rd_b25, Zbkb_orn_cg_cp_rd_b25_str) + 800012bc: 000d3383 ld x7,0(x26) + 800012c0: 01938c63 beq x7,x25,800012d8 + 800012c4: 2550646f jal x8,80007d18 + 800012c8: 800012b8 .word 0x800012b8 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 8000f592 .word 0x8000f592 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 008d0d13 addi x26,x26,8 + + mv x9, x26 # switch signature pointer register to avoid conflict with test + 800012dc: 000d0493 addi x9,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x8e57b3b9ff095e2a + 800012e0: 0007bf83 ld x31,0(x15) + 800012e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x4ff79b9ed20841a0 + 800012e8: 0007be03 ld x28,0(x15) + 800012ec: 00878793 addi x15,x15,8 + +00000000800012f0 : +Zbkb_orn_cg_cp_rd_b26: + orn x26, x31, x28 # perform operation + 800012f0: 41cfed33 orn x26,x31,x28 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cp_rd_b26, Zbkb_orn_cg_cp_rd_b26_str) + 800012f4: 0004b383 ld x7,0(x9) + 800012f8: 01a38c63 beq x7,x26,80001310 + 800012fc: 21d0646f jal x8,80007d18 + 80001300: 800012f0 .word 0x800012f0 + 80001304: 00000000 .word 0x00000000 + 80001308: 8000f5c3 .word 0x8000f5c3 + 8000130c: 00000000 .word 0x00000000 + 80001310: 00848493 addi x9,x9,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xff6b6cae4aed690a + 80001314: 0007b583 ld x11,0(x15) + 80001318: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xfd83f0023a24f983 + 8000131c: 0007be83 ld x29,0(x15) + 80001320: 00878793 addi x15,x15,8 + +0000000080001324 : +Zbkb_orn_cg_cp_rd_b27: + orn x27, x11, x29 # perform operation + 80001324: 41d5edb3 orn x27,x11,x29 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cp_rd_b27, Zbkb_orn_cg_cp_rd_b27_str) + 80001328: 0004b383 ld x7,0(x9) + 8000132c: 01b38c63 beq x7,x27,80001344 + 80001330: 1e90646f jal x8,80007d18 + 80001334: 80001324 .word 0x80001324 + 80001338: 00000000 .word 0x00000000 + 8000133c: 8000f5f4 .word 0x8000f5f4 + 80001340: 00000000 .word 0x00000000 + 80001344: 00848493 addi x9,x9,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x583aedcb35cc7468 + 80001348: 0007b803 ld x16,0(x15) + 8000134c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xae0884df0d6349ec + 80001350: 0007b503 ld x10,0(x15) + 80001354: 00878793 addi x15,x15,8 + +0000000080001358 : +Zbkb_orn_cg_cp_rd_b28: + orn x28, x16, x10 # perform operation + 80001358: 40a86e33 orn x28,x16,x10 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cp_rd_b28, Zbkb_orn_cg_cp_rd_b28_str) + 8000135c: 0004b383 ld x7,0(x9) + 80001360: 01c38c63 beq x7,x28,80001378 + 80001364: 1b50646f jal x8,80007d18 + 80001368: 80001358 .word 0x80001358 + 8000136c: 00000000 .word 0x00000000 + 80001370: 8000f625 .word 0x8000f625 + 80001374: 00000000 .word 0x00000000 + 80001378: 00848493 addi x9,x9,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x971698e62b4c9678 + 8000137c: 0007b703 ld x14,0(x15) + 80001380: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x1483d8e63ba5561d + 80001384: 0007b683 ld x13,0(x15) + 80001388: 00878793 addi x15,x15,8 + +000000008000138c : +Zbkb_orn_cg_cp_rd_b29: + orn x29, x14, x13 # perform operation + 8000138c: 40d76eb3 orn x29,x14,x13 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cp_rd_b29, Zbkb_orn_cg_cp_rd_b29_str) + 80001390: 0004b383 ld x7,0(x9) + 80001394: 01d38c63 beq x7,x29,800013ac + 80001398: 1810646f jal x8,80007d18 + 8000139c: 8000138c .word 0x8000138c + 800013a0: 00000000 .word 0x00000000 + 800013a4: 8000f656 .word 0x8000f656 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 00848493 addi x9,x9,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xd3ab5dd8155cfd10 + 800013b0: 0007bf83 ld x31,0(x15) + 800013b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x1e9d4c4fc08b3ecf + 800013b8: 0007b903 ld x18,0(x15) + 800013bc: 00878793 addi x15,x15,8 + +00000000800013c0 : +Zbkb_orn_cg_cp_rd_b30: + orn x30, x31, x18 # perform operation + 800013c0: 412fef33 orn x30,x31,x18 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cp_rd_b30, Zbkb_orn_cg_cp_rd_b30_str) + 800013c4: 0004b383 ld x7,0(x9) + 800013c8: 01e38c63 beq x7,x30,800013e0 + 800013cc: 14d0646f jal x8,80007d18 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000f687 .word 0x8000f687 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00848493 addi x9,x9,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xeff849fbeda8b830 + 800013e4: 0007b903 ld x18,0(x15) + 800013e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x4c6b18fccf47e4b5 + 800013ec: 0007be03 ld x28,0(x15) + 800013f0: 00878793 addi x15,x15,8 + +00000000800013f4 : +Zbkb_orn_cg_cp_rd_b31: + orn x31, x18, x28 # perform operation + 800013f4: 41c96fb3 orn x31,x18,x28 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cp_rd_b31, Zbkb_orn_cg_cp_rd_b31_str) + 800013f8: 0004b383 ld x7,0(x9) + 800013fc: 01f38c63 beq x7,x31,80001414 + 80001400: 1190646f jal x8,80007d18 + 80001404: 800013f4 .word 0x800013f4 + 80001408: 00000000 .word 0x00000000 + 8000140c: 8000f6b8 .word 0x8000f6b8 + 80001410: 00000000 .word 0x00000000 + 80001414: 00848493 addi x9,x9,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x0000000000000000 + 80001418: 0007be83 ld x29,0(x15) + 8000141c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x3e7bfc5cd71f1eea + 80001420: 0007b803 ld x16,0(x15) + 80001424: 00878793 addi x15,x15,8 + +0000000080001428 : +Zbkb_orn_cg_cp_rs1_edges_0x0: + orn x5, x29, x16 # perform operation + 80001428: 410ee2b3 orn x5,x29,x16 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cp_rs1_edges_0x0, Zbkb_orn_cg_cp_rs1_edges_0x0_str) + 8000142c: 0004b383 ld x7,0(x9) + 80001430: 00538c63 beq x7,x5,80001448 + 80001434: 0e50646f jal x8,80007d18 + 80001438: 80001428 .word 0x80001428 + 8000143c: 00000000 .word 0x00000000 + 80001440: 8000f6e9 .word 0x8000f6e9 + 80001444: 00000000 .word 0x00000000 + 80001448: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x0000000000000001 + 8000144c: 0007bd03 ld x26,0(x15) + 80001450: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x57578d75fb202010 + 80001454: 0007be83 ld x29,0(x15) + 80001458: 00878793 addi x15,x15,8 + +000000008000145c : +Zbkb_orn_cg_cp_rs1_edges_0x1: + orn x27, x26, x29 # perform operation + 8000145c: 41dd6db3 orn x27,x26,x29 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cp_rs1_edges_0x1, Zbkb_orn_cg_cp_rs1_edges_0x1_str) + 80001460: 0004b383 ld x7,0(x9) + 80001464: 01b38c63 beq x7,x27,8000147c + 80001468: 0b10646f jal x8,80007d18 + 8000146c: 8000145c .word 0x8000145c + 80001470: 00000000 .word 0x00000000 + 80001474: 8000f721 .word 0x8000f721 + 80001478: 00000000 .word 0x00000000 + 8000147c: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000000000002 + 80001480: 0007b183 ld x3,0(x15) + 80001484: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x198344251471941f + 80001488: 0007bb83 ld x23,0(x15) + 8000148c: 00878793 addi x15,x15,8 + +0000000080001490 : +Zbkb_orn_cg_cp_rs1_edges_0x2: + orn x12, x3, x23 # perform operation + 80001490: 4171e633 orn x12,x3,x23 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cp_rs1_edges_0x2, Zbkb_orn_cg_cp_rs1_edges_0x2_str) + 80001494: 0004b383 ld x7,0(x9) + 80001498: 00c38c63 beq x7,x12,800014b0 + 8000149c: 07d0646f jal x8,80007d18 + 800014a0: 80001490 .word 0x80001490 + 800014a4: 00000000 .word 0x00000000 + 800014a8: 8000f759 .word 0x8000f759 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x8000000000000000 + 800014b4: 0007b083 ld x1,0(x15) + 800014b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xc5a440a6a11e68bd + 800014bc: 0007bb03 ld x22,0(x15) + 800014c0: 00878793 addi x15,x15,8 + +00000000800014c4 : +Zbkb_orn_cg_cp_rs1_edges_0x8000000000000000: + orn x4, x1, x22 # perform operation + 800014c4: 4160e233 orn x4,x1,x22 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cp_rs1_edges_0x8000000000000000, Zbkb_orn_cg_cp_rs1_edges_0x8000000000000000_str) + 800014c8: 0004b383 ld x7,0(x9) + 800014cc: 00438c63 beq x7,x4,800014e4 + 800014d0: 0490646f jal x8,80007d18 + 800014d4: 800014c4 .word 0x800014c4 + 800014d8: 00000000 .word 0x00000000 + 800014dc: 8000f791 .word 0x8000f791 + 800014e0: 00000000 .word 0x00000000 + 800014e4: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x8000000000000001 + 800014e8: 0007bd83 ld x27,0(x15) + 800014ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x3738fa1a680616e4 + 800014f0: 0007b883 ld x17,0(x15) + 800014f4: 00878793 addi x15,x15,8 + +00000000800014f8 : +Zbkb_orn_cg_cp_rs1_edges_0x8000000000000001: + orn x2, x27, x17 # perform operation + 800014f8: 411de133 orn x2,x27,x17 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cp_rs1_edges_0x8000000000000001, Zbkb_orn_cg_cp_rs1_edges_0x8000000000000001_str) + 800014fc: 0004b383 ld x7,0(x9) + 80001500: 00238c63 beq x7,x2,80001518 + 80001504: 0150646f jal x8,80007d18 + 80001508: 800014f8 .word 0x800014f8 + 8000150c: 00000000 .word 0x00000000 + 80001510: 8000f7d9 .word 0x8000f7d9 + 80001514: 00000000 .word 0x00000000 + 80001518: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x7fffffffffffffff + 8000151c: 0007b903 ld x18,0(x15) + 80001520: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x0df7644662f009f4 + 80001524: 0007b883 ld x17,0(x15) + 80001528: 00878793 addi x15,x15,8 + +000000008000152c : +Zbkb_orn_cg_cp_rs1_edges_0x7fffffffffffffff: + orn x24, x18, x17 # perform operation + 8000152c: 41196c33 orn x24,x18,x17 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_orn_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001530: 0004b383 ld x7,0(x9) + 80001534: 01838c63 beq x7,x24,8000154c + 80001538: 7e00646f jal x8,80007d18 + 8000153c: 8000152c .word 0x8000152c + 80001540: 00000000 .word 0x00000000 + 80001544: 8000f821 .word 0x8000f821 + 80001548: 00000000 .word 0x00000000 + 8000154c: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80001550: 0007b603 ld x12,0(x15) + 80001554: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x6db32ec15d5a26cf + 80001558: 0007b083 ld x1,0(x15) + 8000155c: 00878793 addi x15,x15,8 + +0000000080001560 : +Zbkb_orn_cg_cp_rs1_edges_0x7ffffffffffffffe: + orn x6, x12, x1 # perform operation + 80001560: 40166333 orn x6,x12,x1 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_orn_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001564: 0004b383 ld x7,0(x9) + 80001568: 00638c63 beq x7,x6,80001580 + 8000156c: 7ac0646f jal x8,80007d18 + 80001570: 80001560 .word 0x80001560 + 80001574: 00000000 .word 0x00000000 + 80001578: 8000f869 .word 0x8000f869 + 8000157c: 00000000 .word 0x00000000 + 80001580: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xffffffffffffffff + 80001584: 0007ba83 ld x21,0(x15) + 80001588: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xc701640cd939cc4e + 8000158c: 0007b983 ld x19,0(x15) + 80001590: 00878793 addi x15,x15,8 + +0000000080001594 : +Zbkb_orn_cg_cp_rs1_edges_0xffffffffffffffff: + orn x5, x21, x19 # perform operation + 80001594: 413ae2b3 orn x5,x21,x19 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_orn_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80001598: 0004b383 ld x7,0(x9) + 8000159c: 00538c63 beq x7,x5,800015b4 + 800015a0: 7780646f jal x8,80007d18 + 800015a4: 80001594 .word 0x80001594 + 800015a8: 00000000 .word 0x00000000 + 800015ac: 8000f8b1 .word 0x8000f8b1 + 800015b0: 00000000 .word 0x00000000 + 800015b4: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xfffffffffffffffe + 800015b8: 0007bd83 ld x27,0(x15) + 800015bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x86b4ebe94e1edaeb + 800015c0: 0007bb03 ld x22,0(x15) + 800015c4: 00878793 addi x15,x15,8 + +00000000800015c8 : +Zbkb_orn_cg_cp_rs1_edges_0xfffffffffffffffe: + orn x17, x27, x22 # perform operation + 800015c8: 416de8b3 orn x17,x27,x22 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_orn_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015cc: 0004b383 ld x7,0(x9) + 800015d0: 01138c63 beq x7,x17,800015e8 + 800015d4: 7440646f jal x8,80007d18 + 800015d8: 800015c8 .word 0x800015c8 + 800015dc: 00000000 .word 0x00000000 + 800015e0: 8000f8f9 .word 0x8000f8f9 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 800015ec: 0007b203 ld x4,0(x15) + 800015f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x595d9abaff9db60d + 800015f4: 0007bf03 ld x30,0(x15) + 800015f8: 00878793 addi x15,x15,8 + +00000000800015fc : +Zbkb_orn_cg_cp_rs1_edges_0x5bbc887763ae86f2: + orn x12, x4, x30 # perform operation + 800015fc: 41e26633 orn x12,x4,x30 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_orn_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001600: 0004b383 ld x7,0(x9) + 80001604: 00c38c63 beq x7,x12,8000161c + 80001608: 7100646f jal x8,80007d18 + 8000160c: 800015fc .word 0x800015fc + 80001610: 00000000 .word 0x00000000 + 80001614: 8000f941 .word 0x8000f941 + 80001618: 00000000 .word 0x00000000 + 8000161c: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80001620: 0007b883 ld x17,0(x15) + 80001624: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x86ce73b0f3d5ce5a + 80001628: 0007b583 ld x11,0(x15) + 8000162c: 00878793 addi x15,x15,8 + +0000000080001630 : +Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + orn x12, x17, x11 # perform operation + 80001630: 40b8e633 orn x12,x17,x11 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001634: 0004b383 ld x7,0(x9) + 80001638: 00c38c63 beq x7,x12,80001650 + 8000163c: 6dc0646f jal x8,80007d18 + 80001640: 80001630 .word 0x80001630 + 80001644: 00000000 .word 0x00000000 + 80001648: 8000f989 .word 0x8000f989 + 8000164c: 00000000 .word 0x00000000 + 80001650: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5555555555555555 + 80001654: 0007b703 ld x14,0(x15) + 80001658: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x6d574ea4a374214c + 8000165c: 0007bb03 ld x22,0(x15) + 80001660: 00878793 addi x15,x15,8 + +0000000080001664 : +Zbkb_orn_cg_cp_rs1_edges_0x5555555555555555: + orn x17, x14, x22 # perform operation + 80001664: 416768b3 orn x17,x14,x22 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cp_rs1_edges_0x5555555555555555, Zbkb_orn_cg_cp_rs1_edges_0x5555555555555555_str) + 80001668: 0004b383 ld x7,0(x9) + 8000166c: 01138c63 beq x7,x17,80001684 + 80001670: 6a80646f jal x8,80007d18 + 80001674: 80001664 .word 0x80001664 + 80001678: 00000000 .word 0x00000000 + 8000167c: 8000f9d1 .word 0x8000f9d1 + 80001680: 00000000 .word 0x00000000 + 80001684: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x00000000ffffffff + 80001688: 0007ba83 ld x21,0(x15) + 8000168c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x34b86e1ad94923b9 + 80001690: 0007bd83 ld x27,0(x15) + 80001694: 00878793 addi x15,x15,8 + +0000000080001698 : +Zbkb_orn_cg_cp_rs1_edges_0xffffffff: + orn x3, x21, x27 # perform operation + 80001698: 41bae1b3 orn x3,x21,x27 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cp_rs1_edges_0xffffffff, Zbkb_orn_cg_cp_rs1_edges_0xffffffff_str) + 8000169c: 0004b383 ld x7,0(x9) + 800016a0: 00338c63 beq x7,x3,800016b8 + 800016a4: 6740646f jal x8,80007d18 + 800016a8: 80001698 .word 0x80001698 + 800016ac: 00000000 .word 0x00000000 + 800016b0: 8000fa19 .word 0x8000fa19 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000000fffffffe + 800016bc: 0007bb03 ld x22,0(x15) + 800016c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x8275dad1747ba554 + 800016c4: 0007b883 ld x17,0(x15) + 800016c8: 00878793 addi x15,x15,8 + +00000000800016cc : +Zbkb_orn_cg_cp_rs1_edges_0xfffffffe: + orn x13, x22, x17 # perform operation + 800016cc: 411b66b3 orn x13,x22,x17 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cp_rs1_edges_0xfffffffe, Zbkb_orn_cg_cp_rs1_edges_0xfffffffe_str) + 800016d0: 0004b383 ld x7,0(x9) + 800016d4: 00d38c63 beq x7,x13,800016ec + 800016d8: 6400646f jal x8,80007d18 + 800016dc: 800016cc .word 0x800016cc + 800016e0: 00000000 .word 0x00000000 + 800016e4: 8000fa59 .word 0x8000fa59 + 800016e8: 00000000 .word 0x00000000 + 800016ec: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x0000000100000000 + 800016f0: 0007ba83 ld x21,0(x15) + 800016f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xf253045d6be9ef56 + 800016f8: 0007b603 ld x12,0(x15) + 800016fc: 00878793 addi x15,x15,8 + +0000000080001700 : +Zbkb_orn_cg_cp_rs1_edges_0x100000000: + orn x20, x21, x12 # perform operation + 80001700: 40caea33 orn x20,x21,x12 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cp_rs1_edges_0x100000000, Zbkb_orn_cg_cp_rs1_edges_0x100000000_str) + 80001704: 0004b383 ld x7,0(x9) + 80001708: 01438c63 beq x7,x20,80001720 + 8000170c: 60c0646f jal x8,80007d18 + 80001710: 80001700 .word 0x80001700 + 80001714: 00000000 .word 0x00000000 + 80001718: 8000fa99 .word 0x8000fa99 + 8000171c: 00000000 .word 0x00000000 + 80001720: 00848493 addi x9,x9,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0000000100000001 + 80001724: 0007bc03 ld x24,0(x15) + 80001728: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xd5066aefc61682f1 + 8000172c: 0007be03 ld x28,0(x15) + 80001730: 00878793 addi x15,x15,8 + +0000000080001734 : +Zbkb_orn_cg_cp_rs1_edges_0x100000001: + orn x30, x24, x28 # perform operation + 80001734: 41cc6f33 orn x30,x24,x28 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cp_rs1_edges_0x100000001, Zbkb_orn_cg_cp_rs1_edges_0x100000001_str) + 80001738: 0004b383 ld x7,0(x9) + 8000173c: 01e38c63 beq x7,x30,80001754 + 80001740: 5d80646f jal x8,80007d18 + 80001744: 80001734 .word 0x80001734 + 80001748: 00000000 .word 0x00000000 + 8000174c: 8000fada .word 0x8000fada + 80001750: 00000000 .word 0x00000000 + 80001754: 00848493 addi x9,x9,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x1131a56f79efafbd + 80001758: 0007b203 ld x4,0(x15) + 8000175c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000000000000 + 80001760: 0007ba83 ld x21,0(x15) + 80001764: 00878793 addi x15,x15,8 + +0000000080001768 : +Zbkb_orn_cg_cp_rs2_edges_0x0: + orn x17, x4, x21 # perform operation + 80001768: 415268b3 orn x17,x4,x21 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cp_rs2_edges_0x0, Zbkb_orn_cg_cp_rs2_edges_0x0_str) + 8000176c: 0004b383 ld x7,0(x9) + 80001770: 01138c63 beq x7,x17,80001788 + 80001774: 5a40646f jal x8,80007d18 + 80001778: 80001768 .word 0x80001768 + 8000177c: 00000000 .word 0x00000000 + 80001780: 8000fb1b .word 0x8000fb1b + 80001784: 00000000 .word 0x00000000 + 80001788: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xc9846b0c9cf356bf + 8000178c: 0007bf03 ld x30,0(x15) + 80001790: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x0000000000000001 + 80001794: 0007b883 ld x17,0(x15) + 80001798: 00878793 addi x15,x15,8 + +000000008000179c : +Zbkb_orn_cg_cp_rs2_edges_0x1: + orn x31, x30, x17 # perform operation + 8000179c: 411f6fb3 orn x31,x30,x17 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cp_rs2_edges_0x1, Zbkb_orn_cg_cp_rs2_edges_0x1_str) + 800017a0: 0004b383 ld x7,0(x9) + 800017a4: 01f38c63 beq x7,x31,800017bc + 800017a8: 5700646f jal x8,80007d18 + 800017ac: 8000179c .word 0x8000179c + 800017b0: 00000000 .word 0x00000000 + 800017b4: 8000fb54 .word 0x8000fb54 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x9e8e4964bb5a74ad + 800017c0: 0007ba83 ld x21,0(x15) + 800017c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x0000000000000002 + 800017c8: 0007bf03 ld x30,0(x15) + 800017cc: 00878793 addi x15,x15,8 + +00000000800017d0 : +Zbkb_orn_cg_cp_rs2_edges_0x2: + orn x6, x21, x30 # perform operation + 800017d0: 41eae333 orn x6,x21,x30 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cp_rs2_edges_0x2, Zbkb_orn_cg_cp_rs2_edges_0x2_str) + 800017d4: 0004b383 ld x7,0(x9) + 800017d8: 00638c63 beq x7,x6,800017f0 + 800017dc: 53c0646f jal x8,80007d18 + 800017e0: 800017d0 .word 0x800017d0 + 800017e4: 00000000 .word 0x00000000 + 800017e8: 8000fb8d .word 0x8000fb8d + 800017ec: 00000000 .word 0x00000000 + 800017f0: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xd1ca9297dce43201 + 800017f4: 0007b503 ld x10,0(x15) + 800017f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x8000000000000000 + 800017fc: 0007b103 ld x2,0(x15) + 80001800: 00878793 addi x15,x15,8 + +0000000080001804 : +Zbkb_orn_cg_cp_rs2_edges_0x8000000000000000: + orn x19, x10, x2 # perform operation + 80001804: 402569b3 orn x19,x10,x2 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cp_rs2_edges_0x8000000000000000, Zbkb_orn_cg_cp_rs2_edges_0x8000000000000000_str) + 80001808: 0004b383 ld x7,0(x9) + 8000180c: 01338c63 beq x7,x19,80001824 + 80001810: 5080646f jal x8,80007d18 + 80001814: 80001804 .word 0x80001804 + 80001818: 00000000 .word 0x00000000 + 8000181c: 8000fbc6 .word 0x8000fbc6 + 80001820: 00000000 .word 0x00000000 + 80001824: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x7dc63f12691e8884 + 80001828: 0007b503 ld x10,0(x15) + 8000182c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x8000000000000001 + 80001830: 0007b303 ld x6,0(x15) + 80001834: 00878793 addi x15,x15,8 + +0000000080001838 : +Zbkb_orn_cg_cp_rs2_edges_0x8000000000000001: + orn x18, x10, x6 # perform operation + 80001838: 40656933 orn x18,x10,x6 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cp_rs2_edges_0x8000000000000001, Zbkb_orn_cg_cp_rs2_edges_0x8000000000000001_str) + 8000183c: 0004b383 ld x7,0(x9) + 80001840: 01238c63 beq x7,x18,80001858 + 80001844: 4d40646f jal x8,80007d18 + 80001848: 80001838 .word 0x80001838 + 8000184c: 00000000 .word 0x00000000 + 80001850: 8000fc0e .word 0x8000fc0e + 80001854: 00000000 .word 0x00000000 + 80001858: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x84f2e238d8b7d6a6 + 8000185c: 0007be83 ld x29,0(x15) + 80001860: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x7fffffffffffffff + 80001864: 0007bf03 ld x30,0(x15) + 80001868: 00878793 addi x15,x15,8 + +000000008000186c : +Zbkb_orn_cg_cp_rs2_edges_0x7fffffffffffffff: + orn x3, x29, x30 # perform operation + 8000186c: 41eee1b3 orn x3,x29,x30 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_orn_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001870: 0004b383 ld x7,0(x9) + 80001874: 00338c63 beq x7,x3,8000188c + 80001878: 4a00646f jal x8,80007d18 + 8000187c: 8000186c .word 0x8000186c + 80001880: 00000000 .word 0x00000000 + 80001884: 8000fc56 .word 0x8000fc56 + 80001888: 00000000 .word 0x00000000 + 8000188c: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x215cea57b635b02b + 80001890: 0007b983 ld x19,0(x15) + 80001894: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80001898: 0007b883 ld x17,0(x15) + 8000189c: 00878793 addi x15,x15,8 + +00000000800018a0 : +Zbkb_orn_cg_cp_rs2_edges_0x7ffffffffffffffe: + orn x2, x19, x17 # perform operation + 800018a0: 4119e133 orn x2,x19,x17 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_orn_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018a4: 0004b383 ld x7,0(x9) + 800018a8: 00238c63 beq x7,x2,800018c0 + 800018ac: 46c0646f jal x8,80007d18 + 800018b0: 800018a0 .word 0x800018a0 + 800018b4: 00000000 .word 0x00000000 + 800018b8: 8000fc9e .word 0x8000fc9e + 800018bc: 00000000 .word 0x00000000 + 800018c0: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x6a937961192a11c4 + 800018c4: 0007b203 ld x4,0(x15) + 800018c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xffffffffffffffff + 800018cc: 0007b103 ld x2,0(x15) + 800018d0: 00878793 addi x15,x15,8 + +00000000800018d4 : +Zbkb_orn_cg_cp_rs2_edges_0xffffffffffffffff: + orn x13, x4, x2 # perform operation + 800018d4: 402266b3 orn x13,x4,x2 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_orn_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018d8: 0004b383 ld x7,0(x9) + 800018dc: 00d38c63 beq x7,x13,800018f4 + 800018e0: 4380646f jal x8,80007d18 + 800018e4: 800018d4 .word 0x800018d4 + 800018e8: 00000000 .word 0x00000000 + 800018ec: 8000fce6 .word 0x8000fce6 + 800018f0: 00000000 .word 0x00000000 + 800018f4: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xab6a13ce148b2d25 + 800018f8: 0007b103 ld x2,0(x15) + 800018fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xfffffffffffffffe + 80001900: 0007b983 ld x19,0(x15) + 80001904: 00878793 addi x15,x15,8 + +0000000080001908 : +Zbkb_orn_cg_cp_rs2_edges_0xfffffffffffffffe: + orn x22, x2, x19 # perform operation + 80001908: 41316b33 orn x22,x2,x19 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_orn_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000190c: 0004b383 ld x7,0(x9) + 80001910: 01638c63 beq x7,x22,80001928 + 80001914: 4040646f jal x8,80007d18 + 80001918: 80001908 .word 0x80001908 + 8000191c: 00000000 .word 0x00000000 + 80001920: 8000fd2e .word 0x8000fd2e + 80001924: 00000000 .word 0x00000000 + 80001928: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x2f4201ba82fe346c + 8000192c: 0007b883 ld x17,0(x15) + 80001930: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80001934: 0007b683 ld x13,0(x15) + 80001938: 00878793 addi x15,x15,8 + +000000008000193c : +Zbkb_orn_cg_cp_rs2_edges_0x5bbc887763ae86f2: + orn x5, x17, x13 # perform operation + 8000193c: 40d8e2b3 orn x5,x17,x13 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_orn_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001940: 0004b383 ld x7,0(x9) + 80001944: 00538c63 beq x7,x5,8000195c + 80001948: 3d00646f jal x8,80007d18 + 8000194c: 8000193c .word 0x8000193c + 80001950: 00000000 .word 0x00000000 + 80001954: 8000fd76 .word 0x8000fd76 + 80001958: 00000000 .word 0x00000000 + 8000195c: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x1b419a5f2801e94f + 80001960: 0007b183 ld x3,0(x15) + 80001964: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80001968: 0007bf03 ld x30,0(x15) + 8000196c: 00878793 addi x15,x15,8 + +0000000080001970 : +Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + orn x21, x3, x30 # perform operation + 80001970: 41e1eab3 orn x21,x3,x30 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001974: 0004b383 ld x7,0(x9) + 80001978: 01538c63 beq x7,x21,80001990 + 8000197c: 39c0646f jal x8,80007d18 + 80001980: 80001970 .word 0x80001970 + 80001984: 00000000 .word 0x00000000 + 80001988: 8000fdbe .word 0x8000fdbe + 8000198c: 00000000 .word 0x00000000 + 80001990: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x2950f737c3d8fd09 + 80001994: 0007b883 ld x17,0(x15) + 80001998: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x5555555555555555 + 8000199c: 0007b083 ld x1,0(x15) + 800019a0: 00878793 addi x15,x15,8 + +00000000800019a4 : +Zbkb_orn_cg_cp_rs2_edges_0x5555555555555555: + orn x28, x17, x1 # perform operation + 800019a4: 4018ee33 orn x28,x17,x1 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cp_rs2_edges_0x5555555555555555, Zbkb_orn_cg_cp_rs2_edges_0x5555555555555555_str) + 800019a8: 0004b383 ld x7,0(x9) + 800019ac: 01c38c63 beq x7,x28,800019c4 + 800019b0: 3680646f jal x8,80007d18 + 800019b4: 800019a4 .word 0x800019a4 + 800019b8: 00000000 .word 0x00000000 + 800019bc: 8000fe06 .word 0x8000fe06 + 800019c0: 00000000 .word 0x00000000 + 800019c4: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x1cfdfad3d2ca1551 + 800019c8: 0007bb03 ld x22,0(x15) + 800019cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x00000000ffffffff + 800019d0: 0007b983 ld x19,0(x15) + 800019d4: 00878793 addi x15,x15,8 + +00000000800019d8 : +Zbkb_orn_cg_cp_rs2_edges_0xffffffff: + orn x24, x22, x19 # perform operation + 800019d8: 413b6c33 orn x24,x22,x19 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cp_rs2_edges_0xffffffff, Zbkb_orn_cg_cp_rs2_edges_0xffffffff_str) + 800019dc: 0004b383 ld x7,0(x9) + 800019e0: 01838c63 beq x7,x24,800019f8 + 800019e4: 3340646f jal x8,80007d18 + 800019e8: 800019d8 .word 0x800019d8 + 800019ec: 00000000 .word 0x00000000 + 800019f0: 8000fe4e .word 0x8000fe4e + 800019f4: 00000000 .word 0x00000000 + 800019f8: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0xc1d1ebc2cf5b5d33 + 800019fc: 0007bb03 ld x22,0(x15) + 80001a00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x00000000fffffffe + 80001a04: 0007b203 ld x4,0(x15) + 80001a08: 00878793 addi x15,x15,8 + +0000000080001a0c : +Zbkb_orn_cg_cp_rs2_edges_0xfffffffe: + orn x20, x22, x4 # perform operation + 80001a0c: 404b6a33 orn x20,x22,x4 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cp_rs2_edges_0xfffffffe, Zbkb_orn_cg_cp_rs2_edges_0xfffffffe_str) + 80001a10: 0004b383 ld x7,0(x9) + 80001a14: 01438c63 beq x7,x20,80001a2c + 80001a18: 3000646f jal x8,80007d18 + 80001a1c: 80001a0c .word 0x80001a0c + 80001a20: 00000000 .word 0x00000000 + 80001a24: 8000fe8e .word 0x8000fe8e + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5272623413915cad + 80001a30: 0007be03 ld x28,0(x15) + 80001a34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x0000000100000000 + 80001a38: 0007ba03 ld x20,0(x15) + 80001a3c: 00878793 addi x15,x15,8 + +0000000080001a40 : +Zbkb_orn_cg_cp_rs2_edges_0x100000000: + orn x29, x28, x20 # perform operation + 80001a40: 414e6eb3 orn x29,x28,x20 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cp_rs2_edges_0x100000000, Zbkb_orn_cg_cp_rs2_edges_0x100000000_str) + 80001a44: 0004b383 ld x7,0(x9) + 80001a48: 01d38c63 beq x7,x29,80001a60 + 80001a4c: 2cc0646f jal x8,80007d18 + 80001a50: 80001a40 .word 0x80001a40 + 80001a54: 00000000 .word 0x00000000 + 80001a58: 8000fece .word 0x8000fece + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 00848493 addi x9,x9,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xa39b6273c4082039 + 80001a64: 0007b283 ld x5,0(x15) + 80001a68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x0000000100000001 + 80001a6c: 0007bd83 ld x27,0(x15) + 80001a70: 00878793 addi x15,x15,8 + +0000000080001a74 : +Zbkb_orn_cg_cp_rs2_edges_0x100000001: + orn x24, x5, x27 # perform operation + 80001a74: 41b2ec33 orn x24,x5,x27 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cp_rs2_edges_0x100000001, Zbkb_orn_cg_cp_rs2_edges_0x100000001_str) + 80001a78: 0004b383 ld x7,0(x9) + 80001a7c: 01838c63 beq x7,x24,80001a94 + 80001a80: 2980646f jal x8,80007d18 + 80001a84: 80001a74 .word 0x80001a74 + 80001a88: 00000000 .word 0x00000000 + 80001a8c: 8000ff0f .word 0x8000ff0f + 80001a90: 00000000 .word 0x00000000 + 80001a94: 00848493 addi x9,x9,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x0000000000000000 + 80001a98: 0007be83 ld x29,0(x15) + 80001a9c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000000000000 + 80001aa0: 0007bc83 ld x25,0(x15) + 80001aa4: 00878793 addi x15,x15,8 + +0000000080001aa8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + orn x28, x29, x25 # perform operation + 80001aa8: 419eee33 orn x28,x29,x25 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001aac: 0004b383 ld x7,0(x9) + 80001ab0: 01c38c63 beq x7,x28,80001ac8 + 80001ab4: 2640646f jal x8,80007d18 + 80001ab8: 80001aa8 .word 0x80001aa8 + 80001abc: 00000000 .word 0x00000000 + 80001ac0: 8000ff50 .word 0x8000ff50 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x0000000000000000 + 80001acc: 0007b803 ld x16,0(x15) + 80001ad0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000000000001 + 80001ad4: 0007ba83 ld x21,0(x15) + 80001ad8: 00878793 addi x15,x15,8 + +0000000080001adc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + orn x4, x16, x21 # perform operation + 80001adc: 41586233 orn x4,x16,x21 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae0: 0004b383 ld x7,0(x9) + 80001ae4: 00438c63 beq x7,x4,80001afc + 80001ae8: 2300646f jal x8,80007d18 + 80001aec: 80001adc .word 0x80001adc + 80001af0: 00000000 .word 0x00000000 + 80001af4: 8000ffa0 .word 0x8000ffa0 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x0000000000000000 + 80001b00: 0007be83 ld x29,0(x15) + 80001b04: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x0000000000000002 + 80001b08: 0007b303 ld x6,0(x15) + 80001b0c: 00878793 addi x15,x15,8 + +0000000080001b10 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + orn x3, x29, x6 # perform operation + 80001b10: 406ee1b3 orn x3,x29,x6 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b14: 0004b383 ld x7,0(x9) + 80001b18: 00338c63 beq x7,x3,80001b30 + 80001b1c: 1fc0646f jal x8,80007d18 + 80001b20: 80001b10 .word 0x80001b10 + 80001b24: 00000000 .word 0x00000000 + 80001b28: 8000fff0 .word 0x8000fff0 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0000000000000000 + 80001b34: 0007b983 ld x19,0(x15) + 80001b38: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x8000000000000000 + 80001b3c: 0007b283 ld x5,0(x15) + 80001b40: 00878793 addi x15,x15,8 + +0000000080001b44 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + orn x3, x19, x5 # perform operation + 80001b44: 4059e1b3 orn x3,x19,x5 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b48: 0004b383 ld x7,0(x9) + 80001b4c: 00338c63 beq x7,x3,80001b64 + 80001b50: 1c80646f jal x8,80007d18 + 80001b54: 80001b44 .word 0x80001b44 + 80001b58: 00000000 .word 0x00000000 + 80001b5c: 80010040 .word 0x80010040 + 80001b60: 00000000 .word 0x00000000 + 80001b64: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x0000000000000000 + 80001b68: 0007b703 ld x14,0(x15) + 80001b6c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x8000000000000001 + 80001b70: 0007bc03 ld x24,0(x15) + 80001b74: 00878793 addi x15,x15,8 + +0000000080001b78 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + orn x25, x14, x24 # perform operation + 80001b78: 41876cb3 orn x25,x14,x24 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b7c: 0004b383 ld x7,0(x9) + 80001b80: 01938c63 beq x7,x25,80001b98 + 80001b84: 1940646f jal x8,80007d18 + 80001b88: 80001b78 .word 0x80001b78 + 80001b8c: 00000000 .word 0x00000000 + 80001b90: 8001009f .word 0x8001009f + 80001b94: 00000000 .word 0x00000000 + 80001b98: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000000000000 + 80001b9c: 0007b183 ld x3,0(x15) + 80001ba0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7fffffffffffffff + 80001ba4: 0007b703 ld x14,0(x15) + 80001ba8: 00878793 addi x15,x15,8 + +0000000080001bac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + orn x1, x3, x14 # perform operation + 80001bac: 40e1e0b3 orn x1,x3,x14 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb0: 0004b383 ld x7,0(x9) + 80001bb4: 00138c63 beq x7,x1,80001bcc + 80001bb8: 1600646f jal x8,80007d18 + 80001bbc: 80001bac .word 0x80001bac + 80001bc0: 00000000 .word 0x00000000 + 80001bc4: 800100fe .word 0x800100fe + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x0000000000000000 + 80001bd0: 0007bb03 ld x22,0(x15) + 80001bd4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80001bd8: 0007b103 ld x2,0(x15) + 80001bdc: 00878793 addi x15,x15,8 + +0000000080001be0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + orn x20, x22, x2 # perform operation + 80001be0: 402b6a33 orn x20,x22,x2 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001be4: 0004b383 ld x7,0(x9) + 80001be8: 01438c63 beq x7,x20,80001c00 + 80001bec: 12c0646f jal x8,80007d18 + 80001bf0: 80001be0 .word 0x80001be0 + 80001bf4: 00000000 .word 0x00000000 + 80001bf8: 8001015d .word 0x8001015d + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x0000000000000000 + 80001c04: 0007b203 ld x4,0(x15) + 80001c08: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xffffffffffffffff + 80001c0c: 0007b183 ld x3,0(x15) + 80001c10: 00878793 addi x15,x15,8 + +0000000080001c14 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + orn x27, x4, x3 # perform operation + 80001c14: 40326db3 orn x27,x4,x3 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c18: 0004b383 ld x7,0(x9) + 80001c1c: 01b38c63 beq x7,x27,80001c34 + 80001c20: 0f80646f jal x8,80007d18 + 80001c24: 80001c14 .word 0x80001c14 + 80001c28: 00000000 .word 0x00000000 + 80001c2c: 800101bc .word 0x800101bc + 80001c30: 00000000 .word 0x00000000 + 80001c34: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x0000000000000000 + 80001c38: 0007b103 ld x2,0(x15) + 80001c3c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xfffffffffffffffe + 80001c40: 0007b983 ld x19,0(x15) + 80001c44: 00878793 addi x15,x15,8 + +0000000080001c48 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + orn x3, x2, x19 # perform operation + 80001c48: 413161b3 orn x3,x2,x19 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c4c: 0004b383 ld x7,0(x9) + 80001c50: 00338c63 beq x7,x3,80001c68 + 80001c54: 0c40646f jal x8,80007d18 + 80001c58: 80001c48 .word 0x80001c48 + 80001c5c: 00000000 .word 0x00000000 + 80001c60: 8001021b .word 0x8001021b + 80001c64: 00000000 .word 0x00000000 + 80001c68: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x0000000000000000 + 80001c6c: 0007b803 ld x16,0(x15) + 80001c70: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80001c74: 0007bf03 ld x30,0(x15) + 80001c78: 00878793 addi x15,x15,8 + +0000000080001c7c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + orn x14, x16, x30 # perform operation + 80001c7c: 41e86733 orn x14,x16,x30 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c80: 0004b383 ld x7,0(x9) + 80001c84: 00e38c63 beq x7,x14,80001c9c + 80001c88: 0900646f jal x8,80007d18 + 80001c8c: 80001c7c .word 0x80001c7c + 80001c90: 00000000 .word 0x00000000 + 80001c94: 8001027a .word 0x8001027a + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x0000000000000000 + 80001ca0: 0007ba03 ld x20,0(x15) + 80001ca4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xaaaaaaaaaaaaaaaa + 80001ca8: 0007bb83 ld x23,0(x15) + 80001cac: 00878793 addi x15,x15,8 + +0000000080001cb0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + orn x5, x20, x23 # perform operation + 80001cb0: 417a62b3 orn x5,x20,x23 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cb4: 0004b383 ld x7,0(x9) + 80001cb8: 00538c63 beq x7,x5,80001cd0 + 80001cbc: 05c0646f jal x8,80007d18 + 80001cc0: 80001cb0 .word 0x80001cb0 + 80001cc4: 00000000 .word 0x00000000 + 80001cc8: 800102d9 .word 0x800102d9 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x0000000000000000 + 80001cd4: 0007b683 ld x13,0(x15) + 80001cd8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x5555555555555555 + 80001cdc: 0007b303 ld x6,0(x15) + 80001ce0: 00878793 addi x15,x15,8 + +0000000080001ce4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + orn x19, x13, x6 # perform operation + 80001ce4: 4066e9b3 orn x19,x13,x6 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001ce8: 0004b383 ld x7,0(x9) + 80001cec: 01338c63 beq x7,x19,80001d04 + 80001cf0: 0280646f jal x8,80007d18 + 80001cf4: 80001ce4 .word 0x80001ce4 + 80001cf8: 00000000 .word 0x00000000 + 80001cfc: 80010338 .word 0x80010338 + 80001d00: 00000000 .word 0x00000000 + 80001d04: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x0000000000000000 + 80001d08: 0007b583 ld x11,0(x15) + 80001d0c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x00000000ffffffff + 80001d10: 0007b983 ld x19,0(x15) + 80001d14: 00878793 addi x15,x15,8 + +0000000080001d18 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + orn x13, x11, x19 # perform operation + 80001d18: 4135e6b3 orn x13,x11,x19 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d1c: 0004b383 ld x7,0(x9) + 80001d20: 00d38c63 beq x7,x13,80001d38 + 80001d24: 7f50546f jal x8,80007d18 + 80001d28: 80001d18 .word 0x80001d18 + 80001d2c: 00000000 .word 0x00000000 + 80001d30: 80010397 .word 0x80010397 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0000000000000000 + 80001d3c: 0007bf03 ld x30,0(x15) + 80001d40: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x00000000fffffffe + 80001d44: 0007bb83 ld x23,0(x15) + 80001d48: 00878793 addi x15,x15,8 + +0000000080001d4c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + orn x18, x30, x23 # perform operation + 80001d4c: 417f6933 orn x18,x30,x23 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d50: 0004b383 ld x7,0(x9) + 80001d54: 01238c63 beq x7,x18,80001d6c + 80001d58: 7c10546f jal x8,80007d18 + 80001d5c: 80001d4c .word 0x80001d4c + 80001d60: 00000000 .word 0x00000000 + 80001d64: 800103ee .word 0x800103ee + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0000000000000000 + 80001d70: 0007b883 ld x17,0(x15) + 80001d74: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0000000100000000 + 80001d78: 0007b603 ld x12,0(x15) + 80001d7c: 00878793 addi x15,x15,8 + +0000000080001d80 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + orn x16, x17, x12 # perform operation + 80001d80: 40c8e833 orn x16,x17,x12 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d84: 0004b383 ld x7,0(x9) + 80001d88: 01038c63 beq x7,x16,80001da0 + 80001d8c: 78d0546f jal x8,80007d18 + 80001d90: 80001d80 .word 0x80001d80 + 80001d94: 00000000 .word 0x00000000 + 80001d98: 80010445 .word 0x80010445 + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x0000000000000000 + 80001da4: 0007b283 ld x5,0(x15) + 80001da8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000100000001 + 80001dac: 0007bc83 ld x25,0(x15) + 80001db0: 00878793 addi x15,x15,8 + +0000000080001db4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + orn x14, x5, x25 # perform operation + 80001db4: 4192e733 orn x14,x5,x25 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001db8: 0004b383 ld x7,0(x9) + 80001dbc: 00e38c63 beq x7,x14,80001dd4 + 80001dc0: 7590546f jal x8,80007d18 + 80001dc4: 80001db4 .word 0x80001db4 + 80001dc8: 00000000 .word 0x00000000 + 80001dcc: 8001049d .word 0x8001049d + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0000000000000001 + 80001dd8: 0007bb83 ld x23,0(x15) + 80001ddc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000000000000 + 80001de0: 0007bc03 ld x24,0(x15) + 80001de4: 00878793 addi x15,x15,8 + +0000000080001de8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + orn x21, x23, x24 # perform operation + 80001de8: 418beab3 orn x21,x23,x24 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dec: 0004b383 ld x7,0(x9) + 80001df0: 01538c63 beq x7,x21,80001e08 + 80001df4: 7250546f jal x8,80007d18 + 80001df8: 80001de8 .word 0x80001de8 + 80001dfc: 00000000 .word 0x00000000 + 80001e00: 800104f5 .word 0x800104f5 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x0000000000000001 + 80001e0c: 0007b703 ld x14,0(x15) + 80001e10: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x0000000000000001 + 80001e14: 0007b503 ld x10,0(x15) + 80001e18: 00878793 addi x15,x15,8 + +0000000080001e1c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + orn x11, x14, x10 # perform operation + 80001e1c: 40a765b3 orn x11,x14,x10 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e20: 0004b383 ld x7,0(x9) + 80001e24: 00b38c63 beq x7,x11,80001e3c + 80001e28: 6f10546f jal x8,80007d18 + 80001e2c: 80001e1c .word 0x80001e1c + 80001e30: 00000000 .word 0x00000000 + 80001e34: 80010545 .word 0x80010545 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0000000000000001 + 80001e40: 0007bc03 ld x24,0(x15) + 80001e44: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000000000002 + 80001e48: 0007ba83 ld x21,0(x15) + 80001e4c: 00878793 addi x15,x15,8 + +0000000080001e50 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + orn x28, x24, x21 # perform operation + 80001e50: 415c6e33 orn x28,x24,x21 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e54: 0004b383 ld x7,0(x9) + 80001e58: 01c38c63 beq x7,x28,80001e70 + 80001e5c: 6bd0546f jal x8,80007d18 + 80001e60: 80001e50 .word 0x80001e50 + 80001e64: 00000000 .word 0x00000000 + 80001e68: 80010595 .word 0x80010595 + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0000000000000001 + 80001e74: 0007b983 ld x19,0(x15) + 80001e78: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x8000000000000000 + 80001e7c: 0007bb83 ld x23,0(x15) + 80001e80: 00878793 addi x15,x15,8 + +0000000080001e84 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + orn x12, x19, x23 # perform operation + 80001e84: 4179e633 orn x12,x19,x23 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e88: 0004b383 ld x7,0(x9) + 80001e8c: 00c38c63 beq x7,x12,80001ea4 + 80001e90: 6890546f jal x8,80007d18 + 80001e94: 80001e84 .word 0x80001e84 + 80001e98: 00000000 .word 0x00000000 + 80001e9c: 800105e5 .word 0x800105e5 + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x0000000000000001 + 80001ea8: 0007be03 ld x28,0(x15) + 80001eac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x8000000000000001 + 80001eb0: 0007ba83 ld x21,0(x15) + 80001eb4: 00878793 addi x15,x15,8 + +0000000080001eb8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + orn x2, x28, x21 # perform operation + 80001eb8: 415e6133 orn x2,x28,x21 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ebc: 0004b383 ld x7,0(x9) + 80001ec0: 00238c63 beq x7,x2,80001ed8 + 80001ec4: 6550546f jal x8,80007d18 + 80001ec8: 80001eb8 .word 0x80001eb8 + 80001ecc: 00000000 .word 0x00000000 + 80001ed0: 80010644 .word 0x80010644 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x0000000000000001 + 80001edc: 0007bd03 ld x26,0(x15) + 80001ee0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x7fffffffffffffff + 80001ee4: 0007be03 ld x28,0(x15) + 80001ee8: 00878793 addi x15,x15,8 + +0000000080001eec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + orn x22, x26, x28 # perform operation + 80001eec: 41cd6b33 orn x22,x26,x28 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef0: 0004b383 ld x7,0(x9) + 80001ef4: 01638c63 beq x7,x22,80001f0c + 80001ef8: 6210546f jal x8,80007d18 + 80001efc: 80001eec .word 0x80001eec + 80001f00: 00000000 .word 0x00000000 + 80001f04: 800106a3 .word 0x800106a3 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x0000000000000001 + 80001f10: 0007b303 ld x6,0(x15) + 80001f14: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x7ffffffffffffffe + 80001f18: 0007b203 ld x4,0(x15) + 80001f1c: 00878793 addi x15,x15,8 + +0000000080001f20 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + orn x20, x6, x4 # perform operation + 80001f20: 40436a33 orn x20,x6,x4 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f24: 0004b383 ld x7,0(x9) + 80001f28: 01438c63 beq x7,x20,80001f40 + 80001f2c: 5ed0546f jal x8,80007d18 + 80001f30: 80001f20 .word 0x80001f20 + 80001f34: 00000000 .word 0x00000000 + 80001f38: 80010702 .word 0x80010702 + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0000000000000001 + 80001f44: 0007b883 ld x17,0(x15) + 80001f48: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xffffffffffffffff + 80001f4c: 0007b203 ld x4,0(x15) + 80001f50: 00878793 addi x15,x15,8 + +0000000080001f54 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + orn x21, x17, x4 # perform operation + 80001f54: 4048eab3 orn x21,x17,x4 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f58: 0004b383 ld x7,0(x9) + 80001f5c: 01538c63 beq x7,x21,80001f74 + 80001f60: 5b90546f jal x8,80007d18 + 80001f64: 80001f54 .word 0x80001f54 + 80001f68: 00000000 .word 0x00000000 + 80001f6c: 80010761 .word 0x80010761 + 80001f70: 00000000 .word 0x00000000 + 80001f74: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0000000000000001 + 80001f78: 0007bf03 ld x30,0(x15) + 80001f7c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xfffffffffffffffe + 80001f80: 0007bb03 ld x22,0(x15) + 80001f84: 00878793 addi x15,x15,8 + +0000000080001f88 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + orn x11, x30, x22 # perform operation + 80001f88: 416f65b3 orn x11,x30,x22 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f8c: 0004b383 ld x7,0(x9) + 80001f90: 00b38c63 beq x7,x11,80001fa8 + 80001f94: 5850546f jal x8,80007d18 + 80001f98: 80001f88 .word 0x80001f88 + 80001f9c: 00000000 .word 0x00000000 + 80001fa0: 800107c0 .word 0x800107c0 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x0000000000000001 + 80001fac: 0007b583 ld x11,0(x15) + 80001fb0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80001fb4: 0007ba83 ld x21,0(x15) + 80001fb8: 00878793 addi x15,x15,8 + +0000000080001fbc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + orn x12, x11, x21 # perform operation + 80001fbc: 4155e633 orn x12,x11,x21 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc0: 0004b383 ld x7,0(x9) + 80001fc4: 00c38c63 beq x7,x12,80001fdc + 80001fc8: 5510546f jal x8,80007d18 + 80001fcc: 80001fbc .word 0x80001fbc + 80001fd0: 00000000 .word 0x00000000 + 80001fd4: 8001081f .word 0x8001081f + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x0000000000000001 + 80001fe0: 0007b583 ld x11,0(x15) + 80001fe4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80001fe8: 0007ba83 ld x21,0(x15) + 80001fec: 00878793 addi x15,x15,8 + +0000000080001ff0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + orn x25, x11, x21 # perform operation + 80001ff0: 4155ecb3 orn x25,x11,x21 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ff4: 0004b383 ld x7,0(x9) + 80001ff8: 01938c63 beq x7,x25,80002010 + 80001ffc: 51d0546f jal x8,80007d18 + 80002000: 80001ff0 .word 0x80001ff0 + 80002004: 00000000 .word 0x00000000 + 80002008: 8001087e .word 0x8001087e + 8000200c: 00000000 .word 0x00000000 + 80002010: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x0000000000000001 + 80002014: 0007bf83 ld x31,0(x15) + 80002018: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x5555555555555555 + 8000201c: 0007bd03 ld x26,0(x15) + 80002020: 00878793 addi x15,x15,8 + +0000000080002024 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + orn x2, x31, x26 # perform operation + 80002024: 41afe133 orn x2,x31,x26 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002028: 0004b383 ld x7,0(x9) + 8000202c: 00238c63 beq x7,x2,80002044 + 80002030: 4e90546f jal x8,80007d18 + 80002034: 80002024 .word 0x80002024 + 80002038: 00000000 .word 0x00000000 + 8000203c: 800108dd .word 0x800108dd + 80002040: 00000000 .word 0x00000000 + 80002044: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x0000000000000001 + 80002048: 0007bb03 ld x22,0(x15) + 8000204c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x00000000ffffffff + 80002050: 0007b303 ld x6,0(x15) + 80002054: 00878793 addi x15,x15,8 + +0000000080002058 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + orn x30, x22, x6 # perform operation + 80002058: 406b6f33 orn x30,x22,x6 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000205c: 0004b383 ld x7,0(x9) + 80002060: 01e38c63 beq x7,x30,80002078 + 80002064: 4b50546f jal x8,80007d18 + 80002068: 80002058 .word 0x80002058 + 8000206c: 00000000 .word 0x00000000 + 80002070: 8001093c .word 0x8001093c + 80002074: 00000000 .word 0x00000000 + 80002078: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0000000000000001 + 8000207c: 0007b983 ld x19,0(x15) + 80002080: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x00000000fffffffe + 80002084: 0007be83 ld x29,0(x15) + 80002088: 00878793 addi x15,x15,8 + +000000008000208c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + orn x22, x19, x29 # perform operation + 8000208c: 41d9eb33 orn x22,x19,x29 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002090: 0004b383 ld x7,0(x9) + 80002094: 01638c63 beq x7,x22,800020ac + 80002098: 4810546f jal x8,80007d18 + 8000209c: 8000208c .word 0x8000208c + 800020a0: 00000000 .word 0x00000000 + 800020a4: 80010993 .word 0x80010993 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x0000000000000001 + 800020b0: 0007b103 ld x2,0(x15) + 800020b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000100000000 + 800020b8: 0007bc03 ld x24,0(x15) + 800020bc: 00878793 addi x15,x15,8 + +00000000800020c0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + orn x25, x2, x24 # perform operation + 800020c0: 41816cb3 orn x25,x2,x24 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020c4: 0004b383 ld x7,0(x9) + 800020c8: 01938c63 beq x7,x25,800020e0 + 800020cc: 44d0546f jal x8,80007d18 + 800020d0: 800020c0 .word 0x800020c0 + 800020d4: 00000000 .word 0x00000000 + 800020d8: 800109ea .word 0x800109ea + 800020dc: 00000000 .word 0x00000000 + 800020e0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0000000000000001 + 800020e4: 0007bc03 ld x24,0(x15) + 800020e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x0000000100000001 + 800020ec: 0007b703 ld x14,0(x15) + 800020f0: 00878793 addi x15,x15,8 + +00000000800020f4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + orn x11, x24, x14 # perform operation + 800020f4: 40ec65b3 orn x11,x24,x14 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020f8: 0004b383 ld x7,0(x9) + 800020fc: 00b38c63 beq x7,x11,80002114 + 80002100: 4190546f jal x8,80007d18 + 80002104: 800020f4 .word 0x800020f4 + 80002108: 00000000 .word 0x00000000 + 8000210c: 80010a42 .word 0x80010a42 + 80002110: 00000000 .word 0x00000000 + 80002114: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0000000000000002 + 80002118: 0007bf03 ld x30,0(x15) + 8000211c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x0000000000000000 + 80002120: 0007b503 ld x10,0(x15) + 80002124: 00878793 addi x15,x15,8 + +0000000080002128 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + orn x4, x30, x10 # perform operation + 80002128: 40af6233 orn x4,x30,x10 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000212c: 0004b383 ld x7,0(x9) + 80002130: 00438c63 beq x7,x4,80002148 + 80002134: 3e50546f jal x8,80007d18 + 80002138: 80002128 .word 0x80002128 + 8000213c: 00000000 .word 0x00000000 + 80002140: 80010a9a .word 0x80010a9a + 80002144: 00000000 .word 0x00000000 + 80002148: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x0000000000000002 + 8000214c: 0007b803 ld x16,0(x15) + 80002150: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x0000000000000001 + 80002154: 0007b103 ld x2,0(x15) + 80002158: 00878793 addi x15,x15,8 + +000000008000215c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + orn x5, x16, x2 # perform operation + 8000215c: 402862b3 orn x5,x16,x2 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002160: 0004b383 ld x7,0(x9) + 80002164: 00538c63 beq x7,x5,8000217c + 80002168: 3b10546f jal x8,80007d18 + 8000216c: 8000215c .word 0x8000215c + 80002170: 00000000 .word 0x00000000 + 80002174: 80010aea .word 0x80010aea + 80002178: 00000000 .word 0x00000000 + 8000217c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x0000000000000002 + 80002180: 0007b283 ld x5,0(x15) + 80002184: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000000000002 + 80002188: 0007bb03 ld x22,0(x15) + 8000218c: 00878793 addi x15,x15,8 + +0000000080002190 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + orn x27, x5, x22 # perform operation + 80002190: 4162edb3 orn x27,x5,x22 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002194: 0004b383 ld x7,0(x9) + 80002198: 01b38c63 beq x7,x27,800021b0 + 8000219c: 37d0546f jal x8,80007d18 + 800021a0: 80002190 .word 0x80002190 + 800021a4: 00000000 .word 0x00000000 + 800021a8: 80010b3a .word 0x80010b3a + 800021ac: 00000000 .word 0x00000000 + 800021b0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x0000000000000002 + 800021b4: 0007ba03 ld x20,0(x15) + 800021b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x8000000000000000 + 800021bc: 0007bd83 ld x27,0(x15) + 800021c0: 00878793 addi x15,x15,8 + +00000000800021c4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + orn x1, x20, x27 # perform operation + 800021c4: 41ba60b3 orn x1,x20,x27 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021c8: 0004b383 ld x7,0(x9) + 800021cc: 00138c63 beq x7,x1,800021e4 + 800021d0: 3490546f jal x8,80007d18 + 800021d4: 800021c4 .word 0x800021c4 + 800021d8: 00000000 .word 0x00000000 + 800021dc: 80010b8a .word 0x80010b8a + 800021e0: 00000000 .word 0x00000000 + 800021e4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x0000000000000002 + 800021e8: 0007ba83 ld x21,0(x15) + 800021ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x8000000000000001 + 800021f0: 0007b583 ld x11,0(x15) + 800021f4: 00878793 addi x15,x15,8 + +00000000800021f8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + orn x18, x21, x11 # perform operation + 800021f8: 40bae933 orn x18,x21,x11 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 800021fc: 0004b383 ld x7,0(x9) + 80002200: 01238c63 beq x7,x18,80002218 + 80002204: 3150546f jal x8,80007d18 + 80002208: 800021f8 .word 0x800021f8 + 8000220c: 00000000 .word 0x00000000 + 80002210: 80010be9 .word 0x80010be9 + 80002214: 00000000 .word 0x00000000 + 80002218: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x0000000000000002 + 8000221c: 0007b683 ld x13,0(x15) + 80002220: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x7fffffffffffffff + 80002224: 0007b503 ld x10,0(x15) + 80002228: 00878793 addi x15,x15,8 + +000000008000222c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + orn x30, x13, x10 # perform operation + 8000222c: 40a6ef33 orn x30,x13,x10 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002230: 0004b383 ld x7,0(x9) + 80002234: 01e38c63 beq x7,x30,8000224c + 80002238: 2e10546f jal x8,80007d18 + 8000223c: 8000222c .word 0x8000222c + 80002240: 00000000 .word 0x00000000 + 80002244: 80010c48 .word 0x80010c48 + 80002248: 00000000 .word 0x00000000 + 8000224c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0000000000000002 + 80002250: 0007b883 ld x17,0(x15) + 80002254: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80002258: 0007b703 ld x14,0(x15) + 8000225c: 00878793 addi x15,x15,8 + +0000000080002260 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + orn x20, x17, x14 # perform operation + 80002260: 40e8ea33 orn x20,x17,x14 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002264: 0004b383 ld x7,0(x9) + 80002268: 01438c63 beq x7,x20,80002280 + 8000226c: 2ad0546f jal x8,80007d18 + 80002270: 80002260 .word 0x80002260 + 80002274: 00000000 .word 0x00000000 + 80002278: 80010ca7 .word 0x80010ca7 + 8000227c: 00000000 .word 0x00000000 + 80002280: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0000000000000002 + 80002284: 0007b883 ld x17,0(x15) + 80002288: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xffffffffffffffff + 8000228c: 0007b183 ld x3,0(x15) + 80002290: 00878793 addi x15,x15,8 + +0000000080002294 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + orn x5, x17, x3 # perform operation + 80002294: 4038e2b3 orn x5,x17,x3 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 80002298: 0004b383 ld x7,0(x9) + 8000229c: 00538c63 beq x7,x5,800022b4 + 800022a0: 2790546f jal x8,80007d18 + 800022a4: 80002294 .word 0x80002294 + 800022a8: 00000000 .word 0x00000000 + 800022ac: 80010d06 .word 0x80010d06 + 800022b0: 00000000 .word 0x00000000 + 800022b4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x0000000000000002 + 800022b8: 0007be83 ld x29,0(x15) + 800022bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xfffffffffffffffe + 800022c0: 0007b083 ld x1,0(x15) + 800022c4: 00878793 addi x15,x15,8 + +00000000800022c8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + orn x13, x29, x1 # perform operation + 800022c8: 401ee6b3 orn x13,x29,x1 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022cc: 0004b383 ld x7,0(x9) + 800022d0: 00d38c63 beq x7,x13,800022e8 + 800022d4: 2450546f jal x8,80007d18 + 800022d8: 800022c8 .word 0x800022c8 + 800022dc: 00000000 .word 0x00000000 + 800022e0: 80010d65 .word 0x80010d65 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0000000000000002 + 800022ec: 0007bd83 ld x27,0(x15) + 800022f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 800022f4: 0007b803 ld x16,0(x15) + 800022f8: 00878793 addi x15,x15,8 + +00000000800022fc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + orn x3, x27, x16 # perform operation + 800022fc: 410de1b3 orn x3,x27,x16 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002300: 0004b383 ld x7,0(x9) + 80002304: 00338c63 beq x7,x3,8000231c + 80002308: 2110546f jal x8,80007d18 + 8000230c: 800022fc .word 0x800022fc + 80002310: 00000000 .word 0x00000000 + 80002314: 80010dc4 .word 0x80010dc4 + 80002318: 00000000 .word 0x00000000 + 8000231c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x0000000000000002 + 80002320: 0007b903 ld x18,0(x15) + 80002324: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 80002328: 0007bc83 ld x25,0(x15) + 8000232c: 00878793 addi x15,x15,8 + +0000000080002330 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + orn x28, x18, x25 # perform operation + 80002330: 41996e33 orn x28,x18,x25 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002334: 0004b383 ld x7,0(x9) + 80002338: 01c38c63 beq x7,x28,80002350 + 8000233c: 1dd0546f jal x8,80007d18 + 80002340: 80002330 .word 0x80002330 + 80002344: 00000000 .word 0x00000000 + 80002348: 80010e23 .word 0x80010e23 + 8000234c: 00000000 .word 0x00000000 + 80002350: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x0000000000000002 + 80002354: 0007b283 ld x5,0(x15) + 80002358: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x5555555555555555 + 8000235c: 0007b583 ld x11,0(x15) + 80002360: 00878793 addi x15,x15,8 + +0000000080002364 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + orn x25, x5, x11 # perform operation + 80002364: 40b2ecb3 orn x25,x5,x11 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002368: 0004b383 ld x7,0(x9) + 8000236c: 01938c63 beq x7,x25,80002384 + 80002370: 1a90546f jal x8,80007d18 + 80002374: 80002364 .word 0x80002364 + 80002378: 00000000 .word 0x00000000 + 8000237c: 80010e82 .word 0x80010e82 + 80002380: 00000000 .word 0x00000000 + 80002384: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x0000000000000002 + 80002388: 0007ba83 ld x21,0(x15) + 8000238c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x00000000ffffffff + 80002390: 0007b803 ld x16,0(x15) + 80002394: 00878793 addi x15,x15,8 + +0000000080002398 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + orn x26, x21, x16 # perform operation + 80002398: 410aed33 orn x26,x21,x16 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 8000239c: 0004b383 ld x7,0(x9) + 800023a0: 01a38c63 beq x7,x26,800023b8 + 800023a4: 1750546f jal x8,80007d18 + 800023a8: 80002398 .word 0x80002398 + 800023ac: 00000000 .word 0x00000000 + 800023b0: 80010ee1 .word 0x80010ee1 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0000000000000002 + 800023bc: 0007b503 ld x10,0(x15) + 800023c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x00000000fffffffe + 800023c4: 0007b903 ld x18,0(x15) + 800023c8: 00878793 addi x15,x15,8 + +00000000800023cc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + orn x20, x10, x18 # perform operation + 800023cc: 41256a33 orn x20,x10,x18 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d0: 0004b383 ld x7,0(x9) + 800023d4: 01438c63 beq x7,x20,800023ec + 800023d8: 1410546f jal x8,80007d18 + 800023dc: 800023cc .word 0x800023cc + 800023e0: 00000000 .word 0x00000000 + 800023e4: 80010f38 .word 0x80010f38 + 800023e8: 00000000 .word 0x00000000 + 800023ec: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x0000000000000002 + 800023f0: 0007b203 ld x4,0(x15) + 800023f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000100000000 + 800023f8: 0007bc83 ld x25,0(x15) + 800023fc: 00878793 addi x15,x15,8 + +0000000080002400 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + orn x2, x4, x25 # perform operation + 80002400: 41926133 orn x2,x4,x25 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002404: 0004b383 ld x7,0(x9) + 80002408: 00238c63 beq x7,x2,80002420 + 8000240c: 10d0546f jal x8,80007d18 + 80002410: 80002400 .word 0x80002400 + 80002414: 00000000 .word 0x00000000 + 80002418: 80010f8f .word 0x80010f8f + 8000241c: 00000000 .word 0x00000000 + 80002420: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x0000000000000002 + 80002424: 0007b803 ld x16,0(x15) + 80002428: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x0000000100000001 + 8000242c: 0007b203 ld x4,0(x15) + 80002430: 00878793 addi x15,x15,8 + +0000000080002434 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + orn x17, x16, x4 # perform operation + 80002434: 404868b3 orn x17,x16,x4 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002438: 0004b383 ld x7,0(x9) + 8000243c: 01138c63 beq x7,x17,80002454 + 80002440: 0d90546f jal x8,80007d18 + 80002444: 80002434 .word 0x80002434 + 80002448: 00000000 .word 0x00000000 + 8000244c: 80010fe7 .word 0x80010fe7 + 80002450: 00000000 .word 0x00000000 + 80002454: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8000000000000000 + 80002458: 0007bb03 ld x22,0(x15) + 8000245c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x0000000000000000 + 80002460: 0007b203 ld x4,0(x15) + 80002464: 00878793 addi x15,x15,8 + +0000000080002468 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + orn x23, x22, x4 # perform operation + 80002468: 404b6bb3 orn x23,x22,x4 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000246c: 0004b383 ld x7,0(x9) + 80002470: 01738c63 beq x7,x23,80002488 + 80002474: 0a50546f jal x8,80007d18 + 80002478: 80002468 .word 0x80002468 + 8000247c: 00000000 .word 0x00000000 + 80002480: 8001103f .word 0x8001103f + 80002484: 00000000 .word 0x00000000 + 80002488: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x8000000000000000 + 8000248c: 0007bf83 ld x31,0(x15) + 80002490: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x0000000000000001 + 80002494: 0007b103 ld x2,0(x15) + 80002498: 00878793 addi x15,x15,8 + +000000008000249c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + orn x18, x31, x2 # perform operation + 8000249c: 402fe933 orn x18,x31,x2 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a0: 0004b383 ld x7,0(x9) + 800024a4: 01238c63 beq x7,x18,800024bc + 800024a8: 0710546f jal x8,80007d18 + 800024ac: 8000249c .word 0x8000249c + 800024b0: 00000000 .word 0x00000000 + 800024b4: 8001109e .word 0x8001109e + 800024b8: 00000000 .word 0x00000000 + 800024bc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8000000000000000 + 800024c0: 0007bc03 ld x24,0(x15) + 800024c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0000000000000002 + 800024c8: 0007b283 ld x5,0(x15) + 800024cc: 00878793 addi x15,x15,8 + +00000000800024d0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + orn x20, x24, x5 # perform operation + 800024d0: 405c6a33 orn x20,x24,x5 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024d4: 0004b383 ld x7,0(x9) + 800024d8: 01438c63 beq x7,x20,800024f0 + 800024dc: 03d0546f jal x8,80007d18 + 800024e0: 800024d0 .word 0x800024d0 + 800024e4: 00000000 .word 0x00000000 + 800024e8: 800110fd .word 0x800110fd + 800024ec: 00000000 .word 0x00000000 + 800024f0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8000000000000000 + 800024f4: 0007bc83 ld x25,0(x15) + 800024f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x8000000000000000 + 800024fc: 0007b903 ld x18,0(x15) + 80002500: 00878793 addi x15,x15,8 + +0000000080002504 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + orn x14, x25, x18 # perform operation + 80002504: 412ce733 orn x14,x25,x18 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002508: 0004b383 ld x7,0(x9) + 8000250c: 00e38c63 beq x7,x14,80002524 + 80002510: 0090546f jal x8,80007d18 + 80002514: 80002504 .word 0x80002504 + 80002518: 00000000 .word 0x00000000 + 8000251c: 8001115c .word 0x8001115c + 80002520: 00000000 .word 0x00000000 + 80002524: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x8000000000000000 + 80002528: 0007bf83 ld x31,0(x15) + 8000252c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x8000000000000001 + 80002530: 0007b903 ld x18,0(x15) + 80002534: 00878793 addi x15,x15,8 + +0000000080002538 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + orn x5, x31, x18 # perform operation + 80002538: 412fe2b3 orn x5,x31,x18 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000253c: 0004b383 ld x7,0(x9) + 80002540: 00538c63 beq x7,x5,80002558 + 80002544: 7d40546f jal x8,80007d18 + 80002548: 80002538 .word 0x80002538 + 8000254c: 00000000 .word 0x00000000 + 80002550: 800111ca .word 0x800111ca + 80002554: 00000000 .word 0x00000000 + 80002558: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x8000000000000000 + 8000255c: 0007b103 ld x2,0(x15) + 80002560: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002564: 0007b903 ld x18,0(x15) + 80002568: 00878793 addi x15,x15,8 + +000000008000256c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + orn x27, x2, x18 # perform operation + 8000256c: 41216db3 orn x27,x2,x18 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002570: 0004b383 ld x7,0(x9) + 80002574: 01b38c63 beq x7,x27,8000258c + 80002578: 7a00546f jal x8,80007d18 + 8000257c: 8000256c .word 0x8000256c + 80002580: 00000000 .word 0x00000000 + 80002584: 80011238 .word 0x80011238 + 80002588: 00000000 .word 0x00000000 + 8000258c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8000000000000000 + 80002590: 0007bb03 ld x22,0(x15) + 80002594: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80002598: 0007b703 ld x14,0(x15) + 8000259c: 00878793 addi x15,x15,8 + +00000000800025a0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + orn x13, x22, x14 # perform operation + 800025a0: 40eb66b3 orn x13,x22,x14 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025a4: 0004b383 ld x7,0(x9) + 800025a8: 00d38c63 beq x7,x13,800025c0 + 800025ac: 76c0546f jal x8,80007d18 + 800025b0: 800025a0 .word 0x800025a0 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 800112a6 .word 0x800112a6 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x8000000000000000 + 800025c4: 0007be03 ld x28,0(x15) + 800025c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xffffffffffffffff + 800025cc: 0007b303 ld x6,0(x15) + 800025d0: 00878793 addi x15,x15,8 + +00000000800025d4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + orn x25, x28, x6 # perform operation + 800025d4: 406e6cb3 orn x25,x28,x6 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025d8: 0004b383 ld x7,0(x9) + 800025dc: 01938c63 beq x7,x25,800025f4 + 800025e0: 7380546f jal x8,80007d18 + 800025e4: 800025d4 .word 0x800025d4 + 800025e8: 00000000 .word 0x00000000 + 800025ec: 80011314 .word 0x80011314 + 800025f0: 00000000 .word 0x00000000 + 800025f4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x8000000000000000 + 800025f8: 0007bd83 ld x27,0(x15) + 800025fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xfffffffffffffffe + 80002600: 0007b103 ld x2,0(x15) + 80002604: 00878793 addi x15,x15,8 + +0000000080002608 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + orn x11, x27, x2 # perform operation + 80002608: 402de5b3 orn x11,x27,x2 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000260c: 0004b383 ld x7,0(x9) + 80002610: 00b38c63 beq x7,x11,80002628 + 80002614: 7040546f jal x8,80007d18 + 80002618: 80002608 .word 0x80002608 + 8000261c: 00000000 .word 0x00000000 + 80002620: 80011382 .word 0x80011382 + 80002624: 00000000 .word 0x00000000 + 80002628: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x8000000000000000 + 8000262c: 0007bd83 ld x27,0(x15) + 80002630: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002634: 0007b703 ld x14,0(x15) + 80002638: 00878793 addi x15,x15,8 + +000000008000263c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + orn x2, x27, x14 # perform operation + 8000263c: 40ede133 orn x2,x27,x14 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002640: 0004b383 ld x7,0(x9) + 80002644: 00238c63 beq x7,x2,8000265c + 80002648: 6d00546f jal x8,80007d18 + 8000264c: 8000263c .word 0x8000263c + 80002650: 00000000 .word 0x00000000 + 80002654: 800113f0 .word 0x800113f0 + 80002658: 00000000 .word 0x00000000 + 8000265c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8000000000000000 + 80002660: 0007bc83 ld x25,0(x15) + 80002664: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80002668: 0007b703 ld x14,0(x15) + 8000266c: 00878793 addi x15,x15,8 + +0000000080002670 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + orn x26, x25, x14 # perform operation + 80002670: 40eced33 orn x26,x25,x14 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002674: 0004b383 ld x7,0(x9) + 80002678: 01a38c63 beq x7,x26,80002690 + 8000267c: 69c0546f jal x8,80007d18 + 80002680: 80002670 .word 0x80002670 + 80002684: 00000000 .word 0x00000000 + 80002688: 8001145e .word 0x8001145e + 8000268c: 00000000 .word 0x00000000 + 80002690: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x8000000000000000 + 80002694: 0007b583 ld x11,0(x15) + 80002698: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x5555555555555555 + 8000269c: 0007bd03 ld x26,0(x15) + 800026a0: 00878793 addi x15,x15,8 + +00000000800026a4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + orn x28, x11, x26 # perform operation + 800026a4: 41a5ee33 orn x28,x11,x26 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026a8: 0004b383 ld x7,0(x9) + 800026ac: 01c38c63 beq x7,x28,800026c4 + 800026b0: 6680546f jal x8,80007d18 + 800026b4: 800026a4 .word 0x800026a4 + 800026b8: 00000000 .word 0x00000000 + 800026bc: 800114cc .word 0x800114cc + 800026c0: 00000000 .word 0x00000000 + 800026c4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x8000000000000000 + 800026c8: 0007bb83 ld x23,0(x15) + 800026cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x00000000ffffffff + 800026d0: 0007b803 ld x16,0(x15) + 800026d4: 00878793 addi x15,x15,8 + +00000000800026d8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + orn x13, x23, x16 # perform operation + 800026d8: 410be6b3 orn x13,x23,x16 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026dc: 0004b383 ld x7,0(x9) + 800026e0: 00d38c63 beq x7,x13,800026f8 + 800026e4: 6340546f jal x8,80007d18 + 800026e8: 800026d8 .word 0x800026d8 + 800026ec: 00000000 .word 0x00000000 + 800026f0: 8001153a .word 0x8001153a + 800026f4: 00000000 .word 0x00000000 + 800026f8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8000000000000000 + 800026fc: 0007bb03 ld x22,0(x15) + 80002700: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x00000000fffffffe + 80002704: 0007bc83 ld x25,0(x15) + 80002708: 00878793 addi x15,x15,8 + +000000008000270c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + orn x23, x22, x25 # perform operation + 8000270c: 419b6bb3 orn x23,x22,x25 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002710: 0004b383 ld x7,0(x9) + 80002714: 01738c63 beq x7,x23,8000272c + 80002718: 6000546f jal x8,80007d18 + 8000271c: 8000270c .word 0x8000270c + 80002720: 00000000 .word 0x00000000 + 80002724: 800115a0 .word 0x800115a0 + 80002728: 00000000 .word 0x00000000 + 8000272c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x8000000000000000 + 80002730: 0007b703 ld x14,0(x15) + 80002734: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000100000000 + 80002738: 0007ba83 ld x21,0(x15) + 8000273c: 00878793 addi x15,x15,8 + +0000000080002740 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + orn x13, x14, x21 # perform operation + 80002740: 415766b3 orn x13,x14,x21 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002744: 0004b383 ld x7,0(x9) + 80002748: 00d38c63 beq x7,x13,80002760 + 8000274c: 5cc0546f jal x8,80007d18 + 80002750: 80002740 .word 0x80002740 + 80002754: 00000000 .word 0x00000000 + 80002758: 80011606 .word 0x80011606 + 8000275c: 00000000 .word 0x00000000 + 80002760: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x8000000000000000 + 80002764: 0007b183 ld x3,0(x15) + 80002768: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000100000001 + 8000276c: 0007bc03 ld x24,0(x15) + 80002770: 00878793 addi x15,x15,8 + +0000000080002774 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + orn x28, x3, x24 # perform operation + 80002774: 4181ee33 orn x28,x3,x24 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002778: 0004b383 ld x7,0(x9) + 8000277c: 01c38c63 beq x7,x28,80002794 + 80002780: 5980546f jal x8,80007d18 + 80002784: 80002774 .word 0x80002774 + 80002788: 00000000 .word 0x00000000 + 8000278c: 8001166d .word 0x8001166d + 80002790: 00000000 .word 0x00000000 + 80002794: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x8000000000000001 + 80002798: 0007ba83 ld x21,0(x15) + 8000279c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x0000000000000000 + 800027a0: 0007b503 ld x10,0(x15) + 800027a4: 00878793 addi x15,x15,8 + +00000000800027a8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + orn x30, x21, x10 # perform operation + 800027a8: 40aaef33 orn x30,x21,x10 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027ac: 0004b383 ld x7,0(x9) + 800027b0: 01e38c63 beq x7,x30,800027c8 + 800027b4: 5640546f jal x8,80007d18 + 800027b8: 800027a8 .word 0x800027a8 + 800027bc: 00000000 .word 0x00000000 + 800027c0: 800116d4 .word 0x800116d4 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x8000000000000001 + 800027cc: 0007ba03 ld x20,0(x15) + 800027d0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x0000000000000001 + 800027d4: 0007b803 ld x16,0(x15) + 800027d8: 00878793 addi x15,x15,8 + +00000000800027dc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + orn x4, x20, x16 # perform operation + 800027dc: 410a6233 orn x4,x20,x16 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e0: 0004b383 ld x7,0(x9) + 800027e4: 00438c63 beq x7,x4,800027fc + 800027e8: 5300546f jal x8,80007d18 + 800027ec: 800027dc .word 0x800027dc + 800027f0: 00000000 .word 0x00000000 + 800027f4: 80011733 .word 0x80011733 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x8000000000000001 + 80002800: 0007be03 ld x28,0(x15) + 80002804: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000000000002 + 80002808: 0007bb03 ld x22,0(x15) + 8000280c: 00878793 addi x15,x15,8 + +0000000080002810 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + orn x2, x28, x22 # perform operation + 80002810: 416e6133 orn x2,x28,x22 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002814: 0004b383 ld x7,0(x9) + 80002818: 00238c63 beq x7,x2,80002830 + 8000281c: 4fc0546f jal x8,80007d18 + 80002820: 80002810 .word 0x80002810 + 80002824: 00000000 .word 0x00000000 + 80002828: 80011792 .word 0x80011792 + 8000282c: 00000000 .word 0x00000000 + 80002830: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x8000000000000001 + 80002834: 0007b503 ld x10,0(x15) + 80002838: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x8000000000000000 + 8000283c: 0007b983 ld x19,0(x15) + 80002840: 00878793 addi x15,x15,8 + +0000000080002844 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + orn x23, x10, x19 # perform operation + 80002844: 41356bb3 orn x23,x10,x19 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002848: 0004b383 ld x7,0(x9) + 8000284c: 01738c63 beq x7,x23,80002864 + 80002850: 4c80546f jal x8,80007d18 + 80002854: 80002844 .word 0x80002844 + 80002858: 00000000 .word 0x00000000 + 8000285c: 800117f1 .word 0x800117f1 + 80002860: 00000000 .word 0x00000000 + 80002864: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8000000000000001 + 80002868: 0007b603 ld x12,0(x15) + 8000286c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x8000000000000001 + 80002870: 0007bb83 ld x23,0(x15) + 80002874: 00878793 addi x15,x15,8 + +0000000080002878 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + orn x21, x12, x23 # perform operation + 80002878: 41766ab3 orn x21,x12,x23 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000287c: 0004b383 ld x7,0(x9) + 80002880: 01538c63 beq x7,x21,80002898 + 80002884: 4940546f jal x8,80007d18 + 80002888: 80002878 .word 0x80002878 + 8000288c: 00000000 .word 0x00000000 + 80002890: 8001185f .word 0x8001185f + 80002894: 00000000 .word 0x00000000 + 80002898: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8000000000000001 + 8000289c: 0007bc83 ld x25,0(x15) + 800028a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x7fffffffffffffff + 800028a4: 0007b203 ld x4,0(x15) + 800028a8: 00878793 addi x15,x15,8 + +00000000800028ac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + orn x20, x25, x4 # perform operation + 800028ac: 404cea33 orn x20,x25,x4 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b0: 0004b383 ld x7,0(x9) + 800028b4: 01438c63 beq x7,x20,800028cc + 800028b8: 4600546f jal x8,80007d18 + 800028bc: 800028ac .word 0x800028ac + 800028c0: 00000000 .word 0x00000000 + 800028c4: 800118cd .word 0x800118cd + 800028c8: 00000000 .word 0x00000000 + 800028cc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x8000000000000001 + 800028d0: 0007b883 ld x17,0(x15) + 800028d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x7ffffffffffffffe + 800028d8: 0007bd83 ld x27,0(x15) + 800028dc: 00878793 addi x15,x15,8 + +00000000800028e0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + orn x13, x17, x27 # perform operation + 800028e0: 41b8e6b3 orn x13,x17,x27 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028e4: 0004b383 ld x7,0(x9) + 800028e8: 00d38c63 beq x7,x13,80002900 + 800028ec: 42c0546f jal x8,80007d18 + 800028f0: 800028e0 .word 0x800028e0 + 800028f4: 00000000 .word 0x00000000 + 800028f8: 8001193b .word 0x8001193b + 800028fc: 00000000 .word 0x00000000 + 80002900: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x8000000000000001 + 80002904: 0007b083 ld x1,0(x15) + 80002908: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xffffffffffffffff + 8000290c: 0007be03 ld x28,0(x15) + 80002910: 00878793 addi x15,x15,8 + +0000000080002914 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + orn x17, x1, x28 # perform operation + 80002914: 41c0e8b3 orn x17,x1,x28 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002918: 0004b383 ld x7,0(x9) + 8000291c: 01138c63 beq x7,x17,80002934 + 80002920: 3f80546f jal x8,80007d18 + 80002924: 80002914 .word 0x80002914 + 80002928: 00000000 .word 0x00000000 + 8000292c: 800119a9 .word 0x800119a9 + 80002930: 00000000 .word 0x00000000 + 80002934: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x8000000000000001 + 80002938: 0007b803 ld x16,0(x15) + 8000293c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xfffffffffffffffe + 80002940: 0007b303 ld x6,0(x15) + 80002944: 00878793 addi x15,x15,8 + +0000000080002948 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + orn x18, x16, x6 # perform operation + 80002948: 40686933 orn x18,x16,x6 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000294c: 0004b383 ld x7,0(x9) + 80002950: 01238c63 beq x7,x18,80002968 + 80002954: 3c40546f jal x8,80007d18 + 80002958: 80002948 .word 0x80002948 + 8000295c: 00000000 .word 0x00000000 + 80002960: 80011a17 .word 0x80011a17 + 80002964: 00000000 .word 0x00000000 + 80002968: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8000000000000001 + 8000296c: 0007b603 ld x12,0(x15) + 80002970: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80002974: 0007b183 ld x3,0(x15) + 80002978: 00878793 addi x15,x15,8 + +000000008000297c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + orn x30, x12, x3 # perform operation + 8000297c: 40366f33 orn x30,x12,x3 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002980: 0004b383 ld x7,0(x9) + 80002984: 01e38c63 beq x7,x30,8000299c + 80002988: 3900546f jal x8,80007d18 + 8000298c: 8000297c .word 0x8000297c + 80002990: 00000000 .word 0x00000000 + 80002994: 80011a85 .word 0x80011a85 + 80002998: 00000000 .word 0x00000000 + 8000299c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x8000000000000001 + 800029a0: 0007b183 ld x3,0(x15) + 800029a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 800029a8: 0007b083 ld x1,0(x15) + 800029ac: 00878793 addi x15,x15,8 + +00000000800029b0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + orn x2, x3, x1 # perform operation + 800029b0: 4011e133 orn x2,x3,x1 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029b4: 0004b383 ld x7,0(x9) + 800029b8: 00238c63 beq x7,x2,800029d0 + 800029bc: 35c0546f jal x8,80007d18 + 800029c0: 800029b0 .word 0x800029b0 + 800029c4: 00000000 .word 0x00000000 + 800029c8: 80011af3 .word 0x80011af3 + 800029cc: 00000000 .word 0x00000000 + 800029d0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8000000000000001 + 800029d4: 0007bc83 ld x25,0(x15) + 800029d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x5555555555555555 + 800029dc: 0007b903 ld x18,0(x15) + 800029e0: 00878793 addi x15,x15,8 + +00000000800029e4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + orn x10, x25, x18 # perform operation + 800029e4: 412ce533 orn x10,x25,x18 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029e8: 0004b383 ld x7,0(x9) + 800029ec: 00a38c63 beq x7,x10,80002a04 + 800029f0: 3280546f jal x8,80007d18 + 800029f4: 800029e4 .word 0x800029e4 + 800029f8: 00000000 .word 0x00000000 + 800029fc: 80011b61 .word 0x80011b61 + 80002a00: 00000000 .word 0x00000000 + 80002a04: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x8000000000000001 + 80002a08: 0007b903 ld x18,0(x15) + 80002a0c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x00000000ffffffff + 80002a10: 0007b983 ld x19,0(x15) + 80002a14: 00878793 addi x15,x15,8 + +0000000080002a18 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + orn x12, x18, x19 # perform operation + 80002a18: 41396633 orn x12,x18,x19 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a1c: 0004b383 ld x7,0(x9) + 80002a20: 00c38c63 beq x7,x12,80002a38 + 80002a24: 2f40546f jal x8,80007d18 + 80002a28: 80002a18 .word 0x80002a18 + 80002a2c: 00000000 .word 0x00000000 + 80002a30: 80011bcf .word 0x80011bcf + 80002a34: 00000000 .word 0x00000000 + 80002a38: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x8000000000000001 + 80002a3c: 0007bd03 ld x26,0(x15) + 80002a40: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x00000000fffffffe + 80002a44: 0007bf83 ld x31,0(x15) + 80002a48: 00878793 addi x15,x15,8 + +0000000080002a4c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + orn x5, x26, x31 # perform operation + 80002a4c: 41fd62b3 orn x5,x26,x31 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a50: 0004b383 ld x7,0(x9) + 80002a54: 00538c63 beq x7,x5,80002a6c + 80002a58: 2c00546f jal x8,80007d18 + 80002a5c: 80002a4c .word 0x80002a4c + 80002a60: 00000000 .word 0x00000000 + 80002a64: 80011c35 .word 0x80011c35 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x8000000000000001 + 80002a70: 0007b303 ld x6,0(x15) + 80002a74: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x0000000100000000 + 80002a78: 0007bd83 ld x27,0(x15) + 80002a7c: 00878793 addi x15,x15,8 + +0000000080002a80 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + orn x11, x6, x27 # perform operation + 80002a80: 41b365b3 orn x11,x6,x27 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a84: 0004b383 ld x7,0(x9) + 80002a88: 00b38c63 beq x7,x11,80002aa0 + 80002a8c: 28c0546f jal x8,80007d18 + 80002a90: 80002a80 .word 0x80002a80 + 80002a94: 00000000 .word 0x00000000 + 80002a98: 80011c9b .word 0x80011c9b + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8000000000000001 + 80002aa4: 0007bc03 ld x24,0(x15) + 80002aa8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x0000000100000001 + 80002aac: 0007b103 ld x2,0(x15) + 80002ab0: 00878793 addi x15,x15,8 + +0000000080002ab4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + orn x29, x24, x2 # perform operation + 80002ab4: 402c6eb3 orn x29,x24,x2 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ab8: 0004b383 ld x7,0(x9) + 80002abc: 01d38c63 beq x7,x29,80002ad4 + 80002ac0: 2580546f jal x8,80007d18 + 80002ac4: 80002ab4 .word 0x80002ab4 + 80002ac8: 00000000 .word 0x00000000 + 80002acc: 80011d02 .word 0x80011d02 + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002ad8: 0007b083 ld x1,0(x15) + 80002adc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x0000000000000000 + 80002ae0: 0007b903 ld x18,0(x15) + 80002ae4: 00878793 addi x15,x15,8 + +0000000080002ae8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + orn x16, x1, x18 # perform operation + 80002ae8: 4120e833 orn x16,x1,x18 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002aec: 0004b383 ld x7,0(x9) + 80002af0: 01038c63 beq x7,x16,80002b08 + 80002af4: 2240546f jal x8,80007d18 + 80002af8: 80002ae8 .word 0x80002ae8 + 80002afc: 00000000 .word 0x00000000 + 80002b00: 80011d69 .word 0x80011d69 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002b0c: 0007be03 ld x28,0(x15) + 80002b10: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0000000000000001 + 80002b14: 0007b603 ld x12,0(x15) + 80002b18: 00878793 addi x15,x15,8 + +0000000080002b1c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + orn x22, x28, x12 # perform operation + 80002b1c: 40ce6b33 orn x22,x28,x12 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b20: 0004b383 ld x7,0(x9) + 80002b24: 01638c63 beq x7,x22,80002b3c + 80002b28: 1f00546f jal x8,80007d18 + 80002b2c: 80002b1c .word 0x80002b1c + 80002b30: 00000000 .word 0x00000000 + 80002b34: 80011dc8 .word 0x80011dc8 + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002b40: 0007b503 ld x10,0(x15) + 80002b44: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0000000000000002 + 80002b48: 0007b603 ld x12,0(x15) + 80002b4c: 00878793 addi x15,x15,8 + +0000000080002b50 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + orn x18, x10, x12 # perform operation + 80002b50: 40c56933 orn x18,x10,x12 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b54: 0004b383 ld x7,0(x9) + 80002b58: 01238c63 beq x7,x18,80002b70 + 80002b5c: 1bc0546f jal x8,80007d18 + 80002b60: 80002b50 .word 0x80002b50 + 80002b64: 00000000 .word 0x00000000 + 80002b68: 80011e27 .word 0x80011e27 + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002b74: 0007b803 ld x16,0(x15) + 80002b78: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x8000000000000000 + 80002b7c: 0007b903 ld x18,0(x15) + 80002b80: 00878793 addi x15,x15,8 + +0000000080002b84 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + orn x11, x16, x18 # perform operation + 80002b84: 412865b3 orn x11,x16,x18 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b88: 0004b383 ld x7,0(x9) + 80002b8c: 00b38c63 beq x7,x11,80002ba4 + 80002b90: 1880546f jal x8,80007d18 + 80002b94: 80002b84 .word 0x80002b84 + 80002b98: 00000000 .word 0x00000000 + 80002b9c: 80011e86 .word 0x80011e86 + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002ba8: 0007b103 ld x2,0(x15) + 80002bac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x8000000000000001 + 80002bb0: 0007b583 ld x11,0(x15) + 80002bb4: 00878793 addi x15,x15,8 + +0000000080002bb8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + orn x26, x2, x11 # perform operation + 80002bb8: 40b16d33 orn x26,x2,x11 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bbc: 0004b383 ld x7,0(x9) + 80002bc0: 01a38c63 beq x7,x26,80002bd8 + 80002bc4: 1540546f jal x8,80007d18 + 80002bc8: 80002bb8 .word 0x80002bb8 + 80002bcc: 00000000 .word 0x00000000 + 80002bd0: 80011ef4 .word 0x80011ef4 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x7fffffffffffffff + 80002bdc: 0007b203 ld x4,0(x15) + 80002be0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x7fffffffffffffff + 80002be4: 0007b683 ld x13,0(x15) + 80002be8: 00878793 addi x15,x15,8 + +0000000080002bec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + orn x6, x4, x13 # perform operation + 80002bec: 40d26333 orn x6,x4,x13 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf0: 0004b383 ld x7,0(x9) + 80002bf4: 00638c63 beq x7,x6,80002c0c + 80002bf8: 1200546f jal x8,80007d18 + 80002bfc: 80002bec .word 0x80002bec + 80002c00: 00000000 .word 0x00000000 + 80002c04: 80011f62 .word 0x80011f62 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c10: 0007ba83 ld x21,0(x15) + 80002c14: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002c18: 0007ba03 ld x20,0(x15) + 80002c1c: 00878793 addi x15,x15,8 + +0000000080002c20 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + orn x27, x21, x20 # perform operation + 80002c20: 414aedb3 orn x27,x21,x20 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c24: 0004b383 ld x7,0(x9) + 80002c28: 01b38c63 beq x7,x27,80002c40 + 80002c2c: 0ec0546f jal x8,80007d18 + 80002c30: 80002c20 .word 0x80002c20 + 80002c34: 00000000 .word 0x00000000 + 80002c38: 80011fd0 .word 0x80011fd0 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002c44: 0007be03 ld x28,0(x15) + 80002c48: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xffffffffffffffff + 80002c4c: 0007b183 ld x3,0(x15) + 80002c50: 00878793 addi x15,x15,8 + +0000000080002c54 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + orn x31, x28, x3 # perform operation + 80002c54: 403e6fb3 orn x31,x28,x3 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c58: 0004b383 ld x7,0(x9) + 80002c5c: 01f38c63 beq x7,x31,80002c74 + 80002c60: 0b80546f jal x8,80007d18 + 80002c64: 80002c54 .word 0x80002c54 + 80002c68: 00000000 .word 0x00000000 + 80002c6c: 8001203e .word 0x8001203e + 80002c70: 00000000 .word 0x00000000 + 80002c74: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c78: 0007ba83 ld x21,0(x15) + 80002c7c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xfffffffffffffffe + 80002c80: 0007be83 ld x29,0(x15) + 80002c84: 00878793 addi x15,x15,8 + +0000000080002c88 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + orn x4, x21, x29 # perform operation + 80002c88: 41dae233 orn x4,x21,x29 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c8c: 0004b383 ld x7,0(x9) + 80002c90: 00438c63 beq x7,x4,80002ca8 + 80002c94: 0840546f jal x8,80007d18 + 80002c98: 80002c88 .word 0x80002c88 + 80002c9c: 00000000 .word 0x00000000 + 80002ca0: 800120ac .word 0x800120ac + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002cac: 0007be03 ld x28,0(x15) + 80002cb0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 80002cb4: 0007bc83 ld x25,0(x15) + 80002cb8: 00878793 addi x15,x15,8 + +0000000080002cbc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + orn x26, x28, x25 # perform operation + 80002cbc: 419e6d33 orn x26,x28,x25 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc0: 0004b383 ld x7,0(x9) + 80002cc4: 01a38c63 beq x7,x26,80002cdc + 80002cc8: 0500546f jal x8,80007d18 + 80002ccc: 80002cbc .word 0x80002cbc + 80002cd0: 00000000 .word 0x00000000 + 80002cd4: 8001211a .word 0x8001211a + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002ce0: 0007b883 ld x17,0(x15) + 80002ce4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80002ce8: 0007b603 ld x12,0(x15) + 80002cec: 00878793 addi x15,x15,8 + +0000000080002cf0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + orn x5, x17, x12 # perform operation + 80002cf0: 40c8e2b3 orn x5,x17,x12 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cf4: 0004b383 ld x7,0(x9) + 80002cf8: 00538c63 beq x7,x5,80002d10 + 80002cfc: 01c0546f jal x8,80007d18 + 80002d00: 80002cf0 .word 0x80002cf0 + 80002d04: 00000000 .word 0x00000000 + 80002d08: 80012188 .word 0x80012188 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002d14: 0007be03 ld x28,0(x15) + 80002d18: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x5555555555555555 + 80002d1c: 0007b583 ld x11,0(x15) + 80002d20: 00878793 addi x15,x15,8 + +0000000080002d24 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + orn x14, x28, x11 # perform operation + 80002d24: 40be6733 orn x14,x28,x11 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d28: 0004b383 ld x7,0(x9) + 80002d2c: 00e38c63 beq x7,x14,80002d44 + 80002d30: 7e90446f jal x8,80007d18 + 80002d34: 80002d24 .word 0x80002d24 + 80002d38: 00000000 .word 0x00000000 + 80002d3c: 800121f6 .word 0x800121f6 + 80002d40: 00000000 .word 0x00000000 + 80002d44: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002d48: 0007b883 ld x17,0(x15) + 80002d4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x00000000ffffffff + 80002d50: 0007b183 ld x3,0(x15) + 80002d54: 00878793 addi x15,x15,8 + +0000000080002d58 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + orn x11, x17, x3 # perform operation + 80002d58: 4038e5b3 orn x11,x17,x3 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d5c: 0004b383 ld x7,0(x9) + 80002d60: 00b38c63 beq x7,x11,80002d78 + 80002d64: 7b50446f jal x8,80007d18 + 80002d68: 80002d58 .word 0x80002d58 + 80002d6c: 00000000 .word 0x00000000 + 80002d70: 80012264 .word 0x80012264 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x7fffffffffffffff + 80002d7c: 0007b303 ld x6,0(x15) + 80002d80: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x00000000fffffffe + 80002d84: 0007b283 ld x5,0(x15) + 80002d88: 00878793 addi x15,x15,8 + +0000000080002d8c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + orn x30, x6, x5 # perform operation + 80002d8c: 40536f33 orn x30,x6,x5 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d90: 0004b383 ld x7,0(x9) + 80002d94: 01e38c63 beq x7,x30,80002dac + 80002d98: 7810446f jal x8,80007d18 + 80002d9c: 80002d8c .word 0x80002d8c + 80002da0: 00000000 .word 0x00000000 + 80002da4: 800122ca .word 0x800122ca + 80002da8: 00000000 .word 0x00000000 + 80002dac: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002db0: 0007bd03 ld x26,0(x15) + 80002db4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x0000000100000000 + 80002db8: 0007b083 ld x1,0(x15) + 80002dbc: 00878793 addi x15,x15,8 + +0000000080002dc0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + orn x13, x26, x1 # perform operation + 80002dc0: 401d66b3 orn x13,x26,x1 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dc4: 0004b383 ld x7,0(x9) + 80002dc8: 00d38c63 beq x7,x13,80002de0 + 80002dcc: 74d0446f jal x8,80007d18 + 80002dd0: 80002dc0 .word 0x80002dc0 + 80002dd4: 00000000 .word 0x00000000 + 80002dd8: 80012330 .word 0x80012330 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002de4: 0007b603 ld x12,0(x15) + 80002de8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x0000000100000001 + 80002dec: 0007bb83 ld x23,0(x15) + 80002df0: 00878793 addi x15,x15,8 + +0000000080002df4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + orn x25, x12, x23 # perform operation + 80002df4: 41766cb3 orn x25,x12,x23 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002df8: 0004b383 ld x7,0(x9) + 80002dfc: 01938c63 beq x7,x25,80002e14 + 80002e00: 7190446f jal x8,80007d18 + 80002e04: 80002df4 .word 0x80002df4 + 80002e08: 00000000 .word 0x00000000 + 80002e0c: 80012397 .word 0x80012397 + 80002e10: 00000000 .word 0x00000000 + 80002e14: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002e18: 0007b303 ld x6,0(x15) + 80002e1c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0000000000000000 + 80002e20: 0007b603 ld x12,0(x15) + 80002e24: 00878793 addi x15,x15,8 + +0000000080002e28 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + orn x25, x6, x12 # perform operation + 80002e28: 40c36cb3 orn x25,x6,x12 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e2c: 0004b383 ld x7,0(x9) + 80002e30: 01938c63 beq x7,x25,80002e48 + 80002e34: 6e50446f jal x8,80007d18 + 80002e38: 80002e28 .word 0x80002e28 + 80002e3c: 00000000 .word 0x00000000 + 80002e40: 800123fe .word 0x800123fe + 80002e44: 00000000 .word 0x00000000 + 80002e48: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80002e4c: 0007b183 ld x3,0(x15) + 80002e50: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x0000000000000001 + 80002e54: 0007bd03 ld x26,0(x15) + 80002e58: 00878793 addi x15,x15,8 + +0000000080002e5c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + orn x17, x3, x26 # perform operation + 80002e5c: 41a1e8b3 orn x17,x3,x26 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e60: 0004b383 ld x7,0(x9) + 80002e64: 01138c63 beq x7,x17,80002e7c + 80002e68: 6b10446f jal x8,80007d18 + 80002e6c: 80002e5c .word 0x80002e5c + 80002e70: 00000000 .word 0x00000000 + 80002e74: 8001245d .word 0x8001245d + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002e80: 0007bf83 ld x31,0(x15) + 80002e84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000000000002 + 80002e88: 0007bc03 ld x24,0(x15) + 80002e8c: 00878793 addi x15,x15,8 + +0000000080002e90 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + orn x30, x31, x24 # perform operation + 80002e90: 418fef33 orn x30,x31,x24 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e94: 0004b383 ld x7,0(x9) + 80002e98: 01e38c63 beq x7,x30,80002eb0 + 80002e9c: 67d0446f jal x8,80007d18 + 80002ea0: 80002e90 .word 0x80002e90 + 80002ea4: 00000000 .word 0x00000000 + 80002ea8: 800124bc .word 0x800124bc + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002eb4: 0007be83 ld x29,0(x15) + 80002eb8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x8000000000000000 + 80002ebc: 0007b203 ld x4,0(x15) + 80002ec0: 00878793 addi x15,x15,8 + +0000000080002ec4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + orn x10, x29, x4 # perform operation + 80002ec4: 404ee533 orn x10,x29,x4 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ec8: 0004b383 ld x7,0(x9) + 80002ecc: 00a38c63 beq x7,x10,80002ee4 + 80002ed0: 6490446f jal x8,80007d18 + 80002ed4: 80002ec4 .word 0x80002ec4 + 80002ed8: 00000000 .word 0x00000000 + 80002edc: 8001251b .word 0x8001251b + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002ee8: 0007bc83 ld x25,0(x15) + 80002eec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x8000000000000001 + 80002ef0: 0007bb83 ld x23,0(x15) + 80002ef4: 00878793 addi x15,x15,8 + +0000000080002ef8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + orn x20, x25, x23 # perform operation + 80002ef8: 417cea33 orn x20,x25,x23 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002efc: 0004b383 ld x7,0(x9) + 80002f00: 01438c63 beq x7,x20,80002f18 + 80002f04: 6150446f jal x8,80007d18 + 80002f08: 80002ef8 .word 0x80002ef8 + 80002f0c: 00000000 .word 0x00000000 + 80002f10: 80012589 .word 0x80012589 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002f1c: 0007bd83 ld x27,0(x15) + 80002f20: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x7fffffffffffffff + 80002f24: 0007b503 ld x10,0(x15) + 80002f28: 00878793 addi x15,x15,8 + +0000000080002f2c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + orn x31, x27, x10 # perform operation + 80002f2c: 40adefb3 orn x31,x27,x10 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f30: 0004b383 ld x7,0(x9) + 80002f34: 01f38c63 beq x7,x31,80002f4c + 80002f38: 5e10446f jal x8,80007d18 + 80002f3c: 80002f2c .word 0x80002f2c + 80002f40: 00000000 .word 0x00000000 + 80002f44: 800125f7 .word 0x800125f7 + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002f50: 0007b103 ld x2,0(x15) + 80002f54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80002f58: 0007bf03 ld x30,0(x15) + 80002f5c: 00878793 addi x15,x15,8 + +0000000080002f60 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + orn x21, x2, x30 # perform operation + 80002f60: 41e16ab3 orn x21,x2,x30 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f64: 0004b383 ld x7,0(x9) + 80002f68: 01538c63 beq x7,x21,80002f80 + 80002f6c: 5ad0446f jal x8,80007d18 + 80002f70: 80002f60 .word 0x80002f60 + 80002f74: 00000000 .word 0x00000000 + 80002f78: 80012665 .word 0x80012665 + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002f84: 0007be03 ld x28,0(x15) + 80002f88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xffffffffffffffff + 80002f8c: 0007b803 ld x16,0(x15) + 80002f90: 00878793 addi x15,x15,8 + +0000000080002f94 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + orn x30, x28, x16 # perform operation + 80002f94: 410e6f33 orn x30,x28,x16 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f98: 0004b383 ld x7,0(x9) + 80002f9c: 01e38c63 beq x7,x30,80002fb4 + 80002fa0: 5790446f jal x8,80007d18 + 80002fa4: 80002f94 .word 0x80002f94 + 80002fa8: 00000000 .word 0x00000000 + 80002fac: 800126d3 .word 0x800126d3 + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002fb8: 0007b903 ld x18,0(x15) + 80002fbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xfffffffffffffffe + 80002fc0: 0007b503 ld x10,0(x15) + 80002fc4: 00878793 addi x15,x15,8 + +0000000080002fc8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + orn x11, x18, x10 # perform operation + 80002fc8: 40a965b3 orn x11,x18,x10 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fcc: 0004b383 ld x7,0(x9) + 80002fd0: 00b38c63 beq x7,x11,80002fe8 + 80002fd4: 5450446f jal x8,80007d18 + 80002fd8: 80002fc8 .word 0x80002fc8 + 80002fdc: 00000000 .word 0x00000000 + 80002fe0: 80012741 .word 0x80012741 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002fec: 0007bc83 ld x25,0(x15) + 80002ff0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80002ff4: 0007b603 ld x12,0(x15) + 80002ff8: 00878793 addi x15,x15,8 + +0000000080002ffc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + orn x19, x25, x12 # perform operation + 80002ffc: 40cce9b3 orn x19,x25,x12 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003000: 0004b383 ld x7,0(x9) + 80003004: 01338c63 beq x7,x19,8000301c + 80003008: 5110446f jal x8,80007d18 + 8000300c: 80002ffc .word 0x80002ffc + 80003010: 00000000 .word 0x00000000 + 80003014: 800127af .word 0x800127af + 80003018: 00000000 .word 0x00000000 + 8000301c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003020: 0007ba03 ld x20,0(x15) + 80003024: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80003028: 0007b903 ld x18,0(x15) + 8000302c: 00878793 addi x15,x15,8 + +0000000080003030 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + orn x23, x20, x18 # perform operation + 80003030: 412a6bb3 orn x23,x20,x18 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003034: 0004b383 ld x7,0(x9) + 80003038: 01738c63 beq x7,x23,80003050 + 8000303c: 4dd0446f jal x8,80007d18 + 80003040: 80003030 .word 0x80003030 + 80003044: 00000000 .word 0x00000000 + 80003048: 8001281d .word 0x8001281d + 8000304c: 00000000 .word 0x00000000 + 80003050: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80003054: 0007bd83 ld x27,0(x15) + 80003058: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x5555555555555555 + 8000305c: 0007be03 ld x28,0(x15) + 80003060: 00878793 addi x15,x15,8 + +0000000080003064 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + orn x1, x27, x28 # perform operation + 80003064: 41cde0b3 orn x1,x27,x28 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003068: 0004b383 ld x7,0(x9) + 8000306c: 00138c63 beq x7,x1,80003084 + 80003070: 4a90446f jal x8,80007d18 + 80003074: 80003064 .word 0x80003064 + 80003078: 00000000 .word 0x00000000 + 8000307c: 8001288b .word 0x8001288b + 80003080: 00000000 .word 0x00000000 + 80003084: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80003088: 0007bf03 ld x30,0(x15) + 8000308c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x00000000ffffffff + 80003090: 0007b303 ld x6,0(x15) + 80003094: 00878793 addi x15,x15,8 + +0000000080003098 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + orn x22, x30, x6 # perform operation + 80003098: 406f6b33 orn x22,x30,x6 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 8000309c: 0004b383 ld x7,0(x9) + 800030a0: 01638c63 beq x7,x22,800030b8 + 800030a4: 4750446f jal x8,80007d18 + 800030a8: 80003098 .word 0x80003098 + 800030ac: 00000000 .word 0x00000000 + 800030b0: 800128f9 .word 0x800128f9 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x7ffffffffffffffe + 800030bc: 0007bc83 ld x25,0(x15) + 800030c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x00000000fffffffe + 800030c4: 0007ba03 ld x20,0(x15) + 800030c8: 00878793 addi x15,x15,8 + +00000000800030cc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + orn x1, x25, x20 # perform operation + 800030cc: 414ce0b3 orn x1,x25,x20 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d0: 0004b383 ld x7,0(x9) + 800030d4: 00138c63 beq x7,x1,800030ec + 800030d8: 4410446f jal x8,80007d18 + 800030dc: 800030cc .word 0x800030cc + 800030e0: 00000000 .word 0x00000000 + 800030e4: 8001295f .word 0x8001295f + 800030e8: 00000000 .word 0x00000000 + 800030ec: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7ffffffffffffffe + 800030f0: 0007b083 ld x1,0(x15) + 800030f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x0000000100000000 + 800030f8: 0007bf83 ld x31,0(x15) + 800030fc: 00878793 addi x15,x15,8 + +0000000080003100 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + orn x28, x1, x31 # perform operation + 80003100: 41f0ee33 orn x28,x1,x31 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003104: 0004b383 ld x7,0(x9) + 80003108: 01c38c63 beq x7,x28,80003120 + 8000310c: 40d0446f jal x8,80007d18 + 80003110: 80003100 .word 0x80003100 + 80003114: 00000000 .word 0x00000000 + 80003118: 800129c5 .word 0x800129c5 + 8000311c: 00000000 .word 0x00000000 + 80003120: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80003124: 0007b083 ld x1,0(x15) + 80003128: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x0000000100000001 + 8000312c: 0007b683 ld x13,0(x15) + 80003130: 00878793 addi x15,x15,8 + +0000000080003134 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + orn x25, x1, x13 # perform operation + 80003134: 40d0ecb3 orn x25,x1,x13 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003138: 0004b383 ld x7,0(x9) + 8000313c: 01938c63 beq x7,x25,80003154 + 80003140: 3d90446f jal x8,80007d18 + 80003144: 80003134 .word 0x80003134 + 80003148: 00000000 .word 0x00000000 + 8000314c: 80012a2c .word 0x80012a2c + 80003150: 00000000 .word 0x00000000 + 80003154: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xffffffffffffffff + 80003158: 0007b883 ld x17,0(x15) + 8000315c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000000000000 + 80003160: 0007bb03 ld x22,0(x15) + 80003164: 00878793 addi x15,x15,8 + +0000000080003168 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + orn x16, x17, x22 # perform operation + 80003168: 4168e833 orn x16,x17,x22 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000316c: 0004b383 ld x7,0(x9) + 80003170: 01038c63 beq x7,x16,80003188 + 80003174: 3a50446f jal x8,80007d18 + 80003178: 80003168 .word 0x80003168 + 8000317c: 00000000 .word 0x00000000 + 80003180: 80012a93 .word 0x80012a93 + 80003184: 00000000 .word 0x00000000 + 80003188: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xffffffffffffffff + 8000318c: 0007bc03 ld x24,0(x15) + 80003190: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x0000000000000001 + 80003194: 0007b903 ld x18,0(x15) + 80003198: 00878793 addi x15,x15,8 + +000000008000319c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + orn x5, x24, x18 # perform operation + 8000319c: 412c62b3 orn x5,x24,x18 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a0: 0004b383 ld x7,0(x9) + 800031a4: 00538c63 beq x7,x5,800031bc + 800031a8: 3710446f jal x8,80007d18 + 800031ac: 8000319c .word 0x8000319c + 800031b0: 00000000 .word 0x00000000 + 800031b4: 80012af2 .word 0x80012af2 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xffffffffffffffff + 800031c0: 0007b083 ld x1,0(x15) + 800031c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000000000002 + 800031c8: 0007ba83 ld x21,0(x15) + 800031cc: 00878793 addi x15,x15,8 + +00000000800031d0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + orn x29, x1, x21 # perform operation + 800031d0: 4150eeb3 orn x29,x1,x21 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031d4: 0004b383 ld x7,0(x9) + 800031d8: 01d38c63 beq x7,x29,800031f0 + 800031dc: 33d0446f jal x8,80007d18 + 800031e0: 800031d0 .word 0x800031d0 + 800031e4: 00000000 .word 0x00000000 + 800031e8: 80012b51 .word 0x80012b51 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xffffffffffffffff + 800031f4: 0007bf03 ld x30,0(x15) + 800031f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x8000000000000000 + 800031fc: 0007bb83 ld x23,0(x15) + 80003200: 00878793 addi x15,x15,8 + +0000000080003204 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + orn x20, x30, x23 # perform operation + 80003204: 417f6a33 orn x20,x30,x23 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003208: 0004b383 ld x7,0(x9) + 8000320c: 01438c63 beq x7,x20,80003224 + 80003210: 3090446f jal x8,80007d18 + 80003214: 80003204 .word 0x80003204 + 80003218: 00000000 .word 0x00000000 + 8000321c: 80012bb0 .word 0x80012bb0 + 80003220: 00000000 .word 0x00000000 + 80003224: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xffffffffffffffff + 80003228: 0007bd83 ld x27,0(x15) + 8000322c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x8000000000000001 + 80003230: 0007b183 ld x3,0(x15) + 80003234: 00878793 addi x15,x15,8 + +0000000080003238 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + orn x12, x27, x3 # perform operation + 80003238: 403de633 orn x12,x27,x3 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000323c: 0004b383 ld x7,0(x9) + 80003240: 00c38c63 beq x7,x12,80003258 + 80003244: 2d50446f jal x8,80007d18 + 80003248: 80003238 .word 0x80003238 + 8000324c: 00000000 .word 0x00000000 + 80003250: 80012c1e .word 0x80012c1e + 80003254: 00000000 .word 0x00000000 + 80003258: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xffffffffffffffff + 8000325c: 0007bd03 ld x26,0(x15) + 80003260: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7fffffffffffffff + 80003264: 0007b903 ld x18,0(x15) + 80003268: 00878793 addi x15,x15,8 + +000000008000326c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + orn x12, x26, x18 # perform operation + 8000326c: 412d6633 orn x12,x26,x18 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003270: 0004b383 ld x7,0(x9) + 80003274: 00c38c63 beq x7,x12,8000328c + 80003278: 2a10446f jal x8,80007d18 + 8000327c: 8000326c .word 0x8000326c + 80003280: 00000000 .word 0x00000000 + 80003284: 80012c8c .word 0x80012c8c + 80003288: 00000000 .word 0x00000000 + 8000328c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xffffffffffffffff + 80003290: 0007b303 ld x6,0(x15) + 80003294: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80003298: 0007b883 ld x17,0(x15) + 8000329c: 00878793 addi x15,x15,8 + +00000000800032a0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + orn x24, x6, x17 # perform operation + 800032a0: 41136c33 orn x24,x6,x17 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032a4: 0004b383 ld x7,0(x9) + 800032a8: 01838c63 beq x7,x24,800032c0 + 800032ac: 26d0446f jal x8,80007d18 + 800032b0: 800032a0 .word 0x800032a0 + 800032b4: 00000000 .word 0x00000000 + 800032b8: 80012cfa .word 0x80012cfa + 800032bc: 00000000 .word 0x00000000 + 800032c0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xffffffffffffffff + 800032c4: 0007b283 ld x5,0(x15) + 800032c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xffffffffffffffff + 800032cc: 0007bd03 ld x26,0(x15) + 800032d0: 00878793 addi x15,x15,8 + +00000000800032d4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + orn x1, x5, x26 # perform operation + 800032d4: 41a2e0b3 orn x1,x5,x26 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032d8: 0004b383 ld x7,0(x9) + 800032dc: 00138c63 beq x7,x1,800032f4 + 800032e0: 2390446f jal x8,80007d18 + 800032e4: 800032d4 .word 0x800032d4 + 800032e8: 00000000 .word 0x00000000 + 800032ec: 80012d68 .word 0x80012d68 + 800032f0: 00000000 .word 0x00000000 + 800032f4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xffffffffffffffff + 800032f8: 0007ba83 ld x21,0(x15) + 800032fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xfffffffffffffffe + 80003300: 0007b683 ld x13,0(x15) + 80003304: 00878793 addi x15,x15,8 + +0000000080003308 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + orn x29, x21, x13 # perform operation + 80003308: 40daeeb3 orn x29,x21,x13 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000330c: 0004b383 ld x7,0(x9) + 80003310: 01d38c63 beq x7,x29,80003328 + 80003314: 2050446f jal x8,80007d18 + 80003318: 80003308 .word 0x80003308 + 8000331c: 00000000 .word 0x00000000 + 80003320: 80012dd6 .word 0x80012dd6 + 80003324: 00000000 .word 0x00000000 + 80003328: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xffffffffffffffff + 8000332c: 0007b083 ld x1,0(x15) + 80003330: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80003334: 0007ba83 ld x21,0(x15) + 80003338: 00878793 addi x15,x15,8 + +000000008000333c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + orn x4, x1, x21 # perform operation + 8000333c: 4150e233 orn x4,x1,x21 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003340: 0004b383 ld x7,0(x9) + 80003344: 00438c63 beq x7,x4,8000335c + 80003348: 1d10446f jal x8,80007d18 + 8000334c: 8000333c .word 0x8000333c + 80003350: 00000000 .word 0x00000000 + 80003354: 80012e44 .word 0x80012e44 + 80003358: 00000000 .word 0x00000000 + 8000335c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xffffffffffffffff + 80003360: 0007b203 ld x4,0(x15) + 80003364: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80003368: 0007ba03 ld x20,0(x15) + 8000336c: 00878793 addi x15,x15,8 + +0000000080003370 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + orn x6, x4, x20 # perform operation + 80003370: 41426333 orn x6,x4,x20 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003374: 0004b383 ld x7,0(x9) + 80003378: 00638c63 beq x7,x6,80003390 + 8000337c: 19d0446f jal x8,80007d18 + 80003380: 80003370 .word 0x80003370 + 80003384: 00000000 .word 0x00000000 + 80003388: 80012eb2 .word 0x80012eb2 + 8000338c: 00000000 .word 0x00000000 + 80003390: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xffffffffffffffff + 80003394: 0007b103 ld x2,0(x15) + 80003398: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x5555555555555555 + 8000339c: 0007bc83 ld x25,0(x15) + 800033a0: 00878793 addi x15,x15,8 + +00000000800033a4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + orn x13, x2, x25 # perform operation + 800033a4: 419166b3 orn x13,x2,x25 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033a8: 0004b383 ld x7,0(x9) + 800033ac: 00d38c63 beq x7,x13,800033c4 + 800033b0: 1690446f jal x8,80007d18 + 800033b4: 800033a4 .word 0x800033a4 + 800033b8: 00000000 .word 0x00000000 + 800033bc: 80012f20 .word 0x80012f20 + 800033c0: 00000000 .word 0x00000000 + 800033c4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xffffffffffffffff + 800033c8: 0007b703 ld x14,0(x15) + 800033cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x00000000ffffffff + 800033d0: 0007b683 ld x13,0(x15) + 800033d4: 00878793 addi x15,x15,8 + +00000000800033d8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + orn x11, x14, x13 # perform operation + 800033d8: 40d765b3 orn x11,x14,x13 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033dc: 0004b383 ld x7,0(x9) + 800033e0: 00b38c63 beq x7,x11,800033f8 + 800033e4: 1350446f jal x8,80007d18 + 800033e8: 800033d8 .word 0x800033d8 + 800033ec: 00000000 .word 0x00000000 + 800033f0: 80012f8e .word 0x80012f8e + 800033f4: 00000000 .word 0x00000000 + 800033f8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xffffffffffffffff + 800033fc: 0007b203 ld x4,0(x15) + 80003400: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x00000000fffffffe + 80003404: 0007b083 ld x1,0(x15) + 80003408: 00878793 addi x15,x15,8 + +000000008000340c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + orn x14, x4, x1 # perform operation + 8000340c: 40126733 orn x14,x4,x1 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003410: 0004b383 ld x7,0(x9) + 80003414: 00e38c63 beq x7,x14,8000342c + 80003418: 1010446f jal x8,80007d18 + 8000341c: 8000340c .word 0x8000340c + 80003420: 00000000 .word 0x00000000 + 80003424: 80012ff4 .word 0x80012ff4 + 80003428: 00000000 .word 0x00000000 + 8000342c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xffffffffffffffff + 80003430: 0007b883 ld x17,0(x15) + 80003434: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x0000000100000000 + 80003438: 0007bd83 ld x27,0(x15) + 8000343c: 00878793 addi x15,x15,8 + +0000000080003440 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + orn x16, x17, x27 # perform operation + 80003440: 41b8e833 orn x16,x17,x27 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003444: 0004b383 ld x7,0(x9) + 80003448: 01038c63 beq x7,x16,80003460 + 8000344c: 0cd0446f jal x8,80007d18 + 80003450: 80003440 .word 0x80003440 + 80003454: 00000000 .word 0x00000000 + 80003458: 8001305a .word 0x8001305a + 8000345c: 00000000 .word 0x00000000 + 80003460: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xffffffffffffffff + 80003464: 0007b203 ld x4,0(x15) + 80003468: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x0000000100000001 + 8000346c: 0007b983 ld x19,0(x15) + 80003470: 00878793 addi x15,x15,8 + +0000000080003474 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + orn x28, x4, x19 # perform operation + 80003474: 41326e33 orn x28,x4,x19 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003478: 0004b383 ld x7,0(x9) + 8000347c: 01c38c63 beq x7,x28,80003494 + 80003480: 0990446f jal x8,80007d18 + 80003484: 80003474 .word 0x80003474 + 80003488: 00000000 .word 0x00000000 + 8000348c: 800130c1 .word 0x800130c1 + 80003490: 00000000 .word 0x00000000 + 80003494: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003498: 0007be83 ld x29,0(x15) + 8000349c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0000000000000000 + 800034a0: 0007b283 ld x5,0(x15) + 800034a4: 00878793 addi x15,x15,8 + +00000000800034a8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + orn x24, x29, x5 # perform operation + 800034a8: 405eec33 orn x24,x29,x5 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034ac: 0004b383 ld x7,0(x9) + 800034b0: 01838c63 beq x7,x24,800034c8 + 800034b4: 0650446f jal x8,80007d18 + 800034b8: 800034a8 .word 0x800034a8 + 800034bc: 00000000 .word 0x00000000 + 800034c0: 80013128 .word 0x80013128 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xfffffffffffffffe + 800034cc: 0007ba03 ld x20,0(x15) + 800034d0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000000000001 + 800034d4: 0007bc83 ld x25,0(x15) + 800034d8: 00878793 addi x15,x15,8 + +00000000800034dc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + orn x26, x20, x25 # perform operation + 800034dc: 419a6d33 orn x26,x20,x25 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e0: 0004b383 ld x7,0(x9) + 800034e4: 01a38c63 beq x7,x26,800034fc + 800034e8: 0310446f jal x8,80007d18 + 800034ec: 800034dc .word 0x800034dc + 800034f0: 00000000 .word 0x00000000 + 800034f4: 80013187 .word 0x80013187 + 800034f8: 00000000 .word 0x00000000 + 800034fc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xfffffffffffffffe + 80003500: 0007ba83 ld x21,0(x15) + 80003504: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x0000000000000002 + 80003508: 0007bf83 ld x31,0(x15) + 8000350c: 00878793 addi x15,x15,8 + +0000000080003510 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + orn x29, x21, x31 # perform operation + 80003510: 41faeeb3 orn x29,x21,x31 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003514: 0004b383 ld x7,0(x9) + 80003518: 01d38c63 beq x7,x29,80003530 + 8000351c: 7fc0446f jal x8,80007d18 + 80003520: 80003510 .word 0x80003510 + 80003524: 00000000 .word 0x00000000 + 80003528: 800131e6 .word 0x800131e6 + 8000352c: 00000000 .word 0x00000000 + 80003530: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xfffffffffffffffe + 80003534: 0007b203 ld x4,0(x15) + 80003538: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8000000000000000 + 8000353c: 0007be83 ld x29,0(x15) + 80003540: 00878793 addi x15,x15,8 + +0000000080003544 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + orn x11, x4, x29 # perform operation + 80003544: 41d265b3 orn x11,x4,x29 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003548: 0004b383 ld x7,0(x9) + 8000354c: 00b38c63 beq x7,x11,80003564 + 80003550: 7c80446f jal x8,80007d18 + 80003554: 80003544 .word 0x80003544 + 80003558: 00000000 .word 0x00000000 + 8000355c: 80013245 .word 0x80013245 + 80003560: 00000000 .word 0x00000000 + 80003564: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003568: 0007bd03 ld x26,0(x15) + 8000356c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8000000000000001 + 80003570: 0007be83 ld x29,0(x15) + 80003574: 00878793 addi x15,x15,8 + +0000000080003578 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + orn x13, x26, x29 # perform operation + 80003578: 41dd66b3 orn x13,x26,x29 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000357c: 0004b383 ld x7,0(x9) + 80003580: 00d38c63 beq x7,x13,80003598 + 80003584: 7940446f jal x8,80007d18 + 80003588: 80003578 .word 0x80003578 + 8000358c: 00000000 .word 0x00000000 + 80003590: 800132b3 .word 0x800132b3 + 80003594: 00000000 .word 0x00000000 + 80003598: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xfffffffffffffffe + 8000359c: 0007bd83 ld x27,0(x15) + 800035a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x7fffffffffffffff + 800035a4: 0007b803 ld x16,0(x15) + 800035a8: 00878793 addi x15,x15,8 + +00000000800035ac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + orn x24, x27, x16 # perform operation + 800035ac: 410dec33 orn x24,x27,x16 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b0: 0004b383 ld x7,0(x9) + 800035b4: 01838c63 beq x7,x24,800035cc + 800035b8: 7600446f jal x8,80007d18 + 800035bc: 800035ac .word 0x800035ac + 800035c0: 00000000 .word 0x00000000 + 800035c4: 80013321 .word 0x80013321 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xfffffffffffffffe + 800035d0: 0007b183 ld x3,0(x15) + 800035d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x7ffffffffffffffe + 800035d8: 0007b803 ld x16,0(x15) + 800035dc: 00878793 addi x15,x15,8 + +00000000800035e0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + orn x11, x3, x16 # perform operation + 800035e0: 4101e5b3 orn x11,x3,x16 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035e4: 0004b383 ld x7,0(x9) + 800035e8: 00b38c63 beq x7,x11,80003600 + 800035ec: 72c0446f jal x8,80007d18 + 800035f0: 800035e0 .word 0x800035e0 + 800035f4: 00000000 .word 0x00000000 + 800035f8: 8001338f .word 0x8001338f + 800035fc: 00000000 .word 0x00000000 + 80003600: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003604: 0007be83 ld x29,0(x15) + 80003608: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xffffffffffffffff + 8000360c: 0007ba03 ld x20,0(x15) + 80003610: 00878793 addi x15,x15,8 + +0000000080003614 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + orn x25, x29, x20 # perform operation + 80003614: 414eecb3 orn x25,x29,x20 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003618: 0004b383 ld x7,0(x9) + 8000361c: 01938c63 beq x7,x25,80003634 + 80003620: 6f80446f jal x8,80007d18 + 80003624: 80003614 .word 0x80003614 + 80003628: 00000000 .word 0x00000000 + 8000362c: 800133fd .word 0x800133fd + 80003630: 00000000 .word 0x00000000 + 80003634: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xfffffffffffffffe + 80003638: 0007b303 ld x6,0(x15) + 8000363c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xfffffffffffffffe + 80003640: 0007b883 ld x17,0(x15) + 80003644: 00878793 addi x15,x15,8 + +0000000080003648 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + orn x19, x6, x17 # perform operation + 80003648: 411369b3 orn x19,x6,x17 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000364c: 0004b383 ld x7,0(x9) + 80003650: 01338c63 beq x7,x19,80003668 + 80003654: 6c40446f jal x8,80007d18 + 80003658: 80003648 .word 0x80003648 + 8000365c: 00000000 .word 0x00000000 + 80003660: 8001346b .word 0x8001346b + 80003664: 00000000 .word 0x00000000 + 80003668: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xfffffffffffffffe + 8000366c: 0007be03 ld x28,0(x15) + 80003670: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80003674: 0007b183 ld x3,0(x15) + 80003678: 00878793 addi x15,x15,8 + +000000008000367c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + orn x30, x28, x3 # perform operation + 8000367c: 403e6f33 orn x30,x28,x3 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003680: 0004b383 ld x7,0(x9) + 80003684: 01e38c63 beq x7,x30,8000369c + 80003688: 6900446f jal x8,80007d18 + 8000368c: 8000367c .word 0x8000367c + 80003690: 00000000 .word 0x00000000 + 80003694: 800134d9 .word 0x800134d9 + 80003698: 00000000 .word 0x00000000 + 8000369c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xfffffffffffffffe + 800036a0: 0007bc83 ld x25,0(x15) + 800036a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 800036a8: 0007bc03 ld x24,0(x15) + 800036ac: 00878793 addi x15,x15,8 + +00000000800036b0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + orn x12, x25, x24 # perform operation + 800036b0: 418ce633 orn x12,x25,x24 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036b4: 0004b383 ld x7,0(x9) + 800036b8: 00c38c63 beq x7,x12,800036d0 + 800036bc: 65c0446f jal x8,80007d18 + 800036c0: 800036b0 .word 0x800036b0 + 800036c4: 00000000 .word 0x00000000 + 800036c8: 80013547 .word 0x80013547 + 800036cc: 00000000 .word 0x00000000 + 800036d0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xfffffffffffffffe + 800036d4: 0007be03 ld x28,0(x15) + 800036d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x5555555555555555 + 800036dc: 0007b803 ld x16,0(x15) + 800036e0: 00878793 addi x15,x15,8 + +00000000800036e4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + orn x20, x28, x16 # perform operation + 800036e4: 410e6a33 orn x20,x28,x16 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036e8: 0004b383 ld x7,0(x9) + 800036ec: 01438c63 beq x7,x20,80003704 + 800036f0: 6280446f jal x8,80007d18 + 800036f4: 800036e4 .word 0x800036e4 + 800036f8: 00000000 .word 0x00000000 + 800036fc: 800135b5 .word 0x800135b5 + 80003700: 00000000 .word 0x00000000 + 80003704: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xfffffffffffffffe + 80003708: 0007b203 ld x4,0(x15) + 8000370c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x00000000ffffffff + 80003710: 0007bf83 ld x31,0(x15) + 80003714: 00878793 addi x15,x15,8 + +0000000080003718 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + orn x23, x4, x31 # perform operation + 80003718: 41f26bb3 orn x23,x4,x31 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000371c: 0004b383 ld x7,0(x9) + 80003720: 01738c63 beq x7,x23,80003738 + 80003724: 5f40446f jal x8,80007d18 + 80003728: 80003718 .word 0x80003718 + 8000372c: 00000000 .word 0x00000000 + 80003730: 80013623 .word 0x80013623 + 80003734: 00000000 .word 0x00000000 + 80003738: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xfffffffffffffffe + 8000373c: 0007bd03 ld x26,0(x15) + 80003740: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000000fffffffe + 80003744: 0007ba83 ld x21,0(x15) + 80003748: 00878793 addi x15,x15,8 + +000000008000374c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + orn x13, x26, x21 # perform operation + 8000374c: 415d66b3 orn x13,x26,x21 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003750: 0004b383 ld x7,0(x9) + 80003754: 00d38c63 beq x7,x13,8000376c + 80003758: 5c00446f jal x8,80007d18 + 8000375c: 8000374c .word 0x8000374c + 80003760: 00000000 .word 0x00000000 + 80003764: 80013689 .word 0x80013689 + 80003768: 00000000 .word 0x00000000 + 8000376c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003770: 0007bb03 ld x22,0(x15) + 80003774: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x0000000100000000 + 80003778: 0007b703 ld x14,0(x15) + 8000377c: 00878793 addi x15,x15,8 + +0000000080003780 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + orn x20, x22, x14 # perform operation + 80003780: 40eb6a33 orn x20,x22,x14 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003784: 0004b383 ld x7,0(x9) + 80003788: 01438c63 beq x7,x20,800037a0 + 8000378c: 58c0446f jal x8,80007d18 + 80003790: 80003780 .word 0x80003780 + 80003794: 00000000 .word 0x00000000 + 80003798: 800136ef .word 0x800136ef + 8000379c: 00000000 .word 0x00000000 + 800037a0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xfffffffffffffffe + 800037a4: 0007b703 ld x14,0(x15) + 800037a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x0000000100000001 + 800037ac: 0007b503 ld x10,0(x15) + 800037b0: 00878793 addi x15,x15,8 + +00000000800037b4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + orn x18, x14, x10 # perform operation + 800037b4: 40a76933 orn x18,x14,x10 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037b8: 0004b383 ld x7,0(x9) + 800037bc: 01238c63 beq x7,x18,800037d4 + 800037c0: 5580446f jal x8,80007d18 + 800037c4: 800037b4 .word 0x800037b4 + 800037c8: 00000000 .word 0x00000000 + 800037cc: 80013756 .word 0x80013756 + 800037d0: 00000000 .word 0x00000000 + 800037d4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800037d8: 0007b683 ld x13,0(x15) + 800037dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000000000000 + 800037e0: 0007bc03 ld x24,0(x15) + 800037e4: 00878793 addi x15,x15,8 + +00000000800037e8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + orn x5, x13, x24 # perform operation + 800037e8: 4186e2b3 orn x5,x13,x24 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037ec: 0004b383 ld x7,0(x9) + 800037f0: 00538c63 beq x7,x5,80003808 + 800037f4: 5240446f jal x8,80007d18 + 800037f8: 800037e8 .word 0x800037e8 + 800037fc: 00000000 .word 0x00000000 + 80003800: 800137bd .word 0x800137bd + 80003804: 00000000 .word 0x00000000 + 80003808: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 8000380c: 0007be03 ld x28,0(x15) + 80003810: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000000000001 + 80003814: 0007ba83 ld x21,0(x15) + 80003818: 00878793 addi x15,x15,8 + +000000008000381c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + orn x6, x28, x21 # perform operation + 8000381c: 415e6333 orn x6,x28,x21 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003820: 0004b383 ld x7,0(x9) + 80003824: 00638c63 beq x7,x6,8000383c + 80003828: 4f00446f jal x8,80007d18 + 8000382c: 8000381c .word 0x8000381c + 80003830: 00000000 .word 0x00000000 + 80003834: 8001381c .word 0x8001381c + 80003838: 00000000 .word 0x00000000 + 8000383c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003840: 0007bf83 ld x31,0(x15) + 80003844: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x0000000000000002 + 80003848: 0007b183 ld x3,0(x15) + 8000384c: 00878793 addi x15,x15,8 + +0000000080003850 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + orn x6, x31, x3 # perform operation + 80003850: 403fe333 orn x6,x31,x3 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003854: 0004b383 ld x7,0(x9) + 80003858: 00638c63 beq x7,x6,80003870 + 8000385c: 4bc0446f jal x8,80007d18 + 80003860: 80003850 .word 0x80003850 + 80003864: 00000000 .word 0x00000000 + 80003868: 8001387b .word 0x8001387b + 8000386c: 00000000 .word 0x00000000 + 80003870: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003874: 0007b683 ld x13,0(x15) + 80003878: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8000000000000000 + 8000387c: 0007be83 ld x29,0(x15) + 80003880: 00878793 addi x15,x15,8 + +0000000080003884 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + orn x25, x13, x29 # perform operation + 80003884: 41d6ecb3 orn x25,x13,x29 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003888: 0004b383 ld x7,0(x9) + 8000388c: 01938c63 beq x7,x25,800038a4 + 80003890: 4880446f jal x8,80007d18 + 80003894: 80003884 .word 0x80003884 + 80003898: 00000000 .word 0x00000000 + 8000389c: 800138da .word 0x800138da + 800038a0: 00000000 .word 0x00000000 + 800038a4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 800038a8: 0007b503 ld x10,0(x15) + 800038ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x8000000000000001 + 800038b0: 0007ba03 ld x20,0(x15) + 800038b4: 00878793 addi x15,x15,8 + +00000000800038b8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + orn x11, x10, x20 # perform operation + 800038b8: 414565b3 orn x11,x10,x20 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038bc: 0004b383 ld x7,0(x9) + 800038c0: 00b38c63 beq x7,x11,800038d8 + 800038c4: 4540446f jal x8,80007d18 + 800038c8: 800038b8 .word 0x800038b8 + 800038cc: 00000000 .word 0x00000000 + 800038d0: 80013948 .word 0x80013948 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 800038dc: 0007b803 ld x16,0(x15) + 800038e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x7fffffffffffffff + 800038e4: 0007b983 ld x19,0(x15) + 800038e8: 00878793 addi x15,x15,8 + +00000000800038ec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + orn x11, x16, x19 # perform operation + 800038ec: 413865b3 orn x11,x16,x19 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f0: 0004b383 ld x7,0(x9) + 800038f4: 00b38c63 beq x7,x11,8000390c + 800038f8: 4200446f jal x8,80007d18 + 800038fc: 800038ec .word 0x800038ec + 80003900: 00000000 .word 0x00000000 + 80003904: 800139b6 .word 0x800139b6 + 80003908: 00000000 .word 0x00000000 + 8000390c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80003910: 0007ba03 ld x20,0(x15) + 80003914: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80003918: 0007b703 ld x14,0(x15) + 8000391c: 00878793 addi x15,x15,8 + +0000000080003920 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + orn x18, x20, x14 # perform operation + 80003920: 40ea6933 orn x18,x20,x14 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003924: 0004b383 ld x7,0(x9) + 80003928: 01238c63 beq x7,x18,80003940 + 8000392c: 3ec0446f jal x8,80007d18 + 80003930: 80003920 .word 0x80003920 + 80003934: 00000000 .word 0x00000000 + 80003938: 80013a24 .word 0x80013a24 + 8000393c: 00000000 .word 0x00000000 + 80003940: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003944: 0007b703 ld x14,0(x15) + 80003948: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xffffffffffffffff + 8000394c: 0007b083 ld x1,0(x15) + 80003950: 00878793 addi x15,x15,8 + +0000000080003954 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + orn x20, x14, x1 # perform operation + 80003954: 40176a33 orn x20,x14,x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003958: 0004b383 ld x7,0(x9) + 8000395c: 01438c63 beq x7,x20,80003974 + 80003960: 3b80446f jal x8,80007d18 + 80003964: 80003954 .word 0x80003954 + 80003968: 00000000 .word 0x00000000 + 8000396c: 80013a92 .word 0x80013a92 + 80003970: 00000000 .word 0x00000000 + 80003974: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003978: 0007ba83 ld x21,0(x15) + 8000397c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xfffffffffffffffe + 80003980: 0007b583 ld x11,0(x15) + 80003984: 00878793 addi x15,x15,8 + +0000000080003988 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + orn x29, x21, x11 # perform operation + 80003988: 40baeeb3 orn x29,x21,x11 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000398c: 0004b383 ld x7,0(x9) + 80003990: 01d38c63 beq x7,x29,800039a8 + 80003994: 3840446f jal x8,80007d18 + 80003998: 80003988 .word 0x80003988 + 8000399c: 00000000 .word 0x00000000 + 800039a0: 80013b00 .word 0x80013b00 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 800039ac: 0007b883 ld x17,0(x15) + 800039b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 800039b4: 0007be03 ld x28,0(x15) + 800039b8: 00878793 addi x15,x15,8 + +00000000800039bc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + orn x6, x17, x28 # perform operation + 800039bc: 41c8e333 orn x6,x17,x28 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c0: 0004b383 ld x7,0(x9) + 800039c4: 00638c63 beq x7,x6,800039dc + 800039c8: 3500446f jal x8,80007d18 + 800039cc: 800039bc .word 0x800039bc + 800039d0: 00000000 .word 0x00000000 + 800039d4: 80013b6e .word 0x80013b6e + 800039d8: 00000000 .word 0x00000000 + 800039dc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 800039e0: 0007bd83 ld x27,0(x15) + 800039e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 800039e8: 0007bc83 ld x25,0(x15) + 800039ec: 00878793 addi x15,x15,8 + +00000000800039f0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + orn x1, x27, x25 # perform operation + 800039f0: 419de0b3 orn x1,x27,x25 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039f4: 0004b383 ld x7,0(x9) + 800039f8: 00138c63 beq x7,x1,80003a10 + 800039fc: 31c0446f jal x8,80007d18 + 80003a00: 800039f0 .word 0x800039f0 + 80003a04: 00000000 .word 0x00000000 + 80003a08: 80013bdc .word 0x80013bdc + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 80003a14: 0007b203 ld x4,0(x15) + 80003a18: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x5555555555555555 + 80003a1c: 0007bd03 ld x26,0(x15) + 80003a20: 00878793 addi x15,x15,8 + +0000000080003a24 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + orn x3, x4, x26 # perform operation + 80003a24: 41a261b3 orn x3,x4,x26 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a28: 0004b383 ld x7,0(x9) + 80003a2c: 00338c63 beq x7,x3,80003a44 + 80003a30: 2e80446f jal x8,80007d18 + 80003a34: 80003a24 .word 0x80003a24 + 80003a38: 00000000 .word 0x00000000 + 80003a3c: 80013c4a .word 0x80013c4a + 80003a40: 00000000 .word 0x00000000 + 80003a44: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003a48: 0007bf03 ld x30,0(x15) + 80003a4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x00000000ffffffff + 80003a50: 0007b903 ld x18,0(x15) + 80003a54: 00878793 addi x15,x15,8 + +0000000080003a58 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + orn x19, x30, x18 # perform operation + 80003a58: 412f69b3 orn x19,x30,x18 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a5c: 0004b383 ld x7,0(x9) + 80003a60: 01338c63 beq x7,x19,80003a78 + 80003a64: 2b40446f jal x8,80007d18 + 80003a68: 80003a58 .word 0x80003a58 + 80003a6c: 00000000 .word 0x00000000 + 80003a70: 80013cb8 .word 0x80013cb8 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003a7c: 0007bf03 ld x30,0(x15) + 80003a80: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x00000000fffffffe + 80003a84: 0007b683 ld x13,0(x15) + 80003a88: 00878793 addi x15,x15,8 + +0000000080003a8c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + orn x11, x30, x13 # perform operation + 80003a8c: 40df65b3 orn x11,x30,x13 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a90: 0004b383 ld x7,0(x9) + 80003a94: 00b38c63 beq x7,x11,80003aac + 80003a98: 2800446f jal x8,80007d18 + 80003a9c: 80003a8c .word 0x80003a8c + 80003aa0: 00000000 .word 0x00000000 + 80003aa4: 80013d1e .word 0x80013d1e + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003ab0: 0007bb03 ld x22,0(x15) + 80003ab4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x0000000100000000 + 80003ab8: 0007bb83 ld x23,0(x15) + 80003abc: 00878793 addi x15,x15,8 + +0000000080003ac0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + orn x3, x22, x23 # perform operation + 80003ac0: 417b61b3 orn x3,x22,x23 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ac4: 0004b383 ld x7,0(x9) + 80003ac8: 00338c63 beq x7,x3,80003ae0 + 80003acc: 24c0446f jal x8,80007d18 + 80003ad0: 80003ac0 .word 0x80003ac0 + 80003ad4: 00000000 .word 0x00000000 + 80003ad8: 80013d84 .word 0x80013d84 + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80003ae4: 0007b803 ld x16,0(x15) + 80003ae8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x0000000100000001 + 80003aec: 0007bc03 ld x24,0(x15) + 80003af0: 00878793 addi x15,x15,8 + +0000000080003af4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + orn x13, x16, x24 # perform operation + 80003af4: 418866b3 orn x13,x16,x24 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003af8: 0004b383 ld x7,0(x9) + 80003afc: 00d38c63 beq x7,x13,80003b14 + 80003b00: 2180446f jal x8,80007d18 + 80003b04: 80003af4 .word 0x80003af4 + 80003b08: 00000000 .word 0x00000000 + 80003b0c: 80013deb .word 0x80013deb + 80003b10: 00000000 .word 0x00000000 + 80003b14: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003b18: 0007be03 ld x28,0(x15) + 80003b1c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x0000000000000000 + 80003b20: 0007b803 ld x16,0(x15) + 80003b24: 00878793 addi x15,x15,8 + +0000000080003b28 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + orn x26, x28, x16 # perform operation + 80003b28: 410e6d33 orn x26,x28,x16 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b2c: 0004b383 ld x7,0(x9) + 80003b30: 01a38c63 beq x7,x26,80003b48 + 80003b34: 1e40446f jal x8,80007d18 + 80003b38: 80003b28 .word 0x80003b28 + 80003b3c: 00000000 .word 0x00000000 + 80003b40: 80013e52 .word 0x80013e52 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xaaaaaaaaaaaaaaaa + 80003b4c: 0007b203 ld x4,0(x15) + 80003b50: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000000000001 + 80003b54: 0007bb03 ld x22,0(x15) + 80003b58: 00878793 addi x15,x15,8 + +0000000080003b5c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + orn x24, x4, x22 # perform operation + 80003b5c: 41626c33 orn x24,x4,x22 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b60: 0004b383 ld x7,0(x9) + 80003b64: 01838c63 beq x7,x24,80003b7c + 80003b68: 1b00446f jal x8,80007d18 + 80003b6c: 80003b5c .word 0x80003b5c + 80003b70: 00000000 .word 0x00000000 + 80003b74: 80013eb1 .word 0x80013eb1 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003b80: 0007b903 ld x18,0(x15) + 80003b84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x0000000000000002 + 80003b88: 0007b883 ld x17,0(x15) + 80003b8c: 00878793 addi x15,x15,8 + +0000000080003b90 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + orn x30, x18, x17 # perform operation + 80003b90: 41196f33 orn x30,x18,x17 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b94: 0004b383 ld x7,0(x9) + 80003b98: 01e38c63 beq x7,x30,80003bb0 + 80003b9c: 17c0446f jal x8,80007d18 + 80003ba0: 80003b90 .word 0x80003b90 + 80003ba4: 00000000 .word 0x00000000 + 80003ba8: 80013f10 .word 0x80013f10 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003bb4: 0007b603 ld x12,0(x15) + 80003bb8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x8000000000000000 + 80003bbc: 0007bf83 ld x31,0(x15) + 80003bc0: 00878793 addi x15,x15,8 + +0000000080003bc4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + orn x11, x12, x31 # perform operation + 80003bc4: 41f665b3 orn x11,x12,x31 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bc8: 0004b383 ld x7,0(x9) + 80003bcc: 00b38c63 beq x7,x11,80003be4 + 80003bd0: 1480446f jal x8,80007d18 + 80003bd4: 80003bc4 .word 0x80003bc4 + 80003bd8: 00000000 .word 0x00000000 + 80003bdc: 80013f6f .word 0x80013f6f + 80003be0: 00000000 .word 0x00000000 + 80003be4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003be8: 0007bb83 ld x23,0(x15) + 80003bec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x8000000000000001 + 80003bf0: 0007b903 ld x18,0(x15) + 80003bf4: 00878793 addi x15,x15,8 + +0000000080003bf8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + orn x1, x23, x18 # perform operation + 80003bf8: 412be0b3 orn x1,x23,x18 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003bfc: 0004b383 ld x7,0(x9) + 80003c00: 00138c63 beq x7,x1,80003c18 + 80003c04: 1140446f jal x8,80007d18 + 80003c08: 80003bf8 .word 0x80003bf8 + 80003c0c: 00000000 .word 0x00000000 + 80003c10: 80013fdd .word 0x80013fdd + 80003c14: 00000000 .word 0x00000000 + 80003c18: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003c1c: 0007b683 ld x13,0(x15) + 80003c20: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x7fffffffffffffff + 80003c24: 0007bb83 ld x23,0(x15) + 80003c28: 00878793 addi x15,x15,8 + +0000000080003c2c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + orn x16, x13, x23 # perform operation + 80003c2c: 4176e833 orn x16,x13,x23 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c30: 0004b383 ld x7,0(x9) + 80003c34: 01038c63 beq x7,x16,80003c4c + 80003c38: 0e00446f jal x8,80007d18 + 80003c3c: 80003c2c .word 0x80003c2c + 80003c40: 00000000 .word 0x00000000 + 80003c44: 8001404b .word 0x8001404b + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003c50: 0007b603 ld x12,0(x15) + 80003c54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80003c58: 0007b083 ld x1,0(x15) + 80003c5c: 00878793 addi x15,x15,8 + +0000000080003c60 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + orn x5, x12, x1 # perform operation + 80003c60: 401662b3 orn x5,x12,x1 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c64: 0004b383 ld x7,0(x9) + 80003c68: 00538c63 beq x7,x5,80003c80 + 80003c6c: 0ac0446f jal x8,80007d18 + 80003c70: 80003c60 .word 0x80003c60 + 80003c74: 00000000 .word 0x00000000 + 80003c78: 800140b9 .word 0x800140b9 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003c84: 0007bc83 ld x25,0(x15) + 80003c88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xffffffffffffffff + 80003c8c: 0007bb83 ld x23,0(x15) + 80003c90: 00878793 addi x15,x15,8 + +0000000080003c94 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + orn x16, x25, x23 # perform operation + 80003c94: 417ce833 orn x16,x25,x23 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c98: 0004b383 ld x7,0(x9) + 80003c9c: 01038c63 beq x7,x16,80003cb4 + 80003ca0: 0780446f jal x8,80007d18 + 80003ca4: 80003c94 .word 0x80003c94 + 80003ca8: 00000000 .word 0x00000000 + 80003cac: 80014127 .word 0x80014127 + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003cb8: 0007bd03 ld x26,0(x15) + 80003cbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xfffffffffffffffe + 80003cc0: 0007bc83 ld x25,0(x15) + 80003cc4: 00878793 addi x15,x15,8 + +0000000080003cc8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + orn x13, x26, x25 # perform operation + 80003cc8: 419d66b3 orn x13,x26,x25 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003ccc: 0004b383 ld x7,0(x9) + 80003cd0: 00d38c63 beq x7,x13,80003ce8 + 80003cd4: 0440446f jal x8,80007d18 + 80003cd8: 80003cc8 .word 0x80003cc8 + 80003cdc: 00000000 .word 0x00000000 + 80003ce0: 80014195 .word 0x80014195 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003cec: 0007b883 ld x17,0(x15) + 80003cf0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 80003cf4: 0007bd83 ld x27,0(x15) + 80003cf8: 00878793 addi x15,x15,8 + +0000000080003cfc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + orn x31, x17, x27 # perform operation + 80003cfc: 41b8efb3 orn x31,x17,x27 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d00: 0004b383 ld x7,0(x9) + 80003d04: 01f38c63 beq x7,x31,80003d1c + 80003d08: 0100446f jal x8,80007d18 + 80003d0c: 80003cfc .word 0x80003cfc + 80003d10: 00000000 .word 0x00000000 + 80003d14: 80014203 .word 0x80014203 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003d20: 0007bc83 ld x25,0(x15) + 80003d24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80003d28: 0007b603 ld x12,0(x15) + 80003d2c: 00878793 addi x15,x15,8 + +0000000080003d30 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + orn x11, x25, x12 # perform operation + 80003d30: 40cce5b3 orn x11,x25,x12 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d34: 0004b383 ld x7,0(x9) + 80003d38: 00b38c63 beq x7,x11,80003d50 + 80003d3c: 7dd0346f jal x8,80007d18 + 80003d40: 80003d30 .word 0x80003d30 + 80003d44: 00000000 .word 0x00000000 + 80003d48: 80014271 .word 0x80014271 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003d54: 0007bf03 ld x30,0(x15) + 80003d58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x5555555555555555 + 80003d5c: 0007bc83 ld x25,0(x15) + 80003d60: 00878793 addi x15,x15,8 + +0000000080003d64 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + orn x2, x30, x25 # perform operation + 80003d64: 419f6133 orn x2,x30,x25 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d68: 0004b383 ld x7,0(x9) + 80003d6c: 00238c63 beq x7,x2,80003d84 + 80003d70: 7a90346f jal x8,80007d18 + 80003d74: 80003d64 .word 0x80003d64 + 80003d78: 00000000 .word 0x00000000 + 80003d7c: 800142df .word 0x800142df + 80003d80: 00000000 .word 0x00000000 + 80003d84: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003d88: 0007b883 ld x17,0(x15) + 80003d8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x00000000ffffffff + 80003d90: 0007bb83 ld x23,0(x15) + 80003d94: 00878793 addi x15,x15,8 + +0000000080003d98 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + orn x26, x17, x23 # perform operation + 80003d98: 4178ed33 orn x26,x17,x23 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003d9c: 0004b383 ld x7,0(x9) + 80003da0: 01a38c63 beq x7,x26,80003db8 + 80003da4: 7750346f jal x8,80007d18 + 80003da8: 80003d98 .word 0x80003d98 + 80003dac: 00000000 .word 0x00000000 + 80003db0: 8001434d .word 0x8001434d + 80003db4: 00000000 .word 0x00000000 + 80003db8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003dbc: 0007bb83 ld x23,0(x15) + 80003dc0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x00000000fffffffe + 80003dc4: 0007b283 ld x5,0(x15) + 80003dc8: 00878793 addi x15,x15,8 + +0000000080003dcc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + orn x12, x23, x5 # perform operation + 80003dcc: 405be633 orn x12,x23,x5 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd0: 0004b383 ld x7,0(x9) + 80003dd4: 00c38c63 beq x7,x12,80003dec + 80003dd8: 7410346f jal x8,80007d18 + 80003ddc: 80003dcc .word 0x80003dcc + 80003de0: 00000000 .word 0x00000000 + 80003de4: 800143b3 .word 0x800143b3 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003df0: 0007b803 ld x16,0(x15) + 80003df4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0000000100000000 + 80003df8: 0007b283 ld x5,0(x15) + 80003dfc: 00878793 addi x15,x15,8 + +0000000080003e00 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + orn x11, x16, x5 # perform operation + 80003e00: 405865b3 orn x11,x16,x5 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e04: 0004b383 ld x7,0(x9) + 80003e08: 00b38c63 beq x7,x11,80003e20 + 80003e0c: 70d0346f jal x8,80007d18 + 80003e10: 80003e00 .word 0x80003e00 + 80003e14: 00000000 .word 0x00000000 + 80003e18: 80014419 .word 0x80014419 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003e24: 0007bf03 ld x30,0(x15) + 80003e28: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x0000000100000001 + 80003e2c: 0007b983 ld x19,0(x15) + 80003e30: 00878793 addi x15,x15,8 + +0000000080003e34 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + orn x14, x30, x19 # perform operation + 80003e34: 413f6733 orn x14,x30,x19 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e38: 0004b383 ld x7,0(x9) + 80003e3c: 00e38c63 beq x7,x14,80003e54 + 80003e40: 6d90346f jal x8,80007d18 + 80003e44: 80003e34 .word 0x80003e34 + 80003e48: 00000000 .word 0x00000000 + 80003e4c: 80014480 .word 0x80014480 + 80003e50: 00000000 .word 0x00000000 + 80003e54: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x5555555555555555 + 80003e58: 0007bc03 ld x24,0(x15) + 80003e5c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x0000000000000000 + 80003e60: 0007bd03 ld x26,0(x15) + 80003e64: 00878793 addi x15,x15,8 + +0000000080003e68 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + orn x13, x24, x26 # perform operation + 80003e68: 41ac66b3 orn x13,x24,x26 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e6c: 0004b383 ld x7,0(x9) + 80003e70: 00d38c63 beq x7,x13,80003e88 + 80003e74: 6a50346f jal x8,80007d18 + 80003e78: 80003e68 .word 0x80003e68 + 80003e7c: 00000000 .word 0x00000000 + 80003e80: 800144e7 .word 0x800144e7 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x5555555555555555 + 80003e8c: 0007bb83 ld x23,0(x15) + 80003e90: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000000000001 + 80003e94: 0007bb03 ld x22,0(x15) + 80003e98: 00878793 addi x15,x15,8 + +0000000080003e9c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + orn x28, x23, x22 # perform operation + 80003e9c: 416bee33 orn x28,x23,x22 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea0: 0004b383 ld x7,0(x9) + 80003ea4: 01c38c63 beq x7,x28,80003ebc + 80003ea8: 6710346f jal x8,80007d18 + 80003eac: 80003e9c .word 0x80003e9c + 80003eb0: 00000000 .word 0x00000000 + 80003eb4: 80014546 .word 0x80014546 + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x5555555555555555 + 80003ec0: 0007ba03 ld x20,0(x15) + 80003ec4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x0000000000000002 + 80003ec8: 0007b303 ld x6,0(x15) + 80003ecc: 00878793 addi x15,x15,8 + +0000000080003ed0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + orn x11, x20, x6 # perform operation + 80003ed0: 406a65b3 orn x11,x20,x6 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ed4: 0004b383 ld x7,0(x9) + 80003ed8: 00b38c63 beq x7,x11,80003ef0 + 80003edc: 63d0346f jal x8,80007d18 + 80003ee0: 80003ed0 .word 0x80003ed0 + 80003ee4: 00000000 .word 0x00000000 + 80003ee8: 800145a5 .word 0x800145a5 + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x5555555555555555 + 80003ef4: 0007bb83 ld x23,0(x15) + 80003ef8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8000000000000000 + 80003efc: 0007be83 ld x29,0(x15) + 80003f00: 00878793 addi x15,x15,8 + +0000000080003f04 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + orn x30, x23, x29 # perform operation + 80003f04: 41dbef33 orn x30,x23,x29 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f08: 0004b383 ld x7,0(x9) + 80003f0c: 01e38c63 beq x7,x30,80003f24 + 80003f10: 6090346f jal x8,80007d18 + 80003f14: 80003f04 .word 0x80003f04 + 80003f18: 00000000 .word 0x00000000 + 80003f1c: 80014604 .word 0x80014604 + 80003f20: 00000000 .word 0x00000000 + 80003f24: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x5555555555555555 + 80003f28: 0007b183 ld x3,0(x15) + 80003f2c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x8000000000000001 + 80003f30: 0007bb83 ld x23,0(x15) + 80003f34: 00878793 addi x15,x15,8 + +0000000080003f38 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + orn x14, x3, x23 # perform operation + 80003f38: 4171e733 orn x14,x3,x23 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f3c: 0004b383 ld x7,0(x9) + 80003f40: 00e38c63 beq x7,x14,80003f58 + 80003f44: 5d50346f jal x8,80007d18 + 80003f48: 80003f38 .word 0x80003f38 + 80003f4c: 00000000 .word 0x00000000 + 80003f50: 80014672 .word 0x80014672 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5555555555555555 + 80003f5c: 0007b703 ld x14,0(x15) + 80003f60: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7fffffffffffffff + 80003f64: 0007b903 ld x18,0(x15) + 80003f68: 00878793 addi x15,x15,8 + +0000000080003f6c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + orn x3, x14, x18 # perform operation + 80003f6c: 412761b3 orn x3,x14,x18 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f70: 0004b383 ld x7,0(x9) + 80003f74: 00338c63 beq x7,x3,80003f8c + 80003f78: 5a10346f jal x8,80007d18 + 80003f7c: 80003f6c .word 0x80003f6c + 80003f80: 00000000 .word 0x00000000 + 80003f84: 800146e0 .word 0x800146e0 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x5555555555555555 + 80003f90: 0007bd03 ld x26,0(x15) + 80003f94: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80003f98: 0007bb83 ld x23,0(x15) + 80003f9c: 00878793 addi x15,x15,8 + +0000000080003fa0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + orn x22, x26, x23 # perform operation + 80003fa0: 417d6b33 orn x22,x26,x23 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fa4: 0004b383 ld x7,0(x9) + 80003fa8: 01638c63 beq x7,x22,80003fc0 + 80003fac: 56d0346f jal x8,80007d18 + 80003fb0: 80003fa0 .word 0x80003fa0 + 80003fb4: 00000000 .word 0x00000000 + 80003fb8: 8001474e .word 0x8001474e + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x5555555555555555 + 80003fc4: 0007b803 ld x16,0(x15) + 80003fc8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xffffffffffffffff + 80003fcc: 0007b503 ld x10,0(x15) + 80003fd0: 00878793 addi x15,x15,8 + +0000000080003fd4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + orn x17, x16, x10 # perform operation + 80003fd4: 40a868b3 orn x17,x16,x10 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fd8: 0004b383 ld x7,0(x9) + 80003fdc: 01138c63 beq x7,x17,80003ff4 + 80003fe0: 5390346f jal x8,80007d18 + 80003fe4: 80003fd4 .word 0x80003fd4 + 80003fe8: 00000000 .word 0x00000000 + 80003fec: 800147bc .word 0x800147bc + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x5555555555555555 + 80003ff8: 0007b583 ld x11,0(x15) + 80003ffc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xfffffffffffffffe + 80004000: 0007ba83 ld x21,0(x15) + 80004004: 00878793 addi x15,x15,8 + +0000000080004008 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + orn x14, x11, x21 # perform operation + 80004008: 4155e733 orn x14,x11,x21 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000400c: 0004b383 ld x7,0(x9) + 80004010: 00e38c63 beq x7,x14,80004028 + 80004014: 5050346f jal x8,80007d18 + 80004018: 80004008 .word 0x80004008 + 8000401c: 00000000 .word 0x00000000 + 80004020: 8001482a .word 0x8001482a + 80004024: 00000000 .word 0x00000000 + 80004028: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x5555555555555555 + 8000402c: 0007bf83 ld x31,0(x15) + 80004030: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80004034: 0007bf03 ld x30,0(x15) + 80004038: 00878793 addi x15,x15,8 + +000000008000403c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + orn x22, x31, x30 # perform operation + 8000403c: 41efeb33 orn x22,x31,x30 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004040: 0004b383 ld x7,0(x9) + 80004044: 01638c63 beq x7,x22,8000405c + 80004048: 4d10346f jal x8,80007d18 + 8000404c: 8000403c .word 0x8000403c + 80004050: 00000000 .word 0x00000000 + 80004054: 80014898 .word 0x80014898 + 80004058: 00000000 .word 0x00000000 + 8000405c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x5555555555555555 + 80004060: 0007bb03 ld x22,0(x15) + 80004064: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004068: 0007b983 ld x19,0(x15) + 8000406c: 00878793 addi x15,x15,8 + +0000000080004070 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + orn x13, x22, x19 # perform operation + 80004070: 413b66b3 orn x13,x22,x19 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004074: 0004b383 ld x7,0(x9) + 80004078: 00d38c63 beq x7,x13,80004090 + 8000407c: 49d0346f jal x8,80007d18 + 80004080: 80004070 .word 0x80004070 + 80004084: 00000000 .word 0x00000000 + 80004088: 80014906 .word 0x80014906 + 8000408c: 00000000 .word 0x00000000 + 80004090: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x5555555555555555 + 80004094: 0007b983 ld x19,0(x15) + 80004098: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x5555555555555555 + 8000409c: 0007bd83 ld x27,0(x15) + 800040a0: 00878793 addi x15,x15,8 + +00000000800040a4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + orn x11, x19, x27 # perform operation + 800040a4: 41b9e5b3 orn x11,x19,x27 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040a8: 0004b383 ld x7,0(x9) + 800040ac: 00b38c63 beq x7,x11,800040c4 + 800040b0: 4690346f jal x8,80007d18 + 800040b4: 800040a4 .word 0x800040a4 + 800040b8: 00000000 .word 0x00000000 + 800040bc: 80014974 .word 0x80014974 + 800040c0: 00000000 .word 0x00000000 + 800040c4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x5555555555555555 + 800040c8: 0007bc03 ld x24,0(x15) + 800040cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x00000000ffffffff + 800040d0: 0007b883 ld x17,0(x15) + 800040d4: 00878793 addi x15,x15,8 + +00000000800040d8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + orn x6, x24, x17 # perform operation + 800040d8: 411c6333 orn x6,x24,x17 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040dc: 0004b383 ld x7,0(x9) + 800040e0: 00638c63 beq x7,x6,800040f8 + 800040e4: 4350346f jal x8,80007d18 + 800040e8: 800040d8 .word 0x800040d8 + 800040ec: 00000000 .word 0x00000000 + 800040f0: 800149e2 .word 0x800149e2 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5555555555555555 + 800040fc: 0007b083 ld x1,0(x15) + 80004100: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000000fffffffe + 80004104: 0007ba83 ld x21,0(x15) + 80004108: 00878793 addi x15,x15,8 + +000000008000410c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + orn x19, x1, x21 # perform operation + 8000410c: 4150e9b3 orn x19,x1,x21 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004110: 0004b383 ld x7,0(x9) + 80004114: 01338c63 beq x7,x19,8000412c + 80004118: 4010346f jal x8,80007d18 + 8000411c: 8000410c .word 0x8000410c + 80004120: 00000000 .word 0x00000000 + 80004124: 80014a48 .word 0x80014a48 + 80004128: 00000000 .word 0x00000000 + 8000412c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5555555555555555 + 80004130: 0007be03 ld x28,0(x15) + 80004134: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x0000000100000000 + 80004138: 0007b803 ld x16,0(x15) + 8000413c: 00878793 addi x15,x15,8 + +0000000080004140 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + orn x22, x28, x16 # perform operation + 80004140: 410e6b33 orn x22,x28,x16 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004144: 0004b383 ld x7,0(x9) + 80004148: 01638c63 beq x7,x22,80004160 + 8000414c: 3cd0346f jal x8,80007d18 + 80004150: 80004140 .word 0x80004140 + 80004154: 00000000 .word 0x00000000 + 80004158: 80014aae .word 0x80014aae + 8000415c: 00000000 .word 0x00000000 + 80004160: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x5555555555555555 + 80004164: 0007b283 ld x5,0(x15) + 80004168: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x0000000100000001 + 8000416c: 0007bf83 ld x31,0(x15) + 80004170: 00878793 addi x15,x15,8 + +0000000080004174 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + orn x21, x5, x31 # perform operation + 80004174: 41f2eab3 orn x21,x5,x31 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004178: 0004b383 ld x7,0(x9) + 8000417c: 01538c63 beq x7,x21,80004194 + 80004180: 3990346f jal x8,80007d18 + 80004184: 80004174 .word 0x80004174 + 80004188: 00000000 .word 0x00000000 + 8000418c: 80014b15 .word 0x80014b15 + 80004190: 00000000 .word 0x00000000 + 80004194: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x00000000ffffffff + 80004198: 0007b803 ld x16,0(x15) + 8000419c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x0000000000000000 + 800041a0: 0007b183 ld x3,0(x15) + 800041a4: 00878793 addi x15,x15,8 + +00000000800041a8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + orn x26, x16, x3 # perform operation + 800041a8: 40386d33 orn x26,x16,x3 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041ac: 0004b383 ld x7,0(x9) + 800041b0: 01a38c63 beq x7,x26,800041c8 + 800041b4: 3650346f jal x8,80007d18 + 800041b8: 800041a8 .word 0x800041a8 + 800041bc: 00000000 .word 0x00000000 + 800041c0: 80014b7c .word 0x80014b7c + 800041c4: 00000000 .word 0x00000000 + 800041c8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x00000000ffffffff + 800041cc: 0007b103 ld x2,0(x15) + 800041d0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000000000001 + 800041d4: 0007bc83 ld x25,0(x15) + 800041d8: 00878793 addi x15,x15,8 + +00000000800041dc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + orn x16, x2, x25 # perform operation + 800041dc: 41916833 orn x16,x2,x25 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e0: 0004b383 ld x7,0(x9) + 800041e4: 01038c63 beq x7,x16,800041fc + 800041e8: 3310346f jal x8,80007d18 + 800041ec: 800041dc .word 0x800041dc + 800041f0: 00000000 .word 0x00000000 + 800041f4: 80014bd3 .word 0x80014bd3 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x00000000ffffffff + 80004200: 0007b183 ld x3,0(x15) + 80004204: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x0000000000000002 + 80004208: 0007b303 ld x6,0(x15) + 8000420c: 00878793 addi x15,x15,8 + +0000000080004210 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + orn x5, x3, x6 # perform operation + 80004210: 4061e2b3 orn x5,x3,x6 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004214: 0004b383 ld x7,0(x9) + 80004218: 00538c63 beq x7,x5,80004230 + 8000421c: 2fd0346f jal x8,80007d18 + 80004220: 80004210 .word 0x80004210 + 80004224: 00000000 .word 0x00000000 + 80004228: 80014c2a .word 0x80014c2a + 8000422c: 00000000 .word 0x00000000 + 80004230: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x00000000ffffffff + 80004234: 0007bc83 ld x25,0(x15) + 80004238: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x8000000000000000 + 8000423c: 0007bd03 ld x26,0(x15) + 80004240: 00878793 addi x15,x15,8 + +0000000080004244 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + orn x1, x25, x26 # perform operation + 80004244: 41ace0b3 orn x1,x25,x26 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004248: 0004b383 ld x7,0(x9) + 8000424c: 00138c63 beq x7,x1,80004264 + 80004250: 2c90346f jal x8,80007d18 + 80004254: 80004244 .word 0x80004244 + 80004258: 00000000 .word 0x00000000 + 8000425c: 80014c81 .word 0x80014c81 + 80004260: 00000000 .word 0x00000000 + 80004264: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x00000000ffffffff + 80004268: 0007bf03 ld x30,0(x15) + 8000426c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8000000000000001 + 80004270: 0007be83 ld x29,0(x15) + 80004274: 00878793 addi x15,x15,8 + +0000000080004278 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + orn x6, x30, x29 # perform operation + 80004278: 41df6333 orn x6,x30,x29 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000427c: 0004b383 ld x7,0(x9) + 80004280: 00638c63 beq x7,x6,80004298 + 80004284: 2950346f jal x8,80007d18 + 80004288: 80004278 .word 0x80004278 + 8000428c: 00000000 .word 0x00000000 + 80004290: 80014ce7 .word 0x80014ce7 + 80004294: 00000000 .word 0x00000000 + 80004298: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x00000000ffffffff + 8000429c: 0007bf83 ld x31,0(x15) + 800042a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x7fffffffffffffff + 800042a4: 0007ba83 ld x21,0(x15) + 800042a8: 00878793 addi x15,x15,8 + +00000000800042ac : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + orn x30, x31, x21 # perform operation + 800042ac: 415fef33 orn x30,x31,x21 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b0: 0004b383 ld x7,0(x9) + 800042b4: 01e38c63 beq x7,x30,800042cc + 800042b8: 2610346f jal x8,80007d18 + 800042bc: 800042ac .word 0x800042ac + 800042c0: 00000000 .word 0x00000000 + 800042c4: 80014d4d .word 0x80014d4d + 800042c8: 00000000 .word 0x00000000 + 800042cc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x00000000ffffffff + 800042d0: 0007bb83 ld x23,0(x15) + 800042d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x7ffffffffffffffe + 800042d8: 0007bf03 ld x30,0(x15) + 800042dc: 00878793 addi x15,x15,8 + +00000000800042e0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + orn x26, x23, x30 # perform operation + 800042e0: 41ebed33 orn x26,x23,x30 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042e4: 0004b383 ld x7,0(x9) + 800042e8: 01a38c63 beq x7,x26,80004300 + 800042ec: 22d0346f jal x8,80007d18 + 800042f0: 800042e0 .word 0x800042e0 + 800042f4: 00000000 .word 0x00000000 + 800042f8: 80014db3 .word 0x80014db3 + 800042fc: 00000000 .word 0x00000000 + 80004300: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x00000000ffffffff + 80004304: 0007bd03 ld x26,0(x15) + 80004308: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xffffffffffffffff + 8000430c: 0007b903 ld x18,0(x15) + 80004310: 00878793 addi x15,x15,8 + +0000000080004314 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + orn x5, x26, x18 # perform operation + 80004314: 412d62b3 orn x5,x26,x18 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004318: 0004b383 ld x7,0(x9) + 8000431c: 00538c63 beq x7,x5,80004334 + 80004320: 1f90346f jal x8,80007d18 + 80004324: 80004314 .word 0x80004314 + 80004328: 00000000 .word 0x00000000 + 8000432c: 80014e19 .word 0x80014e19 + 80004330: 00000000 .word 0x00000000 + 80004334: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000000ffffffff + 80004338: 0007be03 ld x28,0(x15) + 8000433c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xfffffffffffffffe + 80004340: 0007b303 ld x6,0(x15) + 80004344: 00878793 addi x15,x15,8 + +0000000080004348 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + orn x31, x28, x6 # perform operation + 80004348: 406e6fb3 orn x31,x28,x6 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000434c: 0004b383 ld x7,0(x9) + 80004350: 01f38c63 beq x7,x31,80004368 + 80004354: 1c50346f jal x8,80007d18 + 80004358: 80004348 .word 0x80004348 + 8000435c: 00000000 .word 0x00000000 + 80004360: 80014e7f .word 0x80014e7f + 80004364: 00000000 .word 0x00000000 + 80004368: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x00000000ffffffff + 8000436c: 0007b303 ld x6,0(x15) + 80004370: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 80004374: 0007ba03 ld x20,0(x15) + 80004378: 00878793 addi x15,x15,8 + +000000008000437c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + orn x26, x6, x20 # perform operation + 8000437c: 41436d33 orn x26,x6,x20 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004380: 0004b383 ld x7,0(x9) + 80004384: 01a38c63 beq x7,x26,8000439c + 80004388: 1910346f jal x8,80007d18 + 8000438c: 8000437c .word 0x8000437c + 80004390: 00000000 .word 0x00000000 + 80004394: 80014ee5 .word 0x80014ee5 + 80004398: 00000000 .word 0x00000000 + 8000439c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x00000000ffffffff + 800043a0: 0007bb83 ld x23,0(x15) + 800043a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 800043a8: 0007bf03 ld x30,0(x15) + 800043ac: 00878793 addi x15,x15,8 + +00000000800043b0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + orn x11, x23, x30 # perform operation + 800043b0: 41ebe5b3 orn x11,x23,x30 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043b4: 0004b383 ld x7,0(x9) + 800043b8: 00b38c63 beq x7,x11,800043d0 + 800043bc: 15d0346f jal x8,80007d18 + 800043c0: 800043b0 .word 0x800043b0 + 800043c4: 00000000 .word 0x00000000 + 800043c8: 80014f4b .word 0x80014f4b + 800043cc: 00000000 .word 0x00000000 + 800043d0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x00000000ffffffff + 800043d4: 0007b803 ld x16,0(x15) + 800043d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x5555555555555555 + 800043dc: 0007ba03 ld x20,0(x15) + 800043e0: 00878793 addi x15,x15,8 + +00000000800043e4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + orn x12, x16, x20 # perform operation + 800043e4: 41486633 orn x12,x16,x20 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043e8: 0004b383 ld x7,0(x9) + 800043ec: 00c38c63 beq x7,x12,80004404 + 800043f0: 1290346f jal x8,80007d18 + 800043f4: 800043e4 .word 0x800043e4 + 800043f8: 00000000 .word 0x00000000 + 800043fc: 80014fb1 .word 0x80014fb1 + 80004400: 00000000 .word 0x00000000 + 80004404: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x00000000ffffffff + 80004408: 0007b703 ld x14,0(x15) + 8000440c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x00000000ffffffff + 80004410: 0007b883 ld x17,0(x15) + 80004414: 00878793 addi x15,x15,8 + +0000000080004418 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + orn x18, x14, x17 # perform operation + 80004418: 41176933 orn x18,x14,x17 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000441c: 0004b383 ld x7,0(x9) + 80004420: 01238c63 beq x7,x18,80004438 + 80004424: 0f50346f jal x8,80007d18 + 80004428: 80004418 .word 0x80004418 + 8000442c: 00000000 .word 0x00000000 + 80004430: 80015017 .word 0x80015017 + 80004434: 00000000 .word 0x00000000 + 80004438: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000000ffffffff + 8000443c: 0007be03 ld x28,0(x15) + 80004440: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x00000000fffffffe + 80004444: 0007b203 ld x4,0(x15) + 80004448: 00878793 addi x15,x15,8 + +000000008000444c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + orn x5, x28, x4 # perform operation + 8000444c: 404e62b3 orn x5,x28,x4 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004450: 0004b383 ld x7,0(x9) + 80004454: 00538c63 beq x7,x5,8000446c + 80004458: 0c10346f jal x8,80007d18 + 8000445c: 8000444c .word 0x8000444c + 80004460: 00000000 .word 0x00000000 + 80004464: 80015075 .word 0x80015075 + 80004468: 00000000 .word 0x00000000 + 8000446c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x00000000ffffffff + 80004470: 0007b083 ld x1,0(x15) + 80004474: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x0000000100000000 + 80004478: 0007be83 ld x29,0(x15) + 8000447c: 00878793 addi x15,x15,8 + +0000000080004480 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + orn x2, x1, x29 # perform operation + 80004480: 41d0e133 orn x2,x1,x29 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004484: 0004b383 ld x7,0(x9) + 80004488: 00238c63 beq x7,x2,800044a0 + 8000448c: 08d0346f jal x8,80007d18 + 80004490: 80004480 .word 0x80004480 + 80004494: 00000000 .word 0x00000000 + 80004498: 800150d3 .word 0x800150d3 + 8000449c: 00000000 .word 0x00000000 + 800044a0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x00000000ffffffff + 800044a4: 0007b103 ld x2,0(x15) + 800044a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x0000000100000001 + 800044ac: 0007b503 ld x10,0(x15) + 800044b0: 00878793 addi x15,x15,8 + +00000000800044b4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + orn x30, x2, x10 # perform operation + 800044b4: 40a16f33 orn x30,x2,x10 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044b8: 0004b383 ld x7,0(x9) + 800044bc: 01e38c63 beq x7,x30,800044d4 + 800044c0: 0590346f jal x8,80007d18 + 800044c4: 800044b4 .word 0x800044b4 + 800044c8: 00000000 .word 0x00000000 + 800044cc: 80015132 .word 0x80015132 + 800044d0: 00000000 .word 0x00000000 + 800044d4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x00000000fffffffe + 800044d8: 0007b983 ld x19,0(x15) + 800044dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x0000000000000000 + 800044e0: 0007b703 ld x14,0(x15) + 800044e4: 00878793 addi x15,x15,8 + +00000000800044e8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + orn x23, x19, x14 # perform operation + 800044e8: 40e9ebb3 orn x23,x19,x14 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044ec: 0004b383 ld x7,0(x9) + 800044f0: 01738c63 beq x7,x23,80004508 + 800044f4: 0250346f jal x8,80007d18 + 800044f8: 800044e8 .word 0x800044e8 + 800044fc: 00000000 .word 0x00000000 + 80004500: 80015191 .word 0x80015191 + 80004504: 00000000 .word 0x00000000 + 80004508: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000000fffffffe + 8000450c: 0007be03 ld x28,0(x15) + 80004510: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0000000000000001 + 80004514: 0007b283 ld x5,0(x15) + 80004518: 00878793 addi x15,x15,8 + +000000008000451c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + orn x6, x28, x5 # perform operation + 8000451c: 405e6333 orn x6,x28,x5 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004520: 0004b383 ld x7,0(x9) + 80004524: 00638c63 beq x7,x6,8000453c + 80004528: 7f00346f jal x8,80007d18 + 8000452c: 8000451c .word 0x8000451c + 80004530: 00000000 .word 0x00000000 + 80004534: 800151e8 .word 0x800151e8 + 80004538: 00000000 .word 0x00000000 + 8000453c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x00000000fffffffe + 80004540: 0007b703 ld x14,0(x15) + 80004544: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x0000000000000002 + 80004548: 0007b983 ld x19,0(x15) + 8000454c: 00878793 addi x15,x15,8 + +0000000080004550 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + orn x17, x14, x19 # perform operation + 80004550: 413768b3 orn x17,x14,x19 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004554: 0004b383 ld x7,0(x9) + 80004558: 01138c63 beq x7,x17,80004570 + 8000455c: 7bc0346f jal x8,80007d18 + 80004560: 80004550 .word 0x80004550 + 80004564: 00000000 .word 0x00000000 + 80004568: 8001523f .word 0x8001523f + 8000456c: 00000000 .word 0x00000000 + 80004570: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x00000000fffffffe + 80004574: 0007b583 ld x11,0(x15) + 80004578: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x8000000000000000 + 8000457c: 0007bb03 ld x22,0(x15) + 80004580: 00878793 addi x15,x15,8 + +0000000080004584 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + orn x31, x11, x22 # perform operation + 80004584: 4165efb3 orn x31,x11,x22 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004588: 0004b383 ld x7,0(x9) + 8000458c: 01f38c63 beq x7,x31,800045a4 + 80004590: 7880346f jal x8,80007d18 + 80004594: 80004584 .word 0x80004584 + 80004598: 00000000 .word 0x00000000 + 8000459c: 80015296 .word 0x80015296 + 800045a0: 00000000 .word 0x00000000 + 800045a4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x00000000fffffffe + 800045a8: 0007b303 ld x6,0(x15) + 800045ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x8000000000000001 + 800045b0: 0007b883 ld x17,0(x15) + 800045b4: 00878793 addi x15,x15,8 + +00000000800045b8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + orn x20, x6, x17 # perform operation + 800045b8: 41136a33 orn x20,x6,x17 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045bc: 0004b383 ld x7,0(x9) + 800045c0: 01438c63 beq x7,x20,800045d8 + 800045c4: 7540346f jal x8,80007d18 + 800045c8: 800045b8 .word 0x800045b8 + 800045cc: 00000000 .word 0x00000000 + 800045d0: 800152fc .word 0x800152fc + 800045d4: 00000000 .word 0x00000000 + 800045d8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000000fffffffe + 800045dc: 0007bb03 ld x22,0(x15) + 800045e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x7fffffffffffffff + 800045e4: 0007ba83 ld x21,0(x15) + 800045e8: 00878793 addi x15,x15,8 + +00000000800045ec : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + orn x20, x22, x21 # perform operation + 800045ec: 415b6a33 orn x20,x22,x21 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f0: 0004b383 ld x7,0(x9) + 800045f4: 01438c63 beq x7,x20,8000460c + 800045f8: 7200346f jal x8,80007d18 + 800045fc: 800045ec .word 0x800045ec + 80004600: 00000000 .word 0x00000000 + 80004604: 80015362 .word 0x80015362 + 80004608: 00000000 .word 0x00000000 + 8000460c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x00000000fffffffe + 80004610: 0007bb03 ld x22,0(x15) + 80004614: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80004618: 0007b703 ld x14,0(x15) + 8000461c: 00878793 addi x15,x15,8 + +0000000080004620 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + orn x5, x22, x14 # perform operation + 80004620: 40eb62b3 orn x5,x22,x14 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004624: 0004b383 ld x7,0(x9) + 80004628: 00538c63 beq x7,x5,80004640 + 8000462c: 6ec0346f jal x8,80007d18 + 80004630: 80004620 .word 0x80004620 + 80004634: 00000000 .word 0x00000000 + 80004638: 800153c8 .word 0x800153c8 + 8000463c: 00000000 .word 0x00000000 + 80004640: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x00000000fffffffe + 80004644: 0007b203 ld x4,0(x15) + 80004648: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xffffffffffffffff + 8000464c: 0007ba03 ld x20,0(x15) + 80004650: 00878793 addi x15,x15,8 + +0000000080004654 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + orn x21, x4, x20 # perform operation + 80004654: 41426ab3 orn x21,x4,x20 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004658: 0004b383 ld x7,0(x9) + 8000465c: 01538c63 beq x7,x21,80004674 + 80004660: 6b80346f jal x8,80007d18 + 80004664: 80004654 .word 0x80004654 + 80004668: 00000000 .word 0x00000000 + 8000466c: 8001542e .word 0x8001542e + 80004670: 00000000 .word 0x00000000 + 80004674: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x00000000fffffffe + 80004678: 0007b703 ld x14,0(x15) + 8000467c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xfffffffffffffffe + 80004680: 0007b803 ld x16,0(x15) + 80004684: 00878793 addi x15,x15,8 + +0000000080004688 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + orn x10, x14, x16 # perform operation + 80004688: 41076533 orn x10,x14,x16 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000468c: 0004b383 ld x7,0(x9) + 80004690: 00a38c63 beq x7,x10,800046a8 + 80004694: 6840346f jal x8,80007d18 + 80004698: 80004688 .word 0x80004688 + 8000469c: 00000000 .word 0x00000000 + 800046a0: 80015494 .word 0x80015494 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x00000000fffffffe + 800046ac: 0007b083 ld x1,0(x15) + 800046b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 800046b4: 0007b103 ld x2,0(x15) + 800046b8: 00878793 addi x15,x15,8 + +00000000800046bc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + orn x28, x1, x2 # perform operation + 800046bc: 4020ee33 orn x28,x1,x2 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c0: 0004b383 ld x7,0(x9) + 800046c4: 01c38c63 beq x7,x28,800046dc + 800046c8: 6500346f jal x8,80007d18 + 800046cc: 800046bc .word 0x800046bc + 800046d0: 00000000 .word 0x00000000 + 800046d4: 800154fa .word 0x800154fa + 800046d8: 00000000 .word 0x00000000 + 800046dc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x00000000fffffffe + 800046e0: 0007b103 ld x2,0(x15) + 800046e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 800046e8: 0007b883 ld x17,0(x15) + 800046ec: 00878793 addi x15,x15,8 + +00000000800046f0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + orn x31, x2, x17 # perform operation + 800046f0: 41116fb3 orn x31,x2,x17 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046f4: 0004b383 ld x7,0(x9) + 800046f8: 01f38c63 beq x7,x31,80004710 + 800046fc: 61c0346f jal x8,80007d18 + 80004700: 800046f0 .word 0x800046f0 + 80004704: 00000000 .word 0x00000000 + 80004708: 80015560 .word 0x80015560 + 8000470c: 00000000 .word 0x00000000 + 80004710: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x00000000fffffffe + 80004714: 0007b203 ld x4,0(x15) + 80004718: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x5555555555555555 + 8000471c: 0007b603 ld x12,0(x15) + 80004720: 00878793 addi x15,x15,8 + +0000000080004724 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + orn x10, x4, x12 # perform operation + 80004724: 40c26533 orn x10,x4,x12 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004728: 0004b383 ld x7,0(x9) + 8000472c: 00a38c63 beq x7,x10,80004744 + 80004730: 5e80346f jal x8,80007d18 + 80004734: 80004724 .word 0x80004724 + 80004738: 00000000 .word 0x00000000 + 8000473c: 800155c6 .word 0x800155c6 + 80004740: 00000000 .word 0x00000000 + 80004744: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x00000000fffffffe + 80004748: 0007b283 ld x5,0(x15) + 8000474c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x00000000ffffffff + 80004750: 0007bb03 ld x22,0(x15) + 80004754: 00878793 addi x15,x15,8 + +0000000080004758 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + orn x18, x5, x22 # perform operation + 80004758: 4162e933 orn x18,x5,x22 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000475c: 0004b383 ld x7,0(x9) + 80004760: 01238c63 beq x7,x18,80004778 + 80004764: 5b40346f jal x8,80007d18 + 80004768: 80004758 .word 0x80004758 + 8000476c: 00000000 .word 0x00000000 + 80004770: 8001562c .word 0x8001562c + 80004774: 00000000 .word 0x00000000 + 80004778: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x00000000fffffffe + 8000477c: 0007b183 ld x3,0(x15) + 80004780: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x00000000fffffffe + 80004784: 0007bc03 ld x24,0(x15) + 80004788: 00878793 addi x15,x15,8 + +000000008000478c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + orn x11, x3, x24 # perform operation + 8000478c: 4181e5b3 orn x11,x3,x24 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004790: 0004b383 ld x7,0(x9) + 80004794: 00b38c63 beq x7,x11,800047ac + 80004798: 5800346f jal x8,80007d18 + 8000479c: 8000478c .word 0x8000478c + 800047a0: 00000000 .word 0x00000000 + 800047a4: 8001568a .word 0x8001568a + 800047a8: 00000000 .word 0x00000000 + 800047ac: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000000fffffffe + 800047b0: 0007be03 ld x28,0(x15) + 800047b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x0000000100000000 + 800047b8: 0007bf03 ld x30,0(x15) + 800047bc: 00878793 addi x15,x15,8 + +00000000800047c0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + orn x19, x28, x30 # perform operation + 800047c0: 41ee69b3 orn x19,x28,x30 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047c4: 0004b383 ld x7,0(x9) + 800047c8: 01338c63 beq x7,x19,800047e0 + 800047cc: 54c0346f jal x8,80007d18 + 800047d0: 800047c0 .word 0x800047c0 + 800047d4: 00000000 .word 0x00000000 + 800047d8: 800156e8 .word 0x800156e8 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x00000000fffffffe + 800047e4: 0007be03 ld x28,0(x15) + 800047e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x0000000100000001 + 800047ec: 0007bd03 ld x26,0(x15) + 800047f0: 00878793 addi x15,x15,8 + +00000000800047f4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + orn x25, x28, x26 # perform operation + 800047f4: 41ae6cb3 orn x25,x28,x26 + # Check if x25 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x25, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047f8: 0004b383 ld x7,0(x9) + 800047fc: 01938c63 beq x7,x25,80004814 + 80004800: 5180346f jal x8,80007d18 + 80004804: 800047f4 .word 0x800047f4 + 80004808: 00000000 .word 0x00000000 + 8000480c: 80015747 .word 0x80015747 + 80004810: 00000000 .word 0x00000000 + 80004814: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x0000000100000000 + 80004818: 0007b603 ld x12,0(x15) + 8000481c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x0000000000000000 + 80004820: 0007be83 ld x29,0(x15) + 80004824: 00878793 addi x15,x15,8 + +0000000080004828 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + orn x1, x12, x29 # perform operation + 80004828: 41d660b3 orn x1,x12,x29 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000482c: 0004b383 ld x7,0(x9) + 80004830: 00138c63 beq x7,x1,80004848 + 80004834: 4e40346f jal x8,80007d18 + 80004838: 80004828 .word 0x80004828 + 8000483c: 00000000 .word 0x00000000 + 80004840: 800157a6 .word 0x800157a6 + 80004844: 00000000 .word 0x00000000 + 80004848: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0000000100000000 + 8000484c: 0007bb83 ld x23,0(x15) + 80004850: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x0000000000000001 + 80004854: 0007b983 ld x19,0(x15) + 80004858: 00878793 addi x15,x15,8 + +000000008000485c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + orn x27, x23, x19 # perform operation + 8000485c: 413bedb3 orn x27,x23,x19 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004860: 0004b383 ld x7,0(x9) + 80004864: 01b38c63 beq x7,x27,8000487c + 80004868: 4b00346f jal x8,80007d18 + 8000486c: 8000485c .word 0x8000485c + 80004870: 00000000 .word 0x00000000 + 80004874: 800157fe .word 0x800157fe + 80004878: 00000000 .word 0x00000000 + 8000487c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x0000000100000000 + 80004880: 0007b203 ld x4,0(x15) + 80004884: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x0000000000000002 + 80004888: 0007b103 ld x2,0(x15) + 8000488c: 00878793 addi x15,x15,8 + +0000000080004890 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + orn x30, x4, x2 # perform operation + 80004890: 40226f33 orn x30,x4,x2 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004894: 0004b383 ld x7,0(x9) + 80004898: 01e38c63 beq x7,x30,800048b0 + 8000489c: 47c0346f jal x8,80007d18 + 800048a0: 80004890 .word 0x80004890 + 800048a4: 00000000 .word 0x00000000 + 800048a8: 80015856 .word 0x80015856 + 800048ac: 00000000 .word 0x00000000 + 800048b0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x0000000100000000 + 800048b4: 0007b203 ld x4,0(x15) + 800048b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x8000000000000000 + 800048bc: 0007b683 ld x13,0(x15) + 800048c0: 00878793 addi x15,x15,8 + +00000000800048c4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + orn x1, x4, x13 # perform operation + 800048c4: 40d260b3 orn x1,x4,x13 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048c8: 0004b383 ld x7,0(x9) + 800048cc: 00138c63 beq x7,x1,800048e4 + 800048d0: 4480346f jal x8,80007d18 + 800048d4: 800048c4 .word 0x800048c4 + 800048d8: 00000000 .word 0x00000000 + 800048dc: 800158ae .word 0x800158ae + 800048e0: 00000000 .word 0x00000000 + 800048e4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x0000000100000000 + 800048e8: 0007ba03 ld x20,0(x15) + 800048ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x8000000000000001 + 800048f0: 0007bd83 ld x27,0(x15) + 800048f4: 00878793 addi x15,x15,8 + +00000000800048f8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + orn x6, x20, x27 # perform operation + 800048f8: 41ba6333 orn x6,x20,x27 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 800048fc: 0004b383 ld x7,0(x9) + 80004900: 00638c63 beq x7,x6,80004918 + 80004904: 4140346f jal x8,80007d18 + 80004908: 800048f8 .word 0x800048f8 + 8000490c: 00000000 .word 0x00000000 + 80004910: 80015915 .word 0x80015915 + 80004914: 00000000 .word 0x00000000 + 80004918: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x0000000100000000 + 8000491c: 0007bd03 ld x26,0(x15) + 80004920: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x7fffffffffffffff + 80004924: 0007b603 ld x12,0(x15) + 80004928: 00878793 addi x15,x15,8 + +000000008000492c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + orn x31, x26, x12 # perform operation + 8000492c: 40cd6fb3 orn x31,x26,x12 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004930: 0004b383 ld x7,0(x9) + 80004934: 01f38c63 beq x7,x31,8000494c + 80004938: 3e00346f jal x8,80007d18 + 8000493c: 8000492c .word 0x8000492c + 80004940: 00000000 .word 0x00000000 + 80004944: 8001597c .word 0x8001597c + 80004948: 00000000 .word 0x00000000 + 8000494c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0000000100000000 + 80004950: 0007b503 ld x10,0(x15) + 80004954: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80004958: 0007b883 ld x17,0(x15) + 8000495c: 00878793 addi x15,x15,8 + +0000000080004960 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + orn x14, x10, x17 # perform operation + 80004960: 41156733 orn x14,x10,x17 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004964: 0004b383 ld x7,0(x9) + 80004968: 00e38c63 beq x7,x14,80004980 + 8000496c: 3ac0346f jal x8,80007d18 + 80004970: 80004960 .word 0x80004960 + 80004974: 00000000 .word 0x00000000 + 80004978: 800159e3 .word 0x800159e3 + 8000497c: 00000000 .word 0x00000000 + 80004980: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x0000000100000000 + 80004984: 0007ba03 ld x20,0(x15) + 80004988: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xffffffffffffffff + 8000498c: 0007b283 ld x5,0(x15) + 80004990: 00878793 addi x15,x15,8 + +0000000080004994 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + orn x29, x20, x5 # perform operation + 80004994: 405a6eb3 orn x29,x20,x5 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 80004998: 0004b383 ld x7,0(x9) + 8000499c: 01d38c63 beq x7,x29,800049b4 + 800049a0: 3780346f jal x8,80007d18 + 800049a4: 80004994 .word 0x80004994 + 800049a8: 00000000 .word 0x00000000 + 800049ac: 80015a4a .word 0x80015a4a + 800049b0: 00000000 .word 0x00000000 + 800049b4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x0000000100000000 + 800049b8: 0007be03 ld x28,0(x15) + 800049bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xfffffffffffffffe + 800049c0: 0007be83 ld x29,0(x15) + 800049c4: 00878793 addi x15,x15,8 + +00000000800049c8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + orn x4, x28, x29 # perform operation + 800049c8: 41de6233 orn x4,x28,x29 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049cc: 0004b383 ld x7,0(x9) + 800049d0: 00438c63 beq x7,x4,800049e8 + 800049d4: 3440346f jal x8,80007d18 + 800049d8: 800049c8 .word 0x800049c8 + 800049dc: 00000000 .word 0x00000000 + 800049e0: 80015ab1 .word 0x80015ab1 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x0000000100000000 + 800049ec: 0007b583 ld x11,0(x15) + 800049f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 800049f4: 0007bc83 ld x25,0(x15) + 800049f8: 00878793 addi x15,x15,8 + +00000000800049fc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + orn x14, x11, x25 # perform operation + 800049fc: 4195e733 orn x14,x11,x25 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a00: 0004b383 ld x7,0(x9) + 80004a04: 00e38c63 beq x7,x14,80004a1c + 80004a08: 3100346f jal x8,80007d18 + 80004a0c: 800049fc .word 0x800049fc + 80004a10: 00000000 .word 0x00000000 + 80004a14: 80015b18 .word 0x80015b18 + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x0000000100000000 + 80004a20: 0007bd03 ld x26,0(x15) + 80004a24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80004a28: 0007b603 ld x12,0(x15) + 80004a2c: 00878793 addi x15,x15,8 + +0000000080004a30 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + orn x13, x26, x12 # perform operation + 80004a30: 40cd66b3 orn x13,x26,x12 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a34: 0004b383 ld x7,0(x9) + 80004a38: 00d38c63 beq x7,x13,80004a50 + 80004a3c: 2dc0346f jal x8,80007d18 + 80004a40: 80004a30 .word 0x80004a30 + 80004a44: 00000000 .word 0x00000000 + 80004a48: 80015b7f .word 0x80015b7f + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0000000100000000 + 80004a54: 0007bb83 ld x23,0(x15) + 80004a58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x5555555555555555 + 80004a5c: 0007bc03 ld x24,0(x15) + 80004a60: 00878793 addi x15,x15,8 + +0000000080004a64 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + orn x2, x23, x24 # perform operation + 80004a64: 418be133 orn x2,x23,x24 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a68: 0004b383 ld x7,0(x9) + 80004a6c: 00238c63 beq x7,x2,80004a84 + 80004a70: 2a80346f jal x8,80007d18 + 80004a74: 80004a64 .word 0x80004a64 + 80004a78: 00000000 .word 0x00000000 + 80004a7c: 80015be6 .word 0x80015be6 + 80004a80: 00000000 .word 0x00000000 + 80004a84: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x0000000100000000 + 80004a88: 0007b103 ld x2,0(x15) + 80004a8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x00000000ffffffff + 80004a90: 0007ba83 ld x21,0(x15) + 80004a94: 00878793 addi x15,x15,8 + +0000000080004a98 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + orn x3, x2, x21 # perform operation + 80004a98: 415161b3 orn x3,x2,x21 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004a9c: 0004b383 ld x7,0(x9) + 80004aa0: 00338c63 beq x7,x3,80004ab8 + 80004aa4: 2740346f jal x8,80007d18 + 80004aa8: 80004a98 .word 0x80004a98 + 80004aac: 00000000 .word 0x00000000 + 80004ab0: 80015c4d .word 0x80015c4d + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x0000000100000000 + 80004abc: 0007b903 ld x18,0(x15) + 80004ac0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x00000000fffffffe + 80004ac4: 0007be83 ld x29,0(x15) + 80004ac8: 00878793 addi x15,x15,8 + +0000000080004acc : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + orn x22, x18, x29 # perform operation + 80004acc: 41d96b33 orn x22,x18,x29 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad0: 0004b383 ld x7,0(x9) + 80004ad4: 01638c63 beq x7,x22,80004aec + 80004ad8: 2400346f jal x8,80007d18 + 80004adc: 80004acc .word 0x80004acc + 80004ae0: 00000000 .word 0x00000000 + 80004ae4: 80015cac .word 0x80015cac + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0000000100000000 + 80004af0: 0007bd83 ld x27,0(x15) + 80004af4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x0000000100000000 + 80004af8: 0007b883 ld x17,0(x15) + 80004afc: 00878793 addi x15,x15,8 + +0000000080004b00 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + orn x3, x27, x17 # perform operation + 80004b00: 411de1b3 orn x3,x27,x17 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b04: 0004b383 ld x7,0(x9) + 80004b08: 00338c63 beq x7,x3,80004b20 + 80004b0c: 20c0346f jal x8,80007d18 + 80004b10: 80004b00 .word 0x80004b00 + 80004b14: 00000000 .word 0x00000000 + 80004b18: 80015d0b .word 0x80015d0b + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0000000100000000 + 80004b24: 0007bf03 ld x30,0(x15) + 80004b28: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x0000000100000001 + 80004b2c: 0007bb03 ld x22,0(x15) + 80004b30: 00878793 addi x15,x15,8 + +0000000080004b34 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + orn x18, x30, x22 # perform operation + 80004b34: 416f6933 orn x18,x30,x22 + # Check if x18 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x18, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b38: 0004b383 ld x7,0(x9) + 80004b3c: 01238c63 beq x7,x18,80004b54 + 80004b40: 1d80346f jal x8,80007d18 + 80004b44: 80004b34 .word 0x80004b34 + 80004b48: 00000000 .word 0x00000000 + 80004b4c: 80015d6b .word 0x80015d6b + 80004b50: 00000000 .word 0x00000000 + 80004b54: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x0000000100000001 + 80004b58: 0007b603 ld x12,0(x15) + 80004b5c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0000000000000000 + 80004b60: 0007bc83 ld x25,0(x15) + 80004b64: 00878793 addi x15,x15,8 + +0000000080004b68 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + orn x3, x12, x25 # perform operation + 80004b68: 419661b3 orn x3,x12,x25 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b6c: 0004b383 ld x7,0(x9) + 80004b70: 00338c63 beq x7,x3,80004b88 + 80004b74: 1a40346f jal x8,80007d18 + 80004b78: 80004b68 .word 0x80004b68 + 80004b7c: 00000000 .word 0x00000000 + 80004b80: 80015dcb .word 0x80015dcb + 80004b84: 00000000 .word 0x00000000 + 80004b88: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000100000001 + 80004b8c: 0007b183 ld x3,0(x15) + 80004b90: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x0000000000000001 + 80004b94: 0007be83 ld x29,0(x15) + 80004b98: 00878793 addi x15,x15,8 + +0000000080004b9c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + orn x30, x3, x29 # perform operation + 80004b9c: 41d1ef33 orn x30,x3,x29 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba0: 0004b383 ld x7,0(x9) + 80004ba4: 01e38c63 beq x7,x30,80004bbc + 80004ba8: 1700346f jal x8,80007d18 + 80004bac: 80004b9c .word 0x80004b9c + 80004bb0: 00000000 .word 0x00000000 + 80004bb4: 80015e23 .word 0x80015e23 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0000000100000001 + 80004bc0: 0007bd83 ld x27,0(x15) + 80004bc4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x0000000000000002 + 80004bc8: 0007be83 ld x29,0(x15) + 80004bcc: 00878793 addi x15,x15,8 + +0000000080004bd0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + orn x21, x27, x29 # perform operation + 80004bd0: 41ddeab3 orn x21,x27,x29 + # Check if x21 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x21, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bd4: 0004b383 ld x7,0(x9) + 80004bd8: 01538c63 beq x7,x21,80004bf0 + 80004bdc: 13c0346f jal x8,80007d18 + 80004be0: 80004bd0 .word 0x80004bd0 + 80004be4: 00000000 .word 0x00000000 + 80004be8: 80015e7b .word 0x80015e7b + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0000000100000001 + 80004bf4: 0007b503 ld x10,0(x15) + 80004bf8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x8000000000000000 + 80004bfc: 0007b083 ld x1,0(x15) + 80004c00: 00878793 addi x15,x15,8 + +0000000080004c04 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + orn x12, x10, x1 # perform operation + 80004c04: 40156633 orn x12,x10,x1 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c08: 0004b383 ld x7,0(x9) + 80004c0c: 00c38c63 beq x7,x12,80004c24 + 80004c10: 1080346f jal x8,80007d18 + 80004c14: 80004c04 .word 0x80004c04 + 80004c18: 00000000 .word 0x00000000 + 80004c1c: 80015ed3 .word 0x80015ed3 + 80004c20: 00000000 .word 0x00000000 + 80004c24: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0000000100000001 + 80004c28: 0007b983 ld x19,0(x15) + 80004c2c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x8000000000000001 + 80004c30: 0007bb03 ld x22,0(x15) + 80004c34: 00878793 addi x15,x15,8 + +0000000080004c38 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + orn x28, x19, x22 # perform operation + 80004c38: 4169ee33 orn x28,x19,x22 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c3c: 0004b383 ld x7,0(x9) + 80004c40: 01c38c63 beq x7,x28,80004c58 + 80004c44: 0d40346f jal x8,80007d18 + 80004c48: 80004c38 .word 0x80004c38 + 80004c4c: 00000000 .word 0x00000000 + 80004c50: 80015f3a .word 0x80015f3a + 80004c54: 00000000 .word 0x00000000 + 80004c58: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x0000000100000001 + 80004c5c: 0007b083 ld x1,0(x15) + 80004c60: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x7fffffffffffffff + 80004c64: 0007b703 ld x14,0(x15) + 80004c68: 00878793 addi x15,x15,8 + +0000000080004c6c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + orn x12, x1, x14 # perform operation + 80004c6c: 40e0e633 orn x12,x1,x14 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c70: 0004b383 ld x7,0(x9) + 80004c74: 00c38c63 beq x7,x12,80004c8c + 80004c78: 0a00346f jal x8,80007d18 + 80004c7c: 80004c6c .word 0x80004c6c + 80004c80: 00000000 .word 0x00000000 + 80004c84: 80015fa1 .word 0x80015fa1 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x0000000100000001 + 80004c90: 0007ba03 ld x20,0(x15) + 80004c94: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80004c98: 0007b903 ld x18,0(x15) + 80004c9c: 00878793 addi x15,x15,8 + +0000000080004ca0 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + orn x11, x20, x18 # perform operation + 80004ca0: 412a65b3 orn x11,x20,x18 + # Check if x11 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x11, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004ca4: 0004b383 ld x7,0(x9) + 80004ca8: 00b38c63 beq x7,x11,80004cc0 + 80004cac: 06c0346f jal x8,80007d18 + 80004cb0: 80004ca0 .word 0x80004ca0 + 80004cb4: 00000000 .word 0x00000000 + 80004cb8: 80016008 .word 0x80016008 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x0000000100000001 + 80004cc4: 0007bf03 ld x30,0(x15) + 80004cc8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xffffffffffffffff + 80004ccc: 0007b883 ld x17,0(x15) + 80004cd0: 00878793 addi x15,x15,8 + +0000000080004cd4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + orn x19, x30, x17 # perform operation + 80004cd4: 411f69b3 orn x19,x30,x17 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cd8: 0004b383 ld x7,0(x9) + 80004cdc: 01338c63 beq x7,x19,80004cf4 + 80004ce0: 0380346f jal x8,80007d18 + 80004ce4: 80004cd4 .word 0x80004cd4 + 80004ce8: 00000000 .word 0x00000000 + 80004cec: 8001606f .word 0x8001606f + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000100000001 + 80004cf8: 0007b183 ld x3,0(x15) + 80004cfc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xfffffffffffffffe + 80004d00: 0007ba03 ld x20,0(x15) + 80004d04: 00878793 addi x15,x15,8 + +0000000080004d08 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + orn x2, x3, x20 # perform operation + 80004d08: 4141e133 orn x2,x3,x20 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d0c: 0004b383 ld x7,0(x9) + 80004d10: 00238c63 beq x7,x2,80004d28 + 80004d14: 0040346f jal x8,80007d18 + 80004d18: 80004d08 .word 0x80004d08 + 80004d1c: 00000000 .word 0x00000000 + 80004d20: 800160d6 .word 0x800160d6 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x0000000100000001 + 80004d2c: 0007b283 ld x5,0(x15) + 80004d30: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80004d34: 0007bc03 ld x24,0(x15) + 80004d38: 00878793 addi x15,x15,8 + +0000000080004d3c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + orn x20, x5, x24 # perform operation + 80004d3c: 4182ea33 orn x20,x5,x24 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d40: 0004b383 ld x7,0(x9) + 80004d44: 01438c63 beq x7,x20,80004d5c + 80004d48: 7d10246f jal x8,80007d18 + 80004d4c: 80004d3c .word 0x80004d3c + 80004d50: 00000000 .word 0x00000000 + 80004d54: 8001613d .word 0x8001613d + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x0000000100000001 + 80004d60: 0007b083 ld x1,0(x15) + 80004d64: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xaaaaaaaaaaaaaaaa + 80004d68: 0007bb83 ld x23,0(x15) + 80004d6c: 00878793 addi x15,x15,8 + +0000000080004d70 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + orn x3, x1, x23 # perform operation + 80004d70: 4170e1b3 orn x3,x1,x23 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d74: 0004b383 ld x7,0(x9) + 80004d78: 00338c63 beq x7,x3,80004d90 + 80004d7c: 79d0246f jal x8,80007d18 + 80004d80: 80004d70 .word 0x80004d70 + 80004d84: 00000000 .word 0x00000000 + 80004d88: 800161a4 .word 0x800161a4 + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0000000100000001 + 80004d94: 0007bc03 ld x24,0(x15) + 80004d98: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x5555555555555555 + 80004d9c: 0007bf83 ld x31,0(x15) + 80004da0: 00878793 addi x15,x15,8 + +0000000080004da4 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + orn x12, x24, x31 # perform operation + 80004da4: 41fc6633 orn x12,x24,x31 + # Check if x12 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x12, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004da8: 0004b383 ld x7,0(x9) + 80004dac: 00c38c63 beq x7,x12,80004dc4 + 80004db0: 7690246f jal x8,80007d18 + 80004db4: 80004da4 .word 0x80004da4 + 80004db8: 00000000 .word 0x00000000 + 80004dbc: 8001620b .word 0x8001620b + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0000000100000001 + 80004dc8: 0007bd83 ld x27,0(x15) + 80004dcc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x00000000ffffffff + 80004dd0: 0007b703 ld x14,0(x15) + 80004dd4: 00878793 addi x15,x15,8 + +0000000080004dd8 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + orn x6, x27, x14 # perform operation + 80004dd8: 40ede333 orn x6,x27,x14 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004ddc: 0004b383 ld x7,0(x9) + 80004de0: 00638c63 beq x7,x6,80004df8 + 80004de4: 7350246f jal x8,80007d18 + 80004de8: 80004dd8 .word 0x80004dd8 + 80004dec: 00000000 .word 0x00000000 + 80004df0: 80016272 .word 0x80016272 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0000000100000001 + 80004dfc: 0007b883 ld x17,0(x15) + 80004e00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x00000000fffffffe + 80004e04: 0007b703 ld x14,0(x15) + 80004e08: 00878793 addi x15,x15,8 + +0000000080004e0c : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + orn x13, x17, x14 # perform operation + 80004e0c: 40e8e6b3 orn x13,x17,x14 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e10: 0004b383 ld x7,0(x9) + 80004e14: 00d38c63 beq x7,x13,80004e2c + 80004e18: 7010246f jal x8,80007d18 + 80004e1c: 80004e0c .word 0x80004e0c + 80004e20: 00000000 .word 0x00000000 + 80004e24: 800162d1 .word 0x800162d1 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x0000000100000001 + 80004e30: 0007bc83 ld x25,0(x15) + 80004e34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0000000100000000 + 80004e38: 0007ba83 ld x21,0(x15) + 80004e3c: 00878793 addi x15,x15,8 + +0000000080004e40 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + orn x20, x25, x21 # perform operation + 80004e40: 415cea33 orn x20,x25,x21 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e44: 0004b383 ld x7,0(x9) + 80004e48: 01438c63 beq x7,x20,80004e60 + 80004e4c: 6cd0246f jal x8,80007d18 + 80004e50: 80004e40 .word 0x80004e40 + 80004e54: 00000000 .word 0x00000000 + 80004e58: 80016330 .word 0x80016330 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 00848493 addi x9,x9,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0000000100000001 + 80004e64: 0007b983 ld x19,0(x15) + 80004e68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x0000000100000001 + 80004e6c: 0007b203 ld x4,0(x15) + 80004e70: 00878793 addi x15,x15,8 + +0000000080004e74 : +Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + orn x22, x19, x4 # perform operation + 80004e74: 4049eb33 orn x22,x19,x4 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_orn_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e78: 0004b383 ld x7,0(x9) + 80004e7c: 01638c63 beq x7,x22,80004e94 + 80004e80: 6990246f jal x8,80007d18 + 80004e84: 80004e74 .word 0x80004e74 + 80004e88: 00000000 .word 0x00000000 + 80004e8c: 80016390 .word 0x80016390 + 80004e90: 00000000 .word 0x00000000 + 80004e94: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x5cd8bb5cb4bc1ce7 + 80004e98: 0007b003 ld x0,0(x15) + 80004e9c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x2ffa79ba25b9b769 + 80004ea0: 0007b003 ld x0,0(x15) + 80004ea4: 00878793 addi x15,x15,8 + +0000000080004ea8 : +Zbkb_orn_cg_cmp_rs1_rs2_b0: + orn x6, x0, x0 # perform operation + 80004ea8: 40006333 orn x6,x0,x0 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cmp_rs1_rs2_b0, Zbkb_orn_cg_cmp_rs1_rs2_b0_str) + 80004eac: 0004b383 ld x7,0(x9) + 80004eb0: 00638c63 beq x7,x6,80004ec8 + 80004eb4: 6650246f jal x8,80007d18 + 80004eb8: 80004ea8 .word 0x80004ea8 + 80004ebc: 00000000 .word 0x00000000 + 80004ec0: 800163f0 .word 0x800163f0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xcfd2929c55e21322 + 80004ecc: 0007b083 ld x1,0(x15) + 80004ed0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xa532b4799bb1c3a3 + 80004ed4: 0007b083 ld x1,0(x15) + 80004ed8: 00878793 addi x15,x15,8 + +0000000080004edc : +Zbkb_orn_cg_cmp_rs1_rs2_b1: + orn x20, x1, x1 # perform operation + 80004edc: 4010ea33 orn x20,x1,x1 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cmp_rs1_rs2_b1, Zbkb_orn_cg_cmp_rs1_rs2_b1_str) + 80004ee0: 0004b383 ld x7,0(x9) + 80004ee4: 01438c63 beq x7,x20,80004efc + 80004ee8: 6310246f jal x8,80007d18 + 80004eec: 80004edc .word 0x80004edc + 80004ef0: 00000000 .word 0x00000000 + 80004ef4: 80016427 .word 0x80016427 + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xa8e05d621f340b38 + 80004f00: 0007b103 ld x2,0(x15) + 80004f04: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x5aee35f8d7baac6d + 80004f08: 0007b103 ld x2,0(x15) + 80004f0c: 00878793 addi x15,x15,8 + +0000000080004f10 : +Zbkb_orn_cg_cmp_rs1_rs2_b2: + orn x22, x2, x2 # perform operation + 80004f10: 40216b33 orn x22,x2,x2 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkb_orn_cg_cmp_rs1_rs2_b2, Zbkb_orn_cg_cmp_rs1_rs2_b2_str) + 80004f14: 0004b383 ld x7,0(x9) + 80004f18: 01638c63 beq x7,x22,80004f30 + 80004f1c: 5fd0246f jal x8,80007d18 + 80004f20: 80004f10 .word 0x80004f10 + 80004f24: 00000000 .word 0x00000000 + 80004f28: 8001645e .word 0x8001645e + 80004f2c: 00000000 .word 0x00000000 + 80004f30: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x50d05e6116e894ba + 80004f34: 0007b183 ld x3,0(x15) + 80004f38: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xb74285b06ace70c0 + 80004f3c: 0007b183 ld x3,0(x15) + 80004f40: 00878793 addi x15,x15,8 + +0000000080004f44 : +Zbkb_orn_cg_cmp_rs1_rs2_b3: + orn x14, x3, x3 # perform operation + 80004f44: 4031e733 orn x14,x3,x3 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zbkb_orn_cg_cmp_rs1_rs2_b3, Zbkb_orn_cg_cmp_rs1_rs2_b3_str) + 80004f48: 0004b383 ld x7,0(x9) + 80004f4c: 00e38c63 beq x7,x14,80004f64 + 80004f50: 5c90246f jal x8,80007d18 + 80004f54: 80004f44 .word 0x80004f44 + 80004f58: 00000000 .word 0x00000000 + 80004f5c: 80016495 .word 0x80016495 + 80004f60: 00000000 .word 0x00000000 + 80004f64: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xe350163d2538f13a + 80004f68: 0007b203 ld x4,0(x15) + 80004f6c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x1da9e6921ca1420e + 80004f70: 0007b203 ld x4,0(x15) + 80004f74: 00878793 addi x15,x15,8 + +0000000080004f78 : +Zbkb_orn_cg_cmp_rs1_rs2_b4: + orn x20, x4, x4 # perform operation + 80004f78: 40426a33 orn x20,x4,x4 + # Check if x20 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x20, Zbkb_orn_cg_cmp_rs1_rs2_b4, Zbkb_orn_cg_cmp_rs1_rs2_b4_str) + 80004f7c: 0004b383 ld x7,0(x9) + 80004f80: 01438c63 beq x7,x20,80004f98 + 80004f84: 5950246f jal x8,80007d18 + 80004f88: 80004f78 .word 0x80004f78 + 80004f8c: 00000000 .word 0x00000000 + 80004f90: 800164cc .word 0x800164cc + 80004f94: 00000000 .word 0x00000000 + 80004f98: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x841e7839530de2e0 + 80004f9c: 0007b283 ld x5,0(x15) + 80004fa0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x9c3057bcc9e4a044 + 80004fa4: 0007b283 ld x5,0(x15) + 80004fa8: 00878793 addi x15,x15,8 + +0000000080004fac : +Zbkb_orn_cg_cmp_rs1_rs2_b5: + orn x16, x5, x5 # perform operation + 80004fac: 4052e833 orn x16,x5,x5 + # Check if x16 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x16, Zbkb_orn_cg_cmp_rs1_rs2_b5, Zbkb_orn_cg_cmp_rs1_rs2_b5_str) + 80004fb0: 0004b383 ld x7,0(x9) + 80004fb4: 01038c63 beq x7,x16,80004fcc + 80004fb8: 5610246f jal x8,80007d18 + 80004fbc: 80004fac .word 0x80004fac + 80004fc0: 00000000 .word 0x00000000 + 80004fc4: 80016503 .word 0x80016503 + 80004fc8: 00000000 .word 0x00000000 + 80004fcc: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x5114b76956c3ec50 + 80004fd0: 0007b303 ld x6,0(x15) + 80004fd4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xc84697fabab83435 + 80004fd8: 0007b303 ld x6,0(x15) + 80004fdc: 00878793 addi x15,x15,8 + +0000000080004fe0 : +Zbkb_orn_cg_cmp_rs1_rs2_b6: + orn x13, x6, x6 # perform operation + 80004fe0: 406366b3 orn x13,x6,x6 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkb_orn_cg_cmp_rs1_rs2_b6, Zbkb_orn_cg_cmp_rs1_rs2_b6_str) + 80004fe4: 0004b383 ld x7,0(x9) + 80004fe8: 00d38c63 beq x7,x13,80005000 + 80004fec: 52d0246f jal x8,80007d18 + 80004ff0: 80004fe0 .word 0x80004fe0 + 80004ff4: 00000000 .word 0x00000000 + 80004ff8: 8001653a .word 0x8001653a + 80004ffc: 00000000 .word 0x00000000 + 80005000: 00848493 addi x9,x9,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005004: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005008: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x2f13cc62c37fd3c0 + 8000500c: 0007b383 ld x7,0(x15) + 80005010: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x6d85e06e0c28a9c1 + 80005014: 0007b383 ld x7,0(x15) + 80005018: 00878793 addi x15,x15,8 + +000000008000501c : +Zbkb_orn_cg_cmp_rs1_rs2_b7: + orn x27, x7, x7 # perform operation + 8000501c: 4073edb3 orn x27,x7,x7 + # Check if x27 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x27, Zbkb_orn_cg_cmp_rs1_rs2_b7, Zbkb_orn_cg_cmp_rs1_rs2_b7_str) + 80005020: 0004b683 ld x13,0(x9) + 80005024: 01b68c63 beq x13,x27,8000503c + 80005028: 5190276f jal x14,80007d40 + 8000502c: 8000501c .word 0x8000501c + 80005030: 00000000 .word 0x00000000 + 80005034: 80016571 .word 0x80016571 + 80005038: 00000000 .word 0x00000000 + 8000503c: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xe8eb001b207aff40 + 80005040: 0007b403 ld x8,0(x15) + 80005044: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x70ef0a961adf5b5b + 80005048: 0007b403 ld x8,0(x15) + 8000504c: 00878793 addi x15,x15,8 + +0000000080005050 : +Zbkb_orn_cg_cmp_rs1_rs2_b8: + orn x3, x8, x8 # perform operation + 80005050: 408461b3 orn x3,x8,x8 + # Check if x3 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x3, Zbkb_orn_cg_cmp_rs1_rs2_b8, Zbkb_orn_cg_cmp_rs1_rs2_b8_str) + 80005054: 0004b683 ld x13,0(x9) + 80005058: 00368c63 beq x13,x3,80005070 + 8000505c: 4e50276f jal x14,80007d40 + 80005060: 80005050 .word 0x80005050 + 80005064: 00000000 .word 0x00000000 + 80005068: 800165a8 .word 0x800165a8 + 8000506c: 00000000 .word 0x00000000 + 80005070: 00848493 addi x9,x9,8 + + mv x1, x9 # switch signature pointer register to avoid conflict with test + 80005074: 00048093 addi x1,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xd5e60f8d7f708fc9 + 80005078: 0007b483 ld x9,0(x15) + 8000507c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x9f264fe4f15a4d96 + 80005080: 0007b483 ld x9,0(x15) + 80005084: 00878793 addi x15,x15,8 + +0000000080005088 : +Zbkb_orn_cg_cmp_rs1_rs2_b9: + orn x26, x9, x9 # perform operation + 80005088: 4094ed33 orn x26,x9,x9 + # Check if x26 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x26, Zbkb_orn_cg_cmp_rs1_rs2_b9, Zbkb_orn_cg_cmp_rs1_rs2_b9_str) + 8000508c: 0000b683 ld x13,0(x1) + 80005090: 01a68c63 beq x13,x26,800050a8 + 80005094: 4ad0276f jal x14,80007d40 + 80005098: 80005088 .word 0x80005088 + 8000509c: 00000000 .word 0x00000000 + 800050a0: 800165df .word 0x800165df + 800050a4: 00000000 .word 0x00000000 + 800050a8: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x72b3af05dea41509 + 800050ac: 0007b503 ld x10,0(x15) + 800050b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xb532e0712703500c + 800050b4: 0007b503 ld x10,0(x15) + 800050b8: 00878793 addi x15,x15,8 + +00000000800050bc : +Zbkb_orn_cg_cmp_rs1_rs2_b10: + orn x24, x10, x10 # perform operation + 800050bc: 40a56c33 orn x24,x10,x10 + # Check if x24 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x24, Zbkb_orn_cg_cmp_rs1_rs2_b10, Zbkb_orn_cg_cmp_rs1_rs2_b10_str) + 800050c0: 0000b683 ld x13,0(x1) + 800050c4: 01868c63 beq x13,x24,800050dc + 800050c8: 4790276f jal x14,80007d40 + 800050cc: 800050bc .word 0x800050bc + 800050d0: 00000000 .word 0x00000000 + 800050d4: 80016616 .word 0x80016616 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x45ae08d8b60ac6f1 + 800050e0: 0007b583 ld x11,0(x15) + 800050e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x0311f4aa521ff69c + 800050e8: 0007b583 ld x11,0(x15) + 800050ec: 00878793 addi x15,x15,8 + +00000000800050f0 : +Zbkb_orn_cg_cmp_rs1_rs2_b11: + orn x2, x11, x11 # perform operation + 800050f0: 40b5e133 orn x2,x11,x11 + # Check if x2 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x2, Zbkb_orn_cg_cmp_rs1_rs2_b11, Zbkb_orn_cg_cmp_rs1_rs2_b11_str) + 800050f4: 0000b683 ld x13,0(x1) + 800050f8: 00268c63 beq x13,x2,80005110 + 800050fc: 4450276f jal x14,80007d40 + 80005100: 800050f0 .word 0x800050f0 + 80005104: 00000000 .word 0x00000000 + 80005108: 8001664e .word 0x8001664e + 8000510c: 00000000 .word 0x00000000 + 80005110: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x7e3791f6fd9ab00b + 80005114: 0007b603 ld x12,0(x15) + 80005118: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x1ff1161ffb365c95 + 8000511c: 0007b603 ld x12,0(x15) + 80005120: 00878793 addi x15,x15,8 + +0000000080005124 : +Zbkb_orn_cg_cmp_rs1_rs2_b12: + orn x0, x12, x12 # perform operation + 80005124: 40c66033 orn x0,x12,x12 + # Check if x0 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x0, Zbkb_orn_cg_cmp_rs1_rs2_b12, Zbkb_orn_cg_cmp_rs1_rs2_b12_str) + 80005128: 0000b683 ld x13,0(x1) + 8000512c: 00068c63 beq x13,x0,80005144 + 80005130: 4110276f jal x14,80007d40 + 80005134: 80005124 .word 0x80005124 + 80005138: 00000000 .word 0x00000000 + 8000513c: 80016686 .word 0x80016686 + 80005140: 00000000 .word 0x00000000 + 80005144: 00808093 addi x1,x1,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005148: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000514c: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xa1856958f58799c1 + 80005150: 0007b683 ld x13,0(x15) + 80005154: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xb53e75facebbfdc3 + 80005158: 0007b683 ld x13,0(x15) + 8000515c: 00878793 addi x15,x15,8 + +0000000080005160 : +Zbkb_orn_cg_cmp_rs1_rs2_b13: + orn x23, x13, x13 # perform operation + 80005160: 40d6ebb3 orn x23,x13,x13 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_orn_cg_cmp_rs1_rs2_b13, Zbkb_orn_cg_cmp_rs1_rs2_b13_str) + 80005164: 0000b203 ld x4,0(x1) + 80005168: 01720c63 beq x4,x23,80005180 + 8000516c: 395022ef jal x5,80007d00 + 80005170: 80005160 .word 0x80005160 + 80005174: 00000000 .word 0x00000000 + 80005178: 800166be .word 0x800166be + 8000517c: 00000000 .word 0x00000000 + 80005180: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xbd720bea5550c073 + 80005184: 0007b703 ld x14,0(x15) + 80005188: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xd2f54e8047716b1e + 8000518c: 0007b703 ld x14,0(x15) + 80005190: 00878793 addi x15,x15,8 + +0000000080005194 : +Zbkb_orn_cg_cmp_rs1_rs2_b14: + orn x30, x14, x14 # perform operation + 80005194: 40e76f33 orn x30,x14,x14 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_orn_cg_cmp_rs1_rs2_b14, Zbkb_orn_cg_cmp_rs1_rs2_b14_str) + 80005198: 0000b203 ld x4,0(x1) + 8000519c: 01e20c63 beq x4,x30,800051b4 + 800051a0: 361022ef jal x5,80007d00 + 800051a4: 80005194 .word 0x80005194 + 800051a8: 00000000 .word 0x00000000 + 800051ac: 800166f6 .word 0x800166f6 + 800051b0: 00000000 .word 0x00000000 + 800051b4: 00808093 addi x1,x1,8 + + mv x20, x15 # switch data pointer register to avoid conflict with test + 800051b8: 00078a13 addi x20,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x8be13139c29891cb + 800051bc: 000a3783 ld x15,0(x20) + 800051c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x7f781740de96f717 + 800051c4: 000a3783 ld x15,0(x20) + 800051c8: 008a0a13 addi x20,x20,8 + +00000000800051cc : +Zbkb_orn_cg_cmp_rs1_rs2_b15: + orn x24, x15, x15 # perform operation + 800051cc: 40f7ec33 orn x24,x15,x15 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_orn_cg_cmp_rs1_rs2_b15, Zbkb_orn_cg_cmp_rs1_rs2_b15_str) + 800051d0: 0000b203 ld x4,0(x1) + 800051d4: 01820c63 beq x4,x24,800051ec + 800051d8: 329022ef jal x5,80007d00 + 800051dc: 800051cc .word 0x800051cc + 800051e0: 00000000 .word 0x00000000 + 800051e4: 8001672e .word 0x8001672e + 800051e8: 00000000 .word 0x00000000 + 800051ec: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x886b3f6bffbc77e2 + 800051f0: 000a3803 ld x16,0(x20) + 800051f4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xe6865228777eb50a + 800051f8: 000a3803 ld x16,0(x20) + 800051fc: 008a0a13 addi x20,x20,8 + +0000000080005200 : +Zbkb_orn_cg_cmp_rs1_rs2_b16: + orn x24, x16, x16 # perform operation + 80005200: 41086c33 orn x24,x16,x16 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_orn_cg_cmp_rs1_rs2_b16, Zbkb_orn_cg_cmp_rs1_rs2_b16_str) + 80005204: 0000b203 ld x4,0(x1) + 80005208: 01820c63 beq x4,x24,80005220 + 8000520c: 2f5022ef jal x5,80007d00 + 80005210: 80005200 .word 0x80005200 + 80005214: 00000000 .word 0x00000000 + 80005218: 80016766 .word 0x80016766 + 8000521c: 00000000 .word 0x00000000 + 80005220: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xff6420791e4f8835 + 80005224: 000a3883 ld x17,0(x20) + 80005228: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x696ba14fadef9f57 + 8000522c: 000a3883 ld x17,0(x20) + 80005230: 008a0a13 addi x20,x20,8 + +0000000080005234 : +Zbkb_orn_cg_cmp_rs1_rs2_b17: + orn x19, x17, x17 # perform operation + 80005234: 4118e9b3 orn x19,x17,x17 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_orn_cg_cmp_rs1_rs2_b17, Zbkb_orn_cg_cmp_rs1_rs2_b17_str) + 80005238: 0000b203 ld x4,0(x1) + 8000523c: 01320c63 beq x4,x19,80005254 + 80005240: 2c1022ef jal x5,80007d00 + 80005244: 80005234 .word 0x80005234 + 80005248: 00000000 .word 0x00000000 + 8000524c: 8001679e .word 0x8001679e + 80005250: 00000000 .word 0x00000000 + 80005254: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x71b215dec1a405e3 + 80005258: 000a3903 ld x18,0(x20) + 8000525c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x57540adc7f38e08f + 80005260: 000a3903 ld x18,0(x20) + 80005264: 008a0a13 addi x20,x20,8 + +0000000080005268 : +Zbkb_orn_cg_cmp_rs1_rs2_b18: + orn x8, x18, x18 # perform operation + 80005268: 41296433 orn x8,x18,x18 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_orn_cg_cmp_rs1_rs2_b18, Zbkb_orn_cg_cmp_rs1_rs2_b18_str) + 8000526c: 0000b203 ld x4,0(x1) + 80005270: 00820c63 beq x4,x8,80005288 + 80005274: 28d022ef jal x5,80007d00 + 80005278: 80005268 .word 0x80005268 + 8000527c: 00000000 .word 0x00000000 + 80005280: 800167d6 .word 0x800167d6 + 80005284: 00000000 .word 0x00000000 + 80005288: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x4029f77018bf782f + 8000528c: 000a3983 ld x19,0(x20) + 80005290: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x4754cfba6eef1e22 + 80005294: 000a3983 ld x19,0(x20) + 80005298: 008a0a13 addi x20,x20,8 + +000000008000529c : +Zbkb_orn_cg_cmp_rs1_rs2_b19: + orn x27, x19, x19 # perform operation + 8000529c: 4139edb3 orn x27,x19,x19 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_orn_cg_cmp_rs1_rs2_b19, Zbkb_orn_cg_cmp_rs1_rs2_b19_str) + 800052a0: 0000b203 ld x4,0(x1) + 800052a4: 01b20c63 beq x4,x27,800052bc + 800052a8: 259022ef jal x5,80007d00 + 800052ac: 8000529c .word 0x8000529c + 800052b0: 00000000 .word 0x00000000 + 800052b4: 8001680e .word 0x8001680e + 800052b8: 00000000 .word 0x00000000 + 800052bc: 00808093 addi x1,x1,8 + + mv x2, x20 # switch data pointer register to avoid conflict with test + 800052c0: 000a0113 addi x2,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xcaa204acb6790c15 + 800052c4: 00013a03 ld x20,0(x2) + 800052c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x25a7eba2133f6bca + 800052cc: 00013a03 ld x20,0(x2) + 800052d0: 00810113 addi x2,x2,8 + +00000000800052d4 : +Zbkb_orn_cg_cmp_rs1_rs2_b20: + orn x17, x20, x20 # perform operation + 800052d4: 414a68b3 orn x17,x20,x20 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_orn_cg_cmp_rs1_rs2_b20, Zbkb_orn_cg_cmp_rs1_rs2_b20_str) + 800052d8: 0000b203 ld x4,0(x1) + 800052dc: 01120c63 beq x4,x17,800052f4 + 800052e0: 221022ef jal x5,80007d00 + 800052e4: 800052d4 .word 0x800052d4 + 800052e8: 00000000 .word 0x00000000 + 800052ec: 80016846 .word 0x80016846 + 800052f0: 00000000 .word 0x00000000 + 800052f4: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x1dc18c55b3b938cf + 800052f8: 00013a83 ld x21,0(x2) + 800052fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xb6aaaf67236bc160 + 80005300: 00013a83 ld x21,0(x2) + 80005304: 00810113 addi x2,x2,8 + +0000000080005308 : +Zbkb_orn_cg_cmp_rs1_rs2_b21: + orn x3, x21, x21 # perform operation + 80005308: 415ae1b3 orn x3,x21,x21 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_orn_cg_cmp_rs1_rs2_b21, Zbkb_orn_cg_cmp_rs1_rs2_b21_str) + 8000530c: 0000b203 ld x4,0(x1) + 80005310: 00320c63 beq x4,x3,80005328 + 80005314: 1ed022ef jal x5,80007d00 + 80005318: 80005308 .word 0x80005308 + 8000531c: 00000000 .word 0x00000000 + 80005320: 8001687e .word 0x8001687e + 80005324: 00000000 .word 0x00000000 + 80005328: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x58a2e8c21bdd4514 + 8000532c: 00013b03 ld x22,0(x2) + 80005330: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x30db5faf0a33b257 + 80005334: 00013b03 ld x22,0(x2) + 80005338: 00810113 addi x2,x2,8 + +000000008000533c : +Zbkb_orn_cg_cmp_rs1_rs2_b22: + orn x27, x22, x22 # perform operation + 8000533c: 416b6db3 orn x27,x22,x22 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_orn_cg_cmp_rs1_rs2_b22, Zbkb_orn_cg_cmp_rs1_rs2_b22_str) + 80005340: 0000b203 ld x4,0(x1) + 80005344: 01b20c63 beq x4,x27,8000535c + 80005348: 1b9022ef jal x5,80007d00 + 8000534c: 8000533c .word 0x8000533c + 80005350: 00000000 .word 0x00000000 + 80005354: 800168b6 .word 0x800168b6 + 80005358: 00000000 .word 0x00000000 + 8000535c: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x28e99f8a0b6eaede + 80005360: 00013b83 ld x23,0(x2) + 80005364: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x80078ebf06c22483 + 80005368: 00013b83 ld x23,0(x2) + 8000536c: 00810113 addi x2,x2,8 + +0000000080005370 : +Zbkb_orn_cg_cmp_rs1_rs2_b23: + orn x8, x23, x23 # perform operation + 80005370: 417be433 orn x8,x23,x23 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_orn_cg_cmp_rs1_rs2_b23, Zbkb_orn_cg_cmp_rs1_rs2_b23_str) + 80005374: 0000b203 ld x4,0(x1) + 80005378: 00820c63 beq x4,x8,80005390 + 8000537c: 185022ef jal x5,80007d00 + 80005380: 80005370 .word 0x80005370 + 80005384: 00000000 .word 0x00000000 + 80005388: 800168ee .word 0x800168ee + 8000538c: 00000000 .word 0x00000000 + 80005390: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x3357a0258fcdbd35 + 80005394: 00013c03 ld x24,0(x2) + 80005398: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x364fb86fe1ed5d94 + 8000539c: 00013c03 ld x24,0(x2) + 800053a0: 00810113 addi x2,x2,8 + +00000000800053a4 : +Zbkb_orn_cg_cmp_rs1_rs2_b24: + orn x20, x24, x24 # perform operation + 800053a4: 418c6a33 orn x20,x24,x24 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_orn_cg_cmp_rs1_rs2_b24, Zbkb_orn_cg_cmp_rs1_rs2_b24_str) + 800053a8: 0000b203 ld x4,0(x1) + 800053ac: 01420c63 beq x4,x20,800053c4 + 800053b0: 151022ef jal x5,80007d00 + 800053b4: 800053a4 .word 0x800053a4 + 800053b8: 00000000 .word 0x00000000 + 800053bc: 80016926 .word 0x80016926 + 800053c0: 00000000 .word 0x00000000 + 800053c4: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xcf1daa98cc72859b + 800053c8: 00013c83 ld x25,0(x2) + 800053cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xa0c8449b9ee3f9b5 + 800053d0: 00013c83 ld x25,0(x2) + 800053d4: 00810113 addi x2,x2,8 + +00000000800053d8 : +Zbkb_orn_cg_cmp_rs1_rs2_b25: + orn x28, x25, x25 # perform operation + 800053d8: 419cee33 orn x28,x25,x25 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_orn_cg_cmp_rs1_rs2_b25, Zbkb_orn_cg_cmp_rs1_rs2_b25_str) + 800053dc: 0000b203 ld x4,0(x1) + 800053e0: 01c20c63 beq x4,x28,800053f8 + 800053e4: 11d022ef jal x5,80007d00 + 800053e8: 800053d8 .word 0x800053d8 + 800053ec: 00000000 .word 0x00000000 + 800053f0: 8001695e .word 0x8001695e + 800053f4: 00000000 .word 0x00000000 + 800053f8: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xfb57e9ae334b5517 + 800053fc: 00013d03 ld x26,0(x2) + 80005400: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xa2af51067f8737da + 80005404: 00013d03 ld x26,0(x2) + 80005408: 00810113 addi x2,x2,8 + +000000008000540c : +Zbkb_orn_cg_cmp_rs1_rs2_b26: + orn x27, x26, x26 # perform operation + 8000540c: 41ad6db3 orn x27,x26,x26 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_orn_cg_cmp_rs1_rs2_b26, Zbkb_orn_cg_cmp_rs1_rs2_b26_str) + 80005410: 0000b203 ld x4,0(x1) + 80005414: 01b20c63 beq x4,x27,8000542c + 80005418: 0e9022ef jal x5,80007d00 + 8000541c: 8000540c .word 0x8000540c + 80005420: 00000000 .word 0x00000000 + 80005424: 80016996 .word 0x80016996 + 80005428: 00000000 .word 0x00000000 + 8000542c: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x3a70729c003469a9 + 80005430: 00013d83 ld x27,0(x2) + 80005434: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x6dee0d599f8bc9af + 80005438: 00013d83 ld x27,0(x2) + 8000543c: 00810113 addi x2,x2,8 + +0000000080005440 : +Zbkb_orn_cg_cmp_rs1_rs2_b27: + orn x19, x27, x27 # perform operation + 80005440: 41bde9b3 orn x19,x27,x27 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_orn_cg_cmp_rs1_rs2_b27, Zbkb_orn_cg_cmp_rs1_rs2_b27_str) + 80005444: 0000b203 ld x4,0(x1) + 80005448: 01320c63 beq x4,x19,80005460 + 8000544c: 0b5022ef jal x5,80007d00 + 80005450: 80005440 .word 0x80005440 + 80005454: 00000000 .word 0x00000000 + 80005458: 800169ce .word 0x800169ce + 8000545c: 00000000 .word 0x00000000 + 80005460: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xd0c0546dfed6a45a + 80005464: 00013e03 ld x28,0(x2) + 80005468: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xd5424429567791e0 + 8000546c: 00013e03 ld x28,0(x2) + 80005470: 00810113 addi x2,x2,8 + +0000000080005474 : +Zbkb_orn_cg_cmp_rs1_rs2_b28: + orn x9, x28, x28 # perform operation + 80005474: 41ce64b3 orn x9,x28,x28 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_orn_cg_cmp_rs1_rs2_b28, Zbkb_orn_cg_cmp_rs1_rs2_b28_str) + 80005478: 0000b203 ld x4,0(x1) + 8000547c: 00920c63 beq x4,x9,80005494 + 80005480: 081022ef jal x5,80007d00 + 80005484: 80005474 .word 0x80005474 + 80005488: 00000000 .word 0x00000000 + 8000548c: 80016a06 .word 0x80016a06 + 80005490: 00000000 .word 0x00000000 + 80005494: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x6e83e61cf8128c14 + 80005498: 00013e83 ld x29,0(x2) + 8000549c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xcb1a1b07f367752b + 800054a0: 00013e83 ld x29,0(x2) + 800054a4: 00810113 addi x2,x2,8 + +00000000800054a8 : +Zbkb_orn_cg_cmp_rs1_rs2_b29: + orn x18, x29, x29 # perform operation + 800054a8: 41dee933 orn x18,x29,x29 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_orn_cg_cmp_rs1_rs2_b29, Zbkb_orn_cg_cmp_rs1_rs2_b29_str) + 800054ac: 0000b203 ld x4,0(x1) + 800054b0: 01220c63 beq x4,x18,800054c8 + 800054b4: 04d022ef jal x5,80007d00 + 800054b8: 800054a8 .word 0x800054a8 + 800054bc: 00000000 .word 0x00000000 + 800054c0: 80016a3e .word 0x80016a3e + 800054c4: 00000000 .word 0x00000000 + 800054c8: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x82466543e845af22 + 800054cc: 00013f03 ld x30,0(x2) + 800054d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xc106694aca736c56 + 800054d4: 00013f03 ld x30,0(x2) + 800054d8: 00810113 addi x2,x2,8 + +00000000800054dc : +Zbkb_orn_cg_cmp_rs1_rs2_b30: + orn x21, x30, x30 # perform operation + 800054dc: 41ef6ab3 orn x21,x30,x30 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_orn_cg_cmp_rs1_rs2_b30, Zbkb_orn_cg_cmp_rs1_rs2_b30_str) + 800054e0: 0000b203 ld x4,0(x1) + 800054e4: 01520c63 beq x4,x21,800054fc + 800054e8: 019022ef jal x5,80007d00 + 800054ec: 800054dc .word 0x800054dc + 800054f0: 00000000 .word 0x00000000 + 800054f4: 80016a76 .word 0x80016a76 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xb51c1ec911c4bd16 + 80005500: 00013f83 ld x31,0(x2) + 80005504: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x9ed2435b4914aa81 + 80005508: 00013f83 ld x31,0(x2) + 8000550c: 00810113 addi x2,x2,8 + +0000000080005510 : +Zbkb_orn_cg_cmp_rs1_rs2_b31: + orn x20, x31, x31 # perform operation + 80005510: 41ffea33 orn x20,x31,x31 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_orn_cg_cmp_rs1_rs2_b31, Zbkb_orn_cg_cmp_rs1_rs2_b31_str) + 80005514: 0000b203 ld x4,0(x1) + 80005518: 01420c63 beq x4,x20,80005530 + 8000551c: 7e4022ef jal x5,80007d00 + 80005520: 80005510 .word 0x80005510 + 80005524: 00000000 .word 0x00000000 + 80005528: 80016aae .word 0x80016aae + 8000552c: 00000000 .word 0x00000000 + 80005530: 00808093 addi x1,x1,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x82829167ba505e1b + 80005534: 00013003 ld x0,0(x2) + 80005538: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x9fcc9d6150ec05e8 + 8000553c: 00013a03 ld x20,0(x2) + 80005540: 00810113 addi x2,x2,8 + +0000000080005544 : +Zbkb_orn_cg_cmp_rd_rs1_b0: + orn x0, x0, x20 # perform operation + 80005544: 41406033 orn x0,x0,x20 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zbkb_orn_cg_cmp_rd_rs1_b0, Zbkb_orn_cg_cmp_rd_rs1_b0_str) + 80005548: 0000b203 ld x4,0(x1) + 8000554c: 00020c63 beq x4,x0,80005564 + 80005550: 7b0022ef jal x5,80007d00 + 80005554: 80005544 .word 0x80005544 + 80005558: 00000000 .word 0x00000000 + 8000555c: 80016ae6 .word 0x80016ae6 + 80005560: 00000000 .word 0x00000000 + 80005564: 00808093 addi x1,x1,8 + + mv x25, x1 # switch signature pointer register to avoid conflict with test + 80005568: 00008c93 addi x25,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x759968b08f78e495 + 8000556c: 00013083 ld x1,0(x2) + 80005570: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x90ffbabdd5d60e96 + 80005574: 00013f03 ld x30,0(x2) + 80005578: 00810113 addi x2,x2,8 + +000000008000557c : +Zbkb_orn_cg_cmp_rd_rs1_b1: + orn x1, x1, x30 # perform operation + 8000557c: 41e0e0b3 orn x1,x1,x30 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_orn_cg_cmp_rd_rs1_b1, Zbkb_orn_cg_cmp_rd_rs1_b1_str) + 80005580: 000cb203 ld x4,0(x25) + 80005584: 00120c63 beq x4,x1,8000559c + 80005588: 778022ef jal x5,80007d00 + 8000558c: 8000557c .word 0x8000557c + 80005590: 00000000 .word 0x00000000 + 80005594: 80016b1c .word 0x80016b1c + 80005598: 00000000 .word 0x00000000 + 8000559c: 008c8c93 addi x25,x25,8 + + mv x12, x2 # switch data pointer register to avoid conflict with test + 800055a0: 00010613 addi x12,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xc4ec9e14a30a3b48 + 800055a4: 00063103 ld x2,0(x12) + 800055a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x6bbe1569627475ab + 800055ac: 00063a03 ld x20,0(x12) + 800055b0: 00860613 addi x12,x12,8 + +00000000800055b4 : +Zbkb_orn_cg_cmp_rd_rs1_b2: + orn x2, x2, x20 # perform operation + 800055b4: 41416133 orn x2,x2,x20 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_orn_cg_cmp_rd_rs1_b2, Zbkb_orn_cg_cmp_rd_rs1_b2_str) + 800055b8: 000cb203 ld x4,0(x25) + 800055bc: 00220c63 beq x4,x2,800055d4 + 800055c0: 740022ef jal x5,80007d00 + 800055c4: 800055b4 .word 0x800055b4 + 800055c8: 00000000 .word 0x00000000 + 800055cc: 80016b52 .word 0x80016b52 + 800055d0: 00000000 .word 0x00000000 + 800055d4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x61c752beec7fb895 + 800055d8: 00063183 ld x3,0(x12) + 800055dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xb1550a3348d14849 + 800055e0: 00063803 ld x16,0(x12) + 800055e4: 00860613 addi x12,x12,8 + +00000000800055e8 : +Zbkb_orn_cg_cmp_rd_rs1_b3: + orn x3, x3, x16 # perform operation + 800055e8: 4101e1b3 orn x3,x3,x16 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_orn_cg_cmp_rd_rs1_b3, Zbkb_orn_cg_cmp_rd_rs1_b3_str) + 800055ec: 000cb203 ld x4,0(x25) + 800055f0: 00320c63 beq x4,x3,80005608 + 800055f4: 70c022ef jal x5,80007d00 + 800055f8: 800055e8 .word 0x800055e8 + 800055fc: 00000000 .word 0x00000000 + 80005600: 80016b88 .word 0x80016b88 + 80005604: 00000000 .word 0x00000000 + 80005608: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 8000560c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005610: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xa9554b01a876ad77 + 80005614: 00063203 ld x4,0(x12) + 80005618: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x696225e9fb3e3410 + 8000561c: 00063b03 ld x22,0(x12) + 80005620: 00860613 addi x12,x12,8 + +0000000080005624 : +Zbkb_orn_cg_cmp_rd_rs1_b4: + orn x4, x4, x22 # perform operation + 80005624: 41626233 orn x4,x4,x22 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zbkb_orn_cg_cmp_rd_rs1_b4, Zbkb_orn_cg_cmp_rd_rs1_b4_str) + 80005628: 000cb383 ld x7,0(x25) + 8000562c: 00438c63 beq x7,x4,80005644 + 80005630: 6e80246f jal x8,80007d18 + 80005634: 80005624 .word 0x80005624 + 80005638: 00000000 .word 0x00000000 + 8000563c: 80016bbe .word 0x80016bbe + 80005640: 00000000 .word 0x00000000 + 80005644: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x9f5c7e1e521d65bd + 80005648: 00063283 ld x5,0(x12) + 8000564c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x89cbcf77e5bf6898 + 80005650: 00063803 ld x16,0(x12) + 80005654: 00860613 addi x12,x12,8 + +0000000080005658 : +Zbkb_orn_cg_cmp_rd_rs1_b5: + orn x5, x5, x16 # perform operation + 80005658: 4102e2b3 orn x5,x5,x16 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zbkb_orn_cg_cmp_rd_rs1_b5, Zbkb_orn_cg_cmp_rd_rs1_b5_str) + 8000565c: 000cb383 ld x7,0(x25) + 80005660: 00538c63 beq x7,x5,80005678 + 80005664: 6b40246f jal x8,80007d18 + 80005668: 80005658 .word 0x80005658 + 8000566c: 00000000 .word 0x00000000 + 80005670: 80016bf4 .word 0x80016bf4 + 80005674: 00000000 .word 0x00000000 + 80005678: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x57bc18bf2441a48a + 8000567c: 00063303 ld x6,0(x12) + 80005680: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x80ce81e39f966cb8 + 80005684: 00063003 ld x0,0(x12) + 80005688: 00860613 addi x12,x12,8 + +000000008000568c : +Zbkb_orn_cg_cmp_rd_rs1_b6: + orn x6, x6, x0 # perform operation + 8000568c: 40036333 orn x6,x6,x0 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zbkb_orn_cg_cmp_rd_rs1_b6, Zbkb_orn_cg_cmp_rd_rs1_b6_str) + 80005690: 000cb383 ld x7,0(x25) + 80005694: 00638c63 beq x7,x6,800056ac + 80005698: 6800246f jal x8,80007d18 + 8000569c: 8000568c .word 0x8000568c + 800056a0: 00000000 .word 0x00000000 + 800056a4: 80016c2a .word 0x80016c2a + 800056a8: 00000000 .word 0x00000000 + 800056ac: 008c8c93 addi x25,x25,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056b0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056b4: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x63b3c4613f75d193 + 800056b8: 00063383 ld x7,0(x12) + 800056bc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xe7fe8582b2c9ad83 + 800056c0: 00063483 ld x9,0(x12) + 800056c4: 00860613 addi x12,x12,8 + +00000000800056c8 : +Zbkb_orn_cg_cmp_rd_rs1_b7: + orn x7, x7, x9 # perform operation + 800056c8: 4093e3b3 orn x7,x7,x9 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs1_b7, Zbkb_orn_cg_cmp_rd_rs1_b7_str) + 800056cc: 000cb683 ld x13,0(x25) + 800056d0: 00768c63 beq x13,x7,800056e8 + 800056d4: 66c0276f jal x14,80007d40 + 800056d8: 800056c8 .word 0x800056c8 + 800056dc: 00000000 .word 0x00000000 + 800056e0: 80016c60 .word 0x80016c60 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x00adb071f343077f + 800056ec: 00063403 ld x8,0(x12) + 800056f0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x8a7f607d935c914a + 800056f4: 00063303 ld x6,0(x12) + 800056f8: 00860613 addi x12,x12,8 + +00000000800056fc : +Zbkb_orn_cg_cmp_rd_rs1_b8: + orn x8, x8, x6 # perform operation + 800056fc: 40646433 orn x8,x8,x6 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs1_b8, Zbkb_orn_cg_cmp_rd_rs1_b8_str) + 80005700: 000cb683 ld x13,0(x25) + 80005704: 00868c63 beq x13,x8,8000571c + 80005708: 6380276f jal x14,80007d40 + 8000570c: 800056fc .word 0x800056fc + 80005710: 00000000 .word 0x00000000 + 80005714: 80016c96 .word 0x80016c96 + 80005718: 00000000 .word 0x00000000 + 8000571c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x37535685eeb22d33 + 80005720: 00063483 ld x9,0(x12) + 80005724: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x9f5f0611153de18f + 80005728: 00063303 ld x6,0(x12) + 8000572c: 00860613 addi x12,x12,8 + +0000000080005730 : +Zbkb_orn_cg_cmp_rd_rs1_b9: + orn x9, x9, x6 # perform operation + 80005730: 4064e4b3 orn x9,x9,x6 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs1_b9, Zbkb_orn_cg_cmp_rd_rs1_b9_str) + 80005734: 000cb683 ld x13,0(x25) + 80005738: 00968c63 beq x13,x9,80005750 + 8000573c: 6040276f jal x14,80007d40 + 80005740: 80005730 .word 0x80005730 + 80005744: 00000000 .word 0x00000000 + 80005748: 80016ccc .word 0x80016ccc + 8000574c: 00000000 .word 0x00000000 + 80005750: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xa707c2d76a081ffe + 80005754: 00063503 ld x10,0(x12) + 80005758: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xcf789d2c3e387133 + 8000575c: 00063a83 ld x21,0(x12) + 80005760: 00860613 addi x12,x12,8 + +0000000080005764 : +Zbkb_orn_cg_cmp_rd_rs1_b10: + orn x10, x10, x21 # perform operation + 80005764: 41556533 orn x10,x10,x21 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs1_b10, Zbkb_orn_cg_cmp_rd_rs1_b10_str) + 80005768: 000cb683 ld x13,0(x25) + 8000576c: 00a68c63 beq x13,x10,80005784 + 80005770: 5d00276f jal x14,80007d40 + 80005774: 80005764 .word 0x80005764 + 80005778: 00000000 .word 0x00000000 + 8000577c: 80016d02 .word 0x80016d02 + 80005780: 00000000 .word 0x00000000 + 80005784: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x844d203d4248d090 + 80005788: 00063583 ld x11,0(x12) + 8000578c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x38611e666011d008 + 80005790: 00063383 ld x7,0(x12) + 80005794: 00860613 addi x12,x12,8 + +0000000080005798 : +Zbkb_orn_cg_cmp_rd_rs1_b11: + orn x11, x11, x7 # perform operation + 80005798: 4075e5b3 orn x11,x11,x7 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs1_b11, Zbkb_orn_cg_cmp_rd_rs1_b11_str) + 8000579c: 000cb683 ld x13,0(x25) + 800057a0: 00b68c63 beq x13,x11,800057b8 + 800057a4: 59c0276f jal x14,80007d40 + 800057a8: 80005798 .word 0x80005798 + 800057ac: 00000000 .word 0x00000000 + 800057b0: 80016d39 .word 0x80016d39 + 800057b4: 00000000 .word 0x00000000 + 800057b8: 008c8c93 addi x25,x25,8 + + mv x17, x12 # switch data pointer register to avoid conflict with test + 800057bc: 00060893 addi x17,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xa08dfaeb9599d040 + 800057c0: 0008b603 ld x12,0(x17) + 800057c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xaf0584291feacd29 + 800057c8: 0008b383 ld x7,0(x17) + 800057cc: 00888893 addi x17,x17,8 + +00000000800057d0 : +Zbkb_orn_cg_cmp_rd_rs1_b12: + orn x12, x12, x7 # perform operation + 800057d0: 40766633 orn x12,x12,x7 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs1_b12, Zbkb_orn_cg_cmp_rd_rs1_b12_str) + 800057d4: 000cb683 ld x13,0(x25) + 800057d8: 00c68c63 beq x13,x12,800057f0 + 800057dc: 5640276f jal x14,80007d40 + 800057e0: 800057d0 .word 0x800057d0 + 800057e4: 00000000 .word 0x00000000 + 800057e8: 80016d70 .word 0x80016d70 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 008c8c93 addi x25,x25,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800057f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800057f8: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x223a1fc19aabcf2d + 800057fc: 0008b683 ld x13,0(x17) + 80005800: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x35f156a3567362f8 + 80005804: 0008bd83 ld x27,0(x17) + 80005808: 00888893 addi x17,x17,8 + +000000008000580c : +Zbkb_orn_cg_cmp_rd_rs1_b13: + orn x13, x13, x27 # perform operation + 8000580c: 41b6e6b3 orn x13,x13,x27 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_orn_cg_cmp_rd_rs1_b13, Zbkb_orn_cg_cmp_rd_rs1_b13_str) + 80005810: 000cb203 ld x4,0(x25) + 80005814: 00d20c63 beq x4,x13,8000582c + 80005818: 4e8022ef jal x5,80007d00 + 8000581c: 8000580c .word 0x8000580c + 80005820: 00000000 .word 0x00000000 + 80005824: 80016da7 .word 0x80016da7 + 80005828: 00000000 .word 0x00000000 + 8000582c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xf25b1458f88534c4 + 80005830: 0008b703 ld x14,0(x17) + 80005834: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xe4560b2e9d18797f + 80005838: 0008b583 ld x11,0(x17) + 8000583c: 00888893 addi x17,x17,8 + +0000000080005840 : +Zbkb_orn_cg_cmp_rd_rs1_b14: + orn x14, x14, x11 # perform operation + 80005840: 40b76733 orn x14,x14,x11 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_orn_cg_cmp_rd_rs1_b14, Zbkb_orn_cg_cmp_rd_rs1_b14_str) + 80005844: 000cb203 ld x4,0(x25) + 80005848: 00e20c63 beq x4,x14,80005860 + 8000584c: 4b4022ef jal x5,80007d00 + 80005850: 80005840 .word 0x80005840 + 80005854: 00000000 .word 0x00000000 + 80005858: 80016dde .word 0x80016dde + 8000585c: 00000000 .word 0x00000000 + 80005860: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xb0dfd416ef85636f + 80005864: 0008b783 ld x15,0(x17) + 80005868: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xd92f00417aef4a67 + 8000586c: 0008b303 ld x6,0(x17) + 80005870: 00888893 addi x17,x17,8 + +0000000080005874 : +Zbkb_orn_cg_cmp_rd_rs1_b15: + orn x15, x15, x6 # perform operation + 80005874: 4067e7b3 orn x15,x15,x6 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkb_orn_cg_cmp_rd_rs1_b15, Zbkb_orn_cg_cmp_rd_rs1_b15_str) + 80005878: 000cb203 ld x4,0(x25) + 8000587c: 00f20c63 beq x4,x15,80005894 + 80005880: 480022ef jal x5,80007d00 + 80005884: 80005874 .word 0x80005874 + 80005888: 00000000 .word 0x00000000 + 8000588c: 80016e15 .word 0x80016e15 + 80005890: 00000000 .word 0x00000000 + 80005894: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x017affb00f2d821b + 80005898: 0008b803 ld x16,0(x17) + 8000589c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0a9ea4e8cfc88bcd + 800058a0: 0008bf03 ld x30,0(x17) + 800058a4: 00888893 addi x17,x17,8 + +00000000800058a8 : +Zbkb_orn_cg_cmp_rd_rs1_b16: + orn x16, x16, x30 # perform operation + 800058a8: 41e86833 orn x16,x16,x30 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_orn_cg_cmp_rd_rs1_b16, Zbkb_orn_cg_cmp_rd_rs1_b16_str) + 800058ac: 000cb203 ld x4,0(x25) + 800058b0: 01020c63 beq x4,x16,800058c8 + 800058b4: 44c022ef jal x5,80007d00 + 800058b8: 800058a8 .word 0x800058a8 + 800058bc: 00000000 .word 0x00000000 + 800058c0: 80016e4c .word 0x80016e4c + 800058c4: 00000000 .word 0x00000000 + 800058c8: 008c8c93 addi x25,x25,8 + + mv x24, x17 # switch data pointer register to avoid conflict with test + 800058cc: 00088c13 addi x24,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x87fb62896843df80 + 800058d0: 000c3883 ld x17,0(x24) + 800058d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x36275c2215822741 + 800058d8: 000c3a03 ld x20,0(x24) + 800058dc: 008c0c13 addi x24,x24,8 + +00000000800058e0 : +Zbkb_orn_cg_cmp_rd_rs1_b17: + orn x17, x17, x20 # perform operation + 800058e0: 4148e8b3 orn x17,x17,x20 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_orn_cg_cmp_rd_rs1_b17, Zbkb_orn_cg_cmp_rd_rs1_b17_str) + 800058e4: 000cb203 ld x4,0(x25) + 800058e8: 01120c63 beq x4,x17,80005900 + 800058ec: 414022ef jal x5,80007d00 + 800058f0: 800058e0 .word 0x800058e0 + 800058f4: 00000000 .word 0x00000000 + 800058f8: 80016e83 .word 0x80016e83 + 800058fc: 00000000 .word 0x00000000 + 80005900: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x6eb300bfba8861a9 + 80005904: 000c3903 ld x18,0(x24) + 80005908: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x3d041c19a8a16e88 + 8000590c: 000c3583 ld x11,0(x24) + 80005910: 008c0c13 addi x24,x24,8 + +0000000080005914 : +Zbkb_orn_cg_cmp_rd_rs1_b18: + orn x18, x18, x11 # perform operation + 80005914: 40b96933 orn x18,x18,x11 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_orn_cg_cmp_rd_rs1_b18, Zbkb_orn_cg_cmp_rd_rs1_b18_str) + 80005918: 000cb203 ld x4,0(x25) + 8000591c: 01220c63 beq x4,x18,80005934 + 80005920: 3e0022ef jal x5,80007d00 + 80005924: 80005914 .word 0x80005914 + 80005928: 00000000 .word 0x00000000 + 8000592c: 80016eba .word 0x80016eba + 80005930: 00000000 .word 0x00000000 + 80005934: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x37bfaf853e72dca7 + 80005938: 000c3983 ld x19,0(x24) + 8000593c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x681cb11484b97d55 + 80005940: 000c3a03 ld x20,0(x24) + 80005944: 008c0c13 addi x24,x24,8 + +0000000080005948 : +Zbkb_orn_cg_cmp_rd_rs1_b19: + orn x19, x19, x20 # perform operation + 80005948: 4149e9b3 orn x19,x19,x20 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkb_orn_cg_cmp_rd_rs1_b19, Zbkb_orn_cg_cmp_rd_rs1_b19_str) + 8000594c: 000cb203 ld x4,0(x25) + 80005950: 01320c63 beq x4,x19,80005968 + 80005954: 3ac022ef jal x5,80007d00 + 80005958: 80005948 .word 0x80005948 + 8000595c: 00000000 .word 0x00000000 + 80005960: 80016ef1 .word 0x80016ef1 + 80005964: 00000000 .word 0x00000000 + 80005968: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xe3d7d59fcd31cf0d + 8000596c: 000c3a03 ld x20,0(x24) + 80005970: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x1727188348bf0744 + 80005974: 000c3483 ld x9,0(x24) + 80005978: 008c0c13 addi x24,x24,8 + +000000008000597c : +Zbkb_orn_cg_cmp_rd_rs1_b20: + orn x20, x20, x9 # perform operation + 8000597c: 409a6a33 orn x20,x20,x9 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_orn_cg_cmp_rd_rs1_b20, Zbkb_orn_cg_cmp_rd_rs1_b20_str) + 80005980: 000cb203 ld x4,0(x25) + 80005984: 01420c63 beq x4,x20,8000599c + 80005988: 378022ef jal x5,80007d00 + 8000598c: 8000597c .word 0x8000597c + 80005990: 00000000 .word 0x00000000 + 80005994: 80016f28 .word 0x80016f28 + 80005998: 00000000 .word 0x00000000 + 8000599c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x08342c1902e6dee1 + 800059a0: 000c3a83 ld x21,0(x24) + 800059a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x775b0c61674ee761 + 800059a8: 000c3183 ld x3,0(x24) + 800059ac: 008c0c13 addi x24,x24,8 + +00000000800059b0 : +Zbkb_orn_cg_cmp_rd_rs1_b21: + orn x21, x21, x3 # perform operation + 800059b0: 403aeab3 orn x21,x21,x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_orn_cg_cmp_rd_rs1_b21, Zbkb_orn_cg_cmp_rd_rs1_b21_str) + 800059b4: 000cb203 ld x4,0(x25) + 800059b8: 01520c63 beq x4,x21,800059d0 + 800059bc: 344022ef jal x5,80007d00 + 800059c0: 800059b0 .word 0x800059b0 + 800059c4: 00000000 .word 0x00000000 + 800059c8: 80016f5f .word 0x80016f5f + 800059cc: 00000000 .word 0x00000000 + 800059d0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xf6a262d5397c5de2 + 800059d4: 000c3b03 ld x22,0(x24) + 800059d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x68966406f89419cb + 800059dc: 000c3f03 ld x30,0(x24) + 800059e0: 008c0c13 addi x24,x24,8 + +00000000800059e4 : +Zbkb_orn_cg_cmp_rd_rs1_b22: + orn x22, x22, x30 # perform operation + 800059e4: 41eb6b33 orn x22,x22,x30 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_orn_cg_cmp_rd_rs1_b22, Zbkb_orn_cg_cmp_rd_rs1_b22_str) + 800059e8: 000cb203 ld x4,0(x25) + 800059ec: 01620c63 beq x4,x22,80005a04 + 800059f0: 310022ef jal x5,80007d00 + 800059f4: 800059e4 .word 0x800059e4 + 800059f8: 00000000 .word 0x00000000 + 800059fc: 80016f96 .word 0x80016f96 + 80005a00: 00000000 .word 0x00000000 + 80005a04: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x484b944c27ef7522 + 80005a08: 000c3b83 ld x23,0(x24) + 80005a0c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xadcc96e65cb4bab9 + 80005a10: 000c3983 ld x19,0(x24) + 80005a14: 008c0c13 addi x24,x24,8 + +0000000080005a18 : +Zbkb_orn_cg_cmp_rd_rs1_b23: + orn x23, x23, x19 # perform operation + 80005a18: 413bebb3 orn x23,x23,x19 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_orn_cg_cmp_rd_rs1_b23, Zbkb_orn_cg_cmp_rd_rs1_b23_str) + 80005a1c: 000cb203 ld x4,0(x25) + 80005a20: 01720c63 beq x4,x23,80005a38 + 80005a24: 2dc022ef jal x5,80007d00 + 80005a28: 80005a18 .word 0x80005a18 + 80005a2c: 00000000 .word 0x00000000 + 80005a30: 80016fcd .word 0x80016fcd + 80005a34: 00000000 .word 0x00000000 + 80005a38: 008c8c93 addi x25,x25,8 + + mv x22, x24 # switch data pointer register to avoid conflict with test + 80005a3c: 000c0b13 addi x22,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x4a598966c1d6530d + 80005a40: 000b3c03 ld x24,0(x22) + 80005a44: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x33e5a9d2bd1ec39d + 80005a48: 000b3883 ld x17,0(x22) + 80005a4c: 008b0b13 addi x22,x22,8 + +0000000080005a50 : +Zbkb_orn_cg_cmp_rd_rs1_b24: + orn x24, x24, x17 # perform operation + 80005a50: 411c6c33 orn x24,x24,x17 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_orn_cg_cmp_rd_rs1_b24, Zbkb_orn_cg_cmp_rd_rs1_b24_str) + 80005a54: 000cb203 ld x4,0(x25) + 80005a58: 01820c63 beq x4,x24,80005a70 + 80005a5c: 2a4022ef jal x5,80007d00 + 80005a60: 80005a50 .word 0x80005a50 + 80005a64: 00000000 .word 0x00000000 + 80005a68: 80017004 .word 0x80017004 + 80005a6c: 00000000 .word 0x00000000 + 80005a70: 008c8c93 addi x25,x25,8 + + mv x12, x25 # switch signature pointer register to avoid conflict with test + 80005a74: 000c8613 addi x12,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x977cc7fb5e19c111 + 80005a78: 000b3c83 ld x25,0(x22) + 80005a7c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0xb647b2d6a60c5dd7 + 80005a80: 000b3d03 ld x26,0(x22) + 80005a84: 008b0b13 addi x22,x22,8 + +0000000080005a88 : +Zbkb_orn_cg_cmp_rd_rs1_b25: + orn x25, x25, x26 # perform operation + 80005a88: 41acecb3 orn x25,x25,x26 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_orn_cg_cmp_rd_rs1_b25, Zbkb_orn_cg_cmp_rd_rs1_b25_str) + 80005a8c: 00063203 ld x4,0(x12) + 80005a90: 01920c63 beq x4,x25,80005aa8 + 80005a94: 26c022ef jal x5,80007d00 + 80005a98: 80005a88 .word 0x80005a88 + 80005a9c: 00000000 .word 0x00000000 + 80005aa0: 8001703b .word 0x8001703b + 80005aa4: 00000000 .word 0x00000000 + 80005aa8: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0xa1e1ee3f3ec42114 + 80005aac: 000b3d03 ld x26,0(x22) + 80005ab0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x106f3792454b2058 + 80005ab4: 000b3a03 ld x20,0(x22) + 80005ab8: 008b0b13 addi x22,x22,8 + +0000000080005abc : +Zbkb_orn_cg_cmp_rd_rs1_b26: + orn x26, x26, x20 # perform operation + 80005abc: 414d6d33 orn x26,x26,x20 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_orn_cg_cmp_rd_rs1_b26, Zbkb_orn_cg_cmp_rd_rs1_b26_str) + 80005ac0: 00063203 ld x4,0(x12) + 80005ac4: 01a20c63 beq x4,x26,80005adc + 80005ac8: 238022ef jal x5,80007d00 + 80005acc: 80005abc .word 0x80005abc + 80005ad0: 00000000 .word 0x00000000 + 80005ad4: 80017072 .word 0x80017072 + 80005ad8: 00000000 .word 0x00000000 + 80005adc: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x62813e3fa629975e + 80005ae0: 000b3d83 ld x27,0(x22) + 80005ae4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x71428a55dc0c9723 + 80005ae8: 000b3003 ld x0,0(x22) + 80005aec: 008b0b13 addi x22,x22,8 + +0000000080005af0 : +Zbkb_orn_cg_cmp_rd_rs1_b27: + orn x27, x27, x0 # perform operation + 80005af0: 400dedb3 orn x27,x27,x0 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_orn_cg_cmp_rd_rs1_b27, Zbkb_orn_cg_cmp_rd_rs1_b27_str) + 80005af4: 00063203 ld x4,0(x12) + 80005af8: 01b20c63 beq x4,x27,80005b10 + 80005afc: 204022ef jal x5,80007d00 + 80005b00: 80005af0 .word 0x80005af0 + 80005b04: 00000000 .word 0x00000000 + 80005b08: 800170a9 .word 0x800170a9 + 80005b0c: 00000000 .word 0x00000000 + 80005b10: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0xc73c673a6d869ec7 + 80005b14: 000b3e03 ld x28,0(x22) + 80005b18: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x73eb6f57a49e6d89 + 80005b1c: 000b3883 ld x17,0(x22) + 80005b20: 008b0b13 addi x22,x22,8 + +0000000080005b24 : +Zbkb_orn_cg_cmp_rd_rs1_b28: + orn x28, x28, x17 # perform operation + 80005b24: 411e6e33 orn x28,x28,x17 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_orn_cg_cmp_rd_rs1_b28, Zbkb_orn_cg_cmp_rd_rs1_b28_str) + 80005b28: 00063203 ld x4,0(x12) + 80005b2c: 01c20c63 beq x4,x28,80005b44 + 80005b30: 1d0022ef jal x5,80007d00 + 80005b34: 80005b24 .word 0x80005b24 + 80005b38: 00000000 .word 0x00000000 + 80005b3c: 800170e0 .word 0x800170e0 + 80005b40: 00000000 .word 0x00000000 + 80005b44: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xce0f5cf263b43717 + 80005b48: 000b3e83 ld x29,0(x22) + 80005b4c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xba248be944a8accd + 80005b50: 000b3703 ld x14,0(x22) + 80005b54: 008b0b13 addi x22,x22,8 + +0000000080005b58 : +Zbkb_orn_cg_cmp_rd_rs1_b29: + orn x29, x29, x14 # perform operation + 80005b58: 40eeeeb3 orn x29,x29,x14 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_orn_cg_cmp_rd_rs1_b29, Zbkb_orn_cg_cmp_rd_rs1_b29_str) + 80005b5c: 00063203 ld x4,0(x12) + 80005b60: 01d20c63 beq x4,x29,80005b78 + 80005b64: 19c022ef jal x5,80007d00 + 80005b68: 80005b58 .word 0x80005b58 + 80005b6c: 00000000 .word 0x00000000 + 80005b70: 80017117 .word 0x80017117 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x909495da651098f5 + 80005b7c: 000b3f03 ld x30,0(x22) + 80005b80: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x078229a163189c12 + 80005b84: 000b3583 ld x11,0(x22) + 80005b88: 008b0b13 addi x22,x22,8 + +0000000080005b8c : +Zbkb_orn_cg_cmp_rd_rs1_b30: + orn x30, x30, x11 # perform operation + 80005b8c: 40bf6f33 orn x30,x30,x11 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_orn_cg_cmp_rd_rs1_b30, Zbkb_orn_cg_cmp_rd_rs1_b30_str) + 80005b90: 00063203 ld x4,0(x12) + 80005b94: 01e20c63 beq x4,x30,80005bac + 80005b98: 168022ef jal x5,80007d00 + 80005b9c: 80005b8c .word 0x80005b8c + 80005ba0: 00000000 .word 0x00000000 + 80005ba4: 8001714e .word 0x8001714e + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xa860b3af70add216 + 80005bb0: 000b3f83 ld x31,0(x22) + 80005bb4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x24698457b7ae3186 + 80005bb8: 000b3583 ld x11,0(x22) + 80005bbc: 008b0b13 addi x22,x22,8 + +0000000080005bc0 : +Zbkb_orn_cg_cmp_rd_rs1_b31: + orn x31, x31, x11 # perform operation + 80005bc0: 40bfefb3 orn x31,x31,x11 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_orn_cg_cmp_rd_rs1_b31, Zbkb_orn_cg_cmp_rd_rs1_b31_str) + 80005bc4: 00063203 ld x4,0(x12) + 80005bc8: 01f20c63 beq x4,x31,80005be0 + 80005bcc: 134022ef jal x5,80007d00 + 80005bd0: 80005bc0 .word 0x80005bc0 + 80005bd4: 00000000 .word 0x00000000 + 80005bd8: 80017185 .word 0x80017185 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x14b9445e048647dc + 80005be4: 000b3c03 ld x24,0(x22) + 80005be8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0xa36e147b170116f9 + 80005bec: 000b3003 ld x0,0(x22) + 80005bf0: 008b0b13 addi x22,x22,8 + +0000000080005bf4 : +Zbkb_orn_cg_cmp_rd_rs2_b0: + orn x0, x24, x0 # perform operation + 80005bf4: 400c6033 orn x0,x24,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkb_orn_cg_cmp_rd_rs2_b0, Zbkb_orn_cg_cmp_rd_rs2_b0_str) + 80005bf8: 00063203 ld x4,0(x12) + 80005bfc: 00020c63 beq x4,x0,80005c14 + 80005c00: 100022ef jal x5,80007d00 + 80005c04: 80005bf4 .word 0x80005bf4 + 80005c08: 00000000 .word 0x00000000 + 80005c0c: 800171bc .word 0x800171bc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x38e5808fa96a12ee + 80005c18: 000b3a03 ld x20,0(x22) + 80005c1c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0x52c1b7e1d3bc7055 + 80005c20: 000b3083 ld x1,0(x22) + 80005c24: 008b0b13 addi x22,x22,8 + +0000000080005c28 : +Zbkb_orn_cg_cmp_rd_rs2_b1: + orn x1, x20, x1 # perform operation + 80005c28: 401a60b3 orn x1,x20,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_orn_cg_cmp_rd_rs2_b1, Zbkb_orn_cg_cmp_rd_rs2_b1_str) + 80005c2c: 00063203 ld x4,0(x12) + 80005c30: 00120c63 beq x4,x1,80005c48 + 80005c34: 0cc022ef jal x5,80007d00 + 80005c38: 80005c28 .word 0x80005c28 + 80005c3c: 00000000 .word 0x00000000 + 80005c40: 800171f2 .word 0x800171f2 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x1af3038687ce3749 + 80005c4c: 000b3f03 ld x30,0(x22) + 80005c50: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x7775dda2c4b98766 + 80005c54: 000b3103 ld x2,0(x22) + 80005c58: 008b0b13 addi x22,x22,8 + +0000000080005c5c : +Zbkb_orn_cg_cmp_rd_rs2_b2: + orn x2, x30, x2 # perform operation + 80005c5c: 402f6133 orn x2,x30,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_orn_cg_cmp_rd_rs2_b2, Zbkb_orn_cg_cmp_rd_rs2_b2_str) + 80005c60: 00063203 ld x4,0(x12) + 80005c64: 00220c63 beq x4,x2,80005c7c + 80005c68: 098022ef jal x5,80007d00 + 80005c6c: 80005c5c .word 0x80005c5c + 80005c70: 00000000 .word 0x00000000 + 80005c74: 80017228 .word 0x80017228 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x73a3a8f85f980be6 + 80005c80: 000b3a03 ld x20,0(x22) + 80005c84: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0xb4079958271e6d3a + 80005c88: 000b3183 ld x3,0(x22) + 80005c8c: 008b0b13 addi x22,x22,8 + +0000000080005c90 : +Zbkb_orn_cg_cmp_rd_rs2_b3: + orn x3, x20, x3 # perform operation + 80005c90: 403a61b3 orn x3,x20,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkb_orn_cg_cmp_rd_rs2_b3, Zbkb_orn_cg_cmp_rd_rs2_b3_str) + 80005c94: 00063203 ld x4,0(x12) + 80005c98: 00320c63 beq x4,x3,80005cb0 + 80005c9c: 064022ef jal x5,80007d00 + 80005ca0: 80005c90 .word 0x80005c90 + 80005ca4: 00000000 .word 0x00000000 + 80005ca8: 8001725e .word 0x8001725e + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005cb4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005cb8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x5ddb429dffd357f3 + 80005cbc: 000b3483 ld x9,0(x22) + 80005cc0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xb74c961e41a12274 + 80005cc4: 000b3203 ld x4,0(x22) + 80005cc8: 008b0b13 addi x22,x22,8 + +0000000080005ccc : +Zbkb_orn_cg_cmp_rd_rs2_b4: + orn x4, x9, x4 # perform operation + 80005ccc: 4044e233 orn x4,x9,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zbkb_orn_cg_cmp_rd_rs2_b4, Zbkb_orn_cg_cmp_rd_rs2_b4_str) + 80005cd0: 00063383 ld x7,0(x12) + 80005cd4: 00438c63 beq x7,x4,80005cec + 80005cd8: 0400246f jal x8,80007d18 + 80005cdc: 80005ccc .word 0x80005ccc + 80005ce0: 00000000 .word 0x00000000 + 80005ce4: 80017294 .word 0x80017294 + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x9513805b646dbe42 + 80005cf0: 000b3803 ld x16,0(x22) + 80005cf4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x290627b862e25fd4 + 80005cf8: 000b3283 ld x5,0(x22) + 80005cfc: 008b0b13 addi x22,x22,8 + +0000000080005d00 : +Zbkb_orn_cg_cmp_rd_rs2_b5: + orn x5, x16, x5 # perform operation + 80005d00: 405862b3 orn x5,x16,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zbkb_orn_cg_cmp_rd_rs2_b5, Zbkb_orn_cg_cmp_rd_rs2_b5_str) + 80005d04: 00063383 ld x7,0(x12) + 80005d08: 00538c63 beq x7,x5,80005d20 + 80005d0c: 00c0246f jal x8,80007d18 + 80005d10: 80005d00 .word 0x80005d00 + 80005d14: 00000000 .word 0x00000000 + 80005d18: 800172ca .word 0x800172ca + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xcd6c1ce598436a76 + 80005d24: 000b3f83 ld x31,0(x22) + 80005d28: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0xb26cf1286afb7359 + 80005d2c: 000b3303 ld x6,0(x22) + 80005d30: 008b0b13 addi x22,x22,8 + +0000000080005d34 : +Zbkb_orn_cg_cmp_rd_rs2_b6: + orn x6, x31, x6 # perform operation + 80005d34: 406fe333 orn x6,x31,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zbkb_orn_cg_cmp_rd_rs2_b6, Zbkb_orn_cg_cmp_rd_rs2_b6_str) + 80005d38: 00063383 ld x7,0(x12) + 80005d3c: 00638c63 beq x7,x6,80005d54 + 80005d40: 7d90146f jal x8,80007d18 + 80005d44: 80005d34 .word 0x80005d34 + 80005d48: 00000000 .word 0x00000000 + 80005d4c: 80017300 .word 0x80017300 + 80005d50: 00000000 .word 0x00000000 + 80005d54: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d58: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d5c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0x0239928dda10510a + 80005d60: 000b3403 ld x8,0(x22) + 80005d64: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x1f4db62515afe771 + 80005d68: 000b3383 ld x7,0(x22) + 80005d6c: 008b0b13 addi x22,x22,8 + +0000000080005d70 : +Zbkb_orn_cg_cmp_rd_rs2_b7: + orn x7, x8, x7 # perform operation + 80005d70: 407463b3 orn x7,x8,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs2_b7, Zbkb_orn_cg_cmp_rd_rs2_b7_str) + 80005d74: 00063683 ld x13,0(x12) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 7c50176f jal x14,80007d40 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 80017336 .word 0x80017336 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0xe919b4d3a218171e + 80005d94: 000b3c83 ld x25,0(x22) + 80005d98: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0xec7d712a4ea7cfab + 80005d9c: 000b3403 ld x8,0(x22) + 80005da0: 008b0b13 addi x22,x22,8 + +0000000080005da4 : +Zbkb_orn_cg_cmp_rd_rs2_b8: + orn x8, x25, x8 # perform operation + 80005da4: 408ce433 orn x8,x25,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs2_b8, Zbkb_orn_cg_cmp_rd_rs2_b8_str) + 80005da8: 00063683 ld x13,0(x12) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 7910176f jal x14,80007d40 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 8001736c .word 0x8001736c + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x84ed9f80986a1c22 + 80005dc8: 000b3e83 ld x29,0(x22) + 80005dcc: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0xeceadab9f020cc52 + 80005dd0: 000b3483 ld x9,0(x22) + 80005dd4: 008b0b13 addi x22,x22,8 + +0000000080005dd8 : +Zbkb_orn_cg_cmp_rd_rs2_b9: + orn x9, x29, x9 # perform operation + 80005dd8: 409ee4b3 orn x9,x29,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs2_b9, Zbkb_orn_cg_cmp_rd_rs2_b9_str) + 80005ddc: 00063683 ld x13,0(x12) + 80005de0: 00968c63 beq x13,x9,80005df8 + 80005de4: 75d0176f jal x14,80007d40 + 80005de8: 80005dd8 .word 0x80005dd8 + 80005dec: 00000000 .word 0x00000000 + 80005df0: 800173a2 .word 0x800173a2 + 80005df4: 00000000 .word 0x00000000 + 80005df8: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xbc042a7d4c6b064e + 80005dfc: 000b3583 ld x11,0(x22) + 80005e00: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0x93ab88771bc51669 + 80005e04: 000b3503 ld x10,0(x22) + 80005e08: 008b0b13 addi x22,x22,8 + +0000000080005e0c : +Zbkb_orn_cg_cmp_rd_rs2_b10: + orn x10, x11, x10 # perform operation + 80005e0c: 40a5e533 orn x10,x11,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs2_b10, Zbkb_orn_cg_cmp_rd_rs2_b10_str) + 80005e10: 00063683 ld x13,0(x12) + 80005e14: 00a68c63 beq x13,x10,80005e2c + 80005e18: 7290176f jal x14,80007d40 + 80005e1c: 80005e0c .word 0x80005e0c + 80005e20: 00000000 .word 0x00000000 + 80005e24: 800173d8 .word 0x800173d8 + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x8e1115c417bff80c + 80005e30: 000b3903 ld x18,0(x22) + 80005e34: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0x9616975ecafdb66a + 80005e38: 000b3583 ld x11,0(x22) + 80005e3c: 008b0b13 addi x22,x22,8 + +0000000080005e40 : +Zbkb_orn_cg_cmp_rd_rs2_b11: + orn x11, x18, x11 # perform operation + 80005e40: 40b965b3 orn x11,x18,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs2_b11, Zbkb_orn_cg_cmp_rd_rs2_b11_str) + 80005e44: 00063683 ld x13,0(x12) + 80005e48: 00b68c63 beq x13,x11,80005e60 + 80005e4c: 6f50176f jal x14,80007d40 + 80005e50: 80005e40 .word 0x80005e40 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 8001740f .word 0x8001740f + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 00860613 addi x12,x12,8 + + mv x9, x12 # switch signature pointer register to avoid conflict with test + 80005e64: 00060493 addi x9,x12,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x25) # load rs1: x25 = 0x4736efec6d1421b2 + 80005e68: 000b3c83 ld x25,0(x22) + 80005e6c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0xfbf22414d0336684 + 80005e70: 000b3603 ld x12,0(x22) + 80005e74: 008b0b13 addi x22,x22,8 + +0000000080005e78 : +Zbkb_orn_cg_cmp_rd_rs2_b12: + orn x12, x25, x12 # perform operation + 80005e78: 40cce633 orn x12,x25,x12 + # Check if x12 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs2_b12, Zbkb_orn_cg_cmp_rd_rs2_b12_str) + 80005e7c: 0004b683 ld x13,0(x9) + 80005e80: 00c68c63 beq x13,x12,80005e98 + 80005e84: 6bd0176f jal x14,80007d40 + 80005e88: 80005e78 .word 0x80005e78 + 80005e8c: 00000000 .word 0x00000000 + 80005e90: 80017446 .word 0x80017446 + 80005e94: 00000000 .word 0x00000000 + 80005e98: 00848493 addi x9,x9,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e9c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005ea0: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xde71d9d6a2400a1a + 80005ea4: 000b3603 ld x12,0(x22) + 80005ea8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0xf46f0dc3e75a7e91 + 80005eac: 000b3683 ld x13,0(x22) + 80005eb0: 008b0b13 addi x22,x22,8 + +0000000080005eb4 : +Zbkb_orn_cg_cmp_rd_rs2_b13: + orn x13, x12, x13 # perform operation + 80005eb4: 40d666b3 orn x13,x12,x13 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkb_orn_cg_cmp_rd_rs2_b13, Zbkb_orn_cg_cmp_rd_rs2_b13_str) + 80005eb8: 0004b203 ld x4,0(x9) + 80005ebc: 00d20c63 beq x4,x13,80005ed4 + 80005ec0: 641012ef jal x5,80007d00 + 80005ec4: 80005eb4 .word 0x80005eb4 + 80005ec8: 00000000 .word 0x00000000 + 80005ecc: 8001747d .word 0x8001747d + 80005ed0: 00000000 .word 0x00000000 + 80005ed4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xd1e2fbbcbe327c80 + 80005ed8: 000b3e83 ld x29,0(x22) + 80005edc: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0xeaa4bfa67b5ad3c4 + 80005ee0: 000b3703 ld x14,0(x22) + 80005ee4: 008b0b13 addi x22,x22,8 + +0000000080005ee8 : +Zbkb_orn_cg_cmp_rd_rs2_b14: + orn x14, x29, x14 # perform operation + 80005ee8: 40eee733 orn x14,x29,x14 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_orn_cg_cmp_rd_rs2_b14, Zbkb_orn_cg_cmp_rd_rs2_b14_str) + 80005eec: 0004b203 ld x4,0(x9) + 80005ef0: 00e20c63 beq x4,x14,80005f08 + 80005ef4: 60d012ef jal x5,80007d00 + 80005ef8: 80005ee8 .word 0x80005ee8 + 80005efc: 00000000 .word 0x00000000 + 80005f00: 800174b4 .word 0x800174b4 + 80005f04: 00000000 .word 0x00000000 + 80005f08: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0xebb33d8585a05a47 + 80005f0c: 000b3303 ld x6,0(x22) + 80005f10: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x67f8dfdc3e2ee5b0 + 80005f14: 000b3783 ld x15,0(x22) + 80005f18: 008b0b13 addi x22,x22,8 + +0000000080005f1c : +Zbkb_orn_cg_cmp_rd_rs2_b15: + orn x15, x6, x15 # perform operation + 80005f1c: 40f367b3 orn x15,x6,x15 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_orn_cg_cmp_rd_rs2_b15, Zbkb_orn_cg_cmp_rd_rs2_b15_str) + 80005f20: 0004b203 ld x4,0(x9) + 80005f24: 00f20c63 beq x4,x15,80005f3c + 80005f28: 5d9012ef jal x5,80007d00 + 80005f2c: 80005f1c .word 0x80005f1c + 80005f30: 00000000 .word 0x00000000 + 80005f34: 800174eb .word 0x800174eb + 80005f38: 00000000 .word 0x00000000 + 80005f3c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x8f5bdf077ddc6b32 + 80005f40: 000b3f03 ld x30,0(x22) + 80005f44: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xd3c3c5a95d2f0084 + 80005f48: 000b3803 ld x16,0(x22) + 80005f4c: 008b0b13 addi x22,x22,8 + +0000000080005f50 : +Zbkb_orn_cg_cmp_rd_rs2_b16: + orn x16, x30, x16 # perform operation + 80005f50: 410f6833 orn x16,x30,x16 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_orn_cg_cmp_rd_rs2_b16, Zbkb_orn_cg_cmp_rd_rs2_b16_str) + 80005f54: 0004b203 ld x4,0(x9) + 80005f58: 01020c63 beq x4,x16,80005f70 + 80005f5c: 5a5012ef jal x5,80007d00 + 80005f60: 80005f50 .word 0x80005f50 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 80017522 .word 0x80017522 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x49212b971a2f2473 + 80005f74: 000b3e83 ld x29,0(x22) + 80005f78: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x94cd286ae6938da1 + 80005f7c: 000b3883 ld x17,0(x22) + 80005f80: 008b0b13 addi x22,x22,8 + +0000000080005f84 : +Zbkb_orn_cg_cmp_rd_rs2_b17: + orn x17, x29, x17 # perform operation + 80005f84: 411ee8b3 orn x17,x29,x17 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_orn_cg_cmp_rd_rs2_b17, Zbkb_orn_cg_cmp_rd_rs2_b17_str) + 80005f88: 0004b203 ld x4,0(x9) + 80005f8c: 01120c63 beq x4,x17,80005fa4 + 80005f90: 571012ef jal x5,80007d00 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 80017559 .word 0x80017559 + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x71ab48275318c326 + 80005fa8: 000b3e83 ld x29,0(x22) + 80005fac: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x2e623503dd6efdba + 80005fb0: 000b3903 ld x18,0(x22) + 80005fb4: 008b0b13 addi x22,x22,8 + +0000000080005fb8 : +Zbkb_orn_cg_cmp_rd_rs2_b18: + orn x18, x29, x18 # perform operation + 80005fb8: 412ee933 orn x18,x29,x18 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_orn_cg_cmp_rd_rs2_b18, Zbkb_orn_cg_cmp_rd_rs2_b18_str) + 80005fbc: 0004b203 ld x4,0(x9) + 80005fc0: 01220c63 beq x4,x18,80005fd8 + 80005fc4: 53d012ef jal x5,80007d00 + 80005fc8: 80005fb8 .word 0x80005fb8 + 80005fcc: 00000000 .word 0x00000000 + 80005fd0: 80017590 .word 0x80017590 + 80005fd4: 00000000 .word 0x00000000 + 80005fd8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xd7fcd049300b12b8 + 80005fdc: 000b3403 ld x8,0(x22) + 80005fe0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xcfbcd7ada49748d4 + 80005fe4: 000b3983 ld x19,0(x22) + 80005fe8: 008b0b13 addi x22,x22,8 + +0000000080005fec : +Zbkb_orn_cg_cmp_rd_rs2_b19: + orn x19, x8, x19 # perform operation + 80005fec: 413469b3 orn x19,x8,x19 + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_orn_cg_cmp_rd_rs2_b19, Zbkb_orn_cg_cmp_rd_rs2_b19_str) + 80005ff0: 0004b203 ld x4,0(x9) + 80005ff4: 01320c63 beq x4,x19,8000600c + 80005ff8: 509012ef jal x5,80007d00 + 80005ffc: 80005fec .word 0x80005fec + 80006000: 00000000 .word 0x00000000 + 80006004: 800175c7 .word 0x800175c7 + 80006008: 00000000 .word 0x00000000 + 8000600c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xa3fff683d7ee1275 + 80006010: 000b3a83 ld x21,0(x22) + 80006014: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0x712547024f5e2001 + 80006018: 000b3a03 ld x20,0(x22) + 8000601c: 008b0b13 addi x22,x22,8 + +0000000080006020 : +Zbkb_orn_cg_cmp_rd_rs2_b20: + orn x20, x21, x20 # perform operation + 80006020: 414aea33 orn x20,x21,x20 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_orn_cg_cmp_rd_rs2_b20, Zbkb_orn_cg_cmp_rd_rs2_b20_str) + 80006024: 0004b203 ld x4,0(x9) + 80006028: 01420c63 beq x4,x20,80006040 + 8000602c: 4d5012ef jal x5,80007d00 + 80006030: 80006020 .word 0x80006020 + 80006034: 00000000 .word 0x00000000 + 80006038: 800175fe .word 0x800175fe + 8000603c: 00000000 .word 0x00000000 + 80006040: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x7c88a2323c9e2f87 + 80006044: 000b3f83 ld x31,0(x22) + 80006048: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x293d9d9a45bf9800 + 8000604c: 000b3a83 ld x21,0(x22) + 80006050: 008b0b13 addi x22,x22,8 + +0000000080006054 : +Zbkb_orn_cg_cmp_rd_rs2_b21: + orn x21, x31, x21 # perform operation + 80006054: 415feab3 orn x21,x31,x21 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_orn_cg_cmp_rd_rs2_b21, Zbkb_orn_cg_cmp_rd_rs2_b21_str) + 80006058: 0004b203 ld x4,0(x9) + 8000605c: 01520c63 beq x4,x21,80006074 + 80006060: 4a1012ef jal x5,80007d00 + 80006064: 80006054 .word 0x80006054 + 80006068: 00000000 .word 0x00000000 + 8000606c: 80017635 .word 0x80017635 + 80006070: 00000000 .word 0x00000000 + 80006074: 00848493 addi x9,x9,8 + + mv x1, x22 # switch data pointer register to avoid conflict with test + 80006078: 000b0093 addi x1,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x6dbc4138d6043f6f + 8000607c: 0000be03 ld x28,0(x1) + 80006080: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xa9d3cfa9143e4f3e + 80006084: 0000bb03 ld x22,0(x1) + 80006088: 00808093 addi x1,x1,8 + +000000008000608c : +Zbkb_orn_cg_cmp_rd_rs2_b22: + orn x22, x28, x22 # perform operation + 8000608c: 416e6b33 orn x22,x28,x22 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_orn_cg_cmp_rd_rs2_b22, Zbkb_orn_cg_cmp_rd_rs2_b22_str) + 80006090: 0004b203 ld x4,0(x9) + 80006094: 01620c63 beq x4,x22,800060ac + 80006098: 469012ef jal x5,80007d00 + 8000609c: 8000608c .word 0x8000608c + 800060a0: 00000000 .word 0x00000000 + 800060a4: 8001766c .word 0x8001766c + 800060a8: 00000000 .word 0x00000000 + 800060ac: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x7161308b7d4a02f5 + 800060b0: 0000b783 ld x15,0(x1) + 800060b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x65ab7a8dc84a6312 + 800060b8: 0000bb83 ld x23,0(x1) + 800060bc: 00808093 addi x1,x1,8 + +00000000800060c0 : +Zbkb_orn_cg_cmp_rd_rs2_b23: + orn x23, x15, x23 # perform operation + 800060c0: 4177ebb3 orn x23,x15,x23 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_orn_cg_cmp_rd_rs2_b23, Zbkb_orn_cg_cmp_rd_rs2_b23_str) + 800060c4: 0004b203 ld x4,0(x9) + 800060c8: 01720c63 beq x4,x23,800060e0 + 800060cc: 435012ef jal x5,80007d00 + 800060d0: 800060c0 .word 0x800060c0 + 800060d4: 00000000 .word 0x00000000 + 800060d8: 800176a3 .word 0x800176a3 + 800060dc: 00000000 .word 0x00000000 + 800060e0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xf0747eff04975a9d + 800060e4: 0000b983 ld x19,0(x1) + 800060e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7c59a753502882aa + 800060ec: 0000bc03 ld x24,0(x1) + 800060f0: 00808093 addi x1,x1,8 + +00000000800060f4 : +Zbkb_orn_cg_cmp_rd_rs2_b24: + orn x24, x19, x24 # perform operation + 800060f4: 4189ec33 orn x24,x19,x24 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_orn_cg_cmp_rd_rs2_b24, Zbkb_orn_cg_cmp_rd_rs2_b24_str) + 800060f8: 0004b203 ld x4,0(x9) + 800060fc: 01820c63 beq x4,x24,80006114 + 80006100: 401012ef jal x5,80007d00 + 80006104: 800060f4 .word 0x800060f4 + 80006108: 00000000 .word 0x00000000 + 8000610c: 800176da .word 0x800176da + 80006110: 00000000 .word 0x00000000 + 80006114: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5c5611c5c5269251 + 80006118: 0000be03 ld x28,0(x1) + 8000611c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xc4dd6323694215ce + 80006120: 0000bc83 ld x25,0(x1) + 80006124: 00808093 addi x1,x1,8 + +0000000080006128 : +Zbkb_orn_cg_cmp_rd_rs2_b25: + orn x25, x28, x25 # perform operation + 80006128: 419e6cb3 orn x25,x28,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_orn_cg_cmp_rd_rs2_b25, Zbkb_orn_cg_cmp_rd_rs2_b25_str) + 8000612c: 0004b203 ld x4,0(x9) + 80006130: 01920c63 beq x4,x25,80006148 + 80006134: 3cd012ef jal x5,80007d00 + 80006138: 80006128 .word 0x80006128 + 8000613c: 00000000 .word 0x00000000 + 80006140: 80017711 .word 0x80017711 + 80006144: 00000000 .word 0x00000000 + 80006148: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xa78a9854978ab36c + 8000614c: 0000bd83 ld x27,0(x1) + 80006150: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xc0d5314f5dc8b8c4 + 80006154: 0000bd03 ld x26,0(x1) + 80006158: 00808093 addi x1,x1,8 + +000000008000615c : +Zbkb_orn_cg_cmp_rd_rs2_b26: + orn x26, x27, x26 # perform operation + 8000615c: 41aded33 orn x26,x27,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_orn_cg_cmp_rd_rs2_b26, Zbkb_orn_cg_cmp_rd_rs2_b26_str) + 80006160: 0004b203 ld x4,0(x9) + 80006164: 01a20c63 beq x4,x26,8000617c + 80006168: 399012ef jal x5,80007d00 + 8000616c: 8000615c .word 0x8000615c + 80006170: 00000000 .word 0x00000000 + 80006174: 80017748 .word 0x80017748 + 80006178: 00000000 .word 0x00000000 + 8000617c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x609bd3dac071681b + 80006180: 0000b583 ld x11,0(x1) + 80006184: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xf5b884aaa3d92eff + 80006188: 0000bd83 ld x27,0(x1) + 8000618c: 00808093 addi x1,x1,8 + +0000000080006190 : +Zbkb_orn_cg_cmp_rd_rs2_b27: + orn x27, x11, x27 # perform operation + 80006190: 41b5edb3 orn x27,x11,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_orn_cg_cmp_rd_rs2_b27, Zbkb_orn_cg_cmp_rd_rs2_b27_str) + 80006194: 0004b203 ld x4,0(x9) + 80006198: 01b20c63 beq x4,x27,800061b0 + 8000619c: 365012ef jal x5,80007d00 + 800061a0: 80006190 .word 0x80006190 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 8001777f .word 0x8001777f + 800061ac: 00000000 .word 0x00000000 + 800061b0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x92d200922d761a51 + 800061b4: 0000bd83 ld x27,0(x1) + 800061b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x19091f9171230ba9 + 800061bc: 0000be03 ld x28,0(x1) + 800061c0: 00808093 addi x1,x1,8 + +00000000800061c4 : +Zbkb_orn_cg_cmp_rd_rs2_b28: + orn x28, x27, x28 # perform operation + 800061c4: 41cdee33 orn x28,x27,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_orn_cg_cmp_rd_rs2_b28, Zbkb_orn_cg_cmp_rd_rs2_b28_str) + 800061c8: 0004b203 ld x4,0(x9) + 800061cc: 01c20c63 beq x4,x28,800061e4 + 800061d0: 331012ef jal x5,80007d00 + 800061d4: 800061c4 .word 0x800061c4 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 800177b6 .word 0x800177b6 + 800061e0: 00000000 .word 0x00000000 + 800061e4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x89a84c6c04282454 + 800061e8: 0000bc83 ld x25,0(x1) + 800061ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xc9f86a41d30065d5 + 800061f0: 0000be83 ld x29,0(x1) + 800061f4: 00808093 addi x1,x1,8 + +00000000800061f8 : +Zbkb_orn_cg_cmp_rd_rs2_b29: + orn x29, x25, x29 # perform operation + 800061f8: 41dceeb3 orn x29,x25,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_orn_cg_cmp_rd_rs2_b29, Zbkb_orn_cg_cmp_rd_rs2_b29_str) + 800061fc: 0004b203 ld x4,0(x9) + 80006200: 01d20c63 beq x4,x29,80006218 + 80006204: 2fd012ef jal x5,80007d00 + 80006208: 800061f8 .word 0x800061f8 + 8000620c: 00000000 .word 0x00000000 + 80006210: 800177ed .word 0x800177ed + 80006214: 00000000 .word 0x00000000 + 80006218: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x44100dd557901e57 + 8000621c: 0000be83 ld x29,0(x1) + 80006220: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x6be0dcec8e1b8179 + 80006224: 0000bf03 ld x30,0(x1) + 80006228: 00808093 addi x1,x1,8 + +000000008000622c : +Zbkb_orn_cg_cmp_rd_rs2_b30: + orn x30, x29, x30 # perform operation + 8000622c: 41eeef33 orn x30,x29,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_orn_cg_cmp_rd_rs2_b30, Zbkb_orn_cg_cmp_rd_rs2_b30_str) + 80006230: 0004b203 ld x4,0(x9) + 80006234: 01e20c63 beq x4,x30,8000624c + 80006238: 2c9012ef jal x5,80007d00 + 8000623c: 8000622c .word 0x8000622c + 80006240: 00000000 .word 0x00000000 + 80006244: 80017824 .word 0x80017824 + 80006248: 00000000 .word 0x00000000 + 8000624c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x36cab48f7f8f8755 + 80006250: 0000ba03 ld x20,0(x1) + 80006254: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xb5874638d48ca67d + 80006258: 0000bf83 ld x31,0(x1) + 8000625c: 00808093 addi x1,x1,8 + +0000000080006260 : +Zbkb_orn_cg_cmp_rd_rs2_b31: + orn x31, x20, x31 # perform operation + 80006260: 41fa6fb3 orn x31,x20,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_orn_cg_cmp_rd_rs2_b31, Zbkb_orn_cg_cmp_rd_rs2_b31_str) + 80006264: 0004b203 ld x4,0(x9) + 80006268: 01f20c63 beq x4,x31,80006280 + 8000626c: 295012ef jal x5,80007d00 + 80006270: 80006260 .word 0x80006260 + 80006274: 00000000 .word 0x00000000 + 80006278: 8001785b .word 0x8001785b + 8000627c: 00000000 .word 0x00000000 + 80006280: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0xa0a7d72c336a687f + 80006284: 0000b003 ld x0,0(x1) + 80006288: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xecaae38e86b52f58 + 8000628c: 0000b003 ld x0,0(x1) + 80006290: 00808093 addi x1,x1,8 + +0000000080006294 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b0: + orn x0, x0, x0 # perform operation + 80006294: 40006033 orn x0,x0,x0 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkb_orn_cg_cmp_rd_rs1_rs2_b0, Zbkb_orn_cg_cmp_rd_rs1_rs2_b0_str) + 80006298: 0004b203 ld x4,0(x9) + 8000629c: 00020c63 beq x4,x0,800062b4 + 800062a0: 261012ef jal x5,80007d00 + 800062a4: 80006294 .word 0x80006294 + 800062a8: 00000000 .word 0x00000000 + 800062ac: 80017892 .word 0x80017892 + 800062b0: 00000000 .word 0x00000000 + 800062b4: 00848493 addi x9,x9,8 + + mv x12, x1 # switch data pointer register to avoid conflict with test + 800062b8: 00008613 addi x12,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x5f374280c6e9a39a + 800062bc: 00063083 ld x1,0(x12) + 800062c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xe59c8ff827979ff0 + 800062c4: 00063083 ld x1,0(x12) + 800062c8: 00860613 addi x12,x12,8 + +00000000800062cc : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b1: + orn x1, x1, x1 # perform operation + 800062cc: 4010e0b3 orn x1,x1,x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_orn_cg_cmp_rd_rs1_rs2_b1, Zbkb_orn_cg_cmp_rd_rs1_rs2_b1_str) + 800062d0: 0004b203 ld x4,0(x9) + 800062d4: 00120c63 beq x4,x1,800062ec + 800062d8: 229012ef jal x5,80007d00 + 800062dc: 800062cc .word 0x800062cc + 800062e0: 00000000 .word 0x00000000 + 800062e4: 800178cc .word 0x800178cc + 800062e8: 00000000 .word 0x00000000 + 800062ec: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x35fd024f5842c804 + 800062f0: 00063103 ld x2,0(x12) + 800062f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x1e5e7c2e1614b597 + 800062f8: 00063103 ld x2,0(x12) + 800062fc: 00860613 addi x12,x12,8 + +0000000080006300 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b2: + orn x2, x2, x2 # perform operation + 80006300: 40216133 orn x2,x2,x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_orn_cg_cmp_rd_rs1_rs2_b2, Zbkb_orn_cg_cmp_rd_rs1_rs2_b2_str) + 80006304: 0004b203 ld x4,0(x9) + 80006308: 00220c63 beq x4,x2,80006320 + 8000630c: 1f5012ef jal x5,80007d00 + 80006310: 80006300 .word 0x80006300 + 80006314: 00000000 .word 0x00000000 + 80006318: 80017906 .word 0x80017906 + 8000631c: 00000000 .word 0x00000000 + 80006320: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xc3b136ff12d4b7b6 + 80006324: 00063183 ld x3,0(x12) + 80006328: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xe7ab34578f6b827e + 8000632c: 00063183 ld x3,0(x12) + 80006330: 00860613 addi x12,x12,8 + +0000000080006334 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b3: + orn x3, x3, x3 # perform operation + 80006334: 4031e1b3 orn x3,x3,x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkb_orn_cg_cmp_rd_rs1_rs2_b3, Zbkb_orn_cg_cmp_rd_rs1_rs2_b3_str) + 80006338: 0004b203 ld x4,0(x9) + 8000633c: 00320c63 beq x4,x3,80006354 + 80006340: 1c1012ef jal x5,80007d00 + 80006344: 80006334 .word 0x80006334 + 80006348: 00000000 .word 0x00000000 + 8000634c: 80017940 .word 0x80017940 + 80006350: 00000000 .word 0x00000000 + 80006354: 00848493 addi x9,x9,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80006358: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000635c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xb283ed2ce29ebf7c + 80006360: 00063203 ld x4,0(x12) + 80006364: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x0e8edd7a853d6f90 + 80006368: 00063203 ld x4,0(x12) + 8000636c: 00860613 addi x12,x12,8 + +0000000080006370 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b4: + orn x4, x4, x4 # perform operation + 80006370: 40426233 orn x4,x4,x4 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkb_orn_cg_cmp_rd_rs1_rs2_b4, Zbkb_orn_cg_cmp_rd_rs1_rs2_b4_str) + 80006374: 0004b383 ld x7,0(x9) + 80006378: 00438c63 beq x7,x4,80006390 + 8000637c: 19d0146f jal x8,80007d18 + 80006380: 80006370 .word 0x80006370 + 80006384: 00000000 .word 0x00000000 + 80006388: 8001797a .word 0x8001797a + 8000638c: 00000000 .word 0x00000000 + 80006390: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xaf8096277c828302 + 80006394: 00063283 ld x5,0(x12) + 80006398: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xd86b2168756a05af + 8000639c: 00063283 ld x5,0(x12) + 800063a0: 00860613 addi x12,x12,8 + +00000000800063a4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b5: + orn x5, x5, x5 # perform operation + 800063a4: 4052e2b3 orn x5,x5,x5 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkb_orn_cg_cmp_rd_rs1_rs2_b5, Zbkb_orn_cg_cmp_rd_rs1_rs2_b5_str) + 800063a8: 0004b383 ld x7,0(x9) + 800063ac: 00538c63 beq x7,x5,800063c4 + 800063b0: 1690146f jal x8,80007d18 + 800063b4: 800063a4 .word 0x800063a4 + 800063b8: 00000000 .word 0x00000000 + 800063bc: 800179b4 .word 0x800179b4 + 800063c0: 00000000 .word 0x00000000 + 800063c4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x9f1ccb1d64413165 + 800063c8: 00063303 ld x6,0(x12) + 800063cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x3d5e8aa9c58f5001 + 800063d0: 00063303 ld x6,0(x12) + 800063d4: 00860613 addi x12,x12,8 + +00000000800063d8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b6: + orn x6, x6, x6 # perform operation + 800063d8: 40636333 orn x6,x6,x6 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkb_orn_cg_cmp_rd_rs1_rs2_b6, Zbkb_orn_cg_cmp_rd_rs1_rs2_b6_str) + 800063dc: 0004b383 ld x7,0(x9) + 800063e0: 00638c63 beq x7,x6,800063f8 + 800063e4: 1350146f jal x8,80007d18 + 800063e8: 800063d8 .word 0x800063d8 + 800063ec: 00000000 .word 0x00000000 + 800063f0: 800179ee .word 0x800179ee + 800063f4: 00000000 .word 0x00000000 + 800063f8: 00848493 addi x9,x9,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800063fc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80006400: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x6bbc0e3d00a4cc54 + 80006404: 00063383 ld x7,0(x12) + 80006408: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xba8e9fd092039a90 + 8000640c: 00063383 ld x7,0(x12) + 80006410: 00860613 addi x12,x12,8 + +0000000080006414 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b7: + orn x7, x7, x7 # perform operation + 80006414: 4073e3b3 orn x7,x7,x7 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkb_orn_cg_cmp_rd_rs1_rs2_b7, Zbkb_orn_cg_cmp_rd_rs1_rs2_b7_str) + 80006418: 0004b683 ld x13,0(x9) + 8000641c: 00768c63 beq x13,x7,80006434 + 80006420: 1210176f jal x14,80007d40 + 80006424: 80006414 .word 0x80006414 + 80006428: 00000000 .word 0x00000000 + 8000642c: 80017a28 .word 0x80017a28 + 80006430: 00000000 .word 0x00000000 + 80006434: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x1ebe17fcd7b64a16 + 80006438: 00063403 ld x8,0(x12) + 8000643c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x9da105164eec4540 + 80006440: 00063403 ld x8,0(x12) + 80006444: 00860613 addi x12,x12,8 + +0000000080006448 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b8: + orn x8, x8, x8 # perform operation + 80006448: 40846433 orn x8,x8,x8 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zbkb_orn_cg_cmp_rd_rs1_rs2_b8, Zbkb_orn_cg_cmp_rd_rs1_rs2_b8_str) + 8000644c: 0004b683 ld x13,0(x9) + 80006450: 00868c63 beq x13,x8,80006468 + 80006454: 0ed0176f jal x14,80007d40 + 80006458: 80006448 .word 0x80006448 + 8000645c: 00000000 .word 0x00000000 + 80006460: 80017a62 .word 0x80017a62 + 80006464: 00000000 .word 0x00000000 + 80006468: 00848493 addi x9,x9,8 + + mv x15, x9 # switch signature pointer register to avoid conflict with test + 8000646c: 00048793 addi x15,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x08ff768e42396049 + 80006470: 00063483 ld x9,0(x12) + 80006474: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xcf68de9b4d837705 + 80006478: 00063483 ld x9,0(x12) + 8000647c: 00860613 addi x12,x12,8 + +0000000080006480 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b9: + orn x9, x9, x9 # perform operation + 80006480: 4094e4b3 orn x9,x9,x9 + # Check if x9 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x9, Zbkb_orn_cg_cmp_rd_rs1_rs2_b9, Zbkb_orn_cg_cmp_rd_rs1_rs2_b9_str) + 80006484: 0007b683 ld x13,0(x15) + 80006488: 00968c63 beq x13,x9,800064a0 + 8000648c: 0b50176f jal x14,80007d40 + 80006490: 80006480 .word 0x80006480 + 80006494: 00000000 .word 0x00000000 + 80006498: 80017a9c .word 0x80017a9c + 8000649c: 00000000 .word 0x00000000 + 800064a0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x8750490d083d7d70 + 800064a4: 00063503 ld x10,0(x12) + 800064a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x8a059964e4e1cb62 + 800064ac: 00063503 ld x10,0(x12) + 800064b0: 00860613 addi x12,x12,8 + +00000000800064b4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b10: + orn x10, x10, x10 # perform operation + 800064b4: 40a56533 orn x10,x10,x10 + # Check if x10 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x10, Zbkb_orn_cg_cmp_rd_rs1_rs2_b10, Zbkb_orn_cg_cmp_rd_rs1_rs2_b10_str) + 800064b8: 0007b683 ld x13,0(x15) + 800064bc: 00a68c63 beq x13,x10,800064d4 + 800064c0: 0810176f jal x14,80007d40 + 800064c4: 800064b4 .word 0x800064b4 + 800064c8: 00000000 .word 0x00000000 + 800064cc: 80017ad6 .word 0x80017ad6 + 800064d0: 00000000 .word 0x00000000 + 800064d4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x7badeca40ace4285 + 800064d8: 00063583 ld x11,0(x12) + 800064dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xbee3bbd47d0ebd6e + 800064e0: 00063583 ld x11,0(x12) + 800064e4: 00860613 addi x12,x12,8 + +00000000800064e8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b11: + orn x11, x11, x11 # perform operation + 800064e8: 40b5e5b3 orn x11,x11,x11 + # Check if x11 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x11, Zbkb_orn_cg_cmp_rd_rs1_rs2_b11, Zbkb_orn_cg_cmp_rd_rs1_rs2_b11_str) + 800064ec: 0007b683 ld x13,0(x15) + 800064f0: 00b68c63 beq x13,x11,80006508 + 800064f4: 04d0176f jal x14,80007d40 + 800064f8: 800064e8 .word 0x800064e8 + 800064fc: 00000000 .word 0x00000000 + 80006500: 80017b11 .word 0x80017b11 + 80006504: 00000000 .word 0x00000000 + 80006508: 00878793 addi x15,x15,8 + + mv x3, x12 # switch data pointer register to avoid conflict with test + 8000650c: 00060193 addi x3,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5e46e370a00fbd32 + 80006510: 0001b603 ld x12,0(x3) + 80006514: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x304d21b3646dc3a7 + 80006518: 0001b603 ld x12,0(x3) + 8000651c: 00818193 addi x3,x3,8 + +0000000080006520 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b12: + orn x12, x12, x12 # perform operation + 80006520: 40c66633 orn x12,x12,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkb_orn_cg_cmp_rd_rs1_rs2_b12, Zbkb_orn_cg_cmp_rd_rs1_rs2_b12_str) + 80006524: 0007b683 ld x13,0(x15) + 80006528: 00c68c63 beq x13,x12,80006540 + 8000652c: 0150176f jal x14,80007d40 + 80006530: 80006520 .word 0x80006520 + 80006534: 00000000 .word 0x00000000 + 80006538: 80017b4c .word 0x80017b4c + 8000653c: 00000000 .word 0x00000000 + 80006540: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006544: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006548: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x708f9456b4c9257a + 8000654c: 0001b683 ld x13,0(x3) + 80006550: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xc017cfcd0abd90dc + 80006554: 0001b683 ld x13,0(x3) + 80006558: 00818193 addi x3,x3,8 + +000000008000655c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b13: + orn x13, x13, x13 # perform operation + 8000655c: 40d6e6b3 orn x13,x13,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_orn_cg_cmp_rd_rs1_rs2_b13, Zbkb_orn_cg_cmp_rd_rs1_rs2_b13_str) + 80006560: 0007b383 ld x7,0(x15) + 80006564: 00d38c63 beq x7,x13,8000657c + 80006568: 7b00146f jal x8,80007d18 + 8000656c: 8000655c .word 0x8000655c + 80006570: 00000000 .word 0x00000000 + 80006574: 80017b87 .word 0x80017b87 + 80006578: 00000000 .word 0x00000000 + 8000657c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x4fc2955a2a6545ae + 80006580: 0001b703 ld x14,0(x3) + 80006584: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7356ddebd2c040c9 + 80006588: 0001b703 ld x14,0(x3) + 8000658c: 00818193 addi x3,x3,8 + +0000000080006590 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b14: + orn x14, x14, x14 # perform operation + 80006590: 40e76733 orn x14,x14,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_orn_cg_cmp_rd_rs1_rs2_b14, Zbkb_orn_cg_cmp_rd_rs1_rs2_b14_str) + 80006594: 0007b383 ld x7,0(x15) + 80006598: 00e38c63 beq x7,x14,800065b0 + 8000659c: 77c0146f jal x8,80007d18 + 800065a0: 80006590 .word 0x80006590 + 800065a4: 00000000 .word 0x00000000 + 800065a8: 80017bc2 .word 0x80017bc2 + 800065ac: 00000000 .word 0x00000000 + 800065b0: 00878793 addi x15,x15,8 + + mv x22, x15 # switch signature pointer register to avoid conflict with test + 800065b4: 00078b13 addi x22,x15,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x65ac8e52878481f8 + 800065b8: 0001b783 ld x15,0(x3) + 800065bc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x34c7a705a846591d + 800065c0: 0001b783 ld x15,0(x3) + 800065c4: 00818193 addi x3,x3,8 + +00000000800065c8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b15: + orn x15, x15, x15 # perform operation + 800065c8: 40f7e7b3 orn x15,x15,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zbkb_orn_cg_cmp_rd_rs1_rs2_b15, Zbkb_orn_cg_cmp_rd_rs1_rs2_b15_str) + 800065cc: 000b3383 ld x7,0(x22) + 800065d0: 00f38c63 beq x7,x15,800065e8 + 800065d4: 7440146f jal x8,80007d18 + 800065d8: 800065c8 .word 0x800065c8 + 800065dc: 00000000 .word 0x00000000 + 800065e0: 80017bfd .word 0x80017bfd + 800065e4: 00000000 .word 0x00000000 + 800065e8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xfbad32a18ad8475c + 800065ec: 0001b803 ld x16,0(x3) + 800065f0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x8e607c1d9d92c538 + 800065f4: 0001b803 ld x16,0(x3) + 800065f8: 00818193 addi x3,x3,8 + +00000000800065fc : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b16: + orn x16, x16, x16 # perform operation + 800065fc: 41086833 orn x16,x16,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zbkb_orn_cg_cmp_rd_rs1_rs2_b16, Zbkb_orn_cg_cmp_rd_rs1_rs2_b16_str) + 80006600: 000b3383 ld x7,0(x22) + 80006604: 01038c63 beq x7,x16,8000661c + 80006608: 7100146f jal x8,80007d18 + 8000660c: 800065fc .word 0x800065fc + 80006610: 00000000 .word 0x00000000 + 80006614: 80017c38 .word 0x80017c38 + 80006618: 00000000 .word 0x00000000 + 8000661c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x8405b31535445da8 + 80006620: 0001b883 ld x17,0(x3) + 80006624: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x13f6b42e66343c52 + 80006628: 0001b883 ld x17,0(x3) + 8000662c: 00818193 addi x3,x3,8 + +0000000080006630 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b17: + orn x17, x17, x17 # perform operation + 80006630: 4118e8b3 orn x17,x17,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zbkb_orn_cg_cmp_rd_rs1_rs2_b17, Zbkb_orn_cg_cmp_rd_rs1_rs2_b17_str) + 80006634: 000b3383 ld x7,0(x22) + 80006638: 01138c63 beq x7,x17,80006650 + 8000663c: 6dc0146f jal x8,80007d18 + 80006640: 80006630 .word 0x80006630 + 80006644: 00000000 .word 0x00000000 + 80006648: 80017c73 .word 0x80017c73 + 8000664c: 00000000 .word 0x00000000 + 80006650: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0xfaaaabc963752df0 + 80006654: 0001b903 ld x18,0(x3) + 80006658: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x7c9560eb932c356c + 8000665c: 0001b903 ld x18,0(x3) + 80006660: 00818193 addi x3,x3,8 + +0000000080006664 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b18: + orn x18, x18, x18 # perform operation + 80006664: 41296933 orn x18,x18,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zbkb_orn_cg_cmp_rd_rs1_rs2_b18, Zbkb_orn_cg_cmp_rd_rs1_rs2_b18_str) + 80006668: 000b3383 ld x7,0(x22) + 8000666c: 01238c63 beq x7,x18,80006684 + 80006670: 6a80146f jal x8,80007d18 + 80006674: 80006664 .word 0x80006664 + 80006678: 00000000 .word 0x00000000 + 8000667c: 80017cae .word 0x80017cae + 80006680: 00000000 .word 0x00000000 + 80006684: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x062603bda8cae7b7 + 80006688: 0001b983 ld x19,0(x3) + 8000668c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x5c3152072fdfabf5 + 80006690: 0001b983 ld x19,0(x3) + 80006694: 00818193 addi x3,x3,8 + +0000000080006698 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b19: + orn x19, x19, x19 # perform operation + 80006698: 4139e9b3 orn x19,x19,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zbkb_orn_cg_cmp_rd_rs1_rs2_b19, Zbkb_orn_cg_cmp_rd_rs1_rs2_b19_str) + 8000669c: 000b3383 ld x7,0(x22) + 800066a0: 01338c63 beq x7,x19,800066b8 + 800066a4: 6740146f jal x8,80007d18 + 800066a8: 80006698 .word 0x80006698 + 800066ac: 00000000 .word 0x00000000 + 800066b0: 80017ce9 .word 0x80017ce9 + 800066b4: 00000000 .word 0x00000000 + 800066b8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x12bd0179dce9e547 + 800066bc: 0001ba03 ld x20,0(x3) + 800066c0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x98e21c58c537d041 + 800066c4: 0001ba03 ld x20,0(x3) + 800066c8: 00818193 addi x3,x3,8 + +00000000800066cc : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b20: + orn x20, x20, x20 # perform operation + 800066cc: 414a6a33 orn x20,x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zbkb_orn_cg_cmp_rd_rs1_rs2_b20, Zbkb_orn_cg_cmp_rd_rs1_rs2_b20_str) + 800066d0: 000b3383 ld x7,0(x22) + 800066d4: 01438c63 beq x7,x20,800066ec + 800066d8: 6400146f jal x8,80007d18 + 800066dc: 800066cc .word 0x800066cc + 800066e0: 00000000 .word 0x00000000 + 800066e4: 80017d24 .word 0x80017d24 + 800066e8: 00000000 .word 0x00000000 + 800066ec: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xa487c59a19c4843f + 800066f0: 0001ba83 ld x21,0(x3) + 800066f4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xa04eb5128c88cea0 + 800066f8: 0001ba83 ld x21,0(x3) + 800066fc: 00818193 addi x3,x3,8 + +0000000080006700 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b21: + orn x21, x21, x21 # perform operation + 80006700: 415aeab3 orn x21,x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zbkb_orn_cg_cmp_rd_rs1_rs2_b21, Zbkb_orn_cg_cmp_rd_rs1_rs2_b21_str) + 80006704: 000b3383 ld x7,0(x22) + 80006708: 01538c63 beq x7,x21,80006720 + 8000670c: 60c0146f jal x8,80007d18 + 80006710: 80006700 .word 0x80006700 + 80006714: 00000000 .word 0x00000000 + 80006718: 80017d5f .word 0x80017d5f + 8000671c: 00000000 .word 0x00000000 + 80006720: 008b0b13 addi x22,x22,8 + + mv x15, x22 # switch signature pointer register to avoid conflict with test + 80006724: 000b0793 addi x15,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x11661b79bab23e6b + 80006728: 0001bb03 ld x22,0(x3) + 8000672c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x522bfb55abb1ed6f + 80006730: 0001bb03 ld x22,0(x3) + 80006734: 00818193 addi x3,x3,8 + +0000000080006738 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b22: + orn x22, x22, x22 # perform operation + 80006738: 416b6b33 orn x22,x22,x22 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_orn_cg_cmp_rd_rs1_rs2_b22, Zbkb_orn_cg_cmp_rd_rs1_rs2_b22_str) + 8000673c: 0007b383 ld x7,0(x15) + 80006740: 01638c63 beq x7,x22,80006758 + 80006744: 5d40146f jal x8,80007d18 + 80006748: 80006738 .word 0x80006738 + 8000674c: 00000000 .word 0x00000000 + 80006750: 80017d9a .word 0x80017d9a + 80006754: 00000000 .word 0x00000000 + 80006758: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xef00eb5b8396f069 + 8000675c: 0001bb83 ld x23,0(x3) + 80006760: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x2bda64dcae6bd211 + 80006764: 0001bb83 ld x23,0(x3) + 80006768: 00818193 addi x3,x3,8 + +000000008000676c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b23: + orn x23, x23, x23 # perform operation + 8000676c: 417bebb3 orn x23,x23,x23 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_orn_cg_cmp_rd_rs1_rs2_b23, Zbkb_orn_cg_cmp_rd_rs1_rs2_b23_str) + 80006770: 0007b383 ld x7,0(x15) + 80006774: 01738c63 beq x7,x23,8000678c + 80006778: 5a00146f jal x8,80007d18 + 8000677c: 8000676c .word 0x8000676c + 80006780: 00000000 .word 0x00000000 + 80006784: 80017dd5 .word 0x80017dd5 + 80006788: 00000000 .word 0x00000000 + 8000678c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x9288c2b759f8e93d + 80006790: 0001bc03 ld x24,0(x3) + 80006794: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x509ec1a0b83a3376 + 80006798: 0001bc03 ld x24,0(x3) + 8000679c: 00818193 addi x3,x3,8 + +00000000800067a0 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b24: + orn x24, x24, x24 # perform operation + 800067a0: 418c6c33 orn x24,x24,x24 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_orn_cg_cmp_rd_rs1_rs2_b24, Zbkb_orn_cg_cmp_rd_rs1_rs2_b24_str) + 800067a4: 0007b383 ld x7,0(x15) + 800067a8: 01838c63 beq x7,x24,800067c0 + 800067ac: 56c0146f jal x8,80007d18 + 800067b0: 800067a0 .word 0x800067a0 + 800067b4: 00000000 .word 0x00000000 + 800067b8: 80017e10 .word 0x80017e10 + 800067bc: 00000000 .word 0x00000000 + 800067c0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x367aab26dd2b27ef + 800067c4: 0001bc83 ld x25,0(x3) + 800067c8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x650d64dc578cddc8 + 800067cc: 0001bc83 ld x25,0(x3) + 800067d0: 00818193 addi x3,x3,8 + +00000000800067d4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b25: + orn x25, x25, x25 # perform operation + 800067d4: 419cecb3 orn x25,x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_orn_cg_cmp_rd_rs1_rs2_b25, Zbkb_orn_cg_cmp_rd_rs1_rs2_b25_str) + 800067d8: 0007b383 ld x7,0(x15) + 800067dc: 01938c63 beq x7,x25,800067f4 + 800067e0: 5380146f jal x8,80007d18 + 800067e4: 800067d4 .word 0x800067d4 + 800067e8: 00000000 .word 0x00000000 + 800067ec: 80017e4b .word 0x80017e4b + 800067f0: 00000000 .word 0x00000000 + 800067f4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xbb81f2da1383c2c4 + 800067f8: 0001bd03 ld x26,0(x3) + 800067fc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xc0e505346e947b30 + 80006800: 0001bd03 ld x26,0(x3) + 80006804: 00818193 addi x3,x3,8 + +0000000080006808 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b26: + orn x26, x26, x26 # perform operation + 80006808: 41ad6d33 orn x26,x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_orn_cg_cmp_rd_rs1_rs2_b26, Zbkb_orn_cg_cmp_rd_rs1_rs2_b26_str) + 8000680c: 0007b383 ld x7,0(x15) + 80006810: 01a38c63 beq x7,x26,80006828 + 80006814: 5040146f jal x8,80007d18 + 80006818: 80006808 .word 0x80006808 + 8000681c: 00000000 .word 0x00000000 + 80006820: 80017e86 .word 0x80017e86 + 80006824: 00000000 .word 0x00000000 + 80006828: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x38a3838790df1d65 + 8000682c: 0001bd83 ld x27,0(x3) + 80006830: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x06e03cf97e2b1c6f + 80006834: 0001bd83 ld x27,0(x3) + 80006838: 00818193 addi x3,x3,8 + +000000008000683c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b27: + orn x27, x27, x27 # perform operation + 8000683c: 41bdedb3 orn x27,x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_orn_cg_cmp_rd_rs1_rs2_b27, Zbkb_orn_cg_cmp_rd_rs1_rs2_b27_str) + 80006840: 0007b383 ld x7,0(x15) + 80006844: 01b38c63 beq x7,x27,8000685c + 80006848: 4d00146f jal x8,80007d18 + 8000684c: 8000683c .word 0x8000683c + 80006850: 00000000 .word 0x00000000 + 80006854: 80017ec1 .word 0x80017ec1 + 80006858: 00000000 .word 0x00000000 + 8000685c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x8ed1bff26055e1b0 + 80006860: 0001be03 ld x28,0(x3) + 80006864: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xaeacebcbde7100c5 + 80006868: 0001be03 ld x28,0(x3) + 8000686c: 00818193 addi x3,x3,8 + +0000000080006870 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b28: + orn x28, x28, x28 # perform operation + 80006870: 41ce6e33 orn x28,x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_orn_cg_cmp_rd_rs1_rs2_b28, Zbkb_orn_cg_cmp_rd_rs1_rs2_b28_str) + 80006874: 0007b383 ld x7,0(x15) + 80006878: 01c38c63 beq x7,x28,80006890 + 8000687c: 49c0146f jal x8,80007d18 + 80006880: 80006870 .word 0x80006870 + 80006884: 00000000 .word 0x00000000 + 80006888: 80017efc .word 0x80017efc + 8000688c: 00000000 .word 0x00000000 + 80006890: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xe07b9f1f013188e8 + 80006894: 0001be83 ld x29,0(x3) + 80006898: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0853414eec84a8fe + 8000689c: 0001be83 ld x29,0(x3) + 800068a0: 00818193 addi x3,x3,8 + +00000000800068a4 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b29: + orn x29, x29, x29 # perform operation + 800068a4: 41deeeb3 orn x29,x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_orn_cg_cmp_rd_rs1_rs2_b29, Zbkb_orn_cg_cmp_rd_rs1_rs2_b29_str) + 800068a8: 0007b383 ld x7,0(x15) + 800068ac: 01d38c63 beq x7,x29,800068c4 + 800068b0: 4680146f jal x8,80007d18 + 800068b4: 800068a4 .word 0x800068a4 + 800068b8: 00000000 .word 0x00000000 + 800068bc: 80017f37 .word 0x80017f37 + 800068c0: 00000000 .word 0x00000000 + 800068c4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xd6802cb4029e19c9 + 800068c8: 0001bf03 ld x30,0(x3) + 800068cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xbc316876b41e7b50 + 800068d0: 0001bf03 ld x30,0(x3) + 800068d4: 00818193 addi x3,x3,8 + +00000000800068d8 : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b30: + orn x30, x30, x30 # perform operation + 800068d8: 41ef6f33 orn x30,x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_orn_cg_cmp_rd_rs1_rs2_b30, Zbkb_orn_cg_cmp_rd_rs1_rs2_b30_str) + 800068dc: 0007b383 ld x7,0(x15) + 800068e0: 01e38c63 beq x7,x30,800068f8 + 800068e4: 4340146f jal x8,80007d18 + 800068e8: 800068d8 .word 0x800068d8 + 800068ec: 00000000 .word 0x00000000 + 800068f0: 80017f72 .word 0x80017f72 + 800068f4: 00000000 .word 0x00000000 + 800068f8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x2956f3e0d3f01277 + 800068fc: 0001bf83 ld x31,0(x3) + 80006900: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x7b494dd1cda8740b + 80006904: 0001bf83 ld x31,0(x3) + 80006908: 00818193 addi x3,x3,8 + +000000008000690c : +Zbkb_orn_cg_cmp_rd_rs1_rs2_b31: + orn x31, x31, x31 # perform operation + 8000690c: 41ffefb3 orn x31,x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_orn_cg_cmp_rd_rs1_rs2_b31, Zbkb_orn_cg_cmp_rd_rs1_rs2_b31_str) + 80006910: 0007b383 ld x7,0(x15) + 80006914: 01f38c63 beq x7,x31,8000692c + 80006918: 4000146f jal x8,80007d18 + 8000691c: 8000690c .word 0x8000690c + 80006920: 00000000 .word 0x00000000 + 80006924: 80017fad .word 0x80017fad + 80006928: 00000000 .word 0x00000000 + 8000692c: 00878793 addi x15,x15,8 + + mv x2, x15 # restore signature pointer to default register for teardown + 80006930: 00078113 addi x2,x15,0 + +0000000080006934 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006934: 00000513 addi x10,x0,0 + 80006938: 00000073 ecall + 8000693c: fff00513 addi x10,x0,-1 + 80006940: 25800413 addi x8,x0,600 + +0000000080006944 : + 80006944: 34002373 csrrs x6,mscratch,x0 + +0000000080006948 : + 80006948: 2b833383 ld x7,696(x6) + +000000008000694c : + 8000694c: 2a033383 ld x7,672(x6) + +0000000080006950 : + 80006950: 2d033483 ld x9,720(x6) + 80006954: 34049073 csrrw x0,mscratch,x9 + +0000000080006958 : + 80006958: 2c833483 ld x9,712(x6) + 8000695c: 305493f3 csrrw x7,mtvec,x9 + 80006960: ffc4f493 andi x9,x9,-4 + 80006964: ffc3f393 andi x7,x7,-4 + 80006968: 00749e63 bne x9,x7,80006984 + +000000008000696c : + 8000696c: 00030493 addi x9,x6,0 + +0000000080006970 : + 80006970: 0004a783 lw x15,0(x9) + 80006974: 00f3a023 sw x15,0(x7) + 80006978: 00438393 addi x7,x7,4 + 8000697c: 00448493 addi x9,x9,4 + 80006980: fe83c8e3 blt x7,x8,80006970 + 80006984: 0000100f fence.i + +0000000080006988 : + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 00000497 auipc x9,0x0 + 800069a4: 2b048493 addi x9,x9,688 # 80006c50 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 10e49863 bne x9,x14,80006ad0 + 800069c4: 00000013 addi x0,x0,0 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00012517 auipc x10,0x12 + 800069e4: d2d50513 addi x10,x10,-723 # 8001870d + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00033097 auipc x1,0x33 + 80006a04: ba4080e7 jalr x1,-1116(x1) # 800395a4 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00012517 auipc x10,0x12 + 80006a24: d2550513 addi x10,x10,-731 # 80018745 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00033097 auipc x1,0x33 + 80006a44: b64080e7 jalr x1,-1180(x1) # 800395a4 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00012517 auipc x10,0x12 + 80006a64: d4550513 addi x10,x10,-699 # 800187a5 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00033097 auipc x1,0x33 + 80006a84: b24080e7 jalr x1,-1244(x1) # 800395a4 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00013517 auipc x10,0x13 + 80006aa4: 8b050513 addi x10,x10,-1872 # 80019350 + 80006aa8: 00000013 addi x0,x0,0 + 80006aac: 00000013 addi x0,x0,0 + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00033097 auipc x1,0x33 + 80006ac4: ae4080e7 jalr x1,-1308(x1) # 800395a4 + 80006ac8: 00033097 auipc x1,0x33 + 80006acc: b3c080e7 jalr x1,-1220(x1) # 80039604 + +0000000080006ad0 : + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00006317 auipc x6,0x6 + 80006ae4: 8c830313 addi x6,x6,-1848 # 8000c3a8 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00033303 ld x6,0(x6) + 80006b04: 00000013 addi x0,x0,0 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 00014397 auipc x7,0x14 + 80006b24: 32038393 addi x7,x7,800 # 8001ae40 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 40730333 sub x6,x6,x7 + 80006b44: 00000013 addi x0,x0,0 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00014417 auipc x8,0x14 + 80006b64: 2d040413 addi x8,x8,720 # 8001ae30 + 80006b68: 00000013 addi x0,x0,0 + 80006b6c: 00000013 addi x0,x0,0 + 80006b70: 00000013 addi x0,x0,0 + 80006b74: 00000013 addi x0,x0,0 + 80006b78: 00000013 addi x0,x0,0 + 80006b7c: 00000013 addi x0,x0,0 + 80006b80: 00043203 ld x4,0(x8) + 80006b84: 00620c63 beq x4,x6,80006b9c + 80006b88: 1e0013ef jal x7,80007d68 + 80006b8c: 80006ad0 .word 0x80006ad0 + 80006b90: 00000000 .word 0x00000000 + 80006b94: 800188f9 .word 0x800188f9 + 80006b98: 00000000 .word 0x00000000 + +0000000080006b9c : + 80006b9c: 000004b7 lui x9,0x0 + 80006ba0: 00048493 addi x9,x9,0 # 0 + 80006ba4: 00b49493 slli x9,x9,0xb + 80006ba8: 5d648493 addi x9,x9,1494 + 80006bac: 00b49493 slli x9,x9,0xb + 80006bb0: 43748493 addi x9,x9,1079 + 80006bb4: 00a49493 slli x9,x9,0xa + 80006bb8: 2ad48493 addi x9,x9,685 + 80006bbc: 00e49e63 bne x9,x14,80006bd8 + 80006bc0: 1a8013ef jal x7,80007d68 + 80006bc4: 80006c84 .word 0x80006c84 + 80006bc8: 00000000 .word 0x00000000 + 80006bcc: 80018767 .word 0x80018767 + 80006bd0: 00000000 .word 0x00000000 + 80006bd4: 00000341 .word 0x00000341 + +0000000080006bd8 : + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00012517 auipc x10,0x12 + 80006be4: af450513 addi x10,x10,-1292 # 800186d4 + 80006be8: 00000013 addi x0,x0,0 + 80006bec: 00000013 addi x0,x0,0 + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00033097 auipc x1,0x33 + 80006c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80006c08: 00033097 auipc x1,0x33 + 80006c0c: 9dc080e7 jalr x1,-1572(x1) # 800395e4 + +0000000080006c10 : + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00012517 auipc x10,0x12 + 80006c24: aed50513 addi x10,x10,-1299 # 8001870d + 80006c28: 00000013 addi x0,x0,0 + 80006c2c: 00000013 addi x0,x0,0 + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00033097 auipc x1,0x33 + 80006c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80006c48: 00033097 auipc x1,0x33 + 80006c4c: 9bc080e7 jalr x1,-1604(x1) # 80039604 + +0000000080006c50 : + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: 00000717 auipc x14,0x0 + 80006c64: ff070713 addi x14,x14,-16 # 80006c50 + 80006c68: 00000013 addi x0,x0,0 + 80006c6c: 00000013 addi x0,x0,0 + 80006c70: 00000013 addi x0,x0,0 + 80006c74: 00000013 addi x0,x0,0 + 80006c78: 00000013 addi x0,x0,0 + 80006c7c: 00000013 addi x0,x0,0 + 80006c80: cb5ff06f jal x0,80006934 + +0000000080006c84 : + 80006c84: 00000737 lui x14,0x0 + 80006c88: 00070713 addi x14,x14,0 # 0 + 80006c8c: 00b71713 slli x14,x14,0xb + 80006c90: 5d670713 addi x14,x14,1494 + 80006c94: 00b71713 slli x14,x14,0xb + 80006c98: 43770713 addi x14,x14,1079 + 80006c9c: 00a71713 slli x14,x14,0xa + 80006ca0: 2ad70713 addi x14,x14,685 + 80006ca4: c91ff06f jal x0,80006934 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: aa830313 addi x6,x6,-1368 # 80006988 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: ca750513 addi x10,x10,-857 # 80019d87 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 03850513 addi x10,x10,56 # 80018158 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00011517 auipc x10,0x11 + 80007164: 6ae50513 addi x10,x10,1710 # 8001880e + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00011517 auipc x10,0x11 + 800071a4: 56d50513 addi x10,x10,1389 # 8001870d + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: b9848493 addi x9,x9,-1128 # 80018138 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: d2840413 addi x8,x8,-728 # 80038308 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e4946663 bltu x8,x9,80006c50 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018910 .word 0x80018910 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018a12 .word 0x80018a12 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d2f47a63 bgeu x8,x15,80006c84 + 80007754: d2746863 bltu x8,x7,80006c84 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018b0d .word 0x80018b0d + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80018c00 .word 0x80018c00 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80018d73 .word 0x80018d73 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bfcff06f jal x0,80006c84 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 2f020213 addi x4,x4,752 # 80017ff0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 2d838393 addi x7,x7,728 # 80017ff0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 2b068693 addi x13,x13,688 # 80017ff0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 28848493 addi x9,x9,648 # 80017ff0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 1e44a483 lw x9,484(x9) # 80017ff0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: f1040413 addi x8,x8,-240 # 80019dd0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00030417 auipc x8,0x30 + 80007f04: 41040413 addi x8,x8,1040 # 80038310 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 1d848493 addi x9,x9,472 # 80018118 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 19848493 addi x9,x9,408 # 80018118 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 16c80813 addi x16,x16,364 # 80018128 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 14c80813 addi x16,x16,332 # 80018128 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: 91138393 addi x7,x7,-1775 # 800188f9 + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 12880813 addi x16,x16,296 # 80018120 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: 90c38393 addi x7,x7,-1780 # 80018910 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: 9f638393 addi x7,x7,-1546 # 80018a12 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: ad938393 addi x7,x7,-1319 # 80018b0d + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: bb438393 addi x7,x7,-1100 # 80018c00 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: d0f38393 addi x7,x7,-753 # 80018d73 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: c7b38393 addi x7,x7,-901 # 80018cf7 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: ca138393 addi x7,x7,-863 # 80018d35 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: 8a438393 addi x7,x7,-1884 # 80018950 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: 98c38393 addi x7,x7,-1652 # 80018a50 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: a6d38393 addi x7,x7,-1427 # 80018b49 + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: b4938393 addi x7,x7,-1207 # 80018c3d + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: ca238393 addi x7,x7,-862 # 80018dae + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: 86c38393 addi x7,x7,-1940 # 80018990 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: 95238393 addi x7,x7,-1710 # 80018a8e + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: a3138393 addi x7,x7,-1487 # 80018b85 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: b0e38393 addi x7,x7,-1266 # 80018c7a + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: c6538393 addi x7,x7,-923 # 80018de9 + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: 83538393 addi x7,x7,-1995 # 800189d1 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: 91938393 addi x7,x7,-1767 # 80018acd + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: 9f638393 addi x7,x7,-1546 # 80018bc2 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: ad438393 addi x7,x7,-1324 # 80018cb8 + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: c2938393 addi x7,x7,-983 # 80018e25 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: c4e38393 addi x7,x7,-946 # 80018e62 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: c8538393 addi x7,x7,-891 # 80018eb1 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: d6838393 addi x7,x7,-664 # 80018fac + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: e4c38393 addi x7,x7,-436 # 800190a8 + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: ea480813 addi x16,x16,-348 # 80018120 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: e9480813 addi x16,x16,-364 # 80018120 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: e8c80813 addi x16,x16,-372 # 80018124 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: e7880813 addi x16,x16,-392 # 80018120 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00010517 auipc x10,0x10 + 80008304: 40d50513 addi x10,x10,1037 # 8001870d + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00010517 auipc x10,0x10 + 80008344: 40550513 addi x10,x10,1029 # 80018745 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00010517 auipc x10,0x10 + 80008384: 47c50513 addi x10,x10,1148 # 800187fc + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: d6853503 ld x10,-664(x10) # 80018110 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00010517 auipc x10,0x10 + 800083c4: 44e50513 addi x10,x10,1102 # 8001880e + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: c0852503 lw x10,-1016(x10) # 80017ff0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00010517 auipc x10,0x10 + 80008404: 41050513 addi x10,x10,1040 # 80018810 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: cc852503 lw x10,-824(x10) # 800180f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: cf850513 addi x10,x10,-776 # 80018158 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 38450513 addi x10,x10,900 # 80018824 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: c3053503 ld x10,-976(x10) # 800180f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: c7850513 addi x10,x10,-904 # 80018158 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: d3b50513 addi x10,x10,-709 # 8001925b + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: aa852503 lw x10,-1368(x10) # 80017ff0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: bf860613 addi x12,x12,-1032 # 80018158 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: b6c52503 lw x10,-1172(x10) # 800180f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: db150513 addi x10,x10,-591 # 80019371 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: b5860613 addi x12,x12,-1192 # 80018158 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: acc52503 lw x10,-1332(x10) # 800180f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: b1860613 addi x12,x12,-1256 # 80018158 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: a8c52503 lw x10,-1396(x10) # 800180f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: bd450513 addi x10,x10,-1068 # 80019254 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: a9850513 addi x10,x10,-1384 # 80018158 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: b6c50513 addi x10,x10,-1172 # 8001926c + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: 8c852503 lw x10,-1848(x10) # 80017ff0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: 9c853503 ld x10,-1592(x10) # 80018100 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: 9b453503 ld x10,-1612(x10) # 80018100 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: 9f850513 addi x10,x10,-1544 # 80018158 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: 99052503 lw x10,-1648(x10) # 80018118 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ae350513 addi x10,x10,-1309 # 80019283 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: 82852503 lw x10,-2008(x10) # 80017ff0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: 93053503 ld x10,-1744(x10) # 80018108 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: 91c53503 ld x10,-1764(x10) # 80018108 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: 95850513 addi x10,x10,-1704 # 80018158 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: a5a50513 addi x10,x10,-1446 # 8001929a + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: 8a053503 ld x10,-1888(x10) # 80018108 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: 8d850513 addi x10,x10,-1832 # 80018158 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: a3850513 addi x10,x10,-1480 # 800192f8 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: 82053503 ld x10,-2016(x10) # 80018108 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: 85850513 addi x10,x10,-1960 # 80018158 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 0000f417 auipc x8,0xf + 80008930: 7f442403 lw x8,2036(x8) # 80018120 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: a5d50513 addi x10,x10,-1443 # 8001939d + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: a4950513 addi x10,x10,-1463 # 800193c9 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 0000f817 auipc x16,0xf + 800089ac: 78080813 addi x16,x16,1920 # 80018128 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: e4e50513 addi x10,x10,-434 # 8001880e + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: 9d950513 addi x10,x10,-1575 # 800193d9 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 0000f517 auipc x10,0xf + 80008a2c: 6e053503 ld x10,1760(x10) # 80018108 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 0000f517 auipc x10,0xf + 80008a44: 71850513 addi x10,x10,1816 # 80018158 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: 98450513 addi x10,x10,-1660 # 80019404 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 0000f517 auipc x10,0xf + 80008aac: 65853503 ld x10,1624(x10) # 80018100 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 0000f517 auipc x10,0xf + 80008ac4: 69850513 addi x10,x10,1688 # 80018158 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 0000f317 auipc x6,0xf + 80008aec: 61833303 ld x6,1560(x6) # 80018100 + 80008af0: 0000f397 auipc x7,0xf + 80008af4: 6183b383 ld x7,1560(x7) # 80018108 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: 93350513 addi x10,x10,-1741 # 80019433 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: 95b50513 addi x10,x10,-1701 # 8001949b + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 0000f317 auipc x6,0xf + 80008b6c: 59833303 ld x6,1432(x6) # 80018100 + 80008b70: 0000f397 auipc x7,0xf + 80008b74: 5983b383 ld x7,1432(x7) # 80018108 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 0000f517 auipc x10,0xf + 80008ba4: 5b850513 addi x10,x10,1464 # 80018158 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: 8e250513 addi x10,x10,-1822 # 800194c2 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: 83f50513 addi x10,x10,-1985 # 8001945f + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: 83b50513 addi x10,x10,-1989 # 8001949b + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 0000f317 auipc x6,0xf + 80008c8c: 48033303 ld x6,1152(x6) # 80018108 + 80008c90: 0000f397 auipc x7,0xf + 80008c94: 4703b383 ld x7,1136(x7) # 80018100 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 0000f517 auipc x10,0xf + 80008cc4: 49850513 addi x10,x10,1176 # 80018158 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: 8aa50513 addi x10,x10,-1878 # 800195aa + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: 95150513 addi x10,x10,-1711 # 80019691 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 3bc52503 lw x10,956(x10) # 80018124 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: 92d50513 addi x10,x10,-1747 # 800196cd + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: 8cb50513 addi x10,x10,-1845 # 800196ab + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: 89350513 addi x10,x10,-1901 # 800196b3 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: 85b50513 addi x10,x10,-1957 # 800196bb + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: 82450513 addi x10,x10,-2012 # 800196c4 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00010517 auipc x10,0x10 + 80008ee4: 7f650513 addi x10,x10,2038 # 800196d6 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 21852503 lw x10,536(x10) # 80018120 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: 8cd50513 addi x10,x10,-1843 # 8001982d + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00010517 auipc x10,0x10 + 80008fa4: 75050513 addi x10,x10,1872 # 800196f0 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00010517 auipc x10,0x10 + 80008fe4: 74150513 addi x10,x10,1857 # 80019721 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00010517 auipc x10,0x10 + 80009024: 72150513 addi x10,x10,1825 # 80019741 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00010517 auipc x10,0x10 + 80009064: 6ff50513 addi x10,x10,1791 # 8001975f + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00010517 auipc x10,0x10 + 800090a4: 6de50513 addi x10,x10,1758 # 8001977e + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00010517 auipc x10,0x10 + 800090e4: 6c650513 addi x10,x10,1734 # 800197a6 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00010517 auipc x10,0x10 + 80009124: 6b250513 addi x10,x10,1714 # 800197d2 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00010517 auipc x10,0x10 + 80009164: 69e50513 addi x10,x10,1694 # 800197fe + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00010517 auipc x10,0x10 + 800091a4: 69c50513 addi x10,x10,1692 # 8001983c + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: f4053503 ld x10,-192(x10) # 80018108 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: f7850513 addi x10,x10,-136 # 80018158 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00010517 auipc x10,0x10 + 80009224: 63350513 addi x10,x10,1587 # 80019853 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: eb853503 ld x10,-328(x10) # 80018100 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: ef850513 addi x10,x10,-264 # 80018158 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: e9852503 lw x10,-360(x10) # 80018120 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00010517 auipc x10,0x10 + 800092a4: 5ca50513 addi x10,x10,1482 # 8001986a + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: e4053503 ld x10,-448(x10) # 80018108 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00010517 auipc x10,0x10 + 800092e4: 5a150513 addi x10,x10,1441 # 80019881 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: df853503 ld x10,-520(x10) # 80018100 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: dfc52503 lw x10,-516(x10) # 80018120 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00010517 auipc x10,0x10 + 80009344: 5b750513 addi x10,x10,1463 # 800198f7 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00010517 auipc x10,0x10 + 80009384: 64d50513 addi x10,x10,1613 # 800199cd + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00010517 auipc x10,0x10 + 800093c4: 70050513 addi x10,x10,1792 # 80019ac0 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00010517 auipc x10,0x10 + 80009404: 7bb50513 addi x10,x10,1979 # 80019bbb + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: 86250513 addi x10,x10,-1950 # 80019ca2 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00010517 auipc x10,0x10 + 80009484: 42f50513 addi x10,x10,1071 # 800198af + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: c9063603 ld x12,-880(x12) # 80018138 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 3d850513 addi x10,x10,984 # 80018898 + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: c3850513 addi x10,x10,-968 # 80018158 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: c2058593 addi x11,x11,-992 # 80018180 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: cb058593 addi x11,x11,-848 # 80018240 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 0fe50513 addi x10,x10,254 # 800186be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: d5050513 addi x10,x10,-688 # 80019350 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: b0060613 addi x12,x12,-1280 # 80018130 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 27950513 addi x10,x10,633 # 800188b9 + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: ad053503 ld x10,-1328(x10) # 80018138 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: ad850513 addi x10,x10,-1320 # 80018158 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 20950513 addi x10,x10,521 # 800188c9 + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: a5853503 ld x10,-1448(x10) # 80018140 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: a5850513 addi x10,x10,-1448 # 80018158 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 19950513 addi x10,x10,409 # 800188d9 + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: 9e053503 ld x10,-1568(x10) # 80018148 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: 9d850513 addi x10,x10,-1576 # 80018158 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 12950513 addi x10,x10,297 # 800188e9 + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: 96853503 ld x10,-1688(x10) # 80018150 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: 95850513 addi x10,x10,-1704 # 80018158 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: 90860613 addi x12,x12,-1784 # 80018130 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: 91860613 addi x12,x12,-1768 # 80018158 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89c30313 addi x6,x6,-1892 # 80006934 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 88430313 addi x6,x6,-1916 # 80006934 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86c30313 addi x6,x6,-1940 # 80006934 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 70478793 addi x15,x15,1796 # 80006944 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: 8f010113 addi x2,x2,-1808 # 80019dd0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 80019379 .word 0x80019379 + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: e1828293 addi x5,x5,-488 # 80038400 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: df828293 addi x5,x5,-520 # 80038400 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-pack-00.elf.objdump b/riscv-tests/rv64-Zbkb-pack-00.elf.objdump new file mode 100644 index 0000000..da9b8b9 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-pack-00.elf.objdump @@ -0,0 +1,16178 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-pack-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-pack-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000037680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009180 memsz 0x0000000000009180 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002c680 memsz 0x000000000002c680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00009140 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002bbd0 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080037c00 0000000080037c00 00036c00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080038000 0000000080038000 00037000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00037680 2**0 + CONTENTS, READONLY + 6 .debug_line 00002e46 0000000000000000 0000000000000000 000376bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 0000000000000000 0000000000000000 0003a501 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003a57b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003a59e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003a5b0 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 0000000000000000 0000000000000000 0003a5f0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003a678 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080037c00 l d .tohost 0000000000000000 .tohost +0000000080038000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccRQzMl4.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800380e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b0 +0000000080007580 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e230 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b1 +000000008000e261 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b2 +000000008000e292 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b3 +000000008000e2c3 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b4 +0000000080007598 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000e2f4 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b5 +000000008000e325 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b6 +000000008000e356 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b6_str +00000000800001d4 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b7 +000000008000e387 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b7_str +0000000080000208 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b8 +000000008000e3b8 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b8_str +000000008000023c l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b9 +000000008000e3e9 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b9_str +0000000080000270 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b10 +000000008000e41b l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b10_str +00000000800002a4 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b11 +000000008000e44e l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b11_str +00000000800002d8 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b12 +000000008000e481 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b13 +000000008000e4b4 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b14 +000000008000e4e7 l .data 0000000000000000 Zbkb_pack_cg_cp_rs1_b14_str +0000000080000378 l .text.rvtest 0000000000000000 Zbkb_pack_cg_cp_rs1_b15 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section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00038097 auipc x1,0x38 + 80000004: 0e008093 addi x1,x1,224 # 800380e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x1138f3df22f6735d + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x2c19368b0a4f925f + 80000048: 0001b083 ld x1,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_pack_cg_cp_rs1_b0: + pack x24, x0, x1 # perform operation + 80000050: 08104c33 pack x24,x0,x1 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zbkb_pack_cg_cp_rs1_b0, Zbkb_pack_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01820c63 beq x4,x24,80000070 + 8000005c: 524072ef jal x5,80007580 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e230 .word 0x8000e230 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xf0630e2031854245 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x367c83a55f2beea8 + 8000007c: 0001b903 ld x18,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_pack_cg_cp_rs1_b1: + pack x26, x1, x18 # perform operation + 80000084: 0920cd33 pack x26,x1,x18 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_pack_cg_cp_rs1_b1, Zbkb_pack_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01a20c63 beq x4,x26,800000a4 + 80000090: 4f0072ef jal x5,80007580 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e261 .word 0x8000e261 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x15, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010793 addi x15,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x1f77919341a614a2 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x2771d249282aeefe + 800000b4: 0001b683 ld x13,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_pack_cg_cp_rs1_b2: + pack x21, x2, x13 # perform operation + 800000bc: 08d14ab3 pack x21,x2,x13 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_pack_cg_cp_rs1_b2, Zbkb_pack_cg_cp_rs1_b2_str) + 800000c0: 0007b203 ld x4,0(x15) + 800000c4: 01520c63 beq x4,x21,800000dc + 800000c8: 4b8072ef jal x5,80007580 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e292 .word 0x8000e292 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00878793 addi x15,x15,8 + + mv x26, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018d13 addi x26,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xb36ad99115ee9bc3 + 800000e4: 000d3183 ld x3,0(x26) + 800000e8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xae6226dc4e50767f + 800000ec: 000d3703 ld x14,0(x26) + 800000f0: 008d0d13 addi x26,x26,8 + +00000000800000f4 : +Zbkb_pack_cg_cp_rs1_b3: + pack x6, x3, x14 # perform operation + 800000f4: 08e1c333 pack x6,x3,x14 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_pack_cg_cp_rs1_b3, Zbkb_pack_cg_cp_rs1_b3_str) + 800000f8: 0007b203 ld x4,0(x15) + 800000fc: 00620c63 beq x4,x6,80000114 + 80000100: 480072ef jal x5,80007580 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e2c3 .word 0x8000e2c3 + 80000110: 00000000 .word 0x00000000 + 80000114: 00878793 addi x15,x15,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0x0fa94323c2055c6a + 80000120: 000d3203 ld x4,0(x26) + 80000124: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xdabb831e59bcceab + 80000128: 000d3e03 ld x28,0(x26) + 8000012c: 008d0d13 addi x26,x26,8 + +0000000080000130 : +Zbkb_pack_cg_cp_rs1_b4: + pack x19, x4, x28 # perform operation + 80000130: 09c249b3 pack x19,x4,x28 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_pack_cg_cp_rs1_b4, Zbkb_pack_cg_cp_rs1_b4_str) + 80000134: 0007b383 ld x7,0(x15) + 80000138: 01338c63 beq x7,x19,80000150 + 8000013c: 45c0746f jal x8,80007598 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e2f4 .word 0x8000e2f4 + 8000014c: 00000000 .word 0x00000000 + 80000150: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x5b59e8549d41a085 + 80000154: 000d3283 ld x5,0(x26) + 80000158: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x1dec749fef244135 + 8000015c: 000d3203 ld x4,0(x26) + 80000160: 008d0d13 addi x26,x26,8 + +0000000080000164 : +Zbkb_pack_cg_cp_rs1_b5: + pack x18, x5, x4 # perform operation + 80000164: 0842c933 pack x18,x5,x4 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_pack_cg_cp_rs1_b5, Zbkb_pack_cg_cp_rs1_b5_str) + 80000168: 0007b383 ld x7,0(x15) + 8000016c: 01238c63 beq x7,x18,80000184 + 80000170: 4280746f jal x8,80007598 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e325 .word 0x8000e325 + 80000180: 00000000 .word 0x00000000 + 80000184: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0xec22f6051029eb37 + 80000188: 000d3303 ld x6,0(x26) + 8000018c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x8ef599995e095706 + 80000190: 000d3883 ld x17,0(x26) + 80000194: 008d0d13 addi x26,x26,8 + +0000000080000198 : +Zbkb_pack_cg_cp_rs1_b6: + pack x28, x6, x17 # perform operation + 80000198: 09134e33 pack x28,x6,x17 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_pack_cg_cp_rs1_b6, Zbkb_pack_cg_cp_rs1_b6_str) + 8000019c: 0007b383 ld x7,0(x15) + 800001a0: 01c38c63 beq x7,x28,800001b8 + 800001a4: 3f40746f jal x8,80007598 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e356 .word 0x8000e356 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00878793 addi x15,x15,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800001bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x872d2d39e5ea4c43 + 800001c4: 000d3383 ld x7,0(x26) + 800001c8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xd47a594739508b1e + 800001cc: 000d3603 ld x12,0(x26) + 800001d0: 008d0d13 addi x26,x26,8 + +00000000800001d4 : +Zbkb_pack_cg_cp_rs1_b7: + pack x31, x7, x12 # perform operation + 800001d4: 08c3cfb3 pack x31,x7,x12 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_pack_cg_cp_rs1_b7, Zbkb_pack_cg_cp_rs1_b7_str) + 800001d8: 0007b203 ld x4,0(x15) + 800001dc: 01f20c63 beq x4,x31,800001f4 + 800001e0: 3a0072ef jal x5,80007580 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 8000e387 .word 0x8000e387 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xfa320264d4709423 + 800001f8: 000d3403 ld x8,0(x26) + 800001fc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x2f5df4d07468740a + 80000200: 000d3c83 ld x25,0(x26) + 80000204: 008d0d13 addi x26,x26,8 + +0000000080000208 : +Zbkb_pack_cg_cp_rs1_b8: + pack x10, x8, x25 # perform operation + 80000208: 09944533 pack x10,x8,x25 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zbkb_pack_cg_cp_rs1_b8, Zbkb_pack_cg_cp_rs1_b8_str) + 8000020c: 0007b203 ld x4,0(x15) + 80000210: 00a20c63 beq x4,x10,80000228 + 80000214: 36c072ef jal x5,80007580 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 8000e3b8 .word 0x8000e3b8 + 80000224: 00000000 .word 0x00000000 + 80000228: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x8ed2ae3a376c7593 + 8000022c: 000d3483 ld x9,0(x26) + 80000230: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0xacb20ccf2b9a9698 + 80000234: 000d3e03 ld x28,0(x26) + 80000238: 008d0d13 addi x26,x26,8 + +000000008000023c : +Zbkb_pack_cg_cp_rs1_b9: + pack x13, x9, x28 # perform operation + 8000023c: 09c4c6b3 pack x13,x9,x28 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zbkb_pack_cg_cp_rs1_b9, Zbkb_pack_cg_cp_rs1_b9_str) + 80000240: 0007b203 ld x4,0(x15) + 80000244: 00d20c63 beq x4,x13,8000025c + 80000248: 338072ef jal x5,80007580 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8000e3e9 .word 0x8000e3e9 + 80000258: 00000000 .word 0x00000000 + 8000025c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xe6dcd90d2d5dd45d + 80000260: 000d3503 ld x10,0(x26) + 80000264: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xe8f3c282115aafab + 80000268: 000d3083 ld x1,0(x26) + 8000026c: 008d0d13 addi x26,x26,8 + +0000000080000270 : +Zbkb_pack_cg_cp_rs1_b10: + pack x14, x10, x1 # perform operation + 80000270: 08154733 pack x14,x10,x1 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zbkb_pack_cg_cp_rs1_b10, Zbkb_pack_cg_cp_rs1_b10_str) + 80000274: 0007b203 ld x4,0(x15) + 80000278: 00e20c63 beq x4,x14,80000290 + 8000027c: 304072ef jal x5,80007580 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 8000e41b .word 0x8000e41b + 8000028c: 00000000 .word 0x00000000 + 80000290: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x8e9e97ef4b8d6f6a + 80000294: 000d3583 ld x11,0(x26) + 80000298: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x0575d4347eae2134 + 8000029c: 000d3103 ld x2,0(x26) + 800002a0: 008d0d13 addi x26,x26,8 + +00000000800002a4 : +Zbkb_pack_cg_cp_rs1_b11: + pack x22, x11, x2 # perform operation + 800002a4: 0825cb33 pack x22,x11,x2 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_pack_cg_cp_rs1_b11, Zbkb_pack_cg_cp_rs1_b11_str) + 800002a8: 0007b203 ld x4,0(x15) + 800002ac: 01620c63 beq x4,x22,800002c4 + 800002b0: 2d0072ef jal x5,80007580 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 8000e44e .word 0x8000e44e + 800002c0: 00000000 .word 0x00000000 + 800002c4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x321922e3bdd4f7c6 + 800002c8: 000d3603 ld x12,0(x26) + 800002cc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x23a48ce584405261 + 800002d0: 000d3c03 ld x24,0(x26) + 800002d4: 008d0d13 addi x26,x26,8 + +00000000800002d8 : +Zbkb_pack_cg_cp_rs1_b12: + pack x19, x12, x24 # perform operation + 800002d8: 098649b3 pack x19,x12,x24 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zbkb_pack_cg_cp_rs1_b12, Zbkb_pack_cg_cp_rs1_b12_str) + 800002dc: 0007b203 ld x4,0(x15) + 800002e0: 01320c63 beq x4,x19,800002f8 + 800002e4: 29c072ef jal x5,80007580 + 800002e8: 800002d8 .word 0x800002d8 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 8000e481 .word 0x8000e481 + 800002f4: 00000000 .word 0x00000000 + 800002f8: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x7870feba26eb47f2 + 800002fc: 000d3683 ld x13,0(x26) + 80000300: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0xe0559df222175fbe + 80000304: 000d3883 ld x17,0(x26) + 80000308: 008d0d13 addi x26,x26,8 + +000000008000030c : +Zbkb_pack_cg_cp_rs1_b13: + pack x20, x13, x17 # perform operation + 8000030c: 0916ca33 pack x20,x13,x17 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zbkb_pack_cg_cp_rs1_b13, Zbkb_pack_cg_cp_rs1_b13_str) + 80000310: 0007b203 ld x4,0(x15) + 80000314: 01420c63 beq x4,x20,8000032c + 80000318: 268072ef jal x5,80007580 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e4b4 .word 0x8000e4b4 + 80000328: 00000000 .word 0x00000000 + 8000032c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x14ea4fde5f6859cf + 80000330: 000d3703 ld x14,0(x26) + 80000334: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x5e4a863d98ca2a38 + 80000338: 000d3c83 ld x25,0(x26) + 8000033c: 008d0d13 addi x26,x26,8 + +0000000080000340 : +Zbkb_pack_cg_cp_rs1_b14: + pack x18, x14, x25 # perform operation + 80000340: 09974933 pack x18,x14,x25 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zbkb_pack_cg_cp_rs1_b14, Zbkb_pack_cg_cp_rs1_b14_str) + 80000344: 0007b203 ld x4,0(x15) + 80000348: 01220c63 beq x4,x18,80000360 + 8000034c: 234072ef jal x5,80007580 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e4e7 .word 0x8000e4e7 + 8000035c: 00000000 .word 0x00000000 + 80000360: 00878793 addi x15,x15,8 + + mv x24, x15 # switch signature pointer register to avoid conflict with test + 80000364: 00078c13 addi x24,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x9bef9e5d6ddfe2bb + 80000368: 000d3783 ld x15,0(x26) + 8000036c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x3443652471caaeaa + 80000370: 000d3c83 ld x25,0(x26) + 80000374: 008d0d13 addi x26,x26,8 + +0000000080000378 : +Zbkb_pack_cg_cp_rs1_b15: + pack x13, x15, x25 # perform operation + 80000378: 0997c6b3 pack x13,x15,x25 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zbkb_pack_cg_cp_rs1_b15, Zbkb_pack_cg_cp_rs1_b15_str) + 8000037c: 000c3203 ld x4,0(x24) + 80000380: 00d20c63 beq x4,x13,80000398 + 80000384: 1fc072ef jal x5,80007580 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e51a .word 0x8000e51a + 80000394: 00000000 .word 0x00000000 + 80000398: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xa226f9f91d9a8a7f + 8000039c: 000d3803 ld x16,0(x26) + 800003a0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x4c939c3004cb9ad4 + 800003a4: 000d3e03 ld x28,0(x26) + 800003a8: 008d0d13 addi x26,x26,8 + +00000000800003ac : +Zbkb_pack_cg_cp_rs1_b16: + pack x23, x16, x28 # perform operation + 800003ac: 09c84bb3 pack x23,x16,x28 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zbkb_pack_cg_cp_rs1_b16, Zbkb_pack_cg_cp_rs1_b16_str) + 800003b0: 000c3203 ld x4,0(x24) + 800003b4: 01720c63 beq x4,x23,800003cc + 800003b8: 1c8072ef jal x5,80007580 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 8000e54d .word 0x8000e54d + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x6973aa67b8324205 + 800003d0: 000d3883 ld x17,0(x26) + 800003d4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0xcdb78c4dabdc88be + 800003d8: 000d3a83 ld x21,0(x26) + 800003dc: 008d0d13 addi x26,x26,8 + +00000000800003e0 : +Zbkb_pack_cg_cp_rs1_b17: + pack x29, x17, x21 # perform operation + 800003e0: 0958ceb3 pack x29,x17,x21 + # Check if x29 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x29, Zbkb_pack_cg_cp_rs1_b17, Zbkb_pack_cg_cp_rs1_b17_str) + 800003e4: 000c3203 ld x4,0(x24) + 800003e8: 01d20c63 beq x4,x29,80000400 + 800003ec: 194072ef jal x5,80007580 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 8000e580 .word 0x8000e580 + 800003fc: 00000000 .word 0x00000000 + 80000400: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xc6853dbd20539258 + 80000404: 000d3903 ld x18,0(x26) + 80000408: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x0a4bbab29d5c8f22 + 8000040c: 000d3b03 ld x22,0(x26) + 80000410: 008d0d13 addi x26,x26,8 + +0000000080000414 : +Zbkb_pack_cg_cp_rs1_b18: + pack x20, x18, x22 # perform operation + 80000414: 09694a33 pack x20,x18,x22 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zbkb_pack_cg_cp_rs1_b18, Zbkb_pack_cg_cp_rs1_b18_str) + 80000418: 000c3203 ld x4,0(x24) + 8000041c: 01420c63 beq x4,x20,80000434 + 80000420: 160072ef jal x5,80007580 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8000e5b3 .word 0x8000e5b3 + 80000430: 00000000 .word 0x00000000 + 80000434: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0xc3f7c0dd0e42f4ce + 80000438: 000d3983 ld x19,0(x26) + 8000043c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x7a51366c152d1053 + 80000440: 000d3683 ld x13,0(x26) + 80000444: 008d0d13 addi x26,x26,8 + +0000000080000448 : +Zbkb_pack_cg_cp_rs1_b19: + pack x8, x19, x13 # perform operation + 80000448: 08d9c433 pack x8,x19,x13 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zbkb_pack_cg_cp_rs1_b19, Zbkb_pack_cg_cp_rs1_b19_str) + 8000044c: 000c3203 ld x4,0(x24) + 80000450: 00820c63 beq x4,x8,80000468 + 80000454: 12c072ef jal x5,80007580 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8000e5e6 .word 0x8000e5e6 + 80000464: 00000000 .word 0x00000000 + 80000468: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x2e3c3a1aed2e0320 + 8000046c: 000d3a03 ld x20,0(x26) + 80000470: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xd86a46535b731bd6 + 80000474: 000d3703 ld x14,0(x26) + 80000478: 008d0d13 addi x26,x26,8 + +000000008000047c : +Zbkb_pack_cg_cp_rs1_b20: + pack x1, x20, x14 # perform operation + 8000047c: 08ea40b3 pack x1,x20,x14 + # Check if x1 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x1, Zbkb_pack_cg_cp_rs1_b20, Zbkb_pack_cg_cp_rs1_b20_str) + 80000480: 000c3203 ld x4,0(x24) + 80000484: 00120c63 beq x4,x1,8000049c + 80000488: 0f8072ef jal x5,80007580 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 8000e619 .word 0x8000e619 + 80000498: 00000000 .word 0x00000000 + 8000049c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x2272d85cbfc03c71 + 800004a0: 000d3a83 ld x21,0(x26) + 800004a4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x751f993ff77e7d61 + 800004a8: 000d3983 ld x19,0(x26) + 800004ac: 008d0d13 addi x26,x26,8 + +00000000800004b0 : +Zbkb_pack_cg_cp_rs1_b21: + pack x12, x21, x19 # perform operation + 800004b0: 093ac633 pack x12,x21,x19 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zbkb_pack_cg_cp_rs1_b21, Zbkb_pack_cg_cp_rs1_b21_str) + 800004b4: 000c3203 ld x4,0(x24) + 800004b8: 00c20c63 beq x4,x12,800004d0 + 800004bc: 0c4072ef jal x5,80007580 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 8000e64c .word 0x8000e64c + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x38c4c27a14de81dc + 800004d4: 000d3b03 ld x22,0(x26) + 800004d8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x5913c21f26f959a4 + 800004dc: 000d3103 ld x2,0(x26) + 800004e0: 008d0d13 addi x26,x26,8 + +00000000800004e4 : +Zbkb_pack_cg_cp_rs1_b22: + pack x6, x22, x2 # perform operation + 800004e4: 082b4333 pack x6,x22,x2 + # Check if x6 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x6, Zbkb_pack_cg_cp_rs1_b22, Zbkb_pack_cg_cp_rs1_b22_str) + 800004e8: 000c3203 ld x4,0(x24) + 800004ec: 00620c63 beq x4,x6,80000504 + 800004f0: 090072ef jal x5,80007580 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 8000e67f .word 0x8000e67f + 80000500: 00000000 .word 0x00000000 + 80000504: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x155394d60db7b684 + 80000508: 000d3b83 ld x23,0(x26) + 8000050c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x55f814764866c3ac + 80000510: 000d3e83 ld x29,0(x26) + 80000514: 008d0d13 addi x26,x26,8 + +0000000080000518 : +Zbkb_pack_cg_cp_rs1_b23: + pack x18, x23, x29 # perform operation + 80000518: 09dbc933 pack x18,x23,x29 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zbkb_pack_cg_cp_rs1_b23, Zbkb_pack_cg_cp_rs1_b23_str) + 8000051c: 000c3203 ld x4,0(x24) + 80000520: 01220c63 beq x4,x18,80000538 + 80000524: 05c072ef jal x5,80007580 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 8000e6b2 .word 0x8000e6b2 + 80000534: 00000000 .word 0x00000000 + 80000538: 008c0c13 addi x24,x24,8 + + mv x3, x24 # switch signature pointer register to avoid conflict with test + 8000053c: 000c0193 addi x3,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x901afbbc5d5f5865 + 80000540: 000d3c03 ld x24,0(x26) + 80000544: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x71ebd235e1bd2156 + 80000548: 000d3783 ld x15,0(x26) + 8000054c: 008d0d13 addi x26,x26,8 + +0000000080000550 : +Zbkb_pack_cg_cp_rs1_b24: + pack x22, x24, x15 # perform operation + 80000550: 08fc4b33 pack x22,x24,x15 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkb_pack_cg_cp_rs1_b24, Zbkb_pack_cg_cp_rs1_b24_str) + 80000554: 0001b203 ld x4,0(x3) + 80000558: 01620c63 beq x4,x22,80000570 + 8000055c: 024072ef jal x5,80007580 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e6e5 .word 0x8000e6e5 + 8000056c: 00000000 .word 0x00000000 + 80000570: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x63b385ce264ae7f9 + 80000574: 000d3c83 ld x25,0(x26) + 80000578: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xb1f25b8cba19add4 + 8000057c: 000d3a03 ld x20,0(x26) + 80000580: 008d0d13 addi x26,x26,8 + +0000000080000584 : +Zbkb_pack_cg_cp_rs1_b25: + pack x29, x25, x20 # perform operation + 80000584: 094cceb3 pack x29,x25,x20 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkb_pack_cg_cp_rs1_b25, Zbkb_pack_cg_cp_rs1_b25_str) + 80000588: 0001b203 ld x4,0(x3) + 8000058c: 01d20c63 beq x4,x29,800005a4 + 80000590: 7f1062ef jal x5,80007580 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 8000e718 .word 0x8000e718 + 800005a0: 00000000 .word 0x00000000 + 800005a4: 00818193 addi x3,x3,8 + + mv x23, x26 # switch data pointer register to avoid conflict with test + 800005a8: 000d0b93 addi x23,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x49bd8ad4d3d86769 + 800005ac: 000bbd03 ld x26,0(x23) + 800005b0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x35bfac482eaa7c15 + 800005b4: 000bb603 ld x12,0(x23) + 800005b8: 008b8b93 addi x23,x23,8 + +00000000800005bc : +Zbkb_pack_cg_cp_rs1_b26: + pack x31, x26, x12 # perform operation + 800005bc: 08cd4fb3 pack x31,x26,x12 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkb_pack_cg_cp_rs1_b26, Zbkb_pack_cg_cp_rs1_b26_str) + 800005c0: 0001b203 ld x4,0(x3) + 800005c4: 01f20c63 beq x4,x31,800005dc + 800005c8: 7b9062ef jal x5,80007580 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 8000e74b .word 0x8000e74b + 800005d8: 00000000 .word 0x00000000 + 800005dc: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x3e794248d72ed6eb + 800005e0: 000bbd83 ld x27,0(x23) + 800005e4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xff46320bf21c07a9 + 800005e8: 000bb703 ld x14,0(x23) + 800005ec: 008b8b93 addi x23,x23,8 + +00000000800005f0 : +Zbkb_pack_cg_cp_rs1_b27: + pack x7, x27, x14 # perform operation + 800005f0: 08edc3b3 pack x7,x27,x14 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkb_pack_cg_cp_rs1_b27, Zbkb_pack_cg_cp_rs1_b27_str) + 800005f4: 0001b203 ld x4,0(x3) + 800005f8: 00720c63 beq x4,x7,80000610 + 800005fc: 785062ef jal x5,80007580 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e77e .word 0x8000e77e + 8000060c: 00000000 .word 0x00000000 + 80000610: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xec00f171acef9286 + 80000614: 000bbe03 ld x28,0(x23) + 80000618: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x40b04da51b64ba0d + 8000061c: 000bbb03 ld x22,0(x23) + 80000620: 008b8b93 addi x23,x23,8 + +0000000080000624 : +Zbkb_pack_cg_cp_rs1_b28: + pack x19, x28, x22 # perform operation + 80000624: 096e49b3 pack x19,x28,x22 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zbkb_pack_cg_cp_rs1_b28, Zbkb_pack_cg_cp_rs1_b28_str) + 80000628: 0001b203 ld x4,0(x3) + 8000062c: 01320c63 beq x4,x19,80000644 + 80000630: 751062ef jal x5,80007580 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000e7b1 .word 0x8000e7b1 + 80000640: 00000000 .word 0x00000000 + 80000644: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xfb756a413042b1ac + 80000648: 000bbe83 ld x29,0(x23) + 8000064c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x820852bb600b332f + 80000650: 000bbe03 ld x28,0(x23) + 80000654: 008b8b93 addi x23,x23,8 + +0000000080000658 : +Zbkb_pack_cg_cp_rs1_b29: + pack x22, x29, x28 # perform operation + 80000658: 09cecb33 pack x22,x29,x28 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkb_pack_cg_cp_rs1_b29, Zbkb_pack_cg_cp_rs1_b29_str) + 8000065c: 0001b203 ld x4,0(x3) + 80000660: 01620c63 beq x4,x22,80000678 + 80000664: 71d062ef jal x5,80007580 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 8000e7e4 .word 0x8000e7e4 + 80000674: 00000000 .word 0x00000000 + 80000678: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xae484ffe2cc37868 + 8000067c: 000bbf03 ld x30,0(x23) + 80000680: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x543ddb448eb38655 + 80000684: 000bb803 ld x16,0(x23) + 80000688: 008b8b93 addi x23,x23,8 + +000000008000068c : +Zbkb_pack_cg_cp_rs1_b30: + pack x14, x30, x16 # perform operation + 8000068c: 090f4733 pack x14,x30,x16 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkb_pack_cg_cp_rs1_b30, Zbkb_pack_cg_cp_rs1_b30_str) + 80000690: 0001b203 ld x4,0(x3) + 80000694: 00e20c63 beq x4,x14,800006ac + 80000698: 6e9062ef jal x5,80007580 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 8000e817 .word 0x8000e817 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x573ad4a2c931bd4d + 800006b0: 000bbf83 ld x31,0(x23) + 800006b4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x7c289b3c8e700a24 + 800006b8: 000bbd03 ld x26,0(x23) + 800006bc: 008b8b93 addi x23,x23,8 + +00000000800006c0 : +Zbkb_pack_cg_cp_rs1_b31: + pack x28, x31, x26 # perform operation + 800006c0: 09afce33 pack x28,x31,x26 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkb_pack_cg_cp_rs1_b31, Zbkb_pack_cg_cp_rs1_b31_str) + 800006c4: 0001b203 ld x4,0(x3) + 800006c8: 01c20c63 beq x4,x28,800006e0 + 800006cc: 6b5062ef jal x5,80007580 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 8000e84a .word 0x8000e84a + 800006dc: 00000000 .word 0x00000000 + 800006e0: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs2_nx0 +///////////////////////////////// + +# Testcase cp_rs2_nx0 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x2a39e0507c8923a5 + 800006e4: 000bb483 ld x9,0(x23) + 800006e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xade99755e5101494 + 800006ec: 000bb083 ld x1,0(x23) + 800006f0: 008b8b93 addi x23,x23,8 + +00000000800006f4 : +Zbkb_pack_cg_cp_rs2_nx0_b1: + pack x22, x9, x1 # perform operation + 800006f4: 0814cb33 pack x22,x9,x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkb_pack_cg_cp_rs2_nx0_b1, Zbkb_pack_cg_cp_rs2_nx0_b1_str) + 800006f8: 0001b203 ld x4,0(x3) + 800006fc: 01620c63 beq x4,x22,80000714 + 80000700: 681062ef jal x5,80007580 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 8000e87d .word 0x8000e87d + 80000710: 00000000 .word 0x00000000 + 80000714: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xe27635ceb31a7a7e + 80000718: 000bb483 ld x9,0(x23) + 8000071c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x18d6fdd35cafd74c + 80000720: 000bb103 ld x2,0(x23) + 80000724: 008b8b93 addi x23,x23,8 + +0000000080000728 : +Zbkb_pack_cg_cp_rs2_nx0_b2: + pack x1, x9, x2 # perform operation + 80000728: 0824c0b3 pack x1,x9,x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_pack_cg_cp_rs2_nx0_b2, Zbkb_pack_cg_cp_rs2_nx0_b2_str) + 8000072c: 0001b203 ld x4,0(x3) + 80000730: 00120c63 beq x4,x1,80000748 + 80000734: 64d062ef jal x5,80007580 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 8000e8b3 .word 0x8000e8b3 + 80000744: 00000000 .word 0x00000000 + 80000748: 00818193 addi x3,x3,8 + + mv x1, x3 # switch signature pointer register to avoid conflict with test + 8000074c: 00018093 addi x1,x3,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xbd9421479cbfa335 + 80000750: 000bbc03 ld x24,0(x23) + 80000754: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x4e1d3df6b1927716 + 80000758: 000bb183 ld x3,0(x23) + 8000075c: 008b8b93 addi x23,x23,8 + +0000000080000760 : +Zbkb_pack_cg_cp_rs2_nx0_b3: + pack x10, x24, x3 # perform operation + 80000760: 083c4533 pack x10,x24,x3 + # Check if x10 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x10, Zbkb_pack_cg_cp_rs2_nx0_b3, Zbkb_pack_cg_cp_rs2_nx0_b3_str) + 80000764: 0000b203 ld x4,0(x1) + 80000768: 00a20c63 beq x4,x10,80000780 + 8000076c: 615062ef jal x5,80007580 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000e8e9 .word 0x8000e8e9 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00808093 addi x1,x1,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000784: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000788: 00028413 addi x8,x5,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xc9eb9840982d59c2 + 8000078c: 000bbf83 ld x31,0(x23) + 80000790: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x94f1e40836e9b65a + 80000794: 000bb203 ld x4,0(x23) + 80000798: 008b8b93 addi x23,x23,8 + +000000008000079c : +Zbkb_pack_cg_cp_rs2_nx0_b4: + pack x20, x31, x4 # perform operation + 8000079c: 084fca33 pack x20,x31,x4 + # Check if x20 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x20, Zbkb_pack_cg_cp_rs2_nx0_b4, Zbkb_pack_cg_cp_rs2_nx0_b4_str) + 800007a0: 0000b383 ld x7,0(x1) + 800007a4: 01438c63 beq x7,x20,800007bc + 800007a8: 5f10646f jal x8,80007598 + 800007ac: 8000079c .word 0x8000079c + 800007b0: 00000000 .word 0x00000000 + 800007b4: 8000e91f .word 0x8000e91f + 800007b8: 00000000 .word 0x00000000 + 800007bc: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x05ec3e70b8bac766 + 800007c0: 000bbd03 ld x26,0(x23) + 800007c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x5fd032df04a4a73e + 800007c8: 000bb283 ld x5,0(x23) + 800007cc: 008b8b93 addi x23,x23,8 + +00000000800007d0 : +Zbkb_pack_cg_cp_rs2_nx0_b5: + pack x13, x26, x5 # perform operation + 800007d0: 085d46b3 pack x13,x26,x5 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zbkb_pack_cg_cp_rs2_nx0_b5, Zbkb_pack_cg_cp_rs2_nx0_b5_str) + 800007d4: 0000b383 ld x7,0(x1) + 800007d8: 00d38c63 beq x7,x13,800007f0 + 800007dc: 5bd0646f jal x8,80007598 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000e955 .word 0x8000e955 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x06c42ca1d5615717 + 800007f4: 000bb003 ld x0,0(x23) + 800007f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xea147b9f83437fb0 + 800007fc: 000bb303 ld x6,0(x23) + 80000800: 008b8b93 addi x23,x23,8 + +0000000080000804 : +Zbkb_pack_cg_cp_rs2_nx0_b6: + pack x22, x0, x6 # perform operation + 80000804: 08604b33 pack x22,x0,x6 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zbkb_pack_cg_cp_rs2_nx0_b6, Zbkb_pack_cg_cp_rs2_nx0_b6_str) + 80000808: 0000b383 ld x7,0(x1) + 8000080c: 01638c63 beq x7,x22,80000824 + 80000810: 5890646f jal x8,80007598 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000e98b .word 0x8000e98b + 80000820: 00000000 .word 0x00000000 + 80000824: 00808093 addi x1,x1,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000828: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 8000082c: 00040713 addi x14,x8,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x3edc61721065cc68 + 80000830: 000bb403 ld x8,0(x23) + 80000834: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x5e9eecf33187c4b3 + 80000838: 000bb383 ld x7,0(x23) + 8000083c: 008b8b93 addi x23,x23,8 + +0000000080000840 : +Zbkb_pack_cg_cp_rs2_nx0_b7: + pack x19, x8, x7 # perform operation + 80000840: 087449b3 pack x19,x8,x7 + # Check if x19 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x19, Zbkb_pack_cg_cp_rs2_nx0_b7, Zbkb_pack_cg_cp_rs2_nx0_b7_str) + 80000844: 0000b683 ld x13,0(x1) + 80000848: 01368c63 beq x13,x19,80000860 + 8000084c: 5750676f jal x14,800075c0 + 80000850: 80000840 .word 0x80000840 + 80000854: 00000000 .word 0x00000000 + 80000858: 8000e9c1 .word 0x8000e9c1 + 8000085c: 00000000 .word 0x00000000 + 80000860: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x7a8168c6af341af2 + 80000864: 000bbc03 ld x24,0(x23) + 80000868: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x3fc8be1ab616b55f + 8000086c: 000bb403 ld x8,0(x23) + 80000870: 008b8b93 addi x23,x23,8 + +0000000080000874 : +Zbkb_pack_cg_cp_rs2_nx0_b8: + pack x20, x24, x8 # perform operation + 80000874: 088c4a33 pack x20,x24,x8 + # Check if x20 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x20, Zbkb_pack_cg_cp_rs2_nx0_b8, Zbkb_pack_cg_cp_rs2_nx0_b8_str) + 80000878: 0000b683 ld x13,0(x1) + 8000087c: 01468c63 beq x13,x20,80000894 + 80000880: 5410676f jal x14,800075c0 + 80000884: 80000874 .word 0x80000874 + 80000888: 00000000 .word 0x00000000 + 8000088c: 8000e9f7 .word 0x8000e9f7 + 80000890: 00000000 .word 0x00000000 + 80000894: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x987daee46a696964 + 80000898: 000bbd83 ld x27,0(x23) + 8000089c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xff25e64a7c5e0cf8 + 800008a0: 000bb483 ld x9,0(x23) + 800008a4: 008b8b93 addi x23,x23,8 + +00000000800008a8 : +Zbkb_pack_cg_cp_rs2_nx0_b9: + pack x12, x27, x9 # perform operation + 800008a8: 089dc633 pack x12,x27,x9 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zbkb_pack_cg_cp_rs2_nx0_b9, Zbkb_pack_cg_cp_rs2_nx0_b9_str) + 800008ac: 0000b683 ld x13,0(x1) + 800008b0: 00c68c63 beq x13,x12,800008c8 + 800008b4: 50d0676f jal x14,800075c0 + 800008b8: 800008a8 .word 0x800008a8 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 8000ea2d .word 0x8000ea2d + 800008c4: 00000000 .word 0x00000000 + 800008c8: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xb34b941ca8a699b3 + 800008cc: 000bbc03 ld x24,0(x23) + 800008d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x856bacccc6af944c + 800008d4: 000bb503 ld x10,0(x23) + 800008d8: 008b8b93 addi x23,x23,8 + +00000000800008dc : +Zbkb_pack_cg_cp_rs2_nx0_b10: + pack x20, x24, x10 # perform operation + 800008dc: 08ac4a33 pack x20,x24,x10 + # Check if x20 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x20, Zbkb_pack_cg_cp_rs2_nx0_b10, Zbkb_pack_cg_cp_rs2_nx0_b10_str) + 800008e0: 0000b683 ld x13,0(x1) + 800008e4: 01468c63 beq x13,x20,800008fc + 800008e8: 4d90676f jal x14,800075c0 + 800008ec: 800008dc .word 0x800008dc + 800008f0: 00000000 .word 0x00000000 + 800008f4: 8000ea63 .word 0x8000ea63 + 800008f8: 00000000 .word 0x00000000 + 800008fc: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x3562030d6ef09600 + 80000900: 000bb403 ld x8,0(x23) + 80000904: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xc9c8c2c06b1604da + 80000908: 000bb583 ld x11,0(x23) + 8000090c: 008b8b93 addi x23,x23,8 + +0000000080000910 : +Zbkb_pack_cg_cp_rs2_nx0_b11: + pack x17, x8, x11 # perform operation + 80000910: 08b448b3 pack x17,x8,x11 + # Check if x17 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x17, Zbkb_pack_cg_cp_rs2_nx0_b11, Zbkb_pack_cg_cp_rs2_nx0_b11_str) + 80000914: 0000b683 ld x13,0(x1) + 80000918: 01168c63 beq x13,x17,80000930 + 8000091c: 4a50676f jal x14,800075c0 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 8000ea9a .word 0x8000ea9a + 8000092c: 00000000 .word 0x00000000 + 80000930: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xc9832e1a07523a94 + 80000934: 000bb203 ld x4,0(x23) + 80000938: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5651a205bb4051dd + 8000093c: 000bb603 ld x12,0(x23) + 80000940: 008b8b93 addi x23,x23,8 + +0000000080000944 : +Zbkb_pack_cg_cp_rs2_nx0_b12: + pack x29, x4, x12 # perform operation + 80000944: 08c24eb3 pack x29,x4,x12 + # Check if x29 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x29, Zbkb_pack_cg_cp_rs2_nx0_b12, Zbkb_pack_cg_cp_rs2_nx0_b12_str) + 80000948: 0000b683 ld x13,0(x1) + 8000094c: 01d68c63 beq x13,x29,80000964 + 80000950: 4710676f jal x14,800075c0 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 8000ead1 .word 0x8000ead1 + 80000960: 00000000 .word 0x00000000 + 80000964: 00808093 addi x1,x1,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000968: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000096c: 00070293 addi x5,x14,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x00f28943cfebeb85 + 80000970: 000bb183 ld x3,0(x23) + 80000974: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x455f4f29e3709afd + 80000978: 000bb683 ld x13,0(x23) + 8000097c: 008b8b93 addi x23,x23,8 + +0000000080000980 : +Zbkb_pack_cg_cp_rs2_nx0_b13: + pack x12, x3, x13 # perform operation + 80000980: 08d1c633 pack x12,x3,x13 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_pack_cg_cp_rs2_nx0_b13, Zbkb_pack_cg_cp_rs2_nx0_b13_str) + 80000984: 0000b203 ld x4,0(x1) + 80000988: 00c20c63 beq x4,x12,800009a0 + 8000098c: 3f5062ef jal x5,80007580 + 80000990: 80000980 .word 0x80000980 + 80000994: 00000000 .word 0x00000000 + 80000998: 8000eb08 .word 0x8000eb08 + 8000099c: 00000000 .word 0x00000000 + 800009a0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x19cce8ea98cb8a6d + 800009a4: 000bb783 ld x15,0(x23) + 800009a8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x35feda339f8bd3c9 + 800009ac: 000bb703 ld x14,0(x23) + 800009b0: 008b8b93 addi x23,x23,8 + +00000000800009b4 : +Zbkb_pack_cg_cp_rs2_nx0_b14: + pack x16, x15, x14 # perform operation + 800009b4: 08e7c833 pack x16,x15,x14 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_pack_cg_cp_rs2_nx0_b14, Zbkb_pack_cg_cp_rs2_nx0_b14_str) + 800009b8: 0000b203 ld x4,0(x1) + 800009bc: 01020c63 beq x4,x16,800009d4 + 800009c0: 3c1062ef jal x5,80007580 + 800009c4: 800009b4 .word 0x800009b4 + 800009c8: 00000000 .word 0x00000000 + 800009cc: 8000eb3f .word 0x8000eb3f + 800009d0: 00000000 .word 0x00000000 + 800009d4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x2246d5765f1592b4 + 800009d8: 000bbb03 ld x22,0(x23) + 800009dc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x14d2b5b5a4c26c89 + 800009e0: 000bb783 ld x15,0(x23) + 800009e4: 008b8b93 addi x23,x23,8 + +00000000800009e8 : +Zbkb_pack_cg_cp_rs2_nx0_b15: + pack x26, x22, x15 # perform operation + 800009e8: 08fb4d33 pack x26,x22,x15 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_pack_cg_cp_rs2_nx0_b15, Zbkb_pack_cg_cp_rs2_nx0_b15_str) + 800009ec: 0000b203 ld x4,0(x1) + 800009f0: 01a20c63 beq x4,x26,80000a08 + 800009f4: 38d062ef jal x5,80007580 + 800009f8: 800009e8 .word 0x800009e8 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 8000eb76 .word 0x8000eb76 + 80000a04: 00000000 .word 0x00000000 + 80000a08: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x2314b665c42e7d4f + 80000a0c: 000bbf83 ld x31,0(x23) + 80000a10: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x8f29e6574a67dca6 + 80000a14: 000bb803 ld x16,0(x23) + 80000a18: 008b8b93 addi x23,x23,8 + +0000000080000a1c : +Zbkb_pack_cg_cp_rs2_nx0_b16: + pack x28, x31, x16 # perform operation + 80000a1c: 090fce33 pack x28,x31,x16 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_pack_cg_cp_rs2_nx0_b16, Zbkb_pack_cg_cp_rs2_nx0_b16_str) + 80000a20: 0000b203 ld x4,0(x1) + 80000a24: 01c20c63 beq x4,x28,80000a3c + 80000a28: 359062ef jal x5,80007580 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 8000ebad .word 0x8000ebad + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x82744dc89f854660 + 80000a40: 000bb683 ld x13,0(x23) + 80000a44: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x5f4a705dceffe4f6 + 80000a48: 000bb883 ld x17,0(x23) + 80000a4c: 008b8b93 addi x23,x23,8 + +0000000080000a50 : +Zbkb_pack_cg_cp_rs2_nx0_b17: + pack x19, x13, x17 # perform operation + 80000a50: 0916c9b3 pack x19,x13,x17 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_pack_cg_cp_rs2_nx0_b17, Zbkb_pack_cg_cp_rs2_nx0_b17_str) + 80000a54: 0000b203 ld x4,0(x1) + 80000a58: 01320c63 beq x4,x19,80000a70 + 80000a5c: 325062ef jal x5,80007580 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000ebe4 .word 0x8000ebe4 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0c10602fc50978e4 + 80000a74: 000bbe03 ld x28,0(x23) + 80000a78: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x9b0c431fc28115ac + 80000a7c: 000bb903 ld x18,0(x23) + 80000a80: 008b8b93 addi x23,x23,8 + +0000000080000a84 : +Zbkb_pack_cg_cp_rs2_nx0_b18: + pack x22, x28, x18 # perform operation + 80000a84: 092e4b33 pack x22,x28,x18 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_pack_cg_cp_rs2_nx0_b18, Zbkb_pack_cg_cp_rs2_nx0_b18_str) + 80000a88: 0000b203 ld x4,0(x1) + 80000a8c: 01620c63 beq x4,x22,80000aa4 + 80000a90: 2f1062ef jal x5,80007580 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 8000ec1b .word 0x8000ec1b + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x9e9cb5c64786eb31 + 80000aa8: 000bbf03 ld x30,0(x23) + 80000aac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x41d7eba9aeb0e5d8 + 80000ab0: 000bb983 ld x19,0(x23) + 80000ab4: 008b8b93 addi x23,x23,8 + +0000000080000ab8 : +Zbkb_pack_cg_cp_rs2_nx0_b19: + pack x20, x30, x19 # perform operation + 80000ab8: 093f4a33 pack x20,x30,x19 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_pack_cg_cp_rs2_nx0_b19, Zbkb_pack_cg_cp_rs2_nx0_b19_str) + 80000abc: 0000b203 ld x4,0(x1) + 80000ac0: 01420c63 beq x4,x20,80000ad8 + 80000ac4: 2bd062ef jal x5,80007580 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 8000ec52 .word 0x8000ec52 + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xa1ef64b98a50f72f + 80000adc: 000bb803 ld x16,0(x23) + 80000ae0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xe3d2a7de7173f549 + 80000ae4: 000bba03 ld x20,0(x23) + 80000ae8: 008b8b93 addi x23,x23,8 + +0000000080000aec : +Zbkb_pack_cg_cp_rs2_nx0_b20: + pack x2, x16, x20 # perform operation + 80000aec: 09484133 pack x2,x16,x20 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_pack_cg_cp_rs2_nx0_b20, Zbkb_pack_cg_cp_rs2_nx0_b20_str) + 80000af0: 0000b203 ld x4,0(x1) + 80000af4: 00220c63 beq x4,x2,80000b0c + 80000af8: 289062ef jal x5,80007580 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000ec89 .word 0x8000ec89 + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xe620aa77f5d64655 + 80000b10: 000bb403 ld x8,0(x23) + 80000b14: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xe9e0f5c71f5ef26a + 80000b18: 000bba83 ld x21,0(x23) + 80000b1c: 008b8b93 addi x23,x23,8 + +0000000080000b20 : +Zbkb_pack_cg_cp_rs2_nx0_b21: + pack x9, x8, x21 # perform operation + 80000b20: 095444b3 pack x9,x8,x21 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_pack_cg_cp_rs2_nx0_b21, Zbkb_pack_cg_cp_rs2_nx0_b21_str) + 80000b24: 0000b203 ld x4,0(x1) + 80000b28: 00920c63 beq x4,x9,80000b40 + 80000b2c: 255062ef jal x5,80007580 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 8000ecc0 .word 0x8000ecc0 + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x638eb20f9b06f10b + 80000b44: 000bbd03 ld x26,0(x23) + 80000b48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0ac6ed708c538e21 + 80000b4c: 000bbb03 ld x22,0(x23) + 80000b50: 008b8b93 addi x23,x23,8 + +0000000080000b54 : +Zbkb_pack_cg_cp_rs2_nx0_b22: + pack x6, x26, x22 # perform operation + 80000b54: 096d4333 pack x6,x26,x22 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_pack_cg_cp_rs2_nx0_b22, Zbkb_pack_cg_cp_rs2_nx0_b22_str) + 80000b58: 0000b203 ld x4,0(x1) + 80000b5c: 00620c63 beq x4,x6,80000b74 + 80000b60: 221062ef jal x5,80007580 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000ecf7 .word 0x8000ecf7 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 00808093 addi x1,x1,8 + + mv x3, x23 # switch data pointer register to avoid conflict with test + 80000b78: 000b8193 addi x3,x23,0 +# Testcase cp_rs2_nx0 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xf1339a5709997256 + 80000b7c: 0001b103 ld x2,0(x3) + 80000b80: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xc007a3b438d12952 + 80000b84: 0001bb83 ld x23,0(x3) + 80000b88: 00818193 addi x3,x3,8 + +0000000080000b8c : +Zbkb_pack_cg_cp_rs2_nx0_b23: + pack x28, x2, x23 # perform operation + 80000b8c: 09714e33 pack x28,x2,x23 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_pack_cg_cp_rs2_nx0_b23, Zbkb_pack_cg_cp_rs2_nx0_b23_str) + 80000b90: 0000b203 ld x4,0(x1) + 80000b94: 01c20c63 beq x4,x28,80000bac + 80000b98: 1e9062ef jal x5,80007580 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 8000ed2e .word 0x8000ed2e + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xf3b366230f5a9a22 + 80000bb0: 0001bf83 ld x31,0(x3) + 80000bb4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xe84f72c789fa5fbe + 80000bb8: 0001bc03 ld x24,0(x3) + 80000bbc: 00818193 addi x3,x3,8 + +0000000080000bc0 : +Zbkb_pack_cg_cp_rs2_nx0_b24: + pack x17, x31, x24 # perform operation + 80000bc0: 098fc8b3 pack x17,x31,x24 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_pack_cg_cp_rs2_nx0_b24, Zbkb_pack_cg_cp_rs2_nx0_b24_str) + 80000bc4: 0000b203 ld x4,0(x1) + 80000bc8: 01120c63 beq x4,x17,80000be0 + 80000bcc: 1b5062ef jal x5,80007580 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000ed65 .word 0x8000ed65 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x07dceb923d4efc0f + 80000be4: 0001b883 ld x17,0(x3) + 80000be8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xea45d17c4f804671 + 80000bec: 0001bc83 ld x25,0(x3) + 80000bf0: 00818193 addi x3,x3,8 + +0000000080000bf4 : +Zbkb_pack_cg_cp_rs2_nx0_b25: + pack x11, x17, x25 # perform operation + 80000bf4: 0998c5b3 pack x11,x17,x25 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_pack_cg_cp_rs2_nx0_b25, Zbkb_pack_cg_cp_rs2_nx0_b25_str) + 80000bf8: 0000b203 ld x4,0(x1) + 80000bfc: 00b20c63 beq x4,x11,80000c14 + 80000c00: 181062ef jal x5,80007580 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000ed9c .word 0x8000ed9c + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x95df66ffa965d4b3 + 80000c18: 0001ba83 ld x21,0(x3) + 80000c1c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x065f96c986c07c97 + 80000c20: 0001bd03 ld x26,0(x3) + 80000c24: 00818193 addi x3,x3,8 + +0000000080000c28 : +Zbkb_pack_cg_cp_rs2_nx0_b26: + pack x11, x21, x26 # perform operation + 80000c28: 09aac5b3 pack x11,x21,x26 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_pack_cg_cp_rs2_nx0_b26, Zbkb_pack_cg_cp_rs2_nx0_b26_str) + 80000c2c: 0000b203 ld x4,0(x1) + 80000c30: 00b20c63 beq x4,x11,80000c48 + 80000c34: 14d062ef jal x5,80007580 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000edd3 .word 0x8000edd3 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x18bd640b3ae1fcb3 + 80000c4c: 0001b883 ld x17,0(x3) + 80000c50: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xc73ad4557f8b7e3a + 80000c54: 0001bd83 ld x27,0(x3) + 80000c58: 00818193 addi x3,x3,8 + +0000000080000c5c : +Zbkb_pack_cg_cp_rs2_nx0_b27: + pack x22, x17, x27 # perform operation + 80000c5c: 09b8cb33 pack x22,x17,x27 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_pack_cg_cp_rs2_nx0_b27, Zbkb_pack_cg_cp_rs2_nx0_b27_str) + 80000c60: 0000b203 ld x4,0(x1) + 80000c64: 01620c63 beq x4,x22,80000c7c + 80000c68: 119062ef jal x5,80007580 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000ee0a .word 0x8000ee0a + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x81121d278e2be04e + 80000c80: 0001b783 ld x15,0(x3) + 80000c84: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x9a734fa635a5a5de + 80000c88: 0001be03 ld x28,0(x3) + 80000c8c: 00818193 addi x3,x3,8 + +0000000080000c90 : +Zbkb_pack_cg_cp_rs2_nx0_b28: + pack x18, x15, x28 # perform operation + 80000c90: 09c7c933 pack x18,x15,x28 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_pack_cg_cp_rs2_nx0_b28, Zbkb_pack_cg_cp_rs2_nx0_b28_str) + 80000c94: 0000b203 ld x4,0(x1) + 80000c98: 01220c63 beq x4,x18,80000cb0 + 80000c9c: 0e5062ef jal x5,80007580 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000ee41 .word 0x8000ee41 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x6898dd8756d8fc23 + 80000cb4: 0001b003 ld x0,0(x3) + 80000cb8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x467aa2e87eef3cab + 80000cbc: 0001be83 ld x29,0(x3) + 80000cc0: 00818193 addi x3,x3,8 + +0000000080000cc4 : +Zbkb_pack_cg_cp_rs2_nx0_b29: + pack x19, x0, x29 # perform operation + 80000cc4: 09d049b3 pack x19,x0,x29 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_pack_cg_cp_rs2_nx0_b29, Zbkb_pack_cg_cp_rs2_nx0_b29_str) + 80000cc8: 0000b203 ld x4,0(x1) + 80000ccc: 01320c63 beq x4,x19,80000ce4 + 80000cd0: 0b1062ef jal x5,80007580 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000ee78 .word 0x8000ee78 + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xf0df738fafbce817 + 80000ce8: 0001be83 ld x29,0(x3) + 80000cec: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x592305d16f89fb11 + 80000cf0: 0001bf03 ld x30,0(x3) + 80000cf4: 00818193 addi x3,x3,8 + +0000000080000cf8 : +Zbkb_pack_cg_cp_rs2_nx0_b30: + pack x9, x29, x30 # perform operation + 80000cf8: 09eec4b3 pack x9,x29,x30 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_pack_cg_cp_rs2_nx0_b30, Zbkb_pack_cg_cp_rs2_nx0_b30_str) + 80000cfc: 0000b203 ld x4,0(x1) + 80000d00: 00920c63 beq x4,x9,80000d18 + 80000d04: 07d062ef jal x5,80007580 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000eeaf .word 0x8000eeaf + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_nx0 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xe869c1e88e95f53e + 80000d1c: 0001be83 ld x29,0(x3) + 80000d20: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xa967a4087aedc84d + 80000d24: 0001bf83 ld x31,0(x3) + 80000d28: 00818193 addi x3,x3,8 + +0000000080000d2c : +Zbkb_pack_cg_cp_rs2_nx0_b31: + pack x25, x29, x31 # perform operation + 80000d2c: 09feccb3 pack x25,x29,x31 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_pack_cg_cp_rs2_nx0_b31, Zbkb_pack_cg_cp_rs2_nx0_b31_str) + 80000d30: 0000b203 ld x4,0(x1) + 80000d34: 01920c63 beq x4,x25,80000d4c + 80000d38: 049062ef jal x5,80007580 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000eee6 .word 0x8000eee6 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x95109f42966c5884 + 80000d50: 0001be03 ld x28,0(x3) + 80000d54: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x5fd02163dcea1307 + 80000d58: 0001b603 ld x12,0(x3) + 80000d5c: 00818193 addi x3,x3,8 + +0000000080000d60 : +Zbkb_pack_cg_cp_rd_b0: + pack x0, x28, x12 # perform operation + 80000d60: 08ce4033 pack x0,x28,x12 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zbkb_pack_cg_cp_rd_b0, Zbkb_pack_cg_cp_rd_b0_str) + 80000d64: 0000b203 ld x4,0(x1) + 80000d68: 00020c63 beq x4,x0,80000d80 + 80000d6c: 015062ef jal x5,80007580 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8000ef1d .word 0x8000ef1d + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00808093 addi x1,x1,8 + + mv x19, x1 # switch signature pointer register to avoid conflict with test + 80000d84: 00008993 addi x19,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x2ef125b4501cd961 + 80000d88: 0001b603 ld x12,0(x3) + 80000d8c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xb2b8dbcaef1eab8b + 80000d90: 0001be83 ld x29,0(x3) + 80000d94: 00818193 addi x3,x3,8 + +0000000080000d98 : +Zbkb_pack_cg_cp_rd_b1: + pack x1, x12, x29 # perform operation + 80000d98: 09d640b3 pack x1,x12,x29 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkb_pack_cg_cp_rd_b1, Zbkb_pack_cg_cp_rd_b1_str) + 80000d9c: 0009b203 ld x4,0(x19) + 80000da0: 00120c63 beq x4,x1,80000db8 + 80000da4: 7dc062ef jal x5,80007580 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000ef4e .word 0x8000ef4e + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0d868cdfc7b0250d + 80000dbc: 0001b603 ld x12,0(x3) + 80000dc0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xca899ad1f64af954 + 80000dc4: 0001bf83 ld x31,0(x3) + 80000dc8: 00818193 addi x3,x3,8 + +0000000080000dcc : +Zbkb_pack_cg_cp_rd_b2: + pack x2, x12, x31 # perform operation + 80000dcc: 09f64133 pack x2,x12,x31 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_pack_cg_cp_rd_b2, Zbkb_pack_cg_cp_rd_b2_str) + 80000dd0: 0009b203 ld x4,0(x19) + 80000dd4: 00220c63 beq x4,x2,80000dec + 80000dd8: 7a8062ef jal x5,80007580 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 8000ef7f .word 0x8000ef7f + 80000de8: 00000000 .word 0x00000000 + 80000dec: 00898993 addi x19,x19,8 + + mv x10, x3 # switch data pointer register to avoid conflict with test + 80000df0: 00018513 addi x10,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5efd6937306f8409 + 80000df4: 00053a83 ld x21,0(x10) + 80000df8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x300480ac298cfbda + 80000dfc: 00053f03 ld x30,0(x10) + 80000e00: 00850513 addi x10,x10,8 + +0000000080000e04 : +Zbkb_pack_cg_cp_rd_b3: + pack x3, x21, x30 # perform operation + 80000e04: 09eac1b3 pack x3,x21,x30 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_pack_cg_cp_rd_b3, Zbkb_pack_cg_cp_rd_b3_str) + 80000e08: 0009b203 ld x4,0(x19) + 80000e0c: 00320c63 beq x4,x3,80000e24 + 80000e10: 770062ef jal x5,80007580 + 80000e14: 80000e04 .word 0x80000e04 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 8000efb0 .word 0x8000efb0 + 80000e20: 00000000 .word 0x00000000 + 80000e24: 00898993 addi x19,x19,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e28: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e2c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xe0c16cb05df9c14b + 80000e30: 00053b03 ld x22,0(x10) + 80000e34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x3e9a07fa0e75a19d + 80000e38: 00053803 ld x16,0(x10) + 80000e3c: 00850513 addi x10,x10,8 + +0000000080000e40 : +Zbkb_pack_cg_cp_rd_b4: + pack x4, x22, x16 # perform operation + 80000e40: 090b4233 pack x4,x22,x16 + # Check if x4 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x4, Zbkb_pack_cg_cp_rd_b4, Zbkb_pack_cg_cp_rd_b4_str) + 80000e44: 0009b683 ld x13,0(x19) + 80000e48: 00468c63 beq x13,x4,80000e60 + 80000e4c: 7740676f jal x14,800075c0 + 80000e50: 80000e40 .word 0x80000e40 + 80000e54: 00000000 .word 0x00000000 + 80000e58: 8000efe1 .word 0x8000efe1 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xd0b75eb3fe330677 + 80000e64: 00053203 ld x4,0(x10) + 80000e68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xc72e9c16ed823b09 + 80000e6c: 00053083 ld x1,0(x10) + 80000e70: 00850513 addi x10,x10,8 + +0000000080000e74 : +Zbkb_pack_cg_cp_rd_b5: + pack x5, x4, x1 # perform operation + 80000e74: 081242b3 pack x5,x4,x1 + # Check if x5 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x5, Zbkb_pack_cg_cp_rd_b5, Zbkb_pack_cg_cp_rd_b5_str) + 80000e78: 0009b683 ld x13,0(x19) + 80000e7c: 00568c63 beq x13,x5,80000e94 + 80000e80: 7400676f jal x14,800075c0 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 8000f012 .word 0x8000f012 + 80000e90: 00000000 .word 0x00000000 + 80000e94: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xa45d120d2afd7952 + 80000e98: 00053203 ld x4,0(x10) + 80000e9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x21627976ec2266c9 + 80000ea0: 00053883 ld x17,0(x10) + 80000ea4: 00850513 addi x10,x10,8 + +0000000080000ea8 : +Zbkb_pack_cg_cp_rd_b6: + pack x6, x4, x17 # perform operation + 80000ea8: 09124333 pack x6,x4,x17 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zbkb_pack_cg_cp_rd_b6, Zbkb_pack_cg_cp_rd_b6_str) + 80000eac: 0009b683 ld x13,0(x19) + 80000eb0: 00668c63 beq x13,x6,80000ec8 + 80000eb4: 70c0676f jal x14,800075c0 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 8000f043 .word 0x8000f043 + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xa020ad3ee0c30641 + 80000ecc: 00053483 ld x9,0(x10) + 80000ed0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xf0f2ac6e1c31b2bd + 80000ed4: 00053283 ld x5,0(x10) + 80000ed8: 00850513 addi x10,x10,8 + +0000000080000edc : +Zbkb_pack_cg_cp_rd_b7: + pack x7, x9, x5 # perform operation + 80000edc: 0854c3b3 pack x7,x9,x5 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkb_pack_cg_cp_rd_b7, Zbkb_pack_cg_cp_rd_b7_str) + 80000ee0: 0009b683 ld x13,0(x19) + 80000ee4: 00768c63 beq x13,x7,80000efc + 80000ee8: 6d80676f jal x14,800075c0 + 80000eec: 80000edc .word 0x80000edc + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 8000f074 .word 0x8000f074 + 80000ef8: 00000000 .word 0x00000000 + 80000efc: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x56d5a88593e28f49 + 80000f00: 00053e03 ld x28,0(x10) + 80000f04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x49febcce885a62a1 + 80000f08: 00053603 ld x12,0(x10) + 80000f0c: 00850513 addi x10,x10,8 + +0000000080000f10 : +Zbkb_pack_cg_cp_rd_b8: + pack x8, x28, x12 # perform operation + 80000f10: 08ce4433 pack x8,x28,x12 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_pack_cg_cp_rd_b8, Zbkb_pack_cg_cp_rd_b8_str) + 80000f14: 0009b683 ld x13,0(x19) + 80000f18: 00868c63 beq x13,x8,80000f30 + 80000f1c: 6a40676f jal x14,800075c0 + 80000f20: 80000f10 .word 0x80000f10 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 8000f0a5 .word 0x8000f0a5 + 80000f2c: 00000000 .word 0x00000000 + 80000f30: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x6716afd1bb5fa1bc + 80000f34: 00053b83 ld x23,0(x10) + 80000f38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x6aa53f4403685257 + 80000f3c: 00053c83 ld x25,0(x10) + 80000f40: 00850513 addi x10,x10,8 + +0000000080000f44 : +Zbkb_pack_cg_cp_rd_b9: + pack x9, x23, x25 # perform operation + 80000f44: 099bc4b3 pack x9,x23,x25 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkb_pack_cg_cp_rd_b9, Zbkb_pack_cg_cp_rd_b9_str) + 80000f48: 0009b683 ld x13,0(x19) + 80000f4c: 00968c63 beq x13,x9,80000f64 + 80000f50: 6700676f jal x14,800075c0 + 80000f54: 80000f44 .word 0x80000f44 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 8000f0d6 .word 0x8000f0d6 + 80000f60: 00000000 .word 0x00000000 + 80000f64: 00898993 addi x19,x19,8 + + mv x1, x10 # switch data pointer register to avoid conflict with test + 80000f68: 00050093 addi x1,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x6b82cd62a3e08134 + 80000f6c: 0000b583 ld x11,0(x1) + 80000f70: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x7214cc1998b5ece5 + 80000f74: 0000b783 ld x15,0(x1) + 80000f78: 00808093 addi x1,x1,8 + +0000000080000f7c : +Zbkb_pack_cg_cp_rd_b10: + pack x10, x11, x15 # perform operation + 80000f7c: 08f5c533 pack x10,x11,x15 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_pack_cg_cp_rd_b10, Zbkb_pack_cg_cp_rd_b10_str) + 80000f80: 0009b683 ld x13,0(x19) + 80000f84: 00a68c63 beq x13,x10,80000f9c + 80000f88: 6380676f jal x14,800075c0 + 80000f8c: 80000f7c .word 0x80000f7c + 80000f90: 00000000 .word 0x00000000 + 80000f94: 8000f107 .word 0x8000f107 + 80000f98: 00000000 .word 0x00000000 + 80000f9c: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8e6169ded85a619e + 80000fa0: 0000bf83 ld x31,0(x1) + 80000fa4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x8d9050d926183c25 + 80000fa8: 0000b903 ld x18,0(x1) + 80000fac: 00808093 addi x1,x1,8 + +0000000080000fb0 : +Zbkb_pack_cg_cp_rd_b11: + pack x11, x31, x18 # perform operation + 80000fb0: 092fc5b3 pack x11,x31,x18 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_pack_cg_cp_rd_b11, Zbkb_pack_cg_cp_rd_b11_str) + 80000fb4: 0009b683 ld x13,0(x19) + 80000fb8: 00b68c63 beq x13,x11,80000fd0 + 80000fbc: 6040676f jal x14,800075c0 + 80000fc0: 80000fb0 .word 0x80000fb0 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 8000f139 .word 0x8000f139 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x272efd4c0437ba5f + 80000fd4: 0000be83 ld x29,0(x1) + 80000fd8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x7b9845650d614e8b + 80000fdc: 0000b883 ld x17,0(x1) + 80000fe0: 00808093 addi x1,x1,8 + +0000000080000fe4 : +Zbkb_pack_cg_cp_rd_b12: + pack x12, x29, x17 # perform operation + 80000fe4: 091ec633 pack x12,x29,x17 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_pack_cg_cp_rd_b12, Zbkb_pack_cg_cp_rd_b12_str) + 80000fe8: 0009b683 ld x13,0(x19) + 80000fec: 00c68c63 beq x13,x12,80001004 + 80000ff0: 5d00676f jal x14,800075c0 + 80000ff4: 80000fe4 .word 0x80000fe4 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 8000f16b .word 0x8000f16b + 80001000: 00000000 .word 0x00000000 + 80001004: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001008: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000100c: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xb714c958628aeee1 + 80001010: 0000b883 ld x17,0(x1) + 80001014: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xf2bd0b4b0d16a3b1 + 80001018: 0000b103 ld x2,0(x1) + 8000101c: 00808093 addi x1,x1,8 + +0000000080001020 : +Zbkb_pack_cg_cp_rd_b13: + pack x13, x17, x2 # perform operation + 80001020: 0828c6b3 pack x13,x17,x2 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_pack_cg_cp_rd_b13, Zbkb_pack_cg_cp_rd_b13_str) + 80001024: 0009b203 ld x4,0(x19) + 80001028: 00d20c63 beq x4,x13,80001040 + 8000102c: 554062ef jal x5,80007580 + 80001030: 80001020 .word 0x80001020 + 80001034: 00000000 .word 0x00000000 + 80001038: 8000f19d .word 0x8000f19d + 8000103c: 00000000 .word 0x00000000 + 80001040: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x1e7487b9e0b703d7 + 80001044: 0000b683 ld x13,0(x1) + 80001048: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x1c92209c9ee00148 + 8000104c: 0000be83 ld x29,0(x1) + 80001050: 00808093 addi x1,x1,8 + +0000000080001054 : +Zbkb_pack_cg_cp_rd_b14: + pack x14, x13, x29 # perform operation + 80001054: 09d6c733 pack x14,x13,x29 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_pack_cg_cp_rd_b14, Zbkb_pack_cg_cp_rd_b14_str) + 80001058: 0009b203 ld x4,0(x19) + 8000105c: 00e20c63 beq x4,x14,80001074 + 80001060: 520062ef jal x5,80007580 + 80001064: 80001054 .word 0x80001054 + 80001068: 00000000 .word 0x00000000 + 8000106c: 8000f1cf .word 0x8000f1cf + 80001070: 00000000 .word 0x00000000 + 80001074: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7873aa224707c5a7 + 80001078: 0000b303 ld x6,0(x1) + 8000107c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xcdb51b414f87157b + 80001080: 0000bf83 ld x31,0(x1) + 80001084: 00808093 addi x1,x1,8 + +0000000080001088 : +Zbkb_pack_cg_cp_rd_b15: + pack x15, x6, x31 # perform operation + 80001088: 09f347b3 pack x15,x6,x31 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_pack_cg_cp_rd_b15, Zbkb_pack_cg_cp_rd_b15_str) + 8000108c: 0009b203 ld x4,0(x19) + 80001090: 00f20c63 beq x4,x15,800010a8 + 80001094: 4ec062ef jal x5,80007580 + 80001098: 80001088 .word 0x80001088 + 8000109c: 00000000 .word 0x00000000 + 800010a0: 8000f201 .word 0x8000f201 + 800010a4: 00000000 .word 0x00000000 + 800010a8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x5b297563a6cb44c0 + 800010ac: 0000b483 ld x9,0(x1) + 800010b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xbc6179a522215d41 + 800010b4: 0000b783 ld x15,0(x1) + 800010b8: 00808093 addi x1,x1,8 + +00000000800010bc : +Zbkb_pack_cg_cp_rd_b16: + pack x16, x9, x15 # perform operation + 800010bc: 08f4c833 pack x16,x9,x15 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_pack_cg_cp_rd_b16, Zbkb_pack_cg_cp_rd_b16_str) + 800010c0: 0009b203 ld x4,0(x19) + 800010c4: 01020c63 beq x4,x16,800010dc + 800010c8: 4b8062ef jal x5,80007580 + 800010cc: 800010bc .word 0x800010bc + 800010d0: 00000000 .word 0x00000000 + 800010d4: 8000f233 .word 0x8000f233 + 800010d8: 00000000 .word 0x00000000 + 800010dc: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x8bb30ea94e2bd0be + 800010e0: 0000b503 ld x10,0(x1) + 800010e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5d55b6834a19c2ac + 800010e8: 0000b783 ld x15,0(x1) + 800010ec: 00808093 addi x1,x1,8 + +00000000800010f0 : +Zbkb_pack_cg_cp_rd_b17: + pack x17, x10, x15 # perform operation + 800010f0: 08f548b3 pack x17,x10,x15 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_pack_cg_cp_rd_b17, Zbkb_pack_cg_cp_rd_b17_str) + 800010f4: 0009b203 ld x4,0(x19) + 800010f8: 01120c63 beq x4,x17,80001110 + 800010fc: 484062ef jal x5,80007580 + 80001100: 800010f0 .word 0x800010f0 + 80001104: 00000000 .word 0x00000000 + 80001108: 8000f265 .word 0x8000f265 + 8000110c: 00000000 .word 0x00000000 + 80001110: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x82af4828351273dc + 80001114: 0000ba03 ld x20,0(x1) + 80001118: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xb6e88cb04702fea1 + 8000111c: 0000bd83 ld x27,0(x1) + 80001120: 00808093 addi x1,x1,8 + +0000000080001124 : +Zbkb_pack_cg_cp_rd_b18: + pack x18, x20, x27 # perform operation + 80001124: 09ba4933 pack x18,x20,x27 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_pack_cg_cp_rd_b18, Zbkb_pack_cg_cp_rd_b18_str) + 80001128: 0009b203 ld x4,0(x19) + 8000112c: 01220c63 beq x4,x18,80001144 + 80001130: 450062ef jal x5,80007580 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 8000f297 .word 0x8000f297 + 80001140: 00000000 .word 0x00000000 + 80001144: 00898993 addi x19,x19,8 + + mv x31, x19 # switch signature pointer register to avoid conflict with test + 80001148: 00098f93 addi x31,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x2a2b830ac4dc625a + 8000114c: 0000b583 ld x11,0(x1) + 80001150: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x1cbe71b28298b6f0 + 80001154: 0000b303 ld x6,0(x1) + 80001158: 00808093 addi x1,x1,8 + +000000008000115c : +Zbkb_pack_cg_cp_rd_b19: + pack x19, x11, x6 # perform operation + 8000115c: 0865c9b3 pack x19,x11,x6 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_pack_cg_cp_rd_b19, Zbkb_pack_cg_cp_rd_b19_str) + 80001160: 000fb203 ld x4,0(x31) + 80001164: 01320c63 beq x4,x19,8000117c + 80001168: 418062ef jal x5,80007580 + 8000116c: 8000115c .word 0x8000115c + 80001170: 00000000 .word 0x00000000 + 80001174: 8000f2c9 .word 0x8000f2c9 + 80001178: 00000000 .word 0x00000000 + 8000117c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xb6ecab6eb00ad6d3 + 80001180: 0000b503 ld x10,0(x1) + 80001184: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xa5082b43b8b57059 + 80001188: 0000b103 ld x2,0(x1) + 8000118c: 00808093 addi x1,x1,8 + +0000000080001190 : +Zbkb_pack_cg_cp_rd_b20: + pack x20, x10, x2 # perform operation + 80001190: 08254a33 pack x20,x10,x2 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zbkb_pack_cg_cp_rd_b20, Zbkb_pack_cg_cp_rd_b20_str) + 80001194: 000fb203 ld x4,0(x31) + 80001198: 01420c63 beq x4,x20,800011b0 + 8000119c: 3e4062ef jal x5,80007580 + 800011a0: 80001190 .word 0x80001190 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 8000f2fb .word 0x8000f2fb + 800011ac: 00000000 .word 0x00000000 + 800011b0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x3c5aeea200b15fcd + 800011b4: 0000be03 ld x28,0(x1) + 800011b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x9134f720257854e6 + 800011bc: 0000b703 ld x14,0(x1) + 800011c0: 00808093 addi x1,x1,8 + +00000000800011c4 : +Zbkb_pack_cg_cp_rd_b21: + pack x21, x28, x14 # perform operation + 800011c4: 08ee4ab3 pack x21,x28,x14 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zbkb_pack_cg_cp_rd_b21, Zbkb_pack_cg_cp_rd_b21_str) + 800011c8: 000fb203 ld x4,0(x31) + 800011cc: 01520c63 beq x4,x21,800011e4 + 800011d0: 3b0062ef jal x5,80007580 + 800011d4: 800011c4 .word 0x800011c4 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 8000f32d .word 0x8000f32d + 800011e0: 00000000 .word 0x00000000 + 800011e4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x8b2fb6d9caa3daff + 800011e8: 0000ba03 ld x20,0(x1) + 800011ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x76c1970235b0555f + 800011f0: 0000b103 ld x2,0(x1) + 800011f4: 00808093 addi x1,x1,8 + +00000000800011f8 : +Zbkb_pack_cg_cp_rd_b22: + pack x22, x20, x2 # perform operation + 800011f8: 082a4b33 pack x22,x20,x2 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zbkb_pack_cg_cp_rd_b22, Zbkb_pack_cg_cp_rd_b22_str) + 800011fc: 000fb203 ld x4,0(x31) + 80001200: 01620c63 beq x4,x22,80001218 + 80001204: 37c062ef jal x5,80007580 + 80001208: 800011f8 .word 0x800011f8 + 8000120c: 00000000 .word 0x00000000 + 80001210: 8000f35f .word 0x8000f35f + 80001214: 00000000 .word 0x00000000 + 80001218: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x358a4404552b1b7e + 8000121c: 0000bb03 ld x22,0(x1) + 80001220: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x90df880736394bb5 + 80001224: 0000bd03 ld x26,0(x1) + 80001228: 00808093 addi x1,x1,8 + +000000008000122c : +Zbkb_pack_cg_cp_rd_b23: + pack x23, x22, x26 # perform operation + 8000122c: 09ab4bb3 pack x23,x22,x26 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zbkb_pack_cg_cp_rd_b23, Zbkb_pack_cg_cp_rd_b23_str) + 80001230: 000fb203 ld x4,0(x31) + 80001234: 01720c63 beq x4,x23,8000124c + 80001238: 348062ef jal x5,80007580 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 8000f391 .word 0x8000f391 + 80001248: 00000000 .word 0x00000000 + 8000124c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x983e852c8dcb4de2 + 80001250: 0000b403 ld x8,0(x1) + 80001254: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xe3a2a59c2e1f1562 + 80001258: 0000bd03 ld x26,0(x1) + 8000125c: 00808093 addi x1,x1,8 + +0000000080001260 : +Zbkb_pack_cg_cp_rd_b24: + pack x24, x8, x26 # perform operation + 80001260: 09a44c33 pack x24,x8,x26 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zbkb_pack_cg_cp_rd_b24, Zbkb_pack_cg_cp_rd_b24_str) + 80001264: 000fb203 ld x4,0(x31) + 80001268: 01820c63 beq x4,x24,80001280 + 8000126c: 314062ef jal x5,80007580 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 8000f3c3 .word 0x8000f3c3 + 8000127c: 00000000 .word 0x00000000 + 80001280: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xf446313befbe2d05 + 80001284: 0000b303 ld x6,0(x1) + 80001288: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0xfa35244d0c9226be + 8000128c: 0000be03 ld x28,0(x1) + 80001290: 00808093 addi x1,x1,8 + +0000000080001294 : +Zbkb_pack_cg_cp_rd_b25: + pack x25, x6, x28 # perform operation + 80001294: 09c34cb3 pack x25,x6,x28 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zbkb_pack_cg_cp_rd_b25, Zbkb_pack_cg_cp_rd_b25_str) + 80001298: 000fb203 ld x4,0(x31) + 8000129c: 01920c63 beq x4,x25,800012b4 + 800012a0: 2e0062ef jal x5,80007580 + 800012a4: 80001294 .word 0x80001294 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 8000f3f5 .word 0x8000f3f5 + 800012b0: 00000000 .word 0x00000000 + 800012b4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x4e5ab7367c6a1f8c + 800012b8: 0000ba83 ld x21,0(x1) + 800012bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x338d039092ed8f62 + 800012c0: 0000b683 ld x13,0(x1) + 800012c4: 00808093 addi x1,x1,8 + +00000000800012c8 : +Zbkb_pack_cg_cp_rd_b26: + pack x26, x21, x13 # perform operation + 800012c8: 08dacd33 pack x26,x21,x13 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_pack_cg_cp_rd_b26, Zbkb_pack_cg_cp_rd_b26_str) + 800012cc: 000fb203 ld x4,0(x31) + 800012d0: 01a20c63 beq x4,x26,800012e8 + 800012d4: 2ac062ef jal x5,80007580 + 800012d8: 800012c8 .word 0x800012c8 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 8000f427 .word 0x8000f427 + 800012e4: 00000000 .word 0x00000000 + 800012e8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xf700453c7b5bd85d + 800012ec: 0000be83 ld x29,0(x1) + 800012f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0xd075bab0bf8d182d + 800012f4: 0000b383 ld x7,0(x1) + 800012f8: 00808093 addi x1,x1,8 + +00000000800012fc : +Zbkb_pack_cg_cp_rd_b27: + pack x27, x29, x7 # perform operation + 800012fc: 087ecdb3 pack x27,x29,x7 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zbkb_pack_cg_cp_rd_b27, Zbkb_pack_cg_cp_rd_b27_str) + 80001300: 000fb203 ld x4,0(x31) + 80001304: 01b20c63 beq x4,x27,8000131c + 80001308: 278062ef jal x5,80007580 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 8000f459 .word 0x8000f459 + 80001318: 00000000 .word 0x00000000 + 8000131c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xbbe78923ebc91efe + 80001320: 0000b903 ld x18,0(x1) + 80001324: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x94013bb82519a371 + 80001328: 0000b503 ld x10,0(x1) + 8000132c: 00808093 addi x1,x1,8 + +0000000080001330 : +Zbkb_pack_cg_cp_rd_b28: + pack x28, x18, x10 # perform operation + 80001330: 08a94e33 pack x28,x18,x10 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_pack_cg_cp_rd_b28, Zbkb_pack_cg_cp_rd_b28_str) + 80001334: 000fb203 ld x4,0(x31) + 80001338: 01c20c63 beq x4,x28,80001350 + 8000133c: 244062ef jal x5,80007580 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 8000f48b .word 0x8000f48b + 8000134c: 00000000 .word 0x00000000 + 80001350: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x2e7313bee5977ffb + 80001354: 0000b403 ld x8,0(x1) + 80001358: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x34f826b49f2bf41e + 8000135c: 0000b103 ld x2,0(x1) + 80001360: 00808093 addi x1,x1,8 + +0000000080001364 : +Zbkb_pack_cg_cp_rd_b29: + pack x29, x8, x2 # perform operation + 80001364: 08244eb3 pack x29,x8,x2 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zbkb_pack_cg_cp_rd_b29, Zbkb_pack_cg_cp_rd_b29_str) + 80001368: 000fb203 ld x4,0(x31) + 8000136c: 01d20c63 beq x4,x29,80001384 + 80001370: 210062ef jal x5,80007580 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000f4bd .word 0x8000f4bd + 80001380: 00000000 .word 0x00000000 + 80001384: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x10d4876060da57a1 + 80001388: 0000b583 ld x11,0(x1) + 8000138c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xcfc29528b4fa63ea + 80001390: 0000b883 ld x17,0(x1) + 80001394: 00808093 addi x1,x1,8 + +0000000080001398 : +Zbkb_pack_cg_cp_rd_b30: + pack x30, x11, x17 # perform operation + 80001398: 0915cf33 pack x30,x11,x17 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zbkb_pack_cg_cp_rd_b30, Zbkb_pack_cg_cp_rd_b30_str) + 8000139c: 000fb203 ld x4,0(x31) + 800013a0: 01e20c63 beq x4,x30,800013b8 + 800013a4: 1dc062ef jal x5,80007580 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 8000f4ef .word 0x8000f4ef + 800013b4: 00000000 .word 0x00000000 + 800013b8: 008f8f93 addi x31,x31,8 + + mv x23, x31 # switch signature pointer register to avoid conflict with test + 800013bc: 000f8b93 addi x23,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x39dde5ae548cb5d5 + 800013c0: 0000b903 ld x18,0(x1) + 800013c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x55868e55376f7827 + 800013c8: 0000ba03 ld x20,0(x1) + 800013cc: 00808093 addi x1,x1,8 + +00000000800013d0 : +Zbkb_pack_cg_cp_rd_b31: + pack x31, x18, x20 # perform operation + 800013d0: 09494fb3 pack x31,x18,x20 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cp_rd_b31, Zbkb_pack_cg_cp_rd_b31_str) + 800013d4: 000bb203 ld x4,0(x23) + 800013d8: 01f20c63 beq x4,x31,800013f0 + 800013dc: 1a4062ef jal x5,80007580 + 800013e0: 800013d0 .word 0x800013d0 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 8000f521 .word 0x8000f521 + 800013ec: 00000000 .word 0x00000000 + 800013f0: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000000000000 + 800013f4: 0000b503 ld x10,0(x1) + 800013f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x6f23e7739957e819 + 800013fc: 0000b603 ld x12,0(x1) + 80001400: 00808093 addi x1,x1,8 + +0000000080001404 : +Zbkb_pack_cg_cp_rs1_edges_0x0: + pack x2, x10, x12 # perform operation + 80001404: 08c54133 pack x2,x10,x12 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cp_rs1_edges_0x0, Zbkb_pack_cg_cp_rs1_edges_0x0_str) + 80001408: 000bb203 ld x4,0(x23) + 8000140c: 00220c63 beq x4,x2,80001424 + 80001410: 170062ef jal x5,80007580 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 8000f553 .word 0x8000f553 + 80001420: 00000000 .word 0x00000000 + 80001424: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x0000000000000001 + 80001428: 0000bf03 ld x30,0(x1) + 8000142c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xa1a8bc73b1931b3d + 80001430: 0000b403 ld x8,0(x1) + 80001434: 00808093 addi x1,x1,8 + +0000000080001438 : +Zbkb_pack_cg_cp_rs1_edges_0x1: + pack x18, x30, x8 # perform operation + 80001438: 088f4933 pack x18,x30,x8 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cp_rs1_edges_0x1, Zbkb_pack_cg_cp_rs1_edges_0x1_str) + 8000143c: 000bb203 ld x4,0(x23) + 80001440: 01220c63 beq x4,x18,80001458 + 80001444: 13c062ef jal x5,80007580 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 8000f58c .word 0x8000f58c + 80001454: 00000000 .word 0x00000000 + 80001458: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000002 + 8000145c: 0000bc83 ld x25,0(x1) + 80001460: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xa8a217f7a4afa8a6 + 80001464: 0000b503 ld x10,0(x1) + 80001468: 00808093 addi x1,x1,8 + +000000008000146c : +Zbkb_pack_cg_cp_rs1_edges_0x2: + pack x22, x25, x10 # perform operation + 8000146c: 08accb33 pack x22,x25,x10 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cp_rs1_edges_0x2, Zbkb_pack_cg_cp_rs1_edges_0x2_str) + 80001470: 000bb203 ld x4,0(x23) + 80001474: 01620c63 beq x4,x22,8000148c + 80001478: 108062ef jal x5,80007580 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 8000f5c5 .word 0x8000f5c5 + 80001488: 00000000 .word 0x00000000 + 8000148c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x8000000000000000 + 80001490: 0000b703 ld x14,0(x1) + 80001494: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xdafa9d51c82fd909 + 80001498: 0000b303 ld x6,0(x1) + 8000149c: 00808093 addi x1,x1,8 + +00000000800014a0 : +Zbkb_pack_cg_cp_rs1_edges_0x8000000000000000: + pack x24, x14, x6 # perform operation + 800014a0: 08674c33 pack x24,x14,x6 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cp_rs1_edges_0x8000000000000000, Zbkb_pack_cg_cp_rs1_edges_0x8000000000000000_str) + 800014a4: 000bb203 ld x4,0(x23) + 800014a8: 01820c63 beq x4,x24,800014c0 + 800014ac: 0d4062ef jal x5,80007580 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 8000f5fe .word 0x8000f5fe + 800014bc: 00000000 .word 0x00000000 + 800014c0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x8000000000000001 + 800014c4: 0000ba83 ld x21,0(x1) + 800014c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x850ad143283b980e + 800014cc: 0000bd03 ld x26,0(x1) + 800014d0: 00808093 addi x1,x1,8 + +00000000800014d4 : +Zbkb_pack_cg_cp_rs1_edges_0x8000000000000001: + pack x9, x21, x26 # perform operation + 800014d4: 09aac4b3 pack x9,x21,x26 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cp_rs1_edges_0x8000000000000001, Zbkb_pack_cg_cp_rs1_edges_0x8000000000000001_str) + 800014d8: 000bb203 ld x4,0(x23) + 800014dc: 00920c63 beq x4,x9,800014f4 + 800014e0: 0a0062ef jal x5,80007580 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8000f646 .word 0x8000f646 + 800014f0: 00000000 .word 0x00000000 + 800014f4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7fffffffffffffff + 800014f8: 0000b403 ld x8,0(x1) + 800014fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x455fb1d6668d0c6b + 80001500: 0000b983 ld x19,0(x1) + 80001504: 00808093 addi x1,x1,8 + +0000000080001508 : +Zbkb_pack_cg_cp_rs1_edges_0x7fffffffffffffff: + pack x18, x8, x19 # perform operation + 80001508: 09344933 pack x18,x8,x19 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_pack_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 8000150c: 000bb203 ld x4,0(x23) + 80001510: 01220c63 beq x4,x18,80001528 + 80001514: 06c062ef jal x5,80007580 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 8000f68f .word 0x8000f68f + 80001524: 00000000 .word 0x00000000 + 80001528: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7ffffffffffffffe + 8000152c: 0000b683 ld x13,0(x1) + 80001530: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x36fa1516ccc39e5c + 80001534: 0000b583 ld x11,0(x1) + 80001538: 00808093 addi x1,x1,8 + +000000008000153c : +Zbkb_pack_cg_cp_rs1_edges_0x7ffffffffffffffe: + pack x27, x13, x11 # perform operation + 8000153c: 08b6cdb3 pack x27,x13,x11 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_pack_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001540: 000bb203 ld x4,0(x23) + 80001544: 01b20c63 beq x4,x27,8000155c + 80001548: 038062ef jal x5,80007580 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 8000f6d8 .word 0x8000f6d8 + 80001558: 00000000 .word 0x00000000 + 8000155c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xffffffffffffffff + 80001560: 0000b583 ld x11,0(x1) + 80001564: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xc0feb7be67e56518 + 80001568: 0000b783 ld x15,0(x1) + 8000156c: 00808093 addi x1,x1,8 + +0000000080001570 : +Zbkb_pack_cg_cp_rs1_edges_0xffffffffffffffff: + pack x21, x11, x15 # perform operation + 80001570: 08f5cab3 pack x21,x11,x15 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_pack_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80001574: 000bb203 ld x4,0(x23) + 80001578: 01520c63 beq x4,x21,80001590 + 8000157c: 004062ef jal x5,80007580 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 8000f721 .word 0x8000f721 + 8000158c: 00000000 .word 0x00000000 + 80001590: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xfffffffffffffffe + 80001594: 0000b683 ld x13,0(x1) + 80001598: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x1ccd0fe9468af8a0 + 8000159c: 0000b103 ld x2,0(x1) + 800015a0: 00808093 addi x1,x1,8 + +00000000800015a4 : +Zbkb_pack_cg_cp_rs1_edges_0xfffffffffffffffe: + pack x16, x13, x2 # perform operation + 800015a4: 0826c833 pack x16,x13,x2 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_pack_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015a8: 000bb203 ld x4,0(x23) + 800015ac: 01020c63 beq x4,x16,800015c4 + 800015b0: 7d1052ef jal x5,80007580 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000f76a .word 0x8000f76a + 800015c0: 00000000 .word 0x00000000 + 800015c4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 800015c8: 0000b703 ld x14,0(x1) + 800015cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x69f2914133231073 + 800015d0: 0000ba03 ld x20,0(x1) + 800015d4: 00808093 addi x1,x1,8 + +00000000800015d8 : +Zbkb_pack_cg_cp_rs1_edges_0x5bbc887763ae86f2: + pack x10, x14, x20 # perform operation + 800015d8: 09474533 pack x10,x14,x20 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_pack_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 800015dc: 000bb203 ld x4,0(x23) + 800015e0: 00a20c63 beq x4,x10,800015f8 + 800015e4: 79d052ef jal x5,80007580 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000f7b3 .word 0x8000f7b3 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 800015fc: 0000bb03 ld x22,0(x1) + 80001600: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x81ec3b69715bbc4b + 80001604: 0000b703 ld x14,0(x1) + 80001608: 00808093 addi x1,x1,8 + +000000008000160c : +Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + pack x6, x22, x14 # perform operation + 8000160c: 08eb4333 pack x6,x22,x14 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001610: 000bb203 ld x4,0(x23) + 80001614: 00620c63 beq x4,x6,8000162c + 80001618: 769052ef jal x5,80007580 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 8000f7fc .word 0x8000f7fc + 80001628: 00000000 .word 0x00000000 + 8000162c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x5555555555555555 + 80001630: 0000bd83 ld x27,0(x1) + 80001634: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xe7c89461584a440e + 80001638: 0000bc83 ld x25,0(x1) + 8000163c: 00808093 addi x1,x1,8 + +0000000080001640 : +Zbkb_pack_cg_cp_rs1_edges_0x5555555555555555: + pack x10, x27, x25 # perform operation + 80001640: 099dc533 pack x10,x27,x25 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cp_rs1_edges_0x5555555555555555, Zbkb_pack_cg_cp_rs1_edges_0x5555555555555555_str) + 80001644: 000bb203 ld x4,0(x23) + 80001648: 00a20c63 beq x4,x10,80001660 + 8000164c: 735052ef jal x5,80007580 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 8000f845 .word 0x8000f845 + 8000165c: 00000000 .word 0x00000000 + 80001660: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000000ffffffff + 80001664: 0000ba03 ld x20,0(x1) + 80001668: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7652038c2250f7d7 + 8000166c: 0000be03 ld x28,0(x1) + 80001670: 00808093 addi x1,x1,8 + +0000000080001674 : +Zbkb_pack_cg_cp_rs1_edges_0xffffffff: + pack x16, x20, x28 # perform operation + 80001674: 09ca4833 pack x16,x20,x28 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cp_rs1_edges_0xffffffff, Zbkb_pack_cg_cp_rs1_edges_0xffffffff_str) + 80001678: 000bb203 ld x4,0(x23) + 8000167c: 01020c63 beq x4,x16,80001694 + 80001680: 701052ef jal x5,80007580 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000f88e .word 0x8000f88e + 80001690: 00000000 .word 0x00000000 + 80001694: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000fffffffe + 80001698: 0000bc03 ld x24,0(x1) + 8000169c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x1a2a5f901dacf6db + 800016a0: 0000be83 ld x29,0(x1) + 800016a4: 00808093 addi x1,x1,8 + +00000000800016a8 : +Zbkb_pack_cg_cp_rs1_edges_0xfffffffe: + pack x28, x24, x29 # perform operation + 800016a8: 09dc4e33 pack x28,x24,x29 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cp_rs1_edges_0xfffffffe, Zbkb_pack_cg_cp_rs1_edges_0xfffffffe_str) + 800016ac: 000bb203 ld x4,0(x23) + 800016b0: 01c20c63 beq x4,x28,800016c8 + 800016b4: 6cd052ef jal x5,80007580 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 8000f8cf .word 0x8000f8cf + 800016c4: 00000000 .word 0x00000000 + 800016c8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0000000100000000 + 800016cc: 0000be83 ld x29,0(x1) + 800016d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x388e6dde8d7e7984 + 800016d4: 0000bb03 ld x22,0(x1) + 800016d8: 00808093 addi x1,x1,8 + +00000000800016dc : +Zbkb_pack_cg_cp_rs1_edges_0x100000000: + pack x7, x29, x22 # perform operation + 800016dc: 096ec3b3 pack x7,x29,x22 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cp_rs1_edges_0x100000000, Zbkb_pack_cg_cp_rs1_edges_0x100000000_str) + 800016e0: 000bb203 ld x4,0(x23) + 800016e4: 00720c63 beq x4,x7,800016fc + 800016e8: 699052ef jal x5,80007580 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 8000f910 .word 0x8000f910 + 800016f8: 00000000 .word 0x00000000 + 800016fc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0000000100000001 + 80001700: 0000b683 ld x13,0(x1) + 80001704: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x54c1f424f435f0a3 + 80001708: 0000be03 ld x28,0(x1) + 8000170c: 00808093 addi x1,x1,8 + +0000000080001710 : +Zbkb_pack_cg_cp_rs1_edges_0x100000001: + pack x20, x13, x28 # perform operation + 80001710: 09c6ca33 pack x20,x13,x28 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cp_rs1_edges_0x100000001, Zbkb_pack_cg_cp_rs1_edges_0x100000001_str) + 80001714: 000bb203 ld x4,0(x23) + 80001718: 01420c63 beq x4,x20,80001730 + 8000171c: 665052ef jal x5,80007580 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 8000f952 .word 0x8000f952 + 8000172c: 00000000 .word 0x00000000 + 80001730: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x51a495a56c0922c7 + 80001734: 0000b783 ld x15,0(x1) + 80001738: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000000 + 8000173c: 0000be83 ld x29,0(x1) + 80001740: 00808093 addi x1,x1,8 + +0000000080001744 : +Zbkb_pack_cg_cp_rs2_edges_0x0: + pack x12, x15, x29 # perform operation + 80001744: 09d7c633 pack x12,x15,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cp_rs2_edges_0x0, Zbkb_pack_cg_cp_rs2_edges_0x0_str) + 80001748: 000bb203 ld x4,0(x23) + 8000174c: 00c20c63 beq x4,x12,80001764 + 80001750: 631052ef jal x5,80007580 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 8000f994 .word 0x8000f994 + 80001760: 00000000 .word 0x00000000 + 80001764: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8aa2f5fa2182a83a + 80001768: 0000bd83 ld x27,0(x1) + 8000176c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000001 + 80001770: 0000bd03 ld x26,0(x1) + 80001774: 00808093 addi x1,x1,8 + +0000000080001778 : +Zbkb_pack_cg_cp_rs2_edges_0x1: + pack x9, x27, x26 # perform operation + 80001778: 09adc4b3 pack x9,x27,x26 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cp_rs2_edges_0x1, Zbkb_pack_cg_cp_rs2_edges_0x1_str) + 8000177c: 000bb203 ld x4,0(x23) + 80001780: 00920c63 beq x4,x9,80001798 + 80001784: 5fd052ef jal x5,80007580 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 8000f9ce .word 0x8000f9ce + 80001794: 00000000 .word 0x00000000 + 80001798: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xf44f73d1607b7acb + 8000179c: 0000b883 ld x17,0(x1) + 800017a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000000000002 + 800017a4: 0000b603 ld x12,0(x1) + 800017a8: 00808093 addi x1,x1,8 + +00000000800017ac : +Zbkb_pack_cg_cp_rs2_edges_0x2: + pack x13, x17, x12 # perform operation + 800017ac: 08c8c6b3 pack x13,x17,x12 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cp_rs2_edges_0x2, Zbkb_pack_cg_cp_rs2_edges_0x2_str) + 800017b0: 000bb203 ld x4,0(x23) + 800017b4: 00d20c63 beq x4,x13,800017cc + 800017b8: 5c9052ef jal x5,80007580 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 8000fa08 .word 0x8000fa08 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7d510f87ca2e1605 + 800017d0: 0000bb03 ld x22,0(x1) + 800017d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x8000000000000000 + 800017d8: 0000bd83 ld x27,0(x1) + 800017dc: 00808093 addi x1,x1,8 + +00000000800017e0 : +Zbkb_pack_cg_cp_rs2_edges_0x8000000000000000: + pack x6, x22, x27 # perform operation + 800017e0: 09bb4333 pack x6,x22,x27 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cp_rs2_edges_0x8000000000000000, Zbkb_pack_cg_cp_rs2_edges_0x8000000000000000_str) + 800017e4: 000bb203 ld x4,0(x23) + 800017e8: 00620c63 beq x4,x6,80001800 + 800017ec: 595052ef jal x5,80007580 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 8000fa42 .word 0x8000fa42 + 800017fc: 00000000 .word 0x00000000 + 80001800: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x14b6c694d6205def + 80001804: 0000b903 ld x18,0(x1) + 80001808: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x8000000000000001 + 8000180c: 0000b403 ld x8,0(x1) + 80001810: 00808093 addi x1,x1,8 + +0000000080001814 : +Zbkb_pack_cg_cp_rs2_edges_0x8000000000000001: + pack x21, x18, x8 # perform operation + 80001814: 08894ab3 pack x21,x18,x8 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cp_rs2_edges_0x8000000000000001, Zbkb_pack_cg_cp_rs2_edges_0x8000000000000001_str) + 80001818: 000bb203 ld x4,0(x23) + 8000181c: 01520c63 beq x4,x21,80001834 + 80001820: 561052ef jal x5,80007580 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000fa8b .word 0x8000fa8b + 80001830: 00000000 .word 0x00000000 + 80001834: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xd178048bc77d9fba + 80001838: 0000b783 ld x15,0(x1) + 8000183c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x7fffffffffffffff + 80001840: 0000b983 ld x19,0(x1) + 80001844: 00808093 addi x1,x1,8 + +0000000080001848 : +Zbkb_pack_cg_cp_rs2_edges_0x7fffffffffffffff: + pack x22, x15, x19 # perform operation + 80001848: 0937cb33 pack x22,x15,x19 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_pack_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 8000184c: 000bb203 ld x4,0(x23) + 80001850: 01620c63 beq x4,x22,80001868 + 80001854: 52d052ef jal x5,80007580 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 8000fad4 .word 0x8000fad4 + 80001864: 00000000 .word 0x00000000 + 80001868: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xbc48ae5d842ef899 + 8000186c: 0000be03 ld x28,0(x1) + 80001870: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80001874: 0000b183 ld x3,0(x1) + 80001878: 00808093 addi x1,x1,8 + +000000008000187c : +Zbkb_pack_cg_cp_rs2_edges_0x7ffffffffffffffe: + pack x16, x28, x3 # perform operation + 8000187c: 083e4833 pack x16,x28,x3 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_pack_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 80001880: 000bb203 ld x4,0(x23) + 80001884: 01020c63 beq x4,x16,8000189c + 80001888: 4f9052ef jal x5,80007580 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 8000fb1d .word 0x8000fb1d + 80001898: 00000000 .word 0x00000000 + 8000189c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x55f76037e6f93e70 + 800018a0: 0000b683 ld x13,0(x1) + 800018a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffffffffffff + 800018a8: 0000b183 ld x3,0(x1) + 800018ac: 00808093 addi x1,x1,8 + +00000000800018b0 : +Zbkb_pack_cg_cp_rs2_edges_0xffffffffffffffff: + pack x17, x13, x3 # perform operation + 800018b0: 0836c8b3 pack x17,x13,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_pack_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018b4: 000bb203 ld x4,0(x23) + 800018b8: 01120c63 beq x4,x17,800018d0 + 800018bc: 4c5052ef jal x5,80007580 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 8000fb66 .word 0x8000fb66 + 800018cc: 00000000 .word 0x00000000 + 800018d0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x911f62924f77404a + 800018d4: 0000b983 ld x19,0(x1) + 800018d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xfffffffffffffffe + 800018dc: 0000b503 ld x10,0(x1) + 800018e0: 00808093 addi x1,x1,8 + +00000000800018e4 : +Zbkb_pack_cg_cp_rs2_edges_0xfffffffffffffffe: + pack x3, x19, x10 # perform operation + 800018e4: 08a9c1b3 pack x3,x19,x10 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_pack_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 800018e8: 000bb203 ld x4,0(x23) + 800018ec: 00320c63 beq x4,x3,80001904 + 800018f0: 491052ef jal x5,80007580 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 8000fbaf .word 0x8000fbaf + 80001900: 00000000 .word 0x00000000 + 80001904: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x76208c4636d2b943 + 80001908: 0000b903 ld x18,0(x1) + 8000190c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80001910: 0000b783 ld x15,0(x1) + 80001914: 00808093 addi x1,x1,8 + +0000000080001918 : +Zbkb_pack_cg_cp_rs2_edges_0x5bbc887763ae86f2: + pack x7, x18, x15 # perform operation + 80001918: 08f943b3 pack x7,x18,x15 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_pack_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 8000191c: 000bb203 ld x4,0(x23) + 80001920: 00720c63 beq x4,x7,80001938 + 80001924: 45d052ef jal x5,80007580 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 8000fbf8 .word 0x8000fbf8 + 80001934: 00000000 .word 0x00000000 + 80001938: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x1fd6ce1eaf72deef + 8000193c: 0000b383 ld x7,0(x1) + 80001940: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80001944: 0000b403 ld x8,0(x1) + 80001948: 00808093 addi x1,x1,8 + +000000008000194c : +Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + pack x2, x7, x8 # perform operation + 8000194c: 0883c133 pack x2,x7,x8 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001950: 000bb203 ld x4,0(x23) + 80001954: 00220c63 beq x4,x2,8000196c + 80001958: 429052ef jal x5,80007580 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 8000fc41 .word 0x8000fc41 + 80001968: 00000000 .word 0x00000000 + 8000196c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x4c02c94ad7bf93a6 + 80001970: 0000b383 ld x7,0(x1) + 80001974: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5555555555555555 + 80001978: 0000b603 ld x12,0(x1) + 8000197c: 00808093 addi x1,x1,8 + +0000000080001980 : +Zbkb_pack_cg_cp_rs2_edges_0x5555555555555555: + pack x26, x7, x12 # perform operation + 80001980: 08c3cd33 pack x26,x7,x12 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cp_rs2_edges_0x5555555555555555, Zbkb_pack_cg_cp_rs2_edges_0x5555555555555555_str) + 80001984: 000bb203 ld x4,0(x23) + 80001988: 01a20c63 beq x4,x26,800019a0 + 8000198c: 3f5052ef jal x5,80007580 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 8000fc8a .word 0x8000fc8a + 8000199c: 00000000 .word 0x00000000 + 800019a0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xbb5c81fcd0c58903 + 800019a4: 0000b783 ld x15,0(x1) + 800019a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000000ffffffff + 800019ac: 0000bf03 ld x30,0(x1) + 800019b0: 00808093 addi x1,x1,8 + +00000000800019b4 : +Zbkb_pack_cg_cp_rs2_edges_0xffffffff: + pack x29, x15, x30 # perform operation + 800019b4: 09e7ceb3 pack x29,x15,x30 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cp_rs2_edges_0xffffffff, Zbkb_pack_cg_cp_rs2_edges_0xffffffff_str) + 800019b8: 000bb203 ld x4,0(x23) + 800019bc: 01d20c63 beq x4,x29,800019d4 + 800019c0: 3c1052ef jal x5,80007580 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 8000fcd3 .word 0x8000fcd3 + 800019d0: 00000000 .word 0x00000000 + 800019d4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x94546b910cd6089a + 800019d8: 0000bd03 ld x26,0(x1) + 800019dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000000fffffffe + 800019e0: 0000bf03 ld x30,0(x1) + 800019e4: 00808093 addi x1,x1,8 + +00000000800019e8 : +Zbkb_pack_cg_cp_rs2_edges_0xfffffffe: + pack x7, x26, x30 # perform operation + 800019e8: 09ed43b3 pack x7,x26,x30 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cp_rs2_edges_0xfffffffe, Zbkb_pack_cg_cp_rs2_edges_0xfffffffe_str) + 800019ec: 000bb203 ld x4,0(x23) + 800019f0: 00720c63 beq x4,x7,80001a08 + 800019f4: 38d052ef jal x5,80007580 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 8000fd14 .word 0x8000fd14 + 80001a04: 00000000 .word 0x00000000 + 80001a08: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0xa73175debb333303 + 80001a0c: 0000b603 ld x12,0(x1) + 80001a10: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x0000000100000000 + 80001a14: 0000b383 ld x7,0(x1) + 80001a18: 00808093 addi x1,x1,8 + +0000000080001a1c : +Zbkb_pack_cg_cp_rs2_edges_0x100000000: + pack x2, x12, x7 # perform operation + 80001a1c: 08764133 pack x2,x12,x7 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cp_rs2_edges_0x100000000, Zbkb_pack_cg_cp_rs2_edges_0x100000000_str) + 80001a20: 000bb203 ld x4,0(x23) + 80001a24: 00220c63 beq x4,x2,80001a3c + 80001a28: 359052ef jal x5,80007580 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 8000fd55 .word 0x8000fd55 + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xcc3abc05796b1966 + 80001a40: 0000bb03 ld x22,0(x1) + 80001a44: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000100000001 + 80001a48: 0000bc03 ld x24,0(x1) + 80001a4c: 00808093 addi x1,x1,8 + +0000000080001a50 : +Zbkb_pack_cg_cp_rs2_edges_0x100000001: + pack x11, x22, x24 # perform operation + 80001a50: 098b45b3 pack x11,x22,x24 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cp_rs2_edges_0x100000001, Zbkb_pack_cg_cp_rs2_edges_0x100000001_str) + 80001a54: 000bb203 ld x4,0(x23) + 80001a58: 00b20c63 beq x4,x11,80001a70 + 80001a5c: 325052ef jal x5,80007580 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 8000fd97 .word 0x8000fd97 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x0000000000000000 + 80001a74: 0000bc03 ld x24,0(x1) + 80001a78: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000000000000 + 80001a7c: 0000b303 ld x6,0(x1) + 80001a80: 00808093 addi x1,x1,8 + +0000000080001a84 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + pack x13, x24, x6 # perform operation + 80001a84: 086c46b3 pack x13,x24,x6 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001a88: 000bb203 ld x4,0(x23) + 80001a8c: 00d20c63 beq x4,x13,80001aa4 + 80001a90: 2f1052ef jal x5,80007580 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8000fdd9 .word 0x8000fdd9 + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0000000000000000 + 80001aa8: 0000be83 ld x29,0(x1) + 80001aac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000000000001 + 80001ab0: 0000bc83 ld x25,0(x1) + 80001ab4: 00808093 addi x1,x1,8 + +0000000080001ab8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + pack x31, x29, x25 # perform operation + 80001ab8: 099ecfb3 pack x31,x29,x25 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001abc: 000bb203 ld x4,0(x23) + 80001ac0: 01f20c63 beq x4,x31,80001ad8 + 80001ac4: 2bd052ef jal x5,80007580 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 8000fe2a .word 0x8000fe2a + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000000 + 80001adc: 0000bc83 ld x25,0(x1) + 80001ae0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000000000002 + 80001ae4: 0000b803 ld x16,0(x1) + 80001ae8: 00808093 addi x1,x1,8 + +0000000080001aec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + pack x28, x25, x16 # perform operation + 80001aec: 090cce33 pack x28,x25,x16 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001af0: 000bb203 ld x4,0(x23) + 80001af4: 01c20c63 beq x4,x28,80001b0c + 80001af8: 289052ef jal x5,80007580 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 8000fe7b .word 0x8000fe7b + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000000000000 + 80001b10: 0000b303 ld x6,0(x1) + 80001b14: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x8000000000000000 + 80001b18: 0000ba83 ld x21,0(x1) + 80001b1c: 00808093 addi x1,x1,8 + +0000000080001b20 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + pack x15, x6, x21 # perform operation + 80001b20: 095347b3 pack x15,x6,x21 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b24: 000bb203 ld x4,0(x23) + 80001b28: 00f20c63 beq x4,x15,80001b40 + 80001b2c: 255052ef jal x5,80007580 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 8000fecc .word 0x8000fecc + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000000000000 + 80001b44: 0000ba03 ld x20,0(x1) + 80001b48: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x8000000000000001 + 80001b4c: 0000be03 ld x28,0(x1) + 80001b50: 00808093 addi x1,x1,8 + +0000000080001b54 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + pack x15, x20, x28 # perform operation + 80001b54: 09ca47b3 pack x15,x20,x28 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b58: 000bb203 ld x4,0(x23) + 80001b5c: 00f20c63 beq x4,x15,80001b74 + 80001b60: 221052ef jal x5,80007580 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 8000ff2c .word 0x8000ff2c + 80001b70: 00000000 .word 0x00000000 + 80001b74: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000000000000 + 80001b78: 0000b503 ld x10,0(x1) + 80001b7c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x7fffffffffffffff + 80001b80: 0000b403 ld x8,0(x1) + 80001b84: 00808093 addi x1,x1,8 + +0000000080001b88 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + pack x13, x10, x8 # perform operation + 80001b88: 088546b3 pack x13,x10,x8 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001b8c: 000bb203 ld x4,0(x23) + 80001b90: 00d20c63 beq x4,x13,80001ba8 + 80001b94: 1ed052ef jal x5,80007580 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 8000ff8c .word 0x8000ff8c + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000000 + 80001bac: 0000b583 ld x11,0(x1) + 80001bb0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80001bb4: 0000b183 ld x3,0(x1) + 80001bb8: 00808093 addi x1,x1,8 + +0000000080001bbc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + pack x10, x11, x3 # perform operation + 80001bbc: 0835c533 pack x10,x11,x3 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bc0: 000bb203 ld x4,0(x23) + 80001bc4: 00a20c63 beq x4,x10,80001bdc + 80001bc8: 1b9052ef jal x5,80007580 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 8000ffec .word 0x8000ffec + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000000 + 80001be0: 0000b703 ld x14,0(x1) + 80001be4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 80001be8: 0000bf83 ld x31,0(x1) + 80001bec: 00808093 addi x1,x1,8 + +0000000080001bf0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + pack x8, x14, x31 # perform operation + 80001bf0: 09f74433 pack x8,x14,x31 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001bf4: 000bb203 ld x4,0(x23) + 80001bf8: 00820c63 beq x4,x8,80001c10 + 80001bfc: 185052ef jal x5,80007580 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 8001004c .word 0x8001004c + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000000000000 + 80001c14: 0000bf83 ld x31,0(x1) + 80001c18: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xfffffffffffffffe + 80001c1c: 0000b583 ld x11,0(x1) + 80001c20: 00808093 addi x1,x1,8 + +0000000080001c24 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + pack x26, x31, x11 # perform operation + 80001c24: 08bfcd33 pack x26,x31,x11 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c28: 000bb203 ld x4,0(x23) + 80001c2c: 01a20c63 beq x4,x26,80001c44 + 80001c30: 151052ef jal x5,80007580 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 800100ac .word 0x800100ac + 80001c40: 00000000 .word 0x00000000 + 80001c44: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x0000000000000000 + 80001c48: 0000bf03 ld x30,0(x1) + 80001c4c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 80001c50: 0000bb03 ld x22,0(x1) + 80001c54: 00808093 addi x1,x1,8 + +0000000080001c58 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + pack x27, x30, x22 # perform operation + 80001c58: 096f4db3 pack x27,x30,x22 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c5c: 000bb203 ld x4,0(x23) + 80001c60: 01b20c63 beq x4,x27,80001c78 + 80001c64: 11d052ef jal x5,80007580 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 8001010c .word 0x8001010c + 80001c74: 00000000 .word 0x00000000 + 80001c78: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000000000000 + 80001c7c: 0000b183 ld x3,0(x1) + 80001c80: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80001c84: 0000bf83 ld x31,0(x1) + 80001c88: 00808093 addi x1,x1,8 + +0000000080001c8c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + pack x18, x3, x31 # perform operation + 80001c8c: 09f1c933 pack x18,x3,x31 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001c90: 000bb203 ld x4,0(x23) + 80001c94: 01220c63 beq x4,x18,80001cac + 80001c98: 0e9052ef jal x5,80007580 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 8001016c .word 0x8001016c + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000000000000 + 80001cb0: 0000bf83 ld x31,0(x1) + 80001cb4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x5555555555555555 + 80001cb8: 0000bd83 ld x27,0(x1) + 80001cbc: 00808093 addi x1,x1,8 + +0000000080001cc0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + pack x9, x31, x27 # perform operation + 80001cc0: 09bfc4b3 pack x9,x31,x27 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cc4: 000bb203 ld x4,0(x23) + 80001cc8: 00920c63 beq x4,x9,80001ce0 + 80001ccc: 0b5052ef jal x5,80007580 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 800101cc .word 0x800101cc + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000000000000 + 80001ce4: 0000b183 ld x3,0(x1) + 80001ce8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000ffffffff + 80001cec: 0000b503 ld x10,0(x1) + 80001cf0: 00808093 addi x1,x1,8 + +0000000080001cf4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + pack x16, x3, x10 # perform operation + 80001cf4: 08a1c833 pack x16,x3,x10 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001cf8: 000bb203 ld x4,0(x23) + 80001cfc: 01020c63 beq x4,x16,80001d14 + 80001d00: 081052ef jal x5,80007580 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 8001022c .word 0x8001022c + 80001d10: 00000000 .word 0x00000000 + 80001d14: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000000 + 80001d18: 0000b703 ld x14,0(x1) + 80001d1c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x00000000fffffffe + 80001d20: 0000b483 ld x9,0(x1) + 80001d24: 00808093 addi x1,x1,8 + +0000000080001d28 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + pack x11, x14, x9 # perform operation + 80001d28: 089745b3 pack x11,x14,x9 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d2c: 000bb203 ld x4,0(x23) + 80001d30: 00b20c63 beq x4,x11,80001d48 + 80001d34: 04d052ef jal x5,80007580 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 80010284 .word 0x80010284 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000000 + 80001d4c: 0000b803 ld x16,0(x1) + 80001d50: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000100000000 + 80001d54: 0000b603 ld x12,0(x1) + 80001d58: 00808093 addi x1,x1,8 + +0000000080001d5c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + pack x7, x16, x12 # perform operation + 80001d5c: 08c843b3 pack x7,x16,x12 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d60: 000bb203 ld x4,0(x23) + 80001d64: 00720c63 beq x4,x7,80001d7c + 80001d68: 019052ef jal x5,80007580 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 800102dc .word 0x800102dc + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x0000000000000000 + 80001d80: 0000b103 ld x2,0(x1) + 80001d84: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000100000001 + 80001d88: 0000bc03 ld x24,0(x1) + 80001d8c: 00808093 addi x1,x1,8 + +0000000080001d90 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + pack x14, x2, x24 # perform operation + 80001d90: 09814733 pack x14,x2,x24 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001d94: 000bb203 ld x4,0(x23) + 80001d98: 00e20c63 beq x4,x14,80001db0 + 80001d9c: 7e4052ef jal x5,80007580 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 80010335 .word 0x80010335 + 80001dac: 00000000 .word 0x00000000 + 80001db0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000001 + 80001db4: 0000b703 ld x14,0(x1) + 80001db8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000000 + 80001dbc: 0000bc03 ld x24,0(x1) + 80001dc0: 00808093 addi x1,x1,8 + +0000000080001dc4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + pack x11, x14, x24 # perform operation + 80001dc4: 098745b3 pack x11,x14,x24 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dc8: 000bb203 ld x4,0(x23) + 80001dcc: 00b20c63 beq x4,x11,80001de4 + 80001dd0: 7b0052ef jal x5,80007580 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 8001038e .word 0x8001038e + 80001de0: 00000000 .word 0x00000000 + 80001de4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000001 + 80001de8: 0000b803 ld x16,0(x1) + 80001dec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000001 + 80001df0: 0000bd03 ld x26,0(x1) + 80001df4: 00808093 addi x1,x1,8 + +0000000080001df8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + pack x9, x16, x26 # perform operation + 80001df8: 09a844b3 pack x9,x16,x26 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001dfc: 000bb203 ld x4,0(x23) + 80001e00: 00920c63 beq x4,x9,80001e18 + 80001e04: 77c052ef jal x5,80007580 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 800103df .word 0x800103df + 80001e14: 00000000 .word 0x00000000 + 80001e18: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0000000000000001 + 80001e1c: 0000b603 ld x12,0(x1) + 80001e20: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000002 + 80001e24: 0000bc03 ld x24,0(x1) + 80001e28: 00808093 addi x1,x1,8 + +0000000080001e2c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + pack x19, x12, x24 # perform operation + 80001e2c: 098649b3 pack x19,x12,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e30: 000bb203 ld x4,0(x23) + 80001e34: 01320c63 beq x4,x19,80001e4c + 80001e38: 748052ef jal x5,80007580 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 80010430 .word 0x80010430 + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000000000001 + 80001e50: 0000bf83 ld x31,0(x1) + 80001e54: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x8000000000000000 + 80001e58: 0000b183 ld x3,0(x1) + 80001e5c: 00808093 addi x1,x1,8 + +0000000080001e60 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + pack x17, x31, x3 # perform operation + 80001e60: 083fc8b3 pack x17,x31,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e64: 000bb203 ld x4,0(x23) + 80001e68: 01120c63 beq x4,x17,80001e80 + 80001e6c: 714052ef jal x5,80007580 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 80010481 .word 0x80010481 + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000000000001 + 80001e84: 0000ba83 ld x21,0(x1) + 80001e88: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x8000000000000001 + 80001e8c: 0000b503 ld x10,0(x1) + 80001e90: 00808093 addi x1,x1,8 + +0000000080001e94 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + pack x16, x21, x10 # perform operation + 80001e94: 08aac833 pack x16,x21,x10 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001e98: 000bb203 ld x4,0(x23) + 80001e9c: 01020c63 beq x4,x16,80001eb4 + 80001ea0: 6e0052ef jal x5,80007580 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 800104e1 .word 0x800104e1 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000000000001 + 80001eb8: 0000b183 ld x3,0(x1) + 80001ebc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7fffffffffffffff + 80001ec0: 0000bc03 ld x24,0(x1) + 80001ec4: 00808093 addi x1,x1,8 + +0000000080001ec8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + pack x19, x3, x24 # perform operation + 80001ec8: 0981c9b3 pack x19,x3,x24 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ecc: 000bb203 ld x4,0(x23) + 80001ed0: 01320c63 beq x4,x19,80001ee8 + 80001ed4: 6ac052ef jal x5,80007580 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 80010541 .word 0x80010541 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000001 + 80001eec: 0000b703 ld x14,0(x1) + 80001ef0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x7ffffffffffffffe + 80001ef4: 0000b603 ld x12,0(x1) + 80001ef8: 00808093 addi x1,x1,8 + +0000000080001efc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + pack x30, x14, x12 # perform operation + 80001efc: 08c74f33 pack x30,x14,x12 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f00: 000bb203 ld x4,0(x23) + 80001f04: 01e20c63 beq x4,x30,80001f1c + 80001f08: 678052ef jal x5,80007580 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 800105a1 .word 0x800105a1 + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000001 + 80001f20: 0000b883 ld x17,0(x1) + 80001f24: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0xffffffffffffffff + 80001f28: 0000b483 ld x9,0(x1) + 80001f2c: 00808093 addi x1,x1,8 + +0000000080001f30 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + pack x28, x17, x9 # perform operation + 80001f30: 0898ce33 pack x28,x17,x9 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f34: 000bb203 ld x4,0(x23) + 80001f38: 01c20c63 beq x4,x28,80001f50 + 80001f3c: 644052ef jal x5,80007580 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 80010601 .word 0x80010601 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x0000000000000001 + 80001f54: 0000b103 ld x2,0(x1) + 80001f58: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xfffffffffffffffe + 80001f5c: 0000bb03 ld x22,0(x1) + 80001f60: 00808093 addi x1,x1,8 + +0000000080001f64 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + pack x19, x2, x22 # perform operation + 80001f64: 096149b3 pack x19,x2,x22 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f68: 000bb203 ld x4,0(x23) + 80001f6c: 01320c63 beq x4,x19,80001f84 + 80001f70: 610052ef jal x5,80007580 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 80010661 .word 0x80010661 + 80001f80: 00000000 .word 0x00000000 + 80001f84: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000000000001 + 80001f88: 0000b883 ld x17,0(x1) + 80001f8c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80001f90: 0000b783 ld x15,0(x1) + 80001f94: 00808093 addi x1,x1,8 + +0000000080001f98 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + pack x12, x17, x15 # perform operation + 80001f98: 08f8c633 pack x12,x17,x15 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001f9c: 000bb203 ld x4,0(x23) + 80001fa0: 00c20c63 beq x4,x12,80001fb8 + 80001fa4: 5dc052ef jal x5,80007580 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 800106c1 .word 0x800106c1 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x0000000000000001 + 80001fbc: 0000bb03 ld x22,0(x1) + 80001fc0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001fc4: 0000b883 ld x17,0(x1) + 80001fc8: 00808093 addi x1,x1,8 + +0000000080001fcc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + pack x21, x22, x17 # perform operation + 80001fcc: 091b4ab3 pack x21,x22,x17 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001fd0: 000bb203 ld x4,0(x23) + 80001fd4: 01520c63 beq x4,x21,80001fec + 80001fd8: 5a8052ef jal x5,80007580 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 80010721 .word 0x80010721 + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000000000001 + 80001ff0: 0000ba03 ld x20,0(x1) + 80001ff4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x5555555555555555 + 80001ff8: 0000b303 ld x6,0(x1) + 80001ffc: 00808093 addi x1,x1,8 + +0000000080002000 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + pack x17, x20, x6 # perform operation + 80002000: 086a48b3 pack x17,x20,x6 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002004: 000bb203 ld x4,0(x23) + 80002008: 01120c63 beq x4,x17,80002020 + 8000200c: 574052ef jal x5,80007580 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 80010781 .word 0x80010781 + 8000201c: 00000000 .word 0x00000000 + 80002020: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000000000001 + 80002024: 0000b483 ld x9,0(x1) + 80002028: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x00000000ffffffff + 8000202c: 0000b583 ld x11,0(x1) + 80002030: 00808093 addi x1,x1,8 + +0000000080002034 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + pack x16, x9, x11 # perform operation + 80002034: 08b4c833 pack x16,x9,x11 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002038: 000bb203 ld x4,0(x23) + 8000203c: 01020c63 beq x4,x16,80002054 + 80002040: 540052ef jal x5,80007580 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 800107e1 .word 0x800107e1 + 80002050: 00000000 .word 0x00000000 + 80002054: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x0000000000000001 + 80002058: 0000b383 ld x7,0(x1) + 8000205c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x00000000fffffffe + 80002060: 0000b183 ld x3,0(x1) + 80002064: 00808093 addi x1,x1,8 + +0000000080002068 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + pack x22, x7, x3 # perform operation + 80002068: 0833cb33 pack x22,x7,x3 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 8000206c: 000bb203 ld x4,0(x23) + 80002070: 01620c63 beq x4,x22,80002088 + 80002074: 50c052ef jal x5,80007580 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 80010839 .word 0x80010839 + 80002084: 00000000 .word 0x00000000 + 80002088: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000001 + 8000208c: 0000b983 ld x19,0(x1) + 80002090: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000100000000 + 80002094: 0000bc83 ld x25,0(x1) + 80002098: 00808093 addi x1,x1,8 + +000000008000209c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + pack x12, x19, x25 # perform operation + 8000209c: 0999c633 pack x12,x19,x25 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020a0: 000bb203 ld x4,0(x23) + 800020a4: 00c20c63 beq x4,x12,800020bc + 800020a8: 4d8052ef jal x5,80007580 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80010891 .word 0x80010891 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000001 + 800020c0: 0000b583 ld x11,0(x1) + 800020c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x0000000100000001 + 800020c8: 0000b383 ld x7,0(x1) + 800020cc: 00808093 addi x1,x1,8 + +00000000800020d0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + pack x31, x11, x7 # perform operation + 800020d0: 0875cfb3 pack x31,x11,x7 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020d4: 000bb203 ld x4,0(x23) + 800020d8: 01f20c63 beq x4,x31,800020f0 + 800020dc: 4a4052ef jal x5,80007580 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 800108ea .word 0x800108ea + 800020ec: 00000000 .word 0x00000000 + 800020f0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000000000002 + 800020f4: 0000b783 ld x15,0(x1) + 800020f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000000 + 800020fc: 0000bd83 ld x27,0(x1) + 80002100: 00808093 addi x1,x1,8 + +0000000080002104 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + pack x26, x15, x27 # perform operation + 80002104: 09b7cd33 pack x26,x15,x27 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002108: 000bb203 ld x4,0(x23) + 8000210c: 01a20c63 beq x4,x26,80002124 + 80002110: 470052ef jal x5,80007580 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80010943 .word 0x80010943 + 80002120: 00000000 .word 0x00000000 + 80002124: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x0000000000000002 + 80002128: 0000bf03 ld x30,0(x1) + 8000212c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000000000001 + 80002130: 0000be03 ld x28,0(x1) + 80002134: 00808093 addi x1,x1,8 + +0000000080002138 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + pack x25, x30, x28 # perform operation + 80002138: 09cf4cb3 pack x25,x30,x28 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 8000213c: 000bb203 ld x4,0(x23) + 80002140: 01920c63 beq x4,x25,80002158 + 80002144: 43c052ef jal x5,80007580 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80010994 .word 0x80010994 + 80002154: 00000000 .word 0x00000000 + 80002158: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000002 + 8000215c: 0000b703 ld x14,0(x1) + 80002160: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x0000000000000002 + 80002164: 0000b683 ld x13,0(x1) + 80002168: 00808093 addi x1,x1,8 + +000000008000216c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + pack x21, x14, x13 # perform operation + 8000216c: 08d74ab3 pack x21,x14,x13 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002170: 000bb203 ld x4,0(x23) + 80002174: 01520c63 beq x4,x21,8000218c + 80002178: 408052ef jal x5,80007580 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 800109e5 .word 0x800109e5 + 80002188: 00000000 .word 0x00000000 + 8000218c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000002 + 80002190: 0000b983 ld x19,0(x1) + 80002194: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x8000000000000000 + 80002198: 0000b383 ld x7,0(x1) + 8000219c: 00808093 addi x1,x1,8 + +00000000800021a0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + pack x10, x19, x7 # perform operation + 800021a0: 0879c533 pack x10,x19,x7 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021a4: 000bb203 ld x4,0(x23) + 800021a8: 00a20c63 beq x4,x10,800021c0 + 800021ac: 3d4052ef jal x5,80007580 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80010a36 .word 0x80010a36 + 800021bc: 00000000 .word 0x00000000 + 800021c0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000000000002 + 800021c4: 0000b903 ld x18,0(x1) + 800021c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x8000000000000001 + 800021cc: 0000b983 ld x19,0(x1) + 800021d0: 00808093 addi x1,x1,8 + +00000000800021d4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + pack x7, x18, x19 # perform operation + 800021d4: 093943b3 pack x7,x18,x19 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 800021d8: 000bb203 ld x4,0(x23) + 800021dc: 00720c63 beq x4,x7,800021f4 + 800021e0: 3a0052ef jal x5,80007580 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80010a96 .word 0x80010a96 + 800021f0: 00000000 .word 0x00000000 + 800021f4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x0000000000000002 + 800021f8: 0000bf03 ld x30,0(x1) + 800021fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x7fffffffffffffff + 80002200: 0000bc83 ld x25,0(x1) + 80002204: 00808093 addi x1,x1,8 + +0000000080002208 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + pack x29, x30, x25 # perform operation + 80002208: 099f4eb3 pack x29,x30,x25 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 8000220c: 000bb203 ld x4,0(x23) + 80002210: 01d20c63 beq x4,x29,80002228 + 80002214: 36c052ef jal x5,80007580 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80010af6 .word 0x80010af6 + 80002224: 00000000 .word 0x00000000 + 80002228: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000002 + 8000222c: 0000b583 ld x11,0(x1) + 80002230: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80002234: 0000b183 ld x3,0(x1) + 80002238: 00808093 addi x1,x1,8 + +000000008000223c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + pack x25, x11, x3 # perform operation + 8000223c: 0835ccb3 pack x25,x11,x3 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002240: 000bb203 ld x4,0(x23) + 80002244: 01920c63 beq x4,x25,8000225c + 80002248: 338052ef jal x5,80007580 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80010b56 .word 0x80010b56 + 80002258: 00000000 .word 0x00000000 + 8000225c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0000000000000002 + 80002260: 0000be83 ld x29,0(x1) + 80002264: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xffffffffffffffff + 80002268: 0000bd03 ld x26,0(x1) + 8000226c: 00808093 addi x1,x1,8 + +0000000080002270 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + pack x11, x29, x26 # perform operation + 80002270: 09aec5b3 pack x11,x29,x26 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 80002274: 000bb203 ld x4,0(x23) + 80002278: 00b20c63 beq x4,x11,80002290 + 8000227c: 304052ef jal x5,80007580 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80010bb6 .word 0x80010bb6 + 8000228c: 00000000 .word 0x00000000 + 80002290: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000000000002 + 80002294: 0000b803 ld x16,0(x1) + 80002298: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xfffffffffffffffe + 8000229c: 0000b883 ld x17,0(x1) + 800022a0: 00808093 addi x1,x1,8 + +00000000800022a4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + pack x3, x16, x17 # perform operation + 800022a4: 091841b3 pack x3,x16,x17 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022a8: 000bb203 ld x4,0(x23) + 800022ac: 00320c63 beq x4,x3,800022c4 + 800022b0: 2d0052ef jal x5,80007580 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80010c16 .word 0x80010c16 + 800022c0: 00000000 .word 0x00000000 + 800022c4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000002 + 800022c8: 0000b983 ld x19,0(x1) + 800022cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 800022d0: 0000b183 ld x3,0(x1) + 800022d4: 00808093 addi x1,x1,8 + +00000000800022d8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + pack x21, x19, x3 # perform operation + 800022d8: 0839cab3 pack x21,x19,x3 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 800022dc: 000bb203 ld x4,0(x23) + 800022e0: 01520c63 beq x4,x21,800022f8 + 800022e4: 29c052ef jal x5,80007580 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 80010c76 .word 0x80010c76 + 800022f4: 00000000 .word 0x00000000 + 800022f8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000002 + 800022fc: 0000b583 ld x11,0(x1) + 80002300: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80002304: 0000ba03 ld x20,0(x1) + 80002308: 00808093 addi x1,x1,8 + +000000008000230c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + pack x24, x11, x20 # perform operation + 8000230c: 0945cc33 pack x24,x11,x20 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002310: 000bb203 ld x4,0(x23) + 80002314: 01820c63 beq x4,x24,8000232c + 80002318: 268052ef jal x5,80007580 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80010cd6 .word 0x80010cd6 + 80002328: 00000000 .word 0x00000000 + 8000232c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x0000000000000002 + 80002330: 0000b583 ld x11,0(x1) + 80002334: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x5555555555555555 + 80002338: 0000bd03 ld x26,0(x1) + 8000233c: 00808093 addi x1,x1,8 + +0000000080002340 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + pack x16, x11, x26 # perform operation + 80002340: 09a5c833 pack x16,x11,x26 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002344: 000bb203 ld x4,0(x23) + 80002348: 01020c63 beq x4,x16,80002360 + 8000234c: 234052ef jal x5,80007580 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 80010d36 .word 0x80010d36 + 8000235c: 00000000 .word 0x00000000 + 80002360: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x0000000000000002 + 80002364: 0000bc83 ld x25,0(x1) + 80002368: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000ffffffff + 8000236c: 0000b503 ld x10,0(x1) + 80002370: 00808093 addi x1,x1,8 + +0000000080002374 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + pack x30, x25, x10 # perform operation + 80002374: 08accf33 pack x30,x25,x10 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 80002378: 000bb203 ld x4,0(x23) + 8000237c: 01e20c63 beq x4,x30,80002394 + 80002380: 200052ef jal x5,80007580 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 80010d96 .word 0x80010d96 + 80002390: 00000000 .word 0x00000000 + 80002394: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000000000002 + 80002398: 0000ba03 ld x20,0(x1) + 8000239c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x00000000fffffffe + 800023a0: 0000b903 ld x18,0(x1) + 800023a4: 00808093 addi x1,x1,8 + +00000000800023a8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + pack x14, x20, x18 # perform operation + 800023a8: 092a4733 pack x14,x20,x18 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023ac: 000bb203 ld x4,0(x23) + 800023b0: 00e20c63 beq x4,x14,800023c8 + 800023b4: 1cc052ef jal x5,80007580 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 80010dee .word 0x80010dee + 800023c4: 00000000 .word 0x00000000 + 800023c8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x0000000000000002 + 800023cc: 0000b103 ld x2,0(x1) + 800023d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000100000000 + 800023d4: 0000b703 ld x14,0(x1) + 800023d8: 00808093 addi x1,x1,8 + +00000000800023dc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + pack x11, x2, x14 # perform operation + 800023dc: 08e145b3 pack x11,x2,x14 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 800023e0: 000bb203 ld x4,0(x23) + 800023e4: 00b20c63 beq x4,x11,800023fc + 800023e8: 198052ef jal x5,80007580 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 80010e46 .word 0x80010e46 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000000000002 + 80002400: 0000b183 ld x3,0(x1) + 80002404: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x0000000100000001 + 80002408: 0000b903 ld x18,0(x1) + 8000240c: 00808093 addi x1,x1,8 + +0000000080002410 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + pack x11, x3, x18 # perform operation + 80002410: 0921c5b3 pack x11,x3,x18 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002414: 000bb203 ld x4,0(x23) + 80002418: 00b20c63 beq x4,x11,80002430 + 8000241c: 164052ef jal x5,80007580 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 80010e9f .word 0x80010e9f + 8000242c: 00000000 .word 0x00000000 + 80002430: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x8000000000000000 + 80002434: 0000b383 ld x7,0(x1) + 80002438: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000000 + 8000243c: 0000bd83 ld x27,0(x1) + 80002440: 00808093 addi x1,x1,8 + +0000000080002444 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + pack x13, x7, x27 # perform operation + 80002444: 09b3c6b3 pack x13,x7,x27 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002448: 000bb203 ld x4,0(x23) + 8000244c: 00d20c63 beq x4,x13,80002464 + 80002450: 130052ef jal x5,80007580 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 80010ef8 .word 0x80010ef8 + 80002460: 00000000 .word 0x00000000 + 80002464: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x8000000000000000 + 80002468: 0000b303 ld x6,0(x1) + 8000246c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x0000000000000001 + 80002470: 0000b483 ld x9,0(x1) + 80002474: 00808093 addi x1,x1,8 + +0000000080002478 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + pack x17, x6, x9 # perform operation + 80002478: 089348b3 pack x17,x6,x9 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 8000247c: 000bb203 ld x4,0(x23) + 80002480: 01120c63 beq x4,x17,80002498 + 80002484: 0fc052ef jal x5,80007580 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 80010f58 .word 0x80010f58 + 80002494: 00000000 .word 0x00000000 + 80002498: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x8000000000000000 + 8000249c: 0000ba83 ld x21,0(x1) + 800024a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000000000002 + 800024a4: 0000b603 ld x12,0(x1) + 800024a8: 00808093 addi x1,x1,8 + +00000000800024ac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + pack x26, x21, x12 # perform operation + 800024ac: 08cacd33 pack x26,x21,x12 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024b0: 000bb203 ld x4,0(x23) + 800024b4: 01a20c63 beq x4,x26,800024cc + 800024b8: 0c8052ef jal x5,80007580 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 80010fb8 .word 0x80010fb8 + 800024c8: 00000000 .word 0x00000000 + 800024cc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x8000000000000000 + 800024d0: 0000be03 ld x28,0(x1) + 800024d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x8000000000000000 + 800024d8: 0000bf83 ld x31,0(x1) + 800024dc: 00808093 addi x1,x1,8 + +00000000800024e0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + pack x29, x28, x31 # perform operation + 800024e0: 09fe4eb3 pack x29,x28,x31 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 800024e4: 000bb203 ld x4,0(x23) + 800024e8: 01d20c63 beq x4,x29,80002500 + 800024ec: 094052ef jal x5,80007580 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 80011018 .word 0x80011018 + 800024fc: 00000000 .word 0x00000000 + 80002500: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x8000000000000000 + 80002504: 0000be03 ld x28,0(x1) + 80002508: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x8000000000000001 + 8000250c: 0000b403 ld x8,0(x1) + 80002510: 00808093 addi x1,x1,8 + +0000000080002514 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + pack x22, x28, x8 # perform operation + 80002514: 088e4b33 pack x22,x28,x8 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002518: 000bb203 ld x4,0(x23) + 8000251c: 01620c63 beq x4,x22,80002534 + 80002520: 060052ef jal x5,80007580 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 80011087 .word 0x80011087 + 80002530: 00000000 .word 0x00000000 + 80002534: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x8000000000000000 + 80002538: 0000b683 ld x13,0(x1) + 8000253c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7fffffffffffffff + 80002540: 0000bd83 ld x27,0(x1) + 80002544: 00808093 addi x1,x1,8 + +0000000080002548 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + pack x2, x13, x27 # perform operation + 80002548: 09b6c133 pack x2,x13,x27 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 8000254c: 000bb203 ld x4,0(x23) + 80002550: 00220c63 beq x4,x2,80002568 + 80002554: 02c052ef jal x5,80007580 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 800110f6 .word 0x800110f6 + 80002564: 00000000 .word 0x00000000 + 80002568: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x8000000000000000 + 8000256c: 0000b903 ld x18,0(x1) + 80002570: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002574: 0000ba03 ld x20,0(x1) + 80002578: 00808093 addi x1,x1,8 + +000000008000257c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + pack x13, x18, x20 # perform operation + 8000257c: 094946b3 pack x13,x18,x20 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 80002580: 000bb203 ld x4,0(x23) + 80002584: 00d20c63 beq x4,x13,8000259c + 80002588: 7f9042ef jal x5,80007580 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 80011165 .word 0x80011165 + 80002598: 00000000 .word 0x00000000 + 8000259c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x8000000000000000 + 800025a0: 0000bc83 ld x25,0(x1) + 800025a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xffffffffffffffff + 800025a8: 0000bb03 ld x22,0(x1) + 800025ac: 00808093 addi x1,x1,8 + +00000000800025b0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + pack x14, x25, x22 # perform operation + 800025b0: 096cc733 pack x14,x25,x22 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025b4: 000bb203 ld x4,0(x23) + 800025b8: 00e20c63 beq x4,x14,800025d0 + 800025bc: 7c5042ef jal x5,80007580 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 800111d4 .word 0x800111d4 + 800025cc: 00000000 .word 0x00000000 + 800025d0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x8000000000000000 + 800025d4: 0000bf03 ld x30,0(x1) + 800025d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xfffffffffffffffe + 800025dc: 0000b683 ld x13,0(x1) + 800025e0: 00808093 addi x1,x1,8 + +00000000800025e4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + pack x31, x30, x13 # perform operation + 800025e4: 08df4fb3 pack x31,x30,x13 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 800025e8: 000bb203 ld x4,0(x23) + 800025ec: 01f20c63 beq x4,x31,80002604 + 800025f0: 791042ef jal x5,80007580 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 80011243 .word 0x80011243 + 80002600: 00000000 .word 0x00000000 + 80002604: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x8000000000000000 + 80002608: 0000b703 ld x14,0(x1) + 8000260c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80002610: 0000b883 ld x17,0(x1) + 80002614: 00808093 addi x1,x1,8 + +0000000080002618 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + pack x11, x14, x17 # perform operation + 80002618: 091745b3 pack x11,x14,x17 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 8000261c: 000bb203 ld x4,0(x23) + 80002620: 00b20c63 beq x4,x11,80002638 + 80002624: 75d042ef jal x5,80007580 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 800112b2 .word 0x800112b2 + 80002634: 00000000 .word 0x00000000 + 80002638: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x8000000000000000 + 8000263c: 0000b603 ld x12,0(x1) + 80002640: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80002644: 0000b583 ld x11,0(x1) + 80002648: 00808093 addi x1,x1,8 + +000000008000264c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + pack x15, x12, x11 # perform operation + 8000264c: 08b647b3 pack x15,x12,x11 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002650: 000bb203 ld x4,0(x23) + 80002654: 00f20c63 beq x4,x15,8000266c + 80002658: 729042ef jal x5,80007580 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 80011321 .word 0x80011321 + 80002668: 00000000 .word 0x00000000 + 8000266c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8000000000000000 + 80002670: 0000bd83 ld x27,0(x1) + 80002674: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x5555555555555555 + 80002678: 0000b303 ld x6,0(x1) + 8000267c: 00808093 addi x1,x1,8 + +0000000080002680 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + pack x20, x27, x6 # perform operation + 80002680: 086dca33 pack x20,x27,x6 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 80002684: 000bb203 ld x4,0(x23) + 80002688: 01420c63 beq x4,x20,800026a0 + 8000268c: 6f5042ef jal x5,80007580 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 80011390 .word 0x80011390 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8000000000000000 + 800026a4: 0000bf83 ld x31,0(x1) + 800026a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x00000000ffffffff + 800026ac: 0000b303 ld x6,0(x1) + 800026b0: 00808093 addi x1,x1,8 + +00000000800026b4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + pack x20, x31, x6 # perform operation + 800026b4: 086fca33 pack x20,x31,x6 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026b8: 000bb203 ld x4,0(x23) + 800026bc: 01420c63 beq x4,x20,800026d4 + 800026c0: 6c1042ef jal x5,80007580 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 800113ff .word 0x800113ff + 800026d0: 00000000 .word 0x00000000 + 800026d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x8000000000000000 + 800026d8: 0000b303 ld x6,0(x1) + 800026dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000000fffffffe + 800026e0: 0000b703 ld x14,0(x1) + 800026e4: 00808093 addi x1,x1,8 + +00000000800026e8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + pack x10, x6, x14 # perform operation + 800026e8: 08e34533 pack x10,x6,x14 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 800026ec: 000bb203 ld x4,0(x23) + 800026f0: 00a20c63 beq x4,x10,80002708 + 800026f4: 68d042ef jal x5,80007580 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 80011466 .word 0x80011466 + 80002704: 00000000 .word 0x00000000 + 80002708: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x8000000000000000 + 8000270c: 0000be83 ld x29,0(x1) + 80002710: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000100000000 + 80002714: 0000ba83 ld x21,0(x1) + 80002718: 00808093 addi x1,x1,8 + +000000008000271c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + pack x17, x29, x21 # perform operation + 8000271c: 095ec8b3 pack x17,x29,x21 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002720: 000bb203 ld x4,0(x23) + 80002724: 01120c63 beq x4,x17,8000273c + 80002728: 659042ef jal x5,80007580 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 800114cd .word 0x800114cd + 80002738: 00000000 .word 0x00000000 + 8000273c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8000000000000000 + 80002740: 0000bb03 ld x22,0(x1) + 80002744: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x0000000100000001 + 80002748: 0000bc83 ld x25,0(x1) + 8000274c: 00808093 addi x1,x1,8 + +0000000080002750 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + pack x13, x22, x25 # perform operation + 80002750: 099b46b3 pack x13,x22,x25 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002754: 000bb203 ld x4,0(x23) + 80002758: 00d20c63 beq x4,x13,80002770 + 8000275c: 625042ef jal x5,80007580 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 80011535 .word 0x80011535 + 8000276c: 00000000 .word 0x00000000 + 80002770: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x8000000000000001 + 80002774: 0000b803 ld x16,0(x1) + 80002778: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000000 + 8000277c: 0000ba83 ld x21,0(x1) + 80002780: 00808093 addi x1,x1,8 + +0000000080002784 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + pack x6, x16, x21 # perform operation + 80002784: 09584333 pack x6,x16,x21 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 80002788: 000bb203 ld x4,0(x23) + 8000278c: 00620c63 beq x4,x6,800027a4 + 80002790: 5f1042ef jal x5,80007580 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 8001159d .word 0x8001159d + 800027a0: 00000000 .word 0x00000000 + 800027a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x8000000000000001 + 800027a8: 0000b783 ld x15,0(x1) + 800027ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0000000000000001 + 800027b0: 0000bb03 ld x22,0(x1) + 800027b4: 00808093 addi x1,x1,8 + +00000000800027b8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + pack x11, x15, x22 # perform operation + 800027b8: 0967c5b3 pack x11,x15,x22 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027bc: 000bb203 ld x4,0(x23) + 800027c0: 00b20c63 beq x4,x11,800027d8 + 800027c4: 5bd042ef jal x5,80007580 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 800115fd .word 0x800115fd + 800027d4: 00000000 .word 0x00000000 + 800027d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x8000000000000001 + 800027dc: 0000b483 ld x9,0(x1) + 800027e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x0000000000000002 + 800027e4: 0000bb03 ld x22,0(x1) + 800027e8: 00808093 addi x1,x1,8 + +00000000800027ec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + pack x13, x9, x22 # perform operation + 800027ec: 0964c6b3 pack x13,x9,x22 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 800027f0: 000bb203 ld x4,0(x23) + 800027f4: 00d20c63 beq x4,x13,8000280c + 800027f8: 589042ef jal x5,80007580 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 8001165d .word 0x8001165d + 80002808: 00000000 .word 0x00000000 + 8000280c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8000000000000001 + 80002810: 0000bb03 ld x22,0(x1) + 80002814: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x8000000000000000 + 80002818: 0000be83 ld x29,0(x1) + 8000281c: 00808093 addi x1,x1,8 + +0000000080002820 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + pack x27, x22, x29 # perform operation + 80002820: 09db4db3 pack x27,x22,x29 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002824: 000bb203 ld x4,0(x23) + 80002828: 01b20c63 beq x4,x27,80002840 + 8000282c: 555042ef jal x5,80007580 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 800116bd .word 0x800116bd + 8000283c: 00000000 .word 0x00000000 + 80002840: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x8000000000000001 + 80002844: 0000b803 ld x16,0(x1) + 80002848: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x8000000000000001 + 8000284c: 0000b403 ld x8,0(x1) + 80002850: 00808093 addi x1,x1,8 + +0000000080002854 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + pack x17, x16, x8 # perform operation + 80002854: 088848b3 pack x17,x16,x8 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002858: 000bb203 ld x4,0(x23) + 8000285c: 01120c63 beq x4,x17,80002874 + 80002860: 521042ef jal x5,80007580 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 8001172c .word 0x8001172c + 80002870: 00000000 .word 0x00000000 + 80002874: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x8000000000000001 + 80002878: 0000b503 ld x10,0(x1) + 8000287c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x7fffffffffffffff + 80002880: 0000b703 ld x14,0(x1) + 80002884: 00808093 addi x1,x1,8 + +0000000080002888 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + pack x3, x10, x14 # perform operation + 80002888: 08e541b3 pack x3,x10,x14 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 8000288c: 000bb203 ld x4,0(x23) + 80002890: 00320c63 beq x4,x3,800028a8 + 80002894: 4ed042ef jal x5,80007580 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 8001179b .word 0x8001179b + 800028a4: 00000000 .word 0x00000000 + 800028a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x8000000000000001 + 800028ac: 0000bc03 ld x24,0(x1) + 800028b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x7ffffffffffffffe + 800028b4: 0000b483 ld x9,0(x1) + 800028b8: 00808093 addi x1,x1,8 + +00000000800028bc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + pack x11, x24, x9 # perform operation + 800028bc: 089c45b3 pack x11,x24,x9 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028c0: 000bb203 ld x4,0(x23) + 800028c4: 00b20c63 beq x4,x11,800028dc + 800028c8: 4b9042ef jal x5,80007580 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 8001180a .word 0x8001180a + 800028d8: 00000000 .word 0x00000000 + 800028dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x8000000000000001 + 800028e0: 0000bf03 ld x30,0(x1) + 800028e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 800028e8: 0000bf83 ld x31,0(x1) + 800028ec: 00808093 addi x1,x1,8 + +00000000800028f0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + pack x9, x30, x31 # perform operation + 800028f0: 09ff44b3 pack x9,x30,x31 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 800028f4: 000bb203 ld x4,0(x23) + 800028f8: 00920c63 beq x4,x9,80002910 + 800028fc: 485042ef jal x5,80007580 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 80011879 .word 0x80011879 + 8000290c: 00000000 .word 0x00000000 + 80002910: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8000000000000001 + 80002914: 0000bd83 ld x27,0(x1) + 80002918: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xfffffffffffffffe + 8000291c: 0000b403 ld x8,0(x1) + 80002920: 00808093 addi x1,x1,8 + +0000000080002924 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + pack x11, x27, x8 # perform operation + 80002924: 088dc5b3 pack x11,x27,x8 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002928: 000bb203 ld x4,0(x23) + 8000292c: 00b20c63 beq x4,x11,80002944 + 80002930: 451042ef jal x5,80007580 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 800118e8 .word 0x800118e8 + 80002940: 00000000 .word 0x00000000 + 80002944: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x8000000000000001 + 80002948: 0000b783 ld x15,0(x1) + 8000294c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80002950: 0000b583 ld x11,0(x1) + 80002954: 00808093 addi x1,x1,8 + +0000000080002958 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + pack x28, x15, x11 # perform operation + 80002958: 08b7ce33 pack x28,x15,x11 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 8000295c: 000bb203 ld x4,0(x23) + 80002960: 01c20c63 beq x4,x28,80002978 + 80002964: 41d042ef jal x5,80007580 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80011957 .word 0x80011957 + 80002974: 00000000 .word 0x00000000 + 80002978: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x8000000000000001 + 8000297c: 0000be03 ld x28,0(x1) + 80002980: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80002984: 0000bf83 ld x31,0(x1) + 80002988: 00808093 addi x1,x1,8 + +000000008000298c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + pack x9, x28, x31 # perform operation + 8000298c: 09fe44b3 pack x9,x28,x31 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002990: 000bb203 ld x4,0(x23) + 80002994: 00920c63 beq x4,x9,800029ac + 80002998: 3e9042ef jal x5,80007580 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 800119c6 .word 0x800119c6 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8000000000000001 + 800029b0: 0000bd83 ld x27,0(x1) + 800029b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x5555555555555555 + 800029b8: 0000bf83 ld x31,0(x1) + 800029bc: 00808093 addi x1,x1,8 + +00000000800029c0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + pack x29, x27, x31 # perform operation + 800029c0: 09fdceb3 pack x29,x27,x31 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029c4: 000bb203 ld x4,0(x23) + 800029c8: 01d20c63 beq x4,x29,800029e0 + 800029cc: 3b5042ef jal x5,80007580 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80011a35 .word 0x80011a35 + 800029dc: 00000000 .word 0x00000000 + 800029e0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x8000000000000001 + 800029e4: 0000bb03 ld x22,0(x1) + 800029e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x00000000ffffffff + 800029ec: 0000b403 ld x8,0(x1) + 800029f0: 00808093 addi x1,x1,8 + +00000000800029f4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + pack x12, x22, x8 # perform operation + 800029f4: 088b4633 pack x12,x22,x8 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 800029f8: 000bb203 ld x4,0(x23) + 800029fc: 00c20c63 beq x4,x12,80002a14 + 80002a00: 381042ef jal x5,80007580 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80011aa4 .word 0x80011aa4 + 80002a10: 00000000 .word 0x00000000 + 80002a14: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x8000000000000001 + 80002a18: 0000b883 ld x17,0(x1) + 80002a1c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x00000000fffffffe + 80002a20: 0000bb03 ld x22,0(x1) + 80002a24: 00808093 addi x1,x1,8 + +0000000080002a28 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + pack x29, x17, x22 # perform operation + 80002a28: 0968ceb3 pack x29,x17,x22 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a2c: 000bb203 ld x4,0(x23) + 80002a30: 01d20c63 beq x4,x29,80002a48 + 80002a34: 34d042ef jal x5,80007580 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80011b0b .word 0x80011b0b + 80002a44: 00000000 .word 0x00000000 + 80002a48: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x8000000000000001 + 80002a4c: 0000bc83 ld x25,0(x1) + 80002a50: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000100000000 + 80002a54: 0000bd83 ld x27,0(x1) + 80002a58: 00808093 addi x1,x1,8 + +0000000080002a5c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + pack x26, x25, x27 # perform operation + 80002a5c: 09bccd33 pack x26,x25,x27 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a60: 000bb203 ld x4,0(x23) + 80002a64: 01a20c63 beq x4,x26,80002a7c + 80002a68: 319042ef jal x5,80007580 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80011b72 .word 0x80011b72 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x8000000000000001 + 80002a80: 0000bd83 ld x27,0(x1) + 80002a84: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000100000001 + 80002a88: 0000b303 ld x6,0(x1) + 80002a8c: 00808093 addi x1,x1,8 + +0000000080002a90 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + pack x19, x27, x6 # perform operation + 80002a90: 086dc9b3 pack x19,x27,x6 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002a94: 000bb203 ld x4,0(x23) + 80002a98: 01320c63 beq x4,x19,80002ab0 + 80002a9c: 2e5042ef jal x5,80007580 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 80011bda .word 0x80011bda + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002ab4: 0000b103 ld x2,0(x1) + 80002ab8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x0000000000000000 + 80002abc: 0000b683 ld x13,0(x1) + 80002ac0: 00808093 addi x1,x1,8 + +0000000080002ac4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + pack x29, x2, x13 # perform operation + 80002ac4: 08d14eb3 pack x29,x2,x13 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002ac8: 000bb203 ld x4,0(x23) + 80002acc: 01d20c63 beq x4,x29,80002ae4 + 80002ad0: 2b1042ef jal x5,80007580 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 80011c42 .word 0x80011c42 + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002ae8: 0000be83 ld x29,0(x1) + 80002aec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x0000000000000001 + 80002af0: 0000b683 ld x13,0(x1) + 80002af4: 00808093 addi x1,x1,8 + +0000000080002af8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + pack x17, x29, x13 # perform operation + 80002af8: 08dec8b3 pack x17,x29,x13 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002afc: 000bb203 ld x4,0(x23) + 80002b00: 01120c63 beq x4,x17,80002b18 + 80002b04: 27d042ef jal x5,80007580 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 80011ca2 .word 0x80011ca2 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002b1c: 0000b583 ld x11,0(x1) + 80002b20: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000000000002 + 80002b24: 0000b803 ld x16,0(x1) + 80002b28: 00808093 addi x1,x1,8 + +0000000080002b2c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + pack x25, x11, x16 # perform operation + 80002b2c: 0905ccb3 pack x25,x11,x16 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b30: 000bb203 ld x4,0(x23) + 80002b34: 01920c63 beq x4,x25,80002b4c + 80002b38: 249042ef jal x5,80007580 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 80011d02 .word 0x80011d02 + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7fffffffffffffff + 80002b50: 0000b403 ld x8,0(x1) + 80002b54: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x8000000000000000 + 80002b58: 0000bf83 ld x31,0(x1) + 80002b5c: 00808093 addi x1,x1,8 + +0000000080002b60 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + pack x17, x8, x31 # perform operation + 80002b60: 09f448b3 pack x17,x8,x31 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b64: 000bb203 ld x4,0(x23) + 80002b68: 01120c63 beq x4,x17,80002b80 + 80002b6c: 215042ef jal x5,80007580 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 80011d62 .word 0x80011d62 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002b84: 0000be03 ld x28,0(x1) + 80002b88: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8000000000000001 + 80002b8c: 0000bc83 ld x25,0(x1) + 80002b90: 00808093 addi x1,x1,8 + +0000000080002b94 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + pack x17, x28, x25 # perform operation + 80002b94: 099e48b3 pack x17,x28,x25 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002b98: 000bb203 ld x4,0(x23) + 80002b9c: 01120c63 beq x4,x17,80002bb4 + 80002ba0: 1e1042ef jal x5,80007580 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 80011dd1 .word 0x80011dd1 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002bb8: 0000b183 ld x3,0(x1) + 80002bbc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7fffffffffffffff + 80002bc0: 0000ba03 ld x20,0(x1) + 80002bc4: 00808093 addi x1,x1,8 + +0000000080002bc8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + pack x26, x3, x20 # perform operation + 80002bc8: 0941cd33 pack x26,x3,x20 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bcc: 000bb203 ld x4,0(x23) + 80002bd0: 01a20c63 beq x4,x26,80002be8 + 80002bd4: 1ad042ef jal x5,80007580 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80011e40 .word 0x80011e40 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002bec: 0000bd83 ld x27,0(x1) + 80002bf0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x7ffffffffffffffe + 80002bf4: 0000bf83 ld x31,0(x1) + 80002bf8: 00808093 addi x1,x1,8 + +0000000080002bfc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + pack x19, x27, x31 # perform operation + 80002bfc: 09fdc9b3 pack x19,x27,x31 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c00: 000bb203 ld x4,0(x23) + 80002c04: 01320c63 beq x4,x19,80002c1c + 80002c08: 179042ef jal x5,80007580 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 80011eaf .word 0x80011eaf + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002c20: 0000b583 ld x11,0(x1) + 80002c24: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0xffffffffffffffff + 80002c28: 0000b603 ld x12,0(x1) + 80002c2c: 00808093 addi x1,x1,8 + +0000000080002c30 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + pack x10, x11, x12 # perform operation + 80002c30: 08c5c533 pack x10,x11,x12 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c34: 000bb203 ld x4,0(x23) + 80002c38: 00a20c63 beq x4,x10,80002c50 + 80002c3c: 145042ef jal x5,80007580 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 80011f1e .word 0x80011f1e + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002c54: 0000b103 ld x2,0(x1) + 80002c58: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xfffffffffffffffe + 80002c5c: 0000bd03 ld x26,0(x1) + 80002c60: 00808093 addi x1,x1,8 + +0000000080002c64 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + pack x6, x2, x26 # perform operation + 80002c64: 09a14333 pack x6,x2,x26 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c68: 000bb203 ld x4,0(x23) + 80002c6c: 00620c63 beq x4,x6,80002c84 + 80002c70: 111042ef jal x5,80007580 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 80011f8d .word 0x80011f8d + 80002c80: 00000000 .word 0x00000000 + 80002c84: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002c88: 0000bd03 ld x26,0(x1) + 80002c8c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80002c90: 0000ba83 ld x21,0(x1) + 80002c94: 00808093 addi x1,x1,8 + +0000000080002c98 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + pack x19, x26, x21 # perform operation + 80002c98: 095d49b3 pack x19,x26,x21 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002c9c: 000bb203 ld x4,0(x23) + 80002ca0: 01320c63 beq x4,x19,80002cb8 + 80002ca4: 0dd042ef jal x5,80007580 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 80011ffc .word 0x80011ffc + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002cbc: 0000bc03 ld x24,0(x1) + 80002cc0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 80002cc4: 0000b183 ld x3,0(x1) + 80002cc8: 00808093 addi x1,x1,8 + +0000000080002ccc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + pack x13, x24, x3 # perform operation + 80002ccc: 083c46b3 pack x13,x24,x3 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cd0: 000bb203 ld x4,0(x23) + 80002cd4: 00d20c63 beq x4,x13,80002cec + 80002cd8: 0a9042ef jal x5,80007580 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 8001206b .word 0x8001206b + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002cf0: 0000ba83 ld x21,0(x1) + 80002cf4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x5555555555555555 + 80002cf8: 0000be03 ld x28,0(x1) + 80002cfc: 00808093 addi x1,x1,8 + +0000000080002d00 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + pack x13, x21, x28 # perform operation + 80002d00: 09cac6b3 pack x13,x21,x28 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d04: 000bb203 ld x4,0(x23) + 80002d08: 00d20c63 beq x4,x13,80002d20 + 80002d0c: 075042ef jal x5,80007580 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 800120da .word 0x800120da + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002d24: 0000b183 ld x3,0(x1) + 80002d28: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000ffffffff + 80002d2c: 0000b503 ld x10,0(x1) + 80002d30: 00808093 addi x1,x1,8 + +0000000080002d34 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + pack x25, x3, x10 # perform operation + 80002d34: 08a1ccb3 pack x25,x3,x10 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d38: 000bb203 ld x4,0(x23) + 80002d3c: 01920c63 beq x4,x25,80002d54 + 80002d40: 041042ef jal x5,80007580 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 80012149 .word 0x80012149 + 80002d50: 00000000 .word 0x00000000 + 80002d54: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002d58: 0000ba03 ld x20,0(x1) + 80002d5c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000000fffffffe + 80002d60: 0000b803 ld x16,0(x1) + 80002d64: 00808093 addi x1,x1,8 + +0000000080002d68 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + pack x6, x20, x16 # perform operation + 80002d68: 090a4333 pack x6,x20,x16 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d6c: 000bb203 ld x4,0(x23) + 80002d70: 00620c63 beq x4,x6,80002d88 + 80002d74: 00d042ef jal x5,80007580 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 800121b0 .word 0x800121b0 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002d8c: 0000b703 ld x14,0(x1) + 80002d90: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000100000000 + 80002d94: 0000b103 ld x2,0(x1) + 80002d98: 00808093 addi x1,x1,8 + +0000000080002d9c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + pack x17, x14, x2 # perform operation + 80002d9c: 082748b3 pack x17,x14,x2 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002da0: 000bb203 ld x4,0(x23) + 80002da4: 01120c63 beq x4,x17,80002dbc + 80002da8: 7d8042ef jal x5,80007580 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 80012217 .word 0x80012217 + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7fffffffffffffff + 80002dc0: 0000b403 ld x8,0(x1) + 80002dc4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000100000001 + 80002dc8: 0000b883 ld x17,0(x1) + 80002dcc: 00808093 addi x1,x1,8 + +0000000080002dd0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + pack x7, x8, x17 # perform operation + 80002dd0: 091443b3 pack x7,x8,x17 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002dd4: 000bb203 ld x4,0(x23) + 80002dd8: 00720c63 beq x4,x7,80002df0 + 80002ddc: 7a4042ef jal x5,80007580 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 8001227f .word 0x8001227f + 80002dec: 00000000 .word 0x00000000 + 80002df0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002df4: 0000bd83 ld x27,0(x1) + 80002df8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0000000000000000 + 80002dfc: 0000b503 ld x10,0(x1) + 80002e00: 00808093 addi x1,x1,8 + +0000000080002e04 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + pack x11, x27, x10 # perform operation + 80002e04: 08adc5b3 pack x11,x27,x10 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e08: 000bb203 ld x4,0(x23) + 80002e0c: 00b20c63 beq x4,x11,80002e24 + 80002e10: 770042ef jal x5,80007580 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 800122e7 .word 0x800122e7 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002e28: 0000be03 ld x28,0(x1) + 80002e2c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x0000000000000001 + 80002e30: 0000bf03 ld x30,0(x1) + 80002e34: 00808093 addi x1,x1,8 + +0000000080002e38 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + pack x27, x28, x30 # perform operation + 80002e38: 09ee4db3 pack x27,x28,x30 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e3c: 000bb203 ld x4,0(x23) + 80002e40: 01b20c63 beq x4,x27,80002e58 + 80002e44: 73c042ef jal x5,80007580 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 80012347 .word 0x80012347 + 80002e54: 00000000 .word 0x00000000 + 80002e58: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002e5c: 0000b303 ld x6,0(x1) + 80002e60: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000002 + 80002e64: 0000be83 ld x29,0(x1) + 80002e68: 00808093 addi x1,x1,8 + +0000000080002e6c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + pack x12, x6, x29 # perform operation + 80002e6c: 09d34633 pack x12,x6,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e70: 000bb203 ld x4,0(x23) + 80002e74: 00c20c63 beq x4,x12,80002e8c + 80002e78: 708042ef jal x5,80007580 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 800123a7 .word 0x800123a7 + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002e90: 0000b903 ld x18,0(x1) + 80002e94: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x8000000000000000 + 80002e98: 0000bd03 ld x26,0(x1) + 80002e9c: 00808093 addi x1,x1,8 + +0000000080002ea0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + pack x3, x18, x26 # perform operation + 80002ea0: 09a941b3 pack x3,x18,x26 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ea4: 000bb203 ld x4,0(x23) + 80002ea8: 00320c63 beq x4,x3,80002ec0 + 80002eac: 6d4042ef jal x5,80007580 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 80012407 .word 0x80012407 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80002ec4: 0000b403 ld x8,0(x1) + 80002ec8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x8000000000000001 + 80002ecc: 0000bd03 ld x26,0(x1) + 80002ed0: 00808093 addi x1,x1,8 + +0000000080002ed4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + pack x28, x8, x26 # perform operation + 80002ed4: 09a44e33 pack x28,x8,x26 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002ed8: 000bb203 ld x4,0(x23) + 80002edc: 01c20c63 beq x4,x28,80002ef4 + 80002ee0: 6a0042ef jal x5,80007580 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 80012476 .word 0x80012476 + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002ef8: 0000b983 ld x19,0(x1) + 80002efc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7fffffffffffffff + 80002f00: 0000bc03 ld x24,0(x1) + 80002f04: 00808093 addi x1,x1,8 + +0000000080002f08 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + pack x12, x19, x24 # perform operation + 80002f08: 0989c633 pack x12,x19,x24 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f0c: 000bb203 ld x4,0(x23) + 80002f10: 00c20c63 beq x4,x12,80002f28 + 80002f14: 66c042ef jal x5,80007580 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 800124e5 .word 0x800124e5 + 80002f24: 00000000 .word 0x00000000 + 80002f28: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002f2c: 0000bd03 ld x26,0(x1) + 80002f30: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80002f34: 0000b183 ld x3,0(x1) + 80002f38: 00808093 addi x1,x1,8 + +0000000080002f3c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + pack x17, x26, x3 # perform operation + 80002f3c: 083d48b3 pack x17,x26,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f40: 000bb203 ld x4,0(x23) + 80002f44: 01120c63 beq x4,x17,80002f5c + 80002f48: 638042ef jal x5,80007580 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 80012554 .word 0x80012554 + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002f60: 0000bb03 ld x22,0(x1) + 80002f64: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xffffffffffffffff + 80002f68: 0000b903 ld x18,0(x1) + 80002f6c: 00808093 addi x1,x1,8 + +0000000080002f70 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + pack x11, x22, x18 # perform operation + 80002f70: 092b45b3 pack x11,x22,x18 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f74: 000bb203 ld x4,0(x23) + 80002f78: 00b20c63 beq x4,x11,80002f90 + 80002f7c: 604042ef jal x5,80007580 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 800125c3 .word 0x800125c3 + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x7ffffffffffffffe + 80002f94: 0000b483 ld x9,0(x1) + 80002f98: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002f9c: 0000bf83 ld x31,0(x1) + 80002fa0: 00808093 addi x1,x1,8 + +0000000080002fa4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + pack x18, x9, x31 # perform operation + 80002fa4: 09f4c933 pack x18,x9,x31 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fa8: 000bb203 ld x4,0(x23) + 80002fac: 01220c63 beq x4,x18,80002fc4 + 80002fb0: 5d0042ef jal x5,80007580 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 80012632 .word 0x80012632 + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002fc8: 0000bd03 ld x26,0(x1) + 80002fcc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80002fd0: 0000b303 ld x6,0(x1) + 80002fd4: 00808093 addi x1,x1,8 + +0000000080002fd8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + pack x18, x26, x6 # perform operation + 80002fd8: 086d4933 pack x18,x26,x6 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80002fdc: 000bb203 ld x4,0(x23) + 80002fe0: 01220c63 beq x4,x18,80002ff8 + 80002fe4: 59c042ef jal x5,80007580 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 800126a1 .word 0x800126a1 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002ffc: 0000bc03 ld x24,0(x1) + 80003000: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 80003004: 0000bd83 ld x27,0(x1) + 80003008: 00808093 addi x1,x1,8 + +000000008000300c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + pack x20, x24, x27 # perform operation + 8000300c: 09bc4a33 pack x20,x24,x27 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003010: 000bb203 ld x4,0(x23) + 80003014: 01420c63 beq x4,x20,8000302c + 80003018: 568042ef jal x5,80007580 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 80012710 .word 0x80012710 + 80003028: 00000000 .word 0x00000000 + 8000302c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003030: 0000ba03 ld x20,0(x1) + 80003034: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x5555555555555555 + 80003038: 0000b803 ld x16,0(x1) + 8000303c: 00808093 addi x1,x1,8 + +0000000080003040 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + pack x19, x20, x16 # perform operation + 80003040: 090a49b3 pack x19,x20,x16 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003044: 000bb203 ld x4,0(x23) + 80003048: 01320c63 beq x4,x19,80003060 + 8000304c: 534042ef jal x5,80007580 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 8001277f .word 0x8001277f + 8000305c: 00000000 .word 0x00000000 + 80003060: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80003064: 0000b683 ld x13,0(x1) + 80003068: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x00000000ffffffff + 8000306c: 0000b103 ld x2,0(x1) + 80003070: 00808093 addi x1,x1,8 + +0000000080003074 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + pack x6, x13, x2 # perform operation + 80003074: 0826c333 pack x6,x13,x2 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 80003078: 000bb203 ld x4,0(x23) + 8000307c: 00620c63 beq x4,x6,80003094 + 80003080: 500042ef jal x5,80007580 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 800127ee .word 0x800127ee + 80003090: 00000000 .word 0x00000000 + 80003094: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003098: 0000b703 ld x14,0(x1) + 8000309c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x00000000fffffffe + 800030a0: 0000b983 ld x19,0(x1) + 800030a4: 00808093 addi x1,x1,8 + +00000000800030a8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + pack x10, x14, x19 # perform operation + 800030a8: 09374533 pack x10,x14,x19 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030ac: 000bb203 ld x4,0(x23) + 800030b0: 00a20c63 beq x4,x10,800030c8 + 800030b4: 4cc042ef jal x5,80007580 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 80012855 .word 0x80012855 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x7ffffffffffffffe + 800030cc: 0000b303 ld x6,0(x1) + 800030d0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000100000000 + 800030d4: 0000b803 ld x16,0(x1) + 800030d8: 00808093 addi x1,x1,8 + +00000000800030dc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + pack x29, x6, x16 # perform operation + 800030dc: 09034eb3 pack x29,x6,x16 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 800030e0: 000bb203 ld x4,0(x23) + 800030e4: 01d20c63 beq x4,x29,800030fc + 800030e8: 498042ef jal x5,80007580 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 800128bc .word 0x800128bc + 800030f8: 00000000 .word 0x00000000 + 800030fc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80003100: 0000b403 ld x8,0(x1) + 80003104: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000100000001 + 80003108: 0000be03 ld x28,0(x1) + 8000310c: 00808093 addi x1,x1,8 + +0000000080003110 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + pack x29, x8, x28 # perform operation + 80003110: 09c44eb3 pack x29,x8,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003114: 000bb203 ld x4,0(x23) + 80003118: 01d20c63 beq x4,x29,80003130 + 8000311c: 464042ef jal x5,80007580 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 80012924 .word 0x80012924 + 8000312c: 00000000 .word 0x00000000 + 80003130: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xffffffffffffffff + 80003134: 0000b983 ld x19,0(x1) + 80003138: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000000 + 8000313c: 0000be83 ld x29,0(x1) + 80003140: 00808093 addi x1,x1,8 + +0000000080003144 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + pack x12, x19, x29 # perform operation + 80003144: 09d9c633 pack x12,x19,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003148: 000bb203 ld x4,0(x23) + 8000314c: 00c20c63 beq x4,x12,80003164 + 80003150: 430042ef jal x5,80007580 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 8001298c .word 0x8001298c + 80003160: 00000000 .word 0x00000000 + 80003164: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xffffffffffffffff + 80003168: 0000b883 ld x17,0(x1) + 8000316c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000000000001 + 80003170: 0000bf83 ld x31,0(x1) + 80003174: 00808093 addi x1,x1,8 + +0000000080003178 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + pack x10, x17, x31 # perform operation + 80003178: 09f8c533 pack x10,x17,x31 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 8000317c: 000bb203 ld x4,0(x23) + 80003180: 00a20c63 beq x4,x10,80003198 + 80003184: 3fc042ef jal x5,80007580 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 800129ec .word 0x800129ec + 80003194: 00000000 .word 0x00000000 + 80003198: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0xffffffffffffffff + 8000319c: 0000bf03 ld x30,0(x1) + 800031a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x0000000000000002 + 800031a4: 0000b783 ld x15,0(x1) + 800031a8: 00808093 addi x1,x1,8 + +00000000800031ac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + pack x21, x30, x15 # perform operation + 800031ac: 08ff4ab3 pack x21,x30,x15 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031b0: 000bb203 ld x4,0(x23) + 800031b4: 01520c63 beq x4,x21,800031cc + 800031b8: 3c8042ef jal x5,80007580 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80012a4c .word 0x80012a4c + 800031c8: 00000000 .word 0x00000000 + 800031cc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xffffffffffffffff + 800031d0: 0000b403 ld x8,0(x1) + 800031d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x8000000000000000 + 800031d8: 0000b883 ld x17,0(x1) + 800031dc: 00808093 addi x1,x1,8 + +00000000800031e0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + pack x6, x8, x17 # perform operation + 800031e0: 09144333 pack x6,x8,x17 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 800031e4: 000bb203 ld x4,0(x23) + 800031e8: 00620c63 beq x4,x6,80003200 + 800031ec: 394042ef jal x5,80007580 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 80012aac .word 0x80012aac + 800031fc: 00000000 .word 0x00000000 + 80003200: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xffffffffffffffff + 80003204: 0000b683 ld x13,0(x1) + 80003208: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x8000000000000001 + 8000320c: 0000b403 ld x8,0(x1) + 80003210: 00808093 addi x1,x1,8 + +0000000080003214 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + pack x26, x13, x8 # perform operation + 80003214: 0886cd33 pack x26,x13,x8 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003218: 000bb203 ld x4,0(x23) + 8000321c: 01a20c63 beq x4,x26,80003234 + 80003220: 360042ef jal x5,80007580 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 80012b1b .word 0x80012b1b + 80003230: 00000000 .word 0x00000000 + 80003234: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xffffffffffffffff + 80003238: 0000ba03 ld x20,0(x1) + 8000323c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x7fffffffffffffff + 80003240: 0000be03 ld x28,0(x1) + 80003244: 00808093 addi x1,x1,8 + +0000000080003248 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + pack x29, x20, x28 # perform operation + 80003248: 09ca4eb3 pack x29,x20,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 8000324c: 000bb203 ld x4,0(x23) + 80003250: 01d20c63 beq x4,x29,80003268 + 80003254: 32c042ef jal x5,80007580 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 80012b8a .word 0x80012b8a + 80003264: 00000000 .word 0x00000000 + 80003268: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xffffffffffffffff + 8000326c: 0000bc03 ld x24,0(x1) + 80003270: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80003274: 0000ba03 ld x20,0(x1) + 80003278: 00808093 addi x1,x1,8 + +000000008000327c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + pack x17, x24, x20 # perform operation + 8000327c: 094c48b3 pack x17,x24,x20 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80003280: 000bb203 ld x4,0(x23) + 80003284: 01120c63 beq x4,x17,8000329c + 80003288: 2f8042ef jal x5,80007580 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80012bf9 .word 0x80012bf9 + 80003298: 00000000 .word 0x00000000 + 8000329c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xffffffffffffffff + 800032a0: 0000b903 ld x18,0(x1) + 800032a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xffffffffffffffff + 800032a8: 0000b683 ld x13,0(x1) + 800032ac: 00808093 addi x1,x1,8 + +00000000800032b0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + pack x25, x18, x13 # perform operation + 800032b0: 08d94cb3 pack x25,x18,x13 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032b4: 000bb203 ld x4,0(x23) + 800032b8: 01920c63 beq x4,x25,800032d0 + 800032bc: 2c4042ef jal x5,80007580 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 80012c68 .word 0x80012c68 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xffffffffffffffff + 800032d4: 0000b483 ld x9,0(x1) + 800032d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xfffffffffffffffe + 800032dc: 0000b903 ld x18,0(x1) + 800032e0: 00808093 addi x1,x1,8 + +00000000800032e4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + pack x15, x9, x18 # perform operation + 800032e4: 0924c7b3 pack x15,x9,x18 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 800032e8: 000bb203 ld x4,0(x23) + 800032ec: 00f20c63 beq x4,x15,80003304 + 800032f0: 290042ef jal x5,80007580 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 80012cd7 .word 0x80012cd7 + 80003300: 00000000 .word 0x00000000 + 80003304: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xffffffffffffffff + 80003308: 0000bb03 ld x22,0(x1) + 8000330c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80003310: 0000b603 ld x12,0(x1) + 80003314: 00808093 addi x1,x1,8 + +0000000080003318 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + pack x11, x22, x12 # perform operation + 80003318: 08cb45b3 pack x11,x22,x12 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000331c: 000bb203 ld x4,0(x23) + 80003320: 00b20c63 beq x4,x11,80003338 + 80003324: 25c042ef jal x5,80007580 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 80012d46 .word 0x80012d46 + 80003334: 00000000 .word 0x00000000 + 80003338: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xffffffffffffffff + 8000333c: 0000b983 ld x19,0(x1) + 80003340: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80003344: 0000b303 ld x6,0(x1) + 80003348: 00808093 addi x1,x1,8 + +000000008000334c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + pack x8, x19, x6 # perform operation + 8000334c: 0869c433 pack x8,x19,x6 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003350: 000bb203 ld x4,0(x23) + 80003354: 00820c63 beq x4,x8,8000336c + 80003358: 228042ef jal x5,80007580 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80012db5 .word 0x80012db5 + 80003368: 00000000 .word 0x00000000 + 8000336c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xffffffffffffffff + 80003370: 0000b683 ld x13,0(x1) + 80003374: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x5555555555555555 + 80003378: 0000bd83 ld x27,0(x1) + 8000337c: 00808093 addi x1,x1,8 + +0000000080003380 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + pack x10, x13, x27 # perform operation + 80003380: 09b6c533 pack x10,x13,x27 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 80003384: 000bb203 ld x4,0(x23) + 80003388: 00a20c63 beq x4,x10,800033a0 + 8000338c: 1f4042ef jal x5,80007580 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 80012e24 .word 0x80012e24 + 8000339c: 00000000 .word 0x00000000 + 800033a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xffffffffffffffff + 800033a4: 0000b503 ld x10,0(x1) + 800033a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x00000000ffffffff + 800033ac: 0000bd83 ld x27,0(x1) + 800033b0: 00808093 addi x1,x1,8 + +00000000800033b4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + pack x12, x10, x27 # perform operation + 800033b4: 09b54633 pack x12,x10,x27 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033b8: 000bb203 ld x4,0(x23) + 800033bc: 00c20c63 beq x4,x12,800033d4 + 800033c0: 1c0042ef jal x5,80007580 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 80012e93 .word 0x80012e93 + 800033d0: 00000000 .word 0x00000000 + 800033d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xffffffffffffffff + 800033d8: 0000bd03 ld x26,0(x1) + 800033dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x00000000fffffffe + 800033e0: 0000bf03 ld x30,0(x1) + 800033e4: 00808093 addi x1,x1,8 + +00000000800033e8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + pack x9, x26, x30 # perform operation + 800033e8: 09ed44b3 pack x9,x26,x30 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 800033ec: 000bb203 ld x4,0(x23) + 800033f0: 00920c63 beq x4,x9,80003408 + 800033f4: 18c042ef jal x5,80007580 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 80012efa .word 0x80012efa + 80003404: 00000000 .word 0x00000000 + 80003408: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xffffffffffffffff + 8000340c: 0000bc03 ld x24,0(x1) + 80003410: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000100000000 + 80003414: 0000b303 ld x6,0(x1) + 80003418: 00808093 addi x1,x1,8 + +000000008000341c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + pack x30, x24, x6 # perform operation + 8000341c: 086c4f33 pack x30,x24,x6 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003420: 000bb203 ld x4,0(x23) + 80003424: 01e20c63 beq x4,x30,8000343c + 80003428: 158042ef jal x5,80007580 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 80012f61 .word 0x80012f61 + 80003438: 00000000 .word 0x00000000 + 8000343c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xffffffffffffffff + 80003440: 0000b903 ld x18,0(x1) + 80003444: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000100000001 + 80003448: 0000ba83 ld x21,0(x1) + 8000344c: 00808093 addi x1,x1,8 + +0000000080003450 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + pack x27, x18, x21 # perform operation + 80003450: 09594db3 pack x27,x18,x21 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003454: 000bb203 ld x4,0(x23) + 80003458: 01b20c63 beq x4,x27,80003470 + 8000345c: 124042ef jal x5,80007580 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 80012fc9 .word 0x80012fc9 + 8000346c: 00000000 .word 0x00000000 + 80003470: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xfffffffffffffffe + 80003474: 0000b303 ld x6,0(x1) + 80003478: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000000000000 + 8000347c: 0000b883 ld x17,0(x1) + 80003480: 00808093 addi x1,x1,8 + +0000000080003484 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + pack x11, x6, x17 # perform operation + 80003484: 091345b3 pack x11,x6,x17 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 80003488: 000bb203 ld x4,0(x23) + 8000348c: 00b20c63 beq x4,x11,800034a4 + 80003490: 0f0042ef jal x5,80007580 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 80013031 .word 0x80013031 + 800034a0: 00000000 .word 0x00000000 + 800034a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xfffffffffffffffe + 800034a8: 0000bf83 ld x31,0(x1) + 800034ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000000000001 + 800034b0: 0000b583 ld x11,0(x1) + 800034b4: 00808093 addi x1,x1,8 + +00000000800034b8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + pack x25, x31, x11 # perform operation + 800034b8: 08bfccb3 pack x25,x31,x11 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034bc: 000bb203 ld x4,0(x23) + 800034c0: 01920c63 beq x4,x25,800034d8 + 800034c4: 0bc042ef jal x5,80007580 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80013091 .word 0x80013091 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xfffffffffffffffe + 800034dc: 0000bc83 ld x25,0(x1) + 800034e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x0000000000000002 + 800034e4: 0000b383 ld x7,0(x1) + 800034e8: 00808093 addi x1,x1,8 + +00000000800034ec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + pack x3, x25, x7 # perform operation + 800034ec: 087cc1b3 pack x3,x25,x7 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 800034f0: 000bb203 ld x4,0(x23) + 800034f4: 00320c63 beq x4,x3,8000350c + 800034f8: 088042ef jal x5,80007580 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 800130f1 .word 0x800130f1 + 80003508: 00000000 .word 0x00000000 + 8000350c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfffffffffffffffe + 80003510: 0000be03 ld x28,0(x1) + 80003514: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x8000000000000000 + 80003518: 0000bf03 ld x30,0(x1) + 8000351c: 00808093 addi x1,x1,8 + +0000000080003520 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + pack x9, x28, x30 # perform operation + 80003520: 09ee44b3 pack x9,x28,x30 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003524: 000bb203 ld x4,0(x23) + 80003528: 00920c63 beq x4,x9,80003540 + 8000352c: 054042ef jal x5,80007580 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 80013151 .word 0x80013151 + 8000353c: 00000000 .word 0x00000000 + 80003540: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xfffffffffffffffe + 80003544: 0000b103 ld x2,0(x1) + 80003548: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x8000000000000001 + 8000354c: 0000b683 ld x13,0(x1) + 80003550: 00808093 addi x1,x1,8 + +0000000080003554 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + pack x28, x2, x13 # perform operation + 80003554: 08d14e33 pack x28,x2,x13 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003558: 000bb203 ld x4,0(x23) + 8000355c: 01c20c63 beq x4,x28,80003574 + 80003560: 020042ef jal x5,80007580 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 800131c0 .word 0x800131c0 + 80003570: 00000000 .word 0x00000000 + 80003574: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003578: 0000bd03 ld x26,0(x1) + 8000357c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x7fffffffffffffff + 80003580: 0000b683 ld x13,0(x1) + 80003584: 00808093 addi x1,x1,8 + +0000000080003588 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + pack x6, x26, x13 # perform operation + 80003588: 08dd4333 pack x6,x26,x13 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 8000358c: 000bb203 ld x4,0(x23) + 80003590: 00620c63 beq x4,x6,800035a8 + 80003594: 7ed032ef jal x5,80007580 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 8001322f .word 0x8001322f + 800035a4: 00000000 .word 0x00000000 + 800035a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xfffffffffffffffe + 800035ac: 0000ba03 ld x20,0(x1) + 800035b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x7ffffffffffffffe + 800035b4: 0000bc03 ld x24,0(x1) + 800035b8: 00808093 addi x1,x1,8 + +00000000800035bc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + pack x21, x20, x24 # perform operation + 800035bc: 098a4ab3 pack x21,x20,x24 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035c0: 000bb203 ld x4,0(x23) + 800035c4: 01520c63 beq x4,x21,800035dc + 800035c8: 7b9032ef jal x5,80007580 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 8001329e .word 0x8001329e + 800035d8: 00000000 .word 0x00000000 + 800035dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xfffffffffffffffe + 800035e0: 0000ba03 ld x20,0(x1) + 800035e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0xffffffffffffffff + 800035e8: 0000b403 ld x8,0(x1) + 800035ec: 00808093 addi x1,x1,8 + +00000000800035f0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + pack x12, x20, x8 # perform operation + 800035f0: 088a4633 pack x12,x20,x8 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 800035f4: 000bb203 ld x4,0(x23) + 800035f8: 00c20c63 beq x4,x12,80003610 + 800035fc: 785032ef jal x5,80007580 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 8001330d .word 0x8001330d + 8000360c: 00000000 .word 0x00000000 + 80003610: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfffffffffffffffe + 80003614: 0000be03 ld x28,0(x1) + 80003618: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0xfffffffffffffffe + 8000361c: 0000bb03 ld x22,0(x1) + 80003620: 00808093 addi x1,x1,8 + +0000000080003624 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + pack x11, x28, x22 # perform operation + 80003624: 096e45b3 pack x11,x28,x22 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003628: 000bb203 ld x4,0(x23) + 8000362c: 00b20c63 beq x4,x11,80003644 + 80003630: 751032ef jal x5,80007580 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 8001337c .word 0x8001337c + 80003640: 00000000 .word 0x00000000 + 80003644: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xfffffffffffffffe + 80003648: 0000b903 ld x18,0(x1) + 8000364c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80003650: 0000be83 ld x29,0(x1) + 80003654: 00808093 addi x1,x1,8 + +0000000080003658 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + pack x24, x18, x29 # perform operation + 80003658: 09d94c33 pack x24,x18,x29 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000365c: 000bb203 ld x4,0(x23) + 80003660: 01820c63 beq x4,x24,80003678 + 80003664: 71d032ef jal x5,80007580 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 800133eb .word 0x800133eb + 80003674: 00000000 .word 0x00000000 + 80003678: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xfffffffffffffffe + 8000367c: 0000b783 ld x15,0(x1) + 80003680: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80003684: 0000b703 ld x14,0(x1) + 80003688: 00808093 addi x1,x1,8 + +000000008000368c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + pack x29, x15, x14 # perform operation + 8000368c: 08e7ceb3 pack x29,x15,x14 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003690: 000bb203 ld x4,0(x23) + 80003694: 01d20c63 beq x4,x29,800036ac + 80003698: 6e9032ef jal x5,80007580 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 8001345a .word 0x8001345a + 800036a8: 00000000 .word 0x00000000 + 800036ac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xfffffffffffffffe + 800036b0: 0000b903 ld x18,0(x1) + 800036b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x5555555555555555 + 800036b8: 0000b183 ld x3,0(x1) + 800036bc: 00808093 addi x1,x1,8 + +00000000800036c0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + pack x22, x18, x3 # perform operation + 800036c0: 08394b33 pack x22,x18,x3 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036c4: 000bb203 ld x4,0(x23) + 800036c8: 01620c63 beq x4,x22,800036e0 + 800036cc: 6b5032ef jal x5,80007580 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 800134c9 .word 0x800134c9 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xfffffffffffffffe + 800036e4: 0000b383 ld x7,0(x1) + 800036e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000000ffffffff + 800036ec: 0000b703 ld x14,0(x1) + 800036f0: 00808093 addi x1,x1,8 + +00000000800036f4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + pack x27, x7, x14 # perform operation + 800036f4: 08e3cdb3 pack x27,x7,x14 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 800036f8: 000bb203 ld x4,0(x23) + 800036fc: 01b20c63 beq x4,x27,80003714 + 80003700: 681032ef jal x5,80007580 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 80013538 .word 0x80013538 + 80003710: 00000000 .word 0x00000000 + 80003714: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xfffffffffffffffe + 80003718: 0000b403 ld x8,0(x1) + 8000371c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x00000000fffffffe + 80003720: 0000b383 ld x7,0(x1) + 80003724: 00808093 addi x1,x1,8 + +0000000080003728 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + pack x14, x8, x7 # perform operation + 80003728: 08744733 pack x14,x8,x7 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 8000372c: 000bb203 ld x4,0(x23) + 80003730: 00e20c63 beq x4,x14,80003748 + 80003734: 64d032ef jal x5,80007580 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 8001359f .word 0x8001359f + 80003744: 00000000 .word 0x00000000 + 80003748: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xfffffffffffffffe + 8000374c: 0000be03 ld x28,0(x1) + 80003750: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x0000000100000000 + 80003754: 0000b783 ld x15,0(x1) + 80003758: 00808093 addi x1,x1,8 + +000000008000375c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + pack x30, x28, x15 # perform operation + 8000375c: 08fe4f33 pack x30,x28,x15 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003760: 000bb203 ld x4,0(x23) + 80003764: 01e20c63 beq x4,x30,8000377c + 80003768: 619032ef jal x5,80007580 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80013606 .word 0x80013606 + 80003778: 00000000 .word 0x00000000 + 8000377c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xfffffffffffffffe + 80003780: 0000ba03 ld x20,0(x1) + 80003784: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x0000000100000001 + 80003788: 0000bf03 ld x30,0(x1) + 8000378c: 00808093 addi x1,x1,8 + +0000000080003790 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + pack x2, x20, x30 # perform operation + 80003790: 09ea4133 pack x2,x20,x30 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 80003794: 000bb203 ld x4,0(x23) + 80003798: 00220c63 beq x4,x2,800037b0 + 8000379c: 5e5032ef jal x5,80007580 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 8001366e .word 0x8001366e + 800037ac: 00000000 .word 0x00000000 + 800037b0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800037b4: 0000b683 ld x13,0(x1) + 800037b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x0000000000000000 + 800037bc: 0000b403 ld x8,0(x1) + 800037c0: 00808093 addi x1,x1,8 + +00000000800037c4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + pack x11, x13, x8 # perform operation + 800037c4: 0886c5b3 pack x11,x13,x8 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037c8: 000bb203 ld x4,0(x23) + 800037cc: 00b20c63 beq x4,x11,800037e4 + 800037d0: 5b1032ef jal x5,80007580 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 800136d6 .word 0x800136d6 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x5bbc887763ae86f2 + 800037e8: 0000b383 ld x7,0(x1) + 800037ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000000000001 + 800037f0: 0000b103 ld x2,0(x1) + 800037f4: 00808093 addi x1,x1,8 + +00000000800037f8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + pack x24, x7, x2 # perform operation + 800037f8: 0823cc33 pack x24,x7,x2 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 800037fc: 000bb203 ld x4,0(x23) + 80003800: 01820c63 beq x4,x24,80003818 + 80003804: 57d032ef jal x5,80007580 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 80013736 .word 0x80013736 + 80003814: 00000000 .word 0x00000000 + 80003818: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 8000381c: 0000b803 ld x16,0(x1) + 80003820: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000002 + 80003824: 0000bd83 ld x27,0(x1) + 80003828: 00808093 addi x1,x1,8 + +000000008000382c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + pack x11, x16, x27 # perform operation + 8000382c: 09b845b3 pack x11,x16,x27 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003830: 000bb203 ld x4,0(x23) + 80003834: 00b20c63 beq x4,x11,8000384c + 80003838: 549032ef jal x5,80007580 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 80013796 .word 0x80013796 + 80003848: 00000000 .word 0x00000000 + 8000384c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003850: 0000b303 ld x6,0(x1) + 80003854: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x8000000000000000 + 80003858: 0000bf03 ld x30,0(x1) + 8000385c: 00808093 addi x1,x1,8 + +0000000080003860 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + pack x31, x6, x30 # perform operation + 80003860: 09e34fb3 pack x31,x6,x30 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003864: 000bb203 ld x4,0(x23) + 80003868: 01f20c63 beq x4,x31,80003880 + 8000386c: 515032ef jal x5,80007580 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 800137f6 .word 0x800137f6 + 8000387c: 00000000 .word 0x00000000 + 80003880: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 80003884: 0000b603 ld x12,0(x1) + 80003888: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x8000000000000001 + 8000388c: 0000b303 ld x6,0(x1) + 80003890: 00808093 addi x1,x1,8 + +0000000080003894 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + pack x21, x12, x6 # perform operation + 80003894: 08664ab3 pack x21,x12,x6 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 80003898: 000bb203 ld x4,0(x23) + 8000389c: 01520c63 beq x4,x21,800038b4 + 800038a0: 4e1032ef jal x5,80007580 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 80013865 .word 0x80013865 + 800038b0: 00000000 .word 0x00000000 + 800038b4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 800038b8: 0000b783 ld x15,0(x1) + 800038bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x7fffffffffffffff + 800038c0: 0000b503 ld x10,0(x1) + 800038c4: 00808093 addi x1,x1,8 + +00000000800038c8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + pack x30, x15, x10 # perform operation + 800038c8: 08a7cf33 pack x30,x15,x10 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038cc: 000bb203 ld x4,0(x23) + 800038d0: 01e20c63 beq x4,x30,800038e8 + 800038d4: 4ad032ef jal x5,80007580 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 800138d4 .word 0x800138d4 + 800038e4: 00000000 .word 0x00000000 + 800038e8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 800038ec: 0000b303 ld x6,0(x1) + 800038f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 800038f4: 0000b183 ld x3,0(x1) + 800038f8: 00808093 addi x1,x1,8 + +00000000800038fc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + pack x25, x6, x3 # perform operation + 800038fc: 08334cb3 pack x25,x6,x3 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003900: 000bb203 ld x4,0(x23) + 80003904: 01920c63 beq x4,x25,8000391c + 80003908: 479032ef jal x5,80007580 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 80013943 .word 0x80013943 + 80003918: 00000000 .word 0x00000000 + 8000391c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003920: 0000bc03 ld x24,0(x1) + 80003924: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 80003928: 0000bf83 ld x31,0(x1) + 8000392c: 00808093 addi x1,x1,8 + +0000000080003930 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + pack x16, x24, x31 # perform operation + 80003930: 09fc4833 pack x16,x24,x31 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003934: 000bb203 ld x4,0(x23) + 80003938: 01020c63 beq x4,x16,80003950 + 8000393c: 445032ef jal x5,80007580 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 800139b2 .word 0x800139b2 + 8000394c: 00000000 .word 0x00000000 + 80003950: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 80003954: 0000be03 ld x28,0(x1) + 80003958: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xfffffffffffffffe + 8000395c: 0000bd03 ld x26,0(x1) + 80003960: 00808093 addi x1,x1,8 + +0000000080003964 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + pack x7, x28, x26 # perform operation + 80003964: 09ae43b3 pack x7,x28,x26 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003968: 000bb203 ld x4,0(x23) + 8000396c: 00720c63 beq x4,x7,80003984 + 80003970: 411032ef jal x5,80007580 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80013a21 .word 0x80013a21 + 80003980: 00000000 .word 0x00000000 + 80003984: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003988: 0000bc03 ld x24,0(x1) + 8000398c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 80003990: 0000ba03 ld x20,0(x1) + 80003994: 00808093 addi x1,x1,8 + +0000000080003998 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + pack x29, x24, x20 # perform operation + 80003998: 094c4eb3 pack x29,x24,x20 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 8000399c: 000bb203 ld x4,0(x23) + 800039a0: 01d20c63 beq x4,x29,800039b8 + 800039a4: 3dd032ef jal x5,80007580 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80013a90 .word 0x80013a90 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 800039bc: 0000b583 ld x11,0(x1) + 800039c0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 800039c4: 0000b903 ld x18,0(x1) + 800039c8: 00808093 addi x1,x1,8 + +00000000800039cc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + pack x16, x11, x18 # perform operation + 800039cc: 0925c833 pack x16,x11,x18 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039d0: 000bb203 ld x4,0(x23) + 800039d4: 01020c63 beq x4,x16,800039ec + 800039d8: 3a9032ef jal x5,80007580 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 80013aff .word 0x80013aff + 800039e8: 00000000 .word 0x00000000 + 800039ec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 800039f0: 0000b403 ld x8,0(x1) + 800039f4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x5555555555555555 + 800039f8: 0000be03 ld x28,0(x1) + 800039fc: 00808093 addi x1,x1,8 + +0000000080003a00 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + pack x12, x8, x28 # perform operation + 80003a00: 09c44633 pack x12,x8,x28 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a04: 000bb203 ld x4,0(x23) + 80003a08: 00c20c63 beq x4,x12,80003a20 + 80003a0c: 375032ef jal x5,80007580 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 80013b6e .word 0x80013b6e + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003a24: 0000ba83 ld x21,0(x1) + 80003a28: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000ffffffff + 80003a2c: 0000b783 ld x15,0(x1) + 80003a30: 00808093 addi x1,x1,8 + +0000000080003a34 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + pack x16, x21, x15 # perform operation + 80003a34: 08fac833 pack x16,x21,x15 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a38: 000bb203 ld x4,0(x23) + 80003a3c: 01020c63 beq x4,x16,80003a54 + 80003a40: 341032ef jal x5,80007580 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 80013bdd .word 0x80013bdd + 80003a50: 00000000 .word 0x00000000 + 80003a54: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 80003a58: 0000b903 ld x18,0(x1) + 80003a5c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x00000000fffffffe + 80003a60: 0000ba83 ld x21,0(x1) + 80003a64: 00808093 addi x1,x1,8 + +0000000080003a68 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + pack x29, x18, x21 # perform operation + 80003a68: 09594eb3 pack x29,x18,x21 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a6c: 000bb203 ld x4,0(x23) + 80003a70: 01d20c63 beq x4,x29,80003a88 + 80003a74: 30d032ef jal x5,80007580 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80013c44 .word 0x80013c44 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003a8c: 0000b683 ld x13,0(x1) + 80003a90: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000100000000 + 80003a94: 0000b103 ld x2,0(x1) + 80003a98: 00808093 addi x1,x1,8 + +0000000080003a9c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + pack x28, x13, x2 # perform operation + 80003a9c: 0826ce33 pack x28,x13,x2 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003aa0: 000bb203 ld x4,0(x23) + 80003aa4: 01c20c63 beq x4,x28,80003abc + 80003aa8: 2d9032ef jal x5,80007580 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 80013cab .word 0x80013cab + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x5bbc887763ae86f2 + 80003ac0: 0000b383 ld x7,0(x1) + 80003ac4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000100000001 + 80003ac8: 0000b703 ld x14,0(x1) + 80003acc: 00808093 addi x1,x1,8 + +0000000080003ad0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + pack x17, x7, x14 # perform operation + 80003ad0: 08e3c8b3 pack x17,x7,x14 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003ad4: 000bb203 ld x4,0(x23) + 80003ad8: 01120c63 beq x4,x17,80003af0 + 80003adc: 2a5032ef jal x5,80007580 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 80013d13 .word 0x80013d13 + 80003aec: 00000000 .word 0x00000000 + 80003af0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003af4: 0000b183 ld x3,0(x1) + 80003af8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0000000000000000 + 80003afc: 0000b503 ld x10,0(x1) + 80003b00: 00808093 addi x1,x1,8 + +0000000080003b04 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + pack x31, x3, x10 # perform operation + 80003b04: 08a1cfb3 pack x31,x3,x10 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b08: 000bb203 ld x4,0(x23) + 80003b0c: 01f20c63 beq x4,x31,80003b24 + 80003b10: 271032ef jal x5,80007580 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80013d7b .word 0x80013d7b + 80003b20: 00000000 .word 0x00000000 + 80003b24: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b28: 0000b703 ld x14,0(x1) + 80003b2c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000001 + 80003b30: 0000bd83 ld x27,0(x1) + 80003b34: 00808093 addi x1,x1,8 + +0000000080003b38 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + pack x22, x14, x27 # perform operation + 80003b38: 09b74b33 pack x22,x14,x27 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b3c: 000bb203 ld x4,0(x23) + 80003b40: 01620c63 beq x4,x22,80003b58 + 80003b44: 23d032ef jal x5,80007580 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 80013ddb .word 0x80013ddb + 80003b54: 00000000 .word 0x00000000 + 80003b58: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 0000b783 ld x15,0(x1) + 80003b60: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x0000000000000002 + 80003b64: 0000b303 ld x6,0(x1) + 80003b68: 00808093 addi x1,x1,8 + +0000000080003b6c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + pack x14, x15, x6 # perform operation + 80003b6c: 0867c733 pack x14,x15,x6 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b70: 000bb203 ld x4,0(x23) + 80003b74: 00e20c63 beq x4,x14,80003b8c + 80003b78: 209032ef jal x5,80007580 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80013e3b .word 0x80013e3b + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003b90: 0000b983 ld x19,0(x1) + 80003b94: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x8000000000000000 + 80003b98: 0000b783 ld x15,0(x1) + 80003b9c: 00808093 addi x1,x1,8 + +0000000080003ba0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + pack x3, x19, x15 # perform operation + 80003ba0: 08f9c1b3 pack x3,x19,x15 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003ba4: 000bb203 ld x4,0(x23) + 80003ba8: 00320c63 beq x4,x3,80003bc0 + 80003bac: 1d5032ef jal x5,80007580 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 80013e9b .word 0x80013e9b + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 0000b503 ld x10,0(x1) + 80003bc8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x8000000000000001 + 80003bcc: 0000b603 ld x12,0(x1) + 80003bd0: 00808093 addi x1,x1,8 + +0000000080003bd4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + pack x27, x10, x12 # perform operation + 80003bd4: 08c54db3 pack x27,x10,x12 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003bd8: 000bb203 ld x4,0(x23) + 80003bdc: 01b20c63 beq x4,x27,80003bf4 + 80003be0: 1a1032ef jal x5,80007580 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 80013f0a .word 0x80013f0a + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 0000b803 ld x16,0(x1) + 80003bfc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x7fffffffffffffff + 80003c00: 0000b783 ld x15,0(x1) + 80003c04: 00808093 addi x1,x1,8 + +0000000080003c08 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + pack x30, x16, x15 # perform operation + 80003c08: 08f84f33 pack x30,x16,x15 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c0c: 000bb203 ld x4,0(x23) + 80003c10: 01e20c63 beq x4,x30,80003c28 + 80003c14: 16d032ef jal x5,80007580 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 80013f79 .word 0x80013f79 + 80003c24: 00000000 .word 0x00000000 + 80003c28: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 0000b983 ld x19,0(x1) + 80003c30: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80003c34: 0000b183 ld x3,0(x1) + 80003c38: 00808093 addi x1,x1,8 + +0000000080003c3c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + pack x15, x19, x3 # perform operation + 80003c3c: 0839c7b3 pack x15,x19,x3 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c40: 000bb203 ld x4,0(x23) + 80003c44: 00f20c63 beq x4,x15,80003c5c + 80003c48: 139032ef jal x5,80007580 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 80013fe8 .word 0x80013fe8 + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003c60: 0000b503 ld x10,0(x1) + 80003c64: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xffffffffffffffff + 80003c68: 0000b183 ld x3,0(x1) + 80003c6c: 00808093 addi x1,x1,8 + +0000000080003c70 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + pack x16, x10, x3 # perform operation + 80003c70: 08354833 pack x16,x10,x3 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c74: 000bb203 ld x4,0(x23) + 80003c78: 01020c63 beq x4,x16,80003c90 + 80003c7c: 105032ef jal x5,80007580 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 80014057 .word 0x80014057 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80003c94: 0000b383 ld x7,0(x1) + 80003c98: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xfffffffffffffffe + 80003c9c: 0000bd83 ld x27,0(x1) + 80003ca0: 00808093 addi x1,x1,8 + +0000000080003ca4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + pack x24, x7, x27 # perform operation + 80003ca4: 09b3cc33 pack x24,x7,x27 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003ca8: 000bb203 ld x4,0(x23) + 80003cac: 01820c63 beq x4,x24,80003cc4 + 80003cb0: 0d1032ef jal x5,80007580 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 800140c6 .word 0x800140c6 + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 0000b483 ld x9,0(x1) + 80003ccc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 80003cd0: 0000bd03 ld x26,0(x1) + 80003cd4: 00808093 addi x1,x1,8 + +0000000080003cd8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + pack x6, x9, x26 # perform operation + 80003cd8: 09a4c333 pack x6,x9,x26 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003cdc: 000bb203 ld x4,0(x23) + 80003ce0: 00620c63 beq x4,x6,80003cf8 + 80003ce4: 09d032ef jal x5,80007580 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 80014135 .word 0x80014135 + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 0000bd03 ld x26,0(x1) + 80003d00: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80003d04: 0000b303 ld x6,0(x1) + 80003d08: 00808093 addi x1,x1,8 + +0000000080003d0c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + pack x30, x26, x6 # perform operation + 80003d0c: 086d4f33 pack x30,x26,x6 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d10: 000bb203 ld x4,0(x23) + 80003d14: 01e20c63 beq x4,x30,80003d2c + 80003d18: 069032ef jal x5,80007580 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 800141a4 .word 0x800141a4 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003d30: 0000b503 ld x10,0(x1) + 80003d34: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x5555555555555555 + 80003d38: 0000b303 ld x6,0(x1) + 80003d3c: 00808093 addi x1,x1,8 + +0000000080003d40 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + pack x11, x10, x6 # perform operation + 80003d40: 086545b3 pack x11,x10,x6 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d44: 000bb203 ld x4,0(x23) + 80003d48: 00b20c63 beq x4,x11,80003d60 + 80003d4c: 035032ef jal x5,80007580 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 80014213 .word 0x80014213 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003d64: 0000b103 ld x2,0(x1) + 80003d68: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs2: x8 = 0x00000000ffffffff + 80003d6c: 0000b403 ld x8,0(x1) + 80003d70: 00808093 addi x1,x1,8 + +0000000080003d74 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + pack x31, x2, x8 # perform operation + 80003d74: 08814fb3 pack x31,x2,x8 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003d78: 000bb203 ld x4,0(x23) + 80003d7c: 01f20c63 beq x4,x31,80003d94 + 80003d80: 001032ef jal x5,80007580 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 80014282 .word 0x80014282 + 80003d90: 00000000 .word 0x00000000 + 80003d94: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003d98: 0000ba83 ld x21,0(x1) + 80003d9c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x00000000fffffffe + 80003da0: 0000bb03 ld x22,0(x1) + 80003da4: 00808093 addi x1,x1,8 + +0000000080003da8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + pack x11, x21, x22 # perform operation + 80003da8: 096ac5b3 pack x11,x21,x22 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dac: 000bb203 ld x4,0(x23) + 80003db0: 00b20c63 beq x4,x11,80003dc8 + 80003db4: 7cc032ef jal x5,80007580 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 800142e9 .word 0x800142e9 + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 0000b403 ld x8,0(x1) + 80003dd0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000100000000 + 80003dd4: 0000be03 ld x28,0(x1) + 80003dd8: 00808093 addi x1,x1,8 + +0000000080003ddc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + pack x26, x8, x28 # perform operation + 80003ddc: 09c44d33 pack x26,x8,x28 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003de0: 000bb203 ld x4,0(x23) + 80003de4: 01a20c63 beq x4,x26,80003dfc + 80003de8: 798032ef jal x5,80007580 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 80014350 .word 0x80014350 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003e00: 0000bc83 ld x25,0(x1) + 80003e04: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000100000001 + 80003e08: 0000bd83 ld x27,0(x1) + 80003e0c: 00808093 addi x1,x1,8 + +0000000080003e10 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + pack x28, x25, x27 # perform operation + 80003e10: 09bcce33 pack x28,x25,x27 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e14: 000bb203 ld x4,0(x23) + 80003e18: 01c20c63 beq x4,x28,80003e30 + 80003e1c: 764032ef jal x5,80007580 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 800143b8 .word 0x800143b8 + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5555555555555555 + 80003e34: 0000b703 ld x14,0(x1) + 80003e38: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000000 + 80003e3c: 0000bd83 ld x27,0(x1) + 80003e40: 00808093 addi x1,x1,8 + +0000000080003e44 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + pack x15, x14, x27 # perform operation + 80003e44: 09b747b3 pack x15,x14,x27 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e48: 000bb203 ld x4,0(x23) + 80003e4c: 00f20c63 beq x4,x15,80003e64 + 80003e50: 730032ef jal x5,80007580 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 80014420 .word 0x80014420 + 80003e60: 00000000 .word 0x00000000 + 80003e64: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x5555555555555555 + 80003e68: 0000b103 ld x2,0(x1) + 80003e6c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x0000000000000001 + 80003e70: 0000b183 ld x3,0(x1) + 80003e74: 00808093 addi x1,x1,8 + +0000000080003e78 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + pack x15, x2, x3 # perform operation + 80003e78: 083147b3 pack x15,x2,x3 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003e7c: 000bb203 ld x4,0(x23) + 80003e80: 00f20c63 beq x4,x15,80003e98 + 80003e84: 6fc032ef jal x5,80007580 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 80014480 .word 0x80014480 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x5555555555555555 + 80003e9c: 0000ba83 ld x21,0(x1) + 80003ea0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000000000002 + 80003ea4: 0000b583 ld x11,0(x1) + 80003ea8: 00808093 addi x1,x1,8 + +0000000080003eac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + pack x31, x21, x11 # perform operation + 80003eac: 08bacfb3 pack x31,x21,x11 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003eb0: 000bb203 ld x4,0(x23) + 80003eb4: 01f20c63 beq x4,x31,80003ecc + 80003eb8: 6c8032ef jal x5,80007580 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 800144e0 .word 0x800144e0 + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x5555555555555555 + 80003ed0: 0000b483 ld x9,0(x1) + 80003ed4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x8000000000000000 + 80003ed8: 0000bd83 ld x27,0(x1) + 80003edc: 00808093 addi x1,x1,8 + +0000000080003ee0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + pack x13, x9, x27 # perform operation + 80003ee0: 09b4c6b3 pack x13,x9,x27 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003ee4: 000bb203 ld x4,0(x23) + 80003ee8: 00d20c63 beq x4,x13,80003f00 + 80003eec: 694032ef jal x5,80007580 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 80014540 .word 0x80014540 + 80003efc: 00000000 .word 0x00000000 + 80003f00: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x5555555555555555 + 80003f04: 0000b983 ld x19,0(x1) + 80003f08: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x8000000000000001 + 80003f0c: 0000b583 ld x11,0(x1) + 80003f10: 00808093 addi x1,x1,8 + +0000000080003f14 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + pack x20, x19, x11 # perform operation + 80003f14: 08b9ca33 pack x20,x19,x11 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f18: 000bb203 ld x4,0(x23) + 80003f1c: 01420c63 beq x4,x20,80003f34 + 80003f20: 660032ef jal x5,80007580 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 800145af .word 0x800145af + 80003f30: 00000000 .word 0x00000000 + 80003f34: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x5555555555555555 + 80003f38: 0000bb03 ld x22,0(x1) + 80003f3c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7fffffffffffffff + 80003f40: 0000bd83 ld x27,0(x1) + 80003f44: 00808093 addi x1,x1,8 + +0000000080003f48 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + pack x7, x22, x27 # perform operation + 80003f48: 09bb43b3 pack x7,x22,x27 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f4c: 000bb203 ld x4,0(x23) + 80003f50: 00720c63 beq x4,x7,80003f68 + 80003f54: 62c032ef jal x5,80007580 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 8001461e .word 0x8001461e + 80003f64: 00000000 .word 0x00000000 + 80003f68: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5555555555555555 + 80003f6c: 0000b683 ld x13,0(x1) + 80003f70: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80003f74: 0000be83 ld x29,0(x1) + 80003f78: 00808093 addi x1,x1,8 + +0000000080003f7c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + pack x27, x13, x29 # perform operation + 80003f7c: 09d6cdb3 pack x27,x13,x29 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003f80: 000bb203 ld x4,0(x23) + 80003f84: 01b20c63 beq x4,x27,80003f9c + 80003f88: 5f8032ef jal x5,80007580 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 8001468d .word 0x8001468d + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5555555555555555 + 80003fa0: 0000be03 ld x28,0(x1) + 80003fa4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xffffffffffffffff + 80003fa8: 0000b303 ld x6,0(x1) + 80003fac: 00808093 addi x1,x1,8 + +0000000080003fb0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + pack x27, x28, x6 # perform operation + 80003fb0: 086e4db3 pack x27,x28,x6 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fb4: 000bb203 ld x4,0(x23) + 80003fb8: 01b20c63 beq x4,x27,80003fd0 + 80003fbc: 5c4032ef jal x5,80007580 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 800146fc .word 0x800146fc + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x5555555555555555 + 80003fd4: 0000b103 ld x2,0(x1) + 80003fd8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0xfffffffffffffffe + 80003fdc: 0000bc03 ld x24,0(x1) + 80003fe0: 00808093 addi x1,x1,8 + +0000000080003fe4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + pack x26, x2, x24 # perform operation + 80003fe4: 09814d33 pack x26,x2,x24 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80003fe8: 000bb203 ld x4,0(x23) + 80003fec: 01a20c63 beq x4,x26,80004004 + 80003ff0: 590032ef jal x5,80007580 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 8001476b .word 0x8001476b + 80004000: 00000000 .word 0x00000000 + 80004004: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x5555555555555555 + 80004008: 0000bc83 ld x25,0(x1) + 8000400c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80004010: 0000b883 ld x17,0(x1) + 80004014: 00808093 addi x1,x1,8 + +0000000080004018 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + pack x18, x25, x17 # perform operation + 80004018: 091cc933 pack x18,x25,x17 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 8000401c: 000bb203 ld x4,0(x23) + 80004020: 01220c63 beq x4,x18,80004038 + 80004024: 55c032ef jal x5,80007580 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 800147da .word 0x800147da + 80004034: 00000000 .word 0x00000000 + 80004038: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x5555555555555555 + 8000403c: 0000be03 ld x28,0(x1) + 80004040: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80004044: 0000b883 ld x17,0(x1) + 80004048: 00808093 addi x1,x1,8 + +000000008000404c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + pack x26, x28, x17 # perform operation + 8000404c: 091e4d33 pack x26,x28,x17 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004050: 000bb203 ld x4,0(x23) + 80004054: 01a20c63 beq x4,x26,8000406c + 80004058: 528032ef jal x5,80007580 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 80014849 .word 0x80014849 + 80004068: 00000000 .word 0x00000000 + 8000406c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x5555555555555555 + 80004070: 0000b803 ld x16,0(x1) + 80004074: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x5555555555555555 + 80004078: 0000b603 ld x12,0(x1) + 8000407c: 00808093 addi x1,x1,8 + +0000000080004080 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + pack x9, x16, x12 # perform operation + 80004080: 08c844b3 pack x9,x16,x12 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 80004084: 000bb203 ld x4,0(x23) + 80004088: 00920c63 beq x4,x9,800040a0 + 8000408c: 4f4032ef jal x5,80007580 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 800148b8 .word 0x800148b8 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x5555555555555555 + 800040a4: 0000bb03 ld x22,0(x1) + 800040a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x00000000ffffffff + 800040ac: 0000b103 ld x2,0(x1) + 800040b0: 00808093 addi x1,x1,8 + +00000000800040b4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + pack x18, x22, x2 # perform operation + 800040b4: 082b4933 pack x18,x22,x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040b8: 000bb203 ld x4,0(x23) + 800040bc: 01220c63 beq x4,x18,800040d4 + 800040c0: 4c0032ef jal x5,80007580 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80014927 .word 0x80014927 + 800040d0: 00000000 .word 0x00000000 + 800040d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x5555555555555555 + 800040d8: 0000b403 ld x8,0(x1) + 800040dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0x00000000fffffffe + 800040e0: 0000b183 ld x3,0(x1) + 800040e4: 00808093 addi x1,x1,8 + +00000000800040e8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + pack x22, x8, x3 # perform operation + 800040e8: 08344b33 pack x22,x8,x3 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 800040ec: 000bb203 ld x4,0(x23) + 800040f0: 01620c63 beq x4,x22,80004108 + 800040f4: 48c032ef jal x5,80007580 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 8001498e .word 0x8001498e + 80004104: 00000000 .word 0x00000000 + 80004108: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x5555555555555555 + 8000410c: 0000b403 ld x8,0(x1) + 80004110: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x0000000100000000 + 80004114: 0000bf83 ld x31,0(x1) + 80004118: 00808093 addi x1,x1,8 + +000000008000411c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + pack x9, x8, x31 # perform operation + 8000411c: 09f444b3 pack x9,x8,x31 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004120: 000bb203 ld x4,0(x23) + 80004124: 00920c63 beq x4,x9,8000413c + 80004128: 458032ef jal x5,80007580 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 800149f5 .word 0x800149f5 + 80004138: 00000000 .word 0x00000000 + 8000413c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x5555555555555555 + 80004140: 0000ba83 ld x21,0(x1) + 80004144: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x0000000100000001 + 80004148: 0000b803 ld x16,0(x1) + 8000414c: 00808093 addi x1,x1,8 + +0000000080004150 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + pack x29, x21, x16 # perform operation + 80004150: 090aceb3 pack x29,x21,x16 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004154: 000bb203 ld x4,0(x23) + 80004158: 01d20c63 beq x4,x29,80004170 + 8000415c: 424032ef jal x5,80007580 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 80014a5d .word 0x80014a5d + 8000416c: 00000000 .word 0x00000000 + 80004170: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000ffffffff + 80004174: 0000b303 ld x6,0(x1) + 80004178: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x0000000000000000 + 8000417c: 0000b503 ld x10,0(x1) + 80004180: 00808093 addi x1,x1,8 + +0000000080004184 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + pack x25, x6, x10 # perform operation + 80004184: 08a34cb3 pack x25,x6,x10 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 80004188: 000bb203 ld x4,0(x23) + 8000418c: 01920c63 beq x4,x25,800041a4 + 80004190: 3f0032ef jal x5,80007580 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 80014ac5 .word 0x80014ac5 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x00000000ffffffff + 800041a8: 0000bc03 ld x24,0(x1) + 800041ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x0000000000000001 + 800041b0: 0000bd03 ld x26,0(x1) + 800041b4: 00808093 addi x1,x1,8 + +00000000800041b8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + pack x29, x24, x26 # perform operation + 800041b8: 09ac4eb3 pack x29,x24,x26 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041bc: 000bb203 ld x4,0(x23) + 800041c0: 01d20c63 beq x4,x29,800041d8 + 800041c4: 3bc032ef jal x5,80007580 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 80014b1d .word 0x80014b1d + 800041d4: 00000000 .word 0x00000000 + 800041d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x00000000ffffffff + 800041dc: 0000b383 ld x7,0(x1) + 800041e0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x0000000000000002 + 800041e4: 0000b683 ld x13,0(x1) + 800041e8: 00808093 addi x1,x1,8 + +00000000800041ec : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + pack x12, x7, x13 # perform operation + 800041ec: 08d3c633 pack x12,x7,x13 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 800041f0: 000bb203 ld x4,0(x23) + 800041f4: 00c20c63 beq x4,x12,8000420c + 800041f8: 388032ef jal x5,80007580 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 80014b75 .word 0x80014b75 + 80004208: 00000000 .word 0x00000000 + 8000420c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000000ffffffff + 80004210: 0000b183 ld x3,0(x1) + 80004214: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x8000000000000000 + 80004218: 0000bf03 ld x30,0(x1) + 8000421c: 00808093 addi x1,x1,8 + +0000000080004220 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + pack x25, x3, x30 # perform operation + 80004220: 09e1ccb3 pack x25,x3,x30 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004224: 000bb203 ld x4,0(x23) + 80004228: 01920c63 beq x4,x25,80004240 + 8000422c: 354032ef jal x5,80007580 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 80014bcd .word 0x80014bcd + 8000423c: 00000000 .word 0x00000000 + 80004240: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x00000000ffffffff + 80004244: 0000b703 ld x14,0(x1) + 80004248: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x8000000000000001 + 8000424c: 0000bc03 ld x24,0(x1) + 80004250: 00808093 addi x1,x1,8 + +0000000080004254 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + pack x18, x14, x24 # perform operation + 80004254: 09874933 pack x18,x14,x24 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004258: 000bb203 ld x4,0(x23) + 8000425c: 01220c63 beq x4,x18,80004274 + 80004260: 320032ef jal x5,80007580 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 80014c34 .word 0x80014c34 + 80004270: 00000000 .word 0x00000000 + 80004274: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000000ffffffff + 80004278: 0000bb03 ld x22,0(x1) + 8000427c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x7fffffffffffffff + 80004280: 0000bd83 ld x27,0(x1) + 80004284: 00808093 addi x1,x1,8 + +0000000080004288 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + pack x29, x22, x27 # perform operation + 80004288: 09bb4eb3 pack x29,x22,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 8000428c: 000bb203 ld x4,0(x23) + 80004290: 01d20c63 beq x4,x29,800042a8 + 80004294: 2ec032ef jal x5,80007580 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 80014c9b .word 0x80014c9b + 800042a4: 00000000 .word 0x00000000 + 800042a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000ffffffff + 800042ac: 0000b303 ld x6,0(x1) + 800042b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7ffffffffffffffe + 800042b4: 0000bf03 ld x30,0(x1) + 800042b8: 00808093 addi x1,x1,8 + +00000000800042bc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + pack x29, x6, x30 # perform operation + 800042bc: 09e34eb3 pack x29,x6,x30 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042c0: 000bb203 ld x4,0(x23) + 800042c4: 01d20c63 beq x4,x29,800042dc + 800042c8: 2b8032ef jal x5,80007580 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 80014d02 .word 0x80014d02 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x00000000ffffffff + 800042e0: 0000b383 ld x7,0(x1) + 800042e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0xffffffffffffffff + 800042e8: 0000bc83 ld x25,0(x1) + 800042ec: 00808093 addi x1,x1,8 + +00000000800042f0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + pack x29, x7, x25 # perform operation + 800042f0: 0993ceb3 pack x29,x7,x25 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 800042f4: 000bb203 ld x4,0(x23) + 800042f8: 01d20c63 beq x4,x29,80004310 + 800042fc: 284032ef jal x5,80007580 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 80014d69 .word 0x80014d69 + 8000430c: 00000000 .word 0x00000000 + 80004310: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x00000000ffffffff + 80004314: 0000ba83 ld x21,0(x1) + 80004318: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0xfffffffffffffffe + 8000431c: 0000b103 ld x2,0(x1) + 80004320: 00808093 addi x1,x1,8 + +0000000080004324 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + pack x15, x21, x2 # perform operation + 80004324: 082ac7b3 pack x15,x21,x2 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004328: 000bb203 ld x4,0(x23) + 8000432c: 00f20c63 beq x4,x15,80004344 + 80004330: 250032ef jal x5,80007580 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 80014dd0 .word 0x80014dd0 + 80004340: 00000000 .word 0x00000000 + 80004344: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x00000000ffffffff + 80004348: 0000b503 ld x10,0(x1) + 8000434c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 80004350: 0000bd03 ld x26,0(x1) + 80004354: 00808093 addi x1,x1,8 + +0000000080004358 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + pack x13, x10, x26 # perform operation + 80004358: 09a546b3 pack x13,x10,x26 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000435c: 000bb203 ld x4,0(x23) + 80004360: 00d20c63 beq x4,x13,80004378 + 80004364: 21c032ef jal x5,80007580 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 80014e37 .word 0x80014e37 + 80004374: 00000000 .word 0x00000000 + 80004378: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000000ffffffff + 8000437c: 0000ba03 ld x20,0(x1) + 80004380: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80004384: 0000b303 ld x6,0(x1) + 80004388: 00808093 addi x1,x1,8 + +000000008000438c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + pack x3, x20, x6 # perform operation + 8000438c: 086a41b3 pack x3,x20,x6 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004390: 000bb203 ld x4,0(x23) + 80004394: 00320c63 beq x4,x3,800043ac + 80004398: 1e8032ef jal x5,80007580 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 80014e9e .word 0x80014e9e + 800043a8: 00000000 .word 0x00000000 + 800043ac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x00000000ffffffff + 800043b0: 0000bd83 ld x27,0(x1) + 800043b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x5555555555555555 + 800043b8: 0000b883 ld x17,0(x1) + 800043bc: 00808093 addi x1,x1,8 + +00000000800043c0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + pack x16, x27, x17 # perform operation + 800043c0: 091dc833 pack x16,x27,x17 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043c4: 000bb203 ld x4,0(x23) + 800043c8: 01020c63 beq x4,x16,800043e0 + 800043cc: 1b4032ef jal x5,80007580 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 80014f05 .word 0x80014f05 + 800043dc: 00000000 .word 0x00000000 + 800043e0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000000ffffffff + 800043e4: 0000b783 ld x15,0(x1) + 800043e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000000ffffffff + 800043ec: 0000b803 ld x16,0(x1) + 800043f0: 00808093 addi x1,x1,8 + +00000000800043f4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + pack x29, x15, x16 # perform operation + 800043f4: 0907ceb3 pack x29,x15,x16 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 800043f8: 000bb203 ld x4,0(x23) + 800043fc: 01d20c63 beq x4,x29,80004414 + 80004400: 180032ef jal x5,80007580 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 80014f6c .word 0x80014f6c + 80004410: 00000000 .word 0x00000000 + 80004414: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x00000000ffffffff + 80004418: 0000b603 ld x12,0(x1) + 8000441c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x00000000fffffffe + 80004420: 0000b703 ld x14,0(x1) + 80004424: 00808093 addi x1,x1,8 + +0000000080004428 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + pack x13, x12, x14 # perform operation + 80004428: 08e646b3 pack x13,x12,x14 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 8000442c: 000bb203 ld x4,0(x23) + 80004430: 00d20c63 beq x4,x13,80004448 + 80004434: 14c032ef jal x5,80007580 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 80014fcb .word 0x80014fcb + 80004444: 00000000 .word 0x00000000 + 80004448: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x00000000ffffffff + 8000444c: 0000bf03 ld x30,0(x1) + 80004450: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x0000000100000000 + 80004454: 0000b883 ld x17,0(x1) + 80004458: 00808093 addi x1,x1,8 + +000000008000445c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + pack x2, x30, x17 # perform operation + 8000445c: 091f4133 pack x2,x30,x17 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004460: 000bb203 ld x4,0(x23) + 80004464: 00220c63 beq x4,x2,8000447c + 80004468: 118032ef jal x5,80007580 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 8001502a .word 0x8001502a + 80004478: 00000000 .word 0x00000000 + 8000447c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x00000000ffffffff + 80004480: 0000b403 ld x8,0(x1) + 80004484: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000100000001 + 80004488: 0000b583 ld x11,0(x1) + 8000448c: 00808093 addi x1,x1,8 + +0000000080004490 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + pack x15, x8, x11 # perform operation + 80004490: 08b447b3 pack x15,x8,x11 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 80004494: 000bb203 ld x4,0(x23) + 80004498: 00f20c63 beq x4,x15,800044b0 + 8000449c: 0e4032ef jal x5,80007580 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 8001508a .word 0x8001508a + 800044ac: 00000000 .word 0x00000000 + 800044b0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x00000000fffffffe + 800044b4: 0000b583 ld x11,0(x1) + 800044b8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x0000000000000000 + 800044bc: 0000b983 ld x19,0(x1) + 800044c0: 00808093 addi x1,x1,8 + +00000000800044c4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + pack x25, x11, x19 # perform operation + 800044c4: 0935ccb3 pack x25,x11,x19 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044c8: 000bb203 ld x4,0(x23) + 800044cc: 01920c63 beq x4,x25,800044e4 + 800044d0: 0b0032ef jal x5,80007580 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 800150ea .word 0x800150ea + 800044e0: 00000000 .word 0x00000000 + 800044e4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000fffffffe + 800044e8: 0000b303 ld x6,0(x1) + 800044ec: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000001 + 800044f0: 0000be83 ld x29,0(x1) + 800044f4: 00808093 addi x1,x1,8 + +00000000800044f8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + pack x27, x6, x29 # perform operation + 800044f8: 09d34db3 pack x27,x6,x29 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 800044fc: 000bb203 ld x4,0(x23) + 80004500: 01b20c63 beq x4,x27,80004518 + 80004504: 07c032ef jal x5,80007580 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 80015142 .word 0x80015142 + 80004514: 00000000 .word 0x00000000 + 80004518: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000000fffffffe + 8000451c: 0000bb03 ld x22,0(x1) + 80004520: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000002 + 80004524: 0000ba83 ld x21,0(x1) + 80004528: 00808093 addi x1,x1,8 + +000000008000452c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + pack x12, x22, x21 # perform operation + 8000452c: 095b4633 pack x12,x22,x21 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004530: 000bb203 ld x4,0(x23) + 80004534: 00c20c63 beq x4,x12,8000454c + 80004538: 048032ef jal x5,80007580 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 8001519a .word 0x8001519a + 80004548: 00000000 .word 0x00000000 + 8000454c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x00000000fffffffe + 80004550: 0000bf83 ld x31,0(x1) + 80004554: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x8000000000000000 + 80004558: 0000b103 ld x2,0(x1) + 8000455c: 00808093 addi x1,x1,8 + +0000000080004560 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + pack x26, x31, x2 # perform operation + 80004560: 082fcd33 pack x26,x31,x2 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004564: 000bb203 ld x4,0(x23) + 80004568: 01a20c63 beq x4,x26,80004580 + 8000456c: 014032ef jal x5,80007580 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 800151f2 .word 0x800151f2 + 8000457c: 00000000 .word 0x00000000 + 80004580: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x00000000fffffffe + 80004584: 0000b503 ld x10,0(x1) + 80004588: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x8000000000000001 + 8000458c: 0000b683 ld x13,0(x1) + 80004590: 00808093 addi x1,x1,8 + +0000000080004594 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + pack x2, x10, x13 # perform operation + 80004594: 08d54133 pack x2,x10,x13 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 80004598: 000bb203 ld x4,0(x23) + 8000459c: 00220c63 beq x4,x2,800045b4 + 800045a0: 7e1022ef jal x5,80007580 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 80015259 .word 0x80015259 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x00000000fffffffe + 800045b8: 0000be03 ld x28,0(x1) + 800045bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x7fffffffffffffff + 800045c0: 0000be83 ld x29,0(x1) + 800045c4: 00808093 addi x1,x1,8 + +00000000800045c8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + pack x24, x28, x29 # perform operation + 800045c8: 09de4c33 pack x24,x28,x29 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045cc: 000bb203 ld x4,0(x23) + 800045d0: 01820c63 beq x4,x24,800045e8 + 800045d4: 7ad022ef jal x5,80007580 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 800152c0 .word 0x800152c0 + 800045e4: 00000000 .word 0x00000000 + 800045e8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x00000000fffffffe + 800045ec: 0000b183 ld x3,0(x1) + 800045f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0x7ffffffffffffffe + 800045f4: 0000b903 ld x18,0(x1) + 800045f8: 00808093 addi x1,x1,8 + +00000000800045fc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + pack x12, x3, x18 # perform operation + 800045fc: 0921c633 pack x12,x3,x18 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004600: 000bb203 ld x4,0(x23) + 80004604: 00c20c63 beq x4,x12,8000461c + 80004608: 779022ef jal x5,80007580 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 80015327 .word 0x80015327 + 80004618: 00000000 .word 0x00000000 + 8000461c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x00000000fffffffe + 80004620: 0000b783 ld x15,0(x1) + 80004624: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0xffffffffffffffff + 80004628: 0000b303 ld x6,0(x1) + 8000462c: 00808093 addi x1,x1,8 + +0000000080004630 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + pack x11, x15, x6 # perform operation + 80004630: 0867c5b3 pack x11,x15,x6 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004634: 000bb203 ld x4,0(x23) + 80004638: 00b20c63 beq x4,x11,80004650 + 8000463c: 745022ef jal x5,80007580 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 8001538e .word 0x8001538e + 8000464c: 00000000 .word 0x00000000 + 80004650: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x00000000fffffffe + 80004654: 0000b603 ld x12,0(x1) + 80004658: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xfffffffffffffffe + 8000465c: 0000b703 ld x14,0(x1) + 80004660: 00808093 addi x1,x1,8 + +0000000080004664 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + pack x27, x12, x14 # perform operation + 80004664: 08e64db3 pack x27,x12,x14 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004668: 000bb203 ld x4,0(x23) + 8000466c: 01b20c63 beq x4,x27,80004684 + 80004670: 711022ef jal x5,80007580 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 800153f5 .word 0x800153f5 + 80004680: 00000000 .word 0x00000000 + 80004684: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000000fffffffe + 80004688: 0000b483 ld x9,0(x1) + 8000468c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80004690: 0000bf83 ld x31,0(x1) + 80004694: 00808093 addi x1,x1,8 + +0000000080004698 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + pack x25, x9, x31 # perform operation + 80004698: 09f4ccb3 pack x25,x9,x31 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000469c: 000bb203 ld x4,0(x23) + 800046a0: 01920c63 beq x4,x25,800046b8 + 800046a4: 6dd022ef jal x5,80007580 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 8001545c .word 0x8001545c + 800046b4: 00000000 .word 0x00000000 + 800046b8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000000fffffffe + 800046bc: 0000bb03 ld x22,0(x1) + 800046c0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800046c4: 0000b583 ld x11,0(x1) + 800046c8: 00808093 addi x1,x1,8 + +00000000800046cc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + pack x14, x22, x11 # perform operation + 800046cc: 08bb4733 pack x14,x22,x11 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046d0: 000bb203 ld x4,0(x23) + 800046d4: 00e20c63 beq x4,x14,800046ec + 800046d8: 6a9022ef jal x5,80007580 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 800154c3 .word 0x800154c3 + 800046e8: 00000000 .word 0x00000000 + 800046ec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x00000000fffffffe + 800046f0: 0000ba03 ld x20,0(x1) + 800046f4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x5555555555555555 + 800046f8: 0000b683 ld x13,0(x1) + 800046fc: 00808093 addi x1,x1,8 + +0000000080004700 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + pack x26, x20, x13 # perform operation + 80004700: 08da4d33 pack x26,x20,x13 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004704: 000bb203 ld x4,0(x23) + 80004708: 01a20c63 beq x4,x26,80004720 + 8000470c: 675022ef jal x5,80007580 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 8001552a .word 0x8001552a + 8000471c: 00000000 .word 0x00000000 + 80004720: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x00000000fffffffe + 80004724: 0000b803 ld x16,0(x1) + 80004728: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000000ffffffff + 8000472c: 0000b683 ld x13,0(x1) + 80004730: 00808093 addi x1,x1,8 + +0000000080004734 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + pack x3, x16, x13 # perform operation + 80004734: 08d841b3 pack x3,x16,x13 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004738: 000bb203 ld x4,0(x23) + 8000473c: 00320c63 beq x4,x3,80004754 + 80004740: 641022ef jal x5,80007580 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 80015591 .word 0x80015591 + 80004750: 00000000 .word 0x00000000 + 80004754: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x00000000fffffffe + 80004758: 0000b983 ld x19,0(x1) + 8000475c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0x00000000fffffffe + 80004760: 0000b783 ld x15,0(x1) + 80004764: 00808093 addi x1,x1,8 + +0000000080004768 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + pack x27, x19, x15 # perform operation + 80004768: 08f9cdb3 pack x27,x19,x15 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 8000476c: 000bb203 ld x4,0(x23) + 80004770: 01b20c63 beq x4,x27,80004788 + 80004774: 60d022ef jal x5,80007580 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 800155f0 .word 0x800155f0 + 80004784: 00000000 .word 0x00000000 + 80004788: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x00000000fffffffe + 8000478c: 0000b703 ld x14,0(x1) + 80004790: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x0000000100000000 + 80004794: 0000b583 ld x11,0(x1) + 80004798: 00808093 addi x1,x1,8 + +000000008000479c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + pack x18, x14, x11 # perform operation + 8000479c: 08b74933 pack x18,x14,x11 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047a0: 000bb203 ld x4,0(x23) + 800047a4: 01220c63 beq x4,x18,800047bc + 800047a8: 5d9022ef jal x5,80007580 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 8001564f .word 0x8001564f + 800047b8: 00000000 .word 0x00000000 + 800047bc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x00000000fffffffe + 800047c0: 0000b703 ld x14,0(x1) + 800047c4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x0000000100000001 + 800047c8: 0000bf03 ld x30,0(x1) + 800047cc: 00808093 addi x1,x1,8 + +00000000800047d0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + pack x15, x14, x30 # perform operation + 800047d0: 09e747b3 pack x15,x14,x30 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047d4: 000bb203 ld x4,0(x23) + 800047d8: 00f20c63 beq x4,x15,800047f0 + 800047dc: 5a5022ef jal x5,80007580 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 800156af .word 0x800156af + 800047ec: 00000000 .word 0x00000000 + 800047f0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000100000000 + 800047f4: 0000b303 ld x6,0(x1) + 800047f8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0x0000000000000000 + 800047fc: 0000ba83 ld x21,0(x1) + 80004800: 00808093 addi x1,x1,8 + +0000000080004804 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + pack x20, x6, x21 # perform operation + 80004804: 09534a33 pack x20,x6,x21 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004808: 000bb203 ld x4,0(x23) + 8000480c: 01420c63 beq x4,x20,80004824 + 80004810: 571022ef jal x5,80007580 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 8001570f .word 0x8001570f + 80004820: 00000000 .word 0x00000000 + 80004824: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x0000000100000000 + 80004828: 0000b383 ld x7,0(x1) + 8000482c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x0000000000000001 + 80004830: 0000bc03 ld x24,0(x1) + 80004834: 00808093 addi x1,x1,8 + +0000000080004838 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + pack x13, x7, x24 # perform operation + 80004838: 0983c6b3 pack x13,x7,x24 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 8000483c: 000bb203 ld x4,0(x23) + 80004840: 00d20c63 beq x4,x13,80004858 + 80004844: 53d022ef jal x5,80007580 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 80015768 .word 0x80015768 + 80004854: 00000000 .word 0x00000000 + 80004858: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000000 + 8000485c: 0000b983 ld x19,0(x1) + 80004860: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000000000002 + 80004864: 0000be83 ld x29,0(x1) + 80004868: 00808093 addi x1,x1,8 + +000000008000486c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + pack x12, x19, x29 # perform operation + 8000486c: 09d9c633 pack x12,x19,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004870: 000bb203 ld x4,0(x23) + 80004874: 00c20c63 beq x4,x12,8000488c + 80004878: 509022ef jal x5,80007580 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 800157c1 .word 0x800157c1 + 80004888: 00000000 .word 0x00000000 + 8000488c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0000000100000000 + 80004890: 0000be03 ld x28,0(x1) + 80004894: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x8000000000000000 + 80004898: 0000bc83 ld x25,0(x1) + 8000489c: 00808093 addi x1,x1,8 + +00000000800048a0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + pack x7, x28, x25 # perform operation + 800048a0: 099e43b3 pack x7,x28,x25 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048a4: 000bb203 ld x4,0(x23) + 800048a8: 00720c63 beq x4,x7,800048c0 + 800048ac: 4d5022ef jal x5,80007580 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 8001581a .word 0x8001581a + 800048bc: 00000000 .word 0x00000000 + 800048c0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000100000000 + 800048c4: 0000ba03 ld x20,0(x1) + 800048c8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8000000000000001 + 800048cc: 0000b803 ld x16,0(x1) + 800048d0: 00808093 addi x1,x1,8 + +00000000800048d4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + pack x9, x20, x16 # perform operation + 800048d4: 090a44b3 pack x9,x20,x16 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 800048d8: 000bb203 ld x4,0(x23) + 800048dc: 00920c63 beq x4,x9,800048f4 + 800048e0: 4a1022ef jal x5,80007580 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 80015882 .word 0x80015882 + 800048f0: 00000000 .word 0x00000000 + 800048f4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000100000000 + 800048f8: 0000b903 ld x18,0(x1) + 800048fc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x7fffffffffffffff + 80004900: 0000b503 ld x10,0(x1) + 80004904: 00808093 addi x1,x1,8 + +0000000080004908 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + pack x13, x18, x10 # perform operation + 80004908: 08a946b3 pack x13,x18,x10 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 8000490c: 000bb203 ld x4,0(x23) + 80004910: 00d20c63 beq x4,x13,80004928 + 80004914: 46d022ef jal x5,80007580 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 800158ea .word 0x800158ea + 80004924: 00000000 .word 0x00000000 + 80004928: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x0000000100000000 + 8000492c: 0000b503 ld x10,0(x1) + 80004930: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80004934: 0000b103 ld x2,0(x1) + 80004938: 00808093 addi x1,x1,8 + +000000008000493c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + pack x18, x10, x2 # perform operation + 8000493c: 08254933 pack x18,x10,x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004940: 000bb203 ld x4,0(x23) + 80004944: 01220c63 beq x4,x18,8000495c + 80004948: 439022ef jal x5,80007580 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 80015952 .word 0x80015952 + 80004958: 00000000 .word 0x00000000 + 8000495c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x0000000100000000 + 80004960: 0000bd03 ld x26,0(x1) + 80004964: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xffffffffffffffff + 80004968: 0000b583 ld x11,0(x1) + 8000496c: 00808093 addi x1,x1,8 + +0000000080004970 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + pack x19, x26, x11 # perform operation + 80004970: 08bd49b3 pack x19,x26,x11 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 80004974: 000bb203 ld x4,0(x23) + 80004978: 01320c63 beq x4,x19,80004990 + 8000497c: 405022ef jal x5,80007580 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 800159ba .word 0x800159ba + 8000498c: 00000000 .word 0x00000000 + 80004990: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x0000000100000000 + 80004994: 0000b383 ld x7,0(x1) + 80004998: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0xfffffffffffffffe + 8000499c: 0000be83 ld x29,0(x1) + 800049a0: 00808093 addi x1,x1,8 + +00000000800049a4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + pack x24, x7, x29 # perform operation + 800049a4: 09d3cc33 pack x24,x7,x29 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049a8: 000bb203 ld x4,0(x23) + 800049ac: 01820c63 beq x4,x24,800049c4 + 800049b0: 3d1022ef jal x5,80007580 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 80015a22 .word 0x80015a22 + 800049c0: 00000000 .word 0x00000000 + 800049c4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000100000000 + 800049c8: 0000ba83 ld x21,0(x1) + 800049cc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 800049d0: 0000b383 ld x7,0(x1) + 800049d4: 00808093 addi x1,x1,8 + +00000000800049d8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + pack x17, x21, x7 # perform operation + 800049d8: 087ac8b3 pack x17,x21,x7 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 800049dc: 000bb203 ld x4,0(x23) + 800049e0: 01120c63 beq x4,x17,800049f8 + 800049e4: 39d022ef jal x5,80007580 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 80015a8a .word 0x80015a8a + 800049f4: 00000000 .word 0x00000000 + 800049f8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000100000000 + 800049fc: 0000b483 ld x9,0(x1) + 80004a00: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004a04: 0000b983 ld x19,0(x1) + 80004a08: 00808093 addi x1,x1,8 + +0000000080004a0c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + pack x2, x9, x19 # perform operation + 80004a0c: 0934c133 pack x2,x9,x19 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a10: 000bb203 ld x4,0(x23) + 80004a14: 00220c63 beq x4,x2,80004a2c + 80004a18: 369022ef jal x5,80007580 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 80015af2 .word 0x80015af2 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000100000000 + 80004a30: 0000bf83 ld x31,0(x1) + 80004a34: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x5555555555555555 + 80004a38: 0000bc83 ld x25,0(x1) + 80004a3c: 00808093 addi x1,x1,8 + +0000000080004a40 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + pack x29, x31, x25 # perform operation + 80004a40: 099fceb3 pack x29,x31,x25 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a44: 000bb203 ld x4,0(x23) + 80004a48: 01d20c63 beq x4,x29,80004a60 + 80004a4c: 335022ef jal x5,80007580 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 80015b5a .word 0x80015b5a + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000100000000 + 80004a64: 0000b303 ld x6,0(x1) + 80004a68: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x00000000ffffffff + 80004a6c: 0000b503 ld x10,0(x1) + 80004a70: 00808093 addi x1,x1,8 + +0000000080004a74 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + pack x18, x6, x10 # perform operation + 80004a74: 08a34933 pack x18,x6,x10 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004a78: 000bb203 ld x4,0(x23) + 80004a7c: 01220c63 beq x4,x18,80004a94 + 80004a80: 301022ef jal x5,80007580 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 80015bc2 .word 0x80015bc2 + 80004a90: 00000000 .word 0x00000000 + 80004a94: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000100000000 + 80004a98: 0000b303 ld x6,0(x1) + 80004a9c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x00000000fffffffe + 80004aa0: 0000b803 ld x16,0(x1) + 80004aa4: 00808093 addi x1,x1,8 + +0000000080004aa8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + pack x19, x6, x16 # perform operation + 80004aa8: 090349b3 pack x19,x6,x16 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004aac: 000bb203 ld x4,0(x23) + 80004ab0: 01320c63 beq x4,x19,80004ac8 + 80004ab4: 2cd022ef jal x5,80007580 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 80015c22 .word 0x80015c22 + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000000 + 80004acc: 0000b983 ld x19,0(x1) + 80004ad0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x0000000100000000 + 80004ad4: 0000b603 ld x12,0(x1) + 80004ad8: 00808093 addi x1,x1,8 + +0000000080004adc : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + pack x7, x19, x12 # perform operation + 80004adc: 08c9c3b3 pack x7,x19,x12 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004ae0: 000bb203 ld x4,0(x23) + 80004ae4: 00720c63 beq x4,x7,80004afc + 80004ae8: 299022ef jal x5,80007580 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 80015c82 .word 0x80015c82 + 80004af8: 00000000 .word 0x00000000 + 80004afc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000100000000 + 80004b00: 0000ba83 ld x21,0(x1) + 80004b04: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000100000001 + 80004b08: 0000b103 ld x2,0(x1) + 80004b0c: 00808093 addi x1,x1,8 + +0000000080004b10 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + pack x19, x21, x2 # perform operation + 80004b10: 082ac9b3 pack x19,x21,x2 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b14: 000bb203 ld x4,0(x23) + 80004b18: 01320c63 beq x4,x19,80004b30 + 80004b1c: 265022ef jal x5,80007580 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 80015ce3 .word 0x80015ce3 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x0000000100000001 + 80004b34: 0000ba03 ld x20,0(x1) + 80004b38: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x0000000000000000 + 80004b3c: 0000b703 ld x14,0(x1) + 80004b40: 00808093 addi x1,x1,8 + +0000000080004b44 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + pack x13, x20, x14 # perform operation + 80004b44: 08ea46b3 pack x13,x20,x14 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b48: 000bb203 ld x4,0(x23) + 80004b4c: 00d20c63 beq x4,x13,80004b64 + 80004b50: 231022ef jal x5,80007580 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 80015d44 .word 0x80015d44 + 80004b60: 00000000 .word 0x00000000 + 80004b64: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0x0000000100000001 + 80004b68: 0000b383 ld x7,0(x1) + 80004b6c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x0000000000000001 + 80004b70: 0000b103 ld x2,0(x1) + 80004b74: 00808093 addi x1,x1,8 + +0000000080004b78 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + pack x18, x7, x2 # perform operation + 80004b78: 0823c933 pack x18,x7,x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004b7c: 000bb203 ld x4,0(x23) + 80004b80: 01220c63 beq x4,x18,80004b98 + 80004b84: 1fd022ef jal x5,80007580 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 80015d9d .word 0x80015d9d + 80004b94: 00000000 .word 0x00000000 + 80004b98: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x0000000100000001 + 80004b9c: 0000be03 ld x28,0(x1) + 80004ba0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x0000000000000002 + 80004ba4: 0000bd83 ld x27,0(x1) + 80004ba8: 00808093 addi x1,x1,8 + +0000000080004bac : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + pack x30, x28, x27 # perform operation + 80004bac: 09be4f33 pack x30,x28,x27 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bb0: 000bb203 ld x4,0(x23) + 80004bb4: 01e20c63 beq x4,x30,80004bcc + 80004bb8: 1c9022ef jal x5,80007580 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 80015df6 .word 0x80015df6 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x0000000100000001 + 80004bd0: 0000b883 ld x17,0(x1) + 80004bd4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x8000000000000000 + 80004bd8: 0000be03 ld x28,0(x1) + 80004bdc: 00808093 addi x1,x1,8 + +0000000080004be0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + pack x29, x17, x28 # perform operation + 80004be0: 09c8ceb3 pack x29,x17,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004be4: 000bb203 ld x4,0(x23) + 80004be8: 01d20c63 beq x4,x29,80004c00 + 80004bec: 195022ef jal x5,80007580 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 80015e4f .word 0x80015e4f + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000100000001 + 80004c04: 0000ba83 ld x21,0(x1) + 80004c08: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x8000000000000001 + 80004c0c: 0000b703 ld x14,0(x1) + 80004c10: 00808093 addi x1,x1,8 + +0000000080004c14 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + pack x2, x21, x14 # perform operation + 80004c14: 08eac133 pack x2,x21,x14 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c18: 000bb203 ld x4,0(x23) + 80004c1c: 00220c63 beq x4,x2,80004c34 + 80004c20: 161022ef jal x5,80007580 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 80015eb7 .word 0x80015eb7 + 80004c30: 00000000 .word 0x00000000 + 80004c34: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x0000000100000001 + 80004c38: 0000b783 ld x15,0(x1) + 80004c3c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs2: x6 = 0x7fffffffffffffff + 80004c40: 0000b303 ld x6,0(x1) + 80004c44: 00808093 addi x1,x1,8 + +0000000080004c48 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + pack x27, x15, x6 # perform operation + 80004c48: 0867cdb3 pack x27,x15,x6 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c4c: 000bb203 ld x4,0(x23) + 80004c50: 01b20c63 beq x4,x27,80004c68 + 80004c54: 12d022ef jal x5,80007580 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 80015f1f .word 0x80015f1f + 80004c64: 00000000 .word 0x00000000 + 80004c68: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x0000000100000001 + 80004c6c: 0000bf83 ld x31,0(x1) + 80004c70: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80004c74: 0000bf03 ld x30,0(x1) + 80004c78: 00808093 addi x1,x1,8 + +0000000080004c7c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + pack x29, x31, x30 # perform operation + 80004c7c: 09efceb3 pack x29,x31,x30 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004c80: 000bb203 ld x4,0(x23) + 80004c84: 01d20c63 beq x4,x29,80004c9c + 80004c88: 0f9022ef jal x5,80007580 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 80015f87 .word 0x80015f87 + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000100000001 + 80004ca0: 0000ba83 ld x21,0(x1) + 80004ca4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xffffffffffffffff + 80004ca8: 0000bf83 ld x31,0(x1) + 80004cac: 00808093 addi x1,x1,8 + +0000000080004cb0 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + pack x2, x21, x31 # perform operation + 80004cb0: 09fac133 pack x2,x21,x31 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cb4: 000bb203 ld x4,0(x23) + 80004cb8: 00220c63 beq x4,x2,80004cd0 + 80004cbc: 0c5022ef jal x5,80007580 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 80015fef .word 0x80015fef + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000100000001 + 80004cd4: 0000b483 ld x9,0(x1) + 80004cd8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xfffffffffffffffe + 80004cdc: 0000b903 ld x18,0(x1) + 80004ce0: 00808093 addi x1,x1,8 + +0000000080004ce4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + pack x2, x9, x18 # perform operation + 80004ce4: 0924c133 pack x2,x9,x18 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004ce8: 000bb203 ld x4,0(x23) + 80004cec: 00220c63 beq x4,x2,80004d04 + 80004cf0: 091022ef jal x5,80007580 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 80016057 .word 0x80016057 + 80004d00: 00000000 .word 0x00000000 + 80004d04: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x0000000100000001 + 80004d08: 0000bd83 ld x27,0(x1) + 80004d0c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80004d10: 0000bf83 ld x31,0(x1) + 80004d14: 00808093 addi x1,x1,8 + +0000000080004d18 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + pack x15, x27, x31 # perform operation + 80004d18: 09fdc7b3 pack x15,x27,x31 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d1c: 000bb203 ld x4,0(x23) + 80004d20: 00f20c63 beq x4,x15,80004d38 + 80004d24: 05d022ef jal x5,80007580 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 800160bf .word 0x800160bf + 80004d34: 00000000 .word 0x00000000 + 80004d38: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x0000000100000001 + 80004d3c: 0000b683 ld x13,0(x1) + 80004d40: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80004d44: 0000b883 ld x17,0(x1) + 80004d48: 00808093 addi x1,x1,8 + +0000000080004d4c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + pack x6, x13, x17 # perform operation + 80004d4c: 0916c333 pack x6,x13,x17 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d50: 000bb203 ld x4,0(x23) + 80004d54: 00620c63 beq x4,x6,80004d6c + 80004d58: 029022ef jal x5,80007580 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 80016127 .word 0x80016127 + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x0000000100000001 + 80004d70: 0000b103 ld x2,0(x1) + 80004d74: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x5555555555555555 + 80004d78: 0000be83 ld x29,0(x1) + 80004d7c: 00808093 addi x1,x1,8 + +0000000080004d80 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + pack x6, x2, x29 # perform operation + 80004d80: 09d14333 pack x6,x2,x29 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004d84: 000bb203 ld x4,0(x23) + 80004d88: 00620c63 beq x4,x6,80004da0 + 80004d8c: 7f4022ef jal x5,80007580 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 8001618f .word 0x8001618f + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x0000000100000001 + 80004da4: 0000b403 ld x8,0(x1) + 80004da8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x00000000ffffffff + 80004dac: 0000b683 ld x13,0(x1) + 80004db0: 00808093 addi x1,x1,8 + +0000000080004db4 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + pack x2, x8, x13 # perform operation + 80004db4: 08d44133 pack x2,x8,x13 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004db8: 000bb203 ld x4,0(x23) + 80004dbc: 00220c63 beq x4,x2,80004dd4 + 80004dc0: 7c0022ef jal x5,80007580 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 800161f7 .word 0x800161f7 + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x0000000100000001 + 80004dd8: 0000b803 ld x16,0(x1) + 80004ddc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs2: x7 = 0x00000000fffffffe + 80004de0: 0000b383 ld x7,0(x1) + 80004de4: 00808093 addi x1,x1,8 + +0000000080004de8 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + pack x19, x16, x7 # perform operation + 80004de8: 087849b3 pack x19,x16,x7 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004dec: 000bb203 ld x4,0(x23) + 80004df0: 01320c63 beq x4,x19,80004e08 + 80004df4: 78c022ef jal x5,80007580 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 80016257 .word 0x80016257 + 80004e04: 00000000 .word 0x00000000 + 80004e08: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x0000000100000001 + 80004e0c: 0000bc03 ld x24,0(x1) + 80004e10: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x0000000100000000 + 80004e14: 0000be03 ld x28,0(x1) + 80004e18: 00808093 addi x1,x1,8 + +0000000080004e1c : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + pack x26, x24, x28 # perform operation + 80004e1c: 09cc4d33 pack x26,x24,x28 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e20: 000bb203 ld x4,0(x23) + 80004e24: 01a20c63 beq x4,x26,80004e3c + 80004e28: 758022ef jal x5,80007580 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 800162b7 .word 0x800162b7 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x0000000100000001 + 80004e40: 0000b483 ld x9,0(x1) + 80004e44: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x0000000100000001 + 80004e48: 0000be83 ld x29,0(x1) + 80004e4c: 00808093 addi x1,x1,8 + +0000000080004e50 : +Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + pack x27, x9, x29 # perform operation + 80004e50: 09d4cdb3 pack x27,x9,x29 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_pack_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e54: 000bb203 ld x4,0(x23) + 80004e58: 01b20c63 beq x4,x27,80004e70 + 80004e5c: 724022ef jal x5,80007580 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 80016318 .word 0x80016318 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 008b8b93 addi x23,x23,8 + +///////////////////////////////// +// cmp_rs1_rs2_nx0 +///////////////////////////////// + + mv x6, x1 # switch data pointer register to avoid conflict with test + 80004e74: 00008313 addi x6,x1,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x4ee05951077e9801 + 80004e78: 00033083 ld x1,0(x6) + 80004e7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x427756ba0fba316e + 80004e80: 00033083 ld x1,0(x6) + 80004e84: 00830313 addi x6,x6,8 + +0000000080004e88 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1: + pack x15, x1, x1 # perform operation + 80004e88: 0810c7b3 pack x15,x1,x1 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b1_str) + 80004e8c: 000bb203 ld x4,0(x23) + 80004e90: 00f20c63 beq x4,x15,80004ea8 + 80004e94: 6ec022ef jal x5,80007580 + 80004e98: 80004e88 .word 0x80004e88 + 80004e9c: 00000000 .word 0x00000000 + 80004ea0: 80016379 .word 0x80016379 + 80004ea4: 00000000 .word 0x00000000 + 80004ea8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x88502fdeae233f82 + 80004eac: 00033103 ld x2,0(x6) + 80004eb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x64a9959fd5f32758 + 80004eb4: 00033103 ld x2,0(x6) + 80004eb8: 00830313 addi x6,x6,8 + +0000000080004ebc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2: + pack x3, x2, x2 # perform operation + 80004ebc: 082141b3 pack x3,x2,x2 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b2_str) + 80004ec0: 000bb203 ld x4,0(x23) + 80004ec4: 00320c63 beq x4,x3,80004edc + 80004ec8: 6b8022ef jal x5,80007580 + 80004ecc: 80004ebc .word 0x80004ebc + 80004ed0: 00000000 .word 0x00000000 + 80004ed4: 800163b5 .word 0x800163b5 + 80004ed8: 00000000 .word 0x00000000 + 80004edc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xd5adb355bfd86f2f + 80004ee0: 00033183 ld x3,0(x6) + 80004ee4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xfe281adcd93649cb + 80004ee8: 00033183 ld x3,0(x6) + 80004eec: 00830313 addi x6,x6,8 + +0000000080004ef0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3: + pack x13, x3, x3 # perform operation + 80004ef0: 0831c6b3 pack x13,x3,x3 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b3_str) + 80004ef4: 000bb203 ld x4,0(x23) + 80004ef8: 00d20c63 beq x4,x13,80004f10 + 80004efc: 684022ef jal x5,80007580 + 80004f00: 80004ef0 .word 0x80004ef0 + 80004f04: 00000000 .word 0x00000000 + 80004f08: 800163f1 .word 0x800163f1 + 80004f0c: 00000000 .word 0x00000000 + 80004f10: 008b8b93 addi x23,x23,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80004f14: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80004f18: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x4e9a53309a4b4bb7 + 80004f1c: 00033203 ld x4,0(x6) + 80004f20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x0d3ffe7cd04d4a0f + 80004f24: 00033203 ld x4,0(x6) + 80004f28: 00830313 addi x6,x6,8 + +0000000080004f2c : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4: + pack x19, x4, x4 # perform operation + 80004f2c: 084249b3 pack x19,x4,x4 + # Check if x19 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x19, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b4_str) + 80004f30: 000bb683 ld x13,0(x23) + 80004f34: 01368c63 beq x13,x19,80004f4c + 80004f38: 6880276f jal x14,800075c0 + 80004f3c: 80004f2c .word 0x80004f2c + 80004f40: 00000000 .word 0x00000000 + 80004f44: 8001642d .word 0x8001642d + 80004f48: 00000000 .word 0x00000000 + 80004f4c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x3ee7c984d3c1b263 + 80004f50: 00033283 ld x5,0(x6) + 80004f54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x738ebb1fa9dd2208 + 80004f58: 00033283 ld x5,0(x6) + 80004f5c: 00830313 addi x6,x6,8 + +0000000080004f60 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5: + pack x30, x5, x5 # perform operation + 80004f60: 0852cf33 pack x30,x5,x5 + # Check if x30 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x30, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b5_str) + 80004f64: 000bb683 ld x13,0(x23) + 80004f68: 01e68c63 beq x13,x30,80004f80 + 80004f6c: 6540276f jal x14,800075c0 + 80004f70: 80004f60 .word 0x80004f60 + 80004f74: 00000000 .word 0x00000000 + 80004f78: 80016469 .word 0x80016469 + 80004f7c: 00000000 .word 0x00000000 + 80004f80: 008b8b93 addi x23,x23,8 + + mv x10, x6 # switch data pointer register to avoid conflict with test + 80004f84: 00030513 addi x10,x6,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xbecd46d63b280820 + 80004f88: 00053303 ld x6,0(x10) + 80004f8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x60327ed2dc0b73d0 + 80004f90: 00053303 ld x6,0(x10) + 80004f94: 00850513 addi x10,x10,8 + +0000000080004f98 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6: + pack x15, x6, x6 # perform operation + 80004f98: 086347b3 pack x15,x6,x6 + # Check if x15 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x15, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b6_str) + 80004f9c: 000bb683 ld x13,0(x23) + 80004fa0: 00f68c63 beq x13,x15,80004fb8 + 80004fa4: 61c0276f jal x14,800075c0 + 80004fa8: 80004f98 .word 0x80004f98 + 80004fac: 00000000 .word 0x00000000 + 80004fb0: 800164a5 .word 0x800164a5 + 80004fb4: 00000000 .word 0x00000000 + 80004fb8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xf37cd5252a45989e + 80004fbc: 00053383 ld x7,0(x10) + 80004fc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x9ab100d6d16d97a2 + 80004fc4: 00053383 ld x7,0(x10) + 80004fc8: 00850513 addi x10,x10,8 + +0000000080004fcc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7: + pack x4, x7, x7 # perform operation + 80004fcc: 0873c233 pack x4,x7,x7 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b7_str) + 80004fd0: 000bb683 ld x13,0(x23) + 80004fd4: 00468c63 beq x13,x4,80004fec + 80004fd8: 5e80276f jal x14,800075c0 + 80004fdc: 80004fcc .word 0x80004fcc + 80004fe0: 00000000 .word 0x00000000 + 80004fe4: 800164e1 .word 0x800164e1 + 80004fe8: 00000000 .word 0x00000000 + 80004fec: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xd5e61ba1dc71ee62 + 80004ff0: 00053403 ld x8,0(x10) + 80004ff4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xac5887612c23dce5 + 80004ff8: 00053403 ld x8,0(x10) + 80004ffc: 00850513 addi x10,x10,8 + +0000000080005000 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8: + pack x16, x8, x8 # perform operation + 80005000: 08844833 pack x16,x8,x8 + # Check if x16 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b8_str) + 80005004: 000bb683 ld x13,0(x23) + 80005008: 01068c63 beq x13,x16,80005020 + 8000500c: 5b40276f jal x14,800075c0 + 80005010: 80005000 .word 0x80005000 + 80005014: 00000000 .word 0x00000000 + 80005018: 8001651d .word 0x8001651d + 8000501c: 00000000 .word 0x00000000 + 80005020: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x66c27428acc89947 + 80005024: 00053483 ld x9,0(x10) + 80005028: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x5a6757c2526d2cd4 + 8000502c: 00053483 ld x9,0(x10) + 80005030: 00850513 addi x10,x10,8 + +0000000080005034 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9: + pack x2, x9, x9 # perform operation + 80005034: 0894c133 pack x2,x9,x9 + # Check if x2 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x2, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b9_str) + 80005038: 000bb683 ld x13,0(x23) + 8000503c: 00268c63 beq x13,x2,80005054 + 80005040: 5800276f jal x14,800075c0 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 80016559 .word 0x80016559 + 80005050: 00000000 .word 0x00000000 + 80005054: 008b8b93 addi x23,x23,8 + + mv x20, x10 # switch data pointer register to avoid conflict with test + 80005058: 00050a13 addi x20,x10,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xfc6b90a7bd9687cf + 8000505c: 000a3503 ld x10,0(x20) + 80005060: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xfcc6b8debb405439 + 80005064: 000a3503 ld x10,0(x20) + 80005068: 008a0a13 addi x20,x20,8 + +000000008000506c : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10: + pack x3, x10, x10 # perform operation + 8000506c: 08a541b3 pack x3,x10,x10 + # Check if x3 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b10_str) + 80005070: 000bb683 ld x13,0(x23) + 80005074: 00368c63 beq x13,x3,8000508c + 80005078: 5480276f jal x14,800075c0 + 8000507c: 8000506c .word 0x8000506c + 80005080: 00000000 .word 0x00000000 + 80005084: 80016595 .word 0x80016595 + 80005088: 00000000 .word 0x00000000 + 8000508c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x9e1dd9ab63f3156b + 80005090: 000a3583 ld x11,0(x20) + 80005094: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x8fcecf63adf568d9 + 80005098: 000a3583 ld x11,0(x20) + 8000509c: 008a0a13 addi x20,x20,8 + +00000000800050a0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11: + pack x26, x11, x11 # perform operation + 800050a0: 08b5cd33 pack x26,x11,x11 + # Check if x26 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x26, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b11_str) + 800050a4: 000bb683 ld x13,0(x23) + 800050a8: 01a68c63 beq x13,x26,800050c0 + 800050ac: 5140276f jal x14,800075c0 + 800050b0: 800050a0 .word 0x800050a0 + 800050b4: 00000000 .word 0x00000000 + 800050b8: 800165d2 .word 0x800165d2 + 800050bc: 00000000 .word 0x00000000 + 800050c0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x1c3ff8c337d48c90 + 800050c4: 000a3603 ld x12,0(x20) + 800050c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x53b9cd9e8fa51a96 + 800050cc: 000a3603 ld x12,0(x20) + 800050d0: 008a0a13 addi x20,x20,8 + +00000000800050d4 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12: + pack x27, x12, x12 # perform operation + 800050d4: 08c64db3 pack x27,x12,x12 + # Check if x27 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x27, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b12_str) + 800050d8: 000bb683 ld x13,0(x23) + 800050dc: 01b68c63 beq x13,x27,800050f4 + 800050e0: 4e00276f jal x14,800075c0 + 800050e4: 800050d4 .word 0x800050d4 + 800050e8: 00000000 .word 0x00000000 + 800050ec: 8001660f .word 0x8001660f + 800050f0: 00000000 .word 0x00000000 + 800050f4: 008b8b93 addi x23,x23,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800050f8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800050fc: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x812116b5e6118742 + 80005100: 000a3683 ld x13,0(x20) + 80005104: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xf4caa51ea8cd0384 + 80005108: 000a3683 ld x13,0(x20) + 8000510c: 008a0a13 addi x20,x20,8 + +0000000080005110 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13: + pack x2, x13, x13 # perform operation + 80005110: 08d6c133 pack x2,x13,x13 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b13_str) + 80005114: 000bb203 ld x4,0(x23) + 80005118: 00220c63 beq x4,x2,80005130 + 8000511c: 464022ef jal x5,80007580 + 80005120: 80005110 .word 0x80005110 + 80005124: 00000000 .word 0x00000000 + 80005128: 8001664c .word 0x8001664c + 8000512c: 00000000 .word 0x00000000 + 80005130: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xcee1be240713d7a4 + 80005134: 000a3703 ld x14,0(x20) + 80005138: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xc947208136f819aa + 8000513c: 000a3703 ld x14,0(x20) + 80005140: 008a0a13 addi x20,x20,8 + +0000000080005144 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14: + pack x1, x14, x14 # perform operation + 80005144: 08e740b3 pack x1,x14,x14 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b14_str) + 80005148: 000bb203 ld x4,0(x23) + 8000514c: 00120c63 beq x4,x1,80005164 + 80005150: 430022ef jal x5,80007580 + 80005154: 80005144 .word 0x80005144 + 80005158: 00000000 .word 0x00000000 + 8000515c: 80016689 .word 0x80016689 + 80005160: 00000000 .word 0x00000000 + 80005164: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xc4816666f4a0d1b7 + 80005168: 000a3783 ld x15,0(x20) + 8000516c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x86f58e79da2041ba + 80005170: 000a3783 ld x15,0(x20) + 80005174: 008a0a13 addi x20,x20,8 + +0000000080005178 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15: + pack x3, x15, x15 # perform operation + 80005178: 08f7c1b3 pack x3,x15,x15 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b15_str) + 8000517c: 000bb203 ld x4,0(x23) + 80005180: 00320c63 beq x4,x3,80005198 + 80005184: 3fc022ef jal x5,80007580 + 80005188: 80005178 .word 0x80005178 + 8000518c: 00000000 .word 0x00000000 + 80005190: 800166c6 .word 0x800166c6 + 80005194: 00000000 .word 0x00000000 + 80005198: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x7592959321a6919a + 8000519c: 000a3803 ld x16,0(x20) + 800051a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x64107f16235c3d38 + 800051a4: 000a3803 ld x16,0(x20) + 800051a8: 008a0a13 addi x20,x20,8 + +00000000800051ac : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16: + pack x29, x16, x16 # perform operation + 800051ac: 09084eb3 pack x29,x16,x16 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b16_str) + 800051b0: 000bb203 ld x4,0(x23) + 800051b4: 01d20c63 beq x4,x29,800051cc + 800051b8: 3c8022ef jal x5,80007580 + 800051bc: 800051ac .word 0x800051ac + 800051c0: 00000000 .word 0x00000000 + 800051c4: 80016703 .word 0x80016703 + 800051c8: 00000000 .word 0x00000000 + 800051cc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x6b8cee2d33b80896 + 800051d0: 000a3883 ld x17,0(x20) + 800051d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x3776f244651fbbb2 + 800051d8: 000a3883 ld x17,0(x20) + 800051dc: 008a0a13 addi x20,x20,8 + +00000000800051e0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17: + pack x26, x17, x17 # perform operation + 800051e0: 0918cd33 pack x26,x17,x17 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b17_str) + 800051e4: 000bb203 ld x4,0(x23) + 800051e8: 01a20c63 beq x4,x26,80005200 + 800051ec: 394022ef jal x5,80007580 + 800051f0: 800051e0 .word 0x800051e0 + 800051f4: 00000000 .word 0x00000000 + 800051f8: 80016740 .word 0x80016740 + 800051fc: 00000000 .word 0x00000000 + 80005200: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x717f71ddf4a086f6 + 80005204: 000a3903 ld x18,0(x20) + 80005208: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xa804282a2186e040 + 8000520c: 000a3903 ld x18,0(x20) + 80005210: 008a0a13 addi x20,x20,8 + +0000000080005214 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18: + pack x11, x18, x18 # perform operation + 80005214: 092945b3 pack x11,x18,x18 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b18_str) + 80005218: 000bb203 ld x4,0(x23) + 8000521c: 00b20c63 beq x4,x11,80005234 + 80005220: 360022ef jal x5,80007580 + 80005224: 80005214 .word 0x80005214 + 80005228: 00000000 .word 0x00000000 + 8000522c: 8001677d .word 0x8001677d + 80005230: 00000000 .word 0x00000000 + 80005234: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x3415b708009cf59f + 80005238: 000a3983 ld x19,0(x20) + 8000523c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x6823c8b3bb48c61a + 80005240: 000a3983 ld x19,0(x20) + 80005244: 008a0a13 addi x20,x20,8 + +0000000080005248 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19: + pack x2, x19, x19 # perform operation + 80005248: 0939c133 pack x2,x19,x19 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b19_str) + 8000524c: 000bb203 ld x4,0(x23) + 80005250: 00220c63 beq x4,x2,80005268 + 80005254: 32c022ef jal x5,80007580 + 80005258: 80005248 .word 0x80005248 + 8000525c: 00000000 .word 0x00000000 + 80005260: 800167ba .word 0x800167ba + 80005264: 00000000 .word 0x00000000 + 80005268: 008b8b93 addi x23,x23,8 + + mv x15, x20 # switch data pointer register to avoid conflict with test + 8000526c: 000a0793 addi x15,x20,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xf27689e76440f856 + 80005270: 0007ba03 ld x20,0(x15) + 80005274: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x416800ca00af889e + 80005278: 0007ba03 ld x20,0(x15) + 8000527c: 00878793 addi x15,x15,8 + +0000000080005280 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20: + pack x18, x20, x20 # perform operation + 80005280: 094a4933 pack x18,x20,x20 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b20_str) + 80005284: 000bb203 ld x4,0(x23) + 80005288: 01220c63 beq x4,x18,800052a0 + 8000528c: 2f4022ef jal x5,80007580 + 80005290: 80005280 .word 0x80005280 + 80005294: 00000000 .word 0x00000000 + 80005298: 800167f7 .word 0x800167f7 + 8000529c: 00000000 .word 0x00000000 + 800052a0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x46463b8368116a78 + 800052a4: 0007ba83 ld x21,0(x15) + 800052a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x8a3a3fa6842c0cff + 800052ac: 0007ba83 ld x21,0(x15) + 800052b0: 00878793 addi x15,x15,8 + +00000000800052b4 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21: + pack x16, x21, x21 # perform operation + 800052b4: 095ac833 pack x16,x21,x21 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b21_str) + 800052b8: 000bb203 ld x4,0(x23) + 800052bc: 01020c63 beq x4,x16,800052d4 + 800052c0: 2c0022ef jal x5,80007580 + 800052c4: 800052b4 .word 0x800052b4 + 800052c8: 00000000 .word 0x00000000 + 800052cc: 80016834 .word 0x80016834 + 800052d0: 00000000 .word 0x00000000 + 800052d4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x6c0d3ea96d0b07d9 + 800052d8: 0007bb03 ld x22,0(x15) + 800052dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xc70b111096a99731 + 800052e0: 0007bb03 ld x22,0(x15) + 800052e4: 00878793 addi x15,x15,8 + +00000000800052e8 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22: + pack x19, x22, x22 # perform operation + 800052e8: 096b49b3 pack x19,x22,x22 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b22_str) + 800052ec: 000bb203 ld x4,0(x23) + 800052f0: 01320c63 beq x4,x19,80005308 + 800052f4: 28c022ef jal x5,80007580 + 800052f8: 800052e8 .word 0x800052e8 + 800052fc: 00000000 .word 0x00000000 + 80005300: 80016871 .word 0x80016871 + 80005304: 00000000 .word 0x00000000 + 80005308: 008b8b93 addi x23,x23,8 + + mv x25, x23 # switch signature pointer register to avoid conflict with test + 8000530c: 000b8c93 addi x25,x23,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x373b23c038cd082d + 80005310: 0007bb83 ld x23,0(x15) + 80005314: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x5f5a492065a55d84 + 80005318: 0007bb83 ld x23,0(x15) + 8000531c: 00878793 addi x15,x15,8 + +0000000080005320 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23: + pack x14, x23, x23 # perform operation + 80005320: 097bc733 pack x14,x23,x23 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b23_str) + 80005324: 000cb203 ld x4,0(x25) + 80005328: 00e20c63 beq x4,x14,80005340 + 8000532c: 254022ef jal x5,80007580 + 80005330: 80005320 .word 0x80005320 + 80005334: 00000000 .word 0x00000000 + 80005338: 800168ae .word 0x800168ae + 8000533c: 00000000 .word 0x00000000 + 80005340: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xd72c84b0cac35f81 + 80005344: 0007bc03 ld x24,0(x15) + 80005348: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xed4dd1e9cca900bf + 8000534c: 0007bc03 ld x24,0(x15) + 80005350: 00878793 addi x15,x15,8 + +0000000080005354 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24: + pack x22, x24, x24 # perform operation + 80005354: 098c4b33 pack x22,x24,x24 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b24_str) + 80005358: 000cb203 ld x4,0(x25) + 8000535c: 01620c63 beq x4,x22,80005374 + 80005360: 220022ef jal x5,80007580 + 80005364: 80005354 .word 0x80005354 + 80005368: 00000000 .word 0x00000000 + 8000536c: 800168eb .word 0x800168eb + 80005370: 00000000 .word 0x00000000 + 80005374: 008c8c93 addi x25,x25,8 + + mv x28, x25 # switch signature pointer register to avoid conflict with test + 80005378: 000c8e13 addi x28,x25,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x79b6c4bb57151df5 + 8000537c: 0007bc83 ld x25,0(x15) + 80005380: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x84ea1c888160e326 + 80005384: 0007bc83 ld x25,0(x15) + 80005388: 00878793 addi x15,x15,8 + +000000008000538c : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25: + pack x1, x25, x25 # perform operation + 8000538c: 099cc0b3 pack x1,x25,x25 + # Check if x1 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x1, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b25_str) + 80005390: 000e3203 ld x4,0(x28) + 80005394: 00120c63 beq x4,x1,800053ac + 80005398: 1e8022ef jal x5,80007580 + 8000539c: 8000538c .word 0x8000538c + 800053a0: 00000000 .word 0x00000000 + 800053a4: 80016928 .word 0x80016928 + 800053a8: 00000000 .word 0x00000000 + 800053ac: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x308dbdd2ad68a029 + 800053b0: 0007bd03 ld x26,0(x15) + 800053b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xa820cbea4e273d3a + 800053b8: 0007bd03 ld x26,0(x15) + 800053bc: 00878793 addi x15,x15,8 + +00000000800053c0 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26: + pack x18, x26, x26 # perform operation + 800053c0: 09ad4933 pack x18,x26,x26 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b26_str) + 800053c4: 000e3203 ld x4,0(x28) + 800053c8: 01220c63 beq x4,x18,800053e0 + 800053cc: 1b4022ef jal x5,80007580 + 800053d0: 800053c0 .word 0x800053c0 + 800053d4: 00000000 .word 0x00000000 + 800053d8: 80016965 .word 0x80016965 + 800053dc: 00000000 .word 0x00000000 + 800053e0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x2725245f09d0f931 + 800053e4: 0007bd83 ld x27,0(x15) + 800053e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x6f2a0517dff96466 + 800053ec: 0007bd83 ld x27,0(x15) + 800053f0: 00878793 addi x15,x15,8 + +00000000800053f4 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27: + pack x12, x27, x27 # perform operation + 800053f4: 09bdc633 pack x12,x27,x27 + # Check if x12 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x12, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b27_str) + 800053f8: 000e3203 ld x4,0(x28) + 800053fc: 00c20c63 beq x4,x12,80005414 + 80005400: 180022ef jal x5,80007580 + 80005404: 800053f4 .word 0x800053f4 + 80005408: 00000000 .word 0x00000000 + 8000540c: 800169a2 .word 0x800169a2 + 80005410: 00000000 .word 0x00000000 + 80005414: 008e0e13 addi x28,x28,8 + + mv x29, x28 # switch signature pointer register to avoid conflict with test + 80005418: 000e0e93 addi x29,x28,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xf24451428d6a9e29 + 8000541c: 0007be03 ld x28,0(x15) + 80005420: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xe470517348aa0ddf + 80005424: 0007be03 ld x28,0(x15) + 80005428: 00878793 addi x15,x15,8 + +000000008000542c : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28: + pack x7, x28, x28 # perform operation + 8000542c: 09ce43b3 pack x7,x28,x28 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b28_str) + 80005430: 000eb203 ld x4,0(x29) + 80005434: 00720c63 beq x4,x7,8000544c + 80005438: 148022ef jal x5,80007580 + 8000543c: 8000542c .word 0x8000542c + 80005440: 00000000 .word 0x00000000 + 80005444: 800169df .word 0x800169df + 80005448: 00000000 .word 0x00000000 + 8000544c: 008e8e93 addi x29,x29,8 + + mv x23, x29 # switch signature pointer register to avoid conflict with test + 80005450: 000e8b93 addi x23,x29,0 +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xdb877831ee629bcc + 80005454: 0007be83 ld x29,0(x15) + 80005458: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x1815ae80b453f8bb + 8000545c: 0007be83 ld x29,0(x15) + 80005460: 00878793 addi x15,x15,8 + +0000000080005464 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29: + pack x6, x29, x29 # perform operation + 80005464: 09dec333 pack x6,x29,x29 + # Check if x6 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x6, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b29_str) + 80005468: 000bb203 ld x4,0(x23) + 8000546c: 00620c63 beq x4,x6,80005484 + 80005470: 110022ef jal x5,80007580 + 80005474: 80005464 .word 0x80005464 + 80005478: 00000000 .word 0x00000000 + 8000547c: 80016a1c .word 0x80016a1c + 80005480: 00000000 .word 0x00000000 + 80005484: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x60bb0c3722ecf2be + 80005488: 0007bf03 ld x30,0(x15) + 8000548c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x6a69817f09e83a6a + 80005490: 0007bf03 ld x30,0(x15) + 80005494: 00878793 addi x15,x15,8 + +0000000080005498 : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30: + pack x10, x30, x30 # perform operation + 80005498: 09ef4533 pack x10,x30,x30 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b30_str) + 8000549c: 000bb203 ld x4,0(x23) + 800054a0: 00a20c63 beq x4,x10,800054b8 + 800054a4: 0dc022ef jal x5,80007580 + 800054a8: 80005498 .word 0x80005498 + 800054ac: 00000000 .word 0x00000000 + 800054b0: 80016a59 .word 0x80016a59 + 800054b4: 00000000 .word 0x00000000 + 800054b8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2_nx0 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x605669b0e5fa8aeb + 800054bc: 0007bf83 ld x31,0(x15) + 800054c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xefe772832a2d6953 + 800054c4: 0007bf83 ld x31,0(x15) + 800054c8: 00878793 addi x15,x15,8 + +00000000800054cc : +Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31: + pack x9, x31, x31 # perform operation + 800054cc: 09ffc4b3 pack x9,x31,x31 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31, Zbkb_pack_cg_cmp_rs1_rs2_nx0_b31_str) + 800054d0: 000bb203 ld x4,0(x23) + 800054d4: 00920c63 beq x4,x9,800054ec + 800054d8: 0a8022ef jal x5,80007580 + 800054dc: 800054cc .word 0x800054cc + 800054e0: 00000000 .word 0x00000000 + 800054e4: 80016a96 .word 0x80016a96 + 800054e8: 00000000 .word 0x00000000 + 800054ec: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cmp_rd_rs2_nx0 +///////////////////////////////// + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x10787563de980e9f + 800054f0: 0007bc83 ld x25,0(x15) + 800054f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x751d709c31e7cbe6 + 800054f8: 0007b083 ld x1,0(x15) + 800054fc: 00878793 addi x15,x15,8 + +0000000080005500 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b1: + pack x1, x25, x1 # perform operation + 80005500: 081cc0b3 pack x1,x25,x1 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkb_pack_cg_cmp_rd_rs2_nx0_b1, Zbkb_pack_cg_cmp_rd_rs2_nx0_b1_str) + 80005504: 000bb203 ld x4,0(x23) + 80005508: 00120c63 beq x4,x1,80005520 + 8000550c: 074022ef jal x5,80007580 + 80005510: 80005500 .word 0x80005500 + 80005514: 00000000 .word 0x00000000 + 80005518: 80016ad3 .word 0x80016ad3 + 8000551c: 00000000 .word 0x00000000 + 80005520: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xb88e5189beefd6ae + 80005524: 0007b303 ld x6,0(x15) + 80005528: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x53109a6525357094 + 8000552c: 0007b103 ld x2,0(x15) + 80005530: 00878793 addi x15,x15,8 + +0000000080005534 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b2: + pack x2, x6, x2 # perform operation + 80005534: 08234133 pack x2,x6,x2 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkb_pack_cg_cmp_rd_rs2_nx0_b2, Zbkb_pack_cg_cmp_rd_rs2_nx0_b2_str) + 80005538: 000bb203 ld x4,0(x23) + 8000553c: 00220c63 beq x4,x2,80005554 + 80005540: 040022ef jal x5,80007580 + 80005544: 80005534 .word 0x80005534 + 80005548: 00000000 .word 0x00000000 + 8000554c: 80016b0e .word 0x80016b0e + 80005550: 00000000 .word 0x00000000 + 80005554: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x10de5044deb3ad81 + 80005558: 0007b403 ld x8,0(x15) + 8000555c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x12f5e0f73d8a4586 + 80005560: 0007b183 ld x3,0(x15) + 80005564: 00878793 addi x15,x15,8 + +0000000080005568 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b3: + pack x3, x8, x3 # perform operation + 80005568: 083441b3 pack x3,x8,x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkb_pack_cg_cmp_rd_rs2_nx0_b3, Zbkb_pack_cg_cmp_rd_rs2_nx0_b3_str) + 8000556c: 000bb203 ld x4,0(x23) + 80005570: 00320c63 beq x4,x3,80005588 + 80005574: 00c022ef jal x5,80007580 + 80005578: 80005568 .word 0x80005568 + 8000557c: 00000000 .word 0x00000000 + 80005580: 80016b49 .word 0x80016b49 + 80005584: 00000000 .word 0x00000000 + 80005588: 008b8b93 addi x23,x23,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 8000558c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005590: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x3da9203787a4643a + 80005594: 0007b603 ld x12,0(x15) + 80005598: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x141570e3e071cf65 + 8000559c: 0007b203 ld x4,0(x15) + 800055a0: 00878793 addi x15,x15,8 + +00000000800055a4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b4: + pack x4, x12, x4 # perform operation + 800055a4: 08464233 pack x4,x12,x4 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkb_pack_cg_cmp_rd_rs2_nx0_b4, Zbkb_pack_cg_cmp_rd_rs2_nx0_b4_str) + 800055a8: 000bb383 ld x7,0(x23) + 800055ac: 00438c63 beq x7,x4,800055c4 + 800055b0: 7e90146f jal x8,80007598 + 800055b4: 800055a4 .word 0x800055a4 + 800055b8: 00000000 .word 0x00000000 + 800055bc: 80016b84 .word 0x80016b84 + 800055c0: 00000000 .word 0x00000000 + 800055c4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x180512c1365c2b6e + 800055c8: 0007bb03 ld x22,0(x15) + 800055cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x5d93292f067afc76 + 800055d0: 0007b283 ld x5,0(x15) + 800055d4: 00878793 addi x15,x15,8 + +00000000800055d8 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b5: + pack x5, x22, x5 # perform operation + 800055d8: 085b42b3 pack x5,x22,x5 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkb_pack_cg_cmp_rd_rs2_nx0_b5, Zbkb_pack_cg_cmp_rd_rs2_nx0_b5_str) + 800055dc: 000bb383 ld x7,0(x23) + 800055e0: 00538c63 beq x7,x5,800055f8 + 800055e4: 7b50146f jal x8,80007598 + 800055e8: 800055d8 .word 0x800055d8 + 800055ec: 00000000 .word 0x00000000 + 800055f0: 80016bbf .word 0x80016bbf + 800055f4: 00000000 .word 0x00000000 + 800055f8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x3dae68fd834a00cb + 800055fc: 0007bd83 ld x27,0(x15) + 80005600: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x2302641c9adf2b60 + 80005604: 0007b303 ld x6,0(x15) + 80005608: 00878793 addi x15,x15,8 + +000000008000560c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b6: + pack x6, x27, x6 # perform operation + 8000560c: 086dc333 pack x6,x27,x6 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkb_pack_cg_cmp_rd_rs2_nx0_b6, Zbkb_pack_cg_cmp_rd_rs2_nx0_b6_str) + 80005610: 000bb383 ld x7,0(x23) + 80005614: 00638c63 beq x7,x6,8000562c + 80005618: 7810146f jal x8,80007598 + 8000561c: 8000560c .word 0x8000560c + 80005620: 00000000 .word 0x00000000 + 80005624: 80016bfa .word 0x80016bfa + 80005628: 00000000 .word 0x00000000 + 8000562c: 008b8b93 addi x23,x23,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005630: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005634: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xcdb0ff934b4d5157 + 80005638: 0007b683 ld x13,0(x15) + 8000563c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x3751548bd046bd28 + 80005640: 0007b383 ld x7,0(x15) + 80005644: 00878793 addi x15,x15,8 + +0000000080005648 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b7: + pack x7, x13, x7 # perform operation + 80005648: 0876c3b3 pack x7,x13,x7 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zbkb_pack_cg_cmp_rd_rs2_nx0_b7, Zbkb_pack_cg_cmp_rd_rs2_nx0_b7_str) + 8000564c: 000bb203 ld x4,0(x23) + 80005650: 00720c63 beq x4,x7,80005668 + 80005654: 72d012ef jal x5,80007580 + 80005658: 80005648 .word 0x80005648 + 8000565c: 00000000 .word 0x00000000 + 80005660: 80016c35 .word 0x80016c35 + 80005664: 00000000 .word 0x00000000 + 80005668: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x48b0cd76e8ef3161 + 8000566c: 0007b383 ld x7,0(x15) + 80005670: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xb3fa8f593794f5a8 + 80005674: 0007b403 ld x8,0(x15) + 80005678: 00878793 addi x15,x15,8 + +000000008000567c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b8: + pack x8, x7, x8 # perform operation + 8000567c: 0883c433 pack x8,x7,x8 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zbkb_pack_cg_cmp_rd_rs2_nx0_b8, Zbkb_pack_cg_cmp_rd_rs2_nx0_b8_str) + 80005680: 000bb203 ld x4,0(x23) + 80005684: 00820c63 beq x4,x8,8000569c + 80005688: 6f9012ef jal x5,80007580 + 8000568c: 8000567c .word 0x8000567c + 80005690: 00000000 .word 0x00000000 + 80005694: 80016c70 .word 0x80016c70 + 80005698: 00000000 .word 0x00000000 + 8000569c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xbbde5aaf4890772e + 800056a0: 0007b183 ld x3,0(x15) + 800056a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xae723508907fff77 + 800056a8: 0007b483 ld x9,0(x15) + 800056ac: 00878793 addi x15,x15,8 + +00000000800056b0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b9: + pack x9, x3, x9 # perform operation + 800056b0: 0891c4b3 pack x9,x3,x9 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zbkb_pack_cg_cmp_rd_rs2_nx0_b9, Zbkb_pack_cg_cmp_rd_rs2_nx0_b9_str) + 800056b4: 000bb203 ld x4,0(x23) + 800056b8: 00920c63 beq x4,x9,800056d0 + 800056bc: 6c5012ef jal x5,80007580 + 800056c0: 800056b0 .word 0x800056b0 + 800056c4: 00000000 .word 0x00000000 + 800056c8: 80016cab .word 0x80016cab + 800056cc: 00000000 .word 0x00000000 + 800056d0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xe292bdcdf35b0407 + 800056d4: 0007b383 ld x7,0(x15) + 800056d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x50f07ce1a216d61e + 800056dc: 0007b503 ld x10,0(x15) + 800056e0: 00878793 addi x15,x15,8 + +00000000800056e4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b10: + pack x10, x7, x10 # perform operation + 800056e4: 08a3c533 pack x10,x7,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_pack_cg_cmp_rd_rs2_nx0_b10, Zbkb_pack_cg_cmp_rd_rs2_nx0_b10_str) + 800056e8: 000bb203 ld x4,0(x23) + 800056ec: 00a20c63 beq x4,x10,80005704 + 800056f0: 691012ef jal x5,80007580 + 800056f4: 800056e4 .word 0x800056e4 + 800056f8: 00000000 .word 0x00000000 + 800056fc: 80016ce6 .word 0x80016ce6 + 80005700: 00000000 .word 0x00000000 + 80005704: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x2f595466fa35c86d + 80005708: 0007b003 ld x0,0(x15) + 8000570c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x65de1e3b1171f100 + 80005710: 0007b583 ld x11,0(x15) + 80005714: 00878793 addi x15,x15,8 + +0000000080005718 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b11: + pack x11, x0, x11 # perform operation + 80005718: 08b045b3 pack x11,x0,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_pack_cg_cmp_rd_rs2_nx0_b11, Zbkb_pack_cg_cmp_rd_rs2_nx0_b11_str) + 8000571c: 000bb203 ld x4,0(x23) + 80005720: 00b20c63 beq x4,x11,80005738 + 80005724: 65d012ef jal x5,80007580 + 80005728: 80005718 .word 0x80005718 + 8000572c: 00000000 .word 0x00000000 + 80005730: 80016d22 .word 0x80016d22 + 80005734: 00000000 .word 0x00000000 + 80005738: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7942a04fe6c372c7 + 8000573c: 0007ba83 ld x21,0(x15) + 80005740: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xfaec16357f20a796 + 80005744: 0007b603 ld x12,0(x15) + 80005748: 00878793 addi x15,x15,8 + +000000008000574c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b12: + pack x12, x21, x12 # perform operation + 8000574c: 08cac633 pack x12,x21,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_pack_cg_cmp_rd_rs2_nx0_b12, Zbkb_pack_cg_cmp_rd_rs2_nx0_b12_str) + 80005750: 000bb203 ld x4,0(x23) + 80005754: 00c20c63 beq x4,x12,8000576c + 80005758: 629012ef jal x5,80007580 + 8000575c: 8000574c .word 0x8000574c + 80005760: 00000000 .word 0x00000000 + 80005764: 80016d5e .word 0x80016d5e + 80005768: 00000000 .word 0x00000000 + 8000576c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0155e9adc656b7f4 + 80005770: 0007b183 ld x3,0(x15) + 80005774: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xfb9ff115f75ac1d9 + 80005778: 0007b683 ld x13,0(x15) + 8000577c: 00878793 addi x15,x15,8 + +0000000080005780 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b13: + pack x13, x3, x13 # perform operation + 80005780: 08d1c6b3 pack x13,x3,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_pack_cg_cmp_rd_rs2_nx0_b13, Zbkb_pack_cg_cmp_rd_rs2_nx0_b13_str) + 80005784: 000bb203 ld x4,0(x23) + 80005788: 00d20c63 beq x4,x13,800057a0 + 8000578c: 5f5012ef jal x5,80007580 + 80005790: 80005780 .word 0x80005780 + 80005794: 00000000 .word 0x00000000 + 80005798: 80016d9a .word 0x80016d9a + 8000579c: 00000000 .word 0x00000000 + 800057a0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xead5c49ceed776f1 + 800057a4: 0007be03 ld x28,0(x15) + 800057a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x48a0810f884b68de + 800057ac: 0007b703 ld x14,0(x15) + 800057b0: 00878793 addi x15,x15,8 + +00000000800057b4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b14: + pack x14, x28, x14 # perform operation + 800057b4: 08ee4733 pack x14,x28,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_pack_cg_cmp_rd_rs2_nx0_b14, Zbkb_pack_cg_cmp_rd_rs2_nx0_b14_str) + 800057b8: 000bb203 ld x4,0(x23) + 800057bc: 00e20c63 beq x4,x14,800057d4 + 800057c0: 5c1012ef jal x5,80007580 + 800057c4: 800057b4 .word 0x800057b4 + 800057c8: 00000000 .word 0x00000000 + 800057cc: 80016dd6 .word 0x80016dd6 + 800057d0: 00000000 .word 0x00000000 + 800057d4: 008b8b93 addi x23,x23,8 + + mv x18, x15 # switch data pointer register to avoid conflict with test + 800057d8: 00078913 addi x18,x15,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0xc485ec0d081d0849 + 800057dc: 00093a83 ld x21,0(x18) + 800057e0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x5c59114fce80680b + 800057e4: 00093783 ld x15,0(x18) + 800057e8: 00890913 addi x18,x18,8 + +00000000800057ec : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b15: + pack x15, x21, x15 # perform operation + 800057ec: 08fac7b3 pack x15,x21,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_pack_cg_cmp_rd_rs2_nx0_b15, Zbkb_pack_cg_cmp_rd_rs2_nx0_b15_str) + 800057f0: 000bb203 ld x4,0(x23) + 800057f4: 00f20c63 beq x4,x15,8000580c + 800057f8: 589012ef jal x5,80007580 + 800057fc: 800057ec .word 0x800057ec + 80005800: 00000000 .word 0x00000000 + 80005804: 80016e12 .word 0x80016e12 + 80005808: 00000000 .word 0x00000000 + 8000580c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x95a74ddd7ca2b5b6 + 80005810: 00093a83 ld x21,0(x18) + 80005814: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x8284abffdbf103d6 + 80005818: 00093803 ld x16,0(x18) + 8000581c: 00890913 addi x18,x18,8 + +0000000080005820 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b16: + pack x16, x21, x16 # perform operation + 80005820: 090ac833 pack x16,x21,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_pack_cg_cmp_rd_rs2_nx0_b16, Zbkb_pack_cg_cmp_rd_rs2_nx0_b16_str) + 80005824: 000bb203 ld x4,0(x23) + 80005828: 01020c63 beq x4,x16,80005840 + 8000582c: 555012ef jal x5,80007580 + 80005830: 80005820 .word 0x80005820 + 80005834: 00000000 .word 0x00000000 + 80005838: 80016e4e .word 0x80016e4e + 8000583c: 00000000 .word 0x00000000 + 80005840: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x91f9c68c36e1d7d9 + 80005844: 00093c83 ld x25,0(x18) + 80005848: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xe47024c4119a5314 + 8000584c: 00093883 ld x17,0(x18) + 80005850: 00890913 addi x18,x18,8 + +0000000080005854 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b17: + pack x17, x25, x17 # perform operation + 80005854: 091cc8b3 pack x17,x25,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_pack_cg_cmp_rd_rs2_nx0_b17, Zbkb_pack_cg_cmp_rd_rs2_nx0_b17_str) + 80005858: 000bb203 ld x4,0(x23) + 8000585c: 01120c63 beq x4,x17,80005874 + 80005860: 521012ef jal x5,80007580 + 80005864: 80005854 .word 0x80005854 + 80005868: 00000000 .word 0x00000000 + 8000586c: 80016e8a .word 0x80016e8a + 80005870: 00000000 .word 0x00000000 + 80005874: 008b8b93 addi x23,x23,8 + + mv x27, x18 # switch data pointer register to avoid conflict with test + 80005878: 00090d93 addi x27,x18,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x4ea3fbb1ce1113de + 8000587c: 000db483 ld x9,0(x27) + 80005880: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x8a1cc7d1401cfd28 + 80005884: 000db903 ld x18,0(x27) + 80005888: 008d8d93 addi x27,x27,8 + +000000008000588c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b18: + pack x18, x9, x18 # perform operation + 8000588c: 0924c933 pack x18,x9,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_pack_cg_cmp_rd_rs2_nx0_b18, Zbkb_pack_cg_cmp_rd_rs2_nx0_b18_str) + 80005890: 000bb203 ld x4,0(x23) + 80005894: 01220c63 beq x4,x18,800058ac + 80005898: 4e9012ef jal x5,80007580 + 8000589c: 8000588c .word 0x8000588c + 800058a0: 00000000 .word 0x00000000 + 800058a4: 80016ec6 .word 0x80016ec6 + 800058a8: 00000000 .word 0x00000000 + 800058ac: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0xda486ef1a06120c9 + 800058b0: 000db703 ld x14,0(x27) + 800058b4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xed6bb99c712cdd59 + 800058b8: 000db983 ld x19,0(x27) + 800058bc: 008d8d93 addi x27,x27,8 + +00000000800058c0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b19: + pack x19, x14, x19 # perform operation + 800058c0: 093749b3 pack x19,x14,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_pack_cg_cmp_rd_rs2_nx0_b19, Zbkb_pack_cg_cmp_rd_rs2_nx0_b19_str) + 800058c4: 000bb203 ld x4,0(x23) + 800058c8: 01320c63 beq x4,x19,800058e0 + 800058cc: 4b5012ef jal x5,80007580 + 800058d0: 800058c0 .word 0x800058c0 + 800058d4: 00000000 .word 0x00000000 + 800058d8: 80016f02 .word 0x80016f02 + 800058dc: 00000000 .word 0x00000000 + 800058e0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x967ea671bdbc2285 + 800058e4: 000db103 ld x2,0(x27) + 800058e8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x37376075ecdf6c7b + 800058ec: 000dba03 ld x20,0(x27) + 800058f0: 008d8d93 addi x27,x27,8 + +00000000800058f4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b20: + pack x20, x2, x20 # perform operation + 800058f4: 09414a33 pack x20,x2,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_pack_cg_cmp_rd_rs2_nx0_b20, Zbkb_pack_cg_cmp_rd_rs2_nx0_b20_str) + 800058f8: 000bb203 ld x4,0(x23) + 800058fc: 01420c63 beq x4,x20,80005914 + 80005900: 481012ef jal x5,80007580 + 80005904: 800058f4 .word 0x800058f4 + 80005908: 00000000 .word 0x00000000 + 8000590c: 80016f3e .word 0x80016f3e + 80005910: 00000000 .word 0x00000000 + 80005914: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0x1cf868e1f3ffeb35 + 80005918: 000dbe83 ld x29,0(x27) + 8000591c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x1ff4f85e31659322 + 80005920: 000dba83 ld x21,0(x27) + 80005924: 008d8d93 addi x27,x27,8 + +0000000080005928 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b21: + pack x21, x29, x21 # perform operation + 80005928: 095ecab3 pack x21,x29,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_pack_cg_cmp_rd_rs2_nx0_b21, Zbkb_pack_cg_cmp_rd_rs2_nx0_b21_str) + 8000592c: 000bb203 ld x4,0(x23) + 80005930: 01520c63 beq x4,x21,80005948 + 80005934: 44d012ef jal x5,80007580 + 80005938: 80005928 .word 0x80005928 + 8000593c: 00000000 .word 0x00000000 + 80005940: 80016f7a .word 0x80016f7a + 80005944: 00000000 .word 0x00000000 + 80005948: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0x98997485e95f9643 + 8000594c: 000db383 ld x7,0(x27) + 80005950: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x4f911d765eefd25a + 80005954: 000dbb03 ld x22,0(x27) + 80005958: 008d8d93 addi x27,x27,8 + +000000008000595c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b22: + pack x22, x7, x22 # perform operation + 8000595c: 0963cb33 pack x22,x7,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_pack_cg_cmp_rd_rs2_nx0_b22, Zbkb_pack_cg_cmp_rd_rs2_nx0_b22_str) + 80005960: 000bb203 ld x4,0(x23) + 80005964: 01620c63 beq x4,x22,8000597c + 80005968: 419012ef jal x5,80007580 + 8000596c: 8000595c .word 0x8000595c + 80005970: 00000000 .word 0x00000000 + 80005974: 80016fb6 .word 0x80016fb6 + 80005978: 00000000 .word 0x00000000 + 8000597c: 008b8b93 addi x23,x23,8 + + mv x28, x23 # switch signature pointer register to avoid conflict with test + 80005980: 000b8e13 addi x28,x23,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0xdaed933978162573 + 80005984: 000db683 ld x13,0(x27) + 80005988: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x79a8d6beaf6ee07c + 8000598c: 000dbb83 ld x23,0(x27) + 80005990: 008d8d93 addi x27,x27,8 + +0000000080005994 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b23: + pack x23, x13, x23 # perform operation + 80005994: 0976cbb3 pack x23,x13,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zbkb_pack_cg_cmp_rd_rs2_nx0_b23, Zbkb_pack_cg_cmp_rd_rs2_nx0_b23_str) + 80005998: 000e3203 ld x4,0(x28) + 8000599c: 01720c63 beq x4,x23,800059b4 + 800059a0: 3e1012ef jal x5,80007580 + 800059a4: 80005994 .word 0x80005994 + 800059a8: 00000000 .word 0x00000000 + 800059ac: 80016ff2 .word 0x80016ff2 + 800059b0: 00000000 .word 0x00000000 + 800059b4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs1: x1 = 0x953e8996fea2a338 + 800059b8: 000db083 ld x1,0(x27) + 800059bc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x7113635b91643b7f + 800059c0: 000dbc03 ld x24,0(x27) + 800059c4: 008d8d93 addi x27,x27,8 + +00000000800059c8 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b24: + pack x24, x1, x24 # perform operation + 800059c8: 0980cc33 pack x24,x1,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zbkb_pack_cg_cmp_rd_rs2_nx0_b24, Zbkb_pack_cg_cmp_rd_rs2_nx0_b24_str) + 800059cc: 000e3203 ld x4,0(x28) + 800059d0: 01820c63 beq x4,x24,800059e8 + 800059d4: 3ad012ef jal x5,80007580 + 800059d8: 800059c8 .word 0x800059c8 + 800059dc: 00000000 .word 0x00000000 + 800059e0: 8001702e .word 0x8001702e + 800059e4: 00000000 .word 0x00000000 + 800059e8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x103b0653d645bb94 + 800059ec: 000db783 ld x15,0(x27) + 800059f0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x95c0bb614bceb145 + 800059f4: 000dbc83 ld x25,0(x27) + 800059f8: 008d8d93 addi x27,x27,8 + +00000000800059fc : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b25: + pack x25, x15, x25 # perform operation + 800059fc: 0997ccb3 pack x25,x15,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zbkb_pack_cg_cmp_rd_rs2_nx0_b25, Zbkb_pack_cg_cmp_rd_rs2_nx0_b25_str) + 80005a00: 000e3203 ld x4,0(x28) + 80005a04: 01920c63 beq x4,x25,80005a1c + 80005a08: 379012ef jal x5,80007580 + 80005a0c: 800059fc .word 0x800059fc + 80005a10: 00000000 .word 0x00000000 + 80005a14: 8001706a .word 0x8001706a + 80005a18: 00000000 .word 0x00000000 + 80005a1c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xe310731ecacc960c + 80005a20: 000dbb83 ld x23,0(x27) + 80005a24: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0xe153c1168ae512b8 + 80005a28: 000dbd03 ld x26,0(x27) + 80005a2c: 008d8d93 addi x27,x27,8 + +0000000080005a30 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b26: + pack x26, x23, x26 # perform operation + 80005a30: 09abcd33 pack x26,x23,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zbkb_pack_cg_cmp_rd_rs2_nx0_b26, Zbkb_pack_cg_cmp_rd_rs2_nx0_b26_str) + 80005a34: 000e3203 ld x4,0(x28) + 80005a38: 01a20c63 beq x4,x26,80005a50 + 80005a3c: 345012ef jal x5,80007580 + 80005a40: 80005a30 .word 0x80005a30 + 80005a44: 00000000 .word 0x00000000 + 80005a48: 800170a6 .word 0x800170a6 + 80005a4c: 00000000 .word 0x00000000 + 80005a50: 008e0e13 addi x28,x28,8 + + mv x19, x27 # switch data pointer register to avoid conflict with test + 80005a54: 000d8993 addi x19,x27,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0xa07001f5e21f7ccb + 80005a58: 0009b383 ld x7,0(x19) + 80005a5c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0x5a29e2208638f37d + 80005a60: 0009bd83 ld x27,0(x19) + 80005a64: 00898993 addi x19,x19,8 + +0000000080005a68 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b27: + pack x27, x7, x27 # perform operation + 80005a68: 09b3cdb3 pack x27,x7,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkb_pack_cg_cmp_rd_rs2_nx0_b27, Zbkb_pack_cg_cmp_rd_rs2_nx0_b27_str) + 80005a6c: 000e3203 ld x4,0(x28) + 80005a70: 01b20c63 beq x4,x27,80005a88 + 80005a74: 30d012ef jal x5,80007580 + 80005a78: 80005a68 .word 0x80005a68 + 80005a7c: 00000000 .word 0x00000000 + 80005a80: 800170e2 .word 0x800170e2 + 80005a84: 00000000 .word 0x00000000 + 80005a88: 008e0e13 addi x28,x28,8 + + mv x27, x28 # switch signature pointer register to avoid conflict with test + 80005a8c: 000e0d93 addi x27,x28,0 +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x30be0ee1d86efae4 + 80005a90: 0009bf03 ld x30,0(x19) + 80005a94: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x75225cbe4f2b1c28 + 80005a98: 0009be03 ld x28,0(x19) + 80005a9c: 00898993 addi x19,x19,8 + +0000000080005aa0 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b28: + pack x28, x30, x28 # perform operation + 80005aa0: 09cf4e33 pack x28,x30,x28 + # Check if x28 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x28, Zbkb_pack_cg_cmp_rd_rs2_nx0_b28, Zbkb_pack_cg_cmp_rd_rs2_nx0_b28_str) + 80005aa4: 000db203 ld x4,0(x27) + 80005aa8: 01c20c63 beq x4,x28,80005ac0 + 80005aac: 2d5012ef jal x5,80007580 + 80005ab0: 80005aa0 .word 0x80005aa0 + 80005ab4: 00000000 .word 0x00000000 + 80005ab8: 8001711e .word 0x8001711e + 80005abc: 00000000 .word 0x00000000 + 80005ac0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0xad6fb6d2f53dbd59 + 80005ac4: 0009b003 ld x0,0(x19) + 80005ac8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs2: x29 = 0x54fad1ed8800bcfd + 80005acc: 0009be83 ld x29,0(x19) + 80005ad0: 00898993 addi x19,x19,8 + +0000000080005ad4 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b29: + pack x29, x0, x29 # perform operation + 80005ad4: 09d04eb3 pack x29,x0,x29 + # Check if x29 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x29, Zbkb_pack_cg_cmp_rd_rs2_nx0_b29, Zbkb_pack_cg_cmp_rd_rs2_nx0_b29_str) + 80005ad8: 000db203 ld x4,0(x27) + 80005adc: 01d20c63 beq x4,x29,80005af4 + 80005ae0: 2a1012ef jal x5,80007580 + 80005ae4: 80005ad4 .word 0x80005ad4 + 80005ae8: 00000000 .word 0x00000000 + 80005aec: 8001715a .word 0x8001715a + 80005af0: 00000000 .word 0x00000000 + 80005af4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x0df88c154a12103c + 80005af8: 0009b483 ld x9,0(x19) + 80005afc: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs2: x30 = 0x866b73cf842ebdf1 + 80005b00: 0009bf03 ld x30,0(x19) + 80005b04: 00898993 addi x19,x19,8 + +0000000080005b08 : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b30: + pack x30, x9, x30 # perform operation + 80005b08: 09e4cf33 pack x30,x9,x30 + # Check if x30 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x30, Zbkb_pack_cg_cmp_rd_rs2_nx0_b30, Zbkb_pack_cg_cmp_rd_rs2_nx0_b30_str) + 80005b0c: 000db203 ld x4,0(x27) + 80005b10: 01e20c63 beq x4,x30,80005b28 + 80005b14: 26d012ef jal x5,80007580 + 80005b18: 80005b08 .word 0x80005b08 + 80005b1c: 00000000 .word 0x00000000 + 80005b20: 80017196 .word 0x80017196 + 80005b24: 00000000 .word 0x00000000 + 80005b28: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs2_nx0 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0xbc80e46e5f7426c9 + 80005b2c: 0009bc03 ld x24,0(x19) + 80005b30: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs2: x31 = 0x62a6ee902a36cac6 + 80005b34: 0009bf83 ld x31,0(x19) + 80005b38: 00898993 addi x19,x19,8 + +0000000080005b3c : +Zbkb_pack_cg_cmp_rd_rs2_nx0_b31: + pack x31, x24, x31 # perform operation + 80005b3c: 09fc4fb3 pack x31,x24,x31 + # Check if x31 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x31, Zbkb_pack_cg_cmp_rd_rs2_nx0_b31, Zbkb_pack_cg_cmp_rd_rs2_nx0_b31_str) + 80005b40: 000db203 ld x4,0(x27) + 80005b44: 01f20c63 beq x4,x31,80005b5c + 80005b48: 239012ef jal x5,80007580 + 80005b4c: 80005b3c .word 0x80005b3c + 80005b50: 00000000 .word 0x00000000 + 80005b54: 800171d2 .word 0x800171d2 + 80005b58: 00000000 .word 0x00000000 + 80005b5c: 008d8d93 addi x27,x27,8 +///////////////////////////////// +// cmp_rd_rs1_rs2_nx0 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs1: x1 = 0x2714c08cead71576 + 80005b60: 0009b083 ld x1,0(x19) + 80005b64: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0xdbad3768434e6262 + 80005b68: 0009b083 ld x1,0(x19) + 80005b6c: 00898993 addi x19,x19,8 + +0000000080005b70 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1: + pack x1, x1, x1 # perform operation + 80005b70: 0810c0b3 pack x1,x1,x1 + # Check if x1 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x1, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b1_str) + 80005b74: 000db203 ld x4,0(x27) + 80005b78: 00120c63 beq x4,x1,80005b90 + 80005b7c: 205012ef jal x5,80007580 + 80005b80: 80005b70 .word 0x80005b70 + 80005b84: 00000000 .word 0x00000000 + 80005b88: 8001720e .word 0x8001720e + 80005b8c: 00000000 .word 0x00000000 + 80005b90: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs1: x2 = 0xf043d0a5672f9cc3 + 80005b94: 0009b103 ld x2,0(x19) + 80005b98: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0xa53a8214a6ec043e + 80005b9c: 0009b103 ld x2,0(x19) + 80005ba0: 00898993 addi x19,x19,8 + +0000000080005ba4 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2: + pack x2, x2, x2 # perform operation + 80005ba4: 08214133 pack x2,x2,x2 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b2_str) + 80005ba8: 000db203 ld x4,0(x27) + 80005bac: 00220c63 beq x4,x2,80005bc4 + 80005bb0: 1d1012ef jal x5,80007580 + 80005bb4: 80005ba4 .word 0x80005ba4 + 80005bb8: 00000000 .word 0x00000000 + 80005bbc: 8001724d .word 0x8001724d + 80005bc0: 00000000 .word 0x00000000 + 80005bc4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0xf902bd3c7db2dc8f + 80005bc8: 0009b183 ld x3,0(x19) + 80005bcc: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x3ee43eeda9331e45 + 80005bd0: 0009b183 ld x3,0(x19) + 80005bd4: 00898993 addi x19,x19,8 + +0000000080005bd8 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3: + pack x3, x3, x3 # perform operation + 80005bd8: 0831c1b3 pack x3,x3,x3 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b3_str) + 80005bdc: 000db203 ld x4,0(x27) + 80005be0: 00320c63 beq x4,x3,80005bf8 + 80005be4: 19d012ef jal x5,80007580 + 80005be8: 80005bd8 .word 0x80005bd8 + 80005bec: 00000000 .word 0x00000000 + 80005bf0: 8001728c .word 0x8001728c + 80005bf4: 00000000 .word 0x00000000 + 80005bf8: 008d8d93 addi x27,x27,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005bfc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005c00: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs1: x4 = 0x058ebb136cf81b95 + 80005c04: 0009b203 ld x4,0(x19) + 80005c08: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0x983bc7f7ef4c60a0 + 80005c0c: 0009b203 ld x4,0(x19) + 80005c10: 00898993 addi x19,x19,8 + +0000000080005c14 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4: + pack x4, x4, x4 # perform operation + 80005c14: 08424233 pack x4,x4,x4 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b4_str) + 80005c18: 000db383 ld x7,0(x27) + 80005c1c: 00438c63 beq x7,x4,80005c34 + 80005c20: 1790146f jal x8,80007598 + 80005c24: 80005c14 .word 0x80005c14 + 80005c28: 00000000 .word 0x00000000 + 80005c2c: 800172cb .word 0x800172cb + 80005c30: 00000000 .word 0x00000000 + 80005c34: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x0d46d7e83f7b9163 + 80005c38: 0009b283 ld x5,0(x19) + 80005c3c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x07b5dead6455afca + 80005c40: 0009b283 ld x5,0(x19) + 80005c44: 00898993 addi x19,x19,8 + +0000000080005c48 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5: + pack x5, x5, x5 # perform operation + 80005c48: 0852c2b3 pack x5,x5,x5 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b5_str) + 80005c4c: 000db383 ld x7,0(x27) + 80005c50: 00538c63 beq x7,x5,80005c68 + 80005c54: 1450146f jal x8,80007598 + 80005c58: 80005c48 .word 0x80005c48 + 80005c5c: 00000000 .word 0x00000000 + 80005c60: 8001730a .word 0x8001730a + 80005c64: 00000000 .word 0x00000000 + 80005c68: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xa5604c4cc470200f + 80005c6c: 0009b303 ld x6,0(x19) + 80005c70: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x55c3175d5452c5ee + 80005c74: 0009b303 ld x6,0(x19) + 80005c78: 00898993 addi x19,x19,8 + +0000000080005c7c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6: + pack x6, x6, x6 # perform operation + 80005c7c: 08634333 pack x6,x6,x6 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b6_str) + 80005c80: 000db383 ld x7,0(x27) + 80005c84: 00638c63 beq x7,x6,80005c9c + 80005c88: 1110146f jal x8,80007598 + 80005c8c: 80005c7c .word 0x80005c7c + 80005c90: 00000000 .word 0x00000000 + 80005c94: 80017349 .word 0x80017349 + 80005c98: 00000000 .word 0x00000000 + 80005c9c: 008d8d93 addi x27,x27,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005ca0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005ca4: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x55220122ce3458fb + 80005ca8: 0009b383 ld x7,0(x19) + 80005cac: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xb897fc0edacc5e82 + 80005cb0: 0009b383 ld x7,0(x19) + 80005cb4: 00898993 addi x19,x19,8 + +0000000080005cb8 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7: + pack x7, x7, x7 # perform operation + 80005cb8: 0873c3b3 pack x7,x7,x7 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b7_str) + 80005cbc: 000db203 ld x4,0(x27) + 80005cc0: 00720c63 beq x4,x7,80005cd8 + 80005cc4: 0bd012ef jal x5,80007580 + 80005cc8: 80005cb8 .word 0x80005cb8 + 80005ccc: 00000000 .word 0x00000000 + 80005cd0: 80017388 .word 0x80017388 + 80005cd4: 00000000 .word 0x00000000 + 80005cd8: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0x0432eedce50f0a5f + 80005cdc: 0009b403 ld x8,0(x19) + 80005ce0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x9832fc1896efdd6a + 80005ce4: 0009b403 ld x8,0(x19) + 80005ce8: 00898993 addi x19,x19,8 + +0000000080005cec : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8: + pack x8, x8, x8 # perform operation + 80005cec: 08844433 pack x8,x8,x8 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b8_str) + 80005cf0: 000db203 ld x4,0(x27) + 80005cf4: 00820c63 beq x4,x8,80005d0c + 80005cf8: 089012ef jal x5,80007580 + 80005cfc: 80005cec .word 0x80005cec + 80005d00: 00000000 .word 0x00000000 + 80005d04: 800173c7 .word 0x800173c7 + 80005d08: 00000000 .word 0x00000000 + 80005d0c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0x91128c37360e8b06 + 80005d10: 0009b483 ld x9,0(x19) + 80005d14: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xa00e0fa6abf76cf9 + 80005d18: 0009b483 ld x9,0(x19) + 80005d1c: 00898993 addi x19,x19,8 + +0000000080005d20 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9: + pack x9, x9, x9 # perform operation + 80005d20: 0894c4b3 pack x9,x9,x9 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b9_str) + 80005d24: 000db203 ld x4,0(x27) + 80005d28: 00920c63 beq x4,x9,80005d40 + 80005d2c: 055012ef jal x5,80007580 + 80005d30: 80005d20 .word 0x80005d20 + 80005d34: 00000000 .word 0x00000000 + 80005d38: 80017406 .word 0x80017406 + 80005d3c: 00000000 .word 0x00000000 + 80005d40: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x391b4d31719c21a3 + 80005d44: 0009b503 ld x10,0(x19) + 80005d48: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xbcec23944c0e0f17 + 80005d4c: 0009b503 ld x10,0(x19) + 80005d50: 00898993 addi x19,x19,8 + +0000000080005d54 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10: + pack x10, x10, x10 # perform operation + 80005d54: 08a54533 pack x10,x10,x10 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b10_str) + 80005d58: 000db203 ld x4,0(x27) + 80005d5c: 00a20c63 beq x4,x10,80005d74 + 80005d60: 021012ef jal x5,80007580 + 80005d64: 80005d54 .word 0x80005d54 + 80005d68: 00000000 .word 0x00000000 + 80005d6c: 80017445 .word 0x80017445 + 80005d70: 00000000 .word 0x00000000 + 80005d74: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xbc0811e9205092e7 + 80005d78: 0009b583 ld x11,0(x19) + 80005d7c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x540e9916f19d8ce4 + 80005d80: 0009b583 ld x11,0(x19) + 80005d84: 00898993 addi x19,x19,8 + +0000000080005d88 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11: + pack x11, x11, x11 # perform operation + 80005d88: 08b5c5b3 pack x11,x11,x11 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b11_str) + 80005d8c: 000db203 ld x4,0(x27) + 80005d90: 00b20c63 beq x4,x11,80005da8 + 80005d94: 7ec012ef jal x5,80007580 + 80005d98: 80005d88 .word 0x80005d88 + 80005d9c: 00000000 .word 0x00000000 + 80005da0: 80017485 .word 0x80017485 + 80005da4: 00000000 .word 0x00000000 + 80005da8: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x1efcdb65b428df01 + 80005dac: 0009b603 ld x12,0(x19) + 80005db0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x2bd192387ddfd2bb + 80005db4: 0009b603 ld x12,0(x19) + 80005db8: 00898993 addi x19,x19,8 + +0000000080005dbc : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12: + pack x12, x12, x12 # perform operation + 80005dbc: 08c64633 pack x12,x12,x12 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b12_str) + 80005dc0: 000db203 ld x4,0(x27) + 80005dc4: 00c20c63 beq x4,x12,80005ddc + 80005dc8: 7b8012ef jal x5,80007580 + 80005dcc: 80005dbc .word 0x80005dbc + 80005dd0: 00000000 .word 0x00000000 + 80005dd4: 800174c5 .word 0x800174c5 + 80005dd8: 00000000 .word 0x00000000 + 80005ddc: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xb8d35fcca897ee72 + 80005de0: 0009b683 ld x13,0(x19) + 80005de4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x11a7618356126ef3 + 80005de8: 0009b683 ld x13,0(x19) + 80005dec: 00898993 addi x19,x19,8 + +0000000080005df0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13: + pack x13, x13, x13 # perform operation + 80005df0: 08d6c6b3 pack x13,x13,x13 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b13_str) + 80005df4: 000db203 ld x4,0(x27) + 80005df8: 00d20c63 beq x4,x13,80005e10 + 80005dfc: 784012ef jal x5,80007580 + 80005e00: 80005df0 .word 0x80005df0 + 80005e04: 00000000 .word 0x00000000 + 80005e08: 80017505 .word 0x80017505 + 80005e0c: 00000000 .word 0x00000000 + 80005e10: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xc06ae6f5f2ea900a + 80005e14: 0009b703 ld x14,0(x19) + 80005e18: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x2d1183e8f2bc129c + 80005e1c: 0009b703 ld x14,0(x19) + 80005e20: 00898993 addi x19,x19,8 + +0000000080005e24 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14: + pack x14, x14, x14 # perform operation + 80005e24: 08e74733 pack x14,x14,x14 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b14_str) + 80005e28: 000db203 ld x4,0(x27) + 80005e2c: 00e20c63 beq x4,x14,80005e44 + 80005e30: 750012ef jal x5,80007580 + 80005e34: 80005e24 .word 0x80005e24 + 80005e38: 00000000 .word 0x00000000 + 80005e3c: 80017545 .word 0x80017545 + 80005e40: 00000000 .word 0x00000000 + 80005e44: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x415fa775454e7dd2 + 80005e48: 0009b783 ld x15,0(x19) + 80005e4c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0xa25ce626c13b2299 + 80005e50: 0009b783 ld x15,0(x19) + 80005e54: 00898993 addi x19,x19,8 + +0000000080005e58 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15: + pack x15, x15, x15 # perform operation + 80005e58: 08f7c7b3 pack x15,x15,x15 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b15_str) + 80005e5c: 000db203 ld x4,0(x27) + 80005e60: 00f20c63 beq x4,x15,80005e78 + 80005e64: 71c012ef jal x5,80007580 + 80005e68: 80005e58 .word 0x80005e58 + 80005e6c: 00000000 .word 0x00000000 + 80005e70: 80017585 .word 0x80017585 + 80005e74: 00000000 .word 0x00000000 + 80005e78: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0xd6d794e44753d107 + 80005e7c: 0009b803 ld x16,0(x19) + 80005e80: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xb7de2781c34647cc + 80005e84: 0009b803 ld x16,0(x19) + 80005e88: 00898993 addi x19,x19,8 + +0000000080005e8c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16: + pack x16, x16, x16 # perform operation + 80005e8c: 09084833 pack x16,x16,x16 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b16_str) + 80005e90: 000db203 ld x4,0(x27) + 80005e94: 01020c63 beq x4,x16,80005eac + 80005e98: 6e8012ef jal x5,80007580 + 80005e9c: 80005e8c .word 0x80005e8c + 80005ea0: 00000000 .word 0x00000000 + 80005ea4: 800175c5 .word 0x800175c5 + 80005ea8: 00000000 .word 0x00000000 + 80005eac: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x9d49506c31763abb + 80005eb0: 0009b883 ld x17,0(x19) + 80005eb4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0x04de2cda3e137153 + 80005eb8: 0009b883 ld x17,0(x19) + 80005ebc: 00898993 addi x19,x19,8 + +0000000080005ec0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17: + pack x17, x17, x17 # perform operation + 80005ec0: 0918c8b3 pack x17,x17,x17 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b17_str) + 80005ec4: 000db203 ld x4,0(x27) + 80005ec8: 01120c63 beq x4,x17,80005ee0 + 80005ecc: 6b4012ef jal x5,80007580 + 80005ed0: 80005ec0 .word 0x80005ec0 + 80005ed4: 00000000 .word 0x00000000 + 80005ed8: 80017605 .word 0x80017605 + 80005edc: 00000000 .word 0x00000000 + 80005ee0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xc8e3cad40cdfd8d8 + 80005ee4: 0009b903 ld x18,0(x19) + 80005ee8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xbedd4f6a030927d8 + 80005eec: 0009b903 ld x18,0(x19) + 80005ef0: 00898993 addi x19,x19,8 + +0000000080005ef4 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18: + pack x18, x18, x18 # perform operation + 80005ef4: 09294933 pack x18,x18,x18 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b18_str) + 80005ef8: 000db203 ld x4,0(x27) + 80005efc: 01220c63 beq x4,x18,80005f14 + 80005f00: 680012ef jal x5,80007580 + 80005f04: 80005ef4 .word 0x80005ef4 + 80005f08: 00000000 .word 0x00000000 + 80005f0c: 80017645 .word 0x80017645 + 80005f10: 00000000 .word 0x00000000 + 80005f14: 008d8d93 addi x27,x27,8 + + mv x11, x19 # switch data pointer register to avoid conflict with test + 80005f18: 00098593 addi x11,x19,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x4d42243513dde5d5 + 80005f1c: 0005b983 ld x19,0(x11) + 80005f20: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x40b60e807aca1747 + 80005f24: 0005b983 ld x19,0(x11) + 80005f28: 00858593 addi x11,x11,8 + +0000000080005f2c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19: + pack x19, x19, x19 # perform operation + 80005f2c: 0939c9b3 pack x19,x19,x19 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b19_str) + 80005f30: 000db203 ld x4,0(x27) + 80005f34: 01320c63 beq x4,x19,80005f4c + 80005f38: 648012ef jal x5,80007580 + 80005f3c: 80005f2c .word 0x80005f2c + 80005f40: 00000000 .word 0x00000000 + 80005f44: 80017685 .word 0x80017685 + 80005f48: 00000000 .word 0x00000000 + 80005f4c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0xd1e948292d3467cb + 80005f50: 0005ba03 ld x20,0(x11) + 80005f54: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x7b9386745a559aa0 + 80005f58: 0005ba03 ld x20,0(x11) + 80005f5c: 00858593 addi x11,x11,8 + +0000000080005f60 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20: + pack x20, x20, x20 # perform operation + 80005f60: 094a4a33 pack x20,x20,x20 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b20_str) + 80005f64: 000db203 ld x4,0(x27) + 80005f68: 01420c63 beq x4,x20,80005f80 + 80005f6c: 614012ef jal x5,80007580 + 80005f70: 80005f60 .word 0x80005f60 + 80005f74: 00000000 .word 0x00000000 + 80005f78: 800176c5 .word 0x800176c5 + 80005f7c: 00000000 .word 0x00000000 + 80005f80: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x5d09f2d14f9840f2 + 80005f84: 0005ba83 ld x21,0(x11) + 80005f88: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x02e6da3efe9bdae4 + 80005f8c: 0005ba83 ld x21,0(x11) + 80005f90: 00858593 addi x11,x11,8 + +0000000080005f94 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21: + pack x21, x21, x21 # perform operation + 80005f94: 095acab3 pack x21,x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b21_str) + 80005f98: 000db203 ld x4,0(x27) + 80005f9c: 01520c63 beq x4,x21,80005fb4 + 80005fa0: 5e0012ef jal x5,80007580 + 80005fa4: 80005f94 .word 0x80005f94 + 80005fa8: 00000000 .word 0x00000000 + 80005fac: 80017705 .word 0x80017705 + 80005fb0: 00000000 .word 0x00000000 + 80005fb4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x76678da1c8970a95 + 80005fb8: 0005bb03 ld x22,0(x11) + 80005fbc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x7423e66504e43b33 + 80005fc0: 0005bb03 ld x22,0(x11) + 80005fc4: 00858593 addi x11,x11,8 + +0000000080005fc8 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22: + pack x22, x22, x22 # perform operation + 80005fc8: 096b4b33 pack x22,x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b22_str) + 80005fcc: 000db203 ld x4,0(x27) + 80005fd0: 01620c63 beq x4,x22,80005fe8 + 80005fd4: 5ac012ef jal x5,80007580 + 80005fd8: 80005fc8 .word 0x80005fc8 + 80005fdc: 00000000 .word 0x00000000 + 80005fe0: 80017745 .word 0x80017745 + 80005fe4: 00000000 .word 0x00000000 + 80005fe8: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0xf3f2567ce21eb9fc + 80005fec: 0005bb83 ld x23,0(x11) + 80005ff0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0xd50fd676184c3278 + 80005ff4: 0005bb83 ld x23,0(x11) + 80005ff8: 00858593 addi x11,x11,8 + +0000000080005ffc : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23: + pack x23, x23, x23 # perform operation + 80005ffc: 097bcbb3 pack x23,x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b23_str) + 80006000: 000db203 ld x4,0(x27) + 80006004: 01720c63 beq x4,x23,8000601c + 80006008: 578012ef jal x5,80007580 + 8000600c: 80005ffc .word 0x80005ffc + 80006010: 00000000 .word 0x00000000 + 80006014: 80017785 .word 0x80017785 + 80006018: 00000000 .word 0x00000000 + 8000601c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x9232129cbfc6f5d6 + 80006020: 0005bc03 ld x24,0(x11) + 80006024: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0xfcf9bc82c196e91c + 80006028: 0005bc03 ld x24,0(x11) + 8000602c: 00858593 addi x11,x11,8 + +0000000080006030 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24: + pack x24, x24, x24 # perform operation + 80006030: 098c4c33 pack x24,x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b24_str) + 80006034: 000db203 ld x4,0(x27) + 80006038: 01820c63 beq x4,x24,80006050 + 8000603c: 544012ef jal x5,80007580 + 80006040: 80006030 .word 0x80006030 + 80006044: 00000000 .word 0x00000000 + 80006048: 800177c5 .word 0x800177c5 + 8000604c: 00000000 .word 0x00000000 + 80006050: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x4735e23c72d603a6 + 80006054: 0005bc83 ld x25,0(x11) + 80006058: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xd52d2a48d48fab06 + 8000605c: 0005bc83 ld x25,0(x11) + 80006060: 00858593 addi x11,x11,8 + +0000000080006064 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25: + pack x25, x25, x25 # perform operation + 80006064: 099cccb3 pack x25,x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b25_str) + 80006068: 000db203 ld x4,0(x27) + 8000606c: 01920c63 beq x4,x25,80006084 + 80006070: 510012ef jal x5,80007580 + 80006074: 80006064 .word 0x80006064 + 80006078: 00000000 .word 0x00000000 + 8000607c: 80017805 .word 0x80017805 + 80006080: 00000000 .word 0x00000000 + 80006084: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x6efdf0635b259ce7 + 80006088: 0005bd03 ld x26,0(x11) + 8000608c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x30d78f2c5485b60a + 80006090: 0005bd03 ld x26,0(x11) + 80006094: 00858593 addi x11,x11,8 + +0000000080006098 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26: + pack x26, x26, x26 # perform operation + 80006098: 09ad4d33 pack x26,x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b26_str) + 8000609c: 000db203 ld x4,0(x27) + 800060a0: 01a20c63 beq x4,x26,800060b8 + 800060a4: 4dc012ef jal x5,80007580 + 800060a8: 80006098 .word 0x80006098 + 800060ac: 00000000 .word 0x00000000 + 800060b0: 80017845 .word 0x80017845 + 800060b4: 00000000 .word 0x00000000 + 800060b8: 008d8d93 addi x27,x27,8 + + mv x19, x27 # switch signature pointer register to avoid conflict with test + 800060bc: 000d8993 addi x19,x27,0 +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x5834b96a4ed53ad7 + 800060c0: 0005bd83 ld x27,0(x11) + 800060c4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x2f22cb8c507a0088 + 800060c8: 0005bd83 ld x27,0(x11) + 800060cc: 00858593 addi x11,x11,8 + +00000000800060d0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27: + pack x27, x27, x27 # perform operation + 800060d0: 09bdcdb3 pack x27,x27,x27 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b27_str) + 800060d4: 0009b203 ld x4,0(x19) + 800060d8: 01b20c63 beq x4,x27,800060f0 + 800060dc: 4a4012ef jal x5,80007580 + 800060e0: 800060d0 .word 0x800060d0 + 800060e4: 00000000 .word 0x00000000 + 800060e8: 80017885 .word 0x80017885 + 800060ec: 00000000 .word 0x00000000 + 800060f0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x934003b7c3391228 + 800060f4: 0005be03 ld x28,0(x11) + 800060f8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x0b1333f5caad9153 + 800060fc: 0005be03 ld x28,0(x11) + 80006100: 00858593 addi x11,x11,8 + +0000000080006104 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28: + pack x28, x28, x28 # perform operation + 80006104: 09ce4e33 pack x28,x28,x28 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b28_str) + 80006108: 0009b203 ld x4,0(x19) + 8000610c: 01c20c63 beq x4,x28,80006124 + 80006110: 470012ef jal x5,80007580 + 80006114: 80006104 .word 0x80006104 + 80006118: 00000000 .word 0x00000000 + 8000611c: 800178c5 .word 0x800178c5 + 80006120: 00000000 .word 0x00000000 + 80006124: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xed5450f496ffc718 + 80006128: 0005be83 ld x29,0(x11) + 8000612c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x0f245845748ea3d7 + 80006130: 0005be83 ld x29,0(x11) + 80006134: 00858593 addi x11,x11,8 + +0000000080006138 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29: + pack x29, x29, x29 # perform operation + 80006138: 09deceb3 pack x29,x29,x29 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b29_str) + 8000613c: 0009b203 ld x4,0(x19) + 80006140: 01d20c63 beq x4,x29,80006158 + 80006144: 43c012ef jal x5,80007580 + 80006148: 80006138 .word 0x80006138 + 8000614c: 00000000 .word 0x00000000 + 80006150: 80017905 .word 0x80017905 + 80006154: 00000000 .word 0x00000000 + 80006158: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x4839a6519363ae89 + 8000615c: 0005bf03 ld x30,0(x11) + 80006160: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xa73be2ad1f48dd5c + 80006164: 0005bf03 ld x30,0(x11) + 80006168: 00858593 addi x11,x11,8 + +000000008000616c : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30: + pack x30, x30, x30 # perform operation + 8000616c: 09ef4f33 pack x30,x30,x30 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b30_str) + 80006170: 0009b203 ld x4,0(x19) + 80006174: 01e20c63 beq x4,x30,8000618c + 80006178: 408012ef jal x5,80007580 + 8000617c: 8000616c .word 0x8000616c + 80006180: 00000000 .word 0x00000000 + 80006184: 80017945 .word 0x80017945 + 80006188: 00000000 .word 0x00000000 + 8000618c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2_nx0 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x86d2dab1523d5f66 + 80006190: 0005bf83 ld x31,0(x11) + 80006194: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x3354575028fadf9b + 80006198: 0005bf83 ld x31,0(x11) + 8000619c: 00858593 addi x11,x11,8 + +00000000800061a0 : +Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31: + pack x31, x31, x31 # perform operation + 800061a0: 09ffcfb3 pack x31,x31,x31 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31, Zbkb_pack_cg_cmp_rd_rs1_rs2_nx0_b31_str) + 800061a4: 0009b203 ld x4,0(x19) + 800061a8: 01f20c63 beq x4,x31,800061c0 + 800061ac: 3d4012ef jal x5,80007580 + 800061b0: 800061a0 .word 0x800061a0 + 800061b4: 00000000 .word 0x00000000 + 800061b8: 80017985 .word 0x80017985 + 800061bc: 00000000 .word 0x00000000 + 800061c0: 00898993 addi x19,x19,8 + + mv x2, x19 # restore signature pointer to default register for teardown + 800061c4: 00098113 addi x2,x19,0 + +00000000800061c8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800061c8: 00000513 addi x10,x0,0 + 800061cc: 00000073 ecall + 800061d0: fff00513 addi x10,x0,-1 + 800061d4: 25800413 addi x8,x0,600 + +00000000800061d8 : + 800061d8: 34002373 csrrs x6,mscratch,x0 + +00000000800061dc : + 800061dc: 2b833383 ld x7,696(x6) + +00000000800061e0 : + 800061e0: 2a033383 ld x7,672(x6) + +00000000800061e4 : + 800061e4: 2d033483 ld x9,720(x6) + 800061e8: 34049073 csrrw x0,mscratch,x9 + +00000000800061ec : + 800061ec: 2c833483 ld x9,712(x6) + 800061f0: 305493f3 csrrw x7,mtvec,x9 + 800061f4: ffc4f493 andi x9,x9,-4 + 800061f8: ffc3f393 andi x7,x7,-4 + 800061fc: 00749e63 bne x9,x7,80006218 + +0000000080006200 : + 80006200: 00030493 addi x9,x6,0 + +0000000080006204 : + 80006204: 0004a783 lw x15,0(x9) + 80006208: 00f3a023 sw x15,0(x7) + 8000620c: 00438393 addi x7,x7,4 + 80006210: 00448493 addi x9,x9,4 + 80006214: fe83c8e3 blt x7,x8,80006204 + 80006218: 0000100f fence.i + +000000008000621c : + 8000621c: 00000013 addi x0,x0,0 + 80006220: 00000497 auipc x9,0x0 + 80006224: 2b048493 addi x9,x9,688 # 800064d0 + 80006228: 00000013 addi x0,x0,0 + 8000622c: 00000013 addi x0,x0,0 + 80006230: 00000013 addi x0,x0,0 + 80006234: 00000013 addi x0,x0,0 + 80006238: 00000013 addi x0,x0,0 + 8000623c: 00000013 addi x0,x0,0 + 80006240: 10e49863 bne x9,x14,80006350 + 80006244: 00000013 addi x0,x0,0 + 80006248: 00000013 addi x0,x0,0 + 8000624c: 00000013 addi x0,x0,0 + 80006250: 00000013 addi x0,x0,0 + 80006254: 00000013 addi x0,x0,0 + 80006258: 00000013 addi x0,x0,0 + 8000625c: 00000013 addi x0,x0,0 + 80006260: 00012517 auipc x10,0x12 + 80006264: e8e50513 addi x10,x10,-370 # 800180ee + 80006268: 00000013 addi x0,x0,0 + 8000626c: 00000013 addi x0,x0,0 + 80006270: 00000013 addi x0,x0,0 + 80006274: 00000013 addi x0,x0,0 + 80006278: 00000013 addi x0,x0,0 + 8000627c: 00000013 addi x0,x0,0 + 80006280: 00032097 auipc x1,0x32 + 80006284: 324080e7 jalr x1,804(x1) # 800385a4 + 80006288: 00000013 addi x0,x0,0 + 8000628c: 00000013 addi x0,x0,0 + 80006290: 00000013 addi x0,x0,0 + 80006294: 00000013 addi x0,x0,0 + 80006298: 00000013 addi x0,x0,0 + 8000629c: 00000013 addi x0,x0,0 + 800062a0: 00012517 auipc x10,0x12 + 800062a4: e8750513 addi x10,x10,-377 # 80018127 + 800062a8: 00000013 addi x0,x0,0 + 800062ac: 00000013 addi x0,x0,0 + 800062b0: 00000013 addi x0,x0,0 + 800062b4: 00000013 addi x0,x0,0 + 800062b8: 00000013 addi x0,x0,0 + 800062bc: 00000013 addi x0,x0,0 + 800062c0: 00032097 auipc x1,0x32 + 800062c4: 2e4080e7 jalr x1,740(x1) # 800385a4 + 800062c8: 00000013 addi x0,x0,0 + 800062cc: 00000013 addi x0,x0,0 + 800062d0: 00000013 addi x0,x0,0 + 800062d4: 00000013 addi x0,x0,0 + 800062d8: 00000013 addi x0,x0,0 + 800062dc: 00000013 addi x0,x0,0 + 800062e0: 00012517 auipc x10,0x12 + 800062e4: ea750513 addi x10,x10,-345 # 80018187 + 800062e8: 00000013 addi x0,x0,0 + 800062ec: 00000013 addi x0,x0,0 + 800062f0: 00000013 addi x0,x0,0 + 800062f4: 00000013 addi x0,x0,0 + 800062f8: 00000013 addi x0,x0,0 + 800062fc: 00000013 addi x0,x0,0 + 80006300: 00032097 auipc x1,0x32 + 80006304: 2a4080e7 jalr x1,676(x1) # 800385a4 + 80006308: 00000013 addi x0,x0,0 + 8000630c: 00000013 addi x0,x0,0 + 80006310: 00000013 addi x0,x0,0 + 80006314: 00000013 addi x0,x0,0 + 80006318: 00000013 addi x0,x0,0 + 8000631c: 00000013 addi x0,x0,0 + 80006320: 00013517 auipc x10,0x13 + 80006324: a1250513 addi x10,x10,-1518 # 80018d32 + 80006328: 00000013 addi x0,x0,0 + 8000632c: 00000013 addi x0,x0,0 + 80006330: 00000013 addi x0,x0,0 + 80006334: 00000013 addi x0,x0,0 + 80006338: 00000013 addi x0,x0,0 + 8000633c: 00000013 addi x0,x0,0 + 80006340: 00032097 auipc x1,0x32 + 80006344: 264080e7 jalr x1,612(x1) # 800385a4 + 80006348: 00032097 auipc x1,0x32 + 8000634c: 2bc080e7 jalr x1,700(x1) # 80038604 + +0000000080006350 : + 80006350: 00000013 addi x0,x0,0 + 80006354: 00000013 addi x0,x0,0 + 80006358: 00000013 addi x0,x0,0 + 8000635c: 00000013 addi x0,x0,0 + 80006360: 00006317 auipc x6,0x6 + 80006364: 04830313 addi x6,x6,72 # 8000c3a8 + 80006368: 00000013 addi x0,x0,0 + 8000636c: 00000013 addi x0,x0,0 + 80006370: 00000013 addi x0,x0,0 + 80006374: 00000013 addi x0,x0,0 + 80006378: 00000013 addi x0,x0,0 + 8000637c: 00000013 addi x0,x0,0 + 80006380: 00033303 ld x6,0(x6) + 80006384: 00000013 addi x0,x0,0 + 80006388: 00000013 addi x0,x0,0 + 8000638c: 00000013 addi x0,x0,0 + 80006390: 00000013 addi x0,x0,0 + 80006394: 00000013 addi x0,x0,0 + 80006398: 00000013 addi x0,x0,0 + 8000639c: 00000013 addi x0,x0,0 + 800063a0: 00014397 auipc x7,0x14 + 800063a4: 36038393 addi x7,x7,864 # 8001a700 + 800063a8: 00000013 addi x0,x0,0 + 800063ac: 00000013 addi x0,x0,0 + 800063b0: 00000013 addi x0,x0,0 + 800063b4: 00000013 addi x0,x0,0 + 800063b8: 00000013 addi x0,x0,0 + 800063bc: 00000013 addi x0,x0,0 + 800063c0: 40730333 sub x6,x6,x7 + 800063c4: 00000013 addi x0,x0,0 + 800063c8: 00000013 addi x0,x0,0 + 800063cc: 00000013 addi x0,x0,0 + 800063d0: 00000013 addi x0,x0,0 + 800063d4: 00000013 addi x0,x0,0 + 800063d8: 00000013 addi x0,x0,0 + 800063dc: 00000013 addi x0,x0,0 + 800063e0: 00014417 auipc x8,0x14 + 800063e4: 31040413 addi x8,x8,784 # 8001a6f0 + 800063e8: 00000013 addi x0,x0,0 + 800063ec: 00000013 addi x0,x0,0 + 800063f0: 00000013 addi x0,x0,0 + 800063f4: 00000013 addi x0,x0,0 + 800063f8: 00000013 addi x0,x0,0 + 800063fc: 00000013 addi x0,x0,0 + 80006400: 00043203 ld x4,0(x8) + 80006404: 00620c63 beq x4,x6,8000641c + 80006408: 1e0013ef jal x7,800075e8 + 8000640c: 80006350 .word 0x80006350 + 80006410: 00000000 .word 0x00000000 + 80006414: 800182db .word 0x800182db + 80006418: 00000000 .word 0x00000000 + +000000008000641c : + 8000641c: 000004b7 lui x9,0x0 + 80006420: 00048493 addi x9,x9,0 # 0 + 80006424: 00b49493 slli x9,x9,0xb + 80006428: 5d648493 addi x9,x9,1494 + 8000642c: 00b49493 slli x9,x9,0xb + 80006430: 43748493 addi x9,x9,1079 + 80006434: 00a49493 slli x9,x9,0xa + 80006438: 2ad48493 addi x9,x9,685 + 8000643c: 00e49e63 bne x9,x14,80006458 + 80006440: 1a8013ef jal x7,800075e8 + 80006444: 80006504 .word 0x80006504 + 80006448: 00000000 .word 0x00000000 + 8000644c: 80018149 .word 0x80018149 + 80006450: 00000000 .word 0x00000000 + 80006454: 00000341 .word 0x00000341 + +0000000080006458 : + 80006458: 00000013 addi x0,x0,0 + 8000645c: 00000013 addi x0,x0,0 + 80006460: 00012517 auipc x10,0x12 + 80006464: c5450513 addi x10,x10,-940 # 800180b4 + 80006468: 00000013 addi x0,x0,0 + 8000646c: 00000013 addi x0,x0,0 + 80006470: 00000013 addi x0,x0,0 + 80006474: 00000013 addi x0,x0,0 + 80006478: 00000013 addi x0,x0,0 + 8000647c: 00000013 addi x0,x0,0 + 80006480: 00032097 auipc x1,0x32 + 80006484: 124080e7 jalr x1,292(x1) # 800385a4 + 80006488: 00032097 auipc x1,0x32 + 8000648c: 15c080e7 jalr x1,348(x1) # 800385e4 + +0000000080006490 : + 80006490: 00000013 addi x0,x0,0 + 80006494: 00000013 addi x0,x0,0 + 80006498: 00000013 addi x0,x0,0 + 8000649c: 00000013 addi x0,x0,0 + 800064a0: 00012517 auipc x10,0x12 + 800064a4: c4e50513 addi x10,x10,-946 # 800180ee + 800064a8: 00000013 addi x0,x0,0 + 800064ac: 00000013 addi x0,x0,0 + 800064b0: 00000013 addi x0,x0,0 + 800064b4: 00000013 addi x0,x0,0 + 800064b8: 00000013 addi x0,x0,0 + 800064bc: 00000013 addi x0,x0,0 + 800064c0: 00032097 auipc x1,0x32 + 800064c4: 0e4080e7 jalr x1,228(x1) # 800385a4 + 800064c8: 00032097 auipc x1,0x32 + 800064cc: 13c080e7 jalr x1,316(x1) # 80038604 + +00000000800064d0 : + 800064d0: 00000013 addi x0,x0,0 + 800064d4: 00000013 addi x0,x0,0 + 800064d8: 00000013 addi x0,x0,0 + 800064dc: 00000013 addi x0,x0,0 + 800064e0: 00000717 auipc x14,0x0 + 800064e4: ff070713 addi x14,x14,-16 # 800064d0 + 800064e8: 00000013 addi x0,x0,0 + 800064ec: 00000013 addi x0,x0,0 + 800064f0: 00000013 addi x0,x0,0 + 800064f4: 00000013 addi x0,x0,0 + 800064f8: 00000013 addi x0,x0,0 + 800064fc: 00000013 addi x0,x0,0 + 80006500: cc9ff06f jal x0,800061c8 + +0000000080006504 : + 80006504: 00000737 lui x14,0x0 + 80006508: 00070713 addi x14,x14,0 # 0 + 8000650c: 00b71713 slli x14,x14,0xb + 80006510: 5d670713 addi x14,x14,1494 + 80006514: 00b71713 slli x14,x14,0xb + 80006518: 43770713 addi x14,x14,1079 + 8000651c: 00a71713 slli x14,x14,0xa + 80006520: 2ad70713 addi x14,x14,685 + 80006524: ca5ff06f jal x0,800061c8 + 80006528: 00000013 addi x0,x0,0 + 8000652c: 00000013 addi x0,x0,0 + 80006530: 00000013 addi x0,x0,0 + 80006534: 00000013 addi x0,x0,0 + 80006538: 00000013 addi x0,x0,0 + 8000653c: 00000013 addi x0,x0,0 + +0000000080006540 : + 80006540: 1000006f jal x0,80006640 + 80006544: 1080006f jal x0,8000664c + 80006548: 1100006f jal x0,80006658 + 8000654c: 1180006f jal x0,80006664 + 80006550: 1200006f jal x0,80006670 + 80006554: 1280006f jal x0,8000667c + 80006558: 1300006f jal x0,80006688 + 8000655c: 1380006f jal x0,80006694 + 80006560: 1400006f jal x0,800066a0 + 80006564: 1480006f jal x0,800066ac + 80006568: 1500006f jal x0,800066b8 + 8000656c: 1580006f jal x0,800066c4 + 80006570: 1600006f jal x0,800066d0 + 80006574: 1680006f jal x0,800066dc + 80006578: 1700006f jal x0,800066e8 + 8000657c: 1780006f jal x0,800066f4 + 80006580: 1800006f jal x0,80006700 + 80006584: 1880006f jal x0,8000670c + 80006588: 1900006f jal x0,80006718 + 8000658c: 1980006f jal x0,80006724 + 80006590: 1a00006f jal x0,80006730 + 80006594: 1a80006f jal x0,8000673c + 80006598: 1b00006f jal x0,80006748 + 8000659c: 1b80006f jal x0,80006754 + 800065a0: 1c00006f jal x0,80006760 + 800065a4: 1bc0006f jal x0,80006760 + 800065a8: 1b80006f jal x0,80006760 + 800065ac: 1b40006f jal x0,80006760 + 800065b0: 1b00006f jal x0,80006760 + 800065b4: 1ac0006f jal x0,80006760 + 800065b8: 1a80006f jal x0,80006760 + 800065bc: 1a40006f jal x0,80006760 + 800065c0: 1a00006f jal x0,80006760 + 800065c4: 19c0006f jal x0,80006760 + 800065c8: 1980006f jal x0,80006760 + 800065cc: 1940006f jal x0,80006760 + 800065d0: 1900006f jal x0,80006760 + 800065d4: 18c0006f jal x0,80006760 + 800065d8: 1880006f jal x0,80006760 + 800065dc: 1840006f jal x0,80006760 + 800065e0: 1800006f jal x0,80006760 + 800065e4: 17c0006f jal x0,80006760 + 800065e8: 1780006f jal x0,80006760 + 800065ec: 1740006f jal x0,80006760 + 800065f0: 1700006f jal x0,80006760 + 800065f4: 16c0006f jal x0,80006760 + 800065f8: 1680006f jal x0,80006760 + 800065fc: 1640006f jal x0,80006760 + 80006600: 1600006f jal x0,80006760 + 80006604: 15c0006f jal x0,80006760 + 80006608: 1580006f jal x0,80006760 + 8000660c: 1540006f jal x0,80006760 + 80006610: 1500006f jal x0,80006760 + 80006614: 14c0006f jal x0,80006760 + 80006618: 1480006f jal x0,80006760 + 8000661c: 1440006f jal x0,80006760 + 80006620: 1400006f jal x0,80006760 + 80006624: 13c0006f jal x0,80006760 + 80006628: 1380006f jal x0,80006760 + 8000662c: 1340006f jal x0,80006760 + 80006630: 1300006f jal x0,80006760 + 80006634: 12c0006f jal x0,80006760 + 80006638: 1280006f jal x0,80006760 + 8000663c: 1240006f jal x0,80006760 + +0000000080006640 : + 80006640: 34011173 csrrw x2,mscratch,x2 + 80006644: 30f13423 sd x15,776(x2) + 80006648: 13c007ef jal x15,80006784 + 8000664c: 34011173 csrrw x2,mscratch,x2 + 80006650: 30f13423 sd x15,776(x2) + 80006654: 130007ef jal x15,80006784 + 80006658: 34011173 csrrw x2,mscratch,x2 + 8000665c: 30f13423 sd x15,776(x2) + 80006660: 124007ef jal x15,80006784 + 80006664: 34011173 csrrw x2,mscratch,x2 + 80006668: 30f13423 sd x15,776(x2) + 8000666c: 118007ef jal x15,80006784 + 80006670: 34011173 csrrw x2,mscratch,x2 + 80006674: 30f13423 sd x15,776(x2) + 80006678: 10c007ef jal x15,80006784 + 8000667c: 34011173 csrrw x2,mscratch,x2 + 80006680: 30f13423 sd x15,776(x2) + 80006684: 100007ef jal x15,80006784 + 80006688: 34011173 csrrw x2,mscratch,x2 + 8000668c: 30f13423 sd x15,776(x2) + 80006690: 0f4007ef jal x15,80006784 + 80006694: 34011173 csrrw x2,mscratch,x2 + 80006698: 30f13423 sd x15,776(x2) + 8000669c: 0e8007ef jal x15,80006784 + 800066a0: 34011173 csrrw x2,mscratch,x2 + 800066a4: 30f13423 sd x15,776(x2) + 800066a8: 0dc007ef jal x15,80006784 + 800066ac: 34011173 csrrw x2,mscratch,x2 + 800066b0: 30f13423 sd x15,776(x2) + 800066b4: 0d0007ef jal x15,80006784 + 800066b8: 34011173 csrrw x2,mscratch,x2 + 800066bc: 30f13423 sd x15,776(x2) + 800066c0: 0c4007ef jal x15,80006784 + 800066c4: 34011173 csrrw x2,mscratch,x2 + 800066c8: 30f13423 sd x15,776(x2) + 800066cc: 0b8007ef jal x15,80006784 + 800066d0: 34011173 csrrw x2,mscratch,x2 + 800066d4: 30f13423 sd x15,776(x2) + 800066d8: 0ac007ef jal x15,80006784 + 800066dc: 34011173 csrrw x2,mscratch,x2 + 800066e0: 30f13423 sd x15,776(x2) + 800066e4: 0a0007ef jal x15,80006784 + 800066e8: 34011173 csrrw x2,mscratch,x2 + 800066ec: 30f13423 sd x15,776(x2) + 800066f0: 094007ef jal x15,80006784 + 800066f4: 34011173 csrrw x2,mscratch,x2 + 800066f8: 30f13423 sd x15,776(x2) + 800066fc: 088007ef jal x15,80006784 + 80006700: 34011173 csrrw x2,mscratch,x2 + 80006704: 30f13423 sd x15,776(x2) + 80006708: 07c007ef jal x15,80006784 + 8000670c: 34011173 csrrw x2,mscratch,x2 + 80006710: 30f13423 sd x15,776(x2) + 80006714: 070007ef jal x15,80006784 + 80006718: 34011173 csrrw x2,mscratch,x2 + 8000671c: 30f13423 sd x15,776(x2) + 80006720: 064007ef jal x15,80006784 + 80006724: 34011173 csrrw x2,mscratch,x2 + 80006728: 30f13423 sd x15,776(x2) + 8000672c: 058007ef jal x15,80006784 + 80006730: 34011173 csrrw x2,mscratch,x2 + 80006734: 30f13423 sd x15,776(x2) + 80006738: 04c007ef jal x15,80006784 + 8000673c: 34011173 csrrw x2,mscratch,x2 + 80006740: 30f13423 sd x15,776(x2) + 80006744: 040007ef jal x15,80006784 + 80006748: 34011173 csrrw x2,mscratch,x2 + 8000674c: 30f13423 sd x15,776(x2) + 80006750: 034007ef jal x15,80006784 + 80006754: 34011173 csrrw x2,mscratch,x2 + 80006758: 30f13423 sd x15,776(x2) + 8000675c: 028007ef jal x15,80006784 + +0000000080006760 : + 80006760: 00000317 auipc x6,0x0 + 80006764: abc30313 addi x6,x6,-1348 # 8000621c + 80006768: 00000013 addi x0,x0,0 + 8000676c: 00000013 addi x0,x0,0 + 80006770: 00000013 addi x0,x0,0 + 80006774: 00000013 addi x0,x0,0 + 80006778: 00000013 addi x0,x0,0 + 8000677c: 00000013 addi x0,x0,0 + 80006780: 00030067 jalr x0,0(x6) + +0000000080006784 : + 80006784: 30e13023 sd x14,768(x2) + 80006788: 34011773 csrrw x14,mscratch,x2 + 8000678c: 30e13823 sd x14,784(x2) + 80006790: 2b013703 ld x14,688(x2) + 80006794: 00070067 jalr x0,0(x14) + +0000000080006798 : + 80006798: 2e913c23 sd x9,760(x2) + 8000679c: 2e813823 sd x8,752(x2) + 800067a0: 2e713423 sd x7,744(x2) + 800067a4: 2e613023 sd x6,736(x2) + 800067a8: 00000013 addi x0,x0,0 + 800067ac: 00000013 addi x0,x0,0 + 800067b0: 00000013 addi x0,x0,0 + 800067b4: 00000013 addi x0,x0,0 + 800067b8: 00000013 addi x0,x0,0 + 800067bc: 00000013 addi x0,x0,0 + 800067c0: 00006317 auipc x6,0x6 + 800067c4: 94830313 addi x6,x6,-1720 # 8000c108 + 800067c8: 00000013 addi x0,x0,0 + 800067cc: 00000013 addi x0,x0,0 + 800067d0: 00000013 addi x0,x0,0 + 800067d4: 00000013 addi x0,x0,0 + 800067d8: 00000013 addi x0,x0,0 + 800067dc: 00000013 addi x0,x0,0 + 800067e0: 00033383 ld x7,0(x6) + 800067e4: 00138393 addi x7,x7,1 + 800067e8: 00733023 sd x7,0(x6) + 800067ec: 34202773 csrrs x14,mcause,x0 + +00000000800067f0 : + 800067f0: fff00493 addi x9,x0,-1 + 800067f4: 00d4d493 srli x9,x9,0xd + 800067f8: 00c49493 slli x9,x9,0xc + 800067fc: fff4c493 xori x9,x9,-1 + 80006800: 00e4f4b3 and x9,x9,x14 + +0000000080006804 : + 80006804: ffe48413 addi x8,x9,-2 + 80006808: 00041663 bne x8,x0,80006814 + +000000008000680c : + 8000680c: 500502e3 beq x10,x0,80007510 + 80006810: 5b40006f jal x0,80006dc4 + +0000000080006814 : + 80006814: ff848413 addi x8,x9,-8 + 80006818: 00245413 srli x8,x8,0x2 + 8000681c: 5a041463 bne x8,x0,80006dc4 + +0000000080006820 : + 80006820: 4e0508e3 beq x10,x0,80007510 + +0000000080006824 : + 80006824: fff50493 addi x9,x10,-1 + 80006828: 00500393 addi x7,x0,5 + 8000682c: 0274e063 bltu x9,x7,8000684c + 80006830: 07300393 addi x7,x0,115 + 80006834: 00750463 beq x10,x7,8000683c + 80006838: 08c0006f jal x0,800068c4 + +000000008000683c : + 8000683c: 34102573 csrrs x10,mepc,x0 + 80006840: 00450413 addi x8,x10,4 + 80006844: 34141073 csrrw x0,mepc,x8 + 80006848: 0310006f jal x0,80007078 + +000000008000684c : + 8000684c: 341024f3 csrrs x9,mepc,x0 + 80006850: 00448493 addi x9,x9,4 + 80006854: 34149073 csrrw x0,mepc,x9 + 80006858: 00100393 addi x7,x0,1 + 8000685c: 00750e63 beq x10,x7,80006878 + 80006860: 00200393 addi x7,x0,2 + 80006864: 02750463 beq x10,x7,8000688c + 80006868: 00300393 addi x7,x0,3 + 8000686c: 04750063 beq x10,x7,800068ac + 80006870: fff00513 addi x10,x0,-1 + 80006874: 0050006f jal x0,80007078 + +0000000080006878 : + 80006878: fff00493 addi x9,x0,-1 + 8000687c: 03e4d493 srli x9,x9,0x3e + 80006880: 00b49493 slli x9,x9,0xb + 80006884: 3004a073 csrrs x0,mstatus,x9 + 80006888: 7f00006f jal x0,80007078 + +000000008000688c : + 8000688c: fff00493 addi x9,x0,-1 + 80006890: 03e4d493 srli x9,x9,0x3e + 80006894: 00b49493 slli x9,x9,0xb + 80006898: 3004b073 csrrc x0,mstatus,x9 + 8000689c: 00100493 addi x9,x0,1 + 800068a0: 00b49493 slli x9,x9,0xb + 800068a4: 3004a073 csrrs x0,mstatus,x9 + 800068a8: 7d00006f jal x0,80007078 + +00000000800068ac : + 800068ac: fff00493 addi x9,x0,-1 + 800068b0: 03e4d493 srli x9,x9,0x3e + 800068b4: 00b49493 slli x9,x9,0xb + 800068b8: 3004b073 csrrc x0,mstatus,x9 + 800068bc: 7bc0006f jal x0,80007078 + +00000000800068c0 : + 800068c0: 00000013 addi x0,x0,0 + +00000000800068c4 : + 800068c4: 00000013 addi x0,x0,0 + 800068c8: 00000013 addi x0,x0,0 + 800068cc: 00000013 addi x0,x0,0 + 800068d0: 00000013 addi x0,x0,0 + 800068d4: 00000013 addi x0,x0,0 + 800068d8: 00000013 addi x0,x0,0 + 800068dc: 00000013 addi x0,x0,0 + 800068e0: 00000397 auipc x7,0x0 + 800068e4: 17038393 addi x7,x7,368 # 80006a50 + 800068e8: 00000013 addi x0,x0,0 + 800068ec: 00000013 addi x0,x0,0 + 800068f0: 00000013 addi x0,x0,0 + 800068f4: 00000013 addi x0,x0,0 + 800068f8: 00000013 addi x0,x0,0 + 800068fc: 00000013 addi x0,x0,0 + +0000000080006900 : + 80006900: 0003e403 lwu x8,0(x7) + 80006904: 00a40863 beq x8,x10,80006914 + 80006908: 04040863 beq x8,x0,80006958 + 8000690c: 00838393 addi x7,x7,8 + 80006910: ff1ff06f jal x0,80006900 + +0000000080006914 : + 80006914: 00008493 addi x9,x1,0 + 80006918: 00000013 addi x0,x0,0 + 8000691c: 00000013 addi x0,x0,0 + 80006920: 00000097 auipc x1,0x0 + 80006924: 02408093 addi x1,x1,36 # 80006944 + 80006928: 00000013 addi x0,x0,0 + 8000692c: 00000013 addi x0,x0,0 + 80006930: 00000013 addi x0,x0,0 + 80006934: 00000013 addi x0,x0,0 + 80006938: 00000013 addi x0,x0,0 + 8000693c: 00000013 addi x0,x0,0 + 80006940: 00038067 jalr x0,0(x7) + +0000000080006944 : + 80006944: 00048093 addi x1,x9,0 + 80006948: 34102473 csrrs x8,mepc,x0 + 8000694c: 00440413 addi x8,x8,4 + 80006950: 34141073 csrrw x0,mepc,x8 + 80006954: 7240006f jal x0,80007078 + +0000000080006958 : + 80006958: 00050493 addi x9,x10,0 + 8000695c: 00000013 addi x0,x0,0 + 80006960: 00013517 auipc x10,0x13 + 80006964: e0950513 addi x10,x10,-503 # 80019769 + 80006968: 00000013 addi x0,x0,0 + 8000696c: 00000013 addi x0,x0,0 + 80006970: 00000013 addi x0,x0,0 + 80006974: 00000013 addi x0,x0,0 + 80006978: 00000013 addi x0,x0,0 + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00032097 auipc x1,0x32 + 80006984: c24080e7 jalr x1,-988(x1) # 800385a4 + 80006988: 00048513 addi x10,x9,0 + 8000698c: 02000593 addi x11,x0,32 + 80006990: 728020ef jal x1,800090b8 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 00011517 auipc x10,0x11 + 800069a4: 19850513 addi x10,x10,408 # 80017b38 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00032097 auipc x1,0x32 + 800069c4: be4080e7 jalr x1,-1052(x1) # 800385a4 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00012517 auipc x10,0x12 + 800069e4: 81050513 addi x10,x10,-2032 # 800181f0 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00032097 auipc x1,0x32 + 80006a04: ba4080e7 jalr x1,-1116(x1) # 800385a4 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00011517 auipc x10,0x11 + 80006a24: 6ce50513 addi x10,x10,1742 # 800180ee + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00032097 auipc x1,0x32 + 80006a44: b64080e7 jalr x1,-1180(x1) # 800385a4 + 80006a48: 00032097 auipc x1,0x32 + 80006a4c: bbc080e7 jalr x1,-1092(x1) # 80038604 + +0000000080006a50 : + 80006a50: 30002573 .word 0x30002573 + 80006a54: 00008067 jalr x0,0(x1) + 80006a58: 30059073 .word 0x30059073 + 80006a5c: 00008067 jalr x0,0(x1) + 80006a60: 3005a073 .word 0x3005a073 + 80006a64: 00008067 jalr x0,0(x1) + 80006a68: 3005b073 .word 0x3005b073 + 80006a6c: 00008067 jalr x0,0(x1) + 80006a70: 30402573 .word 0x30402573 + 80006a74: 00008067 jalr x0,0(x1) + 80006a78: 30459073 .word 0x30459073 + 80006a7c: 00008067 jalr x0,0(x1) + 80006a80: 3045a073 .word 0x3045a073 + 80006a84: 00008067 jalr x0,0(x1) + 80006a88: 3045b073 .word 0x3045b073 + 80006a8c: 00008067 jalr x0,0(x1) + 80006a90: 30602573 .word 0x30602573 + 80006a94: 00008067 jalr x0,0(x1) + 80006a98: 30659073 .word 0x30659073 + 80006a9c: 00008067 jalr x0,0(x1) + 80006aa0: 3065a073 .word 0x3065a073 + 80006aa4: 00008067 jalr x0,0(x1) + 80006aa8: 3065b073 .word 0x3065b073 + 80006aac: 00008067 jalr x0,0(x1) + 80006ab0: 30a02573 .word 0x30a02573 + 80006ab4: 00008067 jalr x0,0(x1) + 80006ab8: 30a59073 .word 0x30a59073 + 80006abc: 00008067 jalr x0,0(x1) + 80006ac0: 30a5a073 .word 0x30a5a073 + 80006ac4: 00008067 jalr x0,0(x1) + 80006ac8: 30a5b073 .word 0x30a5b073 + 80006acc: 00008067 jalr x0,0(x1) + 80006ad0: 34402573 .word 0x34402573 + 80006ad4: 00008067 jalr x0,0(x1) + 80006ad8: 34459073 .word 0x34459073 + 80006adc: 00008067 jalr x0,0(x1) + 80006ae0: 3445a073 .word 0x3445a073 + 80006ae4: 00008067 jalr x0,0(x1) + 80006ae8: 3445b073 .word 0x3445b073 + 80006aec: 00008067 jalr x0,0(x1) + 80006af0: 74702573 .word 0x74702573 + 80006af4: 00008067 jalr x0,0(x1) + 80006af8: 74759073 .word 0x74759073 + 80006afc: 00008067 jalr x0,0(x1) + 80006b00: 7475a073 .word 0x7475a073 + 80006b04: 00008067 jalr x0,0(x1) + 80006b08: 7475b073 .word 0x7475b073 + 80006b0c: 00008067 jalr x0,0(x1) + 80006b10: 32002573 .word 0x32002573 + 80006b14: 00008067 jalr x0,0(x1) + 80006b18: 32059073 .word 0x32059073 + 80006b1c: 00008067 jalr x0,0(x1) + 80006b20: 3205a073 .word 0x3205a073 + 80006b24: 00008067 jalr x0,0(x1) + 80006b28: 3205b073 .word 0x3205b073 + 80006b2c: 00008067 jalr x0,0(x1) + 80006b30: b0002573 .word 0xb0002573 + 80006b34: 00008067 jalr x0,0(x1) + 80006b38: b0059073 .word 0xb0059073 + 80006b3c: 00008067 jalr x0,0(x1) + 80006b40: b005a073 .word 0xb005a073 + 80006b44: 00008067 jalr x0,0(x1) + 80006b48: b005b073 .word 0xb005b073 + 80006b4c: 00008067 jalr x0,0(x1) + 80006b50: b0202573 .word 0xb0202573 + 80006b54: 00008067 jalr x0,0(x1) + 80006b58: b0259073 .word 0xb0259073 + 80006b5c: 00008067 jalr x0,0(x1) + 80006b60: b025a073 .word 0xb025a073 + 80006b64: 00008067 jalr x0,0(x1) + 80006b68: b025b073 .word 0xb025b073 + 80006b6c: 00008067 jalr x0,0(x1) + 80006b70: 10002573 .word 0x10002573 + 80006b74: 00008067 jalr x0,0(x1) + 80006b78: 10059073 .word 0x10059073 + 80006b7c: 00008067 jalr x0,0(x1) + 80006b80: 1005a073 .word 0x1005a073 + 80006b84: 00008067 jalr x0,0(x1) + 80006b88: 1005b073 .word 0x1005b073 + 80006b8c: 00008067 jalr x0,0(x1) + 80006b90: 10402573 .word 0x10402573 + 80006b94: 00008067 jalr x0,0(x1) + 80006b98: 10459073 .word 0x10459073 + 80006b9c: 00008067 jalr x0,0(x1) + 80006ba0: 1045a073 .word 0x1045a073 + 80006ba4: 00008067 jalr x0,0(x1) + 80006ba8: 1045b073 .word 0x1045b073 + 80006bac: 00008067 jalr x0,0(x1) + 80006bb0: 10602573 .word 0x10602573 + 80006bb4: 00008067 jalr x0,0(x1) + 80006bb8: 10659073 .word 0x10659073 + 80006bbc: 00008067 jalr x0,0(x1) + 80006bc0: 1065a073 .word 0x1065a073 + 80006bc4: 00008067 jalr x0,0(x1) + 80006bc8: 1065b073 .word 0x1065b073 + 80006bcc: 00008067 jalr x0,0(x1) + 80006bd0: 10a02573 .word 0x10a02573 + 80006bd4: 00008067 jalr x0,0(x1) + 80006bd8: 10a59073 .word 0x10a59073 + 80006bdc: 00008067 jalr x0,0(x1) + 80006be0: 10a5a073 .word 0x10a5a073 + 80006be4: 00008067 jalr x0,0(x1) + 80006be8: 10a5b073 .word 0x10a5b073 + 80006bec: 00008067 jalr x0,0(x1) + 80006bf0: 14402573 .word 0x14402573 + 80006bf4: 00008067 jalr x0,0(x1) + 80006bf8: 14459073 .word 0x14459073 + 80006bfc: 00008067 jalr x0,0(x1) + 80006c00: 1445a073 .word 0x1445a073 + 80006c04: 00008067 jalr x0,0(x1) + 80006c08: 1445b073 .word 0x1445b073 + 80006c0c: 00008067 jalr x0,0(x1) + 80006c10: 14d02573 .word 0x14d02573 + 80006c14: 00008067 jalr x0,0(x1) + 80006c18: 14d59073 .word 0x14d59073 + 80006c1c: 00008067 jalr x0,0(x1) + 80006c20: 14d5a073 .word 0x14d5a073 + 80006c24: 00008067 jalr x0,0(x1) + 80006c28: 14d5b073 .word 0x14d5b073 + 80006c2c: 00008067 jalr x0,0(x1) + 80006c30: 18002573 .word 0x18002573 + 80006c34: 00008067 jalr x0,0(x1) + 80006c38: 18059073 .word 0x18059073 + 80006c3c: 00008067 jalr x0,0(x1) + 80006c40: 1805a073 .word 0x1805a073 + 80006c44: 00008067 jalr x0,0(x1) + 80006c48: 1805b073 .word 0x1805b073 + 80006c4c: 00008067 jalr x0,0(x1) + 80006c50: 7a002573 .word 0x7a002573 + 80006c54: 00008067 jalr x0,0(x1) + 80006c58: 7a059073 .word 0x7a059073 + 80006c5c: 00008067 jalr x0,0(x1) + 80006c60: 7a05a073 .word 0x7a05a073 + 80006c64: 00008067 jalr x0,0(x1) + 80006c68: 7a05b073 .word 0x7a05b073 + 80006c6c: 00008067 jalr x0,0(x1) + 80006c70: 7a102573 .word 0x7a102573 + 80006c74: 00008067 jalr x0,0(x1) + 80006c78: 7a159073 .word 0x7a159073 + 80006c7c: 00008067 jalr x0,0(x1) + 80006c80: 7a15a073 .word 0x7a15a073 + 80006c84: 00008067 jalr x0,0(x1) + 80006c88: 7a15b073 .word 0x7a15b073 + 80006c8c: 00008067 jalr x0,0(x1) + 80006c90: 7a202573 .word 0x7a202573 + 80006c94: 00008067 jalr x0,0(x1) + 80006c98: 7a259073 .word 0x7a259073 + 80006c9c: 00008067 jalr x0,0(x1) + 80006ca0: 7a25a073 .word 0x7a25a073 + 80006ca4: 00008067 jalr x0,0(x1) + 80006ca8: 7a25b073 .word 0x7a25b073 + 80006cac: 00008067 jalr x0,0(x1) + 80006cb0: 7a302573 .word 0x7a302573 + 80006cb4: 00008067 jalr x0,0(x1) + 80006cb8: 7a359073 .word 0x7a359073 + 80006cbc: 00008067 jalr x0,0(x1) + 80006cc0: 7a35a073 .word 0x7a35a073 + 80006cc4: 00008067 jalr x0,0(x1) + 80006cc8: 7a35b073 .word 0x7a35b073 + 80006ccc: 00008067 jalr x0,0(x1) + 80006cd0: 7a402573 .word 0x7a402573 + 80006cd4: 00008067 jalr x0,0(x1) + 80006cd8: 7a459073 .word 0x7a459073 + 80006cdc: 00008067 jalr x0,0(x1) + 80006ce0: 7a45a073 .word 0x7a45a073 + 80006ce4: 00008067 jalr x0,0(x1) + 80006ce8: 7a45b073 .word 0x7a45b073 + 80006cec: 00008067 jalr x0,0(x1) + 80006cf0: 7a502573 .word 0x7a502573 + 80006cf4: 00008067 jalr x0,0(x1) + 80006cf8: 7a559073 .word 0x7a559073 + 80006cfc: 00008067 jalr x0,0(x1) + 80006d00: 7a55a073 .word 0x7a55a073 + 80006d04: 00008067 jalr x0,0(x1) + 80006d08: 7a55b073 .word 0x7a55b073 + 80006d0c: 00008067 jalr x0,0(x1) + 80006d10: 7a802573 .word 0x7a802573 + 80006d14: 00008067 jalr x0,0(x1) + 80006d18: 7a859073 .word 0x7a859073 + 80006d1c: 00008067 jalr x0,0(x1) + 80006d20: 7a85a073 .word 0x7a85a073 + 80006d24: 00008067 jalr x0,0(x1) + 80006d28: 7a85b073 .word 0x7a85b073 + 80006d2c: 00008067 jalr x0,0(x1) + 80006d30: 7aa02573 .word 0x7aa02573 + 80006d34: 00008067 jalr x0,0(x1) + 80006d38: 7aa59073 .word 0x7aa59073 + 80006d3c: 00008067 jalr x0,0(x1) + 80006d40: 7aa5a073 .word 0x7aa5a073 + 80006d44: 00008067 jalr x0,0(x1) + 80006d48: 7aa5b073 .word 0x7aa5b073 + 80006d4c: 00008067 jalr x0,0(x1) + 80006d50: 5a802573 .word 0x5a802573 + 80006d54: 00008067 jalr x0,0(x1) + 80006d58: 5a859073 .word 0x5a859073 + 80006d5c: 00008067 jalr x0,0(x1) + 80006d60: 5a85a073 .word 0x5a85a073 + 80006d64: 00008067 jalr x0,0(x1) + 80006d68: 5a85b073 .word 0x5a85b073 + 80006d6c: 00008067 jalr x0,0(x1) + 80006d70: 6a802573 .word 0x6a802573 + 80006d74: 00008067 jalr x0,0(x1) + 80006d78: 6a859073 .word 0x6a859073 + 80006d7c: 00008067 jalr x0,0(x1) + 80006d80: 6a85a073 .word 0x6a85a073 + 80006d84: 00008067 jalr x0,0(x1) + 80006d88: 6a85b073 .word 0x6a85b073 + 80006d8c: 00008067 jalr x0,0(x1) + 80006d90: 0005a503 lw x10,0(x11) + 80006d94: 00008067 jalr x0,0(x1) + 80006d98: 0045a503 lw x10,4(x11) + 80006d9c: 00008067 jalr x0,0(x1) + 80006da0: 00c5a023 sw x12,0(x11) + 80006da4: 00008067 jalr x0,0(x1) + 80006da8: 00c5a223 sw x12,4(x11) + 80006dac: 00008067 jalr x0,0(x1) + 80006db0: 0005b503 ld x10,0(x11) + 80006db4: 00008067 jalr x0,0(x1) + 80006db8: 00c5b023 sd x12,0(x11) + 80006dbc: 00008067 jalr x0,0(x1) + 80006dc0: 00000000 .word 0x00000000 + +0000000080006dc4 : + 80006dc4: 02000393 addi x7,x0,32 + 80006dc8: 00075c63 bge x14,x0,80006de0 + +0000000080006dcc : + 80006dcc: 00171413 slli x8,x14,0x1 + 80006dd0: ff240413 addi x8,x8,-14 + 80006dd4: 00045663 bge x8,x0,80006de0 + 80006dd8: 01800393 addi x7,x0,24 + 80006ddc: 0040006f jal x0,80006de0 + +0000000080006de0 : + 80006de0: ca810113 addi x2,x2,-856 + 80006de4: 5f013303 ld x6,1520(x2) + 80006de8: 007304b3 add x9,x6,x7 + 80006dec: 5e913823 sd x9,1520(x2) + 80006df0: 5d013403 ld x8,1488(x2) + 80006df4: 40830333 sub x6,x6,x8 + 80006df8: 35810113 addi x2,x2,856 + 80006dfc: 27813403 ld x8,632(x2) + 80006e00: 00830333 add x6,x6,x8 + 80006e04: 34102473 csrrs x8,mepc,x0 + 80006e08: 00000013 addi x0,x0,0 + 80006e0c: 00000013 addi x0,x0,0 + 80006e10: 00000013 addi x0,x0,0 + 80006e14: 00000013 addi x0,x0,0 + 80006e18: 00000013 addi x0,x0,0 + 80006e1c: 00000013 addi x0,x0,0 + 80006e20: 00011497 auipc x9,0x11 + 80006e24: cf848493 addi x9,x9,-776 # 80017b18 + 80006e28: 00000013 addi x0,x0,0 + 80006e2c: 00000013 addi x0,x0,0 + 80006e30: 00000013 addi x0,x0,0 + 80006e34: 00000013 addi x0,x0,0 + 80006e38: 00000013 addi x0,x0,0 + 80006e3c: 00000013 addi x0,x0,0 + 80006e40: 0084b023 sd x8,0(x9) + 80006e44: 00e4b423 sd x14,8(x9) + 80006e48: 34302473 csrrs x8,mtval,x0 + 80006e4c: 0084b823 sd x8,16(x9) + 80006e50: 30002473 csrrs x8,mstatus,x0 + 80006e54: 0084bc23 sd x8,24(x9) + 80006e58: 00000013 addi x0,x0,0 + 80006e5c: 00000013 addi x0,x0,0 + 80006e60: 00031417 auipc x8,0x31 + 80006e64: d6840413 addi x8,x8,-664 # 80037bc8 + 80006e68: 00000013 addi x0,x0,0 + 80006e6c: 00000013 addi x0,x0,0 + 80006e70: 00000013 addi x0,x0,0 + 80006e74: 00000013 addi x0,x0,0 + 80006e78: 00000013 addi x0,x0,0 + 80006e7c: 00000013 addi x0,x0,0 + 80006e80: 007304b3 add x9,x6,x7 + 80006e84: e4946663 bltu x8,x9,800064d0 + +0000000080006e88 : + 80006e88: 2c013403 ld x8,704(x2) + 80006e8c: 408787b3 sub x15,x15,x8 + 80006e90: 00179493 slli x9,x15,0x1 + 80006e94: 009787b3 add x15,x15,x9 + 80006e98: 0057d793 srli x15,x15,0x5 + 80006e9c: 00679793 slli x15,x15,0x6 + 80006ea0: 0077e7b3 or x15,x15,x7 + 80006ea4: 00378793 addi x15,x15,3 + 80006ea8: 02075a63 bge x14,x0,80006edc + 80006eac: 00f00413 addi x8,x0,15 + 80006eb0: 00877433 and x8,x14,x8 + 80006eb4: 304024f3 csrrs x9,mie,x0 + 80006eb8: 0084d4b3 srl x9,x9,x8 + 80006ebc: 0014f493 andi x9,x9,1 + 80006ec0: 00b49493 slli x9,x9,0xb + 80006ec4: 0097e7b3 or x15,x15,x9 + 80006ec8: 344024f3 csrrs x9,mip,x0 + 80006ecc: 0084d4b3 srl x9,x9,x8 + 80006ed0: 0014f493 andi x9,x9,1 + 80006ed4: 00c49493 slli x9,x9,0xc + 80006ed8: 0097e7b3 or x15,x15,x9 + 80006edc: 300023f3 csrrs x7,mstatus,x0 + 80006ee0: 02f39393 slli x7,x7,0x2f + 80006ee4: 0223d393 srli x7,x7,0x22 + 80006ee8: 00000437 lui x8,0x0 + 80006eec: 00040413 addi x8,x8,0 # 0 + 80006ef0: 00b41413 slli x8,x8,0xb + 80006ef4: 00140413 addi x8,x8,1 + 80006ef8: 00b41413 slli x8,x8,0xb + 80006efc: 06740413 addi x8,x8,103 + 80006f00: 00a41413 slli x8,x8,0xa + 80006f04: 3e540413 addi x8,x8,997 + 80006f08: fff44413 xori x8,x8,-1 + 80006f0c: 0083f433 and x8,x7,x8 + 80006f10: 0087e433 or x8,x15,x8 + 80006f14: 0204d493 srli x9,x9,0x20 + 80006f18: 1c04f493 andi x9,x9,448 + 80006f1c: 00849493 slli x9,x9,0x8 + 80006f20: 00946433 or x8,x8,x9 + 80006f24: 00033483 ld x9,0(x6) + 80006f28: 02848263 beq x9,x8,80006f4c + 80006f2c: 00040313 addi x6,x8,0 + 80006f30: 00048213 addi x4,x9,0 + 80006f34: 6b4003ef jal x7,800075e8 + 80006f38: 80006e88 .word 0x80006e88 + 80006f3c: 00000000 .word 0x00000000 + 80006f40: 800182f2 .word 0x800182f2 + 80006f44: 00000000 .word 0x00000000 + 80006f48: 00000341 .word 0x00000341 + +0000000080006f4c : + 80006f4c: 00070413 addi x8,x14,0 + 80006f50: 00833483 ld x9,8(x6) + 80006f54: 02848263 beq x9,x8,80006f78 + 80006f58: 00040313 addi x6,x8,0 + 80006f5c: 00048213 addi x4,x9,0 + 80006f60: 688003ef jal x7,800075e8 + 80006f64: 80006f4c .word 0x80006f4c + 80006f68: 00000000 .word 0x00000000 + 80006f6c: 800183f4 .word 0x800183f4 + 80006f70: 00000000 .word 0x00000000 + 80006f74: 00000341 .word 0x00000341 + 80006f78: 12074063 blt x14,x0,80007098 + +0000000080006f7c : + 80006f7c: 34102473 csrrs x8,mepc,x0 + 80006f80: 00010493 addi x9,x2,0 + 80006f84: 0040006f jal x0,80006f88 + +0000000080006f88 : + 80006f88: 08000393 addi x7,x0,128 + 80006f8c: 04740863 beq x8,x7,80006fdc + 80006f90: 00238393 addi x7,x7,2 + 80006f94: 04740463 beq x8,x7,80006fdc + 80006f98: 04040263 beq x8,x0,80006fdc + 80006f9c: 2884b383 ld x7,648(x9) + 80006fa0: 2904b783 ld x15,656(x9) + 80006fa4: 007787b3 add x15,x15,x7 + 80006fa8: 00f47463 bgeu x8,x15,80006fb0 + 80006fac: 02747663 bgeu x8,x7,80006fd8 + +0000000080006fb0 : + 80006fb0: 2584b383 ld x7,600(x9) + 80006fb4: 2604b783 ld x15,608(x9) + 80006fb8: 007787b3 add x15,x15,x7 + 80006fbc: 00f47463 bgeu x8,x15,80006fc4 + 80006fc0: 00747c63 bgeu x8,x7,80006fd8 + +0000000080006fc4 : + 80006fc4: 2684b383 ld x7,616(x9) + 80006fc8: 2704b783 ld x15,624(x9) + 80006fcc: 007787b3 add x15,x15,x7 + 80006fd0: d2f47a63 bgeu x8,x15,80006504 + 80006fd4: d2746863 bltu x8,x7,80006504 + +0000000080006fd8 : + 80006fd8: 40740433 sub x8,x8,x7 + +0000000080006fdc : + 80006fdc: 01033483 ld x9,16(x6) + 80006fe0: 02848263 beq x9,x8,80007004 + 80006fe4: 00040313 addi x6,x8,0 + 80006fe8: 00048213 addi x4,x9,0 + 80006fec: 5fc003ef jal x7,800075e8 + 80006ff0: 80006fdc .word 0x80006fdc + 80006ff4: 00000000 .word 0x00000000 + 80006ff8: 800184ef .word 0x800184ef + 80006ffc: 00000000 .word 0x00000000 + 80007000: 00000341 .word 0x00000341 + +0000000080007004 : + 80007004: 34102473 csrrs x8,mepc,x0 + 80007008: 342023f3 csrrs x7,mcause,x0 + 8000700c: 00c00793 addi x15,x0,12 + 80007010: 00f38a63 beq x7,x15,80007024 + 80007014: 00100793 addi x15,x0,1 + 80007018: 00f38663 beq x7,x15,80007024 + 8000701c: 01400793 addi x15,x0,20 + 80007020: 00f39663 bne x7,x15,8000702c + 80007024: 34109073 csrrw x0,mepc,x1 + 80007028: 0100006f jal x0,80007038 + +000000008000702c : + 8000702c: 00400393 addi x7,x0,4 + 80007030: 00740433 add x8,x8,x7 + 80007034: 34141073 csrrw x0,mepc,x8 + +0000000080007038 : + 80007038: 34302473 csrrs x8,mtval,x0 + +000000008000703c : + 8000703c: 01833483 ld x9,24(x6) + 80007040: 02848263 beq x9,x8,80007064 + 80007044: 00040313 addi x6,x8,0 + 80007048: 00048213 addi x4,x9,0 + 8000704c: 59c003ef jal x7,800075e8 + 80007050: 8000703c .word 0x8000703c + 80007054: 00000000 .word 0x00000000 + 80007058: 800185e2 .word 0x800185e2 + 8000705c: 00000000 .word 0x00000000 + 80007060: 00000341 .word 0x00000341 + +0000000080007064 : + 80007064: 30102473 csrrs x8,misa,x0 + 80007068: 03841413 slli x8,x8,0x38 + 8000706c: 00045263 bge x8,x0,80007070 + +0000000080007070 : + 80007070: 20000393 addi x7,x0,512 + 80007074: 0640006f jal x0,800070d8 + +0000000080007078 : + 80007078: 2e013303 ld x6,736(x2) + 8000707c: 2e813383 ld x7,744(x2) + 80007080: 2f013403 ld x8,752(x2) + 80007084: 2f813483 ld x9,760(x2) + 80007088: 30013703 ld x14,768(x2) + 8000708c: 30813783 ld x15,776(x2) + 80007090: 31013103 ld x2,784(x2) + 80007094: 30200073 mret + +0000000080007098 : + 80007098: 00100413 addi x8,x0,1 + 8000709c: 01f77393 andi x7,x14,31 + 800070a0: 00741433 sll x8,x8,x7 + 800070a4: 304434f3 csrrc x9,mie,x8 + 800070a8: 34443473 csrrc x8,mip,x8 + +00000000800070ac : + 800070ac: 01033483 ld x9,16(x6) + 800070b0: 02848263 beq x9,x8,800070d4 + 800070b4: 00040313 addi x6,x8,0 + 800070b8: 00048213 addi x4,x9,0 + 800070bc: 52c003ef jal x7,800075e8 + 800070c0: 800070ac .word 0x800070ac + 800070c4: 00000000 .word 0x00000000 + 800070c8: 80018755 .word 0x80018755 + 800070cc: 00000000 .word 0x00000000 + 800070d0: 00000341 .word 0x00000341 + 800070d4: 00000393 addi x7,x0,0 + +00000000800070d8 : + 800070d8: 00000417 auipc x8,0x0 + 800070dc: 03c40413 addi x8,x8,60 # 80007114 + 800070e0: 00740433 add x8,x8,x7 + 800070e4: 00371393 slli x7,x14,0x3 + 800070e8: 00740433 add x8,x8,x7 + 800070ec: ff847413 andi x8,x8,-8 + 800070f0: 00043403 ld x8,0(x8) + +00000000800070f4 : + 800070f4: 00040a63 beq x8,x0,80007108 + 800070f8: 03f41393 slli x7,x8,0x3f + 800070fc: 0003d863 bge x7,x0,8000710c + 80007100: 00145413 srli x8,x8,0x1 + 80007104: f6870ae3 beq x14,x8,80007078 + 80007108: bfcff06f jal x0,80006504 + +000000008000710c : + 8000710c: 00040067 jalr x0,0(x8) + +0000000080007110 : + ... + 80007118: 00000001 .word 0x00000001 + 8000711c: 00000000 .word 0x00000000 + 80007120: 00000001 .word 0x00000001 + 80007124: 00000000 .word 0x00000000 + 80007128: 80038000 .word 0x80038000 + ... + 80007138: 00000001 .word 0x00000001 + 8000713c: 00000000 .word 0x00000000 + 80007140: 00000001 .word 0x00000001 + 80007144: 00000000 .word 0x00000000 + 80007148: 80038014 .word 0x80038014 + ... + 80007158: 00000001 .word 0x00000001 + 8000715c: 00000000 .word 0x00000000 + 80007160: 00000001 .word 0x00000001 + 80007164: 00000000 .word 0x00000000 + 80007168: 8003802c .word 0x8003802c + 8000716c: 00000000 .word 0x00000000 + 80007170: 00000001 .word 0x00000001 + 80007174: 00000000 .word 0x00000000 + 80007178: 00000001 .word 0x00000001 + 8000717c: 00000000 .word 0x00000000 + 80007180: 00000001 .word 0x00000001 + 80007184: 00000000 .word 0x00000000 + 80007188: 00000001 .word 0x00000001 + 8000718c: 00000000 .word 0x00000000 + 80007190: 00000001 .word 0x00000001 + 80007194: 00000000 .word 0x00000000 + 80007198: 00000001 .word 0x00000001 + 8000719c: 00000000 .word 0x00000000 + 800071a0: 00000001 .word 0x00000001 + 800071a4: 00000000 .word 0x00000000 + 800071a8: 00000001 .word 0x00000001 + 800071ac: 00000000 .word 0x00000000 + 800071b0: 00000001 .word 0x00000001 + 800071b4: 00000000 .word 0x00000000 + 800071b8: 00000001 .word 0x00000001 + 800071bc: 00000000 .word 0x00000000 + 800071c0: 00000001 .word 0x00000001 + 800071c4: 00000000 .word 0x00000000 + 800071c8: 00000001 .word 0x00000001 + ... + +0000000080007310 : + 80007310: 00000001 .word 0x00000001 + 80007314: 00000000 .word 0x00000000 + 80007318: 00000003 .word 0x00000003 + 8000731c: 00000000 .word 0x00000000 + 80007320: 00000005 .word 0x00000005 + 80007324: 00000000 .word 0x00000000 + 80007328: 00000007 .word 0x00000007 + 8000732c: 00000000 .word 0x00000000 + 80007330: 00000009 .word 0x00000009 + 80007334: 00000000 .word 0x00000000 + 80007338: 0000000b .word 0x0000000b + 8000733c: 00000000 .word 0x00000000 + 80007340: 0000000d .word 0x0000000d + 80007344: 00000000 .word 0x00000000 + 80007348: 0000000f .word 0x0000000f + 8000734c: 00000000 .word 0x00000000 + 80007350: 00000011 .word 0x00000011 + 80007354: 00000000 .word 0x00000000 + 80007358: 00000013 .word 0x00000013 + 8000735c: 00000000 .word 0x00000000 + 80007360: 00000015 .word 0x00000015 + 80007364: 00000000 .word 0x00000000 + 80007368: 00000017 .word 0x00000017 + 8000736c: 00000000 .word 0x00000000 + 80007370: 00000019 .word 0x00000019 + 80007374: 00000000 .word 0x00000000 + 80007378: 0000001b .word 0x0000001b + 8000737c: 00000000 .word 0x00000000 + 80007380: 0000001d .word 0x0000001d + 80007384: 00000000 .word 0x00000000 + 80007388: 0000001f .word 0x0000001f + 8000738c: 00000000 .word 0x00000000 + 80007390: 00000021 .word 0x00000021 + 80007394: 00000000 .word 0x00000000 + 80007398: 00000023 .word 0x00000023 + 8000739c: 00000000 .word 0x00000000 + 800073a0: 00000025 .word 0x00000025 + 800073a4: 00000000 .word 0x00000000 + 800073a8: 00000027 .word 0x00000027 + 800073ac: 00000000 .word 0x00000000 + 800073b0: 00000029 .word 0x00000029 + 800073b4: 00000000 .word 0x00000000 + 800073b8: 0000002b .word 0x0000002b + 800073bc: 00000000 .word 0x00000000 + 800073c0: 0000002d .word 0x0000002d + 800073c4: 00000000 .word 0x00000000 + 800073c8: 0000002f .word 0x0000002f + ... + +0000000080007510 : + 80007510: 300023f3 csrrs x7,mstatus,x0 + 80007514: 00b3d493 srli x9,x7,0xb + 80007518: 0034f493 andi x9,x9,3 + 8000751c: ffd48413 addi x8,x9,-3 + 80007520: 341023f3 csrrs x7,mepc,x0 + 80007524: 00000493 addi x9,x0,0 + 80007528: 02040c63 beq x8,x0,80007560 + 8000752c: 35810113 addi x2,x2,856 + 80007530: 300023f3 csrrs x7,mstatus,x0 + 80007534: 01839393 slli x7,x7,0x18 + 80007538: 0003da63 bge x7,x0,8000754c + +000000008000753c : + 8000753c: 35810113 addi x2,x2,856 + 80007540: 5b013783 ld x15,1456(x2) + 80007544: ca810113 addi x2,x2,-856 + 80007548: 0080006f jal x0,80007550 + +000000008000754c : + 8000754c: f0013783 ld x15,-256(x2) + 80007550: 341023f3 csrrs x7,mepc,x0 + 80007554: 40f383b3 sub x7,x7,x15 + 80007558: ca810113 addi x2,x2,-856 + 8000755c: 25813483 ld x9,600(x2) + +0000000080007560 : + 80007560: 007483b3 add x7,x9,x7 + 80007564: 2e013303 ld x6,736(x2) + 80007568: 2f013403 ld x8,752(x2) + 8000756c: 2f813483 ld x9,760(x2) + 80007570: 30013703 ld x14,768(x2) + 80007574: 30813783 ld x15,776(x2) + 80007578: 31013103 ld x2,784(x2) + 8000757c: 00438067 jalr x0,4(x7) + +0000000080007580 : + 80007580: 00010217 auipc x4,0x10 + 80007584: 45020213 addi x4,x4,1104 # 800179d0 + 80007588: 02523423 sd x5,40(x4) # 28 + 8000758c: 00123423 sd x1,8(x4) # 8 + 80007590: 00023023 sd x0,0(x4) # 0 + 80007594: 0880006f jal x0,8000761c + +0000000080007598 : + 80007598: 00010397 auipc x7,0x10 + 8000759c: 43838393 addi x7,x7,1080 # 800179d0 + 800075a0: 0483b023 sd x8,64(x7) + 800075a4: 0243b023 sd x4,32(x7) + 800075a8: 0253b423 sd x5,40(x7) + 800075ac: 0013b423 sd x1,8(x7) + 800075b0: 0003b023 sd x0,0(x7) + 800075b4: 00038213 addi x4,x7,0 + 800075b8: 00040293 addi x5,x8,0 + 800075bc: 0600006f jal x0,8000761c + +00000000800075c0 : + 800075c0: 00010697 auipc x13,0x10 + 800075c4: 41068693 addi x13,x13,1040 # 800179d0 + 800075c8: 06e6b823 sd x14,112(x13) + 800075cc: 0246b023 sd x4,32(x13) + 800075d0: 0256b423 sd x5,40(x13) + 800075d4: 0016b423 sd x1,8(x13) + 800075d8: 0006b023 sd x0,0(x13) + 800075dc: 00068213 addi x4,x13,0 + 800075e0: 00070293 addi x5,x14,0 + 800075e4: 0380006f jal x0,8000761c + +00000000800075e8 : + 800075e8: 00010497 auipc x9,0x10 + 800075ec: 3e848493 addi x9,x9,1000 # 800179d0 + 800075f0: 0674b423 sd x7,104(x9) + 800075f4: 0244b023 sd x4,32(x9) + 800075f8: 0254b423 sd x5,40(x9) + 800075fc: 0014b423 sd x1,8(x9) + 80007600: 00300093 addi x1,x0,3 + 80007604: 0014b023 sd x1,0(x9) + 80007608: 1064b823 sd x6,272(x9) + 8000760c: 1044bc23 sd x4,280(x9) + 80007610: 00048213 addi x4,x9,0 + 80007614: 00038293 addi x5,x7,0 + 80007618: 0040006f jal x0,8000761c + +000000008000761c : + 8000761c: 00223823 sd x2,16(x4) # 10 + 80007620: 00323c23 sd x3,24(x4) # 18 + 80007624: 02623823 sd x6,48(x4) # 30 + 80007628: 02723c23 sd x7,56(x4) # 38 + 8000762c: 04823023 sd x8,64(x4) # 40 + 80007630: 04923423 sd x9,72(x4) # 48 + 80007634: 04a23823 sd x10,80(x4) # 50 + 80007638: 04b23c23 sd x11,88(x4) # 58 + 8000763c: 06c23023 sd x12,96(x4) # 60 + 80007640: 06d23423 sd x13,104(x4) # 68 + 80007644: 06e23823 sd x14,112(x4) # 70 + 80007648: 06f23c23 sd x15,120(x4) # 78 + 8000764c: 09023023 sd x16,128(x4) # 80 + 80007650: 09123423 sd x17,136(x4) # 88 + 80007654: 09223823 sd x18,144(x4) # 90 + 80007658: 09323c23 sd x19,152(x4) # 98 + 8000765c: 0b423023 sd x20,160(x4) # a0 + 80007660: 0b523423 sd x21,168(x4) # a8 + 80007664: 0b623823 sd x22,176(x4) # b0 + 80007668: 0b723c23 sd x23,184(x4) # b8 + 8000766c: 0d823023 sd x24,192(x4) # c0 + 80007670: 0d923423 sd x25,200(x4) # c8 + 80007674: 0da23823 sd x26,208(x4) # d0 + 80007678: 0db23c23 sd x27,216(x4) # d8 + 8000767c: 0fc23023 sd x28,224(x4) # e0 + 80007680: 0fd23423 sd x29,232(x4) # e8 + 80007684: 0fe23823 sd x30,240(x4) # f0 + 80007688: 0ff23c23 sd x31,248(x4) # f8 + +000000008000768c : + 8000768c: 00010497 auipc x9,0x10 + 80007690: 3444a483 lw x9,836(x9) # 800179d0 + 80007694: 00300513 addi x10,x0,3 + 80007698: 18a48a63 beq x9,x10,8000782c + +000000008000769c : + 8000769c: ffa2d303 lhu x6,-6(x5) + 800076a0: ff82d383 lhu x7,-8(x5) + 800076a4: 01031313 slli x6,x6,0x10 + 800076a8: 00736333 or x6,x6,x7 + 800076ac: 00f35393 srli x7,x6,0xf + 800076b0: 01f3f393 andi x7,x7,31 + 800076b4: 01435413 srli x8,x6,0x14 + 800076b8: 01f47413 andi x8,x8,31 + 800076bc: 10822223 sw x8,260(x4) # 104 + 800076c0: 00341313 slli x6,x8,0x3 + 800076c4: 00620333 add x6,x4,x6 + 800076c8: 00033303 ld x6,0(x6) + 800076cc: 10623823 sd x6,272(x4) # 110 + 800076d0: ff62d303 lhu x6,-10(x5) + 800076d4: ff42d383 lhu x7,-12(x5) + 800076d8: 01031313 slli x6,x6,0x10 + 800076dc: 00736333 or x6,x6,x7 + 800076e0: 00030513 addi x10,x6,0 + 800076e4: 07f37413 andi x8,x6,127 + 800076e8: 00300493 addi x9,x0,3 + 800076ec: 0c941463 bne x8,x9,800077b4 + 800076f0: 00c35413 srli x8,x6,0xc + 800076f4: 00747413 andi x8,x8,7 + 800076f8: 00300493 addi x9,x0,3 + 800076fc: 0a941c63 bne x8,x9,800077b4 + 80007700: 41435393 srai x7,x6,0x14 + 80007704: 00f35313 srli x6,x6,0xf + 80007708: 01f37313 andi x6,x6,31 + 8000770c: 00331313 slli x6,x6,0x3 + 80007710: 00620333 add x6,x4,x6 + 80007714: 00033303 ld x6,0(x6) + 80007718: 00730333 add x6,x6,x7 + 8000771c: 00737413 andi x8,x6,7 + 80007720: 0c041663 bne x8,x0,800077ec + 80007724: 00000013 addi x0,x0,0 + 80007728: 00000013 addi x0,x0,0 + 8000772c: 00000013 addi x0,x0,0 + 80007730: 00000013 addi x0,x0,0 + 80007734: 00000013 addi x0,x0,0 + 80007738: 00000013 addi x0,x0,0 + 8000773c: 00000013 addi x0,x0,0 + 80007740: 00012417 auipc x8,0x12 + 80007744: 07040413 addi x8,x8,112 # 800197b0 + 80007748: 00000013 addi x0,x0,0 + 8000774c: 00000013 addi x0,x0,0 + 80007750: 00000013 addi x0,x0,0 + 80007754: 00000013 addi x0,x0,0 + 80007758: 00000013 addi x0,x0,0 + 8000775c: 00000013 addi x0,x0,0 + 80007760: 08836663 bltu x6,x8,800077ec + 80007764: 00000013 addi x0,x0,0 + 80007768: 00000013 addi x0,x0,0 + 8000776c: 00000013 addi x0,x0,0 + 80007770: 00000013 addi x0,x0,0 + 80007774: 00000013 addi x0,x0,0 + 80007778: 00000013 addi x0,x0,0 + 8000777c: 00000013 addi x0,x0,0 + 80007780: 00030417 auipc x8,0x30 + 80007784: 45040413 addi x8,x8,1104 # 80037bd0 + 80007788: 00000013 addi x0,x0,0 + 8000778c: 00000013 addi x0,x0,0 + 80007790: 00000013 addi x0,x0,0 + 80007794: 00000013 addi x0,x0,0 + 80007798: 00000013 addi x0,x0,0 + 8000779c: 00000013 addi x0,x0,0 + 800077a0: ff840413 addi x8,x8,-8 + 800077a4: 04646463 bltu x8,x6,800077ec + 800077a8: 00033303 ld x6,0(x6) + 800077ac: 10623c23 sd x6,280(x4) # 118 + 800077b0: 3880006f jal x0,80007b38 + +00000000800077b4 : + 800077b4: 00100413 addi x8,x0,1 + 800077b8: 00000013 addi x0,x0,0 + 800077bc: 00000013 addi x0,x0,0 + 800077c0: 00010497 auipc x9,0x10 + 800077c4: 33848493 addi x9,x9,824 # 80017af8 + 800077c8: 00000013 addi x0,x0,0 + 800077cc: 00000013 addi x0,x0,0 + 800077d0: 00000013 addi x0,x0,0 + 800077d4: 00000013 addi x0,x0,0 + 800077d8: 00000013 addi x0,x0,0 + 800077dc: 00000013 addi x0,x0,0 + 800077e0: 0084a023 sw x8,0(x9) + 800077e4: 10a23c23 sd x10,280(x4) # 118 + 800077e8: 3500006f jal x0,80007b38 + +00000000800077ec : + 800077ec: 00200413 addi x8,x0,2 + 800077f0: 00000013 addi x0,x0,0 + 800077f4: 00000013 addi x0,x0,0 + 800077f8: 00000013 addi x0,x0,0 + 800077fc: 00000013 addi x0,x0,0 + 80007800: 00010497 auipc x9,0x10 + 80007804: 2f848493 addi x9,x9,760 # 80017af8 + 80007808: 00000013 addi x0,x0,0 + 8000780c: 00000013 addi x0,x0,0 + 80007810: 00000013 addi x0,x0,0 + 80007814: 00000013 addi x0,x0,0 + 80007818: 00000013 addi x0,x0,0 + 8000781c: 00000013 addi x0,x0,0 + 80007820: 0084a023 sw x8,0(x9) + 80007824: 10623c23 sd x6,280(x4) # 118 + 80007828: 3100006f jal x0,80007b38 + +000000008000782c : + 8000782c: 0082e303 lwu x6,8(x5) + 80007830: 00c2a383 lw x7,12(x5) + 80007834: 02039393 slli x7,x7,0x20 + 80007838: 00736333 or x6,x6,x7 + 8000783c: 00010817 auipc x16,0x10 + 80007840: 2cc80813 addi x16,x16,716 # 80017b08 + 80007844: 00683023 sd x6,0(x16) + 80007848: 0002e303 lwu x6,0(x5) + 8000784c: 0042a383 lw x7,4(x5) + 80007850: 02039393 slli x7,x7,0x20 + 80007854: 00736333 or x6,x6,x7 + 80007858: 10623423 sd x6,264(x4) # 108 + 8000785c: 00010817 auipc x16,0x10 + 80007860: 2ac80813 addi x16,x16,684 # 80017b08 + 80007864: 00083303 ld x6,0(x16) + 80007868: 00011397 auipc x7,0x11 + 8000786c: a7338393 addi x7,x7,-1421 # 800182db + 80007870: 28730463 beq x6,x7,80007af8 + 80007874: 00000413 addi x8,x0,0 + 80007878: 00010817 auipc x16,0x10 + 8000787c: 28880813 addi x16,x16,648 # 80017b00 + 80007880: 00882023 sw x8,0(x16) + 80007884: 00011397 auipc x7,0x11 + 80007888: a6e38393 addi x7,x7,-1426 # 800182f2 + 8000788c: 00731863 bne x6,x7,8000789c + 80007890: 00100413 addi x8,x0,1 + 80007894: 00000493 addi x9,x0,0 + 80007898: 2740006f jal x0,80007b0c + 8000789c: 00011397 auipc x7,0x11 + 800078a0: b5838393 addi x7,x7,-1192 # 800183f4 + 800078a4: 00731863 bne x6,x7,800078b4 + 800078a8: 00200413 addi x8,x0,2 + 800078ac: 00000493 addi x9,x0,0 + 800078b0: 25c0006f jal x0,80007b0c + 800078b4: 00011397 auipc x7,0x11 + 800078b8: c3b38393 addi x7,x7,-965 # 800184ef + 800078bc: 00731863 bne x6,x7,800078cc + 800078c0: 00300413 addi x8,x0,3 + 800078c4: 00000493 addi x9,x0,0 + 800078c8: 2440006f jal x0,80007b0c + 800078cc: 00011397 auipc x7,0x11 + 800078d0: d1638393 addi x7,x7,-746 # 800185e2 + 800078d4: 00731863 bne x6,x7,800078e4 + 800078d8: 00400413 addi x8,x0,4 + 800078dc: 00000493 addi x9,x0,0 + 800078e0: 22c0006f jal x0,80007b0c + 800078e4: 00011397 auipc x7,0x11 + 800078e8: e7138393 addi x7,x7,-399 # 80018755 + 800078ec: 00731863 bne x6,x7,800078fc + 800078f0: 00500413 addi x8,x0,5 + 800078f4: 00000493 addi x9,x0,0 + 800078f8: 2140006f jal x0,80007b0c + 800078fc: 00011397 auipc x7,0x11 + 80007900: ddd38393 addi x7,x7,-547 # 800186d9 + 80007904: 00731863 bne x6,x7,80007914 + 80007908: 00600413 addi x8,x0,6 + 8000790c: 00000493 addi x9,x0,0 + 80007910: 1fc0006f jal x0,80007b0c + 80007914: 00011397 auipc x7,0x11 + 80007918: e0338393 addi x7,x7,-509 # 80018717 + 8000791c: 00731863 bne x6,x7,8000792c + 80007920: 00700413 addi x8,x0,7 + 80007924: 00000493 addi x9,x0,0 + 80007928: 1e40006f jal x0,80007b0c + 8000792c: 00011397 auipc x7,0x11 + 80007930: a0638393 addi x7,x7,-1530 # 80018332 + 80007934: 00731863 bne x6,x7,80007944 + 80007938: 00100413 addi x8,x0,1 + 8000793c: 00100493 addi x9,x0,1 + 80007940: 1cc0006f jal x0,80007b0c + 80007944: 00011397 auipc x7,0x11 + 80007948: aee38393 addi x7,x7,-1298 # 80018432 + 8000794c: 00731863 bne x6,x7,8000795c + 80007950: 00200413 addi x8,x0,2 + 80007954: 00100493 addi x9,x0,1 + 80007958: 1b40006f jal x0,80007b0c + 8000795c: 00011397 auipc x7,0x11 + 80007960: bcf38393 addi x7,x7,-1073 # 8001852b + 80007964: 00731863 bne x6,x7,80007974 + 80007968: 00300413 addi x8,x0,3 + 8000796c: 00100493 addi x9,x0,1 + 80007970: 19c0006f jal x0,80007b0c + 80007974: 00011397 auipc x7,0x11 + 80007978: cab38393 addi x7,x7,-853 # 8001861f + 8000797c: 00731863 bne x6,x7,8000798c + 80007980: 00400413 addi x8,x0,4 + 80007984: 00100493 addi x9,x0,1 + 80007988: 1840006f jal x0,80007b0c + 8000798c: 00011397 auipc x7,0x11 + 80007990: e0438393 addi x7,x7,-508 # 80018790 + 80007994: 00731863 bne x6,x7,800079a4 + 80007998: 00500413 addi x8,x0,5 + 8000799c: 00100493 addi x9,x0,1 + 800079a0: 16c0006f jal x0,80007b0c + 800079a4: 00011397 auipc x7,0x11 + 800079a8: 9ce38393 addi x7,x7,-1586 # 80018372 + 800079ac: 00731863 bne x6,x7,800079bc + 800079b0: 00100413 addi x8,x0,1 + 800079b4: 00200493 addi x9,x0,2 + 800079b8: 1540006f jal x0,80007b0c + 800079bc: 00011397 auipc x7,0x11 + 800079c0: ab438393 addi x7,x7,-1356 # 80018470 + 800079c4: 00731863 bne x6,x7,800079d4 + 800079c8: 00200413 addi x8,x0,2 + 800079cc: 00200493 addi x9,x0,2 + 800079d0: 13c0006f jal x0,80007b0c + 800079d4: 00011397 auipc x7,0x11 + 800079d8: b9338393 addi x7,x7,-1133 # 80018567 + 800079dc: 00731863 bne x6,x7,800079ec + 800079e0: 00300413 addi x8,x0,3 + 800079e4: 00200493 addi x9,x0,2 + 800079e8: 1240006f jal x0,80007b0c + 800079ec: 00011397 auipc x7,0x11 + 800079f0: c7038393 addi x7,x7,-912 # 8001865c + 800079f4: 00731863 bne x6,x7,80007a04 + 800079f8: 00400413 addi x8,x0,4 + 800079fc: 00200493 addi x9,x0,2 + 80007a00: 10c0006f jal x0,80007b0c + 80007a04: 00011397 auipc x7,0x11 + 80007a08: dc738393 addi x7,x7,-569 # 800187cb + 80007a0c: 00731863 bne x6,x7,80007a1c + 80007a10: 00500413 addi x8,x0,5 + 80007a14: 00200493 addi x9,x0,2 + 80007a18: 0f40006f jal x0,80007b0c + 80007a1c: 00011397 auipc x7,0x11 + 80007a20: 99738393 addi x7,x7,-1641 # 800183b3 + 80007a24: 00731863 bne x6,x7,80007a34 + 80007a28: 00100413 addi x8,x0,1 + 80007a2c: 00300493 addi x9,x0,3 + 80007a30: 0dc0006f jal x0,80007b0c + 80007a34: 00011397 auipc x7,0x11 + 80007a38: a7b38393 addi x7,x7,-1413 # 800184af + 80007a3c: 00731863 bne x6,x7,80007a4c + 80007a40: 00200413 addi x8,x0,2 + 80007a44: 00300493 addi x9,x0,3 + 80007a48: 0c40006f jal x0,80007b0c + 80007a4c: 00011397 auipc x7,0x11 + 80007a50: b5838393 addi x7,x7,-1192 # 800185a4 + 80007a54: 00731863 bne x6,x7,80007a64 + 80007a58: 00300413 addi x8,x0,3 + 80007a5c: 00300493 addi x9,x0,3 + 80007a60: 0ac0006f jal x0,80007b0c + 80007a64: 00011397 auipc x7,0x11 + 80007a68: c3638393 addi x7,x7,-970 # 8001869a + 80007a6c: 00731863 bne x6,x7,80007a7c + 80007a70: 00400413 addi x8,x0,4 + 80007a74: 00300493 addi x9,x0,3 + 80007a78: 0940006f jal x0,80007b0c + 80007a7c: 00011397 auipc x7,0x11 + 80007a80: d8b38393 addi x7,x7,-629 # 80018807 + 80007a84: 00731863 bne x6,x7,80007a94 + 80007a88: 00500413 addi x8,x0,5 + 80007a8c: 00300493 addi x9,x0,3 + 80007a90: 07c0006f jal x0,80007b0c + 80007a94: 00011397 auipc x7,0x11 + 80007a98: db038393 addi x7,x7,-592 # 80018844 + 80007a9c: 00731863 bne x6,x7,80007aac + 80007aa0: 00800413 addi x8,x0,8 + 80007aa4: 00000493 addi x9,x0,0 + 80007aa8: 0640006f jal x0,80007b0c + 80007aac: 00011397 auipc x7,0x11 + 80007ab0: de738393 addi x7,x7,-537 # 80018893 + 80007ab4: 00731863 bne x6,x7,80007ac4 + 80007ab8: 00800413 addi x8,x0,8 + 80007abc: 00000493 addi x9,x0,0 + 80007ac0: 04c0006f jal x0,80007b0c + 80007ac4: 00011397 auipc x7,0x11 + 80007ac8: eca38393 addi x7,x7,-310 # 8001898e + 80007acc: 00731863 bne x6,x7,80007adc + 80007ad0: 00800413 addi x8,x0,8 + 80007ad4: 00100493 addi x9,x0,1 + 80007ad8: 0340006f jal x0,80007b0c + 80007adc: 00011397 auipc x7,0x11 + 80007ae0: fae38393 addi x7,x7,-82 # 80018a8a + 80007ae4: 00731863 bne x6,x7,80007af4 + 80007ae8: 00800413 addi x8,x0,8 + 80007aec: 00200493 addi x9,x0,2 + 80007af0: 01c0006f jal x0,80007b0c + 80007af4: 0340006f jal x0,80007b28 + +0000000080007af8 : + 80007af8: 00900413 addi x8,x0,9 + 80007afc: 00010817 auipc x16,0x10 + 80007b00: 00480813 addi x16,x16,4 # 80017b00 + 80007b04: 00882023 sw x8,0(x16) + 80007b08: 0300006f jal x0,80007b38 + +0000000080007b0c : + 80007b0c: 00010817 auipc x16,0x10 + 80007b10: ff480813 addi x16,x16,-12 # 80017b00 + 80007b14: 00882023 sw x8,0(x16) + 80007b18: 00010817 auipc x16,0x10 + 80007b1c: fec80813 addi x16,x16,-20 # 80017b04 + 80007b20: 00982023 sw x9,0(x16) + 80007b24: 0140006f jal x0,80007b38 + +0000000080007b28 : + 80007b28: 00010817 auipc x16,0x10 + 80007b2c: fd880813 addi x16,x16,-40 # 80017b00 + 80007b30: 00082023 sw x0,0(x16) + 80007b34: 0040006f jal x0,80007b38 + +0000000080007b38 : + 80007b38: 0002e303 lwu x6,0(x5) + 80007b3c: 0042a383 lw x7,4(x5) + 80007b40: 02039393 slli x7,x7,0x20 + 80007b44: 00736333 or x6,x6,x7 + 80007b48: 10623423 sd x6,264(x4) # 108 + 80007b4c: 00035383 lhu x7,0(x6) + 80007b50: 0033f413 andi x8,x7,3 + 80007b54: 00300493 addi x9,x0,3 + 80007b58: 00941863 bne x8,x9,80007b68 + 80007b5c: 00235403 lhu x8,2(x6) + 80007b60: 01041413 slli x8,x8,0x10 + 80007b64: 0083e3b3 or x7,x7,x8 + 80007b68: 10722023 sw x7,256(x4) # 100 + 80007b6c: 0082e303 lwu x6,8(x5) + 80007b70: 00c2a383 lw x7,12(x5) + 80007b74: 02039393 slli x7,x7,0x20 + 80007b78: 00736333 or x6,x6,x7 + 80007b7c: 12623023 sd x6,288(x4) # 120 + +0000000080007b80 : + 80007b80: 00010517 auipc x10,0x10 + 80007b84: 56e50513 addi x10,x10,1390 # 800180ee + 80007b88: 00000013 addi x0,x0,0 + 80007b8c: 00000013 addi x0,x0,0 + 80007b90: 00000013 addi x0,x0,0 + 80007b94: 00000013 addi x0,x0,0 + 80007b98: 00000013 addi x0,x0,0 + 80007b9c: 00000013 addi x0,x0,0 + 80007ba0: 00031097 auipc x1,0x31 + 80007ba4: a04080e7 jalr x1,-1532(x1) # 800385a4 + 80007ba8: 00000013 addi x0,x0,0 + 80007bac: 00000013 addi x0,x0,0 + 80007bb0: 00000013 addi x0,x0,0 + 80007bb4: 00000013 addi x0,x0,0 + 80007bb8: 00000013 addi x0,x0,0 + 80007bbc: 00000013 addi x0,x0,0 + 80007bc0: 00010517 auipc x10,0x10 + 80007bc4: 56750513 addi x10,x10,1383 # 80018127 + 80007bc8: 00000013 addi x0,x0,0 + 80007bcc: 00000013 addi x0,x0,0 + 80007bd0: 00000013 addi x0,x0,0 + 80007bd4: 00000013 addi x0,x0,0 + 80007bd8: 00000013 addi x0,x0,0 + 80007bdc: 00000013 addi x0,x0,0 + 80007be0: 00031097 auipc x1,0x31 + 80007be4: 9c4080e7 jalr x1,-1596(x1) # 800385a4 + +0000000080007be8 : + 80007be8: 00000013 addi x0,x0,0 + 80007bec: 00000013 addi x0,x0,0 + 80007bf0: 00000013 addi x0,x0,0 + 80007bf4: 00000013 addi x0,x0,0 + 80007bf8: 00000013 addi x0,x0,0 + 80007bfc: 00000013 addi x0,x0,0 + 80007c00: 00010517 auipc x10,0x10 + 80007c04: 5de50513 addi x10,x10,1502 # 800181de + 80007c08: 00000013 addi x0,x0,0 + 80007c0c: 00000013 addi x0,x0,0 + 80007c10: 00000013 addi x0,x0,0 + 80007c14: 00000013 addi x0,x0,0 + 80007c18: 00000013 addi x0,x0,0 + 80007c1c: 00000013 addi x0,x0,0 + 80007c20: 00031097 auipc x1,0x31 + 80007c24: 984080e7 jalr x1,-1660(x1) # 800385a4 + +0000000080007c28 : + 80007c28: 00010517 auipc x10,0x10 + 80007c2c: ec853503 ld x10,-312(x10) # 80017af0 + 80007c30: 00031097 auipc x1,0x31 + 80007c34: 974080e7 jalr x1,-1676(x1) # 800385a4 + +0000000080007c38 : + 80007c38: 00000013 addi x0,x0,0 + 80007c3c: 00000013 addi x0,x0,0 + 80007c40: 00010517 auipc x10,0x10 + 80007c44: 5b050513 addi x10,x10,1456 # 800181f0 + 80007c48: 00000013 addi x0,x0,0 + 80007c4c: 00000013 addi x0,x0,0 + 80007c50: 00000013 addi x0,x0,0 + 80007c54: 00000013 addi x0,x0,0 + 80007c58: 00000013 addi x0,x0,0 + 80007c5c: 00000013 addi x0,x0,0 + 80007c60: 00031097 auipc x1,0x31 + 80007c64: 944080e7 jalr x1,-1724(x1) # 800385a4 + 80007c68: 00010517 auipc x10,0x10 + 80007c6c: d6852503 lw x10,-664(x10) # 800179d0 + 80007c70: 00300593 addi x11,x0,3 + 80007c74: 52b50c63 beq x10,x11,800081ac + 80007c78: 00000013 addi x0,x0,0 + 80007c7c: 00000013 addi x0,x0,0 + 80007c80: 00010517 auipc x10,0x10 + 80007c84: 57250513 addi x10,x10,1394 # 800181f2 + 80007c88: 00000013 addi x0,x0,0 + 80007c8c: 00000013 addi x0,x0,0 + 80007c90: 00000013 addi x0,x0,0 + 80007c94: 00000013 addi x0,x0,0 + 80007c98: 00000013 addi x0,x0,0 + 80007c9c: 00000013 addi x0,x0,0 + 80007ca0: 00031097 auipc x1,0x31 + 80007ca4: 904080e7 jalr x1,-1788(x1) # 800385a4 + 80007ca8: 00010517 auipc x10,0x10 + 80007cac: e2852503 lw x10,-472(x10) # 80017ad0 + 80007cb0: 02000593 addi x11,x0,32 + 80007cb4: 00357613 andi x12,x10,3 + 80007cb8: 00300693 addi x13,x0,3 + 80007cbc: 00d60463 beq x12,x13,80007cc4 + 80007cc0: 01000593 addi x11,x0,16 + 80007cc4: 3f4010ef jal x1,800090b8 + 80007cc8: 00000013 addi x0,x0,0 + 80007ccc: 00000013 addi x0,x0,0 + 80007cd0: 00000013 addi x0,x0,0 + 80007cd4: 00000013 addi x0,x0,0 + 80007cd8: 00000013 addi x0,x0,0 + 80007cdc: 00000013 addi x0,x0,0 + 80007ce0: 00010517 auipc x10,0x10 + 80007ce4: e5850513 addi x10,x10,-424 # 80017b38 + 80007ce8: 00000013 addi x0,x0,0 + 80007cec: 00000013 addi x0,x0,0 + 80007cf0: 00000013 addi x0,x0,0 + 80007cf4: 00000013 addi x0,x0,0 + 80007cf8: 00000013 addi x0,x0,0 + 80007cfc: 00000013 addi x0,x0,0 + 80007d00: 00031097 auipc x1,0x31 + 80007d04: 8a4080e7 jalr x1,-1884(x1) # 800385a4 + 80007d08: 00000013 addi x0,x0,0 + 80007d0c: 00000013 addi x0,x0,0 + 80007d10: 00000013 addi x0,x0,0 + 80007d14: 00000013 addi x0,x0,0 + 80007d18: 00000013 addi x0,x0,0 + 80007d1c: 00000013 addi x0,x0,0 + 80007d20: 00010517 auipc x10,0x10 + 80007d24: 4e650513 addi x10,x10,1254 # 80018206 + 80007d28: 00000013 addi x0,x0,0 + 80007d2c: 00000013 addi x0,x0,0 + 80007d30: 00000013 addi x0,x0,0 + 80007d34: 00000013 addi x0,x0,0 + 80007d38: 00000013 addi x0,x0,0 + 80007d3c: 00000013 addi x0,x0,0 + 80007d40: 00031097 auipc x1,0x31 + 80007d44: 864080e7 jalr x1,-1948(x1) # 800385a4 + 80007d48: 00010517 auipc x10,0x10 + 80007d4c: d9053503 ld x10,-624(x10) # 80017ad8 + 80007d50: 04000593 addi x11,x0,64 + 80007d54: 364010ef jal x1,800090b8 + 80007d58: 00000013 addi x0,x0,0 + 80007d5c: 00000013 addi x0,x0,0 + 80007d60: 00010517 auipc x10,0x10 + 80007d64: dd850513 addi x10,x10,-552 # 80017b38 + 80007d68: 00000013 addi x0,x0,0 + 80007d6c: 00000013 addi x0,x0,0 + 80007d70: 00000013 addi x0,x0,0 + 80007d74: 00000013 addi x0,x0,0 + 80007d78: 00000013 addi x0,x0,0 + 80007d7c: 00000013 addi x0,x0,0 + 80007d80: 00031097 auipc x1,0x31 + 80007d84: 824080e7 jalr x1,-2012(x1) # 800385a4 + 80007d88: 00000013 addi x0,x0,0 + 80007d8c: 00000013 addi x0,x0,0 + 80007d90: 00000013 addi x0,x0,0 + 80007d94: 00000013 addi x0,x0,0 + 80007d98: 00000013 addi x0,x0,0 + 80007d9c: 00000013 addi x0,x0,0 + 80007da0: 00011517 auipc x10,0x11 + 80007da4: e9d50513 addi x10,x10,-355 # 80018c3d + 80007da8: 00000013 addi x0,x0,0 + 80007dac: 00000013 addi x0,x0,0 + 80007db0: 00000013 addi x0,x0,0 + 80007db4: 00000013 addi x0,x0,0 + 80007db8: 00000013 addi x0,x0,0 + 80007dbc: 00000013 addi x0,x0,0 + 80007dc0: 00030097 auipc x1,0x30 + 80007dc4: 7e4080e7 jalr x1,2020(x1) # 800385a4 + 80007dc8: 00010517 auipc x10,0x10 + 80007dcc: c0852503 lw x10,-1016(x10) # 800179d0 + 80007dd0: 00050663 beq x10,x0,80007ddc + 80007dd4: 00300593 addi x11,x0,3 + 80007dd8: 04b51063 bne x10,x11,80007e18 + 80007ddc: 07800593 addi x11,x0,120 + 80007de0: 00010617 auipc x12,0x10 + 80007de4: d5860613 addi x12,x12,-680 # 80017b38 + 80007de8: 00000013 addi x0,x0,0 + 80007dec: 00000013 addi x0,x0,0 + 80007df0: 00000013 addi x0,x0,0 + 80007df4: 00000013 addi x0,x0,0 + 80007df8: 00000013 addi x0,x0,0 + 80007dfc: 00000013 addi x0,x0,0 + 80007e00: 00b60023 sb x11,0(x12) + 80007e04: 00160613 addi x12,x12,1 + 80007e08: 00010517 auipc x10,0x10 + 80007e0c: ccc52503 lw x10,-820(x10) # 80017ad4 + 80007e10: 324010ef jal x1,80009134 + 80007e14: 1180006f jal x0,80007f2c + +0000000080007e18 : + 80007e18: 00100593 addi x11,x0,1 + 80007e1c: 04b50863 beq x10,x11,80007e6c + 80007e20: 00400593 addi x11,x0,4 + 80007e24: 08b50a63 beq x10,x11,80007eb8 + 80007e28: 00500593 addi x11,x0,5 + 80007e2c: 0cb50463 beq x10,x11,80007ef4 + 80007e30: 00000013 addi x0,x0,0 + 80007e34: 00000013 addi x0,x0,0 + 80007e38: 00000013 addi x0,x0,0 + 80007e3c: 00000013 addi x0,x0,0 + 80007e40: 00011517 auipc x10,0x11 + 80007e44: f1350513 addi x10,x10,-237 # 80018d53 + 80007e48: 00000013 addi x0,x0,0 + 80007e4c: 00000013 addi x0,x0,0 + 80007e50: 00000013 addi x0,x0,0 + 80007e54: 00000013 addi x0,x0,0 + 80007e58: 00000013 addi x0,x0,0 + 80007e5c: 00000013 addi x0,x0,0 + 80007e60: 00030097 auipc x1,0x30 + 80007e64: 744080e7 jalr x1,1860(x1) # 800385a4 + 80007e68: 1000006f jal x0,80007f68 + +0000000080007e6c : + 80007e6c: 06600593 addi x11,x0,102 + 80007e70: 00000013 addi x0,x0,0 + 80007e74: 00000013 addi x0,x0,0 + 80007e78: 00000013 addi x0,x0,0 + 80007e7c: 00000013 addi x0,x0,0 + 80007e80: 00010617 auipc x12,0x10 + 80007e84: cb860613 addi x12,x12,-840 # 80017b38 + 80007e88: 00000013 addi x0,x0,0 + 80007e8c: 00000013 addi x0,x0,0 + 80007e90: 00000013 addi x0,x0,0 + 80007e94: 00000013 addi x0,x0,0 + 80007e98: 00000013 addi x0,x0,0 + 80007e9c: 00000013 addi x0,x0,0 + 80007ea0: 00b60023 sb x11,0(x12) + 80007ea4: 00160613 addi x12,x12,1 + 80007ea8: 00010517 auipc x10,0x10 + 80007eac: c2c52503 lw x10,-980(x10) # 80017ad4 + 80007eb0: 284010ef jal x1,80009134 + 80007eb4: 0780006f jal x0,80007f2c + +0000000080007eb8 : + 80007eb8: 07600593 addi x11,x0,118 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00010617 auipc x12,0x10 + 80007ec4: c7860613 addi x12,x12,-904 # 80017b38 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 00b60023 sb x11,0(x12) + 80007ee4: 00160613 addi x12,x12,1 + 80007ee8: 00010517 auipc x10,0x10 + 80007eec: bec52503 lw x10,-1044(x10) # 80017ad4 + 80007ef0: 244010ef jal x1,80009134 + +0000000080007ef4 : + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00011517 auipc x10,0x11 + 80007f04: d3650513 addi x10,x10,-714 # 80018c36 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: 00030097 auipc x1,0x30 + 80007f24: 684080e7 jalr x1,1668(x1) # 800385a4 + 80007f28: 0400006f jal x0,80007f68 + +0000000080007f2c : + 80007f2c: 00000013 addi x0,x0,0 + 80007f30: 00000013 addi x0,x0,0 + 80007f34: 00000013 addi x0,x0,0 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010517 auipc x10,0x10 + 80007f44: bf850513 addi x10,x10,-1032 # 80017b38 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 00030097 auipc x1,0x30 + 80007f64: 644080e7 jalr x1,1604(x1) # 800385a4 + +0000000080007f68 : + 80007f68: 00000013 addi x0,x0,0 + 80007f6c: 00000013 addi x0,x0,0 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00011517 auipc x10,0x11 + 80007f84: cce50513 addi x10,x10,-818 # 80018c4e + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 00030097 auipc x1,0x30 + 80007fa4: 604080e7 jalr x1,1540(x1) # 800385a4 + 80007fa8: 00010517 auipc x10,0x10 + 80007fac: a2852503 lw x10,-1496(x10) # 800179d0 + 80007fb0: 00100593 addi x11,x0,1 + 80007fb4: 00b51c63 bne x10,x11,80007fcc + 80007fb8: 00010517 auipc x10,0x10 + 80007fbc: b2853503 ld x10,-1240(x10) # 80017ae0 + 80007fc0: 04000593 addi x11,x0,64 + 80007fc4: 0f4010ef jal x1,800090b8 + 80007fc8: 0140006f jal x0,80007fdc + +0000000080007fcc : + 80007fcc: 00010517 auipc x10,0x10 + 80007fd0: b1453503 ld x10,-1260(x10) # 80017ae0 + 80007fd4: 04000593 addi x11,x0,64 + 80007fd8: 0e0010ef jal x1,800090b8 + +0000000080007fdc : + 80007fdc: 00000013 addi x0,x0,0 + 80007fe0: 00010517 auipc x10,0x10 + 80007fe4: b5850513 addi x10,x10,-1192 # 80017b38 + 80007fe8: 00000013 addi x0,x0,0 + 80007fec: 00000013 addi x0,x0,0 + 80007ff0: 00000013 addi x0,x0,0 + 80007ff4: 00000013 addi x0,x0,0 + 80007ff8: 00000013 addi x0,x0,0 + 80007ffc: 00000013 addi x0,x0,0 + 80008000: 00030097 auipc x1,0x30 + 80008004: 5a4080e7 jalr x1,1444(x1) # 800385a4 + 80008008: 00010517 auipc x10,0x10 + 8000800c: af052503 lw x10,-1296(x10) # 80017af8 + 80008010: 08051e63 bne x10,x0,800080ac + 80008014: 00000013 addi x0,x0,0 + 80008018: 00000013 addi x0,x0,0 + 8000801c: 00000013 addi x0,x0,0 + 80008020: 00011517 auipc x10,0x11 + 80008024: c4550513 addi x10,x10,-955 # 80018c65 + 80008028: 00000013 addi x0,x0,0 + 8000802c: 00000013 addi x0,x0,0 + 80008030: 00000013 addi x0,x0,0 + 80008034: 00000013 addi x0,x0,0 + 80008038: 00000013 addi x0,x0,0 + 8000803c: 00000013 addi x0,x0,0 + 80008040: 00030097 auipc x1,0x30 + 80008044: 564080e7 jalr x1,1380(x1) # 800385a4 + 80008048: 00010517 auipc x10,0x10 + 8000804c: 98852503 lw x10,-1656(x10) # 800179d0 + 80008050: 00100593 addi x11,x0,1 + 80008054: 00b51c63 bne x10,x11,8000806c + 80008058: 00010517 auipc x10,0x10 + 8000805c: a9053503 ld x10,-1392(x10) # 80017ae8 + 80008060: 04000593 addi x11,x0,64 + 80008064: 054010ef jal x1,800090b8 + 80008068: 0140006f jal x0,8000807c + +000000008000806c : + 8000806c: 00010517 auipc x10,0x10 + 80008070: a7c53503 ld x10,-1412(x10) # 80017ae8 + 80008074: 04000593 addi x11,x0,64 + 80008078: 040010ef jal x1,800090b8 + +000000008000807c : + 8000807c: 00000013 addi x0,x0,0 + 80008080: 00010517 auipc x10,0x10 + 80008084: ab850513 addi x10,x10,-1352 # 80017b38 + 80008088: 00000013 addi x0,x0,0 + 8000808c: 00000013 addi x0,x0,0 + 80008090: 00000013 addi x0,x0,0 + 80008094: 00000013 addi x0,x0,0 + 80008098: 00000013 addi x0,x0,0 + 8000809c: 00000013 addi x0,x0,0 + 800080a0: 00030097 auipc x1,0x30 + 800080a4: 504080e7 jalr x1,1284(x1) # 800385a4 + 800080a8: 5bd0006f jal x0,80008e64 + +00000000800080ac : + 800080ac: 00100593 addi x11,x0,1 + 800080b0: 06b51e63 bne x10,x11,8000812c + +00000000800080b4 : + 800080b4: 00000013 addi x0,x0,0 + 800080b8: 00000013 addi x0,x0,0 + 800080bc: 00000013 addi x0,x0,0 + 800080c0: 00011517 auipc x10,0x11 + 800080c4: bbc50513 addi x10,x10,-1092 # 80018c7c + 800080c8: 00000013 addi x0,x0,0 + 800080cc: 00000013 addi x0,x0,0 + 800080d0: 00000013 addi x0,x0,0 + 800080d4: 00000013 addi x0,x0,0 + 800080d8: 00000013 addi x0,x0,0 + 800080dc: 00000013 addi x0,x0,0 + 800080e0: 00030097 auipc x1,0x30 + 800080e4: 4c4080e7 jalr x1,1220(x1) # 800385a4 + 800080e8: 00010517 auipc x10,0x10 + 800080ec: a0053503 ld x10,-1536(x10) # 80017ae8 + 800080f0: 02000593 addi x11,x0,32 + 800080f4: 7c5000ef jal x1,800090b8 + 800080f8: 00000013 addi x0,x0,0 + 800080fc: 00000013 addi x0,x0,0 + 80008100: 00010517 auipc x10,0x10 + 80008104: a3850513 addi x10,x10,-1480 # 80017b38 + 80008108: 00000013 addi x0,x0,0 + 8000810c: 00000013 addi x0,x0,0 + 80008110: 00000013 addi x0,x0,0 + 80008114: 00000013 addi x0,x0,0 + 80008118: 00000013 addi x0,x0,0 + 8000811c: 00000013 addi x0,x0,0 + 80008120: 00030097 auipc x1,0x30 + 80008124: 484080e7 jalr x1,1156(x1) # 800385a4 + 80008128: 53d0006f jal x0,80008e64 + +000000008000812c : + 8000812c: 00000013 addi x0,x0,0 + 80008130: 00000013 addi x0,x0,0 + 80008134: 00000013 addi x0,x0,0 + 80008138: 00000013 addi x0,x0,0 + 8000813c: 00000013 addi x0,x0,0 + 80008140: 00011517 auipc x10,0x11 + 80008144: b9a50513 addi x10,x10,-1126 # 80018cda + 80008148: 00000013 addi x0,x0,0 + 8000814c: 00000013 addi x0,x0,0 + 80008150: 00000013 addi x0,x0,0 + 80008154: 00000013 addi x0,x0,0 + 80008158: 00000013 addi x0,x0,0 + 8000815c: 00000013 addi x0,x0,0 + 80008160: 00030097 auipc x1,0x30 + 80008164: 444080e7 jalr x1,1092(x1) # 800385a4 + 80008168: 00010517 auipc x10,0x10 + 8000816c: 98053503 ld x10,-1664(x10) # 80017ae8 + 80008170: 04000593 addi x11,x0,64 + 80008174: 745000ef jal x1,800090b8 + 80008178: 00000013 addi x0,x0,0 + 8000817c: 00000013 addi x0,x0,0 + 80008180: 00010517 auipc x10,0x10 + 80008184: 9b850513 addi x10,x10,-1608 # 80017b38 + 80008188: 00000013 addi x0,x0,0 + 8000818c: 00000013 addi x0,x0,0 + 80008190: 00000013 addi x0,x0,0 + 80008194: 00000013 addi x0,x0,0 + 80008198: 00000013 addi x0,x0,0 + 8000819c: 00000013 addi x0,x0,0 + 800081a0: 00030097 auipc x1,0x30 + 800081a4: 404080e7 jalr x1,1028(x1) # 800385a4 + 800081a8: 4bd0006f jal x0,80008e64 + +00000000800081ac : + 800081ac: 00010417 auipc x8,0x10 + 800081b0: 95442403 lw x8,-1708(x8) # 80017b00 + 800081b4: 00900493 addi x9,x0,9 + 800081b8: 0a940c63 beq x8,x9,80008270 + 800081bc: 00000013 addi x0,x0,0 + 800081c0: 00011517 auipc x10,0x11 + 800081c4: bbf50513 addi x10,x10,-1089 # 80018d7f + 800081c8: 00000013 addi x0,x0,0 + 800081cc: 00000013 addi x0,x0,0 + 800081d0: 00000013 addi x0,x0,0 + 800081d4: 00000013 addi x0,x0,0 + 800081d8: 00000013 addi x0,x0,0 + 800081dc: 00000013 addi x0,x0,0 + 800081e0: 00030097 auipc x1,0x30 + 800081e4: 3c4080e7 jalr x1,964(x1) # 800385a4 + 800081e8: 00000013 addi x0,x0,0 + 800081ec: 00000013 addi x0,x0,0 + 800081f0: 00000013 addi x0,x0,0 + 800081f4: 00000013 addi x0,x0,0 + 800081f8: 00000013 addi x0,x0,0 + 800081fc: 00000013 addi x0,x0,0 + 80008200: 00011517 auipc x10,0x11 + 80008204: bab50513 addi x10,x10,-1109 # 80018dab + 80008208: 00000013 addi x0,x0,0 + 8000820c: 00000013 addi x0,x0,0 + 80008210: 00000013 addi x0,x0,0 + 80008214: 00000013 addi x0,x0,0 + 80008218: 00000013 addi x0,x0,0 + 8000821c: 00000013 addi x0,x0,0 + 80008220: 00030097 auipc x1,0x30 + 80008224: 384080e7 jalr x1,900(x1) # 800385a4 + 80008228: 00010817 auipc x16,0x10 + 8000822c: 8e080813 addi x16,x16,-1824 # 80017b08 + 80008230: 00083503 ld x10,0(x16) + 80008234: 00030097 auipc x1,0x30 + 80008238: 370080e7 jalr x1,880(x1) # 800385a4 + 8000823c: 00000013 addi x0,x0,0 + 80008240: 00010517 auipc x10,0x10 + 80008244: fb050513 addi x10,x10,-80 # 800181f0 + 80008248: 00000013 addi x0,x0,0 + 8000824c: 00000013 addi x0,x0,0 + 80008250: 00000013 addi x0,x0,0 + 80008254: 00000013 addi x0,x0,0 + 80008258: 00000013 addi x0,x0,0 + 8000825c: 00000013 addi x0,x0,0 + 80008260: 00030097 auipc x1,0x30 + 80008264: 344080e7 jalr x1,836(x1) # 800385a4 + 80008268: 280404e3 beq x8,x0,80008cf0 + 8000826c: 3400006f jal x0,800085ac + +0000000080008270 : + 80008270: 00000013 addi x0,x0,0 + 80008274: 00000013 addi x0,x0,0 + 80008278: 00000013 addi x0,x0,0 + 8000827c: 00000013 addi x0,x0,0 + 80008280: 00011517 auipc x10,0x11 + 80008284: b3b50513 addi x10,x10,-1221 # 80018dbb + 80008288: 00000013 addi x0,x0,0 + 8000828c: 00000013 addi x0,x0,0 + 80008290: 00000013 addi x0,x0,0 + 80008294: 00000013 addi x0,x0,0 + 80008298: 00000013 addi x0,x0,0 + 8000829c: 00000013 addi x0,x0,0 + 800082a0: 00030097 auipc x1,0x30 + 800082a4: 304080e7 jalr x1,772(x1) # 800385a4 + 800082a8: 00010517 auipc x10,0x10 + 800082ac: 84053503 ld x10,-1984(x10) # 80017ae8 + 800082b0: 04000593 addi x11,x0,64 + 800082b4: 605000ef jal x1,800090b8 + 800082b8: 00000013 addi x0,x0,0 + 800082bc: 00000013 addi x0,x0,0 + 800082c0: 00010517 auipc x10,0x10 + 800082c4: 87850513 addi x10,x10,-1928 # 80017b38 + 800082c8: 00000013 addi x0,x0,0 + 800082cc: 00000013 addi x0,x0,0 + 800082d0: 00000013 addi x0,x0,0 + 800082d4: 00000013 addi x0,x0,0 + 800082d8: 00000013 addi x0,x0,0 + 800082dc: 00000013 addi x0,x0,0 + 800082e0: 00030097 auipc x1,0x30 + 800082e4: 2c4080e7 jalr x1,708(x1) # 800385a4 + 800082e8: 00000013 addi x0,x0,0 + 800082ec: 00000013 addi x0,x0,0 + 800082f0: 00000013 addi x0,x0,0 + 800082f4: 00000013 addi x0,x0,0 + 800082f8: 00000013 addi x0,x0,0 + 800082fc: 00000013 addi x0,x0,0 + 80008300: 00011517 auipc x10,0x11 + 80008304: ae650513 addi x10,x10,-1306 # 80018de6 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00030097 auipc x1,0x30 + 80008324: 284080e7 jalr x1,644(x1) # 800385a4 + 80008328: 0000f517 auipc x10,0xf + 8000832c: 7b853503 ld x10,1976(x10) # 80017ae0 + 80008330: 04000593 addi x11,x0,64 + 80008334: 585000ef jal x1,800090b8 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 0000f517 auipc x10,0xf + 80008344: 7f850513 addi x10,x10,2040 # 80017b38 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00030097 auipc x1,0x30 + 80008364: 244080e7 jalr x1,580(x1) # 800385a4 + 80008368: 0000f317 auipc x6,0xf + 8000836c: 77833303 ld x6,1912(x6) # 80017ae0 + 80008370: 0000f397 auipc x7,0xf + 80008374: 7783b383 ld x7,1912(x7) # 80017ae8 + 80008378: 10736a63 bltu x6,x7,8000848c + +000000008000837c : + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: a9550513 addi x10,x10,-1387 # 80018e15 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00030097 auipc x1,0x30 + 800083a4: 204080e7 jalr x1,516(x1) # 800385a4 + 800083a8: 00000013 addi x0,x0,0 + 800083ac: 00000013 addi x0,x0,0 + 800083b0: 00000013 addi x0,x0,0 + 800083b4: 00000013 addi x0,x0,0 + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: abd50513 addi x10,x10,-1347 # 80018e7d + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00030097 auipc x1,0x30 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800385a4 + 800083e8: 0000f317 auipc x6,0xf + 800083ec: 6f833303 ld x6,1784(x6) # 80017ae0 + 800083f0: 0000f397 auipc x7,0xf + 800083f4: 6f83b383 ld x7,1784(x7) # 80017ae8 + 800083f8: 40730533 sub x10,x6,x7 + 800083fc: 04000593 addi x11,x0,64 + 80008400: 4b9000ef jal x1,800090b8 + 80008404: 00000013 addi x0,x0,0 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 0000f517 auipc x10,0xf + 80008424: 71850513 addi x10,x10,1816 # 80017b38 + 80008428: 00000013 addi x0,x0,0 + 8000842c: 00000013 addi x0,x0,0 + 80008430: 00000013 addi x0,x0,0 + 80008434: 00000013 addi x0,x0,0 + 80008438: 00000013 addi x0,x0,0 + 8000843c: 00000013 addi x0,x0,0 + 80008440: 00030097 auipc x1,0x30 + 80008444: 164080e7 jalr x1,356(x1) # 800385a4 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00011517 auipc x10,0x11 + 80008464: a4450513 addi x10,x10,-1468 # 80018ea4 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00030097 auipc x1,0x30 + 80008484: 124080e7 jalr x1,292(x1) # 800385a4 + 80008488: 1dd0006f jal x0,80008e64 + +000000008000848c : + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: 9a150513 addi x10,x10,-1631 # 80018e41 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00030097 auipc x1,0x30 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800385a4 + 800084c8: 00000013 addi x0,x0,0 + 800084cc: 00000013 addi x0,x0,0 + 800084d0: 00000013 addi x0,x0,0 + 800084d4: 00000013 addi x0,x0,0 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00011517 auipc x10,0x11 + 800084e4: 99d50513 addi x10,x10,-1635 # 80018e7d + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00030097 auipc x1,0x30 + 80008504: 0a4080e7 jalr x1,164(x1) # 800385a4 + 80008508: 0000f317 auipc x6,0xf + 8000850c: 5e033303 ld x6,1504(x6) # 80017ae8 + 80008510: 0000f397 auipc x7,0xf + 80008514: 5d03b383 ld x7,1488(x7) # 80017ae0 + 80008518: 40730533 sub x10,x6,x7 + 8000851c: 04000593 addi x11,x0,64 + 80008520: 399000ef jal x1,800090b8 + 80008524: 00000013 addi x0,x0,0 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 0000f517 auipc x10,0xf + 80008544: 5f850513 addi x10,x10,1528 # 80017b38 + 80008548: 00000013 addi x0,x0,0 + 8000854c: 00000013 addi x0,x0,0 + 80008550: 00000013 addi x0,x0,0 + 80008554: 00000013 addi x0,x0,0 + 80008558: 00000013 addi x0,x0,0 + 8000855c: 00000013 addi x0,x0,0 + 80008560: 00030097 auipc x1,0x30 + 80008564: 044080e7 jalr x1,68(x1) # 800385a4 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00011517 auipc x10,0x11 + 80008584: a0c50513 addi x10,x10,-1524 # 80018f8c + 80008588: 00000013 addi x0,x0,0 + 8000858c: 00000013 addi x0,x0,0 + 80008590: 00000013 addi x0,x0,0 + 80008594: 00000013 addi x0,x0,0 + 80008598: 00000013 addi x0,x0,0 + 8000859c: 00000013 addi x0,x0,0 + 800085a0: 00030097 auipc x1,0x30 + 800085a4: 004080e7 jalr x1,4(x1) # 800385a4 + 800085a8: 0bd0006f jal x0,80008e64 + +00000000800085ac : + 800085ac: 00000013 addi x0,x0,0 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: ab350513 addi x10,x10,-1357 # 80019073 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00030097 auipc x1,0x30 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800385a4 + 800085e8: 0000f517 auipc x10,0xf + 800085ec: 51c52503 lw x10,1308(x10) # 80017b04 + 800085f0: 04050a63 beq x10,x0,80008644 + 800085f4: 00100593 addi x11,x0,1 + 800085f8: 08b50663 beq x10,x11,80008684 + 800085fc: 00200593 addi x11,x0,2 + 80008600: 0cb50263 beq x10,x11,800086c4 + 80008604: 00300593 addi x11,x0,3 + 80008608: 0eb50e63 beq x10,x11,80008704 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00011517 auipc x10,0x11 + 80008624: a8f50513 addi x10,x10,-1393 # 800190af + 80008628: 00000013 addi x0,x0,0 + 8000862c: 00000013 addi x0,x0,0 + 80008630: 00000013 addi x0,x0,0 + 80008634: 00000013 addi x0,x0,0 + 80008638: 00000013 addi x0,x0,0 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 1000006f jal x0,80008740 + +0000000080008644 : + 80008644: 00000013 addi x0,x0,0 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00011517 auipc x10,0x11 + 80008664: a2d50513 addi x10,x10,-1491 # 8001908d + 80008668: 00000013 addi x0,x0,0 + 8000866c: 00000013 addi x0,x0,0 + 80008670: 00000013 addi x0,x0,0 + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 0c00006f jal x0,80008740 + +0000000080008684 : + 80008684: 00000013 addi x0,x0,0 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00011517 auipc x10,0x11 + 800086a4: 9f550513 addi x10,x10,-1547 # 80019095 + 800086a8: 00000013 addi x0,x0,0 + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 0800006f jal x0,80008740 + +00000000800086c4 : + 800086c4: 00000013 addi x0,x0,0 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00011517 auipc x10,0x11 + 800086e4: 9bd50513 addi x10,x10,-1603 # 8001909d + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 0400006f jal x0,80008740 + +0000000080008704 : + 80008704: 00000013 addi x0,x0,0 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00011517 auipc x10,0x11 + 80008724: 98650513 addi x10,x10,-1658 # 800190a6 + 80008728: 00000013 addi x0,x0,0 + 8000872c: 00000013 addi x0,x0,0 + 80008730: 00000013 addi x0,x0,0 + 80008734: 00000013 addi x0,x0,0 + 80008738: 00000013 addi x0,x0,0 + 8000873c: 00000013 addi x0,x0,0 + +0000000080008740 : + 80008740: 00030097 auipc x1,0x30 + 80008744: e64080e7 jalr x1,-412(x1) # 800385a4 + 80008748: 00000013 addi x0,x0,0 + 8000874c: 00000013 addi x0,x0,0 + 80008750: 00000013 addi x0,x0,0 + 80008754: 00000013 addi x0,x0,0 + 80008758: 00000013 addi x0,x0,0 + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00011517 auipc x10,0x11 + 80008764: 95850513 addi x10,x10,-1704 # 800190b8 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00030097 auipc x1,0x30 + 80008784: e24080e7 jalr x1,-476(x1) # 800385a4 + 80008788: 0000f517 auipc x10,0xf + 8000878c: 37852503 lw x10,888(x10) # 80017b00 + 80008790: 00100593 addi x11,x0,1 + 80008794: 06b50863 beq x10,x11,80008804 + 80008798: 00200593 addi x11,x0,2 + 8000879c: 0ab50463 beq x10,x11,80008844 + 800087a0: 00300593 addi x11,x0,3 + 800087a4: 0eb50063 beq x10,x11,80008884 + 800087a8: 00400593 addi x11,x0,4 + 800087ac: 10b50c63 beq x10,x11,800088c4 + 800087b0: 00500593 addi x11,x0,5 + 800087b4: 14b50863 beq x10,x11,80008904 + 800087b8: 00600593 addi x11,x0,6 + 800087bc: 18b50463 beq x10,x11,80008944 + 800087c0: 00700593 addi x11,x0,7 + 800087c4: 1cb50063 beq x10,x11,80008984 + 800087c8: 00800593 addi x11,x0,8 + 800087cc: 1eb50c63 beq x10,x11,800089c4 + 800087d0: 00000013 addi x0,x0,0 + 800087d4: 00000013 addi x0,x0,0 + 800087d8: 00000013 addi x0,x0,0 + 800087dc: 00000013 addi x0,x0,0 + 800087e0: 00011517 auipc x10,0x11 + 800087e4: a2f50513 addi x10,x10,-1489 # 8001920f + 800087e8: 00000013 addi x0,x0,0 + 800087ec: 00000013 addi x0,x0,0 + 800087f0: 00000013 addi x0,x0,0 + 800087f4: 00000013 addi x0,x0,0 + 800087f8: 00000013 addi x0,x0,0 + 800087fc: 00000013 addi x0,x0,0 + 80008800: 2000006f jal x0,80008a00 + +0000000080008804 : + 80008804: 00000013 addi x0,x0,0 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00011517 auipc x10,0x11 + 80008824: 8b250513 addi x10,x10,-1870 # 800190d2 + 80008828: 00000013 addi x0,x0,0 + 8000882c: 00000013 addi x0,x0,0 + 80008830: 00000013 addi x0,x0,0 + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 1c00006f jal x0,80008a00 + +0000000080008844 : + 80008844: 00000013 addi x0,x0,0 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00011517 auipc x10,0x11 + 80008864: 8a350513 addi x10,x10,-1885 # 80019103 + 80008868: 00000013 addi x0,x0,0 + 8000886c: 00000013 addi x0,x0,0 + 80008870: 00000013 addi x0,x0,0 + 80008874: 00000013 addi x0,x0,0 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 1800006f jal x0,80008a00 + +0000000080008884 : + 80008884: 00000013 addi x0,x0,0 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00011517 auipc x10,0x11 + 800088a4: 88350513 addi x10,x10,-1917 # 80019123 + 800088a8: 00000013 addi x0,x0,0 + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 1400006f jal x0,80008a00 + +00000000800088c4 : + 800088c4: 00000013 addi x0,x0,0 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00011517 auipc x10,0x11 + 800088e4: 86150513 addi x10,x10,-1951 # 80019141 + 800088e8: 00000013 addi x0,x0,0 + 800088ec: 00000013 addi x0,x0,0 + 800088f0: 00000013 addi x0,x0,0 + 800088f4: 00000013 addi x0,x0,0 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 1000006f jal x0,80008a00 + +0000000080008904 : + 80008904: 00000013 addi x0,x0,0 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00011517 auipc x10,0x11 + 80008924: 84050513 addi x10,x10,-1984 # 80019160 + 80008928: 00000013 addi x0,x0,0 + 8000892c: 00000013 addi x0,x0,0 + 80008930: 00000013 addi x0,x0,0 + 80008934: 00000013 addi x0,x0,0 + 80008938: 00000013 addi x0,x0,0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 0c00006f jal x0,80008a00 + +0000000080008944 : + 80008944: 00000013 addi x0,x0,0 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00011517 auipc x10,0x11 + 80008964: 82850513 addi x10,x10,-2008 # 80019188 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 0800006f jal x0,80008a00 + +0000000080008984 : + 80008984: 00000013 addi x0,x0,0 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00011517 auipc x10,0x11 + 800089a4: 81450513 addi x10,x10,-2028 # 800191b4 + 800089a8: 00000013 addi x0,x0,0 + 800089ac: 00000013 addi x0,x0,0 + 800089b0: 00000013 addi x0,x0,0 + 800089b4: 00000013 addi x0,x0,0 + 800089b8: 00000013 addi x0,x0,0 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 0400006f jal x0,80008a00 + +00000000800089c4 : + 800089c4: 00000013 addi x0,x0,0 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00011517 auipc x10,0x11 + 800089e4: 80050513 addi x10,x10,-2048 # 800191e0 + 800089e8: 00000013 addi x0,x0,0 + 800089ec: 00000013 addi x0,x0,0 + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + +0000000080008a00 : + 80008a00: 00030097 auipc x1,0x30 + 80008a04: ba4080e7 jalr x1,-1116(x1) # 800385a4 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00010517 auipc x10,0x10 + 80008a24: 7fe50513 addi x10,x10,2046 # 8001921e + 80008a28: 00000013 addi x0,x0,0 + 80008a2c: 00000013 addi x0,x0,0 + 80008a30: 00000013 addi x0,x0,0 + 80008a34: 00000013 addi x0,x0,0 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00030097 auipc x1,0x30 + 80008a44: b64080e7 jalr x1,-1180(x1) # 800385a4 + 80008a48: 0000f517 auipc x10,0xf + 80008a4c: 0a053503 ld x10,160(x10) # 80017ae8 + 80008a50: 04000593 addi x11,x0,64 + 80008a54: 664000ef jal x1,800090b8 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 0000f517 auipc x10,0xf + 80008a64: 0d850513 addi x10,x10,216 # 80017b38 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00030097 auipc x1,0x30 + 80008a84: b24080e7 jalr x1,-1244(x1) # 800385a4 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00010517 auipc x10,0x10 + 80008aa4: 79550513 addi x10,x10,1941 # 80019235 + 80008aa8: 00000013 addi x0,x0,0 + 80008aac: 00000013 addi x0,x0,0 + 80008ab0: 00000013 addi x0,x0,0 + 80008ab4: 00000013 addi x0,x0,0 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00030097 auipc x1,0x30 + 80008ac4: ae4080e7 jalr x1,-1308(x1) # 800385a4 + 80008ac8: 0000f517 auipc x10,0xf + 80008acc: 01853503 ld x10,24(x10) # 80017ae0 + 80008ad0: 04000593 addi x11,x0,64 + 80008ad4: 5e4000ef jal x1,800090b8 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 0000f517 auipc x10,0xf + 80008ae4: 05850513 addi x10,x10,88 # 80017b38 + 80008ae8: 00000013 addi x0,x0,0 + 80008aec: 00000013 addi x0,x0,0 + 80008af0: 00000013 addi x0,x0,0 + 80008af4: 00000013 addi x0,x0,0 + 80008af8: 00000013 addi x0,x0,0 + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00030097 auipc x1,0x30 + 80008b04: aa4080e7 jalr x1,-1372(x1) # 800385a4 + 80008b08: 0000f517 auipc x10,0xf + 80008b0c: ff852503 lw x10,-8(x10) # 80017b00 + 80008b10: 00200593 addi x11,x0,2 + 80008b14: 08b51463 bne x10,x11,80008b9c + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00010517 auipc x10,0x10 + 80008b24: 72c50513 addi x10,x10,1836 # 8001924c + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00030097 auipc x1,0x30 + 80008b44: a64080e7 jalr x1,-1436(x1) # 800385a4 + 80008b48: 0000f517 auipc x10,0xf + 80008b4c: fa053503 ld x10,-96(x10) # 80017ae8 + 80008b50: 284000ef jal x1,80008dd4 + 80008b54: 00030097 auipc x1,0x30 + 80008b58: a50080e7 jalr x1,-1456(x1) # 800385a4 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00010517 auipc x10,0x10 + 80008b64: 70350513 addi x10,x10,1795 # 80019263 + 80008b68: 00000013 addi x0,x0,0 + 80008b6c: 00000013 addi x0,x0,0 + 80008b70: 00000013 addi x0,x0,0 + 80008b74: 00000013 addi x0,x0,0 + 80008b78: 00000013 addi x0,x0,0 + 80008b7c: 00000013 addi x0,x0,0 + 80008b80: 00030097 auipc x1,0x30 + 80008b84: a24080e7 jalr x1,-1500(x1) # 800385a4 + 80008b88: 0000f517 auipc x10,0xf + 80008b8c: f5853503 ld x10,-168(x10) # 80017ae0 + 80008b90: 244000ef jal x1,80008dd4 + 80008b94: 00030097 auipc x1,0x30 + 80008b98: a10080e7 jalr x1,-1520(x1) # 800385a4 + +0000000080008b9c : + 80008b9c: 00000097 auipc x1,0x0 + 80008ba0: 314080e7 jalr x1,788(x1) # 80008eb0 + 80008ba4: 0000f517 auipc x10,0xf + 80008ba8: f5c52503 lw x10,-164(x10) # 80017b00 + 80008bac: 00100593 addi x11,x0,1 + 80008bb0: 02b51e63 bne x10,x11,80008bec + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00010517 auipc x10,0x10 + 80008bc4: 71950513 addi x10,x10,1817 # 800192d9 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00030097 auipc x1,0x30 + 80008be4: 9c4080e7 jalr x1,-1596(x1) # 800385a4 + 80008be8: 27c0006f jal x0,80008e64 + 80008bec: 00200593 addi x11,x0,2 + 80008bf0: 02b51e63 bne x10,x11,80008c2c + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00010517 auipc x10,0x10 + 80008c04: 7af50513 addi x10,x10,1967 # 800193af + 80008c08: 00000013 addi x0,x0,0 + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00030097 auipc x1,0x30 + 80008c24: 984080e7 jalr x1,-1660(x1) # 800385a4 + 80008c28: 23c0006f jal x0,80008e64 + 80008c2c: 00300593 addi x11,x0,3 + 80008c30: 02b51e63 bne x10,x11,80008c6c + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00011517 auipc x10,0x11 + 80008c44: 86250513 addi x10,x10,-1950 # 800194a2 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00030097 auipc x1,0x30 + 80008c64: 944080e7 jalr x1,-1724(x1) # 800385a4 + 80008c68: 1fc0006f jal x0,80008e64 + 80008c6c: 00400593 addi x11,x0,4 + 80008c70: 02b51e63 bne x10,x11,80008cac + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00011517 auipc x10,0x11 + 80008c84: 91d50513 addi x10,x10,-1763 # 8001959d + 80008c88: 00000013 addi x0,x0,0 + 80008c8c: 00000013 addi x0,x0,0 + 80008c90: 00000013 addi x0,x0,0 + 80008c94: 00000013 addi x0,x0,0 + 80008c98: 00000013 addi x0,x0,0 + 80008c9c: 00000013 addi x0,x0,0 + 80008ca0: 00030097 auipc x1,0x30 + 80008ca4: 904080e7 jalr x1,-1788(x1) # 800385a4 + 80008ca8: 1bc0006f jal x0,80008e64 + 80008cac: 00500593 addi x11,x0,5 + 80008cb0: 02b51e63 bne x10,x11,80008cec + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00011517 auipc x10,0x11 + 80008cc4: 9c450513 addi x10,x10,-1596 # 80019684 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00030097 auipc x1,0x30 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800385a4 + 80008ce8: 17c0006f jal x0,80008e64 + 80008cec: 1780006f jal x0,80008e64 + +0000000080008cf0 : + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00010517 auipc x10,0x10 + 80008d04: 59150513 addi x10,x10,1425 # 80019291 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00030097 auipc x1,0x30 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800385a4 + 80008d28: 0000f617 auipc x12,0xf + 80008d2c: df063603 ld x12,-528(x12) # 80017b18 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 0000f517 auipc x10,0xf + 80008d44: 53a50513 addi x10,x10,1338 # 8001827a + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00030097 auipc x1,0x30 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800385a4 + 80008d68: 00065503 lhu x10,0(x12) + 80008d6c: 01000593 addi x11,x0,16 + 80008d70: 00357413 andi x8,x10,3 + 80008d74: 00300493 addi x9,x0,3 + 80008d78: 00941a63 bne x8,x9,80008d8c + 80008d7c: 00265403 lhu x8,2(x12) + 80008d80: 01041413 slli x8,x8,0x10 + 80008d84: 00856533 or x10,x10,x8 + 80008d88: 02000593 addi x11,x0,32 + 80008d8c: 32c000ef jal x1,800090b8 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 0000f517 auipc x10,0xf + 80008da4: d9850513 addi x10,x10,-616 # 80017b38 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 0002f097 auipc x1,0x2f + 80008dc4: 7e4080e7 jalr x1,2020(x1) # 800385a4 + 80008dc8: 00000097 auipc x1,0x0 + 80008dcc: 0e8080e7 jalr x1,232(x1) # 80008eb0 + 80008dd0: 0940006f jal x0,80008e64 + +0000000080008dd4 : + 80008dd4: 02054463 blt x10,x0,80008dfc + +0000000080008dd8 : + 80008dd8: 01800593 addi x11,x0,24 + 80008ddc: 04b55863 bge x10,x11,80008e2c + 80008de0: 0000f597 auipc x11,0xf + 80008de4: d8058593 addi x11,x11,-640 # 80017b60 + 80008de8: 00251613 slli x12,x10,0x2 + 80008dec: 00351613 slli x12,x10,0x3 + 80008df0: 00c585b3 add x11,x11,x12 + 80008df4: 0005b503 ld x10,0(x11) + 80008df8: 00008067 jalr x0,0(x1) + +0000000080008dfc : + 80008dfc: 00100593 addi x11,x0,1 + 80008e00: 03f59593 slli x11,x11,0x3f + 80008e04: 00b54533 xor x10,x10,x11 + 80008e08: 01000593 addi x11,x0,16 + 80008e0c: 02b55063 bge x10,x11,80008e2c + 80008e10: 0000f597 auipc x11,0xf + 80008e14: e1058593 addi x11,x11,-496 # 80017c20 + 80008e18: 00251613 slli x12,x10,0x2 + 80008e1c: 00351613 slli x12,x10,0x3 + 80008e20: 00c585b3 add x11,x11,x12 + 80008e24: 0005b503 ld x10,0(x11) + 80008e28: 00008067 jalr x0,0(x1) + +0000000080008e2c : + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0000f517 auipc x10,0xf + 80008e44: 25e50513 addi x10,x10,606 # 8001809e + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00008067 jalr x0,0(x1) + +0000000080008e64 : + 80008e64: 00000013 addi x0,x0,0 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 00010517 auipc x10,0x10 + 80008e84: eb250513 addi x10,x10,-334 # 80018d32 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 0002f097 auipc x1,0x2f + 80008ea4: 704080e7 jalr x1,1796(x1) # 800385a4 + +0000000080008ea8 : + 80008ea8: 0002f097 auipc x1,0x2f + 80008eac: 75c080e7 jalr x1,1884(x1) # 80038604 + +0000000080008eb0 : + 80008eb0: 0000f617 auipc x12,0xf + 80008eb4: c6060613 addi x12,x12,-928 # 80017b10 + 80008eb8: 00163023 sd x1,0(x12) + 80008ebc: 00000013 addi x0,x0,0 + 80008ec0: 0000f517 auipc x10,0xf + 80008ec4: 3db50513 addi x10,x10,987 # 8001829b + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 0002f097 auipc x1,0x2f + 80008ee4: 6c4080e7 jalr x1,1732(x1) # 800385a4 + 80008ee8: 0000f517 auipc x10,0xf + 80008eec: c3053503 ld x10,-976(x10) # 80017b18 + 80008ef0: 04000593 addi x11,x0,64 + 80008ef4: 1c4000ef jal x1,800090b8 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 0000f517 auipc x10,0xf + 80008f04: c3850513 addi x10,x10,-968 # 80017b38 + 80008f08: 00000013 addi x0,x0,0 + 80008f0c: 00000013 addi x0,x0,0 + 80008f10: 00000013 addi x0,x0,0 + 80008f14: 00000013 addi x0,x0,0 + 80008f18: 00000013 addi x0,x0,0 + 80008f1c: 00000013 addi x0,x0,0 + 80008f20: 0002f097 auipc x1,0x2f + 80008f24: 684080e7 jalr x1,1668(x1) # 800385a4 + 80008f28: 00000013 addi x0,x0,0 + 80008f2c: 00000013 addi x0,x0,0 + 80008f30: 00000013 addi x0,x0,0 + 80008f34: 00000013 addi x0,x0,0 + 80008f38: 00000013 addi x0,x0,0 + 80008f3c: 00000013 addi x0,x0,0 + 80008f40: 0000f517 auipc x10,0xf + 80008f44: 36b50513 addi x10,x10,875 # 800182ab + 80008f48: 00000013 addi x0,x0,0 + 80008f4c: 00000013 addi x0,x0,0 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 0002f097 auipc x1,0x2f + 80008f64: 644080e7 jalr x1,1604(x1) # 800385a4 + 80008f68: 0000f517 auipc x10,0xf + 80008f6c: bb853503 ld x10,-1096(x10) # 80017b20 + 80008f70: 04000593 addi x11,x0,64 + 80008f74: 144000ef jal x1,800090b8 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 0000f517 auipc x10,0xf + 80008f84: bb850513 addi x10,x10,-1096 # 80017b38 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 0002f097 auipc x1,0x2f + 80008fa4: 604080e7 jalr x1,1540(x1) # 800385a4 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 0000f517 auipc x10,0xf + 80008fc4: 2fb50513 addi x10,x10,763 # 800182bb + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 0002f097 auipc x1,0x2f + 80008fe4: 5c4080e7 jalr x1,1476(x1) # 800385a4 + 80008fe8: 0000f517 auipc x10,0xf + 80008fec: b4053503 ld x10,-1216(x10) # 80017b28 + 80008ff0: 04000593 addi x11,x0,64 + 80008ff4: 0c4000ef jal x1,800090b8 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 0000f517 auipc x10,0xf + 80009004: b3850513 addi x10,x10,-1224 # 80017b38 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 0002f097 auipc x1,0x2f + 80009024: 584080e7 jalr x1,1412(x1) # 800385a4 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 0000f517 auipc x10,0xf + 80009044: 28b50513 addi x10,x10,651 # 800182cb + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 0002f097 auipc x1,0x2f + 80009064: 544080e7 jalr x1,1348(x1) # 800385a4 + 80009068: 0000f517 auipc x10,0xf + 8000906c: ac853503 ld x10,-1336(x10) # 80017b30 + 80009070: 04000593 addi x11,x0,64 + 80009074: 044000ef jal x1,800090b8 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 0000f517 auipc x10,0xf + 80009084: ab850513 addi x10,x10,-1352 # 80017b38 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 0002f097 auipc x1,0x2f + 800090a4: 504080e7 jalr x1,1284(x1) # 800385a4 + 800090a8: 0000f617 auipc x12,0xf + 800090ac: a6860613 addi x12,x12,-1432 # 80017b10 + 800090b0: 00063083 ld x1,0(x12) + 800090b4: 00008067 jalr x0,0(x1) + +00000000800090b8 : + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0000f617 auipc x12,0xf + 800090c4: a7860613 addi x12,x12,-1416 # 80017b38 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 03000693 addi x13,x0,48 + 800090e4: 00d60023 sb x13,0(x12) + 800090e8: 07800693 addi x13,x0,120 + 800090ec: 00d600a3 sb x13,1(x12) + 800090f0: 00260613 addi x12,x12,2 + 800090f4: 00058693 addi x13,x11,0 + +00000000800090f8 : + 800090f8: ffc68693 addi x13,x13,-4 + 800090fc: 00d55733 srl x14,x10,x13 + 80009100: 00f77713 andi x14,x14,15 + 80009104: 00a00793 addi x15,x0,10 + 80009108: 00f74663 blt x14,x15,80009114 + 8000910c: 05770713 addi x14,x14,87 + 80009110: 0080006f jal x0,80009118 + +0000000080009114 : + 80009114: 03070713 addi x14,x14,48 + +0000000080009118 : + 80009118: 00e60023 sb x14,0(x12) + 8000911c: 00160613 addi x12,x12,1 + 80009120: fc069ce3 bne x13,x0,800090f8 + 80009124: 00a00693 addi x13,x0,10 + 80009128: 00d60023 sb x13,0(x12) + 8000912c: 000600a3 sb x0,1(x12) + 80009130: 00008067 jalr x0,0(x1) + +0000000080009134 : + 80009134: 00a00693 addi x13,x0,10 + 80009138: 02d54663 blt x10,x13,80009164 + 8000913c: ff650513 addi x10,x10,-10 + 80009140: 03100713 addi x14,x0,49 + 80009144: 00d54c63 blt x10,x13,8000915c + 80009148: ff650513 addi x10,x10,-10 + 8000914c: 03200713 addi x14,x0,50 + 80009150: 00d54663 blt x10,x13,8000915c + 80009154: ff650513 addi x10,x10,-10 + 80009158: 03300713 addi x14,x0,51 + 8000915c: 00e60023 sb x14,0(x12) + 80009160: 00160613 addi x12,x12,1 + 80009164: 03050513 addi x10,x10,48 + 80009168: 00a60023 sb x10,0(x12) + 8000916c: 00a00693 addi x13,x0,10 + 80009170: 00d600a3 sb x13,1(x12) + 80009174: 00060123 sb x0,2(x12) + 80009178: 00008067 jalr x0,0(x1) + 8000917c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080038000 : + 80038000: 10010737 lui x14,0x10010 + 80038004: 00072023 sw x0,0(x14) # 10010000 + 80038008: fffcf397 auipc x7,0xfffcf + 8003800c: 07038393 addi x7,x7,112 # 80007078 + 80038010: 00038067 jalr x0,0(x7) + +0000000080038014 : + 80038014: fff00713 addi x14,x0,-1 + 80038018: 100143b7 lui x7,0x10014 + 8003801c: 00e3b023 sd x14,0(x7) # 10014000 + 80038020: fffcf397 auipc x7,0xfffcf + 80038024: 05838393 addi x7,x7,88 # 80007078 + 80038028: 00038067 jalr x0,0(x7) + +000000008003802c : + 8003802c: 10000737 lui x14,0x10000 + 80038030: 0107071b addiw x14,x14,16 # 10000010 + 80038034: 00070023 sb x0,0(x14) + 80038038: fffcf397 auipc x7,0xfffcf + 8003803c: 04038393 addi x7,x7,64 # 80007078 + 80038040: 00038067 jalr x0,0(x7) + +0000000080038044 : + 80038044: 00200393 addi x7,x0,2 + 80038048: 3443b073 csrrc x0,mip,x7 + 8003804c: fffcf397 auipc x7,0xfffcf + 80038050: 02c38393 addi x7,x7,44 # 80007078 + 80038054: 00038067 jalr x0,0(x7) + +0000000080038058 : + 80038058: fffcf397 auipc x7,0xfffcf + 8003805c: 02038393 addi x7,x7,32 # 80007078 + 80038060: 00038067 jalr x0,0(x7) + +0000000080038064 : + 80038064: 20000413 addi x8,x0,512 + 80038068: 34443073 csrrc x0,mip,x8 + 8003806c: 34402473 csrrs x8,mip,x0 + 80038070: 00001337 lui x6,0x1 + 80038074: 8003031b addiw x6,x6,-2048 # 800 + 80038078: 00647433 and x8,x8,x6 + 8003807c: 00830863 beq x6,x8,8003808c + 80038080: 10000737 lui x14,0x10000 + 80038084: 0187071b addiw x14,x14,24 # 10000018 + 80038088: 00070023 sb x0,0(x14) + 8003808c: fffcf397 auipc x7,0xfffcf + 80038090: fec38393 addi x7,x7,-20 # 80007078 + 80038094: 00038067 jalr x0,0(x7) + +0000000080038098 : + 80038098: fffce317 auipc x6,0xfffce + 8003809c: 13030313 addi x6,x6,304 # 800061c8 + 800380a0: 00030067 jalr x0,0(x6) + 800380a4: fffcf397 auipc x7,0xfffcf + 800380a8: fd438393 addi x7,x7,-44 # 80007078 + 800380ac: 00038067 jalr x0,0(x7) + +00000000800380b0 : + 800380b0: fffce317 auipc x6,0xfffce + 800380b4: 11830313 addi x6,x6,280 # 800061c8 + 800380b8: 00030067 jalr x0,0(x6) + 800380bc: fffcf397 auipc x7,0xfffcf + 800380c0: fbc38393 addi x7,x7,-68 # 80007078 + 800380c4: 00038067 jalr x0,0(x7) + +00000000800380c8 : + 800380c8: fffce317 auipc x6,0xfffce + 800380cc: 10030313 addi x6,x6,256 # 800061c8 + 800380d0: 00030067 jalr x0,0(x6) + 800380d4: fffcf397 auipc x7,0xfffcf + 800380d8: fa438393 addi x7,x7,-92 # 80007078 + 800380dc: 00038067 jalr x0,0(x7) + +00000000800380e0 : + 800380e0: 30401073 csrrw x0,mie,x0 + 800380e4: 34401073 csrrw x0,mip,x0 + 800380e8: 34101073 csrrw x0,mepc,x0 + 800380ec: 34301073 csrrw x0,mtval,x0 + 800380f0: 34201073 csrrw x0,mcause,x0 + 800380f4: 00000013 addi x0,x0,0 + 800380f8: 00000013 addi x0,x0,0 + 800380fc: 00000013 addi x0,x0,0 + 80038100: fffd4317 auipc x6,0xfffd4 + 80038104: 01030313 addi x6,x6,16 # 8000c110 + 80038108: 00000013 addi x0,x0,0 + 8003810c: 00000013 addi x0,x0,0 + 80038110: 00000013 addi x0,x0,0 + 80038114: 00000013 addi x0,x0,0 + 80038118: 00000013 addi x0,x0,0 + 8003811c: 00000013 addi x0,x0,0 + +0000000080038120 : + 80038120: 34031473 csrrw x8,mscratch,x6 + 80038124: 2c833823 sd x8,720(x6) + +0000000080038128 : + 80038128: fff00393 addi x7,x0,-1 + 8003812c: 000044b7 lui x9,0x4 + 80038130: 00548493 addi x9,x9,5 # 4005 + 80038134: 00e49493 slli x9,x9,0xe + 80038138: 0074b023 sd x7,0(x9) + 8003813c: 00000013 addi x0,x0,0 + +0000000080038140 : + 80038140: 00000393 addi x7,x0,0 + 80038144: 2a733c23 sd x7,696(x6) + +0000000080038148 : + 80038148: 30502473 csrrs x8,mtvec,x0 + 8003814c: 2c833423 sd x8,712(x6) + 80038150: 00347393 andi x7,x8,3 + 80038154: ffc3f393 andi x7,x7,-4 + 80038158: 2b033483 ld x9,688(x6) + 8003815c: da848493 addi x9,x9,-600 + 80038160: 0074e3b3 or x7,x9,x7 + 80038164: 2c733023 sd x7,704(x6) + 80038168: 30539073 csrrw x0,mtvec,x7 + 8003816c: 30502773 csrrs x14,mtvec,x0 + 80038170: 0e770a63 beq x14,x7,80038264 + 80038174: 30541073 csrrw x0,mtvec,x8 + 80038178: 0a040663 beq x8,x0,80038224 + 8003817c: 2c833023 sd x8,704(x6) + +0000000080038180 : + 80038180: ffc47393 andi x7,x8,-4 + 80038184: 25838413 addi x8,x7,600 + 80038188: 00030113 addi x2,x6,0 + 8003818c: 00000013 addi x0,x0,0 + 80038190: 00000013 addi x0,x0,0 + 80038194: 00000013 addi x0,x0,0 + 80038198: 00000013 addi x0,x0,0 + 8003819c: 00000013 addi x0,x0,0 + 800381a0: 00000717 auipc x14,0x0 + 800381a4: 04c70713 addi x14,x14,76 # 800381ec + 800381a8: 00000013 addi x0,x0,0 + 800381ac: 00000013 addi x0,x0,0 + 800381b0: 00000013 addi x0,x0,0 + 800381b4: 00000013 addi x0,x0,0 + 800381b8: 00000013 addi x0,x0,0 + 800381bc: 00000013 addi x0,x0,0 + 800381c0: 00000797 auipc x15,0x0 + 800381c4: 0a478793 addi x15,x15,164 # 80038264 + 800381c8: 00000013 addi x0,x0,0 + 800381cc: 00000013 addi x0,x0,0 + 800381d0: 00000013 addi x0,x0,0 + 800381d4: 00000013 addi x0,x0,0 + 800381d8: 00000013 addi x0,x0,0 + 800381dc: 00000013 addi x0,x0,0 + 800381e0: 00f3f663 bgeu x7,x15,800381ec + 800381e4: 00877463 bgeu x14,x8,800381ec + 800381e8: 03c0006f jal x0,80038224 + +00000000800381ec : + 800381ec: 0003a783 lw x15,0(x7) + 800381f0: 00f32023 sw x15,0(x6) + 800381f4: 0004a703 lw x14,0(x9) + 800381f8: 00e3a023 sw x14,0(x7) + 800381fc: 0003a783 lw x15,0(x7) + 80038200: 00e79a63 bne x15,x14,80038214 + 80038204: 00438393 addi x7,x7,4 + 80038208: 00430313 addi x6,x6,4 + 8003820c: 00448493 addi x9,x9,4 + 80038210: fc741ee3 bne x8,x7,800381ec + +0000000080038214 : + 80038214: 0000100f fence.i + 80038218: 34002373 csrrs x6,mscratch,x0 + 8003821c: 2a933823 sd x9,688(x6) + 80038220: 04740263 beq x8,x7,80038264 + +0000000080038224 : + 80038224: 00038413 addi x8,x7,0 + 80038228: 00000013 addi x0,x0,0 + 8003822c: 00000013 addi x0,x0,0 + 80038230: 00000013 addi x0,x0,0 + 80038234: 00000013 addi x0,x0,0 + 80038238: 00000013 addi x0,x0,0 + 8003823c: 00000013 addi x0,x0,0 + 80038240: fffce797 auipc x15,0xfffce + 80038244: f9878793 addi x15,x15,-104 # 800061d8 + 80038248: 00000013 addi x0,x0,0 + 8003824c: 00000013 addi x0,x0,0 + 80038250: 00000013 addi x0,x0,0 + 80038254: 00000013 addi x0,x0,0 + 80038258: 00000013 addi x0,x0,0 + 8003825c: 00000013 addi x0,x0,0 + 80038260: 00078067 jalr x0,0(x15) + +0000000080038264 : + 80038264: 00000013 addi x0,x0,0 + +0000000080038268 : + 80038268: 005002b7 lui x5,0x500 + 8003826c: 0012829b addiw x5,x5,1 # 500001 + 80038270: 00d29293 slli x5,x5,0xd + 80038274: 80028293 addi x5,x5,-2048 + 80038278: 30029073 csrrw x0,mstatus,x5 + 8003827c: 32001073 csrrw x0,mcountinhibit,x0 + 80038280: 32301073 csrrw x0,mhpmevent3,x0 + 80038284: 32401073 csrrw x0,mhpmevent4,x0 + 80038288: 32501073 csrrw x0,mhpmevent5,x0 + 8003828c: 32601073 csrrw x0,mhpmevent6,x0 + 80038290: 32701073 csrrw x0,mhpmevent7,x0 + 80038294: 32801073 csrrw x0,mhpmevent8,x0 + 80038298: 32901073 csrrw x0,mhpmevent9,x0 + 8003829c: 32a01073 csrrw x0,mhpmevent10,x0 + 800382a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800382a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800382a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800382ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800382b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800382b4: 33001073 csrrw x0,mhpmevent16,x0 + 800382b8: 33101073 csrrw x0,mhpmevent17,x0 + 800382bc: 33201073 csrrw x0,mhpmevent18,x0 + 800382c0: 33301073 csrrw x0,mhpmevent19,x0 + 800382c4: 33401073 csrrw x0,mhpmevent20,x0 + 800382c8: 33501073 csrrw x0,mhpmevent21,x0 + 800382cc: 33601073 csrrw x0,mhpmevent22,x0 + 800382d0: 33701073 csrrw x0,mhpmevent23,x0 + 800382d4: 33801073 csrrw x0,mhpmevent24,x0 + 800382d8: 33901073 csrrw x0,mhpmevent25,x0 + 800382dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800382e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800382e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800382e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800382ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800382f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800382f4: 00000013 addi x0,x0,0 + 800382f8: 00000013 addi x0,x0,0 + 800382fc: 00000013 addi x0,x0,0 + 80038300: fffd4317 auipc x6,0xfffd4 + 80038304: e0830313 addi x6,x6,-504 # 8000c108 + 80038308: 00000013 addi x0,x0,0 + 8003830c: 00000013 addi x0,x0,0 + 80038310: 00000013 addi x0,x0,0 + 80038314: 00000013 addi x0,x0,0 + 80038318: 00000013 addi x0,x0,0 + 8003831c: 00000013 addi x0,x0,0 + 80038320: 00033023 sd x0,0(x6) + +0000000080038324 : + 80038324: feedc0b7 lui x1,0xfeedc + 80038328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003832c: 00b09093 slli x1,x1,0xb + 80038330: 7f708093 addi x1,x1,2039 + 80038334: 00b09093 slli x1,x1,0xb + 80038338: 36f08093 addi x1,x1,879 + 8003833c: 00a09093 slli x1,x1,0xa + 80038340: 2ad08093 addi x1,x1,685 + 80038344: 03909793 slli x15,x1,0x39 + 80038348: 0070d113 srli x2,x1,0x7 + 8003834c: 00f16133 or x2,x2,x15 + 80038350: 03911793 slli x15,x2,0x39 + 80038354: 00715193 srli x3,x2,0x7 + 80038358: 00f1e1b3 or x3,x3,x15 + 8003835c: 03919793 slli x15,x3,0x39 + 80038360: 0071d213 srli x4,x3,0x7 + 80038364: 00f26233 or x4,x4,x15 + 80038368: 03921793 slli x15,x4,0x39 + 8003836c: 00725293 srli x5,x4,0x7 + 80038370: 00f2e2b3 or x5,x5,x15 + 80038374: 03929793 slli x15,x5,0x39 + 80038378: 0072d313 srli x6,x5,0x7 + 8003837c: 00f36333 or x6,x6,x15 + 80038380: 03931793 slli x15,x6,0x39 + 80038384: 00735393 srli x7,x6,0x7 + 80038388: 00f3e3b3 or x7,x7,x15 + 8003838c: 03939793 slli x15,x7,0x39 + 80038390: 0073d413 srli x8,x7,0x7 + 80038394: 00f46433 or x8,x8,x15 + 80038398: 03941793 slli x15,x8,0x39 + 8003839c: 00745493 srli x9,x8,0x7 + 800383a0: 00f4e4b3 or x9,x9,x15 + 800383a4: 03949793 slli x15,x9,0x39 + 800383a8: 0074d513 srli x10,x9,0x7 + 800383ac: 00f56533 or x10,x10,x15 + 800383b0: 03951793 slli x15,x10,0x39 + 800383b4: 00755593 srli x11,x10,0x7 + 800383b8: 00f5e5b3 or x11,x11,x15 + 800383bc: 03959793 slli x15,x11,0x39 + 800383c0: 0075d613 srli x12,x11,0x7 + 800383c4: 00f66633 or x12,x12,x15 + 800383c8: 03961793 slli x15,x12,0x39 + 800383cc: 00765693 srli x13,x12,0x7 + 800383d0: 00f6e6b3 or x13,x13,x15 + 800383d4: 03969793 slli x15,x13,0x39 + 800383d8: 0076d713 srli x14,x13,0x7 + 800383dc: 00f76733 or x14,x14,x15 + 800383e0: fab807b7 lui x15,0xfab80 + 800383e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800383e8: 00b79793 slli x15,x15,0xb + 800383ec: 7d578793 addi x15,x15,2005 + 800383f0: 00b79793 slli x15,x15,0xb + 800383f4: 5fe78793 addi x15,x15,1534 + 800383f8: 00a79793 slli x15,x15,0xa + 800383fc: 3b678793 addi x15,x15,950 + 80038400: 7d5c0837 lui x16,0x7d5c0 + 80038404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80038408: 00b81813 slli x16,x16,0xb + 8003840c: 3ea80813 addi x16,x16,1002 + 80038410: 00b81813 slli x16,x16,0xb + 80038414: 6ff80813 addi x16,x16,1791 + 80038418: 00a81813 slli x16,x16,0xa + 8003841c: 1db80813 addi x16,x16,475 + 80038420: 03981793 slli x15,x16,0x39 + 80038424: 00785893 srli x17,x16,0x7 + 80038428: 00f8e8b3 or x17,x17,x15 + 8003842c: 03989793 slli x15,x17,0x39 + 80038430: 0078d913 srli x18,x17,0x7 + 80038434: 00f96933 or x18,x18,x15 + 80038438: 03991793 slli x15,x18,0x39 + 8003843c: 00795993 srli x19,x18,0x7 + 80038440: 00f9e9b3 or x19,x19,x15 + 80038444: 03999793 slli x15,x19,0x39 + 80038448: 0079da13 srli x20,x19,0x7 + 8003844c: 00fa6a33 or x20,x20,x15 + 80038450: 039a1793 slli x15,x20,0x39 + 80038454: 007a5a93 srli x21,x20,0x7 + 80038458: 00faeab3 or x21,x21,x15 + 8003845c: 039a9793 slli x15,x21,0x39 + 80038460: 007adb13 srli x22,x21,0x7 + 80038464: 00fb6b33 or x22,x22,x15 + 80038468: 039b1793 slli x15,x22,0x39 + 8003846c: 007b5b93 srli x23,x22,0x7 + 80038470: 00fbebb3 or x23,x23,x15 + 80038474: 039b9793 slli x15,x23,0x39 + 80038478: 007bdc13 srli x24,x23,0x7 + 8003847c: 00fc6c33 or x24,x24,x15 + 80038480: 039c1793 slli x15,x24,0x39 + 80038484: 007c5c93 srli x25,x24,0x7 + 80038488: 00fcecb3 or x25,x25,x15 + 8003848c: 039c9793 slli x15,x25,0x39 + 80038490: 007cdd13 srli x26,x25,0x7 + 80038494: 00fd6d33 or x26,x26,x15 + 80038498: 039d1793 slli x15,x26,0x39 + 8003849c: 007d5d93 srli x27,x26,0x7 + 800384a0: 00fdedb3 or x27,x27,x15 + 800384a4: 039d9793 slli x15,x27,0x39 + 800384a8: 007dde13 srli x28,x27,0x7 + 800384ac: 00fe6e33 or x28,x28,x15 + 800384b0: 039e1793 slli x15,x28,0x39 + 800384b4: 007e5e93 srli x29,x28,0x7 + 800384b8: 00feeeb3 or x29,x29,x15 + 800384bc: 039e9793 slli x15,x29,0x39 + 800384c0: 007edf13 srli x30,x29,0x7 + 800384c4: 00ff6f33 or x30,x30,x15 + 800384c8: 039f1793 slli x15,x30,0x39 + 800384cc: 007f5f93 srli x31,x30,0x7 + 800384d0: 00ffefb3 or x31,x31,x15 + 800384d4: 00000013 addi x0,x0,0 + 800384d8: 00000013 addi x0,x0,0 + 800384dc: 00000013 addi x0,x0,0 + 800384e0: fffe1117 auipc x2,0xfffe1 + 800384e4: 2d010113 addi x2,x2,720 # 800197b0 + 800384e8: 00000013 addi x0,x0,0 + 800384ec: 00000013 addi x0,x0,0 + 800384f0: 00000013 addi x0,x0,0 + 800384f4: 00000013 addi x0,x0,0 + 800384f8: 00000013 addi x0,x0,0 + 800384fc: 00000013 addi x0,x0,0 + +0000000080038500 : + 80038500: 6f5ca337 lui x6,0x6f5ca + 80038504: 30930313 addi x6,x6,777 # 6f5ca309 + 80038508: 00b31313 slli x6,x6,0xb + 8003850c: 73e30313 addi x6,x6,1854 + 80038510: 00b31313 slli x6,x6,0xb + 80038514: 52c30313 addi x6,x6,1324 + 80038518: 00a31313 slli x6,x6,0xa + 8003851c: 28130313 addi x6,x6,641 + 80038520: fffcf197 auipc x3,0xfffcf + 80038524: 06018193 addi x3,x3,96 # 80007580 + 80038528: 00000013 addi x0,x0,0 + 8003852c: 00000013 addi x0,x0,0 + 80038530: 00000013 addi x0,x0,0 + 80038534: 00000013 addi x0,x0,0 + 80038538: 00000013 addi x0,x0,0 + 8003853c: 00000013 addi x0,x0,0 + 80038540: 00013203 ld x4,0(x2) + 80038544: 00620c63 beq x4,x6,8003855c + 80038548: 000182e7 jalr x5,0(x3) + 8003854c: 80038500 .word 0x80038500 + 80038550: 00000000 .word 0x00000000 + 80038554: 80018d5b .word 0x80018d5b + 80038558: 00000000 .word 0x00000000 + 8003855c: 00810113 addi x2,x2,8 + 80038560: fffd4197 auipc x3,0xfffd4 + 80038564: f1018193 addi x3,x3,-240 # 8000c470 + 80038568: 00000013 addi x0,x0,0 + 8003856c: 00000013 addi x0,x0,0 + 80038570: 00000013 addi x0,x0,0 + 80038574: 00000013 addi x0,x0,0 + 80038578: 00000013 addi x0,x0,0 + 8003857c: 00000013 addi x0,x0,0 + 80038580: fffc8317 auipc x6,0xfffc8 + 80038584: ac030313 addi x6,x6,-1344 # 80000040 + 80038588: 00000013 addi x0,x0,0 + 8003858c: 00000013 addi x0,x0,0 + 80038590: 00000013 addi x0,x0,0 + 80038594: 00000013 addi x0,x0,0 + 80038598: 00000013 addi x0,x0,0 + 8003859c: 00000013 addi x0,x0,0 + 800385a0: 00030067 jalr x0,0(x6) + +00000000800385a4 : + 800385a4: 00054303 lbu x6,0(x10) + 800385a8: 00030a63 beq x6,x0,800385bc + 800385ac: 100003b7 lui x7,0x10000 + 800385b0: 00638023 sb x6,0(x7) # 10000000 + 800385b4: 00150513 addi x10,x10,1 + 800385b8: fedff06f jal x0,800385a4 + 800385bc: 00008067 jalr x0,0(x1) + +00000000800385c0 : + 800385c0: ff010113 addi x2,x2,-16 + 800385c4: 00113023 sd x1,0(x2) + 800385c8: 00813423 sd x8,8(x2) + 800385cc: 00000097 auipc x1,0x0 + 800385d0: fd8080e7 jalr x1,-40(x1) # 800385a4 + 800385d4: 00813403 ld x8,8(x2) + 800385d8: 00013083 ld x1,0(x2) + 800385dc: 01010113 addi x2,x2,16 + 800385e0: 00008067 jalr x0,0(x1) + +00000000800385e4 : + 800385e4: 00100093 addi x1,x0,1 + 800385e8: fffff297 auipc x5,0xfffff + 800385ec: 61828293 addi x5,x5,1560 # 80037c00 + +00000000800385f0 : + 800385f0: 0012a023 sw x1,0(x5) + 800385f4: 0002a223 sw x0,4(x5) + +00000000800385f8 : + 800385f8: 00000013 addi x0,x0,0 + 800385fc: ffdff06f jal x0,800385f8 + 80038600: 0000006f jal x0,80038600 + +0000000080038604 : + 80038604: 00300093 addi x1,x0,3 + 80038608: fffff297 auipc x5,0xfffff + 8003860c: 5f828293 addi x5,x5,1528 # 80037c00 + +0000000080038610 : + 80038610: 0012a023 sw x1,0(x5) + 80038614: 0002a223 sw x0,4(x5) + +0000000080038618 : + 80038618: 00000013 addi x0,x0,0 + 8003861c: ffdff06f jal x0,80038618 + 80038620: 0000006f jal x0,80038620 + +0000000080038624 : + 80038624: 00100513 addi x10,x0,1 + 80038628: 100105b7 lui x11,0x10010 + 8003862c: 00a5a023 sw x10,0(x11) # 10010000 + 80038630: 00008067 jalr x0,0(x1) + +0000000080038634 : + 80038634: 100105b7 lui x11,0x10010 + 80038638: 0005a023 sw x0,0(x11) # 10010000 + 8003863c: 00008067 jalr x0,0(x1) + +0000000080038640 : + 80038640: 00100513 addi x10,x0,1 + 80038644: 100005b7 lui x11,0x10000 + 80038648: 0105859b addiw x11,x11,16 # 10000010 + 8003864c: 00a58023 sb x10,0(x11) + 80038650: 00008067 jalr x0,0(x1) + +0000000080038654 : + 80038654: 100005b7 lui x11,0x10000 + 80038658: 0105859b addiw x11,x11,16 # 10000010 + 8003865c: 00058023 sb x0,0(x11) + 80038660: 00008067 jalr x0,0(x1) + 80038664: 00000013 addi x0,x0,0 + 80038668: 00000013 addi x0,x0,0 + 8003866c: 00000013 addi x0,x0,0 + 80038670: 00000013 addi x0,x0,0 + 80038674: 00000013 addi x0,x0,0 + 80038678: 00000013 addi x0,x0,0 + 8003867c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-packh-00.elf.objdump b/riscv-tests/rv64-Zbkb-packh-00.elf.objdump new file mode 100644 index 0000000..cfd27a1 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-packh-00.elf.objdump @@ -0,0 +1,17098 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-packh-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-packh-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c710 000000008000c000 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+0000000080014092 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str +0000000080003b68 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1 +00000000800140f3 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str +0000000080003b9c l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2 +0000000080014154 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str +0000000080003bd0 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000 +00000000800141b5 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str +0000000080003c04 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001 +0000000080014225 l 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Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003da4 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +00000000800145a5 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003dd8 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +000000008001460d l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e0c l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +0000000080014675 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e40 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +00000000800146de l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e74 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0 +0000000080014747 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str +0000000080003ea8 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1 +00000000800147a8 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str +0000000080003edc l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2 +0000000080014809 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str +0000000080003f10 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +000000008001486a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f44 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +00000000800148da l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f78 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +000000008001494a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fac l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +00000000800149ba l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fe0 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +0000000080014a2a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004014 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +0000000080014a9a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +0000000080004048 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014b0a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +000000008000407c l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014b7a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040b0 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014bea l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e4 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014c5a l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004118 l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014cc2 l .data 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +000000008000414c l .text.rvtest 0000000000000000 Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014d2a l .data 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0000000000000000 Vclr_Mext_int_str +00000000800195aa l .data 0000000000000000 Vclr_Sext_int_str +00000000800195fd l .data 0000000000000000 Vclr_Vext_int_str +0000000080019c9c l .data 0000000000000000 trap_diag_curr_xepc_str +0000000080038710 g .data 0000000000000000 end_signature +00000000800395c0 g .text.rvmodel 0000000000000000 rvmodel_io_write_str_c +0000000080038710 g .data 0000000000000000 rvtest_sig_end +0000000080006f18 g .text.rvtest 0000000000000000 common_Mentry +0000000080006984 g .text.rvtest 0000000000000000 rvtest_Mend +0000000080000000 g .text.init 0000000000000000 rvtest_entry_point +000000008001a1d0 g .data 0000000000000000 begin_signature +000000008000c108 g .data 0000000000000000 rvtest_trap_count +0000000080006930 g .text.rvtest 0000000000000000 rvtest_code_end +0000000080000040 g .text.rvtest 0000000000000000 rvtest_code_begin +000000008001a1d0 g .data 0000000000000000 rvtest_sig_begin +000000008000c470 g .data 0000000000000000 rvtest_data_begin +000000008000c110 g .data 0000000000000000 Mtramptbl_sv +000000008001a1cf g .data 0000000000000000 rvtest_data_end +0000000080006930 g .text.rvtest 0000000000000000 cleanup_epilogs +000000008003a000 g .text.rvmodel 0000000000000000 _end +0000000080038900 g .tohost 0000000000000000 fromhost +0000000080038800 g .tohost 0000000000000000 tohost +0000000080006c10 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x8270b6d14bd49e19 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xf1b1710989bb2b19 + 80000048: 0001ba83 ld x21,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_packh_cg_cp_rs1_b0: + packh x11, x0, x21 # perform operation + 80000050: 095075b3 packh x11,x0,x21 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_packh_cg_cp_rs1_b0, Zbkb_packh_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00b20c63 beq x4,x11,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6e8e918dad031a42 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xe207f9d0fcafa981 + 8000007c: 0001b903 ld x18,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_packh_cg_cp_rs1_b1: + packh x8, x1, x18 # perform operation + 80000084: 0920f433 packh x8,x1,x18 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zbkb_packh_cg_cp_rs1_b1, Zbkb_packh_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 00820c63 beq x4,x8,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a2 .word 0x8000e4a2 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x18, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010913 addi x18,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xf7dfe790a5b64a17 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xb48f2f2611acf566 + 800000b4: 0001bb83 ld x23,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_packh_cg_cp_rs1_b2: + packh x29, x2, x23 # perform operation + 800000bc: 09717eb3 packh x29,x2,x23 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zbkb_packh_cg_cp_rs1_b2, Zbkb_packh_cg_cp_rs1_b2_str) + 800000c0: 00093203 ld x4,0(x18) + 800000c4: 01d20c63 beq x4,x29,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d4 .word 0x8000e4d4 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00890913 addi x18,x18,8 + + mv x15, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018793 addi x15,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xdab7867b43cd0f69 + 800000e4: 0007b183 ld x3,0(x15) + 800000e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x99c3ea3b9956bd12 + 800000ec: 0007b983 ld x19,0(x15) + 800000f0: 00878793 addi x15,x15,8 + +00000000800000f4 : +Zbkb_packh_cg_cp_rs1_b3: + packh x1, x3, x19 # perform operation + 800000f4: 0931f0b3 packh x1,x3,x19 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_packh_cg_cp_rs1_b3, Zbkb_packh_cg_cp_rs1_b3_str) + 800000f8: 00093203 ld x4,0(x18) + 800000fc: 00120c63 beq x4,x1,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e506 .word 0x8000e506 + 80000110: 00000000 .word 0x00000000 + 80000114: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x88bbaa1d2d1c18b0 + 80000120: 0007b203 ld x4,0(x15) + 80000124: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x799102e833a149fa + 80000128: 0007b083 ld x1,0(x15) + 8000012c: 00878793 addi x15,x15,8 + +0000000080000130 : +Zbkb_packh_cg_cp_rs1_b4: + packh x5, x4, x1 # perform operation + 80000130: 081272b3 packh x5,x4,x1 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_packh_cg_cp_rs1_b4, Zbkb_packh_cg_cp_rs1_b4_str) + 80000134: 00093683 ld x13,0(x18) + 80000138: 00568c63 beq x13,x5,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e538 .word 0x8000e538 + 8000014c: 00000000 .word 0x00000000 + 80000150: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x8104fc94eb37810b + 80000154: 0007b283 ld x5,0(x15) + 80000158: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x949b5c784d20a65a + 8000015c: 0007bd83 ld x27,0(x15) + 80000160: 00878793 addi x15,x15,8 + +0000000080000164 : +Zbkb_packh_cg_cp_rs1_b5: + packh x23, x5, x27 # perform operation + 80000164: 09b2fbb3 packh x23,x5,x27 + # Check if x23 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x23, Zbkb_packh_cg_cp_rs1_b5, Zbkb_packh_cg_cp_rs1_b5_str) + 80000168: 00093683 ld x13,0(x18) + 8000016c: 01768c63 beq x13,x23,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e56a .word 0x8000e56a + 80000180: 00000000 .word 0x00000000 + 80000184: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xe33b6ce5a1d19831 + 80000188: 0007b303 ld x6,0(x15) + 8000018c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5635b2cef2475f13 + 80000190: 0007bf03 ld x30,0(x15) + 80000194: 00878793 addi x15,x15,8 + +0000000080000198 : +Zbkb_packh_cg_cp_rs1_b6: + packh x12, x6, x30 # perform operation + 80000198: 09e37633 packh x12,x6,x30 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_packh_cg_cp_rs1_b6, Zbkb_packh_cg_cp_rs1_b6_str) + 8000019c: 00093683 ld x13,0(x18) + 800001a0: 00c68c63 beq x13,x12,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e59c .word 0x8000e59c + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x94deebbcd859c4ab + 800001bc: 0007b383 ld x7,0(x15) + 800001c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x41a53156483e7b25 + 800001c4: 0007ba83 ld x21,0(x15) + 800001c8: 00878793 addi x15,x15,8 + +00000000800001cc : +Zbkb_packh_cg_cp_rs1_b7: + packh x27, x7, x21 # perform operation + 800001cc: 0953fdb3 packh x27,x7,x21 + # Check if x27 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x27, Zbkb_packh_cg_cp_rs1_b7, Zbkb_packh_cg_cp_rs1_b7_str) + 800001d0: 00093683 ld x13,0(x18) + 800001d4: 01b68c63 beq x13,x27,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5ce .word 0x8000e5ce + 800001e8: 00000000 .word 0x00000000 + 800001ec: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xf00767cc6db1f2c8 + 800001f0: 0007b403 ld x8,0(x15) + 800001f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xb3eaea65e4ec94ba + 800001f8: 0007bc83 ld x25,0(x15) + 800001fc: 00878793 addi x15,x15,8 + +0000000080000200 : +Zbkb_packh_cg_cp_rs1_b8: + packh x22, x8, x25 # perform operation + 80000200: 09947b33 packh x22,x8,x25 + # Check if x22 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x22, Zbkb_packh_cg_cp_rs1_b8, Zbkb_packh_cg_cp_rs1_b8_str) + 80000204: 00093683 ld x13,0(x18) + 80000208: 01668c63 beq x13,x22,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e600 .word 0x8000e600 + 8000021c: 00000000 .word 0x00000000 + 80000220: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xc479ea8278812f82 + 80000224: 0007b483 ld x9,0(x15) + 80000228: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xf5a82a99b0d48996 + 8000022c: 0007bb03 ld x22,0(x15) + 80000230: 00878793 addi x15,x15,8 + +0000000080000234 : +Zbkb_packh_cg_cp_rs1_b9: + packh x6, x9, x22 # perform operation + 80000234: 0964f333 packh x6,x9,x22 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_packh_cg_cp_rs1_b9, Zbkb_packh_cg_cp_rs1_b9_str) + 80000238: 00093683 ld x13,0(x18) + 8000023c: 00668c63 beq x13,x6,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e632 .word 0x8000e632 + 80000250: 00000000 .word 0x00000000 + 80000254: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xe996e7ab7439adaa + 80000258: 0007b503 ld x10,0(x15) + 8000025c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xa575b348626e6e20 + 80000260: 0007bc03 ld x24,0(x15) + 80000264: 00878793 addi x15,x15,8 + +0000000080000268 : +Zbkb_packh_cg_cp_rs1_b10: + packh x21, x10, x24 # perform operation + 80000268: 09857ab3 packh x21,x10,x24 + # Check if x21 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x21, Zbkb_packh_cg_cp_rs1_b10, Zbkb_packh_cg_cp_rs1_b10_str) + 8000026c: 00093683 ld x13,0(x18) + 80000270: 01568c63 beq x13,x21,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e665 .word 0x8000e665 + 80000284: 00000000 .word 0x00000000 + 80000288: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x690d7fe02aa3354c + 8000028c: 0007b583 ld x11,0(x15) + 80000290: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x8ba1d919985f665e + 80000294: 0007bf03 ld x30,0(x15) + 80000298: 00878793 addi x15,x15,8 + +000000008000029c : +Zbkb_packh_cg_cp_rs1_b11: + packh x28, x11, x30 # perform operation + 8000029c: 09e5fe33 packh x28,x11,x30 + # Check if x28 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x28, Zbkb_packh_cg_cp_rs1_b11, Zbkb_packh_cg_cp_rs1_b11_str) + 800002a0: 00093683 ld x13,0(x18) + 800002a4: 01c68c63 beq x13,x28,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e699 .word 0x8000e699 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xc1697796f49d4ff0 + 800002c0: 0007b603 ld x12,0(x15) + 800002c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x2ee12e63fe20b311 + 800002c8: 0007b403 ld x8,0(x15) + 800002cc: 00878793 addi x15,x15,8 + +00000000800002d0 : +Zbkb_packh_cg_cp_rs1_b12: + packh x5, x12, x8 # perform operation + 800002d0: 088672b3 packh x5,x12,x8 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_packh_cg_cp_rs1_b12, Zbkb_packh_cg_cp_rs1_b12_str) + 800002d4: 00093683 ld x13,0(x18) + 800002d8: 00568c63 beq x13,x5,800002f0 + 800002dc: 2650776f jal x14,80007d40 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 8000e6cd .word 0x8000e6cd + 800002ec: 00000000 .word 0x00000000 + 800002f0: 00890913 addi x18,x18,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x9d0674ec61facbf1 + 800002fc: 0007b683 ld x13,0(x15) + 80000300: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x73722590e2da53d4 + 80000304: 0007ba83 ld x21,0(x15) + 80000308: 00878793 addi x15,x15,8 + +000000008000030c : +Zbkb_packh_cg_cp_rs1_b13: + packh x31, x13, x21 # perform operation + 8000030c: 0956ffb3 packh x31,x13,x21 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_packh_cg_cp_rs1_b13, Zbkb_packh_cg_cp_rs1_b13_str) + 80000310: 00093203 ld x4,0(x18) + 80000314: 01f20c63 beq x4,x31,8000032c + 80000318: 1e9072ef jal x5,80007d00 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e701 .word 0x8000e701 + 80000328: 00000000 .word 0x00000000 + 8000032c: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x2bfaa0219b10b345 + 80000330: 0007b703 ld x14,0(x15) + 80000334: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x9b421942707b450c + 80000338: 0007b303 ld x6,0(x15) + 8000033c: 00878793 addi x15,x15,8 + +0000000080000340 : +Zbkb_packh_cg_cp_rs1_b14: + packh x31, x14, x6 # perform operation + 80000340: 08677fb3 packh x31,x14,x6 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_packh_cg_cp_rs1_b14, Zbkb_packh_cg_cp_rs1_b14_str) + 80000344: 00093203 ld x4,0(x18) + 80000348: 01f20c63 beq x4,x31,80000360 + 8000034c: 1b5072ef jal x5,80007d00 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e735 .word 0x8000e735 + 8000035c: 00000000 .word 0x00000000 + 80000360: 00890913 addi x18,x18,8 + + mv x26, x15 # switch data pointer register to avoid conflict with test + 80000364: 00078d13 addi x26,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x03074e42c308ca50 + 80000368: 000d3783 ld x15,0(x26) + 8000036c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xd832bc425345e87a + 80000370: 000d3603 ld x12,0(x26) + 80000374: 008d0d13 addi x26,x26,8 + +0000000080000378 : +Zbkb_packh_cg_cp_rs1_b15: + packh x31, x15, x12 # perform operation + 80000378: 08c7ffb3 packh x31,x15,x12 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_packh_cg_cp_rs1_b15, Zbkb_packh_cg_cp_rs1_b15_str) + 8000037c: 00093203 ld x4,0(x18) + 80000380: 01f20c63 beq x4,x31,80000398 + 80000384: 17d072ef jal x5,80007d00 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e769 .word 0x8000e769 + 80000394: 00000000 .word 0x00000000 + 80000398: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x742114347e344d3c + 8000039c: 000d3803 ld x16,0(x26) + 800003a0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs2: x6 = 0x742edfbbe9e0e906 + 800003a4: 000d3303 ld x6,0(x26) + 800003a8: 008d0d13 addi x26,x26,8 + +00000000800003ac : +Zbkb_packh_cg_cp_rs1_b16: + packh x19, x16, x6 # perform operation + 800003ac: 086879b3 packh x19,x16,x6 + # Check if x19 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x19, Zbkb_packh_cg_cp_rs1_b16, Zbkb_packh_cg_cp_rs1_b16_str) + 800003b0: 00093203 ld x4,0(x18) + 800003b4: 01320c63 beq x4,x19,800003cc + 800003b8: 149072ef jal x5,80007d00 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 8000e79d .word 0x8000e79d + 800003c8: 00000000 .word 0x00000000 + 800003cc: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xc8f2841d8c90c60b + 800003d0: 000d3883 ld x17,0(x26) + 800003d4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x0f7999daeb0e9ce7 + 800003d8: 000d3583 ld x11,0(x26) + 800003dc: 008d0d13 addi x26,x26,8 + +00000000800003e0 : +Zbkb_packh_cg_cp_rs1_b17: + packh x28, x17, x11 # perform operation + 800003e0: 08b8fe33 packh x28,x17,x11 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zbkb_packh_cg_cp_rs1_b17, Zbkb_packh_cg_cp_rs1_b17_str) + 800003e4: 00093203 ld x4,0(x18) + 800003e8: 01c20c63 beq x4,x28,80000400 + 800003ec: 115072ef jal x5,80007d00 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 8000e7d1 .word 0x8000e7d1 + 800003fc: 00000000 .word 0x00000000 + 80000400: 00890913 addi x18,x18,8 + + mv x15, x18 # switch signature pointer register to avoid conflict with test + 80000404: 00090793 addi x15,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xbe7d43f7c6aecf3d + 80000408: 000d3903 ld x18,0(x26) + 8000040c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xec44573d5adf8d80 + 80000410: 000d3a03 ld x20,0(x26) + 80000414: 008d0d13 addi x26,x26,8 + +0000000080000418 : +Zbkb_packh_cg_cp_rs1_b18: + packh x29, x18, x20 # perform operation + 80000418: 09497eb3 packh x29,x18,x20 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zbkb_packh_cg_cp_rs1_b18, Zbkb_packh_cg_cp_rs1_b18_str) + 8000041c: 0007b203 ld x4,0(x15) + 80000420: 01d20c63 beq x4,x29,80000438 + 80000424: 0dd072ef jal x5,80007d00 + 80000428: 80000418 .word 0x80000418 + 8000042c: 00000000 .word 0x00000000 + 80000430: 8000e805 .word 0x8000e805 + 80000434: 00000000 .word 0x00000000 + 80000438: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x7faaa4c23d619f90 + 8000043c: 000d3983 ld x19,0(x26) + 80000440: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x2bca07fbb41e5ae8 + 80000444: 000d3103 ld x2,0(x26) + 80000448: 008d0d13 addi x26,x26,8 + +000000008000044c : +Zbkb_packh_cg_cp_rs1_b19: + packh x11, x19, x2 # perform operation + 8000044c: 0829f5b3 packh x11,x19,x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zbkb_packh_cg_cp_rs1_b19, Zbkb_packh_cg_cp_rs1_b19_str) + 80000450: 0007b203 ld x4,0(x15) + 80000454: 00b20c63 beq x4,x11,8000046c + 80000458: 0a9072ef jal x5,80007d00 + 8000045c: 8000044c .word 0x8000044c + 80000460: 00000000 .word 0x00000000 + 80000464: 8000e839 .word 0x8000e839 + 80000468: 00000000 .word 0x00000000 + 8000046c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xd999ea7faace1de7 + 80000470: 000d3a03 ld x20,0(x26) + 80000474: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x2) # load rs2: x2 = 0x29726378e268ced7 + 80000478: 000d3103 ld x2,0(x26) + 8000047c: 008d0d13 addi x26,x26,8 + +0000000080000480 : +Zbkb_packh_cg_cp_rs1_b20: + packh x8, x20, x2 # perform operation + 80000480: 082a7433 packh x8,x20,x2 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_packh_cg_cp_rs1_b20, Zbkb_packh_cg_cp_rs1_b20_str) + 80000484: 0007b203 ld x4,0(x15) + 80000488: 00820c63 beq x4,x8,800004a0 + 8000048c: 075072ef jal x5,80007d00 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 8000e86d .word 0x8000e86d + 8000049c: 00000000 .word 0x00000000 + 800004a0: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0xbd88740cf140952f + 800004a4: 000d3a83 ld x21,0(x26) + 800004a8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0xbfd2f7c3397e2225 + 800004ac: 000d3903 ld x18,0(x26) + 800004b0: 008d0d13 addi x26,x26,8 + +00000000800004b4 : +Zbkb_packh_cg_cp_rs1_b21: + packh x31, x21, x18 # perform operation + 800004b4: 092affb3 packh x31,x21,x18 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_packh_cg_cp_rs1_b21, Zbkb_packh_cg_cp_rs1_b21_str) + 800004b8: 0007b203 ld x4,0(x15) + 800004bc: 01f20c63 beq x4,x31,800004d4 + 800004c0: 041072ef jal x5,80007d00 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 8000e8a1 .word 0x8000e8a1 + 800004d0: 00000000 .word 0x00000000 + 800004d4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x3af79a650e1f30e8 + 800004d8: 000d3b03 ld x22,0(x26) + 800004dc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0x81d53449f3bf7950 + 800004e0: 000d3583 ld x11,0(x26) + 800004e4: 008d0d13 addi x26,x26,8 + +00000000800004e8 : +Zbkb_packh_cg_cp_rs1_b22: + packh x6, x22, x11 # perform operation + 800004e8: 08bb7333 packh x6,x22,x11 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_packh_cg_cp_rs1_b22, Zbkb_packh_cg_cp_rs1_b22_str) + 800004ec: 0007b203 ld x4,0(x15) + 800004f0: 00620c63 beq x4,x6,80000508 + 800004f4: 00d072ef jal x5,80007d00 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 8000e8d5 .word 0x8000e8d5 + 80000504: 00000000 .word 0x00000000 + 80000508: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0xb0e5f1740f435795 + 8000050c: 000d3b83 ld x23,0(x26) + 80000510: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xb0c8f5947f745160 + 80000514: 000d3c83 ld x25,0(x26) + 80000518: 008d0d13 addi x26,x26,8 + +000000008000051c : +Zbkb_packh_cg_cp_rs1_b23: + packh x27, x23, x25 # perform operation + 8000051c: 099bfdb3 packh x27,x23,x25 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_packh_cg_cp_rs1_b23, Zbkb_packh_cg_cp_rs1_b23_str) + 80000520: 0007b203 ld x4,0(x15) + 80000524: 01b20c63 beq x4,x27,8000053c + 80000528: 7d8072ef jal x5,80007d00 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8000e909 .word 0x8000e909 + 80000538: 00000000 .word 0x00000000 + 8000053c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x1bd0607fec001bf1 + 80000540: 000d3c03 ld x24,0(x26) + 80000544: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x6a052ab29cab2cb3 + 80000548: 000d3903 ld x18,0(x26) + 8000054c: 008d0d13 addi x26,x26,8 + +0000000080000550 : +Zbkb_packh_cg_cp_rs1_b24: + packh x23, x24, x18 # perform operation + 80000550: 092c7bb3 packh x23,x24,x18 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_packh_cg_cp_rs1_b24, Zbkb_packh_cg_cp_rs1_b24_str) + 80000554: 0007b203 ld x4,0(x15) + 80000558: 01720c63 beq x4,x23,80000570 + 8000055c: 7a4072ef jal x5,80007d00 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e93d .word 0x8000e93d + 8000056c: 00000000 .word 0x00000000 + 80000570: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x6c78e13966d1d701 + 80000574: 000d3c83 ld x25,0(x26) + 80000578: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x41df5242ff95f1d3 + 8000057c: 000d3b03 ld x22,0(x26) + 80000580: 008d0d13 addi x26,x26,8 + +0000000080000584 : +Zbkb_packh_cg_cp_rs1_b25: + packh x30, x25, x22 # perform operation + 80000584: 096cff33 packh x30,x25,x22 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_packh_cg_cp_rs1_b25, Zbkb_packh_cg_cp_rs1_b25_str) + 80000588: 0007b203 ld x4,0(x15) + 8000058c: 01e20c63 beq x4,x30,800005a4 + 80000590: 770072ef jal x5,80007d00 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 8000e971 .word 0x8000e971 + 800005a0: 00000000 .word 0x00000000 + 800005a4: 00878793 addi x15,x15,8 + + mv x2, x26 # switch data pointer register to avoid conflict with test + 800005a8: 000d0113 addi x2,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x54964390420a5839 + 800005ac: 00013d03 ld x26,0(x2) + 800005b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xf190d8edc1001b72 + 800005b4: 00013503 ld x10,0(x2) + 800005b8: 00810113 addi x2,x2,8 + +00000000800005bc : +Zbkb_packh_cg_cp_rs1_b26: + packh x17, x26, x10 # perform operation + 800005bc: 08ad78b3 packh x17,x26,x10 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zbkb_packh_cg_cp_rs1_b26, Zbkb_packh_cg_cp_rs1_b26_str) + 800005c0: 0007b203 ld x4,0(x15) + 800005c4: 01120c63 beq x4,x17,800005dc + 800005c8: 738072ef jal x5,80007d00 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 8000e9a5 .word 0x8000e9a5 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xc4a35f51aed0ea84 + 800005e0: 00013d83 ld x27,0(x2) + 800005e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x5f8dbcbdeabcdd2b + 800005e8: 00013483 ld x9,0(x2) + 800005ec: 00810113 addi x2,x2,8 + +00000000800005f0 : +Zbkb_packh_cg_cp_rs1_b27: + packh x16, x27, x9 # perform operation + 800005f0: 089df833 packh x16,x27,x9 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zbkb_packh_cg_cp_rs1_b27, Zbkb_packh_cg_cp_rs1_b27_str) + 800005f4: 0007b203 ld x4,0(x15) + 800005f8: 01020c63 beq x4,x16,80000610 + 800005fc: 704072ef jal x5,80007d00 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e9d9 .word 0x8000e9d9 + 8000060c: 00000000 .word 0x00000000 + 80000610: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xff27fe1cb8c7bb71 + 80000614: 00013e03 ld x28,0(x2) + 80000618: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x6bcfa346c0eee5aa + 8000061c: 00013303 ld x6,0(x2) + 80000620: 00810113 addi x2,x2,8 + +0000000080000624 : +Zbkb_packh_cg_cp_rs1_b28: + packh x31, x28, x6 # perform operation + 80000624: 086e7fb3 packh x31,x28,x6 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zbkb_packh_cg_cp_rs1_b28, Zbkb_packh_cg_cp_rs1_b28_str) + 80000628: 0007b203 ld x4,0(x15) + 8000062c: 01f20c63 beq x4,x31,80000644 + 80000630: 6d0072ef jal x5,80007d00 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000ea0d .word 0x8000ea0d + 80000640: 00000000 .word 0x00000000 + 80000644: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x96318d97668854cc + 80000648: 00013e83 ld x29,0(x2) + 8000064c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0c81bb2650b6bb21 + 80000650: 00013d03 ld x26,0(x2) + 80000654: 00810113 addi x2,x2,8 + +0000000080000658 : +Zbkb_packh_cg_cp_rs1_b29: + packh x9, x29, x26 # perform operation + 80000658: 09aef4b3 packh x9,x29,x26 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zbkb_packh_cg_cp_rs1_b29, Zbkb_packh_cg_cp_rs1_b29_str) + 8000065c: 0007b203 ld x4,0(x15) + 80000660: 00920c63 beq x4,x9,80000678 + 80000664: 69c072ef jal x5,80007d00 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 8000ea41 .word 0x8000ea41 + 80000674: 00000000 .word 0x00000000 + 80000678: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x1b813ec56fb65e83 + 8000067c: 00013f03 ld x30,0(x2) + 80000680: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x770f3484e6e515d0 + 80000684: 00013083 ld x1,0(x2) + 80000688: 00810113 addi x2,x2,8 + +000000008000068c : +Zbkb_packh_cg_cp_rs1_b30: + packh x21, x30, x1 # perform operation + 8000068c: 081f7ab3 packh x21,x30,x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_packh_cg_cp_rs1_b30, Zbkb_packh_cg_cp_rs1_b30_str) + 80000690: 0007b203 ld x4,0(x15) + 80000694: 01520c63 beq x4,x21,800006ac + 80000698: 668072ef jal x5,80007d00 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 8000ea75 .word 0x8000ea75 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xa69df7b1aa71fef7 + 800006b0: 00013f83 ld x31,0(x2) + 800006b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x979619b4f801b96d + 800006b8: 00013a83 ld x21,0(x2) + 800006bc: 00810113 addi x2,x2,8 + +00000000800006c0 : +Zbkb_packh_cg_cp_rs1_b31: + packh x23, x31, x21 # perform operation + 800006c0: 095ffbb3 packh x23,x31,x21 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_packh_cg_cp_rs1_b31, Zbkb_packh_cg_cp_rs1_b31_str) + 800006c4: 0007b203 ld x4,0(x15) + 800006c8: 01720c63 beq x4,x23,800006e0 + 800006cc: 634072ef jal x5,80007d00 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 8000eaa9 .word 0x8000eaa9 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7022d64c2421d7ed + 800006e4: 00013683 ld x13,0(x2) + 800006e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xb072232aa00ac97a + 800006ec: 00013003 ld x0,0(x2) + 800006f0: 00810113 addi x2,x2,8 + +00000000800006f4 : +Zbkb_packh_cg_cp_rs2_b0: + packh x22, x13, x0 # perform operation + 800006f4: 0806fb33 packh x22,x13,x0 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b0, Zbkb_packh_cg_cp_rs2_b0_str) + 800006f8: 0007b203 ld x4,0(x15) + 800006fc: 01620c63 beq x4,x22,80000714 + 80000700: 600072ef jal x5,80007d00 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 8000eadd .word 0x8000eadd + 80000710: 00000000 .word 0x00000000 + 80000714: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x7e14e35cf5265346 + 80000718: 00013503 ld x10,0(x2) + 8000071c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x95b8e432e2e67d3f + 80000720: 00013083 ld x1,0(x2) + 80000724: 00810113 addi x2,x2,8 + +0000000080000728 : +Zbkb_packh_cg_cp_rs2_b1: + packh x6, x10, x1 # perform operation + 80000728: 08157333 packh x6,x10,x1 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zbkb_packh_cg_cp_rs2_b1, Zbkb_packh_cg_cp_rs2_b1_str) + 8000072c: 0007b203 ld x4,0(x15) + 80000730: 00620c63 beq x4,x6,80000748 + 80000734: 5cc072ef jal x5,80007d00 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 8000eb10 .word 0x8000eb10 + 80000744: 00000000 .word 0x00000000 + 80000748: 00878793 addi x15,x15,8 + + mv x18, x2 # switch data pointer register to avoid conflict with test + 8000074c: 00010913 addi x18,x2,0 +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xad26f2df6e1d6f7b + 80000750: 00093c03 ld x24,0(x18) + 80000754: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x77b03c9ef4a002f9 + 80000758: 00093103 ld x2,0(x18) + 8000075c: 00890913 addi x18,x18,8 + +0000000080000760 : +Zbkb_packh_cg_cp_rs2_b2: + packh x3, x24, x2 # perform operation + 80000760: 082c71b3 packh x3,x24,x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zbkb_packh_cg_cp_rs2_b2, Zbkb_packh_cg_cp_rs2_b2_str) + 80000764: 0007b203 ld x4,0(x15) + 80000768: 00320c63 beq x4,x3,80000780 + 8000076c: 594072ef jal x5,80007d00 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eb43 .word 0x8000eb43 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x0d3e88fdd8cabbdc + 80000784: 00093383 ld x7,0(x18) + 80000788: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x83a89e2b320ce04b + 8000078c: 00093183 ld x3,0(x18) + 80000790: 00890913 addi x18,x18,8 + +0000000080000794 : +Zbkb_packh_cg_cp_rs2_b3: + packh x10, x7, x3 # perform operation + 80000794: 0833f533 packh x10,x7,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zbkb_packh_cg_cp_rs2_b3, Zbkb_packh_cg_cp_rs2_b3_str) + 80000798: 0007b203 ld x4,0(x15) + 8000079c: 00a20c63 beq x4,x10,800007b4 + 800007a0: 560072ef jal x5,80007d00 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb76 .word 0x8000eb76 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00878793 addi x15,x15,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800007b8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800007bc: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x6c8af5defcfee673 + 800007c0: 00093c83 ld x25,0(x18) + 800007c4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x399c69ba35308eb4 + 800007c8: 00093203 ld x4,0(x18) + 800007cc: 00890913 addi x18,x18,8 + +00000000800007d0 : +Zbkb_packh_cg_cp_rs2_b4: + packh x2, x25, x4 # perform operation + 800007d0: 084cf133 packh x2,x25,x4 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cp_rs2_b4, Zbkb_packh_cg_cp_rs2_b4_str) + 800007d4: 0007b383 ld x7,0(x15) + 800007d8: 00238c63 beq x7,x2,800007f0 + 800007dc: 53c0746f jal x8,80007d18 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000eba9 .word 0x8000eba9 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x198188e2b79fccfe + 800007f4: 00093c83 ld x25,0(x18) + 800007f8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0xfe4294cceaffb142 + 800007fc: 00093283 ld x5,0(x18) + 80000800: 00890913 addi x18,x18,8 + +0000000080000804 : +Zbkb_packh_cg_cp_rs2_b5: + packh x28, x25, x5 # perform operation + 80000804: 085cfe33 packh x28,x25,x5 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cp_rs2_b5, Zbkb_packh_cg_cp_rs2_b5_str) + 80000808: 0007b383 ld x7,0(x15) + 8000080c: 01c38c63 beq x7,x28,80000824 + 80000810: 5080746f jal x8,80007d18 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000ebdc .word 0x8000ebdc + 80000820: 00000000 .word 0x00000000 + 80000824: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xeaa81136c98f598a + 80000828: 00093183 ld x3,0(x18) + 8000082c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x9d8b9effc417d46b + 80000830: 00093303 ld x6,0(x18) + 80000834: 00890913 addi x18,x18,8 + +0000000080000838 : +Zbkb_packh_cg_cp_rs2_b6: + packh x21, x3, x6 # perform operation + 80000838: 0861fab3 packh x21,x3,x6 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cp_rs2_b6, Zbkb_packh_cg_cp_rs2_b6_str) + 8000083c: 0007b383 ld x7,0(x15) + 80000840: 01538c63 beq x7,x21,80000858 + 80000844: 4d40746f jal x8,80007d18 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ec0f .word 0x8000ec0f + 80000854: 00000000 .word 0x00000000 + 80000858: 00878793 addi x15,x15,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 8000085c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000860: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x6ef66582e7c37bcc + 80000864: 00093f03 ld x30,0(x18) + 80000868: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xdf91b2755561fee9 + 8000086c: 00093383 ld x7,0(x18) + 80000870: 00890913 addi x18,x18,8 + +0000000080000874 : +Zbkb_packh_cg_cp_rs2_b7: + packh x27, x30, x7 # perform operation + 80000874: 087f7db3 packh x27,x30,x7 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zbkb_packh_cg_cp_rs2_b7, Zbkb_packh_cg_cp_rs2_b7_str) + 80000878: 0007b203 ld x4,0(x15) + 8000087c: 01b20c63 beq x4,x27,80000894 + 80000880: 480072ef jal x5,80007d00 + 80000884: 80000874 .word 0x80000874 + 80000888: 00000000 .word 0x00000000 + 8000088c: 8000ec42 .word 0x8000ec42 + 80000890: 00000000 .word 0x00000000 + 80000894: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x60f3df238a9c08ef + 80000898: 00093f83 ld x31,0(x18) + 8000089c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x77eb6c4eddb7ce83 + 800008a0: 00093403 ld x8,0(x18) + 800008a4: 00890913 addi x18,x18,8 + +00000000800008a8 : +Zbkb_packh_cg_cp_rs2_b8: + packh x22, x31, x8 # perform operation + 800008a8: 088ffb33 packh x22,x31,x8 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b8, Zbkb_packh_cg_cp_rs2_b8_str) + 800008ac: 0007b203 ld x4,0(x15) + 800008b0: 01620c63 beq x4,x22,800008c8 + 800008b4: 44c072ef jal x5,80007d00 + 800008b8: 800008a8 .word 0x800008a8 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 8000ec75 .word 0x8000ec75 + 800008c4: 00000000 .word 0x00000000 + 800008c8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xdfd8165ceed789cc + 800008cc: 00093c03 ld x24,0(x18) + 800008d0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x9499984c839f0527 + 800008d4: 00093483 ld x9,0(x18) + 800008d8: 00890913 addi x18,x18,8 + +00000000800008dc : +Zbkb_packh_cg_cp_rs2_b9: + packh x8, x24, x9 # perform operation + 800008dc: 089c7433 packh x8,x24,x9 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zbkb_packh_cg_cp_rs2_b9, Zbkb_packh_cg_cp_rs2_b9_str) + 800008e0: 0007b203 ld x4,0(x15) + 800008e4: 00820c63 beq x4,x8,800008fc + 800008e8: 418072ef jal x5,80007d00 + 800008ec: 800008dc .word 0x800008dc + 800008f0: 00000000 .word 0x00000000 + 800008f4: 8000eca8 .word 0x8000eca8 + 800008f8: 00000000 .word 0x00000000 + 800008fc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x7e42f37d038fcdfc + 80000900: 00093583 ld x11,0(x18) + 80000904: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xa298aa8d866bbaf8 + 80000908: 00093503 ld x10,0(x18) + 8000090c: 00890913 addi x18,x18,8 + +0000000080000910 : +Zbkb_packh_cg_cp_rs2_b10: + packh x23, x11, x10 # perform operation + 80000910: 08a5fbb3 packh x23,x11,x10 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zbkb_packh_cg_cp_rs2_b10, Zbkb_packh_cg_cp_rs2_b10_str) + 80000914: 0007b203 ld x4,0(x15) + 80000918: 01720c63 beq x4,x23,80000930 + 8000091c: 3e4072ef jal x5,80007d00 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 8000ecdb .word 0x8000ecdb + 8000092c: 00000000 .word 0x00000000 + 80000930: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x7561a09d4d10abc6 + 80000934: 00093603 ld x12,0(x18) + 80000938: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x764b1f0dd3e63973 + 8000093c: 00093583 ld x11,0(x18) + 80000940: 00890913 addi x18,x18,8 + +0000000080000944 : +Zbkb_packh_cg_cp_rs2_b11: + packh x25, x12, x11 # perform operation + 80000944: 08b67cb3 packh x25,x12,x11 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zbkb_packh_cg_cp_rs2_b11, Zbkb_packh_cg_cp_rs2_b11_str) + 80000948: 0007b203 ld x4,0(x15) + 8000094c: 01920c63 beq x4,x25,80000964 + 80000950: 3b0072ef jal x5,80007d00 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 8000ed0f .word 0x8000ed0f + 80000960: 00000000 .word 0x00000000 + 80000964: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xfec34708a517be86 + 80000968: 00093103 ld x2,0(x18) + 8000096c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0xcc0a57dc51adb4a2 + 80000970: 00093603 ld x12,0(x18) + 80000974: 00890913 addi x18,x18,8 + +0000000080000978 : +Zbkb_packh_cg_cp_rs2_b12: + packh x21, x2, x12 # perform operation + 80000978: 08c17ab3 packh x21,x2,x12 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_packh_cg_cp_rs2_b12, Zbkb_packh_cg_cp_rs2_b12_str) + 8000097c: 0007b203 ld x4,0(x15) + 80000980: 01520c63 beq x4,x21,80000998 + 80000984: 37c072ef jal x5,80007d00 + 80000988: 80000978 .word 0x80000978 + 8000098c: 00000000 .word 0x00000000 + 80000990: 8000ed43 .word 0x8000ed43 + 80000994: 00000000 .word 0x00000000 + 80000998: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xb69c25e67d52e115 + 8000099c: 00093183 ld x3,0(x18) + 800009a0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x00e39b4f15c2ae30 + 800009a4: 00093683 ld x13,0(x18) + 800009a8: 00890913 addi x18,x18,8 + +00000000800009ac : +Zbkb_packh_cg_cp_rs2_b13: + packh x22, x3, x13 # perform operation + 800009ac: 08d1fb33 packh x22,x3,x13 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zbkb_packh_cg_cp_rs2_b13, Zbkb_packh_cg_cp_rs2_b13_str) + 800009b0: 0007b203 ld x4,0(x15) + 800009b4: 01620c63 beq x4,x22,800009cc + 800009b8: 348072ef jal x5,80007d00 + 800009bc: 800009ac .word 0x800009ac + 800009c0: 00000000 .word 0x00000000 + 800009c4: 8000ed77 .word 0x8000ed77 + 800009c8: 00000000 .word 0x00000000 + 800009cc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xb5be36458167e693 + 800009d0: 00093883 ld x17,0(x18) + 800009d4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x752c98a743ee311c + 800009d8: 00093703 ld x14,0(x18) + 800009dc: 00890913 addi x18,x18,8 + +00000000800009e0 : +Zbkb_packh_cg_cp_rs2_b14: + packh x21, x17, x14 # perform operation + 800009e0: 08e8fab3 packh x21,x17,x14 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zbkb_packh_cg_cp_rs2_b14, Zbkb_packh_cg_cp_rs2_b14_str) + 800009e4: 0007b203 ld x4,0(x15) + 800009e8: 01520c63 beq x4,x21,80000a00 + 800009ec: 314072ef jal x5,80007d00 + 800009f0: 800009e0 .word 0x800009e0 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 8000edab .word 0x8000edab + 800009fc: 00000000 .word 0x00000000 + 80000a00: 00878793 addi x15,x15,8 + + mv x19, x15 # switch signature pointer register to avoid conflict with test + 80000a04: 00078993 addi x19,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xa64b956723fc6d22 + 80000a08: 00093e03 ld x28,0(x18) + 80000a0c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xd254c3b05acd2459 + 80000a10: 00093783 ld x15,0(x18) + 80000a14: 00890913 addi x18,x18,8 + +0000000080000a18 : +Zbkb_packh_cg_cp_rs2_b15: + packh x25, x28, x15 # perform operation + 80000a18: 08fe7cb3 packh x25,x28,x15 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zbkb_packh_cg_cp_rs2_b15, Zbkb_packh_cg_cp_rs2_b15_str) + 80000a1c: 0009b203 ld x4,0(x19) + 80000a20: 01920c63 beq x4,x25,80000a38 + 80000a24: 2dc072ef jal x5,80007d00 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 8000eddf .word 0x8000eddf + 80000a34: 00000000 .word 0x00000000 + 80000a38: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x2222c93169f84a7b + 80000a3c: 00093b03 ld x22,0(x18) + 80000a40: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x29e6529fd306489a + 80000a44: 00093803 ld x16,0(x18) + 80000a48: 00890913 addi x18,x18,8 + +0000000080000a4c : +Zbkb_packh_cg_cp_rs2_b16: + packh x31, x22, x16 # perform operation + 80000a4c: 090b7fb3 packh x31,x22,x16 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_packh_cg_cp_rs2_b16, Zbkb_packh_cg_cp_rs2_b16_str) + 80000a50: 0009b203 ld x4,0(x19) + 80000a54: 01f20c63 beq x4,x31,80000a6c + 80000a58: 2a8072ef jal x5,80007d00 + 80000a5c: 80000a4c .word 0x80000a4c + 80000a60: 00000000 .word 0x00000000 + 80000a64: 8000ee13 .word 0x8000ee13 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xb055ce65344818a8 + 80000a70: 00093603 ld x12,0(x18) + 80000a74: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xc0d0fe0ce46e5f80 + 80000a78: 00093883 ld x17,0(x18) + 80000a7c: 00890913 addi x18,x18,8 + +0000000080000a80 : +Zbkb_packh_cg_cp_rs2_b17: + packh x24, x12, x17 # perform operation + 80000a80: 09167c33 packh x24,x12,x17 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_packh_cg_cp_rs2_b17, Zbkb_packh_cg_cp_rs2_b17_str) + 80000a84: 0009b203 ld x4,0(x19) + 80000a88: 01820c63 beq x4,x24,80000aa0 + 80000a8c: 274072ef jal x5,80007d00 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000ee47 .word 0x8000ee47 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00898993 addi x19,x19,8 + + mv x12, x18 # switch data pointer register to avoid conflict with test + 80000aa4: 00090613 addi x12,x18,0 +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xa568b8710b6819ee + 80000aa8: 00063a83 ld x21,0(x12) + 80000aac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xe89ff326ab312234 + 80000ab0: 00063903 ld x18,0(x12) + 80000ab4: 00860613 addi x12,x12,8 + +0000000080000ab8 : +Zbkb_packh_cg_cp_rs2_b18: + packh x3, x21, x18 # perform operation + 80000ab8: 092af1b3 packh x3,x21,x18 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkb_packh_cg_cp_rs2_b18, Zbkb_packh_cg_cp_rs2_b18_str) + 80000abc: 0009b203 ld x4,0(x19) + 80000ac0: 00320c63 beq x4,x3,80000ad8 + 80000ac4: 23c072ef jal x5,80007d00 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 8000ee7b .word 0x8000ee7b + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 00898993 addi x19,x19,8 + + mv x3, x19 # switch signature pointer register to avoid conflict with test + 80000adc: 00098193 addi x3,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xc7ecb180d5eaf262 + 80000ae0: 00063c83 ld x25,0(x12) + 80000ae4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0xbad7d5511c65494f + 80000ae8: 00063983 ld x19,0(x12) + 80000aec: 00860613 addi x12,x12,8 + +0000000080000af0 : +Zbkb_packh_cg_cp_rs2_b19: + packh x2, x25, x19 # perform operation + 80000af0: 093cf133 packh x2,x25,x19 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_packh_cg_cp_rs2_b19, Zbkb_packh_cg_cp_rs2_b19_str) + 80000af4: 0001b203 ld x4,0(x3) + 80000af8: 00220c63 beq x4,x2,80000b10 + 80000afc: 204072ef jal x5,80007d00 + 80000b00: 80000af0 .word 0x80000af0 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 8000eeaf .word 0x8000eeaf + 80000b0c: 00000000 .word 0x00000000 + 80000b10: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xb5e5f5907ea3ba52 + 80000b14: 00063083 ld x1,0(x12) + 80000b18: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x9f5223f58d5ec8a9 + 80000b1c: 00063a03 ld x20,0(x12) + 80000b20: 00860613 addi x12,x12,8 + +0000000080000b24 : +Zbkb_packh_cg_cp_rs2_b20: + packh x30, x1, x20 # perform operation + 80000b24: 0940ff33 packh x30,x1,x20 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkb_packh_cg_cp_rs2_b20, Zbkb_packh_cg_cp_rs2_b20_str) + 80000b28: 0001b203 ld x4,0(x3) + 80000b2c: 01e20c63 beq x4,x30,80000b44 + 80000b30: 1d0072ef jal x5,80007d00 + 80000b34: 80000b24 .word 0x80000b24 + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 8000eee3 .word 0x8000eee3 + 80000b40: 00000000 .word 0x00000000 + 80000b44: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xde36cc2a68531e2f + 80000b48: 00063483 ld x9,0(x12) + 80000b4c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x2bbb338737f6042d + 80000b50: 00063a83 ld x21,0(x12) + 80000b54: 00860613 addi x12,x12,8 + +0000000080000b58 : +Zbkb_packh_cg_cp_rs2_b21: + packh x18, x9, x21 # perform operation + 80000b58: 0954f933 packh x18,x9,x21 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkb_packh_cg_cp_rs2_b21, Zbkb_packh_cg_cp_rs2_b21_str) + 80000b5c: 0001b203 ld x4,0(x3) + 80000b60: 01220c63 beq x4,x18,80000b78 + 80000b64: 19c072ef jal x5,80007d00 + 80000b68: 80000b58 .word 0x80000b58 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 8000ef17 .word 0x8000ef17 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xec2ccc1bb1e748af + 80000b7c: 00063e03 ld x28,0(x12) + 80000b80: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x6e0a37244badea99 + 80000b84: 00063b03 ld x22,0(x12) + 80000b88: 00860613 addi x12,x12,8 + +0000000080000b8c : +Zbkb_packh_cg_cp_rs2_b22: + packh x19, x28, x22 # perform operation + 80000b8c: 096e79b3 packh x19,x28,x22 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zbkb_packh_cg_cp_rs2_b22, Zbkb_packh_cg_cp_rs2_b22_str) + 80000b90: 0001b203 ld x4,0(x3) + 80000b94: 01320c63 beq x4,x19,80000bac + 80000b98: 168072ef jal x5,80007d00 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 8000ef4b .word 0x8000ef4b + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x1b6b0f89ecfe7335 + 80000bb0: 00063f83 ld x31,0(x12) + 80000bb4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x096e80362faa7aaf + 80000bb8: 00063b83 ld x23,0(x12) + 80000bbc: 00860613 addi x12,x12,8 + +0000000080000bc0 : +Zbkb_packh_cg_cp_rs2_b23: + packh x20, x31, x23 # perform operation + 80000bc0: 097ffa33 packh x20,x31,x23 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkb_packh_cg_cp_rs2_b23, Zbkb_packh_cg_cp_rs2_b23_str) + 80000bc4: 0001b203 ld x4,0(x3) + 80000bc8: 01420c63 beq x4,x20,80000be0 + 80000bcc: 134072ef jal x5,80007d00 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000ef7f .word 0x8000ef7f + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x546b09c96078014d + 80000be4: 00063683 ld x13,0(x12) + 80000be8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x2ad6394639c7e2c9 + 80000bec: 00063c03 ld x24,0(x12) + 80000bf0: 00860613 addi x12,x12,8 + +0000000080000bf4 : +Zbkb_packh_cg_cp_rs2_b24: + packh x2, x13, x24 # perform operation + 80000bf4: 0986f133 packh x2,x13,x24 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_packh_cg_cp_rs2_b24, Zbkb_packh_cg_cp_rs2_b24_str) + 80000bf8: 0001b203 ld x4,0(x3) + 80000bfc: 00220c63 beq x4,x2,80000c14 + 80000c00: 100072ef jal x5,80007d00 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000efb3 .word 0x8000efb3 + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xcbcf7f8ed22d3617 + 80000c18: 00063003 ld x0,0(x12) + 80000c1c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x7ec109ea8b6c1f66 + 80000c20: 00063c83 ld x25,0(x12) + 80000c24: 00860613 addi x12,x12,8 + +0000000080000c28 : +Zbkb_packh_cg_cp_rs2_b25: + packh x9, x0, x25 # perform operation + 80000c28: 099074b3 packh x9,x0,x25 + # Check if x9 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x9, Zbkb_packh_cg_cp_rs2_b25, Zbkb_packh_cg_cp_rs2_b25_str) + 80000c2c: 0001b203 ld x4,0(x3) + 80000c30: 00920c63 beq x4,x9,80000c48 + 80000c34: 0cc072ef jal x5,80007d00 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000efe7 .word 0x8000efe7 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x32687265b1bffb59 + 80000c4c: 00063c03 ld x24,0(x12) + 80000c50: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xe4cef0563361e4d9 + 80000c54: 00063d03 ld x26,0(x12) + 80000c58: 00860613 addi x12,x12,8 + +0000000080000c5c : +Zbkb_packh_cg_cp_rs2_b26: + packh x6, x24, x26 # perform operation + 80000c5c: 09ac7333 packh x6,x24,x26 + # Check if x6 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x6, Zbkb_packh_cg_cp_rs2_b26, Zbkb_packh_cg_cp_rs2_b26_str) + 80000c60: 0001b203 ld x4,0(x3) + 80000c64: 00620c63 beq x4,x6,80000c7c + 80000c68: 098072ef jal x5,80007d00 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000f01b .word 0x8000f01b + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x8a5afddf977bcb53 + 80000c80: 00063f03 ld x30,0(x12) + 80000c84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x42fd5513b5a72dd7 + 80000c88: 00063d83 ld x27,0(x12) + 80000c8c: 00860613 addi x12,x12,8 + +0000000080000c90 : +Zbkb_packh_cg_cp_rs2_b27: + packh x0, x30, x27 # perform operation + 80000c90: 09bf7033 packh x0,x30,x27 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_packh_cg_cp_rs2_b27, Zbkb_packh_cg_cp_rs2_b27_str) + 80000c94: 0001b203 ld x4,0(x3) + 80000c98: 00020c63 beq x4,x0,80000cb0 + 80000c9c: 064072ef jal x5,80007d00 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000f04f .word 0x8000f04f + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xbc105434950b0381 + 80000cb4: 00063d83 ld x27,0(x12) + 80000cb8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xbf65ae035e7bd15d + 80000cbc: 00063e03 ld x28,0(x12) + 80000cc0: 00860613 addi x12,x12,8 + +0000000080000cc4 : +Zbkb_packh_cg_cp_rs2_b28: + packh x20, x27, x28 # perform operation + 80000cc4: 09cdfa33 packh x20,x27,x28 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkb_packh_cg_cp_rs2_b28, Zbkb_packh_cg_cp_rs2_b28_str) + 80000cc8: 0001b203 ld x4,0(x3) + 80000ccc: 01420c63 beq x4,x20,80000ce4 + 80000cd0: 030072ef jal x5,80007d00 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f083 .word 0x8000f083 + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xde142c3e22a43cc1 + 80000ce8: 00063503 ld x10,0(x12) + 80000cec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x764c765790788fc5 + 80000cf0: 00063e83 ld x29,0(x12) + 80000cf4: 00860613 addi x12,x12,8 + +0000000080000cf8 : +Zbkb_packh_cg_cp_rs2_b29: + packh x7, x10, x29 # perform operation + 80000cf8: 09d573b3 packh x7,x10,x29 + # Check if x7 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x7, Zbkb_packh_cg_cp_rs2_b29, Zbkb_packh_cg_cp_rs2_b29_str) + 80000cfc: 0001b203 ld x4,0(x3) + 80000d00: 00720c63 beq x4,x7,80000d18 + 80000d04: 7fd062ef jal x5,80007d00 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000f0b7 .word 0x8000f0b7 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xc3ed0e02f30d883c + 80000d1c: 00063d83 ld x27,0(x12) + 80000d20: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xccfa45b1715c0bb6 + 80000d24: 00063f03 ld x30,0(x12) + 80000d28: 00860613 addi x12,x12,8 + +0000000080000d2c : +Zbkb_packh_cg_cp_rs2_b30: + packh x31, x27, x30 # perform operation + 80000d2c: 09edffb3 packh x31,x27,x30 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkb_packh_cg_cp_rs2_b30, Zbkb_packh_cg_cp_rs2_b30_str) + 80000d30: 0001b203 ld x4,0(x3) + 80000d34: 01f20c63 beq x4,x31,80000d4c + 80000d38: 7c9062ef jal x5,80007d00 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000f0eb .word 0x8000f0eb + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x4e6ffc8db42c9c3c + 80000d50: 00063383 ld x7,0(x12) + 80000d54: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xac1c2fe2b90b2ca8 + 80000d58: 00063f83 ld x31,0(x12) + 80000d5c: 00860613 addi x12,x12,8 + +0000000080000d60 : +Zbkb_packh_cg_cp_rs2_b31: + packh x15, x7, x31 # perform operation + 80000d60: 09f3f7b3 packh x15,x7,x31 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkb_packh_cg_cp_rs2_b31, Zbkb_packh_cg_cp_rs2_b31_str) + 80000d64: 0001b203 ld x4,0(x3) + 80000d68: 00f20c63 beq x4,x15,80000d80 + 80000d6c: 795062ef jal x5,80007d00 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8000f11f .word 0x8000f11f + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xb4679feded88b8cb + 80000d84: 00063b83 ld x23,0(x12) + 80000d88: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x44160938edaa8120 + 80000d8c: 00063803 ld x16,0(x12) + 80000d90: 00860613 addi x12,x12,8 + +0000000080000d94 : +Zbkb_packh_cg_cp_rd_b0: + packh x0, x23, x16 # perform operation + 80000d94: 090bf033 packh x0,x23,x16 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_packh_cg_cp_rd_b0, Zbkb_packh_cg_cp_rd_b0_str) + 80000d98: 0001b203 ld x4,0(x3) + 80000d9c: 00020c63 beq x4,x0,80000db4 + 80000da0: 761062ef jal x5,80007d00 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 8000f153 .word 0x8000f153 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xdc7fe559e2d12cd9 + 80000db8: 00063c03 ld x24,0(x12) + 80000dbc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xc4a85174a059bdca + 80000dc0: 00063b03 ld x22,0(x12) + 80000dc4: 00860613 addi x12,x12,8 + +0000000080000dc8 : +Zbkb_packh_cg_cp_rd_b1: + packh x1, x24, x22 # perform operation + 80000dc8: 096c70b3 packh x1,x24,x22 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_packh_cg_cp_rd_b1, Zbkb_packh_cg_cp_rd_b1_str) + 80000dcc: 0001b203 ld x4,0(x3) + 80000dd0: 00120c63 beq x4,x1,80000de8 + 80000dd4: 72d062ef jal x5,80007d00 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 8000f185 .word 0x8000f185 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x6bfcb87ad3c79675 + 80000dec: 00063483 ld x9,0(x12) + 80000df0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x047c23328ce5b815 + 80000df4: 00063d03 ld x26,0(x12) + 80000df8: 00860613 addi x12,x12,8 + +0000000080000dfc : +Zbkb_packh_cg_cp_rd_b2: + packh x2, x9, x26 # perform operation + 80000dfc: 09a4f133 packh x2,x9,x26 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_packh_cg_cp_rd_b2, Zbkb_packh_cg_cp_rd_b2_str) + 80000e00: 0001b203 ld x4,0(x3) + 80000e04: 00220c63 beq x4,x2,80000e1c + 80000e08: 6f9062ef jal x5,80007d00 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 8000f1b7 .word 0x8000f1b7 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 00818193 addi x3,x3,8 + + mv x27, x3 # switch signature pointer register to avoid conflict with test + 80000e20: 00018d93 addi x27,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x69ee2ad26d493899 + 80000e24: 00063083 ld x1,0(x12) + 80000e28: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x2c5bdf511b7bab53 + 80000e2c: 00063403 ld x8,0(x12) + 80000e30: 00860613 addi x12,x12,8 + +0000000080000e34 : +Zbkb_packh_cg_cp_rd_b3: + packh x3, x1, x8 # perform operation + 80000e34: 0880f1b3 packh x3,x1,x8 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkb_packh_cg_cp_rd_b3, Zbkb_packh_cg_cp_rd_b3_str) + 80000e38: 000db203 ld x4,0(x27) + 80000e3c: 00320c63 beq x4,x3,80000e54 + 80000e40: 6c1062ef jal x5,80007d00 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 8000f1e9 .word 0x8000f1e9 + 80000e50: 00000000 .word 0x00000000 + 80000e54: 008d8d93 addi x27,x27,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e58: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e5c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x83668d60f1d25072 + 80000e60: 00063803 ld x16,0(x12) + 80000e64: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xbab19d7bb7e7c9a6 + 80000e68: 00063c83 ld x25,0(x12) + 80000e6c: 00860613 addi x12,x12,8 + +0000000080000e70 : +Zbkb_packh_cg_cp_rd_b4: + packh x4, x16, x25 # perform operation + 80000e70: 09987233 packh x4,x16,x25 + # Check if x4 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x4, Zbkb_packh_cg_cp_rd_b4, Zbkb_packh_cg_cp_rd_b4_str) + 80000e74: 000db683 ld x13,0(x27) + 80000e78: 00468c63 beq x13,x4,80000e90 + 80000e7c: 6c50676f jal x14,80007d40 + 80000e80: 80000e70 .word 0x80000e70 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 8000f21b .word 0x8000f21b + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x9728a29fd1a0466b + 80000e94: 00063303 ld x6,0(x12) + 80000e98: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xd8f415934d7026ea + 80000e9c: 00063883 ld x17,0(x12) + 80000ea0: 00860613 addi x12,x12,8 + +0000000080000ea4 : +Zbkb_packh_cg_cp_rd_b5: + packh x5, x6, x17 # perform operation + 80000ea4: 091372b3 packh x5,x6,x17 + # Check if x5 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x5, Zbkb_packh_cg_cp_rd_b5, Zbkb_packh_cg_cp_rd_b5_str) + 80000ea8: 000db683 ld x13,0(x27) + 80000eac: 00568c63 beq x13,x5,80000ec4 + 80000eb0: 6910676f jal x14,80007d40 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 8000f24d .word 0x8000f24d + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xc770a6844bd1ae6c + 80000ec8: 00063c83 ld x25,0(x12) + 80000ecc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x77747ff79e29f60a + 80000ed0: 00063203 ld x4,0(x12) + 80000ed4: 00860613 addi x12,x12,8 + +0000000080000ed8 : +Zbkb_packh_cg_cp_rd_b6: + packh x6, x25, x4 # perform operation + 80000ed8: 084cf333 packh x6,x25,x4 + # Check if x6 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x6, Zbkb_packh_cg_cp_rd_b6, Zbkb_packh_cg_cp_rd_b6_str) + 80000edc: 000db683 ld x13,0(x27) + 80000ee0: 00668c63 beq x13,x6,80000ef8 + 80000ee4: 65d0676f jal x14,80007d40 + 80000ee8: 80000ed8 .word 0x80000ed8 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 8000f27f .word 0x8000f27f + 80000ef4: 00000000 .word 0x00000000 + 80000ef8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x80d5b7871122512e + 80000efc: 00063c03 ld x24,0(x12) + 80000f00: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0xdb64485d73a52c64 + 80000f04: 00063983 ld x19,0(x12) + 80000f08: 00860613 addi x12,x12,8 + +0000000080000f0c : +Zbkb_packh_cg_cp_rd_b7: + packh x7, x24, x19 # perform operation + 80000f0c: 093c73b3 packh x7,x24,x19 + # Check if x7 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x7, Zbkb_packh_cg_cp_rd_b7, Zbkb_packh_cg_cp_rd_b7_str) + 80000f10: 000db683 ld x13,0(x27) + 80000f14: 00768c63 beq x13,x7,80000f2c + 80000f18: 6290676f jal x14,80007d40 + 80000f1c: 80000f0c .word 0x80000f0c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 8000f2b1 .word 0x8000f2b1 + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xfa499c0a9e758b42 + 80000f30: 00063d03 ld x26,0(x12) + 80000f34: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xc51be2164b715f0d + 80000f38: 00063903 ld x18,0(x12) + 80000f3c: 00860613 addi x12,x12,8 + +0000000080000f40 : +Zbkb_packh_cg_cp_rd_b8: + packh x8, x26, x18 # perform operation + 80000f40: 092d7433 packh x8,x26,x18 + # Check if x8 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x8, Zbkb_packh_cg_cp_rd_b8, Zbkb_packh_cg_cp_rd_b8_str) + 80000f44: 000db683 ld x13,0(x27) + 80000f48: 00868c63 beq x13,x8,80000f60 + 80000f4c: 5f50676f jal x14,80007d40 + 80000f50: 80000f40 .word 0x80000f40 + 80000f54: 00000000 .word 0x00000000 + 80000f58: 8000f2e3 .word 0x8000f2e3 + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xda84cc7b276876f4 + 80000f64: 00063183 ld x3,0(x12) + 80000f68: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x9bcd1f6bff163117 + 80000f6c: 00063103 ld x2,0(x12) + 80000f70: 00860613 addi x12,x12,8 + +0000000080000f74 : +Zbkb_packh_cg_cp_rd_b9: + packh x9, x3, x2 # perform operation + 80000f74: 0821f4b3 packh x9,x3,x2 + # Check if x9 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x9, Zbkb_packh_cg_cp_rd_b9, Zbkb_packh_cg_cp_rd_b9_str) + 80000f78: 000db683 ld x13,0(x27) + 80000f7c: 00968c63 beq x13,x9,80000f94 + 80000f80: 5c10676f jal x14,80007d40 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 8000f315 .word 0x8000f315 + 80000f90: 00000000 .word 0x00000000 + 80000f94: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x4f866a561fbd44f0 + 80000f98: 00063983 ld x19,0(x12) + 80000f9c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x0f5810a9896cc813 + 80000fa0: 00063c83 ld x25,0(x12) + 80000fa4: 00860613 addi x12,x12,8 + +0000000080000fa8 : +Zbkb_packh_cg_cp_rd_b10: + packh x10, x19, x25 # perform operation + 80000fa8: 0999f533 packh x10,x19,x25 + # Check if x10 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x10, Zbkb_packh_cg_cp_rd_b10, Zbkb_packh_cg_cp_rd_b10_str) + 80000fac: 000db683 ld x13,0(x27) + 80000fb0: 00a68c63 beq x13,x10,80000fc8 + 80000fb4: 58d0676f jal x14,80007d40 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 8000f347 .word 0x8000f347 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x3a8531b869559d86 + 80000fcc: 00063283 ld x5,0(x12) + 80000fd0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xd3fd25aeed4e2472 + 80000fd4: 00063f03 ld x30,0(x12) + 80000fd8: 00860613 addi x12,x12,8 + +0000000080000fdc : +Zbkb_packh_cg_cp_rd_b11: + packh x11, x5, x30 # perform operation + 80000fdc: 09e2f5b3 packh x11,x5,x30 + # Check if x11 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x11, Zbkb_packh_cg_cp_rd_b11, Zbkb_packh_cg_cp_rd_b11_str) + 80000fe0: 000db683 ld x13,0(x27) + 80000fe4: 00b68c63 beq x13,x11,80000ffc + 80000fe8: 5590676f jal x14,80007d40 + 80000fec: 80000fdc .word 0x80000fdc + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 8000f37a .word 0x8000f37a + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 008d8d93 addi x27,x27,8 + + mv x31, x12 # switch data pointer register to avoid conflict with test + 80001000: 00060f93 addi x31,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x14a1acf7e587360c + 80001004: 000fb983 ld x19,0(x31) + 80001008: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0xd8b5b24aeb259f27 + 8000100c: 000fb303 ld x6,0(x31) + 80001010: 008f8f93 addi x31,x31,8 + +0000000080001014 : +Zbkb_packh_cg_cp_rd_b12: + packh x12, x19, x6 # perform operation + 80001014: 0869f633 packh x12,x19,x6 + # Check if x12 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x12, Zbkb_packh_cg_cp_rd_b12, Zbkb_packh_cg_cp_rd_b12_str) + 80001018: 000db683 ld x13,0(x27) + 8000101c: 00c68c63 beq x13,x12,80001034 + 80001020: 5210676f jal x14,80007d40 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f3ad .word 0x8000f3ad + 80001030: 00000000 .word 0x00000000 + 80001034: 008d8d93 addi x27,x27,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001038: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000103c: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xa137263106fa5248 + 80001040: 000fbf03 ld x30,0(x31) + 80001044: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0xaa7ddb49513ef034 + 80001048: 000fba03 ld x20,0(x31) + 8000104c: 008f8f93 addi x31,x31,8 + +0000000080001050 : +Zbkb_packh_cg_cp_rd_b13: + packh x13, x30, x20 # perform operation + 80001050: 094f76b3 packh x13,x30,x20 + # Check if x13 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x13, Zbkb_packh_cg_cp_rd_b13, Zbkb_packh_cg_cp_rd_b13_str) + 80001054: 000db383 ld x7,0(x27) + 80001058: 00d38c63 beq x7,x13,80001070 + 8000105c: 4bd0646f jal x8,80007d18 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f3e0 .word 0x8000f3e0 + 8000106c: 00000000 .word 0x00000000 + 80001070: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0x959ff0a09d1cf7a9 + 80001074: 000fb183 ld x3,0(x31) + 80001078: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x80246fcb179d97fd + 8000107c: 000fbc83 ld x25,0(x31) + 80001080: 008f8f93 addi x31,x31,8 + +0000000080001084 : +Zbkb_packh_cg_cp_rd_b14: + packh x14, x3, x25 # perform operation + 80001084: 0991f733 packh x14,x3,x25 + # Check if x14 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x14, Zbkb_packh_cg_cp_rd_b14, Zbkb_packh_cg_cp_rd_b14_str) + 80001088: 000db383 ld x7,0(x27) + 8000108c: 00e38c63 beq x7,x14,800010a4 + 80001090: 4890646f jal x8,80007d18 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f413 .word 0x8000f413 + 800010a0: 00000000 .word 0x00000000 + 800010a4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xb74bcf734e1f809d + 800010a8: 000fbf03 ld x30,0(x31) + 800010ac: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xfca632ee351e1a22 + 800010b0: 000fbd03 ld x26,0(x31) + 800010b4: 008f8f93 addi x31,x31,8 + +00000000800010b8 : +Zbkb_packh_cg_cp_rd_b15: + packh x15, x30, x26 # perform operation + 800010b8: 09af77b3 packh x15,x30,x26 + # Check if x15 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x15, Zbkb_packh_cg_cp_rd_b15, Zbkb_packh_cg_cp_rd_b15_str) + 800010bc: 000db383 ld x7,0(x27) + 800010c0: 00f38c63 beq x7,x15,800010d8 + 800010c4: 4550646f jal x8,80007d18 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 8000f446 .word 0x8000f446 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x61c5ac4245f7da2b + 800010dc: 000fb703 ld x14,0(x31) + 800010e0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x77866087bba7913f + 800010e4: 000fbc03 ld x24,0(x31) + 800010e8: 008f8f93 addi x31,x31,8 + +00000000800010ec : +Zbkb_packh_cg_cp_rd_b16: + packh x16, x14, x24 # perform operation + 800010ec: 09877833 packh x16,x14,x24 + # Check if x16 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x16, Zbkb_packh_cg_cp_rd_b16, Zbkb_packh_cg_cp_rd_b16_str) + 800010f0: 000db383 ld x7,0(x27) + 800010f4: 01038c63 beq x7,x16,8000110c + 800010f8: 4210646f jal x8,80007d18 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f479 .word 0x8000f479 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xefa10837827e22d9 + 80001110: 000fb483 ld x9,0(x31) + 80001114: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x3c41814b38983279 + 80001118: 000fba03 ld x20,0(x31) + 8000111c: 008f8f93 addi x31,x31,8 + +0000000080001120 : +Zbkb_packh_cg_cp_rd_b17: + packh x17, x9, x20 # perform operation + 80001120: 0944f8b3 packh x17,x9,x20 + # Check if x17 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x17, Zbkb_packh_cg_cp_rd_b17, Zbkb_packh_cg_cp_rd_b17_str) + 80001124: 000db383 ld x7,0(x27) + 80001128: 01138c63 beq x7,x17,80001140 + 8000112c: 3ed0646f jal x8,80007d18 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f4ac .word 0x8000f4ac + 8000113c: 00000000 .word 0x00000000 + 80001140: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xa2e3c4097c45125c + 80001144: 000fb483 ld x9,0(x31) + 80001148: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0x5ea95eba5397915a + 8000114c: 000fb203 ld x4,0(x31) + 80001150: 008f8f93 addi x31,x31,8 + +0000000080001154 : +Zbkb_packh_cg_cp_rd_b18: + packh x18, x9, x4 # perform operation + 80001154: 0844f933 packh x18,x9,x4 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zbkb_packh_cg_cp_rd_b18, Zbkb_packh_cg_cp_rd_b18_str) + 80001158: 000db383 ld x7,0(x27) + 8000115c: 01238c63 beq x7,x18,80001174 + 80001160: 3b90646f jal x8,80007d18 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 8000f4df .word 0x8000f4df + 80001170: 00000000 .word 0x00000000 + 80001174: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xc0b76704848eb062 + 80001178: 000fb503 ld x10,0(x31) + 8000117c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xd097dc6b90d03e6d + 80001180: 000fb103 ld x2,0(x31) + 80001184: 008f8f93 addi x31,x31,8 + +0000000080001188 : +Zbkb_packh_cg_cp_rd_b19: + packh x19, x10, x2 # perform operation + 80001188: 082579b3 packh x19,x10,x2 + # Check if x19 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x19, Zbkb_packh_cg_cp_rd_b19, Zbkb_packh_cg_cp_rd_b19_str) + 8000118c: 000db383 ld x7,0(x27) + 80001190: 01338c63 beq x7,x19,800011a8 + 80001194: 3850646f jal x8,80007d18 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8000f512 .word 0x8000f512 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x0992f6296bae60cd + 800011ac: 000fb903 ld x18,0(x31) + 800011b0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x35f394014dc0141c + 800011b4: 000fbd03 ld x26,0(x31) + 800011b8: 008f8f93 addi x31,x31,8 + +00000000800011bc : +Zbkb_packh_cg_cp_rd_b20: + packh x20, x18, x26 # perform operation + 800011bc: 09a97a33 packh x20,x18,x26 + # Check if x20 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x20, Zbkb_packh_cg_cp_rd_b20, Zbkb_packh_cg_cp_rd_b20_str) + 800011c0: 000db383 ld x7,0(x27) + 800011c4: 01438c63 beq x7,x20,800011dc + 800011c8: 3510646f jal x8,80007d18 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 8000f545 .word 0x8000f545 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xd7a565262c5738c8 + 800011e0: 000fbc03 ld x24,0(x31) + 800011e4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xea234af464608e35 + 800011e8: 000fbc83 ld x25,0(x31) + 800011ec: 008f8f93 addi x31,x31,8 + +00000000800011f0 : +Zbkb_packh_cg_cp_rd_b21: + packh x21, x24, x25 # perform operation + 800011f0: 099c7ab3 packh x21,x24,x25 + # Check if x21 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x21, Zbkb_packh_cg_cp_rd_b21, Zbkb_packh_cg_cp_rd_b21_str) + 800011f4: 000db383 ld x7,0(x27) + 800011f8: 01538c63 beq x7,x21,80001210 + 800011fc: 31d0646f jal x8,80007d18 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8000f578 .word 0x8000f578 + 8000120c: 00000000 .word 0x00000000 + 80001210: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xad9070bf69b5311b + 80001214: 000fbe83 ld x29,0(x31) + 80001218: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0xb87851793e4f36c3 + 8000121c: 000fbc03 ld x24,0(x31) + 80001220: 008f8f93 addi x31,x31,8 + +0000000080001224 : +Zbkb_packh_cg_cp_rd_b22: + packh x22, x29, x24 # perform operation + 80001224: 098efb33 packh x22,x29,x24 + # Check if x22 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x22, Zbkb_packh_cg_cp_rd_b22, Zbkb_packh_cg_cp_rd_b22_str) + 80001228: 000db383 ld x7,0(x27) + 8000122c: 01638c63 beq x7,x22,80001244 + 80001230: 2e90646f jal x8,80007d18 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 8000f5ab .word 0x8000f5ab + 80001240: 00000000 .word 0x00000000 + 80001244: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x4a291f55ea4892b1 + 80001248: 000fb283 ld x5,0(x31) + 8000124c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xa7f626c3745dc1c7 + 80001250: 000fb103 ld x2,0(x31) + 80001254: 008f8f93 addi x31,x31,8 + +0000000080001258 : +Zbkb_packh_cg_cp_rd_b23: + packh x23, x5, x2 # perform operation + 80001258: 0822fbb3 packh x23,x5,x2 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkb_packh_cg_cp_rd_b23, Zbkb_packh_cg_cp_rd_b23_str) + 8000125c: 000db383 ld x7,0(x27) + 80001260: 01738c63 beq x7,x23,80001278 + 80001264: 2b50646f jal x8,80007d18 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 8000f5de .word 0x8000f5de + 80001274: 00000000 .word 0x00000000 + 80001278: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x103ad25c62c88688 + 8000127c: 000fb883 ld x17,0(x31) + 80001280: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x4e11dfadd9208b45 + 80001284: 000fb283 ld x5,0(x31) + 80001288: 008f8f93 addi x31,x31,8 + +000000008000128c : +Zbkb_packh_cg_cp_rd_b24: + packh x24, x17, x5 # perform operation + 8000128c: 0858fc33 packh x24,x17,x5 + # Check if x24 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x24, Zbkb_packh_cg_cp_rd_b24, Zbkb_packh_cg_cp_rd_b24_str) + 80001290: 000db383 ld x7,0(x27) + 80001294: 01838c63 beq x7,x24,800012ac + 80001298: 2810646f jal x8,80007d18 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000f611 .word 0x8000f611 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs1: x0 = 0x4c8ff1f7c8ea0752 + 800012b0: 000fb003 ld x0,0(x31) + 800012b4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x388e748c3a5f38b2 + 800012b8: 000fba03 ld x20,0(x31) + 800012bc: 008f8f93 addi x31,x31,8 + +00000000800012c0 : +Zbkb_packh_cg_cp_rd_b25: + packh x25, x0, x20 # perform operation + 800012c0: 09407cb3 packh x25,x0,x20 + # Check if x25 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x25, Zbkb_packh_cg_cp_rd_b25, Zbkb_packh_cg_cp_rd_b25_str) + 800012c4: 000db383 ld x7,0(x27) + 800012c8: 01938c63 beq x7,x25,800012e0 + 800012cc: 24d0646f jal x8,80007d18 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 8000f644 .word 0x8000f644 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x7c717ec5234eaf88 + 800012e4: 000fb983 ld x19,0(x31) + 800012e8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x6d721916a94b9c38 + 800012ec: 000fbc03 ld x24,0(x31) + 800012f0: 008f8f93 addi x31,x31,8 + +00000000800012f4 : +Zbkb_packh_cg_cp_rd_b26: + packh x26, x19, x24 # perform operation + 800012f4: 0989fd33 packh x26,x19,x24 + # Check if x26 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x26, Zbkb_packh_cg_cp_rd_b26, Zbkb_packh_cg_cp_rd_b26_str) + 800012f8: 000db383 ld x7,0(x27) + 800012fc: 01a38c63 beq x7,x26,80001314 + 80001300: 2190646f jal x8,80007d18 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 8000f677 .word 0x8000f677 + 80001310: 00000000 .word 0x00000000 + 80001314: 008d8d93 addi x27,x27,8 + + mv x15, x27 # switch signature pointer register to avoid conflict with test + 80001318: 000d8793 addi x15,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x6d40c337c02ee503 + 8000131c: 000fb983 ld x19,0(x31) + 80001320: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x654585bbff333bd9 + 80001324: 000fb303 ld x6,0(x31) + 80001328: 008f8f93 addi x31,x31,8 + +000000008000132c : +Zbkb_packh_cg_cp_rd_b27: + packh x27, x19, x6 # perform operation + 8000132c: 0869fdb3 packh x27,x19,x6 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cp_rd_b27, Zbkb_packh_cg_cp_rd_b27_str) + 80001330: 0007b383 ld x7,0(x15) + 80001334: 01b38c63 beq x7,x27,8000134c + 80001338: 1e10646f jal x8,80007d18 + 8000133c: 8000132c .word 0x8000132c + 80001340: 00000000 .word 0x00000000 + 80001344: 8000f6aa .word 0x8000f6aa + 80001348: 00000000 .word 0x00000000 + 8000134c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x7904ffe557f33e68 + 80001350: 000fb983 ld x19,0(x31) + 80001354: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0x23ee81ff85a6fcc7 + 80001358: 000fb283 ld x5,0(x31) + 8000135c: 008f8f93 addi x31,x31,8 + +0000000080001360 : +Zbkb_packh_cg_cp_rd_b28: + packh x28, x19, x5 # perform operation + 80001360: 0859fe33 packh x28,x19,x5 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cp_rd_b28, Zbkb_packh_cg_cp_rd_b28_str) + 80001364: 0007b383 ld x7,0(x15) + 80001368: 01c38c63 beq x7,x28,80001380 + 8000136c: 1ad0646f jal x8,80007d18 + 80001370: 80001360 .word 0x80001360 + 80001374: 00000000 .word 0x00000000 + 80001378: 8000f6dd .word 0x8000f6dd + 8000137c: 00000000 .word 0x00000000 + 80001380: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x9edae8b5feb42c94 + 80001384: 000fb703 ld x14,0(x31) + 80001388: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0x28c27d744f7ac128 + 8000138c: 000fb203 ld x4,0(x31) + 80001390: 008f8f93 addi x31,x31,8 + +0000000080001394 : +Zbkb_packh_cg_cp_rd_b29: + packh x29, x14, x4 # perform operation + 80001394: 08477eb3 packh x29,x14,x4 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cp_rd_b29, Zbkb_packh_cg_cp_rd_b29_str) + 80001398: 0007b383 ld x7,0(x15) + 8000139c: 01d38c63 beq x7,x29,800013b4 + 800013a0: 1790646f jal x8,80007d18 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 8000f710 .word 0x8000f710 + 800013b0: 00000000 .word 0x00000000 + 800013b4: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x5360fa46f11c03c5 + 800013b8: 000fbd83 ld x27,0(x31) + 800013bc: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0xa3f7cb25efe4557e + 800013c0: 000fb583 ld x11,0(x31) + 800013c4: 008f8f93 addi x31,x31,8 + +00000000800013c8 : +Zbkb_packh_cg_cp_rd_b30: + packh x30, x27, x11 # perform operation + 800013c8: 08bdff33 packh x30,x27,x11 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cp_rd_b30, Zbkb_packh_cg_cp_rd_b30_str) + 800013cc: 0007b383 ld x7,0(x15) + 800013d0: 01e38c63 beq x7,x30,800013e8 + 800013d4: 1450646f jal x8,80007d18 + 800013d8: 800013c8 .word 0x800013c8 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 8000f743 .word 0x8000f743 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 00878793 addi x15,x15,8 + + mv x17, x31 # switch data pointer register to avoid conflict with test + 800013ec: 000f8893 addi x17,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x4193365826efd48d + 800013f0: 0008b903 ld x18,0(x17) + 800013f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x71e6f2d2db46855a + 800013f8: 0008bc83 ld x25,0(x17) + 800013fc: 00888893 addi x17,x17,8 + +0000000080001400 : +Zbkb_packh_cg_cp_rd_b31: + packh x31, x18, x25 # perform operation + 80001400: 09997fb3 packh x31,x18,x25 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cp_rd_b31, Zbkb_packh_cg_cp_rd_b31_str) + 80001404: 0007b383 ld x7,0(x15) + 80001408: 01f38c63 beq x7,x31,80001420 + 8000140c: 10d0646f jal x8,80007d18 + 80001410: 80001400 .word 0x80001400 + 80001414: 00000000 .word 0x00000000 + 80001418: 8000f776 .word 0x8000f776 + 8000141c: 00000000 .word 0x00000000 + 80001420: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001424: 0008be03 ld x28,0(x17) + 80001428: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xc1087c4643ced8aa + 8000142c: 0008b203 ld x4,0(x17) + 80001430: 00888893 addi x17,x17,8 + +0000000080001434 : +Zbkb_packh_cg_cp_rs1_edges_0x0: + packh x29, x28, x4 # perform operation + 80001434: 084e7eb3 packh x29,x28,x4 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cp_rs1_edges_0x0, Zbkb_packh_cg_cp_rs1_edges_0x0_str) + 80001438: 0007b383 ld x7,0(x15) + 8000143c: 01d38c63 beq x7,x29,80001454 + 80001440: 0d90646f jal x8,80007d18 + 80001444: 80001434 .word 0x80001434 + 80001448: 00000000 .word 0x00000000 + 8000144c: 8000f7a9 .word 0x8000f7a9 + 80001450: 00000000 .word 0x00000000 + 80001454: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000000000001 + 80001458: 0008b483 ld x9,0(x17) + 8000145c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x9d16accc65c4f617 + 80001460: 0008b303 ld x6,0(x17) + 80001464: 00888893 addi x17,x17,8 + +0000000080001468 : +Zbkb_packh_cg_cp_rs1_edges_0x1: + packh x29, x9, x6 # perform operation + 80001468: 0864feb3 packh x29,x9,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cp_rs1_edges_0x1, Zbkb_packh_cg_cp_rs1_edges_0x1_str) + 8000146c: 0007b383 ld x7,0(x15) + 80001470: 01d38c63 beq x7,x29,80001488 + 80001474: 0a50646f jal x8,80007d18 + 80001478: 80001468 .word 0x80001468 + 8000147c: 00000000 .word 0x00000000 + 80001480: 8000f7e3 .word 0x8000f7e3 + 80001484: 00000000 .word 0x00000000 + 80001488: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000000000002 + 8000148c: 0008bd83 ld x27,0(x17) + 80001490: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x577d6d8fd744ddea + 80001494: 0008ba83 ld x21,0(x17) + 80001498: 00888893 addi x17,x17,8 + +000000008000149c : +Zbkb_packh_cg_cp_rs1_edges_0x2: + packh x28, x27, x21 # perform operation + 8000149c: 095dfe33 packh x28,x27,x21 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cp_rs1_edges_0x2, Zbkb_packh_cg_cp_rs1_edges_0x2_str) + 800014a0: 0007b383 ld x7,0(x15) + 800014a4: 01c38c63 beq x7,x28,800014bc + 800014a8: 0710646f jal x8,80007d18 + 800014ac: 8000149c .word 0x8000149c + 800014b0: 00000000 .word 0x00000000 + 800014b4: 8000f81d .word 0x8000f81d + 800014b8: 00000000 .word 0x00000000 + 800014bc: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000000 + 800014c0: 0008bc83 ld x25,0(x17) + 800014c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xad40c292310d23dd + 800014c8: 0008b983 ld x19,0(x17) + 800014cc: 00888893 addi x17,x17,8 + +00000000800014d0 : +Zbkb_packh_cg_cp_rs1_edges_0x8000000000000000: + packh x21, x25, x19 # perform operation + 800014d0: 093cfab3 packh x21,x25,x19 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cp_rs1_edges_0x8000000000000000, Zbkb_packh_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d4: 0007b383 ld x7,0(x15) + 800014d8: 01538c63 beq x7,x21,800014f0 + 800014dc: 03d0646f jal x8,80007d18 + 800014e0: 800014d0 .word 0x800014d0 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 8000f857 .word 0x8000f857 + 800014ec: 00000000 .word 0x00000000 + 800014f0: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8000000000000001 + 800014f4: 0008be03 ld x28,0(x17) + 800014f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x527e9657ee7ec877 + 800014fc: 0008b983 ld x19,0(x17) + 80001500: 00888893 addi x17,x17,8 + +0000000080001504 : +Zbkb_packh_cg_cp_rs1_edges_0x8000000000000001: + packh x10, x28, x19 # perform operation + 80001504: 093e7533 packh x10,x28,x19 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cp_rs1_edges_0x8000000000000001, Zbkb_packh_cg_cp_rs1_edges_0x8000000000000001_str) + 80001508: 0007b383 ld x7,0(x15) + 8000150c: 00a38c63 beq x7,x10,80001524 + 80001510: 0090646f jal x8,80007d18 + 80001514: 80001504 .word 0x80001504 + 80001518: 00000000 .word 0x00000000 + 8000151c: 8000f8a1 .word 0x8000f8a1 + 80001520: 00000000 .word 0x00000000 + 80001524: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x7fffffffffffffff + 80001528: 0008b203 ld x4,0(x17) + 8000152c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0xba262627c57bb513 + 80001530: 0008b903 ld x18,0(x17) + 80001534: 00888893 addi x17,x17,8 + +0000000080001538 : +Zbkb_packh_cg_cp_rs1_edges_0x7fffffffffffffff: + packh x9, x4, x18 # perform operation + 80001538: 092274b3 packh x9,x4,x18 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_packh_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 8000153c: 0007b383 ld x7,0(x15) + 80001540: 00938c63 beq x7,x9,80001558 + 80001544: 7d40646f jal x8,80007d18 + 80001548: 80001538 .word 0x80001538 + 8000154c: 00000000 .word 0x00000000 + 80001550: 8000f8eb .word 0x8000f8eb + 80001554: 00000000 .word 0x00000000 + 80001558: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x7ffffffffffffffe + 8000155c: 0008b303 ld x6,0(x17) + 80001560: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xa453de791df65b5d + 80001564: 0008b283 ld x5,0(x17) + 80001568: 00888893 addi x17,x17,8 + +000000008000156c : +Zbkb_packh_cg_cp_rs1_edges_0x7ffffffffffffffe: + packh x12, x6, x5 # perform operation + 8000156c: 08537633 packh x12,x6,x5 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_packh_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001570: 0007b383 ld x7,0(x15) + 80001574: 00c38c63 beq x7,x12,8000158c + 80001578: 7a00646f jal x8,80007d18 + 8000157c: 8000156c .word 0x8000156c + 80001580: 00000000 .word 0x00000000 + 80001584: 8000f935 .word 0x8000f935 + 80001588: 00000000 .word 0x00000000 + 8000158c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xffffffffffffffff + 80001590: 0008bb83 ld x23,0(x17) + 80001594: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x894924c78200ff84 + 80001598: 0008b183 ld x3,0(x17) + 8000159c: 00888893 addi x17,x17,8 + +00000000800015a0 : +Zbkb_packh_cg_cp_rs1_edges_0xffffffffffffffff: + packh x10, x23, x3 # perform operation + 800015a0: 083bf533 packh x10,x23,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_packh_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a4: 0007b383 ld x7,0(x15) + 800015a8: 00a38c63 beq x7,x10,800015c0 + 800015ac: 76c0646f jal x8,80007d18 + 800015b0: 800015a0 .word 0x800015a0 + 800015b4: 00000000 .word 0x00000000 + 800015b8: 8000f97f .word 0x8000f97f + 800015bc: 00000000 .word 0x00000000 + 800015c0: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xfffffffffffffffe + 800015c4: 0008b603 ld x12,0(x17) + 800015c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xf7c8f38186c5c607 + 800015cc: 0008b483 ld x9,0(x17) + 800015d0: 00888893 addi x17,x17,8 + +00000000800015d4 : +Zbkb_packh_cg_cp_rs1_edges_0xfffffffffffffffe: + packh x28, x12, x9 # perform operation + 800015d4: 08967e33 packh x28,x12,x9 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_packh_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d8: 0007b383 ld x7,0(x15) + 800015dc: 01c38c63 beq x7,x28,800015f4 + 800015e0: 7380646f jal x8,80007d18 + 800015e4: 800015d4 .word 0x800015d4 + 800015e8: 00000000 .word 0x00000000 + 800015ec: 8000f9c9 .word 0x8000f9c9 + 800015f0: 00000000 .word 0x00000000 + 800015f4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 800015f8: 0008b703 ld x14,0(x17) + 800015fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0641b0845cb4d33d + 80001600: 0008b183 ld x3,0(x17) + 80001604: 00888893 addi x17,x17,8 + +0000000080001608 : +Zbkb_packh_cg_cp_rs1_edges_0x5bbc887763ae86f2: + packh x18, x14, x3 # perform operation + 80001608: 08377933 packh x18,x14,x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_packh_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 8000160c: 0007b383 ld x7,0(x15) + 80001610: 01238c63 beq x7,x18,80001628 + 80001614: 7040646f jal x8,80007d18 + 80001618: 80001608 .word 0x80001608 + 8000161c: 00000000 .word 0x00000000 + 80001620: 8000fa13 .word 0x8000fa13 + 80001624: 00000000 .word 0x00000000 + 80001628: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 8000162c: 0008b103 ld x2,0(x17) + 80001630: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xdcc9cf0dcc30d7f3 + 80001634: 0008bc83 ld x25,0(x17) + 80001638: 00888893 addi x17,x17,8 + +000000008000163c : +Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + packh x22, x2, x25 # perform operation + 8000163c: 09917b33 packh x22,x2,x25 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001640: 0007b383 ld x7,0(x15) + 80001644: 01638c63 beq x7,x22,8000165c + 80001648: 6d00646f jal x8,80007d18 + 8000164c: 8000163c .word 0x8000163c + 80001650: 00000000 .word 0x00000000 + 80001654: 8000fa5d .word 0x8000fa5d + 80001658: 00000000 .word 0x00000000 + 8000165c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80001660: 0008b803 ld x16,0(x17) + 80001664: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xe46665d05e8e8266 + 80001668: 0008bb83 ld x23,0(x17) + 8000166c: 00888893 addi x17,x17,8 + +0000000080001670 : +Zbkb_packh_cg_cp_rs1_edges_0x5555555555555555: + packh x2, x16, x23 # perform operation + 80001670: 09787133 packh x2,x16,x23 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cp_rs1_edges_0x5555555555555555, Zbkb_packh_cg_cp_rs1_edges_0x5555555555555555_str) + 80001674: 0007b383 ld x7,0(x15) + 80001678: 00238c63 beq x7,x2,80001690 + 8000167c: 69c0646f jal x8,80007d18 + 80001680: 80001670 .word 0x80001670 + 80001684: 00000000 .word 0x00000000 + 80001688: 8000faa7 .word 0x8000faa7 + 8000168c: 00000000 .word 0x00000000 + 80001690: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x00000000ffffffff + 80001694: 0008bd83 ld x27,0(x17) + 80001698: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xc261373f900c5f35 + 8000169c: 0008b083 ld x1,0(x17) + 800016a0: 00888893 addi x17,x17,8 + +00000000800016a4 : +Zbkb_packh_cg_cp_rs1_edges_0xffffffff: + packh x26, x27, x1 # perform operation + 800016a4: 081dfd33 packh x26,x27,x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cp_rs1_edges_0xffffffff, Zbkb_packh_cg_cp_rs1_edges_0xffffffff_str) + 800016a8: 0007b383 ld x7,0(x15) + 800016ac: 01a38c63 beq x7,x26,800016c4 + 800016b0: 6680646f jal x8,80007d18 + 800016b4: 800016a4 .word 0x800016a4 + 800016b8: 00000000 .word 0x00000000 + 800016bc: 8000faf1 .word 0x8000faf1 + 800016c0: 00000000 .word 0x00000000 + 800016c4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000fffffffe + 800016c8: 0008b703 ld x14,0(x17) + 800016cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0ddc35a06dc29ac4 + 800016d0: 0008b803 ld x16,0(x17) + 800016d4: 00888893 addi x17,x17,8 + +00000000800016d8 : +Zbkb_packh_cg_cp_rs1_edges_0xfffffffe: + packh x25, x14, x16 # perform operation + 800016d8: 09077cb3 packh x25,x14,x16 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cp_rs1_edges_0xfffffffe, Zbkb_packh_cg_cp_rs1_edges_0xfffffffe_str) + 800016dc: 0007b383 ld x7,0(x15) + 800016e0: 01938c63 beq x7,x25,800016f8 + 800016e4: 6340646f jal x8,80007d18 + 800016e8: 800016d8 .word 0x800016d8 + 800016ec: 00000000 .word 0x00000000 + 800016f0: 8000fb33 .word 0x8000fb33 + 800016f4: 00000000 .word 0x00000000 + 800016f8: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000100000000 + 800016fc: 0008b983 ld x19,0(x17) + 80001700: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0c3997420329497f + 80001704: 0008be03 ld x28,0(x17) + 80001708: 00888893 addi x17,x17,8 + +000000008000170c : +Zbkb_packh_cg_cp_rs1_edges_0x100000000: + packh x4, x19, x28 # perform operation + 8000170c: 09c9f233 packh x4,x19,x28 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cp_rs1_edges_0x100000000, Zbkb_packh_cg_cp_rs1_edges_0x100000000_str) + 80001710: 0007b383 ld x7,0(x15) + 80001714: 00438c63 beq x7,x4,8000172c + 80001718: 6000646f jal x8,80007d18 + 8000171c: 8000170c .word 0x8000170c + 80001720: 00000000 .word 0x00000000 + 80001724: 8000fb75 .word 0x8000fb75 + 80001728: 00000000 .word 0x00000000 + 8000172c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000100000001 + 80001730: 0008be83 ld x29,0(x17) + 80001734: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x817b1b3872e7cfb0 + 80001738: 0008b103 ld x2,0(x17) + 8000173c: 00888893 addi x17,x17,8 + +0000000080001740 : +Zbkb_packh_cg_cp_rs1_edges_0x100000001: + packh x18, x29, x2 # perform operation + 80001740: 082ef933 packh x18,x29,x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cp_rs1_edges_0x100000001, Zbkb_packh_cg_cp_rs1_edges_0x100000001_str) + 80001744: 0007b383 ld x7,0(x15) + 80001748: 01238c63 beq x7,x18,80001760 + 8000174c: 5cc0646f jal x8,80007d18 + 80001750: 80001740 .word 0x80001740 + 80001754: 00000000 .word 0x00000000 + 80001758: 8000fbb8 .word 0x8000fbb8 + 8000175c: 00000000 .word 0x00000000 + 80001760: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x797a62f7b4b01889 + 80001764: 0008bc03 ld x24,0(x17) + 80001768: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000000 + 8000176c: 0008ba03 ld x20,0(x17) + 80001770: 00888893 addi x17,x17,8 + +0000000080001774 : +Zbkb_packh_cg_cp_rs2_edges_0x0: + packh x27, x24, x20 # perform operation + 80001774: 094c7db3 packh x27,x24,x20 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cp_rs2_edges_0x0, Zbkb_packh_cg_cp_rs2_edges_0x0_str) + 80001778: 0007b383 ld x7,0(x15) + 8000177c: 01b38c63 beq x7,x27,80001794 + 80001780: 5980646f jal x8,80007d18 + 80001784: 80001774 .word 0x80001774 + 80001788: 00000000 .word 0x00000000 + 8000178c: 8000fbfb .word 0x8000fbfb + 80001790: 00000000 .word 0x00000000 + 80001794: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x5969116ea5b87548 + 80001798: 0008be03 ld x28,0(x17) + 8000179c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000000000001 + 800017a0: 0008b583 ld x11,0(x17) + 800017a4: 00888893 addi x17,x17,8 + +00000000800017a8 : +Zbkb_packh_cg_cp_rs2_edges_0x1: + packh x4, x28, x11 # perform operation + 800017a8: 08be7233 packh x4,x28,x11 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cp_rs2_edges_0x1, Zbkb_packh_cg_cp_rs2_edges_0x1_str) + 800017ac: 0007b383 ld x7,0(x15) + 800017b0: 00438c63 beq x7,x4,800017c8 + 800017b4: 5640646f jal x8,80007d18 + 800017b8: 800017a8 .word 0x800017a8 + 800017bc: 00000000 .word 0x00000000 + 800017c0: 8000fc36 .word 0x8000fc36 + 800017c4: 00000000 .word 0x00000000 + 800017c8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xde3f32fc1abab5b2 + 800017cc: 0008b503 ld x10,0(x17) + 800017d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x0000000000000002 + 800017d4: 0008b303 ld x6,0(x17) + 800017d8: 00888893 addi x17,x17,8 + +00000000800017dc : +Zbkb_packh_cg_cp_rs2_edges_0x2: + packh x12, x10, x6 # perform operation + 800017dc: 08657633 packh x12,x10,x6 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cp_rs2_edges_0x2, Zbkb_packh_cg_cp_rs2_edges_0x2_str) + 800017e0: 0007b383 ld x7,0(x15) + 800017e4: 00c38c63 beq x7,x12,800017fc + 800017e8: 5300646f jal x8,80007d18 + 800017ec: 800017dc .word 0x800017dc + 800017f0: 00000000 .word 0x00000000 + 800017f4: 8000fc71 .word 0x8000fc71 + 800017f8: 00000000 .word 0x00000000 + 800017fc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x018b1817d00688fd + 80001800: 0008b803 ld x16,0(x17) + 80001804: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x8000000000000000 + 80001808: 0008bd03 ld x26,0(x17) + 8000180c: 00888893 addi x17,x17,8 + +0000000080001810 : +Zbkb_packh_cg_cp_rs2_edges_0x8000000000000000: + packh x12, x16, x26 # perform operation + 80001810: 09a87633 packh x12,x16,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cp_rs2_edges_0x8000000000000000, Zbkb_packh_cg_cp_rs2_edges_0x8000000000000000_str) + 80001814: 0007b383 ld x7,0(x15) + 80001818: 00c38c63 beq x7,x12,80001830 + 8000181c: 4fc0646f jal x8,80007d18 + 80001820: 80001810 .word 0x80001810 + 80001824: 00000000 .word 0x00000000 + 80001828: 8000fcac .word 0x8000fcac + 8000182c: 00000000 .word 0x00000000 + 80001830: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x55f16e1021d18216 + 80001834: 0008b583 ld x11,0(x17) + 80001838: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000001 + 8000183c: 0008b803 ld x16,0(x17) + 80001840: 00888893 addi x17,x17,8 + +0000000080001844 : +Zbkb_packh_cg_cp_rs2_edges_0x8000000000000001: + packh x4, x11, x16 # perform operation + 80001844: 0905f233 packh x4,x11,x16 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cp_rs2_edges_0x8000000000000001, Zbkb_packh_cg_cp_rs2_edges_0x8000000000000001_str) + 80001848: 0007b383 ld x7,0(x15) + 8000184c: 00438c63 beq x7,x4,80001864 + 80001850: 4c80646f jal x8,80007d18 + 80001854: 80001844 .word 0x80001844 + 80001858: 00000000 .word 0x00000000 + 8000185c: 8000fcf6 .word 0x8000fcf6 + 80001860: 00000000 .word 0x00000000 + 80001864: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x80bc14c9f845f45d + 80001868: 0008b203 ld x4,0(x17) + 8000186c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7fffffffffffffff + 80001870: 0008b903 ld x18,0(x17) + 80001874: 00888893 addi x17,x17,8 + +0000000080001878 : +Zbkb_packh_cg_cp_rs2_edges_0x7fffffffffffffff: + packh x22, x4, x18 # perform operation + 80001878: 09227b33 packh x22,x4,x18 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_packh_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 8000187c: 0007b383 ld x7,0(x15) + 80001880: 01638c63 beq x7,x22,80001898 + 80001884: 4940646f jal x8,80007d18 + 80001888: 80001878 .word 0x80001878 + 8000188c: 00000000 .word 0x00000000 + 80001890: 8000fd40 .word 0x8000fd40 + 80001894: 00000000 .word 0x00000000 + 80001898: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x081c80a9475aa14a + 8000189c: 0008ba03 ld x20,0(x17) + 800018a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7ffffffffffffffe + 800018a4: 0008b903 ld x18,0(x17) + 800018a8: 00888893 addi x17,x17,8 + +00000000800018ac : +Zbkb_packh_cg_cp_rs2_edges_0x7ffffffffffffffe: + packh x21, x20, x18 # perform operation + 800018ac: 092a7ab3 packh x21,x20,x18 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_packh_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b0: 0007b383 ld x7,0(x15) + 800018b4: 01538c63 beq x7,x21,800018cc + 800018b8: 4600646f jal x8,80007d18 + 800018bc: 800018ac .word 0x800018ac + 800018c0: 00000000 .word 0x00000000 + 800018c4: 8000fd8a .word 0x8000fd8a + 800018c8: 00000000 .word 0x00000000 + 800018cc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x53d9a2082c98a025 + 800018d0: 0008b183 ld x3,0(x17) + 800018d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0xffffffffffffffff + 800018d8: 0008bf83 ld x31,0(x17) + 800018dc: 00888893 addi x17,x17,8 + +00000000800018e0 : +Zbkb_packh_cg_cp_rs2_edges_0xffffffffffffffff: + packh x21, x3, x31 # perform operation + 800018e0: 09f1fab3 packh x21,x3,x31 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_packh_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e4: 0007b383 ld x7,0(x15) + 800018e8: 01538c63 beq x7,x21,80001900 + 800018ec: 42c0646f jal x8,80007d18 + 800018f0: 800018e0 .word 0x800018e0 + 800018f4: 00000000 .word 0x00000000 + 800018f8: 8000fdd4 .word 0x8000fdd4 + 800018fc: 00000000 .word 0x00000000 + 80001900: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xc7d44ddd0a75fde7 + 80001904: 0008be03 ld x28,0(x17) + 80001908: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xfffffffffffffffe + 8000190c: 0008bd83 ld x27,0(x17) + 80001910: 00888893 addi x17,x17,8 + +0000000080001914 : +Zbkb_packh_cg_cp_rs2_edges_0xfffffffffffffffe: + packh x16, x28, x27 # perform operation + 80001914: 09be7833 packh x16,x28,x27 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_packh_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001918: 0007b383 ld x7,0(x15) + 8000191c: 01038c63 beq x7,x16,80001934 + 80001920: 3f80646f jal x8,80007d18 + 80001924: 80001914 .word 0x80001914 + 80001928: 00000000 .word 0x00000000 + 8000192c: 8000fe1e .word 0x8000fe1e + 80001930: 00000000 .word 0x00000000 + 80001934: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7530b26d42793237 + 80001938: 0008b583 ld x11,0(x17) + 8000193c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80001940: 0008b703 ld x14,0(x17) + 80001944: 00888893 addi x17,x17,8 + +0000000080001948 : +Zbkb_packh_cg_cp_rs2_edges_0x5bbc887763ae86f2: + packh x30, x11, x14 # perform operation + 80001948: 08e5ff33 packh x30,x11,x14 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_packh_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 8000194c: 0007b383 ld x7,0(x15) + 80001950: 01e38c63 beq x7,x30,80001968 + 80001954: 3c40646f jal x8,80007d18 + 80001958: 80001948 .word 0x80001948 + 8000195c: 00000000 .word 0x00000000 + 80001960: 8000fe68 .word 0x8000fe68 + 80001964: 00000000 .word 0x00000000 + 80001968: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0xec6ece45121e25d5 + 8000196c: 0008ba83 ld x21,0(x17) + 80001970: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80001974: 0008b603 ld x12,0(x17) + 80001978: 00888893 addi x17,x17,8 + +000000008000197c : +Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + packh x9, x21, x12 # perform operation + 8000197c: 08caf4b3 packh x9,x21,x12 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001980: 0007b383 ld x7,0(x15) + 80001984: 00938c63 beq x7,x9,8000199c + 80001988: 3900646f jal x8,80007d18 + 8000198c: 8000197c .word 0x8000197c + 80001990: 00000000 .word 0x00000000 + 80001994: 8000feb2 .word 0x8000feb2 + 80001998: 00000000 .word 0x00000000 + 8000199c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x728a3c580aefec38 + 800019a0: 0008bf03 ld x30,0(x17) + 800019a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x5555555555555555 + 800019a8: 0008b803 ld x16,0(x17) + 800019ac: 00888893 addi x17,x17,8 + +00000000800019b0 : +Zbkb_packh_cg_cp_rs2_edges_0x5555555555555555: + packh x26, x30, x16 # perform operation + 800019b0: 090f7d33 packh x26,x30,x16 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cp_rs2_edges_0x5555555555555555, Zbkb_packh_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b4: 0007b383 ld x7,0(x15) + 800019b8: 01a38c63 beq x7,x26,800019d0 + 800019bc: 35c0646f jal x8,80007d18 + 800019c0: 800019b0 .word 0x800019b0 + 800019c4: 00000000 .word 0x00000000 + 800019c8: 8000fefc .word 0x8000fefc + 800019cc: 00000000 .word 0x00000000 + 800019d0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x31b49a0bdea164ad + 800019d4: 0008b183 ld x3,0(x17) + 800019d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x00000000ffffffff + 800019dc: 0008bd83 ld x27,0(x17) + 800019e0: 00888893 addi x17,x17,8 + +00000000800019e4 : +Zbkb_packh_cg_cp_rs2_edges_0xffffffff: + packh x23, x3, x27 # perform operation + 800019e4: 09b1fbb3 packh x23,x3,x27 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cp_rs2_edges_0xffffffff, Zbkb_packh_cg_cp_rs2_edges_0xffffffff_str) + 800019e8: 0007b383 ld x7,0(x15) + 800019ec: 01738c63 beq x7,x23,80001a04 + 800019f0: 3280646f jal x8,80007d18 + 800019f4: 800019e4 .word 0x800019e4 + 800019f8: 00000000 .word 0x00000000 + 800019fc: 8000ff46 .word 0x8000ff46 + 80001a00: 00000000 .word 0x00000000 + 80001a04: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x85f637bb518a89c3 + 80001a08: 0008bc83 ld x25,0(x17) + 80001a0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000fffffffe + 80001a10: 0008bc03 ld x24,0(x17) + 80001a14: 00888893 addi x17,x17,8 + +0000000080001a18 : +Zbkb_packh_cg_cp_rs2_edges_0xfffffffe: + packh x19, x25, x24 # perform operation + 80001a18: 098cf9b3 packh x19,x25,x24 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cp_rs2_edges_0xfffffffe, Zbkb_packh_cg_cp_rs2_edges_0xfffffffe_str) + 80001a1c: 0007b383 ld x7,0(x15) + 80001a20: 01338c63 beq x7,x19,80001a38 + 80001a24: 2f40646f jal x8,80007d18 + 80001a28: 80001a18 .word 0x80001a18 + 80001a2c: 00000000 .word 0x00000000 + 80001a30: 8000ff88 .word 0x8000ff88 + 80001a34: 00000000 .word 0x00000000 + 80001a38: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xe32dd5155ccf6938 + 80001a3c: 0008bb83 ld x23,0(x17) + 80001a40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000000 + 80001a44: 0008bf83 ld x31,0(x17) + 80001a48: 00888893 addi x17,x17,8 + +0000000080001a4c : +Zbkb_packh_cg_cp_rs2_edges_0x100000000: + packh x26, x23, x31 # perform operation + 80001a4c: 09fbfd33 packh x26,x23,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cp_rs2_edges_0x100000000, Zbkb_packh_cg_cp_rs2_edges_0x100000000_str) + 80001a50: 0007b383 ld x7,0(x15) + 80001a54: 01a38c63 beq x7,x26,80001a6c + 80001a58: 2c00646f jal x8,80007d18 + 80001a5c: 80001a4c .word 0x80001a4c + 80001a60: 00000000 .word 0x00000000 + 80001a64: 8000ffca .word 0x8000ffca + 80001a68: 00000000 .word 0x00000000 + 80001a6c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x570b241e50830bea + 80001a70: 0008be03 ld x28,0(x17) + 80001a74: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000100000001 + 80001a78: 0008b083 ld x1,0(x17) + 80001a7c: 00888893 addi x17,x17,8 + +0000000080001a80 : +Zbkb_packh_cg_cp_rs2_edges_0x100000001: + packh x9, x28, x1 # perform operation + 80001a80: 081e74b3 packh x9,x28,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cp_rs2_edges_0x100000001, Zbkb_packh_cg_cp_rs2_edges_0x100000001_str) + 80001a84: 0007b383 ld x7,0(x15) + 80001a88: 00938c63 beq x7,x9,80001aa0 + 80001a8c: 28c0646f jal x8,80007d18 + 80001a90: 80001a80 .word 0x80001a80 + 80001a94: 00000000 .word 0x00000000 + 80001a98: 8001000d .word 0x8001000d + 80001a9c: 00000000 .word 0x00000000 + 80001aa0: 00878793 addi x15,x15,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000000000000 + 80001aa4: 0008bc03 ld x24,0(x17) + 80001aa8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000000 + 80001aac: 0008be03 ld x28,0(x17) + 80001ab0: 00888893 addi x17,x17,8 + +0000000080001ab4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + packh x14, x24, x28 # perform operation + 80001ab4: 09cc7733 packh x14,x24,x28 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab8: 0007b383 ld x7,0(x15) + 80001abc: 00e38c63 beq x7,x14,80001ad4 + 80001ac0: 2580646f jal x8,80007d18 + 80001ac4: 80001ab4 .word 0x80001ab4 + 80001ac8: 00000000 .word 0x00000000 + 80001acc: 80010050 .word 0x80010050 + 80001ad0: 00000000 .word 0x00000000 + 80001ad4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x0000000000000000 + 80001ad8: 0008bf03 ld x30,0(x17) + 80001adc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000000000001 + 80001ae0: 0008b903 ld x18,0(x17) + 80001ae4: 00888893 addi x17,x17,8 + +0000000080001ae8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + packh x31, x30, x18 # perform operation + 80001ae8: 092f7fb3 packh x31,x30,x18 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001aec: 0007b383 ld x7,0(x15) + 80001af0: 01f38c63 beq x7,x31,80001b08 + 80001af4: 2240646f jal x8,80007d18 + 80001af8: 80001ae8 .word 0x80001ae8 + 80001afc: 00000000 .word 0x00000000 + 80001b00: 800100a2 .word 0x800100a2 + 80001b04: 00000000 .word 0x00000000 + 80001b08: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000000000000 + 80001b0c: 0008bf83 ld x31,0(x17) + 80001b10: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x0000000000000002 + 80001b14: 0008bc83 ld x25,0(x17) + 80001b18: 00888893 addi x17,x17,8 + +0000000080001b1c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + packh x14, x31, x25 # perform operation + 80001b1c: 099ff733 packh x14,x31,x25 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b20: 0007b383 ld x7,0(x15) + 80001b24: 00e38c63 beq x7,x14,80001b3c + 80001b28: 1f00646f jal x8,80007d18 + 80001b2c: 80001b1c .word 0x80001b1c + 80001b30: 00000000 .word 0x00000000 + 80001b34: 800100f4 .word 0x800100f4 + 80001b38: 00000000 .word 0x00000000 + 80001b3c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000000000000 + 80001b40: 0008be83 ld x29,0(x17) + 80001b44: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8000000000000000 + 80001b48: 0008bb03 ld x22,0(x17) + 80001b4c: 00888893 addi x17,x17,8 + +0000000080001b50 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + packh x14, x29, x22 # perform operation + 80001b50: 096ef733 packh x14,x29,x22 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b54: 0007b383 ld x7,0(x15) + 80001b58: 00e38c63 beq x7,x14,80001b70 + 80001b5c: 1bc0646f jal x8,80007d18 + 80001b60: 80001b50 .word 0x80001b50 + 80001b64: 00000000 .word 0x00000000 + 80001b68: 80010146 .word 0x80010146 + 80001b6c: 00000000 .word 0x00000000 + 80001b70: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x0000000000000000 + 80001b74: 0008b283 ld x5,0(x17) + 80001b78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8000000000000001 + 80001b7c: 0008bb03 ld x22,0(x17) + 80001b80: 00888893 addi x17,x17,8 + +0000000080001b84 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + packh x26, x5, x22 # perform operation + 80001b84: 0962fd33 packh x26,x5,x22 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b88: 0007b383 ld x7,0(x15) + 80001b8c: 01a38c63 beq x7,x26,80001ba4 + 80001b90: 1880646f jal x8,80007d18 + 80001b94: 80001b84 .word 0x80001b84 + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 800101a7 .word 0x800101a7 + 80001ba0: 00000000 .word 0x00000000 + 80001ba4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000000000000 + 80001ba8: 0008b803 ld x16,0(x17) + 80001bac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x7fffffffffffffff + 80001bb0: 0008b183 ld x3,0(x17) + 80001bb4: 00888893 addi x17,x17,8 + +0000000080001bb8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + packh x6, x16, x3 # perform operation + 80001bb8: 08387333 packh x6,x16,x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bbc: 0007b383 ld x7,0(x15) + 80001bc0: 00638c63 beq x7,x6,80001bd8 + 80001bc4: 1540646f jal x8,80007d18 + 80001bc8: 80001bb8 .word 0x80001bb8 + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 80010208 .word 0x80010208 + 80001bd4: 00000000 .word 0x00000000 + 80001bd8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000000000000 + 80001bdc: 0008bf83 ld x31,0(x17) + 80001be0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80001be4: 0008b483 ld x9,0(x17) + 80001be8: 00888893 addi x17,x17,8 + +0000000080001bec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + packh x26, x31, x9 # perform operation + 80001bec: 089ffd33 packh x26,x31,x9 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf0: 0007b383 ld x7,0(x15) + 80001bf4: 01a38c63 beq x7,x26,80001c0c + 80001bf8: 1200646f jal x8,80007d18 + 80001bfc: 80001bec .word 0x80001bec + 80001c00: 00000000 .word 0x00000000 + 80001c04: 80010269 .word 0x80010269 + 80001c08: 00000000 .word 0x00000000 + 80001c0c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x0000000000000000 + 80001c10: 0008b283 ld x5,0(x17) + 80001c14: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xffffffffffffffff + 80001c18: 0008bb83 ld x23,0(x17) + 80001c1c: 00888893 addi x17,x17,8 + +0000000080001c20 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + packh x22, x5, x23 # perform operation + 80001c20: 0972fb33 packh x22,x5,x23 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c24: 0007b383 ld x7,0(x15) + 80001c28: 01638c63 beq x7,x22,80001c40 + 80001c2c: 0ec0646f jal x8,80007d18 + 80001c30: 80001c20 .word 0x80001c20 + 80001c34: 00000000 .word 0x00000000 + 80001c38: 800102ca .word 0x800102ca + 80001c3c: 00000000 .word 0x00000000 + 80001c40: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001c44: 0008be03 ld x28,0(x17) + 80001c48: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0xfffffffffffffffe + 80001c4c: 0008bf03 ld x30,0(x17) + 80001c50: 00888893 addi x17,x17,8 + +0000000080001c54 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + packh x26, x28, x30 # perform operation + 80001c54: 09ee7d33 packh x26,x28,x30 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c58: 0007b383 ld x7,0(x15) + 80001c5c: 01a38c63 beq x7,x26,80001c74 + 80001c60: 0b80646f jal x8,80007d18 + 80001c64: 80001c54 .word 0x80001c54 + 80001c68: 00000000 .word 0x00000000 + 80001c6c: 8001032b .word 0x8001032b + 80001c70: 00000000 .word 0x00000000 + 80001c74: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000000 + 80001c78: 0008b503 ld x10,0(x17) + 80001c7c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80001c80: 0008b983 ld x19,0(x17) + 80001c84: 00888893 addi x17,x17,8 + +0000000080001c88 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + packh x11, x10, x19 # perform operation + 80001c88: 093575b3 packh x11,x10,x19 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c8c: 0007b383 ld x7,0(x15) + 80001c90: 00b38c63 beq x7,x11,80001ca8 + 80001c94: 0840646f jal x8,80007d18 + 80001c98: 80001c88 .word 0x80001c88 + 80001c9c: 00000000 .word 0x00000000 + 80001ca0: 8001038c .word 0x8001038c + 80001ca4: 00000000 .word 0x00000000 + 80001ca8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000000000000 + 80001cac: 0008bb03 ld x22,0(x17) + 80001cb0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80001cb4: 0008b103 ld x2,0(x17) + 80001cb8: 00888893 addi x17,x17,8 + +0000000080001cbc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + packh x5, x22, x2 # perform operation + 80001cbc: 082b72b3 packh x5,x22,x2 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc0: 0007b383 ld x7,0(x15) + 80001cc4: 00538c63 beq x7,x5,80001cdc + 80001cc8: 0500646f jal x8,80007d18 + 80001ccc: 80001cbc .word 0x80001cbc + 80001cd0: 00000000 .word 0x00000000 + 80001cd4: 800103ed .word 0x800103ed + 80001cd8: 00000000 .word 0x00000000 + 80001cdc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000000 + 80001ce0: 0008b503 ld x10,0(x17) + 80001ce4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x5555555555555555 + 80001ce8: 0008b303 ld x6,0(x17) + 80001cec: 00888893 addi x17,x17,8 + +0000000080001cf0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + packh x29, x10, x6 # perform operation + 80001cf0: 08657eb3 packh x29,x10,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf4: 0007b383 ld x7,0(x15) + 80001cf8: 01d38c63 beq x7,x29,80001d10 + 80001cfc: 01c0646f jal x8,80007d18 + 80001d00: 80001cf0 .word 0x80001cf0 + 80001d04: 00000000 .word 0x00000000 + 80001d08: 8001044e .word 0x8001044e + 80001d0c: 00000000 .word 0x00000000 + 80001d10: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000000 + 80001d14: 0008ba03 ld x20,0(x17) + 80001d18: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x00000000ffffffff + 80001d1c: 0008bf83 ld x31,0(x17) + 80001d20: 00888893 addi x17,x17,8 + +0000000080001d24 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + packh x21, x20, x31 # perform operation + 80001d24: 09fa7ab3 packh x21,x20,x31 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d28: 0007b383 ld x7,0(x15) + 80001d2c: 01538c63 beq x7,x21,80001d44 + 80001d30: 7e90546f jal x8,80007d18 + 80001d34: 80001d24 .word 0x80001d24 + 80001d38: 00000000 .word 0x00000000 + 80001d3c: 800104af .word 0x800104af + 80001d40: 00000000 .word 0x00000000 + 80001d44: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000000000000 + 80001d48: 0008bd83 ld x27,0(x17) + 80001d4c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x00000000fffffffe + 80001d50: 0008b983 ld x19,0(x17) + 80001d54: 00888893 addi x17,x17,8 + +0000000080001d58 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + packh x25, x27, x19 # perform operation + 80001d58: 093dfcb3 packh x25,x27,x19 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d5c: 0007b383 ld x7,0(x15) + 80001d60: 01938c63 beq x7,x25,80001d78 + 80001d64: 7b50546f jal x8,80007d18 + 80001d68: 80001d58 .word 0x80001d58 + 80001d6c: 00000000 .word 0x00000000 + 80001d70: 80010508 .word 0x80010508 + 80001d74: 00000000 .word 0x00000000 + 80001d78: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000000000000 + 80001d7c: 0008bc83 ld x25,0(x17) + 80001d80: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000000 + 80001d84: 0008bf83 ld x31,0(x17) + 80001d88: 00888893 addi x17,x17,8 + +0000000080001d8c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + packh x12, x25, x31 # perform operation + 80001d8c: 09fcf633 packh x12,x25,x31 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d90: 0007b383 ld x7,0(x15) + 80001d94: 00c38c63 beq x7,x12,80001dac + 80001d98: 7810546f jal x8,80007d18 + 80001d9c: 80001d8c .word 0x80001d8c + 80001da0: 00000000 .word 0x00000000 + 80001da4: 80010561 .word 0x80010561 + 80001da8: 00000000 .word 0x00000000 + 80001dac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000000000000 + 80001db0: 0008bc83 ld x25,0(x17) + 80001db4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000100000001 + 80001db8: 0008bf03 ld x30,0(x17) + 80001dbc: 00888893 addi x17,x17,8 + +0000000080001dc0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + packh x21, x25, x30 # perform operation + 80001dc0: 09ecfab3 packh x21,x25,x30 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc4: 0007b383 ld x7,0(x15) + 80001dc8: 01538c63 beq x7,x21,80001de0 + 80001dcc: 74d0546f jal x8,80007d18 + 80001dd0: 80001dc0 .word 0x80001dc0 + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 800105bb .word 0x800105bb + 80001ddc: 00000000 .word 0x00000000 + 80001de0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000000000001 + 80001de4: 0008ba83 ld x21,0(x17) + 80001de8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x0000000000000000 + 80001dec: 0008b703 ld x14,0(x17) + 80001df0: 00888893 addi x17,x17,8 + +0000000080001df4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + packh x19, x21, x14 # perform operation + 80001df4: 08eaf9b3 packh x19,x21,x14 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df8: 0007b383 ld x7,0(x15) + 80001dfc: 01338c63 beq x7,x19,80001e14 + 80001e00: 7190546f jal x8,80007d18 + 80001e04: 80001df4 .word 0x80001df4 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 80010615 .word 0x80010615 + 80001e10: 00000000 .word 0x00000000 + 80001e14: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000001 + 80001e18: 0008ba03 ld x20,0(x17) + 80001e1c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x0000000000000001 + 80001e20: 0008b203 ld x4,0(x17) + 80001e24: 00888893 addi x17,x17,8 + +0000000080001e28 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + packh x5, x20, x4 # perform operation + 80001e28: 084a72b3 packh x5,x20,x4 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e2c: 0007b383 ld x7,0(x15) + 80001e30: 00538c63 beq x7,x5,80001e48 + 80001e34: 6e50546f jal x8,80007d18 + 80001e38: 80001e28 .word 0x80001e28 + 80001e3c: 00000000 .word 0x00000000 + 80001e40: 80010667 .word 0x80010667 + 80001e44: 00000000 .word 0x00000000 + 80001e48: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000000000001 + 80001e4c: 0008b803 ld x16,0(x17) + 80001e50: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x0000000000000002 + 80001e54: 0008b683 ld x13,0(x17) + 80001e58: 00888893 addi x17,x17,8 + +0000000080001e5c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + packh x25, x16, x13 # perform operation + 80001e5c: 08d87cb3 packh x25,x16,x13 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e60: 0007b383 ld x7,0(x15) + 80001e64: 01938c63 beq x7,x25,80001e7c + 80001e68: 6b10546f jal x8,80007d18 + 80001e6c: 80001e5c .word 0x80001e5c + 80001e70: 00000000 .word 0x00000000 + 80001e74: 800106b9 .word 0x800106b9 + 80001e78: 00000000 .word 0x00000000 + 80001e7c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000000000001 + 80001e80: 0008bf83 ld x31,0(x17) + 80001e84: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x8000000000000000 + 80001e88: 0008b903 ld x18,0(x17) + 80001e8c: 00888893 addi x17,x17,8 + +0000000080001e90 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + packh x9, x31, x18 # perform operation + 80001e90: 092ff4b3 packh x9,x31,x18 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e94: 0007b383 ld x7,0(x15) + 80001e98: 00938c63 beq x7,x9,80001eb0 + 80001e9c: 67d0546f jal x8,80007d18 + 80001ea0: 80001e90 .word 0x80001e90 + 80001ea4: 00000000 .word 0x00000000 + 80001ea8: 8001070b .word 0x8001070b + 80001eac: 00000000 .word 0x00000000 + 80001eb0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x0000000000000001 + 80001eb4: 0008b303 ld x6,0(x17) + 80001eb8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x8000000000000001 + 80001ebc: 0008bf83 ld x31,0(x17) + 80001ec0: 00888893 addi x17,x17,8 + +0000000080001ec4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + packh x24, x6, x31 # perform operation + 80001ec4: 09f37c33 packh x24,x6,x31 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec8: 0007b383 ld x7,0(x15) + 80001ecc: 01838c63 beq x7,x24,80001ee4 + 80001ed0: 6490546f jal x8,80007d18 + 80001ed4: 80001ec4 .word 0x80001ec4 + 80001ed8: 00000000 .word 0x00000000 + 80001edc: 8001076c .word 0x8001076c + 80001ee0: 00000000 .word 0x00000000 + 80001ee4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000000000001 + 80001ee8: 0008bc83 ld x25,0(x17) + 80001eec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x7fffffffffffffff + 80001ef0: 0008b503 ld x10,0(x17) + 80001ef4: 00888893 addi x17,x17,8 + +0000000080001ef8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + packh x12, x25, x10 # perform operation + 80001ef8: 08acf633 packh x12,x25,x10 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001efc: 0007b383 ld x7,0(x15) + 80001f00: 00c38c63 beq x7,x12,80001f18 + 80001f04: 6150546f jal x8,80007d18 + 80001f08: 80001ef8 .word 0x80001ef8 + 80001f0c: 00000000 .word 0x00000000 + 80001f10: 800107cd .word 0x800107cd + 80001f14: 00000000 .word 0x00000000 + 80001f18: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x0000000000000001 + 80001f1c: 0008b203 ld x4,0(x17) + 80001f20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80001f24: 0008bd03 ld x26,0(x17) + 80001f28: 00888893 addi x17,x17,8 + +0000000080001f2c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + packh x30, x4, x26 # perform operation + 80001f2c: 09a27f33 packh x30,x4,x26 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f30: 0007b383 ld x7,0(x15) + 80001f34: 01e38c63 beq x7,x30,80001f4c + 80001f38: 5e10546f jal x8,80007d18 + 80001f3c: 80001f2c .word 0x80001f2c + 80001f40: 00000000 .word 0x00000000 + 80001f44: 8001082e .word 0x8001082e + 80001f48: 00000000 .word 0x00000000 + 80001f4c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000000000001 + 80001f50: 0008b803 ld x16,0(x17) + 80001f54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xffffffffffffffff + 80001f58: 0008b703 ld x14,0(x17) + 80001f5c: 00888893 addi x17,x17,8 + +0000000080001f60 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + packh x22, x16, x14 # perform operation + 80001f60: 08e87b33 packh x22,x16,x14 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f64: 0007b383 ld x7,0(x15) + 80001f68: 01638c63 beq x7,x22,80001f80 + 80001f6c: 5ad0546f jal x8,80007d18 + 80001f70: 80001f60 .word 0x80001f60 + 80001f74: 00000000 .word 0x00000000 + 80001f78: 8001088f .word 0x8001088f + 80001f7c: 00000000 .word 0x00000000 + 80001f80: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000000000001 + 80001f84: 0008b903 ld x18,0(x17) + 80001f88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0xfffffffffffffffe + 80001f8c: 0008ba03 ld x20,0(x17) + 80001f90: 00888893 addi x17,x17,8 + +0000000080001f94 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + packh x11, x18, x20 # perform operation + 80001f94: 094975b3 packh x11,x18,x20 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f98: 0007b383 ld x7,0(x15) + 80001f9c: 00b38c63 beq x7,x11,80001fb4 + 80001fa0: 5790546f jal x8,80007d18 + 80001fa4: 80001f94 .word 0x80001f94 + 80001fa8: 00000000 .word 0x00000000 + 80001fac: 800108f0 .word 0x800108f0 + 80001fb0: 00000000 .word 0x00000000 + 80001fb4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000000000001 + 80001fb8: 0008b183 ld x3,0(x17) + 80001fbc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x5bbc887763ae86f2 + 80001fc0: 0008b083 ld x1,0(x17) + 80001fc4: 00888893 addi x17,x17,8 + +0000000080001fc8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + packh x4, x3, x1 # perform operation + 80001fc8: 0811f233 packh x4,x3,x1 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fcc: 0007b383 ld x7,0(x15) + 80001fd0: 00438c63 beq x7,x4,80001fe8 + 80001fd4: 5450546f jal x8,80007d18 + 80001fd8: 80001fc8 .word 0x80001fc8 + 80001fdc: 00000000 .word 0x00000000 + 80001fe0: 80010951 .word 0x80010951 + 80001fe4: 00000000 .word 0x00000000 + 80001fe8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000001 + 80001fec: 0008ba03 ld x20,0(x17) + 80001ff0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80001ff4: 0008bf03 ld x30,0(x17) + 80001ff8: 00888893 addi x17,x17,8 + +0000000080001ffc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + packh x9, x20, x30 # perform operation + 80001ffc: 09ea74b3 packh x9,x20,x30 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002000: 0007b383 ld x7,0(x15) + 80002004: 00938c63 beq x7,x9,8000201c + 80002008: 5110546f jal x8,80007d18 + 8000200c: 80001ffc .word 0x80001ffc + 80002010: 00000000 .word 0x00000000 + 80002014: 800109b2 .word 0x800109b2 + 80002018: 00000000 .word 0x00000000 + 8000201c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000000000001 + 80002020: 0008b903 ld x18,0(x17) + 80002024: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x5555555555555555 + 80002028: 0008b283 ld x5,0(x17) + 8000202c: 00888893 addi x17,x17,8 + +0000000080002030 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + packh x29, x18, x5 # perform operation + 80002030: 08597eb3 packh x29,x18,x5 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002034: 0007b383 ld x7,0(x15) + 80002038: 01d38c63 beq x7,x29,80002050 + 8000203c: 4dd0546f jal x8,80007d18 + 80002040: 80002030 .word 0x80002030 + 80002044: 00000000 .word 0x00000000 + 80002048: 80010a13 .word 0x80010a13 + 8000204c: 00000000 .word 0x00000000 + 80002050: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000001 + 80002054: 0008ba03 ld x20,0(x17) + 80002058: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x00000000ffffffff + 8000205c: 0008bc83 ld x25,0(x17) + 80002060: 00888893 addi x17,x17,8 + +0000000080002064 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + packh x18, x20, x25 # perform operation + 80002064: 099a7933 packh x18,x20,x25 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002068: 0007b383 ld x7,0(x15) + 8000206c: 01238c63 beq x7,x18,80002084 + 80002070: 4a90546f jal x8,80007d18 + 80002074: 80002064 .word 0x80002064 + 80002078: 00000000 .word 0x00000000 + 8000207c: 80010a74 .word 0x80010a74 + 80002080: 00000000 .word 0x00000000 + 80002084: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000000000001 + 80002088: 0008be83 ld x29,0(x17) + 8000208c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x00000000fffffffe + 80002090: 0008bf03 ld x30,0(x17) + 80002094: 00888893 addi x17,x17,8 + +0000000080002098 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + packh x16, x29, x30 # perform operation + 80002098: 09eef833 packh x16,x29,x30 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 8000209c: 0007b383 ld x7,0(x15) + 800020a0: 01038c63 beq x7,x16,800020b8 + 800020a4: 4750546f jal x8,80007d18 + 800020a8: 80002098 .word 0x80002098 + 800020ac: 00000000 .word 0x00000000 + 800020b0: 80010acd .word 0x80010acd + 800020b4: 00000000 .word 0x00000000 + 800020b8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000000000001 + 800020bc: 0008b703 ld x14,0(x17) + 800020c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000100000000 + 800020c4: 0008b283 ld x5,0(x17) + 800020c8: 00888893 addi x17,x17,8 + +00000000800020cc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + packh x13, x14, x5 # perform operation + 800020cc: 085776b3 packh x13,x14,x5 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d0: 0007b383 ld x7,0(x15) + 800020d4: 00d38c63 beq x7,x13,800020ec + 800020d8: 4410546f jal x8,80007d18 + 800020dc: 800020cc .word 0x800020cc + 800020e0: 00000000 .word 0x00000000 + 800020e4: 80010b26 .word 0x80010b26 + 800020e8: 00000000 .word 0x00000000 + 800020ec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x0000000000000001 + 800020f0: 0008bf03 ld x30,0(x17) + 800020f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000100000001 + 800020f8: 0008b283 ld x5,0(x17) + 800020fc: 00888893 addi x17,x17,8 + +0000000080002100 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + packh x14, x30, x5 # perform operation + 80002100: 085f7733 packh x14,x30,x5 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002104: 0007b383 ld x7,0(x15) + 80002108: 00e38c63 beq x7,x14,80002120 + 8000210c: 40d0546f jal x8,80007d18 + 80002110: 80002100 .word 0x80002100 + 80002114: 00000000 .word 0x00000000 + 80002118: 80010b80 .word 0x80010b80 + 8000211c: 00000000 .word 0x00000000 + 80002120: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000000000002 + 80002124: 0008b903 ld x18,0(x17) + 80002128: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000000 + 8000212c: 0008be03 ld x28,0(x17) + 80002130: 00888893 addi x17,x17,8 + +0000000080002134 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + packh x23, x18, x28 # perform operation + 80002134: 09c97bb3 packh x23,x18,x28 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002138: 0007b383 ld x7,0(x15) + 8000213c: 01738c63 beq x7,x23,80002154 + 80002140: 3d90546f jal x8,80007d18 + 80002144: 80002134 .word 0x80002134 + 80002148: 00000000 .word 0x00000000 + 8000214c: 80010bda .word 0x80010bda + 80002150: 00000000 .word 0x00000000 + 80002154: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000000000002 + 80002158: 0008b583 ld x11,0(x17) + 8000215c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000000000001 + 80002160: 0008bf03 ld x30,0(x17) + 80002164: 00888893 addi x17,x17,8 + +0000000080002168 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + packh x6, x11, x30 # perform operation + 80002168: 09e5f333 packh x6,x11,x30 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 8000216c: 0007b383 ld x7,0(x15) + 80002170: 00638c63 beq x7,x6,80002188 + 80002174: 3a50546f jal x8,80007d18 + 80002178: 80002168 .word 0x80002168 + 8000217c: 00000000 .word 0x00000000 + 80002180: 80010c2c .word 0x80010c2c + 80002184: 00000000 .word 0x00000000 + 80002188: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000000000002 + 8000218c: 0008b903 ld x18,0(x17) + 80002190: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000002 + 80002194: 0008bd83 ld x27,0(x17) + 80002198: 00888893 addi x17,x17,8 + +000000008000219c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + packh x16, x18, x27 # perform operation + 8000219c: 09b97833 packh x16,x18,x27 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a0: 0007b383 ld x7,0(x15) + 800021a4: 01038c63 beq x7,x16,800021bc + 800021a8: 3710546f jal x8,80007d18 + 800021ac: 8000219c .word 0x8000219c + 800021b0: 00000000 .word 0x00000000 + 800021b4: 80010c7e .word 0x80010c7e + 800021b8: 00000000 .word 0x00000000 + 800021bc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000002 + 800021c0: 0008ba03 ld x20,0(x17) + 800021c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x8000000000000000 + 800021c8: 0008bc03 ld x24,0(x17) + 800021cc: 00888893 addi x17,x17,8 + +00000000800021d0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + packh x18, x20, x24 # perform operation + 800021d0: 098a7933 packh x18,x20,x24 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d4: 0007b383 ld x7,0(x15) + 800021d8: 01238c63 beq x7,x18,800021f0 + 800021dc: 33d0546f jal x8,80007d18 + 800021e0: 800021d0 .word 0x800021d0 + 800021e4: 00000000 .word 0x00000000 + 800021e8: 80010cd0 .word 0x80010cd0 + 800021ec: 00000000 .word 0x00000000 + 800021f0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000000000002 + 800021f4: 0008ba83 ld x21,0(x17) + 800021f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x8000000000000001 + 800021fc: 0008bc83 ld x25,0(x17) + 80002200: 00888893 addi x17,x17,8 + +0000000080002204 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + packh x20, x21, x25 # perform operation + 80002204: 099afa33 packh x20,x21,x25 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002208: 0007b383 ld x7,0(x15) + 8000220c: 01438c63 beq x7,x20,80002224 + 80002210: 3090546f jal x8,80007d18 + 80002214: 80002204 .word 0x80002204 + 80002218: 00000000 .word 0x00000000 + 8000221c: 80010d31 .word 0x80010d31 + 80002220: 00000000 .word 0x00000000 + 80002224: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000000000002 + 80002228: 0008ba03 ld x20,0(x17) + 8000222c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x7fffffffffffffff + 80002230: 0008b083 ld x1,0(x17) + 80002234: 00888893 addi x17,x17,8 + +0000000080002238 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + packh x23, x20, x1 # perform operation + 80002238: 081a7bb3 packh x23,x20,x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 8000223c: 0007b383 ld x7,0(x15) + 80002240: 01738c63 beq x7,x23,80002258 + 80002244: 2d50546f jal x8,80007d18 + 80002248: 80002238 .word 0x80002238 + 8000224c: 00000000 .word 0x00000000 + 80002250: 80010d92 .word 0x80010d92 + 80002254: 00000000 .word 0x00000000 + 80002258: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000000000002 + 8000225c: 0008bb03 ld x22,0(x17) + 80002260: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80002264: 0008b283 ld x5,0(x17) + 80002268: 00888893 addi x17,x17,8 + +000000008000226c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + packh x2, x22, x5 # perform operation + 8000226c: 085b7133 packh x2,x22,x5 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002270: 0007b383 ld x7,0(x15) + 80002274: 00238c63 beq x7,x2,8000228c + 80002278: 2a10546f jal x8,80007d18 + 8000227c: 8000226c .word 0x8000226c + 80002280: 00000000 .word 0x00000000 + 80002284: 80010df3 .word 0x80010df3 + 80002288: 00000000 .word 0x00000000 + 8000228c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000000000002 + 80002290: 0008b583 ld x11,0(x17) + 80002294: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xffffffffffffffff + 80002298: 0008bb03 ld x22,0(x17) + 8000229c: 00888893 addi x17,x17,8 + +00000000800022a0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + packh x29, x11, x22 # perform operation + 800022a0: 0965feb3 packh x29,x11,x22 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a4: 0007b383 ld x7,0(x15) + 800022a8: 01d38c63 beq x7,x29,800022c0 + 800022ac: 26d0546f jal x8,80007d18 + 800022b0: 800022a0 .word 0x800022a0 + 800022b4: 00000000 .word 0x00000000 + 800022b8: 80010e54 .word 0x80010e54 + 800022bc: 00000000 .word 0x00000000 + 800022c0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x0000000000000002 + 800022c4: 0008bd03 ld x26,0(x17) + 800022c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0xfffffffffffffffe + 800022cc: 0008b903 ld x18,0(x17) + 800022d0: 00888893 addi x17,x17,8 + +00000000800022d4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + packh x10, x26, x18 # perform operation + 800022d4: 092d7533 packh x10,x26,x18 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d8: 0007b383 ld x7,0(x15) + 800022dc: 00a38c63 beq x7,x10,800022f4 + 800022e0: 2390546f jal x8,80007d18 + 800022e4: 800022d4 .word 0x800022d4 + 800022e8: 00000000 .word 0x00000000 + 800022ec: 80010eb5 .word 0x80010eb5 + 800022f0: 00000000 .word 0x00000000 + 800022f4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x0000000000000002 + 800022f8: 0008b683 ld x13,0(x17) + 800022fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80002300: 0008bf83 ld x31,0(x17) + 80002304: 00888893 addi x17,x17,8 + +0000000080002308 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + packh x19, x13, x31 # perform operation + 80002308: 09f6f9b3 packh x19,x13,x31 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 8000230c: 0007b383 ld x7,0(x15) + 80002310: 01338c63 beq x7,x19,80002328 + 80002314: 2050546f jal x8,80007d18 + 80002318: 80002308 .word 0x80002308 + 8000231c: 00000000 .word 0x00000000 + 80002320: 80010f16 .word 0x80010f16 + 80002324: 00000000 .word 0x00000000 + 80002328: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000000000002 + 8000232c: 0008b703 ld x14,0(x17) + 80002330: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80002334: 0008b303 ld x6,0(x17) + 80002338: 00888893 addi x17,x17,8 + +000000008000233c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + packh x30, x14, x6 # perform operation + 8000233c: 08677f33 packh x30,x14,x6 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002340: 0007b383 ld x7,0(x15) + 80002344: 01e38c63 beq x7,x30,8000235c + 80002348: 1d10546f jal x8,80007d18 + 8000234c: 8000233c .word 0x8000233c + 80002350: 00000000 .word 0x00000000 + 80002354: 80010f77 .word 0x80010f77 + 80002358: 00000000 .word 0x00000000 + 8000235c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000000000002 + 80002360: 0008b703 ld x14,0(x17) + 80002364: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5555555555555555 + 80002368: 0008ba83 ld x21,0(x17) + 8000236c: 00888893 addi x17,x17,8 + +0000000080002370 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + packh x3, x14, x21 # perform operation + 80002370: 095771b3 packh x3,x14,x21 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002374: 0007b383 ld x7,0(x15) + 80002378: 00338c63 beq x7,x3,80002390 + 8000237c: 19d0546f jal x8,80007d18 + 80002380: 80002370 .word 0x80002370 + 80002384: 00000000 .word 0x00000000 + 80002388: 80010fd8 .word 0x80010fd8 + 8000238c: 00000000 .word 0x00000000 + 80002390: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000002 + 80002394: 0008b603 ld x12,0(x17) + 80002398: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000ffffffff + 8000239c: 0008bc03 ld x24,0(x17) + 800023a0: 00888893 addi x17,x17,8 + +00000000800023a4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + packh x18, x12, x24 # perform operation + 800023a4: 09867933 packh x18,x12,x24 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a8: 0007b383 ld x7,0(x15) + 800023ac: 01238c63 beq x7,x18,800023c4 + 800023b0: 1690546f jal x8,80007d18 + 800023b4: 800023a4 .word 0x800023a4 + 800023b8: 00000000 .word 0x00000000 + 800023bc: 80011039 .word 0x80011039 + 800023c0: 00000000 .word 0x00000000 + 800023c4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000000000002 + 800023c8: 0008b903 ld x18,0(x17) + 800023cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x00000000fffffffe + 800023d0: 0008b583 ld x11,0(x17) + 800023d4: 00888893 addi x17,x17,8 + +00000000800023d8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + packh x2, x18, x11 # perform operation + 800023d8: 08b97133 packh x2,x18,x11 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023dc: 0007b383 ld x7,0(x15) + 800023e0: 00238c63 beq x7,x2,800023f8 + 800023e4: 1350546f jal x8,80007d18 + 800023e8: 800023d8 .word 0x800023d8 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 80011092 .word 0x80011092 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000000000002 + 800023fc: 0008bf83 ld x31,0(x17) + 80002400: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000100000000 + 80002404: 0008b283 ld x5,0(x17) + 80002408: 00888893 addi x17,x17,8 + +000000008000240c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + packh x23, x31, x5 # perform operation + 8000240c: 085ffbb3 packh x23,x31,x5 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002410: 0007b383 ld x7,0(x15) + 80002414: 01738c63 beq x7,x23,8000242c + 80002418: 1010546f jal x8,80007d18 + 8000241c: 8000240c .word 0x8000240c + 80002420: 00000000 .word 0x00000000 + 80002424: 800110eb .word 0x800110eb + 80002428: 00000000 .word 0x00000000 + 8000242c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x0000000000000002 + 80002430: 0008b303 ld x6,0(x17) + 80002434: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x0000000100000001 + 80002438: 0008bc03 ld x24,0(x17) + 8000243c: 00888893 addi x17,x17,8 + +0000000080002440 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + packh x5, x6, x24 # perform operation + 80002440: 098372b3 packh x5,x6,x24 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002444: 0007b383 ld x7,0(x15) + 80002448: 00538c63 beq x7,x5,80002460 + 8000244c: 0cd0546f jal x8,80007d18 + 80002450: 80002440 .word 0x80002440 + 80002454: 00000000 .word 0x00000000 + 80002458: 80011145 .word 0x80011145 + 8000245c: 00000000 .word 0x00000000 + 80002460: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000000 + 80002464: 0008bc83 ld x25,0(x17) + 80002468: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000000000000 + 8000246c: 0008bf03 ld x30,0(x17) + 80002470: 00888893 addi x17,x17,8 + +0000000080002474 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + packh x18, x25, x30 # perform operation + 80002474: 09ecf933 packh x18,x25,x30 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002478: 0007b383 ld x7,0(x15) + 8000247c: 01238c63 beq x7,x18,80002494 + 80002480: 0990546f jal x8,80007d18 + 80002484: 80002474 .word 0x80002474 + 80002488: 00000000 .word 0x00000000 + 8000248c: 8001119f .word 0x8001119f + 80002490: 00000000 .word 0x00000000 + 80002494: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x8000000000000000 + 80002498: 0008b203 ld x4,0(x17) + 8000249c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0000000000000001 + 800024a0: 0008b483 ld x9,0(x17) + 800024a4: 00888893 addi x17,x17,8 + +00000000800024a8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + packh x12, x4, x9 # perform operation + 800024a8: 08927633 packh x12,x4,x9 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024ac: 0007b383 ld x7,0(x15) + 800024b0: 00c38c63 beq x7,x12,800024c8 + 800024b4: 0650546f jal x8,80007d18 + 800024b8: 800024a8 .word 0x800024a8 + 800024bc: 00000000 .word 0x00000000 + 800024c0: 80011200 .word 0x80011200 + 800024c4: 00000000 .word 0x00000000 + 800024c8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x8000000000000000 + 800024cc: 0008b083 ld x1,0(x17) + 800024d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000002 + 800024d4: 0008ba03 ld x20,0(x17) + 800024d8: 00888893 addi x17,x17,8 + +00000000800024dc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + packh x24, x1, x20 # perform operation + 800024dc: 0940fc33 packh x24,x1,x20 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e0: 0007b383 ld x7,0(x15) + 800024e4: 01838c63 beq x7,x24,800024fc + 800024e8: 0310546f jal x8,80007d18 + 800024ec: 800024dc .word 0x800024dc + 800024f0: 00000000 .word 0x00000000 + 800024f4: 80011261 .word 0x80011261 + 800024f8: 00000000 .word 0x00000000 + 800024fc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x8000000000000000 + 80002500: 0008b683 ld x13,0(x17) + 80002504: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8000000000000000 + 80002508: 0008bb03 ld x22,0(x17) + 8000250c: 00888893 addi x17,x17,8 + +0000000080002510 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + packh x20, x13, x22 # perform operation + 80002510: 0966fa33 packh x20,x13,x22 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002514: 0007b383 ld x7,0(x15) + 80002518: 01438c63 beq x7,x20,80002530 + 8000251c: 7fc0546f jal x8,80007d18 + 80002520: 80002510 .word 0x80002510 + 80002524: 00000000 .word 0x00000000 + 80002528: 800112c2 .word 0x800112c2 + 8000252c: 00000000 .word 0x00000000 + 80002530: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8000000000000000 + 80002534: 0008be03 ld x28,0(x17) + 80002538: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x8000000000000001 + 8000253c: 0008b983 ld x19,0(x17) + 80002540: 00888893 addi x17,x17,8 + +0000000080002544 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + packh x21, x28, x19 # perform operation + 80002544: 093e7ab3 packh x21,x28,x19 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002548: 0007b383 ld x7,0(x15) + 8000254c: 01538c63 beq x7,x21,80002564 + 80002550: 7c80546f jal x8,80007d18 + 80002554: 80002544 .word 0x80002544 + 80002558: 00000000 .word 0x00000000 + 8000255c: 80011332 .word 0x80011332 + 80002560: 00000000 .word 0x00000000 + 80002564: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8000000000000000 + 80002568: 0008be03 ld x28,0(x17) + 8000256c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x7fffffffffffffff + 80002570: 0008bb83 ld x23,0(x17) + 80002574: 00888893 addi x17,x17,8 + +0000000080002578 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + packh x3, x28, x23 # perform operation + 80002578: 097e71b3 packh x3,x28,x23 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 8000257c: 0007b383 ld x7,0(x15) + 80002580: 00338c63 beq x7,x3,80002598 + 80002584: 7940546f jal x8,80007d18 + 80002588: 80002578 .word 0x80002578 + 8000258c: 00000000 .word 0x00000000 + 80002590: 800113a2 .word 0x800113a2 + 80002594: 00000000 .word 0x00000000 + 80002598: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000000 + 8000259c: 0008be83 ld x29,0(x17) + 800025a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800025a4: 0008b683 ld x13,0(x17) + 800025a8: 00888893 addi x17,x17,8 + +00000000800025ac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + packh x25, x29, x13 # perform operation + 800025ac: 08defcb3 packh x25,x29,x13 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b0: 0007b383 ld x7,0(x15) + 800025b4: 01938c63 beq x7,x25,800025cc + 800025b8: 7600546f jal x8,80007d18 + 800025bc: 800025ac .word 0x800025ac + 800025c0: 00000000 .word 0x00000000 + 800025c4: 80011412 .word 0x80011412 + 800025c8: 00000000 .word 0x00000000 + 800025cc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x8000000000000000 + 800025d0: 0008bb83 ld x23,0(x17) + 800025d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xffffffffffffffff + 800025d8: 0008bd83 ld x27,0(x17) + 800025dc: 00888893 addi x17,x17,8 + +00000000800025e0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + packh x10, x23, x27 # perform operation + 800025e0: 09bbf533 packh x10,x23,x27 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e4: 0007b383 ld x7,0(x15) + 800025e8: 00a38c63 beq x7,x10,80002600 + 800025ec: 72c0546f jal x8,80007d18 + 800025f0: 800025e0 .word 0x800025e0 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 80011482 .word 0x80011482 + 800025fc: 00000000 .word 0x00000000 + 80002600: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x8000000000000000 + 80002604: 0008bd83 ld x27,0(x17) + 80002608: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xfffffffffffffffe + 8000260c: 0008b303 ld x6,0(x17) + 80002610: 00888893 addi x17,x17,8 + +0000000080002614 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + packh x5, x27, x6 # perform operation + 80002614: 086df2b3 packh x5,x27,x6 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002618: 0007b383 ld x7,0(x15) + 8000261c: 00538c63 beq x7,x5,80002634 + 80002620: 6f80546f jal x8,80007d18 + 80002624: 80002614 .word 0x80002614 + 80002628: 00000000 .word 0x00000000 + 8000262c: 800114f2 .word 0x800114f2 + 80002630: 00000000 .word 0x00000000 + 80002634: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x8000000000000000 + 80002638: 0008b703 ld x14,0(x17) + 8000263c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x5bbc887763ae86f2 + 80002640: 0008b283 ld x5,0(x17) + 80002644: 00888893 addi x17,x17,8 + +0000000080002648 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + packh x19, x14, x5 # perform operation + 80002648: 085779b3 packh x19,x14,x5 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 8000264c: 0007b383 ld x7,0(x15) + 80002650: 01338c63 beq x7,x19,80002668 + 80002654: 6c40546f jal x8,80007d18 + 80002658: 80002648 .word 0x80002648 + 8000265c: 00000000 .word 0x00000000 + 80002660: 80011562 .word 0x80011562 + 80002664: 00000000 .word 0x00000000 + 80002668: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x8000000000000000 + 8000266c: 0008bc03 ld x24,0(x17) + 80002670: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xaaaaaaaaaaaaaaaa + 80002674: 0008b283 ld x5,0(x17) + 80002678: 00888893 addi x17,x17,8 + +000000008000267c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + packh x12, x24, x5 # perform operation + 8000267c: 085c7633 packh x12,x24,x5 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002680: 0007b383 ld x7,0(x15) + 80002684: 00c38c63 beq x7,x12,8000269c + 80002688: 6900546f jal x8,80007d18 + 8000268c: 8000267c .word 0x8000267c + 80002690: 00000000 .word 0x00000000 + 80002694: 800115d2 .word 0x800115d2 + 80002698: 00000000 .word 0x00000000 + 8000269c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x8000000000000000 + 800026a0: 0008b183 ld x3,0(x17) + 800026a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x5555555555555555 + 800026a8: 0008b103 ld x2,0(x17) + 800026ac: 00888893 addi x17,x17,8 + +00000000800026b0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + packh x29, x3, x2 # perform operation + 800026b0: 0821feb3 packh x29,x3,x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b4: 0007b383 ld x7,0(x15) + 800026b8: 01d38c63 beq x7,x29,800026d0 + 800026bc: 65c0546f jal x8,80007d18 + 800026c0: 800026b0 .word 0x800026b0 + 800026c4: 00000000 .word 0x00000000 + 800026c8: 80011642 .word 0x80011642 + 800026cc: 00000000 .word 0x00000000 + 800026d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x8000000000000000 + 800026d4: 0008b303 ld x6,0(x17) + 800026d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x00000000ffffffff + 800026dc: 0008b803 ld x16,0(x17) + 800026e0: 00888893 addi x17,x17,8 + +00000000800026e4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + packh x2, x6, x16 # perform operation + 800026e4: 09037133 packh x2,x6,x16 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e8: 0007b383 ld x7,0(x15) + 800026ec: 00238c63 beq x7,x2,80002704 + 800026f0: 6280546f jal x8,80007d18 + 800026f4: 800026e4 .word 0x800026e4 + 800026f8: 00000000 .word 0x00000000 + 800026fc: 800116b2 .word 0x800116b2 + 80002700: 00000000 .word 0x00000000 + 80002704: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x8000000000000000 + 80002708: 0008bd03 ld x26,0(x17) + 8000270c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x00000000fffffffe + 80002710: 0008be03 ld x28,0(x17) + 80002714: 00888893 addi x17,x17,8 + +0000000080002718 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + packh x20, x26, x28 # perform operation + 80002718: 09cd7a33 packh x20,x26,x28 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 8000271c: 0007b383 ld x7,0(x15) + 80002720: 01438c63 beq x7,x20,80002738 + 80002724: 5f40546f jal x8,80007d18 + 80002728: 80002718 .word 0x80002718 + 8000272c: 00000000 .word 0x00000000 + 80002730: 8001171a .word 0x8001171a + 80002734: 00000000 .word 0x00000000 + 80002738: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x8000000000000000 + 8000273c: 0008b703 ld x14,0(x17) + 80002740: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000100000000 + 80002744: 0008bf03 ld x30,0(x17) + 80002748: 00888893 addi x17,x17,8 + +000000008000274c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + packh x22, x14, x30 # perform operation + 8000274c: 09e77b33 packh x22,x14,x30 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002750: 0007b383 ld x7,0(x15) + 80002754: 01638c63 beq x7,x22,8000276c + 80002758: 5c00546f jal x8,80007d18 + 8000275c: 8000274c .word 0x8000274c + 80002760: 00000000 .word 0x00000000 + 80002764: 80011782 .word 0x80011782 + 80002768: 00000000 .word 0x00000000 + 8000276c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x8000000000000000 + 80002770: 0008b683 ld x13,0(x17) + 80002774: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x0000000100000001 + 80002778: 0008b503 ld x10,0(x17) + 8000277c: 00888893 addi x17,x17,8 + +0000000080002780 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + packh x18, x13, x10 # perform operation + 80002780: 08a6f933 packh x18,x13,x10 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002784: 0007b383 ld x7,0(x15) + 80002788: 01238c63 beq x7,x18,800027a0 + 8000278c: 58c0546f jal x8,80007d18 + 80002790: 80002780 .word 0x80002780 + 80002794: 00000000 .word 0x00000000 + 80002798: 800117eb .word 0x800117eb + 8000279c: 00000000 .word 0x00000000 + 800027a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x8000000000000001 + 800027a4: 0008b483 ld x9,0(x17) + 800027a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000000 + 800027ac: 0008be03 ld x28,0(x17) + 800027b0: 00888893 addi x17,x17,8 + +00000000800027b4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + packh x6, x9, x28 # perform operation + 800027b4: 09c4f333 packh x6,x9,x28 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b8: 0007b383 ld x7,0(x15) + 800027bc: 00638c63 beq x7,x6,800027d4 + 800027c0: 5580546f jal x8,80007d18 + 800027c4: 800027b4 .word 0x800027b4 + 800027c8: 00000000 .word 0x00000000 + 800027cc: 80011854 .word 0x80011854 + 800027d0: 00000000 .word 0x00000000 + 800027d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x8000000000000001 + 800027d8: 0008b683 ld x13,0(x17) + 800027dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000001 + 800027e0: 0008ba03 ld x20,0(x17) + 800027e4: 00888893 addi x17,x17,8 + +00000000800027e8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + packh x3, x13, x20 # perform operation + 800027e8: 0946f1b3 packh x3,x13,x20 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027ec: 0007b383 ld x7,0(x15) + 800027f0: 00338c63 beq x7,x3,80002808 + 800027f4: 5240546f jal x8,80007d18 + 800027f8: 800027e8 .word 0x800027e8 + 800027fc: 00000000 .word 0x00000000 + 80002800: 800118b5 .word 0x800118b5 + 80002804: 00000000 .word 0x00000000 + 80002808: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000001 + 8000280c: 0008bc83 ld x25,0(x17) + 80002810: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000002 + 80002814: 0008be83 ld x29,0(x17) + 80002818: 00888893 addi x17,x17,8 + +000000008000281c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + packh x11, x25, x29 # perform operation + 8000281c: 09dcf5b3 packh x11,x25,x29 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002820: 0007b383 ld x7,0(x15) + 80002824: 00b38c63 beq x7,x11,8000283c + 80002828: 4f00546f jal x8,80007d18 + 8000282c: 8000281c .word 0x8000281c + 80002830: 00000000 .word 0x00000000 + 80002834: 80011916 .word 0x80011916 + 80002838: 00000000 .word 0x00000000 + 8000283c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x8000000000000001 + 80002840: 0008bf03 ld x30,0(x17) + 80002844: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x8000000000000000 + 80002848: 0008b503 ld x10,0(x17) + 8000284c: 00888893 addi x17,x17,8 + +0000000080002850 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + packh x16, x30, x10 # perform operation + 80002850: 08af7833 packh x16,x30,x10 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002854: 0007b383 ld x7,0(x15) + 80002858: 01038c63 beq x7,x16,80002870 + 8000285c: 4bc0546f jal x8,80007d18 + 80002860: 80002850 .word 0x80002850 + 80002864: 00000000 .word 0x00000000 + 80002868: 80011977 .word 0x80011977 + 8000286c: 00000000 .word 0x00000000 + 80002870: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000001 + 80002874: 0008bc83 ld x25,0(x17) + 80002878: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x8000000000000001 + 8000287c: 0008b103 ld x2,0(x17) + 80002880: 00888893 addi x17,x17,8 + +0000000080002884 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + packh x26, x25, x2 # perform operation + 80002884: 082cfd33 packh x26,x25,x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002888: 0007b383 ld x7,0(x15) + 8000288c: 01a38c63 beq x7,x26,800028a4 + 80002890: 4880546f jal x8,80007d18 + 80002894: 80002884 .word 0x80002884 + 80002898: 00000000 .word 0x00000000 + 8000289c: 800119e7 .word 0x800119e7 + 800028a0: 00000000 .word 0x00000000 + 800028a4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x8000000000000001 + 800028a8: 0008b703 ld x14,0(x17) + 800028ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x7fffffffffffffff + 800028b0: 0008b283 ld x5,0(x17) + 800028b4: 00888893 addi x17,x17,8 + +00000000800028b8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + packh x1, x14, x5 # perform operation + 800028b8: 085770b3 packh x1,x14,x5 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028bc: 0007b383 ld x7,0(x15) + 800028c0: 00138c63 beq x7,x1,800028d8 + 800028c4: 4540546f jal x8,80007d18 + 800028c8: 800028b8 .word 0x800028b8 + 800028cc: 00000000 .word 0x00000000 + 800028d0: 80011a57 .word 0x80011a57 + 800028d4: 00000000 .word 0x00000000 + 800028d8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x8000000000000001 + 800028dc: 0008b603 ld x12,0(x17) + 800028e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x7ffffffffffffffe + 800028e4: 0008b303 ld x6,0(x17) + 800028e8: 00888893 addi x17,x17,8 + +00000000800028ec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + packh x23, x12, x6 # perform operation + 800028ec: 08667bb3 packh x23,x12,x6 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f0: 0007b383 ld x7,0(x15) + 800028f4: 01738c63 beq x7,x23,8000290c + 800028f8: 4200546f jal x8,80007d18 + 800028fc: 800028ec .word 0x800028ec + 80002900: 00000000 .word 0x00000000 + 80002904: 80011ac7 .word 0x80011ac7 + 80002908: 00000000 .word 0x00000000 + 8000290c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x8000000000000001 + 80002910: 0008b203 ld x4,0(x17) + 80002914: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0xffffffffffffffff + 80002918: 0008bf03 ld x30,0(x17) + 8000291c: 00888893 addi x17,x17,8 + +0000000080002920 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + packh x3, x4, x30 # perform operation + 80002920: 09e271b3 packh x3,x4,x30 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002924: 0007b383 ld x7,0(x15) + 80002928: 00338c63 beq x7,x3,80002940 + 8000292c: 3ec0546f jal x8,80007d18 + 80002930: 80002920 .word 0x80002920 + 80002934: 00000000 .word 0x00000000 + 80002938: 80011b37 .word 0x80011b37 + 8000293c: 00000000 .word 0x00000000 + 80002940: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000001 + 80002944: 0008bc83 ld x25,0(x17) + 80002948: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0xfffffffffffffffe + 8000294c: 0008b903 ld x18,0(x17) + 80002950: 00888893 addi x17,x17,8 + +0000000080002954 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + packh x28, x25, x18 # perform operation + 80002954: 092cfe33 packh x28,x25,x18 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002958: 0007b383 ld x7,0(x15) + 8000295c: 01c38c63 beq x7,x28,80002974 + 80002960: 3b80546f jal x8,80007d18 + 80002964: 80002954 .word 0x80002954 + 80002968: 00000000 .word 0x00000000 + 8000296c: 80011ba7 .word 0x80011ba7 + 80002970: 00000000 .word 0x00000000 + 80002974: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000001 + 80002978: 0008bc83 ld x25,0(x17) + 8000297c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x5bbc887763ae86f2 + 80002980: 0008b083 ld x1,0(x17) + 80002984: 00888893 addi x17,x17,8 + +0000000080002988 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + packh x18, x25, x1 # perform operation + 80002988: 081cf933 packh x18,x25,x1 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 8000298c: 0007b383 ld x7,0(x15) + 80002990: 01238c63 beq x7,x18,800029a8 + 80002994: 3840546f jal x8,80007d18 + 80002998: 80002988 .word 0x80002988 + 8000299c: 00000000 .word 0x00000000 + 800029a0: 80011c17 .word 0x80011c17 + 800029a4: 00000000 .word 0x00000000 + 800029a8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x8000000000000001 + 800029ac: 0008ba83 ld x21,0(x17) + 800029b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 800029b4: 0008b083 ld x1,0(x17) + 800029b8: 00888893 addi x17,x17,8 + +00000000800029bc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + packh x27, x21, x1 # perform operation + 800029bc: 081afdb3 packh x27,x21,x1 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c0: 0007b383 ld x7,0(x15) + 800029c4: 01b38c63 beq x7,x27,800029dc + 800029c8: 3500546f jal x8,80007d18 + 800029cc: 800029bc .word 0x800029bc + 800029d0: 00000000 .word 0x00000000 + 800029d4: 80011c87 .word 0x80011c87 + 800029d8: 00000000 .word 0x00000000 + 800029dc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000001 + 800029e0: 0008be83 ld x29,0(x17) + 800029e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x5555555555555555 + 800029e8: 0008b983 ld x19,0(x17) + 800029ec: 00888893 addi x17,x17,8 + +00000000800029f0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + packh x22, x29, x19 # perform operation + 800029f0: 093efb33 packh x22,x29,x19 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f4: 0007b383 ld x7,0(x15) + 800029f8: 01638c63 beq x7,x22,80002a10 + 800029fc: 31c0546f jal x8,80007d18 + 80002a00: 800029f0 .word 0x800029f0 + 80002a04: 00000000 .word 0x00000000 + 80002a08: 80011cf7 .word 0x80011cf7 + 80002a0c: 00000000 .word 0x00000000 + 80002a10: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x8000000000000001 + 80002a14: 0008ba03 ld x20,0(x17) + 80002a18: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x00000000ffffffff + 80002a1c: 0008bf83 ld x31,0(x17) + 80002a20: 00888893 addi x17,x17,8 + +0000000080002a24 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + packh x26, x20, x31 # perform operation + 80002a24: 09fa7d33 packh x26,x20,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a28: 0007b383 ld x7,0(x15) + 80002a2c: 01a38c63 beq x7,x26,80002a44 + 80002a30: 2e80546f jal x8,80007d18 + 80002a34: 80002a24 .word 0x80002a24 + 80002a38: 00000000 .word 0x00000000 + 80002a3c: 80011d67 .word 0x80011d67 + 80002a40: 00000000 .word 0x00000000 + 80002a44: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000001 + 80002a48: 0008be83 ld x29,0(x17) + 80002a4c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000fffffffe + 80002a50: 0008bc03 ld x24,0(x17) + 80002a54: 00888893 addi x17,x17,8 + +0000000080002a58 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + packh x11, x29, x24 # perform operation + 80002a58: 098ef5b3 packh x11,x29,x24 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a5c: 0007b383 ld x7,0(x15) + 80002a60: 00b38c63 beq x7,x11,80002a78 + 80002a64: 2b40546f jal x8,80007d18 + 80002a68: 80002a58 .word 0x80002a58 + 80002a6c: 00000000 .word 0x00000000 + 80002a70: 80011dcf .word 0x80011dcf + 80002a74: 00000000 .word 0x00000000 + 80002a78: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x8000000000000001 + 80002a7c: 0008bb83 ld x23,0(x17) + 80002a80: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000100000000 + 80002a84: 0008bb03 ld x22,0(x17) + 80002a88: 00888893 addi x17,x17,8 + +0000000080002a8c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + packh x20, x23, x22 # perform operation + 80002a8c: 096bfa33 packh x20,x23,x22 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a90: 0007b383 ld x7,0(x15) + 80002a94: 01438c63 beq x7,x20,80002aac + 80002a98: 2800546f jal x8,80007d18 + 80002a9c: 80002a8c .word 0x80002a8c + 80002aa0: 00000000 .word 0x00000000 + 80002aa4: 80011e37 .word 0x80011e37 + 80002aa8: 00000000 .word 0x00000000 + 80002aac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000001 + 80002ab0: 0008be83 ld x29,0(x17) + 80002ab4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0000000100000001 + 80002ab8: 0008b483 ld x9,0(x17) + 80002abc: 00888893 addi x17,x17,8 + +0000000080002ac0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + packh x4, x29, x9 # perform operation + 80002ac0: 089ef233 packh x4,x29,x9 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac4: 0007b383 ld x7,0(x15) + 80002ac8: 00438c63 beq x7,x4,80002ae0 + 80002acc: 24c0546f jal x8,80007d18 + 80002ad0: 80002ac0 .word 0x80002ac0 + 80002ad4: 00000000 .word 0x00000000 + 80002ad8: 80011ea0 .word 0x80011ea0 + 80002adc: 00000000 .word 0x00000000 + 80002ae0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002ae4: 0008bc83 ld x25,0(x17) + 80002ae8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000000000000 + 80002aec: 0008bb03 ld x22,0(x17) + 80002af0: 00888893 addi x17,x17,8 + +0000000080002af4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + packh x6, x25, x22 # perform operation + 80002af4: 096cf333 packh x6,x25,x22 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af8: 0007b383 ld x7,0(x15) + 80002afc: 00638c63 beq x7,x6,80002b14 + 80002b00: 2180546f jal x8,80007d18 + 80002b04: 80002af4 .word 0x80002af4 + 80002b08: 00000000 .word 0x00000000 + 80002b0c: 80011f09 .word 0x80011f09 + 80002b10: 00000000 .word 0x00000000 + 80002b14: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002b18: 0008bc83 ld x25,0(x17) + 80002b1c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000000000001 + 80002b20: 0008bb03 ld x22,0(x17) + 80002b24: 00888893 addi x17,x17,8 + +0000000080002b28 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + packh x19, x25, x22 # perform operation + 80002b28: 096cf9b3 packh x19,x25,x22 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b2c: 0007b383 ld x7,0(x15) + 80002b30: 01338c63 beq x7,x19,80002b48 + 80002b34: 1e40546f jal x8,80007d18 + 80002b38: 80002b28 .word 0x80002b28 + 80002b3c: 00000000 .word 0x00000000 + 80002b40: 80011f6a .word 0x80011f6a + 80002b44: 00000000 .word 0x00000000 + 80002b48: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002b4c: 0008b983 ld x19,0(x17) + 80002b50: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x0000000000000002 + 80002b54: 0008b203 ld x4,0(x17) + 80002b58: 00888893 addi x17,x17,8 + +0000000080002b5c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + packh x1, x19, x4 # perform operation + 80002b5c: 0849f0b3 packh x1,x19,x4 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b60: 0007b383 ld x7,0(x15) + 80002b64: 00138c63 beq x7,x1,80002b7c + 80002b68: 1b00546f jal x8,80007d18 + 80002b6c: 80002b5c .word 0x80002b5c + 80002b70: 00000000 .word 0x00000000 + 80002b74: 80011fcb .word 0x80011fcb + 80002b78: 00000000 .word 0x00000000 + 80002b7c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002b80: 0008ba83 ld x21,0(x17) + 80002b84: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000000 + 80002b88: 0008b803 ld x16,0(x17) + 80002b8c: 00888893 addi x17,x17,8 + +0000000080002b90 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + packh x13, x21, x16 # perform operation + 80002b90: 090af6b3 packh x13,x21,x16 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b94: 0007b383 ld x7,0(x15) + 80002b98: 00d38c63 beq x7,x13,80002bb0 + 80002b9c: 17c0546f jal x8,80007d18 + 80002ba0: 80002b90 .word 0x80002b90 + 80002ba4: 00000000 .word 0x00000000 + 80002ba8: 8001202c .word 0x8001202c + 80002bac: 00000000 .word 0x00000000 + 80002bb0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002bb4: 0008ba03 ld x20,0(x17) + 80002bb8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8000000000000001 + 80002bbc: 0008bb03 ld x22,0(x17) + 80002bc0: 00888893 addi x17,x17,8 + +0000000080002bc4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + packh x12, x20, x22 # perform operation + 80002bc4: 096a7633 packh x12,x20,x22 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc8: 0007b383 ld x7,0(x15) + 80002bcc: 00c38c63 beq x7,x12,80002be4 + 80002bd0: 1480546f jal x8,80007d18 + 80002bd4: 80002bc4 .word 0x80002bc4 + 80002bd8: 00000000 .word 0x00000000 + 80002bdc: 8001209c .word 0x8001209c + 80002be0: 00000000 .word 0x00000000 + 80002be4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002be8: 0008b683 ld x13,0(x17) + 80002bec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x7fffffffffffffff + 80002bf0: 0008b083 ld x1,0(x17) + 80002bf4: 00888893 addi x17,x17,8 + +0000000080002bf8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + packh x2, x13, x1 # perform operation + 80002bf8: 0816f133 packh x2,x13,x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bfc: 0007b383 ld x7,0(x15) + 80002c00: 00238c63 beq x7,x2,80002c18 + 80002c04: 1140546f jal x8,80007d18 + 80002c08: 80002bf8 .word 0x80002bf8 + 80002c0c: 00000000 .word 0x00000000 + 80002c10: 8001210c .word 0x8001210c + 80002c14: 00000000 .word 0x00000000 + 80002c18: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002c1c: 0008b603 ld x12,0(x17) + 80002c20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80002c24: 0008b583 ld x11,0(x17) + 80002c28: 00888893 addi x17,x17,8 + +0000000080002c2c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + packh x22, x12, x11 # perform operation + 80002c2c: 08b67b33 packh x22,x12,x11 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c30: 0007b383 ld x7,0(x15) + 80002c34: 01638c63 beq x7,x22,80002c4c + 80002c38: 0e00546f jal x8,80007d18 + 80002c3c: 80002c2c .word 0x80002c2c + 80002c40: 00000000 .word 0x00000000 + 80002c44: 8001217c .word 0x8001217c + 80002c48: 00000000 .word 0x00000000 + 80002c4c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002c50: 0008b103 ld x2,0(x17) + 80002c54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xffffffffffffffff + 80002c58: 0008bc03 ld x24,0(x17) + 80002c5c: 00888893 addi x17,x17,8 + +0000000080002c60 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + packh x16, x2, x24 # perform operation + 80002c60: 09817833 packh x16,x2,x24 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c64: 0007b383 ld x7,0(x15) + 80002c68: 01038c63 beq x7,x16,80002c80 + 80002c6c: 0ac0546f jal x8,80007d18 + 80002c70: 80002c60 .word 0x80002c60 + 80002c74: 00000000 .word 0x00000000 + 80002c78: 800121ec .word 0x800121ec + 80002c7c: 00000000 .word 0x00000000 + 80002c80: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002c84: 0008b183 ld x3,0(x17) + 80002c88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xfffffffffffffffe + 80002c8c: 0008bc03 ld x24,0(x17) + 80002c90: 00888893 addi x17,x17,8 + +0000000080002c94 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + packh x23, x3, x24 # perform operation + 80002c94: 0981fbb3 packh x23,x3,x24 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c98: 0007b383 ld x7,0(x15) + 80002c9c: 01738c63 beq x7,x23,80002cb4 + 80002ca0: 0780546f jal x8,80007d18 + 80002ca4: 80002c94 .word 0x80002c94 + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 8001225c .word 0x8001225c + 80002cb0: 00000000 .word 0x00000000 + 80002cb4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002cb8: 0008b603 ld x12,0(x17) + 80002cbc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80002cc0: 0008b903 ld x18,0(x17) + 80002cc4: 00888893 addi x17,x17,8 + +0000000080002cc8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + packh x28, x12, x18 # perform operation + 80002cc8: 09267e33 packh x28,x12,x18 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002ccc: 0007b383 ld x7,0(x15) + 80002cd0: 01c38c63 beq x7,x28,80002ce8 + 80002cd4: 0440546f jal x8,80007d18 + 80002cd8: 80002cc8 .word 0x80002cc8 + 80002cdc: 00000000 .word 0x00000000 + 80002ce0: 800122cc .word 0x800122cc + 80002ce4: 00000000 .word 0x00000000 + 80002ce8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002cec: 0008bc83 ld x25,0(x17) + 80002cf0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80002cf4: 0008b303 ld x6,0(x17) + 80002cf8: 00888893 addi x17,x17,8 + +0000000080002cfc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + packh x16, x25, x6 # perform operation + 80002cfc: 086cf833 packh x16,x25,x6 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d00: 0007b383 ld x7,0(x15) + 80002d04: 01038c63 beq x7,x16,80002d1c + 80002d08: 0100546f jal x8,80007d18 + 80002d0c: 80002cfc .word 0x80002cfc + 80002d10: 00000000 .word 0x00000000 + 80002d14: 8001233c .word 0x8001233c + 80002d18: 00000000 .word 0x00000000 + 80002d1c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002d20: 0008b103 ld x2,0(x17) + 80002d24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x5555555555555555 + 80002d28: 0008b583 ld x11,0(x17) + 80002d2c: 00888893 addi x17,x17,8 + +0000000080002d30 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + packh x10, x2, x11 # perform operation + 80002d30: 08b17533 packh x10,x2,x11 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d34: 0007b383 ld x7,0(x15) + 80002d38: 00a38c63 beq x7,x10,80002d50 + 80002d3c: 7dd0446f jal x8,80007d18 + 80002d40: 80002d30 .word 0x80002d30 + 80002d44: 00000000 .word 0x00000000 + 80002d48: 800123ac .word 0x800123ac + 80002d4c: 00000000 .word 0x00000000 + 80002d50: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d54: 0008bf83 ld x31,0(x17) + 80002d58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x00000000ffffffff + 80002d5c: 0008b283 ld x5,0(x17) + 80002d60: 00888893 addi x17,x17,8 + +0000000080002d64 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + packh x23, x31, x5 # perform operation + 80002d64: 085ffbb3 packh x23,x31,x5 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d68: 0007b383 ld x7,0(x15) + 80002d6c: 01738c63 beq x7,x23,80002d84 + 80002d70: 7a90446f jal x8,80007d18 + 80002d74: 80002d64 .word 0x80002d64 + 80002d78: 00000000 .word 0x00000000 + 80002d7c: 8001241c .word 0x8001241c + 80002d80: 00000000 .word 0x00000000 + 80002d84: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002d88: 0008be03 ld x28,0(x17) + 80002d8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x00000000fffffffe + 80002d90: 0008b183 ld x3,0(x17) + 80002d94: 00888893 addi x17,x17,8 + +0000000080002d98 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + packh x13, x28, x3 # perform operation + 80002d98: 083e76b3 packh x13,x28,x3 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d9c: 0007b383 ld x7,0(x15) + 80002da0: 00d38c63 beq x7,x13,80002db8 + 80002da4: 7750446f jal x8,80007d18 + 80002da8: 80002d98 .word 0x80002d98 + 80002dac: 00000000 .word 0x00000000 + 80002db0: 80012484 .word 0x80012484 + 80002db4: 00000000 .word 0x00000000 + 80002db8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002dbc: 0008bf83 ld x31,0(x17) + 80002dc0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000100000000 + 80002dc4: 0008ba03 ld x20,0(x17) + 80002dc8: 00888893 addi x17,x17,8 + +0000000080002dcc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + packh x4, x31, x20 # perform operation + 80002dcc: 094ff233 packh x4,x31,x20 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd0: 0007b383 ld x7,0(x15) + 80002dd4: 00438c63 beq x7,x4,80002dec + 80002dd8: 7410446f jal x8,80007d18 + 80002ddc: 80002dcc .word 0x80002dcc + 80002de0: 00000000 .word 0x00000000 + 80002de4: 800124ec .word 0x800124ec + 80002de8: 00000000 .word 0x00000000 + 80002dec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002df0: 0008ba03 ld x20,0(x17) + 80002df4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000100000001 + 80002df8: 0008b283 ld x5,0(x17) + 80002dfc: 00888893 addi x17,x17,8 + +0000000080002e00 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + packh x12, x20, x5 # perform operation + 80002e00: 085a7633 packh x12,x20,x5 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e04: 0007b383 ld x7,0(x15) + 80002e08: 00c38c63 beq x7,x12,80002e20 + 80002e0c: 70d0446f jal x8,80007d18 + 80002e10: 80002e00 .word 0x80002e00 + 80002e14: 00000000 .word 0x00000000 + 80002e18: 80012555 .word 0x80012555 + 80002e1c: 00000000 .word 0x00000000 + 80002e20: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002e24: 0008b583 ld x11,0(x17) + 80002e28: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000000000000 + 80002e2c: 0008b283 ld x5,0(x17) + 80002e30: 00888893 addi x17,x17,8 + +0000000080002e34 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + packh x22, x11, x5 # perform operation + 80002e34: 0855fb33 packh x22,x11,x5 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e38: 0007b383 ld x7,0(x15) + 80002e3c: 01638c63 beq x7,x22,80002e54 + 80002e40: 6d90446f jal x8,80007d18 + 80002e44: 80002e34 .word 0x80002e34 + 80002e48: 00000000 .word 0x00000000 + 80002e4c: 800125be .word 0x800125be + 80002e50: 00000000 .word 0x00000000 + 80002e54: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80002e58: 0008b083 ld x1,0(x17) + 80002e5c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0000000000000001 + 80002e60: 0008bb83 ld x23,0(x17) + 80002e64: 00888893 addi x17,x17,8 + +0000000080002e68 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + packh x9, x1, x23 # perform operation + 80002e68: 0970f4b3 packh x9,x1,x23 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e6c: 0007b383 ld x7,0(x15) + 80002e70: 00938c63 beq x7,x9,80002e88 + 80002e74: 6a50446f jal x8,80007d18 + 80002e78: 80002e68 .word 0x80002e68 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 8001261f .word 0x8001261f + 80002e84: 00000000 .word 0x00000000 + 80002e88: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002e8c: 0008bd03 ld x26,0(x17) + 80002e90: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000002 + 80002e94: 0008be03 ld x28,0(x17) + 80002e98: 00888893 addi x17,x17,8 + +0000000080002e9c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + packh x14, x26, x28 # perform operation + 80002e9c: 09cd7733 packh x14,x26,x28 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea0: 0007b383 ld x7,0(x15) + 80002ea4: 00e38c63 beq x7,x14,80002ebc + 80002ea8: 6710446f jal x8,80007d18 + 80002eac: 80002e9c .word 0x80002e9c + 80002eb0: 00000000 .word 0x00000000 + 80002eb4: 80012680 .word 0x80012680 + 80002eb8: 00000000 .word 0x00000000 + 80002ebc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80002ec0: 0008ba83 ld x21,0(x17) + 80002ec4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x8000000000000000 + 80002ec8: 0008b203 ld x4,0(x17) + 80002ecc: 00888893 addi x17,x17,8 + +0000000080002ed0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + packh x11, x21, x4 # perform operation + 80002ed0: 084af5b3 packh x11,x21,x4 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed4: 0007b383 ld x7,0(x15) + 80002ed8: 00b38c63 beq x7,x11,80002ef0 + 80002edc: 63d0446f jal x8,80007d18 + 80002ee0: 80002ed0 .word 0x80002ed0 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 800126e1 .word 0x800126e1 + 80002eec: 00000000 .word 0x00000000 + 80002ef0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002ef4: 0008be03 ld x28,0(x17) + 80002ef8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x8000000000000001 + 80002efc: 0008b303 ld x6,0(x17) + 80002f00: 00888893 addi x17,x17,8 + +0000000080002f04 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + packh x27, x28, x6 # perform operation + 80002f04: 086e7db3 packh x27,x28,x6 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f08: 0007b383 ld x7,0(x15) + 80002f0c: 01b38c63 beq x7,x27,80002f24 + 80002f10: 6090446f jal x8,80007d18 + 80002f14: 80002f04 .word 0x80002f04 + 80002f18: 00000000 .word 0x00000000 + 80002f1c: 80012751 .word 0x80012751 + 80002f20: 00000000 .word 0x00000000 + 80002f24: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f28: 0008b983 ld x19,0(x17) + 80002f2c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x7fffffffffffffff + 80002f30: 0008b803 ld x16,0(x17) + 80002f34: 00888893 addi x17,x17,8 + +0000000080002f38 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + packh x14, x19, x16 # perform operation + 80002f38: 0909f733 packh x14,x19,x16 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f3c: 0007b383 ld x7,0(x15) + 80002f40: 00e38c63 beq x7,x14,80002f58 + 80002f44: 5d50446f jal x8,80007d18 + 80002f48: 80002f38 .word 0x80002f38 + 80002f4c: 00000000 .word 0x00000000 + 80002f50: 800127c1 .word 0x800127c1 + 80002f54: 00000000 .word 0x00000000 + 80002f58: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80002f5c: 0008b183 ld x3,0(x17) + 80002f60: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x7ffffffffffffffe + 80002f64: 0008ba83 ld x21,0(x17) + 80002f68: 00888893 addi x17,x17,8 + +0000000080002f6c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + packh x10, x3, x21 # perform operation + 80002f6c: 0951f533 packh x10,x3,x21 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f70: 0007b383 ld x7,0(x15) + 80002f74: 00a38c63 beq x7,x10,80002f8c + 80002f78: 5a10446f jal x8,80007d18 + 80002f7c: 80002f6c .word 0x80002f6c + 80002f80: 00000000 .word 0x00000000 + 80002f84: 80012831 .word 0x80012831 + 80002f88: 00000000 .word 0x00000000 + 80002f8c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002f90: 0008b683 ld x13,0(x17) + 80002f94: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xffffffffffffffff + 80002f98: 0008b503 ld x10,0(x17) + 80002f9c: 00888893 addi x17,x17,8 + +0000000080002fa0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + packh x16, x13, x10 # perform operation + 80002fa0: 08a6f833 packh x16,x13,x10 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa4: 0007b383 ld x7,0(x15) + 80002fa8: 01038c63 beq x7,x16,80002fc0 + 80002fac: 56d0446f jal x8,80007d18 + 80002fb0: 80002fa0 .word 0x80002fa0 + 80002fb4: 00000000 .word 0x00000000 + 80002fb8: 800128a1 .word 0x800128a1 + 80002fbc: 00000000 .word 0x00000000 + 80002fc0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x7ffffffffffffffe + 80002fc4: 0008b803 ld x16,0(x17) + 80002fc8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xfffffffffffffffe + 80002fcc: 0008bd83 ld x27,0(x17) + 80002fd0: 00888893 addi x17,x17,8 + +0000000080002fd4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + packh x6, x16, x27 # perform operation + 80002fd4: 09b87333 packh x6,x16,x27 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd8: 0007b383 ld x7,0(x15) + 80002fdc: 00638c63 beq x7,x6,80002ff4 + 80002fe0: 5390446f jal x8,80007d18 + 80002fe4: 80002fd4 .word 0x80002fd4 + 80002fe8: 00000000 .word 0x00000000 + 80002fec: 80012911 .word 0x80012911 + 80002ff0: 00000000 .word 0x00000000 + 80002ff4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80002ff8: 0008b603 ld x12,0(x17) + 80002ffc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80003000: 0008b703 ld x14,0(x17) + 80003004: 00888893 addi x17,x17,8 + +0000000080003008 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + packh x19, x12, x14 # perform operation + 80003008: 08e679b3 packh x19,x12,x14 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000300c: 0007b383 ld x7,0(x15) + 80003010: 01338c63 beq x7,x19,80003028 + 80003014: 5050446f jal x8,80007d18 + 80003018: 80003008 .word 0x80003008 + 8000301c: 00000000 .word 0x00000000 + 80003020: 80012981 .word 0x80012981 + 80003024: 00000000 .word 0x00000000 + 80003028: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x7ffffffffffffffe + 8000302c: 0008b083 ld x1,0(x17) + 80003030: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80003034: 0008b703 ld x14,0(x17) + 80003038: 00888893 addi x17,x17,8 + +000000008000303c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + packh x22, x1, x14 # perform operation + 8000303c: 08e0fb33 packh x22,x1,x14 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003040: 0007b383 ld x7,0(x15) + 80003044: 01638c63 beq x7,x22,8000305c + 80003048: 4d10446f jal x8,80007d18 + 8000304c: 8000303c .word 0x8000303c + 80003050: 00000000 .word 0x00000000 + 80003054: 800129f1 .word 0x800129f1 + 80003058: 00000000 .word 0x00000000 + 8000305c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80003060: 0008b903 ld x18,0(x17) + 80003064: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x5555555555555555 + 80003068: 0008ba03 ld x20,0(x17) + 8000306c: 00888893 addi x17,x17,8 + +0000000080003070 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + packh x10, x18, x20 # perform operation + 80003070: 09497533 packh x10,x18,x20 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003074: 0007b383 ld x7,0(x15) + 80003078: 00a38c63 beq x7,x10,80003090 + 8000307c: 49d0446f jal x8,80007d18 + 80003080: 80003070 .word 0x80003070 + 80003084: 00000000 .word 0x00000000 + 80003088: 80012a61 .word 0x80012a61 + 8000308c: 00000000 .word 0x00000000 + 80003090: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80003094: 0008b083 ld x1,0(x17) + 80003098: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000ffffffff + 8000309c: 0008bc03 ld x24,0(x17) + 800030a0: 00888893 addi x17,x17,8 + +00000000800030a4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + packh x26, x1, x24 # perform operation + 800030a4: 0980fd33 packh x26,x1,x24 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a8: 0007b383 ld x7,0(x15) + 800030ac: 01a38c63 beq x7,x26,800030c4 + 800030b0: 4690446f jal x8,80007d18 + 800030b4: 800030a4 .word 0x800030a4 + 800030b8: 00000000 .word 0x00000000 + 800030bc: 80012ad1 .word 0x80012ad1 + 800030c0: 00000000 .word 0x00000000 + 800030c4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x7ffffffffffffffe + 800030c8: 0008b503 ld x10,0(x17) + 800030cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x00000000fffffffe + 800030d0: 0008b683 ld x13,0(x17) + 800030d4: 00888893 addi x17,x17,8 + +00000000800030d8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + packh x21, x10, x13 # perform operation + 800030d8: 08d57ab3 packh x21,x10,x13 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030dc: 0007b383 ld x7,0(x15) + 800030e0: 01538c63 beq x7,x21,800030f8 + 800030e4: 4350446f jal x8,80007d18 + 800030e8: 800030d8 .word 0x800030d8 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 80012b39 .word 0x80012b39 + 800030f4: 00000000 .word 0x00000000 + 800030f8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x7ffffffffffffffe + 800030fc: 0008b703 ld x14,0(x17) + 80003100: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000100000000 + 80003104: 0008be03 ld x28,0(x17) + 80003108: 00888893 addi x17,x17,8 + +000000008000310c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + packh x26, x14, x28 # perform operation + 8000310c: 09c77d33 packh x26,x14,x28 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003110: 0007b383 ld x7,0(x15) + 80003114: 01a38c63 beq x7,x26,8000312c + 80003118: 4010446f jal x8,80007d18 + 8000311c: 8000310c .word 0x8000310c + 80003120: 00000000 .word 0x00000000 + 80003124: 80012ba1 .word 0x80012ba1 + 80003128: 00000000 .word 0x00000000 + 8000312c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80003130: 0008b203 ld x4,0(x17) + 80003134: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000001 + 80003138: 0008bf83 ld x31,0(x17) + 8000313c: 00888893 addi x17,x17,8 + +0000000080003140 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + packh x12, x4, x31 # perform operation + 80003140: 09f27633 packh x12,x4,x31 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003144: 0007b383 ld x7,0(x15) + 80003148: 00c38c63 beq x7,x12,80003160 + 8000314c: 3cd0446f jal x8,80007d18 + 80003150: 80003140 .word 0x80003140 + 80003154: 00000000 .word 0x00000000 + 80003158: 80012c0a .word 0x80012c0a + 8000315c: 00000000 .word 0x00000000 + 80003160: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xffffffffffffffff + 80003164: 0008b303 ld x6,0(x17) + 80003168: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000000000000 + 8000316c: 0008b983 ld x19,0(x17) + 80003170: 00888893 addi x17,x17,8 + +0000000080003174 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + packh x16, x6, x19 # perform operation + 80003174: 09337833 packh x16,x6,x19 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003178: 0007b383 ld x7,0(x15) + 8000317c: 01038c63 beq x7,x16,80003194 + 80003180: 3990446f jal x8,80007d18 + 80003184: 80003174 .word 0x80003174 + 80003188: 00000000 .word 0x00000000 + 8000318c: 80012c73 .word 0x80012c73 + 80003190: 00000000 .word 0x00000000 + 80003194: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xffffffffffffffff + 80003198: 0008b083 ld x1,0(x17) + 8000319c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000001 + 800031a0: 0008be83 ld x29,0(x17) + 800031a4: 00888893 addi x17,x17,8 + +00000000800031a8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + packh x18, x1, x29 # perform operation + 800031a8: 09d0f933 packh x18,x1,x29 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031ac: 0007b383 ld x7,0(x15) + 800031b0: 01238c63 beq x7,x18,800031c8 + 800031b4: 3650446f jal x8,80007d18 + 800031b8: 800031a8 .word 0x800031a8 + 800031bc: 00000000 .word 0x00000000 + 800031c0: 80012cd4 .word 0x80012cd4 + 800031c4: 00000000 .word 0x00000000 + 800031c8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xffffffffffffffff + 800031cc: 0008bf83 ld x31,0(x17) + 800031d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000000000002 + 800031d4: 0008b903 ld x18,0(x17) + 800031d8: 00888893 addi x17,x17,8 + +00000000800031dc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + packh x28, x31, x18 # perform operation + 800031dc: 092ffe33 packh x28,x31,x18 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e0: 0007b383 ld x7,0(x15) + 800031e4: 01c38c63 beq x7,x28,800031fc + 800031e8: 3310446f jal x8,80007d18 + 800031ec: 800031dc .word 0x800031dc + 800031f0: 00000000 .word 0x00000000 + 800031f4: 80012d35 .word 0x80012d35 + 800031f8: 00000000 .word 0x00000000 + 800031fc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xffffffffffffffff + 80003200: 0008be83 ld x29,0(x17) + 80003204: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x8000000000000000 + 80003208: 0008b683 ld x13,0(x17) + 8000320c: 00888893 addi x17,x17,8 + +0000000080003210 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + packh x18, x29, x13 # perform operation + 80003210: 08def933 packh x18,x29,x13 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003214: 0007b383 ld x7,0(x15) + 80003218: 01238c63 beq x7,x18,80003230 + 8000321c: 2fd0446f jal x8,80007d18 + 80003220: 80003210 .word 0x80003210 + 80003224: 00000000 .word 0x00000000 + 80003228: 80012d96 .word 0x80012d96 + 8000322c: 00000000 .word 0x00000000 + 80003230: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xffffffffffffffff + 80003234: 0008b303 ld x6,0(x17) + 80003238: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x8000000000000001 + 8000323c: 0008bc83 ld x25,0(x17) + 80003240: 00888893 addi x17,x17,8 + +0000000080003244 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + packh x29, x6, x25 # perform operation + 80003244: 09937eb3 packh x29,x6,x25 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003248: 0007b383 ld x7,0(x15) + 8000324c: 01d38c63 beq x7,x29,80003264 + 80003250: 2c90446f jal x8,80007d18 + 80003254: 80003244 .word 0x80003244 + 80003258: 00000000 .word 0x00000000 + 8000325c: 80012e06 .word 0x80012e06 + 80003260: 00000000 .word 0x00000000 + 80003264: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xffffffffffffffff + 80003268: 0008b183 ld x3,0(x17) + 8000326c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7fffffffffffffff + 80003270: 0008be03 ld x28,0(x17) + 80003274: 00888893 addi x17,x17,8 + +0000000080003278 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + packh x19, x3, x28 # perform operation + 80003278: 09c1f9b3 packh x19,x3,x28 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 8000327c: 0007b383 ld x7,0(x15) + 80003280: 01338c63 beq x7,x19,80003298 + 80003284: 2950446f jal x8,80007d18 + 80003288: 80003278 .word 0x80003278 + 8000328c: 00000000 .word 0x00000000 + 80003290: 80012e76 .word 0x80012e76 + 80003294: 00000000 .word 0x00000000 + 80003298: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0xffffffffffffffff + 8000329c: 0008b903 ld x18,0(x17) + 800032a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x7ffffffffffffffe + 800032a4: 0008bc83 ld x25,0(x17) + 800032a8: 00888893 addi x17,x17,8 + +00000000800032ac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + packh x20, x18, x25 # perform operation + 800032ac: 09997a33 packh x20,x18,x25 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b0: 0007b383 ld x7,0(x15) + 800032b4: 01438c63 beq x7,x20,800032cc + 800032b8: 2610446f jal x8,80007d18 + 800032bc: 800032ac .word 0x800032ac + 800032c0: 00000000 .word 0x00000000 + 800032c4: 80012ee6 .word 0x80012ee6 + 800032c8: 00000000 .word 0x00000000 + 800032cc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xffffffffffffffff + 800032d0: 0008bb83 ld x23,0(x17) + 800032d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xffffffffffffffff + 800032d8: 0008be83 ld x29,0(x17) + 800032dc: 00888893 addi x17,x17,8 + +00000000800032e0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + packh x11, x23, x29 # perform operation + 800032e0: 09dbf5b3 packh x11,x23,x29 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e4: 0007b383 ld x7,0(x15) + 800032e8: 00b38c63 beq x7,x11,80003300 + 800032ec: 22d0446f jal x8,80007d18 + 800032f0: 800032e0 .word 0x800032e0 + 800032f4: 00000000 .word 0x00000000 + 800032f8: 80012f56 .word 0x80012f56 + 800032fc: 00000000 .word 0x00000000 + 80003300: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xffffffffffffffff + 80003304: 0008b683 ld x13,0(x17) + 80003308: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xfffffffffffffffe + 8000330c: 0008be83 ld x29,0(x17) + 80003310: 00888893 addi x17,x17,8 + +0000000080003314 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + packh x24, x13, x29 # perform operation + 80003314: 09d6fc33 packh x24,x13,x29 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003318: 0007b383 ld x7,0(x15) + 8000331c: 01838c63 beq x7,x24,80003334 + 80003320: 1f90446f jal x8,80007d18 + 80003324: 80003314 .word 0x80003314 + 80003328: 00000000 .word 0x00000000 + 8000332c: 80012fc6 .word 0x80012fc6 + 80003330: 00000000 .word 0x00000000 + 80003334: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xffffffffffffffff + 80003338: 0008bc83 ld x25,0(x17) + 8000333c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80003340: 0008b183 ld x3,0(x17) + 80003344: 00888893 addi x17,x17,8 + +0000000080003348 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + packh x28, x25, x3 # perform operation + 80003348: 083cfe33 packh x28,x25,x3 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000334c: 0007b383 ld x7,0(x15) + 80003350: 01c38c63 beq x7,x28,80003368 + 80003354: 1c50446f jal x8,80007d18 + 80003358: 80003348 .word 0x80003348 + 8000335c: 00000000 .word 0x00000000 + 80003360: 80013036 .word 0x80013036 + 80003364: 00000000 .word 0x00000000 + 80003368: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xffffffffffffffff + 8000336c: 0008b483 ld x9,0(x17) + 80003370: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80003374: 0008b303 ld x6,0(x17) + 80003378: 00888893 addi x17,x17,8 + +000000008000337c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + packh x26, x9, x6 # perform operation + 8000337c: 0864fd33 packh x26,x9,x6 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003380: 0007b383 ld x7,0(x15) + 80003384: 01a38c63 beq x7,x26,8000339c + 80003388: 1910446f jal x8,80007d18 + 8000338c: 8000337c .word 0x8000337c + 80003390: 00000000 .word 0x00000000 + 80003394: 800130a6 .word 0x800130a6 + 80003398: 00000000 .word 0x00000000 + 8000339c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0xffffffffffffffff + 800033a0: 0008b203 ld x4,0(x17) + 800033a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x5555555555555555 + 800033a8: 0008be03 ld x28,0(x17) + 800033ac: 00888893 addi x17,x17,8 + +00000000800033b0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + packh x25, x4, x28 # perform operation + 800033b0: 09c27cb3 packh x25,x4,x28 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b4: 0007b383 ld x7,0(x15) + 800033b8: 01938c63 beq x7,x25,800033d0 + 800033bc: 15d0446f jal x8,80007d18 + 800033c0: 800033b0 .word 0x800033b0 + 800033c4: 00000000 .word 0x00000000 + 800033c8: 80013116 .word 0x80013116 + 800033cc: 00000000 .word 0x00000000 + 800033d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xffffffffffffffff + 800033d4: 0008b183 ld x3,0(x17) + 800033d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x00000000ffffffff + 800033dc: 0008bb83 ld x23,0(x17) + 800033e0: 00888893 addi x17,x17,8 + +00000000800033e4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + packh x14, x3, x23 # perform operation + 800033e4: 0971f733 packh x14,x3,x23 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e8: 0007b383 ld x7,0(x15) + 800033ec: 00e38c63 beq x7,x14,80003404 + 800033f0: 1290446f jal x8,80007d18 + 800033f4: 800033e4 .word 0x800033e4 + 800033f8: 00000000 .word 0x00000000 + 800033fc: 80013186 .word 0x80013186 + 80003400: 00000000 .word 0x00000000 + 80003404: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xffffffffffffffff + 80003408: 0008b083 ld x1,0(x17) + 8000340c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x00000000fffffffe + 80003410: 0008ba03 ld x20,0(x17) + 80003414: 00888893 addi x17,x17,8 + +0000000080003418 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + packh x27, x1, x20 # perform operation + 80003418: 0940fdb3 packh x27,x1,x20 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 8000341c: 0007b383 ld x7,0(x15) + 80003420: 01b38c63 beq x7,x27,80003438 + 80003424: 0f50446f jal x8,80007d18 + 80003428: 80003418 .word 0x80003418 + 8000342c: 00000000 .word 0x00000000 + 80003430: 800131ee .word 0x800131ee + 80003434: 00000000 .word 0x00000000 + 80003438: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xffffffffffffffff + 8000343c: 0008b983 ld x19,0(x17) + 80003440: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000100000000 + 80003444: 0008b183 ld x3,0(x17) + 80003448: 00888893 addi x17,x17,8 + +000000008000344c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + packh x25, x19, x3 # perform operation + 8000344c: 0839fcb3 packh x25,x19,x3 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003450: 0007b383 ld x7,0(x15) + 80003454: 01938c63 beq x7,x25,8000346c + 80003458: 0c10446f jal x8,80007d18 + 8000345c: 8000344c .word 0x8000344c + 80003460: 00000000 .word 0x00000000 + 80003464: 80013256 .word 0x80013256 + 80003468: 00000000 .word 0x00000000 + 8000346c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xffffffffffffffff + 80003470: 0008b103 ld x2,0(x17) + 80003474: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000100000001 + 80003478: 0008b983 ld x19,0(x17) + 8000347c: 00888893 addi x17,x17,8 + +0000000080003480 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + packh x18, x2, x19 # perform operation + 80003480: 09317933 packh x18,x2,x19 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003484: 0007b383 ld x7,0(x15) + 80003488: 01238c63 beq x7,x18,800034a0 + 8000348c: 08d0446f jal x8,80007d18 + 80003490: 80003480 .word 0x80003480 + 80003494: 00000000 .word 0x00000000 + 80003498: 800132bf .word 0x800132bf + 8000349c: 00000000 .word 0x00000000 + 800034a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xfffffffffffffffe + 800034a4: 0008b803 ld x16,0(x17) + 800034a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000000000000 + 800034ac: 0008bf83 ld x31,0(x17) + 800034b0: 00888893 addi x17,x17,8 + +00000000800034b4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + packh x13, x16, x31 # perform operation + 800034b4: 09f876b3 packh x13,x16,x31 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b8: 0007b383 ld x7,0(x15) + 800034bc: 00d38c63 beq x7,x13,800034d4 + 800034c0: 0590446f jal x8,80007d18 + 800034c4: 800034b4 .word 0x800034b4 + 800034c8: 00000000 .word 0x00000000 + 800034cc: 80013328 .word 0x80013328 + 800034d0: 00000000 .word 0x00000000 + 800034d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0xfffffffffffffffe + 800034d8: 0008ba83 ld x21,0(x17) + 800034dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000000000001 + 800034e0: 0008b183 ld x3,0(x17) + 800034e4: 00888893 addi x17,x17,8 + +00000000800034e8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + packh x25, x21, x3 # perform operation + 800034e8: 083afcb3 packh x25,x21,x3 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034ec: 0007b383 ld x7,0(x15) + 800034f0: 01938c63 beq x7,x25,80003508 + 800034f4: 0250446f jal x8,80007d18 + 800034f8: 800034e8 .word 0x800034e8 + 800034fc: 00000000 .word 0x00000000 + 80003500: 80013389 .word 0x80013389 + 80003504: 00000000 .word 0x00000000 + 80003508: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xfffffffffffffffe + 8000350c: 0008ba03 ld x20,0(x17) + 80003510: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x0000000000000002 + 80003514: 0008b103 ld x2,0(x17) + 80003518: 00888893 addi x17,x17,8 + +000000008000351c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + packh x11, x20, x2 # perform operation + 8000351c: 082a75b3 packh x11,x20,x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003520: 0007b383 ld x7,0(x15) + 80003524: 00b38c63 beq x7,x11,8000353c + 80003528: 7f00446f jal x8,80007d18 + 8000352c: 8000351c .word 0x8000351c + 80003530: 00000000 .word 0x00000000 + 80003534: 800133ea .word 0x800133ea + 80003538: 00000000 .word 0x00000000 + 8000353c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xfffffffffffffffe + 80003540: 0008b283 ld x5,0(x17) + 80003544: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x8000000000000000 + 80003548: 0008b603 ld x12,0(x17) + 8000354c: 00888893 addi x17,x17,8 + +0000000080003550 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + packh x29, x5, x12 # perform operation + 80003550: 08c2feb3 packh x29,x5,x12 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003554: 0007b383 ld x7,0(x15) + 80003558: 01d38c63 beq x7,x29,80003570 + 8000355c: 7bc0446f jal x8,80007d18 + 80003560: 80003550 .word 0x80003550 + 80003564: 00000000 .word 0x00000000 + 80003568: 8001344b .word 0x8001344b + 8000356c: 00000000 .word 0x00000000 + 80003570: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003574: 0008b703 ld x14,0(x17) + 80003578: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x8000000000000001 + 8000357c: 0008be03 ld x28,0(x17) + 80003580: 00888893 addi x17,x17,8 + +0000000080003584 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + packh x19, x14, x28 # perform operation + 80003584: 09c779b3 packh x19,x14,x28 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003588: 0007b383 ld x7,0(x15) + 8000358c: 01338c63 beq x7,x19,800035a4 + 80003590: 7880446f jal x8,80007d18 + 80003594: 80003584 .word 0x80003584 + 80003598: 00000000 .word 0x00000000 + 8000359c: 800134bb .word 0x800134bb + 800035a0: 00000000 .word 0x00000000 + 800035a4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xfffffffffffffffe + 800035a8: 0008b103 ld x2,0(x17) + 800035ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7fffffffffffffff + 800035b0: 0008bd83 ld x27,0(x17) + 800035b4: 00888893 addi x17,x17,8 + +00000000800035b8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + packh x9, x2, x27 # perform operation + 800035b8: 09b174b3 packh x9,x2,x27 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035bc: 0007b383 ld x7,0(x15) + 800035c0: 00938c63 beq x7,x9,800035d8 + 800035c4: 7540446f jal x8,80007d18 + 800035c8: 800035b8 .word 0x800035b8 + 800035cc: 00000000 .word 0x00000000 + 800035d0: 8001352b .word 0x8001352b + 800035d4: 00000000 .word 0x00000000 + 800035d8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xfffffffffffffffe + 800035dc: 0008bf83 ld x31,0(x17) + 800035e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x7ffffffffffffffe + 800035e4: 0008be83 ld x29,0(x17) + 800035e8: 00888893 addi x17,x17,8 + +00000000800035ec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + packh x6, x31, x29 # perform operation + 800035ec: 09dff333 packh x6,x31,x29 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f0: 0007b383 ld x7,0(x15) + 800035f4: 00638c63 beq x7,x6,8000360c + 800035f8: 7200446f jal x8,80007d18 + 800035fc: 800035ec .word 0x800035ec + 80003600: 00000000 .word 0x00000000 + 80003604: 8001359b .word 0x8001359b + 80003608: 00000000 .word 0x00000000 + 8000360c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xfffffffffffffffe + 80003610: 0008b983 ld x19,0(x17) + 80003614: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xffffffffffffffff + 80003618: 0008bb03 ld x22,0(x17) + 8000361c: 00888893 addi x17,x17,8 + +0000000080003620 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + packh x12, x19, x22 # perform operation + 80003620: 0969f633 packh x12,x19,x22 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003624: 0007b383 ld x7,0(x15) + 80003628: 00c38c63 beq x7,x12,80003640 + 8000362c: 6ec0446f jal x8,80007d18 + 80003630: 80003620 .word 0x80003620 + 80003634: 00000000 .word 0x00000000 + 80003638: 8001360b .word 0x8001360b + 8000363c: 00000000 .word 0x00000000 + 80003640: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xfffffffffffffffe + 80003644: 0008b503 ld x10,0(x17) + 80003648: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xfffffffffffffffe + 8000364c: 0008b083 ld x1,0(x17) + 80003650: 00888893 addi x17,x17,8 + +0000000080003654 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + packh x16, x10, x1 # perform operation + 80003654: 08157833 packh x16,x10,x1 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003658: 0007b383 ld x7,0(x15) + 8000365c: 01038c63 beq x7,x16,80003674 + 80003660: 6b80446f jal x8,80007d18 + 80003664: 80003654 .word 0x80003654 + 80003668: 00000000 .word 0x00000000 + 8000366c: 8001367b .word 0x8001367b + 80003670: 00000000 .word 0x00000000 + 80003674: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003678: 0008b703 ld x14,0(x17) + 8000367c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80003680: 0008b183 ld x3,0(x17) + 80003684: 00888893 addi x17,x17,8 + +0000000080003688 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + packh x10, x14, x3 # perform operation + 80003688: 08377533 packh x10,x14,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000368c: 0007b383 ld x7,0(x15) + 80003690: 00a38c63 beq x7,x10,800036a8 + 80003694: 6840446f jal x8,80007d18 + 80003698: 80003688 .word 0x80003688 + 8000369c: 00000000 .word 0x00000000 + 800036a0: 800136eb .word 0x800136eb + 800036a4: 00000000 .word 0x00000000 + 800036a8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xfffffffffffffffe + 800036ac: 0008b503 ld x10,0(x17) + 800036b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 800036b4: 0008b683 ld x13,0(x17) + 800036b8: 00888893 addi x17,x17,8 + +00000000800036bc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + packh x14, x10, x13 # perform operation + 800036bc: 08d57733 packh x14,x10,x13 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c0: 0007b383 ld x7,0(x15) + 800036c4: 00e38c63 beq x7,x14,800036dc + 800036c8: 6500446f jal x8,80007d18 + 800036cc: 800036bc .word 0x800036bc + 800036d0: 00000000 .word 0x00000000 + 800036d4: 8001375b .word 0x8001375b + 800036d8: 00000000 .word 0x00000000 + 800036dc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xfffffffffffffffe + 800036e0: 0008b583 ld x11,0(x17) + 800036e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x5555555555555555 + 800036e8: 0008b183 ld x3,0(x17) + 800036ec: 00888893 addi x17,x17,8 + +00000000800036f0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + packh x22, x11, x3 # perform operation + 800036f0: 0835fb33 packh x22,x11,x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f4: 0007b383 ld x7,0(x15) + 800036f8: 01638c63 beq x7,x22,80003710 + 800036fc: 61c0446f jal x8,80007d18 + 80003700: 800036f0 .word 0x800036f0 + 80003704: 00000000 .word 0x00000000 + 80003708: 800137cb .word 0x800137cb + 8000370c: 00000000 .word 0x00000000 + 80003710: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xfffffffffffffffe + 80003714: 0008bb83 ld x23,0(x17) + 80003718: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x00000000ffffffff + 8000371c: 0008bd03 ld x26,0(x17) + 80003720: 00888893 addi x17,x17,8 + +0000000080003724 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + packh x27, x23, x26 # perform operation + 80003724: 09abfdb3 packh x27,x23,x26 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003728: 0007b383 ld x7,0(x15) + 8000372c: 01b38c63 beq x7,x27,80003744 + 80003730: 5e80446f jal x8,80007d18 + 80003734: 80003724 .word 0x80003724 + 80003738: 00000000 .word 0x00000000 + 8000373c: 8001383b .word 0x8001383b + 80003740: 00000000 .word 0x00000000 + 80003744: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003748: 0008b683 ld x13,0(x17) + 8000374c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x00000000fffffffe + 80003750: 0008b603 ld x12,0(x17) + 80003754: 00888893 addi x17,x17,8 + +0000000080003758 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + packh x27, x13, x12 # perform operation + 80003758: 08c6fdb3 packh x27,x13,x12 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 8000375c: 0007b383 ld x7,0(x15) + 80003760: 01b38c63 beq x7,x27,80003778 + 80003764: 5b40446f jal x8,80007d18 + 80003768: 80003758 .word 0x80003758 + 8000376c: 00000000 .word 0x00000000 + 80003770: 800138a3 .word 0x800138a3 + 80003774: 00000000 .word 0x00000000 + 80003778: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xfffffffffffffffe + 8000377c: 0008bc83 ld x25,0(x17) + 80003780: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000100000000 + 80003784: 0008ba03 ld x20,0(x17) + 80003788: 00888893 addi x17,x17,8 + +000000008000378c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + packh x9, x25, x20 # perform operation + 8000378c: 094cf4b3 packh x9,x25,x20 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003790: 0007b383 ld x7,0(x15) + 80003794: 00938c63 beq x7,x9,800037ac + 80003798: 5800446f jal x8,80007d18 + 8000379c: 8000378c .word 0x8000378c + 800037a0: 00000000 .word 0x00000000 + 800037a4: 8001390b .word 0x8001390b + 800037a8: 00000000 .word 0x00000000 + 800037ac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xfffffffffffffffe + 800037b0: 0008bd83 ld x27,0(x17) + 800037b4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x0000000100000001 + 800037b8: 0008bc83 ld x25,0(x17) + 800037bc: 00888893 addi x17,x17,8 + +00000000800037c0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + packh x21, x27, x25 # perform operation + 800037c0: 099dfab3 packh x21,x27,x25 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c4: 0007b383 ld x7,0(x15) + 800037c8: 01538c63 beq x7,x21,800037e0 + 800037cc: 54c0446f jal x8,80007d18 + 800037d0: 800037c0 .word 0x800037c0 + 800037d4: 00000000 .word 0x00000000 + 800037d8: 80013974 .word 0x80013974 + 800037dc: 00000000 .word 0x00000000 + 800037e0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 800037e4: 0008bd03 ld x26,0(x17) + 800037e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0000000000000000 + 800037ec: 0008bb83 ld x23,0(x17) + 800037f0: 00888893 addi x17,x17,8 + +00000000800037f4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + packh x10, x26, x23 # perform operation + 800037f4: 097d7533 packh x10,x26,x23 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f8: 0007b383 ld x7,0(x15) + 800037fc: 00a38c63 beq x7,x10,80003814 + 80003800: 5180446f jal x8,80007d18 + 80003804: 800037f4 .word 0x800037f4 + 80003808: 00000000 .word 0x00000000 + 8000380c: 800139dd .word 0x800139dd + 80003810: 00000000 .word 0x00000000 + 80003814: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 80003818: 0008be83 ld x29,0(x17) + 8000381c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000000000001 + 80003820: 0008bd03 ld x26,0(x17) + 80003824: 00888893 addi x17,x17,8 + +0000000080003828 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + packh x9, x29, x26 # perform operation + 80003828: 09aef4b3 packh x9,x29,x26 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 8000382c: 0007b383 ld x7,0(x15) + 80003830: 00938c63 beq x7,x9,80003848 + 80003834: 4e40446f jal x8,80007d18 + 80003838: 80003828 .word 0x80003828 + 8000383c: 00000000 .word 0x00000000 + 80003840: 80013a3e .word 0x80013a3e + 80003844: 00000000 .word 0x00000000 + 80003848: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 8000384c: 0008b703 ld x14,0(x17) + 80003850: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000000000002 + 80003854: 0008bf83 ld x31,0(x17) + 80003858: 00888893 addi x17,x17,8 + +000000008000385c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + packh x4, x14, x31 # perform operation + 8000385c: 09f77233 packh x4,x14,x31 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003860: 0007b383 ld x7,0(x15) + 80003864: 00438c63 beq x7,x4,8000387c + 80003868: 4b00446f jal x8,80007d18 + 8000386c: 8000385c .word 0x8000385c + 80003870: 00000000 .word 0x00000000 + 80003874: 80013a9f .word 0x80013a9f + 80003878: 00000000 .word 0x00000000 + 8000387c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003880: 0008bc03 ld x24,0(x17) + 80003884: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x8000000000000000 + 80003888: 0008b183 ld x3,0(x17) + 8000388c: 00888893 addi x17,x17,8 + +0000000080003890 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + packh x11, x24, x3 # perform operation + 80003890: 083c75b3 packh x11,x24,x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003894: 0007b383 ld x7,0(x15) + 80003898: 00b38c63 beq x7,x11,800038b0 + 8000389c: 47c0446f jal x8,80007d18 + 800038a0: 80003890 .word 0x80003890 + 800038a4: 00000000 .word 0x00000000 + 800038a8: 80013b00 .word 0x80013b00 + 800038ac: 00000000 .word 0x00000000 + 800038b0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800038b4: 0008be83 ld x29,0(x17) + 800038b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x8000000000000001 + 800038bc: 0008ba03 ld x20,0(x17) + 800038c0: 00888893 addi x17,x17,8 + +00000000800038c4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + packh x31, x29, x20 # perform operation + 800038c4: 094effb3 packh x31,x29,x20 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c8: 0007b383 ld x7,0(x15) + 800038cc: 01f38c63 beq x7,x31,800038e4 + 800038d0: 4480446f jal x8,80007d18 + 800038d4: 800038c4 .word 0x800038c4 + 800038d8: 00000000 .word 0x00000000 + 800038dc: 80013b70 .word 0x80013b70 + 800038e0: 00000000 .word 0x00000000 + 800038e4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038e8: 0008b983 ld x19,0(x17) + 800038ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7fffffffffffffff + 800038f0: 0008bd83 ld x27,0(x17) + 800038f4: 00888893 addi x17,x17,8 + +00000000800038f8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + packh x25, x19, x27 # perform operation + 800038f8: 09b9fcb3 packh x25,x19,x27 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038fc: 0007b383 ld x7,0(x15) + 80003900: 01938c63 beq x7,x25,80003918 + 80003904: 4140446f jal x8,80007d18 + 80003908: 800038f8 .word 0x800038f8 + 8000390c: 00000000 .word 0x00000000 + 80003910: 80013be0 .word 0x80013be0 + 80003914: 00000000 .word 0x00000000 + 80003918: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 8000391c: 0008b203 ld x4,0(x17) + 80003920: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80003924: 0008b583 ld x11,0(x17) + 80003928: 00888893 addi x17,x17,8 + +000000008000392c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + packh x25, x4, x11 # perform operation + 8000392c: 08b27cb3 packh x25,x4,x11 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003930: 0007b383 ld x7,0(x15) + 80003934: 01938c63 beq x7,x25,8000394c + 80003938: 3e00446f jal x8,80007d18 + 8000393c: 8000392c .word 0x8000392c + 80003940: 00000000 .word 0x00000000 + 80003944: 80013c50 .word 0x80013c50 + 80003948: 00000000 .word 0x00000000 + 8000394c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003950: 0008b703 ld x14,0(x17) + 80003954: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xffffffffffffffff + 80003958: 0008b303 ld x6,0(x17) + 8000395c: 00888893 addi x17,x17,8 + +0000000080003960 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + packh x21, x14, x6 # perform operation + 80003960: 08677ab3 packh x21,x14,x6 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003964: 0007b383 ld x7,0(x15) + 80003968: 01538c63 beq x7,x21,80003980 + 8000396c: 3ac0446f jal x8,80007d18 + 80003970: 80003960 .word 0x80003960 + 80003974: 00000000 .word 0x00000000 + 80003978: 80013cc0 .word 0x80013cc0 + 8000397c: 00000000 .word 0x00000000 + 80003980: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003984: 0008ba83 ld x21,0(x17) + 80003988: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xfffffffffffffffe + 8000398c: 0008b503 ld x10,0(x17) + 80003990: 00888893 addi x17,x17,8 + +0000000080003994 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + packh x26, x21, x10 # perform operation + 80003994: 08aafd33 packh x26,x21,x10 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003998: 0007b383 ld x7,0(x15) + 8000399c: 01a38c63 beq x7,x26,800039b4 + 800039a0: 3780446f jal x8,80007d18 + 800039a4: 80003994 .word 0x80003994 + 800039a8: 00000000 .word 0x00000000 + 800039ac: 80013d30 .word 0x80013d30 + 800039b0: 00000000 .word 0x00000000 + 800039b4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 800039b8: 0008b203 ld x4,0(x17) + 800039bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 800039c0: 0008ba03 ld x20,0(x17) + 800039c4: 00888893 addi x17,x17,8 + +00000000800039c8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + packh x31, x4, x20 # perform operation + 800039c8: 09427fb3 packh x31,x4,x20 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039cc: 0007b383 ld x7,0(x15) + 800039d0: 01f38c63 beq x7,x31,800039e8 + 800039d4: 3440446f jal x8,80007d18 + 800039d8: 800039c8 .word 0x800039c8 + 800039dc: 00000000 .word 0x00000000 + 800039e0: 80013da0 .word 0x80013da0 + 800039e4: 00000000 .word 0x00000000 + 800039e8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 800039ec: 0008bb83 ld x23,0(x17) + 800039f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 800039f4: 0008b503 ld x10,0(x17) + 800039f8: 00888893 addi x17,x17,8 + +00000000800039fc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + packh x27, x23, x10 # perform operation + 800039fc: 08abfdb3 packh x27,x23,x10 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a00: 0007b383 ld x7,0(x15) + 80003a04: 01b38c63 beq x7,x27,80003a1c + 80003a08: 3100446f jal x8,80007d18 + 80003a0c: 800039fc .word 0x800039fc + 80003a10: 00000000 .word 0x00000000 + 80003a14: 80013e10 .word 0x80013e10 + 80003a18: 00000000 .word 0x00000000 + 80003a1c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003a20: 0008ba83 ld x21,0(x17) + 80003a24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x5555555555555555 + 80003a28: 0008bc03 ld x24,0(x17) + 80003a2c: 00888893 addi x17,x17,8 + +0000000080003a30 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + packh x13, x21, x24 # perform operation + 80003a30: 098af6b3 packh x13,x21,x24 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a34: 0007b383 ld x7,0(x15) + 80003a38: 00d38c63 beq x7,x13,80003a50 + 80003a3c: 2dc0446f jal x8,80007d18 + 80003a40: 80003a30 .word 0x80003a30 + 80003a44: 00000000 .word 0x00000000 + 80003a48: 80013e80 .word 0x80013e80 + 80003a4c: 00000000 .word 0x00000000 + 80003a50: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003a54: 0008b683 ld x13,0(x17) + 80003a58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000ffffffff + 80003a5c: 0008bc03 ld x24,0(x17) + 80003a60: 00888893 addi x17,x17,8 + +0000000080003a64 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + packh x10, x13, x24 # perform operation + 80003a64: 0986f533 packh x10,x13,x24 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a68: 0007b383 ld x7,0(x15) + 80003a6c: 00a38c63 beq x7,x10,80003a84 + 80003a70: 2a80446f jal x8,80007d18 + 80003a74: 80003a64 .word 0x80003a64 + 80003a78: 00000000 .word 0x00000000 + 80003a7c: 80013ef0 .word 0x80013ef0 + 80003a80: 00000000 .word 0x00000000 + 80003a84: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003a88: 0008b303 ld x6,0(x17) + 80003a8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x00000000fffffffe + 80003a90: 0008b583 ld x11,0(x17) + 80003a94: 00888893 addi x17,x17,8 + +0000000080003a98 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + packh x31, x6, x11 # perform operation + 80003a98: 08b37fb3 packh x31,x6,x11 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a9c: 0007b383 ld x7,0(x15) + 80003aa0: 01f38c63 beq x7,x31,80003ab8 + 80003aa4: 2740446f jal x8,80007d18 + 80003aa8: 80003a98 .word 0x80003a98 + 80003aac: 00000000 .word 0x00000000 + 80003ab0: 80013f58 .word 0x80013f58 + 80003ab4: 00000000 .word 0x00000000 + 80003ab8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003abc: 0008b583 ld x11,0(x17) + 80003ac0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x0000000100000000 + 80003ac4: 0008b303 ld x6,0(x17) + 80003ac8: 00888893 addi x17,x17,8 + +0000000080003acc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + packh x23, x11, x6 # perform operation + 80003acc: 0865fbb3 packh x23,x11,x6 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad0: 0007b383 ld x7,0(x15) + 80003ad4: 01738c63 beq x7,x23,80003aec + 80003ad8: 2400446f jal x8,80007d18 + 80003adc: 80003acc .word 0x80003acc + 80003ae0: 00000000 .word 0x00000000 + 80003ae4: 80013fc0 .word 0x80013fc0 + 80003ae8: 00000000 .word 0x00000000 + 80003aec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003af0: 0008bd83 ld x27,0(x17) + 80003af4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0000000100000001 + 80003af8: 0008bb83 ld x23,0(x17) + 80003afc: 00888893 addi x17,x17,8 + +0000000080003b00 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + packh x26, x27, x23 # perform operation + 80003b00: 097dfd33 packh x26,x27,x23 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b04: 0007b383 ld x7,0(x15) + 80003b08: 01a38c63 beq x7,x26,80003b20 + 80003b0c: 20c0446f jal x8,80007d18 + 80003b10: 80003b00 .word 0x80003b00 + 80003b14: 00000000 .word 0x00000000 + 80003b18: 80014029 .word 0x80014029 + 80003b1c: 00000000 .word 0x00000000 + 80003b20: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003b24: 0008b903 ld x18,0(x17) + 80003b28: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000000 + 80003b2c: 0008be83 ld x29,0(x17) + 80003b30: 00888893 addi x17,x17,8 + +0000000080003b34 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + packh x12, x18, x29 # perform operation + 80003b34: 09d97633 packh x12,x18,x29 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b38: 0007b383 ld x7,0(x15) + 80003b3c: 00c38c63 beq x7,x12,80003b54 + 80003b40: 1d80446f jal x8,80007d18 + 80003b44: 80003b34 .word 0x80003b34 + 80003b48: 00000000 .word 0x00000000 + 80003b4c: 80014092 .word 0x80014092 + 80003b50: 00000000 .word 0x00000000 + 80003b54: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003b58: 0008b083 ld x1,0(x17) + 80003b5c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x0000000000000001 + 80003b60: 0008b203 ld x4,0(x17) + 80003b64: 00888893 addi x17,x17,8 + +0000000080003b68 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + packh x13, x1, x4 # perform operation + 80003b68: 0840f6b3 packh x13,x1,x4 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b6c: 0007b383 ld x7,0(x15) + 80003b70: 00d38c63 beq x7,x13,80003b88 + 80003b74: 1a40446f jal x8,80007d18 + 80003b78: 80003b68 .word 0x80003b68 + 80003b7c: 00000000 .word 0x00000000 + 80003b80: 800140f3 .word 0x800140f3 + 80003b84: 00000000 .word 0x00000000 + 80003b88: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003b8c: 0008b083 ld x1,0(x17) + 80003b90: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000000000002 + 80003b94: 0008bb03 ld x22,0(x17) + 80003b98: 00888893 addi x17,x17,8 + +0000000080003b9c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + packh x5, x1, x22 # perform operation + 80003b9c: 0960f2b3 packh x5,x1,x22 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba0: 0007b383 ld x7,0(x15) + 80003ba4: 00538c63 beq x7,x5,80003bbc + 80003ba8: 1700446f jal x8,80007d18 + 80003bac: 80003b9c .word 0x80003b9c + 80003bb0: 00000000 .word 0x00000000 + 80003bb4: 80014154 .word 0x80014154 + 80003bb8: 00000000 .word 0x00000000 + 80003bbc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003bc0: 0008bf03 ld x30,0(x17) + 80003bc4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000000 + 80003bc8: 0008b803 ld x16,0(x17) + 80003bcc: 00888893 addi x17,x17,8 + +0000000080003bd0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + packh x18, x30, x16 # perform operation + 80003bd0: 090f7933 packh x18,x30,x16 + # Check if x18 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x18, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd4: 0007b383 ld x7,0(x15) + 80003bd8: 01238c63 beq x7,x18,80003bf0 + 80003bdc: 13c0446f jal x8,80007d18 + 80003be0: 80003bd0 .word 0x80003bd0 + 80003be4: 00000000 .word 0x00000000 + 80003be8: 800141b5 .word 0x800141b5 + 80003bec: 00000000 .word 0x00000000 + 80003bf0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003bf4: 0008b183 ld x3,0(x17) + 80003bf8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x8000000000000001 + 80003bfc: 0008b983 ld x19,0(x17) + 80003c00: 00888893 addi x17,x17,8 + +0000000080003c04 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + packh x28, x3, x19 # perform operation + 80003c04: 0931fe33 packh x28,x3,x19 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c08: 0007b383 ld x7,0(x15) + 80003c0c: 01c38c63 beq x7,x28,80003c24 + 80003c10: 1080446f jal x8,80007d18 + 80003c14: 80003c04 .word 0x80003c04 + 80003c18: 00000000 .word 0x00000000 + 80003c1c: 80014225 .word 0x80014225 + 80003c20: 00000000 .word 0x00000000 + 80003c24: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003c28: 0008b103 ld x2,0(x17) + 80003c2c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7fffffffffffffff + 80003c30: 0008bd83 ld x27,0(x17) + 80003c34: 00888893 addi x17,x17,8 + +0000000080003c38 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + packh x20, x2, x27 # perform operation + 80003c38: 09b17a33 packh x20,x2,x27 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c3c: 0007b383 ld x7,0(x15) + 80003c40: 01438c63 beq x7,x20,80003c58 + 80003c44: 0d40446f jal x8,80007d18 + 80003c48: 80003c38 .word 0x80003c38 + 80003c4c: 00000000 .word 0x00000000 + 80003c50: 80014295 .word 0x80014295 + 80003c54: 00000000 .word 0x00000000 + 80003c58: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003c5c: 0008b303 ld x6,0(x17) + 80003c60: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80003c64: 0008b283 ld x5,0(x17) + 80003c68: 00888893 addi x17,x17,8 + +0000000080003c6c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + packh x2, x6, x5 # perform operation + 80003c6c: 08537133 packh x2,x6,x5 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c70: 0007b383 ld x7,0(x15) + 80003c74: 00238c63 beq x7,x2,80003c8c + 80003c78: 0a00446f jal x8,80007d18 + 80003c7c: 80003c6c .word 0x80003c6c + 80003c80: 00000000 .word 0x00000000 + 80003c84: 80014305 .word 0x80014305 + 80003c88: 00000000 .word 0x00000000 + 80003c8c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003c90: 0008bc83 ld x25,0(x17) + 80003c94: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xffffffffffffffff + 80003c98: 0008b503 ld x10,0(x17) + 80003c9c: 00888893 addi x17,x17,8 + +0000000080003ca0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + packh x24, x25, x10 # perform operation + 80003ca0: 08acfc33 packh x24,x25,x10 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca4: 0007b383 ld x7,0(x15) + 80003ca8: 01838c63 beq x7,x24,80003cc0 + 80003cac: 06c0446f jal x8,80007d18 + 80003cb0: 80003ca0 .word 0x80003ca0 + 80003cb4: 00000000 .word 0x00000000 + 80003cb8: 80014375 .word 0x80014375 + 80003cbc: 00000000 .word 0x00000000 + 80003cc0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003cc4: 0008b083 ld x1,0(x17) + 80003cc8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xfffffffffffffffe + 80003ccc: 0008b203 ld x4,0(x17) + 80003cd0: 00888893 addi x17,x17,8 + +0000000080003cd4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + packh x14, x1, x4 # perform operation + 80003cd4: 0840f733 packh x14,x1,x4 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd8: 0007b383 ld x7,0(x15) + 80003cdc: 00e38c63 beq x7,x14,80003cf4 + 80003ce0: 0380446f jal x8,80007d18 + 80003ce4: 80003cd4 .word 0x80003cd4 + 80003ce8: 00000000 .word 0x00000000 + 80003cec: 800143e5 .word 0x800143e5 + 80003cf0: 00000000 .word 0x00000000 + 80003cf4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003cf8: 0008b083 ld x1,0(x17) + 80003cfc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80003d00: 0008b983 ld x19,0(x17) + 80003d04: 00888893 addi x17,x17,8 + +0000000080003d08 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + packh x5, x1, x19 # perform operation + 80003d08: 0930f2b3 packh x5,x1,x19 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d0c: 0007b383 ld x7,0(x15) + 80003d10: 00538c63 beq x7,x5,80003d28 + 80003d14: 0040446f jal x8,80007d18 + 80003d18: 80003d08 .word 0x80003d08 + 80003d1c: 00000000 .word 0x00000000 + 80003d20: 80014455 .word 0x80014455 + 80003d24: 00000000 .word 0x00000000 + 80003d28: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003d2c: 0008b703 ld x14,0(x17) + 80003d30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80003d34: 0008b983 ld x19,0(x17) + 80003d38: 00888893 addi x17,x17,8 + +0000000080003d3c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + packh x12, x14, x19 # perform operation + 80003d3c: 09377633 packh x12,x14,x19 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d40: 0007b383 ld x7,0(x15) + 80003d44: 00c38c63 beq x7,x12,80003d5c + 80003d48: 7d10346f jal x8,80007d18 + 80003d4c: 80003d3c .word 0x80003d3c + 80003d50: 00000000 .word 0x00000000 + 80003d54: 800144c5 .word 0x800144c5 + 80003d58: 00000000 .word 0x00000000 + 80003d5c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003d60: 0008b103 ld x2,0(x17) + 80003d64: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x5555555555555555 + 80003d68: 0008bc83 ld x25,0(x17) + 80003d6c: 00888893 addi x17,x17,8 + +0000000080003d70 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + packh x22, x2, x25 # perform operation + 80003d70: 09917b33 packh x22,x2,x25 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d74: 0007b383 ld x7,0(x15) + 80003d78: 01638c63 beq x7,x22,80003d90 + 80003d7c: 79d0346f jal x8,80007d18 + 80003d80: 80003d70 .word 0x80003d70 + 80003d84: 00000000 .word 0x00000000 + 80003d88: 80014535 .word 0x80014535 + 80003d8c: 00000000 .word 0x00000000 + 80003d90: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003d94: 0008bd03 ld x26,0(x17) + 80003d98: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x00000000ffffffff + 80003d9c: 0008b703 ld x14,0(x17) + 80003da0: 00888893 addi x17,x17,8 + +0000000080003da4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + packh x11, x26, x14 # perform operation + 80003da4: 08ed75b3 packh x11,x26,x14 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da8: 0007b383 ld x7,0(x15) + 80003dac: 00b38c63 beq x7,x11,80003dc4 + 80003db0: 7690346f jal x8,80007d18 + 80003db4: 80003da4 .word 0x80003da4 + 80003db8: 00000000 .word 0x00000000 + 80003dbc: 800145a5 .word 0x800145a5 + 80003dc0: 00000000 .word 0x00000000 + 80003dc4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003dc8: 0008bb83 ld x23,0(x17) + 80003dcc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x00000000fffffffe + 80003dd0: 0008b683 ld x13,0(x17) + 80003dd4: 00888893 addi x17,x17,8 + +0000000080003dd8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + packh x28, x23, x13 # perform operation + 80003dd8: 08dbfe33 packh x28,x23,x13 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003ddc: 0007b383 ld x7,0(x15) + 80003de0: 01c38c63 beq x7,x28,80003df8 + 80003de4: 7350346f jal x8,80007d18 + 80003de8: 80003dd8 .word 0x80003dd8 + 80003dec: 00000000 .word 0x00000000 + 80003df0: 8001460d .word 0x8001460d + 80003df4: 00000000 .word 0x00000000 + 80003df8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003dfc: 0008b603 ld x12,0(x17) + 80003e00: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000100000000 + 80003e04: 0008bf03 ld x30,0(x17) + 80003e08: 00888893 addi x17,x17,8 + +0000000080003e0c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + packh x21, x12, x30 # perform operation + 80003e0c: 09e67ab3 packh x21,x12,x30 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e10: 0007b383 ld x7,0(x15) + 80003e14: 01538c63 beq x7,x21,80003e2c + 80003e18: 7010346f jal x8,80007d18 + 80003e1c: 80003e0c .word 0x80003e0c + 80003e20: 00000000 .word 0x00000000 + 80003e24: 80014675 .word 0x80014675 + 80003e28: 00000000 .word 0x00000000 + 80003e2c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003e30: 0008bf83 ld x31,0(x17) + 80003e34: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0000000100000001 + 80003e38: 0008b603 ld x12,0(x17) + 80003e3c: 00888893 addi x17,x17,8 + +0000000080003e40 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + packh x4, x31, x12 # perform operation + 80003e40: 08cff233 packh x4,x31,x12 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e44: 0007b383 ld x7,0(x15) + 80003e48: 00438c63 beq x7,x4,80003e60 + 80003e4c: 6cd0346f jal x8,80007d18 + 80003e50: 80003e40 .word 0x80003e40 + 80003e54: 00000000 .word 0x00000000 + 80003e58: 800146de .word 0x800146de + 80003e5c: 00000000 .word 0x00000000 + 80003e60: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5555555555555555 + 80003e64: 0008b703 ld x14,0(x17) + 80003e68: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x0000000000000000 + 80003e6c: 0008b103 ld x2,0(x17) + 80003e70: 00888893 addi x17,x17,8 + +0000000080003e74 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + packh x31, x14, x2 # perform operation + 80003e74: 08277fb3 packh x31,x14,x2 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e78: 0007b383 ld x7,0(x15) + 80003e7c: 01f38c63 beq x7,x31,80003e94 + 80003e80: 6990346f jal x8,80007d18 + 80003e84: 80003e74 .word 0x80003e74 + 80003e88: 00000000 .word 0x00000000 + 80003e8c: 80014747 .word 0x80014747 + 80003e90: 00000000 .word 0x00000000 + 80003e94: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x5555555555555555 + 80003e98: 0008be83 ld x29,0(x17) + 80003e9c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000001 + 80003ea0: 0008ba03 ld x20,0(x17) + 80003ea4: 00888893 addi x17,x17,8 + +0000000080003ea8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + packh x23, x29, x20 # perform operation + 80003ea8: 094efbb3 packh x23,x29,x20 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eac: 0007b383 ld x7,0(x15) + 80003eb0: 01738c63 beq x7,x23,80003ec8 + 80003eb4: 6650346f jal x8,80007d18 + 80003eb8: 80003ea8 .word 0x80003ea8 + 80003ebc: 00000000 .word 0x00000000 + 80003ec0: 800147a8 .word 0x800147a8 + 80003ec4: 00000000 .word 0x00000000 + 80003ec8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80003ecc: 0008b803 ld x16,0(x17) + 80003ed0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000000000002 + 80003ed4: 0008b083 ld x1,0(x17) + 80003ed8: 00888893 addi x17,x17,8 + +0000000080003edc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + packh x31, x16, x1 # perform operation + 80003edc: 08187fb3 packh x31,x16,x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee0: 0007b383 ld x7,0(x15) + 80003ee4: 01f38c63 beq x7,x31,80003efc + 80003ee8: 6310346f jal x8,80007d18 + 80003eec: 80003edc .word 0x80003edc + 80003ef0: 00000000 .word 0x00000000 + 80003ef4: 80014809 .word 0x80014809 + 80003ef8: 00000000 .word 0x00000000 + 80003efc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5555555555555555 + 80003f00: 0008bf03 ld x30,0(x17) + 80003f04: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x8000000000000000 + 80003f08: 0008b603 ld x12,0(x17) + 80003f0c: 00888893 addi x17,x17,8 + +0000000080003f10 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + packh x24, x30, x12 # perform operation + 80003f10: 08cf7c33 packh x24,x30,x12 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f14: 0007b383 ld x7,0(x15) + 80003f18: 01838c63 beq x7,x24,80003f30 + 80003f1c: 5fd0346f jal x8,80007d18 + 80003f20: 80003f10 .word 0x80003f10 + 80003f24: 00000000 .word 0x00000000 + 80003f28: 8001486a .word 0x8001486a + 80003f2c: 00000000 .word 0x00000000 + 80003f30: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x5555555555555555 + 80003f34: 0008b283 ld x5,0(x17) + 80003f38: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x8000000000000001 + 80003f3c: 0008be83 ld x29,0(x17) + 80003f40: 00888893 addi x17,x17,8 + +0000000080003f44 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + packh x22, x5, x29 # perform operation + 80003f44: 09d2fb33 packh x22,x5,x29 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f48: 0007b383 ld x7,0(x15) + 80003f4c: 01638c63 beq x7,x22,80003f64 + 80003f50: 5c90346f jal x8,80007d18 + 80003f54: 80003f44 .word 0x80003f44 + 80003f58: 00000000 .word 0x00000000 + 80003f5c: 800148da .word 0x800148da + 80003f60: 00000000 .word 0x00000000 + 80003f64: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x5555555555555555 + 80003f68: 0008be03 ld x28,0(x17) + 80003f6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x7fffffffffffffff + 80003f70: 0008b603 ld x12,0(x17) + 80003f74: 00888893 addi x17,x17,8 + +0000000080003f78 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + packh x24, x28, x12 # perform operation + 80003f78: 08ce7c33 packh x24,x28,x12 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f7c: 0007b383 ld x7,0(x15) + 80003f80: 01838c63 beq x7,x24,80003f98 + 80003f84: 5950346f jal x8,80007d18 + 80003f88: 80003f78 .word 0x80003f78 + 80003f8c: 00000000 .word 0x00000000 + 80003f90: 8001494a .word 0x8001494a + 80003f94: 00000000 .word 0x00000000 + 80003f98: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5555555555555555 + 80003f9c: 0008bf03 ld x30,0(x17) + 80003fa0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x7ffffffffffffffe + 80003fa4: 0008bb03 ld x22,0(x17) + 80003fa8: 00888893 addi x17,x17,8 + +0000000080003fac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + packh x26, x30, x22 # perform operation + 80003fac: 096f7d33 packh x26,x30,x22 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb0: 0007b383 ld x7,0(x15) + 80003fb4: 01a38c63 beq x7,x26,80003fcc + 80003fb8: 5610346f jal x8,80007d18 + 80003fbc: 80003fac .word 0x80003fac + 80003fc0: 00000000 .word 0x00000000 + 80003fc4: 800149ba .word 0x800149ba + 80003fc8: 00000000 .word 0x00000000 + 80003fcc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80003fd0: 0008b803 ld x16,0(x17) + 80003fd4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xffffffffffffffff + 80003fd8: 0008bb03 ld x22,0(x17) + 80003fdc: 00888893 addi x17,x17,8 + +0000000080003fe0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + packh x10, x16, x22 # perform operation + 80003fe0: 09687533 packh x10,x16,x22 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe4: 0007b383 ld x7,0(x15) + 80003fe8: 00a38c63 beq x7,x10,80004000 + 80003fec: 52d0346f jal x8,80007d18 + 80003ff0: 80003fe0 .word 0x80003fe0 + 80003ff4: 00000000 .word 0x00000000 + 80003ff8: 80014a2a .word 0x80014a2a + 80003ffc: 00000000 .word 0x00000000 + 80004000: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5555555555555555 + 80004004: 0008bf03 ld x30,0(x17) + 80004008: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xfffffffffffffffe + 8000400c: 0008b583 ld x11,0(x17) + 80004010: 00888893 addi x17,x17,8 + +0000000080004014 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + packh x3, x30, x11 # perform operation + 80004014: 08bf71b3 packh x3,x30,x11 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004018: 0007b383 ld x7,0(x15) + 8000401c: 00338c63 beq x7,x3,80004034 + 80004020: 4f90346f jal x8,80007d18 + 80004024: 80004014 .word 0x80004014 + 80004028: 00000000 .word 0x00000000 + 8000402c: 80014a9a .word 0x80014a9a + 80004030: 00000000 .word 0x00000000 + 80004034: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x5555555555555555 + 80004038: 0008b503 ld x10,0(x17) + 8000403c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80004040: 0008ba83 ld x21,0(x17) + 80004044: 00888893 addi x17,x17,8 + +0000000080004048 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + packh x26, x10, x21 # perform operation + 80004048: 09557d33 packh x26,x10,x21 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 8000404c: 0007b383 ld x7,0(x15) + 80004050: 01a38c63 beq x7,x26,80004068 + 80004054: 4c50346f jal x8,80007d18 + 80004058: 80004048 .word 0x80004048 + 8000405c: 00000000 .word 0x00000000 + 80004060: 80014b0a .word 0x80014b0a + 80004064: 00000000 .word 0x00000000 + 80004068: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5555555555555555 + 8000406c: 0008bf03 ld x30,0(x17) + 80004070: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80004074: 0008b703 ld x14,0(x17) + 80004078: 00888893 addi x17,x17,8 + +000000008000407c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + packh x26, x30, x14 # perform operation + 8000407c: 08ef7d33 packh x26,x30,x14 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004080: 0007b383 ld x7,0(x15) + 80004084: 01a38c63 beq x7,x26,8000409c + 80004088: 4910346f jal x8,80007d18 + 8000408c: 8000407c .word 0x8000407c + 80004090: 00000000 .word 0x00000000 + 80004094: 80014b7a .word 0x80014b7a + 80004098: 00000000 .word 0x00000000 + 8000409c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x5555555555555555 + 800040a0: 0008bd03 ld x26,0(x17) + 800040a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x5555555555555555 + 800040a8: 0008bd83 ld x27,0(x17) + 800040ac: 00888893 addi x17,x17,8 + +00000000800040b0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + packh x28, x26, x27 # perform operation + 800040b0: 09bd7e33 packh x28,x26,x27 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b4: 0007b383 ld x7,0(x15) + 800040b8: 01c38c63 beq x7,x28,800040d0 + 800040bc: 45d0346f jal x8,80007d18 + 800040c0: 800040b0 .word 0x800040b0 + 800040c4: 00000000 .word 0x00000000 + 800040c8: 80014bea .word 0x80014bea + 800040cc: 00000000 .word 0x00000000 + 800040d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x5555555555555555 + 800040d4: 0008bc03 ld x24,0(x17) + 800040d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x00000000ffffffff + 800040dc: 0008b983 ld x19,0(x17) + 800040e0: 00888893 addi x17,x17,8 + +00000000800040e4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + packh x6, x24, x19 # perform operation + 800040e4: 093c7333 packh x6,x24,x19 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e8: 0007b383 ld x7,0(x15) + 800040ec: 00638c63 beq x7,x6,80004104 + 800040f0: 4290346f jal x8,80007d18 + 800040f4: 800040e4 .word 0x800040e4 + 800040f8: 00000000 .word 0x00000000 + 800040fc: 80014c5a .word 0x80014c5a + 80004100: 00000000 .word 0x00000000 + 80004104: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x5555555555555555 + 80004108: 0008bb83 ld x23,0(x17) + 8000410c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x00000000fffffffe + 80004110: 0008bd03 ld x26,0(x17) + 80004114: 00888893 addi x17,x17,8 + +0000000080004118 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + packh x1, x23, x26 # perform operation + 80004118: 09abf0b3 packh x1,x23,x26 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 8000411c: 0007b383 ld x7,0(x15) + 80004120: 00138c63 beq x7,x1,80004138 + 80004124: 3f50346f jal x8,80007d18 + 80004128: 80004118 .word 0x80004118 + 8000412c: 00000000 .word 0x00000000 + 80004130: 80014cc2 .word 0x80014cc2 + 80004134: 00000000 .word 0x00000000 + 80004138: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x5555555555555555 + 8000413c: 0008ba83 ld x21,0(x17) + 80004140: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000100000000 + 80004144: 0008ba03 ld x20,0(x17) + 80004148: 00888893 addi x17,x17,8 + +000000008000414c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + packh x3, x21, x20 # perform operation + 8000414c: 094af1b3 packh x3,x21,x20 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004150: 0007b383 ld x7,0(x15) + 80004154: 00338c63 beq x7,x3,8000416c + 80004158: 3c10346f jal x8,80007d18 + 8000415c: 8000414c .word 0x8000414c + 80004160: 00000000 .word 0x00000000 + 80004164: 80014d2a .word 0x80014d2a + 80004168: 00000000 .word 0x00000000 + 8000416c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5555555555555555 + 80004170: 0008b703 ld x14,0(x17) + 80004174: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000100000001 + 80004178: 0008b983 ld x19,0(x17) + 8000417c: 00888893 addi x17,x17,8 + +0000000080004180 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + packh x11, x14, x19 # perform operation + 80004180: 093775b3 packh x11,x14,x19 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004184: 0007b383 ld x7,0(x15) + 80004188: 00b38c63 beq x7,x11,800041a0 + 8000418c: 38d0346f jal x8,80007d18 + 80004190: 80004180 .word 0x80004180 + 80004194: 00000000 .word 0x00000000 + 80004198: 80014d93 .word 0x80014d93 + 8000419c: 00000000 .word 0x00000000 + 800041a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x00000000ffffffff + 800041a4: 0008bb03 ld x22,0(x17) + 800041a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000000000000 + 800041ac: 0008b803 ld x16,0(x17) + 800041b0: 00888893 addi x17,x17,8 + +00000000800041b4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + packh x2, x22, x16 # perform operation + 800041b4: 090b7133 packh x2,x22,x16 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b8: 0007b383 ld x7,0(x15) + 800041bc: 00238c63 beq x7,x2,800041d4 + 800041c0: 3590346f jal x8,80007d18 + 800041c4: 800041b4 .word 0x800041b4 + 800041c8: 00000000 .word 0x00000000 + 800041cc: 80014dfc .word 0x80014dfc + 800041d0: 00000000 .word 0x00000000 + 800041d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x00000000ffffffff + 800041d8: 0008b583 ld x11,0(x17) + 800041dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x0000000000000001 + 800041e0: 0008b303 ld x6,0(x17) + 800041e4: 00888893 addi x17,x17,8 + +00000000800041e8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + packh x29, x11, x6 # perform operation + 800041e8: 0865feb3 packh x29,x11,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041ec: 0007b383 ld x7,0(x15) + 800041f0: 01d38c63 beq x7,x29,80004208 + 800041f4: 3250346f jal x8,80007d18 + 800041f8: 800041e8 .word 0x800041e8 + 800041fc: 00000000 .word 0x00000000 + 80004200: 80014e55 .word 0x80014e55 + 80004204: 00000000 .word 0x00000000 + 80004208: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x00000000ffffffff + 8000420c: 0008b203 ld x4,0(x17) + 80004210: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000002 + 80004214: 0008bd83 ld x27,0(x17) + 80004218: 00888893 addi x17,x17,8 + +000000008000421c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + packh x3, x4, x27 # perform operation + 8000421c: 09b271b3 packh x3,x4,x27 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004220: 0007b383 ld x7,0(x15) + 80004224: 00338c63 beq x7,x3,8000423c + 80004228: 2f10346f jal x8,80007d18 + 8000422c: 8000421c .word 0x8000421c + 80004230: 00000000 .word 0x00000000 + 80004234: 80014eae .word 0x80014eae + 80004238: 00000000 .word 0x00000000 + 8000423c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x00000000ffffffff + 80004240: 0008be83 ld x29,0(x17) + 80004244: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x8000000000000000 + 80004248: 0008bb83 ld x23,0(x17) + 8000424c: 00888893 addi x17,x17,8 + +0000000080004250 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + packh x3, x29, x23 # perform operation + 80004250: 097ef1b3 packh x3,x29,x23 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004254: 0007b383 ld x7,0(x15) + 80004258: 00338c63 beq x7,x3,80004270 + 8000425c: 2bd0346f jal x8,80007d18 + 80004260: 80004250 .word 0x80004250 + 80004264: 00000000 .word 0x00000000 + 80004268: 80014f07 .word 0x80014f07 + 8000426c: 00000000 .word 0x00000000 + 80004270: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x00000000ffffffff + 80004274: 0008b683 ld x13,0(x17) + 80004278: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x8000000000000001 + 8000427c: 0008bf83 ld x31,0(x17) + 80004280: 00888893 addi x17,x17,8 + +0000000080004284 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + packh x21, x13, x31 # perform operation + 80004284: 09f6fab3 packh x21,x13,x31 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004288: 0007b383 ld x7,0(x15) + 8000428c: 01538c63 beq x7,x21,800042a4 + 80004290: 2890346f jal x8,80007d18 + 80004294: 80004284 .word 0x80004284 + 80004298: 00000000 .word 0x00000000 + 8000429c: 80014f6f .word 0x80014f6f + 800042a0: 00000000 .word 0x00000000 + 800042a4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x00000000ffffffff + 800042a8: 0008b503 ld x10,0(x17) + 800042ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7fffffffffffffff + 800042b0: 0008b583 ld x11,0(x17) + 800042b4: 00888893 addi x17,x17,8 + +00000000800042b8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + packh x9, x10, x11 # perform operation + 800042b8: 08b574b3 packh x9,x10,x11 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042bc: 0007b383 ld x7,0(x15) + 800042c0: 00938c63 beq x7,x9,800042d8 + 800042c4: 2550346f jal x8,80007d18 + 800042c8: 800042b8 .word 0x800042b8 + 800042cc: 00000000 .word 0x00000000 + 800042d0: 80014fd7 .word 0x80014fd7 + 800042d4: 00000000 .word 0x00000000 + 800042d8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x00000000ffffffff + 800042dc: 0008b983 ld x19,0(x17) + 800042e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x7ffffffffffffffe + 800042e4: 0008b583 ld x11,0(x17) + 800042e8: 00888893 addi x17,x17,8 + +00000000800042ec : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + packh x10, x19, x11 # perform operation + 800042ec: 08b9f533 packh x10,x19,x11 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f0: 0007b383 ld x7,0(x15) + 800042f4: 00a38c63 beq x7,x10,8000430c + 800042f8: 2210346f jal x8,80007d18 + 800042fc: 800042ec .word 0x800042ec + 80004300: 00000000 .word 0x00000000 + 80004304: 8001503f .word 0x8001503f + 80004308: 00000000 .word 0x00000000 + 8000430c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x00000000ffffffff + 80004310: 0008ba83 ld x21,0(x17) + 80004314: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xffffffffffffffff + 80004318: 0008bd03 ld x26,0(x17) + 8000431c: 00888893 addi x17,x17,8 + +0000000080004320 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + packh x31, x21, x26 # perform operation + 80004320: 09aaffb3 packh x31,x21,x26 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004324: 0007b383 ld x7,0(x15) + 80004328: 01f38c63 beq x7,x31,80004340 + 8000432c: 1ed0346f jal x8,80007d18 + 80004330: 80004320 .word 0x80004320 + 80004334: 00000000 .word 0x00000000 + 80004338: 800150a7 .word 0x800150a7 + 8000433c: 00000000 .word 0x00000000 + 80004340: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x00000000ffffffff + 80004344: 0008bb03 ld x22,0(x17) + 80004348: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xfffffffffffffffe + 8000434c: 0008bb83 ld x23,0(x17) + 80004350: 00888893 addi x17,x17,8 + +0000000080004354 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + packh x14, x22, x23 # perform operation + 80004354: 097b7733 packh x14,x22,x23 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004358: 0007b383 ld x7,0(x15) + 8000435c: 00e38c63 beq x7,x14,80004374 + 80004360: 1b90346f jal x8,80007d18 + 80004364: 80004354 .word 0x80004354 + 80004368: 00000000 .word 0x00000000 + 8000436c: 8001510f .word 0x8001510f + 80004370: 00000000 .word 0x00000000 + 80004374: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x00000000ffffffff + 80004378: 0008bc83 ld x25,0(x17) + 8000437c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80004380: 0008bc03 ld x24,0(x17) + 80004384: 00888893 addi x17,x17,8 + +0000000080004388 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + packh x31, x25, x24 # perform operation + 80004388: 098cffb3 packh x31,x25,x24 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000438c: 0007b383 ld x7,0(x15) + 80004390: 01f38c63 beq x7,x31,800043a8 + 80004394: 1850346f jal x8,80007d18 + 80004398: 80004388 .word 0x80004388 + 8000439c: 00000000 .word 0x00000000 + 800043a0: 80015177 .word 0x80015177 + 800043a4: 00000000 .word 0x00000000 + 800043a8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x00000000ffffffff + 800043ac: 0008b503 ld x10,0(x17) + 800043b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 800043b4: 0008be03 ld x28,0(x17) + 800043b8: 00888893 addi x17,x17,8 + +00000000800043bc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + packh x23, x10, x28 # perform operation + 800043bc: 09c57bb3 packh x23,x10,x28 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c0: 0007b383 ld x7,0(x15) + 800043c4: 01738c63 beq x7,x23,800043dc + 800043c8: 1510346f jal x8,80007d18 + 800043cc: 800043bc .word 0x800043bc + 800043d0: 00000000 .word 0x00000000 + 800043d4: 800151df .word 0x800151df + 800043d8: 00000000 .word 0x00000000 + 800043dc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x00000000ffffffff + 800043e0: 0008bc83 ld x25,0(x17) + 800043e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x5555555555555555 + 800043e8: 0008bc03 ld x24,0(x17) + 800043ec: 00888893 addi x17,x17,8 + +00000000800043f0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + packh x10, x25, x24 # perform operation + 800043f0: 098cf533 packh x10,x25,x24 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f4: 0007b383 ld x7,0(x15) + 800043f8: 00a38c63 beq x7,x10,80004410 + 800043fc: 11d0346f jal x8,80007d18 + 80004400: 800043f0 .word 0x800043f0 + 80004404: 00000000 .word 0x00000000 + 80004408: 80015247 .word 0x80015247 + 8000440c: 00000000 .word 0x00000000 + 80004410: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x00000000ffffffff + 80004414: 0008b483 ld x9,0(x17) + 80004418: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x00000000ffffffff + 8000441c: 0008bd83 ld x27,0(x17) + 80004420: 00888893 addi x17,x17,8 + +0000000080004424 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + packh x2, x9, x27 # perform operation + 80004424: 09b4f133 packh x2,x9,x27 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004428: 0007b383 ld x7,0(x15) + 8000442c: 00238c63 beq x7,x2,80004444 + 80004430: 0e90346f jal x8,80007d18 + 80004434: 80004424 .word 0x80004424 + 80004438: 00000000 .word 0x00000000 + 8000443c: 800152af .word 0x800152af + 80004440: 00000000 .word 0x00000000 + 80004444: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x00000000ffffffff + 80004448: 0008bc03 ld x24,0(x17) + 8000444c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x00000000fffffffe + 80004450: 0008bc83 ld x25,0(x17) + 80004454: 00888893 addi x17,x17,8 + +0000000080004458 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + packh x13, x24, x25 # perform operation + 80004458: 099c76b3 packh x13,x24,x25 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 8000445c: 0007b383 ld x7,0(x15) + 80004460: 00d38c63 beq x7,x13,80004478 + 80004464: 0b50346f jal x8,80007d18 + 80004468: 80004458 .word 0x80004458 + 8000446c: 00000000 .word 0x00000000 + 80004470: 8001530f .word 0x8001530f + 80004474: 00000000 .word 0x00000000 + 80004478: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x00000000ffffffff + 8000447c: 0008b283 ld x5,0(x17) + 80004480: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x0000000100000000 + 80004484: 0008ba83 ld x21,0(x17) + 80004488: 00888893 addi x17,x17,8 + +000000008000448c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + packh x26, x5, x21 # perform operation + 8000448c: 0952fd33 packh x26,x5,x21 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004490: 0007b383 ld x7,0(x15) + 80004494: 01a38c63 beq x7,x26,800044ac + 80004498: 0810346f jal x8,80007d18 + 8000449c: 8000448c .word 0x8000448c + 800044a0: 00000000 .word 0x00000000 + 800044a4: 8001536f .word 0x8001536f + 800044a8: 00000000 .word 0x00000000 + 800044ac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000ffffffff + 800044b0: 0008b703 ld x14,0(x17) + 800044b4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x0000000100000001 + 800044b8: 0008b683 ld x13,0(x17) + 800044bc: 00888893 addi x17,x17,8 + +00000000800044c0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + packh x2, x14, x13 # perform operation + 800044c0: 08d77133 packh x2,x14,x13 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c4: 0007b383 ld x7,0(x15) + 800044c8: 00238c63 beq x7,x2,800044e0 + 800044cc: 04d0346f jal x8,80007d18 + 800044d0: 800044c0 .word 0x800044c0 + 800044d4: 00000000 .word 0x00000000 + 800044d8: 800153d0 .word 0x800153d0 + 800044dc: 00000000 .word 0x00000000 + 800044e0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x00000000fffffffe + 800044e4: 0008bd83 ld x27,0(x17) + 800044e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000000000000 + 800044ec: 0008b083 ld x1,0(x17) + 800044f0: 00888893 addi x17,x17,8 + +00000000800044f4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + packh x21, x27, x1 # perform operation + 800044f4: 081dfab3 packh x21,x27,x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f8: 0007b383 ld x7,0(x15) + 800044fc: 01538c63 beq x7,x21,80004514 + 80004500: 0190346f jal x8,80007d18 + 80004504: 800044f4 .word 0x800044f4 + 80004508: 00000000 .word 0x00000000 + 8000450c: 80015431 .word 0x80015431 + 80004510: 00000000 .word 0x00000000 + 80004514: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x00000000fffffffe + 80004518: 0008bb03 ld x22,0(x17) + 8000451c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x0000000000000001 + 80004520: 0008bc83 ld x25,0(x17) + 80004524: 00888893 addi x17,x17,8 + +0000000080004528 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + packh x1, x22, x25 # perform operation + 80004528: 099b70b3 packh x1,x22,x25 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 8000452c: 0007b383 ld x7,0(x15) + 80004530: 00138c63 beq x7,x1,80004548 + 80004534: 7e40346f jal x8,80007d18 + 80004538: 80004528 .word 0x80004528 + 8000453c: 00000000 .word 0x00000000 + 80004540: 8001548a .word 0x8001548a + 80004544: 00000000 .word 0x00000000 + 80004548: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x00000000fffffffe + 8000454c: 0008bf83 ld x31,0(x17) + 80004550: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000002 + 80004554: 0008be83 ld x29,0(x17) + 80004558: 00888893 addi x17,x17,8 + +000000008000455c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + packh x30, x31, x29 # perform operation + 8000455c: 09dfff33 packh x30,x31,x29 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004560: 0007b383 ld x7,0(x15) + 80004564: 01e38c63 beq x7,x30,8000457c + 80004568: 7b00346f jal x8,80007d18 + 8000456c: 8000455c .word 0x8000455c + 80004570: 00000000 .word 0x00000000 + 80004574: 800154e3 .word 0x800154e3 + 80004578: 00000000 .word 0x00000000 + 8000457c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x00000000fffffffe + 80004580: 0008be03 ld x28,0(x17) + 80004584: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x8000000000000000 + 80004588: 0008b083 ld x1,0(x17) + 8000458c: 00888893 addi x17,x17,8 + +0000000080004590 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + packh x21, x28, x1 # perform operation + 80004590: 081e7ab3 packh x21,x28,x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x21, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004594: 0007b383 ld x7,0(x15) + 80004598: 01538c63 beq x7,x21,800045b0 + 8000459c: 77c0346f jal x8,80007d18 + 800045a0: 80004590 .word 0x80004590 + 800045a4: 00000000 .word 0x00000000 + 800045a8: 8001553c .word 0x8001553c + 800045ac: 00000000 .word 0x00000000 + 800045b0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x00000000fffffffe + 800045b4: 0008be83 ld x29,0(x17) + 800045b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x8000000000000001 + 800045bc: 0008ba83 ld x21,0(x17) + 800045c0: 00888893 addi x17,x17,8 + +00000000800045c4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + packh x28, x29, x21 # perform operation + 800045c4: 095efe33 packh x28,x29,x21 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c8: 0007b383 ld x7,0(x15) + 800045cc: 01c38c63 beq x7,x28,800045e4 + 800045d0: 7480346f jal x8,80007d18 + 800045d4: 800045c4 .word 0x800045c4 + 800045d8: 00000000 .word 0x00000000 + 800045dc: 800155a4 .word 0x800155a4 + 800045e0: 00000000 .word 0x00000000 + 800045e4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000fffffffe + 800045e8: 0008b703 ld x14,0(x17) + 800045ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x7fffffffffffffff + 800045f0: 0008be83 ld x29,0(x17) + 800045f4: 00888893 addi x17,x17,8 + +00000000800045f8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + packh x25, x14, x29 # perform operation + 800045f8: 09d77cb3 packh x25,x14,x29 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045fc: 0007b383 ld x7,0(x15) + 80004600: 01938c63 beq x7,x25,80004618 + 80004604: 7140346f jal x8,80007d18 + 80004608: 800045f8 .word 0x800045f8 + 8000460c: 00000000 .word 0x00000000 + 80004610: 8001560c .word 0x8001560c + 80004614: 00000000 .word 0x00000000 + 80004618: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x00000000fffffffe + 8000461c: 0008b503 ld x10,0(x17) + 80004620: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80004624: 0008bf03 ld x30,0(x17) + 80004628: 00888893 addi x17,x17,8 + +000000008000462c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + packh x20, x10, x30 # perform operation + 8000462c: 09e57a33 packh x20,x10,x30 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004630: 0007b383 ld x7,0(x15) + 80004634: 01438c63 beq x7,x20,8000464c + 80004638: 6e00346f jal x8,80007d18 + 8000463c: 8000462c .word 0x8000462c + 80004640: 00000000 .word 0x00000000 + 80004644: 80015674 .word 0x80015674 + 80004648: 00000000 .word 0x00000000 + 8000464c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x00000000fffffffe + 80004650: 0008b083 ld x1,0(x17) + 80004654: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xffffffffffffffff + 80004658: 0008b683 ld x13,0(x17) + 8000465c: 00888893 addi x17,x17,8 + +0000000080004660 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + packh x28, x1, x13 # perform operation + 80004660: 08d0fe33 packh x28,x1,x13 + # Check if x28 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x28, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004664: 0007b383 ld x7,0(x15) + 80004668: 01c38c63 beq x7,x28,80004680 + 8000466c: 6ac0346f jal x8,80007d18 + 80004670: 80004660 .word 0x80004660 + 80004674: 00000000 .word 0x00000000 + 80004678: 800156dc .word 0x800156dc + 8000467c: 00000000 .word 0x00000000 + 80004680: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x00000000fffffffe + 80004684: 0008ba83 ld x21,0(x17) + 80004688: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xfffffffffffffffe + 8000468c: 0008be03 ld x28,0(x17) + 80004690: 00888893 addi x17,x17,8 + +0000000080004694 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + packh x16, x21, x28 # perform operation + 80004694: 09caf833 packh x16,x21,x28 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004698: 0007b383 ld x7,0(x15) + 8000469c: 01038c63 beq x7,x16,800046b4 + 800046a0: 6780346f jal x8,80007d18 + 800046a4: 80004694 .word 0x80004694 + 800046a8: 00000000 .word 0x00000000 + 800046ac: 80015744 .word 0x80015744 + 800046b0: 00000000 .word 0x00000000 + 800046b4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000fffffffe + 800046b8: 0008b703 ld x14,0(x17) + 800046bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 800046c0: 0008b183 ld x3,0(x17) + 800046c4: 00888893 addi x17,x17,8 + +00000000800046c8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + packh x29, x14, x3 # perform operation + 800046c8: 08377eb3 packh x29,x14,x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046cc: 0007b383 ld x7,0(x15) + 800046d0: 01d38c63 beq x7,x29,800046e8 + 800046d4: 6440346f jal x8,80007d18 + 800046d8: 800046c8 .word 0x800046c8 + 800046dc: 00000000 .word 0x00000000 + 800046e0: 800157ac .word 0x800157ac + 800046e4: 00000000 .word 0x00000000 + 800046e8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x00000000fffffffe + 800046ec: 0008b803 ld x16,0(x17) + 800046f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 800046f4: 0008b103 ld x2,0(x17) + 800046f8: 00888893 addi x17,x17,8 + +00000000800046fc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + packh x27, x16, x2 # perform operation + 800046fc: 08287db3 packh x27,x16,x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004700: 0007b383 ld x7,0(x15) + 80004704: 01b38c63 beq x7,x27,8000471c + 80004708: 6100346f jal x8,80007d18 + 8000470c: 800046fc .word 0x800046fc + 80004710: 00000000 .word 0x00000000 + 80004714: 80015814 .word 0x80015814 + 80004718: 00000000 .word 0x00000000 + 8000471c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x00000000fffffffe + 80004720: 0008b683 ld x13,0(x17) + 80004724: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x5555555555555555 + 80004728: 0008ba03 ld x20,0(x17) + 8000472c: 00888893 addi x17,x17,8 + +0000000080004730 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + packh x22, x13, x20 # perform operation + 80004730: 0946fb33 packh x22,x13,x20 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004734: 0007b383 ld x7,0(x15) + 80004738: 01638c63 beq x7,x22,80004750 + 8000473c: 5dc0346f jal x8,80007d18 + 80004740: 80004730 .word 0x80004730 + 80004744: 00000000 .word 0x00000000 + 80004748: 8001587c .word 0x8001587c + 8000474c: 00000000 .word 0x00000000 + 80004750: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x00000000fffffffe + 80004754: 0008b203 ld x4,0(x17) + 80004758: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x00000000ffffffff + 8000475c: 0008be83 ld x29,0(x17) + 80004760: 00888893 addi x17,x17,8 + +0000000080004764 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + packh x27, x4, x29 # perform operation + 80004764: 09d27db3 packh x27,x4,x29 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004768: 0007b383 ld x7,0(x15) + 8000476c: 01b38c63 beq x7,x27,80004784 + 80004770: 5a80346f jal x8,80007d18 + 80004774: 80004764 .word 0x80004764 + 80004778: 00000000 .word 0x00000000 + 8000477c: 800158e4 .word 0x800158e4 + 80004780: 00000000 .word 0x00000000 + 80004784: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x00000000fffffffe + 80004788: 0008bb83 ld x23,0(x17) + 8000478c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x00000000fffffffe + 80004790: 0008b803 ld x16,0(x17) + 80004794: 00888893 addi x17,x17,8 + +0000000080004798 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + packh x24, x23, x16 # perform operation + 80004798: 090bfc33 packh x24,x23,x16 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 8000479c: 0007b383 ld x7,0(x15) + 800047a0: 01838c63 beq x7,x24,800047b8 + 800047a4: 5740346f jal x8,80007d18 + 800047a8: 80004798 .word 0x80004798 + 800047ac: 00000000 .word 0x00000000 + 800047b0: 80015944 .word 0x80015944 + 800047b4: 00000000 .word 0x00000000 + 800047b8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x00000000fffffffe + 800047bc: 0008b903 ld x18,0(x17) + 800047c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x0000000100000000 + 800047c4: 0008b683 ld x13,0(x17) + 800047c8: 00888893 addi x17,x17,8 + +00000000800047cc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + packh x4, x18, x13 # perform operation + 800047cc: 08d97233 packh x4,x18,x13 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d0: 0007b383 ld x7,0(x15) + 800047d4: 00438c63 beq x7,x4,800047ec + 800047d8: 5400346f jal x8,80007d18 + 800047dc: 800047cc .word 0x800047cc + 800047e0: 00000000 .word 0x00000000 + 800047e4: 800159a4 .word 0x800159a4 + 800047e8: 00000000 .word 0x00000000 + 800047ec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x00000000fffffffe + 800047f0: 0008b283 ld x5,0(x17) + 800047f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x0000000100000001 + 800047f8: 0008bc03 ld x24,0(x17) + 800047fc: 00888893 addi x17,x17,8 + +0000000080004800 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + packh x26, x5, x24 # perform operation + 80004800: 0982fd33 packh x26,x5,x24 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004804: 0007b383 ld x7,0(x15) + 80004808: 01a38c63 beq x7,x26,80004820 + 8000480c: 50c0346f jal x8,80007d18 + 80004810: 80004800 .word 0x80004800 + 80004814: 00000000 .word 0x00000000 + 80004818: 80015a05 .word 0x80015a05 + 8000481c: 00000000 .word 0x00000000 + 80004820: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000100000000 + 80004824: 0008bb03 ld x22,0(x17) + 80004828: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000000000000 + 8000482c: 0008bf03 ld x30,0(x17) + 80004830: 00888893 addi x17,x17,8 + +0000000080004834 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + packh x9, x22, x30 # perform operation + 80004834: 09eb74b3 packh x9,x22,x30 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004838: 0007b383 ld x7,0(x15) + 8000483c: 00938c63 beq x7,x9,80004854 + 80004840: 4d80346f jal x8,80007d18 + 80004844: 80004834 .word 0x80004834 + 80004848: 00000000 .word 0x00000000 + 8000484c: 80015a66 .word 0x80015a66 + 80004850: 00000000 .word 0x00000000 + 80004854: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000100000000 + 80004858: 0008be83 ld x29,0(x17) + 8000485c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x0000000000000001 + 80004860: 0008b303 ld x6,0(x17) + 80004864: 00888893 addi x17,x17,8 + +0000000080004868 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + packh x5, x29, x6 # perform operation + 80004868: 086ef2b3 packh x5,x29,x6 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 8000486c: 0007b383 ld x7,0(x15) + 80004870: 00538c63 beq x7,x5,80004888 + 80004874: 4a40346f jal x8,80007d18 + 80004878: 80004868 .word 0x80004868 + 8000487c: 00000000 .word 0x00000000 + 80004880: 80015ac0 .word 0x80015ac0 + 80004884: 00000000 .word 0x00000000 + 80004888: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000100000000 + 8000488c: 0008be83 ld x29,0(x17) + 80004890: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000000000002 + 80004894: 0008bd03 ld x26,0(x17) + 80004898: 00888893 addi x17,x17,8 + +000000008000489c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + packh x11, x29, x26 # perform operation + 8000489c: 09aef5b3 packh x11,x29,x26 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a0: 0007b383 ld x7,0(x15) + 800048a4: 00b38c63 beq x7,x11,800048bc + 800048a8: 4700346f jal x8,80007d18 + 800048ac: 8000489c .word 0x8000489c + 800048b0: 00000000 .word 0x00000000 + 800048b4: 80015b1a .word 0x80015b1a + 800048b8: 00000000 .word 0x00000000 + 800048bc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000100000000 + 800048c0: 0008be83 ld x29,0(x17) + 800048c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x8000000000000000 + 800048c8: 0008ba83 ld x21,0(x17) + 800048cc: 00888893 addi x17,x17,8 + +00000000800048d0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + packh x23, x29, x21 # perform operation + 800048d0: 095efbb3 packh x23,x29,x21 + # Check if x23 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x23, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d4: 0007b383 ld x7,0(x15) + 800048d8: 01738c63 beq x7,x23,800048f0 + 800048dc: 43c0346f jal x8,80007d18 + 800048e0: 800048d0 .word 0x800048d0 + 800048e4: 00000000 .word 0x00000000 + 800048e8: 80015b74 .word 0x80015b74 + 800048ec: 00000000 .word 0x00000000 + 800048f0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000000 + 800048f4: 0008b583 ld x11,0(x17) + 800048f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000001 + 800048fc: 0008b803 ld x16,0(x17) + 80004900: 00888893 addi x17,x17,8 + +0000000080004904 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + packh x19, x11, x16 # perform operation + 80004904: 0905f9b3 packh x19,x11,x16 + # Check if x19 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x19, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004908: 0007b383 ld x7,0(x15) + 8000490c: 01338c63 beq x7,x19,80004924 + 80004910: 4080346f jal x8,80007d18 + 80004914: 80004904 .word 0x80004904 + 80004918: 00000000 .word 0x00000000 + 8000491c: 80015bdd .word 0x80015bdd + 80004920: 00000000 .word 0x00000000 + 80004924: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000000 + 80004928: 0008b583 ld x11,0(x17) + 8000492c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7fffffffffffffff + 80004930: 0008b903 ld x18,0(x17) + 80004934: 00888893 addi x17,x17,8 + +0000000080004938 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + packh x2, x11, x18 # perform operation + 80004938: 0925f133 packh x2,x11,x18 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 8000493c: 0007b383 ld x7,0(x15) + 80004940: 00238c63 beq x7,x2,80004958 + 80004944: 3d40346f jal x8,80007d18 + 80004948: 80004938 .word 0x80004938 + 8000494c: 00000000 .word 0x00000000 + 80004950: 80015c46 .word 0x80015c46 + 80004954: 00000000 .word 0x00000000 + 80004958: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000100000000 + 8000495c: 0008be03 ld x28,0(x17) + 80004960: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80004964: 0008b303 ld x6,0(x17) + 80004968: 00888893 addi x17,x17,8 + +000000008000496c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + packh x29, x28, x6 # perform operation + 8000496c: 086e7eb3 packh x29,x28,x6 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004970: 0007b383 ld x7,0(x15) + 80004974: 01d38c63 beq x7,x29,8000498c + 80004978: 3a00346f jal x8,80007d18 + 8000497c: 8000496c .word 0x8000496c + 80004980: 00000000 .word 0x00000000 + 80004984: 80015caf .word 0x80015caf + 80004988: 00000000 .word 0x00000000 + 8000498c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x0000000100000000 + 80004990: 0008b203 ld x4,0(x17) + 80004994: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xffffffffffffffff + 80004998: 0008b503 ld x10,0(x17) + 8000499c: 00888893 addi x17,x17,8 + +00000000800049a0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + packh x12, x4, x10 # perform operation + 800049a0: 08a27633 packh x12,x4,x10 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a4: 0007b383 ld x7,0(x15) + 800049a8: 00c38c63 beq x7,x12,800049c0 + 800049ac: 36c0346f jal x8,80007d18 + 800049b0: 800049a0 .word 0x800049a0 + 800049b4: 00000000 .word 0x00000000 + 800049b8: 80015d18 .word 0x80015d18 + 800049bc: 00000000 .word 0x00000000 + 800049c0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000100000000 + 800049c4: 0008bb03 ld x22,0(x17) + 800049c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xfffffffffffffffe + 800049cc: 0008b103 ld x2,0(x17) + 800049d0: 00888893 addi x17,x17,8 + +00000000800049d4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + packh x26, x22, x2 # perform operation + 800049d4: 082b7d33 packh x26,x22,x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d8: 0007b383 ld x7,0(x15) + 800049dc: 01a38c63 beq x7,x26,800049f4 + 800049e0: 3380346f jal x8,80007d18 + 800049e4: 800049d4 .word 0x800049d4 + 800049e8: 00000000 .word 0x00000000 + 800049ec: 80015d81 .word 0x80015d81 + 800049f0: 00000000 .word 0x00000000 + 800049f4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000100000000 + 800049f8: 0008bc83 ld x25,0(x17) + 800049fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x5bbc887763ae86f2 + 80004a00: 0008b203 ld x4,0(x17) + 80004a04: 00888893 addi x17,x17,8 + +0000000080004a08 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + packh x6, x25, x4 # perform operation + 80004a08: 084cf333 packh x6,x25,x4 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a0c: 0007b383 ld x7,0(x15) + 80004a10: 00638c63 beq x7,x6,80004a28 + 80004a14: 3040346f jal x8,80007d18 + 80004a18: 80004a08 .word 0x80004a08 + 80004a1c: 00000000 .word 0x00000000 + 80004a20: 80015dea .word 0x80015dea + 80004a24: 00000000 .word 0x00000000 + 80004a28: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000000 + 80004a2c: 0008b583 ld x11,0(x17) + 80004a30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xaaaaaaaaaaaaaaaa + 80004a34: 0008b283 ld x5,0(x17) + 80004a38: 00888893 addi x17,x17,8 + +0000000080004a3c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + packh x3, x11, x5 # perform operation + 80004a3c: 0855f1b3 packh x3,x11,x5 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a40: 0007b383 ld x7,0(x15) + 80004a44: 00338c63 beq x7,x3,80004a5c + 80004a48: 2d00346f jal x8,80007d18 + 80004a4c: 80004a3c .word 0x80004a3c + 80004a50: 00000000 .word 0x00000000 + 80004a54: 80015e53 .word 0x80015e53 + 80004a58: 00000000 .word 0x00000000 + 80004a5c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000100000000 + 80004a60: 0008b703 ld x14,0(x17) + 80004a64: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x5555555555555555 + 80004a68: 0008b083 ld x1,0(x17) + 80004a6c: 00888893 addi x17,x17,8 + +0000000080004a70 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + packh x26, x14, x1 # perform operation + 80004a70: 08177d33 packh x26,x14,x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a74: 0007b383 ld x7,0(x15) + 80004a78: 01a38c63 beq x7,x26,80004a90 + 80004a7c: 29c0346f jal x8,80007d18 + 80004a80: 80004a70 .word 0x80004a70 + 80004a84: 00000000 .word 0x00000000 + 80004a88: 80015ebc .word 0x80015ebc + 80004a8c: 00000000 .word 0x00000000 + 80004a90: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000100000000 + 80004a94: 0008bb03 ld x22,0(x17) + 80004a98: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x00000000ffffffff + 80004a9c: 0008b603 ld x12,0(x17) + 80004aa0: 00888893 addi x17,x17,8 + +0000000080004aa4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + packh x16, x22, x12 # perform operation + 80004aa4: 08cb7833 packh x16,x22,x12 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa8: 0007b383 ld x7,0(x15) + 80004aac: 01038c63 beq x7,x16,80004ac4 + 80004ab0: 2680346f jal x8,80007d18 + 80004ab4: 80004aa4 .word 0x80004aa4 + 80004ab8: 00000000 .word 0x00000000 + 80004abc: 80015f25 .word 0x80015f25 + 80004ac0: 00000000 .word 0x00000000 + 80004ac4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000100000000 + 80004ac8: 0008b183 ld x3,0(x17) + 80004acc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x00000000fffffffe + 80004ad0: 0008b083 ld x1,0(x17) + 80004ad4: 00888893 addi x17,x17,8 + +0000000080004ad8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + packh x26, x3, x1 # perform operation + 80004ad8: 0811fd33 packh x26,x3,x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x26, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004adc: 0007b383 ld x7,0(x15) + 80004ae0: 01a38c63 beq x7,x26,80004af8 + 80004ae4: 2340346f jal x8,80007d18 + 80004ae8: 80004ad8 .word 0x80004ad8 + 80004aec: 00000000 .word 0x00000000 + 80004af0: 80015f86 .word 0x80015f86 + 80004af4: 00000000 .word 0x00000000 + 80004af8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000100000000 + 80004afc: 0008be03 ld x28,0(x17) + 80004b00: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000100000000 + 80004b04: 0008b083 ld x1,0(x17) + 80004b08: 00888893 addi x17,x17,8 + +0000000080004b0c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + packh x4, x28, x1 # perform operation + 80004b0c: 081e7233 packh x4,x28,x1 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b10: 0007b383 ld x7,0(x15) + 80004b14: 00438c63 beq x7,x4,80004b2c + 80004b18: 2000346f jal x8,80007d18 + 80004b1c: 80004b0c .word 0x80004b0c + 80004b20: 00000000 .word 0x00000000 + 80004b24: 80015fe7 .word 0x80015fe7 + 80004b28: 00000000 .word 0x00000000 + 80004b2c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000100000000 + 80004b30: 0008be03 ld x28,0(x17) + 80004b34: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000100000001 + 80004b38: 0008b583 ld x11,0(x17) + 80004b3c: 00888893 addi x17,x17,8 + +0000000080004b40 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + packh x27, x28, x11 # perform operation + 80004b40: 08be7db3 packh x27,x28,x11 + # Check if x27 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x27, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b44: 0007b383 ld x7,0(x15) + 80004b48: 01b38c63 beq x7,x27,80004b60 + 80004b4c: 1cc0346f jal x8,80007d18 + 80004b50: 80004b40 .word 0x80004b40 + 80004b54: 00000000 .word 0x00000000 + 80004b58: 80016049 .word 0x80016049 + 80004b5c: 00000000 .word 0x00000000 + 80004b60: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000100000001 + 80004b64: 0008b903 ld x18,0(x17) + 80004b68: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000000 + 80004b6c: 0008bd83 ld x27,0(x17) + 80004b70: 00888893 addi x17,x17,8 + +0000000080004b74 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + packh x2, x18, x27 # perform operation + 80004b74: 09b97133 packh x2,x18,x27 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b78: 0007b383 ld x7,0(x15) + 80004b7c: 00238c63 beq x7,x2,80004b94 + 80004b80: 1980346f jal x8,80007d18 + 80004b84: 80004b74 .word 0x80004b74 + 80004b88: 00000000 .word 0x00000000 + 80004b8c: 800160ab .word 0x800160ab + 80004b90: 00000000 .word 0x00000000 + 80004b94: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000100000001 + 80004b98: 0008bf83 ld x31,0(x17) + 80004b9c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000000000001 + 80004ba0: 0008bb03 ld x22,0(x17) + 80004ba4: 00888893 addi x17,x17,8 + +0000000080004ba8 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + packh x2, x31, x22 # perform operation + 80004ba8: 096ff133 packh x2,x31,x22 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bac: 0007b383 ld x7,0(x15) + 80004bb0: 00238c63 beq x7,x2,80004bc8 + 80004bb4: 1640346f jal x8,80007d18 + 80004bb8: 80004ba8 .word 0x80004ba8 + 80004bbc: 00000000 .word 0x00000000 + 80004bc0: 80016105 .word 0x80016105 + 80004bc4: 00000000 .word 0x00000000 + 80004bc8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000100000001 + 80004bcc: 0008b903 ld x18,0(x17) + 80004bd0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0000000000000002 + 80004bd4: 0008b283 ld x5,0(x17) + 80004bd8: 00888893 addi x17,x17,8 + +0000000080004bdc : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + packh x30, x18, x5 # perform operation + 80004bdc: 08597f33 packh x30,x18,x5 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be0: 0007b383 ld x7,0(x15) + 80004be4: 01e38c63 beq x7,x30,80004bfc + 80004be8: 1300346f jal x8,80007d18 + 80004bec: 80004bdc .word 0x80004bdc + 80004bf0: 00000000 .word 0x00000000 + 80004bf4: 8001615f .word 0x8001615f + 80004bf8: 00000000 .word 0x00000000 + 80004bfc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000100000001 + 80004c00: 0008bc03 ld x24,0(x17) + 80004c04: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000000 + 80004c08: 0008b803 ld x16,0(x17) + 80004c0c: 00888893 addi x17,x17,8 + +0000000080004c10 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + packh x1, x24, x16 # perform operation + 80004c10: 090c70b3 packh x1,x24,x16 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c14: 0007b383 ld x7,0(x15) + 80004c18: 00138c63 beq x7,x1,80004c30 + 80004c1c: 0fc0346f jal x8,80007d18 + 80004c20: 80004c10 .word 0x80004c10 + 80004c24: 00000000 .word 0x00000000 + 80004c28: 800161b9 .word 0x800161b9 + 80004c2c: 00000000 .word 0x00000000 + 80004c30: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000100000001 + 80004c34: 0008b483 ld x9,0(x17) + 80004c38: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000001 + 80004c3c: 0008b803 ld x16,0(x17) + 80004c40: 00888893 addi x17,x17,8 + +0000000080004c44 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + packh x11, x9, x16 # perform operation + 80004c44: 0904f5b3 packh x11,x9,x16 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c48: 0007b383 ld x7,0(x15) + 80004c4c: 00b38c63 beq x7,x11,80004c64 + 80004c50: 0c80346f jal x8,80007d18 + 80004c54: 80004c44 .word 0x80004c44 + 80004c58: 00000000 .word 0x00000000 + 80004c5c: 80016222 .word 0x80016222 + 80004c60: 00000000 .word 0x00000000 + 80004c64: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004c68: 0008b583 ld x11,0(x17) + 80004c6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x7fffffffffffffff + 80004c70: 0008b483 ld x9,0(x17) + 80004c74: 00888893 addi x17,x17,8 + +0000000080004c78 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + packh x29, x11, x9 # perform operation + 80004c78: 0895feb3 packh x29,x11,x9 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c7c: 0007b383 ld x7,0(x15) + 80004c80: 01d38c63 beq x7,x29,80004c98 + 80004c84: 0940346f jal x8,80007d18 + 80004c88: 80004c78 .word 0x80004c78 + 80004c8c: 00000000 .word 0x00000000 + 80004c90: 8001628b .word 0x8001628b + 80004c94: 00000000 .word 0x00000000 + 80004c98: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0000000100000001 + 80004c9c: 0008ba03 ld x20,0(x17) + 80004ca0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80004ca4: 0008b103 ld x2,0(x17) + 80004ca8: 00888893 addi x17,x17,8 + +0000000080004cac : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + packh x9, x20, x2 # perform operation + 80004cac: 082a74b3 packh x9,x20,x2 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb0: 0007b383 ld x7,0(x15) + 80004cb4: 00938c63 beq x7,x9,80004ccc + 80004cb8: 0600346f jal x8,80007d18 + 80004cbc: 80004cac .word 0x80004cac + 80004cc0: 00000000 .word 0x00000000 + 80004cc4: 800162f4 .word 0x800162f4 + 80004cc8: 00000000 .word 0x00000000 + 80004ccc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000100000001 + 80004cd0: 0008b603 ld x12,0(x17) + 80004cd4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xffffffffffffffff + 80004cd8: 0008b503 ld x10,0(x17) + 80004cdc: 00888893 addi x17,x17,8 + +0000000080004ce0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + packh x16, x12, x10 # perform operation + 80004ce0: 08a67833 packh x16,x12,x10 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce4: 0007b383 ld x7,0(x15) + 80004ce8: 01038c63 beq x7,x16,80004d00 + 80004cec: 02c0346f jal x8,80007d18 + 80004cf0: 80004ce0 .word 0x80004ce0 + 80004cf4: 00000000 .word 0x00000000 + 80004cf8: 8001635d .word 0x8001635d + 80004cfc: 00000000 .word 0x00000000 + 80004d00: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000100000001 + 80004d04: 0008bc03 ld x24,0(x17) + 80004d08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xfffffffffffffffe + 80004d0c: 0008b503 ld x10,0(x17) + 80004d10: 00888893 addi x17,x17,8 + +0000000080004d14 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + packh x25, x24, x10 # perform operation + 80004d14: 08ac7cb3 packh x25,x24,x10 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d18: 0007b383 ld x7,0(x15) + 80004d1c: 01938c63 beq x7,x25,80004d34 + 80004d20: 7f90246f jal x8,80007d18 + 80004d24: 80004d14 .word 0x80004d14 + 80004d28: 00000000 .word 0x00000000 + 80004d2c: 800163c6 .word 0x800163c6 + 80004d30: 00000000 .word 0x00000000 + 80004d34: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000100000001 + 80004d38: 0008b183 ld x3,0(x17) + 80004d3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004d40: 0008b683 ld x13,0(x17) + 80004d44: 00888893 addi x17,x17,8 + +0000000080004d48 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + packh x1, x3, x13 # perform operation + 80004d48: 08d1f0b3 packh x1,x3,x13 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d4c: 0007b383 ld x7,0(x15) + 80004d50: 00138c63 beq x7,x1,80004d68 + 80004d54: 7c50246f jal x8,80007d18 + 80004d58: 80004d48 .word 0x80004d48 + 80004d5c: 00000000 .word 0x00000000 + 80004d60: 8001642f .word 0x8001642f + 80004d64: 00000000 .word 0x00000000 + 80004d68: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000100000001 + 80004d6c: 0008bc83 ld x25,0(x17) + 80004d70: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xaaaaaaaaaaaaaaaa + 80004d74: 0008b283 ld x5,0(x17) + 80004d78: 00888893 addi x17,x17,8 + +0000000080004d7c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + packh x9, x25, x5 # perform operation + 80004d7c: 085cf4b3 packh x9,x25,x5 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d80: 0007b383 ld x7,0(x15) + 80004d84: 00938c63 beq x7,x9,80004d9c + 80004d88: 7910246f jal x8,80007d18 + 80004d8c: 80004d7c .word 0x80004d7c + 80004d90: 00000000 .word 0x00000000 + 80004d94: 80016498 .word 0x80016498 + 80004d98: 00000000 .word 0x00000000 + 80004d9c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000100000001 + 80004da0: 0008b183 ld x3,0(x17) + 80004da4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x5555555555555555 + 80004da8: 0008b283 ld x5,0(x17) + 80004dac: 00888893 addi x17,x17,8 + +0000000080004db0 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + packh x13, x3, x5 # perform operation + 80004db0: 0851f6b3 packh x13,x3,x5 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db4: 0007b383 ld x7,0(x15) + 80004db8: 00d38c63 beq x7,x13,80004dd0 + 80004dbc: 75d0246f jal x8,80007d18 + 80004dc0: 80004db0 .word 0x80004db0 + 80004dc4: 00000000 .word 0x00000000 + 80004dc8: 80016501 .word 0x80016501 + 80004dcc: 00000000 .word 0x00000000 + 80004dd0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0000000100000001 + 80004dd4: 0008bb83 ld x23,0(x17) + 80004dd8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x00000000ffffffff + 80004ddc: 0008b203 ld x4,0(x17) + 80004de0: 00888893 addi x17,x17,8 + +0000000080004de4 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + packh x3, x23, x4 # perform operation + 80004de4: 084bf1b3 packh x3,x23,x4 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de8: 0007b383 ld x7,0(x15) + 80004dec: 00338c63 beq x7,x3,80004e04 + 80004df0: 7290246f jal x8,80007d18 + 80004df4: 80004de4 .word 0x80004de4 + 80004df8: 00000000 .word 0x00000000 + 80004dfc: 8001656a .word 0x8001656a + 80004e00: 00000000 .word 0x00000000 + 80004e04: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x0000000100000001 + 80004e08: 0008b083 ld x1,0(x17) + 80004e0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x00000000fffffffe + 80004e10: 0008b583 ld x11,0(x17) + 80004e14: 00888893 addi x17,x17,8 + +0000000080004e18 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + packh x6, x1, x11 # perform operation + 80004e18: 08b0f333 packh x6,x1,x11 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e1c: 0007b383 ld x7,0(x15) + 80004e20: 00638c63 beq x7,x6,80004e38 + 80004e24: 6f50246f jal x8,80007d18 + 80004e28: 80004e18 .word 0x80004e18 + 80004e2c: 00000000 .word 0x00000000 + 80004e30: 800165cb .word 0x800165cb + 80004e34: 00000000 .word 0x00000000 + 80004e38: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000100000001 + 80004e3c: 0008b983 ld x19,0(x17) + 80004e40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000100000000 + 80004e44: 0008bd83 ld x27,0(x17) + 80004e48: 00888893 addi x17,x17,8 + +0000000080004e4c : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + packh x16, x19, x27 # perform operation + 80004e4c: 09b9f833 packh x16,x19,x27 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e50: 0007b383 ld x7,0(x15) + 80004e54: 01038c63 beq x7,x16,80004e6c + 80004e58: 6c10246f jal x8,80007d18 + 80004e5c: 80004e4c .word 0x80004e4c + 80004e60: 00000000 .word 0x00000000 + 80004e64: 8001662c .word 0x8001662c + 80004e68: 00000000 .word 0x00000000 + 80004e6c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000100000001 + 80004e70: 0008b803 ld x16,0(x17) + 80004e74: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x0000000100000001 + 80004e78: 0008bc83 ld x25,0(x17) + 80004e7c: 00888893 addi x17,x17,8 + +0000000080004e80 : +Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + packh x3, x16, x25 # perform operation + 80004e80: 099871b3 packh x3,x16,x25 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_packh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e84: 0007b383 ld x7,0(x15) + 80004e88: 00338c63 beq x7,x3,80004ea0 + 80004e8c: 68d0246f jal x8,80007d18 + 80004e90: 80004e80 .word 0x80004e80 + 80004e94: 00000000 .word 0x00000000 + 80004e98: 8001668e .word 0x8001668e + 80004e9c: 00000000 .word 0x00000000 + 80004ea0: 00878793 addi x15,x15,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xc59e9cf98375f940 + 80004ea4: 0008b003 ld x0,0(x17) + 80004ea8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x30fe2817ff804de2 + 80004eac: 0008b003 ld x0,0(x17) + 80004eb0: 00888893 addi x17,x17,8 + +0000000080004eb4 : +Zbkb_packh_cg_cmp_rs1_rs2_b0: + packh x29, x0, x0 # perform operation + 80004eb4: 08007eb3 packh x29,x0,x0 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_packh_cg_cmp_rs1_rs2_b0, Zbkb_packh_cg_cmp_rs1_rs2_b0_str) + 80004eb8: 0007b383 ld x7,0(x15) + 80004ebc: 01d38c63 beq x7,x29,80004ed4 + 80004ec0: 6590246f jal x8,80007d18 + 80004ec4: 80004eb4 .word 0x80004eb4 + 80004ec8: 00000000 .word 0x00000000 + 80004ecc: 800166f0 .word 0x800166f0 + 80004ed0: 00000000 .word 0x00000000 + 80004ed4: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x39b36bb095506aba + 80004ed8: 0008b083 ld x1,0(x17) + 80004edc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x9455813ed85a8cc5 + 80004ee0: 0008b083 ld x1,0(x17) + 80004ee4: 00888893 addi x17,x17,8 + +0000000080004ee8 : +Zbkb_packh_cg_cmp_rs1_rs2_b1: + packh x11, x1, x1 # perform operation + 80004ee8: 0810f5b3 packh x11,x1,x1 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_packh_cg_cmp_rs1_rs2_b1, Zbkb_packh_cg_cmp_rs1_rs2_b1_str) + 80004eec: 0007b383 ld x7,0(x15) + 80004ef0: 00b38c63 beq x7,x11,80004f08 + 80004ef4: 6250246f jal x8,80007d18 + 80004ef8: 80004ee8 .word 0x80004ee8 + 80004efc: 00000000 .word 0x00000000 + 80004f00: 80016729 .word 0x80016729 + 80004f04: 00000000 .word 0x00000000 + 80004f08: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x36219e3627eb2804 + 80004f0c: 0008b103 ld x2,0(x17) + 80004f10: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x0375375439d9606a + 80004f14: 0008b103 ld x2,0(x17) + 80004f18: 00888893 addi x17,x17,8 + +0000000080004f1c : +Zbkb_packh_cg_cmp_rs1_rs2_b2: + packh x25, x2, x2 # perform operation + 80004f1c: 08217cb3 packh x25,x2,x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_packh_cg_cmp_rs1_rs2_b2, Zbkb_packh_cg_cmp_rs1_rs2_b2_str) + 80004f20: 0007b383 ld x7,0(x15) + 80004f24: 01938c63 beq x7,x25,80004f3c + 80004f28: 5f10246f jal x8,80007d18 + 80004f2c: 80004f1c .word 0x80004f1c + 80004f30: 00000000 .word 0x00000000 + 80004f34: 80016762 .word 0x80016762 + 80004f38: 00000000 .word 0x00000000 + 80004f3c: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x29ed870d91537d10 + 80004f40: 0008b183 ld x3,0(x17) + 80004f44: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xd85811d81ea50e1b + 80004f48: 0008b183 ld x3,0(x17) + 80004f4c: 00888893 addi x17,x17,8 + +0000000080004f50 : +Zbkb_packh_cg_cmp_rs1_rs2_b3: + packh x4, x3, x3 # perform operation + 80004f50: 0831f233 packh x4,x3,x3 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zbkb_packh_cg_cmp_rs1_rs2_b3, Zbkb_packh_cg_cmp_rs1_rs2_b3_str) + 80004f54: 0007b383 ld x7,0(x15) + 80004f58: 00438c63 beq x7,x4,80004f70 + 80004f5c: 5bd0246f jal x8,80007d18 + 80004f60: 80004f50 .word 0x80004f50 + 80004f64: 00000000 .word 0x00000000 + 80004f68: 8001679b .word 0x8001679b + 80004f6c: 00000000 .word 0x00000000 + 80004f70: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0xd93ece076f963fea + 80004f74: 0008b203 ld x4,0(x17) + 80004f78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x9500e0ae2a67e255 + 80004f7c: 0008b203 ld x4,0(x17) + 80004f80: 00888893 addi x17,x17,8 + +0000000080004f84 : +Zbkb_packh_cg_cmp_rs1_rs2_b4: + packh x3, x4, x4 # perform operation + 80004f84: 084271b3 packh x3,x4,x4 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zbkb_packh_cg_cmp_rs1_rs2_b4, Zbkb_packh_cg_cmp_rs1_rs2_b4_str) + 80004f88: 0007b383 ld x7,0(x15) + 80004f8c: 00338c63 beq x7,x3,80004fa4 + 80004f90: 5890246f jal x8,80007d18 + 80004f94: 80004f84 .word 0x80004f84 + 80004f98: 00000000 .word 0x00000000 + 80004f9c: 800167d4 .word 0x800167d4 + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xc60cecaed47d33d0 + 80004fa8: 0008b283 ld x5,0(x17) + 80004fac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x3d98a48a721bdab6 + 80004fb0: 0008b283 ld x5,0(x17) + 80004fb4: 00888893 addi x17,x17,8 + +0000000080004fb8 : +Zbkb_packh_cg_cmp_rs1_rs2_b5: + packh x16, x5, x5 # perform operation + 80004fb8: 0852f833 packh x16,x5,x5 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zbkb_packh_cg_cmp_rs1_rs2_b5, Zbkb_packh_cg_cmp_rs1_rs2_b5_str) + 80004fbc: 0007b383 ld x7,0(x15) + 80004fc0: 01038c63 beq x7,x16,80004fd8 + 80004fc4: 5550246f jal x8,80007d18 + 80004fc8: 80004fb8 .word 0x80004fb8 + 80004fcc: 00000000 .word 0x00000000 + 80004fd0: 8001680d .word 0x8001680d + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x6e08148467aeafff + 80004fdc: 0008b303 ld x6,0(x17) + 80004fe0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x19614b1731294efc + 80004fe4: 0008b303 ld x6,0(x17) + 80004fe8: 00888893 addi x17,x17,8 + +0000000080004fec : +Zbkb_packh_cg_cmp_rs1_rs2_b6: + packh x31, x6, x6 # perform operation + 80004fec: 08637fb3 packh x31,x6,x6 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zbkb_packh_cg_cmp_rs1_rs2_b6, Zbkb_packh_cg_cmp_rs1_rs2_b6_str) + 80004ff0: 0007b383 ld x7,0(x15) + 80004ff4: 01f38c63 beq x7,x31,8000500c + 80004ff8: 5210246f jal x8,80007d18 + 80004ffc: 80004fec .word 0x80004fec + 80005000: 00000000 .word 0x00000000 + 80005004: 80016846 .word 0x80016846 + 80005008: 00000000 .word 0x00000000 + 8000500c: 00878793 addi x15,x15,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005010: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005014: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x1b71d5f9c20a0c6d + 80005018: 0008b383 ld x7,0(x17) + 8000501c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xba69410743719c80 + 80005020: 0008b383 ld x7,0(x17) + 80005024: 00888893 addi x17,x17,8 + +0000000080005028 : +Zbkb_packh_cg_cmp_rs1_rs2_b7: + packh x16, x7, x7 # perform operation + 80005028: 0873f833 packh x16,x7,x7 + # Check if x16 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x16, Zbkb_packh_cg_cmp_rs1_rs2_b7, Zbkb_packh_cg_cmp_rs1_rs2_b7_str) + 8000502c: 0007b683 ld x13,0(x15) + 80005030: 01068c63 beq x13,x16,80005048 + 80005034: 50d0276f jal x14,80007d40 + 80005038: 80005028 .word 0x80005028 + 8000503c: 00000000 .word 0x00000000 + 80005040: 8001687f .word 0x8001687f + 80005044: 00000000 .word 0x00000000 + 80005048: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x912980f5aeb991d1 + 8000504c: 0008b403 ld x8,0(x17) + 80005050: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xcea67802e4525fe0 + 80005054: 0008b403 ld x8,0(x17) + 80005058: 00888893 addi x17,x17,8 + +000000008000505c : +Zbkb_packh_cg_cmp_rs1_rs2_b8: + packh x25, x8, x8 # perform operation + 8000505c: 08847cb3 packh x25,x8,x8 + # Check if x25 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x25, Zbkb_packh_cg_cmp_rs1_rs2_b8, Zbkb_packh_cg_cmp_rs1_rs2_b8_str) + 80005060: 0007b683 ld x13,0(x15) + 80005064: 01968c63 beq x13,x25,8000507c + 80005068: 4d90276f jal x14,80007d40 + 8000506c: 8000505c .word 0x8000505c + 80005070: 00000000 .word 0x00000000 + 80005074: 800168b8 .word 0x800168b8 + 80005078: 00000000 .word 0x00000000 + 8000507c: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xa4ecade02c9f8b6b + 80005080: 0008b483 ld x9,0(x17) + 80005084: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x621b56a9cf135980 + 80005088: 0008b483 ld x9,0(x17) + 8000508c: 00888893 addi x17,x17,8 + +0000000080005090 : +Zbkb_packh_cg_cmp_rs1_rs2_b9: + packh x1, x9, x9 # perform operation + 80005090: 0894f0b3 packh x1,x9,x9 + # Check if x1 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x1, Zbkb_packh_cg_cmp_rs1_rs2_b9, Zbkb_packh_cg_cmp_rs1_rs2_b9_str) + 80005094: 0007b683 ld x13,0(x15) + 80005098: 00168c63 beq x13,x1,800050b0 + 8000509c: 4a50276f jal x14,80007d40 + 800050a0: 80005090 .word 0x80005090 + 800050a4: 00000000 .word 0x00000000 + 800050a8: 800168f1 .word 0x800168f1 + 800050ac: 00000000 .word 0x00000000 + 800050b0: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x36e66176f01cfc9a + 800050b4: 0008b503 ld x10,0(x17) + 800050b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x7fa1825defd00f04 + 800050bc: 0008b503 ld x10,0(x17) + 800050c0: 00888893 addi x17,x17,8 + +00000000800050c4 : +Zbkb_packh_cg_cmp_rs1_rs2_b10: + packh x20, x10, x10 # perform operation + 800050c4: 08a57a33 packh x20,x10,x10 + # Check if x20 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x20, Zbkb_packh_cg_cmp_rs1_rs2_b10, Zbkb_packh_cg_cmp_rs1_rs2_b10_str) + 800050c8: 0007b683 ld x13,0(x15) + 800050cc: 01468c63 beq x13,x20,800050e4 + 800050d0: 4710276f jal x14,80007d40 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 8001692a .word 0x8001692a + 800050e0: 00000000 .word 0x00000000 + 800050e4: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x30fdd2b5c2da809a + 800050e8: 0008b583 ld x11,0(x17) + 800050ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xb8e143b71b54a749 + 800050f0: 0008b583 ld x11,0(x17) + 800050f4: 00888893 addi x17,x17,8 + +00000000800050f8 : +Zbkb_packh_cg_cmp_rs1_rs2_b11: + packh x22, x11, x11 # perform operation + 800050f8: 08b5fb33 packh x22,x11,x11 + # Check if x22 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x22, Zbkb_packh_cg_cmp_rs1_rs2_b11, Zbkb_packh_cg_cmp_rs1_rs2_b11_str) + 800050fc: 0007b683 ld x13,0(x15) + 80005100: 01668c63 beq x13,x22,80005118 + 80005104: 43d0276f jal x14,80007d40 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 80016964 .word 0x80016964 + 80005114: 00000000 .word 0x00000000 + 80005118: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x96298903121cc482 + 8000511c: 0008b603 ld x12,0(x17) + 80005120: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x4d0548307224379b + 80005124: 0008b603 ld x12,0(x17) + 80005128: 00888893 addi x17,x17,8 + +000000008000512c : +Zbkb_packh_cg_cmp_rs1_rs2_b12: + packh x18, x12, x12 # perform operation + 8000512c: 08c67933 packh x18,x12,x12 + # Check if x18 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x18, Zbkb_packh_cg_cmp_rs1_rs2_b12, Zbkb_packh_cg_cmp_rs1_rs2_b12_str) + 80005130: 0007b683 ld x13,0(x15) + 80005134: 01268c63 beq x13,x18,8000514c + 80005138: 4090276f jal x14,80007d40 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 8001699e .word 0x8001699e + 80005148: 00000000 .word 0x00000000 + 8000514c: 00878793 addi x15,x15,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005150: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005154: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x007c572e516dd28b + 80005158: 0008b683 ld x13,0(x17) + 8000515c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x1cfd4e41e7061962 + 80005160: 0008b683 ld x13,0(x17) + 80005164: 00888893 addi x17,x17,8 + +0000000080005168 : +Zbkb_packh_cg_cmp_rs1_rs2_b13: + packh x28, x13, x13 # perform operation + 80005168: 08d6fe33 packh x28,x13,x13 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b13, Zbkb_packh_cg_cmp_rs1_rs2_b13_str) + 8000516c: 0007b203 ld x4,0(x15) + 80005170: 01c20c63 beq x4,x28,80005188 + 80005174: 38d022ef jal x5,80007d00 + 80005178: 80005168 .word 0x80005168 + 8000517c: 00000000 .word 0x00000000 + 80005180: 800169d8 .word 0x800169d8 + 80005184: 00000000 .word 0x00000000 + 80005188: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xcd74c83fd7853e5b + 8000518c: 0008b703 ld x14,0(x17) + 80005190: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x4c1db4f59e0f3590 + 80005194: 0008b703 ld x14,0(x17) + 80005198: 00888893 addi x17,x17,8 + +000000008000519c : +Zbkb_packh_cg_cmp_rs1_rs2_b14: + packh x30, x14, x14 # perform operation + 8000519c: 08e77f33 packh x30,x14,x14 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zbkb_packh_cg_cmp_rs1_rs2_b14, Zbkb_packh_cg_cmp_rs1_rs2_b14_str) + 800051a0: 0007b203 ld x4,0(x15) + 800051a4: 01e20c63 beq x4,x30,800051bc + 800051a8: 359022ef jal x5,80007d00 + 800051ac: 8000519c .word 0x8000519c + 800051b0: 00000000 .word 0x00000000 + 800051b4: 80016a12 .word 0x80016a12 + 800051b8: 00000000 .word 0x00000000 + 800051bc: 00878793 addi x15,x15,8 + + mv x2, x15 # switch signature pointer register to avoid conflict with test + 800051c0: 00078113 addi x2,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xdfe0eccb53f29750 + 800051c4: 0008b783 ld x15,0(x17) + 800051c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0xac171e80af317016 + 800051cc: 0008b783 ld x15,0(x17) + 800051d0: 00888893 addi x17,x17,8 + +00000000800051d4 : +Zbkb_packh_cg_cmp_rs1_rs2_b15: + packh x12, x15, x15 # perform operation + 800051d4: 08f7f633 packh x12,x15,x15 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkb_packh_cg_cmp_rs1_rs2_b15, Zbkb_packh_cg_cmp_rs1_rs2_b15_str) + 800051d8: 00013203 ld x4,0(x2) + 800051dc: 00c20c63 beq x4,x12,800051f4 + 800051e0: 321022ef jal x5,80007d00 + 800051e4: 800051d4 .word 0x800051d4 + 800051e8: 00000000 .word 0x00000000 + 800051ec: 80016a4c .word 0x80016a4c + 800051f0: 00000000 .word 0x00000000 + 800051f4: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xfee5bfc9ba0eea63 + 800051f8: 0008b803 ld x16,0(x17) + 800051fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xa40abb5a2ba2cabc + 80005200: 0008b803 ld x16,0(x17) + 80005204: 00888893 addi x17,x17,8 + +0000000080005208 : +Zbkb_packh_cg_cmp_rs1_rs2_b16: + packh x11, x16, x16 # perform operation + 80005208: 090875b3 packh x11,x16,x16 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_packh_cg_cmp_rs1_rs2_b16, Zbkb_packh_cg_cmp_rs1_rs2_b16_str) + 8000520c: 00013203 ld x4,0(x2) + 80005210: 00b20c63 beq x4,x11,80005228 + 80005214: 2ed022ef jal x5,80007d00 + 80005218: 80005208 .word 0x80005208 + 8000521c: 00000000 .word 0x00000000 + 80005220: 80016a86 .word 0x80016a86 + 80005224: 00000000 .word 0x00000000 + 80005228: 00810113 addi x2,x2,8 + + mv x23, x17 # switch data pointer register to avoid conflict with test + 8000522c: 00088b93 addi x23,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x71234a7cf455ae44 + 80005230: 000bb883 ld x17,0(x23) + 80005234: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x159333c6e39f2be1 + 80005238: 000bb883 ld x17,0(x23) + 8000523c: 008b8b93 addi x23,x23,8 + +0000000080005240 : +Zbkb_packh_cg_cmp_rs1_rs2_b17: + packh x28, x17, x17 # perform operation + 80005240: 0918fe33 packh x28,x17,x17 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b17, Zbkb_packh_cg_cmp_rs1_rs2_b17_str) + 80005244: 00013203 ld x4,0(x2) + 80005248: 01c20c63 beq x4,x28,80005260 + 8000524c: 2b5022ef jal x5,80007d00 + 80005250: 80005240 .word 0x80005240 + 80005254: 00000000 .word 0x00000000 + 80005258: 80016ac0 .word 0x80016ac0 + 8000525c: 00000000 .word 0x00000000 + 80005260: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xcbbcccc925d6e8b5 + 80005264: 000bb903 ld x18,0(x23) + 80005268: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xe497eade9d75a89b + 8000526c: 000bb903 ld x18,0(x23) + 80005270: 008b8b93 addi x23,x23,8 + +0000000080005274 : +Zbkb_packh_cg_cmp_rs1_rs2_b18: + packh x28, x18, x18 # perform operation + 80005274: 09297e33 packh x28,x18,x18 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b18, Zbkb_packh_cg_cmp_rs1_rs2_b18_str) + 80005278: 00013203 ld x4,0(x2) + 8000527c: 01c20c63 beq x4,x28,80005294 + 80005280: 281022ef jal x5,80007d00 + 80005284: 80005274 .word 0x80005274 + 80005288: 00000000 .word 0x00000000 + 8000528c: 80016afa .word 0x80016afa + 80005290: 00000000 .word 0x00000000 + 80005294: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x7ce05de74642d028 + 80005298: 000bb983 ld x19,0(x23) + 8000529c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x7f645bcf142b1c00 + 800052a0: 000bb983 ld x19,0(x23) + 800052a4: 008b8b93 addi x23,x23,8 + +00000000800052a8 : +Zbkb_packh_cg_cmp_rs1_rs2_b19: + packh x25, x19, x19 # perform operation + 800052a8: 0939fcb3 packh x25,x19,x19 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkb_packh_cg_cmp_rs1_rs2_b19, Zbkb_packh_cg_cmp_rs1_rs2_b19_str) + 800052ac: 00013203 ld x4,0(x2) + 800052b0: 01920c63 beq x4,x25,800052c8 + 800052b4: 24d022ef jal x5,80007d00 + 800052b8: 800052a8 .word 0x800052a8 + 800052bc: 00000000 .word 0x00000000 + 800052c0: 80016b34 .word 0x80016b34 + 800052c4: 00000000 .word 0x00000000 + 800052c8: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x8c1d99cc1a9694a3 + 800052cc: 000bba03 ld x20,0(x23) + 800052d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xac872b32b330f675 + 800052d4: 000bba03 ld x20,0(x23) + 800052d8: 008b8b93 addi x23,x23,8 + +00000000800052dc : +Zbkb_packh_cg_cmp_rs1_rs2_b20: + packh x6, x20, x20 # perform operation + 800052dc: 094a7333 packh x6,x20,x20 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zbkb_packh_cg_cmp_rs1_rs2_b20, Zbkb_packh_cg_cmp_rs1_rs2_b20_str) + 800052e0: 00013203 ld x4,0(x2) + 800052e4: 00620c63 beq x4,x6,800052fc + 800052e8: 219022ef jal x5,80007d00 + 800052ec: 800052dc .word 0x800052dc + 800052f0: 00000000 .word 0x00000000 + 800052f4: 80016b6e .word 0x80016b6e + 800052f8: 00000000 .word 0x00000000 + 800052fc: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xb097870144f34732 + 80005300: 000bba83 ld x21,0(x23) + 80005304: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x45202524d358c729 + 80005308: 000bba83 ld x21,0(x23) + 8000530c: 008b8b93 addi x23,x23,8 + +0000000080005310 : +Zbkb_packh_cg_cmp_rs1_rs2_b21: + packh x28, x21, x21 # perform operation + 80005310: 095afe33 packh x28,x21,x21 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_packh_cg_cmp_rs1_rs2_b21, Zbkb_packh_cg_cmp_rs1_rs2_b21_str) + 80005314: 00013203 ld x4,0(x2) + 80005318: 01c20c63 beq x4,x28,80005330 + 8000531c: 1e5022ef jal x5,80007d00 + 80005320: 80005310 .word 0x80005310 + 80005324: 00000000 .word 0x00000000 + 80005328: 80016ba8 .word 0x80016ba8 + 8000532c: 00000000 .word 0x00000000 + 80005330: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x43a9a49730d2a337 + 80005334: 000bbb03 ld x22,0(x23) + 80005338: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x7d2211d37ab3997a + 8000533c: 000bbb03 ld x22,0(x23) + 80005340: 008b8b93 addi x23,x23,8 + +0000000080005344 : +Zbkb_packh_cg_cmp_rs1_rs2_b22: + packh x14, x22, x22 # perform operation + 80005344: 096b7733 packh x14,x22,x22 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zbkb_packh_cg_cmp_rs1_rs2_b22, Zbkb_packh_cg_cmp_rs1_rs2_b22_str) + 80005348: 00013203 ld x4,0(x2) + 8000534c: 00e20c63 beq x4,x14,80005364 + 80005350: 1b1022ef jal x5,80007d00 + 80005354: 80005344 .word 0x80005344 + 80005358: 00000000 .word 0x00000000 + 8000535c: 80016be2 .word 0x80016be2 + 80005360: 00000000 .word 0x00000000 + 80005364: 00810113 addi x2,x2,8 + + mv x30, x23 # switch data pointer register to avoid conflict with test + 80005368: 000b8f13 addi x30,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xf441066fbc96b5df + 8000536c: 000f3b83 ld x23,0(x30) + 80005370: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xc3183acb4f845c82 + 80005374: 000f3b83 ld x23,0(x30) + 80005378: 008f0f13 addi x30,x30,8 + +000000008000537c : +Zbkb_packh_cg_cmp_rs1_rs2_b23: + packh x17, x23, x23 # perform operation + 8000537c: 097bf8b3 packh x17,x23,x23 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkb_packh_cg_cmp_rs1_rs2_b23, Zbkb_packh_cg_cmp_rs1_rs2_b23_str) + 80005380: 00013203 ld x4,0(x2) + 80005384: 01120c63 beq x4,x17,8000539c + 80005388: 179022ef jal x5,80007d00 + 8000538c: 8000537c .word 0x8000537c + 80005390: 00000000 .word 0x00000000 + 80005394: 80016c1c .word 0x80016c1c + 80005398: 00000000 .word 0x00000000 + 8000539c: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x675b65de06abe6c5 + 800053a0: 000f3c03 ld x24,0(x30) + 800053a4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x3178d31b76dc331a + 800053a8: 000f3c03 ld x24,0(x30) + 800053ac: 008f0f13 addi x30,x30,8 + +00000000800053b0 : +Zbkb_packh_cg_cmp_rs1_rs2_b24: + packh x15, x24, x24 # perform operation + 800053b0: 098c77b3 packh x15,x24,x24 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zbkb_packh_cg_cmp_rs1_rs2_b24, Zbkb_packh_cg_cmp_rs1_rs2_b24_str) + 800053b4: 00013203 ld x4,0(x2) + 800053b8: 00f20c63 beq x4,x15,800053d0 + 800053bc: 145022ef jal x5,80007d00 + 800053c0: 800053b0 .word 0x800053b0 + 800053c4: 00000000 .word 0x00000000 + 800053c8: 80016c56 .word 0x80016c56 + 800053cc: 00000000 .word 0x00000000 + 800053d0: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xc27ac714643c5d7a + 800053d4: 000f3c83 ld x25,0(x30) + 800053d8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x802c94f46bc90f0f + 800053dc: 000f3c83 ld x25,0(x30) + 800053e0: 008f0f13 addi x30,x30,8 + +00000000800053e4 : +Zbkb_packh_cg_cmp_rs1_rs2_b25: + packh x18, x25, x25 # perform operation + 800053e4: 099cf933 packh x18,x25,x25 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zbkb_packh_cg_cmp_rs1_rs2_b25, Zbkb_packh_cg_cmp_rs1_rs2_b25_str) + 800053e8: 00013203 ld x4,0(x2) + 800053ec: 01220c63 beq x4,x18,80005404 + 800053f0: 111022ef jal x5,80007d00 + 800053f4: 800053e4 .word 0x800053e4 + 800053f8: 00000000 .word 0x00000000 + 800053fc: 80016c90 .word 0x80016c90 + 80005400: 00000000 .word 0x00000000 + 80005404: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xa02fa05e9aff1937 + 80005408: 000f3d03 ld x26,0(x30) + 8000540c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x5bdc10284e9e1216 + 80005410: 000f3d03 ld x26,0(x30) + 80005414: 008f0f13 addi x30,x30,8 + +0000000080005418 : +Zbkb_packh_cg_cmp_rs1_rs2_b26: + packh x14, x26, x26 # perform operation + 80005418: 09ad7733 packh x14,x26,x26 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zbkb_packh_cg_cmp_rs1_rs2_b26, Zbkb_packh_cg_cmp_rs1_rs2_b26_str) + 8000541c: 00013203 ld x4,0(x2) + 80005420: 00e20c63 beq x4,x14,80005438 + 80005424: 0dd022ef jal x5,80007d00 + 80005428: 80005418 .word 0x80005418 + 8000542c: 00000000 .word 0x00000000 + 80005430: 80016cca .word 0x80016cca + 80005434: 00000000 .word 0x00000000 + 80005438: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x07f5854c487bb19d + 8000543c: 000f3d83 ld x27,0(x30) + 80005440: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x81919a535d82bbdf + 80005444: 000f3d83 ld x27,0(x30) + 80005448: 008f0f13 addi x30,x30,8 + +000000008000544c : +Zbkb_packh_cg_cmp_rs1_rs2_b27: + packh x31, x27, x27 # perform operation + 8000544c: 09bdffb3 packh x31,x27,x27 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zbkb_packh_cg_cmp_rs1_rs2_b27, Zbkb_packh_cg_cmp_rs1_rs2_b27_str) + 80005450: 00013203 ld x4,0(x2) + 80005454: 01f20c63 beq x4,x31,8000546c + 80005458: 0a9022ef jal x5,80007d00 + 8000545c: 8000544c .word 0x8000544c + 80005460: 00000000 .word 0x00000000 + 80005464: 80016d04 .word 0x80016d04 + 80005468: 00000000 .word 0x00000000 + 8000546c: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xf60f8cd5594dff69 + 80005470: 000f3e03 ld x28,0(x30) + 80005474: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x734f4ea2a9bf8099 + 80005478: 000f3e03 ld x28,0(x30) + 8000547c: 008f0f13 addi x30,x30,8 + +0000000080005480 : +Zbkb_packh_cg_cmp_rs1_rs2_b28: + packh x20, x28, x28 # perform operation + 80005480: 09ce7a33 packh x20,x28,x28 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkb_packh_cg_cmp_rs1_rs2_b28, Zbkb_packh_cg_cmp_rs1_rs2_b28_str) + 80005484: 00013203 ld x4,0(x2) + 80005488: 01420c63 beq x4,x20,800054a0 + 8000548c: 075022ef jal x5,80007d00 + 80005490: 80005480 .word 0x80005480 + 80005494: 00000000 .word 0x00000000 + 80005498: 80016d3e .word 0x80016d3e + 8000549c: 00000000 .word 0x00000000 + 800054a0: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x6c20782fd83bac96 + 800054a4: 000f3e83 ld x29,0(x30) + 800054a8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xcbc320eaad1365c8 + 800054ac: 000f3e83 ld x29,0(x30) + 800054b0: 008f0f13 addi x30,x30,8 + +00000000800054b4 : +Zbkb_packh_cg_cmp_rs1_rs2_b29: + packh x16, x29, x29 # perform operation + 800054b4: 09def833 packh x16,x29,x29 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zbkb_packh_cg_cmp_rs1_rs2_b29, Zbkb_packh_cg_cmp_rs1_rs2_b29_str) + 800054b8: 00013203 ld x4,0(x2) + 800054bc: 01020c63 beq x4,x16,800054d4 + 800054c0: 041022ef jal x5,80007d00 + 800054c4: 800054b4 .word 0x800054b4 + 800054c8: 00000000 .word 0x00000000 + 800054cc: 80016d78 .word 0x80016d78 + 800054d0: 00000000 .word 0x00000000 + 800054d4: 00810113 addi x2,x2,8 + + mv x15, x30 # switch data pointer register to avoid conflict with test + 800054d8: 000f0793 addi x15,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x59a44e1393c77212 + 800054dc: 0007bf03 ld x30,0(x15) + 800054e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x216f26ce41f2e1f2 + 800054e4: 0007bf03 ld x30,0(x15) + 800054e8: 00878793 addi x15,x15,8 + +00000000800054ec : +Zbkb_packh_cg_cmp_rs1_rs2_b30: + packh x0, x30, x30 # perform operation + 800054ec: 09ef7033 packh x0,x30,x30 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_packh_cg_cmp_rs1_rs2_b30, Zbkb_packh_cg_cmp_rs1_rs2_b30_str) + 800054f0: 00013203 ld x4,0(x2) + 800054f4: 00020c63 beq x4,x0,8000550c + 800054f8: 009022ef jal x5,80007d00 + 800054fc: 800054ec .word 0x800054ec + 80005500: 00000000 .word 0x00000000 + 80005504: 80016db2 .word 0x80016db2 + 80005508: 00000000 .word 0x00000000 + 8000550c: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x374ad6ef90d121fe + 80005510: 0007bf83 ld x31,0(x15) + 80005514: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x5635c052a02328f9 + 80005518: 0007bf83 ld x31,0(x15) + 8000551c: 00878793 addi x15,x15,8 + +0000000080005520 : +Zbkb_packh_cg_cmp_rs1_rs2_b31: + packh x11, x31, x31 # perform operation + 80005520: 09fff5b3 packh x11,x31,x31 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zbkb_packh_cg_cmp_rs1_rs2_b31, Zbkb_packh_cg_cmp_rs1_rs2_b31_str) + 80005524: 00013203 ld x4,0(x2) + 80005528: 00b20c63 beq x4,x11,80005540 + 8000552c: 7d4022ef jal x5,80007d00 + 80005530: 80005520 .word 0x80005520 + 80005534: 00000000 .word 0x00000000 + 80005538: 80016dec .word 0x80016dec + 8000553c: 00000000 .word 0x00000000 + 80005540: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x58f09d0748b90334 + 80005544: 0007b003 ld x0,0(x15) + 80005548: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x8ca3067b7c336d72 + 8000554c: 0007bd03 ld x26,0(x15) + 80005550: 00878793 addi x15,x15,8 + +0000000080005554 : +Zbkb_packh_cg_cmp_rd_rs1_b0: + packh x0, x0, x26 # perform operation + 80005554: 09a07033 packh x0,x0,x26 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_packh_cg_cmp_rd_rs1_b0, Zbkb_packh_cg_cmp_rd_rs1_b0_str) + 80005558: 00013203 ld x4,0(x2) + 8000555c: 00020c63 beq x4,x0,80005574 + 80005560: 7a0022ef jal x5,80007d00 + 80005564: 80005554 .word 0x80005554 + 80005568: 00000000 .word 0x00000000 + 8000556c: 80016e26 .word 0x80016e26 + 80005570: 00000000 .word 0x00000000 + 80005574: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5db9f07842f7dd8e + 80005578: 0007b083 ld x1,0(x15) + 8000557c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xd67c8a162c073e79 + 80005580: 0007b983 ld x19,0(x15) + 80005584: 00878793 addi x15,x15,8 + +0000000080005588 : +Zbkb_packh_cg_cmp_rd_rs1_b1: + packh x1, x1, x19 # perform operation + 80005588: 0930f0b3 packh x1,x1,x19 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zbkb_packh_cg_cmp_rd_rs1_b1, Zbkb_packh_cg_cmp_rd_rs1_b1_str) + 8000558c: 00013203 ld x4,0(x2) + 80005590: 00120c63 beq x4,x1,800055a8 + 80005594: 76c022ef jal x5,80007d00 + 80005598: 80005588 .word 0x80005588 + 8000559c: 00000000 .word 0x00000000 + 800055a0: 80016e5e .word 0x80016e5e + 800055a4: 00000000 .word 0x00000000 + 800055a8: 00810113 addi x2,x2,8 + + mv x27, x2 # switch signature pointer register to avoid conflict with test + 800055ac: 00010d93 addi x27,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xbde8da71a3539acd + 800055b0: 0007b103 ld x2,0(x15) + 800055b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xe09718c4c41b14fd + 800055b8: 0007be03 ld x28,0(x15) + 800055bc: 00878793 addi x15,x15,8 + +00000000800055c0 : +Zbkb_packh_cg_cmp_rd_rs1_b2: + packh x2, x2, x28 # perform operation + 800055c0: 09c17133 packh x2,x2,x28 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zbkb_packh_cg_cmp_rd_rs1_b2, Zbkb_packh_cg_cmp_rd_rs1_b2_str) + 800055c4: 000db203 ld x4,0(x27) + 800055c8: 00220c63 beq x4,x2,800055e0 + 800055cc: 734022ef jal x5,80007d00 + 800055d0: 800055c0 .word 0x800055c0 + 800055d4: 00000000 .word 0x00000000 + 800055d8: 80016e96 .word 0x80016e96 + 800055dc: 00000000 .word 0x00000000 + 800055e0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x3dc4680dffbfe2c3 + 800055e4: 0007b183 ld x3,0(x15) + 800055e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x60ba27f00c12c462 + 800055ec: 0007bd03 ld x26,0(x15) + 800055f0: 00878793 addi x15,x15,8 + +00000000800055f4 : +Zbkb_packh_cg_cmp_rd_rs1_b3: + packh x3, x3, x26 # perform operation + 800055f4: 09a1f1b3 packh x3,x3,x26 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zbkb_packh_cg_cmp_rd_rs1_b3, Zbkb_packh_cg_cmp_rd_rs1_b3_str) + 800055f8: 000db203 ld x4,0(x27) + 800055fc: 00320c63 beq x4,x3,80005614 + 80005600: 700022ef jal x5,80007d00 + 80005604: 800055f4 .word 0x800055f4 + 80005608: 00000000 .word 0x00000000 + 8000560c: 80016ece .word 0x80016ece + 80005610: 00000000 .word 0x00000000 + 80005614: 008d8d93 addi x27,x27,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005618: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000561c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xbeca9e9bfa043040 + 80005620: 0007b203 ld x4,0(x15) + 80005624: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x29f35c263ea7dc25 + 80005628: 0007b903 ld x18,0(x15) + 8000562c: 00878793 addi x15,x15,8 + +0000000080005630 : +Zbkb_packh_cg_cmp_rd_rs1_b4: + packh x4, x4, x18 # perform operation + 80005630: 09227233 packh x4,x4,x18 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zbkb_packh_cg_cmp_rd_rs1_b4, Zbkb_packh_cg_cmp_rd_rs1_b4_str) + 80005634: 000db383 ld x7,0(x27) + 80005638: 00438c63 beq x7,x4,80005650 + 8000563c: 6dc0246f jal x8,80007d18 + 80005640: 80005630 .word 0x80005630 + 80005644: 00000000 .word 0x00000000 + 80005648: 80016f06 .word 0x80016f06 + 8000564c: 00000000 .word 0x00000000 + 80005650: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xca89c0cf33d4cf93 + 80005654: 0007b283 ld x5,0(x15) + 80005658: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xb5e283914cbb5534 + 8000565c: 0007b183 ld x3,0(x15) + 80005660: 00878793 addi x15,x15,8 + +0000000080005664 : +Zbkb_packh_cg_cmp_rd_rs1_b5: + packh x5, x5, x3 # perform operation + 80005664: 0832f2b3 packh x5,x5,x3 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zbkb_packh_cg_cmp_rd_rs1_b5, Zbkb_packh_cg_cmp_rd_rs1_b5_str) + 80005668: 000db383 ld x7,0(x27) + 8000566c: 00538c63 beq x7,x5,80005684 + 80005670: 6a80246f jal x8,80007d18 + 80005674: 80005664 .word 0x80005664 + 80005678: 00000000 .word 0x00000000 + 8000567c: 80016f3e .word 0x80016f3e + 80005680: 00000000 .word 0x00000000 + 80005684: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x2b50429b5def6d30 + 80005688: 0007b303 ld x6,0(x15) + 8000568c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x4c2484f438168b06 + 80005690: 0007b883 ld x17,0(x15) + 80005694: 00878793 addi x15,x15,8 + +0000000080005698 : +Zbkb_packh_cg_cmp_rd_rs1_b6: + packh x6, x6, x17 # perform operation + 80005698: 09137333 packh x6,x6,x17 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zbkb_packh_cg_cmp_rd_rs1_b6, Zbkb_packh_cg_cmp_rd_rs1_b6_str) + 8000569c: 000db383 ld x7,0(x27) + 800056a0: 00638c63 beq x7,x6,800056b8 + 800056a4: 6740246f jal x8,80007d18 + 800056a8: 80005698 .word 0x80005698 + 800056ac: 00000000 .word 0x00000000 + 800056b0: 80016f76 .word 0x80016f76 + 800056b4: 00000000 .word 0x00000000 + 800056b8: 008d8d93 addi x27,x27,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056c0: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x790958df6c3d7fb7 + 800056c4: 0007b383 ld x7,0(x15) + 800056c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x002dbbbdb6d77bc1 + 800056cc: 0007b583 ld x11,0(x15) + 800056d0: 00878793 addi x15,x15,8 + +00000000800056d4 : +Zbkb_packh_cg_cmp_rd_rs1_b7: + packh x7, x7, x11 # perform operation + 800056d4: 08b3f3b3 packh x7,x7,x11 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zbkb_packh_cg_cmp_rd_rs1_b7, Zbkb_packh_cg_cmp_rd_rs1_b7_str) + 800056d8: 000db203 ld x4,0(x27) + 800056dc: 00720c63 beq x4,x7,800056f4 + 800056e0: 620022ef jal x5,80007d00 + 800056e4: 800056d4 .word 0x800056d4 + 800056e8: 00000000 .word 0x00000000 + 800056ec: 80016fae .word 0x80016fae + 800056f0: 00000000 .word 0x00000000 + 800056f4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xaec66a9eb7931e7e + 800056f8: 0007b403 ld x8,0(x15) + 800056fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x563e57cbf86438fa + 80005700: 0007b903 ld x18,0(x15) + 80005704: 00878793 addi x15,x15,8 + +0000000080005708 : +Zbkb_packh_cg_cmp_rd_rs1_b8: + packh x8, x8, x18 # perform operation + 80005708: 09247433 packh x8,x8,x18 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zbkb_packh_cg_cmp_rd_rs1_b8, Zbkb_packh_cg_cmp_rd_rs1_b8_str) + 8000570c: 000db203 ld x4,0(x27) + 80005710: 00820c63 beq x4,x8,80005728 + 80005714: 5ec022ef jal x5,80007d00 + 80005718: 80005708 .word 0x80005708 + 8000571c: 00000000 .word 0x00000000 + 80005720: 80016fe6 .word 0x80016fe6 + 80005724: 00000000 .word 0x00000000 + 80005728: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x8a4ee8b281318f67 + 8000572c: 0007b483 ld x9,0(x15) + 80005730: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xdea883cc3636702e + 80005734: 0007b183 ld x3,0(x15) + 80005738: 00878793 addi x15,x15,8 + +000000008000573c : +Zbkb_packh_cg_cmp_rd_rs1_b9: + packh x9, x9, x3 # perform operation + 8000573c: 0834f4b3 packh x9,x9,x3 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zbkb_packh_cg_cmp_rd_rs1_b9, Zbkb_packh_cg_cmp_rd_rs1_b9_str) + 80005740: 000db203 ld x4,0(x27) + 80005744: 00920c63 beq x4,x9,8000575c + 80005748: 5b8022ef jal x5,80007d00 + 8000574c: 8000573c .word 0x8000573c + 80005750: 00000000 .word 0x00000000 + 80005754: 8001701e .word 0x8001701e + 80005758: 00000000 .word 0x00000000 + 8000575c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x9e8ba25bdd98bb17 + 80005760: 0007b503 ld x10,0(x15) + 80005764: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x35055d1ff3b0c6b8 + 80005768: 0007b883 ld x17,0(x15) + 8000576c: 00878793 addi x15,x15,8 + +0000000080005770 : +Zbkb_packh_cg_cmp_rd_rs1_b10: + packh x10, x10, x17 # perform operation + 80005770: 09157533 packh x10,x10,x17 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zbkb_packh_cg_cmp_rd_rs1_b10, Zbkb_packh_cg_cmp_rd_rs1_b10_str) + 80005774: 000db203 ld x4,0(x27) + 80005778: 00a20c63 beq x4,x10,80005790 + 8000577c: 584022ef jal x5,80007d00 + 80005780: 80005770 .word 0x80005770 + 80005784: 00000000 .word 0x00000000 + 80005788: 80017056 .word 0x80017056 + 8000578c: 00000000 .word 0x00000000 + 80005790: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xabb9eed4a207ad1f + 80005794: 0007b583 ld x11,0(x15) + 80005798: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x4cd1add9fde62337 + 8000579c: 0007bb83 ld x23,0(x15) + 800057a0: 00878793 addi x15,x15,8 + +00000000800057a4 : +Zbkb_packh_cg_cmp_rd_rs1_b11: + packh x11, x11, x23 # perform operation + 800057a4: 0975f5b3 packh x11,x11,x23 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zbkb_packh_cg_cmp_rd_rs1_b11, Zbkb_packh_cg_cmp_rd_rs1_b11_str) + 800057a8: 000db203 ld x4,0(x27) + 800057ac: 00b20c63 beq x4,x11,800057c4 + 800057b0: 550022ef jal x5,80007d00 + 800057b4: 800057a4 .word 0x800057a4 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 8001708f .word 0x8001708f + 800057c0: 00000000 .word 0x00000000 + 800057c4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x5983492ac17fe09f + 800057c8: 0007b603 ld x12,0(x15) + 800057cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x845495e78507d74f + 800057d0: 0007b803 ld x16,0(x15) + 800057d4: 00878793 addi x15,x15,8 + +00000000800057d8 : +Zbkb_packh_cg_cmp_rd_rs1_b12: + packh x12, x12, x16 # perform operation + 800057d8: 09067633 packh x12,x12,x16 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zbkb_packh_cg_cmp_rd_rs1_b12, Zbkb_packh_cg_cmp_rd_rs1_b12_str) + 800057dc: 000db203 ld x4,0(x27) + 800057e0: 00c20c63 beq x4,x12,800057f8 + 800057e4: 51c022ef jal x5,80007d00 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 800170c8 .word 0x800170c8 + 800057f4: 00000000 .word 0x00000000 + 800057f8: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x6e1a2929d5438a50 + 800057fc: 0007b683 ld x13,0(x15) + 80005800: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x1bd6443291f91a84 + 80005804: 0007be03 ld x28,0(x15) + 80005808: 00878793 addi x15,x15,8 + +000000008000580c : +Zbkb_packh_cg_cmp_rd_rs1_b13: + packh x13, x13, x28 # perform operation + 8000580c: 09c6f6b3 packh x13,x13,x28 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zbkb_packh_cg_cmp_rd_rs1_b13, Zbkb_packh_cg_cmp_rd_rs1_b13_str) + 80005810: 000db203 ld x4,0(x27) + 80005814: 00d20c63 beq x4,x13,8000582c + 80005818: 4e8022ef jal x5,80007d00 + 8000581c: 8000580c .word 0x8000580c + 80005820: 00000000 .word 0x00000000 + 80005824: 80017101 .word 0x80017101 + 80005828: 00000000 .word 0x00000000 + 8000582c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x33ece059c3353f0a + 80005830: 0007b703 ld x14,0(x15) + 80005834: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x62118a10a6c645d3 + 80005838: 0007b583 ld x11,0(x15) + 8000583c: 00878793 addi x15,x15,8 + +0000000080005840 : +Zbkb_packh_cg_cmp_rd_rs1_b14: + packh x14, x14, x11 # perform operation + 80005840: 08b77733 packh x14,x14,x11 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zbkb_packh_cg_cmp_rd_rs1_b14, Zbkb_packh_cg_cmp_rd_rs1_b14_str) + 80005844: 000db203 ld x4,0(x27) + 80005848: 00e20c63 beq x4,x14,80005860 + 8000584c: 4b4022ef jal x5,80007d00 + 80005850: 80005840 .word 0x80005840 + 80005854: 00000000 .word 0x00000000 + 80005858: 8001713a .word 0x8001713a + 8000585c: 00000000 .word 0x00000000 + 80005860: 008d8d93 addi x27,x27,8 + + mv x30, x15 # switch data pointer register to avoid conflict with test + 80005864: 00078f13 addi x30,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0xfccd99cd58515dd5 + 80005868: 000f3783 ld x15,0(x30) + 8000586c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs2: x7 = 0x11d466ef5d584777 + 80005870: 000f3383 ld x7,0(x30) + 80005874: 008f0f13 addi x30,x30,8 + +0000000080005878 : +Zbkb_packh_cg_cmp_rd_rs1_b15: + packh x15, x15, x7 # perform operation + 80005878: 0877f7b3 packh x15,x15,x7 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zbkb_packh_cg_cmp_rd_rs1_b15, Zbkb_packh_cg_cmp_rd_rs1_b15_str) + 8000587c: 000db203 ld x4,0(x27) + 80005880: 00f20c63 beq x4,x15,80005898 + 80005884: 47c022ef jal x5,80007d00 + 80005888: 80005878 .word 0x80005878 + 8000588c: 00000000 .word 0x00000000 + 80005890: 80017173 .word 0x80017173 + 80005894: 00000000 .word 0x00000000 + 80005898: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x5a31106ee80b06ca + 8000589c: 000f3803 ld x16,0(x30) + 800058a0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xc9a5819a16d05985 + 800058a4: 000f3983 ld x19,0(x30) + 800058a8: 008f0f13 addi x30,x30,8 + +00000000800058ac : +Zbkb_packh_cg_cmp_rd_rs1_b16: + packh x16, x16, x19 # perform operation + 800058ac: 09387833 packh x16,x16,x19 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zbkb_packh_cg_cmp_rd_rs1_b16, Zbkb_packh_cg_cmp_rd_rs1_b16_str) + 800058b0: 000db203 ld x4,0(x27) + 800058b4: 01020c63 beq x4,x16,800058cc + 800058b8: 448022ef jal x5,80007d00 + 800058bc: 800058ac .word 0x800058ac + 800058c0: 00000000 .word 0x00000000 + 800058c4: 800171ac .word 0x800171ac + 800058c8: 00000000 .word 0x00000000 + 800058cc: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x2b1d6832a86269ef + 800058d0: 000f3883 ld x17,0(x30) + 800058d4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x3e35fe84150c366f + 800058d8: 000f3c83 ld x25,0(x30) + 800058dc: 008f0f13 addi x30,x30,8 + +00000000800058e0 : +Zbkb_packh_cg_cmp_rd_rs1_b17: + packh x17, x17, x25 # perform operation + 800058e0: 0998f8b3 packh x17,x17,x25 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_packh_cg_cmp_rd_rs1_b17, Zbkb_packh_cg_cmp_rd_rs1_b17_str) + 800058e4: 000db203 ld x4,0(x27) + 800058e8: 01120c63 beq x4,x17,80005900 + 800058ec: 414022ef jal x5,80007d00 + 800058f0: 800058e0 .word 0x800058e0 + 800058f4: 00000000 .word 0x00000000 + 800058f8: 800171e5 .word 0x800171e5 + 800058fc: 00000000 .word 0x00000000 + 80005900: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x317bccb5f054705a + 80005904: 000f3903 ld x18,0(x30) + 80005908: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0xee8637d7075a3685 + 8000590c: 000f3403 ld x8,0(x30) + 80005910: 008f0f13 addi x30,x30,8 + +0000000080005914 : +Zbkb_packh_cg_cmp_rd_rs1_b18: + packh x18, x18, x8 # perform operation + 80005914: 08897933 packh x18,x18,x8 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zbkb_packh_cg_cmp_rd_rs1_b18, Zbkb_packh_cg_cmp_rd_rs1_b18_str) + 80005918: 000db203 ld x4,0(x27) + 8000591c: 01220c63 beq x4,x18,80005934 + 80005920: 3e0022ef jal x5,80007d00 + 80005924: 80005914 .word 0x80005914 + 80005928: 00000000 .word 0x00000000 + 8000592c: 8001721e .word 0x8001721e + 80005930: 00000000 .word 0x00000000 + 80005934: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xaf77a826cfa33e3c + 80005938: 000f3983 ld x19,0(x30) + 8000593c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x47155c75ffa32d5e + 80005940: 000f3583 ld x11,0(x30) + 80005944: 008f0f13 addi x30,x30,8 + +0000000080005948 : +Zbkb_packh_cg_cmp_rd_rs1_b19: + packh x19, x19, x11 # perform operation + 80005948: 08b9f9b3 packh x19,x19,x11 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zbkb_packh_cg_cmp_rd_rs1_b19, Zbkb_packh_cg_cmp_rd_rs1_b19_str) + 8000594c: 000db203 ld x4,0(x27) + 80005950: 01320c63 beq x4,x19,80005968 + 80005954: 3ac022ef jal x5,80007d00 + 80005958: 80005948 .word 0x80005948 + 8000595c: 00000000 .word 0x00000000 + 80005960: 80017257 .word 0x80017257 + 80005964: 00000000 .word 0x00000000 + 80005968: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x0503d0f7703dbe9d + 8000596c: 000f3a03 ld x20,0(x30) + 80005970: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0x94972c9be845a45b + 80005974: 000f3403 ld x8,0(x30) + 80005978: 008f0f13 addi x30,x30,8 + +000000008000597c : +Zbkb_packh_cg_cmp_rd_rs1_b20: + packh x20, x20, x8 # perform operation + 8000597c: 088a7a33 packh x20,x20,x8 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zbkb_packh_cg_cmp_rd_rs1_b20, Zbkb_packh_cg_cmp_rd_rs1_b20_str) + 80005980: 000db203 ld x4,0(x27) + 80005984: 01420c63 beq x4,x20,8000599c + 80005988: 378022ef jal x5,80007d00 + 8000598c: 8000597c .word 0x8000597c + 80005990: 00000000 .word 0x00000000 + 80005994: 80017290 .word 0x80017290 + 80005998: 00000000 .word 0x00000000 + 8000599c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xc799380a18ae5ea3 + 800059a0: 000f3a83 ld x21,0(x30) + 800059a4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0x13085e9bb0d4457a + 800059a8: 000f3483 ld x9,0(x30) + 800059ac: 008f0f13 addi x30,x30,8 + +00000000800059b0 : +Zbkb_packh_cg_cmp_rd_rs1_b21: + packh x21, x21, x9 # perform operation + 800059b0: 089afab3 packh x21,x21,x9 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zbkb_packh_cg_cmp_rd_rs1_b21, Zbkb_packh_cg_cmp_rd_rs1_b21_str) + 800059b4: 000db203 ld x4,0(x27) + 800059b8: 01520c63 beq x4,x21,800059d0 + 800059bc: 344022ef jal x5,80007d00 + 800059c0: 800059b0 .word 0x800059b0 + 800059c4: 00000000 .word 0x00000000 + 800059c8: 800172c9 .word 0x800172c9 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x088ff659151c36d5 + 800059d4: 000f3b03 ld x22,0(x30) + 800059d8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x54db3310f23c0d25 + 800059dc: 000f3803 ld x16,0(x30) + 800059e0: 008f0f13 addi x30,x30,8 + +00000000800059e4 : +Zbkb_packh_cg_cmp_rd_rs1_b22: + packh x22, x22, x16 # perform operation + 800059e4: 090b7b33 packh x22,x22,x16 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zbkb_packh_cg_cmp_rd_rs1_b22, Zbkb_packh_cg_cmp_rd_rs1_b22_str) + 800059e8: 000db203 ld x4,0(x27) + 800059ec: 01620c63 beq x4,x22,80005a04 + 800059f0: 310022ef jal x5,80007d00 + 800059f4: 800059e4 .word 0x800059e4 + 800059f8: 00000000 .word 0x00000000 + 800059fc: 80017302 .word 0x80017302 + 80005a00: 00000000 .word 0x00000000 + 80005a04: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x7bd37a51490f7ac4 + 80005a08: 000f3b83 ld x23,0(x30) + 80005a0c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0x3de1fd55f6ec5733 + 80005a10: 000f3483 ld x9,0(x30) + 80005a14: 008f0f13 addi x30,x30,8 + +0000000080005a18 : +Zbkb_packh_cg_cmp_rd_rs1_b23: + packh x23, x23, x9 # perform operation + 80005a18: 089bfbb3 packh x23,x23,x9 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zbkb_packh_cg_cmp_rd_rs1_b23, Zbkb_packh_cg_cmp_rd_rs1_b23_str) + 80005a1c: 000db203 ld x4,0(x27) + 80005a20: 01720c63 beq x4,x23,80005a38 + 80005a24: 2dc022ef jal x5,80007d00 + 80005a28: 80005a18 .word 0x80005a18 + 80005a2c: 00000000 .word 0x00000000 + 80005a30: 8001733b .word 0x8001733b + 80005a34: 00000000 .word 0x00000000 + 80005a38: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x509e07e07009877c + 80005a3c: 000f3c03 ld x24,0(x30) + 80005a40: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x3badf8a4ab55fa36 + 80005a44: 000f3b83 ld x23,0(x30) + 80005a48: 008f0f13 addi x30,x30,8 + +0000000080005a4c : +Zbkb_packh_cg_cmp_rd_rs1_b24: + packh x24, x24, x23 # perform operation + 80005a4c: 097c7c33 packh x24,x24,x23 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zbkb_packh_cg_cmp_rd_rs1_b24, Zbkb_packh_cg_cmp_rd_rs1_b24_str) + 80005a50: 000db203 ld x4,0(x27) + 80005a54: 01820c63 beq x4,x24,80005a6c + 80005a58: 2a8022ef jal x5,80007d00 + 80005a5c: 80005a4c .word 0x80005a4c + 80005a60: 00000000 .word 0x00000000 + 80005a64: 80017374 .word 0x80017374 + 80005a68: 00000000 .word 0x00000000 + 80005a6c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xa425d696fa51c147 + 80005a70: 000f3c83 ld x25,0(x30) + 80005a74: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x46ddbe0de7bc651f + 80005a78: 000f3a03 ld x20,0(x30) + 80005a7c: 008f0f13 addi x30,x30,8 + +0000000080005a80 : +Zbkb_packh_cg_cmp_rd_rs1_b25: + packh x25, x25, x20 # perform operation + 80005a80: 094cfcb3 packh x25,x25,x20 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zbkb_packh_cg_cmp_rd_rs1_b25, Zbkb_packh_cg_cmp_rd_rs1_b25_str) + 80005a84: 000db203 ld x4,0(x27) + 80005a88: 01920c63 beq x4,x25,80005aa0 + 80005a8c: 274022ef jal x5,80007d00 + 80005a90: 80005a80 .word 0x80005a80 + 80005a94: 00000000 .word 0x00000000 + 80005a98: 800173ad .word 0x800173ad + 80005a9c: 00000000 .word 0x00000000 + 80005aa0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xa1bd75931c74f625 + 80005aa4: 000f3d03 ld x26,0(x30) + 80005aa8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0x1e47db8d1d62910a + 80005aac: 000f3003 ld x0,0(x30) + 80005ab0: 008f0f13 addi x30,x30,8 + +0000000080005ab4 : +Zbkb_packh_cg_cmp_rd_rs1_b26: + packh x26, x26, x0 # perform operation + 80005ab4: 080d7d33 packh x26,x26,x0 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zbkb_packh_cg_cmp_rd_rs1_b26, Zbkb_packh_cg_cmp_rd_rs1_b26_str) + 80005ab8: 000db203 ld x4,0(x27) + 80005abc: 01a20c63 beq x4,x26,80005ad4 + 80005ac0: 240022ef jal x5,80007d00 + 80005ac4: 80005ab4 .word 0x80005ab4 + 80005ac8: 00000000 .word 0x00000000 + 80005acc: 800173e6 .word 0x800173e6 + 80005ad0: 00000000 .word 0x00000000 + 80005ad4: 008d8d93 addi x27,x27,8 + + mv x10, x27 # switch signature pointer register to avoid conflict with test + 80005ad8: 000d8513 addi x10,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x310d085dd20b150c + 80005adc: 000f3d83 ld x27,0(x30) + 80005ae0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x015b0348b3f1e9a1 + 80005ae4: 000f3783 ld x15,0(x30) + 80005ae8: 008f0f13 addi x30,x30,8 + +0000000080005aec : +Zbkb_packh_cg_cmp_rd_rs1_b27: + packh x27, x27, x15 # perform operation + 80005aec: 08fdfdb3 packh x27,x27,x15 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkb_packh_cg_cmp_rd_rs1_b27, Zbkb_packh_cg_cmp_rd_rs1_b27_str) + 80005af0: 00053203 ld x4,0(x10) + 80005af4: 01b20c63 beq x4,x27,80005b0c + 80005af8: 208022ef jal x5,80007d00 + 80005afc: 80005aec .word 0x80005aec + 80005b00: 00000000 .word 0x00000000 + 80005b04: 8001741f .word 0x8001741f + 80005b08: 00000000 .word 0x00000000 + 80005b0c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x0c067b58047de71f + 80005b10: 000f3e03 ld x28,0(x30) + 80005b14: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x29b88a5d5109d180 + 80005b18: 000f3583 ld x11,0(x30) + 80005b1c: 008f0f13 addi x30,x30,8 + +0000000080005b20 : +Zbkb_packh_cg_cmp_rd_rs1_b28: + packh x28, x28, x11 # perform operation + 80005b20: 08be7e33 packh x28,x28,x11 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkb_packh_cg_cmp_rd_rs1_b28, Zbkb_packh_cg_cmp_rd_rs1_b28_str) + 80005b24: 00053203 ld x4,0(x10) + 80005b28: 01c20c63 beq x4,x28,80005b40 + 80005b2c: 1d4022ef jal x5,80007d00 + 80005b30: 80005b20 .word 0x80005b20 + 80005b34: 00000000 .word 0x00000000 + 80005b38: 80017458 .word 0x80017458 + 80005b3c: 00000000 .word 0x00000000 + 80005b40: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x5d0c11badfa52466 + 80005b44: 000f3e83 ld x29,0(x30) + 80005b48: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs2: x1 = 0xf2ab0150a8c6c9b7 + 80005b4c: 000f3083 ld x1,0(x30) + 80005b50: 008f0f13 addi x30,x30,8 + +0000000080005b54 : +Zbkb_packh_cg_cmp_rd_rs1_b29: + packh x29, x29, x1 # perform operation + 80005b54: 081efeb3 packh x29,x29,x1 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkb_packh_cg_cmp_rd_rs1_b29, Zbkb_packh_cg_cmp_rd_rs1_b29_str) + 80005b58: 00053203 ld x4,0(x10) + 80005b5c: 01d20c63 beq x4,x29,80005b74 + 80005b60: 1a0022ef jal x5,80007d00 + 80005b64: 80005b54 .word 0x80005b54 + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 80017491 .word 0x80017491 + 80005b70: 00000000 .word 0x00000000 + 80005b74: 00850513 addi x10,x10,8 + + mv x9, x30 # switch data pointer register to avoid conflict with test + 80005b78: 000f0493 addi x9,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x3b5ab3b31f0aaed8 + 80005b7c: 0004bf03 ld x30,0(x9) + 80005b80: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xd211b6f40f77aea4 + 80005b84: 0004b403 ld x8,0(x9) + 80005b88: 00848493 addi x9,x9,8 + +0000000080005b8c : +Zbkb_packh_cg_cmp_rd_rs1_b30: + packh x30, x30, x8 # perform operation + 80005b8c: 088f7f33 packh x30,x30,x8 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkb_packh_cg_cmp_rd_rs1_b30, Zbkb_packh_cg_cmp_rd_rs1_b30_str) + 80005b90: 00053203 ld x4,0(x10) + 80005b94: 01e20c63 beq x4,x30,80005bac + 80005b98: 168022ef jal x5,80007d00 + 80005b9c: 80005b8c .word 0x80005b8c + 80005ba0: 00000000 .word 0x00000000 + 80005ba4: 800174ca .word 0x800174ca + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xb10bd15facff47c2 + 80005bb0: 0004bf83 ld x31,0(x9) + 80005bb4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xd2708ababf0fe348 + 80005bb8: 0004bd83 ld x27,0(x9) + 80005bbc: 00848493 addi x9,x9,8 + +0000000080005bc0 : +Zbkb_packh_cg_cmp_rd_rs1_b31: + packh x31, x31, x27 # perform operation + 80005bc0: 09bfffb3 packh x31,x31,x27 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkb_packh_cg_cmp_rd_rs1_b31, Zbkb_packh_cg_cmp_rd_rs1_b31_str) + 80005bc4: 00053203 ld x4,0(x10) + 80005bc8: 01f20c63 beq x4,x31,80005be0 + 80005bcc: 134022ef jal x5,80007d00 + 80005bd0: 80005bc0 .word 0x80005bc0 + 80005bd4: 00000000 .word 0x00000000 + 80005bd8: 80017503 .word 0x80017503 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 00850513 addi x10,x10,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xce9246a7b29ebd93 + 80005be4: 0004b903 ld x18,0(x9) + 80005be8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x552615ea247f5a0f + 80005bec: 0004b003 ld x0,0(x9) + 80005bf0: 00848493 addi x9,x9,8 + +0000000080005bf4 : +Zbkb_packh_cg_cmp_rd_rs2_b0: + packh x0, x18, x0 # perform operation + 80005bf4: 08097033 packh x0,x18,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zbkb_packh_cg_cmp_rd_rs2_b0, Zbkb_packh_cg_cmp_rd_rs2_b0_str) + 80005bf8: 00053203 ld x4,0(x10) + 80005bfc: 00020c63 beq x4,x0,80005c14 + 80005c00: 100022ef jal x5,80007d00 + 80005c04: 80005bf4 .word 0x80005bf4 + 80005c08: 00000000 .word 0x00000000 + 80005c0c: 8001753c .word 0x8001753c + 80005c10: 00000000 .word 0x00000000 + 80005c14: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x16e0e00a08decdff + 80005c18: 0004b303 ld x6,0(x9) + 80005c1c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x2a2b631db0218c78 + 80005c20: 0004b083 ld x1,0(x9) + 80005c24: 00848493 addi x9,x9,8 + +0000000080005c28 : +Zbkb_packh_cg_cmp_rd_rs2_b1: + packh x1, x6, x1 # perform operation + 80005c28: 081370b3 packh x1,x6,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkb_packh_cg_cmp_rd_rs2_b1, Zbkb_packh_cg_cmp_rd_rs2_b1_str) + 80005c2c: 00053203 ld x4,0(x10) + 80005c30: 00120c63 beq x4,x1,80005c48 + 80005c34: 0cc022ef jal x5,80007d00 + 80005c38: 80005c28 .word 0x80005c28 + 80005c3c: 00000000 .word 0x00000000 + 80005c40: 80017574 .word 0x80017574 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x9efa03147d4766f4 + 80005c4c: 0004bf03 ld x30,0(x9) + 80005c50: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x58dffa775f059bd1 + 80005c54: 0004b103 ld x2,0(x9) + 80005c58: 00848493 addi x9,x9,8 + +0000000080005c5c : +Zbkb_packh_cg_cmp_rd_rs2_b2: + packh x2, x30, x2 # perform operation + 80005c5c: 082f7133 packh x2,x30,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkb_packh_cg_cmp_rd_rs2_b2, Zbkb_packh_cg_cmp_rd_rs2_b2_str) + 80005c60: 00053203 ld x4,0(x10) + 80005c64: 00220c63 beq x4,x2,80005c7c + 80005c68: 098022ef jal x5,80007d00 + 80005c6c: 80005c5c .word 0x80005c5c + 80005c70: 00000000 .word 0x00000000 + 80005c74: 800175ac .word 0x800175ac + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x8d12edb5ab8eeef3 + 80005c80: 0004b783 ld x15,0(x9) + 80005c84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xb507a1022473cff0 + 80005c88: 0004b183 ld x3,0(x9) + 80005c8c: 00848493 addi x9,x9,8 + +0000000080005c90 : +Zbkb_packh_cg_cmp_rd_rs2_b3: + packh x3, x15, x3 # perform operation + 80005c90: 0837f1b3 packh x3,x15,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkb_packh_cg_cmp_rd_rs2_b3, Zbkb_packh_cg_cmp_rd_rs2_b3_str) + 80005c94: 00053203 ld x4,0(x10) + 80005c98: 00320c63 beq x4,x3,80005cb0 + 80005c9c: 064022ef jal x5,80007d00 + 80005ca0: 80005c90 .word 0x80005c90 + 80005ca4: 00000000 .word 0x00000000 + 80005ca8: 800175e4 .word 0x800175e4 + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 00850513 addi x10,x10,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005cb4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005cb8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xd85a9567e779dfed + 80005cbc: 0004b703 ld x14,0(x9) + 80005cc0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x55f7f703713b1889 + 80005cc4: 0004b203 ld x4,0(x9) + 80005cc8: 00848493 addi x9,x9,8 + +0000000080005ccc : +Zbkb_packh_cg_cmp_rd_rs2_b4: + packh x4, x14, x4 # perform operation + 80005ccc: 08477233 packh x4,x14,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_packh_cg_cmp_rd_rs2_b4, Zbkb_packh_cg_cmp_rd_rs2_b4_str) + 80005cd0: 00053383 ld x7,0(x10) + 80005cd4: 00438c63 beq x7,x4,80005cec + 80005cd8: 0400246f jal x8,80007d18 + 80005cdc: 80005ccc .word 0x80005ccc + 80005ce0: 00000000 .word 0x00000000 + 80005ce4: 8001761c .word 0x8001761c + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x27bc3ae3c4a6d3a2 + 80005cf0: 0004b103 ld x2,0(x9) + 80005cf4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x4ed9d15c4dc651b8 + 80005cf8: 0004b283 ld x5,0(x9) + 80005cfc: 00848493 addi x9,x9,8 + +0000000080005d00 : +Zbkb_packh_cg_cmp_rd_rs2_b5: + packh x5, x2, x5 # perform operation + 80005d00: 085172b3 packh x5,x2,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_packh_cg_cmp_rd_rs2_b5, Zbkb_packh_cg_cmp_rd_rs2_b5_str) + 80005d04: 00053383 ld x7,0(x10) + 80005d08: 00538c63 beq x7,x5,80005d20 + 80005d0c: 00c0246f jal x8,80007d18 + 80005d10: 80005d00 .word 0x80005d00 + 80005d14: 00000000 .word 0x00000000 + 80005d18: 80017654 .word 0x80017654 + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x904552577569c6a8 + 80005d24: 0004b883 ld x17,0(x9) + 80005d28: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x36d645f391dcb2a2 + 80005d2c: 0004b303 ld x6,0(x9) + 80005d30: 00848493 addi x9,x9,8 + +0000000080005d34 : +Zbkb_packh_cg_cmp_rd_rs2_b6: + packh x6, x17, x6 # perform operation + 80005d34: 0868f333 packh x6,x17,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_packh_cg_cmp_rd_rs2_b6, Zbkb_packh_cg_cmp_rd_rs2_b6_str) + 80005d38: 00053383 ld x7,0(x10) + 80005d3c: 00638c63 beq x7,x6,80005d54 + 80005d40: 7d90146f jal x8,80007d18 + 80005d44: 80005d34 .word 0x80005d34 + 80005d48: 00000000 .word 0x00000000 + 80005d4c: 8001768c .word 0x8001768c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d58: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d5c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x1dc8215cc25e1b28 + 80005d60: 0004bd03 ld x26,0(x9) + 80005d64: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x8a1c3b3a959bdf90 + 80005d68: 0004b383 ld x7,0(x9) + 80005d6c: 00848493 addi x9,x9,8 + +0000000080005d70 : +Zbkb_packh_cg_cmp_rd_rs2_b7: + packh x7, x26, x7 # perform operation + 80005d70: 087d73b3 packh x7,x26,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_packh_cg_cmp_rd_rs2_b7, Zbkb_packh_cg_cmp_rd_rs2_b7_str) + 80005d74: 00053683 ld x13,0(x10) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 7c50176f jal x14,80007d40 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 800176c4 .word 0x800176c4 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xb31fd37cb5207570 + 80005d94: 0004be83 ld x29,0(x9) + 80005d98: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x21138fcc8f392c2a + 80005d9c: 0004b403 ld x8,0(x9) + 80005da0: 00848493 addi x9,x9,8 + +0000000080005da4 : +Zbkb_packh_cg_cmp_rd_rs2_b8: + packh x8, x29, x8 # perform operation + 80005da4: 088ef433 packh x8,x29,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_packh_cg_cmp_rd_rs2_b8, Zbkb_packh_cg_cmp_rd_rs2_b8_str) + 80005da8: 00053683 ld x13,0(x10) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 7910176f jal x14,80007d40 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 800176fc .word 0x800176fc + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00850513 addi x10,x10,8 + + mv x18, x9 # switch data pointer register to avoid conflict with test + 80005dc8: 00048913 addi x18,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xe2834e8dbb8ccca8 + 80005dcc: 00093203 ld x4,0(x18) + 80005dd0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x2fafaa87d993a5bb + 80005dd4: 00093483 ld x9,0(x18) + 80005dd8: 00890913 addi x18,x18,8 + +0000000080005ddc : +Zbkb_packh_cg_cmp_rd_rs2_b9: + packh x9, x4, x9 # perform operation + 80005ddc: 089274b3 packh x9,x4,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_packh_cg_cmp_rd_rs2_b9, Zbkb_packh_cg_cmp_rd_rs2_b9_str) + 80005de0: 00053683 ld x13,0(x10) + 80005de4: 00968c63 beq x13,x9,80005dfc + 80005de8: 7590176f jal x14,80007d40 + 80005dec: 80005ddc .word 0x80005ddc + 80005df0: 00000000 .word 0x00000000 + 80005df4: 80017734 .word 0x80017734 + 80005df8: 00000000 .word 0x00000000 + 80005dfc: 00850513 addi x10,x10,8 + + mv x11, x10 # switch signature pointer register to avoid conflict with test + 80005e00: 00050593 addi x11,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x2021e1f86a1d1cfa + 80005e04: 00093b83 ld x23,0(x18) + 80005e08: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x058518443fc3853c + 80005e0c: 00093503 ld x10,0(x18) + 80005e10: 00890913 addi x18,x18,8 + +0000000080005e14 : +Zbkb_packh_cg_cmp_rd_rs2_b10: + packh x10, x23, x10 # perform operation + 80005e14: 08abf533 packh x10,x23,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zbkb_packh_cg_cmp_rd_rs2_b10, Zbkb_packh_cg_cmp_rd_rs2_b10_str) + 80005e18: 0005b683 ld x13,0(x11) + 80005e1c: 00a68c63 beq x13,x10,80005e34 + 80005e20: 7210176f jal x14,80007d40 + 80005e24: 80005e14 .word 0x80005e14 + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 8001776c .word 0x8001776c + 80005e30: 00000000 .word 0x00000000 + 80005e34: 00858593 addi x11,x11,8 + + mv x17, x11 # switch signature pointer register to avoid conflict with test + 80005e38: 00058893 addi x17,x11,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x0b78fcd4a1f6c8b9 + 80005e3c: 00093783 ld x15,0(x18) + 80005e40: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xf61718c1aace41ff + 80005e44: 00093583 ld x11,0(x18) + 80005e48: 00890913 addi x18,x18,8 + +0000000080005e4c : +Zbkb_packh_cg_cmp_rd_rs2_b11: + packh x11, x15, x11 # perform operation + 80005e4c: 08b7f5b3 packh x11,x15,x11 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zbkb_packh_cg_cmp_rd_rs2_b11, Zbkb_packh_cg_cmp_rd_rs2_b11_str) + 80005e50: 0008b683 ld x13,0(x17) + 80005e54: 00b68c63 beq x13,x11,80005e6c + 80005e58: 6e90176f jal x14,80007d40 + 80005e5c: 80005e4c .word 0x80005e4c + 80005e60: 00000000 .word 0x00000000 + 80005e64: 800177a5 .word 0x800177a5 + 80005e68: 00000000 .word 0x00000000 + 80005e6c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x511c512ec307e258 + 80005e70: 00093583 ld x11,0(x18) + 80005e74: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x9615afd18361aa92 + 80005e78: 00093603 ld x12,0(x18) + 80005e7c: 00890913 addi x18,x18,8 + +0000000080005e80 : +Zbkb_packh_cg_cmp_rd_rs2_b12: + packh x12, x11, x12 # perform operation + 80005e80: 08c5f633 packh x12,x11,x12 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zbkb_packh_cg_cmp_rd_rs2_b12, Zbkb_packh_cg_cmp_rd_rs2_b12_str) + 80005e84: 0008b683 ld x13,0(x17) + 80005e88: 00c68c63 beq x13,x12,80005ea0 + 80005e8c: 6b50176f jal x14,80007d40 + 80005e90: 80005e80 .word 0x80005e80 + 80005e94: 00000000 .word 0x00000000 + 80005e98: 800177de .word 0x800177de + 80005e9c: 00000000 .word 0x00000000 + 80005ea0: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005ea4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005ea8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xcee231b28f422e67 + 80005eac: 00093d83 ld x27,0(x18) + 80005eb0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x4f94c8d41514dbe6 + 80005eb4: 00093683 ld x13,0(x18) + 80005eb8: 00890913 addi x18,x18,8 + +0000000080005ebc : +Zbkb_packh_cg_cmp_rd_rs2_b13: + packh x13, x27, x13 # perform operation + 80005ebc: 08ddf6b3 packh x13,x27,x13 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zbkb_packh_cg_cmp_rd_rs2_b13, Zbkb_packh_cg_cmp_rd_rs2_b13_str) + 80005ec0: 0008b383 ld x7,0(x17) + 80005ec4: 00d38c63 beq x7,x13,80005edc + 80005ec8: 6510146f jal x8,80007d18 + 80005ecc: 80005ebc .word 0x80005ebc + 80005ed0: 00000000 .word 0x00000000 + 80005ed4: 80017817 .word 0x80017817 + 80005ed8: 00000000 .word 0x00000000 + 80005edc: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x73b0405cf36dc3dd + 80005ee0: 00093483 ld x9,0(x18) + 80005ee4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xcf81b98cfa3eb669 + 80005ee8: 00093703 ld x14,0(x18) + 80005eec: 00890913 addi x18,x18,8 + +0000000080005ef0 : +Zbkb_packh_cg_cmp_rd_rs2_b14: + packh x14, x9, x14 # perform operation + 80005ef0: 08e4f733 packh x14,x9,x14 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zbkb_packh_cg_cmp_rd_rs2_b14, Zbkb_packh_cg_cmp_rd_rs2_b14_str) + 80005ef4: 0008b383 ld x7,0(x17) + 80005ef8: 00e38c63 beq x7,x14,80005f10 + 80005efc: 61d0146f jal x8,80007d18 + 80005f00: 80005ef0 .word 0x80005ef0 + 80005f04: 00000000 .word 0x00000000 + 80005f08: 80017850 .word 0x80017850 + 80005f0c: 00000000 .word 0x00000000 + 80005f10: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xeaa0be82bbc169f0 + 80005f14: 00093c83 ld x25,0(x18) + 80005f18: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x0727d75a562f3f73 + 80005f1c: 00093783 ld x15,0(x18) + 80005f20: 00890913 addi x18,x18,8 + +0000000080005f24 : +Zbkb_packh_cg_cmp_rd_rs2_b15: + packh x15, x25, x15 # perform operation + 80005f24: 08fcf7b3 packh x15,x25,x15 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zbkb_packh_cg_cmp_rd_rs2_b15, Zbkb_packh_cg_cmp_rd_rs2_b15_str) + 80005f28: 0008b383 ld x7,0(x17) + 80005f2c: 00f38c63 beq x7,x15,80005f44 + 80005f30: 5e90146f jal x8,80007d18 + 80005f34: 80005f24 .word 0x80005f24 + 80005f38: 00000000 .word 0x00000000 + 80005f3c: 80017889 .word 0x80017889 + 80005f40: 00000000 .word 0x00000000 + 80005f44: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x8007d2082473297d + 80005f48: 00093783 ld x15,0(x18) + 80005f4c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xc8e329ec2f12f5f8 + 80005f50: 00093803 ld x16,0(x18) + 80005f54: 00890913 addi x18,x18,8 + +0000000080005f58 : +Zbkb_packh_cg_cmp_rd_rs2_b16: + packh x16, x15, x16 # perform operation + 80005f58: 0907f833 packh x16,x15,x16 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zbkb_packh_cg_cmp_rd_rs2_b16, Zbkb_packh_cg_cmp_rd_rs2_b16_str) + 80005f5c: 0008b383 ld x7,0(x17) + 80005f60: 01038c63 beq x7,x16,80005f78 + 80005f64: 5b50146f jal x8,80007d18 + 80005f68: 80005f58 .word 0x80005f58 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 800178c2 .word 0x800178c2 + 80005f74: 00000000 .word 0x00000000 + 80005f78: 00888893 addi x17,x17,8 + + mv x23, x17 # switch signature pointer register to avoid conflict with test + 80005f7c: 00088b93 addi x23,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xa1527241cf95603d + 80005f80: 00093203 ld x4,0(x18) + 80005f84: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xd2870c68e13dec48 + 80005f88: 00093883 ld x17,0(x18) + 80005f8c: 00890913 addi x18,x18,8 + +0000000080005f90 : +Zbkb_packh_cg_cmp_rd_rs2_b17: + packh x17, x4, x17 # perform operation + 80005f90: 091278b3 packh x17,x4,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x17, Zbkb_packh_cg_cmp_rd_rs2_b17, Zbkb_packh_cg_cmp_rd_rs2_b17_str) + 80005f94: 000bb383 ld x7,0(x23) + 80005f98: 01138c63 beq x7,x17,80005fb0 + 80005f9c: 57d0146f jal x8,80007d18 + 80005fa0: 80005f90 .word 0x80005f90 + 80005fa4: 00000000 .word 0x00000000 + 80005fa8: 800178fb .word 0x800178fb + 80005fac: 00000000 .word 0x00000000 + 80005fb0: 008b8b93 addi x23,x23,8 + + mv x16, x18 # switch data pointer register to avoid conflict with test + 80005fb4: 00090813 addi x16,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xaa311f7944b148c5 + 80005fb8: 00083303 ld x6,0(x16) + 80005fbc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x972b52f6e2611656 + 80005fc0: 00083903 ld x18,0(x16) + 80005fc4: 00880813 addi x16,x16,8 + +0000000080005fc8 : +Zbkb_packh_cg_cmp_rd_rs2_b18: + packh x18, x6, x18 # perform operation + 80005fc8: 09237933 packh x18,x6,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zbkb_packh_cg_cmp_rd_rs2_b18, Zbkb_packh_cg_cmp_rd_rs2_b18_str) + 80005fcc: 000bb383 ld x7,0(x23) + 80005fd0: 01238c63 beq x7,x18,80005fe8 + 80005fd4: 5450146f jal x8,80007d18 + 80005fd8: 80005fc8 .word 0x80005fc8 + 80005fdc: 00000000 .word 0x00000000 + 80005fe0: 80017934 .word 0x80017934 + 80005fe4: 00000000 .word 0x00000000 + 80005fe8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x821a83850c520a4c + 80005fec: 00083c03 ld x24,0(x16) + 80005ff0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xa4a54e07fd8033b3 + 80005ff4: 00083983 ld x19,0(x16) + 80005ff8: 00880813 addi x16,x16,8 + +0000000080005ffc : +Zbkb_packh_cg_cmp_rd_rs2_b19: + packh x19, x24, x19 # perform operation + 80005ffc: 093c79b3 packh x19,x24,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zbkb_packh_cg_cmp_rd_rs2_b19, Zbkb_packh_cg_cmp_rd_rs2_b19_str) + 80006000: 000bb383 ld x7,0(x23) + 80006004: 01338c63 beq x7,x19,8000601c + 80006008: 5110146f jal x8,80007d18 + 8000600c: 80005ffc .word 0x80005ffc + 80006010: 00000000 .word 0x00000000 + 80006014: 8001796d .word 0x8001796d + 80006018: 00000000 .word 0x00000000 + 8000601c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xe0cbabc70ca92aa1 + 80006020: 00083e03 ld x28,0(x16) + 80006024: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x9dab185026f918db + 80006028: 00083a03 ld x20,0(x16) + 8000602c: 00880813 addi x16,x16,8 + +0000000080006030 : +Zbkb_packh_cg_cmp_rd_rs2_b20: + packh x20, x28, x20 # perform operation + 80006030: 094e7a33 packh x20,x28,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zbkb_packh_cg_cmp_rd_rs2_b20, Zbkb_packh_cg_cmp_rd_rs2_b20_str) + 80006034: 000bb383 ld x7,0(x23) + 80006038: 01438c63 beq x7,x20,80006050 + 8000603c: 4dd0146f jal x8,80007d18 + 80006040: 80006030 .word 0x80006030 + 80006044: 00000000 .word 0x00000000 + 80006048: 800179a6 .word 0x800179a6 + 8000604c: 00000000 .word 0x00000000 + 80006050: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x00d18cfc5b7ab09b + 80006054: 00083a03 ld x20,0(x16) + 80006058: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x3338b8e6785de6d6 + 8000605c: 00083a83 ld x21,0(x16) + 80006060: 00880813 addi x16,x16,8 + +0000000080006064 : +Zbkb_packh_cg_cmp_rd_rs2_b21: + packh x21, x20, x21 # perform operation + 80006064: 095a7ab3 packh x21,x20,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zbkb_packh_cg_cmp_rd_rs2_b21, Zbkb_packh_cg_cmp_rd_rs2_b21_str) + 80006068: 000bb383 ld x7,0(x23) + 8000606c: 01538c63 beq x7,x21,80006084 + 80006070: 4a90146f jal x8,80007d18 + 80006074: 80006064 .word 0x80006064 + 80006078: 00000000 .word 0x00000000 + 8000607c: 800179df .word 0x800179df + 80006080: 00000000 .word 0x00000000 + 80006084: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x412a789c7ba4cc65 + 80006088: 00083083 ld x1,0(x16) + 8000608c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x157567fc08be5d5f + 80006090: 00083b03 ld x22,0(x16) + 80006094: 00880813 addi x16,x16,8 + +0000000080006098 : +Zbkb_packh_cg_cmp_rd_rs2_b22: + packh x22, x1, x22 # perform operation + 80006098: 0960fb33 packh x22,x1,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zbkb_packh_cg_cmp_rd_rs2_b22, Zbkb_packh_cg_cmp_rd_rs2_b22_str) + 8000609c: 000bb383 ld x7,0(x23) + 800060a0: 01638c63 beq x7,x22,800060b8 + 800060a4: 4750146f jal x8,80007d18 + 800060a8: 80006098 .word 0x80006098 + 800060ac: 00000000 .word 0x00000000 + 800060b0: 80017a18 .word 0x80017a18 + 800060b4: 00000000 .word 0x00000000 + 800060b8: 008b8b93 addi x23,x23,8 + + mv x18, x23 # switch signature pointer register to avoid conflict with test + 800060bc: 000b8913 addi x18,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xbae0aa39079f39ea + 800060c0: 00083603 ld x12,0(x16) + 800060c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xaa755b536fcfc54e + 800060c8: 00083b83 ld x23,0(x16) + 800060cc: 00880813 addi x16,x16,8 + +00000000800060d0 : +Zbkb_packh_cg_cmp_rd_rs2_b23: + packh x23, x12, x23 # perform operation + 800060d0: 09767bb3 packh x23,x12,x23 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zbkb_packh_cg_cmp_rd_rs2_b23, Zbkb_packh_cg_cmp_rd_rs2_b23_str) + 800060d4: 00093383 ld x7,0(x18) + 800060d8: 01738c63 beq x7,x23,800060f0 + 800060dc: 43d0146f jal x8,80007d18 + 800060e0: 800060d0 .word 0x800060d0 + 800060e4: 00000000 .word 0x00000000 + 800060e8: 80017a51 .word 0x80017a51 + 800060ec: 00000000 .word 0x00000000 + 800060f0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x40b32ad153107b21 + 800060f4: 00083e03 ld x28,0(x16) + 800060f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xab11c8dbbe4a4e50 + 800060fc: 00083c03 ld x24,0(x16) + 80006100: 00880813 addi x16,x16,8 + +0000000080006104 : +Zbkb_packh_cg_cmp_rd_rs2_b24: + packh x24, x28, x24 # perform operation + 80006104: 098e7c33 packh x24,x28,x24 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zbkb_packh_cg_cmp_rd_rs2_b24, Zbkb_packh_cg_cmp_rd_rs2_b24_str) + 80006108: 00093383 ld x7,0(x18) + 8000610c: 01838c63 beq x7,x24,80006124 + 80006110: 4090146f jal x8,80007d18 + 80006114: 80006104 .word 0x80006104 + 80006118: 00000000 .word 0x00000000 + 8000611c: 80017a8a .word 0x80017a8a + 80006120: 00000000 .word 0x00000000 + 80006124: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x309fc1c205b15064 + 80006128: 00083a83 ld x21,0(x16) + 8000612c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x63e761d06e5df2e9 + 80006130: 00083c83 ld x25,0(x16) + 80006134: 00880813 addi x16,x16,8 + +0000000080006138 : +Zbkb_packh_cg_cmp_rd_rs2_b25: + packh x25, x21, x25 # perform operation + 80006138: 099afcb3 packh x25,x21,x25 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zbkb_packh_cg_cmp_rd_rs2_b25, Zbkb_packh_cg_cmp_rd_rs2_b25_str) + 8000613c: 00093383 ld x7,0(x18) + 80006140: 01938c63 beq x7,x25,80006158 + 80006144: 3d50146f jal x8,80007d18 + 80006148: 80006138 .word 0x80006138 + 8000614c: 00000000 .word 0x00000000 + 80006150: 80017ac3 .word 0x80017ac3 + 80006154: 00000000 .word 0x00000000 + 80006158: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x4378fad0c6567ea5 + 8000615c: 00083883 ld x17,0(x16) + 80006160: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x095000f3633f7511 + 80006164: 00083d03 ld x26,0(x16) + 80006168: 00880813 addi x16,x16,8 + +000000008000616c : +Zbkb_packh_cg_cmp_rd_rs2_b26: + packh x26, x17, x26 # perform operation + 8000616c: 09a8fd33 packh x26,x17,x26 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zbkb_packh_cg_cmp_rd_rs2_b26, Zbkb_packh_cg_cmp_rd_rs2_b26_str) + 80006170: 00093383 ld x7,0(x18) + 80006174: 01a38c63 beq x7,x26,8000618c + 80006178: 3a10146f jal x8,80007d18 + 8000617c: 8000616c .word 0x8000616c + 80006180: 00000000 .word 0x00000000 + 80006184: 80017afc .word 0x80017afc + 80006188: 00000000 .word 0x00000000 + 8000618c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xfe3e0dc298f42551 + 80006190: 00083203 ld x4,0(x16) + 80006194: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xaab539f49208061a + 80006198: 00083d83 ld x27,0(x16) + 8000619c: 00880813 addi x16,x16,8 + +00000000800061a0 : +Zbkb_packh_cg_cmp_rd_rs2_b27: + packh x27, x4, x27 # perform operation + 800061a0: 09b27db3 packh x27,x4,x27 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zbkb_packh_cg_cmp_rd_rs2_b27, Zbkb_packh_cg_cmp_rd_rs2_b27_str) + 800061a4: 00093383 ld x7,0(x18) + 800061a8: 01b38c63 beq x7,x27,800061c0 + 800061ac: 36d0146f jal x8,80007d18 + 800061b0: 800061a0 .word 0x800061a0 + 800061b4: 00000000 .word 0x00000000 + 800061b8: 80017b35 .word 0x80017b35 + 800061bc: 00000000 .word 0x00000000 + 800061c0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x8a90909188f9b376 + 800061c4: 00083683 ld x13,0(x16) + 800061c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x17fd3f22eebad675 + 800061cc: 00083e03 ld x28,0(x16) + 800061d0: 00880813 addi x16,x16,8 + +00000000800061d4 : +Zbkb_packh_cg_cmp_rd_rs2_b28: + packh x28, x13, x28 # perform operation + 800061d4: 09c6fe33 packh x28,x13,x28 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zbkb_packh_cg_cmp_rd_rs2_b28, Zbkb_packh_cg_cmp_rd_rs2_b28_str) + 800061d8: 00093383 ld x7,0(x18) + 800061dc: 01c38c63 beq x7,x28,800061f4 + 800061e0: 3390146f jal x8,80007d18 + 800061e4: 800061d4 .word 0x800061d4 + 800061e8: 00000000 .word 0x00000000 + 800061ec: 80017b6e .word 0x80017b6e + 800061f0: 00000000 .word 0x00000000 + 800061f4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xe83a24e3b9c2582b + 800061f8: 00083e03 ld x28,0(x16) + 800061fc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xd9df947f8933ae4c + 80006200: 00083e83 ld x29,0(x16) + 80006204: 00880813 addi x16,x16,8 + +0000000080006208 : +Zbkb_packh_cg_cmp_rd_rs2_b29: + packh x29, x28, x29 # perform operation + 80006208: 09de7eb3 packh x29,x28,x29 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zbkb_packh_cg_cmp_rd_rs2_b29, Zbkb_packh_cg_cmp_rd_rs2_b29_str) + 8000620c: 00093383 ld x7,0(x18) + 80006210: 01d38c63 beq x7,x29,80006228 + 80006214: 3050146f jal x8,80007d18 + 80006218: 80006208 .word 0x80006208 + 8000621c: 00000000 .word 0x00000000 + 80006220: 80017ba7 .word 0x80017ba7 + 80006224: 00000000 .word 0x00000000 + 80006228: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xebf5c67aec152c44 + 8000622c: 00083d83 ld x27,0(x16) + 80006230: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xe838829a6657fbc8 + 80006234: 00083f03 ld x30,0(x16) + 80006238: 00880813 addi x16,x16,8 + +000000008000623c : +Zbkb_packh_cg_cmp_rd_rs2_b30: + packh x30, x27, x30 # perform operation + 8000623c: 09edff33 packh x30,x27,x30 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zbkb_packh_cg_cmp_rd_rs2_b30, Zbkb_packh_cg_cmp_rd_rs2_b30_str) + 80006240: 00093383 ld x7,0(x18) + 80006244: 01e38c63 beq x7,x30,8000625c + 80006248: 2d10146f jal x8,80007d18 + 8000624c: 8000623c .word 0x8000623c + 80006250: 00000000 .word 0x00000000 + 80006254: 80017be0 .word 0x80017be0 + 80006258: 00000000 .word 0x00000000 + 8000625c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xff8b953a726e39d0 + 80006260: 00083683 ld x13,0(x16) + 80006264: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x10b63d53e53c2f85 + 80006268: 00083f83 ld x31,0(x16) + 8000626c: 00880813 addi x16,x16,8 + +0000000080006270 : +Zbkb_packh_cg_cmp_rd_rs2_b31: + packh x31, x13, x31 # perform operation + 80006270: 09f6ffb3 packh x31,x13,x31 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zbkb_packh_cg_cmp_rd_rs2_b31, Zbkb_packh_cg_cmp_rd_rs2_b31_str) + 80006274: 00093383 ld x7,0(x18) + 80006278: 01f38c63 beq x7,x31,80006290 + 8000627c: 29d0146f jal x8,80007d18 + 80006280: 80006270 .word 0x80006270 + 80006284: 00000000 .word 0x00000000 + 80006288: 80017c19 .word 0x80017c19 + 8000628c: 00000000 .word 0x00000000 + 80006290: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x6b19bb659836251b + 80006294: 00083003 ld x0,0(x16) + 80006298: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xcc6f4048819691c2 + 8000629c: 00083003 ld x0,0(x16) + 800062a0: 00880813 addi x16,x16,8 + +00000000800062a4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b0: + packh x0, x0, x0 # perform operation + 800062a4: 08007033 packh x0,x0,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zbkb_packh_cg_cmp_rd_rs1_rs2_b0, Zbkb_packh_cg_cmp_rd_rs1_rs2_b0_str) + 800062a8: 00093383 ld x7,0(x18) + 800062ac: 00038c63 beq x7,x0,800062c4 + 800062b0: 2690146f jal x8,80007d18 + 800062b4: 800062a4 .word 0x800062a4 + 800062b8: 00000000 .word 0x00000000 + 800062bc: 80017c52 .word 0x80017c52 + 800062c0: 00000000 .word 0x00000000 + 800062c4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x358058894aaa789e + 800062c8: 00083083 ld x1,0(x16) + 800062cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x52b0af15288f9a60 + 800062d0: 00083083 ld x1,0(x16) + 800062d4: 00880813 addi x16,x16,8 + +00000000800062d8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b1: + packh x1, x1, x1 # perform operation + 800062d8: 0810f0b3 packh x1,x1,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zbkb_packh_cg_cmp_rd_rs1_rs2_b1, Zbkb_packh_cg_cmp_rd_rs1_rs2_b1_str) + 800062dc: 00093383 ld x7,0(x18) + 800062e0: 00138c63 beq x7,x1,800062f8 + 800062e4: 2350146f jal x8,80007d18 + 800062e8: 800062d8 .word 0x800062d8 + 800062ec: 00000000 .word 0x00000000 + 800062f0: 80017c8e .word 0x80017c8e + 800062f4: 00000000 .word 0x00000000 + 800062f8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x398c8702d29c6a5d + 800062fc: 00083103 ld x2,0(x16) + 80006300: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x547ad301d6750b4d + 80006304: 00083103 ld x2,0(x16) + 80006308: 00880813 addi x16,x16,8 + +000000008000630c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b2: + packh x2, x2, x2 # perform operation + 8000630c: 08217133 packh x2,x2,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zbkb_packh_cg_cmp_rd_rs1_rs2_b2, Zbkb_packh_cg_cmp_rd_rs1_rs2_b2_str) + 80006310: 00093383 ld x7,0(x18) + 80006314: 00238c63 beq x7,x2,8000632c + 80006318: 2010146f jal x8,80007d18 + 8000631c: 8000630c .word 0x8000630c + 80006320: 00000000 .word 0x00000000 + 80006324: 80017cca .word 0x80017cca + 80006328: 00000000 .word 0x00000000 + 8000632c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xbb9f6d556e63c354 + 80006330: 00083183 ld x3,0(x16) + 80006334: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x97d2f83026976550 + 80006338: 00083183 ld x3,0(x16) + 8000633c: 00880813 addi x16,x16,8 + +0000000080006340 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b3: + packh x3, x3, x3 # perform operation + 80006340: 0831f1b3 packh x3,x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zbkb_packh_cg_cmp_rd_rs1_rs2_b3, Zbkb_packh_cg_cmp_rd_rs1_rs2_b3_str) + 80006344: 00093383 ld x7,0(x18) + 80006348: 00338c63 beq x7,x3,80006360 + 8000634c: 1cd0146f jal x8,80007d18 + 80006350: 80006340 .word 0x80006340 + 80006354: 00000000 .word 0x00000000 + 80006358: 80017d06 .word 0x80017d06 + 8000635c: 00000000 .word 0x00000000 + 80006360: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x6a2ba621609ad803 + 80006364: 00083203 ld x4,0(x16) + 80006368: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x7be7828ad66a6501 + 8000636c: 00083203 ld x4,0(x16) + 80006370: 00880813 addi x16,x16,8 + +0000000080006374 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b4: + packh x4, x4, x4 # perform operation + 80006374: 08427233 packh x4,x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zbkb_packh_cg_cmp_rd_rs1_rs2_b4, Zbkb_packh_cg_cmp_rd_rs1_rs2_b4_str) + 80006378: 00093383 ld x7,0(x18) + 8000637c: 00438c63 beq x7,x4,80006394 + 80006380: 1990146f jal x8,80007d18 + 80006384: 80006374 .word 0x80006374 + 80006388: 00000000 .word 0x00000000 + 8000638c: 80017d42 .word 0x80017d42 + 80006390: 00000000 .word 0x00000000 + 80006394: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x45ea234d5c49fe01 + 80006398: 00083283 ld x5,0(x16) + 8000639c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xc8453cafe20785c9 + 800063a0: 00083283 ld x5,0(x16) + 800063a4: 00880813 addi x16,x16,8 + +00000000800063a8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b5: + packh x5, x5, x5 # perform operation + 800063a8: 0852f2b3 packh x5,x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zbkb_packh_cg_cmp_rd_rs1_rs2_b5, Zbkb_packh_cg_cmp_rd_rs1_rs2_b5_str) + 800063ac: 00093383 ld x7,0(x18) + 800063b0: 00538c63 beq x7,x5,800063c8 + 800063b4: 1650146f jal x8,80007d18 + 800063b8: 800063a8 .word 0x800063a8 + 800063bc: 00000000 .word 0x00000000 + 800063c0: 80017d7e .word 0x80017d7e + 800063c4: 00000000 .word 0x00000000 + 800063c8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xde8bcf06931cc541 + 800063cc: 00083303 ld x6,0(x16) + 800063d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x4bce95afea755244 + 800063d4: 00083303 ld x6,0(x16) + 800063d8: 00880813 addi x16,x16,8 + +00000000800063dc : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b6: + packh x6, x6, x6 # perform operation + 800063dc: 08637333 packh x6,x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zbkb_packh_cg_cmp_rd_rs1_rs2_b6, Zbkb_packh_cg_cmp_rd_rs1_rs2_b6_str) + 800063e0: 00093383 ld x7,0(x18) + 800063e4: 00638c63 beq x7,x6,800063fc + 800063e8: 1310146f jal x8,80007d18 + 800063ec: 800063dc .word 0x800063dc + 800063f0: 00000000 .word 0x00000000 + 800063f4: 80017dba .word 0x80017dba + 800063f8: 00000000 .word 0x00000000 + 800063fc: 00890913 addi x18,x18,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80006400: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80006404: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xceae33d27e50d5cc + 80006408: 00083383 ld x7,0(x16) + 8000640c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x46a3d83ff9841666 + 80006410: 00083383 ld x7,0(x16) + 80006414: 00880813 addi x16,x16,8 + +0000000080006418 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b7: + packh x7, x7, x7 # perform operation + 80006418: 0873f3b3 packh x7,x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zbkb_packh_cg_cmp_rd_rs1_rs2_b7, Zbkb_packh_cg_cmp_rd_rs1_rs2_b7_str) + 8000641c: 00093203 ld x4,0(x18) + 80006420: 00720c63 beq x4,x7,80006438 + 80006424: 0dd012ef jal x5,80007d00 + 80006428: 80006418 .word 0x80006418 + 8000642c: 00000000 .word 0x00000000 + 80006430: 80017df6 .word 0x80017df6 + 80006434: 00000000 .word 0x00000000 + 80006438: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x51adef2a44df1d15 + 8000643c: 00083403 ld x8,0(x16) + 80006440: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x104ce7bb4c07b32b + 80006444: 00083403 ld x8,0(x16) + 80006448: 00880813 addi x16,x16,8 + +000000008000644c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b8: + packh x8, x8, x8 # perform operation + 8000644c: 08847433 packh x8,x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkb_packh_cg_cmp_rd_rs1_rs2_b8, Zbkb_packh_cg_cmp_rd_rs1_rs2_b8_str) + 80006450: 00093203 ld x4,0(x18) + 80006454: 00820c63 beq x4,x8,8000646c + 80006458: 0a9012ef jal x5,80007d00 + 8000645c: 8000644c .word 0x8000644c + 80006460: 00000000 .word 0x00000000 + 80006464: 80017e32 .word 0x80017e32 + 80006468: 00000000 .word 0x00000000 + 8000646c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x783de4fa015d0def + 80006470: 00083483 ld x9,0(x16) + 80006474: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xba9b122b8f37696b + 80006478: 00083483 ld x9,0(x16) + 8000647c: 00880813 addi x16,x16,8 + +0000000080006480 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b9: + packh x9, x9, x9 # perform operation + 80006480: 0894f4b3 packh x9,x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zbkb_packh_cg_cmp_rd_rs1_rs2_b9, Zbkb_packh_cg_cmp_rd_rs1_rs2_b9_str) + 80006484: 00093203 ld x4,0(x18) + 80006488: 00920c63 beq x4,x9,800064a0 + 8000648c: 075012ef jal x5,80007d00 + 80006490: 80006480 .word 0x80006480 + 80006494: 00000000 .word 0x00000000 + 80006498: 80017e6e .word 0x80017e6e + 8000649c: 00000000 .word 0x00000000 + 800064a0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x78d4409eac731733 + 800064a4: 00083503 ld x10,0(x16) + 800064a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x8456091c5e17db0b + 800064ac: 00083503 ld x10,0(x16) + 800064b0: 00880813 addi x16,x16,8 + +00000000800064b4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b10: + packh x10, x10, x10 # perform operation + 800064b4: 08a57533 packh x10,x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zbkb_packh_cg_cmp_rd_rs1_rs2_b10, Zbkb_packh_cg_cmp_rd_rs1_rs2_b10_str) + 800064b8: 00093203 ld x4,0(x18) + 800064bc: 00a20c63 beq x4,x10,800064d4 + 800064c0: 041012ef jal x5,80007d00 + 800064c4: 800064b4 .word 0x800064b4 + 800064c8: 00000000 .word 0x00000000 + 800064cc: 80017eaa .word 0x80017eaa + 800064d0: 00000000 .word 0x00000000 + 800064d4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x1b116b3dacc46abd + 800064d8: 00083583 ld x11,0(x16) + 800064dc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x69b8f97976142ef7 + 800064e0: 00083583 ld x11,0(x16) + 800064e4: 00880813 addi x16,x16,8 + +00000000800064e8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b11: + packh x11, x11, x11 # perform operation + 800064e8: 08b5f5b3 packh x11,x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zbkb_packh_cg_cmp_rd_rs1_rs2_b11, Zbkb_packh_cg_cmp_rd_rs1_rs2_b11_str) + 800064ec: 00093203 ld x4,0(x18) + 800064f0: 00b20c63 beq x4,x11,80006508 + 800064f4: 00d012ef jal x5,80007d00 + 800064f8: 800064e8 .word 0x800064e8 + 800064fc: 00000000 .word 0x00000000 + 80006500: 80017ee7 .word 0x80017ee7 + 80006504: 00000000 .word 0x00000000 + 80006508: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xaf9ef7fcebeca2cb + 8000650c: 00083603 ld x12,0(x16) + 80006510: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x9973d8b557ed6708 + 80006514: 00083603 ld x12,0(x16) + 80006518: 00880813 addi x16,x16,8 + +000000008000651c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b12: + packh x12, x12, x12 # perform operation + 8000651c: 08c67633 packh x12,x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zbkb_packh_cg_cmp_rd_rs1_rs2_b12, Zbkb_packh_cg_cmp_rd_rs1_rs2_b12_str) + 80006520: 00093203 ld x4,0(x18) + 80006524: 00c20c63 beq x4,x12,8000653c + 80006528: 7d8012ef jal x5,80007d00 + 8000652c: 8000651c .word 0x8000651c + 80006530: 00000000 .word 0x00000000 + 80006534: 80017f24 .word 0x80017f24 + 80006538: 00000000 .word 0x00000000 + 8000653c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xefe4fb087fb1737c + 80006540: 00083683 ld x13,0(x16) + 80006544: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xe16c156585fa5a92 + 80006548: 00083683 ld x13,0(x16) + 8000654c: 00880813 addi x16,x16,8 + +0000000080006550 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b13: + packh x13, x13, x13 # perform operation + 80006550: 08d6f6b3 packh x13,x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkb_packh_cg_cmp_rd_rs1_rs2_b13, Zbkb_packh_cg_cmp_rd_rs1_rs2_b13_str) + 80006554: 00093203 ld x4,0(x18) + 80006558: 00d20c63 beq x4,x13,80006570 + 8000655c: 7a4012ef jal x5,80007d00 + 80006560: 80006550 .word 0x80006550 + 80006564: 00000000 .word 0x00000000 + 80006568: 80017f61 .word 0x80017f61 + 8000656c: 00000000 .word 0x00000000 + 80006570: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x98ddb6b45169d5c1 + 80006574: 00083703 ld x14,0(x16) + 80006578: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xdb38855b7c88bce8 + 8000657c: 00083703 ld x14,0(x16) + 80006580: 00880813 addi x16,x16,8 + +0000000080006584 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b14: + packh x14, x14, x14 # perform operation + 80006584: 08e77733 packh x14,x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkb_packh_cg_cmp_rd_rs1_rs2_b14, Zbkb_packh_cg_cmp_rd_rs1_rs2_b14_str) + 80006588: 00093203 ld x4,0(x18) + 8000658c: 00e20c63 beq x4,x14,800065a4 + 80006590: 770012ef jal x5,80007d00 + 80006594: 80006584 .word 0x80006584 + 80006598: 00000000 .word 0x00000000 + 8000659c: 80017f9e .word 0x80017f9e + 800065a0: 00000000 .word 0x00000000 + 800065a4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xfd3ba550d69b13c9 + 800065a8: 00083783 ld x15,0(x16) + 800065ac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x02a41cf50942e787 + 800065b0: 00083783 ld x15,0(x16) + 800065b4: 00880813 addi x16,x16,8 + +00000000800065b8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b15: + packh x15, x15, x15 # perform operation + 800065b8: 08f7f7b3 packh x15,x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkb_packh_cg_cmp_rd_rs1_rs2_b15, Zbkb_packh_cg_cmp_rd_rs1_rs2_b15_str) + 800065bc: 00093203 ld x4,0(x18) + 800065c0: 00f20c63 beq x4,x15,800065d8 + 800065c4: 73c012ef jal x5,80007d00 + 800065c8: 800065b8 .word 0x800065b8 + 800065cc: 00000000 .word 0x00000000 + 800065d0: 80017fdb .word 0x80017fdb + 800065d4: 00000000 .word 0x00000000 + 800065d8: 00890913 addi x18,x18,8 + + mv x22, x16 # switch data pointer register to avoid conflict with test + 800065dc: 00080b13 addi x22,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x87b239045a262b67 + 800065e0: 000b3803 ld x16,0(x22) + 800065e4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0xc610f1353c046408 + 800065e8: 000b3803 ld x16,0(x22) + 800065ec: 008b0b13 addi x22,x22,8 + +00000000800065f0 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b16: + packh x16, x16, x16 # perform operation + 800065f0: 09087833 packh x16,x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_packh_cg_cmp_rd_rs1_rs2_b16, Zbkb_packh_cg_cmp_rd_rs1_rs2_b16_str) + 800065f4: 00093203 ld x4,0(x18) + 800065f8: 01020c63 beq x4,x16,80006610 + 800065fc: 704012ef jal x5,80007d00 + 80006600: 800065f0 .word 0x800065f0 + 80006604: 00000000 .word 0x00000000 + 80006608: 80018018 .word 0x80018018 + 8000660c: 00000000 .word 0x00000000 + 80006610: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x7ac6e4d4c201f575 + 80006614: 000b3883 ld x17,0(x22) + 80006618: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x13227ecc35823da9 + 8000661c: 000b3883 ld x17,0(x22) + 80006620: 008b0b13 addi x22,x22,8 + +0000000080006624 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b17: + packh x17, x17, x17 # perform operation + 80006624: 0918f8b3 packh x17,x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkb_packh_cg_cmp_rd_rs1_rs2_b17, Zbkb_packh_cg_cmp_rd_rs1_rs2_b17_str) + 80006628: 00093203 ld x4,0(x18) + 8000662c: 01120c63 beq x4,x17,80006644 + 80006630: 6d0012ef jal x5,80007d00 + 80006634: 80006624 .word 0x80006624 + 80006638: 00000000 .word 0x00000000 + 8000663c: 80018055 .word 0x80018055 + 80006640: 00000000 .word 0x00000000 + 80006644: 00890913 addi x18,x18,8 + + mv x12, x18 # switch signature pointer register to avoid conflict with test + 80006648: 00090613 addi x12,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xa4e13a5298091a34 + 8000664c: 000b3903 ld x18,0(x22) + 80006650: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xf9914de7ef97c0bd + 80006654: 000b3903 ld x18,0(x22) + 80006658: 008b0b13 addi x22,x22,8 + +000000008000665c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b18: + packh x18, x18, x18 # perform operation + 8000665c: 09297933 packh x18,x18,x18 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zbkb_packh_cg_cmp_rd_rs1_rs2_b18, Zbkb_packh_cg_cmp_rd_rs1_rs2_b18_str) + 80006660: 00063203 ld x4,0(x12) + 80006664: 01220c63 beq x4,x18,8000667c + 80006668: 698012ef jal x5,80007d00 + 8000666c: 8000665c .word 0x8000665c + 80006670: 00000000 .word 0x00000000 + 80006674: 80018092 .word 0x80018092 + 80006678: 00000000 .word 0x00000000 + 8000667c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x18fab87645b59d5c + 80006680: 000b3983 ld x19,0(x22) + 80006684: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xeab775b2ab024e9b + 80006688: 000b3983 ld x19,0(x22) + 8000668c: 008b0b13 addi x22,x22,8 + +0000000080006690 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b19: + packh x19, x19, x19 # perform operation + 80006690: 0939f9b3 packh x19,x19,x19 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_packh_cg_cmp_rd_rs1_rs2_b19, Zbkb_packh_cg_cmp_rd_rs1_rs2_b19_str) + 80006694: 00063203 ld x4,0(x12) + 80006698: 01320c63 beq x4,x19,800066b0 + 8000669c: 664012ef jal x5,80007d00 + 800066a0: 80006690 .word 0x80006690 + 800066a4: 00000000 .word 0x00000000 + 800066a8: 800180cf .word 0x800180cf + 800066ac: 00000000 .word 0x00000000 + 800066b0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x76554f95c3c037b8 + 800066b4: 000b3a03 ld x20,0(x22) + 800066b8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xa49daf2f8ff72953 + 800066bc: 000b3a03 ld x20,0(x22) + 800066c0: 008b0b13 addi x22,x22,8 + +00000000800066c4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b20: + packh x20, x20, x20 # perform operation + 800066c4: 094a7a33 packh x20,x20,x20 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zbkb_packh_cg_cmp_rd_rs1_rs2_b20, Zbkb_packh_cg_cmp_rd_rs1_rs2_b20_str) + 800066c8: 00063203 ld x4,0(x12) + 800066cc: 01420c63 beq x4,x20,800066e4 + 800066d0: 630012ef jal x5,80007d00 + 800066d4: 800066c4 .word 0x800066c4 + 800066d8: 00000000 .word 0x00000000 + 800066dc: 8001810c .word 0x8001810c + 800066e0: 00000000 .word 0x00000000 + 800066e4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x276fd3ada67b1513 + 800066e8: 000b3a83 ld x21,0(x22) + 800066ec: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0xeff64856632023fb + 800066f0: 000b3a83 ld x21,0(x22) + 800066f4: 008b0b13 addi x22,x22,8 + +00000000800066f8 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b21: + packh x21, x21, x21 # perform operation + 800066f8: 095afab3 packh x21,x21,x21 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zbkb_packh_cg_cmp_rd_rs1_rs2_b21, Zbkb_packh_cg_cmp_rd_rs1_rs2_b21_str) + 800066fc: 00063203 ld x4,0(x12) + 80006700: 01520c63 beq x4,x21,80006718 + 80006704: 5fc012ef jal x5,80007d00 + 80006708: 800066f8 .word 0x800066f8 + 8000670c: 00000000 .word 0x00000000 + 80006710: 80018149 .word 0x80018149 + 80006714: 00000000 .word 0x00000000 + 80006718: 00860613 addi x12,x12,8 + + mv x27, x22 # switch data pointer register to avoid conflict with test + 8000671c: 000b0d93 addi x27,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xef47aca07b8f961d + 80006720: 000dbb03 ld x22,0(x27) + 80006724: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0xe352e3b81221c697 + 80006728: 000dbb03 ld x22,0(x27) + 8000672c: 008d8d93 addi x27,x27,8 + +0000000080006730 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b22: + packh x22, x22, x22 # perform operation + 80006730: 096b7b33 packh x22,x22,x22 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkb_packh_cg_cmp_rd_rs1_rs2_b22, Zbkb_packh_cg_cmp_rd_rs1_rs2_b22_str) + 80006734: 00063203 ld x4,0(x12) + 80006738: 01620c63 beq x4,x22,80006750 + 8000673c: 5c4012ef jal x5,80007d00 + 80006740: 80006730 .word 0x80006730 + 80006744: 00000000 .word 0x00000000 + 80006748: 80018186 .word 0x80018186 + 8000674c: 00000000 .word 0x00000000 + 80006750: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xac4ee78600db3d1b + 80006754: 000dbb83 ld x23,0(x27) + 80006758: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x878f558c89273145 + 8000675c: 000dbb83 ld x23,0(x27) + 80006760: 008d8d93 addi x27,x27,8 + +0000000080006764 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b23: + packh x23, x23, x23 # perform operation + 80006764: 097bfbb3 packh x23,x23,x23 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkb_packh_cg_cmp_rd_rs1_rs2_b23, Zbkb_packh_cg_cmp_rd_rs1_rs2_b23_str) + 80006768: 00063203 ld x4,0(x12) + 8000676c: 01720c63 beq x4,x23,80006784 + 80006770: 590012ef jal x5,80007d00 + 80006774: 80006764 .word 0x80006764 + 80006778: 00000000 .word 0x00000000 + 8000677c: 800181c3 .word 0x800181c3 + 80006780: 00000000 .word 0x00000000 + 80006784: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x38431807e2495eee + 80006788: 000dbc03 ld x24,0(x27) + 8000678c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x51ac81087222453f + 80006790: 000dbc03 ld x24,0(x27) + 80006794: 008d8d93 addi x27,x27,8 + +0000000080006798 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b24: + packh x24, x24, x24 # perform operation + 80006798: 098c7c33 packh x24,x24,x24 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkb_packh_cg_cmp_rd_rs1_rs2_b24, Zbkb_packh_cg_cmp_rd_rs1_rs2_b24_str) + 8000679c: 00063203 ld x4,0(x12) + 800067a0: 01820c63 beq x4,x24,800067b8 + 800067a4: 55c012ef jal x5,80007d00 + 800067a8: 80006798 .word 0x80006798 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 80018200 .word 0x80018200 + 800067b4: 00000000 .word 0x00000000 + 800067b8: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xa949033ae2ec7c28 + 800067bc: 000dbc83 ld x25,0(x27) + 800067c0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x67d3f3190df1aff8 + 800067c4: 000dbc83 ld x25,0(x27) + 800067c8: 008d8d93 addi x27,x27,8 + +00000000800067cc : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b25: + packh x25, x25, x25 # perform operation + 800067cc: 099cfcb3 packh x25,x25,x25 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_packh_cg_cmp_rd_rs1_rs2_b25, Zbkb_packh_cg_cmp_rd_rs1_rs2_b25_str) + 800067d0: 00063203 ld x4,0(x12) + 800067d4: 01920c63 beq x4,x25,800067ec + 800067d8: 528012ef jal x5,80007d00 + 800067dc: 800067cc .word 0x800067cc + 800067e0: 00000000 .word 0x00000000 + 800067e4: 8001823d .word 0x8001823d + 800067e8: 00000000 .word 0x00000000 + 800067ec: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x2f7bde8473e31fe5 + 800067f0: 000dbd03 ld x26,0(x27) + 800067f4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x360687abc26a2c48 + 800067f8: 000dbd03 ld x26,0(x27) + 800067fc: 008d8d93 addi x27,x27,8 + +0000000080006800 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b26: + packh x26, x26, x26 # perform operation + 80006800: 09ad7d33 packh x26,x26,x26 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_packh_cg_cmp_rd_rs1_rs2_b26, Zbkb_packh_cg_cmp_rd_rs1_rs2_b26_str) + 80006804: 00063203 ld x4,0(x12) + 80006808: 01a20c63 beq x4,x26,80006820 + 8000680c: 4f4012ef jal x5,80007d00 + 80006810: 80006800 .word 0x80006800 + 80006814: 00000000 .word 0x00000000 + 80006818: 8001827a .word 0x8001827a + 8000681c: 00000000 .word 0x00000000 + 80006820: 00860613 addi x12,x12,8 + + mv x10, x27 # switch data pointer register to avoid conflict with test + 80006824: 000d8513 addi x10,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x743825dfc649ad7d + 80006828: 00053d83 ld x27,0(x10) + 8000682c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8167125847e03ce7 + 80006830: 00053d83 ld x27,0(x10) + 80006834: 00850513 addi x10,x10,8 + +0000000080006838 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b27: + packh x27, x27, x27 # perform operation + 80006838: 09bdfdb3 packh x27,x27,x27 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_packh_cg_cmp_rd_rs1_rs2_b27, Zbkb_packh_cg_cmp_rd_rs1_rs2_b27_str) + 8000683c: 00063203 ld x4,0(x12) + 80006840: 01b20c63 beq x4,x27,80006858 + 80006844: 4bc012ef jal x5,80007d00 + 80006848: 80006838 .word 0x80006838 + 8000684c: 00000000 .word 0x00000000 + 80006850: 800182b7 .word 0x800182b7 + 80006854: 00000000 .word 0x00000000 + 80006858: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xcbaec1e44f857448 + 8000685c: 00053e03 ld x28,0(x10) + 80006860: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xf1fc37ffdafc41c1 + 80006864: 00053e03 ld x28,0(x10) + 80006868: 00850513 addi x10,x10,8 + +000000008000686c : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b28: + packh x28, x28, x28 # perform operation + 8000686c: 09ce7e33 packh x28,x28,x28 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_packh_cg_cmp_rd_rs1_rs2_b28, Zbkb_packh_cg_cmp_rd_rs1_rs2_b28_str) + 80006870: 00063203 ld x4,0(x12) + 80006874: 01c20c63 beq x4,x28,8000688c + 80006878: 488012ef jal x5,80007d00 + 8000687c: 8000686c .word 0x8000686c + 80006880: 00000000 .word 0x00000000 + 80006884: 800182f4 .word 0x800182f4 + 80006888: 00000000 .word 0x00000000 + 8000688c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x4557846a9dd34c4d + 80006890: 00053e83 ld x29,0(x10) + 80006894: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xa9097e136008d426 + 80006898: 00053e83 ld x29,0(x10) + 8000689c: 00850513 addi x10,x10,8 + +00000000800068a0 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b29: + packh x29, x29, x29 # perform operation + 800068a0: 09defeb3 packh x29,x29,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_packh_cg_cmp_rd_rs1_rs2_b29, Zbkb_packh_cg_cmp_rd_rs1_rs2_b29_str) + 800068a4: 00063203 ld x4,0(x12) + 800068a8: 01d20c63 beq x4,x29,800068c0 + 800068ac: 454012ef jal x5,80007d00 + 800068b0: 800068a0 .word 0x800068a0 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 80018331 .word 0x80018331 + 800068bc: 00000000 .word 0x00000000 + 800068c0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xf8e3d2935906d31e + 800068c4: 00053f03 ld x30,0(x10) + 800068c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x234240143b449211 + 800068cc: 00053f03 ld x30,0(x10) + 800068d0: 00850513 addi x10,x10,8 + +00000000800068d4 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b30: + packh x30, x30, x30 # perform operation + 800068d4: 09ef7f33 packh x30,x30,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_packh_cg_cmp_rd_rs1_rs2_b30, Zbkb_packh_cg_cmp_rd_rs1_rs2_b30_str) + 800068d8: 00063203 ld x4,0(x12) + 800068dc: 01e20c63 beq x4,x30,800068f4 + 800068e0: 420012ef jal x5,80007d00 + 800068e4: 800068d4 .word 0x800068d4 + 800068e8: 00000000 .word 0x00000000 + 800068ec: 8001836e .word 0x8001836e + 800068f0: 00000000 .word 0x00000000 + 800068f4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x1d34f358e03de806 + 800068f8: 00053f83 ld x31,0(x10) + 800068fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xbd91c1a3bef9bbab + 80006900: 00053f83 ld x31,0(x10) + 80006904: 00850513 addi x10,x10,8 + +0000000080006908 : +Zbkb_packh_cg_cmp_rd_rs1_rs2_b31: + packh x31, x31, x31 # perform operation + 80006908: 09ffffb3 packh x31,x31,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_packh_cg_cmp_rd_rs1_rs2_b31, Zbkb_packh_cg_cmp_rd_rs1_rs2_b31_str) + 8000690c: 00063203 ld x4,0(x12) + 80006910: 01f20c63 beq x4,x31,80006928 + 80006914: 3ec012ef jal x5,80007d00 + 80006918: 80006908 .word 0x80006908 + 8000691c: 00000000 .word 0x00000000 + 80006920: 800183ab .word 0x800183ab + 80006924: 00000000 .word 0x00000000 + 80006928: 00860613 addi x12,x12,8 + + mv x2, x12 # restore signature pointer to default register for teardown + 8000692c: 00060113 addi x2,x12,0 + +0000000080006930 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006930: 00000513 addi x10,x0,0 + 80006934: 00000073 ecall + 80006938: fff00513 addi x10,x0,-1 + 8000693c: 25800413 addi x8,x0,600 + +0000000080006940 : + 80006940: 34002373 csrrs x6,mscratch,x0 + +0000000080006944 : + 80006944: 2b833383 ld x7,696(x6) + +0000000080006948 : + 80006948: 2a033383 ld x7,672(x6) + +000000008000694c : + 8000694c: 2d033483 ld x9,720(x6) + 80006950: 34049073 csrrw x0,mscratch,x9 + +0000000080006954 : + 80006954: 2c833483 ld x9,712(x6) + 80006958: 305493f3 csrrw x7,mtvec,x9 + 8000695c: ffc4f493 andi x9,x9,-4 + 80006960: ffc3f393 andi x7,x7,-4 + 80006964: 00749e63 bne x9,x7,80006980 + +0000000080006968 : + 80006968: 00030493 addi x9,x6,0 + +000000008000696c : + 8000696c: 0004a783 lw x15,0(x9) + 80006970: 00f3a023 sw x15,0(x7) + 80006974: 00438393 addi x7,x7,4 + 80006978: 00448493 addi x9,x9,4 + 8000697c: fe83c8e3 blt x7,x8,8000696c + 80006980: 0000100f fence.i + +0000000080006984 : + 80006984: 00000013 addi x0,x0,0 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 00000497 auipc x9,0x0 + 800069a4: 2b048493 addi x9,x9,688 # 80006c50 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 10e49863 bne x9,x14,80006ad0 + 800069c4: 00000013 addi x0,x0,0 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00012517 auipc x10,0x12 + 800069e4: 12f50513 addi x10,x10,303 # 80018b0f + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00033097 auipc x1,0x33 + 80006a04: ba4080e7 jalr x1,-1116(x1) # 800395a4 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00012517 auipc x10,0x12 + 80006a24: 12950513 addi x10,x10,297 # 80018b49 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00033097 auipc x1,0x33 + 80006a44: b64080e7 jalr x1,-1180(x1) # 800395a4 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00012517 auipc x10,0x12 + 80006a64: 14950513 addi x10,x10,329 # 80018ba9 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00033097 auipc x1,0x33 + 80006a84: b24080e7 jalr x1,-1244(x1) # 800395a4 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00013517 auipc x10,0x13 + 80006aa4: cb450513 addi x10,x10,-844 # 80019754 + 80006aa8: 00000013 addi x0,x0,0 + 80006aac: 00000013 addi x0,x0,0 + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00033097 auipc x1,0x33 + 80006ac4: ae4080e7 jalr x1,-1308(x1) # 800395a4 + 80006ac8: 00033097 auipc x1,0x33 + 80006acc: b3c080e7 jalr x1,-1220(x1) # 80039604 + +0000000080006ad0 : + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00006317 auipc x6,0x6 + 80006ae4: 8c830313 addi x6,x6,-1848 # 8000c3a8 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00033303 ld x6,0(x6) + 80006b04: 00000013 addi x0,x0,0 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 00014397 auipc x7,0x14 + 80006b24: 72038393 addi x7,x7,1824 # 8001b240 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 40730333 sub x6,x6,x7 + 80006b44: 00000013 addi x0,x0,0 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00014417 auipc x8,0x14 + 80006b64: 6d040413 addi x8,x8,1744 # 8001b230 + 80006b68: 00000013 addi x0,x0,0 + 80006b6c: 00000013 addi x0,x0,0 + 80006b70: 00000013 addi x0,x0,0 + 80006b74: 00000013 addi x0,x0,0 + 80006b78: 00000013 addi x0,x0,0 + 80006b7c: 00000013 addi x0,x0,0 + 80006b80: 00043203 ld x4,0(x8) + 80006b84: 00620c63 beq x4,x6,80006b9c + 80006b88: 1e0013ef jal x7,80007d68 + 80006b8c: 80006ad0 .word 0x80006ad0 + 80006b90: 00000000 .word 0x00000000 + 80006b94: 80018cfd .word 0x80018cfd + 80006b98: 00000000 .word 0x00000000 + +0000000080006b9c : + 80006b9c: 000004b7 lui x9,0x0 + 80006ba0: 00048493 addi x9,x9,0 # 0 + 80006ba4: 00b49493 slli x9,x9,0xb + 80006ba8: 5d648493 addi x9,x9,1494 + 80006bac: 00b49493 slli x9,x9,0xb + 80006bb0: 43748493 addi x9,x9,1079 + 80006bb4: 00a49493 slli x9,x9,0xa + 80006bb8: 2ad48493 addi x9,x9,685 + 80006bbc: 00e49e63 bne x9,x14,80006bd8 + 80006bc0: 1a8013ef jal x7,80007d68 + 80006bc4: 80006c84 .word 0x80006c84 + 80006bc8: 00000000 .word 0x00000000 + 80006bcc: 80018b6b .word 0x80018b6b + 80006bd0: 00000000 .word 0x00000000 + 80006bd4: 00000341 .word 0x00000341 + +0000000080006bd8 : + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00012517 auipc x10,0x12 + 80006be4: ef450513 addi x10,x10,-268 # 80018ad4 + 80006be8: 00000013 addi x0,x0,0 + 80006bec: 00000013 addi x0,x0,0 + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00033097 auipc x1,0x33 + 80006c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80006c08: 00033097 auipc x1,0x33 + 80006c0c: 9dc080e7 jalr x1,-1572(x1) # 800395e4 + +0000000080006c10 : + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00012517 auipc x10,0x12 + 80006c24: eef50513 addi x10,x10,-273 # 80018b0f + 80006c28: 00000013 addi x0,x0,0 + 80006c2c: 00000013 addi x0,x0,0 + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00033097 auipc x1,0x33 + 80006c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80006c48: 00033097 auipc x1,0x33 + 80006c4c: 9bc080e7 jalr x1,-1604(x1) # 80039604 + +0000000080006c50 : + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: 00000717 auipc x14,0x0 + 80006c64: ff070713 addi x14,x14,-16 # 80006c50 + 80006c68: 00000013 addi x0,x0,0 + 80006c6c: 00000013 addi x0,x0,0 + 80006c70: 00000013 addi x0,x0,0 + 80006c74: 00000013 addi x0,x0,0 + 80006c78: 00000013 addi x0,x0,0 + 80006c7c: 00000013 addi x0,x0,0 + 80006c80: cb1ff06f jal x0,80006930 + +0000000080006c84 : + 80006c84: 00000737 lui x14,0x0 + 80006c88: 00070713 addi x14,x14,0 # 0 + 80006c8c: 00b71713 slli x14,x14,0xb + 80006c90: 5d670713 addi x14,x14,1494 + 80006c94: 00b71713 slli x14,x14,0xb + 80006c98: 43770713 addi x14,x14,1079 + 80006c9c: 00a71713 slli x14,x14,0xa + 80006ca0: 2ad70713 addi x14,x14,685 + 80006ca4: c8dff06f jal x0,80006930 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: aa430313 addi x6,x6,-1372 # 80006984 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 0ab50513 addi x10,x10,171 # 8001a18b + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 43850513 addi x10,x10,1080 # 80018558 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: ab250513 addi x10,x10,-1358 # 80018c12 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: 96f50513 addi x10,x10,-1681 # 80018b0f + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: f9848493 addi x9,x9,-104 # 80018538 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 12840413 addi x8,x8,296 # 80038708 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e4946663 bltu x8,x9,80006c50 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018d14 .word 0x80018d14 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018e16 .word 0x80018e16 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d2f47a63 bgeu x8,x15,80006c84 + 80007754: d2746863 bltu x8,x7,80006c84 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018f11 .word 0x80018f11 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80019004 .word 0x80019004 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80019177 .word 0x80019177 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bfcff06f jal x0,80006c84 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 6f020213 addi x4,x4,1776 # 800183f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 6d838393 addi x7,x7,1752 # 800183f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 6b068693 addi x13,x13,1712 # 800183f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 68848493 addi x9,x9,1672 # 800183f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 5e44a483 lw x9,1508(x9) # 800183f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 31040413 addi x8,x8,784 # 8001a1d0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: 81040413 addi x8,x8,-2032 # 80038710 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 5d848493 addi x9,x9,1496 # 80018518 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 59848493 addi x9,x9,1432 # 80018518 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 56c80813 addi x16,x16,1388 # 80018528 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 54c80813 addi x16,x16,1356 # 80018528 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: d1538393 addi x7,x7,-747 # 80018cfd + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 52880813 addi x16,x16,1320 # 80018520 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: d1038393 addi x7,x7,-752 # 80018d14 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: dfa38393 addi x7,x7,-518 # 80018e16 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: edd38393 addi x7,x7,-291 # 80018f11 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: fb838393 addi x7,x7,-72 # 80019004 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 11338393 addi x7,x7,275 # 80019177 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 07f38393 addi x7,x7,127 # 800190fb + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 0a538393 addi x7,x7,165 # 80019139 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: ca838393 addi x7,x7,-856 # 80018d54 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: d9038393 addi x7,x7,-624 # 80018e54 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: e7138393 addi x7,x7,-399 # 80018f4d + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: f4d38393 addi x7,x7,-179 # 80019041 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 0a638393 addi x7,x7,166 # 800191b2 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: c7038393 addi x7,x7,-912 # 80018d94 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: d5638393 addi x7,x7,-682 # 80018e92 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: e3538393 addi x7,x7,-459 # 80018f89 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: f1238393 addi x7,x7,-238 # 8001907e + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 06938393 addi x7,x7,105 # 800191ed + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: c3938393 addi x7,x7,-967 # 80018dd5 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: d1d38393 addi x7,x7,-739 # 80018ed1 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: dfa38393 addi x7,x7,-518 # 80018fc6 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: ed838393 addi x7,x7,-296 # 800190bc + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 02d38393 addi x7,x7,45 # 80019229 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 05238393 addi x7,x7,82 # 80019266 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 08938393 addi x7,x7,137 # 800192b5 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 16c38393 addi x7,x7,364 # 800193b0 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 25038393 addi x7,x7,592 # 800194ac + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 2a480813 addi x16,x16,676 # 80018520 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 29480813 addi x16,x16,660 # 80018520 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 28c80813 addi x16,x16,652 # 80018524 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 27880813 addi x16,x16,632 # 80018520 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: 80f50513 addi x10,x10,-2033 # 80018b0f + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: 80950513 addi x10,x10,-2039 # 80018b49 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: 88050513 addi x10,x10,-1920 # 80018c00 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 16853503 ld x10,360(x10) # 80018510 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: 85250513 addi x10,x10,-1966 # 80018c12 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 00852503 lw x10,8(x10) # 800183f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: 81450513 addi x10,x10,-2028 # 80018c14 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 0c852503 lw x10,200(x10) # 800184f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 0f850513 addi x10,x10,248 # 80018558 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 78850513 addi x10,x10,1928 # 80018c28 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 03053503 ld x10,48(x10) # 800184f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 07850513 addi x10,x10,120 # 80018558 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 13f50513 addi x10,x10,319 # 8001965f + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: ea852503 lw x10,-344(x10) # 800183f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: ff860613 addi x12,x12,-8 # 80018558 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: f6c52503 lw x10,-148(x10) # 800184f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 1b550513 addi x10,x10,437 # 80019775 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: f5860613 addi x12,x12,-168 # 80018558 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: ecc52503 lw x10,-308(x10) # 800184f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: f1860613 addi x12,x12,-232 # 80018558 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: e8c52503 lw x10,-372(x10) # 800184f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: fd850513 addi x10,x10,-40 # 80019658 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: e9850513 addi x10,x10,-360 # 80018558 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: f7050513 addi x10,x10,-144 # 80019670 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: cc852503 lw x10,-824(x10) # 800183f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: dc853503 ld x10,-568(x10) # 80018500 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: db453503 ld x10,-588(x10) # 80018500 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: df850513 addi x10,x10,-520 # 80018558 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: d9052503 lw x10,-624(x10) # 80018518 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ee750513 addi x10,x10,-281 # 80019687 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: c2852503 lw x10,-984(x10) # 800183f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: d3053503 ld x10,-720(x10) # 80018508 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: d1c53503 ld x10,-740(x10) # 80018508 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: d5850513 addi x10,x10,-680 # 80018558 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: e5e50513 addi x10,x10,-418 # 8001969e + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: ca053503 ld x10,-864(x10) # 80018508 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: cd850513 addi x10,x10,-808 # 80018558 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: e3c50513 addi x10,x10,-452 # 800196fc + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: c2053503 ld x10,-992(x10) # 80018508 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: c5850513 addi x10,x10,-936 # 80018558 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: bf442403 lw x8,-1036(x8) # 80018520 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: e6150513 addi x10,x10,-415 # 800197a1 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: e4d50513 addi x10,x10,-435 # 800197cd + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: b8080813 addi x16,x16,-1152 # 80018528 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 25250513 addi x10,x10,594 # 80018c12 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: ddd50513 addi x10,x10,-547 # 800197dd + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: ae053503 ld x10,-1312(x10) # 80018508 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: b1850513 addi x10,x10,-1256 # 80018558 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: d8850513 addi x10,x10,-632 # 80019808 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: a5853503 ld x10,-1448(x10) # 80018500 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: a9850513 addi x10,x10,-1384 # 80018558 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: a1833303 ld x6,-1512(x6) # 80018500 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: a183b383 ld x7,-1512(x7) # 80018508 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: d3750513 addi x10,x10,-713 # 80019837 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: d5f50513 addi x10,x10,-673 # 8001989f + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: 99833303 ld x6,-1640(x6) # 80018500 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: 9983b383 ld x7,-1640(x7) # 80018508 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: 9b850513 addi x10,x10,-1608 # 80018558 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ce650513 addi x10,x10,-794 # 800198c6 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: c4350513 addi x10,x10,-957 # 80019863 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: c3f50513 addi x10,x10,-961 # 8001989f + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: 88033303 ld x6,-1920(x6) # 80018508 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: 8703b383 ld x7,-1936(x7) # 80018500 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: 89850513 addi x10,x10,-1896 # 80018558 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: cae50513 addi x10,x10,-850 # 800199ae + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: d5550513 addi x10,x10,-683 # 80019a95 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 7bc52503 lw x10,1980(x10) # 80018524 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: d3150513 addi x10,x10,-719 # 80019ad1 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: ccf50513 addi x10,x10,-817 # 80019aaf + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: c9750513 addi x10,x10,-873 # 80019ab7 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: c5f50513 addi x10,x10,-929 # 80019abf + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: c2850513 addi x10,x10,-984 # 80019ac8 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: bfa50513 addi x10,x10,-1030 # 80019ada + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 61852503 lw x10,1560(x10) # 80018520 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: cd150513 addi x10,x10,-815 # 80019c31 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: b5450513 addi x10,x10,-1196 # 80019af4 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: b4550513 addi x10,x10,-1211 # 80019b25 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: b2550513 addi x10,x10,-1243 # 80019b45 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: b0350513 addi x10,x10,-1277 # 80019b63 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: ae250513 addi x10,x10,-1310 # 80019b82 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: aca50513 addi x10,x10,-1334 # 80019baa + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: ab650513 addi x10,x10,-1354 # 80019bd6 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: aa250513 addi x10,x10,-1374 # 80019c02 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: aa050513 addi x10,x10,-1376 # 80019c40 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 34053503 ld x10,832(x10) # 80018508 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 37850513 addi x10,x10,888 # 80018558 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: a3750513 addi x10,x10,-1481 # 80019c57 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 2b853503 ld x10,696(x10) # 80018500 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 2f850513 addi x10,x10,760 # 80018558 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 29852503 lw x10,664(x10) # 80018520 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: 9ce50513 addi x10,x10,-1586 # 80019c6e + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 24053503 ld x10,576(x10) # 80018508 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: 9a550513 addi x10,x10,-1627 # 80019c85 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 1f853503 ld x10,504(x10) # 80018500 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 1fc52503 lw x10,508(x10) # 80018520 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: 9bb50513 addi x10,x10,-1605 # 80019cfb + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: a5150513 addi x10,x10,-1455 # 80019dd1 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: b0450513 addi x10,x10,-1276 # 80019ec4 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: bbf50513 addi x10,x10,-1089 # 80019fbf + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: c6650513 addi x10,x10,-922 # 8001a0a6 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: 83350513 addi x10,x10,-1997 # 80019cb3 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 09063603 ld x12,144(x12) # 80018538 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 7dc50513 addi x10,x10,2012 # 80018c9c + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 03850513 addi x10,x10,56 # 80018558 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 02058593 addi x11,x11,32 # 80018580 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 0b058593 addi x11,x11,176 # 80018640 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 4fe50513 addi x10,x10,1278 # 80018abe + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 15450513 addi x10,x10,340 # 80019754 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: f0060613 addi x12,x12,-256 # 80018530 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 67d50513 addi x10,x10,1661 # 80018cbd + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: ed053503 ld x10,-304(x10) # 80018538 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: ed850513 addi x10,x10,-296 # 80018558 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 60d50513 addi x10,x10,1549 # 80018ccd + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: e5853503 ld x10,-424(x10) # 80018540 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: e5850513 addi x10,x10,-424 # 80018558 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 59d50513 addi x10,x10,1437 # 80018cdd + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: de053503 ld x10,-544(x10) # 80018548 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: dd850513 addi x10,x10,-552 # 80018558 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 52d50513 addi x10,x10,1325 # 80018ced + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: d6853503 ld x10,-664(x10) # 80018550 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: d5850513 addi x10,x10,-680 # 80018558 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: d0860613 addi x12,x12,-760 # 80018530 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: d1860613 addi x12,x12,-744 # 80018558 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89830313 addi x6,x6,-1896 # 80006930 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 88030313 addi x6,x6,-1920 # 80006930 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86830313 addi x6,x6,-1944 # 80006930 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 70078793 addi x15,x15,1792 # 80006940 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: cf010113 addi x2,x2,-784 # 8001a1d0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001977d .word 0x8001977d + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 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x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-rev8-00.elf.objdump b/riscv-tests/rv64-Zbkb-rev8-00.elf.objdump new file mode 100644 index 0000000..88f2f2e --- /dev/null +++ b/riscv-tests/rv64-Zbkb-rev8-00.elf.objdump @@ -0,0 +1,6676 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rev8-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rev8-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 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+00000000800013e0 g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029800 g .tohost 0000000000000000 fromhost +0000000080029700 g .tohost 0000000000000000 tohost +00000000800016b0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7341213640f3e1cf + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zbkb_rev8_cg_cp_rs1_b0: + rev8 x26, x0 # perform operation + 80000048: 6b805d13 rev8 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkb_rev8_cg_cp_rs1_b0, Zbkb_rev8_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01a20c63 beq x4,x26,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x05b17696d90c5a62 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zbkb_rev8_cg_cp_rs1_b1: + rev8 x13, x1 # perform operation + 80000074: 6b80d693 rev8 x13,x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zbkb_rev8_cg_cp_rs1_b1, Zbkb_rev8_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00d20c63 beq x4,x13,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008821 .word 0x80008821 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x29, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010e93 addi x29,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x268b7cb0c193a920 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zbkb_rev8_cg_cp_rs1_b2: + rev8 x26, x2 # perform operation + 800000a4: 6b815d13 rev8 x26,x2 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkb_rev8_cg_cp_rs1_b2, Zbkb_rev8_cg_cp_rs1_b2_str) + 800000a8: 000eb203 ld x4,0(x29) + 800000ac: 01a20c63 beq x4,x26,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008852 .word 0x80008852 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008e8e93 addi x29,x29,8 + + mv x20, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018a13 addi x20,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x009f909ef2771624 + 800000cc: 000a3183 ld x3,0(x20) + 800000d0: 008a0a13 addi x20,x20,8 + +00000000800000d4 : +Zbkb_rev8_cg_cp_rs1_b3: + rev8 x10, x3 # perform operation + 800000d4: 6b81d513 rev8 x10,x3 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zbkb_rev8_cg_cp_rs1_b3, Zbkb_rev8_cg_cp_rs1_b3_str) + 800000d8: 000eb203 ld x4,0(x29) + 800000dc: 00a20c63 beq x4,x10,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008883 .word 0x80008883 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008e8e93 addi x29,x29,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x0fa4c0b6cdbd3651 + 80000100: 000a3203 ld x4,0(x20) + 80000104: 008a0a13 addi x20,x20,8 + +0000000080000108 : +Zbkb_rev8_cg_cp_rs1_b4: + rev8 x28, x4 # perform operation + 80000108: 6b825e13 rev8 x28,x4 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_rev8_cg_cp_rs1_b4, Zbkb_rev8_cg_cp_rs1_b4_str) + 8000010c: 000eb383 ld x7,0(x29) + 80000110: 01c38c63 beq x7,x28,80000128 + 80000114: 6c40246f jal x8,800027d8 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088b4 .word 0x800088b4 + 80000124: 00000000 .word 0x00000000 + 80000128: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x208555d939a3b0ec + 8000012c: 000a3283 ld x5,0(x20) + 80000130: 008a0a13 addi x20,x20,8 + +0000000080000134 : +Zbkb_rev8_cg_cp_rs1_b5: + rev8 x25, x5 # perform operation + 80000134: 6b82dc93 rev8 x25,x5 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zbkb_rev8_cg_cp_rs1_b5, Zbkb_rev8_cg_cp_rs1_b5_str) + 80000138: 000eb383 ld x7,0(x29) + 8000013c: 01938c63 beq x7,x25,80000154 + 80000140: 6980246f jal x8,800027d8 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 800088e5 .word 0x800088e5 + 80000150: 00000000 .word 0x00000000 + 80000154: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xc486aae1b257d70e + 80000158: 000a3303 ld x6,0(x20) + 8000015c: 008a0a13 addi x20,x20,8 + +0000000080000160 : +Zbkb_rev8_cg_cp_rs1_b6: + rev8 x24, x6 # perform operation + 80000160: 6b835c13 rev8 x24,x6 + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zbkb_rev8_cg_cp_rs1_b6, Zbkb_rev8_cg_cp_rs1_b6_str) + 80000164: 000eb383 ld x7,0(x29) + 80000168: 01838c63 beq x7,x24,80000180 + 8000016c: 66c0246f jal x8,800027d8 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 80008916 .word 0x80008916 + 8000017c: 00000000 .word 0x00000000 + 80000180: 008e8e93 addi x29,x29,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x04ae6155bb683630 + 8000018c: 000a3383 ld x7,0(x20) + 80000190: 008a0a13 addi x20,x20,8 + +0000000080000194 : +Zbkb_rev8_cg_cp_rs1_b7: + rev8 x18, x7 # perform operation + 80000194: 6b83d913 rev8 x18,x7 + # Check if x18 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x18, Zbkb_rev8_cg_cp_rs1_b7, Zbkb_rev8_cg_cp_rs1_b7_str) + 80000198: 000eb683 ld x13,0(x29) + 8000019c: 01268c63 beq x13,x18,800001b4 + 800001a0: 6600276f jal x14,80002800 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 80008947 .word 0x80008947 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x2b605e64eefb16e0 + 800001b8: 000a3403 ld x8,0(x20) + 800001bc: 008a0a13 addi x20,x20,8 + +00000000800001c0 : +Zbkb_rev8_cg_cp_rs1_b8: + rev8 x31, x8 # perform operation + 800001c0: 6b845f93 rev8 x31,x8 + # Check if x31 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x31, Zbkb_rev8_cg_cp_rs1_b8, Zbkb_rev8_cg_cp_rs1_b8_str) + 800001c4: 000eb683 ld x13,0(x29) + 800001c8: 01f68c63 beq x13,x31,800001e0 + 800001cc: 6340276f jal x14,80002800 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 80008978 .word 0x80008978 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x871f8ce5aa2aebb6 + 800001e4: 000a3483 ld x9,0(x20) + 800001e8: 008a0a13 addi x20,x20,8 + +00000000800001ec : +Zbkb_rev8_cg_cp_rs1_b9: + rev8 x1, x9 # perform operation + 800001ec: 6b84d093 rev8 x1,x9 + # Check if x1 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x1, Zbkb_rev8_cg_cp_rs1_b9, Zbkb_rev8_cg_cp_rs1_b9_str) + 800001f0: 000eb683 ld x13,0(x29) + 800001f4: 00168c63 beq x13,x1,8000020c + 800001f8: 6080276f jal x14,80002800 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 800089a9 .word 0x800089a9 + 80000208: 00000000 .word 0x00000000 + 8000020c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xaab454be3040c241 + 80000210: 000a3503 ld x10,0(x20) + 80000214: 008a0a13 addi x20,x20,8 + +0000000080000218 : +Zbkb_rev8_cg_cp_rs1_b10: + rev8 x16, x10 # perform operation + 80000218: 6b855813 rev8 x16,x10 + # Check if x16 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x16, Zbkb_rev8_cg_cp_rs1_b10, Zbkb_rev8_cg_cp_rs1_b10_str) + 8000021c: 000eb683 ld x13,0(x29) + 80000220: 01068c63 beq x13,x16,80000238 + 80000224: 5dc0276f jal x14,80002800 + 80000228: 80000218 .word 0x80000218 + 8000022c: 00000000 .word 0x00000000 + 80000230: 800089db .word 0x800089db + 80000234: 00000000 .word 0x00000000 + 80000238: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xc049e5f3ee05e8a1 + 8000023c: 000a3583 ld x11,0(x20) + 80000240: 008a0a13 addi x20,x20,8 + +0000000080000244 : +Zbkb_rev8_cg_cp_rs1_b11: + rev8 x8, x11 # perform operation + 80000244: 6b85d413 rev8 x8,x11 + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zbkb_rev8_cg_cp_rs1_b11, Zbkb_rev8_cg_cp_rs1_b11_str) + 80000248: 000eb683 ld x13,0(x29) + 8000024c: 00868c63 beq x13,x8,80000264 + 80000250: 5b00276f jal x14,80002800 + 80000254: 80000244 .word 0x80000244 + 80000258: 00000000 .word 0x00000000 + 8000025c: 80008a0e .word 0x80008a0e + 80000260: 00000000 .word 0x00000000 + 80000264: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xe8e3dd1e4a4818fa + 80000268: 000a3603 ld x12,0(x20) + 8000026c: 008a0a13 addi x20,x20,8 + +0000000080000270 : +Zbkb_rev8_cg_cp_rs1_b12: + rev8 x9, x12 # perform operation + 80000270: 6b865493 rev8 x9,x12 + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zbkb_rev8_cg_cp_rs1_b12, Zbkb_rev8_cg_cp_rs1_b12_str) + 80000274: 000eb683 ld x13,0(x29) + 80000278: 00968c63 beq x13,x9,80000290 + 8000027c: 5840276f jal x14,80002800 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 80008a41 .word 0x80008a41 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008e8e93 addi x29,x29,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000294: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000298: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x8eb72e2b57de5f49 + 8000029c: 000a3683 ld x13,0(x20) + 800002a0: 008a0a13 addi x20,x20,8 + +00000000800002a4 : +Zbkb_rev8_cg_cp_rs1_b13: + rev8 x28, x13 # perform operation + 800002a4: 6b86de13 rev8 x28,x13 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_rev8_cg_cp_rs1_b13, Zbkb_rev8_cg_cp_rs1_b13_str) + 800002a8: 000eb383 ld x7,0(x29) + 800002ac: 01c38c63 beq x7,x28,800002c4 + 800002b0: 5280246f jal x8,800027d8 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 80008a74 .word 0x80008a74 + 800002c0: 00000000 .word 0x00000000 + 800002c4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x5ea88a3a691f4de5 + 800002c8: 000a3703 ld x14,0(x20) + 800002cc: 008a0a13 addi x20,x20,8 + +00000000800002d0 : +Zbkb_rev8_cg_cp_rs1_b14: + rev8 x31, x14 # perform operation + 800002d0: 6b875f93 rev8 x31,x14 + # Check if x31 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x31, Zbkb_rev8_cg_cp_rs1_b14, Zbkb_rev8_cg_cp_rs1_b14_str) + 800002d4: 000eb383 ld x7,0(x29) + 800002d8: 01f38c63 beq x7,x31,800002f0 + 800002dc: 4fc0246f jal x8,800027d8 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 80008aa7 .word 0x80008aa7 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x5c8668e5c8b8ade3 + 800002f4: 000a3783 ld x15,0(x20) + 800002f8: 008a0a13 addi x20,x20,8 + +00000000800002fc : +Zbkb_rev8_cg_cp_rs1_b15: + rev8 x6, x15 # perform operation + 800002fc: 6b87d313 rev8 x6,x15 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zbkb_rev8_cg_cp_rs1_b15, Zbkb_rev8_cg_cp_rs1_b15_str) + 80000300: 000eb383 ld x7,0(x29) + 80000304: 00638c63 beq x7,x6,8000031c + 80000308: 4d00246f jal x8,800027d8 + 8000030c: 800002fc .word 0x800002fc + 80000310: 00000000 .word 0x00000000 + 80000314: 80008ada .word 0x80008ada + 80000318: 00000000 .word 0x00000000 + 8000031c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xe12282b3eb411103 + 80000320: 000a3803 ld x16,0(x20) + 80000324: 008a0a13 addi x20,x20,8 + +0000000080000328 : +Zbkb_rev8_cg_cp_rs1_b16: + rev8 x15, x16 # perform operation + 80000328: 6b885793 rev8 x15,x16 + # Check if x15 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x15, Zbkb_rev8_cg_cp_rs1_b16, Zbkb_rev8_cg_cp_rs1_b16_str) + 8000032c: 000eb383 ld x7,0(x29) + 80000330: 00f38c63 beq x7,x15,80000348 + 80000334: 4a40246f jal x8,800027d8 + 80000338: 80000328 .word 0x80000328 + 8000033c: 00000000 .word 0x00000000 + 80000340: 80008b0d .word 0x80008b0d + 80000344: 00000000 .word 0x00000000 + 80000348: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x79e3938d54b1765b + 8000034c: 000a3883 ld x17,0(x20) + 80000350: 008a0a13 addi x20,x20,8 + +0000000080000354 : +Zbkb_rev8_cg_cp_rs1_b17: + rev8 x26, x17 # perform operation + 80000354: 6b88dd13 rev8 x26,x17 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkb_rev8_cg_cp_rs1_b17, Zbkb_rev8_cg_cp_rs1_b17_str) + 80000358: 000eb383 ld x7,0(x29) + 8000035c: 01a38c63 beq x7,x26,80000374 + 80000360: 4780246f jal x8,800027d8 + 80000364: 80000354 .word 0x80000354 + 80000368: 00000000 .word 0x00000000 + 8000036c: 80008b40 .word 0x80008b40 + 80000370: 00000000 .word 0x00000000 + 80000374: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x07b4127b8ee567e3 + 80000378: 000a3903 ld x18,0(x20) + 8000037c: 008a0a13 addi x20,x20,8 + +0000000080000380 : +Zbkb_rev8_cg_cp_rs1_b18: + rev8 x23, x18 # perform operation + 80000380: 6b895b93 rev8 x23,x18 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zbkb_rev8_cg_cp_rs1_b18, Zbkb_rev8_cg_cp_rs1_b18_str) + 80000384: 000eb383 ld x7,0(x29) + 80000388: 01738c63 beq x7,x23,800003a0 + 8000038c: 44c0246f jal x8,800027d8 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 80008b73 .word 0x80008b73 + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x3d523bd1b45a5c69 + 800003a4: 000a3983 ld x19,0(x20) + 800003a8: 008a0a13 addi x20,x20,8 + +00000000800003ac : +Zbkb_rev8_cg_cp_rs1_b19: + rev8 x0, x19 # perform operation + 800003ac: 6b89d013 rev8 x0,x19 + # Check if x0 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x0, Zbkb_rev8_cg_cp_rs1_b19, Zbkb_rev8_cg_cp_rs1_b19_str) + 800003b0: 000eb383 ld x7,0(x29) + 800003b4: 00038c63 beq x7,x0,800003cc + 800003b8: 4200246f jal x8,800027d8 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 80008ba6 .word 0x80008ba6 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008e8e93 addi x29,x29,8 + + mv x19, x20 # switch data pointer register to avoid conflict with test + 800003d0: 000a0993 addi x19,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0x2c57c4830c664d10 + 800003d4: 0009ba03 ld x20,0(x19) + 800003d8: 00898993 addi x19,x19,8 + +00000000800003dc : +Zbkb_rev8_cg_cp_rs1_b20: + rev8 x26, x20 # perform operation + 800003dc: 6b8a5d13 rev8 x26,x20 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkb_rev8_cg_cp_rs1_b20, Zbkb_rev8_cg_cp_rs1_b20_str) + 800003e0: 000eb383 ld x7,0(x29) + 800003e4: 01a38c63 beq x7,x26,800003fc + 800003e8: 3f00246f jal x8,800027d8 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 80008bd9 .word 0x80008bd9 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x301a261ffb055d85 + 80000400: 0009ba83 ld x21,0(x19) + 80000404: 00898993 addi x19,x19,8 + +0000000080000408 : +Zbkb_rev8_cg_cp_rs1_b21: + rev8 x28, x21 # perform operation + 80000408: 6b8ade13 rev8 x28,x21 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_rev8_cg_cp_rs1_b21, Zbkb_rev8_cg_cp_rs1_b21_str) + 8000040c: 000eb383 ld x7,0(x29) + 80000410: 01c38c63 beq x7,x28,80000428 + 80000414: 3c40246f jal x8,800027d8 + 80000418: 80000408 .word 0x80000408 + 8000041c: 00000000 .word 0x00000000 + 80000420: 80008c0c .word 0x80008c0c + 80000424: 00000000 .word 0x00000000 + 80000428: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0x5a63245acf2d4154 + 8000042c: 0009bb03 ld x22,0(x19) + 80000430: 00898993 addi x19,x19,8 + +0000000080000434 : +Zbkb_rev8_cg_cp_rs1_b22: + rev8 x3, x22 # perform operation + 80000434: 6b8b5193 rev8 x3,x22 + # Check if x3 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x3, Zbkb_rev8_cg_cp_rs1_b22, Zbkb_rev8_cg_cp_rs1_b22_str) + 80000438: 000eb383 ld x7,0(x29) + 8000043c: 00338c63 beq x7,x3,80000454 + 80000440: 3980246f jal x8,800027d8 + 80000444: 80000434 .word 0x80000434 + 80000448: 00000000 .word 0x00000000 + 8000044c: 80008c3f .word 0x80008c3f + 80000450: 00000000 .word 0x00000000 + 80000454: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x1ce8fee23565d0ee + 80000458: 0009bb83 ld x23,0(x19) + 8000045c: 00898993 addi x19,x19,8 + +0000000080000460 : +Zbkb_rev8_cg_cp_rs1_b23: + rev8 x6, x23 # perform operation + 80000460: 6b8bd313 rev8 x6,x23 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zbkb_rev8_cg_cp_rs1_b23, Zbkb_rev8_cg_cp_rs1_b23_str) + 80000464: 000eb383 ld x7,0(x29) + 80000468: 00638c63 beq x7,x6,80000480 + 8000046c: 36c0246f jal x8,800027d8 + 80000470: 80000460 .word 0x80000460 + 80000474: 00000000 .word 0x00000000 + 80000478: 80008c72 .word 0x80008c72 + 8000047c: 00000000 .word 0x00000000 + 80000480: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0xd7e4929af480d032 + 80000484: 0009bc03 ld x24,0(x19) + 80000488: 00898993 addi x19,x19,8 + +000000008000048c : +Zbkb_rev8_cg_cp_rs1_b24: + rev8 x4, x24 # perform operation + 8000048c: 6b8c5213 rev8 x4,x24 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zbkb_rev8_cg_cp_rs1_b24, Zbkb_rev8_cg_cp_rs1_b24_str) + 80000490: 000eb383 ld x7,0(x29) + 80000494: 00438c63 beq x7,x4,800004ac + 80000498: 3400246f jal x8,800027d8 + 8000049c: 8000048c .word 0x8000048c + 800004a0: 00000000 .word 0x00000000 + 800004a4: 80008ca5 .word 0x80008ca5 + 800004a8: 00000000 .word 0x00000000 + 800004ac: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x0ab7309eda06bf40 + 800004b0: 0009bc83 ld x25,0(x19) + 800004b4: 00898993 addi x19,x19,8 + +00000000800004b8 : +Zbkb_rev8_cg_cp_rs1_b25: + rev8 x11, x25 # perform operation + 800004b8: 6b8cd593 rev8 x11,x25 + # Check if x11 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x11, Zbkb_rev8_cg_cp_rs1_b25, Zbkb_rev8_cg_cp_rs1_b25_str) + 800004bc: 000eb383 ld x7,0(x29) + 800004c0: 00b38c63 beq x7,x11,800004d8 + 800004c4: 3140246f jal x8,800027d8 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 80008cd8 .word 0x80008cd8 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xd83c60991b765345 + 800004dc: 0009bd03 ld x26,0(x19) + 800004e0: 00898993 addi x19,x19,8 + +00000000800004e4 : +Zbkb_rev8_cg_cp_rs1_b26: + rev8 x23, x26 # perform operation + 800004e4: 6b8d5b93 rev8 x23,x26 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zbkb_rev8_cg_cp_rs1_b26, Zbkb_rev8_cg_cp_rs1_b26_str) + 800004e8: 000eb383 ld x7,0(x29) + 800004ec: 01738c63 beq x7,x23,80000504 + 800004f0: 2e80246f jal x8,800027d8 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 80008d0b .word 0x80008d0b + 80000500: 00000000 .word 0x00000000 + 80000504: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x1e6f0994c02e19ba + 80000508: 0009bd83 ld x27,0(x19) + 8000050c: 00898993 addi x19,x19,8 + +0000000080000510 : +Zbkb_rev8_cg_cp_rs1_b27: + rev8 x17, x27 # perform operation + 80000510: 6b8dd893 rev8 x17,x27 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zbkb_rev8_cg_cp_rs1_b27, Zbkb_rev8_cg_cp_rs1_b27_str) + 80000514: 000eb383 ld x7,0(x29) + 80000518: 01138c63 beq x7,x17,80000530 + 8000051c: 2bc0246f jal x8,800027d8 + 80000520: 80000510 .word 0x80000510 + 80000524: 00000000 .word 0x00000000 + 80000528: 80008d3e .word 0x80008d3e + 8000052c: 00000000 .word 0x00000000 + 80000530: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0xaa3055111f9800ed + 80000534: 0009be03 ld x28,0(x19) + 80000538: 00898993 addi x19,x19,8 + +000000008000053c : +Zbkb_rev8_cg_cp_rs1_b28: + rev8 x17, x28 # perform operation + 8000053c: 6b8e5893 rev8 x17,x28 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zbkb_rev8_cg_cp_rs1_b28, Zbkb_rev8_cg_cp_rs1_b28_str) + 80000540: 000eb383 ld x7,0(x29) + 80000544: 01138c63 beq x7,x17,8000055c + 80000548: 2900246f jal x8,800027d8 + 8000054c: 8000053c .word 0x8000053c + 80000550: 00000000 .word 0x00000000 + 80000554: 80008d71 .word 0x80008d71 + 80000558: 00000000 .word 0x00000000 + 8000055c: 008e8e93 addi x29,x29,8 + + mv x28, x29 # switch signature pointer register to avoid conflict with test + 80000560: 000e8e13 addi x28,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xe6778ec172957d3d + 80000564: 0009be83 ld x29,0(x19) + 80000568: 00898993 addi x19,x19,8 + +000000008000056c : +Zbkb_rev8_cg_cp_rs1_b29: + rev8 x15, x29 # perform operation + 8000056c: 6b8ed793 rev8 x15,x29 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zbkb_rev8_cg_cp_rs1_b29, Zbkb_rev8_cg_cp_rs1_b29_str) + 80000570: 000e3383 ld x7,0(x28) + 80000574: 00f38c63 beq x7,x15,8000058c + 80000578: 2600246f jal x8,800027d8 + 8000057c: 8000056c .word 0x8000056c + 80000580: 00000000 .word 0x00000000 + 80000584: 80008da4 .word 0x80008da4 + 80000588: 00000000 .word 0x00000000 + 8000058c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0xdae0b00dfe656ec3 + 80000590: 0009bf03 ld x30,0(x19) + 80000594: 00898993 addi x19,x19,8 + +0000000080000598 : +Zbkb_rev8_cg_cp_rs1_b30: + rev8 x15, x30 # perform operation + 80000598: 6b8f5793 rev8 x15,x30 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zbkb_rev8_cg_cp_rs1_b30, Zbkb_rev8_cg_cp_rs1_b30_str) + 8000059c: 000e3383 ld x7,0(x28) + 800005a0: 00f38c63 beq x7,x15,800005b8 + 800005a4: 2340246f jal x8,800027d8 + 800005a8: 80000598 .word 0x80000598 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 80008dd7 .word 0x80008dd7 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xd3797d8cacc7a061 + 800005bc: 0009bf83 ld x31,0(x19) + 800005c0: 00898993 addi x19,x19,8 + +00000000800005c4 : +Zbkb_rev8_cg_cp_rs1_b31: + rev8 x6, x31 # perform operation + 800005c4: 6b8fd313 rev8 x6,x31 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zbkb_rev8_cg_cp_rs1_b31, Zbkb_rev8_cg_cp_rs1_b31_str) + 800005c8: 000e3383 ld x7,0(x28) + 800005cc: 00638c63 beq x7,x6,800005e4 + 800005d0: 2080246f jal x8,800027d8 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 80008e0a .word 0x80008e0a + 800005e0: 00000000 .word 0x00000000 + 800005e4: 008e0e13 addi x28,x28,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xc4da043acf3753c1 + 800005e8: 0009b683 ld x13,0(x19) + 800005ec: 00898993 addi x19,x19,8 + +00000000800005f0 : +Zbkb_rev8_cg_cp_rd_b0: + rev8 x0, x13 # perform operation + 800005f0: 6b86d013 rev8 x0,x13 + # Check if x0 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x0, Zbkb_rev8_cg_cp_rd_b0, Zbkb_rev8_cg_cp_rd_b0_str) + 800005f4: 000e3383 ld x7,0(x28) + 800005f8: 00038c63 beq x7,x0,80000610 + 800005fc: 1dc0246f jal x8,800027d8 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80008e3d .word 0x80008e3d + 8000060c: 00000000 .word 0x00000000 + 80000610: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xba6d9a0225746840 + 80000614: 0009bf83 ld x31,0(x19) + 80000618: 00898993 addi x19,x19,8 + +000000008000061c : +Zbkb_rev8_cg_cp_rd_b1: + rev8 x1, x31 # perform operation + 8000061c: 6b8fd093 rev8 x1,x31 + # Check if x1 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x1, Zbkb_rev8_cg_cp_rd_b1, Zbkb_rev8_cg_cp_rd_b1_str) + 80000620: 000e3383 ld x7,0(x28) + 80000624: 00138c63 beq x7,x1,8000063c + 80000628: 1b00246f jal x8,800027d8 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008e6e .word 0x80008e6e + 80000638: 00000000 .word 0x00000000 + 8000063c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x9b8accf9b5b9d687 + 80000640: 0009b003 ld x0,0(x19) + 80000644: 00898993 addi x19,x19,8 + +0000000080000648 : +Zbkb_rev8_cg_cp_rd_b2: + rev8 x2, x0 # perform operation + 80000648: 6b805113 rev8 x2,x0 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zbkb_rev8_cg_cp_rd_b2, Zbkb_rev8_cg_cp_rd_b2_str) + 8000064c: 000e3383 ld x7,0(x28) + 80000650: 00238c63 beq x7,x2,80000668 + 80000654: 1840246f jal x8,800027d8 + 80000658: 80000648 .word 0x80000648 + 8000065c: 00000000 .word 0x00000000 + 80000660: 80008e9f .word 0x80008e9f + 80000664: 00000000 .word 0x00000000 + 80000668: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs1: x0 = 0x5a9582e1fb2d1ae7 + 8000066c: 0009b003 ld x0,0(x19) + 80000670: 00898993 addi x19,x19,8 + +0000000080000674 : +Zbkb_rev8_cg_cp_rd_b3: + rev8 x3, x0 # perform operation + 80000674: 6b805193 rev8 x3,x0 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zbkb_rev8_cg_cp_rd_b3, Zbkb_rev8_cg_cp_rd_b3_str) + 80000678: 000e3383 ld x7,0(x28) + 8000067c: 00338c63 beq x7,x3,80000694 + 80000680: 1580246f jal x8,800027d8 + 80000684: 80000674 .word 0x80000674 + 80000688: 00000000 .word 0x00000000 + 8000068c: 80008ed0 .word 0x80008ed0 + 80000690: 00000000 .word 0x00000000 + 80000694: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0xb138068b8da9254d + 80000698: 0009bf83 ld x31,0(x19) + 8000069c: 00898993 addi x19,x19,8 + +00000000800006a0 : +Zbkb_rev8_cg_cp_rd_b4: + rev8 x4, x31 # perform operation + 800006a0: 6b8fd213 rev8 x4,x31 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zbkb_rev8_cg_cp_rd_b4, Zbkb_rev8_cg_cp_rd_b4_str) + 800006a4: 000e3383 ld x7,0(x28) + 800006a8: 00438c63 beq x7,x4,800006c0 + 800006ac: 12c0246f jal x8,800027d8 + 800006b0: 800006a0 .word 0x800006a0 + 800006b4: 00000000 .word 0x00000000 + 800006b8: 80008f01 .word 0x80008f01 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0xf6e7eb16398d7553 + 800006c4: 0009bb83 ld x23,0(x19) + 800006c8: 00898993 addi x19,x19,8 + +00000000800006cc : +Zbkb_rev8_cg_cp_rd_b5: + rev8 x5, x23 # perform operation + 800006cc: 6b8bd293 rev8 x5,x23 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zbkb_rev8_cg_cp_rd_b5, Zbkb_rev8_cg_cp_rd_b5_str) + 800006d0: 000e3383 ld x7,0(x28) + 800006d4: 00538c63 beq x7,x5,800006ec + 800006d8: 1000246f jal x8,800027d8 + 800006dc: 800006cc .word 0x800006cc + 800006e0: 00000000 .word 0x00000000 + 800006e4: 80008f32 .word 0x80008f32 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x377e1b5cee2df05c + 800006f0: 0009b803 ld x16,0(x19) + 800006f4: 00898993 addi x19,x19,8 + +00000000800006f8 : +Zbkb_rev8_cg_cp_rd_b6: + rev8 x6, x16 # perform operation + 800006f8: 6b885313 rev8 x6,x16 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zbkb_rev8_cg_cp_rd_b6, Zbkb_rev8_cg_cp_rd_b6_str) + 800006fc: 000e3383 ld x7,0(x28) + 80000700: 00638c63 beq x7,x6,80000718 + 80000704: 0d40246f jal x8,800027d8 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 80008f63 .word 0x80008f63 + 80000714: 00000000 .word 0x00000000 + 80000718: 008e0e13 addi x28,x28,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000071c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000720: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0xaad2e17395ef563c + 80000724: 0009bd03 ld x26,0(x19) + 80000728: 00898993 addi x19,x19,8 + +000000008000072c : +Zbkb_rev8_cg_cp_rd_b7: + rev8 x7, x26 # perform operation + 8000072c: 6b8d5393 rev8 x7,x26 + # Check if x7 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x7, Zbkb_rev8_cg_cp_rd_b7, Zbkb_rev8_cg_cp_rd_b7_str) + 80000730: 000e3683 ld x13,0(x28) + 80000734: 00768c63 beq x13,x7,8000074c + 80000738: 0c80276f jal x14,80002800 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 80008f94 .word 0x80008f94 + 80000748: 00000000 .word 0x00000000 + 8000074c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x18c66f1923cfbdc6 + 80000750: 0009bd03 ld x26,0(x19) + 80000754: 00898993 addi x19,x19,8 + +0000000080000758 : +Zbkb_rev8_cg_cp_rd_b8: + rev8 x8, x26 # perform operation + 80000758: 6b8d5413 rev8 x8,x26 + # Check if x8 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x8, Zbkb_rev8_cg_cp_rd_b8, Zbkb_rev8_cg_cp_rd_b8_str) + 8000075c: 000e3683 ld x13,0(x28) + 80000760: 00868c63 beq x13,x8,80000778 + 80000764: 09c0276f jal x14,80002800 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 80008fc5 .word 0x80008fc5 + 80000774: 00000000 .word 0x00000000 + 80000778: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x75b7c1a26f3ed737 + 8000077c: 0009bd83 ld x27,0(x19) + 80000780: 00898993 addi x19,x19,8 + +0000000080000784 : +Zbkb_rev8_cg_cp_rd_b9: + rev8 x9, x27 # perform operation + 80000784: 6b8dd493 rev8 x9,x27 + # Check if x9 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x9, Zbkb_rev8_cg_cp_rd_b9, Zbkb_rev8_cg_cp_rd_b9_str) + 80000788: 000e3683 ld x13,0(x28) + 8000078c: 00968c63 beq x13,x9,800007a4 + 80000790: 0700276f jal x14,80002800 + 80000794: 80000784 .word 0x80000784 + 80000798: 00000000 .word 0x00000000 + 8000079c: 80008ff6 .word 0x80008ff6 + 800007a0: 00000000 .word 0x00000000 + 800007a4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x1c7fe85566f25aeb + 800007a8: 0009be83 ld x29,0(x19) + 800007ac: 00898993 addi x19,x19,8 + +00000000800007b0 : +Zbkb_rev8_cg_cp_rd_b10: + rev8 x10, x29 # perform operation + 800007b0: 6b8ed513 rev8 x10,x29 + # Check if x10 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x10, Zbkb_rev8_cg_cp_rd_b10, Zbkb_rev8_cg_cp_rd_b10_str) + 800007b4: 000e3683 ld x13,0(x28) + 800007b8: 00a68c63 beq x13,x10,800007d0 + 800007bc: 0440276f jal x14,80002800 + 800007c0: 800007b0 .word 0x800007b0 + 800007c4: 00000000 .word 0x00000000 + 800007c8: 80009027 .word 0x80009027 + 800007cc: 00000000 .word 0x00000000 + 800007d0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0x9867db4028b5f9ac + 800007d4: 0009b283 ld x5,0(x19) + 800007d8: 00898993 addi x19,x19,8 + +00000000800007dc : +Zbkb_rev8_cg_cp_rd_b11: + rev8 x11, x5 # perform operation + 800007dc: 6b82d593 rev8 x11,x5 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zbkb_rev8_cg_cp_rd_b11, Zbkb_rev8_cg_cp_rd_b11_str) + 800007e0: 000e3683 ld x13,0(x28) + 800007e4: 00b68c63 beq x13,x11,800007fc + 800007e8: 0180276f jal x14,80002800 + 800007ec: 800007dc .word 0x800007dc + 800007f0: 00000000 .word 0x00000000 + 800007f4: 80009059 .word 0x80009059 + 800007f8: 00000000 .word 0x00000000 + 800007fc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs1: x22 = 0xe8539e575f78848f + 80000800: 0009bb03 ld x22,0(x19) + 80000804: 00898993 addi x19,x19,8 + +0000000080000808 : +Zbkb_rev8_cg_cp_rd_b12: + rev8 x12, x22 # perform operation + 80000808: 6b8b5613 rev8 x12,x22 + # Check if x12 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x12, Zbkb_rev8_cg_cp_rd_b12, Zbkb_rev8_cg_cp_rd_b12_str) + 8000080c: 000e3683 ld x13,0(x28) + 80000810: 00c68c63 beq x13,x12,80000828 + 80000814: 7ed0176f jal x14,80002800 + 80000818: 80000808 .word 0x80000808 + 8000081c: 00000000 .word 0x00000000 + 80000820: 8000908b .word 0x8000908b + 80000824: 00000000 .word 0x00000000 + 80000828: 008e0e13 addi x28,x28,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000082c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000830: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x5871e96609ecb297 + 80000834: 0009b783 ld x15,0(x19) + 80000838: 00898993 addi x19,x19,8 + +000000008000083c : +Zbkb_rev8_cg_cp_rd_b13: + rev8 x13, x15 # perform operation + 8000083c: 6b87d693 rev8 x13,x15 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zbkb_rev8_cg_cp_rd_b13, Zbkb_rev8_cg_cp_rd_b13_str) + 80000840: 000e3203 ld x4,0(x28) + 80000844: 00d20c63 beq x4,x13,8000085c + 80000848: 779012ef jal x5,800027c0 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 800090bd .word 0x800090bd + 80000858: 00000000 .word 0x00000000 + 8000085c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xcd519fc7e290bc59 + 80000860: 0009b303 ld x6,0(x19) + 80000864: 00898993 addi x19,x19,8 + +0000000080000868 : +Zbkb_rev8_cg_cp_rd_b14: + rev8 x14, x6 # perform operation + 80000868: 6b835713 rev8 x14,x6 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zbkb_rev8_cg_cp_rd_b14, Zbkb_rev8_cg_cp_rd_b14_str) + 8000086c: 000e3203 ld x4,0(x28) + 80000870: 00e20c63 beq x4,x14,80000888 + 80000874: 74d012ef jal x5,800027c0 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 800090ef .word 0x800090ef + 80000884: 00000000 .word 0x00000000 + 80000888: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xfdb88350b452e60e + 8000088c: 0009b603 ld x12,0(x19) + 80000890: 00898993 addi x19,x19,8 + +0000000080000894 : +Zbkb_rev8_cg_cp_rd_b15: + rev8 x15, x12 # perform operation + 80000894: 6b865793 rev8 x15,x12 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zbkb_rev8_cg_cp_rd_b15, Zbkb_rev8_cg_cp_rd_b15_str) + 80000898: 000e3203 ld x4,0(x28) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 721012ef jal x5,800027c0 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 80009121 .word 0x80009121 + 800008b0: 00000000 .word 0x00000000 + 800008b4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x9b9c7dd60df6a7e7 + 800008b8: 0009bd03 ld x26,0(x19) + 800008bc: 00898993 addi x19,x19,8 + +00000000800008c0 : +Zbkb_rev8_cg_cp_rd_b16: + rev8 x16, x26 # perform operation + 800008c0: 6b8d5813 rev8 x16,x26 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zbkb_rev8_cg_cp_rd_b16, Zbkb_rev8_cg_cp_rd_b16_str) + 800008c4: 000e3203 ld x4,0(x28) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 6f5012ef jal x5,800027c0 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 80009153 .word 0x80009153 + 800008dc: 00000000 .word 0x00000000 + 800008e0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xc830ccb4a1b77c9a + 800008e4: 0009ba03 ld x20,0(x19) + 800008e8: 00898993 addi x19,x19,8 + +00000000800008ec : +Zbkb_rev8_cg_cp_rd_b17: + rev8 x17, x20 # perform operation + 800008ec: 6b8a5893 rev8 x17,x20 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zbkb_rev8_cg_cp_rd_b17, Zbkb_rev8_cg_cp_rd_b17_str) + 800008f0: 000e3203 ld x4,0(x28) + 800008f4: 01120c63 beq x4,x17,8000090c + 800008f8: 6c9012ef jal x5,800027c0 + 800008fc: 800008ec .word 0x800008ec + 80000900: 00000000 .word 0x00000000 + 80000904: 80009185 .word 0x80009185 + 80000908: 00000000 .word 0x00000000 + 8000090c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x23) # load rs1: x23 = 0x0014a9a531c0b311 + 80000910: 0009bb83 ld x23,0(x19) + 80000914: 00898993 addi x19,x19,8 + +0000000080000918 : +Zbkb_rev8_cg_cp_rd_b18: + rev8 x18, x23 # perform operation + 80000918: 6b8bd913 rev8 x18,x23 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zbkb_rev8_cg_cp_rd_b18, Zbkb_rev8_cg_cp_rd_b18_str) + 8000091c: 000e3203 ld x4,0(x28) + 80000920: 01220c63 beq x4,x18,80000938 + 80000924: 69d012ef jal x5,800027c0 + 80000928: 80000918 .word 0x80000918 + 8000092c: 00000000 .word 0x00000000 + 80000930: 800091b7 .word 0x800091b7 + 80000934: 00000000 .word 0x00000000 + 80000938: 008e0e13 addi x28,x28,8 + + mv x11, x19 # switch data pointer register to avoid conflict with test + 8000093c: 00098593 addi x11,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0xba0e9c439446afe4 + 80000940: 0005bd03 ld x26,0(x11) + 80000944: 00858593 addi x11,x11,8 + +0000000080000948 : +Zbkb_rev8_cg_cp_rd_b19: + rev8 x19, x26 # perform operation + 80000948: 6b8d5993 rev8 x19,x26 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zbkb_rev8_cg_cp_rd_b19, Zbkb_rev8_cg_cp_rd_b19_str) + 8000094c: 000e3203 ld x4,0(x28) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 800091e9 .word 0x800091e9 + 80000964: 00000000 .word 0x00000000 + 80000968: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xeeba3ac8baddce5b + 8000096c: 0005b383 ld x7,0(x11) + 80000970: 00858593 addi x11,x11,8 + +0000000080000974 : +Zbkb_rev8_cg_cp_rd_b20: + rev8 x20, x7 # perform operation + 80000974: 6b83da13 rev8 x20,x7 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zbkb_rev8_cg_cp_rd_b20, Zbkb_rev8_cg_cp_rd_b20_str) + 80000978: 000e3203 ld x4,0(x28) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000921b .word 0x8000921b + 80000990: 00000000 .word 0x00000000 + 80000994: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0xfd56012428c622de + 80000998: 0005b903 ld x18,0(x11) + 8000099c: 00858593 addi x11,x11,8 + +00000000800009a0 : +Zbkb_rev8_cg_cp_rd_b21: + rev8 x21, x18 # perform operation + 800009a0: 6b895a93 rev8 x21,x18 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zbkb_rev8_cg_cp_rd_b21, Zbkb_rev8_cg_cp_rd_b21_str) + 800009a4: 000e3203 ld x4,0(x28) + 800009a8: 01520c63 beq x4,x21,800009c0 + 800009ac: 615012ef jal x5,800027c0 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000924d .word 0x8000924d + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0xeac255bf278f597d + 800009c4: 0005b903 ld x18,0(x11) + 800009c8: 00858593 addi x11,x11,8 + +00000000800009cc : +Zbkb_rev8_cg_cp_rd_b22: + rev8 x22, x18 # perform operation + 800009cc: 6b895b13 rev8 x22,x18 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zbkb_rev8_cg_cp_rd_b22, Zbkb_rev8_cg_cp_rd_b22_str) + 800009d0: 000e3203 ld x4,0(x28) + 800009d4: 01620c63 beq x4,x22,800009ec + 800009d8: 5e9012ef jal x5,800027c0 + 800009dc: 800009cc .word 0x800009cc + 800009e0: 00000000 .word 0x00000000 + 800009e4: 8000927f .word 0x8000927f + 800009e8: 00000000 .word 0x00000000 + 800009ec: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x11094936b36d44b9 + 800009f0: 0005b983 ld x19,0(x11) + 800009f4: 00858593 addi x11,x11,8 + +00000000800009f8 : +Zbkb_rev8_cg_cp_rd_b23: + rev8 x23, x19 # perform operation + 800009f8: 6b89db93 rev8 x23,x19 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zbkb_rev8_cg_cp_rd_b23, Zbkb_rev8_cg_cp_rd_b23_str) + 800009fc: 000e3203 ld x4,0(x28) + 80000a00: 01720c63 beq x4,x23,80000a18 + 80000a04: 5bd012ef jal x5,800027c0 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 800092b1 .word 0x800092b1 + 80000a14: 00000000 .word 0x00000000 + 80000a18: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0xf3652f33d259176b + 80000a1c: 0005ba83 ld x21,0(x11) + 80000a20: 00858593 addi x11,x11,8 + +0000000080000a24 : +Zbkb_rev8_cg_cp_rd_b24: + rev8 x24, x21 # perform operation + 80000a24: 6b8adc13 rev8 x24,x21 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zbkb_rev8_cg_cp_rd_b24, Zbkb_rev8_cg_cp_rd_b24_str) + 80000a28: 000e3203 ld x4,0(x28) + 80000a2c: 01820c63 beq x4,x24,80000a44 + 80000a30: 591012ef jal x5,800027c0 + 80000a34: 80000a24 .word 0x80000a24 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 800092e3 .word 0x800092e3 + 80000a40: 00000000 .word 0x00000000 + 80000a44: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xee5238b1a280ae8d + 80000a48: 0005b083 ld x1,0(x11) + 80000a4c: 00858593 addi x11,x11,8 + +0000000080000a50 : +Zbkb_rev8_cg_cp_rd_b25: + rev8 x25, x1 # perform operation + 80000a50: 6b80dc93 rev8 x25,x1 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zbkb_rev8_cg_cp_rd_b25, Zbkb_rev8_cg_cp_rd_b25_str) + 80000a54: 000e3203 ld x4,0(x28) + 80000a58: 01920c63 beq x4,x25,80000a70 + 80000a5c: 565012ef jal x5,800027c0 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 80009315 .word 0x80009315 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xbf0a7660e011d196 + 80000a74: 0005b083 ld x1,0(x11) + 80000a78: 00858593 addi x11,x11,8 + +0000000080000a7c : +Zbkb_rev8_cg_cp_rd_b26: + rev8 x26, x1 # perform operation + 80000a7c: 6b80dd13 rev8 x26,x1 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zbkb_rev8_cg_cp_rd_b26, Zbkb_rev8_cg_cp_rd_b26_str) + 80000a80: 000e3203 ld x4,0(x28) + 80000a84: 01a20c63 beq x4,x26,80000a9c + 80000a88: 539012ef jal x5,800027c0 + 80000a8c: 80000a7c .word 0x80000a7c + 80000a90: 00000000 .word 0x00000000 + 80000a94: 80009347 .word 0x80009347 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0xb4d4525d2a2249d3 + 80000aa0: 0005b103 ld x2,0(x11) + 80000aa4: 00858593 addi x11,x11,8 + +0000000080000aa8 : +Zbkb_rev8_cg_cp_rd_b27: + rev8 x27, x2 # perform operation + 80000aa8: 6b815d93 rev8 x27,x2 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkb_rev8_cg_cp_rd_b27, Zbkb_rev8_cg_cp_rd_b27_str) + 80000aac: 000e3203 ld x4,0(x28) + 80000ab0: 01b20c63 beq x4,x27,80000ac8 + 80000ab4: 50d012ef jal x5,800027c0 + 80000ab8: 80000aa8 .word 0x80000aa8 + 80000abc: 00000000 .word 0x00000000 + 80000ac0: 80009379 .word 0x80009379 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 008e0e13 addi x28,x28,8 + + mv x25, x28 # switch signature pointer register to avoid conflict with test + 80000acc: 000e0c93 addi x25,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x587b396b4b23fca5 + 80000ad0: 0005b983 ld x19,0(x11) + 80000ad4: 00858593 addi x11,x11,8 + +0000000080000ad8 : +Zbkb_rev8_cg_cp_rd_b28: + rev8 x28, x19 # perform operation + 80000ad8: 6b89de13 rev8 x28,x19 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zbkb_rev8_cg_cp_rd_b28, Zbkb_rev8_cg_cp_rd_b28_str) + 80000adc: 000cb203 ld x4,0(x25) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 4dd012ef jal x5,800027c0 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 800093ab .word 0x800093ab + 80000af4: 00000000 .word 0x00000000 + 80000af8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x5be8ba3bee83d5a5 + 80000afc: 0005b883 ld x17,0(x11) + 80000b00: 00858593 addi x11,x11,8 + +0000000080000b04 : +Zbkb_rev8_cg_cp_rd_b29: + rev8 x29, x17 # perform operation + 80000b04: 6b88de93 rev8 x29,x17 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_rev8_cg_cp_rd_b29, Zbkb_rev8_cg_cp_rd_b29_str) + 80000b08: 000cb203 ld x4,0(x25) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 4b1012ef jal x5,800027c0 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 800093dd .word 0x800093dd + 80000b20: 00000000 .word 0x00000000 + 80000b24: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0xeea07194beda1dd8 + 80000b28: 0005bd03 ld x26,0(x11) + 80000b2c: 00858593 addi x11,x11,8 + +0000000080000b30 : +Zbkb_rev8_cg_cp_rd_b30: + rev8 x30, x26 # perform operation + 80000b30: 6b8d5f13 rev8 x30,x26 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkb_rev8_cg_cp_rd_b30, Zbkb_rev8_cg_cp_rd_b30_str) + 80000b34: 000cb203 ld x4,0(x25) + 80000b38: 01e20c63 beq x4,x30,80000b50 + 80000b3c: 485012ef jal x5,800027c0 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 8000940f .word 0x8000940f + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x69996c7b88d031b2 + 80000b54: 0005be03 ld x28,0(x11) + 80000b58: 00858593 addi x11,x11,8 + +0000000080000b5c : +Zbkb_rev8_cg_cp_rd_b31: + rev8 x31, x28 # perform operation + 80000b5c: 6b8e5f93 rev8 x31,x28 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rev8_cg_cp_rd_b31, Zbkb_rev8_cg_cp_rd_b31_str) + 80000b60: 000cb203 ld x4,0(x25) + 80000b64: 01f20c63 beq x4,x31,80000b7c + 80000b68: 459012ef jal x5,800027c0 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 80009441 .word 0x80009441 + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x0000000000000000 + 80000b80: 0005b503 ld x10,0(x11) + 80000b84: 00858593 addi x11,x11,8 + +0000000080000b88 : +Zbkb_rev8_cg_cp_rs1_edges_0x0: + rev8 x3, x10 # perform operation + 80000b88: 6b855193 rev8 x3,x10 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rev8_cg_cp_rs1_edges_0x0, Zbkb_rev8_cg_cp_rs1_edges_0x0_str) + 80000b8c: 000cb203 ld x4,0(x25) + 80000b90: 00320c63 beq x4,x3,80000ba8 + 80000b94: 42d012ef jal x5,800027c0 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 80009473 .word 0x80009473 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x0000000000000001 + 80000bac: 0005bd83 ld x27,0(x11) + 80000bb0: 00858593 addi x11,x11,8 + +0000000080000bb4 : +Zbkb_rev8_cg_cp_rs1_edges_0x1: + rev8 x21, x27 # perform operation + 80000bb4: 6b8dda93 rev8 x21,x27 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rev8_cg_cp_rs1_edges_0x1, Zbkb_rev8_cg_cp_rs1_edges_0x1_str) + 80000bb8: 000cb203 ld x4,0(x25) + 80000bbc: 01520c63 beq x4,x21,80000bd4 + 80000bc0: 401012ef jal x5,800027c0 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 800094ac .word 0x800094ac + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x0000000000000002 + 80000bd8: 0005b483 ld x9,0(x11) + 80000bdc: 00858593 addi x11,x11,8 + +0000000080000be0 : +Zbkb_rev8_cg_cp_rs1_edges_0x2: + rev8 x23, x9 # perform operation + 80000be0: 6b84db93 rev8 x23,x9 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_rev8_cg_cp_rs1_edges_0x2, Zbkb_rev8_cg_cp_rs1_edges_0x2_str) + 80000be4: 000cb203 ld x4,0(x25) + 80000be8: 01720c63 beq x4,x23,80000c00 + 80000bec: 3d5012ef jal x5,800027c0 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 800094e5 .word 0x800094e5 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x8000000000000000 + 80000c04: 0005bf83 ld x31,0(x11) + 80000c08: 00858593 addi x11,x11,8 + +0000000080000c0c : +Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000000: + rev8 x3, x31 # perform operation + 80000c0c: 6b8fd193 rev8 x3,x31 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000000, Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 000cb203 ld x4,0(x25) + 80000c14: 00320c63 beq x4,x3,80000c2c + 80000c18: 3a9012ef jal x5,800027c0 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 8000951e .word 0x8000951e + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x8000000000000001 + 80000c30: 0005b383 ld x7,0(x11) + 80000c34: 00858593 addi x11,x11,8 + +0000000080000c38 : +Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000001: + rev8 x20, x7 # perform operation + 80000c38: 6b83da13 rev8 x20,x7 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000001, Zbkb_rev8_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 000cb203 ld x4,0(x25) + 80000c40: 01420c63 beq x4,x20,80000c58 + 80000c44: 37d012ef jal x5,800027c0 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 80009566 .word 0x80009566 + 80000c54: 00000000 .word 0x00000000 + 80000c58: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x7fffffffffffffff + 80000c5c: 0005bc03 ld x24,0(x11) + 80000c60: 00858593 addi x11,x11,8 + +0000000080000c64 : +Zbkb_rev8_cg_cp_rs1_edges_0x7fffffffffffffff: + rev8 x17, x24 # perform operation + 80000c64: 6b8c5893 rev8 x17,x24 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_rev8_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_rev8_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 000cb203 ld x4,0(x25) + 80000c6c: 01120c63 beq x4,x17,80000c84 + 80000c70: 351012ef jal x5,800027c0 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 800095ae .word 0x800095ae + 80000c80: 00000000 .word 0x00000000 + 80000c84: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80000c88: 0005b503 ld x10,0(x11) + 80000c8c: 00858593 addi x11,x11,8 + +0000000080000c90 : +Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffffffffffe: + rev8 x24, x10 # perform operation + 80000c90: 6b855c13 rev8 x24,x10 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_rev8_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 000cb203 ld x4,0(x25) + 80000c98: 01820c63 beq x4,x24,80000cb0 + 80000c9c: 325012ef jal x5,800027c0 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 800095f6 .word 0x800095f6 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xffffffffffffffff + 80000cb4: 0005b383 ld x7,0(x11) + 80000cb8: 00858593 addi x11,x11,8 + +0000000080000cbc : +Zbkb_rev8_cg_cp_rs1_edges_0xffffffffffffffff: + rev8 x13, x7 # perform operation + 80000cbc: 6b83d693 rev8 x13,x7 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_rev8_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_rev8_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 000cb203 ld x4,0(x25) + 80000cc4: 00d20c63 beq x4,x13,80000cdc + 80000cc8: 2f9012ef jal x5,800027c0 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 8000963e .word 0x8000963e + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0xfffffffffffffffe + 80000ce0: 0005b403 ld x8,0(x11) + 80000ce4: 00858593 addi x11,x11,8 + +0000000080000ce8 : +Zbkb_rev8_cg_cp_rs1_edges_0xfffffffffffffffe: + rev8 x10, x8 # perform operation + 80000ce8: 6b845513 rev8 x10,x8 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 000cb203 ld x4,0(x25) + 80000cf0: 00a20c63 beq x4,x10,80000d08 + 80000cf4: 2cd012ef jal x5,800027c0 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009686 .word 0x80009686 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80000d0c: 0005b483 ld x9,0(x11) + 80000d10: 00858593 addi x11,x11,8 + +0000000080000d14 : +Zbkb_rev8_cg_cp_rs1_edges_0x5bbc887763ae86f2: + rev8 x20, x9 # perform operation + 80000d14: 6b84da13 rev8 x20,x9 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_rev8_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_rev8_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 000cb203 ld x4,0(x25) + 80000d1c: 01420c63 beq x4,x20,80000d34 + 80000d20: 2a1012ef jal x5,800027c0 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 800096ce .word 0x800096ce + 80000d30: 00000000 .word 0x00000000 + 80000d34: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80000d38: 0005b083 ld x1,0(x11) + 80000d3c: 00858593 addi x11,x11,8 + +0000000080000d40 : +Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + rev8 x14, x1 # perform operation + 80000d40: 6b80d713 rev8 x14,x1 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_rev8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 000cb203 ld x4,0(x25) + 80000d48: 00e20c63 beq x4,x14,80000d60 + 80000d4c: 275012ef jal x5,800027c0 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 80009716 .word 0x80009716 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x5555555555555555 + 80000d64: 0005b983 ld x19,0(x11) + 80000d68: 00858593 addi x11,x11,8 + +0000000080000d6c : +Zbkb_rev8_cg_cp_rs1_edges_0x5555555555555555: + rev8 x29, x19 # perform operation + 80000d6c: 6b89de93 rev8 x29,x19 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_rev8_cg_cp_rs1_edges_0x5555555555555555, Zbkb_rev8_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 000cb203 ld x4,0(x25) + 80000d74: 01d20c63 beq x4,x29,80000d8c + 80000d78: 249012ef jal x5,800027c0 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 8000975e .word 0x8000975e + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x00000000ffffffff + 80000d90: 0005ba83 ld x21,0(x11) + 80000d94: 00858593 addi x11,x11,8 + +0000000080000d98 : +Zbkb_rev8_cg_cp_rs1_edges_0xffffffff: + rev8 x31, x21 # perform operation + 80000d98: 6b8adf93 rev8 x31,x21 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rev8_cg_cp_rs1_edges_0xffffffff, Zbkb_rev8_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 000cb203 ld x4,0(x25) + 80000da0: 01f20c63 beq x4,x31,80000db8 + 80000da4: 21d012ef jal x5,800027c0 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 800097a6 .word 0x800097a6 + 80000db4: 00000000 .word 0x00000000 + 80000db8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x00000000fffffffe + 80000dbc: 0005ba83 ld x21,0(x11) + 80000dc0: 00858593 addi x11,x11,8 + +0000000080000dc4 : +Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe: + rev8 x16, x21 # perform operation + 80000dc4: 6b8ad813 rev8 x16,x21 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe, Zbkb_rev8_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 000cb203 ld x4,0(x25) + 80000dcc: 01020c63 beq x4,x16,80000de4 + 80000dd0: 1f1012ef jal x5,800027c0 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800097e6 .word 0x800097e6 + 80000de0: 00000000 .word 0x00000000 + 80000de4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x0000000100000000 + 80000de8: 0005b883 ld x17,0(x11) + 80000dec: 00858593 addi x11,x11,8 + +0000000080000df0 : +Zbkb_rev8_cg_cp_rs1_edges_0x100000000: + rev8 x8, x17 # perform operation + 80000df0: 6b88d413 rev8 x8,x17 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zbkb_rev8_cg_cp_rs1_edges_0x100000000, Zbkb_rev8_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 000cb203 ld x4,0(x25) + 80000df8: 00820c63 beq x4,x8,80000e10 + 80000dfc: 1c5012ef jal x5,800027c0 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 80009826 .word 0x80009826 + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x0000000100000001 + 80000e14: 0005b403 ld x8,0(x11) + 80000e18: 00858593 addi x11,x11,8 + +0000000080000e1c : +Zbkb_rev8_cg_cp_rs1_edges_0x100000001: + rev8 x31, x8 # perform operation + 80000e1c: 6b845f93 rev8 x31,x8 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_rev8_cg_cp_rs1_edges_0x100000001, Zbkb_rev8_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 000cb203 ld x4,0(x25) + 80000e24: 01f20c63 beq x4,x31,80000e3c + 80000e28: 199012ef jal x5,800027c0 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009867 .word 0x80009867 + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0xd94defced976f0ff + 80000e40: 0005b003 ld x0,0(x11) + 80000e44: 00858593 addi x11,x11,8 + +0000000080000e48 : +Zbkb_rev8_cg_cmp_rd_rs1_b0: + rev8 x0, x0 # perform operation + 80000e48: 6b805013 rev8 x0,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zbkb_rev8_cg_cmp_rd_rs1_b0, Zbkb_rev8_cg_cmp_rd_rs1_b0_str) + 80000e4c: 000cb203 ld x4,0(x25) + 80000e50: 00020c63 beq x4,x0,80000e68 + 80000e54: 16d012ef jal x5,800027c0 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 800098a8 .word 0x800098a8 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x2a1d00fa3ed40af2 + 80000e6c: 0005b083 ld x1,0(x11) + 80000e70: 00858593 addi x11,x11,8 + +0000000080000e74 : +Zbkb_rev8_cg_cmp_rd_rs1_b1: + rev8 x1, x1 # perform operation + 80000e74: 6b80d093 rev8 x1,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_rev8_cg_cmp_rd_rs1_b1, Zbkb_rev8_cg_cmp_rd_rs1_b1_str) + 80000e78: 000cb203 ld x4,0(x25) + 80000e7c: 00120c63 beq x4,x1,80000e94 + 80000e80: 141012ef jal x5,800027c0 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 800098de .word 0x800098de + 80000e90: 00000000 .word 0x00000000 + 80000e94: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0xb662bcabd4c5983c + 80000e98: 0005b103 ld x2,0(x11) + 80000e9c: 00858593 addi x11,x11,8 + +0000000080000ea0 : +Zbkb_rev8_cg_cmp_rd_rs1_b2: + rev8 x2, x2 # perform operation + 80000ea0: 6b815113 rev8 x2,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_rev8_cg_cmp_rd_rs1_b2, Zbkb_rev8_cg_cmp_rd_rs1_b2_str) + 80000ea4: 000cb203 ld x4,0(x25) + 80000ea8: 00220c63 beq x4,x2,80000ec0 + 80000eac: 115012ef jal x5,800027c0 + 80000eb0: 80000ea0 .word 0x80000ea0 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 80009914 .word 0x80009914 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x5576cb92691e06f0 + 80000ec4: 0005b183 ld x3,0(x11) + 80000ec8: 00858593 addi x11,x11,8 + +0000000080000ecc : +Zbkb_rev8_cg_cmp_rd_rs1_b3: + rev8 x3, x3 # perform operation + 80000ecc: 6b81d193 rev8 x3,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_rev8_cg_cmp_rd_rs1_b3, Zbkb_rev8_cg_cmp_rd_rs1_b3_str) + 80000ed0: 000cb203 ld x4,0(x25) + 80000ed4: 00320c63 beq x4,x3,80000eec + 80000ed8: 0e9012ef jal x5,800027c0 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 8000994a .word 0x8000994a + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000ef4: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x76ffb14e44ba903f + 80000ef8: 0005b203 ld x4,0(x11) + 80000efc: 00858593 addi x11,x11,8 + +0000000080000f00 : +Zbkb_rev8_cg_cmp_rd_rs1_b4: + rev8 x4, x4 # perform operation + 80000f00: 6b825213 rev8 x4,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zbkb_rev8_cg_cmp_rd_rs1_b4, Zbkb_rev8_cg_cmp_rd_rs1_b4_str) + 80000f04: 000cb383 ld x7,0(x25) + 80000f08: 00438c63 beq x7,x4,80000f20 + 80000f0c: 0cd0146f jal x8,800027d8 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 80009980 .word 0x80009980 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xd841c79b2465550f + 80000f24: 0005b283 ld x5,0(x11) + 80000f28: 00858593 addi x11,x11,8 + +0000000080000f2c : +Zbkb_rev8_cg_cmp_rd_rs1_b5: + rev8 x5, x5 # perform operation + 80000f2c: 6b82d293 rev8 x5,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zbkb_rev8_cg_cmp_rd_rs1_b5, Zbkb_rev8_cg_cmp_rd_rs1_b5_str) + 80000f30: 000cb383 ld x7,0(x25) + 80000f34: 00538c63 beq x7,x5,80000f4c + 80000f38: 0a10146f jal x8,800027d8 + 80000f3c: 80000f2c .word 0x80000f2c + 80000f40: 00000000 .word 0x00000000 + 80000f44: 800099b6 .word 0x800099b6 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x74f8fc442dcb4fb0 + 80000f50: 0005b303 ld x6,0(x11) + 80000f54: 00858593 addi x11,x11,8 + +0000000080000f58 : +Zbkb_rev8_cg_cmp_rd_rs1_b6: + rev8 x6, x6 # perform operation + 80000f58: 6b835313 rev8 x6,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zbkb_rev8_cg_cmp_rd_rs1_b6, Zbkb_rev8_cg_cmp_rd_rs1_b6_str) + 80000f5c: 000cb383 ld x7,0(x25) + 80000f60: 00638c63 beq x7,x6,80000f78 + 80000f64: 0750146f jal x8,800027d8 + 80000f68: 80000f58 .word 0x80000f58 + 80000f6c: 00000000 .word 0x00000000 + 80000f70: 800099ec .word 0x800099ec + 80000f74: 00000000 .word 0x00000000 + 80000f78: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f7c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f80: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x68fc8bd1da8b38da + 80000f84: 0005b383 ld x7,0(x11) + 80000f88: 00858593 addi x11,x11,8 + +0000000080000f8c : +Zbkb_rev8_cg_cmp_rd_rs1_b7: + rev8 x7, x7 # perform operation + 80000f8c: 6b83d393 rev8 x7,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkb_rev8_cg_cmp_rd_rs1_b7, Zbkb_rev8_cg_cmp_rd_rs1_b7_str) + 80000f90: 000cb203 ld x4,0(x25) + 80000f94: 00720c63 beq x4,x7,80000fac + 80000f98: 029012ef jal x5,800027c0 + 80000f9c: 80000f8c .word 0x80000f8c + 80000fa0: 00000000 .word 0x00000000 + 80000fa4: 80009a22 .word 0x80009a22 + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0xcf752906b50b52c5 + 80000fb0: 0005b403 ld x8,0(x11) + 80000fb4: 00858593 addi x11,x11,8 + +0000000080000fb8 : +Zbkb_rev8_cg_cmp_rd_rs1_b8: + rev8 x8, x8 # perform operation + 80000fb8: 6b845413 rev8 x8,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zbkb_rev8_cg_cmp_rd_rs1_b8, Zbkb_rev8_cg_cmp_rd_rs1_b8_str) + 80000fbc: 000cb203 ld x4,0(x25) + 80000fc0: 00820c63 beq x4,x8,80000fd8 + 80000fc4: 7fc012ef jal x5,800027c0 + 80000fc8: 80000fb8 .word 0x80000fb8 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 80009a58 .word 0x80009a58 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0xe9eedaf65c8a8163 + 80000fdc: 0005b483 ld x9,0(x11) + 80000fe0: 00858593 addi x11,x11,8 + +0000000080000fe4 : +Zbkb_rev8_cg_cmp_rd_rs1_b9: + rev8 x9, x9 # perform operation + 80000fe4: 6b84d493 rev8 x9,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zbkb_rev8_cg_cmp_rd_rs1_b9, Zbkb_rev8_cg_cmp_rd_rs1_b9_str) + 80000fe8: 000cb203 ld x4,0(x25) + 80000fec: 00920c63 beq x4,x9,80001004 + 80000ff0: 7d0012ef jal x5,800027c0 + 80000ff4: 80000fe4 .word 0x80000fe4 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 80009a8e .word 0x80009a8e + 80001000: 00000000 .word 0x00000000 + 80001004: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x3c4968975da961fc + 80001008: 0005b503 ld x10,0(x11) + 8000100c: 00858593 addi x11,x11,8 + +0000000080001010 : +Zbkb_rev8_cg_cmp_rd_rs1_b10: + rev8 x10, x10 # perform operation + 80001010: 6b855513 rev8 x10,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zbkb_rev8_cg_cmp_rd_rs1_b10, Zbkb_rev8_cg_cmp_rd_rs1_b10_str) + 80001014: 000cb203 ld x4,0(x25) + 80001018: 00a20c63 beq x4,x10,80001030 + 8000101c: 7a4012ef jal x5,800027c0 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80009ac4 .word 0x80009ac4 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008c8c93 addi x25,x25,8 + + mv x21, x11 # switch data pointer register to avoid conflict with test + 80001034: 00058a93 addi x21,x11,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xe87c555fdca3ddf3 + 80001038: 000ab583 ld x11,0(x21) + 8000103c: 008a8a93 addi x21,x21,8 + +0000000080001040 : +Zbkb_rev8_cg_cmp_rd_rs1_b11: + rev8 x11, x11 # perform operation + 80001040: 6b85d593 rev8 x11,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkb_rev8_cg_cmp_rd_rs1_b11, Zbkb_rev8_cg_cmp_rd_rs1_b11_str) + 80001044: 000cb203 ld x4,0(x25) + 80001048: 00b20c63 beq x4,x11,80001060 + 8000104c: 774012ef jal x5,800027c0 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009afb .word 0x80009afb + 8000105c: 00000000 .word 0x00000000 + 80001060: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x1e5d651e7be25263 + 80001064: 000ab603 ld x12,0(x21) + 80001068: 008a8a93 addi x21,x21,8 + +000000008000106c : +Zbkb_rev8_cg_cmp_rd_rs1_b12: + rev8 x12, x12 # perform operation + 8000106c: 6b865613 rev8 x12,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_rev8_cg_cmp_rd_rs1_b12, Zbkb_rev8_cg_cmp_rd_rs1_b12_str) + 80001070: 000cb203 ld x4,0(x25) + 80001074: 00c20c63 beq x4,x12,8000108c + 80001078: 748012ef jal x5,800027c0 + 8000107c: 8000106c .word 0x8000106c + 80001080: 00000000 .word 0x00000000 + 80001084: 80009b32 .word 0x80009b32 + 80001088: 00000000 .word 0x00000000 + 8000108c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xdadd762c11907546 + 80001090: 000ab683 ld x13,0(x21) + 80001094: 008a8a93 addi x21,x21,8 + +0000000080001098 : +Zbkb_rev8_cg_cmp_rd_rs1_b13: + rev8 x13, x13 # perform operation + 80001098: 6b86d693 rev8 x13,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_rev8_cg_cmp_rd_rs1_b13, Zbkb_rev8_cg_cmp_rd_rs1_b13_str) + 8000109c: 000cb203 ld x4,0(x25) + 800010a0: 00d20c63 beq x4,x13,800010b8 + 800010a4: 71c012ef jal x5,800027c0 + 800010a8: 80001098 .word 0x80001098 + 800010ac: 00000000 .word 0x00000000 + 800010b0: 80009b69 .word 0x80009b69 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x241cd8379c73871a + 800010bc: 000ab703 ld x14,0(x21) + 800010c0: 008a8a93 addi x21,x21,8 + +00000000800010c4 : +Zbkb_rev8_cg_cmp_rd_rs1_b14: + rev8 x14, x14 # perform operation + 800010c4: 6b875713 rev8 x14,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_rev8_cg_cmp_rd_rs1_b14, Zbkb_rev8_cg_cmp_rd_rs1_b14_str) + 800010c8: 000cb203 ld x4,0(x25) + 800010cc: 00e20c63 beq x4,x14,800010e4 + 800010d0: 6f0012ef jal x5,800027c0 + 800010d4: 800010c4 .word 0x800010c4 + 800010d8: 00000000 .word 0x00000000 + 800010dc: 80009ba0 .word 0x80009ba0 + 800010e0: 00000000 .word 0x00000000 + 800010e4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xd0fa8cc3ddbf2980 + 800010e8: 000ab783 ld x15,0(x21) + 800010ec: 008a8a93 addi x21,x21,8 + +00000000800010f0 : +Zbkb_rev8_cg_cmp_rd_rs1_b15: + rev8 x15, x15 # perform operation + 800010f0: 6b87d793 rev8 x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkb_rev8_cg_cmp_rd_rs1_b15, Zbkb_rev8_cg_cmp_rd_rs1_b15_str) + 800010f4: 000cb203 ld x4,0(x25) + 800010f8: 00f20c63 beq x4,x15,80001110 + 800010fc: 6c4012ef jal x5,800027c0 + 80001100: 800010f0 .word 0x800010f0 + 80001104: 00000000 .word 0x00000000 + 80001108: 80009bd7 .word 0x80009bd7 + 8000110c: 00000000 .word 0x00000000 + 80001110: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x6cc73bf811aaba5f + 80001114: 000ab803 ld x16,0(x21) + 80001118: 008a8a93 addi x21,x21,8 + +000000008000111c : +Zbkb_rev8_cg_cmp_rd_rs1_b16: + rev8 x16, x16 # perform operation + 8000111c: 6b885813 rev8 x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_rev8_cg_cmp_rd_rs1_b16, Zbkb_rev8_cg_cmp_rd_rs1_b16_str) + 80001120: 000cb203 ld x4,0(x25) + 80001124: 01020c63 beq x4,x16,8000113c + 80001128: 698012ef jal x5,800027c0 + 8000112c: 8000111c .word 0x8000111c + 80001130: 00000000 .word 0x00000000 + 80001134: 80009c0e .word 0x80009c0e + 80001138: 00000000 .word 0x00000000 + 8000113c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xa36b6fbe75ff8e2d + 80001140: 000ab883 ld x17,0(x21) + 80001144: 008a8a93 addi x21,x21,8 + +0000000080001148 : +Zbkb_rev8_cg_cmp_rd_rs1_b17: + rev8 x17, x17 # perform operation + 80001148: 6b88d893 rev8 x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_rev8_cg_cmp_rd_rs1_b17, Zbkb_rev8_cg_cmp_rd_rs1_b17_str) + 8000114c: 000cb203 ld x4,0(x25) + 80001150: 01120c63 beq x4,x17,80001168 + 80001154: 66c012ef jal x5,800027c0 + 80001158: 80001148 .word 0x80001148 + 8000115c: 00000000 .word 0x00000000 + 80001160: 80009c45 .word 0x80009c45 + 80001164: 00000000 .word 0x00000000 + 80001168: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xd31ffee222689c28 + 8000116c: 000ab903 ld x18,0(x21) + 80001170: 008a8a93 addi x21,x21,8 + +0000000080001174 : +Zbkb_rev8_cg_cmp_rd_rs1_b18: + rev8 x18, x18 # perform operation + 80001174: 6b895913 rev8 x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_rev8_cg_cmp_rd_rs1_b18, Zbkb_rev8_cg_cmp_rd_rs1_b18_str) + 80001178: 000cb203 ld x4,0(x25) + 8000117c: 01220c63 beq x4,x18,80001194 + 80001180: 640012ef jal x5,800027c0 + 80001184: 80001174 .word 0x80001174 + 80001188: 00000000 .word 0x00000000 + 8000118c: 80009c7c .word 0x80009c7c + 80001190: 00000000 .word 0x00000000 + 80001194: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xb2c3a4d273e7d7e7 + 80001198: 000ab983 ld x19,0(x21) + 8000119c: 008a8a93 addi x21,x21,8 + +00000000800011a0 : +Zbkb_rev8_cg_cmp_rd_rs1_b19: + rev8 x19, x19 # perform operation + 800011a0: 6b89d993 rev8 x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkb_rev8_cg_cmp_rd_rs1_b19, Zbkb_rev8_cg_cmp_rd_rs1_b19_str) + 800011a4: 000cb203 ld x4,0(x25) + 800011a8: 01320c63 beq x4,x19,800011c0 + 800011ac: 614012ef jal x5,800027c0 + 800011b0: 800011a0 .word 0x800011a0 + 800011b4: 00000000 .word 0x00000000 + 800011b8: 80009cb3 .word 0x80009cb3 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x10de3e96e47686b6 + 800011c4: 000aba03 ld x20,0(x21) + 800011c8: 008a8a93 addi x21,x21,8 + +00000000800011cc : +Zbkb_rev8_cg_cmp_rd_rs1_b20: + rev8 x20, x20 # perform operation + 800011cc: 6b8a5a13 rev8 x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_rev8_cg_cmp_rd_rs1_b20, Zbkb_rev8_cg_cmp_rd_rs1_b20_str) + 800011d0: 000cb203 ld x4,0(x25) + 800011d4: 01420c63 beq x4,x20,800011ec + 800011d8: 5e8012ef jal x5,800027c0 + 800011dc: 800011cc .word 0x800011cc + 800011e0: 00000000 .word 0x00000000 + 800011e4: 80009ceb .word 0x80009ceb + 800011e8: 00000000 .word 0x00000000 + 800011ec: 008c8c93 addi x25,x25,8 + + mv x3, x21 # switch data pointer register to avoid conflict with test + 800011f0: 000a8193 addi x3,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x02b1b538c12bc876 + 800011f4: 0001ba83 ld x21,0(x3) + 800011f8: 00818193 addi x3,x3,8 + +00000000800011fc : +Zbkb_rev8_cg_cmp_rd_rs1_b21: + rev8 x21, x21 # perform operation + 800011fc: 6b8ada93 rev8 x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_rev8_cg_cmp_rd_rs1_b21, Zbkb_rev8_cg_cmp_rd_rs1_b21_str) + 80001200: 000cb203 ld x4,0(x25) + 80001204: 01520c63 beq x4,x21,8000121c + 80001208: 5b8012ef jal x5,800027c0 + 8000120c: 800011fc .word 0x800011fc + 80001210: 00000000 .word 0x00000000 + 80001214: 80009d23 .word 0x80009d23 + 80001218: 00000000 .word 0x00000000 + 8000121c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x0cbbe846562a3e8c + 80001220: 0001bb03 ld x22,0(x3) + 80001224: 00818193 addi x3,x3,8 + +0000000080001228 : +Zbkb_rev8_cg_cmp_rd_rs1_b22: + rev8 x22, x22 # perform operation + 80001228: 6b8b5b13 rev8 x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_rev8_cg_cmp_rd_rs1_b22, Zbkb_rev8_cg_cmp_rd_rs1_b22_str) + 8000122c: 000cb203 ld x4,0(x25) + 80001230: 01620c63 beq x4,x22,80001248 + 80001234: 58c012ef jal x5,800027c0 + 80001238: 80001228 .word 0x80001228 + 8000123c: 00000000 .word 0x00000000 + 80001240: 80009d5b .word 0x80009d5b + 80001244: 00000000 .word 0x00000000 + 80001248: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x8f7c9e8307f43ae5 + 8000124c: 0001bb83 ld x23,0(x3) + 80001250: 00818193 addi x3,x3,8 + +0000000080001254 : +Zbkb_rev8_cg_cmp_rd_rs1_b23: + rev8 x23, x23 # perform operation + 80001254: 6b8bdb93 rev8 x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_rev8_cg_cmp_rd_rs1_b23, Zbkb_rev8_cg_cmp_rd_rs1_b23_str) + 80001258: 000cb203 ld x4,0(x25) + 8000125c: 01720c63 beq x4,x23,80001274 + 80001260: 560012ef jal x5,800027c0 + 80001264: 80001254 .word 0x80001254 + 80001268: 00000000 .word 0x00000000 + 8000126c: 80009d93 .word 0x80009d93 + 80001270: 00000000 .word 0x00000000 + 80001274: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xe6d86f5a27d88c8d + 80001278: 0001bc03 ld x24,0(x3) + 8000127c: 00818193 addi x3,x3,8 + +0000000080001280 : +Zbkb_rev8_cg_cmp_rd_rs1_b24: + rev8 x24, x24 # perform operation + 80001280: 6b8c5c13 rev8 x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_rev8_cg_cmp_rd_rs1_b24, Zbkb_rev8_cg_cmp_rd_rs1_b24_str) + 80001284: 000cb203 ld x4,0(x25) + 80001288: 01820c63 beq x4,x24,800012a0 + 8000128c: 534012ef jal x5,800027c0 + 80001290: 80001280 .word 0x80001280 + 80001294: 00000000 .word 0x00000000 + 80001298: 80009dcb .word 0x80009dcb + 8000129c: 00000000 .word 0x00000000 + 800012a0: 008c8c93 addi x25,x25,8 + + mv x12, x25 # switch signature pointer register to avoid conflict with test + 800012a4: 000c8613 addi x12,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5922bf99a197e27b + 800012a8: 0001bc83 ld x25,0(x3) + 800012ac: 00818193 addi x3,x3,8 + +00000000800012b0 : +Zbkb_rev8_cg_cmp_rd_rs1_b25: + rev8 x25, x25 # perform operation + 800012b0: 6b8cdc93 rev8 x25,x25 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkb_rev8_cg_cmp_rd_rs1_b25, Zbkb_rev8_cg_cmp_rd_rs1_b25_str) + 800012b4: 00063203 ld x4,0(x12) + 800012b8: 01920c63 beq x4,x25,800012d0 + 800012bc: 504012ef jal x5,800027c0 + 800012c0: 800012b0 .word 0x800012b0 + 800012c4: 00000000 .word 0x00000000 + 800012c8: 80009e03 .word 0x80009e03 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xa534941157940e70 + 800012d4: 0001bd03 ld x26,0(x3) + 800012d8: 00818193 addi x3,x3,8 + +00000000800012dc : +Zbkb_rev8_cg_cmp_rd_rs1_b26: + rev8 x26, x26 # perform operation + 800012dc: 6b8d5d13 rev8 x26,x26 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkb_rev8_cg_cmp_rd_rs1_b26, Zbkb_rev8_cg_cmp_rd_rs1_b26_str) + 800012e0: 00063203 ld x4,0(x12) + 800012e4: 01a20c63 beq x4,x26,800012fc + 800012e8: 4d8012ef jal x5,800027c0 + 800012ec: 800012dc .word 0x800012dc + 800012f0: 00000000 .word 0x00000000 + 800012f4: 80009e3b .word 0x80009e3b + 800012f8: 00000000 .word 0x00000000 + 800012fc: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xec7b324037bc0c4c + 80001300: 0001bd83 ld x27,0(x3) + 80001304: 00818193 addi x3,x3,8 + +0000000080001308 : +Zbkb_rev8_cg_cmp_rd_rs1_b27: + rev8 x27, x27 # perform operation + 80001308: 6b8ddd93 rev8 x27,x27 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkb_rev8_cg_cmp_rd_rs1_b27, Zbkb_rev8_cg_cmp_rd_rs1_b27_str) + 8000130c: 00063203 ld x4,0(x12) + 80001310: 01b20c63 beq x4,x27,80001328 + 80001314: 4ac012ef jal x5,800027c0 + 80001318: 80001308 .word 0x80001308 + 8000131c: 00000000 .word 0x00000000 + 80001320: 80009e73 .word 0x80009e73 + 80001324: 00000000 .word 0x00000000 + 80001328: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xb586533a3c2a7495 + 8000132c: 0001be03 ld x28,0(x3) + 80001330: 00818193 addi x3,x3,8 + +0000000080001334 : +Zbkb_rev8_cg_cmp_rd_rs1_b28: + rev8 x28, x28 # perform operation + 80001334: 6b8e5e13 rev8 x28,x28 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkb_rev8_cg_cmp_rd_rs1_b28, Zbkb_rev8_cg_cmp_rd_rs1_b28_str) + 80001338: 00063203 ld x4,0(x12) + 8000133c: 01c20c63 beq x4,x28,80001354 + 80001340: 480012ef jal x5,800027c0 + 80001344: 80001334 .word 0x80001334 + 80001348: 00000000 .word 0x00000000 + 8000134c: 80009eab .word 0x80009eab + 80001350: 00000000 .word 0x00000000 + 80001354: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xc33c2f1693d73bce + 80001358: 0001be83 ld x29,0(x3) + 8000135c: 00818193 addi x3,x3,8 + +0000000080001360 : +Zbkb_rev8_cg_cmp_rd_rs1_b29: + rev8 x29, x29 # perform operation + 80001360: 6b8ede93 rev8 x29,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkb_rev8_cg_cmp_rd_rs1_b29, Zbkb_rev8_cg_cmp_rd_rs1_b29_str) + 80001364: 00063203 ld x4,0(x12) + 80001368: 01d20c63 beq x4,x29,80001380 + 8000136c: 454012ef jal x5,800027c0 + 80001370: 80001360 .word 0x80001360 + 80001374: 00000000 .word 0x00000000 + 80001378: 80009ee3 .word 0x80009ee3 + 8000137c: 00000000 .word 0x00000000 + 80001380: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xe525dddc3a5a95e2 + 80001384: 0001bf03 ld x30,0(x3) + 80001388: 00818193 addi x3,x3,8 + +000000008000138c : +Zbkb_rev8_cg_cmp_rd_rs1_b30: + rev8 x30, x30 # perform operation + 8000138c: 6b8f5f13 rev8 x30,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkb_rev8_cg_cmp_rd_rs1_b30, Zbkb_rev8_cg_cmp_rd_rs1_b30_str) + 80001390: 00063203 ld x4,0(x12) + 80001394: 01e20c63 beq x4,x30,800013ac + 80001398: 428012ef jal x5,800027c0 + 8000139c: 8000138c .word 0x8000138c + 800013a0: 00000000 .word 0x00000000 + 800013a4: 80009f1b .word 0x80009f1b + 800013a8: 00000000 .word 0x00000000 + 800013ac: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x19aead01220712b4 + 800013b0: 0001bf83 ld x31,0(x3) + 800013b4: 00818193 addi x3,x3,8 + +00000000800013b8 : +Zbkb_rev8_cg_cmp_rd_rs1_b31: + rev8 x31, x31 # perform operation + 800013b8: 6b8fdf93 rev8 x31,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_rev8_cg_cmp_rd_rs1_b31, Zbkb_rev8_cg_cmp_rd_rs1_b31_str) + 800013bc: 00063203 ld x4,0(x12) + 800013c0: 01f20c63 beq x4,x31,800013d8 + 800013c4: 3fc012ef jal x5,800027c0 + 800013c8: 800013b8 .word 0x800013b8 + 800013cc: 00000000 .word 0x00000000 + 800013d0: 80009f53 .word 0x80009f53 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 00860613 addi x12,x12,8 + + mv x2, x12 # restore signature pointer to default register for teardown + 800013dc: 00060113 addi x2,x12,0 + +00000000800013e0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e0: 00000513 addi x10,x0,0 + 800013e4: 00000073 ecall + 800013e8: fff00513 addi x10,x0,-1 + 800013ec: 25800413 addi x8,x0,600 + +00000000800013f0 : + 800013f0: 34002373 csrrs x6,mscratch,x0 + +00000000800013f4 : + 800013f4: 2b833383 ld x7,696(x6) + +00000000800013f8 : + 800013f8: 2a033383 ld x7,672(x6) + +00000000800013fc : + 800013fc: 2d033483 ld x9,720(x6) + 80001400: 34049073 csrrw x0,mscratch,x9 + +0000000080001404 : + 80001404: 2c833483 ld x9,712(x6) + 80001408: 305493f3 csrrw x7,mtvec,x9 + 8000140c: ffc4f493 andi x9,x9,-4 + 80001410: ffc3f393 andi x7,x7,-4 + 80001414: 00749e63 bne x9,x7,80001430 + +0000000080001418 : + 80001418: 00030493 addi x9,x6,0 + +000000008000141c : + 8000141c: 0004a783 lw x15,0(x9) + 80001420: 00f3a023 sw x15,0(x7) + 80001424: 00438393 addi x7,x7,4 + 80001428: 00448493 addi x9,x9,4 + 8000142c: fe83c8e3 blt x7,x8,8000141c + 80001430: 0000100f fence.i + +0000000080001434 : + 80001434: 00000013 addi x0,x0,0 + 80001438: 00000013 addi x0,x0,0 + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 22e50513 addi x10,x10,558 # 8000a6ae + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 22750513 addi x10,x10,551 # 8000a6e7 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 24750513 addi x10,x10,583 # 8000a747 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: db250513 addi x10,x10,-590 # 8000b2f2 + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: ba038393 addi x7,x7,-1120 # 8000c160 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: b5040413 addi x8,x8,-1200 # 8000c150 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000a89b .word 0x8000a89b + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a709 .word 0x8000a709 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: ff450513 addi x10,x10,-12 # 8000a674 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: fee50513 addi x10,x10,-18 # 8000a6ae + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc1ff06f jal x0,800013e0 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: c9dff06f jal x0,800013e0 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9430313 addi x6,x6,-1388 # 80001434 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 18950513 addi x10,x10,393 # 8000bd29 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 51850513 addi x10,x10,1304 # 8000a0f8 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: b9050513 addi x10,x10,-1136 # 8000a7b0 + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: a4e50513 addi x10,x10,-1458 # 8000a6ae + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 07848493 addi x9,x9,120 # 8000a0d8 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00027417 auipc x8,0x27 + 800020a4: 58840413 addi x8,x8,1416 # 80029628 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000a8b2 .word 0x8000a8b2 + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000a9b4 .word 0x8000a9b4 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000aaaf .word 0x8000aaaf + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000aba2 .word 0x8000aba2 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000ad15 .word 0x8000ad15 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00007217 auipc x4,0x7 + 800027c4: 7d020213 addi x4,x4,2000 # 80009f90 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00007397 auipc x7,0x7 + 800027dc: 7b838393 addi x7,x7,1976 # 80009f90 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00007697 auipc x13,0x7 + 80002804: 79068693 addi x13,x13,1936 # 80009f90 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00007497 auipc x9,0x7 + 8000282c: 76848493 addi x9,x9,1896 # 80009f90 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00007497 auipc x9,0x7 + 800028d0: 6c44a483 lw x9,1732(x9) # 80009f90 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 3f040413 addi x8,x8,1008 # 8000bd70 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: c7040413 addi x8,x8,-912 # 80029630 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00007497 auipc x9,0x7 + 80002a04: 6b848493 addi x9,x9,1720 # 8000a0b8 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00007497 auipc x9,0x7 + 80002a44: 67848493 addi x9,x9,1656 # 8000a0b8 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00007817 auipc x16,0x7 + 80002a80: 64c80813 addi x16,x16,1612 # 8000a0c8 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00007817 auipc x16,0x7 + 80002aa0: 62c80813 addi x16,x16,1580 # 8000a0c8 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: df338393 addi x7,x7,-525 # 8000a89b + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00007817 auipc x16,0x7 + 80002abc: 60880813 addi x16,x16,1544 # 8000a0c0 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: dee38393 addi x7,x7,-530 # 8000a8b2 + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: ed838393 addi x7,x7,-296 # 8000a9b4 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: fbb38393 addi x7,x7,-69 # 8000aaaf + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 09638393 addi x7,x7,150 # 8000aba2 + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 1f138393 addi x7,x7,497 # 8000ad15 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 15d38393 addi x7,x7,349 # 8000ac99 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 18338393 addi x7,x7,387 # 8000acd7 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: d8638393 addi x7,x7,-634 # 8000a8f2 + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: e6e38393 addi x7,x7,-402 # 8000a9f2 + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: f4f38393 addi x7,x7,-177 # 8000aaeb + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 02b38393 addi x7,x7,43 # 8000abdf + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 18438393 addi x7,x7,388 # 8000ad50 + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: d4e38393 addi x7,x7,-690 # 8000a932 + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: e3438393 addi x7,x7,-460 # 8000aa30 + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: f1338393 addi x7,x7,-237 # 8000ab27 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: ff038393 addi x7,x7,-16 # 8000ac1c + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 14738393 addi x7,x7,327 # 8000ad8b + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: d1738393 addi x7,x7,-745 # 8000a973 + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: dfb38393 addi x7,x7,-517 # 8000aa6f + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: ed838393 addi x7,x7,-296 # 8000ab64 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: fb638393 addi x7,x7,-74 # 8000ac5a + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 10b38393 addi x7,x7,267 # 8000adc7 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 13038393 addi x7,x7,304 # 8000ae04 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 16738393 addi x7,x7,359 # 8000ae53 + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 24a38393 addi x7,x7,586 # 8000af4e + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 32e38393 addi x7,x7,814 # 8000b04a + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 38480813 addi x16,x16,900 # 8000a0c0 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 37480813 addi x16,x16,884 # 8000a0c0 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 36c80813 addi x16,x16,876 # 8000a0c4 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 35880813 addi x16,x16,856 # 8000a0c0 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: 8ee50513 addi x10,x10,-1810 # 8000a6ae + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: 8e750513 addi x10,x10,-1817 # 8000a6e7 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: 95e50513 addi x10,x10,-1698 # 8000a79e + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 24853503 ld x10,584(x10) # 8000a0b0 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: 93050513 addi x10,x10,-1744 # 8000a7b0 + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 0e852503 lw x10,232(x10) # 80009f90 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: 8f250513 addi x10,x10,-1806 # 8000a7b2 + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 1a852503 lw x10,424(x10) # 8000a090 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 1d850513 addi x10,x10,472 # 8000a0f8 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: 86650513 addi x10,x10,-1946 # 8000a7c6 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 11053503 ld x10,272(x10) # 8000a098 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 15850513 addi x10,x10,344 # 8000a0f8 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 21d50513 addi x10,x10,541 # 8000b1fd + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: f8852503 lw x10,-120(x10) # 80009f90 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 0d860613 addi x12,x12,216 # 8000a0f8 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 04c52503 lw x10,76(x10) # 8000a094 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 29350513 addi x10,x10,659 # 8000b313 + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 03860613 addi x12,x12,56 # 8000a0f8 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: fac52503 lw x10,-84(x10) # 8000a094 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: ff860613 addi x12,x12,-8 # 8000a0f8 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: f6c52503 lw x10,-148(x10) # 8000a094 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 0b650513 addi x10,x10,182 # 8000b1f6 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: f7850513 addi x10,x10,-136 # 8000a0f8 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 04e50513 addi x10,x10,78 # 8000b20e + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: da852503 lw x10,-600(x10) # 80009f90 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: ea853503 ld x10,-344(x10) # 8000a0a0 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: e9453503 ld x10,-364(x10) # 8000a0a0 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: ed850513 addi x10,x10,-296 # 8000a0f8 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: e7052503 lw x10,-400(x10) # 8000a0b8 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: fc550513 addi x10,x10,-59 # 8000b225 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: d0852503 lw x10,-760(x10) # 80009f90 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: e1053503 ld x10,-496(x10) # 8000a0a8 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: dfc53503 ld x10,-516(x10) # 8000a0a8 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: e3850513 addi x10,x10,-456 # 8000a0f8 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: f3c50513 addi x10,x10,-196 # 8000b23c + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: d8053503 ld x10,-640(x10) # 8000a0a8 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: db850513 addi x10,x10,-584 # 8000a0f8 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: f1a50513 addi x10,x10,-230 # 8000b29a + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: d0053503 ld x10,-768(x10) # 8000a0a8 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: d3850513 addi x10,x10,-712 # 8000a0f8 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: cd442403 lw x8,-812(x8) # 8000a0c0 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: f3f50513 addi x10,x10,-193 # 8000b33f + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: f2b50513 addi x10,x10,-213 # 8000b36b + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: c6080813 addi x16,x16,-928 # 8000a0c8 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 33050513 addi x10,x10,816 # 8000a7b0 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: ebb50513 addi x10,x10,-325 # 8000b37b + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: bc053503 ld x10,-1088(x10) # 8000a0a8 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: bf850513 addi x10,x10,-1032 # 8000a0f8 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: e6650513 addi x10,x10,-410 # 8000b3a6 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: b3853503 ld x10,-1224(x10) # 8000a0a0 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: b7850513 addi x10,x10,-1160 # 8000a0f8 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: af833303 ld x6,-1288(x6) # 8000a0a0 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: af83b383 ld x7,-1288(x7) # 8000a0a8 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: e1550513 addi x10,x10,-491 # 8000b3d5 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: e3d50513 addi x10,x10,-451 # 8000b43d + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: a7833303 ld x6,-1416(x6) # 8000a0a0 + 80003630: 00007397 auipc x7,0x7 + 80003634: a783b383 ld x7,-1416(x7) # 8000a0a8 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: a9850513 addi x10,x10,-1384 # 8000a0f8 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: dc450513 addi x10,x10,-572 # 8000b464 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: d2150513 addi x10,x10,-735 # 8000b401 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: d1d50513 addi x10,x10,-739 # 8000b43d + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: 96033303 ld x6,-1696(x6) # 8000a0a8 + 80003750: 00007397 auipc x7,0x7 + 80003754: 9503b383 ld x7,-1712(x7) # 8000a0a0 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: 97850513 addi x10,x10,-1672 # 8000a0f8 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: d8c50513 addi x10,x10,-628 # 8000b54c + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: e3350513 addi x10,x10,-461 # 8000b633 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: 89c52503 lw x10,-1892(x10) # 8000a0c4 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: e0f50513 addi x10,x10,-497 # 8000b66f + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: dad50513 addi x10,x10,-595 # 8000b64d + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: d7550513 addi x10,x10,-651 # 8000b655 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: d3d50513 addi x10,x10,-707 # 8000b65d + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: d0650513 addi x10,x10,-762 # 8000b666 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: cd850513 addi x10,x10,-808 # 8000b678 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00006517 auipc x10,0x6 + 800039cc: 6f852503 lw x10,1784(x10) # 8000a0c0 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: daf50513 addi x10,x10,-593 # 8000b7cf + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: c3250513 addi x10,x10,-974 # 8000b692 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: c2350513 addi x10,x10,-989 # 8000b6c3 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: c0350513 addi x10,x10,-1021 # 8000b6e3 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: be150513 addi x10,x10,-1055 # 8000b701 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: bc050513 addi x10,x10,-1088 # 8000b720 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: ba850513 addi x10,x10,-1112 # 8000b748 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: b9450513 addi x10,x10,-1132 # 8000b774 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: b8050513 addi x10,x10,-1152 # 8000b7a0 + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: b7e50513 addi x10,x10,-1154 # 8000b7de + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 42053503 ld x10,1056(x10) # 8000a0a8 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 45850513 addi x10,x10,1112 # 8000a0f8 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: b1550513 addi x10,x10,-1259 # 8000b7f5 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 39853503 ld x10,920(x10) # 8000a0a0 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 3d850513 addi x10,x10,984 # 8000a0f8 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 37852503 lw x10,888(x10) # 8000a0c0 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: aac50513 addi x10,x10,-1364 # 8000b80c + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 32053503 ld x10,800(x10) # 8000a0a8 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: a8350513 addi x10,x10,-1405 # 8000b823 + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 2d853503 ld x10,728(x10) # 8000a0a0 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 2dc52503 lw x10,732(x10) # 8000a0c0 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: a9950513 addi x10,x10,-1383 # 8000b899 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: b2f50513 addi x10,x10,-1233 # 8000b96f + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: be250513 addi x10,x10,-1054 # 8000ba62 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: c9d50513 addi x10,x10,-867 # 8000bb5d + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: d4450513 addi x10,x10,-700 # 8000bc44 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: 91150513 addi x10,x10,-1775 # 8000b851 + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 17063603 ld x12,368(x12) # 8000a0d8 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: 8ba50513 addi x10,x10,-1862 # 8000a83a + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 11850513 addi x10,x10,280 # 8000a0f8 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 10058593 addi x11,x11,256 # 8000a120 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 19058593 addi x11,x11,400 # 8000a1e0 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00006517 auipc x10,0x6 + 80004084: 5de50513 addi x10,x10,1502 # 8000a65e + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 23250513 addi x10,x10,562 # 8000b2f2 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: fe060613 addi x12,x12,-32 # 8000a0d0 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00006517 auipc x10,0x6 + 80004104: 75b50513 addi x10,x10,1883 # 8000a85b + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: fb053503 ld x10,-80(x10) # 8000a0d8 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: fb850513 addi x10,x10,-72 # 8000a0f8 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00006517 auipc x10,0x6 + 80004184: 6eb50513 addi x10,x10,1771 # 8000a86b + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: f3853503 ld x10,-200(x10) # 8000a0e0 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: f3850513 addi x10,x10,-200 # 8000a0f8 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00006517 auipc x10,0x6 + 80004204: 67b50513 addi x10,x10,1659 # 8000a87b + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: ec053503 ld x10,-320(x10) # 8000a0e8 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: eb850513 addi x10,x10,-328 # 8000a0f8 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00006517 auipc x10,0x6 + 80004284: 60b50513 addi x10,x10,1547 # 8000a88b + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: e4853503 ld x10,-440(x10) # 8000a0f0 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: e3850513 addi x10,x10,-456 # 8000a0f8 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: de860613 addi x12,x12,-536 # 8000a0d0 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: df860613 addi x12,x12,-520 # 8000a0f8 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 34830313 addi x6,x6,840 # 800013e0 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33030313 addi x6,x6,816 # 800013e0 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 31830313 addi x6,x6,792 # 800013e0 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b078793 addi x15,x15,432 # 800013f0 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: 89010113 addi x2,x2,-1904 # 8000bd70 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b31b .word 0x8000b31b + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 11828293 addi x5,x5,280 # 80029700 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 0f828293 addi x5,x5,248 # 80029700 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-rol-00.elf.objdump b/riscv-tests/rv64-Zbkb-rol-00.elf.objdump new file mode 100644 index 0000000..d31ba04 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-rol-00.elf.objdump @@ -0,0 +1,17096 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rol-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rol-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c310 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038400 0000000080038400 00037400 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, 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Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e6c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +000000008001245d l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str +0000000080002ea0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2 +00000000800124bc l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str +0000000080002ed4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000 +000000008001251b l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str +0000000080002f08 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001 +0000000080012589 l .data 0000000000000000 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Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034b8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013128 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034ec l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +0000000080013187 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003520 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800131e6 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +0000000080003554 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +0000000080013245 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +0000000080003588 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800132b3 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035bc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080013321 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035f0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +000000008001338f l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080003624 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +00000000800133fd l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003658 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +000000008001346b l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +000000008000368c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800134d9 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036c0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013547 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036f4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +00000000800135b5 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +0000000080003728 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +0000000080013623 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +000000008000375c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +0000000080013689 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003790 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +00000000800136ef l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037c4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013756 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037f8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +00000000800137bd l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +000000008000382c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +000000008001381c l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003860 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +000000008001387b l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003894 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +00000000800138da l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038c8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080013948 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038fc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +00000000800139b6 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003930 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080013a24 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +0000000080003964 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080013a92 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +0000000080003998 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080013b00 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039cc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080013b6e l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +0000000080003a00 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013bdc l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003a34 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555 +0000000080013c4a l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str +0000000080003a68 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff +0000000080013cb8 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str +0000000080003a9c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe +0000000080013d1e l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str +0000000080003ad0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000 +0000000080013d84 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str +0000000080003b04 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001 +0000000080013deb l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str +0000000080003b38 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0 +0000000080013e52 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str +0000000080003b6c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1 +0000000080013eb1 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str +0000000080003ba0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2 +0000000080013f10 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str +0000000080003bd4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000 +0000000080013f6f l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str +0000000080003c08 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001 +0000000080013fdd l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str +0000000080003c3c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff +000000008001404b l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str +0000000080003c70 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe +00000000800140b9 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str +0000000080003ca4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff +0000000080014127 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str +0000000080003cd8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe +0000000080014195 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003d0c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +0000000080014203 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d40 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014271 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d74 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +00000000800142df l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003da8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +000000008001434d l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003ddc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +00000000800143b3 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e10 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +0000000080014419 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e44 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +0000000080014480 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e78 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0 +00000000800144e7 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str +0000000080003eac l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1 +0000000080014546 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str +0000000080003ee0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2 +00000000800145a5 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str +0000000080003f14 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +0000000080014604 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f48 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +0000000080014672 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f7c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +00000000800146e0 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fb0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +000000008001474e l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fe4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +00000000800147bc l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004018 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +000000008001482a l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +000000008000404c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014898 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004080 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014906 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040b4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014974 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +00000000800149e2 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +000000008000411c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014a48 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004150 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014aae l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +0000000080004184 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001 +0000000080014b15 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str +00000000800041b8 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +0000000080014b7c l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +00000000800041ec l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +0000000080014bd3 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +0000000080004220 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +0000000080014c2a l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +0000000080004254 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000 +0000000080014c81 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str +0000000080004288 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001 +0000000080014ce7 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str +00000000800042bc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff +0000000080014d4d l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str +00000000800042f0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe +0000000080014db3 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str +0000000080004324 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff +0000000080014e19 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str +0000000080004358 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe +0000000080014e7f l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str +000000008000438c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2 +0000000080014ee5 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str +00000000800043c0 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014f4b l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800043f4 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555 +0000000080014fb1 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str +0000000080004428 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +0000000080015017 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +000000008000445c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +0000000080015075 l .data 0000000000000000 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Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe +00000000800153c8 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str +0000000080004664 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff +000000008001542e l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str +0000000080004698 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe +0000000080015494 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str +00000000800046cc l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2 +00000000800154fa l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080004700 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080015560 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004734 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555 +00000000800155c6 l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str +0000000080004768 l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +000000008001562c l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +000000008000479c l .text.rvtest 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +000000008001568a l .data 0000000000000000 Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +00000000800047d0 l .text.rvtest 0000000000000000 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+0000000080038400 g .tohost 0000000000000000 tohost +0000000080006bf0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xbd81421cc397e9e5 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xf66fc36daeba9655 + 80000048: 0001b783 ld x15,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_rol_cg_cp_rs1_b0: + rol x9, x0, x15 # perform operation + 80000050: 60f014b3 rol x9,x0,x15 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zbkb_rol_cg_cp_rs1_b0, Zbkb_rol_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00920c63 beq x4,x9,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x3d99d0b2aa43defe + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xd6f1cda183a3e5eb + 8000007c: 0001b983 ld x19,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_rol_cg_cp_rs1_b1: + rol x20, x1, x19 # perform operation + 80000084: 61309a33 rol x20,x1,x19 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkb_rol_cg_cp_rs1_b1, Zbkb_rol_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01420c63 beq x4,x20,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a0 .word 0x8000e4a0 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x27, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010d93 addi x27,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xdf411278b82e7449 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xdafeb82e1e28a1e8 + 800000b4: 0001bc83 ld x25,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_rol_cg_cp_rs1_b2: + rol x17, x2, x25 # perform operation + 800000bc: 619118b3 rol x17,x2,x25 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zbkb_rol_cg_cp_rs1_b2, Zbkb_rol_cg_cp_rs1_b2_str) + 800000c0: 000db203 ld x4,0(x27) + 800000c4: 01120c63 beq x4,x17,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d0 .word 0x8000e4d0 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008d8d93 addi x27,x27,8 + + mv x12, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018613 addi x12,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x76aadfa0534275c1 + 800000e4: 00063183 ld x3,0(x12) + 800000e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xbb61a2629be8ee04 + 800000ec: 00063583 ld x11,0(x12) + 800000f0: 00860613 addi x12,x12,8 + +00000000800000f4 : +Zbkb_rol_cg_cp_rs1_b3: + rol x6, x3, x11 # perform operation + 800000f4: 60b19333 rol x6,x3,x11 + # Check if x6 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x6, Zbkb_rol_cg_cp_rs1_b3, Zbkb_rol_cg_cp_rs1_b3_str) + 800000f8: 000db203 ld x4,0(x27) + 800000fc: 00620c63 beq x4,x6,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e500 .word 0x8000e500 + 80000110: 00000000 .word 0x00000000 + 80000114: 008d8d93 addi x27,x27,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xfb4149f49dab9650 + 80000120: 00063203 ld x4,0(x12) + 80000124: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xf590eca49a07808d + 80000128: 00063c03 ld x24,0(x12) + 8000012c: 00860613 addi x12,x12,8 + +0000000080000130 : +Zbkb_rol_cg_cp_rs1_b4: + rol x8, x4, x24 # perform operation + 80000130: 61821433 rol x8,x4,x24 + # Check if x8 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x8, Zbkb_rol_cg_cp_rs1_b4, Zbkb_rol_cg_cp_rs1_b4_str) + 80000134: 000db683 ld x13,0(x27) + 80000138: 00868c63 beq x13,x8,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e530 .word 0x8000e530 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x066210705d1895a4 + 80000154: 00063283 ld x5,0(x12) + 80000158: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xbb6e9f7361af0eea + 8000015c: 00063c03 ld x24,0(x12) + 80000160: 00860613 addi x12,x12,8 + +0000000080000164 : +Zbkb_rol_cg_cp_rs1_b5: + rol x9, x5, x24 # perform operation + 80000164: 618294b3 rol x9,x5,x24 + # Check if x9 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x9, Zbkb_rol_cg_cp_rs1_b5, Zbkb_rol_cg_cp_rs1_b5_str) + 80000168: 000db683 ld x13,0(x27) + 8000016c: 00968c63 beq x13,x9,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e560 .word 0x8000e560 + 80000180: 00000000 .word 0x00000000 + 80000184: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x5ebfbeab5d3f8a4a + 80000188: 00063303 ld x6,0(x12) + 8000018c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xf3b14a31015c508e + 80000190: 00063b03 ld x22,0(x12) + 80000194: 00860613 addi x12,x12,8 + +0000000080000198 : +Zbkb_rol_cg_cp_rs1_b6: + rol x17, x6, x22 # perform operation + 80000198: 616318b3 rol x17,x6,x22 + # Check if x17 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x17, Zbkb_rol_cg_cp_rs1_b6, Zbkb_rol_cg_cp_rs1_b6_str) + 8000019c: 000db683 ld x13,0(x27) + 800001a0: 01168c63 beq x13,x17,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e590 .word 0x8000e590 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x292d78b1316c5c4b + 800001bc: 00063383 ld x7,0(x12) + 800001c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xe5fe9f3319d584ad + 800001c4: 00063183 ld x3,0(x12) + 800001c8: 00860613 addi x12,x12,8 + +00000000800001cc : +Zbkb_rol_cg_cp_rs1_b7: + rol x18, x7, x3 # perform operation + 800001cc: 60339933 rol x18,x7,x3 + # Check if x18 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x18, Zbkb_rol_cg_cp_rs1_b7, Zbkb_rol_cg_cp_rs1_b7_str) + 800001d0: 000db683 ld x13,0(x27) + 800001d4: 01268c63 beq x13,x18,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5c0 .word 0x8000e5c0 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x34e8cd543933d38e + 800001f0: 00063403 ld x8,0(x12) + 800001f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x897b2082e37bf99e + 800001f8: 00063e83 ld x29,0(x12) + 800001fc: 00860613 addi x12,x12,8 + +0000000080000200 : +Zbkb_rol_cg_cp_rs1_b8: + rol x24, x8, x29 # perform operation + 80000200: 61d41c33 rol x24,x8,x29 + # Check if x24 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x24, Zbkb_rol_cg_cp_rs1_b8, Zbkb_rol_cg_cp_rs1_b8_str) + 80000204: 000db683 ld x13,0(x27) + 80000208: 01868c63 beq x13,x24,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e5f0 .word 0x8000e5f0 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xb65b18dcfa45b4e5 + 80000224: 00063483 ld x9,0(x12) + 80000228: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x3f09159f9516e172 + 8000022c: 00063803 ld x16,0(x12) + 80000230: 00860613 addi x12,x12,8 + +0000000080000234 : +Zbkb_rol_cg_cp_rs1_b9: + rol x6, x9, x16 # perform operation + 80000234: 61049333 rol x6,x9,x16 + # Check if x6 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x6, Zbkb_rol_cg_cp_rs1_b9, Zbkb_rol_cg_cp_rs1_b9_str) + 80000238: 000db683 ld x13,0(x27) + 8000023c: 00668c63 beq x13,x6,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e620 .word 0x8000e620 + 80000250: 00000000 .word 0x00000000 + 80000254: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x75ff62cd7bd6941d + 80000258: 00063503 ld x10,0(x12) + 8000025c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x18984dc60060a0f8 + 80000260: 00063e83 ld x29,0(x12) + 80000264: 00860613 addi x12,x12,8 + +0000000080000268 : +Zbkb_rol_cg_cp_rs1_b10: + rol x9, x10, x29 # perform operation + 80000268: 61d514b3 rol x9,x10,x29 + # Check if x9 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x9, Zbkb_rol_cg_cp_rs1_b10, Zbkb_rol_cg_cp_rs1_b10_str) + 8000026c: 000db683 ld x13,0(x27) + 80000270: 00968c63 beq x13,x9,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e651 .word 0x8000e651 + 80000284: 00000000 .word 0x00000000 + 80000288: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xe3cb40c51360354a + 8000028c: 00063583 ld x11,0(x12) + 80000290: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xafa96721af54783d + 80000294: 00063483 ld x9,0(x12) + 80000298: 00860613 addi x12,x12,8 + +000000008000029c : +Zbkb_rol_cg_cp_rs1_b11: + rol x30, x11, x9 # perform operation + 8000029c: 60959f33 rol x30,x11,x9 + # Check if x30 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x30, Zbkb_rol_cg_cp_rs1_b11, Zbkb_rol_cg_cp_rs1_b11_str) + 800002a0: 000db683 ld x13,0(x27) + 800002a4: 01e68c63 beq x13,x30,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e683 .word 0x8000e683 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008d8d93 addi x27,x27,8 + + mv x16, x12 # switch data pointer register to avoid conflict with test + 800002c0: 00060813 addi x16,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x79cf6c79448ab370 + 800002c4: 00083603 ld x12,0(x16) + 800002c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x863cf8730cd6306c + 800002cc: 00083083 ld x1,0(x16) + 800002d0: 00880813 addi x16,x16,8 + +00000000800002d4 : +Zbkb_rol_cg_cp_rs1_b12: + rol x29, x12, x1 # perform operation + 800002d4: 60161eb3 rol x29,x12,x1 + # Check if x29 contains the expected result. x27 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x27, x14, x13, x29, Zbkb_rol_cg_cp_rs1_b12, Zbkb_rol_cg_cp_rs1_b12_str) + 800002d8: 000db683 ld x13,0(x27) + 800002dc: 01d68c63 beq x13,x29,800002f4 + 800002e0: 2610776f jal x14,80007d40 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 8000e6b5 .word 0x8000e6b5 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 008d8d93 addi x27,x27,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002f8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002fc: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x889ca31dc91705ab + 80000300: 00083683 ld x13,0(x16) + 80000304: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x905faab3c781b2f8 + 80000308: 00083c83 ld x25,0(x16) + 8000030c: 00880813 addi x16,x16,8 + +0000000080000310 : +Zbkb_rol_cg_cp_rs1_b13: + rol x22, x13, x25 # perform operation + 80000310: 61969b33 rol x22,x13,x25 + # Check if x22 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x22, Zbkb_rol_cg_cp_rs1_b13, Zbkb_rol_cg_cp_rs1_b13_str) + 80000314: 000db383 ld x7,0(x27) + 80000318: 01638c63 beq x7,x22,80000330 + 8000031c: 1fd0746f jal x8,80007d18 + 80000320: 80000310 .word 0x80000310 + 80000324: 00000000 .word 0x00000000 + 80000328: 8000e6e7 .word 0x8000e6e7 + 8000032c: 00000000 .word 0x00000000 + 80000330: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xd773c49eb7c59510 + 80000334: 00083703 ld x14,0(x16) + 80000338: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x887c3421ce27ae52 + 8000033c: 00083283 ld x5,0(x16) + 80000340: 00880813 addi x16,x16,8 + +0000000080000344 : +Zbkb_rol_cg_cp_rs1_b14: + rol x20, x14, x5 # perform operation + 80000344: 60571a33 rol x20,x14,x5 + # Check if x20 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x20, Zbkb_rol_cg_cp_rs1_b14, Zbkb_rol_cg_cp_rs1_b14_str) + 80000348: 000db383 ld x7,0(x27) + 8000034c: 01438c63 beq x7,x20,80000364 + 80000350: 1c90746f jal x8,80007d18 + 80000354: 80000344 .word 0x80000344 + 80000358: 00000000 .word 0x00000000 + 8000035c: 8000e719 .word 0x8000e719 + 80000360: 00000000 .word 0x00000000 + 80000364: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x556dddf56254bce8 + 80000368: 00083783 ld x15,0(x16) + 8000036c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x153e658c5ed4a61d + 80000370: 00083883 ld x17,0(x16) + 80000374: 00880813 addi x16,x16,8 + +0000000080000378 : +Zbkb_rol_cg_cp_rs1_b15: + rol x29, x15, x17 # perform operation + 80000378: 61179eb3 rol x29,x15,x17 + # Check if x29 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x29, Zbkb_rol_cg_cp_rs1_b15, Zbkb_rol_cg_cp_rs1_b15_str) + 8000037c: 000db383 ld x7,0(x27) + 80000380: 01d38c63 beq x7,x29,80000398 + 80000384: 1950746f jal x8,80007d18 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e74b .word 0x8000e74b + 80000394: 00000000 .word 0x00000000 + 80000398: 008d8d93 addi x27,x27,8 + + mv x1, x16 # switch data pointer register to avoid conflict with test + 8000039c: 00080093 addi x1,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xb35470c18097e202 + 800003a0: 0000b803 ld x16,0(x1) + 800003a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0xa199e779bd7e04ee + 800003a8: 0000b503 ld x10,0(x1) + 800003ac: 00808093 addi x1,x1,8 + +00000000800003b0 : +Zbkb_rol_cg_cp_rs1_b16: + rol x18, x16, x10 # perform operation + 800003b0: 60a81933 rol x18,x16,x10 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zbkb_rol_cg_cp_rs1_b16, Zbkb_rol_cg_cp_rs1_b16_str) + 800003b4: 000db383 ld x7,0(x27) + 800003b8: 01238c63 beq x7,x18,800003d0 + 800003bc: 15d0746f jal x8,80007d18 + 800003c0: 800003b0 .word 0x800003b0 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 8000e77d .word 0x8000e77d + 800003cc: 00000000 .word 0x00000000 + 800003d0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0xd91e80ca4b71990f + 800003d4: 0000b883 ld x17,0(x1) + 800003d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x2226f4e3e573e116 + 800003dc: 0000bb83 ld x23,0(x1) + 800003e0: 00808093 addi x1,x1,8 + +00000000800003e4 : +Zbkb_rol_cg_cp_rs1_b17: + rol x11, x17, x23 # perform operation + 800003e4: 617895b3 rol x11,x17,x23 + # Check if x11 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x11, Zbkb_rol_cg_cp_rs1_b17, Zbkb_rol_cg_cp_rs1_b17_str) + 800003e8: 000db383 ld x7,0(x27) + 800003ec: 00b38c63 beq x7,x11,80000404 + 800003f0: 1290746f jal x8,80007d18 + 800003f4: 800003e4 .word 0x800003e4 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 8000e7af .word 0x8000e7af + 80000400: 00000000 .word 0x00000000 + 80000404: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xe03a7cce49c465d1 + 80000408: 0000b903 ld x18,0(x1) + 8000040c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xdf609932186bc15f + 80000410: 0000bb83 ld x23,0(x1) + 80000414: 00808093 addi x1,x1,8 + +0000000080000418 : +Zbkb_rol_cg_cp_rs1_b18: + rol x11, x18, x23 # perform operation + 80000418: 617915b3 rol x11,x18,x23 + # Check if x11 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x11, Zbkb_rol_cg_cp_rs1_b18, Zbkb_rol_cg_cp_rs1_b18_str) + 8000041c: 000db383 ld x7,0(x27) + 80000420: 00b38c63 beq x7,x11,80000438 + 80000424: 0f50746f jal x8,80007d18 + 80000428: 80000418 .word 0x80000418 + 8000042c: 00000000 .word 0x00000000 + 80000430: 8000e7e1 .word 0x8000e7e1 + 80000434: 00000000 .word 0x00000000 + 80000438: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x2e765a06016be8fa + 8000043c: 0000b983 ld x19,0(x1) + 80000440: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x483853788d6f2dda + 80000444: 0000b503 ld x10,0(x1) + 80000448: 00808093 addi x1,x1,8 + +000000008000044c : +Zbkb_rol_cg_cp_rs1_b19: + rol x29, x19, x10 # perform operation + 8000044c: 60a99eb3 rol x29,x19,x10 + # Check if x29 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x29, Zbkb_rol_cg_cp_rs1_b19, Zbkb_rol_cg_cp_rs1_b19_str) + 80000450: 000db383 ld x7,0(x27) + 80000454: 01d38c63 beq x7,x29,8000046c + 80000458: 0c10746f jal x8,80007d18 + 8000045c: 8000044c .word 0x8000044c + 80000460: 00000000 .word 0x00000000 + 80000464: 8000e813 .word 0x8000e813 + 80000468: 00000000 .word 0x00000000 + 8000046c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7f6e1d996ddfbd38 + 80000470: 0000ba03 ld x20,0(x1) + 80000474: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs2: x4 = 0xefa10e3344f89c1d + 80000478: 0000b203 ld x4,0(x1) + 8000047c: 00808093 addi x1,x1,8 + +0000000080000480 : +Zbkb_rol_cg_cp_rs1_b20: + rol x9, x20, x4 # perform operation + 80000480: 604a14b3 rol x9,x20,x4 + # Check if x9 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x9, Zbkb_rol_cg_cp_rs1_b20, Zbkb_rol_cg_cp_rs1_b20_str) + 80000484: 000db383 ld x7,0(x27) + 80000488: 00938c63 beq x7,x9,800004a0 + 8000048c: 08d0746f jal x8,80007d18 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 8000e845 .word 0x8000e845 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0xb7da76ff73dec392 + 800004a4: 0000ba83 ld x21,0(x1) + 800004a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0xed8d80e2cc1556d3 + 800004ac: 0000b583 ld x11,0(x1) + 800004b0: 00808093 addi x1,x1,8 + +00000000800004b4 : +Zbkb_rol_cg_cp_rs1_b21: + rol x0, x21, x11 # perform operation + 800004b4: 60ba9033 rol x0,x21,x11 + # Check if x0 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x0, Zbkb_rol_cg_cp_rs1_b21, Zbkb_rol_cg_cp_rs1_b21_str) + 800004b8: 000db383 ld x7,0(x27) + 800004bc: 00038c63 beq x7,x0,800004d4 + 800004c0: 0590746f jal x8,80007d18 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 8000e877 .word 0x8000e877 + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xaa565200afca9dc0 + 800004d8: 0000bb03 ld x22,0(x1) + 800004dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xee5079f7b90bbc7e + 800004e0: 0000ba83 ld x21,0(x1) + 800004e4: 00808093 addi x1,x1,8 + +00000000800004e8 : +Zbkb_rol_cg_cp_rs1_b22: + rol x17, x22, x21 # perform operation + 800004e8: 615b18b3 rol x17,x22,x21 + # Check if x17 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x17, Zbkb_rol_cg_cp_rs1_b22, Zbkb_rol_cg_cp_rs1_b22_str) + 800004ec: 000db383 ld x7,0(x27) + 800004f0: 01138c63 beq x7,x17,80000508 + 800004f4: 0250746f jal x8,80007d18 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 8000e8a9 .word 0x8000e8a9 + 80000504: 00000000 .word 0x00000000 + 80000508: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xd78e2fcde928e4bd + 8000050c: 0000bb83 ld x23,0(x1) + 80000510: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0xbe899d40cba6e779 + 80000514: 0000bf03 ld x30,0(x1) + 80000518: 00808093 addi x1,x1,8 + +000000008000051c : +Zbkb_rol_cg_cp_rs1_b23: + rol x6, x23, x30 # perform operation + 8000051c: 61eb9333 rol x6,x23,x30 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zbkb_rol_cg_cp_rs1_b23, Zbkb_rol_cg_cp_rs1_b23_str) + 80000520: 000db383 ld x7,0(x27) + 80000524: 00638c63 beq x7,x6,8000053c + 80000528: 7f00746f jal x8,80007d18 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8000e8db .word 0x8000e8db + 80000538: 00000000 .word 0x00000000 + 8000053c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x06630d897280817c + 80000540: 0000bc03 ld x24,0(x1) + 80000544: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x489662985e3a261e + 80000548: 0000b883 ld x17,0(x1) + 8000054c: 00808093 addi x1,x1,8 + +0000000080000550 : +Zbkb_rol_cg_cp_rs1_b24: + rol x18, x24, x17 # perform operation + 80000550: 611c1933 rol x18,x24,x17 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zbkb_rol_cg_cp_rs1_b24, Zbkb_rol_cg_cp_rs1_b24_str) + 80000554: 000db383 ld x7,0(x27) + 80000558: 01238c63 beq x7,x18,80000570 + 8000055c: 7bc0746f jal x8,80007d18 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e90d .word 0x8000e90d + 8000056c: 00000000 .word 0x00000000 + 80000570: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x6b2cb4c416bac139 + 80000574: 0000bc83 ld x25,0(x1) + 80000578: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x4c2696f94d9bfa88 + 8000057c: 0000be03 ld x28,0(x1) + 80000580: 00808093 addi x1,x1,8 + +0000000080000584 : +Zbkb_rol_cg_cp_rs1_b25: + rol x23, x25, x28 # perform operation + 80000584: 61cc9bb3 rol x23,x25,x28 + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkb_rol_cg_cp_rs1_b25, Zbkb_rol_cg_cp_rs1_b25_str) + 80000588: 000db383 ld x7,0(x27) + 8000058c: 01738c63 beq x7,x23,800005a4 + 80000590: 7880746f jal x8,80007d18 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 8000e93f .word 0x8000e93f + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xab68d95228f2b6de + 800005a8: 0000bd03 ld x26,0(x1) + 800005ac: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x4fb9ed015960ad49 + 800005b0: 0000bb03 ld x22,0(x1) + 800005b4: 00808093 addi x1,x1,8 + +00000000800005b8 : +Zbkb_rol_cg_cp_rs1_b26: + rol x15, x26, x22 # perform operation + 800005b8: 616d17b3 rol x15,x26,x22 + # Check if x15 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x15, Zbkb_rol_cg_cp_rs1_b26, Zbkb_rol_cg_cp_rs1_b26_str) + 800005bc: 000db383 ld x7,0(x27) + 800005c0: 00f38c63 beq x7,x15,800005d8 + 800005c4: 7540746f jal x8,80007d18 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 8000e971 .word 0x8000e971 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008d8d93 addi x27,x27,8 + + mv x15, x27 # switch signature pointer register to avoid conflict with test + 800005dc: 000d8793 addi x15,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x2e58dbafd7c06dce + 800005e0: 0000bd83 ld x27,0(x1) + 800005e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0x25ea168c71ece9b3 + 800005e8: 0000b683 ld x13,0(x1) + 800005ec: 00808093 addi x1,x1,8 + +00000000800005f0 : +Zbkb_rol_cg_cp_rs1_b27: + rol x10, x27, x13 # perform operation + 800005f0: 60dd9533 rol x10,x27,x13 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_rol_cg_cp_rs1_b27, Zbkb_rol_cg_cp_rs1_b27_str) + 800005f4: 0007b383 ld x7,0(x15) + 800005f8: 00a38c63 beq x7,x10,80000610 + 800005fc: 71c0746f jal x8,80007d18 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e9a3 .word 0x8000e9a3 + 8000060c: 00000000 .word 0x00000000 + 80000610: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xa372143ea8fba4f8 + 80000614: 0000be03 ld x28,0(x1) + 80000618: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x2b89df5e51af1689 + 8000061c: 0000bd83 ld x27,0(x1) + 80000620: 00808093 addi x1,x1,8 + +0000000080000624 : +Zbkb_rol_cg_cp_rs1_b28: + rol x13, x28, x27 # perform operation + 80000624: 61be16b3 rol x13,x28,x27 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkb_rol_cg_cp_rs1_b28, Zbkb_rol_cg_cp_rs1_b28_str) + 80000628: 0007b383 ld x7,0(x15) + 8000062c: 00d38c63 beq x7,x13,80000644 + 80000630: 6e80746f jal x8,80007d18 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000e9d5 .word 0x8000e9d5 + 80000640: 00000000 .word 0x00000000 + 80000644: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x12d7438d7023f2b2 + 80000648: 0000be83 ld x29,0(x1) + 8000064c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xb9c67cc83cbcd519 + 80000650: 0000ba83 ld x21,0(x1) + 80000654: 00808093 addi x1,x1,8 + +0000000080000658 : +Zbkb_rol_cg_cp_rs1_b29: + rol x11, x29, x21 # perform operation + 80000658: 615e95b3 rol x11,x29,x21 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_rol_cg_cp_rs1_b29, Zbkb_rol_cg_cp_rs1_b29_str) + 8000065c: 0007b383 ld x7,0(x15) + 80000660: 00b38c63 beq x7,x11,80000678 + 80000664: 6b40746f jal x8,80007d18 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 8000ea07 .word 0x8000ea07 + 80000674: 00000000 .word 0x00000000 + 80000678: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x2991ddad8e535454 + 8000067c: 0000bf03 ld x30,0(x1) + 80000680: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xbc6a0073c799e794 + 80000684: 0000bb83 ld x23,0(x1) + 80000688: 00808093 addi x1,x1,8 + +000000008000068c : +Zbkb_rol_cg_cp_rs1_b30: + rol x29, x30, x23 # perform operation + 8000068c: 617f1eb3 rol x29,x30,x23 + # Check if x29 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x29, Zbkb_rol_cg_cp_rs1_b30, Zbkb_rol_cg_cp_rs1_b30_str) + 80000690: 0007b383 ld x7,0(x15) + 80000694: 01d38c63 beq x7,x29,800006ac + 80000698: 6800746f jal x8,80007d18 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 8000ea39 .word 0x8000ea39 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 00878793 addi x15,x15,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xe2ccde08ddb3b438 + 800006b0: 0000bf83 ld x31,0(x1) + 800006b4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x6a407c7338971b1c + 800006b8: 0000be03 ld x28,0(x1) + 800006bc: 00808093 addi x1,x1,8 + +00000000800006c0 : +Zbkb_rol_cg_cp_rs1_b31: + rol x5, x31, x28 # perform operation + 800006c0: 61cf92b3 rol x5,x31,x28 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zbkb_rol_cg_cp_rs1_b31, Zbkb_rol_cg_cp_rs1_b31_str) + 800006c4: 0007b383 ld x7,0(x15) + 800006c8: 00538c63 beq x7,x5,800006e0 + 800006cc: 64c0746f jal x8,80007d18 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 8000ea6b .word 0x8000ea6b + 800006dc: 00000000 .word 0x00000000 + 800006e0: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xb9fe612f85991955 + 800006e4: 0000bd83 ld x27,0(x1) + 800006e8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xda29a208e1462da7 + 800006ec: 0000b003 ld x0,0(x1) + 800006f0: 00808093 addi x1,x1,8 + +00000000800006f4 : +Zbkb_rol_cg_cp_rs2_b0: + rol x9, x27, x0 # perform operation + 800006f4: 600d94b3 rol x9,x27,x0 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zbkb_rol_cg_cp_rs2_b0, Zbkb_rol_cg_cp_rs2_b0_str) + 800006f8: 0007b383 ld x7,0(x15) + 800006fc: 00938c63 beq x7,x9,80000714 + 80000700: 6180746f jal x8,80007d18 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 8000ea9d .word 0x8000ea9d + 80000710: 00000000 .word 0x00000000 + 80000714: 00878793 addi x15,x15,8 + + mv x3, x1 # switch data pointer register to avoid conflict with test + 80000718: 00008193 addi x3,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x3a13cd92f711195a + 8000071c: 0001bb03 ld x22,0(x3) + 80000720: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xa6a068e9d24ab2da + 80000724: 0001b083 ld x1,0(x3) + 80000728: 00818193 addi x3,x3,8 + +000000008000072c : +Zbkb_rol_cg_cp_rs2_b1: + rol x24, x22, x1 # perform operation + 8000072c: 601b1c33 rol x24,x22,x1 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_rol_cg_cp_rs2_b1, Zbkb_rol_cg_cp_rs2_b1_str) + 80000730: 0007b383 ld x7,0(x15) + 80000734: 01838c63 beq x7,x24,8000074c + 80000738: 5e00746f jal x8,80007d18 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000eace .word 0x8000eace + 80000748: 00000000 .word 0x00000000 + 8000074c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xeb2a23667d92f2bd + 80000750: 0001bf83 ld x31,0(x3) + 80000754: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xe2bea4dc8590c05a + 80000758: 0001b103 ld x2,0(x3) + 8000075c: 00818193 addi x3,x3,8 + +0000000080000760 : +Zbkb_rol_cg_cp_rs2_b2: + rol x10, x31, x2 # perform operation + 80000760: 602f9533 rol x10,x31,x2 + # Check if x10 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x10, Zbkb_rol_cg_cp_rs2_b2, Zbkb_rol_cg_cp_rs2_b2_str) + 80000764: 0007b383 ld x7,0(x15) + 80000768: 00a38c63 beq x7,x10,80000780 + 8000076c: 5ac0746f jal x8,80007d18 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eaff .word 0x8000eaff + 8000077c: 00000000 .word 0x00000000 + 80000780: 00878793 addi x15,x15,8 + + mv x18, x3 # switch data pointer register to avoid conflict with test + 80000784: 00018913 addi x18,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x88990f4ad335c2ca + 80000788: 00093b03 ld x22,0(x18) + 8000078c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0xc9fa29aa6fd219db + 80000790: 00093183 ld x3,0(x18) + 80000794: 00890913 addi x18,x18,8 + +0000000080000798 : +Zbkb_rol_cg_cp_rs2_b3: + rol x20, x22, x3 # perform operation + 80000798: 603b1a33 rol x20,x22,x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x20, Zbkb_rol_cg_cp_rs2_b3, Zbkb_rol_cg_cp_rs2_b3_str) + 8000079c: 0007b383 ld x7,0(x15) + 800007a0: 01438c63 beq x7,x20,800007b8 + 800007a4: 5740746f jal x8,80007d18 + 800007a8: 80000798 .word 0x80000798 + 800007ac: 00000000 .word 0x00000000 + 800007b0: 8000eb30 .word 0x8000eb30 + 800007b4: 00000000 .word 0x00000000 + 800007b8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x71c3111e3591ac59 + 800007bc: 00093603 ld x12,0(x18) + 800007c0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x2c5e456838924804 + 800007c4: 00093203 ld x4,0(x18) + 800007c8: 00890913 addi x18,x18,8 + +00000000800007cc : +Zbkb_rol_cg_cp_rs2_b4: + rol x25, x12, x4 # perform operation + 800007cc: 60461cb3 rol x25,x12,x4 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zbkb_rol_cg_cp_rs2_b4, Zbkb_rol_cg_cp_rs2_b4_str) + 800007d0: 0007b383 ld x7,0(x15) + 800007d4: 01938c63 beq x7,x25,800007ec + 800007d8: 5400746f jal x8,80007d18 + 800007dc: 800007cc .word 0x800007cc + 800007e0: 00000000 .word 0x00000000 + 800007e4: 8000eb61 .word 0x8000eb61 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x5ad521221ab5de13 + 800007f0: 00093a83 ld x21,0(x18) + 800007f4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0xb5ba7872f3b07624 + 800007f8: 00093283 ld x5,0(x18) + 800007fc: 00890913 addi x18,x18,8 + +0000000080000800 : +Zbkb_rol_cg_cp_rs2_b5: + rol x24, x21, x5 # perform operation + 80000800: 605a9c33 rol x24,x21,x5 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zbkb_rol_cg_cp_rs2_b5, Zbkb_rol_cg_cp_rs2_b5_str) + 80000804: 0007b383 ld x7,0(x15) + 80000808: 01838c63 beq x7,x24,80000820 + 8000080c: 50c0746f jal x8,80007d18 + 80000810: 80000800 .word 0x80000800 + 80000814: 00000000 .word 0x00000000 + 80000818: 8000eb92 .word 0x8000eb92 + 8000081c: 00000000 .word 0x00000000 + 80000820: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xb74a8557ea81e7eb + 80000824: 00093e83 ld x29,0(x18) + 80000828: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x1a8ead5bb99c83cd + 8000082c: 00093303 ld x6,0(x18) + 80000830: 00890913 addi x18,x18,8 + +0000000080000834 : +Zbkb_rol_cg_cp_rs2_b6: + rol x0, x29, x6 # perform operation + 80000834: 606e9033 rol x0,x29,x6 + # Check if x0 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x0, Zbkb_rol_cg_cp_rs2_b6, Zbkb_rol_cg_cp_rs2_b6_str) + 80000838: 0007b383 ld x7,0(x15) + 8000083c: 00038c63 beq x7,x0,80000854 + 80000840: 4d80746f jal x8,80007d18 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 8000ebc3 .word 0x8000ebc3 + 80000850: 00000000 .word 0x00000000 + 80000854: 00878793 addi x15,x15,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000858: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 8000085c: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xa758729b1621c3c3 + 80000860: 00093e03 ld x28,0(x18) + 80000864: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x47cdefbad11b4840 + 80000868: 00093383 ld x7,0(x18) + 8000086c: 00890913 addi x18,x18,8 + +0000000080000870 : +Zbkb_rol_cg_cp_rs2_b7: + rol x3, x28, x7 # perform operation + 80000870: 607e11b3 rol x3,x28,x7 + # Check if x3 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x3, Zbkb_rol_cg_cp_rs2_b7, Zbkb_rol_cg_cp_rs2_b7_str) + 80000874: 0007b683 ld x13,0(x15) + 80000878: 00368c63 beq x13,x3,80000890 + 8000087c: 4c40776f jal x14,80007d40 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 8000ebf4 .word 0x8000ebf4 + 8000088c: 00000000 .word 0x00000000 + 80000890: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x0e9b4119526ccb00 + 80000894: 00093003 ld x0,0(x18) + 80000898: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0x831b8012ba2818c5 + 8000089c: 00093403 ld x8,0(x18) + 800008a0: 00890913 addi x18,x18,8 + +00000000800008a4 : +Zbkb_rol_cg_cp_rs2_b8: + rol x29, x0, x8 # perform operation + 800008a4: 60801eb3 rol x29,x0,x8 + # Check if x29 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x29, Zbkb_rol_cg_cp_rs2_b8, Zbkb_rol_cg_cp_rs2_b8_str) + 800008a8: 0007b683 ld x13,0(x15) + 800008ac: 01d68c63 beq x13,x29,800008c4 + 800008b0: 4900776f jal x14,80007d40 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 8000ec25 .word 0x8000ec25 + 800008c0: 00000000 .word 0x00000000 + 800008c4: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0x5477c2ca351f24f9 + 800008c8: 00093183 ld x3,0(x18) + 800008cc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0x80865562bb4a4498 + 800008d0: 00093483 ld x9,0(x18) + 800008d4: 00890913 addi x18,x18,8 + +00000000800008d8 : +Zbkb_rol_cg_cp_rs2_b9: + rol x5, x3, x9 # perform operation + 800008d8: 609192b3 rol x5,x3,x9 + # Check if x5 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x5, Zbkb_rol_cg_cp_rs2_b9, Zbkb_rol_cg_cp_rs2_b9_str) + 800008dc: 0007b683 ld x13,0(x15) + 800008e0: 00568c63 beq x13,x5,800008f8 + 800008e4: 45c0776f jal x14,80007d40 + 800008e8: 800008d8 .word 0x800008d8 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 8000ec56 .word 0x8000ec56 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0x96492aa5f14ef8bc + 800008fc: 00093403 ld x8,0(x18) + 80000900: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x1993fd3d28785d7b + 80000904: 00093503 ld x10,0(x18) + 80000908: 00890913 addi x18,x18,8 + +000000008000090c : +Zbkb_rol_cg_cp_rs2_b10: + rol x23, x8, x10 # perform operation + 8000090c: 60a41bb3 rol x23,x8,x10 + # Check if x23 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x23, Zbkb_rol_cg_cp_rs2_b10, Zbkb_rol_cg_cp_rs2_b10_str) + 80000910: 0007b683 ld x13,0(x15) + 80000914: 01768c63 beq x13,x23,8000092c + 80000918: 4280776f jal x14,80007d40 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 8000ec87 .word 0x8000ec87 + 80000928: 00000000 .word 0x00000000 + 8000092c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xc6ee678a812de3a5 + 80000930: 00093d03 ld x26,0(x18) + 80000934: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x0b4b449e3e3fb2b3 + 80000938: 00093583 ld x11,0(x18) + 8000093c: 00890913 addi x18,x18,8 + +0000000080000940 : +Zbkb_rol_cg_cp_rs2_b11: + rol x30, x26, x11 # perform operation + 80000940: 60bd1f33 rol x30,x26,x11 + # Check if x30 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x30, Zbkb_rol_cg_cp_rs2_b11, Zbkb_rol_cg_cp_rs2_b11_str) + 80000944: 0007b683 ld x13,0(x15) + 80000948: 01e68c63 beq x13,x30,80000960 + 8000094c: 3f40776f jal x14,80007d40 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 8000ecb9 .word 0x8000ecb9 + 8000095c: 00000000 .word 0x00000000 + 80000960: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xf845804b3163ccd5 + 80000964: 00093303 ld x6,0(x18) + 80000968: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x022f3b279f177e9e + 8000096c: 00093603 ld x12,0(x18) + 80000970: 00890913 addi x18,x18,8 + +0000000080000974 : +Zbkb_rol_cg_cp_rs2_b12: + rol x22, x6, x12 # perform operation + 80000974: 60c31b33 rol x22,x6,x12 + # Check if x22 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x22, Zbkb_rol_cg_cp_rs2_b12, Zbkb_rol_cg_cp_rs2_b12_str) + 80000978: 0007b683 ld x13,0(x15) + 8000097c: 01668c63 beq x13,x22,80000994 + 80000980: 3c00776f jal x14,80007d40 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000eceb .word 0x8000eceb + 80000990: 00000000 .word 0x00000000 + 80000994: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000998: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000099c: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x9bf34937a5a4372b + 800009a0: 00093f83 ld x31,0(x18) + 800009a4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0xba2a087218a9f323 + 800009a8: 00093683 ld x13,0(x18) + 800009ac: 00890913 addi x18,x18,8 + +00000000800009b0 : +Zbkb_rol_cg_cp_rs2_b13: + rol x11, x31, x13 # perform operation + 800009b0: 60df95b3 rol x11,x31,x13 + # Check if x11 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x11, Zbkb_rol_cg_cp_rs2_b13, Zbkb_rol_cg_cp_rs2_b13_str) + 800009b4: 0007b383 ld x7,0(x15) + 800009b8: 00b38c63 beq x7,x11,800009d0 + 800009bc: 35c0746f jal x8,80007d18 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 8000ed1d .word 0x8000ed1d + 800009cc: 00000000 .word 0x00000000 + 800009d0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xba5a5dfaeb226155 + 800009d4: 00093c03 ld x24,0(x18) + 800009d8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xf0d9fc6f77240ba9 + 800009dc: 00093703 ld x14,0(x18) + 800009e0: 00890913 addi x18,x18,8 + +00000000800009e4 : +Zbkb_rol_cg_cp_rs2_b14: + rol x30, x24, x14 # perform operation + 800009e4: 60ec1f33 rol x30,x24,x14 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zbkb_rol_cg_cp_rs2_b14, Zbkb_rol_cg_cp_rs2_b14_str) + 800009e8: 0007b383 ld x7,0(x15) + 800009ec: 01e38c63 beq x7,x30,80000a04 + 800009f0: 3280746f jal x8,80007d18 + 800009f4: 800009e4 .word 0x800009e4 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 8000ed4f .word 0x8000ed4f + 80000a00: 00000000 .word 0x00000000 + 80000a04: 00878793 addi x15,x15,8 + + mv x10, x15 # switch signature pointer register to avoid conflict with test + 80000a08: 00078513 addi x10,x15,0 +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x9b06cf6f3e7843ec + 80000a0c: 00093b03 ld x22,0(x18) + 80000a10: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x88328cbffac22094 + 80000a14: 00093783 ld x15,0(x18) + 80000a18: 00890913 addi x18,x18,8 + +0000000080000a1c : +Zbkb_rol_cg_cp_rs2_b15: + rol x1, x22, x15 # perform operation + 80000a1c: 60fb10b3 rol x1,x22,x15 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_rol_cg_cp_rs2_b15, Zbkb_rol_cg_cp_rs2_b15_str) + 80000a20: 00053383 ld x7,0(x10) + 80000a24: 00138c63 beq x7,x1,80000a3c + 80000a28: 2f00746f jal x8,80007d18 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 8000ed81 .word 0x8000ed81 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xf0dc1a3ccec50d36 + 80000a40: 00093303 ld x6,0(x18) + 80000a44: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0xe4645dadc470b9c2 + 80000a48: 00093803 ld x16,0(x18) + 80000a4c: 00890913 addi x18,x18,8 + +0000000080000a50 : +Zbkb_rol_cg_cp_rs2_b16: + rol x21, x6, x16 # perform operation + 80000a50: 61031ab3 rol x21,x6,x16 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zbkb_rol_cg_cp_rs2_b16, Zbkb_rol_cg_cp_rs2_b16_str) + 80000a54: 00053383 ld x7,0(x10) + 80000a58: 01538c63 beq x7,x21,80000a70 + 80000a5c: 2bc0746f jal x8,80007d18 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000edb3 .word 0x8000edb3 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xa894c3e629052408 + 80000a74: 00093c83 ld x25,0(x18) + 80000a78: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xe353b154c8ce742f + 80000a7c: 00093883 ld x17,0(x18) + 80000a80: 00890913 addi x18,x18,8 + +0000000080000a84 : +Zbkb_rol_cg_cp_rs2_b17: + rol x29, x25, x17 # perform operation + 80000a84: 611c9eb3 rol x29,x25,x17 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_rol_cg_cp_rs2_b17, Zbkb_rol_cg_cp_rs2_b17_str) + 80000a88: 00053383 ld x7,0(x10) + 80000a8c: 01d38c63 beq x7,x29,80000aa4 + 80000a90: 2880746f jal x8,80007d18 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 8000ede5 .word 0x8000ede5 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 00850513 addi x10,x10,8 + + mv x11, x18 # switch data pointer register to avoid conflict with test + 80000aa8: 00090593 addi x11,x18,0 +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x03b13e2d88708c40 + 80000aac: 0005bc83 ld x25,0(x11) + 80000ab0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0xda68a5087f683b8d + 80000ab4: 0005b903 ld x18,0(x11) + 80000ab8: 00858593 addi x11,x11,8 + +0000000080000abc : +Zbkb_rol_cg_cp_rs2_b18: + rol x19, x25, x18 # perform operation + 80000abc: 612c99b3 rol x19,x25,x18 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkb_rol_cg_cp_rs2_b18, Zbkb_rol_cg_cp_rs2_b18_str) + 80000ac0: 00053383 ld x7,0(x10) + 80000ac4: 01338c63 beq x7,x19,80000adc + 80000ac8: 2500746f jal x8,80007d18 + 80000acc: 80000abc .word 0x80000abc + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 8000ee17 .word 0x8000ee17 + 80000ad8: 00000000 .word 0x00000000 + 80000adc: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0x5bd1b79fec2fa8ba + 80000ae0: 0005be03 ld x28,0(x11) + 80000ae4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0xeaee1813736ac720 + 80000ae8: 0005b983 ld x19,0(x11) + 80000aec: 00858593 addi x11,x11,8 + +0000000080000af0 : +Zbkb_rol_cg_cp_rs2_b19: + rol x22, x28, x19 # perform operation + 80000af0: 613e1b33 rol x22,x28,x19 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_rol_cg_cp_rs2_b19, Zbkb_rol_cg_cp_rs2_b19_str) + 80000af4: 00053383 ld x7,0(x10) + 80000af8: 01638c63 beq x7,x22,80000b10 + 80000afc: 21c0746f jal x8,80007d18 + 80000b00: 80000af0 .word 0x80000af0 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 8000ee49 .word 0x8000ee49 + 80000b0c: 00000000 .word 0x00000000 + 80000b10: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x22c7cdbb335b4bab + 80000b14: 0005b183 ld x3,0(x11) + 80000b18: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xb1af77c0fbe9b589 + 80000b1c: 0005ba03 ld x20,0(x11) + 80000b20: 00858593 addi x11,x11,8 + +0000000080000b24 : +Zbkb_rol_cg_cp_rs2_b20: + rol x5, x3, x20 # perform operation + 80000b24: 614192b3 rol x5,x3,x20 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_rol_cg_cp_rs2_b20, Zbkb_rol_cg_cp_rs2_b20_str) + 80000b28: 00053383 ld x7,0(x10) + 80000b2c: 00538c63 beq x7,x5,80000b44 + 80000b30: 1e80746f jal x8,80007d18 + 80000b34: 80000b24 .word 0x80000b24 + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 8000ee7b .word 0x8000ee7b + 80000b40: 00000000 .word 0x00000000 + 80000b44: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xe3ae4ae243406404 + 80000b48: 0005be03 ld x28,0(x11) + 80000b4c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xe315de8dfb57f2ab + 80000b50: 0005ba83 ld x21,0(x11) + 80000b54: 00858593 addi x11,x11,8 + +0000000080000b58 : +Zbkb_rol_cg_cp_rs2_b21: + rol x22, x28, x21 # perform operation + 80000b58: 615e1b33 rol x22,x28,x21 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_rol_cg_cp_rs2_b21, Zbkb_rol_cg_cp_rs2_b21_str) + 80000b5c: 00053383 ld x7,0(x10) + 80000b60: 01638c63 beq x7,x22,80000b78 + 80000b64: 1b40746f jal x8,80007d18 + 80000b68: 80000b58 .word 0x80000b58 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 8000eead .word 0x8000eead + 80000b74: 00000000 .word 0x00000000 + 80000b78: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0xaa0cfd029fea269f + 80000b7c: 0005ba03 ld x20,0(x11) + 80000b80: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x8d79842135f2ad5a + 80000b84: 0005bb03 ld x22,0(x11) + 80000b88: 00858593 addi x11,x11,8 + +0000000080000b8c : +Zbkb_rol_cg_cp_rs2_b22: + rol x16, x20, x22 # perform operation + 80000b8c: 616a1833 rol x16,x20,x22 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zbkb_rol_cg_cp_rs2_b22, Zbkb_rol_cg_cp_rs2_b22_str) + 80000b90: 00053383 ld x7,0(x10) + 80000b94: 01038c63 beq x7,x16,80000bac + 80000b98: 1800746f jal x8,80007d18 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 8000eedf .word 0x8000eedf + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xebaeb8ded88912a7 + 80000bb0: 0005bc03 ld x24,0(x11) + 80000bb4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x45b386164db025ba + 80000bb8: 0005bb83 ld x23,0(x11) + 80000bbc: 00858593 addi x11,x11,8 + +0000000080000bc0 : +Zbkb_rol_cg_cp_rs2_b23: + rol x29, x24, x23 # perform operation + 80000bc0: 617c1eb3 rol x29,x24,x23 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkb_rol_cg_cp_rs2_b23, Zbkb_rol_cg_cp_rs2_b23_str) + 80000bc4: 00053383 ld x7,0(x10) + 80000bc8: 01d38c63 beq x7,x29,80000be0 + 80000bcc: 14c0746f jal x8,80007d18 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000ef11 .word 0x8000ef11 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x394813fbbfa361ee + 80000be4: 0005bb03 ld x22,0(x11) + 80000be8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0xab70bee081c08608 + 80000bec: 0005bc03 ld x24,0(x11) + 80000bf0: 00858593 addi x11,x11,8 + +0000000080000bf4 : +Zbkb_rol_cg_cp_rs2_b24: + rol x25, x22, x24 # perform operation + 80000bf4: 618b1cb3 rol x25,x22,x24 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkb_rol_cg_cp_rs2_b24, Zbkb_rol_cg_cp_rs2_b24_str) + 80000bf8: 00053383 ld x7,0(x10) + 80000bfc: 01938c63 beq x7,x25,80000c14 + 80000c00: 1180746f jal x8,80007d18 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000ef43 .word 0x8000ef43 + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x452131b3a416a984 + 80000c18: 0005bd03 ld x26,0(x11) + 80000c1c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x2a501d8ca0c13138 + 80000c20: 0005bc83 ld x25,0(x11) + 80000c24: 00858593 addi x11,x11,8 + +0000000080000c28 : +Zbkb_rol_cg_cp_rs2_b25: + rol x28, x26, x25 # perform operation + 80000c28: 619d1e33 rol x28,x26,x25 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zbkb_rol_cg_cp_rs2_b25, Zbkb_rol_cg_cp_rs2_b25_str) + 80000c2c: 00053383 ld x7,0(x10) + 80000c30: 01c38c63 beq x7,x28,80000c48 + 80000c34: 0e40746f jal x8,80007d18 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000ef75 .word 0x8000ef75 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xe4d56b431e3ae0c4 + 80000c4c: 0005b203 ld x4,0(x11) + 80000c50: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x8d382c0c67bb86b1 + 80000c54: 0005bd03 ld x26,0(x11) + 80000c58: 00858593 addi x11,x11,8 + +0000000080000c5c : +Zbkb_rol_cg_cp_rs2_b26: + rol x15, x4, x26 # perform operation + 80000c5c: 61a217b3 rol x15,x4,x26 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zbkb_rol_cg_cp_rs2_b26, Zbkb_rol_cg_cp_rs2_b26_str) + 80000c60: 00053383 ld x7,0(x10) + 80000c64: 00f38c63 beq x7,x15,80000c7c + 80000c68: 0b00746f jal x8,80007d18 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000efa7 .word 0x8000efa7 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x08b8ace750052124 + 80000c80: 0005bb83 ld x23,0(x11) + 80000c84: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x726da252e4d00781 + 80000c88: 0005bd83 ld x27,0(x11) + 80000c8c: 00858593 addi x11,x11,8 + +0000000080000c90 : +Zbkb_rol_cg_cp_rs2_b27: + rol x22, x23, x27 # perform operation + 80000c90: 61bb9b33 rol x22,x23,x27 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_rol_cg_cp_rs2_b27, Zbkb_rol_cg_cp_rs2_b27_str) + 80000c94: 00053383 ld x7,0(x10) + 80000c98: 01638c63 beq x7,x22,80000cb0 + 80000c9c: 07c0746f jal x8,80007d18 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000efd9 .word 0x8000efd9 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xaf0c31cee276ffbb + 80000cb4: 0005b783 ld x15,0(x11) + 80000cb8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x98f1c0dde11b877c + 80000cbc: 0005be03 ld x28,0(x11) + 80000cc0: 00858593 addi x11,x11,8 + +0000000080000cc4 : +Zbkb_rol_cg_cp_rs2_b28: + rol x0, x15, x28 # perform operation + 80000cc4: 61c79033 rol x0,x15,x28 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkb_rol_cg_cp_rs2_b28, Zbkb_rol_cg_cp_rs2_b28_str) + 80000cc8: 00053383 ld x7,0(x10) + 80000ccc: 00038c63 beq x7,x0,80000ce4 + 80000cd0: 0480746f jal x8,80007d18 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f00b .word 0x8000f00b + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x5e93270222753636 + 80000ce8: 0005ba83 ld x21,0(x11) + 80000cec: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0xd9a6c23c8416f24d + 80000cf0: 0005be83 ld x29,0(x11) + 80000cf4: 00858593 addi x11,x11,8 + +0000000080000cf8 : +Zbkb_rol_cg_cp_rs2_b29: + rol x12, x21, x29 # perform operation + 80000cf8: 61da9633 rol x12,x21,x29 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zbkb_rol_cg_cp_rs2_b29, Zbkb_rol_cg_cp_rs2_b29_str) + 80000cfc: 00053383 ld x7,0(x10) + 80000d00: 00c38c63 beq x7,x12,80000d18 + 80000d04: 0140746f jal x8,80007d18 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000f03d .word 0x8000f03d + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x7e88ee85ef397933 + 80000d1c: 0005bd83 ld x27,0(x11) + 80000d20: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xba3159fa263f9726 + 80000d24: 0005bf03 ld x30,0(x11) + 80000d28: 00858593 addi x11,x11,8 + +0000000080000d2c : +Zbkb_rol_cg_cp_rs2_b30: + rol x16, x27, x30 # perform operation + 80000d2c: 61ed9833 rol x16,x27,x30 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zbkb_rol_cg_cp_rs2_b30, Zbkb_rol_cg_cp_rs2_b30_str) + 80000d30: 00053383 ld x7,0(x10) + 80000d34: 01038c63 beq x7,x16,80000d4c + 80000d38: 7e10646f jal x8,80007d18 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000f06f .word 0x8000f06f + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x453240dc02e32c7a + 80000d50: 0005b603 ld x12,0(x11) + 80000d54: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xd46323972969df38 + 80000d58: 0005bf83 ld x31,0(x11) + 80000d5c: 00858593 addi x11,x11,8 + +0000000080000d60 : +Zbkb_rol_cg_cp_rs2_b31: + rol x13, x12, x31 # perform operation + 80000d60: 61f616b3 rol x13,x12,x31 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zbkb_rol_cg_cp_rs2_b31, Zbkb_rol_cg_cp_rs2_b31_str) + 80000d64: 00053383 ld x7,0(x10) + 80000d68: 00d38c63 beq x7,x13,80000d80 + 80000d6c: 7ad0646f jal x8,80007d18 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8000f0a1 .word 0x8000f0a1 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0xdfe715f149867546 + 80000d84: 0005b703 ld x14,0(x11) + 80000d88: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x2d2182423520870d + 80000d8c: 0005be83 ld x29,0(x11) + 80000d90: 00858593 addi x11,x11,8 + +0000000080000d94 : +Zbkb_rol_cg_cp_rd_b0: + rol x0, x14, x29 # perform operation + 80000d94: 61d71033 rol x0,x14,x29 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkb_rol_cg_cp_rd_b0, Zbkb_rol_cg_cp_rd_b0_str) + 80000d98: 00053383 ld x7,0(x10) + 80000d9c: 00038c63 beq x7,x0,80000db4 + 80000da0: 7790646f jal x8,80007d18 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 8000f0d3 .word 0x8000f0d3 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0x20ed83d86622a1da + 80000db8: 0005bf83 ld x31,0(x11) + 80000dbc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xc8690a9a8a714417 + 80000dc0: 0005b183 ld x3,0(x11) + 80000dc4: 00858593 addi x11,x11,8 + +0000000080000dc8 : +Zbkb_rol_cg_cp_rd_b1: + rol x1, x31, x3 # perform operation + 80000dc8: 603f90b3 rol x1,x31,x3 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_rol_cg_cp_rd_b1, Zbkb_rol_cg_cp_rd_b1_str) + 80000dcc: 00053383 ld x7,0(x10) + 80000dd0: 00138c63 beq x7,x1,80000de8 + 80000dd4: 7450646f jal x8,80007d18 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 8000f103 .word 0x8000f103 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x0d7cd2621eff9235 + 80000dec: 0005bb03 ld x22,0(x11) + 80000df0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x6d51140300bf5f8f + 80000df4: 0005ba03 ld x20,0(x11) + 80000df8: 00858593 addi x11,x11,8 + +0000000080000dfc : +Zbkb_rol_cg_cp_rd_b2: + rol x2, x22, x20 # perform operation + 80000dfc: 614b1133 rol x2,x22,x20 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkb_rol_cg_cp_rd_b2, Zbkb_rol_cg_cp_rd_b2_str) + 80000e00: 00053383 ld x7,0(x10) + 80000e04: 00238c63 beq x7,x2,80000e1c + 80000e08: 7110646f jal x8,80007d18 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 8000f133 .word 0x8000f133 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x222de5a30ee3572e + 80000e20: 0005bd83 ld x27,0(x11) + 80000e24: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x932f8eb1e80f132c + 80000e28: 0005b903 ld x18,0(x11) + 80000e2c: 00858593 addi x11,x11,8 + +0000000080000e30 : +Zbkb_rol_cg_cp_rd_b3: + rol x3, x27, x18 # perform operation + 80000e30: 612d91b3 rol x3,x27,x18 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_rol_cg_cp_rd_b3, Zbkb_rol_cg_cp_rd_b3_str) + 80000e34: 00053383 ld x7,0(x10) + 80000e38: 00338c63 beq x7,x3,80000e50 + 80000e3c: 6dd0646f jal x8,80007d18 + 80000e40: 80000e30 .word 0x80000e30 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 8000f163 .word 0x8000f163 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0x1b15cc5416b0fd15 + 80000e54: 0005b103 ld x2,0(x11) + 80000e58: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xfdc70a2076a44fd1 + 80000e5c: 0005bf83 ld x31,0(x11) + 80000e60: 00858593 addi x11,x11,8 + +0000000080000e64 : +Zbkb_rol_cg_cp_rd_b4: + rol x4, x2, x31 # perform operation + 80000e64: 61f11233 rol x4,x2,x31 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_rol_cg_cp_rd_b4, Zbkb_rol_cg_cp_rd_b4_str) + 80000e68: 00053383 ld x7,0(x10) + 80000e6c: 00438c63 beq x7,x4,80000e84 + 80000e70: 6a90646f jal x8,80007d18 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 8000f193 .word 0x8000f193 + 80000e80: 00000000 .word 0x00000000 + 80000e84: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x50ade9e792569773 + 80000e88: 0005bf03 ld x30,0(x11) + 80000e8c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xc530ae57d1acb307 + 80000e90: 0005ba83 ld x21,0(x11) + 80000e94: 00858593 addi x11,x11,8 + +0000000080000e98 : +Zbkb_rol_cg_cp_rd_b5: + rol x5, x30, x21 # perform operation + 80000e98: 615f12b3 rol x5,x30,x21 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_rol_cg_cp_rd_b5, Zbkb_rol_cg_cp_rd_b5_str) + 80000e9c: 00053383 ld x7,0(x10) + 80000ea0: 00538c63 beq x7,x5,80000eb8 + 80000ea4: 6750646f jal x8,80007d18 + 80000ea8: 80000e98 .word 0x80000e98 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 8000f1c3 .word 0x8000f1c3 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0xa38643f115b70135 + 80000ebc: 0005b883 ld x17,0(x11) + 80000ec0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0xf86e1c3ba3a7f774 + 80000ec4: 0005ba03 ld x20,0(x11) + 80000ec8: 00858593 addi x11,x11,8 + +0000000080000ecc : +Zbkb_rol_cg_cp_rd_b6: + rol x6, x17, x20 # perform operation + 80000ecc: 61489333 rol x6,x17,x20 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_rol_cg_cp_rd_b6, Zbkb_rol_cg_cp_rd_b6_str) + 80000ed0: 00053383 ld x7,0(x10) + 80000ed4: 00638c63 beq x7,x6,80000eec + 80000ed8: 6410646f jal x8,80007d18 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 8000f1f3 .word 0x8000f1f3 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ef0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000ef4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xc9d280227a1be1e5 + 80000ef8: 0005bf83 ld x31,0(x11) + 80000efc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xdfcd0ec17ad01999 + 80000f00: 0005bc83 ld x25,0(x11) + 80000f04: 00858593 addi x11,x11,8 + +0000000080000f08 : +Zbkb_rol_cg_cp_rd_b7: + rol x7, x31, x25 # perform operation + 80000f08: 619f93b3 rol x7,x31,x25 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_rol_cg_cp_rd_b7, Zbkb_rol_cg_cp_rd_b7_str) + 80000f0c: 00053683 ld x13,0(x10) + 80000f10: 00768c63 beq x13,x7,80000f28 + 80000f14: 62d0676f jal x14,80007d40 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 8000f223 .word 0x8000f223 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0xa9a42cb3329c5f94 + 80000f2c: 0005b283 ld x5,0(x11) + 80000f30: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x3b190981729cbb1c + 80000f34: 0005b803 ld x16,0(x11) + 80000f38: 00858593 addi x11,x11,8 + +0000000080000f3c : +Zbkb_rol_cg_cp_rd_b8: + rol x8, x5, x16 # perform operation + 80000f3c: 61029433 rol x8,x5,x16 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_rol_cg_cp_rd_b8, Zbkb_rol_cg_cp_rd_b8_str) + 80000f40: 00053683 ld x13,0(x10) + 80000f44: 00868c63 beq x13,x8,80000f5c + 80000f48: 5f90676f jal x14,80007d40 + 80000f4c: 80000f3c .word 0x80000f3c + 80000f50: 00000000 .word 0x00000000 + 80000f54: 8000f253 .word 0x8000f253 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0x18eff22bbc3dca87 + 80000f60: 0005b003 ld x0,0(x11) + 80000f64: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x6edc7f95e8351efb + 80000f68: 0005b303 ld x6,0(x11) + 80000f6c: 00858593 addi x11,x11,8 + +0000000080000f70 : +Zbkb_rol_cg_cp_rd_b9: + rol x9, x0, x6 # perform operation + 80000f70: 606014b3 rol x9,x0,x6 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_rol_cg_cp_rd_b9, Zbkb_rol_cg_cp_rd_b9_str) + 80000f74: 00053683 ld x13,0(x10) + 80000f78: 00968c63 beq x13,x9,80000f90 + 80000f7c: 5c50676f jal x14,80007d40 + 80000f80: 80000f70 .word 0x80000f70 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 8000f283 .word 0x8000f283 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 00850513 addi x10,x10,8 + + mv x19, x10 # switch signature pointer register to avoid conflict with test + 80000f94: 00050993 addi x19,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x73abb3f48d370fc4 + 80000f98: 0005bc03 ld x24,0(x11) + 80000f9c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x1b4b326e04160a2e + 80000fa0: 0005b903 ld x18,0(x11) + 80000fa4: 00858593 addi x11,x11,8 + +0000000080000fa8 : +Zbkb_rol_cg_cp_rd_b10: + rol x10, x24, x18 # perform operation + 80000fa8: 612c1533 rol x10,x24,x18 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkb_rol_cg_cp_rd_b10, Zbkb_rol_cg_cp_rd_b10_str) + 80000fac: 0009b683 ld x13,0(x19) + 80000fb0: 00a68c63 beq x13,x10,80000fc8 + 80000fb4: 58d0676f jal x14,80007d40 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 8000f2b3 .word 0x8000f2b3 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 00898993 addi x19,x19,8 + + mv x18, x11 # switch data pointer register to avoid conflict with test + 80000fcc: 00058913 addi x18,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0xcb014491e601be4c + 80000fd0: 00093a03 ld x20,0(x18) + 80000fd4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x383e2950131f2e1a + 80000fd8: 00093783 ld x15,0(x18) + 80000fdc: 00890913 addi x18,x18,8 + +0000000080000fe0 : +Zbkb_rol_cg_cp_rd_b11: + rol x11, x20, x15 # perform operation + 80000fe0: 60fa15b3 rol x11,x20,x15 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkb_rol_cg_cp_rd_b11, Zbkb_rol_cg_cp_rd_b11_str) + 80000fe4: 0009b683 ld x13,0(x19) + 80000fe8: 00b68c63 beq x13,x11,80001000 + 80000fec: 5550676f jal x14,80007d40 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 8000f2e4 .word 0x8000f2e4 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xfc72596329a1b792 + 80001004: 00093c03 ld x24,0(x18) + 80001008: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xeff8fc0e6b33abc3 + 8000100c: 00093003 ld x0,0(x18) + 80001010: 00890913 addi x18,x18,8 + +0000000080001014 : +Zbkb_rol_cg_cp_rd_b12: + rol x12, x24, x0 # perform operation + 80001014: 600c1633 rol x12,x24,x0 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkb_rol_cg_cp_rd_b12, Zbkb_rol_cg_cp_rd_b12_str) + 80001018: 0009b683 ld x13,0(x19) + 8000101c: 00c68c63 beq x13,x12,80001034 + 80001020: 5210676f jal x14,80007d40 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f315 .word 0x8000f315 + 80001030: 00000000 .word 0x00000000 + 80001034: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001038: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000103c: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xb91de803b9f2acc3 + 80001040: 00093d83 ld x27,0(x18) + 80001044: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x8a8dda6f6b44c033 + 80001048: 00093503 ld x10,0(x18) + 8000104c: 00890913 addi x18,x18,8 + +0000000080001050 : +Zbkb_rol_cg_cp_rd_b13: + rol x13, x27, x10 # perform operation + 80001050: 60ad96b3 rol x13,x27,x10 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_rol_cg_cp_rd_b13, Zbkb_rol_cg_cp_rd_b13_str) + 80001054: 0009b203 ld x4,0(x19) + 80001058: 00d20c63 beq x4,x13,80001070 + 8000105c: 4a5062ef jal x5,80007d00 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f346 .word 0x8000f346 + 8000106c: 00000000 .word 0x00000000 + 80001070: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xbd0692023f2fe04c + 80001074: 00093683 ld x13,0(x18) + 80001078: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xac03df3456c244d7 + 8000107c: 00093383 ld x7,0(x18) + 80001080: 00890913 addi x18,x18,8 + +0000000080001084 : +Zbkb_rol_cg_cp_rd_b14: + rol x14, x13, x7 # perform operation + 80001084: 60769733 rol x14,x13,x7 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkb_rol_cg_cp_rd_b14, Zbkb_rol_cg_cp_rd_b14_str) + 80001088: 0009b203 ld x4,0(x19) + 8000108c: 00e20c63 beq x4,x14,800010a4 + 80001090: 471062ef jal x5,80007d00 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f377 .word 0x8000f377 + 800010a0: 00000000 .word 0x00000000 + 800010a4: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xe1ab32c4f738e444 + 800010a8: 00093c03 ld x24,0(x18) + 800010ac: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x746965f62f0fc98f + 800010b0: 00093a83 ld x21,0(x18) + 800010b4: 00890913 addi x18,x18,8 + +00000000800010b8 : +Zbkb_rol_cg_cp_rd_b15: + rol x15, x24, x21 # perform operation + 800010b8: 615c17b3 rol x15,x24,x21 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_rol_cg_cp_rd_b15, Zbkb_rol_cg_cp_rd_b15_str) + 800010bc: 0009b203 ld x4,0(x19) + 800010c0: 00f20c63 beq x4,x15,800010d8 + 800010c4: 43d062ef jal x5,80007d00 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 8000f3a8 .word 0x8000f3a8 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x66825ece3fcb8ab1 + 800010dc: 00093083 ld x1,0(x18) + 800010e0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x45ba73f55ab7869a + 800010e4: 00093583 ld x11,0(x18) + 800010e8: 00890913 addi x18,x18,8 + +00000000800010ec : +Zbkb_rol_cg_cp_rd_b16: + rol x16, x1, x11 # perform operation + 800010ec: 60b09833 rol x16,x1,x11 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkb_rol_cg_cp_rd_b16, Zbkb_rol_cg_cp_rd_b16_str) + 800010f0: 0009b203 ld x4,0(x19) + 800010f4: 01020c63 beq x4,x16,8000110c + 800010f8: 409062ef jal x5,80007d00 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f3d9 .word 0x8000f3d9 + 80001108: 00000000 .word 0x00000000 + 8000110c: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x20ddbc77f0136c82 + 80001110: 00093f03 ld x30,0(x18) + 80001114: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0x468921a0ed064b9f + 80001118: 00093003 ld x0,0(x18) + 8000111c: 00890913 addi x18,x18,8 + +0000000080001120 : +Zbkb_rol_cg_cp_rd_b17: + rol x17, x30, x0 # perform operation + 80001120: 600f18b3 rol x17,x30,x0 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_rol_cg_cp_rd_b17, Zbkb_rol_cg_cp_rd_b17_str) + 80001124: 0009b203 ld x4,0(x19) + 80001128: 01120c63 beq x4,x17,80001140 + 8000112c: 3d5062ef jal x5,80007d00 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f40a .word 0x8000f40a + 8000113c: 00000000 .word 0x00000000 + 80001140: 00898993 addi x19,x19,8 + + mv x10, x18 # switch data pointer register to avoid conflict with test + 80001144: 00090513 addi x10,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x211b57ad378e85c7 + 80001148: 00053b83 ld x23,0(x10) + 8000114c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x90633ada8fd589c8 + 80001150: 00053703 ld x14,0(x10) + 80001154: 00850513 addi x10,x10,8 + +0000000080001158 : +Zbkb_rol_cg_cp_rd_b18: + rol x18, x23, x14 # perform operation + 80001158: 60eb9933 rol x18,x23,x14 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_rol_cg_cp_rd_b18, Zbkb_rol_cg_cp_rd_b18_str) + 8000115c: 0009b203 ld x4,0(x19) + 80001160: 01220c63 beq x4,x18,80001178 + 80001164: 39d062ef jal x5,80007d00 + 80001168: 80001158 .word 0x80001158 + 8000116c: 00000000 .word 0x00000000 + 80001170: 8000f43b .word 0x8000f43b + 80001174: 00000000 .word 0x00000000 + 80001178: 00898993 addi x19,x19,8 + + mv x22, x19 # switch signature pointer register to avoid conflict with test + 8000117c: 00098b13 addi x22,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x03079ce0481182ce + 80001180: 00053903 ld x18,0(x10) + 80001184: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x2ecc2bf8158ab7a6 + 80001188: 00053f03 ld x30,0(x10) + 8000118c: 00850513 addi x10,x10,8 + +0000000080001190 : +Zbkb_rol_cg_cp_rd_b19: + rol x19, x18, x30 # perform operation + 80001190: 61e919b3 rol x19,x18,x30 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zbkb_rol_cg_cp_rd_b19, Zbkb_rol_cg_cp_rd_b19_str) + 80001194: 000b3203 ld x4,0(x22) + 80001198: 01320c63 beq x4,x19,800011b0 + 8000119c: 365062ef jal x5,80007d00 + 800011a0: 80001190 .word 0x80001190 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 8000f46c .word 0x8000f46c + 800011ac: 00000000 .word 0x00000000 + 800011b0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x4e6625bc6b480c49 + 800011b4: 00053603 ld x12,0(x10) + 800011b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xa97b1a7a0228a1bd + 800011bc: 00053403 ld x8,0(x10) + 800011c0: 00850513 addi x10,x10,8 + +00000000800011c4 : +Zbkb_rol_cg_cp_rd_b20: + rol x20, x12, x8 # perform operation + 800011c4: 60861a33 rol x20,x12,x8 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkb_rol_cg_cp_rd_b20, Zbkb_rol_cg_cp_rd_b20_str) + 800011c8: 000b3203 ld x4,0(x22) + 800011cc: 01420c63 beq x4,x20,800011e4 + 800011d0: 331062ef jal x5,80007d00 + 800011d4: 800011c4 .word 0x800011c4 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 8000f49d .word 0x8000f49d + 800011e0: 00000000 .word 0x00000000 + 800011e4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xf7093ebe94022cd5 + 800011e8: 00053883 ld x17,0(x10) + 800011ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xca19996ad7546d7e + 800011f0: 00053b83 ld x23,0(x10) + 800011f4: 00850513 addi x10,x10,8 + +00000000800011f8 : +Zbkb_rol_cg_cp_rd_b21: + rol x21, x17, x23 # perform operation + 800011f8: 61789ab3 rol x21,x17,x23 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkb_rol_cg_cp_rd_b21, Zbkb_rol_cg_cp_rd_b21_str) + 800011fc: 000b3203 ld x4,0(x22) + 80001200: 01520c63 beq x4,x21,80001218 + 80001204: 2fd062ef jal x5,80007d00 + 80001208: 800011f8 .word 0x800011f8 + 8000120c: 00000000 .word 0x00000000 + 80001210: 8000f4ce .word 0x8000f4ce + 80001214: 00000000 .word 0x00000000 + 80001218: 008b0b13 addi x22,x22,8 + + mv x1, x22 # switch signature pointer register to avoid conflict with test + 8000121c: 000b0093 addi x1,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x4681211bc3c226a5 + 80001220: 00053883 ld x17,0(x10) + 80001224: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0b97abc59265a8bd + 80001228: 00053983 ld x19,0(x10) + 8000122c: 00850513 addi x10,x10,8 + +0000000080001230 : +Zbkb_rol_cg_cp_rd_b22: + rol x22, x17, x19 # perform operation + 80001230: 61389b33 rol x22,x17,x19 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_rol_cg_cp_rd_b22, Zbkb_rol_cg_cp_rd_b22_str) + 80001234: 0000b203 ld x4,0(x1) + 80001238: 01620c63 beq x4,x22,80001250 + 8000123c: 2c5062ef jal x5,80007d00 + 80001240: 80001230 .word 0x80001230 + 80001244: 00000000 .word 0x00000000 + 80001248: 8000f4ff .word 0x8000f4ff + 8000124c: 00000000 .word 0x00000000 + 80001250: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xa88f72bd7f57a5f7 + 80001254: 00053303 ld x6,0(x10) + 80001258: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x65d06425ac4cf950 + 8000125c: 00053c83 ld x25,0(x10) + 80001260: 00850513 addi x10,x10,8 + +0000000080001264 : +Zbkb_rol_cg_cp_rd_b23: + rol x23, x6, x25 # perform operation + 80001264: 61931bb3 rol x23,x6,x25 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cp_rd_b23, Zbkb_rol_cg_cp_rd_b23_str) + 80001268: 0000b203 ld x4,0(x1) + 8000126c: 01720c63 beq x4,x23,80001284 + 80001270: 291062ef jal x5,80007d00 + 80001274: 80001264 .word 0x80001264 + 80001278: 00000000 .word 0x00000000 + 8000127c: 8000f530 .word 0x8000f530 + 80001280: 00000000 .word 0x00000000 + 80001284: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x948c55023f91ba20 + 80001288: 00053483 ld x9,0(x10) + 8000128c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xb75665b7394f6f79 + 80001290: 00053683 ld x13,0(x10) + 80001294: 00850513 addi x10,x10,8 + +0000000080001298 : +Zbkb_rol_cg_cp_rd_b24: + rol x24, x9, x13 # perform operation + 80001298: 60d49c33 rol x24,x9,x13 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cp_rd_b24, Zbkb_rol_cg_cp_rd_b24_str) + 8000129c: 0000b203 ld x4,0(x1) + 800012a0: 01820c63 beq x4,x24,800012b8 + 800012a4: 25d062ef jal x5,80007d00 + 800012a8: 80001298 .word 0x80001298 + 800012ac: 00000000 .word 0x00000000 + 800012b0: 8000f561 .word 0x8000f561 + 800012b4: 00000000 .word 0x00000000 + 800012b8: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x4be18c0534fc66fe + 800012bc: 00053483 ld x9,0(x10) + 800012c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x448e998e5dca88a8 + 800012c4: 00053683 ld x13,0(x10) + 800012c8: 00850513 addi x10,x10,8 + +00000000800012cc : +Zbkb_rol_cg_cp_rd_b25: + rol x25, x9, x13 # perform operation + 800012cc: 60d49cb3 rol x25,x9,x13 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cp_rd_b25, Zbkb_rol_cg_cp_rd_b25_str) + 800012d0: 0000b203 ld x4,0(x1) + 800012d4: 01920c63 beq x4,x25,800012ec + 800012d8: 229062ef jal x5,80007d00 + 800012dc: 800012cc .word 0x800012cc + 800012e0: 00000000 .word 0x00000000 + 800012e4: 8000f592 .word 0x8000f592 + 800012e8: 00000000 .word 0x00000000 + 800012ec: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xb279db35c9e28c7c + 800012f0: 00053183 ld x3,0(x10) + 800012f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x444c6d27e031689d + 800012f8: 00053e83 ld x29,0(x10) + 800012fc: 00850513 addi x10,x10,8 + +0000000080001300 : +Zbkb_rol_cg_cp_rd_b26: + rol x26, x3, x29 # perform operation + 80001300: 61d19d33 rol x26,x3,x29 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cp_rd_b26, Zbkb_rol_cg_cp_rd_b26_str) + 80001304: 0000b203 ld x4,0(x1) + 80001308: 01a20c63 beq x4,x26,80001320 + 8000130c: 1f5062ef jal x5,80007d00 + 80001310: 80001300 .word 0x80001300 + 80001314: 00000000 .word 0x00000000 + 80001318: 8000f5c3 .word 0x8000f5c3 + 8000131c: 00000000 .word 0x00000000 + 80001320: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x6a65528c56f23fb7 + 80001324: 00053983 ld x19,0(x10) + 80001328: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x3fc3c48188df2198 + 8000132c: 00053c03 ld x24,0(x10) + 80001330: 00850513 addi x10,x10,8 + +0000000080001334 : +Zbkb_rol_cg_cp_rd_b27: + rol x27, x19, x24 # perform operation + 80001334: 61899db3 rol x27,x19,x24 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cp_rd_b27, Zbkb_rol_cg_cp_rd_b27_str) + 80001338: 0000b203 ld x4,0(x1) + 8000133c: 01b20c63 beq x4,x27,80001354 + 80001340: 1c1062ef jal x5,80007d00 + 80001344: 80001334 .word 0x80001334 + 80001348: 00000000 .word 0x00000000 + 8000134c: 8000f5f4 .word 0x8000f5f4 + 80001350: 00000000 .word 0x00000000 + 80001354: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xba9829ca3ed141a2 + 80001358: 00053f03 ld x30,0(x10) + 8000135c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x91e375caa71bfe71 + 80001360: 00053603 ld x12,0(x10) + 80001364: 00850513 addi x10,x10,8 + +0000000080001368 : +Zbkb_rol_cg_cp_rd_b28: + rol x28, x30, x12 # perform operation + 80001368: 60cf1e33 rol x28,x30,x12 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cp_rd_b28, Zbkb_rol_cg_cp_rd_b28_str) + 8000136c: 0000b203 ld x4,0(x1) + 80001370: 01c20c63 beq x4,x28,80001388 + 80001374: 18d062ef jal x5,80007d00 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 8000f625 .word 0x8000f625 + 80001384: 00000000 .word 0x00000000 + 80001388: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x98f1a2889a52c044 + 8000138c: 00053783 ld x15,0(x10) + 80001390: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x4eed1f6faee3081a + 80001394: 00053003 ld x0,0(x10) + 80001398: 00850513 addi x10,x10,8 + +000000008000139c : +Zbkb_rol_cg_cp_rd_b29: + rol x29, x15, x0 # perform operation + 8000139c: 60079eb3 rol x29,x15,x0 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cp_rd_b29, Zbkb_rol_cg_cp_rd_b29_str) + 800013a0: 0000b203 ld x4,0(x1) + 800013a4: 01d20c63 beq x4,x29,800013bc + 800013a8: 159062ef jal x5,80007d00 + 800013ac: 8000139c .word 0x8000139c + 800013b0: 00000000 .word 0x00000000 + 800013b4: 8000f656 .word 0x8000f656 + 800013b8: 00000000 .word 0x00000000 + 800013bc: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xf1692660cbead7d8 + 800013c0: 00053a83 ld x21,0(x10) + 800013c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x99f4c35704610aa0 + 800013c8: 00053e83 ld x29,0(x10) + 800013cc: 00850513 addi x10,x10,8 + +00000000800013d0 : +Zbkb_rol_cg_cp_rd_b30: + rol x30, x21, x29 # perform operation + 800013d0: 61da9f33 rol x30,x21,x29 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cp_rd_b30, Zbkb_rol_cg_cp_rd_b30_str) + 800013d4: 0000b203 ld x4,0(x1) + 800013d8: 01e20c63 beq x4,x30,800013f0 + 800013dc: 125062ef jal x5,80007d00 + 800013e0: 800013d0 .word 0x800013d0 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 8000f687 .word 0x8000f687 + 800013ec: 00000000 .word 0x00000000 + 800013f0: 00808093 addi x1,x1,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x43e9b473f06fb109 + 800013f4: 00053a03 ld x20,0(x10) + 800013f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x2ea6d3a2a900a0c9 + 800013fc: 00053e83 ld x29,0(x10) + 80001400: 00850513 addi x10,x10,8 + +0000000080001404 : +Zbkb_rol_cg_cp_rd_b31: + rol x31, x20, x29 # perform operation + 80001404: 61da1fb3 rol x31,x20,x29 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cp_rd_b31, Zbkb_rol_cg_cp_rd_b31_str) + 80001408: 0000b203 ld x4,0(x1) + 8000140c: 01f20c63 beq x4,x31,80001424 + 80001410: 0f1062ef jal x5,80007d00 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 8000f6b8 .word 0x8000f6b8 + 80001420: 00000000 .word 0x00000000 + 80001424: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000000 + 80001428: 00053a83 ld x21,0(x10) + 8000142c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x15c261f849e0d6b6 + 80001430: 00053f83 ld x31,0(x10) + 80001434: 00850513 addi x10,x10,8 + +0000000080001438 : +Zbkb_rol_cg_cp_rs1_edges_0x0: + rol x15, x21, x31 # perform operation + 80001438: 61fa97b3 rol x15,x21,x31 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cp_rs1_edges_0x0, Zbkb_rol_cg_cp_rs1_edges_0x0_str) + 8000143c: 0000b203 ld x4,0(x1) + 80001440: 00f20c63 beq x4,x15,80001458 + 80001444: 0bd062ef jal x5,80007d00 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 8000f6e9 .word 0x8000f6e9 + 80001454: 00000000 .word 0x00000000 + 80001458: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000000000001 + 8000145c: 00053b83 ld x23,0(x10) + 80001460: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xfe6ca3910fdfad4d + 80001464: 00053c83 ld x25,0(x10) + 80001468: 00850513 addi x10,x10,8 + +000000008000146c : +Zbkb_rol_cg_cp_rs1_edges_0x1: + rol x21, x23, x25 # perform operation + 8000146c: 619b9ab3 rol x21,x23,x25 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cp_rs1_edges_0x1, Zbkb_rol_cg_cp_rs1_edges_0x1_str) + 80001470: 0000b203 ld x4,0(x1) + 80001474: 01520c63 beq x4,x21,8000148c + 80001478: 089062ef jal x5,80007d00 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 8000f721 .word 0x8000f721 + 80001488: 00000000 .word 0x00000000 + 8000148c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x0000000000000002 + 80001490: 00053403 ld x8,0(x10) + 80001494: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x62ed944daa824399 + 80001498: 00053883 ld x17,0(x10) + 8000149c: 00850513 addi x10,x10,8 + +00000000800014a0 : +Zbkb_rol_cg_cp_rs1_edges_0x2: + rol x29, x8, x17 # perform operation + 800014a0: 61141eb3 rol x29,x8,x17 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cp_rs1_edges_0x2, Zbkb_rol_cg_cp_rs1_edges_0x2_str) + 800014a4: 0000b203 ld x4,0(x1) + 800014a8: 01d20c63 beq x4,x29,800014c0 + 800014ac: 055062ef jal x5,80007d00 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 8000f759 .word 0x8000f759 + 800014bc: 00000000 .word 0x00000000 + 800014c0: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000000 + 800014c4: 00053103 ld x2,0(x10) + 800014c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x12f55700261ea5a2 + 800014cc: 00053903 ld x18,0(x10) + 800014d0: 00850513 addi x10,x10,8 + +00000000800014d4 : +Zbkb_rol_cg_cp_rs1_edges_0x8000000000000000: + rol x16, x2, x18 # perform operation + 800014d4: 61211833 rol x16,x2,x18 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cp_rs1_edges_0x8000000000000000, Zbkb_rol_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d8: 0000b203 ld x4,0(x1) + 800014dc: 01020c63 beq x4,x16,800014f4 + 800014e0: 021062ef jal x5,80007d00 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8000f791 .word 0x8000f791 + 800014f0: 00000000 .word 0x00000000 + 800014f4: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000001 + 800014f8: 00053a83 ld x21,0(x10) + 800014fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xb773808e71b6efe1 + 80001500: 00053c83 ld x25,0(x10) + 80001504: 00850513 addi x10,x10,8 + +0000000080001508 : +Zbkb_rol_cg_cp_rs1_edges_0x8000000000000001: + rol x18, x21, x25 # perform operation + 80001508: 619a9933 rol x18,x21,x25 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cp_rs1_edges_0x8000000000000001, Zbkb_rol_cg_cp_rs1_edges_0x8000000000000001_str) + 8000150c: 0000b203 ld x4,0(x1) + 80001510: 01220c63 beq x4,x18,80001528 + 80001514: 7ec062ef jal x5,80007d00 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 8000f7d9 .word 0x8000f7d9 + 80001524: 00000000 .word 0x00000000 + 80001528: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7fffffffffffffff + 8000152c: 00053883 ld x17,0(x10) + 80001530: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0bbf78c226baa420 + 80001534: 00053d83 ld x27,0(x10) + 80001538: 00850513 addi x10,x10,8 + +000000008000153c : +Zbkb_rol_cg_cp_rs1_edges_0x7fffffffffffffff: + rol x25, x17, x27 # perform operation + 8000153c: 61b89cb3 rol x25,x17,x27 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_rol_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001540: 0000b203 ld x4,0(x1) + 80001544: 01920c63 beq x4,x25,8000155c + 80001548: 7b8062ef jal x5,80007d00 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 8000f821 .word 0x8000f821 + 80001558: 00000000 .word 0x00000000 + 8000155c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80001560: 00053e03 ld x28,0(x10) + 80001564: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x3edae23257e8ede7 + 80001568: 00053683 ld x13,0(x10) + 8000156c: 00850513 addi x10,x10,8 + +0000000080001570 : +Zbkb_rol_cg_cp_rs1_edges_0x7ffffffffffffffe: + rol x8, x28, x13 # perform operation + 80001570: 60de1433 rol x8,x28,x13 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_rol_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001574: 0000b203 ld x4,0(x1) + 80001578: 00820c63 beq x4,x8,80001590 + 8000157c: 784062ef jal x5,80007d00 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 8000f869 .word 0x8000f869 + 8000158c: 00000000 .word 0x00000000 + 80001590: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xffffffffffffffff + 80001594: 00053383 ld x7,0(x10) + 80001598: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x837d8682f97a22dc + 8000159c: 00053f03 ld x30,0(x10) + 800015a0: 00850513 addi x10,x10,8 + +00000000800015a4 : +Zbkb_rol_cg_cp_rs1_edges_0xffffffffffffffff: + rol x16, x7, x30 # perform operation + 800015a4: 61e39833 rol x16,x7,x30 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_rol_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a8: 0000b203 ld x4,0(x1) + 800015ac: 01020c63 beq x4,x16,800015c4 + 800015b0: 750062ef jal x5,80007d00 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000f8b1 .word 0x8000f8b1 + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfffffffffffffffe + 800015c8: 00053103 ld x2,0(x10) + 800015cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x52e22d28d65012cc + 800015d0: 00053b83 ld x23,0(x10) + 800015d4: 00850513 addi x10,x10,8 + +00000000800015d8 : +Zbkb_rol_cg_cp_rs1_edges_0xfffffffffffffffe: + rol x8, x2, x23 # perform operation + 800015d8: 61711433 rol x8,x2,x23 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_rol_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015dc: 0000b203 ld x4,0(x1) + 800015e0: 00820c63 beq x4,x8,800015f8 + 800015e4: 71c062ef jal x5,80007d00 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000f8f9 .word 0x8000f8f9 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 800015fc: 00053703 ld x14,0(x10) + 80001600: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x295de5ac4c69a69c + 80001604: 00053903 ld x18,0(x10) + 80001608: 00850513 addi x10,x10,8 + +000000008000160c : +Zbkb_rol_cg_cp_rs1_edges_0x5bbc887763ae86f2: + rol x28, x14, x18 # perform operation + 8000160c: 61271e33 rol x28,x14,x18 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_rol_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001610: 0000b203 ld x4,0(x1) + 80001614: 01c20c63 beq x4,x28,8000162c + 80001618: 6e8062ef jal x5,80007d00 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 8000f941 .word 0x8000f941 + 80001628: 00000000 .word 0x00000000 + 8000162c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80001630: 00053803 ld x16,0(x10) + 80001634: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0400451640c97133 + 80001638: 00053383 ld x7,0(x10) + 8000163c: 00850513 addi x10,x10,8 + +0000000080001640 : +Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + rol x18, x16, x7 # perform operation + 80001640: 60781933 rol x18,x16,x7 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001644: 0000b203 ld x4,0(x1) + 80001648: 01220c63 beq x4,x18,80001660 + 8000164c: 6b4062ef jal x5,80007d00 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 8000f989 .word 0x8000f989 + 8000165c: 00000000 .word 0x00000000 + 80001660: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5555555555555555 + 80001664: 00053783 ld x15,0(x10) + 80001668: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x17c6d63481ddc352 + 8000166c: 00053d83 ld x27,0(x10) + 80001670: 00850513 addi x10,x10,8 + +0000000080001674 : +Zbkb_rol_cg_cp_rs1_edges_0x5555555555555555: + rol x2, x15, x27 # perform operation + 80001674: 61b79133 rol x2,x15,x27 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cp_rs1_edges_0x5555555555555555, Zbkb_rol_cg_cp_rs1_edges_0x5555555555555555_str) + 80001678: 0000b203 ld x4,0(x1) + 8000167c: 00220c63 beq x4,x2,80001694 + 80001680: 680062ef jal x5,80007d00 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000f9d1 .word 0x8000f9d1 + 80001690: 00000000 .word 0x00000000 + 80001694: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000ffffffff + 80001698: 00053b83 ld x23,0(x10) + 8000169c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xeb3aaf22380f6eff + 800016a0: 00053983 ld x19,0(x10) + 800016a4: 00850513 addi x10,x10,8 + +00000000800016a8 : +Zbkb_rol_cg_cp_rs1_edges_0xffffffff: + rol x31, x23, x19 # perform operation + 800016a8: 613b9fb3 rol x31,x23,x19 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cp_rs1_edges_0xffffffff, Zbkb_rol_cg_cp_rs1_edges_0xffffffff_str) + 800016ac: 0000b203 ld x4,0(x1) + 800016b0: 01f20c63 beq x4,x31,800016c8 + 800016b4: 64c062ef jal x5,80007d00 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 8000fa19 .word 0x8000fa19 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x00000000fffffffe + 800016cc: 00053403 ld x8,0(x10) + 800016d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x26cf9bd4990ce5b0 + 800016d4: 00053883 ld x17,0(x10) + 800016d8: 00850513 addi x10,x10,8 + +00000000800016dc : +Zbkb_rol_cg_cp_rs1_edges_0xfffffffe: + rol x26, x8, x17 # perform operation + 800016dc: 61141d33 rol x26,x8,x17 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cp_rs1_edges_0xfffffffe, Zbkb_rol_cg_cp_rs1_edges_0xfffffffe_str) + 800016e0: 0000b203 ld x4,0(x1) + 800016e4: 01a20c63 beq x4,x26,800016fc + 800016e8: 618062ef jal x5,80007d00 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 8000fa59 .word 0x8000fa59 + 800016f8: 00000000 .word 0x00000000 + 800016fc: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 80001700: 00053a03 ld x20,0(x10) + 80001704: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x9ed8ea1286fd782a + 80001708: 00053d03 ld x26,0(x10) + 8000170c: 00850513 addi x10,x10,8 + +0000000080001710 : +Zbkb_rol_cg_cp_rs1_edges_0x100000000: + rol x28, x20, x26 # perform operation + 80001710: 61aa1e33 rol x28,x20,x26 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cp_rs1_edges_0x100000000, Zbkb_rol_cg_cp_rs1_edges_0x100000000_str) + 80001714: 0000b203 ld x4,0(x1) + 80001718: 01c20c63 beq x4,x28,80001730 + 8000171c: 5e4062ef jal x5,80007d00 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 8000fa99 .word 0x8000fa99 + 8000172c: 00000000 .word 0x00000000 + 80001730: 00808093 addi x1,x1,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000001 + 80001734: 00053983 ld x19,0(x10) + 80001738: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7e19e89775b75b63 + 8000173c: 00053103 ld x2,0(x10) + 80001740: 00850513 addi x10,x10,8 + +0000000080001744 : +Zbkb_rol_cg_cp_rs1_edges_0x100000001: + rol x15, x19, x2 # perform operation + 80001744: 602997b3 rol x15,x19,x2 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cp_rs1_edges_0x100000001, Zbkb_rol_cg_cp_rs1_edges_0x100000001_str) + 80001748: 0000b203 ld x4,0(x1) + 8000174c: 00f20c63 beq x4,x15,80001764 + 80001750: 5b0062ef jal x5,80007d00 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 8000fada .word 0x8000fada + 80001760: 00000000 .word 0x00000000 + 80001764: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xde67dd683c0a5b4a + 80001768: 00053483 ld x9,0(x10) + 8000176c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000000000000 + 80001770: 00053603 ld x12,0(x10) + 80001774: 00850513 addi x10,x10,8 + +0000000080001778 : +Zbkb_rol_cg_cp_rs2_edges_0x0: + rol x28, x9, x12 # perform operation + 80001778: 60c49e33 rol x28,x9,x12 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cp_rs2_edges_0x0, Zbkb_rol_cg_cp_rs2_edges_0x0_str) + 8000177c: 0000b203 ld x4,0(x1) + 80001780: 01c20c63 beq x4,x28,80001798 + 80001784: 57c062ef jal x5,80007d00 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 8000fb1b .word 0x8000fb1b + 80001794: 00000000 .word 0x00000000 + 80001798: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x72e757446061affe + 8000179c: 00053f83 ld x31,0(x10) + 800017a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000001 + 800017a4: 00053683 ld x13,0(x10) + 800017a8: 00850513 addi x10,x10,8 + +00000000800017ac : +Zbkb_rol_cg_cp_rs2_edges_0x1: + rol x23, x31, x13 # perform operation + 800017ac: 60df9bb3 rol x23,x31,x13 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cp_rs2_edges_0x1, Zbkb_rol_cg_cp_rs2_edges_0x1_str) + 800017b0: 0000b203 ld x4,0(x1) + 800017b4: 01720c63 beq x4,x23,800017cc + 800017b8: 548062ef jal x5,80007d00 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 8000fb54 .word 0x8000fb54 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x7867eb9869c506af + 800017d0: 00053983 ld x19,0(x10) + 800017d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000002 + 800017d8: 00053783 ld x15,0(x10) + 800017dc: 00850513 addi x10,x10,8 + +00000000800017e0 : +Zbkb_rol_cg_cp_rs2_edges_0x2: + rol x8, x19, x15 # perform operation + 800017e0: 60f99433 rol x8,x19,x15 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cp_rs2_edges_0x2, Zbkb_rol_cg_cp_rs2_edges_0x2_str) + 800017e4: 0000b203 ld x4,0(x1) + 800017e8: 00820c63 beq x4,x8,80001800 + 800017ec: 514062ef jal x5,80007d00 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 8000fb8d .word 0x8000fb8d + 800017fc: 00000000 .word 0x00000000 + 80001800: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xcf407435399c0fa2 + 80001804: 00053483 ld x9,0(x10) + 80001808: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x8000000000000000 + 8000180c: 00053e83 ld x29,0(x10) + 80001810: 00850513 addi x10,x10,8 + +0000000080001814 : +Zbkb_rol_cg_cp_rs2_edges_0x8000000000000000: + rol x19, x9, x29 # perform operation + 80001814: 61d499b3 rol x19,x9,x29 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cp_rs2_edges_0x8000000000000000, Zbkb_rol_cg_cp_rs2_edges_0x8000000000000000_str) + 80001818: 0000b203 ld x4,0(x1) + 8000181c: 01320c63 beq x4,x19,80001834 + 80001820: 4e0062ef jal x5,80007d00 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000fbc6 .word 0x8000fbc6 + 80001830: 00000000 .word 0x00000000 + 80001834: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xe2617d57ee761014 + 80001838: 00053583 ld x11,0(x10) + 8000183c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000001 + 80001840: 00053903 ld x18,0(x10) + 80001844: 00850513 addi x10,x10,8 + +0000000080001848 : +Zbkb_rol_cg_cp_rs2_edges_0x8000000000000001: + rol x26, x11, x18 # perform operation + 80001848: 61259d33 rol x26,x11,x18 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cp_rs2_edges_0x8000000000000001, Zbkb_rol_cg_cp_rs2_edges_0x8000000000000001_str) + 8000184c: 0000b203 ld x4,0(x1) + 80001850: 01a20c63 beq x4,x26,80001868 + 80001854: 4ac062ef jal x5,80007d00 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 8000fc0e .word 0x8000fc0e + 80001864: 00000000 .word 0x00000000 + 80001868: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xe277255b499bd67e + 8000186c: 00053683 ld x13,0(x10) + 80001870: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7fffffffffffffff + 80001874: 00053d03 ld x26,0(x10) + 80001878: 00850513 addi x10,x10,8 + +000000008000187c : +Zbkb_rol_cg_cp_rs2_edges_0x7fffffffffffffff: + rol x24, x13, x26 # perform operation + 8000187c: 61a69c33 rol x24,x13,x26 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_rol_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001880: 0000b203 ld x4,0(x1) + 80001884: 01820c63 beq x4,x24,8000189c + 80001888: 478062ef jal x5,80007d00 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 8000fc56 .word 0x8000fc56 + 80001898: 00000000 .word 0x00000000 + 8000189c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xf8ab6b40f34d27e2 + 800018a0: 00053103 ld x2,0(x10) + 800018a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7ffffffffffffffe + 800018a8: 00053583 ld x11,0(x10) + 800018ac: 00850513 addi x10,x10,8 + +00000000800018b0 : +Zbkb_rol_cg_cp_rs2_edges_0x7ffffffffffffffe: + rol x17, x2, x11 # perform operation + 800018b0: 60b118b3 rol x17,x2,x11 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_rol_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b4: 0000b203 ld x4,0(x1) + 800018b8: 01120c63 beq x4,x17,800018d0 + 800018bc: 444062ef jal x5,80007d00 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 8000fc9e .word 0x8000fc9e + 800018cc: 00000000 .word 0x00000000 + 800018d0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x66657cc232eb7eeb + 800018d4: 00053383 ld x7,0(x10) + 800018d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 800018dc: 00053e03 ld x28,0(x10) + 800018e0: 00850513 addi x10,x10,8 + +00000000800018e4 : +Zbkb_rol_cg_cp_rs2_edges_0xffffffffffffffff: + rol x15, x7, x28 # perform operation + 800018e4: 61c397b3 rol x15,x7,x28 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_rol_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e8: 0000b203 ld x4,0(x1) + 800018ec: 00f20c63 beq x4,x15,80001904 + 800018f0: 410062ef jal x5,80007d00 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 8000fce6 .word 0x8000fce6 + 80001900: 00000000 .word 0x00000000 + 80001904: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xa03d5b09bdf29eb8 + 80001908: 00053f03 ld x30,0(x10) + 8000190c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffffffffffe + 80001910: 00053883 ld x17,0(x10) + 80001914: 00850513 addi x10,x10,8 + +0000000080001918 : +Zbkb_rol_cg_cp_rs2_edges_0xfffffffffffffffe: + rol x29, x30, x17 # perform operation + 80001918: 611f1eb3 rol x29,x30,x17 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_rol_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000191c: 0000b203 ld x4,0(x1) + 80001920: 01d20c63 beq x4,x29,80001938 + 80001924: 3dc062ef jal x5,80007d00 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 8000fd2e .word 0x8000fd2e + 80001934: 00000000 .word 0x00000000 + 80001938: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x4d5324cea519d9f9 + 8000193c: 00053803 ld x16,0(x10) + 80001940: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 80001944: 00053403 ld x8,0(x10) + 80001948: 00850513 addi x10,x10,8 + +000000008000194c : +Zbkb_rol_cg_cp_rs2_edges_0x5bbc887763ae86f2: + rol x11, x16, x8 # perform operation + 8000194c: 608815b3 rol x11,x16,x8 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_rol_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001950: 0000b203 ld x4,0(x1) + 80001954: 00b20c63 beq x4,x11,8000196c + 80001958: 3a8062ef jal x5,80007d00 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 8000fd76 .word 0x8000fd76 + 80001968: 00000000 .word 0x00000000 + 8000196c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xd2502f4208bd08c8 + 80001970: 00053183 ld x3,0(x10) + 80001974: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80001978: 00053b03 ld x22,0(x10) + 8000197c: 00850513 addi x10,x10,8 + +0000000080001980 : +Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + rol x13, x3, x22 # perform operation + 80001980: 616196b3 rol x13,x3,x22 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001984: 0000b203 ld x4,0(x1) + 80001988: 00d20c63 beq x4,x13,800019a0 + 8000198c: 374062ef jal x5,80007d00 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 8000fdbe .word 0x8000fdbe + 8000199c: 00000000 .word 0x00000000 + 800019a0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x432aef695510dd5a + 800019a4: 00053303 ld x6,0(x10) + 800019a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x5555555555555555 + 800019ac: 00053883 ld x17,0(x10) + 800019b0: 00850513 addi x10,x10,8 + +00000000800019b4 : +Zbkb_rol_cg_cp_rs2_edges_0x5555555555555555: + rol x16, x6, x17 # perform operation + 800019b4: 61131833 rol x16,x6,x17 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cp_rs2_edges_0x5555555555555555, Zbkb_rol_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b8: 0000b203 ld x4,0(x1) + 800019bc: 01020c63 beq x4,x16,800019d4 + 800019c0: 340062ef jal x5,80007d00 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 8000fe06 .word 0x8000fe06 + 800019d0: 00000000 .word 0x00000000 + 800019d4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x53265c4b4fbbf404 + 800019d8: 00053d83 ld x27,0(x10) + 800019dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000000ffffffff + 800019e0: 00053103 ld x2,0(x10) + 800019e4: 00850513 addi x10,x10,8 + +00000000800019e8 : +Zbkb_rol_cg_cp_rs2_edges_0xffffffff: + rol x15, x27, x2 # perform operation + 800019e8: 602d97b3 rol x15,x27,x2 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cp_rs2_edges_0xffffffff, Zbkb_rol_cg_cp_rs2_edges_0xffffffff_str) + 800019ec: 0000b203 ld x4,0(x1) + 800019f0: 00f20c63 beq x4,x15,80001a08 + 800019f4: 30c062ef jal x5,80007d00 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 8000fe4e .word 0x8000fe4e + 80001a04: 00000000 .word 0x00000000 + 80001a08: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x1bcf61df2428b801 + 80001a0c: 00053983 ld x19,0(x10) + 80001a10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000000fffffffe + 80001a14: 00053683 ld x13,0(x10) + 80001a18: 00850513 addi x10,x10,8 + +0000000080001a1c : +Zbkb_rol_cg_cp_rs2_edges_0xfffffffe: + rol x2, x19, x13 # perform operation + 80001a1c: 60d99133 rol x2,x19,x13 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cp_rs2_edges_0xfffffffe, Zbkb_rol_cg_cp_rs2_edges_0xfffffffe_str) + 80001a20: 0000b203 ld x4,0(x1) + 80001a24: 00220c63 beq x4,x2,80001a3c + 80001a28: 2d8062ef jal x5,80007d00 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 8000fe8e .word 0x8000fe8e + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xce008a07d960ca92 + 80001a40: 00053f03 ld x30,0(x10) + 80001a44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000000 + 80001a48: 00053b83 ld x23,0(x10) + 80001a4c: 00850513 addi x10,x10,8 + +0000000080001a50 : +Zbkb_rol_cg_cp_rs2_edges_0x100000000: + rol x6, x30, x23 # perform operation + 80001a50: 617f1333 rol x6,x30,x23 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cp_rs2_edges_0x100000000, Zbkb_rol_cg_cp_rs2_edges_0x100000000_str) + 80001a54: 0000b203 ld x4,0(x1) + 80001a58: 00620c63 beq x4,x6,80001a70 + 80001a5c: 2a4062ef jal x5,80007d00 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 8000fece .word 0x8000fece + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 00808093 addi x1,x1,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x1bda4f1ad36c637a + 80001a74: 00053e83 ld x29,0(x10) + 80001a78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000001 + 80001a7c: 00053483 ld x9,0(x10) + 80001a80: 00850513 addi x10,x10,8 + +0000000080001a84 : +Zbkb_rol_cg_cp_rs2_edges_0x100000001: + rol x25, x29, x9 # perform operation + 80001a84: 609e9cb3 rol x25,x29,x9 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cp_rs2_edges_0x100000001, Zbkb_rol_cg_cp_rs2_edges_0x100000001_str) + 80001a88: 0000b203 ld x4,0(x1) + 80001a8c: 01920c63 beq x4,x25,80001aa4 + 80001a90: 270062ef jal x5,80007d00 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8000ff0f .word 0x8000ff0f + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 00808093 addi x1,x1,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 80001aa8: 00053f03 ld x30,0(x10) + 80001aac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 80001ab0: 00053683 ld x13,0(x10) + 80001ab4: 00850513 addi x10,x10,8 + +0000000080001ab8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + rol x16, x30, x13 # perform operation + 80001ab8: 60df1833 rol x16,x30,x13 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001abc: 0000b203 ld x4,0(x1) + 80001ac0: 01020c63 beq x4,x16,80001ad8 + 80001ac4: 23c062ef jal x5,80007d00 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 8000ff50 .word 0x8000ff50 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000000000000 + 80001adc: 00053e03 ld x28,0(x10) + 80001ae0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000000000001 + 80001ae4: 00053f03 ld x30,0(x10) + 80001ae8: 00850513 addi x10,x10,8 + +0000000080001aec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + rol x3, x28, x30 # perform operation + 80001aec: 61ee11b3 rol x3,x28,x30 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af0: 0000b203 ld x4,0(x1) + 80001af4: 00320c63 beq x4,x3,80001b0c + 80001af8: 208062ef jal x5,80007d00 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 8000ffa0 .word 0x8000ffa0 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000000000000 + 80001b10: 00053903 ld x18,0(x10) + 80001b14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 80001b18: 00053683 ld x13,0(x10) + 80001b1c: 00850513 addi x10,x10,8 + +0000000080001b20 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + rol x21, x18, x13 # perform operation + 80001b20: 60d91ab3 rol x21,x18,x13 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b24: 0000b203 ld x4,0(x1) + 80001b28: 01520c63 beq x4,x21,80001b40 + 80001b2c: 1d4062ef jal x5,80007d00 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 8000fff0 .word 0x8000fff0 + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000000 + 80001b44: 00053783 ld x15,0(x10) + 80001b48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x8000000000000000 + 80001b4c: 00053183 ld x3,0(x10) + 80001b50: 00850513 addi x10,x10,8 + +0000000080001b54 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + rol x12, x15, x3 # perform operation + 80001b54: 60379633 rol x12,x15,x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b58: 0000b203 ld x4,0(x1) + 80001b5c: 00c20c63 beq x4,x12,80001b74 + 80001b60: 1a0062ef jal x5,80007d00 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 80010040 .word 0x80010040 + 80001b70: 00000000 .word 0x00000000 + 80001b74: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80001b78: 00053983 ld x19,0(x10) + 80001b7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x8000000000000001 + 80001b80: 00053b83 ld x23,0(x10) + 80001b84: 00850513 addi x10,x10,8 + +0000000080001b88 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + rol x20, x19, x23 # perform operation + 80001b88: 61799a33 rol x20,x19,x23 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b8c: 0000b203 ld x4,0(x1) + 80001b90: 01420c63 beq x4,x20,80001ba8 + 80001b94: 16c062ef jal x5,80007d00 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 8001009f .word 0x8001009f + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000000 + 80001bac: 00053803 ld x16,0(x10) + 80001bb0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7fffffffffffffff + 80001bb4: 00053483 ld x9,0(x10) + 80001bb8: 00850513 addi x10,x10,8 + +0000000080001bbc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + rol x12, x16, x9 # perform operation + 80001bbc: 60981633 rol x12,x16,x9 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc0: 0000b203 ld x4,0(x1) + 80001bc4: 00c20c63 beq x4,x12,80001bdc + 80001bc8: 138062ef jal x5,80007d00 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 800100fe .word 0x800100fe + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000000000000 + 80001be0: 00053383 ld x7,0(x10) + 80001be4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80001be8: 00053183 ld x3,0(x10) + 80001bec: 00850513 addi x10,x10,8 + +0000000080001bf0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + rol x23, x7, x3 # perform operation + 80001bf0: 60339bb3 rol x23,x7,x3 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf4: 0000b203 ld x4,0(x1) + 80001bf8: 01720c63 beq x4,x23,80001c10 + 80001bfc: 104062ef jal x5,80007d00 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 8001015d .word 0x8001015d + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000000 + 80001c14: 00053c03 ld x24,0(x10) + 80001c18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xffffffffffffffff + 80001c1c: 00053903 ld x18,0(x10) + 80001c20: 00850513 addi x10,x10,8 + +0000000080001c24 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + rol x16, x24, x18 # perform operation + 80001c24: 612c1833 rol x16,x24,x18 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c28: 0000b203 ld x4,0(x1) + 80001c2c: 01020c63 beq x4,x16,80001c44 + 80001c30: 0d0062ef jal x5,80007d00 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 800101bc .word 0x800101bc + 80001c40: 00000000 .word 0x00000000 + 80001c44: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000000000000 + 80001c48: 00053183 ld x3,0(x10) + 80001c4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xfffffffffffffffe + 80001c50: 00053483 ld x9,0(x10) + 80001c54: 00850513 addi x10,x10,8 + +0000000080001c58 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + rol x17, x3, x9 # perform operation + 80001c58: 609198b3 rol x17,x3,x9 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c5c: 0000b203 ld x4,0(x1) + 80001c60: 01120c63 beq x4,x17,80001c78 + 80001c64: 09c062ef jal x5,80007d00 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 8001021b .word 0x8001021b + 80001c74: 00000000 .word 0x00000000 + 80001c78: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000000 + 80001c7c: 00053783 ld x15,0(x10) + 80001c80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80001c84: 00053603 ld x12,0(x10) + 80001c88: 00850513 addi x10,x10,8 + +0000000080001c8c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + rol x17, x15, x12 # perform operation + 80001c8c: 60c798b3 rol x17,x15,x12 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c90: 0000b203 ld x4,0(x1) + 80001c94: 01120c63 beq x4,x17,80001cac + 80001c98: 068062ef jal x5,80007d00 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 8001027a .word 0x8001027a + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000000000000 + 80001cb0: 00053e03 ld x28,0(x10) + 80001cb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80001cb8: 00053b03 ld x22,0(x10) + 80001cbc: 00850513 addi x10,x10,8 + +0000000080001cc0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + rol x3, x28, x22 # perform operation + 80001cc0: 616e11b3 rol x3,x28,x22 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc4: 0000b203 ld x4,0(x1) + 80001cc8: 00320c63 beq x4,x3,80001ce0 + 80001ccc: 034062ef jal x5,80007d00 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 800102d9 .word 0x800102d9 + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80001ce4: 00053983 ld x19,0(x10) + 80001ce8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x5555555555555555 + 80001cec: 00053a03 ld x20,0(x10) + 80001cf0: 00850513 addi x10,x10,8 + +0000000080001cf4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + rol x3, x19, x20 # perform operation + 80001cf4: 614991b3 rol x3,x19,x20 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf8: 0000b203 ld x4,0(x1) + 80001cfc: 00320c63 beq x4,x3,80001d14 + 80001d00: 000062ef jal x5,80007d00 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 80010338 .word 0x80010338 + 80001d10: 00000000 .word 0x00000000 + 80001d14: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000000 + 80001d18: 00053a03 ld x20,0(x10) + 80001d1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000ffffffff + 80001d20: 00053a83 ld x21,0(x10) + 80001d24: 00850513 addi x10,x10,8 + +0000000080001d28 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + rol x24, x20, x21 # perform operation + 80001d28: 615a1c33 rol x24,x20,x21 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d2c: 0000b203 ld x4,0(x1) + 80001d30: 01820c63 beq x4,x24,80001d48 + 80001d34: 7cd052ef jal x5,80007d00 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 80010397 .word 0x80010397 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80001d4c: 00053983 ld x19,0(x10) + 80001d50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 80001d54: 00053a83 ld x21,0(x10) + 80001d58: 00850513 addi x10,x10,8 + +0000000080001d5c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + rol x31, x19, x21 # perform operation + 80001d5c: 61599fb3 rol x31,x19,x21 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d60: 0000b203 ld x4,0(x1) + 80001d64: 01f20c63 beq x4,x31,80001d7c + 80001d68: 799052ef jal x5,80007d00 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 800103ee .word 0x800103ee + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000000 + 80001d80: 00053b03 ld x22,0(x10) + 80001d84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000000 + 80001d88: 00053303 ld x6,0(x10) + 80001d8c: 00850513 addi x10,x10,8 + +0000000080001d90 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + rol x19, x22, x6 # perform operation + 80001d90: 606b19b3 rol x19,x22,x6 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d94: 0000b203 ld x4,0(x1) + 80001d98: 01320c63 beq x4,x19,80001db0 + 80001d9c: 765052ef jal x5,80007d00 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 80010445 .word 0x80010445 + 80001dac: 00000000 .word 0x00000000 + 80001db0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000000 + 80001db4: 00053803 ld x16,0(x10) + 80001db8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000100000001 + 80001dbc: 00053983 ld x19,0(x10) + 80001dc0: 00850513 addi x10,x10,8 + +0000000080001dc4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + rol x29, x16, x19 # perform operation + 80001dc4: 61381eb3 rol x29,x16,x19 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc8: 0000b203 ld x4,0(x1) + 80001dcc: 01d20c63 beq x4,x29,80001de4 + 80001dd0: 731052ef jal x5,80007d00 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 8001049d .word 0x8001049d + 80001de0: 00000000 .word 0x00000000 + 80001de4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000001 + 80001de8: 00053c83 ld x25,0(x10) + 80001dec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000000 + 80001df0: 00053b03 ld x22,0(x10) + 80001df4: 00850513 addi x10,x10,8 + +0000000080001df8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + rol x15, x25, x22 # perform operation + 80001df8: 616c97b3 rol x15,x25,x22 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dfc: 0000b203 ld x4,0(x1) + 80001e00: 00f20c63 beq x4,x15,80001e18 + 80001e04: 6fd052ef jal x5,80007d00 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 800104f5 .word 0x800104f5 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80001e1c: 00053483 ld x9,0(x10) + 80001e20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000000000001 + 80001e24: 00053803 ld x16,0(x10) + 80001e28: 00850513 addi x10,x10,8 + +0000000080001e2c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + rol x27, x9, x16 # perform operation + 80001e2c: 61049db3 rol x27,x9,x16 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e30: 0000b203 ld x4,0(x1) + 80001e34: 01b20c63 beq x4,x27,80001e4c + 80001e38: 6c9052ef jal x5,80007d00 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 80010545 .word 0x80010545 + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80001e50: 00053483 ld x9,0(x10) + 80001e54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000000000002 + 80001e58: 00053c83 ld x25,0(x10) + 80001e5c: 00850513 addi x10,x10,8 + +0000000080001e60 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + rol x16, x9, x25 # perform operation + 80001e60: 61949833 rol x16,x9,x25 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e64: 0000b203 ld x4,0(x1) + 80001e68: 01020c63 beq x4,x16,80001e80 + 80001e6c: 695052ef jal x5,80007d00 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 80010595 .word 0x80010595 + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000001 + 80001e84: 00053583 ld x11,0(x10) + 80001e88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000000 + 80001e8c: 00053883 ld x17,0(x10) + 80001e90: 00850513 addi x10,x10,8 + +0000000080001e94 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + rol x3, x11, x17 # perform operation + 80001e94: 611591b3 rol x3,x11,x17 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e98: 0000b203 ld x4,0(x1) + 80001e9c: 00320c63 beq x4,x3,80001eb4 + 80001ea0: 661052ef jal x5,80007d00 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 800105e5 .word 0x800105e5 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 80001eb8: 00053a03 ld x20,0(x10) + 80001ebc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x8000000000000001 + 80001ec0: 00053383 ld x7,0(x10) + 80001ec4: 00850513 addi x10,x10,8 + +0000000080001ec8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + rol x27, x20, x7 # perform operation + 80001ec8: 607a1db3 rol x27,x20,x7 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ecc: 0000b203 ld x4,0(x1) + 80001ed0: 01b20c63 beq x4,x27,80001ee8 + 80001ed4: 62d052ef jal x5,80007d00 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 80010644 .word 0x80010644 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000001 + 80001eec: 00053c03 ld x24,0(x10) + 80001ef0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7fffffffffffffff + 80001ef4: 00053a03 ld x20,0(x10) + 80001ef8: 00850513 addi x10,x10,8 + +0000000080001efc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + rol x31, x24, x20 # perform operation + 80001efc: 614c1fb3 rol x31,x24,x20 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f00: 0000b203 ld x4,0(x1) + 80001f04: 01f20c63 beq x4,x31,80001f1c + 80001f08: 5f9052ef jal x5,80007d00 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 800106a3 .word 0x800106a3 + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 80001f20: 00053a03 ld x20,0(x10) + 80001f24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffffffffffe + 80001f28: 00053c03 ld x24,0(x10) + 80001f2c: 00850513 addi x10,x10,8 + +0000000080001f30 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + rol x30, x20, x24 # perform operation + 80001f30: 618a1f33 rol x30,x20,x24 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f34: 0000b203 ld x4,0(x1) + 80001f38: 01e20c63 beq x4,x30,80001f50 + 80001f3c: 5c5052ef jal x5,80007d00 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 80010702 .word 0x80010702 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000001 + 80001f54: 00053f03 ld x30,0(x10) + 80001f58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xffffffffffffffff + 80001f5c: 00053883 ld x17,0(x10) + 80001f60: 00850513 addi x10,x10,8 + +0000000080001f64 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + rol x28, x30, x17 # perform operation + 80001f64: 611f1e33 rol x28,x30,x17 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f68: 0000b203 ld x4,0(x1) + 80001f6c: 01c20c63 beq x4,x28,80001f84 + 80001f70: 591052ef jal x5,80007d00 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 80010761 .word 0x80010761 + 80001f80: 00000000 .word 0x00000000 + 80001f84: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000001 + 80001f88: 00053b03 ld x22,0(x10) + 80001f8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfffffffffffffffe + 80001f90: 00053303 ld x6,0(x10) + 80001f94: 00850513 addi x10,x10,8 + +0000000080001f98 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + rol x20, x22, x6 # perform operation + 80001f98: 606b1a33 rol x20,x22,x6 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f9c: 0000b203 ld x4,0(x1) + 80001fa0: 01420c63 beq x4,x20,80001fb8 + 80001fa4: 55d052ef jal x5,80007d00 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 800107c0 .word 0x800107c0 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001fbc: 00053a83 ld x21,0(x10) + 80001fc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80001fc4: 00053683 ld x13,0(x10) + 80001fc8: 00850513 addi x10,x10,8 + +0000000080001fcc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + rol x18, x21, x13 # perform operation + 80001fcc: 60da9933 rol x18,x21,x13 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd0: 0000b203 ld x4,0(x1) + 80001fd4: 01220c63 beq x4,x18,80001fec + 80001fd8: 529052ef jal x5,80007d00 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 8001081f .word 0x8001081f + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000000000001 + 80001ff0: 00053383 ld x7,0(x10) + 80001ff4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80001ff8: 00053f83 ld x31,0(x10) + 80001ffc: 00850513 addi x10,x10,8 + +0000000080002000 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + rol x26, x7, x31 # perform operation + 80002000: 61f39d33 rol x26,x7,x31 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002004: 0000b203 ld x4,0(x1) + 80002008: 01a20c63 beq x4,x26,80002020 + 8000200c: 4f5052ef jal x5,80007d00 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 8001087e .word 0x8001087e + 8000201c: 00000000 .word 0x00000000 + 80002020: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000000000001 + 80002024: 00053383 ld x7,0(x10) + 80002028: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5555555555555555 + 8000202c: 00053903 ld x18,0(x10) + 80002030: 00850513 addi x10,x10,8 + +0000000080002034 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + rol x31, x7, x18 # perform operation + 80002034: 61239fb3 rol x31,x7,x18 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002038: 0000b203 ld x4,0(x1) + 8000203c: 01f20c63 beq x4,x31,80002054 + 80002040: 4c1052ef jal x5,80007d00 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 800108dd .word 0x800108dd + 80002050: 00000000 .word 0x00000000 + 80002054: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80002058: 00053483 ld x9,0(x10) + 8000205c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000ffffffff + 80002060: 00053983 ld x19,0(x10) + 80002064: 00850513 addi x10,x10,8 + +0000000080002068 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + rol x27, x9, x19 # perform operation + 80002068: 61349db3 rol x27,x9,x19 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000206c: 0000b203 ld x4,0(x1) + 80002070: 01b20c63 beq x4,x27,80002088 + 80002074: 48d052ef jal x5,80007d00 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 8001093c .word 0x8001093c + 80002084: 00000000 .word 0x00000000 + 80002088: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000000000001 + 8000208c: 00053603 ld x12,0(x10) + 80002090: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000000fffffffe + 80002094: 00053c03 ld x24,0(x10) + 80002098: 00850513 addi x10,x10,8 + +000000008000209c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + rol x28, x12, x24 # perform operation + 8000209c: 61861e33 rol x28,x12,x24 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a0: 0000b203 ld x4,0(x1) + 800020a4: 01c20c63 beq x4,x28,800020bc + 800020a8: 459052ef jal x5,80007d00 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80010993 .word 0x80010993 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000001 + 800020c0: 00053e83 ld x29,0(x10) + 800020c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000100000000 + 800020c8: 00053403 ld x8,0(x10) + 800020cc: 00850513 addi x10,x10,8 + +00000000800020d0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + rol x18, x29, x8 # perform operation + 800020d0: 608e9933 rol x18,x29,x8 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d4: 0000b203 ld x4,0(x1) + 800020d8: 01220c63 beq x4,x18,800020f0 + 800020dc: 425052ef jal x5,80007d00 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 800109ea .word 0x800109ea + 800020ec: 00000000 .word 0x00000000 + 800020f0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000001 + 800020f4: 00053803 ld x16,0(x10) + 800020f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000001 + 800020fc: 00053783 ld x15,0(x10) + 80002100: 00850513 addi x10,x10,8 + +0000000080002104 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + rol x9, x16, x15 # perform operation + 80002104: 60f814b3 rol x9,x16,x15 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002108: 0000b203 ld x4,0(x1) + 8000210c: 00920c63 beq x4,x9,80002124 + 80002110: 3f1052ef jal x5,80007d00 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80010a42 .word 0x80010a42 + 80002120: 00000000 .word 0x00000000 + 80002124: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000002 + 80002128: 00053f03 ld x30,0(x10) + 8000212c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000000000000 + 80002130: 00053d83 ld x27,0(x10) + 80002134: 00850513 addi x10,x10,8 + +0000000080002138 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + rol x24, x30, x27 # perform operation + 80002138: 61bf1c33 rol x24,x30,x27 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000213c: 0000b203 ld x4,0(x1) + 80002140: 01820c63 beq x4,x24,80002158 + 80002144: 3bd052ef jal x5,80007d00 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80010a9a .word 0x80010a9a + 80002154: 00000000 .word 0x00000000 + 80002158: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000002 + 8000215c: 00053783 ld x15,0(x10) + 80002160: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000001 + 80002164: 00053103 ld x2,0(x10) + 80002168: 00850513 addi x10,x10,8 + +000000008000216c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + rol x20, x15, x2 # perform operation + 8000216c: 60279a33 rol x20,x15,x2 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002170: 0000b203 ld x4,0(x1) + 80002174: 01420c63 beq x4,x20,8000218c + 80002178: 389052ef jal x5,80007d00 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 80010aea .word 0x80010aea + 80002188: 00000000 .word 0x00000000 + 8000218c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000002 + 80002190: 00053c03 ld x24,0(x10) + 80002194: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000002 + 80002198: 00053983 ld x19,0(x10) + 8000219c: 00850513 addi x10,x10,8 + +00000000800021a0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + rol x17, x24, x19 # perform operation + 800021a0: 613c18b3 rol x17,x24,x19 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a4: 0000b203 ld x4,0(x1) + 800021a8: 01120c63 beq x4,x17,800021c0 + 800021ac: 355052ef jal x5,80007d00 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80010b3a .word 0x80010b3a + 800021bc: 00000000 .word 0x00000000 + 800021c0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000002 + 800021c4: 00053c03 ld x24,0(x10) + 800021c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 800021cc: 00053f83 ld x31,0(x10) + 800021d0: 00850513 addi x10,x10,8 + +00000000800021d4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + rol x2, x24, x31 # perform operation + 800021d4: 61fc1133 rol x2,x24,x31 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d8: 0000b203 ld x4,0(x1) + 800021dc: 00220c63 beq x4,x2,800021f4 + 800021e0: 321052ef jal x5,80007d00 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80010b8a .word 0x80010b8a + 800021f0: 00000000 .word 0x00000000 + 800021f4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000002 + 800021f8: 00053883 ld x17,0(x10) + 800021fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x8000000000000001 + 80002200: 00053683 ld x13,0(x10) + 80002204: 00850513 addi x10,x10,8 + +0000000080002208 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + rol x31, x17, x13 # perform operation + 80002208: 60d89fb3 rol x31,x17,x13 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 8000220c: 0000b203 ld x4,0(x1) + 80002210: 01f20c63 beq x4,x31,80002228 + 80002214: 2ed052ef jal x5,80007d00 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80010be9 .word 0x80010be9 + 80002224: 00000000 .word 0x00000000 + 80002228: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000002 + 8000222c: 00053683 ld x13,0(x10) + 80002230: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7fffffffffffffff + 80002234: 00053e83 ld x29,0(x10) + 80002238: 00850513 addi x10,x10,8 + +000000008000223c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + rol x24, x13, x29 # perform operation + 8000223c: 61d69c33 rol x24,x13,x29 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002240: 0000b203 ld x4,0(x1) + 80002244: 01820c63 beq x4,x24,8000225c + 80002248: 2b9052ef jal x5,80007d00 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80010c48 .word 0x80010c48 + 80002258: 00000000 .word 0x00000000 + 8000225c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000002 + 80002260: 00053983 ld x19,0(x10) + 80002264: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7ffffffffffffffe + 80002268: 00053b03 ld x22,0(x10) + 8000226c: 00850513 addi x10,x10,8 + +0000000080002270 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + rol x16, x19, x22 # perform operation + 80002270: 61699833 rol x16,x19,x22 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002274: 0000b203 ld x4,0(x1) + 80002278: 01020c63 beq x4,x16,80002290 + 8000227c: 285052ef jal x5,80007d00 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80010ca7 .word 0x80010ca7 + 8000228c: 00000000 .word 0x00000000 + 80002290: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 80002294: 00053803 ld x16,0(x10) + 80002298: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffffffffffff + 8000229c: 00053b83 ld x23,0(x10) + 800022a0: 00850513 addi x10,x10,8 + +00000000800022a4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + rol x8, x16, x23 # perform operation + 800022a4: 61781433 rol x8,x16,x23 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a8: 0000b203 ld x4,0(x1) + 800022ac: 00820c63 beq x4,x8,800022c4 + 800022b0: 251052ef jal x5,80007d00 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80010d06 .word 0x80010d06 + 800022c0: 00000000 .word 0x00000000 + 800022c4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000002 + 800022c8: 00053583 ld x11,0(x10) + 800022cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xfffffffffffffffe + 800022d0: 00053383 ld x7,0(x10) + 800022d4: 00850513 addi x10,x10,8 + +00000000800022d8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + rol x9, x11, x7 # perform operation + 800022d8: 607594b3 rol x9,x11,x7 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022dc: 0000b203 ld x4,0(x1) + 800022e0: 00920c63 beq x4,x9,800022f8 + 800022e4: 21d052ef jal x5,80007d00 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 80010d65 .word 0x80010d65 + 800022f4: 00000000 .word 0x00000000 + 800022f8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000002 + 800022fc: 00053703 ld x14,0(x10) + 80002300: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002304: 00053c03 ld x24,0(x10) + 80002308: 00850513 addi x10,x10,8 + +000000008000230c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + rol x29, x14, x24 # perform operation + 8000230c: 61871eb3 rol x29,x14,x24 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002310: 0000b203 ld x4,0(x1) + 80002314: 01d20c63 beq x4,x29,8000232c + 80002318: 1e9052ef jal x5,80007d00 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80010dc4 .word 0x80010dc4 + 80002328: 00000000 .word 0x00000000 + 8000232c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000002 + 80002330: 00053f83 ld x31,0(x10) + 80002334: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80002338: 00053e83 ld x29,0(x10) + 8000233c: 00850513 addi x10,x10,8 + +0000000080002340 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + rol x11, x31, x29 # perform operation + 80002340: 61df95b3 rol x11,x31,x29 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002344: 0000b203 ld x4,0(x1) + 80002348: 00b20c63 beq x4,x11,80002360 + 8000234c: 1b5052ef jal x5,80007d00 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 80010e23 .word 0x80010e23 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 80002364: 00053e83 ld x29,0(x10) + 80002368: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5555555555555555 + 8000236c: 00053703 ld x14,0(x10) + 80002370: 00850513 addi x10,x10,8 + +0000000080002374 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + rol x6, x29, x14 # perform operation + 80002374: 60ee9333 rol x6,x29,x14 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002378: 0000b203 ld x4,0(x1) + 8000237c: 00620c63 beq x4,x6,80002394 + 80002380: 181052ef jal x5,80007d00 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 80010e82 .word 0x80010e82 + 80002390: 00000000 .word 0x00000000 + 80002394: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 80002398: 00053803 ld x16,0(x10) + 8000239c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000ffffffff + 800023a0: 00053483 ld x9,0(x10) + 800023a4: 00850513 addi x10,x10,8 + +00000000800023a8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + rol x8, x16, x9 # perform operation + 800023a8: 60981433 rol x8,x16,x9 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023ac: 0000b203 ld x4,0(x1) + 800023b0: 00820c63 beq x4,x8,800023c8 + 800023b4: 14d052ef jal x5,80007d00 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 80010ee1 .word 0x80010ee1 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000002 + 800023cc: 00053683 ld x13,0(x10) + 800023d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 800023d4: 00053483 ld x9,0(x10) + 800023d8: 00850513 addi x10,x10,8 + +00000000800023dc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + rol x3, x13, x9 # perform operation + 800023dc: 609691b3 rol x3,x13,x9 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e0: 0000b203 ld x4,0(x1) + 800023e4: 00320c63 beq x4,x3,800023fc + 800023e8: 119052ef jal x5,80007d00 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 80010f38 .word 0x80010f38 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000002 + 80002400: 00053583 ld x11,0(x10) + 80002404: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000100000000 + 80002408: 00053383 ld x7,0(x10) + 8000240c: 00850513 addi x10,x10,8 + +0000000080002410 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + rol x16, x11, x7 # perform operation + 80002410: 60759833 rol x16,x11,x7 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002414: 0000b203 ld x4,0(x1) + 80002418: 01020c63 beq x4,x16,80002430 + 8000241c: 0e5052ef jal x5,80007d00 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 80010f8f .word 0x80010f8f + 8000242c: 00000000 .word 0x00000000 + 80002430: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000002 + 80002434: 00053f03 ld x30,0(x10) + 80002438: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000100000001 + 8000243c: 00053f83 ld x31,0(x10) + 80002440: 00850513 addi x10,x10,8 + +0000000080002444 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + rol x19, x30, x31 # perform operation + 80002444: 61ff19b3 rol x19,x30,x31 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002448: 0000b203 ld x4,0(x1) + 8000244c: 01320c63 beq x4,x19,80002464 + 80002450: 0b1052ef jal x5,80007d00 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 80010fe7 .word 0x80010fe7 + 80002460: 00000000 .word 0x00000000 + 80002464: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000000 + 80002468: 00053f03 ld x30,0(x10) + 8000246c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 80002470: 00053683 ld x13,0(x10) + 80002474: 00850513 addi x10,x10,8 + +0000000080002478 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + rol x23, x30, x13 # perform operation + 80002478: 60df1bb3 rol x23,x30,x13 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000247c: 0000b203 ld x4,0(x1) + 80002480: 01720c63 beq x4,x23,80002498 + 80002484: 07d052ef jal x5,80007d00 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 8001103f .word 0x8001103f + 80002494: 00000000 .word 0x00000000 + 80002498: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000000 + 8000249c: 00053c03 ld x24,0(x10) + 800024a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000000000001 + 800024a4: 00053d83 ld x27,0(x10) + 800024a8: 00850513 addi x10,x10,8 + +00000000800024ac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + rol x30, x24, x27 # perform operation + 800024ac: 61bc1f33 rol x30,x24,x27 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b0: 0000b203 ld x4,0(x1) + 800024b4: 01e20c63 beq x4,x30,800024cc + 800024b8: 049052ef jal x5,80007d00 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 8001109e .word 0x8001109e + 800024c8: 00000000 .word 0x00000000 + 800024cc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x8000000000000000 + 800024d0: 00053c83 ld x25,0(x10) + 800024d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000002 + 800024d8: 00053183 ld x3,0(x10) + 800024dc: 00850513 addi x10,x10,8 + +00000000800024e0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + rol x15, x25, x3 # perform operation + 800024e0: 603c97b3 rol x15,x25,x3 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e4: 0000b203 ld x4,0(x1) + 800024e8: 00f20c63 beq x4,x15,80002500 + 800024ec: 015052ef jal x5,80007d00 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 800110fd .word 0x800110fd + 800024fc: 00000000 .word 0x00000000 + 80002500: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000000 + 80002504: 00053c03 ld x24,0(x10) + 80002508: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8000000000000000 + 8000250c: 00053e03 ld x28,0(x10) + 80002510: 00850513 addi x10,x10,8 + +0000000080002514 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + rol x13, x24, x28 # perform operation + 80002514: 61cc16b3 rol x13,x24,x28 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002518: 0000b203 ld x4,0(x1) + 8000251c: 00d20c63 beq x4,x13,80002534 + 80002520: 7e0052ef jal x5,80007d00 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 8001115c .word 0x8001115c + 80002530: 00000000 .word 0x00000000 + 80002534: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000000 + 80002538: 00053f83 ld x31,0(x10) + 8000253c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8000000000000001 + 80002540: 00053983 ld x19,0(x10) + 80002544: 00850513 addi x10,x10,8 + +0000000080002548 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + rol x24, x31, x19 # perform operation + 80002548: 613f9c33 rol x24,x31,x19 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000254c: 0000b203 ld x4,0(x1) + 80002550: 01820c63 beq x4,x24,80002568 + 80002554: 7ac052ef jal x5,80007d00 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 800111ca .word 0x800111ca + 80002564: 00000000 .word 0x00000000 + 80002568: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x8000000000000000 + 8000256c: 00053b83 ld x23,0(x10) + 80002570: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x7fffffffffffffff + 80002574: 00053f03 ld x30,0(x10) + 80002578: 00850513 addi x10,x10,8 + +000000008000257c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + rol x8, x23, x30 # perform operation + 8000257c: 61eb9433 rol x8,x23,x30 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002580: 0000b203 ld x4,0(x1) + 80002584: 00820c63 beq x4,x8,8000259c + 80002588: 778052ef jal x5,80007d00 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 80011238 .word 0x80011238 + 80002598: 00000000 .word 0x00000000 + 8000259c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8000000000000000 + 800025a0: 00053303 ld x6,0(x10) + 800025a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x7ffffffffffffffe + 800025a8: 00053403 ld x8,0(x10) + 800025ac: 00850513 addi x10,x10,8 + +00000000800025b0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + rol x26, x6, x8 # perform operation + 800025b0: 60831d33 rol x26,x6,x8 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b4: 0000b203 ld x4,0(x1) + 800025b8: 01a20c63 beq x4,x26,800025d0 + 800025bc: 744052ef jal x5,80007d00 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 800112a6 .word 0x800112a6 + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 800025d4: 00053683 ld x13,0(x10) + 800025d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xffffffffffffffff + 800025dc: 00053383 ld x7,0(x10) + 800025e0: 00850513 addi x10,x10,8 + +00000000800025e4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + rol x6, x13, x7 # perform operation + 800025e4: 60769333 rol x6,x13,x7 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e8: 0000b203 ld x4,0(x1) + 800025ec: 00620c63 beq x4,x6,80002604 + 800025f0: 710052ef jal x5,80007d00 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 80011314 .word 0x80011314 + 80002600: 00000000 .word 0x00000000 + 80002604: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 80002608: 00053683 ld x13,0(x10) + 8000260c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xfffffffffffffffe + 80002610: 00053f03 ld x30,0(x10) + 80002614: 00850513 addi x10,x10,8 + +0000000080002618 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + rol x29, x13, x30 # perform operation + 80002618: 61e69eb3 rol x29,x13,x30 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000261c: 0000b203 ld x4,0(x1) + 80002620: 01d20c63 beq x4,x29,80002638 + 80002624: 6dc052ef jal x5,80007d00 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 80011382 .word 0x80011382 + 80002634: 00000000 .word 0x00000000 + 80002638: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000000 + 8000263c: 00053c03 ld x24,0(x10) + 80002640: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 80002644: 00053403 ld x8,0(x10) + 80002648: 00850513 addi x10,x10,8 + +000000008000264c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + rol x27, x24, x8 # perform operation + 8000264c: 608c1db3 rol x27,x24,x8 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002650: 0000b203 ld x4,0(x1) + 80002654: 01b20c63 beq x4,x27,8000266c + 80002658: 6a8052ef jal x5,80007d00 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 800113f0 .word 0x800113f0 + 80002668: 00000000 .word 0x00000000 + 8000266c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000000 + 80002670: 00053d83 ld x27,0(x10) + 80002674: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80002678: 00053683 ld x13,0(x10) + 8000267c: 00850513 addi x10,x10,8 + +0000000080002680 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + rol x19, x27, x13 # perform operation + 80002680: 60dd99b3 rol x19,x27,x13 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002684: 0000b203 ld x4,0(x1) + 80002688: 01320c63 beq x4,x19,800026a0 + 8000268c: 674052ef jal x5,80007d00 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 8001145e .word 0x8001145e + 8000269c: 00000000 .word 0x00000000 + 800026a0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x8000000000000000 + 800026a4: 00053b83 ld x23,0(x10) + 800026a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5555555555555555 + 800026ac: 00053a83 ld x21,0(x10) + 800026b0: 00850513 addi x10,x10,8 + +00000000800026b4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + rol x12, x23, x21 # perform operation + 800026b4: 615b9633 rol x12,x23,x21 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b8: 0000b203 ld x4,0(x1) + 800026bc: 00c20c63 beq x4,x12,800026d4 + 800026c0: 640052ef jal x5,80007d00 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 800114cc .word 0x800114cc + 800026d0: 00000000 .word 0x00000000 + 800026d4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000000 + 800026d8: 00053103 ld x2,0(x10) + 800026dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000ffffffff + 800026e0: 00053903 ld x18,0(x10) + 800026e4: 00850513 addi x10,x10,8 + +00000000800026e8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + rol x28, x2, x18 # perform operation + 800026e8: 61211e33 rol x28,x2,x18 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026ec: 0000b203 ld x4,0(x1) + 800026f0: 01c20c63 beq x4,x28,80002708 + 800026f4: 60c052ef jal x5,80007d00 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 8001153a .word 0x8001153a + 80002704: 00000000 .word 0x00000000 + 80002708: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000000 + 8000270c: 00053e83 ld x29,0(x10) + 80002710: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000fffffffe + 80002714: 00053983 ld x19,0(x10) + 80002718: 00850513 addi x10,x10,8 + +000000008000271c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + rol x2, x29, x19 # perform operation + 8000271c: 613e9133 rol x2,x29,x19 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002720: 0000b203 ld x4,0(x1) + 80002724: 00220c63 beq x4,x2,8000273c + 80002728: 5d8052ef jal x5,80007d00 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 800115a0 .word 0x800115a0 + 80002738: 00000000 .word 0x00000000 + 8000273c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x8000000000000000 + 80002740: 00053e03 ld x28,0(x10) + 80002744: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000100000000 + 80002748: 00053c03 ld x24,0(x10) + 8000274c: 00850513 addi x10,x10,8 + +0000000080002750 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + rol x15, x28, x24 # perform operation + 80002750: 618e17b3 rol x15,x28,x24 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002754: 0000b203 ld x4,0(x1) + 80002758: 00f20c63 beq x4,x15,80002770 + 8000275c: 5a4052ef jal x5,80007d00 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 80011606 .word 0x80011606 + 8000276c: 00000000 .word 0x00000000 + 80002770: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 80002774: 00053683 ld x13,0(x10) + 80002778: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000100000001 + 8000277c: 00053703 ld x14,0(x10) + 80002780: 00850513 addi x10,x10,8 + +0000000080002784 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + rol x3, x13, x14 # perform operation + 80002784: 60e691b3 rol x3,x13,x14 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002788: 0000b203 ld x4,0(x1) + 8000278c: 00320c63 beq x4,x3,800027a4 + 80002790: 570052ef jal x5,80007d00 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 8001166d .word 0x8001166d + 800027a0: 00000000 .word 0x00000000 + 800027a4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000001 + 800027a8: 00053d03 ld x26,0(x10) + 800027ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000000 + 800027b0: 00053383 ld x7,0(x10) + 800027b4: 00850513 addi x10,x10,8 + +00000000800027b8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + rol x31, x26, x7 # perform operation + 800027b8: 607d1fb3 rol x31,x26,x7 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027bc: 0000b203 ld x4,0(x1) + 800027c0: 01f20c63 beq x4,x31,800027d8 + 800027c4: 53c052ef jal x5,80007d00 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 800116d4 .word 0x800116d4 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8000000000000001 + 800027dc: 00053483 ld x9,0(x10) + 800027e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000000000001 + 800027e4: 00053583 ld x11,0(x10) + 800027e8: 00850513 addi x10,x10,8 + +00000000800027ec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + rol x25, x9, x11 # perform operation + 800027ec: 60b49cb3 rol x25,x9,x11 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f0: 0000b203 ld x4,0(x1) + 800027f4: 01920c63 beq x4,x25,8000280c + 800027f8: 508052ef jal x5,80007d00 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 80011733 .word 0x80011733 + 80002808: 00000000 .word 0x00000000 + 8000280c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000001 + 80002810: 00053f03 ld x30,0(x10) + 80002814: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 80002818: 00053683 ld x13,0(x10) + 8000281c: 00850513 addi x10,x10,8 + +0000000080002820 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + rol x23, x30, x13 # perform operation + 80002820: 60df1bb3 rol x23,x30,x13 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002824: 0000b203 ld x4,0(x1) + 80002828: 01720c63 beq x4,x23,80002840 + 8000282c: 4d4052ef jal x5,80007d00 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 80011792 .word 0x80011792 + 8000283c: 00000000 .word 0x00000000 + 80002840: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000001 + 80002844: 00053d03 ld x26,0(x10) + 80002848: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000000 + 8000284c: 00053883 ld x17,0(x10) + 80002850: 00850513 addi x10,x10,8 + +0000000080002854 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + rol x19, x26, x17 # perform operation + 80002854: 611d19b3 rol x19,x26,x17 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002858: 0000b203 ld x4,0(x1) + 8000285c: 01320c63 beq x4,x19,80002874 + 80002860: 4a0052ef jal x5,80007d00 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 800117f1 .word 0x800117f1 + 80002870: 00000000 .word 0x00000000 + 80002874: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x8000000000000001 + 80002878: 00053583 ld x11,0(x10) + 8000287c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x8000000000000001 + 80002880: 00053383 ld x7,0(x10) + 80002884: 00850513 addi x10,x10,8 + +0000000080002888 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + rol x8, x11, x7 # perform operation + 80002888: 60759433 rol x8,x11,x7 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000288c: 0000b203 ld x4,0(x1) + 80002890: 00820c63 beq x4,x8,800028a8 + 80002894: 46c052ef jal x5,80007d00 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 8001185f .word 0x8001185f + 800028a4: 00000000 .word 0x00000000 + 800028a8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000001 + 800028ac: 00053f03 ld x30,0(x10) + 800028b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7fffffffffffffff + 800028b4: 00053103 ld x2,0(x10) + 800028b8: 00850513 addi x10,x10,8 + +00000000800028bc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + rol x27, x30, x2 # perform operation + 800028bc: 602f1db3 rol x27,x30,x2 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c0: 0000b203 ld x4,0(x1) + 800028c4: 01b20c63 beq x4,x27,800028dc + 800028c8: 438052ef jal x5,80007d00 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 800118cd .word 0x800118cd + 800028d8: 00000000 .word 0x00000000 + 800028dc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000001 + 800028e0: 00053c03 ld x24,0(x10) + 800028e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7ffffffffffffffe + 800028e8: 00053483 ld x9,0(x10) + 800028ec: 00850513 addi x10,x10,8 + +00000000800028f0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + rol x2, x24, x9 # perform operation + 800028f0: 609c1133 rol x2,x24,x9 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f4: 0000b203 ld x4,0(x1) + 800028f8: 00220c63 beq x4,x2,80002910 + 800028fc: 404052ef jal x5,80007d00 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 8001193b .word 0x8001193b + 8000290c: 00000000 .word 0x00000000 + 80002910: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8000000000000001 + 80002914: 00053303 ld x6,0(x10) + 80002918: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xffffffffffffffff + 8000291c: 00053d83 ld x27,0(x10) + 80002920: 00850513 addi x10,x10,8 + +0000000080002924 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + rol x3, x6, x27 # perform operation + 80002924: 61b311b3 rol x3,x6,x27 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002928: 0000b203 ld x4,0(x1) + 8000292c: 00320c63 beq x4,x3,80002944 + 80002930: 3d0052ef jal x5,80007d00 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 800119a9 .word 0x800119a9 + 80002940: 00000000 .word 0x00000000 + 80002944: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000001 + 80002948: 00053e83 ld x29,0(x10) + 8000294c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffffffffffe + 80002950: 00053683 ld x13,0(x10) + 80002954: 00850513 addi x10,x10,8 + +0000000080002958 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + rol x6, x29, x13 # perform operation + 80002958: 60de9333 rol x6,x29,x13 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000295c: 0000b203 ld x4,0(x1) + 80002960: 00620c63 beq x4,x6,80002978 + 80002964: 39c052ef jal x5,80007d00 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80011a17 .word 0x80011a17 + 80002974: 00000000 .word 0x00000000 + 80002978: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000001 + 8000297c: 00053703 ld x14,0(x10) + 80002980: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80002984: 00053183 ld x3,0(x10) + 80002988: 00850513 addi x10,x10,8 + +000000008000298c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + rol x23, x14, x3 # perform operation + 8000298c: 60371bb3 rol x23,x14,x3 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002990: 0000b203 ld x4,0(x1) + 80002994: 01720c63 beq x4,x23,800029ac + 80002998: 368052ef jal x5,80007d00 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 80011a85 .word 0x80011a85 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000001 + 800029b0: 00053703 ld x14,0(x10) + 800029b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 800029b8: 00053783 ld x15,0(x10) + 800029bc: 00850513 addi x10,x10,8 + +00000000800029c0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + rol x30, x14, x15 # perform operation + 800029c0: 60f71f33 rol x30,x14,x15 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c4: 0000b203 ld x4,0(x1) + 800029c8: 01e20c63 beq x4,x30,800029e0 + 800029cc: 334052ef jal x5,80007d00 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80011af3 .word 0x80011af3 + 800029dc: 00000000 .word 0x00000000 + 800029e0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000001 + 800029e4: 00053f83 ld x31,0(x10) + 800029e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5555555555555555 + 800029ec: 00053303 ld x6,0(x10) + 800029f0: 00850513 addi x10,x10,8 + +00000000800029f4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + rol x24, x31, x6 # perform operation + 800029f4: 606f9c33 rol x24,x31,x6 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f8: 0000b203 ld x4,0(x1) + 800029fc: 01820c63 beq x4,x24,80002a14 + 80002a00: 300052ef jal x5,80007d00 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80011b61 .word 0x80011b61 + 80002a10: 00000000 .word 0x00000000 + 80002a14: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000001 + 80002a18: 00053a03 ld x20,0(x10) + 80002a1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000ffffffff + 80002a20: 00053703 ld x14,0(x10) + 80002a24: 00850513 addi x10,x10,8 + +0000000080002a28 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + rol x3, x20, x14 # perform operation + 80002a28: 60ea11b3 rol x3,x20,x14 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a2c: 0000b203 ld x4,0(x1) + 80002a30: 00320c63 beq x4,x3,80002a48 + 80002a34: 2cc052ef jal x5,80007d00 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80011bcf .word 0x80011bcf + 80002a44: 00000000 .word 0x00000000 + 80002a48: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8000000000000001 + 80002a4c: 00053183 ld x3,0(x10) + 80002a50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000fffffffe + 80002a54: 00053903 ld x18,0(x10) + 80002a58: 00850513 addi x10,x10,8 + +0000000080002a5c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + rol x24, x3, x18 # perform operation + 80002a5c: 61219c33 rol x24,x3,x18 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a60: 0000b203 ld x4,0(x1) + 80002a64: 01820c63 beq x4,x24,80002a7c + 80002a68: 298052ef jal x5,80007d00 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80011c35 .word 0x80011c35 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000001 + 80002a80: 00053703 ld x14,0(x10) + 80002a84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000100000000 + 80002a88: 00053383 ld x7,0(x10) + 80002a8c: 00850513 addi x10,x10,8 + +0000000080002a90 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + rol x28, x14, x7 # perform operation + 80002a90: 60771e33 rol x28,x14,x7 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a94: 0000b203 ld x4,0(x1) + 80002a98: 01c20c63 beq x4,x28,80002ab0 + 80002a9c: 264052ef jal x5,80007d00 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 80011c9b .word 0x80011c9b + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000001 + 80002ab4: 00053103 ld x2,0(x10) + 80002ab8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000100000001 + 80002abc: 00053f03 ld x30,0(x10) + 80002ac0: 00850513 addi x10,x10,8 + +0000000080002ac4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + rol x7, x2, x30 # perform operation + 80002ac4: 61e113b3 rol x7,x2,x30 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac8: 0000b203 ld x4,0(x1) + 80002acc: 00720c63 beq x4,x7,80002ae4 + 80002ad0: 230052ef jal x5,80007d00 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 80011d02 .word 0x80011d02 + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002ae8: 00053e03 ld x28,0(x10) + 80002aec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000000 + 80002af0: 00053a03 ld x20,0(x10) + 80002af4: 00850513 addi x10,x10,8 + +0000000080002af8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + rol x16, x28, x20 # perform operation + 80002af8: 614e1833 rol x16,x28,x20 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002afc: 0000b203 ld x4,0(x1) + 80002b00: 01020c63 beq x4,x16,80002b18 + 80002b04: 1fc052ef jal x5,80007d00 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 80011d69 .word 0x80011d69 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002b1c: 00053d03 ld x26,0(x10) + 80002b20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000001 + 80002b24: 00053e03 ld x28,0(x10) + 80002b28: 00850513 addi x10,x10,8 + +0000000080002b2c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + rol x17, x26, x28 # perform operation + 80002b2c: 61cd18b3 rol x17,x26,x28 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b30: 0000b203 ld x4,0(x1) + 80002b34: 01120c63 beq x4,x17,80002b4c + 80002b38: 1c8052ef jal x5,80007d00 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 80011dc8 .word 0x80011dc8 + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002b50: 00053c83 ld x25,0(x10) + 80002b54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000000000002 + 80002b58: 00053d83 ld x27,0(x10) + 80002b5c: 00850513 addi x10,x10,8 + +0000000080002b60 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + rol x24, x25, x27 # perform operation + 80002b60: 61bc9c33 rol x24,x25,x27 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b64: 0000b203 ld x4,0(x1) + 80002b68: 01820c63 beq x4,x24,80002b80 + 80002b6c: 194052ef jal x5,80007d00 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 80011e27 .word 0x80011e27 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002b84: 00053883 ld x17,0(x10) + 80002b88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x8000000000000000 + 80002b8c: 00053683 ld x13,0(x10) + 80002b90: 00850513 addi x10,x10,8 + +0000000080002b94 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + rol x19, x17, x13 # perform operation + 80002b94: 60d899b3 rol x19,x17,x13 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b98: 0000b203 ld x4,0(x1) + 80002b9c: 01320c63 beq x4,x19,80002bb4 + 80002ba0: 160052ef jal x5,80007d00 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 80011e86 .word 0x80011e86 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002bb8: 00053d03 ld x26,0(x10) + 80002bbc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x8000000000000001 + 80002bc0: 00053183 ld x3,0(x10) + 80002bc4: 00850513 addi x10,x10,8 + +0000000080002bc8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + rol x30, x26, x3 # perform operation + 80002bc8: 603d1f33 rol x30,x26,x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bcc: 0000b203 ld x4,0(x1) + 80002bd0: 01e20c63 beq x4,x30,80002be8 + 80002bd4: 12c052ef jal x5,80007d00 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80011ef4 .word 0x80011ef4 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002bec: 00053603 ld x12,0(x10) + 80002bf0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7fffffffffffffff + 80002bf4: 00053a83 ld x21,0(x10) + 80002bf8: 00850513 addi x10,x10,8 + +0000000080002bfc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + rol x17, x12, x21 # perform operation + 80002bfc: 615618b3 rol x17,x12,x21 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c00: 0000b203 ld x4,0(x1) + 80002c04: 01120c63 beq x4,x17,80002c1c + 80002c08: 0f8052ef jal x5,80007d00 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 80011f62 .word 0x80011f62 + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002c20: 00053703 ld x14,0(x10) + 80002c24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80002c28: 00053883 ld x17,0(x10) + 80002c2c: 00850513 addi x10,x10,8 + +0000000080002c30 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + rol x28, x14, x17 # perform operation + 80002c30: 61171e33 rol x28,x14,x17 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c34: 0000b203 ld x4,0(x1) + 80002c38: 01c20c63 beq x4,x28,80002c50 + 80002c3c: 0c4052ef jal x5,80007d00 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 80011fd0 .word 0x80011fd0 + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002c54: 00053f03 ld x30,0(x10) + 80002c58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xffffffffffffffff + 80002c5c: 00053483 ld x9,0(x10) + 80002c60: 00850513 addi x10,x10,8 + +0000000080002c64 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + rol x6, x30, x9 # perform operation + 80002c64: 609f1333 rol x6,x30,x9 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c68: 0000b203 ld x4,0(x1) + 80002c6c: 00620c63 beq x4,x6,80002c84 + 80002c70: 090052ef jal x5,80007d00 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 8001203e .word 0x8001203e + 80002c80: 00000000 .word 0x00000000 + 80002c84: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c88: 00053a83 ld x21,0(x10) + 80002c8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffffffffffe + 80002c90: 00053883 ld x17,0(x10) + 80002c94: 00850513 addi x10,x10,8 + +0000000080002c98 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + rol x15, x21, x17 # perform operation + 80002c98: 611a97b3 rol x15,x21,x17 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c9c: 0000b203 ld x4,0(x1) + 80002ca0: 00f20c63 beq x4,x15,80002cb8 + 80002ca4: 05c052ef jal x5,80007d00 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 800120ac .word 0x800120ac + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002cbc: 00053183 ld x3,0(x10) + 80002cc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80002cc4: 00053b83 ld x23,0(x10) + 80002cc8: 00850513 addi x10,x10,8 + +0000000080002ccc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + rol x9, x3, x23 # perform operation + 80002ccc: 617194b3 rol x9,x3,x23 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd0: 0000b203 ld x4,0(x1) + 80002cd4: 00920c63 beq x4,x9,80002cec + 80002cd8: 028052ef jal x5,80007d00 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 8001211a .word 0x8001211a + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002cf0: 00053683 ld x13,0(x10) + 80002cf4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 80002cf8: 00053d83 ld x27,0(x10) + 80002cfc: 00850513 addi x10,x10,8 + +0000000080002d00 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + rol x9, x13, x27 # perform operation + 80002d00: 61b694b3 rol x9,x13,x27 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d04: 0000b203 ld x4,0(x1) + 80002d08: 00920c63 beq x4,x9,80002d20 + 80002d0c: 7f5042ef jal x5,80007d00 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 80012188 .word 0x80012188 + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002d24: 00053783 ld x15,0(x10) + 80002d28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5555555555555555 + 80002d2c: 00053d83 ld x27,0(x10) + 80002d30: 00850513 addi x10,x10,8 + +0000000080002d34 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + rol x25, x15, x27 # perform operation + 80002d34: 61b79cb3 rol x25,x15,x27 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d38: 0000b203 ld x4,0(x1) + 80002d3c: 01920c63 beq x4,x25,80002d54 + 80002d40: 7c1042ef jal x5,80007d00 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 800121f6 .word 0x800121f6 + 80002d50: 00000000 .word 0x00000000 + 80002d54: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002d58: 00053a83 ld x21,0(x10) + 80002d5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000ffffffff + 80002d60: 00053c83 ld x25,0(x10) + 80002d64: 00850513 addi x10,x10,8 + +0000000080002d68 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + rol x19, x21, x25 # perform operation + 80002d68: 619a99b3 rol x19,x21,x25 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d6c: 0000b203 ld x4,0(x1) + 80002d70: 01320c63 beq x4,x19,80002d88 + 80002d74: 78d042ef jal x5,80007d00 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 80012264 .word 0x80012264 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x7fffffffffffffff + 80002d8c: 00053403 ld x8,0(x10) + 80002d90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000fffffffe + 80002d94: 00053903 ld x18,0(x10) + 80002d98: 00850513 addi x10,x10,8 + +0000000080002d9c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + rol x30, x8, x18 # perform operation + 80002d9c: 61241f33 rol x30,x8,x18 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da0: 0000b203 ld x4,0(x1) + 80002da4: 01e20c63 beq x4,x30,80002dbc + 80002da8: 759042ef jal x5,80007d00 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 800122ca .word 0x800122ca + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002dc0: 00053703 ld x14,0(x10) + 80002dc4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000000 + 80002dc8: 00053783 ld x15,0(x10) + 80002dcc: 00850513 addi x10,x10,8 + +0000000080002dd0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + rol x24, x14, x15 # perform operation + 80002dd0: 60f71c33 rol x24,x14,x15 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd4: 0000b203 ld x4,0(x1) + 80002dd8: 01820c63 beq x4,x24,80002df0 + 80002ddc: 725042ef jal x5,80007d00 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 80012330 .word 0x80012330 + 80002dec: 00000000 .word 0x00000000 + 80002df0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002df4: 00053483 ld x9,0(x10) + 80002df8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80002dfc: 00053a83 ld x21,0(x10) + 80002e00: 00850513 addi x10,x10,8 + +0000000080002e04 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + rol x24, x9, x21 # perform operation + 80002e04: 61549c33 rol x24,x9,x21 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e08: 0000b203 ld x4,0(x1) + 80002e0c: 01820c63 beq x4,x24,80002e24 + 80002e10: 6f1042ef jal x5,80007d00 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 80012397 .word 0x80012397 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002e28: 00053c03 ld x24,0(x10) + 80002e2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000000000000 + 80002e30: 00053583 ld x11,0(x10) + 80002e34: 00850513 addi x10,x10,8 + +0000000080002e38 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + rol x21, x24, x11 # perform operation + 80002e38: 60bc1ab3 rol x21,x24,x11 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e3c: 0000b203 ld x4,0(x1) + 80002e40: 01520c63 beq x4,x21,80002e58 + 80002e44: 6bd042ef jal x5,80007d00 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 800123fe .word 0x800123fe + 80002e54: 00000000 .word 0x00000000 + 80002e58: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002e5c: 00053583 ld x11,0(x10) + 80002e60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000001 + 80002e64: 00053903 ld x18,0(x10) + 80002e68: 00850513 addi x10,x10,8 + +0000000080002e6c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + rol x19, x11, x18 # perform operation + 80002e6c: 612599b3 rol x19,x11,x18 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e70: 0000b203 ld x4,0(x1) + 80002e74: 01320c63 beq x4,x19,80002e8c + 80002e78: 689042ef jal x5,80007d00 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 8001245d .word 0x8001245d + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80002e90: 00053383 ld x7,0(x10) + 80002e94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000002 + 80002e98: 00053e83 ld x29,0(x10) + 80002e9c: 00850513 addi x10,x10,8 + +0000000080002ea0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + rol x20, x7, x29 # perform operation + 80002ea0: 61d39a33 rol x20,x7,x29 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea4: 0000b203 ld x4,0(x1) + 80002ea8: 01420c63 beq x4,x20,80002ec0 + 80002eac: 655042ef jal x5,80007d00 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 800124bc .word 0x800124bc + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002ec4: 00053f83 ld x31,0(x10) + 80002ec8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000000 + 80002ecc: 00053103 ld x2,0(x10) + 80002ed0: 00850513 addi x10,x10,8 + +0000000080002ed4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + rol x26, x31, x2 # perform operation + 80002ed4: 602f9d33 rol x26,x31,x2 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed8: 0000b203 ld x4,0(x1) + 80002edc: 01a20c63 beq x4,x26,80002ef4 + 80002ee0: 621042ef jal x5,80007d00 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 8001251b .word 0x8001251b + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002ef8: 00053683 ld x13,0(x10) + 80002efc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80002f00: 00053303 ld x6,0(x10) + 80002f04: 00850513 addi x10,x10,8 + +0000000080002f08 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + rol x9, x13, x6 # perform operation + 80002f08: 606694b3 rol x9,x13,x6 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f0c: 0000b203 ld x4,0(x1) + 80002f10: 00920c63 beq x4,x9,80002f28 + 80002f14: 5ed042ef jal x5,80007d00 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 80012589 .word 0x80012589 + 80002f24: 00000000 .word 0x00000000 + 80002f28: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002f2c: 00053a03 ld x20,0(x10) + 80002f30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7fffffffffffffff + 80002f34: 00053c83 ld x25,0(x10) + 80002f38: 00850513 addi x10,x10,8 + +0000000080002f3c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + rol x16, x20, x25 # perform operation + 80002f3c: 619a1833 rol x16,x20,x25 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f40: 0000b203 ld x4,0(x1) + 80002f44: 01020c63 beq x4,x16,80002f5c + 80002f48: 5b9042ef jal x5,80007d00 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 800125f7 .word 0x800125f7 + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002f60: 00053d83 ld x27,0(x10) + 80002f64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002f68: 00053a03 ld x20,0(x10) + 80002f6c: 00850513 addi x10,x10,8 + +0000000080002f70 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + rol x6, x27, x20 # perform operation + 80002f70: 614d9333 rol x6,x27,x20 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f74: 0000b203 ld x4,0(x1) + 80002f78: 00620c63 beq x4,x6,80002f90 + 80002f7c: 585042ef jal x5,80007d00 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 80012665 .word 0x80012665 + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002f94: 00053e83 ld x29,0(x10) + 80002f98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xffffffffffffffff + 80002f9c: 00053a83 ld x21,0(x10) + 80002fa0: 00850513 addi x10,x10,8 + +0000000080002fa4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + rol x26, x29, x21 # perform operation + 80002fa4: 615e9d33 rol x26,x29,x21 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa8: 0000b203 ld x4,0(x1) + 80002fac: 01a20c63 beq x4,x26,80002fc4 + 80002fb0: 551042ef jal x5,80007d00 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 800126d3 .word 0x800126d3 + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002fc8: 00053683 ld x13,0(x10) + 80002fcc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xfffffffffffffffe + 80002fd0: 00053703 ld x14,0(x10) + 80002fd4: 00850513 addi x10,x10,8 + +0000000080002fd8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + rol x9, x13, x14 # perform operation + 80002fd8: 60e694b3 rol x9,x13,x14 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fdc: 0000b203 ld x4,0(x1) + 80002fe0: 00920c63 beq x4,x9,80002ff8 + 80002fe4: 51d042ef jal x5,80007d00 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 80012741 .word 0x80012741 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002ffc: 00053703 ld x14,0(x10) + 80003000: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003004: 00053103 ld x2,0(x10) + 80003008: 00850513 addi x10,x10,8 + +000000008000300c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + rol x22, x14, x2 # perform operation + 8000300c: 60271b33 rol x22,x14,x2 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003010: 0000b203 ld x4,0(x1) + 80003014: 01620c63 beq x4,x22,8000302c + 80003018: 4e9042ef jal x5,80007d00 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 800127af .word 0x800127af + 80003028: 00000000 .word 0x00000000 + 8000302c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80003030: 00053b83 ld x23,0(x10) + 80003034: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80003038: 00053e83 ld x29,0(x10) + 8000303c: 00850513 addi x10,x10,8 + +0000000080003040 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + rol x11, x23, x29 # perform operation + 80003040: 61db95b3 rol x11,x23,x29 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003044: 0000b203 ld x4,0(x1) + 80003048: 00b20c63 beq x4,x11,80003060 + 8000304c: 4b5042ef jal x5,80007d00 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 8001281d .word 0x8001281d + 8000305c: 00000000 .word 0x00000000 + 80003060: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80003064: 00053883 ld x17,0(x10) + 80003068: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x5555555555555555 + 8000306c: 00053f03 ld x30,0(x10) + 80003070: 00850513 addi x10,x10,8 + +0000000080003074 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + rol x19, x17, x30 # perform operation + 80003074: 61e899b3 rol x19,x17,x30 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003078: 0000b203 ld x4,0(x1) + 8000307c: 01320c63 beq x4,x19,80003094 + 80003080: 481042ef jal x5,80007d00 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 8001288b .word 0x8001288b + 80003090: 00000000 .word 0x00000000 + 80003094: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80003098: 00053383 ld x7,0(x10) + 8000309c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000000ffffffff + 800030a0: 00053c03 ld x24,0(x10) + 800030a4: 00850513 addi x10,x10,8 + +00000000800030a8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + rol x13, x7, x24 # perform operation + 800030a8: 618396b3 rol x13,x7,x24 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030ac: 0000b203 ld x4,0(x1) + 800030b0: 00d20c63 beq x4,x13,800030c8 + 800030b4: 44d042ef jal x5,80007d00 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 800128f9 .word 0x800128f9 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7ffffffffffffffe + 800030cc: 00053603 ld x12,0(x10) + 800030d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x00000000fffffffe + 800030d4: 00053583 ld x11,0(x10) + 800030d8: 00850513 addi x10,x10,8 + +00000000800030dc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + rol x3, x12, x11 # perform operation + 800030dc: 60b611b3 rol x3,x12,x11 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e0: 0000b203 ld x4,0(x1) + 800030e4: 00320c63 beq x4,x3,800030fc + 800030e8: 419042ef jal x5,80007d00 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 8001295f .word 0x8001295f + 800030f8: 00000000 .word 0x00000000 + 800030fc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80003100: 00053f03 ld x30,0(x10) + 80003104: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000000 + 80003108: 00053c83 ld x25,0(x10) + 8000310c: 00850513 addi x10,x10,8 + +0000000080003110 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + rol x11, x30, x25 # perform operation + 80003110: 619f15b3 rol x11,x30,x25 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003114: 0000b203 ld x4,0(x1) + 80003118: 00b20c63 beq x4,x11,80003130 + 8000311c: 3e5042ef jal x5,80007d00 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 800129c5 .word 0x800129c5 + 8000312c: 00000000 .word 0x00000000 + 80003130: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80003134: 00053b83 ld x23,0(x10) + 80003138: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000100000001 + 8000313c: 00053583 ld x11,0(x10) + 80003140: 00850513 addi x10,x10,8 + +0000000080003144 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + rol x30, x23, x11 # perform operation + 80003144: 60bb9f33 rol x30,x23,x11 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003148: 0000b203 ld x4,0(x1) + 8000314c: 01e20c63 beq x4,x30,80003164 + 80003150: 3b1042ef jal x5,80007d00 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 80012a2c .word 0x80012a2c + 80003160: 00000000 .word 0x00000000 + 80003164: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xffffffffffffffff + 80003168: 00053a83 ld x21,0(x10) + 8000316c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000000 + 80003170: 00053d03 ld x26,0(x10) + 80003174: 00850513 addi x10,x10,8 + +0000000080003178 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + rol x30, x21, x26 # perform operation + 80003178: 61aa9f33 rol x30,x21,x26 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000317c: 0000b203 ld x4,0(x1) + 80003180: 01e20c63 beq x4,x30,80003198 + 80003184: 37d042ef jal x5,80007d00 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 80012a93 .word 0x80012a93 + 80003194: 00000000 .word 0x00000000 + 80003198: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xffffffffffffffff + 8000319c: 00053603 ld x12,0(x10) + 800031a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000001 + 800031a4: 00053b03 ld x22,0(x10) + 800031a8: 00850513 addi x10,x10,8 + +00000000800031ac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + rol x7, x12, x22 # perform operation + 800031ac: 616613b3 rol x7,x12,x22 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b0: 0000b203 ld x4,0(x1) + 800031b4: 00720c63 beq x4,x7,800031cc + 800031b8: 349042ef jal x5,80007d00 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80012af2 .word 0x80012af2 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffffffffffff + 800031d0: 00053b83 ld x23,0(x10) + 800031d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000000000002 + 800031d8: 00053483 ld x9,0(x10) + 800031dc: 00850513 addi x10,x10,8 + +00000000800031e0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + rol x19, x23, x9 # perform operation + 800031e0: 609b99b3 rol x19,x23,x9 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e4: 0000b203 ld x4,0(x1) + 800031e8: 01320c63 beq x4,x19,80003200 + 800031ec: 315042ef jal x5,80007d00 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 80012b51 .word 0x80012b51 + 800031fc: 00000000 .word 0x00000000 + 80003200: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xffffffffffffffff + 80003204: 00053d83 ld x27,0(x10) + 80003208: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x8000000000000000 + 8000320c: 00053383 ld x7,0(x10) + 80003210: 00850513 addi x10,x10,8 + +0000000080003214 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + rol x25, x27, x7 # perform operation + 80003214: 607d9cb3 rol x25,x27,x7 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003218: 0000b203 ld x4,0(x1) + 8000321c: 01920c63 beq x4,x25,80003234 + 80003220: 2e1042ef jal x5,80007d00 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 80012bb0 .word 0x80012bb0 + 80003230: 00000000 .word 0x00000000 + 80003234: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xffffffffffffffff + 80003238: 00053c83 ld x25,0(x10) + 8000323c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000001 + 80003240: 00053d83 ld x27,0(x10) + 80003244: 00850513 addi x10,x10,8 + +0000000080003248 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + rol x6, x25, x27 # perform operation + 80003248: 61bc9333 rol x6,x25,x27 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000324c: 0000b203 ld x4,0(x1) + 80003250: 00620c63 beq x4,x6,80003268 + 80003254: 2ad042ef jal x5,80007d00 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 80012c1e .word 0x80012c1e + 80003264: 00000000 .word 0x00000000 + 80003268: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xffffffffffffffff + 8000326c: 00053683 ld x13,0(x10) + 80003270: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7fffffffffffffff + 80003274: 00053a83 ld x21,0(x10) + 80003278: 00850513 addi x10,x10,8 + +000000008000327c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + rol x18, x13, x21 # perform operation + 8000327c: 61569933 rol x18,x13,x21 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003280: 0000b203 ld x4,0(x1) + 80003284: 01220c63 beq x4,x18,8000329c + 80003288: 279042ef jal x5,80007d00 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80012c8c .word 0x80012c8c + 80003298: 00000000 .word 0x00000000 + 8000329c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xffffffffffffffff + 800032a0: 00053f03 ld x30,0(x10) + 800032a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffffffffffe + 800032a8: 00053c03 ld x24,0(x10) + 800032ac: 00850513 addi x10,x10,8 + +00000000800032b0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + rol x11, x30, x24 # perform operation + 800032b0: 618f15b3 rol x11,x30,x24 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b4: 0000b203 ld x4,0(x1) + 800032b8: 00b20c63 beq x4,x11,800032d0 + 800032bc: 245042ef jal x5,80007d00 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 80012cfa .word 0x80012cfa + 800032cc: 00000000 .word 0x00000000 + 800032d0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xffffffffffffffff + 800032d4: 00053403 ld x8,0(x10) + 800032d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xffffffffffffffff + 800032dc: 00053883 ld x17,0(x10) + 800032e0: 00850513 addi x10,x10,8 + +00000000800032e4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + rol x27, x8, x17 # perform operation + 800032e4: 61141db3 rol x27,x8,x17 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e8: 0000b203 ld x4,0(x1) + 800032ec: 01b20c63 beq x4,x27,80003304 + 800032f0: 211042ef jal x5,80007d00 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 80012d68 .word 0x80012d68 + 80003300: 00000000 .word 0x00000000 + 80003304: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xffffffffffffffff + 80003308: 00053383 ld x7,0(x10) + 8000330c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xfffffffffffffffe + 80003310: 00053903 ld x18,0(x10) + 80003314: 00850513 addi x10,x10,8 + +0000000080003318 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + rol x30, x7, x18 # perform operation + 80003318: 61239f33 rol x30,x7,x18 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000331c: 0000b203 ld x4,0(x1) + 80003320: 01e20c63 beq x4,x30,80003338 + 80003324: 1dd042ef jal x5,80007d00 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 80012dd6 .word 0x80012dd6 + 80003334: 00000000 .word 0x00000000 + 80003338: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xffffffffffffffff + 8000333c: 00053903 ld x18,0(x10) + 80003340: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80003344: 00053e83 ld x29,0(x10) + 80003348: 00850513 addi x10,x10,8 + +000000008000334c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + rol x27, x18, x29 # perform operation + 8000334c: 61d91db3 rol x27,x18,x29 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003350: 0000b203 ld x4,0(x1) + 80003354: 01b20c63 beq x4,x27,8000336c + 80003358: 1a9042ef jal x5,80007d00 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80012e44 .word 0x80012e44 + 80003368: 00000000 .word 0x00000000 + 8000336c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xffffffffffffffff + 80003370: 00053603 ld x12,0(x10) + 80003374: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80003378: 00053103 ld x2,0(x10) + 8000337c: 00850513 addi x10,x10,8 + +0000000080003380 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + rol x29, x12, x2 # perform operation + 80003380: 60261eb3 rol x29,x12,x2 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003384: 0000b203 ld x4,0(x1) + 80003388: 01d20c63 beq x4,x29,800033a0 + 8000338c: 175042ef jal x5,80007d00 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 80012eb2 .word 0x80012eb2 + 8000339c: 00000000 .word 0x00000000 + 800033a0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xffffffffffffffff + 800033a4: 00053183 ld x3,0(x10) + 800033a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x5555555555555555 + 800033ac: 00053a03 ld x20,0(x10) + 800033b0: 00850513 addi x10,x10,8 + +00000000800033b4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + rol x9, x3, x20 # perform operation + 800033b4: 614194b3 rol x9,x3,x20 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b8: 0000b203 ld x4,0(x1) + 800033bc: 00920c63 beq x4,x9,800033d4 + 800033c0: 141042ef jal x5,80007d00 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 80012f20 .word 0x80012f20 + 800033d0: 00000000 .word 0x00000000 + 800033d4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xffffffffffffffff + 800033d8: 00053e03 ld x28,0(x10) + 800033dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000ffffffff + 800033e0: 00053d83 ld x27,0(x10) + 800033e4: 00850513 addi x10,x10,8 + +00000000800033e8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + rol x11, x28, x27 # perform operation + 800033e8: 61be15b3 rol x11,x28,x27 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033ec: 0000b203 ld x4,0(x1) + 800033f0: 00b20c63 beq x4,x11,80003408 + 800033f4: 10d042ef jal x5,80007d00 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 80012f8e .word 0x80012f8e + 80003404: 00000000 .word 0x00000000 + 80003408: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xffffffffffffffff + 8000340c: 00053b03 ld x22,0(x10) + 80003410: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000fffffffe + 80003414: 00053403 ld x8,0(x10) + 80003418: 00850513 addi x10,x10,8 + +000000008000341c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + rol x13, x22, x8 # perform operation + 8000341c: 608b16b3 rol x13,x22,x8 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003420: 0000b203 ld x4,0(x1) + 80003424: 00d20c63 beq x4,x13,8000343c + 80003428: 0d9042ef jal x5,80007d00 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 80012ff4 .word 0x80012ff4 + 80003438: 00000000 .word 0x00000000 + 8000343c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xffffffffffffffff + 80003440: 00053c83 ld x25,0(x10) + 80003444: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000000 + 80003448: 00053303 ld x6,0(x10) + 8000344c: 00850513 addi x10,x10,8 + +0000000080003450 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + rol x8, x25, x6 # perform operation + 80003450: 606c9433 rol x8,x25,x6 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003454: 0000b203 ld x4,0(x1) + 80003458: 00820c63 beq x4,x8,80003470 + 8000345c: 0a5042ef jal x5,80007d00 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 8001305a .word 0x8001305a + 8000346c: 00000000 .word 0x00000000 + 80003470: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xffffffffffffffff + 80003474: 00053a03 ld x20,0(x10) + 80003478: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000100000001 + 8000347c: 00053d83 ld x27,0(x10) + 80003480: 00850513 addi x10,x10,8 + +0000000080003484 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + rol x7, x20, x27 # perform operation + 80003484: 61ba13b3 rol x7,x20,x27 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003488: 0000b203 ld x4,0(x1) + 8000348c: 00720c63 beq x4,x7,800034a4 + 80003490: 071042ef jal x5,80007d00 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 800130c1 .word 0x800130c1 + 800034a0: 00000000 .word 0x00000000 + 800034a4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800034a8: 00053c03 ld x24,0(x10) + 800034ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 800034b0: 00053683 ld x13,0(x10) + 800034b4: 00850513 addi x10,x10,8 + +00000000800034b8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + rol x25, x24, x13 # perform operation + 800034b8: 60dc1cb3 rol x25,x24,x13 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034bc: 0000b203 ld x4,0(x1) + 800034c0: 01920c63 beq x4,x25,800034d8 + 800034c4: 03d042ef jal x5,80007d00 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80013128 .word 0x80013128 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xfffffffffffffffe + 800034dc: 00053b83 ld x23,0(x10) + 800034e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000001 + 800034e4: 00053883 ld x17,0(x10) + 800034e8: 00850513 addi x10,x10,8 + +00000000800034ec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + rol x6, x23, x17 # perform operation + 800034ec: 611b9333 rol x6,x23,x17 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f0: 0000b203 ld x4,0(x1) + 800034f4: 00620c63 beq x4,x6,8000350c + 800034f8: 009042ef jal x5,80007d00 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 80013187 .word 0x80013187 + 80003508: 00000000 .word 0x00000000 + 8000350c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfffffffffffffffe + 80003510: 00053a83 ld x21,0(x10) + 80003514: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000000000002 + 80003518: 00053403 ld x8,0(x10) + 8000351c: 00850513 addi x10,x10,8 + +0000000080003520 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + rol x3, x21, x8 # perform operation + 80003520: 608a91b3 rol x3,x21,x8 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003524: 0000b203 ld x4,0(x1) + 80003528: 00320c63 beq x4,x3,80003540 + 8000352c: 7d4042ef jal x5,80007d00 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 800131e6 .word 0x800131e6 + 8000353c: 00000000 .word 0x00000000 + 80003540: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003544: 00053d03 ld x26,0(x10) + 80003548: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8000000000000000 + 8000354c: 00053a03 ld x20,0(x10) + 80003550: 00850513 addi x10,x10,8 + +0000000080003554 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + rol x31, x26, x20 # perform operation + 80003554: 614d1fb3 rol x31,x26,x20 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003558: 0000b203 ld x4,0(x1) + 8000355c: 01f20c63 beq x4,x31,80003574 + 80003560: 7a0042ef jal x5,80007d00 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 80013245 .word 0x80013245 + 80003570: 00000000 .word 0x00000000 + 80003574: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003578: 00053483 ld x9,0(x10) + 8000357c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8000000000000001 + 80003580: 00053e03 ld x28,0(x10) + 80003584: 00850513 addi x10,x10,8 + +0000000080003588 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + rol x24, x9, x28 # perform operation + 80003588: 61c49c33 rol x24,x9,x28 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000358c: 0000b203 ld x4,0(x1) + 80003590: 01820c63 beq x4,x24,800035a8 + 80003594: 76c042ef jal x5,80007d00 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 800132b3 .word 0x800132b3 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xfffffffffffffffe + 800035ac: 00053c83 ld x25,0(x10) + 800035b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7fffffffffffffff + 800035b4: 00053103 ld x2,0(x10) + 800035b8: 00850513 addi x10,x10,8 + +00000000800035bc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + rol x17, x25, x2 # perform operation + 800035bc: 602c98b3 rol x17,x25,x2 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c0: 0000b203 ld x4,0(x1) + 800035c4: 01120c63 beq x4,x17,800035dc + 800035c8: 738042ef jal x5,80007d00 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 80013321 .word 0x80013321 + 800035d8: 00000000 .word 0x00000000 + 800035dc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffffffffffe + 800035e0: 00053883 ld x17,0(x10) + 800035e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7ffffffffffffffe + 800035e8: 00053d03 ld x26,0(x10) + 800035ec: 00850513 addi x10,x10,8 + +00000000800035f0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + rol x30, x17, x26 # perform operation + 800035f0: 61a89f33 rol x30,x17,x26 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f4: 0000b203 ld x4,0(x1) + 800035f8: 01e20c63 beq x4,x30,80003610 + 800035fc: 704042ef jal x5,80007d00 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 8001338f .word 0x8001338f + 8000360c: 00000000 .word 0x00000000 + 80003610: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xfffffffffffffffe + 80003614: 00053583 ld x11,0(x10) + 80003618: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffffffffffff + 8000361c: 00053b83 ld x23,0(x10) + 80003620: 00850513 addi x10,x10,8 + +0000000080003624 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + rol x21, x11, x23 # perform operation + 80003624: 61759ab3 rol x21,x11,x23 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003628: 0000b203 ld x4,0(x1) + 8000362c: 01520c63 beq x4,x21,80003644 + 80003630: 6d0042ef jal x5,80007d00 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 800133fd .word 0x800133fd + 80003640: 00000000 .word 0x00000000 + 80003644: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfffffffffffffffe + 80003648: 00053a83 ld x21,0(x10) + 8000364c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xfffffffffffffffe + 80003650: 00053d83 ld x27,0(x10) + 80003654: 00850513 addi x10,x10,8 + +0000000080003658 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + rol x17, x21, x27 # perform operation + 80003658: 61ba98b3 rol x17,x21,x27 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000365c: 0000b203 ld x4,0(x1) + 80003660: 01120c63 beq x4,x17,80003678 + 80003664: 69c042ef jal x5,80007d00 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 8001346b .word 0x8001346b + 80003674: 00000000 .word 0x00000000 + 80003678: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xfffffffffffffffe + 8000367c: 00053983 ld x19,0(x10) + 80003680: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80003684: 00053803 ld x16,0(x10) + 80003688: 00850513 addi x10,x10,8 + +000000008000368c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + rol x20, x19, x16 # perform operation + 8000368c: 61099a33 rol x20,x19,x16 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003690: 0000b203 ld x4,0(x1) + 80003694: 01420c63 beq x4,x20,800036ac + 80003698: 668042ef jal x5,80007d00 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 800134d9 .word 0x800134d9 + 800036a8: 00000000 .word 0x00000000 + 800036ac: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xfffffffffffffffe + 800036b0: 00053a03 ld x20,0(x10) + 800036b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 800036b8: 00053e83 ld x29,0(x10) + 800036bc: 00850513 addi x10,x10,8 + +00000000800036c0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + rol x7, x20, x29 # perform operation + 800036c0: 61da13b3 rol x7,x20,x29 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c4: 0000b203 ld x4,0(x1) + 800036c8: 00720c63 beq x4,x7,800036e0 + 800036cc: 634042ef jal x5,80007d00 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 80013547 .word 0x80013547 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800036e4: 00053c03 ld x24,0(x10) + 800036e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5555555555555555 + 800036ec: 00053403 ld x8,0(x10) + 800036f0: 00850513 addi x10,x10,8 + +00000000800036f4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + rol x22, x24, x8 # perform operation + 800036f4: 608c1b33 rol x22,x24,x8 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f8: 0000b203 ld x4,0(x1) + 800036fc: 01620c63 beq x4,x22,80003714 + 80003700: 600042ef jal x5,80007d00 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 800135b5 .word 0x800135b5 + 80003710: 00000000 .word 0x00000000 + 80003714: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xfffffffffffffffe + 80003718: 00053903 ld x18,0(x10) + 8000371c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000ffffffff + 80003720: 00053b83 ld x23,0(x10) + 80003724: 00850513 addi x10,x10,8 + +0000000080003728 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + rol x12, x18, x23 # perform operation + 80003728: 61791633 rol x12,x18,x23 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000372c: 0000b203 ld x4,0(x1) + 80003730: 00c20c63 beq x4,x12,80003748 + 80003734: 5cc042ef jal x5,80007d00 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 80013623 .word 0x80013623 + 80003744: 00000000 .word 0x00000000 + 80003748: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfffffffffffffffe + 8000374c: 00053b03 ld x22,0(x10) + 80003750: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000fffffffe + 80003754: 00053883 ld x17,0(x10) + 80003758: 00850513 addi x10,x10,8 + +000000008000375c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + rol x14, x22, x17 # perform operation + 8000375c: 611b1733 rol x14,x22,x17 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003760: 0000b203 ld x4,0(x1) + 80003764: 00e20c63 beq x4,x14,8000377c + 80003768: 598042ef jal x5,80007d00 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80013689 .word 0x80013689 + 80003778: 00000000 .word 0x00000000 + 8000377c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfffffffffffffffe + 80003780: 00053803 ld x16,0(x10) + 80003784: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000100000000 + 80003788: 00053f03 ld x30,0(x10) + 8000378c: 00850513 addi x10,x10,8 + +0000000080003790 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + rol x25, x16, x30 # perform operation + 80003790: 61e81cb3 rol x25,x16,x30 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003794: 0000b203 ld x4,0(x1) + 80003798: 01920c63 beq x4,x25,800037b0 + 8000379c: 564042ef jal x5,80007d00 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 800136ef .word 0x800136ef + 800037ac: 00000000 .word 0x00000000 + 800037b0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800037b4: 00053c03 ld x24,0(x10) + 800037b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000001 + 800037bc: 00053b03 ld x22,0(x10) + 800037c0: 00850513 addi x10,x10,8 + +00000000800037c4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + rol x3, x24, x22 # perform operation + 800037c4: 616c11b3 rol x3,x24,x22 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c8: 0000b203 ld x4,0(x1) + 800037cc: 00320c63 beq x4,x3,800037e4 + 800037d0: 530042ef jal x5,80007d00 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 80013756 .word 0x80013756 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 800037e8: 00053f83 ld x31,0(x10) + 800037ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000000 + 800037f0: 00053a03 ld x20,0(x10) + 800037f4: 00850513 addi x10,x10,8 + +00000000800037f8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + rol x17, x31, x20 # perform operation + 800037f8: 614f98b3 rol x17,x31,x20 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037fc: 0000b203 ld x4,0(x1) + 80003800: 01120c63 beq x4,x17,80003818 + 80003804: 4fc042ef jal x5,80007d00 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 800137bd .word 0x800137bd + 80003814: 00000000 .word 0x00000000 + 80003818: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 8000381c: 00053b83 ld x23,0(x10) + 80003820: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000001 + 80003824: 00053a83 ld x21,0(x10) + 80003828: 00850513 addi x10,x10,8 + +000000008000382c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + rol x17, x23, x21 # perform operation + 8000382c: 615b98b3 rol x17,x23,x21 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003830: 0000b203 ld x4,0(x1) + 80003834: 01120c63 beq x4,x17,8000384c + 80003838: 4c8042ef jal x5,80007d00 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 8001381c .word 0x8001381c + 80003848: 00000000 .word 0x00000000 + 8000384c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003850: 00053103 ld x2,0(x10) + 80003854: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 80003858: 00053903 ld x18,0(x10) + 8000385c: 00850513 addi x10,x10,8 + +0000000080003860 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + rol x7, x2, x18 # perform operation + 80003860: 612113b3 rol x7,x2,x18 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003864: 0000b203 ld x4,0(x1) + 80003868: 00720c63 beq x4,x7,80003880 + 8000386c: 494042ef jal x5,80007d00 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 8001387b .word 0x8001387b + 8000387c: 00000000 .word 0x00000000 + 80003880: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003884: 00053c83 ld x25,0(x10) + 80003888: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000000 + 8000388c: 00053903 ld x18,0(x10) + 80003890: 00850513 addi x10,x10,8 + +0000000080003894 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + rol x16, x25, x18 # perform operation + 80003894: 612c9833 rol x16,x25,x18 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003898: 0000b203 ld x4,0(x1) + 8000389c: 01020c63 beq x4,x16,800038b4 + 800038a0: 460042ef jal x5,80007d00 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 800138da .word 0x800138da + 800038b0: 00000000 .word 0x00000000 + 800038b4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 800038b8: 00053f03 ld x30,0(x10) + 800038bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8000000000000001 + 800038c0: 00053783 ld x15,0(x10) + 800038c4: 00850513 addi x10,x10,8 + +00000000800038c8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + rol x21, x30, x15 # perform operation + 800038c8: 60ff1ab3 rol x21,x30,x15 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038cc: 0000b203 ld x4,0(x1) + 800038d0: 01520c63 beq x4,x21,800038e8 + 800038d4: 42c042ef jal x5,80007d00 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 80013948 .word 0x80013948 + 800038e4: 00000000 .word 0x00000000 + 800038e8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 800038ec: 00053a03 ld x20,0(x10) + 800038f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7fffffffffffffff + 800038f4: 00053583 ld x11,0(x10) + 800038f8: 00850513 addi x10,x10,8 + +00000000800038fc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + rol x14, x20, x11 # perform operation + 800038fc: 60ba1733 rol x14,x20,x11 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003900: 0000b203 ld x4,0(x1) + 80003904: 00e20c63 beq x4,x14,8000391c + 80003908: 3f8042ef jal x5,80007d00 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 800139b6 .word 0x800139b6 + 80003918: 00000000 .word 0x00000000 + 8000391c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003920: 00053c03 ld x24,0(x10) + 80003924: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80003928: 00053483 ld x9,0(x10) + 8000392c: 00850513 addi x10,x10,8 + +0000000080003930 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + rol x17, x24, x9 # perform operation + 80003930: 609c18b3 rol x17,x24,x9 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003934: 0000b203 ld x4,0(x1) + 80003938: 01120c63 beq x4,x17,80003950 + 8000393c: 3c4042ef jal x5,80007d00 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 80013a24 .word 0x80013a24 + 8000394c: 00000000 .word 0x00000000 + 80003950: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003954: 00053d83 ld x27,0(x10) + 80003958: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xffffffffffffffff + 8000395c: 00053983 ld x19,0(x10) + 80003960: 00850513 addi x10,x10,8 + +0000000080003964 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + rol x29, x27, x19 # perform operation + 80003964: 613d9eb3 rol x29,x27,x19 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003968: 0000b203 ld x4,0(x1) + 8000396c: 01d20c63 beq x4,x29,80003984 + 80003970: 390042ef jal x5,80007d00 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80013a92 .word 0x80013a92 + 80003980: 00000000 .word 0x00000000 + 80003984: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003988: 00053f03 ld x30,0(x10) + 8000398c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xfffffffffffffffe + 80003990: 00053a83 ld x21,0(x10) + 80003994: 00850513 addi x10,x10,8 + +0000000080003998 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + rol x9, x30, x21 # perform operation + 80003998: 615f14b3 rol x9,x30,x21 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000399c: 0000b203 ld x4,0(x1) + 800039a0: 00920c63 beq x4,x9,800039b8 + 800039a4: 35c042ef jal x5,80007d00 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80013b00 .word 0x80013b00 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 800039bc: 00053a83 ld x21,0(x10) + 800039c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 800039c4: 00053d83 ld x27,0(x10) + 800039c8: 00850513 addi x10,x10,8 + +00000000800039cc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + rol x31, x21, x27 # perform operation + 800039cc: 61ba9fb3 rol x31,x21,x27 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d0: 0000b203 ld x4,0(x1) + 800039d4: 01f20c63 beq x4,x31,800039ec + 800039d8: 328042ef jal x5,80007d00 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 80013b6e .word 0x80013b6e + 800039e8: 00000000 .word 0x00000000 + 800039ec: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800039f0: 00053603 ld x12,0(x10) + 800039f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 800039f8: 00053f83 ld x31,0(x10) + 800039fc: 00850513 addi x10,x10,8 + +0000000080003a00 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + rol x9, x12, x31 # perform operation + 80003a00: 61f614b3 rol x9,x12,x31 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a04: 0000b203 ld x4,0(x1) + 80003a08: 00920c63 beq x4,x9,80003a20 + 80003a0c: 2f4042ef jal x5,80007d00 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 80013bdc .word 0x80013bdc + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003a24: 00053b03 ld x22,0(x10) + 80003a28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5555555555555555 + 80003a2c: 00053103 ld x2,0(x10) + 80003a30: 00850513 addi x10,x10,8 + +0000000080003a34 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + rol x13, x22, x2 # perform operation + 80003a34: 602b16b3 rol x13,x22,x2 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a38: 0000b203 ld x4,0(x1) + 80003a3c: 00d20c63 beq x4,x13,80003a54 + 80003a40: 2c0042ef jal x5,80007d00 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 80013c4a .word 0x80013c4a + 80003a50: 00000000 .word 0x00000000 + 80003a54: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80003a58: 00053a03 ld x20,0(x10) + 80003a5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000ffffffff + 80003a60: 00053983 ld x19,0(x10) + 80003a64: 00850513 addi x10,x10,8 + +0000000080003a68 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + rol x26, x20, x19 # perform operation + 80003a68: 613a1d33 rol x26,x20,x19 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a6c: 0000b203 ld x4,0(x1) + 80003a70: 01a20c63 beq x4,x26,80003a88 + 80003a74: 28c042ef jal x5,80007d00 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80013cb8 .word 0x80013cb8 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003a8c: 00053b83 ld x23,0(x10) + 80003a90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 80003a94: 00053a83 ld x21,0(x10) + 80003a98: 00850513 addi x10,x10,8 + +0000000080003a9c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + rol x20, x23, x21 # perform operation + 80003a9c: 615b9a33 rol x20,x23,x21 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa0: 0000b203 ld x4,0(x1) + 80003aa4: 01420c63 beq x4,x20,80003abc + 80003aa8: 258042ef jal x5,80007d00 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 80013d1e .word 0x80013d1e + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80003ac0: 00053a03 ld x20,0(x10) + 80003ac4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000000 + 80003ac8: 00053b03 ld x22,0(x10) + 80003acc: 00850513 addi x10,x10,8 + +0000000080003ad0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + rol x25, x20, x22 # perform operation + 80003ad0: 616a1cb3 rol x25,x20,x22 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad4: 0000b203 ld x4,0(x1) + 80003ad8: 01920c63 beq x4,x25,80003af0 + 80003adc: 224042ef jal x5,80007d00 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 80013d84 .word 0x80013d84 + 80003aec: 00000000 .word 0x00000000 + 80003af0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 80003af4: 00053e03 ld x28,0(x10) + 80003af8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000001 + 80003afc: 00053c83 ld x25,0(x10) + 80003b00: 00850513 addi x10,x10,8 + +0000000080003b04 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + rol x7, x28, x25 # perform operation + 80003b04: 619e13b3 rol x7,x28,x25 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b08: 0000b203 ld x4,0(x1) + 80003b0c: 00720c63 beq x4,x7,80003b24 + 80003b10: 1f0042ef jal x5,80007d00 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80013deb .word 0x80013deb + 80003b20: 00000000 .word 0x00000000 + 80003b24: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003b28: 00053d03 ld x26,0(x10) + 80003b2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000000 + 80003b30: 00053983 ld x19,0(x10) + 80003b34: 00850513 addi x10,x10,8 + +0000000080003b38 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + rol x30, x26, x19 # perform operation + 80003b38: 613d1f33 rol x30,x26,x19 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b3c: 0000b203 ld x4,0(x1) + 80003b40: 01e20c63 beq x4,x30,80003b58 + 80003b44: 1bc042ef jal x5,80007d00 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 80013e52 .word 0x80013e52 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 00053f03 ld x30,0(x10) + 80003b60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000001 + 80003b64: 00053683 ld x13,0(x10) + 80003b68: 00850513 addi x10,x10,8 + +0000000080003b6c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + rol x23, x30, x13 # perform operation + 80003b6c: 60df1bb3 rol x23,x30,x13 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b70: 0000b203 ld x4,0(x1) + 80003b74: 01720c63 beq x4,x23,80003b8c + 80003b78: 188042ef jal x5,80007d00 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80013eb1 .word 0x80013eb1 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003b90: 00053c03 ld x24,0(x10) + 80003b94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000002 + 80003b98: 00053783 ld x15,0(x10) + 80003b9c: 00850513 addi x10,x10,8 + +0000000080003ba0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + rol x18, x24, x15 # perform operation + 80003ba0: 60fc1933 rol x18,x24,x15 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba4: 0000b203 ld x4,0(x1) + 80003ba8: 01220c63 beq x4,x18,80003bc0 + 80003bac: 154042ef jal x5,80007d00 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 80013f10 .word 0x80013f10 + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 00053e83 ld x29,0(x10) + 80003bc8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000000 + 80003bcc: 00053d83 ld x27,0(x10) + 80003bd0: 00850513 addi x10,x10,8 + +0000000080003bd4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + rol x19, x29, x27 # perform operation + 80003bd4: 61be99b3 rol x19,x29,x27 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd8: 0000b203 ld x4,0(x1) + 80003bdc: 01320c63 beq x4,x19,80003bf4 + 80003be0: 120042ef jal x5,80007d00 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 80013f6f .word 0x80013f6f + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 00053e03 ld x28,0(x10) + 80003bfc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000001 + 80003c00: 00053d03 ld x26,0(x10) + 80003c04: 00850513 addi x10,x10,8 + +0000000080003c08 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + rol x27, x28, x26 # perform operation + 80003c08: 61ae1db3 rol x27,x28,x26 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c0c: 0000b203 ld x4,0(x1) + 80003c10: 01b20c63 beq x4,x27,80003c28 + 80003c14: 0ec042ef jal x5,80007d00 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 80013fdd .word 0x80013fdd + 80003c24: 00000000 .word 0x00000000 + 80003c28: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 00053903 ld x18,0(x10) + 80003c30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7fffffffffffffff + 80003c34: 00053a03 ld x20,0(x10) + 80003c38: 00850513 addi x10,x10,8 + +0000000080003c3c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + rol x23, x18, x20 # perform operation + 80003c3c: 61491bb3 rol x23,x18,x20 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c40: 0000b203 ld x4,0(x1) + 80003c44: 01720c63 beq x4,x23,80003c5c + 80003c48: 0b8042ef jal x5,80007d00 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 8001404b .word 0x8001404b + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003c60: 00053b83 ld x23,0(x10) + 80003c64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80003c68: 00053d03 ld x26,0(x10) + 80003c6c: 00850513 addi x10,x10,8 + +0000000080003c70 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + rol x24, x23, x26 # perform operation + 80003c70: 61ab9c33 rol x24,x23,x26 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c74: 0000b203 ld x4,0(x1) + 80003c78: 01820c63 beq x4,x24,80003c90 + 80003c7c: 084042ef jal x5,80007d00 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 800140b9 .word 0x800140b9 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003c94: 00053783 ld x15,0(x10) + 80003c98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xffffffffffffffff + 80003c9c: 00053303 ld x6,0(x10) + 80003ca0: 00850513 addi x10,x10,8 + +0000000080003ca4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + rol x29, x15, x6 # perform operation + 80003ca4: 60679eb3 rol x29,x15,x6 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca8: 0000b203 ld x4,0(x1) + 80003cac: 01d20c63 beq x4,x29,80003cc4 + 80003cb0: 050042ef jal x5,80007d00 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 80014127 .word 0x80014127 + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 00053483 ld x9,0(x10) + 80003ccc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xfffffffffffffffe + 80003cd0: 00053a03 ld x20,0(x10) + 80003cd4: 00850513 addi x10,x10,8 + +0000000080003cd8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + rol x23, x9, x20 # perform operation + 80003cd8: 61449bb3 rol x23,x9,x20 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cdc: 0000b203 ld x4,0(x1) + 80003ce0: 01720c63 beq x4,x23,80003cf8 + 80003ce4: 01c042ef jal x5,80007d00 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 80014195 .word 0x80014195 + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 00053e03 ld x28,0(x10) + 80003d00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80003d04: 00053803 ld x16,0(x10) + 80003d08: 00850513 addi x10,x10,8 + +0000000080003d0c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + rol x14, x28, x16 # perform operation + 80003d0c: 610e1733 rol x14,x28,x16 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d10: 0000b203 ld x4,0(x1) + 80003d14: 00e20c63 beq x4,x14,80003d2c + 80003d18: 7e9032ef jal x5,80007d00 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 80014203 .word 0x80014203 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003d30: 00053703 ld x14,0(x10) + 80003d34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80003d38: 00053c03 ld x24,0(x10) + 80003d3c: 00850513 addi x10,x10,8 + +0000000080003d40 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + rol x6, x14, x24 # perform operation + 80003d40: 61871333 rol x6,x14,x24 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d44: 0000b203 ld x4,0(x1) + 80003d48: 00620c63 beq x4,x6,80003d60 + 80003d4c: 7b5032ef jal x5,80007d00 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 80014271 .word 0x80014271 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003d64: 00053103 ld x2,0(x10) + 80003d68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x5555555555555555 + 80003d6c: 00053183 ld x3,0(x10) + 80003d70: 00850513 addi x10,x10,8 + +0000000080003d74 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + rol x12, x2, x3 # perform operation + 80003d74: 60311633 rol x12,x2,x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d78: 0000b203 ld x4,0(x1) + 80003d7c: 00c20c63 beq x4,x12,80003d94 + 80003d80: 781032ef jal x5,80007d00 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 800142df .word 0x800142df + 80003d90: 00000000 .word 0x00000000 + 80003d94: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003d98: 00053303 ld x6,0(x10) + 80003d9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000ffffffff + 80003da0: 00053903 ld x18,0(x10) + 80003da4: 00850513 addi x10,x10,8 + +0000000080003da8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + rol x26, x6, x18 # perform operation + 80003da8: 61231d33 rol x26,x6,x18 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003dac: 0000b203 ld x4,0(x1) + 80003db0: 01a20c63 beq x4,x26,80003dc8 + 80003db4: 74d032ef jal x5,80007d00 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 8001434d .word 0x8001434d + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 00053a03 ld x20,0(x10) + 80003dd0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x00000000fffffffe + 80003dd4: 00053783 ld x15,0(x10) + 80003dd8: 00850513 addi x10,x10,8 + +0000000080003ddc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + rol x16, x20, x15 # perform operation + 80003ddc: 60fa1833 rol x16,x20,x15 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de0: 0000b203 ld x4,0(x1) + 80003de4: 01020c63 beq x4,x16,80003dfc + 80003de8: 719032ef jal x5,80007d00 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 800143b3 .word 0x800143b3 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003e00: 00053903 ld x18,0(x10) + 80003e04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000000 + 80003e08: 00053c83 ld x25,0(x10) + 80003e0c: 00850513 addi x10,x10,8 + +0000000080003e10 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + rol x2, x18, x25 # perform operation + 80003e10: 61991133 rol x2,x18,x25 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e14: 0000b203 ld x4,0(x1) + 80003e18: 00220c63 beq x4,x2,80003e30 + 80003e1c: 6e5032ef jal x5,80007d00 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 80014419 .word 0x80014419 + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003e34: 00053b83 ld x23,0(x10) + 80003e38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000100000001 + 80003e3c: 00053803 ld x16,0(x10) + 80003e40: 00850513 addi x10,x10,8 + +0000000080003e44 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + rol x17, x23, x16 # perform operation + 80003e44: 610b98b3 rol x17,x23,x16 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e48: 0000b203 ld x4,0(x1) + 80003e4c: 01120c63 beq x4,x17,80003e64 + 80003e50: 6b1032ef jal x5,80007d00 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 80014480 .word 0x80014480 + 80003e60: 00000000 .word 0x00000000 + 80003e64: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5555555555555555 + 80003e68: 00053803 ld x16,0(x10) + 80003e6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000000 + 80003e70: 00053383 ld x7,0(x10) + 80003e74: 00850513 addi x10,x10,8 + +0000000080003e78 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + rol x30, x16, x7 # perform operation + 80003e78: 60781f33 rol x30,x16,x7 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e7c: 0000b203 ld x4,0(x1) + 80003e80: 01e20c63 beq x4,x30,80003e98 + 80003e84: 67d032ef jal x5,80007d00 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 800144e7 .word 0x800144e7 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5555555555555555 + 80003e9c: 00053183 ld x3,0(x10) + 80003ea0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000000000001 + 80003ea4: 00053403 ld x8,0(x10) + 80003ea8: 00850513 addi x10,x10,8 + +0000000080003eac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + rol x14, x3, x8 # perform operation + 80003eac: 60819733 rol x14,x3,x8 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb0: 0000b203 ld x4,0(x1) + 80003eb4: 00e20c63 beq x4,x14,80003ecc + 80003eb8: 649032ef jal x5,80007d00 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 80014546 .word 0x80014546 + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5555555555555555 + 80003ed0: 00053e03 ld x28,0(x10) + 80003ed4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000002 + 80003ed8: 00053183 ld x3,0(x10) + 80003edc: 00850513 addi x10,x10,8 + +0000000080003ee0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + rol x21, x28, x3 # perform operation + 80003ee0: 603e1ab3 rol x21,x28,x3 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee4: 0000b203 ld x4,0(x1) + 80003ee8: 01520c63 beq x4,x21,80003f00 + 80003eec: 615032ef jal x5,80007d00 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 800145a5 .word 0x800145a5 + 80003efc: 00000000 .word 0x00000000 + 80003f00: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80003f04: 00053b03 ld x22,0(x10) + 80003f08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x8000000000000000 + 80003f0c: 00053c83 ld x25,0(x10) + 80003f10: 00850513 addi x10,x10,8 + +0000000080003f14 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + rol x8, x22, x25 # perform operation + 80003f14: 619b1433 rol x8,x22,x25 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f18: 0000b203 ld x4,0(x1) + 80003f1c: 00820c63 beq x4,x8,80003f34 + 80003f20: 5e1032ef jal x5,80007d00 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 80014604 .word 0x80014604 + 80003f30: 00000000 .word 0x00000000 + 80003f34: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5555555555555555 + 80003f38: 00053183 ld x3,0(x10) + 80003f3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x8000000000000001 + 80003f40: 00053483 ld x9,0(x10) + 80003f44: 00850513 addi x10,x10,8 + +0000000080003f48 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + rol x29, x3, x9 # perform operation + 80003f48: 60919eb3 rol x29,x3,x9 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f4c: 0000b203 ld x4,0(x1) + 80003f50: 01d20c63 beq x4,x29,80003f68 + 80003f54: 5ad032ef jal x5,80007d00 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 80014672 .word 0x80014672 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5555555555555555 + 80003f6c: 00053b83 ld x23,0(x10) + 80003f70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7fffffffffffffff + 80003f74: 00053883 ld x17,0(x10) + 80003f78: 00850513 addi x10,x10,8 + +0000000080003f7c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + rol x24, x23, x17 # perform operation + 80003f7c: 611b9c33 rol x24,x23,x17 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f80: 0000b203 ld x4,0(x1) + 80003f84: 01820c63 beq x4,x24,80003f9c + 80003f88: 579032ef jal x5,80007d00 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 800146e0 .word 0x800146e0 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80003fa0: 00053b03 ld x22,0(x10) + 80003fa4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80003fa8: 00053903 ld x18,0(x10) + 80003fac: 00850513 addi x10,x10,8 + +0000000080003fb0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + rol x31, x22, x18 # perform operation + 80003fb0: 612b1fb3 rol x31,x22,x18 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb4: 0000b203 ld x4,0(x1) + 80003fb8: 01f20c63 beq x4,x31,80003fd0 + 80003fbc: 545032ef jal x5,80007d00 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 8001474e .word 0x8001474e + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x5555555555555555 + 80003fd4: 00053303 ld x6,0(x10) + 80003fd8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xffffffffffffffff + 80003fdc: 00053c83 ld x25,0(x10) + 80003fe0: 00850513 addi x10,x10,8 + +0000000080003fe4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + rol x13, x6, x25 # perform operation + 80003fe4: 619316b3 rol x13,x6,x25 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe8: 0000b203 ld x4,0(x1) + 80003fec: 00d20c63 beq x4,x13,80004004 + 80003ff0: 511032ef jal x5,80007d00 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 800147bc .word 0x800147bc + 80004000: 00000000 .word 0x00000000 + 80004004: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5555555555555555 + 80004008: 00053783 ld x15,0(x10) + 8000400c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfffffffffffffffe + 80004010: 00053f83 ld x31,0(x10) + 80004014: 00850513 addi x10,x10,8 + +0000000080004018 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + rol x24, x15, x31 # perform operation + 80004018: 61f79c33 rol x24,x15,x31 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000401c: 0000b203 ld x4,0(x1) + 80004020: 01820c63 beq x4,x24,80004038 + 80004024: 4dd032ef jal x5,80007d00 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 8001482a .word 0x8001482a + 80004034: 00000000 .word 0x00000000 + 80004038: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5555555555555555 + 8000403c: 00053e03 ld x28,0(x10) + 80004040: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004044: 00053683 ld x13,0(x10) + 80004048: 00850513 addi x10,x10,8 + +000000008000404c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + rol x12, x28, x13 # perform operation + 8000404c: 60de1633 rol x12,x28,x13 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004050: 0000b203 ld x4,0(x1) + 80004054: 00c20c63 beq x4,x12,8000406c + 80004058: 4a9032ef jal x5,80007d00 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 80014898 .word 0x80014898 + 80004068: 00000000 .word 0x00000000 + 8000406c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x5555555555555555 + 80004070: 00053d03 ld x26,0(x10) + 80004074: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80004078: 00053f83 ld x31,0(x10) + 8000407c: 00850513 addi x10,x10,8 + +0000000080004080 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + rol x13, x26, x31 # perform operation + 80004080: 61fd16b3 rol x13,x26,x31 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004084: 0000b203 ld x4,0(x1) + 80004088: 00d20c63 beq x4,x13,800040a0 + 8000408c: 475032ef jal x5,80007d00 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 80014906 .word 0x80014906 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5555555555555555 + 800040a4: 00053483 ld x9,0(x10) + 800040a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5555555555555555 + 800040ac: 00053e03 ld x28,0(x10) + 800040b0: 00850513 addi x10,x10,8 + +00000000800040b4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + rol x31, x9, x28 # perform operation + 800040b4: 61c49fb3 rol x31,x9,x28 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b8: 0000b203 ld x4,0(x1) + 800040bc: 01f20c63 beq x4,x31,800040d4 + 800040c0: 441032ef jal x5,80007d00 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80014974 .word 0x80014974 + 800040d0: 00000000 .word 0x00000000 + 800040d4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5555555555555555 + 800040d8: 00053d83 ld x27,0(x10) + 800040dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000ffffffff + 800040e0: 00053b83 ld x23,0(x10) + 800040e4: 00850513 addi x10,x10,8 + +00000000800040e8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + rol x30, x27, x23 # perform operation + 800040e8: 617d9f33 rol x30,x27,x23 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040ec: 0000b203 ld x4,0(x1) + 800040f0: 01e20c63 beq x4,x30,80004108 + 800040f4: 40d032ef jal x5,80007d00 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 800149e2 .word 0x800149e2 + 80004104: 00000000 .word 0x00000000 + 80004108: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5555555555555555 + 8000410c: 00053b83 ld x23,0(x10) + 80004110: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000fffffffe + 80004114: 00053183 ld x3,0(x10) + 80004118: 00850513 addi x10,x10,8 + +000000008000411c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + rol x16, x23, x3 # perform operation + 8000411c: 603b9833 rol x16,x23,x3 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004120: 0000b203 ld x4,0(x1) + 80004124: 01020c63 beq x4,x16,8000413c + 80004128: 3d9032ef jal x5,80007d00 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 80014a48 .word 0x80014a48 + 80004138: 00000000 .word 0x00000000 + 8000413c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5555555555555555 + 80004140: 00053683 ld x13,0(x10) + 80004144: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000100000000 + 80004148: 00053983 ld x19,0(x10) + 8000414c: 00850513 addi x10,x10,8 + +0000000080004150 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + rol x11, x13, x19 # perform operation + 80004150: 613695b3 rol x11,x13,x19 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004154: 0000b203 ld x4,0(x1) + 80004158: 00b20c63 beq x4,x11,80004170 + 8000415c: 3a5032ef jal x5,80007d00 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 80014aae .word 0x80014aae + 8000416c: 00000000 .word 0x00000000 + 80004170: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5555555555555555 + 80004174: 00053603 ld x12,0(x10) + 80004178: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000100000001 + 8000417c: 00053a03 ld x20,0(x10) + 80004180: 00850513 addi x10,x10,8 + +0000000080004184 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + rol x13, x12, x20 # perform operation + 80004184: 614616b3 rol x13,x12,x20 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004188: 0000b203 ld x4,0(x1) + 8000418c: 00d20c63 beq x4,x13,800041a4 + 80004190: 371032ef jal x5,80007d00 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 80014b15 .word 0x80014b15 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000ffffffff + 800041a8: 00053f83 ld x31,0(x10) + 800041ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000000 + 800041b0: 00053383 ld x7,0(x10) + 800041b4: 00850513 addi x10,x10,8 + +00000000800041b8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + rol x29, x31, x7 # perform operation + 800041b8: 607f9eb3 rol x29,x31,x7 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041bc: 0000b203 ld x4,0(x1) + 800041c0: 01d20c63 beq x4,x29,800041d8 + 800041c4: 33d032ef jal x5,80007d00 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 80014b7c .word 0x80014b7c + 800041d4: 00000000 .word 0x00000000 + 800041d8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000ffffffff + 800041dc: 00053383 ld x7,0(x10) + 800041e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000001 + 800041e4: 00053a83 ld x21,0(x10) + 800041e8: 00850513 addi x10,x10,8 + +00000000800041ec : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + rol x13, x7, x21 # perform operation + 800041ec: 615396b3 rol x13,x7,x21 + # Check if x13 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x13, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f0: 0000b203 ld x4,0(x1) + 800041f4: 00d20c63 beq x4,x13,8000420c + 800041f8: 309032ef jal x5,80007d00 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 80014bd3 .word 0x80014bd3 + 80004208: 00000000 .word 0x00000000 + 8000420c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000ffffffff + 80004210: 00053a83 ld x21,0(x10) + 80004214: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000002 + 80004218: 00053183 ld x3,0(x10) + 8000421c: 00850513 addi x10,x10,8 + +0000000080004220 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + rol x14, x21, x3 # perform operation + 80004220: 603a9733 rol x14,x21,x3 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004224: 0000b203 ld x4,0(x1) + 80004228: 00e20c63 beq x4,x14,80004240 + 8000422c: 2d5032ef jal x5,80007d00 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 80014c2a .word 0x80014c2a + 8000423c: 00000000 .word 0x00000000 + 80004240: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000ffffffff + 80004244: 00053f83 ld x31,0(x10) + 80004248: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000000 + 8000424c: 00053903 ld x18,0(x10) + 80004250: 00850513 addi x10,x10,8 + +0000000080004254 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + rol x16, x31, x18 # perform operation + 80004254: 612f9833 rol x16,x31,x18 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004258: 0000b203 ld x4,0(x1) + 8000425c: 01020c63 beq x4,x16,80004274 + 80004260: 2a1032ef jal x5,80007d00 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 80014c81 .word 0x80014c81 + 80004270: 00000000 .word 0x00000000 + 80004274: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000ffffffff + 80004278: 00053f03 ld x30,0(x10) + 8000427c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000001 + 80004280: 00053c03 ld x24,0(x10) + 80004284: 00850513 addi x10,x10,8 + +0000000080004288 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + rol x18, x30, x24 # perform operation + 80004288: 618f1933 rol x18,x30,x24 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000428c: 0000b203 ld x4,0(x1) + 80004290: 01220c63 beq x4,x18,800042a8 + 80004294: 26d032ef jal x5,80007d00 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 80014ce7 .word 0x80014ce7 + 800042a4: 00000000 .word 0x00000000 + 800042a8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000ffffffff + 800042ac: 00053f83 ld x31,0(x10) + 800042b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7fffffffffffffff + 800042b4: 00053c03 ld x24,0(x10) + 800042b8: 00850513 addi x10,x10,8 + +00000000800042bc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + rol x30, x31, x24 # perform operation + 800042bc: 618f9f33 rol x30,x31,x24 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c0: 0000b203 ld x4,0(x1) + 800042c4: 01e20c63 beq x4,x30,800042dc + 800042c8: 239032ef jal x5,80007d00 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 80014d4d .word 0x80014d4d + 800042d8: 00000000 .word 0x00000000 + 800042dc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000ffffffff + 800042e0: 00053603 ld x12,0(x10) + 800042e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7ffffffffffffffe + 800042e8: 00053c83 ld x25,0(x10) + 800042ec: 00850513 addi x10,x10,8 + +00000000800042f0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + rol x19, x12, x25 # perform operation + 800042f0: 619619b3 rol x19,x12,x25 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f4: 0000b203 ld x4,0(x1) + 800042f8: 01320c63 beq x4,x19,80004310 + 800042fc: 205032ef jal x5,80007d00 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 80014db3 .word 0x80014db3 + 8000430c: 00000000 .word 0x00000000 + 80004310: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000ffffffff + 80004314: 00053783 ld x15,0(x10) + 80004318: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xffffffffffffffff + 8000431c: 00053583 ld x11,0(x10) + 80004320: 00850513 addi x10,x10,8 + +0000000080004324 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + rol x27, x15, x11 # perform operation + 80004324: 60b79db3 rol x27,x15,x11 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004328: 0000b203 ld x4,0(x1) + 8000432c: 01b20c63 beq x4,x27,80004344 + 80004330: 1d1032ef jal x5,80007d00 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 80014e19 .word 0x80014e19 + 80004340: 00000000 .word 0x00000000 + 80004344: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000ffffffff + 80004348: 00053d83 ld x27,0(x10) + 8000434c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xfffffffffffffffe + 80004350: 00053703 ld x14,0(x10) + 80004354: 00850513 addi x10,x10,8 + +0000000080004358 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + rol x25, x27, x14 # perform operation + 80004358: 60ed9cb3 rol x25,x27,x14 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000435c: 0000b203 ld x4,0(x1) + 80004360: 01920c63 beq x4,x25,80004378 + 80004364: 19d032ef jal x5,80007d00 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 80014e7f .word 0x80014e7f + 80004374: 00000000 .word 0x00000000 + 80004378: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x00000000ffffffff + 8000437c: 00053d03 ld x26,0(x10) + 80004380: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80004384: 00053603 ld x12,0(x10) + 80004388: 00850513 addi x10,x10,8 + +000000008000438c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + rol x9, x26, x12 # perform operation + 8000438c: 60cd14b3 rol x9,x26,x12 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004390: 0000b203 ld x4,0(x1) + 80004394: 00920c63 beq x4,x9,800043ac + 80004398: 169032ef jal x5,80007d00 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 80014ee5 .word 0x80014ee5 + 800043a8: 00000000 .word 0x00000000 + 800043ac: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000ffffffff + 800043b0: 00053b83 ld x23,0(x10) + 800043b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 800043b8: 00053d03 ld x26,0(x10) + 800043bc: 00850513 addi x10,x10,8 + +00000000800043c0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + rol x3, x23, x26 # perform operation + 800043c0: 61ab91b3 rol x3,x23,x26 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c4: 0000b203 ld x4,0(x1) + 800043c8: 00320c63 beq x4,x3,800043e0 + 800043cc: 135032ef jal x5,80007d00 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 80014f4b .word 0x80014f4b + 800043dc: 00000000 .word 0x00000000 + 800043e0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000000ffffffff + 800043e4: 00053103 ld x2,0(x10) + 800043e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5555555555555555 + 800043ec: 00053d03 ld x26,0(x10) + 800043f0: 00850513 addi x10,x10,8 + +00000000800043f4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + rol x21, x2, x26 # perform operation + 800043f4: 61a11ab3 rol x21,x2,x26 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f8: 0000b203 ld x4,0(x1) + 800043fc: 01520c63 beq x4,x21,80004414 + 80004400: 101032ef jal x5,80007d00 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 80014fb1 .word 0x80014fb1 + 80004410: 00000000 .word 0x00000000 + 80004414: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000ffffffff + 80004418: 00053f03 ld x30,0(x10) + 8000441c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000ffffffff + 80004420: 00053f83 ld x31,0(x10) + 80004424: 00850513 addi x10,x10,8 + +0000000080004428 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + rol x19, x30, x31 # perform operation + 80004428: 61ff19b3 rol x19,x30,x31 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000442c: 0000b203 ld x4,0(x1) + 80004430: 01320c63 beq x4,x19,80004448 + 80004434: 0cd032ef jal x5,80007d00 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 80015017 .word 0x80015017 + 80004444: 00000000 .word 0x00000000 + 80004448: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x00000000ffffffff + 8000444c: 00053d03 ld x26,0(x10) + 80004450: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000fffffffe + 80004454: 00053883 ld x17,0(x10) + 80004458: 00850513 addi x10,x10,8 + +000000008000445c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + rol x31, x26, x17 # perform operation + 8000445c: 611d1fb3 rol x31,x26,x17 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004460: 0000b203 ld x4,0(x1) + 80004464: 01f20c63 beq x4,x31,8000447c + 80004468: 099032ef jal x5,80007d00 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 80015075 .word 0x80015075 + 80004478: 00000000 .word 0x00000000 + 8000447c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000ffffffff + 80004480: 00053c03 ld x24,0(x10) + 80004484: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000000 + 80004488: 00053b83 ld x23,0(x10) + 8000448c: 00850513 addi x10,x10,8 + +0000000080004490 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + rol x16, x24, x23 # perform operation + 80004490: 617c1833 rol x16,x24,x23 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004494: 0000b203 ld x4,0(x1) + 80004498: 01020c63 beq x4,x16,800044b0 + 8000449c: 065032ef jal x5,80007d00 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 800150d3 .word 0x800150d3 + 800044ac: 00000000 .word 0x00000000 + 800044b0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000ffffffff + 800044b4: 00053883 ld x17,0(x10) + 800044b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000100000001 + 800044bc: 00053c03 ld x24,0(x10) + 800044c0: 00850513 addi x10,x10,8 + +00000000800044c4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + rol x27, x17, x24 # perform operation + 800044c4: 61889db3 rol x27,x17,x24 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c8: 0000b203 ld x4,0(x1) + 800044cc: 01b20c63 beq x4,x27,800044e4 + 800044d0: 031032ef jal x5,80007d00 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 80015132 .word 0x80015132 + 800044e0: 00000000 .word 0x00000000 + 800044e4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x00000000fffffffe + 800044e8: 00053983 ld x19,0(x10) + 800044ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 800044f0: 00053683 ld x13,0(x10) + 800044f4: 00850513 addi x10,x10,8 + +00000000800044f8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + rol x16, x19, x13 # perform operation + 800044f8: 60d99833 rol x16,x19,x13 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044fc: 0000b203 ld x4,0(x1) + 80004500: 01020c63 beq x4,x16,80004518 + 80004504: 7fc032ef jal x5,80007d00 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 80015191 .word 0x80015191 + 80004514: 00000000 .word 0x00000000 + 80004518: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 8000451c: 00053703 ld x14,0(x10) + 80004520: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000001 + 80004524: 00053a03 ld x20,0(x10) + 80004528: 00850513 addi x10,x10,8 + +000000008000452c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + rol x29, x14, x20 # perform operation + 8000452c: 61471eb3 rol x29,x14,x20 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004530: 0000b203 ld x4,0(x1) + 80004534: 01d20c63 beq x4,x29,8000454c + 80004538: 7c8032ef jal x5,80007d00 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 800151e8 .word 0x800151e8 + 80004548: 00000000 .word 0x00000000 + 8000454c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000fffffffe + 80004550: 00053b83 ld x23,0(x10) + 80004554: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000002 + 80004558: 00053b03 ld x22,0(x10) + 8000455c: 00850513 addi x10,x10,8 + +0000000080004560 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + rol x12, x23, x22 # perform operation + 80004560: 616b9633 rol x12,x23,x22 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004564: 0000b203 ld x4,0(x1) + 80004568: 00c20c63 beq x4,x12,80004580 + 8000456c: 794032ef jal x5,80007d00 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 8001523f .word 0x8001523f + 8000457c: 00000000 .word 0x00000000 + 80004580: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 80004584: 00053d83 ld x27,0(x10) + 80004588: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x8000000000000000 + 8000458c: 00053403 ld x8,0(x10) + 80004590: 00850513 addi x10,x10,8 + +0000000080004594 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + rol x20, x27, x8 # perform operation + 80004594: 608d9a33 rol x20,x27,x8 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004598: 0000b203 ld x4,0(x1) + 8000459c: 01420c63 beq x4,x20,800045b4 + 800045a0: 760032ef jal x5,80007d00 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 80015296 .word 0x80015296 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000fffffffe + 800045b8: 00053883 ld x17,0(x10) + 800045bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000001 + 800045c0: 00053803 ld x16,0(x10) + 800045c4: 00850513 addi x10,x10,8 + +00000000800045c8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + rol x25, x17, x16 # perform operation + 800045c8: 61089cb3 rol x25,x17,x16 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045cc: 0000b203 ld x4,0(x1) + 800045d0: 01920c63 beq x4,x25,800045e8 + 800045d4: 72c032ef jal x5,80007d00 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 800152fc .word 0x800152fc + 800045e4: 00000000 .word 0x00000000 + 800045e8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000fffffffe + 800045ec: 00053883 ld x17,0(x10) + 800045f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7fffffffffffffff + 800045f4: 00053703 ld x14,0(x10) + 800045f8: 00850513 addi x10,x10,8 + +00000000800045fc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + rol x12, x17, x14 # perform operation + 800045fc: 60e89633 rol x12,x17,x14 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004600: 0000b203 ld x4,0(x1) + 80004604: 00c20c63 beq x4,x12,8000461c + 80004608: 6f8032ef jal x5,80007d00 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 80015362 .word 0x80015362 + 80004618: 00000000 .word 0x00000000 + 8000461c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000000fffffffe + 80004620: 00053583 ld x11,0(x10) + 80004624: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80004628: 00053983 ld x19,0(x10) + 8000462c: 00850513 addi x10,x10,8 + +0000000080004630 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + rol x23, x11, x19 # perform operation + 80004630: 61359bb3 rol x23,x11,x19 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004634: 0000b203 ld x4,0(x1) + 80004638: 01720c63 beq x4,x23,80004650 + 8000463c: 6c4032ef jal x5,80007d00 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 800153c8 .word 0x800153c8 + 8000464c: 00000000 .word 0x00000000 + 80004650: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x00000000fffffffe + 80004654: 00053b03 ld x22,0(x10) + 80004658: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xffffffffffffffff + 8000465c: 00053583 ld x11,0(x10) + 80004660: 00850513 addi x10,x10,8 + +0000000080004664 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + rol x7, x22, x11 # perform operation + 80004664: 60bb13b3 rol x7,x22,x11 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004668: 0000b203 ld x4,0(x1) + 8000466c: 00720c63 beq x4,x7,80004684 + 80004670: 690032ef jal x5,80007d00 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 8001542e .word 0x8001542e + 80004680: 00000000 .word 0x00000000 + 80004684: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000fffffffe + 80004688: 00053383 ld x7,0(x10) + 8000468c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xfffffffffffffffe + 80004690: 00053183 ld x3,0(x10) + 80004694: 00850513 addi x10,x10,8 + +0000000080004698 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + rol x29, x7, x3 # perform operation + 80004698: 60339eb3 rol x29,x7,x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000469c: 0000b203 ld x4,0(x1) + 800046a0: 01d20c63 beq x4,x29,800046b8 + 800046a4: 65c032ef jal x5,80007d00 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 80015494 .word 0x80015494 + 800046b4: 00000000 .word 0x00000000 + 800046b8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x00000000fffffffe + 800046bc: 00053403 ld x8,0(x10) + 800046c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 800046c4: 00053883 ld x17,0(x10) + 800046c8: 00850513 addi x10,x10,8 + +00000000800046cc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + rol x30, x8, x17 # perform operation + 800046cc: 61141f33 rol x30,x8,x17 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d0: 0000b203 ld x4,0(x1) + 800046d4: 01e20c63 beq x4,x30,800046ec + 800046d8: 628032ef jal x5,80007d00 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 800154fa .word 0x800154fa + 800046e8: 00000000 .word 0x00000000 + 800046ec: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000fffffffe + 800046f0: 00053683 ld x13,0(x10) + 800046f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 800046f8: 00053703 ld x14,0(x10) + 800046fc: 00850513 addi x10,x10,8 + +0000000080004700 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + rol x20, x13, x14 # perform operation + 80004700: 60e69a33 rol x20,x13,x14 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004704: 0000b203 ld x4,0(x1) + 80004708: 01420c63 beq x4,x20,80004720 + 8000470c: 5f4032ef jal x5,80007d00 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 80015560 .word 0x80015560 + 8000471c: 00000000 .word 0x00000000 + 80004720: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 80004724: 00053d83 ld x27,0(x10) + 80004728: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x5555555555555555 + 8000472c: 00053583 ld x11,0(x10) + 80004730: 00850513 addi x10,x10,8 + +0000000080004734 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + rol x14, x27, x11 # perform operation + 80004734: 60bd9733 rol x14,x27,x11 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004738: 0000b203 ld x4,0(x1) + 8000473c: 00e20c63 beq x4,x14,80004754 + 80004740: 5c0032ef jal x5,80007d00 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 800155c6 .word 0x800155c6 + 80004750: 00000000 .word 0x00000000 + 80004754: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000fffffffe + 80004758: 00053483 ld x9,0(x10) + 8000475c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x00000000ffffffff + 80004760: 00053383 ld x7,0(x10) + 80004764: 00850513 addi x10,x10,8 + +0000000080004768 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + rol x15, x9, x7 # perform operation + 80004768: 607497b3 rol x15,x9,x7 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000476c: 0000b203 ld x4,0(x1) + 80004770: 00f20c63 beq x4,x15,80004788 + 80004774: 58c032ef jal x5,80007d00 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 8001562c .word 0x8001562c + 80004784: 00000000 .word 0x00000000 + 80004788: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000fffffffe + 8000478c: 00053383 ld x7,0(x10) + 80004790: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000fffffffe + 80004794: 00053183 ld x3,0(x10) + 80004798: 00850513 addi x10,x10,8 + +000000008000479c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + rol x16, x7, x3 # perform operation + 8000479c: 60339833 rol x16,x7,x3 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a0: 0000b203 ld x4,0(x1) + 800047a4: 01020c63 beq x4,x16,800047bc + 800047a8: 558032ef jal x5,80007d00 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 8001568a .word 0x8001568a + 800047b8: 00000000 .word 0x00000000 + 800047bc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000fffffffe + 800047c0: 00053383 ld x7,0(x10) + 800047c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000000 + 800047c8: 00053603 ld x12,0(x10) + 800047cc: 00850513 addi x10,x10,8 + +00000000800047d0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + rol x29, x7, x12 # perform operation + 800047d0: 60c39eb3 rol x29,x7,x12 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d4: 0000b203 ld x4,0(x1) + 800047d8: 01d20c63 beq x4,x29,800047f0 + 800047dc: 524032ef jal x5,80007d00 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 800156e8 .word 0x800156e8 + 800047ec: 00000000 .word 0x00000000 + 800047f0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000000fffffffe + 800047f4: 00053583 ld x11,0(x10) + 800047f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000100000001 + 800047fc: 00053d03 ld x26,0(x10) + 80004800: 00850513 addi x10,x10,8 + +0000000080004804 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + rol x29, x11, x26 # perform operation + 80004804: 61a59eb3 rol x29,x11,x26 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004808: 0000b203 ld x4,0(x1) + 8000480c: 01d20c63 beq x4,x29,80004824 + 80004810: 4f0032ef jal x5,80007d00 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 80015747 .word 0x80015747 + 80004820: 00000000 .word 0x00000000 + 80004824: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000100000000 + 80004828: 00053a83 ld x21,0(x10) + 8000482c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000000 + 80004830: 00053e83 ld x29,0(x10) + 80004834: 00850513 addi x10,x10,8 + +0000000080004838 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + rol x16, x21, x29 # perform operation + 80004838: 61da9833 rol x16,x21,x29 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000483c: 0000b203 ld x4,0(x1) + 80004840: 01020c63 beq x4,x16,80004858 + 80004844: 4bc032ef jal x5,80007d00 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 800157a6 .word 0x800157a6 + 80004854: 00000000 .word 0x00000000 + 80004858: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000100000000 + 8000485c: 00053583 ld x11,0(x10) + 80004860: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000001 + 80004864: 00053903 ld x18,0(x10) + 80004868: 00850513 addi x10,x10,8 + +000000008000486c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + rol x12, x11, x18 # perform operation + 8000486c: 61259633 rol x12,x11,x18 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004870: 0000b203 ld x4,0(x1) + 80004874: 00c20c63 beq x4,x12,8000488c + 80004878: 488032ef jal x5,80007d00 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 800157fe .word 0x800157fe + 80004888: 00000000 .word 0x00000000 + 8000488c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000000 + 80004890: 00053e03 ld x28,0(x10) + 80004894: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000002 + 80004898: 00053f83 ld x31,0(x10) + 8000489c: 00850513 addi x10,x10,8 + +00000000800048a0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + rol x15, x28, x31 # perform operation + 800048a0: 61fe17b3 rol x15,x28,x31 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a4: 0000b203 ld x4,0(x1) + 800048a8: 00f20c63 beq x4,x15,800048c0 + 800048ac: 454032ef jal x5,80007d00 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 80015856 .word 0x80015856 + 800048bc: 00000000 .word 0x00000000 + 800048c0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 800048c4: 00053a03 ld x20,0(x10) + 800048c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x8000000000000000 + 800048cc: 00053c83 ld x25,0(x10) + 800048d0: 00850513 addi x10,x10,8 + +00000000800048d4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + rol x7, x20, x25 # perform operation + 800048d4: 619a13b3 rol x7,x20,x25 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d8: 0000b203 ld x4,0(x1) + 800048dc: 00720c63 beq x4,x7,800048f4 + 800048e0: 420032ef jal x5,80007d00 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 800158ae .word 0x800158ae + 800048f0: 00000000 .word 0x00000000 + 800048f4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000100000000 + 800048f8: 00053b83 ld x23,0(x10) + 800048fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000001 + 80004900: 00053883 ld x17,0(x10) + 80004904: 00850513 addi x10,x10,8 + +0000000080004908 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + rol x22, x23, x17 # perform operation + 80004908: 611b9b33 rol x22,x23,x17 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 8000490c: 0000b203 ld x4,0(x1) + 80004910: 01620c63 beq x4,x22,80004928 + 80004914: 3ec032ef jal x5,80007d00 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 80015915 .word 0x80015915 + 80004924: 00000000 .word 0x00000000 + 80004928: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000000 + 8000492c: 00053603 ld x12,0(x10) + 80004930: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7fffffffffffffff + 80004934: 00053383 ld x7,0(x10) + 80004938: 00850513 addi x10,x10,8 + +000000008000493c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + rol x19, x12, x7 # perform operation + 8000493c: 607619b3 rol x19,x12,x7 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004940: 0000b203 ld x4,0(x1) + 80004944: 01320c63 beq x4,x19,8000495c + 80004948: 3b8032ef jal x5,80007d00 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 8001597c .word 0x8001597c + 80004958: 00000000 .word 0x00000000 + 8000495c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000000 + 80004960: 00053483 ld x9,0(x10) + 80004964: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80004968: 00053303 ld x6,0(x10) + 8000496c: 00850513 addi x10,x10,8 + +0000000080004970 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + rol x31, x9, x6 # perform operation + 80004970: 60649fb3 rol x31,x9,x6 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004974: 0000b203 ld x4,0(x1) + 80004978: 01f20c63 beq x4,x31,80004990 + 8000497c: 384032ef jal x5,80007d00 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 800159e3 .word 0x800159e3 + 8000498c: 00000000 .word 0x00000000 + 80004990: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004994: 00053303 ld x6,0(x10) + 80004998: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xffffffffffffffff + 8000499c: 00053d83 ld x27,0(x10) + 800049a0: 00850513 addi x10,x10,8 + +00000000800049a4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + rol x2, x6, x27 # perform operation + 800049a4: 61b31133 rol x2,x6,x27 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a8: 0000b203 ld x4,0(x1) + 800049ac: 00220c63 beq x4,x2,800049c4 + 800049b0: 350032ef jal x5,80007d00 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 80015a4a .word 0x80015a4a + 800049c0: 00000000 .word 0x00000000 + 800049c4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000100000000 + 800049c8: 00053883 ld x17,0(x10) + 800049cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xfffffffffffffffe + 800049d0: 00053383 ld x7,0(x10) + 800049d4: 00850513 addi x10,x10,8 + +00000000800049d8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + rol x12, x17, x7 # perform operation + 800049d8: 60789633 rol x12,x17,x7 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049dc: 0000b203 ld x4,0(x1) + 800049e0: 00c20c63 beq x4,x12,800049f8 + 800049e4: 31c032ef jal x5,80007d00 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 80015ab1 .word 0x80015ab1 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000100000000 + 800049fc: 00053803 ld x16,0(x10) + 80004a00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 80004a04: 00053d83 ld x27,0(x10) + 80004a08: 00850513 addi x10,x10,8 + +0000000080004a0c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + rol x25, x16, x27 # perform operation + 80004a0c: 61b81cb3 rol x25,x16,x27 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a10: 0000b203 ld x4,0(x1) + 80004a14: 01920c63 beq x4,x25,80004a2c + 80004a18: 2e8032ef jal x5,80007d00 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 80015b18 .word 0x80015b18 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0000000100000000 + 80004a30: 00053d03 ld x26,0(x10) + 80004a34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80004a38: 00053303 ld x6,0(x10) + 80004a3c: 00850513 addi x10,x10,8 + +0000000080004a40 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + rol x27, x26, x6 # perform operation + 80004a40: 606d1db3 rol x27,x26,x6 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a44: 0000b203 ld x4,0(x1) + 80004a48: 01b20c63 beq x4,x27,80004a60 + 80004a4c: 2b4032ef jal x5,80007d00 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 80015b7f .word 0x80015b7f + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000100000000 + 80004a64: 00053703 ld x14,0(x10) + 80004a68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x5555555555555555 + 80004a6c: 00053e83 ld x29,0(x10) + 80004a70: 00850513 addi x10,x10,8 + +0000000080004a74 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + rol x15, x14, x29 # perform operation + 80004a74: 61d717b3 rol x15,x14,x29 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a78: 0000b203 ld x4,0(x1) + 80004a7c: 00f20c63 beq x4,x15,80004a94 + 80004a80: 280032ef jal x5,80007d00 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 80015be6 .word 0x80015be6 + 80004a90: 00000000 .word 0x00000000 + 80004a94: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000000 + 80004a98: 00053183 ld x3,0(x10) + 80004a9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000ffffffff + 80004aa0: 00053983 ld x19,0(x10) + 80004aa4: 00850513 addi x10,x10,8 + +0000000080004aa8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + rol x25, x3, x19 # perform operation + 80004aa8: 61319cb3 rol x25,x3,x19 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aac: 0000b203 ld x4,0(x1) + 80004ab0: 01920c63 beq x4,x25,80004ac8 + 80004ab4: 24c032ef jal x5,80007d00 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 80015c4d .word 0x80015c4d + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000000 + 80004acc: 00053b03 ld x22,0(x10) + 80004ad0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000fffffffe + 80004ad4: 00053403 ld x8,0(x10) + 80004ad8: 00850513 addi x10,x10,8 + +0000000080004adc : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + rol x25, x22, x8 # perform operation + 80004adc: 608b1cb3 rol x25,x22,x8 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae0: 0000b203 ld x4,0(x1) + 80004ae4: 01920c63 beq x4,x25,80004afc + 80004ae8: 218032ef jal x5,80007d00 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 80015cac .word 0x80015cac + 80004af8: 00000000 .word 0x00000000 + 80004afc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000000 + 80004b00: 00053b03 ld x22,0(x10) + 80004b04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000100000000 + 80004b08: 00053903 ld x18,0(x10) + 80004b0c: 00850513 addi x10,x10,8 + +0000000080004b10 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + rol x25, x22, x18 # perform operation + 80004b10: 612b1cb3 rol x25,x22,x18 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b14: 0000b203 ld x4,0(x1) + 80004b18: 01920c63 beq x4,x25,80004b30 + 80004b1c: 1e4032ef jal x5,80007d00 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 80015d0b .word 0x80015d0b + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000000 + 80004b34: 00053b03 ld x22,0(x10) + 80004b38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000001 + 80004b3c: 00053303 ld x6,0(x10) + 80004b40: 00850513 addi x10,x10,8 + +0000000080004b44 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + rol x15, x22, x6 # perform operation + 80004b44: 606b17b3 rol x15,x22,x6 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b48: 0000b203 ld x4,0(x1) + 80004b4c: 00f20c63 beq x4,x15,80004b64 + 80004b50: 1b0032ef jal x5,80007d00 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 80015d6b .word 0x80015d6b + 80004b60: 00000000 .word 0x00000000 + 80004b64: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000100000001 + 80004b68: 00053383 ld x7,0(x10) + 80004b6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000000 + 80004b70: 00053a83 ld x21,0(x10) + 80004b74: 00850513 addi x10,x10,8 + +0000000080004b78 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + rol x2, x7, x21 # perform operation + 80004b78: 61539133 rol x2,x7,x21 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b7c: 0000b203 ld x4,0(x1) + 80004b80: 00220c63 beq x4,x2,80004b98 + 80004b84: 17c032ef jal x5,80007d00 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 80015dcb .word 0x80015dcb + 80004b94: 00000000 .word 0x00000000 + 80004b98: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000001 + 80004b9c: 00053e03 ld x28,0(x10) + 80004ba0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000001 + 80004ba4: 00053783 ld x15,0(x10) + 80004ba8: 00850513 addi x10,x10,8 + +0000000080004bac : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + rol x25, x28, x15 # perform operation + 80004bac: 60fe1cb3 rol x25,x28,x15 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb0: 0000b203 ld x4,0(x1) + 80004bb4: 01920c63 beq x4,x25,80004bcc + 80004bb8: 148032ef jal x5,80007d00 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 80015e23 .word 0x80015e23 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000001 + 80004bd0: 00053483 ld x9,0(x10) + 80004bd4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 80004bd8: 00053683 ld x13,0(x10) + 80004bdc: 00850513 addi x10,x10,8 + +0000000080004be0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + rol x12, x9, x13 # perform operation + 80004be0: 60d49633 rol x12,x9,x13 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be4: 0000b203 ld x4,0(x1) + 80004be8: 00c20c63 beq x4,x12,80004c00 + 80004bec: 114032ef jal x5,80007d00 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 80015e7b .word 0x80015e7b + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000001 + 80004c04: 00053183 ld x3,0(x10) + 80004c08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000000 + 80004c0c: 00053903 ld x18,0(x10) + 80004c10: 00850513 addi x10,x10,8 + +0000000080004c14 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + rol x11, x3, x18 # perform operation + 80004c14: 612195b3 rol x11,x3,x18 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c18: 0000b203 ld x4,0(x1) + 80004c1c: 00b20c63 beq x4,x11,80004c34 + 80004c20: 0e0032ef jal x5,80007d00 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 80015ed3 .word 0x80015ed3 + 80004c30: 00000000 .word 0x00000000 + 80004c34: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000100000001 + 80004c38: 00053803 ld x16,0(x10) + 80004c3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x8000000000000001 + 80004c40: 00053603 ld x12,0(x10) + 80004c44: 00850513 addi x10,x10,8 + +0000000080004c48 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + rol x7, x16, x12 # perform operation + 80004c48: 60c813b3 rol x7,x16,x12 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c4c: 0000b203 ld x4,0(x1) + 80004c50: 00720c63 beq x4,x7,80004c68 + 80004c54: 0ac032ef jal x5,80007d00 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 80015f3a .word 0x80015f3a + 80004c64: 00000000 .word 0x00000000 + 80004c68: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000001 + 80004c6c: 00053983 ld x19,0(x10) + 80004c70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7fffffffffffffff + 80004c74: 00053803 ld x16,0(x10) + 80004c78: 00850513 addi x10,x10,8 + +0000000080004c7c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + rol x26, x19, x16 # perform operation + 80004c7c: 61099d33 rol x26,x19,x16 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c80: 0000b203 ld x4,0(x1) + 80004c84: 01a20c63 beq x4,x26,80004c9c + 80004c88: 078032ef jal x5,80007d00 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 80015fa1 .word 0x80015fa1 + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000001 + 80004ca0: 00053483 ld x9,0(x10) + 80004ca4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80004ca8: 00053b83 ld x23,0(x10) + 80004cac: 00850513 addi x10,x10,8 + +0000000080004cb0 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + rol x30, x9, x23 # perform operation + 80004cb0: 61749f33 rol x30,x9,x23 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb4: 0000b203 ld x4,0(x1) + 80004cb8: 01e20c63 beq x4,x30,80004cd0 + 80004cbc: 044032ef jal x5,80007d00 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 80016008 .word 0x80016008 + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000100000001 + 80004cd4: 00053903 ld x18,0(x10) + 80004cd8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xffffffffffffffff + 80004cdc: 00053e83 ld x29,0(x10) + 80004ce0: 00850513 addi x10,x10,8 + +0000000080004ce4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + rol x26, x18, x29 # perform operation + 80004ce4: 61d91d33 rol x26,x18,x29 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce8: 0000b203 ld x4,0(x1) + 80004cec: 01a20c63 beq x4,x26,80004d04 + 80004cf0: 010032ef jal x5,80007d00 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 8001606f .word 0x8001606f + 80004d00: 00000000 .word 0x00000000 + 80004d04: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000001 + 80004d08: 00053183 ld x3,0(x10) + 80004d0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffffffffffe + 80004d10: 00053883 ld x17,0(x10) + 80004d14: 00850513 addi x10,x10,8 + +0000000080004d18 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + rol x6, x3, x17 # perform operation + 80004d18: 61119333 rol x6,x3,x17 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d1c: 0000b203 ld x4,0(x1) + 80004d20: 00620c63 beq x4,x6,80004d38 + 80004d24: 7dd022ef jal x5,80007d00 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 800160d6 .word 0x800160d6 + 80004d34: 00000000 .word 0x00000000 + 80004d38: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000001 + 80004d3c: 00053183 ld x3,0(x10) + 80004d40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80004d44: 00053883 ld x17,0(x10) + 80004d48: 00850513 addi x10,x10,8 + +0000000080004d4c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + rol x6, x3, x17 # perform operation + 80004d4c: 61119333 rol x6,x3,x17 + # Check if x6 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x6, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d50: 0000b203 ld x4,0(x1) + 80004d54: 00620c63 beq x4,x6,80004d6c + 80004d58: 7a9022ef jal x5,80007d00 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 8001613d .word 0x8001613d + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000100000001 + 80004d70: 00053683 ld x13,0(x10) + 80004d74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80004d78: 00053783 ld x15,0(x10) + 80004d7c: 00850513 addi x10,x10,8 + +0000000080004d80 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + rol x16, x13, x15 # perform operation + 80004d80: 60f69833 rol x16,x13,x15 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d84: 0000b203 ld x4,0(x1) + 80004d88: 01020c63 beq x4,x16,80004da0 + 80004d8c: 775022ef jal x5,80007d00 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 800161a4 .word 0x800161a4 + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x0000000100000001 + 80004da4: 00053403 ld x8,0(x10) + 80004da8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x5555555555555555 + 80004dac: 00053483 ld x9,0(x10) + 80004db0: 00850513 addi x10,x10,8 + +0000000080004db4 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + rol x25, x8, x9 # perform operation + 80004db4: 60941cb3 rol x25,x8,x9 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db8: 0000b203 ld x4,0(x1) + 80004dbc: 01920c63 beq x4,x25,80004dd4 + 80004dc0: 741022ef jal x5,80007d00 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 8001620b .word 0x8001620b + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000100000001 + 80004dd8: 00053d83 ld x27,0(x10) + 80004ddc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000000ffffffff + 80004de0: 00053683 ld x13,0(x10) + 80004de4: 00850513 addi x10,x10,8 + +0000000080004de8 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + rol x30, x27, x13 # perform operation + 80004de8: 60dd9f33 rol x30,x27,x13 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dec: 0000b203 ld x4,0(x1) + 80004df0: 01e20c63 beq x4,x30,80004e08 + 80004df4: 70d022ef jal x5,80007d00 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 80016272 .word 0x80016272 + 80004e04: 00000000 .word 0x00000000 + 80004e08: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000100000001 + 80004e0c: 00053383 ld x7,0(x10) + 80004e10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000000fffffffe + 80004e14: 00053103 ld x2,0(x10) + 80004e18: 00850513 addi x10,x10,8 + +0000000080004e1c : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + rol x8, x7, x2 # perform operation + 80004e1c: 60239433 rol x8,x7,x2 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e20: 0000b203 ld x4,0(x1) + 80004e24: 00820c63 beq x4,x8,80004e3c + 80004e28: 6d9022ef jal x5,80007d00 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 800162d1 .word 0x800162d1 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000001 + 80004e40: 00053e03 ld x28,0(x10) + 80004e44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 80004e48: 00053483 ld x9,0(x10) + 80004e4c: 00850513 addi x10,x10,8 + +0000000080004e50 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + rol x15, x28, x9 # perform operation + 80004e50: 609e17b3 rol x15,x28,x9 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e54: 0000b203 ld x4,0(x1) + 80004e58: 00f20c63 beq x4,x15,80004e70 + 80004e5c: 6a5022ef jal x5,80007d00 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 80016330 .word 0x80016330 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 00808093 addi x1,x1,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000100000001 + 80004e74: 00053583 ld x11,0(x10) + 80004e78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000100000001 + 80004e7c: 00053d83 ld x27,0(x10) + 80004e80: 00850513 addi x10,x10,8 + +0000000080004e84 : +Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + rol x24, x11, x27 # perform operation + 80004e84: 61b59c33 rol x24,x11,x27 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_rol_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e88: 0000b203 ld x4,0(x1) + 80004e8c: 01820c63 beq x4,x24,80004ea4 + 80004e90: 671022ef jal x5,80007d00 + 80004e94: 80004e84 .word 0x80004e84 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 80016390 .word 0x80016390 + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 00808093 addi x1,x1,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x47f672adffc1e523 + 80004ea8: 00053003 ld x0,0(x10) + 80004eac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x2c67b4f622c541c9 + 80004eb0: 00053003 ld x0,0(x10) + 80004eb4: 00850513 addi x10,x10,8 + +0000000080004eb8 : +Zbkb_rol_cg_cmp_rs1_rs2_b0: + rol x24, x0, x0 # perform operation + 80004eb8: 60001c33 rol x24,x0,x0 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkb_rol_cg_cmp_rs1_rs2_b0, Zbkb_rol_cg_cmp_rs1_rs2_b0_str) + 80004ebc: 0000b203 ld x4,0(x1) + 80004ec0: 01820c63 beq x4,x24,80004ed8 + 80004ec4: 63d022ef jal x5,80007d00 + 80004ec8: 80004eb8 .word 0x80004eb8 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 800163f0 .word 0x800163f0 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 00808093 addi x1,x1,8 + + mv x18, x1 # switch signature pointer register to avoid conflict with test + 80004edc: 00008913 addi x18,x1,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xb8ff3645a55a85a6 + 80004ee0: 00053083 ld x1,0(x10) + 80004ee4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x3589501ff4d0992a + 80004ee8: 00053083 ld x1,0(x10) + 80004eec: 00850513 addi x10,x10,8 + +0000000080004ef0 : +Zbkb_rol_cg_cmp_rs1_rs2_b1: + rol x25, x1, x1 # perform operation + 80004ef0: 60109cb3 rol x25,x1,x1 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zbkb_rol_cg_cmp_rs1_rs2_b1, Zbkb_rol_cg_cmp_rs1_rs2_b1_str) + 80004ef4: 00093203 ld x4,0(x18) + 80004ef8: 01920c63 beq x4,x25,80004f10 + 80004efc: 605022ef jal x5,80007d00 + 80004f00: 80004ef0 .word 0x80004ef0 + 80004f04: 00000000 .word 0x00000000 + 80004f08: 80016427 .word 0x80016427 + 80004f0c: 00000000 .word 0x00000000 + 80004f10: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xda24796dc2fa90a9 + 80004f14: 00053103 ld x2,0(x10) + 80004f18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x3216b09167200701 + 80004f1c: 00053103 ld x2,0(x10) + 80004f20: 00850513 addi x10,x10,8 + +0000000080004f24 : +Zbkb_rol_cg_cmp_rs1_rs2_b2: + rol x31, x2, x2 # perform operation + 80004f24: 60211fb3 rol x31,x2,x2 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zbkb_rol_cg_cmp_rs1_rs2_b2, Zbkb_rol_cg_cmp_rs1_rs2_b2_str) + 80004f28: 00093203 ld x4,0(x18) + 80004f2c: 01f20c63 beq x4,x31,80004f44 + 80004f30: 5d1022ef jal x5,80007d00 + 80004f34: 80004f24 .word 0x80004f24 + 80004f38: 00000000 .word 0x00000000 + 80004f3c: 8001645e .word 0x8001645e + 80004f40: 00000000 .word 0x00000000 + 80004f44: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x04ff83be1a56e2c7 + 80004f48: 00053183 ld x3,0(x10) + 80004f4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xe39da20c66b0492c + 80004f50: 00053183 ld x3,0(x10) + 80004f54: 00850513 addi x10,x10,8 + +0000000080004f58 : +Zbkb_rol_cg_cmp_rs1_rs2_b3: + rol x16, x3, x3 # perform operation + 80004f58: 60319833 rol x16,x3,x3 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_rol_cg_cmp_rs1_rs2_b3, Zbkb_rol_cg_cmp_rs1_rs2_b3_str) + 80004f5c: 00093203 ld x4,0(x18) + 80004f60: 01020c63 beq x4,x16,80004f78 + 80004f64: 59d022ef jal x5,80007d00 + 80004f68: 80004f58 .word 0x80004f58 + 80004f6c: 00000000 .word 0x00000000 + 80004f70: 80016495 .word 0x80016495 + 80004f74: 00000000 .word 0x00000000 + 80004f78: 00890913 addi x18,x18,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f7c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f80: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x653e0727ed00a155 + 80004f84: 00053203 ld x4,0(x10) + 80004f88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x6ca8a2e7e588dd48 + 80004f8c: 00053203 ld x4,0(x10) + 80004f90: 00850513 addi x10,x10,8 + +0000000080004f94 : +Zbkb_rol_cg_cmp_rs1_rs2_b4: + rol x28, x4, x4 # perform operation + 80004f94: 60421e33 rol x28,x4,x4 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zbkb_rol_cg_cmp_rs1_rs2_b4, Zbkb_rol_cg_cmp_rs1_rs2_b4_str) + 80004f98: 00093383 ld x7,0(x18) + 80004f9c: 01c38c63 beq x7,x28,80004fb4 + 80004fa0: 5790246f jal x8,80007d18 + 80004fa4: 80004f94 .word 0x80004f94 + 80004fa8: 00000000 .word 0x00000000 + 80004fac: 800164cc .word 0x800164cc + 80004fb0: 00000000 .word 0x00000000 + 80004fb4: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x1c2e071c91c26641 + 80004fb8: 00053283 ld x5,0(x10) + 80004fbc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x91f7a537abdc4536 + 80004fc0: 00053283 ld x5,0(x10) + 80004fc4: 00850513 addi x10,x10,8 + +0000000080004fc8 : +Zbkb_rol_cg_cmp_rs1_rs2_b5: + rol x31, x5, x5 # perform operation + 80004fc8: 60529fb3 rol x31,x5,x5 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zbkb_rol_cg_cmp_rs1_rs2_b5, Zbkb_rol_cg_cmp_rs1_rs2_b5_str) + 80004fcc: 00093383 ld x7,0(x18) + 80004fd0: 01f38c63 beq x7,x31,80004fe8 + 80004fd4: 5450246f jal x8,80007d18 + 80004fd8: 80004fc8 .word 0x80004fc8 + 80004fdc: 00000000 .word 0x00000000 + 80004fe0: 80016503 .word 0x80016503 + 80004fe4: 00000000 .word 0x00000000 + 80004fe8: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf9ff201303f4d1ff + 80004fec: 00053303 ld x6,0(x10) + 80004ff0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x644fb82e0c95eea6 + 80004ff4: 00053303 ld x6,0(x10) + 80004ff8: 00850513 addi x10,x10,8 + +0000000080004ffc : +Zbkb_rol_cg_cmp_rs1_rs2_b6: + rol x2, x6, x6 # perform operation + 80004ffc: 60631133 rol x2,x6,x6 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zbkb_rol_cg_cmp_rs1_rs2_b6, Zbkb_rol_cg_cmp_rs1_rs2_b6_str) + 80005000: 00093383 ld x7,0(x18) + 80005004: 00238c63 beq x7,x2,8000501c + 80005008: 5110246f jal x8,80007d18 + 8000500c: 80004ffc .word 0x80004ffc + 80005010: 00000000 .word 0x00000000 + 80005014: 8001653a .word 0x8001653a + 80005018: 00000000 .word 0x00000000 + 8000501c: 00890913 addi x18,x18,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005020: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005024: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x83e54a1ad8b25f1c + 80005028: 00053383 ld x7,0(x10) + 8000502c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x4778b3b8736b5d00 + 80005030: 00053383 ld x7,0(x10) + 80005034: 00850513 addi x10,x10,8 + +0000000080005038 : +Zbkb_rol_cg_cmp_rs1_rs2_b7: + rol x4, x7, x7 # perform operation + 80005038: 60739233 rol x4,x7,x7 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_rol_cg_cmp_rs1_rs2_b7, Zbkb_rol_cg_cmp_rs1_rs2_b7_str) + 8000503c: 00093683 ld x13,0(x18) + 80005040: 00468c63 beq x13,x4,80005058 + 80005044: 4fd0276f jal x14,80007d40 + 80005048: 80005038 .word 0x80005038 + 8000504c: 00000000 .word 0x00000000 + 80005050: 80016571 .word 0x80016571 + 80005054: 00000000 .word 0x00000000 + 80005058: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6f52d7ddc549dd77 + 8000505c: 00053403 ld x8,0(x10) + 80005060: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x927f57091b3cf1da + 80005064: 00053403 ld x8,0(x10) + 80005068: 00850513 addi x10,x10,8 + +000000008000506c : +Zbkb_rol_cg_cmp_rs1_rs2_b8: + rol x24, x8, x8 # perform operation + 8000506c: 60841c33 rol x24,x8,x8 + # Check if x24 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x24, Zbkb_rol_cg_cmp_rs1_rs2_b8, Zbkb_rol_cg_cmp_rs1_rs2_b8_str) + 80005070: 00093683 ld x13,0(x18) + 80005074: 01868c63 beq x13,x24,8000508c + 80005078: 4c90276f jal x14,80007d40 + 8000507c: 8000506c .word 0x8000506c + 80005080: 00000000 .word 0x00000000 + 80005084: 800165a8 .word 0x800165a8 + 80005088: 00000000 .word 0x00000000 + 8000508c: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x3ef3e68ef6dc2491 + 80005090: 00053483 ld x9,0(x10) + 80005094: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xc20a979caf8fe219 + 80005098: 00053483 ld x9,0(x10) + 8000509c: 00850513 addi x10,x10,8 + +00000000800050a0 : +Zbkb_rol_cg_cmp_rs1_rs2_b9: + rol x6, x9, x9 # perform operation + 800050a0: 60949333 rol x6,x9,x9 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_rol_cg_cmp_rs1_rs2_b9, Zbkb_rol_cg_cmp_rs1_rs2_b9_str) + 800050a4: 00093683 ld x13,0(x18) + 800050a8: 00668c63 beq x13,x6,800050c0 + 800050ac: 4950276f jal x14,80007d40 + 800050b0: 800050a0 .word 0x800050a0 + 800050b4: 00000000 .word 0x00000000 + 800050b8: 800165df .word 0x800165df + 800050bc: 00000000 .word 0x00000000 + 800050c0: 00890913 addi x18,x18,8 + + mv x25, x10 # switch data pointer register to avoid conflict with test + 800050c4: 00050c93 addi x25,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x6c7a75e725d8a8e9 + 800050c8: 000cb503 ld x10,0(x25) + 800050cc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x5502e801ee490766 + 800050d0: 000cb503 ld x10,0(x25) + 800050d4: 008c8c93 addi x25,x25,8 + +00000000800050d8 : +Zbkb_rol_cg_cmp_rs1_rs2_b10: + rol x7, x10, x10 # perform operation + 800050d8: 60a513b3 rol x7,x10,x10 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_rol_cg_cmp_rs1_rs2_b10, Zbkb_rol_cg_cmp_rs1_rs2_b10_str) + 800050dc: 00093683 ld x13,0(x18) + 800050e0: 00768c63 beq x13,x7,800050f8 + 800050e4: 45d0276f jal x14,80007d40 + 800050e8: 800050d8 .word 0x800050d8 + 800050ec: 00000000 .word 0x00000000 + 800050f0: 80016616 .word 0x80016616 + 800050f4: 00000000 .word 0x00000000 + 800050f8: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xc0544aa517d1a75e + 800050fc: 000cb583 ld x11,0(x25) + 80005100: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0xbcd54e45ce6511e2 + 80005104: 000cb583 ld x11,0(x25) + 80005108: 008c8c93 addi x25,x25,8 + +000000008000510c : +Zbkb_rol_cg_cmp_rs1_rs2_b11: + rol x22, x11, x11 # perform operation + 8000510c: 60b59b33 rol x22,x11,x11 + # Check if x22 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x22, Zbkb_rol_cg_cmp_rs1_rs2_b11, Zbkb_rol_cg_cmp_rs1_rs2_b11_str) + 80005110: 00093683 ld x13,0(x18) + 80005114: 01668c63 beq x13,x22,8000512c + 80005118: 4290276f jal x14,80007d40 + 8000511c: 8000510c .word 0x8000510c + 80005120: 00000000 .word 0x00000000 + 80005124: 8001664e .word 0x8001664e + 80005128: 00000000 .word 0x00000000 + 8000512c: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0xdf9bcb9262563131 + 80005130: 000cb603 ld x12,0(x25) + 80005134: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x39736a4d9229dd2c + 80005138: 000cb603 ld x12,0(x25) + 8000513c: 008c8c93 addi x25,x25,8 + +0000000080005140 : +Zbkb_rol_cg_cmp_rs1_rs2_b12: + rol x23, x12, x12 # perform operation + 80005140: 60c61bb3 rol x23,x12,x12 + # Check if x23 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x23, Zbkb_rol_cg_cmp_rs1_rs2_b12, Zbkb_rol_cg_cmp_rs1_rs2_b12_str) + 80005144: 00093683 ld x13,0(x18) + 80005148: 01768c63 beq x13,x23,80005160 + 8000514c: 3f50276f jal x14,80007d40 + 80005150: 80005140 .word 0x80005140 + 80005154: 00000000 .word 0x00000000 + 80005158: 80016686 .word 0x80016686 + 8000515c: 00000000 .word 0x00000000 + 80005160: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005164: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005168: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xca127b0548c8488a + 8000516c: 000cb683 ld x13,0(x25) + 80005170: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x4e94c0395ba99ad2 + 80005174: 000cb683 ld x13,0(x25) + 80005178: 008c8c93 addi x25,x25,8 + +000000008000517c : +Zbkb_rol_cg_cmp_rs1_rs2_b13: + rol x16, x13, x13 # perform operation + 8000517c: 60d69833 rol x16,x13,x13 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_rol_cg_cmp_rs1_rs2_b13, Zbkb_rol_cg_cmp_rs1_rs2_b13_str) + 80005180: 00093383 ld x7,0(x18) + 80005184: 01038c63 beq x7,x16,8000519c + 80005188: 3910246f jal x8,80007d18 + 8000518c: 8000517c .word 0x8000517c + 80005190: 00000000 .word 0x00000000 + 80005194: 800166be .word 0x800166be + 80005198: 00000000 .word 0x00000000 + 8000519c: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x89a9e89a197fe28d + 800051a0: 000cb703 ld x14,0(x25) + 800051a4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x331acb59d1f2b4eb + 800051a8: 000cb703 ld x14,0(x25) + 800051ac: 008c8c93 addi x25,x25,8 + +00000000800051b0 : +Zbkb_rol_cg_cmp_rs1_rs2_b14: + rol x1, x14, x14 # perform operation + 800051b0: 60e710b3 rol x1,x14,x14 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zbkb_rol_cg_cmp_rs1_rs2_b14, Zbkb_rol_cg_cmp_rs1_rs2_b14_str) + 800051b4: 00093383 ld x7,0(x18) + 800051b8: 00138c63 beq x7,x1,800051d0 + 800051bc: 35d0246f jal x8,80007d18 + 800051c0: 800051b0 .word 0x800051b0 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 800166f6 .word 0x800166f6 + 800051cc: 00000000 .word 0x00000000 + 800051d0: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x27f5e0969af4ea4c + 800051d4: 000cb783 ld x15,0(x25) + 800051d8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x81503c8b2344a955 + 800051dc: 000cb783 ld x15,0(x25) + 800051e0: 008c8c93 addi x25,x25,8 + +00000000800051e4 : +Zbkb_rol_cg_cmp_rs1_rs2_b15: + rol x4, x15, x15 # perform operation + 800051e4: 60f79233 rol x4,x15,x15 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zbkb_rol_cg_cmp_rs1_rs2_b15, Zbkb_rol_cg_cmp_rs1_rs2_b15_str) + 800051e8: 00093383 ld x7,0(x18) + 800051ec: 00438c63 beq x7,x4,80005204 + 800051f0: 3290246f jal x8,80007d18 + 800051f4: 800051e4 .word 0x800051e4 + 800051f8: 00000000 .word 0x00000000 + 800051fc: 8001672e .word 0x8001672e + 80005200: 00000000 .word 0x00000000 + 80005204: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x7afd39174c7f8893 + 80005208: 000cb803 ld x16,0(x25) + 8000520c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0x3c7e41c84f025ea5 + 80005210: 000cb803 ld x16,0(x25) + 80005214: 008c8c93 addi x25,x25,8 + +0000000080005218 : +Zbkb_rol_cg_cmp_rs1_rs2_b16: + rol x3, x16, x16 # perform operation + 80005218: 610811b3 rol x3,x16,x16 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zbkb_rol_cg_cmp_rs1_rs2_b16, Zbkb_rol_cg_cmp_rs1_rs2_b16_str) + 8000521c: 00093383 ld x7,0(x18) + 80005220: 00338c63 beq x7,x3,80005238 + 80005224: 2f50246f jal x8,80007d18 + 80005228: 80005218 .word 0x80005218 + 8000522c: 00000000 .word 0x00000000 + 80005230: 80016766 .word 0x80016766 + 80005234: 00000000 .word 0x00000000 + 80005238: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x7bf2bdc1c9f6872d + 8000523c: 000cb883 ld x17,0(x25) + 80005240: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xe058c967a1dd0ebb + 80005244: 000cb883 ld x17,0(x25) + 80005248: 008c8c93 addi x25,x25,8 + +000000008000524c : +Zbkb_rol_cg_cmp_rs1_rs2_b17: + rol x3, x17, x17 # perform operation + 8000524c: 611891b3 rol x3,x17,x17 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zbkb_rol_cg_cmp_rs1_rs2_b17, Zbkb_rol_cg_cmp_rs1_rs2_b17_str) + 80005250: 00093383 ld x7,0(x18) + 80005254: 00338c63 beq x7,x3,8000526c + 80005258: 2c10246f jal x8,80007d18 + 8000525c: 8000524c .word 0x8000524c + 80005260: 00000000 .word 0x00000000 + 80005264: 8001679e .word 0x8001679e + 80005268: 00000000 .word 0x00000000 + 8000526c: 00890913 addi x18,x18,8 + + mv x6, x18 # switch signature pointer register to avoid conflict with test + 80005270: 00090313 addi x6,x18,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xd65939ef82dc061d + 80005274: 000cb903 ld x18,0(x25) + 80005278: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0xd7ce1af6a7ce5d57 + 8000527c: 000cb903 ld x18,0(x25) + 80005280: 008c8c93 addi x25,x25,8 + +0000000080005284 : +Zbkb_rol_cg_cmp_rs1_rs2_b18: + rol x20, x18, x18 # perform operation + 80005284: 61291a33 rol x20,x18,x18 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkb_rol_cg_cmp_rs1_rs2_b18, Zbkb_rol_cg_cmp_rs1_rs2_b18_str) + 80005288: 00033383 ld x7,0(x6) + 8000528c: 01438c63 beq x7,x20,800052a4 + 80005290: 2890246f jal x8,80007d18 + 80005294: 80005284 .word 0x80005284 + 80005298: 00000000 .word 0x00000000 + 8000529c: 800167d6 .word 0x800167d6 + 800052a0: 00000000 .word 0x00000000 + 800052a4: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xd3654c1ec4bc2e70 + 800052a8: 000cb983 ld x19,0(x25) + 800052ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xed3895f3465bd2a9 + 800052b0: 000cb983 ld x19,0(x25) + 800052b4: 008c8c93 addi x25,x25,8 + +00000000800052b8 : +Zbkb_rol_cg_cmp_rs1_rs2_b19: + rol x1, x19, x19 # perform operation + 800052b8: 613990b3 rol x1,x19,x19 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkb_rol_cg_cmp_rs1_rs2_b19, Zbkb_rol_cg_cmp_rs1_rs2_b19_str) + 800052bc: 00033383 ld x7,0(x6) + 800052c0: 00138c63 beq x7,x1,800052d8 + 800052c4: 2550246f jal x8,80007d18 + 800052c8: 800052b8 .word 0x800052b8 + 800052cc: 00000000 .word 0x00000000 + 800052d0: 8001680e .word 0x8001680e + 800052d4: 00000000 .word 0x00000000 + 800052d8: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x4b73aea69d9ae468 + 800052dc: 000cba03 ld x20,0(x25) + 800052e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xf34354df6579a7cb + 800052e4: 000cba03 ld x20,0(x25) + 800052e8: 008c8c93 addi x25,x25,8 + +00000000800052ec : +Zbkb_rol_cg_cmp_rs1_rs2_b20: + rol x10, x20, x20 # perform operation + 800052ec: 614a1533 rol x10,x20,x20 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkb_rol_cg_cmp_rs1_rs2_b20, Zbkb_rol_cg_cmp_rs1_rs2_b20_str) + 800052f0: 00033383 ld x7,0(x6) + 800052f4: 00a38c63 beq x7,x10,8000530c + 800052f8: 2210246f jal x8,80007d18 + 800052fc: 800052ec .word 0x800052ec + 80005300: 00000000 .word 0x00000000 + 80005304: 80016846 .word 0x80016846 + 80005308: 00000000 .word 0x00000000 + 8000530c: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x0f935c43d2d1e7dc + 80005310: 000cba83 ld x21,0(x25) + 80005314: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x9916d29679bf2c3c + 80005318: 000cba83 ld x21,0(x25) + 8000531c: 008c8c93 addi x25,x25,8 + +0000000080005320 : +Zbkb_rol_cg_cmp_rs1_rs2_b21: + rol x12, x21, x21 # perform operation + 80005320: 615a9633 rol x12,x21,x21 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkb_rol_cg_cmp_rs1_rs2_b21, Zbkb_rol_cg_cmp_rs1_rs2_b21_str) + 80005324: 00033383 ld x7,0(x6) + 80005328: 00c38c63 beq x7,x12,80005340 + 8000532c: 1ed0246f jal x8,80007d18 + 80005330: 80005320 .word 0x80005320 + 80005334: 00000000 .word 0x00000000 + 80005338: 8001687e .word 0x8001687e + 8000533c: 00000000 .word 0x00000000 + 80005340: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x7936aae39c794d6b + 80005344: 000cbb03 ld x22,0(x25) + 80005348: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x8a1eee8c3b05acb3 + 8000534c: 000cbb03 ld x22,0(x25) + 80005350: 008c8c93 addi x25,x25,8 + +0000000080005354 : +Zbkb_rol_cg_cmp_rs1_rs2_b22: + rol x9, x22, x22 # perform operation + 80005354: 616b14b3 rol x9,x22,x22 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkb_rol_cg_cmp_rs1_rs2_b22, Zbkb_rol_cg_cmp_rs1_rs2_b22_str) + 80005358: 00033383 ld x7,0(x6) + 8000535c: 00938c63 beq x7,x9,80005374 + 80005360: 1b90246f jal x8,80007d18 + 80005364: 80005354 .word 0x80005354 + 80005368: 00000000 .word 0x00000000 + 8000536c: 800168b6 .word 0x800168b6 + 80005370: 00000000 .word 0x00000000 + 80005374: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x08e10b9e4f98d499 + 80005378: 000cbb83 ld x23,0(x25) + 8000537c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x54d008da7f85d09b + 80005380: 000cbb83 ld x23,0(x25) + 80005384: 008c8c93 addi x25,x25,8 + +0000000080005388 : +Zbkb_rol_cg_cmp_rs1_rs2_b23: + rol x22, x23, x23 # perform operation + 80005388: 617b9b33 rol x22,x23,x23 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkb_rol_cg_cmp_rs1_rs2_b23, Zbkb_rol_cg_cmp_rs1_rs2_b23_str) + 8000538c: 00033383 ld x7,0(x6) + 80005390: 01638c63 beq x7,x22,800053a8 + 80005394: 1850246f jal x8,80007d18 + 80005398: 80005388 .word 0x80005388 + 8000539c: 00000000 .word 0x00000000 + 800053a0: 800168ee .word 0x800168ee + 800053a4: 00000000 .word 0x00000000 + 800053a8: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x8c00d4efe70bd9d1 + 800053ac: 000cbc03 ld x24,0(x25) + 800053b0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x9ac9a78ffd63e1b8 + 800053b4: 000cbc03 ld x24,0(x25) + 800053b8: 008c8c93 addi x25,x25,8 + +00000000800053bc : +Zbkb_rol_cg_cmp_rs1_rs2_b24: + rol x1, x24, x24 # perform operation + 800053bc: 618c10b3 rol x1,x24,x24 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkb_rol_cg_cmp_rs1_rs2_b24, Zbkb_rol_cg_cmp_rs1_rs2_b24_str) + 800053c0: 00033383 ld x7,0(x6) + 800053c4: 00138c63 beq x7,x1,800053dc + 800053c8: 1510246f jal x8,80007d18 + 800053cc: 800053bc .word 0x800053bc + 800053d0: 00000000 .word 0x00000000 + 800053d4: 80016926 .word 0x80016926 + 800053d8: 00000000 .word 0x00000000 + 800053dc: 00830313 addi x6,x6,8 + + mv x21, x25 # switch data pointer register to avoid conflict with test + 800053e0: 000c8a93 addi x21,x25,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x533357204255f305 + 800053e4: 000abc83 ld x25,0(x21) + 800053e8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x5444ccdbf978bce2 + 800053ec: 000abc83 ld x25,0(x21) + 800053f0: 008a8a93 addi x21,x21,8 + +00000000800053f4 : +Zbkb_rol_cg_cmp_rs1_rs2_b25: + rol x0, x25, x25 # perform operation + 800053f4: 619c9033 rol x0,x25,x25 + # Check if x0 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x0, Zbkb_rol_cg_cmp_rs1_rs2_b25, Zbkb_rol_cg_cmp_rs1_rs2_b25_str) + 800053f8: 00033383 ld x7,0(x6) + 800053fc: 00038c63 beq x7,x0,80005414 + 80005400: 1190246f jal x8,80007d18 + 80005404: 800053f4 .word 0x800053f4 + 80005408: 00000000 .word 0x00000000 + 8000540c: 8001695e .word 0x8001695e + 80005410: 00000000 .word 0x00000000 + 80005414: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x91884c99e21c03cc + 80005418: 000abd03 ld x26,0(x21) + 8000541c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xc8e5e58e59d66a8f + 80005420: 000abd03 ld x26,0(x21) + 80005424: 008a8a93 addi x21,x21,8 + +0000000080005428 : +Zbkb_rol_cg_cmp_rs1_rs2_b26: + rol x28, x26, x26 # perform operation + 80005428: 61ad1e33 rol x28,x26,x26 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkb_rol_cg_cmp_rs1_rs2_b26, Zbkb_rol_cg_cmp_rs1_rs2_b26_str) + 8000542c: 00033383 ld x7,0(x6) + 80005430: 01c38c63 beq x7,x28,80005448 + 80005434: 0e50246f jal x8,80007d18 + 80005438: 80005428 .word 0x80005428 + 8000543c: 00000000 .word 0x00000000 + 80005440: 80016996 .word 0x80016996 + 80005444: 00000000 .word 0x00000000 + 80005448: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x2a93fc6ac75fa8e1 + 8000544c: 000abd83 ld x27,0(x21) + 80005450: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xe8eadaa0214882af + 80005454: 000abd83 ld x27,0(x21) + 80005458: 008a8a93 addi x21,x21,8 + +000000008000545c : +Zbkb_rol_cg_cmp_rs1_rs2_b27: + rol x29, x27, x27 # perform operation + 8000545c: 61bd9eb3 rol x29,x27,x27 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkb_rol_cg_cmp_rs1_rs2_b27, Zbkb_rol_cg_cmp_rs1_rs2_b27_str) + 80005460: 00033383 ld x7,0(x6) + 80005464: 01d38c63 beq x7,x29,8000547c + 80005468: 0b10246f jal x8,80007d18 + 8000546c: 8000545c .word 0x8000545c + 80005470: 00000000 .word 0x00000000 + 80005474: 800169ce .word 0x800169ce + 80005478: 00000000 .word 0x00000000 + 8000547c: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xa53e6b780922c255 + 80005480: 000abe03 ld x28,0(x21) + 80005484: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x13baefd29fa387c4 + 80005488: 000abe03 ld x28,0(x21) + 8000548c: 008a8a93 addi x21,x21,8 + +0000000080005490 : +Zbkb_rol_cg_cmp_rs1_rs2_b28: + rol x29, x28, x28 # perform operation + 80005490: 61ce1eb3 rol x29,x28,x28 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkb_rol_cg_cmp_rs1_rs2_b28, Zbkb_rol_cg_cmp_rs1_rs2_b28_str) + 80005494: 00033383 ld x7,0(x6) + 80005498: 01d38c63 beq x7,x29,800054b0 + 8000549c: 07d0246f jal x8,80007d18 + 800054a0: 80005490 .word 0x80005490 + 800054a4: 00000000 .word 0x00000000 + 800054a8: 80016a06 .word 0x80016a06 + 800054ac: 00000000 .word 0x00000000 + 800054b0: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xa12d03184e28238e + 800054b4: 000abe83 ld x29,0(x21) + 800054b8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x568ab154a2139afb + 800054bc: 000abe83 ld x29,0(x21) + 800054c0: 008a8a93 addi x21,x21,8 + +00000000800054c4 : +Zbkb_rol_cg_cmp_rs1_rs2_b29: + rol x25, x29, x29 # perform operation + 800054c4: 61de9cb3 rol x25,x29,x29 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkb_rol_cg_cmp_rs1_rs2_b29, Zbkb_rol_cg_cmp_rs1_rs2_b29_str) + 800054c8: 00033383 ld x7,0(x6) + 800054cc: 01938c63 beq x7,x25,800054e4 + 800054d0: 0490246f jal x8,80007d18 + 800054d4: 800054c4 .word 0x800054c4 + 800054d8: 00000000 .word 0x00000000 + 800054dc: 80016a3e .word 0x80016a3e + 800054e0: 00000000 .word 0x00000000 + 800054e4: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xd486d77b2d34f666 + 800054e8: 000abf03 ld x30,0(x21) + 800054ec: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xeb80b222545dfa46 + 800054f0: 000abf03 ld x30,0(x21) + 800054f4: 008a8a93 addi x21,x21,8 + +00000000800054f8 : +Zbkb_rol_cg_cmp_rs1_rs2_b30: + rol x3, x30, x30 # perform operation + 800054f8: 61ef11b3 rol x3,x30,x30 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkb_rol_cg_cmp_rs1_rs2_b30, Zbkb_rol_cg_cmp_rs1_rs2_b30_str) + 800054fc: 00033383 ld x7,0(x6) + 80005500: 00338c63 beq x7,x3,80005518 + 80005504: 0150246f jal x8,80007d18 + 80005508: 800054f8 .word 0x800054f8 + 8000550c: 00000000 .word 0x00000000 + 80005510: 80016a76 .word 0x80016a76 + 80005514: 00000000 .word 0x00000000 + 80005518: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xe81d65b1a8805a48 + 8000551c: 000abf83 ld x31,0(x21) + 80005520: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xa84b07fbadbeb295 + 80005524: 000abf83 ld x31,0(x21) + 80005528: 008a8a93 addi x21,x21,8 + +000000008000552c : +Zbkb_rol_cg_cmp_rs1_rs2_b31: + rol x16, x31, x31 # perform operation + 8000552c: 61ff9833 rol x16,x31,x31 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkb_rol_cg_cmp_rs1_rs2_b31, Zbkb_rol_cg_cmp_rs1_rs2_b31_str) + 80005530: 00033383 ld x7,0(x6) + 80005534: 01038c63 beq x7,x16,8000554c + 80005538: 7e00246f jal x8,80007d18 + 8000553c: 8000552c .word 0x8000552c + 80005540: 00000000 .word 0x00000000 + 80005544: 80016aae .word 0x80016aae + 80005548: 00000000 .word 0x00000000 + 8000554c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x43a48382e29693f6 + 80005550: 000ab003 ld x0,0(x21) + 80005554: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x95ed947cde53ae2f + 80005558: 000ab603 ld x12,0(x21) + 8000555c: 008a8a93 addi x21,x21,8 + +0000000080005560 : +Zbkb_rol_cg_cmp_rd_rs1_b0: + rol x0, x0, x12 # perform operation + 80005560: 60c01033 rol x0,x0,x12 + # Check if x0 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x0, Zbkb_rol_cg_cmp_rd_rs1_b0, Zbkb_rol_cg_cmp_rd_rs1_b0_str) + 80005564: 00033383 ld x7,0(x6) + 80005568: 00038c63 beq x7,x0,80005580 + 8000556c: 7ac0246f jal x8,80007d18 + 80005570: 80005560 .word 0x80005560 + 80005574: 00000000 .word 0x00000000 + 80005578: 80016ae6 .word 0x80016ae6 + 8000557c: 00000000 .word 0x00000000 + 80005580: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xb33ecb8e84389744 + 80005584: 000ab083 ld x1,0(x21) + 80005588: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x39d5de01a21e10c5 + 8000558c: 000ab883 ld x17,0(x21) + 80005590: 008a8a93 addi x21,x21,8 + +0000000080005594 : +Zbkb_rol_cg_cmp_rd_rs1_b1: + rol x1, x1, x17 # perform operation + 80005594: 611090b3 rol x1,x1,x17 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkb_rol_cg_cmp_rd_rs1_b1, Zbkb_rol_cg_cmp_rd_rs1_b1_str) + 80005598: 00033383 ld x7,0(x6) + 8000559c: 00138c63 beq x7,x1,800055b4 + 800055a0: 7780246f jal x8,80007d18 + 800055a4: 80005594 .word 0x80005594 + 800055a8: 00000000 .word 0x00000000 + 800055ac: 80016b1c .word 0x80016b1c + 800055b0: 00000000 .word 0x00000000 + 800055b4: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x3e2e37c4cde71e1b + 800055b8: 000ab103 ld x2,0(x21) + 800055bc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x3945b2cced3863d2 + 800055c0: 000ab003 ld x0,0(x21) + 800055c4: 008a8a93 addi x21,x21,8 + +00000000800055c8 : +Zbkb_rol_cg_cmp_rd_rs1_b2: + rol x2, x2, x0 # perform operation + 800055c8: 60011133 rol x2,x2,x0 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkb_rol_cg_cmp_rd_rs1_b2, Zbkb_rol_cg_cmp_rd_rs1_b2_str) + 800055cc: 00033383 ld x7,0(x6) + 800055d0: 00238c63 beq x7,x2,800055e8 + 800055d4: 7440246f jal x8,80007d18 + 800055d8: 800055c8 .word 0x800055c8 + 800055dc: 00000000 .word 0x00000000 + 800055e0: 80016b52 .word 0x80016b52 + 800055e4: 00000000 .word 0x00000000 + 800055e8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x4bf336e609820bee + 800055ec: 000ab183 ld x3,0(x21) + 800055f0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xa6964a419de6746e + 800055f4: 000ab483 ld x9,0(x21) + 800055f8: 008a8a93 addi x21,x21,8 + +00000000800055fc : +Zbkb_rol_cg_cmp_rd_rs1_b3: + rol x3, x3, x9 # perform operation + 800055fc: 609191b3 rol x3,x3,x9 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkb_rol_cg_cmp_rd_rs1_b3, Zbkb_rol_cg_cmp_rd_rs1_b3_str) + 80005600: 00033383 ld x7,0(x6) + 80005604: 00338c63 beq x7,x3,8000561c + 80005608: 7100246f jal x8,80007d18 + 8000560c: 800055fc .word 0x800055fc + 80005610: 00000000 .word 0x00000000 + 80005614: 80016b88 .word 0x80016b88 + 80005618: 00000000 .word 0x00000000 + 8000561c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0xc8c925575b3a93a2 + 80005620: 000ab203 ld x4,0(x21) + 80005624: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0xf487a5ecb4ce0b30 + 80005628: 000abb03 ld x22,0(x21) + 8000562c: 008a8a93 addi x21,x21,8 + +0000000080005630 : +Zbkb_rol_cg_cmp_rd_rs1_b4: + rol x4, x4, x22 # perform operation + 80005630: 61621233 rol x4,x4,x22 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkb_rol_cg_cmp_rd_rs1_b4, Zbkb_rol_cg_cmp_rd_rs1_b4_str) + 80005634: 00033383 ld x7,0(x6) + 80005638: 00438c63 beq x7,x4,80005650 + 8000563c: 6dc0246f jal x8,80007d18 + 80005640: 80005630 .word 0x80005630 + 80005644: 00000000 .word 0x00000000 + 80005648: 80016bbe .word 0x80016bbe + 8000564c: 00000000 .word 0x00000000 + 80005650: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xe5b042768e213f23 + 80005654: 000ab283 ld x5,0(x21) + 80005658: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xaced03e0058dec3e + 8000565c: 000ab683 ld x13,0(x21) + 80005660: 008a8a93 addi x21,x21,8 + +0000000080005664 : +Zbkb_rol_cg_cmp_rd_rs1_b5: + rol x5, x5, x13 # perform operation + 80005664: 60d292b3 rol x5,x5,x13 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkb_rol_cg_cmp_rd_rs1_b5, Zbkb_rol_cg_cmp_rd_rs1_b5_str) + 80005668: 00033383 ld x7,0(x6) + 8000566c: 00538c63 beq x7,x5,80005684 + 80005670: 6a80246f jal x8,80007d18 + 80005674: 80005664 .word 0x80005664 + 80005678: 00000000 .word 0x00000000 + 8000567c: 80016bf4 .word 0x80016bf4 + 80005680: 00000000 .word 0x00000000 + 80005684: 00830313 addi x6,x6,8 + + mv x10, x6 # switch signature pointer register to avoid conflict with test + 80005688: 00030513 addi x10,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x2e55c495e82e7fe7 + 8000568c: 000ab303 ld x6,0(x21) + 80005690: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xee0e837c6c9da76f + 80005694: 000ab583 ld x11,0(x21) + 80005698: 008a8a93 addi x21,x21,8 + +000000008000569c : +Zbkb_rol_cg_cmp_rd_rs1_b6: + rol x6, x6, x11 # perform operation + 8000569c: 60b31333 rol x6,x6,x11 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_rol_cg_cmp_rd_rs1_b6, Zbkb_rol_cg_cmp_rd_rs1_b6_str) + 800056a0: 00053383 ld x7,0(x10) + 800056a4: 00638c63 beq x7,x6,800056bc + 800056a8: 6700246f jal x8,80007d18 + 800056ac: 8000569c .word 0x8000569c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 80016c2a .word 0x80016c2a + 800056b8: 00000000 .word 0x00000000 + 800056bc: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056c0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056c4: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x34390f54d985f92d + 800056c8: 000ab383 ld x7,0(x21) + 800056cc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x1a808fa6d4e2bb75 + 800056d0: 000abf83 ld x31,0(x21) + 800056d4: 008a8a93 addi x21,x21,8 + +00000000800056d8 : +Zbkb_rol_cg_cmp_rd_rs1_b7: + rol x7, x7, x31 # perform operation + 800056d8: 61f393b3 rol x7,x7,x31 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_rol_cg_cmp_rd_rs1_b7, Zbkb_rol_cg_cmp_rd_rs1_b7_str) + 800056dc: 00053683 ld x13,0(x10) + 800056e0: 00768c63 beq x13,x7,800056f8 + 800056e4: 65c0276f jal x14,80007d40 + 800056e8: 800056d8 .word 0x800056d8 + 800056ec: 00000000 .word 0x00000000 + 800056f0: 80016c60 .word 0x80016c60 + 800056f4: 00000000 .word 0x00000000 + 800056f8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x70b52e67784341b3 + 800056fc: 000ab403 ld x8,0(x21) + 80005700: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x048ab9cb663ed0a7 + 80005704: 000ab903 ld x18,0(x21) + 80005708: 008a8a93 addi x21,x21,8 + +000000008000570c : +Zbkb_rol_cg_cmp_rd_rs1_b8: + rol x8, x8, x18 # perform operation + 8000570c: 61241433 rol x8,x8,x18 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_rol_cg_cmp_rd_rs1_b8, Zbkb_rol_cg_cmp_rd_rs1_b8_str) + 80005710: 00053683 ld x13,0(x10) + 80005714: 00868c63 beq x13,x8,8000572c + 80005718: 6280276f jal x14,80007d40 + 8000571c: 8000570c .word 0x8000570c + 80005720: 00000000 .word 0x00000000 + 80005724: 80016c96 .word 0x80016c96 + 80005728: 00000000 .word 0x00000000 + 8000572c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x37520917d27d7b9e + 80005730: 000ab483 ld x9,0(x21) + 80005734: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0xb7b026575b78e724 + 80005738: 000abe83 ld x29,0(x21) + 8000573c: 008a8a93 addi x21,x21,8 + +0000000080005740 : +Zbkb_rol_cg_cmp_rd_rs1_b9: + rol x9, x9, x29 # perform operation + 80005740: 61d494b3 rol x9,x9,x29 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_rol_cg_cmp_rd_rs1_b9, Zbkb_rol_cg_cmp_rd_rs1_b9_str) + 80005744: 00053683 ld x13,0(x10) + 80005748: 00968c63 beq x13,x9,80005760 + 8000574c: 5f40276f jal x14,80007d40 + 80005750: 80005740 .word 0x80005740 + 80005754: 00000000 .word 0x00000000 + 80005758: 80016ccc .word 0x80016ccc + 8000575c: 00000000 .word 0x00000000 + 80005760: 00850513 addi x10,x10,8 + + mv x3, x10 # switch signature pointer register to avoid conflict with test + 80005764: 00050193 addi x3,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x88ba2fa6d78f4375 + 80005768: 000ab503 ld x10,0(x21) + 8000576c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0xe152b0cdb37d0cca + 80005770: 000abc83 ld x25,0(x21) + 80005774: 008a8a93 addi x21,x21,8 + +0000000080005778 : +Zbkb_rol_cg_cmp_rd_rs1_b10: + rol x10, x10, x25 # perform operation + 80005778: 61951533 rol x10,x10,x25 + # Check if x10 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x10, Zbkb_rol_cg_cmp_rd_rs1_b10, Zbkb_rol_cg_cmp_rd_rs1_b10_str) + 8000577c: 0001b683 ld x13,0(x3) + 80005780: 00a68c63 beq x13,x10,80005798 + 80005784: 5bc0276f jal x14,80007d40 + 80005788: 80005778 .word 0x80005778 + 8000578c: 00000000 .word 0x00000000 + 80005790: 80016d02 .word 0x80016d02 + 80005794: 00000000 .word 0x00000000 + 80005798: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xe8654822f17872e6 + 8000579c: 000ab583 ld x11,0(x21) + 800057a0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xfc7d3b4eed9e0d04 + 800057a4: 000aba03 ld x20,0(x21) + 800057a8: 008a8a93 addi x21,x21,8 + +00000000800057ac : +Zbkb_rol_cg_cmp_rd_rs1_b11: + rol x11, x11, x20 # perform operation + 800057ac: 614595b3 rol x11,x11,x20 + # Check if x11 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x11, Zbkb_rol_cg_cmp_rd_rs1_b11, Zbkb_rol_cg_cmp_rd_rs1_b11_str) + 800057b0: 0001b683 ld x13,0(x3) + 800057b4: 00b68c63 beq x13,x11,800057cc + 800057b8: 5880276f jal x14,80007d40 + 800057bc: 800057ac .word 0x800057ac + 800057c0: 00000000 .word 0x00000000 + 800057c4: 80016d39 .word 0x80016d39 + 800057c8: 00000000 .word 0x00000000 + 800057cc: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x365fdd5135aa0386 + 800057d0: 000ab603 ld x12,0(x21) + 800057d4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x350d435f5d2afe4a + 800057d8: 000abb03 ld x22,0(x21) + 800057dc: 008a8a93 addi x21,x21,8 + +00000000800057e0 : +Zbkb_rol_cg_cmp_rd_rs1_b12: + rol x12, x12, x22 # perform operation + 800057e0: 61661633 rol x12,x12,x22 + # Check if x12 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x12, Zbkb_rol_cg_cmp_rd_rs1_b12, Zbkb_rol_cg_cmp_rd_rs1_b12_str) + 800057e4: 0001b683 ld x13,0(x3) + 800057e8: 00c68c63 beq x13,x12,80005800 + 800057ec: 5540276f jal x14,80007d40 + 800057f0: 800057e0 .word 0x800057e0 + 800057f4: 00000000 .word 0x00000000 + 800057f8: 80016d70 .word 0x80016d70 + 800057fc: 00000000 .word 0x00000000 + 80005800: 00818193 addi x3,x3,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005804: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005808: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x8c0e21ea6bb0e1bc + 8000580c: 000ab683 ld x13,0(x21) + 80005810: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x33ba3090193ab8fe + 80005814: 000ab283 ld x5,0(x21) + 80005818: 008a8a93 addi x21,x21,8 + +000000008000581c : +Zbkb_rol_cg_cmp_rd_rs1_b13: + rol x13, x13, x5 # perform operation + 8000581c: 605696b3 rol x13,x13,x5 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zbkb_rol_cg_cmp_rd_rs1_b13, Zbkb_rol_cg_cmp_rd_rs1_b13_str) + 80005820: 0001b383 ld x7,0(x3) + 80005824: 00d38c63 beq x7,x13,8000583c + 80005828: 4f00246f jal x8,80007d18 + 8000582c: 8000581c .word 0x8000581c + 80005830: 00000000 .word 0x00000000 + 80005834: 80016da7 .word 0x80016da7 + 80005838: 00000000 .word 0x00000000 + 8000583c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x401c8da5f0ca9727 + 80005840: 000ab703 ld x14,0(x21) + 80005844: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x0c671243d8a3c8a1 + 80005848: 000abb03 ld x22,0(x21) + 8000584c: 008a8a93 addi x21,x21,8 + +0000000080005850 : +Zbkb_rol_cg_cmp_rd_rs1_b14: + rol x14, x14, x22 # perform operation + 80005850: 61671733 rol x14,x14,x22 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zbkb_rol_cg_cmp_rd_rs1_b14, Zbkb_rol_cg_cmp_rd_rs1_b14_str) + 80005854: 0001b383 ld x7,0(x3) + 80005858: 00e38c63 beq x7,x14,80005870 + 8000585c: 4bc0246f jal x8,80007d18 + 80005860: 80005850 .word 0x80005850 + 80005864: 00000000 .word 0x00000000 + 80005868: 80016dde .word 0x80016dde + 8000586c: 00000000 .word 0x00000000 + 80005870: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x55dd07258ddb87b7 + 80005874: 000ab783 ld x15,0(x21) + 80005878: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xa874a3411dea47fc + 8000587c: 000ab203 ld x4,0(x21) + 80005880: 008a8a93 addi x21,x21,8 + +0000000080005884 : +Zbkb_rol_cg_cmp_rd_rs1_b15: + rol x15, x15, x4 # perform operation + 80005884: 604797b3 rol x15,x15,x4 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zbkb_rol_cg_cmp_rd_rs1_b15, Zbkb_rol_cg_cmp_rd_rs1_b15_str) + 80005888: 0001b383 ld x7,0(x3) + 8000588c: 00f38c63 beq x7,x15,800058a4 + 80005890: 4880246f jal x8,80007d18 + 80005894: 80005884 .word 0x80005884 + 80005898: 00000000 .word 0x00000000 + 8000589c: 80016e15 .word 0x80016e15 + 800058a0: 00000000 .word 0x00000000 + 800058a4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x82fe04cb5c0f0ede + 800058a8: 000ab803 ld x16,0(x21) + 800058ac: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x5779f5aed563235e + 800058b0: 000aba03 ld x20,0(x21) + 800058b4: 008a8a93 addi x21,x21,8 + +00000000800058b8 : +Zbkb_rol_cg_cmp_rd_rs1_b16: + rol x16, x16, x20 # perform operation + 800058b8: 61481833 rol x16,x16,x20 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zbkb_rol_cg_cmp_rd_rs1_b16, Zbkb_rol_cg_cmp_rd_rs1_b16_str) + 800058bc: 0001b383 ld x7,0(x3) + 800058c0: 01038c63 beq x7,x16,800058d8 + 800058c4: 4540246f jal x8,80007d18 + 800058c8: 800058b8 .word 0x800058b8 + 800058cc: 00000000 .word 0x00000000 + 800058d0: 80016e4c .word 0x80016e4c + 800058d4: 00000000 .word 0x00000000 + 800058d8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x48118652fed5a49e + 800058dc: 000ab883 ld x17,0(x21) + 800058e0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x7b9ffc672f584d00 + 800058e4: 000abc83 ld x25,0(x21) + 800058e8: 008a8a93 addi x21,x21,8 + +00000000800058ec : +Zbkb_rol_cg_cmp_rd_rs1_b17: + rol x17, x17, x25 # perform operation + 800058ec: 619898b3 rol x17,x17,x25 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zbkb_rol_cg_cmp_rd_rs1_b17, Zbkb_rol_cg_cmp_rd_rs1_b17_str) + 800058f0: 0001b383 ld x7,0(x3) + 800058f4: 01138c63 beq x7,x17,8000590c + 800058f8: 4200246f jal x8,80007d18 + 800058fc: 800058ec .word 0x800058ec + 80005900: 00000000 .word 0x00000000 + 80005904: 80016e83 .word 0x80016e83 + 80005908: 00000000 .word 0x00000000 + 8000590c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xf95a74f8217fa6ae + 80005910: 000ab903 ld x18,0(x21) + 80005914: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xa4ae89907445eff9 + 80005918: 000ab303 ld x6,0(x21) + 8000591c: 008a8a93 addi x21,x21,8 + +0000000080005920 : +Zbkb_rol_cg_cmp_rd_rs1_b18: + rol x18, x18, x6 # perform operation + 80005920: 60691933 rol x18,x18,x6 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zbkb_rol_cg_cmp_rd_rs1_b18, Zbkb_rol_cg_cmp_rd_rs1_b18_str) + 80005924: 0001b383 ld x7,0(x3) + 80005928: 01238c63 beq x7,x18,80005940 + 8000592c: 3ec0246f jal x8,80007d18 + 80005930: 80005920 .word 0x80005920 + 80005934: 00000000 .word 0x00000000 + 80005938: 80016eba .word 0x80016eba + 8000593c: 00000000 .word 0x00000000 + 80005940: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x853a5b949c7054e9 + 80005944: 000ab983 ld x19,0(x21) + 80005948: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xd7846316d7afb723 + 8000594c: 000ab903 ld x18,0(x21) + 80005950: 008a8a93 addi x21,x21,8 + +0000000080005954 : +Zbkb_rol_cg_cmp_rd_rs1_b19: + rol x19, x19, x18 # perform operation + 80005954: 612999b3 rol x19,x19,x18 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zbkb_rol_cg_cmp_rd_rs1_b19, Zbkb_rol_cg_cmp_rd_rs1_b19_str) + 80005958: 0001b383 ld x7,0(x3) + 8000595c: 01338c63 beq x7,x19,80005974 + 80005960: 3b80246f jal x8,80007d18 + 80005964: 80005954 .word 0x80005954 + 80005968: 00000000 .word 0x00000000 + 8000596c: 80016ef1 .word 0x80016ef1 + 80005970: 00000000 .word 0x00000000 + 80005974: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x984b3e3c50051d4b + 80005978: 000aba03 ld x20,0(x21) + 8000597c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x14081701e3910360 + 80005980: 000abb03 ld x22,0(x21) + 80005984: 008a8a93 addi x21,x21,8 + +0000000080005988 : +Zbkb_rol_cg_cmp_rd_rs1_b20: + rol x20, x20, x22 # perform operation + 80005988: 616a1a33 rol x20,x20,x22 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zbkb_rol_cg_cmp_rd_rs1_b20, Zbkb_rol_cg_cmp_rd_rs1_b20_str) + 8000598c: 0001b383 ld x7,0(x3) + 80005990: 01438c63 beq x7,x20,800059a8 + 80005994: 3840246f jal x8,80007d18 + 80005998: 80005988 .word 0x80005988 + 8000599c: 00000000 .word 0x00000000 + 800059a0: 80016f28 .word 0x80016f28 + 800059a4: 00000000 .word 0x00000000 + 800059a8: 00818193 addi x3,x3,8 + + mv x12, x21 # switch data pointer register to avoid conflict with test + 800059ac: 000a8613 addi x12,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xc4d3f42366cb6880 + 800059b0: 00063a83 ld x21,0(x12) + 800059b4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x1d8f3656f52fe0a6 + 800059b8: 00063903 ld x18,0(x12) + 800059bc: 00860613 addi x12,x12,8 + +00000000800059c0 : +Zbkb_rol_cg_cmp_rd_rs1_b21: + rol x21, x21, x18 # perform operation + 800059c0: 612a9ab3 rol x21,x21,x18 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zbkb_rol_cg_cmp_rd_rs1_b21, Zbkb_rol_cg_cmp_rd_rs1_b21_str) + 800059c4: 0001b383 ld x7,0(x3) + 800059c8: 01538c63 beq x7,x21,800059e0 + 800059cc: 34c0246f jal x8,80007d18 + 800059d0: 800059c0 .word 0x800059c0 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 80016f5f .word 0x80016f5f + 800059dc: 00000000 .word 0x00000000 + 800059e0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x86efbdfba3d198f7 + 800059e4: 00063b03 ld x22,0(x12) + 800059e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x3d6ba2587ffe05ad + 800059ec: 00063883 ld x17,0(x12) + 800059f0: 00860613 addi x12,x12,8 + +00000000800059f4 : +Zbkb_rol_cg_cmp_rd_rs1_b22: + rol x22, x22, x17 # perform operation + 800059f4: 611b1b33 rol x22,x22,x17 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zbkb_rol_cg_cmp_rd_rs1_b22, Zbkb_rol_cg_cmp_rd_rs1_b22_str) + 800059f8: 0001b383 ld x7,0(x3) + 800059fc: 01638c63 beq x7,x22,80005a14 + 80005a00: 3180246f jal x8,80007d18 + 80005a04: 800059f4 .word 0x800059f4 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 80016f96 .word 0x80016f96 + 80005a10: 00000000 .word 0x00000000 + 80005a14: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xd650a603fc532cdf + 80005a18: 00063b83 ld x23,0(x12) + 80005a1c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xe62d6466d7bb9394 + 80005a20: 00063d83 ld x27,0(x12) + 80005a24: 00860613 addi x12,x12,8 + +0000000080005a28 : +Zbkb_rol_cg_cmp_rd_rs1_b23: + rol x23, x23, x27 # perform operation + 80005a28: 61bb9bb3 rol x23,x23,x27 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zbkb_rol_cg_cmp_rd_rs1_b23, Zbkb_rol_cg_cmp_rd_rs1_b23_str) + 80005a2c: 0001b383 ld x7,0(x3) + 80005a30: 01738c63 beq x7,x23,80005a48 + 80005a34: 2e40246f jal x8,80007d18 + 80005a38: 80005a28 .word 0x80005a28 + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 80016fcd .word 0x80016fcd + 80005a44: 00000000 .word 0x00000000 + 80005a48: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x025c7ab03bcb6325 + 80005a4c: 00063c03 ld x24,0(x12) + 80005a50: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xb21835f4552d6da3 + 80005a54: 00063883 ld x17,0(x12) + 80005a58: 00860613 addi x12,x12,8 + +0000000080005a5c : +Zbkb_rol_cg_cmp_rd_rs1_b24: + rol x24, x24, x17 # perform operation + 80005a5c: 611c1c33 rol x24,x24,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_rol_cg_cmp_rd_rs1_b24, Zbkb_rol_cg_cmp_rd_rs1_b24_str) + 80005a60: 0001b383 ld x7,0(x3) + 80005a64: 01838c63 beq x7,x24,80005a7c + 80005a68: 2b00246f jal x8,80007d18 + 80005a6c: 80005a5c .word 0x80005a5c + 80005a70: 00000000 .word 0x00000000 + 80005a74: 80017004 .word 0x80017004 + 80005a78: 00000000 .word 0x00000000 + 80005a7c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x10f66ccaf03666f2 + 80005a80: 00063c83 ld x25,0(x12) + 80005a84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xc06c5b71c6a6b930 + 80005a88: 00063303 ld x6,0(x12) + 80005a8c: 00860613 addi x12,x12,8 + +0000000080005a90 : +Zbkb_rol_cg_cmp_rd_rs1_b25: + rol x25, x25, x6 # perform operation + 80005a90: 606c9cb3 rol x25,x25,x6 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_rol_cg_cmp_rd_rs1_b25, Zbkb_rol_cg_cmp_rd_rs1_b25_str) + 80005a94: 0001b383 ld x7,0(x3) + 80005a98: 01938c63 beq x7,x25,80005ab0 + 80005a9c: 27c0246f jal x8,80007d18 + 80005aa0: 80005a90 .word 0x80005a90 + 80005aa4: 00000000 .word 0x00000000 + 80005aa8: 8001703b .word 0x8001703b + 80005aac: 00000000 .word 0x00000000 + 80005ab0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xeb03da994c380102 + 80005ab4: 00063d03 ld x26,0(x12) + 80005ab8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x5bc7fc70365cb0c6 + 80005abc: 00063783 ld x15,0(x12) + 80005ac0: 00860613 addi x12,x12,8 + +0000000080005ac4 : +Zbkb_rol_cg_cmp_rd_rs1_b26: + rol x26, x26, x15 # perform operation + 80005ac4: 60fd1d33 rol x26,x26,x15 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_rol_cg_cmp_rd_rs1_b26, Zbkb_rol_cg_cmp_rd_rs1_b26_str) + 80005ac8: 0001b383 ld x7,0(x3) + 80005acc: 01a38c63 beq x7,x26,80005ae4 + 80005ad0: 2480246f jal x8,80007d18 + 80005ad4: 80005ac4 .word 0x80005ac4 + 80005ad8: 00000000 .word 0x00000000 + 80005adc: 80017072 .word 0x80017072 + 80005ae0: 00000000 .word 0x00000000 + 80005ae4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x0617bad51524d502 + 80005ae8: 00063d83 ld x27,0(x12) + 80005aec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xc34de828002e020c + 80005af0: 00063203 ld x4,0(x12) + 80005af4: 00860613 addi x12,x12,8 + +0000000080005af8 : +Zbkb_rol_cg_cmp_rd_rs1_b27: + rol x27, x27, x4 # perform operation + 80005af8: 604d9db3 rol x27,x27,x4 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_rol_cg_cmp_rd_rs1_b27, Zbkb_rol_cg_cmp_rd_rs1_b27_str) + 80005afc: 0001b383 ld x7,0(x3) + 80005b00: 01b38c63 beq x7,x27,80005b18 + 80005b04: 2140246f jal x8,80007d18 + 80005b08: 80005af8 .word 0x80005af8 + 80005b0c: 00000000 .word 0x00000000 + 80005b10: 800170a9 .word 0x800170a9 + 80005b14: 00000000 .word 0x00000000 + 80005b18: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x4ada7baa5707cb44 + 80005b1c: 00063e03 ld x28,0(x12) + 80005b20: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x65dbce2ac64fd06f + 80005b24: 00063303 ld x6,0(x12) + 80005b28: 00860613 addi x12,x12,8 + +0000000080005b2c : +Zbkb_rol_cg_cmp_rd_rs1_b28: + rol x28, x28, x6 # perform operation + 80005b2c: 606e1e33 rol x28,x28,x6 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_rol_cg_cmp_rd_rs1_b28, Zbkb_rol_cg_cmp_rd_rs1_b28_str) + 80005b30: 0001b383 ld x7,0(x3) + 80005b34: 01c38c63 beq x7,x28,80005b4c + 80005b38: 1e00246f jal x8,80007d18 + 80005b3c: 80005b2c .word 0x80005b2c + 80005b40: 00000000 .word 0x00000000 + 80005b44: 800170e0 .word 0x800170e0 + 80005b48: 00000000 .word 0x00000000 + 80005b4c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x2baa6f5ff08512c0 + 80005b50: 00063e83 ld x29,0(x12) + 80005b54: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xeed4e0f57f7edcae + 80005b58: 00063d03 ld x26,0(x12) + 80005b5c: 00860613 addi x12,x12,8 + +0000000080005b60 : +Zbkb_rol_cg_cmp_rd_rs1_b29: + rol x29, x29, x26 # perform operation + 80005b60: 61ae9eb3 rol x29,x29,x26 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_rol_cg_cmp_rd_rs1_b29, Zbkb_rol_cg_cmp_rd_rs1_b29_str) + 80005b64: 0001b383 ld x7,0(x3) + 80005b68: 01d38c63 beq x7,x29,80005b80 + 80005b6c: 1ac0246f jal x8,80007d18 + 80005b70: 80005b60 .word 0x80005b60 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 80017117 .word 0x80017117 + 80005b7c: 00000000 .word 0x00000000 + 80005b80: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x9aca9059b420ce27 + 80005b84: 00063f03 ld x30,0(x12) + 80005b88: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x28c3af430a7e7057 + 80005b8c: 00063b83 ld x23,0(x12) + 80005b90: 00860613 addi x12,x12,8 + +0000000080005b94 : +Zbkb_rol_cg_cmp_rd_rs1_b30: + rol x30, x30, x23 # perform operation + 80005b94: 617f1f33 rol x30,x30,x23 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_rol_cg_cmp_rd_rs1_b30, Zbkb_rol_cg_cmp_rd_rs1_b30_str) + 80005b98: 0001b383 ld x7,0(x3) + 80005b9c: 01e38c63 beq x7,x30,80005bb4 + 80005ba0: 1780246f jal x8,80007d18 + 80005ba4: 80005b94 .word 0x80005b94 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 8001714e .word 0x8001714e + 80005bb0: 00000000 .word 0x00000000 + 80005bb4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xd9faf07882760183 + 80005bb8: 00063f83 ld x31,0(x12) + 80005bbc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x2b60a93263659190 + 80005bc0: 00063583 ld x11,0(x12) + 80005bc4: 00860613 addi x12,x12,8 + +0000000080005bc8 : +Zbkb_rol_cg_cmp_rd_rs1_b31: + rol x31, x31, x11 # perform operation + 80005bc8: 60bf9fb3 rol x31,x31,x11 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_rol_cg_cmp_rd_rs1_b31, Zbkb_rol_cg_cmp_rd_rs1_b31_str) + 80005bcc: 0001b383 ld x7,0(x3) + 80005bd0: 01f38c63 beq x7,x31,80005be8 + 80005bd4: 1440246f jal x8,80007d18 + 80005bd8: 80005bc8 .word 0x80005bc8 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 80017185 .word 0x80017185 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x794b0cab93764601 + 80005bec: 00063203 ld x4,0(x12) + 80005bf0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0xc8189ea4754d7e5e + 80005bf4: 00063003 ld x0,0(x12) + 80005bf8: 00860613 addi x12,x12,8 + +0000000080005bfc : +Zbkb_rol_cg_cmp_rd_rs2_b0: + rol x0, x4, x0 # perform operation + 80005bfc: 60021033 rol x0,x4,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zbkb_rol_cg_cmp_rd_rs2_b0, Zbkb_rol_cg_cmp_rd_rs2_b0_str) + 80005c00: 0001b383 ld x7,0(x3) + 80005c04: 00038c63 beq x7,x0,80005c1c + 80005c08: 1100246f jal x8,80007d18 + 80005c0c: 80005bfc .word 0x80005bfc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 800171bc .word 0x800171bc + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x5568ae99209ff161 + 80005c20: 00063203 ld x4,0(x12) + 80005c24: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xaea2441789445c5b + 80005c28: 00063083 ld x1,0(x12) + 80005c2c: 00860613 addi x12,x12,8 + +0000000080005c30 : +Zbkb_rol_cg_cmp_rd_rs2_b1: + rol x1, x4, x1 # perform operation + 80005c30: 601210b3 rol x1,x4,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zbkb_rol_cg_cmp_rd_rs2_b1, Zbkb_rol_cg_cmp_rd_rs2_b1_str) + 80005c34: 0001b383 ld x7,0(x3) + 80005c38: 00138c63 beq x7,x1,80005c50 + 80005c3c: 0dc0246f jal x8,80007d18 + 80005c40: 80005c30 .word 0x80005c30 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 800171f2 .word 0x800171f2 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x324761375ecc3de5 + 80005c54: 00063e03 ld x28,0(x12) + 80005c58: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x21a535e2acd0f2cd + 80005c5c: 00063103 ld x2,0(x12) + 80005c60: 00860613 addi x12,x12,8 + +0000000080005c64 : +Zbkb_rol_cg_cmp_rd_rs2_b2: + rol x2, x28, x2 # perform operation + 80005c64: 602e1133 rol x2,x28,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zbkb_rol_cg_cmp_rd_rs2_b2, Zbkb_rol_cg_cmp_rd_rs2_b2_str) + 80005c68: 0001b383 ld x7,0(x3) + 80005c6c: 00238c63 beq x7,x2,80005c84 + 80005c70: 0a80246f jal x8,80007d18 + 80005c74: 80005c64 .word 0x80005c64 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 80017228 .word 0x80017228 + 80005c80: 00000000 .word 0x00000000 + 80005c84: 00818193 addi x3,x3,8 + + mv x16, x3 # switch signature pointer register to avoid conflict with test + 80005c88: 00018813 addi x16,x3,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x23b2c68a69e8ebf5 + 80005c8c: 00063b03 ld x22,0(x12) + 80005c90: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x3ecf0b96585c350e + 80005c94: 00063183 ld x3,0(x12) + 80005c98: 00860613 addi x12,x12,8 + +0000000080005c9c : +Zbkb_rol_cg_cmp_rd_rs2_b3: + rol x3, x22, x3 # perform operation + 80005c9c: 603b11b3 rol x3,x22,x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zbkb_rol_cg_cmp_rd_rs2_b3, Zbkb_rol_cg_cmp_rd_rs2_b3_str) + 80005ca0: 00083383 ld x7,0(x16) + 80005ca4: 00338c63 beq x7,x3,80005cbc + 80005ca8: 0700246f jal x8,80007d18 + 80005cac: 80005c9c .word 0x80005c9c + 80005cb0: 00000000 .word 0x00000000 + 80005cb4: 8001725e .word 0x8001725e + 80005cb8: 00000000 .word 0x00000000 + 80005cbc: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xb3acbb924f6298dc + 80005cc0: 00063483 ld x9,0(x12) + 80005cc4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x6a4333e045df6d76 + 80005cc8: 00063203 ld x4,0(x12) + 80005ccc: 00860613 addi x12,x12,8 + +0000000080005cd0 : +Zbkb_rol_cg_cmp_rd_rs2_b4: + rol x4, x9, x4 # perform operation + 80005cd0: 60449233 rol x4,x9,x4 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zbkb_rol_cg_cmp_rd_rs2_b4, Zbkb_rol_cg_cmp_rd_rs2_b4_str) + 80005cd4: 00083383 ld x7,0(x16) + 80005cd8: 00438c63 beq x7,x4,80005cf0 + 80005cdc: 03c0246f jal x8,80007d18 + 80005ce0: 80005cd0 .word 0x80005cd0 + 80005ce4: 00000000 .word 0x00000000 + 80005ce8: 80017294 .word 0x80017294 + 80005cec: 00000000 .word 0x00000000 + 80005cf0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xfd0dfd0692c322c1 + 80005cf4: 00063183 ld x3,0(x12) + 80005cf8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xdeae8d9802e0d7b0 + 80005cfc: 00063283 ld x5,0(x12) + 80005d00: 00860613 addi x12,x12,8 + +0000000080005d04 : +Zbkb_rol_cg_cmp_rd_rs2_b5: + rol x5, x3, x5 # perform operation + 80005d04: 605192b3 rol x5,x3,x5 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkb_rol_cg_cmp_rd_rs2_b5, Zbkb_rol_cg_cmp_rd_rs2_b5_str) + 80005d08: 00083383 ld x7,0(x16) + 80005d0c: 00538c63 beq x7,x5,80005d24 + 80005d10: 0080246f jal x8,80007d18 + 80005d14: 80005d04 .word 0x80005d04 + 80005d18: 00000000 .word 0x00000000 + 80005d1c: 800172ca .word 0x800172ca + 80005d20: 00000000 .word 0x00000000 + 80005d24: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x89172e65cd383d73 + 80005d28: 00063503 ld x10,0(x12) + 80005d2c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x2ce7ef46f65bf3ad + 80005d30: 00063303 ld x6,0(x12) + 80005d34: 00860613 addi x12,x12,8 + +0000000080005d38 : +Zbkb_rol_cg_cmp_rd_rs2_b6: + rol x6, x10, x6 # perform operation + 80005d38: 60651333 rol x6,x10,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zbkb_rol_cg_cmp_rd_rs2_b6, Zbkb_rol_cg_cmp_rd_rs2_b6_str) + 80005d3c: 00083383 ld x7,0(x16) + 80005d40: 00638c63 beq x7,x6,80005d58 + 80005d44: 7d50146f jal x8,80007d18 + 80005d48: 80005d38 .word 0x80005d38 + 80005d4c: 00000000 .word 0x00000000 + 80005d50: 80017300 .word 0x80017300 + 80005d54: 00000000 .word 0x00000000 + 80005d58: 00880813 addi x16,x16,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005d5c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005d60: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xdf0102a466f9ac6b + 80005d64: 00063503 ld x10,0(x12) + 80005d68: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xf379ecae757c5298 + 80005d6c: 00063383 ld x7,0(x12) + 80005d70: 00860613 addi x12,x12,8 + +0000000080005d74 : +Zbkb_rol_cg_cmp_rd_rs2_b7: + rol x7, x10, x7 # perform operation + 80005d74: 607513b3 rol x7,x10,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zbkb_rol_cg_cmp_rd_rs2_b7, Zbkb_rol_cg_cmp_rd_rs2_b7_str) + 80005d78: 00083203 ld x4,0(x16) + 80005d7c: 00720c63 beq x4,x7,80005d94 + 80005d80: 781012ef jal x5,80007d00 + 80005d84: 80005d74 .word 0x80005d74 + 80005d88: 00000000 .word 0x00000000 + 80005d8c: 80017336 .word 0x80017336 + 80005d90: 00000000 .word 0x00000000 + 80005d94: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x4a19121d1d01bc83 + 80005d98: 00063d03 ld x26,0(x12) + 80005d9c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0xeb2f36b70c1632a8 + 80005da0: 00063403 ld x8,0(x12) + 80005da4: 00860613 addi x12,x12,8 + +0000000080005da8 : +Zbkb_rol_cg_cmp_rd_rs2_b8: + rol x8, x26, x8 # perform operation + 80005da8: 608d1433 rol x8,x26,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zbkb_rol_cg_cmp_rd_rs2_b8, Zbkb_rol_cg_cmp_rd_rs2_b8_str) + 80005dac: 00083203 ld x4,0(x16) + 80005db0: 00820c63 beq x4,x8,80005dc8 + 80005db4: 74d012ef jal x5,80007d00 + 80005db8: 80005da8 .word 0x80005da8 + 80005dbc: 00000000 .word 0x00000000 + 80005dc0: 8001736c .word 0x8001736c + 80005dc4: 00000000 .word 0x00000000 + 80005dc8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x136d3d443dc4b03b + 80005dcc: 00063a83 ld x21,0(x12) + 80005dd0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x4194256ba05fd496 + 80005dd4: 00063483 ld x9,0(x12) + 80005dd8: 00860613 addi x12,x12,8 + +0000000080005ddc : +Zbkb_rol_cg_cmp_rd_rs2_b9: + rol x9, x21, x9 # perform operation + 80005ddc: 609a94b3 rol x9,x21,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zbkb_rol_cg_cmp_rd_rs2_b9, Zbkb_rol_cg_cmp_rd_rs2_b9_str) + 80005de0: 00083203 ld x4,0(x16) + 80005de4: 00920c63 beq x4,x9,80005dfc + 80005de8: 719012ef jal x5,80007d00 + 80005dec: 80005ddc .word 0x80005ddc + 80005df0: 00000000 .word 0x00000000 + 80005df4: 800173a2 .word 0x800173a2 + 80005df8: 00000000 .word 0x00000000 + 80005dfc: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xab0f7394b44268e4 + 80005e00: 00063483 ld x9,0(x12) + 80005e04: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x8df38b22a0353df2 + 80005e08: 00063503 ld x10,0(x12) + 80005e0c: 00860613 addi x12,x12,8 + +0000000080005e10 : +Zbkb_rol_cg_cmp_rd_rs2_b10: + rol x10, x9, x10 # perform operation + 80005e10: 60a49533 rol x10,x9,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zbkb_rol_cg_cmp_rd_rs2_b10, Zbkb_rol_cg_cmp_rd_rs2_b10_str) + 80005e14: 00083203 ld x4,0(x16) + 80005e18: 00a20c63 beq x4,x10,80005e30 + 80005e1c: 6e5012ef jal x5,80007d00 + 80005e20: 80005e10 .word 0x80005e10 + 80005e24: 00000000 .word 0x00000000 + 80005e28: 800173d8 .word 0x800173d8 + 80005e2c: 00000000 .word 0x00000000 + 80005e30: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xd43c7c6c5a7565f4 + 80005e34: 00063183 ld x3,0(x12) + 80005e38: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xbe6ac4e1054cb527 + 80005e3c: 00063583 ld x11,0(x12) + 80005e40: 00860613 addi x12,x12,8 + +0000000080005e44 : +Zbkb_rol_cg_cmp_rd_rs2_b11: + rol x11, x3, x11 # perform operation + 80005e44: 60b195b3 rol x11,x3,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zbkb_rol_cg_cmp_rd_rs2_b11, Zbkb_rol_cg_cmp_rd_rs2_b11_str) + 80005e48: 00083203 ld x4,0(x16) + 80005e4c: 00b20c63 beq x4,x11,80005e64 + 80005e50: 6b1012ef jal x5,80007d00 + 80005e54: 80005e44 .word 0x80005e44 + 80005e58: 00000000 .word 0x00000000 + 80005e5c: 8001740f .word 0x8001740f + 80005e60: 00000000 .word 0x00000000 + 80005e64: 00880813 addi x16,x16,8 + + mv x11, x12 # switch data pointer register to avoid conflict with test + 80005e68: 00060593 addi x11,x12,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x82b0f281a4284f87 + 80005e6c: 0005b483 ld x9,0(x11) + 80005e70: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x04c0b9c07b8d3f2b + 80005e74: 0005b603 ld x12,0(x11) + 80005e78: 00858593 addi x11,x11,8 + +0000000080005e7c : +Zbkb_rol_cg_cmp_rd_rs2_b12: + rol x12, x9, x12 # perform operation + 80005e7c: 60c49633 rol x12,x9,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zbkb_rol_cg_cmp_rd_rs2_b12, Zbkb_rol_cg_cmp_rd_rs2_b12_str) + 80005e80: 00083203 ld x4,0(x16) + 80005e84: 00c20c63 beq x4,x12,80005e9c + 80005e88: 679012ef jal x5,80007d00 + 80005e8c: 80005e7c .word 0x80005e7c + 80005e90: 00000000 .word 0x00000000 + 80005e94: 80017446 .word 0x80017446 + 80005e98: 00000000 .word 0x00000000 + 80005e9c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x25981b5f04077370 + 80005ea0: 0005b903 ld x18,0(x11) + 80005ea4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0x2bdd7bb3351a96d9 + 80005ea8: 0005b683 ld x13,0(x11) + 80005eac: 00858593 addi x11,x11,8 + +0000000080005eb0 : +Zbkb_rol_cg_cmp_rd_rs2_b13: + rol x13, x18, x13 # perform operation + 80005eb0: 60d916b3 rol x13,x18,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkb_rol_cg_cmp_rd_rs2_b13, Zbkb_rol_cg_cmp_rd_rs2_b13_str) + 80005eb4: 00083203 ld x4,0(x16) + 80005eb8: 00d20c63 beq x4,x13,80005ed0 + 80005ebc: 645012ef jal x5,80007d00 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 8001747d .word 0x8001747d + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x1c983b1dc0026c54 + 80005ed4: 0005ba83 ld x21,0(x11) + 80005ed8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0x65fe8022ed5bbf99 + 80005edc: 0005b703 ld x14,0(x11) + 80005ee0: 00858593 addi x11,x11,8 + +0000000080005ee4 : +Zbkb_rol_cg_cmp_rd_rs2_b14: + rol x14, x21, x14 # perform operation + 80005ee4: 60ea9733 rol x14,x21,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkb_rol_cg_cmp_rd_rs2_b14, Zbkb_rol_cg_cmp_rd_rs2_b14_str) + 80005ee8: 00083203 ld x4,0(x16) + 80005eec: 00e20c63 beq x4,x14,80005f04 + 80005ef0: 611012ef jal x5,80007d00 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 800174b4 .word 0x800174b4 + 80005f00: 00000000 .word 0x00000000 + 80005f04: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x8746f4bac7a189ff + 80005f08: 0005b183 ld x3,0(x11) + 80005f0c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x8e8fac73760779ab + 80005f10: 0005b783 ld x15,0(x11) + 80005f14: 00858593 addi x11,x11,8 + +0000000080005f18 : +Zbkb_rol_cg_cmp_rd_rs2_b15: + rol x15, x3, x15 # perform operation + 80005f18: 60f197b3 rol x15,x3,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkb_rol_cg_cmp_rd_rs2_b15, Zbkb_rol_cg_cmp_rd_rs2_b15_str) + 80005f1c: 00083203 ld x4,0(x16) + 80005f20: 00f20c63 beq x4,x15,80005f38 + 80005f24: 5dd012ef jal x5,80007d00 + 80005f28: 80005f18 .word 0x80005f18 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 800174eb .word 0x800174eb + 80005f34: 00000000 .word 0x00000000 + 80005f38: 00880813 addi x16,x16,8 + + mv x10, x16 # switch signature pointer register to avoid conflict with test + 80005f3c: 00080513 addi x10,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x1ef62db131bc6317 + 80005f40: 0005be83 ld x29,0(x11) + 80005f44: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x5f519bd6c34b963f + 80005f48: 0005b803 ld x16,0(x11) + 80005f4c: 00858593 addi x11,x11,8 + +0000000080005f50 : +Zbkb_rol_cg_cmp_rd_rs2_b16: + rol x16, x29, x16 # perform operation + 80005f50: 610e9833 rol x16,x29,x16 + # Check if x16 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x16, Zbkb_rol_cg_cmp_rd_rs2_b16, Zbkb_rol_cg_cmp_rd_rs2_b16_str) + 80005f54: 00053203 ld x4,0(x10) + 80005f58: 01020c63 beq x4,x16,80005f70 + 80005f5c: 5a5012ef jal x5,80007d00 + 80005f60: 80005f50 .word 0x80005f50 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 80017522 .word 0x80017522 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xbed15c75a9877593 + 80005f74: 0005bf83 ld x31,0(x11) + 80005f78: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x242e9e028db95e39 + 80005f7c: 0005b883 ld x17,0(x11) + 80005f80: 00858593 addi x11,x11,8 + +0000000080005f84 : +Zbkb_rol_cg_cmp_rd_rs2_b17: + rol x17, x31, x17 # perform operation + 80005f84: 611f98b3 rol x17,x31,x17 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zbkb_rol_cg_cmp_rd_rs2_b17, Zbkb_rol_cg_cmp_rd_rs2_b17_str) + 80005f88: 00053203 ld x4,0(x10) + 80005f8c: 01120c63 beq x4,x17,80005fa4 + 80005f90: 571012ef jal x5,80007d00 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 80017559 .word 0x80017559 + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xa6b1a2b5f3c110c5 + 80005fa8: 0005be83 ld x29,0(x11) + 80005fac: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs2: x18 = 0x6a737251913f0d9b + 80005fb0: 0005b903 ld x18,0(x11) + 80005fb4: 00858593 addi x11,x11,8 + +0000000080005fb8 : +Zbkb_rol_cg_cmp_rd_rs2_b18: + rol x18, x29, x18 # perform operation + 80005fb8: 612e9933 rol x18,x29,x18 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zbkb_rol_cg_cmp_rd_rs2_b18, Zbkb_rol_cg_cmp_rd_rs2_b18_str) + 80005fbc: 00053203 ld x4,0(x10) + 80005fc0: 01220c63 beq x4,x18,80005fd8 + 80005fc4: 53d012ef jal x5,80007d00 + 80005fc8: 80005fb8 .word 0x80005fb8 + 80005fcc: 00000000 .word 0x00000000 + 80005fd0: 80017590 .word 0x80017590 + 80005fd4: 00000000 .word 0x00000000 + 80005fd8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x254df0f9d0343fd5 + 80005fdc: 0005b183 ld x3,0(x11) + 80005fe0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0xa293ac24e8af02d7 + 80005fe4: 0005b983 ld x19,0(x11) + 80005fe8: 00858593 addi x11,x11,8 + +0000000080005fec : +Zbkb_rol_cg_cmp_rd_rs2_b19: + rol x19, x3, x19 # perform operation + 80005fec: 613199b3 rol x19,x3,x19 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zbkb_rol_cg_cmp_rd_rs2_b19, Zbkb_rol_cg_cmp_rd_rs2_b19_str) + 80005ff0: 00053203 ld x4,0(x10) + 80005ff4: 01320c63 beq x4,x19,8000600c + 80005ff8: 509012ef jal x5,80007d00 + 80005ffc: 80005fec .word 0x80005fec + 80006000: 00000000 .word 0x00000000 + 80006004: 800175c7 .word 0x800175c7 + 80006008: 00000000 .word 0x00000000 + 8000600c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x4480310f6cfa9820 + 80006010: 0005bc03 ld x24,0(x11) + 80006014: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x1879a7073dad40bf + 80006018: 0005ba03 ld x20,0(x11) + 8000601c: 00858593 addi x11,x11,8 + +0000000080006020 : +Zbkb_rol_cg_cmp_rd_rs2_b20: + rol x20, x24, x20 # perform operation + 80006020: 614c1a33 rol x20,x24,x20 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zbkb_rol_cg_cmp_rd_rs2_b20, Zbkb_rol_cg_cmp_rd_rs2_b20_str) + 80006024: 00053203 ld x4,0(x10) + 80006028: 01420c63 beq x4,x20,80006040 + 8000602c: 4d5012ef jal x5,80007d00 + 80006030: 80006020 .word 0x80006020 + 80006034: 00000000 .word 0x00000000 + 80006038: 800175fe .word 0x800175fe + 8000603c: 00000000 .word 0x00000000 + 80006040: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xd39c20c2b5b6b1b1 + 80006044: 0005bc03 ld x24,0(x11) + 80006048: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0xc2a46a8ef920ad0b + 8000604c: 0005ba83 ld x21,0(x11) + 80006050: 00858593 addi x11,x11,8 + +0000000080006054 : +Zbkb_rol_cg_cmp_rd_rs2_b21: + rol x21, x24, x21 # perform operation + 80006054: 615c1ab3 rol x21,x24,x21 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zbkb_rol_cg_cmp_rd_rs2_b21, Zbkb_rol_cg_cmp_rd_rs2_b21_str) + 80006058: 00053203 ld x4,0(x10) + 8000605c: 01520c63 beq x4,x21,80006074 + 80006060: 4a1012ef jal x5,80007d00 + 80006064: 80006054 .word 0x80006054 + 80006068: 00000000 .word 0x00000000 + 8000606c: 80017635 .word 0x80017635 + 80006070: 00000000 .word 0x00000000 + 80006074: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x98c3bba068551a38 + 80006078: 0005b803 ld x16,0(x11) + 8000607c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x2e6506a2d941a281 + 80006080: 0005bb03 ld x22,0(x11) + 80006084: 00858593 addi x11,x11,8 + +0000000080006088 : +Zbkb_rol_cg_cmp_rd_rs2_b22: + rol x22, x16, x22 # perform operation + 80006088: 61681b33 rol x22,x16,x22 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkb_rol_cg_cmp_rd_rs2_b22, Zbkb_rol_cg_cmp_rd_rs2_b22_str) + 8000608c: 00053203 ld x4,0(x10) + 80006090: 01620c63 beq x4,x22,800060a8 + 80006094: 46d012ef jal x5,80007d00 + 80006098: 80006088 .word 0x80006088 + 8000609c: 00000000 .word 0x00000000 + 800060a0: 8001766c .word 0x8001766c + 800060a4: 00000000 .word 0x00000000 + 800060a8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x4226f720c77c58ce + 800060ac: 0005b383 ld x7,0(x11) + 800060b0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x3c2b58f50555df0d + 800060b4: 0005bb83 ld x23,0(x11) + 800060b8: 00858593 addi x11,x11,8 + +00000000800060bc : +Zbkb_rol_cg_cmp_rd_rs2_b23: + rol x23, x7, x23 # perform operation + 800060bc: 61739bb3 rol x23,x7,x23 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zbkb_rol_cg_cmp_rd_rs2_b23, Zbkb_rol_cg_cmp_rd_rs2_b23_str) + 800060c0: 00053203 ld x4,0(x10) + 800060c4: 01720c63 beq x4,x23,800060dc + 800060c8: 439012ef jal x5,80007d00 + 800060cc: 800060bc .word 0x800060bc + 800060d0: 00000000 .word 0x00000000 + 800060d4: 800176a3 .word 0x800176a3 + 800060d8: 00000000 .word 0x00000000 + 800060dc: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0xfee9d18c320ae626 + 800060e0: 0005bb83 ld x23,0(x11) + 800060e4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0x7eb1ec278d80d44a + 800060e8: 0005bc03 ld x24,0(x11) + 800060ec: 00858593 addi x11,x11,8 + +00000000800060f0 : +Zbkb_rol_cg_cmp_rd_rs2_b24: + rol x24, x23, x24 # perform operation + 800060f0: 618b9c33 rol x24,x23,x24 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zbkb_rol_cg_cmp_rd_rs2_b24, Zbkb_rol_cg_cmp_rd_rs2_b24_str) + 800060f4: 00053203 ld x4,0(x10) + 800060f8: 01820c63 beq x4,x24,80006110 + 800060fc: 405012ef jal x5,80007d00 + 80006100: 800060f0 .word 0x800060f0 + 80006104: 00000000 .word 0x00000000 + 80006108: 800176da .word 0x800176da + 8000610c: 00000000 .word 0x00000000 + 80006110: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xef1b6acea26255f6 + 80006114: 0005b783 ld x15,0(x11) + 80006118: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xdde13682beb6c9d0 + 8000611c: 0005bc83 ld x25,0(x11) + 80006120: 00858593 addi x11,x11,8 + +0000000080006124 : +Zbkb_rol_cg_cmp_rd_rs2_b25: + rol x25, x15, x25 # perform operation + 80006124: 61979cb3 rol x25,x15,x25 + # Check if x25 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x25, Zbkb_rol_cg_cmp_rd_rs2_b25, Zbkb_rol_cg_cmp_rd_rs2_b25_str) + 80006128: 00053203 ld x4,0(x10) + 8000612c: 01920c63 beq x4,x25,80006144 + 80006130: 3d1012ef jal x5,80007d00 + 80006134: 80006124 .word 0x80006124 + 80006138: 00000000 .word 0x00000000 + 8000613c: 80017711 .word 0x80017711 + 80006140: 00000000 .word 0x00000000 + 80006144: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x25bce1e5c04fd551 + 80006148: 0005b883 ld x17,0(x11) + 8000614c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xaf61306c8e3fac57 + 80006150: 0005bd03 ld x26,0(x11) + 80006154: 00858593 addi x11,x11,8 + +0000000080006158 : +Zbkb_rol_cg_cmp_rd_rs2_b26: + rol x26, x17, x26 # perform operation + 80006158: 61a89d33 rol x26,x17,x26 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkb_rol_cg_cmp_rd_rs2_b26, Zbkb_rol_cg_cmp_rd_rs2_b26_str) + 8000615c: 00053203 ld x4,0(x10) + 80006160: 01a20c63 beq x4,x26,80006178 + 80006164: 39d012ef jal x5,80007d00 + 80006168: 80006158 .word 0x80006158 + 8000616c: 00000000 .word 0x00000000 + 80006170: 80017748 .word 0x80017748 + 80006174: 00000000 .word 0x00000000 + 80006178: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x2e7ba052190299f4 + 8000617c: 0005b603 ld x12,0(x11) + 80006180: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x5879b3a95629f467 + 80006184: 0005bd83 ld x27,0(x11) + 80006188: 00858593 addi x11,x11,8 + +000000008000618c : +Zbkb_rol_cg_cmp_rd_rs2_b27: + rol x27, x12, x27 # perform operation + 8000618c: 61b61db3 rol x27,x12,x27 + # Check if x27 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x27, Zbkb_rol_cg_cmp_rd_rs2_b27, Zbkb_rol_cg_cmp_rd_rs2_b27_str) + 80006190: 00053203 ld x4,0(x10) + 80006194: 01b20c63 beq x4,x27,800061ac + 80006198: 369012ef jal x5,80007d00 + 8000619c: 8000618c .word 0x8000618c + 800061a0: 00000000 .word 0x00000000 + 800061a4: 8001777f .word 0x8001777f + 800061a8: 00000000 .word 0x00000000 + 800061ac: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0xa1fcfaea27ad7f11 + 800061b0: 0005bd03 ld x26,0(x11) + 800061b4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x413c00f5c92a3657 + 800061b8: 0005be03 ld x28,0(x11) + 800061bc: 00858593 addi x11,x11,8 + +00000000800061c0 : +Zbkb_rol_cg_cmp_rd_rs2_b28: + rol x28, x26, x28 # perform operation + 800061c0: 61cd1e33 rol x28,x26,x28 + # Check if x28 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x28, Zbkb_rol_cg_cmp_rd_rs2_b28, Zbkb_rol_cg_cmp_rd_rs2_b28_str) + 800061c4: 00053203 ld x4,0(x10) + 800061c8: 01c20c63 beq x4,x28,800061e0 + 800061cc: 335012ef jal x5,80007d00 + 800061d0: 800061c0 .word 0x800061c0 + 800061d4: 00000000 .word 0x00000000 + 800061d8: 800177b6 .word 0x800177b6 + 800061dc: 00000000 .word 0x00000000 + 800061e0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x92bcfc518919571b + 800061e4: 0005b303 ld x6,0(x11) + 800061e8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x50de147c73b31768 + 800061ec: 0005be83 ld x29,0(x11) + 800061f0: 00858593 addi x11,x11,8 + +00000000800061f4 : +Zbkb_rol_cg_cmp_rd_rs2_b29: + rol x29, x6, x29 # perform operation + 800061f4: 61d31eb3 rol x29,x6,x29 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zbkb_rol_cg_cmp_rd_rs2_b29, Zbkb_rol_cg_cmp_rd_rs2_b29_str) + 800061f8: 00053203 ld x4,0(x10) + 800061fc: 01d20c63 beq x4,x29,80006214 + 80006200: 301012ef jal x5,80007d00 + 80006204: 800061f4 .word 0x800061f4 + 80006208: 00000000 .word 0x00000000 + 8000620c: 800177ed .word 0x800177ed + 80006210: 00000000 .word 0x00000000 + 80006214: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x20a98a05c06ada27 + 80006218: 0005b683 ld x13,0(x11) + 8000621c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xd1741a98c4a23b98 + 80006220: 0005bf03 ld x30,0(x11) + 80006224: 00858593 addi x11,x11,8 + +0000000080006228 : +Zbkb_rol_cg_cmp_rd_rs2_b30: + rol x30, x13, x30 # perform operation + 80006228: 61e69f33 rol x30,x13,x30 + # Check if x30 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x30, Zbkb_rol_cg_cmp_rd_rs2_b30, Zbkb_rol_cg_cmp_rd_rs2_b30_str) + 8000622c: 00053203 ld x4,0(x10) + 80006230: 01e20c63 beq x4,x30,80006248 + 80006234: 2cd012ef jal x5,80007d00 + 80006238: 80006228 .word 0x80006228 + 8000623c: 00000000 .word 0x00000000 + 80006240: 80017824 .word 0x80017824 + 80006244: 00000000 .word 0x00000000 + 80006248: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xc5e57b54ad180c9a + 8000624c: 0005be03 ld x28,0(x11) + 80006250: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x93ad9c7154dbcf36 + 80006254: 0005bf83 ld x31,0(x11) + 80006258: 00858593 addi x11,x11,8 + +000000008000625c : +Zbkb_rol_cg_cmp_rd_rs2_b31: + rol x31, x28, x31 # perform operation + 8000625c: 61fe1fb3 rol x31,x28,x31 + # Check if x31 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x31, Zbkb_rol_cg_cmp_rd_rs2_b31, Zbkb_rol_cg_cmp_rd_rs2_b31_str) + 80006260: 00053203 ld x4,0(x10) + 80006264: 01f20c63 beq x4,x31,8000627c + 80006268: 299012ef jal x5,80007d00 + 8000626c: 8000625c .word 0x8000625c + 80006270: 00000000 .word 0x00000000 + 80006274: 8001785b .word 0x8001785b + 80006278: 00000000 .word 0x00000000 + 8000627c: 00850513 addi x10,x10,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0x5020770394c849d7 + 80006280: 0005b003 ld x0,0(x11) + 80006284: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0xbe1ef95719fbde45 + 80006288: 0005b003 ld x0,0(x11) + 8000628c: 00858593 addi x11,x11,8 + +0000000080006290 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b0: + rol x0, x0, x0 # perform operation + 80006290: 60001033 rol x0,x0,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zbkb_rol_cg_cmp_rd_rs1_rs2_b0, Zbkb_rol_cg_cmp_rd_rs1_rs2_b0_str) + 80006294: 00053203 ld x4,0(x10) + 80006298: 00020c63 beq x4,x0,800062b0 + 8000629c: 265012ef jal x5,80007d00 + 800062a0: 80006290 .word 0x80006290 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 80017892 .word 0x80017892 + 800062ac: 00000000 .word 0x00000000 + 800062b0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x745e2efbf60f315d + 800062b4: 0005b083 ld x1,0(x11) + 800062b8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x1baa2b0eaf06a2b5 + 800062bc: 0005b083 ld x1,0(x11) + 800062c0: 00858593 addi x11,x11,8 + +00000000800062c4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b1: + rol x1, x1, x1 # perform operation + 800062c4: 601090b3 rol x1,x1,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkb_rol_cg_cmp_rd_rs1_rs2_b1, Zbkb_rol_cg_cmp_rd_rs1_rs2_b1_str) + 800062c8: 00053203 ld x4,0(x10) + 800062cc: 00120c63 beq x4,x1,800062e4 + 800062d0: 231012ef jal x5,80007d00 + 800062d4: 800062c4 .word 0x800062c4 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 800178cc .word 0x800178cc + 800062e0: 00000000 .word 0x00000000 + 800062e4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0x59733bb7fe9f5d00 + 800062e8: 0005b103 ld x2,0(x11) + 800062ec: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x78f5204785d1c393 + 800062f0: 0005b103 ld x2,0(x11) + 800062f4: 00858593 addi x11,x11,8 + +00000000800062f8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b2: + rol x2, x2, x2 # perform operation + 800062f8: 60211133 rol x2,x2,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zbkb_rol_cg_cmp_rd_rs1_rs2_b2, Zbkb_rol_cg_cmp_rd_rs1_rs2_b2_str) + 800062fc: 00053203 ld x4,0(x10) + 80006300: 00220c63 beq x4,x2,80006318 + 80006304: 1fd012ef jal x5,80007d00 + 80006308: 800062f8 .word 0x800062f8 + 8000630c: 00000000 .word 0x00000000 + 80006310: 80017906 .word 0x80017906 + 80006314: 00000000 .word 0x00000000 + 80006318: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x41cb523cc0dff278 + 8000631c: 0005b183 ld x3,0(x11) + 80006320: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x23567e3191029128 + 80006324: 0005b183 ld x3,0(x11) + 80006328: 00858593 addi x11,x11,8 + +000000008000632c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b3: + rol x3, x3, x3 # perform operation + 8000632c: 603191b3 rol x3,x3,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zbkb_rol_cg_cmp_rd_rs1_rs2_b3, Zbkb_rol_cg_cmp_rd_rs1_rs2_b3_str) + 80006330: 00053203 ld x4,0(x10) + 80006334: 00320c63 beq x4,x3,8000634c + 80006338: 1c9012ef jal x5,80007d00 + 8000633c: 8000632c .word 0x8000632c + 80006340: 00000000 .word 0x00000000 + 80006344: 80017940 .word 0x80017940 + 80006348: 00000000 .word 0x00000000 + 8000634c: 00850513 addi x10,x10,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006350: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80006354: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x2c2dc09592bdcab0 + 80006358: 0005b203 ld x4,0(x11) + 8000635c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x17c442888d62cb81 + 80006360: 0005b203 ld x4,0(x11) + 80006364: 00858593 addi x11,x11,8 + +0000000080006368 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b4: + rol x4, x4, x4 # perform operation + 80006368: 60421233 rol x4,x4,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zbkb_rol_cg_cmp_rd_rs1_rs2_b4, Zbkb_rol_cg_cmp_rd_rs1_rs2_b4_str) + 8000636c: 00053683 ld x13,0(x10) + 80006370: 00468c63 beq x13,x4,80006388 + 80006374: 1cd0176f jal x14,80007d40 + 80006378: 80006368 .word 0x80006368 + 8000637c: 00000000 .word 0x00000000 + 80006380: 8001797a .word 0x8001797a + 80006384: 00000000 .word 0x00000000 + 80006388: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x9675d2d5660d6d38 + 8000638c: 0005b283 ld x5,0(x11) + 80006390: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x5486718267e2e7b1 + 80006394: 0005b283 ld x5,0(x11) + 80006398: 00858593 addi x11,x11,8 + +000000008000639c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b5: + rol x5, x5, x5 # perform operation + 8000639c: 605292b3 rol x5,x5,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zbkb_rol_cg_cmp_rd_rs1_rs2_b5, Zbkb_rol_cg_cmp_rd_rs1_rs2_b5_str) + 800063a0: 00053683 ld x13,0(x10) + 800063a4: 00568c63 beq x13,x5,800063bc + 800063a8: 1990176f jal x14,80007d40 + 800063ac: 8000639c .word 0x8000639c + 800063b0: 00000000 .word 0x00000000 + 800063b4: 800179b4 .word 0x800179b4 + 800063b8: 00000000 .word 0x00000000 + 800063bc: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xd3ba003122025910 + 800063c0: 0005b303 ld x6,0(x11) + 800063c4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x485a4ca71f07b194 + 800063c8: 0005b303 ld x6,0(x11) + 800063cc: 00858593 addi x11,x11,8 + +00000000800063d0 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b6: + rol x6, x6, x6 # perform operation + 800063d0: 60631333 rol x6,x6,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x6, Zbkb_rol_cg_cmp_rd_rs1_rs2_b6, Zbkb_rol_cg_cmp_rd_rs1_rs2_b6_str) + 800063d4: 00053683 ld x13,0(x10) + 800063d8: 00668c63 beq x13,x6,800063f0 + 800063dc: 1650176f jal x14,80007d40 + 800063e0: 800063d0 .word 0x800063d0 + 800063e4: 00000000 .word 0x00000000 + 800063e8: 800179ee .word 0x800179ee + 800063ec: 00000000 .word 0x00000000 + 800063f0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x62851c7e749515b9 + 800063f4: 0005b383 ld x7,0(x11) + 800063f8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0xf4c500df05262b22 + 800063fc: 0005b383 ld x7,0(x11) + 80006400: 00858593 addi x11,x11,8 + +0000000080006404 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b7: + rol x7, x7, x7 # perform operation + 80006404: 607393b3 rol x7,x7,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkb_rol_cg_cmp_rd_rs1_rs2_b7, Zbkb_rol_cg_cmp_rd_rs1_rs2_b7_str) + 80006408: 00053683 ld x13,0(x10) + 8000640c: 00768c63 beq x13,x7,80006424 + 80006410: 1310176f jal x14,80007d40 + 80006414: 80006404 .word 0x80006404 + 80006418: 00000000 .word 0x00000000 + 8000641c: 80017a28 .word 0x80017a28 + 80006420: 00000000 .word 0x00000000 + 80006424: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x10a2c1f38adebb95 + 80006428: 0005b403 ld x8,0(x11) + 8000642c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xc03f455e549c9d49 + 80006430: 0005b403 ld x8,0(x11) + 80006434: 00858593 addi x11,x11,8 + +0000000080006438 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b8: + rol x8, x8, x8 # perform operation + 80006438: 60841433 rol x8,x8,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_rol_cg_cmp_rd_rs1_rs2_b8, Zbkb_rol_cg_cmp_rd_rs1_rs2_b8_str) + 8000643c: 00053683 ld x13,0(x10) + 80006440: 00868c63 beq x13,x8,80006458 + 80006444: 0fd0176f jal x14,80007d40 + 80006448: 80006438 .word 0x80006438 + 8000644c: 00000000 .word 0x00000000 + 80006450: 80017a62 .word 0x80017a62 + 80006454: 00000000 .word 0x00000000 + 80006458: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0xf4c2544482d5c28e + 8000645c: 0005b483 ld x9,0(x11) + 80006460: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x8ec59f9b1c22221d + 80006464: 0005b483 ld x9,0(x11) + 80006468: 00858593 addi x11,x11,8 + +000000008000646c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b9: + rol x9, x9, x9 # perform operation + 8000646c: 609494b3 rol x9,x9,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkb_rol_cg_cmp_rd_rs1_rs2_b9, Zbkb_rol_cg_cmp_rd_rs1_rs2_b9_str) + 80006470: 00053683 ld x13,0(x10) + 80006474: 00968c63 beq x13,x9,8000648c + 80006478: 0c90176f jal x14,80007d40 + 8000647c: 8000646c .word 0x8000646c + 80006480: 00000000 .word 0x00000000 + 80006484: 80017a9c .word 0x80017a9c + 80006488: 00000000 .word 0x00000000 + 8000648c: 00850513 addi x10,x10,8 + + mv x18, x10 # switch signature pointer register to avoid conflict with test + 80006490: 00050913 addi x18,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x3f3cc0f5f529c6fa + 80006494: 0005b503 ld x10,0(x11) + 80006498: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x427d374f59dbbf95 + 8000649c: 0005b503 ld x10,0(x11) + 800064a0: 00858593 addi x11,x11,8 + +00000000800064a4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b10: + rol x10, x10, x10 # perform operation + 800064a4: 60a51533 rol x10,x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_rol_cg_cmp_rd_rs1_rs2_b10, Zbkb_rol_cg_cmp_rd_rs1_rs2_b10_str) + 800064a8: 00093683 ld x13,0(x18) + 800064ac: 00a68c63 beq x13,x10,800064c4 + 800064b0: 0910176f jal x14,80007d40 + 800064b4: 800064a4 .word 0x800064a4 + 800064b8: 00000000 .word 0x00000000 + 800064bc: 80017ad6 .word 0x80017ad6 + 800064c0: 00000000 .word 0x00000000 + 800064c4: 00890913 addi x18,x18,8 + + mv x27, x11 # switch data pointer register to avoid conflict with test + 800064c8: 00058d93 addi x27,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x689b32f4b90fb8a8 + 800064cc: 000db583 ld x11,0(x27) + 800064d0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0xcf62b457016f9cbd + 800064d4: 000db583 ld x11,0(x27) + 800064d8: 008d8d93 addi x27,x27,8 + +00000000800064dc : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b11: + rol x11, x11, x11 # perform operation + 800064dc: 60b595b3 rol x11,x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_rol_cg_cmp_rd_rs1_rs2_b11, Zbkb_rol_cg_cmp_rd_rs1_rs2_b11_str) + 800064e0: 00093683 ld x13,0(x18) + 800064e4: 00b68c63 beq x13,x11,800064fc + 800064e8: 0590176f jal x14,80007d40 + 800064ec: 800064dc .word 0x800064dc + 800064f0: 00000000 .word 0x00000000 + 800064f4: 80017b11 .word 0x80017b11 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xc678e0e2bbd91f00 + 80006500: 000db603 ld x12,0(x27) + 80006504: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0xce0fdd9c4366f78d + 80006508: 000db603 ld x12,0(x27) + 8000650c: 008d8d93 addi x27,x27,8 + +0000000080006510 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b12: + rol x12, x12, x12 # perform operation + 80006510: 60c61633 rol x12,x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_rol_cg_cmp_rd_rs1_rs2_b12, Zbkb_rol_cg_cmp_rd_rs1_rs2_b12_str) + 80006514: 00093683 ld x13,0(x18) + 80006518: 00c68c63 beq x13,x12,80006530 + 8000651c: 0250176f jal x14,80007d40 + 80006520: 80006510 .word 0x80006510 + 80006524: 00000000 .word 0x00000000 + 80006528: 80017b4c .word 0x80017b4c + 8000652c: 00000000 .word 0x00000000 + 80006530: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006534: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006538: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x365e948b1453de37 + 8000653c: 000db683 ld x13,0(x27) + 80006540: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xcad9219a9f33c64d + 80006544: 000db683 ld x13,0(x27) + 80006548: 008d8d93 addi x27,x27,8 + +000000008000654c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b13: + rol x13, x13, x13 # perform operation + 8000654c: 60d696b3 rol x13,x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zbkb_rol_cg_cmp_rd_rs1_rs2_b13, Zbkb_rol_cg_cmp_rd_rs1_rs2_b13_str) + 80006550: 00093383 ld x7,0(x18) + 80006554: 00d38c63 beq x7,x13,8000656c + 80006558: 7c00146f jal x8,80007d18 + 8000655c: 8000654c .word 0x8000654c + 80006560: 00000000 .word 0x00000000 + 80006564: 80017b87 .word 0x80017b87 + 80006568: 00000000 .word 0x00000000 + 8000656c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x7105a43fc0453bc0 + 80006570: 000db703 ld x14,0(x27) + 80006574: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x3f027a3008f4a7d6 + 80006578: 000db703 ld x14,0(x27) + 8000657c: 008d8d93 addi x27,x27,8 + +0000000080006580 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b14: + rol x14, x14, x14 # perform operation + 80006580: 60e71733 rol x14,x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zbkb_rol_cg_cmp_rd_rs1_rs2_b14, Zbkb_rol_cg_cmp_rd_rs1_rs2_b14_str) + 80006584: 00093383 ld x7,0(x18) + 80006588: 00e38c63 beq x7,x14,800065a0 + 8000658c: 78c0146f jal x8,80007d18 + 80006590: 80006580 .word 0x80006580 + 80006594: 00000000 .word 0x00000000 + 80006598: 80017bc2 .word 0x80017bc2 + 8000659c: 00000000 .word 0x00000000 + 800065a0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x1bd2af3c0a8165c0 + 800065a4: 000db783 ld x15,0(x27) + 800065a8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x89f35ee8e7812c52 + 800065ac: 000db783 ld x15,0(x27) + 800065b0: 008d8d93 addi x27,x27,8 + +00000000800065b4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b15: + rol x15, x15, x15 # perform operation + 800065b4: 60f797b3 rol x15,x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zbkb_rol_cg_cmp_rd_rs1_rs2_b15, Zbkb_rol_cg_cmp_rd_rs1_rs2_b15_str) + 800065b8: 00093383 ld x7,0(x18) + 800065bc: 00f38c63 beq x7,x15,800065d4 + 800065c0: 7580146f jal x8,80007d18 + 800065c4: 800065b4 .word 0x800065b4 + 800065c8: 00000000 .word 0x00000000 + 800065cc: 80017bfd .word 0x80017bfd + 800065d0: 00000000 .word 0x00000000 + 800065d4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x26fce777abaafd5d + 800065d8: 000db803 ld x16,0(x27) + 800065dc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0xc034dce31f63560e + 800065e0: 000db803 ld x16,0(x27) + 800065e4: 008d8d93 addi x27,x27,8 + +00000000800065e8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b16: + rol x16, x16, x16 # perform operation + 800065e8: 61081833 rol x16,x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_rol_cg_cmp_rd_rs1_rs2_b16, Zbkb_rol_cg_cmp_rd_rs1_rs2_b16_str) + 800065ec: 00093383 ld x7,0(x18) + 800065f0: 01038c63 beq x7,x16,80006608 + 800065f4: 7240146f jal x8,80007d18 + 800065f8: 800065e8 .word 0x800065e8 + 800065fc: 00000000 .word 0x00000000 + 80006600: 80017c38 .word 0x80017c38 + 80006604: 00000000 .word 0x00000000 + 80006608: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x4bcb323e6989a271 + 8000660c: 000db883 ld x17,0(x27) + 80006610: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x46f7b1983260316e + 80006614: 000db883 ld x17,0(x27) + 80006618: 008d8d93 addi x27,x27,8 + +000000008000661c : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b17: + rol x17, x17, x17 # perform operation + 8000661c: 611898b3 rol x17,x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zbkb_rol_cg_cmp_rd_rs1_rs2_b17, Zbkb_rol_cg_cmp_rd_rs1_rs2_b17_str) + 80006620: 00093383 ld x7,0(x18) + 80006624: 01138c63 beq x7,x17,8000663c + 80006628: 6f00146f jal x8,80007d18 + 8000662c: 8000661c .word 0x8000661c + 80006630: 00000000 .word 0x00000000 + 80006634: 80017c73 .word 0x80017c73 + 80006638: 00000000 .word 0x00000000 + 8000663c: 00890913 addi x18,x18,8 + + mv x24, x18 # switch signature pointer register to avoid conflict with test + 80006640: 00090c13 addi x24,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x789ad99d17c2cf9e + 80006644: 000db903 ld x18,0(x27) + 80006648: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x42206f4b90148ba4 + 8000664c: 000db903 ld x18,0(x27) + 80006650: 008d8d93 addi x27,x27,8 + +0000000080006654 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b18: + rol x18, x18, x18 # perform operation + 80006654: 61291933 rol x18,x18,x18 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zbkb_rol_cg_cmp_rd_rs1_rs2_b18, Zbkb_rol_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 000c3383 ld x7,0(x24) + 8000665c: 01238c63 beq x7,x18,80006674 + 80006660: 6b80146f jal x8,80007d18 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 80017cae .word 0x80017cae + 80006670: 00000000 .word 0x00000000 + 80006674: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0xd5c98cc7333c6dbf + 80006678: 000db983 ld x19,0(x27) + 8000667c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0xb263d7826fbcc63c + 80006680: 000db983 ld x19,0(x27) + 80006684: 008d8d93 addi x27,x27,8 + +0000000080006688 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b19: + rol x19, x19, x19 # perform operation + 80006688: 613999b3 rol x19,x19,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zbkb_rol_cg_cmp_rd_rs1_rs2_b19, Zbkb_rol_cg_cmp_rd_rs1_rs2_b19_str) + 8000668c: 000c3383 ld x7,0(x24) + 80006690: 01338c63 beq x7,x19,800066a8 + 80006694: 6840146f jal x8,80007d18 + 80006698: 80006688 .word 0x80006688 + 8000669c: 00000000 .word 0x00000000 + 800066a0: 80017ce9 .word 0x80017ce9 + 800066a4: 00000000 .word 0x00000000 + 800066a8: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x3e5f8eef6584af92 + 800066ac: 000dba03 ld x20,0(x27) + 800066b0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x82dbe486be29562b + 800066b4: 000dba03 ld x20,0(x27) + 800066b8: 008d8d93 addi x27,x27,8 + +00000000800066bc : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b20: + rol x20, x20, x20 # perform operation + 800066bc: 614a1a33 rol x20,x20,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zbkb_rol_cg_cmp_rd_rs1_rs2_b20, Zbkb_rol_cg_cmp_rd_rs1_rs2_b20_str) + 800066c0: 000c3383 ld x7,0(x24) + 800066c4: 01438c63 beq x7,x20,800066dc + 800066c8: 6500146f jal x8,80007d18 + 800066cc: 800066bc .word 0x800066bc + 800066d0: 00000000 .word 0x00000000 + 800066d4: 80017d24 .word 0x80017d24 + 800066d8: 00000000 .word 0x00000000 + 800066dc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xe007cd4522c5ed23 + 800066e0: 000dba83 ld x21,0(x27) + 800066e4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x6ac7e115667ebf96 + 800066e8: 000dba83 ld x21,0(x27) + 800066ec: 008d8d93 addi x27,x27,8 + +00000000800066f0 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b21: + rol x21, x21, x21 # perform operation + 800066f0: 615a9ab3 rol x21,x21,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x21, Zbkb_rol_cg_cmp_rd_rs1_rs2_b21, Zbkb_rol_cg_cmp_rd_rs1_rs2_b21_str) + 800066f4: 000c3383 ld x7,0(x24) + 800066f8: 01538c63 beq x7,x21,80006710 + 800066fc: 61c0146f jal x8,80007d18 + 80006700: 800066f0 .word 0x800066f0 + 80006704: 00000000 .word 0x00000000 + 80006708: 80017d5f .word 0x80017d5f + 8000670c: 00000000 .word 0x00000000 + 80006710: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x6fcd2e22f6e5115d + 80006714: 000dbb03 ld x22,0(x27) + 80006718: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x38d4db79121c8d8c + 8000671c: 000dbb03 ld x22,0(x27) + 80006720: 008d8d93 addi x27,x27,8 + +0000000080006724 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b22: + rol x22, x22, x22 # perform operation + 80006724: 616b1b33 rol x22,x22,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zbkb_rol_cg_cmp_rd_rs1_rs2_b22, Zbkb_rol_cg_cmp_rd_rs1_rs2_b22_str) + 80006728: 000c3383 ld x7,0(x24) + 8000672c: 01638c63 beq x7,x22,80006744 + 80006730: 5e80146f jal x8,80007d18 + 80006734: 80006724 .word 0x80006724 + 80006738: 00000000 .word 0x00000000 + 8000673c: 80017d9a .word 0x80017d9a + 80006740: 00000000 .word 0x00000000 + 80006744: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x75147c9671a6023d + 80006748: 000dbb83 ld x23,0(x27) + 8000674c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x023849eaee248669 + 80006750: 000dbb83 ld x23,0(x27) + 80006754: 008d8d93 addi x27,x27,8 + +0000000080006758 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b23: + rol x23, x23, x23 # perform operation + 80006758: 617b9bb3 rol x23,x23,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zbkb_rol_cg_cmp_rd_rs1_rs2_b23, Zbkb_rol_cg_cmp_rd_rs1_rs2_b23_str) + 8000675c: 000c3383 ld x7,0(x24) + 80006760: 01738c63 beq x7,x23,80006778 + 80006764: 5b40146f jal x8,80007d18 + 80006768: 80006758 .word 0x80006758 + 8000676c: 00000000 .word 0x00000000 + 80006770: 80017dd5 .word 0x80017dd5 + 80006774: 00000000 .word 0x00000000 + 80006778: 008c0c13 addi x24,x24,8 + + mv x3, x24 # switch signature pointer register to avoid conflict with test + 8000677c: 000c0193 addi x3,x24,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x0836f64bb91f9f23 + 80006780: 000dbc03 ld x24,0(x27) + 80006784: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x72438c42aa86b29a + 80006788: 000dbc03 ld x24,0(x27) + 8000678c: 008d8d93 addi x27,x27,8 + +0000000080006790 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b24: + rol x24, x24, x24 # perform operation + 80006790: 618c1c33 rol x24,x24,x24 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zbkb_rol_cg_cmp_rd_rs1_rs2_b24, Zbkb_rol_cg_cmp_rd_rs1_rs2_b24_str) + 80006794: 0001b383 ld x7,0(x3) + 80006798: 01838c63 beq x7,x24,800067b0 + 8000679c: 57c0146f jal x8,80007d18 + 800067a0: 80006790 .word 0x80006790 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 80017e10 .word 0x80017e10 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xb3983d214c8148f7 + 800067b4: 000dbc83 ld x25,0(x27) + 800067b8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0xaa52aeb803fca36d + 800067bc: 000dbc83 ld x25,0(x27) + 800067c0: 008d8d93 addi x27,x27,8 + +00000000800067c4 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b25: + rol x25, x25, x25 # perform operation + 800067c4: 619c9cb3 rol x25,x25,x25 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zbkb_rol_cg_cmp_rd_rs1_rs2_b25, Zbkb_rol_cg_cmp_rd_rs1_rs2_b25_str) + 800067c8: 0001b383 ld x7,0(x3) + 800067cc: 01938c63 beq x7,x25,800067e4 + 800067d0: 5480146f jal x8,80007d18 + 800067d4: 800067c4 .word 0x800067c4 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 80017e4b .word 0x80017e4b + 800067e0: 00000000 .word 0x00000000 + 800067e4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xc53c92d6cde11240 + 800067e8: 000dbd03 ld x26,0(x27) + 800067ec: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x500a888c1d00db7a + 800067f0: 000dbd03 ld x26,0(x27) + 800067f4: 008d8d93 addi x27,x27,8 + +00000000800067f8 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b26: + rol x26, x26, x26 # perform operation + 800067f8: 61ad1d33 rol x26,x26,x26 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zbkb_rol_cg_cmp_rd_rs1_rs2_b26, Zbkb_rol_cg_cmp_rd_rs1_rs2_b26_str) + 800067fc: 0001b383 ld x7,0(x3) + 80006800: 01a38c63 beq x7,x26,80006818 + 80006804: 5140146f jal x8,80007d18 + 80006808: 800067f8 .word 0x800067f8 + 8000680c: 00000000 .word 0x00000000 + 80006810: 80017e86 .word 0x80017e86 + 80006814: 00000000 .word 0x00000000 + 80006818: 00818193 addi x3,x3,8 + + mv x21, x27 # switch data pointer register to avoid conflict with test + 8000681c: 000d8a93 addi x21,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xfb0ee1a73b25a2ed + 80006820: 000abd83 ld x27,0(x21) + 80006824: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xcef249dd881e1a38 + 80006828: 000abd83 ld x27,0(x21) + 8000682c: 008a8a93 addi x21,x21,8 + +0000000080006830 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b27: + rol x27, x27, x27 # perform operation + 80006830: 61bd9db3 rol x27,x27,x27 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zbkb_rol_cg_cmp_rd_rs1_rs2_b27, Zbkb_rol_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 0001b383 ld x7,0(x3) + 80006838: 01b38c63 beq x7,x27,80006850 + 8000683c: 4dc0146f jal x8,80007d18 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 80017ec1 .word 0x80017ec1 + 8000684c: 00000000 .word 0x00000000 + 80006850: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x965af0b9d260d244 + 80006854: 000abe03 ld x28,0(x21) + 80006858: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0xb0a15a938323a01b + 8000685c: 000abe03 ld x28,0(x21) + 80006860: 008a8a93 addi x21,x21,8 + +0000000080006864 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b28: + rol x28, x28, x28 # perform operation + 80006864: 61ce1e33 rol x28,x28,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zbkb_rol_cg_cmp_rd_rs1_rs2_b28, Zbkb_rol_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 0001b383 ld x7,0(x3) + 8000686c: 01c38c63 beq x7,x28,80006884 + 80006870: 4a80146f jal x8,80007d18 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 80017efc .word 0x80017efc + 80006880: 00000000 .word 0x00000000 + 80006884: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x7e4a55fd24db6bbb + 80006888: 000abe83 ld x29,0(x21) + 8000688c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x7536da97c8118ed3 + 80006890: 000abe83 ld x29,0(x21) + 80006894: 008a8a93 addi x21,x21,8 + +0000000080006898 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b29: + rol x29, x29, x29 # perform operation + 80006898: 61de9eb3 rol x29,x29,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zbkb_rol_cg_cmp_rd_rs1_rs2_b29, Zbkb_rol_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 0001b383 ld x7,0(x3) + 800068a0: 01d38c63 beq x7,x29,800068b8 + 800068a4: 4740146f jal x8,80007d18 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 80017f37 .word 0x80017f37 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xb0d9d02e67060ff0 + 800068bc: 000abf03 ld x30,0(x21) + 800068c0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xac41c2ad82a940f1 + 800068c4: 000abf03 ld x30,0(x21) + 800068c8: 008a8a93 addi x21,x21,8 + +00000000800068cc : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b30: + rol x30, x30, x30 # perform operation + 800068cc: 61ef1f33 rol x30,x30,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zbkb_rol_cg_cmp_rd_rs1_rs2_b30, Zbkb_rol_cg_cmp_rd_rs1_rs2_b30_str) + 800068d0: 0001b383 ld x7,0(x3) + 800068d4: 01e38c63 beq x7,x30,800068ec + 800068d8: 4400146f jal x8,80007d18 + 800068dc: 800068cc .word 0x800068cc + 800068e0: 00000000 .word 0x00000000 + 800068e4: 80017f72 .word 0x80017f72 + 800068e8: 00000000 .word 0x00000000 + 800068ec: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x48e388cc72f79a66 + 800068f0: 000abf83 ld x31,0(x21) + 800068f4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xea13127bc015ed0f + 800068f8: 000abf83 ld x31,0(x21) + 800068fc: 008a8a93 addi x21,x21,8 + +0000000080006900 : +Zbkb_rol_cg_cmp_rd_rs1_rs2_b31: + rol x31, x31, x31 # perform operation + 80006900: 61ff9fb3 rol x31,x31,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zbkb_rol_cg_cmp_rd_rs1_rs2_b31, Zbkb_rol_cg_cmp_rd_rs1_rs2_b31_str) + 80006904: 0001b383 ld x7,0(x3) + 80006908: 01f38c63 beq x7,x31,80006920 + 8000690c: 40c0146f jal x8,80007d18 + 80006910: 80006900 .word 0x80006900 + 80006914: 00000000 .word 0x00000000 + 80006918: 80017fad .word 0x80017fad + 8000691c: 00000000 .word 0x00000000 + 80006920: 00818193 addi x3,x3,8 + + mv x2, x3 # restore signature pointer to default register for teardown + 80006924: 00018113 addi x2,x3,0 + +0000000080006928 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006928: 00000513 addi x10,x0,0 + 8000692c: 00000073 ecall + 80006930: fff00513 addi x10,x0,-1 + 80006934: 25800413 addi x8,x0,600 + +0000000080006938 : + 80006938: 34002373 csrrs x6,mscratch,x0 + +000000008000693c : + 8000693c: 2b833383 ld x7,696(x6) + +0000000080006940 : + 80006940: 2a033383 ld x7,672(x6) + +0000000080006944 : + 80006944: 2d033483 ld x9,720(x6) + 80006948: 34049073 csrrw x0,mscratch,x9 + +000000008000694c : + 8000694c: 2c833483 ld x9,712(x6) + 80006950: 305493f3 csrrw x7,mtvec,x9 + 80006954: ffc4f493 andi x9,x9,-4 + 80006958: ffc3f393 andi x7,x7,-4 + 8000695c: 00749e63 bne x9,x7,80006978 + +0000000080006960 : + 80006960: 00030493 addi x9,x6,0 + +0000000080006964 : + 80006964: 0004a783 lw x15,0(x9) + 80006968: 00f3a023 sw x15,0(x7) + 8000696c: 00438393 addi x7,x7,4 + 80006970: 00448493 addi x9,x9,4 + 80006974: fe83c8e3 blt x7,x8,80006964 + 80006978: 0000100f fence.i + +000000008000697c : + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: d4d50513 addi x10,x10,-691 # 8001870d + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: d4550513 addi x10,x10,-699 # 80018745 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: d6550513 addi x10,x10,-667 # 800187a5 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: 8d050513 addi x10,x10,-1840 # 80019350 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00014397 auipc x7,0x14 + 80006b04: 34038393 addi x7,x7,832 # 8001ae40 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00014417 auipc x8,0x14 + 80006b44: 2f040413 addi x8,x8,752 # 8001ae30 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 800188f9 .word 0x800188f9 + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018767 .word 0x80018767 + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: b1450513 addi x10,x10,-1260 # 800186d4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: b0d50513 addi x10,x10,-1267 # 8001870d + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc9ff06f jal x0,80006928 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: ca5ff06f jal x0,80006928 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9c30313 addi x6,x6,-1380 # 8000697c + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: ca750513 addi x10,x10,-857 # 80019d87 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 03850513 addi x10,x10,56 # 80018158 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00011517 auipc x10,0x11 + 80007164: 6ae50513 addi x10,x10,1710 # 8001880e + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00011517 auipc x10,0x11 + 800071a4: 56d50513 addi x10,x10,1389 # 8001870d + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: b9848493 addi x9,x9,-1128 # 80018138 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: d2840413 addi x8,x8,-728 # 80038308 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018910 .word 0x80018910 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018a12 .word 0x80018a12 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018b0d .word 0x80018b0d + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80018c00 .word 0x80018c00 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80018d73 .word 0x80018d73 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 2f020213 addi x4,x4,752 # 80017ff0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 2d838393 addi x7,x7,728 # 80017ff0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 2b068693 addi x13,x13,688 # 80017ff0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 28848493 addi x9,x9,648 # 80017ff0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 1e44a483 lw x9,484(x9) # 80017ff0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: f1040413 addi x8,x8,-240 # 80019dd0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00030417 auipc x8,0x30 + 80007f04: 41040413 addi x8,x8,1040 # 80038310 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 1d848493 addi x9,x9,472 # 80018118 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 19848493 addi x9,x9,408 # 80018118 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 16c80813 addi x16,x16,364 # 80018128 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 14c80813 addi x16,x16,332 # 80018128 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: 91138393 addi x7,x7,-1775 # 800188f9 + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 12880813 addi x16,x16,296 # 80018120 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: 90c38393 addi x7,x7,-1780 # 80018910 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: 9f638393 addi x7,x7,-1546 # 80018a12 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: ad938393 addi x7,x7,-1319 # 80018b0d + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: bb438393 addi x7,x7,-1100 # 80018c00 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: d0f38393 addi x7,x7,-753 # 80018d73 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: c7b38393 addi x7,x7,-901 # 80018cf7 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: ca138393 addi x7,x7,-863 # 80018d35 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: 8a438393 addi x7,x7,-1884 # 80018950 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: 98c38393 addi x7,x7,-1652 # 80018a50 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: a6d38393 addi x7,x7,-1427 # 80018b49 + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: b4938393 addi x7,x7,-1207 # 80018c3d + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: ca238393 addi x7,x7,-862 # 80018dae + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: 86c38393 addi x7,x7,-1940 # 80018990 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: 95238393 addi x7,x7,-1710 # 80018a8e + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: a3138393 addi x7,x7,-1487 # 80018b85 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: b0e38393 addi x7,x7,-1266 # 80018c7a + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: c6538393 addi x7,x7,-923 # 80018de9 + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: 83538393 addi x7,x7,-1995 # 800189d1 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: 91938393 addi x7,x7,-1767 # 80018acd + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: 9f638393 addi x7,x7,-1546 # 80018bc2 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: ad438393 addi x7,x7,-1324 # 80018cb8 + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: c2938393 addi x7,x7,-983 # 80018e25 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: c4e38393 addi x7,x7,-946 # 80018e62 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: c8538393 addi x7,x7,-891 # 80018eb1 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: d6838393 addi x7,x7,-664 # 80018fac + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: e4c38393 addi x7,x7,-436 # 800190a8 + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: ea480813 addi x16,x16,-348 # 80018120 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: e9480813 addi x16,x16,-364 # 80018120 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: e8c80813 addi x16,x16,-372 # 80018124 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: e7880813 addi x16,x16,-392 # 80018120 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00010517 auipc x10,0x10 + 80008304: 40d50513 addi x10,x10,1037 # 8001870d + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00010517 auipc x10,0x10 + 80008344: 40550513 addi x10,x10,1029 # 80018745 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00010517 auipc x10,0x10 + 80008384: 47c50513 addi x10,x10,1148 # 800187fc + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: d6853503 ld x10,-664(x10) # 80018110 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00010517 auipc x10,0x10 + 800083c4: 44e50513 addi x10,x10,1102 # 8001880e + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: c0852503 lw x10,-1016(x10) # 80017ff0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00010517 auipc x10,0x10 + 80008404: 41050513 addi x10,x10,1040 # 80018810 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: cc852503 lw x10,-824(x10) # 800180f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: cf850513 addi x10,x10,-776 # 80018158 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 38450513 addi x10,x10,900 # 80018824 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: c3053503 ld x10,-976(x10) # 800180f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: c7850513 addi x10,x10,-904 # 80018158 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: d3b50513 addi x10,x10,-709 # 8001925b + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: aa852503 lw x10,-1368(x10) # 80017ff0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: bf860613 addi x12,x12,-1032 # 80018158 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: b6c52503 lw x10,-1172(x10) # 800180f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: db150513 addi x10,x10,-591 # 80019371 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: b5860613 addi x12,x12,-1192 # 80018158 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: acc52503 lw x10,-1332(x10) # 800180f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: b1860613 addi x12,x12,-1256 # 80018158 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: a8c52503 lw x10,-1396(x10) # 800180f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: bd450513 addi x10,x10,-1068 # 80019254 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: a9850513 addi x10,x10,-1384 # 80018158 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: b6c50513 addi x10,x10,-1172 # 8001926c + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: 8c852503 lw x10,-1848(x10) # 80017ff0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: 9c853503 ld x10,-1592(x10) # 80018100 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: 9b453503 ld x10,-1612(x10) # 80018100 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: 9f850513 addi x10,x10,-1544 # 80018158 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: 99052503 lw x10,-1648(x10) # 80018118 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ae350513 addi x10,x10,-1309 # 80019283 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: 82852503 lw x10,-2008(x10) # 80017ff0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: 93053503 ld x10,-1744(x10) # 80018108 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: 91c53503 ld x10,-1764(x10) # 80018108 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: 95850513 addi x10,x10,-1704 # 80018158 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: a5a50513 addi x10,x10,-1446 # 8001929a + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: 8a053503 ld x10,-1888(x10) # 80018108 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: 8d850513 addi x10,x10,-1832 # 80018158 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: a3850513 addi x10,x10,-1480 # 800192f8 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: 82053503 ld x10,-2016(x10) # 80018108 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: 85850513 addi x10,x10,-1960 # 80018158 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 0000f417 auipc x8,0xf + 80008930: 7f442403 lw x8,2036(x8) # 80018120 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: a5d50513 addi x10,x10,-1443 # 8001939d + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: a4950513 addi x10,x10,-1463 # 800193c9 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 0000f817 auipc x16,0xf + 800089ac: 78080813 addi x16,x16,1920 # 80018128 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: e4e50513 addi x10,x10,-434 # 8001880e + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: 9d950513 addi x10,x10,-1575 # 800193d9 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 0000f517 auipc x10,0xf + 80008a2c: 6e053503 ld x10,1760(x10) # 80018108 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 0000f517 auipc x10,0xf + 80008a44: 71850513 addi x10,x10,1816 # 80018158 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: 98450513 addi x10,x10,-1660 # 80019404 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 0000f517 auipc x10,0xf + 80008aac: 65853503 ld x10,1624(x10) # 80018100 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 0000f517 auipc x10,0xf + 80008ac4: 69850513 addi x10,x10,1688 # 80018158 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 0000f317 auipc x6,0xf + 80008aec: 61833303 ld x6,1560(x6) # 80018100 + 80008af0: 0000f397 auipc x7,0xf + 80008af4: 6183b383 ld x7,1560(x7) # 80018108 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: 93350513 addi x10,x10,-1741 # 80019433 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: 95b50513 addi x10,x10,-1701 # 8001949b + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 0000f317 auipc x6,0xf + 80008b6c: 59833303 ld x6,1432(x6) # 80018100 + 80008b70: 0000f397 auipc x7,0xf + 80008b74: 5983b383 ld x7,1432(x7) # 80018108 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 0000f517 auipc x10,0xf + 80008ba4: 5b850513 addi x10,x10,1464 # 80018158 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: 8e250513 addi x10,x10,-1822 # 800194c2 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: 83f50513 addi x10,x10,-1985 # 8001945f + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: 83b50513 addi x10,x10,-1989 # 8001949b + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 0000f317 auipc x6,0xf + 80008c8c: 48033303 ld x6,1152(x6) # 80018108 + 80008c90: 0000f397 auipc x7,0xf + 80008c94: 4703b383 ld x7,1136(x7) # 80018100 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 0000f517 auipc x10,0xf + 80008cc4: 49850513 addi x10,x10,1176 # 80018158 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: 8aa50513 addi x10,x10,-1878 # 800195aa + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: 95150513 addi x10,x10,-1711 # 80019691 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 3bc52503 lw x10,956(x10) # 80018124 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: 92d50513 addi x10,x10,-1747 # 800196cd + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: 8cb50513 addi x10,x10,-1845 # 800196ab + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: 89350513 addi x10,x10,-1901 # 800196b3 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: 85b50513 addi x10,x10,-1957 # 800196bb + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: 82450513 addi x10,x10,-2012 # 800196c4 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00010517 auipc x10,0x10 + 80008ee4: 7f650513 addi x10,x10,2038 # 800196d6 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 21852503 lw x10,536(x10) # 80018120 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: 8cd50513 addi x10,x10,-1843 # 8001982d + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00010517 auipc x10,0x10 + 80008fa4: 75050513 addi x10,x10,1872 # 800196f0 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00010517 auipc x10,0x10 + 80008fe4: 74150513 addi x10,x10,1857 # 80019721 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00010517 auipc x10,0x10 + 80009024: 72150513 addi x10,x10,1825 # 80019741 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00010517 auipc x10,0x10 + 80009064: 6ff50513 addi x10,x10,1791 # 8001975f + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00010517 auipc x10,0x10 + 800090a4: 6de50513 addi x10,x10,1758 # 8001977e + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00010517 auipc x10,0x10 + 800090e4: 6c650513 addi x10,x10,1734 # 800197a6 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00010517 auipc x10,0x10 + 80009124: 6b250513 addi x10,x10,1714 # 800197d2 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00010517 auipc x10,0x10 + 80009164: 69e50513 addi x10,x10,1694 # 800197fe + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00010517 auipc x10,0x10 + 800091a4: 69c50513 addi x10,x10,1692 # 8001983c + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: f4053503 ld x10,-192(x10) # 80018108 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: f7850513 addi x10,x10,-136 # 80018158 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00010517 auipc x10,0x10 + 80009224: 63350513 addi x10,x10,1587 # 80019853 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: eb853503 ld x10,-328(x10) # 80018100 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: ef850513 addi x10,x10,-264 # 80018158 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: e9852503 lw x10,-360(x10) # 80018120 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00010517 auipc x10,0x10 + 800092a4: 5ca50513 addi x10,x10,1482 # 8001986a + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: e4053503 ld x10,-448(x10) # 80018108 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00010517 auipc x10,0x10 + 800092e4: 5a150513 addi x10,x10,1441 # 80019881 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: df853503 ld x10,-520(x10) # 80018100 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: dfc52503 lw x10,-516(x10) # 80018120 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00010517 auipc x10,0x10 + 80009344: 5b750513 addi x10,x10,1463 # 800198f7 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00010517 auipc x10,0x10 + 80009384: 64d50513 addi x10,x10,1613 # 800199cd + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00010517 auipc x10,0x10 + 800093c4: 70050513 addi x10,x10,1792 # 80019ac0 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00010517 auipc x10,0x10 + 80009404: 7bb50513 addi x10,x10,1979 # 80019bbb + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: 86250513 addi x10,x10,-1950 # 80019ca2 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00010517 auipc x10,0x10 + 80009484: 42f50513 addi x10,x10,1071 # 800198af + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: c9063603 ld x12,-880(x12) # 80018138 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 3d850513 addi x10,x10,984 # 80018898 + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: c3850513 addi x10,x10,-968 # 80018158 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: c2058593 addi x11,x11,-992 # 80018180 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: cb058593 addi x11,x11,-848 # 80018240 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 0fe50513 addi x10,x10,254 # 800186be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: d5050513 addi x10,x10,-688 # 80019350 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: b0060613 addi x12,x12,-1280 # 80018130 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 27950513 addi x10,x10,633 # 800188b9 + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: ad053503 ld x10,-1328(x10) # 80018138 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: ad850513 addi x10,x10,-1320 # 80018158 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 20950513 addi x10,x10,521 # 800188c9 + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: a5853503 ld x10,-1448(x10) # 80018140 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: a5850513 addi x10,x10,-1448 # 80018158 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 19950513 addi x10,x10,409 # 800188d9 + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: 9e053503 ld x10,-1568(x10) # 80018148 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: 9d850513 addi x10,x10,-1576 # 80018158 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 12950513 addi x10,x10,297 # 800188e9 + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: 96853503 ld x10,-1688(x10) # 80018150 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: 95850513 addi x10,x10,-1704 # 80018158 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: 90860613 addi x12,x12,-1784 # 80018130 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: 91860613 addi x12,x12,-1768 # 80018158 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89030313 addi x6,x6,-1904 # 80006928 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87830313 addi x6,x6,-1928 # 80006928 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86030313 addi x6,x6,-1952 # 80006928 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f878793 addi x15,x15,1784 # 80006938 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: 8f010113 addi x2,x2,-1808 # 80019dd0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 80019379 .word 0x80019379 + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: e1828293 addi x5,x5,-488 # 80038400 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: df828293 addi x5,x5,-520 # 80038400 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-ror-00.elf.objdump b/riscv-tests/rv64-Zbkb-ror-00.elf.objdump new file mode 100644 index 0000000..faaeaed --- /dev/null +++ b/riscv-tests/rv64-Zbkb-ror-00.elf.objdump @@ -0,0 +1,17095 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-ror-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-ror-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c310 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038400 0000000080038400 00037400 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031b8 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000079 0000000000000000 0000000000000000 0003b873 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8ec 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b90f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b930 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000087 0000000000000000 0000000000000000 0003b970 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9f7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038400 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cc2KSsE7.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b1 +000000008000e4a0 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b2 +000000008000e4d0 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b3 +000000008000e500 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b4 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e530 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b5 +000000008000e560 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b6 +000000008000e590 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b7 +000000008000e5c0 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b8 +000000008000e5f0 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b9 +000000008000e620 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b9_str +000000008000026c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b10 +000000008000e651 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b10_str +00000000800002a0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b11 +000000008000e683 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b11_str +00000000800002d4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b12 +000000008000e6b5 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b12_str +0000000080000310 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b13 +000000008000e6e7 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b13_str +0000000080000344 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b14 +000000008000e719 l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b14_str +0000000080000378 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b15 +000000008000e74b l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b15_str +00000000800003ac l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b16 +000000008000e77d l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b16_str +00000000800003e0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b17 +000000008000e7af l .data 0000000000000000 Zbkb_ror_cg_cp_rs1_b17_str +0000000080000414 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cp_rs1_b18 +000000008000e7e1 l .data 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+00000000800120ac l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080002cc4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001211a l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080002cf8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080012188 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080002d2c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555 +00000000800121f6 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str +0000000080002d60 l .text.rvtest 0000000000000000 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Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0 +00000000800123fe l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e64 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +000000008001245d l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str +0000000080002e98 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2 +00000000800124bc l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str +0000000080002ecc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000 +000000008001251b l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str +0000000080002f00 l .text.rvtest 0000000000000000 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+0000000080002fd0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080012741 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003004 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800127af l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080003038 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +000000008001281d l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +000000008000306c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555 +000000008001288b l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str +00000000800030a0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff +00000000800128f9 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str +00000000800030d4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe +000000008001295f l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str +0000000080003108 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000 +00000000800129c5 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str +000000008000313c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001 +0000000080012a2c l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str +0000000080003170 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0 +0000000080012a93 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str +00000000800031a4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1 +0000000080012af2 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str +00000000800031d8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2 +0000000080012b51 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str +000000008000320c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000 +0000000080012bb0 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str +0000000080003240 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080012c1e l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +0000000080003274 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080012c8c l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032a8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +0000000080012cfa l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032dc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +0000000080012d68 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080003310 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +0000000080012dd6 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003344 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +0000000080012e44 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003378 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080012eb2 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033ac l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080012f20 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033e0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +0000000080012f8e l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003414 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +0000000080012ff4 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003448 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +000000008001305a l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +000000008000347c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800130c1 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034b0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013128 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034e4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +0000000080013187 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003518 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800131e6 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +000000008000354c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +0000000080013245 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +0000000080003580 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800132b3 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035b4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080013321 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035e8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +000000008001338f l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +000000008000361c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +00000000800133fd l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003650 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +000000008001346b l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003684 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800134d9 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036b8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013547 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036ec l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +00000000800135b5 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +0000000080003720 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +0000000080013623 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +0000000080003754 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +0000000080013689 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003788 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +00000000800136ef l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037bc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013756 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037f0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +00000000800137bd l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +0000000080003824 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +000000008001381c l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003858 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +000000008001387b l .data 0000000000000000 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.data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +000000008000395c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080013a92 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +0000000080003990 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080013b00 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039c4 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080013b6e l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +00000000800039f8 l .text.rvtest 0000000000000000 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0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe +00000000800140b9 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str +0000000080003c9c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff +0000000080014127 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str +0000000080003cd0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe +0000000080014195 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003d04 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +0000000080014203 l .data 0000000000000000 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Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fa8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +000000008001474e l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fdc l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +00000000800147bc l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004010 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +000000008001482a l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +0000000080004044 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014898 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004078 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014906 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040ac l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014974 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e0 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +00000000800149e2 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004114 l .text.rvtest 0000000000000000 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+0000000080014d4d l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str +00000000800042e8 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe +0000000080014db3 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str +000000008000431c l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff +0000000080014e19 l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str +0000000080004350 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe +0000000080014e7f l .data 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str +0000000080004384 l .text.rvtest 0000000000000000 Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2 +0000000080014ee5 l .data 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+0000000080038400 g .tohost 0000000000000000 tohost +0000000080006bf0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x63acb10023d1ee22 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x26a846dcccaafd4b + 80000048: 0001bc83 ld x25,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_ror_cg_cp_rs1_b0: + ror x28, x0, x25 # perform operation + 80000050: 61905e33 ror x28,x0,x25 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_ror_cg_cp_rs1_b0, Zbkb_ror_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01c20c63 beq x4,x28,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xc7b47434453e0ec4 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x31ef64d534583bcd + 8000007c: 0001b983 ld x19,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_ror_cg_cp_rs1_b1: + ror x0, x1, x19 # perform operation + 80000084: 6130d033 ror x0,x1,x19 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zbkb_ror_cg_cp_rs1_b1, Zbkb_ror_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 00020c63 beq x4,x0,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a0 .word 0x8000e4a0 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x21, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010a93 addi x21,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x6823be0b6e7d931b + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x86da358e01b95195 + 800000b4: 0001b603 ld x12,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_ror_cg_cp_rs1_b2: + ror x15, x2, x12 # perform operation + 800000bc: 60c157b3 ror x15,x2,x12 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zbkb_ror_cg_cp_rs1_b2, Zbkb_ror_cg_cp_rs1_b2_str) + 800000c0: 000ab203 ld x4,0(x21) + 800000c4: 00f20c63 beq x4,x15,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d0 .word 0x8000e4d0 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008a8a93 addi x21,x21,8 + + mv x10, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xee4aa68d6ef925e4 + 800000e4: 00053183 ld x3,0(x10) + 800000e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x5b56359aec9a1f34 + 800000ec: 00053003 ld x0,0(x10) + 800000f0: 00850513 addi x10,x10,8 + +00000000800000f4 : +Zbkb_ror_cg_cp_rs1_b3: + ror x16, x3, x0 # perform operation + 800000f4: 6001d833 ror x16,x3,x0 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zbkb_ror_cg_cp_rs1_b3, Zbkb_ror_cg_cp_rs1_b3_str) + 800000f8: 000ab203 ld x4,0(x21) + 800000fc: 01020c63 beq x4,x16,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e500 .word 0x8000e500 + 80000110: 00000000 .word 0x00000000 + 80000114: 008a8a93 addi x21,x21,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x59d83ed2f6d54b2c + 80000120: 00053203 ld x4,0(x10) + 80000124: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0679f1626638b731 + 80000128: 00053d83 ld x27,0(x10) + 8000012c: 00850513 addi x10,x10,8 + +0000000080000130 : +Zbkb_ror_cg_cp_rs1_b4: + ror x3, x4, x27 # perform operation + 80000130: 61b251b3 ror x3,x4,x27 + # Check if x3 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x3, Zbkb_ror_cg_cp_rs1_b4, Zbkb_ror_cg_cp_rs1_b4_str) + 80000134: 000ab683 ld x13,0(x21) + 80000138: 00368c63 beq x13,x3,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e530 .word 0x8000e530 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xd4141b9d98257e8c + 80000154: 00053283 ld x5,0(x10) + 80000158: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x97dab8ad749539b1 + 8000015c: 00053483 ld x9,0(x10) + 80000160: 00850513 addi x10,x10,8 + +0000000080000164 : +Zbkb_ror_cg_cp_rs1_b5: + ror x22, x5, x9 # perform operation + 80000164: 6092db33 ror x22,x5,x9 + # Check if x22 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x22, Zbkb_ror_cg_cp_rs1_b5, Zbkb_ror_cg_cp_rs1_b5_str) + 80000168: 000ab683 ld x13,0(x21) + 8000016c: 01668c63 beq x13,x22,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e560 .word 0x8000e560 + 80000180: 00000000 .word 0x00000000 + 80000184: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x897bb5c4b1e7097d + 80000188: 00053303 ld x6,0(x10) + 8000018c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x734656b7f0de32c8 + 80000190: 00053e03 ld x28,0(x10) + 80000194: 00850513 addi x10,x10,8 + +0000000080000198 : +Zbkb_ror_cg_cp_rs1_b6: + ror x0, x6, x28 # perform operation + 80000198: 61c35033 ror x0,x6,x28 + # Check if x0 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x0, Zbkb_ror_cg_cp_rs1_b6, Zbkb_ror_cg_cp_rs1_b6_str) + 8000019c: 000ab683 ld x13,0(x21) + 800001a0: 00068c63 beq x13,x0,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e590 .word 0x8000e590 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xf746a7fbc6b21414 + 800001bc: 00053383 ld x7,0(x10) + 800001c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x789ddddac2bd2b8d + 800001c4: 00053483 ld x9,0(x10) + 800001c8: 00850513 addi x10,x10,8 + +00000000800001cc : +Zbkb_ror_cg_cp_rs1_b7: + ror x19, x7, x9 # perform operation + 800001cc: 6093d9b3 ror x19,x7,x9 + # Check if x19 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x19, Zbkb_ror_cg_cp_rs1_b7, Zbkb_ror_cg_cp_rs1_b7_str) + 800001d0: 000ab683 ld x13,0(x21) + 800001d4: 01368c63 beq x13,x19,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5c0 .word 0x8000e5c0 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x61e7043ef498025e + 800001f0: 00053403 ld x8,0(x10) + 800001f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xb9afc4c45537e6ca + 800001f8: 00053d83 ld x27,0(x10) + 800001fc: 00850513 addi x10,x10,8 + +0000000080000200 : +Zbkb_ror_cg_cp_rs1_b8: + ror x26, x8, x27 # perform operation + 80000200: 61b45d33 ror x26,x8,x27 + # Check if x26 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x26, Zbkb_ror_cg_cp_rs1_b8, Zbkb_ror_cg_cp_rs1_b8_str) + 80000204: 000ab683 ld x13,0(x21) + 80000208: 01a68c63 beq x13,x26,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e5f0 .word 0x8000e5f0 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x23563cf2d0aea1f1 + 80000224: 00053483 ld x9,0(x10) + 80000228: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xccdb3948508702e8 + 8000022c: 00053203 ld x4,0(x10) + 80000230: 00850513 addi x10,x10,8 + +0000000080000234 : +Zbkb_ror_cg_cp_rs1_b9: + ror x16, x9, x4 # perform operation + 80000234: 6044d833 ror x16,x9,x4 + # Check if x16 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x16, Zbkb_ror_cg_cp_rs1_b9, Zbkb_ror_cg_cp_rs1_b9_str) + 80000238: 000ab683 ld x13,0(x21) + 8000023c: 01068c63 beq x13,x16,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e620 .word 0x8000e620 + 80000250: 00000000 .word 0x00000000 + 80000254: 008a8a93 addi x21,x21,8 + + mv x30, x10 # switch data pointer register to avoid conflict with test + 80000258: 00050f13 addi x30,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0xfcdc4451c3bcb701 + 8000025c: 000f3503 ld x10,0(x30) + 80000260: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xcf26febddbd8a83b + 80000264: 000f3983 ld x19,0(x30) + 80000268: 008f0f13 addi x30,x30,8 + +000000008000026c : +Zbkb_ror_cg_cp_rs1_b10: + ror x11, x10, x19 # perform operation + 8000026c: 613555b3 ror x11,x10,x19 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zbkb_ror_cg_cp_rs1_b10, Zbkb_ror_cg_cp_rs1_b10_str) + 80000270: 000ab683 ld x13,0(x21) + 80000274: 00b68c63 beq x13,x11,8000028c + 80000278: 2c90776f jal x14,80007d40 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 8000e651 .word 0x8000e651 + 80000288: 00000000 .word 0x00000000 + 8000028c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x32f25c4b838ee87c + 80000290: 000f3583 ld x11,0(x30) + 80000294: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0xaa59f43c2ff17836 + 80000298: 000f3183 ld x3,0(x30) + 8000029c: 008f0f13 addi x30,x30,8 + +00000000800002a0 : +Zbkb_ror_cg_cp_rs1_b11: + ror x0, x11, x3 # perform operation + 800002a0: 6035d033 ror x0,x11,x3 + # Check if x0 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x0, Zbkb_ror_cg_cp_rs1_b11, Zbkb_ror_cg_cp_rs1_b11_str) + 800002a4: 000ab683 ld x13,0(x21) + 800002a8: 00068c63 beq x13,x0,800002c0 + 800002ac: 2950776f jal x14,80007d40 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 8000e683 .word 0x8000e683 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xa7a5de7c0dc19c71 + 800002c4: 000f3603 ld x12,0(x30) + 800002c8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs2: x1 = 0x353836e0d742a07a + 800002cc: 000f3083 ld x1,0(x30) + 800002d0: 008f0f13 addi x30,x30,8 + +00000000800002d4 : +Zbkb_ror_cg_cp_rs1_b12: + ror x31, x12, x1 # perform operation + 800002d4: 60165fb3 ror x31,x12,x1 + # Check if x31 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x31, Zbkb_ror_cg_cp_rs1_b12, Zbkb_ror_cg_cp_rs1_b12_str) + 800002d8: 000ab683 ld x13,0(x21) + 800002dc: 01f68c63 beq x13,x31,800002f4 + 800002e0: 2610776f jal x14,80007d40 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 8000e6b5 .word 0x8000e6b5 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 008a8a93 addi x21,x21,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002fc: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x0d1897715404f454 + 80000300: 000f3683 ld x13,0(x30) + 80000304: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0xde310ae3ab3739ea + 80000308: 000f3a03 ld x20,0(x30) + 8000030c: 008f0f13 addi x30,x30,8 + +0000000080000310 : +Zbkb_ror_cg_cp_rs1_b13: + ror x0, x13, x20 # perform operation + 80000310: 6146d033 ror x0,x13,x20 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zbkb_ror_cg_cp_rs1_b13, Zbkb_ror_cg_cp_rs1_b13_str) + 80000314: 000ab203 ld x4,0(x21) + 80000318: 00020c63 beq x4,x0,80000330 + 8000031c: 1e5072ef jal x5,80007d00 + 80000320: 80000310 .word 0x80000310 + 80000324: 00000000 .word 0x00000000 + 80000328: 8000e6e7 .word 0x8000e6e7 + 8000032c: 00000000 .word 0x00000000 + 80000330: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0x32ee310b58d525df + 80000334: 000f3703 ld x14,0(x30) + 80000338: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0xa02dda2b09ce7d18 + 8000033c: 000f3183 ld x3,0(x30) + 80000340: 008f0f13 addi x30,x30,8 + +0000000080000344 : +Zbkb_ror_cg_cp_rs1_b14: + ror x26, x14, x3 # perform operation + 80000344: 60375d33 ror x26,x14,x3 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zbkb_ror_cg_cp_rs1_b14, Zbkb_ror_cg_cp_rs1_b14_str) + 80000348: 000ab203 ld x4,0(x21) + 8000034c: 01a20c63 beq x4,x26,80000364 + 80000350: 1b1072ef jal x5,80007d00 + 80000354: 80000344 .word 0x80000344 + 80000358: 00000000 .word 0x00000000 + 8000035c: 8000e719 .word 0x8000e719 + 80000360: 00000000 .word 0x00000000 + 80000364: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0xd6558d18b48601e4 + 80000368: 000f3783 ld x15,0(x30) + 8000036c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0xb09bf4b664752530 + 80000370: 000f3503 ld x10,0(x30) + 80000374: 008f0f13 addi x30,x30,8 + +0000000080000378 : +Zbkb_ror_cg_cp_rs1_b15: + ror x2, x15, x10 # perform operation + 80000378: 60a7d133 ror x2,x15,x10 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zbkb_ror_cg_cp_rs1_b15, Zbkb_ror_cg_cp_rs1_b15_str) + 8000037c: 000ab203 ld x4,0(x21) + 80000380: 00220c63 beq x4,x2,80000398 + 80000384: 17d072ef jal x5,80007d00 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e74b .word 0x8000e74b + 80000394: 00000000 .word 0x00000000 + 80000398: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x9a3065ec54f50eba + 8000039c: 000f3803 ld x16,0(x30) + 800003a0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xd13bb37f96e1e765 + 800003a4: 000f3983 ld x19,0(x30) + 800003a8: 008f0f13 addi x30,x30,8 + +00000000800003ac : +Zbkb_ror_cg_cp_rs1_b16: + ror x15, x16, x19 # perform operation + 800003ac: 613857b3 ror x15,x16,x19 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zbkb_ror_cg_cp_rs1_b16, Zbkb_ror_cg_cp_rs1_b16_str) + 800003b0: 000ab203 ld x4,0(x21) + 800003b4: 00f20c63 beq x4,x15,800003cc + 800003b8: 149072ef jal x5,80007d00 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 8000e77d .word 0x8000e77d + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xa4bdefbac586be56 + 800003d0: 000f3883 ld x17,0(x30) + 800003d4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0xad58cb4fa413d7c7 + 800003d8: 000f3903 ld x18,0(x30) + 800003dc: 008f0f13 addi x30,x30,8 + +00000000800003e0 : +Zbkb_ror_cg_cp_rs1_b17: + ror x10, x17, x18 # perform operation + 800003e0: 6128d533 ror x10,x17,x18 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zbkb_ror_cg_cp_rs1_b17, Zbkb_ror_cg_cp_rs1_b17_str) + 800003e4: 000ab203 ld x4,0(x21) + 800003e8: 00a20c63 beq x4,x10,80000400 + 800003ec: 115072ef jal x5,80007d00 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 8000e7af .word 0x8000e7af + 800003fc: 00000000 .word 0x00000000 + 80000400: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0xcc02449435b038e7 + 80000404: 000f3903 ld x18,0(x30) + 80000408: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs2: x8 = 0x26ab3778f89503c8 + 8000040c: 000f3403 ld x8,0(x30) + 80000410: 008f0f13 addi x30,x30,8 + +0000000080000414 : +Zbkb_ror_cg_cp_rs1_b18: + ror x12, x18, x8 # perform operation + 80000414: 60895633 ror x12,x18,x8 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zbkb_ror_cg_cp_rs1_b18, Zbkb_ror_cg_cp_rs1_b18_str) + 80000418: 000ab203 ld x4,0(x21) + 8000041c: 00c20c63 beq x4,x12,80000434 + 80000420: 0e1072ef jal x5,80007d00 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8000e7e1 .word 0x8000e7e1 + 80000430: 00000000 .word 0x00000000 + 80000434: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x03bf26c8c02af94e + 80000438: 000f3983 ld x19,0(x30) + 8000043c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0xac16bda05aaa88ef + 80000440: 000f3303 ld x6,0(x30) + 80000444: 008f0f13 addi x30,x30,8 + +0000000080000448 : +Zbkb_ror_cg_cp_rs1_b19: + ror x13, x19, x6 # perform operation + 80000448: 6069d6b3 ror x13,x19,x6 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zbkb_ror_cg_cp_rs1_b19, Zbkb_ror_cg_cp_rs1_b19_str) + 8000044c: 000ab203 ld x4,0(x21) + 80000450: 00d20c63 beq x4,x13,80000468 + 80000454: 0ad072ef jal x5,80007d00 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8000e813 .word 0x8000e813 + 80000464: 00000000 .word 0x00000000 + 80000468: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x34f0ff1dd595f089 + 8000046c: 000f3a03 ld x20,0(x30) + 80000470: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0xc6e0813d1b7e604b + 80000474: 000f3783 ld x15,0(x30) + 80000478: 008f0f13 addi x30,x30,8 + +000000008000047c : +Zbkb_ror_cg_cp_rs1_b20: + ror x14, x20, x15 # perform operation + 8000047c: 60fa5733 ror x14,x20,x15 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zbkb_ror_cg_cp_rs1_b20, Zbkb_ror_cg_cp_rs1_b20_str) + 80000480: 000ab203 ld x4,0(x21) + 80000484: 00e20c63 beq x4,x14,8000049c + 80000488: 079072ef jal x5,80007d00 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 8000e845 .word 0x8000e845 + 80000498: 00000000 .word 0x00000000 + 8000049c: 008a8a93 addi x21,x21,8 + + mv x28, x21 # switch signature pointer register to avoid conflict with test + 800004a0: 000a8e13 addi x28,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x72b1145baaad59e2 + 800004a4: 000f3a83 ld x21,0(x30) + 800004a8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x4ad4be9a7902cc04 + 800004ac: 000f3c83 ld x25,0(x30) + 800004b0: 008f0f13 addi x30,x30,8 + +00000000800004b4 : +Zbkb_ror_cg_cp_rs1_b21: + ror x0, x21, x25 # perform operation + 800004b4: 619ad033 ror x0,x21,x25 + # Check if x0 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x0, Zbkb_ror_cg_cp_rs1_b21, Zbkb_ror_cg_cp_rs1_b21_str) + 800004b8: 000e3203 ld x4,0(x28) + 800004bc: 00020c63 beq x4,x0,800004d4 + 800004c0: 041072ef jal x5,80007d00 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 8000e877 .word 0x8000e877 + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xea5bb9890c561f10 + 800004d8: 000f3b03 ld x22,0(x30) + 800004dc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xc80692b8482d37d2 + 800004e0: 000f3c03 ld x24,0(x30) + 800004e4: 008f0f13 addi x30,x30,8 + +00000000800004e8 : +Zbkb_ror_cg_cp_rs1_b22: + ror x19, x22, x24 # perform operation + 800004e8: 618b59b3 ror x19,x22,x24 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zbkb_ror_cg_cp_rs1_b22, Zbkb_ror_cg_cp_rs1_b22_str) + 800004ec: 000e3203 ld x4,0(x28) + 800004f0: 01320c63 beq x4,x19,80000508 + 800004f4: 00d072ef jal x5,80007d00 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 8000e8a9 .word 0x8000e8a9 + 80000504: 00000000 .word 0x00000000 + 80000508: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xcb7d72c56d6c8328 + 8000050c: 000f3b83 ld x23,0(x30) + 80000510: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x592b21bd9c503608 + 80000514: 000f3703 ld x14,0(x30) + 80000518: 008f0f13 addi x30,x30,8 + +000000008000051c : +Zbkb_ror_cg_cp_rs1_b23: + ror x10, x23, x14 # perform operation + 8000051c: 60ebd533 ror x10,x23,x14 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zbkb_ror_cg_cp_rs1_b23, Zbkb_ror_cg_cp_rs1_b23_str) + 80000520: 000e3203 ld x4,0(x28) + 80000524: 00a20c63 beq x4,x10,8000053c + 80000528: 7d8072ef jal x5,80007d00 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8000e8db .word 0x8000e8db + 80000538: 00000000 .word 0x00000000 + 8000053c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x55862539164b1ec1 + 80000540: 000f3c03 ld x24,0(x30) + 80000544: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xf58607a43850ea8f + 80000548: 000f3583 ld x11,0(x30) + 8000054c: 008f0f13 addi x30,x30,8 + +0000000080000550 : +Zbkb_ror_cg_cp_rs1_b24: + ror x27, x24, x11 # perform operation + 80000550: 60bc5db3 ror x27,x24,x11 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkb_ror_cg_cp_rs1_b24, Zbkb_ror_cg_cp_rs1_b24_str) + 80000554: 000e3203 ld x4,0(x28) + 80000558: 01b20c63 beq x4,x27,80000570 + 8000055c: 7a4072ef jal x5,80007d00 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e90d .word 0x8000e90d + 8000056c: 00000000 .word 0x00000000 + 80000570: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xbc739908dca36227 + 80000574: 000f3c83 ld x25,0(x30) + 80000578: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0x7566f8ff7fe9e61b + 8000057c: 000f3183 ld x3,0(x30) + 80000580: 008f0f13 addi x30,x30,8 + +0000000080000584 : +Zbkb_ror_cg_cp_rs1_b25: + ror x24, x25, x3 # perform operation + 80000584: 603cdc33 ror x24,x25,x3 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zbkb_ror_cg_cp_rs1_b25, Zbkb_ror_cg_cp_rs1_b25_str) + 80000588: 000e3203 ld x4,0(x28) + 8000058c: 01820c63 beq x4,x24,800005a4 + 80000590: 770072ef jal x5,80007d00 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 8000e93f .word 0x8000e93f + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x0f1a41b972d67fee + 800005a8: 000f3d03 ld x26,0(x30) + 800005ac: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0x3fb3b8fb7ea5ca95 + 800005b0: 000f3683 ld x13,0(x30) + 800005b4: 008f0f13 addi x30,x30,8 + +00000000800005b8 : +Zbkb_ror_cg_cp_rs1_b26: + ror x10, x26, x13 # perform operation + 800005b8: 60dd5533 ror x10,x26,x13 + # Check if x10 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x10, Zbkb_ror_cg_cp_rs1_b26, Zbkb_ror_cg_cp_rs1_b26_str) + 800005bc: 000e3203 ld x4,0(x28) + 800005c0: 00a20c63 beq x4,x10,800005d8 + 800005c4: 73c072ef jal x5,80007d00 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 8000e971 .word 0x8000e971 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x4c4285f79235770d + 800005dc: 000f3d83 ld x27,0(x30) + 800005e0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x4d16a77e3db16734 + 800005e4: 000f3803 ld x16,0(x30) + 800005e8: 008f0f13 addi x30,x30,8 + +00000000800005ec : +Zbkb_ror_cg_cp_rs1_b27: + ror x6, x27, x16 # perform operation + 800005ec: 610dd333 ror x6,x27,x16 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zbkb_ror_cg_cp_rs1_b27, Zbkb_ror_cg_cp_rs1_b27_str) + 800005f0: 000e3203 ld x4,0(x28) + 800005f4: 00620c63 beq x4,x6,8000060c + 800005f8: 708072ef jal x5,80007d00 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 8000e9a3 .word 0x8000e9a3 + 80000608: 00000000 .word 0x00000000 + 8000060c: 008e0e13 addi x28,x28,8 + + mv x12, x28 # switch signature pointer register to avoid conflict with test + 80000610: 000e0613 addi x12,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x490a8e22d1622d30 + 80000614: 000f3e03 ld x28,0(x30) + 80000618: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x8becc66d2e815a15 + 8000061c: 000f3a03 ld x20,0(x30) + 80000620: 008f0f13 addi x30,x30,8 + +0000000080000624 : +Zbkb_ror_cg_cp_rs1_b28: + ror x7, x28, x20 # perform operation + 80000624: 614e53b3 ror x7,x28,x20 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkb_ror_cg_cp_rs1_b28, Zbkb_ror_cg_cp_rs1_b28_str) + 80000628: 00063203 ld x4,0(x12) + 8000062c: 00720c63 beq x4,x7,80000644 + 80000630: 6d0072ef jal x5,80007d00 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000e9d5 .word 0x8000e9d5 + 80000640: 00000000 .word 0x00000000 + 80000644: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x3bcaaab957ee5fac + 80000648: 000f3e83 ld x29,0(x30) + 8000064c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x1c63413286e5f15b + 80000650: 000f3883 ld x17,0(x30) + 80000654: 008f0f13 addi x30,x30,8 + +0000000080000658 : +Zbkb_ror_cg_cp_rs1_b29: + ror x1, x29, x17 # perform operation + 80000658: 611ed0b3 ror x1,x29,x17 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkb_ror_cg_cp_rs1_b29, Zbkb_ror_cg_cp_rs1_b29_str) + 8000065c: 00063203 ld x4,0(x12) + 80000660: 00120c63 beq x4,x1,80000678 + 80000664: 69c072ef jal x5,80007d00 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 8000ea07 .word 0x8000ea07 + 80000674: 00000000 .word 0x00000000 + 80000678: 00860613 addi x12,x12,8 + + mv x21, x30 # switch data pointer register to avoid conflict with test + 8000067c: 000f0a93 addi x21,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x7e70a2874aeeeb9e + 80000680: 000abf03 ld x30,0(x21) + 80000684: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x2c35d1211e7265c9 + 80000688: 000abd03 ld x26,0(x21) + 8000068c: 008a8a93 addi x21,x21,8 + +0000000080000690 : +Zbkb_ror_cg_cp_rs1_b30: + ror x31, x30, x26 # perform operation + 80000690: 61af5fb3 ror x31,x30,x26 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_ror_cg_cp_rs1_b30, Zbkb_ror_cg_cp_rs1_b30_str) + 80000694: 00063203 ld x4,0(x12) + 80000698: 01f20c63 beq x4,x31,800006b0 + 8000069c: 664072ef jal x5,80007d00 + 800006a0: 80000690 .word 0x80000690 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 8000ea39 .word 0x8000ea39 + 800006ac: 00000000 .word 0x00000000 + 800006b0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x1130f42f501532b5 + 800006b4: 000abf83 ld x31,0(x21) + 800006b8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xc4966b2ea6a4c1a0 + 800006bc: 000ab803 ld x16,0(x21) + 800006c0: 008a8a93 addi x21,x21,8 + +00000000800006c4 : +Zbkb_ror_cg_cp_rs1_b31: + ror x2, x31, x16 # perform operation + 800006c4: 610fd133 ror x2,x31,x16 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkb_ror_cg_cp_rs1_b31, Zbkb_ror_cg_cp_rs1_b31_str) + 800006c8: 00063203 ld x4,0(x12) + 800006cc: 00220c63 beq x4,x2,800006e4 + 800006d0: 630072ef jal x5,80007d00 + 800006d4: 800006c4 .word 0x800006c4 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 8000ea6b .word 0x8000ea6b + 800006e0: 00000000 .word 0x00000000 + 800006e4: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0xf0877e2d3a2a2c4b + 800006e8: 000ab183 ld x3,0(x21) + 800006ec: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0xfd17be56bbc51f67 + 800006f0: 000ab003 ld x0,0(x21) + 800006f4: 008a8a93 addi x21,x21,8 + +00000000800006f8 : +Zbkb_ror_cg_cp_rs2_b0: + ror x31, x3, x0 # perform operation + 800006f8: 6001dfb3 ror x31,x3,x0 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkb_ror_cg_cp_rs2_b0, Zbkb_ror_cg_cp_rs2_b0_str) + 800006fc: 00063203 ld x4,0(x12) + 80000700: 01f20c63 beq x4,x31,80000718 + 80000704: 5fc072ef jal x5,80007d00 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 8000ea9d .word 0x8000ea9d + 80000714: 00000000 .word 0x00000000 + 80000718: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x691188fc49ec1f67 + 8000071c: 000ab803 ld x16,0(x21) + 80000720: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xec64a3adc479e361 + 80000724: 000ab083 ld x1,0(x21) + 80000728: 008a8a93 addi x21,x21,8 + +000000008000072c : +Zbkb_ror_cg_cp_rs2_b1: + ror x0, x16, x1 # perform operation + 8000072c: 60185033 ror x0,x16,x1 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkb_ror_cg_cp_rs2_b1, Zbkb_ror_cg_cp_rs2_b1_str) + 80000730: 00063203 ld x4,0(x12) + 80000734: 00020c63 beq x4,x0,8000074c + 80000738: 5c8072ef jal x5,80007d00 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000eace .word 0x8000eace + 80000748: 00000000 .word 0x00000000 + 8000074c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x57104adcbec4e1f1 + 80000750: 000abd03 ld x26,0(x21) + 80000754: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xaacfe9439d6b6d50 + 80000758: 000ab103 ld x2,0(x21) + 8000075c: 008a8a93 addi x21,x21,8 + +0000000080000760 : +Zbkb_ror_cg_cp_rs2_b2: + ror x14, x26, x2 # perform operation + 80000760: 602d5733 ror x14,x26,x2 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zbkb_ror_cg_cp_rs2_b2, Zbkb_ror_cg_cp_rs2_b2_str) + 80000764: 00063203 ld x4,0(x12) + 80000768: 00e20c63 beq x4,x14,80000780 + 8000076c: 594072ef jal x5,80007d00 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eaff .word 0x8000eaff + 8000077c: 00000000 .word 0x00000000 + 80000780: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xfdb219d9f8cf25fe + 80000784: 000ab583 ld x11,0(x21) + 80000788: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0x9683f14e4b008277 + 8000078c: 000ab183 ld x3,0(x21) + 80000790: 008a8a93 addi x21,x21,8 + +0000000080000794 : +Zbkb_ror_cg_cp_rs2_b3: + ror x19, x11, x3 # perform operation + 80000794: 6035d9b3 ror x19,x11,x3 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkb_ror_cg_cp_rs2_b3, Zbkb_ror_cg_cp_rs2_b3_str) + 80000798: 00063203 ld x4,0(x12) + 8000079c: 01320c63 beq x4,x19,800007b4 + 800007a0: 560072ef jal x5,80007d00 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb30 .word 0x8000eb30 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007bc: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xe5ee3fb5b2b82754 + 800007c0: 000abe83 ld x29,0(x21) + 800007c4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xa4be445733562fc8 + 800007c8: 000ab203 ld x4,0(x21) + 800007cc: 008a8a93 addi x21,x21,8 + +00000000800007d0 : +Zbkb_ror_cg_cp_rs2_b4: + ror x9, x29, x4 # perform operation + 800007d0: 604ed4b3 ror x9,x29,x4 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkb_ror_cg_cp_rs2_b4, Zbkb_ror_cg_cp_rs2_b4_str) + 800007d4: 00063683 ld x13,0(x12) + 800007d8: 00968c63 beq x13,x9,800007f0 + 800007dc: 5640776f jal x14,80007d40 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000eb61 .word 0x8000eb61 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x2cc02c95f742b867 + 800007f4: 000abb03 ld x22,0(x21) + 800007f8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x2ac3aeb6c21fdc3b + 800007fc: 000ab283 ld x5,0(x21) + 80000800: 008a8a93 addi x21,x21,8 + +0000000080000804 : +Zbkb_ror_cg_cp_rs2_b5: + ror x20, x22, x5 # perform operation + 80000804: 605b5a33 ror x20,x22,x5 + # Check if x20 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x20, Zbkb_ror_cg_cp_rs2_b5, Zbkb_ror_cg_cp_rs2_b5_str) + 80000808: 00063683 ld x13,0(x12) + 8000080c: 01468c63 beq x13,x20,80000824 + 80000810: 5300776f jal x14,80007d40 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000eb92 .word 0x8000eb92 + 80000820: 00000000 .word 0x00000000 + 80000824: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xd5c486d28d4922be + 80000828: 000ab803 ld x16,0(x21) + 8000082c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x16373756bd35ff52 + 80000830: 000ab303 ld x6,0(x21) + 80000834: 008a8a93 addi x21,x21,8 + +0000000080000838 : +Zbkb_ror_cg_cp_rs2_b6: + ror x22, x16, x6 # perform operation + 80000838: 60685b33 ror x22,x16,x6 + # Check if x22 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x22, Zbkb_ror_cg_cp_rs2_b6, Zbkb_ror_cg_cp_rs2_b6_str) + 8000083c: 00063683 ld x13,0(x12) + 80000840: 01668c63 beq x13,x22,80000858 + 80000844: 4fc0776f jal x14,80007d40 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ebc3 .word 0x8000ebc3 + 80000854: 00000000 .word 0x00000000 + 80000858: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x2d88db717b832d5e + 8000085c: 000abc83 ld x25,0(x21) + 80000860: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xc8a9ef603442a46a + 80000864: 000ab383 ld x7,0(x21) + 80000868: 008a8a93 addi x21,x21,8 + +000000008000086c : +Zbkb_ror_cg_cp_rs2_b7: + ror x30, x25, x7 # perform operation + 8000086c: 607cdf33 ror x30,x25,x7 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zbkb_ror_cg_cp_rs2_b7, Zbkb_ror_cg_cp_rs2_b7_str) + 80000870: 00063683 ld x13,0(x12) + 80000874: 01e68c63 beq x13,x30,8000088c + 80000878: 4c80776f jal x14,80007d40 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000ebf4 .word 0x8000ebf4 + 80000888: 00000000 .word 0x00000000 + 8000088c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xe03c0367c7011466 + 80000890: 000ab783 ld x15,0(x21) + 80000894: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x2471d88512eb5a8f + 80000898: 000ab403 ld x8,0(x21) + 8000089c: 008a8a93 addi x21,x21,8 + +00000000800008a0 : +Zbkb_ror_cg_cp_rs2_b8: + ror x26, x15, x8 # perform operation + 800008a0: 6087dd33 ror x26,x15,x8 + # Check if x26 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x26, Zbkb_ror_cg_cp_rs2_b8, Zbkb_ror_cg_cp_rs2_b8_str) + 800008a4: 00063683 ld x13,0(x12) + 800008a8: 01a68c63 beq x13,x26,800008c0 + 800008ac: 4940776f jal x14,80007d40 + 800008b0: 800008a0 .word 0x800008a0 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 8000ec25 .word 0x8000ec25 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x5b178b73bc53a008 + 800008c4: 000abc03 ld x24,0(x21) + 800008c8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xef3ba13c6e8b0a7f + 800008cc: 000ab483 ld x9,0(x21) + 800008d0: 008a8a93 addi x21,x21,8 + +00000000800008d4 : +Zbkb_ror_cg_cp_rs2_b9: + ror x0, x24, x9 # perform operation + 800008d4: 609c5033 ror x0,x24,x9 + # Check if x0 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x0, Zbkb_ror_cg_cp_rs2_b9, Zbkb_ror_cg_cp_rs2_b9_str) + 800008d8: 00063683 ld x13,0(x12) + 800008dc: 00068c63 beq x13,x0,800008f4 + 800008e0: 4600776f jal x14,80007d40 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 8000ec56 .word 0x8000ec56 + 800008f0: 00000000 .word 0x00000000 + 800008f4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xa335e17e05649e52 + 800008f8: 000ab283 ld x5,0(x21) + 800008fc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x7667a5447c351f9c + 80000900: 000ab503 ld x10,0(x21) + 80000904: 008a8a93 addi x21,x21,8 + +0000000080000908 : +Zbkb_ror_cg_cp_rs2_b10: + ror x18, x5, x10 # perform operation + 80000908: 60a2d933 ror x18,x5,x10 + # Check if x18 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x18, Zbkb_ror_cg_cp_rs2_b10, Zbkb_ror_cg_cp_rs2_b10_str) + 8000090c: 00063683 ld x13,0(x12) + 80000910: 01268c63 beq x13,x18,80000928 + 80000914: 42c0776f jal x14,80007d40 + 80000918: 80000908 .word 0x80000908 + 8000091c: 00000000 .word 0x00000000 + 80000920: 8000ec87 .word 0x8000ec87 + 80000924: 00000000 .word 0x00000000 + 80000928: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xe9b65d0a58b066d6 + 8000092c: 000abf83 ld x31,0(x21) + 80000930: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x6fc663f0d2842334 + 80000934: 000ab583 ld x11,0(x21) + 80000938: 008a8a93 addi x21,x21,8 + +000000008000093c : +Zbkb_ror_cg_cp_rs2_b11: + ror x5, x31, x11 # perform operation + 8000093c: 60bfd2b3 ror x5,x31,x11 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zbkb_ror_cg_cp_rs2_b11, Zbkb_ror_cg_cp_rs2_b11_str) + 80000940: 00063683 ld x13,0(x12) + 80000944: 00568c63 beq x13,x5,8000095c + 80000948: 3f80776f jal x14,80007d40 + 8000094c: 8000093c .word 0x8000093c + 80000950: 00000000 .word 0x00000000 + 80000954: 8000ecb9 .word 0x8000ecb9 + 80000958: 00000000 .word 0x00000000 + 8000095c: 00860613 addi x12,x12,8 + + mv x25, x12 # switch signature pointer register to avoid conflict with test + 80000960: 00060c93 addi x25,x12,0 +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xac9d851f81bf41a0 + 80000964: 000abe03 ld x28,0(x21) + 80000968: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x964f999c19841e8d + 8000096c: 000ab603 ld x12,0(x21) + 80000970: 008a8a93 addi x21,x21,8 + +0000000080000974 : +Zbkb_ror_cg_cp_rs2_b12: + ror x23, x28, x12 # perform operation + 80000974: 60ce5bb3 ror x23,x28,x12 + # Check if x23 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x23, Zbkb_ror_cg_cp_rs2_b12, Zbkb_ror_cg_cp_rs2_b12_str) + 80000978: 000cb683 ld x13,0(x25) + 8000097c: 01768c63 beq x13,x23,80000994 + 80000980: 3c00776f jal x14,80007d40 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000eceb .word 0x8000eceb + 80000990: 00000000 .word 0x00000000 + 80000994: 008c8c93 addi x25,x25,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000998: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000099c: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x4a82e82c4b45c145 + 800009a0: 000ab003 ld x0,0(x21) + 800009a4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xe3c40999b947a3e0 + 800009a8: 000ab683 ld x13,0(x21) + 800009ac: 008a8a93 addi x21,x21,8 + +00000000800009b0 : +Zbkb_ror_cg_cp_rs2_b13: + ror x22, x0, x13 # perform operation + 800009b0: 60d05b33 ror x22,x0,x13 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_ror_cg_cp_rs2_b13, Zbkb_ror_cg_cp_rs2_b13_str) + 800009b4: 000cb383 ld x7,0(x25) + 800009b8: 01638c63 beq x7,x22,800009d0 + 800009bc: 35c0746f jal x8,80007d18 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 8000ed1d .word 0x8000ed1d + 800009cc: 00000000 .word 0x00000000 + 800009d0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x48bf1e9bfdaff80c + 800009d4: 000abc03 ld x24,0(x21) + 800009d8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xe4cebd6573431c79 + 800009dc: 000ab703 ld x14,0(x21) + 800009e0: 008a8a93 addi x21,x21,8 + +00000000800009e4 : +Zbkb_ror_cg_cp_rs2_b14: + ror x4, x24, x14 # perform operation + 800009e4: 60ec5233 ror x4,x24,x14 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zbkb_ror_cg_cp_rs2_b14, Zbkb_ror_cg_cp_rs2_b14_str) + 800009e8: 000cb383 ld x7,0(x25) + 800009ec: 00438c63 beq x7,x4,80000a04 + 800009f0: 3280746f jal x8,80007d18 + 800009f4: 800009e4 .word 0x800009e4 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 8000ed4f .word 0x8000ed4f + 80000a00: 00000000 .word 0x00000000 + 80000a04: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xf78d0b528e032c7c + 80000a08: 000abf83 ld x31,0(x21) + 80000a0c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x75a0a2b7b0b4300a + 80000a10: 000ab783 ld x15,0(x21) + 80000a14: 008a8a93 addi x21,x21,8 + +0000000080000a18 : +Zbkb_ror_cg_cp_rs2_b15: + ror x22, x31, x15 # perform operation + 80000a18: 60ffdb33 ror x22,x31,x15 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_ror_cg_cp_rs2_b15, Zbkb_ror_cg_cp_rs2_b15_str) + 80000a1c: 000cb383 ld x7,0(x25) + 80000a20: 01638c63 beq x7,x22,80000a38 + 80000a24: 2f40746f jal x8,80007d18 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 8000ed81 .word 0x8000ed81 + 80000a34: 00000000 .word 0x00000000 + 80000a38: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x25692262c6e72731 + 80000a3c: 000abe83 ld x29,0(x21) + 80000a40: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x4c1f6d757db141a4 + 80000a44: 000ab803 ld x16,0(x21) + 80000a48: 008a8a93 addi x21,x21,8 + +0000000080000a4c : +Zbkb_ror_cg_cp_rs2_b16: + ror x18, x29, x16 # perform operation + 80000a4c: 610ed933 ror x18,x29,x16 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zbkb_ror_cg_cp_rs2_b16, Zbkb_ror_cg_cp_rs2_b16_str) + 80000a50: 000cb383 ld x7,0(x25) + 80000a54: 01238c63 beq x7,x18,80000a6c + 80000a58: 2c00746f jal x8,80007d18 + 80000a5c: 80000a4c .word 0x80000a4c + 80000a60: 00000000 .word 0x00000000 + 80000a64: 8000edb3 .word 0x8000edb3 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x2bd0814b0598dca5 + 80000a70: 000ab583 ld x11,0(x21) + 80000a74: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xe749fd59750c58cb + 80000a78: 000ab883 ld x17,0(x21) + 80000a7c: 008a8a93 addi x21,x21,8 + +0000000080000a80 : +Zbkb_ror_cg_cp_rs2_b17: + ror x30, x11, x17 # perform operation + 80000a80: 6115df33 ror x30,x11,x17 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zbkb_ror_cg_cp_rs2_b17, Zbkb_ror_cg_cp_rs2_b17_str) + 80000a84: 000cb383 ld x7,0(x25) + 80000a88: 01e38c63 beq x7,x30,80000aa0 + 80000a8c: 28c0746f jal x8,80007d18 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000ede5 .word 0x8000ede5 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x673354ea59be7d74 + 80000aa4: 000abb03 ld x22,0(x21) + 80000aa8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x41efbdb7d19e4a07 + 80000aac: 000ab903 ld x18,0(x21) + 80000ab0: 008a8a93 addi x21,x21,8 + +0000000080000ab4 : +Zbkb_ror_cg_cp_rs2_b18: + ror x28, x22, x18 # perform operation + 80000ab4: 612b5e33 ror x28,x22,x18 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zbkb_ror_cg_cp_rs2_b18, Zbkb_ror_cg_cp_rs2_b18_str) + 80000ab8: 000cb383 ld x7,0(x25) + 80000abc: 01c38c63 beq x7,x28,80000ad4 + 80000ac0: 2580746f jal x8,80007d18 + 80000ac4: 80000ab4 .word 0x80000ab4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 8000ee17 .word 0x8000ee17 + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x8df9292e05eb7658 + 80000ad8: 000aba03 ld x20,0(x21) + 80000adc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xcd6066dfe9139926 + 80000ae0: 000ab983 ld x19,0(x21) + 80000ae4: 008a8a93 addi x21,x21,8 + +0000000080000ae8 : +Zbkb_ror_cg_cp_rs2_b19: + ror x16, x20, x19 # perform operation + 80000ae8: 613a5833 ror x16,x20,x19 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zbkb_ror_cg_cp_rs2_b19, Zbkb_ror_cg_cp_rs2_b19_str) + 80000aec: 000cb383 ld x7,0(x25) + 80000af0: 01038c63 beq x7,x16,80000b08 + 80000af4: 2240746f jal x8,80007d18 + 80000af8: 80000ae8 .word 0x80000ae8 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 8000ee49 .word 0x8000ee49 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0xb1382d39bb1194d2 + 80000b0c: 000ab203 ld x4,0(x21) + 80000b10: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x94c967b26900957d + 80000b14: 000aba03 ld x20,0(x21) + 80000b18: 008a8a93 addi x21,x21,8 + +0000000080000b1c : +Zbkb_ror_cg_cp_rs2_b20: + ror x31, x4, x20 # perform operation + 80000b1c: 61425fb3 ror x31,x4,x20 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zbkb_ror_cg_cp_rs2_b20, Zbkb_ror_cg_cp_rs2_b20_str) + 80000b20: 000cb383 ld x7,0(x25) + 80000b24: 01f38c63 beq x7,x31,80000b3c + 80000b28: 1f00746f jal x8,80007d18 + 80000b2c: 80000b1c .word 0x80000b1c + 80000b30: 00000000 .word 0x00000000 + 80000b34: 8000ee7b .word 0x8000ee7b + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 008c8c93 addi x25,x25,8 + + mv x29, x21 # switch data pointer register to avoid conflict with test + 80000b40: 000a8e93 addi x29,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x56ce1abfb494b59f + 80000b44: 000ebe03 ld x28,0(x29) + 80000b48: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs2: x21 = 0xadb11a70a9a3d130 + 80000b4c: 000eba83 ld x21,0(x29) + 80000b50: 008e8e93 addi x29,x29,8 + +0000000080000b54 : +Zbkb_ror_cg_cp_rs2_b21: + ror x2, x28, x21 # perform operation + 80000b54: 615e5133 ror x2,x28,x21 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zbkb_ror_cg_cp_rs2_b21, Zbkb_ror_cg_cp_rs2_b21_str) + 80000b58: 000cb383 ld x7,0(x25) + 80000b5c: 00238c63 beq x7,x2,80000b74 + 80000b60: 1b80746f jal x8,80007d18 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000eead .word 0x8000eead + 80000b70: 00000000 .word 0x00000000 + 80000b74: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xd6a58f901e827ee6 + 80000b78: 000eba83 ld x21,0(x29) + 80000b7c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0x22578df7a77c4e3b + 80000b80: 000ebb03 ld x22,0(x29) + 80000b84: 008e8e93 addi x29,x29,8 + +0000000080000b88 : +Zbkb_ror_cg_cp_rs2_b22: + ror x0, x21, x22 # perform operation + 80000b88: 616ad033 ror x0,x21,x22 + # Check if x0 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x0, Zbkb_ror_cg_cp_rs2_b22, Zbkb_ror_cg_cp_rs2_b22_str) + 80000b8c: 000cb383 ld x7,0(x25) + 80000b90: 00038c63 beq x7,x0,80000ba8 + 80000b94: 1840746f jal x8,80007d18 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000eedf .word 0x8000eedf + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xb33ae1f9ca19c556 + 80000bac: 000eb503 ld x10,0(x29) + 80000bb0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0xf47d6d976c30356d + 80000bb4: 000ebb83 ld x23,0(x29) + 80000bb8: 008e8e93 addi x29,x29,8 + +0000000080000bbc : +Zbkb_ror_cg_cp_rs2_b23: + ror x9, x10, x23 # perform operation + 80000bbc: 617554b3 ror x9,x10,x23 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zbkb_ror_cg_cp_rs2_b23, Zbkb_ror_cg_cp_rs2_b23_str) + 80000bc0: 000cb383 ld x7,0(x25) + 80000bc4: 00938c63 beq x7,x9,80000bdc + 80000bc8: 1500746f jal x8,80007d18 + 80000bcc: 80000bbc .word 0x80000bbc + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 8000ef11 .word 0x8000ef11 + 80000bd8: 00000000 .word 0x00000000 + 80000bdc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xafba46cf515abc30 + 80000be0: 000ebe03 ld x28,0(x29) + 80000be4: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x0fe247fcfa95a629 + 80000be8: 000ebc03 ld x24,0(x29) + 80000bec: 008e8e93 addi x29,x29,8 + +0000000080000bf0 : +Zbkb_ror_cg_cp_rs2_b24: + ror x3, x28, x24 # perform operation + 80000bf0: 618e51b3 ror x3,x28,x24 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zbkb_ror_cg_cp_rs2_b24, Zbkb_ror_cg_cp_rs2_b24_str) + 80000bf4: 000cb383 ld x7,0(x25) + 80000bf8: 00338c63 beq x7,x3,80000c10 + 80000bfc: 11c0746f jal x8,80007d18 + 80000c00: 80000bf0 .word 0x80000bf0 + 80000c04: 00000000 .word 0x00000000 + 80000c08: 8000ef43 .word 0x8000ef43 + 80000c0c: 00000000 .word 0x00000000 + 80000c10: 008c8c93 addi x25,x25,8 + + mv x18, x25 # switch signature pointer register to avoid conflict with test + 80000c14: 000c8913 addi x18,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x1) # load rs1: x1 = 0x5f5bdb3118904df6 + 80000c18: 000eb083 ld x1,0(x29) + 80000c1c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0xe7dc95ea022ffe1d + 80000c20: 000ebc83 ld x25,0(x29) + 80000c24: 008e8e93 addi x29,x29,8 + +0000000080000c28 : +Zbkb_ror_cg_cp_rs2_b25: + ror x2, x1, x25 # perform operation + 80000c28: 6190d133 ror x2,x1,x25 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zbkb_ror_cg_cp_rs2_b25, Zbkb_ror_cg_cp_rs2_b25_str) + 80000c2c: 00093383 ld x7,0(x18) + 80000c30: 00238c63 beq x7,x2,80000c48 + 80000c34: 0e40746f jal x8,80007d18 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000ef75 .word 0x8000ef75 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0xaddbbeedc4d77e70 + 80000c4c: 000eb803 ld x16,0(x29) + 80000c50: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xe2f3e3cb9c5009bd + 80000c54: 000ebd03 ld x26,0(x29) + 80000c58: 008e8e93 addi x29,x29,8 + +0000000080000c5c : +Zbkb_ror_cg_cp_rs2_b26: + ror x9, x16, x26 # perform operation + 80000c5c: 61a854b3 ror x9,x16,x26 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zbkb_ror_cg_cp_rs2_b26, Zbkb_ror_cg_cp_rs2_b26_str) + 80000c60: 00093383 ld x7,0(x18) + 80000c64: 00938c63 beq x7,x9,80000c7c + 80000c68: 0b00746f jal x8,80007d18 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000efa7 .word 0x8000efa7 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0x3cd4f668e57f012d + 80000c80: 000eb503 ld x10,0(x29) + 80000c84: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x27bb28e2b186abce + 80000c88: 000ebd83 ld x27,0(x29) + 80000c8c: 008e8e93 addi x29,x29,8 + +0000000080000c90 : +Zbkb_ror_cg_cp_rs2_b27: + ror x15, x10, x27 # perform operation + 80000c90: 61b557b3 ror x15,x10,x27 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zbkb_ror_cg_cp_rs2_b27, Zbkb_ror_cg_cp_rs2_b27_str) + 80000c94: 00093383 ld x7,0(x18) + 80000c98: 00f38c63 beq x7,x15,80000cb0 + 80000c9c: 07c0746f jal x8,80007d18 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000efd9 .word 0x8000efd9 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x523bcdecc89f3a49 + 80000cb4: 000eb783 ld x15,0(x29) + 80000cb8: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0x738d0d7f7d538884 + 80000cbc: 000ebe03 ld x28,0(x29) + 80000cc0: 008e8e93 addi x29,x29,8 + +0000000080000cc4 : +Zbkb_ror_cg_cp_rs2_b28: + ror x24, x15, x28 # perform operation + 80000cc4: 61c7dc33 ror x24,x15,x28 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zbkb_ror_cg_cp_rs2_b28, Zbkb_ror_cg_cp_rs2_b28_str) + 80000cc8: 00093383 ld x7,0(x18) + 80000ccc: 01838c63 beq x7,x24,80000ce4 + 80000cd0: 0480746f jal x8,80007d18 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f00b .word 0x8000f00b + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00890913 addi x18,x18,8 + + mv x11, x29 # switch data pointer register to avoid conflict with test + 80000ce8: 000e8593 addi x11,x29,0 +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x005b2bdbccf8987e + 80000cec: 0005b303 ld x6,0(x11) + 80000cf0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x0f75be6945b2ca9e + 80000cf4: 0005be83 ld x29,0(x11) + 80000cf8: 00858593 addi x11,x11,8 + +0000000080000cfc : +Zbkb_ror_cg_cp_rs2_b29: + ror x23, x6, x29 # perform operation + 80000cfc: 61d35bb3 ror x23,x6,x29 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zbkb_ror_cg_cp_rs2_b29, Zbkb_ror_cg_cp_rs2_b29_str) + 80000d00: 00093383 ld x7,0(x18) + 80000d04: 01738c63 beq x7,x23,80000d1c + 80000d08: 0100746f jal x8,80007d18 + 80000d0c: 80000cfc .word 0x80000cfc + 80000d10: 00000000 .word 0x00000000 + 80000d14: 8000f03d .word 0x8000f03d + 80000d18: 00000000 .word 0x00000000 + 80000d1c: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x4c60f454a22b8061 + 80000d20: 0005be83 ld x29,0(x11) + 80000d24: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x1b0844df2bc666fc + 80000d28: 0005bf03 ld x30,0(x11) + 80000d2c: 00858593 addi x11,x11,8 + +0000000080000d30 : +Zbkb_ror_cg_cp_rs2_b30: + ror x22, x29, x30 # perform operation + 80000d30: 61eedb33 ror x22,x29,x30 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zbkb_ror_cg_cp_rs2_b30, Zbkb_ror_cg_cp_rs2_b30_str) + 80000d34: 00093383 ld x7,0(x18) + 80000d38: 01638c63 beq x7,x22,80000d50 + 80000d3c: 7dd0646f jal x8,80007d18 + 80000d40: 80000d30 .word 0x80000d30 + 80000d44: 00000000 .word 0x00000000 + 80000d48: 8000f06f .word 0x8000f06f + 80000d4c: 00000000 .word 0x00000000 + 80000d50: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x2af5cf9225d9a9dc + 80000d54: 0005b183 ld x3,0(x11) + 80000d58: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x70fb87b3920373d2 + 80000d5c: 0005bf83 ld x31,0(x11) + 80000d60: 00858593 addi x11,x11,8 + +0000000080000d64 : +Zbkb_ror_cg_cp_rs2_b31: + ror x9, x3, x31 # perform operation + 80000d64: 61f1d4b3 ror x9,x3,x31 + # Check if x9 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x9, Zbkb_ror_cg_cp_rs2_b31, Zbkb_ror_cg_cp_rs2_b31_str) + 80000d68: 00093383 ld x7,0(x18) + 80000d6c: 00938c63 beq x7,x9,80000d84 + 80000d70: 7a90646f jal x8,80007d18 + 80000d74: 80000d64 .word 0x80000d64 + 80000d78: 00000000 .word 0x00000000 + 80000d7c: 8000f0a1 .word 0x8000f0a1 + 80000d80: 00000000 .word 0x00000000 + 80000d84: 00890913 addi x18,x18,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x2ddf048ab22f3816 + 80000d88: 0005bb83 ld x23,0(x11) + 80000d8c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs2: x14 = 0xd3a825a621ef89ed + 80000d90: 0005b703 ld x14,0(x11) + 80000d94: 00858593 addi x11,x11,8 + +0000000080000d98 : +Zbkb_ror_cg_cp_rd_b0: + ror x0, x23, x14 # perform operation + 80000d98: 60ebd033 ror x0,x23,x14 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zbkb_ror_cg_cp_rd_b0, Zbkb_ror_cg_cp_rd_b0_str) + 80000d9c: 00093383 ld x7,0(x18) + 80000da0: 00038c63 beq x7,x0,80000db8 + 80000da4: 7750646f jal x8,80007d18 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000f0d3 .word 0x8000f0d3 + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x3a53d9d1a3dbe651 + 80000dbc: 0005b703 ld x14,0(x11) + 80000dc0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs2: x12 = 0x23130d90ece20177 + 80000dc4: 0005b603 ld x12,0(x11) + 80000dc8: 00858593 addi x11,x11,8 + +0000000080000dcc : +Zbkb_ror_cg_cp_rd_b1: + ror x1, x14, x12 # perform operation + 80000dcc: 60c750b3 ror x1,x14,x12 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zbkb_ror_cg_cp_rd_b1, Zbkb_ror_cg_cp_rd_b1_str) + 80000dd0: 00093383 ld x7,0(x18) + 80000dd4: 00138c63 beq x7,x1,80000dec + 80000dd8: 7410646f jal x8,80007d18 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 8000f103 .word 0x8000f103 + 80000de8: 00000000 .word 0x00000000 + 80000dec: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x4d90f0ec01c58acc + 80000df0: 0005ba03 ld x20,0(x11) + 80000df4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0xb757413778a88ffa + 80000df8: 0005bd83 ld x27,0(x11) + 80000dfc: 00858593 addi x11,x11,8 + +0000000080000e00 : +Zbkb_ror_cg_cp_rd_b2: + ror x2, x20, x27 # perform operation + 80000e00: 61ba5133 ror x2,x20,x27 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zbkb_ror_cg_cp_rd_b2, Zbkb_ror_cg_cp_rd_b2_str) + 80000e04: 00093383 ld x7,0(x18) + 80000e08: 00238c63 beq x7,x2,80000e20 + 80000e0c: 70d0646f jal x8,80007d18 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 8000f133 .word 0x8000f133 + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x88396feca537ce3f + 80000e24: 0005b803 ld x16,0(x11) + 80000e28: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0xfd5d5b5f65aab797 + 80000e2c: 0005b083 ld x1,0(x11) + 80000e30: 00858593 addi x11,x11,8 + +0000000080000e34 : +Zbkb_ror_cg_cp_rd_b3: + ror x3, x16, x1 # perform operation + 80000e34: 601851b3 ror x3,x16,x1 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zbkb_ror_cg_cp_rd_b3, Zbkb_ror_cg_cp_rd_b3_str) + 80000e38: 00093383 ld x7,0(x18) + 80000e3c: 00338c63 beq x7,x3,80000e54 + 80000e40: 6d90646f jal x8,80007d18 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 8000f163 .word 0x8000f163 + 80000e50: 00000000 .word 0x00000000 + 80000e54: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0x8c33a44e139bf55d + 80000e58: 0005b783 ld x15,0(x11) + 80000e5c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0x16ec89db9d33b3dc + 80000e60: 0005bf03 ld x30,0(x11) + 80000e64: 00858593 addi x11,x11,8 + +0000000080000e68 : +Zbkb_ror_cg_cp_rd_b4: + ror x4, x15, x30 # perform operation + 80000e68: 61e7d233 ror x4,x15,x30 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zbkb_ror_cg_cp_rd_b4, Zbkb_ror_cg_cp_rd_b4_str) + 80000e6c: 00093383 ld x7,0(x18) + 80000e70: 00438c63 beq x7,x4,80000e88 + 80000e74: 6a50646f jal x8,80007d18 + 80000e78: 80000e68 .word 0x80000e68 + 80000e7c: 00000000 .word 0x00000000 + 80000e80: 8000f193 .word 0x8000f193 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0x69576d593392db9f + 80000e8c: 0005bc83 ld x25,0(x11) + 80000e90: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xec0da8d9fada987c + 80000e94: 0005bd03 ld x26,0(x11) + 80000e98: 00858593 addi x11,x11,8 + +0000000080000e9c : +Zbkb_ror_cg_cp_rd_b5: + ror x5, x25, x26 # perform operation + 80000e9c: 61acd2b3 ror x5,x25,x26 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zbkb_ror_cg_cp_rd_b5, Zbkb_ror_cg_cp_rd_b5_str) + 80000ea0: 00093383 ld x7,0(x18) + 80000ea4: 00538c63 beq x7,x5,80000ebc + 80000ea8: 6710646f jal x8,80007d18 + 80000eac: 80000e9c .word 0x80000e9c + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 8000f1c3 .word 0x8000f1c3 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0x54f31a2b7f672076 + 80000ec0: 0005be83 ld x29,0(x11) + 80000ec4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0x69660ff2aa4e07b5 + 80000ec8: 0005bc83 ld x25,0(x11) + 80000ecc: 00858593 addi x11,x11,8 + +0000000080000ed0 : +Zbkb_ror_cg_cp_rd_b6: + ror x6, x29, x25 # perform operation + 80000ed0: 619ed333 ror x6,x29,x25 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zbkb_ror_cg_cp_rd_b6, Zbkb_ror_cg_cp_rd_b6_str) + 80000ed4: 00093383 ld x7,0(x18) + 80000ed8: 00638c63 beq x7,x6,80000ef0 + 80000edc: 63d0646f jal x8,80007d18 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 8000f1f3 .word 0x8000f1f3 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 00890913 addi x18,x18,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000ef4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000ef8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xac81a6acafb56b2e + 80000efc: 0005b503 ld x10,0(x11) + 80000f00: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x9a1bd79607de343d + 80000f04: 0005b183 ld x3,0(x11) + 80000f08: 00858593 addi x11,x11,8 + +0000000080000f0c : +Zbkb_ror_cg_cp_rd_b7: + ror x7, x10, x3 # perform operation + 80000f0c: 603553b3 ror x7,x10,x3 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zbkb_ror_cg_cp_rd_b7, Zbkb_ror_cg_cp_rd_b7_str) + 80000f10: 00093203 ld x4,0(x18) + 80000f14: 00720c63 beq x4,x7,80000f2c + 80000f18: 5e9062ef jal x5,80007d00 + 80000f1c: 80000f0c .word 0x80000f0c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 8000f223 .word 0x8000f223 + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs1: x13 = 0x7e570b53645a5fce + 80000f30: 0005b683 ld x13,0(x11) + 80000f34: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0xecf73392049fcfcd + 80000f38: 0005b483 ld x9,0(x11) + 80000f3c: 00858593 addi x11,x11,8 + +0000000080000f40 : +Zbkb_ror_cg_cp_rd_b8: + ror x8, x13, x9 # perform operation + 80000f40: 6096d433 ror x8,x13,x9 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkb_ror_cg_cp_rd_b8, Zbkb_ror_cg_cp_rd_b8_str) + 80000f44: 00093203 ld x4,0(x18) + 80000f48: 00820c63 beq x4,x8,80000f60 + 80000f4c: 5b5062ef jal x5,80007d00 + 80000f50: 80000f40 .word 0x80000f40 + 80000f54: 00000000 .word 0x00000000 + 80000f58: 8000f253 .word 0x8000f253 + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xa207b8b928d4670b + 80000f64: 0005be03 ld x28,0(x11) + 80000f68: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0xf2e0276f68f26201 + 80000f6c: 0005bb83 ld x23,0(x11) + 80000f70: 00858593 addi x11,x11,8 + +0000000080000f74 : +Zbkb_ror_cg_cp_rd_b9: + ror x9, x28, x23 # perform operation + 80000f74: 617e54b3 ror x9,x28,x23 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zbkb_ror_cg_cp_rd_b9, Zbkb_ror_cg_cp_rd_b9_str) + 80000f78: 00093203 ld x4,0(x18) + 80000f7c: 00920c63 beq x4,x9,80000f94 + 80000f80: 581062ef jal x5,80007d00 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 8000f283 .word 0x8000f283 + 80000f90: 00000000 .word 0x00000000 + 80000f94: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x2c4a52778f3326c3 + 80000f98: 0005b483 ld x9,0(x11) + 80000f9c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0xf1fbb6621c49c3f6 + 80000fa0: 0005be03 ld x28,0(x11) + 80000fa4: 00858593 addi x11,x11,8 + +0000000080000fa8 : +Zbkb_ror_cg_cp_rd_b10: + ror x10, x9, x28 # perform operation + 80000fa8: 61c4d533 ror x10,x9,x28 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zbkb_ror_cg_cp_rd_b10, Zbkb_ror_cg_cp_rd_b10_str) + 80000fac: 00093203 ld x4,0(x18) + 80000fb0: 00a20c63 beq x4,x10,80000fc8 + 80000fb4: 54d062ef jal x5,80007d00 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 8000f2b3 .word 0x8000f2b3 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 00890913 addi x18,x18,8 + + mv x3, x11 # switch data pointer register to avoid conflict with test + 80000fcc: 00058193 addi x3,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xeb001ddc7eab9250 + 80000fd0: 0001be03 ld x28,0(x3) + 80000fd4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xa726df5a2b7dd865 + 80000fd8: 0001bc03 ld x24,0(x3) + 80000fdc: 00818193 addi x3,x3,8 + +0000000080000fe0 : +Zbkb_ror_cg_cp_rd_b11: + ror x11, x28, x24 # perform operation + 80000fe0: 618e55b3 ror x11,x28,x24 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zbkb_ror_cg_cp_rd_b11, Zbkb_ror_cg_cp_rd_b11_str) + 80000fe4: 00093203 ld x4,0(x18) + 80000fe8: 00b20c63 beq x4,x11,80001000 + 80000fec: 515062ef jal x5,80007d00 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 8000f2e4 .word 0x8000f2e4 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xada95f0a564042ab + 80001004: 0001b403 ld x8,0(x3) + 80001008: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x594adceec27fb0f3 + 8000100c: 0001b083 ld x1,0(x3) + 80001010: 00818193 addi x3,x3,8 + +0000000080001014 : +Zbkb_ror_cg_cp_rd_b12: + ror x12, x8, x1 # perform operation + 80001014: 60145633 ror x12,x8,x1 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zbkb_ror_cg_cp_rd_b12, Zbkb_ror_cg_cp_rd_b12_str) + 80001018: 00093203 ld x4,0(x18) + 8000101c: 00c20c63 beq x4,x12,80001034 + 80001020: 4e1062ef jal x5,80007d00 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f315 .word 0x8000f315 + 80001030: 00000000 .word 0x00000000 + 80001034: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x706d5ee311268abe + 80001038: 0001bd83 ld x27,0(x3) + 8000103c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x62d04128bdfbca5a + 80001040: 0001bc83 ld x25,0(x3) + 80001044: 00818193 addi x3,x3,8 + +0000000080001048 : +Zbkb_ror_cg_cp_rd_b13: + ror x13, x27, x25 # perform operation + 80001048: 619dd6b3 ror x13,x27,x25 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkb_ror_cg_cp_rd_b13, Zbkb_ror_cg_cp_rd_b13_str) + 8000104c: 00093203 ld x4,0(x18) + 80001050: 00d20c63 beq x4,x13,80001068 + 80001054: 4ad062ef jal x5,80007d00 + 80001058: 80001048 .word 0x80001048 + 8000105c: 00000000 .word 0x00000000 + 80001060: 8000f346 .word 0x8000f346 + 80001064: 00000000 .word 0x00000000 + 80001068: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xf960f71604c9eecf + 8000106c: 0001ba83 ld x21,0(x3) + 80001070: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x52a46eda88026b90 + 80001074: 0001b503 ld x10,0(x3) + 80001078: 00818193 addi x3,x3,8 + +000000008000107c : +Zbkb_ror_cg_cp_rd_b14: + ror x14, x21, x10 # perform operation + 8000107c: 60aad733 ror x14,x21,x10 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkb_ror_cg_cp_rd_b14, Zbkb_ror_cg_cp_rd_b14_str) + 80001080: 00093203 ld x4,0(x18) + 80001084: 00e20c63 beq x4,x14,8000109c + 80001088: 479062ef jal x5,80007d00 + 8000108c: 8000107c .word 0x8000107c + 80001090: 00000000 .word 0x00000000 + 80001094: 8000f377 .word 0x8000f377 + 80001098: 00000000 .word 0x00000000 + 8000109c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x43851df526f00bc7 + 800010a0: 0001b483 ld x9,0(x3) + 800010a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x7a8ee28213dd3d37 + 800010a8: 0001b503 ld x10,0(x3) + 800010ac: 00818193 addi x3,x3,8 + +00000000800010b0 : +Zbkb_ror_cg_cp_rd_b15: + ror x15, x9, x10 # perform operation + 800010b0: 60a4d7b3 ror x15,x9,x10 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkb_ror_cg_cp_rd_b15, Zbkb_ror_cg_cp_rd_b15_str) + 800010b4: 00093203 ld x4,0(x18) + 800010b8: 00f20c63 beq x4,x15,800010d0 + 800010bc: 445062ef jal x5,80007d00 + 800010c0: 800010b0 .word 0x800010b0 + 800010c4: 00000000 .word 0x00000000 + 800010c8: 8000f3a8 .word 0x8000f3a8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xef8ca3e83f93548c + 800010d4: 0001b883 ld x17,0(x3) + 800010d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x832eddb8b83e74f3 + 800010dc: 0001bf83 ld x31,0(x3) + 800010e0: 00818193 addi x3,x3,8 + +00000000800010e4 : +Zbkb_ror_cg_cp_rd_b16: + ror x16, x17, x31 # perform operation + 800010e4: 61f8d833 ror x16,x17,x31 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_ror_cg_cp_rd_b16, Zbkb_ror_cg_cp_rd_b16_str) + 800010e8: 00093203 ld x4,0(x18) + 800010ec: 01020c63 beq x4,x16,80001104 + 800010f0: 411062ef jal x5,80007d00 + 800010f4: 800010e4 .word 0x800010e4 + 800010f8: 00000000 .word 0x00000000 + 800010fc: 8000f3d9 .word 0x8000f3d9 + 80001100: 00000000 .word 0x00000000 + 80001104: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xe4239889d84a9b46 + 80001108: 0001b103 ld x2,0(x3) + 8000110c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x76684a6096db5bc7 + 80001110: 0001ba03 ld x20,0(x3) + 80001114: 00818193 addi x3,x3,8 + +0000000080001118 : +Zbkb_ror_cg_cp_rd_b17: + ror x17, x2, x20 # perform operation + 80001118: 614158b3 ror x17,x2,x20 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkb_ror_cg_cp_rd_b17, Zbkb_ror_cg_cp_rd_b17_str) + 8000111c: 00093203 ld x4,0(x18) + 80001120: 01120c63 beq x4,x17,80001138 + 80001124: 3dd062ef jal x5,80007d00 + 80001128: 80001118 .word 0x80001118 + 8000112c: 00000000 .word 0x00000000 + 80001130: 8000f40a .word 0x8000f40a + 80001134: 00000000 .word 0x00000000 + 80001138: 00890913 addi x18,x18,8 + + mv x19, x18 # switch signature pointer register to avoid conflict with test + 8000113c: 00090993 addi x19,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xfb3245f1ea8144e6 + 80001140: 0001b703 ld x14,0(x3) + 80001144: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x8076c5f6a8320064 + 80001148: 0001bf03 ld x30,0(x3) + 8000114c: 00818193 addi x3,x3,8 + +0000000080001150 : +Zbkb_ror_cg_cp_rd_b18: + ror x18, x14, x30 # perform operation + 80001150: 61e75933 ror x18,x14,x30 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_ror_cg_cp_rd_b18, Zbkb_ror_cg_cp_rd_b18_str) + 80001154: 0009b203 ld x4,0(x19) + 80001158: 01220c63 beq x4,x18,80001170 + 8000115c: 3a5062ef jal x5,80007d00 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 8000f43b .word 0x8000f43b + 8000116c: 00000000 .word 0x00000000 + 80001170: 00898993 addi x19,x19,8 + + mv x31, x19 # switch signature pointer register to avoid conflict with test + 80001174: 00098f93 addi x31,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xecb8f47aabc3d145 + 80001178: 0001bd83 ld x27,0(x3) + 8000117c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x070c998da39ba609 + 80001180: 0001b683 ld x13,0(x3) + 80001184: 00818193 addi x3,x3,8 + +0000000080001188 : +Zbkb_ror_cg_cp_rd_b19: + ror x19, x27, x13 # perform operation + 80001188: 60ddd9b3 ror x19,x27,x13 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_ror_cg_cp_rd_b19, Zbkb_ror_cg_cp_rd_b19_str) + 8000118c: 000fb203 ld x4,0(x31) + 80001190: 01320c63 beq x4,x19,800011a8 + 80001194: 36d062ef jal x5,80007d00 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8000f46c .word 0x8000f46c + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x8e93267f4a804ceb + 800011ac: 0001bb03 ld x22,0(x3) + 800011b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xa0d22bae38be9010 + 800011b4: 0001b083 ld x1,0(x3) + 800011b8: 00818193 addi x3,x3,8 + +00000000800011bc : +Zbkb_ror_cg_cp_rd_b20: + ror x20, x22, x1 # perform operation + 800011bc: 601b5a33 ror x20,x22,x1 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zbkb_ror_cg_cp_rd_b20, Zbkb_ror_cg_cp_rd_b20_str) + 800011c0: 000fb203 ld x4,0(x31) + 800011c4: 01420c63 beq x4,x20,800011dc + 800011c8: 339062ef jal x5,80007d00 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 8000f49d .word 0x8000f49d + 800011d8: 00000000 .word 0x00000000 + 800011dc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x52188b133893bacf + 800011e0: 0001bf03 ld x30,0(x3) + 800011e4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x909a59fb17d5651b + 800011e8: 0001bd03 ld x26,0(x3) + 800011ec: 00818193 addi x3,x3,8 + +00000000800011f0 : +Zbkb_ror_cg_cp_rd_b21: + ror x21, x30, x26 # perform operation + 800011f0: 61af5ab3 ror x21,x30,x26 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zbkb_ror_cg_cp_rd_b21, Zbkb_ror_cg_cp_rd_b21_str) + 800011f4: 000fb203 ld x4,0(x31) + 800011f8: 01520c63 beq x4,x21,80001210 + 800011fc: 305062ef jal x5,80007d00 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8000f4ce .word 0x8000f4ce + 8000120c: 00000000 .word 0x00000000 + 80001210: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x0c2f7adc8be3f984 + 80001214: 0001bb83 ld x23,0(x3) + 80001218: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x81916441be8259f3 + 8000121c: 0001b503 ld x10,0(x3) + 80001220: 00818193 addi x3,x3,8 + +0000000080001224 : +Zbkb_ror_cg_cp_rd_b22: + ror x22, x23, x10 # perform operation + 80001224: 60abdb33 ror x22,x23,x10 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zbkb_ror_cg_cp_rd_b22, Zbkb_ror_cg_cp_rd_b22_str) + 80001228: 000fb203 ld x4,0(x31) + 8000122c: 01620c63 beq x4,x22,80001244 + 80001230: 2d1062ef jal x5,80007d00 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 8000f4ff .word 0x8000f4ff + 80001240: 00000000 .word 0x00000000 + 80001244: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x125587b3e668747f + 80001248: 0001b383 ld x7,0(x3) + 8000124c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xf12d46f68eee05e0 + 80001250: 0001b683 ld x13,0(x3) + 80001254: 00818193 addi x3,x3,8 + +0000000080001258 : +Zbkb_ror_cg_cp_rd_b23: + ror x23, x7, x13 # perform operation + 80001258: 60d3dbb3 ror x23,x7,x13 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zbkb_ror_cg_cp_rd_b23, Zbkb_ror_cg_cp_rd_b23_str) + 8000125c: 000fb203 ld x4,0(x31) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 29d062ef jal x5,80007d00 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 8000f530 .word 0x8000f530 + 80001274: 00000000 .word 0x00000000 + 80001278: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xe944f6286e5f0047 + 8000127c: 0001b983 ld x19,0(x3) + 80001280: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xabb8b150ef794a2e + 80001284: 0001b883 ld x17,0(x3) + 80001288: 00818193 addi x3,x3,8 + +000000008000128c : +Zbkb_ror_cg_cp_rd_b24: + ror x24, x19, x17 # perform operation + 8000128c: 6119dc33 ror x24,x19,x17 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zbkb_ror_cg_cp_rd_b24, Zbkb_ror_cg_cp_rd_b24_str) + 80001290: 000fb203 ld x4,0(x31) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 269062ef jal x5,80007d00 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000f561 .word 0x8000f561 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xd1d66c1fce84e08f + 800012b0: 0001b403 ld x8,0(x3) + 800012b4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x044c5ce85fb58fb8 + 800012b8: 0001b003 ld x0,0(x3) + 800012bc: 00818193 addi x3,x3,8 + +00000000800012c0 : +Zbkb_ror_cg_cp_rd_b25: + ror x25, x8, x0 # perform operation + 800012c0: 60045cb3 ror x25,x8,x0 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zbkb_ror_cg_cp_rd_b25, Zbkb_ror_cg_cp_rd_b25_str) + 800012c4: 000fb203 ld x4,0(x31) + 800012c8: 01920c63 beq x4,x25,800012e0 + 800012cc: 235062ef jal x5,80007d00 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 8000f592 .word 0x8000f592 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x612f5c20265300c0 + 800012e4: 0001b903 ld x18,0(x3) + 800012e8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x4e566d4fe9dda5fa + 800012ec: 0001b003 ld x0,0(x3) + 800012f0: 00818193 addi x3,x3,8 + +00000000800012f4 : +Zbkb_ror_cg_cp_rd_b26: + ror x26, x18, x0 # perform operation + 800012f4: 60095d33 ror x26,x18,x0 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_ror_cg_cp_rd_b26, Zbkb_ror_cg_cp_rd_b26_str) + 800012f8: 000fb203 ld x4,0(x31) + 800012fc: 01a20c63 beq x4,x26,80001314 + 80001300: 201062ef jal x5,80007d00 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 8000f5c3 .word 0x8000f5c3 + 80001310: 00000000 .word 0x00000000 + 80001314: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xb3768cfc194bd469 + 80001318: 0001bc83 ld x25,0(x3) + 8000131c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x5c28c00e431a1813 + 80001320: 0001b903 ld x18,0(x3) + 80001324: 00818193 addi x3,x3,8 + +0000000080001328 : +Zbkb_ror_cg_cp_rd_b27: + ror x27, x25, x18 # perform operation + 80001328: 612cddb3 ror x27,x25,x18 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zbkb_ror_cg_cp_rd_b27, Zbkb_ror_cg_cp_rd_b27_str) + 8000132c: 000fb203 ld x4,0(x31) + 80001330: 01b20c63 beq x4,x27,80001348 + 80001334: 1cd062ef jal x5,80007d00 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 8000f5f4 .word 0x8000f5f4 + 80001344: 00000000 .word 0x00000000 + 80001348: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x210b02f32fd9cfd6 + 8000134c: 0001b503 ld x10,0(x3) + 80001350: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x4130f205afd3cdd0 + 80001354: 0001b903 ld x18,0(x3) + 80001358: 00818193 addi x3,x3,8 + +000000008000135c : +Zbkb_ror_cg_cp_rd_b28: + ror x28, x10, x18 # perform operation + 8000135c: 61255e33 ror x28,x10,x18 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_ror_cg_cp_rd_b28, Zbkb_ror_cg_cp_rd_b28_str) + 80001360: 000fb203 ld x4,0(x31) + 80001364: 01c20c63 beq x4,x28,8000137c + 80001368: 199062ef jal x5,80007d00 + 8000136c: 8000135c .word 0x8000135c + 80001370: 00000000 .word 0x00000000 + 80001374: 8000f625 .word 0x8000f625 + 80001378: 00000000 .word 0x00000000 + 8000137c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x8f106760899826b3 + 80001380: 0001b083 ld x1,0(x3) + 80001384: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xde0acda5d1783bac + 80001388: 0001ba03 ld x20,0(x3) + 8000138c: 00818193 addi x3,x3,8 + +0000000080001390 : +Zbkb_ror_cg_cp_rd_b29: + ror x29, x1, x20 # perform operation + 80001390: 6140deb3 ror x29,x1,x20 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zbkb_ror_cg_cp_rd_b29, Zbkb_ror_cg_cp_rd_b29_str) + 80001394: 000fb203 ld x4,0(x31) + 80001398: 01d20c63 beq x4,x29,800013b0 + 8000139c: 165062ef jal x5,80007d00 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000f656 .word 0x8000f656 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xe1336ac0d811bb6a + 800013b4: 0001b003 ld x0,0(x3) + 800013b8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x51e7c2cce3aa70fa + 800013bc: 0001b103 ld x2,0(x3) + 800013c0: 00818193 addi x3,x3,8 + +00000000800013c4 : +Zbkb_ror_cg_cp_rd_b30: + ror x30, x0, x2 # perform operation + 800013c4: 60205f33 ror x30,x0,x2 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zbkb_ror_cg_cp_rd_b30, Zbkb_ror_cg_cp_rd_b30_str) + 800013c8: 000fb203 ld x4,0(x31) + 800013cc: 01e20c63 beq x4,x30,800013e4 + 800013d0: 131062ef jal x5,80007d00 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 8000f687 .word 0x8000f687 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 008f8f93 addi x31,x31,8 + + mv x6, x31 # switch signature pointer register to avoid conflict with test + 800013e8: 000f8313 addi x6,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x46b64d383afb615a + 800013ec: 0001bc03 ld x24,0(x3) + 800013f0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x230674167a878db2 + 800013f4: 0001b403 ld x8,0(x3) + 800013f8: 00818193 addi x3,x3,8 + +00000000800013fc : +Zbkb_ror_cg_cp_rd_b31: + ror x31, x24, x8 # perform operation + 800013fc: 608c5fb3 ror x31,x24,x8 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cp_rd_b31, Zbkb_ror_cg_cp_rd_b31_str) + 80001400: 00033203 ld x4,0(x6) + 80001404: 01f20c63 beq x4,x31,8000141c + 80001408: 0f9062ef jal x5,80007d00 + 8000140c: 800013fc .word 0x800013fc + 80001410: 00000000 .word 0x00000000 + 80001414: 8000f6b8 .word 0x8000f6b8 + 80001418: 00000000 .word 0x00000000 + 8000141c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x0000000000000000 + 80001420: 0001ba03 ld x20,0(x3) + 80001424: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x45abed378353a89c + 80001428: 0001b903 ld x18,0(x3) + 8000142c: 00818193 addi x3,x3,8 + +0000000080001430 : +Zbkb_ror_cg_cp_rs1_edges_0x0: + ror x17, x20, x18 # perform operation + 80001430: 612a58b3 ror x17,x20,x18 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cp_rs1_edges_0x0, Zbkb_ror_cg_cp_rs1_edges_0x0_str) + 80001434: 00033203 ld x4,0(x6) + 80001438: 01120c63 beq x4,x17,80001450 + 8000143c: 0c5062ef jal x5,80007d00 + 80001440: 80001430 .word 0x80001430 + 80001444: 00000000 .word 0x00000000 + 80001448: 8000f6e9 .word 0x8000f6e9 + 8000144c: 00000000 .word 0x00000000 + 80001450: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000000000001 + 80001454: 0001b803 ld x16,0(x3) + 80001458: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xa621c4873e39f217 + 8000145c: 0001b083 ld x1,0(x3) + 80001460: 00818193 addi x3,x3,8 + +0000000080001464 : +Zbkb_ror_cg_cp_rs1_edges_0x1: + ror x2, x16, x1 # perform operation + 80001464: 60185133 ror x2,x16,x1 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cp_rs1_edges_0x1, Zbkb_ror_cg_cp_rs1_edges_0x1_str) + 80001468: 00033203 ld x4,0(x6) + 8000146c: 00220c63 beq x4,x2,80001484 + 80001470: 091062ef jal x5,80007d00 + 80001474: 80001464 .word 0x80001464 + 80001478: 00000000 .word 0x00000000 + 8000147c: 8000f721 .word 0x8000f721 + 80001480: 00000000 .word 0x00000000 + 80001484: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x0000000000000002 + 80001488: 0001b383 ld x7,0(x3) + 8000148c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0xa15a2d12dd0a4e29 + 80001490: 0001b683 ld x13,0(x3) + 80001494: 00818193 addi x3,x3,8 + +0000000080001498 : +Zbkb_ror_cg_cp_rs1_edges_0x2: + ror x19, x7, x13 # perform operation + 80001498: 60d3d9b3 ror x19,x7,x13 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cp_rs1_edges_0x2, Zbkb_ror_cg_cp_rs1_edges_0x2_str) + 8000149c: 00033203 ld x4,0(x6) + 800014a0: 01320c63 beq x4,x19,800014b8 + 800014a4: 05d062ef jal x5,80007d00 + 800014a8: 80001498 .word 0x80001498 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 8000f759 .word 0x8000f759 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x8000000000000000 + 800014bc: 0001bc03 ld x24,0(x3) + 800014c0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0xc3febc09f9be4300 + 800014c4: 0001b983 ld x19,0(x3) + 800014c8: 00818193 addi x3,x3,8 + +00000000800014cc : +Zbkb_ror_cg_cp_rs1_edges_0x8000000000000000: + ror x11, x24, x19 # perform operation + 800014cc: 613c55b3 ror x11,x24,x19 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cp_rs1_edges_0x8000000000000000, Zbkb_ror_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d0: 00033203 ld x4,0(x6) + 800014d4: 00b20c63 beq x4,x11,800014ec + 800014d8: 029062ef jal x5,80007d00 + 800014dc: 800014cc .word 0x800014cc + 800014e0: 00000000 .word 0x00000000 + 800014e4: 8000f791 .word 0x8000f791 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x8000000000000001 + 800014f0: 0001bf03 ld x30,0(x3) + 800014f4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x6be5974ac911e1d5 + 800014f8: 0001b383 ld x7,0(x3) + 800014fc: 00818193 addi x3,x3,8 + +0000000080001500 : +Zbkb_ror_cg_cp_rs1_edges_0x8000000000000001: + ror x18, x30, x7 # perform operation + 80001500: 607f5933 ror x18,x30,x7 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cp_rs1_edges_0x8000000000000001, Zbkb_ror_cg_cp_rs1_edges_0x8000000000000001_str) + 80001504: 00033203 ld x4,0(x6) + 80001508: 01220c63 beq x4,x18,80001520 + 8000150c: 7f4062ef jal x5,80007d00 + 80001510: 80001500 .word 0x80001500 + 80001514: 00000000 .word 0x00000000 + 80001518: 8000f7d9 .word 0x8000f7d9 + 8000151c: 00000000 .word 0x00000000 + 80001520: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7fffffffffffffff + 80001524: 0001bc83 ld x25,0(x3) + 80001528: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x06a8769ea7997b12 + 8000152c: 0001bb83 ld x23,0(x3) + 80001530: 00818193 addi x3,x3,8 + +0000000080001534 : +Zbkb_ror_cg_cp_rs1_edges_0x7fffffffffffffff: + ror x1, x25, x23 # perform operation + 80001534: 617cd0b3 ror x1,x25,x23 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_ror_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001538: 00033203 ld x4,0(x6) + 8000153c: 00120c63 beq x4,x1,80001554 + 80001540: 7c0062ef jal x5,80007d00 + 80001544: 80001534 .word 0x80001534 + 80001548: 00000000 .word 0x00000000 + 8000154c: 8000f821 .word 0x8000f821 + 80001550: 00000000 .word 0x00000000 + 80001554: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80001558: 0001b503 ld x10,0(x3) + 8000155c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x2b04b3e59475381b + 80001560: 0001b603 ld x12,0(x3) + 80001564: 00818193 addi x3,x3,8 + +0000000080001568 : +Zbkb_ror_cg_cp_rs1_edges_0x7ffffffffffffffe: + ror x14, x10, x12 # perform operation + 80001568: 60c55733 ror x14,x10,x12 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_ror_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 8000156c: 00033203 ld x4,0(x6) + 80001570: 00e20c63 beq x4,x14,80001588 + 80001574: 78c062ef jal x5,80007d00 + 80001578: 80001568 .word 0x80001568 + 8000157c: 00000000 .word 0x00000000 + 80001580: 8000f869 .word 0x8000f869 + 80001584: 00000000 .word 0x00000000 + 80001588: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xffffffffffffffff + 8000158c: 0001be03 ld x28,0(x3) + 80001590: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xfb22a855868a9c0a + 80001594: 0001bc83 ld x25,0(x3) + 80001598: 00818193 addi x3,x3,8 + +000000008000159c : +Zbkb_ror_cg_cp_rs1_edges_0xffffffffffffffff: + ror x23, x28, x25 # perform operation + 8000159c: 619e5bb3 ror x23,x28,x25 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_ror_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a0: 00033203 ld x4,0(x6) + 800015a4: 01720c63 beq x4,x23,800015bc + 800015a8: 758062ef jal x5,80007d00 + 800015ac: 8000159c .word 0x8000159c + 800015b0: 00000000 .word 0x00000000 + 800015b4: 8000f8b1 .word 0x8000f8b1 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xfffffffffffffffe + 800015c0: 0001b403 ld x8,0(x3) + 800015c4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xfac42fe6195d3d02 + 800015c8: 0001bd83 ld x27,0(x3) + 800015cc: 00818193 addi x3,x3,8 + +00000000800015d0 : +Zbkb_ror_cg_cp_rs1_edges_0xfffffffffffffffe: + ror x18, x8, x27 # perform operation + 800015d0: 61b45933 ror x18,x8,x27 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_ror_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d4: 00033203 ld x4,0(x6) + 800015d8: 01220c63 beq x4,x18,800015f0 + 800015dc: 724062ef jal x5,80007d00 + 800015e0: 800015d0 .word 0x800015d0 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 8000f8f9 .word 0x8000f8f9 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 800015f4: 0001b083 ld x1,0(x3) + 800015f8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0xc7fd0e490e763da9 + 800015fc: 0001bd83 ld x27,0(x3) + 80001600: 00818193 addi x3,x3,8 + +0000000080001604 : +Zbkb_ror_cg_cp_rs1_edges_0x5bbc887763ae86f2: + ror x22, x1, x27 # perform operation + 80001604: 61b0db33 ror x22,x1,x27 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_ror_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001608: 00033203 ld x4,0(x6) + 8000160c: 01620c63 beq x4,x22,80001624 + 80001610: 6f0062ef jal x5,80007d00 + 80001614: 80001604 .word 0x80001604 + 80001618: 00000000 .word 0x00000000 + 8000161c: 8000f941 .word 0x8000f941 + 80001620: 00000000 .word 0x00000000 + 80001624: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80001628: 0001be83 ld x29,0(x3) + 8000162c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x381f250d02678d41 + 80001630: 0001bb03 ld x22,0(x3) + 80001634: 00818193 addi x3,x3,8 + +0000000080001638 : +Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + ror x1, x29, x22 # perform operation + 80001638: 616ed0b3 ror x1,x29,x22 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 8000163c: 00033203 ld x4,0(x6) + 80001640: 00120c63 beq x4,x1,80001658 + 80001644: 6bc062ef jal x5,80007d00 + 80001648: 80001638 .word 0x80001638 + 8000164c: 00000000 .word 0x00000000 + 80001650: 8000f989 .word 0x8000f989 + 80001654: 00000000 .word 0x00000000 + 80001658: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x5555555555555555 + 8000165c: 0001b783 ld x15,0(x3) + 80001660: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xe007916bad1f8635 + 80001664: 0001bb83 ld x23,0(x3) + 80001668: 00818193 addi x3,x3,8 + +000000008000166c : +Zbkb_ror_cg_cp_rs1_edges_0x5555555555555555: + ror x24, x15, x23 # perform operation + 8000166c: 6177dc33 ror x24,x15,x23 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cp_rs1_edges_0x5555555555555555, Zbkb_ror_cg_cp_rs1_edges_0x5555555555555555_str) + 80001670: 00033203 ld x4,0(x6) + 80001674: 01820c63 beq x4,x24,8000168c + 80001678: 688062ef jal x5,80007d00 + 8000167c: 8000166c .word 0x8000166c + 80001680: 00000000 .word 0x00000000 + 80001684: 8000f9d1 .word 0x8000f9d1 + 80001688: 00000000 .word 0x00000000 + 8000168c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x00000000ffffffff + 80001690: 0001be03 ld x28,0(x3) + 80001694: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xaa4e68f32e0f0891 + 80001698: 0001ba03 ld x20,0(x3) + 8000169c: 00818193 addi x3,x3,8 + +00000000800016a0 : +Zbkb_ror_cg_cp_rs1_edges_0xffffffff: + ror x10, x28, x20 # perform operation + 800016a0: 614e5533 ror x10,x28,x20 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cp_rs1_edges_0xffffffff, Zbkb_ror_cg_cp_rs1_edges_0xffffffff_str) + 800016a4: 00033203 ld x4,0(x6) + 800016a8: 00a20c63 beq x4,x10,800016c0 + 800016ac: 654062ef jal x5,80007d00 + 800016b0: 800016a0 .word 0x800016a0 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 8000fa19 .word 0x8000fa19 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x00000000fffffffe + 800016c4: 0001b783 ld x15,0(x3) + 800016c8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xe727431b0527dd7a + 800016cc: 0001b503 ld x10,0(x3) + 800016d0: 00818193 addi x3,x3,8 + +00000000800016d4 : +Zbkb_ror_cg_cp_rs1_edges_0xfffffffe: + ror x30, x15, x10 # perform operation + 800016d4: 60a7df33 ror x30,x15,x10 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cp_rs1_edges_0xfffffffe, Zbkb_ror_cg_cp_rs1_edges_0xfffffffe_str) + 800016d8: 00033203 ld x4,0(x6) + 800016dc: 01e20c63 beq x4,x30,800016f4 + 800016e0: 620062ef jal x5,80007d00 + 800016e4: 800016d4 .word 0x800016d4 + 800016e8: 00000000 .word 0x00000000 + 800016ec: 8000fa59 .word 0x8000fa59 + 800016f0: 00000000 .word 0x00000000 + 800016f4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x0000000100000000 + 800016f8: 0001be03 ld x28,0(x3) + 800016fc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xbd799dcaa41d0a59 + 80001700: 0001bb03 ld x22,0(x3) + 80001704: 00818193 addi x3,x3,8 + +0000000080001708 : +Zbkb_ror_cg_cp_rs1_edges_0x100000000: + ror x2, x28, x22 # perform operation + 80001708: 616e5133 ror x2,x28,x22 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cp_rs1_edges_0x100000000, Zbkb_ror_cg_cp_rs1_edges_0x100000000_str) + 8000170c: 00033203 ld x4,0(x6) + 80001710: 00220c63 beq x4,x2,80001728 + 80001714: 5ec062ef jal x5,80007d00 + 80001718: 80001708 .word 0x80001708 + 8000171c: 00000000 .word 0x00000000 + 80001720: 8000fa99 .word 0x8000fa99 + 80001724: 00000000 .word 0x00000000 + 80001728: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x0000000100000001 + 8000172c: 0001b903 ld x18,0(x3) + 80001730: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x987599023e6ccdf3 + 80001734: 0001bf83 ld x31,0(x3) + 80001738: 00818193 addi x3,x3,8 + +000000008000173c : +Zbkb_ror_cg_cp_rs1_edges_0x100000001: + ror x22, x18, x31 # perform operation + 8000173c: 61f95b33 ror x22,x18,x31 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cp_rs1_edges_0x100000001, Zbkb_ror_cg_cp_rs1_edges_0x100000001_str) + 80001740: 00033203 ld x4,0(x6) + 80001744: 01620c63 beq x4,x22,8000175c + 80001748: 5b8062ef jal x5,80007d00 + 8000174c: 8000173c .word 0x8000173c + 80001750: 00000000 .word 0x00000000 + 80001754: 8000fada .word 0x8000fada + 80001758: 00000000 .word 0x00000000 + 8000175c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xe2cb5d77cbf77063 + 80001760: 0001b483 ld x9,0(x3) + 80001764: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x0000000000000000 + 80001768: 0001bf83 ld x31,0(x3) + 8000176c: 00818193 addi x3,x3,8 + +0000000080001770 : +Zbkb_ror_cg_cp_rs2_edges_0x0: + ror x17, x9, x31 # perform operation + 80001770: 61f4d8b3 ror x17,x9,x31 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cp_rs2_edges_0x0, Zbkb_ror_cg_cp_rs2_edges_0x0_str) + 80001774: 00033203 ld x4,0(x6) + 80001778: 01120c63 beq x4,x17,80001790 + 8000177c: 584062ef jal x5,80007d00 + 80001780: 80001770 .word 0x80001770 + 80001784: 00000000 .word 0x00000000 + 80001788: 8000fb1b .word 0x8000fb1b + 8000178c: 00000000 .word 0x00000000 + 80001790: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x5decebf0d19bab55 + 80001794: 0001bd03 ld x26,0(x3) + 80001798: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x0000000000000001 + 8000179c: 0001bc83 ld x25,0(x3) + 800017a0: 00818193 addi x3,x3,8 + +00000000800017a4 : +Zbkb_ror_cg_cp_rs2_edges_0x1: + ror x2, x26, x25 # perform operation + 800017a4: 619d5133 ror x2,x26,x25 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cp_rs2_edges_0x1, Zbkb_ror_cg_cp_rs2_edges_0x1_str) + 800017a8: 00033203 ld x4,0(x6) + 800017ac: 00220c63 beq x4,x2,800017c4 + 800017b0: 550062ef jal x5,80007d00 + 800017b4: 800017a4 .word 0x800017a4 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 8000fb54 .word 0x8000fb54 + 800017c0: 00000000 .word 0x00000000 + 800017c4: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x32fe1ec403eb13b2 + 800017c8: 0001b703 ld x14,0(x3) + 800017cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0000000000000002 + 800017d0: 0001b583 ld x11,0(x3) + 800017d4: 00818193 addi x3,x3,8 + +00000000800017d8 : +Zbkb_ror_cg_cp_rs2_edges_0x2: + ror x17, x14, x11 # perform operation + 800017d8: 60b758b3 ror x17,x14,x11 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cp_rs2_edges_0x2, Zbkb_ror_cg_cp_rs2_edges_0x2_str) + 800017dc: 00033203 ld x4,0(x6) + 800017e0: 01120c63 beq x4,x17,800017f8 + 800017e4: 51c062ef jal x5,80007d00 + 800017e8: 800017d8 .word 0x800017d8 + 800017ec: 00000000 .word 0x00000000 + 800017f0: 8000fb8d .word 0x8000fb8d + 800017f4: 00000000 .word 0x00000000 + 800017f8: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x4a1c001ceb0c52c3 + 800017fc: 0001bb03 ld x22,0(x3) + 80001800: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x8000000000000000 + 80001804: 0001b603 ld x12,0(x3) + 80001808: 00818193 addi x3,x3,8 + +000000008000180c : +Zbkb_ror_cg_cp_rs2_edges_0x8000000000000000: + ror x26, x22, x12 # perform operation + 8000180c: 60cb5d33 ror x26,x22,x12 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cp_rs2_edges_0x8000000000000000, Zbkb_ror_cg_cp_rs2_edges_0x8000000000000000_str) + 80001810: 00033203 ld x4,0(x6) + 80001814: 01a20c63 beq x4,x26,8000182c + 80001818: 4e8062ef jal x5,80007d00 + 8000181c: 8000180c .word 0x8000180c + 80001820: 00000000 .word 0x00000000 + 80001824: 8000fbc6 .word 0x8000fbc6 + 80001828: 00000000 .word 0x00000000 + 8000182c: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x67b2dbb0583450c9 + 80001830: 0001bd03 ld x26,0(x3) + 80001834: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x8000000000000001 + 80001838: 0001b503 ld x10,0(x3) + 8000183c: 00818193 addi x3,x3,8 + +0000000080001840 : +Zbkb_ror_cg_cp_rs2_edges_0x8000000000000001: + ror x20, x26, x10 # perform operation + 80001840: 60ad5a33 ror x20,x26,x10 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkb_ror_cg_cp_rs2_edges_0x8000000000000001, Zbkb_ror_cg_cp_rs2_edges_0x8000000000000001_str) + 80001844: 00033203 ld x4,0(x6) + 80001848: 01420c63 beq x4,x20,80001860 + 8000184c: 4b4062ef jal x5,80007d00 + 80001850: 80001840 .word 0x80001840 + 80001854: 00000000 .word 0x00000000 + 80001858: 8000fc0e .word 0x8000fc0e + 8000185c: 00000000 .word 0x00000000 + 80001860: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x35ec0aa24d15a7c7 + 80001864: 0001b603 ld x12,0(x3) + 80001868: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7fffffffffffffff + 8000186c: 0001b683 ld x13,0(x3) + 80001870: 00818193 addi x3,x3,8 + +0000000080001874 : +Zbkb_ror_cg_cp_rs2_edges_0x7fffffffffffffff: + ror x27, x12, x13 # perform operation + 80001874: 60d65db3 ror x27,x12,x13 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_ror_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001878: 00033203 ld x4,0(x6) + 8000187c: 01b20c63 beq x4,x27,80001894 + 80001880: 480062ef jal x5,80007d00 + 80001884: 80001874 .word 0x80001874 + 80001888: 00000000 .word 0x00000000 + 8000188c: 8000fc56 .word 0x8000fc56 + 80001890: 00000000 .word 0x00000000 + 80001894: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x07cd124155895439 + 80001898: 0001b983 ld x19,0(x3) + 8000189c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7ffffffffffffffe + 800018a0: 0001bc03 ld x24,0(x3) + 800018a4: 00818193 addi x3,x3,8 + +00000000800018a8 : +Zbkb_ror_cg_cp_rs2_edges_0x7ffffffffffffffe: + ror x7, x19, x24 # perform operation + 800018a8: 6189d3b3 ror x7,x19,x24 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_ror_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018ac: 00033203 ld x4,0(x6) + 800018b0: 00720c63 beq x4,x7,800018c8 + 800018b4: 44c062ef jal x5,80007d00 + 800018b8: 800018a8 .word 0x800018a8 + 800018bc: 00000000 .word 0x00000000 + 800018c0: 8000fc9e .word 0x8000fc9e + 800018c4: 00000000 .word 0x00000000 + 800018c8: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x604b37bff92f2e7a + 800018cc: 0001be03 ld x28,0(x3) + 800018d0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xffffffffffffffff + 800018d4: 0001b783 ld x15,0(x3) + 800018d8: 00818193 addi x3,x3,8 + +00000000800018dc : +Zbkb_ror_cg_cp_rs2_edges_0xffffffffffffffff: + ror x25, x28, x15 # perform operation + 800018dc: 60fe5cb3 ror x25,x28,x15 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_ror_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e0: 00033203 ld x4,0(x6) + 800018e4: 01920c63 beq x4,x25,800018fc + 800018e8: 418062ef jal x5,80007d00 + 800018ec: 800018dc .word 0x800018dc + 800018f0: 00000000 .word 0x00000000 + 800018f4: 8000fce6 .word 0x8000fce6 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x04c857362d1c4d20 + 80001900: 0001b583 ld x11,0(x3) + 80001904: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffffffffffe + 80001908: 0001bb83 ld x23,0(x3) + 8000190c: 00818193 addi x3,x3,8 + +0000000080001910 : +Zbkb_ror_cg_cp_rs2_edges_0xfffffffffffffffe: + ror x10, x11, x23 # perform operation + 80001910: 6175d533 ror x10,x11,x23 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_ror_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001914: 00033203 ld x4,0(x6) + 80001918: 00a20c63 beq x4,x10,80001930 + 8000191c: 3e4062ef jal x5,80007d00 + 80001920: 80001910 .word 0x80001910 + 80001924: 00000000 .word 0x00000000 + 80001928: 8000fd2e .word 0x8000fd2e + 8000192c: 00000000 .word 0x00000000 + 80001930: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x78a2be8da2a08ef4 + 80001934: 0001ba83 ld x21,0(x3) + 80001938: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 8000193c: 0001bc03 ld x24,0(x3) + 80001940: 00818193 addi x3,x3,8 + +0000000080001944 : +Zbkb_ror_cg_cp_rs2_edges_0x5bbc887763ae86f2: + ror x14, x21, x24 # perform operation + 80001944: 618ad733 ror x14,x21,x24 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_ror_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001948: 00033203 ld x4,0(x6) + 8000194c: 00e20c63 beq x4,x14,80001964 + 80001950: 3b0062ef jal x5,80007d00 + 80001954: 80001944 .word 0x80001944 + 80001958: 00000000 .word 0x00000000 + 8000195c: 8000fd76 .word 0x8000fd76 + 80001960: 00000000 .word 0x00000000 + 80001964: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0878051bfd9a4e06 + 80001968: 0001b103 ld x2,0(x3) + 8000196c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001970: 0001b883 ld x17,0(x3) + 80001974: 00818193 addi x3,x3,8 + +0000000080001978 : +Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + ror x23, x2, x17 # perform operation + 80001978: 61115bb3 ror x23,x2,x17 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 8000197c: 00033203 ld x4,0(x6) + 80001980: 01720c63 beq x4,x23,80001998 + 80001984: 37c062ef jal x5,80007d00 + 80001988: 80001978 .word 0x80001978 + 8000198c: 00000000 .word 0x00000000 + 80001990: 8000fdbe .word 0x8000fdbe + 80001994: 00000000 .word 0x00000000 + 80001998: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x9b337cace9ef33e6 + 8000199c: 0001bd83 ld x27,0(x3) + 800019a0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5555555555555555 + 800019a4: 0001be03 ld x28,0(x3) + 800019a8: 00818193 addi x3,x3,8 + +00000000800019ac : +Zbkb_ror_cg_cp_rs2_edges_0x5555555555555555: + ror x16, x27, x28 # perform operation + 800019ac: 61cdd833 ror x16,x27,x28 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cp_rs2_edges_0x5555555555555555, Zbkb_ror_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b0: 00033203 ld x4,0(x6) + 800019b4: 01020c63 beq x4,x16,800019cc + 800019b8: 348062ef jal x5,80007d00 + 800019bc: 800019ac .word 0x800019ac + 800019c0: 00000000 .word 0x00000000 + 800019c4: 8000fe06 .word 0x8000fe06 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0xe7b55977903ee91a + 800019d0: 0001b383 ld x7,0(x3) + 800019d4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x00000000ffffffff + 800019d8: 0001b703 ld x14,0(x3) + 800019dc: 00818193 addi x3,x3,8 + +00000000800019e0 : +Zbkb_ror_cg_cp_rs2_edges_0xffffffff: + ror x31, x7, x14 # perform operation + 800019e0: 60e3dfb3 ror x31,x7,x14 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cp_rs2_edges_0xffffffff, Zbkb_ror_cg_cp_rs2_edges_0xffffffff_str) + 800019e4: 00033203 ld x4,0(x6) + 800019e8: 01f20c63 beq x4,x31,80001a00 + 800019ec: 314062ef jal x5,80007d00 + 800019f0: 800019e0 .word 0x800019e0 + 800019f4: 00000000 .word 0x00000000 + 800019f8: 8000fe4e .word 0x8000fe4e + 800019fc: 00000000 .word 0x00000000 + 80001a00: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x61a8768b7ae65068 + 80001a04: 0001bd83 ld x27,0(x3) + 80001a08: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x00000000fffffffe + 80001a0c: 0001bc03 ld x24,0(x3) + 80001a10: 00818193 addi x3,x3,8 + +0000000080001a14 : +Zbkb_ror_cg_cp_rs2_edges_0xfffffffe: + ror x26, x27, x24 # perform operation + 80001a14: 618ddd33 ror x26,x27,x24 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cp_rs2_edges_0xfffffffe, Zbkb_ror_cg_cp_rs2_edges_0xfffffffe_str) + 80001a18: 00033203 ld x4,0(x6) + 80001a1c: 01a20c63 beq x4,x26,80001a34 + 80001a20: 2e0062ef jal x5,80007d00 + 80001a24: 80001a14 .word 0x80001a14 + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 8000fe8e .word 0x8000fe8e + 80001a30: 00000000 .word 0x00000000 + 80001a34: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x2b2b1bd5409f6a5b + 80001a38: 0001b683 ld x13,0(x3) + 80001a3c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0000000100000000 + 80001a40: 0001b583 ld x11,0(x3) + 80001a44: 00818193 addi x3,x3,8 + +0000000080001a48 : +Zbkb_ror_cg_cp_rs2_edges_0x100000000: + ror x31, x13, x11 # perform operation + 80001a48: 60b6dfb3 ror x31,x13,x11 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cp_rs2_edges_0x100000000, Zbkb_ror_cg_cp_rs2_edges_0x100000000_str) + 80001a4c: 00033203 ld x4,0(x6) + 80001a50: 01f20c63 beq x4,x31,80001a68 + 80001a54: 2ac062ef jal x5,80007d00 + 80001a58: 80001a48 .word 0x80001a48 + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 8000fece .word 0x8000fece + 80001a64: 00000000 .word 0x00000000 + 80001a68: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x34c93fcc85eeabed + 80001a6c: 0001bd83 ld x27,0(x3) + 80001a70: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000100000001 + 80001a74: 0001ba03 ld x20,0(x3) + 80001a78: 00818193 addi x3,x3,8 + +0000000080001a7c : +Zbkb_ror_cg_cp_rs2_edges_0x100000001: + ror x18, x27, x20 # perform operation + 80001a7c: 614dd933 ror x18,x27,x20 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cp_rs2_edges_0x100000001, Zbkb_ror_cg_cp_rs2_edges_0x100000001_str) + 80001a80: 00033203 ld x4,0(x6) + 80001a84: 01220c63 beq x4,x18,80001a9c + 80001a88: 278062ef jal x5,80007d00 + 80001a8c: 80001a7c .word 0x80001a7c + 80001a90: 00000000 .word 0x00000000 + 80001a94: 8000ff0f .word 0x8000ff0f + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000000000000 + 80001aa0: 0001b883 ld x17,0(x3) + 80001aa4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000000000000 + 80001aa8: 0001ba03 ld x20,0(x3) + 80001aac: 00818193 addi x3,x3,8 + +0000000080001ab0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + ror x8, x17, x20 # perform operation + 80001ab0: 6148d433 ror x8,x17,x20 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab4: 00033203 ld x4,0(x6) + 80001ab8: 00820c63 beq x4,x8,80001ad0 + 80001abc: 244062ef jal x5,80007d00 + 80001ac0: 80001ab0 .word 0x80001ab0 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 8000ff50 .word 0x8000ff50 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x0000000000000000 + 80001ad4: 0001bf83 ld x31,0(x3) + 80001ad8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x0000000000000001 + 80001adc: 0001b803 ld x16,0(x3) + 80001ae0: 00818193 addi x3,x3,8 + +0000000080001ae4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + ror x22, x31, x16 # perform operation + 80001ae4: 610fdb33 ror x22,x31,x16 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae8: 00033203 ld x4,0(x6) + 80001aec: 01620c63 beq x4,x22,80001b04 + 80001af0: 210062ef jal x5,80007d00 + 80001af4: 80001ae4 .word 0x80001ae4 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 8000ffa0 .word 0x8000ffa0 + 80001b00: 00000000 .word 0x00000000 + 80001b04: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x0000000000000000 + 80001b08: 0001b083 ld x1,0(x3) + 80001b0c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0000000000000002 + 80001b10: 0001b583 ld x11,0(x3) + 80001b14: 00818193 addi x3,x3,8 + +0000000080001b18 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + ror x20, x1, x11 # perform operation + 80001b18: 60b0da33 ror x20,x1,x11 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b1c: 00033203 ld x4,0(x6) + 80001b20: 01420c63 beq x4,x20,80001b38 + 80001b24: 1dc062ef jal x5,80007d00 + 80001b28: 80001b18 .word 0x80001b18 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 8000fff0 .word 0x8000fff0 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x0000000000000000 + 80001b3c: 0001bd83 ld x27,0(x3) + 80001b40: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x8000000000000000 + 80001b44: 0001b083 ld x1,0(x3) + 80001b48: 00818193 addi x3,x3,8 + +0000000080001b4c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + ror x12, x27, x1 # perform operation + 80001b4c: 601dd633 ror x12,x27,x1 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b50: 00033203 ld x4,0(x6) + 80001b54: 00c20c63 beq x4,x12,80001b6c + 80001b58: 1a8062ef jal x5,80007d00 + 80001b5c: 80001b4c .word 0x80001b4c + 80001b60: 00000000 .word 0x00000000 + 80001b64: 80010040 .word 0x80010040 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000000000000 + 80001b70: 0001b803 ld x16,0(x3) + 80001b74: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x8000000000000001 + 80001b78: 0001b683 ld x13,0(x3) + 80001b7c: 00818193 addi x3,x3,8 + +0000000080001b80 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + ror x7, x16, x13 # perform operation + 80001b80: 60d853b3 ror x7,x16,x13 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b84: 00033203 ld x4,0(x6) + 80001b88: 00720c63 beq x4,x7,80001ba0 + 80001b8c: 174062ef jal x5,80007d00 + 80001b90: 80001b80 .word 0x80001b80 + 80001b94: 00000000 .word 0x00000000 + 80001b98: 8001009f .word 0x8001009f + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000000000000 + 80001ba4: 0001b783 ld x15,0(x3) + 80001ba8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7fffffffffffffff + 80001bac: 0001b703 ld x14,0(x3) + 80001bb0: 00818193 addi x3,x3,8 + +0000000080001bb4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + ror x17, x15, x14 # perform operation + 80001bb4: 60e7d8b3 ror x17,x15,x14 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb8: 00033203 ld x4,0(x6) + 80001bbc: 01120c63 beq x4,x17,80001bd4 + 80001bc0: 140062ef jal x5,80007d00 + 80001bc4: 80001bb4 .word 0x80001bb4 + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 800100fe .word 0x800100fe + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x0000000000000000 + 80001bd8: 0001bc03 ld x24,0(x3) + 80001bdc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80001be0: 0001b703 ld x14,0(x3) + 80001be4: 00818193 addi x3,x3,8 + +0000000080001be8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + ror x15, x24, x14 # perform operation + 80001be8: 60ec57b3 ror x15,x24,x14 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bec: 00033203 ld x4,0(x6) + 80001bf0: 00f20c63 beq x4,x15,80001c08 + 80001bf4: 10c062ef jal x5,80007d00 + 80001bf8: 80001be8 .word 0x80001be8 + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 8001015d .word 0x8001015d + 80001c04: 00000000 .word 0x00000000 + 80001c08: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x0000000000000000 + 80001c0c: 0001b683 ld x13,0(x3) + 80001c10: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xffffffffffffffff + 80001c14: 0001ba83 ld x21,0(x3) + 80001c18: 00818193 addi x3,x3,8 + +0000000080001c1c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + ror x15, x13, x21 # perform operation + 80001c1c: 6156d7b3 ror x15,x13,x21 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c20: 00033203 ld x4,0(x6) + 80001c24: 00f20c63 beq x4,x15,80001c3c + 80001c28: 0d8062ef jal x5,80007d00 + 80001c2c: 80001c1c .word 0x80001c1c + 80001c30: 00000000 .word 0x00000000 + 80001c34: 800101bc .word 0x800101bc + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x0000000000000000 + 80001c40: 0001b983 ld x19,0(x3) + 80001c44: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0xfffffffffffffffe + 80001c48: 0001bc83 ld x25,0(x3) + 80001c4c: 00818193 addi x3,x3,8 + +0000000080001c50 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + ror x29, x19, x25 # perform operation + 80001c50: 6199deb3 ror x29,x19,x25 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c54: 00033203 ld x4,0(x6) + 80001c58: 01d20c63 beq x4,x29,80001c70 + 80001c5c: 0a4062ef jal x5,80007d00 + 80001c60: 80001c50 .word 0x80001c50 + 80001c64: 00000000 .word 0x00000000 + 80001c68: 8001021b .word 0x8001021b + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000000000000 + 80001c74: 0001b783 ld x15,0(x3) + 80001c78: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80001c7c: 0001bc03 ld x24,0(x3) + 80001c80: 00818193 addi x3,x3,8 + +0000000080001c84 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + ror x26, x15, x24 # perform operation + 80001c84: 6187dd33 ror x26,x15,x24 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c88: 00033203 ld x4,0(x6) + 80001c8c: 01a20c63 beq x4,x26,80001ca4 + 80001c90: 070062ef jal x5,80007d00 + 80001c94: 80001c84 .word 0x80001c84 + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 8001027a .word 0x8001027a + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x0000000000000000 + 80001ca8: 0001bb83 ld x23,0(x3) + 80001cac: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001cb0: 0001b883 ld x17,0(x3) + 80001cb4: 00818193 addi x3,x3,8 + +0000000080001cb8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + ror x9, x23, x17 # perform operation + 80001cb8: 611bd4b3 ror x9,x23,x17 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cbc: 00033203 ld x4,0(x6) + 80001cc0: 00920c63 beq x4,x9,80001cd8 + 80001cc4: 03c062ef jal x5,80007d00 + 80001cc8: 80001cb8 .word 0x80001cb8 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 800102d9 .word 0x800102d9 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x0000000000000000 + 80001cdc: 0001b383 ld x7,0(x3) + 80001ce0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x5555555555555555 + 80001ce4: 0001bd83 ld x27,0(x3) + 80001ce8: 00818193 addi x3,x3,8 + +0000000080001cec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + ror x24, x7, x27 # perform operation + 80001cec: 61b3dc33 ror x24,x7,x27 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf0: 00033203 ld x4,0(x6) + 80001cf4: 01820c63 beq x4,x24,80001d0c + 80001cf8: 008062ef jal x5,80007d00 + 80001cfc: 80001cec .word 0x80001cec + 80001d00: 00000000 .word 0x00000000 + 80001d04: 80010338 .word 0x80010338 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x0000000000000000 + 80001d10: 0001bf83 ld x31,0(x3) + 80001d14: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000000ffffffff + 80001d18: 0001b603 ld x12,0(x3) + 80001d1c: 00818193 addi x3,x3,8 + +0000000080001d20 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + ror x11, x31, x12 # perform operation + 80001d20: 60cfd5b3 ror x11,x31,x12 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d24: 00033203 ld x4,0(x6) + 80001d28: 00b20c63 beq x4,x11,80001d40 + 80001d2c: 7d5052ef jal x5,80007d00 + 80001d30: 80001d20 .word 0x80001d20 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 80010397 .word 0x80010397 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000000000000 + 80001d44: 0001b883 ld x17,0(x3) + 80001d48: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d4c: 0001bb03 ld x22,0(x3) + 80001d50: 00818193 addi x3,x3,8 + +0000000080001d54 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + ror x9, x17, x22 # perform operation + 80001d54: 6168d4b3 ror x9,x17,x22 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d58: 00033203 ld x4,0(x6) + 80001d5c: 00920c63 beq x4,x9,80001d74 + 80001d60: 7a1052ef jal x5,80007d00 + 80001d64: 80001d54 .word 0x80001d54 + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 800103ee .word 0x800103ee + 80001d70: 00000000 .word 0x00000000 + 80001d74: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x0000000000000000 + 80001d78: 0001b083 ld x1,0(x3) + 80001d7c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x0000000100000000 + 80001d80: 0001b503 ld x10,0(x3) + 80001d84: 00818193 addi x3,x3,8 + +0000000080001d88 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + ror x16, x1, x10 # perform operation + 80001d88: 60a0d833 ror x16,x1,x10 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d8c: 00033203 ld x4,0(x6) + 80001d90: 01020c63 beq x4,x16,80001da8 + 80001d94: 76d052ef jal x5,80007d00 + 80001d98: 80001d88 .word 0x80001d88 + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 80010445 .word 0x80010445 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000000000000 + 80001dac: 0001b803 ld x16,0(x3) + 80001db0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x0000000100000001 + 80001db4: 0001bc83 ld x25,0(x3) + 80001db8: 00818193 addi x3,x3,8 + +0000000080001dbc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + ror x7, x16, x25 # perform operation + 80001dbc: 619853b3 ror x7,x16,x25 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc0: 00033203 ld x4,0(x6) + 80001dc4: 00720c63 beq x4,x7,80001ddc + 80001dc8: 739052ef jal x5,80007d00 + 80001dcc: 80001dbc .word 0x80001dbc + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 8001049d .word 0x8001049d + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x0000000000000001 + 80001de0: 0001bf03 ld x30,0(x3) + 80001de4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0000000000000000 + 80001de8: 0001be83 ld x29,0(x3) + 80001dec: 00818193 addi x3,x3,8 + +0000000080001df0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + ror x2, x30, x29 # perform operation + 80001df0: 61df5133 ror x2,x30,x29 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df4: 00033203 ld x4,0(x6) + 80001df8: 00220c63 beq x4,x2,80001e10 + 80001dfc: 705052ef jal x5,80007d00 + 80001e00: 80001df0 .word 0x80001df0 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 800104f5 .word 0x800104f5 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x0000000000000001 + 80001e14: 0001bd03 ld x26,0(x3) + 80001e18: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x0000000000000001 + 80001e1c: 0001bb83 ld x23,0(x3) + 80001e20: 00818193 addi x3,x3,8 + +0000000080001e24 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + ror x27, x26, x23 # perform operation + 80001e24: 617d5db3 ror x27,x26,x23 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e28: 00033203 ld x4,0(x6) + 80001e2c: 01b20c63 beq x4,x27,80001e44 + 80001e30: 6d1052ef jal x5,80007d00 + 80001e34: 80001e24 .word 0x80001e24 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 80010545 .word 0x80010545 + 80001e40: 00000000 .word 0x00000000 + 80001e44: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x0000000000000001 + 80001e48: 0001b383 ld x7,0(x3) + 80001e4c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x0000000000000002 + 80001e50: 0001b503 ld x10,0(x3) + 80001e54: 00818193 addi x3,x3,8 + +0000000080001e58 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + ror x11, x7, x10 # perform operation + 80001e58: 60a3d5b3 ror x11,x7,x10 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e5c: 00033203 ld x4,0(x6) + 80001e60: 00b20c63 beq x4,x11,80001e78 + 80001e64: 69d052ef jal x5,80007d00 + 80001e68: 80001e58 .word 0x80001e58 + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 80010595 .word 0x80010595 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x0000000000000001 + 80001e7c: 0001b703 ld x14,0(x3) + 80001e80: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x8000000000000000 + 80001e84: 0001bf03 ld x30,0(x3) + 80001e88: 00818193 addi x3,x3,8 + +0000000080001e8c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + ror x17, x14, x30 # perform operation + 80001e8c: 61e758b3 ror x17,x14,x30 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e90: 00033203 ld x4,0(x6) + 80001e94: 01120c63 beq x4,x17,80001eac + 80001e98: 669052ef jal x5,80007d00 + 80001e9c: 80001e8c .word 0x80001e8c + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 800105e5 .word 0x800105e5 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000000000001 + 80001eb0: 0001b803 ld x16,0(x3) + 80001eb4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x8000000000000001 + 80001eb8: 0001b883 ld x17,0(x3) + 80001ebc: 00818193 addi x3,x3,8 + +0000000080001ec0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + ror x19, x16, x17 # perform operation + 80001ec0: 611859b3 ror x19,x16,x17 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec4: 00033203 ld x4,0(x6) + 80001ec8: 01320c63 beq x4,x19,80001ee0 + 80001ecc: 635052ef jal x5,80007d00 + 80001ed0: 80001ec0 .word 0x80001ec0 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 80010644 .word 0x80010644 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x0000000000000001 + 80001ee4: 0001b483 ld x9,0(x3) + 80001ee8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x7fffffffffffffff + 80001eec: 0001b803 ld x16,0(x3) + 80001ef0: 00818193 addi x3,x3,8 + +0000000080001ef4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + ror x27, x9, x16 # perform operation + 80001ef4: 6104ddb3 ror x27,x9,x16 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef8: 00033203 ld x4,0(x6) + 80001efc: 01b20c63 beq x4,x27,80001f14 + 80001f00: 601052ef jal x5,80007d00 + 80001f04: 80001ef4 .word 0x80001ef4 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 800106a3 .word 0x800106a3 + 80001f10: 00000000 .word 0x00000000 + 80001f14: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000000000001 + 80001f18: 0001b883 ld x17,0(x3) + 80001f1c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7ffffffffffffffe + 80001f20: 0001b683 ld x13,0(x3) + 80001f24: 00818193 addi x3,x3,8 + +0000000080001f28 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + ror x24, x17, x13 # perform operation + 80001f28: 60d8dc33 ror x24,x17,x13 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f2c: 00033203 ld x4,0(x6) + 80001f30: 01820c63 beq x4,x24,80001f48 + 80001f34: 5cd052ef jal x5,80007d00 + 80001f38: 80001f28 .word 0x80001f28 + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 80010702 .word 0x80010702 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x0000000000000001 + 80001f4c: 0001ba83 ld x21,0(x3) + 80001f50: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xffffffffffffffff + 80001f54: 0001bf83 ld x31,0(x3) + 80001f58: 00818193 addi x3,x3,8 + +0000000080001f5c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + ror x16, x21, x31 # perform operation + 80001f5c: 61fad833 ror x16,x21,x31 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f60: 00033203 ld x4,0(x6) + 80001f64: 01020c63 beq x4,x16,80001f7c + 80001f68: 599052ef jal x5,80007d00 + 80001f6c: 80001f5c .word 0x80001f5c + 80001f70: 00000000 .word 0x00000000 + 80001f74: 80010761 .word 0x80010761 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x0000000000000001 + 80001f80: 0001b483 ld x9,0(x3) + 80001f84: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xfffffffffffffffe + 80001f88: 0001b803 ld x16,0(x3) + 80001f8c: 00818193 addi x3,x3,8 + +0000000080001f90 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + ror x18, x9, x16 # perform operation + 80001f90: 6104d933 ror x18,x9,x16 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f94: 00033203 ld x4,0(x6) + 80001f98: 01220c63 beq x4,x18,80001fb0 + 80001f9c: 565052ef jal x5,80007d00 + 80001fa0: 80001f90 .word 0x80001f90 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 800107c0 .word 0x800107c0 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x0000000000000001 + 80001fb4: 0001bf83 ld x31,0(x3) + 80001fb8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80001fbc: 0001b983 ld x19,0(x3) + 80001fc0: 00818193 addi x3,x3,8 + +0000000080001fc4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + ror x18, x31, x19 # perform operation + 80001fc4: 613fd933 ror x18,x31,x19 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc8: 00033203 ld x4,0(x6) + 80001fcc: 01220c63 beq x4,x18,80001fe4 + 80001fd0: 531052ef jal x5,80007d00 + 80001fd4: 80001fc4 .word 0x80001fc4 + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 8001081f .word 0x8001081f + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x0000000000000001 + 80001fe8: 0001bd03 ld x26,0(x3) + 80001fec: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80001ff0: 0001bc03 ld x24,0(x3) + 80001ff4: 00818193 addi x3,x3,8 + +0000000080001ff8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + ror x18, x26, x24 # perform operation + 80001ff8: 618d5933 ror x18,x26,x24 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ffc: 00033203 ld x4,0(x6) + 80002000: 01220c63 beq x4,x18,80002018 + 80002004: 4fd052ef jal x5,80007d00 + 80002008: 80001ff8 .word 0x80001ff8 + 8000200c: 00000000 .word 0x00000000 + 80002010: 8001087e .word 0x8001087e + 80002014: 00000000 .word 0x00000000 + 80002018: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x0000000000000001 + 8000201c: 0001b583 ld x11,0(x3) + 80002020: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5555555555555555 + 80002024: 0001bb83 ld x23,0(x3) + 80002028: 00818193 addi x3,x3,8 + +000000008000202c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + ror x18, x11, x23 # perform operation + 8000202c: 6175d933 ror x18,x11,x23 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002030: 00033203 ld x4,0(x6) + 80002034: 01220c63 beq x4,x18,8000204c + 80002038: 4c9052ef jal x5,80007d00 + 8000203c: 8000202c .word 0x8000202c + 80002040: 00000000 .word 0x00000000 + 80002044: 800108dd .word 0x800108dd + 80002048: 00000000 .word 0x00000000 + 8000204c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x0000000000000001 + 80002050: 0001bc03 ld x24,0(x3) + 80002054: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000000ffffffff + 80002058: 0001b783 ld x15,0(x3) + 8000205c: 00818193 addi x3,x3,8 + +0000000080002060 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + ror x16, x24, x15 # perform operation + 80002060: 60fc5833 ror x16,x24,x15 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002064: 00033203 ld x4,0(x6) + 80002068: 01020c63 beq x4,x16,80002080 + 8000206c: 495052ef jal x5,80007d00 + 80002070: 80002060 .word 0x80002060 + 80002074: 00000000 .word 0x00000000 + 80002078: 8001093c .word 0x8001093c + 8000207c: 00000000 .word 0x00000000 + 80002080: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x0000000000000001 + 80002084: 0001be83 ld x29,0(x3) + 80002088: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x00000000fffffffe + 8000208c: 0001b983 ld x19,0(x3) + 80002090: 00818193 addi x3,x3,8 + +0000000080002094 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + ror x23, x29, x19 # perform operation + 80002094: 613edbb3 ror x23,x29,x19 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002098: 00033203 ld x4,0(x6) + 8000209c: 01720c63 beq x4,x23,800020b4 + 800020a0: 461052ef jal x5,80007d00 + 800020a4: 80002094 .word 0x80002094 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 80010993 .word 0x80010993 + 800020b0: 00000000 .word 0x00000000 + 800020b4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000000000001 + 800020b8: 0001b603 ld x12,0(x3) + 800020bc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x0000000100000000 + 800020c0: 0001ba83 ld x21,0(x3) + 800020c4: 00818193 addi x3,x3,8 + +00000000800020c8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + ror x1, x12, x21 # perform operation + 800020c8: 615650b3 ror x1,x12,x21 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020cc: 00033203 ld x4,0(x6) + 800020d0: 00120c63 beq x4,x1,800020e8 + 800020d4: 42d052ef jal x5,80007d00 + 800020d8: 800020c8 .word 0x800020c8 + 800020dc: 00000000 .word 0x00000000 + 800020e0: 800109ea .word 0x800109ea + 800020e4: 00000000 .word 0x00000000 + 800020e8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x0000000000000001 + 800020ec: 0001bc83 ld x25,0(x3) + 800020f0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x0000000100000001 + 800020f4: 0001b983 ld x19,0(x3) + 800020f8: 00818193 addi x3,x3,8 + +00000000800020fc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + ror x8, x25, x19 # perform operation + 800020fc: 613cd433 ror x8,x25,x19 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002100: 00033203 ld x4,0(x6) + 80002104: 00820c63 beq x4,x8,8000211c + 80002108: 3f9052ef jal x5,80007d00 + 8000210c: 800020fc .word 0x800020fc + 80002110: 00000000 .word 0x00000000 + 80002114: 80010a42 .word 0x80010a42 + 80002118: 00000000 .word 0x00000000 + 8000211c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x0000000000000002 + 80002120: 0001b903 ld x18,0(x3) + 80002124: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x0000000000000000 + 80002128: 0001b683 ld x13,0(x3) + 8000212c: 00818193 addi x3,x3,8 + +0000000080002130 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + ror x30, x18, x13 # perform operation + 80002130: 60d95f33 ror x30,x18,x13 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002134: 00033203 ld x4,0(x6) + 80002138: 01e20c63 beq x4,x30,80002150 + 8000213c: 3c5052ef jal x5,80007d00 + 80002140: 80002130 .word 0x80002130 + 80002144: 00000000 .word 0x00000000 + 80002148: 80010a9a .word 0x80010a9a + 8000214c: 00000000 .word 0x00000000 + 80002150: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000000000002 + 80002154: 0001b603 ld x12,0(x3) + 80002158: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x0000000000000001 + 8000215c: 0001be03 ld x28,0(x3) + 80002160: 00818193 addi x3,x3,8 + +0000000080002164 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + ror x8, x12, x28 # perform operation + 80002164: 61c65433 ror x8,x12,x28 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002168: 00033203 ld x4,0(x6) + 8000216c: 00820c63 beq x4,x8,80002184 + 80002170: 391052ef jal x5,80007d00 + 80002174: 80002164 .word 0x80002164 + 80002178: 00000000 .word 0x00000000 + 8000217c: 80010aea .word 0x80010aea + 80002180: 00000000 .word 0x00000000 + 80002184: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000000000002 + 80002188: 0001b883 ld x17,0(x3) + 8000218c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x0000000000000002 + 80002190: 0001b483 ld x9,0(x3) + 80002194: 00818193 addi x3,x3,8 + +0000000080002198 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + ror x11, x17, x9 # perform operation + 80002198: 6098d5b3 ror x11,x17,x9 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 8000219c: 00033203 ld x4,0(x6) + 800021a0: 00b20c63 beq x4,x11,800021b8 + 800021a4: 35d052ef jal x5,80007d00 + 800021a8: 80002198 .word 0x80002198 + 800021ac: 00000000 .word 0x00000000 + 800021b0: 80010b3a .word 0x80010b3a + 800021b4: 00000000 .word 0x00000000 + 800021b8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x0000000000000002 + 800021bc: 0001b583 ld x11,0(x3) + 800021c0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x8000000000000000 + 800021c4: 0001b103 ld x2,0(x3) + 800021c8: 00818193 addi x3,x3,8 + +00000000800021cc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + ror x14, x11, x2 # perform operation + 800021cc: 6025d733 ror x14,x11,x2 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d0: 00033203 ld x4,0(x6) + 800021d4: 00e20c63 beq x4,x14,800021ec + 800021d8: 329052ef jal x5,80007d00 + 800021dc: 800021cc .word 0x800021cc + 800021e0: 00000000 .word 0x00000000 + 800021e4: 80010b8a .word 0x80010b8a + 800021e8: 00000000 .word 0x00000000 + 800021ec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x0000000000000002 + 800021f0: 0001be03 ld x28,0(x3) + 800021f4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x8000000000000001 + 800021f8: 0001be83 ld x29,0(x3) + 800021fc: 00818193 addi x3,x3,8 + +0000000080002200 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + ror x16, x28, x29 # perform operation + 80002200: 61de5833 ror x16,x28,x29 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002204: 00033203 ld x4,0(x6) + 80002208: 01020c63 beq x4,x16,80002220 + 8000220c: 2f5052ef jal x5,80007d00 + 80002210: 80002200 .word 0x80002200 + 80002214: 00000000 .word 0x00000000 + 80002218: 80010be9 .word 0x80010be9 + 8000221c: 00000000 .word 0x00000000 + 80002220: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000000000002 + 80002224: 0001b783 ld x15,0(x3) + 80002228: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x7fffffffffffffff + 8000222c: 0001b403 ld x8,0(x3) + 80002230: 00818193 addi x3,x3,8 + +0000000080002234 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + ror x21, x15, x8 # perform operation + 80002234: 6087dab3 ror x21,x15,x8 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002238: 00033203 ld x4,0(x6) + 8000223c: 01520c63 beq x4,x21,80002254 + 80002240: 2c1052ef jal x5,80007d00 + 80002244: 80002234 .word 0x80002234 + 80002248: 00000000 .word 0x00000000 + 8000224c: 80010c48 .word 0x80010c48 + 80002250: 00000000 .word 0x00000000 + 80002254: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x0000000000000002 + 80002258: 0001be03 ld x28,0(x3) + 8000225c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80002260: 0001bb83 ld x23,0(x3) + 80002264: 00818193 addi x3,x3,8 + +0000000080002268 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + ror x1, x28, x23 # perform operation + 80002268: 617e50b3 ror x1,x28,x23 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 8000226c: 00033203 ld x4,0(x6) + 80002270: 00120c63 beq x4,x1,80002288 + 80002274: 28d052ef jal x5,80007d00 + 80002278: 80002268 .word 0x80002268 + 8000227c: 00000000 .word 0x00000000 + 80002280: 80010ca7 .word 0x80010ca7 + 80002284: 00000000 .word 0x00000000 + 80002288: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000000000002 + 8000228c: 0001b603 ld x12,0(x3) + 80002290: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xffffffffffffffff + 80002294: 0001be83 ld x29,0(x3) + 80002298: 00818193 addi x3,x3,8 + +000000008000229c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + ror x19, x12, x29 # perform operation + 8000229c: 61d659b3 ror x19,x12,x29 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a0: 00033203 ld x4,0(x6) + 800022a4: 01320c63 beq x4,x19,800022bc + 800022a8: 259052ef jal x5,80007d00 + 800022ac: 8000229c .word 0x8000229c + 800022b0: 00000000 .word 0x00000000 + 800022b4: 80010d06 .word 0x80010d06 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x0000000000000002 + 800022c0: 0001b983 ld x19,0(x3) + 800022c4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xfffffffffffffffe + 800022c8: 0001be03 ld x28,0(x3) + 800022cc: 00818193 addi x3,x3,8 + +00000000800022d0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + ror x30, x19, x28 # perform operation + 800022d0: 61c9df33 ror x30,x19,x28 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d4: 00033203 ld x4,0(x6) + 800022d8: 01e20c63 beq x4,x30,800022f0 + 800022dc: 225052ef jal x5,80007d00 + 800022e0: 800022d0 .word 0x800022d0 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 80010d65 .word 0x80010d65 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x0000000000000002 + 800022f4: 0001bf03 ld x30,0(x3) + 800022f8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 800022fc: 0001b603 ld x12,0(x3) + 80002300: 00818193 addi x3,x3,8 + +0000000080002304 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + ror x26, x30, x12 # perform operation + 80002304: 60cf5d33 ror x26,x30,x12 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002308: 00033203 ld x4,0(x6) + 8000230c: 01a20c63 beq x4,x26,80002324 + 80002310: 1f1052ef jal x5,80007d00 + 80002314: 80002304 .word 0x80002304 + 80002318: 00000000 .word 0x00000000 + 8000231c: 80010dc4 .word 0x80010dc4 + 80002320: 00000000 .word 0x00000000 + 80002324: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x0000000000000002 + 80002328: 0001bf03 ld x30,0(x3) + 8000232c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80002330: 0001b783 ld x15,0(x3) + 80002334: 00818193 addi x3,x3,8 + +0000000080002338 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + ror x9, x30, x15 # perform operation + 80002338: 60ff54b3 ror x9,x30,x15 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000233c: 00033203 ld x4,0(x6) + 80002340: 00920c63 beq x4,x9,80002358 + 80002344: 1bd052ef jal x5,80007d00 + 80002348: 80002338 .word 0x80002338 + 8000234c: 00000000 .word 0x00000000 + 80002350: 80010e23 .word 0x80010e23 + 80002354: 00000000 .word 0x00000000 + 80002358: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x0000000000000002 + 8000235c: 0001bb83 ld x23,0(x3) + 80002360: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x5555555555555555 + 80002364: 0001b103 ld x2,0(x3) + 80002368: 00818193 addi x3,x3,8 + +000000008000236c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + ror x14, x23, x2 # perform operation + 8000236c: 602bd733 ror x14,x23,x2 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002370: 00033203 ld x4,0(x6) + 80002374: 00e20c63 beq x4,x14,8000238c + 80002378: 189052ef jal x5,80007d00 + 8000237c: 8000236c .word 0x8000236c + 80002380: 00000000 .word 0x00000000 + 80002384: 80010e82 .word 0x80010e82 + 80002388: 00000000 .word 0x00000000 + 8000238c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x0000000000000002 + 80002390: 0001b983 ld x19,0(x3) + 80002394: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x00000000ffffffff + 80002398: 0001b703 ld x14,0(x3) + 8000239c: 00818193 addi x3,x3,8 + +00000000800023a0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + ror x30, x19, x14 # perform operation + 800023a0: 60e9df33 ror x30,x19,x14 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a4: 00033203 ld x4,0(x6) + 800023a8: 01e20c63 beq x4,x30,800023c0 + 800023ac: 155052ef jal x5,80007d00 + 800023b0: 800023a0 .word 0x800023a0 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 80010ee1 .word 0x80010ee1 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x0000000000000002 + 800023c4: 0001b083 ld x1,0(x3) + 800023c8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x00000000fffffffe + 800023cc: 0001b403 ld x8,0(x3) + 800023d0: 00818193 addi x3,x3,8 + +00000000800023d4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + ror x29, x1, x8 # perform operation + 800023d4: 6080deb3 ror x29,x1,x8 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d8: 00033203 ld x4,0(x6) + 800023dc: 01d20c63 beq x4,x29,800023f4 + 800023e0: 121052ef jal x5,80007d00 + 800023e4: 800023d4 .word 0x800023d4 + 800023e8: 00000000 .word 0x00000000 + 800023ec: 80010f38 .word 0x80010f38 + 800023f0: 00000000 .word 0x00000000 + 800023f4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000000000002 + 800023f8: 0001b883 ld x17,0(x3) + 800023fc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x0000000100000000 + 80002400: 0001b383 ld x7,0(x3) + 80002404: 00818193 addi x3,x3,8 + +0000000080002408 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + ror x8, x17, x7 # perform operation + 80002408: 6078d433 ror x8,x17,x7 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 8000240c: 00033203 ld x4,0(x6) + 80002410: 00820c63 beq x4,x8,80002428 + 80002414: 0ed052ef jal x5,80007d00 + 80002418: 80002408 .word 0x80002408 + 8000241c: 00000000 .word 0x00000000 + 80002420: 80010f8f .word 0x80010f8f + 80002424: 00000000 .word 0x00000000 + 80002428: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x0000000000000002 + 8000242c: 0001bb83 ld x23,0(x3) + 80002430: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x0000000100000001 + 80002434: 0001b883 ld x17,0(x3) + 80002438: 00818193 addi x3,x3,8 + +000000008000243c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + ror x2, x23, x17 # perform operation + 8000243c: 611bd133 ror x2,x23,x17 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002440: 00033203 ld x4,0(x6) + 80002444: 00220c63 beq x4,x2,8000245c + 80002448: 0b9052ef jal x5,80007d00 + 8000244c: 8000243c .word 0x8000243c + 80002450: 00000000 .word 0x00000000 + 80002454: 80010fe7 .word 0x80010fe7 + 80002458: 00000000 .word 0x00000000 + 8000245c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x8000000000000000 + 80002460: 0001b983 ld x19,0(x3) + 80002464: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x0000000000000000 + 80002468: 0001bf83 ld x31,0(x3) + 8000246c: 00818193 addi x3,x3,8 + +0000000080002470 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + ror x28, x19, x31 # perform operation + 80002470: 61f9de33 ror x28,x19,x31 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002474: 00033203 ld x4,0(x6) + 80002478: 01c20c63 beq x4,x28,80002490 + 8000247c: 085052ef jal x5,80007d00 + 80002480: 80002470 .word 0x80002470 + 80002484: 00000000 .word 0x00000000 + 80002488: 8001103f .word 0x8001103f + 8000248c: 00000000 .word 0x00000000 + 80002490: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x8000000000000000 + 80002494: 0001b103 ld x2,0(x3) + 80002498: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x0000000000000001 + 8000249c: 0001b903 ld x18,0(x3) + 800024a0: 00818193 addi x3,x3,8 + +00000000800024a4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + ror x31, x2, x18 # perform operation + 800024a4: 61215fb3 ror x31,x2,x18 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a8: 00033203 ld x4,0(x6) + 800024ac: 01f20c63 beq x4,x31,800024c4 + 800024b0: 051052ef jal x5,80007d00 + 800024b4: 800024a4 .word 0x800024a4 + 800024b8: 00000000 .word 0x00000000 + 800024bc: 8001109e .word 0x8001109e + 800024c0: 00000000 .word 0x00000000 + 800024c4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x8000000000000000 + 800024c8: 0001b783 ld x15,0(x3) + 800024cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000000000002 + 800024d0: 0001ba03 ld x20,0(x3) + 800024d4: 00818193 addi x3,x3,8 + +00000000800024d8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + ror x17, x15, x20 # perform operation + 800024d8: 6147d8b3 ror x17,x15,x20 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024dc: 00033203 ld x4,0(x6) + 800024e0: 01120c63 beq x4,x17,800024f8 + 800024e4: 01d052ef jal x5,80007d00 + 800024e8: 800024d8 .word 0x800024d8 + 800024ec: 00000000 .word 0x00000000 + 800024f0: 800110fd .word 0x800110fd + 800024f4: 00000000 .word 0x00000000 + 800024f8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x8000000000000000 + 800024fc: 0001b903 ld x18,0(x3) + 80002500: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x8000000000000000 + 80002504: 0001b803 ld x16,0(x3) + 80002508: 00818193 addi x3,x3,8 + +000000008000250c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + ror x15, x18, x16 # perform operation + 8000250c: 610957b3 ror x15,x18,x16 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002510: 00033203 ld x4,0(x6) + 80002514: 00f20c63 beq x4,x15,8000252c + 80002518: 7e8052ef jal x5,80007d00 + 8000251c: 8000250c .word 0x8000250c + 80002520: 00000000 .word 0x00000000 + 80002524: 8001115c .word 0x8001115c + 80002528: 00000000 .word 0x00000000 + 8000252c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x8000000000000000 + 80002530: 0001b403 ld x8,0(x3) + 80002534: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x8000000000000001 + 80002538: 0001ba83 ld x21,0(x3) + 8000253c: 00818193 addi x3,x3,8 + +0000000080002540 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + ror x28, x8, x21 # perform operation + 80002540: 61545e33 ror x28,x8,x21 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002544: 00033203 ld x4,0(x6) + 80002548: 01c20c63 beq x4,x28,80002560 + 8000254c: 7b4052ef jal x5,80007d00 + 80002550: 80002540 .word 0x80002540 + 80002554: 00000000 .word 0x00000000 + 80002558: 800111ca .word 0x800111ca + 8000255c: 00000000 .word 0x00000000 + 80002560: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x8000000000000000 + 80002564: 0001b803 ld x16,0(x3) + 80002568: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7fffffffffffffff + 8000256c: 0001b883 ld x17,0(x3) + 80002570: 00818193 addi x3,x3,8 + +0000000080002574 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + ror x18, x16, x17 # perform operation + 80002574: 61185933 ror x18,x16,x17 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002578: 00033203 ld x4,0(x6) + 8000257c: 01220c63 beq x4,x18,80002594 + 80002580: 780052ef jal x5,80007d00 + 80002584: 80002574 .word 0x80002574 + 80002588: 00000000 .word 0x00000000 + 8000258c: 80011238 .word 0x80011238 + 80002590: 00000000 .word 0x00000000 + 80002594: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x8000000000000000 + 80002598: 0001b903 ld x18,0(x3) + 8000259c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x7ffffffffffffffe + 800025a0: 0001bd83 ld x27,0(x3) + 800025a4: 00818193 addi x3,x3,8 + +00000000800025a8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + ror x22, x18, x27 # perform operation + 800025a8: 61b95b33 ror x22,x18,x27 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025ac: 00033203 ld x4,0(x6) + 800025b0: 01620c63 beq x4,x22,800025c8 + 800025b4: 74c052ef jal x5,80007d00 + 800025b8: 800025a8 .word 0x800025a8 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 800112a6 .word 0x800112a6 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x8000000000000000 + 800025cc: 0001b783 ld x15,0(x3) + 800025d0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xffffffffffffffff + 800025d4: 0001b883 ld x17,0(x3) + 800025d8: 00818193 addi x3,x3,8 + +00000000800025dc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + ror x16, x15, x17 # perform operation + 800025dc: 6117d833 ror x16,x15,x17 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e0: 00033203 ld x4,0(x6) + 800025e4: 01020c63 beq x4,x16,800025fc + 800025e8: 718052ef jal x5,80007d00 + 800025ec: 800025dc .word 0x800025dc + 800025f0: 00000000 .word 0x00000000 + 800025f4: 80011314 .word 0x80011314 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x8000000000000000 + 80002600: 0001b883 ld x17,0(x3) + 80002604: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xfffffffffffffffe + 80002608: 0001b403 ld x8,0(x3) + 8000260c: 00818193 addi x3,x3,8 + +0000000080002610 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + ror x28, x17, x8 # perform operation + 80002610: 6088de33 ror x28,x17,x8 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002614: 00033203 ld x4,0(x6) + 80002618: 01c20c63 beq x4,x28,80002630 + 8000261c: 6e4052ef jal x5,80007d00 + 80002620: 80002610 .word 0x80002610 + 80002624: 00000000 .word 0x00000000 + 80002628: 80011382 .word 0x80011382 + 8000262c: 00000000 .word 0x00000000 + 80002630: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x8000000000000000 + 80002634: 0001b583 ld x11,0(x3) + 80002638: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 8000263c: 0001b403 ld x8,0(x3) + 80002640: 00818193 addi x3,x3,8 + +0000000080002644 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + ror x31, x11, x8 # perform operation + 80002644: 6085dfb3 ror x31,x11,x8 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002648: 00033203 ld x4,0(x6) + 8000264c: 01f20c63 beq x4,x31,80002664 + 80002650: 6b0052ef jal x5,80007d00 + 80002654: 80002644 .word 0x80002644 + 80002658: 00000000 .word 0x00000000 + 8000265c: 800113f0 .word 0x800113f0 + 80002660: 00000000 .word 0x00000000 + 80002664: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x8000000000000000 + 80002668: 0001be03 ld x28,0(x3) + 8000266c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80002670: 0001b783 ld x15,0(x3) + 80002674: 00818193 addi x3,x3,8 + +0000000080002678 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + ror x11, x28, x15 # perform operation + 80002678: 60fe55b3 ror x11,x28,x15 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000267c: 00033203 ld x4,0(x6) + 80002680: 00b20c63 beq x4,x11,80002698 + 80002684: 67c052ef jal x5,80007d00 + 80002688: 80002678 .word 0x80002678 + 8000268c: 00000000 .word 0x00000000 + 80002690: 8001145e .word 0x8001145e + 80002694: 00000000 .word 0x00000000 + 80002698: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x8000000000000000 + 8000269c: 0001b803 ld x16,0(x3) + 800026a0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x5555555555555555 + 800026a4: 0001b383 ld x7,0(x3) + 800026a8: 00818193 addi x3,x3,8 + +00000000800026ac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + ror x24, x16, x7 # perform operation + 800026ac: 60785c33 ror x24,x16,x7 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b0: 00033203 ld x4,0(x6) + 800026b4: 01820c63 beq x4,x24,800026cc + 800026b8: 648052ef jal x5,80007d00 + 800026bc: 800026ac .word 0x800026ac + 800026c0: 00000000 .word 0x00000000 + 800026c4: 800114cc .word 0x800114cc + 800026c8: 00000000 .word 0x00000000 + 800026cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x8000000000000000 + 800026d0: 0001b883 ld x17,0(x3) + 800026d4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000000ffffffff + 800026d8: 0001b683 ld x13,0(x3) + 800026dc: 00818193 addi x3,x3,8 + +00000000800026e0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + ror x26, x17, x13 # perform operation + 800026e0: 60d8dd33 ror x26,x17,x13 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e4: 00033203 ld x4,0(x6) + 800026e8: 01a20c63 beq x4,x26,80002700 + 800026ec: 614052ef jal x5,80007d00 + 800026f0: 800026e0 .word 0x800026e0 + 800026f4: 00000000 .word 0x00000000 + 800026f8: 8001153a .word 0x8001153a + 800026fc: 00000000 .word 0x00000000 + 80002700: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x8000000000000000 + 80002704: 0001bc03 ld x24,0(x3) + 80002708: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x00000000fffffffe + 8000270c: 0001b883 ld x17,0(x3) + 80002710: 00818193 addi x3,x3,8 + +0000000080002714 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + ror x12, x24, x17 # perform operation + 80002714: 611c5633 ror x12,x24,x17 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002718: 00033203 ld x4,0(x6) + 8000271c: 00c20c63 beq x4,x12,80002734 + 80002720: 5e0052ef jal x5,80007d00 + 80002724: 80002714 .word 0x80002714 + 80002728: 00000000 .word 0x00000000 + 8000272c: 800115a0 .word 0x800115a0 + 80002730: 00000000 .word 0x00000000 + 80002734: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x8000000000000000 + 80002738: 0001b803 ld x16,0(x3) + 8000273c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000100000000 + 80002740: 0001ba03 ld x20,0(x3) + 80002744: 00818193 addi x3,x3,8 + +0000000080002748 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + ror x11, x16, x20 # perform operation + 80002748: 614855b3 ror x11,x16,x20 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 8000274c: 00033203 ld x4,0(x6) + 80002750: 00b20c63 beq x4,x11,80002768 + 80002754: 5ac052ef jal x5,80007d00 + 80002758: 80002748 .word 0x80002748 + 8000275c: 00000000 .word 0x00000000 + 80002760: 80011606 .word 0x80011606 + 80002764: 00000000 .word 0x00000000 + 80002768: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x8000000000000000 + 8000276c: 0001bb03 ld x22,0(x3) + 80002770: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x0000000100000001 + 80002774: 0001b803 ld x16,0(x3) + 80002778: 00818193 addi x3,x3,8 + +000000008000277c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + ror x10, x22, x16 # perform operation + 8000277c: 610b5533 ror x10,x22,x16 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002780: 00033203 ld x4,0(x6) + 80002784: 00a20c63 beq x4,x10,8000279c + 80002788: 578052ef jal x5,80007d00 + 8000278c: 8000277c .word 0x8000277c + 80002790: 00000000 .word 0x00000000 + 80002794: 8001166d .word 0x8001166d + 80002798: 00000000 .word 0x00000000 + 8000279c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x8000000000000001 + 800027a0: 0001bb03 ld x22,0(x3) + 800027a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x0000000000000000 + 800027a8: 0001b403 ld x8,0(x3) + 800027ac: 00818193 addi x3,x3,8 + +00000000800027b0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + ror x27, x22, x8 # perform operation + 800027b0: 608b5db3 ror x27,x22,x8 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b4: 00033203 ld x4,0(x6) + 800027b8: 01b20c63 beq x4,x27,800027d0 + 800027bc: 544052ef jal x5,80007d00 + 800027c0: 800027b0 .word 0x800027b0 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 800116d4 .word 0x800116d4 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x8000000000000001 + 800027d4: 0001b703 ld x14,0(x3) + 800027d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x0000000000000001 + 800027dc: 0001bc03 ld x24,0(x3) + 800027e0: 00818193 addi x3,x3,8 + +00000000800027e4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + ror x19, x14, x24 # perform operation + 800027e4: 618759b3 ror x19,x14,x24 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e8: 00033203 ld x4,0(x6) + 800027ec: 01320c63 beq x4,x19,80002804 + 800027f0: 510052ef jal x5,80007d00 + 800027f4: 800027e4 .word 0x800027e4 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 80011733 .word 0x80011733 + 80002800: 00000000 .word 0x00000000 + 80002804: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x8000000000000001 + 80002808: 0001b403 ld x8,0(x3) + 8000280c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x0000000000000002 + 80002810: 0001bb03 ld x22,0(x3) + 80002814: 00818193 addi x3,x3,8 + +0000000080002818 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + ror x28, x8, x22 # perform operation + 80002818: 61645e33 ror x28,x8,x22 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 8000281c: 00033203 ld x4,0(x6) + 80002820: 01c20c63 beq x4,x28,80002838 + 80002824: 4dc052ef jal x5,80007d00 + 80002828: 80002818 .word 0x80002818 + 8000282c: 00000000 .word 0x00000000 + 80002830: 80011792 .word 0x80011792 + 80002834: 00000000 .word 0x00000000 + 80002838: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x8000000000000001 + 8000283c: 0001b103 ld x2,0(x3) + 80002840: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x8000000000000000 + 80002844: 0001b983 ld x19,0(x3) + 80002848: 00818193 addi x3,x3,8 + +000000008000284c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + ror x25, x2, x19 # perform operation + 8000284c: 61315cb3 ror x25,x2,x19 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002850: 00033203 ld x4,0(x6) + 80002854: 01920c63 beq x4,x25,8000286c + 80002858: 4a8052ef jal x5,80007d00 + 8000285c: 8000284c .word 0x8000284c + 80002860: 00000000 .word 0x00000000 + 80002864: 800117f1 .word 0x800117f1 + 80002868: 00000000 .word 0x00000000 + 8000286c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x8000000000000001 + 80002870: 0001b103 ld x2,0(x3) + 80002874: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x8000000000000001 + 80002878: 0001bb03 ld x22,0(x3) + 8000287c: 00818193 addi x3,x3,8 + +0000000080002880 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + ror x15, x2, x22 # perform operation + 80002880: 616157b3 ror x15,x2,x22 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002884: 00033203 ld x4,0(x6) + 80002888: 00f20c63 beq x4,x15,800028a0 + 8000288c: 474052ef jal x5,80007d00 + 80002890: 80002880 .word 0x80002880 + 80002894: 00000000 .word 0x00000000 + 80002898: 8001185f .word 0x8001185f + 8000289c: 00000000 .word 0x00000000 + 800028a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x8000000000000001 + 800028a4: 0001bc03 ld x24,0(x3) + 800028a8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x7fffffffffffffff + 800028ac: 0001b403 ld x8,0(x3) + 800028b0: 00818193 addi x3,x3,8 + +00000000800028b4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + ror x14, x24, x8 # perform operation + 800028b4: 608c5733 ror x14,x24,x8 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b8: 00033203 ld x4,0(x6) + 800028bc: 00e20c63 beq x4,x14,800028d4 + 800028c0: 440052ef jal x5,80007d00 + 800028c4: 800028b4 .word 0x800028b4 + 800028c8: 00000000 .word 0x00000000 + 800028cc: 800118cd .word 0x800118cd + 800028d0: 00000000 .word 0x00000000 + 800028d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x8000000000000001 + 800028d8: 0001b803 ld x16,0(x3) + 800028dc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800028e0: 0001b883 ld x17,0(x3) + 800028e4: 00818193 addi x3,x3,8 + +00000000800028e8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + ror x10, x16, x17 # perform operation + 800028e8: 61185533 ror x10,x16,x17 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028ec: 00033203 ld x4,0(x6) + 800028f0: 00a20c63 beq x4,x10,80002908 + 800028f4: 40c052ef jal x5,80007d00 + 800028f8: 800028e8 .word 0x800028e8 + 800028fc: 00000000 .word 0x00000000 + 80002900: 8001193b .word 0x8001193b + 80002904: 00000000 .word 0x00000000 + 80002908: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x8000000000000001 + 8000290c: 0001b483 ld x9,0(x3) + 80002910: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xffffffffffffffff + 80002914: 0001b803 ld x16,0(x3) + 80002918: 00818193 addi x3,x3,8 + +000000008000291c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + ror x30, x9, x16 # perform operation + 8000291c: 6104df33 ror x30,x9,x16 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002920: 00033203 ld x4,0(x6) + 80002924: 01e20c63 beq x4,x30,8000293c + 80002928: 3d8052ef jal x5,80007d00 + 8000292c: 8000291c .word 0x8000291c + 80002930: 00000000 .word 0x00000000 + 80002934: 800119a9 .word 0x800119a9 + 80002938: 00000000 .word 0x00000000 + 8000293c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x8000000000000001 + 80002940: 0001b903 ld x18,0(x3) + 80002944: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xfffffffffffffffe + 80002948: 0001ba03 ld x20,0(x3) + 8000294c: 00818193 addi x3,x3,8 + +0000000080002950 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + ror x15, x18, x20 # perform operation + 80002950: 614957b3 ror x15,x18,x20 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002954: 00033203 ld x4,0(x6) + 80002958: 00f20c63 beq x4,x15,80002970 + 8000295c: 3a4052ef jal x5,80007d00 + 80002960: 80002950 .word 0x80002950 + 80002964: 00000000 .word 0x00000000 + 80002968: 80011a17 .word 0x80011a17 + 8000296c: 00000000 .word 0x00000000 + 80002970: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x8000000000000001 + 80002974: 0001b883 ld x17,0(x3) + 80002978: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 8000297c: 0001be83 ld x29,0(x3) + 80002980: 00818193 addi x3,x3,8 + +0000000080002984 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + ror x24, x17, x29 # perform operation + 80002984: 61d8dc33 ror x24,x17,x29 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002988: 00033203 ld x4,0(x6) + 8000298c: 01820c63 beq x4,x24,800029a4 + 80002990: 370052ef jal x5,80007d00 + 80002994: 80002984 .word 0x80002984 + 80002998: 00000000 .word 0x00000000 + 8000299c: 80011a85 .word 0x80011a85 + 800029a0: 00000000 .word 0x00000000 + 800029a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x8000000000000001 + 800029a8: 0001bc03 ld x24,0(x3) + 800029ac: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 800029b0: 0001b083 ld x1,0(x3) + 800029b4: 00818193 addi x3,x3,8 + +00000000800029b8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + ror x30, x24, x1 # perform operation + 800029b8: 601c5f33 ror x30,x24,x1 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029bc: 00033203 ld x4,0(x6) + 800029c0: 01e20c63 beq x4,x30,800029d8 + 800029c4: 33c052ef jal x5,80007d00 + 800029c8: 800029b8 .word 0x800029b8 + 800029cc: 00000000 .word 0x00000000 + 800029d0: 80011af3 .word 0x80011af3 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x8000000000000001 + 800029dc: 0001b983 ld x19,0(x3) + 800029e0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x5555555555555555 + 800029e4: 0001ba83 ld x21,0(x3) + 800029e8: 00818193 addi x3,x3,8 + +00000000800029ec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + ror x12, x19, x21 # perform operation + 800029ec: 6159d633 ror x12,x19,x21 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f0: 00033203 ld x4,0(x6) + 800029f4: 00c20c63 beq x4,x12,80002a0c + 800029f8: 308052ef jal x5,80007d00 + 800029fc: 800029ec .word 0x800029ec + 80002a00: 00000000 .word 0x00000000 + 80002a04: 80011b61 .word 0x80011b61 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x8000000000000001 + 80002a10: 0001b903 ld x18,0(x3) + 80002a14: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x00000000ffffffff + 80002a18: 0001bb03 ld x22,0(x3) + 80002a1c: 00818193 addi x3,x3,8 + +0000000080002a20 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + ror x13, x18, x22 # perform operation + 80002a20: 616956b3 ror x13,x18,x22 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a24: 00033203 ld x4,0(x6) + 80002a28: 00d20c63 beq x4,x13,80002a40 + 80002a2c: 2d4052ef jal x5,80007d00 + 80002a30: 80002a20 .word 0x80002a20 + 80002a34: 00000000 .word 0x00000000 + 80002a38: 80011bcf .word 0x80011bcf + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x8000000000000001 + 80002a44: 0001b583 ld x11,0(x3) + 80002a48: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x00000000fffffffe + 80002a4c: 0001ba83 ld x21,0(x3) + 80002a50: 00818193 addi x3,x3,8 + +0000000080002a54 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + ror x25, x11, x21 # perform operation + 80002a54: 6155dcb3 ror x25,x11,x21 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a58: 00033203 ld x4,0(x6) + 80002a5c: 01920c63 beq x4,x25,80002a74 + 80002a60: 2a0052ef jal x5,80007d00 + 80002a64: 80002a54 .word 0x80002a54 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 80011c35 .word 0x80011c35 + 80002a70: 00000000 .word 0x00000000 + 80002a74: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x8000000000000001 + 80002a78: 0001b903 ld x18,0(x3) + 80002a7c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x0000000100000000 + 80002a80: 0001b783 ld x15,0(x3) + 80002a84: 00818193 addi x3,x3,8 + +0000000080002a88 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + ror x14, x18, x15 # perform operation + 80002a88: 60f95733 ror x14,x18,x15 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a8c: 00033203 ld x4,0(x6) + 80002a90: 00e20c63 beq x4,x14,80002aa8 + 80002a94: 26c052ef jal x5,80007d00 + 80002a98: 80002a88 .word 0x80002a88 + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 80011c9b .word 0x80011c9b + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x8000000000000001 + 80002aac: 0001ba83 ld x21,0(x3) + 80002ab0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0000000100000001 + 80002ab4: 0001be83 ld x29,0(x3) + 80002ab8: 00818193 addi x3,x3,8 + +0000000080002abc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + ror x8, x21, x29 # perform operation + 80002abc: 61dad433 ror x8,x21,x29 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac0: 00033203 ld x4,0(x6) + 80002ac4: 00820c63 beq x4,x8,80002adc + 80002ac8: 238052ef jal x5,80007d00 + 80002acc: 80002abc .word 0x80002abc + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 80011d02 .word 0x80011d02 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002ae0: 0001bf83 ld x31,0(x3) + 80002ae4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000000000000 + 80002ae8: 0001ba03 ld x20,0(x3) + 80002aec: 00818193 addi x3,x3,8 + +0000000080002af0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + ror x15, x31, x20 # perform operation + 80002af0: 614fd7b3 ror x15,x31,x20 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af4: 00033203 ld x4,0(x6) + 80002af8: 00f20c63 beq x4,x15,80002b10 + 80002afc: 204052ef jal x5,80007d00 + 80002b00: 80002af0 .word 0x80002af0 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 80011d69 .word 0x80011d69 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002b14: 0001bc03 ld x24,0(x3) + 80002b18: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x0000000000000001 + 80002b1c: 0001b703 ld x14,0(x3) + 80002b20: 00818193 addi x3,x3,8 + +0000000080002b24 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + ror x26, x24, x14 # perform operation + 80002b24: 60ec5d33 ror x26,x24,x14 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b28: 00033203 ld x4,0(x6) + 80002b2c: 01a20c63 beq x4,x26,80002b44 + 80002b30: 1d0052ef jal x5,80007d00 + 80002b34: 80002b24 .word 0x80002b24 + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 80011dc8 .word 0x80011dc8 + 80002b40: 00000000 .word 0x00000000 + 80002b44: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002b48: 0001b583 ld x11,0(x3) + 80002b4c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x0000000000000002 + 80002b50: 0001b903 ld x18,0(x3) + 80002b54: 00818193 addi x3,x3,8 + +0000000080002b58 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + ror x30, x11, x18 # perform operation + 80002b58: 6125df33 ror x30,x11,x18 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b5c: 00033203 ld x4,0(x6) + 80002b60: 01e20c63 beq x4,x30,80002b78 + 80002b64: 19c052ef jal x5,80007d00 + 80002b68: 80002b58 .word 0x80002b58 + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 80011e27 .word 0x80011e27 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002b7c: 0001b603 ld x12,0(x3) + 80002b80: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x8000000000000000 + 80002b84: 0001b903 ld x18,0(x3) + 80002b88: 00818193 addi x3,x3,8 + +0000000080002b8c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + ror x16, x12, x18 # perform operation + 80002b8c: 61265833 ror x16,x12,x18 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b90: 00033203 ld x4,0(x6) + 80002b94: 01020c63 beq x4,x16,80002bac + 80002b98: 168052ef jal x5,80007d00 + 80002b9c: 80002b8c .word 0x80002b8c + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 80011e86 .word 0x80011e86 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002bb0: 0001bc83 ld x25,0(x3) + 80002bb4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x8000000000000001 + 80002bb8: 0001b783 ld x15,0(x3) + 80002bbc: 00818193 addi x3,x3,8 + +0000000080002bc0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + ror x7, x25, x15 # perform operation + 80002bc0: 60fcd3b3 ror x7,x25,x15 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc4: 00033203 ld x4,0(x6) + 80002bc8: 00720c63 beq x4,x7,80002be0 + 80002bcc: 134052ef jal x5,80007d00 + 80002bd0: 80002bc0 .word 0x80002bc0 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 80011ef4 .word 0x80011ef4 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002be4: 0001bd83 ld x27,0(x3) + 80002be8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7fffffffffffffff + 80002bec: 0001ba03 ld x20,0(x3) + 80002bf0: 00818193 addi x3,x3,8 + +0000000080002bf4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + ror x10, x27, x20 # perform operation + 80002bf4: 614dd533 ror x10,x27,x20 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf8: 00033203 ld x4,0(x6) + 80002bfc: 00a20c63 beq x4,x10,80002c14 + 80002c00: 100052ef jal x5,80007d00 + 80002c04: 80002bf4 .word 0x80002bf4 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 80011f62 .word 0x80011f62 + 80002c10: 00000000 .word 0x00000000 + 80002c14: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002c18: 0001b583 ld x11,0(x3) + 80002c1c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7ffffffffffffffe + 80002c20: 0001b603 ld x12,0(x3) + 80002c24: 00818193 addi x3,x3,8 + +0000000080002c28 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + ror x7, x11, x12 # perform operation + 80002c28: 60c5d3b3 ror x7,x11,x12 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c2c: 00033203 ld x4,0(x6) + 80002c30: 00720c63 beq x4,x7,80002c48 + 80002c34: 0cc052ef jal x5,80007d00 + 80002c38: 80002c28 .word 0x80002c28 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 80011fd0 .word 0x80011fd0 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002c4c: 0001be03 ld x28,0(x3) + 80002c50: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xffffffffffffffff + 80002c54: 0001bf83 ld x31,0(x3) + 80002c58: 00818193 addi x3,x3,8 + +0000000080002c5c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + ror x12, x28, x31 # perform operation + 80002c5c: 61fe5633 ror x12,x28,x31 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c60: 00033203 ld x4,0(x6) + 80002c64: 00c20c63 beq x4,x12,80002c7c + 80002c68: 098052ef jal x5,80007d00 + 80002c6c: 80002c5c .word 0x80002c5c + 80002c70: 00000000 .word 0x00000000 + 80002c74: 8001203e .word 0x8001203e + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002c80: 0001b783 ld x15,0(x3) + 80002c84: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xfffffffffffffffe + 80002c88: 0001b603 ld x12,0(x3) + 80002c8c: 00818193 addi x3,x3,8 + +0000000080002c90 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + ror x2, x15, x12 # perform operation + 80002c90: 60c7d133 ror x2,x15,x12 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c94: 00033203 ld x4,0(x6) + 80002c98: 00220c63 beq x4,x2,80002cb0 + 80002c9c: 064052ef jal x5,80007d00 + 80002ca0: 80002c90 .word 0x80002c90 + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 800120ac .word 0x800120ac + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002cb4: 0001b583 ld x11,0(x3) + 80002cb8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002cbc: 0001b703 ld x14,0(x3) + 80002cc0: 00818193 addi x3,x3,8 + +0000000080002cc4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + ror x17, x11, x14 # perform operation + 80002cc4: 60e5d8b3 ror x17,x11,x14 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc8: 00033203 ld x4,0(x6) + 80002ccc: 01120c63 beq x4,x17,80002ce4 + 80002cd0: 030052ef jal x5,80007d00 + 80002cd4: 80002cc4 .word 0x80002cc4 + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 8001211a .word 0x8001211a + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002ce8: 0001b503 ld x10,0(x3) + 80002cec: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80002cf0: 0001bc03 ld x24,0(x3) + 80002cf4: 00818193 addi x3,x3,8 + +0000000080002cf8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + ror x27, x10, x24 # perform operation + 80002cf8: 61855db3 ror x27,x10,x24 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cfc: 00033203 ld x4,0(x6) + 80002d00: 01b20c63 beq x4,x27,80002d18 + 80002d04: 7fd042ef jal x5,80007d00 + 80002d08: 80002cf8 .word 0x80002cf8 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 80012188 .word 0x80012188 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002d1c: 0001b603 ld x12,0(x3) + 80002d20: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5555555555555555 + 80002d24: 0001be03 ld x28,0(x3) + 80002d28: 00818193 addi x3,x3,8 + +0000000080002d2c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + ror x22, x12, x28 # perform operation + 80002d2c: 61c65b33 ror x22,x12,x28 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d30: 00033203 ld x4,0(x6) + 80002d34: 01620c63 beq x4,x22,80002d4c + 80002d38: 7c9042ef jal x5,80007d00 + 80002d3c: 80002d2c .word 0x80002d2c + 80002d40: 00000000 .word 0x00000000 + 80002d44: 800121f6 .word 0x800121f6 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002d50: 0001b583 ld x11,0(x3) + 80002d54: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x00000000ffffffff + 80002d58: 0001b903 ld x18,0(x3) + 80002d5c: 00818193 addi x3,x3,8 + +0000000080002d60 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + ror x27, x11, x18 # perform operation + 80002d60: 6125ddb3 ror x27,x11,x18 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d64: 00033203 ld x4,0(x6) + 80002d68: 01b20c63 beq x4,x27,80002d80 + 80002d6c: 795042ef jal x5,80007d00 + 80002d70: 80002d60 .word 0x80002d60 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 80012264 .word 0x80012264 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002d84: 0001b783 ld x15,0(x3) + 80002d88: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x00000000fffffffe + 80002d8c: 0001b583 ld x11,0(x3) + 80002d90: 00818193 addi x3,x3,8 + +0000000080002d94 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + ror x26, x15, x11 # perform operation + 80002d94: 60b7dd33 ror x26,x15,x11 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d98: 00033203 ld x4,0(x6) + 80002d9c: 01a20c63 beq x4,x26,80002db4 + 80002da0: 761042ef jal x5,80007d00 + 80002da4: 80002d94 .word 0x80002d94 + 80002da8: 00000000 .word 0x00000000 + 80002dac: 800122ca .word 0x800122ca + 80002db0: 00000000 .word 0x00000000 + 80002db4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002db8: 0001bb03 ld x22,0(x3) + 80002dbc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x0000000100000000 + 80002dc0: 0001b803 ld x16,0(x3) + 80002dc4: 00818193 addi x3,x3,8 + +0000000080002dc8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + ror x18, x22, x16 # perform operation + 80002dc8: 610b5933 ror x18,x22,x16 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dcc: 00033203 ld x4,0(x6) + 80002dd0: 01220c63 beq x4,x18,80002de8 + 80002dd4: 72d042ef jal x5,80007d00 + 80002dd8: 80002dc8 .word 0x80002dc8 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 80012330 .word 0x80012330 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002dec: 0001bf83 ld x31,0(x3) + 80002df0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x0000000100000001 + 80002df4: 0001bb83 ld x23,0(x3) + 80002df8: 00818193 addi x3,x3,8 + +0000000080002dfc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + ror x13, x31, x23 # perform operation + 80002dfc: 617fd6b3 ror x13,x31,x23 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e00: 00033203 ld x4,0(x6) + 80002e04: 00d20c63 beq x4,x13,80002e1c + 80002e08: 6f9042ef jal x5,80007d00 + 80002e0c: 80002dfc .word 0x80002dfc + 80002e10: 00000000 .word 0x00000000 + 80002e14: 80012397 .word 0x80012397 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002e20: 0001b103 ld x2,0(x3) + 80002e24: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x0000000000000000 + 80002e28: 0001b383 ld x7,0(x3) + 80002e2c: 00818193 addi x3,x3,8 + +0000000080002e30 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + ror x28, x2, x7 # perform operation + 80002e30: 60715e33 ror x28,x2,x7 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e34: 00033203 ld x4,0(x6) + 80002e38: 01c20c63 beq x4,x28,80002e50 + 80002e3c: 6c5042ef jal x5,80007d00 + 80002e40: 80002e30 .word 0x80002e30 + 80002e44: 00000000 .word 0x00000000 + 80002e48: 800123fe .word 0x800123fe + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002e54: 0001bc03 ld x24,0(x3) + 80002e58: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x0000000000000001 + 80002e5c: 0001b103 ld x2,0(x3) + 80002e60: 00818193 addi x3,x3,8 + +0000000080002e64 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + ror x29, x24, x2 # perform operation + 80002e64: 602c5eb3 ror x29,x24,x2 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e68: 00033203 ld x4,0(x6) + 80002e6c: 01d20c63 beq x4,x29,80002e84 + 80002e70: 691042ef jal x5,80007d00 + 80002e74: 80002e64 .word 0x80002e64 + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 8001245d .word 0x8001245d + 80002e80: 00000000 .word 0x00000000 + 80002e84: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80002e88: 0001b403 ld x8,0(x3) + 80002e8c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x0000000000000002 + 80002e90: 0001b383 ld x7,0(x3) + 80002e94: 00818193 addi x3,x3,8 + +0000000080002e98 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + ror x25, x8, x7 # perform operation + 80002e98: 60745cb3 ror x25,x8,x7 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e9c: 00033203 ld x4,0(x6) + 80002ea0: 01920c63 beq x4,x25,80002eb8 + 80002ea4: 65d042ef jal x5,80007d00 + 80002ea8: 80002e98 .word 0x80002e98 + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 800124bc .word 0x800124bc + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002ebc: 0001be83 ld x29,0(x3) + 80002ec0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x8000000000000000 + 80002ec4: 0001b103 ld x2,0(x3) + 80002ec8: 00818193 addi x3,x3,8 + +0000000080002ecc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + ror x15, x29, x2 # perform operation + 80002ecc: 602ed7b3 ror x15,x29,x2 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed0: 00033203 ld x4,0(x6) + 80002ed4: 00f20c63 beq x4,x15,80002eec + 80002ed8: 629042ef jal x5,80007d00 + 80002edc: 80002ecc .word 0x80002ecc + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 8001251b .word 0x8001251b + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80002ef0: 0001b603 ld x12,0(x3) + 80002ef4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x8000000000000001 + 80002ef8: 0001bf83 ld x31,0(x3) + 80002efc: 00818193 addi x3,x3,8 + +0000000080002f00 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + ror x2, x12, x31 # perform operation + 80002f00: 61f65133 ror x2,x12,x31 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f04: 00033203 ld x4,0(x6) + 80002f08: 00220c63 beq x4,x2,80002f20 + 80002f0c: 5f5042ef jal x5,80007d00 + 80002f10: 80002f00 .word 0x80002f00 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 80012589 .word 0x80012589 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002f24: 0001b883 ld x17,0(x3) + 80002f28: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x7fffffffffffffff + 80002f2c: 0001be03 ld x28,0(x3) + 80002f30: 00818193 addi x3,x3,8 + +0000000080002f34 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + ror x24, x17, x28 # perform operation + 80002f34: 61c8dc33 ror x24,x17,x28 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f38: 00033203 ld x4,0(x6) + 80002f3c: 01820c63 beq x4,x24,80002f54 + 80002f40: 5c1042ef jal x5,80007d00 + 80002f44: 80002f34 .word 0x80002f34 + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 800125f7 .word 0x800125f7 + 80002f50: 00000000 .word 0x00000000 + 80002f54: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002f58: 0001bd03 ld x26,0(x3) + 80002f5c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x7ffffffffffffffe + 80002f60: 0001b803 ld x16,0(x3) + 80002f64: 00818193 addi x3,x3,8 + +0000000080002f68 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + ror x22, x26, x16 # perform operation + 80002f68: 610d5b33 ror x22,x26,x16 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f6c: 00033203 ld x4,0(x6) + 80002f70: 01620c63 beq x4,x22,80002f88 + 80002f74: 58d042ef jal x5,80007d00 + 80002f78: 80002f68 .word 0x80002f68 + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 80012665 .word 0x80012665 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002f8c: 0001b783 ld x15,0(x3) + 80002f90: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xffffffffffffffff + 80002f94: 0001b603 ld x12,0(x3) + 80002f98: 00818193 addi x3,x3,8 + +0000000080002f9c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + ror x31, x15, x12 # perform operation + 80002f9c: 60c7dfb3 ror x31,x15,x12 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa0: 00033203 ld x4,0(x6) + 80002fa4: 01f20c63 beq x4,x31,80002fbc + 80002fa8: 559042ef jal x5,80007d00 + 80002fac: 80002f9c .word 0x80002f9c + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 800126d3 .word 0x800126d3 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x7ffffffffffffffe + 80002fc0: 0001b803 ld x16,0(x3) + 80002fc4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xfffffffffffffffe + 80002fc8: 0001ba03 ld x20,0(x3) + 80002fcc: 00818193 addi x3,x3,8 + +0000000080002fd0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + ror x22, x16, x20 # perform operation + 80002fd0: 61485b33 ror x22,x16,x20 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd4: 00033203 ld x4,0(x6) + 80002fd8: 01620c63 beq x4,x22,80002ff0 + 80002fdc: 525042ef jal x5,80007d00 + 80002fe0: 80002fd0 .word 0x80002fd0 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 80012741 .word 0x80012741 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002ff4: 0001ba03 ld x20,0(x3) + 80002ff8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80002ffc: 0001b583 ld x11,0(x3) + 80003000: 00818193 addi x3,x3,8 + +0000000080003004 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + ror x29, x20, x11 # perform operation + 80003004: 60ba5eb3 ror x29,x20,x11 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003008: 00033203 ld x4,0(x6) + 8000300c: 01d20c63 beq x4,x29,80003024 + 80003010: 4f1042ef jal x5,80007d00 + 80003014: 80003004 .word 0x80003004 + 80003018: 00000000 .word 0x00000000 + 8000301c: 800127af .word 0x800127af + 80003020: 00000000 .word 0x00000000 + 80003024: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003028: 0001b703 ld x14,0(x3) + 8000302c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80003030: 0001b883 ld x17,0(x3) + 80003034: 00818193 addi x3,x3,8 + +0000000080003038 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + ror x30, x14, x17 # perform operation + 80003038: 61175f33 ror x30,x14,x17 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000303c: 00033203 ld x4,0(x6) + 80003040: 01e20c63 beq x4,x30,80003058 + 80003044: 4bd042ef jal x5,80007d00 + 80003048: 80003038 .word 0x80003038 + 8000304c: 00000000 .word 0x00000000 + 80003050: 8001281d .word 0x8001281d + 80003054: 00000000 .word 0x00000000 + 80003058: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x7ffffffffffffffe + 8000305c: 0001be83 ld x29,0(x3) + 80003060: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5555555555555555 + 80003064: 0001be03 ld x28,0(x3) + 80003068: 00818193 addi x3,x3,8 + +000000008000306c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + ror x30, x29, x28 # perform operation + 8000306c: 61cedf33 ror x30,x29,x28 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003070: 00033203 ld x4,0(x6) + 80003074: 01e20c63 beq x4,x30,8000308c + 80003078: 489042ef jal x5,80007d00 + 8000307c: 8000306c .word 0x8000306c + 80003080: 00000000 .word 0x00000000 + 80003084: 8001288b .word 0x8001288b + 80003088: 00000000 .word 0x00000000 + 8000308c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80003090: 0001bc03 ld x24,0(x3) + 80003094: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000000ffffffff + 80003098: 0001b603 ld x12,0(x3) + 8000309c: 00818193 addi x3,x3,8 + +00000000800030a0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + ror x14, x24, x12 # perform operation + 800030a0: 60cc5733 ror x14,x24,x12 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a4: 00033203 ld x4,0(x6) + 800030a8: 00e20c63 beq x4,x14,800030c0 + 800030ac: 455042ef jal x5,80007d00 + 800030b0: 800030a0 .word 0x800030a0 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 800128f9 .word 0x800128f9 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030c4: 0001b683 ld x13,0(x3) + 800030c8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x00000000fffffffe + 800030cc: 0001bc83 ld x25,0(x3) + 800030d0: 00818193 addi x3,x3,8 + +00000000800030d4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + ror x30, x13, x25 # perform operation + 800030d4: 6196df33 ror x30,x13,x25 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d8: 00033203 ld x4,0(x6) + 800030dc: 01e20c63 beq x4,x30,800030f4 + 800030e0: 421042ef jal x5,80007d00 + 800030e4: 800030d4 .word 0x800030d4 + 800030e8: 00000000 .word 0x00000000 + 800030ec: 8001295f .word 0x8001295f + 800030f0: 00000000 .word 0x00000000 + 800030f4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030f8: 0001b683 ld x13,0(x3) + 800030fc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000100000000 + 80003100: 0001ba03 ld x20,0(x3) + 80003104: 00818193 addi x3,x3,8 + +0000000080003108 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + ror x2, x13, x20 # perform operation + 80003108: 6146d133 ror x2,x13,x20 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 8000310c: 00033203 ld x4,0(x6) + 80003110: 00220c63 beq x4,x2,80003128 + 80003114: 3ed042ef jal x5,80007d00 + 80003118: 80003108 .word 0x80003108 + 8000311c: 00000000 .word 0x00000000 + 80003120: 800129c5 .word 0x800129c5 + 80003124: 00000000 .word 0x00000000 + 80003128: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x7ffffffffffffffe + 8000312c: 0001b083 ld x1,0(x3) + 80003130: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x0000000100000001 + 80003134: 0001b483 ld x9,0(x3) + 80003138: 00818193 addi x3,x3,8 + +000000008000313c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + ror x25, x1, x9 # perform operation + 8000313c: 6090dcb3 ror x25,x1,x9 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003140: 00033203 ld x4,0(x6) + 80003144: 01920c63 beq x4,x25,8000315c + 80003148: 3b9042ef jal x5,80007d00 + 8000314c: 8000313c .word 0x8000313c + 80003150: 00000000 .word 0x00000000 + 80003154: 80012a2c .word 0x80012a2c + 80003158: 00000000 .word 0x00000000 + 8000315c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xffffffffffffffff + 80003160: 0001b583 ld x11,0(x3) + 80003164: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x0000000000000000 + 80003168: 0001b703 ld x14,0(x3) + 8000316c: 00818193 addi x3,x3,8 + +0000000080003170 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + ror x1, x11, x14 # perform operation + 80003170: 60e5d0b3 ror x1,x11,x14 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003174: 00033203 ld x4,0(x6) + 80003178: 00120c63 beq x4,x1,80003190 + 8000317c: 385042ef jal x5,80007d00 + 80003180: 80003170 .word 0x80003170 + 80003184: 00000000 .word 0x00000000 + 80003188: 80012a93 .word 0x80012a93 + 8000318c: 00000000 .word 0x00000000 + 80003190: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xffffffffffffffff + 80003194: 0001bb03 ld x22,0(x3) + 80003198: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x0000000000000001 + 8000319c: 0001b903 ld x18,0(x3) + 800031a0: 00818193 addi x3,x3,8 + +00000000800031a4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + ror x8, x22, x18 # perform operation + 800031a4: 612b5433 ror x8,x22,x18 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a8: 00033203 ld x4,0(x6) + 800031ac: 00820c63 beq x4,x8,800031c4 + 800031b0: 351042ef jal x5,80007d00 + 800031b4: 800031a4 .word 0x800031a4 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 80012af2 .word 0x80012af2 + 800031c0: 00000000 .word 0x00000000 + 800031c4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xffffffffffffffff + 800031c8: 0001b983 ld x19,0(x3) + 800031cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x0000000000000002 + 800031d0: 0001bd83 ld x27,0(x3) + 800031d4: 00818193 addi x3,x3,8 + +00000000800031d8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + ror x15, x19, x27 # perform operation + 800031d8: 61b9d7b3 ror x15,x19,x27 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031dc: 00033203 ld x4,0(x6) + 800031e0: 00f20c63 beq x4,x15,800031f8 + 800031e4: 31d042ef jal x5,80007d00 + 800031e8: 800031d8 .word 0x800031d8 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 80012b51 .word 0x80012b51 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xffffffffffffffff + 800031fc: 0001be83 ld x29,0(x3) + 80003200: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x8000000000000000 + 80003204: 0001b683 ld x13,0(x3) + 80003208: 00818193 addi x3,x3,8 + +000000008000320c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + ror x14, x29, x13 # perform operation + 8000320c: 60ded733 ror x14,x29,x13 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003210: 00033203 ld x4,0(x6) + 80003214: 00e20c63 beq x4,x14,8000322c + 80003218: 2e9042ef jal x5,80007d00 + 8000321c: 8000320c .word 0x8000320c + 80003220: 00000000 .word 0x00000000 + 80003224: 80012bb0 .word 0x80012bb0 + 80003228: 00000000 .word 0x00000000 + 8000322c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xffffffffffffffff + 80003230: 0001b083 ld x1,0(x3) + 80003234: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x8000000000000001 + 80003238: 0001b803 ld x16,0(x3) + 8000323c: 00818193 addi x3,x3,8 + +0000000080003240 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + ror x18, x1, x16 # perform operation + 80003240: 6100d933 ror x18,x1,x16 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003244: 00033203 ld x4,0(x6) + 80003248: 01220c63 beq x4,x18,80003260 + 8000324c: 2b5042ef jal x5,80007d00 + 80003250: 80003240 .word 0x80003240 + 80003254: 00000000 .word 0x00000000 + 80003258: 80012c1e .word 0x80012c1e + 8000325c: 00000000 .word 0x00000000 + 80003260: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xffffffffffffffff + 80003264: 0001be03 ld x28,0(x3) + 80003268: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x7fffffffffffffff + 8000326c: 0001b883 ld x17,0(x3) + 80003270: 00818193 addi x3,x3,8 + +0000000080003274 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + ror x16, x28, x17 # perform operation + 80003274: 611e5833 ror x16,x28,x17 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003278: 00033203 ld x4,0(x6) + 8000327c: 01020c63 beq x4,x16,80003294 + 80003280: 281042ef jal x5,80007d00 + 80003284: 80003274 .word 0x80003274 + 80003288: 00000000 .word 0x00000000 + 8000328c: 80012c8c .word 0x80012c8c + 80003290: 00000000 .word 0x00000000 + 80003294: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xffffffffffffffff + 80003298: 0001b483 ld x9,0(x3) + 8000329c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x7ffffffffffffffe + 800032a0: 0001bc83 ld x25,0(x3) + 800032a4: 00818193 addi x3,x3,8 + +00000000800032a8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + ror x10, x9, x25 # perform operation + 800032a8: 6194d533 ror x10,x9,x25 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032ac: 00033203 ld x4,0(x6) + 800032b0: 00a20c63 beq x4,x10,800032c8 + 800032b4: 24d042ef jal x5,80007d00 + 800032b8: 800032a8 .word 0x800032a8 + 800032bc: 00000000 .word 0x00000000 + 800032c0: 80012cfa .word 0x80012cfa + 800032c4: 00000000 .word 0x00000000 + 800032c8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xffffffffffffffff + 800032cc: 0001b703 ld x14,0(x3) + 800032d0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xffffffffffffffff + 800032d4: 0001b903 ld x18,0(x3) + 800032d8: 00818193 addi x3,x3,8 + +00000000800032dc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + ror x7, x14, x18 # perform operation + 800032dc: 612753b3 ror x7,x14,x18 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e0: 00033203 ld x4,0(x6) + 800032e4: 00720c63 beq x4,x7,800032fc + 800032e8: 219042ef jal x5,80007d00 + 800032ec: 800032dc .word 0x800032dc + 800032f0: 00000000 .word 0x00000000 + 800032f4: 80012d68 .word 0x80012d68 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0xffffffffffffffff + 80003300: 0001b403 ld x8,0(x3) + 80003304: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xfffffffffffffffe + 80003308: 0001b783 ld x15,0(x3) + 8000330c: 00818193 addi x3,x3,8 + +0000000080003310 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + ror x19, x8, x15 # perform operation + 80003310: 60f459b3 ror x19,x8,x15 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003314: 00033203 ld x4,0(x6) + 80003318: 01320c63 beq x4,x19,80003330 + 8000331c: 1e5042ef jal x5,80007d00 + 80003320: 80003310 .word 0x80003310 + 80003324: 00000000 .word 0x00000000 + 80003328: 80012dd6 .word 0x80012dd6 + 8000332c: 00000000 .word 0x00000000 + 80003330: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xffffffffffffffff + 80003334: 0001bf83 ld x31,0(x3) + 80003338: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 8000333c: 0001bc03 ld x24,0(x3) + 80003340: 00818193 addi x3,x3,8 + +0000000080003344 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + ror x10, x31, x24 # perform operation + 80003344: 618fd533 ror x10,x31,x24 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003348: 00033203 ld x4,0(x6) + 8000334c: 00a20c63 beq x4,x10,80003364 + 80003350: 1b1042ef jal x5,80007d00 + 80003354: 80003344 .word 0x80003344 + 80003358: 00000000 .word 0x00000000 + 8000335c: 80012e44 .word 0x80012e44 + 80003360: 00000000 .word 0x00000000 + 80003364: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xffffffffffffffff + 80003368: 0001bb03 ld x22,0(x3) + 8000336c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80003370: 0001b503 ld x10,0(x3) + 80003374: 00818193 addi x3,x3,8 + +0000000080003378 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + ror x20, x22, x10 # perform operation + 80003378: 60ab5a33 ror x20,x22,x10 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000337c: 00033203 ld x4,0(x6) + 80003380: 01420c63 beq x4,x20,80003398 + 80003384: 17d042ef jal x5,80007d00 + 80003388: 80003378 .word 0x80003378 + 8000338c: 00000000 .word 0x00000000 + 80003390: 80012eb2 .word 0x80012eb2 + 80003394: 00000000 .word 0x00000000 + 80003398: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xffffffffffffffff + 8000339c: 0001b803 ld x16,0(x3) + 800033a0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x5555555555555555 + 800033a4: 0001be83 ld x29,0(x3) + 800033a8: 00818193 addi x3,x3,8 + +00000000800033ac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + ror x9, x16, x29 # perform operation + 800033ac: 61d854b3 ror x9,x16,x29 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b0: 00033203 ld x4,0(x6) + 800033b4: 00920c63 beq x4,x9,800033cc + 800033b8: 149042ef jal x5,80007d00 + 800033bc: 800033ac .word 0x800033ac + 800033c0: 00000000 .word 0x00000000 + 800033c4: 80012f20 .word 0x80012f20 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xffffffffffffffff + 800033d0: 0001bd83 ld x27,0(x3) + 800033d4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x00000000ffffffff + 800033d8: 0001b683 ld x13,0(x3) + 800033dc: 00818193 addi x3,x3,8 + +00000000800033e0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + ror x25, x27, x13 # perform operation + 800033e0: 60dddcb3 ror x25,x27,x13 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e4: 00033203 ld x4,0(x6) + 800033e8: 01920c63 beq x4,x25,80003400 + 800033ec: 115042ef jal x5,80007d00 + 800033f0: 800033e0 .word 0x800033e0 + 800033f4: 00000000 .word 0x00000000 + 800033f8: 80012f8e .word 0x80012f8e + 800033fc: 00000000 .word 0x00000000 + 80003400: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xffffffffffffffff + 80003404: 0001bb03 ld x22,0(x3) + 80003408: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x00000000fffffffe + 8000340c: 0001be03 ld x28,0(x3) + 80003410: 00818193 addi x3,x3,8 + +0000000080003414 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + ror x16, x22, x28 # perform operation + 80003414: 61cb5833 ror x16,x22,x28 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003418: 00033203 ld x4,0(x6) + 8000341c: 01020c63 beq x4,x16,80003434 + 80003420: 0e1042ef jal x5,80007d00 + 80003424: 80003414 .word 0x80003414 + 80003428: 00000000 .word 0x00000000 + 8000342c: 80012ff4 .word 0x80012ff4 + 80003430: 00000000 .word 0x00000000 + 80003434: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0xffffffffffffffff + 80003438: 0001b383 ld x7,0(x3) + 8000343c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x0000000100000000 + 80003440: 0001bf83 ld x31,0(x3) + 80003444: 00818193 addi x3,x3,8 + +0000000080003448 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + ror x21, x7, x31 # perform operation + 80003448: 61f3dab3 ror x21,x7,x31 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 8000344c: 00033203 ld x4,0(x6) + 80003450: 01520c63 beq x4,x21,80003468 + 80003454: 0ad042ef jal x5,80007d00 + 80003458: 80003448 .word 0x80003448 + 8000345c: 00000000 .word 0x00000000 + 80003460: 8001305a .word 0x8001305a + 80003464: 00000000 .word 0x00000000 + 80003468: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xffffffffffffffff + 8000346c: 0001bc03 ld x24,0(x3) + 80003470: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x0000000100000001 + 80003474: 0001b083 ld x1,0(x3) + 80003478: 00818193 addi x3,x3,8 + +000000008000347c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + ror x18, x24, x1 # perform operation + 8000347c: 601c5933 ror x18,x24,x1 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003480: 00033203 ld x4,0(x6) + 80003484: 01220c63 beq x4,x18,8000349c + 80003488: 079042ef jal x5,80007d00 + 8000348c: 8000347c .word 0x8000347c + 80003490: 00000000 .word 0x00000000 + 80003494: 800130c1 .word 0x800130c1 + 80003498: 00000000 .word 0x00000000 + 8000349c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xfffffffffffffffe + 800034a0: 0001be03 ld x28,0(x3) + 800034a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x0000000000000000 + 800034a8: 0001b803 ld x16,0(x3) + 800034ac: 00818193 addi x3,x3,8 + +00000000800034b0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + ror x25, x28, x16 # perform operation + 800034b0: 610e5cb3 ror x25,x28,x16 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b4: 00033203 ld x4,0(x6) + 800034b8: 01920c63 beq x4,x25,800034d0 + 800034bc: 045042ef jal x5,80007d00 + 800034c0: 800034b0 .word 0x800034b0 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 80013128 .word 0x80013128 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0xfffffffffffffffe + 800034d4: 0001b503 ld x10,0(x3) + 800034d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x0000000000000001 + 800034dc: 0001bc03 ld x24,0(x3) + 800034e0: 00818193 addi x3,x3,8 + +00000000800034e4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + ror x8, x10, x24 # perform operation + 800034e4: 61855433 ror x8,x10,x24 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e8: 00033203 ld x4,0(x6) + 800034ec: 00820c63 beq x4,x8,80003504 + 800034f0: 011042ef jal x5,80007d00 + 800034f4: 800034e4 .word 0x800034e4 + 800034f8: 00000000 .word 0x00000000 + 800034fc: 80013187 .word 0x80013187 + 80003500: 00000000 .word 0x00000000 + 80003504: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xfffffffffffffffe + 80003508: 0001ba83 ld x21,0(x3) + 8000350c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x0000000000000002 + 80003510: 0001b483 ld x9,0(x3) + 80003514: 00818193 addi x3,x3,8 + +0000000080003518 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + ror x24, x21, x9 # perform operation + 80003518: 609adc33 ror x24,x21,x9 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 8000351c: 00033203 ld x4,0(x6) + 80003520: 01820c63 beq x4,x24,80003538 + 80003524: 7dc042ef jal x5,80007d00 + 80003528: 80003518 .word 0x80003518 + 8000352c: 00000000 .word 0x00000000 + 80003530: 800131e6 .word 0x800131e6 + 80003534: 00000000 .word 0x00000000 + 80003538: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xfffffffffffffffe + 8000353c: 0001bf83 ld x31,0(x3) + 80003540: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x8000000000000000 + 80003544: 0001b383 ld x7,0(x3) + 80003548: 00818193 addi x3,x3,8 + +000000008000354c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + ror x18, x31, x7 # perform operation + 8000354c: 607fd933 ror x18,x31,x7 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003550: 00033203 ld x4,0(x6) + 80003554: 01220c63 beq x4,x18,8000356c + 80003558: 7a8042ef jal x5,80007d00 + 8000355c: 8000354c .word 0x8000354c + 80003560: 00000000 .word 0x00000000 + 80003564: 80013245 .word 0x80013245 + 80003568: 00000000 .word 0x00000000 + 8000356c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003570: 0001bd83 ld x27,0(x3) + 80003574: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x8000000000000001 + 80003578: 0001b583 ld x11,0(x3) + 8000357c: 00818193 addi x3,x3,8 + +0000000080003580 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + ror x31, x27, x11 # perform operation + 80003580: 60bddfb3 ror x31,x27,x11 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003584: 00033203 ld x4,0(x6) + 80003588: 01f20c63 beq x4,x31,800035a0 + 8000358c: 774042ef jal x5,80007d00 + 80003590: 80003580 .word 0x80003580 + 80003594: 00000000 .word 0x00000000 + 80003598: 800132b3 .word 0x800132b3 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xfffffffffffffffe + 800035a4: 0001be03 ld x28,0(x3) + 800035a8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x7fffffffffffffff + 800035ac: 0001ba83 ld x21,0(x3) + 800035b0: 00818193 addi x3,x3,8 + +00000000800035b4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + ror x29, x28, x21 # perform operation + 800035b4: 615e5eb3 ror x29,x28,x21 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b8: 00033203 ld x4,0(x6) + 800035bc: 01d20c63 beq x4,x29,800035d4 + 800035c0: 740042ef jal x5,80007d00 + 800035c4: 800035b4 .word 0x800035b4 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 80013321 .word 0x80013321 + 800035d0: 00000000 .word 0x00000000 + 800035d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xfffffffffffffffe + 800035d8: 0001b803 ld x16,0(x3) + 800035dc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800035e0: 0001bb83 ld x23,0(x3) + 800035e4: 00818193 addi x3,x3,8 + +00000000800035e8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + ror x27, x16, x23 # perform operation + 800035e8: 61785db3 ror x27,x16,x23 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035ec: 00033203 ld x4,0(x6) + 800035f0: 01b20c63 beq x4,x27,80003608 + 800035f4: 70c042ef jal x5,80007d00 + 800035f8: 800035e8 .word 0x800035e8 + 800035fc: 00000000 .word 0x00000000 + 80003600: 8001338f .word 0x8001338f + 80003604: 00000000 .word 0x00000000 + 80003608: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xfffffffffffffffe + 8000360c: 0001bb83 ld x23,0(x3) + 80003610: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xffffffffffffffff + 80003614: 0001b383 ld x7,0(x3) + 80003618: 00818193 addi x3,x3,8 + +000000008000361c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + ror x14, x23, x7 # perform operation + 8000361c: 607bd733 ror x14,x23,x7 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003620: 00033203 ld x4,0(x6) + 80003624: 00e20c63 beq x4,x14,8000363c + 80003628: 6d8042ef jal x5,80007d00 + 8000362c: 8000361c .word 0x8000361c + 80003630: 00000000 .word 0x00000000 + 80003634: 800133fd .word 0x800133fd + 80003638: 00000000 .word 0x00000000 + 8000363c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xfffffffffffffffe + 80003640: 0001bc03 ld x24,0(x3) + 80003644: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0xfffffffffffffffe + 80003648: 0001bf83 ld x31,0(x3) + 8000364c: 00818193 addi x3,x3,8 + +0000000080003650 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + ror x11, x24, x31 # perform operation + 80003650: 61fc55b3 ror x11,x24,x31 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003654: 00033203 ld x4,0(x6) + 80003658: 00b20c63 beq x4,x11,80003670 + 8000365c: 6a4042ef jal x5,80007d00 + 80003660: 80003650 .word 0x80003650 + 80003664: 00000000 .word 0x00000000 + 80003668: 8001346b .word 0x8001346b + 8000366c: 00000000 .word 0x00000000 + 80003670: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xfffffffffffffffe + 80003674: 0001ba03 ld x20,0(x3) + 80003678: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 8000367c: 0001ba83 ld x21,0(x3) + 80003680: 00818193 addi x3,x3,8 + +0000000080003684 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + ror x12, x20, x21 # perform operation + 80003684: 615a5633 ror x12,x20,x21 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003688: 00033203 ld x4,0(x6) + 8000368c: 00c20c63 beq x4,x12,800036a4 + 80003690: 670042ef jal x5,80007d00 + 80003694: 80003684 .word 0x80003684 + 80003698: 00000000 .word 0x00000000 + 8000369c: 800134d9 .word 0x800134d9 + 800036a0: 00000000 .word 0x00000000 + 800036a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xfffffffffffffffe + 800036a8: 0001b103 ld x2,0(x3) + 800036ac: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 800036b0: 0001bd03 ld x26,0(x3) + 800036b4: 00818193 addi x3,x3,8 + +00000000800036b8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + ror x15, x2, x26 # perform operation + 800036b8: 61a157b3 ror x15,x2,x26 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036bc: 00033203 ld x4,0(x6) + 800036c0: 00f20c63 beq x4,x15,800036d8 + 800036c4: 63c042ef jal x5,80007d00 + 800036c8: 800036b8 .word 0x800036b8 + 800036cc: 00000000 .word 0x00000000 + 800036d0: 80013547 .word 0x80013547 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xfffffffffffffffe + 800036dc: 0001b883 ld x17,0(x3) + 800036e0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x5555555555555555 + 800036e4: 0001bf83 ld x31,0(x3) + 800036e8: 00818193 addi x3,x3,8 + +00000000800036ec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + ror x10, x17, x31 # perform operation + 800036ec: 61f8d533 ror x10,x17,x31 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f0: 00033203 ld x4,0(x6) + 800036f4: 00a20c63 beq x4,x10,8000370c + 800036f8: 608042ef jal x5,80007d00 + 800036fc: 800036ec .word 0x800036ec + 80003700: 00000000 .word 0x00000000 + 80003704: 800135b5 .word 0x800135b5 + 80003708: 00000000 .word 0x00000000 + 8000370c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003710: 0001bd83 ld x27,0(x3) + 80003714: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000000ffffffff + 80003718: 0001b603 ld x12,0(x3) + 8000371c: 00818193 addi x3,x3,8 + +0000000080003720 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + ror x9, x27, x12 # perform operation + 80003720: 60cdd4b3 ror x9,x27,x12 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003724: 00033203 ld x4,0(x6) + 80003728: 00920c63 beq x4,x9,80003740 + 8000372c: 5d4042ef jal x5,80007d00 + 80003730: 80003720 .word 0x80003720 + 80003734: 00000000 .word 0x00000000 + 80003738: 80013623 .word 0x80013623 + 8000373c: 00000000 .word 0x00000000 + 80003740: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xfffffffffffffffe + 80003744: 0001bc83 ld x25,0(x3) + 80003748: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x00000000fffffffe + 8000374c: 0001bf83 ld x31,0(x3) + 80003750: 00818193 addi x3,x3,8 + +0000000080003754 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + ror x16, x25, x31 # perform operation + 80003754: 61fcd833 ror x16,x25,x31 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003758: 00033203 ld x4,0(x6) + 8000375c: 01020c63 beq x4,x16,80003774 + 80003760: 5a0042ef jal x5,80007d00 + 80003764: 80003754 .word 0x80003754 + 80003768: 00000000 .word 0x00000000 + 8000376c: 80013689 .word 0x80013689 + 80003770: 00000000 .word 0x00000000 + 80003774: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003778: 0001bb03 ld x22,0(x3) + 8000377c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x0000000100000000 + 80003780: 0001bf03 ld x30,0(x3) + 80003784: 00818193 addi x3,x3,8 + +0000000080003788 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + ror x29, x22, x30 # perform operation + 80003788: 61eb5eb3 ror x29,x22,x30 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 8000378c: 00033203 ld x4,0(x6) + 80003790: 01d20c63 beq x4,x29,800037a8 + 80003794: 56c042ef jal x5,80007d00 + 80003798: 80003788 .word 0x80003788 + 8000379c: 00000000 .word 0x00000000 + 800037a0: 800136ef .word 0x800136ef + 800037a4: 00000000 .word 0x00000000 + 800037a8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xfffffffffffffffe + 800037ac: 0001bf03 ld x30,0(x3) + 800037b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x0000000100000001 + 800037b4: 0001bd03 ld x26,0(x3) + 800037b8: 00818193 addi x3,x3,8 + +00000000800037bc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + ror x14, x30, x26 # perform operation + 800037bc: 61af5733 ror x14,x30,x26 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c0: 00033203 ld x4,0(x6) + 800037c4: 00e20c63 beq x4,x14,800037dc + 800037c8: 538042ef jal x5,80007d00 + 800037cc: 800037bc .word 0x800037bc + 800037d0: 00000000 .word 0x00000000 + 800037d4: 80013756 .word 0x80013756 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 800037e0: 0001b103 ld x2,0(x3) + 800037e4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x0000000000000000 + 800037e8: 0001b903 ld x18,0(x3) + 800037ec: 00818193 addi x3,x3,8 + +00000000800037f0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + ror x10, x2, x18 # perform operation + 800037f0: 61215533 ror x10,x2,x18 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f4: 00033203 ld x4,0(x6) + 800037f8: 00a20c63 beq x4,x10,80003810 + 800037fc: 504042ef jal x5,80007d00 + 80003800: 800037f0 .word 0x800037f0 + 80003804: 00000000 .word 0x00000000 + 80003808: 800137bd .word 0x800137bd + 8000380c: 00000000 .word 0x00000000 + 80003810: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003814: 0001b703 ld x14,0(x3) + 80003818: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x0000000000000001 + 8000381c: 0001b683 ld x13,0(x3) + 80003820: 00818193 addi x3,x3,8 + +0000000080003824 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + ror x10, x14, x13 # perform operation + 80003824: 60d75533 ror x10,x14,x13 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003828: 00033203 ld x4,0(x6) + 8000382c: 00a20c63 beq x4,x10,80003844 + 80003830: 4d0042ef jal x5,80007d00 + 80003834: 80003824 .word 0x80003824 + 80003838: 00000000 .word 0x00000000 + 8000383c: 8001381c .word 0x8001381c + 80003840: 00000000 .word 0x00000000 + 80003844: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003848: 0001bd83 ld x27,0(x3) + 8000384c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x0000000000000002 + 80003850: 0001be03 ld x28,0(x3) + 80003854: 00818193 addi x3,x3,8 + +0000000080003858 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + ror x14, x27, x28 # perform operation + 80003858: 61cdd733 ror x14,x27,x28 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 8000385c: 00033203 ld x4,0(x6) + 80003860: 00e20c63 beq x4,x14,80003878 + 80003864: 49c042ef jal x5,80007d00 + 80003868: 80003858 .word 0x80003858 + 8000386c: 00000000 .word 0x00000000 + 80003870: 8001387b .word 0x8001387b + 80003874: 00000000 .word 0x00000000 + 80003878: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x5bbc887763ae86f2 + 8000387c: 0001b383 ld x7,0(x3) + 80003880: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x8000000000000000 + 80003884: 0001be03 ld x28,0(x3) + 80003888: 00818193 addi x3,x3,8 + +000000008000388c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + ror x19, x7, x28 # perform operation + 8000388c: 61c3d9b3 ror x19,x7,x28 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003890: 00033203 ld x4,0(x6) + 80003894: 01320c63 beq x4,x19,800038ac + 80003898: 468042ef jal x5,80007d00 + 8000389c: 8000388c .word 0x8000388c + 800038a0: 00000000 .word 0x00000000 + 800038a4: 800138da .word 0x800138da + 800038a8: 00000000 .word 0x00000000 + 800038ac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038b0: 0001b983 ld x19,0(x3) + 800038b4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x8000000000000001 + 800038b8: 0001b603 ld x12,0(x3) + 800038bc: 00818193 addi x3,x3,8 + +00000000800038c0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + ror x17, x19, x12 # perform operation + 800038c0: 60c9d8b3 ror x17,x19,x12 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c4: 00033203 ld x4,0(x6) + 800038c8: 01120c63 beq x4,x17,800038e0 + 800038cc: 434042ef jal x5,80007d00 + 800038d0: 800038c0 .word 0x800038c0 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 80013948 .word 0x80013948 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800038e4: 0001b603 ld x12,0(x3) + 800038e8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x7fffffffffffffff + 800038ec: 0001ba83 ld x21,0(x3) + 800038f0: 00818193 addi x3,x3,8 + +00000000800038f4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + ror x23, x12, x21 # perform operation + 800038f4: 61565bb3 ror x23,x12,x21 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f8: 00033203 ld x4,0(x6) + 800038fc: 01720c63 beq x4,x23,80003914 + 80003900: 400042ef jal x5,80007d00 + 80003904: 800038f4 .word 0x800038f4 + 80003908: 00000000 .word 0x00000000 + 8000390c: 800139b6 .word 0x800139b6 + 80003910: 00000000 .word 0x00000000 + 80003914: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003918: 0001ba83 ld x21,0(x3) + 8000391c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x7ffffffffffffffe + 80003920: 0001b403 ld x8,0(x3) + 80003924: 00818193 addi x3,x3,8 + +0000000080003928 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + ror x7, x21, x8 # perform operation + 80003928: 608ad3b3 ror x7,x21,x8 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 8000392c: 00033203 ld x4,0(x6) + 80003930: 00720c63 beq x4,x7,80003948 + 80003934: 3cc042ef jal x5,80007d00 + 80003938: 80003928 .word 0x80003928 + 8000393c: 00000000 .word 0x00000000 + 80003940: 80013a24 .word 0x80013a24 + 80003944: 00000000 .word 0x00000000 + 80003948: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 8000394c: 0001be03 ld x28,0(x3) + 80003950: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xffffffffffffffff + 80003954: 0001b383 ld x7,0(x3) + 80003958: 00818193 addi x3,x3,8 + +000000008000395c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + ror x21, x28, x7 # perform operation + 8000395c: 607e5ab3 ror x21,x28,x7 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003960: 00033203 ld x4,0(x6) + 80003964: 01520c63 beq x4,x21,8000397c + 80003968: 398042ef jal x5,80007d00 + 8000396c: 8000395c .word 0x8000395c + 80003970: 00000000 .word 0x00000000 + 80003974: 80013a92 .word 0x80013a92 + 80003978: 00000000 .word 0x00000000 + 8000397c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003980: 0001bc83 ld x25,0(x3) + 80003984: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0xfffffffffffffffe + 80003988: 0001b503 ld x10,0(x3) + 8000398c: 00818193 addi x3,x3,8 + +0000000080003990 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + ror x22, x25, x10 # perform operation + 80003990: 60acdb33 ror x22,x25,x10 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003994: 00033203 ld x4,0(x6) + 80003998: 01620c63 beq x4,x22,800039b0 + 8000399c: 364042ef jal x5,80007d00 + 800039a0: 80003990 .word 0x80003990 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 80013b00 .word 0x80013b00 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 800039b4: 0001bc03 ld x24,0(x3) + 800039b8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 800039bc: 0001b483 ld x9,0(x3) + 800039c0: 00818193 addi x3,x3,8 + +00000000800039c4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + ror x12, x24, x9 # perform operation + 800039c4: 609c5633 ror x12,x24,x9 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c8: 00033203 ld x4,0(x6) + 800039cc: 00c20c63 beq x4,x12,800039e4 + 800039d0: 330042ef jal x5,80007d00 + 800039d4: 800039c4 .word 0x800039c4 + 800039d8: 00000000 .word 0x00000000 + 800039dc: 80013b6e .word 0x80013b6e + 800039e0: 00000000 .word 0x00000000 + 800039e4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800039e8: 0001b603 ld x12,0(x3) + 800039ec: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 800039f0: 0001b783 ld x15,0(x3) + 800039f4: 00818193 addi x3,x3,8 + +00000000800039f8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + ror x31, x12, x15 # perform operation + 800039f8: 60f65fb3 ror x31,x12,x15 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039fc: 00033203 ld x4,0(x6) + 80003a00: 01f20c63 beq x4,x31,80003a18 + 80003a04: 2fc042ef jal x5,80007d00 + 80003a08: 800039f8 .word 0x800039f8 + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 80013bdc .word 0x80013bdc + 80003a14: 00000000 .word 0x00000000 + 80003a18: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003a1c: 0001bc83 ld x25,0(x3) + 80003a20: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x5555555555555555 + 80003a24: 0001b783 ld x15,0(x3) + 80003a28: 00818193 addi x3,x3,8 + +0000000080003a2c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + ror x23, x25, x15 # perform operation + 80003a2c: 60fcdbb3 ror x23,x25,x15 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a30: 00033203 ld x4,0(x6) + 80003a34: 01720c63 beq x4,x23,80003a4c + 80003a38: 2c8042ef jal x5,80007d00 + 80003a3c: 80003a2c .word 0x80003a2c + 80003a40: 00000000 .word 0x00000000 + 80003a44: 80013c4a .word 0x80013c4a + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003a50: 0001b883 ld x17,0(x3) + 80003a54: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x00000000ffffffff + 80003a58: 0001bb03 ld x22,0(x3) + 80003a5c: 00818193 addi x3,x3,8 + +0000000080003a60 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + ror x24, x17, x22 # perform operation + 80003a60: 6168dc33 ror x24,x17,x22 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a64: 00033203 ld x4,0(x6) + 80003a68: 01820c63 beq x4,x24,80003a80 + 80003a6c: 294042ef jal x5,80007d00 + 80003a70: 80003a60 .word 0x80003a60 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 80013cb8 .word 0x80013cb8 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003a84: 0001bf03 ld x30,0(x3) + 80003a88: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x00000000fffffffe + 80003a8c: 0001bd03 ld x26,0(x3) + 80003a90: 00818193 addi x3,x3,8 + +0000000080003a94 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + ror x1, x30, x26 # perform operation + 80003a94: 61af50b3 ror x1,x30,x26 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a98: 00033203 ld x4,0(x6) + 80003a9c: 00120c63 beq x4,x1,80003ab4 + 80003aa0: 260042ef jal x5,80007d00 + 80003aa4: 80003a94 .word 0x80003a94 + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 80013d1e .word 0x80013d1e + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003ab8: 0001b703 ld x14,0(x3) + 80003abc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x0000000100000000 + 80003ac0: 0001b103 ld x2,0(x3) + 80003ac4: 00818193 addi x3,x3,8 + +0000000080003ac8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + ror x26, x14, x2 # perform operation + 80003ac8: 60275d33 ror x26,x14,x2 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003acc: 00033203 ld x4,0(x6) + 80003ad0: 01a20c63 beq x4,x26,80003ae8 + 80003ad4: 22c042ef jal x5,80007d00 + 80003ad8: 80003ac8 .word 0x80003ac8 + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 80013d84 .word 0x80013d84 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003aec: 0001bb03 ld x22,0(x3) + 80003af0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000100000001 + 80003af4: 0001ba03 ld x20,0(x3) + 80003af8: 00818193 addi x3,x3,8 + +0000000080003afc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + ror x30, x22, x20 # perform operation + 80003afc: 614b5f33 ror x30,x22,x20 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b00: 00033203 ld x4,0(x6) + 80003b04: 01e20c63 beq x4,x30,80003b1c + 80003b08: 1f8042ef jal x5,80007d00 + 80003b0c: 80003afc .word 0x80003afc + 80003b10: 00000000 .word 0x00000000 + 80003b14: 80013deb .word 0x80013deb + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003b20: 0001bb03 ld x22,0(x3) + 80003b24: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0000000000000000 + 80003b28: 0001b583 ld x11,0(x3) + 80003b2c: 00818193 addi x3,x3,8 + +0000000080003b30 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + ror x15, x22, x11 # perform operation + 80003b30: 60bb57b3 ror x15,x22,x11 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b34: 00033203 ld x4,0(x6) + 80003b38: 00f20c63 beq x4,x15,80003b50 + 80003b3c: 1c4042ef jal x5,80007d00 + 80003b40: 80003b30 .word 0x80003b30 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 80013e52 .word 0x80013e52 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003b54: 0001b983 ld x19,0(x3) + 80003b58: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x0000000000000001 + 80003b5c: 0001bf83 ld x31,0(x3) + 80003b60: 00818193 addi x3,x3,8 + +0000000080003b64 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + ror x7, x19, x31 # perform operation + 80003b64: 61f9d3b3 ror x7,x19,x31 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b68: 00033203 ld x4,0(x6) + 80003b6c: 00720c63 beq x4,x7,80003b84 + 80003b70: 190042ef jal x5,80007d00 + 80003b74: 80003b64 .word 0x80003b64 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 80013eb1 .word 0x80013eb1 + 80003b80: 00000000 .word 0x00000000 + 80003b84: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003b88: 0001ba03 ld x20,0(x3) + 80003b8c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x0000000000000002 + 80003b90: 0001b503 ld x10,0(x3) + 80003b94: 00818193 addi x3,x3,8 + +0000000080003b98 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + ror x26, x20, x10 # perform operation + 80003b98: 60aa5d33 ror x26,x20,x10 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b9c: 00033203 ld x4,0(x6) + 80003ba0: 01a20c63 beq x4,x26,80003bb8 + 80003ba4: 15c042ef jal x5,80007d00 + 80003ba8: 80003b98 .word 0x80003b98 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 80013f10 .word 0x80013f10 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003bbc: 0001bf83 ld x31,0(x3) + 80003bc0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x8000000000000000 + 80003bc4: 0001be03 ld x28,0(x3) + 80003bc8: 00818193 addi x3,x3,8 + +0000000080003bcc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + ror x25, x31, x28 # perform operation + 80003bcc: 61cfdcb3 ror x25,x31,x28 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd0: 00033203 ld x4,0(x6) + 80003bd4: 01920c63 beq x4,x25,80003bec + 80003bd8: 128042ef jal x5,80007d00 + 80003bdc: 80003bcc .word 0x80003bcc + 80003be0: 00000000 .word 0x00000000 + 80003be4: 80013f6f .word 0x80013f6f + 80003be8: 00000000 .word 0x00000000 + 80003bec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003bf0: 0001ba83 ld x21,0(x3) + 80003bf4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x8000000000000001 + 80003bf8: 0001bc03 ld x24,0(x3) + 80003bfc: 00818193 addi x3,x3,8 + +0000000080003c00 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + ror x9, x21, x24 # perform operation + 80003c00: 618ad4b3 ror x9,x21,x24 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c04: 00033203 ld x4,0(x6) + 80003c08: 00920c63 beq x4,x9,80003c20 + 80003c0c: 0f4042ef jal x5,80007d00 + 80003c10: 80003c00 .word 0x80003c00 + 80003c14: 00000000 .word 0x00000000 + 80003c18: 80013fdd .word 0x80013fdd + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xaaaaaaaaaaaaaaaa + 80003c24: 0001bd83 ld x27,0(x3) + 80003c28: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x7fffffffffffffff + 80003c2c: 0001ba83 ld x21,0(x3) + 80003c30: 00818193 addi x3,x3,8 + +0000000080003c34 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + ror x8, x27, x21 # perform operation + 80003c34: 615dd433 ror x8,x27,x21 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c38: 00033203 ld x4,0(x6) + 80003c3c: 00820c63 beq x4,x8,80003c54 + 80003c40: 0c0042ef jal x5,80007d00 + 80003c44: 80003c34 .word 0x80003c34 + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 8001404b .word 0x8001404b + 80003c50: 00000000 .word 0x00000000 + 80003c54: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003c58: 0001b083 ld x1,0(x3) + 80003c5c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80003c60: 0001b103 ld x2,0(x3) + 80003c64: 00818193 addi x3,x3,8 + +0000000080003c68 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + ror x8, x1, x2 # perform operation + 80003c68: 6020d433 ror x8,x1,x2 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c6c: 00033203 ld x4,0(x6) + 80003c70: 00820c63 beq x4,x8,80003c88 + 80003c74: 08c042ef jal x5,80007d00 + 80003c78: 80003c68 .word 0x80003c68 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 800140b9 .word 0x800140b9 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003c8c: 0001ba03 ld x20,0(x3) + 80003c90: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xffffffffffffffff + 80003c94: 0001b803 ld x16,0(x3) + 80003c98: 00818193 addi x3,x3,8 + +0000000080003c9c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + ror x31, x20, x16 # perform operation + 80003c9c: 610a5fb3 ror x31,x20,x16 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca0: 00033203 ld x4,0(x6) + 80003ca4: 01f20c63 beq x4,x31,80003cbc + 80003ca8: 058042ef jal x5,80007d00 + 80003cac: 80003c9c .word 0x80003c9c + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 80014127 .word 0x80014127 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003cc0: 0001b603 ld x12,0(x3) + 80003cc4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xfffffffffffffffe + 80003cc8: 0001b803 ld x16,0(x3) + 80003ccc: 00818193 addi x3,x3,8 + +0000000080003cd0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + ror x21, x12, x16 # perform operation + 80003cd0: 61065ab3 ror x21,x12,x16 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd4: 00033203 ld x4,0(x6) + 80003cd8: 01520c63 beq x4,x21,80003cf0 + 80003cdc: 024042ef jal x5,80007d00 + 80003ce0: 80003cd0 .word 0x80003cd0 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 80014195 .word 0x80014195 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003cf4: 0001b103 ld x2,0(x3) + 80003cf8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 80003cfc: 0001be03 ld x28,0(x3) + 80003d00: 00818193 addi x3,x3,8 + +0000000080003d04 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + ror x14, x2, x28 # perform operation + 80003d04: 61c15733 ror x14,x2,x28 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d08: 00033203 ld x4,0(x6) + 80003d0c: 00e20c63 beq x4,x14,80003d24 + 80003d10: 7f1032ef jal x5,80007d00 + 80003d14: 80003d04 .word 0x80003d04 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 80014203 .word 0x80014203 + 80003d20: 00000000 .word 0x00000000 + 80003d24: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003d28: 0001bc83 ld x25,0(x3) + 80003d2c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80003d30: 0001be03 ld x28,0(x3) + 80003d34: 00818193 addi x3,x3,8 + +0000000080003d38 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + ror x31, x25, x28 # perform operation + 80003d38: 61ccdfb3 ror x31,x25,x28 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d3c: 00033203 ld x4,0(x6) + 80003d40: 01f20c63 beq x4,x31,80003d58 + 80003d44: 7bd032ef jal x5,80007d00 + 80003d48: 80003d38 .word 0x80003d38 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 80014271 .word 0x80014271 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003d5c: 0001b483 ld x9,0(x3) + 80003d60: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x5555555555555555 + 80003d64: 0001b403 ld x8,0(x3) + 80003d68: 00818193 addi x3,x3,8 + +0000000080003d6c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + ror x29, x9, x8 # perform operation + 80003d6c: 6084deb3 ror x29,x9,x8 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d70: 00033203 ld x4,0(x6) + 80003d74: 01d20c63 beq x4,x29,80003d8c + 80003d78: 789032ef jal x5,80007d00 + 80003d7c: 80003d6c .word 0x80003d6c + 80003d80: 00000000 .word 0x00000000 + 80003d84: 800142df .word 0x800142df + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003d90: 0001bf83 ld x31,0(x3) + 80003d94: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x00000000ffffffff + 80003d98: 0001bb03 ld x22,0(x3) + 80003d9c: 00818193 addi x3,x3,8 + +0000000080003da0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + ror x23, x31, x22 # perform operation + 80003da0: 616fdbb3 ror x23,x31,x22 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da4: 00033203 ld x4,0(x6) + 80003da8: 01720c63 beq x4,x23,80003dc0 + 80003dac: 755032ef jal x5,80007d00 + 80003db0: 80003da0 .word 0x80003da0 + 80003db4: 00000000 .word 0x00000000 + 80003db8: 8001434d .word 0x8001434d + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003dc4: 0001b783 ld x15,0(x3) + 80003dc8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x00000000fffffffe + 80003dcc: 0001b083 ld x1,0(x3) + 80003dd0: 00818193 addi x3,x3,8 + +0000000080003dd4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + ror x14, x15, x1 # perform operation + 80003dd4: 6017d733 ror x14,x15,x1 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd8: 00033203 ld x4,0(x6) + 80003ddc: 00e20c63 beq x4,x14,80003df4 + 80003de0: 721032ef jal x5,80007d00 + 80003de4: 80003dd4 .word 0x80003dd4 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 800143b3 .word 0x800143b3 + 80003df0: 00000000 .word 0x00000000 + 80003df4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003df8: 0001b103 ld x2,0(x3) + 80003dfc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0000000100000000 + 80003e00: 0001be83 ld x29,0(x3) + 80003e04: 00818193 addi x3,x3,8 + +0000000080003e08 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + ror x1, x2, x29 # perform operation + 80003e08: 61d150b3 ror x1,x2,x29 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e0c: 00033203 ld x4,0(x6) + 80003e10: 00120c63 beq x4,x1,80003e28 + 80003e14: 6ed032ef jal x5,80007d00 + 80003e18: 80003e08 .word 0x80003e08 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 80014419 .word 0x80014419 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003e2c: 0001b583 ld x11,0(x3) + 80003e30: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x0000000100000001 + 80003e34: 0001bd83 ld x27,0(x3) + 80003e38: 00818193 addi x3,x3,8 + +0000000080003e3c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + ror x26, x11, x27 # perform operation + 80003e3c: 61b5dd33 ror x26,x11,x27 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e40: 00033203 ld x4,0(x6) + 80003e44: 01a20c63 beq x4,x26,80003e5c + 80003e48: 6b9032ef jal x5,80007d00 + 80003e4c: 80003e3c .word 0x80003e3c + 80003e50: 00000000 .word 0x00000000 + 80003e54: 80014480 .word 0x80014480 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x5555555555555555 + 80003e60: 0001b983 ld x19,0(x3) + 80003e64: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x0000000000000000 + 80003e68: 0001b503 ld x10,0(x3) + 80003e6c: 00818193 addi x3,x3,8 + +0000000080003e70 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + ror x15, x19, x10 # perform operation + 80003e70: 60a9d7b3 ror x15,x19,x10 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e74: 00033203 ld x4,0(x6) + 80003e78: 00f20c63 beq x4,x15,80003e90 + 80003e7c: 685032ef jal x5,80007d00 + 80003e80: 80003e70 .word 0x80003e70 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 800144e7 .word 0x800144e7 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x5555555555555555 + 80003e94: 0001bb03 ld x22,0(x3) + 80003e98: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0x0000000000000001 + 80003e9c: 0001b583 ld x11,0(x3) + 80003ea0: 00818193 addi x3,x3,8 + +0000000080003ea4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + ror x7, x22, x11 # perform operation + 80003ea4: 60bb53b3 ror x7,x22,x11 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea8: 00033203 ld x4,0(x6) + 80003eac: 00720c63 beq x4,x7,80003ec4 + 80003eb0: 651032ef jal x5,80007d00 + 80003eb4: 80003ea4 .word 0x80003ea4 + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 80014546 .word 0x80014546 + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x5555555555555555 + 80003ec8: 0001bb83 ld x23,0(x3) + 80003ecc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x0000000000000002 + 80003ed0: 0001b603 ld x12,0(x3) + 80003ed4: 00818193 addi x3,x3,8 + +0000000080003ed8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + ror x26, x23, x12 # perform operation + 80003ed8: 60cbdd33 ror x26,x23,x12 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003edc: 00033203 ld x4,0(x6) + 80003ee0: 01a20c63 beq x4,x26,80003ef8 + 80003ee4: 61d032ef jal x5,80007d00 + 80003ee8: 80003ed8 .word 0x80003ed8 + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 800145a5 .word 0x800145a5 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x5555555555555555 + 80003efc: 0001b083 ld x1,0(x3) + 80003f00: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x8000000000000000 + 80003f04: 0001ba83 ld x21,0(x3) + 80003f08: 00818193 addi x3,x3,8 + +0000000080003f0c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + ror x28, x1, x21 # perform operation + 80003f0c: 6150de33 ror x28,x1,x21 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f10: 00033203 ld x4,0(x6) + 80003f14: 01c20c63 beq x4,x28,80003f2c + 80003f18: 5e9032ef jal x5,80007d00 + 80003f1c: 80003f0c .word 0x80003f0c + 80003f20: 00000000 .word 0x00000000 + 80003f24: 80014604 .word 0x80014604 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x5555555555555555 + 80003f30: 0001b583 ld x11,0(x3) + 80003f34: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x8000000000000001 + 80003f38: 0001b803 ld x16,0(x3) + 80003f3c: 00818193 addi x3,x3,8 + +0000000080003f40 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + ror x9, x11, x16 # perform operation + 80003f40: 6105d4b3 ror x9,x11,x16 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f44: 00033203 ld x4,0(x6) + 80003f48: 00920c63 beq x4,x9,80003f60 + 80003f4c: 5b5032ef jal x5,80007d00 + 80003f50: 80003f40 .word 0x80003f40 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 80014672 .word 0x80014672 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x5555555555555555 + 80003f64: 0001ba03 ld x20,0(x3) + 80003f68: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x7fffffffffffffff + 80003f6c: 0001b483 ld x9,0(x3) + 80003f70: 00818193 addi x3,x3,8 + +0000000080003f74 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + ror x28, x20, x9 # perform operation + 80003f74: 609a5e33 ror x28,x20,x9 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f78: 00033203 ld x4,0(x6) + 80003f7c: 01c20c63 beq x4,x28,80003f94 + 80003f80: 581032ef jal x5,80007d00 + 80003f84: 80003f74 .word 0x80003f74 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 800146e0 .word 0x800146e0 + 80003f90: 00000000 .word 0x00000000 + 80003f94: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x5555555555555555 + 80003f98: 0001be83 ld x29,0(x3) + 80003f9c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80003fa0: 0001bf03 ld x30,0(x3) + 80003fa4: 00818193 addi x3,x3,8 + +0000000080003fa8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + ror x25, x29, x30 # perform operation + 80003fa8: 61eedcb3 ror x25,x29,x30 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fac: 00033203 ld x4,0(x6) + 80003fb0: 01920c63 beq x4,x25,80003fc8 + 80003fb4: 54d032ef jal x5,80007d00 + 80003fb8: 80003fa8 .word 0x80003fa8 + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 8001474e .word 0x8001474e + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x5555555555555555 + 80003fcc: 0001b683 ld x13,0(x3) + 80003fd0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xffffffffffffffff + 80003fd4: 0001bf03 ld x30,0(x3) + 80003fd8: 00818193 addi x3,x3,8 + +0000000080003fdc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + ror x27, x13, x30 # perform operation + 80003fdc: 61e6ddb3 ror x27,x13,x30 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe0: 00033203 ld x4,0(x6) + 80003fe4: 01b20c63 beq x4,x27,80003ffc + 80003fe8: 519032ef jal x5,80007d00 + 80003fec: 80003fdc .word 0x80003fdc + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 800147bc .word 0x800147bc + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x5555555555555555 + 80004000: 0001ba03 ld x20,0(x3) + 80004004: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xfffffffffffffffe + 80004008: 0001b703 ld x14,0(x3) + 8000400c: 00818193 addi x3,x3,8 + +0000000080004010 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + ror x19, x20, x14 # perform operation + 80004010: 60ea59b3 ror x19,x20,x14 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004014: 00033203 ld x4,0(x6) + 80004018: 01320c63 beq x4,x19,80004030 + 8000401c: 4e5032ef jal x5,80007d00 + 80004020: 80004010 .word 0x80004010 + 80004024: 00000000 .word 0x00000000 + 80004028: 8001482a .word 0x8001482a + 8000402c: 00000000 .word 0x00000000 + 80004030: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x5555555555555555 + 80004034: 0001bc83 ld x25,0(x3) + 80004038: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 8000403c: 0001b983 ld x19,0(x3) + 80004040: 00818193 addi x3,x3,8 + +0000000080004044 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + ror x28, x25, x19 # perform operation + 80004044: 613cde33 ror x28,x25,x19 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004048: 00033203 ld x4,0(x6) + 8000404c: 01c20c63 beq x4,x28,80004064 + 80004050: 4b1032ef jal x5,80007d00 + 80004054: 80004044 .word 0x80004044 + 80004058: 00000000 .word 0x00000000 + 8000405c: 80014898 .word 0x80014898 + 80004060: 00000000 .word 0x00000000 + 80004064: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x5555555555555555 + 80004068: 0001b983 ld x19,0(x3) + 8000406c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 80004070: 0001b383 ld x7,0(x3) + 80004074: 00818193 addi x3,x3,8 + +0000000080004078 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + ror x22, x19, x7 # perform operation + 80004078: 6079db33 ror x22,x19,x7 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000407c: 00033203 ld x4,0(x6) + 80004080: 01620c63 beq x4,x22,80004098 + 80004084: 47d032ef jal x5,80007d00 + 80004088: 80004078 .word 0x80004078 + 8000408c: 00000000 .word 0x00000000 + 80004090: 80014906 .word 0x80014906 + 80004094: 00000000 .word 0x00000000 + 80004098: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x5555555555555555 + 8000409c: 0001bd83 ld x27,0(x3) + 800040a0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x5555555555555555 + 800040a4: 0001bd03 ld x26,0(x3) + 800040a8: 00818193 addi x3,x3,8 + +00000000800040ac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + ror x24, x27, x26 # perform operation + 800040ac: 61addc33 ror x24,x27,x26 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b0: 00033203 ld x4,0(x6) + 800040b4: 01820c63 beq x4,x24,800040cc + 800040b8: 449032ef jal x5,80007d00 + 800040bc: 800040ac .word 0x800040ac + 800040c0: 00000000 .word 0x00000000 + 800040c4: 80014974 .word 0x80014974 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x5555555555555555 + 800040d0: 0001b583 ld x11,0(x3) + 800040d4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x00000000ffffffff + 800040d8: 0001b083 ld x1,0(x3) + 800040dc: 00818193 addi x3,x3,8 + +00000000800040e0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + ror x19, x11, x1 # perform operation + 800040e0: 6015d9b3 ror x19,x11,x1 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e4: 00033203 ld x4,0(x6) + 800040e8: 01320c63 beq x4,x19,80004100 + 800040ec: 415032ef jal x5,80007d00 + 800040f0: 800040e0 .word 0x800040e0 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 800149e2 .word 0x800149e2 + 800040fc: 00000000 .word 0x00000000 + 80004100: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x5555555555555555 + 80004104: 0001bf83 ld x31,0(x3) + 80004108: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x00000000fffffffe + 8000410c: 0001bb83 ld x23,0(x3) + 80004110: 00818193 addi x3,x3,8 + +0000000080004114 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + ror x25, x31, x23 # perform operation + 80004114: 617fdcb3 ror x25,x31,x23 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004118: 00033203 ld x4,0(x6) + 8000411c: 01920c63 beq x4,x25,80004134 + 80004120: 3e1032ef jal x5,80007d00 + 80004124: 80004114 .word 0x80004114 + 80004128: 00000000 .word 0x00000000 + 8000412c: 80014a48 .word 0x80014a48 + 80004130: 00000000 .word 0x00000000 + 80004134: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x5555555555555555 + 80004138: 0001b703 ld x14,0(x3) + 8000413c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x0000000100000000 + 80004140: 0001bc83 ld x25,0(x3) + 80004144: 00818193 addi x3,x3,8 + +0000000080004148 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + ror x17, x14, x25 # perform operation + 80004148: 619758b3 ror x17,x14,x25 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 8000414c: 00033203 ld x4,0(x6) + 80004150: 01120c63 beq x4,x17,80004168 + 80004154: 3ad032ef jal x5,80007d00 + 80004158: 80004148 .word 0x80004148 + 8000415c: 00000000 .word 0x00000000 + 80004160: 80014aae .word 0x80014aae + 80004164: 00000000 .word 0x00000000 + 80004168: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5555555555555555 + 8000416c: 0001b603 ld x12,0(x3) + 80004170: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0000000100000001 + 80004174: 0001be83 ld x29,0(x3) + 80004178: 00818193 addi x3,x3,8 + +000000008000417c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + ror x28, x12, x29 # perform operation + 8000417c: 61d65e33 ror x28,x12,x29 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004180: 00033203 ld x4,0(x6) + 80004184: 01c20c63 beq x4,x28,8000419c + 80004188: 379032ef jal x5,80007d00 + 8000418c: 8000417c .word 0x8000417c + 80004190: 00000000 .word 0x00000000 + 80004194: 80014b15 .word 0x80014b15 + 80004198: 00000000 .word 0x00000000 + 8000419c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x00000000ffffffff + 800041a0: 0001b683 ld x13,0(x3) + 800041a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x0000000000000000 + 800041a8: 0001b883 ld x17,0(x3) + 800041ac: 00818193 addi x3,x3,8 + +00000000800041b0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + ror x9, x13, x17 # perform operation + 800041b0: 6116d4b3 ror x9,x13,x17 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b4: 00033203 ld x4,0(x6) + 800041b8: 00920c63 beq x4,x9,800041d0 + 800041bc: 345032ef jal x5,80007d00 + 800041c0: 800041b0 .word 0x800041b0 + 800041c4: 00000000 .word 0x00000000 + 800041c8: 80014b7c .word 0x80014b7c + 800041cc: 00000000 .word 0x00000000 + 800041d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x00000000ffffffff + 800041d4: 0001b083 ld x1,0(x3) + 800041d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x0000000000000001 + 800041dc: 0001b883 ld x17,0(x3) + 800041e0: 00818193 addi x3,x3,8 + +00000000800041e4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + ror x20, x1, x17 # perform operation + 800041e4: 6110da33 ror x20,x1,x17 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e8: 00033203 ld x4,0(x6) + 800041ec: 01420c63 beq x4,x20,80004204 + 800041f0: 311032ef jal x5,80007d00 + 800041f4: 800041e4 .word 0x800041e4 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 80014bd3 .word 0x80014bd3 + 80004200: 00000000 .word 0x00000000 + 80004204: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x00000000ffffffff + 80004208: 0001b483 ld x9,0(x3) + 8000420c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x0000000000000002 + 80004210: 0001bb83 ld x23,0(x3) + 80004214: 00818193 addi x3,x3,8 + +0000000080004218 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + ror x7, x9, x23 # perform operation + 80004218: 6174d3b3 ror x7,x9,x23 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 8000421c: 00033203 ld x4,0(x6) + 80004220: 00720c63 beq x4,x7,80004238 + 80004224: 2dd032ef jal x5,80007d00 + 80004228: 80004218 .word 0x80004218 + 8000422c: 00000000 .word 0x00000000 + 80004230: 80014c2a .word 0x80014c2a + 80004234: 00000000 .word 0x00000000 + 80004238: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000000ffffffff + 8000423c: 0001bc03 ld x24,0(x3) + 80004240: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x8000000000000000 + 80004244: 0001b683 ld x13,0(x3) + 80004248: 00818193 addi x3,x3,8 + +000000008000424c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + ror x18, x24, x13 # perform operation + 8000424c: 60dc5933 ror x18,x24,x13 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004250: 00033203 ld x4,0(x6) + 80004254: 01220c63 beq x4,x18,8000426c + 80004258: 2a9032ef jal x5,80007d00 + 8000425c: 8000424c .word 0x8000424c + 80004260: 00000000 .word 0x00000000 + 80004264: 80014c81 .word 0x80014c81 + 80004268: 00000000 .word 0x00000000 + 8000426c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x00000000ffffffff + 80004270: 0001b703 ld x14,0(x3) + 80004274: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x8000000000000001 + 80004278: 0001bf03 ld x30,0(x3) + 8000427c: 00818193 addi x3,x3,8 + +0000000080004280 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + ror x29, x14, x30 # perform operation + 80004280: 61e75eb3 ror x29,x14,x30 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004284: 00033203 ld x4,0(x6) + 80004288: 01d20c63 beq x4,x29,800042a0 + 8000428c: 275032ef jal x5,80007d00 + 80004290: 80004280 .word 0x80004280 + 80004294: 00000000 .word 0x00000000 + 80004298: 80014ce7 .word 0x80014ce7 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x00000000ffffffff + 800042a4: 0001b503 ld x10,0(x3) + 800042a8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x7fffffffffffffff + 800042ac: 0001b683 ld x13,0(x3) + 800042b0: 00818193 addi x3,x3,8 + +00000000800042b4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + ror x12, x10, x13 # perform operation + 800042b4: 60d55633 ror x12,x10,x13 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b8: 00033203 ld x4,0(x6) + 800042bc: 00c20c63 beq x4,x12,800042d4 + 800042c0: 241032ef jal x5,80007d00 + 800042c4: 800042b4 .word 0x800042b4 + 800042c8: 00000000 .word 0x00000000 + 800042cc: 80014d4d .word 0x80014d4d + 800042d0: 00000000 .word 0x00000000 + 800042d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x00000000ffffffff + 800042d8: 0001ba83 ld x21,0(x3) + 800042dc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x7ffffffffffffffe + 800042e0: 0001bd03 ld x26,0(x3) + 800042e4: 00818193 addi x3,x3,8 + +00000000800042e8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + ror x14, x21, x26 # perform operation + 800042e8: 61aad733 ror x14,x21,x26 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042ec: 00033203 ld x4,0(x6) + 800042f0: 00e20c63 beq x4,x14,80004308 + 800042f4: 20d032ef jal x5,80007d00 + 800042f8: 800042e8 .word 0x800042e8 + 800042fc: 00000000 .word 0x00000000 + 80004300: 80014db3 .word 0x80014db3 + 80004304: 00000000 .word 0x00000000 + 80004308: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000000ffffffff + 8000430c: 0001bc83 ld x25,0(x3) + 80004310: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xffffffffffffffff + 80004314: 0001b883 ld x17,0(x3) + 80004318: 00818193 addi x3,x3,8 + +000000008000431c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + ror x1, x25, x17 # perform operation + 8000431c: 611cd0b3 ror x1,x25,x17 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004320: 00033203 ld x4,0(x6) + 80004324: 00120c63 beq x4,x1,8000433c + 80004328: 1d9032ef jal x5,80007d00 + 8000432c: 8000431c .word 0x8000431c + 80004330: 00000000 .word 0x00000000 + 80004334: 80014e19 .word 0x80014e19 + 80004338: 00000000 .word 0x00000000 + 8000433c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000000ffffffff + 80004340: 0001b803 ld x16,0(x3) + 80004344: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xfffffffffffffffe + 80004348: 0001b783 ld x15,0(x3) + 8000434c: 00818193 addi x3,x3,8 + +0000000080004350 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + ror x11, x16, x15 # perform operation + 80004350: 60f855b3 ror x11,x16,x15 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004354: 00033203 ld x4,0(x6) + 80004358: 00b20c63 beq x4,x11,80004370 + 8000435c: 1a5032ef jal x5,80007d00 + 80004360: 80004350 .word 0x80004350 + 80004364: 00000000 .word 0x00000000 + 80004368: 80014e7f .word 0x80014e7f + 8000436c: 00000000 .word 0x00000000 + 80004370: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x00000000ffffffff + 80004374: 0001b083 ld x1,0(x3) + 80004378: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 8000437c: 0001bb83 ld x23,0(x3) + 80004380: 00818193 addi x3,x3,8 + +0000000080004384 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + ror x17, x1, x23 # perform operation + 80004384: 6170d8b3 ror x17,x1,x23 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004388: 00033203 ld x4,0(x6) + 8000438c: 01120c63 beq x4,x17,800043a4 + 80004390: 171032ef jal x5,80007d00 + 80004394: 80004384 .word 0x80004384 + 80004398: 00000000 .word 0x00000000 + 8000439c: 80014ee5 .word 0x80014ee5 + 800043a0: 00000000 .word 0x00000000 + 800043a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x00000000ffffffff + 800043a8: 0001be03 ld x28,0(x3) + 800043ac: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 800043b0: 0001ba03 ld x20,0(x3) + 800043b4: 00818193 addi x3,x3,8 + +00000000800043b8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + ror x12, x28, x20 # perform operation + 800043b8: 614e5633 ror x12,x28,x20 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043bc: 00033203 ld x4,0(x6) + 800043c0: 00c20c63 beq x4,x12,800043d8 + 800043c4: 13d032ef jal x5,80007d00 + 800043c8: 800043b8 .word 0x800043b8 + 800043cc: 00000000 .word 0x00000000 + 800043d0: 80014f4b .word 0x80014f4b + 800043d4: 00000000 .word 0x00000000 + 800043d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000ffffffff + 800043dc: 0001bf03 ld x30,0(x3) + 800043e0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x5555555555555555 + 800043e4: 0001bd83 ld x27,0(x3) + 800043e8: 00818193 addi x3,x3,8 + +00000000800043ec : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + ror x16, x30, x27 # perform operation + 800043ec: 61bf5833 ror x16,x30,x27 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f0: 00033203 ld x4,0(x6) + 800043f4: 01020c63 beq x4,x16,8000440c + 800043f8: 109032ef jal x5,80007d00 + 800043fc: 800043ec .word 0x800043ec + 80004400: 00000000 .word 0x00000000 + 80004404: 80014fb1 .word 0x80014fb1 + 80004408: 00000000 .word 0x00000000 + 8000440c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x00000000ffffffff + 80004410: 0001bb03 ld x22,0(x3) + 80004414: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x00000000ffffffff + 80004418: 0001bd83 ld x27,0(x3) + 8000441c: 00818193 addi x3,x3,8 + +0000000080004420 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + ror x7, x22, x27 # perform operation + 80004420: 61bb53b3 ror x7,x22,x27 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004424: 00033203 ld x4,0(x6) + 80004428: 00720c63 beq x4,x7,80004440 + 8000442c: 0d5032ef jal x5,80007d00 + 80004430: 80004420 .word 0x80004420 + 80004434: 00000000 .word 0x00000000 + 80004438: 80015017 .word 0x80015017 + 8000443c: 00000000 .word 0x00000000 + 80004440: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x00000000ffffffff + 80004444: 0001ba83 ld x21,0(x3) + 80004448: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x00000000fffffffe + 8000444c: 0001b383 ld x7,0(x3) + 80004450: 00818193 addi x3,x3,8 + +0000000080004454 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + ror x25, x21, x7 # perform operation + 80004454: 607adcb3 ror x25,x21,x7 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004458: 00033203 ld x4,0(x6) + 8000445c: 01920c63 beq x4,x25,80004474 + 80004460: 0a1032ef jal x5,80007d00 + 80004464: 80004454 .word 0x80004454 + 80004468: 00000000 .word 0x00000000 + 8000446c: 80015075 .word 0x80015075 + 80004470: 00000000 .word 0x00000000 + 80004474: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x00000000ffffffff + 80004478: 0001bf83 ld x31,0(x3) + 8000447c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x0000000100000000 + 80004480: 0001b403 ld x8,0(x3) + 80004484: 00818193 addi x3,x3,8 + +0000000080004488 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + ror x30, x31, x8 # perform operation + 80004488: 608fdf33 ror x30,x31,x8 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 8000448c: 00033203 ld x4,0(x6) + 80004490: 01e20c63 beq x4,x30,800044a8 + 80004494: 06d032ef jal x5,80007d00 + 80004498: 80004488 .word 0x80004488 + 8000449c: 00000000 .word 0x00000000 + 800044a0: 800150d3 .word 0x800150d3 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x00000000ffffffff + 800044ac: 0001b383 ld x7,0(x3) + 800044b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x0000000100000001 + 800044b4: 0001bd03 ld x26,0(x3) + 800044b8: 00818193 addi x3,x3,8 + +00000000800044bc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + ror x22, x7, x26 # perform operation + 800044bc: 61a3db33 ror x22,x7,x26 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c0: 00033203 ld x4,0(x6) + 800044c4: 01620c63 beq x4,x22,800044dc + 800044c8: 039032ef jal x5,80007d00 + 800044cc: 800044bc .word 0x800044bc + 800044d0: 00000000 .word 0x00000000 + 800044d4: 80015132 .word 0x80015132 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000000fffffffe + 800044e0: 0001bc03 ld x24,0(x3) + 800044e4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x0000000000000000 + 800044e8: 0001b483 ld x9,0(x3) + 800044ec: 00818193 addi x3,x3,8 + +00000000800044f0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + ror x1, x24, x9 # perform operation + 800044f0: 609c50b3 ror x1,x24,x9 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f4: 00033203 ld x4,0(x6) + 800044f8: 00120c63 beq x4,x1,80004510 + 800044fc: 005032ef jal x5,80007d00 + 80004500: 800044f0 .word 0x800044f0 + 80004504: 00000000 .word 0x00000000 + 80004508: 80015191 .word 0x80015191 + 8000450c: 00000000 .word 0x00000000 + 80004510: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x00000000fffffffe + 80004514: 0001ba83 ld x21,0(x3) + 80004518: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x0000000000000001 + 8000451c: 0001b403 ld x8,0(x3) + 80004520: 00818193 addi x3,x3,8 + +0000000080004524 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + ror x2, x21, x8 # perform operation + 80004524: 608ad133 ror x2,x21,x8 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004528: 00033203 ld x4,0(x6) + 8000452c: 00220c63 beq x4,x2,80004544 + 80004530: 7d0032ef jal x5,80007d00 + 80004534: 80004524 .word 0x80004524 + 80004538: 00000000 .word 0x00000000 + 8000453c: 800151e8 .word 0x800151e8 + 80004540: 00000000 .word 0x00000000 + 80004544: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x00000000fffffffe + 80004548: 0001b803 ld x16,0(x3) + 8000454c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x0000000000000002 + 80004550: 0001bd03 ld x26,0(x3) + 80004554: 00818193 addi x3,x3,8 + +0000000080004558 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + ror x15, x16, x26 # perform operation + 80004558: 61a857b3 ror x15,x16,x26 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 8000455c: 00033203 ld x4,0(x6) + 80004560: 00f20c63 beq x4,x15,80004578 + 80004564: 79c032ef jal x5,80007d00 + 80004568: 80004558 .word 0x80004558 + 8000456c: 00000000 .word 0x00000000 + 80004570: 8001523f .word 0x8001523f + 80004574: 00000000 .word 0x00000000 + 80004578: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000000fffffffe + 8000457c: 0001bc83 ld x25,0(x3) + 80004580: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x8000000000000000 + 80004584: 0001b403 ld x8,0(x3) + 80004588: 00818193 addi x3,x3,8 + +000000008000458c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + ror x30, x25, x8 # perform operation + 8000458c: 608cdf33 ror x30,x25,x8 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004590: 00033203 ld x4,0(x6) + 80004594: 01e20c63 beq x4,x30,800045ac + 80004598: 768032ef jal x5,80007d00 + 8000459c: 8000458c .word 0x8000458c + 800045a0: 00000000 .word 0x00000000 + 800045a4: 80015296 .word 0x80015296 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x00000000fffffffe + 800045b0: 0001bc83 ld x25,0(x3) + 800045b4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x8000000000000001 + 800045b8: 0001bf83 ld x31,0(x3) + 800045bc: 00818193 addi x3,x3,8 + +00000000800045c0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + ror x9, x25, x31 # perform operation + 800045c0: 61fcd4b3 ror x9,x25,x31 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c4: 00033203 ld x4,0(x6) + 800045c8: 00920c63 beq x4,x9,800045e0 + 800045cc: 734032ef jal x5,80007d00 + 800045d0: 800045c0 .word 0x800045c0 + 800045d4: 00000000 .word 0x00000000 + 800045d8: 800152fc .word 0x800152fc + 800045dc: 00000000 .word 0x00000000 + 800045e0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000000fffffffe + 800045e4: 0001ba03 ld x20,0(x3) + 800045e8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7fffffffffffffff + 800045ec: 0001b603 ld x12,0(x3) + 800045f0: 00818193 addi x3,x3,8 + +00000000800045f4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + ror x16, x20, x12 # perform operation + 800045f4: 60ca5833 ror x16,x20,x12 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f8: 00033203 ld x4,0(x6) + 800045fc: 01020c63 beq x4,x16,80004614 + 80004600: 700032ef jal x5,80007d00 + 80004604: 800045f4 .word 0x800045f4 + 80004608: 00000000 .word 0x00000000 + 8000460c: 80015362 .word 0x80015362 + 80004610: 00000000 .word 0x00000000 + 80004614: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000fffffffe + 80004618: 0001bf03 ld x30,0(x3) + 8000461c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80004620: 0001b783 ld x15,0(x3) + 80004624: 00818193 addi x3,x3,8 + +0000000080004628 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + ror x11, x30, x15 # perform operation + 80004628: 60ff55b3 ror x11,x30,x15 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 8000462c: 00033203 ld x4,0(x6) + 80004630: 00b20c63 beq x4,x11,80004648 + 80004634: 6cc032ef jal x5,80007d00 + 80004638: 80004628 .word 0x80004628 + 8000463c: 00000000 .word 0x00000000 + 80004640: 800153c8 .word 0x800153c8 + 80004644: 00000000 .word 0x00000000 + 80004648: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x00000000fffffffe + 8000464c: 0001b103 ld x2,0(x3) + 80004650: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xffffffffffffffff + 80004654: 0001bf03 ld x30,0(x3) + 80004658: 00818193 addi x3,x3,8 + +000000008000465c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + ror x10, x2, x30 # perform operation + 8000465c: 61e15533 ror x10,x2,x30 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004660: 00033203 ld x4,0(x6) + 80004664: 00a20c63 beq x4,x10,8000467c + 80004668: 698032ef jal x5,80007d00 + 8000466c: 8000465c .word 0x8000465c + 80004670: 00000000 .word 0x00000000 + 80004674: 8001542e .word 0x8001542e + 80004678: 00000000 .word 0x00000000 + 8000467c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x00000000fffffffe + 80004680: 0001ba03 ld x20,0(x3) + 80004684: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xfffffffffffffffe + 80004688: 0001bd03 ld x26,0(x3) + 8000468c: 00818193 addi x3,x3,8 + +0000000080004690 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + ror x27, x20, x26 # perform operation + 80004690: 61aa5db3 ror x27,x20,x26 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004694: 00033203 ld x4,0(x6) + 80004698: 01b20c63 beq x4,x27,800046b0 + 8000469c: 664032ef jal x5,80007d00 + 800046a0: 80004690 .word 0x80004690 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 80015494 .word 0x80015494 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000000fffffffe + 800046b4: 0001bc03 ld x24,0(x3) + 800046b8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 800046bc: 0001bb03 ld x22,0(x3) + 800046c0: 00818193 addi x3,x3,8 + +00000000800046c4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + ror x12, x24, x22 # perform operation + 800046c4: 616c5633 ror x12,x24,x22 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c8: 00033203 ld x4,0(x6) + 800046cc: 00c20c63 beq x4,x12,800046e4 + 800046d0: 630032ef jal x5,80007d00 + 800046d4: 800046c4 .word 0x800046c4 + 800046d8: 00000000 .word 0x00000000 + 800046dc: 800154fa .word 0x800154fa + 800046e0: 00000000 .word 0x00000000 + 800046e4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x00000000fffffffe + 800046e8: 0001bc03 ld x24,0(x3) + 800046ec: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800046f0: 0001b583 ld x11,0(x3) + 800046f4: 00818193 addi x3,x3,8 + +00000000800046f8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + ror x16, x24, x11 # perform operation + 800046f8: 60bc5833 ror x16,x24,x11 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046fc: 00033203 ld x4,0(x6) + 80004700: 01020c63 beq x4,x16,80004718 + 80004704: 5fc032ef jal x5,80007d00 + 80004708: 800046f8 .word 0x800046f8 + 8000470c: 00000000 .word 0x00000000 + 80004710: 80015560 .word 0x80015560 + 80004714: 00000000 .word 0x00000000 + 80004718: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x00000000fffffffe + 8000471c: 0001bb83 ld x23,0(x3) + 80004720: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x5555555555555555 + 80004724: 0001b483 ld x9,0(x3) + 80004728: 00818193 addi x3,x3,8 + +000000008000472c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + ror x24, x23, x9 # perform operation + 8000472c: 609bdc33 ror x24,x23,x9 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004730: 00033203 ld x4,0(x6) + 80004734: 01820c63 beq x4,x24,8000474c + 80004738: 5c8032ef jal x5,80007d00 + 8000473c: 8000472c .word 0x8000472c + 80004740: 00000000 .word 0x00000000 + 80004744: 800155c6 .word 0x800155c6 + 80004748: 00000000 .word 0x00000000 + 8000474c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x00000000fffffffe + 80004750: 0001bf03 ld x30,0(x3) + 80004754: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x00000000ffffffff + 80004758: 0001bc03 ld x24,0(x3) + 8000475c: 00818193 addi x3,x3,8 + +0000000080004760 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + ror x27, x30, x24 # perform operation + 80004760: 618f5db3 ror x27,x30,x24 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004764: 00033203 ld x4,0(x6) + 80004768: 01b20c63 beq x4,x27,80004780 + 8000476c: 594032ef jal x5,80007d00 + 80004770: 80004760 .word 0x80004760 + 80004774: 00000000 .word 0x00000000 + 80004778: 8001562c .word 0x8001562c + 8000477c: 00000000 .word 0x00000000 + 80004780: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x00000000fffffffe + 80004784: 0001b583 ld x11,0(x3) + 80004788: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0x00000000fffffffe + 8000478c: 0001b703 ld x14,0(x3) + 80004790: 00818193 addi x3,x3,8 + +0000000080004794 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + ror x1, x11, x14 # perform operation + 80004794: 60e5d0b3 ror x1,x11,x14 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004798: 00033203 ld x4,0(x6) + 8000479c: 00120c63 beq x4,x1,800047b4 + 800047a0: 560032ef jal x5,80007d00 + 800047a4: 80004794 .word 0x80004794 + 800047a8: 00000000 .word 0x00000000 + 800047ac: 8001568a .word 0x8001568a + 800047b0: 00000000 .word 0x00000000 + 800047b4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x00000000fffffffe + 800047b8: 0001b883 ld x17,0(x3) + 800047bc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x0000000100000000 + 800047c0: 0001bd03 ld x26,0(x3) + 800047c4: 00818193 addi x3,x3,8 + +00000000800047c8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + ror x14, x17, x26 # perform operation + 800047c8: 61a8d733 ror x14,x17,x26 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047cc: 00033203 ld x4,0(x6) + 800047d0: 00e20c63 beq x4,x14,800047e8 + 800047d4: 52c032ef jal x5,80007d00 + 800047d8: 800047c8 .word 0x800047c8 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 800156e8 .word 0x800156e8 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x00000000fffffffe + 800047ec: 0001b103 ld x2,0(x3) + 800047f0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x0000000100000001 + 800047f4: 0001b483 ld x9,0(x3) + 800047f8: 00818193 addi x3,x3,8 + +00000000800047fc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + ror x16, x2, x9 # perform operation + 800047fc: 60915833 ror x16,x2,x9 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004800: 00033203 ld x4,0(x6) + 80004804: 01020c63 beq x4,x16,8000481c + 80004808: 4f8032ef jal x5,80007d00 + 8000480c: 800047fc .word 0x800047fc + 80004810: 00000000 .word 0x00000000 + 80004814: 80015747 .word 0x80015747 + 80004818: 00000000 .word 0x00000000 + 8000481c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000100000000 + 80004820: 0001b603 ld x12,0(x3) + 80004824: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x0000000000000000 + 80004828: 0001b883 ld x17,0(x3) + 8000482c: 00818193 addi x3,x3,8 + +0000000080004830 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + ror x25, x12, x17 # perform operation + 80004830: 61165cb3 ror x25,x12,x17 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004834: 00033203 ld x4,0(x6) + 80004838: 01920c63 beq x4,x25,80004850 + 8000483c: 4c4032ef jal x5,80007d00 + 80004840: 80004830 .word 0x80004830 + 80004844: 00000000 .word 0x00000000 + 80004848: 800157a6 .word 0x800157a6 + 8000484c: 00000000 .word 0x00000000 + 80004850: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x0000000100000000 + 80004854: 0001b483 ld x9,0(x3) + 80004858: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x0000000000000001 + 8000485c: 0001b803 ld x16,0(x3) + 80004860: 00818193 addi x3,x3,8 + +0000000080004864 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + ror x8, x9, x16 # perform operation + 80004864: 6104d433 ror x8,x9,x16 + # Check if x8 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x8, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004868: 00033203 ld x4,0(x6) + 8000486c: 00820c63 beq x4,x8,80004884 + 80004870: 490032ef jal x5,80007d00 + 80004874: 80004864 .word 0x80004864 + 80004878: 00000000 .word 0x00000000 + 8000487c: 800157fe .word 0x800157fe + 80004880: 00000000 .word 0x00000000 + 80004884: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x0000000100000000 + 80004888: 0001bf83 ld x31,0(x3) + 8000488c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x0000000000000002 + 80004890: 0001ba03 ld x20,0(x3) + 80004894: 00818193 addi x3,x3,8 + +0000000080004898 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + ror x25, x31, x20 # perform operation + 80004898: 614fdcb3 ror x25,x31,x20 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 8000489c: 00033203 ld x4,0(x6) + 800048a0: 01920c63 beq x4,x25,800048b8 + 800048a4: 45c032ef jal x5,80007d00 + 800048a8: 80004898 .word 0x80004898 + 800048ac: 00000000 .word 0x00000000 + 800048b0: 80015856 .word 0x80015856 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000100000000 + 800048bc: 0001b783 ld x15,0(x3) + 800048c0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x8000000000000000 + 800048c4: 0001b383 ld x7,0(x3) + 800048c8: 00818193 addi x3,x3,8 + +00000000800048cc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + ror x12, x15, x7 # perform operation + 800048cc: 6077d633 ror x12,x15,x7 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d0: 00033203 ld x4,0(x6) + 800048d4: 00c20c63 beq x4,x12,800048ec + 800048d8: 428032ef jal x5,80007d00 + 800048dc: 800048cc .word 0x800048cc + 800048e0: 00000000 .word 0x00000000 + 800048e4: 800158ae .word 0x800158ae + 800048e8: 00000000 .word 0x00000000 + 800048ec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x0000000100000000 + 800048f0: 0001bd03 ld x26,0(x3) + 800048f4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x8000000000000001 + 800048f8: 0001b783 ld x15,0(x3) + 800048fc: 00818193 addi x3,x3,8 + +0000000080004900 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + ror x22, x26, x15 # perform operation + 80004900: 60fd5b33 ror x22,x26,x15 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004904: 00033203 ld x4,0(x6) + 80004908: 01620c63 beq x4,x22,80004920 + 8000490c: 3f4032ef jal x5,80007d00 + 80004910: 80004900 .word 0x80004900 + 80004914: 00000000 .word 0x00000000 + 80004918: 80015915 .word 0x80015915 + 8000491c: 00000000 .word 0x00000000 + 80004920: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x0000000100000000 + 80004924: 0001bd83 ld x27,0(x3) + 80004928: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x7fffffffffffffff + 8000492c: 0001b603 ld x12,0(x3) + 80004930: 00818193 addi x3,x3,8 + +0000000080004934 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + ror x1, x27, x12 # perform operation + 80004934: 60cdd0b3 ror x1,x27,x12 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004938: 00033203 ld x4,0(x6) + 8000493c: 00120c63 beq x4,x1,80004954 + 80004940: 3c0032ef jal x5,80007d00 + 80004944: 80004934 .word 0x80004934 + 80004948: 00000000 .word 0x00000000 + 8000494c: 8001597c .word 0x8001597c + 80004950: 00000000 .word 0x00000000 + 80004954: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x0000000100000000 + 80004958: 0001b683 ld x13,0(x3) + 8000495c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80004960: 0001ba03 ld x20,0(x3) + 80004964: 00818193 addi x3,x3,8 + +0000000080004968 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + ror x1, x13, x20 # perform operation + 80004968: 6146d0b3 ror x1,x13,x20 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 8000496c: 00033203 ld x4,0(x6) + 80004970: 00120c63 beq x4,x1,80004988 + 80004974: 38c032ef jal x5,80007d00 + 80004978: 80004968 .word 0x80004968 + 8000497c: 00000000 .word 0x00000000 + 80004980: 800159e3 .word 0x800159e3 + 80004984: 00000000 .word 0x00000000 + 80004988: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000100000000 + 8000498c: 0001b803 ld x16,0(x3) + 80004990: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xffffffffffffffff + 80004994: 0001b583 ld x11,0(x3) + 80004998: 00818193 addi x3,x3,8 + +000000008000499c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + ror x1, x16, x11 # perform operation + 8000499c: 60b850b3 ror x1,x16,x11 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a0: 00033203 ld x4,0(x6) + 800049a4: 00120c63 beq x4,x1,800049bc + 800049a8: 358032ef jal x5,80007d00 + 800049ac: 8000499c .word 0x8000499c + 800049b0: 00000000 .word 0x00000000 + 800049b4: 80015a4a .word 0x80015a4a + 800049b8: 00000000 .word 0x00000000 + 800049bc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x0000000100000000 + 800049c0: 0001bf83 ld x31,0(x3) + 800049c4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0xfffffffffffffffe + 800049c8: 0001b803 ld x16,0(x3) + 800049cc: 00818193 addi x3,x3,8 + +00000000800049d0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + ror x29, x31, x16 # perform operation + 800049d0: 610fdeb3 ror x29,x31,x16 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d4: 00033203 ld x4,0(x6) + 800049d8: 01d20c63 beq x4,x29,800049f0 + 800049dc: 324032ef jal x5,80007d00 + 800049e0: 800049d0 .word 0x800049d0 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 80015ab1 .word 0x80015ab1 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x0000000100000000 + 800049f4: 0001bd03 ld x26,0(x3) + 800049f8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 800049fc: 0001bc03 ld x24,0(x3) + 80004a00: 00818193 addi x3,x3,8 + +0000000080004a04 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + ror x19, x26, x24 # perform operation + 80004a04: 618d59b3 ror x19,x26,x24 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a08: 00033203 ld x4,0(x6) + 80004a0c: 01320c63 beq x4,x19,80004a24 + 80004a10: 2f0032ef jal x5,80007d00 + 80004a14: 80004a04 .word 0x80004a04 + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 80015b18 .word 0x80015b18 + 80004a20: 00000000 .word 0x00000000 + 80004a24: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x0000000100000000 + 80004a28: 0001b083 ld x1,0(x3) + 80004a2c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80004a30: 0001bb03 ld x22,0(x3) + 80004a34: 00818193 addi x3,x3,8 + +0000000080004a38 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + ror x23, x1, x22 # perform operation + 80004a38: 6160dbb3 ror x23,x1,x22 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a3c: 00033203 ld x4,0(x6) + 80004a40: 01720c63 beq x4,x23,80004a58 + 80004a44: 2bc032ef jal x5,80007d00 + 80004a48: 80004a38 .word 0x80004a38 + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 80015b7f .word 0x80015b7f + 80004a54: 00000000 .word 0x00000000 + 80004a58: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000100000000 + 80004a5c: 0001b783 ld x15,0(x3) + 80004a60: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x5555555555555555 + 80004a64: 0001b803 ld x16,0(x3) + 80004a68: 00818193 addi x3,x3,8 + +0000000080004a6c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + ror x26, x15, x16 # perform operation + 80004a6c: 6107dd33 ror x26,x15,x16 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a70: 00033203 ld x4,0(x6) + 80004a74: 01a20c63 beq x4,x26,80004a8c + 80004a78: 288032ef jal x5,80007d00 + 80004a7c: 80004a6c .word 0x80004a6c + 80004a80: 00000000 .word 0x00000000 + 80004a84: 80015be6 .word 0x80015be6 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x0000000100000000 + 80004a90: 0001b883 ld x17,0(x3) + 80004a94: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x00000000ffffffff + 80004a98: 0001b503 ld x10,0(x3) + 80004a9c: 00818193 addi x3,x3,8 + +0000000080004aa0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + ror x11, x17, x10 # perform operation + 80004aa0: 60a8d5b3 ror x11,x17,x10 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa4: 00033203 ld x4,0(x6) + 80004aa8: 00b20c63 beq x4,x11,80004ac0 + 80004aac: 254032ef jal x5,80007d00 + 80004ab0: 80004aa0 .word 0x80004aa0 + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 80015c4d .word 0x80015c4d + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x0000000100000000 + 80004ac4: 0001b903 ld x18,0(x3) + 80004ac8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0x00000000fffffffe + 80004acc: 0001b783 ld x15,0(x3) + 80004ad0: 00818193 addi x3,x3,8 + +0000000080004ad4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + ror x17, x18, x15 # perform operation + 80004ad4: 60f958b3 ror x17,x18,x15 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad8: 00033203 ld x4,0(x6) + 80004adc: 01120c63 beq x4,x17,80004af4 + 80004ae0: 220032ef jal x5,80007d00 + 80004ae4: 80004ad4 .word 0x80004ad4 + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 80015cac .word 0x80015cac + 80004af0: 00000000 .word 0x00000000 + 80004af4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x0000000100000000 + 80004af8: 0001bf03 ld x30,0(x3) + 80004afc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x0000000100000000 + 80004b00: 0001b603 ld x12,0(x3) + 80004b04: 00818193 addi x3,x3,8 + +0000000080004b08 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + ror x14, x30, x12 # perform operation + 80004b08: 60cf5733 ror x14,x30,x12 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b0c: 00033203 ld x4,0(x6) + 80004b10: 00e20c63 beq x4,x14,80004b28 + 80004b14: 1ec032ef jal x5,80007d00 + 80004b18: 80004b08 .word 0x80004b08 + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 80015d0b .word 0x80015d0b + 80004b24: 00000000 .word 0x00000000 + 80004b28: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000100000000 + 80004b2c: 0001b803 ld x16,0(x3) + 80004b30: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x0000000100000001 + 80004b34: 0001bf03 ld x30,0(x3) + 80004b38: 00818193 addi x3,x3,8 + +0000000080004b3c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + ror x1, x16, x30 # perform operation + 80004b3c: 61e850b3 ror x1,x16,x30 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b40: 00033203 ld x4,0(x6) + 80004b44: 00120c63 beq x4,x1,80004b5c + 80004b48: 1b8032ef jal x5,80007d00 + 80004b4c: 80004b3c .word 0x80004b3c + 80004b50: 00000000 .word 0x00000000 + 80004b54: 80015d6b .word 0x80015d6b + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x0000000100000001 + 80004b60: 0001b903 ld x18,0(x3) + 80004b64: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x0000000000000000 + 80004b68: 0001bf83 ld x31,0(x3) + 80004b6c: 00818193 addi x3,x3,8 + +0000000080004b70 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + ror x27, x18, x31 # perform operation + 80004b70: 61f95db3 ror x27,x18,x31 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b74: 00033203 ld x4,0(x6) + 80004b78: 01b20c63 beq x4,x27,80004b90 + 80004b7c: 184032ef jal x5,80007d00 + 80004b80: 80004b70 .word 0x80004b70 + 80004b84: 00000000 .word 0x00000000 + 80004b88: 80015dcb .word 0x80015dcb + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x0000000100000001 + 80004b94: 0001b783 ld x15,0(x3) + 80004b98: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x0000000000000001 + 80004b9c: 0001b383 ld x7,0(x3) + 80004ba0: 00818193 addi x3,x3,8 + +0000000080004ba4 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + ror x10, x15, x7 # perform operation + 80004ba4: 6077d533 ror x10,x15,x7 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba8: 00033203 ld x4,0(x6) + 80004bac: 00a20c63 beq x4,x10,80004bc4 + 80004bb0: 150032ef jal x5,80007d00 + 80004bb4: 80004ba4 .word 0x80004ba4 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 80015e23 .word 0x80015e23 + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs1: x8 = 0x0000000100000001 + 80004bc8: 0001b403 ld x8,0(x3) + 80004bcc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x0000000000000002 + 80004bd0: 0001be83 ld x29,0(x3) + 80004bd4: 00818193 addi x3,x3,8 + +0000000080004bd8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + ror x28, x8, x29 # perform operation + 80004bd8: 61d45e33 ror x28,x8,x29 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bdc: 00033203 ld x4,0(x6) + 80004be0: 01c20c63 beq x4,x28,80004bf8 + 80004be4: 11c032ef jal x5,80007d00 + 80004be8: 80004bd8 .word 0x80004bd8 + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 80015e7b .word 0x80015e7b + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x0000000100000001 + 80004bfc: 0001bb03 ld x22,0(x3) + 80004c00: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0x8000000000000000 + 80004c04: 0001b403 ld x8,0(x3) + 80004c08: 00818193 addi x3,x3,8 + +0000000080004c0c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + ror x24, x22, x8 # perform operation + 80004c0c: 608b5c33 ror x24,x22,x8 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c10: 00033203 ld x4,0(x6) + 80004c14: 01820c63 beq x4,x24,80004c2c + 80004c18: 0e8032ef jal x5,80007d00 + 80004c1c: 80004c0c .word 0x80004c0c + 80004c20: 00000000 .word 0x00000000 + 80004c24: 80015ed3 .word 0x80015ed3 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000100000001 + 80004c30: 0001b803 ld x16,0(x3) + 80004c34: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x8000000000000001 + 80004c38: 0001bb03 ld x22,0(x3) + 80004c3c: 00818193 addi x3,x3,8 + +0000000080004c40 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + ror x14, x16, x22 # perform operation + 80004c40: 61685733 ror x14,x16,x22 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c44: 00033203 ld x4,0(x6) + 80004c48: 00e20c63 beq x4,x14,80004c60 + 80004c4c: 0b4032ef jal x5,80007d00 + 80004c50: 80004c40 .word 0x80004c40 + 80004c54: 00000000 .word 0x00000000 + 80004c58: 80015f3a .word 0x80015f3a + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x0000000100000001 + 80004c64: 0001be03 ld x28,0(x3) + 80004c68: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x7fffffffffffffff + 80004c6c: 0001bd83 ld x27,0(x3) + 80004c70: 00818193 addi x3,x3,8 + +0000000080004c74 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + ror x21, x28, x27 # perform operation + 80004c74: 61be5ab3 ror x21,x28,x27 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c78: 00033203 ld x4,0(x6) + 80004c7c: 01520c63 beq x4,x21,80004c94 + 80004c80: 080032ef jal x5,80007d00 + 80004c84: 80004c74 .word 0x80004c74 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 80015fa1 .word 0x80015fa1 + 80004c90: 00000000 .word 0x00000000 + 80004c94: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x0000000100000001 + 80004c98: 0001be83 ld x29,0(x3) + 80004c9c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80004ca0: 0001b503 ld x10,0(x3) + 80004ca4: 00818193 addi x3,x3,8 + +0000000080004ca8 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + ror x28, x29, x10 # perform operation + 80004ca8: 60aede33 ror x28,x29,x10 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cac: 00033203 ld x4,0(x6) + 80004cb0: 01c20c63 beq x4,x28,80004cc8 + 80004cb4: 04c032ef jal x5,80007d00 + 80004cb8: 80004ca8 .word 0x80004ca8 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 80016008 .word 0x80016008 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000100000001 + 80004ccc: 0001b603 ld x12,0(x3) + 80004cd0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xffffffffffffffff + 80004cd4: 0001b703 ld x14,0(x3) + 80004cd8: 00818193 addi x3,x3,8 + +0000000080004cdc : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + ror x25, x12, x14 # perform operation + 80004cdc: 60e65cb3 ror x25,x12,x14 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce0: 00033203 ld x4,0(x6) + 80004ce4: 01920c63 beq x4,x25,80004cfc + 80004ce8: 018032ef jal x5,80007d00 + 80004cec: 80004cdc .word 0x80004cdc + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 8001606f .word 0x8001606f + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000100000001 + 80004d00: 0001b803 ld x16,0(x3) + 80004d04: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xfffffffffffffffe + 80004d08: 0001bb83 ld x23,0(x3) + 80004d0c: 00818193 addi x3,x3,8 + +0000000080004d10 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + ror x27, x16, x23 # perform operation + 80004d10: 61785db3 ror x27,x16,x23 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d14: 00033203 ld x4,0(x6) + 80004d18: 01b20c63 beq x4,x27,80004d30 + 80004d1c: 7e5022ef jal x5,80007d00 + 80004d20: 80004d10 .word 0x80004d10 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 800160d6 .word 0x800160d6 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x0000000100000001 + 80004d34: 0001bc03 ld x24,0(x3) + 80004d38: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004d3c: 0001b683 ld x13,0(x3) + 80004d40: 00818193 addi x3,x3,8 + +0000000080004d44 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + ror x18, x24, x13 # perform operation + 80004d44: 60dc5933 ror x18,x24,x13 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d48: 00033203 ld x4,0(x6) + 80004d4c: 01220c63 beq x4,x18,80004d64 + 80004d50: 7b1022ef jal x5,80007d00 + 80004d54: 80004d44 .word 0x80004d44 + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 8001613d .word 0x8001613d + 80004d60: 00000000 .word 0x00000000 + 80004d64: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0000000100000001 + 80004d68: 0001b103 ld x2,0(x3) + 80004d6c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80004d70: 0001b483 ld x9,0(x3) + 80004d74: 00818193 addi x3,x3,8 + +0000000080004d78 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + ror x24, x2, x9 # perform operation + 80004d78: 60915c33 ror x24,x2,x9 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d7c: 00033203 ld x4,0(x6) + 80004d80: 01820c63 beq x4,x24,80004d98 + 80004d84: 77d022ef jal x5,80007d00 + 80004d88: 80004d78 .word 0x80004d78 + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 800161a4 .word 0x800161a4 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x0000000100000001 + 80004d9c: 0001bb03 ld x22,0(x3) + 80004da0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x5555555555555555 + 80004da4: 0001bd03 ld x26,0(x3) + 80004da8: 00818193 addi x3,x3,8 + +0000000080004dac : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + ror x16, x22, x26 # perform operation + 80004dac: 61ab5833 ror x16,x22,x26 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db0: 00033203 ld x4,0(x6) + 80004db4: 01020c63 beq x4,x16,80004dcc + 80004db8: 749022ef jal x5,80007d00 + 80004dbc: 80004dac .word 0x80004dac + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 8001620b .word 0x8001620b + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x0000000100000001 + 80004dd0: 0001bc03 ld x24,0(x3) + 80004dd4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x00000000ffffffff + 80004dd8: 0001b103 ld x2,0(x3) + 80004ddc: 00818193 addi x3,x3,8 + +0000000080004de0 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + ror x25, x24, x2 # perform operation + 80004de0: 602c5cb3 ror x25,x24,x2 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de4: 00033203 ld x4,0(x6) + 80004de8: 01920c63 beq x4,x25,80004e00 + 80004dec: 715022ef jal x5,80007d00 + 80004df0: 80004de0 .word 0x80004de0 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 80016272 .word 0x80016272 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x0000000100000001 + 80004e04: 0001be83 ld x29,0(x3) + 80004e08: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x00000000fffffffe + 80004e0c: 0001b603 ld x12,0(x3) + 80004e10: 00818193 addi x3,x3,8 + +0000000080004e14 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + ror x9, x29, x12 # perform operation + 80004e14: 60ced4b3 ror x9,x29,x12 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e18: 00033203 ld x4,0(x6) + 80004e1c: 00920c63 beq x4,x9,80004e34 + 80004e20: 6e1022ef jal x5,80007d00 + 80004e24: 80004e14 .word 0x80004e14 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 800162d1 .word 0x800162d1 + 80004e30: 00000000 .word 0x00000000 + 80004e34: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x0000000100000001 + 80004e38: 0001bd03 ld x26,0(x3) + 80004e3c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x0000000100000000 + 80004e40: 0001b683 ld x13,0(x3) + 80004e44: 00818193 addi x3,x3,8 + +0000000080004e48 : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + ror x30, x26, x13 # perform operation + 80004e48: 60dd5f33 ror x30,x26,x13 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e4c: 00033203 ld x4,0(x6) + 80004e50: 01e20c63 beq x4,x30,80004e68 + 80004e54: 6ad022ef jal x5,80007d00 + 80004e58: 80004e48 .word 0x80004e48 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 80016330 .word 0x80016330 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x0000000100000001 + 80004e6c: 0001bb03 ld x22,0(x3) + 80004e70: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x0000000100000001 + 80004e74: 0001bd03 ld x26,0(x3) + 80004e78: 00818193 addi x3,x3,8 + +0000000080004e7c : +Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + ror x16, x22, x26 # perform operation + 80004e7c: 61ab5833 ror x16,x22,x26 + # Check if x16 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x16, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_ror_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e80: 00033203 ld x4,0(x6) + 80004e84: 01020c63 beq x4,x16,80004e9c + 80004e88: 679022ef jal x5,80007d00 + 80004e8c: 80004e7c .word 0x80004e7c + 80004e90: 00000000 .word 0x00000000 + 80004e94: 80016390 .word 0x80016390 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xaa5af9f932ba6c17 + 80004ea0: 0001b003 ld x0,0(x3) + 80004ea4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0xc82d9ca7d3b0dab1 + 80004ea8: 0001b003 ld x0,0(x3) + 80004eac: 00818193 addi x3,x3,8 + +0000000080004eb0 : +Zbkb_ror_cg_cmp_rs1_rs2_b0: + ror x14, x0, x0 # perform operation + 80004eb0: 60005733 ror x14,x0,x0 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zbkb_ror_cg_cmp_rs1_rs2_b0, Zbkb_ror_cg_cmp_rs1_rs2_b0_str) + 80004eb4: 00033203 ld x4,0(x6) + 80004eb8: 00e20c63 beq x4,x14,80004ed0 + 80004ebc: 645022ef jal x5,80007d00 + 80004ec0: 80004eb0 .word 0x80004eb0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 800163f0 .word 0x800163f0 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x9d211a1550c157f9 + 80004ed4: 0001b083 ld x1,0(x3) + 80004ed8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xd13268b297f919e4 + 80004edc: 0001b083 ld x1,0(x3) + 80004ee0: 00818193 addi x3,x3,8 + +0000000080004ee4 : +Zbkb_ror_cg_cmp_rs1_rs2_b1: + ror x2, x1, x1 # perform operation + 80004ee4: 6010d133 ror x2,x1,x1 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkb_ror_cg_cmp_rs1_rs2_b1, Zbkb_ror_cg_cmp_rs1_rs2_b1_str) + 80004ee8: 00033203 ld x4,0(x6) + 80004eec: 00220c63 beq x4,x2,80004f04 + 80004ef0: 611022ef jal x5,80007d00 + 80004ef4: 80004ee4 .word 0x80004ee4 + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 80016427 .word 0x80016427 + 80004f00: 00000000 .word 0x00000000 + 80004f04: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x5f5ae525a6cbfe06 + 80004f08: 0001b103 ld x2,0(x3) + 80004f0c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0xdc36f8a1792bcfd3 + 80004f10: 0001b103 ld x2,0(x3) + 80004f14: 00818193 addi x3,x3,8 + +0000000080004f18 : +Zbkb_ror_cg_cmp_rs1_rs2_b2: + ror x11, x2, x2 # perform operation + 80004f18: 602155b3 ror x11,x2,x2 + # Check if x11 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x11, Zbkb_ror_cg_cmp_rs1_rs2_b2, Zbkb_ror_cg_cmp_rs1_rs2_b2_str) + 80004f1c: 00033203 ld x4,0(x6) + 80004f20: 00b20c63 beq x4,x11,80004f38 + 80004f24: 5dd022ef jal x5,80007d00 + 80004f28: 80004f18 .word 0x80004f18 + 80004f2c: 00000000 .word 0x00000000 + 80004f30: 8001645e .word 0x8001645e + 80004f34: 00000000 .word 0x00000000 + 80004f38: 00830313 addi x6,x6,8 + + mv x23, x3 # switch data pointer register to avoid conflict with test + 80004f3c: 00018b93 addi x23,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x495d76f84ab87326 + 80004f40: 000bb183 ld x3,0(x23) + 80004f44: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x54d959188539d90c + 80004f48: 000bb183 ld x3,0(x23) + 80004f4c: 008b8b93 addi x23,x23,8 + +0000000080004f50 : +Zbkb_ror_cg_cmp_rs1_rs2_b3: + ror x10, x3, x3 # perform operation + 80004f50: 6031d533 ror x10,x3,x3 + # Check if x10 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x10, Zbkb_ror_cg_cmp_rs1_rs2_b3, Zbkb_ror_cg_cmp_rs1_rs2_b3_str) + 80004f54: 00033203 ld x4,0(x6) + 80004f58: 00a20c63 beq x4,x10,80004f70 + 80004f5c: 5a5022ef jal x5,80007d00 + 80004f60: 80004f50 .word 0x80004f50 + 80004f64: 00000000 .word 0x00000000 + 80004f68: 80016495 .word 0x80016495 + 80004f6c: 00000000 .word 0x00000000 + 80004f70: 00830313 addi x6,x6,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f74: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f78: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x768efcb19bc3d6af + 80004f7c: 000bb203 ld x4,0(x23) + 80004f80: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xd5e1992210dcba4e + 80004f84: 000bb203 ld x4,0(x23) + 80004f88: 008b8b93 addi x23,x23,8 + +0000000080004f8c : +Zbkb_ror_cg_cmp_rs1_rs2_b4: + ror x31, x4, x4 # perform operation + 80004f8c: 60425fb3 ror x31,x4,x4 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkb_ror_cg_cmp_rs1_rs2_b4, Zbkb_ror_cg_cmp_rs1_rs2_b4_str) + 80004f90: 00033383 ld x7,0(x6) + 80004f94: 01f38c63 beq x7,x31,80004fac + 80004f98: 5810246f jal x8,80007d18 + 80004f9c: 80004f8c .word 0x80004f8c + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 800164cc .word 0x800164cc + 80004fa8: 00000000 .word 0x00000000 + 80004fac: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x5830574cdd770f81 + 80004fb0: 000bb283 ld x5,0(x23) + 80004fb4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xbd4c16ee2b2301b5 + 80004fb8: 000bb283 ld x5,0(x23) + 80004fbc: 008b8b93 addi x23,x23,8 + +0000000080004fc0 : +Zbkb_ror_cg_cmp_rs1_rs2_b5: + ror x1, x5, x5 # perform operation + 80004fc0: 6052d0b3 ror x1,x5,x5 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkb_ror_cg_cmp_rs1_rs2_b5, Zbkb_ror_cg_cmp_rs1_rs2_b5_str) + 80004fc4: 00033383 ld x7,0(x6) + 80004fc8: 00138c63 beq x7,x1,80004fe0 + 80004fcc: 54d0246f jal x8,80007d18 + 80004fd0: 80004fc0 .word 0x80004fc0 + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 80016503 .word 0x80016503 + 80004fdc: 00000000 .word 0x00000000 + 80004fe0: 00830313 addi x6,x6,8 + + mv x19, x6 # switch signature pointer register to avoid conflict with test + 80004fe4: 00030993 addi x19,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x12ca1f53f024c2d9 + 80004fe8: 000bb303 ld x6,0(x23) + 80004fec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x2e3aff8e3d18e8dd + 80004ff0: 000bb303 ld x6,0(x23) + 80004ff4: 008b8b93 addi x23,x23,8 + +0000000080004ff8 : +Zbkb_ror_cg_cmp_rs1_rs2_b6: + ror x31, x6, x6 # perform operation + 80004ff8: 60635fb3 ror x31,x6,x6 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkb_ror_cg_cmp_rs1_rs2_b6, Zbkb_ror_cg_cmp_rs1_rs2_b6_str) + 80004ffc: 0009b383 ld x7,0(x19) + 80005000: 01f38c63 beq x7,x31,80005018 + 80005004: 5150246f jal x8,80007d18 + 80005008: 80004ff8 .word 0x80004ff8 + 8000500c: 00000000 .word 0x00000000 + 80005010: 8001653a .word 0x8001653a + 80005014: 00000000 .word 0x00000000 + 80005018: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000501c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005020: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xaa97713f20dbf7c8 + 80005024: 000bb383 ld x7,0(x23) + 80005028: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xe84f805ae34b026f + 8000502c: 000bb383 ld x7,0(x23) + 80005030: 008b8b93 addi x23,x23,8 + +0000000080005034 : +Zbkb_ror_cg_cmp_rs1_rs2_b7: + ror x15, x7, x7 # perform operation + 80005034: 6073d7b3 ror x15,x7,x7 + # Check if x15 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x15, Zbkb_ror_cg_cmp_rs1_rs2_b7, Zbkb_ror_cg_cmp_rs1_rs2_b7_str) + 80005038: 0009b683 ld x13,0(x19) + 8000503c: 00f68c63 beq x13,x15,80005054 + 80005040: 5010276f jal x14,80007d40 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 80016571 .word 0x80016571 + 80005050: 00000000 .word 0x00000000 + 80005054: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xfefcc93a2a1d348d + 80005058: 000bb403 ld x8,0(x23) + 8000505c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xc26cab75bd1dc524 + 80005060: 000bb403 ld x8,0(x23) + 80005064: 008b8b93 addi x23,x23,8 + +0000000080005068 : +Zbkb_ror_cg_cmp_rs1_rs2_b8: + ror x5, x8, x8 # perform operation + 80005068: 608452b3 ror x5,x8,x8 + # Check if x5 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x5, Zbkb_ror_cg_cmp_rs1_rs2_b8, Zbkb_ror_cg_cmp_rs1_rs2_b8_str) + 8000506c: 0009b683 ld x13,0(x19) + 80005070: 00568c63 beq x13,x5,80005088 + 80005074: 4cd0276f jal x14,80007d40 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 800165a8 .word 0x800165a8 + 80005084: 00000000 .word 0x00000000 + 80005088: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x152de02072b1d164 + 8000508c: 000bb483 ld x9,0(x23) + 80005090: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xeadf35a835c2b272 + 80005094: 000bb483 ld x9,0(x23) + 80005098: 008b8b93 addi x23,x23,8 + +000000008000509c : +Zbkb_ror_cg_cmp_rs1_rs2_b9: + ror x0, x9, x9 # perform operation + 8000509c: 6094d033 ror x0,x9,x9 + # Check if x0 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x0, Zbkb_ror_cg_cmp_rs1_rs2_b9, Zbkb_ror_cg_cmp_rs1_rs2_b9_str) + 800050a0: 0009b683 ld x13,0(x19) + 800050a4: 00068c63 beq x13,x0,800050bc + 800050a8: 4990276f jal x14,80007d40 + 800050ac: 8000509c .word 0x8000509c + 800050b0: 00000000 .word 0x00000000 + 800050b4: 800165df .word 0x800165df + 800050b8: 00000000 .word 0x00000000 + 800050bc: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x65f83f67aece03ae + 800050c0: 000bb503 ld x10,0(x23) + 800050c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x02bd86285592aa79 + 800050c8: 000bb503 ld x10,0(x23) + 800050cc: 008b8b93 addi x23,x23,8 + +00000000800050d0 : +Zbkb_ror_cg_cmp_rs1_rs2_b10: + ror x17, x10, x10 # perform operation + 800050d0: 60a558b3 ror x17,x10,x10 + # Check if x17 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x17, Zbkb_ror_cg_cmp_rs1_rs2_b10, Zbkb_ror_cg_cmp_rs1_rs2_b10_str) + 800050d4: 0009b683 ld x13,0(x19) + 800050d8: 01168c63 beq x13,x17,800050f0 + 800050dc: 4650276f jal x14,80007d40 + 800050e0: 800050d0 .word 0x800050d0 + 800050e4: 00000000 .word 0x00000000 + 800050e8: 80016616 .word 0x80016616 + 800050ec: 00000000 .word 0x00000000 + 800050f0: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x61a6e33ffb69b089 + 800050f4: 000bb583 ld x11,0(x23) + 800050f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x5acdcaef68ad57d2 + 800050fc: 000bb583 ld x11,0(x23) + 80005100: 008b8b93 addi x23,x23,8 + +0000000080005104 : +Zbkb_ror_cg_cmp_rs1_rs2_b11: + ror x0, x11, x11 # perform operation + 80005104: 60b5d033 ror x0,x11,x11 + # Check if x0 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x0, Zbkb_ror_cg_cmp_rs1_rs2_b11, Zbkb_ror_cg_cmp_rs1_rs2_b11_str) + 80005108: 0009b683 ld x13,0(x19) + 8000510c: 00068c63 beq x13,x0,80005124 + 80005110: 4310276f jal x14,80007d40 + 80005114: 80005104 .word 0x80005104 + 80005118: 00000000 .word 0x00000000 + 8000511c: 8001664e .word 0x8001664e + 80005120: 00000000 .word 0x00000000 + 80005124: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xd417d21350baef9e + 80005128: 000bb603 ld x12,0(x23) + 8000512c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x0a6e507bd3d18877 + 80005130: 000bb603 ld x12,0(x23) + 80005134: 008b8b93 addi x23,x23,8 + +0000000080005138 : +Zbkb_ror_cg_cmp_rs1_rs2_b12: + ror x8, x12, x12 # perform operation + 80005138: 60c65433 ror x8,x12,x12 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkb_ror_cg_cmp_rs1_rs2_b12, Zbkb_ror_cg_cmp_rs1_rs2_b12_str) + 8000513c: 0009b683 ld x13,0(x19) + 80005140: 00868c63 beq x13,x8,80005158 + 80005144: 3fd0276f jal x14,80007d40 + 80005148: 80005138 .word 0x80005138 + 8000514c: 00000000 .word 0x00000000 + 80005150: 80016686 .word 0x80016686 + 80005154: 00000000 .word 0x00000000 + 80005158: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000515c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005160: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x8175c34660842d9f + 80005164: 000bb683 ld x13,0(x23) + 80005168: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xa1203f50d295419b + 8000516c: 000bb683 ld x13,0(x23) + 80005170: 008b8b93 addi x23,x23,8 + +0000000080005174 : +Zbkb_ror_cg_cmp_rs1_rs2_b13: + ror x9, x13, x13 # perform operation + 80005174: 60d6d4b3 ror x9,x13,x13 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zbkb_ror_cg_cmp_rs1_rs2_b13, Zbkb_ror_cg_cmp_rs1_rs2_b13_str) + 80005178: 0009b203 ld x4,0(x19) + 8000517c: 00920c63 beq x4,x9,80005194 + 80005180: 381022ef jal x5,80007d00 + 80005184: 80005174 .word 0x80005174 + 80005188: 00000000 .word 0x00000000 + 8000518c: 800166be .word 0x800166be + 80005190: 00000000 .word 0x00000000 + 80005194: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xc5935193443705de + 80005198: 000bb703 ld x14,0(x23) + 8000519c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xbf96935dcd7a621c + 800051a0: 000bb703 ld x14,0(x23) + 800051a4: 008b8b93 addi x23,x23,8 + +00000000800051a8 : +Zbkb_ror_cg_cmp_rs1_rs2_b14: + ror x8, x14, x14 # perform operation + 800051a8: 60e75433 ror x8,x14,x14 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zbkb_ror_cg_cmp_rs1_rs2_b14, Zbkb_ror_cg_cmp_rs1_rs2_b14_str) + 800051ac: 0009b203 ld x4,0(x19) + 800051b0: 00820c63 beq x4,x8,800051c8 + 800051b4: 34d022ef jal x5,80007d00 + 800051b8: 800051a8 .word 0x800051a8 + 800051bc: 00000000 .word 0x00000000 + 800051c0: 800166f6 .word 0x800166f6 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x0fa08f323130dc26 + 800051cc: 000bb783 ld x15,0(x23) + 800051d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0xc280c0beffc6b9d6 + 800051d4: 000bb783 ld x15,0(x23) + 800051d8: 008b8b93 addi x23,x23,8 + +00000000800051dc : +Zbkb_ror_cg_cmp_rs1_rs2_b15: + ror x13, x15, x15 # perform operation + 800051dc: 60f7d6b3 ror x13,x15,x15 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkb_ror_cg_cmp_rs1_rs2_b15, Zbkb_ror_cg_cmp_rs1_rs2_b15_str) + 800051e0: 0009b203 ld x4,0(x19) + 800051e4: 00d20c63 beq x4,x13,800051fc + 800051e8: 319022ef jal x5,80007d00 + 800051ec: 800051dc .word 0x800051dc + 800051f0: 00000000 .word 0x00000000 + 800051f4: 8001672e .word 0x8001672e + 800051f8: 00000000 .word 0x00000000 + 800051fc: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x8cc96248f5c64f93 + 80005200: 000bb803 ld x16,0(x23) + 80005204: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xed7567e44f0ede51 + 80005208: 000bb803 ld x16,0(x23) + 8000520c: 008b8b93 addi x23,x23,8 + +0000000080005210 : +Zbkb_ror_cg_cmp_rs1_rs2_b16: + ror x26, x16, x16 # perform operation + 80005210: 61085d33 ror x26,x16,x16 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_ror_cg_cmp_rs1_rs2_b16, Zbkb_ror_cg_cmp_rs1_rs2_b16_str) + 80005214: 0009b203 ld x4,0(x19) + 80005218: 01a20c63 beq x4,x26,80005230 + 8000521c: 2e5022ef jal x5,80007d00 + 80005220: 80005210 .word 0x80005210 + 80005224: 00000000 .word 0x00000000 + 80005228: 80016766 .word 0x80016766 + 8000522c: 00000000 .word 0x00000000 + 80005230: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x059e4ee594cfa482 + 80005234: 000bb883 ld x17,0(x23) + 80005238: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x279b6807b0c58f91 + 8000523c: 000bb883 ld x17,0(x23) + 80005240: 008b8b93 addi x23,x23,8 + +0000000080005244 : +Zbkb_ror_cg_cmp_rs1_rs2_b17: + ror x24, x17, x17 # perform operation + 80005244: 6118dc33 ror x24,x17,x17 + # Check if x24 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x24, Zbkb_ror_cg_cmp_rs1_rs2_b17, Zbkb_ror_cg_cmp_rs1_rs2_b17_str) + 80005248: 0009b203 ld x4,0(x19) + 8000524c: 01820c63 beq x4,x24,80005264 + 80005250: 2b1022ef jal x5,80007d00 + 80005254: 80005244 .word 0x80005244 + 80005258: 00000000 .word 0x00000000 + 8000525c: 8001679e .word 0x8001679e + 80005260: 00000000 .word 0x00000000 + 80005264: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x551160a0f49be548 + 80005268: 000bb903 ld x18,0(x23) + 8000526c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xedc4f82abc464b6e + 80005270: 000bb903 ld x18,0(x23) + 80005274: 008b8b93 addi x23,x23,8 + +0000000080005278 : +Zbkb_ror_cg_cmp_rs1_rs2_b18: + ror x27, x18, x18 # perform operation + 80005278: 61295db3 ror x27,x18,x18 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zbkb_ror_cg_cmp_rs1_rs2_b18, Zbkb_ror_cg_cmp_rs1_rs2_b18_str) + 8000527c: 0009b203 ld x4,0(x19) + 80005280: 01b20c63 beq x4,x27,80005298 + 80005284: 27d022ef jal x5,80007d00 + 80005288: 80005278 .word 0x80005278 + 8000528c: 00000000 .word 0x00000000 + 80005290: 800167d6 .word 0x800167d6 + 80005294: 00000000 .word 0x00000000 + 80005298: 00898993 addi x19,x19,8 + + mv x31, x19 # switch signature pointer register to avoid conflict with test + 8000529c: 00098f93 addi x31,x19,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x98bfa2dba9cbaeae + 800052a0: 000bb983 ld x19,0(x23) + 800052a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x39ce614598102fcd + 800052a8: 000bb983 ld x19,0(x23) + 800052ac: 008b8b93 addi x23,x23,8 + +00000000800052b0 : +Zbkb_ror_cg_cmp_rs1_rs2_b19: + ror x24, x19, x19 # perform operation + 800052b0: 6139dc33 ror x24,x19,x19 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zbkb_ror_cg_cmp_rs1_rs2_b19, Zbkb_ror_cg_cmp_rs1_rs2_b19_str) + 800052b4: 000fb203 ld x4,0(x31) + 800052b8: 01820c63 beq x4,x24,800052d0 + 800052bc: 245022ef jal x5,80007d00 + 800052c0: 800052b0 .word 0x800052b0 + 800052c4: 00000000 .word 0x00000000 + 800052c8: 8001680e .word 0x8001680e + 800052cc: 00000000 .word 0x00000000 + 800052d0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x71ebef19771efa6f + 800052d4: 000bba03 ld x20,0(x23) + 800052d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x93230aa9a6aca91b + 800052dc: 000bba03 ld x20,0(x23) + 800052e0: 008b8b93 addi x23,x23,8 + +00000000800052e4 : +Zbkb_ror_cg_cmp_rs1_rs2_b20: + ror x8, x20, x20 # perform operation + 800052e4: 614a5433 ror x8,x20,x20 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zbkb_ror_cg_cmp_rs1_rs2_b20, Zbkb_ror_cg_cmp_rs1_rs2_b20_str) + 800052e8: 000fb203 ld x4,0(x31) + 800052ec: 00820c63 beq x4,x8,80005304 + 800052f0: 211022ef jal x5,80007d00 + 800052f4: 800052e4 .word 0x800052e4 + 800052f8: 00000000 .word 0x00000000 + 800052fc: 80016846 .word 0x80016846 + 80005300: 00000000 .word 0x00000000 + 80005304: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xf81cdb65627ce160 + 80005308: 000bba83 ld x21,0(x23) + 8000530c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xadcd62e8a913f21d + 80005310: 000bba83 ld x21,0(x23) + 80005314: 008b8b93 addi x23,x23,8 + +0000000080005318 : +Zbkb_ror_cg_cmp_rs1_rs2_b21: + ror x19, x21, x21 # perform operation + 80005318: 615ad9b3 ror x19,x21,x21 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkb_ror_cg_cmp_rs1_rs2_b21, Zbkb_ror_cg_cmp_rs1_rs2_b21_str) + 8000531c: 000fb203 ld x4,0(x31) + 80005320: 01320c63 beq x4,x19,80005338 + 80005324: 1dd022ef jal x5,80007d00 + 80005328: 80005318 .word 0x80005318 + 8000532c: 00000000 .word 0x00000000 + 80005330: 8001687e .word 0x8001687e + 80005334: 00000000 .word 0x00000000 + 80005338: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x2f30d0ec236cd1f6 + 8000533c: 000bbb03 ld x22,0(x23) + 80005340: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xbce7364567afff4a + 80005344: 000bbb03 ld x22,0(x23) + 80005348: 008b8b93 addi x23,x23,8 + +000000008000534c : +Zbkb_ror_cg_cmp_rs1_rs2_b22: + ror x3, x22, x22 # perform operation + 8000534c: 616b51b3 ror x3,x22,x22 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zbkb_ror_cg_cmp_rs1_rs2_b22, Zbkb_ror_cg_cmp_rs1_rs2_b22_str) + 80005350: 000fb203 ld x4,0(x31) + 80005354: 00320c63 beq x4,x3,8000536c + 80005358: 1a9022ef jal x5,80007d00 + 8000535c: 8000534c .word 0x8000534c + 80005360: 00000000 .word 0x00000000 + 80005364: 800168b6 .word 0x800168b6 + 80005368: 00000000 .word 0x00000000 + 8000536c: 008f8f93 addi x31,x31,8 + + mv x21, x23 # switch data pointer register to avoid conflict with test + 80005370: 000b8a93 addi x21,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x4fcf4ac2614eca44 + 80005374: 000abb83 ld x23,0(x21) + 80005378: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0xc79b18fa5e2b2195 + 8000537c: 000abb83 ld x23,0(x21) + 80005380: 008a8a93 addi x21,x21,8 + +0000000080005384 : +Zbkb_ror_cg_cmp_rs1_rs2_b23: + ror x3, x23, x23 # perform operation + 80005384: 617bd1b3 ror x3,x23,x23 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zbkb_ror_cg_cmp_rs1_rs2_b23, Zbkb_ror_cg_cmp_rs1_rs2_b23_str) + 80005388: 000fb203 ld x4,0(x31) + 8000538c: 00320c63 beq x4,x3,800053a4 + 80005390: 171022ef jal x5,80007d00 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 800168ee .word 0x800168ee + 800053a0: 00000000 .word 0x00000000 + 800053a4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x875cb6bf8542a83c + 800053a8: 000abc03 ld x24,0(x21) + 800053ac: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x9a118b848e452dbe + 800053b0: 000abc03 ld x24,0(x21) + 800053b4: 008a8a93 addi x21,x21,8 + +00000000800053b8 : +Zbkb_ror_cg_cmp_rs1_rs2_b24: + ror x8, x24, x24 # perform operation + 800053b8: 618c5433 ror x8,x24,x24 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zbkb_ror_cg_cmp_rs1_rs2_b24, Zbkb_ror_cg_cmp_rs1_rs2_b24_str) + 800053bc: 000fb203 ld x4,0(x31) + 800053c0: 00820c63 beq x4,x8,800053d8 + 800053c4: 13d022ef jal x5,80007d00 + 800053c8: 800053b8 .word 0x800053b8 + 800053cc: 00000000 .word 0x00000000 + 800053d0: 80016926 .word 0x80016926 + 800053d4: 00000000 .word 0x00000000 + 800053d8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x6c8775d80185b332 + 800053dc: 000abc83 ld x25,0(x21) + 800053e0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0xca7ca3a13594d743 + 800053e4: 000abc83 ld x25,0(x21) + 800053e8: 008a8a93 addi x21,x21,8 + +00000000800053ec : +Zbkb_ror_cg_cmp_rs1_rs2_b25: + ror x24, x25, x25 # perform operation + 800053ec: 619cdc33 ror x24,x25,x25 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zbkb_ror_cg_cmp_rs1_rs2_b25, Zbkb_ror_cg_cmp_rs1_rs2_b25_str) + 800053f0: 000fb203 ld x4,0(x31) + 800053f4: 01820c63 beq x4,x24,8000540c + 800053f8: 109022ef jal x5,80007d00 + 800053fc: 800053ec .word 0x800053ec + 80005400: 00000000 .word 0x00000000 + 80005404: 8001695e .word 0x8001695e + 80005408: 00000000 .word 0x00000000 + 8000540c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xf96ac671dbe360dd + 80005410: 000abd03 ld x26,0(x21) + 80005414: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xc66b023c63db0814 + 80005418: 000abd03 ld x26,0(x21) + 8000541c: 008a8a93 addi x21,x21,8 + +0000000080005420 : +Zbkb_ror_cg_cmp_rs1_rs2_b26: + ror x28, x26, x26 # perform operation + 80005420: 61ad5e33 ror x28,x26,x26 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkb_ror_cg_cmp_rs1_rs2_b26, Zbkb_ror_cg_cmp_rs1_rs2_b26_str) + 80005424: 000fb203 ld x4,0(x31) + 80005428: 01c20c63 beq x4,x28,80005440 + 8000542c: 0d5022ef jal x5,80007d00 + 80005430: 80005420 .word 0x80005420 + 80005434: 00000000 .word 0x00000000 + 80005438: 80016996 .word 0x80016996 + 8000543c: 00000000 .word 0x00000000 + 80005440: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x041c8d5a7733493f + 80005444: 000abd83 ld x27,0(x21) + 80005448: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x6231870d671ee7be + 8000544c: 000abd83 ld x27,0(x21) + 80005450: 008a8a93 addi x21,x21,8 + +0000000080005454 : +Zbkb_ror_cg_cmp_rs1_rs2_b27: + ror x26, x27, x27 # perform operation + 80005454: 61bddd33 ror x26,x27,x27 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zbkb_ror_cg_cmp_rs1_rs2_b27, Zbkb_ror_cg_cmp_rs1_rs2_b27_str) + 80005458: 000fb203 ld x4,0(x31) + 8000545c: 01a20c63 beq x4,x26,80005474 + 80005460: 0a1022ef jal x5,80007d00 + 80005464: 80005454 .word 0x80005454 + 80005468: 00000000 .word 0x00000000 + 8000546c: 800169ce .word 0x800169ce + 80005470: 00000000 .word 0x00000000 + 80005474: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xee0b7a2afdc9b47c + 80005478: 000abe03 ld x28,0(x21) + 8000547c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0xec711488fde12720 + 80005480: 000abe03 ld x28,0(x21) + 80005484: 008a8a93 addi x21,x21,8 + +0000000080005488 : +Zbkb_ror_cg_cmp_rs1_rs2_b28: + ror x13, x28, x28 # perform operation + 80005488: 61ce56b3 ror x13,x28,x28 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zbkb_ror_cg_cmp_rs1_rs2_b28, Zbkb_ror_cg_cmp_rs1_rs2_b28_str) + 8000548c: 000fb203 ld x4,0(x31) + 80005490: 00d20c63 beq x4,x13,800054a8 + 80005494: 06d022ef jal x5,80007d00 + 80005498: 80005488 .word 0x80005488 + 8000549c: 00000000 .word 0x00000000 + 800054a0: 80016a06 .word 0x80016a06 + 800054a4: 00000000 .word 0x00000000 + 800054a8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xbc07f26a7bbd4207 + 800054ac: 000abe83 ld x29,0(x21) + 800054b0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x57e6d8981b7b66da + 800054b4: 000abe83 ld x29,0(x21) + 800054b8: 008a8a93 addi x21,x21,8 + +00000000800054bc : +Zbkb_ror_cg_cmp_rs1_rs2_b29: + ror x20, x29, x29 # perform operation + 800054bc: 61deda33 ror x20,x29,x29 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zbkb_ror_cg_cmp_rs1_rs2_b29, Zbkb_ror_cg_cmp_rs1_rs2_b29_str) + 800054c0: 000fb203 ld x4,0(x31) + 800054c4: 01420c63 beq x4,x20,800054dc + 800054c8: 039022ef jal x5,80007d00 + 800054cc: 800054bc .word 0x800054bc + 800054d0: 00000000 .word 0x00000000 + 800054d4: 80016a3e .word 0x80016a3e + 800054d8: 00000000 .word 0x00000000 + 800054dc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xd95e86f2c689fb2f + 800054e0: 000abf03 ld x30,0(x21) + 800054e4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x438147a291cb2bdd + 800054e8: 000abf03 ld x30,0(x21) + 800054ec: 008a8a93 addi x21,x21,8 + +00000000800054f0 : +Zbkb_ror_cg_cmp_rs1_rs2_b30: + ror x3, x30, x30 # perform operation + 800054f0: 61ef51b3 ror x3,x30,x30 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zbkb_ror_cg_cmp_rs1_rs2_b30, Zbkb_ror_cg_cmp_rs1_rs2_b30_str) + 800054f4: 000fb203 ld x4,0(x31) + 800054f8: 00320c63 beq x4,x3,80005510 + 800054fc: 005022ef jal x5,80007d00 + 80005500: 800054f0 .word 0x800054f0 + 80005504: 00000000 .word 0x00000000 + 80005508: 80016a76 .word 0x80016a76 + 8000550c: 00000000 .word 0x00000000 + 80005510: 008f8f93 addi x31,x31,8 + + mv x9, x31 # switch signature pointer register to avoid conflict with test + 80005514: 000f8493 addi x9,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x33b63471be2b5675 + 80005518: 000abf83 ld x31,0(x21) + 8000551c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x19a3cf2ce4f63ccc + 80005520: 000abf83 ld x31,0(x21) + 80005524: 008a8a93 addi x21,x21,8 + +0000000080005528 : +Zbkb_ror_cg_cmp_rs1_rs2_b31: + ror x25, x31, x31 # perform operation + 80005528: 61ffdcb3 ror x25,x31,x31 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_ror_cg_cmp_rs1_rs2_b31, Zbkb_ror_cg_cmp_rs1_rs2_b31_str) + 8000552c: 0004b203 ld x4,0(x9) + 80005530: 01920c63 beq x4,x25,80005548 + 80005534: 7cc022ef jal x5,80007d00 + 80005538: 80005528 .word 0x80005528 + 8000553c: 00000000 .word 0x00000000 + 80005540: 80016aae .word 0x80016aae + 80005544: 00000000 .word 0x00000000 + 80005548: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x27a5061fa2d81f6c + 8000554c: 000ab003 ld x0,0(x21) + 80005550: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x8d8c700f0370f81b + 80005554: 000abd83 ld x27,0(x21) + 80005558: 008a8a93 addi x21,x21,8 + +000000008000555c : +Zbkb_ror_cg_cmp_rd_rs1_b0: + ror x0, x0, x27 # perform operation + 8000555c: 61b05033 ror x0,x0,x27 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkb_ror_cg_cmp_rd_rs1_b0, Zbkb_ror_cg_cmp_rd_rs1_b0_str) + 80005560: 0004b203 ld x4,0(x9) + 80005564: 00020c63 beq x4,x0,8000557c + 80005568: 798022ef jal x5,80007d00 + 8000556c: 8000555c .word 0x8000555c + 80005570: 00000000 .word 0x00000000 + 80005574: 80016ae6 .word 0x80016ae6 + 80005578: 00000000 .word 0x00000000 + 8000557c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xff80b71c70e19b3b + 80005580: 000ab083 ld x1,0(x21) + 80005584: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x72ae0523bd66cf84 + 80005588: 000ab303 ld x6,0(x21) + 8000558c: 008a8a93 addi x21,x21,8 + +0000000080005590 : +Zbkb_ror_cg_cmp_rd_rs1_b1: + ror x1, x1, x6 # perform operation + 80005590: 6060d0b3 ror x1,x1,x6 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_ror_cg_cmp_rd_rs1_b1, Zbkb_ror_cg_cmp_rd_rs1_b1_str) + 80005594: 0004b203 ld x4,0(x9) + 80005598: 00120c63 beq x4,x1,800055b0 + 8000559c: 764022ef jal x5,80007d00 + 800055a0: 80005590 .word 0x80005590 + 800055a4: 00000000 .word 0x00000000 + 800055a8: 80016b1c .word 0x80016b1c + 800055ac: 00000000 .word 0x00000000 + 800055b0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x4ff2b15e110495f0 + 800055b4: 000ab103 ld x2,0(x21) + 800055b8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xb4e8bd1abc16f8bc + 800055bc: 000ab903 ld x18,0(x21) + 800055c0: 008a8a93 addi x21,x21,8 + +00000000800055c4 : +Zbkb_ror_cg_cmp_rd_rs1_b2: + ror x2, x2, x18 # perform operation + 800055c4: 61215133 ror x2,x2,x18 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_ror_cg_cmp_rd_rs1_b2, Zbkb_ror_cg_cmp_rd_rs1_b2_str) + 800055c8: 0004b203 ld x4,0(x9) + 800055cc: 00220c63 beq x4,x2,800055e4 + 800055d0: 730022ef jal x5,80007d00 + 800055d4: 800055c4 .word 0x800055c4 + 800055d8: 00000000 .word 0x00000000 + 800055dc: 80016b52 .word 0x80016b52 + 800055e0: 00000000 .word 0x00000000 + 800055e4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x5b8bacd7fc25504d + 800055e8: 000ab183 ld x3,0(x21) + 800055ec: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x8453a99041f131c8 + 800055f0: 000ab603 ld x12,0(x21) + 800055f4: 008a8a93 addi x21,x21,8 + +00000000800055f8 : +Zbkb_ror_cg_cmp_rd_rs1_b3: + ror x3, x3, x12 # perform operation + 800055f8: 60c1d1b3 ror x3,x3,x12 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkb_ror_cg_cmp_rd_rs1_b3, Zbkb_ror_cg_cmp_rd_rs1_b3_str) + 800055fc: 0004b203 ld x4,0(x9) + 80005600: 00320c63 beq x4,x3,80005618 + 80005604: 6fc022ef jal x5,80007d00 + 80005608: 800055f8 .word 0x800055f8 + 8000560c: 00000000 .word 0x00000000 + 80005610: 80016b88 .word 0x80016b88 + 80005614: 00000000 .word 0x00000000 + 80005618: 00848493 addi x9,x9,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 8000561c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005620: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x102b839c862b5234 + 80005624: 000ab203 ld x4,0(x21) + 80005628: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x0dfc8dc39d425627 + 8000562c: 000ab383 ld x7,0(x21) + 80005630: 008a8a93 addi x21,x21,8 + +0000000080005634 : +Zbkb_ror_cg_cmp_rd_rs1_b4: + ror x4, x4, x7 # perform operation + 80005634: 60725233 ror x4,x4,x7 + # Check if x4 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x4, Zbkb_ror_cg_cmp_rd_rs1_b4, Zbkb_ror_cg_cmp_rd_rs1_b4_str) + 80005638: 0004b683 ld x13,0(x9) + 8000563c: 00468c63 beq x13,x4,80005654 + 80005640: 7000276f jal x14,80007d40 + 80005644: 80005634 .word 0x80005634 + 80005648: 00000000 .word 0x00000000 + 8000564c: 80016bbe .word 0x80016bbe + 80005650: 00000000 .word 0x00000000 + 80005654: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xe005296d76d5e926 + 80005658: 000ab283 ld x5,0(x21) + 8000565c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x6d8500771102573f + 80005660: 000abf83 ld x31,0(x21) + 80005664: 008a8a93 addi x21,x21,8 + +0000000080005668 : +Zbkb_ror_cg_cmp_rd_rs1_b5: + ror x5, x5, x31 # perform operation + 80005668: 61f2d2b3 ror x5,x5,x31 + # Check if x5 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x5, Zbkb_ror_cg_cmp_rd_rs1_b5, Zbkb_ror_cg_cmp_rd_rs1_b5_str) + 8000566c: 0004b683 ld x13,0(x9) + 80005670: 00568c63 beq x13,x5,80005688 + 80005674: 6cc0276f jal x14,80007d40 + 80005678: 80005668 .word 0x80005668 + 8000567c: 00000000 .word 0x00000000 + 80005680: 80016bf4 .word 0x80016bf4 + 80005684: 00000000 .word 0x00000000 + 80005688: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x86455d006529fbfa + 8000568c: 000ab303 ld x6,0(x21) + 80005690: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x42b292ff18e2b9c2 + 80005694: 000abe03 ld x28,0(x21) + 80005698: 008a8a93 addi x21,x21,8 + +000000008000569c : +Zbkb_ror_cg_cmp_rd_rs1_b6: + ror x6, x6, x28 # perform operation + 8000569c: 61c35333 ror x6,x6,x28 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zbkb_ror_cg_cmp_rd_rs1_b6, Zbkb_ror_cg_cmp_rd_rs1_b6_str) + 800056a0: 0004b683 ld x13,0(x9) + 800056a4: 00668c63 beq x13,x6,800056bc + 800056a8: 6980276f jal x14,80007d40 + 800056ac: 8000569c .word 0x8000569c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 80016c2a .word 0x80016c2a + 800056b8: 00000000 .word 0x00000000 + 800056bc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x1bd50f46343d530f + 800056c0: 000ab383 ld x7,0(x21) + 800056c4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x85fa23cb4e68a226 + 800056c8: 000abc03 ld x24,0(x21) + 800056cc: 008a8a93 addi x21,x21,8 + +00000000800056d0 : +Zbkb_ror_cg_cmp_rd_rs1_b7: + ror x7, x7, x24 # perform operation + 800056d0: 6183d3b3 ror x7,x7,x24 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkb_ror_cg_cmp_rd_rs1_b7, Zbkb_ror_cg_cmp_rd_rs1_b7_str) + 800056d4: 0004b683 ld x13,0(x9) + 800056d8: 00768c63 beq x13,x7,800056f0 + 800056dc: 6640276f jal x14,80007d40 + 800056e0: 800056d0 .word 0x800056d0 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 80016c60 .word 0x80016c60 + 800056ec: 00000000 .word 0x00000000 + 800056f0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x0c6f9a6b57a92bd4 + 800056f4: 000ab403 ld x8,0(x21) + 800056f8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x899f6887cda6f234 + 800056fc: 000abc03 ld x24,0(x21) + 80005700: 008a8a93 addi x21,x21,8 + +0000000080005704 : +Zbkb_ror_cg_cmp_rd_rs1_b8: + ror x8, x8, x24 # perform operation + 80005704: 61845433 ror x8,x8,x24 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zbkb_ror_cg_cmp_rd_rs1_b8, Zbkb_ror_cg_cmp_rd_rs1_b8_str) + 80005708: 0004b683 ld x13,0(x9) + 8000570c: 00868c63 beq x13,x8,80005724 + 80005710: 6300276f jal x14,80007d40 + 80005714: 80005704 .word 0x80005704 + 80005718: 00000000 .word 0x00000000 + 8000571c: 80016c96 .word 0x80016c96 + 80005720: 00000000 .word 0x00000000 + 80005724: 00848493 addi x9,x9,8 + + mv x26, x9 # switch signature pointer register to avoid conflict with test + 80005728: 00048d13 addi x26,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xda7bbd477e98f2fa + 8000572c: 000ab483 ld x9,0(x21) + 80005730: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xa7bf5ff32668eb9e + 80005734: 000abf83 ld x31,0(x21) + 80005738: 008a8a93 addi x21,x21,8 + +000000008000573c : +Zbkb_ror_cg_cmp_rd_rs1_b9: + ror x9, x9, x31 # perform operation + 8000573c: 61f4d4b3 ror x9,x9,x31 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zbkb_ror_cg_cmp_rd_rs1_b9, Zbkb_ror_cg_cmp_rd_rs1_b9_str) + 80005740: 000d3683 ld x13,0(x26) + 80005744: 00968c63 beq x13,x9,8000575c + 80005748: 5f80276f jal x14,80007d40 + 8000574c: 8000573c .word 0x8000573c + 80005750: 00000000 .word 0x00000000 + 80005754: 80016ccc .word 0x80016ccc + 80005758: 00000000 .word 0x00000000 + 8000575c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x2907cbc48d1567be + 80005760: 000ab503 ld x10,0(x21) + 80005764: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xb1742cb46ca9fecd + 80005768: 000ab203 ld x4,0(x21) + 8000576c: 008a8a93 addi x21,x21,8 + +0000000080005770 : +Zbkb_ror_cg_cmp_rd_rs1_b10: + ror x10, x10, x4 # perform operation + 80005770: 60455533 ror x10,x10,x4 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zbkb_ror_cg_cmp_rd_rs1_b10, Zbkb_ror_cg_cmp_rd_rs1_b10_str) + 80005774: 000d3683 ld x13,0(x26) + 80005778: 00a68c63 beq x13,x10,80005790 + 8000577c: 5c40276f jal x14,80007d40 + 80005780: 80005770 .word 0x80005770 + 80005784: 00000000 .word 0x00000000 + 80005788: 80016d02 .word 0x80016d02 + 8000578c: 00000000 .word 0x00000000 + 80005790: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xc307c3ada1fc3103 + 80005794: 000ab583 ld x11,0(x21) + 80005798: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xae0acd133992aee5 + 8000579c: 000ab183 ld x3,0(x21) + 800057a0: 008a8a93 addi x21,x21,8 + +00000000800057a4 : +Zbkb_ror_cg_cmp_rd_rs1_b11: + ror x11, x11, x3 # perform operation + 800057a4: 6035d5b3 ror x11,x11,x3 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zbkb_ror_cg_cmp_rd_rs1_b11, Zbkb_ror_cg_cmp_rd_rs1_b11_str) + 800057a8: 000d3683 ld x13,0(x26) + 800057ac: 00b68c63 beq x13,x11,800057c4 + 800057b0: 5900276f jal x14,80007d40 + 800057b4: 800057a4 .word 0x800057a4 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 80016d39 .word 0x80016d39 + 800057c0: 00000000 .word 0x00000000 + 800057c4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x0b30f66f011ec1b4 + 800057c8: 000ab603 ld x12,0(x21) + 800057cc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xd30289f6b1f1a49c + 800057d0: 000ab083 ld x1,0(x21) + 800057d4: 008a8a93 addi x21,x21,8 + +00000000800057d8 : +Zbkb_ror_cg_cmp_rd_rs1_b12: + ror x12, x12, x1 # perform operation + 800057d8: 60165633 ror x12,x12,x1 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zbkb_ror_cg_cmp_rd_rs1_b12, Zbkb_ror_cg_cmp_rd_rs1_b12_str) + 800057dc: 000d3683 ld x13,0(x26) + 800057e0: 00c68c63 beq x13,x12,800057f8 + 800057e4: 55c0276f jal x14,80007d40 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 80016d70 .word 0x80016d70 + 800057f4: 00000000 .word 0x00000000 + 800057f8: 008d0d13 addi x26,x26,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800057fc: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005800: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x4fde35db01e4bb8d + 80005804: 000ab683 ld x13,0(x21) + 80005808: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xc985cb3a48880ed8 + 8000580c: 000ab383 ld x7,0(x21) + 80005810: 008a8a93 addi x21,x21,8 + +0000000080005814 : +Zbkb_ror_cg_cmp_rd_rs1_b13: + ror x13, x13, x7 # perform operation + 80005814: 6076d6b3 ror x13,x13,x7 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zbkb_ror_cg_cmp_rd_rs1_b13, Zbkb_ror_cg_cmp_rd_rs1_b13_str) + 80005818: 000d3203 ld x4,0(x26) + 8000581c: 00d20c63 beq x4,x13,80005834 + 80005820: 4e0022ef jal x5,80007d00 + 80005824: 80005814 .word 0x80005814 + 80005828: 00000000 .word 0x00000000 + 8000582c: 80016da7 .word 0x80016da7 + 80005830: 00000000 .word 0x00000000 + 80005834: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x4ca2776c4e8ccdcb + 80005838: 000ab703 ld x14,0(x21) + 8000583c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xd368cf5f917e502e + 80005840: 000ab103 ld x2,0(x21) + 80005844: 008a8a93 addi x21,x21,8 + +0000000080005848 : +Zbkb_ror_cg_cmp_rd_rs1_b14: + ror x14, x14, x2 # perform operation + 80005848: 60275733 ror x14,x14,x2 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zbkb_ror_cg_cmp_rd_rs1_b14, Zbkb_ror_cg_cmp_rd_rs1_b14_str) + 8000584c: 000d3203 ld x4,0(x26) + 80005850: 00e20c63 beq x4,x14,80005868 + 80005854: 4ac022ef jal x5,80007d00 + 80005858: 80005848 .word 0x80005848 + 8000585c: 00000000 .word 0x00000000 + 80005860: 80016dde .word 0x80016dde + 80005864: 00000000 .word 0x00000000 + 80005868: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xc152576cd0d0a080 + 8000586c: 000ab783 ld x15,0(x21) + 80005870: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs2: x25 = 0x214df6053e3ef91d + 80005874: 000abc83 ld x25,0(x21) + 80005878: 008a8a93 addi x21,x21,8 + +000000008000587c : +Zbkb_ror_cg_cmp_rd_rs1_b15: + ror x15, x15, x25 # perform operation + 8000587c: 6197d7b3 ror x15,x15,x25 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zbkb_ror_cg_cmp_rd_rs1_b15, Zbkb_ror_cg_cmp_rd_rs1_b15_str) + 80005880: 000d3203 ld x4,0(x26) + 80005884: 00f20c63 beq x4,x15,8000589c + 80005888: 478022ef jal x5,80007d00 + 8000588c: 8000587c .word 0x8000587c + 80005890: 00000000 .word 0x00000000 + 80005894: 80016e15 .word 0x80016e15 + 80005898: 00000000 .word 0x00000000 + 8000589c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xc6c1c55acd754f3b + 800058a0: 000ab803 ld x16,0(x21) + 800058a4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x69e46aea9ff6de35 + 800058a8: 000abf83 ld x31,0(x21) + 800058ac: 008a8a93 addi x21,x21,8 + +00000000800058b0 : +Zbkb_ror_cg_cmp_rd_rs1_b16: + ror x16, x16, x31 # perform operation + 800058b0: 61f85833 ror x16,x16,x31 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zbkb_ror_cg_cmp_rd_rs1_b16, Zbkb_ror_cg_cmp_rd_rs1_b16_str) + 800058b4: 000d3203 ld x4,0(x26) + 800058b8: 01020c63 beq x4,x16,800058d0 + 800058bc: 444022ef jal x5,80007d00 + 800058c0: 800058b0 .word 0x800058b0 + 800058c4: 00000000 .word 0x00000000 + 800058c8: 80016e4c .word 0x80016e4c + 800058cc: 00000000 .word 0x00000000 + 800058d0: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x24f661b39b15f2f5 + 800058d4: 000ab883 ld x17,0(x21) + 800058d8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x397adf23f15c3b67 + 800058dc: 000ab903 ld x18,0(x21) + 800058e0: 008a8a93 addi x21,x21,8 + +00000000800058e4 : +Zbkb_ror_cg_cmp_rd_rs1_b17: + ror x17, x17, x18 # perform operation + 800058e4: 6128d8b3 ror x17,x17,x18 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zbkb_ror_cg_cmp_rd_rs1_b17, Zbkb_ror_cg_cmp_rd_rs1_b17_str) + 800058e8: 000d3203 ld x4,0(x26) + 800058ec: 01120c63 beq x4,x17,80005904 + 800058f0: 410022ef jal x5,80007d00 + 800058f4: 800058e4 .word 0x800058e4 + 800058f8: 00000000 .word 0x00000000 + 800058fc: 80016e83 .word 0x80016e83 + 80005900: 00000000 .word 0x00000000 + 80005904: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xe5e0191bdf5aa1e0 + 80005908: 000ab903 ld x18,0(x21) + 8000590c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x4b33cb6e0f4498da + 80005910: 000ab083 ld x1,0(x21) + 80005914: 008a8a93 addi x21,x21,8 + +0000000080005918 : +Zbkb_ror_cg_cmp_rd_rs1_b18: + ror x18, x18, x1 # perform operation + 80005918: 60195933 ror x18,x18,x1 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zbkb_ror_cg_cmp_rd_rs1_b18, Zbkb_ror_cg_cmp_rd_rs1_b18_str) + 8000591c: 000d3203 ld x4,0(x26) + 80005920: 01220c63 beq x4,x18,80005938 + 80005924: 3dc022ef jal x5,80007d00 + 80005928: 80005918 .word 0x80005918 + 8000592c: 00000000 .word 0x00000000 + 80005930: 80016eba .word 0x80016eba + 80005934: 00000000 .word 0x00000000 + 80005938: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x6047e04469d50e61 + 8000593c: 000ab983 ld x19,0(x21) + 80005940: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x3b6a8404b44cfb5f + 80005944: 000abd83 ld x27,0(x21) + 80005948: 008a8a93 addi x21,x21,8 + +000000008000594c : +Zbkb_ror_cg_cmp_rd_rs1_b19: + ror x19, x19, x27 # perform operation + 8000594c: 61b9d9b3 ror x19,x19,x27 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zbkb_ror_cg_cmp_rd_rs1_b19, Zbkb_ror_cg_cmp_rd_rs1_b19_str) + 80005950: 000d3203 ld x4,0(x26) + 80005954: 01320c63 beq x4,x19,8000596c + 80005958: 3a8022ef jal x5,80007d00 + 8000595c: 8000594c .word 0x8000594c + 80005960: 00000000 .word 0x00000000 + 80005964: 80016ef1 .word 0x80016ef1 + 80005968: 00000000 .word 0x00000000 + 8000596c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xe16e5a86fdd83c56 + 80005970: 000aba03 ld x20,0(x21) + 80005974: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x86985588e294e410 + 80005978: 000ab983 ld x19,0(x21) + 8000597c: 008a8a93 addi x21,x21,8 + +0000000080005980 : +Zbkb_ror_cg_cmp_rd_rs1_b20: + ror x20, x20, x19 # perform operation + 80005980: 613a5a33 ror x20,x20,x19 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zbkb_ror_cg_cmp_rd_rs1_b20, Zbkb_ror_cg_cmp_rd_rs1_b20_str) + 80005984: 000d3203 ld x4,0(x26) + 80005988: 01420c63 beq x4,x20,800059a0 + 8000598c: 374022ef jal x5,80007d00 + 80005990: 80005980 .word 0x80005980 + 80005994: 00000000 .word 0x00000000 + 80005998: 80016f28 .word 0x80016f28 + 8000599c: 00000000 .word 0x00000000 + 800059a0: 008d0d13 addi x26,x26,8 + + mv x25, x21 # switch data pointer register to avoid conflict with test + 800059a4: 000a8c93 addi x25,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xb19b5844b8936bf1 + 800059a8: 000cba83 ld x21,0(x25) + 800059ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x15dcb73dea3f055c + 800059b0: 000cb503 ld x10,0(x25) + 800059b4: 008c8c93 addi x25,x25,8 + +00000000800059b8 : +Zbkb_ror_cg_cmp_rd_rs1_b21: + ror x21, x21, x10 # perform operation + 800059b8: 60aadab3 ror x21,x21,x10 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zbkb_ror_cg_cmp_rd_rs1_b21, Zbkb_ror_cg_cmp_rd_rs1_b21_str) + 800059bc: 000d3203 ld x4,0(x26) + 800059c0: 01520c63 beq x4,x21,800059d8 + 800059c4: 33c022ef jal x5,80007d00 + 800059c8: 800059b8 .word 0x800059b8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 80016f5f .word 0x80016f5f + 800059d4: 00000000 .word 0x00000000 + 800059d8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x9d68990353242492 + 800059dc: 000cbb03 ld x22,0(x25) + 800059e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x445d234eba439713 + 800059e4: 000cb183 ld x3,0(x25) + 800059e8: 008c8c93 addi x25,x25,8 + +00000000800059ec : +Zbkb_ror_cg_cmp_rd_rs1_b22: + ror x22, x22, x3 # perform operation + 800059ec: 603b5b33 ror x22,x22,x3 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zbkb_ror_cg_cmp_rd_rs1_b22, Zbkb_ror_cg_cmp_rd_rs1_b22_str) + 800059f0: 000d3203 ld x4,0(x26) + 800059f4: 01620c63 beq x4,x22,80005a0c + 800059f8: 308022ef jal x5,80007d00 + 800059fc: 800059ec .word 0x800059ec + 80005a00: 00000000 .word 0x00000000 + 80005a04: 80016f96 .word 0x80016f96 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0xa19a2f8b21720bf7 + 80005a10: 000cbb83 ld x23,0(x25) + 80005a14: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0xafb505e8afe8248c + 80005a18: 000cb583 ld x11,0(x25) + 80005a1c: 008c8c93 addi x25,x25,8 + +0000000080005a20 : +Zbkb_ror_cg_cmp_rd_rs1_b23: + ror x23, x23, x11 # perform operation + 80005a20: 60bbdbb3 ror x23,x23,x11 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zbkb_ror_cg_cmp_rd_rs1_b23, Zbkb_ror_cg_cmp_rd_rs1_b23_str) + 80005a24: 000d3203 ld x4,0(x26) + 80005a28: 01720c63 beq x4,x23,80005a40 + 80005a2c: 2d4022ef jal x5,80007d00 + 80005a30: 80005a20 .word 0x80005a20 + 80005a34: 00000000 .word 0x00000000 + 80005a38: 80016fcd .word 0x80016fcd + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x3c49e8b99367992e + 80005a44: 000cbc03 ld x24,0(x25) + 80005a48: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xa52ddaa6dd061318 + 80005a4c: 000cb603 ld x12,0(x25) + 80005a50: 008c8c93 addi x25,x25,8 + +0000000080005a54 : +Zbkb_ror_cg_cmp_rd_rs1_b24: + ror x24, x24, x12 # perform operation + 80005a54: 60cc5c33 ror x24,x24,x12 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zbkb_ror_cg_cmp_rd_rs1_b24, Zbkb_ror_cg_cmp_rd_rs1_b24_str) + 80005a58: 000d3203 ld x4,0(x26) + 80005a5c: 01820c63 beq x4,x24,80005a74 + 80005a60: 2a0022ef jal x5,80007d00 + 80005a64: 80005a54 .word 0x80005a54 + 80005a68: 00000000 .word 0x00000000 + 80005a6c: 80017004 .word 0x80017004 + 80005a70: 00000000 .word 0x00000000 + 80005a74: 008d0d13 addi x26,x26,8 + + mv x17, x25 # switch data pointer register to avoid conflict with test + 80005a78: 000c8893 addi x17,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8c5c3339fb019ec9 + 80005a7c: 0008bc83 ld x25,0(x17) + 80005a80: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xada1522041d19793 + 80005a84: 0008b503 ld x10,0(x17) + 80005a88: 00888893 addi x17,x17,8 + +0000000080005a8c : +Zbkb_ror_cg_cmp_rd_rs1_b25: + ror x25, x25, x10 # perform operation + 80005a8c: 60acdcb3 ror x25,x25,x10 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zbkb_ror_cg_cmp_rd_rs1_b25, Zbkb_ror_cg_cmp_rd_rs1_b25_str) + 80005a90: 000d3203 ld x4,0(x26) + 80005a94: 01920c63 beq x4,x25,80005aac + 80005a98: 268022ef jal x5,80007d00 + 80005a9c: 80005a8c .word 0x80005a8c + 80005aa0: 00000000 .word 0x00000000 + 80005aa4: 8001703b .word 0x8001703b + 80005aa8: 00000000 .word 0x00000000 + 80005aac: 008d0d13 addi x26,x26,8 + + mv x25, x26 # switch signature pointer register to avoid conflict with test + 80005ab0: 000d0c93 addi x25,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x534431e182538369 + 80005ab4: 0008bd03 ld x26,0(x17) + 80005ab8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x0bdf320a1d4066c1 + 80005abc: 0008b703 ld x14,0(x17) + 80005ac0: 00888893 addi x17,x17,8 + +0000000080005ac4 : +Zbkb_ror_cg_cmp_rd_rs1_b26: + ror x26, x26, x14 # perform operation + 80005ac4: 60ed5d33 ror x26,x26,x14 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zbkb_ror_cg_cmp_rd_rs1_b26, Zbkb_ror_cg_cmp_rd_rs1_b26_str) + 80005ac8: 000cb203 ld x4,0(x25) + 80005acc: 01a20c63 beq x4,x26,80005ae4 + 80005ad0: 230022ef jal x5,80007d00 + 80005ad4: 80005ac4 .word 0x80005ac4 + 80005ad8: 00000000 .word 0x00000000 + 80005adc: 80017072 .word 0x80017072 + 80005ae0: 00000000 .word 0x00000000 + 80005ae4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xb2f01a7b0c4f3c3f + 80005ae8: 0008bd83 ld x27,0(x17) + 80005aec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xc7b71ca9a809826b + 80005af0: 0008be03 ld x28,0(x17) + 80005af4: 00888893 addi x17,x17,8 + +0000000080005af8 : +Zbkb_ror_cg_cmp_rd_rs1_b27: + ror x27, x27, x28 # perform operation + 80005af8: 61cdddb3 ror x27,x27,x28 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zbkb_ror_cg_cmp_rd_rs1_b27, Zbkb_ror_cg_cmp_rd_rs1_b27_str) + 80005afc: 000cb203 ld x4,0(x25) + 80005b00: 01b20c63 beq x4,x27,80005b18 + 80005b04: 1fc022ef jal x5,80007d00 + 80005b08: 80005af8 .word 0x80005af8 + 80005b0c: 00000000 .word 0x00000000 + 80005b10: 800170a9 .word 0x800170a9 + 80005b14: 00000000 .word 0x00000000 + 80005b18: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xe702770e0f1c68f7 + 80005b1c: 0008be03 ld x28,0(x17) + 80005b20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xe1dfc65876d7d874 + 80005b24: 0008ba83 ld x21,0(x17) + 80005b28: 00888893 addi x17,x17,8 + +0000000080005b2c : +Zbkb_ror_cg_cmp_rd_rs1_b28: + ror x28, x28, x21 # perform operation + 80005b2c: 615e5e33 ror x28,x28,x21 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zbkb_ror_cg_cmp_rd_rs1_b28, Zbkb_ror_cg_cmp_rd_rs1_b28_str) + 80005b30: 000cb203 ld x4,0(x25) + 80005b34: 01c20c63 beq x4,x28,80005b4c + 80005b38: 1c8022ef jal x5,80007d00 + 80005b3c: 80005b2c .word 0x80005b2c + 80005b40: 00000000 .word 0x00000000 + 80005b44: 800170e0 .word 0x800170e0 + 80005b48: 00000000 .word 0x00000000 + 80005b4c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x02fffdad5aae73ac + 80005b50: 0008be83 ld x29,0(x17) + 80005b54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x97c4dca84fef05c7 + 80005b58: 0008b303 ld x6,0(x17) + 80005b5c: 00888893 addi x17,x17,8 + +0000000080005b60 : +Zbkb_ror_cg_cmp_rd_rs1_b29: + ror x29, x29, x6 # perform operation + 80005b60: 606edeb3 ror x29,x29,x6 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkb_ror_cg_cmp_rd_rs1_b29, Zbkb_ror_cg_cmp_rd_rs1_b29_str) + 80005b64: 000cb203 ld x4,0(x25) + 80005b68: 01d20c63 beq x4,x29,80005b80 + 80005b6c: 194022ef jal x5,80007d00 + 80005b70: 80005b60 .word 0x80005b60 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 80017117 .word 0x80017117 + 80005b7c: 00000000 .word 0x00000000 + 80005b80: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xeb2019b5a59fcd81 + 80005b84: 0008bf03 ld x30,0(x17) + 80005b88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xfe94b4c9d3779103 + 80005b8c: 0008b183 ld x3,0(x17) + 80005b90: 00888893 addi x17,x17,8 + +0000000080005b94 : +Zbkb_ror_cg_cmp_rd_rs1_b30: + ror x30, x30, x3 # perform operation + 80005b94: 603f5f33 ror x30,x30,x3 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkb_ror_cg_cmp_rd_rs1_b30, Zbkb_ror_cg_cmp_rd_rs1_b30_str) + 80005b98: 000cb203 ld x4,0(x25) + 80005b9c: 01e20c63 beq x4,x30,80005bb4 + 80005ba0: 160022ef jal x5,80007d00 + 80005ba4: 80005b94 .word 0x80005b94 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 8001714e .word 0x8001714e + 80005bb0: 00000000 .word 0x00000000 + 80005bb4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x29353e4d5592f84f + 80005bb8: 0008bf83 ld x31,0(x17) + 80005bbc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xdd777d3fe7f80a31 + 80005bc0: 0008b583 ld x11,0(x17) + 80005bc4: 00888893 addi x17,x17,8 + +0000000080005bc8 : +Zbkb_ror_cg_cmp_rd_rs1_b31: + ror x31, x31, x11 # perform operation + 80005bc8: 60bfdfb3 ror x31,x31,x11 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zbkb_ror_cg_cmp_rd_rs1_b31, Zbkb_ror_cg_cmp_rd_rs1_b31_str) + 80005bcc: 000cb203 ld x4,0(x25) + 80005bd0: 01f20c63 beq x4,x31,80005be8 + 80005bd4: 12c022ef jal x5,80007d00 + 80005bd8: 80005bc8 .word 0x80005bc8 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 80017185 .word 0x80017185 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xbb8f7af08d33d99f + 80005bec: 0008b583 ld x11,0(x17) + 80005bf0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x327fb6b87a8aa11e + 80005bf4: 0008b003 ld x0,0(x17) + 80005bf8: 00888893 addi x17,x17,8 + +0000000080005bfc : +Zbkb_ror_cg_cmp_rd_rs2_b0: + ror x0, x11, x0 # perform operation + 80005bfc: 6005d033 ror x0,x11,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zbkb_ror_cg_cmp_rd_rs2_b0, Zbkb_ror_cg_cmp_rd_rs2_b0_str) + 80005c00: 000cb203 ld x4,0(x25) + 80005c04: 00020c63 beq x4,x0,80005c1c + 80005c08: 0f8022ef jal x5,80007d00 + 80005c0c: 80005bfc .word 0x80005bfc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 800171bc .word 0x800171bc + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xa1bc495bbea39a15 + 80005c20: 0008b683 ld x13,0(x17) + 80005c24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xe5e490bded3c5981 + 80005c28: 0008b083 ld x1,0(x17) + 80005c2c: 00888893 addi x17,x17,8 + +0000000080005c30 : +Zbkb_ror_cg_cmp_rd_rs2_b1: + ror x1, x13, x1 # perform operation + 80005c30: 6016d0b3 ror x1,x13,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zbkb_ror_cg_cmp_rd_rs2_b1, Zbkb_ror_cg_cmp_rd_rs2_b1_str) + 80005c34: 000cb203 ld x4,0(x25) + 80005c38: 00120c63 beq x4,x1,80005c50 + 80005c3c: 0c4022ef jal x5,80007d00 + 80005c40: 80005c30 .word 0x80005c30 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 800171f2 .word 0x800171f2 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0xfba88ba515f15538 + 80005c54: 0008b903 ld x18,0(x17) + 80005c58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xcba81cd89a57f8db + 80005c5c: 0008b103 ld x2,0(x17) + 80005c60: 00888893 addi x17,x17,8 + +0000000080005c64 : +Zbkb_ror_cg_cmp_rd_rs2_b2: + ror x2, x18, x2 # perform operation + 80005c64: 60295133 ror x2,x18,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zbkb_ror_cg_cmp_rd_rs2_b2, Zbkb_ror_cg_cmp_rd_rs2_b2_str) + 80005c68: 000cb203 ld x4,0(x25) + 80005c6c: 00220c63 beq x4,x2,80005c84 + 80005c70: 090022ef jal x5,80007d00 + 80005c74: 80005c64 .word 0x80005c64 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 80017228 .word 0x80017228 + 80005c80: 00000000 .word 0x00000000 + 80005c84: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x128fffa3dcaa8de7 + 80005c88: 0008b603 ld x12,0(x17) + 80005c8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x3c1763548d12fc13 + 80005c90: 0008b183 ld x3,0(x17) + 80005c94: 00888893 addi x17,x17,8 + +0000000080005c98 : +Zbkb_ror_cg_cmp_rd_rs2_b3: + ror x3, x12, x3 # perform operation + 80005c98: 603651b3 ror x3,x12,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zbkb_ror_cg_cmp_rd_rs2_b3, Zbkb_ror_cg_cmp_rd_rs2_b3_str) + 80005c9c: 000cb203 ld x4,0(x25) + 80005ca0: 00320c63 beq x4,x3,80005cb8 + 80005ca4: 05c022ef jal x5,80007d00 + 80005ca8: 80005c98 .word 0x80005c98 + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 8001725e .word 0x8001725e + 80005cb4: 00000000 .word 0x00000000 + 80005cb8: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005cbc: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005cc0: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xf0c2bf656030f9ff + 80005cc4: 0008bf03 ld x30,0(x17) + 80005cc8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xf4a0e8197a98f27e + 80005ccc: 0008b203 ld x4,0(x17) + 80005cd0: 00888893 addi x17,x17,8 + +0000000080005cd4 : +Zbkb_ror_cg_cmp_rd_rs2_b4: + ror x4, x30, x4 # perform operation + 80005cd4: 604f5233 ror x4,x30,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zbkb_ror_cg_cmp_rd_rs2_b4, Zbkb_ror_cg_cmp_rd_rs2_b4_str) + 80005cd8: 000cb383 ld x7,0(x25) + 80005cdc: 00438c63 beq x7,x4,80005cf4 + 80005ce0: 0380246f jal x8,80007d18 + 80005ce4: 80005cd4 .word 0x80005cd4 + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 80017294 .word 0x80017294 + 80005cf0: 00000000 .word 0x00000000 + 80005cf4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xa8e0c400c90bc9bc + 80005cf8: 0008bd83 ld x27,0(x17) + 80005cfc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xd7f994e0619b8e7a + 80005d00: 0008b283 ld x5,0(x17) + 80005d04: 00888893 addi x17,x17,8 + +0000000080005d08 : +Zbkb_ror_cg_cmp_rd_rs2_b5: + ror x5, x27, x5 # perform operation + 80005d08: 605dd2b3 ror x5,x27,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zbkb_ror_cg_cmp_rd_rs2_b5, Zbkb_ror_cg_cmp_rd_rs2_b5_str) + 80005d0c: 000cb383 ld x7,0(x25) + 80005d10: 00538c63 beq x7,x5,80005d28 + 80005d14: 0040246f jal x8,80007d18 + 80005d18: 80005d08 .word 0x80005d08 + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 800172ca .word 0x800172ca + 80005d24: 00000000 .word 0x00000000 + 80005d28: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xf1c48b38bfd17e62 + 80005d2c: 0008b703 ld x14,0(x17) + 80005d30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x44111668ed0d072d + 80005d34: 0008b303 ld x6,0(x17) + 80005d38: 00888893 addi x17,x17,8 + +0000000080005d3c : +Zbkb_ror_cg_cmp_rd_rs2_b6: + ror x6, x14, x6 # perform operation + 80005d3c: 60675333 ror x6,x14,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zbkb_ror_cg_cmp_rd_rs2_b6, Zbkb_ror_cg_cmp_rd_rs2_b6_str) + 80005d40: 000cb383 ld x7,0(x25) + 80005d44: 00638c63 beq x7,x6,80005d5c + 80005d48: 7d10146f jal x8,80007d18 + 80005d4c: 80005d3c .word 0x80005d3c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 80017300 .word 0x80017300 + 80005d58: 00000000 .word 0x00000000 + 80005d5c: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005d60: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005d64: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x97a19fb590f800ab + 80005d68: 0008b683 ld x13,0(x17) + 80005d6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x0ccf0fff54577ac5 + 80005d70: 0008b383 ld x7,0(x17) + 80005d74: 00888893 addi x17,x17,8 + +0000000080005d78 : +Zbkb_ror_cg_cmp_rd_rs2_b7: + ror x7, x13, x7 # perform operation + 80005d78: 6076d3b3 ror x7,x13,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkb_ror_cg_cmp_rd_rs2_b7, Zbkb_ror_cg_cmp_rd_rs2_b7_str) + 80005d7c: 000cb203 ld x4,0(x25) + 80005d80: 00720c63 beq x4,x7,80005d98 + 80005d84: 77d012ef jal x5,80007d00 + 80005d88: 80005d78 .word 0x80005d78 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 80017336 .word 0x80017336 + 80005d94: 00000000 .word 0x00000000 + 80005d98: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xccd4e112b7550a15 + 80005d9c: 0008b183 ld x3,0(x17) + 80005da0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x41ff2fb8479d8897 + 80005da4: 0008b403 ld x8,0(x17) + 80005da8: 00888893 addi x17,x17,8 + +0000000080005dac : +Zbkb_ror_cg_cmp_rd_rs2_b8: + ror x8, x3, x8 # perform operation + 80005dac: 6081d433 ror x8,x3,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zbkb_ror_cg_cmp_rd_rs2_b8, Zbkb_ror_cg_cmp_rd_rs2_b8_str) + 80005db0: 000cb203 ld x4,0(x25) + 80005db4: 00820c63 beq x4,x8,80005dcc + 80005db8: 749012ef jal x5,80007d00 + 80005dbc: 80005dac .word 0x80005dac + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 8001736c .word 0x8001736c + 80005dc8: 00000000 .word 0x00000000 + 80005dcc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x17023821ca4c1356 + 80005dd0: 0008b603 ld x12,0(x17) + 80005dd4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x51614a86e56b7633 + 80005dd8: 0008b483 ld x9,0(x17) + 80005ddc: 00888893 addi x17,x17,8 + +0000000080005de0 : +Zbkb_ror_cg_cmp_rd_rs2_b9: + ror x9, x12, x9 # perform operation + 80005de0: 609654b3 ror x9,x12,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zbkb_ror_cg_cmp_rd_rs2_b9, Zbkb_ror_cg_cmp_rd_rs2_b9_str) + 80005de4: 000cb203 ld x4,0(x25) + 80005de8: 00920c63 beq x4,x9,80005e00 + 80005dec: 715012ef jal x5,80007d00 + 80005df0: 80005de0 .word 0x80005de0 + 80005df4: 00000000 .word 0x00000000 + 80005df8: 800173a2 .word 0x800173a2 + 80005dfc: 00000000 .word 0x00000000 + 80005e00: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0xf5757523d7921911 + 80005e04: 0008ba83 ld x21,0(x17) + 80005e08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xbb10c715b3f48975 + 80005e0c: 0008b503 ld x10,0(x17) + 80005e10: 00888893 addi x17,x17,8 + +0000000080005e14 : +Zbkb_ror_cg_cmp_rd_rs2_b10: + ror x10, x21, x10 # perform operation + 80005e14: 60aad533 ror x10,x21,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zbkb_ror_cg_cmp_rd_rs2_b10, Zbkb_ror_cg_cmp_rd_rs2_b10_str) + 80005e18: 000cb203 ld x4,0(x25) + 80005e1c: 00a20c63 beq x4,x10,80005e34 + 80005e20: 6e1012ef jal x5,80007d00 + 80005e24: 80005e14 .word 0x80005e14 + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 800173d8 .word 0x800173d8 + 80005e30: 00000000 .word 0x00000000 + 80005e34: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xdc8437b4a8e9c4d5 + 80005e38: 0008b383 ld x7,0(x17) + 80005e3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x4e95e7e20136f3fb + 80005e40: 0008b583 ld x11,0(x17) + 80005e44: 00888893 addi x17,x17,8 + +0000000080005e48 : +Zbkb_ror_cg_cmp_rd_rs2_b11: + ror x11, x7, x11 # perform operation + 80005e48: 60b3d5b3 ror x11,x7,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zbkb_ror_cg_cmp_rd_rs2_b11, Zbkb_ror_cg_cmp_rd_rs2_b11_str) + 80005e4c: 000cb203 ld x4,0(x25) + 80005e50: 00b20c63 beq x4,x11,80005e68 + 80005e54: 6ad012ef jal x5,80007d00 + 80005e58: 80005e48 .word 0x80005e48 + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 8001740f .word 0x8001740f + 80005e64: 00000000 .word 0x00000000 + 80005e68: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x056b0c339bf86cda + 80005e6c: 0008be83 ld x29,0(x17) + 80005e70: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x667cb880aa808e03 + 80005e74: 0008b603 ld x12,0(x17) + 80005e78: 00888893 addi x17,x17,8 + +0000000080005e7c : +Zbkb_ror_cg_cmp_rd_rs2_b12: + ror x12, x29, x12 # perform operation + 80005e7c: 60ced633 ror x12,x29,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zbkb_ror_cg_cmp_rd_rs2_b12, Zbkb_ror_cg_cmp_rd_rs2_b12_str) + 80005e80: 000cb203 ld x4,0(x25) + 80005e84: 00c20c63 beq x4,x12,80005e9c + 80005e88: 679012ef jal x5,80007d00 + 80005e8c: 80005e7c .word 0x80005e7c + 80005e90: 00000000 .word 0x00000000 + 80005e94: 80017446 .word 0x80017446 + 80005e98: 00000000 .word 0x00000000 + 80005e9c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x13f619a99e62dd9a + 80005ea0: 0008b703 ld x14,0(x17) + 80005ea4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x01911a1c6d50d93f + 80005ea8: 0008b683 ld x13,0(x17) + 80005eac: 00888893 addi x17,x17,8 + +0000000080005eb0 : +Zbkb_ror_cg_cmp_rd_rs2_b13: + ror x13, x14, x13 # perform operation + 80005eb0: 60d756b3 ror x13,x14,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zbkb_ror_cg_cmp_rd_rs2_b13, Zbkb_ror_cg_cmp_rd_rs2_b13_str) + 80005eb4: 000cb203 ld x4,0(x25) + 80005eb8: 00d20c63 beq x4,x13,80005ed0 + 80005ebc: 645012ef jal x5,80007d00 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 8001747d .word 0x8001747d + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x3f475470528eead2 + 80005ed4: 0008b903 ld x18,0(x17) + 80005ed8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xf6c2bacd8721d0a6 + 80005edc: 0008b703 ld x14,0(x17) + 80005ee0: 00888893 addi x17,x17,8 + +0000000080005ee4 : +Zbkb_ror_cg_cmp_rd_rs2_b14: + ror x14, x18, x14 # perform operation + 80005ee4: 60e95733 ror x14,x18,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zbkb_ror_cg_cmp_rd_rs2_b14, Zbkb_ror_cg_cmp_rd_rs2_b14_str) + 80005ee8: 000cb203 ld x4,0(x25) + 80005eec: 00e20c63 beq x4,x14,80005f04 + 80005ef0: 611012ef jal x5,80007d00 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 800174b4 .word 0x800174b4 + 80005f00: 00000000 .word 0x00000000 + 80005f04: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x52842ef0481bac9d + 80005f08: 0008bb03 ld x22,0(x17) + 80005f0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x8d8232c0578efa60 + 80005f10: 0008b783 ld x15,0(x17) + 80005f14: 00888893 addi x17,x17,8 + +0000000080005f18 : +Zbkb_ror_cg_cmp_rd_rs2_b15: + ror x15, x22, x15 # perform operation + 80005f18: 60fb57b3 ror x15,x22,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zbkb_ror_cg_cmp_rd_rs2_b15, Zbkb_ror_cg_cmp_rd_rs2_b15_str) + 80005f1c: 000cb203 ld x4,0(x25) + 80005f20: 00f20c63 beq x4,x15,80005f38 + 80005f24: 5dd012ef jal x5,80007d00 + 80005f28: 80005f18 .word 0x80005f18 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 800174eb .word 0x800174eb + 80005f34: 00000000 .word 0x00000000 + 80005f38: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xa41f15d12efa3e6e + 80005f3c: 0008b403 ld x8,0(x17) + 80005f40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x4ee37443a1404a64 + 80005f44: 0008b803 ld x16,0(x17) + 80005f48: 00888893 addi x17,x17,8 + +0000000080005f4c : +Zbkb_ror_cg_cmp_rd_rs2_b16: + ror x16, x8, x16 # perform operation + 80005f4c: 61045833 ror x16,x8,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkb_ror_cg_cmp_rd_rs2_b16, Zbkb_ror_cg_cmp_rd_rs2_b16_str) + 80005f50: 000cb203 ld x4,0(x25) + 80005f54: 01020c63 beq x4,x16,80005f6c + 80005f58: 5a9012ef jal x5,80007d00 + 80005f5c: 80005f4c .word 0x80005f4c + 80005f60: 00000000 .word 0x00000000 + 80005f64: 80017522 .word 0x80017522 + 80005f68: 00000000 .word 0x00000000 + 80005f6c: 008c8c93 addi x25,x25,8 + + mv x16, x17 # switch data pointer register to avoid conflict with test + 80005f70: 00088813 addi x16,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x4b3ade5f31711acb + 80005f74: 00083b83 ld x23,0(x16) + 80005f78: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x3e9838db45ae3e18 + 80005f7c: 00083883 ld x17,0(x16) + 80005f80: 00880813 addi x16,x16,8 + +0000000080005f84 : +Zbkb_ror_cg_cmp_rd_rs2_b17: + ror x17, x23, x17 # perform operation + 80005f84: 611bd8b3 ror x17,x23,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zbkb_ror_cg_cmp_rd_rs2_b17, Zbkb_ror_cg_cmp_rd_rs2_b17_str) + 80005f88: 000cb203 ld x4,0(x25) + 80005f8c: 01120c63 beq x4,x17,80005fa4 + 80005f90: 571012ef jal x5,80007d00 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 80017559 .word 0x80017559 + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x98ae7aed26a2c8eb + 80005fa8: 00083f03 ld x30,0(x16) + 80005fac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xc8449d9adf0af6e0 + 80005fb0: 00083903 ld x18,0(x16) + 80005fb4: 00880813 addi x16,x16,8 + +0000000080005fb8 : +Zbkb_ror_cg_cmp_rd_rs2_b18: + ror x18, x30, x18 # perform operation + 80005fb8: 612f5933 ror x18,x30,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkb_ror_cg_cmp_rd_rs2_b18, Zbkb_ror_cg_cmp_rd_rs2_b18_str) + 80005fbc: 000cb203 ld x4,0(x25) + 80005fc0: 01220c63 beq x4,x18,80005fd8 + 80005fc4: 53d012ef jal x5,80007d00 + 80005fc8: 80005fb8 .word 0x80005fb8 + 80005fcc: 00000000 .word 0x00000000 + 80005fd0: 80017590 .word 0x80017590 + 80005fd4: 00000000 .word 0x00000000 + 80005fd8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xbce5b61994c6048e + 80005fdc: 00083e03 ld x28,0(x16) + 80005fe0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xa4f86d6163b70b38 + 80005fe4: 00083983 ld x19,0(x16) + 80005fe8: 00880813 addi x16,x16,8 + +0000000080005fec : +Zbkb_ror_cg_cmp_rd_rs2_b19: + ror x19, x28, x19 # perform operation + 80005fec: 613e59b3 ror x19,x28,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zbkb_ror_cg_cmp_rd_rs2_b19, Zbkb_ror_cg_cmp_rd_rs2_b19_str) + 80005ff0: 000cb203 ld x4,0(x25) + 80005ff4: 01320c63 beq x4,x19,8000600c + 80005ff8: 509012ef jal x5,80007d00 + 80005ffc: 80005fec .word 0x80005fec + 80006000: 00000000 .word 0x00000000 + 80006004: 800175c7 .word 0x800175c7 + 80006008: 00000000 .word 0x00000000 + 8000600c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0xcea761f45fb088da + 80006010: 00083d03 ld x26,0(x16) + 80006014: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0xa830a6da7be7f8f0 + 80006018: 00083a03 ld x20,0(x16) + 8000601c: 00880813 addi x16,x16,8 + +0000000080006020 : +Zbkb_ror_cg_cmp_rd_rs2_b20: + ror x20, x26, x20 # perform operation + 80006020: 614d5a33 ror x20,x26,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkb_ror_cg_cmp_rd_rs2_b20, Zbkb_ror_cg_cmp_rd_rs2_b20_str) + 80006024: 000cb203 ld x4,0(x25) + 80006028: 01420c63 beq x4,x20,80006040 + 8000602c: 4d5012ef jal x5,80007d00 + 80006030: 80006020 .word 0x80006020 + 80006034: 00000000 .word 0x00000000 + 80006038: 800175fe .word 0x800175fe + 8000603c: 00000000 .word 0x00000000 + 80006040: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x4fecca32619d0549 + 80006044: 00083703 ld x14,0(x16) + 80006048: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x773680973d01898c + 8000604c: 00083a83 ld x21,0(x16) + 80006050: 00880813 addi x16,x16,8 + +0000000080006054 : +Zbkb_ror_cg_cmp_rd_rs2_b21: + ror x21, x14, x21 # perform operation + 80006054: 61575ab3 ror x21,x14,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zbkb_ror_cg_cmp_rd_rs2_b21, Zbkb_ror_cg_cmp_rd_rs2_b21_str) + 80006058: 000cb203 ld x4,0(x25) + 8000605c: 01520c63 beq x4,x21,80006074 + 80006060: 4a1012ef jal x5,80007d00 + 80006064: 80006054 .word 0x80006054 + 80006068: 00000000 .word 0x00000000 + 8000606c: 80017635 .word 0x80017635 + 80006070: 00000000 .word 0x00000000 + 80006074: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x4e298b25923bbd38 + 80006078: 00083703 ld x14,0(x16) + 8000607c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x192b08080364ee4f + 80006080: 00083b03 ld x22,0(x16) + 80006084: 00880813 addi x16,x16,8 + +0000000080006088 : +Zbkb_ror_cg_cmp_rd_rs2_b22: + ror x22, x14, x22 # perform operation + 80006088: 61675b33 ror x22,x14,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zbkb_ror_cg_cmp_rd_rs2_b22, Zbkb_ror_cg_cmp_rd_rs2_b22_str) + 8000608c: 000cb203 ld x4,0(x25) + 80006090: 01620c63 beq x4,x22,800060a8 + 80006094: 46d012ef jal x5,80007d00 + 80006098: 80006088 .word 0x80006088 + 8000609c: 00000000 .word 0x00000000 + 800060a0: 8001766c .word 0x8001766c + 800060a4: 00000000 .word 0x00000000 + 800060a8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x7d352c49fc69df3c + 800060ac: 00083583 ld x11,0(x16) + 800060b0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x810574b10de3f6c6 + 800060b4: 00083b83 ld x23,0(x16) + 800060b8: 00880813 addi x16,x16,8 + +00000000800060bc : +Zbkb_ror_cg_cmp_rd_rs2_b23: + ror x23, x11, x23 # perform operation + 800060bc: 6175dbb3 ror x23,x11,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkb_ror_cg_cmp_rd_rs2_b23, Zbkb_ror_cg_cmp_rd_rs2_b23_str) + 800060c0: 000cb203 ld x4,0(x25) + 800060c4: 01720c63 beq x4,x23,800060dc + 800060c8: 439012ef jal x5,80007d00 + 800060cc: 800060bc .word 0x800060bc + 800060d0: 00000000 .word 0x00000000 + 800060d4: 800176a3 .word 0x800176a3 + 800060d8: 00000000 .word 0x00000000 + 800060dc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x9e27be6c35c9d957 + 800060e0: 00083e83 ld x29,0(x16) + 800060e4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x7993205224fab3a5 + 800060e8: 00083c03 ld x24,0(x16) + 800060ec: 00880813 addi x16,x16,8 + +00000000800060f0 : +Zbkb_ror_cg_cmp_rd_rs2_b24: + ror x24, x29, x24 # perform operation + 800060f0: 618edc33 ror x24,x29,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkb_ror_cg_cmp_rd_rs2_b24, Zbkb_ror_cg_cmp_rd_rs2_b24_str) + 800060f4: 000cb203 ld x4,0(x25) + 800060f8: 01820c63 beq x4,x24,80006110 + 800060fc: 405012ef jal x5,80007d00 + 80006100: 800060f0 .word 0x800060f0 + 80006104: 00000000 .word 0x00000000 + 80006108: 800176da .word 0x800176da + 8000610c: 00000000 .word 0x00000000 + 80006110: 008c8c93 addi x25,x25,8 + + mv x3, x25 # switch signature pointer register to avoid conflict with test + 80006114: 000c8193 addi x3,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x9b37a0af06a5c9d6 + 80006118: 00083583 ld x11,0(x16) + 8000611c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x1587c944c760487f + 80006120: 00083c83 ld x25,0(x16) + 80006124: 00880813 addi x16,x16,8 + +0000000080006128 : +Zbkb_ror_cg_cmp_rd_rs2_b25: + ror x25, x11, x25 # perform operation + 80006128: 6195dcb3 ror x25,x11,x25 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkb_ror_cg_cmp_rd_rs2_b25, Zbkb_ror_cg_cmp_rd_rs2_b25_str) + 8000612c: 0001b203 ld x4,0(x3) + 80006130: 01920c63 beq x4,x25,80006148 + 80006134: 3cd012ef jal x5,80007d00 + 80006138: 80006128 .word 0x80006128 + 8000613c: 00000000 .word 0x00000000 + 80006140: 80017711 .word 0x80017711 + 80006144: 00000000 .word 0x00000000 + 80006148: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x2bdcc32a7d6f144e + 8000614c: 00083083 ld x1,0(x16) + 80006150: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xd7af635d3a8cb89b + 80006154: 00083d03 ld x26,0(x16) + 80006158: 00880813 addi x16,x16,8 + +000000008000615c : +Zbkb_ror_cg_cmp_rd_rs2_b26: + ror x26, x1, x26 # perform operation + 8000615c: 61a0dd33 ror x26,x1,x26 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkb_ror_cg_cmp_rd_rs2_b26, Zbkb_ror_cg_cmp_rd_rs2_b26_str) + 80006160: 0001b203 ld x4,0(x3) + 80006164: 01a20c63 beq x4,x26,8000617c + 80006168: 399012ef jal x5,80007d00 + 8000616c: 8000615c .word 0x8000615c + 80006170: 00000000 .word 0x00000000 + 80006174: 80017748 .word 0x80017748 + 80006178: 00000000 .word 0x00000000 + 8000617c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xcec199f1062e5661 + 80006180: 00083b83 ld x23,0(x16) + 80006184: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x85a5d18e0989e583 + 80006188: 00083d83 ld x27,0(x16) + 8000618c: 00880813 addi x16,x16,8 + +0000000080006190 : +Zbkb_ror_cg_cmp_rd_rs2_b27: + ror x27, x23, x27 # perform operation + 80006190: 61bbddb3 ror x27,x23,x27 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkb_ror_cg_cmp_rd_rs2_b27, Zbkb_ror_cg_cmp_rd_rs2_b27_str) + 80006194: 0001b203 ld x4,0(x3) + 80006198: 01b20c63 beq x4,x27,800061b0 + 8000619c: 365012ef jal x5,80007d00 + 800061a0: 80006190 .word 0x80006190 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 8001777f .word 0x8001777f + 800061ac: 00000000 .word 0x00000000 + 800061b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x49840fd64d9d4fb5 + 800061b4: 00083483 ld x9,0(x16) + 800061b8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x7a61813f06d2c247 + 800061bc: 00083e03 ld x28,0(x16) + 800061c0: 00880813 addi x16,x16,8 + +00000000800061c4 : +Zbkb_ror_cg_cmp_rd_rs2_b28: + ror x28, x9, x28 # perform operation + 800061c4: 61c4de33 ror x28,x9,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkb_ror_cg_cmp_rd_rs2_b28, Zbkb_ror_cg_cmp_rd_rs2_b28_str) + 800061c8: 0001b203 ld x4,0(x3) + 800061cc: 01c20c63 beq x4,x28,800061e4 + 800061d0: 331012ef jal x5,80007d00 + 800061d4: 800061c4 .word 0x800061c4 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 800177b6 .word 0x800177b6 + 800061e0: 00000000 .word 0x00000000 + 800061e4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xb35e2f481471fd6a + 800061e8: 00083c83 ld x25,0(x16) + 800061ec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x427da6f30ac6c12d + 800061f0: 00083e83 ld x29,0(x16) + 800061f4: 00880813 addi x16,x16,8 + +00000000800061f8 : +Zbkb_ror_cg_cmp_rd_rs2_b29: + ror x29, x25, x29 # perform operation + 800061f8: 61dcdeb3 ror x29,x25,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkb_ror_cg_cmp_rd_rs2_b29, Zbkb_ror_cg_cmp_rd_rs2_b29_str) + 800061fc: 0001b203 ld x4,0(x3) + 80006200: 01d20c63 beq x4,x29,80006218 + 80006204: 2fd012ef jal x5,80007d00 + 80006208: 800061f8 .word 0x800061f8 + 8000620c: 00000000 .word 0x00000000 + 80006210: 800177ed .word 0x800177ed + 80006214: 00000000 .word 0x00000000 + 80006218: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x87077c18c9aa648f + 8000621c: 00083983 ld x19,0(x16) + 80006220: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x4b3119aff794ecd0 + 80006224: 00083f03 ld x30,0(x16) + 80006228: 00880813 addi x16,x16,8 + +000000008000622c : +Zbkb_ror_cg_cmp_rd_rs2_b30: + ror x30, x19, x30 # perform operation + 8000622c: 61e9df33 ror x30,x19,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkb_ror_cg_cmp_rd_rs2_b30, Zbkb_ror_cg_cmp_rd_rs2_b30_str) + 80006230: 0001b203 ld x4,0(x3) + 80006234: 01e20c63 beq x4,x30,8000624c + 80006238: 2c9012ef jal x5,80007d00 + 8000623c: 8000622c .word 0x8000622c + 80006240: 00000000 .word 0x00000000 + 80006244: 80017824 .word 0x80017824 + 80006248: 00000000 .word 0x00000000 + 8000624c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x44c6d324ba5eeec6 + 80006250: 00083983 ld x19,0(x16) + 80006254: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x67b417ff21b87145 + 80006258: 00083f83 ld x31,0(x16) + 8000625c: 00880813 addi x16,x16,8 + +0000000080006260 : +Zbkb_ror_cg_cmp_rd_rs2_b31: + ror x31, x19, x31 # perform operation + 80006260: 61f9dfb3 ror x31,x19,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkb_ror_cg_cmp_rd_rs2_b31, Zbkb_ror_cg_cmp_rd_rs2_b31_str) + 80006264: 0001b203 ld x4,0(x3) + 80006268: 01f20c63 beq x4,x31,80006280 + 8000626c: 295012ef jal x5,80007d00 + 80006270: 80006260 .word 0x80006260 + 80006274: 00000000 .word 0x00000000 + 80006278: 8001785b .word 0x8001785b + 8000627c: 00000000 .word 0x00000000 + 80006280: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0xa6458d3d94a53d25 + 80006284: 00083003 ld x0,0(x16) + 80006288: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x617728397e33ce73 + 8000628c: 00083003 ld x0,0(x16) + 80006290: 00880813 addi x16,x16,8 + +0000000080006294 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b0: + ror x0, x0, x0 # perform operation + 80006294: 60005033 ror x0,x0,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkb_ror_cg_cmp_rd_rs1_rs2_b0, Zbkb_ror_cg_cmp_rd_rs1_rs2_b0_str) + 80006298: 0001b203 ld x4,0(x3) + 8000629c: 00020c63 beq x4,x0,800062b4 + 800062a0: 261012ef jal x5,80007d00 + 800062a4: 80006294 .word 0x80006294 + 800062a8: 00000000 .word 0x00000000 + 800062ac: 80017892 .word 0x80017892 + 800062b0: 00000000 .word 0x00000000 + 800062b4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xc3f5ad5ede52f9c7 + 800062b8: 00083083 ld x1,0(x16) + 800062bc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xe955d31f087799a7 + 800062c0: 00083083 ld x1,0(x16) + 800062c4: 00880813 addi x16,x16,8 + +00000000800062c8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b1: + ror x1, x1, x1 # perform operation + 800062c8: 6010d0b3 ror x1,x1,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkb_ror_cg_cmp_rd_rs1_rs2_b1, Zbkb_ror_cg_cmp_rd_rs1_rs2_b1_str) + 800062cc: 0001b203 ld x4,0(x3) + 800062d0: 00120c63 beq x4,x1,800062e8 + 800062d4: 22d012ef jal x5,80007d00 + 800062d8: 800062c8 .word 0x800062c8 + 800062dc: 00000000 .word 0x00000000 + 800062e0: 800178cc .word 0x800178cc + 800062e4: 00000000 .word 0x00000000 + 800062e8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x696e0aa68c26ed05 + 800062ec: 00083103 ld x2,0(x16) + 800062f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xd03d0de079c67f8f + 800062f4: 00083103 ld x2,0(x16) + 800062f8: 00880813 addi x16,x16,8 + +00000000800062fc : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b2: + ror x2, x2, x2 # perform operation + 800062fc: 60215133 ror x2,x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkb_ror_cg_cmp_rd_rs1_rs2_b2, Zbkb_ror_cg_cmp_rd_rs1_rs2_b2_str) + 80006300: 0001b203 ld x4,0(x3) + 80006304: 00220c63 beq x4,x2,8000631c + 80006308: 1f9012ef jal x5,80007d00 + 8000630c: 800062fc .word 0x800062fc + 80006310: 00000000 .word 0x00000000 + 80006314: 80017906 .word 0x80017906 + 80006318: 00000000 .word 0x00000000 + 8000631c: 00818193 addi x3,x3,8 + + mv x31, x3 # switch signature pointer register to avoid conflict with test + 80006320: 00018f93 addi x31,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x2b700fd99e347713 + 80006324: 00083183 ld x3,0(x16) + 80006328: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x689c5bf1531ee977 + 8000632c: 00083183 ld x3,0(x16) + 80006330: 00880813 addi x16,x16,8 + +0000000080006334 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b3: + ror x3, x3, x3 # perform operation + 80006334: 6031d1b3 ror x3,x3,x3 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zbkb_ror_cg_cmp_rd_rs1_rs2_b3, Zbkb_ror_cg_cmp_rd_rs1_rs2_b3_str) + 80006338: 000fb203 ld x4,0(x31) + 8000633c: 00320c63 beq x4,x3,80006354 + 80006340: 1c1012ef jal x5,80007d00 + 80006344: 80006334 .word 0x80006334 + 80006348: 00000000 .word 0x00000000 + 8000634c: 80017940 .word 0x80017940 + 80006350: 00000000 .word 0x00000000 + 80006354: 008f8f93 addi x31,x31,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006358: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000635c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xacebbf45d8e9fde0 + 80006360: 00083203 ld x4,0(x16) + 80006364: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x865a226292fc9589 + 80006368: 00083203 ld x4,0(x16) + 8000636c: 00880813 addi x16,x16,8 + +0000000080006370 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b4: + ror x4, x4, x4 # perform operation + 80006370: 60425233 ror x4,x4,x4 + # Check if x4 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x4, Zbkb_ror_cg_cmp_rd_rs1_rs2_b4, Zbkb_ror_cg_cmp_rd_rs1_rs2_b4_str) + 80006374: 000fb683 ld x13,0(x31) + 80006378: 00468c63 beq x13,x4,80006390 + 8000637c: 1c50176f jal x14,80007d40 + 80006380: 80006370 .word 0x80006370 + 80006384: 00000000 .word 0x00000000 + 80006388: 8001797a .word 0x8001797a + 8000638c: 00000000 .word 0x00000000 + 80006390: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x74438f09d5f39c1f + 80006394: 00083283 ld x5,0(x16) + 80006398: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xdbefb4a06b561509 + 8000639c: 00083283 ld x5,0(x16) + 800063a0: 00880813 addi x16,x16,8 + +00000000800063a4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b5: + ror x5, x5, x5 # perform operation + 800063a4: 6052d2b3 ror x5,x5,x5 + # Check if x5 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x5, Zbkb_ror_cg_cmp_rd_rs1_rs2_b5, Zbkb_ror_cg_cmp_rd_rs1_rs2_b5_str) + 800063a8: 000fb683 ld x13,0(x31) + 800063ac: 00568c63 beq x13,x5,800063c4 + 800063b0: 1910176f jal x14,80007d40 + 800063b4: 800063a4 .word 0x800063a4 + 800063b8: 00000000 .word 0x00000000 + 800063bc: 800179b4 .word 0x800179b4 + 800063c0: 00000000 .word 0x00000000 + 800063c4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x0e9e06e5bb247082 + 800063c8: 00083303 ld x6,0(x16) + 800063cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x183c77343b5edcc2 + 800063d0: 00083303 ld x6,0(x16) + 800063d4: 00880813 addi x16,x16,8 + +00000000800063d8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b6: + ror x6, x6, x6 # perform operation + 800063d8: 60635333 ror x6,x6,x6 + # Check if x6 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x6, Zbkb_ror_cg_cmp_rd_rs1_rs2_b6, Zbkb_ror_cg_cmp_rd_rs1_rs2_b6_str) + 800063dc: 000fb683 ld x13,0(x31) + 800063e0: 00668c63 beq x13,x6,800063f8 + 800063e4: 15d0176f jal x14,80007d40 + 800063e8: 800063d8 .word 0x800063d8 + 800063ec: 00000000 .word 0x00000000 + 800063f0: 800179ee .word 0x800179ee + 800063f4: 00000000 .word 0x00000000 + 800063f8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x2c0adbdbb51f5fbc + 800063fc: 00083383 ld x7,0(x16) + 80006400: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x08970566853e313d + 80006404: 00083383 ld x7,0(x16) + 80006408: 00880813 addi x16,x16,8 + +000000008000640c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b7: + ror x7, x7, x7 # perform operation + 8000640c: 6073d3b3 ror x7,x7,x7 + # Check if x7 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x7, Zbkb_ror_cg_cmp_rd_rs1_rs2_b7, Zbkb_ror_cg_cmp_rd_rs1_rs2_b7_str) + 80006410: 000fb683 ld x13,0(x31) + 80006414: 00768c63 beq x13,x7,8000642c + 80006418: 1290176f jal x14,80007d40 + 8000641c: 8000640c .word 0x8000640c + 80006420: 00000000 .word 0x00000000 + 80006424: 80017a28 .word 0x80017a28 + 80006428: 00000000 .word 0x00000000 + 8000642c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xfec855633aee4bc6 + 80006430: 00083403 ld x8,0(x16) + 80006434: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x62cc5ddc493fc7be + 80006438: 00083403 ld x8,0(x16) + 8000643c: 00880813 addi x16,x16,8 + +0000000080006440 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b8: + ror x8, x8, x8 # perform operation + 80006440: 60845433 ror x8,x8,x8 + # Check if x8 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x8, Zbkb_ror_cg_cmp_rd_rs1_rs2_b8, Zbkb_ror_cg_cmp_rd_rs1_rs2_b8_str) + 80006444: 000fb683 ld x13,0(x31) + 80006448: 00868c63 beq x13,x8,80006460 + 8000644c: 0f50176f jal x14,80007d40 + 80006450: 80006440 .word 0x80006440 + 80006454: 00000000 .word 0x00000000 + 80006458: 80017a62 .word 0x80017a62 + 8000645c: 00000000 .word 0x00000000 + 80006460: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x9998762b40b9a0d9 + 80006464: 00083483 ld x9,0(x16) + 80006468: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x4ea7d2aaba4a4650 + 8000646c: 00083483 ld x9,0(x16) + 80006470: 00880813 addi x16,x16,8 + +0000000080006474 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b9: + ror x9, x9, x9 # perform operation + 80006474: 6094d4b3 ror x9,x9,x9 + # Check if x9 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x9, Zbkb_ror_cg_cmp_rd_rs1_rs2_b9, Zbkb_ror_cg_cmp_rd_rs1_rs2_b9_str) + 80006478: 000fb683 ld x13,0(x31) + 8000647c: 00968c63 beq x13,x9,80006494 + 80006480: 0c10176f jal x14,80007d40 + 80006484: 80006474 .word 0x80006474 + 80006488: 00000000 .word 0x00000000 + 8000648c: 80017a9c .word 0x80017a9c + 80006490: 00000000 .word 0x00000000 + 80006494: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xdb466ab5e944ec64 + 80006498: 00083503 ld x10,0(x16) + 8000649c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x7f9c059de92bb936 + 800064a0: 00083503 ld x10,0(x16) + 800064a4: 00880813 addi x16,x16,8 + +00000000800064a8 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b10: + ror x10, x10, x10 # perform operation + 800064a8: 60a55533 ror x10,x10,x10 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zbkb_ror_cg_cmp_rd_rs1_rs2_b10, Zbkb_ror_cg_cmp_rd_rs1_rs2_b10_str) + 800064ac: 000fb683 ld x13,0(x31) + 800064b0: 00a68c63 beq x13,x10,800064c8 + 800064b4: 08d0176f jal x14,80007d40 + 800064b8: 800064a8 .word 0x800064a8 + 800064bc: 00000000 .word 0x00000000 + 800064c0: 80017ad6 .word 0x80017ad6 + 800064c4: 00000000 .word 0x00000000 + 800064c8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x97e0e1fd7d321a92 + 800064cc: 00083583 ld x11,0(x16) + 800064d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0xe757a003cf5e61f1 + 800064d4: 00083583 ld x11,0(x16) + 800064d8: 00880813 addi x16,x16,8 + +00000000800064dc : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b11: + ror x11, x11, x11 # perform operation + 800064dc: 60b5d5b3 ror x11,x11,x11 + # Check if x11 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x11, Zbkb_ror_cg_cmp_rd_rs1_rs2_b11, Zbkb_ror_cg_cmp_rd_rs1_rs2_b11_str) + 800064e0: 000fb683 ld x13,0(x31) + 800064e4: 00b68c63 beq x13,x11,800064fc + 800064e8: 0590176f jal x14,80007d40 + 800064ec: 800064dc .word 0x800064dc + 800064f0: 00000000 .word 0x00000000 + 800064f4: 80017b11 .word 0x80017b11 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x7d0c80cbef769594 + 80006500: 00083603 ld x12,0(x16) + 80006504: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x8251cbdc833ef554 + 80006508: 00083603 ld x12,0(x16) + 8000650c: 00880813 addi x16,x16,8 + +0000000080006510 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b12: + ror x12, x12, x12 # perform operation + 80006510: 60c65633 ror x12,x12,x12 + # Check if x12 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x12, Zbkb_ror_cg_cmp_rd_rs1_rs2_b12, Zbkb_ror_cg_cmp_rd_rs1_rs2_b12_str) + 80006514: 000fb683 ld x13,0(x31) + 80006518: 00c68c63 beq x13,x12,80006530 + 8000651c: 0250176f jal x14,80007d40 + 80006520: 80006510 .word 0x80006510 + 80006524: 00000000 .word 0x00000000 + 80006528: 80017b4c .word 0x80017b4c + 8000652c: 00000000 .word 0x00000000 + 80006530: 008f8f93 addi x31,x31,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006534: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006538: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xd3620894cdbed05f + 8000653c: 00083683 ld x13,0(x16) + 80006540: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xaea8ff4ad1fcfd34 + 80006544: 00083683 ld x13,0(x16) + 80006548: 00880813 addi x16,x16,8 + +000000008000654c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b13: + ror x13, x13, x13 # perform operation + 8000654c: 60d6d6b3 ror x13,x13,x13 + # Check if x13 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x13, Zbkb_ror_cg_cmp_rd_rs1_rs2_b13, Zbkb_ror_cg_cmp_rd_rs1_rs2_b13_str) + 80006550: 000fb383 ld x7,0(x31) + 80006554: 00d38c63 beq x7,x13,8000656c + 80006558: 7c00146f jal x8,80007d18 + 8000655c: 8000654c .word 0x8000654c + 80006560: 00000000 .word 0x00000000 + 80006564: 80017b87 .word 0x80017b87 + 80006568: 00000000 .word 0x00000000 + 8000656c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xcaf786460ea4c78c + 80006570: 00083703 ld x14,0(x16) + 80006574: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x90815f8bad06537f + 80006578: 00083703 ld x14,0(x16) + 8000657c: 00880813 addi x16,x16,8 + +0000000080006580 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b14: + ror x14, x14, x14 # perform operation + 80006580: 60e75733 ror x14,x14,x14 + # Check if x14 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x14, Zbkb_ror_cg_cmp_rd_rs1_rs2_b14, Zbkb_ror_cg_cmp_rd_rs1_rs2_b14_str) + 80006584: 000fb383 ld x7,0(x31) + 80006588: 00e38c63 beq x7,x14,800065a0 + 8000658c: 78c0146f jal x8,80007d18 + 80006590: 80006580 .word 0x80006580 + 80006594: 00000000 .word 0x00000000 + 80006598: 80017bc2 .word 0x80017bc2 + 8000659c: 00000000 .word 0x00000000 + 800065a0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x21f7fb1a0d7a387a + 800065a4: 00083783 ld x15,0(x16) + 800065a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x294b4da9c796638e + 800065ac: 00083783 ld x15,0(x16) + 800065b0: 00880813 addi x16,x16,8 + +00000000800065b4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b15: + ror x15, x15, x15 # perform operation + 800065b4: 60f7d7b3 ror x15,x15,x15 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkb_ror_cg_cmp_rd_rs1_rs2_b15, Zbkb_ror_cg_cmp_rd_rs1_rs2_b15_str) + 800065b8: 000fb383 ld x7,0(x31) + 800065bc: 00f38c63 beq x7,x15,800065d4 + 800065c0: 7580146f jal x8,80007d18 + 800065c4: 800065b4 .word 0x800065b4 + 800065c8: 00000000 .word 0x00000000 + 800065cc: 80017bfd .word 0x80017bfd + 800065d0: 00000000 .word 0x00000000 + 800065d4: 008f8f93 addi x31,x31,8 + + mv x15, x16 # switch data pointer register to avoid conflict with test + 800065d8: 00080793 addi x15,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x58a846457cdaa335 + 800065dc: 0007b803 ld x16,0(x15) + 800065e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xb877b1ccfa173fd6 + 800065e4: 0007b803 ld x16,0(x15) + 800065e8: 00878793 addi x15,x15,8 + +00000000800065ec : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b16: + ror x16, x16, x16 # perform operation + 800065ec: 61085833 ror x16,x16,x16 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zbkb_ror_cg_cmp_rd_rs1_rs2_b16, Zbkb_ror_cg_cmp_rd_rs1_rs2_b16_str) + 800065f0: 000fb383 ld x7,0(x31) + 800065f4: 01038c63 beq x7,x16,8000660c + 800065f8: 7200146f jal x8,80007d18 + 800065fc: 800065ec .word 0x800065ec + 80006600: 00000000 .word 0x00000000 + 80006604: 80017c38 .word 0x80017c38 + 80006608: 00000000 .word 0x00000000 + 8000660c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x16fd8df01cb3e42d + 80006610: 0007b883 ld x17,0(x15) + 80006614: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x4456a511c5341862 + 80006618: 0007b883 ld x17,0(x15) + 8000661c: 00878793 addi x15,x15,8 + +0000000080006620 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b17: + ror x17, x17, x17 # perform operation + 80006620: 6118d8b3 ror x17,x17,x17 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkb_ror_cg_cmp_rd_rs1_rs2_b17, Zbkb_ror_cg_cmp_rd_rs1_rs2_b17_str) + 80006624: 000fb383 ld x7,0(x31) + 80006628: 01138c63 beq x7,x17,80006640 + 8000662c: 6ec0146f jal x8,80007d18 + 80006630: 80006620 .word 0x80006620 + 80006634: 00000000 .word 0x00000000 + 80006638: 80017c73 .word 0x80017c73 + 8000663c: 00000000 .word 0x00000000 + 80006640: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xdbe56f47937e0a95 + 80006644: 0007b903 ld x18,0(x15) + 80006648: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x62a2fb91f0a16f86 + 8000664c: 0007b903 ld x18,0(x15) + 80006650: 00878793 addi x15,x15,8 + +0000000080006654 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b18: + ror x18, x18, x18 # perform operation + 80006654: 61295933 ror x18,x18,x18 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkb_ror_cg_cmp_rd_rs1_rs2_b18, Zbkb_ror_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 000fb383 ld x7,0(x31) + 8000665c: 01238c63 beq x7,x18,80006674 + 80006660: 6b80146f jal x8,80007d18 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 80017cae .word 0x80017cae + 80006670: 00000000 .word 0x00000000 + 80006674: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xb196c77787b01960 + 80006678: 0007b983 ld x19,0(x15) + 8000667c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x5e8fdc9c68419d42 + 80006680: 0007b983 ld x19,0(x15) + 80006684: 00878793 addi x15,x15,8 + +0000000080006688 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b19: + ror x19, x19, x19 # perform operation + 80006688: 6139d9b3 ror x19,x19,x19 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkb_ror_cg_cmp_rd_rs1_rs2_b19, Zbkb_ror_cg_cmp_rd_rs1_rs2_b19_str) + 8000668c: 000fb383 ld x7,0(x31) + 80006690: 01338c63 beq x7,x19,800066a8 + 80006694: 6840146f jal x8,80007d18 + 80006698: 80006688 .word 0x80006688 + 8000669c: 00000000 .word 0x00000000 + 800066a0: 80017ce9 .word 0x80017ce9 + 800066a4: 00000000 .word 0x00000000 + 800066a8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x7b1c9ff423c313fe + 800066ac: 0007ba03 ld x20,0(x15) + 800066b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x5d2df8d325693b79 + 800066b4: 0007ba03 ld x20,0(x15) + 800066b8: 00878793 addi x15,x15,8 + +00000000800066bc : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b20: + ror x20, x20, x20 # perform operation + 800066bc: 614a5a33 ror x20,x20,x20 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_ror_cg_cmp_rd_rs1_rs2_b20, Zbkb_ror_cg_cmp_rd_rs1_rs2_b20_str) + 800066c0: 000fb383 ld x7,0(x31) + 800066c4: 01438c63 beq x7,x20,800066dc + 800066c8: 6500146f jal x8,80007d18 + 800066cc: 800066bc .word 0x800066bc + 800066d0: 00000000 .word 0x00000000 + 800066d4: 80017d24 .word 0x80017d24 + 800066d8: 00000000 .word 0x00000000 + 800066dc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x9019e2be7ced43aa + 800066e0: 0007ba83 ld x21,0(x15) + 800066e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x132fe3fb1c86d5e4 + 800066e8: 0007ba83 ld x21,0(x15) + 800066ec: 00878793 addi x15,x15,8 + +00000000800066f0 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b21: + ror x21, x21, x21 # perform operation + 800066f0: 615adab3 ror x21,x21,x21 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkb_ror_cg_cmp_rd_rs1_rs2_b21, Zbkb_ror_cg_cmp_rd_rs1_rs2_b21_str) + 800066f4: 000fb383 ld x7,0(x31) + 800066f8: 01538c63 beq x7,x21,80006710 + 800066fc: 61c0146f jal x8,80007d18 + 80006700: 800066f0 .word 0x800066f0 + 80006704: 00000000 .word 0x00000000 + 80006708: 80017d5f .word 0x80017d5f + 8000670c: 00000000 .word 0x00000000 + 80006710: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0xde61c4ba15990b54 + 80006714: 0007bb03 ld x22,0(x15) + 80006718: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xee7f63732745d290 + 8000671c: 0007bb03 ld x22,0(x15) + 80006720: 00878793 addi x15,x15,8 + +0000000080006724 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b22: + ror x22, x22, x22 # perform operation + 80006724: 616b5b33 ror x22,x22,x22 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkb_ror_cg_cmp_rd_rs1_rs2_b22, Zbkb_ror_cg_cmp_rd_rs1_rs2_b22_str) + 80006728: 000fb383 ld x7,0(x31) + 8000672c: 01638c63 beq x7,x22,80006744 + 80006730: 5e80146f jal x8,80007d18 + 80006734: 80006724 .word 0x80006724 + 80006738: 00000000 .word 0x00000000 + 8000673c: 80017d9a .word 0x80017d9a + 80006740: 00000000 .word 0x00000000 + 80006744: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x8f955c608cff72ce + 80006748: 0007bb83 ld x23,0(x15) + 8000674c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x9a5b1a914dc114ac + 80006750: 0007bb83 ld x23,0(x15) + 80006754: 00878793 addi x15,x15,8 + +0000000080006758 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b23: + ror x23, x23, x23 # perform operation + 80006758: 617bdbb3 ror x23,x23,x23 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkb_ror_cg_cmp_rd_rs1_rs2_b23, Zbkb_ror_cg_cmp_rd_rs1_rs2_b23_str) + 8000675c: 000fb383 ld x7,0(x31) + 80006760: 01738c63 beq x7,x23,80006778 + 80006764: 5b40146f jal x8,80007d18 + 80006768: 80006758 .word 0x80006758 + 8000676c: 00000000 .word 0x00000000 + 80006770: 80017dd5 .word 0x80017dd5 + 80006774: 00000000 .word 0x00000000 + 80006778: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x02d8f9659b6679a0 + 8000677c: 0007bc03 ld x24,0(x15) + 80006780: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x97a283cf74b35c5f + 80006784: 0007bc03 ld x24,0(x15) + 80006788: 00878793 addi x15,x15,8 + +000000008000678c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b24: + ror x24, x24, x24 # perform operation + 8000678c: 618c5c33 ror x24,x24,x24 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_ror_cg_cmp_rd_rs1_rs2_b24, Zbkb_ror_cg_cmp_rd_rs1_rs2_b24_str) + 80006790: 000fb383 ld x7,0(x31) + 80006794: 01838c63 beq x7,x24,800067ac + 80006798: 5800146f jal x8,80007d18 + 8000679c: 8000678c .word 0x8000678c + 800067a0: 00000000 .word 0x00000000 + 800067a4: 80017e10 .word 0x80017e10 + 800067a8: 00000000 .word 0x00000000 + 800067ac: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xb8db3bb567575e0b + 800067b0: 0007bc83 ld x25,0(x15) + 800067b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x82e6b7d60a17fa5e + 800067b8: 0007bc83 ld x25,0(x15) + 800067bc: 00878793 addi x15,x15,8 + +00000000800067c0 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b25: + ror x25, x25, x25 # perform operation + 800067c0: 619cdcb3 ror x25,x25,x25 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkb_ror_cg_cmp_rd_rs1_rs2_b25, Zbkb_ror_cg_cmp_rd_rs1_rs2_b25_str) + 800067c4: 000fb383 ld x7,0(x31) + 800067c8: 01938c63 beq x7,x25,800067e0 + 800067cc: 54c0146f jal x8,80007d18 + 800067d0: 800067c0 .word 0x800067c0 + 800067d4: 00000000 .word 0x00000000 + 800067d8: 80017e4b .word 0x80017e4b + 800067dc: 00000000 .word 0x00000000 + 800067e0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xb0ddfe4d91e24950 + 800067e4: 0007bd03 ld x26,0(x15) + 800067e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xa6ef93ac77152d09 + 800067ec: 0007bd03 ld x26,0(x15) + 800067f0: 00878793 addi x15,x15,8 + +00000000800067f4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b26: + ror x26, x26, x26 # perform operation + 800067f4: 61ad5d33 ror x26,x26,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkb_ror_cg_cmp_rd_rs1_rs2_b26, Zbkb_ror_cg_cmp_rd_rs1_rs2_b26_str) + 800067f8: 000fb383 ld x7,0(x31) + 800067fc: 01a38c63 beq x7,x26,80006814 + 80006800: 5180146f jal x8,80007d18 + 80006804: 800067f4 .word 0x800067f4 + 80006808: 00000000 .word 0x00000000 + 8000680c: 80017e86 .word 0x80017e86 + 80006810: 00000000 .word 0x00000000 + 80006814: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x6dfe74e8f166e925 + 80006818: 0007bd83 ld x27,0(x15) + 8000681c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x19f38d4238ecfd6e + 80006820: 0007bd83 ld x27,0(x15) + 80006824: 00878793 addi x15,x15,8 + +0000000080006828 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b27: + ror x27, x27, x27 # perform operation + 80006828: 61bdddb3 ror x27,x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkb_ror_cg_cmp_rd_rs1_rs2_b27, Zbkb_ror_cg_cmp_rd_rs1_rs2_b27_str) + 8000682c: 000fb383 ld x7,0(x31) + 80006830: 01b38c63 beq x7,x27,80006848 + 80006834: 4e40146f jal x8,80007d18 + 80006838: 80006828 .word 0x80006828 + 8000683c: 00000000 .word 0x00000000 + 80006840: 80017ec1 .word 0x80017ec1 + 80006844: 00000000 .word 0x00000000 + 80006848: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x3ae2fe88ead4e745 + 8000684c: 0007be03 ld x28,0(x15) + 80006850: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x7a6e381ae72674d9 + 80006854: 0007be03 ld x28,0(x15) + 80006858: 00878793 addi x15,x15,8 + +000000008000685c : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b28: + ror x28, x28, x28 # perform operation + 8000685c: 61ce5e33 ror x28,x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkb_ror_cg_cmp_rd_rs1_rs2_b28, Zbkb_ror_cg_cmp_rd_rs1_rs2_b28_str) + 80006860: 000fb383 ld x7,0(x31) + 80006864: 01c38c63 beq x7,x28,8000687c + 80006868: 4b00146f jal x8,80007d18 + 8000686c: 8000685c .word 0x8000685c + 80006870: 00000000 .word 0x00000000 + 80006874: 80017efc .word 0x80017efc + 80006878: 00000000 .word 0x00000000 + 8000687c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xd6ed4825e8e93ebf + 80006880: 0007be83 ld x29,0(x15) + 80006884: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xf48602b90eeb6981 + 80006888: 0007be83 ld x29,0(x15) + 8000688c: 00878793 addi x15,x15,8 + +0000000080006890 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b29: + ror x29, x29, x29 # perform operation + 80006890: 61dedeb3 ror x29,x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkb_ror_cg_cmp_rd_rs1_rs2_b29, Zbkb_ror_cg_cmp_rd_rs1_rs2_b29_str) + 80006894: 000fb383 ld x7,0(x31) + 80006898: 01d38c63 beq x7,x29,800068b0 + 8000689c: 47c0146f jal x8,80007d18 + 800068a0: 80006890 .word 0x80006890 + 800068a4: 00000000 .word 0x00000000 + 800068a8: 80017f37 .word 0x80017f37 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x66ec037ea5384483 + 800068b4: 0007bf03 ld x30,0(x15) + 800068b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xf88da863b5d6f4ae + 800068bc: 0007bf03 ld x30,0(x15) + 800068c0: 00878793 addi x15,x15,8 + +00000000800068c4 : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b30: + ror x30, x30, x30 # perform operation + 800068c4: 61ef5f33 ror x30,x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkb_ror_cg_cmp_rd_rs1_rs2_b30, Zbkb_ror_cg_cmp_rd_rs1_rs2_b30_str) + 800068c8: 000fb383 ld x7,0(x31) + 800068cc: 01e38c63 beq x7,x30,800068e4 + 800068d0: 4480146f jal x8,80007d18 + 800068d4: 800068c4 .word 0x800068c4 + 800068d8: 00000000 .word 0x00000000 + 800068dc: 80017f72 .word 0x80017f72 + 800068e0: 00000000 .word 0x00000000 + 800068e4: 008f8f93 addi x31,x31,8 + + mv x24, x31 # switch signature pointer register to avoid conflict with test + 800068e8: 000f8c13 addi x24,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x5c6bf1b731b7cef8 + 800068ec: 0007bf83 ld x31,0(x15) + 800068f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x65c1411136af0265 + 800068f4: 0007bf83 ld x31,0(x15) + 800068f8: 00878793 addi x15,x15,8 + +00000000800068fc : +Zbkb_ror_cg_cmp_rd_rs1_rs2_b31: + ror x31, x31, x31 # perform operation + 800068fc: 61ffdfb3 ror x31,x31,x31 + # Check if x31 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x31, Zbkb_ror_cg_cmp_rd_rs1_rs2_b31, Zbkb_ror_cg_cmp_rd_rs1_rs2_b31_str) + 80006900: 000c3383 ld x7,0(x24) + 80006904: 01f38c63 beq x7,x31,8000691c + 80006908: 4100146f jal x8,80007d18 + 8000690c: 800068fc .word 0x800068fc + 80006910: 00000000 .word 0x00000000 + 80006914: 80017fad .word 0x80017fad + 80006918: 00000000 .word 0x00000000 + 8000691c: 008c0c13 addi x24,x24,8 + + mv x2, x24 # restore signature pointer to default register for teardown + 80006920: 000c0113 addi x2,x24,0 + +0000000080006924 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006924: 00000513 addi x10,x0,0 + 80006928: 00000073 ecall + 8000692c: fff00513 addi x10,x0,-1 + 80006930: 25800413 addi x8,x0,600 + +0000000080006934 : + 80006934: 34002373 csrrs x6,mscratch,x0 + +0000000080006938 : + 80006938: 2b833383 ld x7,696(x6) + +000000008000693c : + 8000693c: 2a033383 ld x7,672(x6) + +0000000080006940 : + 80006940: 2d033483 ld x9,720(x6) + 80006944: 34049073 csrrw x0,mscratch,x9 + +0000000080006948 : + 80006948: 2c833483 ld x9,712(x6) + 8000694c: 305493f3 csrrw x7,mtvec,x9 + 80006950: ffc4f493 andi x9,x9,-4 + 80006954: ffc3f393 andi x7,x7,-4 + 80006958: 00749e63 bne x9,x7,80006974 + +000000008000695c : + 8000695c: 00030493 addi x9,x6,0 + +0000000080006960 : + 80006960: 0004a783 lw x15,0(x9) + 80006964: 00f3a023 sw x15,0(x7) + 80006968: 00438393 addi x7,x7,4 + 8000696c: 00448493 addi x9,x9,4 + 80006970: fe83c8e3 blt x7,x8,80006960 + 80006974: 0000100f fence.i + +0000000080006978 : + 80006978: 00000013 addi x0,x0,0 + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: d4d50513 addi x10,x10,-691 # 8001870d + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: d4550513 addi x10,x10,-699 # 80018745 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: d6550513 addi x10,x10,-667 # 800187a5 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: 8d050513 addi x10,x10,-1840 # 80019350 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00014397 auipc x7,0x14 + 80006b04: 34038393 addi x7,x7,832 # 8001ae40 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00014417 auipc x8,0x14 + 80006b44: 2f040413 addi x8,x8,752 # 8001ae30 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 800188f9 .word 0x800188f9 + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018767 .word 0x80018767 + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: b1450513 addi x10,x10,-1260 # 800186d4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: b0d50513 addi x10,x10,-1267 # 8001870d + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc5ff06f jal x0,80006924 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: ca1ff06f jal x0,80006924 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9830313 addi x6,x6,-1384 # 80006978 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: ca750513 addi x10,x10,-857 # 80019d87 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 03850513 addi x10,x10,56 # 80018158 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00011517 auipc x10,0x11 + 80007164: 6ae50513 addi x10,x10,1710 # 8001880e + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00011517 auipc x10,0x11 + 800071a4: 56d50513 addi x10,x10,1389 # 8001870d + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: b9848493 addi x9,x9,-1128 # 80018138 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: d2840413 addi x8,x8,-728 # 80038308 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018910 .word 0x80018910 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018a12 .word 0x80018a12 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018b0d .word 0x80018b0d + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80018c00 .word 0x80018c00 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80018d73 .word 0x80018d73 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 2f020213 addi x4,x4,752 # 80017ff0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 2d838393 addi x7,x7,728 # 80017ff0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 2b068693 addi x13,x13,688 # 80017ff0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 28848493 addi x9,x9,648 # 80017ff0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 1e44a483 lw x9,484(x9) # 80017ff0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: f1040413 addi x8,x8,-240 # 80019dd0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00030417 auipc x8,0x30 + 80007f04: 41040413 addi x8,x8,1040 # 80038310 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 1d848493 addi x9,x9,472 # 80018118 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 19848493 addi x9,x9,408 # 80018118 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 16c80813 addi x16,x16,364 # 80018128 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 14c80813 addi x16,x16,332 # 80018128 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: 91138393 addi x7,x7,-1775 # 800188f9 + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 12880813 addi x16,x16,296 # 80018120 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: 90c38393 addi x7,x7,-1780 # 80018910 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: 9f638393 addi x7,x7,-1546 # 80018a12 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: ad938393 addi x7,x7,-1319 # 80018b0d + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: bb438393 addi x7,x7,-1100 # 80018c00 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: d0f38393 addi x7,x7,-753 # 80018d73 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: c7b38393 addi x7,x7,-901 # 80018cf7 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: ca138393 addi x7,x7,-863 # 80018d35 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: 8a438393 addi x7,x7,-1884 # 80018950 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: 98c38393 addi x7,x7,-1652 # 80018a50 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: a6d38393 addi x7,x7,-1427 # 80018b49 + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: b4938393 addi x7,x7,-1207 # 80018c3d + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: ca238393 addi x7,x7,-862 # 80018dae + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: 86c38393 addi x7,x7,-1940 # 80018990 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: 95238393 addi x7,x7,-1710 # 80018a8e + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: a3138393 addi x7,x7,-1487 # 80018b85 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: b0e38393 addi x7,x7,-1266 # 80018c7a + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: c6538393 addi x7,x7,-923 # 80018de9 + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: 83538393 addi x7,x7,-1995 # 800189d1 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: 91938393 addi x7,x7,-1767 # 80018acd + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: 9f638393 addi x7,x7,-1546 # 80018bc2 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: ad438393 addi x7,x7,-1324 # 80018cb8 + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: c2938393 addi x7,x7,-983 # 80018e25 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: c4e38393 addi x7,x7,-946 # 80018e62 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: c8538393 addi x7,x7,-891 # 80018eb1 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: d6838393 addi x7,x7,-664 # 80018fac + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: e4c38393 addi x7,x7,-436 # 800190a8 + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: ea480813 addi x16,x16,-348 # 80018120 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: e9480813 addi x16,x16,-364 # 80018120 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: e8c80813 addi x16,x16,-372 # 80018124 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: e7880813 addi x16,x16,-392 # 80018120 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00010517 auipc x10,0x10 + 80008304: 40d50513 addi x10,x10,1037 # 8001870d + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00010517 auipc x10,0x10 + 80008344: 40550513 addi x10,x10,1029 # 80018745 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00010517 auipc x10,0x10 + 80008384: 47c50513 addi x10,x10,1148 # 800187fc + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: d6853503 ld x10,-664(x10) # 80018110 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00010517 auipc x10,0x10 + 800083c4: 44e50513 addi x10,x10,1102 # 8001880e + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: c0852503 lw x10,-1016(x10) # 80017ff0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00010517 auipc x10,0x10 + 80008404: 41050513 addi x10,x10,1040 # 80018810 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: cc852503 lw x10,-824(x10) # 800180f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: cf850513 addi x10,x10,-776 # 80018158 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 38450513 addi x10,x10,900 # 80018824 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: c3053503 ld x10,-976(x10) # 800180f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: c7850513 addi x10,x10,-904 # 80018158 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: d3b50513 addi x10,x10,-709 # 8001925b + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: aa852503 lw x10,-1368(x10) # 80017ff0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: bf860613 addi x12,x12,-1032 # 80018158 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: b6c52503 lw x10,-1172(x10) # 800180f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: db150513 addi x10,x10,-591 # 80019371 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: b5860613 addi x12,x12,-1192 # 80018158 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: acc52503 lw x10,-1332(x10) # 800180f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: b1860613 addi x12,x12,-1256 # 80018158 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: a8c52503 lw x10,-1396(x10) # 800180f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: bd450513 addi x10,x10,-1068 # 80019254 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: a9850513 addi x10,x10,-1384 # 80018158 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: b6c50513 addi x10,x10,-1172 # 8001926c + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: 8c852503 lw x10,-1848(x10) # 80017ff0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: 9c853503 ld x10,-1592(x10) # 80018100 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: 9b453503 ld x10,-1612(x10) # 80018100 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: 9f850513 addi x10,x10,-1544 # 80018158 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: 99052503 lw x10,-1648(x10) # 80018118 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ae350513 addi x10,x10,-1309 # 80019283 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: 82852503 lw x10,-2008(x10) # 80017ff0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: 93053503 ld x10,-1744(x10) # 80018108 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: 91c53503 ld x10,-1764(x10) # 80018108 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: 95850513 addi x10,x10,-1704 # 80018158 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: a5a50513 addi x10,x10,-1446 # 8001929a + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: 8a053503 ld x10,-1888(x10) # 80018108 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: 8d850513 addi x10,x10,-1832 # 80018158 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: a3850513 addi x10,x10,-1480 # 800192f8 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: 82053503 ld x10,-2016(x10) # 80018108 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: 85850513 addi x10,x10,-1960 # 80018158 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 0000f417 auipc x8,0xf + 80008930: 7f442403 lw x8,2036(x8) # 80018120 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: a5d50513 addi x10,x10,-1443 # 8001939d + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: a4950513 addi x10,x10,-1463 # 800193c9 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 0000f817 auipc x16,0xf + 800089ac: 78080813 addi x16,x16,1920 # 80018128 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: e4e50513 addi x10,x10,-434 # 8001880e + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: 9d950513 addi x10,x10,-1575 # 800193d9 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 0000f517 auipc x10,0xf + 80008a2c: 6e053503 ld x10,1760(x10) # 80018108 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 0000f517 auipc x10,0xf + 80008a44: 71850513 addi x10,x10,1816 # 80018158 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: 98450513 addi x10,x10,-1660 # 80019404 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 0000f517 auipc x10,0xf + 80008aac: 65853503 ld x10,1624(x10) # 80018100 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 0000f517 auipc x10,0xf + 80008ac4: 69850513 addi x10,x10,1688 # 80018158 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 0000f317 auipc x6,0xf + 80008aec: 61833303 ld x6,1560(x6) # 80018100 + 80008af0: 0000f397 auipc x7,0xf + 80008af4: 6183b383 ld x7,1560(x7) # 80018108 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: 93350513 addi x10,x10,-1741 # 80019433 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: 95b50513 addi x10,x10,-1701 # 8001949b + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 0000f317 auipc x6,0xf + 80008b6c: 59833303 ld x6,1432(x6) # 80018100 + 80008b70: 0000f397 auipc x7,0xf + 80008b74: 5983b383 ld x7,1432(x7) # 80018108 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 0000f517 auipc x10,0xf + 80008ba4: 5b850513 addi x10,x10,1464 # 80018158 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: 8e250513 addi x10,x10,-1822 # 800194c2 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: 83f50513 addi x10,x10,-1985 # 8001945f + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: 83b50513 addi x10,x10,-1989 # 8001949b + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 0000f317 auipc x6,0xf + 80008c8c: 48033303 ld x6,1152(x6) # 80018108 + 80008c90: 0000f397 auipc x7,0xf + 80008c94: 4703b383 ld x7,1136(x7) # 80018100 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 0000f517 auipc x10,0xf + 80008cc4: 49850513 addi x10,x10,1176 # 80018158 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: 8aa50513 addi x10,x10,-1878 # 800195aa + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: 95150513 addi x10,x10,-1711 # 80019691 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 3bc52503 lw x10,956(x10) # 80018124 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: 92d50513 addi x10,x10,-1747 # 800196cd + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: 8cb50513 addi x10,x10,-1845 # 800196ab + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: 89350513 addi x10,x10,-1901 # 800196b3 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: 85b50513 addi x10,x10,-1957 # 800196bb + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: 82450513 addi x10,x10,-2012 # 800196c4 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00010517 auipc x10,0x10 + 80008ee4: 7f650513 addi x10,x10,2038 # 800196d6 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 21852503 lw x10,536(x10) # 80018120 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: 8cd50513 addi x10,x10,-1843 # 8001982d + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00010517 auipc x10,0x10 + 80008fa4: 75050513 addi x10,x10,1872 # 800196f0 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00010517 auipc x10,0x10 + 80008fe4: 74150513 addi x10,x10,1857 # 80019721 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00010517 auipc x10,0x10 + 80009024: 72150513 addi x10,x10,1825 # 80019741 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00010517 auipc x10,0x10 + 80009064: 6ff50513 addi x10,x10,1791 # 8001975f + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00010517 auipc x10,0x10 + 800090a4: 6de50513 addi x10,x10,1758 # 8001977e + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00010517 auipc x10,0x10 + 800090e4: 6c650513 addi x10,x10,1734 # 800197a6 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00010517 auipc x10,0x10 + 80009124: 6b250513 addi x10,x10,1714 # 800197d2 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00010517 auipc x10,0x10 + 80009164: 69e50513 addi x10,x10,1694 # 800197fe + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00010517 auipc x10,0x10 + 800091a4: 69c50513 addi x10,x10,1692 # 8001983c + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: f4053503 ld x10,-192(x10) # 80018108 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: f7850513 addi x10,x10,-136 # 80018158 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00010517 auipc x10,0x10 + 80009224: 63350513 addi x10,x10,1587 # 80019853 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: eb853503 ld x10,-328(x10) # 80018100 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: ef850513 addi x10,x10,-264 # 80018158 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: e9852503 lw x10,-360(x10) # 80018120 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00010517 auipc x10,0x10 + 800092a4: 5ca50513 addi x10,x10,1482 # 8001986a + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: e4053503 ld x10,-448(x10) # 80018108 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00010517 auipc x10,0x10 + 800092e4: 5a150513 addi x10,x10,1441 # 80019881 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: df853503 ld x10,-520(x10) # 80018100 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: dfc52503 lw x10,-516(x10) # 80018120 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00010517 auipc x10,0x10 + 80009344: 5b750513 addi x10,x10,1463 # 800198f7 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00010517 auipc x10,0x10 + 80009384: 64d50513 addi x10,x10,1613 # 800199cd + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00010517 auipc x10,0x10 + 800093c4: 70050513 addi x10,x10,1792 # 80019ac0 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00010517 auipc x10,0x10 + 80009404: 7bb50513 addi x10,x10,1979 # 80019bbb + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: 86250513 addi x10,x10,-1950 # 80019ca2 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00010517 auipc x10,0x10 + 80009484: 42f50513 addi x10,x10,1071 # 800198af + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: c9063603 ld x12,-880(x12) # 80018138 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 3d850513 addi x10,x10,984 # 80018898 + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: c3850513 addi x10,x10,-968 # 80018158 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: c2058593 addi x11,x11,-992 # 80018180 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: cb058593 addi x11,x11,-848 # 80018240 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 0fe50513 addi x10,x10,254 # 800186be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: d5050513 addi x10,x10,-688 # 80019350 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: b0060613 addi x12,x12,-1280 # 80018130 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 27950513 addi x10,x10,633 # 800188b9 + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: ad053503 ld x10,-1328(x10) # 80018138 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: ad850513 addi x10,x10,-1320 # 80018158 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 20950513 addi x10,x10,521 # 800188c9 + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: a5853503 ld x10,-1448(x10) # 80018140 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: a5850513 addi x10,x10,-1448 # 80018158 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 19950513 addi x10,x10,409 # 800188d9 + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: 9e053503 ld x10,-1568(x10) # 80018148 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: 9d850513 addi x10,x10,-1576 # 80018158 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 12950513 addi x10,x10,297 # 800188e9 + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: 96853503 ld x10,-1688(x10) # 80018150 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: 95850513 addi x10,x10,-1704 # 80018158 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: 90860613 addi x12,x12,-1784 # 80018130 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: 91860613 addi x12,x12,-1768 # 80018158 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 88c30313 addi x6,x6,-1908 # 80006924 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87430313 addi x6,x6,-1932 # 80006924 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 85c30313 addi x6,x6,-1956 # 80006924 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f478793 addi x15,x15,1780 # 80006934 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: 8f010113 addi x2,x2,-1808 # 80019dd0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 80019379 .word 0x80019379 + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: e1828293 addi x5,x5,-488 # 80038400 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: df828293 addi x5,x5,-520 # 80038400 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-rori-00.elf.objdump b/riscv-tests/rv64-Zbkb-rori-00.elf.objdump new file mode 100644 index 0000000..1c13f7a --- /dev/null +++ b/riscv-tests/rv64-Zbkb-rori-00.elf.objdump @@ -0,0 +1,8091 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rori-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-rori-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000029680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000004ec0 memsz 0x0000000000004ec0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000023680 memsz 0x0000000000023680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004e80 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00022830 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 000000008002a900 000000008002a900 00028900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002b000 000000008002b000 00029000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00029680 2**0 + CONTENTS, READONLY + 6 .debug_line 00000d6a 0000000000000000 0000000000000000 000296bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 0000000000000000 0000000000000000 0002a425 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0002a49f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002a4c2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0002a4e0 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 0000000000000000 0000000000000000 0002a520 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002a5a8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d 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0000000000000000 rvtest_sig_begin +0000000080008470 g .data 0000000000000000 rvtest_data_begin +0000000080008110 g .data 0000000000000000 Mtramptbl_sv +000000008000cd6d g .data 0000000000000000 rvtest_data_end +0000000080001ef0 g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002c000 g .text.rvmodel 0000000000000000 _end +000000008002aa00 g .tohost 0000000000000000 fromhost +000000008002a900 g .tohost 0000000000000000 tohost +00000000800021d0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080002280 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002b097 auipc x1,0x2b + 80000004: 0e008093 addi x1,x1,224 # 8002b0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x5c3eeb32aaa2a3b8 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zbkb_rori_cg_cp_rs1_b0: + rori x23, x0, 53 # perform operation + 80000048: 63505b93 rori x23,x0,0x35 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b0, Zbkb_rori_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01720c63 beq x4,x23,80000068 + 80000054: 26c032ef jal x5,800032c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800089f0 .word 0x800089f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xc849f4cd9405ebd4 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zbkb_rori_cg_cp_rs1_b1: + rori x28, x1, 34 # perform operation + 80000074: 6220de13 rori x28,x1,0x22 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkb_rori_cg_cp_rs1_b1, Zbkb_rori_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01c20c63 beq x4,x28,80000094 + 80000080: 240032ef jal x5,800032c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008a21 .word 0x80008a21 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x24, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010c13 addi x24,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x24b662429ea68f56 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zbkb_rori_cg_cp_rs1_b2: + rori x30, x2, 28 # perform operation + 800000a4: 61c15f13 rori x30,x2,0x1c + # Check if x30 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x30, Zbkb_rori_cg_cp_rs1_b2, Zbkb_rori_cg_cp_rs1_b2_str) + 800000a8: 000c3203 ld x4,0(x24) + 800000ac: 01e20c63 beq x4,x30,800000c4 + 800000b0: 210032ef jal x5,800032c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008a52 .word 0x80008a52 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008c0c13 addi x24,x24,8 + + mv x10, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x2e43a90d857bc42e + 800000cc: 00053183 ld x3,0(x10) + 800000d0: 00850513 addi x10,x10,8 + +00000000800000d4 : +Zbkb_rori_cg_cp_rs1_b3: + rori x7, x3, 34 # perform operation + 800000d4: 6221d393 rori x7,x3,0x22 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zbkb_rori_cg_cp_rs1_b3, Zbkb_rori_cg_cp_rs1_b3_str) + 800000d8: 000c3203 ld x4,0(x24) + 800000dc: 00720c63 beq x4,x7,800000f4 + 800000e0: 1e0032ef jal x5,800032c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008a83 .word 0x80008a83 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008c0c13 addi x24,x24,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x94aad0f2bdc3ffab + 80000100: 00053203 ld x4,0(x10) + 80000104: 00850513 addi x10,x10,8 + +0000000080000108 : +Zbkb_rori_cg_cp_rs1_b4: + rori x29, x4, 54 # perform operation + 80000108: 63625e93 rori x29,x4,0x36 + # Check if x29 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x29, Zbkb_rori_cg_cp_rs1_b4, Zbkb_rori_cg_cp_rs1_b4_str) + 8000010c: 000c3383 ld x7,0(x24) + 80000110: 01d38c63 beq x7,x29,80000128 + 80000114: 1c40346f jal x8,800032d8 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 80008ab4 .word 0x80008ab4 + 80000124: 00000000 .word 0x00000000 + 80000128: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xc9c40cc102b97d15 + 8000012c: 00053283 ld x5,0(x10) + 80000130: 00850513 addi x10,x10,8 + +0000000080000134 : +Zbkb_rori_cg_cp_rs1_b5: + rori x1, x5, 63 # perform operation + 80000134: 63f2d093 rori x1,x5,0x3f + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zbkb_rori_cg_cp_rs1_b5, Zbkb_rori_cg_cp_rs1_b5_str) + 80000138: 000c3383 ld x7,0(x24) + 8000013c: 00138c63 beq x7,x1,80000154 + 80000140: 1980346f jal x8,800032d8 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008ae5 .word 0x80008ae5 + 80000150: 00000000 .word 0x00000000 + 80000154: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xca9fd4394759be11 + 80000158: 00053303 ld x6,0(x10) + 8000015c: 00850513 addi x10,x10,8 + +0000000080000160 : +Zbkb_rori_cg_cp_rs1_b6: + rori x25, x6, 52 # perform operation + 80000160: 63435c93 rori x25,x6,0x34 + # Check if x25 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x25, Zbkb_rori_cg_cp_rs1_b6, Zbkb_rori_cg_cp_rs1_b6_str) + 80000164: 000c3383 ld x7,0(x24) + 80000168: 01938c63 beq x7,x25,80000180 + 8000016c: 16c0346f jal x8,800032d8 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 80008b16 .word 0x80008b16 + 8000017c: 00000000 .word 0x00000000 + 80000180: 008c0c13 addi x24,x24,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x20464510e8e4a81e + 8000018c: 00053383 ld x7,0(x10) + 80000190: 00850513 addi x10,x10,8 + +0000000080000194 : +Zbkb_rori_cg_cp_rs1_b7: + rori x29, x7, 4 # perform operation + 80000194: 6043de93 rori x29,x7,0x4 + # Check if x29 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x29, Zbkb_rori_cg_cp_rs1_b7, Zbkb_rori_cg_cp_rs1_b7_str) + 80000198: 000c3683 ld x13,0(x24) + 8000019c: 01d68c63 beq x13,x29,800001b4 + 800001a0: 1600376f jal x14,80003300 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 80008b47 .word 0x80008b47 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xcd0ca5d2a57a660c + 800001b8: 00053403 ld x8,0(x10) + 800001bc: 00850513 addi x10,x10,8 + +00000000800001c0 : +Zbkb_rori_cg_cp_rs1_b8: + rori x19, x8, 27 # perform operation + 800001c0: 61b45993 rori x19,x8,0x1b + # Check if x19 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x19, Zbkb_rori_cg_cp_rs1_b8, Zbkb_rori_cg_cp_rs1_b8_str) + 800001c4: 000c3683 ld x13,0(x24) + 800001c8: 01368c63 beq x13,x19,800001e0 + 800001cc: 1340376f jal x14,80003300 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 80008b78 .word 0x80008b78 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7e6ab9ca6de7ecdf + 800001e4: 00053483 ld x9,0(x10) + 800001e8: 00850513 addi x10,x10,8 + +00000000800001ec : +Zbkb_rori_cg_cp_rs1_b9: + rori x20, x9, 51 # perform operation + 800001ec: 6334da13 rori x20,x9,0x33 + # Check if x20 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x20, Zbkb_rori_cg_cp_rs1_b9, Zbkb_rori_cg_cp_rs1_b9_str) + 800001f0: 000c3683 ld x13,0(x24) + 800001f4: 01468c63 beq x13,x20,8000020c + 800001f8: 1080376f jal x14,80003300 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 80008ba9 .word 0x80008ba9 + 80000208: 00000000 .word 0x00000000 + 8000020c: 008c0c13 addi x24,x24,8 + + mv x27, x10 # switch data pointer register to avoid conflict with test + 80000210: 00050d93 addi x27,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0xaeeb3724288e599e + 80000214: 000db503 ld x10,0(x27) + 80000218: 008d8d93 addi x27,x27,8 + +000000008000021c : +Zbkb_rori_cg_cp_rs1_b10: + rori x3, x10, 23 # perform operation + 8000021c: 61755193 rori x3,x10,0x17 + # Check if x3 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x3, Zbkb_rori_cg_cp_rs1_b10, Zbkb_rori_cg_cp_rs1_b10_str) + 80000220: 000c3683 ld x13,0(x24) + 80000224: 00368c63 beq x13,x3,8000023c + 80000228: 0d80376f jal x14,80003300 + 8000022c: 8000021c .word 0x8000021c + 80000230: 00000000 .word 0x00000000 + 80000234: 80008bdb .word 0x80008bdb + 80000238: 00000000 .word 0x00000000 + 8000023c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xdba437a467693c93 + 80000240: 000db583 ld x11,0(x27) + 80000244: 008d8d93 addi x27,x27,8 + +0000000080000248 : +Zbkb_rori_cg_cp_rs1_b11: + rori x29, x11, 3 # perform operation + 80000248: 6035de93 rori x29,x11,0x3 + # Check if x29 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x29, Zbkb_rori_cg_cp_rs1_b11, Zbkb_rori_cg_cp_rs1_b11_str) + 8000024c: 000c3683 ld x13,0(x24) + 80000250: 01d68c63 beq x13,x29,80000268 + 80000254: 0ac0376f jal x14,80003300 + 80000258: 80000248 .word 0x80000248 + 8000025c: 00000000 .word 0x00000000 + 80000260: 80008c0e .word 0x80008c0e + 80000264: 00000000 .word 0x00000000 + 80000268: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xe5cc67c2f8682a97 + 8000026c: 000db603 ld x12,0(x27) + 80000270: 008d8d93 addi x27,x27,8 + +0000000080000274 : +Zbkb_rori_cg_cp_rs1_b12: + rori x22, x12, 16 # perform operation + 80000274: 61065b13 rori x22,x12,0x10 + # Check if x22 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x22, Zbkb_rori_cg_cp_rs1_b12, Zbkb_rori_cg_cp_rs1_b12_str) + 80000278: 000c3683 ld x13,0(x24) + 8000027c: 01668c63 beq x13,x22,80000294 + 80000280: 0800376f jal x14,80003300 + 80000284: 80000274 .word 0x80000274 + 80000288: 00000000 .word 0x00000000 + 8000028c: 80008c41 .word 0x80008c41 + 80000290: 00000000 .word 0x00000000 + 80000294: 008c0c13 addi x24,x24,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000298: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000029c: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x25ca6db15d463258 + 800002a0: 000db683 ld x13,0(x27) + 800002a4: 008d8d93 addi x27,x27,8 + +00000000800002a8 : +Zbkb_rori_cg_cp_rs1_b13: + rori x10, x13, 52 # perform operation + 800002a8: 6346d513 rori x10,x13,0x34 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zbkb_rori_cg_cp_rs1_b13, Zbkb_rori_cg_cp_rs1_b13_str) + 800002ac: 000c3203 ld x4,0(x24) + 800002b0: 00a20c63 beq x4,x10,800002c8 + 800002b4: 00c032ef jal x5,800032c0 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 80008c74 .word 0x80008c74 + 800002c4: 00000000 .word 0x00000000 + 800002c8: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x5ff379d250d930a1 + 800002cc: 000db703 ld x14,0(x27) + 800002d0: 008d8d93 addi x27,x27,8 + +00000000800002d4 : +Zbkb_rori_cg_cp_rs1_b14: + rori x15, x14, 59 # perform operation + 800002d4: 63b75793 rori x15,x14,0x3b + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zbkb_rori_cg_cp_rs1_b14, Zbkb_rori_cg_cp_rs1_b14_str) + 800002d8: 000c3203 ld x4,0(x24) + 800002dc: 00f20c63 beq x4,x15,800002f4 + 800002e0: 7e1022ef jal x5,800032c0 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 80008ca7 .word 0x80008ca7 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x2dd16c13f50e1f0e + 800002f8: 000db783 ld x15,0(x27) + 800002fc: 008d8d93 addi x27,x27,8 + +0000000080000300 : +Zbkb_rori_cg_cp_rs1_b15: + rori x19, x15, 35 # perform operation + 80000300: 6237d993 rori x19,x15,0x23 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zbkb_rori_cg_cp_rs1_b15, Zbkb_rori_cg_cp_rs1_b15_str) + 80000304: 000c3203 ld x4,0(x24) + 80000308: 01320c63 beq x4,x19,80000320 + 8000030c: 7b5022ef jal x5,800032c0 + 80000310: 80000300 .word 0x80000300 + 80000314: 00000000 .word 0x00000000 + 80000318: 80008cda .word 0x80008cda + 8000031c: 00000000 .word 0x00000000 + 80000320: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x9d787ab20818541f + 80000324: 000db803 ld x16,0(x27) + 80000328: 008d8d93 addi x27,x27,8 + +000000008000032c : +Zbkb_rori_cg_cp_rs1_b16: + rori x20, x16, 40 # perform operation + 8000032c: 62885a13 rori x20,x16,0x28 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zbkb_rori_cg_cp_rs1_b16, Zbkb_rori_cg_cp_rs1_b16_str) + 80000330: 000c3203 ld x4,0(x24) + 80000334: 01420c63 beq x4,x20,8000034c + 80000338: 789022ef jal x5,800032c0 + 8000033c: 8000032c .word 0x8000032c + 80000340: 00000000 .word 0x00000000 + 80000344: 80008d0d .word 0x80008d0d + 80000348: 00000000 .word 0x00000000 + 8000034c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x28f10089cdf27978 + 80000350: 000db883 ld x17,0(x27) + 80000354: 008d8d93 addi x27,x27,8 + +0000000080000358 : +Zbkb_rori_cg_cp_rs1_b17: + rori x12, x17, 60 # perform operation + 80000358: 63c8d613 rori x12,x17,0x3c + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zbkb_rori_cg_cp_rs1_b17, Zbkb_rori_cg_cp_rs1_b17_str) + 8000035c: 000c3203 ld x4,0(x24) + 80000360: 00c20c63 beq x4,x12,80000378 + 80000364: 75d022ef jal x5,800032c0 + 80000368: 80000358 .word 0x80000358 + 8000036c: 00000000 .word 0x00000000 + 80000370: 80008d40 .word 0x80008d40 + 80000374: 00000000 .word 0x00000000 + 80000378: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0xa0c64779f3d3c0a4 + 8000037c: 000db903 ld x18,0(x27) + 80000380: 008d8d93 addi x27,x27,8 + +0000000080000384 : +Zbkb_rori_cg_cp_rs1_b18: + rori x23, x18, 8 # perform operation + 80000384: 60895b93 rori x23,x18,0x8 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zbkb_rori_cg_cp_rs1_b18, Zbkb_rori_cg_cp_rs1_b18_str) + 80000388: 000c3203 ld x4,0(x24) + 8000038c: 01720c63 beq x4,x23,800003a4 + 80000390: 731022ef jal x5,800032c0 + 80000394: 80000384 .word 0x80000384 + 80000398: 00000000 .word 0x00000000 + 8000039c: 80008d73 .word 0x80008d73 + 800003a0: 00000000 .word 0x00000000 + 800003a4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x98e7ab46ca8a0cf1 + 800003a8: 000db983 ld x19,0(x27) + 800003ac: 008d8d93 addi x27,x27,8 + +00000000800003b0 : +Zbkb_rori_cg_cp_rs1_b19: + rori x22, x19, 56 # perform operation + 800003b0: 6389db13 rori x22,x19,0x38 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zbkb_rori_cg_cp_rs1_b19, Zbkb_rori_cg_cp_rs1_b19_str) + 800003b4: 000c3203 ld x4,0(x24) + 800003b8: 01620c63 beq x4,x22,800003d0 + 800003bc: 705022ef jal x5,800032c0 + 800003c0: 800003b0 .word 0x800003b0 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 80008da6 .word 0x80008da6 + 800003cc: 00000000 .word 0x00000000 + 800003d0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xb7ebbba8bd0281f3 + 800003d4: 000dba03 ld x20,0(x27) + 800003d8: 008d8d93 addi x27,x27,8 + +00000000800003dc : +Zbkb_rori_cg_cp_rs1_b20: + rori x22, x20, 12 # perform operation + 800003dc: 60ca5b13 rori x22,x20,0xc + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zbkb_rori_cg_cp_rs1_b20, Zbkb_rori_cg_cp_rs1_b20_str) + 800003e0: 000c3203 ld x4,0(x24) + 800003e4: 01620c63 beq x4,x22,800003fc + 800003e8: 6d9022ef jal x5,800032c0 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 80008dd9 .word 0x80008dd9 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x7fd56d3c12b83149 + 80000400: 000dba83 ld x21,0(x27) + 80000404: 008d8d93 addi x27,x27,8 + +0000000080000408 : +Zbkb_rori_cg_cp_rs1_b21: + rori x1, x21, 52 # perform operation + 80000408: 634ad093 rori x1,x21,0x34 + # Check if x1 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x1, Zbkb_rori_cg_cp_rs1_b21, Zbkb_rori_cg_cp_rs1_b21_str) + 8000040c: 000c3203 ld x4,0(x24) + 80000410: 00120c63 beq x4,x1,80000428 + 80000414: 6ad022ef jal x5,800032c0 + 80000418: 80000408 .word 0x80000408 + 8000041c: 00000000 .word 0x00000000 + 80000420: 80008e0c .word 0x80008e0c + 80000424: 00000000 .word 0x00000000 + 80000428: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x20dadc27034f5cc2 + 8000042c: 000dbb03 ld x22,0(x27) + 80000430: 008d8d93 addi x27,x27,8 + +0000000080000434 : +Zbkb_rori_cg_cp_rs1_b22: + rori x17, x22, 9 # perform operation + 80000434: 609b5893 rori x17,x22,0x9 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zbkb_rori_cg_cp_rs1_b22, Zbkb_rori_cg_cp_rs1_b22_str) + 80000438: 000c3203 ld x4,0(x24) + 8000043c: 01120c63 beq x4,x17,80000454 + 80000440: 681022ef jal x5,800032c0 + 80000444: 80000434 .word 0x80000434 + 80000448: 00000000 .word 0x00000000 + 8000044c: 80008e3f .word 0x80008e3f + 80000450: 00000000 .word 0x00000000 + 80000454: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xe9d28a625571727a + 80000458: 000dbb83 ld x23,0(x27) + 8000045c: 008d8d93 addi x27,x27,8 + +0000000080000460 : +Zbkb_rori_cg_cp_rs1_b23: + rori x19, x23, 22 # perform operation + 80000460: 616bd993 rori x19,x23,0x16 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zbkb_rori_cg_cp_rs1_b23, Zbkb_rori_cg_cp_rs1_b23_str) + 80000464: 000c3203 ld x4,0(x24) + 80000468: 01320c63 beq x4,x19,80000480 + 8000046c: 655022ef jal x5,800032c0 + 80000470: 80000460 .word 0x80000460 + 80000474: 00000000 .word 0x00000000 + 80000478: 80008e72 .word 0x80008e72 + 8000047c: 00000000 .word 0x00000000 + 80000480: 008c0c13 addi x24,x24,8 + + mv x26, x24 # switch signature pointer register to avoid conflict with test + 80000484: 000c0d13 addi x26,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x1dc150938e08a2e6 + 80000488: 000dbc03 ld x24,0(x27) + 8000048c: 008d8d93 addi x27,x27,8 + +0000000080000490 : +Zbkb_rori_cg_cp_rs1_b24: + rori x8, x24, 2 # perform operation + 80000490: 602c5413 rori x8,x24,0x2 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zbkb_rori_cg_cp_rs1_b24, Zbkb_rori_cg_cp_rs1_b24_str) + 80000494: 000d3203 ld x4,0(x26) + 80000498: 00820c63 beq x4,x8,800004b0 + 8000049c: 625022ef jal x5,800032c0 + 800004a0: 80000490 .word 0x80000490 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 80008ea5 .word 0x80008ea5 + 800004ac: 00000000 .word 0x00000000 + 800004b0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x1552f34fc4e76769 + 800004b4: 000dbc83 ld x25,0(x27) + 800004b8: 008d8d93 addi x27,x27,8 + +00000000800004bc : +Zbkb_rori_cg_cp_rs1_b25: + rori x21, x25, 30 # perform operation + 800004bc: 61ecda93 rori x21,x25,0x1e + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zbkb_rori_cg_cp_rs1_b25, Zbkb_rori_cg_cp_rs1_b25_str) + 800004c0: 000d3203 ld x4,0(x26) + 800004c4: 01520c63 beq x4,x21,800004dc + 800004c8: 5f9022ef jal x5,800032c0 + 800004cc: 800004bc .word 0x800004bc + 800004d0: 00000000 .word 0x00000000 + 800004d4: 80008ed8 .word 0x80008ed8 + 800004d8: 00000000 .word 0x00000000 + 800004dc: 008d0d13 addi x26,x26,8 + + mv x18, x26 # switch signature pointer register to avoid conflict with test + 800004e0: 000d0913 addi x18,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x776f736e11747dae + 800004e4: 000dbd03 ld x26,0(x27) + 800004e8: 008d8d93 addi x27,x27,8 + +00000000800004ec : +Zbkb_rori_cg_cp_rs1_b26: + rori x30, x26, 45 # perform operation + 800004ec: 62dd5f13 rori x30,x26,0x2d + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zbkb_rori_cg_cp_rs1_b26, Zbkb_rori_cg_cp_rs1_b26_str) + 800004f0: 00093203 ld x4,0(x18) + 800004f4: 01e20c63 beq x4,x30,8000050c + 800004f8: 5c9022ef jal x5,800032c0 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 80008f0b .word 0x80008f0b + 80000508: 00000000 .word 0x00000000 + 8000050c: 00890913 addi x18,x18,8 + + mv x24, x27 # switch data pointer register to avoid conflict with test + 80000510: 000d8c13 addi x24,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xbb935243815295a7 + 80000514: 000c3d83 ld x27,0(x24) + 80000518: 008c0c13 addi x24,x24,8 + +000000008000051c : +Zbkb_rori_cg_cp_rs1_b27: + rori x29, x27, 60 # perform operation + 8000051c: 63cdde93 rori x29,x27,0x3c + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zbkb_rori_cg_cp_rs1_b27, Zbkb_rori_cg_cp_rs1_b27_str) + 80000520: 00093203 ld x4,0(x18) + 80000524: 01d20c63 beq x4,x29,8000053c + 80000528: 599022ef jal x5,800032c0 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 80008f3e .word 0x80008f3e + 80000538: 00000000 .word 0x00000000 + 8000053c: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x681225c8548eaf6a + 80000540: 000c3e03 ld x28,0(x24) + 80000544: 008c0c13 addi x24,x24,8 + +0000000080000548 : +Zbkb_rori_cg_cp_rs1_b28: + rori x19, x28, 11 # perform operation + 80000548: 60be5993 rori x19,x28,0xb + # Check if x19 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x19, Zbkb_rori_cg_cp_rs1_b28, Zbkb_rori_cg_cp_rs1_b28_str) + 8000054c: 00093203 ld x4,0(x18) + 80000550: 01320c63 beq x4,x19,80000568 + 80000554: 56d022ef jal x5,800032c0 + 80000558: 80000548 .word 0x80000548 + 8000055c: 00000000 .word 0x00000000 + 80000560: 80008f71 .word 0x80008f71 + 80000564: 00000000 .word 0x00000000 + 80000568: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x40bf72dab59b7ad1 + 8000056c: 000c3e83 ld x29,0(x24) + 80000570: 008c0c13 addi x24,x24,8 + +0000000080000574 : +Zbkb_rori_cg_cp_rs1_b29: + rori x1, x29, 55 # perform operation + 80000574: 637ed093 rori x1,x29,0x37 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_rori_cg_cp_rs1_b29, Zbkb_rori_cg_cp_rs1_b29_str) + 80000578: 00093203 ld x4,0(x18) + 8000057c: 00120c63 beq x4,x1,80000594 + 80000580: 541022ef jal x5,800032c0 + 80000584: 80000574 .word 0x80000574 + 80000588: 00000000 .word 0x00000000 + 8000058c: 80008fa4 .word 0x80008fa4 + 80000590: 00000000 .word 0x00000000 + 80000594: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x1ea3db8a63bab655 + 80000598: 000c3f03 ld x30,0(x24) + 8000059c: 008c0c13 addi x24,x24,8 + +00000000800005a0 : +Zbkb_rori_cg_cp_rs1_b30: + rori x8, x30, 18 # perform operation + 800005a0: 612f5413 rori x8,x30,0x12 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkb_rori_cg_cp_rs1_b30, Zbkb_rori_cg_cp_rs1_b30_str) + 800005a4: 00093203 ld x4,0(x18) + 800005a8: 00820c63 beq x4,x8,800005c0 + 800005ac: 515022ef jal x5,800032c0 + 800005b0: 800005a0 .word 0x800005a0 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 80008fd7 .word 0x80008fd7 + 800005bc: 00000000 .word 0x00000000 + 800005c0: 00890913 addi x18,x18,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xb8b459a376a655d5 + 800005c4: 000c3f83 ld x31,0(x24) + 800005c8: 008c0c13 addi x24,x24,8 + +00000000800005cc : +Zbkb_rori_cg_cp_rs1_b31: + rori x1, x31, 53 # perform operation + 800005cc: 635fd093 rori x1,x31,0x35 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_rori_cg_cp_rs1_b31, Zbkb_rori_cg_cp_rs1_b31_str) + 800005d0: 00093203 ld x4,0(x18) + 800005d4: 00120c63 beq x4,x1,800005ec + 800005d8: 4e9022ef jal x5,800032c0 + 800005dc: 800005cc .word 0x800005cc + 800005e0: 00000000 .word 0x00000000 + 800005e4: 8000900a .word 0x8000900a + 800005e8: 00000000 .word 0x00000000 + 800005ec: 00890913 addi x18,x18,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x2d903935a0259479 + 800005f0: 000c3303 ld x6,0(x24) + 800005f4: 008c0c13 addi x24,x24,8 + +00000000800005f8 : +Zbkb_rori_cg_cp_rd_b0: + rori x0, x6, 21 # perform operation + 800005f8: 61535013 rori x0,x6,0x15 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkb_rori_cg_cp_rd_b0, Zbkb_rori_cg_cp_rd_b0_str) + 800005fc: 00093203 ld x4,0(x18) + 80000600: 00020c63 beq x4,x0,80000618 + 80000604: 4bd022ef jal x5,800032c0 + 80000608: 800005f8 .word 0x800005f8 + 8000060c: 00000000 .word 0x00000000 + 80000610: 8000903d .word 0x8000903d + 80000614: 00000000 .word 0x00000000 + 80000618: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x347104a6e8350c39 + 8000061c: 000c3003 ld x0,0(x24) + 80000620: 008c0c13 addi x24,x24,8 + +0000000080000624 : +Zbkb_rori_cg_cp_rd_b1: + rori x1, x0, 54 # perform operation + 80000624: 63605093 rori x1,x0,0x36 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_rori_cg_cp_rd_b1, Zbkb_rori_cg_cp_rd_b1_str) + 80000628: 00093203 ld x4,0(x18) + 8000062c: 00120c63 beq x4,x1,80000644 + 80000630: 491022ef jal x5,800032c0 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000906e .word 0x8000906e + 80000640: 00000000 .word 0x00000000 + 80000644: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x03d1c3e983330170 + 80000648: 000c3183 ld x3,0(x24) + 8000064c: 008c0c13 addi x24,x24,8 + +0000000080000650 : +Zbkb_rori_cg_cp_rd_b2: + rori x2, x3, 46 # perform operation + 80000650: 62e1d113 rori x2,x3,0x2e + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_rori_cg_cp_rd_b2, Zbkb_rori_cg_cp_rd_b2_str) + 80000654: 00093203 ld x4,0(x18) + 80000658: 00220c63 beq x4,x2,80000670 + 8000065c: 465022ef jal x5,800032c0 + 80000660: 80000650 .word 0x80000650 + 80000664: 00000000 .word 0x00000000 + 80000668: 8000909f .word 0x8000909f + 8000066c: 00000000 .word 0x00000000 + 80000670: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x62e17e15ec46cfe9 + 80000674: 000c3c83 ld x25,0(x24) + 80000678: 008c0c13 addi x24,x24,8 + +000000008000067c : +Zbkb_rori_cg_cp_rd_b3: + rori x3, x25, 29 # perform operation + 8000067c: 61dcd193 rori x3,x25,0x1d + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_rori_cg_cp_rd_b3, Zbkb_rori_cg_cp_rd_b3_str) + 80000680: 00093203 ld x4,0(x18) + 80000684: 00320c63 beq x4,x3,8000069c + 80000688: 439022ef jal x5,800032c0 + 8000068c: 8000067c .word 0x8000067c + 80000690: 00000000 .word 0x00000000 + 80000694: 800090d0 .word 0x800090d0 + 80000698: 00000000 .word 0x00000000 + 8000069c: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800006a0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800006a4: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x4dc25381009d1c4e + 800006a8: 000c3e83 ld x29,0(x24) + 800006ac: 008c0c13 addi x24,x24,8 + +00000000800006b0 : +Zbkb_rori_cg_cp_rd_b4: + rori x4, x29, 43 # perform operation + 800006b0: 62bed213 rori x4,x29,0x2b + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_rori_cg_cp_rd_b4, Zbkb_rori_cg_cp_rd_b4_str) + 800006b4: 00093683 ld x13,0(x18) + 800006b8: 00468c63 beq x13,x4,800006d0 + 800006bc: 4450276f jal x14,80003300 + 800006c0: 800006b0 .word 0x800006b0 + 800006c4: 00000000 .word 0x00000000 + 800006c8: 80009101 .word 0x80009101 + 800006cc: 00000000 .word 0x00000000 + 800006d0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x30953fc23f3f59d1 + 800006d4: 000c3583 ld x11,0(x24) + 800006d8: 008c0c13 addi x24,x24,8 + +00000000800006dc : +Zbkb_rori_cg_cp_rd_b5: + rori x5, x11, 13 # perform operation + 800006dc: 60d5d293 rori x5,x11,0xd + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_rori_cg_cp_rd_b5, Zbkb_rori_cg_cp_rd_b5_str) + 800006e0: 00093683 ld x13,0(x18) + 800006e4: 00568c63 beq x13,x5,800006fc + 800006e8: 4190276f jal x14,80003300 + 800006ec: 800006dc .word 0x800006dc + 800006f0: 00000000 .word 0x00000000 + 800006f4: 80009132 .word 0x80009132 + 800006f8: 00000000 .word 0x00000000 + 800006fc: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x8b6fe61b659a3724 + 80000700: 000c3283 ld x5,0(x24) + 80000704: 008c0c13 addi x24,x24,8 + +0000000080000708 : +Zbkb_rori_cg_cp_rd_b6: + rori x6, x5, 46 # perform operation + 80000708: 62e2d313 rori x6,x5,0x2e + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_rori_cg_cp_rd_b6, Zbkb_rori_cg_cp_rd_b6_str) + 8000070c: 00093683 ld x13,0(x18) + 80000710: 00668c63 beq x13,x6,80000728 + 80000714: 3ed0276f jal x14,80003300 + 80000718: 80000708 .word 0x80000708 + 8000071c: 00000000 .word 0x00000000 + 80000720: 80009163 .word 0x80009163 + 80000724: 00000000 .word 0x00000000 + 80000728: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x9fc09f94025b7fd0 + 8000072c: 000c3283 ld x5,0(x24) + 80000730: 008c0c13 addi x24,x24,8 + +0000000080000734 : +Zbkb_rori_cg_cp_rd_b7: + rori x7, x5, 26 # perform operation + 80000734: 61a2d393 rori x7,x5,0x1a + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_rori_cg_cp_rd_b7, Zbkb_rori_cg_cp_rd_b7_str) + 80000738: 00093683 ld x13,0(x18) + 8000073c: 00768c63 beq x13,x7,80000754 + 80000740: 3c10276f jal x14,80003300 + 80000744: 80000734 .word 0x80000734 + 80000748: 00000000 .word 0x00000000 + 8000074c: 80009194 .word 0x80009194 + 80000750: 00000000 .word 0x00000000 + 80000754: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0xb812d5e0d50397c6 + 80000758: 000c3e03 ld x28,0(x24) + 8000075c: 008c0c13 addi x24,x24,8 + +0000000080000760 : +Zbkb_rori_cg_cp_rd_b8: + rori x8, x28, 39 # perform operation + 80000760: 627e5413 rori x8,x28,0x27 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_rori_cg_cp_rd_b8, Zbkb_rori_cg_cp_rd_b8_str) + 80000764: 00093683 ld x13,0(x18) + 80000768: 00868c63 beq x13,x8,80000780 + 8000076c: 3950276f jal x14,80003300 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 800091c5 .word 0x800091c5 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xf36f8361d9163376 + 80000784: 000c3d83 ld x27,0(x24) + 80000788: 008c0c13 addi x24,x24,8 + +000000008000078c : +Zbkb_rori_cg_cp_rd_b9: + rori x9, x27, 52 # perform operation + 8000078c: 634dd493 rori x9,x27,0x34 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_rori_cg_cp_rd_b9, Zbkb_rori_cg_cp_rd_b9_str) + 80000790: 00093683 ld x13,0(x18) + 80000794: 00968c63 beq x13,x9,800007ac + 80000798: 3690276f jal x14,80003300 + 8000079c: 8000078c .word 0x8000078c + 800007a0: 00000000 .word 0x00000000 + 800007a4: 800091f6 .word 0x800091f6 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0xe3ec2b3a8476a0c7 + 800007b0: 000c3d03 ld x26,0(x24) + 800007b4: 008c0c13 addi x24,x24,8 + +00000000800007b8 : +Zbkb_rori_cg_cp_rd_b10: + rori x10, x26, 23 # perform operation + 800007b8: 617d5513 rori x10,x26,0x17 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_rori_cg_cp_rd_b10, Zbkb_rori_cg_cp_rd_b10_str) + 800007bc: 00093683 ld x13,0(x18) + 800007c0: 00a68c63 beq x13,x10,800007d8 + 800007c4: 33d0276f jal x14,80003300 + 800007c8: 800007b8 .word 0x800007b8 + 800007cc: 00000000 .word 0x00000000 + 800007d0: 80009227 .word 0x80009227 + 800007d4: 00000000 .word 0x00000000 + 800007d8: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xe5b91db46c4dc04a + 800007dc: 000c3103 ld x2,0(x24) + 800007e0: 008c0c13 addi x24,x24,8 + +00000000800007e4 : +Zbkb_rori_cg_cp_rd_b11: + rori x11, x2, 30 # perform operation + 800007e4: 61e15593 rori x11,x2,0x1e + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_rori_cg_cp_rd_b11, Zbkb_rori_cg_cp_rd_b11_str) + 800007e8: 00093683 ld x13,0(x18) + 800007ec: 00b68c63 beq x13,x11,80000804 + 800007f0: 3110276f jal x14,80003300 + 800007f4: 800007e4 .word 0x800007e4 + 800007f8: 00000000 .word 0x00000000 + 800007fc: 80009259 .word 0x80009259 + 80000800: 00000000 .word 0x00000000 + 80000804: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xd8a6a4241d95d60b + 80000808: 000c3483 ld x9,0(x24) + 8000080c: 008c0c13 addi x24,x24,8 + +0000000080000810 : +Zbkb_rori_cg_cp_rd_b12: + rori x12, x9, 50 # perform operation + 80000810: 6324d613 rori x12,x9,0x32 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_rori_cg_cp_rd_b12, Zbkb_rori_cg_cp_rd_b12_str) + 80000814: 00093683 ld x13,0(x18) + 80000818: 00c68c63 beq x13,x12,80000830 + 8000081c: 2e50276f jal x14,80003300 + 80000820: 80000810 .word 0x80000810 + 80000824: 00000000 .word 0x00000000 + 80000828: 8000928b .word 0x8000928b + 8000082c: 00000000 .word 0x00000000 + 80000830: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000834: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000838: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x1d34e1d11d78e240 + 8000083c: 000c3103 ld x2,0(x24) + 80000840: 008c0c13 addi x24,x24,8 + +0000000080000844 : +Zbkb_rori_cg_cp_rd_b13: + rori x13, x2, 56 # perform operation + 80000844: 63815693 rori x13,x2,0x38 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zbkb_rori_cg_cp_rd_b13, Zbkb_rori_cg_cp_rd_b13_str) + 80000848: 00093383 ld x7,0(x18) + 8000084c: 00d38c63 beq x7,x13,80000864 + 80000850: 2890246f jal x8,800032d8 + 80000854: 80000844 .word 0x80000844 + 80000858: 00000000 .word 0x00000000 + 8000085c: 800092bd .word 0x800092bd + 80000860: 00000000 .word 0x00000000 + 80000864: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x6a275ea194d699a9 + 80000868: 000c3683 ld x13,0(x24) + 8000086c: 008c0c13 addi x24,x24,8 + +0000000080000870 : +Zbkb_rori_cg_cp_rd_b14: + rori x14, x13, 27 # perform operation + 80000870: 61b6d713 rori x14,x13,0x1b + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zbkb_rori_cg_cp_rd_b14, Zbkb_rori_cg_cp_rd_b14_str) + 80000874: 00093383 ld x7,0(x18) + 80000878: 00e38c63 beq x7,x14,80000890 + 8000087c: 25d0246f jal x8,800032d8 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 800092ef .word 0x800092ef + 8000088c: 00000000 .word 0x00000000 + 80000890: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0xac4a2be1f36eb635 + 80000894: 000c3c83 ld x25,0(x24) + 80000898: 008c0c13 addi x24,x24,8 + +000000008000089c : +Zbkb_rori_cg_cp_rd_b15: + rori x15, x25, 59 # perform operation + 8000089c: 63bcd793 rori x15,x25,0x3b + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zbkb_rori_cg_cp_rd_b15, Zbkb_rori_cg_cp_rd_b15_str) + 800008a0: 00093383 ld x7,0(x18) + 800008a4: 00f38c63 beq x7,x15,800008bc + 800008a8: 2310246f jal x8,800032d8 + 800008ac: 8000089c .word 0x8000089c + 800008b0: 00000000 .word 0x00000000 + 800008b4: 80009321 .word 0x80009321 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x5e9689d48c5b7a6d + 800008c0: 000c3183 ld x3,0(x24) + 800008c4: 008c0c13 addi x24,x24,8 + +00000000800008c8 : +Zbkb_rori_cg_cp_rd_b16: + rori x16, x3, 37 # perform operation + 800008c8: 6251d813 rori x16,x3,0x25 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zbkb_rori_cg_cp_rd_b16, Zbkb_rori_cg_cp_rd_b16_str) + 800008cc: 00093383 ld x7,0(x18) + 800008d0: 01038c63 beq x7,x16,800008e8 + 800008d4: 2050246f jal x8,800032d8 + 800008d8: 800008c8 .word 0x800008c8 + 800008dc: 00000000 .word 0x00000000 + 800008e0: 80009353 .word 0x80009353 + 800008e4: 00000000 .word 0x00000000 + 800008e8: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x36a7981ff728c702 + 800008ec: 000c3a03 ld x20,0(x24) + 800008f0: 008c0c13 addi x24,x24,8 + +00000000800008f4 : +Zbkb_rori_cg_cp_rd_b17: + rori x17, x20, 21 # perform operation + 800008f4: 615a5893 rori x17,x20,0x15 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zbkb_rori_cg_cp_rd_b17, Zbkb_rori_cg_cp_rd_b17_str) + 800008f8: 00093383 ld x7,0(x18) + 800008fc: 01138c63 beq x7,x17,80000914 + 80000900: 1d90246f jal x8,800032d8 + 80000904: 800008f4 .word 0x800008f4 + 80000908: 00000000 .word 0x00000000 + 8000090c: 80009385 .word 0x80009385 + 80000910: 00000000 .word 0x00000000 + 80000914: 00890913 addi x18,x18,8 + + mv x27, x18 # switch signature pointer register to avoid conflict with test + 80000918: 00090d93 addi x27,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x37314d66121db5bc + 8000091c: 000c3603 ld x12,0(x24) + 80000920: 008c0c13 addi x24,x24,8 + +0000000080000924 : +Zbkb_rori_cg_cp_rd_b18: + rori x18, x12, 34 # perform operation + 80000924: 62265913 rori x18,x12,0x22 + # Check if x18 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x18, Zbkb_rori_cg_cp_rd_b18, Zbkb_rori_cg_cp_rd_b18_str) + 80000928: 000db383 ld x7,0(x27) + 8000092c: 01238c63 beq x7,x18,80000944 + 80000930: 1a90246f jal x8,800032d8 + 80000934: 80000924 .word 0x80000924 + 80000938: 00000000 .word 0x00000000 + 8000093c: 800093b7 .word 0x800093b7 + 80000940: 00000000 .word 0x00000000 + 80000944: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x13a020804050c242 + 80000948: 000c3a83 ld x21,0(x24) + 8000094c: 008c0c13 addi x24,x24,8 + +0000000080000950 : +Zbkb_rori_cg_cp_rd_b19: + rori x19, x21, 19 # perform operation + 80000950: 613ad993 rori x19,x21,0x13 + # Check if x19 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x19, Zbkb_rori_cg_cp_rd_b19, Zbkb_rori_cg_cp_rd_b19_str) + 80000954: 000db383 ld x7,0(x27) + 80000958: 01338c63 beq x7,x19,80000970 + 8000095c: 17d0246f jal x8,800032d8 + 80000960: 80000950 .word 0x80000950 + 80000964: 00000000 .word 0x00000000 + 80000968: 800093e9 .word 0x800093e9 + 8000096c: 00000000 .word 0x00000000 + 80000970: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xd473b6877a275fa9 + 80000974: 000c3103 ld x2,0(x24) + 80000978: 008c0c13 addi x24,x24,8 + +000000008000097c : +Zbkb_rori_cg_cp_rd_b20: + rori x20, x2, 17 # perform operation + 8000097c: 61115a13 rori x20,x2,0x11 + # Check if x20 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x20, Zbkb_rori_cg_cp_rd_b20, Zbkb_rori_cg_cp_rd_b20_str) + 80000980: 000db383 ld x7,0(x27) + 80000984: 01438c63 beq x7,x20,8000099c + 80000988: 1510246f jal x8,800032d8 + 8000098c: 8000097c .word 0x8000097c + 80000990: 00000000 .word 0x00000000 + 80000994: 8000941b .word 0x8000941b + 80000998: 00000000 .word 0x00000000 + 8000099c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x769a4f0fe552857b + 800009a0: 000c3903 ld x18,0(x24) + 800009a4: 008c0c13 addi x24,x24,8 + +00000000800009a8 : +Zbkb_rori_cg_cp_rd_b21: + rori x21, x18, 23 # perform operation + 800009a8: 61795a93 rori x21,x18,0x17 + # Check if x21 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x21, Zbkb_rori_cg_cp_rd_b21, Zbkb_rori_cg_cp_rd_b21_str) + 800009ac: 000db383 ld x7,0(x27) + 800009b0: 01538c63 beq x7,x21,800009c8 + 800009b4: 1250246f jal x8,800032d8 + 800009b8: 800009a8 .word 0x800009a8 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 8000944d .word 0x8000944d + 800009c4: 00000000 .word 0x00000000 + 800009c8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x9f49f6b2cb45b3c1 + 800009cc: 000c3483 ld x9,0(x24) + 800009d0: 008c0c13 addi x24,x24,8 + +00000000800009d4 : +Zbkb_rori_cg_cp_rd_b22: + rori x22, x9, 34 # perform operation + 800009d4: 6224db13 rori x22,x9,0x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x22, Zbkb_rori_cg_cp_rd_b22, Zbkb_rori_cg_cp_rd_b22_str) + 800009d8: 000db383 ld x7,0(x27) + 800009dc: 01638c63 beq x7,x22,800009f4 + 800009e0: 0f90246f jal x8,800032d8 + 800009e4: 800009d4 .word 0x800009d4 + 800009e8: 00000000 .word 0x00000000 + 800009ec: 8000947f .word 0x8000947f + 800009f0: 00000000 .word 0x00000000 + 800009f4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0xe689f8860bae8c4a + 800009f8: 000c3e03 ld x28,0(x24) + 800009fc: 008c0c13 addi x24,x24,8 + +0000000080000a00 : +Zbkb_rori_cg_cp_rd_b23: + rori x23, x28, 46 # perform operation + 80000a00: 62ee5b93 rori x23,x28,0x2e + # Check if x23 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x23, Zbkb_rori_cg_cp_rd_b23, Zbkb_rori_cg_cp_rd_b23_str) + 80000a04: 000db383 ld x7,0(x27) + 80000a08: 01738c63 beq x7,x23,80000a20 + 80000a0c: 0cd0246f jal x8,800032d8 + 80000a10: 80000a00 .word 0x80000a00 + 80000a14: 00000000 .word 0x00000000 + 80000a18: 800094b1 .word 0x800094b1 + 80000a1c: 00000000 .word 0x00000000 + 80000a20: 008d8d93 addi x27,x27,8 + + mv x17, x24 # switch data pointer register to avoid conflict with test + 80000a24: 000c0893 addi x17,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x009c82cf61eda625 + 80000a28: 0008b703 ld x14,0(x17) + 80000a2c: 00888893 addi x17,x17,8 + +0000000080000a30 : +Zbkb_rori_cg_cp_rd_b24: + rori x24, x14, 49 # perform operation + 80000a30: 63175c13 rori x24,x14,0x31 + # Check if x24 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x24, Zbkb_rori_cg_cp_rd_b24, Zbkb_rori_cg_cp_rd_b24_str) + 80000a34: 000db383 ld x7,0(x27) + 80000a38: 01838c63 beq x7,x24,80000a50 + 80000a3c: 09d0246f jal x8,800032d8 + 80000a40: 80000a30 .word 0x80000a30 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 800094e3 .word 0x800094e3 + 80000a4c: 00000000 .word 0x00000000 + 80000a50: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x192e9f60f1642744 + 80000a54: 0008be83 ld x29,0(x17) + 80000a58: 00888893 addi x17,x17,8 + +0000000080000a5c : +Zbkb_rori_cg_cp_rd_b25: + rori x25, x29, 4 # perform operation + 80000a5c: 604edc93 rori x25,x29,0x4 + # Check if x25 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x25, Zbkb_rori_cg_cp_rd_b25, Zbkb_rori_cg_cp_rd_b25_str) + 80000a60: 000db383 ld x7,0(x27) + 80000a64: 01938c63 beq x7,x25,80000a7c + 80000a68: 0710246f jal x8,800032d8 + 80000a6c: 80000a5c .word 0x80000a5c + 80000a70: 00000000 .word 0x00000000 + 80000a74: 80009515 .word 0x80009515 + 80000a78: 00000000 .word 0x00000000 + 80000a7c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x63d2c48c0366b128 + 80000a80: 0008b003 ld x0,0(x17) + 80000a84: 00888893 addi x17,x17,8 + +0000000080000a88 : +Zbkb_rori_cg_cp_rd_b26: + rori x26, x0, 43 # perform operation + 80000a88: 62b05d13 rori x26,x0,0x2b + # Check if x26 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x26, Zbkb_rori_cg_cp_rd_b26, Zbkb_rori_cg_cp_rd_b26_str) + 80000a8c: 000db383 ld x7,0(x27) + 80000a90: 01a38c63 beq x7,x26,80000aa8 + 80000a94: 0450246f jal x8,800032d8 + 80000a98: 80000a88 .word 0x80000a88 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 80009547 .word 0x80009547 + 80000aa4: 00000000 .word 0x00000000 + 80000aa8: 008d8d93 addi x27,x27,8 + + mv x20, x27 # switch signature pointer register to avoid conflict with test + 80000aac: 000d8a13 addi x20,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xd4b4e7a381403f89 + 80000ab0: 0008b003 ld x0,0(x17) + 80000ab4: 00888893 addi x17,x17,8 + +0000000080000ab8 : +Zbkb_rori_cg_cp_rd_b27: + rori x27, x0, 54 # perform operation + 80000ab8: 63605d93 rori x27,x0,0x36 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zbkb_rori_cg_cp_rd_b27, Zbkb_rori_cg_cp_rd_b27_str) + 80000abc: 000a3383 ld x7,0(x20) + 80000ac0: 01b38c63 beq x7,x27,80000ad8 + 80000ac4: 0150246f jal x8,800032d8 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 80009579 .word 0x80009579 + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x42c41658301c2abd + 80000adc: 0008b283 ld x5,0(x17) + 80000ae0: 00888893 addi x17,x17,8 + +0000000080000ae4 : +Zbkb_rori_cg_cp_rd_b28: + rori x28, x5, 18 # perform operation + 80000ae4: 6122de13 rori x28,x5,0x12 + # Check if x28 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x28, Zbkb_rori_cg_cp_rd_b28, Zbkb_rori_cg_cp_rd_b28_str) + 80000ae8: 000a3383 ld x7,0(x20) + 80000aec: 01c38c63 beq x7,x28,80000b04 + 80000af0: 7e80246f jal x8,800032d8 + 80000af4: 80000ae4 .word 0x80000ae4 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 800095ab .word 0x800095ab + 80000b00: 00000000 .word 0x00000000 + 80000b04: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x0b22913db689d84e + 80000b08: 0008b683 ld x13,0(x17) + 80000b0c: 00888893 addi x17,x17,8 + +0000000080000b10 : +Zbkb_rori_cg_cp_rd_b29: + rori x29, x13, 21 # perform operation + 80000b10: 6156de93 rori x29,x13,0x15 + # Check if x29 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x29, Zbkb_rori_cg_cp_rd_b29, Zbkb_rori_cg_cp_rd_b29_str) + 80000b14: 000a3383 ld x7,0(x20) + 80000b18: 01d38c63 beq x7,x29,80000b30 + 80000b1c: 7bc0246f jal x8,800032d8 + 80000b20: 80000b10 .word 0x80000b10 + 80000b24: 00000000 .word 0x00000000 + 80000b28: 800095dd .word 0x800095dd + 80000b2c: 00000000 .word 0x00000000 + 80000b30: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x9bd63ca1cd0c5497 + 80000b34: 0008b703 ld x14,0(x17) + 80000b38: 00888893 addi x17,x17,8 + +0000000080000b3c : +Zbkb_rori_cg_cp_rd_b30: + rori x30, x14, 16 # perform operation + 80000b3c: 61075f13 rori x30,x14,0x10 + # Check if x30 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x30, Zbkb_rori_cg_cp_rd_b30, Zbkb_rori_cg_cp_rd_b30_str) + 80000b40: 000a3383 ld x7,0(x20) + 80000b44: 01e38c63 beq x7,x30,80000b5c + 80000b48: 7900246f jal x8,800032d8 + 80000b4c: 80000b3c .word 0x80000b3c + 80000b50: 00000000 .word 0x00000000 + 80000b54: 8000960f .word 0x8000960f + 80000b58: 00000000 .word 0x00000000 + 80000b5c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x3a6aad60b70f37b8 + 80000b60: 0008b083 ld x1,0(x17) + 80000b64: 00888893 addi x17,x17,8 + +0000000080000b68 : +Zbkb_rori_cg_cp_rd_b31: + rori x31, x1, 47 # perform operation + 80000b68: 62f0df93 rori x31,x1,0x2f + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zbkb_rori_cg_cp_rd_b31, Zbkb_rori_cg_cp_rd_b31_str) + 80000b6c: 000a3383 ld x7,0(x20) + 80000b70: 01f38c63 beq x7,x31,80000b88 + 80000b74: 7640246f jal x8,800032d8 + 80000b78: 80000b68 .word 0x80000b68 + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 80009641 .word 0x80009641 + 80000b84: 00000000 .word 0x00000000 + 80000b88: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x0000000000000000 + 80000b8c: 0008b203 ld x4,0(x17) + 80000b90: 00888893 addi x17,x17,8 + +0000000080000b94 : +Zbkb_rori_cg_cp_rs1_edges_0x0: + rori x1, x4, 18 # perform operation + 80000b94: 61225093 rori x1,x4,0x12 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zbkb_rori_cg_cp_rs1_edges_0x0, Zbkb_rori_cg_cp_rs1_edges_0x0_str) + 80000b98: 000a3383 ld x7,0(x20) + 80000b9c: 00138c63 beq x7,x1,80000bb4 + 80000ba0: 7380246f jal x8,800032d8 + 80000ba4: 80000b94 .word 0x80000b94 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 80009673 .word 0x80009673 + 80000bb0: 00000000 .word 0x00000000 + 80000bb4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000001 + 80000bb8: 0008be03 ld x28,0(x17) + 80000bbc: 00888893 addi x17,x17,8 + +0000000080000bc0 : +Zbkb_rori_cg_cp_rs1_edges_0x1: + rori x19, x28, 60 # perform operation + 80000bc0: 63ce5993 rori x19,x28,0x3c + # Check if x19 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x19, Zbkb_rori_cg_cp_rs1_edges_0x1, Zbkb_rori_cg_cp_rs1_edges_0x1_str) + 80000bc4: 000a3383 ld x7,0(x20) + 80000bc8: 01338c63 beq x7,x19,80000be0 + 80000bcc: 70c0246f jal x8,800032d8 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 800096ac .word 0x800096ac + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000000000002 + 80000be4: 0008b183 ld x3,0(x17) + 80000be8: 00888893 addi x17,x17,8 + +0000000080000bec : +Zbkb_rori_cg_cp_rs1_edges_0x2: + rori x11, x3, 22 # perform operation + 80000bec: 6161d593 rori x11,x3,0x16 + # Check if x11 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x11, Zbkb_rori_cg_cp_rs1_edges_0x2, Zbkb_rori_cg_cp_rs1_edges_0x2_str) + 80000bf0: 000a3383 ld x7,0(x20) + 80000bf4: 00b38c63 beq x7,x11,80000c0c + 80000bf8: 6e00246f jal x8,800032d8 + 80000bfc: 80000bec .word 0x80000bec + 80000c00: 00000000 .word 0x00000000 + 80000c04: 800096e5 .word 0x800096e5 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x8000000000000000 + 80000c10: 0008bd83 ld x27,0(x17) + 80000c14: 00888893 addi x17,x17,8 + +0000000080000c18 : +Zbkb_rori_cg_cp_rs1_edges_0x8000000000000000: + rori x9, x27, 49 # perform operation + 80000c18: 631dd493 rori x9,x27,0x31 + # Check if x9 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x9, Zbkb_rori_cg_cp_rs1_edges_0x8000000000000000, Zbkb_rori_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c1c: 000a3383 ld x7,0(x20) + 80000c20: 00938c63 beq x7,x9,80000c38 + 80000c24: 6b40246f jal x8,800032d8 + 80000c28: 80000c18 .word 0x80000c18 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 8000971e .word 0x8000971e + 80000c34: 00000000 .word 0x00000000 + 80000c38: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x8000000000000001 + 80000c3c: 0008b303 ld x6,0(x17) + 80000c40: 00888893 addi x17,x17,8 + +0000000080000c44 : +Zbkb_rori_cg_cp_rs1_edges_0x8000000000000001: + rori x13, x6, 54 # perform operation + 80000c44: 63635693 rori x13,x6,0x36 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zbkb_rori_cg_cp_rs1_edges_0x8000000000000001, Zbkb_rori_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c48: 000a3383 ld x7,0(x20) + 80000c4c: 00d38c63 beq x7,x13,80000c64 + 80000c50: 6880246f jal x8,800032d8 + 80000c54: 80000c44 .word 0x80000c44 + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 80009766 .word 0x80009766 + 80000c60: 00000000 .word 0x00000000 + 80000c64: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x7fffffffffffffff + 80000c68: 0008b203 ld x4,0(x17) + 80000c6c: 00888893 addi x17,x17,8 + +0000000080000c70 : +Zbkb_rori_cg_cp_rs1_edges_0x7fffffffffffffff: + rori x13, x4, 38 # perform operation + 80000c70: 62625693 rori x13,x4,0x26 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zbkb_rori_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_rori_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c74: 000a3383 ld x7,0(x20) + 80000c78: 00d38c63 beq x7,x13,80000c90 + 80000c7c: 65c0246f jal x8,800032d8 + 80000c80: 80000c70 .word 0x80000c70 + 80000c84: 00000000 .word 0x00000000 + 80000c88: 800097ae .word 0x800097ae + 80000c8c: 00000000 .word 0x00000000 + 80000c90: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x7ffffffffffffffe + 80000c94: 0008b803 ld x16,0(x17) + 80000c98: 00888893 addi x17,x17,8 + +0000000080000c9c : +Zbkb_rori_cg_cp_rs1_edges_0x7ffffffffffffffe: + rori x10, x16, 51 # perform operation + 80000c9c: 63385513 rori x10,x16,0x33 + # Check if x10 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x10, Zbkb_rori_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_rori_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000ca0: 000a3383 ld x7,0(x20) + 80000ca4: 00a38c63 beq x7,x10,80000cbc + 80000ca8: 6300246f jal x8,800032d8 + 80000cac: 80000c9c .word 0x80000c9c + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 800097f6 .word 0x800097f6 + 80000cb8: 00000000 .word 0x00000000 + 80000cbc: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0xffffffffffffffff + 80000cc0: 0008b903 ld x18,0(x17) + 80000cc4: 00888893 addi x17,x17,8 + +0000000080000cc8 : +Zbkb_rori_cg_cp_rs1_edges_0xffffffffffffffff: + rori x22, x18, 46 # perform operation + 80000cc8: 62e95b13 rori x22,x18,0x2e + # Check if x22 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x22, Zbkb_rori_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_rori_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000ccc: 000a3383 ld x7,0(x20) + 80000cd0: 01638c63 beq x7,x22,80000ce8 + 80000cd4: 6040246f jal x8,800032d8 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 8000983e .word 0x8000983e + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xfffffffffffffffe + 80000cec: 0008bc83 ld x25,0(x17) + 80000cf0: 00888893 addi x17,x17,8 + +0000000080000cf4 : +Zbkb_rori_cg_cp_rs1_edges_0xfffffffffffffffe: + rori x2, x25, 53 # perform operation + 80000cf4: 635cd113 rori x2,x25,0x35 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_rori_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_rori_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf8: 000a3383 ld x7,0(x20) + 80000cfc: 00238c63 beq x7,x2,80000d14 + 80000d00: 5d80246f jal x8,800032d8 + 80000d04: 80000cf4 .word 0x80000cf4 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 80009886 .word 0x80009886 + 80000d10: 00000000 .word 0x00000000 + 80000d14: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80000d18: 0008b583 ld x11,0(x17) + 80000d1c: 00888893 addi x17,x17,8 + +0000000080000d20 : +Zbkb_rori_cg_cp_rs1_edges_0x5bbc887763ae86f2: + rori x12, x11, 10 # perform operation + 80000d20: 60a5d613 rori x12,x11,0xa + # Check if x12 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x12, Zbkb_rori_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_rori_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d24: 000a3383 ld x7,0(x20) + 80000d28: 00c38c63 beq x7,x12,80000d40 + 80000d2c: 5ac0246f jal x8,800032d8 + 80000d30: 80000d20 .word 0x80000d20 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 800098ce .word 0x800098ce + 80000d3c: 00000000 .word 0x00000000 + 80000d40: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80000d44: 0008be83 ld x29,0(x17) + 80000d48: 00888893 addi x17,x17,8 + +0000000080000d4c : +Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + rori x1, x29, 23 # perform operation + 80000d4c: 617ed093 rori x1,x29,0x17 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_rori_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d50: 000a3383 ld x7,0(x20) + 80000d54: 00138c63 beq x7,x1,80000d6c + 80000d58: 5800246f jal x8,800032d8 + 80000d5c: 80000d4c .word 0x80000d4c + 80000d60: 00000000 .word 0x00000000 + 80000d64: 80009916 .word 0x80009916 + 80000d68: 00000000 .word 0x00000000 + 80000d6c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x5555555555555555 + 80000d70: 0008b483 ld x9,0(x17) + 80000d74: 00888893 addi x17,x17,8 + +0000000080000d78 : +Zbkb_rori_cg_cp_rs1_edges_0x5555555555555555: + rori x29, x9, 2 # perform operation + 80000d78: 6024de93 rori x29,x9,0x2 + # Check if x29 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x29, Zbkb_rori_cg_cp_rs1_edges_0x5555555555555555, Zbkb_rori_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d7c: 000a3383 ld x7,0(x20) + 80000d80: 01d38c63 beq x7,x29,80000d98 + 80000d84: 5540246f jal x8,800032d8 + 80000d88: 80000d78 .word 0x80000d78 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 8000995e .word 0x8000995e + 80000d94: 00000000 .word 0x00000000 + 80000d98: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x00000000ffffffff + 80000d9c: 0008b803 ld x16,0(x17) + 80000da0: 00888893 addi x17,x17,8 + +0000000080000da4 : +Zbkb_rori_cg_cp_rs1_edges_0xffffffff: + rori x9, x16, 13 # perform operation + 80000da4: 60d85493 rori x9,x16,0xd + # Check if x9 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x9, Zbkb_rori_cg_cp_rs1_edges_0xffffffff, Zbkb_rori_cg_cp_rs1_edges_0xffffffff_str) + 80000da8: 000a3383 ld x7,0(x20) + 80000dac: 00938c63 beq x7,x9,80000dc4 + 80000db0: 5280246f jal x8,800032d8 + 80000db4: 80000da4 .word 0x80000da4 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 800099a6 .word 0x800099a6 + 80000dc0: 00000000 .word 0x00000000 + 80000dc4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x00000000fffffffe + 80000dc8: 0008b583 ld x11,0(x17) + 80000dcc: 00888893 addi x17,x17,8 + +0000000080000dd0 : +Zbkb_rori_cg_cp_rs1_edges_0xfffffffe: + rori x24, x11, 11 # perform operation + 80000dd0: 60b5dc13 rori x24,x11,0xb + # Check if x24 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x24, Zbkb_rori_cg_cp_rs1_edges_0xfffffffe, Zbkb_rori_cg_cp_rs1_edges_0xfffffffe_str) + 80000dd4: 000a3383 ld x7,0(x20) + 80000dd8: 01838c63 beq x7,x24,80000df0 + 80000ddc: 4fc0246f jal x8,800032d8 + 80000de0: 80000dd0 .word 0x80000dd0 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 800099e6 .word 0x800099e6 + 80000dec: 00000000 .word 0x00000000 + 80000df0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000100000000 + 80000df4: 0008b803 ld x16,0(x17) + 80000df8: 00888893 addi x17,x17,8 + +0000000080000dfc : +Zbkb_rori_cg_cp_rs1_edges_0x100000000: + rori x6, x16, 62 # perform operation + 80000dfc: 63e85313 rori x6,x16,0x3e + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkb_rori_cg_cp_rs1_edges_0x100000000, Zbkb_rori_cg_cp_rs1_edges_0x100000000_str) + 80000e00: 000a3383 ld x7,0(x20) + 80000e04: 00638c63 beq x7,x6,80000e1c + 80000e08: 4d00246f jal x8,800032d8 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 80009a26 .word 0x80009a26 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000100000001 + 80000e20: 0008bd83 ld x27,0(x17) + 80000e24: 00888893 addi x17,x17,8 + +0000000080000e28 : +Zbkb_rori_cg_cp_rs1_edges_0x100000001: + rori x9, x27, 10 # perform operation + 80000e28: 60add493 rori x9,x27,0xa + # Check if x9 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x9, Zbkb_rori_cg_cp_rs1_edges_0x100000001, Zbkb_rori_cg_cp_rs1_edges_0x100000001_str) + 80000e2c: 000a3383 ld x7,0(x20) + 80000e30: 00938c63 beq x7,x9,80000e48 + 80000e34: 4a40246f jal x8,800032d8 + 80000e38: 80000e28 .word 0x80000e28 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 80009a67 .word 0x80009a67 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x5b4ec1077ca597ce + 80000e4c: 0008b003 ld x0,0(x17) + 80000e50: 00888893 addi x17,x17,8 + +0000000080000e54 : +Zbkb_rori_cg_cmp_rd_rs1_b0: + rori x0, x0, 24 # perform operation + 80000e54: 61805013 rori x0,x0,0x18 + # Check if x0 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x0, Zbkb_rori_cg_cmp_rd_rs1_b0, Zbkb_rori_cg_cmp_rd_rs1_b0_str) + 80000e58: 000a3383 ld x7,0(x20) + 80000e5c: 00038c63 beq x7,x0,80000e74 + 80000e60: 4780246f jal x8,800032d8 + 80000e64: 80000e54 .word 0x80000e54 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 80009aa8 .word 0x80009aa8 + 80000e70: 00000000 .word 0x00000000 + 80000e74: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x586880a418282756 + 80000e78: 0008b083 ld x1,0(x17) + 80000e7c: 00888893 addi x17,x17,8 + +0000000080000e80 : +Zbkb_rori_cg_cmp_rd_rs1_b1: + rori x1, x1, 16 # perform operation + 80000e80: 6100d093 rori x1,x1,0x10 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zbkb_rori_cg_cmp_rd_rs1_b1, Zbkb_rori_cg_cmp_rd_rs1_b1_str) + 80000e84: 000a3383 ld x7,0(x20) + 80000e88: 00138c63 beq x7,x1,80000ea0 + 80000e8c: 44c0246f jal x8,800032d8 + 80000e90: 80000e80 .word 0x80000e80 + 80000e94: 00000000 .word 0x00000000 + 80000e98: 80009ade .word 0x80009ade + 80000e9c: 00000000 .word 0x00000000 + 80000ea0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xa360971f584671f3 + 80000ea4: 0008b103 ld x2,0(x17) + 80000ea8: 00888893 addi x17,x17,8 + +0000000080000eac : +Zbkb_rori_cg_cmp_rd_rs1_b2: + rori x2, x2, 21 # perform operation + 80000eac: 61515113 rori x2,x2,0x15 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zbkb_rori_cg_cmp_rd_rs1_b2, Zbkb_rori_cg_cmp_rd_rs1_b2_str) + 80000eb0: 000a3383 ld x7,0(x20) + 80000eb4: 00238c63 beq x7,x2,80000ecc + 80000eb8: 4200246f jal x8,800032d8 + 80000ebc: 80000eac .word 0x80000eac + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 80009b14 .word 0x80009b14 + 80000ec8: 00000000 .word 0x00000000 + 80000ecc: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x469f6b250424b4cd + 80000ed0: 0008b183 ld x3,0(x17) + 80000ed4: 00888893 addi x17,x17,8 + +0000000080000ed8 : +Zbkb_rori_cg_cmp_rd_rs1_b3: + rori x3, x3, 47 # perform operation + 80000ed8: 62f1d193 rori x3,x3,0x2f + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zbkb_rori_cg_cmp_rd_rs1_b3, Zbkb_rori_cg_cmp_rd_rs1_b3_str) + 80000edc: 000a3383 ld x7,0(x20) + 80000ee0: 00338c63 beq x7,x3,80000ef8 + 80000ee4: 3f40246f jal x8,800032d8 + 80000ee8: 80000ed8 .word 0x80000ed8 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 80009b4a .word 0x80009b4a + 80000ef4: 00000000 .word 0x00000000 + 80000ef8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x1d0e65fd0997285c + 80000efc: 0008b203 ld x4,0(x17) + 80000f00: 00888893 addi x17,x17,8 + +0000000080000f04 : +Zbkb_rori_cg_cmp_rd_rs1_b4: + rori x4, x4, 37 # perform operation + 80000f04: 62525213 rori x4,x4,0x25 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zbkb_rori_cg_cmp_rd_rs1_b4, Zbkb_rori_cg_cmp_rd_rs1_b4_str) + 80000f08: 000a3383 ld x7,0(x20) + 80000f0c: 00438c63 beq x7,x4,80000f24 + 80000f10: 3c80246f jal x8,800032d8 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 80009b80 .word 0x80009b80 + 80000f20: 00000000 .word 0x00000000 + 80000f24: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x6a6bd4ea04499fa6 + 80000f28: 0008b283 ld x5,0(x17) + 80000f2c: 00888893 addi x17,x17,8 + +0000000080000f30 : +Zbkb_rori_cg_cmp_rd_rs1_b5: + rori x5, x5, 15 # perform operation + 80000f30: 60f2d293 rori x5,x5,0xf + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zbkb_rori_cg_cmp_rd_rs1_b5, Zbkb_rori_cg_cmp_rd_rs1_b5_str) + 80000f34: 000a3383 ld x7,0(x20) + 80000f38: 00538c63 beq x7,x5,80000f50 + 80000f3c: 39c0246f jal x8,800032d8 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009bb6 .word 0x80009bb6 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x6f8421a39790eaeb + 80000f54: 0008b303 ld x6,0(x17) + 80000f58: 00888893 addi x17,x17,8 + +0000000080000f5c : +Zbkb_rori_cg_cmp_rd_rs1_b6: + rori x6, x6, 15 # perform operation + 80000f5c: 60f35313 rori x6,x6,0xf + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkb_rori_cg_cmp_rd_rs1_b6, Zbkb_rori_cg_cmp_rd_rs1_b6_str) + 80000f60: 000a3383 ld x7,0(x20) + 80000f64: 00638c63 beq x7,x6,80000f7c + 80000f68: 3700246f jal x8,800032d8 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bec .word 0x80009bec + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 008a0a13 addi x20,x20,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000f80: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000f84: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xd36c498944b4bf71 + 80000f88: 0008b383 ld x7,0(x17) + 80000f8c: 00888893 addi x17,x17,8 + +0000000080000f90 : +Zbkb_rori_cg_cmp_rd_rs1_b7: + rori x7, x7, 17 # perform operation + 80000f90: 6113d393 rori x7,x7,0x11 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zbkb_rori_cg_cmp_rd_rs1_b7, Zbkb_rori_cg_cmp_rd_rs1_b7_str) + 80000f94: 000a3683 ld x13,0(x20) + 80000f98: 00768c63 beq x13,x7,80000fb0 + 80000f9c: 3640276f jal x14,80003300 + 80000fa0: 80000f90 .word 0x80000f90 + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 80009c22 .word 0x80009c22 + 80000fac: 00000000 .word 0x00000000 + 80000fb0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xe481a9b81a1e043e + 80000fb4: 0008b403 ld x8,0(x17) + 80000fb8: 00888893 addi x17,x17,8 + +0000000080000fbc : +Zbkb_rori_cg_cmp_rd_rs1_b8: + rori x8, x8, 59 # perform operation + 80000fbc: 63b45413 rori x8,x8,0x3b + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zbkb_rori_cg_cmp_rd_rs1_b8, Zbkb_rori_cg_cmp_rd_rs1_b8_str) + 80000fc0: 000a3683 ld x13,0(x20) + 80000fc4: 00868c63 beq x13,x8,80000fdc + 80000fc8: 3380276f jal x14,80003300 + 80000fcc: 80000fbc .word 0x80000fbc + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 80009c58 .word 0x80009c58 + 80000fd8: 00000000 .word 0x00000000 + 80000fdc: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x9c36462b20d065f0 + 80000fe0: 0008b483 ld x9,0(x17) + 80000fe4: 00888893 addi x17,x17,8 + +0000000080000fe8 : +Zbkb_rori_cg_cmp_rd_rs1_b9: + rori x9, x9, 60 # perform operation + 80000fe8: 63c4d493 rori x9,x9,0x3c + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zbkb_rori_cg_cmp_rd_rs1_b9, Zbkb_rori_cg_cmp_rd_rs1_b9_str) + 80000fec: 000a3683 ld x13,0(x20) + 80000ff0: 00968c63 beq x13,x9,80001008 + 80000ff4: 30c0276f jal x14,80003300 + 80000ff8: 80000fe8 .word 0x80000fe8 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 80009c8e .word 0x80009c8e + 80001004: 00000000 .word 0x00000000 + 80001008: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x06a26104df32416a + 8000100c: 0008b503 ld x10,0(x17) + 80001010: 00888893 addi x17,x17,8 + +0000000080001014 : +Zbkb_rori_cg_cmp_rd_rs1_b10: + rori x10, x10, 25 # perform operation + 80001014: 61955513 rori x10,x10,0x19 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zbkb_rori_cg_cmp_rd_rs1_b10, Zbkb_rori_cg_cmp_rd_rs1_b10_str) + 80001018: 000a3683 ld x13,0(x20) + 8000101c: 00a68c63 beq x13,x10,80001034 + 80001020: 2e00276f jal x14,80003300 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80009cc4 .word 0x80009cc4 + 80001030: 00000000 .word 0x00000000 + 80001034: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x27beb37f5a141fd8 + 80001038: 0008b583 ld x11,0(x17) + 8000103c: 00888893 addi x17,x17,8 + +0000000080001040 : +Zbkb_rori_cg_cmp_rd_rs1_b11: + rori x11, x11, 36 # perform operation + 80001040: 6245d593 rori x11,x11,0x24 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zbkb_rori_cg_cmp_rd_rs1_b11, Zbkb_rori_cg_cmp_rd_rs1_b11_str) + 80001044: 000a3683 ld x13,0(x20) + 80001048: 00b68c63 beq x13,x11,80001060 + 8000104c: 2b40276f jal x14,80003300 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009cfb .word 0x80009cfb + 8000105c: 00000000 .word 0x00000000 + 80001060: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xe8d28f39897b001b + 80001064: 0008b603 ld x12,0(x17) + 80001068: 00888893 addi x17,x17,8 + +000000008000106c : +Zbkb_rori_cg_cmp_rd_rs1_b12: + rori x12, x12, 57 # perform operation + 8000106c: 63965613 rori x12,x12,0x39 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zbkb_rori_cg_cmp_rd_rs1_b12, Zbkb_rori_cg_cmp_rd_rs1_b12_str) + 80001070: 000a3683 ld x13,0(x20) + 80001074: 00c68c63 beq x13,x12,8000108c + 80001078: 2880276f jal x14,80003300 + 8000107c: 8000106c .word 0x8000106c + 80001080: 00000000 .word 0x00000000 + 80001084: 80009d32 .word 0x80009d32 + 80001088: 00000000 .word 0x00000000 + 8000108c: 008a0a13 addi x20,x20,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001090: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001094: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x28388a52fb85e7e8 + 80001098: 0008b683 ld x13,0(x17) + 8000109c: 00888893 addi x17,x17,8 + +00000000800010a0 : +Zbkb_rori_cg_cmp_rd_rs1_b13: + rori x13, x13, 55 # perform operation + 800010a0: 6376d693 rori x13,x13,0x37 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkb_rori_cg_cmp_rd_rs1_b13, Zbkb_rori_cg_cmp_rd_rs1_b13_str) + 800010a4: 000a3203 ld x4,0(x20) + 800010a8: 00d20c63 beq x4,x13,800010c0 + 800010ac: 214022ef jal x5,800032c0 + 800010b0: 800010a0 .word 0x800010a0 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 80009d69 .word 0x80009d69 + 800010bc: 00000000 .word 0x00000000 + 800010c0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x83fcdeebcb092867 + 800010c4: 0008b703 ld x14,0(x17) + 800010c8: 00888893 addi x17,x17,8 + +00000000800010cc : +Zbkb_rori_cg_cmp_rd_rs1_b14: + rori x14, x14, 8 # perform operation + 800010cc: 60875713 rori x14,x14,0x8 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkb_rori_cg_cmp_rd_rs1_b14, Zbkb_rori_cg_cmp_rd_rs1_b14_str) + 800010d0: 000a3203 ld x4,0(x20) + 800010d4: 00e20c63 beq x4,x14,800010ec + 800010d8: 1e8022ef jal x5,800032c0 + 800010dc: 800010cc .word 0x800010cc + 800010e0: 00000000 .word 0x00000000 + 800010e4: 80009da0 .word 0x80009da0 + 800010e8: 00000000 .word 0x00000000 + 800010ec: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xbf935f88e0f2f81d + 800010f0: 0008b783 ld x15,0(x17) + 800010f4: 00888893 addi x17,x17,8 + +00000000800010f8 : +Zbkb_rori_cg_cmp_rd_rs1_b15: + rori x15, x15, 24 # perform operation + 800010f8: 6187d793 rori x15,x15,0x18 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkb_rori_cg_cmp_rd_rs1_b15, Zbkb_rori_cg_cmp_rd_rs1_b15_str) + 800010fc: 000a3203 ld x4,0(x20) + 80001100: 00f20c63 beq x4,x15,80001118 + 80001104: 1bc022ef jal x5,800032c0 + 80001108: 800010f8 .word 0x800010f8 + 8000110c: 00000000 .word 0x00000000 + 80001110: 80009dd7 .word 0x80009dd7 + 80001114: 00000000 .word 0x00000000 + 80001118: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x8b8db5e4d9b49a80 + 8000111c: 0008b803 ld x16,0(x17) + 80001120: 00888893 addi x17,x17,8 + +0000000080001124 : +Zbkb_rori_cg_cmp_rd_rs1_b16: + rori x16, x16, 36 # perform operation + 80001124: 62485813 rori x16,x16,0x24 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zbkb_rori_cg_cmp_rd_rs1_b16, Zbkb_rori_cg_cmp_rd_rs1_b16_str) + 80001128: 000a3203 ld x4,0(x20) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 190022ef jal x5,800032c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009e0e .word 0x80009e0e + 80001140: 00000000 .word 0x00000000 + 80001144: 008a0a13 addi x20,x20,8 + + mv x21, x17 # switch data pointer register to avoid conflict with test + 80001148: 00088a93 addi x21,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xb2093718f65f9a03 + 8000114c: 000ab883 ld x17,0(x21) + 80001150: 008a8a93 addi x21,x21,8 + +0000000080001154 : +Zbkb_rori_cg_cmp_rd_rs1_b17: + rori x17, x17, 45 # perform operation + 80001154: 62d8d893 rori x17,x17,0x2d + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zbkb_rori_cg_cmp_rd_rs1_b17, Zbkb_rori_cg_cmp_rd_rs1_b17_str) + 80001158: 000a3203 ld x4,0(x20) + 8000115c: 01120c63 beq x4,x17,80001174 + 80001160: 160022ef jal x5,800032c0 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 80009e45 .word 0x80009e45 + 80001170: 00000000 .word 0x00000000 + 80001174: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x47cf39e56d06a0c8 + 80001178: 000ab903 ld x18,0(x21) + 8000117c: 008a8a93 addi x21,x21,8 + +0000000080001180 : +Zbkb_rori_cg_cmp_rd_rs1_b18: + rori x18, x18, 21 # perform operation + 80001180: 61595913 rori x18,x18,0x15 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkb_rori_cg_cmp_rd_rs1_b18, Zbkb_rori_cg_cmp_rd_rs1_b18_str) + 80001184: 000a3203 ld x4,0(x20) + 80001188: 01220c63 beq x4,x18,800011a0 + 8000118c: 134022ef jal x5,800032c0 + 80001190: 80001180 .word 0x80001180 + 80001194: 00000000 .word 0x00000000 + 80001198: 80009e7c .word 0x80009e7c + 8000119c: 00000000 .word 0x00000000 + 800011a0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x579f0d50ebd2e428 + 800011a4: 000ab983 ld x19,0(x21) + 800011a8: 008a8a93 addi x21,x21,8 + +00000000800011ac : +Zbkb_rori_cg_cmp_rd_rs1_b19: + rori x19, x19, 25 # perform operation + 800011ac: 6199d993 rori x19,x19,0x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zbkb_rori_cg_cmp_rd_rs1_b19, Zbkb_rori_cg_cmp_rd_rs1_b19_str) + 800011b0: 000a3203 ld x4,0(x20) + 800011b4: 01320c63 beq x4,x19,800011cc + 800011b8: 108022ef jal x5,800032c0 + 800011bc: 800011ac .word 0x800011ac + 800011c0: 00000000 .word 0x00000000 + 800011c4: 80009eb3 .word 0x80009eb3 + 800011c8: 00000000 .word 0x00000000 + 800011cc: 008a0a13 addi x20,x20,8 + + mv x9, x20 # switch signature pointer register to avoid conflict with test + 800011d0: 000a0493 addi x9,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xc2251deb30690520 + 800011d4: 000aba03 ld x20,0(x21) + 800011d8: 008a8a93 addi x21,x21,8 + +00000000800011dc : +Zbkb_rori_cg_cmp_rd_rs1_b20: + rori x20, x20, 42 # perform operation + 800011dc: 62aa5a13 rori x20,x20,0x2a + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cmp_rd_rs1_b20, Zbkb_rori_cg_cmp_rd_rs1_b20_str) + 800011e0: 0004b203 ld x4,0(x9) + 800011e4: 01420c63 beq x4,x20,800011fc + 800011e8: 0d8022ef jal x5,800032c0 + 800011ec: 800011dc .word 0x800011dc + 800011f0: 00000000 .word 0x00000000 + 800011f4: 80009eeb .word 0x80009eeb + 800011f8: 00000000 .word 0x00000000 + 800011fc: 00848493 addi x9,x9,8 + + mv x30, x21 # switch data pointer register to avoid conflict with test + 80001200: 000a8f13 addi x30,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x4add9e7dacdbc348 + 80001204: 000f3a83 ld x21,0(x30) + 80001208: 008f0f13 addi x30,x30,8 + +000000008000120c : +Zbkb_rori_cg_cmp_rd_rs1_b21: + rori x21, x21, 18 # perform operation + 8000120c: 612ada93 rori x21,x21,0x12 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_rori_cg_cmp_rd_rs1_b21, Zbkb_rori_cg_cmp_rd_rs1_b21_str) + 80001210: 0004b203 ld x4,0(x9) + 80001214: 01520c63 beq x4,x21,8000122c + 80001218: 0a8022ef jal x5,800032c0 + 8000121c: 8000120c .word 0x8000120c + 80001220: 00000000 .word 0x00000000 + 80001224: 80009f23 .word 0x80009f23 + 80001228: 00000000 .word 0x00000000 + 8000122c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xe0f45d069e877317 + 80001230: 000f3b03 ld x22,0(x30) + 80001234: 008f0f13 addi x30,x30,8 + +0000000080001238 : +Zbkb_rori_cg_cmp_rd_rs1_b22: + rori x22, x22, 46 # perform operation + 80001238: 62eb5b13 rori x22,x22,0x2e + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_rori_cg_cmp_rd_rs1_b22, Zbkb_rori_cg_cmp_rd_rs1_b22_str) + 8000123c: 0004b203 ld x4,0(x9) + 80001240: 01620c63 beq x4,x22,80001258 + 80001244: 07c022ef jal x5,800032c0 + 80001248: 80001238 .word 0x80001238 + 8000124c: 00000000 .word 0x00000000 + 80001250: 80009f5b .word 0x80009f5b + 80001254: 00000000 .word 0x00000000 + 80001258: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x1c295eac04039470 + 8000125c: 000f3b83 ld x23,0(x30) + 80001260: 008f0f13 addi x30,x30,8 + +0000000080001264 : +Zbkb_rori_cg_cmp_rd_rs1_b23: + rori x23, x23, 58 # perform operation + 80001264: 63abdb93 rori x23,x23,0x3a + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zbkb_rori_cg_cmp_rd_rs1_b23, Zbkb_rori_cg_cmp_rd_rs1_b23_str) + 80001268: 0004b203 ld x4,0(x9) + 8000126c: 01720c63 beq x4,x23,80001284 + 80001270: 050022ef jal x5,800032c0 + 80001274: 80001264 .word 0x80001264 + 80001278: 00000000 .word 0x00000000 + 8000127c: 80009f93 .word 0x80009f93 + 80001280: 00000000 .word 0x00000000 + 80001284: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x975a993ed1e04372 + 80001288: 000f3c03 ld x24,0(x30) + 8000128c: 008f0f13 addi x30,x30,8 + +0000000080001290 : +Zbkb_rori_cg_cmp_rd_rs1_b24: + rori x24, x24, 42 # perform operation + 80001290: 62ac5c13 rori x24,x24,0x2a + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_rori_cg_cmp_rd_rs1_b24, Zbkb_rori_cg_cmp_rd_rs1_b24_str) + 80001294: 0004b203 ld x4,0(x9) + 80001298: 01820c63 beq x4,x24,800012b0 + 8000129c: 024022ef jal x5,800032c0 + 800012a0: 80001290 .word 0x80001290 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 80009fcb .word 0x80009fcb + 800012ac: 00000000 .word 0x00000000 + 800012b0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xf8688a3b974d767b + 800012b4: 000f3c83 ld x25,0(x30) + 800012b8: 008f0f13 addi x30,x30,8 + +00000000800012bc : +Zbkb_rori_cg_cmp_rd_rs1_b25: + rori x25, x25, 14 # perform operation + 800012bc: 60ecdc93 rori x25,x25,0xe + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkb_rori_cg_cmp_rd_rs1_b25, Zbkb_rori_cg_cmp_rd_rs1_b25_str) + 800012c0: 0004b203 ld x4,0(x9) + 800012c4: 01920c63 beq x4,x25,800012dc + 800012c8: 7f9012ef jal x5,800032c0 + 800012cc: 800012bc .word 0x800012bc + 800012d0: 00000000 .word 0x00000000 + 800012d4: 8000a003 .word 0x8000a003 + 800012d8: 00000000 .word 0x00000000 + 800012dc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x09e3465614b4b79f + 800012e0: 000f3d03 ld x26,0(x30) + 800012e4: 008f0f13 addi x30,x30,8 + +00000000800012e8 : +Zbkb_rori_cg_cmp_rd_rs1_b26: + rori x26, x26, 41 # perform operation + 800012e8: 629d5d13 rori x26,x26,0x29 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_rori_cg_cmp_rd_rs1_b26, Zbkb_rori_cg_cmp_rd_rs1_b26_str) + 800012ec: 0004b203 ld x4,0(x9) + 800012f0: 01a20c63 beq x4,x26,80001308 + 800012f4: 7cd012ef jal x5,800032c0 + 800012f8: 800012e8 .word 0x800012e8 + 800012fc: 00000000 .word 0x00000000 + 80001300: 8000a03b .word 0x8000a03b + 80001304: 00000000 .word 0x00000000 + 80001308: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0xaaaca6a2487c4d12 + 8000130c: 000f3d83 ld x27,0(x30) + 80001310: 008f0f13 addi x30,x30,8 + +0000000080001314 : +Zbkb_rori_cg_cmp_rd_rs1_b27: + rori x27, x27, 46 # perform operation + 80001314: 62eddd93 rori x27,x27,0x2e + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkb_rori_cg_cmp_rd_rs1_b27, Zbkb_rori_cg_cmp_rd_rs1_b27_str) + 80001318: 0004b203 ld x4,0(x9) + 8000131c: 01b20c63 beq x4,x27,80001334 + 80001320: 7a1012ef jal x5,800032c0 + 80001324: 80001314 .word 0x80001314 + 80001328: 00000000 .word 0x00000000 + 8000132c: 8000a073 .word 0x8000a073 + 80001330: 00000000 .word 0x00000000 + 80001334: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x6e3cac0e480be49b + 80001338: 000f3e03 ld x28,0(x30) + 8000133c: 008f0f13 addi x30,x30,8 + +0000000080001340 : +Zbkb_rori_cg_cmp_rd_rs1_b28: + rori x28, x28, 23 # perform operation + 80001340: 617e5e13 rori x28,x28,0x17 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkb_rori_cg_cmp_rd_rs1_b28, Zbkb_rori_cg_cmp_rd_rs1_b28_str) + 80001344: 0004b203 ld x4,0(x9) + 80001348: 01c20c63 beq x4,x28,80001360 + 8000134c: 775012ef jal x5,800032c0 + 80001350: 80001340 .word 0x80001340 + 80001354: 00000000 .word 0x00000000 + 80001358: 8000a0ab .word 0x8000a0ab + 8000135c: 00000000 .word 0x00000000 + 80001360: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x225d53cee2fdbe72 + 80001364: 000f3e83 ld x29,0(x30) + 80001368: 008f0f13 addi x30,x30,8 + +000000008000136c : +Zbkb_rori_cg_cmp_rd_rs1_b29: + rori x29, x29, 18 # perform operation + 8000136c: 612ede93 rori x29,x29,0x12 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cmp_rd_rs1_b29, Zbkb_rori_cg_cmp_rd_rs1_b29_str) + 80001370: 0004b203 ld x4,0(x9) + 80001374: 01d20c63 beq x4,x29,8000138c + 80001378: 749012ef jal x5,800032c0 + 8000137c: 8000136c .word 0x8000136c + 80001380: 00000000 .word 0x00000000 + 80001384: 8000a0e3 .word 0x8000a0e3 + 80001388: 00000000 .word 0x00000000 + 8000138c: 00848493 addi x9,x9,8 + + mv x25, x30 # switch data pointer register to avoid conflict with test + 80001390: 000f0c93 addi x25,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x334bde9118df313e + 80001394: 000cbf03 ld x30,0(x25) + 80001398: 008c8c93 addi x25,x25,8 + +000000008000139c : +Zbkb_rori_cg_cmp_rd_rs1_b30: + rori x30, x30, 47 # perform operation + 8000139c: 62ff5f13 rori x30,x30,0x2f + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cmp_rd_rs1_b30, Zbkb_rori_cg_cmp_rd_rs1_b30_str) + 800013a0: 0004b203 ld x4,0(x9) + 800013a4: 01e20c63 beq x4,x30,800013bc + 800013a8: 719012ef jal x5,800032c0 + 800013ac: 8000139c .word 0x8000139c + 800013b0: 00000000 .word 0x00000000 + 800013b4: 8000a11b .word 0x8000a11b + 800013b8: 00000000 .word 0x00000000 + 800013bc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x5103574ca913efae + 800013c0: 000cbf83 ld x31,0(x25) + 800013c4: 008c8c93 addi x25,x25,8 + +00000000800013c8 : +Zbkb_rori_cg_cmp_rd_rs1_b31: + rori x31, x31, 1 # perform operation + 800013c8: 601fdf93 rori x31,x31,0x1 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_rori_cg_cmp_rd_rs1_b31, Zbkb_rori_cg_cmp_rd_rs1_b31_str) + 800013cc: 0004b203 ld x4,0(x9) + 800013d0: 01f20c63 beq x4,x31,800013e8 + 800013d4: 6ed012ef jal x5,800032c0 + 800013d8: 800013c8 .word 0x800013c8 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 8000a153 .word 0x8000a153 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 00848493 addi x9,x9,8 +///////////////////////////////// +// cp_uimm +///////////////////////////////// + +# Testcase cp_uimm: imm=0 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xf9f184dd3d5af9e2 + 800013ec: 000cb903 ld x18,0(x25) + 800013f0: 008c8c93 addi x25,x25,8 + +00000000800013f4 : +Zbkb_rori_cg_cp_uimm_uimm0: + rori x31, x18, 0 # perform operation + 800013f4: 60095f93 rori x31,x18,0x0 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm0, Zbkb_rori_cg_cp_uimm_uimm0_str) + 800013f8: 0004b203 ld x4,0(x9) + 800013fc: 01f20c63 beq x4,x31,80001414 + 80001400: 6c1012ef jal x5,800032c0 + 80001404: 800013f4 .word 0x800013f4 + 80001408: 00000000 .word 0x00000000 + 8000140c: 8000a18b .word 0x8000a18b + 80001410: 00000000 .word 0x00000000 + 80001414: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=1 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0xfd8ed249bfbede75 + 80001418: 000cb083 ld x1,0(x25) + 8000141c: 008c8c93 addi x25,x25,8 + +0000000080001420 : +Zbkb_rori_cg_cp_uimm_uimm1: + rori x21, x1, 1 # perform operation + 80001420: 6010da93 rori x21,x1,0x1 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm1, Zbkb_rori_cg_cp_uimm_uimm1_str) + 80001424: 0004b203 ld x4,0(x9) + 80001428: 01520c63 beq x4,x21,80001440 + 8000142c: 695012ef jal x5,800032c0 + 80001430: 80001420 .word 0x80001420 + 80001434: 00000000 .word 0x00000000 + 80001438: 8000a1c2 .word 0x8000a1c2 + 8000143c: 00000000 .word 0x00000000 + 80001440: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=2 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x15a6248f2a5dfa03 + 80001444: 000cb683 ld x13,0(x25) + 80001448: 008c8c93 addi x25,x25,8 + +000000008000144c : +Zbkb_rori_cg_cp_uimm_uimm2: + rori x21, x13, 2 # perform operation + 8000144c: 6026da93 rori x21,x13,0x2 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm2, Zbkb_rori_cg_cp_uimm_uimm2_str) + 80001450: 0004b203 ld x4,0(x9) + 80001454: 01520c63 beq x4,x21,8000146c + 80001458: 669012ef jal x5,800032c0 + 8000145c: 8000144c .word 0x8000144c + 80001460: 00000000 .word 0x00000000 + 80001464: 8000a1f9 .word 0x8000a1f9 + 80001468: 00000000 .word 0x00000000 + 8000146c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=3 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x37e073854f8d5dcc + 80001470: 000cb703 ld x14,0(x25) + 80001474: 008c8c93 addi x25,x25,8 + +0000000080001478 : +Zbkb_rori_cg_cp_uimm_uimm3: + rori x2, x14, 3 # perform operation + 80001478: 60375113 rori x2,x14,0x3 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_rori_cg_cp_uimm_uimm3, Zbkb_rori_cg_cp_uimm_uimm3_str) + 8000147c: 0004b203 ld x4,0(x9) + 80001480: 00220c63 beq x4,x2,80001498 + 80001484: 63d012ef jal x5,800032c0 + 80001488: 80001478 .word 0x80001478 + 8000148c: 00000000 .word 0x00000000 + 80001490: 8000a230 .word 0x8000a230 + 80001494: 00000000 .word 0x00000000 + 80001498: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=4 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xc68ca4b57cd1a085 + 8000149c: 000cb403 ld x8,0(x25) + 800014a0: 008c8c93 addi x25,x25,8 + +00000000800014a4 : +Zbkb_rori_cg_cp_uimm_uimm4: + rori x11, x8, 4 # perform operation + 800014a4: 60445593 rori x11,x8,0x4 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm4, Zbkb_rori_cg_cp_uimm_uimm4_str) + 800014a8: 0004b203 ld x4,0(x9) + 800014ac: 00b20c63 beq x4,x11,800014c4 + 800014b0: 611012ef jal x5,800032c0 + 800014b4: 800014a4 .word 0x800014a4 + 800014b8: 00000000 .word 0x00000000 + 800014bc: 8000a267 .word 0x8000a267 + 800014c0: 00000000 .word 0x00000000 + 800014c4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=5 + RVTEST_TESTDATA_LOAD_INT(x25, x0) # load rs1: x0 = 0x11ccb4b1371ecfaf + 800014c8: 000cb003 ld x0,0(x25) + 800014cc: 008c8c93 addi x25,x25,8 + +00000000800014d0 : +Zbkb_rori_cg_cp_uimm_uimm5: + rori x8, x0, 5 # perform operation + 800014d0: 60505413 rori x8,x0,0x5 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_rori_cg_cp_uimm_uimm5, Zbkb_rori_cg_cp_uimm_uimm5_str) + 800014d4: 0004b203 ld x4,0(x9) + 800014d8: 00820c63 beq x4,x8,800014f0 + 800014dc: 5e5012ef jal x5,800032c0 + 800014e0: 800014d0 .word 0x800014d0 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 8000a29e .word 0x8000a29e + 800014ec: 00000000 .word 0x00000000 + 800014f0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=6 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x7e94e04bf1859be5 + 800014f4: 000cb703 ld x14,0(x25) + 800014f8: 008c8c93 addi x25,x25,8 + +00000000800014fc : +Zbkb_rori_cg_cp_uimm_uimm6: + rori x29, x14, 6 # perform operation + 800014fc: 60675e93 rori x29,x14,0x6 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm6, Zbkb_rori_cg_cp_uimm_uimm6_str) + 80001500: 0004b203 ld x4,0(x9) + 80001504: 01d20c63 beq x4,x29,8000151c + 80001508: 5b9012ef jal x5,800032c0 + 8000150c: 800014fc .word 0x800014fc + 80001510: 00000000 .word 0x00000000 + 80001514: 8000a2d5 .word 0x8000a2d5 + 80001518: 00000000 .word 0x00000000 + 8000151c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=7 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0xe85e3d1eb84b3f5c + 80001520: 000cb783 ld x15,0(x25) + 80001524: 008c8c93 addi x25,x25,8 + +0000000080001528 : +Zbkb_rori_cg_cp_uimm_uimm7: + rori x20, x15, 7 # perform operation + 80001528: 6077da13 rori x20,x15,0x7 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm7, Zbkb_rori_cg_cp_uimm_uimm7_str) + 8000152c: 0004b203 ld x4,0(x9) + 80001530: 01420c63 beq x4,x20,80001548 + 80001534: 58d012ef jal x5,800032c0 + 80001538: 80001528 .word 0x80001528 + 8000153c: 00000000 .word 0x00000000 + 80001540: 8000a30c .word 0x8000a30c + 80001544: 00000000 .word 0x00000000 + 80001548: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x97b903bc09afbbbd + 8000154c: 000cbe03 ld x28,0(x25) + 80001550: 008c8c93 addi x25,x25,8 + +0000000080001554 : +Zbkb_rori_cg_cp_uimm_uimm8: + rori x20, x28, 8 # perform operation + 80001554: 608e5a13 rori x20,x28,0x8 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm8, Zbkb_rori_cg_cp_uimm_uimm8_str) + 80001558: 0004b203 ld x4,0(x9) + 8000155c: 01420c63 beq x4,x20,80001574 + 80001560: 561012ef jal x5,800032c0 + 80001564: 80001554 .word 0x80001554 + 80001568: 00000000 .word 0x00000000 + 8000156c: 8000a343 .word 0x8000a343 + 80001570: 00000000 .word 0x00000000 + 80001574: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=9 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xc61494d08949a1a5 + 80001578: 000cb983 ld x19,0(x25) + 8000157c: 008c8c93 addi x25,x25,8 + +0000000080001580 : +Zbkb_rori_cg_cp_uimm_uimm9: + rori x14, x19, 9 # perform operation + 80001580: 6099d713 rori x14,x19,0x9 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkb_rori_cg_cp_uimm_uimm9, Zbkb_rori_cg_cp_uimm_uimm9_str) + 80001584: 0004b203 ld x4,0(x9) + 80001588: 00e20c63 beq x4,x14,800015a0 + 8000158c: 535012ef jal x5,800032c0 + 80001590: 80001580 .word 0x80001580 + 80001594: 00000000 .word 0x00000000 + 80001598: 8000a37a .word 0x8000a37a + 8000159c: 00000000 .word 0x00000000 + 800015a0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=10 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x26e7c6b38bb66c1a + 800015a4: 000cb083 ld x1,0(x25) + 800015a8: 008c8c93 addi x25,x25,8 + +00000000800015ac : +Zbkb_rori_cg_cp_uimm_uimm10: + rori x31, x1, 10 # perform operation + 800015ac: 60a0df93 rori x31,x1,0xa + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm10, Zbkb_rori_cg_cp_uimm_uimm10_str) + 800015b0: 0004b203 ld x4,0(x9) + 800015b4: 01f20c63 beq x4,x31,800015cc + 800015b8: 509012ef jal x5,800032c0 + 800015bc: 800015ac .word 0x800015ac + 800015c0: 00000000 .word 0x00000000 + 800015c4: 8000a3b1 .word 0x8000a3b1 + 800015c8: 00000000 .word 0x00000000 + 800015cc: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=11 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x6a40108d1cb5eb7e + 800015d0: 000cbc03 ld x24,0(x25) + 800015d4: 008c8c93 addi x25,x25,8 + +00000000800015d8 : +Zbkb_rori_cg_cp_uimm_uimm11: + rori x6, x24, 11 # perform operation + 800015d8: 60bc5313 rori x6,x24,0xb + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_rori_cg_cp_uimm_uimm11, Zbkb_rori_cg_cp_uimm_uimm11_str) + 800015dc: 0004b203 ld x4,0(x9) + 800015e0: 00620c63 beq x4,x6,800015f8 + 800015e4: 4dd012ef jal x5,800032c0 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000a3e9 .word 0x8000a3e9 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=12 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xf246dbee254657c5 + 800015fc: 000cb983 ld x19,0(x25) + 80001600: 008c8c93 addi x25,x25,8 + +0000000080001604 : +Zbkb_rori_cg_cp_uimm_uimm12: + rori x12, x19, 12 # perform operation + 80001604: 60c9d613 rori x12,x19,0xc + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_rori_cg_cp_uimm_uimm12, Zbkb_rori_cg_cp_uimm_uimm12_str) + 80001608: 0004b203 ld x4,0(x9) + 8000160c: 00c20c63 beq x4,x12,80001624 + 80001610: 4b1012ef jal x5,800032c0 + 80001614: 80001604 .word 0x80001604 + 80001618: 00000000 .word 0x00000000 + 8000161c: 8000a421 .word 0x8000a421 + 80001620: 00000000 .word 0x00000000 + 80001624: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=13 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xf5adf705d2f821fd + 80001628: 000cba83 ld x21,0(x25) + 8000162c: 008c8c93 addi x25,x25,8 + +0000000080001630 : +Zbkb_rori_cg_cp_uimm_uimm13: + rori x11, x21, 13 # perform operation + 80001630: 60dad593 rori x11,x21,0xd + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm13, Zbkb_rori_cg_cp_uimm_uimm13_str) + 80001634: 0004b203 ld x4,0(x9) + 80001638: 00b20c63 beq x4,x11,80001650 + 8000163c: 485012ef jal x5,800032c0 + 80001640: 80001630 .word 0x80001630 + 80001644: 00000000 .word 0x00000000 + 80001648: 8000a459 .word 0x8000a459 + 8000164c: 00000000 .word 0x00000000 + 80001650: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=14 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x591652f43e12084e + 80001654: 000cb883 ld x17,0(x25) + 80001658: 008c8c93 addi x25,x25,8 + +000000008000165c : +Zbkb_rori_cg_cp_uimm_uimm14: + rori x31, x17, 14 # perform operation + 8000165c: 60e8df93 rori x31,x17,0xe + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkb_rori_cg_cp_uimm_uimm14, Zbkb_rori_cg_cp_uimm_uimm14_str) + 80001660: 0004b203 ld x4,0(x9) + 80001664: 01f20c63 beq x4,x31,8000167c + 80001668: 459012ef jal x5,800032c0 + 8000166c: 8000165c .word 0x8000165c + 80001670: 00000000 .word 0x00000000 + 80001674: 8000a491 .word 0x8000a491 + 80001678: 00000000 .word 0x00000000 + 8000167c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=15 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0xd33ca41b5fa0430b + 80001680: 000cbb83 ld x23,0(x25) + 80001684: 008c8c93 addi x25,x25,8 + +0000000080001688 : +Zbkb_rori_cg_cp_uimm_uimm15: + rori x26, x23, 15 # perform operation + 80001688: 60fbdd13 rori x26,x23,0xf + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_rori_cg_cp_uimm_uimm15, Zbkb_rori_cg_cp_uimm_uimm15_str) + 8000168c: 0004b203 ld x4,0(x9) + 80001690: 01a20c63 beq x4,x26,800016a8 + 80001694: 42d012ef jal x5,800032c0 + 80001698: 80001688 .word 0x80001688 + 8000169c: 00000000 .word 0x00000000 + 800016a0: 8000a4c9 .word 0x8000a4c9 + 800016a4: 00000000 .word 0x00000000 + 800016a8: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=16 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xfdf72db3396b69a4 + 800016ac: 000cb383 ld x7,0(x25) + 800016b0: 008c8c93 addi x25,x25,8 + +00000000800016b4 : +Zbkb_rori_cg_cp_uimm_uimm16: + rori x16, x7, 16 # perform operation + 800016b4: 6103d813 rori x16,x7,0x10 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_rori_cg_cp_uimm_uimm16, Zbkb_rori_cg_cp_uimm_uimm16_str) + 800016b8: 0004b203 ld x4,0(x9) + 800016bc: 01020c63 beq x4,x16,800016d4 + 800016c0: 401012ef jal x5,800032c0 + 800016c4: 800016b4 .word 0x800016b4 + 800016c8: 00000000 .word 0x00000000 + 800016cc: 8000a501 .word 0x8000a501 + 800016d0: 00000000 .word 0x00000000 + 800016d4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=17 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xbf3ac666864e8302 + 800016d8: 000cb303 ld x6,0(x25) + 800016dc: 008c8c93 addi x25,x25,8 + +00000000800016e0 : +Zbkb_rori_cg_cp_uimm_uimm17: + rori x29, x6, 17 # perform operation + 800016e0: 61135e93 rori x29,x6,0x11 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm17, Zbkb_rori_cg_cp_uimm_uimm17_str) + 800016e4: 0004b203 ld x4,0(x9) + 800016e8: 01d20c63 beq x4,x29,80001700 + 800016ec: 3d5012ef jal x5,800032c0 + 800016f0: 800016e0 .word 0x800016e0 + 800016f4: 00000000 .word 0x00000000 + 800016f8: 8000a539 .word 0x8000a539 + 800016fc: 00000000 .word 0x00000000 + 80001700: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=18 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xfa8db040e82e2888 + 80001704: 000cb883 ld x17,0(x25) + 80001708: 008c8c93 addi x25,x25,8 + +000000008000170c : +Zbkb_rori_cg_cp_uimm_uimm18: + rori x20, x17, 18 # perform operation + 8000170c: 6128da13 rori x20,x17,0x12 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm18, Zbkb_rori_cg_cp_uimm_uimm18_str) + 80001710: 0004b203 ld x4,0(x9) + 80001714: 01420c63 beq x4,x20,8000172c + 80001718: 3a9012ef jal x5,800032c0 + 8000171c: 8000170c .word 0x8000170c + 80001720: 00000000 .word 0x00000000 + 80001724: 8000a571 .word 0x8000a571 + 80001728: 00000000 .word 0x00000000 + 8000172c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=19 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x2c7def7fa6e1d38c + 80001730: 000cb303 ld x6,0(x25) + 80001734: 008c8c93 addi x25,x25,8 + +0000000080001738 : +Zbkb_rori_cg_cp_uimm_uimm19: + rori x0, x6, 19 # perform operation + 80001738: 61335013 rori x0,x6,0x13 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkb_rori_cg_cp_uimm_uimm19, Zbkb_rori_cg_cp_uimm_uimm19_str) + 8000173c: 0004b203 ld x4,0(x9) + 80001740: 00020c63 beq x4,x0,80001758 + 80001744: 37d012ef jal x5,800032c0 + 80001748: 80001738 .word 0x80001738 + 8000174c: 00000000 .word 0x00000000 + 80001750: 8000a5a9 .word 0x8000a5a9 + 80001754: 00000000 .word 0x00000000 + 80001758: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=20 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x3b25d5f42b49738f + 8000175c: 000cb903 ld x18,0(x25) + 80001760: 008c8c93 addi x25,x25,8 + +0000000080001764 : +Zbkb_rori_cg_cp_uimm_uimm20: + rori x2, x18, 20 # perform operation + 80001764: 61495113 rori x2,x18,0x14 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_rori_cg_cp_uimm_uimm20, Zbkb_rori_cg_cp_uimm_uimm20_str) + 80001768: 0004b203 ld x4,0(x9) + 8000176c: 00220c63 beq x4,x2,80001784 + 80001770: 351012ef jal x5,800032c0 + 80001774: 80001764 .word 0x80001764 + 80001778: 00000000 .word 0x00000000 + 8000177c: 8000a5e1 .word 0x8000a5e1 + 80001780: 00000000 .word 0x00000000 + 80001784: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=21 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x33a4834c62d2ae73 + 80001788: 000cbe83 ld x29,0(x25) + 8000178c: 008c8c93 addi x25,x25,8 + +0000000080001790 : +Zbkb_rori_cg_cp_uimm_uimm21: + rori x6, x29, 21 # perform operation + 80001790: 615ed313 rori x6,x29,0x15 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_rori_cg_cp_uimm_uimm21, Zbkb_rori_cg_cp_uimm_uimm21_str) + 80001794: 0004b203 ld x4,0(x9) + 80001798: 00620c63 beq x4,x6,800017b0 + 8000179c: 325012ef jal x5,800032c0 + 800017a0: 80001790 .word 0x80001790 + 800017a4: 00000000 .word 0x00000000 + 800017a8: 8000a619 .word 0x8000a619 + 800017ac: 00000000 .word 0x00000000 + 800017b0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=22 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x2f7579e0a84f4130 + 800017b4: 000cb903 ld x18,0(x25) + 800017b8: 008c8c93 addi x25,x25,8 + +00000000800017bc : +Zbkb_rori_cg_cp_uimm_uimm22: + rori x20, x18, 22 # perform operation + 800017bc: 61695a13 rori x20,x18,0x16 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm22, Zbkb_rori_cg_cp_uimm_uimm22_str) + 800017c0: 0004b203 ld x4,0(x9) + 800017c4: 01420c63 beq x4,x20,800017dc + 800017c8: 2f9012ef jal x5,800032c0 + 800017cc: 800017bc .word 0x800017bc + 800017d0: 00000000 .word 0x00000000 + 800017d4: 8000a651 .word 0x8000a651 + 800017d8: 00000000 .word 0x00000000 + 800017dc: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=23 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x9b06e891e2dc0de5 + 800017e0: 000cb303 ld x6,0(x25) + 800017e4: 008c8c93 addi x25,x25,8 + +00000000800017e8 : +Zbkb_rori_cg_cp_uimm_uimm23: + rori x26, x6, 23 # perform operation + 800017e8: 61735d13 rori x26,x6,0x17 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_rori_cg_cp_uimm_uimm23, Zbkb_rori_cg_cp_uimm_uimm23_str) + 800017ec: 0004b203 ld x4,0(x9) + 800017f0: 01a20c63 beq x4,x26,80001808 + 800017f4: 2cd012ef jal x5,800032c0 + 800017f8: 800017e8 .word 0x800017e8 + 800017fc: 00000000 .word 0x00000000 + 80001800: 8000a689 .word 0x8000a689 + 80001804: 00000000 .word 0x00000000 + 80001808: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=24 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xfbe510ec16ae245b + 8000180c: 000cb883 ld x17,0(x25) + 80001810: 008c8c93 addi x25,x25,8 + +0000000080001814 : +Zbkb_rori_cg_cp_uimm_uimm24: + rori x3, x17, 24 # perform operation + 80001814: 6188d193 rori x3,x17,0x18 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkb_rori_cg_cp_uimm_uimm24, Zbkb_rori_cg_cp_uimm_uimm24_str) + 80001818: 0004b203 ld x4,0(x9) + 8000181c: 00320c63 beq x4,x3,80001834 + 80001820: 2a1012ef jal x5,800032c0 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000a6c1 .word 0x8000a6c1 + 80001830: 00000000 .word 0x00000000 + 80001834: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=25 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x9ee18bd89c1dd822 + 80001838: 000cbe83 ld x29,0(x25) + 8000183c: 008c8c93 addi x25,x25,8 + +0000000080001840 : +Zbkb_rori_cg_cp_uimm_uimm25: + rori x7, x29, 25 # perform operation + 80001840: 619ed393 rori x7,x29,0x19 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_rori_cg_cp_uimm_uimm25, Zbkb_rori_cg_cp_uimm_uimm25_str) + 80001844: 0004b203 ld x4,0(x9) + 80001848: 00720c63 beq x4,x7,80001860 + 8000184c: 275012ef jal x5,800032c0 + 80001850: 80001840 .word 0x80001840 + 80001854: 00000000 .word 0x00000000 + 80001858: 8000a6f9 .word 0x8000a6f9 + 8000185c: 00000000 .word 0x00000000 + 80001860: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=26 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xd1a540501f233a94 + 80001864: 000cb383 ld x7,0(x25) + 80001868: 008c8c93 addi x25,x25,8 + +000000008000186c : +Zbkb_rori_cg_cp_uimm_uimm26: + rori x12, x7, 26 # perform operation + 8000186c: 61a3d613 rori x12,x7,0x1a + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_rori_cg_cp_uimm_uimm26, Zbkb_rori_cg_cp_uimm_uimm26_str) + 80001870: 0004b203 ld x4,0(x9) + 80001874: 00c20c63 beq x4,x12,8000188c + 80001878: 249012ef jal x5,800032c0 + 8000187c: 8000186c .word 0x8000186c + 80001880: 00000000 .word 0x00000000 + 80001884: 8000a731 .word 0x8000a731 + 80001888: 00000000 .word 0x00000000 + 8000188c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=27 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x792b340a06152a35 + 80001890: 000cb303 ld x6,0(x25) + 80001894: 008c8c93 addi x25,x25,8 + +0000000080001898 : +Zbkb_rori_cg_cp_uimm_uimm27: + rori x21, x6, 27 # perform operation + 80001898: 61b35a93 rori x21,x6,0x1b + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm27, Zbkb_rori_cg_cp_uimm_uimm27_str) + 8000189c: 0004b203 ld x4,0(x9) + 800018a0: 01520c63 beq x4,x21,800018b8 + 800018a4: 21d012ef jal x5,800032c0 + 800018a8: 80001898 .word 0x80001898 + 800018ac: 00000000 .word 0x00000000 + 800018b0: 8000a769 .word 0x8000a769 + 800018b4: 00000000 .word 0x00000000 + 800018b8: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=28 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x54d8bd8208dfb90e + 800018bc: 000cbe03 ld x28,0(x25) + 800018c0: 008c8c93 addi x25,x25,8 + +00000000800018c4 : +Zbkb_rori_cg_cp_uimm_uimm28: + rori x30, x28, 28 # perform operation + 800018c4: 61ce5f13 rori x30,x28,0x1c + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cp_uimm_uimm28, Zbkb_rori_cg_cp_uimm_uimm28_str) + 800018c8: 0004b203 ld x4,0(x9) + 800018cc: 01e20c63 beq x4,x30,800018e4 + 800018d0: 1f1012ef jal x5,800032c0 + 800018d4: 800018c4 .word 0x800018c4 + 800018d8: 00000000 .word 0x00000000 + 800018dc: 8000a7a1 .word 0x8000a7a1 + 800018e0: 00000000 .word 0x00000000 + 800018e4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=29 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xc23da66e0fbad7fe + 800018e8: 000cb403 ld x8,0(x25) + 800018ec: 008c8c93 addi x25,x25,8 + +00000000800018f0 : +Zbkb_rori_cg_cp_uimm_uimm29: + rori x2, x8, 29 # perform operation + 800018f0: 61d45113 rori x2,x8,0x1d + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_rori_cg_cp_uimm_uimm29, Zbkb_rori_cg_cp_uimm_uimm29_str) + 800018f4: 0004b203 ld x4,0(x9) + 800018f8: 00220c63 beq x4,x2,80001910 + 800018fc: 1c5012ef jal x5,800032c0 + 80001900: 800018f0 .word 0x800018f0 + 80001904: 00000000 .word 0x00000000 + 80001908: 8000a7d9 .word 0x8000a7d9 + 8000190c: 00000000 .word 0x00000000 + 80001910: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=30 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x8b04d54a2ea8691f + 80001914: 000cba83 ld x21,0(x25) + 80001918: 008c8c93 addi x25,x25,8 + +000000008000191c : +Zbkb_rori_cg_cp_uimm_uimm30: + rori x29, x21, 30 # perform operation + 8000191c: 61eade93 rori x29,x21,0x1e + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm30, Zbkb_rori_cg_cp_uimm_uimm30_str) + 80001920: 0004b203 ld x4,0(x9) + 80001924: 01d20c63 beq x4,x29,8000193c + 80001928: 199012ef jal x5,800032c0 + 8000192c: 8000191c .word 0x8000191c + 80001930: 00000000 .word 0x00000000 + 80001934: 8000a811 .word 0x8000a811 + 80001938: 00000000 .word 0x00000000 + 8000193c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=31 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x7766be59907a56c2 + 80001940: 000cbb83 ld x23,0(x25) + 80001944: 008c8c93 addi x25,x25,8 + +0000000080001948 : +Zbkb_rori_cg_cp_uimm_uimm31: + rori x22, x23, 31 # perform operation + 80001948: 61fbdb13 rori x22,x23,0x1f + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkb_rori_cg_cp_uimm_uimm31, Zbkb_rori_cg_cp_uimm_uimm31_str) + 8000194c: 0004b203 ld x4,0(x9) + 80001950: 01620c63 beq x4,x22,80001968 + 80001954: 16d012ef jal x5,800032c0 + 80001958: 80001948 .word 0x80001948 + 8000195c: 00000000 .word 0x00000000 + 80001960: 8000a849 .word 0x8000a849 + 80001964: 00000000 .word 0x00000000 + 80001968: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=32 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x93490b5ee502f3c5 + 8000196c: 000cb903 ld x18,0(x25) + 80001970: 008c8c93 addi x25,x25,8 + +0000000080001974 : +Zbkb_rori_cg_cp_uimm_uimm32: + rori x24, x18, 32 # perform operation + 80001974: 62095c13 rori x24,x18,0x20 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zbkb_rori_cg_cp_uimm_uimm32, Zbkb_rori_cg_cp_uimm_uimm32_str) + 80001978: 0004b203 ld x4,0(x9) + 8000197c: 01820c63 beq x4,x24,80001994 + 80001980: 141012ef jal x5,800032c0 + 80001984: 80001974 .word 0x80001974 + 80001988: 00000000 .word 0x00000000 + 8000198c: 8000a881 .word 0x8000a881 + 80001990: 00000000 .word 0x00000000 + 80001994: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=33 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xebc116c598491861 + 80001998: 000cb403 ld x8,0(x25) + 8000199c: 008c8c93 addi x25,x25,8 + +00000000800019a0 : +Zbkb_rori_cg_cp_uimm_uimm33: + rori x30, x8, 33 # perform operation + 800019a0: 62145f13 rori x30,x8,0x21 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cp_uimm_uimm33, Zbkb_rori_cg_cp_uimm_uimm33_str) + 800019a4: 0004b203 ld x4,0(x9) + 800019a8: 01e20c63 beq x4,x30,800019c0 + 800019ac: 115012ef jal x5,800032c0 + 800019b0: 800019a0 .word 0x800019a0 + 800019b4: 00000000 .word 0x00000000 + 800019b8: 8000a8b9 .word 0x8000a8b9 + 800019bc: 00000000 .word 0x00000000 + 800019c0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=34 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x5222585372b0f5c9 + 800019c4: 000cbb03 ld x22,0(x25) + 800019c8: 008c8c93 addi x25,x25,8 + +00000000800019cc : +Zbkb_rori_cg_cp_uimm_uimm34: + rori x29, x22, 34 # perform operation + 800019cc: 622b5e93 rori x29,x22,0x22 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm34, Zbkb_rori_cg_cp_uimm_uimm34_str) + 800019d0: 0004b203 ld x4,0(x9) + 800019d4: 01d20c63 beq x4,x29,800019ec + 800019d8: 0e9012ef jal x5,800032c0 + 800019dc: 800019cc .word 0x800019cc + 800019e0: 00000000 .word 0x00000000 + 800019e4: 8000a8f1 .word 0x8000a8f1 + 800019e8: 00000000 .word 0x00000000 + 800019ec: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=35 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0x9c93491ab219e544 + 800019f0: 000cb183 ld x3,0(x25) + 800019f4: 008c8c93 addi x25,x25,8 + +00000000800019f8 : +Zbkb_rori_cg_cp_uimm_uimm35: + rori x17, x3, 35 # perform operation + 800019f8: 6231d893 rori x17,x3,0x23 + # Check if x17 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x17, Zbkb_rori_cg_cp_uimm_uimm35, Zbkb_rori_cg_cp_uimm_uimm35_str) + 800019fc: 0004b203 ld x4,0(x9) + 80001a00: 01120c63 beq x4,x17,80001a18 + 80001a04: 0bd012ef jal x5,800032c0 + 80001a08: 800019f8 .word 0x800019f8 + 80001a0c: 00000000 .word 0x00000000 + 80001a10: 8000a929 .word 0x8000a929 + 80001a14: 00000000 .word 0x00000000 + 80001a18: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=36 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x97fa6fa7f3678bdf + 80001a1c: 000cb583 ld x11,0(x25) + 80001a20: 008c8c93 addi x25,x25,8 + +0000000080001a24 : +Zbkb_rori_cg_cp_uimm_uimm36: + rori x30, x11, 36 # perform operation + 80001a24: 6245df13 rori x30,x11,0x24 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cp_uimm_uimm36, Zbkb_rori_cg_cp_uimm_uimm36_str) + 80001a28: 0004b203 ld x4,0(x9) + 80001a2c: 01e20c63 beq x4,x30,80001a44 + 80001a30: 091012ef jal x5,800032c0 + 80001a34: 80001a24 .word 0x80001a24 + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 8000a961 .word 0x8000a961 + 80001a40: 00000000 .word 0x00000000 + 80001a44: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=37 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xb40ba233b324f857 + 80001a48: 000cb583 ld x11,0(x25) + 80001a4c: 008c8c93 addi x25,x25,8 + +0000000080001a50 : +Zbkb_rori_cg_cp_uimm_uimm37: + rori x18, x11, 37 # perform operation + 80001a50: 6255d913 rori x18,x11,0x25 + # Check if x18 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x18, Zbkb_rori_cg_cp_uimm_uimm37, Zbkb_rori_cg_cp_uimm_uimm37_str) + 80001a54: 0004b203 ld x4,0(x9) + 80001a58: 01220c63 beq x4,x18,80001a70 + 80001a5c: 065012ef jal x5,800032c0 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 8000a999 .word 0x8000a999 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=38 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xf39f033c38ddabfe + 80001a74: 000cb583 ld x11,0(x25) + 80001a78: 008c8c93 addi x25,x25,8 + +0000000080001a7c : +Zbkb_rori_cg_cp_uimm_uimm38: + rori x10, x11, 38 # perform operation + 80001a7c: 6265d513 rori x10,x11,0x26 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_rori_cg_cp_uimm_uimm38, Zbkb_rori_cg_cp_uimm_uimm38_str) + 80001a80: 0004b203 ld x4,0(x9) + 80001a84: 00a20c63 beq x4,x10,80001a9c + 80001a88: 039012ef jal x5,800032c0 + 80001a8c: 80001a7c .word 0x80001a7c + 80001a90: 00000000 .word 0x00000000 + 80001a94: 8000a9d1 .word 0x8000a9d1 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=39 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x337927767f1978a9 + 80001aa0: 000cb703 ld x14,0(x25) + 80001aa4: 008c8c93 addi x25,x25,8 + +0000000080001aa8 : +Zbkb_rori_cg_cp_uimm_uimm39: + rori x10, x14, 39 # perform operation + 80001aa8: 62775513 rori x10,x14,0x27 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_rori_cg_cp_uimm_uimm39, Zbkb_rori_cg_cp_uimm_uimm39_str) + 80001aac: 0004b203 ld x4,0(x9) + 80001ab0: 00a20c63 beq x4,x10,80001ac8 + 80001ab4: 00d012ef jal x5,800032c0 + 80001ab8: 80001aa8 .word 0x80001aa8 + 80001abc: 00000000 .word 0x00000000 + 80001ac0: 8000aa09 .word 0x8000aa09 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=40 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x1b2412a6cad2bad5 + 80001acc: 000cbf83 ld x31,0(x25) + 80001ad0: 008c8c93 addi x25,x25,8 + +0000000080001ad4 : +Zbkb_rori_cg_cp_uimm_uimm40: + rori x8, x31, 40 # perform operation + 80001ad4: 628fd413 rori x8,x31,0x28 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zbkb_rori_cg_cp_uimm_uimm40, Zbkb_rori_cg_cp_uimm_uimm40_str) + 80001ad8: 0004b203 ld x4,0(x9) + 80001adc: 00820c63 beq x4,x8,80001af4 + 80001ae0: 7e0012ef jal x5,800032c0 + 80001ae4: 80001ad4 .word 0x80001ad4 + 80001ae8: 00000000 .word 0x00000000 + 80001aec: 8000aa41 .word 0x8000aa41 + 80001af0: 00000000 .word 0x00000000 + 80001af4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=41 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0xa796af9c00264013 + 80001af8: 000cb603 ld x12,0(x25) + 80001afc: 008c8c93 addi x25,x25,8 + +0000000080001b00 : +Zbkb_rori_cg_cp_uimm_uimm41: + rori x10, x12, 41 # perform operation + 80001b00: 62965513 rori x10,x12,0x29 + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_rori_cg_cp_uimm_uimm41, Zbkb_rori_cg_cp_uimm_uimm41_str) + 80001b04: 0004b203 ld x4,0(x9) + 80001b08: 00a20c63 beq x4,x10,80001b20 + 80001b0c: 7b4012ef jal x5,800032c0 + 80001b10: 80001b00 .word 0x80001b00 + 80001b14: 00000000 .word 0x00000000 + 80001b18: 8000aa79 .word 0x8000aa79 + 80001b1c: 00000000 .word 0x00000000 + 80001b20: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=42 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x9ad8323654feeded + 80001b24: 000cb083 ld x1,0(x25) + 80001b28: 008c8c93 addi x25,x25,8 + +0000000080001b2c : +Zbkb_rori_cg_cp_uimm_uimm42: + rori x26, x1, 42 # perform operation + 80001b2c: 62a0dd13 rori x26,x1,0x2a + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkb_rori_cg_cp_uimm_uimm42, Zbkb_rori_cg_cp_uimm_uimm42_str) + 80001b30: 0004b203 ld x4,0(x9) + 80001b34: 01a20c63 beq x4,x26,80001b4c + 80001b38: 788012ef jal x5,800032c0 + 80001b3c: 80001b2c .word 0x80001b2c + 80001b40: 00000000 .word 0x00000000 + 80001b44: 8000aab1 .word 0x8000aab1 + 80001b48: 00000000 .word 0x00000000 + 80001b4c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=43 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x0787786db557ab87 + 80001b50: 000cbf03 ld x30,0(x25) + 80001b54: 008c8c93 addi x25,x25,8 + +0000000080001b58 : +Zbkb_rori_cg_cp_uimm_uimm43: + rori x20, x30, 43 # perform operation + 80001b58: 62bf5a13 rori x20,x30,0x2b + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm43, Zbkb_rori_cg_cp_uimm_uimm43_str) + 80001b5c: 0004b203 ld x4,0(x9) + 80001b60: 01420c63 beq x4,x20,80001b78 + 80001b64: 75c012ef jal x5,800032c0 + 80001b68: 80001b58 .word 0x80001b58 + 80001b6c: 00000000 .word 0x00000000 + 80001b70: 8000aae9 .word 0x8000aae9 + 80001b74: 00000000 .word 0x00000000 + 80001b78: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=44 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x6bfd5c4232333a94 + 80001b7c: 000cb783 ld x15,0(x25) + 80001b80: 008c8c93 addi x25,x25,8 + +0000000080001b84 : +Zbkb_rori_cg_cp_uimm_uimm44: + rori x21, x15, 44 # perform operation + 80001b84: 62c7da93 rori x21,x15,0x2c + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkb_rori_cg_cp_uimm_uimm44, Zbkb_rori_cg_cp_uimm_uimm44_str) + 80001b88: 0004b203 ld x4,0(x9) + 80001b8c: 01520c63 beq x4,x21,80001ba4 + 80001b90: 730012ef jal x5,800032c0 + 80001b94: 80001b84 .word 0x80001b84 + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 8000ab21 .word 0x8000ab21 + 80001ba0: 00000000 .word 0x00000000 + 80001ba4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=45 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x879eeb05ab9c983a + 80001ba8: 000cb083 ld x1,0(x25) + 80001bac: 008c8c93 addi x25,x25,8 + +0000000080001bb0 : +Zbkb_rori_cg_cp_uimm_uimm45: + rori x10, x1, 45 # perform operation + 80001bb0: 62d0d513 rori x10,x1,0x2d + # Check if x10 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x10, Zbkb_rori_cg_cp_uimm_uimm45, Zbkb_rori_cg_cp_uimm_uimm45_str) + 80001bb4: 0004b203 ld x4,0(x9) + 80001bb8: 00a20c63 beq x4,x10,80001bd0 + 80001bbc: 704012ef jal x5,800032c0 + 80001bc0: 80001bb0 .word 0x80001bb0 + 80001bc4: 00000000 .word 0x00000000 + 80001bc8: 8000ab59 .word 0x8000ab59 + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=46 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x679c2716ed731cf7 + 80001bd4: 000cb803 ld x16,0(x25) + 80001bd8: 008c8c93 addi x25,x25,8 + +0000000080001bdc : +Zbkb_rori_cg_cp_uimm_uimm46: + rori x19, x16, 46 # perform operation + 80001bdc: 62e85993 rori x19,x16,0x2e + # Check if x19 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x19, Zbkb_rori_cg_cp_uimm_uimm46, Zbkb_rori_cg_cp_uimm_uimm46_str) + 80001be0: 0004b203 ld x4,0(x9) + 80001be4: 01320c63 beq x4,x19,80001bfc + 80001be8: 6d8012ef jal x5,800032c0 + 80001bec: 80001bdc .word 0x80001bdc + 80001bf0: 00000000 .word 0x00000000 + 80001bf4: 8000ab91 .word 0x8000ab91 + 80001bf8: 00000000 .word 0x00000000 + 80001bfc: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=47 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xa5e4816673ae6156 + 80001c00: 000cb683 ld x13,0(x25) + 80001c04: 008c8c93 addi x25,x25,8 + +0000000080001c08 : +Zbkb_rori_cg_cp_uimm_uimm47: + rori x15, x13, 47 # perform operation + 80001c08: 62f6d793 rori x15,x13,0x2f + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_rori_cg_cp_uimm_uimm47, Zbkb_rori_cg_cp_uimm_uimm47_str) + 80001c0c: 0004b203 ld x4,0(x9) + 80001c10: 00f20c63 beq x4,x15,80001c28 + 80001c14: 6ac012ef jal x5,800032c0 + 80001c18: 80001c08 .word 0x80001c08 + 80001c1c: 00000000 .word 0x00000000 + 80001c20: 8000abc9 .word 0x8000abc9 + 80001c24: 00000000 .word 0x00000000 + 80001c28: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=48 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x86d2a7f70ddb8a96 + 80001c2c: 000cba03 ld x20,0(x25) + 80001c30: 008c8c93 addi x25,x25,8 + +0000000080001c34 : +Zbkb_rori_cg_cp_uimm_uimm48: + rori x30, x20, 48 # perform operation + 80001c34: 630a5f13 rori x30,x20,0x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cp_uimm_uimm48, Zbkb_rori_cg_cp_uimm_uimm48_str) + 80001c38: 0004b203 ld x4,0(x9) + 80001c3c: 01e20c63 beq x4,x30,80001c54 + 80001c40: 680012ef jal x5,800032c0 + 80001c44: 80001c34 .word 0x80001c34 + 80001c48: 00000000 .word 0x00000000 + 80001c4c: 8000ac01 .word 0x8000ac01 + 80001c50: 00000000 .word 0x00000000 + 80001c54: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=49 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x6124f30c62d969f2 + 80001c58: 000cb683 ld x13,0(x25) + 80001c5c: 008c8c93 addi x25,x25,8 + +0000000080001c60 : +Zbkb_rori_cg_cp_uimm_uimm49: + rori x11, x13, 49 # perform operation + 80001c60: 6316d593 rori x11,x13,0x31 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm49, Zbkb_rori_cg_cp_uimm_uimm49_str) + 80001c64: 0004b203 ld x4,0(x9) + 80001c68: 00b20c63 beq x4,x11,80001c80 + 80001c6c: 654012ef jal x5,800032c0 + 80001c70: 80001c60 .word 0x80001c60 + 80001c74: 00000000 .word 0x00000000 + 80001c78: 8000ac39 .word 0x8000ac39 + 80001c7c: 00000000 .word 0x00000000 + 80001c80: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=50 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0xbbc2949dbfd085e5 + 80001c84: 000cb103 ld x2,0(x25) + 80001c88: 008c8c93 addi x25,x25,8 + +0000000080001c8c : +Zbkb_rori_cg_cp_uimm_uimm50: + rori x3, x2, 50 # perform operation + 80001c8c: 63215193 rori x3,x2,0x32 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkb_rori_cg_cp_uimm_uimm50, Zbkb_rori_cg_cp_uimm_uimm50_str) + 80001c90: 0004b203 ld x4,0(x9) + 80001c94: 00320c63 beq x4,x3,80001cac + 80001c98: 628012ef jal x5,800032c0 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 8000ac71 .word 0x8000ac71 + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=51 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xc1f818ce22ed21e1 + 80001cb0: 000cb403 ld x8,0(x25) + 80001cb4: 008c8c93 addi x25,x25,8 + +0000000080001cb8 : +Zbkb_rori_cg_cp_uimm_uimm51: + rori x11, x8, 51 # perform operation + 80001cb8: 63345593 rori x11,x8,0x33 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkb_rori_cg_cp_uimm_uimm51, Zbkb_rori_cg_cp_uimm_uimm51_str) + 80001cbc: 0004b203 ld x4,0(x9) + 80001cc0: 00b20c63 beq x4,x11,80001cd8 + 80001cc4: 5fc012ef jal x5,800032c0 + 80001cc8: 80001cb8 .word 0x80001cb8 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 8000aca9 .word 0x8000aca9 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=52 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x047e7a4366b42ec0 + 80001cdc: 000cbe83 ld x29,0(x25) + 80001ce0: 008c8c93 addi x25,x25,8 + +0000000080001ce4 : +Zbkb_rori_cg_cp_uimm_uimm52: + rori x1, x29, 52 # perform operation + 80001ce4: 634ed093 rori x1,x29,0x34 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_rori_cg_cp_uimm_uimm52, Zbkb_rori_cg_cp_uimm_uimm52_str) + 80001ce8: 0004b203 ld x4,0(x9) + 80001cec: 00120c63 beq x4,x1,80001d04 + 80001cf0: 5d0012ef jal x5,800032c0 + 80001cf4: 80001ce4 .word 0x80001ce4 + 80001cf8: 00000000 .word 0x00000000 + 80001cfc: 8000ace1 .word 0x8000ace1 + 80001d00: 00000000 .word 0x00000000 + 80001d04: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=53 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x89da69f600200ae9 + 80001d08: 000cbb03 ld x22,0(x25) + 80001d0c: 008c8c93 addi x25,x25,8 + +0000000080001d10 : +Zbkb_rori_cg_cp_uimm_uimm53: + rori x7, x22, 53 # perform operation + 80001d10: 635b5393 rori x7,x22,0x35 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zbkb_rori_cg_cp_uimm_uimm53, Zbkb_rori_cg_cp_uimm_uimm53_str) + 80001d14: 0004b203 ld x4,0(x9) + 80001d18: 00720c63 beq x4,x7,80001d30 + 80001d1c: 5a4012ef jal x5,800032c0 + 80001d20: 80001d10 .word 0x80001d10 + 80001d24: 00000000 .word 0x00000000 + 80001d28: 8000ad19 .word 0x8000ad19 + 80001d2c: 00000000 .word 0x00000000 + 80001d30: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=54 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x18f46c24b7d97409 + 80001d34: 000cbb03 ld x22,0(x25) + 80001d38: 008c8c93 addi x25,x25,8 + +0000000080001d3c : +Zbkb_rori_cg_cp_uimm_uimm54: + rori x15, x22, 54 # perform operation + 80001d3c: 636b5793 rori x15,x22,0x36 + # Check if x15 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x15, Zbkb_rori_cg_cp_uimm_uimm54, Zbkb_rori_cg_cp_uimm_uimm54_str) + 80001d40: 0004b203 ld x4,0(x9) + 80001d44: 00f20c63 beq x4,x15,80001d5c + 80001d48: 578012ef jal x5,800032c0 + 80001d4c: 80001d3c .word 0x80001d3c + 80001d50: 00000000 .word 0x00000000 + 80001d54: 8000ad51 .word 0x8000ad51 + 80001d58: 00000000 .word 0x00000000 + 80001d5c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=55 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x63d16d05e8f0dd35 + 80001d60: 000cb383 ld x7,0(x25) + 80001d64: 008c8c93 addi x25,x25,8 + +0000000080001d68 : +Zbkb_rori_cg_cp_uimm_uimm55: + rori x20, x7, 55 # perform operation + 80001d68: 6373da13 rori x20,x7,0x37 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkb_rori_cg_cp_uimm_uimm55, Zbkb_rori_cg_cp_uimm_uimm55_str) + 80001d6c: 0004b203 ld x4,0(x9) + 80001d70: 01420c63 beq x4,x20,80001d88 + 80001d74: 54c012ef jal x5,800032c0 + 80001d78: 80001d68 .word 0x80001d68 + 80001d7c: 00000000 .word 0x00000000 + 80001d80: 8000ad89 .word 0x8000ad89 + 80001d84: 00000000 .word 0x00000000 + 80001d88: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=56 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x84a7bc11c9a72a55 + 80001d8c: 000cb603 ld x12,0(x25) + 80001d90: 008c8c93 addi x25,x25,8 + +0000000080001d94 : +Zbkb_rori_cg_cp_uimm_uimm56: + rori x30, x12, 56 # perform operation + 80001d94: 63865f13 rori x30,x12,0x38 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkb_rori_cg_cp_uimm_uimm56, Zbkb_rori_cg_cp_uimm_uimm56_str) + 80001d98: 0004b203 ld x4,0(x9) + 80001d9c: 01e20c63 beq x4,x30,80001db4 + 80001da0: 520012ef jal x5,800032c0 + 80001da4: 80001d94 .word 0x80001d94 + 80001da8: 00000000 .word 0x00000000 + 80001dac: 8000adc1 .word 0x8000adc1 + 80001db0: 00000000 .word 0x00000000 + 80001db4: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=57 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xbd8d7c82cc89a3f9 + 80001db8: 000cba03 ld x20,0(x25) + 80001dbc: 008c8c93 addi x25,x25,8 + +0000000080001dc0 : +Zbkb_rori_cg_cp_uimm_uimm57: + rori x16, x20, 57 # perform operation + 80001dc0: 639a5813 rori x16,x20,0x39 + # Check if x16 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x16, Zbkb_rori_cg_cp_uimm_uimm57, Zbkb_rori_cg_cp_uimm_uimm57_str) + 80001dc4: 0004b203 ld x4,0(x9) + 80001dc8: 01020c63 beq x4,x16,80001de0 + 80001dcc: 4f4012ef jal x5,800032c0 + 80001dd0: 80001dc0 .word 0x80001dc0 + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 8000adf9 .word 0x8000adf9 + 80001ddc: 00000000 .word 0x00000000 + 80001de0: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=58 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x97741d73e9b37abc + 80001de4: 000cbf03 ld x30,0(x25) + 80001de8: 008c8c93 addi x25,x25,8 + +0000000080001dec : +Zbkb_rori_cg_cp_uimm_uimm58: + rori x0, x30, 58 # perform operation + 80001dec: 63af5013 rori x0,x30,0x3a + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkb_rori_cg_cp_uimm_uimm58, Zbkb_rori_cg_cp_uimm_uimm58_str) + 80001df0: 0004b203 ld x4,0(x9) + 80001df4: 00020c63 beq x4,x0,80001e0c + 80001df8: 4c8012ef jal x5,800032c0 + 80001dfc: 80001dec .word 0x80001dec + 80001e00: 00000000 .word 0x00000000 + 80001e04: 8000ae31 .word 0x8000ae31 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=59 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xf4c5756cb707fad3 + 80001e10: 000cbc03 ld x24,0(x25) + 80001e14: 008c8c93 addi x25,x25,8 + +0000000080001e18 : +Zbkb_rori_cg_cp_uimm_uimm59: + rori x2, x24, 59 # perform operation + 80001e18: 63bc5113 rori x2,x24,0x3b + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkb_rori_cg_cp_uimm_uimm59, Zbkb_rori_cg_cp_uimm_uimm59_str) + 80001e1c: 0004b203 ld x4,0(x9) + 80001e20: 00220c63 beq x4,x2,80001e38 + 80001e24: 49c012ef jal x5,800032c0 + 80001e28: 80001e18 .word 0x80001e18 + 80001e2c: 00000000 .word 0x00000000 + 80001e30: 8000ae69 .word 0x8000ae69 + 80001e34: 00000000 .word 0x00000000 + 80001e38: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=60 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x3b9851df00b295ee + 80001e3c: 000cb883 ld x17,0(x25) + 80001e40: 008c8c93 addi x25,x25,8 + +0000000080001e44 : +Zbkb_rori_cg_cp_uimm_uimm60: + rori x1, x17, 60 # perform operation + 80001e44: 63c8d093 rori x1,x17,0x3c + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkb_rori_cg_cp_uimm_uimm60, Zbkb_rori_cg_cp_uimm_uimm60_str) + 80001e48: 0004b203 ld x4,0(x9) + 80001e4c: 00120c63 beq x4,x1,80001e64 + 80001e50: 470012ef jal x5,800032c0 + 80001e54: 80001e44 .word 0x80001e44 + 80001e58: 00000000 .word 0x00000000 + 80001e5c: 8000aea1 .word 0x8000aea1 + 80001e60: 00000000 .word 0x00000000 + 80001e64: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=61 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xc40f4772231c37b4 + 80001e68: 000cbe83 ld x29,0(x25) + 80001e6c: 008c8c93 addi x25,x25,8 + +0000000080001e70 : +Zbkb_rori_cg_cp_uimm_uimm61: + rori x12, x29, 61 # perform operation + 80001e70: 63ded613 rori x12,x29,0x3d + # Check if x12 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x12, Zbkb_rori_cg_cp_uimm_uimm61, Zbkb_rori_cg_cp_uimm_uimm61_str) + 80001e74: 0004b203 ld x4,0(x9) + 80001e78: 00c20c63 beq x4,x12,80001e90 + 80001e7c: 444012ef jal x5,800032c0 + 80001e80: 80001e70 .word 0x80001e70 + 80001e84: 00000000 .word 0x00000000 + 80001e88: 8000aed9 .word 0x8000aed9 + 80001e8c: 00000000 .word 0x00000000 + 80001e90: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=62 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0xb15f3e78d7be0e15 + 80001e94: 000cb503 ld x10,0(x25) + 80001e98: 008c8c93 addi x25,x25,8 + +0000000080001e9c : +Zbkb_rori_cg_cp_uimm_uimm62: + rori x6, x10, 62 # perform operation + 80001e9c: 63e55313 rori x6,x10,0x3e + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkb_rori_cg_cp_uimm_uimm62, Zbkb_rori_cg_cp_uimm_uimm62_str) + 80001ea0: 0004b203 ld x4,0(x9) + 80001ea4: 00620c63 beq x4,x6,80001ebc + 80001ea8: 418012ef jal x5,800032c0 + 80001eac: 80001e9c .word 0x80001e9c + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 8000af11 .word 0x8000af11 + 80001eb8: 00000000 .word 0x00000000 + 80001ebc: 00848493 addi x9,x9,8 + +# Testcase cp_uimm: imm=63 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x6cf1b194241b42ed + 80001ec0: 000cb603 ld x12,0(x25) + 80001ec4: 008c8c93 addi x25,x25,8 + +0000000080001ec8 : +Zbkb_rori_cg_cp_uimm_uimm63: + rori x29, x12, 63 # perform operation + 80001ec8: 63f65e93 rori x29,x12,0x3f + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkb_rori_cg_cp_uimm_uimm63, Zbkb_rori_cg_cp_uimm_uimm63_str) + 80001ecc: 0004b203 ld x4,0(x9) + 80001ed0: 01d20c63 beq x4,x29,80001ee8 + 80001ed4: 3ec012ef jal x5,800032c0 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 8000af49 .word 0x8000af49 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 00848493 addi x9,x9,8 + + mv x2, x9 # restore signature pointer to default register for teardown + 80001eec: 00048113 addi x2,x9,0 + +0000000080001ef0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80001ef0: 00000513 addi x10,x0,0 + 80001ef4: 00000073 ecall + 80001ef8: fff00513 addi x10,x0,-1 + 80001efc: 25800413 addi x8,x0,600 + +0000000080001f00 : + 80001f00: 34002373 csrrs x6,mscratch,x0 + +0000000080001f04 : + 80001f04: 2b833383 ld x7,696(x6) + +0000000080001f08 : + 80001f08: 2a033383 ld x7,672(x6) + +0000000080001f0c : + 80001f0c: 2d033483 ld x9,720(x6) + 80001f10: 34049073 csrrw x0,mscratch,x9 + +0000000080001f14 : + 80001f14: 2c833483 ld x9,712(x6) + 80001f18: 305493f3 csrrw x7,mtvec,x9 + 80001f1c: ffc4f493 andi x9,x9,-4 + 80001f20: ffc3f393 andi x7,x7,-4 + 80001f24: 00749e63 bne x9,x7,80001f40 + +0000000080001f28 : + 80001f28: 00030493 addi x9,x6,0 + +0000000080001f2c : + 80001f2c: 0004a783 lw x15,0(x9) + 80001f30: 00f3a023 sw x15,0(x7) + 80001f34: 00438393 addi x7,x7,4 + 80001f38: 00448493 addi x9,x9,4 + 80001f3c: fe83c8e3 blt x7,x8,80001f2c + 80001f40: 0000100f fence.i + +0000000080001f44 : + 80001f44: 00000013 addi x0,x0,0 + 80001f48: 00000013 addi x0,x0,0 + 80001f4c: 00000013 addi x0,x0,0 + 80001f50: 00000013 addi x0,x0,0 + 80001f54: 00000013 addi x0,x0,0 + 80001f58: 00000013 addi x0,x0,0 + 80001f5c: 00000013 addi x0,x0,0 + 80001f60: 00000497 auipc x9,0x0 + 80001f64: 2b048493 addi x9,x9,688 # 80002210 + 80001f68: 00000013 addi x0,x0,0 + 80001f6c: 00000013 addi x0,x0,0 + 80001f70: 00000013 addi x0,x0,0 + 80001f74: 00000013 addi x0,x0,0 + 80001f78: 00000013 addi x0,x0,0 + 80001f7c: 00000013 addi x0,x0,0 + 80001f80: 10e49863 bne x9,x14,80002090 + 80001f84: 00000013 addi x0,x0,0 + 80001f88: 00000013 addi x0,x0,0 + 80001f8c: 00000013 addi x0,x0,0 + 80001f90: 00000013 addi x0,x0,0 + 80001f94: 00000013 addi x0,x0,0 + 80001f98: 00000013 addi x0,x0,0 + 80001f9c: 00000013 addi x0,x0,0 + 80001fa0: 00009517 auipc x10,0x9 + 80001fa4: 70e50513 addi x10,x10,1806 # 8000b6ae + 80001fa8: 00000013 addi x0,x0,0 + 80001fac: 00000013 addi x0,x0,0 + 80001fb0: 00000013 addi x0,x0,0 + 80001fb4: 00000013 addi x0,x0,0 + 80001fb8: 00000013 addi x0,x0,0 + 80001fbc: 00000013 addi x0,x0,0 + 80001fc0: 00029097 auipc x1,0x29 + 80001fc4: 5e4080e7 jalr x1,1508(x1) # 8002b5a4 + 80001fc8: 00000013 addi x0,x0,0 + 80001fcc: 00000013 addi x0,x0,0 + 80001fd0: 00000013 addi x0,x0,0 + 80001fd4: 00000013 addi x0,x0,0 + 80001fd8: 00000013 addi x0,x0,0 + 80001fdc: 00000013 addi x0,x0,0 + 80001fe0: 00009517 auipc x10,0x9 + 80001fe4: 70750513 addi x10,x10,1799 # 8000b6e7 + 80001fe8: 00000013 addi x0,x0,0 + 80001fec: 00000013 addi x0,x0,0 + 80001ff0: 00000013 addi x0,x0,0 + 80001ff4: 00000013 addi x0,x0,0 + 80001ff8: 00000013 addi x0,x0,0 + 80001ffc: 00000013 addi x0,x0,0 + 80002000: 00029097 auipc x1,0x29 + 80002004: 5a4080e7 jalr x1,1444(x1) # 8002b5a4 + 80002008: 00000013 addi x0,x0,0 + 8000200c: 00000013 addi x0,x0,0 + 80002010: 00000013 addi x0,x0,0 + 80002014: 00000013 addi x0,x0,0 + 80002018: 00000013 addi x0,x0,0 + 8000201c: 00000013 addi x0,x0,0 + 80002020: 00009517 auipc x10,0x9 + 80002024: 72750513 addi x10,x10,1831 # 8000b747 + 80002028: 00000013 addi x0,x0,0 + 8000202c: 00000013 addi x0,x0,0 + 80002030: 00000013 addi x0,x0,0 + 80002034: 00000013 addi x0,x0,0 + 80002038: 00000013 addi x0,x0,0 + 8000203c: 00000013 addi x0,x0,0 + 80002040: 00029097 auipc x1,0x29 + 80002044: 564080e7 jalr x1,1380(x1) # 8002b5a4 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 0000a517 auipc x10,0xa + 80002064: 29250513 addi x10,x10,658 # 8000c2f2 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 00029097 auipc x1,0x29 + 80002084: 524080e7 jalr x1,1316(x1) # 8002b5a4 + 80002088: 00029097 auipc x1,0x29 + 8000208c: 57c080e7 jalr x1,1404(x1) # 8002b604 + +0000000080002090 : + 80002090: 00000013 addi x0,x0,0 + 80002094: 00000013 addi x0,x0,0 + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00006317 auipc x6,0x6 + 800020a4: 30830313 addi x6,x6,776 # 800083a8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 00033303 ld x6,0(x6) + 800020c4: 00000013 addi x0,x0,0 + 800020c8: 00000013 addi x0,x0,0 + 800020cc: 00000013 addi x0,x0,0 + 800020d0: 00000013 addi x0,x0,0 + 800020d4: 00000013 addi x0,x0,0 + 800020d8: 00000013 addi x0,x0,0 + 800020dc: 00000013 addi x0,x0,0 + 800020e0: 0000b397 auipc x7,0xb + 800020e4: 28038393 addi x7,x7,640 # 8000d360 + 800020e8: 00000013 addi x0,x0,0 + 800020ec: 00000013 addi x0,x0,0 + 800020f0: 00000013 addi x0,x0,0 + 800020f4: 00000013 addi x0,x0,0 + 800020f8: 00000013 addi x0,x0,0 + 800020fc: 00000013 addi x0,x0,0 + 80002100: 40730333 sub x6,x6,x7 + 80002104: 00000013 addi x0,x0,0 + 80002108: 00000013 addi x0,x0,0 + 8000210c: 00000013 addi x0,x0,0 + 80002110: 00000013 addi x0,x0,0 + 80002114: 00000013 addi x0,x0,0 + 80002118: 00000013 addi x0,x0,0 + 8000211c: 00000013 addi x0,x0,0 + 80002120: 0000b417 auipc x8,0xb + 80002124: 23040413 addi x8,x8,560 # 8000d350 + 80002128: 00000013 addi x0,x0,0 + 8000212c: 00000013 addi x0,x0,0 + 80002130: 00000013 addi x0,x0,0 + 80002134: 00000013 addi x0,x0,0 + 80002138: 00000013 addi x0,x0,0 + 8000213c: 00000013 addi x0,x0,0 + 80002140: 00043203 ld x4,0(x8) + 80002144: 00620c63 beq x4,x6,8000215c + 80002148: 1e0013ef jal x7,80003328 + 8000214c: 80002090 .word 0x80002090 + 80002150: 00000000 .word 0x00000000 + 80002154: 8000b89b .word 0x8000b89b + 80002158: 00000000 .word 0x00000000 + +000000008000215c : + 8000215c: 000004b7 lui x9,0x0 + 80002160: 00048493 addi x9,x9,0 # 0 + 80002164: 00b49493 slli x9,x9,0xb + 80002168: 5d648493 addi x9,x9,1494 + 8000216c: 00b49493 slli x9,x9,0xb + 80002170: 43748493 addi x9,x9,1079 + 80002174: 00a49493 slli x9,x9,0xa + 80002178: 2ad48493 addi x9,x9,685 + 8000217c: 00e49e63 bne x9,x14,80002198 + 80002180: 1a8013ef jal x7,80003328 + 80002184: 80002244 .word 0x80002244 + 80002188: 00000000 .word 0x00000000 + 8000218c: 8000b709 .word 0x8000b709 + 80002190: 00000000 .word 0x00000000 + 80002194: 00000341 .word 0x00000341 + +0000000080002198 : + 80002198: 00000013 addi x0,x0,0 + 8000219c: 00000013 addi x0,x0,0 + 800021a0: 00009517 auipc x10,0x9 + 800021a4: 4d450513 addi x10,x10,1236 # 8000b674 + 800021a8: 00000013 addi x0,x0,0 + 800021ac: 00000013 addi x0,x0,0 + 800021b0: 00000013 addi x0,x0,0 + 800021b4: 00000013 addi x0,x0,0 + 800021b8: 00000013 addi x0,x0,0 + 800021bc: 00000013 addi x0,x0,0 + 800021c0: 00029097 auipc x1,0x29 + 800021c4: 3e4080e7 jalr x1,996(x1) # 8002b5a4 + 800021c8: 00029097 auipc x1,0x29 + 800021cc: 41c080e7 jalr x1,1052(x1) # 8002b5e4 + +00000000800021d0 : + 800021d0: 00000013 addi x0,x0,0 + 800021d4: 00000013 addi x0,x0,0 + 800021d8: 00000013 addi x0,x0,0 + 800021dc: 00000013 addi x0,x0,0 + 800021e0: 00009517 auipc x10,0x9 + 800021e4: 4ce50513 addi x10,x10,1230 # 8000b6ae + 800021e8: 00000013 addi x0,x0,0 + 800021ec: 00000013 addi x0,x0,0 + 800021f0: 00000013 addi x0,x0,0 + 800021f4: 00000013 addi x0,x0,0 + 800021f8: 00000013 addi x0,x0,0 + 800021fc: 00000013 addi x0,x0,0 + 80002200: 00029097 auipc x1,0x29 + 80002204: 3a4080e7 jalr x1,932(x1) # 8002b5a4 + 80002208: 00029097 auipc x1,0x29 + 8000220c: 3fc080e7 jalr x1,1020(x1) # 8002b604 + +0000000080002210 : + 80002210: 00000013 addi x0,x0,0 + 80002214: 00000013 addi x0,x0,0 + 80002218: 00000013 addi x0,x0,0 + 8000221c: 00000013 addi x0,x0,0 + 80002220: 00000717 auipc x14,0x0 + 80002224: ff070713 addi x14,x14,-16 # 80002210 + 80002228: 00000013 addi x0,x0,0 + 8000222c: 00000013 addi x0,x0,0 + 80002230: 00000013 addi x0,x0,0 + 80002234: 00000013 addi x0,x0,0 + 80002238: 00000013 addi x0,x0,0 + 8000223c: 00000013 addi x0,x0,0 + 80002240: cb1ff06f jal x0,80001ef0 + +0000000080002244 : + 80002244: 00000737 lui x14,0x0 + 80002248: 00070713 addi x14,x14,0 # 0 + 8000224c: 00b71713 slli x14,x14,0xb + 80002250: 5d670713 addi x14,x14,1494 + 80002254: 00b71713 slli x14,x14,0xb + 80002258: 43770713 addi x14,x14,1079 + 8000225c: 00a71713 slli x14,x14,0xa + 80002260: 2ad70713 addi x14,x14,685 + 80002264: c8dff06f jal x0,80001ef0 + 80002268: 00000013 addi x0,x0,0 + 8000226c: 00000013 addi x0,x0,0 + 80002270: 00000013 addi x0,x0,0 + 80002274: 00000013 addi x0,x0,0 + 80002278: 00000013 addi x0,x0,0 + 8000227c: 00000013 addi x0,x0,0 + +0000000080002280 : + 80002280: 1000006f jal x0,80002380 + 80002284: 1080006f jal x0,8000238c + 80002288: 1100006f jal x0,80002398 + 8000228c: 1180006f jal x0,800023a4 + 80002290: 1200006f jal x0,800023b0 + 80002294: 1280006f jal x0,800023bc + 80002298: 1300006f jal x0,800023c8 + 8000229c: 1380006f jal x0,800023d4 + 800022a0: 1400006f jal x0,800023e0 + 800022a4: 1480006f jal x0,800023ec + 800022a8: 1500006f jal x0,800023f8 + 800022ac: 1580006f jal x0,80002404 + 800022b0: 1600006f jal x0,80002410 + 800022b4: 1680006f jal x0,8000241c + 800022b8: 1700006f jal x0,80002428 + 800022bc: 1780006f jal x0,80002434 + 800022c0: 1800006f jal x0,80002440 + 800022c4: 1880006f jal x0,8000244c + 800022c8: 1900006f jal x0,80002458 + 800022cc: 1980006f jal x0,80002464 + 800022d0: 1a00006f jal x0,80002470 + 800022d4: 1a80006f jal x0,8000247c + 800022d8: 1b00006f jal x0,80002488 + 800022dc: 1b80006f jal x0,80002494 + 800022e0: 1c00006f jal x0,800024a0 + 800022e4: 1bc0006f jal x0,800024a0 + 800022e8: 1b80006f jal x0,800024a0 + 800022ec: 1b40006f jal x0,800024a0 + 800022f0: 1b00006f jal x0,800024a0 + 800022f4: 1ac0006f jal x0,800024a0 + 800022f8: 1a80006f jal x0,800024a0 + 800022fc: 1a40006f jal x0,800024a0 + 80002300: 1a00006f jal x0,800024a0 + 80002304: 19c0006f jal x0,800024a0 + 80002308: 1980006f jal x0,800024a0 + 8000230c: 1940006f jal x0,800024a0 + 80002310: 1900006f jal x0,800024a0 + 80002314: 18c0006f jal x0,800024a0 + 80002318: 1880006f jal x0,800024a0 + 8000231c: 1840006f jal x0,800024a0 + 80002320: 1800006f jal x0,800024a0 + 80002324: 17c0006f jal x0,800024a0 + 80002328: 1780006f jal x0,800024a0 + 8000232c: 1740006f jal x0,800024a0 + 80002330: 1700006f jal x0,800024a0 + 80002334: 16c0006f jal x0,800024a0 + 80002338: 1680006f jal x0,800024a0 + 8000233c: 1640006f jal x0,800024a0 + 80002340: 1600006f jal x0,800024a0 + 80002344: 15c0006f jal x0,800024a0 + 80002348: 1580006f jal x0,800024a0 + 8000234c: 1540006f jal x0,800024a0 + 80002350: 1500006f jal x0,800024a0 + 80002354: 14c0006f jal x0,800024a0 + 80002358: 1480006f jal x0,800024a0 + 8000235c: 1440006f jal x0,800024a0 + 80002360: 1400006f jal x0,800024a0 + 80002364: 13c0006f jal x0,800024a0 + 80002368: 1380006f jal x0,800024a0 + 8000236c: 1340006f jal x0,800024a0 + 80002370: 1300006f jal x0,800024a0 + 80002374: 12c0006f jal x0,800024a0 + 80002378: 1280006f jal x0,800024a0 + 8000237c: 1240006f jal x0,800024a0 + +0000000080002380 : + 80002380: 34011173 csrrw x2,mscratch,x2 + 80002384: 30f13423 sd x15,776(x2) + 80002388: 13c007ef jal x15,800024c4 + 8000238c: 34011173 csrrw x2,mscratch,x2 + 80002390: 30f13423 sd x15,776(x2) + 80002394: 130007ef jal x15,800024c4 + 80002398: 34011173 csrrw x2,mscratch,x2 + 8000239c: 30f13423 sd x15,776(x2) + 800023a0: 124007ef jal x15,800024c4 + 800023a4: 34011173 csrrw x2,mscratch,x2 + 800023a8: 30f13423 sd x15,776(x2) + 800023ac: 118007ef jal x15,800024c4 + 800023b0: 34011173 csrrw x2,mscratch,x2 + 800023b4: 30f13423 sd x15,776(x2) + 800023b8: 10c007ef jal x15,800024c4 + 800023bc: 34011173 csrrw x2,mscratch,x2 + 800023c0: 30f13423 sd x15,776(x2) + 800023c4: 100007ef jal x15,800024c4 + 800023c8: 34011173 csrrw x2,mscratch,x2 + 800023cc: 30f13423 sd x15,776(x2) + 800023d0: 0f4007ef jal x15,800024c4 + 800023d4: 34011173 csrrw x2,mscratch,x2 + 800023d8: 30f13423 sd x15,776(x2) + 800023dc: 0e8007ef jal x15,800024c4 + 800023e0: 34011173 csrrw x2,mscratch,x2 + 800023e4: 30f13423 sd x15,776(x2) + 800023e8: 0dc007ef jal x15,800024c4 + 800023ec: 34011173 csrrw x2,mscratch,x2 + 800023f0: 30f13423 sd x15,776(x2) + 800023f4: 0d0007ef jal x15,800024c4 + 800023f8: 34011173 csrrw x2,mscratch,x2 + 800023fc: 30f13423 sd x15,776(x2) + 80002400: 0c4007ef jal x15,800024c4 + 80002404: 34011173 csrrw x2,mscratch,x2 + 80002408: 30f13423 sd x15,776(x2) + 8000240c: 0b8007ef jal x15,800024c4 + 80002410: 34011173 csrrw x2,mscratch,x2 + 80002414: 30f13423 sd x15,776(x2) + 80002418: 0ac007ef jal x15,800024c4 + 8000241c: 34011173 csrrw x2,mscratch,x2 + 80002420: 30f13423 sd x15,776(x2) + 80002424: 0a0007ef jal x15,800024c4 + 80002428: 34011173 csrrw x2,mscratch,x2 + 8000242c: 30f13423 sd x15,776(x2) + 80002430: 094007ef jal x15,800024c4 + 80002434: 34011173 csrrw x2,mscratch,x2 + 80002438: 30f13423 sd x15,776(x2) + 8000243c: 088007ef jal x15,800024c4 + 80002440: 34011173 csrrw x2,mscratch,x2 + 80002444: 30f13423 sd x15,776(x2) + 80002448: 07c007ef jal x15,800024c4 + 8000244c: 34011173 csrrw x2,mscratch,x2 + 80002450: 30f13423 sd x15,776(x2) + 80002454: 070007ef jal x15,800024c4 + 80002458: 34011173 csrrw x2,mscratch,x2 + 8000245c: 30f13423 sd x15,776(x2) + 80002460: 064007ef jal x15,800024c4 + 80002464: 34011173 csrrw x2,mscratch,x2 + 80002468: 30f13423 sd x15,776(x2) + 8000246c: 058007ef jal x15,800024c4 + 80002470: 34011173 csrrw x2,mscratch,x2 + 80002474: 30f13423 sd x15,776(x2) + 80002478: 04c007ef jal x15,800024c4 + 8000247c: 34011173 csrrw x2,mscratch,x2 + 80002480: 30f13423 sd x15,776(x2) + 80002484: 040007ef jal x15,800024c4 + 80002488: 34011173 csrrw x2,mscratch,x2 + 8000248c: 30f13423 sd x15,776(x2) + 80002490: 034007ef jal x15,800024c4 + 80002494: 34011173 csrrw x2,mscratch,x2 + 80002498: 30f13423 sd x15,776(x2) + 8000249c: 028007ef jal x15,800024c4 + +00000000800024a0 : + 800024a0: 00000317 auipc x6,0x0 + 800024a4: aa430313 addi x6,x6,-1372 # 80001f44 + 800024a8: 00000013 addi x0,x0,0 + 800024ac: 00000013 addi x0,x0,0 + 800024b0: 00000013 addi x0,x0,0 + 800024b4: 00000013 addi x0,x0,0 + 800024b8: 00000013 addi x0,x0,0 + 800024bc: 00000013 addi x0,x0,0 + 800024c0: 00030067 jalr x0,0(x6) + +00000000800024c4 : + 800024c4: 30e13023 sd x14,768(x2) + 800024c8: 34011773 csrrw x14,mscratch,x2 + 800024cc: 30e13823 sd x14,784(x2) + 800024d0: 2b013703 ld x14,688(x2) + 800024d4: 00070067 jalr x0,0(x14) + +00000000800024d8 : + 800024d8: 2e913c23 sd x9,760(x2) + 800024dc: 2e813823 sd x8,752(x2) + 800024e0: 2e713423 sd x7,744(x2) + 800024e4: 2e613023 sd x6,736(x2) + 800024e8: 00000013 addi x0,x0,0 + 800024ec: 00000013 addi x0,x0,0 + 800024f0: 00000013 addi x0,x0,0 + 800024f4: 00000013 addi x0,x0,0 + 800024f8: 00000013 addi x0,x0,0 + 800024fc: 00000013 addi x0,x0,0 + 80002500: 00006317 auipc x6,0x6 + 80002504: c0830313 addi x6,x6,-1016 # 80008108 + 80002508: 00000013 addi x0,x0,0 + 8000250c: 00000013 addi x0,x0,0 + 80002510: 00000013 addi x0,x0,0 + 80002514: 00000013 addi x0,x0,0 + 80002518: 00000013 addi x0,x0,0 + 8000251c: 00000013 addi x0,x0,0 + 80002520: 00033383 ld x7,0(x6) + 80002524: 00138393 addi x7,x7,1 + 80002528: 00733023 sd x7,0(x6) + 8000252c: 34202773 csrrs x14,mcause,x0 + +0000000080002530 : + 80002530: fff00493 addi x9,x0,-1 + 80002534: 00d4d493 srli x9,x9,0xd + 80002538: 00c49493 slli x9,x9,0xc + 8000253c: fff4c493 xori x9,x9,-1 + 80002540: 00e4f4b3 and x9,x9,x14 + +0000000080002544 : + 80002544: ffe48413 addi x8,x9,-2 + 80002548: 00041663 bne x8,x0,80002554 + +000000008000254c : + 8000254c: 500502e3 beq x10,x0,80003250 + 80002550: 5b40006f jal x0,80002b04 + +0000000080002554 : + 80002554: ff848413 addi x8,x9,-8 + 80002558: 00245413 srli x8,x8,0x2 + 8000255c: 5a041463 bne x8,x0,80002b04 + +0000000080002560 : + 80002560: 4e0508e3 beq x10,x0,80003250 + +0000000080002564 : + 80002564: fff50493 addi x9,x10,-1 + 80002568: 00500393 addi x7,x0,5 + 8000256c: 0274e063 bltu x9,x7,8000258c + 80002570: 07300393 addi x7,x0,115 + 80002574: 00750463 beq x10,x7,8000257c + 80002578: 08c0006f jal x0,80002604 + +000000008000257c : + 8000257c: 34102573 csrrs x10,mepc,x0 + 80002580: 00450413 addi x8,x10,4 + 80002584: 34141073 csrrw x0,mepc,x8 + 80002588: 0310006f jal x0,80002db8 + +000000008000258c : + 8000258c: 341024f3 csrrs x9,mepc,x0 + 80002590: 00448493 addi x9,x9,4 + 80002594: 34149073 csrrw x0,mepc,x9 + 80002598: 00100393 addi x7,x0,1 + 8000259c: 00750e63 beq x10,x7,800025b8 + 800025a0: 00200393 addi x7,x0,2 + 800025a4: 02750463 beq x10,x7,800025cc + 800025a8: 00300393 addi x7,x0,3 + 800025ac: 04750063 beq x10,x7,800025ec + 800025b0: fff00513 addi x10,x0,-1 + 800025b4: 0050006f jal x0,80002db8 + +00000000800025b8 : + 800025b8: fff00493 addi x9,x0,-1 + 800025bc: 03e4d493 srli x9,x9,0x3e + 800025c0: 00b49493 slli x9,x9,0xb + 800025c4: 3004a073 csrrs x0,mstatus,x9 + 800025c8: 7f00006f jal x0,80002db8 + +00000000800025cc : + 800025cc: fff00493 addi x9,x0,-1 + 800025d0: 03e4d493 srli x9,x9,0x3e + 800025d4: 00b49493 slli x9,x9,0xb + 800025d8: 3004b073 csrrc x0,mstatus,x9 + 800025dc: 00100493 addi x9,x0,1 + 800025e0: 00b49493 slli x9,x9,0xb + 800025e4: 3004a073 csrrs x0,mstatus,x9 + 800025e8: 7d00006f jal x0,80002db8 + +00000000800025ec : + 800025ec: fff00493 addi x9,x0,-1 + 800025f0: 03e4d493 srli x9,x9,0x3e + 800025f4: 00b49493 slli x9,x9,0xb + 800025f8: 3004b073 csrrc x0,mstatus,x9 + 800025fc: 7bc0006f jal x0,80002db8 + +0000000080002600 : + 80002600: 00000013 addi x0,x0,0 + +0000000080002604 : + 80002604: 00000013 addi x0,x0,0 + 80002608: 00000013 addi x0,x0,0 + 8000260c: 00000013 addi x0,x0,0 + 80002610: 00000013 addi x0,x0,0 + 80002614: 00000013 addi x0,x0,0 + 80002618: 00000013 addi x0,x0,0 + 8000261c: 00000013 addi x0,x0,0 + 80002620: 00000397 auipc x7,0x0 + 80002624: 17038393 addi x7,x7,368 # 80002790 + 80002628: 00000013 addi x0,x0,0 + 8000262c: 00000013 addi x0,x0,0 + 80002630: 00000013 addi x0,x0,0 + 80002634: 00000013 addi x0,x0,0 + 80002638: 00000013 addi x0,x0,0 + 8000263c: 00000013 addi x0,x0,0 + +0000000080002640 : + 80002640: 0003e403 lwu x8,0(x7) + 80002644: 00a40863 beq x8,x10,80002654 + 80002648: 04040863 beq x8,x0,80002698 + 8000264c: 00838393 addi x7,x7,8 + 80002650: ff1ff06f jal x0,80002640 + +0000000080002654 : + 80002654: 00008493 addi x9,x1,0 + 80002658: 00000013 addi x0,x0,0 + 8000265c: 00000013 addi x0,x0,0 + 80002660: 00000097 auipc x1,0x0 + 80002664: 02408093 addi x1,x1,36 # 80002684 + 80002668: 00000013 addi x0,x0,0 + 8000266c: 00000013 addi x0,x0,0 + 80002670: 00000013 addi x0,x0,0 + 80002674: 00000013 addi x0,x0,0 + 80002678: 00000013 addi x0,x0,0 + 8000267c: 00000013 addi x0,x0,0 + 80002680: 00038067 jalr x0,0(x7) + +0000000080002684 : + 80002684: 00048093 addi x1,x9,0 + 80002688: 34102473 csrrs x8,mepc,x0 + 8000268c: 00440413 addi x8,x8,4 + 80002690: 34141073 csrrw x0,mepc,x8 + 80002694: 7240006f jal x0,80002db8 + +0000000080002698 : + 80002698: 00050493 addi x9,x10,0 + 8000269c: 00000013 addi x0,x0,0 + 800026a0: 0000a517 auipc x10,0xa + 800026a4: 68950513 addi x10,x10,1673 # 8000cd29 + 800026a8: 00000013 addi x0,x0,0 + 800026ac: 00000013 addi x0,x0,0 + 800026b0: 00000013 addi x0,x0,0 + 800026b4: 00000013 addi x0,x0,0 + 800026b8: 00000013 addi x0,x0,0 + 800026bc: 00000013 addi x0,x0,0 + 800026c0: 00029097 auipc x1,0x29 + 800026c4: ee4080e7 jalr x1,-284(x1) # 8002b5a4 + 800026c8: 00048513 addi x10,x9,0 + 800026cc: 02000593 addi x11,x0,32 + 800026d0: 728020ef jal x1,80004df8 + 800026d4: 00000013 addi x0,x0,0 + 800026d8: 00000013 addi x0,x0,0 + 800026dc: 00000013 addi x0,x0,0 + 800026e0: 00009517 auipc x10,0x9 + 800026e4: a1850513 addi x10,x10,-1512 # 8000b0f8 + 800026e8: 00000013 addi x0,x0,0 + 800026ec: 00000013 addi x0,x0,0 + 800026f0: 00000013 addi x0,x0,0 + 800026f4: 00000013 addi x0,x0,0 + 800026f8: 00000013 addi x0,x0,0 + 800026fc: 00000013 addi x0,x0,0 + 80002700: 00029097 auipc x1,0x29 + 80002704: ea4080e7 jalr x1,-348(x1) # 8002b5a4 + 80002708: 00000013 addi x0,x0,0 + 8000270c: 00000013 addi x0,x0,0 + 80002710: 00000013 addi x0,x0,0 + 80002714: 00000013 addi x0,x0,0 + 80002718: 00000013 addi x0,x0,0 + 8000271c: 00000013 addi x0,x0,0 + 80002720: 00009517 auipc x10,0x9 + 80002724: 09050513 addi x10,x10,144 # 8000b7b0 + 80002728: 00000013 addi x0,x0,0 + 8000272c: 00000013 addi x0,x0,0 + 80002730: 00000013 addi x0,x0,0 + 80002734: 00000013 addi x0,x0,0 + 80002738: 00000013 addi x0,x0,0 + 8000273c: 00000013 addi x0,x0,0 + 80002740: 00029097 auipc x1,0x29 + 80002744: e64080e7 jalr x1,-412(x1) # 8002b5a4 + 80002748: 00000013 addi x0,x0,0 + 8000274c: 00000013 addi x0,x0,0 + 80002750: 00000013 addi x0,x0,0 + 80002754: 00000013 addi x0,x0,0 + 80002758: 00000013 addi x0,x0,0 + 8000275c: 00000013 addi x0,x0,0 + 80002760: 00009517 auipc x10,0x9 + 80002764: f4e50513 addi x10,x10,-178 # 8000b6ae + 80002768: 00000013 addi x0,x0,0 + 8000276c: 00000013 addi x0,x0,0 + 80002770: 00000013 addi x0,x0,0 + 80002774: 00000013 addi x0,x0,0 + 80002778: 00000013 addi x0,x0,0 + 8000277c: 00000013 addi x0,x0,0 + 80002780: 00029097 auipc x1,0x29 + 80002784: e24080e7 jalr x1,-476(x1) # 8002b5a4 + 80002788: 00029097 auipc x1,0x29 + 8000278c: e7c080e7 jalr x1,-388(x1) # 8002b604 + +0000000080002790 : + 80002790: 30002573 .word 0x30002573 + 80002794: 00008067 jalr x0,0(x1) + 80002798: 30059073 .word 0x30059073 + 8000279c: 00008067 jalr x0,0(x1) + 800027a0: 3005a073 .word 0x3005a073 + 800027a4: 00008067 jalr x0,0(x1) + 800027a8: 3005b073 .word 0x3005b073 + 800027ac: 00008067 jalr x0,0(x1) + 800027b0: 30402573 .word 0x30402573 + 800027b4: 00008067 jalr x0,0(x1) + 800027b8: 30459073 .word 0x30459073 + 800027bc: 00008067 jalr x0,0(x1) + 800027c0: 3045a073 .word 0x3045a073 + 800027c4: 00008067 jalr x0,0(x1) + 800027c8: 3045b073 .word 0x3045b073 + 800027cc: 00008067 jalr x0,0(x1) + 800027d0: 30602573 .word 0x30602573 + 800027d4: 00008067 jalr x0,0(x1) + 800027d8: 30659073 .word 0x30659073 + 800027dc: 00008067 jalr x0,0(x1) + 800027e0: 3065a073 .word 0x3065a073 + 800027e4: 00008067 jalr x0,0(x1) + 800027e8: 3065b073 .word 0x3065b073 + 800027ec: 00008067 jalr x0,0(x1) + 800027f0: 30a02573 .word 0x30a02573 + 800027f4: 00008067 jalr x0,0(x1) + 800027f8: 30a59073 .word 0x30a59073 + 800027fc: 00008067 jalr x0,0(x1) + 80002800: 30a5a073 .word 0x30a5a073 + 80002804: 00008067 jalr x0,0(x1) + 80002808: 30a5b073 .word 0x30a5b073 + 8000280c: 00008067 jalr x0,0(x1) + 80002810: 34402573 .word 0x34402573 + 80002814: 00008067 jalr x0,0(x1) + 80002818: 34459073 .word 0x34459073 + 8000281c: 00008067 jalr x0,0(x1) + 80002820: 3445a073 .word 0x3445a073 + 80002824: 00008067 jalr x0,0(x1) + 80002828: 3445b073 .word 0x3445b073 + 8000282c: 00008067 jalr x0,0(x1) + 80002830: 74702573 .word 0x74702573 + 80002834: 00008067 jalr x0,0(x1) + 80002838: 74759073 .word 0x74759073 + 8000283c: 00008067 jalr x0,0(x1) + 80002840: 7475a073 .word 0x7475a073 + 80002844: 00008067 jalr x0,0(x1) + 80002848: 7475b073 .word 0x7475b073 + 8000284c: 00008067 jalr x0,0(x1) + 80002850: 32002573 .word 0x32002573 + 80002854: 00008067 jalr x0,0(x1) + 80002858: 32059073 .word 0x32059073 + 8000285c: 00008067 jalr x0,0(x1) + 80002860: 3205a073 .word 0x3205a073 + 80002864: 00008067 jalr x0,0(x1) + 80002868: 3205b073 .word 0x3205b073 + 8000286c: 00008067 jalr x0,0(x1) + 80002870: b0002573 .word 0xb0002573 + 80002874: 00008067 jalr x0,0(x1) + 80002878: b0059073 .word 0xb0059073 + 8000287c: 00008067 jalr x0,0(x1) + 80002880: b005a073 .word 0xb005a073 + 80002884: 00008067 jalr x0,0(x1) + 80002888: b005b073 .word 0xb005b073 + 8000288c: 00008067 jalr x0,0(x1) + 80002890: b0202573 .word 0xb0202573 + 80002894: 00008067 jalr x0,0(x1) + 80002898: b0259073 .word 0xb0259073 + 8000289c: 00008067 jalr x0,0(x1) + 800028a0: b025a073 .word 0xb025a073 + 800028a4: 00008067 jalr x0,0(x1) + 800028a8: b025b073 .word 0xb025b073 + 800028ac: 00008067 jalr x0,0(x1) + 800028b0: 10002573 .word 0x10002573 + 800028b4: 00008067 jalr x0,0(x1) + 800028b8: 10059073 .word 0x10059073 + 800028bc: 00008067 jalr x0,0(x1) + 800028c0: 1005a073 .word 0x1005a073 + 800028c4: 00008067 jalr x0,0(x1) + 800028c8: 1005b073 .word 0x1005b073 + 800028cc: 00008067 jalr x0,0(x1) + 800028d0: 10402573 .word 0x10402573 + 800028d4: 00008067 jalr x0,0(x1) + 800028d8: 10459073 .word 0x10459073 + 800028dc: 00008067 jalr x0,0(x1) + 800028e0: 1045a073 .word 0x1045a073 + 800028e4: 00008067 jalr x0,0(x1) + 800028e8: 1045b073 .word 0x1045b073 + 800028ec: 00008067 jalr x0,0(x1) + 800028f0: 10602573 .word 0x10602573 + 800028f4: 00008067 jalr x0,0(x1) + 800028f8: 10659073 .word 0x10659073 + 800028fc: 00008067 jalr x0,0(x1) + 80002900: 1065a073 .word 0x1065a073 + 80002904: 00008067 jalr x0,0(x1) + 80002908: 1065b073 .word 0x1065b073 + 8000290c: 00008067 jalr x0,0(x1) + 80002910: 10a02573 .word 0x10a02573 + 80002914: 00008067 jalr x0,0(x1) + 80002918: 10a59073 .word 0x10a59073 + 8000291c: 00008067 jalr x0,0(x1) + 80002920: 10a5a073 .word 0x10a5a073 + 80002924: 00008067 jalr x0,0(x1) + 80002928: 10a5b073 .word 0x10a5b073 + 8000292c: 00008067 jalr x0,0(x1) + 80002930: 14402573 .word 0x14402573 + 80002934: 00008067 jalr x0,0(x1) + 80002938: 14459073 .word 0x14459073 + 8000293c: 00008067 jalr x0,0(x1) + 80002940: 1445a073 .word 0x1445a073 + 80002944: 00008067 jalr x0,0(x1) + 80002948: 1445b073 .word 0x1445b073 + 8000294c: 00008067 jalr x0,0(x1) + 80002950: 14d02573 .word 0x14d02573 + 80002954: 00008067 jalr x0,0(x1) + 80002958: 14d59073 .word 0x14d59073 + 8000295c: 00008067 jalr x0,0(x1) + 80002960: 14d5a073 .word 0x14d5a073 + 80002964: 00008067 jalr x0,0(x1) + 80002968: 14d5b073 .word 0x14d5b073 + 8000296c: 00008067 jalr x0,0(x1) + 80002970: 18002573 .word 0x18002573 + 80002974: 00008067 jalr x0,0(x1) + 80002978: 18059073 .word 0x18059073 + 8000297c: 00008067 jalr x0,0(x1) + 80002980: 1805a073 .word 0x1805a073 + 80002984: 00008067 jalr x0,0(x1) + 80002988: 1805b073 .word 0x1805b073 + 8000298c: 00008067 jalr x0,0(x1) + 80002990: 7a002573 .word 0x7a002573 + 80002994: 00008067 jalr x0,0(x1) + 80002998: 7a059073 .word 0x7a059073 + 8000299c: 00008067 jalr x0,0(x1) + 800029a0: 7a05a073 .word 0x7a05a073 + 800029a4: 00008067 jalr x0,0(x1) + 800029a8: 7a05b073 .word 0x7a05b073 + 800029ac: 00008067 jalr x0,0(x1) + 800029b0: 7a102573 .word 0x7a102573 + 800029b4: 00008067 jalr x0,0(x1) + 800029b8: 7a159073 .word 0x7a159073 + 800029bc: 00008067 jalr x0,0(x1) + 800029c0: 7a15a073 .word 0x7a15a073 + 800029c4: 00008067 jalr x0,0(x1) + 800029c8: 7a15b073 .word 0x7a15b073 + 800029cc: 00008067 jalr x0,0(x1) + 800029d0: 7a202573 .word 0x7a202573 + 800029d4: 00008067 jalr x0,0(x1) + 800029d8: 7a259073 .word 0x7a259073 + 800029dc: 00008067 jalr x0,0(x1) + 800029e0: 7a25a073 .word 0x7a25a073 + 800029e4: 00008067 jalr x0,0(x1) + 800029e8: 7a25b073 .word 0x7a25b073 + 800029ec: 00008067 jalr x0,0(x1) + 800029f0: 7a302573 .word 0x7a302573 + 800029f4: 00008067 jalr x0,0(x1) + 800029f8: 7a359073 .word 0x7a359073 + 800029fc: 00008067 jalr x0,0(x1) + 80002a00: 7a35a073 .word 0x7a35a073 + 80002a04: 00008067 jalr x0,0(x1) + 80002a08: 7a35b073 .word 0x7a35b073 + 80002a0c: 00008067 jalr x0,0(x1) + 80002a10: 7a402573 .word 0x7a402573 + 80002a14: 00008067 jalr x0,0(x1) + 80002a18: 7a459073 .word 0x7a459073 + 80002a1c: 00008067 jalr x0,0(x1) + 80002a20: 7a45a073 .word 0x7a45a073 + 80002a24: 00008067 jalr x0,0(x1) + 80002a28: 7a45b073 .word 0x7a45b073 + 80002a2c: 00008067 jalr x0,0(x1) + 80002a30: 7a502573 .word 0x7a502573 + 80002a34: 00008067 jalr x0,0(x1) + 80002a38: 7a559073 .word 0x7a559073 + 80002a3c: 00008067 jalr x0,0(x1) + 80002a40: 7a55a073 .word 0x7a55a073 + 80002a44: 00008067 jalr x0,0(x1) + 80002a48: 7a55b073 .word 0x7a55b073 + 80002a4c: 00008067 jalr x0,0(x1) + 80002a50: 7a802573 .word 0x7a802573 + 80002a54: 00008067 jalr x0,0(x1) + 80002a58: 7a859073 .word 0x7a859073 + 80002a5c: 00008067 jalr x0,0(x1) + 80002a60: 7a85a073 .word 0x7a85a073 + 80002a64: 00008067 jalr x0,0(x1) + 80002a68: 7a85b073 .word 0x7a85b073 + 80002a6c: 00008067 jalr x0,0(x1) + 80002a70: 7aa02573 .word 0x7aa02573 + 80002a74: 00008067 jalr x0,0(x1) + 80002a78: 7aa59073 .word 0x7aa59073 + 80002a7c: 00008067 jalr x0,0(x1) + 80002a80: 7aa5a073 .word 0x7aa5a073 + 80002a84: 00008067 jalr x0,0(x1) + 80002a88: 7aa5b073 .word 0x7aa5b073 + 80002a8c: 00008067 jalr x0,0(x1) + 80002a90: 5a802573 .word 0x5a802573 + 80002a94: 00008067 jalr x0,0(x1) + 80002a98: 5a859073 .word 0x5a859073 + 80002a9c: 00008067 jalr x0,0(x1) + 80002aa0: 5a85a073 .word 0x5a85a073 + 80002aa4: 00008067 jalr x0,0(x1) + 80002aa8: 5a85b073 .word 0x5a85b073 + 80002aac: 00008067 jalr x0,0(x1) + 80002ab0: 6a802573 .word 0x6a802573 + 80002ab4: 00008067 jalr x0,0(x1) + 80002ab8: 6a859073 .word 0x6a859073 + 80002abc: 00008067 jalr x0,0(x1) + 80002ac0: 6a85a073 .word 0x6a85a073 + 80002ac4: 00008067 jalr x0,0(x1) + 80002ac8: 6a85b073 .word 0x6a85b073 + 80002acc: 00008067 jalr x0,0(x1) + 80002ad0: 0005a503 lw x10,0(x11) + 80002ad4: 00008067 jalr x0,0(x1) + 80002ad8: 0045a503 lw x10,4(x11) + 80002adc: 00008067 jalr x0,0(x1) + 80002ae0: 00c5a023 sw x12,0(x11) + 80002ae4: 00008067 jalr x0,0(x1) + 80002ae8: 00c5a223 sw x12,4(x11) + 80002aec: 00008067 jalr x0,0(x1) + 80002af0: 0005b503 ld x10,0(x11) + 80002af4: 00008067 jalr x0,0(x1) + 80002af8: 00c5b023 sd x12,0(x11) + 80002afc: 00008067 jalr x0,0(x1) + 80002b00: 00000000 .word 0x00000000 + +0000000080002b04 : + 80002b04: 02000393 addi x7,x0,32 + 80002b08: 00075c63 bge x14,x0,80002b20 + +0000000080002b0c : + 80002b0c: 00171413 slli x8,x14,0x1 + 80002b10: ff240413 addi x8,x8,-14 + 80002b14: 00045663 bge x8,x0,80002b20 + 80002b18: 01800393 addi x7,x0,24 + 80002b1c: 0040006f jal x0,80002b20 + +0000000080002b20 : + 80002b20: ca810113 addi x2,x2,-856 + 80002b24: 5f013303 ld x6,1520(x2) + 80002b28: 007304b3 add x9,x6,x7 + 80002b2c: 5e913823 sd x9,1520(x2) + 80002b30: 5d013403 ld x8,1488(x2) + 80002b34: 40830333 sub x6,x6,x8 + 80002b38: 35810113 addi x2,x2,856 + 80002b3c: 27813403 ld x8,632(x2) + 80002b40: 00830333 add x6,x6,x8 + 80002b44: 34102473 csrrs x8,mepc,x0 + 80002b48: 00000013 addi x0,x0,0 + 80002b4c: 00000013 addi x0,x0,0 + 80002b50: 00000013 addi x0,x0,0 + 80002b54: 00000013 addi x0,x0,0 + 80002b58: 00000013 addi x0,x0,0 + 80002b5c: 00000013 addi x0,x0,0 + 80002b60: 00008497 auipc x9,0x8 + 80002b64: 57848493 addi x9,x9,1400 # 8000b0d8 + 80002b68: 00000013 addi x0,x0,0 + 80002b6c: 00000013 addi x0,x0,0 + 80002b70: 00000013 addi x0,x0,0 + 80002b74: 00000013 addi x0,x0,0 + 80002b78: 00000013 addi x0,x0,0 + 80002b7c: 00000013 addi x0,x0,0 + 80002b80: 0084b023 sd x8,0(x9) + 80002b84: 00e4b423 sd x14,8(x9) + 80002b88: 34302473 csrrs x8,mtval,x0 + 80002b8c: 0084b823 sd x8,16(x9) + 80002b90: 30002473 csrrs x8,mstatus,x0 + 80002b94: 0084bc23 sd x8,24(x9) + 80002b98: 00000013 addi x0,x0,0 + 80002b9c: 00000013 addi x0,x0,0 + 80002ba0: 00028417 auipc x8,0x28 + 80002ba4: c8840413 addi x8,x8,-888 # 8002a828 + 80002ba8: 00000013 addi x0,x0,0 + 80002bac: 00000013 addi x0,x0,0 + 80002bb0: 00000013 addi x0,x0,0 + 80002bb4: 00000013 addi x0,x0,0 + 80002bb8: 00000013 addi x0,x0,0 + 80002bbc: 00000013 addi x0,x0,0 + 80002bc0: 007304b3 add x9,x6,x7 + 80002bc4: e4946663 bltu x8,x9,80002210 + +0000000080002bc8 : + 80002bc8: 2c013403 ld x8,704(x2) + 80002bcc: 408787b3 sub x15,x15,x8 + 80002bd0: 00179493 slli x9,x15,0x1 + 80002bd4: 009787b3 add x15,x15,x9 + 80002bd8: 0057d793 srli x15,x15,0x5 + 80002bdc: 00679793 slli x15,x15,0x6 + 80002be0: 0077e7b3 or x15,x15,x7 + 80002be4: 00378793 addi x15,x15,3 + 80002be8: 02075a63 bge x14,x0,80002c1c + 80002bec: 00f00413 addi x8,x0,15 + 80002bf0: 00877433 and x8,x14,x8 + 80002bf4: 304024f3 csrrs x9,mie,x0 + 80002bf8: 0084d4b3 srl x9,x9,x8 + 80002bfc: 0014f493 andi x9,x9,1 + 80002c00: 00b49493 slli x9,x9,0xb + 80002c04: 0097e7b3 or x15,x15,x9 + 80002c08: 344024f3 csrrs x9,mip,x0 + 80002c0c: 0084d4b3 srl x9,x9,x8 + 80002c10: 0014f493 andi x9,x9,1 + 80002c14: 00c49493 slli x9,x9,0xc + 80002c18: 0097e7b3 or x15,x15,x9 + 80002c1c: 300023f3 csrrs x7,mstatus,x0 + 80002c20: 02f39393 slli x7,x7,0x2f + 80002c24: 0223d393 srli x7,x7,0x22 + 80002c28: 00000437 lui x8,0x0 + 80002c2c: 00040413 addi x8,x8,0 # 0 + 80002c30: 00b41413 slli x8,x8,0xb + 80002c34: 00140413 addi x8,x8,1 + 80002c38: 00b41413 slli x8,x8,0xb + 80002c3c: 06740413 addi x8,x8,103 + 80002c40: 00a41413 slli x8,x8,0xa + 80002c44: 3e540413 addi x8,x8,997 + 80002c48: fff44413 xori x8,x8,-1 + 80002c4c: 0083f433 and x8,x7,x8 + 80002c50: 0087e433 or x8,x15,x8 + 80002c54: 0204d493 srli x9,x9,0x20 + 80002c58: 1c04f493 andi x9,x9,448 + 80002c5c: 00849493 slli x9,x9,0x8 + 80002c60: 00946433 or x8,x8,x9 + 80002c64: 00033483 ld x9,0(x6) + 80002c68: 02848263 beq x9,x8,80002c8c + 80002c6c: 00040313 addi x6,x8,0 + 80002c70: 00048213 addi x4,x9,0 + 80002c74: 6b4003ef jal x7,80003328 + 80002c78: 80002bc8 .word 0x80002bc8 + 80002c7c: 00000000 .word 0x00000000 + 80002c80: 8000b8b2 .word 0x8000b8b2 + 80002c84: 00000000 .word 0x00000000 + 80002c88: 00000341 .word 0x00000341 + +0000000080002c8c : + 80002c8c: 00070413 addi x8,x14,0 + 80002c90: 00833483 ld x9,8(x6) + 80002c94: 02848263 beq x9,x8,80002cb8 + 80002c98: 00040313 addi x6,x8,0 + 80002c9c: 00048213 addi x4,x9,0 + 80002ca0: 688003ef jal x7,80003328 + 80002ca4: 80002c8c .word 0x80002c8c + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 8000b9b4 .word 0x8000b9b4 + 80002cb0: 00000000 .word 0x00000000 + 80002cb4: 00000341 .word 0x00000341 + 80002cb8: 12074063 blt x14,x0,80002dd8 + +0000000080002cbc : + 80002cbc: 34102473 csrrs x8,mepc,x0 + 80002cc0: 00010493 addi x9,x2,0 + 80002cc4: 0040006f jal x0,80002cc8 + +0000000080002cc8 : + 80002cc8: 08000393 addi x7,x0,128 + 80002ccc: 04740863 beq x8,x7,80002d1c + 80002cd0: 00238393 addi x7,x7,2 + 80002cd4: 04740463 beq x8,x7,80002d1c + 80002cd8: 04040263 beq x8,x0,80002d1c + 80002cdc: 2884b383 ld x7,648(x9) + 80002ce0: 2904b783 ld x15,656(x9) + 80002ce4: 007787b3 add x15,x15,x7 + 80002ce8: 00f47463 bgeu x8,x15,80002cf0 + 80002cec: 02747663 bgeu x8,x7,80002d18 + +0000000080002cf0 : + 80002cf0: 2584b383 ld x7,600(x9) + 80002cf4: 2604b783 ld x15,608(x9) + 80002cf8: 007787b3 add x15,x15,x7 + 80002cfc: 00f47463 bgeu x8,x15,80002d04 + 80002d00: 00747c63 bgeu x8,x7,80002d18 + +0000000080002d04 : + 80002d04: 2684b383 ld x7,616(x9) + 80002d08: 2704b783 ld x15,624(x9) + 80002d0c: 007787b3 add x15,x15,x7 + 80002d10: d2f47a63 bgeu x8,x15,80002244 + 80002d14: d2746863 bltu x8,x7,80002244 + +0000000080002d18 : + 80002d18: 40740433 sub x8,x8,x7 + +0000000080002d1c : + 80002d1c: 01033483 ld x9,16(x6) + 80002d20: 02848263 beq x9,x8,80002d44 + 80002d24: 00040313 addi x6,x8,0 + 80002d28: 00048213 addi x4,x9,0 + 80002d2c: 5fc003ef jal x7,80003328 + 80002d30: 80002d1c .word 0x80002d1c + 80002d34: 00000000 .word 0x00000000 + 80002d38: 8000baaf .word 0x8000baaf + 80002d3c: 00000000 .word 0x00000000 + 80002d40: 00000341 .word 0x00000341 + +0000000080002d44 : + 80002d44: 34102473 csrrs x8,mepc,x0 + 80002d48: 342023f3 csrrs x7,mcause,x0 + 80002d4c: 00c00793 addi x15,x0,12 + 80002d50: 00f38a63 beq x7,x15,80002d64 + 80002d54: 00100793 addi x15,x0,1 + 80002d58: 00f38663 beq x7,x15,80002d64 + 80002d5c: 01400793 addi x15,x0,20 + 80002d60: 00f39663 bne x7,x15,80002d6c + 80002d64: 34109073 csrrw x0,mepc,x1 + 80002d68: 0100006f jal x0,80002d78 + +0000000080002d6c : + 80002d6c: 00400393 addi x7,x0,4 + 80002d70: 00740433 add x8,x8,x7 + 80002d74: 34141073 csrrw x0,mepc,x8 + +0000000080002d78 : + 80002d78: 34302473 csrrs x8,mtval,x0 + +0000000080002d7c : + 80002d7c: 01833483 ld x9,24(x6) + 80002d80: 02848263 beq x9,x8,80002da4 + 80002d84: 00040313 addi x6,x8,0 + 80002d88: 00048213 addi x4,x9,0 + 80002d8c: 59c003ef jal x7,80003328 + 80002d90: 80002d7c .word 0x80002d7c + 80002d94: 00000000 .word 0x00000000 + 80002d98: 8000bba2 .word 0x8000bba2 + 80002d9c: 00000000 .word 0x00000000 + 80002da0: 00000341 .word 0x00000341 + +0000000080002da4 : + 80002da4: 30102473 csrrs x8,misa,x0 + 80002da8: 03841413 slli x8,x8,0x38 + 80002dac: 00045263 bge x8,x0,80002db0 + +0000000080002db0 : + 80002db0: 20000393 addi x7,x0,512 + 80002db4: 0640006f jal x0,80002e18 + +0000000080002db8 : + 80002db8: 2e013303 ld x6,736(x2) + 80002dbc: 2e813383 ld x7,744(x2) + 80002dc0: 2f013403 ld x8,752(x2) + 80002dc4: 2f813483 ld x9,760(x2) + 80002dc8: 30013703 ld x14,768(x2) + 80002dcc: 30813783 ld x15,776(x2) + 80002dd0: 31013103 ld x2,784(x2) + 80002dd4: 30200073 mret + +0000000080002dd8 : + 80002dd8: 00100413 addi x8,x0,1 + 80002ddc: 01f77393 andi x7,x14,31 + 80002de0: 00741433 sll x8,x8,x7 + 80002de4: 304434f3 csrrc x9,mie,x8 + 80002de8: 34443473 csrrc x8,mip,x8 + +0000000080002dec : + 80002dec: 01033483 ld x9,16(x6) + 80002df0: 02848263 beq x9,x8,80002e14 + 80002df4: 00040313 addi x6,x8,0 + 80002df8: 00048213 addi x4,x9,0 + 80002dfc: 52c003ef jal x7,80003328 + 80002e00: 80002dec .word 0x80002dec + 80002e04: 00000000 .word 0x00000000 + 80002e08: 8000bd15 .word 0x8000bd15 + 80002e0c: 00000000 .word 0x00000000 + 80002e10: 00000341 .word 0x00000341 + 80002e14: 00000393 addi x7,x0,0 + +0000000080002e18 : + 80002e18: 00000417 auipc x8,0x0 + 80002e1c: 03c40413 addi x8,x8,60 # 80002e54 + 80002e20: 00740433 add x8,x8,x7 + 80002e24: 00371393 slli x7,x14,0x3 + 80002e28: 00740433 add x8,x8,x7 + 80002e2c: ff847413 andi x8,x8,-8 + 80002e30: 00043403 ld x8,0(x8) + +0000000080002e34 : + 80002e34: 00040a63 beq x8,x0,80002e48 + 80002e38: 03f41393 slli x7,x8,0x3f + 80002e3c: 0003d863 bge x7,x0,80002e4c + 80002e40: 00145413 srli x8,x8,0x1 + 80002e44: f6870ae3 beq x14,x8,80002db8 + 80002e48: bfcff06f jal x0,80002244 + +0000000080002e4c : + 80002e4c: 00040067 jalr x0,0(x8) + +0000000080002e50 : + ... + 80002e58: 00000001 .word 0x00000001 + 80002e5c: 00000000 .word 0x00000000 + 80002e60: 00000001 .word 0x00000001 + 80002e64: 00000000 .word 0x00000000 + 80002e68: 8002b000 .word 0x8002b000 + ... + 80002e78: 00000001 .word 0x00000001 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 00000001 .word 0x00000001 + 80002e84: 00000000 .word 0x00000000 + 80002e88: 8002b014 .word 0x8002b014 + ... + 80002e98: 00000001 .word 0x00000001 + 80002e9c: 00000000 .word 0x00000000 + 80002ea0: 00000001 .word 0x00000001 + 80002ea4: 00000000 .word 0x00000000 + 80002ea8: 8002b02c .word 0x8002b02c + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 00000001 .word 0x00000001 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 00000001 .word 0x00000001 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 00000001 .word 0x00000001 + 80002ec4: 00000000 .word 0x00000000 + 80002ec8: 00000001 .word 0x00000001 + 80002ecc: 00000000 .word 0x00000000 + 80002ed0: 00000001 .word 0x00000001 + 80002ed4: 00000000 .word 0x00000000 + 80002ed8: 00000001 .word 0x00000001 + 80002edc: 00000000 .word 0x00000000 + 80002ee0: 00000001 .word 0x00000001 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 00000001 .word 0x00000001 + 80002eec: 00000000 .word 0x00000000 + 80002ef0: 00000001 .word 0x00000001 + 80002ef4: 00000000 .word 0x00000000 + 80002ef8: 00000001 .word 0x00000001 + 80002efc: 00000000 .word 0x00000000 + 80002f00: 00000001 .word 0x00000001 + 80002f04: 00000000 .word 0x00000000 + 80002f08: 00000001 .word 0x00000001 + ... + +0000000080003050 : + 80003050: 00000001 .word 0x00000001 + 80003054: 00000000 .word 0x00000000 + 80003058: 00000003 .word 0x00000003 + 8000305c: 00000000 .word 0x00000000 + 80003060: 00000005 .word 0x00000005 + 80003064: 00000000 .word 0x00000000 + 80003068: 00000007 .word 0x00000007 + 8000306c: 00000000 .word 0x00000000 + 80003070: 00000009 .word 0x00000009 + 80003074: 00000000 .word 0x00000000 + 80003078: 0000000b .word 0x0000000b + 8000307c: 00000000 .word 0x00000000 + 80003080: 0000000d .word 0x0000000d + 80003084: 00000000 .word 0x00000000 + 80003088: 0000000f .word 0x0000000f + 8000308c: 00000000 .word 0x00000000 + 80003090: 00000011 .word 0x00000011 + 80003094: 00000000 .word 0x00000000 + 80003098: 00000013 .word 0x00000013 + 8000309c: 00000000 .word 0x00000000 + 800030a0: 00000015 .word 0x00000015 + 800030a4: 00000000 .word 0x00000000 + 800030a8: 00000017 .word 0x00000017 + 800030ac: 00000000 .word 0x00000000 + 800030b0: 00000019 .word 0x00000019 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 0000001b .word 0x0000001b + 800030bc: 00000000 .word 0x00000000 + 800030c0: 0000001d .word 0x0000001d + 800030c4: 00000000 .word 0x00000000 + 800030c8: 0000001f .word 0x0000001f + 800030cc: 00000000 .word 0x00000000 + 800030d0: 00000021 .word 0x00000021 + 800030d4: 00000000 .word 0x00000000 + 800030d8: 00000023 .word 0x00000023 + 800030dc: 00000000 .word 0x00000000 + 800030e0: 00000025 .word 0x00000025 + 800030e4: 00000000 .word 0x00000000 + 800030e8: 00000027 .word 0x00000027 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 00000029 .word 0x00000029 + 800030f4: 00000000 .word 0x00000000 + 800030f8: 0000002b .word 0x0000002b + 800030fc: 00000000 .word 0x00000000 + 80003100: 0000002d .word 0x0000002d + 80003104: 00000000 .word 0x00000000 + 80003108: 0000002f .word 0x0000002f + ... + +0000000080003250 : + 80003250: 300023f3 csrrs x7,mstatus,x0 + 80003254: 00b3d493 srli x9,x7,0xb + 80003258: 0034f493 andi x9,x9,3 + 8000325c: ffd48413 addi x8,x9,-3 + 80003260: 341023f3 csrrs x7,mepc,x0 + 80003264: 00000493 addi x9,x0,0 + 80003268: 02040c63 beq x8,x0,800032a0 + 8000326c: 35810113 addi x2,x2,856 + 80003270: 300023f3 csrrs x7,mstatus,x0 + 80003274: 01839393 slli x7,x7,0x18 + 80003278: 0003da63 bge x7,x0,8000328c + +000000008000327c : + 8000327c: 35810113 addi x2,x2,856 + 80003280: 5b013783 ld x15,1456(x2) + 80003284: ca810113 addi x2,x2,-856 + 80003288: 0080006f jal x0,80003290 + +000000008000328c : + 8000328c: f0013783 ld x15,-256(x2) + 80003290: 341023f3 csrrs x7,mepc,x0 + 80003294: 40f383b3 sub x7,x7,x15 + 80003298: ca810113 addi x2,x2,-856 + 8000329c: 25813483 ld x9,600(x2) + +00000000800032a0 : + 800032a0: 007483b3 add x7,x9,x7 + 800032a4: 2e013303 ld x6,736(x2) + 800032a8: 2f013403 ld x8,752(x2) + 800032ac: 2f813483 ld x9,760(x2) + 800032b0: 30013703 ld x14,768(x2) + 800032b4: 30813783 ld x15,776(x2) + 800032b8: 31013103 ld x2,784(x2) + 800032bc: 00438067 jalr x0,4(x7) + +00000000800032c0 : + 800032c0: 00008217 auipc x4,0x8 + 800032c4: cd020213 addi x4,x4,-816 # 8000af90 + 800032c8: 02523423 sd x5,40(x4) # 28 + 800032cc: 00123423 sd x1,8(x4) # 8 + 800032d0: 00023023 sd x0,0(x4) # 0 + 800032d4: 0880006f jal x0,8000335c + +00000000800032d8 : + 800032d8: 00008397 auipc x7,0x8 + 800032dc: cb838393 addi x7,x7,-840 # 8000af90 + 800032e0: 0483b023 sd x8,64(x7) + 800032e4: 0243b023 sd x4,32(x7) + 800032e8: 0253b423 sd x5,40(x7) + 800032ec: 0013b423 sd x1,8(x7) + 800032f0: 0003b023 sd x0,0(x7) + 800032f4: 00038213 addi x4,x7,0 + 800032f8: 00040293 addi x5,x8,0 + 800032fc: 0600006f jal x0,8000335c + +0000000080003300 : + 80003300: 00008697 auipc x13,0x8 + 80003304: c9068693 addi x13,x13,-880 # 8000af90 + 80003308: 06e6b823 sd x14,112(x13) + 8000330c: 0246b023 sd x4,32(x13) + 80003310: 0256b423 sd x5,40(x13) + 80003314: 0016b423 sd x1,8(x13) + 80003318: 0006b023 sd x0,0(x13) + 8000331c: 00068213 addi x4,x13,0 + 80003320: 00070293 addi x5,x14,0 + 80003324: 0380006f jal x0,8000335c + +0000000080003328 : + 80003328: 00008497 auipc x9,0x8 + 8000332c: c6848493 addi x9,x9,-920 # 8000af90 + 80003330: 0674b423 sd x7,104(x9) + 80003334: 0244b023 sd x4,32(x9) + 80003338: 0254b423 sd x5,40(x9) + 8000333c: 0014b423 sd x1,8(x9) + 80003340: 00300093 addi x1,x0,3 + 80003344: 0014b023 sd x1,0(x9) + 80003348: 1064b823 sd x6,272(x9) + 8000334c: 1044bc23 sd x4,280(x9) + 80003350: 00048213 addi x4,x9,0 + 80003354: 00038293 addi x5,x7,0 + 80003358: 0040006f jal x0,8000335c + +000000008000335c : + 8000335c: 00223823 sd x2,16(x4) # 10 + 80003360: 00323c23 sd x3,24(x4) # 18 + 80003364: 02623823 sd x6,48(x4) # 30 + 80003368: 02723c23 sd x7,56(x4) # 38 + 8000336c: 04823023 sd x8,64(x4) # 40 + 80003370: 04923423 sd x9,72(x4) # 48 + 80003374: 04a23823 sd x10,80(x4) # 50 + 80003378: 04b23c23 sd x11,88(x4) # 58 + 8000337c: 06c23023 sd x12,96(x4) # 60 + 80003380: 06d23423 sd x13,104(x4) # 68 + 80003384: 06e23823 sd x14,112(x4) # 70 + 80003388: 06f23c23 sd x15,120(x4) # 78 + 8000338c: 09023023 sd x16,128(x4) # 80 + 80003390: 09123423 sd x17,136(x4) # 88 + 80003394: 09223823 sd x18,144(x4) # 90 + 80003398: 09323c23 sd x19,152(x4) # 98 + 8000339c: 0b423023 sd x20,160(x4) # a0 + 800033a0: 0b523423 sd x21,168(x4) # a8 + 800033a4: 0b623823 sd x22,176(x4) # b0 + 800033a8: 0b723c23 sd x23,184(x4) # b8 + 800033ac: 0d823023 sd x24,192(x4) # c0 + 800033b0: 0d923423 sd x25,200(x4) # c8 + 800033b4: 0da23823 sd x26,208(x4) # d0 + 800033b8: 0db23c23 sd x27,216(x4) # d8 + 800033bc: 0fc23023 sd x28,224(x4) # e0 + 800033c0: 0fd23423 sd x29,232(x4) # e8 + 800033c4: 0fe23823 sd x30,240(x4) # f0 + 800033c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800033cc : + 800033cc: 00008497 auipc x9,0x8 + 800033d0: bc44a483 lw x9,-1084(x9) # 8000af90 + 800033d4: 00300513 addi x10,x0,3 + 800033d8: 18a48a63 beq x9,x10,8000356c + +00000000800033dc : + 800033dc: ffa2d303 lhu x6,-6(x5) + 800033e0: ff82d383 lhu x7,-8(x5) + 800033e4: 01031313 slli x6,x6,0x10 + 800033e8: 00736333 or x6,x6,x7 + 800033ec: 00f35393 srli x7,x6,0xf + 800033f0: 01f3f393 andi x7,x7,31 + 800033f4: 01435413 srli x8,x6,0x14 + 800033f8: 01f47413 andi x8,x8,31 + 800033fc: 10822223 sw x8,260(x4) # 104 + 80003400: 00341313 slli x6,x8,0x3 + 80003404: 00620333 add x6,x4,x6 + 80003408: 00033303 ld x6,0(x6) + 8000340c: 10623823 sd x6,272(x4) # 110 + 80003410: ff62d303 lhu x6,-10(x5) + 80003414: ff42d383 lhu x7,-12(x5) + 80003418: 01031313 slli x6,x6,0x10 + 8000341c: 00736333 or x6,x6,x7 + 80003420: 00030513 addi x10,x6,0 + 80003424: 07f37413 andi x8,x6,127 + 80003428: 00300493 addi x9,x0,3 + 8000342c: 0c941463 bne x8,x9,800034f4 + 80003430: 00c35413 srli x8,x6,0xc + 80003434: 00747413 andi x8,x8,7 + 80003438: 00300493 addi x9,x0,3 + 8000343c: 0a941c63 bne x8,x9,800034f4 + 80003440: 41435393 srai x7,x6,0x14 + 80003444: 00f35313 srli x6,x6,0xf + 80003448: 01f37313 andi x6,x6,31 + 8000344c: 00331313 slli x6,x6,0x3 + 80003450: 00620333 add x6,x4,x6 + 80003454: 00033303 ld x6,0(x6) + 80003458: 00730333 add x6,x6,x7 + 8000345c: 00737413 andi x8,x6,7 + 80003460: 0c041663 bne x8,x0,8000352c + 80003464: 00000013 addi x0,x0,0 + 80003468: 00000013 addi x0,x0,0 + 8000346c: 00000013 addi x0,x0,0 + 80003470: 00000013 addi x0,x0,0 + 80003474: 00000013 addi x0,x0,0 + 80003478: 00000013 addi x0,x0,0 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 0000a417 auipc x8,0xa + 80003484: 8f040413 addi x8,x8,-1808 # 8000cd70 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 08836663 bltu x6,x8,8000352c + 800034a4: 00000013 addi x0,x0,0 + 800034a8: 00000013 addi x0,x0,0 + 800034ac: 00000013 addi x0,x0,0 + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00027417 auipc x8,0x27 + 800034c4: 37040413 addi x8,x8,880 # 8002a830 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: ff840413 addi x8,x8,-8 + 800034e4: 04646463 bltu x8,x6,8000352c + 800034e8: 00033303 ld x6,0(x6) + 800034ec: 10623c23 sd x6,280(x4) # 118 + 800034f0: 3880006f jal x0,80003878 + +00000000800034f4 : + 800034f4: 00100413 addi x8,x0,1 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00008497 auipc x9,0x8 + 80003504: bb848493 addi x9,x9,-1096 # 8000b0b8 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 0084a023 sw x8,0(x9) + 80003524: 10a23c23 sd x10,280(x4) # 118 + 80003528: 3500006f jal x0,80003878 + +000000008000352c : + 8000352c: 00200413 addi x8,x0,2 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008497 auipc x9,0x8 + 80003544: b7848493 addi x9,x9,-1160 # 8000b0b8 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 0084a023 sw x8,0(x9) + 80003564: 10623c23 sd x6,280(x4) # 118 + 80003568: 3100006f jal x0,80003878 + +000000008000356c : + 8000356c: 0082e303 lwu x6,8(x5) + 80003570: 00c2a383 lw x7,12(x5) + 80003574: 02039393 slli x7,x7,0x20 + 80003578: 00736333 or x6,x6,x7 + 8000357c: 00008817 auipc x16,0x8 + 80003580: b4c80813 addi x16,x16,-1204 # 8000b0c8 + 80003584: 00683023 sd x6,0(x16) + 80003588: 0002e303 lwu x6,0(x5) + 8000358c: 0042a383 lw x7,4(x5) + 80003590: 02039393 slli x7,x7,0x20 + 80003594: 00736333 or x6,x6,x7 + 80003598: 10623423 sd x6,264(x4) # 108 + 8000359c: 00008817 auipc x16,0x8 + 800035a0: b2c80813 addi x16,x16,-1236 # 8000b0c8 + 800035a4: 00083303 ld x6,0(x16) + 800035a8: 00008397 auipc x7,0x8 + 800035ac: 2f338393 addi x7,x7,755 # 8000b89b + 800035b0: 28730463 beq x6,x7,80003838 + 800035b4: 00000413 addi x8,x0,0 + 800035b8: 00008817 auipc x16,0x8 + 800035bc: b0880813 addi x16,x16,-1272 # 8000b0c0 + 800035c0: 00882023 sw x8,0(x16) + 800035c4: 00008397 auipc x7,0x8 + 800035c8: 2ee38393 addi x7,x7,750 # 8000b8b2 + 800035cc: 00731863 bne x6,x7,800035dc + 800035d0: 00100413 addi x8,x0,1 + 800035d4: 00000493 addi x9,x0,0 + 800035d8: 2740006f jal x0,8000384c + 800035dc: 00008397 auipc x7,0x8 + 800035e0: 3d838393 addi x7,x7,984 # 8000b9b4 + 800035e4: 00731863 bne x6,x7,800035f4 + 800035e8: 00200413 addi x8,x0,2 + 800035ec: 00000493 addi x9,x0,0 + 800035f0: 25c0006f jal x0,8000384c + 800035f4: 00008397 auipc x7,0x8 + 800035f8: 4bb38393 addi x7,x7,1211 # 8000baaf + 800035fc: 00731863 bne x6,x7,8000360c + 80003600: 00300413 addi x8,x0,3 + 80003604: 00000493 addi x9,x0,0 + 80003608: 2440006f jal x0,8000384c + 8000360c: 00008397 auipc x7,0x8 + 80003610: 59638393 addi x7,x7,1430 # 8000bba2 + 80003614: 00731863 bne x6,x7,80003624 + 80003618: 00400413 addi x8,x0,4 + 8000361c: 00000493 addi x9,x0,0 + 80003620: 22c0006f jal x0,8000384c + 80003624: 00008397 auipc x7,0x8 + 80003628: 6f138393 addi x7,x7,1777 # 8000bd15 + 8000362c: 00731863 bne x6,x7,8000363c + 80003630: 00500413 addi x8,x0,5 + 80003634: 00000493 addi x9,x0,0 + 80003638: 2140006f jal x0,8000384c + 8000363c: 00008397 auipc x7,0x8 + 80003640: 65d38393 addi x7,x7,1629 # 8000bc99 + 80003644: 00731863 bne x6,x7,80003654 + 80003648: 00600413 addi x8,x0,6 + 8000364c: 00000493 addi x9,x0,0 + 80003650: 1fc0006f jal x0,8000384c + 80003654: 00008397 auipc x7,0x8 + 80003658: 68338393 addi x7,x7,1667 # 8000bcd7 + 8000365c: 00731863 bne x6,x7,8000366c + 80003660: 00700413 addi x8,x0,7 + 80003664: 00000493 addi x9,x0,0 + 80003668: 1e40006f jal x0,8000384c + 8000366c: 00008397 auipc x7,0x8 + 80003670: 28638393 addi x7,x7,646 # 8000b8f2 + 80003674: 00731863 bne x6,x7,80003684 + 80003678: 00100413 addi x8,x0,1 + 8000367c: 00100493 addi x9,x0,1 + 80003680: 1cc0006f jal x0,8000384c + 80003684: 00008397 auipc x7,0x8 + 80003688: 36e38393 addi x7,x7,878 # 8000b9f2 + 8000368c: 00731863 bne x6,x7,8000369c + 80003690: 00200413 addi x8,x0,2 + 80003694: 00100493 addi x9,x0,1 + 80003698: 1b40006f jal x0,8000384c + 8000369c: 00008397 auipc x7,0x8 + 800036a0: 44f38393 addi x7,x7,1103 # 8000baeb + 800036a4: 00731863 bne x6,x7,800036b4 + 800036a8: 00300413 addi x8,x0,3 + 800036ac: 00100493 addi x9,x0,1 + 800036b0: 19c0006f jal x0,8000384c + 800036b4: 00008397 auipc x7,0x8 + 800036b8: 52b38393 addi x7,x7,1323 # 8000bbdf + 800036bc: 00731863 bne x6,x7,800036cc + 800036c0: 00400413 addi x8,x0,4 + 800036c4: 00100493 addi x9,x0,1 + 800036c8: 1840006f jal x0,8000384c + 800036cc: 00008397 auipc x7,0x8 + 800036d0: 68438393 addi x7,x7,1668 # 8000bd50 + 800036d4: 00731863 bne x6,x7,800036e4 + 800036d8: 00500413 addi x8,x0,5 + 800036dc: 00100493 addi x9,x0,1 + 800036e0: 16c0006f jal x0,8000384c + 800036e4: 00008397 auipc x7,0x8 + 800036e8: 24e38393 addi x7,x7,590 # 8000b932 + 800036ec: 00731863 bne x6,x7,800036fc + 800036f0: 00100413 addi x8,x0,1 + 800036f4: 00200493 addi x9,x0,2 + 800036f8: 1540006f jal x0,8000384c + 800036fc: 00008397 auipc x7,0x8 + 80003700: 33438393 addi x7,x7,820 # 8000ba30 + 80003704: 00731863 bne x6,x7,80003714 + 80003708: 00200413 addi x8,x0,2 + 8000370c: 00200493 addi x9,x0,2 + 80003710: 13c0006f jal x0,8000384c + 80003714: 00008397 auipc x7,0x8 + 80003718: 41338393 addi x7,x7,1043 # 8000bb27 + 8000371c: 00731863 bne x6,x7,8000372c + 80003720: 00300413 addi x8,x0,3 + 80003724: 00200493 addi x9,x0,2 + 80003728: 1240006f jal x0,8000384c + 8000372c: 00008397 auipc x7,0x8 + 80003730: 4f038393 addi x7,x7,1264 # 8000bc1c + 80003734: 00731863 bne x6,x7,80003744 + 80003738: 00400413 addi x8,x0,4 + 8000373c: 00200493 addi x9,x0,2 + 80003740: 10c0006f jal x0,8000384c + 80003744: 00008397 auipc x7,0x8 + 80003748: 64738393 addi x7,x7,1607 # 8000bd8b + 8000374c: 00731863 bne x6,x7,8000375c + 80003750: 00500413 addi x8,x0,5 + 80003754: 00200493 addi x9,x0,2 + 80003758: 0f40006f jal x0,8000384c + 8000375c: 00008397 auipc x7,0x8 + 80003760: 21738393 addi x7,x7,535 # 8000b973 + 80003764: 00731863 bne x6,x7,80003774 + 80003768: 00100413 addi x8,x0,1 + 8000376c: 00300493 addi x9,x0,3 + 80003770: 0dc0006f jal x0,8000384c + 80003774: 00008397 auipc x7,0x8 + 80003778: 2fb38393 addi x7,x7,763 # 8000ba6f + 8000377c: 00731863 bne x6,x7,8000378c + 80003780: 00200413 addi x8,x0,2 + 80003784: 00300493 addi x9,x0,3 + 80003788: 0c40006f jal x0,8000384c + 8000378c: 00008397 auipc x7,0x8 + 80003790: 3d838393 addi x7,x7,984 # 8000bb64 + 80003794: 00731863 bne x6,x7,800037a4 + 80003798: 00300413 addi x8,x0,3 + 8000379c: 00300493 addi x9,x0,3 + 800037a0: 0ac0006f jal x0,8000384c + 800037a4: 00008397 auipc x7,0x8 + 800037a8: 4b638393 addi x7,x7,1206 # 8000bc5a + 800037ac: 00731863 bne x6,x7,800037bc + 800037b0: 00400413 addi x8,x0,4 + 800037b4: 00300493 addi x9,x0,3 + 800037b8: 0940006f jal x0,8000384c + 800037bc: 00008397 auipc x7,0x8 + 800037c0: 60b38393 addi x7,x7,1547 # 8000bdc7 + 800037c4: 00731863 bne x6,x7,800037d4 + 800037c8: 00500413 addi x8,x0,5 + 800037cc: 00300493 addi x9,x0,3 + 800037d0: 07c0006f jal x0,8000384c + 800037d4: 00008397 auipc x7,0x8 + 800037d8: 63038393 addi x7,x7,1584 # 8000be04 + 800037dc: 00731863 bne x6,x7,800037ec + 800037e0: 00800413 addi x8,x0,8 + 800037e4: 00000493 addi x9,x0,0 + 800037e8: 0640006f jal x0,8000384c + 800037ec: 00008397 auipc x7,0x8 + 800037f0: 66738393 addi x7,x7,1639 # 8000be53 + 800037f4: 00731863 bne x6,x7,80003804 + 800037f8: 00800413 addi x8,x0,8 + 800037fc: 00000493 addi x9,x0,0 + 80003800: 04c0006f jal x0,8000384c + 80003804: 00008397 auipc x7,0x8 + 80003808: 74a38393 addi x7,x7,1866 # 8000bf4e + 8000380c: 00731863 bne x6,x7,8000381c + 80003810: 00800413 addi x8,x0,8 + 80003814: 00100493 addi x9,x0,1 + 80003818: 0340006f jal x0,8000384c + 8000381c: 00009397 auipc x7,0x9 + 80003820: 82e38393 addi x7,x7,-2002 # 8000c04a + 80003824: 00731863 bne x6,x7,80003834 + 80003828: 00800413 addi x8,x0,8 + 8000382c: 00200493 addi x9,x0,2 + 80003830: 01c0006f jal x0,8000384c + 80003834: 0340006f jal x0,80003868 + +0000000080003838 : + 80003838: 00900413 addi x8,x0,9 + 8000383c: 00008817 auipc x16,0x8 + 80003840: 88480813 addi x16,x16,-1916 # 8000b0c0 + 80003844: 00882023 sw x8,0(x16) + 80003848: 0300006f jal x0,80003878 + +000000008000384c : + 8000384c: 00008817 auipc x16,0x8 + 80003850: 87480813 addi x16,x16,-1932 # 8000b0c0 + 80003854: 00882023 sw x8,0(x16) + 80003858: 00008817 auipc x16,0x8 + 8000385c: 86c80813 addi x16,x16,-1940 # 8000b0c4 + 80003860: 00982023 sw x9,0(x16) + 80003864: 0140006f jal x0,80003878 + +0000000080003868 : + 80003868: 00008817 auipc x16,0x8 + 8000386c: 85880813 addi x16,x16,-1960 # 8000b0c0 + 80003870: 00082023 sw x0,0(x16) + 80003874: 0040006f jal x0,80003878 + +0000000080003878 : + 80003878: 0002e303 lwu x6,0(x5) + 8000387c: 0042a383 lw x7,4(x5) + 80003880: 02039393 slli x7,x7,0x20 + 80003884: 00736333 or x6,x6,x7 + 80003888: 10623423 sd x6,264(x4) # 108 + 8000388c: 00035383 lhu x7,0(x6) + 80003890: 0033f413 andi x8,x7,3 + 80003894: 00300493 addi x9,x0,3 + 80003898: 00941863 bne x8,x9,800038a8 + 8000389c: 00235403 lhu x8,2(x6) + 800038a0: 01041413 slli x8,x8,0x10 + 800038a4: 0083e3b3 or x7,x7,x8 + 800038a8: 10722023 sw x7,256(x4) # 100 + 800038ac: 0082e303 lwu x6,8(x5) + 800038b0: 00c2a383 lw x7,12(x5) + 800038b4: 02039393 slli x7,x7,0x20 + 800038b8: 00736333 or x6,x6,x7 + 800038bc: 12623023 sd x6,288(x4) # 120 + +00000000800038c0 : + 800038c0: 00008517 auipc x10,0x8 + 800038c4: dee50513 addi x10,x10,-530 # 8000b6ae + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00028097 auipc x1,0x28 + 800038e4: cc4080e7 jalr x1,-828(x1) # 8002b5a4 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 00008517 auipc x10,0x8 + 80003904: de750513 addi x10,x10,-537 # 8000b6e7 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00028097 auipc x1,0x28 + 80003924: c84080e7 jalr x1,-892(x1) # 8002b5a4 + +0000000080003928 : + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 00008517 auipc x10,0x8 + 80003944: e5e50513 addi x10,x10,-418 # 8000b79e + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00028097 auipc x1,0x28 + 80003964: c44080e7 jalr x1,-956(x1) # 8002b5a4 + +0000000080003968 : + 80003968: 00007517 auipc x10,0x7 + 8000396c: 74853503 ld x10,1864(x10) # 8000b0b0 + 80003970: 00028097 auipc x1,0x28 + 80003974: c34080e7 jalr x1,-972(x1) # 8002b5a4 + +0000000080003978 : + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + 80003980: 00008517 auipc x10,0x8 + 80003984: e3050513 addi x10,x10,-464 # 8000b7b0 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00028097 auipc x1,0x28 + 800039a4: c04080e7 jalr x1,-1020(x1) # 8002b5a4 + 800039a8: 00007517 auipc x10,0x7 + 800039ac: 5e852503 lw x10,1512(x10) # 8000af90 + 800039b0: 00300593 addi x11,x0,3 + 800039b4: 52b50c63 beq x10,x11,80003eec + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00008517 auipc x10,0x8 + 800039c4: df250513 addi x10,x10,-526 # 8000b7b2 + 800039c8: 00000013 addi x0,x0,0 + 800039cc: 00000013 addi x0,x0,0 + 800039d0: 00000013 addi x0,x0,0 + 800039d4: 00000013 addi x0,x0,0 + 800039d8: 00000013 addi x0,x0,0 + 800039dc: 00000013 addi x0,x0,0 + 800039e0: 00028097 auipc x1,0x28 + 800039e4: bc4080e7 jalr x1,-1084(x1) # 8002b5a4 + 800039e8: 00007517 auipc x10,0x7 + 800039ec: 6a852503 lw x10,1704(x10) # 8000b090 + 800039f0: 02000593 addi x11,x0,32 + 800039f4: 00357613 andi x12,x10,3 + 800039f8: 00300693 addi x13,x0,3 + 800039fc: 00d60463 beq x12,x13,80003a04 + 80003a00: 01000593 addi x11,x0,16 + 80003a04: 3f4010ef jal x1,80004df8 + 80003a08: 00000013 addi x0,x0,0 + 80003a0c: 00000013 addi x0,x0,0 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00007517 auipc x10,0x7 + 80003a24: 6d850513 addi x10,x10,1752 # 8000b0f8 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 00028097 auipc x1,0x28 + 80003a44: b64080e7 jalr x1,-1180(x1) # 8002b5a4 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: d6650513 addi x10,x10,-666 # 8000b7c6 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 00028097 auipc x1,0x28 + 80003a84: b24080e7 jalr x1,-1244(x1) # 8002b5a4 + 80003a88: 00007517 auipc x10,0x7 + 80003a8c: 61053503 ld x10,1552(x10) # 8000b098 + 80003a90: 04000593 addi x11,x0,64 + 80003a94: 364010ef jal x1,80004df8 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00007517 auipc x10,0x7 + 80003aa4: 65850513 addi x10,x10,1624 # 8000b0f8 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 00028097 auipc x1,0x28 + 80003ac4: ae4080e7 jalr x1,-1308(x1) # 8002b5a4 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: 71d50513 addi x10,x10,1821 # 8000c1fd + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 00028097 auipc x1,0x28 + 80003b04: aa4080e7 jalr x1,-1372(x1) # 8002b5a4 + 80003b08: 00007517 auipc x10,0x7 + 80003b0c: 48852503 lw x10,1160(x10) # 8000af90 + 80003b10: 00050663 beq x10,x0,80003b1c + 80003b14: 00300593 addi x11,x0,3 + 80003b18: 04b51063 bne x10,x11,80003b58 + 80003b1c: 07800593 addi x11,x0,120 + 80003b20: 00007617 auipc x12,0x7 + 80003b24: 5d860613 addi x12,x12,1496 # 8000b0f8 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 00b60023 sb x11,0(x12) + 80003b44: 00160613 addi x12,x12,1 + 80003b48: 00007517 auipc x10,0x7 + 80003b4c: 54c52503 lw x10,1356(x10) # 8000b094 + 80003b50: 324010ef jal x1,80004e74 + 80003b54: 1180006f jal x0,80003c6c + +0000000080003b58 : + 80003b58: 00100593 addi x11,x0,1 + 80003b5c: 04b50863 beq x10,x11,80003bac + 80003b60: 00400593 addi x11,x0,4 + 80003b64: 08b50a63 beq x10,x11,80003bf8 + 80003b68: 00500593 addi x11,x0,5 + 80003b6c: 0cb50463 beq x10,x11,80003c34 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 00008517 auipc x10,0x8 + 80003b84: 79350513 addi x10,x10,1939 # 8000c313 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00028097 auipc x1,0x28 + 80003ba4: a04080e7 jalr x1,-1532(x1) # 8002b5a4 + 80003ba8: 1000006f jal x0,80003ca8 + +0000000080003bac : + 80003bac: 06600593 addi x11,x0,102 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 00007617 auipc x12,0x7 + 80003bc4: 53860613 addi x12,x12,1336 # 8000b0f8 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00b60023 sb x11,0(x12) + 80003be4: 00160613 addi x12,x12,1 + 80003be8: 00007517 auipc x10,0x7 + 80003bec: 4ac52503 lw x10,1196(x10) # 8000b094 + 80003bf0: 284010ef jal x1,80004e74 + 80003bf4: 0780006f jal x0,80003c6c + +0000000080003bf8 : + 80003bf8: 07600593 addi x11,x0,118 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 00007617 auipc x12,0x7 + 80003c04: 4f860613 addi x12,x12,1272 # 8000b0f8 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00b60023 sb x11,0(x12) + 80003c24: 00160613 addi x12,x12,1 + 80003c28: 00007517 auipc x10,0x7 + 80003c2c: 46c52503 lw x10,1132(x10) # 8000b094 + 80003c30: 244010ef jal x1,80004e74 + +0000000080003c34 : + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + 80003c40: 00008517 auipc x10,0x8 + 80003c44: 5b650513 addi x10,x10,1462 # 8000c1f6 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00028097 auipc x1,0x28 + 80003c64: 944080e7 jalr x1,-1724(x1) # 8002b5a4 + 80003c68: 0400006f jal x0,80003ca8 + +0000000080003c6c : + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00007517 auipc x10,0x7 + 80003c84: 47850513 addi x10,x10,1144 # 8000b0f8 + 80003c88: 00000013 addi x0,x0,0 + 80003c8c: 00000013 addi x0,x0,0 + 80003c90: 00000013 addi x0,x0,0 + 80003c94: 00000013 addi x0,x0,0 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00028097 auipc x1,0x28 + 80003ca4: 904080e7 jalr x1,-1788(x1) # 8002b5a4 + +0000000080003ca8 : + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00008517 auipc x10,0x8 + 80003cc4: 54e50513 addi x10,x10,1358 # 8000c20e + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00028097 auipc x1,0x28 + 80003ce4: 8c4080e7 jalr x1,-1852(x1) # 8002b5a4 + 80003ce8: 00007517 auipc x10,0x7 + 80003cec: 2a852503 lw x10,680(x10) # 8000af90 + 80003cf0: 00100593 addi x11,x0,1 + 80003cf4: 00b51c63 bne x10,x11,80003d0c + 80003cf8: 00007517 auipc x10,0x7 + 80003cfc: 3a853503 ld x10,936(x10) # 8000b0a0 + 80003d00: 04000593 addi x11,x0,64 + 80003d04: 0f4010ef jal x1,80004df8 + 80003d08: 0140006f jal x0,80003d1c + +0000000080003d0c : + 80003d0c: 00007517 auipc x10,0x7 + 80003d10: 39453503 ld x10,916(x10) # 8000b0a0 + 80003d14: 04000593 addi x11,x0,64 + 80003d18: 0e0010ef jal x1,80004df8 + +0000000080003d1c : + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00007517 auipc x10,0x7 + 80003d24: 3d850513 addi x10,x10,984 # 8000b0f8 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00028097 auipc x1,0x28 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002b5a4 + 80003d48: 00007517 auipc x10,0x7 + 80003d4c: 37052503 lw x10,880(x10) # 8000b0b8 + 80003d50: 08051e63 bne x10,x0,80003dec + 80003d54: 00000013 addi x0,x0,0 + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: 4c550513 addi x10,x10,1221 # 8000c225 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00028097 auipc x1,0x28 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002b5a4 + 80003d88: 00007517 auipc x10,0x7 + 80003d8c: 20852503 lw x10,520(x10) # 8000af90 + 80003d90: 00100593 addi x11,x0,1 + 80003d94: 00b51c63 bne x10,x11,80003dac + 80003d98: 00007517 auipc x10,0x7 + 80003d9c: 31053503 ld x10,784(x10) # 8000b0a8 + 80003da0: 04000593 addi x11,x0,64 + 80003da4: 054010ef jal x1,80004df8 + 80003da8: 0140006f jal x0,80003dbc + +0000000080003dac : + 80003dac: 00007517 auipc x10,0x7 + 80003db0: 2fc53503 ld x10,764(x10) # 8000b0a8 + 80003db4: 04000593 addi x11,x0,64 + 80003db8: 040010ef jal x1,80004df8 + +0000000080003dbc : + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00007517 auipc x10,0x7 + 80003dc4: 33850513 addi x10,x10,824 # 8000b0f8 + 80003dc8: 00000013 addi x0,x0,0 + 80003dcc: 00000013 addi x0,x0,0 + 80003dd0: 00000013 addi x0,x0,0 + 80003dd4: 00000013 addi x0,x0,0 + 80003dd8: 00000013 addi x0,x0,0 + 80003ddc: 00000013 addi x0,x0,0 + 80003de0: 00027097 auipc x1,0x27 + 80003de4: 7c4080e7 jalr x1,1988(x1) # 8002b5a4 + 80003de8: 5bd0006f jal x0,80004ba4 + +0000000080003dec : + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 06b51e63 bne x10,x11,80003e6c + +0000000080003df4 : + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: 43c50513 addi x10,x10,1084 # 8000c23c + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00027097 auipc x1,0x27 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002b5a4 + 80003e28: 00007517 auipc x10,0x7 + 80003e2c: 28053503 ld x10,640(x10) # 8000b0a8 + 80003e30: 02000593 addi x11,x0,32 + 80003e34: 7c5000ef jal x1,80004df8 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00007517 auipc x10,0x7 + 80003e44: 2b850513 addi x10,x10,696 # 8000b0f8 + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00027097 auipc x1,0x27 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002b5a4 + 80003e68: 53d0006f jal x0,80004ba4 + +0000000080003e6c : + 80003e6c: 00000013 addi x0,x0,0 + 80003e70: 00000013 addi x0,x0,0 + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: 41a50513 addi x10,x10,1050 # 8000c29a + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00027097 auipc x1,0x27 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002b5a4 + 80003ea8: 00007517 auipc x10,0x7 + 80003eac: 20053503 ld x10,512(x10) # 8000b0a8 + 80003eb0: 04000593 addi x11,x0,64 + 80003eb4: 745000ef jal x1,80004df8 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00007517 auipc x10,0x7 + 80003ec4: 23850513 addi x10,x10,568 # 8000b0f8 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00027097 auipc x1,0x27 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002b5a4 + 80003ee8: 4bd0006f jal x0,80004ba4 + +0000000080003eec : + 80003eec: 00007417 auipc x8,0x7 + 80003ef0: 1d442403 lw x8,468(x8) # 8000b0c0 + 80003ef4: 00900493 addi x9,x0,9 + 80003ef8: 0a940c63 beq x8,x9,80003fb0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: 43f50513 addi x10,x10,1087 # 8000c33f + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00027097 auipc x1,0x27 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002b5a4 + 80003f28: 00000013 addi x0,x0,0 + 80003f2c: 00000013 addi x0,x0,0 + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: 42b50513 addi x10,x10,1067 # 8000c36b + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00027097 auipc x1,0x27 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002b5a4 + 80003f68: 00007817 auipc x16,0x7 + 80003f6c: 16080813 addi x16,x16,352 # 8000b0c8 + 80003f70: 00083503 ld x10,0(x16) + 80003f74: 00027097 auipc x1,0x27 + 80003f78: 630080e7 jalr x1,1584(x1) # 8002b5a4 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00008517 auipc x10,0x8 + 80003f84: 83050513 addi x10,x10,-2000 # 8000b7b0 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00027097 auipc x1,0x27 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002b5a4 + 80003fa8: 280404e3 beq x8,x0,80004a30 + 80003fac: 3400006f jal x0,800042ec + +0000000080003fb0 : + 80003fb0: 00000013 addi x0,x0,0 + 80003fb4: 00000013 addi x0,x0,0 + 80003fb8: 00000013 addi x0,x0,0 + 80003fbc: 00000013 addi x0,x0,0 + 80003fc0: 00008517 auipc x10,0x8 + 80003fc4: 3bb50513 addi x10,x10,955 # 8000c37b + 80003fc8: 00000013 addi x0,x0,0 + 80003fcc: 00000013 addi x0,x0,0 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00027097 auipc x1,0x27 + 80003fe4: 5c4080e7 jalr x1,1476(x1) # 8002b5a4 + 80003fe8: 00007517 auipc x10,0x7 + 80003fec: 0c053503 ld x10,192(x10) # 8000b0a8 + 80003ff0: 04000593 addi x11,x0,64 + 80003ff4: 605000ef jal x1,80004df8 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00007517 auipc x10,0x7 + 80004004: 0f850513 addi x10,x10,248 # 8000b0f8 + 80004008: 00000013 addi x0,x0,0 + 8000400c: 00000013 addi x0,x0,0 + 80004010: 00000013 addi x0,x0,0 + 80004014: 00000013 addi x0,x0,0 + 80004018: 00000013 addi x0,x0,0 + 8000401c: 00000013 addi x0,x0,0 + 80004020: 00027097 auipc x1,0x27 + 80004024: 584080e7 jalr x1,1412(x1) # 8002b5a4 + 80004028: 00000013 addi x0,x0,0 + 8000402c: 00000013 addi x0,x0,0 + 80004030: 00000013 addi x0,x0,0 + 80004034: 00000013 addi x0,x0,0 + 80004038: 00000013 addi x0,x0,0 + 8000403c: 00000013 addi x0,x0,0 + 80004040: 00008517 auipc x10,0x8 + 80004044: 36650513 addi x10,x10,870 # 8000c3a6 + 80004048: 00000013 addi x0,x0,0 + 8000404c: 00000013 addi x0,x0,0 + 80004050: 00000013 addi x0,x0,0 + 80004054: 00000013 addi x0,x0,0 + 80004058: 00000013 addi x0,x0,0 + 8000405c: 00000013 addi x0,x0,0 + 80004060: 00027097 auipc x1,0x27 + 80004064: 544080e7 jalr x1,1348(x1) # 8002b5a4 + 80004068: 00007517 auipc x10,0x7 + 8000406c: 03853503 ld x10,56(x10) # 8000b0a0 + 80004070: 04000593 addi x11,x0,64 + 80004074: 585000ef jal x1,80004df8 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 07850513 addi x10,x10,120 # 8000b0f8 + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00027097 auipc x1,0x27 + 800040a4: 504080e7 jalr x1,1284(x1) # 8002b5a4 + 800040a8: 00007317 auipc x6,0x7 + 800040ac: ff833303 ld x6,-8(x6) # 8000b0a0 + 800040b0: 00007397 auipc x7,0x7 + 800040b4: ff83b383 ld x7,-8(x7) # 8000b0a8 + 800040b8: 10736a63 bltu x6,x7,800041cc + +00000000800040bc : + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00008517 auipc x10,0x8 + 800040c4: 31550513 addi x10,x10,789 # 8000c3d5 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00027097 auipc x1,0x27 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002b5a4 + 800040e8: 00000013 addi x0,x0,0 + 800040ec: 00000013 addi x0,x0,0 + 800040f0: 00000013 addi x0,x0,0 + 800040f4: 00000013 addi x0,x0,0 + 800040f8: 00000013 addi x0,x0,0 + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00008517 auipc x10,0x8 + 80004104: 33d50513 addi x10,x10,829 # 8000c43d + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00027097 auipc x1,0x27 + 80004124: 484080e7 jalr x1,1156(x1) # 8002b5a4 + 80004128: 00007317 auipc x6,0x7 + 8000412c: f7833303 ld x6,-136(x6) # 8000b0a0 + 80004130: 00007397 auipc x7,0x7 + 80004134: f783b383 ld x7,-136(x7) # 8000b0a8 + 80004138: 40730533 sub x10,x6,x7 + 8000413c: 04000593 addi x11,x0,64 + 80004140: 4b9000ef jal x1,80004df8 + 80004144: 00000013 addi x0,x0,0 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00007517 auipc x10,0x7 + 80004164: f9850513 addi x10,x10,-104 # 8000b0f8 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00027097 auipc x1,0x27 + 80004184: 424080e7 jalr x1,1060(x1) # 8002b5a4 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00008517 auipc x10,0x8 + 800041a4: 2c450513 addi x10,x10,708 # 8000c464 + 800041a8: 00000013 addi x0,x0,0 + 800041ac: 00000013 addi x0,x0,0 + 800041b0: 00000013 addi x0,x0,0 + 800041b4: 00000013 addi x0,x0,0 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00027097 auipc x1,0x27 + 800041c4: 3e4080e7 jalr x1,996(x1) # 8002b5a4 + 800041c8: 1dd0006f jal x0,80004ba4 + +00000000800041cc : + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00008517 auipc x10,0x8 + 800041e4: 22150513 addi x10,x10,545 # 8000c401 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00027097 auipc x1,0x27 + 80004204: 3a4080e7 jalr x1,932(x1) # 8002b5a4 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00008517 auipc x10,0x8 + 80004224: 21d50513 addi x10,x10,541 # 8000c43d + 80004228: 00000013 addi x0,x0,0 + 8000422c: 00000013 addi x0,x0,0 + 80004230: 00000013 addi x0,x0,0 + 80004234: 00000013 addi x0,x0,0 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00027097 auipc x1,0x27 + 80004244: 364080e7 jalr x1,868(x1) # 8002b5a4 + 80004248: 00007317 auipc x6,0x7 + 8000424c: e6033303 ld x6,-416(x6) # 8000b0a8 + 80004250: 00007397 auipc x7,0x7 + 80004254: e503b383 ld x7,-432(x7) # 8000b0a0 + 80004258: 40730533 sub x10,x6,x7 + 8000425c: 04000593 addi x11,x0,64 + 80004260: 399000ef jal x1,80004df8 + 80004264: 00000013 addi x0,x0,0 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: e7850513 addi x10,x10,-392 # 8000b0f8 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00027097 auipc x1,0x27 + 800042a4: 304080e7 jalr x1,772(x1) # 8002b5a4 + 800042a8: 00000013 addi x0,x0,0 + 800042ac: 00000013 addi x0,x0,0 + 800042b0: 00000013 addi x0,x0,0 + 800042b4: 00000013 addi x0,x0,0 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00008517 auipc x10,0x8 + 800042c4: 28c50513 addi x10,x10,652 # 8000c54c + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00027097 auipc x1,0x27 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002b5a4 + 800042e8: 0bd0006f jal x0,80004ba4 + +00000000800042ec : + 800042ec: 00000013 addi x0,x0,0 + 800042f0: 00000013 addi x0,x0,0 + 800042f4: 00000013 addi x0,x0,0 + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00008517 auipc x10,0x8 + 80004304: 33350513 addi x10,x10,819 # 8000c633 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 00027097 auipc x1,0x27 + 80004324: 284080e7 jalr x1,644(x1) # 8002b5a4 + 80004328: 00007517 auipc x10,0x7 + 8000432c: d9c52503 lw x10,-612(x10) # 8000b0c4 + 80004330: 04050a63 beq x10,x0,80004384 + 80004334: 00100593 addi x11,x0,1 + 80004338: 08b50663 beq x10,x11,800043c4 + 8000433c: 00200593 addi x11,x0,2 + 80004340: 0cb50263 beq x10,x11,80004404 + 80004344: 00300593 addi x11,x0,3 + 80004348: 0eb50e63 beq x10,x11,80004444 + 8000434c: 00000013 addi x0,x0,0 + 80004350: 00000013 addi x0,x0,0 + 80004354: 00000013 addi x0,x0,0 + 80004358: 00000013 addi x0,x0,0 + 8000435c: 00000013 addi x0,x0,0 + 80004360: 00008517 auipc x10,0x8 + 80004364: 30f50513 addi x10,x10,783 # 8000c66f + 80004368: 00000013 addi x0,x0,0 + 8000436c: 00000013 addi x0,x0,0 + 80004370: 00000013 addi x0,x0,0 + 80004374: 00000013 addi x0,x0,0 + 80004378: 00000013 addi x0,x0,0 + 8000437c: 00000013 addi x0,x0,0 + 80004380: 1000006f jal x0,80004480 + +0000000080004384 : + 80004384: 00000013 addi x0,x0,0 + 80004388: 00000013 addi x0,x0,0 + 8000438c: 00000013 addi x0,x0,0 + 80004390: 00000013 addi x0,x0,0 + 80004394: 00000013 addi x0,x0,0 + 80004398: 00000013 addi x0,x0,0 + 8000439c: 00000013 addi x0,x0,0 + 800043a0: 00008517 auipc x10,0x8 + 800043a4: 2ad50513 addi x10,x10,685 # 8000c64d + 800043a8: 00000013 addi x0,x0,0 + 800043ac: 00000013 addi x0,x0,0 + 800043b0: 00000013 addi x0,x0,0 + 800043b4: 00000013 addi x0,x0,0 + 800043b8: 00000013 addi x0,x0,0 + 800043bc: 00000013 addi x0,x0,0 + 800043c0: 0c00006f jal x0,80004480 + +00000000800043c4 : + 800043c4: 00000013 addi x0,x0,0 + 800043c8: 00000013 addi x0,x0,0 + 800043cc: 00000013 addi x0,x0,0 + 800043d0: 00000013 addi x0,x0,0 + 800043d4: 00000013 addi x0,x0,0 + 800043d8: 00000013 addi x0,x0,0 + 800043dc: 00000013 addi x0,x0,0 + 800043e0: 00008517 auipc x10,0x8 + 800043e4: 27550513 addi x10,x10,629 # 8000c655 + 800043e8: 00000013 addi x0,x0,0 + 800043ec: 00000013 addi x0,x0,0 + 800043f0: 00000013 addi x0,x0,0 + 800043f4: 00000013 addi x0,x0,0 + 800043f8: 00000013 addi x0,x0,0 + 800043fc: 00000013 addi x0,x0,0 + 80004400: 0800006f jal x0,80004480 + +0000000080004404 : + 80004404: 00000013 addi x0,x0,0 + 80004408: 00000013 addi x0,x0,0 + 8000440c: 00000013 addi x0,x0,0 + 80004410: 00000013 addi x0,x0,0 + 80004414: 00000013 addi x0,x0,0 + 80004418: 00000013 addi x0,x0,0 + 8000441c: 00000013 addi x0,x0,0 + 80004420: 00008517 auipc x10,0x8 + 80004424: 23d50513 addi x10,x10,573 # 8000c65d + 80004428: 00000013 addi x0,x0,0 + 8000442c: 00000013 addi x0,x0,0 + 80004430: 00000013 addi x0,x0,0 + 80004434: 00000013 addi x0,x0,0 + 80004438: 00000013 addi x0,x0,0 + 8000443c: 00000013 addi x0,x0,0 + 80004440: 0400006f jal x0,80004480 + +0000000080004444 : + 80004444: 00000013 addi x0,x0,0 + 80004448: 00000013 addi x0,x0,0 + 8000444c: 00000013 addi x0,x0,0 + 80004450: 00000013 addi x0,x0,0 + 80004454: 00000013 addi x0,x0,0 + 80004458: 00000013 addi x0,x0,0 + 8000445c: 00000013 addi x0,x0,0 + 80004460: 00008517 auipc x10,0x8 + 80004464: 20650513 addi x10,x10,518 # 8000c666 + 80004468: 00000013 addi x0,x0,0 + 8000446c: 00000013 addi x0,x0,0 + 80004470: 00000013 addi x0,x0,0 + 80004474: 00000013 addi x0,x0,0 + 80004478: 00000013 addi x0,x0,0 + 8000447c: 00000013 addi x0,x0,0 + +0000000080004480 : + 80004480: 00027097 auipc x1,0x27 + 80004484: 124080e7 jalr x1,292(x1) # 8002b5a4 + 80004488: 00000013 addi x0,x0,0 + 8000448c: 00000013 addi x0,x0,0 + 80004490: 00000013 addi x0,x0,0 + 80004494: 00000013 addi x0,x0,0 + 80004498: 00000013 addi x0,x0,0 + 8000449c: 00000013 addi x0,x0,0 + 800044a0: 00008517 auipc x10,0x8 + 800044a4: 1d850513 addi x10,x10,472 # 8000c678 + 800044a8: 00000013 addi x0,x0,0 + 800044ac: 00000013 addi x0,x0,0 + 800044b0: 00000013 addi x0,x0,0 + 800044b4: 00000013 addi x0,x0,0 + 800044b8: 00000013 addi x0,x0,0 + 800044bc: 00000013 addi x0,x0,0 + 800044c0: 00027097 auipc x1,0x27 + 800044c4: 0e4080e7 jalr x1,228(x1) # 8002b5a4 + 800044c8: 00007517 auipc x10,0x7 + 800044cc: bf852503 lw x10,-1032(x10) # 8000b0c0 + 800044d0: 00100593 addi x11,x0,1 + 800044d4: 06b50863 beq x10,x11,80004544 + 800044d8: 00200593 addi x11,x0,2 + 800044dc: 0ab50463 beq x10,x11,80004584 + 800044e0: 00300593 addi x11,x0,3 + 800044e4: 0eb50063 beq x10,x11,800045c4 + 800044e8: 00400593 addi x11,x0,4 + 800044ec: 10b50c63 beq x10,x11,80004604 + 800044f0: 00500593 addi x11,x0,5 + 800044f4: 14b50863 beq x10,x11,80004644 + 800044f8: 00600593 addi x11,x0,6 + 800044fc: 18b50463 beq x10,x11,80004684 + 80004500: 00700593 addi x11,x0,7 + 80004504: 1cb50063 beq x10,x11,800046c4 + 80004508: 00800593 addi x11,x0,8 + 8000450c: 1eb50c63 beq x10,x11,80004704 + 80004510: 00000013 addi x0,x0,0 + 80004514: 00000013 addi x0,x0,0 + 80004518: 00000013 addi x0,x0,0 + 8000451c: 00000013 addi x0,x0,0 + 80004520: 00008517 auipc x10,0x8 + 80004524: 2af50513 addi x10,x10,687 # 8000c7cf + 80004528: 00000013 addi x0,x0,0 + 8000452c: 00000013 addi x0,x0,0 + 80004530: 00000013 addi x0,x0,0 + 80004534: 00000013 addi x0,x0,0 + 80004538: 00000013 addi x0,x0,0 + 8000453c: 00000013 addi x0,x0,0 + 80004540: 2000006f jal x0,80004740 + +0000000080004544 : + 80004544: 00000013 addi x0,x0,0 + 80004548: 00000013 addi x0,x0,0 + 8000454c: 00000013 addi x0,x0,0 + 80004550: 00000013 addi x0,x0,0 + 80004554: 00000013 addi x0,x0,0 + 80004558: 00000013 addi x0,x0,0 + 8000455c: 00000013 addi x0,x0,0 + 80004560: 00008517 auipc x10,0x8 + 80004564: 13250513 addi x10,x10,306 # 8000c692 + 80004568: 00000013 addi x0,x0,0 + 8000456c: 00000013 addi x0,x0,0 + 80004570: 00000013 addi x0,x0,0 + 80004574: 00000013 addi x0,x0,0 + 80004578: 00000013 addi x0,x0,0 + 8000457c: 00000013 addi x0,x0,0 + 80004580: 1c00006f jal x0,80004740 + +0000000080004584 : + 80004584: 00000013 addi x0,x0,0 + 80004588: 00000013 addi x0,x0,0 + 8000458c: 00000013 addi x0,x0,0 + 80004590: 00000013 addi x0,x0,0 + 80004594: 00000013 addi x0,x0,0 + 80004598: 00000013 addi x0,x0,0 + 8000459c: 00000013 addi x0,x0,0 + 800045a0: 00008517 auipc x10,0x8 + 800045a4: 12350513 addi x10,x10,291 # 8000c6c3 + 800045a8: 00000013 addi x0,x0,0 + 800045ac: 00000013 addi x0,x0,0 + 800045b0: 00000013 addi x0,x0,0 + 800045b4: 00000013 addi x0,x0,0 + 800045b8: 00000013 addi x0,x0,0 + 800045bc: 00000013 addi x0,x0,0 + 800045c0: 1800006f jal x0,80004740 + +00000000800045c4 : + 800045c4: 00000013 addi x0,x0,0 + 800045c8: 00000013 addi x0,x0,0 + 800045cc: 00000013 addi x0,x0,0 + 800045d0: 00000013 addi x0,x0,0 + 800045d4: 00000013 addi x0,x0,0 + 800045d8: 00000013 addi x0,x0,0 + 800045dc: 00000013 addi x0,x0,0 + 800045e0: 00008517 auipc x10,0x8 + 800045e4: 10350513 addi x10,x10,259 # 8000c6e3 + 800045e8: 00000013 addi x0,x0,0 + 800045ec: 00000013 addi x0,x0,0 + 800045f0: 00000013 addi x0,x0,0 + 800045f4: 00000013 addi x0,x0,0 + 800045f8: 00000013 addi x0,x0,0 + 800045fc: 00000013 addi x0,x0,0 + 80004600: 1400006f jal x0,80004740 + +0000000080004604 : + 80004604: 00000013 addi x0,x0,0 + 80004608: 00000013 addi x0,x0,0 + 8000460c: 00000013 addi x0,x0,0 + 80004610: 00000013 addi x0,x0,0 + 80004614: 00000013 addi x0,x0,0 + 80004618: 00000013 addi x0,x0,0 + 8000461c: 00000013 addi x0,x0,0 + 80004620: 00008517 auipc x10,0x8 + 80004624: 0e150513 addi x10,x10,225 # 8000c701 + 80004628: 00000013 addi x0,x0,0 + 8000462c: 00000013 addi x0,x0,0 + 80004630: 00000013 addi x0,x0,0 + 80004634: 00000013 addi x0,x0,0 + 80004638: 00000013 addi x0,x0,0 + 8000463c: 00000013 addi x0,x0,0 + 80004640: 1000006f jal x0,80004740 + +0000000080004644 : + 80004644: 00000013 addi x0,x0,0 + 80004648: 00000013 addi x0,x0,0 + 8000464c: 00000013 addi x0,x0,0 + 80004650: 00000013 addi x0,x0,0 + 80004654: 00000013 addi x0,x0,0 + 80004658: 00000013 addi x0,x0,0 + 8000465c: 00000013 addi x0,x0,0 + 80004660: 00008517 auipc x10,0x8 + 80004664: 0c050513 addi x10,x10,192 # 8000c720 + 80004668: 00000013 addi x0,x0,0 + 8000466c: 00000013 addi x0,x0,0 + 80004670: 00000013 addi x0,x0,0 + 80004674: 00000013 addi x0,x0,0 + 80004678: 00000013 addi x0,x0,0 + 8000467c: 00000013 addi x0,x0,0 + 80004680: 0c00006f jal x0,80004740 + +0000000080004684 : + 80004684: 00000013 addi x0,x0,0 + 80004688: 00000013 addi x0,x0,0 + 8000468c: 00000013 addi x0,x0,0 + 80004690: 00000013 addi x0,x0,0 + 80004694: 00000013 addi x0,x0,0 + 80004698: 00000013 addi x0,x0,0 + 8000469c: 00000013 addi x0,x0,0 + 800046a0: 00008517 auipc x10,0x8 + 800046a4: 0a850513 addi x10,x10,168 # 8000c748 + 800046a8: 00000013 addi x0,x0,0 + 800046ac: 00000013 addi x0,x0,0 + 800046b0: 00000013 addi x0,x0,0 + 800046b4: 00000013 addi x0,x0,0 + 800046b8: 00000013 addi x0,x0,0 + 800046bc: 00000013 addi x0,x0,0 + 800046c0: 0800006f jal x0,80004740 + +00000000800046c4 : + 800046c4: 00000013 addi x0,x0,0 + 800046c8: 00000013 addi x0,x0,0 + 800046cc: 00000013 addi x0,x0,0 + 800046d0: 00000013 addi x0,x0,0 + 800046d4: 00000013 addi x0,x0,0 + 800046d8: 00000013 addi x0,x0,0 + 800046dc: 00000013 addi x0,x0,0 + 800046e0: 00008517 auipc x10,0x8 + 800046e4: 09450513 addi x10,x10,148 # 8000c774 + 800046e8: 00000013 addi x0,x0,0 + 800046ec: 00000013 addi x0,x0,0 + 800046f0: 00000013 addi x0,x0,0 + 800046f4: 00000013 addi x0,x0,0 + 800046f8: 00000013 addi x0,x0,0 + 800046fc: 00000013 addi x0,x0,0 + 80004700: 0400006f jal x0,80004740 + +0000000080004704 : + 80004704: 00000013 addi x0,x0,0 + 80004708: 00000013 addi x0,x0,0 + 8000470c: 00000013 addi x0,x0,0 + 80004710: 00000013 addi x0,x0,0 + 80004714: 00000013 addi x0,x0,0 + 80004718: 00000013 addi x0,x0,0 + 8000471c: 00000013 addi x0,x0,0 + 80004720: 00008517 auipc x10,0x8 + 80004724: 08050513 addi x10,x10,128 # 8000c7a0 + 80004728: 00000013 addi x0,x0,0 + 8000472c: 00000013 addi x0,x0,0 + 80004730: 00000013 addi x0,x0,0 + 80004734: 00000013 addi x0,x0,0 + 80004738: 00000013 addi x0,x0,0 + 8000473c: 00000013 addi x0,x0,0 + +0000000080004740 : + 80004740: 00027097 auipc x1,0x27 + 80004744: e64080e7 jalr x1,-412(x1) # 8002b5a4 + 80004748: 00000013 addi x0,x0,0 + 8000474c: 00000013 addi x0,x0,0 + 80004750: 00000013 addi x0,x0,0 + 80004754: 00000013 addi x0,x0,0 + 80004758: 00000013 addi x0,x0,0 + 8000475c: 00000013 addi x0,x0,0 + 80004760: 00008517 auipc x10,0x8 + 80004764: 07e50513 addi x10,x10,126 # 8000c7de + 80004768: 00000013 addi x0,x0,0 + 8000476c: 00000013 addi x0,x0,0 + 80004770: 00000013 addi x0,x0,0 + 80004774: 00000013 addi x0,x0,0 + 80004778: 00000013 addi x0,x0,0 + 8000477c: 00000013 addi x0,x0,0 + 80004780: 00027097 auipc x1,0x27 + 80004784: e24080e7 jalr x1,-476(x1) # 8002b5a4 + 80004788: 00007517 auipc x10,0x7 + 8000478c: 92053503 ld x10,-1760(x10) # 8000b0a8 + 80004790: 04000593 addi x11,x0,64 + 80004794: 664000ef jal x1,80004df8 + 80004798: 00000013 addi x0,x0,0 + 8000479c: 00000013 addi x0,x0,0 + 800047a0: 00007517 auipc x10,0x7 + 800047a4: 95850513 addi x10,x10,-1704 # 8000b0f8 + 800047a8: 00000013 addi x0,x0,0 + 800047ac: 00000013 addi x0,x0,0 + 800047b0: 00000013 addi x0,x0,0 + 800047b4: 00000013 addi x0,x0,0 + 800047b8: 00000013 addi x0,x0,0 + 800047bc: 00000013 addi x0,x0,0 + 800047c0: 00027097 auipc x1,0x27 + 800047c4: de4080e7 jalr x1,-540(x1) # 8002b5a4 + 800047c8: 00000013 addi x0,x0,0 + 800047cc: 00000013 addi x0,x0,0 + 800047d0: 00000013 addi x0,x0,0 + 800047d4: 00000013 addi x0,x0,0 + 800047d8: 00000013 addi x0,x0,0 + 800047dc: 00000013 addi x0,x0,0 + 800047e0: 00008517 auipc x10,0x8 + 800047e4: 01550513 addi x10,x10,21 # 8000c7f5 + 800047e8: 00000013 addi x0,x0,0 + 800047ec: 00000013 addi x0,x0,0 + 800047f0: 00000013 addi x0,x0,0 + 800047f4: 00000013 addi x0,x0,0 + 800047f8: 00000013 addi x0,x0,0 + 800047fc: 00000013 addi x0,x0,0 + 80004800: 00027097 auipc x1,0x27 + 80004804: da4080e7 jalr x1,-604(x1) # 8002b5a4 + 80004808: 00007517 auipc x10,0x7 + 8000480c: 89853503 ld x10,-1896(x10) # 8000b0a0 + 80004810: 04000593 addi x11,x0,64 + 80004814: 5e4000ef jal x1,80004df8 + 80004818: 00000013 addi x0,x0,0 + 8000481c: 00000013 addi x0,x0,0 + 80004820: 00007517 auipc x10,0x7 + 80004824: 8d850513 addi x10,x10,-1832 # 8000b0f8 + 80004828: 00000013 addi x0,x0,0 + 8000482c: 00000013 addi x0,x0,0 + 80004830: 00000013 addi x0,x0,0 + 80004834: 00000013 addi x0,x0,0 + 80004838: 00000013 addi x0,x0,0 + 8000483c: 00000013 addi x0,x0,0 + 80004840: 00027097 auipc x1,0x27 + 80004844: d64080e7 jalr x1,-668(x1) # 8002b5a4 + 80004848: 00007517 auipc x10,0x7 + 8000484c: 87852503 lw x10,-1928(x10) # 8000b0c0 + 80004850: 00200593 addi x11,x0,2 + 80004854: 08b51463 bne x10,x11,800048dc + 80004858: 00000013 addi x0,x0,0 + 8000485c: 00000013 addi x0,x0,0 + 80004860: 00008517 auipc x10,0x8 + 80004864: fac50513 addi x10,x10,-84 # 8000c80c + 80004868: 00000013 addi x0,x0,0 + 8000486c: 00000013 addi x0,x0,0 + 80004870: 00000013 addi x0,x0,0 + 80004874: 00000013 addi x0,x0,0 + 80004878: 00000013 addi x0,x0,0 + 8000487c: 00000013 addi x0,x0,0 + 80004880: 00027097 auipc x1,0x27 + 80004884: d24080e7 jalr x1,-732(x1) # 8002b5a4 + 80004888: 00007517 auipc x10,0x7 + 8000488c: 82053503 ld x10,-2016(x10) # 8000b0a8 + 80004890: 284000ef jal x1,80004b14 + 80004894: 00027097 auipc x1,0x27 + 80004898: d10080e7 jalr x1,-752(x1) # 8002b5a4 + 8000489c: 00000013 addi x0,x0,0 + 800048a0: 00008517 auipc x10,0x8 + 800048a4: f8350513 addi x10,x10,-125 # 8000c823 + 800048a8: 00000013 addi x0,x0,0 + 800048ac: 00000013 addi x0,x0,0 + 800048b0: 00000013 addi x0,x0,0 + 800048b4: 00000013 addi x0,x0,0 + 800048b8: 00000013 addi x0,x0,0 + 800048bc: 00000013 addi x0,x0,0 + 800048c0: 00027097 auipc x1,0x27 + 800048c4: ce4080e7 jalr x1,-796(x1) # 8002b5a4 + 800048c8: 00006517 auipc x10,0x6 + 800048cc: 7d853503 ld x10,2008(x10) # 8000b0a0 + 800048d0: 244000ef jal x1,80004b14 + 800048d4: 00027097 auipc x1,0x27 + 800048d8: cd0080e7 jalr x1,-816(x1) # 8002b5a4 + +00000000800048dc : + 800048dc: 00000097 auipc x1,0x0 + 800048e0: 314080e7 jalr x1,788(x1) # 80004bf0 + 800048e4: 00006517 auipc x10,0x6 + 800048e8: 7dc52503 lw x10,2012(x10) # 8000b0c0 + 800048ec: 00100593 addi x11,x0,1 + 800048f0: 02b51e63 bne x10,x11,8000492c + 800048f4: 00000013 addi x0,x0,0 + 800048f8: 00000013 addi x0,x0,0 + 800048fc: 00000013 addi x0,x0,0 + 80004900: 00008517 auipc x10,0x8 + 80004904: f9950513 addi x10,x10,-103 # 8000c899 + 80004908: 00000013 addi x0,x0,0 + 8000490c: 00000013 addi x0,x0,0 + 80004910: 00000013 addi x0,x0,0 + 80004914: 00000013 addi x0,x0,0 + 80004918: 00000013 addi x0,x0,0 + 8000491c: 00000013 addi x0,x0,0 + 80004920: 00027097 auipc x1,0x27 + 80004924: c84080e7 jalr x1,-892(x1) # 8002b5a4 + 80004928: 27c0006f jal x0,80004ba4 + 8000492c: 00200593 addi x11,x0,2 + 80004930: 02b51e63 bne x10,x11,8000496c + 80004934: 00000013 addi x0,x0,0 + 80004938: 00000013 addi x0,x0,0 + 8000493c: 00000013 addi x0,x0,0 + 80004940: 00008517 auipc x10,0x8 + 80004944: 02f50513 addi x10,x10,47 # 8000c96f + 80004948: 00000013 addi x0,x0,0 + 8000494c: 00000013 addi x0,x0,0 + 80004950: 00000013 addi x0,x0,0 + 80004954: 00000013 addi x0,x0,0 + 80004958: 00000013 addi x0,x0,0 + 8000495c: 00000013 addi x0,x0,0 + 80004960: 00027097 auipc x1,0x27 + 80004964: c44080e7 jalr x1,-956(x1) # 8002b5a4 + 80004968: 23c0006f jal x0,80004ba4 + 8000496c: 00300593 addi x11,x0,3 + 80004970: 02b51e63 bne x10,x11,800049ac + 80004974: 00000013 addi x0,x0,0 + 80004978: 00000013 addi x0,x0,0 + 8000497c: 00000013 addi x0,x0,0 + 80004980: 00008517 auipc x10,0x8 + 80004984: 0e250513 addi x10,x10,226 # 8000ca62 + 80004988: 00000013 addi x0,x0,0 + 8000498c: 00000013 addi x0,x0,0 + 80004990: 00000013 addi x0,x0,0 + 80004994: 00000013 addi x0,x0,0 + 80004998: 00000013 addi x0,x0,0 + 8000499c: 00000013 addi x0,x0,0 + 800049a0: 00027097 auipc x1,0x27 + 800049a4: c04080e7 jalr x1,-1020(x1) # 8002b5a4 + 800049a8: 1fc0006f jal x0,80004ba4 + 800049ac: 00400593 addi x11,x0,4 + 800049b0: 02b51e63 bne x10,x11,800049ec + 800049b4: 00000013 addi x0,x0,0 + 800049b8: 00000013 addi x0,x0,0 + 800049bc: 00000013 addi x0,x0,0 + 800049c0: 00008517 auipc x10,0x8 + 800049c4: 19d50513 addi x10,x10,413 # 8000cb5d + 800049c8: 00000013 addi x0,x0,0 + 800049cc: 00000013 addi x0,x0,0 + 800049d0: 00000013 addi x0,x0,0 + 800049d4: 00000013 addi x0,x0,0 + 800049d8: 00000013 addi x0,x0,0 + 800049dc: 00000013 addi x0,x0,0 + 800049e0: 00027097 auipc x1,0x27 + 800049e4: bc4080e7 jalr x1,-1084(x1) # 8002b5a4 + 800049e8: 1bc0006f jal x0,80004ba4 + 800049ec: 00500593 addi x11,x0,5 + 800049f0: 02b51e63 bne x10,x11,80004a2c + 800049f4: 00000013 addi x0,x0,0 + 800049f8: 00000013 addi x0,x0,0 + 800049fc: 00000013 addi x0,x0,0 + 80004a00: 00008517 auipc x10,0x8 + 80004a04: 24450513 addi x10,x10,580 # 8000cc44 + 80004a08: 00000013 addi x0,x0,0 + 80004a0c: 00000013 addi x0,x0,0 + 80004a10: 00000013 addi x0,x0,0 + 80004a14: 00000013 addi x0,x0,0 + 80004a18: 00000013 addi x0,x0,0 + 80004a1c: 00000013 addi x0,x0,0 + 80004a20: 00027097 auipc x1,0x27 + 80004a24: b84080e7 jalr x1,-1148(x1) # 8002b5a4 + 80004a28: 17c0006f jal x0,80004ba4 + 80004a2c: 1780006f jal x0,80004ba4 + +0000000080004a30 : + 80004a30: 00000013 addi x0,x0,0 + 80004a34: 00000013 addi x0,x0,0 + 80004a38: 00000013 addi x0,x0,0 + 80004a3c: 00000013 addi x0,x0,0 + 80004a40: 00008517 auipc x10,0x8 + 80004a44: e1150513 addi x10,x10,-495 # 8000c851 + 80004a48: 00000013 addi x0,x0,0 + 80004a4c: 00000013 addi x0,x0,0 + 80004a50: 00000013 addi x0,x0,0 + 80004a54: 00000013 addi x0,x0,0 + 80004a58: 00000013 addi x0,x0,0 + 80004a5c: 00000013 addi x0,x0,0 + 80004a60: 00027097 auipc x1,0x27 + 80004a64: b44080e7 jalr x1,-1212(x1) # 8002b5a4 + 80004a68: 00006617 auipc x12,0x6 + 80004a6c: 67063603 ld x12,1648(x12) # 8000b0d8 + 80004a70: 00000013 addi x0,x0,0 + 80004a74: 00000013 addi x0,x0,0 + 80004a78: 00000013 addi x0,x0,0 + 80004a7c: 00000013 addi x0,x0,0 + 80004a80: 00007517 auipc x10,0x7 + 80004a84: dba50513 addi x10,x10,-582 # 8000b83a + 80004a88: 00000013 addi x0,x0,0 + 80004a8c: 00000013 addi x0,x0,0 + 80004a90: 00000013 addi x0,x0,0 + 80004a94: 00000013 addi x0,x0,0 + 80004a98: 00000013 addi x0,x0,0 + 80004a9c: 00000013 addi x0,x0,0 + 80004aa0: 00027097 auipc x1,0x27 + 80004aa4: b04080e7 jalr x1,-1276(x1) # 8002b5a4 + 80004aa8: 00065503 lhu x10,0(x12) + 80004aac: 01000593 addi x11,x0,16 + 80004ab0: 00357413 andi x8,x10,3 + 80004ab4: 00300493 addi x9,x0,3 + 80004ab8: 00941a63 bne x8,x9,80004acc + 80004abc: 00265403 lhu x8,2(x12) + 80004ac0: 01041413 slli x8,x8,0x10 + 80004ac4: 00856533 or x10,x10,x8 + 80004ac8: 02000593 addi x11,x0,32 + 80004acc: 32c000ef jal x1,80004df8 + 80004ad0: 00000013 addi x0,x0,0 + 80004ad4: 00000013 addi x0,x0,0 + 80004ad8: 00000013 addi x0,x0,0 + 80004adc: 00000013 addi x0,x0,0 + 80004ae0: 00006517 auipc x10,0x6 + 80004ae4: 61850513 addi x10,x10,1560 # 8000b0f8 + 80004ae8: 00000013 addi x0,x0,0 + 80004aec: 00000013 addi x0,x0,0 + 80004af0: 00000013 addi x0,x0,0 + 80004af4: 00000013 addi x0,x0,0 + 80004af8: 00000013 addi x0,x0,0 + 80004afc: 00000013 addi x0,x0,0 + 80004b00: 00027097 auipc x1,0x27 + 80004b04: aa4080e7 jalr x1,-1372(x1) # 8002b5a4 + 80004b08: 00000097 auipc x1,0x0 + 80004b0c: 0e8080e7 jalr x1,232(x1) # 80004bf0 + 80004b10: 0940006f jal x0,80004ba4 + +0000000080004b14 : + 80004b14: 02054463 blt x10,x0,80004b3c + +0000000080004b18 : + 80004b18: 01800593 addi x11,x0,24 + 80004b1c: 04b55863 bge x10,x11,80004b6c + 80004b20: 00006597 auipc x11,0x6 + 80004b24: 60058593 addi x11,x11,1536 # 8000b120 + 80004b28: 00251613 slli x12,x10,0x2 + 80004b2c: 00351613 slli x12,x10,0x3 + 80004b30: 00c585b3 add x11,x11,x12 + 80004b34: 0005b503 ld x10,0(x11) + 80004b38: 00008067 jalr x0,0(x1) + +0000000080004b3c : + 80004b3c: 00100593 addi x11,x0,1 + 80004b40: 03f59593 slli x11,x11,0x3f + 80004b44: 00b54533 xor x10,x10,x11 + 80004b48: 01000593 addi x11,x0,16 + 80004b4c: 02b55063 bge x10,x11,80004b6c + 80004b50: 00006597 auipc x11,0x6 + 80004b54: 69058593 addi x11,x11,1680 # 8000b1e0 + 80004b58: 00251613 slli x12,x10,0x2 + 80004b5c: 00351613 slli x12,x10,0x3 + 80004b60: 00c585b3 add x11,x11,x12 + 80004b64: 0005b503 ld x10,0(x11) + 80004b68: 00008067 jalr x0,0(x1) + +0000000080004b6c : + 80004b6c: 00000013 addi x0,x0,0 + 80004b70: 00000013 addi x0,x0,0 + 80004b74: 00000013 addi x0,x0,0 + 80004b78: 00000013 addi x0,x0,0 + 80004b7c: 00000013 addi x0,x0,0 + 80004b80: 00007517 auipc x10,0x7 + 80004b84: ade50513 addi x10,x10,-1314 # 8000b65e + 80004b88: 00000013 addi x0,x0,0 + 80004b8c: 00000013 addi x0,x0,0 + 80004b90: 00000013 addi x0,x0,0 + 80004b94: 00000013 addi x0,x0,0 + 80004b98: 00000013 addi x0,x0,0 + 80004b9c: 00000013 addi x0,x0,0 + 80004ba0: 00008067 jalr x0,0(x1) + +0000000080004ba4 : + 80004ba4: 00000013 addi x0,x0,0 + 80004ba8: 00000013 addi x0,x0,0 + 80004bac: 00000013 addi x0,x0,0 + 80004bb0: 00000013 addi x0,x0,0 + 80004bb4: 00000013 addi x0,x0,0 + 80004bb8: 00000013 addi x0,x0,0 + 80004bbc: 00000013 addi x0,x0,0 + 80004bc0: 00007517 auipc x10,0x7 + 80004bc4: 73250513 addi x10,x10,1842 # 8000c2f2 + 80004bc8: 00000013 addi x0,x0,0 + 80004bcc: 00000013 addi x0,x0,0 + 80004bd0: 00000013 addi x0,x0,0 + 80004bd4: 00000013 addi x0,x0,0 + 80004bd8: 00000013 addi x0,x0,0 + 80004bdc: 00000013 addi x0,x0,0 + 80004be0: 00027097 auipc x1,0x27 + 80004be4: 9c4080e7 jalr x1,-1596(x1) # 8002b5a4 + +0000000080004be8 : + 80004be8: 00027097 auipc x1,0x27 + 80004bec: a1c080e7 jalr x1,-1508(x1) # 8002b604 + +0000000080004bf0 : + 80004bf0: 00006617 auipc x12,0x6 + 80004bf4: 4e060613 addi x12,x12,1248 # 8000b0d0 + 80004bf8: 00163023 sd x1,0(x12) + 80004bfc: 00000013 addi x0,x0,0 + 80004c00: 00007517 auipc x10,0x7 + 80004c04: c5b50513 addi x10,x10,-933 # 8000b85b + 80004c08: 00000013 addi x0,x0,0 + 80004c0c: 00000013 addi x0,x0,0 + 80004c10: 00000013 addi x0,x0,0 + 80004c14: 00000013 addi x0,x0,0 + 80004c18: 00000013 addi x0,x0,0 + 80004c1c: 00000013 addi x0,x0,0 + 80004c20: 00027097 auipc x1,0x27 + 80004c24: 984080e7 jalr x1,-1660(x1) # 8002b5a4 + 80004c28: 00006517 auipc x10,0x6 + 80004c2c: 4b053503 ld x10,1200(x10) # 8000b0d8 + 80004c30: 04000593 addi x11,x0,64 + 80004c34: 1c4000ef jal x1,80004df8 + 80004c38: 00000013 addi x0,x0,0 + 80004c3c: 00000013 addi x0,x0,0 + 80004c40: 00006517 auipc x10,0x6 + 80004c44: 4b850513 addi x10,x10,1208 # 8000b0f8 + 80004c48: 00000013 addi x0,x0,0 + 80004c4c: 00000013 addi x0,x0,0 + 80004c50: 00000013 addi x0,x0,0 + 80004c54: 00000013 addi x0,x0,0 + 80004c58: 00000013 addi x0,x0,0 + 80004c5c: 00000013 addi x0,x0,0 + 80004c60: 00027097 auipc x1,0x27 + 80004c64: 944080e7 jalr x1,-1724(x1) # 8002b5a4 + 80004c68: 00000013 addi x0,x0,0 + 80004c6c: 00000013 addi x0,x0,0 + 80004c70: 00000013 addi x0,x0,0 + 80004c74: 00000013 addi x0,x0,0 + 80004c78: 00000013 addi x0,x0,0 + 80004c7c: 00000013 addi x0,x0,0 + 80004c80: 00007517 auipc x10,0x7 + 80004c84: beb50513 addi x10,x10,-1045 # 8000b86b + 80004c88: 00000013 addi x0,x0,0 + 80004c8c: 00000013 addi x0,x0,0 + 80004c90: 00000013 addi x0,x0,0 + 80004c94: 00000013 addi x0,x0,0 + 80004c98: 00000013 addi x0,x0,0 + 80004c9c: 00000013 addi x0,x0,0 + 80004ca0: 00027097 auipc x1,0x27 + 80004ca4: 904080e7 jalr x1,-1788(x1) # 8002b5a4 + 80004ca8: 00006517 auipc x10,0x6 + 80004cac: 43853503 ld x10,1080(x10) # 8000b0e0 + 80004cb0: 04000593 addi x11,x0,64 + 80004cb4: 144000ef jal x1,80004df8 + 80004cb8: 00000013 addi x0,x0,0 + 80004cbc: 00000013 addi x0,x0,0 + 80004cc0: 00006517 auipc x10,0x6 + 80004cc4: 43850513 addi x10,x10,1080 # 8000b0f8 + 80004cc8: 00000013 addi x0,x0,0 + 80004ccc: 00000013 addi x0,x0,0 + 80004cd0: 00000013 addi x0,x0,0 + 80004cd4: 00000013 addi x0,x0,0 + 80004cd8: 00000013 addi x0,x0,0 + 80004cdc: 00000013 addi x0,x0,0 + 80004ce0: 00027097 auipc x1,0x27 + 80004ce4: 8c4080e7 jalr x1,-1852(x1) # 8002b5a4 + 80004ce8: 00000013 addi x0,x0,0 + 80004cec: 00000013 addi x0,x0,0 + 80004cf0: 00000013 addi x0,x0,0 + 80004cf4: 00000013 addi x0,x0,0 + 80004cf8: 00000013 addi x0,x0,0 + 80004cfc: 00000013 addi x0,x0,0 + 80004d00: 00007517 auipc x10,0x7 + 80004d04: b7b50513 addi x10,x10,-1157 # 8000b87b + 80004d08: 00000013 addi x0,x0,0 + 80004d0c: 00000013 addi x0,x0,0 + 80004d10: 00000013 addi x0,x0,0 + 80004d14: 00000013 addi x0,x0,0 + 80004d18: 00000013 addi x0,x0,0 + 80004d1c: 00000013 addi x0,x0,0 + 80004d20: 00027097 auipc x1,0x27 + 80004d24: 884080e7 jalr x1,-1916(x1) # 8002b5a4 + 80004d28: 00006517 auipc x10,0x6 + 80004d2c: 3c053503 ld x10,960(x10) # 8000b0e8 + 80004d30: 04000593 addi x11,x0,64 + 80004d34: 0c4000ef jal x1,80004df8 + 80004d38: 00000013 addi x0,x0,0 + 80004d3c: 00000013 addi x0,x0,0 + 80004d40: 00006517 auipc x10,0x6 + 80004d44: 3b850513 addi x10,x10,952 # 8000b0f8 + 80004d48: 00000013 addi x0,x0,0 + 80004d4c: 00000013 addi x0,x0,0 + 80004d50: 00000013 addi x0,x0,0 + 80004d54: 00000013 addi x0,x0,0 + 80004d58: 00000013 addi x0,x0,0 + 80004d5c: 00000013 addi x0,x0,0 + 80004d60: 00027097 auipc x1,0x27 + 80004d64: 844080e7 jalr x1,-1980(x1) # 8002b5a4 + 80004d68: 00000013 addi x0,x0,0 + 80004d6c: 00000013 addi x0,x0,0 + 80004d70: 00000013 addi x0,x0,0 + 80004d74: 00000013 addi x0,x0,0 + 80004d78: 00000013 addi x0,x0,0 + 80004d7c: 00000013 addi x0,x0,0 + 80004d80: 00007517 auipc x10,0x7 + 80004d84: b0b50513 addi x10,x10,-1269 # 8000b88b + 80004d88: 00000013 addi x0,x0,0 + 80004d8c: 00000013 addi x0,x0,0 + 80004d90: 00000013 addi x0,x0,0 + 80004d94: 00000013 addi x0,x0,0 + 80004d98: 00000013 addi x0,x0,0 + 80004d9c: 00000013 addi x0,x0,0 + 80004da0: 00027097 auipc x1,0x27 + 80004da4: 804080e7 jalr x1,-2044(x1) # 8002b5a4 + 80004da8: 00006517 auipc x10,0x6 + 80004dac: 34853503 ld x10,840(x10) # 8000b0f0 + 80004db0: 04000593 addi x11,x0,64 + 80004db4: 044000ef jal x1,80004df8 + 80004db8: 00000013 addi x0,x0,0 + 80004dbc: 00000013 addi x0,x0,0 + 80004dc0: 00006517 auipc x10,0x6 + 80004dc4: 33850513 addi x10,x10,824 # 8000b0f8 + 80004dc8: 00000013 addi x0,x0,0 + 80004dcc: 00000013 addi x0,x0,0 + 80004dd0: 00000013 addi x0,x0,0 + 80004dd4: 00000013 addi x0,x0,0 + 80004dd8: 00000013 addi x0,x0,0 + 80004ddc: 00000013 addi x0,x0,0 + 80004de0: 00026097 auipc x1,0x26 + 80004de4: 7c4080e7 jalr x1,1988(x1) # 8002b5a4 + 80004de8: 00006617 auipc x12,0x6 + 80004dec: 2e860613 addi x12,x12,744 # 8000b0d0 + 80004df0: 00063083 ld x1,0(x12) + 80004df4: 00008067 jalr x0,0(x1) + +0000000080004df8 : + 80004df8: 00000013 addi x0,x0,0 + 80004dfc: 00000013 addi x0,x0,0 + 80004e00: 00006617 auipc x12,0x6 + 80004e04: 2f860613 addi x12,x12,760 # 8000b0f8 + 80004e08: 00000013 addi x0,x0,0 + 80004e0c: 00000013 addi x0,x0,0 + 80004e10: 00000013 addi x0,x0,0 + 80004e14: 00000013 addi x0,x0,0 + 80004e18: 00000013 addi x0,x0,0 + 80004e1c: 00000013 addi x0,x0,0 + 80004e20: 03000693 addi x13,x0,48 + 80004e24: 00d60023 sb x13,0(x12) + 80004e28: 07800693 addi x13,x0,120 + 80004e2c: 00d600a3 sb x13,1(x12) + 80004e30: 00260613 addi x12,x12,2 + 80004e34: 00058693 addi x13,x11,0 + +0000000080004e38 : + 80004e38: ffc68693 addi x13,x13,-4 + 80004e3c: 00d55733 srl x14,x10,x13 + 80004e40: 00f77713 andi x14,x14,15 + 80004e44: 00a00793 addi x15,x0,10 + 80004e48: 00f74663 blt x14,x15,80004e54 + 80004e4c: 05770713 addi x14,x14,87 + 80004e50: 0080006f jal x0,80004e58 + +0000000080004e54 : + 80004e54: 03070713 addi x14,x14,48 + +0000000080004e58 : + 80004e58: 00e60023 sb x14,0(x12) + 80004e5c: 00160613 addi x12,x12,1 + 80004e60: fc069ce3 bne x13,x0,80004e38 + 80004e64: 00a00693 addi x13,x0,10 + 80004e68: 00d60023 sb x13,0(x12) + 80004e6c: 000600a3 sb x0,1(x12) + 80004e70: 00008067 jalr x0,0(x1) + +0000000080004e74 : + 80004e74: 00a00693 addi x13,x0,10 + 80004e78: 02d54663 blt x10,x13,80004ea4 + 80004e7c: ff650513 addi x10,x10,-10 + 80004e80: 03100713 addi x14,x0,49 + 80004e84: 00d54c63 blt x10,x13,80004e9c + 80004e88: ff650513 addi x10,x10,-10 + 80004e8c: 03200713 addi x14,x0,50 + 80004e90: 00d54663 blt x10,x13,80004e9c + 80004e94: ff650513 addi x10,x10,-10 + 80004e98: 03300713 addi x14,x0,51 + 80004e9c: 00e60023 sb x14,0(x12) + 80004ea0: 00160613 addi x12,x12,1 + 80004ea4: 03050513 addi x10,x10,48 + 80004ea8: 00a60023 sb x10,0(x12) + 80004eac: 00a00693 addi x13,x0,10 + 80004eb0: 00d600a3 sb x13,1(x12) + 80004eb4: 00060123 sb x0,2(x12) + 80004eb8: 00008067 jalr x0,0(x1) + 80004ebc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002b000 : + 8002b000: 10010737 lui x14,0x10010 + 8002b004: 00072023 sw x0,0(x14) # 10010000 + 8002b008: fffd8397 auipc x7,0xfffd8 + 8002b00c: db038393 addi x7,x7,-592 # 80002db8 + 8002b010: 00038067 jalr x0,0(x7) + +000000008002b014 : + 8002b014: fff00713 addi x14,x0,-1 + 8002b018: 100143b7 lui x7,0x10014 + 8002b01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002b020: fffd8397 auipc x7,0xfffd8 + 8002b024: d9838393 addi x7,x7,-616 # 80002db8 + 8002b028: 00038067 jalr x0,0(x7) + +000000008002b02c : + 8002b02c: 10000737 lui x14,0x10000 + 8002b030: 0107071b addiw x14,x14,16 # 10000010 + 8002b034: 00070023 sb x0,0(x14) + 8002b038: fffd8397 auipc x7,0xfffd8 + 8002b03c: d8038393 addi x7,x7,-640 # 80002db8 + 8002b040: 00038067 jalr x0,0(x7) + +000000008002b044 : + 8002b044: 00200393 addi x7,x0,2 + 8002b048: 3443b073 csrrc x0,mip,x7 + 8002b04c: fffd8397 auipc x7,0xfffd8 + 8002b050: d6c38393 addi x7,x7,-660 # 80002db8 + 8002b054: 00038067 jalr x0,0(x7) + +000000008002b058 : + 8002b058: fffd8397 auipc x7,0xfffd8 + 8002b05c: d6038393 addi x7,x7,-672 # 80002db8 + 8002b060: 00038067 jalr x0,0(x7) + +000000008002b064 : + 8002b064: 20000413 addi x8,x0,512 + 8002b068: 34443073 csrrc x0,mip,x8 + 8002b06c: 34402473 csrrs x8,mip,x0 + 8002b070: 00001337 lui x6,0x1 + 8002b074: 8003031b addiw x6,x6,-2048 # 800 + 8002b078: 00647433 and x8,x8,x6 + 8002b07c: 00830863 beq x6,x8,8002b08c + 8002b080: 10000737 lui x14,0x10000 + 8002b084: 0187071b addiw x14,x14,24 # 10000018 + 8002b088: 00070023 sb x0,0(x14) + 8002b08c: fffd8397 auipc x7,0xfffd8 + 8002b090: d2c38393 addi x7,x7,-724 # 80002db8 + 8002b094: 00038067 jalr x0,0(x7) + +000000008002b098 : + 8002b098: fffd7317 auipc x6,0xfffd7 + 8002b09c: e5830313 addi x6,x6,-424 # 80001ef0 + 8002b0a0: 00030067 jalr x0,0(x6) + 8002b0a4: fffd8397 auipc x7,0xfffd8 + 8002b0a8: d1438393 addi x7,x7,-748 # 80002db8 + 8002b0ac: 00038067 jalr x0,0(x7) + +000000008002b0b0 : + 8002b0b0: fffd7317 auipc x6,0xfffd7 + 8002b0b4: e4030313 addi x6,x6,-448 # 80001ef0 + 8002b0b8: 00030067 jalr x0,0(x6) + 8002b0bc: fffd8397 auipc x7,0xfffd8 + 8002b0c0: cfc38393 addi x7,x7,-772 # 80002db8 + 8002b0c4: 00038067 jalr x0,0(x7) + +000000008002b0c8 : + 8002b0c8: fffd7317 auipc x6,0xfffd7 + 8002b0cc: e2830313 addi x6,x6,-472 # 80001ef0 + 8002b0d0: 00030067 jalr x0,0(x6) + 8002b0d4: fffd8397 auipc x7,0xfffd8 + 8002b0d8: ce438393 addi x7,x7,-796 # 80002db8 + 8002b0dc: 00038067 jalr x0,0(x7) + +000000008002b0e0 : + 8002b0e0: 30401073 csrrw x0,mie,x0 + 8002b0e4: 34401073 csrrw x0,mip,x0 + 8002b0e8: 34101073 csrrw x0,mepc,x0 + 8002b0ec: 34301073 csrrw x0,mtval,x0 + 8002b0f0: 34201073 csrrw x0,mcause,x0 + 8002b0f4: 00000013 addi x0,x0,0 + 8002b0f8: 00000013 addi x0,x0,0 + 8002b0fc: 00000013 addi x0,x0,0 + 8002b100: fffdd317 auipc x6,0xfffdd + 8002b104: 01030313 addi x6,x6,16 # 80008110 + 8002b108: 00000013 addi x0,x0,0 + 8002b10c: 00000013 addi x0,x0,0 + 8002b110: 00000013 addi x0,x0,0 + 8002b114: 00000013 addi x0,x0,0 + 8002b118: 00000013 addi x0,x0,0 + 8002b11c: 00000013 addi x0,x0,0 + +000000008002b120 : + 8002b120: 34031473 csrrw x8,mscratch,x6 + 8002b124: 2c833823 sd x8,720(x6) + +000000008002b128 : + 8002b128: fff00393 addi x7,x0,-1 + 8002b12c: 000044b7 lui x9,0x4 + 8002b130: 00548493 addi x9,x9,5 # 4005 + 8002b134: 00e49493 slli x9,x9,0xe + 8002b138: 0074b023 sd x7,0(x9) + 8002b13c: 00000013 addi x0,x0,0 + +000000008002b140 : + 8002b140: 00000393 addi x7,x0,0 + 8002b144: 2a733c23 sd x7,696(x6) + +000000008002b148 : + 8002b148: 30502473 csrrs x8,mtvec,x0 + 8002b14c: 2c833423 sd x8,712(x6) + 8002b150: 00347393 andi x7,x8,3 + 8002b154: ffc3f393 andi x7,x7,-4 + 8002b158: 2b033483 ld x9,688(x6) + 8002b15c: da848493 addi x9,x9,-600 + 8002b160: 0074e3b3 or x7,x9,x7 + 8002b164: 2c733023 sd x7,704(x6) + 8002b168: 30539073 csrrw x0,mtvec,x7 + 8002b16c: 30502773 csrrs x14,mtvec,x0 + 8002b170: 0e770a63 beq x14,x7,8002b264 + 8002b174: 30541073 csrrw x0,mtvec,x8 + 8002b178: 0a040663 beq x8,x0,8002b224 + 8002b17c: 2c833023 sd x8,704(x6) + +000000008002b180 : + 8002b180: ffc47393 andi x7,x8,-4 + 8002b184: 25838413 addi x8,x7,600 + 8002b188: 00030113 addi x2,x6,0 + 8002b18c: 00000013 addi x0,x0,0 + 8002b190: 00000013 addi x0,x0,0 + 8002b194: 00000013 addi x0,x0,0 + 8002b198: 00000013 addi x0,x0,0 + 8002b19c: 00000013 addi x0,x0,0 + 8002b1a0: 00000717 auipc x14,0x0 + 8002b1a4: 04c70713 addi x14,x14,76 # 8002b1ec + 8002b1a8: 00000013 addi x0,x0,0 + 8002b1ac: 00000013 addi x0,x0,0 + 8002b1b0: 00000013 addi x0,x0,0 + 8002b1b4: 00000013 addi x0,x0,0 + 8002b1b8: 00000013 addi x0,x0,0 + 8002b1bc: 00000013 addi x0,x0,0 + 8002b1c0: 00000797 auipc x15,0x0 + 8002b1c4: 0a478793 addi x15,x15,164 # 8002b264 + 8002b1c8: 00000013 addi x0,x0,0 + 8002b1cc: 00000013 addi x0,x0,0 + 8002b1d0: 00000013 addi x0,x0,0 + 8002b1d4: 00000013 addi x0,x0,0 + 8002b1d8: 00000013 addi x0,x0,0 + 8002b1dc: 00000013 addi x0,x0,0 + 8002b1e0: 00f3f663 bgeu x7,x15,8002b1ec + 8002b1e4: 00877463 bgeu x14,x8,8002b1ec + 8002b1e8: 03c0006f jal x0,8002b224 + +000000008002b1ec : + 8002b1ec: 0003a783 lw x15,0(x7) + 8002b1f0: 00f32023 sw x15,0(x6) + 8002b1f4: 0004a703 lw x14,0(x9) + 8002b1f8: 00e3a023 sw x14,0(x7) + 8002b1fc: 0003a783 lw x15,0(x7) + 8002b200: 00e79a63 bne x15,x14,8002b214 + 8002b204: 00438393 addi x7,x7,4 + 8002b208: 00430313 addi x6,x6,4 + 8002b20c: 00448493 addi x9,x9,4 + 8002b210: fc741ee3 bne x8,x7,8002b1ec + +000000008002b214 : + 8002b214: 0000100f fence.i + 8002b218: 34002373 csrrs x6,mscratch,x0 + 8002b21c: 2a933823 sd x9,688(x6) + 8002b220: 04740263 beq x8,x7,8002b264 + +000000008002b224 : + 8002b224: 00038413 addi x8,x7,0 + 8002b228: 00000013 addi x0,x0,0 + 8002b22c: 00000013 addi x0,x0,0 + 8002b230: 00000013 addi x0,x0,0 + 8002b234: 00000013 addi x0,x0,0 + 8002b238: 00000013 addi x0,x0,0 + 8002b23c: 00000013 addi x0,x0,0 + 8002b240: fffd7797 auipc x15,0xfffd7 + 8002b244: cc078793 addi x15,x15,-832 # 80001f00 + 8002b248: 00000013 addi x0,x0,0 + 8002b24c: 00000013 addi x0,x0,0 + 8002b250: 00000013 addi x0,x0,0 + 8002b254: 00000013 addi x0,x0,0 + 8002b258: 00000013 addi x0,x0,0 + 8002b25c: 00000013 addi x0,x0,0 + 8002b260: 00078067 jalr x0,0(x15) + +000000008002b264 : + 8002b264: 00000013 addi x0,x0,0 + +000000008002b268 : + 8002b268: 005002b7 lui x5,0x500 + 8002b26c: 0012829b addiw x5,x5,1 # 500001 + 8002b270: 00d29293 slli x5,x5,0xd + 8002b274: 80028293 addi x5,x5,-2048 + 8002b278: 30029073 csrrw x0,mstatus,x5 + 8002b27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002b280: 32301073 csrrw x0,mhpmevent3,x0 + 8002b284: 32401073 csrrw x0,mhpmevent4,x0 + 8002b288: 32501073 csrrw x0,mhpmevent5,x0 + 8002b28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002b290: 32701073 csrrw x0,mhpmevent7,x0 + 8002b294: 32801073 csrrw x0,mhpmevent8,x0 + 8002b298: 32901073 csrrw x0,mhpmevent9,x0 + 8002b29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002b2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002b2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002b2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002b2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002b2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002b2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002b2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002b2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002b2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002b2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002b2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002b2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002b2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002b2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002b2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002b2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002b2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002b2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002b2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002b2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002b2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002b2f4: 00000013 addi x0,x0,0 + 8002b2f8: 00000013 addi x0,x0,0 + 8002b2fc: 00000013 addi x0,x0,0 + 8002b300: fffdd317 auipc x6,0xfffdd + 8002b304: e0830313 addi x6,x6,-504 # 80008108 + 8002b308: 00000013 addi x0,x0,0 + 8002b30c: 00000013 addi x0,x0,0 + 8002b310: 00000013 addi x0,x0,0 + 8002b314: 00000013 addi x0,x0,0 + 8002b318: 00000013 addi x0,x0,0 + 8002b31c: 00000013 addi x0,x0,0 + 8002b320: 00033023 sd x0,0(x6) + +000000008002b324 : + 8002b324: feedc0b7 lui x1,0xfeedc + 8002b328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002b32c: 00b09093 slli x1,x1,0xb + 8002b330: 7f708093 addi x1,x1,2039 + 8002b334: 00b09093 slli x1,x1,0xb + 8002b338: 36f08093 addi x1,x1,879 + 8002b33c: 00a09093 slli x1,x1,0xa + 8002b340: 2ad08093 addi x1,x1,685 + 8002b344: 03909793 slli x15,x1,0x39 + 8002b348: 0070d113 srli x2,x1,0x7 + 8002b34c: 00f16133 or x2,x2,x15 + 8002b350: 03911793 slli x15,x2,0x39 + 8002b354: 00715193 srli x3,x2,0x7 + 8002b358: 00f1e1b3 or x3,x3,x15 + 8002b35c: 03919793 slli x15,x3,0x39 + 8002b360: 0071d213 srli x4,x3,0x7 + 8002b364: 00f26233 or x4,x4,x15 + 8002b368: 03921793 slli x15,x4,0x39 + 8002b36c: 00725293 srli x5,x4,0x7 + 8002b370: 00f2e2b3 or x5,x5,x15 + 8002b374: 03929793 slli x15,x5,0x39 + 8002b378: 0072d313 srli x6,x5,0x7 + 8002b37c: 00f36333 or x6,x6,x15 + 8002b380: 03931793 slli x15,x6,0x39 + 8002b384: 00735393 srli x7,x6,0x7 + 8002b388: 00f3e3b3 or x7,x7,x15 + 8002b38c: 03939793 slli x15,x7,0x39 + 8002b390: 0073d413 srli x8,x7,0x7 + 8002b394: 00f46433 or x8,x8,x15 + 8002b398: 03941793 slli x15,x8,0x39 + 8002b39c: 00745493 srli x9,x8,0x7 + 8002b3a0: 00f4e4b3 or x9,x9,x15 + 8002b3a4: 03949793 slli x15,x9,0x39 + 8002b3a8: 0074d513 srli x10,x9,0x7 + 8002b3ac: 00f56533 or x10,x10,x15 + 8002b3b0: 03951793 slli x15,x10,0x39 + 8002b3b4: 00755593 srli x11,x10,0x7 + 8002b3b8: 00f5e5b3 or x11,x11,x15 + 8002b3bc: 03959793 slli x15,x11,0x39 + 8002b3c0: 0075d613 srli x12,x11,0x7 + 8002b3c4: 00f66633 or x12,x12,x15 + 8002b3c8: 03961793 slli x15,x12,0x39 + 8002b3cc: 00765693 srli x13,x12,0x7 + 8002b3d0: 00f6e6b3 or x13,x13,x15 + 8002b3d4: 03969793 slli x15,x13,0x39 + 8002b3d8: 0076d713 srli x14,x13,0x7 + 8002b3dc: 00f76733 or x14,x14,x15 + 8002b3e0: fab807b7 lui x15,0xfab80 + 8002b3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002b3e8: 00b79793 slli x15,x15,0xb + 8002b3ec: 7d578793 addi x15,x15,2005 + 8002b3f0: 00b79793 slli x15,x15,0xb + 8002b3f4: 5fe78793 addi x15,x15,1534 + 8002b3f8: 00a79793 slli x15,x15,0xa + 8002b3fc: 3b678793 addi x15,x15,950 + 8002b400: 7d5c0837 lui x16,0x7d5c0 + 8002b404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002b408: 00b81813 slli x16,x16,0xb + 8002b40c: 3ea80813 addi x16,x16,1002 + 8002b410: 00b81813 slli x16,x16,0xb + 8002b414: 6ff80813 addi x16,x16,1791 + 8002b418: 00a81813 slli x16,x16,0xa + 8002b41c: 1db80813 addi x16,x16,475 + 8002b420: 03981793 slli x15,x16,0x39 + 8002b424: 00785893 srli x17,x16,0x7 + 8002b428: 00f8e8b3 or x17,x17,x15 + 8002b42c: 03989793 slli x15,x17,0x39 + 8002b430: 0078d913 srli x18,x17,0x7 + 8002b434: 00f96933 or x18,x18,x15 + 8002b438: 03991793 slli x15,x18,0x39 + 8002b43c: 00795993 srli x19,x18,0x7 + 8002b440: 00f9e9b3 or x19,x19,x15 + 8002b444: 03999793 slli x15,x19,0x39 + 8002b448: 0079da13 srli x20,x19,0x7 + 8002b44c: 00fa6a33 or x20,x20,x15 + 8002b450: 039a1793 slli x15,x20,0x39 + 8002b454: 007a5a93 srli x21,x20,0x7 + 8002b458: 00faeab3 or x21,x21,x15 + 8002b45c: 039a9793 slli x15,x21,0x39 + 8002b460: 007adb13 srli x22,x21,0x7 + 8002b464: 00fb6b33 or x22,x22,x15 + 8002b468: 039b1793 slli x15,x22,0x39 + 8002b46c: 007b5b93 srli x23,x22,0x7 + 8002b470: 00fbebb3 or x23,x23,x15 + 8002b474: 039b9793 slli x15,x23,0x39 + 8002b478: 007bdc13 srli x24,x23,0x7 + 8002b47c: 00fc6c33 or x24,x24,x15 + 8002b480: 039c1793 slli x15,x24,0x39 + 8002b484: 007c5c93 srli x25,x24,0x7 + 8002b488: 00fcecb3 or x25,x25,x15 + 8002b48c: 039c9793 slli x15,x25,0x39 + 8002b490: 007cdd13 srli x26,x25,0x7 + 8002b494: 00fd6d33 or x26,x26,x15 + 8002b498: 039d1793 slli x15,x26,0x39 + 8002b49c: 007d5d93 srli x27,x26,0x7 + 8002b4a0: 00fdedb3 or x27,x27,x15 + 8002b4a4: 039d9793 slli x15,x27,0x39 + 8002b4a8: 007dde13 srli x28,x27,0x7 + 8002b4ac: 00fe6e33 or x28,x28,x15 + 8002b4b0: 039e1793 slli x15,x28,0x39 + 8002b4b4: 007e5e93 srli x29,x28,0x7 + 8002b4b8: 00feeeb3 or x29,x29,x15 + 8002b4bc: 039e9793 slli x15,x29,0x39 + 8002b4c0: 007edf13 srli x30,x29,0x7 + 8002b4c4: 00ff6f33 or x30,x30,x15 + 8002b4c8: 039f1793 slli x15,x30,0x39 + 8002b4cc: 007f5f93 srli x31,x30,0x7 + 8002b4d0: 00ffefb3 or x31,x31,x15 + 8002b4d4: 00000013 addi x0,x0,0 + 8002b4d8: 00000013 addi x0,x0,0 + 8002b4dc: 00000013 addi x0,x0,0 + 8002b4e0: fffe2117 auipc x2,0xfffe2 + 8002b4e4: 89010113 addi x2,x2,-1904 # 8000cd70 + 8002b4e8: 00000013 addi x0,x0,0 + 8002b4ec: 00000013 addi x0,x0,0 + 8002b4f0: 00000013 addi x0,x0,0 + 8002b4f4: 00000013 addi x0,x0,0 + 8002b4f8: 00000013 addi x0,x0,0 + 8002b4fc: 00000013 addi x0,x0,0 + +000000008002b500 : + 8002b500: 6f5ca337 lui x6,0x6f5ca + 8002b504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002b508: 00b31313 slli x6,x6,0xb + 8002b50c: 73e30313 addi x6,x6,1854 + 8002b510: 00b31313 slli x6,x6,0xb + 8002b514: 52c30313 addi x6,x6,1324 + 8002b518: 00a31313 slli x6,x6,0xa + 8002b51c: 28130313 addi x6,x6,641 + 8002b520: fffd8197 auipc x3,0xfffd8 + 8002b524: da018193 addi x3,x3,-608 # 800032c0 + 8002b528: 00000013 addi x0,x0,0 + 8002b52c: 00000013 addi x0,x0,0 + 8002b530: 00000013 addi x0,x0,0 + 8002b534: 00000013 addi x0,x0,0 + 8002b538: 00000013 addi x0,x0,0 + 8002b53c: 00000013 addi x0,x0,0 + 8002b540: 00013203 ld x4,0(x2) + 8002b544: 00620c63 beq x4,x6,8002b55c + 8002b548: 000182e7 jalr x5,0(x3) + 8002b54c: 8002b500 .word 0x8002b500 + 8002b550: 00000000 .word 0x00000000 + 8002b554: 8000c31b .word 0x8000c31b + 8002b558: 00000000 .word 0x00000000 + 8002b55c: 00810113 addi x2,x2,8 + 8002b560: fffdd197 auipc x3,0xfffdd + 8002b564: f1018193 addi x3,x3,-240 # 80008470 + 8002b568: 00000013 addi x0,x0,0 + 8002b56c: 00000013 addi x0,x0,0 + 8002b570: 00000013 addi x0,x0,0 + 8002b574: 00000013 addi x0,x0,0 + 8002b578: 00000013 addi x0,x0,0 + 8002b57c: 00000013 addi x0,x0,0 + 8002b580: fffd5317 auipc x6,0xfffd5 + 8002b584: ac030313 addi x6,x6,-1344 # 80000040 + 8002b588: 00000013 addi x0,x0,0 + 8002b58c: 00000013 addi x0,x0,0 + 8002b590: 00000013 addi x0,x0,0 + 8002b594: 00000013 addi x0,x0,0 + 8002b598: 00000013 addi x0,x0,0 + 8002b59c: 00000013 addi x0,x0,0 + 8002b5a0: 00030067 jalr x0,0(x6) + +000000008002b5a4 : + 8002b5a4: 00054303 lbu x6,0(x10) + 8002b5a8: 00030a63 beq x6,x0,8002b5bc + 8002b5ac: 100003b7 lui x7,0x10000 + 8002b5b0: 00638023 sb x6,0(x7) # 10000000 + 8002b5b4: 00150513 addi x10,x10,1 + 8002b5b8: fedff06f jal x0,8002b5a4 + 8002b5bc: 00008067 jalr x0,0(x1) + +000000008002b5c0 : + 8002b5c0: ff010113 addi x2,x2,-16 + 8002b5c4: 00113023 sd x1,0(x2) + 8002b5c8: 00813423 sd x8,8(x2) + 8002b5cc: 00000097 auipc x1,0x0 + 8002b5d0: fd8080e7 jalr x1,-40(x1) # 8002b5a4 + 8002b5d4: 00813403 ld x8,8(x2) + 8002b5d8: 00013083 ld x1,0(x2) + 8002b5dc: 01010113 addi x2,x2,16 + 8002b5e0: 00008067 jalr x0,0(x1) + +000000008002b5e4 : + 8002b5e4: 00100093 addi x1,x0,1 + 8002b5e8: fffff297 auipc x5,0xfffff + 8002b5ec: 31828293 addi x5,x5,792 # 8002a900 + +000000008002b5f0 : + 8002b5f0: 0012a023 sw x1,0(x5) + 8002b5f4: 0002a223 sw x0,4(x5) + +000000008002b5f8 : + 8002b5f8: 00000013 addi x0,x0,0 + 8002b5fc: ffdff06f jal x0,8002b5f8 + 8002b600: 0000006f jal x0,8002b600 + +000000008002b604 : + 8002b604: 00300093 addi x1,x0,3 + 8002b608: fffff297 auipc x5,0xfffff + 8002b60c: 2f828293 addi x5,x5,760 # 8002a900 + +000000008002b610 : + 8002b610: 0012a023 sw x1,0(x5) + 8002b614: 0002a223 sw x0,4(x5) + +000000008002b618 : + 8002b618: 00000013 addi x0,x0,0 + 8002b61c: ffdff06f jal x0,8002b618 + 8002b620: 0000006f jal x0,8002b620 + +000000008002b624 : + 8002b624: 00100513 addi x10,x0,1 + 8002b628: 100105b7 lui x11,0x10010 + 8002b62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002b630: 00008067 jalr x0,0(x1) + +000000008002b634 : + 8002b634: 100105b7 lui x11,0x10010 + 8002b638: 0005a023 sw x0,0(x11) # 10010000 + 8002b63c: 00008067 jalr x0,0(x1) + +000000008002b640 : + 8002b640: 00100513 addi x10,x0,1 + 8002b644: 100005b7 lui x11,0x10000 + 8002b648: 0105859b addiw x11,x11,16 # 10000010 + 8002b64c: 00a58023 sb x10,0(x11) + 8002b650: 00008067 jalr x0,0(x1) + +000000008002b654 : + 8002b654: 100005b7 lui x11,0x10000 + 8002b658: 0105859b addiw x11,x11,16 # 10000010 + 8002b65c: 00058023 sb x0,0(x11) + 8002b660: 00008067 jalr x0,0(x1) + 8002b664: 00000013 addi x0,x0,0 + 8002b668: 00000013 addi x0,x0,0 + 8002b66c: 00000013 addi x0,x0,0 + 8002b670: 00000013 addi x0,x0,0 + 8002b674: 00000013 addi x0,x0,0 + 8002b678: 00000013 addi x0,x0,0 + 8002b67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkb-xnor-00.elf.objdump b/riscv-tests/rv64-Zbkb-xnor-00.elf.objdump new file mode 100644 index 0000000..d479b10 --- /dev/null +++ b/riscv-tests/rv64-Zbkb-xnor-00.elf.objdump @@ -0,0 +1,17094 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-xnor-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkb/Zbkb-xnor-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c510 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038600 0000000080038600 00037600 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031b2 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007a 0000000000000000 0000000000000000 0003b86d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8e7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b90a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b920 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000088 0000000000000000 0000000000000000 0003b960 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9e8 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038600 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cchK5UDj.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b1 +000000008000e4a1 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b2 +000000008000e4d2 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b3 +000000008000e503 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b4 +0000000080007d18 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000e534 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b5 +000000008000e565 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b6 +000000008000e596 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b6_str +00000000800001d4 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b7 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e5c7 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b7_str +0000000080000208 l .text.rvtest 0000000000000000 Zbkb_xnor_cg_cp_rs1_b8 +000000008000e5f8 l .data 0000000000000000 Zbkb_xnor_cg_cp_rs1_b8_str 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+0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xce62ed27026facd1 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xdc82f1ccc7baffc0 + 80000048: 0001bc03 ld x24,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkb_xnor_cg_cp_rs1_b0: + xnor x7, x0, x24 # perform operation + 80000050: 418043b3 xnor x7,x0,x24 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zbkb_xnor_cg_cp_rs1_b0, Zbkb_xnor_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00720c63 beq x4,x7,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x2d8969d3ad3a5d8f + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x66db4213bd9f5b28 + 8000007c: 0001b003 ld x0,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkb_xnor_cg_cp_rs1_b1: + xnor x19, x1, x0 # perform operation + 80000084: 4000c9b3 xnor x19,x1,x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zbkb_xnor_cg_cp_rs1_b1, Zbkb_xnor_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01320c63 beq x4,x19,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a1 .word 0x8000e4a1 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x10, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010513 addi x10,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x63d388a81fe27181 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xd054423b09873648 + 800000b4: 0001ba83 ld x21,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkb_xnor_cg_cp_rs1_b2: + xnor x26, x2, x21 # perform operation + 800000bc: 41514d33 xnor x26,x2,x21 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zbkb_xnor_cg_cp_rs1_b2, Zbkb_xnor_cg_cp_rs1_b2_str) + 800000c0: 00053203 ld x4,0(x10) + 800000c4: 01a20c63 beq x4,x26,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d2 .word 0x8000e4d2 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00850513 addi x10,x10,8 + + mv x30, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018f13 addi x30,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0xab8e1f931a39b402 + 800000e4: 000f3183 ld x3,0(x30) + 800000e8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xb544f13e39150fd8 + 800000ec: 000f3583 ld x11,0(x30) + 800000f0: 008f0f13 addi x30,x30,8 + +00000000800000f4 : +Zbkb_xnor_cg_cp_rs1_b3: + xnor x22, x3, x11 # perform operation + 800000f4: 40b1cb33 xnor x22,x3,x11 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zbkb_xnor_cg_cp_rs1_b3, Zbkb_xnor_cg_cp_rs1_b3_str) + 800000f8: 00053203 ld x4,0(x10) + 800000fc: 01620c63 beq x4,x22,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e503 .word 0x8000e503 + 80000110: 00000000 .word 0x00000000 + 80000114: 00850513 addi x10,x10,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs1: x4 = 0xacc85d510dfde2b4 + 80000120: 000f3203 ld x4,0(x30) + 80000124: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xa6c4057572073943 + 80000128: 000f3b83 ld x23,0(x30) + 8000012c: 008f0f13 addi x30,x30,8 + +0000000080000130 : +Zbkb_xnor_cg_cp_rs1_b4: + xnor x1, x4, x23 # perform operation + 80000130: 417240b3 xnor x1,x4,x23 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkb_xnor_cg_cp_rs1_b4, Zbkb_xnor_cg_cp_rs1_b4_str) + 80000134: 00053383 ld x7,0(x10) + 80000138: 00138c63 beq x7,x1,80000150 + 8000013c: 3dd0746f jal x8,80007d18 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e534 .word 0x8000e534 + 8000014c: 00000000 .word 0x00000000 + 80000150: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs1: x5 = 0xec6a73f4b8dfaa90 + 80000154: 000f3283 ld x5,0(x30) + 80000158: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0x15caf1f276506ab6 + 8000015c: 000f3303 ld x6,0(x30) + 80000160: 008f0f13 addi x30,x30,8 + +0000000080000164 : +Zbkb_xnor_cg_cp_rs1_b5: + xnor x22, x5, x6 # perform operation + 80000164: 4062cb33 xnor x22,x5,x6 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkb_xnor_cg_cp_rs1_b5, Zbkb_xnor_cg_cp_rs1_b5_str) + 80000168: 00053383 ld x7,0(x10) + 8000016c: 01638c63 beq x7,x22,80000184 + 80000170: 3a90746f jal x8,80007d18 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e565 .word 0x8000e565 + 80000180: 00000000 .word 0x00000000 + 80000184: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x2e9d4e1c409bdb8b + 80000188: 000f3303 ld x6,0(x30) + 8000018c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x5) # load rs2: x5 = 0x12fbd05d5f5397c2 + 80000190: 000f3283 ld x5,0(x30) + 80000194: 008f0f13 addi x30,x30,8 + +0000000080000198 : +Zbkb_xnor_cg_cp_rs1_b6: + xnor x16, x6, x5 # perform operation + 80000198: 40534833 xnor x16,x6,x5 + # Check if x16 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x16, Zbkb_xnor_cg_cp_rs1_b6, Zbkb_xnor_cg_cp_rs1_b6_str) + 8000019c: 00053383 ld x7,0(x10) + 800001a0: 01038c63 beq x7,x16,800001b8 + 800001a4: 3750746f jal x8,80007d18 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e596 .word 0x8000e596 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800001bc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x7f9f53a0c1900355 + 800001c4: 000f3383 ld x7,0(x30) + 800001c8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0x7c007494434a2e51 + 800001cc: 000f3603 ld x12,0(x30) + 800001d0: 008f0f13 addi x30,x30,8 + +00000000800001d4 : +Zbkb_xnor_cg_cp_rs1_b7: + xnor x26, x7, x12 # perform operation + 800001d4: 40c3cd33 xnor x26,x7,x12 + # Check if x26 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x26, Zbkb_xnor_cg_cp_rs1_b7, Zbkb_xnor_cg_cp_rs1_b7_str) + 800001d8: 00053683 ld x13,0(x10) + 800001dc: 01a68c63 beq x13,x26,800001f4 + 800001e0: 3610776f jal x14,80007d40 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 8000e5c7 .word 0x8000e5c7 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0x81aa89fc388351d3 + 800001f8: 000f3403 ld x8,0(x30) + 800001fc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x3e4b42fce1f8faa7 + 80000200: 000f3d83 ld x27,0(x30) + 80000204: 008f0f13 addi x30,x30,8 + +0000000080000208 : +Zbkb_xnor_cg_cp_rs1_b8: + xnor x19, x8, x27 # perform operation + 80000208: 41b449b3 xnor x19,x8,x27 + # Check if x19 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x19, Zbkb_xnor_cg_cp_rs1_b8, Zbkb_xnor_cg_cp_rs1_b8_str) + 8000020c: 00053683 ld x13,0(x10) + 80000210: 01368c63 beq x13,x19,80000228 + 80000214: 32d0776f jal x14,80007d40 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 8000e5f8 .word 0x8000e5f8 + 80000224: 00000000 .word 0x00000000 + 80000228: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x3f7c069adeae8492 + 8000022c: 000f3483 ld x9,0(x30) + 80000230: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x378d34c3b57dbac4 + 80000234: 000f3983 ld x19,0(x30) + 80000238: 008f0f13 addi x30,x30,8 + +000000008000023c : +Zbkb_xnor_cg_cp_rs1_b9: + xnor x8, x9, x19 # perform operation + 8000023c: 4134c433 xnor x8,x9,x19 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkb_xnor_cg_cp_rs1_b9, Zbkb_xnor_cg_cp_rs1_b9_str) + 80000240: 00053683 ld x13,0(x10) + 80000244: 00868c63 beq x13,x8,8000025c + 80000248: 2f90776f jal x14,80007d40 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8000e629 .word 0x8000e629 + 80000258: 00000000 .word 0x00000000 + 8000025c: 00850513 addi x10,x10,8 + + mv x31, x10 # switch signature pointer register to avoid conflict with test + 80000260: 00050f93 addi x31,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0xfd92c708fa8446f1 + 80000264: 000f3503 ld x10,0(x30) + 80000268: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x4a59b9f694764a09 + 8000026c: 000f3903 ld x18,0(x30) + 80000270: 008f0f13 addi x30,x30,8 + +0000000080000274 : +Zbkb_xnor_cg_cp_rs1_b10: + xnor x16, x10, x18 # perform operation + 80000274: 41254833 xnor x16,x10,x18 + # Check if x16 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x16, Zbkb_xnor_cg_cp_rs1_b10, Zbkb_xnor_cg_cp_rs1_b10_str) + 80000278: 000fb683 ld x13,0(x31) + 8000027c: 01068c63 beq x13,x16,80000294 + 80000280: 2c10776f jal x14,80007d40 + 80000284: 80000274 .word 0x80000274 + 80000288: 00000000 .word 0x00000000 + 8000028c: 8000e65b .word 0x8000e65b + 80000290: 00000000 .word 0x00000000 + 80000294: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0xf0174b6ff0397234 + 80000298: 000f3583 ld x11,0(x30) + 8000029c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xd6a6b5fecc4eb09d + 800002a0: 000f3e83 ld x29,0(x30) + 800002a4: 008f0f13 addi x30,x30,8 + +00000000800002a8 : +Zbkb_xnor_cg_cp_rs1_b11: + xnor x4, x11, x29 # perform operation + 800002a8: 41d5c233 xnor x4,x11,x29 + # Check if x4 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x4, Zbkb_xnor_cg_cp_rs1_b11, Zbkb_xnor_cg_cp_rs1_b11_str) + 800002ac: 000fb683 ld x13,0(x31) + 800002b0: 00468c63 beq x13,x4,800002c8 + 800002b4: 28d0776f jal x14,80007d40 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 8000e68e .word 0x8000e68e + 800002c4: 00000000 .word 0x00000000 + 800002c8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0xd8f243483a6de285 + 800002cc: 000f3603 ld x12,0(x30) + 800002d0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x5f01af6c8ce5c7db + 800002d4: 000f3903 ld x18,0(x30) + 800002d8: 008f0f13 addi x30,x30,8 + +00000000800002dc : +Zbkb_xnor_cg_cp_rs1_b12: + xnor x25, x12, x18 # perform operation + 800002dc: 41264cb3 xnor x25,x12,x18 + # Check if x25 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x25, Zbkb_xnor_cg_cp_rs1_b12, Zbkb_xnor_cg_cp_rs1_b12_str) + 800002e0: 000fb683 ld x13,0(x31) + 800002e4: 01968c63 beq x13,x25,800002fc + 800002e8: 2590776f jal x14,80007d40 + 800002ec: 800002dc .word 0x800002dc + 800002f0: 00000000 .word 0x00000000 + 800002f4: 8000e6c1 .word 0x8000e6c1 + 800002f8: 00000000 .word 0x00000000 + 800002fc: 008f8f93 addi x31,x31,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000300: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000304: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x863971aa126a8d5f + 80000308: 000f3683 ld x13,0(x30) + 8000030c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0x43406a99a7c99728 + 80000310: 000f3503 ld x10,0(x30) + 80000314: 008f0f13 addi x30,x30,8 + +0000000080000318 : +Zbkb_xnor_cg_cp_rs1_b13: + xnor x14, x13, x10 # perform operation + 80000318: 40a6c733 xnor x14,x13,x10 + # Check if x14 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x14, Zbkb_xnor_cg_cp_rs1_b13, Zbkb_xnor_cg_cp_rs1_b13_str) + 8000031c: 000fb383 ld x7,0(x31) + 80000320: 00e38c63 beq x7,x14,80000338 + 80000324: 1f50746f jal x8,80007d18 + 80000328: 80000318 .word 0x80000318 + 8000032c: 00000000 .word 0x00000000 + 80000330: 8000e6f4 .word 0x8000e6f4 + 80000334: 00000000 .word 0x00000000 + 80000338: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs1: x14 = 0xf088f4e6f2cc9b3e + 8000033c: 000f3703 ld x14,0(x30) + 80000340: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x896dfbc112b93dd1 + 80000344: 000f3d03 ld x26,0(x30) + 80000348: 008f0f13 addi x30,x30,8 + +000000008000034c : +Zbkb_xnor_cg_cp_rs1_b14: + xnor x17, x14, x26 # perform operation + 8000034c: 41a748b3 xnor x17,x14,x26 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkb_xnor_cg_cp_rs1_b14, Zbkb_xnor_cg_cp_rs1_b14_str) + 80000350: 000fb383 ld x7,0(x31) + 80000354: 01138c63 beq x7,x17,8000036c + 80000358: 1c10746f jal x8,80007d18 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 8000e727 .word 0x8000e727 + 80000368: 00000000 .word 0x00000000 + 8000036c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x1026c916f1b68163 + 80000370: 000f3783 ld x15,0(x30) + 80000374: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs2: x10 = 0x3d090e582b9ea5be + 80000378: 000f3503 ld x10,0(x30) + 8000037c: 008f0f13 addi x30,x30,8 + +0000000080000380 : +Zbkb_xnor_cg_cp_rs1_b15: + xnor x12, x15, x10 # perform operation + 80000380: 40a7c633 xnor x12,x15,x10 + # Check if x12 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x12, Zbkb_xnor_cg_cp_rs1_b15, Zbkb_xnor_cg_cp_rs1_b15_str) + 80000384: 000fb383 ld x7,0(x31) + 80000388: 00c38c63 beq x7,x12,800003a0 + 8000038c: 18d0746f jal x8,80007d18 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 8000e75a .word 0x8000e75a + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x00c3e1d20a50779b + 800003a4: 000f3803 ld x16,0(x30) + 800003a8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x3bd42fe1b0b81345 + 800003ac: 000f3c83 ld x25,0(x30) + 800003b0: 008f0f13 addi x30,x30,8 + +00000000800003b4 : +Zbkb_xnor_cg_cp_rs1_b16: + xnor x15, x16, x25 # perform operation + 800003b4: 419847b3 xnor x15,x16,x25 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkb_xnor_cg_cp_rs1_b16, Zbkb_xnor_cg_cp_rs1_b16_str) + 800003b8: 000fb383 ld x7,0(x31) + 800003bc: 00f38c63 beq x7,x15,800003d4 + 800003c0: 1590746f jal x8,80007d18 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 8000e78d .word 0x8000e78d + 800003d0: 00000000 .word 0x00000000 + 800003d4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0xff9dbc16783759a7 + 800003d8: 000f3883 ld x17,0(x30) + 800003dc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0xf94cc4045c39ce11 + 800003e0: 000f3003 ld x0,0(x30) + 800003e4: 008f0f13 addi x30,x30,8 + +00000000800003e8 : +Zbkb_xnor_cg_cp_rs1_b17: + xnor x2, x17, x0 # perform operation + 800003e8: 4008c133 xnor x2,x17,x0 + # Check if x2 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x2, Zbkb_xnor_cg_cp_rs1_b17, Zbkb_xnor_cg_cp_rs1_b17_str) + 800003ec: 000fb383 ld x7,0(x31) + 800003f0: 00238c63 beq x7,x2,80000408 + 800003f4: 1250746f jal x8,80007d18 + 800003f8: 800003e8 .word 0x800003e8 + 800003fc: 00000000 .word 0x00000000 + 80000400: 8000e7c0 .word 0x8000e7c0 + 80000404: 00000000 .word 0x00000000 + 80000408: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x4d03f0ed7ebaf1c8 + 8000040c: 000f3903 ld x18,0(x30) + 80000410: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0xd3a4057ce4446442 + 80000414: 000f3103 ld x2,0(x30) + 80000418: 008f0f13 addi x30,x30,8 + +000000008000041c : +Zbkb_xnor_cg_cp_rs1_b18: + xnor x9, x18, x2 # perform operation + 8000041c: 402944b3 xnor x9,x18,x2 + # Check if x9 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x9, Zbkb_xnor_cg_cp_rs1_b18, Zbkb_xnor_cg_cp_rs1_b18_str) + 80000420: 000fb383 ld x7,0(x31) + 80000424: 00938c63 beq x7,x9,8000043c + 80000428: 0f10746f jal x8,80007d18 + 8000042c: 8000041c .word 0x8000041c + 80000430: 00000000 .word 0x00000000 + 80000434: 8000e7f3 .word 0x8000e7f3 + 80000438: 00000000 .word 0x00000000 + 8000043c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x3f60494f2eee8377 + 80000440: 000f3983 ld x19,0(x30) + 80000444: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x51d0202d01fd787c + 80000448: 000f3d03 ld x26,0(x30) + 8000044c: 008f0f13 addi x30,x30,8 + +0000000080000450 : +Zbkb_xnor_cg_cp_rs1_b19: + xnor x18, x19, x26 # perform operation + 80000450: 41a9c933 xnor x18,x19,x26 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkb_xnor_cg_cp_rs1_b19, Zbkb_xnor_cg_cp_rs1_b19_str) + 80000454: 000fb383 ld x7,0(x31) + 80000458: 01238c63 beq x7,x18,80000470 + 8000045c: 0bd0746f jal x8,80007d18 + 80000460: 80000450 .word 0x80000450 + 80000464: 00000000 .word 0x00000000 + 80000468: 8000e826 .word 0x8000e826 + 8000046c: 00000000 .word 0x00000000 + 80000470: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0xfdc34c5efcc17018 + 80000474: 000f3a03 ld x20,0(x30) + 80000478: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x36fb8ec0a602313e + 8000047c: 000f3a83 ld x21,0(x30) + 80000480: 008f0f13 addi x30,x30,8 + +0000000080000484 : +Zbkb_xnor_cg_cp_rs1_b20: + xnor x16, x20, x21 # perform operation + 80000484: 415a4833 xnor x16,x20,x21 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zbkb_xnor_cg_cp_rs1_b20, Zbkb_xnor_cg_cp_rs1_b20_str) + 80000488: 000fb383 ld x7,0(x31) + 8000048c: 01038c63 beq x7,x16,800004a4 + 80000490: 0890746f jal x8,80007d18 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 8000e859 .word 0x8000e859 + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xb45c24eaef75aa97 + 800004a8: 000f3a83 ld x21,0(x30) + 800004ac: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0xdfc035e07d6bc2dd + 800004b0: 000f3803 ld x16,0(x30) + 800004b4: 008f0f13 addi x30,x30,8 + +00000000800004b8 : +Zbkb_xnor_cg_cp_rs1_b21: + xnor x11, x21, x16 # perform operation + 800004b8: 410ac5b3 xnor x11,x21,x16 + # Check if x11 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x11, Zbkb_xnor_cg_cp_rs1_b21, Zbkb_xnor_cg_cp_rs1_b21_str) + 800004bc: 000fb383 ld x7,0(x31) + 800004c0: 00b38c63 beq x7,x11,800004d8 + 800004c4: 0550746f jal x8,80007d18 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 8000e88c .word 0x8000e88c + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x7cd2693d80eebead + 800004dc: 000f3b03 ld x22,0(x30) + 800004e0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x32fe60a032fd2bf2 + 800004e4: 000f3703 ld x14,0(x30) + 800004e8: 008f0f13 addi x30,x30,8 + +00000000800004ec : +Zbkb_xnor_cg_cp_rs1_b22: + xnor x13, x22, x14 # perform operation + 800004ec: 40eb46b3 xnor x13,x22,x14 + # Check if x13 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x13, Zbkb_xnor_cg_cp_rs1_b22, Zbkb_xnor_cg_cp_rs1_b22_str) + 800004f0: 000fb383 ld x7,0(x31) + 800004f4: 00d38c63 beq x7,x13,8000050c + 800004f8: 0210746f jal x8,80007d18 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 8000e8bf .word 0x8000e8bf + 80000508: 00000000 .word 0x00000000 + 8000050c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0xa5ddfa35f1f16b8f + 80000510: 000f3b83 ld x23,0(x30) + 80000514: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x29fe1cf40c2ecca0 + 80000518: 000f3e03 ld x28,0(x30) + 8000051c: 008f0f13 addi x30,x30,8 + +0000000080000520 : +Zbkb_xnor_cg_cp_rs1_b23: + xnor x12, x23, x28 # perform operation + 80000520: 41cbc633 xnor x12,x23,x28 + # Check if x12 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x12, Zbkb_xnor_cg_cp_rs1_b23, Zbkb_xnor_cg_cp_rs1_b23_str) + 80000524: 000fb383 ld x7,0(x31) + 80000528: 00c38c63 beq x7,x12,80000540 + 8000052c: 7ec0746f jal x8,80007d18 + 80000530: 80000520 .word 0x80000520 + 80000534: 00000000 .word 0x00000000 + 80000538: 8000e8f2 .word 0x8000e8f2 + 8000053c: 00000000 .word 0x00000000 + 80000540: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x6dc16b88de34f8cf + 80000544: 000f3c03 ld x24,0(x30) + 80000548: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x3870526f3fe5cbfa + 8000054c: 000f3d83 ld x27,0(x30) + 80000550: 008f0f13 addi x30,x30,8 + +0000000080000554 : +Zbkb_xnor_cg_cp_rs1_b24: + xnor x16, x24, x27 # perform operation + 80000554: 41bc4833 xnor x16,x24,x27 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zbkb_xnor_cg_cp_rs1_b24, Zbkb_xnor_cg_cp_rs1_b24_str) + 80000558: 000fb383 ld x7,0(x31) + 8000055c: 01038c63 beq x7,x16,80000574 + 80000560: 7b80746f jal x8,80007d18 + 80000564: 80000554 .word 0x80000554 + 80000568: 00000000 .word 0x00000000 + 8000056c: 8000e925 .word 0x8000e925 + 80000570: 00000000 .word 0x00000000 + 80000574: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xd295dd84c829c589 + 80000578: 000f3c83 ld x25,0(x30) + 8000057c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0x5f6300475935e4f2 + 80000580: 000f3783 ld x15,0(x30) + 80000584: 008f0f13 addi x30,x30,8 + +0000000080000588 : +Zbkb_xnor_cg_cp_rs1_b25: + xnor x1, x25, x15 # perform operation + 80000588: 40fcc0b3 xnor x1,x25,x15 + # Check if x1 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x1, Zbkb_xnor_cg_cp_rs1_b25, Zbkb_xnor_cg_cp_rs1_b25_str) + 8000058c: 000fb383 ld x7,0(x31) + 80000590: 00138c63 beq x7,x1,800005a8 + 80000594: 7840746f jal x8,80007d18 + 80000598: 80000588 .word 0x80000588 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 8000e958 .word 0x8000e958 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x249ee5a7d4b6cfbd + 800005ac: 000f3d03 ld x26,0(x30) + 800005b0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0xb79dfa302b48ae6b + 800005b4: 000f3703 ld x14,0(x30) + 800005b8: 008f0f13 addi x30,x30,8 + +00000000800005bc : +Zbkb_xnor_cg_cp_rs1_b26: + xnor x20, x26, x14 # perform operation + 800005bc: 40ed4a33 xnor x20,x26,x14 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkb_xnor_cg_cp_rs1_b26, Zbkb_xnor_cg_cp_rs1_b26_str) + 800005c0: 000fb383 ld x7,0(x31) + 800005c4: 01438c63 beq x7,x20,800005dc + 800005c8: 7500746f jal x8,80007d18 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 8000e98b .word 0x8000e98b + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x37033747a68f974e + 800005e0: 000f3d83 ld x27,0(x30) + 800005e4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0xa7644dc7e498af01 + 800005e8: 000f3003 ld x0,0(x30) + 800005ec: 008f0f13 addi x30,x30,8 + +00000000800005f0 : +Zbkb_xnor_cg_cp_rs1_b27: + xnor x23, x27, x0 # perform operation + 800005f0: 400dcbb3 xnor x23,x27,x0 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkb_xnor_cg_cp_rs1_b27, Zbkb_xnor_cg_cp_rs1_b27_str) + 800005f4: 000fb383 ld x7,0(x31) + 800005f8: 01738c63 beq x7,x23,80000610 + 800005fc: 71c0746f jal x8,80007d18 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 8000e9be .word 0x8000e9be + 8000060c: 00000000 .word 0x00000000 + 80000610: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xc6c85d41947ab27d + 80000614: 000f3e03 ld x28,0(x30) + 80000618: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0xd3bc28495c98f4e5 + 8000061c: 000f3003 ld x0,0(x30) + 80000620: 008f0f13 addi x30,x30,8 + +0000000080000624 : +Zbkb_xnor_cg_cp_rs1_b28: + xnor x3, x28, x0 # perform operation + 80000624: 400e41b3 xnor x3,x28,x0 + # Check if x3 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x3, Zbkb_xnor_cg_cp_rs1_b28, Zbkb_xnor_cg_cp_rs1_b28_str) + 80000628: 000fb383 ld x7,0(x31) + 8000062c: 00338c63 beq x7,x3,80000644 + 80000630: 6e80746f jal x8,80007d18 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 8000e9f1 .word 0x8000e9f1 + 80000640: 00000000 .word 0x00000000 + 80000644: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x6b542194c37441fb + 80000648: 000f3e83 ld x29,0(x30) + 8000064c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0x50b75a55c5359869 + 80000650: 000f3303 ld x6,0(x30) + 80000654: 008f0f13 addi x30,x30,8 + +0000000080000658 : +Zbkb_xnor_cg_cp_rs1_b29: + xnor x24, x29, x6 # perform operation + 80000658: 406ecc33 xnor x24,x29,x6 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkb_xnor_cg_cp_rs1_b29, Zbkb_xnor_cg_cp_rs1_b29_str) + 8000065c: 000fb383 ld x7,0(x31) + 80000660: 01838c63 beq x7,x24,80000678 + 80000664: 6b40746f jal x8,80007d18 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 8000ea24 .word 0x8000ea24 + 80000674: 00000000 .word 0x00000000 + 80000678: 008f8f93 addi x31,x31,8 + + mv x1, x30 # switch data pointer register to avoid conflict with test + 8000067c: 000f0093 addi x1,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x107dcc10eb61bb49 + 80000680: 0000bf03 ld x30,0(x1) + 80000684: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x8c860cfd4bd5f106 + 80000688: 0000bb83 ld x23,0(x1) + 8000068c: 00808093 addi x1,x1,8 + +0000000080000690 : +Zbkb_xnor_cg_cp_rs1_b30: + xnor x2, x30, x23 # perform operation + 80000690: 417f4133 xnor x2,x30,x23 + # Check if x2 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x2, Zbkb_xnor_cg_cp_rs1_b30, Zbkb_xnor_cg_cp_rs1_b30_str) + 80000694: 000fb383 ld x7,0(x31) + 80000698: 00238c63 beq x7,x2,800006b0 + 8000069c: 67c0746f jal x8,80007d18 + 800006a0: 80000690 .word 0x80000690 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 8000ea57 .word 0x8000ea57 + 800006ac: 00000000 .word 0x00000000 + 800006b0: 008f8f93 addi x31,x31,8 + + mv x19, x31 # switch signature pointer register to avoid conflict with test + 800006b4: 000f8993 addi x19,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x408e0f6be75f7b59 + 800006b8: 0000bf83 ld x31,0(x1) + 800006bc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x4231c40e4cbd061c + 800006c0: 0000be03 ld x28,0(x1) + 800006c4: 00808093 addi x1,x1,8 + +00000000800006c8 : +Zbkb_xnor_cg_cp_rs1_b31: + xnor x15, x31, x28 # perform operation + 800006c8: 41cfc7b3 xnor x15,x31,x28 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkb_xnor_cg_cp_rs1_b31, Zbkb_xnor_cg_cp_rs1_b31_str) + 800006cc: 0009b383 ld x7,0(x19) + 800006d0: 00f38c63 beq x7,x15,800006e8 + 800006d4: 6440746f jal x8,80007d18 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 8000ea8a .word 0x8000ea8a + 800006e4: 00000000 .word 0x00000000 + 800006e8: 00898993 addi x19,x19,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xfeecdb16799e8247 + 800006ec: 0000b103 ld x2,0(x1) + 800006f0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xd805599fefe8be50 + 800006f4: 0000b003 ld x0,0(x1) + 800006f8: 00808093 addi x1,x1,8 + +00000000800006fc : +Zbkb_xnor_cg_cp_rs2_b0: + xnor x13, x2, x0 # perform operation + 800006fc: 400146b3 xnor x13,x2,x0 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_xnor_cg_cp_rs2_b0, Zbkb_xnor_cg_cp_rs2_b0_str) + 80000700: 0009b383 ld x7,0(x19) + 80000704: 00d38c63 beq x7,x13,8000071c + 80000708: 6100746f jal x8,80007d18 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 8000eabd .word 0x8000eabd + 80000718: 00000000 .word 0x00000000 + 8000071c: 00898993 addi x19,x19,8 + + mv x3, x1 # switch data pointer register to avoid conflict with test + 80000720: 00008193 addi x3,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x6f0c8609a71f3924 + 80000724: 0001be83 ld x29,0(x3) + 80000728: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0x0d0f05163b12afe0 + 8000072c: 0001b083 ld x1,0(x3) + 80000730: 00818193 addi x3,x3,8 + +0000000080000734 : +Zbkb_xnor_cg_cp_rs2_b1: + xnor x31, x29, x1 # perform operation + 80000734: 401ecfb3 xnor x31,x29,x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zbkb_xnor_cg_cp_rs2_b1, Zbkb_xnor_cg_cp_rs2_b1_str) + 80000738: 0009b383 ld x7,0(x19) + 8000073c: 01f38c63 beq x7,x31,80000754 + 80000740: 5d80746f jal x8,80007d18 + 80000744: 80000734 .word 0x80000734 + 80000748: 00000000 .word 0x00000000 + 8000074c: 8000eaef .word 0x8000eaef + 80000750: 00000000 .word 0x00000000 + 80000754: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xae329249add1322b + 80000758: 0001be83 ld x29,0(x3) + 8000075c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs2: x2 = 0x9b761941b2c9f532 + 80000760: 0001b103 ld x2,0(x3) + 80000764: 00818193 addi x3,x3,8 + +0000000080000768 : +Zbkb_xnor_cg_cp_rs2_b2: + xnor x11, x29, x2 # perform operation + 80000768: 402ec5b3 xnor x11,x29,x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zbkb_xnor_cg_cp_rs2_b2, Zbkb_xnor_cg_cp_rs2_b2_str) + 8000076c: 0009b383 ld x7,0(x19) + 80000770: 00b38c63 beq x7,x11,80000788 + 80000774: 5a40746f jal x8,80007d18 + 80000778: 80000768 .word 0x80000768 + 8000077c: 00000000 .word 0x00000000 + 80000780: 8000eb21 .word 0x8000eb21 + 80000784: 00000000 .word 0x00000000 + 80000788: 00898993 addi x19,x19,8 + + mv x24, x3 # switch data pointer register to avoid conflict with test + 8000078c: 00018c13 addi x24,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x6888f024404d7ee3 + 80000790: 000c3d83 ld x27,0(x24) + 80000794: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x4ea02f0ffc0809c8 + 80000798: 000c3183 ld x3,0(x24) + 8000079c: 008c0c13 addi x24,x24,8 + +00000000800007a0 : +Zbkb_xnor_cg_cp_rs2_b3: + xnor x12, x27, x3 # perform operation + 800007a0: 403dc633 xnor x12,x27,x3 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zbkb_xnor_cg_cp_rs2_b3, Zbkb_xnor_cg_cp_rs2_b3_str) + 800007a4: 0009b383 ld x7,0(x19) + 800007a8: 00c38c63 beq x7,x12,800007c0 + 800007ac: 56c0746f jal x8,80007d18 + 800007b0: 800007a0 .word 0x800007a0 + 800007b4: 00000000 .word 0x00000000 + 800007b8: 8000eb53 .word 0x8000eb53 + 800007bc: 00000000 .word 0x00000000 + 800007c0: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0e73ca04aeaa82c2 + 800007c4: 000c3903 ld x18,0(x24) + 800007c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x175731b0dcd821b4 + 800007cc: 000c3203 ld x4,0(x24) + 800007d0: 008c0c13 addi x24,x24,8 + +00000000800007d4 : +Zbkb_xnor_cg_cp_rs2_b4: + xnor x14, x18, x4 # perform operation + 800007d4: 40494733 xnor x14,x18,x4 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkb_xnor_cg_cp_rs2_b4, Zbkb_xnor_cg_cp_rs2_b4_str) + 800007d8: 0009b383 ld x7,0(x19) + 800007dc: 00e38c63 beq x7,x14,800007f4 + 800007e0: 5380746f jal x8,80007d18 + 800007e4: 800007d4 .word 0x800007d4 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 8000eb85 .word 0x8000eb85 + 800007f0: 00000000 .word 0x00000000 + 800007f4: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x679bf8e7f782df8b + 800007f8: 000c3703 ld x14,0(x24) + 800007fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x4626512f01ddb71d + 80000800: 000c3283 ld x5,0(x24) + 80000804: 008c0c13 addi x24,x24,8 + +0000000080000808 : +Zbkb_xnor_cg_cp_rs2_b5: + xnor x2, x14, x5 # perform operation + 80000808: 40574133 xnor x2,x14,x5 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zbkb_xnor_cg_cp_rs2_b5, Zbkb_xnor_cg_cp_rs2_b5_str) + 8000080c: 0009b383 ld x7,0(x19) + 80000810: 00238c63 beq x7,x2,80000828 + 80000814: 5040746f jal x8,80007d18 + 80000818: 80000808 .word 0x80000808 + 8000081c: 00000000 .word 0x00000000 + 80000820: 8000ebb7 .word 0x8000ebb7 + 80000824: 00000000 .word 0x00000000 + 80000828: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x65fc0afbcfb39e4a + 8000082c: 000c3283 ld x5,0(x24) + 80000830: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x1034efb470100662 + 80000834: 000c3303 ld x6,0(x24) + 80000838: 008c0c13 addi x24,x24,8 + +000000008000083c : +Zbkb_xnor_cg_cp_rs2_b6: + xnor x13, x5, x6 # perform operation + 8000083c: 4062c6b3 xnor x13,x5,x6 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkb_xnor_cg_cp_rs2_b6, Zbkb_xnor_cg_cp_rs2_b6_str) + 80000840: 0009b383 ld x7,0(x19) + 80000844: 00d38c63 beq x7,x13,8000085c + 80000848: 4d00746f jal x8,80007d18 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 8000ebe9 .word 0x8000ebe9 + 80000858: 00000000 .word 0x00000000 + 8000085c: 00898993 addi x19,x19,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000860: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000864: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x03a899eb66c7ed59 + 80000868: 000c3c83 ld x25,0(x24) + 8000086c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0xb5416f4c76bd38f7 + 80000870: 000c3383 ld x7,0(x24) + 80000874: 008c0c13 addi x24,x24,8 + +0000000080000878 : +Zbkb_xnor_cg_cp_rs2_b7: + xnor x17, x25, x7 # perform operation + 80000878: 407cc8b3 xnor x17,x25,x7 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkb_xnor_cg_cp_rs2_b7, Zbkb_xnor_cg_cp_rs2_b7_str) + 8000087c: 0009b203 ld x4,0(x19) + 80000880: 01120c63 beq x4,x17,80000898 + 80000884: 47c072ef jal x5,80007d00 + 80000888: 80000878 .word 0x80000878 + 8000088c: 00000000 .word 0x00000000 + 80000890: 8000ec1b .word 0x8000ec1b + 80000894: 00000000 .word 0x00000000 + 80000898: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xd71a80a48a098749 + 8000089c: 000c3883 ld x17,0(x24) + 800008a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x3b2f1e24eb8bb197 + 800008a4: 000c3403 ld x8,0(x24) + 800008a8: 008c0c13 addi x24,x24,8 + +00000000800008ac : +Zbkb_xnor_cg_cp_rs2_b8: + xnor x28, x17, x8 # perform operation + 800008ac: 4088ce33 xnor x28,x17,x8 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_xnor_cg_cp_rs2_b8, Zbkb_xnor_cg_cp_rs2_b8_str) + 800008b0: 0009b203 ld x4,0(x19) + 800008b4: 01c20c63 beq x4,x28,800008cc + 800008b8: 448072ef jal x5,80007d00 + 800008bc: 800008ac .word 0x800008ac + 800008c0: 00000000 .word 0x00000000 + 800008c4: 8000ec4d .word 0x8000ec4d + 800008c8: 00000000 .word 0x00000000 + 800008cc: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xbc412d1d09527ec3 + 800008d0: 000c3703 ld x14,0(x24) + 800008d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x617da58f636458b8 + 800008d8: 000c3483 ld x9,0(x24) + 800008dc: 008c0c13 addi x24,x24,8 + +00000000800008e0 : +Zbkb_xnor_cg_cp_rs2_b9: + xnor x28, x14, x9 # perform operation + 800008e0: 40974e33 xnor x28,x14,x9 + # Check if x28 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x28, Zbkb_xnor_cg_cp_rs2_b9, Zbkb_xnor_cg_cp_rs2_b9_str) + 800008e4: 0009b203 ld x4,0(x19) + 800008e8: 01c20c63 beq x4,x28,80000900 + 800008ec: 414072ef jal x5,80007d00 + 800008f0: 800008e0 .word 0x800008e0 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 8000ec7f .word 0x8000ec7f + 800008fc: 00000000 .word 0x00000000 + 80000900: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0x6dec69fe46add912 + 80000904: 000c3383 ld x7,0(x24) + 80000908: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x90c449aa7a67e593 + 8000090c: 000c3503 ld x10,0(x24) + 80000910: 008c0c13 addi x24,x24,8 + +0000000080000914 : +Zbkb_xnor_cg_cp_rs2_b10: + xnor x31, x7, x10 # perform operation + 80000914: 40a3cfb3 xnor x31,x7,x10 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zbkb_xnor_cg_cp_rs2_b10, Zbkb_xnor_cg_cp_rs2_b10_str) + 80000918: 0009b203 ld x4,0(x19) + 8000091c: 01f20c63 beq x4,x31,80000934 + 80000920: 3e0072ef jal x5,80007d00 + 80000924: 80000914 .word 0x80000914 + 80000928: 00000000 .word 0x00000000 + 8000092c: 8000ecb1 .word 0x8000ecb1 + 80000930: 00000000 .word 0x00000000 + 80000934: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x2e9f21b6b9e3fc75 + 80000938: 000c3603 ld x12,0(x24) + 8000093c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xec6d1bd1f497255f + 80000940: 000c3583 ld x11,0(x24) + 80000944: 008c0c13 addi x24,x24,8 + +0000000080000948 : +Zbkb_xnor_cg_cp_rs2_b11: + xnor x2, x12, x11 # perform operation + 80000948: 40b64133 xnor x2,x12,x11 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkb_xnor_cg_cp_rs2_b11, Zbkb_xnor_cg_cp_rs2_b11_str) + 8000094c: 0009b203 ld x4,0(x19) + 80000950: 00220c63 beq x4,x2,80000968 + 80000954: 3ac072ef jal x5,80007d00 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000ece4 .word 0x8000ece4 + 80000964: 00000000 .word 0x00000000 + 80000968: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x1df095a49cfac39a + 8000096c: 000c3903 ld x18,0(x24) + 80000970: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xbee7a57bb87999e4 + 80000974: 000c3603 ld x12,0(x24) + 80000978: 008c0c13 addi x24,x24,8 + +000000008000097c : +Zbkb_xnor_cg_cp_rs2_b12: + xnor x0, x18, x12 # perform operation + 8000097c: 40c94033 xnor x0,x18,x12 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkb_xnor_cg_cp_rs2_b12, Zbkb_xnor_cg_cp_rs2_b12_str) + 80000980: 0009b203 ld x4,0(x19) + 80000984: 00020c63 beq x4,x0,8000099c + 80000988: 378072ef jal x5,80007d00 + 8000098c: 8000097c .word 0x8000097c + 80000990: 00000000 .word 0x00000000 + 80000994: 8000ed17 .word 0x8000ed17 + 80000998: 00000000 .word 0x00000000 + 8000099c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x3bdd30385beb6b50 + 800009a0: 000c3403 ld x8,0(x24) + 800009a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x56864b068f72a8e7 + 800009a8: 000c3683 ld x13,0(x24) + 800009ac: 008c0c13 addi x24,x24,8 + +00000000800009b0 : +Zbkb_xnor_cg_cp_rs2_b13: + xnor x6, x8, x13 # perform operation + 800009b0: 40d44333 xnor x6,x8,x13 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zbkb_xnor_cg_cp_rs2_b13, Zbkb_xnor_cg_cp_rs2_b13_str) + 800009b4: 0009b203 ld x4,0(x19) + 800009b8: 00620c63 beq x4,x6,800009d0 + 800009bc: 344072ef jal x5,80007d00 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 8000ed4a .word 0x8000ed4a + 800009cc: 00000000 .word 0x00000000 + 800009d0: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xf8b0e58b8c3a501d + 800009d4: 000c3783 ld x15,0(x24) + 800009d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x1eaba6c71cf71191 + 800009dc: 000c3703 ld x14,0(x24) + 800009e0: 008c0c13 addi x24,x24,8 + +00000000800009e4 : +Zbkb_xnor_cg_cp_rs2_b14: + xnor x18, x15, x14 # perform operation + 800009e4: 40e7c933 xnor x18,x15,x14 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkb_xnor_cg_cp_rs2_b14, Zbkb_xnor_cg_cp_rs2_b14_str) + 800009e8: 0009b203 ld x4,0(x19) + 800009ec: 01220c63 beq x4,x18,80000a04 + 800009f0: 310072ef jal x5,80007d00 + 800009f4: 800009e4 .word 0x800009e4 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 8000ed7d .word 0x8000ed7d + 80000a00: 00000000 .word 0x00000000 + 80000a04: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x212931a8a9ca021b + 80000a08: 000c3003 ld x0,0(x24) + 80000a0c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x26d13cf7c5404ffa + 80000a10: 000c3783 ld x15,0(x24) + 80000a14: 008c0c13 addi x24,x24,8 + +0000000080000a18 : +Zbkb_xnor_cg_cp_rs2_b15: + xnor x26, x0, x15 # perform operation + 80000a18: 40f04d33 xnor x26,x0,x15 + # Check if x26 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x26, Zbkb_xnor_cg_cp_rs2_b15, Zbkb_xnor_cg_cp_rs2_b15_str) + 80000a1c: 0009b203 ld x4,0(x19) + 80000a20: 01a20c63 beq x4,x26,80000a38 + 80000a24: 2dc072ef jal x5,80007d00 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 8000edb0 .word 0x8000edb0 + 80000a34: 00000000 .word 0x00000000 + 80000a38: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x0e37f41c04dc9dad + 80000a3c: 000c3a83 ld x21,0(x24) + 80000a40: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x667fd5921ad84094 + 80000a44: 000c3803 ld x16,0(x24) + 80000a48: 008c0c13 addi x24,x24,8 + +0000000080000a4c : +Zbkb_xnor_cg_cp_rs2_b16: + xnor x22, x21, x16 # perform operation + 80000a4c: 410acb33 xnor x22,x21,x16 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zbkb_xnor_cg_cp_rs2_b16, Zbkb_xnor_cg_cp_rs2_b16_str) + 80000a50: 0009b203 ld x4,0(x19) + 80000a54: 01620c63 beq x4,x22,80000a6c + 80000a58: 2a8072ef jal x5,80007d00 + 80000a5c: 80000a4c .word 0x80000a4c + 80000a60: 00000000 .word 0x00000000 + 80000a64: 8000ede3 .word 0x8000ede3 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x069ad9da90b631e8 + 80000a70: 000c3a03 ld x20,0(x24) + 80000a74: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xf1bf2fea8ee391b0 + 80000a78: 000c3883 ld x17,0(x24) + 80000a7c: 008c0c13 addi x24,x24,8 + +0000000080000a80 : +Zbkb_xnor_cg_cp_rs2_b17: + xnor x15, x20, x17 # perform operation + 80000a80: 411a47b3 xnor x15,x20,x17 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkb_xnor_cg_cp_rs2_b17, Zbkb_xnor_cg_cp_rs2_b17_str) + 80000a84: 0009b203 ld x4,0(x19) + 80000a88: 00f20c63 beq x4,x15,80000aa0 + 80000a8c: 274072ef jal x5,80007d00 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000ee16 .word 0x8000ee16 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x2a5dc8f5588265bb + 80000aa4: 000c3f03 ld x30,0(x24) + 80000aa8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x77970f231d749bc9 + 80000aac: 000c3903 ld x18,0(x24) + 80000ab0: 008c0c13 addi x24,x24,8 + +0000000080000ab4 : +Zbkb_xnor_cg_cp_rs2_b18: + xnor x29, x30, x18 # perform operation + 80000ab4: 412f4eb3 xnor x29,x30,x18 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zbkb_xnor_cg_cp_rs2_b18, Zbkb_xnor_cg_cp_rs2_b18_str) + 80000ab8: 0009b203 ld x4,0(x19) + 80000abc: 01d20c63 beq x4,x29,80000ad4 + 80000ac0: 240072ef jal x5,80007d00 + 80000ac4: 80000ab4 .word 0x80000ab4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 8000ee49 .word 0x8000ee49 + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 00898993 addi x19,x19,8 + + mv x18, x19 # switch signature pointer register to avoid conflict with test + 80000ad8: 00098913 addi x18,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xc4c36bb8f56448e0 + 80000adc: 000c3703 ld x14,0(x24) + 80000ae0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x6eb539acf8430aa3 + 80000ae4: 000c3983 ld x19,0(x24) + 80000ae8: 008c0c13 addi x24,x24,8 + +0000000080000aec : +Zbkb_xnor_cg_cp_rs2_b19: + xnor x0, x14, x19 # perform operation + 80000aec: 41374033 xnor x0,x14,x19 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkb_xnor_cg_cp_rs2_b19, Zbkb_xnor_cg_cp_rs2_b19_str) + 80000af0: 00093203 ld x4,0(x18) + 80000af4: 00020c63 beq x4,x0,80000b0c + 80000af8: 208072ef jal x5,80007d00 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000ee7c .word 0x8000ee7c + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xa519eca983c0fd2b + 80000b10: 000c3d83 ld x27,0(x24) + 80000b14: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x1974a170dbba2e51 + 80000b18: 000c3a03 ld x20,0(x24) + 80000b1c: 008c0c13 addi x24,x24,8 + +0000000080000b20 : +Zbkb_xnor_cg_cp_rs2_b20: + xnor x3, x27, x20 # perform operation + 80000b20: 414dc1b3 xnor x3,x27,x20 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_xnor_cg_cp_rs2_b20, Zbkb_xnor_cg_cp_rs2_b20_str) + 80000b24: 00093203 ld x4,0(x18) + 80000b28: 00320c63 beq x4,x3,80000b40 + 80000b2c: 1d4072ef jal x5,80007d00 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 8000eeaf .word 0x8000eeaf + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x87c0ce2f4e62d88e + 80000b44: 000c3f03 ld x30,0(x24) + 80000b48: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x50bd5c2f8dc11159 + 80000b4c: 000c3a83 ld x21,0(x24) + 80000b50: 008c0c13 addi x24,x24,8 + +0000000080000b54 : +Zbkb_xnor_cg_cp_rs2_b21: + xnor x23, x30, x21 # perform operation + 80000b54: 415f4bb3 xnor x23,x30,x21 + # Check if x23 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x23, Zbkb_xnor_cg_cp_rs2_b21, Zbkb_xnor_cg_cp_rs2_b21_str) + 80000b58: 00093203 ld x4,0(x18) + 80000b5c: 01720c63 beq x4,x23,80000b74 + 80000b60: 1a0072ef jal x5,80007d00 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000eee2 .word 0x8000eee2 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xf1c1687fc400bc46 + 80000b78: 000c3703 ld x14,0(x24) + 80000b7c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xb8753f0e595c7e85 + 80000b80: 000c3b03 ld x22,0(x24) + 80000b84: 008c0c13 addi x24,x24,8 + +0000000080000b88 : +Zbkb_xnor_cg_cp_rs2_b22: + xnor x26, x14, x22 # perform operation + 80000b88: 41674d33 xnor x26,x14,x22 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zbkb_xnor_cg_cp_rs2_b22, Zbkb_xnor_cg_cp_rs2_b22_str) + 80000b8c: 00093203 ld x4,0(x18) + 80000b90: 01a20c63 beq x4,x26,80000ba8 + 80000b94: 16c072ef jal x5,80007d00 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000ef15 .word 0x8000ef15 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0xecee9405296d6997 + 80000bac: 000c3003 ld x0,0(x24) + 80000bb0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x9c5ddc3eb6e6602b + 80000bb4: 000c3b83 ld x23,0(x24) + 80000bb8: 008c0c13 addi x24,x24,8 + +0000000080000bbc : +Zbkb_xnor_cg_cp_rs2_b23: + xnor x2, x0, x23 # perform operation + 80000bbc: 41704133 xnor x2,x0,x23 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_xnor_cg_cp_rs2_b23, Zbkb_xnor_cg_cp_rs2_b23_str) + 80000bc0: 00093203 ld x4,0(x18) + 80000bc4: 00220c63 beq x4,x2,80000bdc + 80000bc8: 138072ef jal x5,80007d00 + 80000bcc: 80000bbc .word 0x80000bbc + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 8000ef48 .word 0x8000ef48 + 80000bd8: 00000000 .word 0x00000000 + 80000bdc: 00890913 addi x18,x18,8 + + mv x2, x24 # switch data pointer register to avoid conflict with test + 80000be0: 000c0113 addi x2,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x39e44106af042df2 + 80000be4: 00013d03 ld x26,0(x2) + 80000be8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x1f09d080dec4a49d + 80000bec: 00013c03 ld x24,0(x2) + 80000bf0: 00810113 addi x2,x2,8 + +0000000080000bf4 : +Zbkb_xnor_cg_cp_rs2_b24: + xnor x8, x26, x24 # perform operation + 80000bf4: 418d4433 xnor x8,x26,x24 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zbkb_xnor_cg_cp_rs2_b24, Zbkb_xnor_cg_cp_rs2_b24_str) + 80000bf8: 00093203 ld x4,0(x18) + 80000bfc: 00820c63 beq x4,x8,80000c14 + 80000c00: 100072ef jal x5,80007d00 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000ef7b .word 0x8000ef7b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x368be1f9d4edfde5 + 80000c18: 00013983 ld x19,0(x2) + 80000c1c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xf1810e480a187865 + 80000c20: 00013c83 ld x25,0(x2) + 80000c24: 00810113 addi x2,x2,8 + +0000000080000c28 : +Zbkb_xnor_cg_cp_rs2_b25: + xnor x27, x19, x25 # perform operation + 80000c28: 4199cdb3 xnor x27,x19,x25 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zbkb_xnor_cg_cp_rs2_b25, Zbkb_xnor_cg_cp_rs2_b25_str) + 80000c2c: 00093203 ld x4,0(x18) + 80000c30: 01b20c63 beq x4,x27,80000c48 + 80000c34: 0cc072ef jal x5,80007d00 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000efae .word 0x8000efae + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xf78842d97312831d + 80000c4c: 00013c83 ld x25,0(x2) + 80000c50: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xc595ce90bbfaa641 + 80000c54: 00013d03 ld x26,0(x2) + 80000c58: 00810113 addi x2,x2,8 + +0000000080000c5c : +Zbkb_xnor_cg_cp_rs2_b26: + xnor x9, x25, x26 # perform operation + 80000c5c: 41acc4b3 xnor x9,x25,x26 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zbkb_xnor_cg_cp_rs2_b26, Zbkb_xnor_cg_cp_rs2_b26_str) + 80000c60: 00093203 ld x4,0(x18) + 80000c64: 00920c63 beq x4,x9,80000c7c + 80000c68: 098072ef jal x5,80007d00 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000efe1 .word 0x8000efe1 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0xabaec11da179df24 + 80000c80: 00013003 ld x0,0(x2) + 80000c84: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x2eb463fa24a6792f + 80000c88: 00013d83 ld x27,0(x2) + 80000c8c: 00810113 addi x2,x2,8 + +0000000080000c90 : +Zbkb_xnor_cg_cp_rs2_b27: + xnor x25, x0, x27 # perform operation + 80000c90: 41b04cb3 xnor x25,x0,x27 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zbkb_xnor_cg_cp_rs2_b27, Zbkb_xnor_cg_cp_rs2_b27_str) + 80000c94: 00093203 ld x4,0(x18) + 80000c98: 01920c63 beq x4,x25,80000cb0 + 80000c9c: 064072ef jal x5,80007d00 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000f014 .word 0x8000f014 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xf76edc58253c2501 + 80000cb4: 00013e83 ld x29,0(x2) + 80000cb8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x81317d36a82c44c8 + 80000cbc: 00013e03 ld x28,0(x2) + 80000cc0: 00810113 addi x2,x2,8 + +0000000080000cc4 : +Zbkb_xnor_cg_cp_rs2_b28: + xnor x10, x29, x28 # perform operation + 80000cc4: 41cec533 xnor x10,x29,x28 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zbkb_xnor_cg_cp_rs2_b28, Zbkb_xnor_cg_cp_rs2_b28_str) + 80000cc8: 00093203 ld x4,0(x18) + 80000ccc: 00a20c63 beq x4,x10,80000ce4 + 80000cd0: 030072ef jal x5,80007d00 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f047 .word 0x8000f047 + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xa6a7a975351a7d8d + 80000ce8: 00013503 ld x10,0(x2) + 80000cec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xb265c8f3ada0f6cd + 80000cf0: 00013e83 ld x29,0(x2) + 80000cf4: 00810113 addi x2,x2,8 + +0000000080000cf8 : +Zbkb_xnor_cg_cp_rs2_b29: + xnor x21, x10, x29 # perform operation + 80000cf8: 41d54ab3 xnor x21,x10,x29 + # Check if x21 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x21, Zbkb_xnor_cg_cp_rs2_b29, Zbkb_xnor_cg_cp_rs2_b29_str) + 80000cfc: 00093203 ld x4,0(x18) + 80000d00: 01520c63 beq x4,x21,80000d18 + 80000d04: 7fd062ef jal x5,80007d00 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000f07a .word 0x8000f07a + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x8976be4d556181e7 + 80000d1c: 00013f83 ld x31,0(x2) + 80000d20: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x2f6ca63fad263b7f + 80000d24: 00013f03 ld x30,0(x2) + 80000d28: 00810113 addi x2,x2,8 + +0000000080000d2c : +Zbkb_xnor_cg_cp_rs2_b30: + xnor x27, x31, x30 # perform operation + 80000d2c: 41efcdb3 xnor x27,x31,x30 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zbkb_xnor_cg_cp_rs2_b30, Zbkb_xnor_cg_cp_rs2_b30_str) + 80000d30: 00093203 ld x4,0(x18) + 80000d34: 01b20c63 beq x4,x27,80000d4c + 80000d38: 7c9062ef jal x5,80007d00 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000f0ad .word 0x8000f0ad + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00890913 addi x18,x18,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x17fedaebb0cfc154 + 80000d50: 00013303 ld x6,0(x2) + 80000d54: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x5379a68055535c8e + 80000d58: 00013f83 ld x31,0(x2) + 80000d5c: 00810113 addi x2,x2,8 + +0000000080000d60 : +Zbkb_xnor_cg_cp_rs2_b31: + xnor x19, x6, x31 # perform operation + 80000d60: 41f349b3 xnor x19,x6,x31 + # Check if x19 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x19, Zbkb_xnor_cg_cp_rs2_b31, Zbkb_xnor_cg_cp_rs2_b31_str) + 80000d64: 00093203 ld x4,0(x18) + 80000d68: 01320c63 beq x4,x19,80000d80 + 80000d6c: 795062ef jal x5,80007d00 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8000f0e0 .word 0x8000f0e0 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00890913 addi x18,x18,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xb8e713397898fe8b + 80000d84: 00013d83 ld x27,0(x2) + 80000d88: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xba4987525952a4cb + 80000d8c: 00013d03 ld x26,0(x2) + 80000d90: 00810113 addi x2,x2,8 + +0000000080000d94 : +Zbkb_xnor_cg_cp_rd_b0: + xnor x0, x27, x26 # perform operation + 80000d94: 41adc033 xnor x0,x27,x26 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zbkb_xnor_cg_cp_rd_b0, Zbkb_xnor_cg_cp_rd_b0_str) + 80000d98: 00093203 ld x4,0(x18) + 80000d9c: 00020c63 beq x4,x0,80000db4 + 80000da0: 761062ef jal x5,80007d00 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 8000f113 .word 0x8000f113 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x253aed4360c89c36 + 80000db8: 00013583 ld x11,0(x2) + 80000dbc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x3339a12a49026ae2 + 80000dc0: 00013d83 ld x27,0(x2) + 80000dc4: 00810113 addi x2,x2,8 + +0000000080000dc8 : +Zbkb_xnor_cg_cp_rd_b1: + xnor x1, x11, x27 # perform operation + 80000dc8: 41b5c0b3 xnor x1,x11,x27 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zbkb_xnor_cg_cp_rd_b1, Zbkb_xnor_cg_cp_rd_b1_str) + 80000dcc: 00093203 ld x4,0(x18) + 80000dd0: 00120c63 beq x4,x1,80000de8 + 80000dd4: 72d062ef jal x5,80007d00 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 8000f144 .word 0x8000f144 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00890913 addi x18,x18,8 + + mv x31, x2 # switch data pointer register to avoid conflict with test + 80000dec: 00010f93 addi x31,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x1a1d6d936df9385e + 80000df0: 000fba83 ld x21,0(x31) + 80000df4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0x48bf57d9cb5d312b + 80000df8: 000fb683 ld x13,0(x31) + 80000dfc: 008f8f93 addi x31,x31,8 + +0000000080000e00 : +Zbkb_xnor_cg_cp_rd_b2: + xnor x2, x21, x13 # perform operation + 80000e00: 40dac133 xnor x2,x21,x13 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zbkb_xnor_cg_cp_rd_b2, Zbkb_xnor_cg_cp_rd_b2_str) + 80000e04: 00093203 ld x4,0(x18) + 80000e08: 00220c63 beq x4,x2,80000e20 + 80000e0c: 6f5062ef jal x5,80007d00 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 8000f175 .word 0x8000f175 + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x0e2446e7dae2f8d3 + 80000e24: 000fb783 ld x15,0(x31) + 80000e28: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xfe638439416208cf + 80000e2c: 000fbe83 ld x29,0(x31) + 80000e30: 008f8f93 addi x31,x31,8 + +0000000080000e34 : +Zbkb_xnor_cg_cp_rd_b3: + xnor x3, x15, x29 # perform operation + 80000e34: 41d7c1b3 xnor x3,x15,x29 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zbkb_xnor_cg_cp_rd_b3, Zbkb_xnor_cg_cp_rd_b3_str) + 80000e38: 00093203 ld x4,0(x18) + 80000e3c: 00320c63 beq x4,x3,80000e54 + 80000e40: 6c1062ef jal x5,80007d00 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 8000f1a6 .word 0x8000f1a6 + 80000e50: 00000000 .word 0x00000000 + 80000e54: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e58: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e5c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x400b799ea040438b + 80000e60: 000fbb83 ld x23,0(x31) + 80000e64: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0x942a6ceb13deb7db + 80000e68: 000fb403 ld x8,0(x31) + 80000e6c: 008f8f93 addi x31,x31,8 + +0000000080000e70 : +Zbkb_xnor_cg_cp_rd_b4: + xnor x4, x23, x8 # perform operation + 80000e70: 408bc233 xnor x4,x23,x8 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zbkb_xnor_cg_cp_rd_b4, Zbkb_xnor_cg_cp_rd_b4_str) + 80000e74: 00093683 ld x13,0(x18) + 80000e78: 00468c63 beq x13,x4,80000e90 + 80000e7c: 6c50676f jal x14,80007d40 + 80000e80: 80000e70 .word 0x80000e70 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 8000f1d7 .word 0x8000f1d7 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0xd957a3f906cc2d82 + 80000e94: 000fb103 ld x2,0(x31) + 80000e98: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x48f19128098d016c + 80000e9c: 000fb183 ld x3,0(x31) + 80000ea0: 008f8f93 addi x31,x31,8 + +0000000080000ea4 : +Zbkb_xnor_cg_cp_rd_b5: + xnor x5, x2, x3 # perform operation + 80000ea4: 403142b3 xnor x5,x2,x3 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zbkb_xnor_cg_cp_rd_b5, Zbkb_xnor_cg_cp_rd_b5_str) + 80000ea8: 00093683 ld x13,0(x18) + 80000eac: 00568c63 beq x13,x5,80000ec4 + 80000eb0: 6910676f jal x14,80007d40 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 8000f208 .word 0x8000f208 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0xf71c7d0d685e69d8 + 80000ec8: 000fb603 ld x12,0(x31) + 80000ecc: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x10d0a62979921b9e + 80000ed0: 000fb383 ld x7,0(x31) + 80000ed4: 008f8f93 addi x31,x31,8 + +0000000080000ed8 : +Zbkb_xnor_cg_cp_rd_b6: + xnor x6, x12, x7 # perform operation + 80000ed8: 40764333 xnor x6,x12,x7 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zbkb_xnor_cg_cp_rd_b6, Zbkb_xnor_cg_cp_rd_b6_str) + 80000edc: 00093683 ld x13,0(x18) + 80000ee0: 00668c63 beq x13,x6,80000ef8 + 80000ee4: 65d0676f jal x14,80007d40 + 80000ee8: 80000ed8 .word 0x80000ed8 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 8000f239 .word 0x8000f239 + 80000ef4: 00000000 .word 0x00000000 + 80000ef8: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs1: x0 = 0xea281de52ffeca7f + 80000efc: 000fb003 ld x0,0(x31) + 80000f00: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0x0c738528f325f543 + 80000f04: 000fb783 ld x15,0(x31) + 80000f08: 008f8f93 addi x31,x31,8 + +0000000080000f0c : +Zbkb_xnor_cg_cp_rd_b7: + xnor x7, x0, x15 # perform operation + 80000f0c: 40f043b3 xnor x7,x0,x15 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zbkb_xnor_cg_cp_rd_b7, Zbkb_xnor_cg_cp_rd_b7_str) + 80000f10: 00093683 ld x13,0(x18) + 80000f14: 00768c63 beq x13,x7,80000f2c + 80000f18: 6290676f jal x14,80007d40 + 80000f1c: 80000f0c .word 0x80000f0c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 8000f26a .word 0x8000f26a + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x28141265ae6a446d + 80000f30: 000fb883 ld x17,0(x31) + 80000f34: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x267fe76715b0871f + 80000f38: 000fbe03 ld x28,0(x31) + 80000f3c: 008f8f93 addi x31,x31,8 + +0000000080000f40 : +Zbkb_xnor_cg_cp_rd_b8: + xnor x8, x17, x28 # perform operation + 80000f40: 41c8c433 xnor x8,x17,x28 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zbkb_xnor_cg_cp_rd_b8, Zbkb_xnor_cg_cp_rd_b8_str) + 80000f44: 00093683 ld x13,0(x18) + 80000f48: 00868c63 beq x13,x8,80000f60 + 80000f4c: 5f50676f jal x14,80007d40 + 80000f50: 80000f40 .word 0x80000f40 + 80000f54: 00000000 .word 0x00000000 + 80000f58: 8000f29b .word 0x8000f29b + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0xc7b950e12e118e26 + 80000f64: 000fb803 ld x16,0(x31) + 80000f68: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x2ab0b50d8041083d + 80000f6c: 000fb383 ld x7,0(x31) + 80000f70: 008f8f93 addi x31,x31,8 + +0000000080000f74 : +Zbkb_xnor_cg_cp_rd_b9: + xnor x9, x16, x7 # perform operation + 80000f74: 407844b3 xnor x9,x16,x7 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zbkb_xnor_cg_cp_rd_b9, Zbkb_xnor_cg_cp_rd_b9_str) + 80000f78: 00093683 ld x13,0(x18) + 80000f7c: 00968c63 beq x13,x9,80000f94 + 80000f80: 5c10676f jal x14,80007d40 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 8000f2cc .word 0x8000f2cc + 80000f90: 00000000 .word 0x00000000 + 80000f94: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0xa37ff2e497506c63 + 80000f98: 000fbc03 ld x24,0(x31) + 80000f9c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0x20719160d56f2d3a + 80000fa0: 000fb783 ld x15,0(x31) + 80000fa4: 008f8f93 addi x31,x31,8 + +0000000080000fa8 : +Zbkb_xnor_cg_cp_rd_b10: + xnor x10, x24, x15 # perform operation + 80000fa8: 40fc4533 xnor x10,x24,x15 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zbkb_xnor_cg_cp_rd_b10, Zbkb_xnor_cg_cp_rd_b10_str) + 80000fac: 00093683 ld x13,0(x18) + 80000fb0: 00a68c63 beq x13,x10,80000fc8 + 80000fb4: 58d0676f jal x14,80007d40 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 8000f2fd .word 0x8000f2fd + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x3e4addcfec3eee99 + 80000fcc: 000fba03 ld x20,0(x31) + 80000fd0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x1b6feebd1ea0d0ee + 80000fd4: 000fb383 ld x7,0(x31) + 80000fd8: 008f8f93 addi x31,x31,8 + +0000000080000fdc : +Zbkb_xnor_cg_cp_rd_b11: + xnor x11, x20, x7 # perform operation + 80000fdc: 407a45b3 xnor x11,x20,x7 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zbkb_xnor_cg_cp_rd_b11, Zbkb_xnor_cg_cp_rd_b11_str) + 80000fe0: 00093683 ld x13,0(x18) + 80000fe4: 00b68c63 beq x13,x11,80000ffc + 80000fe8: 5590676f jal x14,80007d40 + 80000fec: 80000fdc .word 0x80000fdc + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 8000f32f .word 0x8000f32f + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xa632e5d754054b11 + 80001000: 000fb483 ld x9,0(x31) + 80001004: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0x255e46112fda4e7c + 80001008: 000fb183 ld x3,0(x31) + 8000100c: 008f8f93 addi x31,x31,8 + +0000000080001010 : +Zbkb_xnor_cg_cp_rd_b12: + xnor x12, x9, x3 # perform operation + 80001010: 4034c633 xnor x12,x9,x3 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zbkb_xnor_cg_cp_rd_b12, Zbkb_xnor_cg_cp_rd_b12_str) + 80001014: 00093683 ld x13,0(x18) + 80001018: 00c68c63 beq x13,x12,80001030 + 8000101c: 5250676f jal x14,80007d40 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 8000f361 .word 0x8000f361 + 8000102c: 00000000 .word 0x00000000 + 80001030: 00890913 addi x18,x18,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001034: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001038: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xe8441558412b97f1 + 8000103c: 000fb303 ld x6,0(x31) + 80001040: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x6f97800eeced685b + 80001044: 000fbc03 ld x24,0(x31) + 80001048: 008f8f93 addi x31,x31,8 + +000000008000104c : +Zbkb_xnor_cg_cp_rd_b13: + xnor x13, x6, x24 # perform operation + 8000104c: 418346b3 xnor x13,x6,x24 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zbkb_xnor_cg_cp_rd_b13, Zbkb_xnor_cg_cp_rd_b13_str) + 80001050: 00093203 ld x4,0(x18) + 80001054: 00d20c63 beq x4,x13,8000106c + 80001058: 4a9062ef jal x5,80007d00 + 8000105c: 8000104c .word 0x8000104c + 80001060: 00000000 .word 0x00000000 + 80001064: 8000f393 .word 0x8000f393 + 80001068: 00000000 .word 0x00000000 + 8000106c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x82a74e44e0954d60 + 80001070: 000fbb03 ld x22,0(x31) + 80001074: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x043002c6941207cf + 80001078: 000fbc83 ld x25,0(x31) + 8000107c: 008f8f93 addi x31,x31,8 + +0000000080001080 : +Zbkb_xnor_cg_cp_rd_b14: + xnor x14, x22, x25 # perform operation + 80001080: 419b4733 xnor x14,x22,x25 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zbkb_xnor_cg_cp_rd_b14, Zbkb_xnor_cg_cp_rd_b14_str) + 80001084: 00093203 ld x4,0(x18) + 80001088: 00e20c63 beq x4,x14,800010a0 + 8000108c: 475062ef jal x5,80007d00 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 8000f3c5 .word 0x8000f3c5 + 8000109c: 00000000 .word 0x00000000 + 800010a0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0xcfcbf8b9ef98f7a4 + 800010a4: 000fb403 ld x8,0(x31) + 800010a8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x7620802f0cb40d1f + 800010ac: 000fbb03 ld x22,0(x31) + 800010b0: 008f8f93 addi x31,x31,8 + +00000000800010b4 : +Zbkb_xnor_cg_cp_rd_b15: + xnor x15, x8, x22 # perform operation + 800010b4: 416447b3 xnor x15,x8,x22 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zbkb_xnor_cg_cp_rd_b15, Zbkb_xnor_cg_cp_rd_b15_str) + 800010b8: 00093203 ld x4,0(x18) + 800010bc: 00f20c63 beq x4,x15,800010d4 + 800010c0: 441062ef jal x5,80007d00 + 800010c4: 800010b4 .word 0x800010b4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 8000f3f7 .word 0x8000f3f7 + 800010d0: 00000000 .word 0x00000000 + 800010d4: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xb732320e0a5083ab + 800010d8: 000fbe83 ld x29,0(x31) + 800010dc: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x2c572eba12cbdc75 + 800010e0: 000fb303 ld x6,0(x31) + 800010e4: 008f8f93 addi x31,x31,8 + +00000000800010e8 : +Zbkb_xnor_cg_cp_rd_b16: + xnor x16, x29, x6 # perform operation + 800010e8: 406ec833 xnor x16,x29,x6 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zbkb_xnor_cg_cp_rd_b16, Zbkb_xnor_cg_cp_rd_b16_str) + 800010ec: 00093203 ld x4,0(x18) + 800010f0: 01020c63 beq x4,x16,80001108 + 800010f4: 40d062ef jal x5,80007d00 + 800010f8: 800010e8 .word 0x800010e8 + 800010fc: 00000000 .word 0x00000000 + 80001100: 8000f429 .word 0x8000f429 + 80001104: 00000000 .word 0x00000000 + 80001108: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x3b7f721d20862d18 + 8000110c: 000fba83 ld x21,0(x31) + 80001110: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x28327f21fc7b8c24 + 80001114: 000fbd03 ld x26,0(x31) + 80001118: 008f8f93 addi x31,x31,8 + +000000008000111c : +Zbkb_xnor_cg_cp_rd_b17: + xnor x17, x21, x26 # perform operation + 8000111c: 41aac8b3 xnor x17,x21,x26 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zbkb_xnor_cg_cp_rd_b17, Zbkb_xnor_cg_cp_rd_b17_str) + 80001120: 00093203 ld x4,0(x18) + 80001124: 01120c63 beq x4,x17,8000113c + 80001128: 3d9062ef jal x5,80007d00 + 8000112c: 8000111c .word 0x8000111c + 80001130: 00000000 .word 0x00000000 + 80001134: 8000f45b .word 0x8000f45b + 80001138: 00000000 .word 0x00000000 + 8000113c: 00890913 addi x18,x18,8 + + mv x11, x18 # switch signature pointer register to avoid conflict with test + 80001140: 00090593 addi x11,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xc9ed3b1996d9655d + 80001144: 000fb183 ld x3,0(x31) + 80001148: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xa34f430fd728e678 + 8000114c: 000fb103 ld x2,0(x31) + 80001150: 008f8f93 addi x31,x31,8 + +0000000080001154 : +Zbkb_xnor_cg_cp_rd_b18: + xnor x18, x3, x2 # perform operation + 80001154: 4021c933 xnor x18,x3,x2 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cp_rd_b18, Zbkb_xnor_cg_cp_rd_b18_str) + 80001158: 0005b203 ld x4,0(x11) + 8000115c: 01220c63 beq x4,x18,80001174 + 80001160: 3a1062ef jal x5,80007d00 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 8000f48d .word 0x8000f48d + 80001170: 00000000 .word 0x00000000 + 80001174: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x5a3a3a81bc3a21ce + 80001178: 000fb403 ld x8,0(x31) + 8000117c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0xf1161a9521cdc521 + 80001180: 000fbe03 ld x28,0(x31) + 80001184: 008f8f93 addi x31,x31,8 + +0000000080001188 : +Zbkb_xnor_cg_cp_rd_b19: + xnor x19, x8, x28 # perform operation + 80001188: 41c449b3 xnor x19,x8,x28 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cp_rd_b19, Zbkb_xnor_cg_cp_rd_b19_str) + 8000118c: 0005b203 ld x4,0(x11) + 80001190: 01320c63 beq x4,x19,800011a8 + 80001194: 36d062ef jal x5,80007d00 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8000f4bf .word 0x8000f4bf + 800011a4: 00000000 .word 0x00000000 + 800011a8: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xe76cd9f7daf7f5fb + 800011ac: 000fbf03 ld x30,0(x31) + 800011b0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xc0cd1117bd53e409 + 800011b4: 000fbc83 ld x25,0(x31) + 800011b8: 008f8f93 addi x31,x31,8 + +00000000800011bc : +Zbkb_xnor_cg_cp_rd_b20: + xnor x20, x30, x25 # perform operation + 800011bc: 419f4a33 xnor x20,x30,x25 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cp_rd_b20, Zbkb_xnor_cg_cp_rd_b20_str) + 800011c0: 0005b203 ld x4,0(x11) + 800011c4: 01420c63 beq x4,x20,800011dc + 800011c8: 339062ef jal x5,80007d00 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 8000f4f1 .word 0x8000f4f1 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x64e66c7a4287882b + 800011e0: 000fb683 ld x13,0(x31) + 800011e4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x6a95fd017cb41ec9 + 800011e8: 000fb903 ld x18,0(x31) + 800011ec: 008f8f93 addi x31,x31,8 + +00000000800011f0 : +Zbkb_xnor_cg_cp_rd_b21: + xnor x21, x13, x18 # perform operation + 800011f0: 4126cab3 xnor x21,x13,x18 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cp_rd_b21, Zbkb_xnor_cg_cp_rd_b21_str) + 800011f4: 0005b203 ld x4,0(x11) + 800011f8: 01520c63 beq x4,x21,80001210 + 800011fc: 305062ef jal x5,80007d00 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8000f523 .word 0x8000f523 + 8000120c: 00000000 .word 0x00000000 + 80001210: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x31399cc71ca6587c + 80001214: 000fb683 ld x13,0(x31) + 80001218: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0x6aefd749390b68fe + 8000121c: 000fb703 ld x14,0(x31) + 80001220: 008f8f93 addi x31,x31,8 + +0000000080001224 : +Zbkb_xnor_cg_cp_rd_b22: + xnor x22, x13, x14 # perform operation + 80001224: 40e6cb33 xnor x22,x13,x14 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cp_rd_b22, Zbkb_xnor_cg_cp_rd_b22_str) + 80001228: 0005b203 ld x4,0(x11) + 8000122c: 01620c63 beq x4,x22,80001244 + 80001230: 2d1062ef jal x5,80007d00 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 8000f555 .word 0x8000f555 + 80001240: 00000000 .word 0x00000000 + 80001244: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0xd8297485e01fdc8a + 80001248: 000fb383 ld x7,0(x31) + 8000124c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xee355e99535c8f64 + 80001250: 000fbd03 ld x26,0(x31) + 80001254: 008f8f93 addi x31,x31,8 + +0000000080001258 : +Zbkb_xnor_cg_cp_rd_b23: + xnor x23, x7, x26 # perform operation + 80001258: 41a3cbb3 xnor x23,x7,x26 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cp_rd_b23, Zbkb_xnor_cg_cp_rd_b23_str) + 8000125c: 0005b203 ld x4,0(x11) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 29d062ef jal x5,80007d00 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 8000f587 .word 0x8000f587 + 80001274: 00000000 .word 0x00000000 + 80001278: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x37c49825aef2e962 + 8000127c: 000fb503 ld x10,0(x31) + 80001280: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0x4ab6c10e0a3b5a20 + 80001284: 000fb103 ld x2,0(x31) + 80001288: 008f8f93 addi x31,x31,8 + +000000008000128c : +Zbkb_xnor_cg_cp_rd_b24: + xnor x24, x10, x2 # perform operation + 8000128c: 40254c33 xnor x24,x10,x2 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cp_rd_b24, Zbkb_xnor_cg_cp_rd_b24_str) + 80001290: 0005b203 ld x4,0(x11) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 269062ef jal x5,80007d00 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000f5b9 .word 0x8000f5b9 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xc86d2c0a621525fb + 800012b0: 000fbb83 ld x23,0(x31) + 800012b4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xa892ae2ded18d687 + 800012b8: 000fbd03 ld x26,0(x31) + 800012bc: 008f8f93 addi x31,x31,8 + +00000000800012c0 : +Zbkb_xnor_cg_cp_rd_b25: + xnor x25, x23, x26 # perform operation + 800012c0: 41abccb3 xnor x25,x23,x26 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cp_rd_b25, Zbkb_xnor_cg_cp_rd_b25_str) + 800012c4: 0005b203 ld x4,0(x11) + 800012c8: 01920c63 beq x4,x25,800012e0 + 800012cc: 235062ef jal x5,80007d00 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 8000f5eb .word 0x8000f5eb + 800012dc: 00000000 .word 0x00000000 + 800012e0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x77ec41bce2a6d4e6 + 800012e4: 000fbc03 ld x24,0(x31) + 800012e8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x6279319c34a3d1cc + 800012ec: 000fb803 ld x16,0(x31) + 800012f0: 008f8f93 addi x31,x31,8 + +00000000800012f4 : +Zbkb_xnor_cg_cp_rd_b26: + xnor x26, x24, x16 # perform operation + 800012f4: 410c4d33 xnor x26,x24,x16 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cp_rd_b26, Zbkb_xnor_cg_cp_rd_b26_str) + 800012f8: 0005b203 ld x4,0(x11) + 800012fc: 01a20c63 beq x4,x26,80001314 + 80001300: 201062ef jal x5,80007d00 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 8000f61d .word 0x8000f61d + 80001310: 00000000 .word 0x00000000 + 80001314: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x5c023a4d394e797e + 80001318: 000fb803 ld x16,0(x31) + 8000131c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x2ed0ec97fa0fceb3 + 80001320: 000fbd03 ld x26,0(x31) + 80001324: 008f8f93 addi x31,x31,8 + +0000000080001328 : +Zbkb_xnor_cg_cp_rd_b27: + xnor x27, x16, x26 # perform operation + 80001328: 41a84db3 xnor x27,x16,x26 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cp_rd_b27, Zbkb_xnor_cg_cp_rd_b27_str) + 8000132c: 0005b203 ld x4,0(x11) + 80001330: 01b20c63 beq x4,x27,80001348 + 80001334: 1cd062ef jal x5,80007d00 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 8000f64f .word 0x8000f64f + 80001344: 00000000 .word 0x00000000 + 80001348: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x040fd0100a0ccb14 + 8000134c: 000fb803 ld x16,0(x31) + 80001350: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xb52bf06e13a7ee93 + 80001354: 000fbe83 ld x29,0(x31) + 80001358: 008f8f93 addi x31,x31,8 + +000000008000135c : +Zbkb_xnor_cg_cp_rd_b28: + xnor x28, x16, x29 # perform operation + 8000135c: 41d84e33 xnor x28,x16,x29 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cp_rd_b28, Zbkb_xnor_cg_cp_rd_b28_str) + 80001360: 0005b203 ld x4,0(x11) + 80001364: 01c20c63 beq x4,x28,8000137c + 80001368: 199062ef jal x5,80007d00 + 8000136c: 8000135c .word 0x8000135c + 80001370: 00000000 .word 0x00000000 + 80001374: 8000f681 .word 0x8000f681 + 80001378: 00000000 .word 0x00000000 + 8000137c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xf2850c0bf1e8da14 + 80001380: 000fb303 ld x6,0(x31) + 80001384: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0xbfe6d423ee835161 + 80001388: 000fb083 ld x1,0(x31) + 8000138c: 008f8f93 addi x31,x31,8 + +0000000080001390 : +Zbkb_xnor_cg_cp_rd_b29: + xnor x29, x6, x1 # perform operation + 80001390: 40134eb3 xnor x29,x6,x1 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cp_rd_b29, Zbkb_xnor_cg_cp_rd_b29_str) + 80001394: 0005b203 ld x4,0(x11) + 80001398: 01d20c63 beq x4,x29,800013b0 + 8000139c: 165062ef jal x5,80007d00 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000f6b3 .word 0x8000f6b3 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xb29897f2cdeb5659 + 800013b4: 000fbe83 ld x29,0(x31) + 800013b8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0xd5885ae765dbffdb + 800013bc: 000fb503 ld x10,0(x31) + 800013c0: 008f8f93 addi x31,x31,8 + +00000000800013c4 : +Zbkb_xnor_cg_cp_rd_b30: + xnor x30, x29, x10 # perform operation + 800013c4: 40aecf33 xnor x30,x29,x10 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cp_rd_b30, Zbkb_xnor_cg_cp_rd_b30_str) + 800013c8: 0005b203 ld x4,0(x11) + 800013cc: 01e20c63 beq x4,x30,800013e4 + 800013d0: 131062ef jal x5,80007d00 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 8000f6e5 .word 0x8000f6e5 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00858593 addi x11,x11,8 + + mv x16, x31 # switch data pointer register to avoid conflict with test + 800013e8: 000f8813 addi x16,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xf7620183eb4f7700 + 800013ec: 00083403 ld x8,0(x16) + 800013f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x93d84d5fa68a58d6 + 800013f4: 00083303 ld x6,0(x16) + 800013f8: 00880813 addi x16,x16,8 + +00000000800013fc : +Zbkb_xnor_cg_cp_rd_b31: + xnor x31, x8, x6 # perform operation + 800013fc: 40644fb3 xnor x31,x8,x6 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cp_rd_b31, Zbkb_xnor_cg_cp_rd_b31_str) + 80001400: 0005b203 ld x4,0(x11) + 80001404: 01f20c63 beq x4,x31,8000141c + 80001408: 0f9062ef jal x5,80007d00 + 8000140c: 800013fc .word 0x800013fc + 80001410: 00000000 .word 0x00000000 + 80001414: 8000f717 .word 0x8000f717 + 80001418: 00000000 .word 0x00000000 + 8000141c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x0000000000000000 + 80001420: 00083383 ld x7,0(x16) + 80001424: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x3afa77062cc6904f + 80001428: 00083503 ld x10,0(x16) + 8000142c: 00880813 addi x16,x16,8 + +0000000080001430 : +Zbkb_xnor_cg_cp_rs1_edges_0x0: + xnor x14, x7, x10 # perform operation + 80001430: 40a3c733 xnor x14,x7,x10 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cp_rs1_edges_0x0, Zbkb_xnor_cg_cp_rs1_edges_0x0_str) + 80001434: 0005b203 ld x4,0(x11) + 80001438: 00e20c63 beq x4,x14,80001450 + 8000143c: 0c5062ef jal x5,80007d00 + 80001440: 80001430 .word 0x80001430 + 80001444: 00000000 .word 0x00000000 + 80001448: 8000f749 .word 0x8000f749 + 8000144c: 00000000 .word 0x00000000 + 80001450: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x0000000000000001 + 80001454: 00083883 ld x17,0(x16) + 80001458: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xc1a9cd745738b710 + 8000145c: 00083e03 ld x28,0(x16) + 80001460: 00880813 addi x16,x16,8 + +0000000080001464 : +Zbkb_xnor_cg_cp_rs1_edges_0x1: + xnor x24, x17, x28 # perform operation + 80001464: 41c8cc33 xnor x24,x17,x28 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cp_rs1_edges_0x1, Zbkb_xnor_cg_cp_rs1_edges_0x1_str) + 80001468: 0005b203 ld x4,0(x11) + 8000146c: 01820c63 beq x4,x24,80001484 + 80001470: 091062ef jal x5,80007d00 + 80001474: 80001464 .word 0x80001464 + 80001478: 00000000 .word 0x00000000 + 8000147c: 8000f782 .word 0x8000f782 + 80001480: 00000000 .word 0x00000000 + 80001484: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x0000000000000002 + 80001488: 00083503 ld x10,0(x16) + 8000148c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xed5c1fbd9dd44f6d + 80001490: 00083f83 ld x31,0(x16) + 80001494: 00880813 addi x16,x16,8 + +0000000080001498 : +Zbkb_xnor_cg_cp_rs1_edges_0x2: + xnor x23, x10, x31 # perform operation + 80001498: 41f54bb3 xnor x23,x10,x31 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cp_rs1_edges_0x2, Zbkb_xnor_cg_cp_rs1_edges_0x2_str) + 8000149c: 0005b203 ld x4,0(x11) + 800014a0: 01720c63 beq x4,x23,800014b8 + 800014a4: 05d062ef jal x5,80007d00 + 800014a8: 80001498 .word 0x80001498 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 8000f7bb .word 0x8000f7bb + 800014b4: 00000000 .word 0x00000000 + 800014b8: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x8000000000000000 + 800014bc: 00083983 ld x19,0(x16) + 800014c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5f4af771c519439a + 800014c4: 00083f03 ld x30,0(x16) + 800014c8: 00880813 addi x16,x16,8 + +00000000800014cc : +Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000000: + xnor x12, x19, x30 # perform operation + 800014cc: 41e9c633 xnor x12,x19,x30 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000000, Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d0: 0005b203 ld x4,0(x11) + 800014d4: 00c20c63 beq x4,x12,800014ec + 800014d8: 029062ef jal x5,80007d00 + 800014dc: 800014cc .word 0x800014cc + 800014e0: 00000000 .word 0x00000000 + 800014e4: 8000f7f4 .word 0x8000f7f4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x8000000000000001 + 800014f0: 00083383 ld x7,0(x16) + 800014f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x94c8228de09544e0 + 800014f8: 00083083 ld x1,0(x16) + 800014fc: 00880813 addi x16,x16,8 + +0000000080001500 : +Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000001: + xnor x24, x7, x1 # perform operation + 80001500: 4013cc33 xnor x24,x7,x1 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000001, Zbkb_xnor_cg_cp_rs1_edges_0x8000000000000001_str) + 80001504: 0005b203 ld x4,0(x11) + 80001508: 01820c63 beq x4,x24,80001520 + 8000150c: 7f4062ef jal x5,80007d00 + 80001510: 80001500 .word 0x80001500 + 80001514: 00000000 .word 0x00000000 + 80001518: 8000f83d .word 0x8000f83d + 8000151c: 00000000 .word 0x00000000 + 80001520: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x7fffffffffffffff + 80001524: 00083603 ld x12,0(x16) + 80001528: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x04cdcb8c502be170 + 8000152c: 00083483 ld x9,0(x16) + 80001530: 00880813 addi x16,x16,8 + +0000000080001534 : +Zbkb_xnor_cg_cp_rs1_edges_0x7fffffffffffffff: + xnor x14, x12, x9 # perform operation + 80001534: 40964733 xnor x14,x12,x9 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkb_xnor_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001538: 0005b203 ld x4,0(x11) + 8000153c: 00e20c63 beq x4,x14,80001554 + 80001540: 7c0062ef jal x5,80007d00 + 80001544: 80001534 .word 0x80001534 + 80001548: 00000000 .word 0x00000000 + 8000154c: 8000f886 .word 0x8000f886 + 80001550: 00000000 .word 0x00000000 + 80001554: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80001558: 00083183 ld x3,0(x16) + 8000155c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x5a214eb5fb1b699c + 80001560: 00083883 ld x17,0(x16) + 80001564: 00880813 addi x16,x16,8 + +0000000080001568 : +Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffffffffffe: + xnor x28, x3, x17 # perform operation + 80001568: 4111ce33 xnor x28,x3,x17 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkb_xnor_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 8000156c: 0005b203 ld x4,0(x11) + 80001570: 01c20c63 beq x4,x28,80001588 + 80001574: 78c062ef jal x5,80007d00 + 80001578: 80001568 .word 0x80001568 + 8000157c: 00000000 .word 0x00000000 + 80001580: 8000f8cf .word 0x8000f8cf + 80001584: 00000000 .word 0x00000000 + 80001588: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xffffffffffffffff + 8000158c: 00083b83 ld x23,0(x16) + 80001590: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x86416e83835a3ed1 + 80001594: 00083d83 ld x27,0(x16) + 80001598: 00880813 addi x16,x16,8 + +000000008000159c : +Zbkb_xnor_cg_cp_rs1_edges_0xffffffffffffffff: + xnor x14, x23, x27 # perform operation + 8000159c: 41bbc733 xnor x14,x23,x27 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cp_rs1_edges_0xffffffffffffffff, Zbkb_xnor_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a0: 0005b203 ld x4,0(x11) + 800015a4: 00e20c63 beq x4,x14,800015bc + 800015a8: 758062ef jal x5,80007d00 + 800015ac: 8000159c .word 0x8000159c + 800015b0: 00000000 .word 0x00000000 + 800015b4: 8000f918 .word 0x8000f918 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0xfffffffffffffffe + 800015c0: 00083a83 ld x21,0(x16) + 800015c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xdbff3dd315fb8759 + 800015c8: 00083603 ld x12,0(x16) + 800015cc: 00880813 addi x16,x16,8 + +00000000800015d0 : +Zbkb_xnor_cg_cp_rs1_edges_0xfffffffffffffffe: + xnor x23, x21, x12 # perform operation + 800015d0: 40cacbb3 xnor x23,x21,x12 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d4: 0005b203 ld x4,0(x11) + 800015d8: 01720c63 beq x4,x23,800015f0 + 800015dc: 724062ef jal x5,80007d00 + 800015e0: 800015d0 .word 0x800015d0 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 8000f961 .word 0x8000f961 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 800015f4: 00083c83 ld x25,0(x16) + 800015f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x6afc7df056d45fcf + 800015fc: 00083483 ld x9,0(x16) + 80001600: 00880813 addi x16,x16,8 + +0000000080001604 : +Zbkb_xnor_cg_cp_rs1_edges_0x5bbc887763ae86f2: + xnor x17, x25, x9 # perform operation + 80001604: 409cc8b3 xnor x17,x25,x9 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkb_xnor_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001608: 0005b203 ld x4,0(x11) + 8000160c: 01120c63 beq x4,x17,80001624 + 80001610: 6f0062ef jal x5,80007d00 + 80001614: 80001604 .word 0x80001604 + 80001618: 00000000 .word 0x00000000 + 8000161c: 8000f9aa .word 0x8000f9aa + 80001620: 00000000 .word 0x00000000 + 80001624: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80001628: 00083483 ld x9,0(x16) + 8000162c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xc9bcea29603a1c9c + 80001630: 00083a83 ld x21,0(x16) + 80001634: 00880813 addi x16,x16,8 + +0000000080001638 : +Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + xnor x29, x9, x21 # perform operation + 80001638: 4154ceb3 xnor x29,x9,x21 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 8000163c: 0005b203 ld x4,0(x11) + 80001640: 01d20c63 beq x4,x29,80001658 + 80001644: 6bc062ef jal x5,80007d00 + 80001648: 80001638 .word 0x80001638 + 8000164c: 00000000 .word 0x00000000 + 80001650: 8000f9f3 .word 0x8000f9f3 + 80001654: 00000000 .word 0x00000000 + 80001658: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x5555555555555555 + 8000165c: 00083b03 ld x22,0(x16) + 80001660: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0c376c258adc9245 + 80001664: 00083403 ld x8,0(x16) + 80001668: 00880813 addi x16,x16,8 + +000000008000166c : +Zbkb_xnor_cg_cp_rs1_edges_0x5555555555555555: + xnor x28, x22, x8 # perform operation + 8000166c: 408b4e33 xnor x28,x22,x8 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cp_rs1_edges_0x5555555555555555, Zbkb_xnor_cg_cp_rs1_edges_0x5555555555555555_str) + 80001670: 0005b203 ld x4,0(x11) + 80001674: 01c20c63 beq x4,x28,8000168c + 80001678: 688062ef jal x5,80007d00 + 8000167c: 8000166c .word 0x8000166c + 80001680: 00000000 .word 0x00000000 + 80001684: 8000fa3c .word 0x8000fa3c + 80001688: 00000000 .word 0x00000000 + 8000168c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x00000000ffffffff + 80001690: 00083d03 ld x26,0(x16) + 80001694: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x7d8a7bbc94241045 + 80001698: 00083783 ld x15,0(x16) + 8000169c: 00880813 addi x16,x16,8 + +00000000800016a0 : +Zbkb_xnor_cg_cp_rs1_edges_0xffffffff: + xnor x21, x26, x15 # perform operation + 800016a0: 40fd4ab3 xnor x21,x26,x15 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cp_rs1_edges_0xffffffff, Zbkb_xnor_cg_cp_rs1_edges_0xffffffff_str) + 800016a4: 0005b203 ld x4,0(x11) + 800016a8: 01520c63 beq x4,x21,800016c0 + 800016ac: 654062ef jal x5,80007d00 + 800016b0: 800016a0 .word 0x800016a0 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 8000fa85 .word 0x8000fa85 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x00000000fffffffe + 800016c4: 00083d83 ld x27,0(x16) + 800016c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xbf33ba51d91679ab + 800016cc: 00083503 ld x10,0(x16) + 800016d0: 00880813 addi x16,x16,8 + +00000000800016d4 : +Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe: + xnor x7, x27, x10 # perform operation + 800016d4: 40adc3b3 xnor x7,x27,x10 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe, Zbkb_xnor_cg_cp_rs1_edges_0xfffffffe_str) + 800016d8: 0005b203 ld x4,0(x11) + 800016dc: 00720c63 beq x4,x7,800016f4 + 800016e0: 620062ef jal x5,80007d00 + 800016e4: 800016d4 .word 0x800016d4 + 800016e8: 00000000 .word 0x00000000 + 800016ec: 8000fac6 .word 0x8000fac6 + 800016f0: 00000000 .word 0x00000000 + 800016f4: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x0000000100000000 + 800016f8: 00083483 ld x9,0(x16) + 800016fc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x355871bcbf77f34a + 80001700: 00083d83 ld x27,0(x16) + 80001704: 00880813 addi x16,x16,8 + +0000000080001708 : +Zbkb_xnor_cg_cp_rs1_edges_0x100000000: + xnor x26, x9, x27 # perform operation + 80001708: 41b4cd33 xnor x26,x9,x27 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cp_rs1_edges_0x100000000, Zbkb_xnor_cg_cp_rs1_edges_0x100000000_str) + 8000170c: 0005b203 ld x4,0(x11) + 80001710: 01a20c63 beq x4,x26,80001728 + 80001714: 5ec062ef jal x5,80007d00 + 80001718: 80001708 .word 0x80001708 + 8000171c: 00000000 .word 0x00000000 + 80001720: 8000fb07 .word 0x8000fb07 + 80001724: 00000000 .word 0x00000000 + 80001728: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0000000100000001 + 8000172c: 00083403 ld x8,0(x16) + 80001730: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xdfa99065f532f66f + 80001734: 00083b03 ld x22,0(x16) + 80001738: 00880813 addi x16,x16,8 + +000000008000173c : +Zbkb_xnor_cg_cp_rs1_edges_0x100000001: + xnor x2, x8, x22 # perform operation + 8000173c: 41644133 xnor x2,x8,x22 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cp_rs1_edges_0x100000001, Zbkb_xnor_cg_cp_rs1_edges_0x100000001_str) + 80001740: 0005b203 ld x4,0(x11) + 80001744: 00220c63 beq x4,x2,8000175c + 80001748: 5b8062ef jal x5,80007d00 + 8000174c: 8000173c .word 0x8000173c + 80001750: 00000000 .word 0x00000000 + 80001754: 8000fb49 .word 0x8000fb49 + 80001758: 00000000 .word 0x00000000 + 8000175c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xa1171e4978025840 + 80001760: 00083983 ld x19,0(x16) + 80001764: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x0000000000000000 + 80001768: 00083b83 ld x23,0(x16) + 8000176c: 00880813 addi x16,x16,8 + +0000000080001770 : +Zbkb_xnor_cg_cp_rs2_edges_0x0: + xnor x12, x19, x23 # perform operation + 80001770: 4179c633 xnor x12,x19,x23 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cp_rs2_edges_0x0, Zbkb_xnor_cg_cp_rs2_edges_0x0_str) + 80001774: 0005b203 ld x4,0(x11) + 80001778: 00c20c63 beq x4,x12,80001790 + 8000177c: 584062ef jal x5,80007d00 + 80001780: 80001770 .word 0x80001770 + 80001784: 00000000 .word 0x00000000 + 80001788: 8000fb8b .word 0x8000fb8b + 8000178c: 00000000 .word 0x00000000 + 80001790: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x18efb0e7ec2b486e + 80001794: 00083503 ld x10,0(x16) + 80001798: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x0000000000000001 + 8000179c: 00083d83 ld x27,0(x16) + 800017a0: 00880813 addi x16,x16,8 + +00000000800017a4 : +Zbkb_xnor_cg_cp_rs2_edges_0x1: + xnor x29, x10, x27 # perform operation + 800017a4: 41b54eb3 xnor x29,x10,x27 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cp_rs2_edges_0x1, Zbkb_xnor_cg_cp_rs2_edges_0x1_str) + 800017a8: 0005b203 ld x4,0(x11) + 800017ac: 01d20c63 beq x4,x29,800017c4 + 800017b0: 550062ef jal x5,80007d00 + 800017b4: 800017a4 .word 0x800017a4 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 8000fbc5 .word 0x8000fbc5 + 800017c0: 00000000 .word 0x00000000 + 800017c4: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x3786f212d5bcd51d + 800017c8: 00083a83 ld x21,0(x16) + 800017cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x0000000000000002 + 800017d0: 00083383 ld x7,0(x16) + 800017d4: 00880813 addi x16,x16,8 + +00000000800017d8 : +Zbkb_xnor_cg_cp_rs2_edges_0x2: + xnor x22, x21, x7 # perform operation + 800017d8: 407acb33 xnor x22,x21,x7 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cp_rs2_edges_0x2, Zbkb_xnor_cg_cp_rs2_edges_0x2_str) + 800017dc: 0005b203 ld x4,0(x11) + 800017e0: 01620c63 beq x4,x22,800017f8 + 800017e4: 51c062ef jal x5,80007d00 + 800017e8: 800017d8 .word 0x800017d8 + 800017ec: 00000000 .word 0x00000000 + 800017f0: 8000fbff .word 0x8000fbff + 800017f4: 00000000 .word 0x00000000 + 800017f8: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x2de763a052306304 + 800017fc: 00083503 ld x10,0(x16) + 80001800: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x8000000000000000 + 80001804: 00083c03 ld x24,0(x16) + 80001808: 00880813 addi x16,x16,8 + +000000008000180c : +Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000000: + xnor x21, x10, x24 # perform operation + 8000180c: 41854ab3 xnor x21,x10,x24 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000000, Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000000_str) + 80001810: 0005b203 ld x4,0(x11) + 80001814: 01520c63 beq x4,x21,8000182c + 80001818: 4e8062ef jal x5,80007d00 + 8000181c: 8000180c .word 0x8000180c + 80001820: 00000000 .word 0x00000000 + 80001824: 8000fc39 .word 0x8000fc39 + 80001828: 00000000 .word 0x00000000 + 8000182c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xfee73286c38e0bd5 + 80001830: 00083783 ld x15,0(x16) + 80001834: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x8000000000000001 + 80001838: 00083103 ld x2,0(x16) + 8000183c: 00880813 addi x16,x16,8 + +0000000080001840 : +Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000001: + xnor x18, x15, x2 # perform operation + 80001840: 4027c933 xnor x18,x15,x2 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000001, Zbkb_xnor_cg_cp_rs2_edges_0x8000000000000001_str) + 80001844: 0005b203 ld x4,0(x11) + 80001848: 01220c63 beq x4,x18,80001860 + 8000184c: 4b4062ef jal x5,80007d00 + 80001850: 80001840 .word 0x80001840 + 80001854: 00000000 .word 0x00000000 + 80001858: 8000fc82 .word 0x8000fc82 + 8000185c: 00000000 .word 0x00000000 + 80001860: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xc478b2e2ef2c3e35 + 80001864: 00083d83 ld x27,0(x16) + 80001868: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x7fffffffffffffff + 8000186c: 00083503 ld x10,0(x16) + 80001870: 00880813 addi x16,x16,8 + +0000000080001874 : +Zbkb_xnor_cg_cp_rs2_edges_0x7fffffffffffffff: + xnor x18, x27, x10 # perform operation + 80001874: 40adc933 xnor x18,x27,x10 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkb_xnor_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001878: 0005b203 ld x4,0(x11) + 8000187c: 01220c63 beq x4,x18,80001894 + 80001880: 480062ef jal x5,80007d00 + 80001884: 80001874 .word 0x80001874 + 80001888: 00000000 .word 0x00000000 + 8000188c: 8000fccb .word 0x8000fccb + 80001890: 00000000 .word 0x00000000 + 80001894: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x3bfc44dfb3bcacde + 80001898: 00083883 ld x17,0(x16) + 8000189c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x7ffffffffffffffe + 800018a0: 00083983 ld x19,0(x16) + 800018a4: 00880813 addi x16,x16,8 + +00000000800018a8 : +Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffffffffffe: + xnor x24, x17, x19 # perform operation + 800018a8: 4138cc33 xnor x24,x17,x19 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkb_xnor_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018ac: 0005b203 ld x4,0(x11) + 800018b0: 01820c63 beq x4,x24,800018c8 + 800018b4: 44c062ef jal x5,80007d00 + 800018b8: 800018a8 .word 0x800018a8 + 800018bc: 00000000 .word 0x00000000 + 800018c0: 8000fd14 .word 0x8000fd14 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x353ee68b310c228f + 800018cc: 00083503 ld x10,0(x16) + 800018d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xffffffffffffffff + 800018d4: 00083e83 ld x29,0(x16) + 800018d8: 00880813 addi x16,x16,8 + +00000000800018dc : +Zbkb_xnor_cg_cp_rs2_edges_0xffffffffffffffff: + xnor x6, x10, x29 # perform operation + 800018dc: 41d54333 xnor x6,x10,x29 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cp_rs2_edges_0xffffffffffffffff, Zbkb_xnor_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e0: 0005b203 ld x4,0(x11) + 800018e4: 00620c63 beq x4,x6,800018fc + 800018e8: 418062ef jal x5,80007d00 + 800018ec: 800018dc .word 0x800018dc + 800018f0: 00000000 .word 0x00000000 + 800018f4: 8000fd5d .word 0x8000fd5d + 800018f8: 00000000 .word 0x00000000 + 800018fc: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x9ad2672201d29cac + 80001900: 00083183 ld x3,0(x16) + 80001904: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xfffffffffffffffe + 80001908: 00083403 ld x8,0(x16) + 8000190c: 00880813 addi x16,x16,8 + +0000000080001910 : +Zbkb_xnor_cg_cp_rs2_edges_0xfffffffffffffffe: + xnor x24, x3, x8 # perform operation + 80001910: 4081cc33 xnor x24,x3,x8 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001914: 0005b203 ld x4,0(x11) + 80001918: 01820c63 beq x4,x24,80001930 + 8000191c: 3e4062ef jal x5,80007d00 + 80001920: 80001910 .word 0x80001910 + 80001924: 00000000 .word 0x00000000 + 80001928: 8000fda6 .word 0x8000fda6 + 8000192c: 00000000 .word 0x00000000 + 80001930: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x971e020e1200fe73 + 80001934: 00083e83 ld x29,0(x16) + 80001938: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 8000193c: 00083683 ld x13,0(x16) + 80001940: 00880813 addi x16,x16,8 + +0000000080001944 : +Zbkb_xnor_cg_cp_rs2_edges_0x5bbc887763ae86f2: + xnor x1, x29, x13 # perform operation + 80001944: 40dec0b3 xnor x1,x29,x13 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkb_xnor_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001948: 0005b203 ld x4,0(x11) + 8000194c: 00120c63 beq x4,x1,80001964 + 80001950: 3b0062ef jal x5,80007d00 + 80001954: 80001944 .word 0x80001944 + 80001958: 00000000 .word 0x00000000 + 8000195c: 8000fdef .word 0x8000fdef + 80001960: 00000000 .word 0x00000000 + 80001964: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xe3a71130e67541a7 + 80001968: 00083103 ld x2,0(x16) + 8000196c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 80001970: 00083d83 ld x27,0(x16) + 80001974: 00880813 addi x16,x16,8 + +0000000080001978 : +Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + xnor x26, x2, x27 # perform operation + 80001978: 41b14d33 xnor x26,x2,x27 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 8000197c: 0005b203 ld x4,0(x11) + 80001980: 01a20c63 beq x4,x26,80001998 + 80001984: 37c062ef jal x5,80007d00 + 80001988: 80001978 .word 0x80001978 + 8000198c: 00000000 .word 0x00000000 + 80001990: 8000fe38 .word 0x8000fe38 + 80001994: 00000000 .word 0x00000000 + 80001998: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x02ac91724a9692c4 + 8000199c: 00083c83 ld x25,0(x16) + 800019a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5555555555555555 + 800019a4: 00083f03 ld x30,0(x16) + 800019a8: 00880813 addi x16,x16,8 + +00000000800019ac : +Zbkb_xnor_cg_cp_rs2_edges_0x5555555555555555: + xnor x6, x25, x30 # perform operation + 800019ac: 41ecc333 xnor x6,x25,x30 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cp_rs2_edges_0x5555555555555555, Zbkb_xnor_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b0: 0005b203 ld x4,0(x11) + 800019b4: 00620c63 beq x4,x6,800019cc + 800019b8: 348062ef jal x5,80007d00 + 800019bc: 800019ac .word 0x800019ac + 800019c0: 00000000 .word 0x00000000 + 800019c4: 8000fe81 .word 0x8000fe81 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xe83b3ffde6880239 + 800019d0: 00083183 ld x3,0(x16) + 800019d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x00000000ffffffff + 800019d8: 00083503 ld x10,0(x16) + 800019dc: 00880813 addi x16,x16,8 + +00000000800019e0 : +Zbkb_xnor_cg_cp_rs2_edges_0xffffffff: + xnor x8, x3, x10 # perform operation + 800019e0: 40a1c433 xnor x8,x3,x10 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cp_rs2_edges_0xffffffff, Zbkb_xnor_cg_cp_rs2_edges_0xffffffff_str) + 800019e4: 0005b203 ld x4,0(x11) + 800019e8: 00820c63 beq x4,x8,80001a00 + 800019ec: 314062ef jal x5,80007d00 + 800019f0: 800019e0 .word 0x800019e0 + 800019f4: 00000000 .word 0x00000000 + 800019f8: 8000feca .word 0x8000feca + 800019fc: 00000000 .word 0x00000000 + 80001a00: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x41e0ed93eb7b52b5 + 80001a04: 00083603 ld x12,0(x16) + 80001a08: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x00000000fffffffe + 80001a0c: 00083e03 ld x28,0(x16) + 80001a10: 00880813 addi x16,x16,8 + +0000000080001a14 : +Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe: + xnor x21, x12, x28 # perform operation + 80001a14: 41c64ab3 xnor x21,x12,x28 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe, Zbkb_xnor_cg_cp_rs2_edges_0xfffffffe_str) + 80001a18: 0005b203 ld x4,0(x11) + 80001a1c: 01520c63 beq x4,x21,80001a34 + 80001a20: 2e0062ef jal x5,80007d00 + 80001a24: 80001a14 .word 0x80001a14 + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 8000ff0b .word 0x8000ff0b + 80001a30: 00000000 .word 0x00000000 + 80001a34: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x97f8360f0afae494 + 80001a38: 00083783 ld x15,0(x16) + 80001a3c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000100000000 + 80001a40: 00083403 ld x8,0(x16) + 80001a44: 00880813 addi x16,x16,8 + +0000000080001a48 : +Zbkb_xnor_cg_cp_rs2_edges_0x100000000: + xnor x2, x15, x8 # perform operation + 80001a48: 4087c133 xnor x2,x15,x8 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cp_rs2_edges_0x100000000, Zbkb_xnor_cg_cp_rs2_edges_0x100000000_str) + 80001a4c: 0005b203 ld x4,0(x11) + 80001a50: 00220c63 beq x4,x2,80001a68 + 80001a54: 2ac062ef jal x5,80007d00 + 80001a58: 80001a48 .word 0x80001a48 + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 8000ff4c .word 0x8000ff4c + 80001a64: 00000000 .word 0x00000000 + 80001a68: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xb5a30858546dc3a0 + 80001a6c: 00083f83 ld x31,0(x16) + 80001a70: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x0000000100000001 + 80001a74: 00083d83 ld x27,0(x16) + 80001a78: 00880813 addi x16,x16,8 + +0000000080001a7c : +Zbkb_xnor_cg_cp_rs2_edges_0x100000001: + xnor x8, x31, x27 # perform operation + 80001a7c: 41bfc433 xnor x8,x31,x27 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cp_rs2_edges_0x100000001, Zbkb_xnor_cg_cp_rs2_edges_0x100000001_str) + 80001a80: 0005b203 ld x4,0(x11) + 80001a84: 00820c63 beq x4,x8,80001a9c + 80001a88: 278062ef jal x5,80007d00 + 80001a8c: 80001a7c .word 0x80001a7c + 80001a90: 00000000 .word 0x00000000 + 80001a94: 8000ff8e .word 0x8000ff8e + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x0000000000000000 + 80001aa0: 00083a03 ld x20,0(x16) + 80001aa4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x0000000000000000 + 80001aa8: 00083d03 ld x26,0(x16) + 80001aac: 00880813 addi x16,x16,8 + +0000000080001ab0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xnor x7, x20, x26 # perform operation + 80001ab0: 41aa43b3 xnor x7,x20,x26 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab4: 0005b203 ld x4,0(x11) + 80001ab8: 00720c63 beq x4,x7,80001ad0 + 80001abc: 244062ef jal x5,80007d00 + 80001ac0: 80001ab0 .word 0x80001ab0 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 8000ffd0 .word 0x8000ffd0 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x0000000000000000 + 80001ad4: 00083103 ld x2,0(x16) + 80001ad8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x0000000000000001 + 80001adc: 00083e03 ld x28,0(x16) + 80001ae0: 00880813 addi x16,x16,8 + +0000000080001ae4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xnor x31, x2, x28 # perform operation + 80001ae4: 41c14fb3 xnor x31,x2,x28 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae8: 0005b203 ld x4,0(x11) + 80001aec: 01f20c63 beq x4,x31,80001b04 + 80001af0: 210062ef jal x5,80007d00 + 80001af4: 80001ae4 .word 0x80001ae4 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 80010021 .word 0x80010021 + 80001b00: 00000000 .word 0x00000000 + 80001b04: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x0000000000000000 + 80001b08: 00083c03 ld x24,0(x16) + 80001b0c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x0000000000000002 + 80001b10: 00083f03 ld x30,0(x16) + 80001b14: 00880813 addi x16,x16,8 + +0000000080001b18 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xnor x18, x24, x30 # perform operation + 80001b18: 41ec4933 xnor x18,x24,x30 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b1c: 0005b203 ld x4,0(x11) + 80001b20: 01220c63 beq x4,x18,80001b38 + 80001b24: 1dc062ef jal x5,80007d00 + 80001b28: 80001b18 .word 0x80001b18 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 80010072 .word 0x80010072 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x0000000000000000 + 80001b3c: 00083f83 ld x31,0(x16) + 80001b40: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x8000000000000000 + 80001b44: 00083183 ld x3,0(x16) + 80001b48: 00880813 addi x16,x16,8 + +0000000080001b4c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + xnor x25, x31, x3 # perform operation + 80001b4c: 403fccb3 xnor x25,x31,x3 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b50: 0005b203 ld x4,0(x11) + 80001b54: 01920c63 beq x4,x25,80001b6c + 80001b58: 1a8062ef jal x5,80007d00 + 80001b5c: 80001b4c .word 0x80001b4c + 80001b60: 00000000 .word 0x00000000 + 80001b64: 800100c3 .word 0x800100c3 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000000000000 + 80001b70: 00083e83 ld x29,0(x16) + 80001b74: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x8000000000000001 + 80001b78: 00083c03 ld x24,0(x16) + 80001b7c: 00880813 addi x16,x16,8 + +0000000080001b80 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + xnor x8, x29, x24 # perform operation + 80001b80: 418ec433 xnor x8,x29,x24 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b84: 0005b203 ld x4,0(x11) + 80001b88: 00820c63 beq x4,x8,80001ba0 + 80001b8c: 174062ef jal x5,80007d00 + 80001b90: 80001b80 .word 0x80001b80 + 80001b94: 00000000 .word 0x00000000 + 80001b98: 80010123 .word 0x80010123 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0000000000000000 + 80001ba4: 00083403 ld x8,0(x16) + 80001ba8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x7fffffffffffffff + 80001bac: 00083783 ld x15,0(x16) + 80001bb0: 00880813 addi x16,x16,8 + +0000000080001bb4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + xnor x20, x8, x15 # perform operation + 80001bb4: 40f44a33 xnor x20,x8,x15 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb8: 0005b203 ld x4,0(x11) + 80001bbc: 01420c63 beq x4,x20,80001bd4 + 80001bc0: 140062ef jal x5,80007d00 + 80001bc4: 80001bb4 .word 0x80001bb4 + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 80010183 .word 0x80010183 + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x0000000000000000 + 80001bd8: 00083a03 ld x20,0(x16) + 80001bdc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80001be0: 00083903 ld x18,0(x16) + 80001be4: 00880813 addi x16,x16,8 + +0000000080001be8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + xnor x30, x20, x18 # perform operation + 80001be8: 412a4f33 xnor x30,x20,x18 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bec: 0005b203 ld x4,0(x11) + 80001bf0: 01e20c63 beq x4,x30,80001c08 + 80001bf4: 10c062ef jal x5,80007d00 + 80001bf8: 80001be8 .word 0x80001be8 + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 800101e3 .word 0x800101e3 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x0000000000000000 + 80001c0c: 00083983 ld x19,0(x16) + 80001c10: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xffffffffffffffff + 80001c14: 00083083 ld x1,0(x16) + 80001c18: 00880813 addi x16,x16,8 + +0000000080001c1c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + xnor x20, x19, x1 # perform operation + 80001c1c: 4019ca33 xnor x20,x19,x1 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c20: 0005b203 ld x4,0(x11) + 80001c24: 01420c63 beq x4,x20,80001c3c + 80001c28: 0d8062ef jal x5,80007d00 + 80001c2c: 80001c1c .word 0x80001c1c + 80001c30: 00000000 .word 0x00000000 + 80001c34: 80010243 .word 0x80010243 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000000 + 80001c40: 00083f03 ld x30,0(x16) + 80001c44: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xfffffffffffffffe + 80001c48: 00083d03 ld x26,0(x16) + 80001c4c: 00880813 addi x16,x16,8 + +0000000080001c50 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + xnor x28, x30, x26 # perform operation + 80001c50: 41af4e33 xnor x28,x30,x26 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c54: 0005b203 ld x4,0(x11) + 80001c58: 01c20c63 beq x4,x28,80001c70 + 80001c5c: 0a4062ef jal x5,80007d00 + 80001c60: 80001c50 .word 0x80001c50 + 80001c64: 00000000 .word 0x00000000 + 80001c68: 800102a3 .word 0x800102a3 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x0000000000000000 + 80001c74: 00083d83 ld x27,0(x16) + 80001c78: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80001c7c: 00083f83 ld x31,0(x16) + 80001c80: 00880813 addi x16,x16,8 + +0000000080001c84 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + xnor x14, x27, x31 # perform operation + 80001c84: 41fdc733 xnor x14,x27,x31 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c88: 0005b203 ld x4,0(x11) + 80001c8c: 00e20c63 beq x4,x14,80001ca4 + 80001c90: 070062ef jal x5,80007d00 + 80001c94: 80001c84 .word 0x80001c84 + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 80010303 .word 0x80010303 + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x0000000000000000 + 80001ca8: 00083f83 ld x31,0(x16) + 80001cac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80001cb0: 00083c03 ld x24,0(x16) + 80001cb4: 00880813 addi x16,x16,8 + +0000000080001cb8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x18, x31, x24 # perform operation + 80001cb8: 418fc933 xnor x18,x31,x24 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cbc: 0005b203 ld x4,0(x11) + 80001cc0: 01220c63 beq x4,x18,80001cd8 + 80001cc4: 03c062ef jal x5,80007d00 + 80001cc8: 80001cb8 .word 0x80001cb8 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 80010363 .word 0x80010363 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000000000000 + 80001cdc: 00083e83 ld x29,0(x16) + 80001ce0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x5555555555555555 + 80001ce4: 00083f83 ld x31,0(x16) + 80001ce8: 00880813 addi x16,x16,8 + +0000000080001cec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + xnor x22, x29, x31 # perform operation + 80001cec: 41fecb33 xnor x22,x29,x31 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf0: 0005b203 ld x4,0(x11) + 80001cf4: 01620c63 beq x4,x22,80001d0c + 80001cf8: 008062ef jal x5,80007d00 + 80001cfc: 80001cec .word 0x80001cec + 80001d00: 00000000 .word 0x00000000 + 80001d04: 800103c3 .word 0x800103c3 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x0000000000000000 + 80001d10: 00083683 ld x13,0(x16) + 80001d14: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x00000000ffffffff + 80001d18: 00083e03 ld x28,0(x16) + 80001d1c: 00880813 addi x16,x16,8 + +0000000080001d20 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xnor x19, x13, x28 # perform operation + 80001d20: 41c6c9b3 xnor x19,x13,x28 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d24: 0005b203 ld x4,0(x11) + 80001d28: 01320c63 beq x4,x19,80001d40 + 80001d2c: 7d5052ef jal x5,80007d00 + 80001d30: 80001d20 .word 0x80001d20 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 80010423 .word 0x80010423 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000000 + 80001d44: 00083f03 ld x30,0(x16) + 80001d48: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x00000000fffffffe + 80001d4c: 00083c83 ld x25,0(x16) + 80001d50: 00880813 addi x16,x16,8 + +0000000080001d54 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xnor x13, x30, x25 # perform operation + 80001d54: 419f46b3 xnor x13,x30,x25 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d58: 0005b203 ld x4,0(x11) + 80001d5c: 00d20c63 beq x4,x13,80001d74 + 80001d60: 7a1052ef jal x5,80007d00 + 80001d64: 80001d54 .word 0x80001d54 + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 8001047b .word 0x8001047b + 80001d70: 00000000 .word 0x00000000 + 80001d74: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x0000000000000000 + 80001d78: 00083103 ld x2,0(x16) + 80001d7c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x0000000100000000 + 80001d80: 00083503 ld x10,0(x16) + 80001d84: 00880813 addi x16,x16,8 + +0000000080001d88 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + xnor x23, x2, x10 # perform operation + 80001d88: 40a14bb3 xnor x23,x2,x10 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d8c: 0005b203 ld x4,0(x11) + 80001d90: 01720c63 beq x4,x23,80001da8 + 80001d94: 76d052ef jal x5,80007d00 + 80001d98: 80001d88 .word 0x80001d88 + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 800104d3 .word 0x800104d3 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x0000000000000000 + 80001dac: 00083983 ld x19,0(x16) + 80001db0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x0000000100000001 + 80001db4: 00083903 ld x18,0(x16) + 80001db8: 00880813 addi x16,x16,8 + +0000000080001dbc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + xnor x13, x19, x18 # perform operation + 80001dbc: 4129c6b3 xnor x13,x19,x18 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc0: 0005b203 ld x4,0(x11) + 80001dc4: 00d20c63 beq x4,x13,80001ddc + 80001dc8: 739052ef jal x5,80007d00 + 80001dcc: 80001dbc .word 0x80001dbc + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 8001052c .word 0x8001052c + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x0000000000000001 + 80001de0: 00083083 ld x1,0(x16) + 80001de4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x0000000000000000 + 80001de8: 00083903 ld x18,0(x16) + 80001dec: 00880813 addi x16,x16,8 + +0000000080001df0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xnor x23, x1, x18 # perform operation + 80001df0: 4120cbb3 xnor x23,x1,x18 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df4: 0005b203 ld x4,0(x11) + 80001df8: 01720c63 beq x4,x23,80001e10 + 80001dfc: 705052ef jal x5,80007d00 + 80001e00: 80001df0 .word 0x80001df0 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 80010585 .word 0x80010585 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000001 + 80001e14: 00083f03 ld x30,0(x16) + 80001e18: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000000000001 + 80001e1c: 00083a03 ld x20,0(x16) + 80001e20: 00880813 addi x16,x16,8 + +0000000080001e24 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xnor x18, x30, x20 # perform operation + 80001e24: 414f4933 xnor x18,x30,x20 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e28: 0005b203 ld x4,0(x11) + 80001e2c: 01220c63 beq x4,x18,80001e44 + 80001e30: 6d1052ef jal x5,80007d00 + 80001e34: 80001e24 .word 0x80001e24 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 800105d6 .word 0x800105d6 + 80001e40: 00000000 .word 0x00000000 + 80001e44: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x0000000000000001 + 80001e48: 00083903 ld x18,0(x16) + 80001e4c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x0000000000000002 + 80001e50: 00083183 ld x3,0(x16) + 80001e54: 00880813 addi x16,x16,8 + +0000000080001e58 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xnor x10, x18, x3 # perform operation + 80001e58: 40394533 xnor x10,x18,x3 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e5c: 0005b203 ld x4,0(x11) + 80001e60: 00a20c63 beq x4,x10,80001e78 + 80001e64: 69d052ef jal x5,80007d00 + 80001e68: 80001e58 .word 0x80001e58 + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 80010627 .word 0x80010627 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000000000001 + 80001e7c: 00083e83 ld x29,0(x16) + 80001e80: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x8000000000000000 + 80001e84: 00083103 ld x2,0(x16) + 80001e88: 00880813 addi x16,x16,8 + +0000000080001e8c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + xnor x19, x29, x2 # perform operation + 80001e8c: 402ec9b3 xnor x19,x29,x2 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e90: 0005b203 ld x4,0(x11) + 80001e94: 01320c63 beq x4,x19,80001eac + 80001e98: 669052ef jal x5,80007d00 + 80001e9c: 80001e8c .word 0x80001e8c + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 80010678 .word 0x80010678 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x0000000000000001 + 80001eb0: 00083103 ld x2,0(x16) + 80001eb4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x8000000000000001 + 80001eb8: 00083383 ld x7,0(x16) + 80001ebc: 00880813 addi x16,x16,8 + +0000000080001ec0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + xnor x18, x2, x7 # perform operation + 80001ec0: 40714933 xnor x18,x2,x7 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec4: 0005b203 ld x4,0(x11) + 80001ec8: 01220c63 beq x4,x18,80001ee0 + 80001ecc: 635052ef jal x5,80007d00 + 80001ed0: 80001ec0 .word 0x80001ec0 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 800106d8 .word 0x800106d8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x0000000000000001 + 80001ee4: 00083d03 ld x26,0(x16) + 80001ee8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x7fffffffffffffff + 80001eec: 00083503 ld x10,0(x16) + 80001ef0: 00880813 addi x16,x16,8 + +0000000080001ef4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + xnor x12, x26, x10 # perform operation + 80001ef4: 40ad4633 xnor x12,x26,x10 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef8: 0005b203 ld x4,0(x11) + 80001efc: 00c20c63 beq x4,x12,80001f14 + 80001f00: 601052ef jal x5,80007d00 + 80001f04: 80001ef4 .word 0x80001ef4 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 80010738 .word 0x80010738 + 80001f10: 00000000 .word 0x00000000 + 80001f14: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000000000001 + 80001f18: 00083e83 ld x29,0(x16) + 80001f1c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x7ffffffffffffffe + 80001f20: 00083a83 ld x21,0(x16) + 80001f24: 00880813 addi x16,x16,8 + +0000000080001f28 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + xnor x3, x29, x21 # perform operation + 80001f28: 415ec1b3 xnor x3,x29,x21 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f2c: 0005b203 ld x4,0(x11) + 80001f30: 00320c63 beq x4,x3,80001f48 + 80001f34: 5cd052ef jal x5,80007d00 + 80001f38: 80001f28 .word 0x80001f28 + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 80010798 .word 0x80010798 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x0000000000000001 + 80001f4c: 00083e03 ld x28,0(x16) + 80001f50: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xffffffffffffffff + 80001f54: 00083903 ld x18,0(x16) + 80001f58: 00880813 addi x16,x16,8 + +0000000080001f5c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + xnor x23, x28, x18 # perform operation + 80001f5c: 412e4bb3 xnor x23,x28,x18 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f60: 0005b203 ld x4,0(x11) + 80001f64: 01720c63 beq x4,x23,80001f7c + 80001f68: 599052ef jal x5,80007d00 + 80001f6c: 80001f5c .word 0x80001f5c + 80001f70: 00000000 .word 0x00000000 + 80001f74: 800107f8 .word 0x800107f8 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x0000000000000001 + 80001f80: 00083303 ld x6,0(x16) + 80001f84: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xfffffffffffffffe + 80001f88: 00083483 ld x9,0(x16) + 80001f8c: 00880813 addi x16,x16,8 + +0000000080001f90 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + xnor x3, x6, x9 # perform operation + 80001f90: 409341b3 xnor x3,x6,x9 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f94: 0005b203 ld x4,0(x11) + 80001f98: 00320c63 beq x4,x3,80001fb0 + 80001f9c: 565052ef jal x5,80007d00 + 80001fa0: 80001f90 .word 0x80001f90 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 80010858 .word 0x80010858 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x0000000000000001 + 80001fb4: 00083c83 ld x25,0(x16) + 80001fb8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80001fbc: 00083603 ld x12,0(x16) + 80001fc0: 00880813 addi x16,x16,8 + +0000000080001fc4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + xnor x19, x25, x12 # perform operation + 80001fc4: 40ccc9b3 xnor x19,x25,x12 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc8: 0005b203 ld x4,0(x11) + 80001fcc: 01320c63 beq x4,x19,80001fe4 + 80001fd0: 531052ef jal x5,80007d00 + 80001fd4: 80001fc4 .word 0x80001fc4 + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 800108b8 .word 0x800108b8 + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x0000000000000001 + 80001fe8: 00083603 ld x12,0(x16) + 80001fec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80001ff0: 00083a83 ld x21,0(x16) + 80001ff4: 00880813 addi x16,x16,8 + +0000000080001ff8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x22, x12, x21 # perform operation + 80001ff8: 41564b33 xnor x22,x12,x21 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ffc: 0005b203 ld x4,0(x11) + 80002000: 01620c63 beq x4,x22,80002018 + 80002004: 4fd052ef jal x5,80007d00 + 80002008: 80001ff8 .word 0x80001ff8 + 8000200c: 00000000 .word 0x00000000 + 80002010: 80010918 .word 0x80010918 + 80002014: 00000000 .word 0x00000000 + 80002018: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x0000000000000001 + 8000201c: 00083703 ld x14,0(x16) + 80002020: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x5555555555555555 + 80002024: 00083b03 ld x22,0(x16) + 80002028: 00880813 addi x16,x16,8 + +000000008000202c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + xnor x10, x14, x22 # perform operation + 8000202c: 41674533 xnor x10,x14,x22 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002030: 0005b203 ld x4,0(x11) + 80002034: 00a20c63 beq x4,x10,8000204c + 80002038: 4c9052ef jal x5,80007d00 + 8000203c: 8000202c .word 0x8000202c + 80002040: 00000000 .word 0x00000000 + 80002044: 80010978 .word 0x80010978 + 80002048: 00000000 .word 0x00000000 + 8000204c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x0000000000000001 + 80002050: 00083183 ld x3,0(x16) + 80002054: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x00000000ffffffff + 80002058: 00083d03 ld x26,0(x16) + 8000205c: 00880813 addi x16,x16,8 + +0000000080002060 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xnor x29, x3, x26 # perform operation + 80002060: 41a1ceb3 xnor x29,x3,x26 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002064: 0005b203 ld x4,0(x11) + 80002068: 01d20c63 beq x4,x29,80002080 + 8000206c: 495052ef jal x5,80007d00 + 80002070: 80002060 .word 0x80002060 + 80002074: 00000000 .word 0x00000000 + 80002078: 800109d8 .word 0x800109d8 + 8000207c: 00000000 .word 0x00000000 + 80002080: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x0000000000000001 + 80002084: 00083b03 ld x22,0(x16) + 80002088: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x00000000fffffffe + 8000208c: 00083383 ld x7,0(x16) + 80002090: 00880813 addi x16,x16,8 + +0000000080002094 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xnor x28, x22, x7 # perform operation + 80002094: 407b4e33 xnor x28,x22,x7 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002098: 0005b203 ld x4,0(x11) + 8000209c: 01c20c63 beq x4,x28,800020b4 + 800020a0: 461052ef jal x5,80007d00 + 800020a4: 80002094 .word 0x80002094 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 80010a30 .word 0x80010a30 + 800020b0: 00000000 .word 0x00000000 + 800020b4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x0000000000000001 + 800020b8: 00083383 ld x7,0(x16) + 800020bc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x0000000100000000 + 800020c0: 00083603 ld x12,0(x16) + 800020c4: 00880813 addi x16,x16,8 + +00000000800020c8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + xnor x24, x7, x12 # perform operation + 800020c8: 40c3cc33 xnor x24,x7,x12 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020cc: 0005b203 ld x4,0(x11) + 800020d0: 01820c63 beq x4,x24,800020e8 + 800020d4: 42d052ef jal x5,80007d00 + 800020d8: 800020c8 .word 0x800020c8 + 800020dc: 00000000 .word 0x00000000 + 800020e0: 80010a88 .word 0x80010a88 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x0000000000000001 + 800020ec: 00083d03 ld x26,0(x16) + 800020f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x0000000100000001 + 800020f4: 00083703 ld x14,0(x16) + 800020f8: 00880813 addi x16,x16,8 + +00000000800020fc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + xnor x27, x26, x14 # perform operation + 800020fc: 40ed4db3 xnor x27,x26,x14 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002100: 0005b203 ld x4,0(x11) + 80002104: 01b20c63 beq x4,x27,8000211c + 80002108: 3f9052ef jal x5,80007d00 + 8000210c: 800020fc .word 0x800020fc + 80002110: 00000000 .word 0x00000000 + 80002114: 80010ae1 .word 0x80010ae1 + 80002118: 00000000 .word 0x00000000 + 8000211c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x0000000000000002 + 80002120: 00083d83 ld x27,0(x16) + 80002124: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x0000000000000000 + 80002128: 00083c03 ld x24,0(x16) + 8000212c: 00880813 addi x16,x16,8 + +0000000080002130 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xnor x9, x27, x24 # perform operation + 80002130: 418dc4b3 xnor x9,x27,x24 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002134: 0005b203 ld x4,0(x11) + 80002138: 00920c63 beq x4,x9,80002150 + 8000213c: 3c5052ef jal x5,80007d00 + 80002140: 80002130 .word 0x80002130 + 80002144: 00000000 .word 0x00000000 + 80002148: 80010b3a .word 0x80010b3a + 8000214c: 00000000 .word 0x00000000 + 80002150: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000002 + 80002154: 00083f03 ld x30,0(x16) + 80002158: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000000000001 + 8000215c: 00083403 ld x8,0(x16) + 80002160: 00880813 addi x16,x16,8 + +0000000080002164 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xnor x20, x30, x8 # perform operation + 80002164: 408f4a33 xnor x20,x30,x8 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002168: 0005b203 ld x4,0(x11) + 8000216c: 01420c63 beq x4,x20,80002184 + 80002170: 391052ef jal x5,80007d00 + 80002174: 80002164 .word 0x80002164 + 80002178: 00000000 .word 0x00000000 + 8000217c: 80010b8b .word 0x80010b8b + 80002180: 00000000 .word 0x00000000 + 80002184: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x0000000000000002 + 80002188: 00083983 ld x19,0(x16) + 8000218c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x0000000000000002 + 80002190: 00083183 ld x3,0(x16) + 80002194: 00880813 addi x16,x16,8 + +0000000080002198 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xnor x12, x19, x3 # perform operation + 80002198: 4039c633 xnor x12,x19,x3 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 8000219c: 0005b203 ld x4,0(x11) + 800021a0: 00c20c63 beq x4,x12,800021b8 + 800021a4: 35d052ef jal x5,80007d00 + 800021a8: 80002198 .word 0x80002198 + 800021ac: 00000000 .word 0x00000000 + 800021b0: 80010bdc .word 0x80010bdc + 800021b4: 00000000 .word 0x00000000 + 800021b8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x0000000000000002 + 800021bc: 00083c83 ld x25,0(x16) + 800021c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x8000000000000000 + 800021c4: 00083e03 ld x28,0(x16) + 800021c8: 00880813 addi x16,x16,8 + +00000000800021cc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + xnor x6, x25, x28 # perform operation + 800021cc: 41ccc333 xnor x6,x25,x28 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d0: 0005b203 ld x4,0(x11) + 800021d4: 00620c63 beq x4,x6,800021ec + 800021d8: 329052ef jal x5,80007d00 + 800021dc: 800021cc .word 0x800021cc + 800021e0: 00000000 .word 0x00000000 + 800021e4: 80010c2d .word 0x80010c2d + 800021e8: 00000000 .word 0x00000000 + 800021ec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000002 + 800021f0: 00083f03 ld x30,0(x16) + 800021f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x8000000000000001 + 800021f8: 00083f83 ld x31,0(x16) + 800021fc: 00880813 addi x16,x16,8 + +0000000080002200 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + xnor x22, x30, x31 # perform operation + 80002200: 41ff4b33 xnor x22,x30,x31 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002204: 0005b203 ld x4,0(x11) + 80002208: 01620c63 beq x4,x22,80002220 + 8000220c: 2f5052ef jal x5,80007d00 + 80002210: 80002200 .word 0x80002200 + 80002214: 00000000 .word 0x00000000 + 80002218: 80010c8d .word 0x80010c8d + 8000221c: 00000000 .word 0x00000000 + 80002220: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x0000000000000002 + 80002224: 00083903 ld x18,0(x16) + 80002228: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x7fffffffffffffff + 8000222c: 00083403 ld x8,0(x16) + 80002230: 00880813 addi x16,x16,8 + +0000000080002234 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + xnor x9, x18, x8 # perform operation + 80002234: 408944b3 xnor x9,x18,x8 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002238: 0005b203 ld x4,0(x11) + 8000223c: 00920c63 beq x4,x9,80002254 + 80002240: 2c1052ef jal x5,80007d00 + 80002244: 80002234 .word 0x80002234 + 80002248: 00000000 .word 0x00000000 + 8000224c: 80010ced .word 0x80010ced + 80002250: 00000000 .word 0x00000000 + 80002254: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x0000000000000002 + 80002258: 00083183 ld x3,0(x16) + 8000225c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002260: 00083a03 ld x20,0(x16) + 80002264: 00880813 addi x16,x16,8 + +0000000080002268 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + xnor x15, x3, x20 # perform operation + 80002268: 4141c7b3 xnor x15,x3,x20 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 8000226c: 0005b203 ld x4,0(x11) + 80002270: 00f20c63 beq x4,x15,80002288 + 80002274: 28d052ef jal x5,80007d00 + 80002278: 80002268 .word 0x80002268 + 8000227c: 00000000 .word 0x00000000 + 80002280: 80010d4d .word 0x80010d4d + 80002284: 00000000 .word 0x00000000 + 80002288: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x0000000000000002 + 8000228c: 00083e03 ld x28,0(x16) + 80002290: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0xffffffffffffffff + 80002294: 00083883 ld x17,0(x16) + 80002298: 00880813 addi x16,x16,8 + +000000008000229c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + xnor x24, x28, x17 # perform operation + 8000229c: 411e4c33 xnor x24,x28,x17 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a0: 0005b203 ld x4,0(x11) + 800022a4: 01820c63 beq x4,x24,800022bc + 800022a8: 259052ef jal x5,80007d00 + 800022ac: 8000229c .word 0x8000229c + 800022b0: 00000000 .word 0x00000000 + 800022b4: 80010dad .word 0x80010dad + 800022b8: 00000000 .word 0x00000000 + 800022bc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x0000000000000002 + 800022c0: 00083883 ld x17,0(x16) + 800022c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xfffffffffffffffe + 800022c8: 00083b03 ld x22,0(x16) + 800022cc: 00880813 addi x16,x16,8 + +00000000800022d0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + xnor x24, x17, x22 # perform operation + 800022d0: 4168cc33 xnor x24,x17,x22 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d4: 0005b203 ld x4,0(x11) + 800022d8: 01820c63 beq x4,x24,800022f0 + 800022dc: 225052ef jal x5,80007d00 + 800022e0: 800022d0 .word 0x800022d0 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 80010e0d .word 0x80010e0d + 800022ec: 00000000 .word 0x00000000 + 800022f0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x0000000000000002 + 800022f4: 00083903 ld x18,0(x16) + 800022f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 800022fc: 00083683 ld x13,0(x16) + 80002300: 00880813 addi x16,x16,8 + +0000000080002304 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + xnor x20, x18, x13 # perform operation + 80002304: 40d94a33 xnor x20,x18,x13 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002308: 0005b203 ld x4,0(x11) + 8000230c: 01420c63 beq x4,x20,80002324 + 80002310: 1f1052ef jal x5,80007d00 + 80002314: 80002304 .word 0x80002304 + 80002318: 00000000 .word 0x00000000 + 8000231c: 80010e6d .word 0x80010e6d + 80002320: 00000000 .word 0x00000000 + 80002324: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x0000000000000002 + 80002328: 00083b03 ld x22,0(x16) + 8000232c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80002330: 00083903 ld x18,0(x16) + 80002334: 00880813 addi x16,x16,8 + +0000000080002338 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x23, x22, x18 # perform operation + 80002338: 412b4bb3 xnor x23,x22,x18 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000233c: 0005b203 ld x4,0(x11) + 80002340: 01720c63 beq x4,x23,80002358 + 80002344: 1bd052ef jal x5,80007d00 + 80002348: 80002338 .word 0x80002338 + 8000234c: 00000000 .word 0x00000000 + 80002350: 80010ecd .word 0x80010ecd + 80002354: 00000000 .word 0x00000000 + 80002358: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x0000000000000002 + 8000235c: 00083d03 ld x26,0(x16) + 80002360: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x5555555555555555 + 80002364: 00083903 ld x18,0(x16) + 80002368: 00880813 addi x16,x16,8 + +000000008000236c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + xnor x2, x26, x18 # perform operation + 8000236c: 412d4133 xnor x2,x26,x18 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002370: 0005b203 ld x4,0(x11) + 80002374: 00220c63 beq x4,x2,8000238c + 80002378: 189052ef jal x5,80007d00 + 8000237c: 8000236c .word 0x8000236c + 80002380: 00000000 .word 0x00000000 + 80002384: 80010f2d .word 0x80010f2d + 80002388: 00000000 .word 0x00000000 + 8000238c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x0000000000000002 + 80002390: 00083e03 ld x28,0(x16) + 80002394: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x00000000ffffffff + 80002398: 00083883 ld x17,0(x16) + 8000239c: 00880813 addi x16,x16,8 + +00000000800023a0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xnor x8, x28, x17 # perform operation + 800023a0: 411e4433 xnor x8,x28,x17 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a4: 0005b203 ld x4,0(x11) + 800023a8: 00820c63 beq x4,x8,800023c0 + 800023ac: 155052ef jal x5,80007d00 + 800023b0: 800023a0 .word 0x800023a0 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 80010f8d .word 0x80010f8d + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000000000002 + 800023c4: 00083e83 ld x29,0(x16) + 800023c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x00000000fffffffe + 800023cc: 00083f83 ld x31,0(x16) + 800023d0: 00880813 addi x16,x16,8 + +00000000800023d4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xnor x15, x29, x31 # perform operation + 800023d4: 41fec7b3 xnor x15,x29,x31 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d8: 0005b203 ld x4,0(x11) + 800023dc: 00f20c63 beq x4,x15,800023f4 + 800023e0: 121052ef jal x5,80007d00 + 800023e4: 800023d4 .word 0x800023d4 + 800023e8: 00000000 .word 0x00000000 + 800023ec: 80010fe5 .word 0x80010fe5 + 800023f0: 00000000 .word 0x00000000 + 800023f4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0000000000000002 + 800023f8: 00083403 ld x8,0(x16) + 800023fc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000100000000 + 80002400: 00083a03 ld x20,0(x16) + 80002404: 00880813 addi x16,x16,8 + +0000000080002408 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + xnor x28, x8, x20 # perform operation + 80002408: 41444e33 xnor x28,x8,x20 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 8000240c: 0005b203 ld x4,0(x11) + 80002410: 01c20c63 beq x4,x28,80002428 + 80002414: 0ed052ef jal x5,80007d00 + 80002418: 80002408 .word 0x80002408 + 8000241c: 00000000 .word 0x00000000 + 80002420: 8001103d .word 0x8001103d + 80002424: 00000000 .word 0x00000000 + 80002428: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x0000000000000002 + 8000242c: 00083883 ld x17,0(x16) + 80002430: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000100000001 + 80002434: 00083403 ld x8,0(x16) + 80002438: 00880813 addi x16,x16,8 + +000000008000243c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + xnor x15, x17, x8 # perform operation + 8000243c: 4088c7b3 xnor x15,x17,x8 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002440: 0005b203 ld x4,0(x11) + 80002444: 00f20c63 beq x4,x15,8000245c + 80002448: 0b9052ef jal x5,80007d00 + 8000244c: 8000243c .word 0x8000243c + 80002450: 00000000 .word 0x00000000 + 80002454: 80011096 .word 0x80011096 + 80002458: 00000000 .word 0x00000000 + 8000245c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x8000000000000000 + 80002460: 00083e83 ld x29,0(x16) + 80002464: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x0000000000000000 + 80002468: 00083c03 ld x24,0(x16) + 8000246c: 00880813 addi x16,x16,8 + +0000000080002470 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + xnor x23, x29, x24 # perform operation + 80002470: 418ecbb3 xnor x23,x29,x24 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002474: 0005b203 ld x4,0(x11) + 80002478: 01720c63 beq x4,x23,80002490 + 8000247c: 085052ef jal x5,80007d00 + 80002480: 80002470 .word 0x80002470 + 80002484: 00000000 .word 0x00000000 + 80002488: 800110ef .word 0x800110ef + 8000248c: 00000000 .word 0x00000000 + 80002490: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x8000000000000000 + 80002494: 00083103 ld x2,0(x16) + 80002498: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x0000000000000001 + 8000249c: 00083f83 ld x31,0(x16) + 800024a0: 00880813 addi x16,x16,8 + +00000000800024a4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + xnor x24, x2, x31 # perform operation + 800024a4: 41f14c33 xnor x24,x2,x31 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a8: 0005b203 ld x4,0(x11) + 800024ac: 01820c63 beq x4,x24,800024c4 + 800024b0: 051052ef jal x5,80007d00 + 800024b4: 800024a4 .word 0x800024a4 + 800024b8: 00000000 .word 0x00000000 + 800024bc: 8001114f .word 0x8001114f + 800024c0: 00000000 .word 0x00000000 + 800024c4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x8000000000000000 + 800024c8: 00083b03 ld x22,0(x16) + 800024cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x0000000000000002 + 800024d0: 00083503 ld x10,0(x16) + 800024d4: 00880813 addi x16,x16,8 + +00000000800024d8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + xnor x27, x22, x10 # perform operation + 800024d8: 40ab4db3 xnor x27,x22,x10 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024dc: 0005b203 ld x4,0(x11) + 800024e0: 01b20c63 beq x4,x27,800024f8 + 800024e4: 01d052ef jal x5,80007d00 + 800024e8: 800024d8 .word 0x800024d8 + 800024ec: 00000000 .word 0x00000000 + 800024f0: 800111af .word 0x800111af + 800024f4: 00000000 .word 0x00000000 + 800024f8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x8000000000000000 + 800024fc: 00083b83 ld x23,0(x16) + 80002500: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x8000000000000000 + 80002504: 00083703 ld x14,0(x16) + 80002508: 00880813 addi x16,x16,8 + +000000008000250c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + xnor x15, x23, x14 # perform operation + 8000250c: 40ebc7b3 xnor x15,x23,x14 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002510: 0005b203 ld x4,0(x11) + 80002514: 00f20c63 beq x4,x15,8000252c + 80002518: 7e8052ef jal x5,80007d00 + 8000251c: 8000250c .word 0x8000250c + 80002520: 00000000 .word 0x00000000 + 80002524: 8001120f .word 0x8001120f + 80002528: 00000000 .word 0x00000000 + 8000252c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x8000000000000000 + 80002530: 00083703 ld x14,0(x16) + 80002534: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x8000000000000001 + 80002538: 00083b83 ld x23,0(x16) + 8000253c: 00880813 addi x16,x16,8 + +0000000080002540 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + xnor x30, x14, x23 # perform operation + 80002540: 41774f33 xnor x30,x14,x23 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002544: 0005b203 ld x4,0(x11) + 80002548: 01e20c63 beq x4,x30,80002560 + 8000254c: 7b4052ef jal x5,80007d00 + 80002550: 80002540 .word 0x80002540 + 80002554: 00000000 .word 0x00000000 + 80002558: 8001127e .word 0x8001127e + 8000255c: 00000000 .word 0x00000000 + 80002560: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x8000000000000000 + 80002564: 00083b03 ld x22,0(x16) + 80002568: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x7fffffffffffffff + 8000256c: 00083983 ld x19,0(x16) + 80002570: 00880813 addi x16,x16,8 + +0000000080002574 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + xnor x21, x22, x19 # perform operation + 80002574: 413b4ab3 xnor x21,x22,x19 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002578: 0005b203 ld x4,0(x11) + 8000257c: 01520c63 beq x4,x21,80002594 + 80002580: 780052ef jal x5,80007d00 + 80002584: 80002574 .word 0x80002574 + 80002588: 00000000 .word 0x00000000 + 8000258c: 800112ed .word 0x800112ed + 80002590: 00000000 .word 0x00000000 + 80002594: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x8000000000000000 + 80002598: 00083783 ld x15,0(x16) + 8000259c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800025a0: 00083683 ld x13,0(x16) + 800025a4: 00880813 addi x16,x16,8 + +00000000800025a8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + xnor x28, x15, x13 # perform operation + 800025a8: 40d7ce33 xnor x28,x15,x13 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025ac: 0005b203 ld x4,0(x11) + 800025b0: 01c20c63 beq x4,x28,800025c8 + 800025b4: 74c052ef jal x5,80007d00 + 800025b8: 800025a8 .word 0x800025a8 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 8001135c .word 0x8001135c + 800025c4: 00000000 .word 0x00000000 + 800025c8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x8000000000000000 + 800025cc: 00083783 ld x15,0(x16) + 800025d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xffffffffffffffff + 800025d4: 00083503 ld x10,0(x16) + 800025d8: 00880813 addi x16,x16,8 + +00000000800025dc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + xnor x25, x15, x10 # perform operation + 800025dc: 40a7ccb3 xnor x25,x15,x10 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e0: 0005b203 ld x4,0(x11) + 800025e4: 01920c63 beq x4,x25,800025fc + 800025e8: 718052ef jal x5,80007d00 + 800025ec: 800025dc .word 0x800025dc + 800025f0: 00000000 .word 0x00000000 + 800025f4: 800113cb .word 0x800113cb + 800025f8: 00000000 .word 0x00000000 + 800025fc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x8000000000000000 + 80002600: 00083483 ld x9,0(x16) + 80002604: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xfffffffffffffffe + 80002608: 00083983 ld x19,0(x16) + 8000260c: 00880813 addi x16,x16,8 + +0000000080002610 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + xnor x21, x9, x19 # perform operation + 80002610: 4134cab3 xnor x21,x9,x19 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002614: 0005b203 ld x4,0(x11) + 80002618: 01520c63 beq x4,x21,80002630 + 8000261c: 6e4052ef jal x5,80007d00 + 80002620: 80002610 .word 0x80002610 + 80002624: 00000000 .word 0x00000000 + 80002628: 8001143a .word 0x8001143a + 8000262c: 00000000 .word 0x00000000 + 80002630: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x8000000000000000 + 80002634: 00083b03 ld x22,0(x16) + 80002638: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 8000263c: 00083403 ld x8,0(x16) + 80002640: 00880813 addi x16,x16,8 + +0000000080002644 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + xnor x29, x22, x8 # perform operation + 80002644: 408b4eb3 xnor x29,x22,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002648: 0005b203 ld x4,0(x11) + 8000264c: 01d20c63 beq x4,x29,80002664 + 80002650: 6b0052ef jal x5,80007d00 + 80002654: 80002644 .word 0x80002644 + 80002658: 00000000 .word 0x00000000 + 8000265c: 800114a9 .word 0x800114a9 + 80002660: 00000000 .word 0x00000000 + 80002664: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x8000000000000000 + 80002668: 00083483 ld x9,0(x16) + 8000266c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80002670: 00083703 ld x14,0(x16) + 80002674: 00880813 addi x16,x16,8 + +0000000080002678 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x23, x9, x14 # perform operation + 80002678: 40e4cbb3 xnor x23,x9,x14 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000267c: 0005b203 ld x4,0(x11) + 80002680: 01720c63 beq x4,x23,80002698 + 80002684: 67c052ef jal x5,80007d00 + 80002688: 80002678 .word 0x80002678 + 8000268c: 00000000 .word 0x00000000 + 80002690: 80011518 .word 0x80011518 + 80002694: 00000000 .word 0x00000000 + 80002698: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x8000000000000000 + 8000269c: 00083c83 ld x25,0(x16) + 800026a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x5555555555555555 + 800026a4: 00083a03 ld x20,0(x16) + 800026a8: 00880813 addi x16,x16,8 + +00000000800026ac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + xnor x26, x25, x20 # perform operation + 800026ac: 414ccd33 xnor x26,x25,x20 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b0: 0005b203 ld x4,0(x11) + 800026b4: 01a20c63 beq x4,x26,800026cc + 800026b8: 648052ef jal x5,80007d00 + 800026bc: 800026ac .word 0x800026ac + 800026c0: 00000000 .word 0x00000000 + 800026c4: 80011587 .word 0x80011587 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x8000000000000000 + 800026d0: 00083903 ld x18,0(x16) + 800026d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x00000000ffffffff + 800026d8: 00083103 ld x2,0(x16) + 800026dc: 00880813 addi x16,x16,8 + +00000000800026e0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + xnor x23, x18, x2 # perform operation + 800026e0: 40294bb3 xnor x23,x18,x2 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e4: 0005b203 ld x4,0(x11) + 800026e8: 01720c63 beq x4,x23,80002700 + 800026ec: 614052ef jal x5,80007d00 + 800026f0: 800026e0 .word 0x800026e0 + 800026f4: 00000000 .word 0x00000000 + 800026f8: 800115f6 .word 0x800115f6 + 800026fc: 00000000 .word 0x00000000 + 80002700: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x8000000000000000 + 80002704: 00083383 ld x7,0(x16) + 80002708: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x00000000fffffffe + 8000270c: 00083183 ld x3,0(x16) + 80002710: 00880813 addi x16,x16,8 + +0000000080002714 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + xnor x1, x7, x3 # perform operation + 80002714: 4033c0b3 xnor x1,x7,x3 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002718: 0005b203 ld x4,0(x11) + 8000271c: 00120c63 beq x4,x1,80002734 + 80002720: 5e0052ef jal x5,80007d00 + 80002724: 80002714 .word 0x80002714 + 80002728: 00000000 .word 0x00000000 + 8000272c: 8001165d .word 0x8001165d + 80002730: 00000000 .word 0x00000000 + 80002734: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x8000000000000000 + 80002738: 00083c03 ld x24,0(x16) + 8000273c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x0000000100000000 + 80002740: 00083b83 ld x23,0(x16) + 80002744: 00880813 addi x16,x16,8 + +0000000080002748 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + xnor x6, x24, x23 # perform operation + 80002748: 417c4333 xnor x6,x24,x23 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 8000274c: 0005b203 ld x4,0(x11) + 80002750: 00620c63 beq x4,x6,80002768 + 80002754: 5ac052ef jal x5,80007d00 + 80002758: 80002748 .word 0x80002748 + 8000275c: 00000000 .word 0x00000000 + 80002760: 800116c4 .word 0x800116c4 + 80002764: 00000000 .word 0x00000000 + 80002768: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x8000000000000000 + 8000276c: 00083903 ld x18,0(x16) + 80002770: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x0000000100000001 + 80002774: 00083d83 ld x27,0(x16) + 80002778: 00880813 addi x16,x16,8 + +000000008000277c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + xnor x8, x18, x27 # perform operation + 8000277c: 41b94433 xnor x8,x18,x27 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002780: 0005b203 ld x4,0(x11) + 80002784: 00820c63 beq x4,x8,8000279c + 80002788: 578052ef jal x5,80007d00 + 8000278c: 8000277c .word 0x8000277c + 80002790: 00000000 .word 0x00000000 + 80002794: 8001172c .word 0x8001172c + 80002798: 00000000 .word 0x00000000 + 8000279c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x8000000000000001 + 800027a0: 00083883 ld x17,0(x16) + 800027a4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x0000000000000000 + 800027a8: 00083a83 ld x21,0(x16) + 800027ac: 00880813 addi x16,x16,8 + +00000000800027b0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + xnor x12, x17, x21 # perform operation + 800027b0: 4158c633 xnor x12,x17,x21 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b4: 0005b203 ld x4,0(x11) + 800027b8: 00c20c63 beq x4,x12,800027d0 + 800027bc: 544052ef jal x5,80007d00 + 800027c0: 800027b0 .word 0x800027b0 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 80011794 .word 0x80011794 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x8000000000000001 + 800027d4: 00083c03 ld x24,0(x16) + 800027d8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x0000000000000001 + 800027dc: 00083183 ld x3,0(x16) + 800027e0: 00880813 addi x16,x16,8 + +00000000800027e4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + xnor x6, x24, x3 # perform operation + 800027e4: 403c4333 xnor x6,x24,x3 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e8: 0005b203 ld x4,0(x11) + 800027ec: 00620c63 beq x4,x6,80002804 + 800027f0: 510052ef jal x5,80007d00 + 800027f4: 800027e4 .word 0x800027e4 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 800117f4 .word 0x800117f4 + 80002800: 00000000 .word 0x00000000 + 80002804: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x8000000000000001 + 80002808: 00083e03 ld x28,0(x16) + 8000280c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x0000000000000002 + 80002810: 00083b03 ld x22,0(x16) + 80002814: 00880813 addi x16,x16,8 + +0000000080002818 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + xnor x12, x28, x22 # perform operation + 80002818: 416e4633 xnor x12,x28,x22 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 8000281c: 0005b203 ld x4,0(x11) + 80002820: 00c20c63 beq x4,x12,80002838 + 80002824: 4dc052ef jal x5,80007d00 + 80002828: 80002818 .word 0x80002818 + 8000282c: 00000000 .word 0x00000000 + 80002830: 80011854 .word 0x80011854 + 80002834: 00000000 .word 0x00000000 + 80002838: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x8000000000000001 + 8000283c: 00083e03 ld x28,0(x16) + 80002840: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x8000000000000000 + 80002844: 00083a03 ld x20,0(x16) + 80002848: 00880813 addi x16,x16,8 + +000000008000284c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + xnor x25, x28, x20 # perform operation + 8000284c: 414e4cb3 xnor x25,x28,x20 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002850: 0005b203 ld x4,0(x11) + 80002854: 01920c63 beq x4,x25,8000286c + 80002858: 4a8052ef jal x5,80007d00 + 8000285c: 8000284c .word 0x8000284c + 80002860: 00000000 .word 0x00000000 + 80002864: 800118b4 .word 0x800118b4 + 80002868: 00000000 .word 0x00000000 + 8000286c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x8000000000000001 + 80002870: 00083e83 ld x29,0(x16) + 80002874: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x8000000000000001 + 80002878: 00083c03 ld x24,0(x16) + 8000287c: 00880813 addi x16,x16,8 + +0000000080002880 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + xnor x9, x29, x24 # perform operation + 80002880: 418ec4b3 xnor x9,x29,x24 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002884: 0005b203 ld x4,0(x11) + 80002888: 00920c63 beq x4,x9,800028a0 + 8000288c: 474052ef jal x5,80007d00 + 80002890: 80002880 .word 0x80002880 + 80002894: 00000000 .word 0x00000000 + 80002898: 80011923 .word 0x80011923 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x8000000000000001 + 800028a4: 00083a83 ld x21,0(x16) + 800028a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x7fffffffffffffff + 800028ac: 00083703 ld x14,0(x16) + 800028b0: 00880813 addi x16,x16,8 + +00000000800028b4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + xnor x2, x21, x14 # perform operation + 800028b4: 40eac133 xnor x2,x21,x14 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b8: 0005b203 ld x4,0(x11) + 800028bc: 00220c63 beq x4,x2,800028d4 + 800028c0: 440052ef jal x5,80007d00 + 800028c4: 800028b4 .word 0x800028b4 + 800028c8: 00000000 .word 0x00000000 + 800028cc: 80011992 .word 0x80011992 + 800028d0: 00000000 .word 0x00000000 + 800028d4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x8000000000000001 + 800028d8: 00083d83 ld x27,0(x16) + 800028dc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800028e0: 00083883 ld x17,0(x16) + 800028e4: 00880813 addi x16,x16,8 + +00000000800028e8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + xnor x8, x27, x17 # perform operation + 800028e8: 411dc433 xnor x8,x27,x17 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028ec: 0005b203 ld x4,0(x11) + 800028f0: 00820c63 beq x4,x8,80002908 + 800028f4: 40c052ef jal x5,80007d00 + 800028f8: 800028e8 .word 0x800028e8 + 800028fc: 00000000 .word 0x00000000 + 80002900: 80011a01 .word 0x80011a01 + 80002904: 00000000 .word 0x00000000 + 80002908: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x8000000000000001 + 8000290c: 00083403 ld x8,0(x16) + 80002910: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xffffffffffffffff + 80002914: 00083303 ld x6,0(x16) + 80002918: 00880813 addi x16,x16,8 + +000000008000291c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + xnor x20, x8, x6 # perform operation + 8000291c: 40644a33 xnor x20,x8,x6 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002920: 0005b203 ld x4,0(x11) + 80002924: 01420c63 beq x4,x20,8000293c + 80002928: 3d8052ef jal x5,80007d00 + 8000292c: 8000291c .word 0x8000291c + 80002930: 00000000 .word 0x00000000 + 80002934: 80011a70 .word 0x80011a70 + 80002938: 00000000 .word 0x00000000 + 8000293c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x8000000000000001 + 80002940: 00083703 ld x14,0(x16) + 80002944: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xfffffffffffffffe + 80002948: 00083983 ld x19,0(x16) + 8000294c: 00880813 addi x16,x16,8 + +0000000080002950 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + xnor x13, x14, x19 # perform operation + 80002950: 413746b3 xnor x13,x14,x19 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002954: 0005b203 ld x4,0(x11) + 80002958: 00d20c63 beq x4,x13,80002970 + 8000295c: 3a4052ef jal x5,80007d00 + 80002960: 80002950 .word 0x80002950 + 80002964: 00000000 .word 0x00000000 + 80002968: 80011adf .word 0x80011adf + 8000296c: 00000000 .word 0x00000000 + 80002970: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x8000000000000001 + 80002974: 00083f83 ld x31,0(x16) + 80002978: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 8000297c: 00083183 ld x3,0(x16) + 80002980: 00880813 addi x16,x16,8 + +0000000080002984 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + xnor x22, x31, x3 # perform operation + 80002984: 403fcb33 xnor x22,x31,x3 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002988: 0005b203 ld x4,0(x11) + 8000298c: 01620c63 beq x4,x22,800029a4 + 80002990: 370052ef jal x5,80007d00 + 80002994: 80002984 .word 0x80002984 + 80002998: 00000000 .word 0x00000000 + 8000299c: 80011b4e .word 0x80011b4e + 800029a0: 00000000 .word 0x00000000 + 800029a4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x8000000000000001 + 800029a8: 00083483 ld x9,0(x16) + 800029ac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 800029b0: 00083703 ld x14,0(x16) + 800029b4: 00880813 addi x16,x16,8 + +00000000800029b8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x31, x9, x14 # perform operation + 800029b8: 40e4cfb3 xnor x31,x9,x14 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029bc: 0005b203 ld x4,0(x11) + 800029c0: 01f20c63 beq x4,x31,800029d8 + 800029c4: 33c052ef jal x5,80007d00 + 800029c8: 800029b8 .word 0x800029b8 + 800029cc: 00000000 .word 0x00000000 + 800029d0: 80011bbd .word 0x80011bbd + 800029d4: 00000000 .word 0x00000000 + 800029d8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x8000000000000001 + 800029dc: 00083503 ld x10,0(x16) + 800029e0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x5555555555555555 + 800029e4: 00083e83 ld x29,0(x16) + 800029e8: 00880813 addi x16,x16,8 + +00000000800029ec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + xnor x22, x10, x29 # perform operation + 800029ec: 41d54b33 xnor x22,x10,x29 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f0: 0005b203 ld x4,0(x11) + 800029f4: 01620c63 beq x4,x22,80002a0c + 800029f8: 308052ef jal x5,80007d00 + 800029fc: 800029ec .word 0x800029ec + 80002a00: 00000000 .word 0x00000000 + 80002a04: 80011c2c .word 0x80011c2c + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x8000000000000001 + 80002a10: 00083a83 ld x21,0(x16) + 80002a14: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x00000000ffffffff + 80002a18: 00083f03 ld x30,0(x16) + 80002a1c: 00880813 addi x16,x16,8 + +0000000080002a20 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + xnor x9, x21, x30 # perform operation + 80002a20: 41eac4b3 xnor x9,x21,x30 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a24: 0005b203 ld x4,0(x11) + 80002a28: 00920c63 beq x4,x9,80002a40 + 80002a2c: 2d4052ef jal x5,80007d00 + 80002a30: 80002a20 .word 0x80002a20 + 80002a34: 00000000 .word 0x00000000 + 80002a38: 80011c9b .word 0x80011c9b + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x8000000000000001 + 80002a44: 00083083 ld x1,0(x16) + 80002a48: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x00000000fffffffe + 80002a4c: 00083503 ld x10,0(x16) + 80002a50: 00880813 addi x16,x16,8 + +0000000080002a54 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + xnor x17, x1, x10 # perform operation + 80002a54: 40a0c8b3 xnor x17,x1,x10 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a58: 0005b203 ld x4,0(x11) + 80002a5c: 01120c63 beq x4,x17,80002a74 + 80002a60: 2a0052ef jal x5,80007d00 + 80002a64: 80002a54 .word 0x80002a54 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 80011d02 .word 0x80011d02 + 80002a70: 00000000 .word 0x00000000 + 80002a74: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x8000000000000001 + 80002a78: 00083b03 ld x22,0(x16) + 80002a7c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x0000000100000000 + 80002a80: 00083883 ld x17,0(x16) + 80002a84: 00880813 addi x16,x16,8 + +0000000080002a88 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + xnor x26, x22, x17 # perform operation + 80002a88: 411b4d33 xnor x26,x22,x17 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a8c: 0005b203 ld x4,0(x11) + 80002a90: 01a20c63 beq x4,x26,80002aa8 + 80002a94: 26c052ef jal x5,80007d00 + 80002a98: 80002a88 .word 0x80002a88 + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 80011d69 .word 0x80011d69 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x8000000000000001 + 80002aac: 00083d03 ld x26,0(x16) + 80002ab0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x0000000100000001 + 80002ab4: 00083303 ld x6,0(x16) + 80002ab8: 00880813 addi x16,x16,8 + +0000000080002abc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + xnor x18, x26, x6 # perform operation + 80002abc: 406d4933 xnor x18,x26,x6 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac0: 0005b203 ld x4,0(x11) + 80002ac4: 01220c63 beq x4,x18,80002adc + 80002ac8: 238052ef jal x5,80007d00 + 80002acc: 80002abc .word 0x80002abc + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 80011dd1 .word 0x80011dd1 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002ae0: 00083b83 ld x23,0(x16) + 80002ae4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x0000000000000000 + 80002ae8: 00083883 ld x17,0(x16) + 80002aec: 00880813 addi x16,x16,8 + +0000000080002af0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + xnor x25, x23, x17 # perform operation + 80002af0: 411bccb3 xnor x25,x23,x17 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af4: 0005b203 ld x4,0(x11) + 80002af8: 01920c63 beq x4,x25,80002b10 + 80002afc: 204052ef jal x5,80007d00 + 80002b00: 80002af0 .word 0x80002af0 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 80011e39 .word 0x80011e39 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002b14: 00083103 ld x2,0(x16) + 80002b18: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000000000001 + 80002b1c: 00083a03 ld x20,0(x16) + 80002b20: 00880813 addi x16,x16,8 + +0000000080002b24 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + xnor x17, x2, x20 # perform operation + 80002b24: 414148b3 xnor x17,x2,x20 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b28: 0005b203 ld x4,0(x11) + 80002b2c: 01120c63 beq x4,x17,80002b44 + 80002b30: 1d0052ef jal x5,80007d00 + 80002b34: 80002b24 .word 0x80002b24 + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 80011e99 .word 0x80011e99 + 80002b40: 00000000 .word 0x00000000 + 80002b44: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002b48: 00083683 ld x13,0(x16) + 80002b4c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x0000000000000002 + 80002b50: 00083e83 ld x29,0(x16) + 80002b54: 00880813 addi x16,x16,8 + +0000000080002b58 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + xnor x27, x13, x29 # perform operation + 80002b58: 41d6cdb3 xnor x27,x13,x29 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b5c: 0005b203 ld x4,0(x11) + 80002b60: 01b20c63 beq x4,x27,80002b78 + 80002b64: 19c052ef jal x5,80007d00 + 80002b68: 80002b58 .word 0x80002b58 + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 80011ef9 .word 0x80011ef9 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002b7c: 00083b83 ld x23,0(x16) + 80002b80: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x8000000000000000 + 80002b84: 00083e03 ld x28,0(x16) + 80002b88: 00880813 addi x16,x16,8 + +0000000080002b8c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + xnor x12, x23, x28 # perform operation + 80002b8c: 41cbc633 xnor x12,x23,x28 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b90: 0005b203 ld x4,0(x11) + 80002b94: 00c20c63 beq x4,x12,80002bac + 80002b98: 168052ef jal x5,80007d00 + 80002b9c: 80002b8c .word 0x80002b8c + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 80011f59 .word 0x80011f59 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002bb0: 00083f03 ld x30,0(x16) + 80002bb4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x8000000000000001 + 80002bb8: 00083703 ld x14,0(x16) + 80002bbc: 00880813 addi x16,x16,8 + +0000000080002bc0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + xnor x15, x30, x14 # perform operation + 80002bc0: 40ef47b3 xnor x15,x30,x14 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc4: 0005b203 ld x4,0(x11) + 80002bc8: 00f20c63 beq x4,x15,80002be0 + 80002bcc: 134052ef jal x5,80007d00 + 80002bd0: 80002bc0 .word 0x80002bc0 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 80011fc8 .word 0x80011fc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002be4: 00083f03 ld x30,0(x16) + 80002be8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x7fffffffffffffff + 80002bec: 00083603 ld x12,0(x16) + 80002bf0: 00880813 addi x16,x16,8 + +0000000080002bf4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + xnor x14, x30, x12 # perform operation + 80002bf4: 40cf4733 xnor x14,x30,x12 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf8: 0005b203 ld x4,0(x11) + 80002bfc: 00e20c63 beq x4,x14,80002c14 + 80002c00: 100052ef jal x5,80007d00 + 80002c04: 80002bf4 .word 0x80002bf4 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 80012037 .word 0x80012037 + 80002c10: 00000000 .word 0x00000000 + 80002c14: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002c18: 00083c83 ld x25,0(x16) + 80002c1c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x7ffffffffffffffe + 80002c20: 00083603 ld x12,0(x16) + 80002c24: 00880813 addi x16,x16,8 + +0000000080002c28 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + xnor x7, x25, x12 # perform operation + 80002c28: 40ccc3b3 xnor x7,x25,x12 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c2c: 0005b203 ld x4,0(x11) + 80002c30: 00720c63 beq x4,x7,80002c48 + 80002c34: 0cc052ef jal x5,80007d00 + 80002c38: 80002c28 .word 0x80002c28 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 800120a6 .word 0x800120a6 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002c4c: 00083083 ld x1,0(x16) + 80002c50: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xffffffffffffffff + 80002c54: 00083303 ld x6,0(x16) + 80002c58: 00880813 addi x16,x16,8 + +0000000080002c5c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + xnor x15, x1, x6 # perform operation + 80002c5c: 4060c7b3 xnor x15,x1,x6 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c60: 0005b203 ld x4,0(x11) + 80002c64: 00f20c63 beq x4,x15,80002c7c + 80002c68: 098052ef jal x5,80007d00 + 80002c6c: 80002c5c .word 0x80002c5c + 80002c70: 00000000 .word 0x00000000 + 80002c74: 80012115 .word 0x80012115 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002c80: 00083183 ld x3,0(x16) + 80002c84: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xfffffffffffffffe + 80002c88: 00083503 ld x10,0(x16) + 80002c8c: 00880813 addi x16,x16,8 + +0000000080002c90 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + xnor x21, x3, x10 # perform operation + 80002c90: 40a1cab3 xnor x21,x3,x10 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c94: 0005b203 ld x4,0(x11) + 80002c98: 01520c63 beq x4,x21,80002cb0 + 80002c9c: 064052ef jal x5,80007d00 + 80002ca0: 80002c90 .word 0x80002c90 + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 80012184 .word 0x80012184 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002cb4: 00083883 ld x17,0(x16) + 80002cb8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80002cbc: 00083603 ld x12,0(x16) + 80002cc0: 00880813 addi x16,x16,8 + +0000000080002cc4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + xnor x7, x17, x12 # perform operation + 80002cc4: 40c8c3b3 xnor x7,x17,x12 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc8: 0005b203 ld x4,0(x11) + 80002ccc: 00720c63 beq x4,x7,80002ce4 + 80002cd0: 030052ef jal x5,80007d00 + 80002cd4: 80002cc4 .word 0x80002cc4 + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 800121f3 .word 0x800121f3 + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002ce8: 00083903 ld x18,0(x16) + 80002cec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80002cf0: 00083503 ld x10,0(x16) + 80002cf4: 00880813 addi x16,x16,8 + +0000000080002cf8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x26, x18, x10 # perform operation + 80002cf8: 40a94d33 xnor x26,x18,x10 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cfc: 0005b203 ld x4,0(x11) + 80002d00: 01a20c63 beq x4,x26,80002d18 + 80002d04: 7fd042ef jal x5,80007d00 + 80002d08: 80002cf8 .word 0x80002cf8 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 80012262 .word 0x80012262 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002d1c: 00083e03 ld x28,0(x16) + 80002d20: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x5555555555555555 + 80002d24: 00083a83 ld x21,0(x16) + 80002d28: 00880813 addi x16,x16,8 + +0000000080002d2c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + xnor x13, x28, x21 # perform operation + 80002d2c: 415e46b3 xnor x13,x28,x21 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d30: 0005b203 ld x4,0(x11) + 80002d34: 00d20c63 beq x4,x13,80002d4c + 80002d38: 7c9042ef jal x5,80007d00 + 80002d3c: 80002d2c .word 0x80002d2c + 80002d40: 00000000 .word 0x00000000 + 80002d44: 800122d1 .word 0x800122d1 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002d50: 00083383 ld x7,0(x16) + 80002d54: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x00000000ffffffff + 80002d58: 00083983 ld x19,0(x16) + 80002d5c: 00880813 addi x16,x16,8 + +0000000080002d60 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + xnor x15, x7, x19 # perform operation + 80002d60: 4133c7b3 xnor x15,x7,x19 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d64: 0005b203 ld x4,0(x11) + 80002d68: 00f20c63 beq x4,x15,80002d80 + 80002d6c: 795042ef jal x5,80007d00 + 80002d70: 80002d60 .word 0x80002d60 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 80012340 .word 0x80012340 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002d84: 00083483 ld x9,0(x16) + 80002d88: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x00000000fffffffe + 80002d8c: 00083383 ld x7,0(x16) + 80002d90: 00880813 addi x16,x16,8 + +0000000080002d94 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + xnor x1, x9, x7 # perform operation + 80002d94: 4074c0b3 xnor x1,x9,x7 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d98: 0005b203 ld x4,0(x11) + 80002d9c: 00120c63 beq x4,x1,80002db4 + 80002da0: 761042ef jal x5,80007d00 + 80002da4: 80002d94 .word 0x80002d94 + 80002da8: 00000000 .word 0x00000000 + 80002dac: 800123a7 .word 0x800123a7 + 80002db0: 00000000 .word 0x00000000 + 80002db4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002db8: 00083083 ld x1,0(x16) + 80002dbc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x0000000100000000 + 80002dc0: 00083983 ld x19,0(x16) + 80002dc4: 00880813 addi x16,x16,8 + +0000000080002dc8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + xnor x9, x1, x19 # perform operation + 80002dc8: 4130c4b3 xnor x9,x1,x19 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dcc: 0005b203 ld x4,0(x11) + 80002dd0: 00920c63 beq x4,x9,80002de8 + 80002dd4: 72d042ef jal x5,80007d00 + 80002dd8: 80002dc8 .word 0x80002dc8 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 8001240e .word 0x8001240e + 80002de4: 00000000 .word 0x00000000 + 80002de8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002dec: 00083783 ld x15,0(x16) + 80002df0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x0000000100000001 + 80002df4: 00083303 ld x6,0(x16) + 80002df8: 00880813 addi x16,x16,8 + +0000000080002dfc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + xnor x29, x15, x6 # perform operation + 80002dfc: 4067ceb3 xnor x29,x15,x6 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e00: 0005b203 ld x4,0(x11) + 80002e04: 01d20c63 beq x4,x29,80002e1c + 80002e08: 6f9042ef jal x5,80007d00 + 80002e0c: 80002dfc .word 0x80002dfc + 80002e10: 00000000 .word 0x00000000 + 80002e14: 80012476 .word 0x80012476 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80002e20: 00083a83 ld x21,0(x16) + 80002e24: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x0000000000000000 + 80002e28: 00083683 ld x13,0(x16) + 80002e2c: 00880813 addi x16,x16,8 + +0000000080002e30 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + xnor x27, x21, x13 # perform operation + 80002e30: 40dacdb3 xnor x27,x21,x13 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e34: 0005b203 ld x4,0(x11) + 80002e38: 01b20c63 beq x4,x27,80002e50 + 80002e3c: 6c5042ef jal x5,80007d00 + 80002e40: 80002e30 .word 0x80002e30 + 80002e44: 00000000 .word 0x00000000 + 80002e48: 800124de .word 0x800124de + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002e54: 00083883 ld x17,0(x16) + 80002e58: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x0000000000000001 + 80002e5c: 00083b83 ld x23,0(x16) + 80002e60: 00880813 addi x16,x16,8 + +0000000080002e64 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + xnor x30, x17, x23 # perform operation + 80002e64: 4178cf33 xnor x30,x17,x23 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e68: 0005b203 ld x4,0(x11) + 80002e6c: 01e20c63 beq x4,x30,80002e84 + 80002e70: 691042ef jal x5,80007d00 + 80002e74: 80002e64 .word 0x80002e64 + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 8001253e .word 0x8001253e + 80002e80: 00000000 .word 0x00000000 + 80002e84: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80002e88: 00083b83 ld x23,0(x16) + 80002e8c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x0000000000000002 + 80002e90: 00083a83 ld x21,0(x16) + 80002e94: 00880813 addi x16,x16,8 + +0000000080002e98 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + xnor x6, x23, x21 # perform operation + 80002e98: 415bc333 xnor x6,x23,x21 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e9c: 0005b203 ld x4,0(x11) + 80002ea0: 00620c63 beq x4,x6,80002eb8 + 80002ea4: 65d042ef jal x5,80007d00 + 80002ea8: 80002e98 .word 0x80002e98 + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 8001259e .word 0x8001259e + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002ebc: 00083e83 ld x29,0(x16) + 80002ec0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x8000000000000000 + 80002ec4: 00083083 ld x1,0(x16) + 80002ec8: 00880813 addi x16,x16,8 + +0000000080002ecc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + xnor x26, x29, x1 # perform operation + 80002ecc: 401ecd33 xnor x26,x29,x1 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed0: 0005b203 ld x4,0(x11) + 80002ed4: 01a20c63 beq x4,x26,80002eec + 80002ed8: 629042ef jal x5,80007d00 + 80002edc: 80002ecc .word 0x80002ecc + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 800125fe .word 0x800125fe + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002ef0: 00083c83 ld x25,0(x16) + 80002ef4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x8000000000000001 + 80002ef8: 00083b83 ld x23,0(x16) + 80002efc: 00880813 addi x16,x16,8 + +0000000080002f00 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + xnor x26, x25, x23 # perform operation + 80002f00: 417ccd33 xnor x26,x25,x23 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f04: 0005b203 ld x4,0(x11) + 80002f08: 01a20c63 beq x4,x26,80002f20 + 80002f0c: 5f5042ef jal x5,80007d00 + 80002f10: 80002f00 .word 0x80002f00 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 8001266d .word 0x8001266d + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002f24: 00083c03 ld x24,0(x16) + 80002f28: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x7fffffffffffffff + 80002f2c: 00083b03 ld x22,0(x16) + 80002f30: 00880813 addi x16,x16,8 + +0000000080002f34 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + xnor x17, x24, x22 # perform operation + 80002f34: 416c48b3 xnor x17,x24,x22 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f38: 0005b203 ld x4,0(x11) + 80002f3c: 01120c63 beq x4,x17,80002f54 + 80002f40: 5c1042ef jal x5,80007d00 + 80002f44: 80002f34 .word 0x80002f34 + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 800126dc .word 0x800126dc + 80002f50: 00000000 .word 0x00000000 + 80002f54: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002f58: 00083f83 ld x31,0(x16) + 80002f5c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80002f60: 00083483 ld x9,0(x16) + 80002f64: 00880813 addi x16,x16,8 + +0000000080002f68 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + xnor x7, x31, x9 # perform operation + 80002f68: 409fc3b3 xnor x7,x31,x9 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f6c: 0005b203 ld x4,0(x11) + 80002f70: 00720c63 beq x4,x7,80002f88 + 80002f74: 58d042ef jal x5,80007d00 + 80002f78: 80002f68 .word 0x80002f68 + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 8001274b .word 0x8001274b + 80002f84: 00000000 .word 0x00000000 + 80002f88: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x7ffffffffffffffe + 80002f8c: 00083483 ld x9,0(x16) + 80002f90: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xffffffffffffffff + 80002f94: 00083703 ld x14,0(x16) + 80002f98: 00880813 addi x16,x16,8 + +0000000080002f9c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + xnor x13, x9, x14 # perform operation + 80002f9c: 40e4c6b3 xnor x13,x9,x14 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa0: 0005b203 ld x4,0(x11) + 80002fa4: 00d20c63 beq x4,x13,80002fbc + 80002fa8: 559042ef jal x5,80007d00 + 80002fac: 80002f9c .word 0x80002f9c + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 800127ba .word 0x800127ba + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002fc0: 00083903 ld x18,0(x16) + 80002fc4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xfffffffffffffffe + 80002fc8: 00083383 ld x7,0(x16) + 80002fcc: 00880813 addi x16,x16,8 + +0000000080002fd0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + xnor x8, x18, x7 # perform operation + 80002fd0: 40794433 xnor x8,x18,x7 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd4: 0005b203 ld x4,0(x11) + 80002fd8: 00820c63 beq x4,x8,80002ff0 + 80002fdc: 525042ef jal x5,80007d00 + 80002fe0: 80002fd0 .word 0x80002fd0 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 80012829 .word 0x80012829 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002ff4: 00083f83 ld x31,0(x16) + 80002ff8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 80002ffc: 00083e03 ld x28,0(x16) + 80003000: 00880813 addi x16,x16,8 + +0000000080003004 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xnor x19, x31, x28 # perform operation + 80003004: 41cfc9b3 xnor x19,x31,x28 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003008: 0005b203 ld x4,0(x11) + 8000300c: 01320c63 beq x4,x19,80003024 + 80003010: 4f1042ef jal x5,80007d00 + 80003014: 80003004 .word 0x80003004 + 80003018: 00000000 .word 0x00000000 + 8000301c: 80012898 .word 0x80012898 + 80003020: 00000000 .word 0x00000000 + 80003024: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80003028: 00083f03 ld x30,0(x16) + 8000302c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80003030: 00083103 ld x2,0(x16) + 80003034: 00880813 addi x16,x16,8 + +0000000080003038 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x6, x30, x2 # perform operation + 80003038: 402f4333 xnor x6,x30,x2 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000303c: 0005b203 ld x4,0(x11) + 80003040: 00620c63 beq x4,x6,80003058 + 80003044: 4bd042ef jal x5,80007d00 + 80003048: 80003038 .word 0x80003038 + 8000304c: 00000000 .word 0x00000000 + 80003050: 80012907 .word 0x80012907 + 80003054: 00000000 .word 0x00000000 + 80003058: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x7ffffffffffffffe + 8000305c: 00083a03 ld x20,0(x16) + 80003060: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x5555555555555555 + 80003064: 00083883 ld x17,0(x16) + 80003068: 00880813 addi x16,x16,8 + +000000008000306c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + xnor x6, x20, x17 # perform operation + 8000306c: 411a4333 xnor x6,x20,x17 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003070: 0005b203 ld x4,0(x11) + 80003074: 00620c63 beq x4,x6,8000308c + 80003078: 489042ef jal x5,80007d00 + 8000307c: 8000306c .word 0x8000306c + 80003080: 00000000 .word 0x00000000 + 80003084: 80012976 .word 0x80012976 + 80003088: 00000000 .word 0x00000000 + 8000308c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80003090: 00083083 ld x1,0(x16) + 80003094: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x00000000ffffffff + 80003098: 00083883 ld x17,0(x16) + 8000309c: 00880813 addi x16,x16,8 + +00000000800030a0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + xnor x10, x1, x17 # perform operation + 800030a0: 4110c533 xnor x10,x1,x17 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a4: 0005b203 ld x4,0(x11) + 800030a8: 00a20c63 beq x4,x10,800030c0 + 800030ac: 455042ef jal x5,80007d00 + 800030b0: 800030a0 .word 0x800030a0 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 800129e5 .word 0x800129e5 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x7ffffffffffffffe + 800030c4: 00083b03 ld x22,0(x16) + 800030c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x00000000fffffffe + 800030cc: 00083f83 ld x31,0(x16) + 800030d0: 00880813 addi x16,x16,8 + +00000000800030d4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + xnor x1, x22, x31 # perform operation + 800030d4: 41fb40b3 xnor x1,x22,x31 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d8: 0005b203 ld x4,0(x11) + 800030dc: 00120c63 beq x4,x1,800030f4 + 800030e0: 421042ef jal x5,80007d00 + 800030e4: 800030d4 .word 0x800030d4 + 800030e8: 00000000 .word 0x00000000 + 800030ec: 80012a4c .word 0x80012a4c + 800030f0: 00000000 .word 0x00000000 + 800030f4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x7ffffffffffffffe + 800030f8: 00083483 ld x9,0(x16) + 800030fc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x0000000100000000 + 80003100: 00083183 ld x3,0(x16) + 80003104: 00880813 addi x16,x16,8 + +0000000080003108 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + xnor x7, x9, x3 # perform operation + 80003108: 4034c3b3 xnor x7,x9,x3 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 8000310c: 0005b203 ld x4,0(x11) + 80003110: 00720c63 beq x4,x7,80003128 + 80003114: 3ed042ef jal x5,80007d00 + 80003118: 80003108 .word 0x80003108 + 8000311c: 00000000 .word 0x00000000 + 80003120: 80012ab3 .word 0x80012ab3 + 80003124: 00000000 .word 0x00000000 + 80003128: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x7ffffffffffffffe + 8000312c: 00083d83 ld x27,0(x16) + 80003130: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000100000001 + 80003134: 00083403 ld x8,0(x16) + 80003138: 00880813 addi x16,x16,8 + +000000008000313c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + xnor x28, x27, x8 # perform operation + 8000313c: 408dce33 xnor x28,x27,x8 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003140: 0005b203 ld x4,0(x11) + 80003144: 01c20c63 beq x4,x28,8000315c + 80003148: 3b9042ef jal x5,80007d00 + 8000314c: 8000313c .word 0x8000313c + 80003150: 00000000 .word 0x00000000 + 80003154: 80012b1b .word 0x80012b1b + 80003158: 00000000 .word 0x00000000 + 8000315c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xffffffffffffffff + 80003160: 00083e83 ld x29,0(x16) + 80003164: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x0000000000000000 + 80003168: 00083b03 ld x22,0(x16) + 8000316c: 00880813 addi x16,x16,8 + +0000000080003170 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + xnor x26, x29, x22 # perform operation + 80003170: 416ecd33 xnor x26,x29,x22 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003174: 0005b203 ld x4,0(x11) + 80003178: 01a20c63 beq x4,x26,80003190 + 8000317c: 385042ef jal x5,80007d00 + 80003180: 80003170 .word 0x80003170 + 80003184: 00000000 .word 0x00000000 + 80003188: 80012b83 .word 0x80012b83 + 8000318c: 00000000 .word 0x00000000 + 80003190: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xffffffffffffffff + 80003194: 00083f03 ld x30,0(x16) + 80003198: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x0000000000000001 + 8000319c: 00083c03 ld x24,0(x16) + 800031a0: 00880813 addi x16,x16,8 + +00000000800031a4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + xnor x27, x30, x24 # perform operation + 800031a4: 418f4db3 xnor x27,x30,x24 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a8: 0005b203 ld x4,0(x11) + 800031ac: 01b20c63 beq x4,x27,800031c4 + 800031b0: 351042ef jal x5,80007d00 + 800031b4: 800031a4 .word 0x800031a4 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 80012be3 .word 0x80012be3 + 800031c0: 00000000 .word 0x00000000 + 800031c4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xffffffffffffffff + 800031c8: 00083683 ld x13,0(x16) + 800031cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x0000000000000002 + 800031d0: 00083a83 ld x21,0(x16) + 800031d4: 00880813 addi x16,x16,8 + +00000000800031d8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + xnor x6, x13, x21 # perform operation + 800031d8: 4156c333 xnor x6,x13,x21 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031dc: 0005b203 ld x4,0(x11) + 800031e0: 00620c63 beq x4,x6,800031f8 + 800031e4: 31d042ef jal x5,80007d00 + 800031e8: 800031d8 .word 0x800031d8 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 80012c43 .word 0x80012c43 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xffffffffffffffff + 800031fc: 00083183 ld x3,0(x16) + 80003200: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x8000000000000000 + 80003204: 00083f83 ld x31,0(x16) + 80003208: 00880813 addi x16,x16,8 + +000000008000320c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + xnor x25, x3, x31 # perform operation + 8000320c: 41f1ccb3 xnor x25,x3,x31 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003210: 0005b203 ld x4,0(x11) + 80003214: 01920c63 beq x4,x25,8000322c + 80003218: 2e9042ef jal x5,80007d00 + 8000321c: 8000320c .word 0x8000320c + 80003220: 00000000 .word 0x00000000 + 80003224: 80012ca3 .word 0x80012ca3 + 80003228: 00000000 .word 0x00000000 + 8000322c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xffffffffffffffff + 80003230: 00083b03 ld x22,0(x16) + 80003234: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x8000000000000001 + 80003238: 00083483 ld x9,0(x16) + 8000323c: 00880813 addi x16,x16,8 + +0000000080003240 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + xnor x14, x22, x9 # perform operation + 80003240: 409b4733 xnor x14,x22,x9 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003244: 0005b203 ld x4,0(x11) + 80003248: 00e20c63 beq x4,x14,80003260 + 8000324c: 2b5042ef jal x5,80007d00 + 80003250: 80003240 .word 0x80003240 + 80003254: 00000000 .word 0x00000000 + 80003258: 80012d12 .word 0x80012d12 + 8000325c: 00000000 .word 0x00000000 + 80003260: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xffffffffffffffff + 80003264: 00083103 ld x2,0(x16) + 80003268: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x7fffffffffffffff + 8000326c: 00083b83 ld x23,0(x16) + 80003270: 00880813 addi x16,x16,8 + +0000000080003274 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + xnor x8, x2, x23 # perform operation + 80003274: 41714433 xnor x8,x2,x23 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003278: 0005b203 ld x4,0(x11) + 8000327c: 00820c63 beq x4,x8,80003294 + 80003280: 281042ef jal x5,80007d00 + 80003284: 80003274 .word 0x80003274 + 80003288: 00000000 .word 0x00000000 + 8000328c: 80012d81 .word 0x80012d81 + 80003290: 00000000 .word 0x00000000 + 80003294: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0xffffffffffffffff + 80003298: 00083a03 ld x20,0(x16) + 8000329c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x7ffffffffffffffe + 800032a0: 00083e83 ld x29,0(x16) + 800032a4: 00880813 addi x16,x16,8 + +00000000800032a8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + xnor x19, x20, x29 # perform operation + 800032a8: 41da49b3 xnor x19,x20,x29 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032ac: 0005b203 ld x4,0(x11) + 800032b0: 01320c63 beq x4,x19,800032c8 + 800032b4: 24d042ef jal x5,80007d00 + 800032b8: 800032a8 .word 0x800032a8 + 800032bc: 00000000 .word 0x00000000 + 800032c0: 80012df0 .word 0x80012df0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xffffffffffffffff + 800032cc: 00083403 ld x8,0(x16) + 800032d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xffffffffffffffff + 800032d4: 00083683 ld x13,0(x16) + 800032d8: 00880813 addi x16,x16,8 + +00000000800032dc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + xnor x10, x8, x13 # perform operation + 800032dc: 40d44533 xnor x10,x8,x13 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e0: 0005b203 ld x4,0(x11) + 800032e4: 00a20c63 beq x4,x10,800032fc + 800032e8: 219042ef jal x5,80007d00 + 800032ec: 800032dc .word 0x800032dc + 800032f0: 00000000 .word 0x00000000 + 800032f4: 80012e5f .word 0x80012e5f + 800032f8: 00000000 .word 0x00000000 + 800032fc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xffffffffffffffff + 80003300: 00083f03 ld x30,0(x16) + 80003304: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xfffffffffffffffe + 80003308: 00083a83 ld x21,0(x16) + 8000330c: 00880813 addi x16,x16,8 + +0000000080003310 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + xnor x9, x30, x21 # perform operation + 80003310: 415f44b3 xnor x9,x30,x21 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003314: 0005b203 ld x4,0(x11) + 80003318: 00920c63 beq x4,x9,80003330 + 8000331c: 1e5042ef jal x5,80007d00 + 80003320: 80003310 .word 0x80003310 + 80003324: 00000000 .word 0x00000000 + 80003328: 80012ece .word 0x80012ece + 8000332c: 00000000 .word 0x00000000 + 80003330: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xffffffffffffffff + 80003334: 00083103 ld x2,0(x16) + 80003338: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 8000333c: 00083783 ld x15,0(x16) + 80003340: 00880813 addi x16,x16,8 + +0000000080003344 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + xnor x18, x2, x15 # perform operation + 80003344: 40f14933 xnor x18,x2,x15 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003348: 0005b203 ld x4,0(x11) + 8000334c: 01220c63 beq x4,x18,80003364 + 80003350: 1b1042ef jal x5,80007d00 + 80003354: 80003344 .word 0x80003344 + 80003358: 00000000 .word 0x00000000 + 8000335c: 80012f3d .word 0x80012f3d + 80003360: 00000000 .word 0x00000000 + 80003364: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xffffffffffffffff + 80003368: 00083403 ld x8,0(x16) + 8000336c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80003370: 00083b03 ld x22,0(x16) + 80003374: 00880813 addi x16,x16,8 + +0000000080003378 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x27, x8, x22 # perform operation + 80003378: 41644db3 xnor x27,x8,x22 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000337c: 0005b203 ld x4,0(x11) + 80003380: 01b20c63 beq x4,x27,80003398 + 80003384: 17d042ef jal x5,80007d00 + 80003388: 80003378 .word 0x80003378 + 8000338c: 00000000 .word 0x00000000 + 80003390: 80012fac .word 0x80012fac + 80003394: 00000000 .word 0x00000000 + 80003398: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xffffffffffffffff + 8000339c: 00083f03 ld x30,0(x16) + 800033a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x5555555555555555 + 800033a4: 00083d83 ld x27,0(x16) + 800033a8: 00880813 addi x16,x16,8 + +00000000800033ac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + xnor x1, x30, x27 # perform operation + 800033ac: 41bf40b3 xnor x1,x30,x27 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b0: 0005b203 ld x4,0(x11) + 800033b4: 00120c63 beq x4,x1,800033cc + 800033b8: 149042ef jal x5,80007d00 + 800033bc: 800033ac .word 0x800033ac + 800033c0: 00000000 .word 0x00000000 + 800033c4: 8001301b .word 0x8001301b + 800033c8: 00000000 .word 0x00000000 + 800033cc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xffffffffffffffff + 800033d0: 00083383 ld x7,0(x16) + 800033d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x00000000ffffffff + 800033d8: 00083783 ld x15,0(x16) + 800033dc: 00880813 addi x16,x16,8 + +00000000800033e0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + xnor x12, x7, x15 # perform operation + 800033e0: 40f3c633 xnor x12,x7,x15 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e4: 0005b203 ld x4,0(x11) + 800033e8: 00c20c63 beq x4,x12,80003400 + 800033ec: 115042ef jal x5,80007d00 + 800033f0: 800033e0 .word 0x800033e0 + 800033f4: 00000000 .word 0x00000000 + 800033f8: 8001308a .word 0x8001308a + 800033fc: 00000000 .word 0x00000000 + 80003400: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xffffffffffffffff + 80003404: 00083983 ld x19,0(x16) + 80003408: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x00000000fffffffe + 8000340c: 00083303 ld x6,0(x16) + 80003410: 00880813 addi x16,x16,8 + +0000000080003414 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + xnor x13, x19, x6 # perform operation + 80003414: 4069c6b3 xnor x13,x19,x6 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003418: 0005b203 ld x4,0(x11) + 8000341c: 00d20c63 beq x4,x13,80003434 + 80003420: 0e1042ef jal x5,80007d00 + 80003424: 80003414 .word 0x80003414 + 80003428: 00000000 .word 0x00000000 + 8000342c: 800130f1 .word 0x800130f1 + 80003430: 00000000 .word 0x00000000 + 80003434: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xffffffffffffffff + 80003438: 00083f83 ld x31,0(x16) + 8000343c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x0000000100000000 + 80003440: 00083f03 ld x30,0(x16) + 80003444: 00880813 addi x16,x16,8 + +0000000080003448 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + xnor x27, x31, x30 # perform operation + 80003448: 41efcdb3 xnor x27,x31,x30 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 8000344c: 0005b203 ld x4,0(x11) + 80003450: 01b20c63 beq x4,x27,80003468 + 80003454: 0ad042ef jal x5,80007d00 + 80003458: 80003448 .word 0x80003448 + 8000345c: 00000000 .word 0x00000000 + 80003460: 80013158 .word 0x80013158 + 80003464: 00000000 .word 0x00000000 + 80003468: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xffffffffffffffff + 8000346c: 00083883 ld x17,0(x16) + 80003470: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x0000000100000001 + 80003474: 00083503 ld x10,0(x16) + 80003478: 00880813 addi x16,x16,8 + +000000008000347c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + xnor x18, x17, x10 # perform operation + 8000347c: 40a8c933 xnor x18,x17,x10 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003480: 0005b203 ld x4,0(x11) + 80003484: 01220c63 beq x4,x18,8000349c + 80003488: 079042ef jal x5,80007d00 + 8000348c: 8000347c .word 0x8000347c + 80003490: 00000000 .word 0x00000000 + 80003494: 800131c0 .word 0x800131c0 + 80003498: 00000000 .word 0x00000000 + 8000349c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xfffffffffffffffe + 800034a0: 00083783 ld x15,0(x16) + 800034a4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x0000000000000000 + 800034a8: 00083d03 ld x26,0(x16) + 800034ac: 00880813 addi x16,x16,8 + +00000000800034b0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + xnor x18, x15, x26 # perform operation + 800034b0: 41a7c933 xnor x18,x15,x26 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b4: 0005b203 ld x4,0(x11) + 800034b8: 01220c63 beq x4,x18,800034d0 + 800034bc: 045042ef jal x5,80007d00 + 800034c0: 800034b0 .word 0x800034b0 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 80013228 .word 0x80013228 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0xfffffffffffffffe + 800034d4: 00083983 ld x19,0(x16) + 800034d8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x0000000000000001 + 800034dc: 00083b83 ld x23,0(x16) + 800034e0: 00880813 addi x16,x16,8 + +00000000800034e4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + xnor x31, x19, x23 # perform operation + 800034e4: 4179cfb3 xnor x31,x19,x23 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e8: 0005b203 ld x4,0(x11) + 800034ec: 01f20c63 beq x4,x31,80003504 + 800034f0: 011042ef jal x5,80007d00 + 800034f4: 800034e4 .word 0x800034e4 + 800034f8: 00000000 .word 0x00000000 + 800034fc: 80013288 .word 0x80013288 + 80003500: 00000000 .word 0x00000000 + 80003504: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xfffffffffffffffe + 80003508: 00083883 ld x17,0(x16) + 8000350c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x0000000000000002 + 80003510: 00083603 ld x12,0(x16) + 80003514: 00880813 addi x16,x16,8 + +0000000080003518 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + xnor x6, x17, x12 # perform operation + 80003518: 40c8c333 xnor x6,x17,x12 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 8000351c: 0005b203 ld x4,0(x11) + 80003520: 00620c63 beq x4,x6,80003538 + 80003524: 7dc042ef jal x5,80007d00 + 80003528: 80003518 .word 0x80003518 + 8000352c: 00000000 .word 0x00000000 + 80003530: 800132e8 .word 0x800132e8 + 80003534: 00000000 .word 0x00000000 + 80003538: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xfffffffffffffffe + 8000353c: 00083603 ld x12,0(x16) + 80003540: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x8000000000000000 + 80003544: 00083b83 ld x23,0(x16) + 80003548: 00880813 addi x16,x16,8 + +000000008000354c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + xnor x20, x12, x23 # perform operation + 8000354c: 41764a33 xnor x20,x12,x23 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003550: 0005b203 ld x4,0(x11) + 80003554: 01420c63 beq x4,x20,8000356c + 80003558: 7a8042ef jal x5,80007d00 + 8000355c: 8000354c .word 0x8000354c + 80003560: 00000000 .word 0x00000000 + 80003564: 80013348 .word 0x80013348 + 80003568: 00000000 .word 0x00000000 + 8000356c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003570: 00083483 ld x9,0(x16) + 80003574: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x8000000000000001 + 80003578: 00083703 ld x14,0(x16) + 8000357c: 00880813 addi x16,x16,8 + +0000000080003580 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + xnor x13, x9, x14 # perform operation + 80003580: 40e4c6b3 xnor x13,x9,x14 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003584: 0005b203 ld x4,0(x11) + 80003588: 00d20c63 beq x4,x13,800035a0 + 8000358c: 774042ef jal x5,80007d00 + 80003590: 80003580 .word 0x80003580 + 80003594: 00000000 .word 0x00000000 + 80003598: 800133b7 .word 0x800133b7 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xfffffffffffffffe + 800035a4: 00083483 ld x9,0(x16) + 800035a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x7fffffffffffffff + 800035ac: 00083383 ld x7,0(x16) + 800035b0: 00880813 addi x16,x16,8 + +00000000800035b4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + xnor x25, x9, x7 # perform operation + 800035b4: 4074ccb3 xnor x25,x9,x7 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b8: 0005b203 ld x4,0(x11) + 800035bc: 01920c63 beq x4,x25,800035d4 + 800035c0: 740042ef jal x5,80007d00 + 800035c4: 800035b4 .word 0x800035b4 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 80013426 .word 0x80013426 + 800035d0: 00000000 .word 0x00000000 + 800035d4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0xfffffffffffffffe + 800035d8: 00083903 ld x18,0(x16) + 800035dc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x7ffffffffffffffe + 800035e0: 00083783 ld x15,0(x16) + 800035e4: 00880813 addi x16,x16,8 + +00000000800035e8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + xnor x8, x18, x15 # perform operation + 800035e8: 40f94433 xnor x8,x18,x15 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035ec: 0005b203 ld x4,0(x11) + 800035f0: 00820c63 beq x4,x8,80003608 + 800035f4: 70c042ef jal x5,80007d00 + 800035f8: 800035e8 .word 0x800035e8 + 800035fc: 00000000 .word 0x00000000 + 80003600: 80013495 .word 0x80013495 + 80003604: 00000000 .word 0x00000000 + 80003608: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xfffffffffffffffe + 8000360c: 00083703 ld x14,0(x16) + 80003610: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xffffffffffffffff + 80003614: 00083e03 ld x28,0(x16) + 80003618: 00880813 addi x16,x16,8 + +000000008000361c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + xnor x9, x14, x28 # perform operation + 8000361c: 41c744b3 xnor x9,x14,x28 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003620: 0005b203 ld x4,0(x11) + 80003624: 00920c63 beq x4,x9,8000363c + 80003628: 6d8042ef jal x5,80007d00 + 8000362c: 8000361c .word 0x8000361c + 80003630: 00000000 .word 0x00000000 + 80003634: 80013504 .word 0x80013504 + 80003638: 00000000 .word 0x00000000 + 8000363c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003640: 00083d03 ld x26,0(x16) + 80003644: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xfffffffffffffffe + 80003648: 00083c83 ld x25,0(x16) + 8000364c: 00880813 addi x16,x16,8 + +0000000080003650 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + xnor x8, x26, x25 # perform operation + 80003650: 419d4433 xnor x8,x26,x25 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003654: 0005b203 ld x4,0(x11) + 80003658: 00820c63 beq x4,x8,80003670 + 8000365c: 6a4042ef jal x5,80007d00 + 80003660: 80003650 .word 0x80003650 + 80003664: 00000000 .word 0x00000000 + 80003668: 80013573 .word 0x80013573 + 8000366c: 00000000 .word 0x00000000 + 80003670: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xfffffffffffffffe + 80003674: 00083503 ld x10,0(x16) + 80003678: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 8000367c: 00083783 ld x15,0(x16) + 80003680: 00880813 addi x16,x16,8 + +0000000080003684 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xnor x3, x10, x15 # perform operation + 80003684: 40f541b3 xnor x3,x10,x15 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003688: 0005b203 ld x4,0(x11) + 8000368c: 00320c63 beq x4,x3,800036a4 + 80003690: 670042ef jal x5,80007d00 + 80003694: 80003684 .word 0x80003684 + 80003698: 00000000 .word 0x00000000 + 8000369c: 800135e2 .word 0x800135e2 + 800036a0: 00000000 .word 0x00000000 + 800036a4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xfffffffffffffffe + 800036a8: 00083683 ld x13,0(x16) + 800036ac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 800036b0: 00083303 ld x6,0(x16) + 800036b4: 00880813 addi x16,x16,8 + +00000000800036b8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x25, x13, x6 # perform operation + 800036b8: 4066ccb3 xnor x25,x13,x6 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036bc: 0005b203 ld x4,0(x11) + 800036c0: 01920c63 beq x4,x25,800036d8 + 800036c4: 63c042ef jal x5,80007d00 + 800036c8: 800036b8 .word 0x800036b8 + 800036cc: 00000000 .word 0x00000000 + 800036d0: 80013651 .word 0x80013651 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xfffffffffffffffe + 800036dc: 00083403 ld x8,0(x16) + 800036e0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x5555555555555555 + 800036e4: 00083183 ld x3,0(x16) + 800036e8: 00880813 addi x16,x16,8 + +00000000800036ec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + xnor x23, x8, x3 # perform operation + 800036ec: 40344bb3 xnor x23,x8,x3 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f0: 0005b203 ld x4,0(x11) + 800036f4: 01720c63 beq x4,x23,8000370c + 800036f8: 608042ef jal x5,80007d00 + 800036fc: 800036ec .word 0x800036ec + 80003700: 00000000 .word 0x00000000 + 80003704: 800136c0 .word 0x800136c0 + 80003708: 00000000 .word 0x00000000 + 8000370c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xfffffffffffffffe + 80003710: 00083103 ld x2,0(x16) + 80003714: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x00000000ffffffff + 80003718: 00083183 ld x3,0(x16) + 8000371c: 00880813 addi x16,x16,8 + +0000000080003720 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + xnor x6, x2, x3 # perform operation + 80003720: 40314333 xnor x6,x2,x3 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003724: 0005b203 ld x4,0(x11) + 80003728: 00620c63 beq x4,x6,80003740 + 8000372c: 5d4042ef jal x5,80007d00 + 80003730: 80003720 .word 0x80003720 + 80003734: 00000000 .word 0x00000000 + 80003738: 8001372f .word 0x8001372f + 8000373c: 00000000 .word 0x00000000 + 80003740: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003744: 00083d83 ld x27,0(x16) + 80003748: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x00000000fffffffe + 8000374c: 00083083 ld x1,0(x16) + 80003750: 00880813 addi x16,x16,8 + +0000000080003754 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + xnor x29, x27, x1 # perform operation + 80003754: 401dceb3 xnor x29,x27,x1 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003758: 0005b203 ld x4,0(x11) + 8000375c: 01d20c63 beq x4,x29,80003774 + 80003760: 5a0042ef jal x5,80007d00 + 80003764: 80003754 .word 0x80003754 + 80003768: 00000000 .word 0x00000000 + 8000376c: 80013796 .word 0x80013796 + 80003770: 00000000 .word 0x00000000 + 80003774: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xfffffffffffffffe + 80003778: 00083603 ld x12,0(x16) + 8000377c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x0000000100000000 + 80003780: 00083f03 ld x30,0(x16) + 80003784: 00880813 addi x16,x16,8 + +0000000080003788 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + xnor x2, x12, x30 # perform operation + 80003788: 41e64133 xnor x2,x12,x30 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 8000378c: 0005b203 ld x4,0(x11) + 80003790: 00220c63 beq x4,x2,800037a8 + 80003794: 56c042ef jal x5,80007d00 + 80003798: 80003788 .word 0x80003788 + 8000379c: 00000000 .word 0x00000000 + 800037a0: 800137fd .word 0x800137fd + 800037a4: 00000000 .word 0x00000000 + 800037a8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0xfffffffffffffffe + 800037ac: 00083a03 ld x20,0(x16) + 800037b0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0000000100000001 + 800037b4: 00083483 ld x9,0(x16) + 800037b8: 00880813 addi x16,x16,8 + +00000000800037bc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + xnor x22, x20, x9 # perform operation + 800037bc: 409a4b33 xnor x22,x20,x9 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c0: 0005b203 ld x4,0(x11) + 800037c4: 01620c63 beq x4,x22,800037dc + 800037c8: 538042ef jal x5,80007d00 + 800037cc: 800037bc .word 0x800037bc + 800037d0: 00000000 .word 0x00000000 + 800037d4: 80013865 .word 0x80013865 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800037e0: 00083603 ld x12,0(x16) + 800037e4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000000000000 + 800037e8: 00083403 ld x8,0(x16) + 800037ec: 00880813 addi x16,x16,8 + +00000000800037f0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + xnor x18, x12, x8 # perform operation + 800037f0: 40864933 xnor x18,x12,x8 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f4: 0005b203 ld x4,0(x11) + 800037f8: 01220c63 beq x4,x18,80003810 + 800037fc: 504042ef jal x5,80007d00 + 80003800: 800037f0 .word 0x800037f0 + 80003804: 00000000 .word 0x00000000 + 80003808: 800138cd .word 0x800138cd + 8000380c: 00000000 .word 0x00000000 + 80003810: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003814: 00083103 ld x2,0(x16) + 80003818: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000000000001 + 8000381c: 00083a03 ld x20,0(x16) + 80003820: 00880813 addi x16,x16,8 + +0000000080003824 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + xnor x28, x2, x20 # perform operation + 80003824: 41414e33 xnor x28,x2,x20 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003828: 0005b203 ld x4,0(x11) + 8000382c: 01c20c63 beq x4,x28,80003844 + 80003830: 4d0042ef jal x5,80007d00 + 80003834: 80003824 .word 0x80003824 + 80003838: 00000000 .word 0x00000000 + 8000383c: 8001392d .word 0x8001392d + 80003840: 00000000 .word 0x00000000 + 80003844: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003848: 00083f03 ld x30,0(x16) + 8000384c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0000000000000002 + 80003850: 00083483 ld x9,0(x16) + 80003854: 00880813 addi x16,x16,8 + +0000000080003858 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + xnor x31, x30, x9 # perform operation + 80003858: 409f4fb3 xnor x31,x30,x9 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 8000385c: 0005b203 ld x4,0(x11) + 80003860: 01f20c63 beq x4,x31,80003878 + 80003864: 49c042ef jal x5,80007d00 + 80003868: 80003858 .word 0x80003858 + 8000386c: 00000000 .word 0x00000000 + 80003870: 8001398d .word 0x8001398d + 80003874: 00000000 .word 0x00000000 + 80003878: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 8000387c: 00083d83 ld x27,0(x16) + 80003880: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x8000000000000000 + 80003884: 00083783 ld x15,0(x16) + 80003888: 00880813 addi x16,x16,8 + +000000008000388c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + xnor x21, x27, x15 # perform operation + 8000388c: 40fdcab3 xnor x21,x27,x15 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003890: 0005b203 ld x4,0(x11) + 80003894: 01520c63 beq x4,x21,800038ac + 80003898: 468042ef jal x5,80007d00 + 8000389c: 8000388c .word 0x8000388c + 800038a0: 00000000 .word 0x00000000 + 800038a4: 800139ed .word 0x800139ed + 800038a8: 00000000 .word 0x00000000 + 800038ac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 800038b0: 00083b83 ld x23,0(x16) + 800038b4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x8000000000000001 + 800038b8: 00083503 ld x10,0(x16) + 800038bc: 00880813 addi x16,x16,8 + +00000000800038c0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + xnor x22, x23, x10 # perform operation + 800038c0: 40abcb33 xnor x22,x23,x10 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c4: 0005b203 ld x4,0(x11) + 800038c8: 01620c63 beq x4,x22,800038e0 + 800038cc: 434042ef jal x5,80007d00 + 800038d0: 800038c0 .word 0x800038c0 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 80013a5c .word 0x80013a5c + 800038dc: 00000000 .word 0x00000000 + 800038e0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800038e4: 00083e03 ld x28,0(x16) + 800038e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x7fffffffffffffff + 800038ec: 00083b83 ld x23,0(x16) + 800038f0: 00880813 addi x16,x16,8 + +00000000800038f4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + xnor x31, x28, x23 # perform operation + 800038f4: 417e4fb3 xnor x31,x28,x23 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f8: 0005b203 ld x4,0(x11) + 800038fc: 01f20c63 beq x4,x31,80003914 + 80003900: 400042ef jal x5,80007d00 + 80003904: 800038f4 .word 0x800038f4 + 80003908: 00000000 .word 0x00000000 + 8000390c: 80013acb .word 0x80013acb + 80003910: 00000000 .word 0x00000000 + 80003914: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003918: 00083703 ld x14,0(x16) + 8000391c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x7ffffffffffffffe + 80003920: 00083c03 ld x24,0(x16) + 80003924: 00880813 addi x16,x16,8 + +0000000080003928 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + xnor x27, x14, x24 # perform operation + 80003928: 41874db3 xnor x27,x14,x24 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 8000392c: 0005b203 ld x4,0(x11) + 80003930: 01b20c63 beq x4,x27,80003948 + 80003934: 3cc042ef jal x5,80007d00 + 80003938: 80003928 .word 0x80003928 + 8000393c: 00000000 .word 0x00000000 + 80003940: 80013b3a .word 0x80013b3a + 80003944: 00000000 .word 0x00000000 + 80003948: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 8000394c: 00083b03 ld x22,0(x16) + 80003950: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xffffffffffffffff + 80003954: 00083603 ld x12,0(x16) + 80003958: 00880813 addi x16,x16,8 + +000000008000395c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + xnor x13, x22, x12 # perform operation + 8000395c: 40cb46b3 xnor x13,x22,x12 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003960: 0005b203 ld x4,0(x11) + 80003964: 00d20c63 beq x4,x13,8000397c + 80003968: 398042ef jal x5,80007d00 + 8000396c: 8000395c .word 0x8000395c + 80003970: 00000000 .word 0x00000000 + 80003974: 80013ba9 .word 0x80013ba9 + 80003978: 00000000 .word 0x00000000 + 8000397c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003980: 00083f03 ld x30,0(x16) + 80003984: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xfffffffffffffffe + 80003988: 00083103 ld x2,0(x16) + 8000398c: 00880813 addi x16,x16,8 + +0000000080003990 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + xnor x12, x30, x2 # perform operation + 80003990: 402f4633 xnor x12,x30,x2 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003994: 0005b203 ld x4,0(x11) + 80003998: 00c20c63 beq x4,x12,800039b0 + 8000399c: 364042ef jal x5,80007d00 + 800039a0: 80003990 .word 0x80003990 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 80013c18 .word 0x80013c18 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 800039b4: 00083483 ld x9,0(x16) + 800039b8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x5bbc887763ae86f2 + 800039bc: 00083503 ld x10,0(x16) + 800039c0: 00880813 addi x16,x16,8 + +00000000800039c4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + xnor x17, x9, x10 # perform operation + 800039c4: 40a4c8b3 xnor x17,x9,x10 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c8: 0005b203 ld x4,0(x11) + 800039cc: 01120c63 beq x4,x17,800039e4 + 800039d0: 330042ef jal x5,80007d00 + 800039d4: 800039c4 .word 0x800039c4 + 800039d8: 00000000 .word 0x00000000 + 800039dc: 80013c87 .word 0x80013c87 + 800039e0: 00000000 .word 0x00000000 + 800039e4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 800039e8: 00083083 ld x1,0(x16) + 800039ec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 800039f0: 00083783 ld x15,0(x16) + 800039f4: 00880813 addi x16,x16,8 + +00000000800039f8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x20, x1, x15 # perform operation + 800039f8: 40f0ca33 xnor x20,x1,x15 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039fc: 0005b203 ld x4,0(x11) + 80003a00: 01420c63 beq x4,x20,80003a18 + 80003a04: 2fc042ef jal x5,80007d00 + 80003a08: 800039f8 .word 0x800039f8 + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 80013cf6 .word 0x80013cf6 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80003a1c: 00083783 ld x15,0(x16) + 80003a20: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x5555555555555555 + 80003a24: 00083303 ld x6,0(x16) + 80003a28: 00880813 addi x16,x16,8 + +0000000080003a2c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + xnor x30, x15, x6 # perform operation + 80003a2c: 4067cf33 xnor x30,x15,x6 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a30: 0005b203 ld x4,0(x11) + 80003a34: 01e20c63 beq x4,x30,80003a4c + 80003a38: 2c8042ef jal x5,80007d00 + 80003a3c: 80003a2c .word 0x80003a2c + 80003a40: 00000000 .word 0x00000000 + 80003a44: 80013d65 .word 0x80013d65 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003a50: 00083103 ld x2,0(x16) + 80003a54: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x00000000ffffffff + 80003a58: 00083403 ld x8,0(x16) + 80003a5c: 00880813 addi x16,x16,8 + +0000000080003a60 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + xnor x22, x2, x8 # perform operation + 80003a60: 40814b33 xnor x22,x2,x8 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a64: 0005b203 ld x4,0(x11) + 80003a68: 01620c63 beq x4,x22,80003a80 + 80003a6c: 294042ef jal x5,80007d00 + 80003a70: 80003a60 .word 0x80003a60 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 80013dd4 .word 0x80013dd4 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003a84: 00083983 ld x19,0(x16) + 80003a88: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x00000000fffffffe + 80003a8c: 00083183 ld x3,0(x16) + 80003a90: 00880813 addi x16,x16,8 + +0000000080003a94 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + xnor x7, x19, x3 # perform operation + 80003a94: 4039c3b3 xnor x7,x19,x3 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a98: 0005b203 ld x4,0(x11) + 80003a9c: 00720c63 beq x4,x7,80003ab4 + 80003aa0: 260042ef jal x5,80007d00 + 80003aa4: 80003a94 .word 0x80003a94 + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 80013e3b .word 0x80013e3b + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003ab8: 00083503 ld x10,0(x16) + 80003abc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0000000100000000 + 80003ac0: 00083483 ld x9,0(x16) + 80003ac4: 00880813 addi x16,x16,8 + +0000000080003ac8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + xnor x6, x10, x9 # perform operation + 80003ac8: 40954333 xnor x6,x10,x9 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003acc: 0005b203 ld x4,0(x11) + 80003ad0: 00620c63 beq x4,x6,80003ae8 + 80003ad4: 22c042ef jal x5,80007d00 + 80003ad8: 80003ac8 .word 0x80003ac8 + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 80013ea2 .word 0x80013ea2 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003aec: 00083683 ld x13,0(x16) + 80003af0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x0000000100000001 + 80003af4: 00083903 ld x18,0(x16) + 80003af8: 00880813 addi x16,x16,8 + +0000000080003afc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + xnor x29, x13, x18 # perform operation + 80003afc: 4126ceb3 xnor x29,x13,x18 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b00: 0005b203 ld x4,0(x11) + 80003b04: 01d20c63 beq x4,x29,80003b1c + 80003b08: 1f8042ef jal x5,80007d00 + 80003b0c: 80003afc .word 0x80003afc + 80003b10: 00000000 .word 0x00000000 + 80003b14: 80013f0a .word 0x80013f0a + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003b20: 00083183 ld x3,0(x16) + 80003b24: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000000000000 + 80003b28: 00083403 ld x8,0(x16) + 80003b2c: 00880813 addi x16,x16,8 + +0000000080003b30 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + xnor x24, x3, x8 # perform operation + 80003b30: 4081cc33 xnor x24,x3,x8 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b34: 0005b203 ld x4,0(x11) + 80003b38: 01820c63 beq x4,x24,80003b50 + 80003b3c: 1c4042ef jal x5,80007d00 + 80003b40: 80003b30 .word 0x80003b30 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 80013f72 .word 0x80013f72 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003b54: 00083103 ld x2,0(x16) + 80003b58: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x0000000000000001 + 80003b5c: 00083603 ld x12,0(x16) + 80003b60: 00880813 addi x16,x16,8 + +0000000080003b64 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + xnor x9, x2, x12 # perform operation + 80003b64: 40c144b3 xnor x9,x2,x12 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b68: 0005b203 ld x4,0(x11) + 80003b6c: 00920c63 beq x4,x9,80003b84 + 80003b70: 190042ef jal x5,80007d00 + 80003b74: 80003b64 .word 0x80003b64 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 80013fd2 .word 0x80013fd2 + 80003b80: 00000000 .word 0x00000000 + 80003b84: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003b88: 00083e83 ld x29,0(x16) + 80003b8c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000000000002 + 80003b90: 00083a03 ld x20,0(x16) + 80003b94: 00880813 addi x16,x16,8 + +0000000080003b98 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + xnor x12, x29, x20 # perform operation + 80003b98: 414ec633 xnor x12,x29,x20 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b9c: 0005b203 ld x4,0(x11) + 80003ba0: 00c20c63 beq x4,x12,80003bb8 + 80003ba4: 15c042ef jal x5,80007d00 + 80003ba8: 80003b98 .word 0x80003b98 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 80014032 .word 0x80014032 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003bbc: 00083e03 ld x28,0(x16) + 80003bc0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x8000000000000000 + 80003bc4: 00083e83 ld x29,0(x16) + 80003bc8: 00880813 addi x16,x16,8 + +0000000080003bcc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + xnor x12, x28, x29 # perform operation + 80003bcc: 41de4633 xnor x12,x28,x29 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd0: 0005b203 ld x4,0(x11) + 80003bd4: 00c20c63 beq x4,x12,80003bec + 80003bd8: 128042ef jal x5,80007d00 + 80003bdc: 80003bcc .word 0x80003bcc + 80003be0: 00000000 .word 0x00000000 + 80003be4: 80014092 .word 0x80014092 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80003bf0: 00083403 ld x8,0(x16) + 80003bf4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x8000000000000001 + 80003bf8: 00083603 ld x12,0(x16) + 80003bfc: 00880813 addi x16,x16,8 + +0000000080003c00 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + xnor x21, x8, x12 # perform operation + 80003c00: 40c44ab3 xnor x21,x8,x12 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c04: 0005b203 ld x4,0(x11) + 80003c08: 01520c63 beq x4,x21,80003c20 + 80003c0c: 0f4042ef jal x5,80007d00 + 80003c10: 80003c00 .word 0x80003c00 + 80003c14: 00000000 .word 0x00000000 + 80003c18: 80014101 .word 0x80014101 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003c24: 00083f03 ld x30,0(x16) + 80003c28: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x7fffffffffffffff + 80003c2c: 00083f83 ld x31,0(x16) + 80003c30: 00880813 addi x16,x16,8 + +0000000080003c34 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + xnor x29, x30, x31 # perform operation + 80003c34: 41ff4eb3 xnor x29,x30,x31 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c38: 0005b203 ld x4,0(x11) + 80003c3c: 01d20c63 beq x4,x29,80003c54 + 80003c40: 0c0042ef jal x5,80007d00 + 80003c44: 80003c34 .word 0x80003c34 + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 80014170 .word 0x80014170 + 80003c50: 00000000 .word 0x00000000 + 80003c54: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xaaaaaaaaaaaaaaaa + 80003c58: 00083d83 ld x27,0(x16) + 80003c5c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80003c60: 00083903 ld x18,0(x16) + 80003c64: 00880813 addi x16,x16,8 + +0000000080003c68 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + xnor x15, x27, x18 # perform operation + 80003c68: 412dc7b3 xnor x15,x27,x18 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c6c: 0005b203 ld x4,0(x11) + 80003c70: 00f20c63 beq x4,x15,80003c88 + 80003c74: 08c042ef jal x5,80007d00 + 80003c78: 80003c68 .word 0x80003c68 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 800141df .word 0x800141df + 80003c84: 00000000 .word 0x00000000 + 80003c88: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003c8c: 00083b83 ld x23,0(x16) + 80003c90: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xffffffffffffffff + 80003c94: 00083a83 ld x21,0(x16) + 80003c98: 00880813 addi x16,x16,8 + +0000000080003c9c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + xnor x22, x23, x21 # perform operation + 80003c9c: 415bcb33 xnor x22,x23,x21 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca0: 0005b203 ld x4,0(x11) + 80003ca4: 01620c63 beq x4,x22,80003cbc + 80003ca8: 058042ef jal x5,80007d00 + 80003cac: 80003c9c .word 0x80003c9c + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 8001424e .word 0x8001424e + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003cc0: 00083703 ld x14,0(x16) + 80003cc4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xfffffffffffffffe + 80003cc8: 00083f83 ld x31,0(x16) + 80003ccc: 00880813 addi x16,x16,8 + +0000000080003cd0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + xnor x20, x14, x31 # perform operation + 80003cd0: 41f74a33 xnor x20,x14,x31 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd4: 0005b203 ld x4,0(x11) + 80003cd8: 01420c63 beq x4,x20,80003cf0 + 80003cdc: 024042ef jal x5,80007d00 + 80003ce0: 80003cd0 .word 0x80003cd0 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 800142bd .word 0x800142bd + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003cf4: 00083883 ld x17,0(x16) + 80003cf8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80003cfc: 00083f03 ld x30,0(x16) + 80003d00: 00880813 addi x16,x16,8 + +0000000080003d04 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + xnor x23, x17, x30 # perform operation + 80003d04: 41e8cbb3 xnor x23,x17,x30 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d08: 0005b203 ld x4,0(x11) + 80003d0c: 01720c63 beq x4,x23,80003d24 + 80003d10: 7f1032ef jal x5,80007d00 + 80003d14: 80003d04 .word 0x80003d04 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 8001432c .word 0x8001432c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003d28: 00083d03 ld x26,0(x16) + 80003d2c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80003d30: 00083703 ld x14,0(x16) + 80003d34: 00880813 addi x16,x16,8 + +0000000080003d38 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x2, x26, x14 # perform operation + 80003d38: 40ed4133 xnor x2,x26,x14 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d3c: 0005b203 ld x4,0(x11) + 80003d40: 00220c63 beq x4,x2,80003d58 + 80003d44: 7bd032ef jal x5,80007d00 + 80003d48: 80003d38 .word 0x80003d38 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 8001439b .word 0x8001439b + 80003d54: 00000000 .word 0x00000000 + 80003d58: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003d5c: 00083503 ld x10,0(x16) + 80003d60: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x5555555555555555 + 80003d64: 00083083 ld x1,0(x16) + 80003d68: 00880813 addi x16,x16,8 + +0000000080003d6c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + xnor x8, x10, x1 # perform operation + 80003d6c: 40154433 xnor x8,x10,x1 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d70: 0005b203 ld x4,0(x11) + 80003d74: 00820c63 beq x4,x8,80003d8c + 80003d78: 789032ef jal x5,80007d00 + 80003d7c: 80003d6c .word 0x80003d6c + 80003d80: 00000000 .word 0x00000000 + 80003d84: 8001440a .word 0x8001440a + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003d90: 00083603 ld x12,0(x16) + 80003d94: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0x00000000ffffffff + 80003d98: 00083d03 ld x26,0(x16) + 80003d9c: 00880813 addi x16,x16,8 + +0000000080003da0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + xnor x31, x12, x26 # perform operation + 80003da0: 41a64fb3 xnor x31,x12,x26 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da4: 0005b203 ld x4,0(x11) + 80003da8: 01f20c63 beq x4,x31,80003dc0 + 80003dac: 755032ef jal x5,80007d00 + 80003db0: 80003da0 .word 0x80003da0 + 80003db4: 00000000 .word 0x00000000 + 80003db8: 80014479 .word 0x80014479 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003dc4: 00083503 ld x10,0(x16) + 80003dc8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x00000000fffffffe + 80003dcc: 00083b03 ld x22,0(x16) + 80003dd0: 00880813 addi x16,x16,8 + +0000000080003dd4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + xnor x25, x10, x22 # perform operation + 80003dd4: 41654cb3 xnor x25,x10,x22 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd8: 0005b203 ld x4,0(x11) + 80003ddc: 01920c63 beq x4,x25,80003df4 + 80003de0: 721032ef jal x5,80007d00 + 80003de4: 80003dd4 .word 0x80003dd4 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 800144e0 .word 0x800144e0 + 80003df0: 00000000 .word 0x00000000 + 80003df4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003df8: 00083603 ld x12,0(x16) + 80003dfc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0000000100000000 + 80003e00: 00083483 ld x9,0(x16) + 80003e04: 00880813 addi x16,x16,8 + +0000000080003e08 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + xnor x21, x12, x9 # perform operation + 80003e08: 40964ab3 xnor x21,x12,x9 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e0c: 0005b203 ld x4,0(x11) + 80003e10: 01520c63 beq x4,x21,80003e28 + 80003e14: 6ed032ef jal x5,80007d00 + 80003e18: 80003e08 .word 0x80003e08 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 80014547 .word 0x80014547 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003e2c: 00083883 ld x17,0(x16) + 80003e30: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000100000001 + 80003e34: 00083403 ld x8,0(x16) + 80003e38: 00880813 addi x16,x16,8 + +0000000080003e3c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + xnor x25, x17, x8 # perform operation + 80003e3c: 4088ccb3 xnor x25,x17,x8 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e40: 0005b203 ld x4,0(x11) + 80003e44: 01920c63 beq x4,x25,80003e5c + 80003e48: 6b9032ef jal x5,80007d00 + 80003e4c: 80003e3c .word 0x80003e3c + 80003e50: 00000000 .word 0x00000000 + 80003e54: 800145af .word 0x800145af + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x5555555555555555 + 80003e60: 00083a03 ld x20,0(x16) + 80003e64: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x0000000000000000 + 80003e68: 00083603 ld x12,0(x16) + 80003e6c: 00880813 addi x16,x16,8 + +0000000080003e70 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + xnor x30, x20, x12 # perform operation + 80003e70: 40ca4f33 xnor x30,x20,x12 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e74: 0005b203 ld x4,0(x11) + 80003e78: 01e20c63 beq x4,x30,80003e90 + 80003e7c: 685032ef jal x5,80007d00 + 80003e80: 80003e70 .word 0x80003e70 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 80014617 .word 0x80014617 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x5555555555555555 + 80003e94: 00083b83 ld x23,0(x16) + 80003e98: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x0000000000000001 + 80003e9c: 00083a83 ld x21,0(x16) + 80003ea0: 00880813 addi x16,x16,8 + +0000000080003ea4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + xnor x9, x23, x21 # perform operation + 80003ea4: 415bc4b3 xnor x9,x23,x21 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea8: 0005b203 ld x4,0(x11) + 80003eac: 00920c63 beq x4,x9,80003ec4 + 80003eb0: 651032ef jal x5,80007d00 + 80003eb4: 80003ea4 .word 0x80003ea4 + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 80014677 .word 0x80014677 + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x5555555555555555 + 80003ec8: 00083d83 ld x27,0(x16) + 80003ecc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x0000000000000002 + 80003ed0: 00083303 ld x6,0(x16) + 80003ed4: 00880813 addi x16,x16,8 + +0000000080003ed8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + xnor x20, x27, x6 # perform operation + 80003ed8: 406dca33 xnor x20,x27,x6 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003edc: 0005b203 ld x4,0(x11) + 80003ee0: 01420c63 beq x4,x20,80003ef8 + 80003ee4: 61d032ef jal x5,80007d00 + 80003ee8: 80003ed8 .word 0x80003ed8 + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 800146d7 .word 0x800146d7 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x5555555555555555 + 80003efc: 00083703 ld x14,0(x16) + 80003f00: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x8000000000000000 + 80003f04: 00083b03 ld x22,0(x16) + 80003f08: 00880813 addi x16,x16,8 + +0000000080003f0c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + xnor x31, x14, x22 # perform operation + 80003f0c: 41674fb3 xnor x31,x14,x22 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f10: 0005b203 ld x4,0(x11) + 80003f14: 01f20c63 beq x4,x31,80003f2c + 80003f18: 5e9032ef jal x5,80007d00 + 80003f1c: 80003f0c .word 0x80003f0c + 80003f20: 00000000 .word 0x00000000 + 80003f24: 80014737 .word 0x80014737 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x5555555555555555 + 80003f30: 00083303 ld x6,0(x16) + 80003f34: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x8000000000000001 + 80003f38: 00083903 ld x18,0(x16) + 80003f3c: 00880813 addi x16,x16,8 + +0000000080003f40 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + xnor x8, x6, x18 # perform operation + 80003f40: 41234433 xnor x8,x6,x18 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f44: 0005b203 ld x4,0(x11) + 80003f48: 00820c63 beq x4,x8,80003f60 + 80003f4c: 5b5032ef jal x5,80007d00 + 80003f50: 80003f40 .word 0x80003f40 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 800147a6 .word 0x800147a6 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x5555555555555555 + 80003f64: 00083103 ld x2,0(x16) + 80003f68: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x7fffffffffffffff + 80003f6c: 00083a03 ld x20,0(x16) + 80003f70: 00880813 addi x16,x16,8 + +0000000080003f74 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + xnor x6, x2, x20 # perform operation + 80003f74: 41414333 xnor x6,x2,x20 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f78: 0005b203 ld x4,0(x11) + 80003f7c: 00620c63 beq x4,x6,80003f94 + 80003f80: 581032ef jal x5,80007d00 + 80003f84: 80003f74 .word 0x80003f74 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 80014815 .word 0x80014815 + 80003f90: 00000000 .word 0x00000000 + 80003f94: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x5555555555555555 + 80003f98: 00083683 ld x13,0(x16) + 80003f9c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x7ffffffffffffffe + 80003fa0: 00083603 ld x12,0(x16) + 80003fa4: 00880813 addi x16,x16,8 + +0000000080003fa8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + xnor x17, x13, x12 # perform operation + 80003fa8: 40c6c8b3 xnor x17,x13,x12 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fac: 0005b203 ld x4,0(x11) + 80003fb0: 01120c63 beq x4,x17,80003fc8 + 80003fb4: 54d032ef jal x5,80007d00 + 80003fb8: 80003fa8 .word 0x80003fa8 + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 80014884 .word 0x80014884 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x5555555555555555 + 80003fcc: 00083403 ld x8,0(x16) + 80003fd0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xffffffffffffffff + 80003fd4: 00083983 ld x19,0(x16) + 80003fd8: 00880813 addi x16,x16,8 + +0000000080003fdc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + xnor x18, x8, x19 # perform operation + 80003fdc: 41344933 xnor x18,x8,x19 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe0: 0005b203 ld x4,0(x11) + 80003fe4: 01220c63 beq x4,x18,80003ffc + 80003fe8: 519032ef jal x5,80007d00 + 80003fec: 80003fdc .word 0x80003fdc + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 800148f3 .word 0x800148f3 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x5555555555555555 + 80004000: 00083083 ld x1,0(x16) + 80004004: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xfffffffffffffffe + 80004008: 00083f03 ld x30,0(x16) + 8000400c: 00880813 addi x16,x16,8 + +0000000080004010 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + xnor x26, x1, x30 # perform operation + 80004010: 41e0cd33 xnor x26,x1,x30 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004014: 0005b203 ld x4,0(x11) + 80004018: 01a20c63 beq x4,x26,80004030 + 8000401c: 4e5032ef jal x5,80007d00 + 80004020: 80004010 .word 0x80004010 + 80004024: 00000000 .word 0x00000000 + 80004028: 80014962 .word 0x80014962 + 8000402c: 00000000 .word 0x00000000 + 80004030: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x5555555555555555 + 80004034: 00083d03 ld x26,0(x16) + 80004038: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 8000403c: 00083883 ld x17,0(x16) + 80004040: 00880813 addi x16,x16,8 + +0000000080004044 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + xnor x29, x26, x17 # perform operation + 80004044: 411d4eb3 xnor x29,x26,x17 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004048: 0005b203 ld x4,0(x11) + 8000404c: 01d20c63 beq x4,x29,80004064 + 80004050: 4b1032ef jal x5,80007d00 + 80004054: 80004044 .word 0x80004044 + 80004058: 00000000 .word 0x00000000 + 8000405c: 800149d1 .word 0x800149d1 + 80004060: 00000000 .word 0x00000000 + 80004064: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x5555555555555555 + 80004068: 00083503 ld x10,0(x16) + 8000406c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80004070: 00083703 ld x14,0(x16) + 80004074: 00880813 addi x16,x16,8 + +0000000080004078 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x12, x10, x14 # perform operation + 80004078: 40e54633 xnor x12,x10,x14 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000407c: 0005b203 ld x4,0(x11) + 80004080: 00c20c63 beq x4,x12,80004098 + 80004084: 47d032ef jal x5,80007d00 + 80004088: 80004078 .word 0x80004078 + 8000408c: 00000000 .word 0x00000000 + 80004090: 80014a40 .word 0x80014a40 + 80004094: 00000000 .word 0x00000000 + 80004098: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x5555555555555555 + 8000409c: 00083a03 ld x20,0(x16) + 800040a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x5555555555555555 + 800040a4: 00083c83 ld x25,0(x16) + 800040a8: 00880813 addi x16,x16,8 + +00000000800040ac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + xnor x28, x20, x25 # perform operation + 800040ac: 419a4e33 xnor x28,x20,x25 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b0: 0005b203 ld x4,0(x11) + 800040b4: 01c20c63 beq x4,x28,800040cc + 800040b8: 449032ef jal x5,80007d00 + 800040bc: 800040ac .word 0x800040ac + 800040c0: 00000000 .word 0x00000000 + 800040c4: 80014aaf .word 0x80014aaf + 800040c8: 00000000 .word 0x00000000 + 800040cc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x5555555555555555 + 800040d0: 00083403 ld x8,0(x16) + 800040d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x00000000ffffffff + 800040d8: 00083783 ld x15,0(x16) + 800040dc: 00880813 addi x16,x16,8 + +00000000800040e0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + xnor x28, x8, x15 # perform operation + 800040e0: 40f44e33 xnor x28,x8,x15 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e4: 0005b203 ld x4,0(x11) + 800040e8: 01c20c63 beq x4,x28,80004100 + 800040ec: 415032ef jal x5,80007d00 + 800040f0: 800040e0 .word 0x800040e0 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 80014b1e .word 0x80014b1e + 800040fc: 00000000 .word 0x00000000 + 80004100: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x5555555555555555 + 80004104: 00083e03 ld x28,0(x16) + 80004108: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x00000000fffffffe + 8000410c: 00083b03 ld x22,0(x16) + 80004110: 00880813 addi x16,x16,8 + +0000000080004114 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + xnor x1, x28, x22 # perform operation + 80004114: 416e40b3 xnor x1,x28,x22 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004118: 0005b203 ld x4,0(x11) + 8000411c: 00120c63 beq x4,x1,80004134 + 80004120: 3e1032ef jal x5,80007d00 + 80004124: 80004114 .word 0x80004114 + 80004128: 00000000 .word 0x00000000 + 8000412c: 80014b85 .word 0x80014b85 + 80004130: 00000000 .word 0x00000000 + 80004134: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x5555555555555555 + 80004138: 00083503 ld x10,0(x16) + 8000413c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x0000000100000000 + 80004140: 00083703 ld x14,0(x16) + 80004144: 00880813 addi x16,x16,8 + +0000000080004148 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + xnor x6, x10, x14 # perform operation + 80004148: 40e54333 xnor x6,x10,x14 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 8000414c: 0005b203 ld x4,0(x11) + 80004150: 00620c63 beq x4,x6,80004168 + 80004154: 3ad032ef jal x5,80007d00 + 80004158: 80004148 .word 0x80004148 + 8000415c: 00000000 .word 0x00000000 + 80004160: 80014bec .word 0x80014bec + 80004164: 00000000 .word 0x00000000 + 80004168: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x5555555555555555 + 8000416c: 00083603 ld x12,0(x16) + 80004170: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0000000100000001 + 80004174: 00083483 ld x9,0(x16) + 80004178: 00880813 addi x16,x16,8 + +000000008000417c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + xnor x10, x12, x9 # perform operation + 8000417c: 40964533 xnor x10,x12,x9 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004180: 0005b203 ld x4,0(x11) + 80004184: 00a20c63 beq x4,x10,8000419c + 80004188: 379032ef jal x5,80007d00 + 8000418c: 8000417c .word 0x8000417c + 80004190: 00000000 .word 0x00000000 + 80004194: 80014c54 .word 0x80014c54 + 80004198: 00000000 .word 0x00000000 + 8000419c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x00000000ffffffff + 800041a0: 00083503 ld x10,0(x16) + 800041a4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x0000000000000000 + 800041a8: 00083783 ld x15,0(x16) + 800041ac: 00880813 addi x16,x16,8 + +00000000800041b0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xnor x21, x10, x15 # perform operation + 800041b0: 40f54ab3 xnor x21,x10,x15 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b4: 0005b203 ld x4,0(x11) + 800041b8: 01520c63 beq x4,x21,800041d0 + 800041bc: 345032ef jal x5,80007d00 + 800041c0: 800041b0 .word 0x800041b0 + 800041c4: 00000000 .word 0x00000000 + 800041c8: 80014cbc .word 0x80014cbc + 800041cc: 00000000 .word 0x00000000 + 800041d0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x00000000ffffffff + 800041d4: 00083303 ld x6,0(x16) + 800041d8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x0000000000000001 + 800041dc: 00083f83 ld x31,0(x16) + 800041e0: 00880813 addi x16,x16,8 + +00000000800041e4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xnor x15, x6, x31 # perform operation + 800041e4: 41f347b3 xnor x15,x6,x31 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e8: 0005b203 ld x4,0(x11) + 800041ec: 00f20c63 beq x4,x15,80004204 + 800041f0: 311032ef jal x5,80007d00 + 800041f4: 800041e4 .word 0x800041e4 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 80014d14 .word 0x80014d14 + 80004200: 00000000 .word 0x00000000 + 80004204: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x00000000ffffffff + 80004208: 00083403 ld x8,0(x16) + 8000420c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x0000000000000002 + 80004210: 00083d83 ld x27,0(x16) + 80004214: 00880813 addi x16,x16,8 + +0000000080004218 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xnor x28, x8, x27 # perform operation + 80004218: 41b44e33 xnor x28,x8,x27 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 8000421c: 0005b203 ld x4,0(x11) + 80004220: 01c20c63 beq x4,x28,80004238 + 80004224: 2dd032ef jal x5,80007d00 + 80004228: 80004218 .word 0x80004218 + 8000422c: 00000000 .word 0x00000000 + 80004230: 80014d6c .word 0x80014d6c + 80004234: 00000000 .word 0x00000000 + 80004238: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x00000000ffffffff + 8000423c: 00083f83 ld x31,0(x16) + 80004240: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x8000000000000000 + 80004244: 00083103 ld x2,0(x16) + 80004248: 00880813 addi x16,x16,8 + +000000008000424c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + xnor x1, x31, x2 # perform operation + 8000424c: 402fc0b3 xnor x1,x31,x2 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004250: 0005b203 ld x4,0(x11) + 80004254: 00120c63 beq x4,x1,8000426c + 80004258: 2a9032ef jal x5,80007d00 + 8000425c: 8000424c .word 0x8000424c + 80004260: 00000000 .word 0x00000000 + 80004264: 80014dc4 .word 0x80014dc4 + 80004268: 00000000 .word 0x00000000 + 8000426c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x00000000ffffffff + 80004270: 00083483 ld x9,0(x16) + 80004274: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x8000000000000001 + 80004278: 00083983 ld x19,0(x16) + 8000427c: 00880813 addi x16,x16,8 + +0000000080004280 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + xnor x1, x9, x19 # perform operation + 80004280: 4134c0b3 xnor x1,x9,x19 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004284: 0005b203 ld x4,0(x11) + 80004288: 00120c63 beq x4,x1,800042a0 + 8000428c: 275032ef jal x5,80007d00 + 80004290: 80004280 .word 0x80004280 + 80004294: 00000000 .word 0x00000000 + 80004298: 80014e2b .word 0x80014e2b + 8000429c: 00000000 .word 0x00000000 + 800042a0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x00000000ffffffff + 800042a4: 00083703 ld x14,0(x16) + 800042a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x7fffffffffffffff + 800042ac: 00083403 ld x8,0(x16) + 800042b0: 00880813 addi x16,x16,8 + +00000000800042b4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + xnor x29, x14, x8 # perform operation + 800042b4: 40874eb3 xnor x29,x14,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b8: 0005b203 ld x4,0(x11) + 800042bc: 01d20c63 beq x4,x29,800042d4 + 800042c0: 241032ef jal x5,80007d00 + 800042c4: 800042b4 .word 0x800042b4 + 800042c8: 00000000 .word 0x00000000 + 800042cc: 80014e92 .word 0x80014e92 + 800042d0: 00000000 .word 0x00000000 + 800042d4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x00000000ffffffff + 800042d8: 00083903 ld x18,0(x16) + 800042dc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x7ffffffffffffffe + 800042e0: 00083c83 ld x25,0(x16) + 800042e4: 00880813 addi x16,x16,8 + +00000000800042e8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + xnor x17, x18, x25 # perform operation + 800042e8: 419948b3 xnor x17,x18,x25 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042ec: 0005b203 ld x4,0(x11) + 800042f0: 01120c63 beq x4,x17,80004308 + 800042f4: 20d032ef jal x5,80007d00 + 800042f8: 800042e8 .word 0x800042e8 + 800042fc: 00000000 .word 0x00000000 + 80004300: 80014ef9 .word 0x80014ef9 + 80004304: 00000000 .word 0x00000000 + 80004308: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x00000000ffffffff + 8000430c: 00083c03 ld x24,0(x16) + 80004310: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xffffffffffffffff + 80004314: 00083d83 ld x27,0(x16) + 80004318: 00880813 addi x16,x16,8 + +000000008000431c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + xnor x21, x24, x27 # perform operation + 8000431c: 41bc4ab3 xnor x21,x24,x27 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004320: 0005b203 ld x4,0(x11) + 80004324: 01520c63 beq x4,x21,8000433c + 80004328: 1d9032ef jal x5,80007d00 + 8000432c: 8000431c .word 0x8000431c + 80004330: 00000000 .word 0x00000000 + 80004334: 80014f60 .word 0x80014f60 + 80004338: 00000000 .word 0x00000000 + 8000433c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x00000000ffffffff + 80004340: 00083c83 ld x25,0(x16) + 80004344: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xfffffffffffffffe + 80004348: 00083e03 ld x28,0(x16) + 8000434c: 00880813 addi x16,x16,8 + +0000000080004350 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + xnor x8, x25, x28 # perform operation + 80004350: 41ccc433 xnor x8,x25,x28 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004354: 0005b203 ld x4,0(x11) + 80004358: 00820c63 beq x4,x8,80004370 + 8000435c: 1a5032ef jal x5,80007d00 + 80004360: 80004350 .word 0x80004350 + 80004364: 00000000 .word 0x00000000 + 80004368: 80014fc7 .word 0x80014fc7 + 8000436c: 00000000 .word 0x00000000 + 80004370: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x00000000ffffffff + 80004374: 00083183 ld x3,0(x16) + 80004378: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 8000437c: 00083f03 ld x30,0(x16) + 80004380: 00880813 addi x16,x16,8 + +0000000080004384 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + xnor x7, x3, x30 # perform operation + 80004384: 41e1c3b3 xnor x7,x3,x30 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004388: 0005b203 ld x4,0(x11) + 8000438c: 00720c63 beq x4,x7,800043a4 + 80004390: 171032ef jal x5,80007d00 + 80004394: 80004384 .word 0x80004384 + 80004398: 00000000 .word 0x00000000 + 8000439c: 8001502e .word 0x8001502e + 800043a0: 00000000 .word 0x00000000 + 800043a4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x00000000ffffffff + 800043a8: 00083883 ld x17,0(x16) + 800043ac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 800043b0: 00083083 ld x1,0(x16) + 800043b4: 00880813 addi x16,x16,8 + +00000000800043b8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x13, x17, x1 # perform operation + 800043b8: 4018c6b3 xnor x13,x17,x1 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043bc: 0005b203 ld x4,0(x11) + 800043c0: 00d20c63 beq x4,x13,800043d8 + 800043c4: 13d032ef jal x5,80007d00 + 800043c8: 800043b8 .word 0x800043b8 + 800043cc: 00000000 .word 0x00000000 + 800043d0: 80015095 .word 0x80015095 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x00000000ffffffff + 800043dc: 00083d83 ld x27,0(x16) + 800043e0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x5555555555555555 + 800043e4: 00083683 ld x13,0(x16) + 800043e8: 00880813 addi x16,x16,8 + +00000000800043ec : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + xnor x20, x27, x13 # perform operation + 800043ec: 40ddca33 xnor x20,x27,x13 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f0: 0005b203 ld x4,0(x11) + 800043f4: 01420c63 beq x4,x20,8000440c + 800043f8: 109032ef jal x5,80007d00 + 800043fc: 800043ec .word 0x800043ec + 80004400: 00000000 .word 0x00000000 + 80004404: 800150fc .word 0x800150fc + 80004408: 00000000 .word 0x00000000 + 8000440c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x00000000ffffffff + 80004410: 00083083 ld x1,0(x16) + 80004414: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x00000000ffffffff + 80004418: 00083403 ld x8,0(x16) + 8000441c: 00880813 addi x16,x16,8 + +0000000080004420 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xnor x24, x1, x8 # perform operation + 80004420: 4080cc33 xnor x24,x1,x8 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004424: 0005b203 ld x4,0(x11) + 80004428: 01820c63 beq x4,x24,80004440 + 8000442c: 0d5032ef jal x5,80007d00 + 80004430: 80004420 .word 0x80004420 + 80004434: 00000000 .word 0x00000000 + 80004438: 80015163 .word 0x80015163 + 8000443c: 00000000 .word 0x00000000 + 80004440: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x00000000ffffffff + 80004444: 00083c83 ld x25,0(x16) + 80004448: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x00000000fffffffe + 8000444c: 00083483 ld x9,0(x16) + 80004450: 00880813 addi x16,x16,8 + +0000000080004454 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xnor x30, x25, x9 # perform operation + 80004454: 409ccf33 xnor x30,x25,x9 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004458: 0005b203 ld x4,0(x11) + 8000445c: 01e20c63 beq x4,x30,80004474 + 80004460: 0a1032ef jal x5,80007d00 + 80004464: 80004454 .word 0x80004454 + 80004468: 00000000 .word 0x00000000 + 8000446c: 800151c2 .word 0x800151c2 + 80004470: 00000000 .word 0x00000000 + 80004474: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x00000000ffffffff + 80004478: 00083183 ld x3,0(x16) + 8000447c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000100000000 + 80004480: 00083a03 ld x20,0(x16) + 80004484: 00880813 addi x16,x16,8 + +0000000080004488 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + xnor x23, x3, x20 # perform operation + 80004488: 4141cbb3 xnor x23,x3,x20 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 8000448c: 0005b203 ld x4,0(x11) + 80004490: 01720c63 beq x4,x23,800044a8 + 80004494: 06d032ef jal x5,80007d00 + 80004498: 80004488 .word 0x80004488 + 8000449c: 00000000 .word 0x00000000 + 800044a0: 80015221 .word 0x80015221 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x00000000ffffffff + 800044ac: 00083983 ld x19,0(x16) + 800044b0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x0000000100000001 + 800044b4: 00083103 ld x2,0(x16) + 800044b8: 00880813 addi x16,x16,8 + +00000000800044bc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + xnor x6, x19, x2 # perform operation + 800044bc: 4029c333 xnor x6,x19,x2 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c0: 0005b203 ld x4,0(x11) + 800044c4: 00620c63 beq x4,x6,800044dc + 800044c8: 039032ef jal x5,80007d00 + 800044cc: 800044bc .word 0x800044bc + 800044d0: 00000000 .word 0x00000000 + 800044d4: 80015281 .word 0x80015281 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x00000000fffffffe + 800044e0: 00083f03 ld x30,0(x16) + 800044e4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x0000000000000000 + 800044e8: 00083503 ld x10,0(x16) + 800044ec: 00880813 addi x16,x16,8 + +00000000800044f0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xnor x23, x30, x10 # perform operation + 800044f0: 40af4bb3 xnor x23,x30,x10 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f4: 0005b203 ld x4,0(x11) + 800044f8: 01720c63 beq x4,x23,80004510 + 800044fc: 005032ef jal x5,80007d00 + 80004500: 800044f0 .word 0x800044f0 + 80004504: 00000000 .word 0x00000000 + 80004508: 800152e1 .word 0x800152e1 + 8000450c: 00000000 .word 0x00000000 + 80004510: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x00000000fffffffe + 80004514: 00083083 ld x1,0(x16) + 80004518: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x0000000000000001 + 8000451c: 00083a03 ld x20,0(x16) + 80004520: 00880813 addi x16,x16,8 + +0000000080004524 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xnor x8, x1, x20 # perform operation + 80004524: 4140c433 xnor x8,x1,x20 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004528: 0005b203 ld x4,0(x11) + 8000452c: 00820c63 beq x4,x8,80004544 + 80004530: 7d0032ef jal x5,80007d00 + 80004534: 80004524 .word 0x80004524 + 80004538: 00000000 .word 0x00000000 + 8000453c: 80015339 .word 0x80015339 + 80004540: 00000000 .word 0x00000000 + 80004544: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x00000000fffffffe + 80004548: 00083603 ld x12,0(x16) + 8000454c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000000000002 + 80004550: 00083403 ld x8,0(x16) + 80004554: 00880813 addi x16,x16,8 + +0000000080004558 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xnor x2, x12, x8 # perform operation + 80004558: 40864133 xnor x2,x12,x8 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 8000455c: 0005b203 ld x4,0(x11) + 80004560: 00220c63 beq x4,x2,80004578 + 80004564: 79c032ef jal x5,80007d00 + 80004568: 80004558 .word 0x80004558 + 8000456c: 00000000 .word 0x00000000 + 80004570: 80015391 .word 0x80015391 + 80004574: 00000000 .word 0x00000000 + 80004578: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x00000000fffffffe + 8000457c: 00083783 ld x15,0(x16) + 80004580: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x8000000000000000 + 80004584: 00083c03 ld x24,0(x16) + 80004588: 00880813 addi x16,x16,8 + +000000008000458c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + xnor x19, x15, x24 # perform operation + 8000458c: 4187c9b3 xnor x19,x15,x24 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004590: 0005b203 ld x4,0(x11) + 80004594: 01320c63 beq x4,x19,800045ac + 80004598: 768032ef jal x5,80007d00 + 8000459c: 8000458c .word 0x8000458c + 800045a0: 00000000 .word 0x00000000 + 800045a4: 800153e9 .word 0x800153e9 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x00000000fffffffe + 800045b0: 00083683 ld x13,0(x16) + 800045b4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x8000000000000001 + 800045b8: 00083403 ld x8,0(x16) + 800045bc: 00880813 addi x16,x16,8 + +00000000800045c0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + xnor x22, x13, x8 # perform operation + 800045c0: 4086cb33 xnor x22,x13,x8 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c4: 0005b203 ld x4,0(x11) + 800045c8: 01620c63 beq x4,x22,800045e0 + 800045cc: 734032ef jal x5,80007d00 + 800045d0: 800045c0 .word 0x800045c0 + 800045d4: 00000000 .word 0x00000000 + 800045d8: 80015450 .word 0x80015450 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x00000000fffffffe + 800045e4: 00083b03 ld x22,0(x16) + 800045e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x7fffffffffffffff + 800045ec: 00083b83 ld x23,0(x16) + 800045f0: 00880813 addi x16,x16,8 + +00000000800045f4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + xnor x21, x22, x23 # perform operation + 800045f4: 417b4ab3 xnor x21,x22,x23 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f8: 0005b203 ld x4,0(x11) + 800045fc: 01520c63 beq x4,x21,80004614 + 80004600: 700032ef jal x5,80007d00 + 80004604: 800045f4 .word 0x800045f4 + 80004608: 00000000 .word 0x00000000 + 8000460c: 800154b7 .word 0x800154b7 + 80004610: 00000000 .word 0x00000000 + 80004614: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x00000000fffffffe + 80004618: 00083503 ld x10,0(x16) + 8000461c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80004620: 00083e83 ld x29,0(x16) + 80004624: 00880813 addi x16,x16,8 + +0000000080004628 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + xnor x2, x10, x29 # perform operation + 80004628: 41d54133 xnor x2,x10,x29 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 8000462c: 0005b203 ld x4,0(x11) + 80004630: 00220c63 beq x4,x2,80004648 + 80004634: 6cc032ef jal x5,80007d00 + 80004638: 80004628 .word 0x80004628 + 8000463c: 00000000 .word 0x00000000 + 80004640: 8001551e .word 0x8001551e + 80004644: 00000000 .word 0x00000000 + 80004648: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x00000000fffffffe + 8000464c: 00083683 ld x13,0(x16) + 80004650: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0xffffffffffffffff + 80004654: 00083383 ld x7,0(x16) + 80004658: 00880813 addi x16,x16,8 + +000000008000465c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + xnor x17, x13, x7 # perform operation + 8000465c: 4076c8b3 xnor x17,x13,x7 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004660: 0005b203 ld x4,0(x11) + 80004664: 01120c63 beq x4,x17,8000467c + 80004668: 698032ef jal x5,80007d00 + 8000466c: 8000465c .word 0x8000465c + 80004670: 00000000 .word 0x00000000 + 80004674: 80015585 .word 0x80015585 + 80004678: 00000000 .word 0x00000000 + 8000467c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x00000000fffffffe + 80004680: 00083303 ld x6,0(x16) + 80004684: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xfffffffffffffffe + 80004688: 00083b83 ld x23,0(x16) + 8000468c: 00880813 addi x16,x16,8 + +0000000080004690 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + xnor x19, x6, x23 # perform operation + 80004690: 417349b3 xnor x19,x6,x23 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004694: 0005b203 ld x4,0(x11) + 80004698: 01320c63 beq x4,x19,800046b0 + 8000469c: 664032ef jal x5,80007d00 + 800046a0: 80004690 .word 0x80004690 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 800155ec .word 0x800155ec + 800046ac: 00000000 .word 0x00000000 + 800046b0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x00000000fffffffe + 800046b4: 00083f83 ld x31,0(x16) + 800046b8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 800046bc: 00083a83 ld x21,0(x16) + 800046c0: 00880813 addi x16,x16,8 + +00000000800046c4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + xnor x7, x31, x21 # perform operation + 800046c4: 415fc3b3 xnor x7,x31,x21 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c8: 0005b203 ld x4,0(x11) + 800046cc: 00720c63 beq x4,x7,800046e4 + 800046d0: 630032ef jal x5,80007d00 + 800046d4: 800046c4 .word 0x800046c4 + 800046d8: 00000000 .word 0x00000000 + 800046dc: 80015653 .word 0x80015653 + 800046e0: 00000000 .word 0x00000000 + 800046e4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x00000000fffffffe + 800046e8: 00083c83 ld x25,0(x16) + 800046ec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 800046f0: 00083503 ld x10,0(x16) + 800046f4: 00880813 addi x16,x16,8 + +00000000800046f8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x12, x25, x10 # perform operation + 800046f8: 40acc633 xnor x12,x25,x10 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046fc: 0005b203 ld x4,0(x11) + 80004700: 00c20c63 beq x4,x12,80004718 + 80004704: 5fc032ef jal x5,80007d00 + 80004708: 800046f8 .word 0x800046f8 + 8000470c: 00000000 .word 0x00000000 + 80004710: 800156ba .word 0x800156ba + 80004714: 00000000 .word 0x00000000 + 80004718: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x00000000fffffffe + 8000471c: 00083103 ld x2,0(x16) + 80004720: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x5555555555555555 + 80004724: 00083e03 ld x28,0(x16) + 80004728: 00880813 addi x16,x16,8 + +000000008000472c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + xnor x8, x2, x28 # perform operation + 8000472c: 41c14433 xnor x8,x2,x28 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004730: 0005b203 ld x4,0(x11) + 80004734: 00820c63 beq x4,x8,8000474c + 80004738: 5c8032ef jal x5,80007d00 + 8000473c: 8000472c .word 0x8000472c + 80004740: 00000000 .word 0x00000000 + 80004744: 80015721 .word 0x80015721 + 80004748: 00000000 .word 0x00000000 + 8000474c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x00000000fffffffe + 80004750: 00083f03 ld x30,0(x16) + 80004754: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x00000000ffffffff + 80004758: 00083603 ld x12,0(x16) + 8000475c: 00880813 addi x16,x16,8 + +0000000080004760 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xnor x1, x30, x12 # perform operation + 80004760: 40cf40b3 xnor x1,x30,x12 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004764: 0005b203 ld x4,0(x11) + 80004768: 00120c63 beq x4,x1,80004780 + 8000476c: 594032ef jal x5,80007d00 + 80004770: 80004760 .word 0x80004760 + 80004774: 00000000 .word 0x00000000 + 80004778: 80015788 .word 0x80015788 + 8000477c: 00000000 .word 0x00000000 + 80004780: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x00000000fffffffe + 80004784: 00083783 ld x15,0(x16) + 80004788: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x00000000fffffffe + 8000478c: 00083a03 ld x20,0(x16) + 80004790: 00880813 addi x16,x16,8 + +0000000080004794 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xnor x8, x15, x20 # perform operation + 80004794: 4147c433 xnor x8,x15,x20 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004798: 0005b203 ld x4,0(x11) + 8000479c: 00820c63 beq x4,x8,800047b4 + 800047a0: 560032ef jal x5,80007d00 + 800047a4: 80004794 .word 0x80004794 + 800047a8: 00000000 .word 0x00000000 + 800047ac: 800157e7 .word 0x800157e7 + 800047b0: 00000000 .word 0x00000000 + 800047b4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x00000000fffffffe + 800047b8: 00083703 ld x14,0(x16) + 800047bc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x0000000100000000 + 800047c0: 00083383 ld x7,0(x16) + 800047c4: 00880813 addi x16,x16,8 + +00000000800047c8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + xnor x17, x14, x7 # perform operation + 800047c8: 407748b3 xnor x17,x14,x7 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047cc: 0005b203 ld x4,0(x11) + 800047d0: 01120c63 beq x4,x17,800047e8 + 800047d4: 52c032ef jal x5,80007d00 + 800047d8: 800047c8 .word 0x800047c8 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 80015846 .word 0x80015846 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x00000000fffffffe + 800047ec: 00083083 ld x1,0(x16) + 800047f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x0000000100000001 + 800047f4: 00083f03 ld x30,0(x16) + 800047f8: 00880813 addi x16,x16,8 + +00000000800047fc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + xnor x7, x1, x30 # perform operation + 800047fc: 41e0c3b3 xnor x7,x1,x30 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004800: 0005b203 ld x4,0(x11) + 80004804: 00720c63 beq x4,x7,8000481c + 80004808: 4f8032ef jal x5,80007d00 + 8000480c: 800047fc .word 0x800047fc + 80004810: 00000000 .word 0x00000000 + 80004814: 800158a6 .word 0x800158a6 + 80004818: 00000000 .word 0x00000000 + 8000481c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x0000000100000000 + 80004820: 00083503 ld x10,0(x16) + 80004824: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x0000000000000000 + 80004828: 00083f03 ld x30,0(x16) + 8000482c: 00880813 addi x16,x16,8 + +0000000080004830 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + xnor x2, x10, x30 # perform operation + 80004830: 41e54133 xnor x2,x10,x30 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004834: 0005b203 ld x4,0(x11) + 80004838: 00220c63 beq x4,x2,80004850 + 8000483c: 4c4032ef jal x5,80007d00 + 80004840: 80004830 .word 0x80004830 + 80004844: 00000000 .word 0x00000000 + 80004848: 80015906 .word 0x80015906 + 8000484c: 00000000 .word 0x00000000 + 80004850: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x0000000100000000 + 80004854: 00083f83 ld x31,0(x16) + 80004858: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x0000000000000001 + 8000485c: 00083683 ld x13,0(x16) + 80004860: 00880813 addi x16,x16,8 + +0000000080004864 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + xnor x30, x31, x13 # perform operation + 80004864: 40dfcf33 xnor x30,x31,x13 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004868: 0005b203 ld x4,0(x11) + 8000486c: 01e20c63 beq x4,x30,80004884 + 80004870: 490032ef jal x5,80007d00 + 80004874: 80004864 .word 0x80004864 + 80004878: 00000000 .word 0x00000000 + 8000487c: 8001595f .word 0x8001595f + 80004880: 00000000 .word 0x00000000 + 80004884: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0000000100000000 + 80004888: 00083403 ld x8,0(x16) + 8000488c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x0000000000000002 + 80004890: 00083c83 ld x25,0(x16) + 80004894: 00880813 addi x16,x16,8 + +0000000080004898 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + xnor x9, x8, x25 # perform operation + 80004898: 419444b3 xnor x9,x8,x25 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 8000489c: 0005b203 ld x4,0(x11) + 800048a0: 00920c63 beq x4,x9,800048b8 + 800048a4: 45c032ef jal x5,80007d00 + 800048a8: 80004898 .word 0x80004898 + 800048ac: 00000000 .word 0x00000000 + 800048b0: 800159b8 .word 0x800159b8 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0000000100000000 + 800048bc: 00083a83 ld x21,0(x16) + 800048c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x8000000000000000 + 800048c4: 00083a03 ld x20,0(x16) + 800048c8: 00880813 addi x16,x16,8 + +00000000800048cc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + xnor x13, x21, x20 # perform operation + 800048cc: 414ac6b3 xnor x13,x21,x20 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d0: 0005b203 ld x4,0(x11) + 800048d4: 00d20c63 beq x4,x13,800048ec + 800048d8: 428032ef jal x5,80007d00 + 800048dc: 800048cc .word 0x800048cc + 800048e0: 00000000 .word 0x00000000 + 800048e4: 80015a11 .word 0x80015a11 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x0000000100000000 + 800048f0: 00083c03 ld x24,0(x16) + 800048f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x8000000000000001 + 800048f8: 00083a03 ld x20,0(x16) + 800048fc: 00880813 addi x16,x16,8 + +0000000080004900 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + xnor x13, x24, x20 # perform operation + 80004900: 414c46b3 xnor x13,x24,x20 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004904: 0005b203 ld x4,0(x11) + 80004908: 00d20c63 beq x4,x13,80004920 + 8000490c: 3f4032ef jal x5,80007d00 + 80004910: 80004900 .word 0x80004900 + 80004914: 00000000 .word 0x00000000 + 80004918: 80015a79 .word 0x80015a79 + 8000491c: 00000000 .word 0x00000000 + 80004920: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x0000000100000000 + 80004924: 00083503 ld x10,0(x16) + 80004928: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x7fffffffffffffff + 8000492c: 00083e83 ld x29,0(x16) + 80004930: 00880813 addi x16,x16,8 + +0000000080004934 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + xnor x7, x10, x29 # perform operation + 80004934: 41d543b3 xnor x7,x10,x29 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004938: 0005b203 ld x4,0(x11) + 8000493c: 00720c63 beq x4,x7,80004954 + 80004940: 3c0032ef jal x5,80007d00 + 80004944: 80004934 .word 0x80004934 + 80004948: 00000000 .word 0x00000000 + 8000494c: 80015ae1 .word 0x80015ae1 + 80004950: 00000000 .word 0x00000000 + 80004954: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x0000000100000000 + 80004958: 00083183 ld x3,0(x16) + 8000495c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80004960: 00083983 ld x19,0(x16) + 80004964: 00880813 addi x16,x16,8 + +0000000080004968 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + xnor x29, x3, x19 # perform operation + 80004968: 4131ceb3 xnor x29,x3,x19 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 8000496c: 0005b203 ld x4,0(x11) + 80004970: 01d20c63 beq x4,x29,80004988 + 80004974: 38c032ef jal x5,80007d00 + 80004978: 80004968 .word 0x80004968 + 8000497c: 00000000 .word 0x00000000 + 80004980: 80015b49 .word 0x80015b49 + 80004984: 00000000 .word 0x00000000 + 80004988: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0000000100000000 + 8000498c: 00083a83 ld x21,0(x16) + 80004990: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xffffffffffffffff + 80004994: 00083903 ld x18,0(x16) + 80004998: 00880813 addi x16,x16,8 + +000000008000499c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + xnor x13, x21, x18 # perform operation + 8000499c: 412ac6b3 xnor x13,x21,x18 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a0: 0005b203 ld x4,0(x11) + 800049a4: 00d20c63 beq x4,x13,800049bc + 800049a8: 358032ef jal x5,80007d00 + 800049ac: 8000499c .word 0x8000499c + 800049b0: 00000000 .word 0x00000000 + 800049b4: 80015bb1 .word 0x80015bb1 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x0000000100000000 + 800049c0: 00083103 ld x2,0(x16) + 800049c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xfffffffffffffffe + 800049c8: 00083e83 ld x29,0(x16) + 800049cc: 00880813 addi x16,x16,8 + +00000000800049d0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + xnor x17, x2, x29 # perform operation + 800049d0: 41d148b3 xnor x17,x2,x29 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d4: 0005b203 ld x4,0(x11) + 800049d8: 01120c63 beq x4,x17,800049f0 + 800049dc: 324032ef jal x5,80007d00 + 800049e0: 800049d0 .word 0x800049d0 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 80015c19 .word 0x80015c19 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x0000000100000000 + 800049f4: 00083083 ld x1,0(x16) + 800049f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 800049fc: 00083f03 ld x30,0(x16) + 80004a00: 00880813 addi x16,x16,8 + +0000000080004a04 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + xnor x3, x1, x30 # perform operation + 80004a04: 41e0c1b3 xnor x3,x1,x30 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a08: 0005b203 ld x4,0(x11) + 80004a0c: 00320c63 beq x4,x3,80004a24 + 80004a10: 2f0032ef jal x5,80007d00 + 80004a14: 80004a04 .word 0x80004a04 + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 80015c81 .word 0x80015c81 + 80004a20: 00000000 .word 0x00000000 + 80004a24: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x0000000100000000 + 80004a28: 00083083 ld x1,0(x16) + 80004a2c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80004a30: 00083683 ld x13,0(x16) + 80004a34: 00880813 addi x16,x16,8 + +0000000080004a38 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x7, x1, x13 # perform operation + 80004a38: 40d0c3b3 xnor x7,x1,x13 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a3c: 0005b203 ld x4,0(x11) + 80004a40: 00720c63 beq x4,x7,80004a58 + 80004a44: 2bc032ef jal x5,80007d00 + 80004a48: 80004a38 .word 0x80004a38 + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 80015ce9 .word 0x80015ce9 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x0000000100000000 + 80004a5c: 00083a03 ld x20,0(x16) + 80004a60: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x5555555555555555 + 80004a64: 00083383 ld x7,0(x16) + 80004a68: 00880813 addi x16,x16,8 + +0000000080004a6c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + xnor x1, x20, x7 # perform operation + 80004a6c: 407a40b3 xnor x1,x20,x7 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a70: 0005b203 ld x4,0(x11) + 80004a74: 00120c63 beq x4,x1,80004a8c + 80004a78: 288032ef jal x5,80007d00 + 80004a7c: 80004a6c .word 0x80004a6c + 80004a80: 00000000 .word 0x00000000 + 80004a84: 80015d51 .word 0x80015d51 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x0000000100000000 + 80004a90: 00083d83 ld x27,0(x16) + 80004a94: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x00000000ffffffff + 80004a98: 00083f03 ld x30,0(x16) + 80004a9c: 00880813 addi x16,x16,8 + +0000000080004aa0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + xnor x21, x27, x30 # perform operation + 80004aa0: 41edcab3 xnor x21,x27,x30 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa4: 0005b203 ld x4,0(x11) + 80004aa8: 01520c63 beq x4,x21,80004ac0 + 80004aac: 254032ef jal x5,80007d00 + 80004ab0: 80004aa0 .word 0x80004aa0 + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 80015db9 .word 0x80015db9 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0000000100000000 + 80004ac4: 00083403 ld x8,0(x16) + 80004ac8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x00000000fffffffe + 80004acc: 00083303 ld x6,0(x16) + 80004ad0: 00880813 addi x16,x16,8 + +0000000080004ad4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + xnor x18, x8, x6 # perform operation + 80004ad4: 40644933 xnor x18,x8,x6 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad8: 0005b203 ld x4,0(x11) + 80004adc: 01220c63 beq x4,x18,80004af4 + 80004ae0: 220032ef jal x5,80007d00 + 80004ae4: 80004ad4 .word 0x80004ad4 + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 80015e19 .word 0x80015e19 + 80004af0: 00000000 .word 0x00000000 + 80004af4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x0000000100000000 + 80004af8: 00083a03 ld x20,0(x16) + 80004afc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x0000000100000000 + 80004b00: 00083103 ld x2,0(x16) + 80004b04: 00880813 addi x16,x16,8 + +0000000080004b08 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + xnor x9, x20, x2 # perform operation + 80004b08: 402a44b3 xnor x9,x20,x2 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b0c: 0005b203 ld x4,0(x11) + 80004b10: 00920c63 beq x4,x9,80004b28 + 80004b14: 1ec032ef jal x5,80007d00 + 80004b18: 80004b08 .word 0x80004b08 + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 80015e79 .word 0x80015e79 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x0000000100000000 + 80004b2c: 00083783 ld x15,0(x16) + 80004b30: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x0000000100000001 + 80004b34: 00083b83 ld x23,0(x16) + 80004b38: 00880813 addi x16,x16,8 + +0000000080004b3c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + xnor x26, x15, x23 # perform operation + 80004b3c: 4177cd33 xnor x26,x15,x23 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b40: 0005b203 ld x4,0(x11) + 80004b44: 01a20c63 beq x4,x26,80004b5c + 80004b48: 1b8032ef jal x5,80007d00 + 80004b4c: 80004b3c .word 0x80004b3c + 80004b50: 00000000 .word 0x00000000 + 80004b54: 80015eda .word 0x80015eda + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x0000000100000001 + 80004b60: 00083e83 ld x29,0(x16) + 80004b64: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x0000000000000000 + 80004b68: 00083c83 ld x25,0(x16) + 80004b6c: 00880813 addi x16,x16,8 + +0000000080004b70 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + xnor x13, x29, x25 # perform operation + 80004b70: 419ec6b3 xnor x13,x29,x25 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b74: 0005b203 ld x4,0(x11) + 80004b78: 00d20c63 beq x4,x13,80004b90 + 80004b7c: 184032ef jal x5,80007d00 + 80004b80: 80004b70 .word 0x80004b70 + 80004b84: 00000000 .word 0x00000000 + 80004b88: 80015f3b .word 0x80015f3b + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x0000000100000001 + 80004b94: 00083103 ld x2,0(x16) + 80004b98: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x0000000000000001 + 80004b9c: 00083403 ld x8,0(x16) + 80004ba0: 00880813 addi x16,x16,8 + +0000000080004ba4 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + xnor x20, x2, x8 # perform operation + 80004ba4: 40814a33 xnor x20,x2,x8 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba8: 0005b203 ld x4,0(x11) + 80004bac: 01420c63 beq x4,x20,80004bc4 + 80004bb0: 150032ef jal x5,80007d00 + 80004bb4: 80004ba4 .word 0x80004ba4 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 80015f94 .word 0x80015f94 + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0x0000000100000001 + 80004bc8: 00083b03 ld x22,0(x16) + 80004bcc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x0000000000000002 + 80004bd0: 00083383 ld x7,0(x16) + 80004bd4: 00880813 addi x16,x16,8 + +0000000080004bd8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + xnor x2, x22, x7 # perform operation + 80004bd8: 407b4133 xnor x2,x22,x7 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bdc: 0005b203 ld x4,0(x11) + 80004be0: 00220c63 beq x4,x2,80004bf8 + 80004be4: 11c032ef jal x5,80007d00 + 80004be8: 80004bd8 .word 0x80004bd8 + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 80015fed .word 0x80015fed + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x0000000100000001 + 80004bfc: 00083603 ld x12,0(x16) + 80004c00: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x8000000000000000 + 80004c04: 00083403 ld x8,0(x16) + 80004c08: 00880813 addi x16,x16,8 + +0000000080004c0c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + xnor x15, x12, x8 # perform operation + 80004c0c: 408647b3 xnor x15,x12,x8 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c10: 0005b203 ld x4,0(x11) + 80004c14: 00f20c63 beq x4,x15,80004c2c + 80004c18: 0e8032ef jal x5,80007d00 + 80004c1c: 80004c0c .word 0x80004c0c + 80004c20: 00000000 .word 0x00000000 + 80004c24: 80016046 .word 0x80016046 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x0000000100000001 + 80004c30: 00083903 ld x18,0(x16) + 80004c34: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x8000000000000001 + 80004c38: 00083a03 ld x20,0(x16) + 80004c3c: 00880813 addi x16,x16,8 + +0000000080004c40 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + xnor x2, x18, x20 # perform operation + 80004c40: 41494133 xnor x2,x18,x20 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c44: 0005b203 ld x4,0(x11) + 80004c48: 00220c63 beq x4,x2,80004c60 + 80004c4c: 0b4032ef jal x5,80007d00 + 80004c50: 80004c40 .word 0x80004c40 + 80004c54: 00000000 .word 0x00000000 + 80004c58: 800160ae .word 0x800160ae + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x0000000100000001 + 80004c64: 00083f83 ld x31,0(x16) + 80004c68: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x7fffffffffffffff + 80004c6c: 00083a83 ld x21,0(x16) + 80004c70: 00880813 addi x16,x16,8 + +0000000080004c74 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + xnor x15, x31, x21 # perform operation + 80004c74: 415fc7b3 xnor x15,x31,x21 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c78: 0005b203 ld x4,0(x11) + 80004c7c: 00f20c63 beq x4,x15,80004c94 + 80004c80: 080032ef jal x5,80007d00 + 80004c84: 80004c74 .word 0x80004c74 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 80016116 .word 0x80016116 + 80004c90: 00000000 .word 0x00000000 + 80004c94: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x0000000100000001 + 80004c98: 00083783 ld x15,0(x16) + 80004c9c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x7ffffffffffffffe + 80004ca0: 00083383 ld x7,0(x16) + 80004ca4: 00880813 addi x16,x16,8 + +0000000080004ca8 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + xnor x8, x15, x7 # perform operation + 80004ca8: 4077c433 xnor x8,x15,x7 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cac: 0005b203 ld x4,0(x11) + 80004cb0: 00820c63 beq x4,x8,80004cc8 + 80004cb4: 04c032ef jal x5,80007d00 + 80004cb8: 80004ca8 .word 0x80004ca8 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 8001617e .word 0x8001617e + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x0000000100000001 + 80004ccc: 00083603 ld x12,0(x16) + 80004cd0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xffffffffffffffff + 80004cd4: 00083b83 ld x23,0(x16) + 80004cd8: 00880813 addi x16,x16,8 + +0000000080004cdc : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + xnor x18, x12, x23 # perform operation + 80004cdc: 41764933 xnor x18,x12,x23 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce0: 0005b203 ld x4,0(x11) + 80004ce4: 01220c63 beq x4,x18,80004cfc + 80004ce8: 018032ef jal x5,80007d00 + 80004cec: 80004cdc .word 0x80004cdc + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 800161e6 .word 0x800161e6 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000100000001 + 80004d00: 00083f03 ld x30,0(x16) + 80004d04: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0xfffffffffffffffe + 80004d08: 00083903 ld x18,0(x16) + 80004d0c: 00880813 addi x16,x16,8 + +0000000080004d10 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + xnor x7, x30, x18 # perform operation + 80004d10: 412f43b3 xnor x7,x30,x18 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d14: 0005b203 ld x4,0(x11) + 80004d18: 00720c63 beq x4,x7,80004d30 + 80004d1c: 7e5022ef jal x5,80007d00 + 80004d20: 80004d10 .word 0x80004d10 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 8001624e .word 0x8001624e + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x0000000100000001 + 80004d34: 00083083 ld x1,0(x16) + 80004d38: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80004d3c: 00083f83 ld x31,0(x16) + 80004d40: 00880813 addi x16,x16,8 + +0000000080004d44 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + xnor x26, x1, x31 # perform operation + 80004d44: 41f0cd33 xnor x26,x1,x31 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d48: 0005b203 ld x4,0(x11) + 80004d4c: 01a20c63 beq x4,x26,80004d64 + 80004d50: 7b1022ef jal x5,80007d00 + 80004d54: 80004d44 .word 0x80004d44 + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 800162b6 .word 0x800162b6 + 80004d60: 00000000 .word 0x00000000 + 80004d64: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x0000000100000001 + 80004d68: 00083d83 ld x27,0(x16) + 80004d6c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xaaaaaaaaaaaaaaaa + 80004d70: 00083b83 ld x23,0(x16) + 80004d74: 00880813 addi x16,x16,8 + +0000000080004d78 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + xnor x26, x27, x23 # perform operation + 80004d78: 417dcd33 xnor x26,x27,x23 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d7c: 0005b203 ld x4,0(x11) + 80004d80: 01a20c63 beq x4,x26,80004d98 + 80004d84: 77d022ef jal x5,80007d00 + 80004d88: 80004d78 .word 0x80004d78 + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 8001631e .word 0x8001631e + 80004d94: 00000000 .word 0x00000000 + 80004d98: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x0000000100000001 + 80004d9c: 00083e03 ld x28,0(x16) + 80004da0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x5555555555555555 + 80004da4: 00083a83 ld x21,0(x16) + 80004da8: 00880813 addi x16,x16,8 + +0000000080004dac : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + xnor x19, x28, x21 # perform operation + 80004dac: 415e49b3 xnor x19,x28,x21 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db0: 0005b203 ld x4,0(x11) + 80004db4: 01320c63 beq x4,x19,80004dcc + 80004db8: 749022ef jal x5,80007d00 + 80004dbc: 80004dac .word 0x80004dac + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 80016386 .word 0x80016386 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x0000000100000001 + 80004dd0: 00083b83 ld x23,0(x16) + 80004dd4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x00000000ffffffff + 80004dd8: 00083983 ld x19,0(x16) + 80004ddc: 00880813 addi x16,x16,8 + +0000000080004de0 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + xnor x22, x23, x19 # perform operation + 80004de0: 413bcb33 xnor x22,x23,x19 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de4: 0005b203 ld x4,0(x11) + 80004de8: 01620c63 beq x4,x22,80004e00 + 80004dec: 715022ef jal x5,80007d00 + 80004df0: 80004de0 .word 0x80004de0 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 800163ee .word 0x800163ee + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x0000000100000001 + 80004e04: 00083983 ld x19,0(x16) + 80004e08: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x00000000fffffffe + 80004e0c: 00083703 ld x14,0(x16) + 80004e10: 00880813 addi x16,x16,8 + +0000000080004e14 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + xnor x28, x19, x14 # perform operation + 80004e14: 40e9ce33 xnor x28,x19,x14 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e18: 0005b203 ld x4,0(x11) + 80004e1c: 01c20c63 beq x4,x28,80004e34 + 80004e20: 6e1022ef jal x5,80007d00 + 80004e24: 80004e14 .word 0x80004e14 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 8001644e .word 0x8001644e + 80004e30: 00000000 .word 0x00000000 + 80004e34: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0000000100000001 + 80004e38: 00083a83 ld x21,0(x16) + 80004e3c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x0000000100000000 + 80004e40: 00083b03 ld x22,0(x16) + 80004e44: 00880813 addi x16,x16,8 + +0000000080004e48 : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + xnor x14, x21, x22 # perform operation + 80004e48: 416ac733 xnor x14,x21,x22 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e4c: 0005b203 ld x4,0(x11) + 80004e50: 00e20c63 beq x4,x14,80004e68 + 80004e54: 6ad022ef jal x5,80007d00 + 80004e58: 80004e48 .word 0x80004e48 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 800164ae .word 0x800164ae + 80004e64: 00000000 .word 0x00000000 + 80004e68: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x0000000100000001 + 80004e6c: 00083603 ld x12,0(x16) + 80004e70: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x0000000100000001 + 80004e74: 00083c03 ld x24,0(x16) + 80004e78: 00880813 addi x16,x16,8 + +0000000080004e7c : +Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + xnor x6, x12, x24 # perform operation + 80004e7c: 41864333 xnor x6,x12,x24 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkb_xnor_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e80: 0005b203 ld x4,0(x11) + 80004e84: 00620c63 beq x4,x6,80004e9c + 80004e88: 679022ef jal x5,80007d00 + 80004e8c: 80004e7c .word 0x80004e7c + 80004e90: 00000000 .word 0x00000000 + 80004e94: 8001650f .word 0x8001650f + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0xa760b33cede2d3d4 + 80004ea0: 00083003 ld x0,0(x16) + 80004ea4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x057ff315c51ed256 + 80004ea8: 00083003 ld x0,0(x16) + 80004eac: 00880813 addi x16,x16,8 + +0000000080004eb0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b0: + xnor x9, x0, x0 # perform operation + 80004eb0: 400044b3 xnor x9,x0,x0 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkb_xnor_cg_cmp_rs1_rs2_b0, Zbkb_xnor_cg_cmp_rs1_rs2_b0_str) + 80004eb4: 0005b203 ld x4,0(x11) + 80004eb8: 00920c63 beq x4,x9,80004ed0 + 80004ebc: 645022ef jal x5,80007d00 + 80004ec0: 80004eb0 .word 0x80004eb0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 80016570 .word 0x80016570 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x9244933959b18549 + 80004ed4: 00083083 ld x1,0(x16) + 80004ed8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xad6a690bb09680e9 + 80004edc: 00083083 ld x1,0(x16) + 80004ee0: 00880813 addi x16,x16,8 + +0000000080004ee4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b1: + xnor x6, x1, x1 # perform operation + 80004ee4: 4010c333 xnor x6,x1,x1 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cmp_rs1_rs2_b1, Zbkb_xnor_cg_cmp_rs1_rs2_b1_str) + 80004ee8: 0005b203 ld x4,0(x11) + 80004eec: 00620c63 beq x4,x6,80004f04 + 80004ef0: 611022ef jal x5,80007d00 + 80004ef4: 80004ee4 .word 0x80004ee4 + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 800165a8 .word 0x800165a8 + 80004f00: 00000000 .word 0x00000000 + 80004f04: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x43b2dee7a65022b0 + 80004f08: 00083103 ld x2,0(x16) + 80004f0c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x39dc7a233c7d71de + 80004f10: 00083103 ld x2,0(x16) + 80004f14: 00880813 addi x16,x16,8 + +0000000080004f18 : +Zbkb_xnor_cg_cmp_rs1_rs2_b2: + xnor x31, x2, x2 # perform operation + 80004f18: 40214fb3 xnor x31,x2,x2 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkb_xnor_cg_cmp_rs1_rs2_b2, Zbkb_xnor_cg_cmp_rs1_rs2_b2_str) + 80004f1c: 0005b203 ld x4,0(x11) + 80004f20: 01f20c63 beq x4,x31,80004f38 + 80004f24: 5dd022ef jal x5,80007d00 + 80004f28: 80004f18 .word 0x80004f18 + 80004f2c: 00000000 .word 0x00000000 + 80004f30: 800165e0 .word 0x800165e0 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x865254108e84a4e4 + 80004f3c: 00083183 ld x3,0(x16) + 80004f40: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xc02b9ab675290f4d + 80004f44: 00083183 ld x3,0(x16) + 80004f48: 00880813 addi x16,x16,8 + +0000000080004f4c : +Zbkb_xnor_cg_cmp_rs1_rs2_b3: + xnor x6, x3, x3 # perform operation + 80004f4c: 4031c333 xnor x6,x3,x3 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkb_xnor_cg_cmp_rs1_rs2_b3, Zbkb_xnor_cg_cmp_rs1_rs2_b3_str) + 80004f50: 0005b203 ld x4,0(x11) + 80004f54: 00620c63 beq x4,x6,80004f6c + 80004f58: 5a9022ef jal x5,80007d00 + 80004f5c: 80004f4c .word 0x80004f4c + 80004f60: 00000000 .word 0x00000000 + 80004f64: 80016618 .word 0x80016618 + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 00858593 addi x11,x11,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80004f70: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80004f74: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xb8b4868dca87f18e + 80004f78: 00083203 ld x4,0(x16) + 80004f7c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x68e7cc58e247b0a1 + 80004f80: 00083203 ld x4,0(x16) + 80004f84: 00880813 addi x16,x16,8 + +0000000080004f88 : +Zbkb_xnor_cg_cmp_rs1_rs2_b4: + xnor x2, x4, x4 # perform operation + 80004f88: 40424133 xnor x2,x4,x4 + # Check if x2 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x2, Zbkb_xnor_cg_cmp_rs1_rs2_b4, Zbkb_xnor_cg_cmp_rs1_rs2_b4_str) + 80004f8c: 0005b683 ld x13,0(x11) + 80004f90: 00268c63 beq x13,x2,80004fa8 + 80004f94: 5ad0276f jal x14,80007d40 + 80004f98: 80004f88 .word 0x80004f88 + 80004f9c: 00000000 .word 0x00000000 + 80004fa0: 80016650 .word 0x80016650 + 80004fa4: 00000000 .word 0x00000000 + 80004fa8: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x9ef3bdf6c35cd0ef + 80004fac: 00083283 ld x5,0(x16) + 80004fb0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0x3b55d036535dd23f + 80004fb4: 00083283 ld x5,0(x16) + 80004fb8: 00880813 addi x16,x16,8 + +0000000080004fbc : +Zbkb_xnor_cg_cmp_rs1_rs2_b5: + xnor x30, x5, x5 # perform operation + 80004fbc: 4052cf33 xnor x30,x5,x5 + # Check if x30 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x30, Zbkb_xnor_cg_cmp_rs1_rs2_b5, Zbkb_xnor_cg_cmp_rs1_rs2_b5_str) + 80004fc0: 0005b683 ld x13,0(x11) + 80004fc4: 01e68c63 beq x13,x30,80004fdc + 80004fc8: 5790276f jal x14,80007d40 + 80004fcc: 80004fbc .word 0x80004fbc + 80004fd0: 00000000 .word 0x00000000 + 80004fd4: 80016688 .word 0x80016688 + 80004fd8: 00000000 .word 0x00000000 + 80004fdc: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x65937e857d2d0009 + 80004fe0: 00083303 ld x6,0(x16) + 80004fe4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xb6ac95430e17df6c + 80004fe8: 00083303 ld x6,0(x16) + 80004fec: 00880813 addi x16,x16,8 + +0000000080004ff0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b6: + xnor x21, x6, x6 # perform operation + 80004ff0: 40634ab3 xnor x21,x6,x6 + # Check if x21 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x21, Zbkb_xnor_cg_cmp_rs1_rs2_b6, Zbkb_xnor_cg_cmp_rs1_rs2_b6_str) + 80004ff4: 0005b683 ld x13,0(x11) + 80004ff8: 01568c63 beq x13,x21,80005010 + 80004ffc: 5450276f jal x14,80007d40 + 80005000: 80004ff0 .word 0x80004ff0 + 80005004: 00000000 .word 0x00000000 + 80005008: 800166c0 .word 0x800166c0 + 8000500c: 00000000 .word 0x00000000 + 80005010: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xe88c8fe50bfaf7ad + 80005014: 00083383 ld x7,0(x16) + 80005018: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x9ccee82a67c3fcdc + 8000501c: 00083383 ld x7,0(x16) + 80005020: 00880813 addi x16,x16,8 + +0000000080005024 : +Zbkb_xnor_cg_cmp_rs1_rs2_b7: + xnor x25, x7, x7 # perform operation + 80005024: 4073ccb3 xnor x25,x7,x7 + # Check if x25 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x25, Zbkb_xnor_cg_cmp_rs1_rs2_b7, Zbkb_xnor_cg_cmp_rs1_rs2_b7_str) + 80005028: 0005b683 ld x13,0(x11) + 8000502c: 01968c63 beq x13,x25,80005044 + 80005030: 5110276f jal x14,80007d40 + 80005034: 80005024 .word 0x80005024 + 80005038: 00000000 .word 0x00000000 + 8000503c: 800166f8 .word 0x800166f8 + 80005040: 00000000 .word 0x00000000 + 80005044: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x3508cf103f847b63 + 80005048: 00083403 ld x8,0(x16) + 8000504c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x2eb1d040829ff905 + 80005050: 00083403 ld x8,0(x16) + 80005054: 00880813 addi x16,x16,8 + +0000000080005058 : +Zbkb_xnor_cg_cmp_rs1_rs2_b8: + xnor x29, x8, x8 # perform operation + 80005058: 40844eb3 xnor x29,x8,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x29, Zbkb_xnor_cg_cmp_rs1_rs2_b8, Zbkb_xnor_cg_cmp_rs1_rs2_b8_str) + 8000505c: 0005b683 ld x13,0(x11) + 80005060: 01d68c63 beq x13,x29,80005078 + 80005064: 4dd0276f jal x14,80007d40 + 80005068: 80005058 .word 0x80005058 + 8000506c: 00000000 .word 0x00000000 + 80005070: 80016730 .word 0x80016730 + 80005074: 00000000 .word 0x00000000 + 80005078: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x928ab627ff856b33 + 8000507c: 00083483 ld x9,0(x16) + 80005080: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xaf459cc98e1ffecd + 80005084: 00083483 ld x9,0(x16) + 80005088: 00880813 addi x16,x16,8 + +000000008000508c : +Zbkb_xnor_cg_cmp_rs1_rs2_b9: + xnor x27, x9, x9 # perform operation + 8000508c: 4094cdb3 xnor x27,x9,x9 + # Check if x27 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x27, Zbkb_xnor_cg_cmp_rs1_rs2_b9, Zbkb_xnor_cg_cmp_rs1_rs2_b9_str) + 80005090: 0005b683 ld x13,0(x11) + 80005094: 01b68c63 beq x13,x27,800050ac + 80005098: 4a90276f jal x14,80007d40 + 8000509c: 8000508c .word 0x8000508c + 800050a0: 00000000 .word 0x00000000 + 800050a4: 80016768 .word 0x80016768 + 800050a8: 00000000 .word 0x00000000 + 800050ac: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x07c68c6aea90041b + 800050b0: 00083503 ld x10,0(x16) + 800050b4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xfd214a10d1291721 + 800050b8: 00083503 ld x10,0(x16) + 800050bc: 00880813 addi x16,x16,8 + +00000000800050c0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b10: + xnor x18, x10, x10 # perform operation + 800050c0: 40a54933 xnor x18,x10,x10 + # Check if x18 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x18, Zbkb_xnor_cg_cmp_rs1_rs2_b10, Zbkb_xnor_cg_cmp_rs1_rs2_b10_str) + 800050c4: 0005b683 ld x13,0(x11) + 800050c8: 01268c63 beq x13,x18,800050e0 + 800050cc: 4750276f jal x14,80007d40 + 800050d0: 800050c0 .word 0x800050c0 + 800050d4: 00000000 .word 0x00000000 + 800050d8: 800167a0 .word 0x800167a0 + 800050dc: 00000000 .word 0x00000000 + 800050e0: 00858593 addi x11,x11,8 + + mv x1, x11 # switch signature pointer register to avoid conflict with test + 800050e4: 00058093 addi x1,x11,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xc6ed4aa4bb592886 + 800050e8: 00083583 ld x11,0(x16) + 800050ec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0xc9dde447f9462eb1 + 800050f0: 00083583 ld x11,0(x16) + 800050f4: 00880813 addi x16,x16,8 + +00000000800050f8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b11: + xnor x18, x11, x11 # perform operation + 800050f8: 40b5c933 xnor x18,x11,x11 + # Check if x18 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x18, Zbkb_xnor_cg_cmp_rs1_rs2_b11, Zbkb_xnor_cg_cmp_rs1_rs2_b11_str) + 800050fc: 0000b683 ld x13,0(x1) + 80005100: 01268c63 beq x13,x18,80005118 + 80005104: 43d0276f jal x14,80007d40 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 800167d9 .word 0x800167d9 + 80005114: 00000000 .word 0x00000000 + 80005118: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x0bc4857e00bf179e + 8000511c: 00083603 ld x12,0(x16) + 80005120: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xb19f2020c9bf0dfc + 80005124: 00083603 ld x12,0(x16) + 80005128: 00880813 addi x16,x16,8 + +000000008000512c : +Zbkb_xnor_cg_cmp_rs1_rs2_b12: + xnor x21, x12, x12 # perform operation + 8000512c: 40c64ab3 xnor x21,x12,x12 + # Check if x21 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x21, Zbkb_xnor_cg_cmp_rs1_rs2_b12, Zbkb_xnor_cg_cmp_rs1_rs2_b12_str) + 80005130: 0000b683 ld x13,0(x1) + 80005134: 01568c63 beq x13,x21,8000514c + 80005138: 4090276f jal x14,80007d40 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 80016812 .word 0x80016812 + 80005148: 00000000 .word 0x00000000 + 8000514c: 00808093 addi x1,x1,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005150: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005154: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x6196d5d2e90cdf54 + 80005158: 00083683 ld x13,0(x16) + 8000515c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xfafea7721b3f5663 + 80005160: 00083683 ld x13,0(x16) + 80005164: 00880813 addi x16,x16,8 + +0000000080005168 : +Zbkb_xnor_cg_cmp_rs1_rs2_b13: + xnor x30, x13, x13 # perform operation + 80005168: 40d6cf33 xnor x30,x13,x13 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zbkb_xnor_cg_cmp_rs1_rs2_b13, Zbkb_xnor_cg_cmp_rs1_rs2_b13_str) + 8000516c: 0000b383 ld x7,0(x1) + 80005170: 01e38c63 beq x7,x30,80005188 + 80005174: 3a50246f jal x8,80007d18 + 80005178: 80005168 .word 0x80005168 + 8000517c: 00000000 .word 0x00000000 + 80005180: 8001684b .word 0x8001684b + 80005184: 00000000 .word 0x00000000 + 80005188: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x0f517fed2e86ea41 + 8000518c: 00083703 ld x14,0(x16) + 80005190: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xf6d2a0cfafaff1e2 + 80005194: 00083703 ld x14,0(x16) + 80005198: 00880813 addi x16,x16,8 + +000000008000519c : +Zbkb_xnor_cg_cmp_rs1_rs2_b14: + xnor x15, x14, x14 # perform operation + 8000519c: 40e747b3 xnor x15,x14,x14 + # Check if x15 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x15, Zbkb_xnor_cg_cmp_rs1_rs2_b14, Zbkb_xnor_cg_cmp_rs1_rs2_b14_str) + 800051a0: 0000b383 ld x7,0(x1) + 800051a4: 00f38c63 beq x7,x15,800051bc + 800051a8: 3710246f jal x8,80007d18 + 800051ac: 8000519c .word 0x8000519c + 800051b0: 00000000 .word 0x00000000 + 800051b4: 80016884 .word 0x80016884 + 800051b8: 00000000 .word 0x00000000 + 800051bc: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x14653d72e5f61a75 + 800051c0: 00083783 ld x15,0(x16) + 800051c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x5b5304c014184238 + 800051c8: 00083783 ld x15,0(x16) + 800051cc: 00880813 addi x16,x16,8 + +00000000800051d0 : +Zbkb_xnor_cg_cmp_rs1_rs2_b15: + xnor x30, x15, x15 # perform operation + 800051d0: 40f7cf33 xnor x30,x15,x15 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zbkb_xnor_cg_cmp_rs1_rs2_b15, Zbkb_xnor_cg_cmp_rs1_rs2_b15_str) + 800051d4: 0000b383 ld x7,0(x1) + 800051d8: 01e38c63 beq x7,x30,800051f0 + 800051dc: 33d0246f jal x8,80007d18 + 800051e0: 800051d0 .word 0x800051d0 + 800051e4: 00000000 .word 0x00000000 + 800051e8: 800168bd .word 0x800168bd + 800051ec: 00000000 .word 0x00000000 + 800051f0: 00808093 addi x1,x1,8 + + mv x30, x16 # switch data pointer register to avoid conflict with test + 800051f4: 00080f13 addi x30,x16,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0xae87d142027e6a39 + 800051f8: 000f3803 ld x16,0(x30) + 800051fc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x88420617f9305ad7 + 80005200: 000f3803 ld x16,0(x30) + 80005204: 008f0f13 addi x30,x30,8 + +0000000080005208 : +Zbkb_xnor_cg_cmp_rs1_rs2_b16: + xnor x4, x16, x16 # perform operation + 80005208: 41084233 xnor x4,x16,x16 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zbkb_xnor_cg_cmp_rs1_rs2_b16, Zbkb_xnor_cg_cmp_rs1_rs2_b16_str) + 8000520c: 0000b383 ld x7,0(x1) + 80005210: 00438c63 beq x7,x4,80005228 + 80005214: 3050246f jal x8,80007d18 + 80005218: 80005208 .word 0x80005208 + 8000521c: 00000000 .word 0x00000000 + 80005220: 800168f6 .word 0x800168f6 + 80005224: 00000000 .word 0x00000000 + 80005228: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x263e257a2a8023bf + 8000522c: 000f3883 ld x17,0(x30) + 80005230: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0x23073b99631ce362 + 80005234: 000f3883 ld x17,0(x30) + 80005238: 008f0f13 addi x30,x30,8 + +000000008000523c : +Zbkb_xnor_cg_cmp_rs1_rs2_b17: + xnor x19, x17, x17 # perform operation + 8000523c: 4118c9b3 xnor x19,x17,x17 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zbkb_xnor_cg_cmp_rs1_rs2_b17, Zbkb_xnor_cg_cmp_rs1_rs2_b17_str) + 80005240: 0000b383 ld x7,0(x1) + 80005244: 01338c63 beq x7,x19,8000525c + 80005248: 2d10246f jal x8,80007d18 + 8000524c: 8000523c .word 0x8000523c + 80005250: 00000000 .word 0x00000000 + 80005254: 8001692f .word 0x8001692f + 80005258: 00000000 .word 0x00000000 + 8000525c: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x5ff0cebb90975686 + 80005260: 000f3903 ld x18,0(x30) + 80005264: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x1f47ec30ed184074 + 80005268: 000f3903 ld x18,0(x30) + 8000526c: 008f0f13 addi x30,x30,8 + +0000000080005270 : +Zbkb_xnor_cg_cmp_rs1_rs2_b18: + xnor x5, x18, x18 # perform operation + 80005270: 412942b3 xnor x5,x18,x18 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zbkb_xnor_cg_cmp_rs1_rs2_b18, Zbkb_xnor_cg_cmp_rs1_rs2_b18_str) + 80005274: 0000b383 ld x7,0(x1) + 80005278: 00538c63 beq x7,x5,80005290 + 8000527c: 29d0246f jal x8,80007d18 + 80005280: 80005270 .word 0x80005270 + 80005284: 00000000 .word 0x00000000 + 80005288: 80016968 .word 0x80016968 + 8000528c: 00000000 .word 0x00000000 + 80005290: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xb050ec74deb0b446 + 80005294: 000f3983 ld x19,0(x30) + 80005298: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x1ac9740125ea19e8 + 8000529c: 000f3983 ld x19,0(x30) + 800052a0: 008f0f13 addi x30,x30,8 + +00000000800052a4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b19: + xnor x18, x19, x19 # perform operation + 800052a4: 4139c933 xnor x18,x19,x19 + # Check if x18 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x18, Zbkb_xnor_cg_cmp_rs1_rs2_b19, Zbkb_xnor_cg_cmp_rs1_rs2_b19_str) + 800052a8: 0000b383 ld x7,0(x1) + 800052ac: 01238c63 beq x7,x18,800052c4 + 800052b0: 2690246f jal x8,80007d18 + 800052b4: 800052a4 .word 0x800052a4 + 800052b8: 00000000 .word 0x00000000 + 800052bc: 800169a1 .word 0x800169a1 + 800052c0: 00000000 .word 0x00000000 + 800052c4: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x6543a98909fb18d1 + 800052c8: 000f3a03 ld x20,0(x30) + 800052cc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0xf9c60135e7b665c9 + 800052d0: 000f3a03 ld x20,0(x30) + 800052d4: 008f0f13 addi x30,x30,8 + +00000000800052d8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b20: + xnor x28, x20, x20 # perform operation + 800052d8: 414a4e33 xnor x28,x20,x20 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zbkb_xnor_cg_cmp_rs1_rs2_b20, Zbkb_xnor_cg_cmp_rs1_rs2_b20_str) + 800052dc: 0000b383 ld x7,0(x1) + 800052e0: 01c38c63 beq x7,x28,800052f8 + 800052e4: 2350246f jal x8,80007d18 + 800052e8: 800052d8 .word 0x800052d8 + 800052ec: 00000000 .word 0x00000000 + 800052f0: 800169da .word 0x800169da + 800052f4: 00000000 .word 0x00000000 + 800052f8: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x48986b6f76ad2978 + 800052fc: 000f3a83 ld x21,0(x30) + 80005300: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0xb94b3334ed5a4c94 + 80005304: 000f3a83 ld x21,0(x30) + 80005308: 008f0f13 addi x30,x30,8 + +000000008000530c : +Zbkb_xnor_cg_cmp_rs1_rs2_b21: + xnor x23, x21, x21 # perform operation + 8000530c: 415acbb3 xnor x23,x21,x21 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zbkb_xnor_cg_cmp_rs1_rs2_b21, Zbkb_xnor_cg_cmp_rs1_rs2_b21_str) + 80005310: 0000b383 ld x7,0(x1) + 80005314: 01738c63 beq x7,x23,8000532c + 80005318: 2010246f jal x8,80007d18 + 8000531c: 8000530c .word 0x8000530c + 80005320: 00000000 .word 0x00000000 + 80005324: 80016a13 .word 0x80016a13 + 80005328: 00000000 .word 0x00000000 + 8000532c: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x7309c06848223a97 + 80005330: 000f3b03 ld x22,0(x30) + 80005334: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x8f31f8af6d9bab0e + 80005338: 000f3b03 ld x22,0(x30) + 8000533c: 008f0f13 addi x30,x30,8 + +0000000080005340 : +Zbkb_xnor_cg_cmp_rs1_rs2_b22: + xnor x17, x22, x22 # perform operation + 80005340: 416b48b3 xnor x17,x22,x22 + # Check if x17 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x17, Zbkb_xnor_cg_cmp_rs1_rs2_b22, Zbkb_xnor_cg_cmp_rs1_rs2_b22_str) + 80005344: 0000b383 ld x7,0(x1) + 80005348: 01138c63 beq x7,x17,80005360 + 8000534c: 1cd0246f jal x8,80007d18 + 80005350: 80005340 .word 0x80005340 + 80005354: 00000000 .word 0x00000000 + 80005358: 80016a4c .word 0x80016a4c + 8000535c: 00000000 .word 0x00000000 + 80005360: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x68fde26071f9378f + 80005364: 000f3b83 ld x23,0(x30) + 80005368: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x01e83520cb4f081c + 8000536c: 000f3b83 ld x23,0(x30) + 80005370: 008f0f13 addi x30,x30,8 + +0000000080005374 : +Zbkb_xnor_cg_cmp_rs1_rs2_b23: + xnor x6, x23, x23 # perform operation + 80005374: 417bc333 xnor x6,x23,x23 + # Check if x6 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x6, Zbkb_xnor_cg_cmp_rs1_rs2_b23, Zbkb_xnor_cg_cmp_rs1_rs2_b23_str) + 80005378: 0000b383 ld x7,0(x1) + 8000537c: 00638c63 beq x7,x6,80005394 + 80005380: 1990246f jal x8,80007d18 + 80005384: 80005374 .word 0x80005374 + 80005388: 00000000 .word 0x00000000 + 8000538c: 80016a85 .word 0x80016a85 + 80005390: 00000000 .word 0x00000000 + 80005394: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x3ea8f6ed0d3a9013 + 80005398: 000f3c03 ld x24,0(x30) + 8000539c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xe156ebf1af82de7f + 800053a0: 000f3c03 ld x24,0(x30) + 800053a4: 008f0f13 addi x30,x30,8 + +00000000800053a8 : +Zbkb_xnor_cg_cmp_rs1_rs2_b24: + xnor x23, x24, x24 # perform operation + 800053a8: 418c4bb3 xnor x23,x24,x24 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zbkb_xnor_cg_cmp_rs1_rs2_b24, Zbkb_xnor_cg_cmp_rs1_rs2_b24_str) + 800053ac: 0000b383 ld x7,0(x1) + 800053b0: 01738c63 beq x7,x23,800053c8 + 800053b4: 1650246f jal x8,80007d18 + 800053b8: 800053a8 .word 0x800053a8 + 800053bc: 00000000 .word 0x00000000 + 800053c0: 80016abe .word 0x80016abe + 800053c4: 00000000 .word 0x00000000 + 800053c8: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xd721073fa8352f15 + 800053cc: 000f3c83 ld x25,0(x30) + 800053d0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x591e8656f3fd4b6d + 800053d4: 000f3c83 ld x25,0(x30) + 800053d8: 008f0f13 addi x30,x30,8 + +00000000800053dc : +Zbkb_xnor_cg_cmp_rs1_rs2_b25: + xnor x6, x25, x25 # perform operation + 800053dc: 419cc333 xnor x6,x25,x25 + # Check if x6 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x6, Zbkb_xnor_cg_cmp_rs1_rs2_b25, Zbkb_xnor_cg_cmp_rs1_rs2_b25_str) + 800053e0: 0000b383 ld x7,0(x1) + 800053e4: 00638c63 beq x7,x6,800053fc + 800053e8: 1310246f jal x8,80007d18 + 800053ec: 800053dc .word 0x800053dc + 800053f0: 00000000 .word 0x00000000 + 800053f4: 80016af7 .word 0x80016af7 + 800053f8: 00000000 .word 0x00000000 + 800053fc: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x06d3757bb94b2b33 + 80005400: 000f3d03 ld x26,0(x30) + 80005404: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x3c1f226157bccd41 + 80005408: 000f3d03 ld x26,0(x30) + 8000540c: 008f0f13 addi x30,x30,8 + +0000000080005410 : +Zbkb_xnor_cg_cmp_rs1_rs2_b26: + xnor x13, x26, x26 # perform operation + 80005410: 41ad46b3 xnor x13,x26,x26 + # Check if x13 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x13, Zbkb_xnor_cg_cmp_rs1_rs2_b26, Zbkb_xnor_cg_cmp_rs1_rs2_b26_str) + 80005414: 0000b383 ld x7,0(x1) + 80005418: 00d38c63 beq x7,x13,80005430 + 8000541c: 0fd0246f jal x8,80007d18 + 80005420: 80005410 .word 0x80005410 + 80005424: 00000000 .word 0x00000000 + 80005428: 80016b30 .word 0x80016b30 + 8000542c: 00000000 .word 0x00000000 + 80005430: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x3de6284a6aa72b70 + 80005434: 000f3d83 ld x27,0(x30) + 80005438: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xf6a768ee6cb3a31a + 8000543c: 000f3d83 ld x27,0(x30) + 80005440: 008f0f13 addi x30,x30,8 + +0000000080005444 : +Zbkb_xnor_cg_cmp_rs1_rs2_b27: + xnor x4, x27, x27 # perform operation + 80005444: 41bdc233 xnor x4,x27,x27 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zbkb_xnor_cg_cmp_rs1_rs2_b27, Zbkb_xnor_cg_cmp_rs1_rs2_b27_str) + 80005448: 0000b383 ld x7,0(x1) + 8000544c: 00438c63 beq x7,x4,80005464 + 80005450: 0c90246f jal x8,80007d18 + 80005454: 80005444 .word 0x80005444 + 80005458: 00000000 .word 0x00000000 + 8000545c: 80016b69 .word 0x80016b69 + 80005460: 00000000 .word 0x00000000 + 80005464: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xe67f46973e584653 + 80005468: 000f3e03 ld x28,0(x30) + 8000546c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x19fa2682738305d7 + 80005470: 000f3e03 ld x28,0(x30) + 80005474: 008f0f13 addi x30,x30,8 + +0000000080005478 : +Zbkb_xnor_cg_cmp_rs1_rs2_b28: + xnor x11, x28, x28 # perform operation + 80005478: 41ce45b3 xnor x11,x28,x28 + # Check if x11 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x11, Zbkb_xnor_cg_cmp_rs1_rs2_b28, Zbkb_xnor_cg_cmp_rs1_rs2_b28_str) + 8000547c: 0000b383 ld x7,0(x1) + 80005480: 00b38c63 beq x7,x11,80005498 + 80005484: 0950246f jal x8,80007d18 + 80005488: 80005478 .word 0x80005478 + 8000548c: 00000000 .word 0x00000000 + 80005490: 80016ba2 .word 0x80016ba2 + 80005494: 00000000 .word 0x00000000 + 80005498: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xc527e80388fb2998 + 8000549c: 000f3e83 ld x29,0(x30) + 800054a0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xd24c012284e9cd73 + 800054a4: 000f3e83 ld x29,0(x30) + 800054a8: 008f0f13 addi x30,x30,8 + +00000000800054ac : +Zbkb_xnor_cg_cmp_rs1_rs2_b29: + xnor x14, x29, x29 # perform operation + 800054ac: 41dec733 xnor x14,x29,x29 + # Check if x14 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x14, Zbkb_xnor_cg_cmp_rs1_rs2_b29, Zbkb_xnor_cg_cmp_rs1_rs2_b29_str) + 800054b0: 0000b383 ld x7,0(x1) + 800054b4: 00e38c63 beq x7,x14,800054cc + 800054b8: 0610246f jal x8,80007d18 + 800054bc: 800054ac .word 0x800054ac + 800054c0: 00000000 .word 0x00000000 + 800054c4: 80016bdb .word 0x80016bdb + 800054c8: 00000000 .word 0x00000000 + 800054cc: 00808093 addi x1,x1,8 + + mv x28, x30 # switch data pointer register to avoid conflict with test + 800054d0: 000f0e13 addi x28,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs1: x30 = 0x3ca1881e97c28354 + 800054d4: 000e3f03 ld x30,0(x28) + 800054d8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs2: x30 = 0x30399dd13427f0a5 + 800054dc: 000e3f03 ld x30,0(x28) + 800054e0: 008e0e13 addi x28,x28,8 + +00000000800054e4 : +Zbkb_xnor_cg_cmp_rs1_rs2_b30: + xnor x26, x30, x30 # perform operation + 800054e4: 41ef4d33 xnor x26,x30,x30 + # Check if x26 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x26, Zbkb_xnor_cg_cmp_rs1_rs2_b30, Zbkb_xnor_cg_cmp_rs1_rs2_b30_str) + 800054e8: 0000b383 ld x7,0(x1) + 800054ec: 01a38c63 beq x7,x26,80005504 + 800054f0: 0290246f jal x8,80007d18 + 800054f4: 800054e4 .word 0x800054e4 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 80016c14 .word 0x80016c14 + 80005500: 00000000 .word 0x00000000 + 80005504: 00808093 addi x1,x1,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs1: x31 = 0x12516ec3dfbcec43 + 80005508: 000e3f83 ld x31,0(x28) + 8000550c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0xc9ae3e6e7a86d2a6 + 80005510: 000e3f83 ld x31,0(x28) + 80005514: 008e0e13 addi x28,x28,8 + +0000000080005518 : +Zbkb_xnor_cg_cmp_rs1_rs2_b31: + xnor x4, x31, x31 # perform operation + 80005518: 41ffc233 xnor x4,x31,x31 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zbkb_xnor_cg_cmp_rs1_rs2_b31, Zbkb_xnor_cg_cmp_rs1_rs2_b31_str) + 8000551c: 0000b383 ld x7,0(x1) + 80005520: 00438c63 beq x7,x4,80005538 + 80005524: 7f40246f jal x8,80007d18 + 80005528: 80005518 .word 0x80005518 + 8000552c: 00000000 .word 0x00000000 + 80005530: 80016c4d .word 0x80016c4d + 80005534: 00000000 .word 0x00000000 + 80005538: 00808093 addi x1,x1,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0x23d2a0e892a9fc8f + 8000553c: 000e3003 ld x0,0(x28) + 80005540: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0x37d40d1b3c9052c5 + 80005544: 000e3903 ld x18,0(x28) + 80005548: 008e0e13 addi x28,x28,8 + +000000008000554c : +Zbkb_xnor_cg_cmp_rd_rs1_b0: + xnor x0, x0, x18 # perform operation + 8000554c: 41204033 xnor x0,x0,x18 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zbkb_xnor_cg_cmp_rd_rs1_b0, Zbkb_xnor_cg_cmp_rd_rs1_b0_str) + 80005550: 0000b383 ld x7,0(x1) + 80005554: 00038c63 beq x7,x0,8000556c + 80005558: 7c00246f jal x8,80007d18 + 8000555c: 8000554c .word 0x8000554c + 80005560: 00000000 .word 0x00000000 + 80005564: 80016c86 .word 0x80016c86 + 80005568: 00000000 .word 0x00000000 + 8000556c: 00808093 addi x1,x1,8 + + mv x29, x1 # switch signature pointer register to avoid conflict with test + 80005570: 00008e93 addi x29,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs1: x1 = 0xcdf6106d5d9c7b0c + 80005574: 000e3083 ld x1,0(x28) + 80005578: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0x1249e1028878559e + 8000557c: 000e3583 ld x11,0(x28) + 80005580: 008e0e13 addi x28,x28,8 + +0000000080005584 : +Zbkb_xnor_cg_cmp_rd_rs1_b1: + xnor x1, x1, x11 # perform operation + 80005584: 40b0c0b3 xnor x1,x1,x11 + # Check if x1 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x1, Zbkb_xnor_cg_cmp_rd_rs1_b1, Zbkb_xnor_cg_cmp_rd_rs1_b1_str) + 80005588: 000eb383 ld x7,0(x29) + 8000558c: 00138c63 beq x7,x1,800055a4 + 80005590: 7880246f jal x8,80007d18 + 80005594: 80005584 .word 0x80005584 + 80005598: 00000000 .word 0x00000000 + 8000559c: 80016cbd .word 0x80016cbd + 800055a0: 00000000 .word 0x00000000 + 800055a4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs1: x2 = 0xa1349e4669a63039 + 800055a8: 000e3103 ld x2,0(x28) + 800055ac: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0x11ee1a20020312e5 + 800055b0: 000e3f83 ld x31,0(x28) + 800055b4: 008e0e13 addi x28,x28,8 + +00000000800055b8 : +Zbkb_xnor_cg_cmp_rd_rs1_b2: + xnor x2, x2, x31 # perform operation + 800055b8: 41f14133 xnor x2,x2,x31 + # Check if x2 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x2, Zbkb_xnor_cg_cmp_rd_rs1_b2, Zbkb_xnor_cg_cmp_rd_rs1_b2_str) + 800055bc: 000eb383 ld x7,0(x29) + 800055c0: 00238c63 beq x7,x2,800055d8 + 800055c4: 7540246f jal x8,80007d18 + 800055c8: 800055b8 .word 0x800055b8 + 800055cc: 00000000 .word 0x00000000 + 800055d0: 80016cf4 .word 0x80016cf4 + 800055d4: 00000000 .word 0x00000000 + 800055d8: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs1: x3 = 0xd7fa9b2b25ca70f7 + 800055dc: 000e3183 ld x3,0(x28) + 800055e0: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs2: x30 = 0xaf3843ffc5c3e02f + 800055e4: 000e3f03 ld x30,0(x28) + 800055e8: 008e0e13 addi x28,x28,8 + +00000000800055ec : +Zbkb_xnor_cg_cmp_rd_rs1_b3: + xnor x3, x3, x30 # perform operation + 800055ec: 41e1c1b3 xnor x3,x3,x30 + # Check if x3 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x3, Zbkb_xnor_cg_cmp_rd_rs1_b3, Zbkb_xnor_cg_cmp_rd_rs1_b3_str) + 800055f0: 000eb383 ld x7,0(x29) + 800055f4: 00338c63 beq x7,x3,8000560c + 800055f8: 7200246f jal x8,80007d18 + 800055fc: 800055ec .word 0x800055ec + 80005600: 00000000 .word 0x00000000 + 80005604: 80016d2b .word 0x80016d2b + 80005608: 00000000 .word 0x00000000 + 8000560c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x28, x4) # load rs1: x4 = 0x8a2b305bfa542510 + 80005610: 000e3203 ld x4,0(x28) + 80005614: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x41d0673778ca9533 + 80005618: 000e3b83 ld x23,0(x28) + 8000561c: 008e0e13 addi x28,x28,8 + +0000000080005620 : +Zbkb_xnor_cg_cmp_rd_rs1_b4: + xnor x4, x4, x23 # perform operation + 80005620: 41724233 xnor x4,x4,x23 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zbkb_xnor_cg_cmp_rd_rs1_b4, Zbkb_xnor_cg_cmp_rd_rs1_b4_str) + 80005624: 000eb383 ld x7,0(x29) + 80005628: 00438c63 beq x7,x4,80005640 + 8000562c: 6ec0246f jal x8,80007d18 + 80005630: 80005620 .word 0x80005620 + 80005634: 00000000 .word 0x00000000 + 80005638: 80016d62 .word 0x80016d62 + 8000563c: 00000000 .word 0x00000000 + 80005640: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs1: x5 = 0xe22e36f3b38c2e55 + 80005644: 000e3283 ld x5,0(x28) + 80005648: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0x4eb259884328ae13 + 8000564c: 000e3803 ld x16,0(x28) + 80005650: 008e0e13 addi x28,x28,8 + +0000000080005654 : +Zbkb_xnor_cg_cmp_rd_rs1_b5: + xnor x5, x5, x16 # perform operation + 80005654: 4102c2b3 xnor x5,x5,x16 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zbkb_xnor_cg_cmp_rd_rs1_b5, Zbkb_xnor_cg_cmp_rd_rs1_b5_str) + 80005658: 000eb383 ld x7,0(x29) + 8000565c: 00538c63 beq x7,x5,80005674 + 80005660: 6b80246f jal x8,80007d18 + 80005664: 80005654 .word 0x80005654 + 80005668: 00000000 .word 0x00000000 + 8000566c: 80016d99 .word 0x80016d99 + 80005670: 00000000 .word 0x00000000 + 80005674: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs1: x6 = 0xf7d20c07aeeb2ed1 + 80005678: 000e3303 ld x6,0(x28) + 8000567c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xe78548d4e087b94d + 80005680: 000e3c83 ld x25,0(x28) + 80005684: 008e0e13 addi x28,x28,8 + +0000000080005688 : +Zbkb_xnor_cg_cmp_rd_rs1_b6: + xnor x6, x6, x25 # perform operation + 80005688: 41934333 xnor x6,x6,x25 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zbkb_xnor_cg_cmp_rd_rs1_b6, Zbkb_xnor_cg_cmp_rd_rs1_b6_str) + 8000568c: 000eb383 ld x7,0(x29) + 80005690: 00638c63 beq x7,x6,800056a8 + 80005694: 6840246f jal x8,80007d18 + 80005698: 80005688 .word 0x80005688 + 8000569c: 00000000 .word 0x00000000 + 800056a0: 80016dd0 .word 0x80016dd0 + 800056a4: 00000000 .word 0x00000000 + 800056a8: 008e8e93 addi x29,x29,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056ac: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056b0: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs1: x7 = 0x809086fe07c4695b + 800056b4: 000e3383 ld x7,0(x28) + 800056b8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x1470ade8a22bc5b7 + 800056bc: 000e3c83 ld x25,0(x28) + 800056c0: 008e0e13 addi x28,x28,8 + +00000000800056c4 : +Zbkb_xnor_cg_cmp_rd_rs1_b7: + xnor x7, x7, x25 # perform operation + 800056c4: 4193c3b3 xnor x7,x7,x25 + # Check if x7 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x7, Zbkb_xnor_cg_cmp_rd_rs1_b7, Zbkb_xnor_cg_cmp_rd_rs1_b7_str) + 800056c8: 000eb683 ld x13,0(x29) + 800056cc: 00768c63 beq x13,x7,800056e4 + 800056d0: 6700276f jal x14,80007d40 + 800056d4: 800056c4 .word 0x800056c4 + 800056d8: 00000000 .word 0x00000000 + 800056dc: 80016e07 .word 0x80016e07 + 800056e0: 00000000 .word 0x00000000 + 800056e4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs1: x8 = 0xb96e7edd1bd9ae03 + 800056e8: 000e3403 ld x8,0(x28) + 800056ec: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs2: x16 = 0x22b5eb1ec02eaea9 + 800056f0: 000e3803 ld x16,0(x28) + 800056f4: 008e0e13 addi x28,x28,8 + +00000000800056f8 : +Zbkb_xnor_cg_cmp_rd_rs1_b8: + xnor x8, x8, x16 # perform operation + 800056f8: 41044433 xnor x8,x8,x16 + # Check if x8 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x8, Zbkb_xnor_cg_cmp_rd_rs1_b8, Zbkb_xnor_cg_cmp_rd_rs1_b8_str) + 800056fc: 000eb683 ld x13,0(x29) + 80005700: 00868c63 beq x13,x8,80005718 + 80005704: 63c0276f jal x14,80007d40 + 80005708: 800056f8 .word 0x800056f8 + 8000570c: 00000000 .word 0x00000000 + 80005710: 80016e3e .word 0x80016e3e + 80005714: 00000000 .word 0x00000000 + 80005718: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x8948879e523e8407 + 8000571c: 000e3483 ld x9,0(x28) + 80005720: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x8) # load rs2: x8 = 0x326d7c7c49c734b3 + 80005724: 000e3403 ld x8,0(x28) + 80005728: 008e0e13 addi x28,x28,8 + +000000008000572c : +Zbkb_xnor_cg_cmp_rd_rs1_b9: + xnor x9, x9, x8 # perform operation + 8000572c: 4084c4b3 xnor x9,x9,x8 + # Check if x9 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x9, Zbkb_xnor_cg_cmp_rd_rs1_b9, Zbkb_xnor_cg_cmp_rd_rs1_b9_str) + 80005730: 000eb683 ld x13,0(x29) + 80005734: 00968c63 beq x13,x9,8000574c + 80005738: 6080276f jal x14,80007d40 + 8000573c: 8000572c .word 0x8000572c + 80005740: 00000000 .word 0x00000000 + 80005744: 80016e75 .word 0x80016e75 + 80005748: 00000000 .word 0x00000000 + 8000574c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0xde960bcb1425c489 + 80005750: 000e3503 ld x10,0(x28) + 80005754: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0xa0a96f6f1e064956 + 80005758: 000e3103 ld x2,0(x28) + 8000575c: 008e0e13 addi x28,x28,8 + +0000000080005760 : +Zbkb_xnor_cg_cmp_rd_rs1_b10: + xnor x10, x10, x2 # perform operation + 80005760: 40254533 xnor x10,x10,x2 + # Check if x10 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x10, Zbkb_xnor_cg_cmp_rd_rs1_b10, Zbkb_xnor_cg_cmp_rd_rs1_b10_str) + 80005764: 000eb683 ld x13,0(x29) + 80005768: 00a68c63 beq x13,x10,80005780 + 8000576c: 5d40276f jal x14,80007d40 + 80005770: 80005760 .word 0x80005760 + 80005774: 00000000 .word 0x00000000 + 80005778: 80016eac .word 0x80016eac + 8000577c: 00000000 .word 0x00000000 + 80005780: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x615ed2303fa7692b + 80005784: 000e3583 ld x11,0(x28) + 80005788: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0xa324440ab668b999 + 8000578c: 000e3603 ld x12,0(x28) + 80005790: 008e0e13 addi x28,x28,8 + +0000000080005794 : +Zbkb_xnor_cg_cmp_rd_rs1_b11: + xnor x11, x11, x12 # perform operation + 80005794: 40c5c5b3 xnor x11,x11,x12 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zbkb_xnor_cg_cmp_rd_rs1_b11, Zbkb_xnor_cg_cmp_rd_rs1_b11_str) + 80005798: 000eb683 ld x13,0(x29) + 8000579c: 00b68c63 beq x13,x11,800057b4 + 800057a0: 5a00276f jal x14,80007d40 + 800057a4: 80005794 .word 0x80005794 + 800057a8: 00000000 .word 0x00000000 + 800057ac: 80016ee4 .word 0x80016ee4 + 800057b0: 00000000 .word 0x00000000 + 800057b4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0xbd80963079cd568a + 800057b8: 000e3603 ld x12,0(x28) + 800057bc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x7) # load rs2: x7 = 0x4ad1e04447fbe21d + 800057c0: 000e3383 ld x7,0(x28) + 800057c4: 008e0e13 addi x28,x28,8 + +00000000800057c8 : +Zbkb_xnor_cg_cmp_rd_rs1_b12: + xnor x12, x12, x7 # perform operation + 800057c8: 40764633 xnor x12,x12,x7 + # Check if x12 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x12, Zbkb_xnor_cg_cmp_rd_rs1_b12, Zbkb_xnor_cg_cmp_rd_rs1_b12_str) + 800057cc: 000eb683 ld x13,0(x29) + 800057d0: 00c68c63 beq x13,x12,800057e8 + 800057d4: 56c0276f jal x14,80007d40 + 800057d8: 800057c8 .word 0x800057c8 + 800057dc: 00000000 .word 0x00000000 + 800057e0: 80016f1c .word 0x80016f1c + 800057e4: 00000000 .word 0x00000000 + 800057e8: 008e8e93 addi x29,x29,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057ec: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800057f0: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0x7a91eeeec49a1ee2 + 800057f4: 000e3683 ld x13,0(x28) + 800057f8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xac009a7e392a14ad + 800057fc: 000e3983 ld x19,0(x28) + 80005800: 008e0e13 addi x28,x28,8 + +0000000080005804 : +Zbkb_xnor_cg_cmp_rd_rs1_b13: + xnor x13, x13, x19 # perform operation + 80005804: 4136c6b3 xnor x13,x13,x19 + # Check if x13 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x13, Zbkb_xnor_cg_cmp_rd_rs1_b13, Zbkb_xnor_cg_cmp_rd_rs1_b13_str) + 80005808: 000eb383 ld x7,0(x29) + 8000580c: 00d38c63 beq x7,x13,80005824 + 80005810: 5080246f jal x8,80007d18 + 80005814: 80005804 .word 0x80005804 + 80005818: 00000000 .word 0x00000000 + 8000581c: 80016f54 .word 0x80016f54 + 80005820: 00000000 .word 0x00000000 + 80005824: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x734110b26c731da2 + 80005828: 000e3703 ld x14,0(x28) + 8000582c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0x651131a67bc71425 + 80005830: 000e3a83 ld x21,0(x28) + 80005834: 008e0e13 addi x28,x28,8 + +0000000080005838 : +Zbkb_xnor_cg_cmp_rd_rs1_b14: + xnor x14, x14, x21 # perform operation + 80005838: 41574733 xnor x14,x14,x21 + # Check if x14 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x14, Zbkb_xnor_cg_cmp_rd_rs1_b14, Zbkb_xnor_cg_cmp_rd_rs1_b14_str) + 8000583c: 000eb383 ld x7,0(x29) + 80005840: 00e38c63 beq x7,x14,80005858 + 80005844: 4d40246f jal x8,80007d18 + 80005848: 80005838 .word 0x80005838 + 8000584c: 00000000 .word 0x00000000 + 80005850: 80016f8c .word 0x80016f8c + 80005854: 00000000 .word 0x00000000 + 80005858: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0xab85085d73ad9b27 + 8000585c: 000e3783 ld x15,0(x28) + 80005860: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x7526753e32d23c4a + 80005864: 000e3c83 ld x25,0(x28) + 80005868: 008e0e13 addi x28,x28,8 + +000000008000586c : +Zbkb_xnor_cg_cmp_rd_rs1_b15: + xnor x15, x15, x25 # perform operation + 8000586c: 4197c7b3 xnor x15,x15,x25 + # Check if x15 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x15, Zbkb_xnor_cg_cmp_rd_rs1_b15, Zbkb_xnor_cg_cmp_rd_rs1_b15_str) + 80005870: 000eb383 ld x7,0(x29) + 80005874: 00f38c63 beq x7,x15,8000588c + 80005878: 4a00246f jal x8,80007d18 + 8000587c: 8000586c .word 0x8000586c + 80005880: 00000000 .word 0x00000000 + 80005884: 80016fc4 .word 0x80016fc4 + 80005888: 00000000 .word 0x00000000 + 8000588c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0x683ab011e69b0032 + 80005890: 000e3803 ld x16,0(x28) + 80005894: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0xc156c87ce992907d + 80005898: 000e3583 ld x11,0(x28) + 8000589c: 008e0e13 addi x28,x28,8 + +00000000800058a0 : +Zbkb_xnor_cg_cmp_rd_rs1_b16: + xnor x16, x16, x11 # perform operation + 800058a0: 40b84833 xnor x16,x16,x11 + # Check if x16 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x16, Zbkb_xnor_cg_cmp_rd_rs1_b16, Zbkb_xnor_cg_cmp_rd_rs1_b16_str) + 800058a4: 000eb383 ld x7,0(x29) + 800058a8: 01038c63 beq x7,x16,800058c0 + 800058ac: 46c0246f jal x8,80007d18 + 800058b0: 800058a0 .word 0x800058a0 + 800058b4: 00000000 .word 0x00000000 + 800058b8: 80016ffc .word 0x80016ffc + 800058bc: 00000000 .word 0x00000000 + 800058c0: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xeeb1800dc5a84921 + 800058c4: 000e3883 ld x17,0(x28) + 800058c8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0xc3d6ef55b7b8ae11 + 800058cc: 000e3a03 ld x20,0(x28) + 800058d0: 008e0e13 addi x28,x28,8 + +00000000800058d4 : +Zbkb_xnor_cg_cmp_rd_rs1_b17: + xnor x17, x17, x20 # perform operation + 800058d4: 4148c8b3 xnor x17,x17,x20 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zbkb_xnor_cg_cmp_rd_rs1_b17, Zbkb_xnor_cg_cmp_rd_rs1_b17_str) + 800058d8: 000eb383 ld x7,0(x29) + 800058dc: 01138c63 beq x7,x17,800058f4 + 800058e0: 4380246f jal x8,80007d18 + 800058e4: 800058d4 .word 0x800058d4 + 800058e8: 00000000 .word 0x00000000 + 800058ec: 80017034 .word 0x80017034 + 800058f0: 00000000 .word 0x00000000 + 800058f4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x6fc9b601c7a79290 + 800058f8: 000e3903 ld x18,0(x28) + 800058fc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0x55271668dda70803 + 80005900: 000e3183 ld x3,0(x28) + 80005904: 008e0e13 addi x28,x28,8 + +0000000080005908 : +Zbkb_xnor_cg_cmp_rd_rs1_b18: + xnor x18, x18, x3 # perform operation + 80005908: 40394933 xnor x18,x18,x3 + # Check if x18 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x18, Zbkb_xnor_cg_cmp_rd_rs1_b18, Zbkb_xnor_cg_cmp_rd_rs1_b18_str) + 8000590c: 000eb383 ld x7,0(x29) + 80005910: 01238c63 beq x7,x18,80005928 + 80005914: 4040246f jal x8,80007d18 + 80005918: 80005908 .word 0x80005908 + 8000591c: 00000000 .word 0x00000000 + 80005920: 8001706c .word 0x8001706c + 80005924: 00000000 .word 0x00000000 + 80005928: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0xc06d26d15edafdb7 + 8000592c: 000e3983 ld x19,0(x28) + 80005930: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs2: x9 = 0x90bcd1b2370ba636 + 80005934: 000e3483 ld x9,0(x28) + 80005938: 008e0e13 addi x28,x28,8 + +000000008000593c : +Zbkb_xnor_cg_cmp_rd_rs1_b19: + xnor x19, x19, x9 # perform operation + 8000593c: 4099c9b3 xnor x19,x19,x9 + # Check if x19 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x19, Zbkb_xnor_cg_cmp_rd_rs1_b19, Zbkb_xnor_cg_cmp_rd_rs1_b19_str) + 80005940: 000eb383 ld x7,0(x29) + 80005944: 01338c63 beq x7,x19,8000595c + 80005948: 3d00246f jal x8,80007d18 + 8000594c: 8000593c .word 0x8000593c + 80005950: 00000000 .word 0x00000000 + 80005954: 800170a4 .word 0x800170a4 + 80005958: 00000000 .word 0x00000000 + 8000595c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x9ea6c290cd1e589a + 80005960: 000e3a03 ld x20,0(x28) + 80005964: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x6) # load rs2: x6 = 0x1695abc722c6162f + 80005968: 000e3303 ld x6,0(x28) + 8000596c: 008e0e13 addi x28,x28,8 + +0000000080005970 : +Zbkb_xnor_cg_cmp_rd_rs1_b20: + xnor x20, x20, x6 # perform operation + 80005970: 406a4a33 xnor x20,x20,x6 + # Check if x20 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x20, Zbkb_xnor_cg_cmp_rd_rs1_b20, Zbkb_xnor_cg_cmp_rd_rs1_b20_str) + 80005974: 000eb383 ld x7,0(x29) + 80005978: 01438c63 beq x7,x20,80005990 + 8000597c: 39c0246f jal x8,80007d18 + 80005980: 80005970 .word 0x80005970 + 80005984: 00000000 .word 0x00000000 + 80005988: 800170dc .word 0x800170dc + 8000598c: 00000000 .word 0x00000000 + 80005990: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x1165648b42bb1010 + 80005994: 000e3a83 ld x21,0(x28) + 80005998: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs2: x19 = 0xc094e44cea27ecdf + 8000599c: 000e3983 ld x19,0(x28) + 800059a0: 008e0e13 addi x28,x28,8 + +00000000800059a4 : +Zbkb_xnor_cg_cmp_rd_rs1_b21: + xnor x21, x21, x19 # perform operation + 800059a4: 413acab3 xnor x21,x21,x19 + # Check if x21 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x21, Zbkb_xnor_cg_cmp_rd_rs1_b21, Zbkb_xnor_cg_cmp_rd_rs1_b21_str) + 800059a8: 000eb383 ld x7,0(x29) + 800059ac: 01538c63 beq x7,x21,800059c4 + 800059b0: 3680246f jal x8,80007d18 + 800059b4: 800059a4 .word 0x800059a4 + 800059b8: 00000000 .word 0x00000000 + 800059bc: 80017114 .word 0x80017114 + 800059c0: 00000000 .word 0x00000000 + 800059c4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xd4b88fdf1a8d5111 + 800059c8: 000e3b03 ld x22,0(x28) + 800059cc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x2fbf96c22bb2402c + 800059d0: 000e3603 ld x12,0(x28) + 800059d4: 008e0e13 addi x28,x28,8 + +00000000800059d8 : +Zbkb_xnor_cg_cmp_rd_rs1_b22: + xnor x22, x22, x12 # perform operation + 800059d8: 40cb4b33 xnor x22,x22,x12 + # Check if x22 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x22, Zbkb_xnor_cg_cmp_rd_rs1_b22, Zbkb_xnor_cg_cmp_rd_rs1_b22_str) + 800059dc: 000eb383 ld x7,0(x29) + 800059e0: 01638c63 beq x7,x22,800059f8 + 800059e4: 3340246f jal x8,80007d18 + 800059e8: 800059d8 .word 0x800059d8 + 800059ec: 00000000 .word 0x00000000 + 800059f0: 8001714c .word 0x8001714c + 800059f4: 00000000 .word 0x00000000 + 800059f8: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0xb9bc364f0973a617 + 800059fc: 000e3b83 ld x23,0(x28) + 80005a00: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x28c8e669476e6069 + 80005a04: 000e3b03 ld x22,0(x28) + 80005a08: 008e0e13 addi x28,x28,8 + +0000000080005a0c : +Zbkb_xnor_cg_cmp_rd_rs1_b23: + xnor x23, x23, x22 # perform operation + 80005a0c: 416bcbb3 xnor x23,x23,x22 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zbkb_xnor_cg_cmp_rd_rs1_b23, Zbkb_xnor_cg_cmp_rd_rs1_b23_str) + 80005a10: 000eb383 ld x7,0(x29) + 80005a14: 01738c63 beq x7,x23,80005a2c + 80005a18: 3000246f jal x8,80007d18 + 80005a1c: 80005a0c .word 0x80005a0c + 80005a20: 00000000 .word 0x00000000 + 80005a24: 80017184 .word 0x80017184 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x08a357de490e42d7 + 80005a30: 000e3c03 ld x24,0(x28) + 80005a34: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0xc11f1419fb1364bb + 80005a38: 000e3183 ld x3,0(x28) + 80005a3c: 008e0e13 addi x28,x28,8 + +0000000080005a40 : +Zbkb_xnor_cg_cmp_rd_rs1_b24: + xnor x24, x24, x3 # perform operation + 80005a40: 403c4c33 xnor x24,x24,x3 + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zbkb_xnor_cg_cmp_rd_rs1_b24, Zbkb_xnor_cg_cmp_rd_rs1_b24_str) + 80005a44: 000eb383 ld x7,0(x29) + 80005a48: 01838c63 beq x7,x24,80005a60 + 80005a4c: 2cc0246f jal x8,80007d18 + 80005a50: 80005a40 .word 0x80005a40 + 80005a54: 00000000 .word 0x00000000 + 80005a58: 800171bc .word 0x800171bc + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x8a73066016eb4de6 + 80005a64: 000e3c83 ld x25,0(x28) + 80005a68: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0x4edf909cb1a55f3e + 80005a6c: 000e3883 ld x17,0(x28) + 80005a70: 008e0e13 addi x28,x28,8 + +0000000080005a74 : +Zbkb_xnor_cg_cmp_rd_rs1_b25: + xnor x25, x25, x17 # perform operation + 80005a74: 411cccb3 xnor x25,x25,x17 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zbkb_xnor_cg_cmp_rd_rs1_b25, Zbkb_xnor_cg_cmp_rd_rs1_b25_str) + 80005a78: 000eb383 ld x7,0(x29) + 80005a7c: 01938c63 beq x7,x25,80005a94 + 80005a80: 2980246f jal x8,80007d18 + 80005a84: 80005a74 .word 0x80005a74 + 80005a88: 00000000 .word 0x00000000 + 80005a8c: 800171f4 .word 0x800171f4 + 80005a90: 00000000 .word 0x00000000 + 80005a94: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xfbe69afdb4275ab6 + 80005a98: 000e3d03 ld x26,0(x28) + 80005a9c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x1) # load rs2: x1 = 0x46149a0d57667814 + 80005aa0: 000e3083 ld x1,0(x28) + 80005aa4: 008e0e13 addi x28,x28,8 + +0000000080005aa8 : +Zbkb_xnor_cg_cmp_rd_rs1_b26: + xnor x26, x26, x1 # perform operation + 80005aa8: 401d4d33 xnor x26,x26,x1 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zbkb_xnor_cg_cmp_rd_rs1_b26, Zbkb_xnor_cg_cmp_rd_rs1_b26_str) + 80005aac: 000eb383 ld x7,0(x29) + 80005ab0: 01a38c63 beq x7,x26,80005ac8 + 80005ab4: 2640246f jal x8,80007d18 + 80005ab8: 80005aa8 .word 0x80005aa8 + 80005abc: 00000000 .word 0x00000000 + 80005ac0: 8001722c .word 0x8001722c + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x75e958a140a7e3d9 + 80005acc: 000e3d83 ld x27,0(x28) + 80005ad0: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x5a60199c2c57f499 + 80005ad4: 000e3c03 ld x24,0(x28) + 80005ad8: 008e0e13 addi x28,x28,8 + +0000000080005adc : +Zbkb_xnor_cg_cmp_rd_rs1_b27: + xnor x27, x27, x24 # perform operation + 80005adc: 418dcdb3 xnor x27,x27,x24 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zbkb_xnor_cg_cmp_rd_rs1_b27, Zbkb_xnor_cg_cmp_rd_rs1_b27_str) + 80005ae0: 000eb383 ld x7,0(x29) + 80005ae4: 01b38c63 beq x7,x27,80005afc + 80005ae8: 2300246f jal x8,80007d18 + 80005aec: 80005adc .word 0x80005adc + 80005af0: 00000000 .word 0x00000000 + 80005af4: 80017264 .word 0x80017264 + 80005af8: 00000000 .word 0x00000000 + 80005afc: 008e8e93 addi x29,x29,8 + + mv x9, x28 # switch data pointer register to avoid conflict with test + 80005b00: 000e0493 addi x9,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xf78c43798c8e52f2 + 80005b04: 0004be03 ld x28,0(x9) + 80005b08: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xbc138d6783e459af + 80005b0c: 0004bc83 ld x25,0(x9) + 80005b10: 00848493 addi x9,x9,8 + +0000000080005b14 : +Zbkb_xnor_cg_cmp_rd_rs1_b28: + xnor x28, x28, x25 # perform operation + 80005b14: 419e4e33 xnor x28,x28,x25 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zbkb_xnor_cg_cmp_rd_rs1_b28, Zbkb_xnor_cg_cmp_rd_rs1_b28_str) + 80005b18: 000eb383 ld x7,0(x29) + 80005b1c: 01c38c63 beq x7,x28,80005b34 + 80005b20: 1f80246f jal x8,80007d18 + 80005b24: 80005b14 .word 0x80005b14 + 80005b28: 00000000 .word 0x00000000 + 80005b2c: 8001729c .word 0x8001729c + 80005b30: 00000000 .word 0x00000000 + 80005b34: 008e8e93 addi x29,x29,8 + + mv x2, x29 # switch signature pointer register to avoid conflict with test + 80005b38: 000e8113 addi x2,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xa2ca19d9d33b4678 + 80005b3c: 0004be83 ld x29,0(x9) + 80005b40: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x433e6d1750d081f6 + 80005b44: 0004b083 ld x1,0(x9) + 80005b48: 00848493 addi x9,x9,8 + +0000000080005b4c : +Zbkb_xnor_cg_cmp_rd_rs1_b29: + xnor x29, x29, x1 # perform operation + 80005b4c: 401eceb3 xnor x29,x29,x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zbkb_xnor_cg_cmp_rd_rs1_b29, Zbkb_xnor_cg_cmp_rd_rs1_b29_str) + 80005b50: 00013383 ld x7,0(x2) + 80005b54: 01d38c63 beq x7,x29,80005b6c + 80005b58: 1c00246f jal x8,80007d18 + 80005b5c: 80005b4c .word 0x80005b4c + 80005b60: 00000000 .word 0x00000000 + 80005b64: 800172d4 .word 0x800172d4 + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x2fd76626438aaece + 80005b70: 0004bf03 ld x30,0(x9) + 80005b74: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x9aca36cb8aa7dd7c + 80005b78: 0004b203 ld x4,0(x9) + 80005b7c: 00848493 addi x9,x9,8 + +0000000080005b80 : +Zbkb_xnor_cg_cmp_rd_rs1_b30: + xnor x30, x30, x4 # perform operation + 80005b80: 404f4f33 xnor x30,x30,x4 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zbkb_xnor_cg_cmp_rd_rs1_b30, Zbkb_xnor_cg_cmp_rd_rs1_b30_str) + 80005b84: 00013383 ld x7,0(x2) + 80005b88: 01e38c63 beq x7,x30,80005ba0 + 80005b8c: 18c0246f jal x8,80007d18 + 80005b90: 80005b80 .word 0x80005b80 + 80005b94: 00000000 .word 0x00000000 + 80005b98: 8001730c .word 0x8001730c + 80005b9c: 00000000 .word 0x00000000 + 80005ba0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xc2c12c44bc8115f0 + 80005ba4: 0004bf83 ld x31,0(x9) + 80005ba8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xbcfe0eb868a2d017 + 80005bac: 0004b083 ld x1,0(x9) + 80005bb0: 00848493 addi x9,x9,8 + +0000000080005bb4 : +Zbkb_xnor_cg_cmp_rd_rs1_b31: + xnor x31, x31, x1 # perform operation + 80005bb4: 401fcfb3 xnor x31,x31,x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zbkb_xnor_cg_cmp_rd_rs1_b31, Zbkb_xnor_cg_cmp_rd_rs1_b31_str) + 80005bb8: 00013383 ld x7,0(x2) + 80005bbc: 01f38c63 beq x7,x31,80005bd4 + 80005bc0: 1580246f jal x8,80007d18 + 80005bc4: 80005bb4 .word 0x80005bb4 + 80005bc8: 00000000 .word 0x00000000 + 80005bcc: 80017344 .word 0x80017344 + 80005bd0: 00000000 .word 0x00000000 + 80005bd4: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x14f34ba20f71f5e3 + 80005bd8: 0004b583 ld x11,0(x9) + 80005bdc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xdbc3a15b3cfa5dfd + 80005be0: 0004b003 ld x0,0(x9) + 80005be4: 00848493 addi x9,x9,8 + +0000000080005be8 : +Zbkb_xnor_cg_cmp_rd_rs2_b0: + xnor x0, x11, x0 # perform operation + 80005be8: 4005c033 xnor x0,x11,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x0, Zbkb_xnor_cg_cmp_rd_rs2_b0, Zbkb_xnor_cg_cmp_rd_rs2_b0_str) + 80005bec: 00013383 ld x7,0(x2) + 80005bf0: 00038c63 beq x7,x0,80005c08 + 80005bf4: 1240246f jal x8,80007d18 + 80005bf8: 80005be8 .word 0x80005be8 + 80005bfc: 00000000 .word 0x00000000 + 80005c00: 8001737c .word 0x8001737c + 80005c04: 00000000 .word 0x00000000 + 80005c08: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x2ec6b7600ea970bf + 80005c0c: 0004b303 ld x6,0(x9) + 80005c10: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x6d0a30600149912d + 80005c14: 0004b083 ld x1,0(x9) + 80005c18: 00848493 addi x9,x9,8 + +0000000080005c1c : +Zbkb_xnor_cg_cmp_rd_rs2_b1: + xnor x1, x6, x1 # perform operation + 80005c1c: 401340b3 xnor x1,x6,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zbkb_xnor_cg_cmp_rd_rs2_b1, Zbkb_xnor_cg_cmp_rd_rs2_b1_str) + 80005c20: 00013383 ld x7,0(x2) + 80005c24: 00138c63 beq x7,x1,80005c3c + 80005c28: 0f00246f jal x8,80007d18 + 80005c2c: 80005c1c .word 0x80005c1c + 80005c30: 00000000 .word 0x00000000 + 80005c34: 800173b3 .word 0x800173b3 + 80005c38: 00000000 .word 0x00000000 + 80005c3c: 00810113 addi x2,x2,8 + + mv x10, x2 # switch signature pointer register to avoid conflict with test + 80005c40: 00010513 addi x10,x2,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x8b9b79dc1f66ed05 + 80005c44: 0004b183 ld x3,0(x9) + 80005c48: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xa8f7cf390d063020 + 80005c4c: 0004b103 ld x2,0(x9) + 80005c50: 00848493 addi x9,x9,8 + +0000000080005c54 : +Zbkb_xnor_cg_cmp_rd_rs2_b2: + xnor x2, x3, x2 # perform operation + 80005c54: 4021c133 xnor x2,x3,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkb_xnor_cg_cmp_rd_rs2_b2, Zbkb_xnor_cg_cmp_rd_rs2_b2_str) + 80005c58: 00053383 ld x7,0(x10) + 80005c5c: 00238c63 beq x7,x2,80005c74 + 80005c60: 0b80246f jal x8,80007d18 + 80005c64: 80005c54 .word 0x80005c54 + 80005c68: 00000000 .word 0x00000000 + 80005c6c: 800173ea .word 0x800173ea + 80005c70: 00000000 .word 0x00000000 + 80005c74: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x8c701d417082d100 + 80005c78: 0004bb83 ld x23,0(x9) + 80005c7c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xba80925b4d86ab48 + 80005c80: 0004b183 ld x3,0(x9) + 80005c84: 00848493 addi x9,x9,8 + +0000000080005c88 : +Zbkb_xnor_cg_cmp_rd_rs2_b3: + xnor x3, x23, x3 # perform operation + 80005c88: 403bc1b3 xnor x3,x23,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkb_xnor_cg_cmp_rd_rs2_b3, Zbkb_xnor_cg_cmp_rd_rs2_b3_str) + 80005c8c: 00053383 ld x7,0(x10) + 80005c90: 00338c63 beq x7,x3,80005ca8 + 80005c94: 0840246f jal x8,80007d18 + 80005c98: 80005c88 .word 0x80005c88 + 80005c9c: 00000000 .word 0x00000000 + 80005ca0: 80017421 .word 0x80017421 + 80005ca4: 00000000 .word 0x00000000 + 80005ca8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xbf625d0e6b883850 + 80005cac: 0004b583 ld x11,0(x9) + 80005cb0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xe76912fb3ddfa98d + 80005cb4: 0004b203 ld x4,0(x9) + 80005cb8: 00848493 addi x9,x9,8 + +0000000080005cbc : +Zbkb_xnor_cg_cmp_rd_rs2_b4: + xnor x4, x11, x4 # perform operation + 80005cbc: 4045c233 xnor x4,x11,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkb_xnor_cg_cmp_rd_rs2_b4, Zbkb_xnor_cg_cmp_rd_rs2_b4_str) + 80005cc0: 00053383 ld x7,0(x10) + 80005cc4: 00438c63 beq x7,x4,80005cdc + 80005cc8: 0500246f jal x8,80007d18 + 80005ccc: 80005cbc .word 0x80005cbc + 80005cd0: 00000000 .word 0x00000000 + 80005cd4: 80017458 .word 0x80017458 + 80005cd8: 00000000 .word 0x00000000 + 80005cdc: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xe8bffc9a293386be + 80005ce0: 0004b803 ld x16,0(x9) + 80005ce4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x1e5ba0b110a575a4 + 80005ce8: 0004b283 ld x5,0(x9) + 80005cec: 00848493 addi x9,x9,8 + +0000000080005cf0 : +Zbkb_xnor_cg_cmp_rd_rs2_b5: + xnor x5, x16, x5 # perform operation + 80005cf0: 405842b3 xnor x5,x16,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkb_xnor_cg_cmp_rd_rs2_b5, Zbkb_xnor_cg_cmp_rd_rs2_b5_str) + 80005cf4: 00053383 ld x7,0(x10) + 80005cf8: 00538c63 beq x7,x5,80005d10 + 80005cfc: 01c0246f jal x8,80007d18 + 80005d00: 80005cf0 .word 0x80005cf0 + 80005d04: 00000000 .word 0x00000000 + 80005d08: 8001748f .word 0x8001748f + 80005d0c: 00000000 .word 0x00000000 + 80005d10: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xf4a7fcab7224305b + 80005d14: 0004bf83 ld x31,0(x9) + 80005d18: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x29694dce8ae8ae8e + 80005d1c: 0004b303 ld x6,0(x9) + 80005d20: 00848493 addi x9,x9,8 + +0000000080005d24 : +Zbkb_xnor_cg_cmp_rd_rs2_b6: + xnor x6, x31, x6 # perform operation + 80005d24: 406fc333 xnor x6,x31,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkb_xnor_cg_cmp_rd_rs2_b6, Zbkb_xnor_cg_cmp_rd_rs2_b6_str) + 80005d28: 00053383 ld x7,0(x10) + 80005d2c: 00638c63 beq x7,x6,80005d44 + 80005d30: 7e90146f jal x8,80007d18 + 80005d34: 80005d24 .word 0x80005d24 + 80005d38: 00000000 .word 0x00000000 + 80005d3c: 800174c6 .word 0x800174c6 + 80005d40: 00000000 .word 0x00000000 + 80005d44: 00850513 addi x10,x10,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005d48: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005d4c: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x59cdac91e93bc7da + 80005d50: 0004bf83 ld x31,0(x9) + 80005d54: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x888061ec83f2a79f + 80005d58: 0004b383 ld x7,0(x9) + 80005d5c: 00848493 addi x9,x9,8 + +0000000080005d60 : +Zbkb_xnor_cg_cmp_rd_rs2_b7: + xnor x7, x31, x7 # perform operation + 80005d60: 407fc3b3 xnor x7,x31,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkb_xnor_cg_cmp_rd_rs2_b7, Zbkb_xnor_cg_cmp_rd_rs2_b7_str) + 80005d64: 00053203 ld x4,0(x10) + 80005d68: 00720c63 beq x4,x7,80005d80 + 80005d6c: 795012ef jal x5,80007d00 + 80005d70: 80005d60 .word 0x80005d60 + 80005d74: 00000000 .word 0x00000000 + 80005d78: 800174fd .word 0x800174fd + 80005d7c: 00000000 .word 0x00000000 + 80005d80: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x1bb7799b27e882bd + 80005d84: 0004b703 ld x14,0(x9) + 80005d88: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x36b22e0dd12ea8b3 + 80005d8c: 0004b403 ld x8,0(x9) + 80005d90: 00848493 addi x9,x9,8 + +0000000080005d94 : +Zbkb_xnor_cg_cmp_rd_rs2_b8: + xnor x8, x14, x8 # perform operation + 80005d94: 40874433 xnor x8,x14,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zbkb_xnor_cg_cmp_rd_rs2_b8, Zbkb_xnor_cg_cmp_rd_rs2_b8_str) + 80005d98: 00053203 ld x4,0(x10) + 80005d9c: 00820c63 beq x4,x8,80005db4 + 80005da0: 761012ef jal x5,80007d00 + 80005da4: 80005d94 .word 0x80005d94 + 80005da8: 00000000 .word 0x00000000 + 80005dac: 80017534 .word 0x80017534 + 80005db0: 00000000 .word 0x00000000 + 80005db4: 00850513 addi x10,x10,8 + + mv x21, x9 # switch data pointer register to avoid conflict with test + 80005db8: 00048a93 addi x21,x9,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x339c16f6aa7893e7 + 80005dbc: 000abb83 ld x23,0(x21) + 80005dc0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x2bc769f676cc6f77 + 80005dc4: 000ab483 ld x9,0(x21) + 80005dc8: 008a8a93 addi x21,x21,8 + +0000000080005dcc : +Zbkb_xnor_cg_cmp_rd_rs2_b9: + xnor x9, x23, x9 # perform operation + 80005dcc: 409bc4b3 xnor x9,x23,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zbkb_xnor_cg_cmp_rd_rs2_b9, Zbkb_xnor_cg_cmp_rd_rs2_b9_str) + 80005dd0: 00053203 ld x4,0(x10) + 80005dd4: 00920c63 beq x4,x9,80005dec + 80005dd8: 729012ef jal x5,80007d00 + 80005ddc: 80005dcc .word 0x80005dcc + 80005de0: 00000000 .word 0x00000000 + 80005de4: 8001756b .word 0x8001756b + 80005de8: 00000000 .word 0x00000000 + 80005dec: 00850513 addi x10,x10,8 + + mv x23, x10 # switch signature pointer register to avoid conflict with test + 80005df0: 00050b93 addi x23,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x6c1f532039ac96d2 + 80005df4: 000ab403 ld x8,0(x21) + 80005df8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x0340d71ef1e4e190 + 80005dfc: 000ab503 ld x10,0(x21) + 80005e00: 008a8a93 addi x21,x21,8 + +0000000080005e04 : +Zbkb_xnor_cg_cmp_rd_rs2_b10: + xnor x10, x8, x10 # perform operation + 80005e04: 40a44533 xnor x10,x8,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zbkb_xnor_cg_cmp_rd_rs2_b10, Zbkb_xnor_cg_cmp_rd_rs2_b10_str) + 80005e08: 000bb203 ld x4,0(x23) + 80005e0c: 00a20c63 beq x4,x10,80005e24 + 80005e10: 6f1012ef jal x5,80007d00 + 80005e14: 80005e04 .word 0x80005e04 + 80005e18: 00000000 .word 0x00000000 + 80005e1c: 800175a2 .word 0x800175a2 + 80005e20: 00000000 .word 0x00000000 + 80005e24: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x5572bbfb8186982d + 80005e28: 000ab703 ld x14,0(x21) + 80005e2c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x813f550a535371c1 + 80005e30: 000ab583 ld x11,0(x21) + 80005e34: 008a8a93 addi x21,x21,8 + +0000000080005e38 : +Zbkb_xnor_cg_cmp_rd_rs2_b11: + xnor x11, x14, x11 # perform operation + 80005e38: 40b745b3 xnor x11,x14,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zbkb_xnor_cg_cmp_rd_rs2_b11, Zbkb_xnor_cg_cmp_rd_rs2_b11_str) + 80005e3c: 000bb203 ld x4,0(x23) + 80005e40: 00b20c63 beq x4,x11,80005e58 + 80005e44: 6bd012ef jal x5,80007d00 + 80005e48: 80005e38 .word 0x80005e38 + 80005e4c: 00000000 .word 0x00000000 + 80005e50: 800175da .word 0x800175da + 80005e54: 00000000 .word 0x00000000 + 80005e58: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xc43f720eeff3cfb5 + 80005e5c: 000ab803 ld x16,0(x21) + 80005e60: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x375a8e94d0677e77 + 80005e64: 000ab603 ld x12,0(x21) + 80005e68: 008a8a93 addi x21,x21,8 + +0000000080005e6c : +Zbkb_xnor_cg_cmp_rd_rs2_b12: + xnor x12, x16, x12 # perform operation + 80005e6c: 40c84633 xnor x12,x16,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zbkb_xnor_cg_cmp_rd_rs2_b12, Zbkb_xnor_cg_cmp_rd_rs2_b12_str) + 80005e70: 000bb203 ld x4,0(x23) + 80005e74: 00c20c63 beq x4,x12,80005e8c + 80005e78: 689012ef jal x5,80007d00 + 80005e7c: 80005e6c .word 0x80005e6c + 80005e80: 00000000 .word 0x00000000 + 80005e84: 80017612 .word 0x80017612 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xbe08dff506ab8f38 + 80005e90: 000abf03 ld x30,0(x21) + 80005e94: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xcc82b7de3f80f031 + 80005e98: 000ab683 ld x13,0(x21) + 80005e9c: 008a8a93 addi x21,x21,8 + +0000000080005ea0 : +Zbkb_xnor_cg_cmp_rd_rs2_b13: + xnor x13, x30, x13 # perform operation + 80005ea0: 40df46b3 xnor x13,x30,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkb_xnor_cg_cmp_rd_rs2_b13, Zbkb_xnor_cg_cmp_rd_rs2_b13_str) + 80005ea4: 000bb203 ld x4,0(x23) + 80005ea8: 00d20c63 beq x4,x13,80005ec0 + 80005eac: 655012ef jal x5,80007d00 + 80005eb0: 80005ea0 .word 0x80005ea0 + 80005eb4: 00000000 .word 0x00000000 + 80005eb8: 8001764a .word 0x8001764a + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x4ef106f41643b140 + 80005ec4: 000abc03 ld x24,0(x21) + 80005ec8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x2fae087a190d44b1 + 80005ecc: 000ab703 ld x14,0(x21) + 80005ed0: 008a8a93 addi x21,x21,8 + +0000000080005ed4 : +Zbkb_xnor_cg_cmp_rd_rs2_b14: + xnor x14, x24, x14 # perform operation + 80005ed4: 40ec4733 xnor x14,x24,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkb_xnor_cg_cmp_rd_rs2_b14, Zbkb_xnor_cg_cmp_rd_rs2_b14_str) + 80005ed8: 000bb203 ld x4,0(x23) + 80005edc: 00e20c63 beq x4,x14,80005ef4 + 80005ee0: 621012ef jal x5,80007d00 + 80005ee4: 80005ed4 .word 0x80005ed4 + 80005ee8: 00000000 .word 0x00000000 + 80005eec: 80017682 .word 0x80017682 + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xc8dd81fc92f4ea2f + 80005ef8: 000abc83 ld x25,0(x21) + 80005efc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xbc2f8886aa6dee14 + 80005f00: 000ab783 ld x15,0(x21) + 80005f04: 008a8a93 addi x21,x21,8 + +0000000080005f08 : +Zbkb_xnor_cg_cmp_rd_rs2_b15: + xnor x15, x25, x15 # perform operation + 80005f08: 40fcc7b3 xnor x15,x25,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkb_xnor_cg_cmp_rd_rs2_b15, Zbkb_xnor_cg_cmp_rd_rs2_b15_str) + 80005f0c: 000bb203 ld x4,0(x23) + 80005f10: 00f20c63 beq x4,x15,80005f28 + 80005f14: 5ed012ef jal x5,80007d00 + 80005f18: 80005f08 .word 0x80005f08 + 80005f1c: 00000000 .word 0x00000000 + 80005f20: 800176ba .word 0x800176ba + 80005f24: 00000000 .word 0x00000000 + 80005f28: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x5ed412dbb5f187d5 + 80005f2c: 000ab383 ld x7,0(x21) + 80005f30: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x080b2fecc4674376 + 80005f34: 000ab803 ld x16,0(x21) + 80005f38: 008a8a93 addi x21,x21,8 + +0000000080005f3c : +Zbkb_xnor_cg_cmp_rd_rs2_b16: + xnor x16, x7, x16 # perform operation + 80005f3c: 4103c833 xnor x16,x7,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkb_xnor_cg_cmp_rd_rs2_b16, Zbkb_xnor_cg_cmp_rd_rs2_b16_str) + 80005f40: 000bb203 ld x4,0(x23) + 80005f44: 01020c63 beq x4,x16,80005f5c + 80005f48: 5b9012ef jal x5,80007d00 + 80005f4c: 80005f3c .word 0x80005f3c + 80005f50: 00000000 .word 0x00000000 + 80005f54: 800176f2 .word 0x800176f2 + 80005f58: 00000000 .word 0x00000000 + 80005f5c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x524779100bc2de5f + 80005f60: 000ab403 ld x8,0(x21) + 80005f64: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xd08500e0e042134b + 80005f68: 000ab883 ld x17,0(x21) + 80005f6c: 008a8a93 addi x21,x21,8 + +0000000080005f70 : +Zbkb_xnor_cg_cmp_rd_rs2_b17: + xnor x17, x8, x17 # perform operation + 80005f70: 411448b3 xnor x17,x8,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkb_xnor_cg_cmp_rd_rs2_b17, Zbkb_xnor_cg_cmp_rd_rs2_b17_str) + 80005f74: 000bb203 ld x4,0(x23) + 80005f78: 01120c63 beq x4,x17,80005f90 + 80005f7c: 585012ef jal x5,80007d00 + 80005f80: 80005f70 .word 0x80005f70 + 80005f84: 00000000 .word 0x00000000 + 80005f88: 8001772a .word 0x8001772a + 80005f8c: 00000000 .word 0x00000000 + 80005f90: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x7b5281187ba77bc1 + 80005f94: 000ab683 ld x13,0(x21) + 80005f98: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x4f689f5006ec3011 + 80005f9c: 000ab903 ld x18,0(x21) + 80005fa0: 008a8a93 addi x21,x21,8 + +0000000080005fa4 : +Zbkb_xnor_cg_cmp_rd_rs2_b18: + xnor x18, x13, x18 # perform operation + 80005fa4: 4126c933 xnor x18,x13,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkb_xnor_cg_cmp_rd_rs2_b18, Zbkb_xnor_cg_cmp_rd_rs2_b18_str) + 80005fa8: 000bb203 ld x4,0(x23) + 80005fac: 01220c63 beq x4,x18,80005fc4 + 80005fb0: 551012ef jal x5,80007d00 + 80005fb4: 80005fa4 .word 0x80005fa4 + 80005fb8: 00000000 .word 0x00000000 + 80005fbc: 80017762 .word 0x80017762 + 80005fc0: 00000000 .word 0x00000000 + 80005fc4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x02c70aa4fd790149 + 80005fc8: 000ab103 ld x2,0(x21) + 80005fcc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x2e9148eede67be78 + 80005fd0: 000ab983 ld x19,0(x21) + 80005fd4: 008a8a93 addi x21,x21,8 + +0000000080005fd8 : +Zbkb_xnor_cg_cmp_rd_rs2_b19: + xnor x19, x2, x19 # perform operation + 80005fd8: 413149b3 xnor x19,x2,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkb_xnor_cg_cmp_rd_rs2_b19, Zbkb_xnor_cg_cmp_rd_rs2_b19_str) + 80005fdc: 000bb203 ld x4,0(x23) + 80005fe0: 01320c63 beq x4,x19,80005ff8 + 80005fe4: 51d012ef jal x5,80007d00 + 80005fe8: 80005fd8 .word 0x80005fd8 + 80005fec: 00000000 .word 0x00000000 + 80005ff0: 8001779a .word 0x8001779a + 80005ff4: 00000000 .word 0x00000000 + 80005ff8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x962d5687e59ed6cf + 80005ffc: 000ab703 ld x14,0(x21) + 80006000: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x6f77799ff9dd85fe + 80006004: 000aba03 ld x20,0(x21) + 80006008: 008a8a93 addi x21,x21,8 + +000000008000600c : +Zbkb_xnor_cg_cmp_rd_rs2_b20: + xnor x20, x14, x20 # perform operation + 8000600c: 41474a33 xnor x20,x14,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkb_xnor_cg_cmp_rd_rs2_b20, Zbkb_xnor_cg_cmp_rd_rs2_b20_str) + 80006010: 000bb203 ld x4,0(x23) + 80006014: 01420c63 beq x4,x20,8000602c + 80006018: 4e9012ef jal x5,80007d00 + 8000601c: 8000600c .word 0x8000600c + 80006020: 00000000 .word 0x00000000 + 80006024: 800177d2 .word 0x800177d2 + 80006028: 00000000 .word 0x00000000 + 8000602c: 008b8b93 addi x23,x23,8 + + mv x22, x21 # switch data pointer register to avoid conflict with test + 80006030: 000a8b13 addi x22,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xa0882e9869171622 + 80006034: 000b3703 ld x14,0(x22) + 80006038: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x86c0b3200176b959 + 8000603c: 000b3a83 ld x21,0(x22) + 80006040: 008b0b13 addi x22,x22,8 + +0000000080006044 : +Zbkb_xnor_cg_cmp_rd_rs2_b21: + xnor x21, x14, x21 # perform operation + 80006044: 41574ab3 xnor x21,x14,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkb_xnor_cg_cmp_rd_rs2_b21, Zbkb_xnor_cg_cmp_rd_rs2_b21_str) + 80006048: 000bb203 ld x4,0(x23) + 8000604c: 01520c63 beq x4,x21,80006064 + 80006050: 4b1012ef jal x5,80007d00 + 80006054: 80006044 .word 0x80006044 + 80006058: 00000000 .word 0x00000000 + 8000605c: 8001780a .word 0x8001780a + 80006060: 00000000 .word 0x00000000 + 80006064: 008b8b93 addi x23,x23,8 + + mv x28, x22 # switch data pointer register to avoid conflict with test + 80006068: 000b0e13 addi x28,x22,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x1daa48977a67d457 + 8000606c: 000e3d03 ld x26,0(x28) + 80006070: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0xc08376fd2e9a1331 + 80006074: 000e3b03 ld x22,0(x28) + 80006078: 008e0e13 addi x28,x28,8 + +000000008000607c : +Zbkb_xnor_cg_cmp_rd_rs2_b22: + xnor x22, x26, x22 # perform operation + 8000607c: 416d4b33 xnor x22,x26,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkb_xnor_cg_cmp_rd_rs2_b22, Zbkb_xnor_cg_cmp_rd_rs2_b22_str) + 80006080: 000bb203 ld x4,0(x23) + 80006084: 01620c63 beq x4,x22,8000609c + 80006088: 479012ef jal x5,80007d00 + 8000608c: 8000607c .word 0x8000607c + 80006090: 00000000 .word 0x00000000 + 80006094: 80017842 .word 0x80017842 + 80006098: 00000000 .word 0x00000000 + 8000609c: 008b8b93 addi x23,x23,8 + + mv x21, x23 # switch signature pointer register to avoid conflict with test + 800060a0: 000b8a93 addi x21,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0xc4659838a80461d7 + 800060a4: 000e3483 ld x9,0(x28) + 800060a8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x40e445bb4d6ef722 + 800060ac: 000e3b83 ld x23,0(x28) + 800060b0: 008e0e13 addi x28,x28,8 + +00000000800060b4 : +Zbkb_xnor_cg_cmp_rd_rs2_b23: + xnor x23, x9, x23 # perform operation + 800060b4: 4174cbb3 xnor x23,x9,x23 + # Check if x23 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x23, Zbkb_xnor_cg_cmp_rd_rs2_b23, Zbkb_xnor_cg_cmp_rd_rs2_b23_str) + 800060b8: 000ab203 ld x4,0(x21) + 800060bc: 01720c63 beq x4,x23,800060d4 + 800060c0: 441012ef jal x5,80007d00 + 800060c4: 800060b4 .word 0x800060b4 + 800060c8: 00000000 .word 0x00000000 + 800060cc: 8001787a .word 0x8001787a + 800060d0: 00000000 .word 0x00000000 + 800060d4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0x7a669ffb8647f95d + 800060d8: 000e3a03 ld x20,0(x28) + 800060dc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xc4ebb30d35bf3f98 + 800060e0: 000e3c03 ld x24,0(x28) + 800060e4: 008e0e13 addi x28,x28,8 + +00000000800060e8 : +Zbkb_xnor_cg_cmp_rd_rs2_b24: + xnor x24, x20, x24 # perform operation + 800060e8: 418a4c33 xnor x24,x20,x24 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zbkb_xnor_cg_cmp_rd_rs2_b24, Zbkb_xnor_cg_cmp_rd_rs2_b24_str) + 800060ec: 000ab203 ld x4,0(x21) + 800060f0: 01820c63 beq x4,x24,80006108 + 800060f4: 40d012ef jal x5,80007d00 + 800060f8: 800060e8 .word 0x800060e8 + 800060fc: 00000000 .word 0x00000000 + 80006100: 800178b2 .word 0x800178b2 + 80006104: 00000000 .word 0x00000000 + 80006108: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x454c6a6beae122d6 + 8000610c: 000e3583 ld x11,0(x28) + 80006110: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0xe4084ef47ee4e2be + 80006114: 000e3c83 ld x25,0(x28) + 80006118: 008e0e13 addi x28,x28,8 + +000000008000611c : +Zbkb_xnor_cg_cmp_rd_rs2_b25: + xnor x25, x11, x25 # perform operation + 8000611c: 4195ccb3 xnor x25,x11,x25 + # Check if x25 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x25, Zbkb_xnor_cg_cmp_rd_rs2_b25, Zbkb_xnor_cg_cmp_rd_rs2_b25_str) + 80006120: 000ab203 ld x4,0(x21) + 80006124: 01920c63 beq x4,x25,8000613c + 80006128: 3d9012ef jal x5,80007d00 + 8000612c: 8000611c .word 0x8000611c + 80006130: 00000000 .word 0x00000000 + 80006134: 800178ea .word 0x800178ea + 80006138: 00000000 .word 0x00000000 + 8000613c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0x6e6e21391b94efef + 80006140: 000e3583 ld x11,0(x28) + 80006144: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0xafe9a75a9055d7a2 + 80006148: 000e3d03 ld x26,0(x28) + 8000614c: 008e0e13 addi x28,x28,8 + +0000000080006150 : +Zbkb_xnor_cg_cmp_rd_rs2_b26: + xnor x26, x11, x26 # perform operation + 80006150: 41a5cd33 xnor x26,x11,x26 + # Check if x26 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x26, Zbkb_xnor_cg_cmp_rd_rs2_b26, Zbkb_xnor_cg_cmp_rd_rs2_b26_str) + 80006154: 000ab203 ld x4,0(x21) + 80006158: 01a20c63 beq x4,x26,80006170 + 8000615c: 3a5012ef jal x5,80007d00 + 80006160: 80006150 .word 0x80006150 + 80006164: 00000000 .word 0x00000000 + 80006168: 80017922 .word 0x80017922 + 8000616c: 00000000 .word 0x00000000 + 80006170: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x9) # load rs1: x9 = 0x99bc5e5fe615e6ff + 80006174: 000e3483 ld x9,0(x28) + 80006178: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0x9b6f9d05f3c68241 + 8000617c: 000e3d83 ld x27,0(x28) + 80006180: 008e0e13 addi x28,x28,8 + +0000000080006184 : +Zbkb_xnor_cg_cmp_rd_rs2_b27: + xnor x27, x9, x27 # perform operation + 80006184: 41b4cdb3 xnor x27,x9,x27 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zbkb_xnor_cg_cmp_rd_rs2_b27, Zbkb_xnor_cg_cmp_rd_rs2_b27_str) + 80006188: 000ab203 ld x4,0(x21) + 8000618c: 01b20c63 beq x4,x27,800061a4 + 80006190: 371012ef jal x5,80007d00 + 80006194: 80006184 .word 0x80006184 + 80006198: 00000000 .word 0x00000000 + 8000619c: 8001795a .word 0x8001795a + 800061a0: 00000000 .word 0x00000000 + 800061a4: 008a8a93 addi x21,x21,8 + + mv x20, x28 # switch data pointer register to avoid conflict with test + 800061a8: 000e0a13 addi x20,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x080e266b8cf2948c + 800061ac: 000a3103 ld x2,0(x20) + 800061b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x978fb98ce32afcc6 + 800061b4: 000a3e03 ld x28,0(x20) + 800061b8: 008a0a13 addi x20,x20,8 + +00000000800061bc : +Zbkb_xnor_cg_cmp_rd_rs2_b28: + xnor x28, x2, x28 # perform operation + 800061bc: 41c14e33 xnor x28,x2,x28 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zbkb_xnor_cg_cmp_rd_rs2_b28, Zbkb_xnor_cg_cmp_rd_rs2_b28_str) + 800061c0: 000ab203 ld x4,0(x21) + 800061c4: 01c20c63 beq x4,x28,800061dc + 800061c8: 339012ef jal x5,80007d00 + 800061cc: 800061bc .word 0x800061bc + 800061d0: 00000000 .word 0x00000000 + 800061d4: 80017992 .word 0x80017992 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x9d4564b7aaba1d4a + 800061e0: 000a3383 ld x7,0(x20) + 800061e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xa5ac91201a4bc011 + 800061e8: 000a3e83 ld x29,0(x20) + 800061ec: 008a0a13 addi x20,x20,8 + +00000000800061f0 : +Zbkb_xnor_cg_cmp_rd_rs2_b29: + xnor x29, x7, x29 # perform operation + 800061f0: 41d3ceb3 xnor x29,x7,x29 + # Check if x29 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x29, Zbkb_xnor_cg_cmp_rd_rs2_b29, Zbkb_xnor_cg_cmp_rd_rs2_b29_str) + 800061f4: 000ab203 ld x4,0(x21) + 800061f8: 01d20c63 beq x4,x29,80006210 + 800061fc: 305012ef jal x5,80007d00 + 80006200: 800061f0 .word 0x800061f0 + 80006204: 00000000 .word 0x00000000 + 80006208: 800179ca .word 0x800179ca + 8000620c: 00000000 .word 0x00000000 + 80006210: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x85af1784309707b9 + 80006214: 000a3903 ld x18,0(x20) + 80006218: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0xb600d53771727a08 + 8000621c: 000a3f03 ld x30,0(x20) + 80006220: 008a0a13 addi x20,x20,8 + +0000000080006224 : +Zbkb_xnor_cg_cmp_rd_rs2_b30: + xnor x30, x18, x30 # perform operation + 80006224: 41e94f33 xnor x30,x18,x30 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zbkb_xnor_cg_cmp_rd_rs2_b30, Zbkb_xnor_cg_cmp_rd_rs2_b30_str) + 80006228: 000ab203 ld x4,0(x21) + 8000622c: 01e20c63 beq x4,x30,80006244 + 80006230: 2d1012ef jal x5,80007d00 + 80006234: 80006224 .word 0x80006224 + 80006238: 00000000 .word 0x00000000 + 8000623c: 80017a02 .word 0x80017a02 + 80006240: 00000000 .word 0x00000000 + 80006244: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xa29bc778bb355685 + 80006248: 000a3783 ld x15,0(x20) + 8000624c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x06818e85ffada603 + 80006250: 000a3f83 ld x31,0(x20) + 80006254: 008a0a13 addi x20,x20,8 + +0000000080006258 : +Zbkb_xnor_cg_cmp_rd_rs2_b31: + xnor x31, x15, x31 # perform operation + 80006258: 41f7cfb3 xnor x31,x15,x31 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zbkb_xnor_cg_cmp_rd_rs2_b31, Zbkb_xnor_cg_cmp_rd_rs2_b31_str) + 8000625c: 000ab203 ld x4,0(x21) + 80006260: 01f20c63 beq x4,x31,80006278 + 80006264: 29d012ef jal x5,80007d00 + 80006268: 80006258 .word 0x80006258 + 8000626c: 00000000 .word 0x00000000 + 80006270: 80017a3a .word 0x80017a3a + 80006274: 00000000 .word 0x00000000 + 80006278: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0xa8353faacc5e2135 + 8000627c: 000a3003 ld x0,0(x20) + 80006280: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x28526e0a3aea2639 + 80006284: 000a3003 ld x0,0(x20) + 80006288: 008a0a13 addi x20,x20,8 + +000000008000628c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0: + xnor x0, x0, x0 # perform operation + 8000628c: 40004033 xnor x0,x0,x0 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b0_str) + 80006290: 000ab203 ld x4,0(x21) + 80006294: 00020c63 beq x4,x0,800062ac + 80006298: 269012ef jal x5,80007d00 + 8000629c: 8000628c .word 0x8000628c + 800062a0: 00000000 .word 0x00000000 + 800062a4: 80017a72 .word 0x80017a72 + 800062a8: 00000000 .word 0x00000000 + 800062ac: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xf10d0a303cd86cba + 800062b0: 000a3083 ld x1,0(x20) + 800062b4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xae2391f2daea0922 + 800062b8: 000a3083 ld x1,0(x20) + 800062bc: 008a0a13 addi x20,x20,8 + +00000000800062c0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1: + xnor x1, x1, x1 # perform operation + 800062c0: 4010c0b3 xnor x1,x1,x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b1_str) + 800062c4: 000ab203 ld x4,0(x21) + 800062c8: 00120c63 beq x4,x1,800062e0 + 800062cc: 235012ef jal x5,80007d00 + 800062d0: 800062c0 .word 0x800062c0 + 800062d4: 00000000 .word 0x00000000 + 800062d8: 80017aad .word 0x80017aad + 800062dc: 00000000 .word 0x00000000 + 800062e0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xb31fb4a2f44e3939 + 800062e4: 000a3103 ld x2,0(x20) + 800062e8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x3a1fc9019e0cfb30 + 800062ec: 000a3103 ld x2,0(x20) + 800062f0: 008a0a13 addi x20,x20,8 + +00000000800062f4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2: + xnor x2, x2, x2 # perform operation + 800062f4: 40214133 xnor x2,x2,x2 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b2_str) + 800062f8: 000ab203 ld x4,0(x21) + 800062fc: 00220c63 beq x4,x2,80006314 + 80006300: 201012ef jal x5,80007d00 + 80006304: 800062f4 .word 0x800062f4 + 80006308: 00000000 .word 0x00000000 + 8000630c: 80017ae8 .word 0x80017ae8 + 80006310: 00000000 .word 0x00000000 + 80006314: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x4a3f79c9233b8917 + 80006318: 000a3183 ld x3,0(x20) + 8000631c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xcdea9930fe4b5874 + 80006320: 000a3183 ld x3,0(x20) + 80006324: 008a0a13 addi x20,x20,8 + +0000000080006328 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3: + xnor x3, x3, x3 # perform operation + 80006328: 4031c1b3 xnor x3,x3,x3 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b3_str) + 8000632c: 000ab203 ld x4,0(x21) + 80006330: 00320c63 beq x4,x3,80006348 + 80006334: 1cd012ef jal x5,80007d00 + 80006338: 80006328 .word 0x80006328 + 8000633c: 00000000 .word 0x00000000 + 80006340: 80017b23 .word 0x80017b23 + 80006344: 00000000 .word 0x00000000 + 80006348: 008a8a93 addi x21,x21,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 8000634c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80006350: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x170a1c9077fc841d + 80006354: 000a3203 ld x4,0(x20) + 80006358: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x1338a460de0ae10e + 8000635c: 000a3203 ld x4,0(x20) + 80006360: 008a0a13 addi x20,x20,8 + +0000000080006364 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4: + xnor x4, x4, x4 # perform operation + 80006364: 40424233 xnor x4,x4,x4 + # Check if x4 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x4, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b4_str) + 80006368: 000ab683 ld x13,0(x21) + 8000636c: 00468c63 beq x13,x4,80006384 + 80006370: 1d10176f jal x14,80007d40 + 80006374: 80006364 .word 0x80006364 + 80006378: 00000000 .word 0x00000000 + 8000637c: 80017b5e .word 0x80017b5e + 80006380: 00000000 .word 0x00000000 + 80006384: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x7d509dc9d1e7f576 + 80006388: 000a3283 ld x5,0(x20) + 8000638c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x42db9cdc18f79a4f + 80006390: 000a3283 ld x5,0(x20) + 80006394: 008a0a13 addi x20,x20,8 + +0000000080006398 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5: + xnor x5, x5, x5 # perform operation + 80006398: 4052c2b3 xnor x5,x5,x5 + # Check if x5 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x5, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b5_str) + 8000639c: 000ab683 ld x13,0(x21) + 800063a0: 00568c63 beq x13,x5,800063b8 + 800063a4: 19d0176f jal x14,80007d40 + 800063a8: 80006398 .word 0x80006398 + 800063ac: 00000000 .word 0x00000000 + 800063b0: 80017b99 .word 0x80017b99 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x272e116831f098eb + 800063bc: 000a3303 ld x6,0(x20) + 800063c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x060f20f94327766e + 800063c4: 000a3303 ld x6,0(x20) + 800063c8: 008a0a13 addi x20,x20,8 + +00000000800063cc : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6: + xnor x6, x6, x6 # perform operation + 800063cc: 40634333 xnor x6,x6,x6 + # Check if x6 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x6, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b6_str) + 800063d0: 000ab683 ld x13,0(x21) + 800063d4: 00668c63 beq x13,x6,800063ec + 800063d8: 1690176f jal x14,80007d40 + 800063dc: 800063cc .word 0x800063cc + 800063e0: 00000000 .word 0x00000000 + 800063e4: 80017bd4 .word 0x80017bd4 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x90f4032de1fbe28d + 800063f0: 000a3383 ld x7,0(x20) + 800063f4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xf90de0739ace8261 + 800063f8: 000a3383 ld x7,0(x20) + 800063fc: 008a0a13 addi x20,x20,8 + +0000000080006400 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7: + xnor x7, x7, x7 # perform operation + 80006400: 4073c3b3 xnor x7,x7,x7 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b7_str) + 80006404: 000ab683 ld x13,0(x21) + 80006408: 00768c63 beq x13,x7,80006420 + 8000640c: 1350176f jal x14,80007d40 + 80006410: 80006400 .word 0x80006400 + 80006414: 00000000 .word 0x00000000 + 80006418: 80017c0f .word 0x80017c0f + 8000641c: 00000000 .word 0x00000000 + 80006420: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x89a18a3906ad10bf + 80006424: 000a3403 ld x8,0(x20) + 80006428: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x1a8d047b62cdec47 + 8000642c: 000a3403 ld x8,0(x20) + 80006430: 008a0a13 addi x20,x20,8 + +0000000080006434 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8: + xnor x8, x8, x8 # perform operation + 80006434: 40844433 xnor x8,x8,x8 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b8_str) + 80006438: 000ab683 ld x13,0(x21) + 8000643c: 00868c63 beq x13,x8,80006454 + 80006440: 1010176f jal x14,80007d40 + 80006444: 80006434 .word 0x80006434 + 80006448: 00000000 .word 0x00000000 + 8000644c: 80017c4a .word 0x80017c4a + 80006450: 00000000 .word 0x00000000 + 80006454: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xa52206a91c410d14 + 80006458: 000a3483 ld x9,0(x20) + 8000645c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x87d281be044499e8 + 80006460: 000a3483 ld x9,0(x20) + 80006464: 008a0a13 addi x20,x20,8 + +0000000080006468 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9: + xnor x9, x9, x9 # perform operation + 80006468: 4094c4b3 xnor x9,x9,x9 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b9_str) + 8000646c: 000ab683 ld x13,0(x21) + 80006470: 00968c63 beq x13,x9,80006488 + 80006474: 0cd0176f jal x14,80007d40 + 80006478: 80006468 .word 0x80006468 + 8000647c: 00000000 .word 0x00000000 + 80006480: 80017c85 .word 0x80017c85 + 80006484: 00000000 .word 0x00000000 + 80006488: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x23fecd9310842be1 + 8000648c: 000a3503 ld x10,0(x20) + 80006490: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x33436ebd9a0870f8 + 80006494: 000a3503 ld x10,0(x20) + 80006498: 008a0a13 addi x20,x20,8 + +000000008000649c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10: + xnor x10, x10, x10 # perform operation + 8000649c: 40a54533 xnor x10,x10,x10 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b10_str) + 800064a0: 000ab683 ld x13,0(x21) + 800064a4: 00a68c63 beq x13,x10,800064bc + 800064a8: 0990176f jal x14,80007d40 + 800064ac: 8000649c .word 0x8000649c + 800064b0: 00000000 .word 0x00000000 + 800064b4: 80017cc0 .word 0x80017cc0 + 800064b8: 00000000 .word 0x00000000 + 800064bc: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x2c0e22fcad305146 + 800064c0: 000a3583 ld x11,0(x20) + 800064c4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x386e7f739decc481 + 800064c8: 000a3583 ld x11,0(x20) + 800064cc: 008a0a13 addi x20,x20,8 + +00000000800064d0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11: + xnor x11, x11, x11 # perform operation + 800064d0: 40b5c5b3 xnor x11,x11,x11 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b11_str) + 800064d4: 000ab683 ld x13,0(x21) + 800064d8: 00b68c63 beq x13,x11,800064f0 + 800064dc: 0650176f jal x14,80007d40 + 800064e0: 800064d0 .word 0x800064d0 + 800064e4: 00000000 .word 0x00000000 + 800064e8: 80017cfc .word 0x80017cfc + 800064ec: 00000000 .word 0x00000000 + 800064f0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x06c97edd363781f7 + 800064f4: 000a3603 ld x12,0(x20) + 800064f8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x8a4e5041f967a25a + 800064fc: 000a3603 ld x12,0(x20) + 80006500: 008a0a13 addi x20,x20,8 + +0000000080006504 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12: + xnor x12, x12, x12 # perform operation + 80006504: 40c64633 xnor x12,x12,x12 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b12_str) + 80006508: 000ab683 ld x13,0(x21) + 8000650c: 00c68c63 beq x13,x12,80006524 + 80006510: 0310176f jal x14,80007d40 + 80006514: 80006504 .word 0x80006504 + 80006518: 00000000 .word 0x00000000 + 8000651c: 80017d38 .word 0x80017d38 + 80006520: 00000000 .word 0x00000000 + 80006524: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006528: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000652c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xd985bdbcdf07483d + 80006530: 000a3683 ld x13,0(x20) + 80006534: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x44c939ab842aa47d + 80006538: 000a3683 ld x13,0(x20) + 8000653c: 008a0a13 addi x20,x20,8 + +0000000080006540 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13: + xnor x13, x13, x13 # perform operation + 80006540: 40d6c6b3 xnor x13,x13,x13 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b13_str) + 80006544: 000ab383 ld x7,0(x21) + 80006548: 00d38c63 beq x7,x13,80006560 + 8000654c: 7cc0146f jal x8,80007d18 + 80006550: 80006540 .word 0x80006540 + 80006554: 00000000 .word 0x00000000 + 80006558: 80017d74 .word 0x80017d74 + 8000655c: 00000000 .word 0x00000000 + 80006560: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x643b15480675c475 + 80006564: 000a3703 ld x14,0(x20) + 80006568: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x022b6824479e29e9 + 8000656c: 000a3703 ld x14,0(x20) + 80006570: 008a0a13 addi x20,x20,8 + +0000000080006574 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14: + xnor x14, x14, x14 # perform operation + 80006574: 40e74733 xnor x14,x14,x14 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b14_str) + 80006578: 000ab383 ld x7,0(x21) + 8000657c: 00e38c63 beq x7,x14,80006594 + 80006580: 7980146f jal x8,80007d18 + 80006584: 80006574 .word 0x80006574 + 80006588: 00000000 .word 0x00000000 + 8000658c: 80017db0 .word 0x80017db0 + 80006590: 00000000 .word 0x00000000 + 80006594: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x122a3d83e8024fd5 + 80006598: 000a3783 ld x15,0(x20) + 8000659c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xa08f567e09b04225 + 800065a0: 000a3783 ld x15,0(x20) + 800065a4: 008a0a13 addi x20,x20,8 + +00000000800065a8 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15: + xnor x15, x15, x15 # perform operation + 800065a8: 40f7c7b3 xnor x15,x15,x15 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b15_str) + 800065ac: 000ab383 ld x7,0(x21) + 800065b0: 00f38c63 beq x7,x15,800065c8 + 800065b4: 7640146f jal x8,80007d18 + 800065b8: 800065a8 .word 0x800065a8 + 800065bc: 00000000 .word 0x00000000 + 800065c0: 80017dec .word 0x80017dec + 800065c4: 00000000 .word 0x00000000 + 800065c8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x5d022ea82b7471d3 + 800065cc: 000a3803 ld x16,0(x20) + 800065d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xd0064cf46f2a8f7f + 800065d4: 000a3803 ld x16,0(x20) + 800065d8: 008a0a13 addi x20,x20,8 + +00000000800065dc : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16: + xnor x16, x16, x16 # perform operation + 800065dc: 41084833 xnor x16,x16,x16 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b16_str) + 800065e0: 000ab383 ld x7,0(x21) + 800065e4: 01038c63 beq x7,x16,800065fc + 800065e8: 7300146f jal x8,80007d18 + 800065ec: 800065dc .word 0x800065dc + 800065f0: 00000000 .word 0x00000000 + 800065f4: 80017e28 .word 0x80017e28 + 800065f8: 00000000 .word 0x00000000 + 800065fc: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x794c210f6d93efbf + 80006600: 000a3883 ld x17,0(x20) + 80006604: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x693a23004fe24de4 + 80006608: 000a3883 ld x17,0(x20) + 8000660c: 008a0a13 addi x20,x20,8 + +0000000080006610 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17: + xnor x17, x17, x17 # perform operation + 80006610: 4118c8b3 xnor x17,x17,x17 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b17_str) + 80006614: 000ab383 ld x7,0(x21) + 80006618: 01138c63 beq x7,x17,80006630 + 8000661c: 6fc0146f jal x8,80007d18 + 80006620: 80006610 .word 0x80006610 + 80006624: 00000000 .word 0x00000000 + 80006628: 80017e64 .word 0x80017e64 + 8000662c: 00000000 .word 0x00000000 + 80006630: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xeab179ad6f154da3 + 80006634: 000a3903 ld x18,0(x20) + 80006638: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x857d2eeebd053472 + 8000663c: 000a3903 ld x18,0(x20) + 80006640: 008a0a13 addi x20,x20,8 + +0000000080006644 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18: + xnor x18, x18, x18 # perform operation + 80006644: 41294933 xnor x18,x18,x18 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b18_str) + 80006648: 000ab383 ld x7,0(x21) + 8000664c: 01238c63 beq x7,x18,80006664 + 80006650: 6c80146f jal x8,80007d18 + 80006654: 80006644 .word 0x80006644 + 80006658: 00000000 .word 0x00000000 + 8000665c: 80017ea0 .word 0x80017ea0 + 80006660: 00000000 .word 0x00000000 + 80006664: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xf6f64f8e1f821981 + 80006668: 000a3983 ld x19,0(x20) + 8000666c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xbd3c1bf6c2302b37 + 80006670: 000a3983 ld x19,0(x20) + 80006674: 008a0a13 addi x20,x20,8 + +0000000080006678 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19: + xnor x19, x19, x19 # perform operation + 80006678: 4139c9b3 xnor x19,x19,x19 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b19_str) + 8000667c: 000ab383 ld x7,0(x21) + 80006680: 01338c63 beq x7,x19,80006698 + 80006684: 6940146f jal x8,80007d18 + 80006688: 80006678 .word 0x80006678 + 8000668c: 00000000 .word 0x00000000 + 80006690: 80017edc .word 0x80017edc + 80006694: 00000000 .word 0x00000000 + 80006698: 008a8a93 addi x21,x21,8 + + mv x26, x20 # switch data pointer register to avoid conflict with test + 8000669c: 000a0d13 addi x26,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x567138e4cca4283d + 800066a0: 000d3a03 ld x20,0(x26) + 800066a4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x9e1a3d279de3b393 + 800066a8: 000d3a03 ld x20,0(x26) + 800066ac: 008d0d13 addi x26,x26,8 + +00000000800066b0 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20: + xnor x20, x20, x20 # perform operation + 800066b0: 414a4a33 xnor x20,x20,x20 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b20_str) + 800066b4: 000ab383 ld x7,0(x21) + 800066b8: 01438c63 beq x7,x20,800066d0 + 800066bc: 65c0146f jal x8,80007d18 + 800066c0: 800066b0 .word 0x800066b0 + 800066c4: 00000000 .word 0x00000000 + 800066c8: 80017f18 .word 0x80017f18 + 800066cc: 00000000 .word 0x00000000 + 800066d0: 008a8a93 addi x21,x21,8 + + mv x25, x21 # switch signature pointer register to avoid conflict with test + 800066d4: 000a8c93 addi x25,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x89c4c2a0aa8ae8e7 + 800066d8: 000d3a83 ld x21,0(x26) + 800066dc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x0fddc4aa4833f4dc + 800066e0: 000d3a83 ld x21,0(x26) + 800066e4: 008d0d13 addi x26,x26,8 + +00000000800066e8 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21: + xnor x21, x21, x21 # perform operation + 800066e8: 415acab3 xnor x21,x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b21_str) + 800066ec: 000cb383 ld x7,0(x25) + 800066f0: 01538c63 beq x7,x21,80006708 + 800066f4: 6240146f jal x8,80007d18 + 800066f8: 800066e8 .word 0x800066e8 + 800066fc: 00000000 .word 0x00000000 + 80006700: 80017f54 .word 0x80017f54 + 80006704: 00000000 .word 0x00000000 + 80006708: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x1d120036b6ff8a2c + 8000670c: 000d3b03 ld x22,0(x26) + 80006710: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x0f3f8b98fc494b06 + 80006714: 000d3b03 ld x22,0(x26) + 80006718: 008d0d13 addi x26,x26,8 + +000000008000671c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22: + xnor x22, x22, x22 # perform operation + 8000671c: 416b4b33 xnor x22,x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b22_str) + 80006720: 000cb383 ld x7,0(x25) + 80006724: 01638c63 beq x7,x22,8000673c + 80006728: 5f00146f jal x8,80007d18 + 8000672c: 8000671c .word 0x8000671c + 80006730: 00000000 .word 0x00000000 + 80006734: 80017f90 .word 0x80017f90 + 80006738: 00000000 .word 0x00000000 + 8000673c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x6686b615287a2fb6 + 80006740: 000d3b83 ld x23,0(x26) + 80006744: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xf93eeb54ce857efb + 80006748: 000d3b83 ld x23,0(x26) + 8000674c: 008d0d13 addi x26,x26,8 + +0000000080006750 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23: + xnor x23, x23, x23 # perform operation + 80006750: 417bcbb3 xnor x23,x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b23_str) + 80006754: 000cb383 ld x7,0(x25) + 80006758: 01738c63 beq x7,x23,80006770 + 8000675c: 5bc0146f jal x8,80007d18 + 80006760: 80006750 .word 0x80006750 + 80006764: 00000000 .word 0x00000000 + 80006768: 80017fcc .word 0x80017fcc + 8000676c: 00000000 .word 0x00000000 + 80006770: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xc11f295c4b8dbc18 + 80006774: 000d3c03 ld x24,0(x26) + 80006778: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xad5c8ebeb963e7c6 + 8000677c: 000d3c03 ld x24,0(x26) + 80006780: 008d0d13 addi x26,x26,8 + +0000000080006784 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24: + xnor x24, x24, x24 # perform operation + 80006784: 418c4c33 xnor x24,x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b24_str) + 80006788: 000cb383 ld x7,0(x25) + 8000678c: 01838c63 beq x7,x24,800067a4 + 80006790: 5880146f jal x8,80007d18 + 80006794: 80006784 .word 0x80006784 + 80006798: 00000000 .word 0x00000000 + 8000679c: 80018008 .word 0x80018008 + 800067a0: 00000000 .word 0x00000000 + 800067a4: 008c8c93 addi x25,x25,8 + + mv x18, x25 # switch signature pointer register to avoid conflict with test + 800067a8: 000c8913 addi x18,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x86ff96fe3f29ffb0 + 800067ac: 000d3c83 ld x25,0(x26) + 800067b0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x97b1e38accf6166a + 800067b4: 000d3c83 ld x25,0(x26) + 800067b8: 008d0d13 addi x26,x26,8 + +00000000800067bc : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25: + xnor x25, x25, x25 # perform operation + 800067bc: 419cccb3 xnor x25,x25,x25 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b25_str) + 800067c0: 00093383 ld x7,0(x18) + 800067c4: 01938c63 beq x7,x25,800067dc + 800067c8: 5500146f jal x8,80007d18 + 800067cc: 800067bc .word 0x800067bc + 800067d0: 00000000 .word 0x00000000 + 800067d4: 80018044 .word 0x80018044 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 00890913 addi x18,x18,8 + + mv x15, x26 # switch data pointer register to avoid conflict with test + 800067e0: 000d0793 addi x15,x26,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa0d0ff4776511a9d + 800067e4: 0007bd03 ld x26,0(x15) + 800067e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x82fba66a8cd4cafe + 800067ec: 0007bd03 ld x26,0(x15) + 800067f0: 00878793 addi x15,x15,8 + +00000000800067f4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26: + xnor x26, x26, x26 # perform operation + 800067f4: 41ad4d33 xnor x26,x26,x26 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b26_str) + 800067f8: 00093383 ld x7,0(x18) + 800067fc: 01a38c63 beq x7,x26,80006814 + 80006800: 5180146f jal x8,80007d18 + 80006804: 800067f4 .word 0x800067f4 + 80006808: 00000000 .word 0x00000000 + 8000680c: 80018080 .word 0x80018080 + 80006810: 00000000 .word 0x00000000 + 80006814: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x04351c21268d7869 + 80006818: 0007bd83 ld x27,0(x15) + 8000681c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xf954205ca51697de + 80006820: 0007bd83 ld x27,0(x15) + 80006824: 00878793 addi x15,x15,8 + +0000000080006828 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27: + xnor x27, x27, x27 # perform operation + 80006828: 41bdcdb3 xnor x27,x27,x27 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b27_str) + 8000682c: 00093383 ld x7,0(x18) + 80006830: 01b38c63 beq x7,x27,80006848 + 80006834: 4e40146f jal x8,80007d18 + 80006838: 80006828 .word 0x80006828 + 8000683c: 00000000 .word 0x00000000 + 80006840: 800180bc .word 0x800180bc + 80006844: 00000000 .word 0x00000000 + 80006848: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x72b141a63c5823e4 + 8000684c: 0007be03 ld x28,0(x15) + 80006850: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x8ef5232375b5571f + 80006854: 0007be03 ld x28,0(x15) + 80006858: 00878793 addi x15,x15,8 + +000000008000685c : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28: + xnor x28, x28, x28 # perform operation + 8000685c: 41ce4e33 xnor x28,x28,x28 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b28_str) + 80006860: 00093383 ld x7,0(x18) + 80006864: 01c38c63 beq x7,x28,8000687c + 80006868: 4b00146f jal x8,80007d18 + 8000686c: 8000685c .word 0x8000685c + 80006870: 00000000 .word 0x00000000 + 80006874: 800180f8 .word 0x800180f8 + 80006878: 00000000 .word 0x00000000 + 8000687c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xf82a62937eab8067 + 80006880: 0007be83 ld x29,0(x15) + 80006884: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xa4671594e517d840 + 80006888: 0007be83 ld x29,0(x15) + 8000688c: 00878793 addi x15,x15,8 + +0000000080006890 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29: + xnor x29, x29, x29 # perform operation + 80006890: 41deceb3 xnor x29,x29,x29 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b29_str) + 80006894: 00093383 ld x7,0(x18) + 80006898: 01d38c63 beq x7,x29,800068b0 + 8000689c: 47c0146f jal x8,80007d18 + 800068a0: 80006890 .word 0x80006890 + 800068a4: 00000000 .word 0x00000000 + 800068a8: 80018134 .word 0x80018134 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x2e81561eda1eb4ce + 800068b4: 0007bf03 ld x30,0(x15) + 800068b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x18562939e2bc0ef0 + 800068bc: 0007bf03 ld x30,0(x15) + 800068c0: 00878793 addi x15,x15,8 + +00000000800068c4 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30: + xnor x30, x30, x30 # perform operation + 800068c4: 41ef4f33 xnor x30,x30,x30 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b30_str) + 800068c8: 00093383 ld x7,0(x18) + 800068cc: 01e38c63 beq x7,x30,800068e4 + 800068d0: 4480146f jal x8,80007d18 + 800068d4: 800068c4 .word 0x800068c4 + 800068d8: 00000000 .word 0x00000000 + 800068dc: 80018170 .word 0x80018170 + 800068e0: 00000000 .word 0x00000000 + 800068e4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xd30ad76fa76e92ef + 800068e8: 0007bf83 ld x31,0(x15) + 800068ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x23b40a7dc6a011ad + 800068f0: 0007bf83 ld x31,0(x15) + 800068f4: 00878793 addi x15,x15,8 + +00000000800068f8 : +Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31: + xnor x31, x31, x31 # perform operation + 800068f8: 41ffcfb3 xnor x31,x31,x31 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31, Zbkb_xnor_cg_cmp_rd_rs1_rs2_b31_str) + 800068fc: 00093383 ld x7,0(x18) + 80006900: 01f38c63 beq x7,x31,80006918 + 80006904: 4140146f jal x8,80007d18 + 80006908: 800068f8 .word 0x800068f8 + 8000690c: 00000000 .word 0x00000000 + 80006910: 800181ac .word 0x800181ac + 80006914: 00000000 .word 0x00000000 + 80006918: 00890913 addi x18,x18,8 + + mv x2, x18 # restore signature pointer to default register for teardown + 8000691c: 00090113 addi x2,x18,0 + +0000000080006920 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006920: 00000513 addi x10,x0,0 + 80006924: 00000073 ecall + 80006928: fff00513 addi x10,x0,-1 + 8000692c: 25800413 addi x8,x0,600 + +0000000080006930 : + 80006930: 34002373 csrrs x6,mscratch,x0 + +0000000080006934 : + 80006934: 2b833383 ld x7,696(x6) + +0000000080006938 : + 80006938: 2a033383 ld x7,672(x6) + +000000008000693c : + 8000693c: 2d033483 ld x9,720(x6) + 80006940: 34049073 csrrw x0,mscratch,x9 + +0000000080006944 : + 80006944: 2c833483 ld x9,712(x6) + 80006948: 305493f3 csrrw x7,mtvec,x9 + 8000694c: ffc4f493 andi x9,x9,-4 + 80006950: ffc3f393 andi x7,x7,-4 + 80006954: 00749e63 bne x9,x7,80006970 + +0000000080006958 : + 80006958: 00030493 addi x9,x6,0 + +000000008000695c : + 8000695c: 0004a783 lw x15,0(x9) + 80006960: 00f3a023 sw x15,0(x7) + 80006964: 00438393 addi x7,x7,4 + 80006968: 00448493 addi x9,x9,4 + 8000696c: fe83c8e3 blt x7,x8,8000695c + 80006970: 0000100f fence.i + +0000000080006974 : + 80006974: 00000013 addi x0,x0,0 + 80006978: 00000013 addi x0,x0,0 + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: f4e50513 addi x10,x10,-178 # 8001890e + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: f4750513 addi x10,x10,-185 # 80018947 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: f6750513 addi x10,x10,-153 # 800189a7 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: ad250513 addi x10,x10,-1326 # 80019552 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00014397 auipc x7,0x14 + 80006b04: 54038393 addi x7,x7,1344 # 8001b040 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00014417 auipc x8,0x14 + 80006b44: 4f040413 addi x8,x8,1264 # 8001b030 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80018afb .word 0x80018afb + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018969 .word 0x80018969 + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: d1450513 addi x10,x10,-748 # 800188d4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: d0e50513 addi x10,x10,-754 # 8001890e + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc1ff06f jal x0,80006920 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: c9dff06f jal x0,80006920 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9430313 addi x6,x6,-1388 # 80006974 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: ea950513 addi x10,x10,-343 # 80019f89 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 23850513 addi x10,x10,568 # 80018358 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: 8b050513 addi x10,x10,-1872 # 80018a10 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00011517 auipc x10,0x11 + 800071a4: 76e50513 addi x10,x10,1902 # 8001890e + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: d9848493 addi x9,x9,-616 # 80018338 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: f2840413 addi x8,x8,-216 # 80038508 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018b12 .word 0x80018b12 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018c14 .word 0x80018c14 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018d0f .word 0x80018d0f + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80018e02 .word 0x80018e02 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80018f75 .word 0x80018f75 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 4f020213 addi x4,x4,1264 # 800181f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 4d838393 addi x7,x7,1240 # 800181f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 4b068693 addi x13,x13,1200 # 800181f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 48848493 addi x9,x9,1160 # 800181f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 3e44a483 lw x9,996(x9) # 800181f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 11040413 addi x8,x8,272 # 80019fd0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00030417 auipc x8,0x30 + 80007f04: 61040413 addi x8,x8,1552 # 80038510 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 3d848493 addi x9,x9,984 # 80018318 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 39848493 addi x9,x9,920 # 80018318 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 36c80813 addi x16,x16,876 # 80018328 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 34c80813 addi x16,x16,844 # 80018328 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: b1338393 addi x7,x7,-1261 # 80018afb + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 32880813 addi x16,x16,808 # 80018320 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: b0e38393 addi x7,x7,-1266 # 80018b12 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: bf838393 addi x7,x7,-1032 # 80018c14 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: cdb38393 addi x7,x7,-805 # 80018d0f + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: db638393 addi x7,x7,-586 # 80018e02 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: f1138393 addi x7,x7,-239 # 80018f75 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: e7d38393 addi x7,x7,-387 # 80018ef9 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: ea338393 addi x7,x7,-349 # 80018f37 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: aa638393 addi x7,x7,-1370 # 80018b52 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: b8e38393 addi x7,x7,-1138 # 80018c52 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: c6f38393 addi x7,x7,-913 # 80018d4b + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: d4b38393 addi x7,x7,-693 # 80018e3f + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: ea438393 addi x7,x7,-348 # 80018fb0 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: a6e38393 addi x7,x7,-1426 # 80018b92 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: b5438393 addi x7,x7,-1196 # 80018c90 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: c3338393 addi x7,x7,-973 # 80018d87 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: d1038393 addi x7,x7,-752 # 80018e7c + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: e6738393 addi x7,x7,-409 # 80018feb + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: a3738393 addi x7,x7,-1481 # 80018bd3 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: b1b38393 addi x7,x7,-1253 # 80018ccf + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: bf838393 addi x7,x7,-1032 # 80018dc4 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: cd638393 addi x7,x7,-810 # 80018eba + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: e2b38393 addi x7,x7,-469 # 80019027 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: e5038393 addi x7,x7,-432 # 80019064 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: e8738393 addi x7,x7,-377 # 800190b3 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: f6a38393 addi x7,x7,-150 # 800191ae + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 04e38393 addi x7,x7,78 # 800192aa + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 0a480813 addi x16,x16,164 # 80018320 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 09480813 addi x16,x16,148 # 80018320 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 08c80813 addi x16,x16,140 # 80018324 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 07880813 addi x16,x16,120 # 80018320 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00010517 auipc x10,0x10 + 80008304: 60e50513 addi x10,x10,1550 # 8001890e + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00010517 auipc x10,0x10 + 80008344: 60750513 addi x10,x10,1543 # 80018947 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00010517 auipc x10,0x10 + 80008384: 67e50513 addi x10,x10,1662 # 800189fe + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: f6853503 ld x10,-152(x10) # 80018310 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00010517 auipc x10,0x10 + 800083c4: 65050513 addi x10,x10,1616 # 80018a10 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: e0852503 lw x10,-504(x10) # 800181f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00010517 auipc x10,0x10 + 80008404: 61250513 addi x10,x10,1554 # 80018a12 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: ec852503 lw x10,-312(x10) # 800182f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: ef850513 addi x10,x10,-264 # 80018358 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 58650513 addi x10,x10,1414 # 80018a26 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: e3053503 ld x10,-464(x10) # 800182f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: e7850513 addi x10,x10,-392 # 80018358 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: f3d50513 addi x10,x10,-195 # 8001945d + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: ca852503 lw x10,-856(x10) # 800181f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: df860613 addi x12,x12,-520 # 80018358 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: d6c52503 lw x10,-660(x10) # 800182f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: fb350513 addi x10,x10,-77 # 80019573 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: d5860613 addi x12,x12,-680 # 80018358 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: ccc52503 lw x10,-820(x10) # 800182f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: d1860613 addi x12,x12,-744 # 80018358 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: c8c52503 lw x10,-884(x10) # 800182f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: dd650513 addi x10,x10,-554 # 80019456 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: c9850513 addi x10,x10,-872 # 80018358 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: d6e50513 addi x10,x10,-658 # 8001946e + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: ac852503 lw x10,-1336(x10) # 800181f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: bc853503 ld x10,-1080(x10) # 80018300 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: bb453503 ld x10,-1100(x10) # 80018300 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: bf850513 addi x10,x10,-1032 # 80018358 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: b9052503 lw x10,-1136(x10) # 80018318 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ce550513 addi x10,x10,-795 # 80019485 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: a2852503 lw x10,-1496(x10) # 800181f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: b3053503 ld x10,-1232(x10) # 80018308 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: b1c53503 ld x10,-1252(x10) # 80018308 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: b5850513 addi x10,x10,-1192 # 80018358 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: c5c50513 addi x10,x10,-932 # 8001949c + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: aa053503 ld x10,-1376(x10) # 80018308 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: ad850513 addi x10,x10,-1320 # 80018358 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: c3a50513 addi x10,x10,-966 # 800194fa + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: a2053503 ld x10,-1504(x10) # 80018308 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: a5850513 addi x10,x10,-1448 # 80018358 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: 9f442403 lw x8,-1548(x8) # 80018320 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: c5f50513 addi x10,x10,-929 # 8001959f + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: c4b50513 addi x10,x10,-949 # 800195cb + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: 98080813 addi x16,x16,-1664 # 80018328 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 05050513 addi x10,x10,80 # 80018a10 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: bdb50513 addi x10,x10,-1061 # 800195db + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: 8e053503 ld x10,-1824(x10) # 80018308 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: 91850513 addi x10,x10,-1768 # 80018358 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: b8650513 addi x10,x10,-1146 # 80019606 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: 85853503 ld x10,-1960(x10) # 80018300 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: 89850513 addi x10,x10,-1896 # 80018358 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: 81833303 ld x6,-2024(x6) # 80018300 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: 8183b383 ld x7,-2024(x7) # 80018308 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: b3550513 addi x10,x10,-1227 # 80019635 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: b5d50513 addi x10,x10,-1187 # 8001969d + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 0000f317 auipc x6,0xf + 80008b6c: 79833303 ld x6,1944(x6) # 80018300 + 80008b70: 0000f397 auipc x7,0xf + 80008b74: 7983b383 ld x7,1944(x7) # 80018308 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 0000f517 auipc x10,0xf + 80008ba4: 7b850513 addi x10,x10,1976 # 80018358 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ae450513 addi x10,x10,-1308 # 800196c4 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: a4150513 addi x10,x10,-1471 # 80019661 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: a3d50513 addi x10,x10,-1475 # 8001969d + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 0000f317 auipc x6,0xf + 80008c8c: 68033303 ld x6,1664(x6) # 80018308 + 80008c90: 0000f397 auipc x7,0xf + 80008c94: 6703b383 ld x7,1648(x7) # 80018300 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 0000f517 auipc x10,0xf + 80008cc4: 69850513 addi x10,x10,1688 # 80018358 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: aac50513 addi x10,x10,-1364 # 800197ac + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: b5350513 addi x10,x10,-1197 # 80019893 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 5bc52503 lw x10,1468(x10) # 80018324 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: b2f50513 addi x10,x10,-1233 # 800198cf + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: acd50513 addi x10,x10,-1331 # 800198ad + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: a9550513 addi x10,x10,-1387 # 800198b5 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: a5d50513 addi x10,x10,-1443 # 800198bd + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: a2650513 addi x10,x10,-1498 # 800198c6 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: 9f850513 addi x10,x10,-1544 # 800198d8 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 41852503 lw x10,1048(x10) # 80018320 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: acf50513 addi x10,x10,-1329 # 80019a2f + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: 95250513 addi x10,x10,-1710 # 800198f2 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: 94350513 addi x10,x10,-1725 # 80019923 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: 92350513 addi x10,x10,-1757 # 80019943 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: 90150513 addi x10,x10,-1791 # 80019961 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: 8e050513 addi x10,x10,-1824 # 80019980 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: 8c850513 addi x10,x10,-1848 # 800199a8 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: 8b450513 addi x10,x10,-1868 # 800199d4 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: 8a050513 addi x10,x10,-1888 # 80019a00 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: 89e50513 addi x10,x10,-1890 # 80019a3e + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 14053503 ld x10,320(x10) # 80018308 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 17850513 addi x10,x10,376 # 80018358 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: 83550513 addi x10,x10,-1995 # 80019a55 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 0b853503 ld x10,184(x10) # 80018300 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 0f850513 addi x10,x10,248 # 80018358 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 09852503 lw x10,152(x10) # 80018320 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00010517 auipc x10,0x10 + 800092a4: 7cc50513 addi x10,x10,1996 # 80019a6c + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 04053503 ld x10,64(x10) # 80018308 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00010517 auipc x10,0x10 + 800092e4: 7a350513 addi x10,x10,1955 # 80019a83 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: ff853503 ld x10,-8(x10) # 80018300 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: ffc52503 lw x10,-4(x10) # 80018320 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00010517 auipc x10,0x10 + 80009344: 7b950513 addi x10,x10,1977 # 80019af9 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: 84f50513 addi x10,x10,-1969 # 80019bcf + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: 90250513 addi x10,x10,-1790 # 80019cc2 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: 9bd50513 addi x10,x10,-1603 # 80019dbd + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: a6450513 addi x10,x10,-1436 # 80019ea4 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00010517 auipc x10,0x10 + 80009484: 63150513 addi x10,x10,1585 # 80019ab1 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: e9063603 ld x12,-368(x12) # 80018338 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 5da50513 addi x10,x10,1498 # 80018a9a + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: e3850513 addi x10,x10,-456 # 80018358 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: e2058593 addi x11,x11,-480 # 80018380 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: eb058593 addi x11,x11,-336 # 80018440 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 2fe50513 addi x10,x10,766 # 800188be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: f5250513 addi x10,x10,-174 # 80019552 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: d0060613 addi x12,x12,-768 # 80018330 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 47b50513 addi x10,x10,1147 # 80018abb + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: cd053503 ld x10,-816(x10) # 80018338 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: cd850513 addi x10,x10,-808 # 80018358 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 40b50513 addi x10,x10,1035 # 80018acb + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: c5853503 ld x10,-936(x10) # 80018340 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: c5850513 addi x10,x10,-936 # 80018358 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 39b50513 addi x10,x10,923 # 80018adb + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: be053503 ld x10,-1056(x10) # 80018348 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: bd850513 addi x10,x10,-1064 # 80018358 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 32b50513 addi x10,x10,811 # 80018aeb + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: b6853503 ld x10,-1176(x10) # 80018350 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: b5850513 addi x10,x10,-1192 # 80018358 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: b0860613 addi x12,x12,-1272 # 80018330 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: b1860613 addi x12,x12,-1256 # 80018358 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 88830313 addi x6,x6,-1912 # 80006920 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87030313 addi x6,x6,-1936 # 80006920 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 85830313 addi x6,x6,-1960 # 80006920 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f078793 addi x15,x15,1776 # 80006930 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: af010113 addi x2,x2,-1296 # 80019fd0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001957b .word 0x8001957b + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 01828293 addi x5,x5,24 # 80038600 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: ff828293 addi x5,x5,-8 # 80038600 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkc-clmul-00.elf.objdump b/riscv-tests/rv64-Zbkc-clmul-00.elf.objdump new file mode 100644 index 0000000..fbdd9bf --- /dev/null +++ b/riscv-tests/rv64-Zbkc-clmul-00.elf.objdump @@ -0,0 +1,17102 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkc/Zbkc-clmul-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkc/Zbkc-clmul-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c710 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038800 0000000080038800 00037800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031e2 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 0000000000000000 0000000000000000 0003b89d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b918 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b93b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b950 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 0000000000000000 0000000000000000 0003b990 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003ba19 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038800 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccR1nkCH.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b1 +000000008000e4a2 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b2 +000000008000e4d4 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b3 +000000008000e506 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b4 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e538 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b5 +000000008000e56a l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b6 +000000008000e59c l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b7 +000000008000e5ce l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b8 +000000008000e600 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b9 +000000008000e632 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b9_str +0000000080000268 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b10 +000000008000e665 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b10_str +000000008000029c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b11 +000000008000e699 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b11_str +00000000800002d0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b12 +000000008000e6cd l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b13 +000000008000e701 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b14 +000000008000e735 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b14_str +0000000080000374 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b15 +000000008000e769 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b15_str +00000000800003a8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b16 +000000008000e79d l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b16_str +00000000800003dc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b17 +000000008000e7d1 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b17_str +0000000080000414 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b18 +000000008000e805 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b18_str +0000000080000448 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b19 +000000008000e839 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b19_str +000000008000047c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b20 +000000008000e86d l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b20_str +00000000800004b0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b21 +000000008000e8a1 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b21_str +00000000800004e4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b22 +000000008000e8d5 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b22_str +0000000080000518 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b23 +000000008000e909 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b23_str +000000008000054c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b24 +000000008000e93d l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b24_str +0000000080000580 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b25 +000000008000e971 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b25_str +00000000800005b4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b26 +000000008000e9a5 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b26_str +00000000800005e8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b27 +000000008000e9d9 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b27_str +000000008000061c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b28 +000000008000ea0d l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b28_str +0000000080000650 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b29 +000000008000ea41 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b29_str +0000000080000688 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b30 +000000008000ea75 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b30_str +00000000800006bc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs1_b31 +000000008000eaa9 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs1_b31_str +00000000800006f0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b0 +000000008000eadd l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b0_str +0000000080000728 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b1 +000000008000eb10 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b1_str +000000008000075c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b2 +000000008000eb43 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b2_str +0000000080000790 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b3 +000000008000eb76 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b3_str +00000000800007cc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b4 +0000000080007d18 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000eba9 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b4_str +0000000080000800 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b5 +000000008000ebdc l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b5_str +0000000080000834 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b6 +000000008000ec0f l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b6_str +0000000080000870 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b7 +000000008000ec42 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b7_str +00000000800008a4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b8 +000000008000ec75 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b8_str +00000000800008d8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b9 +000000008000eca8 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b9_str +0000000080000910 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b10 +000000008000ecdb l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b10_str +0000000080000948 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b11 +000000008000ed0f l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b11_str +0000000080000980 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b12 +000000008000ed43 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b12_str +00000000800009b4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b13 +000000008000ed77 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b13_str +00000000800009e8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b14 +000000008000edab l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b14_str +0000000080000a1c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b15 +000000008000eddf l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b15_str +0000000080000a50 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b16 +000000008000ee13 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b16_str +0000000080000a84 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b17 +000000008000ee47 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b17_str +0000000080000ab8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b18 +000000008000ee7b l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b18_str +0000000080000aec l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b19 +000000008000eeaf l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b19_str +0000000080000b20 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cp_rs2_b20 +000000008000eee3 l .data 0000000000000000 Zbkc_clmul_cg_cp_rs2_b20_str +0000000080000b54 l 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+0000000080012484 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str +0000000080002dd8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000 +00000000800124ec l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str +0000000080002e0c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001 +0000000080012555 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str +0000000080002e40 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0 +00000000800125be l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e74 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +000000008001261f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str +0000000080002ea8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2 +0000000080012680 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str +0000000080002edc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000 +00000000800126e1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str +0000000080002f10 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001 +0000000080012751 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str +0000000080002f44 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff +00000000800127c1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str +0000000080002f78 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe +0000000080012831 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080002fac l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff +00000000800128a1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080002fe0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080012911 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003014 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080012981 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080003048 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +00000000800129f1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +000000008000307c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555 +0000000080012a61 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str +00000000800030b0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff +0000000080012ad1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str +00000000800030e4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe +0000000080012b39 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str +0000000080003118 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000 +0000000080012ba1 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str +000000008000314c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001 +0000000080012c0a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str +0000000080003180 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0 +0000000080012c73 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str +00000000800031b4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1 +0000000080012cd4 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str +00000000800031e8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2 +0000000080012d35 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str +000000008000321c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000 +0000000080012d96 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str +0000000080003250 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080012e06 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +0000000080003284 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080012e76 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032b8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +0000000080012ee6 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032ec l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +0000000080012f56 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080003320 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +0000000080012fc6 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003354 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +0000000080013036 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003388 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800130a6 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033bc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080013116 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033f0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +0000000080013186 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003424 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +00000000800131ee l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003458 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +0000000080013256 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +000000008000348c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800132bf l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034c0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013328 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034f4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +0000000080013389 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003528 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800133ea l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +000000008000355c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +000000008001344b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +0000000080003590 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800134bb l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035c4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +000000008001352b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035f8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +000000008001359b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +000000008000362c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +000000008001360b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003660 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +000000008001367b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003694 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800136eb l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036c8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +000000008001375b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036fc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +00000000800137cb l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +0000000080003730 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +000000008001383b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +0000000080003764 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +00000000800138a3 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003798 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +000000008001390b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037cc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013974 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +0000000080003800 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +00000000800139dd l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +0000000080003834 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +0000000080013a3e l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003868 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +0000000080013a9f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +000000008000389c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +0000000080013b00 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038d0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080013b70 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +0000000080003904 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +0000000080013be0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003938 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080013c50 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +000000008000396c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080013cc0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +00000000800039a0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080013d30 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039d4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080013da0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +0000000080003a08 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013e10 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003a3c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555 +0000000080013e80 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str +0000000080003a70 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff +0000000080013ef0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str +0000000080003aa4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe +0000000080013f58 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str +0000000080003ad8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000 +0000000080013fc0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str +0000000080003b0c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001 +0000000080014029 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str +0000000080003b40 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0 +0000000080014092 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str +0000000080003b74 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1 +00000000800140f3 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str +0000000080003ba8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2 +0000000080014154 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str +0000000080003bdc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000 +00000000800141b5 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str +0000000080003c10 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001 +0000000080014225 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str +0000000080003c44 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff +0000000080014295 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str +0000000080003c78 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe +0000000080014305 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str +0000000080003cac l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff +0000000080014375 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str +0000000080003ce0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe +00000000800143e5 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003d14 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +0000000080014455 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d48 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +00000000800144c5 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d7c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +0000000080014535 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003db0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +00000000800145a5 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003de4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +000000008001460d l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e18 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +0000000080014675 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e4c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +00000000800146de l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e80 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0 +0000000080014747 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str +0000000080003eb4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1 +00000000800147a8 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str +0000000080003ee8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2 +0000000080014809 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str +0000000080003f1c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +000000008001486a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f50 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +00000000800148da l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f84 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +000000008001494a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fb8 l 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Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004088 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014b7a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040bc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014bea l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040f0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014c5a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004124 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014cc2 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004158 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014d2a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +000000008000418c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001 +0000000080014d93 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str +00000000800041c0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +0000000080014dfc l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +00000000800041f4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +0000000080014e55 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +0000000080004228 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +0000000080014eae l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +000000008000425c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000 +0000000080014f07 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str +0000000080004290 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001 +0000000080014f6f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str +00000000800042c4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff +0000000080014fd7 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str +00000000800042f8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe +000000008001503f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str +000000008000432c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff +00000000800150a7 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str +0000000080004360 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe +000000008001510f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str +0000000080004394 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2 +0000000080015177 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str +00000000800043c8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800151df l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800043fc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555 +0000000080015247 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str +0000000080004430 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +00000000800152af l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +0000000080004464 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +000000008001530f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +0000000080004498 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000 +000000008001536f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str +00000000800044cc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001 +00000000800153d0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str +0000000080004500 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +0000000080015431 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +0000000080004534 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +000000008001548a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +0000000080004568 l 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Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe +0000000080015674 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str +000000008000466c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff +00000000800156dc l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str +00000000800046a0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe +0000000080015744 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str +00000000800046d4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2 +00000000800157ac l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080004708 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080015814 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +000000008000473c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555 +000000008001587c l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str +0000000080004770 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +00000000800158e4 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +00000000800047a4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +0000000080015944 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +00000000800047d8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000 +00000000800159a4 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str +000000008000480c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001 +0000000080015a05 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str +0000000080004840 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0 +0000000080015a66 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str +0000000080004874 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1 +0000000080015ac0 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str +00000000800048a8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2 +0000000080015b1a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str +00000000800048dc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000 +0000000080015b74 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str +0000000080004910 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001 +0000000080015bdd l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str +0000000080004944 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff +0000000080015c46 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str +0000000080004978 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe +0000000080015caf l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str +00000000800049ac l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff +0000000080015d18 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str +00000000800049e0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe +0000000080015d81 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str +0000000080004a14 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2 +0000000080015dea l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str +0000000080004a48 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa +0000000080015e53 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004a7c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555 +0000000080015ebc l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str +0000000080004ab0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff +0000000080015f25 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str +0000000080004ae4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe +0000000080015f86 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str +0000000080004b18 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000 +0000000080015fe7 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str +0000000080004b4c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001 +0000000080016049 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str +0000000080004b80 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0 +00000000800160ab l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str +0000000080004bb4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1 +0000000080016105 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str +0000000080004be8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2 +000000008001615f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str +0000000080004c1c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000 +00000000800161b9 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str +0000000080004c50 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001 +0000000080016222 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str +0000000080004c84 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff +000000008001628b l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str +0000000080004cb8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe +00000000800162f4 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str +0000000080004cec l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff +000000008001635d l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str +0000000080004d20 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe +00000000800163c6 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str +0000000080004d54 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2 +000000008001642f l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str +0000000080004d88 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa +0000000080016498 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004dbc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555 +0000000080016501 l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str +0000000080004df0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff +000000008001656a l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str +0000000080004e24 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe +00000000800165cb l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str +0000000080004e58 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000 +000000008001662c l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str +0000000080004e8c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001 +000000008001668e l .data 0000000000000000 Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str +0000000080004ec0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b0 +00000000800166f0 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b0_str +0000000080004ef4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b1 +0000000080016729 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b1_str +0000000080004f28 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b2 +0000000080016762 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b2_str +0000000080004f5c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b3 +000000008001679b l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b3_str +0000000080004f98 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b4 +00000000800167d4 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b4_str +0000000080004fcc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b5 +000000008001680d l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b5_str +0000000080005000 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b6 +0000000080016846 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b6_str +0000000080005034 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b7 +000000008001687f l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b7_str +0000000080005068 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b8 +00000000800168b8 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b8_str +000000008000509c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b9 +00000000800168f1 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b9_str +00000000800050d4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b10 +000000008001692a l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b10_str +000000008000510c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b11 +0000000080016964 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b11_str +0000000080005140 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b12 +000000008001699e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b12_str +000000008000517c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b13 +00000000800169d8 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b13_str +00000000800051b0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b14 +0000000080016a12 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b14_str +00000000800051e4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b15 +0000000080016a4c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b15_str +0000000080005218 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b16 +0000000080016a86 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b16_str +000000008000524c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b17 +0000000080016ac0 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b17_str +0000000080005280 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b18 +0000000080016afa l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b18_str +00000000800052b4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b19 +0000000080016b34 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b19_str +00000000800052e8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b20 +0000000080016b6e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b20_str +000000008000531c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b21 +0000000080016ba8 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b21_str +0000000080005350 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b22 +0000000080016be2 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b22_str +0000000080005384 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b23 +0000000080016c1c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b23_str +00000000800053b8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b24 +0000000080016c56 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b24_str +00000000800053ec l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b25 +0000000080016c90 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b25_str +0000000080005420 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b26 +0000000080016cca l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b26_str +0000000080005454 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b27 +0000000080016d04 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b27_str +0000000080005488 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b28 +0000000080016d3e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b28_str +00000000800054bc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b29 +0000000080016d78 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b29_str +00000000800054f4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b30 +0000000080016db2 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b30_str +0000000080005528 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b31 +0000000080016dec l .data 0000000000000000 Zbkc_clmul_cg_cmp_rs1_rs2_b31_str +000000008000555c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b0 +0000000080016e26 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b0_str +0000000080005590 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b1 +0000000080016e5e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b1_str +00000000800055c4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b2 +0000000080016e96 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b2_str +00000000800055f8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b3 +0000000080016ece l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b3_str +0000000080005634 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b4 +0000000080016f06 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b4_str +0000000080005668 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b5 +0000000080016f3e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b5_str +000000008000569c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b6 +0000000080016f76 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b6_str +00000000800056d0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b7 +0000000080016fae l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b7_str +0000000080005704 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b8 +0000000080016fe6 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b8_str +000000008000573c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b9 +000000008001701e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b9_str +0000000080005770 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b10 +0000000080017056 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b10_str +00000000800057a4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b11 +000000008001708f l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b11_str +00000000800057d8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b12 +00000000800170c8 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b12_str +0000000080005814 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b13 +0000000080017101 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b13_str +0000000080005848 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b14 +000000008001713a l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b14_str +000000008000587c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b15 +0000000080017173 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b15_str +00000000800058b0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b16 +00000000800171ac l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b16_str +00000000800058e4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b17 +00000000800171e5 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b17_str +0000000080005918 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b18 +000000008001721e l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b18_str +0000000080005950 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b19 +0000000080017257 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b19_str +0000000080005984 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b20 +0000000080017290 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b20_str +00000000800059b8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b21 +00000000800172c9 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b21_str +00000000800059ec l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b22 +0000000080017302 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b22_str +0000000080005a20 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b23 +000000008001733b l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b23_str +0000000080005a54 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b24 +0000000080017374 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b24_str +0000000080005a8c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b25 +00000000800173ad l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b25_str +0000000080005ac0 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b26 +00000000800173e6 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b26_str +0000000080005af4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b27 +000000008001741f l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b27_str +0000000080005b2c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b28 +0000000080017458 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b28_str +0000000080005b60 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b29 +0000000080017491 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b29_str +0000000080005b94 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b30 +00000000800174ca l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b30_str +0000000080005bc8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b31 +0000000080017503 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs1_b31_str +0000000080005bfc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b0 +000000008001753c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b0_str +0000000080005c30 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b1 +0000000080017574 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b1_str +0000000080005c64 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b2 +00000000800175ac l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b2_str +0000000080005c98 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b3 +00000000800175e4 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b3_str +0000000080005ccc l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b4 +000000008001761c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b4_str +0000000080005d00 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b5 +0000000080017654 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b5_str +0000000080005d34 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b6 +000000008001768c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b6_str +0000000080005d70 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b7 +00000000800176c4 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b7_str +0000000080005da4 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b8 +00000000800176fc l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b8_str +0000000080005dd8 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b9 +0000000080017734 l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b9_str +0000000080005e0c l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b10 +000000008001776c l .data 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b10_str +0000000080005e40 l .text.rvtest 0000000000000000 Zbkc_clmul_cg_cmp_rd_rs2_b11 +00000000800177a5 l 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environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7a95613b77982d7b + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x12fb1c09e741806e + 80000048: 0001ba83 ld x21,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkc_clmul_cg_cp_rs1_b0: + clmul x26, x0, x21 # perform operation + 80000050: 0b501d33 clmul x26,x0,x21 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_b0, Zbkc_clmul_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01a20c63 beq x4,x26,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x90464b62b388bc37 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x677dd0c512ce5949 + 8000007c: 0001b983 ld x19,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkc_clmul_cg_cp_rs1_b1: + clmul x30, x1, x19 # perform operation + 80000084: 0b309f33 clmul x30,x1,x19 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zbkc_clmul_cg_cp_rs1_b1, Zbkc_clmul_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01e20c63 beq x4,x30,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a2 .word 0x8000e4a2 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x30, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010f13 addi x30,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xb360acaff59a3a93 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs2: x0 = 0x64d11d7991fe8e33 + 800000b4: 0001b003 ld x0,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkc_clmul_cg_cp_rs1_b2: + clmul x6, x2, x0 # perform operation + 800000bc: 0a011333 clmul x6,x2,x0 + # Check if x6 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x6, Zbkc_clmul_cg_cp_rs1_b2, Zbkc_clmul_cg_cp_rs1_b2_str) + 800000c0: 000f3203 ld x4,0(x30) + 800000c4: 00620c63 beq x4,x6,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d4 .word 0x8000e4d4 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008f0f13 addi x30,x30,8 + + mv x18, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018913 addi x18,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xe4a72a6085bcc306 + 800000e4: 00093183 ld x3,0(x18) + 800000e8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xf1118cefc7d41a60 + 800000ec: 00093b83 ld x23,0(x18) + 800000f0: 00890913 addi x18,x18,8 + +00000000800000f4 : +Zbkc_clmul_cg_cp_rs1_b3: + clmul x8, x3, x23 # perform operation + 800000f4: 0b719433 clmul x8,x3,x23 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zbkc_clmul_cg_cp_rs1_b3, Zbkc_clmul_cg_cp_rs1_b3_str) + 800000f8: 000f3203 ld x4,0(x30) + 800000fc: 00820c63 beq x4,x8,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e506 .word 0x8000e506 + 80000110: 00000000 .word 0x00000000 + 80000114: 008f0f13 addi x30,x30,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xc65f6faedd1ca357 + 80000120: 00093203 ld x4,0(x18) + 80000124: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0x594649a499cf0f18 + 80000128: 00093883 ld x17,0(x18) + 8000012c: 00890913 addi x18,x18,8 + +0000000080000130 : +Zbkc_clmul_cg_cp_rs1_b4: + clmul x7, x4, x17 # perform operation + 80000130: 0b1213b3 clmul x7,x4,x17 + # Check if x7 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x7, Zbkc_clmul_cg_cp_rs1_b4, Zbkc_clmul_cg_cp_rs1_b4_str) + 80000134: 000f3683 ld x13,0(x30) + 80000138: 00768c63 beq x13,x7,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e538 .word 0x8000e538 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0x054de0765d195c70 + 80000154: 00093283 ld x5,0(x18) + 80000158: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x3aba80516376f1d8 + 8000015c: 00093a03 ld x20,0(x18) + 80000160: 00890913 addi x18,x18,8 + +0000000080000164 : +Zbkc_clmul_cg_cp_rs1_b5: + clmul x26, x5, x20 # perform operation + 80000164: 0b429d33 clmul x26,x5,x20 + # Check if x26 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x26, Zbkc_clmul_cg_cp_rs1_b5, Zbkc_clmul_cg_cp_rs1_b5_str) + 80000168: 000f3683 ld x13,0(x30) + 8000016c: 01a68c63 beq x13,x26,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e56a .word 0x8000e56a + 80000180: 00000000 .word 0x00000000 + 80000184: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x5f6ff8cb1c78f22e + 80000188: 00093303 ld x6,0(x18) + 8000018c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x3591a3778d2c4b46 + 80000190: 00093083 ld x1,0(x18) + 80000194: 00890913 addi x18,x18,8 + +0000000080000198 : +Zbkc_clmul_cg_cp_rs1_b6: + clmul x10, x6, x1 # perform operation + 80000198: 0a131533 clmul x10,x6,x1 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zbkc_clmul_cg_cp_rs1_b6, Zbkc_clmul_cg_cp_rs1_b6_str) + 8000019c: 000f3683 ld x13,0(x30) + 800001a0: 00a68c63 beq x13,x10,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e59c .word 0x8000e59c + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xe292b7e4202b2d5c + 800001bc: 00093383 ld x7,0(x18) + 800001c0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0x3f3253623ef54306 + 800001c4: 00093f83 ld x31,0(x18) + 800001c8: 00890913 addi x18,x18,8 + +00000000800001cc : +Zbkc_clmul_cg_cp_rs1_b7: + clmul x26, x7, x31 # perform operation + 800001cc: 0bf39d33 clmul x26,x7,x31 + # Check if x26 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x26, Zbkc_clmul_cg_cp_rs1_b7, Zbkc_clmul_cg_cp_rs1_b7_str) + 800001d0: 000f3683 ld x13,0(x30) + 800001d4: 01a68c63 beq x13,x26,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5ce .word 0x8000e5ce + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xb3f4355a1e7f4944 + 800001f0: 00093403 ld x8,0(x18) + 800001f4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xe4ff0887ed5cb74f + 800001f8: 00093003 ld x0,0(x18) + 800001fc: 00890913 addi x18,x18,8 + +0000000080000200 : +Zbkc_clmul_cg_cp_rs1_b8: + clmul x3, x8, x0 # perform operation + 80000200: 0a0411b3 clmul x3,x8,x0 + # Check if x3 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x3, Zbkc_clmul_cg_cp_rs1_b8, Zbkc_clmul_cg_cp_rs1_b8_str) + 80000204: 000f3683 ld x13,0(x30) + 80000208: 00368c63 beq x13,x3,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e600 .word 0x8000e600 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x9993b326112786ca + 80000224: 00093483 ld x9,0(x18) + 80000228: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x335eb322613a7170 + 8000022c: 00093303 ld x6,0(x18) + 80000230: 00890913 addi x18,x18,8 + +0000000080000234 : +Zbkc_clmul_cg_cp_rs1_b9: + clmul x28, x9, x6 # perform operation + 80000234: 0a649e33 clmul x28,x9,x6 + # Check if x28 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x28, Zbkc_clmul_cg_cp_rs1_b9, Zbkc_clmul_cg_cp_rs1_b9_str) + 80000238: 000f3683 ld x13,0(x30) + 8000023c: 01c68c63 beq x13,x28,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e632 .word 0x8000e632 + 80000250: 00000000 .word 0x00000000 + 80000254: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xe991753c5c89d634 + 80000258: 00093503 ld x10,0(x18) + 8000025c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x51b140cb7b560108 + 80000260: 00093183 ld x3,0(x18) + 80000264: 00890913 addi x18,x18,8 + +0000000080000268 : +Zbkc_clmul_cg_cp_rs1_b10: + clmul x5, x10, x3 # perform operation + 80000268: 0a3512b3 clmul x5,x10,x3 + # Check if x5 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x5, Zbkc_clmul_cg_cp_rs1_b10, Zbkc_clmul_cg_cp_rs1_b10_str) + 8000026c: 000f3683 ld x13,0(x30) + 80000270: 00568c63 beq x13,x5,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e665 .word 0x8000e665 + 80000284: 00000000 .word 0x00000000 + 80000288: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x8b8de7664db1bc91 + 8000028c: 00093583 ld x11,0(x18) + 80000290: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xfcb4582f17b6c207 + 80000294: 00093c03 ld x24,0(x18) + 80000298: 00890913 addi x18,x18,8 + +000000008000029c : +Zbkc_clmul_cg_cp_rs1_b11: + clmul x7, x11, x24 # perform operation + 8000029c: 0b8593b3 clmul x7,x11,x24 + # Check if x7 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x7, Zbkc_clmul_cg_cp_rs1_b11, Zbkc_clmul_cg_cp_rs1_b11_str) + 800002a0: 000f3683 ld x13,0(x30) + 800002a4: 00768c63 beq x13,x7,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e699 .word 0x8000e699 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xc8a7e3ee3994a5a3 + 800002c0: 00093603 ld x12,0(x18) + 800002c4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x749ff8aff6f0dcd0 + 800002c8: 00093183 ld x3,0(x18) + 800002cc: 00890913 addi x18,x18,8 + +00000000800002d0 : +Zbkc_clmul_cg_cp_rs1_b12: + clmul x16, x12, x3 # perform operation + 800002d0: 0a361833 clmul x16,x12,x3 + # Check if x16 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x16, Zbkc_clmul_cg_cp_rs1_b12, Zbkc_clmul_cg_cp_rs1_b12_str) + 800002d4: 000f3683 ld x13,0(x30) + 800002d8: 01068c63 beq x13,x16,800002f0 + 800002dc: 2650776f jal x14,80007d40 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 8000e6cd .word 0x8000e6cd + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008f0f13 addi x30,x30,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xfdf06b88f8561d5e + 800002fc: 00093683 ld x13,0(x18) + 80000300: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x20e13617faf7af76 + 80000304: 00093503 ld x10,0(x18) + 80000308: 00890913 addi x18,x18,8 + +000000008000030c : +Zbkc_clmul_cg_cp_rs1_b13: + clmul x19, x13, x10 # perform operation + 8000030c: 0aa699b3 clmul x19,x13,x10 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkc_clmul_cg_cp_rs1_b13, Zbkc_clmul_cg_cp_rs1_b13_str) + 80000310: 000f3203 ld x4,0(x30) + 80000314: 01320c63 beq x4,x19,8000032c + 80000318: 1e9072ef jal x5,80007d00 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e701 .word 0x8000e701 + 80000328: 00000000 .word 0x00000000 + 8000032c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xcf2f66fa6852caf4 + 80000330: 00093703 ld x14,0(x18) + 80000334: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xff63b23da33af9ed + 80000338: 00093b83 ld x23,0(x18) + 8000033c: 00890913 addi x18,x18,8 + +0000000080000340 : +Zbkc_clmul_cg_cp_rs1_b14: + clmul x12, x14, x23 # perform operation + 80000340: 0b771633 clmul x12,x14,x23 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zbkc_clmul_cg_cp_rs1_b14, Zbkc_clmul_cg_cp_rs1_b14_str) + 80000344: 000f3203 ld x4,0(x30) + 80000348: 00c20c63 beq x4,x12,80000360 + 8000034c: 1b5072ef jal x5,80007d00 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e735 .word 0x8000e735 + 8000035c: 00000000 .word 0x00000000 + 80000360: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xa846abab7a6cfbe1 + 80000364: 00093783 ld x15,0(x18) + 80000368: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x9bd06bda515d2264 + 8000036c: 00093a03 ld x20,0(x18) + 80000370: 00890913 addi x18,x18,8 + +0000000080000374 : +Zbkc_clmul_cg_cp_rs1_b15: + clmul x0, x15, x20 # perform operation + 80000374: 0b479033 clmul x0,x15,x20 + # Check if x0 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x0, Zbkc_clmul_cg_cp_rs1_b15, Zbkc_clmul_cg_cp_rs1_b15_str) + 80000378: 000f3203 ld x4,0(x30) + 8000037c: 00020c63 beq x4,x0,80000394 + 80000380: 181072ef jal x5,80007d00 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 8000e769 .word 0x8000e769 + 80000390: 00000000 .word 0x00000000 + 80000394: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x02eb7d4d09f32fae + 80000398: 00093803 ld x16,0(x18) + 8000039c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x1cfde70a84eb4bde + 800003a0: 00093683 ld x13,0(x18) + 800003a4: 00890913 addi x18,x18,8 + +00000000800003a8 : +Zbkc_clmul_cg_cp_rs1_b16: + clmul x10, x16, x13 # perform operation + 800003a8: 0ad81533 clmul x10,x16,x13 + # Check if x10 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x10, Zbkc_clmul_cg_cp_rs1_b16, Zbkc_clmul_cg_cp_rs1_b16_str) + 800003ac: 000f3203 ld x4,0(x30) + 800003b0: 00a20c63 beq x4,x10,800003c8 + 800003b4: 14d072ef jal x5,80007d00 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 8000e79d .word 0x8000e79d + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xa936ebaf70219e4d + 800003cc: 00093883 ld x17,0(x18) + 800003d0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x607411d949793e0c + 800003d4: 00093083 ld x1,0(x18) + 800003d8: 00890913 addi x18,x18,8 + +00000000800003dc : +Zbkc_clmul_cg_cp_rs1_b17: + clmul x6, x17, x1 # perform operation + 800003dc: 0a189333 clmul x6,x17,x1 + # Check if x6 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x6, Zbkc_clmul_cg_cp_rs1_b17, Zbkc_clmul_cg_cp_rs1_b17_str) + 800003e0: 000f3203 ld x4,0(x30) + 800003e4: 00620c63 beq x4,x6,800003fc + 800003e8: 119072ef jal x5,80007d00 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 8000e7d1 .word 0x8000e7d1 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008f0f13 addi x30,x30,8 + + mv x1, x18 # switch data pointer register to avoid conflict with test + 80000400: 00090093 addi x1,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x542879cac99d92c6 + 80000404: 0000b903 ld x18,0(x1) + 80000408: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs2: x3 = 0xf541fe1a33e7ed18 + 8000040c: 0000b183 ld x3,0(x1) + 80000410: 00808093 addi x1,x1,8 + +0000000080000414 : +Zbkc_clmul_cg_cp_rs1_b18: + clmul x26, x18, x3 # perform operation + 80000414: 0a391d33 clmul x26,x18,x3 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_b18, Zbkc_clmul_cg_cp_rs1_b18_str) + 80000418: 000f3203 ld x4,0(x30) + 8000041c: 01a20c63 beq x4,x26,80000434 + 80000420: 0e1072ef jal x5,80007d00 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8000e805 .word 0x8000e805 + 80000430: 00000000 .word 0x00000000 + 80000434: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x9b096d14651a8823 + 80000438: 0000b983 ld x19,0(x1) + 8000043c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0x8d5b3c324b28e1a3 + 80000440: 0000b803 ld x16,0(x1) + 80000444: 00808093 addi x1,x1,8 + +0000000080000448 : +Zbkc_clmul_cg_cp_rs1_b19: + clmul x15, x19, x16 # perform operation + 80000448: 0b0997b3 clmul x15,x19,x16 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zbkc_clmul_cg_cp_rs1_b19, Zbkc_clmul_cg_cp_rs1_b19_str) + 8000044c: 000f3203 ld x4,0(x30) + 80000450: 00f20c63 beq x4,x15,80000468 + 80000454: 0ad072ef jal x5,80007d00 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8000e839 .word 0x8000e839 + 80000464: 00000000 .word 0x00000000 + 80000468: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x50077ca5ab5ca9db + 8000046c: 0000ba03 ld x20,0(x1) + 80000470: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x637a6d85955037f9 + 80000474: 0000b503 ld x10,0(x1) + 80000478: 00808093 addi x1,x1,8 + +000000008000047c : +Zbkc_clmul_cg_cp_rs1_b20: + clmul x0, x20, x10 # perform operation + 8000047c: 0aaa1033 clmul x0,x20,x10 + # Check if x0 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x0, Zbkc_clmul_cg_cp_rs1_b20, Zbkc_clmul_cg_cp_rs1_b20_str) + 80000480: 000f3203 ld x4,0(x30) + 80000484: 00020c63 beq x4,x0,8000049c + 80000488: 079072ef jal x5,80007d00 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 8000e86d .word 0x8000e86d + 80000498: 00000000 .word 0x00000000 + 8000049c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x50e779d4bf293b48 + 800004a0: 0000ba83 ld x21,0(x1) + 800004a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0x89b4df90a4621875 + 800004a8: 0000bd83 ld x27,0(x1) + 800004ac: 00808093 addi x1,x1,8 + +00000000800004b0 : +Zbkc_clmul_cg_cp_rs1_b21: + clmul x16, x21, x27 # perform operation + 800004b0: 0bba9833 clmul x16,x21,x27 + # Check if x16 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x16, Zbkc_clmul_cg_cp_rs1_b21, Zbkc_clmul_cg_cp_rs1_b21_str) + 800004b4: 000f3203 ld x4,0(x30) + 800004b8: 01020c63 beq x4,x16,800004d0 + 800004bc: 045072ef jal x5,80007d00 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 8000e8a1 .word 0x8000e8a1 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xe33d25a33d8504f0 + 800004d4: 0000bb03 ld x22,0(x1) + 800004d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0xed9f558b98603e01 + 800004dc: 0000bd03 ld x26,0(x1) + 800004e0: 00808093 addi x1,x1,8 + +00000000800004e4 : +Zbkc_clmul_cg_cp_rs1_b22: + clmul x19, x22, x26 # perform operation + 800004e4: 0bab19b3 clmul x19,x22,x26 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkc_clmul_cg_cp_rs1_b22, Zbkc_clmul_cg_cp_rs1_b22_str) + 800004e8: 000f3203 ld x4,0(x30) + 800004ec: 01320c63 beq x4,x19,80000504 + 800004f0: 011072ef jal x5,80007d00 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 8000e8d5 .word 0x8000e8d5 + 80000500: 00000000 .word 0x00000000 + 80000504: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x3da1162cf8cfacae + 80000508: 0000bb83 ld x23,0(x1) + 8000050c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0xef2849cf7a51d8a7 + 80000510: 0000ba03 ld x20,0(x1) + 80000514: 00808093 addi x1,x1,8 + +0000000080000518 : +Zbkc_clmul_cg_cp_rs1_b23: + clmul x8, x23, x20 # perform operation + 80000518: 0b4b9433 clmul x8,x23,x20 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zbkc_clmul_cg_cp_rs1_b23, Zbkc_clmul_cg_cp_rs1_b23_str) + 8000051c: 000f3203 ld x4,0(x30) + 80000520: 00820c63 beq x4,x8,80000538 + 80000524: 7dc072ef jal x5,80007d00 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 8000e909 .word 0x8000e909 + 80000534: 00000000 .word 0x00000000 + 80000538: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xff639fd882ce8819 + 8000053c: 0000bc03 ld x24,0(x1) + 80000540: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xd420180159433b5a + 80000544: 0000bd83 ld x27,0(x1) + 80000548: 00808093 addi x1,x1,8 + +000000008000054c : +Zbkc_clmul_cg_cp_rs1_b24: + clmul x2, x24, x27 # perform operation + 8000054c: 0bbc1133 clmul x2,x24,x27 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zbkc_clmul_cg_cp_rs1_b24, Zbkc_clmul_cg_cp_rs1_b24_str) + 80000550: 000f3203 ld x4,0(x30) + 80000554: 00220c63 beq x4,x2,8000056c + 80000558: 7a8072ef jal x5,80007d00 + 8000055c: 8000054c .word 0x8000054c + 80000560: 00000000 .word 0x00000000 + 80000564: 8000e93d .word 0x8000e93d + 80000568: 00000000 .word 0x00000000 + 8000056c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x23544fea58d4d4ce + 80000570: 0000bc83 ld x25,0(x1) + 80000574: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs2: x2 = 0x4b26fd21a4859b7b + 80000578: 0000b103 ld x2,0(x1) + 8000057c: 00808093 addi x1,x1,8 + +0000000080000580 : +Zbkc_clmul_cg_cp_rs1_b25: + clmul x14, x25, x2 # perform operation + 80000580: 0a2c9733 clmul x14,x25,x2 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zbkc_clmul_cg_cp_rs1_b25, Zbkc_clmul_cg_cp_rs1_b25_str) + 80000584: 000f3203 ld x4,0(x30) + 80000588: 00e20c63 beq x4,x14,800005a0 + 8000058c: 774072ef jal x5,80007d00 + 80000590: 80000580 .word 0x80000580 + 80000594: 00000000 .word 0x00000000 + 80000598: 8000e971 .word 0x8000e971 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xbd511e6ea9040718 + 800005a4: 0000bd03 ld x26,0(x1) + 800005a8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs2: x9 = 0x7f0524c7a198f442 + 800005ac: 0000b483 ld x9,0(x1) + 800005b0: 00808093 addi x1,x1,8 + +00000000800005b4 : +Zbkc_clmul_cg_cp_rs1_b26: + clmul x14, x26, x9 # perform operation + 800005b4: 0a9d1733 clmul x14,x26,x9 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zbkc_clmul_cg_cp_rs1_b26, Zbkc_clmul_cg_cp_rs1_b26_str) + 800005b8: 000f3203 ld x4,0(x30) + 800005bc: 00e20c63 beq x4,x14,800005d4 + 800005c0: 740072ef jal x5,80007d00 + 800005c4: 800005b4 .word 0x800005b4 + 800005c8: 00000000 .word 0x00000000 + 800005cc: 8000e9a5 .word 0x8000e9a5 + 800005d0: 00000000 .word 0x00000000 + 800005d4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xcffeb3e9d1eb333c + 800005d8: 0000bd83 ld x27,0(x1) + 800005dc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs2: x10 = 0x99a51f83fa692252 + 800005e0: 0000b503 ld x10,0(x1) + 800005e4: 00808093 addi x1,x1,8 + +00000000800005e8 : +Zbkc_clmul_cg_cp_rs1_b27: + clmul x0, x27, x10 # perform operation + 800005e8: 0aad9033 clmul x0,x27,x10 + # Check if x0 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x0, Zbkc_clmul_cg_cp_rs1_b27, Zbkc_clmul_cg_cp_rs1_b27_str) + 800005ec: 000f3203 ld x4,0(x30) + 800005f0: 00020c63 beq x4,x0,80000608 + 800005f4: 70c072ef jal x5,80007d00 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 8000e9d9 .word 0x8000e9d9 + 80000604: 00000000 .word 0x00000000 + 80000608: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x6692853de512186e + 8000060c: 0000be03 ld x28,0(x1) + 80000610: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0xe3c3bf5aeab0f376 + 80000614: 0000b003 ld x0,0(x1) + 80000618: 00808093 addi x1,x1,8 + +000000008000061c : +Zbkc_clmul_cg_cp_rs1_b28: + clmul x12, x28, x0 # perform operation + 8000061c: 0a0e1633 clmul x12,x28,x0 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zbkc_clmul_cg_cp_rs1_b28, Zbkc_clmul_cg_cp_rs1_b28_str) + 80000620: 000f3203 ld x4,0(x30) + 80000624: 00c20c63 beq x4,x12,8000063c + 80000628: 6d8072ef jal x5,80007d00 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 8000ea0d .word 0x8000ea0d + 80000638: 00000000 .word 0x00000000 + 8000063c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x765429fa2a20cb63 + 80000640: 0000be83 ld x29,0(x1) + 80000644: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0xcd05c4e86d3cc926 + 80000648: 0000b703 ld x14,0(x1) + 8000064c: 00808093 addi x1,x1,8 + +0000000080000650 : +Zbkc_clmul_cg_cp_rs1_b29: + clmul x0, x29, x14 # perform operation + 80000650: 0aee9033 clmul x0,x29,x14 + # Check if x0 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x0, Zbkc_clmul_cg_cp_rs1_b29, Zbkc_clmul_cg_cp_rs1_b29_str) + 80000654: 000f3203 ld x4,0(x30) + 80000658: 00020c63 beq x4,x0,80000670 + 8000065c: 6a4072ef jal x5,80007d00 + 80000660: 80000650 .word 0x80000650 + 80000664: 00000000 .word 0x00000000 + 80000668: 8000ea41 .word 0x8000ea41 + 8000066c: 00000000 .word 0x00000000 + 80000670: 008f0f13 addi x30,x30,8 + + mv x12, x30 # switch signature pointer register to avoid conflict with test + 80000674: 000f0613 addi x12,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x9f6ee56271697ef5 + 80000678: 0000bf03 ld x30,0(x1) + 8000067c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x55f3de16064c8504 + 80000680: 0000b583 ld x11,0(x1) + 80000684: 00808093 addi x1,x1,8 + +0000000080000688 : +Zbkc_clmul_cg_cp_rs1_b30: + clmul x28, x30, x11 # perform operation + 80000688: 0abf1e33 clmul x28,x30,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkc_clmul_cg_cp_rs1_b30, Zbkc_clmul_cg_cp_rs1_b30_str) + 8000068c: 00063203 ld x4,0(x12) + 80000690: 01c20c63 beq x4,x28,800006a8 + 80000694: 66c072ef jal x5,80007d00 + 80000698: 80000688 .word 0x80000688 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 8000ea75 .word 0x8000ea75 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xc87b022aa457ccc5 + 800006ac: 0000bf83 ld x31,0(x1) + 800006b0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0x6de5abc2dd3d8258 + 800006b4: 0000bb83 ld x23,0(x1) + 800006b8: 00808093 addi x1,x1,8 + +00000000800006bc : +Zbkc_clmul_cg_cp_rs1_b31: + clmul x19, x31, x23 # perform operation + 800006bc: 0b7f99b3 clmul x19,x31,x23 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zbkc_clmul_cg_cp_rs1_b31, Zbkc_clmul_cg_cp_rs1_b31_str) + 800006c0: 00063203 ld x4,0(x12) + 800006c4: 01320c63 beq x4,x19,800006dc + 800006c8: 638072ef jal x5,80007d00 + 800006cc: 800006bc .word 0x800006bc + 800006d0: 00000000 .word 0x00000000 + 800006d4: 8000eaa9 .word 0x8000eaa9 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x879ba8be709410dd + 800006e0: 0000b683 ld x13,0(x1) + 800006e4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x34d6b1aea6455294 + 800006e8: 0000b003 ld x0,0(x1) + 800006ec: 00808093 addi x1,x1,8 + +00000000800006f0 : +Zbkc_clmul_cg_cp_rs2_b0: + clmul x2, x13, x0 # perform operation + 800006f0: 0a069133 clmul x2,x13,x0 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkc_clmul_cg_cp_rs2_b0, Zbkc_clmul_cg_cp_rs2_b0_str) + 800006f4: 00063203 ld x4,0(x12) + 800006f8: 00220c63 beq x4,x2,80000710 + 800006fc: 604072ef jal x5,80007d00 + 80000700: 800006f0 .word 0x800006f0 + 80000704: 00000000 .word 0x00000000 + 80000708: 8000eadd .word 0x8000eadd + 8000070c: 00000000 .word 0x00000000 + 80000710: 00860613 addi x12,x12,8 + + mv x10, x1 # switch data pointer register to avoid conflict with test + 80000714: 00008513 addi x10,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xe718d628d7ef0cef + 80000718: 00053783 ld x15,0(x10) + 8000071c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x3060dde3b6867382 + 80000720: 00053083 ld x1,0(x10) + 80000724: 00850513 addi x10,x10,8 + +0000000080000728 : +Zbkc_clmul_cg_cp_rs2_b1: + clmul x7, x15, x1 # perform operation + 80000728: 0a1793b3 clmul x7,x15,x1 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkc_clmul_cg_cp_rs2_b1, Zbkc_clmul_cg_cp_rs2_b1_str) + 8000072c: 00063203 ld x4,0(x12) + 80000730: 00720c63 beq x4,x7,80000748 + 80000734: 5cc072ef jal x5,80007d00 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 8000eb10 .word 0x8000eb10 + 80000744: 00000000 .word 0x00000000 + 80000748: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5ac59ce1b06a1a77 + 8000074c: 00053a03 ld x20,0(x10) + 80000750: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5955ffa3dc2125a7 + 80000754: 00053103 ld x2,0(x10) + 80000758: 00850513 addi x10,x10,8 + +000000008000075c : +Zbkc_clmul_cg_cp_rs2_b2: + clmul x17, x20, x2 # perform operation + 8000075c: 0a2a18b3 clmul x17,x20,x2 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zbkc_clmul_cg_cp_rs2_b2, Zbkc_clmul_cg_cp_rs2_b2_str) + 80000760: 00063203 ld x4,0(x12) + 80000764: 01120c63 beq x4,x17,8000077c + 80000768: 598072ef jal x5,80007d00 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 8000eb43 .word 0x8000eb43 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xc305a629ba51f4ec + 80000780: 00053883 ld x17,0(x10) + 80000784: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x9442126d860f910c + 80000788: 00053183 ld x3,0(x10) + 8000078c: 00850513 addi x10,x10,8 + +0000000080000790 : +Zbkc_clmul_cg_cp_rs2_b3: + clmul x28, x17, x3 # perform operation + 80000790: 0a389e33 clmul x28,x17,x3 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkc_clmul_cg_cp_rs2_b3, Zbkc_clmul_cg_cp_rs2_b3_str) + 80000794: 00063203 ld x4,0(x12) + 80000798: 01c20c63 beq x4,x28,800007b0 + 8000079c: 564072ef jal x5,80007d00 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 8000eb76 .word 0x8000eb76 + 800007ac: 00000000 .word 0x00000000 + 800007b0: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800007b4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800007b8: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xc199670072a864c1 + 800007bc: 00053783 ld x15,0(x10) + 800007c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x5f256780850be8ce + 800007c4: 00053203 ld x4,0(x10) + 800007c8: 00850513 addi x10,x10,8 + +00000000800007cc : +Zbkc_clmul_cg_cp_rs2_b4: + clmul x19, x15, x4 # perform operation + 800007cc: 0a4799b3 clmul x19,x15,x4 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zbkc_clmul_cg_cp_rs2_b4, Zbkc_clmul_cg_cp_rs2_b4_str) + 800007d0: 00063383 ld x7,0(x12) + 800007d4: 01338c63 beq x7,x19,800007ec + 800007d8: 5400746f jal x8,80007d18 + 800007dc: 800007cc .word 0x800007cc + 800007e0: 00000000 .word 0x00000000 + 800007e4: 8000eba9 .word 0x8000eba9 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7d9acfb9fdabbc11 + 800007f0: 00053b03 ld x22,0(x10) + 800007f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xa8ff3d2f23892c25 + 800007f8: 00053283 ld x5,0(x10) + 800007fc: 00850513 addi x10,x10,8 + +0000000080000800 : +Zbkc_clmul_cg_cp_rs2_b5: + clmul x19, x22, x5 # perform operation + 80000800: 0a5b19b3 clmul x19,x22,x5 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zbkc_clmul_cg_cp_rs2_b5, Zbkc_clmul_cg_cp_rs2_b5_str) + 80000804: 00063383 ld x7,0(x12) + 80000808: 01338c63 beq x7,x19,80000820 + 8000080c: 50c0746f jal x8,80007d18 + 80000810: 80000800 .word 0x80000800 + 80000814: 00000000 .word 0x00000000 + 80000818: 8000ebdc .word 0x8000ebdc + 8000081c: 00000000 .word 0x00000000 + 80000820: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x612a8a53a47f43dc + 80000824: 00053a83 ld x21,0(x10) + 80000828: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfec67da38b06239f + 8000082c: 00053303 ld x6,0(x10) + 80000830: 00850513 addi x10,x10,8 + +0000000080000834 : +Zbkc_clmul_cg_cp_rs2_b6: + clmul x22, x21, x6 # perform operation + 80000834: 0a6a9b33 clmul x22,x21,x6 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zbkc_clmul_cg_cp_rs2_b6, Zbkc_clmul_cg_cp_rs2_b6_str) + 80000838: 00063383 ld x7,0(x12) + 8000083c: 01638c63 beq x7,x22,80000854 + 80000840: 4d80746f jal x8,80007d18 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 8000ec0f .word 0x8000ec0f + 80000850: 00000000 .word 0x00000000 + 80000854: 00860613 addi x12,x12,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000858: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 8000085c: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x2f0f2520f8c87db7 + 80000860: 00053003 ld x0,0(x10) + 80000864: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x979b13553feaeaca + 80000868: 00053383 ld x7,0(x10) + 8000086c: 00850513 addi x10,x10,8 + +0000000080000870 : +Zbkc_clmul_cg_cp_rs2_b7: + clmul x3, x0, x7 # perform operation + 80000870: 0a7011b3 clmul x3,x0,x7 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkc_clmul_cg_cp_rs2_b7, Zbkc_clmul_cg_cp_rs2_b7_str) + 80000874: 00063203 ld x4,0(x12) + 80000878: 00320c63 beq x4,x3,80000890 + 8000087c: 484072ef jal x5,80007d00 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 8000ec42 .word 0x8000ec42 + 8000088c: 00000000 .word 0x00000000 + 80000890: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x3a538961977e26da + 80000894: 00053103 ld x2,0(x10) + 80000898: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x46dcd53794699891 + 8000089c: 00053403 ld x8,0(x10) + 800008a0: 00850513 addi x10,x10,8 + +00000000800008a4 : +Zbkc_clmul_cg_cp_rs2_b8: + clmul x22, x2, x8 # perform operation + 800008a4: 0a811b33 clmul x22,x2,x8 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zbkc_clmul_cg_cp_rs2_b8, Zbkc_clmul_cg_cp_rs2_b8_str) + 800008a8: 00063203 ld x4,0(x12) + 800008ac: 01620c63 beq x4,x22,800008c4 + 800008b0: 450072ef jal x5,80007d00 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 8000ec75 .word 0x8000ec75 + 800008c0: 00000000 .word 0x00000000 + 800008c4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xa414dcb92919ea4b + 800008c8: 00053383 ld x7,0(x10) + 800008cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xa715049598ecde41 + 800008d0: 00053483 ld x9,0(x10) + 800008d4: 00850513 addi x10,x10,8 + +00000000800008d8 : +Zbkc_clmul_cg_cp_rs2_b9: + clmul x24, x7, x9 # perform operation + 800008d8: 0a939c33 clmul x24,x7,x9 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkc_clmul_cg_cp_rs2_b9, Zbkc_clmul_cg_cp_rs2_b9_str) + 800008dc: 00063203 ld x4,0(x12) + 800008e0: 01820c63 beq x4,x24,800008f8 + 800008e4: 41c072ef jal x5,80007d00 + 800008e8: 800008d8 .word 0x800008d8 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 8000eca8 .word 0x8000eca8 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 00860613 addi x12,x12,8 + + mv x11, x10 # switch data pointer register to avoid conflict with test + 800008fc: 00050593 addi x11,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0xb9d2c3ab210392be + 80000900: 0005bc03 ld x24,0(x11) + 80000904: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x3e29aab1f4fc44e3 + 80000908: 0005b503 ld x10,0(x11) + 8000090c: 00858593 addi x11,x11,8 + +0000000080000910 : +Zbkc_clmul_cg_cp_rs2_b10: + clmul x6, x24, x10 # perform operation + 80000910: 0aac1333 clmul x6,x24,x10 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zbkc_clmul_cg_cp_rs2_b10, Zbkc_clmul_cg_cp_rs2_b10_str) + 80000914: 00063203 ld x4,0(x12) + 80000918: 00620c63 beq x4,x6,80000930 + 8000091c: 3e4072ef jal x5,80007d00 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 8000ecdb .word 0x8000ecdb + 8000092c: 00000000 .word 0x00000000 + 80000930: 00860613 addi x12,x12,8 + + mv x31, x11 # switch data pointer register to avoid conflict with test + 80000934: 00058f93 addi x31,x11,0 +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xfa4a6fc25901db60 + 80000938: 000fbe03 ld x28,0(x31) + 8000093c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0x995c91041035f57d + 80000940: 000fb583 ld x11,0(x31) + 80000944: 008f8f93 addi x31,x31,8 + +0000000080000948 : +Zbkc_clmul_cg_cp_rs2_b11: + clmul x24, x28, x11 # perform operation + 80000948: 0abe1c33 clmul x24,x28,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkc_clmul_cg_cp_rs2_b11, Zbkc_clmul_cg_cp_rs2_b11_str) + 8000094c: 00063203 ld x4,0(x12) + 80000950: 01820c63 beq x4,x24,80000968 + 80000954: 3ac072ef jal x5,80007d00 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000ed0f .word 0x8000ed0f + 80000964: 00000000 .word 0x00000000 + 80000968: 00860613 addi x12,x12,8 + + mv x25, x12 # switch signature pointer register to avoid conflict with test + 8000096c: 00060c93 addi x25,x12,0 +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x7e0999513f9b9f8a + 80000970: 000fb583 ld x11,0(x31) + 80000974: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0x25a96477e928e5fe + 80000978: 000fb603 ld x12,0(x31) + 8000097c: 008f8f93 addi x31,x31,8 + +0000000080000980 : +Zbkc_clmul_cg_cp_rs2_b12: + clmul x0, x11, x12 # perform operation + 80000980: 0ac59033 clmul x0,x11,x12 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zbkc_clmul_cg_cp_rs2_b12, Zbkc_clmul_cg_cp_rs2_b12_str) + 80000984: 000cb203 ld x4,0(x25) + 80000988: 00020c63 beq x4,x0,800009a0 + 8000098c: 374072ef jal x5,80007d00 + 80000990: 80000980 .word 0x80000980 + 80000994: 00000000 .word 0x00000000 + 80000998: 8000ed43 .word 0x8000ed43 + 8000099c: 00000000 .word 0x00000000 + 800009a0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x6ec77da270796ecf + 800009a4: 000fb703 ld x14,0(x31) + 800009a8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0x77a04bd835e67a35 + 800009ac: 000fb683 ld x13,0(x31) + 800009b0: 008f8f93 addi x31,x31,8 + +00000000800009b4 : +Zbkc_clmul_cg_cp_rs2_b13: + clmul x8, x14, x13 # perform operation + 800009b4: 0ad71433 clmul x8,x14,x13 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zbkc_clmul_cg_cp_rs2_b13, Zbkc_clmul_cg_cp_rs2_b13_str) + 800009b8: 000cb203 ld x4,0(x25) + 800009bc: 00820c63 beq x4,x8,800009d4 + 800009c0: 340072ef jal x5,80007d00 + 800009c4: 800009b4 .word 0x800009b4 + 800009c8: 00000000 .word 0x00000000 + 800009cc: 8000ed77 .word 0x8000ed77 + 800009d0: 00000000 .word 0x00000000 + 800009d4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x32a34626f1ba4873 + 800009d8: 000fbc03 ld x24,0(x31) + 800009dc: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0xb385b9ad295d29fe + 800009e0: 000fb703 ld x14,0(x31) + 800009e4: 008f8f93 addi x31,x31,8 + +00000000800009e8 : +Zbkc_clmul_cg_cp_rs2_b14: + clmul x29, x24, x14 # perform operation + 800009e8: 0aec1eb3 clmul x29,x24,x14 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zbkc_clmul_cg_cp_rs2_b14, Zbkc_clmul_cg_cp_rs2_b14_str) + 800009ec: 000cb203 ld x4,0(x25) + 800009f0: 01d20c63 beq x4,x29,80000a08 + 800009f4: 30c072ef jal x5,80007d00 + 800009f8: 800009e8 .word 0x800009e8 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 8000edab .word 0x8000edab + 80000a04: 00000000 .word 0x00000000 + 80000a08: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x0a5e59b2312589e9 + 80000a0c: 000fb503 ld x10,0(x31) + 80000a10: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xa0a7628b8caa20c5 + 80000a14: 000fb783 ld x15,0(x31) + 80000a18: 008f8f93 addi x31,x31,8 + +0000000080000a1c : +Zbkc_clmul_cg_cp_rs2_b15: + clmul x30, x10, x15 # perform operation + 80000a1c: 0af51f33 clmul x30,x10,x15 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zbkc_clmul_cg_cp_rs2_b15, Zbkc_clmul_cg_cp_rs2_b15_str) + 80000a20: 000cb203 ld x4,0(x25) + 80000a24: 01e20c63 beq x4,x30,80000a3c + 80000a28: 2d8072ef jal x5,80007d00 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 8000eddf .word 0x8000eddf + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xb5e49b5c8b8c1561 + 80000a40: 000fba03 ld x20,0(x31) + 80000a44: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0xb4e5da11ae18c3f9 + 80000a48: 000fb803 ld x16,0(x31) + 80000a4c: 008f8f93 addi x31,x31,8 + +0000000080000a50 : +Zbkc_clmul_cg_cp_rs2_b16: + clmul x7, x20, x16 # perform operation + 80000a50: 0b0a13b3 clmul x7,x20,x16 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zbkc_clmul_cg_cp_rs2_b16, Zbkc_clmul_cg_cp_rs2_b16_str) + 80000a54: 000cb203 ld x4,0(x25) + 80000a58: 00720c63 beq x4,x7,80000a70 + 80000a5c: 2a4072ef jal x5,80007d00 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000ee13 .word 0x8000ee13 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xe2f1a61a7b83ee33 + 80000a74: 000fba83 ld x21,0(x31) + 80000a78: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0x54d764c533610fae + 80000a7c: 000fb883 ld x17,0(x31) + 80000a80: 008f8f93 addi x31,x31,8 + +0000000080000a84 : +Zbkc_clmul_cg_cp_rs2_b17: + clmul x18, x21, x17 # perform operation + 80000a84: 0b1a9933 clmul x18,x21,x17 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zbkc_clmul_cg_cp_rs2_b17, Zbkc_clmul_cg_cp_rs2_b17_str) + 80000a88: 000cb203 ld x4,0(x25) + 80000a8c: 01220c63 beq x4,x18,80000aa4 + 80000a90: 270072ef jal x5,80007d00 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 8000ee47 .word 0x8000ee47 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x61e0e1cca7107e52 + 80000aa8: 000fbf03 ld x30,0(x31) + 80000aac: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x39660b000919576a + 80000ab0: 000fb903 ld x18,0(x31) + 80000ab4: 008f8f93 addi x31,x31,8 + +0000000080000ab8 : +Zbkc_clmul_cg_cp_rs2_b18: + clmul x16, x30, x18 # perform operation + 80000ab8: 0b2f1833 clmul x16,x30,x18 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zbkc_clmul_cg_cp_rs2_b18, Zbkc_clmul_cg_cp_rs2_b18_str) + 80000abc: 000cb203 ld x4,0(x25) + 80000ac0: 01020c63 beq x4,x16,80000ad8 + 80000ac4: 23c072ef jal x5,80007d00 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 8000ee7b .word 0x8000ee7b + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x722bdc8ed91d9af2 + 80000adc: 000fbf03 ld x30,0(x31) + 80000ae0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0xe6fcd9348498608f + 80000ae4: 000fb983 ld x19,0(x31) + 80000ae8: 008f8f93 addi x31,x31,8 + +0000000080000aec : +Zbkc_clmul_cg_cp_rs2_b19: + clmul x6, x30, x19 # perform operation + 80000aec: 0b3f1333 clmul x6,x30,x19 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zbkc_clmul_cg_cp_rs2_b19, Zbkc_clmul_cg_cp_rs2_b19_str) + 80000af0: 000cb203 ld x4,0(x25) + 80000af4: 00620c63 beq x4,x6,80000b0c + 80000af8: 208072ef jal x5,80007d00 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000eeaf .word 0x8000eeaf + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xa448492c04a2ea95 + 80000b10: 000fb883 ld x17,0(x31) + 80000b14: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0x194e4788496844a9 + 80000b18: 000fba03 ld x20,0(x31) + 80000b1c: 008f8f93 addi x31,x31,8 + +0000000080000b20 : +Zbkc_clmul_cg_cp_rs2_b20: + clmul x27, x17, x20 # perform operation + 80000b20: 0b489db3 clmul x27,x17,x20 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zbkc_clmul_cg_cp_rs2_b20, Zbkc_clmul_cg_cp_rs2_b20_str) + 80000b24: 000cb203 ld x4,0(x25) + 80000b28: 01b20c63 beq x4,x27,80000b40 + 80000b2c: 1d4072ef jal x5,80007d00 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 8000eee3 .word 0x8000eee3 + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xc4ed339d2a5dbc46 + 80000b44: 000fbe83 ld x29,0(x31) + 80000b48: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0x04365899303bfb6b + 80000b4c: 000fba83 ld x21,0(x31) + 80000b50: 008f8f93 addi x31,x31,8 + +0000000080000b54 : +Zbkc_clmul_cg_cp_rs2_b21: + clmul x20, x29, x21 # perform operation + 80000b54: 0b5e9a33 clmul x20,x29,x21 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_b21, Zbkc_clmul_cg_cp_rs2_b21_str) + 80000b58: 000cb203 ld x4,0(x25) + 80000b5c: 01420c63 beq x4,x20,80000b74 + 80000b60: 1a0072ef jal x5,80007d00 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000ef17 .word 0x8000ef17 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs1: x0 = 0x7928b6af3afa6cba + 80000b78: 000fb003 ld x0,0(x31) + 80000b7c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x5455a1119fdd3a03 + 80000b80: 000fbb03 ld x22,0(x31) + 80000b84: 008f8f93 addi x31,x31,8 + +0000000080000b88 : +Zbkc_clmul_cg_cp_rs2_b22: + clmul x20, x0, x22 # perform operation + 80000b88: 0b601a33 clmul x20,x0,x22 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_b22, Zbkc_clmul_cg_cp_rs2_b22_str) + 80000b8c: 000cb203 ld x4,0(x25) + 80000b90: 01420c63 beq x4,x20,80000ba8 + 80000b94: 16c072ef jal x5,80007d00 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000ef4b .word 0x8000ef4b + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xd626e863486b8ae0 + 80000bac: 000fb883 ld x17,0(x31) + 80000bb0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x129d20624a5c914a + 80000bb4: 000fbb83 ld x23,0(x31) + 80000bb8: 008f8f93 addi x31,x31,8 + +0000000080000bbc : +Zbkc_clmul_cg_cp_rs2_b23: + clmul x20, x17, x23 # perform operation + 80000bbc: 0b789a33 clmul x20,x17,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_b23, Zbkc_clmul_cg_cp_rs2_b23_str) + 80000bc0: 000cb203 ld x4,0(x25) + 80000bc4: 01420c63 beq x4,x20,80000bdc + 80000bc8: 138072ef jal x5,80007d00 + 80000bcc: 80000bbc .word 0x80000bbc + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 8000ef7f .word 0x8000ef7f + 80000bd8: 00000000 .word 0x00000000 + 80000bdc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x0e7bae00bbd3d591 + 80000be0: 000fbe83 ld x29,0(x31) + 80000be4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x85b7d31cc3eb3a57 + 80000be8: 000fbc03 ld x24,0(x31) + 80000bec: 008f8f93 addi x31,x31,8 + +0000000080000bf0 : +Zbkc_clmul_cg_cp_rs2_b24: + clmul x20, x29, x24 # perform operation + 80000bf0: 0b8e9a33 clmul x20,x29,x24 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_b24, Zbkc_clmul_cg_cp_rs2_b24_str) + 80000bf4: 000cb203 ld x4,0(x25) + 80000bf8: 01420c63 beq x4,x20,80000c10 + 80000bfc: 104072ef jal x5,80007d00 + 80000c00: 80000bf0 .word 0x80000bf0 + 80000c04: 00000000 .word 0x00000000 + 80000c08: 8000efb3 .word 0x8000efb3 + 80000c0c: 00000000 .word 0x00000000 + 80000c10: 008c8c93 addi x25,x25,8 + + mv x12, x25 # switch signature pointer register to avoid conflict with test + 80000c14: 000c8613 addi x12,x25,0 +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xe873b8a239bd0a18 + 80000c18: 000fba03 ld x20,0(x31) + 80000c1c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0xfb5dab7a92c0c209 + 80000c20: 000fbc83 ld x25,0(x31) + 80000c24: 008f8f93 addi x31,x31,8 + +0000000080000c28 : +Zbkc_clmul_cg_cp_rs2_b25: + clmul x3, x20, x25 # perform operation + 80000c28: 0b9a11b3 clmul x3,x20,x25 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkc_clmul_cg_cp_rs2_b25, Zbkc_clmul_cg_cp_rs2_b25_str) + 80000c2c: 00063203 ld x4,0(x12) + 80000c30: 00320c63 beq x4,x3,80000c48 + 80000c34: 0cc072ef jal x5,80007d00 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000efe7 .word 0x8000efe7 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0xed62d761a490985d + 80000c4c: 000fb403 ld x8,0(x31) + 80000c50: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x42e6b6460b690eeb + 80000c54: 000fbd03 ld x26,0(x31) + 80000c58: 008f8f93 addi x31,x31,8 + +0000000080000c5c : +Zbkc_clmul_cg_cp_rs2_b26: + clmul x0, x8, x26 # perform operation + 80000c5c: 0ba41033 clmul x0,x8,x26 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkc_clmul_cg_cp_rs2_b26, Zbkc_clmul_cg_cp_rs2_b26_str) + 80000c60: 00063203 ld x4,0(x12) + 80000c64: 00020c63 beq x4,x0,80000c7c + 80000c68: 098072ef jal x5,80007d00 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000f01b .word 0x8000f01b + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xef013ccb4c57c84a + 80000c80: 000fb183 ld x3,0(x31) + 80000c84: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x80cbeeaa3ad8413d + 80000c88: 000fbd83 ld x27,0(x31) + 80000c8c: 008f8f93 addi x31,x31,8 + +0000000080000c90 : +Zbkc_clmul_cg_cp_rs2_b27: + clmul x1, x3, x27 # perform operation + 80000c90: 0bb190b3 clmul x1,x3,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkc_clmul_cg_cp_rs2_b27, Zbkc_clmul_cg_cp_rs2_b27_str) + 80000c94: 00063203 ld x4,0(x12) + 80000c98: 00120c63 beq x4,x1,80000cb0 + 80000c9c: 064072ef jal x5,80007d00 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000f04f .word 0x8000f04f + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0xf0d70c48751014e7 + 80000cb4: 000fb803 ld x16,0(x31) + 80000cb8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x90a79e0670f5ff31 + 80000cbc: 000fbe03 ld x28,0(x31) + 80000cc0: 008f8f93 addi x31,x31,8 + +0000000080000cc4 : +Zbkc_clmul_cg_cp_rs2_b28: + clmul x30, x16, x28 # perform operation + 80000cc4: 0bc81f33 clmul x30,x16,x28 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkc_clmul_cg_cp_rs2_b28, Zbkc_clmul_cg_cp_rs2_b28_str) + 80000cc8: 00063203 ld x4,0(x12) + 80000ccc: 01e20c63 beq x4,x30,80000ce4 + 80000cd0: 030072ef jal x5,80007d00 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f083 .word 0x8000f083 + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xfb87b03434c4207e + 80000ce8: 000fbe03 ld x28,0(x31) + 80000cec: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0xa2c617c7ed553cc3 + 80000cf0: 000fbe83 ld x29,0(x31) + 80000cf4: 008f8f93 addi x31,x31,8 + +0000000080000cf8 : +Zbkc_clmul_cg_cp_rs2_b29: + clmul x2, x28, x29 # perform operation + 80000cf8: 0bde1133 clmul x2,x28,x29 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkc_clmul_cg_cp_rs2_b29, Zbkc_clmul_cg_cp_rs2_b29_str) + 80000cfc: 00063203 ld x4,0(x12) + 80000d00: 00220c63 beq x4,x2,80000d18 + 80000d04: 7fd062ef jal x5,80007d00 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000f0b7 .word 0x8000f0b7 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0xef50a02bf035495b + 80000d1c: 000fb403 ld x8,0(x31) + 80000d20: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x818206c8b187980b + 80000d24: 000fbf03 ld x30,0(x31) + 80000d28: 008f8f93 addi x31,x31,8 + +0000000080000d2c : +Zbkc_clmul_cg_cp_rs2_b30: + clmul x15, x8, x30 # perform operation + 80000d2c: 0be417b3 clmul x15,x8,x30 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zbkc_clmul_cg_cp_rs2_b30, Zbkc_clmul_cg_cp_rs2_b30_str) + 80000d30: 00063203 ld x4,0(x12) + 80000d34: 00f20c63 beq x4,x15,80000d4c + 80000d38: 7c9062ef jal x5,80007d00 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000f0eb .word 0x8000f0eb + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00860613 addi x12,x12,8 + + mv x20, x31 # switch data pointer register to avoid conflict with test + 80000d50: 000f8a13 addi x20,x31,0 +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x3055ac4a8648a06e + 80000d54: 000a3303 ld x6,0(x20) + 80000d58: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xfe2f85e8ee9cb360 + 80000d5c: 000a3f83 ld x31,0(x20) + 80000d60: 008a0a13 addi x20,x20,8 + +0000000080000d64 : +Zbkc_clmul_cg_cp_rs2_b31: + clmul x23, x6, x31 # perform operation + 80000d64: 0bf31bb3 clmul x23,x6,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkc_clmul_cg_cp_rs2_b31, Zbkc_clmul_cg_cp_rs2_b31_str) + 80000d68: 00063203 ld x4,0(x12) + 80000d6c: 01720c63 beq x4,x23,80000d84 + 80000d70: 791062ef jal x5,80007d00 + 80000d74: 80000d64 .word 0x80000d64 + 80000d78: 00000000 .word 0x00000000 + 80000d7c: 8000f11f .word 0x8000f11f + 80000d80: 00000000 .word 0x00000000 + 80000d84: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x968145d9a5043277 + 80000d88: 000a3c03 ld x24,0(x20) + 80000d8c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x87b4848f69bafe2e + 80000d90: 000a3783 ld x15,0(x20) + 80000d94: 008a0a13 addi x20,x20,8 + +0000000080000d98 : +Zbkc_clmul_cg_cp_rd_b0: + clmul x0, x24, x15 # perform operation + 80000d98: 0afc1033 clmul x0,x24,x15 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkc_clmul_cg_cp_rd_b0, Zbkc_clmul_cg_cp_rd_b0_str) + 80000d9c: 00063203 ld x4,0(x12) + 80000da0: 00020c63 beq x4,x0,80000db8 + 80000da4: 75d062ef jal x5,80007d00 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000f153 .word 0x8000f153 + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x9e2f5242ba7b6771 + 80000dbc: 000a3303 ld x6,0(x20) + 80000dc0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0xf17330fee8a0489e + 80000dc4: 000a3f03 ld x30,0(x20) + 80000dc8: 008a0a13 addi x20,x20,8 + +0000000080000dcc : +Zbkc_clmul_cg_cp_rd_b1: + clmul x1, x6, x30 # perform operation + 80000dcc: 0be310b3 clmul x1,x6,x30 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkc_clmul_cg_cp_rd_b1, Zbkc_clmul_cg_cp_rd_b1_str) + 80000dd0: 00063203 ld x4,0(x12) + 80000dd4: 00120c63 beq x4,x1,80000dec + 80000dd8: 729062ef jal x5,80007d00 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 8000f185 .word 0x8000f185 + 80000de8: 00000000 .word 0x00000000 + 80000dec: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xc753d0757f64f92a + 80000df0: 000a3e03 ld x28,0(x20) + 80000df4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x2580a8b43c4ac4f2 + 80000df8: 000a3803 ld x16,0(x20) + 80000dfc: 008a0a13 addi x20,x20,8 + +0000000080000e00 : +Zbkc_clmul_cg_cp_rd_b2: + clmul x2, x28, x16 # perform operation + 80000e00: 0b0e1133 clmul x2,x28,x16 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkc_clmul_cg_cp_rd_b2, Zbkc_clmul_cg_cp_rd_b2_str) + 80000e04: 00063203 ld x4,0(x12) + 80000e08: 00220c63 beq x4,x2,80000e20 + 80000e0c: 6f5062ef jal x5,80007d00 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 8000f1b7 .word 0x8000f1b7 + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x8d62ed38acc7e279 + 80000e24: 000a3c03 ld x24,0(x20) + 80000e28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xbb5c9cc9e805bfc4 + 80000e2c: 000a3f83 ld x31,0(x20) + 80000e30: 008a0a13 addi x20,x20,8 + +0000000080000e34 : +Zbkc_clmul_cg_cp_rd_b3: + clmul x3, x24, x31 # perform operation + 80000e34: 0bfc11b3 clmul x3,x24,x31 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkc_clmul_cg_cp_rd_b3, Zbkc_clmul_cg_cp_rd_b3_str) + 80000e38: 00063203 ld x4,0(x12) + 80000e3c: 00320c63 beq x4,x3,80000e54 + 80000e40: 6c1062ef jal x5,80007d00 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 8000f1e9 .word 0x8000f1e9 + 80000e50: 00000000 .word 0x00000000 + 80000e54: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000e58: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000e5c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xba6cc0b76810bbee + 80000e60: 000a3783 ld x15,0(x20) + 80000e64: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0xe6154f09601506bb + 80000e68: 000a3d83 ld x27,0(x20) + 80000e6c: 008a0a13 addi x20,x20,8 + +0000000080000e70 : +Zbkc_clmul_cg_cp_rd_b4: + clmul x4, x15, x27 # perform operation + 80000e70: 0bb79233 clmul x4,x15,x27 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zbkc_clmul_cg_cp_rd_b4, Zbkc_clmul_cg_cp_rd_b4_str) + 80000e74: 00063383 ld x7,0(x12) + 80000e78: 00438c63 beq x7,x4,80000e90 + 80000e7c: 69d0646f jal x8,80007d18 + 80000e80: 80000e70 .word 0x80000e70 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 8000f21b .word 0x8000f21b + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x0bea6b9bd5daf04d + 80000e94: 000a3583 ld x11,0(x20) + 80000e98: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x851c1790c9ce9d67 + 80000e9c: 000a3203 ld x4,0(x20) + 80000ea0: 008a0a13 addi x20,x20,8 + +0000000080000ea4 : +Zbkc_clmul_cg_cp_rd_b5: + clmul x5, x11, x4 # perform operation + 80000ea4: 0a4592b3 clmul x5,x11,x4 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zbkc_clmul_cg_cp_rd_b5, Zbkc_clmul_cg_cp_rd_b5_str) + 80000ea8: 00063383 ld x7,0(x12) + 80000eac: 00538c63 beq x7,x5,80000ec4 + 80000eb0: 6690646f jal x8,80007d18 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 8000f24d .word 0x8000f24d + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x6fb3936b374ca1fa + 80000ec8: 000a3003 ld x0,0(x20) + 80000ecc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xeba8feb551326bed + 80000ed0: 000a3183 ld x3,0(x20) + 80000ed4: 008a0a13 addi x20,x20,8 + +0000000080000ed8 : +Zbkc_clmul_cg_cp_rd_b6: + clmul x6, x0, x3 # perform operation + 80000ed8: 0a301333 clmul x6,x0,x3 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zbkc_clmul_cg_cp_rd_b6, Zbkc_clmul_cg_cp_rd_b6_str) + 80000edc: 00063383 ld x7,0(x12) + 80000ee0: 00638c63 beq x7,x6,80000ef8 + 80000ee4: 6350646f jal x8,80007d18 + 80000ee8: 80000ed8 .word 0x80000ed8 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 8000f27f .word 0x8000f27f + 80000ef4: 00000000 .word 0x00000000 + 80000ef8: 00860613 addi x12,x12,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000efc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f00: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x0191545909b829a4 + 80000f04: 000a3683 ld x13,0(x20) + 80000f08: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x06f7fff8edccf02f + 80000f0c: 000a3183 ld x3,0(x20) + 80000f10: 008a0a13 addi x20,x20,8 + +0000000080000f14 : +Zbkc_clmul_cg_cp_rd_b7: + clmul x7, x13, x3 # perform operation + 80000f14: 0a3693b3 clmul x7,x13,x3 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zbkc_clmul_cg_cp_rd_b7, Zbkc_clmul_cg_cp_rd_b7_str) + 80000f18: 00063203 ld x4,0(x12) + 80000f1c: 00720c63 beq x4,x7,80000f34 + 80000f20: 5e1062ef jal x5,80007d00 + 80000f24: 80000f14 .word 0x80000f14 + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 8000f2b1 .word 0x8000f2b1 + 80000f30: 00000000 .word 0x00000000 + 80000f34: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xc94094d6e96a03ba + 80000f38: 000a3c83 ld x25,0(x20) + 80000f3c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x26ab129ae22ec0b6 + 80000f40: 000a3f83 ld x31,0(x20) + 80000f44: 008a0a13 addi x20,x20,8 + +0000000080000f48 : +Zbkc_clmul_cg_cp_rd_b8: + clmul x8, x25, x31 # perform operation + 80000f48: 0bfc9433 clmul x8,x25,x31 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zbkc_clmul_cg_cp_rd_b8, Zbkc_clmul_cg_cp_rd_b8_str) + 80000f4c: 00063203 ld x4,0(x12) + 80000f50: 00820c63 beq x4,x8,80000f68 + 80000f54: 5ad062ef jal x5,80007d00 + 80000f58: 80000f48 .word 0x80000f48 + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 8000f2e3 .word 0x8000f2e3 + 80000f64: 00000000 .word 0x00000000 + 80000f68: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xca76728ba092f472 + 80000f6c: 000a3e03 ld x28,0(x20) + 80000f70: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xe35e03113937c862 + 80000f74: 000a3883 ld x17,0(x20) + 80000f78: 008a0a13 addi x20,x20,8 + +0000000080000f7c : +Zbkc_clmul_cg_cp_rd_b9: + clmul x9, x28, x17 # perform operation + 80000f7c: 0b1e14b3 clmul x9,x28,x17 + # Check if x9 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x9, Zbkc_clmul_cg_cp_rd_b9, Zbkc_clmul_cg_cp_rd_b9_str) + 80000f80: 00063203 ld x4,0(x12) + 80000f84: 00920c63 beq x4,x9,80000f9c + 80000f88: 579062ef jal x5,80007d00 + 80000f8c: 80000f7c .word 0x80000f7c + 80000f90: 00000000 .word 0x00000000 + 80000f94: 8000f315 .word 0x8000f315 + 80000f98: 00000000 .word 0x00000000 + 80000f9c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x9fd4f141993b11ae + 80000fa0: 000a3d03 ld x26,0(x20) + 80000fa4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x681195da363b6ca7 + 80000fa8: 000a3c03 ld x24,0(x20) + 80000fac: 008a0a13 addi x20,x20,8 + +0000000080000fb0 : +Zbkc_clmul_cg_cp_rd_b10: + clmul x10, x26, x24 # perform operation + 80000fb0: 0b8d1533 clmul x10,x26,x24 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zbkc_clmul_cg_cp_rd_b10, Zbkc_clmul_cg_cp_rd_b10_str) + 80000fb4: 00063203 ld x4,0(x12) + 80000fb8: 00a20c63 beq x4,x10,80000fd0 + 80000fbc: 545062ef jal x5,80007d00 + 80000fc0: 80000fb0 .word 0x80000fb0 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 8000f347 .word 0x8000f347 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x50f9ed4237c72a10 + 80000fd4: 000a3d03 ld x26,0(x20) + 80000fd8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x3ed9a0069bc33a61 + 80000fdc: 000a3503 ld x10,0(x20) + 80000fe0: 008a0a13 addi x20,x20,8 + +0000000080000fe4 : +Zbkc_clmul_cg_cp_rd_b11: + clmul x11, x26, x10 # perform operation + 80000fe4: 0aad15b3 clmul x11,x26,x10 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zbkc_clmul_cg_cp_rd_b11, Zbkc_clmul_cg_cp_rd_b11_str) + 80000fe8: 00063203 ld x4,0(x12) + 80000fec: 00b20c63 beq x4,x11,80001004 + 80000ff0: 511062ef jal x5,80007d00 + 80000ff4: 80000fe4 .word 0x80000fe4 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 8000f37a .word 0x8000f37a + 80001000: 00000000 .word 0x00000000 + 80001004: 00860613 addi x12,x12,8 + + mv x29, x12 # switch signature pointer register to avoid conflict with test + 80001008: 00060e93 addi x29,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x80e9b736cd1807f5 + 8000100c: 000a3303 ld x6,0(x20) + 80001010: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xee1e7a0b8c5b69da + 80001014: 000a3803 ld x16,0(x20) + 80001018: 008a0a13 addi x20,x20,8 + +000000008000101c : +Zbkc_clmul_cg_cp_rd_b12: + clmul x12, x6, x16 # perform operation + 8000101c: 0b031633 clmul x12,x6,x16 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zbkc_clmul_cg_cp_rd_b12, Zbkc_clmul_cg_cp_rd_b12_str) + 80001020: 000eb203 ld x4,0(x29) + 80001024: 00c20c63 beq x4,x12,8000103c + 80001028: 4d9062ef jal x5,80007d00 + 8000102c: 8000101c .word 0x8000101c + 80001030: 00000000 .word 0x00000000 + 80001034: 8000f3ad .word 0x8000f3ad + 80001038: 00000000 .word 0x00000000 + 8000103c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0xa3880c0863bf8ae3 + 80001040: 000a3003 ld x0,0(x20) + 80001044: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x5c55c1315190ccad + 80001048: 000a3083 ld x1,0(x20) + 8000104c: 008a0a13 addi x20,x20,8 + +0000000080001050 : +Zbkc_clmul_cg_cp_rd_b13: + clmul x13, x0, x1 # perform operation + 80001050: 0a1016b3 clmul x13,x0,x1 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zbkc_clmul_cg_cp_rd_b13, Zbkc_clmul_cg_cp_rd_b13_str) + 80001054: 000eb203 ld x4,0(x29) + 80001058: 00d20c63 beq x4,x13,80001070 + 8000105c: 4a5062ef jal x5,80007d00 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f3e0 .word 0x8000f3e0 + 8000106c: 00000000 .word 0x00000000 + 80001070: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x20ea2e08eb17b358 + 80001074: 000a3383 ld x7,0(x20) + 80001078: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x1e9807bd191efe45 + 8000107c: 000a3c03 ld x24,0(x20) + 80001080: 008a0a13 addi x20,x20,8 + +0000000080001084 : +Zbkc_clmul_cg_cp_rd_b14: + clmul x14, x7, x24 # perform operation + 80001084: 0b839733 clmul x14,x7,x24 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zbkc_clmul_cg_cp_rd_b14, Zbkc_clmul_cg_cp_rd_b14_str) + 80001088: 000eb203 ld x4,0(x29) + 8000108c: 00e20c63 beq x4,x14,800010a4 + 80001090: 471062ef jal x5,80007d00 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f413 .word 0x8000f413 + 800010a0: 00000000 .word 0x00000000 + 800010a4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xf83a44e2872eaae8 + 800010a8: 000a3c83 ld x25,0(x20) + 800010ac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0xe917d7a7e1d3a222 + 800010b0: 000a3a83 ld x21,0(x20) + 800010b4: 008a0a13 addi x20,x20,8 + +00000000800010b8 : +Zbkc_clmul_cg_cp_rd_b15: + clmul x15, x25, x21 # perform operation + 800010b8: 0b5c97b3 clmul x15,x25,x21 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zbkc_clmul_cg_cp_rd_b15, Zbkc_clmul_cg_cp_rd_b15_str) + 800010bc: 000eb203 ld x4,0(x29) + 800010c0: 00f20c63 beq x4,x15,800010d8 + 800010c4: 43d062ef jal x5,80007d00 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 8000f446 .word 0x8000f446 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xed35435df97e8b00 + 800010dc: 000a3603 ld x12,0(x20) + 800010e0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x981342fa6ded9ecb + 800010e4: 000a3183 ld x3,0(x20) + 800010e8: 008a0a13 addi x20,x20,8 + +00000000800010ec : +Zbkc_clmul_cg_cp_rd_b16: + clmul x16, x12, x3 # perform operation + 800010ec: 0a361833 clmul x16,x12,x3 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zbkc_clmul_cg_cp_rd_b16, Zbkc_clmul_cg_cp_rd_b16_str) + 800010f0: 000eb203 ld x4,0(x29) + 800010f4: 01020c63 beq x4,x16,8000110c + 800010f8: 409062ef jal x5,80007d00 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f479 .word 0x8000f479 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xc6804917443e185f + 80001110: 000a3103 ld x2,0(x20) + 80001114: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xd8b3319fa2cf0335 + 80001118: 000a3703 ld x14,0(x20) + 8000111c: 008a0a13 addi x20,x20,8 + +0000000080001120 : +Zbkc_clmul_cg_cp_rd_b17: + clmul x17, x2, x14 # perform operation + 80001120: 0ae118b3 clmul x17,x2,x14 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zbkc_clmul_cg_cp_rd_b17, Zbkc_clmul_cg_cp_rd_b17_str) + 80001124: 000eb203 ld x4,0(x29) + 80001128: 01120c63 beq x4,x17,80001140 + 8000112c: 3d5062ef jal x5,80007d00 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f4ac .word 0x8000f4ac + 8000113c: 00000000 .word 0x00000000 + 80001140: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x02101bf0422a51db + 80001144: 000a3603 ld x12,0(x20) + 80001148: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xab2d0fcf1b5fa2da + 8000114c: 000a3183 ld x3,0(x20) + 80001150: 008a0a13 addi x20,x20,8 + +0000000080001154 : +Zbkc_clmul_cg_cp_rd_b18: + clmul x18, x12, x3 # perform operation + 80001154: 0a361933 clmul x18,x12,x3 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zbkc_clmul_cg_cp_rd_b18, Zbkc_clmul_cg_cp_rd_b18_str) + 80001158: 000eb203 ld x4,0(x29) + 8000115c: 01220c63 beq x4,x18,80001174 + 80001160: 3a1062ef jal x5,80007d00 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 8000f4df .word 0x8000f4df + 80001170: 00000000 .word 0x00000000 + 80001174: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x5a61d7814a1b8e18 + 80001178: 000a3b03 ld x22,0(x20) + 8000117c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x5427fdb82f1f747b + 80001180: 000a3483 ld x9,0(x20) + 80001184: 008a0a13 addi x20,x20,8 + +0000000080001188 : +Zbkc_clmul_cg_cp_rd_b19: + clmul x19, x22, x9 # perform operation + 80001188: 0a9b19b3 clmul x19,x22,x9 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zbkc_clmul_cg_cp_rd_b19, Zbkc_clmul_cg_cp_rd_b19_str) + 8000118c: 000eb203 ld x4,0(x29) + 80001190: 01320c63 beq x4,x19,800011a8 + 80001194: 36d062ef jal x5,80007d00 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8000f512 .word 0x8000f512 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008e8e93 addi x29,x29,8 + + mv x23, x20 # switch data pointer register to avoid conflict with test + 800011ac: 000a0b93 addi x23,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x6ec72a8190de98de + 800011b0: 000bb683 ld x13,0(x23) + 800011b4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xeb6780018d0de148 + 800011b8: 000bb103 ld x2,0(x23) + 800011bc: 008b8b93 addi x23,x23,8 + +00000000800011c0 : +Zbkc_clmul_cg_cp_rd_b20: + clmul x20, x13, x2 # perform operation + 800011c0: 0a269a33 clmul x20,x13,x2 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zbkc_clmul_cg_cp_rd_b20, Zbkc_clmul_cg_cp_rd_b20_str) + 800011c4: 000eb203 ld x4,0(x29) + 800011c8: 01420c63 beq x4,x20,800011e0 + 800011cc: 335062ef jal x5,80007d00 + 800011d0: 800011c0 .word 0x800011c0 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 8000f545 .word 0x8000f545 + 800011dc: 00000000 .word 0x00000000 + 800011e0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xafd9fc04ff3bb9de + 800011e4: 000bb883 ld x17,0(x23) + 800011e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x65d71c5573728f8a + 800011ec: 000bbc83 ld x25,0(x23) + 800011f0: 008b8b93 addi x23,x23,8 + +00000000800011f4 : +Zbkc_clmul_cg_cp_rd_b21: + clmul x21, x17, x25 # perform operation + 800011f4: 0b989ab3 clmul x21,x17,x25 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zbkc_clmul_cg_cp_rd_b21, Zbkc_clmul_cg_cp_rd_b21_str) + 800011f8: 000eb203 ld x4,0(x29) + 800011fc: 01520c63 beq x4,x21,80001214 + 80001200: 301062ef jal x5,80007d00 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 8000f578 .word 0x8000f578 + 80001210: 00000000 .word 0x00000000 + 80001214: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x854ac698bdd80c17 + 80001218: 000bb583 ld x11,0(x23) + 8000121c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xcba8ebc7aca71fa0 + 80001220: 000bb983 ld x19,0(x23) + 80001224: 008b8b93 addi x23,x23,8 + +0000000080001228 : +Zbkc_clmul_cg_cp_rd_b22: + clmul x22, x11, x19 # perform operation + 80001228: 0b359b33 clmul x22,x11,x19 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zbkc_clmul_cg_cp_rd_b22, Zbkc_clmul_cg_cp_rd_b22_str) + 8000122c: 000eb203 ld x4,0(x29) + 80001230: 01620c63 beq x4,x22,80001248 + 80001234: 2cd062ef jal x5,80007d00 + 80001238: 80001228 .word 0x80001228 + 8000123c: 00000000 .word 0x00000000 + 80001240: 8000f5ab .word 0x8000f5ab + 80001244: 00000000 .word 0x00000000 + 80001248: 008e8e93 addi x29,x29,8 + + mv x24, x23 # switch data pointer register to avoid conflict with test + 8000124c: 000b8c13 addi x24,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xf2f75afc8b826320 + 80001250: 000c3603 ld x12,0(x24) + 80001254: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x576ca082412aae72 + 80001258: 000c3383 ld x7,0(x24) + 8000125c: 008c0c13 addi x24,x24,8 + +0000000080001260 : +Zbkc_clmul_cg_cp_rd_b23: + clmul x23, x12, x7 # perform operation + 80001260: 0a761bb3 clmul x23,x12,x7 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zbkc_clmul_cg_cp_rd_b23, Zbkc_clmul_cg_cp_rd_b23_str) + 80001264: 000eb203 ld x4,0(x29) + 80001268: 01720c63 beq x4,x23,80001280 + 8000126c: 295062ef jal x5,80007d00 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 8000f5de .word 0x8000f5de + 8000127c: 00000000 .word 0x00000000 + 80001280: 008e8e93 addi x29,x29,8 + + mv x31, x24 # switch data pointer register to avoid conflict with test + 80001284: 000c0f93 addi x31,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0xafb916bdfe3e7ef0 + 80001288: 000fbe03 ld x28,0(x31) + 8000128c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x0) # load rs2: x0 = 0x47b53fa89a2155ab + 80001290: 000fb003 ld x0,0(x31) + 80001294: 008f8f93 addi x31,x31,8 + +0000000080001298 : +Zbkc_clmul_cg_cp_rd_b24: + clmul x24, x28, x0 # perform operation + 80001298: 0a0e1c33 clmul x24,x28,x0 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zbkc_clmul_cg_cp_rd_b24, Zbkc_clmul_cg_cp_rd_b24_str) + 8000129c: 000eb203 ld x4,0(x29) + 800012a0: 01820c63 beq x4,x24,800012b8 + 800012a4: 25d062ef jal x5,80007d00 + 800012a8: 80001298 .word 0x80001298 + 800012ac: 00000000 .word 0x00000000 + 800012b0: 8000f611 .word 0x8000f611 + 800012b4: 00000000 .word 0x00000000 + 800012b8: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xb00f6703a542b77b + 800012bc: 000fb683 ld x13,0(x31) + 800012c0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0x929e4b1d8e13ceb4 + 800012c4: 000fbf03 ld x30,0(x31) + 800012c8: 008f8f93 addi x31,x31,8 + +00000000800012cc : +Zbkc_clmul_cg_cp_rd_b25: + clmul x25, x13, x30 # perform operation + 800012cc: 0be69cb3 clmul x25,x13,x30 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zbkc_clmul_cg_cp_rd_b25, Zbkc_clmul_cg_cp_rd_b25_str) + 800012d0: 000eb203 ld x4,0(x29) + 800012d4: 01920c63 beq x4,x25,800012ec + 800012d8: 229062ef jal x5,80007d00 + 800012dc: 800012cc .word 0x800012cc + 800012e0: 00000000 .word 0x00000000 + 800012e4: 8000f644 .word 0x8000f644 + 800012e8: 00000000 .word 0x00000000 + 800012ec: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x496625f8884d0781 + 800012f0: 000fb583 ld x11,0(x31) + 800012f4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0x2655ebccc1c66999 + 800012f8: 000fb403 ld x8,0(x31) + 800012fc: 008f8f93 addi x31,x31,8 + +0000000080001300 : +Zbkc_clmul_cg_cp_rd_b26: + clmul x26, x11, x8 # perform operation + 80001300: 0a859d33 clmul x26,x11,x8 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkc_clmul_cg_cp_rd_b26, Zbkc_clmul_cg_cp_rd_b26_str) + 80001304: 000eb203 ld x4,0(x29) + 80001308: 01a20c63 beq x4,x26,80001320 + 8000130c: 1f5062ef jal x5,80007d00 + 80001310: 80001300 .word 0x80001300 + 80001314: 00000000 .word 0x00000000 + 80001318: 8000f677 .word 0x8000f677 + 8000131c: 00000000 .word 0x00000000 + 80001320: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0x5fcdc13e495e3682 + 80001324: 000fb303 ld x6,0(x31) + 80001328: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x6b3e4000de6b7974 + 8000132c: 000fbc03 ld x24,0(x31) + 80001330: 008f8f93 addi x31,x31,8 + +0000000080001334 : +Zbkc_clmul_cg_cp_rd_b27: + clmul x27, x6, x24 # perform operation + 80001334: 0b831db3 clmul x27,x6,x24 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zbkc_clmul_cg_cp_rd_b27, Zbkc_clmul_cg_cp_rd_b27_str) + 80001338: 000eb203 ld x4,0(x29) + 8000133c: 01b20c63 beq x4,x27,80001354 + 80001340: 1c1062ef jal x5,80007d00 + 80001344: 80001334 .word 0x80001334 + 80001348: 00000000 .word 0x00000000 + 8000134c: 8000f6aa .word 0x8000f6aa + 80001350: 00000000 .word 0x00000000 + 80001354: 008e8e93 addi x29,x29,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x068127038062eddc + 80001358: 000fbd83 ld x27,0(x31) + 8000135c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0xc59338ce02de214c + 80001360: 000fb803 ld x16,0(x31) + 80001364: 008f8f93 addi x31,x31,8 + +0000000080001368 : +Zbkc_clmul_cg_cp_rd_b28: + clmul x28, x27, x16 # perform operation + 80001368: 0b0d9e33 clmul x28,x27,x16 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkc_clmul_cg_cp_rd_b28, Zbkc_clmul_cg_cp_rd_b28_str) + 8000136c: 000eb203 ld x4,0(x29) + 80001370: 01c20c63 beq x4,x28,80001388 + 80001374: 18d062ef jal x5,80007d00 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 8000f6dd .word 0x8000f6dd + 80001384: 00000000 .word 0x00000000 + 80001388: 008e8e93 addi x29,x29,8 + + mv x11, x29 # switch signature pointer register to avoid conflict with test + 8000138c: 000e8593 addi x11,x29,0 +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xf8f70c83f50acc97 + 80001390: 000fb783 ld x15,0(x31) + 80001394: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x117eaed0982d7014 + 80001398: 000fbb03 ld x22,0(x31) + 8000139c: 008f8f93 addi x31,x31,8 + +00000000800013a0 : +Zbkc_clmul_cg_cp_rd_b29: + clmul x29, x15, x22 # perform operation + 800013a0: 0b679eb3 clmul x29,x15,x22 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cp_rd_b29, Zbkc_clmul_cg_cp_rd_b29_str) + 800013a4: 0005b203 ld x4,0(x11) + 800013a8: 01d20c63 beq x4,x29,800013c0 + 800013ac: 155062ef jal x5,80007d00 + 800013b0: 800013a0 .word 0x800013a0 + 800013b4: 00000000 .word 0x00000000 + 800013b8: 8000f710 .word 0x8000f710 + 800013bc: 00000000 .word 0x00000000 + 800013c0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x06797f4772a34340 + 800013c4: 000fb983 ld x19,0(x31) + 800013c8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xc9759e5e3c6b34b1 + 800013cc: 000fba83 ld x21,0(x31) + 800013d0: 008f8f93 addi x31,x31,8 + +00000000800013d4 : +Zbkc_clmul_cg_cp_rd_b30: + clmul x30, x19, x21 # perform operation + 800013d4: 0b599f33 clmul x30,x19,x21 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cp_rd_b30, Zbkc_clmul_cg_cp_rd_b30_str) + 800013d8: 0005b203 ld x4,0(x11) + 800013dc: 01e20c63 beq x4,x30,800013f4 + 800013e0: 121062ef jal x5,80007d00 + 800013e4: 800013d4 .word 0x800013d4 + 800013e8: 00000000 .word 0x00000000 + 800013ec: 8000f743 .word 0x8000f743 + 800013f0: 00000000 .word 0x00000000 + 800013f4: 00858593 addi x11,x11,8 + + mv x10, x31 # switch data pointer register to avoid conflict with test + 800013f8: 000f8513 addi x10,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xedef251c1c8bdbb9 + 800013fc: 00053183 ld x3,0(x10) + 80001400: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xd8dee9790b3ac400 + 80001404: 00053803 ld x16,0(x10) + 80001408: 00850513 addi x10,x10,8 + +000000008000140c : +Zbkc_clmul_cg_cp_rd_b31: + clmul x31, x3, x16 # perform operation + 8000140c: 0b019fb3 clmul x31,x3,x16 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cp_rd_b31, Zbkc_clmul_cg_cp_rd_b31_str) + 80001410: 0005b203 ld x4,0(x11) + 80001414: 01f20c63 beq x4,x31,8000142c + 80001418: 0e9062ef jal x5,80007d00 + 8000141c: 8000140c .word 0x8000140c + 80001420: 00000000 .word 0x00000000 + 80001424: 8000f776 .word 0x8000f776 + 80001428: 00000000 .word 0x00000000 + 8000142c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000000 + 80001430: 00053f83 ld x31,0(x10) + 80001434: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xa111d5ec848552a8 + 80001438: 00053803 ld x16,0(x10) + 8000143c: 00850513 addi x10,x10,8 + +0000000080001440 : +Zbkc_clmul_cg_cp_rs1_edges_0x0: + clmul x17, x31, x16 # perform operation + 80001440: 0b0f98b3 clmul x17,x31,x16 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cp_rs1_edges_0x0, Zbkc_clmul_cg_cp_rs1_edges_0x0_str) + 80001444: 0005b203 ld x4,0(x11) + 80001448: 01120c63 beq x4,x17,80001460 + 8000144c: 0b5062ef jal x5,80007d00 + 80001450: 80001440 .word 0x80001440 + 80001454: 00000000 .word 0x00000000 + 80001458: 8000f7a9 .word 0x8000f7a9 + 8000145c: 00000000 .word 0x00000000 + 80001460: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001464: 00053a83 ld x21,0(x10) + 80001468: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x044316babefded26 + 8000146c: 00053903 ld x18,0(x10) + 80001470: 00850513 addi x10,x10,8 + +0000000080001474 : +Zbkc_clmul_cg_cp_rs1_edges_0x1: + clmul x24, x21, x18 # perform operation + 80001474: 0b2a9c33 clmul x24,x21,x18 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cp_rs1_edges_0x1, Zbkc_clmul_cg_cp_rs1_edges_0x1_str) + 80001478: 0005b203 ld x4,0(x11) + 8000147c: 01820c63 beq x4,x24,80001494 + 80001480: 081062ef jal x5,80007d00 + 80001484: 80001474 .word 0x80001474 + 80001488: 00000000 .word 0x00000000 + 8000148c: 8000f7e3 .word 0x8000f7e3 + 80001490: 00000000 .word 0x00000000 + 80001494: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000000000002 + 80001498: 00053383 ld x7,0(x10) + 8000149c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x54eb02d5ee4ee03b + 800014a0: 00053483 ld x9,0(x10) + 800014a4: 00850513 addi x10,x10,8 + +00000000800014a8 : +Zbkc_clmul_cg_cp_rs1_edges_0x2: + clmul x15, x7, x9 # perform operation + 800014a8: 0a9397b3 clmul x15,x7,x9 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cp_rs1_edges_0x2, Zbkc_clmul_cg_cp_rs1_edges_0x2_str) + 800014ac: 0005b203 ld x4,0(x11) + 800014b0: 00f20c63 beq x4,x15,800014c8 + 800014b4: 04d062ef jal x5,80007d00 + 800014b8: 800014a8 .word 0x800014a8 + 800014bc: 00000000 .word 0x00000000 + 800014c0: 8000f81d .word 0x8000f81d + 800014c4: 00000000 .word 0x00000000 + 800014c8: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000000 + 800014cc: 00053d83 ld x27,0(x10) + 800014d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x9d05302ca8b2f46c + 800014d4: 00053083 ld x1,0(x10) + 800014d8: 00850513 addi x10,x10,8 + +00000000800014dc : +Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000000: + clmul x25, x27, x1 # perform operation + 800014dc: 0a1d9cb3 clmul x25,x27,x1 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000000, Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000000_str) + 800014e0: 0005b203 ld x4,0(x11) + 800014e4: 01920c63 beq x4,x25,800014fc + 800014e8: 019062ef jal x5,80007d00 + 800014ec: 800014dc .word 0x800014dc + 800014f0: 00000000 .word 0x00000000 + 800014f4: 8000f857 .word 0x8000f857 + 800014f8: 00000000 .word 0x00000000 + 800014fc: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000001 + 80001500: 00053703 ld x14,0(x10) + 80001504: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x1e1f2d03312ade54 + 80001508: 00053783 ld x15,0(x10) + 8000150c: 00850513 addi x10,x10,8 + +0000000080001510 : +Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000001: + clmul x16, x14, x15 # perform operation + 80001510: 0af71833 clmul x16,x14,x15 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000001, Zbkc_clmul_cg_cp_rs1_edges_0x8000000000000001_str) + 80001514: 0005b203 ld x4,0(x11) + 80001518: 01020c63 beq x4,x16,80001530 + 8000151c: 7e4062ef jal x5,80007d00 + 80001520: 80001510 .word 0x80001510 + 80001524: 00000000 .word 0x00000000 + 80001528: 8000f8a1 .word 0x8000f8a1 + 8000152c: 00000000 .word 0x00000000 + 80001530: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x7fffffffffffffff + 80001534: 00053383 ld x7,0(x10) + 80001538: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x6225bd6380843bed + 8000153c: 00053d03 ld x26,0(x10) + 80001540: 00850513 addi x10,x10,8 + +0000000080001544 : +Zbkc_clmul_cg_cp_rs1_edges_0x7fffffffffffffff: + clmul x29, x7, x26 # perform operation + 80001544: 0ba39eb3 clmul x29,x7,x26 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkc_clmul_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001548: 0005b203 ld x4,0(x11) + 8000154c: 01d20c63 beq x4,x29,80001564 + 80001550: 7b0062ef jal x5,80007d00 + 80001554: 80001544 .word 0x80001544 + 80001558: 00000000 .word 0x00000000 + 8000155c: 8000f8eb .word 0x8000f8eb + 80001560: 00000000 .word 0x00000000 + 80001564: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80001568: 00053a83 ld x21,0(x10) + 8000156c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x86659fac5ed8b1d2 + 80001570: 00053e03 ld x28,0(x10) + 80001574: 00850513 addi x10,x10,8 + +0000000080001578 : +Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffffffffffe: + clmul x30, x21, x28 # perform operation + 80001578: 0bca9f33 clmul x30,x21,x28 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkc_clmul_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 8000157c: 0005b203 ld x4,0(x11) + 80001580: 01e20c63 beq x4,x30,80001598 + 80001584: 77c062ef jal x5,80007d00 + 80001588: 80001578 .word 0x80001578 + 8000158c: 00000000 .word 0x00000000 + 80001590: 8000f935 .word 0x8000f935 + 80001594: 00000000 .word 0x00000000 + 80001598: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xffffffffffffffff + 8000159c: 00053403 ld x8,0(x10) + 800015a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7490db5987c71fbc + 800015a4: 00053703 ld x14,0(x10) + 800015a8: 00850513 addi x10,x10,8 + +00000000800015ac : +Zbkc_clmul_cg_cp_rs1_edges_0xffffffffffffffff: + clmul x26, x8, x14 # perform operation + 800015ac: 0ae41d33 clmul x26,x8,x14 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cp_rs1_edges_0xffffffffffffffff, Zbkc_clmul_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015b0: 0005b203 ld x4,0(x11) + 800015b4: 01a20c63 beq x4,x26,800015cc + 800015b8: 748062ef jal x5,80007d00 + 800015bc: 800015ac .word 0x800015ac + 800015c0: 00000000 .word 0x00000000 + 800015c4: 8000f97f .word 0x8000f97f + 800015c8: 00000000 .word 0x00000000 + 800015cc: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xfffffffffffffffe + 800015d0: 00053603 ld x12,0(x10) + 800015d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xf130ed7bb31530bb + 800015d8: 00053983 ld x19,0(x10) + 800015dc: 00850513 addi x10,x10,8 + +00000000800015e0 : +Zbkc_clmul_cg_cp_rs1_edges_0xfffffffffffffffe: + clmul x25, x12, x19 # perform operation + 800015e0: 0b361cb3 clmul x25,x12,x19 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015e4: 0005b203 ld x4,0(x11) + 800015e8: 01920c63 beq x4,x25,80001600 + 800015ec: 714062ef jal x5,80007d00 + 800015f0: 800015e0 .word 0x800015e0 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 8000f9c9 .word 0x8000f9c9 + 800015fc: 00000000 .word 0x00000000 + 80001600: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 80001604: 00053403 ld x8,0(x10) + 80001608: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xa577a2e965644686 + 8000160c: 00053303 ld x6,0(x10) + 80001610: 00850513 addi x10,x10,8 + +0000000080001614 : +Zbkc_clmul_cg_cp_rs1_edges_0x5bbc887763ae86f2: + clmul x7, x8, x6 # perform operation + 80001614: 0a6413b3 clmul x7,x8,x6 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmul_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkc_clmul_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001618: 0005b203 ld x4,0(x11) + 8000161c: 00720c63 beq x4,x7,80001634 + 80001620: 6e0062ef jal x5,80007d00 + 80001624: 80001614 .word 0x80001614 + 80001628: 00000000 .word 0x00000000 + 8000162c: 8000fa13 .word 0x8000fa13 + 80001630: 00000000 .word 0x00000000 + 80001634: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80001638: 00053403 ld x8,0(x10) + 8000163c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xad744982727d72a3 + 80001640: 00053b03 ld x22,0(x10) + 80001644: 00850513 addi x10,x10,8 + +0000000080001648 : +Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + clmul x24, x8, x22 # perform operation + 80001648: 0b641c33 clmul x24,x8,x22 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 8000164c: 0005b203 ld x4,0(x11) + 80001650: 01820c63 beq x4,x24,80001668 + 80001654: 6ac062ef jal x5,80007d00 + 80001658: 80001648 .word 0x80001648 + 8000165c: 00000000 .word 0x00000000 + 80001660: 8000fa5d .word 0x8000fa5d + 80001664: 00000000 .word 0x00000000 + 80001668: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5555555555555555 + 8000166c: 00053f03 ld x30,0(x10) + 80001670: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xada27871b7e03e58 + 80001674: 00053a83 ld x21,0(x10) + 80001678: 00850513 addi x10,x10,8 + +000000008000167c : +Zbkc_clmul_cg_cp_rs1_edges_0x5555555555555555: + clmul x17, x30, x21 # perform operation + 8000167c: 0b5f18b3 clmul x17,x30,x21 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cp_rs1_edges_0x5555555555555555, Zbkc_clmul_cg_cp_rs1_edges_0x5555555555555555_str) + 80001680: 0005b203 ld x4,0(x11) + 80001684: 01120c63 beq x4,x17,8000169c + 80001688: 678062ef jal x5,80007d00 + 8000168c: 8000167c .word 0x8000167c + 80001690: 00000000 .word 0x00000000 + 80001694: 8000faa7 .word 0x8000faa7 + 80001698: 00000000 .word 0x00000000 + 8000169c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000ffffffff + 800016a0: 00053483 ld x9,0(x10) + 800016a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x354972ab0d5ea1f0 + 800016a8: 00053983 ld x19,0(x10) + 800016ac: 00850513 addi x10,x10,8 + +00000000800016b0 : +Zbkc_clmul_cg_cp_rs1_edges_0xffffffff: + clmul x16, x9, x19 # perform operation + 800016b0: 0b349833 clmul x16,x9,x19 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cp_rs1_edges_0xffffffff, Zbkc_clmul_cg_cp_rs1_edges_0xffffffff_str) + 800016b4: 0005b203 ld x4,0(x11) + 800016b8: 01020c63 beq x4,x16,800016d0 + 800016bc: 644062ef jal x5,80007d00 + 800016c0: 800016b0 .word 0x800016b0 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 8000faf1 .word 0x8000faf1 + 800016cc: 00000000 .word 0x00000000 + 800016d0: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000fffffffe + 800016d4: 00053a03 ld x20,0(x10) + 800016d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x54d6de4e7ab93029 + 800016dc: 00053383 ld x7,0(x10) + 800016e0: 00850513 addi x10,x10,8 + +00000000800016e4 : +Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe: + clmul x28, x20, x7 # perform operation + 800016e4: 0a7a1e33 clmul x28,x20,x7 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe, Zbkc_clmul_cg_cp_rs1_edges_0xfffffffe_str) + 800016e8: 0005b203 ld x4,0(x11) + 800016ec: 01c20c63 beq x4,x28,80001704 + 800016f0: 610062ef jal x5,80007d00 + 800016f4: 800016e4 .word 0x800016e4 + 800016f8: 00000000 .word 0x00000000 + 800016fc: 8000fb33 .word 0x8000fb33 + 80001700: 00000000 .word 0x00000000 + 80001704: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 80001708: 00053a03 ld x20,0(x10) + 8000170c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xd2adad46d2efb6a4 + 80001710: 00053c03 ld x24,0(x10) + 80001714: 00850513 addi x10,x10,8 + +0000000080001718 : +Zbkc_clmul_cg_cp_rs1_edges_0x100000000: + clmul x3, x20, x24 # perform operation + 80001718: 0b8a11b3 clmul x3,x20,x24 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cp_rs1_edges_0x100000000, Zbkc_clmul_cg_cp_rs1_edges_0x100000000_str) + 8000171c: 0005b203 ld x4,0(x11) + 80001720: 00320c63 beq x4,x3,80001738 + 80001724: 5dc062ef jal x5,80007d00 + 80001728: 80001718 .word 0x80001718 + 8000172c: 00000000 .word 0x00000000 + 80001730: 8000fb75 .word 0x8000fb75 + 80001734: 00000000 .word 0x00000000 + 80001738: 00858593 addi x11,x11,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000100000001 + 8000173c: 00053f03 ld x30,0(x10) + 80001740: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5b26a0a0a57af65f + 80001744: 00053403 ld x8,0(x10) + 80001748: 00850513 addi x10,x10,8 + +000000008000174c : +Zbkc_clmul_cg_cp_rs1_edges_0x100000001: + clmul x17, x30, x8 # perform operation + 8000174c: 0a8f18b3 clmul x17,x30,x8 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cp_rs1_edges_0x100000001, Zbkc_clmul_cg_cp_rs1_edges_0x100000001_str) + 80001750: 0005b203 ld x4,0(x11) + 80001754: 01120c63 beq x4,x17,8000176c + 80001758: 5a8062ef jal x5,80007d00 + 8000175c: 8000174c .word 0x8000174c + 80001760: 00000000 .word 0x00000000 + 80001764: 8000fbb8 .word 0x8000fbb8 + 80001768: 00000000 .word 0x00000000 + 8000176c: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x17c8f51534845eab + 80001770: 00053103 ld x2,0(x10) + 80001774: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000000000000 + 80001778: 00053403 ld x8,0(x10) + 8000177c: 00850513 addi x10,x10,8 + +0000000080001780 : +Zbkc_clmul_cg_cp_rs2_edges_0x0: + clmul x20, x2, x8 # perform operation + 80001780: 0a811a33 clmul x20,x2,x8 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cp_rs2_edges_0x0, Zbkc_clmul_cg_cp_rs2_edges_0x0_str) + 80001784: 0005b203 ld x4,0(x11) + 80001788: 01420c63 beq x4,x20,800017a0 + 8000178c: 574062ef jal x5,80007d00 + 80001790: 80001780 .word 0x80001780 + 80001794: 00000000 .word 0x00000000 + 80001798: 8000fbfb .word 0x8000fbfb + 8000179c: 00000000 .word 0x00000000 + 800017a0: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x846ddbe97be616e4 + 800017a4: 00053a83 ld x21,0(x10) + 800017a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000001 + 800017ac: 00053a03 ld x20,0(x10) + 800017b0: 00850513 addi x10,x10,8 + +00000000800017b4 : +Zbkc_clmul_cg_cp_rs2_edges_0x1: + clmul x3, x21, x20 # perform operation + 800017b4: 0b4a91b3 clmul x3,x21,x20 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cp_rs2_edges_0x1, Zbkc_clmul_cg_cp_rs2_edges_0x1_str) + 800017b8: 0005b203 ld x4,0(x11) + 800017bc: 00320c63 beq x4,x3,800017d4 + 800017c0: 540062ef jal x5,80007d00 + 800017c4: 800017b4 .word 0x800017b4 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 8000fc36 .word 0x8000fc36 + 800017d0: 00000000 .word 0x00000000 + 800017d4: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x99a5d2d5714ca089 + 800017d8: 00053103 ld x2,0(x10) + 800017dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 800017e0: 00053903 ld x18,0(x10) + 800017e4: 00850513 addi x10,x10,8 + +00000000800017e8 : +Zbkc_clmul_cg_cp_rs2_edges_0x2: + clmul x24, x2, x18 # perform operation + 800017e8: 0b211c33 clmul x24,x2,x18 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cp_rs2_edges_0x2, Zbkc_clmul_cg_cp_rs2_edges_0x2_str) + 800017ec: 0005b203 ld x4,0(x11) + 800017f0: 01820c63 beq x4,x24,80001808 + 800017f4: 50c062ef jal x5,80007d00 + 800017f8: 800017e8 .word 0x800017e8 + 800017fc: 00000000 .word 0x00000000 + 80001800: 8000fc71 .word 0x8000fc71 + 80001804: 00000000 .word 0x00000000 + 80001808: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x272571e8704ff517 + 8000180c: 00053083 ld x1,0(x10) + 80001810: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000000 + 80001814: 00053803 ld x16,0(x10) + 80001818: 00850513 addi x10,x10,8 + +000000008000181c : +Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000000: + clmul x23, x1, x16 # perform operation + 8000181c: 0b009bb3 clmul x23,x1,x16 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000000, Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000000_str) + 80001820: 0005b203 ld x4,0(x11) + 80001824: 01720c63 beq x4,x23,8000183c + 80001828: 4d8062ef jal x5,80007d00 + 8000182c: 8000181c .word 0x8000181c + 80001830: 00000000 .word 0x00000000 + 80001834: 8000fcac .word 0x8000fcac + 80001838: 00000000 .word 0x00000000 + 8000183c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5fac52127cb5bf88 + 80001840: 00053c03 ld x24,0(x10) + 80001844: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8000000000000001 + 80001848: 00053e03 ld x28,0(x10) + 8000184c: 00850513 addi x10,x10,8 + +0000000080001850 : +Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000001: + clmul x27, x24, x28 # perform operation + 80001850: 0bcc1db3 clmul x27,x24,x28 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000001, Zbkc_clmul_cg_cp_rs2_edges_0x8000000000000001_str) + 80001854: 0005b203 ld x4,0(x11) + 80001858: 01b20c63 beq x4,x27,80001870 + 8000185c: 4a4062ef jal x5,80007d00 + 80001860: 80001850 .word 0x80001850 + 80001864: 00000000 .word 0x00000000 + 80001868: 8000fcf6 .word 0x8000fcf6 + 8000186c: 00000000 .word 0x00000000 + 80001870: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xfe526e33638077e9 + 80001874: 00053983 ld x19,0(x10) + 80001878: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7fffffffffffffff + 8000187c: 00053e83 ld x29,0(x10) + 80001880: 00850513 addi x10,x10,8 + +0000000080001884 : +Zbkc_clmul_cg_cp_rs2_edges_0x7fffffffffffffff: + clmul x31, x19, x29 # perform operation + 80001884: 0bd99fb3 clmul x31,x19,x29 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkc_clmul_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001888: 0005b203 ld x4,0(x11) + 8000188c: 01f20c63 beq x4,x31,800018a4 + 80001890: 470062ef jal x5,80007d00 + 80001894: 80001884 .word 0x80001884 + 80001898: 00000000 .word 0x00000000 + 8000189c: 8000fd40 .word 0x8000fd40 + 800018a0: 00000000 .word 0x00000000 + 800018a4: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xd7f9040e3ecb210e + 800018a8: 00053e83 ld x29,0(x10) + 800018ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffffffffffe + 800018b0: 00053e03 ld x28,0(x10) + 800018b4: 00850513 addi x10,x10,8 + +00000000800018b8 : +Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffffffffffe: + clmul x23, x29, x28 # perform operation + 800018b8: 0bce9bb3 clmul x23,x29,x28 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkc_clmul_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018bc: 0005b203 ld x4,0(x11) + 800018c0: 01720c63 beq x4,x23,800018d8 + 800018c4: 43c062ef jal x5,80007d00 + 800018c8: 800018b8 .word 0x800018b8 + 800018cc: 00000000 .word 0x00000000 + 800018d0: 8000fd8a .word 0x8000fd8a + 800018d4: 00000000 .word 0x00000000 + 800018d8: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xa152f7689ff224e1 + 800018dc: 00053883 ld x17,0(x10) + 800018e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xffffffffffffffff + 800018e4: 00053683 ld x13,0(x10) + 800018e8: 00850513 addi x10,x10,8 + +00000000800018ec : +Zbkc_clmul_cg_cp_rs2_edges_0xffffffffffffffff: + clmul x23, x17, x13 # perform operation + 800018ec: 0ad89bb3 clmul x23,x17,x13 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cp_rs2_edges_0xffffffffffffffff, Zbkc_clmul_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018f0: 0005b203 ld x4,0(x11) + 800018f4: 01720c63 beq x4,x23,8000190c + 800018f8: 408062ef jal x5,80007d00 + 800018fc: 800018ec .word 0x800018ec + 80001900: 00000000 .word 0x00000000 + 80001904: 8000fdd4 .word 0x8000fdd4 + 80001908: 00000000 .word 0x00000000 + 8000190c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x2984248c5a99e829 + 80001910: 00053603 ld x12,0(x10) + 80001914: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xfffffffffffffffe + 80001918: 00053903 ld x18,0(x10) + 8000191c: 00850513 addi x10,x10,8 + +0000000080001920 : +Zbkc_clmul_cg_cp_rs2_edges_0xfffffffffffffffe: + clmul x29, x12, x18 # perform operation + 80001920: 0b261eb3 clmul x29,x12,x18 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001924: 0005b203 ld x4,0(x11) + 80001928: 01d20c63 beq x4,x29,80001940 + 8000192c: 3d4062ef jal x5,80007d00 + 80001930: 80001920 .word 0x80001920 + 80001934: 00000000 .word 0x00000000 + 80001938: 8000fe1e .word 0x8000fe1e + 8000193c: 00000000 .word 0x00000000 + 80001940: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x17c52a0fabab4b6a + 80001944: 00053803 ld x16,0(x10) + 80001948: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 8000194c: 00053b03 ld x22,0(x10) + 80001950: 00850513 addi x10,x10,8 + +0000000080001954 : +Zbkc_clmul_cg_cp_rs2_edges_0x5bbc887763ae86f2: + clmul x6, x16, x22 # perform operation + 80001954: 0b681333 clmul x6,x16,x22 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkc_clmul_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001958: 0005b203 ld x4,0(x11) + 8000195c: 00620c63 beq x4,x6,80001974 + 80001960: 3a0062ef jal x5,80007d00 + 80001964: 80001954 .word 0x80001954 + 80001968: 00000000 .word 0x00000000 + 8000196c: 8000fe68 .word 0x8000fe68 + 80001970: 00000000 .word 0x00000000 + 80001974: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x41e0937c28b51b2b + 80001978: 00053c03 ld x24,0(x10) + 8000197c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 80001980: 00053383 ld x7,0(x10) + 80001984: 00850513 addi x10,x10,8 + +0000000080001988 : +Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + clmul x18, x24, x7 # perform operation + 80001988: 0a7c1933 clmul x18,x24,x7 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 8000198c: 0005b203 ld x4,0(x11) + 80001990: 01220c63 beq x4,x18,800019a8 + 80001994: 36c062ef jal x5,80007d00 + 80001998: 80001988 .word 0x80001988 + 8000199c: 00000000 .word 0x00000000 + 800019a0: 8000feb2 .word 0x8000feb2 + 800019a4: 00000000 .word 0x00000000 + 800019a8: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x20252a04887e713f + 800019ac: 00053783 ld x15,0(x10) + 800019b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5555555555555555 + 800019b4: 00053a83 ld x21,0(x10) + 800019b8: 00850513 addi x10,x10,8 + +00000000800019bc : +Zbkc_clmul_cg_cp_rs2_edges_0x5555555555555555: + clmul x2, x15, x21 # perform operation + 800019bc: 0b579133 clmul x2,x15,x21 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cp_rs2_edges_0x5555555555555555, Zbkc_clmul_cg_cp_rs2_edges_0x5555555555555555_str) + 800019c0: 0005b203 ld x4,0(x11) + 800019c4: 00220c63 beq x4,x2,800019dc + 800019c8: 338062ef jal x5,80007d00 + 800019cc: 800019bc .word 0x800019bc + 800019d0: 00000000 .word 0x00000000 + 800019d4: 8000fefc .word 0x8000fefc + 800019d8: 00000000 .word 0x00000000 + 800019dc: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xa99705fb3617e04b + 800019e0: 00053903 ld x18,0(x10) + 800019e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000000ffffffff + 800019e8: 00053683 ld x13,0(x10) + 800019ec: 00850513 addi x10,x10,8 + +00000000800019f0 : +Zbkc_clmul_cg_cp_rs2_edges_0xffffffff: + clmul x9, x18, x13 # perform operation + 800019f0: 0ad914b3 clmul x9,x18,x13 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cp_rs2_edges_0xffffffff, Zbkc_clmul_cg_cp_rs2_edges_0xffffffff_str) + 800019f4: 0005b203 ld x4,0(x11) + 800019f8: 00920c63 beq x4,x9,80001a10 + 800019fc: 304062ef jal x5,80007d00 + 80001a00: 800019f0 .word 0x800019f0 + 80001a04: 00000000 .word 0x00000000 + 80001a08: 8000ff46 .word 0x8000ff46 + 80001a0c: 00000000 .word 0x00000000 + 80001a10: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xc44149c71164f224 + 80001a14: 00053703 ld x14,0(x10) + 80001a18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000fffffffe + 80001a1c: 00053e03 ld x28,0(x10) + 80001a20: 00850513 addi x10,x10,8 + +0000000080001a24 : +Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe: + clmul x24, x14, x28 # perform operation + 80001a24: 0bc71c33 clmul x24,x14,x28 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe, Zbkc_clmul_cg_cp_rs2_edges_0xfffffffe_str) + 80001a28: 0005b203 ld x4,0(x11) + 80001a2c: 01820c63 beq x4,x24,80001a44 + 80001a30: 2d0062ef jal x5,80007d00 + 80001a34: 80001a24 .word 0x80001a24 + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 8000ff88 .word 0x8000ff88 + 80001a40: 00000000 .word 0x00000000 + 80001a44: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x8e7b18bef202f53e + 80001a48: 00053e03 ld x28,0(x10) + 80001a4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000100000000 + 80001a50: 00053903 ld x18,0(x10) + 80001a54: 00850513 addi x10,x10,8 + +0000000080001a58 : +Zbkc_clmul_cg_cp_rs2_edges_0x100000000: + clmul x17, x28, x18 # perform operation + 80001a58: 0b2e18b3 clmul x17,x28,x18 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cp_rs2_edges_0x100000000, Zbkc_clmul_cg_cp_rs2_edges_0x100000000_str) + 80001a5c: 0005b203 ld x4,0(x11) + 80001a60: 01120c63 beq x4,x17,80001a78 + 80001a64: 29c062ef jal x5,80007d00 + 80001a68: 80001a58 .word 0x80001a58 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 8000ffca .word 0x8000ffca + 80001a74: 00000000 .word 0x00000000 + 80001a78: 00858593 addi x11,x11,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xac63b0ae22e640fd + 80001a7c: 00053b03 ld x22,0(x10) + 80001a80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000100000001 + 80001a84: 00053d83 ld x27,0(x10) + 80001a88: 00850513 addi x10,x10,8 + +0000000080001a8c : +Zbkc_clmul_cg_cp_rs2_edges_0x100000001: + clmul x25, x22, x27 # perform operation + 80001a8c: 0bbb1cb3 clmul x25,x22,x27 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cp_rs2_edges_0x100000001, Zbkc_clmul_cg_cp_rs2_edges_0x100000001_str) + 80001a90: 0005b203 ld x4,0(x11) + 80001a94: 01920c63 beq x4,x25,80001aac + 80001a98: 268062ef jal x5,80007d00 + 80001a9c: 80001a8c .word 0x80001a8c + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 8001000d .word 0x8001000d + 80001aa8: 00000000 .word 0x00000000 + 80001aac: 00858593 addi x11,x11,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 80001ab0: 00053f03 ld x30,0(x10) + 80001ab4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000000 + 80001ab8: 00053703 ld x14,0(x10) + 80001abc: 00850513 addi x10,x10,8 + +0000000080001ac0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + clmul x19, x30, x14 # perform operation + 80001ac0: 0aef19b3 clmul x19,x30,x14 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ac4: 0005b203 ld x4,0(x11) + 80001ac8: 01320c63 beq x4,x19,80001ae0 + 80001acc: 234062ef jal x5,80007d00 + 80001ad0: 80001ac0 .word 0x80001ac0 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 80010050 .word 0x80010050 + 80001adc: 00000000 .word 0x00000000 + 80001ae0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000000 + 80001ae4: 00053a83 ld x21,0(x10) + 80001ae8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000001 + 80001aec: 00053103 ld x2,0(x10) + 80001af0: 00850513 addi x10,x10,8 + +0000000080001af4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + clmul x19, x21, x2 # perform operation + 80001af4: 0a2a99b3 clmul x19,x21,x2 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af8: 0005b203 ld x4,0(x11) + 80001afc: 01320c63 beq x4,x19,80001b14 + 80001b00: 200062ef jal x5,80007d00 + 80001b04: 80001af4 .word 0x80001af4 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 800100a2 .word 0x800100a2 + 80001b10: 00000000 .word 0x00000000 + 80001b14: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x0000000000000000 + 80001b18: 00053403 ld x8,0(x10) + 80001b1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000002 + 80001b20: 00053e03 ld x28,0(x10) + 80001b24: 00850513 addi x10,x10,8 + +0000000080001b28 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + clmul x23, x8, x28 # perform operation + 80001b28: 0bc41bb3 clmul x23,x8,x28 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b2c: 0005b203 ld x4,0(x11) + 80001b30: 01720c63 beq x4,x23,80001b48 + 80001b34: 1cc062ef jal x5,80007d00 + 80001b38: 80001b28 .word 0x80001b28 + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 800100f4 .word 0x800100f4 + 80001b44: 00000000 .word 0x00000000 + 80001b48: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 80001b4c: 00053f03 ld x30,0(x10) + 80001b50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000000 + 80001b54: 00053b03 ld x22,0(x10) + 80001b58: 00850513 addi x10,x10,8 + +0000000080001b5c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + clmul x27, x30, x22 # perform operation + 80001b5c: 0b6f1db3 clmul x27,x30,x22 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b60: 0005b203 ld x4,0(x11) + 80001b64: 01b20c63 beq x4,x27,80001b7c + 80001b68: 198062ef jal x5,80007d00 + 80001b6c: 80001b5c .word 0x80001b5c + 80001b70: 00000000 .word 0x00000000 + 80001b74: 80010146 .word 0x80010146 + 80001b78: 00000000 .word 0x00000000 + 80001b7c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000000 + 80001b80: 00053c03 ld x24,0(x10) + 80001b84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x8000000000000001 + 80001b88: 00053383 ld x7,0(x10) + 80001b8c: 00850513 addi x10,x10,8 + +0000000080001b90 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + clmul x31, x24, x7 # perform operation + 80001b90: 0a7c1fb3 clmul x31,x24,x7 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b94: 0005b203 ld x4,0(x11) + 80001b98: 01f20c63 beq x4,x31,80001bb0 + 80001b9c: 164062ef jal x5,80007d00 + 80001ba0: 80001b90 .word 0x80001b90 + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 800101a7 .word 0x800101a7 + 80001bac: 00000000 .word 0x00000000 + 80001bb0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000000000000 + 80001bb4: 00053603 ld x12,0(x10) + 80001bb8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7fffffffffffffff + 80001bbc: 00053083 ld x1,0(x10) + 80001bc0: 00850513 addi x10,x10,8 + +0000000080001bc4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + clmul x15, x12, x1 # perform operation + 80001bc4: 0a1617b3 clmul x15,x12,x1 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc8: 0005b203 ld x4,0(x11) + 80001bcc: 00f20c63 beq x4,x15,80001be4 + 80001bd0: 130062ef jal x5,80007d00 + 80001bd4: 80001bc4 .word 0x80001bc4 + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 80010208 .word 0x80010208 + 80001be0: 00000000 .word 0x00000000 + 80001be4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000000 + 80001be8: 00053483 ld x9,0(x10) + 80001bec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffffffffffe + 80001bf0: 00053c03 ld x24,0(x10) + 80001bf4: 00850513 addi x10,x10,8 + +0000000080001bf8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + clmul x1, x9, x24 # perform operation + 80001bf8: 0b8490b3 clmul x1,x9,x24 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bfc: 0005b203 ld x4,0(x11) + 80001c00: 00120c63 beq x4,x1,80001c18 + 80001c04: 0fc062ef jal x5,80007d00 + 80001c08: 80001bf8 .word 0x80001bf8 + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 80010269 .word 0x80010269 + 80001c14: 00000000 .word 0x00000000 + 80001c18: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000000 + 80001c1c: 00053103 ld x2,0(x10) + 80001c20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffffffffffff + 80001c24: 00053b83 ld x23,0(x10) + 80001c28: 00850513 addi x10,x10,8 + +0000000080001c2c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + clmul x13, x2, x23 # perform operation + 80001c2c: 0b7116b3 clmul x13,x2,x23 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c30: 0005b203 ld x4,0(x11) + 80001c34: 00d20c63 beq x4,x13,80001c4c + 80001c38: 0c8062ef jal x5,80007d00 + 80001c3c: 80001c2c .word 0x80001c2c + 80001c40: 00000000 .word 0x00000000 + 80001c44: 800102ca .word 0x800102ca + 80001c48: 00000000 .word 0x00000000 + 80001c4c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000000 + 80001c50: 00053c83 ld x25,0(x10) + 80001c54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfffffffffffffffe + 80001c58: 00053303 ld x6,0(x10) + 80001c5c: 00850513 addi x10,x10,8 + +0000000080001c60 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + clmul x20, x25, x6 # perform operation + 80001c60: 0a6c9a33 clmul x20,x25,x6 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c64: 0005b203 ld x4,0(x11) + 80001c68: 01420c63 beq x4,x20,80001c80 + 80001c6c: 094062ef jal x5,80007d00 + 80001c70: 80001c60 .word 0x80001c60 + 80001c74: 00000000 .word 0x00000000 + 80001c78: 8001032b .word 0x8001032b + 80001c7c: 00000000 .word 0x00000000 + 80001c80: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000000 + 80001c84: 00053e83 ld x29,0(x10) + 80001c88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 80001c8c: 00053e03 ld x28,0(x10) + 80001c90: 00850513 addi x10,x10,8 + +0000000080001c94 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + clmul x6, x29, x28 # perform operation + 80001c94: 0bce9333 clmul x6,x29,x28 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c98: 0005b203 ld x4,0(x11) + 80001c9c: 00620c63 beq x4,x6,80001cb4 + 80001ca0: 060062ef jal x5,80007d00 + 80001ca4: 80001c94 .word 0x80001c94 + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 8001038c .word 0x8001038c + 80001cb0: 00000000 .word 0x00000000 + 80001cb4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000000 + 80001cb8: 00053e83 ld x29,0(x10) + 80001cbc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80001cc0: 00053a83 ld x21,0(x10) + 80001cc4: 00850513 addi x10,x10,8 + +0000000080001cc8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x26, x29, x21 # perform operation + 80001cc8: 0b5e9d33 clmul x26,x29,x21 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ccc: 0005b203 ld x4,0(x11) + 80001cd0: 01a20c63 beq x4,x26,80001ce8 + 80001cd4: 02c062ef jal x5,80007d00 + 80001cd8: 80001cc8 .word 0x80001cc8 + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 800103ed .word 0x800103ed + 80001ce4: 00000000 .word 0x00000000 + 80001ce8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000000 + 80001cec: 00053803 ld x16,0(x10) + 80001cf0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5555555555555555 + 80001cf4: 00053a83 ld x21,0(x10) + 80001cf8: 00850513 addi x10,x10,8 + +0000000080001cfc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + clmul x20, x16, x21 # perform operation + 80001cfc: 0b581a33 clmul x20,x16,x21 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001d00: 0005b203 ld x4,0(x11) + 80001d04: 01420c63 beq x4,x20,80001d1c + 80001d08: 7f9052ef jal x5,80007d00 + 80001d0c: 80001cfc .word 0x80001cfc + 80001d10: 00000000 .word 0x00000000 + 80001d14: 8001044e .word 0x8001044e + 80001d18: 00000000 .word 0x00000000 + 80001d1c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000000000000 + 80001d20: 00053e03 ld x28,0(x10) + 80001d24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000ffffffff + 80001d28: 00053403 ld x8,0(x10) + 80001d2c: 00850513 addi x10,x10,8 + +0000000080001d30 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + clmul x14, x28, x8 # perform operation + 80001d30: 0a8e1733 clmul x14,x28,x8 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d34: 0005b203 ld x4,0(x11) + 80001d38: 00e20c63 beq x4,x14,80001d50 + 80001d3c: 7c5052ef jal x5,80007d00 + 80001d40: 80001d30 .word 0x80001d30 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 800104af .word 0x800104af + 80001d4c: 00000000 .word 0x00000000 + 80001d50: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000000 + 80001d54: 00053c83 ld x25,0(x10) + 80001d58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x00000000fffffffe + 80001d5c: 00053f03 ld x30,0(x10) + 80001d60: 00850513 addi x10,x10,8 + +0000000080001d64 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + clmul x21, x25, x30 # perform operation + 80001d64: 0bec9ab3 clmul x21,x25,x30 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d68: 0005b203 ld x4,0(x11) + 80001d6c: 01520c63 beq x4,x21,80001d84 + 80001d70: 791052ef jal x5,80007d00 + 80001d74: 80001d64 .word 0x80001d64 + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 80010508 .word 0x80010508 + 80001d80: 00000000 .word 0x00000000 + 80001d84: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000000 + 80001d88: 00053f83 ld x31,0(x10) + 80001d8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000000 + 80001d90: 00053c83 ld x25,0(x10) + 80001d94: 00850513 addi x10,x10,8 + +0000000080001d98 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + clmul x21, x31, x25 # perform operation + 80001d98: 0b9f9ab3 clmul x21,x31,x25 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d9c: 0005b203 ld x4,0(x11) + 80001da0: 01520c63 beq x4,x21,80001db8 + 80001da4: 75d052ef jal x5,80007d00 + 80001da8: 80001d98 .word 0x80001d98 + 80001dac: 00000000 .word 0x00000000 + 80001db0: 80010561 .word 0x80010561 + 80001db4: 00000000 .word 0x00000000 + 80001db8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000000 + 80001dbc: 00053483 ld x9,0(x10) + 80001dc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000100000001 + 80001dc4: 00053d03 ld x26,0(x10) + 80001dc8: 00850513 addi x10,x10,8 + +0000000080001dcc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + clmul x27, x9, x26 # perform operation + 80001dcc: 0ba49db3 clmul x27,x9,x26 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dd0: 0005b203 ld x4,0(x11) + 80001dd4: 01b20c63 beq x4,x27,80001dec + 80001dd8: 729052ef jal x5,80007d00 + 80001ddc: 80001dcc .word 0x80001dcc + 80001de0: 00000000 .word 0x00000000 + 80001de4: 800105bb .word 0x800105bb + 80001de8: 00000000 .word 0x00000000 + 80001dec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000000000001 + 80001df0: 00053303 ld x6,0(x10) + 80001df4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000000 + 80001df8: 00053b83 ld x23,0(x10) + 80001dfc: 00850513 addi x10,x10,8 + +0000000080001e00 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + clmul x27, x6, x23 # perform operation + 80001e00: 0b731db3 clmul x27,x6,x23 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001e04: 0005b203 ld x4,0(x11) + 80001e08: 01b20c63 beq x4,x27,80001e20 + 80001e0c: 6f5052ef jal x5,80007d00 + 80001e10: 80001e00 .word 0x80001e00 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 80010615 .word 0x80010615 + 80001e1c: 00000000 .word 0x00000000 + 80001e20: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000001 + 80001e24: 00053e83 ld x29,0(x10) + 80001e28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000001 + 80001e2c: 00053a83 ld x21,0(x10) + 80001e30: 00850513 addi x10,x10,8 + +0000000080001e34 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + clmul x13, x29, x21 # perform operation + 80001e34: 0b5e96b3 clmul x13,x29,x21 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e38: 0005b203 ld x4,0(x11) + 80001e3c: 00d20c63 beq x4,x13,80001e54 + 80001e40: 6c1052ef jal x5,80007d00 + 80001e44: 80001e34 .word 0x80001e34 + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 80010667 .word 0x80010667 + 80001e50: 00000000 .word 0x00000000 + 80001e54: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000001 + 80001e58: 00053683 ld x13,0(x10) + 80001e5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000002 + 80001e60: 00053a03 ld x20,0(x10) + 80001e64: 00850513 addi x10,x10,8 + +0000000080001e68 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + clmul x31, x13, x20 # perform operation + 80001e68: 0b469fb3 clmul x31,x13,x20 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e6c: 0005b203 ld x4,0(x11) + 80001e70: 01f20c63 beq x4,x31,80001e88 + 80001e74: 68d052ef jal x5,80007d00 + 80001e78: 80001e68 .word 0x80001e68 + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 800106b9 .word 0x800106b9 + 80001e84: 00000000 .word 0x00000000 + 80001e88: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x0000000000000001 + 80001e8c: 00053403 ld x8,0(x10) + 80001e90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000000 + 80001e94: 00053b03 ld x22,0(x10) + 80001e98: 00850513 addi x10,x10,8 + +0000000080001e9c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + clmul x23, x8, x22 # perform operation + 80001e9c: 0b641bb3 clmul x23,x8,x22 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001ea0: 0005b203 ld x4,0(x11) + 80001ea4: 01720c63 beq x4,x23,80001ebc + 80001ea8: 659052ef jal x5,80007d00 + 80001eac: 80001e9c .word 0x80001e9c + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 8001070b .word 0x8001070b + 80001eb8: 00000000 .word 0x00000000 + 80001ebc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000001 + 80001ec0: 00053103 ld x2,0(x10) + 80001ec4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x8000000000000001 + 80001ec8: 00053703 ld x14,0(x10) + 80001ecc: 00850513 addi x10,x10,8 + +0000000080001ed0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + clmul x21, x2, x14 # perform operation + 80001ed0: 0ae11ab3 clmul x21,x2,x14 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ed4: 0005b203 ld x4,0(x11) + 80001ed8: 01520c63 beq x4,x21,80001ef0 + 80001edc: 625052ef jal x5,80007d00 + 80001ee0: 80001ed0 .word 0x80001ed0 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 8001076c .word 0x8001076c + 80001eec: 00000000 .word 0x00000000 + 80001ef0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000001 + 80001ef4: 00053d83 ld x27,0(x10) + 80001ef8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7fffffffffffffff + 80001efc: 00053f83 ld x31,0(x10) + 80001f00: 00850513 addi x10,x10,8 + +0000000080001f04 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + clmul x14, x27, x31 # perform operation + 80001f04: 0bfd9733 clmul x14,x27,x31 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f08: 0005b203 ld x4,0(x11) + 80001f0c: 00e20c63 beq x4,x14,80001f24 + 80001f10: 5f1052ef jal x5,80007d00 + 80001f14: 80001f04 .word 0x80001f04 + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 800107cd .word 0x800107cd + 80001f20: 00000000 .word 0x00000000 + 80001f24: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000001 + 80001f28: 00053f03 ld x30,0(x10) + 80001f2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffffffffffe + 80001f30: 00053e03 ld x28,0(x10) + 80001f34: 00850513 addi x10,x10,8 + +0000000080001f38 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + clmul x1, x30, x28 # perform operation + 80001f38: 0bcf10b3 clmul x1,x30,x28 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f3c: 0005b203 ld x4,0(x11) + 80001f40: 00120c63 beq x4,x1,80001f58 + 80001f44: 5bd052ef jal x5,80007d00 + 80001f48: 80001f38 .word 0x80001f38 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 8001082e .word 0x8001082e + 80001f54: 00000000 .word 0x00000000 + 80001f58: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000000000001 + 80001f5c: 00053903 ld x18,0(x10) + 80001f60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xffffffffffffffff + 80001f64: 00053383 ld x7,0(x10) + 80001f68: 00850513 addi x10,x10,8 + +0000000080001f6c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + clmul x6, x18, x7 # perform operation + 80001f6c: 0a791333 clmul x6,x18,x7 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f70: 0005b203 ld x4,0(x11) + 80001f74: 00620c63 beq x4,x6,80001f8c + 80001f78: 589052ef jal x5,80007d00 + 80001f7c: 80001f6c .word 0x80001f6c + 80001f80: 00000000 .word 0x00000000 + 80001f84: 8001088f .word 0x8001088f + 80001f88: 00000000 .word 0x00000000 + 80001f8c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000001 + 80001f90: 00053e83 ld x29,0(x10) + 80001f94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xfffffffffffffffe + 80001f98: 00053d03 ld x26,0(x10) + 80001f9c: 00850513 addi x10,x10,8 + +0000000080001fa0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + clmul x31, x29, x26 # perform operation + 80001fa0: 0bae9fb3 clmul x31,x29,x26 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001fa4: 0005b203 ld x4,0(x11) + 80001fa8: 01f20c63 beq x4,x31,80001fc0 + 80001fac: 555052ef jal x5,80007d00 + 80001fb0: 80001fa0 .word 0x80001fa0 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 800108f0 .word 0x800108f0 + 80001fbc: 00000000 .word 0x00000000 + 80001fc0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000000000001 + 80001fc4: 00053b83 ld x23,0(x10) + 80001fc8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 80001fcc: 00053c83 ld x25,0(x10) + 80001fd0: 00850513 addi x10,x10,8 + +0000000080001fd4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + clmul x27, x23, x25 # perform operation + 80001fd4: 0b9b9db3 clmul x27,x23,x25 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd8: 0005b203 ld x4,0(x11) + 80001fdc: 01b20c63 beq x4,x27,80001ff4 + 80001fe0: 521052ef jal x5,80007d00 + 80001fe4: 80001fd4 .word 0x80001fd4 + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 80010951 .word 0x80010951 + 80001ff0: 00000000 .word 0x00000000 + 80001ff4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001ff8: 00053a83 ld x21,0(x10) + 80001ffc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80002000: 00053403 ld x8,0(x10) + 80002004: 00850513 addi x10,x10,8 + +0000000080002008 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x29, x21, x8 # perform operation + 80002008: 0a8a9eb3 clmul x29,x21,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000200c: 0005b203 ld x4,0(x11) + 80002010: 01d20c63 beq x4,x29,80002028 + 80002014: 4ed052ef jal x5,80007d00 + 80002018: 80002008 .word 0x80002008 + 8000201c: 00000000 .word 0x00000000 + 80002020: 800109b2 .word 0x800109b2 + 80002024: 00000000 .word 0x00000000 + 80002028: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000001 + 8000202c: 00053803 ld x16,0(x10) + 80002030: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5555555555555555 + 80002034: 00053e03 ld x28,0(x10) + 80002038: 00850513 addi x10,x10,8 + +000000008000203c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + clmul x21, x16, x28 # perform operation + 8000203c: 0bc81ab3 clmul x21,x16,x28 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002040: 0005b203 ld x4,0(x11) + 80002044: 01520c63 beq x4,x21,8000205c + 80002048: 4b9052ef jal x5,80007d00 + 8000204c: 8000203c .word 0x8000203c + 80002050: 00000000 .word 0x00000000 + 80002054: 80010a13 .word 0x80010a13 + 80002058: 00000000 .word 0x00000000 + 8000205c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 80002060: 00053a03 ld x20,0(x10) + 80002064: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000000ffffffff + 80002068: 00053303 ld x6,0(x10) + 8000206c: 00850513 addi x10,x10,8 + +0000000080002070 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + clmul x9, x20, x6 # perform operation + 80002070: 0a6a14b3 clmul x9,x20,x6 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002074: 0005b203 ld x4,0(x11) + 80002078: 00920c63 beq x4,x9,80002090 + 8000207c: 485052ef jal x5,80007d00 + 80002080: 80002070 .word 0x80002070 + 80002084: 00000000 .word 0x00000000 + 80002088: 80010a74 .word 0x80010a74 + 8000208c: 00000000 .word 0x00000000 + 80002090: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000001 + 80002094: 00053e83 ld x29,0(x10) + 80002098: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x00000000fffffffe + 8000209c: 00053783 ld x15,0(x10) + 800020a0: 00850513 addi x10,x10,8 + +00000000800020a4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + clmul x21, x29, x15 # perform operation + 800020a4: 0afe9ab3 clmul x21,x29,x15 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a8: 0005b203 ld x4,0(x11) + 800020ac: 01520c63 beq x4,x21,800020c4 + 800020b0: 451052ef jal x5,80007d00 + 800020b4: 800020a4 .word 0x800020a4 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 80010acd .word 0x80010acd + 800020c0: 00000000 .word 0x00000000 + 800020c4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000001 + 800020c8: 00053c83 ld x25,0(x10) + 800020cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000100000000 + 800020d0: 00053f03 ld x30,0(x10) + 800020d4: 00850513 addi x10,x10,8 + +00000000800020d8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + clmul x26, x25, x30 # perform operation + 800020d8: 0bec9d33 clmul x26,x25,x30 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020dc: 0005b203 ld x4,0(x11) + 800020e0: 01a20c63 beq x4,x26,800020f8 + 800020e4: 41d052ef jal x5,80007d00 + 800020e8: 800020d8 .word 0x800020d8 + 800020ec: 00000000 .word 0x00000000 + 800020f0: 80010b26 .word 0x80010b26 + 800020f4: 00000000 .word 0x00000000 + 800020f8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000001 + 800020fc: 00053883 ld x17,0(x10) + 80002100: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000100000001 + 80002104: 00053a03 ld x20,0(x10) + 80002108: 00850513 addi x10,x10,8 + +000000008000210c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + clmul x12, x17, x20 # perform operation + 8000210c: 0b489633 clmul x12,x17,x20 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002110: 0005b203 ld x4,0(x11) + 80002114: 00c20c63 beq x4,x12,8000212c + 80002118: 3e9052ef jal x5,80007d00 + 8000211c: 8000210c .word 0x8000210c + 80002120: 00000000 .word 0x00000000 + 80002124: 80010b80 .word 0x80010b80 + 80002128: 00000000 .word 0x00000000 + 8000212c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000000000002 + 80002130: 00053b83 ld x23,0(x10) + 80002134: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000000000000 + 80002138: 00053d83 ld x27,0(x10) + 8000213c: 00850513 addi x10,x10,8 + +0000000080002140 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + clmul x2, x23, x27 # perform operation + 80002140: 0bbb9133 clmul x2,x23,x27 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002144: 0005b203 ld x4,0(x11) + 80002148: 00220c63 beq x4,x2,80002160 + 8000214c: 3b5052ef jal x5,80007d00 + 80002150: 80002140 .word 0x80002140 + 80002154: 00000000 .word 0x00000000 + 80002158: 80010bda .word 0x80010bda + 8000215c: 00000000 .word 0x00000000 + 80002160: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000002 + 80002164: 00053c03 ld x24,0(x10) + 80002168: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000001 + 8000216c: 00053303 ld x6,0(x10) + 80002170: 00850513 addi x10,x10,8 + +0000000080002174 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + clmul x18, x24, x6 # perform operation + 80002174: 0a6c1933 clmul x18,x24,x6 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002178: 0005b203 ld x4,0(x11) + 8000217c: 01220c63 beq x4,x18,80002194 + 80002180: 381052ef jal x5,80007d00 + 80002184: 80002174 .word 0x80002174 + 80002188: 00000000 .word 0x00000000 + 8000218c: 80010c2c .word 0x80010c2c + 80002190: 00000000 .word 0x00000000 + 80002194: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 80002198: 00053e83 ld x29,0(x10) + 8000219c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000002 + 800021a0: 00053f83 ld x31,0(x10) + 800021a4: 00850513 addi x10,x10,8 + +00000000800021a8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + clmul x20, x29, x31 # perform operation + 800021a8: 0bfe9a33 clmul x20,x29,x31 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021ac: 0005b203 ld x4,0(x11) + 800021b0: 01420c63 beq x4,x20,800021c8 + 800021b4: 34d052ef jal x5,80007d00 + 800021b8: 800021a8 .word 0x800021a8 + 800021bc: 00000000 .word 0x00000000 + 800021c0: 80010c7e .word 0x80010c7e + 800021c4: 00000000 .word 0x00000000 + 800021c8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000002 + 800021cc: 00053683 ld x13,0(x10) + 800021d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000000 + 800021d4: 00053c03 ld x24,0(x10) + 800021d8: 00850513 addi x10,x10,8 + +00000000800021dc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + clmul x14, x13, x24 # perform operation + 800021dc: 0b869733 clmul x14,x13,x24 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021e0: 0005b203 ld x4,0(x11) + 800021e4: 00e20c63 beq x4,x14,800021fc + 800021e8: 319052ef jal x5,80007d00 + 800021ec: 800021dc .word 0x800021dc + 800021f0: 00000000 .word 0x00000000 + 800021f4: 80010cd0 .word 0x80010cd0 + 800021f8: 00000000 .word 0x00000000 + 800021fc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000002 + 80002200: 00053783 ld x15,0(x10) + 80002204: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000001 + 80002208: 00053103 ld x2,0(x10) + 8000220c: 00850513 addi x10,x10,8 + +0000000080002210 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + clmul x30, x15, x2 # perform operation + 80002210: 0a279f33 clmul x30,x15,x2 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002214: 0005b203 ld x4,0(x11) + 80002218: 01e20c63 beq x4,x30,80002230 + 8000221c: 2e5052ef jal x5,80007d00 + 80002220: 80002210 .word 0x80002210 + 80002224: 00000000 .word 0x00000000 + 80002228: 80010d31 .word 0x80010d31 + 8000222c: 00000000 .word 0x00000000 + 80002230: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x0000000000000002 + 80002234: 00053383 ld x7,0(x10) + 80002238: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x7fffffffffffffff + 8000223c: 00053183 ld x3,0(x10) + 80002240: 00850513 addi x10,x10,8 + +0000000080002244 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + clmul x1, x7, x3 # perform operation + 80002244: 0a3390b3 clmul x1,x7,x3 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002248: 0005b203 ld x4,0(x11) + 8000224c: 00120c63 beq x4,x1,80002264 + 80002250: 2b1052ef jal x5,80007d00 + 80002254: 80002244 .word 0x80002244 + 80002258: 00000000 .word 0x00000000 + 8000225c: 80010d92 .word 0x80010d92 + 80002260: 00000000 .word 0x00000000 + 80002264: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 80002268: 00053803 ld x16,0(x10) + 8000226c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffffffffffe + 80002270: 00053e03 ld x28,0(x10) + 80002274: 00850513 addi x10,x10,8 + +0000000080002278 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + clmul x9, x16, x28 # perform operation + 80002278: 0bc814b3 clmul x9,x16,x28 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 8000227c: 0005b203 ld x4,0(x11) + 80002280: 00920c63 beq x4,x9,80002298 + 80002284: 27d052ef jal x5,80007d00 + 80002288: 80002278 .word 0x80002278 + 8000228c: 00000000 .word 0x00000000 + 80002290: 80010df3 .word 0x80010df3 + 80002294: 00000000 .word 0x00000000 + 80002298: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000000000002 + 8000229c: 00053083 ld x1,0(x10) + 800022a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xffffffffffffffff + 800022a4: 00053703 ld x14,0(x10) + 800022a8: 00850513 addi x10,x10,8 + +00000000800022ac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + clmul x30, x1, x14 # perform operation + 800022ac: 0ae09f33 clmul x30,x1,x14 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022b0: 0005b203 ld x4,0(x11) + 800022b4: 01e20c63 beq x4,x30,800022cc + 800022b8: 249052ef jal x5,80007d00 + 800022bc: 800022ac .word 0x800022ac + 800022c0: 00000000 .word 0x00000000 + 800022c4: 80010e54 .word 0x80010e54 + 800022c8: 00000000 .word 0x00000000 + 800022cc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x0000000000000002 + 800022d0: 00053403 ld x8,0(x10) + 800022d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xfffffffffffffffe + 800022d8: 00053c83 ld x25,0(x10) + 800022dc: 00850513 addi x10,x10,8 + +00000000800022e0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + clmul x28, x8, x25 # perform operation + 800022e0: 0b941e33 clmul x28,x8,x25 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022e4: 0005b203 ld x4,0(x11) + 800022e8: 01c20c63 beq x4,x28,80002300 + 800022ec: 215052ef jal x5,80007d00 + 800022f0: 800022e0 .word 0x800022e0 + 800022f4: 00000000 .word 0x00000000 + 800022f8: 80010eb5 .word 0x80010eb5 + 800022fc: 00000000 .word 0x00000000 + 80002300: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000000000002 + 80002304: 00053603 ld x12,0(x10) + 80002308: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 8000230c: 00053803 ld x16,0(x10) + 80002310: 00850513 addi x10,x10,8 + +0000000080002314 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + clmul x29, x12, x16 # perform operation + 80002314: 0b061eb3 clmul x29,x12,x16 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002318: 0005b203 ld x4,0(x11) + 8000231c: 01d20c63 beq x4,x29,80002334 + 80002320: 1e1052ef jal x5,80007d00 + 80002324: 80002314 .word 0x80002314 + 80002328: 00000000 .word 0x00000000 + 8000232c: 80010f16 .word 0x80010f16 + 80002330: 00000000 .word 0x00000000 + 80002334: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000002 + 80002338: 00053f83 ld x31,0(x10) + 8000233c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80002340: 00053303 ld x6,0(x10) + 80002344: 00850513 addi x10,x10,8 + +0000000080002348 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x26, x31, x6 # perform operation + 80002348: 0a6f9d33 clmul x26,x31,x6 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000234c: 0005b203 ld x4,0(x11) + 80002350: 01a20c63 beq x4,x26,80002368 + 80002354: 1ad052ef jal x5,80007d00 + 80002358: 80002348 .word 0x80002348 + 8000235c: 00000000 .word 0x00000000 + 80002360: 80010f77 .word 0x80010f77 + 80002364: 00000000 .word 0x00000000 + 80002368: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000002 + 8000236c: 00053103 ld x2,0(x10) + 80002370: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5555555555555555 + 80002374: 00053f83 ld x31,0(x10) + 80002378: 00850513 addi x10,x10,8 + +000000008000237c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + clmul x12, x2, x31 # perform operation + 8000237c: 0bf11633 clmul x12,x2,x31 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002380: 0005b203 ld x4,0(x11) + 80002384: 00c20c63 beq x4,x12,8000239c + 80002388: 179052ef jal x5,80007d00 + 8000238c: 8000237c .word 0x8000237c + 80002390: 00000000 .word 0x00000000 + 80002394: 80010fd8 .word 0x80010fd8 + 80002398: 00000000 .word 0x00000000 + 8000239c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 800023a0: 00053e83 ld x29,0(x10) + 800023a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000ffffffff + 800023a8: 00053483 ld x9,0(x10) + 800023ac: 00850513 addi x10,x10,8 + +00000000800023b0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + clmul x30, x29, x9 # perform operation + 800023b0: 0a9e9f33 clmul x30,x29,x9 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023b4: 0005b203 ld x4,0(x11) + 800023b8: 01e20c63 beq x4,x30,800023d0 + 800023bc: 145052ef jal x5,80007d00 + 800023c0: 800023b0 .word 0x800023b0 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 80011039 .word 0x80011039 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000000000002 + 800023d4: 00053e03 ld x28,0(x10) + 800023d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000000fffffffe + 800023dc: 00053c03 ld x24,0(x10) + 800023e0: 00850513 addi x10,x10,8 + +00000000800023e4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + clmul x21, x28, x24 # perform operation + 800023e4: 0b8e1ab3 clmul x21,x28,x24 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e8: 0005b203 ld x4,0(x11) + 800023ec: 01520c63 beq x4,x21,80002404 + 800023f0: 111052ef jal x5,80007d00 + 800023f4: 800023e4 .word 0x800023e4 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 80011092 .word 0x80011092 + 80002400: 00000000 .word 0x00000000 + 80002404: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000002 + 80002408: 00053703 ld x14,0(x10) + 8000240c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000100000000 + 80002410: 00053e03 ld x28,0(x10) + 80002414: 00850513 addi x10,x10,8 + +0000000080002418 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + clmul x21, x14, x28 # perform operation + 80002418: 0bc71ab3 clmul x21,x14,x28 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 8000241c: 0005b203 ld x4,0(x11) + 80002420: 01520c63 beq x4,x21,80002438 + 80002424: 0dd052ef jal x5,80007d00 + 80002428: 80002418 .word 0x80002418 + 8000242c: 00000000 .word 0x00000000 + 80002430: 800110eb .word 0x800110eb + 80002434: 00000000 .word 0x00000000 + 80002438: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000000000002 + 8000243c: 00053903 ld x18,0(x10) + 80002440: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000100000001 + 80002444: 00053e83 ld x29,0(x10) + 80002448: 00850513 addi x10,x10,8 + +000000008000244c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + clmul x30, x18, x29 # perform operation + 8000244c: 0bd91f33 clmul x30,x18,x29 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002450: 0005b203 ld x4,0(x11) + 80002454: 01e20c63 beq x4,x30,8000246c + 80002458: 0a9052ef jal x5,80007d00 + 8000245c: 8000244c .word 0x8000244c + 80002460: 00000000 .word 0x00000000 + 80002464: 80011145 .word 0x80011145 + 80002468: 00000000 .word 0x00000000 + 8000246c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000000 + 80002470: 00053d83 ld x27,0(x10) + 80002474: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000000 + 80002478: 00053903 ld x18,0(x10) + 8000247c: 00850513 addi x10,x10,8 + +0000000080002480 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + clmul x17, x27, x18 # perform operation + 80002480: 0b2d98b3 clmul x17,x27,x18 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002484: 0005b203 ld x4,0(x11) + 80002488: 01120c63 beq x4,x17,800024a0 + 8000248c: 075052ef jal x5,80007d00 + 80002490: 80002480 .word 0x80002480 + 80002494: 00000000 .word 0x00000000 + 80002498: 8001119f .word 0x8001119f + 8000249c: 00000000 .word 0x00000000 + 800024a0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000000 + 800024a4: 00053083 ld x1,0(x10) + 800024a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000000000001 + 800024ac: 00053603 ld x12,0(x10) + 800024b0: 00850513 addi x10,x10,8 + +00000000800024b4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + clmul x29, x1, x12 # perform operation + 800024b4: 0ac09eb3 clmul x29,x1,x12 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b8: 0005b203 ld x4,0(x11) + 800024bc: 01d20c63 beq x4,x29,800024d4 + 800024c0: 041052ef jal x5,80007d00 + 800024c4: 800024b4 .word 0x800024b4 + 800024c8: 00000000 .word 0x00000000 + 800024cc: 80011200 .word 0x80011200 + 800024d0: 00000000 .word 0x00000000 + 800024d4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 800024d8: 00053683 ld x13,0(x10) + 800024dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000002 + 800024e0: 00053b03 ld x22,0(x10) + 800024e4: 00850513 addi x10,x10,8 + +00000000800024e8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + clmul x8, x13, x22 # perform operation + 800024e8: 0b669433 clmul x8,x13,x22 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024ec: 0005b203 ld x4,0(x11) + 800024f0: 00820c63 beq x4,x8,80002508 + 800024f4: 00d052ef jal x5,80007d00 + 800024f8: 800024e8 .word 0x800024e8 + 800024fc: 00000000 .word 0x00000000 + 80002500: 80011261 .word 0x80011261 + 80002504: 00000000 .word 0x00000000 + 80002508: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000000 + 8000250c: 00053603 ld x12,0(x10) + 80002510: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 80002514: 00053f83 ld x31,0(x10) + 80002518: 00850513 addi x10,x10,8 + +000000008000251c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + clmul x1, x12, x31 # perform operation + 8000251c: 0bf610b3 clmul x1,x12,x31 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002520: 0005b203 ld x4,0(x11) + 80002524: 00120c63 beq x4,x1,8000253c + 80002528: 7d8052ef jal x5,80007d00 + 8000252c: 8000251c .word 0x8000251c + 80002530: 00000000 .word 0x00000000 + 80002534: 800112c2 .word 0x800112c2 + 80002538: 00000000 .word 0x00000000 + 8000253c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x8000000000000000 + 80002540: 00053b03 ld x22,0(x10) + 80002544: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000001 + 80002548: 00053c03 ld x24,0(x10) + 8000254c: 00850513 addi x10,x10,8 + +0000000080002550 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + clmul x20, x22, x24 # perform operation + 80002550: 0b8b1a33 clmul x20,x22,x24 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002554: 0005b203 ld x4,0(x11) + 80002558: 01420c63 beq x4,x20,80002570 + 8000255c: 7a4052ef jal x5,80007d00 + 80002560: 80002550 .word 0x80002550 + 80002564: 00000000 .word 0x00000000 + 80002568: 80011332 .word 0x80011332 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x8000000000000000 + 80002574: 00053883 ld x17,0(x10) + 80002578: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffffffffffff + 8000257c: 00053d83 ld x27,0(x10) + 80002580: 00850513 addi x10,x10,8 + +0000000080002584 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + clmul x20, x17, x27 # perform operation + 80002584: 0bb89a33 clmul x20,x17,x27 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002588: 0005b203 ld x4,0(x11) + 8000258c: 01420c63 beq x4,x20,800025a4 + 80002590: 770052ef jal x5,80007d00 + 80002594: 80002584 .word 0x80002584 + 80002598: 00000000 .word 0x00000000 + 8000259c: 800113a2 .word 0x800113a2 + 800025a0: 00000000 .word 0x00000000 + 800025a4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x8000000000000000 + 800025a8: 00053403 ld x8,0(x10) + 800025ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x7ffffffffffffffe + 800025b0: 00053a83 ld x21,0(x10) + 800025b4: 00850513 addi x10,x10,8 + +00000000800025b8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + clmul x26, x8, x21 # perform operation + 800025b8: 0b541d33 clmul x26,x8,x21 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025bc: 0005b203 ld x4,0(x11) + 800025c0: 01a20c63 beq x4,x26,800025d8 + 800025c4: 73c052ef jal x5,80007d00 + 800025c8: 800025b8 .word 0x800025b8 + 800025cc: 00000000 .word 0x00000000 + 800025d0: 80011412 .word 0x80011412 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000000 + 800025dc: 00053103 ld x2,0(x10) + 800025e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 800025e4: 00053b03 ld x22,0(x10) + 800025e8: 00850513 addi x10,x10,8 + +00000000800025ec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + clmul x29, x2, x22 # perform operation + 800025ec: 0b611eb3 clmul x29,x2,x22 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025f0: 0005b203 ld x4,0(x11) + 800025f4: 01d20c63 beq x4,x29,8000260c + 800025f8: 708052ef jal x5,80007d00 + 800025fc: 800025ec .word 0x800025ec + 80002600: 00000000 .word 0x00000000 + 80002604: 80011482 .word 0x80011482 + 80002608: 00000000 .word 0x00000000 + 8000260c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000000 + 80002610: 00053a03 ld x20,0(x10) + 80002614: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xfffffffffffffffe + 80002618: 00053a83 ld x21,0(x10) + 8000261c: 00850513 addi x10,x10,8 + +0000000080002620 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + clmul x29, x20, x21 # perform operation + 80002620: 0b5a1eb3 clmul x29,x20,x21 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002624: 0005b203 ld x4,0(x11) + 80002628: 01d20c63 beq x4,x29,80002640 + 8000262c: 6d4052ef jal x5,80007d00 + 80002630: 80002620 .word 0x80002620 + 80002634: 00000000 .word 0x00000000 + 80002638: 800114f2 .word 0x800114f2 + 8000263c: 00000000 .word 0x00000000 + 80002640: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8000000000000000 + 80002644: 00053483 ld x9,0(x10) + 80002648: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 8000264c: 00053c83 ld x25,0(x10) + 80002650: 00850513 addi x10,x10,8 + +0000000080002654 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + clmul x27, x9, x25 # perform operation + 80002654: 0b949db3 clmul x27,x9,x25 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002658: 0005b203 ld x4,0(x11) + 8000265c: 01b20c63 beq x4,x27,80002674 + 80002660: 6a0052ef jal x5,80007d00 + 80002664: 80002654 .word 0x80002654 + 80002668: 00000000 .word 0x00000000 + 8000266c: 80011562 .word 0x80011562 + 80002670: 00000000 .word 0x00000000 + 80002674: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x8000000000000000 + 80002678: 00053883 ld x17,0(x10) + 8000267c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80002680: 00053c03 ld x24,0(x10) + 80002684: 00850513 addi x10,x10,8 + +0000000080002688 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x6, x17, x24 # perform operation + 80002688: 0b889333 clmul x6,x17,x24 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000268c: 0005b203 ld x4,0(x11) + 80002690: 00620c63 beq x4,x6,800026a8 + 80002694: 66c052ef jal x5,80007d00 + 80002698: 80002688 .word 0x80002688 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 800115d2 .word 0x800115d2 + 800026a4: 00000000 .word 0x00000000 + 800026a8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x8000000000000000 + 800026ac: 00053b83 ld x23,0(x10) + 800026b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5555555555555555 + 800026b4: 00053e03 ld x28,0(x10) + 800026b8: 00850513 addi x10,x10,8 + +00000000800026bc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + clmul x14, x23, x28 # perform operation + 800026bc: 0bcb9733 clmul x14,x23,x28 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026c0: 0005b203 ld x4,0(x11) + 800026c4: 00e20c63 beq x4,x14,800026dc + 800026c8: 638052ef jal x5,80007d00 + 800026cc: 800026bc .word 0x800026bc + 800026d0: 00000000 .word 0x00000000 + 800026d4: 80011642 .word 0x80011642 + 800026d8: 00000000 .word 0x00000000 + 800026dc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000000 + 800026e0: 00053d83 ld x27,0(x10) + 800026e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000ffffffff + 800026e8: 00053403 ld x8,0(x10) + 800026ec: 00850513 addi x10,x10,8 + +00000000800026f0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + clmul x30, x27, x8 # perform operation + 800026f0: 0a8d9f33 clmul x30,x27,x8 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026f4: 0005b203 ld x4,0(x11) + 800026f8: 01e20c63 beq x4,x30,80002710 + 800026fc: 604052ef jal x5,80007d00 + 80002700: 800026f0 .word 0x800026f0 + 80002704: 00000000 .word 0x00000000 + 80002708: 800116b2 .word 0x800116b2 + 8000270c: 00000000 .word 0x00000000 + 80002710: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8000000000000000 + 80002714: 00053483 ld x9,0(x10) + 80002718: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 8000271c: 00053a83 ld x21,0(x10) + 80002720: 00850513 addi x10,x10,8 + +0000000080002724 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + clmul x16, x9, x21 # perform operation + 80002724: 0b549833 clmul x16,x9,x21 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002728: 0005b203 ld x4,0(x11) + 8000272c: 01020c63 beq x4,x16,80002744 + 80002730: 5d0052ef jal x5,80007d00 + 80002734: 80002724 .word 0x80002724 + 80002738: 00000000 .word 0x00000000 + 8000273c: 8001171a .word 0x8001171a + 80002740: 00000000 .word 0x00000000 + 80002744: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000000 + 80002748: 00053a83 ld x21,0(x10) + 8000274c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000100000000 + 80002750: 00053883 ld x17,0(x10) + 80002754: 00850513 addi x10,x10,8 + +0000000080002758 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + clmul x25, x21, x17 # perform operation + 80002758: 0b1a9cb3 clmul x25,x21,x17 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 8000275c: 0005b203 ld x4,0(x11) + 80002760: 01920c63 beq x4,x25,80002778 + 80002764: 59c052ef jal x5,80007d00 + 80002768: 80002758 .word 0x80002758 + 8000276c: 00000000 .word 0x00000000 + 80002770: 80011782 .word 0x80011782 + 80002774: 00000000 .word 0x00000000 + 80002778: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000000 + 8000277c: 00053f03 ld x30,0(x10) + 80002780: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000100000001 + 80002784: 00053883 ld x17,0(x10) + 80002788: 00850513 addi x10,x10,8 + +000000008000278c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + clmul x24, x30, x17 # perform operation + 8000278c: 0b1f1c33 clmul x24,x30,x17 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002790: 0005b203 ld x4,0(x11) + 80002794: 01820c63 beq x4,x24,800027ac + 80002798: 568052ef jal x5,80007d00 + 8000279c: 8000278c .word 0x8000278c + 800027a0: 00000000 .word 0x00000000 + 800027a4: 800117eb .word 0x800117eb + 800027a8: 00000000 .word 0x00000000 + 800027ac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x8000000000000001 + 800027b0: 00053c83 ld x25,0(x10) + 800027b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000000 + 800027b8: 00053e83 ld x29,0(x10) + 800027bc: 00850513 addi x10,x10,8 + +00000000800027c0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + clmul x1, x25, x29 # perform operation + 800027c0: 0bdc90b3 clmul x1,x25,x29 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027c4: 0005b203 ld x4,0(x11) + 800027c8: 00120c63 beq x4,x1,800027e0 + 800027cc: 534052ef jal x5,80007d00 + 800027d0: 800027c0 .word 0x800027c0 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 80011854 .word 0x80011854 + 800027dc: 00000000 .word 0x00000000 + 800027e0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x8000000000000001 + 800027e4: 00053b03 ld x22,0(x10) + 800027e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000001 + 800027ec: 00053183 ld x3,0(x10) + 800027f0: 00850513 addi x10,x10,8 + +00000000800027f4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + clmul x24, x22, x3 # perform operation + 800027f4: 0a3b1c33 clmul x24,x22,x3 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f8: 0005b203 ld x4,0(x11) + 800027fc: 01820c63 beq x4,x24,80002814 + 80002800: 500052ef jal x5,80007d00 + 80002804: 800027f4 .word 0x800027f4 + 80002808: 00000000 .word 0x00000000 + 8000280c: 800118b5 .word 0x800118b5 + 80002810: 00000000 .word 0x00000000 + 80002814: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000001 + 80002818: 00053a83 ld x21,0(x10) + 8000281c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 80002820: 00053683 ld x13,0(x10) + 80002824: 00850513 addi x10,x10,8 + +0000000080002828 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + clmul x1, x21, x13 # perform operation + 80002828: 0ada90b3 clmul x1,x21,x13 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 8000282c: 0005b203 ld x4,0(x11) + 80002830: 00120c63 beq x4,x1,80002848 + 80002834: 4cc052ef jal x5,80007d00 + 80002838: 80002828 .word 0x80002828 + 8000283c: 00000000 .word 0x00000000 + 80002840: 80011916 .word 0x80011916 + 80002844: 00000000 .word 0x00000000 + 80002848: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000001 + 8000284c: 00053603 ld x12,0(x10) + 80002850: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000000 + 80002854: 00053103 ld x2,0(x10) + 80002858: 00850513 addi x10,x10,8 + +000000008000285c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + clmul x13, x12, x2 # perform operation + 8000285c: 0a2616b3 clmul x13,x12,x2 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002860: 0005b203 ld x4,0(x11) + 80002864: 00d20c63 beq x4,x13,8000287c + 80002868: 498052ef jal x5,80007d00 + 8000286c: 8000285c .word 0x8000285c + 80002870: 00000000 .word 0x00000000 + 80002874: 80011977 .word 0x80011977 + 80002878: 00000000 .word 0x00000000 + 8000287c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x8000000000000001 + 80002880: 00053c83 ld x25,0(x10) + 80002884: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000001 + 80002888: 00053d03 ld x26,0(x10) + 8000288c: 00850513 addi x10,x10,8 + +0000000080002890 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + clmul x14, x25, x26 # perform operation + 80002890: 0bac9733 clmul x14,x25,x26 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002894: 0005b203 ld x4,0(x11) + 80002898: 00e20c63 beq x4,x14,800028b0 + 8000289c: 464052ef jal x5,80007d00 + 800028a0: 80002890 .word 0x80002890 + 800028a4: 00000000 .word 0x00000000 + 800028a8: 800119e7 .word 0x800119e7 + 800028ac: 00000000 .word 0x00000000 + 800028b0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000001 + 800028b4: 00053e83 ld x29,0(x10) + 800028b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7fffffffffffffff + 800028bc: 00053803 ld x16,0(x10) + 800028c0: 00850513 addi x10,x10,8 + +00000000800028c4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + clmul x14, x29, x16 # perform operation + 800028c4: 0b0e9733 clmul x14,x29,x16 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c8: 0005b203 ld x4,0(x11) + 800028cc: 00e20c63 beq x4,x14,800028e4 + 800028d0: 430052ef jal x5,80007d00 + 800028d4: 800028c4 .word 0x800028c4 + 800028d8: 00000000 .word 0x00000000 + 800028dc: 80011a57 .word 0x80011a57 + 800028e0: 00000000 .word 0x00000000 + 800028e4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8000000000000001 + 800028e8: 00053783 ld x15,0(x10) + 800028ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7ffffffffffffffe + 800028f0: 00053b03 ld x22,0(x10) + 800028f4: 00850513 addi x10,x10,8 + +00000000800028f8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + clmul x16, x15, x22 # perform operation + 800028f8: 0b679833 clmul x16,x15,x22 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028fc: 0005b203 ld x4,0(x11) + 80002900: 01020c63 beq x4,x16,80002918 + 80002904: 3fc052ef jal x5,80007d00 + 80002908: 800028f8 .word 0x800028f8 + 8000290c: 00000000 .word 0x00000000 + 80002910: 80011ac7 .word 0x80011ac7 + 80002914: 00000000 .word 0x00000000 + 80002918: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000001 + 8000291c: 00053683 ld x13,0(x10) + 80002920: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xffffffffffffffff + 80002924: 00053403 ld x8,0(x10) + 80002928: 00850513 addi x10,x10,8 + +000000008000292c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + clmul x21, x13, x8 # perform operation + 8000292c: 0a869ab3 clmul x21,x13,x8 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002930: 0005b203 ld x4,0(x11) + 80002934: 01520c63 beq x4,x21,8000294c + 80002938: 3c8052ef jal x5,80007d00 + 8000293c: 8000292c .word 0x8000292c + 80002940: 00000000 .word 0x00000000 + 80002944: 80011b37 .word 0x80011b37 + 80002948: 00000000 .word 0x00000000 + 8000294c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000001 + 80002950: 00053e83 ld x29,0(x10) + 80002954: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xfffffffffffffffe + 80002958: 00053e03 ld x28,0(x10) + 8000295c: 00850513 addi x10,x10,8 + +0000000080002960 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + clmul x20, x29, x28 # perform operation + 80002960: 0bce9a33 clmul x20,x29,x28 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002964: 0005b203 ld x4,0(x11) + 80002968: 01420c63 beq x4,x20,80002980 + 8000296c: 394052ef jal x5,80007d00 + 80002970: 80002960 .word 0x80002960 + 80002974: 00000000 .word 0x00000000 + 80002978: 80011ba7 .word 0x80011ba7 + 8000297c: 00000000 .word 0x00000000 + 80002980: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000001 + 80002984: 00053e83 ld x29,0(x10) + 80002988: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 8000298c: 00053d83 ld x27,0(x10) + 80002990: 00850513 addi x10,x10,8 + +0000000080002994 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + clmul x9, x29, x27 # perform operation + 80002994: 0bbe94b3 clmul x9,x29,x27 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002998: 0005b203 ld x4,0(x11) + 8000299c: 00920c63 beq x4,x9,800029b4 + 800029a0: 360052ef jal x5,80007d00 + 800029a4: 80002994 .word 0x80002994 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 80011c17 .word 0x80011c17 + 800029b0: 00000000 .word 0x00000000 + 800029b4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x8000000000000001 + 800029b8: 00053903 ld x18,0(x10) + 800029bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 800029c0: 00053b03 ld x22,0(x10) + 800029c4: 00850513 addi x10,x10,8 + +00000000800029c8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x21, x18, x22 # perform operation + 800029c8: 0b691ab3 clmul x21,x18,x22 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029cc: 0005b203 ld x4,0(x11) + 800029d0: 01520c63 beq x4,x21,800029e8 + 800029d4: 32c052ef jal x5,80007d00 + 800029d8: 800029c8 .word 0x800029c8 + 800029dc: 00000000 .word 0x00000000 + 800029e0: 80011c87 .word 0x80011c87 + 800029e4: 00000000 .word 0x00000000 + 800029e8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 800029ec: 00053083 ld x1,0(x10) + 800029f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5555555555555555 + 800029f4: 00053803 ld x16,0(x10) + 800029f8: 00850513 addi x10,x10,8 + +00000000800029fc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + clmul x17, x1, x16 # perform operation + 800029fc: 0b0098b3 clmul x17,x1,x16 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 80002a00: 0005b203 ld x4,0(x11) + 80002a04: 01120c63 beq x4,x17,80002a1c + 80002a08: 2f8052ef jal x5,80007d00 + 80002a0c: 800029fc .word 0x800029fc + 80002a10: 00000000 .word 0x00000000 + 80002a14: 80011cf7 .word 0x80011cf7 + 80002a18: 00000000 .word 0x00000000 + 80002a1c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000001 + 80002a20: 00053603 ld x12,0(x10) + 80002a24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000000ffffffff + 80002a28: 00053303 ld x6,0(x10) + 80002a2c: 00850513 addi x10,x10,8 + +0000000080002a30 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + clmul x17, x12, x6 # perform operation + 80002a30: 0a6618b3 clmul x17,x12,x6 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a34: 0005b203 ld x4,0(x11) + 80002a38: 01120c63 beq x4,x17,80002a50 + 80002a3c: 2c4052ef jal x5,80007d00 + 80002a40: 80002a30 .word 0x80002a30 + 80002a44: 00000000 .word 0x00000000 + 80002a48: 80011d67 .word 0x80011d67 + 80002a4c: 00000000 .word 0x00000000 + 80002a50: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000001 + 80002a54: 00053103 ld x2,0(x10) + 80002a58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000fffffffe + 80002a5c: 00053e03 ld x28,0(x10) + 80002a60: 00850513 addi x10,x10,8 + +0000000080002a64 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + clmul x23, x2, x28 # perform operation + 80002a64: 0bc11bb3 clmul x23,x2,x28 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a68: 0005b203 ld x4,0(x11) + 80002a6c: 01720c63 beq x4,x23,80002a84 + 80002a70: 290052ef jal x5,80007d00 + 80002a74: 80002a64 .word 0x80002a64 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 80011dcf .word 0x80011dcf + 80002a80: 00000000 .word 0x00000000 + 80002a84: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8000000000000001 + 80002a88: 00053783 ld x15,0(x10) + 80002a8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000100000000 + 80002a90: 00053a03 ld x20,0(x10) + 80002a94: 00850513 addi x10,x10,8 + +0000000080002a98 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + clmul x9, x15, x20 # perform operation + 80002a98: 0b4794b3 clmul x9,x15,x20 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a9c: 0005b203 ld x4,0(x11) + 80002aa0: 00920c63 beq x4,x9,80002ab8 + 80002aa4: 25c052ef jal x5,80007d00 + 80002aa8: 80002a98 .word 0x80002a98 + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 80011e37 .word 0x80011e37 + 80002ab4: 00000000 .word 0x00000000 + 80002ab8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8000000000000001 + 80002abc: 00053483 ld x9,0(x10) + 80002ac0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000100000001 + 80002ac4: 00053403 ld x8,0(x10) + 80002ac8: 00850513 addi x10,x10,8 + +0000000080002acc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + clmul x29, x9, x8 # perform operation + 80002acc: 0a849eb3 clmul x29,x9,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ad0: 0005b203 ld x4,0(x11) + 80002ad4: 01d20c63 beq x4,x29,80002aec + 80002ad8: 228052ef jal x5,80007d00 + 80002adc: 80002acc .word 0x80002acc + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 80011ea0 .word 0x80011ea0 + 80002ae8: 00000000 .word 0x00000000 + 80002aec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002af0: 00053d83 ld x27,0(x10) + 80002af4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000000 + 80002af8: 00053983 ld x19,0(x10) + 80002afc: 00850513 addi x10,x10,8 + +0000000080002b00 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + clmul x29, x27, x19 # perform operation + 80002b00: 0b3d9eb3 clmul x29,x27,x19 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002b04: 0005b203 ld x4,0(x11) + 80002b08: 01d20c63 beq x4,x29,80002b20 + 80002b0c: 1f4052ef jal x5,80007d00 + 80002b10: 80002b00 .word 0x80002b00 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 80011f09 .word 0x80011f09 + 80002b1c: 00000000 .word 0x00000000 + 80002b20: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002b24: 00053e83 ld x29,0(x10) + 80002b28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000001 + 80002b2c: 00053883 ld x17,0(x10) + 80002b30: 00850513 addi x10,x10,8 + +0000000080002b34 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + clmul x15, x29, x17 # perform operation + 80002b34: 0b1e97b3 clmul x15,x29,x17 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b38: 0005b203 ld x4,0(x11) + 80002b3c: 00f20c63 beq x4,x15,80002b54 + 80002b40: 1c0052ef jal x5,80007d00 + 80002b44: 80002b34 .word 0x80002b34 + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 80011f6a .word 0x80011f6a + 80002b50: 00000000 .word 0x00000000 + 80002b54: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002b58: 00053083 ld x1,0(x10) + 80002b5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000002 + 80002b60: 00053a03 ld x20,0(x10) + 80002b64: 00850513 addi x10,x10,8 + +0000000080002b68 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + clmul x21, x1, x20 # perform operation + 80002b68: 0b409ab3 clmul x21,x1,x20 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b6c: 0005b203 ld x4,0(x11) + 80002b70: 01520c63 beq x4,x21,80002b88 + 80002b74: 18c052ef jal x5,80007d00 + 80002b78: 80002b68 .word 0x80002b68 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 80011fcb .word 0x80011fcb + 80002b84: 00000000 .word 0x00000000 + 80002b88: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002b8c: 00053c83 ld x25,0(x10) + 80002b90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000000 + 80002b94: 00053d03 ld x26,0(x10) + 80002b98: 00850513 addi x10,x10,8 + +0000000080002b9c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + clmul x9, x25, x26 # perform operation + 80002b9c: 0bac94b3 clmul x9,x25,x26 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002ba0: 0005b203 ld x4,0(x11) + 80002ba4: 00920c63 beq x4,x9,80002bbc + 80002ba8: 158052ef jal x5,80007d00 + 80002bac: 80002b9c .word 0x80002b9c + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 8001202c .word 0x8001202c + 80002bb8: 00000000 .word 0x00000000 + 80002bbc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002bc0: 00053603 ld x12,0(x10) + 80002bc4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x8000000000000001 + 80002bc8: 00053383 ld x7,0(x10) + 80002bcc: 00850513 addi x10,x10,8 + +0000000080002bd0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + clmul x15, x12, x7 # perform operation + 80002bd0: 0a7617b3 clmul x15,x12,x7 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bd4: 0005b203 ld x4,0(x11) + 80002bd8: 00f20c63 beq x4,x15,80002bf0 + 80002bdc: 124052ef jal x5,80007d00 + 80002be0: 80002bd0 .word 0x80002bd0 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 8001209c .word 0x8001209c + 80002bec: 00000000 .word 0x00000000 + 80002bf0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002bf4: 00053783 ld x15,0(x10) + 80002bf8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x7fffffffffffffff + 80002bfc: 00053f03 ld x30,0(x10) + 80002c00: 00850513 addi x10,x10,8 + +0000000080002c04 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + clmul x1, x15, x30 # perform operation + 80002c04: 0be790b3 clmul x1,x15,x30 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c08: 0005b203 ld x4,0(x11) + 80002c0c: 00120c63 beq x4,x1,80002c24 + 80002c10: 0f0052ef jal x5,80007d00 + 80002c14: 80002c04 .word 0x80002c04 + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 8001210c .word 0x8001210c + 80002c20: 00000000 .word 0x00000000 + 80002c24: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002c28: 00053a03 ld x20,0(x10) + 80002c2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffffffffffe + 80002c30: 00053683 ld x13,0(x10) + 80002c34: 00850513 addi x10,x10,8 + +0000000080002c38 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + clmul x2, x20, x13 # perform operation + 80002c38: 0ada1133 clmul x2,x20,x13 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c3c: 0005b203 ld x4,0(x11) + 80002c40: 00220c63 beq x4,x2,80002c58 + 80002c44: 0bc052ef jal x5,80007d00 + 80002c48: 80002c38 .word 0x80002c38 + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 8001217c .word 0x8001217c + 80002c54: 00000000 .word 0x00000000 + 80002c58: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002c5c: 00053183 ld x3,0(x10) + 80002c60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 80002c64: 00053b03 ld x22,0(x10) + 80002c68: 00850513 addi x10,x10,8 + +0000000080002c6c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + clmul x29, x3, x22 # perform operation + 80002c6c: 0b619eb3 clmul x29,x3,x22 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c70: 0005b203 ld x4,0(x11) + 80002c74: 01d20c63 beq x4,x29,80002c8c + 80002c78: 088052ef jal x5,80007d00 + 80002c7c: 80002c6c .word 0x80002c6c + 80002c80: 00000000 .word 0x00000000 + 80002c84: 800121ec .word 0x800121ec + 80002c88: 00000000 .word 0x00000000 + 80002c8c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002c90: 00053483 ld x9,0(x10) + 80002c94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xfffffffffffffffe + 80002c98: 00053803 ld x16,0(x10) + 80002c9c: 00850513 addi x10,x10,8 + +0000000080002ca0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + clmul x20, x9, x16 # perform operation + 80002ca0: 0b049a33 clmul x20,x9,x16 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002ca4: 0005b203 ld x4,0(x11) + 80002ca8: 01420c63 beq x4,x20,80002cc0 + 80002cac: 054052ef jal x5,80007d00 + 80002cb0: 80002ca0 .word 0x80002ca0 + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 8001225c .word 0x8001225c + 80002cbc: 00000000 .word 0x00000000 + 80002cc0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002cc4: 00053d03 ld x26,0(x10) + 80002cc8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002ccc: 00053c03 ld x24,0(x10) + 80002cd0: 00850513 addi x10,x10,8 + +0000000080002cd4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + clmul x27, x26, x24 # perform operation + 80002cd4: 0b8d1db3 clmul x27,x26,x24 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd8: 0005b203 ld x4,0(x11) + 80002cdc: 01b20c63 beq x4,x27,80002cf4 + 80002ce0: 020052ef jal x5,80007d00 + 80002ce4: 80002cd4 .word 0x80002cd4 + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 800122cc .word 0x800122cc + 80002cf0: 00000000 .word 0x00000000 + 80002cf4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002cf8: 00053e83 ld x29,0(x10) + 80002cfc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80002d00: 00053e03 ld x28,0(x10) + 80002d04: 00850513 addi x10,x10,8 + +0000000080002d08 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x27, x29, x28 # perform operation + 80002d08: 0bce9db3 clmul x27,x29,x28 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d0c: 0005b203 ld x4,0(x11) + 80002d10: 01b20c63 beq x4,x27,80002d28 + 80002d14: 7ed042ef jal x5,80007d00 + 80002d18: 80002d08 .word 0x80002d08 + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 8001233c .word 0x8001233c + 80002d24: 00000000 .word 0x00000000 + 80002d28: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002d2c: 00053d03 ld x26,0(x10) + 80002d30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5555555555555555 + 80002d34: 00053f83 ld x31,0(x10) + 80002d38: 00850513 addi x10,x10,8 + +0000000080002d3c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + clmul x25, x26, x31 # perform operation + 80002d3c: 0bfd1cb3 clmul x25,x26,x31 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d40: 0005b203 ld x4,0(x11) + 80002d44: 01920c63 beq x4,x25,80002d5c + 80002d48: 7b9042ef jal x5,80007d00 + 80002d4c: 80002d3c .word 0x80002d3c + 80002d50: 00000000 .word 0x00000000 + 80002d54: 800123ac .word 0x800123ac + 80002d58: 00000000 .word 0x00000000 + 80002d5c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002d60: 00053e83 ld x29,0(x10) + 80002d64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000ffffffff + 80002d68: 00053d83 ld x27,0(x10) + 80002d6c: 00850513 addi x10,x10,8 + +0000000080002d70 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + clmul x13, x29, x27 # perform operation + 80002d70: 0bbe96b3 clmul x13,x29,x27 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d74: 0005b203 ld x4,0(x11) + 80002d78: 00d20c63 beq x4,x13,80002d90 + 80002d7c: 785042ef jal x5,80007d00 + 80002d80: 80002d70 .word 0x80002d70 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 8001241c .word 0x8001241c + 80002d8c: 00000000 .word 0x00000000 + 80002d90: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002d94: 00053e83 ld x29,0(x10) + 80002d98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000fffffffe + 80002d9c: 00053183 ld x3,0(x10) + 80002da0: 00850513 addi x10,x10,8 + +0000000080002da4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + clmul x18, x29, x3 # perform operation + 80002da4: 0a3e9933 clmul x18,x29,x3 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da8: 0005b203 ld x4,0(x11) + 80002dac: 01220c63 beq x4,x18,80002dc4 + 80002db0: 751042ef jal x5,80007d00 + 80002db4: 80002da4 .word 0x80002da4 + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 80012484 .word 0x80012484 + 80002dc0: 00000000 .word 0x00000000 + 80002dc4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002dc8: 00053c03 ld x24,0(x10) + 80002dcc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000000 + 80002dd0: 00053303 ld x6,0(x10) + 80002dd4: 00850513 addi x10,x10,8 + +0000000080002dd8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + clmul x14, x24, x6 # perform operation + 80002dd8: 0a6c1733 clmul x14,x24,x6 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002ddc: 0005b203 ld x4,0(x11) + 80002de0: 00e20c63 beq x4,x14,80002df8 + 80002de4: 71d042ef jal x5,80007d00 + 80002de8: 80002dd8 .word 0x80002dd8 + 80002dec: 00000000 .word 0x00000000 + 80002df0: 800124ec .word 0x800124ec + 80002df4: 00000000 .word 0x00000000 + 80002df8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002dfc: 00053d83 ld x27,0(x10) + 80002e00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80002e04: 00053a83 ld x21,0(x10) + 80002e08: 00850513 addi x10,x10,8 + +0000000080002e0c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + clmul x12, x27, x21 # perform operation + 80002e0c: 0b5d9633 clmul x12,x27,x21 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e10: 0005b203 ld x4,0(x11) + 80002e14: 00c20c63 beq x4,x12,80002e2c + 80002e18: 6e9042ef jal x5,80007d00 + 80002e1c: 80002e0c .word 0x80002e0c + 80002e20: 00000000 .word 0x00000000 + 80002e24: 80012555 .word 0x80012555 + 80002e28: 00000000 .word 0x00000000 + 80002e2c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002e30: 00053683 ld x13,0(x10) + 80002e34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000000 + 80002e38: 00053e83 ld x29,0(x10) + 80002e3c: 00850513 addi x10,x10,8 + +0000000080002e40 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + clmul x7, x13, x29 # perform operation + 80002e40: 0bd693b3 clmul x7,x13,x29 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e44: 0005b203 ld x4,0(x11) + 80002e48: 00720c63 beq x4,x7,80002e60 + 80002e4c: 6b5042ef jal x5,80007d00 + 80002e50: 80002e40 .word 0x80002e40 + 80002e54: 00000000 .word 0x00000000 + 80002e58: 800125be .word 0x800125be + 80002e5c: 00000000 .word 0x00000000 + 80002e60: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80002e64: 00053403 ld x8,0(x10) + 80002e68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000001 + 80002e6c: 00053103 ld x2,0(x10) + 80002e70: 00850513 addi x10,x10,8 + +0000000080002e74 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + clmul x31, x8, x2 # perform operation + 80002e74: 0a241fb3 clmul x31,x8,x2 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e78: 0005b203 ld x4,0(x11) + 80002e7c: 01f20c63 beq x4,x31,80002e94 + 80002e80: 681042ef jal x5,80007d00 + 80002e84: 80002e74 .word 0x80002e74 + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 8001261f .word 0x8001261f + 80002e90: 00000000 .word 0x00000000 + 80002e94: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80002e98: 00053403 ld x8,0(x10) + 80002e9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000002 + 80002ea0: 00053a03 ld x20,0(x10) + 80002ea4: 00850513 addi x10,x10,8 + +0000000080002ea8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + clmul x12, x8, x20 # perform operation + 80002ea8: 0b441633 clmul x12,x8,x20 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002eac: 0005b203 ld x4,0(x11) + 80002eb0: 00c20c63 beq x4,x12,80002ec8 + 80002eb4: 64d042ef jal x5,80007d00 + 80002eb8: 80002ea8 .word 0x80002ea8 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 80012680 .word 0x80012680 + 80002ec4: 00000000 .word 0x00000000 + 80002ec8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002ecc: 00053883 ld x17,0(x10) + 80002ed0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8000000000000000 + 80002ed4: 00053783 ld x15,0(x10) + 80002ed8: 00850513 addi x10,x10,8 + +0000000080002edc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + clmul x22, x17, x15 # perform operation + 80002edc: 0af89b33 clmul x22,x17,x15 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ee0: 0005b203 ld x4,0(x11) + 80002ee4: 01620c63 beq x4,x22,80002efc + 80002ee8: 619042ef jal x5,80007d00 + 80002eec: 80002edc .word 0x80002edc + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 800126e1 .word 0x800126e1 + 80002ef8: 00000000 .word 0x00000000 + 80002efc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002f00: 00053683 ld x13,0(x10) + 80002f04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x8000000000000001 + 80002f08: 00053e83 ld x29,0(x10) + 80002f0c: 00850513 addi x10,x10,8 + +0000000080002f10 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + clmul x14, x13, x29 # perform operation + 80002f10: 0bd69733 clmul x14,x13,x29 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f14: 0005b203 ld x4,0(x11) + 80002f18: 00e20c63 beq x4,x14,80002f30 + 80002f1c: 5e5042ef jal x5,80007d00 + 80002f20: 80002f10 .word 0x80002f10 + 80002f24: 00000000 .word 0x00000000 + 80002f28: 80012751 .word 0x80012751 + 80002f2c: 00000000 .word 0x00000000 + 80002f30: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002f34: 00053b03 ld x22,0(x10) + 80002f38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffffffffffff + 80002f3c: 00053d83 ld x27,0(x10) + 80002f40: 00850513 addi x10,x10,8 + +0000000080002f44 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + clmul x29, x22, x27 # perform operation + 80002f44: 0bbb1eb3 clmul x29,x22,x27 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f48: 0005b203 ld x4,0(x11) + 80002f4c: 01d20c63 beq x4,x29,80002f64 + 80002f50: 5b1042ef jal x5,80007d00 + 80002f54: 80002f44 .word 0x80002f44 + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 800127c1 .word 0x800127c1 + 80002f60: 00000000 .word 0x00000000 + 80002f64: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002f68: 00053303 ld x6,0(x10) + 80002f6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80002f70: 00053103 ld x2,0(x10) + 80002f74: 00850513 addi x10,x10,8 + +0000000080002f78 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + clmul x30, x6, x2 # perform operation + 80002f78: 0a231f33 clmul x30,x6,x2 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f7c: 0005b203 ld x4,0(x11) + 80002f80: 01e20c63 beq x4,x30,80002f98 + 80002f84: 57d042ef jal x5,80007d00 + 80002f88: 80002f78 .word 0x80002f78 + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 80012831 .word 0x80012831 + 80002f94: 00000000 .word 0x00000000 + 80002f98: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7ffffffffffffffe + 80002f9c: 00053803 ld x16,0(x10) + 80002fa0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xffffffffffffffff + 80002fa4: 00053703 ld x14,0(x10) + 80002fa8: 00850513 addi x10,x10,8 + +0000000080002fac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + clmul x15, x16, x14 # perform operation + 80002fac: 0ae817b3 clmul x15,x16,x14 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fb0: 0005b203 ld x4,0(x11) + 80002fb4: 00f20c63 beq x4,x15,80002fcc + 80002fb8: 549042ef jal x5,80007d00 + 80002fbc: 80002fac .word 0x80002fac + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 800128a1 .word 0x800128a1 + 80002fc8: 00000000 .word 0x00000000 + 80002fcc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80002fd0: 00053083 ld x1,0(x10) + 80002fd4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffffffffffe + 80002fd8: 00053883 ld x17,0(x10) + 80002fdc: 00850513 addi x10,x10,8 + +0000000080002fe0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + clmul x27, x1, x17 # perform operation + 80002fe0: 0b109db3 clmul x27,x1,x17 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fe4: 0005b203 ld x4,0(x11) + 80002fe8: 01b20c63 beq x4,x27,80003000 + 80002fec: 515042ef jal x5,80007d00 + 80002ff0: 80002fe0 .word 0x80002fe0 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 80012911 .word 0x80012911 + 80002ffc: 00000000 .word 0x00000000 + 80003000: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80003004: 00053183 ld x3,0(x10) + 80003008: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 8000300c: 00053e03 ld x28,0(x10) + 80003010: 00850513 addi x10,x10,8 + +0000000080003014 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + clmul x23, x3, x28 # perform operation + 80003014: 0bc19bb3 clmul x23,x3,x28 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003018: 0005b203 ld x4,0(x11) + 8000301c: 01720c63 beq x4,x23,80003034 + 80003020: 4e1042ef jal x5,80007d00 + 80003024: 80003014 .word 0x80003014 + 80003028: 00000000 .word 0x00000000 + 8000302c: 80012981 .word 0x80012981 + 80003030: 00000000 .word 0x00000000 + 80003034: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80003038: 00053883 ld x17,0(x10) + 8000303c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80003040: 00053c03 ld x24,0(x10) + 80003044: 00850513 addi x10,x10,8 + +0000000080003048 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x9, x17, x24 # perform operation + 80003048: 0b8894b3 clmul x9,x17,x24 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000304c: 0005b203 ld x4,0(x11) + 80003050: 00920c63 beq x4,x9,80003068 + 80003054: 4ad042ef jal x5,80007d00 + 80003058: 80003048 .word 0x80003048 + 8000305c: 00000000 .word 0x00000000 + 80003060: 800129f1 .word 0x800129f1 + 80003064: 00000000 .word 0x00000000 + 80003068: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 8000306c: 00053703 ld x14,0(x10) + 80003070: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5555555555555555 + 80003074: 00053b83 ld x23,0(x10) + 80003078: 00850513 addi x10,x10,8 + +000000008000307c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + clmul x15, x14, x23 # perform operation + 8000307c: 0b7717b3 clmul x15,x14,x23 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003080: 0005b203 ld x4,0(x11) + 80003084: 00f20c63 beq x4,x15,8000309c + 80003088: 479042ef jal x5,80007d00 + 8000308c: 8000307c .word 0x8000307c + 80003090: 00000000 .word 0x00000000 + 80003094: 80012a61 .word 0x80012a61 + 80003098: 00000000 .word 0x00000000 + 8000309c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7ffffffffffffffe + 800030a0: 00053803 ld x16,0(x10) + 800030a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000000ffffffff + 800030a8: 00053083 ld x1,0(x10) + 800030ac: 00850513 addi x10,x10,8 + +00000000800030b0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + clmul x29, x16, x1 # perform operation + 800030b0: 0a181eb3 clmul x29,x16,x1 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030b4: 0005b203 ld x4,0(x11) + 800030b8: 01d20c63 beq x4,x29,800030d0 + 800030bc: 445042ef jal x5,80007d00 + 800030c0: 800030b0 .word 0x800030b0 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 80012ad1 .word 0x80012ad1 + 800030cc: 00000000 .word 0x00000000 + 800030d0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7ffffffffffffffe + 800030d4: 00053803 ld x16,0(x10) + 800030d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 800030dc: 00053483 ld x9,0(x10) + 800030e0: 00850513 addi x10,x10,8 + +00000000800030e4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + clmul x20, x16, x9 # perform operation + 800030e4: 0a981a33 clmul x20,x16,x9 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e8: 0005b203 ld x4,0(x11) + 800030ec: 01420c63 beq x4,x20,80003104 + 800030f0: 411042ef jal x5,80007d00 + 800030f4: 800030e4 .word 0x800030e4 + 800030f8: 00000000 .word 0x00000000 + 800030fc: 80012b39 .word 0x80012b39 + 80003100: 00000000 .word 0x00000000 + 80003104: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003108: 00053a03 ld x20,0(x10) + 8000310c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000000 + 80003110: 00053603 ld x12,0(x10) + 80003114: 00850513 addi x10,x10,8 + +0000000080003118 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + clmul x14, x20, x12 # perform operation + 80003118: 0aca1733 clmul x14,x20,x12 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 8000311c: 0005b203 ld x4,0(x11) + 80003120: 00e20c63 beq x4,x14,80003138 + 80003124: 3dd042ef jal x5,80007d00 + 80003128: 80003118 .word 0x80003118 + 8000312c: 00000000 .word 0x00000000 + 80003130: 80012ba1 .word 0x80012ba1 + 80003134: 00000000 .word 0x00000000 + 80003138: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7ffffffffffffffe + 8000313c: 00053e03 ld x28,0(x10) + 80003140: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80003144: 00053a83 ld x21,0(x10) + 80003148: 00850513 addi x10,x10,8 + +000000008000314c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + clmul x12, x28, x21 # perform operation + 8000314c: 0b5e1633 clmul x12,x28,x21 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003150: 0005b203 ld x4,0(x11) + 80003154: 00c20c63 beq x4,x12,8000316c + 80003158: 3a9042ef jal x5,80007d00 + 8000315c: 8000314c .word 0x8000314c + 80003160: 00000000 .word 0x00000000 + 80003164: 80012c0a .word 0x80012c0a + 80003168: 00000000 .word 0x00000000 + 8000316c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xffffffffffffffff + 80003170: 00053783 ld x15,0(x10) + 80003174: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000000 + 80003178: 00053303 ld x6,0(x10) + 8000317c: 00850513 addi x10,x10,8 + +0000000080003180 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + clmul x25, x15, x6 # perform operation + 80003180: 0a679cb3 clmul x25,x15,x6 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003184: 0005b203 ld x4,0(x11) + 80003188: 01920c63 beq x4,x25,800031a0 + 8000318c: 375042ef jal x5,80007d00 + 80003190: 80003180 .word 0x80003180 + 80003194: 00000000 .word 0x00000000 + 80003198: 80012c73 .word 0x80012c73 + 8000319c: 00000000 .word 0x00000000 + 800031a0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffffffffffff + 800031a4: 00053b83 ld x23,0(x10) + 800031a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000001 + 800031ac: 00053d03 ld x26,0(x10) + 800031b0: 00850513 addi x10,x10,8 + +00000000800031b4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + clmul x1, x23, x26 # perform operation + 800031b4: 0bab90b3 clmul x1,x23,x26 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b8: 0005b203 ld x4,0(x11) + 800031bc: 00120c63 beq x4,x1,800031d4 + 800031c0: 341042ef jal x5,80007d00 + 800031c4: 800031b4 .word 0x800031b4 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 80012cd4 .word 0x80012cd4 + 800031d0: 00000000 .word 0x00000000 + 800031d4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xffffffffffffffff + 800031d8: 00053403 ld x8,0(x10) + 800031dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000000000002 + 800031e0: 00053083 ld x1,0(x10) + 800031e4: 00850513 addi x10,x10,8 + +00000000800031e8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + clmul x18, x8, x1 # perform operation + 800031e8: 0a141933 clmul x18,x8,x1 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031ec: 0005b203 ld x4,0(x11) + 800031f0: 01220c63 beq x4,x18,80003208 + 800031f4: 30d042ef jal x5,80007d00 + 800031f8: 800031e8 .word 0x800031e8 + 800031fc: 00000000 .word 0x00000000 + 80003200: 80012d35 .word 0x80012d35 + 80003204: 00000000 .word 0x00000000 + 80003208: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xffffffffffffffff + 8000320c: 00053a83 ld x21,0(x10) + 80003210: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 80003214: 00053f83 ld x31,0(x10) + 80003218: 00850513 addi x10,x10,8 + +000000008000321c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + clmul x12, x21, x31 # perform operation + 8000321c: 0bfa9633 clmul x12,x21,x31 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003220: 0005b203 ld x4,0(x11) + 80003224: 00c20c63 beq x4,x12,8000323c + 80003228: 2d9042ef jal x5,80007d00 + 8000322c: 8000321c .word 0x8000321c + 80003230: 00000000 .word 0x00000000 + 80003234: 80012d96 .word 0x80012d96 + 80003238: 00000000 .word 0x00000000 + 8000323c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xffffffffffffffff + 80003240: 00053783 ld x15,0(x10) + 80003244: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x8000000000000001 + 80003248: 00053603 ld x12,0(x10) + 8000324c: 00850513 addi x10,x10,8 + +0000000080003250 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + clmul x25, x15, x12 # perform operation + 80003250: 0ac79cb3 clmul x25,x15,x12 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003254: 0005b203 ld x4,0(x11) + 80003258: 01920c63 beq x4,x25,80003270 + 8000325c: 2a5042ef jal x5,80007d00 + 80003260: 80003250 .word 0x80003250 + 80003264: 00000000 .word 0x00000000 + 80003268: 80012e06 .word 0x80012e06 + 8000326c: 00000000 .word 0x00000000 + 80003270: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xffffffffffffffff + 80003274: 00053383 ld x7,0(x10) + 80003278: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7fffffffffffffff + 8000327c: 00053d03 ld x26,0(x10) + 80003280: 00850513 addi x10,x10,8 + +0000000080003284 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + clmul x30, x7, x26 # perform operation + 80003284: 0ba39f33 clmul x30,x7,x26 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003288: 0005b203 ld x4,0(x11) + 8000328c: 01e20c63 beq x4,x30,800032a4 + 80003290: 271042ef jal x5,80007d00 + 80003294: 80003284 .word 0x80003284 + 80003298: 00000000 .word 0x00000000 + 8000329c: 80012e76 .word 0x80012e76 + 800032a0: 00000000 .word 0x00000000 + 800032a4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xffffffffffffffff + 800032a8: 00053c03 ld x24,0(x10) + 800032ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800032b0: 00053883 ld x17,0(x10) + 800032b4: 00850513 addi x10,x10,8 + +00000000800032b8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + clmul x13, x24, x17 # perform operation + 800032b8: 0b1c16b3 clmul x13,x24,x17 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032bc: 0005b203 ld x4,0(x11) + 800032c0: 00d20c63 beq x4,x13,800032d8 + 800032c4: 23d042ef jal x5,80007d00 + 800032c8: 800032b8 .word 0x800032b8 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 80012ee6 .word 0x80012ee6 + 800032d4: 00000000 .word 0x00000000 + 800032d8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xffffffffffffffff + 800032dc: 00053c83 ld x25,0(x10) + 800032e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xffffffffffffffff + 800032e4: 00053803 ld x16,0(x10) + 800032e8: 00850513 addi x10,x10,8 + +00000000800032ec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + clmul x20, x25, x16 # perform operation + 800032ec: 0b0c9a33 clmul x20,x25,x16 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032f0: 0005b203 ld x4,0(x11) + 800032f4: 01420c63 beq x4,x20,8000330c + 800032f8: 209042ef jal x5,80007d00 + 800032fc: 800032ec .word 0x800032ec + 80003300: 00000000 .word 0x00000000 + 80003304: 80012f56 .word 0x80012f56 + 80003308: 00000000 .word 0x00000000 + 8000330c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xffffffffffffffff + 80003310: 00053303 ld x6,0(x10) + 80003314: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfffffffffffffffe + 80003318: 00053f83 ld x31,0(x10) + 8000331c: 00850513 addi x10,x10,8 + +0000000080003320 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + clmul x9, x6, x31 # perform operation + 80003320: 0bf314b3 clmul x9,x6,x31 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003324: 0005b203 ld x4,0(x11) + 80003328: 00920c63 beq x4,x9,80003340 + 8000332c: 1d5042ef jal x5,80007d00 + 80003330: 80003320 .word 0x80003320 + 80003334: 00000000 .word 0x00000000 + 80003338: 80012fc6 .word 0x80012fc6 + 8000333c: 00000000 .word 0x00000000 + 80003340: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffffffffffff + 80003344: 00053e83 ld x29,0(x10) + 80003348: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 8000334c: 00053403 ld x8,0(x10) + 80003350: 00850513 addi x10,x10,8 + +0000000080003354 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + clmul x12, x29, x8 # perform operation + 80003354: 0a8e9633 clmul x12,x29,x8 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003358: 0005b203 ld x4,0(x11) + 8000335c: 00c20c63 beq x4,x12,80003374 + 80003360: 1a1042ef jal x5,80007d00 + 80003364: 80003354 .word 0x80003354 + 80003368: 00000000 .word 0x00000000 + 8000336c: 80013036 .word 0x80013036 + 80003370: 00000000 .word 0x00000000 + 80003374: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xffffffffffffffff + 80003378: 00053383 ld x7,0(x10) + 8000337c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80003380: 00053683 ld x13,0(x10) + 80003384: 00850513 addi x10,x10,8 + +0000000080003388 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x9, x7, x13 # perform operation + 80003388: 0ad394b3 clmul x9,x7,x13 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000338c: 0005b203 ld x4,0(x11) + 80003390: 00920c63 beq x4,x9,800033a8 + 80003394: 16d042ef jal x5,80007d00 + 80003398: 80003388 .word 0x80003388 + 8000339c: 00000000 .word 0x00000000 + 800033a0: 800130a6 .word 0x800130a6 + 800033a4: 00000000 .word 0x00000000 + 800033a8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffffffffffff + 800033ac: 00053483 ld x9,0(x10) + 800033b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5555555555555555 + 800033b4: 00053c83 ld x25,0(x10) + 800033b8: 00850513 addi x10,x10,8 + +00000000800033bc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + clmul x17, x9, x25 # perform operation + 800033bc: 0b9498b3 clmul x17,x9,x25 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033c0: 0005b203 ld x4,0(x11) + 800033c4: 01120c63 beq x4,x17,800033dc + 800033c8: 139042ef jal x5,80007d00 + 800033cc: 800033bc .word 0x800033bc + 800033d0: 00000000 .word 0x00000000 + 800033d4: 80013116 .word 0x80013116 + 800033d8: 00000000 .word 0x00000000 + 800033dc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffffffffffff + 800033e0: 00053b83 ld x23,0(x10) + 800033e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000ffffffff + 800033e8: 00053703 ld x14,0(x10) + 800033ec: 00850513 addi x10,x10,8 + +00000000800033f0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + clmul x12, x23, x14 # perform operation + 800033f0: 0aeb9633 clmul x12,x23,x14 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033f4: 0005b203 ld x4,0(x11) + 800033f8: 00c20c63 beq x4,x12,80003410 + 800033fc: 105042ef jal x5,80007d00 + 80003400: 800033f0 .word 0x800033f0 + 80003404: 00000000 .word 0x00000000 + 80003408: 80013186 .word 0x80013186 + 8000340c: 00000000 .word 0x00000000 + 80003410: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xffffffffffffffff + 80003414: 00053983 ld x19,0(x10) + 80003418: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000fffffffe + 8000341c: 00053e83 ld x29,0(x10) + 80003420: 00850513 addi x10,x10,8 + +0000000080003424 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + clmul x2, x19, x29 # perform operation + 80003424: 0bd99133 clmul x2,x19,x29 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003428: 0005b203 ld x4,0(x11) + 8000342c: 00220c63 beq x4,x2,80003444 + 80003430: 0d1042ef jal x5,80007d00 + 80003434: 80003424 .word 0x80003424 + 80003438: 00000000 .word 0x00000000 + 8000343c: 800131ee .word 0x800131ee + 80003440: 00000000 .word 0x00000000 + 80003444: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffffffffffff + 80003448: 00053483 ld x9,0(x10) + 8000344c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000000 + 80003450: 00053603 ld x12,0(x10) + 80003454: 00850513 addi x10,x10,8 + +0000000080003458 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + clmul x23, x9, x12 # perform operation + 80003458: 0ac49bb3 clmul x23,x9,x12 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 8000345c: 0005b203 ld x4,0(x11) + 80003460: 01720c63 beq x4,x23,80003478 + 80003464: 09d042ef jal x5,80007d00 + 80003468: 80003458 .word 0x80003458 + 8000346c: 00000000 .word 0x00000000 + 80003470: 80013256 .word 0x80013256 + 80003474: 00000000 .word 0x00000000 + 80003478: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xffffffffffffffff + 8000347c: 00053603 ld x12,0(x10) + 80003480: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000001 + 80003484: 00053b83 ld x23,0(x10) + 80003488: 00850513 addi x10,x10,8 + +000000008000348c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + clmul x26, x12, x23 # perform operation + 8000348c: 0b761d33 clmul x26,x12,x23 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003490: 0005b203 ld x4,0(x11) + 80003494: 01a20c63 beq x4,x26,800034ac + 80003498: 069042ef jal x5,80007d00 + 8000349c: 8000348c .word 0x8000348c + 800034a0: 00000000 .word 0x00000000 + 800034a4: 800132bf .word 0x800132bf + 800034a8: 00000000 .word 0x00000000 + 800034ac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xfffffffffffffffe + 800034b0: 00053d03 ld x26,0(x10) + 800034b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000000 + 800034b8: 00053383 ld x7,0(x10) + 800034bc: 00850513 addi x10,x10,8 + +00000000800034c0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + clmul x8, x26, x7 # perform operation + 800034c0: 0a7d1433 clmul x8,x26,x7 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034c4: 0005b203 ld x4,0(x11) + 800034c8: 00820c63 beq x4,x8,800034e0 + 800034cc: 035042ef jal x5,80007d00 + 800034d0: 800034c0 .word 0x800034c0 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 80013328 .word 0x80013328 + 800034dc: 00000000 .word 0x00000000 + 800034e0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffffffffffe + 800034e4: 00053483 ld x9,0(x10) + 800034e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000001 + 800034ec: 00053983 ld x19,0(x10) + 800034f0: 00850513 addi x10,x10,8 + +00000000800034f4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + clmul x18, x9, x19 # perform operation + 800034f4: 0b349933 clmul x18,x9,x19 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f8: 0005b203 ld x4,0(x11) + 800034fc: 01220c63 beq x4,x18,80003514 + 80003500: 001042ef jal x5,80007d00 + 80003504: 800034f4 .word 0x800034f4 + 80003508: 00000000 .word 0x00000000 + 8000350c: 80013389 .word 0x80013389 + 80003510: 00000000 .word 0x00000000 + 80003514: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfffffffffffffffe + 80003518: 00053103 ld x2,0(x10) + 8000351c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000002 + 80003520: 00053d03 ld x26,0(x10) + 80003524: 00850513 addi x10,x10,8 + +0000000080003528 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + clmul x13, x2, x26 # perform operation + 80003528: 0ba116b3 clmul x13,x2,x26 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 8000352c: 0005b203 ld x4,0(x11) + 80003530: 00d20c63 beq x4,x13,80003548 + 80003534: 7cc042ef jal x5,80007d00 + 80003538: 80003528 .word 0x80003528 + 8000353c: 00000000 .word 0x00000000 + 80003540: 800133ea .word 0x800133ea + 80003544: 00000000 .word 0x00000000 + 80003548: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xfffffffffffffffe + 8000354c: 00053e03 ld x28,0(x10) + 80003550: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x8000000000000000 + 80003554: 00053a83 ld x21,0(x10) + 80003558: 00850513 addi x10,x10,8 + +000000008000355c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + clmul x6, x28, x21 # perform operation + 8000355c: 0b5e1333 clmul x6,x28,x21 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003560: 0005b203 ld x4,0(x11) + 80003564: 00620c63 beq x4,x6,8000357c + 80003568: 798042ef jal x5,80007d00 + 8000356c: 8000355c .word 0x8000355c + 80003570: 00000000 .word 0x00000000 + 80003574: 8001344b .word 0x8001344b + 80003578: 00000000 .word 0x00000000 + 8000357c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003580: 00053683 ld x13,0(x10) + 80003584: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x8000000000000001 + 80003588: 00053c83 ld x25,0(x10) + 8000358c: 00850513 addi x10,x10,8 + +0000000080003590 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + clmul x22, x13, x25 # perform operation + 80003590: 0b969b33 clmul x22,x13,x25 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003594: 0005b203 ld x4,0(x11) + 80003598: 01620c63 beq x4,x22,800035b0 + 8000359c: 764042ef jal x5,80007d00 + 800035a0: 80003590 .word 0x80003590 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 800134bb .word 0x800134bb + 800035ac: 00000000 .word 0x00000000 + 800035b0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xfffffffffffffffe + 800035b4: 00053603 ld x12,0(x10) + 800035b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7fffffffffffffff + 800035bc: 00053703 ld x14,0(x10) + 800035c0: 00850513 addi x10,x10,8 + +00000000800035c4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + clmul x25, x12, x14 # perform operation + 800035c4: 0ae61cb3 clmul x25,x12,x14 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c8: 0005b203 ld x4,0(x11) + 800035cc: 01920c63 beq x4,x25,800035e4 + 800035d0: 730042ef jal x5,80007d00 + 800035d4: 800035c4 .word 0x800035c4 + 800035d8: 00000000 .word 0x00000000 + 800035dc: 8001352b .word 0x8001352b + 800035e0: 00000000 .word 0x00000000 + 800035e4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800035e8: 00053c03 ld x24,0(x10) + 800035ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffffffffffe + 800035f0: 00053103 ld x2,0(x10) + 800035f4: 00850513 addi x10,x10,8 + +00000000800035f8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + clmul x16, x24, x2 # perform operation + 800035f8: 0a2c1833 clmul x16,x24,x2 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035fc: 0005b203 ld x4,0(x11) + 80003600: 01020c63 beq x4,x16,80003618 + 80003604: 6fc042ef jal x5,80007d00 + 80003608: 800035f8 .word 0x800035f8 + 8000360c: 00000000 .word 0x00000000 + 80003610: 8001359b .word 0x8001359b + 80003614: 00000000 .word 0x00000000 + 80003618: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfffffffffffffffe + 8000361c: 00053e83 ld x29,0(x10) + 80003620: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xffffffffffffffff + 80003624: 00053a83 ld x21,0(x10) + 80003628: 00850513 addi x10,x10,8 + +000000008000362c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + clmul x13, x29, x21 # perform operation + 8000362c: 0b5e96b3 clmul x13,x29,x21 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003630: 0005b203 ld x4,0(x11) + 80003634: 00d20c63 beq x4,x13,8000364c + 80003638: 6c8042ef jal x5,80007d00 + 8000363c: 8000362c .word 0x8000362c + 80003640: 00000000 .word 0x00000000 + 80003644: 8001360b .word 0x8001360b + 80003648: 00000000 .word 0x00000000 + 8000364c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffffffffffe + 80003650: 00053883 ld x17,0(x10) + 80003654: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xfffffffffffffffe + 80003658: 00053103 ld x2,0(x10) + 8000365c: 00850513 addi x10,x10,8 + +0000000080003660 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + clmul x8, x17, x2 # perform operation + 80003660: 0a289433 clmul x8,x17,x2 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003664: 0005b203 ld x4,0(x11) + 80003668: 00820c63 beq x4,x8,80003680 + 8000366c: 694042ef jal x5,80007d00 + 80003670: 80003660 .word 0x80003660 + 80003674: 00000000 .word 0x00000000 + 80003678: 8001367b .word 0x8001367b + 8000367c: 00000000 .word 0x00000000 + 80003680: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003684: 00053d83 ld x27,0(x10) + 80003688: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 8000368c: 00053b03 ld x22,0(x10) + 80003690: 00850513 addi x10,x10,8 + +0000000080003694 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + clmul x14, x27, x22 # perform operation + 80003694: 0b6d9733 clmul x14,x27,x22 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003698: 0005b203 ld x4,0(x11) + 8000369c: 00e20c63 beq x4,x14,800036b4 + 800036a0: 660042ef jal x5,80007d00 + 800036a4: 80003694 .word 0x80003694 + 800036a8: 00000000 .word 0x00000000 + 800036ac: 800136eb .word 0x800136eb + 800036b0: 00000000 .word 0x00000000 + 800036b4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800036b8: 00053c03 ld x24,0(x10) + 800036bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 800036c0: 00053683 ld x13,0(x10) + 800036c4: 00850513 addi x10,x10,8 + +00000000800036c8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x17, x24, x13 # perform operation + 800036c8: 0adc18b3 clmul x17,x24,x13 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036cc: 0005b203 ld x4,0(x11) + 800036d0: 01120c63 beq x4,x17,800036e8 + 800036d4: 62c042ef jal x5,80007d00 + 800036d8: 800036c8 .word 0x800036c8 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 8001375b .word 0x8001375b + 800036e4: 00000000 .word 0x00000000 + 800036e8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xfffffffffffffffe + 800036ec: 00053903 ld x18,0(x10) + 800036f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5555555555555555 + 800036f4: 00053103 ld x2,0(x10) + 800036f8: 00850513 addi x10,x10,8 + +00000000800036fc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + clmul x8, x18, x2 # perform operation + 800036fc: 0a291433 clmul x8,x18,x2 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 80003700: 0005b203 ld x4,0(x11) + 80003704: 00820c63 beq x4,x8,8000371c + 80003708: 5f8042ef jal x5,80007d00 + 8000370c: 800036fc .word 0x800036fc + 80003710: 00000000 .word 0x00000000 + 80003714: 800137cb .word 0x800137cb + 80003718: 00000000 .word 0x00000000 + 8000371c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xfffffffffffffffe + 80003720: 00053783 ld x15,0(x10) + 80003724: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000ffffffff + 80003728: 00053e03 ld x28,0(x10) + 8000372c: 00850513 addi x10,x10,8 + +0000000080003730 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + clmul x12, x15, x28 # perform operation + 80003730: 0bc79633 clmul x12,x15,x28 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003734: 0005b203 ld x4,0(x11) + 80003738: 00c20c63 beq x4,x12,80003750 + 8000373c: 5c4042ef jal x5,80007d00 + 80003740: 80003730 .word 0x80003730 + 80003744: 00000000 .word 0x00000000 + 80003748: 8001383b .word 0x8001383b + 8000374c: 00000000 .word 0x00000000 + 80003750: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003754: 00053483 ld x9,0(x10) + 80003758: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000fffffffe + 8000375c: 00053903 ld x18,0(x10) + 80003760: 00850513 addi x10,x10,8 + +0000000080003764 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + clmul x15, x9, x18 # perform operation + 80003764: 0b2497b3 clmul x15,x9,x18 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003768: 0005b203 ld x4,0(x11) + 8000376c: 00f20c63 beq x4,x15,80003784 + 80003770: 590042ef jal x5,80007d00 + 80003774: 80003764 .word 0x80003764 + 80003778: 00000000 .word 0x00000000 + 8000377c: 800138a3 .word 0x800138a3 + 80003780: 00000000 .word 0x00000000 + 80003784: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003788: 00053703 ld x14,0(x10) + 8000378c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000100000000 + 80003790: 00053903 ld x18,0(x10) + 80003794: 00850513 addi x10,x10,8 + +0000000080003798 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + clmul x8, x14, x18 # perform operation + 80003798: 0b271433 clmul x8,x14,x18 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 8000379c: 0005b203 ld x4,0(x11) + 800037a0: 00820c63 beq x4,x8,800037b8 + 800037a4: 55c042ef jal x5,80007d00 + 800037a8: 80003798 .word 0x80003798 + 800037ac: 00000000 .word 0x00000000 + 800037b0: 8001390b .word 0x8001390b + 800037b4: 00000000 .word 0x00000000 + 800037b8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800037bc: 00053c03 ld x24,0(x10) + 800037c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000001 + 800037c4: 00053b03 ld x22,0(x10) + 800037c8: 00850513 addi x10,x10,8 + +00000000800037cc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + clmul x7, x24, x22 # perform operation + 800037cc: 0b6c13b3 clmul x7,x24,x22 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037d0: 0005b203 ld x4,0(x11) + 800037d4: 00720c63 beq x4,x7,800037ec + 800037d8: 528042ef jal x5,80007d00 + 800037dc: 800037cc .word 0x800037cc + 800037e0: 00000000 .word 0x00000000 + 800037e4: 80013974 .word 0x80013974 + 800037e8: 00000000 .word 0x00000000 + 800037ec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 800037f0: 00053a83 ld x21,0(x10) + 800037f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000000 + 800037f8: 00053b83 ld x23,0(x10) + 800037fc: 00850513 addi x10,x10,8 + +0000000080003800 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + clmul x12, x21, x23 # perform operation + 80003800: 0b7a9633 clmul x12,x21,x23 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 80003804: 0005b203 ld x4,0(x11) + 80003808: 00c20c63 beq x4,x12,80003820 + 8000380c: 4f4042ef jal x5,80007d00 + 80003810: 80003800 .word 0x80003800 + 80003814: 00000000 .word 0x00000000 + 80003818: 800139dd .word 0x800139dd + 8000381c: 00000000 .word 0x00000000 + 80003820: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003824: 00053c83 ld x25,0(x10) + 80003828: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000001 + 8000382c: 00053783 ld x15,0(x10) + 80003830: 00850513 addi x10,x10,8 + +0000000080003834 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + clmul x6, x25, x15 # perform operation + 80003834: 0afc9333 clmul x6,x25,x15 + # Check if x6 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x6, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003838: 0005b203 ld x4,0(x11) + 8000383c: 00620c63 beq x4,x6,80003854 + 80003840: 4c0042ef jal x5,80007d00 + 80003844: 80003834 .word 0x80003834 + 80003848: 00000000 .word 0x00000000 + 8000384c: 80013a3e .word 0x80013a3e + 80003850: 00000000 .word 0x00000000 + 80003854: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003858: 00053f03 ld x30,0(x10) + 8000385c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000002 + 80003860: 00053783 ld x15,0(x10) + 80003864: 00850513 addi x10,x10,8 + +0000000080003868 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + clmul x17, x30, x15 # perform operation + 80003868: 0aff18b3 clmul x17,x30,x15 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 8000386c: 0005b203 ld x4,0(x11) + 80003870: 01120c63 beq x4,x17,80003888 + 80003874: 48c042ef jal x5,80007d00 + 80003878: 80003868 .word 0x80003868 + 8000387c: 00000000 .word 0x00000000 + 80003880: 80013a9f .word 0x80013a9f + 80003884: 00000000 .word 0x00000000 + 80003888: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 8000388c: 00053d83 ld x27,0(x10) + 80003890: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x8000000000000000 + 80003894: 00053b83 ld x23,0(x10) + 80003898: 00850513 addi x10,x10,8 + +000000008000389c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + clmul x30, x27, x23 # perform operation + 8000389c: 0b7d9f33 clmul x30,x27,x23 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 800038a0: 0005b203 ld x4,0(x11) + 800038a4: 01e20c63 beq x4,x30,800038bc + 800038a8: 458042ef jal x5,80007d00 + 800038ac: 8000389c .word 0x8000389c + 800038b0: 00000000 .word 0x00000000 + 800038b4: 80013b00 .word 0x80013b00 + 800038b8: 00000000 .word 0x00000000 + 800038bc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800038c0: 00053e03 ld x28,0(x10) + 800038c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x8000000000000001 + 800038c8: 00053a83 ld x21,0(x10) + 800038cc: 00850513 addi x10,x10,8 + +00000000800038d0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + clmul x23, x28, x21 # perform operation + 800038d0: 0b5e1bb3 clmul x23,x28,x21 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038d4: 0005b203 ld x4,0(x11) + 800038d8: 01720c63 beq x4,x23,800038f0 + 800038dc: 424042ef jal x5,80007d00 + 800038e0: 800038d0 .word 0x800038d0 + 800038e4: 00000000 .word 0x00000000 + 800038e8: 80013b70 .word 0x80013b70 + 800038ec: 00000000 .word 0x00000000 + 800038f0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800038f4: 00053603 ld x12,0(x10) + 800038f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7fffffffffffffff + 800038fc: 00053783 ld x15,0(x10) + 80003900: 00850513 addi x10,x10,8 + +0000000080003904 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + clmul x19, x12, x15 # perform operation + 80003904: 0af619b3 clmul x19,x12,x15 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003908: 0005b203 ld x4,0(x11) + 8000390c: 01320c63 beq x4,x19,80003924 + 80003910: 3f0042ef jal x5,80007d00 + 80003914: 80003904 .word 0x80003904 + 80003918: 00000000 .word 0x00000000 + 8000391c: 80013be0 .word 0x80013be0 + 80003920: 00000000 .word 0x00000000 + 80003924: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80003928: 00053783 ld x15,0(x10) + 8000392c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7ffffffffffffffe + 80003930: 00053b03 ld x22,0(x10) + 80003934: 00850513 addi x10,x10,8 + +0000000080003938 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + clmul x21, x15, x22 # perform operation + 80003938: 0b679ab3 clmul x21,x15,x22 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 8000393c: 0005b203 ld x4,0(x11) + 80003940: 01520c63 beq x4,x21,80003958 + 80003944: 3bc042ef jal x5,80007d00 + 80003948: 80003938 .word 0x80003938 + 8000394c: 00000000 .word 0x00000000 + 80003950: 80013c50 .word 0x80013c50 + 80003954: 00000000 .word 0x00000000 + 80003958: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 8000395c: 00053903 ld x18,0(x10) + 80003960: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xffffffffffffffff + 80003964: 00053783 ld x15,0(x10) + 80003968: 00850513 addi x10,x10,8 + +000000008000396c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + clmul x13, x18, x15 # perform operation + 8000396c: 0af916b3 clmul x13,x18,x15 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003970: 0005b203 ld x4,0(x11) + 80003974: 00d20c63 beq x4,x13,8000398c + 80003978: 388042ef jal x5,80007d00 + 8000397c: 8000396c .word 0x8000396c + 80003980: 00000000 .word 0x00000000 + 80003984: 80013cc0 .word 0x80013cc0 + 80003988: 00000000 .word 0x00000000 + 8000398c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003990: 00053883 ld x17,0(x10) + 80003994: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfffffffffffffffe + 80003998: 00053303 ld x6,0(x10) + 8000399c: 00850513 addi x10,x10,8 + +00000000800039a0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + clmul x16, x17, x6 # perform operation + 800039a0: 0a689833 clmul x16,x17,x6 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 800039a4: 0005b203 ld x4,0(x11) + 800039a8: 01020c63 beq x4,x16,800039c0 + 800039ac: 354042ef jal x5,80007d00 + 800039b0: 800039a0 .word 0x800039a0 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 80013d30 .word 0x80013d30 + 800039bc: 00000000 .word 0x00000000 + 800039c0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 800039c4: 00053c03 ld x24,0(x10) + 800039c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 800039cc: 00053d03 ld x26,0(x10) + 800039d0: 00850513 addi x10,x10,8 + +00000000800039d4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + clmul x31, x24, x26 # perform operation + 800039d4: 0bac1fb3 clmul x31,x24,x26 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d8: 0005b203 ld x4,0(x11) + 800039dc: 01f20c63 beq x4,x31,800039f4 + 800039e0: 320042ef jal x5,80007d00 + 800039e4: 800039d4 .word 0x800039d4 + 800039e8: 00000000 .word 0x00000000 + 800039ec: 80013da0 .word 0x80013da0 + 800039f0: 00000000 .word 0x00000000 + 800039f4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 800039f8: 00053403 ld x8,0(x10) + 800039fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80003a00: 00053e03 ld x28,0(x10) + 80003a04: 00850513 addi x10,x10,8 + +0000000080003a08 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x17, x8, x28 # perform operation + 80003a08: 0bc418b3 clmul x17,x8,x28 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a0c: 0005b203 ld x4,0(x11) + 80003a10: 01120c63 beq x4,x17,80003a28 + 80003a14: 2ec042ef jal x5,80007d00 + 80003a18: 80003a08 .word 0x80003a08 + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 80013e10 .word 0x80013e10 + 80003a24: 00000000 .word 0x00000000 + 80003a28: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003a2c: 00053b83 ld x23,0(x10) + 80003a30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5555555555555555 + 80003a34: 00053703 ld x14,0(x10) + 80003a38: 00850513 addi x10,x10,8 + +0000000080003a3c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + clmul x24, x23, x14 # perform operation + 80003a3c: 0aeb9c33 clmul x24,x23,x14 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a40: 0005b203 ld x4,0(x11) + 80003a44: 01820c63 beq x4,x24,80003a5c + 80003a48: 2b8042ef jal x5,80007d00 + 80003a4c: 80003a3c .word 0x80003a3c + 80003a50: 00000000 .word 0x00000000 + 80003a54: 80013e80 .word 0x80013e80 + 80003a58: 00000000 .word 0x00000000 + 80003a5c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80003a60: 00053803 ld x16,0(x10) + 80003a64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x00000000ffffffff + 80003a68: 00053403 ld x8,0(x10) + 80003a6c: 00850513 addi x10,x10,8 + +0000000080003a70 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + clmul x3, x16, x8 # perform operation + 80003a70: 0a8811b3 clmul x3,x16,x8 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a74: 0005b203 ld x4,0(x11) + 80003a78: 00320c63 beq x4,x3,80003a90 + 80003a7c: 284042ef jal x5,80007d00 + 80003a80: 80003a70 .word 0x80003a70 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 80013ef0 .word 0x80013ef0 + 80003a8c: 00000000 .word 0x00000000 + 80003a90: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003a94: 00053183 ld x3,0(x10) + 80003a98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000fffffffe + 80003a9c: 00053903 ld x18,0(x10) + 80003aa0: 00850513 addi x10,x10,8 + +0000000080003aa4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + clmul x26, x3, x18 # perform operation + 80003aa4: 0b219d33 clmul x26,x3,x18 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa8: 0005b203 ld x4,0(x11) + 80003aac: 01a20c63 beq x4,x26,80003ac4 + 80003ab0: 250042ef jal x5,80007d00 + 80003ab4: 80003aa4 .word 0x80003aa4 + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 80013f58 .word 0x80013f58 + 80003ac0: 00000000 .word 0x00000000 + 80003ac4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 80003ac8: 00053403 ld x8,0(x10) + 80003acc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000000 + 80003ad0: 00053c83 ld x25,0(x10) + 80003ad4: 00850513 addi x10,x10,8 + +0000000080003ad8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + clmul x2, x8, x25 # perform operation + 80003ad8: 0b941133 clmul x2,x8,x25 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003adc: 0005b203 ld x4,0(x11) + 80003ae0: 00220c63 beq x4,x2,80003af8 + 80003ae4: 21c042ef jal x5,80007d00 + 80003ae8: 80003ad8 .word 0x80003ad8 + 80003aec: 00000000 .word 0x00000000 + 80003af0: 80013fc0 .word 0x80013fc0 + 80003af4: 00000000 .word 0x00000000 + 80003af8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003afc: 00053c03 ld x24,0(x10) + 80003b00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000100000001 + 80003b04: 00053683 ld x13,0(x10) + 80003b08: 00850513 addi x10,x10,8 + +0000000080003b0c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + clmul x27, x24, x13 # perform operation + 80003b0c: 0adc1db3 clmul x27,x24,x13 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b10: 0005b203 ld x4,0(x11) + 80003b14: 01b20c63 beq x4,x27,80003b2c + 80003b18: 1e8042ef jal x5,80007d00 + 80003b1c: 80003b0c .word 0x80003b0c + 80003b20: 00000000 .word 0x00000000 + 80003b24: 80014029 .word 0x80014029 + 80003b28: 00000000 .word 0x00000000 + 80003b2c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003b30: 00053903 ld x18,0(x10) + 80003b34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000000000000 + 80003b38: 00053083 ld x1,0(x10) + 80003b3c: 00850513 addi x10,x10,8 + +0000000080003b40 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + clmul x8, x18, x1 # perform operation + 80003b40: 0a191433 clmul x8,x18,x1 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b44: 0005b203 ld x4,0(x11) + 80003b48: 00820c63 beq x4,x8,80003b60 + 80003b4c: 1b4042ef jal x5,80007d00 + 80003b50: 80003b40 .word 0x80003b40 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 80014092 .word 0x80014092 + 80003b5c: 00000000 .word 0x00000000 + 80003b60: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003b64: 00053183 ld x3,0(x10) + 80003b68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000001 + 80003b6c: 00053703 ld x14,0(x10) + 80003b70: 00850513 addi x10,x10,8 + +0000000080003b74 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + clmul x18, x3, x14 # perform operation + 80003b74: 0ae19933 clmul x18,x3,x14 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b78: 0005b203 ld x4,0(x11) + 80003b7c: 01220c63 beq x4,x18,80003b94 + 80003b80: 180042ef jal x5,80007d00 + 80003b84: 80003b74 .word 0x80003b74 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 800140f3 .word 0x800140f3 + 80003b90: 00000000 .word 0x00000000 + 80003b94: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003b98: 00053f03 ld x30,0(x10) + 80003b9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000002 + 80003ba0: 00053f83 ld x31,0(x10) + 80003ba4: 00850513 addi x10,x10,8 + +0000000080003ba8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + clmul x17, x30, x31 # perform operation + 80003ba8: 0bff18b3 clmul x17,x30,x31 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003bac: 0005b203 ld x4,0(x11) + 80003bb0: 01120c63 beq x4,x17,80003bc8 + 80003bb4: 14c042ef jal x5,80007d00 + 80003bb8: 80003ba8 .word 0x80003ba8 + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 80014154 .word 0x80014154 + 80003bc4: 00000000 .word 0x00000000 + 80003bc8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003bcc: 00053e03 ld x28,0(x10) + 80003bd0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000000 + 80003bd4: 00053d03 ld x26,0(x10) + 80003bd8: 00850513 addi x10,x10,8 + +0000000080003bdc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + clmul x20, x28, x26 # perform operation + 80003bdc: 0bae1a33 clmul x20,x28,x26 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003be0: 0005b203 ld x4,0(x11) + 80003be4: 01420c63 beq x4,x20,80003bfc + 80003be8: 118042ef jal x5,80007d00 + 80003bec: 80003bdc .word 0x80003bdc + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 800141b5 .word 0x800141b5 + 80003bf8: 00000000 .word 0x00000000 + 80003bfc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003c00: 00053083 ld x1,0(x10) + 80003c04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000001 + 80003c08: 00053b03 ld x22,0(x10) + 80003c0c: 00850513 addi x10,x10,8 + +0000000080003c10 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + clmul x14, x1, x22 # perform operation + 80003c10: 0b609733 clmul x14,x1,x22 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c14: 0005b203 ld x4,0(x11) + 80003c18: 00e20c63 beq x4,x14,80003c30 + 80003c1c: 0e4042ef jal x5,80007d00 + 80003c20: 80003c10 .word 0x80003c10 + 80003c24: 00000000 .word 0x00000000 + 80003c28: 80014225 .word 0x80014225 + 80003c2c: 00000000 .word 0x00000000 + 80003c30: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003c34: 00053883 ld x17,0(x10) + 80003c38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7fffffffffffffff + 80003c3c: 00053783 ld x15,0(x10) + 80003c40: 00850513 addi x10,x10,8 + +0000000080003c44 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + clmul x31, x17, x15 # perform operation + 80003c44: 0af89fb3 clmul x31,x17,x15 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c48: 0005b203 ld x4,0(x11) + 80003c4c: 01f20c63 beq x4,x31,80003c64 + 80003c50: 0b0042ef jal x5,80007d00 + 80003c54: 80003c44 .word 0x80003c44 + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 80014295 .word 0x80014295 + 80003c60: 00000000 .word 0x00000000 + 80003c64: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003c68: 00053a83 ld x21,0(x10) + 80003c6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffffffffffe + 80003c70: 00053683 ld x13,0(x10) + 80003c74: 00850513 addi x10,x10,8 + +0000000080003c78 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + clmul x20, x21, x13 # perform operation + 80003c78: 0ada9a33 clmul x20,x21,x13 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c7c: 0005b203 ld x4,0(x11) + 80003c80: 01420c63 beq x4,x20,80003c98 + 80003c84: 07c042ef jal x5,80007d00 + 80003c88: 80003c78 .word 0x80003c78 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 80014305 .word 0x80014305 + 80003c94: 00000000 .word 0x00000000 + 80003c98: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003c9c: 00053103 ld x2,0(x10) + 80003ca0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80003ca4: 00053c03 ld x24,0(x10) + 80003ca8: 00850513 addi x10,x10,8 + +0000000080003cac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + clmul x25, x2, x24 # perform operation + 80003cac: 0b811cb3 clmul x25,x2,x24 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003cb0: 0005b203 ld x4,0(x11) + 80003cb4: 01920c63 beq x4,x25,80003ccc + 80003cb8: 048042ef jal x5,80007d00 + 80003cbc: 80003cac .word 0x80003cac + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 80014375 .word 0x80014375 + 80003cc8: 00000000 .word 0x00000000 + 80003ccc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003cd0: 00053703 ld x14,0(x10) + 80003cd4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xfffffffffffffffe + 80003cd8: 00053383 ld x7,0(x10) + 80003cdc: 00850513 addi x10,x10,8 + +0000000080003ce0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + clmul x18, x14, x7 # perform operation + 80003ce0: 0a771933 clmul x18,x14,x7 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003ce4: 0005b203 ld x4,0(x11) + 80003ce8: 01220c63 beq x4,x18,80003d00 + 80003cec: 014042ef jal x5,80007d00 + 80003cf0: 80003ce0 .word 0x80003ce0 + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 800143e5 .word 0x800143e5 + 80003cfc: 00000000 .word 0x00000000 + 80003d00: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003d04: 00053b03 ld x22,0(x10) + 80003d08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 80003d0c: 00053e03 ld x28,0(x10) + 80003d10: 00850513 addi x10,x10,8 + +0000000080003d14 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + clmul x18, x22, x28 # perform operation + 80003d14: 0bcb1933 clmul x18,x22,x28 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d18: 0005b203 ld x4,0(x11) + 80003d1c: 01220c63 beq x4,x18,80003d34 + 80003d20: 7e1032ef jal x5,80007d00 + 80003d24: 80003d14 .word 0x80003d14 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 80014455 .word 0x80014455 + 80003d30: 00000000 .word 0x00000000 + 80003d34: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003d38: 00053e03 ld x28,0(x10) + 80003d3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 80003d40: 00053383 ld x7,0(x10) + 80003d44: 00850513 addi x10,x10,8 + +0000000080003d48 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x27, x28, x7 # perform operation + 80003d48: 0a7e1db3 clmul x27,x28,x7 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d4c: 0005b203 ld x4,0(x11) + 80003d50: 01b20c63 beq x4,x27,80003d68 + 80003d54: 7ad032ef jal x5,80007d00 + 80003d58: 80003d48 .word 0x80003d48 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 800144c5 .word 0x800144c5 + 80003d64: 00000000 .word 0x00000000 + 80003d68: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003d6c: 00053483 ld x9,0(x10) + 80003d70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5555555555555555 + 80003d74: 00053b03 ld x22,0(x10) + 80003d78: 00850513 addi x10,x10,8 + +0000000080003d7c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + clmul x24, x9, x22 # perform operation + 80003d7c: 0b649c33 clmul x24,x9,x22 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d80: 0005b203 ld x4,0(x11) + 80003d84: 01820c63 beq x4,x24,80003d9c + 80003d88: 779032ef jal x5,80007d00 + 80003d8c: 80003d7c .word 0x80003d7c + 80003d90: 00000000 .word 0x00000000 + 80003d94: 80014535 .word 0x80014535 + 80003d98: 00000000 .word 0x00000000 + 80003d9c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003da0: 00053703 ld x14,0(x10) + 80003da4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000ffffffff + 80003da8: 00053a83 ld x21,0(x10) + 80003dac: 00850513 addi x10,x10,8 + +0000000080003db0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + clmul x22, x14, x21 # perform operation + 80003db0: 0b571b33 clmul x22,x14,x21 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003db4: 0005b203 ld x4,0(x11) + 80003db8: 01620c63 beq x4,x22,80003dd0 + 80003dbc: 745032ef jal x5,80007d00 + 80003dc0: 80003db0 .word 0x80003db0 + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 800145a5 .word 0x800145a5 + 80003dcc: 00000000 .word 0x00000000 + 80003dd0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003dd4: 00053f83 ld x31,0(x10) + 80003dd8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000fffffffe + 80003ddc: 00053183 ld x3,0(x10) + 80003de0: 00850513 addi x10,x10,8 + +0000000080003de4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + clmul x13, x31, x3 # perform operation + 80003de4: 0a3f96b3 clmul x13,x31,x3 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de8: 0005b203 ld x4,0(x11) + 80003dec: 00d20c63 beq x4,x13,80003e04 + 80003df0: 711032ef jal x5,80007d00 + 80003df4: 80003de4 .word 0x80003de4 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 8001460d .word 0x8001460d + 80003e00: 00000000 .word 0x00000000 + 80003e04: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003e08: 00053703 ld x14,0(x10) + 80003e0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000000 + 80003e10: 00053603 ld x12,0(x10) + 80003e14: 00850513 addi x10,x10,8 + +0000000080003e18 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + clmul x19, x14, x12 # perform operation + 80003e18: 0ac719b3 clmul x19,x14,x12 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e1c: 0005b203 ld x4,0(x11) + 80003e20: 01320c63 beq x4,x19,80003e38 + 80003e24: 6dd032ef jal x5,80007d00 + 80003e28: 80003e18 .word 0x80003e18 + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 80014675 .word 0x80014675 + 80003e34: 00000000 .word 0x00000000 + 80003e38: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003e3c: 00053183 ld x3,0(x10) + 80003e40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000100000001 + 80003e44: 00053703 ld x14,0(x10) + 80003e48: 00850513 addi x10,x10,8 + +0000000080003e4c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + clmul x21, x3, x14 # perform operation + 80003e4c: 0ae19ab3 clmul x21,x3,x14 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e50: 0005b203 ld x4,0(x11) + 80003e54: 01520c63 beq x4,x21,80003e6c + 80003e58: 6a9032ef jal x5,80007d00 + 80003e5c: 80003e4c .word 0x80003e4c + 80003e60: 00000000 .word 0x00000000 + 80003e64: 800146de .word 0x800146de + 80003e68: 00000000 .word 0x00000000 + 80003e6c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5555555555555555 + 80003e70: 00053883 ld x17,0(x10) + 80003e74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000000 + 80003e78: 00053e83 ld x29,0(x10) + 80003e7c: 00850513 addi x10,x10,8 + +0000000080003e80 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + clmul x28, x17, x29 # perform operation + 80003e80: 0bd89e33 clmul x28,x17,x29 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e84: 0005b203 ld x4,0(x11) + 80003e88: 01c20c63 beq x4,x28,80003ea0 + 80003e8c: 675032ef jal x5,80007d00 + 80003e90: 80003e80 .word 0x80003e80 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 80014747 .word 0x80014747 + 80003e9c: 00000000 .word 0x00000000 + 80003ea0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5555555555555555 + 80003ea4: 00053f03 ld x30,0(x10) + 80003ea8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000001 + 80003eac: 00053b03 ld x22,0(x10) + 80003eb0: 00850513 addi x10,x10,8 + +0000000080003eb4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + clmul x20, x30, x22 # perform operation + 80003eb4: 0b6f1a33 clmul x20,x30,x22 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb8: 0005b203 ld x4,0(x11) + 80003ebc: 01420c63 beq x4,x20,80003ed4 + 80003ec0: 641032ef jal x5,80007d00 + 80003ec4: 80003eb4 .word 0x80003eb4 + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 800147a8 .word 0x800147a8 + 80003ed0: 00000000 .word 0x00000000 + 80003ed4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5555555555555555 + 80003ed8: 00053603 ld x12,0(x10) + 80003edc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000000000002 + 80003ee0: 00053403 ld x8,0(x10) + 80003ee4: 00850513 addi x10,x10,8 + +0000000080003ee8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + clmul x24, x12, x8 # perform operation + 80003ee8: 0a861c33 clmul x24,x12,x8 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003eec: 0005b203 ld x4,0(x11) + 80003ef0: 01820c63 beq x4,x24,80003f08 + 80003ef4: 60d032ef jal x5,80007d00 + 80003ef8: 80003ee8 .word 0x80003ee8 + 80003efc: 00000000 .word 0x00000000 + 80003f00: 80014809 .word 0x80014809 + 80003f04: 00000000 .word 0x00000000 + 80003f08: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5555555555555555 + 80003f0c: 00053f03 ld x30,0(x10) + 80003f10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000000 + 80003f14: 00053103 ld x2,0(x10) + 80003f18: 00850513 addi x10,x10,8 + +0000000080003f1c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + clmul x9, x30, x2 # perform operation + 80003f1c: 0a2f14b3 clmul x9,x30,x2 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f20: 0005b203 ld x4,0(x11) + 80003f24: 00920c63 beq x4,x9,80003f3c + 80003f28: 5d9032ef jal x5,80007d00 + 80003f2c: 80003f1c .word 0x80003f1c + 80003f30: 00000000 .word 0x00000000 + 80003f34: 8001486a .word 0x8001486a + 80003f38: 00000000 .word 0x00000000 + 80003f3c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5555555555555555 + 80003f40: 00053c83 ld x25,0(x10) + 80003f44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000001 + 80003f48: 00053103 ld x2,0(x10) + 80003f4c: 00850513 addi x10,x10,8 + +0000000080003f50 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + clmul x26, x25, x2 # perform operation + 80003f50: 0a2c9d33 clmul x26,x25,x2 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f54: 0005b203 ld x4,0(x11) + 80003f58: 01a20c63 beq x4,x26,80003f70 + 80003f5c: 5a5032ef jal x5,80007d00 + 80003f60: 80003f50 .word 0x80003f50 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 800148da .word 0x800148da + 80003f6c: 00000000 .word 0x00000000 + 80003f70: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5555555555555555 + 80003f74: 00053183 ld x3,0(x10) + 80003f78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x7fffffffffffffff + 80003f7c: 00053403 ld x8,0(x10) + 80003f80: 00850513 addi x10,x10,8 + +0000000080003f84 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + clmul x29, x3, x8 # perform operation + 80003f84: 0a819eb3 clmul x29,x3,x8 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f88: 0005b203 ld x4,0(x11) + 80003f8c: 01d20c63 beq x4,x29,80003fa4 + 80003f90: 571032ef jal x5,80007d00 + 80003f94: 80003f84 .word 0x80003f84 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 8001494a .word 0x8001494a + 80003fa0: 00000000 .word 0x00000000 + 80003fa4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5555555555555555 + 80003fa8: 00053a83 ld x21,0(x10) + 80003fac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7ffffffffffffffe + 80003fb0: 00053383 ld x7,0(x10) + 80003fb4: 00850513 addi x10,x10,8 + +0000000080003fb8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + clmul x23, x21, x7 # perform operation + 80003fb8: 0a7a9bb3 clmul x23,x21,x7 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fbc: 0005b203 ld x4,0(x11) + 80003fc0: 01720c63 beq x4,x23,80003fd8 + 80003fc4: 53d032ef jal x5,80007d00 + 80003fc8: 80003fb8 .word 0x80003fb8 + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 800149ba .word 0x800149ba + 80003fd4: 00000000 .word 0x00000000 + 80003fd8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x5555555555555555 + 80003fdc: 00053983 ld x19,0(x10) + 80003fe0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xffffffffffffffff + 80003fe4: 00053703 ld x14,0(x10) + 80003fe8: 00850513 addi x10,x10,8 + +0000000080003fec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + clmul x3, x19, x14 # perform operation + 80003fec: 0ae991b3 clmul x3,x19,x14 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003ff0: 0005b203 ld x4,0(x11) + 80003ff4: 00320c63 beq x4,x3,8000400c + 80003ff8: 509032ef jal x5,80007d00 + 80003ffc: 80003fec .word 0x80003fec + 80004000: 00000000 .word 0x00000000 + 80004004: 80014a2a .word 0x80014a2a + 80004008: 00000000 .word 0x00000000 + 8000400c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5555555555555555 + 80004010: 00053403 ld x8,0(x10) + 80004014: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffffffffffe + 80004018: 00053983 ld x19,0(x10) + 8000401c: 00850513 addi x10,x10,8 + +0000000080004020 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + clmul x13, x8, x19 # perform operation + 80004020: 0b3416b3 clmul x13,x8,x19 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004024: 0005b203 ld x4,0(x11) + 80004028: 00d20c63 beq x4,x13,80004040 + 8000402c: 4d5032ef jal x5,80007d00 + 80004030: 80004020 .word 0x80004020 + 80004034: 00000000 .word 0x00000000 + 80004038: 80014a9a .word 0x80014a9a + 8000403c: 00000000 .word 0x00000000 + 80004040: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5555555555555555 + 80004044: 00053183 ld x3,0(x10) + 80004048: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 8000404c: 00053c83 ld x25,0(x10) + 80004050: 00850513 addi x10,x10,8 + +0000000080004054 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + clmul x21, x3, x25 # perform operation + 80004054: 0b919ab3 clmul x21,x3,x25 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004058: 0005b203 ld x4,0(x11) + 8000405c: 01520c63 beq x4,x21,80004074 + 80004060: 4a1032ef jal x5,80007d00 + 80004064: 80004054 .word 0x80004054 + 80004068: 00000000 .word 0x00000000 + 8000406c: 80014b0a .word 0x80014b0a + 80004070: 00000000 .word 0x00000000 + 80004074: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5555555555555555 + 80004078: 00053b83 ld x23,0(x10) + 8000407c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80004080: 00053c03 ld x24,0(x10) + 80004084: 00850513 addi x10,x10,8 + +0000000080004088 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x15, x23, x24 # perform operation + 80004088: 0b8b97b3 clmul x15,x23,x24 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000408c: 0005b203 ld x4,0(x11) + 80004090: 00f20c63 beq x4,x15,800040a8 + 80004094: 46d032ef jal x5,80007d00 + 80004098: 80004088 .word 0x80004088 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 80014b7a .word 0x80014b7a + 800040a4: 00000000 .word 0x00000000 + 800040a8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x5555555555555555 + 800040ac: 00053403 ld x8,0(x10) + 800040b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5555555555555555 + 800040b4: 00053983 ld x19,0(x10) + 800040b8: 00850513 addi x10,x10,8 + +00000000800040bc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + clmul x9, x8, x19 # perform operation + 800040bc: 0b3414b3 clmul x9,x8,x19 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040c0: 0005b203 ld x4,0(x11) + 800040c4: 00920c63 beq x4,x9,800040dc + 800040c8: 439032ef jal x5,80007d00 + 800040cc: 800040bc .word 0x800040bc + 800040d0: 00000000 .word 0x00000000 + 800040d4: 80014bea .word 0x80014bea + 800040d8: 00000000 .word 0x00000000 + 800040dc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 800040e0: 00053b03 ld x22,0(x10) + 800040e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000ffffffff + 800040e8: 00053a83 ld x21,0(x10) + 800040ec: 00850513 addi x10,x10,8 + +00000000800040f0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + clmul x8, x22, x21 # perform operation + 800040f0: 0b5b1433 clmul x8,x22,x21 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040f4: 0005b203 ld x4,0(x11) + 800040f8: 00820c63 beq x4,x8,80004110 + 800040fc: 405032ef jal x5,80007d00 + 80004100: 800040f0 .word 0x800040f0 + 80004104: 00000000 .word 0x00000000 + 80004108: 80014c5a .word 0x80014c5a + 8000410c: 00000000 .word 0x00000000 + 80004110: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80004114: 00053b03 ld x22,0(x10) + 80004118: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000fffffffe + 8000411c: 00053983 ld x19,0(x10) + 80004120: 00850513 addi x10,x10,8 + +0000000080004124 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + clmul x28, x22, x19 # perform operation + 80004124: 0b3b1e33 clmul x28,x22,x19 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004128: 0005b203 ld x4,0(x11) + 8000412c: 01c20c63 beq x4,x28,80004144 + 80004130: 3d1032ef jal x5,80007d00 + 80004134: 80004124 .word 0x80004124 + 80004138: 00000000 .word 0x00000000 + 8000413c: 80014cc2 .word 0x80014cc2 + 80004140: 00000000 .word 0x00000000 + 80004144: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5555555555555555 + 80004148: 00053083 ld x1,0(x10) + 8000414c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000100000000 + 80004150: 00053403 ld x8,0(x10) + 80004154: 00850513 addi x10,x10,8 + +0000000080004158 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + clmul x27, x1, x8 # perform operation + 80004158: 0a809db3 clmul x27,x1,x8 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 8000415c: 0005b203 ld x4,0(x11) + 80004160: 01b20c63 beq x4,x27,80004178 + 80004164: 39d032ef jal x5,80007d00 + 80004168: 80004158 .word 0x80004158 + 8000416c: 00000000 .word 0x00000000 + 80004170: 80014d2a .word 0x80014d2a + 80004174: 00000000 .word 0x00000000 + 80004178: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5555555555555555 + 8000417c: 00053803 ld x16,0(x10) + 80004180: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000100000001 + 80004184: 00053d03 ld x26,0(x10) + 80004188: 00850513 addi x10,x10,8 + +000000008000418c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + clmul x28, x16, x26 # perform operation + 8000418c: 0ba81e33 clmul x28,x16,x26 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004190: 0005b203 ld x4,0(x11) + 80004194: 01c20c63 beq x4,x28,800041ac + 80004198: 369032ef jal x5,80007d00 + 8000419c: 8000418c .word 0x8000418c + 800041a0: 00000000 .word 0x00000000 + 800041a4: 80014d93 .word 0x80014d93 + 800041a8: 00000000 .word 0x00000000 + 800041ac: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000ffffffff + 800041b0: 00053e83 ld x29,0(x10) + 800041b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x0000000000000000 + 800041b8: 00053403 ld x8,0(x10) + 800041bc: 00850513 addi x10,x10,8 + +00000000800041c0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + clmul x14, x29, x8 # perform operation + 800041c0: 0a8e9733 clmul x14,x29,x8 + # Check if x14 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x14, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041c4: 0005b203 ld x4,0(x11) + 800041c8: 00e20c63 beq x4,x14,800041e0 + 800041cc: 335032ef jal x5,80007d00 + 800041d0: 800041c0 .word 0x800041c0 + 800041d4: 00000000 .word 0x00000000 + 800041d8: 80014dfc .word 0x80014dfc + 800041dc: 00000000 .word 0x00000000 + 800041e0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000ffffffff + 800041e4: 00053483 ld x9,0(x10) + 800041e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000001 + 800041ec: 00053183 ld x3,0(x10) + 800041f0: 00850513 addi x10,x10,8 + +00000000800041f4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + clmul x13, x9, x3 # perform operation + 800041f4: 0a3496b3 clmul x13,x9,x3 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f8: 0005b203 ld x4,0(x11) + 800041fc: 00d20c63 beq x4,x13,80004214 + 80004200: 301032ef jal x5,80007d00 + 80004204: 800041f4 .word 0x800041f4 + 80004208: 00000000 .word 0x00000000 + 8000420c: 80014e55 .word 0x80014e55 + 80004210: 00000000 .word 0x00000000 + 80004214: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000ffffffff + 80004218: 00053c03 ld x24,0(x10) + 8000421c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000002 + 80004220: 00053383 ld x7,0(x10) + 80004224: 00850513 addi x10,x10,8 + +0000000080004228 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + clmul x23, x24, x7 # perform operation + 80004228: 0a7c1bb3 clmul x23,x24,x7 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 8000422c: 0005b203 ld x4,0(x11) + 80004230: 01720c63 beq x4,x23,80004248 + 80004234: 2cd032ef jal x5,80007d00 + 80004238: 80004228 .word 0x80004228 + 8000423c: 00000000 .word 0x00000000 + 80004240: 80014eae .word 0x80014eae + 80004244: 00000000 .word 0x00000000 + 80004248: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000ffffffff + 8000424c: 00053383 ld x7,0(x10) + 80004250: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 80004254: 00053f83 ld x31,0(x10) + 80004258: 00850513 addi x10,x10,8 + +000000008000425c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + clmul x8, x7, x31 # perform operation + 8000425c: 0bf39433 clmul x8,x7,x31 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004260: 0005b203 ld x4,0(x11) + 80004264: 00820c63 beq x4,x8,8000427c + 80004268: 299032ef jal x5,80007d00 + 8000426c: 8000425c .word 0x8000425c + 80004270: 00000000 .word 0x00000000 + 80004274: 80014f07 .word 0x80014f07 + 80004278: 00000000 .word 0x00000000 + 8000427c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000ffffffff + 80004280: 00053303 ld x6,0(x10) + 80004284: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x8000000000000001 + 80004288: 00053083 ld x1,0(x10) + 8000428c: 00850513 addi x10,x10,8 + +0000000080004290 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + clmul x3, x6, x1 # perform operation + 80004290: 0a1311b3 clmul x3,x6,x1 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004294: 0005b203 ld x4,0(x11) + 80004298: 00320c63 beq x4,x3,800042b0 + 8000429c: 265032ef jal x5,80007d00 + 800042a0: 80004290 .word 0x80004290 + 800042a4: 00000000 .word 0x00000000 + 800042a8: 80014f6f .word 0x80014f6f + 800042ac: 00000000 .word 0x00000000 + 800042b0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000ffffffff + 800042b4: 00053a83 ld x21,0(x10) + 800042b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7fffffffffffffff + 800042bc: 00053d03 ld x26,0(x10) + 800042c0: 00850513 addi x10,x10,8 + +00000000800042c4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + clmul x3, x21, x26 # perform operation + 800042c4: 0baa91b3 clmul x3,x21,x26 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c8: 0005b203 ld x4,0(x11) + 800042cc: 00320c63 beq x4,x3,800042e4 + 800042d0: 231032ef jal x5,80007d00 + 800042d4: 800042c4 .word 0x800042c4 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 80014fd7 .word 0x80014fd7 + 800042e0: 00000000 .word 0x00000000 + 800042e4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000ffffffff + 800042e8: 00053803 ld x16,0(x10) + 800042ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7ffffffffffffffe + 800042f0: 00053783 ld x15,0(x10) + 800042f4: 00850513 addi x10,x10,8 + +00000000800042f8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + clmul x28, x16, x15 # perform operation + 800042f8: 0af81e33 clmul x28,x16,x15 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042fc: 0005b203 ld x4,0(x11) + 80004300: 01c20c63 beq x4,x28,80004318 + 80004304: 1fd032ef jal x5,80007d00 + 80004308: 800042f8 .word 0x800042f8 + 8000430c: 00000000 .word 0x00000000 + 80004310: 8001503f .word 0x8001503f + 80004314: 00000000 .word 0x00000000 + 80004318: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x00000000ffffffff + 8000431c: 00053183 ld x3,0(x10) + 80004320: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 80004324: 00053b03 ld x22,0(x10) + 80004328: 00850513 addi x10,x10,8 + +000000008000432c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + clmul x24, x3, x22 # perform operation + 8000432c: 0b619c33 clmul x24,x3,x22 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004330: 0005b203 ld x4,0(x11) + 80004334: 01820c63 beq x4,x24,8000434c + 80004338: 1c9032ef jal x5,80007d00 + 8000433c: 8000432c .word 0x8000432c + 80004340: 00000000 .word 0x00000000 + 80004344: 800150a7 .word 0x800150a7 + 80004348: 00000000 .word 0x00000000 + 8000434c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000ffffffff + 80004350: 00053703 ld x14,0(x10) + 80004354: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xfffffffffffffffe + 80004358: 00053e03 ld x28,0(x10) + 8000435c: 00850513 addi x10,x10,8 + +0000000080004360 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + clmul x15, x14, x28 # perform operation + 80004360: 0bc717b3 clmul x15,x14,x28 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004364: 0005b203 ld x4,0(x11) + 80004368: 00f20c63 beq x4,x15,80004380 + 8000436c: 195032ef jal x5,80007d00 + 80004370: 80004360 .word 0x80004360 + 80004374: 00000000 .word 0x00000000 + 80004378: 8001510f .word 0x8001510f + 8000437c: 00000000 .word 0x00000000 + 80004380: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000ffffffff + 80004384: 00053683 ld x13,0(x10) + 80004388: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 8000438c: 00053703 ld x14,0(x10) + 80004390: 00850513 addi x10,x10,8 + +0000000080004394 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + clmul x2, x13, x14 # perform operation + 80004394: 0ae69133 clmul x2,x13,x14 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004398: 0005b203 ld x4,0(x11) + 8000439c: 00220c63 beq x4,x2,800043b4 + 800043a0: 161032ef jal x5,80007d00 + 800043a4: 80004394 .word 0x80004394 + 800043a8: 00000000 .word 0x00000000 + 800043ac: 80015177 .word 0x80015177 + 800043b0: 00000000 .word 0x00000000 + 800043b4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000ffffffff + 800043b8: 00053883 ld x17,0(x10) + 800043bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 800043c0: 00053e83 ld x29,0(x10) + 800043c4: 00850513 addi x10,x10,8 + +00000000800043c8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x31, x17, x29 # perform operation + 800043c8: 0bd89fb3 clmul x31,x17,x29 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043cc: 0005b203 ld x4,0(x11) + 800043d0: 01f20c63 beq x4,x31,800043e8 + 800043d4: 12d032ef jal x5,80007d00 + 800043d8: 800043c8 .word 0x800043c8 + 800043dc: 00000000 .word 0x00000000 + 800043e0: 800151df .word 0x800151df + 800043e4: 00000000 .word 0x00000000 + 800043e8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000ffffffff + 800043ec: 00053783 ld x15,0(x10) + 800043f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5555555555555555 + 800043f4: 00053703 ld x14,0(x10) + 800043f8: 00850513 addi x10,x10,8 + +00000000800043fc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + clmul x18, x15, x14 # perform operation + 800043fc: 0ae79933 clmul x18,x15,x14 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 80004400: 0005b203 ld x4,0(x11) + 80004404: 01220c63 beq x4,x18,8000441c + 80004408: 0f9032ef jal x5,80007d00 + 8000440c: 800043fc .word 0x800043fc + 80004410: 00000000 .word 0x00000000 + 80004414: 80015247 .word 0x80015247 + 80004418: 00000000 .word 0x00000000 + 8000441c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x00000000ffffffff + 80004420: 00053e03 ld x28,0(x10) + 80004424: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000ffffffff + 80004428: 00053903 ld x18,0(x10) + 8000442c: 00850513 addi x10,x10,8 + +0000000080004430 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + clmul x29, x28, x18 # perform operation + 80004430: 0b2e1eb3 clmul x29,x28,x18 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004434: 0005b203 ld x4,0(x11) + 80004438: 01d20c63 beq x4,x29,80004450 + 8000443c: 0c5032ef jal x5,80007d00 + 80004440: 80004430 .word 0x80004430 + 80004444: 00000000 .word 0x00000000 + 80004448: 800152af .word 0x800152af + 8000444c: 00000000 .word 0x00000000 + 80004450: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000000ffffffff + 80004454: 00053103 ld x2,0(x10) + 80004458: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000fffffffe + 8000445c: 00053883 ld x17,0(x10) + 80004460: 00850513 addi x10,x10,8 + +0000000080004464 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + clmul x31, x2, x17 # perform operation + 80004464: 0b111fb3 clmul x31,x2,x17 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004468: 0005b203 ld x4,0(x11) + 8000446c: 01f20c63 beq x4,x31,80004484 + 80004470: 091032ef jal x5,80007d00 + 80004474: 80004464 .word 0x80004464 + 80004478: 00000000 .word 0x00000000 + 8000447c: 8001530f .word 0x8001530f + 80004480: 00000000 .word 0x00000000 + 80004484: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000ffffffff + 80004488: 00053a03 ld x20,0(x10) + 8000448c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000000 + 80004490: 00053b83 ld x23,0(x10) + 80004494: 00850513 addi x10,x10,8 + +0000000080004498 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + clmul x7, x20, x23 # perform operation + 80004498: 0b7a13b3 clmul x7,x20,x23 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 8000449c: 0005b203 ld x4,0(x11) + 800044a0: 00720c63 beq x4,x7,800044b8 + 800044a4: 05d032ef jal x5,80007d00 + 800044a8: 80004498 .word 0x80004498 + 800044ac: 00000000 .word 0x00000000 + 800044b0: 8001536f .word 0x8001536f + 800044b4: 00000000 .word 0x00000000 + 800044b8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000ffffffff + 800044bc: 00053d83 ld x27,0(x10) + 800044c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000001 + 800044c4: 00053b03 ld x22,0(x10) + 800044c8: 00850513 addi x10,x10,8 + +00000000800044cc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + clmul x9, x27, x22 # perform operation + 800044cc: 0b6d94b3 clmul x9,x27,x22 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044d0: 0005b203 ld x4,0(x11) + 800044d4: 00920c63 beq x4,x9,800044ec + 800044d8: 029032ef jal x5,80007d00 + 800044dc: 800044cc .word 0x800044cc + 800044e0: 00000000 .word 0x00000000 + 800044e4: 800153d0 .word 0x800153d0 + 800044e8: 00000000 .word 0x00000000 + 800044ec: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 800044f0: 00053703 ld x14,0(x10) + 800044f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x0000000000000000 + 800044f8: 00053383 ld x7,0(x10) + 800044fc: 00850513 addi x10,x10,8 + +0000000080004500 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + clmul x1, x14, x7 # perform operation + 80004500: 0a7710b3 clmul x1,x14,x7 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 80004504: 0005b203 ld x4,0(x11) + 80004508: 00120c63 beq x4,x1,80004520 + 8000450c: 7f4032ef jal x5,80007d00 + 80004510: 80004500 .word 0x80004500 + 80004514: 00000000 .word 0x00000000 + 80004518: 80015431 .word 0x80015431 + 8000451c: 00000000 .word 0x00000000 + 80004520: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000000fffffffe + 80004524: 00053c83 ld x25,0(x10) + 80004528: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000001 + 8000452c: 00053183 ld x3,0(x10) + 80004530: 00850513 addi x10,x10,8 + +0000000080004534 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + clmul x30, x25, x3 # perform operation + 80004534: 0a3c9f33 clmul x30,x25,x3 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004538: 0005b203 ld x4,0(x11) + 8000453c: 01e20c63 beq x4,x30,80004554 + 80004540: 7c0032ef jal x5,80007d00 + 80004544: 80004534 .word 0x80004534 + 80004548: 00000000 .word 0x00000000 + 8000454c: 8001548a .word 0x8001548a + 80004550: 00000000 .word 0x00000000 + 80004554: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000fffffffe + 80004558: 00053603 ld x12,0(x10) + 8000455c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000002 + 80004560: 00053703 ld x14,0(x10) + 80004564: 00850513 addi x10,x10,8 + +0000000080004568 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + clmul x1, x12, x14 # perform operation + 80004568: 0ae610b3 clmul x1,x12,x14 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 8000456c: 0005b203 ld x4,0(x11) + 80004570: 00120c63 beq x4,x1,80004588 + 80004574: 78c032ef jal x5,80007d00 + 80004578: 80004568 .word 0x80004568 + 8000457c: 00000000 .word 0x00000000 + 80004580: 800154e3 .word 0x800154e3 + 80004584: 00000000 .word 0x00000000 + 80004588: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 8000458c: 00053303 ld x6,0(x10) + 80004590: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000000 + 80004594: 00053c03 ld x24,0(x10) + 80004598: 00850513 addi x10,x10,8 + +000000008000459c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + clmul x15, x6, x24 # perform operation + 8000459c: 0b8317b3 clmul x15,x6,x24 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 800045a0: 0005b203 ld x4,0(x11) + 800045a4: 00f20c63 beq x4,x15,800045bc + 800045a8: 758032ef jal x5,80007d00 + 800045ac: 8000459c .word 0x8000459c + 800045b0: 00000000 .word 0x00000000 + 800045b4: 8001553c .word 0x8001553c + 800045b8: 00000000 .word 0x00000000 + 800045bc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x00000000fffffffe + 800045c0: 00053e03 ld x28,0(x10) + 800045c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x8000000000000001 + 800045c8: 00053683 ld x13,0(x10) + 800045cc: 00850513 addi x10,x10,8 + +00000000800045d0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + clmul x31, x28, x13 # perform operation + 800045d0: 0ade1fb3 clmul x31,x28,x13 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045d4: 0005b203 ld x4,0(x11) + 800045d8: 01f20c63 beq x4,x31,800045f0 + 800045dc: 724032ef jal x5,80007d00 + 800045e0: 800045d0 .word 0x800045d0 + 800045e4: 00000000 .word 0x00000000 + 800045e8: 800155a4 .word 0x800155a4 + 800045ec: 00000000 .word 0x00000000 + 800045f0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000fffffffe + 800045f4: 00053b83 ld x23,0(x10) + 800045f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7fffffffffffffff + 800045fc: 00053883 ld x17,0(x10) + 80004600: 00850513 addi x10,x10,8 + +0000000080004604 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + clmul x18, x23, x17 # perform operation + 80004604: 0b1b9933 clmul x18,x23,x17 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004608: 0005b203 ld x4,0(x11) + 8000460c: 01220c63 beq x4,x18,80004624 + 80004610: 6f0032ef jal x5,80007d00 + 80004614: 80004604 .word 0x80004604 + 80004618: 00000000 .word 0x00000000 + 8000461c: 8001560c .word 0x8001560c + 80004620: 00000000 .word 0x00000000 + 80004624: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000fffffffe + 80004628: 00053603 ld x12,0(x10) + 8000462c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7ffffffffffffffe + 80004630: 00053803 ld x16,0(x10) + 80004634: 00850513 addi x10,x10,8 + +0000000080004638 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + clmul x8, x12, x16 # perform operation + 80004638: 0b061433 clmul x8,x12,x16 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 8000463c: 0005b203 ld x4,0(x11) + 80004640: 00820c63 beq x4,x8,80004658 + 80004644: 6bc032ef jal x5,80007d00 + 80004648: 80004638 .word 0x80004638 + 8000464c: 00000000 .word 0x00000000 + 80004650: 80015674 .word 0x80015674 + 80004654: 00000000 .word 0x00000000 + 80004658: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000fffffffe + 8000465c: 00053803 ld x16,0(x10) + 80004660: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xffffffffffffffff + 80004664: 00053983 ld x19,0(x10) + 80004668: 00850513 addi x10,x10,8 + +000000008000466c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + clmul x27, x16, x19 # perform operation + 8000466c: 0b381db3 clmul x27,x16,x19 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004670: 0005b203 ld x4,0(x11) + 80004674: 01b20c63 beq x4,x27,8000468c + 80004678: 688032ef jal x5,80007d00 + 8000467c: 8000466c .word 0x8000466c + 80004680: 00000000 .word 0x00000000 + 80004684: 800156dc .word 0x800156dc + 80004688: 00000000 .word 0x00000000 + 8000468c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 80004690: 00053703 ld x14,0(x10) + 80004694: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xfffffffffffffffe + 80004698: 00053383 ld x7,0(x10) + 8000469c: 00850513 addi x10,x10,8 + +00000000800046a0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + clmul x17, x14, x7 # perform operation + 800046a0: 0a7718b3 clmul x17,x14,x7 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 800046a4: 0005b203 ld x4,0(x11) + 800046a8: 01120c63 beq x4,x17,800046c0 + 800046ac: 654032ef jal x5,80007d00 + 800046b0: 800046a0 .word 0x800046a0 + 800046b4: 00000000 .word 0x00000000 + 800046b8: 80015744 .word 0x80015744 + 800046bc: 00000000 .word 0x00000000 + 800046c0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000fffffffe + 800046c4: 00053683 ld x13,0(x10) + 800046c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 800046cc: 00053f83 ld x31,0(x10) + 800046d0: 00850513 addi x10,x10,8 + +00000000800046d4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + clmul x8, x13, x31 # perform operation + 800046d4: 0bf69433 clmul x8,x13,x31 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d8: 0005b203 ld x4,0(x11) + 800046dc: 00820c63 beq x4,x8,800046f4 + 800046e0: 620032ef jal x5,80007d00 + 800046e4: 800046d4 .word 0x800046d4 + 800046e8: 00000000 .word 0x00000000 + 800046ec: 800157ac .word 0x800157ac + 800046f0: 00000000 .word 0x00000000 + 800046f4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000000fffffffe + 800046f8: 00053083 ld x1,0(x10) + 800046fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80004700: 00053a03 ld x20,0(x10) + 80004704: 00850513 addi x10,x10,8 + +0000000080004708 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x17, x1, x20 # perform operation + 80004708: 0b4098b3 clmul x17,x1,x20 + # Check if x17 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x17, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000470c: 0005b203 ld x4,0(x11) + 80004710: 01120c63 beq x4,x17,80004728 + 80004714: 5ec032ef jal x5,80007d00 + 80004718: 80004708 .word 0x80004708 + 8000471c: 00000000 .word 0x00000000 + 80004720: 80015814 .word 0x80015814 + 80004724: 00000000 .word 0x00000000 + 80004728: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x00000000fffffffe + 8000472c: 00053383 ld x7,0(x10) + 80004730: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x5555555555555555 + 80004734: 00053e83 ld x29,0(x10) + 80004738: 00850513 addi x10,x10,8 + +000000008000473c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + clmul x31, x7, x29 # perform operation + 8000473c: 0bd39fb3 clmul x31,x7,x29 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004740: 0005b203 ld x4,0(x11) + 80004744: 01f20c63 beq x4,x31,8000475c + 80004748: 5b8032ef jal x5,80007d00 + 8000474c: 8000473c .word 0x8000473c + 80004750: 00000000 .word 0x00000000 + 80004754: 8001587c .word 0x8001587c + 80004758: 00000000 .word 0x00000000 + 8000475c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 80004760: 00053703 ld x14,0(x10) + 80004764: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000ffffffff + 80004768: 00053b83 ld x23,0(x10) + 8000476c: 00850513 addi x10,x10,8 + +0000000080004770 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + clmul x19, x14, x23 # perform operation + 80004770: 0b7719b3 clmul x19,x14,x23 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004774: 0005b203 ld x4,0(x11) + 80004778: 01320c63 beq x4,x19,80004790 + 8000477c: 584032ef jal x5,80007d00 + 80004780: 80004770 .word 0x80004770 + 80004784: 00000000 .word 0x00000000 + 80004788: 800158e4 .word 0x800158e4 + 8000478c: 00000000 .word 0x00000000 + 80004790: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000fffffffe + 80004794: 00053783 ld x15,0(x10) + 80004798: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 8000479c: 00053a83 ld x21,0(x10) + 800047a0: 00850513 addi x10,x10,8 + +00000000800047a4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + clmul x19, x15, x21 # perform operation + 800047a4: 0b5799b3 clmul x19,x15,x21 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a8: 0005b203 ld x4,0(x11) + 800047ac: 01320c63 beq x4,x19,800047c4 + 800047b0: 550032ef jal x5,80007d00 + 800047b4: 800047a4 .word 0x800047a4 + 800047b8: 00000000 .word 0x00000000 + 800047bc: 80015944 .word 0x80015944 + 800047c0: 00000000 .word 0x00000000 + 800047c4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000fffffffe + 800047c8: 00053883 ld x17,0(x10) + 800047cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 800047d0: 00053483 ld x9,0(x10) + 800047d4: 00850513 addi x10,x10,8 + +00000000800047d8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + clmul x18, x17, x9 # perform operation + 800047d8: 0a989933 clmul x18,x17,x9 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047dc: 0005b203 ld x4,0(x11) + 800047e0: 01220c63 beq x4,x18,800047f8 + 800047e4: 51c032ef jal x5,80007d00 + 800047e8: 800047d8 .word 0x800047d8 + 800047ec: 00000000 .word 0x00000000 + 800047f0: 800159a4 .word 0x800159a4 + 800047f4: 00000000 .word 0x00000000 + 800047f8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 800047fc: 00053703 ld x14,0(x10) + 80004800: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000100000001 + 80004804: 00053c03 ld x24,0(x10) + 80004808: 00850513 addi x10,x10,8 + +000000008000480c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + clmul x21, x14, x24 # perform operation + 8000480c: 0b871ab3 clmul x21,x14,x24 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004810: 0005b203 ld x4,0(x11) + 80004814: 01520c63 beq x4,x21,8000482c + 80004818: 4e8032ef jal x5,80007d00 + 8000481c: 8000480c .word 0x8000480c + 80004820: 00000000 .word 0x00000000 + 80004824: 80015a05 .word 0x80015a05 + 80004828: 00000000 .word 0x00000000 + 8000482c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000100000000 + 80004830: 00053083 ld x1,0(x10) + 80004834: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000000 + 80004838: 00053303 ld x6,0(x10) + 8000483c: 00850513 addi x10,x10,8 + +0000000080004840 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + clmul x24, x1, x6 # perform operation + 80004840: 0a609c33 clmul x24,x1,x6 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004844: 0005b203 ld x4,0(x11) + 80004848: 01820c63 beq x4,x24,80004860 + 8000484c: 4b4032ef jal x5,80007d00 + 80004850: 80004840 .word 0x80004840 + 80004854: 00000000 .word 0x00000000 + 80004858: 80015a66 .word 0x80015a66 + 8000485c: 00000000 .word 0x00000000 + 80004860: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000000 + 80004864: 00053483 ld x9,0(x10) + 80004868: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000001 + 8000486c: 00053883 ld x17,0(x10) + 80004870: 00850513 addi x10,x10,8 + +0000000080004874 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + clmul x20, x9, x17 # perform operation + 80004874: 0b149a33 clmul x20,x9,x17 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004878: 0005b203 ld x4,0(x11) + 8000487c: 01420c63 beq x4,x20,80004894 + 80004880: 480032ef jal x5,80007d00 + 80004884: 80004874 .word 0x80004874 + 80004888: 00000000 .word 0x00000000 + 8000488c: 80015ac0 .word 0x80015ac0 + 80004890: 00000000 .word 0x00000000 + 80004894: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000100000000 + 80004898: 00053e83 ld x29,0(x10) + 8000489c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 800048a0: 00053903 ld x18,0(x10) + 800048a4: 00850513 addi x10,x10,8 + +00000000800048a8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + clmul x1, x29, x18 # perform operation + 800048a8: 0b2e90b3 clmul x1,x29,x18 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048ac: 0005b203 ld x4,0(x11) + 800048b0: 00120c63 beq x4,x1,800048c8 + 800048b4: 44c032ef jal x5,80007d00 + 800048b8: 800048a8 .word 0x800048a8 + 800048bc: 00000000 .word 0x00000000 + 800048c0: 80015b1a .word 0x80015b1a + 800048c4: 00000000 .word 0x00000000 + 800048c8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 800048cc: 00053a03 ld x20,0(x10) + 800048d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000000 + 800048d4: 00053d83 ld x27,0(x10) + 800048d8: 00850513 addi x10,x10,8 + +00000000800048dc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + clmul x23, x20, x27 # perform operation + 800048dc: 0bba1bb3 clmul x23,x20,x27 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048e0: 0005b203 ld x4,0(x11) + 800048e4: 01720c63 beq x4,x23,800048fc + 800048e8: 418032ef jal x5,80007d00 + 800048ec: 800048dc .word 0x800048dc + 800048f0: 00000000 .word 0x00000000 + 800048f4: 80015b74 .word 0x80015b74 + 800048f8: 00000000 .word 0x00000000 + 800048fc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000100000000 + 80004900: 00053783 ld x15,0(x10) + 80004904: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x8000000000000001 + 80004908: 00053083 ld x1,0(x10) + 8000490c: 00850513 addi x10,x10,8 + +0000000080004910 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + clmul x20, x15, x1 # perform operation + 80004910: 0a179a33 clmul x20,x15,x1 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004914: 0005b203 ld x4,0(x11) + 80004918: 01420c63 beq x4,x20,80004930 + 8000491c: 3e4032ef jal x5,80007d00 + 80004920: 80004910 .word 0x80004910 + 80004924: 00000000 .word 0x00000000 + 80004928: 80015bdd .word 0x80015bdd + 8000492c: 00000000 .word 0x00000000 + 80004930: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000000 + 80004934: 00053183 ld x3,0(x10) + 80004938: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7fffffffffffffff + 8000493c: 00053a03 ld x20,0(x10) + 80004940: 00850513 addi x10,x10,8 + +0000000080004944 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + clmul x23, x3, x20 # perform operation + 80004944: 0b419bb3 clmul x23,x3,x20 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004948: 0005b203 ld x4,0(x11) + 8000494c: 01720c63 beq x4,x23,80004964 + 80004950: 3b0032ef jal x5,80007d00 + 80004954: 80004944 .word 0x80004944 + 80004958: 00000000 .word 0x00000000 + 8000495c: 80015c46 .word 0x80015c46 + 80004960: 00000000 .word 0x00000000 + 80004964: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000000 + 80004968: 00053c03 ld x24,0(x10) + 8000496c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80004970: 00053303 ld x6,0(x10) + 80004974: 00850513 addi x10,x10,8 + +0000000080004978 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + clmul x31, x24, x6 # perform operation + 80004978: 0a6c1fb3 clmul x31,x24,x6 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 8000497c: 0005b203 ld x4,0(x11) + 80004980: 01f20c63 beq x4,x31,80004998 + 80004984: 37c032ef jal x5,80007d00 + 80004988: 80004978 .word 0x80004978 + 8000498c: 00000000 .word 0x00000000 + 80004990: 80015caf .word 0x80015caf + 80004994: 00000000 .word 0x00000000 + 80004998: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000000 + 8000499c: 00053103 ld x2,0(x10) + 800049a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 800049a4: 00053c03 ld x24,0(x10) + 800049a8: 00850513 addi x10,x10,8 + +00000000800049ac : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + clmul x19, x2, x24 # perform operation + 800049ac: 0b8119b3 clmul x19,x2,x24 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049b0: 0005b203 ld x4,0(x11) + 800049b4: 01320c63 beq x4,x19,800049cc + 800049b8: 348032ef jal x5,80007d00 + 800049bc: 800049ac .word 0x800049ac + 800049c0: 00000000 .word 0x00000000 + 800049c4: 80015d18 .word 0x80015d18 + 800049c8: 00000000 .word 0x00000000 + 800049cc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 800049d0: 00053a03 ld x20,0(x10) + 800049d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffffffffffe + 800049d8: 00053683 ld x13,0(x10) + 800049dc: 00850513 addi x10,x10,8 + +00000000800049e0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + clmul x19, x20, x13 # perform operation + 800049e0: 0ada19b3 clmul x19,x20,x13 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049e4: 0005b203 ld x4,0(x11) + 800049e8: 01320c63 beq x4,x19,80004a00 + 800049ec: 314032ef jal x5,80007d00 + 800049f0: 800049e0 .word 0x800049e0 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 80015d81 .word 0x80015d81 + 800049fc: 00000000 .word 0x00000000 + 80004a00: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000000 + 80004a04: 00053e03 ld x28,0(x10) + 80004a08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80004a0c: 00053483 ld x9,0(x10) + 80004a10: 00850513 addi x10,x10,8 + +0000000080004a14 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + clmul x29, x28, x9 # perform operation + 80004a14: 0a9e1eb3 clmul x29,x28,x9 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a18: 0005b203 ld x4,0(x11) + 80004a1c: 01d20c63 beq x4,x29,80004a34 + 80004a20: 2e0032ef jal x5,80007d00 + 80004a24: 80004a14 .word 0x80004a14 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 80015dea .word 0x80015dea + 80004a30: 00000000 .word 0x00000000 + 80004a34: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000100000000 + 80004a38: 00053f83 ld x31,0(x10) + 80004a3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80004a40: 00053403 ld x8,0(x10) + 80004a44: 00850513 addi x10,x10,8 + +0000000080004a48 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x15, x31, x8 # perform operation + 80004a48: 0a8f97b3 clmul x15,x31,x8 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a4c: 0005b203 ld x4,0(x11) + 80004a50: 00f20c63 beq x4,x15,80004a68 + 80004a54: 2ac032ef jal x5,80007d00 + 80004a58: 80004a48 .word 0x80004a48 + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 80015e53 .word 0x80015e53 + 80004a64: 00000000 .word 0x00000000 + 80004a68: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000000 + 80004a6c: 00053983 ld x19,0(x10) + 80004a70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5555555555555555 + 80004a74: 00053103 ld x2,0(x10) + 80004a78: 00850513 addi x10,x10,8 + +0000000080004a7c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + clmul x22, x19, x2 # perform operation + 80004a7c: 0a299b33 clmul x22,x19,x2 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a80: 0005b203 ld x4,0(x11) + 80004a84: 01620c63 beq x4,x22,80004a9c + 80004a88: 278032ef jal x5,80007d00 + 80004a8c: 80004a7c .word 0x80004a7c + 80004a90: 00000000 .word 0x00000000 + 80004a94: 80015ebc .word 0x80015ebc + 80004a98: 00000000 .word 0x00000000 + 80004a9c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000100000000 + 80004aa0: 00053f03 ld x30,0(x10) + 80004aa4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000ffffffff + 80004aa8: 00053183 ld x3,0(x10) + 80004aac: 00850513 addi x10,x10,8 + +0000000080004ab0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + clmul x19, x30, x3 # perform operation + 80004ab0: 0a3f19b3 clmul x19,x30,x3 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004ab4: 0005b203 ld x4,0(x11) + 80004ab8: 01320c63 beq x4,x19,80004ad0 + 80004abc: 244032ef jal x5,80007d00 + 80004ac0: 80004ab0 .word 0x80004ab0 + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 80015f25 .word 0x80015f25 + 80004acc: 00000000 .word 0x00000000 + 80004ad0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000100000000 + 80004ad4: 00053703 ld x14,0(x10) + 80004ad8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x00000000fffffffe + 80004adc: 00053383 ld x7,0(x10) + 80004ae0: 00850513 addi x10,x10,8 + +0000000080004ae4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + clmul x16, x14, x7 # perform operation + 80004ae4: 0a771833 clmul x16,x14,x7 + # Check if x16 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x16, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae8: 0005b203 ld x4,0(x11) + 80004aec: 01020c63 beq x4,x16,80004b04 + 80004af0: 210032ef jal x5,80007d00 + 80004af4: 80004ae4 .word 0x80004ae4 + 80004af8: 00000000 .word 0x00000000 + 80004afc: 80015f86 .word 0x80015f86 + 80004b00: 00000000 .word 0x00000000 + 80004b04: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000000 + 80004b08: 00053103 ld x2,0(x10) + 80004b0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000100000000 + 80004b10: 00053703 ld x14,0(x10) + 80004b14: 00850513 addi x10,x10,8 + +0000000080004b18 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + clmul x8, x2, x14 # perform operation + 80004b18: 0ae11433 clmul x8,x2,x14 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b1c: 0005b203 ld x4,0(x11) + 80004b20: 00820c63 beq x4,x8,80004b38 + 80004b24: 1dc032ef jal x5,80007d00 + 80004b28: 80004b18 .word 0x80004b18 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 80015fe7 .word 0x80015fe7 + 80004b34: 00000000 .word 0x00000000 + 80004b38: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000000 + 80004b3c: 00053183 ld x3,0(x10) + 80004b40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80004b44: 00053a83 ld x21,0(x10) + 80004b48: 00850513 addi x10,x10,8 + +0000000080004b4c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + clmul x8, x3, x21 # perform operation + 80004b4c: 0b519433 clmul x8,x3,x21 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b50: 0005b203 ld x4,0(x11) + 80004b54: 00820c63 beq x4,x8,80004b6c + 80004b58: 1a8032ef jal x5,80007d00 + 80004b5c: 80004b4c .word 0x80004b4c + 80004b60: 00000000 .word 0x00000000 + 80004b64: 80016049 .word 0x80016049 + 80004b68: 00000000 .word 0x00000000 + 80004b6c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000100000001 + 80004b70: 00053083 ld x1,0(x10) + 80004b74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000000 + 80004b78: 00053183 ld x3,0(x10) + 80004b7c: 00850513 addi x10,x10,8 + +0000000080004b80 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + clmul x2, x1, x3 # perform operation + 80004b80: 0a309133 clmul x2,x1,x3 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b84: 0005b203 ld x4,0(x11) + 80004b88: 00220c63 beq x4,x2,80004ba0 + 80004b8c: 174032ef jal x5,80007d00 + 80004b90: 80004b80 .word 0x80004b80 + 80004b94: 00000000 .word 0x00000000 + 80004b98: 800160ab .word 0x800160ab + 80004b9c: 00000000 .word 0x00000000 + 80004ba0: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000001 + 80004ba4: 00053c03 ld x24,0(x10) + 80004ba8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000001 + 80004bac: 00053903 ld x18,0(x10) + 80004bb0: 00850513 addi x10,x10,8 + +0000000080004bb4 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + clmul x31, x24, x18 # perform operation + 80004bb4: 0b2c1fb3 clmul x31,x24,x18 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb8: 0005b203 ld x4,0(x11) + 80004bbc: 01f20c63 beq x4,x31,80004bd4 + 80004bc0: 140032ef jal x5,80007d00 + 80004bc4: 80004bb4 .word 0x80004bb4 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 80016105 .word 0x80016105 + 80004bd0: 00000000 .word 0x00000000 + 80004bd4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000100000001 + 80004bd8: 00053783 ld x15,0(x10) + 80004bdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 80004be0: 00053683 ld x13,0(x10) + 80004be4: 00850513 addi x10,x10,8 + +0000000080004be8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + clmul x27, x15, x13 # perform operation + 80004be8: 0ad79db3 clmul x27,x15,x13 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bec: 0005b203 ld x4,0(x11) + 80004bf0: 01b20c63 beq x4,x27,80004c08 + 80004bf4: 10c032ef jal x5,80007d00 + 80004bf8: 80004be8 .word 0x80004be8 + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 8001615f .word 0x8001615f + 80004c04: 00000000 .word 0x00000000 + 80004c08: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000100000001 + 80004c0c: 00053883 ld x17,0(x10) + 80004c10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000000 + 80004c14: 00053903 ld x18,0(x10) + 80004c18: 00850513 addi x10,x10,8 + +0000000080004c1c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + clmul x8, x17, x18 # perform operation + 80004c1c: 0b289433 clmul x8,x17,x18 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c20: 0005b203 ld x4,0(x11) + 80004c24: 00820c63 beq x4,x8,80004c3c + 80004c28: 0d8032ef jal x5,80007d00 + 80004c2c: 80004c1c .word 0x80004c1c + 80004c30: 00000000 .word 0x00000000 + 80004c34: 800161b9 .word 0x800161b9 + 80004c38: 00000000 .word 0x00000000 + 80004c3c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000100000001 + 80004c40: 00053f03 ld x30,0(x10) + 80004c44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x8000000000000001 + 80004c48: 00053403 ld x8,0(x10) + 80004c4c: 00850513 addi x10,x10,8 + +0000000080004c50 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + clmul x26, x30, x8 # perform operation + 80004c50: 0a8f1d33 clmul x26,x30,x8 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c54: 0005b203 ld x4,0(x11) + 80004c58: 01a20c63 beq x4,x26,80004c70 + 80004c5c: 0a4032ef jal x5,80007d00 + 80004c60: 80004c50 .word 0x80004c50 + 80004c64: 00000000 .word 0x00000000 + 80004c68: 80016222 .word 0x80016222 + 80004c6c: 00000000 .word 0x00000000 + 80004c70: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x0000000100000001 + 80004c74: 00053183 ld x3,0(x10) + 80004c78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7fffffffffffffff + 80004c7c: 00053483 ld x9,0(x10) + 80004c80: 00850513 addi x10,x10,8 + +0000000080004c84 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + clmul x29, x3, x9 # perform operation + 80004c84: 0a919eb3 clmul x29,x3,x9 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c88: 0005b203 ld x4,0(x11) + 80004c8c: 01d20c63 beq x4,x29,80004ca4 + 80004c90: 070032ef jal x5,80007d00 + 80004c94: 80004c84 .word 0x80004c84 + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 8001628b .word 0x8001628b + 80004ca0: 00000000 .word 0x00000000 + 80004ca4: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000001 + 80004ca8: 00053983 ld x19,0(x10) + 80004cac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80004cb0: 00053903 ld x18,0(x10) + 80004cb4: 00850513 addi x10,x10,8 + +0000000080004cb8 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + clmul x1, x19, x18 # perform operation + 80004cb8: 0b2990b3 clmul x1,x19,x18 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cbc: 0005b203 ld x4,0(x11) + 80004cc0: 00120c63 beq x4,x1,80004cd8 + 80004cc4: 03c032ef jal x5,80007d00 + 80004cc8: 80004cb8 .word 0x80004cb8 + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 800162f4 .word 0x800162f4 + 80004cd4: 00000000 .word 0x00000000 + 80004cd8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0000000100000001 + 80004cdc: 00053d03 ld x26,0(x10) + 80004ce0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xffffffffffffffff + 80004ce4: 00053983 ld x19,0(x10) + 80004ce8: 00850513 addi x10,x10,8 + +0000000080004cec : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + clmul x24, x26, x19 # perform operation + 80004cec: 0b3d1c33 clmul x24,x26,x19 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cf0: 0005b203 ld x4,0(x11) + 80004cf4: 01820c63 beq x4,x24,80004d0c + 80004cf8: 008032ef jal x5,80007d00 + 80004cfc: 80004cec .word 0x80004cec + 80004d00: 00000000 .word 0x00000000 + 80004d04: 8001635d .word 0x8001635d + 80004d08: 00000000 .word 0x00000000 + 80004d0c: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000100000001 + 80004d10: 00053a83 ld x21,0(x10) + 80004d14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffffffffffe + 80004d18: 00053983 ld x19,0(x10) + 80004d1c: 00850513 addi x10,x10,8 + +0000000080004d20 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + clmul x1, x21, x19 # perform operation + 80004d20: 0b3a90b3 clmul x1,x21,x19 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d24: 0005b203 ld x4,0(x11) + 80004d28: 00120c63 beq x4,x1,80004d40 + 80004d2c: 7d5022ef jal x5,80007d00 + 80004d30: 80004d20 .word 0x80004d20 + 80004d34: 00000000 .word 0x00000000 + 80004d38: 800163c6 .word 0x800163c6 + 80004d3c: 00000000 .word 0x00000000 + 80004d40: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000001 + 80004d44: 00053e03 ld x28,0(x10) + 80004d48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80004d4c: 00053b83 ld x23,0(x10) + 80004d50: 00850513 addi x10,x10,8 + +0000000080004d54 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + clmul x2, x28, x23 # perform operation + 80004d54: 0b7e1133 clmul x2,x28,x23 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d58: 0005b203 ld x4,0(x11) + 80004d5c: 00220c63 beq x4,x2,80004d74 + 80004d60: 7a1022ef jal x5,80007d00 + 80004d64: 80004d54 .word 0x80004d54 + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 8001642f .word 0x8001642f + 80004d70: 00000000 .word 0x00000000 + 80004d74: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000001 + 80004d78: 00053c03 ld x24,0(x10) + 80004d7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80004d80: 00053e03 ld x28,0(x10) + 80004d84: 00850513 addi x10,x10,8 + +0000000080004d88 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + clmul x1, x24, x28 # perform operation + 80004d88: 0bcc10b3 clmul x1,x24,x28 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d8c: 0005b203 ld x4,0(x11) + 80004d90: 00120c63 beq x4,x1,80004da8 + 80004d94: 76d022ef jal x5,80007d00 + 80004d98: 80004d88 .word 0x80004d88 + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 80016498 .word 0x80016498 + 80004da4: 00000000 .word 0x00000000 + 80004da8: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000100000001 + 80004dac: 00053c83 ld x25,0(x10) + 80004db0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5555555555555555 + 80004db4: 00053783 ld x15,0(x10) + 80004db8: 00850513 addi x10,x10,8 + +0000000080004dbc : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + clmul x28, x25, x15 # perform operation + 80004dbc: 0afc9e33 clmul x28,x25,x15 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004dc0: 0005b203 ld x4,0(x11) + 80004dc4: 01c20c63 beq x4,x28,80004ddc + 80004dc8: 739022ef jal x5,80007d00 + 80004dcc: 80004dbc .word 0x80004dbc + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 80016501 .word 0x80016501 + 80004dd8: 00000000 .word 0x00000000 + 80004ddc: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000001 + 80004de0: 00053603 ld x12,0(x10) + 80004de4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000ffffffff + 80004de8: 00053883 ld x17,0(x10) + 80004dec: 00850513 addi x10,x10,8 + +0000000080004df0 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + clmul x18, x12, x17 # perform operation + 80004df0: 0b161933 clmul x18,x12,x17 + # Check if x18 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x18, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004df4: 0005b203 ld x4,0(x11) + 80004df8: 01220c63 beq x4,x18,80004e10 + 80004dfc: 705022ef jal x5,80007d00 + 80004e00: 80004df0 .word 0x80004df0 + 80004e04: 00000000 .word 0x00000000 + 80004e08: 8001656a .word 0x8001656a + 80004e0c: 00000000 .word 0x00000000 + 80004e10: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000100000001 + 80004e14: 00053c83 ld x25,0(x10) + 80004e18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000fffffffe + 80004e1c: 00053703 ld x14,0(x10) + 80004e20: 00850513 addi x10,x10,8 + +0000000080004e24 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + clmul x31, x25, x14 # perform operation + 80004e24: 0aec9fb3 clmul x31,x25,x14 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e28: 0005b203 ld x4,0(x11) + 80004e2c: 01f20c63 beq x4,x31,80004e44 + 80004e30: 6d1022ef jal x5,80007d00 + 80004e34: 80004e24 .word 0x80004e24 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 800165cb .word 0x800165cb + 80004e40: 00000000 .word 0x00000000 + 80004e44: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80004e48: 00053303 ld x6,0(x10) + 80004e4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000100000000 + 80004e50: 00053083 ld x1,0(x10) + 80004e54: 00850513 addi x10,x10,8 + +0000000080004e58 : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + clmul x7, x6, x1 # perform operation + 80004e58: 0a1313b3 clmul x7,x6,x1 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e5c: 0005b203 ld x4,0(x11) + 80004e60: 00720c63 beq x4,x7,80004e78 + 80004e64: 69d022ef jal x5,80007d00 + 80004e68: 80004e58 .word 0x80004e58 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 8001662c .word 0x8001662c + 80004e74: 00000000 .word 0x00000000 + 80004e78: 00858593 addi x11,x11,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000100000001 + 80004e7c: 00053b83 ld x23,0(x10) + 80004e80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000100000001 + 80004e84: 00053e03 ld x28,0(x10) + 80004e88: 00850513 addi x10,x10,8 + +0000000080004e8c : +Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + clmul x22, x23, x28 # perform operation + 80004e8c: 0bcb9b33 clmul x22,x23,x28 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkc_clmul_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e90: 0005b203 ld x4,0(x11) + 80004e94: 01620c63 beq x4,x22,80004eac + 80004e98: 669022ef jal x5,80007d00 + 80004e9c: 80004e8c .word 0x80004e8c + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 8001668e .word 0x8001668e + 80004ea8: 00000000 .word 0x00000000 + 80004eac: 00858593 addi x11,x11,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x7ed3f0e24aefcaa0 + 80004eb0: 00053003 ld x0,0(x10) + 80004eb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x234b4635ae9269c9 + 80004eb8: 00053003 ld x0,0(x10) + 80004ebc: 00850513 addi x10,x10,8 + +0000000080004ec0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b0: + clmul x13, x0, x0 # perform operation + 80004ec0: 0a0016b3 clmul x13,x0,x0 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zbkc_clmul_cg_cmp_rs1_rs2_b0, Zbkc_clmul_cg_cmp_rs1_rs2_b0_str) + 80004ec4: 0005b203 ld x4,0(x11) + 80004ec8: 00d20c63 beq x4,x13,80004ee0 + 80004ecc: 635022ef jal x5,80007d00 + 80004ed0: 80004ec0 .word 0x80004ec0 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 800166f0 .word 0x800166f0 + 80004edc: 00000000 .word 0x00000000 + 80004ee0: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x45b87ae72e6f6011 + 80004ee4: 00053083 ld x1,0(x10) + 80004ee8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x506e2afffc6ba79c + 80004eec: 00053083 ld x1,0(x10) + 80004ef0: 00850513 addi x10,x10,8 + +0000000080004ef4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b1: + clmul x24, x1, x1 # perform operation + 80004ef4: 0a109c33 clmul x24,x1,x1 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkc_clmul_cg_cmp_rs1_rs2_b1, Zbkc_clmul_cg_cmp_rs1_rs2_b1_str) + 80004ef8: 0005b203 ld x4,0(x11) + 80004efc: 01820c63 beq x4,x24,80004f14 + 80004f00: 601022ef jal x5,80007d00 + 80004f04: 80004ef4 .word 0x80004ef4 + 80004f08: 00000000 .word 0x00000000 + 80004f0c: 80016729 .word 0x80016729 + 80004f10: 00000000 .word 0x00000000 + 80004f14: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xd987a6b0bf5cceb9 + 80004f18: 00053103 ld x2,0(x10) + 80004f1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7da7a70e53c25683 + 80004f20: 00053103 ld x2,0(x10) + 80004f24: 00850513 addi x10,x10,8 + +0000000080004f28 : +Zbkc_clmul_cg_cmp_rs1_rs2_b2: + clmul x19, x2, x2 # perform operation + 80004f28: 0a2119b3 clmul x19,x2,x2 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkc_clmul_cg_cmp_rs1_rs2_b2, Zbkc_clmul_cg_cmp_rs1_rs2_b2_str) + 80004f2c: 0005b203 ld x4,0(x11) + 80004f30: 01320c63 beq x4,x19,80004f48 + 80004f34: 5cd022ef jal x5,80007d00 + 80004f38: 80004f28 .word 0x80004f28 + 80004f3c: 00000000 .word 0x00000000 + 80004f40: 80016762 .word 0x80016762 + 80004f44: 00000000 .word 0x00000000 + 80004f48: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xa806375a611e4ad5 + 80004f4c: 00053183 ld x3,0(x10) + 80004f50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x2b0f607fcb345200 + 80004f54: 00053183 ld x3,0(x10) + 80004f58: 00850513 addi x10,x10,8 + +0000000080004f5c : +Zbkc_clmul_cg_cmp_rs1_rs2_b3: + clmul x20, x3, x3 # perform operation + 80004f5c: 0a319a33 clmul x20,x3,x3 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkc_clmul_cg_cmp_rs1_rs2_b3, Zbkc_clmul_cg_cmp_rs1_rs2_b3_str) + 80004f60: 0005b203 ld x4,0(x11) + 80004f64: 01420c63 beq x4,x20,80004f7c + 80004f68: 599022ef jal x5,80007d00 + 80004f6c: 80004f5c .word 0x80004f5c + 80004f70: 00000000 .word 0x00000000 + 80004f74: 8001679b .word 0x8001679b + 80004f78: 00000000 .word 0x00000000 + 80004f7c: 00858593 addi x11,x11,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80004f80: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80004f84: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x1f9817ec78a0021b + 80004f88: 00053203 ld x4,0(x10) + 80004f8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x302967ea010db4d7 + 80004f90: 00053203 ld x4,0(x10) + 80004f94: 00850513 addi x10,x10,8 + +0000000080004f98 : +Zbkc_clmul_cg_cmp_rs1_rs2_b4: + clmul x27, x4, x4 # perform operation + 80004f98: 0a421db3 clmul x27,x4,x4 + # Check if x27 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x27, Zbkc_clmul_cg_cmp_rs1_rs2_b4, Zbkc_clmul_cg_cmp_rs1_rs2_b4_str) + 80004f9c: 0005b683 ld x13,0(x11) + 80004fa0: 01b68c63 beq x13,x27,80004fb8 + 80004fa4: 59d0276f jal x14,80007d40 + 80004fa8: 80004f98 .word 0x80004f98 + 80004fac: 00000000 .word 0x00000000 + 80004fb0: 800167d4 .word 0x800167d4 + 80004fb4: 00000000 .word 0x00000000 + 80004fb8: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xa0601968116412df + 80004fbc: 00053283 ld x5,0(x10) + 80004fc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xa9835d057d057a07 + 80004fc4: 00053283 ld x5,0(x10) + 80004fc8: 00850513 addi x10,x10,8 + +0000000080004fcc : +Zbkc_clmul_cg_cmp_rs1_rs2_b5: + clmul x30, x5, x5 # perform operation + 80004fcc: 0a529f33 clmul x30,x5,x5 + # Check if x30 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x30, Zbkc_clmul_cg_cmp_rs1_rs2_b5, Zbkc_clmul_cg_cmp_rs1_rs2_b5_str) + 80004fd0: 0005b683 ld x13,0(x11) + 80004fd4: 01e68c63 beq x13,x30,80004fec + 80004fd8: 5690276f jal x14,80007d40 + 80004fdc: 80004fcc .word 0x80004fcc + 80004fe0: 00000000 .word 0x00000000 + 80004fe4: 8001680d .word 0x8001680d + 80004fe8: 00000000 .word 0x00000000 + 80004fec: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x2b80c7ccc19292ca + 80004ff0: 00053303 ld x6,0(x10) + 80004ff4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x10fdea70fe4eb5f8 + 80004ff8: 00053303 ld x6,0(x10) + 80004ffc: 00850513 addi x10,x10,8 + +0000000080005000 : +Zbkc_clmul_cg_cmp_rs1_rs2_b6: + clmul x15, x6, x6 # perform operation + 80005000: 0a6317b3 clmul x15,x6,x6 + # Check if x15 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x15, Zbkc_clmul_cg_cmp_rs1_rs2_b6, Zbkc_clmul_cg_cmp_rs1_rs2_b6_str) + 80005004: 0005b683 ld x13,0(x11) + 80005008: 00f68c63 beq x13,x15,80005020 + 8000500c: 5350276f jal x14,80007d40 + 80005010: 80005000 .word 0x80005000 + 80005014: 00000000 .word 0x00000000 + 80005018: 80016846 .word 0x80016846 + 8000501c: 00000000 .word 0x00000000 + 80005020: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x25de19bd9d82b29e + 80005024: 00053383 ld x7,0(x10) + 80005028: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xd8077f71e25d1ed5 + 8000502c: 00053383 ld x7,0(x10) + 80005030: 00850513 addi x10,x10,8 + +0000000080005034 : +Zbkc_clmul_cg_cmp_rs1_rs2_b7: + clmul x29, x7, x7 # perform operation + 80005034: 0a739eb3 clmul x29,x7,x7 + # Check if x29 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x29, Zbkc_clmul_cg_cmp_rs1_rs2_b7, Zbkc_clmul_cg_cmp_rs1_rs2_b7_str) + 80005038: 0005b683 ld x13,0(x11) + 8000503c: 01d68c63 beq x13,x29,80005054 + 80005040: 5010276f jal x14,80007d40 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 8001687f .word 0x8001687f + 80005050: 00000000 .word 0x00000000 + 80005054: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x39b40e3771bddd68 + 80005058: 00053403 ld x8,0(x10) + 8000505c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x047a90aea6c5bf1a + 80005060: 00053403 ld x8,0(x10) + 80005064: 00850513 addi x10,x10,8 + +0000000080005068 : +Zbkc_clmul_cg_cmp_rs1_rs2_b8: + clmul x12, x8, x8 # perform operation + 80005068: 0a841633 clmul x12,x8,x8 + # Check if x12 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x12, Zbkc_clmul_cg_cmp_rs1_rs2_b8, Zbkc_clmul_cg_cmp_rs1_rs2_b8_str) + 8000506c: 0005b683 ld x13,0(x11) + 80005070: 00c68c63 beq x13,x12,80005088 + 80005074: 4cd0276f jal x14,80007d40 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 800168b8 .word 0x800168b8 + 80005084: 00000000 .word 0x00000000 + 80005088: 00858593 addi x11,x11,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7b4ab52b9f1a6c82 + 8000508c: 00053483 ld x9,0(x10) + 80005090: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7875b30ab37abf6c + 80005094: 00053483 ld x9,0(x10) + 80005098: 00850513 addi x10,x10,8 + +000000008000509c : +Zbkc_clmul_cg_cmp_rs1_rs2_b9: + clmul x25, x9, x9 # perform operation + 8000509c: 0a949cb3 clmul x25,x9,x9 + # Check if x25 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b9, Zbkc_clmul_cg_cmp_rs1_rs2_b9_str) + 800050a0: 0005b683 ld x13,0(x11) + 800050a4: 01968c63 beq x13,x25,800050bc + 800050a8: 4990276f jal x14,80007d40 + 800050ac: 8000509c .word 0x8000509c + 800050b0: 00000000 .word 0x00000000 + 800050b4: 800168f1 .word 0x800168f1 + 800050b8: 00000000 .word 0x00000000 + 800050bc: 00858593 addi x11,x11,8 + + mv x9, x10 # switch data pointer register to avoid conflict with test + 800050c0: 00050493 addi x9,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x8398cac7bcffbb56 + 800050c4: 0004b503 ld x10,0(x9) + 800050c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xcf229522e936867d + 800050cc: 0004b503 ld x10,0(x9) + 800050d0: 00848493 addi x9,x9,8 + +00000000800050d4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b10: + clmul x26, x10, x10 # perform operation + 800050d4: 0aa51d33 clmul x26,x10,x10 + # Check if x26 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x26, Zbkc_clmul_cg_cmp_rs1_rs2_b10, Zbkc_clmul_cg_cmp_rs1_rs2_b10_str) + 800050d8: 0005b683 ld x13,0(x11) + 800050dc: 01a68c63 beq x13,x26,800050f4 + 800050e0: 4610276f jal x14,80007d40 + 800050e4: 800050d4 .word 0x800050d4 + 800050e8: 00000000 .word 0x00000000 + 800050ec: 8001692a .word 0x8001692a + 800050f0: 00000000 .word 0x00000000 + 800050f4: 00858593 addi x11,x11,8 + + mv x30, x11 # switch signature pointer register to avoid conflict with test + 800050f8: 00058f13 addi x30,x11,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x1d9a192e4d13d57b + 800050fc: 0004b583 ld x11,0(x9) + 80005100: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x72d8812654d98975 + 80005104: 0004b583 ld x11,0(x9) + 80005108: 00848493 addi x9,x9,8 + +000000008000510c : +Zbkc_clmul_cg_cmp_rs1_rs2_b11: + clmul x10, x11, x11 # perform operation + 8000510c: 0ab59533 clmul x10,x11,x11 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zbkc_clmul_cg_cmp_rs1_rs2_b11, Zbkc_clmul_cg_cmp_rs1_rs2_b11_str) + 80005110: 000f3683 ld x13,0(x30) + 80005114: 00a68c63 beq x13,x10,8000512c + 80005118: 4290276f jal x14,80007d40 + 8000511c: 8000510c .word 0x8000510c + 80005120: 00000000 .word 0x00000000 + 80005124: 80016964 .word 0x80016964 + 80005128: 00000000 .word 0x00000000 + 8000512c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs1: x12 = 0xa232df36f0c7bb10 + 80005130: 0004b603 ld x12,0(x9) + 80005134: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0x5469f0c3fc63cac6 + 80005138: 0004b603 ld x12,0(x9) + 8000513c: 00848493 addi x9,x9,8 + +0000000080005140 : +Zbkc_clmul_cg_cmp_rs1_rs2_b12: + clmul x18, x12, x12 # perform operation + 80005140: 0ac61933 clmul x18,x12,x12 + # Check if x18 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x18, Zbkc_clmul_cg_cmp_rs1_rs2_b12, Zbkc_clmul_cg_cmp_rs1_rs2_b12_str) + 80005144: 000f3683 ld x13,0(x30) + 80005148: 01268c63 beq x13,x18,80005160 + 8000514c: 3f50276f jal x14,80007d40 + 80005150: 80005140 .word 0x80005140 + 80005154: 00000000 .word 0x00000000 + 80005158: 8001699e .word 0x8001699e + 8000515c: 00000000 .word 0x00000000 + 80005160: 008f0f13 addi x30,x30,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005164: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005168: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xbada097074f651e7 + 8000516c: 0004b683 ld x13,0(x9) + 80005170: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xff8456c5542db4aa + 80005174: 0004b683 ld x13,0(x9) + 80005178: 00848493 addi x9,x9,8 + +000000008000517c : +Zbkc_clmul_cg_cmp_rs1_rs2_b13: + clmul x20, x13, x13 # perform operation + 8000517c: 0ad69a33 clmul x20,x13,x13 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zbkc_clmul_cg_cmp_rs1_rs2_b13, Zbkc_clmul_cg_cmp_rs1_rs2_b13_str) + 80005180: 000f3203 ld x4,0(x30) + 80005184: 01420c63 beq x4,x20,8000519c + 80005188: 379022ef jal x5,80007d00 + 8000518c: 8000517c .word 0x8000517c + 80005190: 00000000 .word 0x00000000 + 80005194: 800169d8 .word 0x800169d8 + 80005198: 00000000 .word 0x00000000 + 8000519c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x76fce262fe717c34 + 800051a0: 0004b703 ld x14,0(x9) + 800051a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x3df46b49669820bb + 800051a8: 0004b703 ld x14,0(x9) + 800051ac: 00848493 addi x9,x9,8 + +00000000800051b0 : +Zbkc_clmul_cg_cmp_rs1_rs2_b14: + clmul x19, x14, x14 # perform operation + 800051b0: 0ae719b3 clmul x19,x14,x14 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zbkc_clmul_cg_cmp_rs1_rs2_b14, Zbkc_clmul_cg_cmp_rs1_rs2_b14_str) + 800051b4: 000f3203 ld x4,0(x30) + 800051b8: 01320c63 beq x4,x19,800051d0 + 800051bc: 345022ef jal x5,80007d00 + 800051c0: 800051b0 .word 0x800051b0 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 80016a12 .word 0x80016a12 + 800051cc: 00000000 .word 0x00000000 + 800051d0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x8a55cfb391dc40c7 + 800051d4: 0004b783 ld x15,0(x9) + 800051d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xe470b6d2f73b35a4 + 800051dc: 0004b783 ld x15,0(x9) + 800051e0: 00848493 addi x9,x9,8 + +00000000800051e4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b15: + clmul x24, x15, x15 # perform operation + 800051e4: 0af79c33 clmul x24,x15,x15 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkc_clmul_cg_cmp_rs1_rs2_b15, Zbkc_clmul_cg_cmp_rs1_rs2_b15_str) + 800051e8: 000f3203 ld x4,0(x30) + 800051ec: 01820c63 beq x4,x24,80005204 + 800051f0: 311022ef jal x5,80007d00 + 800051f4: 800051e4 .word 0x800051e4 + 800051f8: 00000000 .word 0x00000000 + 800051fc: 80016a4c .word 0x80016a4c + 80005200: 00000000 .word 0x00000000 + 80005204: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x48e0518ccb498ab6 + 80005208: 0004b803 ld x16,0(x9) + 8000520c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x8112b759f84d3912 + 80005210: 0004b803 ld x16,0(x9) + 80005214: 00848493 addi x9,x9,8 + +0000000080005218 : +Zbkc_clmul_cg_cmp_rs1_rs2_b16: + clmul x8, x16, x16 # perform operation + 80005218: 0b081433 clmul x8,x16,x16 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zbkc_clmul_cg_cmp_rs1_rs2_b16, Zbkc_clmul_cg_cmp_rs1_rs2_b16_str) + 8000521c: 000f3203 ld x4,0(x30) + 80005220: 00820c63 beq x4,x8,80005238 + 80005224: 2dd022ef jal x5,80007d00 + 80005228: 80005218 .word 0x80005218 + 8000522c: 00000000 .word 0x00000000 + 80005230: 80016a86 .word 0x80016a86 + 80005234: 00000000 .word 0x00000000 + 80005238: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x6bfa7b70ff268503 + 8000523c: 0004b883 ld x17,0(x9) + 80005240: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ad03d9427104fa5 + 80005244: 0004b883 ld x17,0(x9) + 80005248: 00848493 addi x9,x9,8 + +000000008000524c : +Zbkc_clmul_cg_cmp_rs1_rs2_b17: + clmul x11, x17, x17 # perform operation + 8000524c: 0b1895b3 clmul x11,x17,x17 + # Check if x11 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x11, Zbkc_clmul_cg_cmp_rs1_rs2_b17, Zbkc_clmul_cg_cmp_rs1_rs2_b17_str) + 80005250: 000f3203 ld x4,0(x30) + 80005254: 00b20c63 beq x4,x11,8000526c + 80005258: 2a9022ef jal x5,80007d00 + 8000525c: 8000524c .word 0x8000524c + 80005260: 00000000 .word 0x00000000 + 80005264: 80016ac0 .word 0x80016ac0 + 80005268: 00000000 .word 0x00000000 + 8000526c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x6b94264d208df423 + 80005270: 0004b903 ld x18,0(x9) + 80005274: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xfad542195afd1013 + 80005278: 0004b903 ld x18,0(x9) + 8000527c: 00848493 addi x9,x9,8 + +0000000080005280 : +Zbkc_clmul_cg_cmp_rs1_rs2_b18: + clmul x3, x18, x18 # perform operation + 80005280: 0b2911b3 clmul x3,x18,x18 + # Check if x3 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x3, Zbkc_clmul_cg_cmp_rs1_rs2_b18, Zbkc_clmul_cg_cmp_rs1_rs2_b18_str) + 80005284: 000f3203 ld x4,0(x30) + 80005288: 00320c63 beq x4,x3,800052a0 + 8000528c: 275022ef jal x5,80007d00 + 80005290: 80005280 .word 0x80005280 + 80005294: 00000000 .word 0x00000000 + 80005298: 80016afa .word 0x80016afa + 8000529c: 00000000 .word 0x00000000 + 800052a0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0359c7f7b5f9c84b + 800052a4: 0004b983 ld x19,0(x9) + 800052a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x8839d48de26c0e5d + 800052ac: 0004b983 ld x19,0(x9) + 800052b0: 00848493 addi x9,x9,8 + +00000000800052b4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b19: + clmul x15, x19, x19 # perform operation + 800052b4: 0b3997b3 clmul x15,x19,x19 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zbkc_clmul_cg_cmp_rs1_rs2_b19, Zbkc_clmul_cg_cmp_rs1_rs2_b19_str) + 800052b8: 000f3203 ld x4,0(x30) + 800052bc: 00f20c63 beq x4,x15,800052d4 + 800052c0: 241022ef jal x5,80007d00 + 800052c4: 800052b4 .word 0x800052b4 + 800052c8: 00000000 .word 0x00000000 + 800052cc: 80016b34 .word 0x80016b34 + 800052d0: 00000000 .word 0x00000000 + 800052d4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x33cdc4f46ed615c3 + 800052d8: 0004ba03 ld x20,0(x9) + 800052dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x1b6f7108b806406c + 800052e0: 0004ba03 ld x20,0(x9) + 800052e4: 00848493 addi x9,x9,8 + +00000000800052e8 : +Zbkc_clmul_cg_cmp_rs1_rs2_b20: + clmul x2, x20, x20 # perform operation + 800052e8: 0b4a1133 clmul x2,x20,x20 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zbkc_clmul_cg_cmp_rs1_rs2_b20, Zbkc_clmul_cg_cmp_rs1_rs2_b20_str) + 800052ec: 000f3203 ld x4,0(x30) + 800052f0: 00220c63 beq x4,x2,80005308 + 800052f4: 20d022ef jal x5,80007d00 + 800052f8: 800052e8 .word 0x800052e8 + 800052fc: 00000000 .word 0x00000000 + 80005300: 80016b6e .word 0x80016b6e + 80005304: 00000000 .word 0x00000000 + 80005308: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x3f268a97cb201da2 + 8000530c: 0004ba83 ld x21,0(x9) + 80005310: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x1a9b2bd04611604c + 80005314: 0004ba83 ld x21,0(x9) + 80005318: 00848493 addi x9,x9,8 + +000000008000531c : +Zbkc_clmul_cg_cmp_rs1_rs2_b21: + clmul x25, x21, x21 # perform operation + 8000531c: 0b5a9cb3 clmul x25,x21,x21 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b21, Zbkc_clmul_cg_cmp_rs1_rs2_b21_str) + 80005320: 000f3203 ld x4,0(x30) + 80005324: 01920c63 beq x4,x25,8000533c + 80005328: 1d9022ef jal x5,80007d00 + 8000532c: 8000531c .word 0x8000531c + 80005330: 00000000 .word 0x00000000 + 80005334: 80016ba8 .word 0x80016ba8 + 80005338: 00000000 .word 0x00000000 + 8000533c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xf281df4fc62693c4 + 80005340: 0004bb03 ld x22,0(x9) + 80005344: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xf8dc1e289169d315 + 80005348: 0004bb03 ld x22,0(x9) + 8000534c: 00848493 addi x9,x9,8 + +0000000080005350 : +Zbkc_clmul_cg_cmp_rs1_rs2_b22: + clmul x12, x22, x22 # perform operation + 80005350: 0b6b1633 clmul x12,x22,x22 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zbkc_clmul_cg_cmp_rs1_rs2_b22, Zbkc_clmul_cg_cmp_rs1_rs2_b22_str) + 80005354: 000f3203 ld x4,0(x30) + 80005358: 00c20c63 beq x4,x12,80005370 + 8000535c: 1a5022ef jal x5,80007d00 + 80005360: 80005350 .word 0x80005350 + 80005364: 00000000 .word 0x00000000 + 80005368: 80016be2 .word 0x80016be2 + 8000536c: 00000000 .word 0x00000000 + 80005370: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x76bc5aa66ee9ab52 + 80005374: 0004bb83 ld x23,0(x9) + 80005378: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x40d141445f1f4a8a + 8000537c: 0004bb83 ld x23,0(x9) + 80005380: 00848493 addi x9,x9,8 + +0000000080005384 : +Zbkc_clmul_cg_cmp_rs1_rs2_b23: + clmul x6, x23, x23 # perform operation + 80005384: 0b7b9333 clmul x6,x23,x23 + # Check if x6 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x6, Zbkc_clmul_cg_cmp_rs1_rs2_b23, Zbkc_clmul_cg_cmp_rs1_rs2_b23_str) + 80005388: 000f3203 ld x4,0(x30) + 8000538c: 00620c63 beq x4,x6,800053a4 + 80005390: 171022ef jal x5,80007d00 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 80016c1c .word 0x80016c1c + 800053a0: 00000000 .word 0x00000000 + 800053a4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xa4c80a25c977fc34 + 800053a8: 0004bc03 ld x24,0(x9) + 800053ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x9afb53fdbe79a3ba + 800053b0: 0004bc03 ld x24,0(x9) + 800053b4: 00848493 addi x9,x9,8 + +00000000800053b8 : +Zbkc_clmul_cg_cmp_rs1_rs2_b24: + clmul x15, x24, x24 # perform operation + 800053b8: 0b8c17b3 clmul x15,x24,x24 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zbkc_clmul_cg_cmp_rs1_rs2_b24, Zbkc_clmul_cg_cmp_rs1_rs2_b24_str) + 800053bc: 000f3203 ld x4,0(x30) + 800053c0: 00f20c63 beq x4,x15,800053d8 + 800053c4: 13d022ef jal x5,80007d00 + 800053c8: 800053b8 .word 0x800053b8 + 800053cc: 00000000 .word 0x00000000 + 800053d0: 80016c56 .word 0x80016c56 + 800053d4: 00000000 .word 0x00000000 + 800053d8: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x62952cc9d40e53e5 + 800053dc: 0004bc83 ld x25,0(x9) + 800053e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x46a4feb40e7ec096 + 800053e4: 0004bc83 ld x25,0(x9) + 800053e8: 00848493 addi x9,x9,8 + +00000000800053ec : +Zbkc_clmul_cg_cmp_rs1_rs2_b25: + clmul x23, x25, x25 # perform operation + 800053ec: 0b9c9bb3 clmul x23,x25,x25 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zbkc_clmul_cg_cmp_rs1_rs2_b25, Zbkc_clmul_cg_cmp_rs1_rs2_b25_str) + 800053f0: 000f3203 ld x4,0(x30) + 800053f4: 01720c63 beq x4,x23,8000540c + 800053f8: 109022ef jal x5,80007d00 + 800053fc: 800053ec .word 0x800053ec + 80005400: 00000000 .word 0x00000000 + 80005404: 80016c90 .word 0x80016c90 + 80005408: 00000000 .word 0x00000000 + 8000540c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2b755b10e21f3408 + 80005410: 0004bd03 ld x26,0(x9) + 80005414: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x9311310d0033b23c + 80005418: 0004bd03 ld x26,0(x9) + 8000541c: 00848493 addi x9,x9,8 + +0000000080005420 : +Zbkc_clmul_cg_cmp_rs1_rs2_b26: + clmul x27, x26, x26 # perform operation + 80005420: 0bad1db3 clmul x27,x26,x26 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zbkc_clmul_cg_cmp_rs1_rs2_b26, Zbkc_clmul_cg_cmp_rs1_rs2_b26_str) + 80005424: 000f3203 ld x4,0(x30) + 80005428: 01b20c63 beq x4,x27,80005440 + 8000542c: 0d5022ef jal x5,80007d00 + 80005430: 80005420 .word 0x80005420 + 80005434: 00000000 .word 0x00000000 + 80005438: 80016cca .word 0x80016cca + 8000543c: 00000000 .word 0x00000000 + 80005440: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x9188b6fd61a57946 + 80005444: 0004bd83 ld x27,0(x9) + 80005448: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xc699ddd670f5e0a6 + 8000544c: 0004bd83 ld x27,0(x9) + 80005450: 00848493 addi x9,x9,8 + +0000000080005454 : +Zbkc_clmul_cg_cmp_rs1_rs2_b27: + clmul x25, x27, x27 # perform operation + 80005454: 0bbd9cb3 clmul x25,x27,x27 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zbkc_clmul_cg_cmp_rs1_rs2_b27, Zbkc_clmul_cg_cmp_rs1_rs2_b27_str) + 80005458: 000f3203 ld x4,0(x30) + 8000545c: 01920c63 beq x4,x25,80005474 + 80005460: 0a1022ef jal x5,80007d00 + 80005464: 80005454 .word 0x80005454 + 80005468: 00000000 .word 0x00000000 + 8000546c: 80016d04 .word 0x80016d04 + 80005470: 00000000 .word 0x00000000 + 80005474: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x549f83dca0b06ba6 + 80005478: 0004be03 ld x28,0(x9) + 8000547c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x39d29fcd84d89853 + 80005480: 0004be03 ld x28,0(x9) + 80005484: 00848493 addi x9,x9,8 + +0000000080005488 : +Zbkc_clmul_cg_cmp_rs1_rs2_b28: + clmul x11, x28, x28 # perform operation + 80005488: 0bce15b3 clmul x11,x28,x28 + # Check if x11 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x11, Zbkc_clmul_cg_cmp_rs1_rs2_b28, Zbkc_clmul_cg_cmp_rs1_rs2_b28_str) + 8000548c: 000f3203 ld x4,0(x30) + 80005490: 00b20c63 beq x4,x11,800054a8 + 80005494: 06d022ef jal x5,80007d00 + 80005498: 80005488 .word 0x80005488 + 8000549c: 00000000 .word 0x00000000 + 800054a0: 80016d3e .word 0x80016d3e + 800054a4: 00000000 .word 0x00000000 + 800054a8: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xb670d676a0d82068 + 800054ac: 0004be83 ld x29,0(x9) + 800054b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x3c01b7c450db60c8 + 800054b4: 0004be83 ld x29,0(x9) + 800054b8: 00848493 addi x9,x9,8 + +00000000800054bc : +Zbkc_clmul_cg_cmp_rs1_rs2_b29: + clmul x14, x29, x29 # perform operation + 800054bc: 0bde9733 clmul x14,x29,x29 + # Check if x14 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x14, Zbkc_clmul_cg_cmp_rs1_rs2_b29, Zbkc_clmul_cg_cmp_rs1_rs2_b29_str) + 800054c0: 000f3203 ld x4,0(x30) + 800054c4: 00e20c63 beq x4,x14,800054dc + 800054c8: 039022ef jal x5,80007d00 + 800054cc: 800054bc .word 0x800054bc + 800054d0: 00000000 .word 0x00000000 + 800054d4: 80016d78 .word 0x80016d78 + 800054d8: 00000000 .word 0x00000000 + 800054dc: 008f0f13 addi x30,x30,8 + + mv x19, x30 # switch signature pointer register to avoid conflict with test + 800054e0: 000f0993 addi x19,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xe9b0350ad69e0c49 + 800054e4: 0004bf03 ld x30,0(x9) + 800054e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xe542e8a7eefa3e42 + 800054ec: 0004bf03 ld x30,0(x9) + 800054f0: 00848493 addi x9,x9,8 + +00000000800054f4 : +Zbkc_clmul_cg_cmp_rs1_rs2_b30: + clmul x7, x30, x30 # perform operation + 800054f4: 0bef13b3 clmul x7,x30,x30 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zbkc_clmul_cg_cmp_rs1_rs2_b30, Zbkc_clmul_cg_cmp_rs1_rs2_b30_str) + 800054f8: 0009b203 ld x4,0(x19) + 800054fc: 00720c63 beq x4,x7,80005514 + 80005500: 001022ef jal x5,80007d00 + 80005504: 800054f4 .word 0x800054f4 + 80005508: 00000000 .word 0x00000000 + 8000550c: 80016db2 .word 0x80016db2 + 80005510: 00000000 .word 0x00000000 + 80005514: 00898993 addi x19,x19,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x08da41a45fc78e4a + 80005518: 0004bf83 ld x31,0(x9) + 8000551c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x61973c97f21148a7 + 80005520: 0004bf83 ld x31,0(x9) + 80005524: 00848493 addi x9,x9,8 + +0000000080005528 : +Zbkc_clmul_cg_cmp_rs1_rs2_b31: + clmul x12, x31, x31 # perform operation + 80005528: 0bff9633 clmul x12,x31,x31 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zbkc_clmul_cg_cmp_rs1_rs2_b31, Zbkc_clmul_cg_cmp_rs1_rs2_b31_str) + 8000552c: 0009b203 ld x4,0(x19) + 80005530: 00c20c63 beq x4,x12,80005548 + 80005534: 7cc022ef jal x5,80007d00 + 80005538: 80005528 .word 0x80005528 + 8000553c: 00000000 .word 0x00000000 + 80005540: 80016dec .word 0x80016dec + 80005544: 00000000 .word 0x00000000 + 80005548: 00898993 addi x19,x19,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xe6d43599526a27c8 + 8000554c: 0004b003 ld x0,0(x9) + 80005550: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x90d9b2f945781e13 + 80005554: 0004bc83 ld x25,0(x9) + 80005558: 00848493 addi x9,x9,8 + +000000008000555c : +Zbkc_clmul_cg_cmp_rd_rs1_b0: + clmul x0, x0, x25 # perform operation + 8000555c: 0b901033 clmul x0,x0,x25 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zbkc_clmul_cg_cmp_rd_rs1_b0, Zbkc_clmul_cg_cmp_rd_rs1_b0_str) + 80005560: 0009b203 ld x4,0(x19) + 80005564: 00020c63 beq x4,x0,8000557c + 80005568: 798022ef jal x5,80007d00 + 8000556c: 8000555c .word 0x8000555c + 80005570: 00000000 .word 0x00000000 + 80005574: 80016e26 .word 0x80016e26 + 80005578: 00000000 .word 0x00000000 + 8000557c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x6f315434ff96ec64 + 80005580: 0004b083 ld x1,0(x9) + 80005584: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xdb4ca887a91d8244 + 80005588: 0004be03 ld x28,0(x9) + 8000558c: 00848493 addi x9,x9,8 + +0000000080005590 : +Zbkc_clmul_cg_cmp_rd_rs1_b1: + clmul x1, x1, x28 # perform operation + 80005590: 0bc090b3 clmul x1,x1,x28 + # Check if x1 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x1, Zbkc_clmul_cg_cmp_rd_rs1_b1, Zbkc_clmul_cg_cmp_rd_rs1_b1_str) + 80005594: 0009b203 ld x4,0(x19) + 80005598: 00120c63 beq x4,x1,800055b0 + 8000559c: 764022ef jal x5,80007d00 + 800055a0: 80005590 .word 0x80005590 + 800055a4: 00000000 .word 0x00000000 + 800055a8: 80016e5e .word 0x80016e5e + 800055ac: 00000000 .word 0x00000000 + 800055b0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x0acd4f03590e0c3b + 800055b4: 0004b103 ld x2,0(x9) + 800055b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x036a87fb4f472e9b + 800055bc: 0004b683 ld x13,0(x9) + 800055c0: 00848493 addi x9,x9,8 + +00000000800055c4 : +Zbkc_clmul_cg_cmp_rd_rs1_b2: + clmul x2, x2, x13 # perform operation + 800055c4: 0ad11133 clmul x2,x2,x13 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zbkc_clmul_cg_cmp_rd_rs1_b2, Zbkc_clmul_cg_cmp_rd_rs1_b2_str) + 800055c8: 0009b203 ld x4,0(x19) + 800055cc: 00220c63 beq x4,x2,800055e4 + 800055d0: 730022ef jal x5,80007d00 + 800055d4: 800055c4 .word 0x800055c4 + 800055d8: 00000000 .word 0x00000000 + 800055dc: 80016e96 .word 0x80016e96 + 800055e0: 00000000 .word 0x00000000 + 800055e4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xfb807e44c367f8e4 + 800055e8: 0004b183 ld x3,0(x9) + 800055ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x5ff806d9b1d31a7f + 800055f0: 0004ba03 ld x20,0(x9) + 800055f4: 00848493 addi x9,x9,8 + +00000000800055f8 : +Zbkc_clmul_cg_cmp_rd_rs1_b3: + clmul x3, x3, x20 # perform operation + 800055f8: 0b4191b3 clmul x3,x3,x20 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zbkc_clmul_cg_cmp_rd_rs1_b3, Zbkc_clmul_cg_cmp_rd_rs1_b3_str) + 800055fc: 0009b203 ld x4,0(x19) + 80005600: 00320c63 beq x4,x3,80005618 + 80005604: 6fc022ef jal x5,80007d00 + 80005608: 800055f8 .word 0x800055f8 + 8000560c: 00000000 .word 0x00000000 + 80005610: 80016ece .word 0x80016ece + 80005614: 00000000 .word 0x00000000 + 80005618: 00898993 addi x19,x19,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 8000561c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005620: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x1d5af134ad0130be + 80005624: 0004b203 ld x4,0(x9) + 80005628: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x23a1096a550a44dd + 8000562c: 0004b083 ld x1,0(x9) + 80005630: 00848493 addi x9,x9,8 + +0000000080005634 : +Zbkc_clmul_cg_cmp_rd_rs1_b4: + clmul x4, x4, x1 # perform operation + 80005634: 0a121233 clmul x4,x4,x1 + # Check if x4 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x4, Zbkc_clmul_cg_cmp_rd_rs1_b4, Zbkc_clmul_cg_cmp_rd_rs1_b4_str) + 80005638: 0009b683 ld x13,0(x19) + 8000563c: 00468c63 beq x13,x4,80005654 + 80005640: 7000276f jal x14,80007d40 + 80005644: 80005634 .word 0x80005634 + 80005648: 00000000 .word 0x00000000 + 8000564c: 80016f06 .word 0x80016f06 + 80005650: 00000000 .word 0x00000000 + 80005654: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x01e753272afa21b7 + 80005658: 0004b283 ld x5,0(x9) + 8000565c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xf36dc606fcc5c2eb + 80005660: 0004bf83 ld x31,0(x9) + 80005664: 00848493 addi x9,x9,8 + +0000000080005668 : +Zbkc_clmul_cg_cmp_rd_rs1_b5: + clmul x5, x5, x31 # perform operation + 80005668: 0bf292b3 clmul x5,x5,x31 + # Check if x5 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x5, Zbkc_clmul_cg_cmp_rd_rs1_b5, Zbkc_clmul_cg_cmp_rd_rs1_b5_str) + 8000566c: 0009b683 ld x13,0(x19) + 80005670: 00568c63 beq x13,x5,80005688 + 80005674: 6cc0276f jal x14,80007d40 + 80005678: 80005668 .word 0x80005668 + 8000567c: 00000000 .word 0x00000000 + 80005680: 80016f3e .word 0x80016f3e + 80005684: 00000000 .word 0x00000000 + 80005688: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x675b9fdd32356381 + 8000568c: 0004b303 ld x6,0(x9) + 80005690: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xe6712bfc5de808e3 + 80005694: 0004b383 ld x7,0(x9) + 80005698: 00848493 addi x9,x9,8 + +000000008000569c : +Zbkc_clmul_cg_cmp_rd_rs1_b6: + clmul x6, x6, x7 # perform operation + 8000569c: 0a731333 clmul x6,x6,x7 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zbkc_clmul_cg_cmp_rd_rs1_b6, Zbkc_clmul_cg_cmp_rd_rs1_b6_str) + 800056a0: 0009b683 ld x13,0(x19) + 800056a4: 00668c63 beq x13,x6,800056bc + 800056a8: 6980276f jal x14,80007d40 + 800056ac: 8000569c .word 0x8000569c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 80016f76 .word 0x80016f76 + 800056b8: 00000000 .word 0x00000000 + 800056bc: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xe5e1ba41be4ce6d3 + 800056c0: 0004b383 ld x7,0(x9) + 800056c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5baa7bccfde9957f + 800056c8: 0004bb03 ld x22,0(x9) + 800056cc: 00848493 addi x9,x9,8 + +00000000800056d0 : +Zbkc_clmul_cg_cmp_rd_rs1_b7: + clmul x7, x7, x22 # perform operation + 800056d0: 0b6393b3 clmul x7,x7,x22 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zbkc_clmul_cg_cmp_rd_rs1_b7, Zbkc_clmul_cg_cmp_rd_rs1_b7_str) + 800056d4: 0009b683 ld x13,0(x19) + 800056d8: 00768c63 beq x13,x7,800056f0 + 800056dc: 6640276f jal x14,80007d40 + 800056e0: 800056d0 .word 0x800056d0 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 80016fae .word 0x80016fae + 800056ec: 00000000 .word 0x00000000 + 800056f0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xef0f3307a6bcdc69 + 800056f4: 0004b403 ld x8,0(x9) + 800056f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x12) # load rs2: x12 = 0xc6f04e3904615f63 + 800056fc: 0004b603 ld x12,0(x9) + 80005700: 00848493 addi x9,x9,8 + +0000000080005704 : +Zbkc_clmul_cg_cmp_rd_rs1_b8: + clmul x8, x8, x12 # perform operation + 80005704: 0ac41433 clmul x8,x8,x12 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zbkc_clmul_cg_cmp_rd_rs1_b8, Zbkc_clmul_cg_cmp_rd_rs1_b8_str) + 80005708: 0009b683 ld x13,0(x19) + 8000570c: 00868c63 beq x13,x8,80005724 + 80005710: 6300276f jal x14,80007d40 + 80005714: 80005704 .word 0x80005704 + 80005718: 00000000 .word 0x00000000 + 8000571c: 80016fe6 .word 0x80016fe6 + 80005720: 00000000 .word 0x00000000 + 80005724: 00898993 addi x19,x19,8 + + mv x25, x9 # switch data pointer register to avoid conflict with test + 80005728: 00048c93 addi x25,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0xa436011fdeed2b56 + 8000572c: 000cb483 ld x9,0(x25) + 80005730: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0x77b8bf4025c32974 + 80005734: 000cb103 ld x2,0(x25) + 80005738: 008c8c93 addi x25,x25,8 + +000000008000573c : +Zbkc_clmul_cg_cmp_rd_rs1_b9: + clmul x9, x9, x2 # perform operation + 8000573c: 0a2494b3 clmul x9,x9,x2 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zbkc_clmul_cg_cmp_rd_rs1_b9, Zbkc_clmul_cg_cmp_rd_rs1_b9_str) + 80005740: 0009b683 ld x13,0(x19) + 80005744: 00968c63 beq x13,x9,8000575c + 80005748: 5f80276f jal x14,80007d40 + 8000574c: 8000573c .word 0x8000573c + 80005750: 00000000 .word 0x00000000 + 80005754: 8001701e .word 0x8001701e + 80005758: 00000000 .word 0x00000000 + 8000575c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0xcaddc161514c8c78 + 80005760: 000cb503 ld x10,0(x25) + 80005764: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xeee369f33daf2d76 + 80005768: 000cbf83 ld x31,0(x25) + 8000576c: 008c8c93 addi x25,x25,8 + +0000000080005770 : +Zbkc_clmul_cg_cmp_rd_rs1_b10: + clmul x10, x10, x31 # perform operation + 80005770: 0bf51533 clmul x10,x10,x31 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zbkc_clmul_cg_cmp_rd_rs1_b10, Zbkc_clmul_cg_cmp_rd_rs1_b10_str) + 80005774: 0009b683 ld x13,0(x19) + 80005778: 00a68c63 beq x13,x10,80005790 + 8000577c: 5c40276f jal x14,80007d40 + 80005780: 80005770 .word 0x80005770 + 80005784: 00000000 .word 0x00000000 + 80005788: 80017056 .word 0x80017056 + 8000578c: 00000000 .word 0x00000000 + 80005790: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x32acfbb35ef4106d + 80005794: 000cb583 ld x11,0(x25) + 80005798: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x990a1494fc63f1e9 + 8000579c: 000cb603 ld x12,0(x25) + 800057a0: 008c8c93 addi x25,x25,8 + +00000000800057a4 : +Zbkc_clmul_cg_cmp_rd_rs1_b11: + clmul x11, x11, x12 # perform operation + 800057a4: 0ac595b3 clmul x11,x11,x12 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zbkc_clmul_cg_cmp_rd_rs1_b11, Zbkc_clmul_cg_cmp_rd_rs1_b11_str) + 800057a8: 0009b683 ld x13,0(x19) + 800057ac: 00b68c63 beq x13,x11,800057c4 + 800057b0: 5900276f jal x14,80007d40 + 800057b4: 800057a4 .word 0x800057a4 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 8001708f .word 0x8001708f + 800057c0: 00000000 .word 0x00000000 + 800057c4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x3b0d90948d2298af + 800057c8: 000cb603 ld x12,0(x25) + 800057cc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x0174679bf6937b02 + 800057d0: 000cbd03 ld x26,0(x25) + 800057d4: 008c8c93 addi x25,x25,8 + +00000000800057d8 : +Zbkc_clmul_cg_cmp_rd_rs1_b12: + clmul x12, x12, x26 # perform operation + 800057d8: 0ba61633 clmul x12,x12,x26 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkc_clmul_cg_cmp_rd_rs1_b12, Zbkc_clmul_cg_cmp_rd_rs1_b12_str) + 800057dc: 0009b683 ld x13,0(x19) + 800057e0: 00c68c63 beq x13,x12,800057f8 + 800057e4: 55c0276f jal x14,80007d40 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 800170c8 .word 0x800170c8 + 800057f4: 00000000 .word 0x00000000 + 800057f8: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057fc: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005800: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x645c8f4d4260521c + 80005804: 000cb683 ld x13,0(x25) + 80005808: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x5) # load rs2: x5 = 0x08fb8aadf996eb9d + 8000580c: 000cb283 ld x5,0(x25) + 80005810: 008c8c93 addi x25,x25,8 + +0000000080005814 : +Zbkc_clmul_cg_cmp_rd_rs1_b13: + clmul x13, x13, x5 # perform operation + 80005814: 0a5696b3 clmul x13,x13,x5 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zbkc_clmul_cg_cmp_rd_rs1_b13, Zbkc_clmul_cg_cmp_rd_rs1_b13_str) + 80005818: 0009b383 ld x7,0(x19) + 8000581c: 00d38c63 beq x7,x13,80005834 + 80005820: 4f80246f jal x8,80007d18 + 80005824: 80005814 .word 0x80005814 + 80005828: 00000000 .word 0x00000000 + 8000582c: 80017101 .word 0x80017101 + 80005830: 00000000 .word 0x00000000 + 80005834: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x43d4307f2e2aab87 + 80005838: 000cb703 ld x14,0(x25) + 8000583c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x8d626ec1eb3ea221 + 80005840: 000cbe83 ld x29,0(x25) + 80005844: 008c8c93 addi x25,x25,8 + +0000000080005848 : +Zbkc_clmul_cg_cmp_rd_rs1_b14: + clmul x14, x14, x29 # perform operation + 80005848: 0bd71733 clmul x14,x14,x29 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zbkc_clmul_cg_cmp_rd_rs1_b14, Zbkc_clmul_cg_cmp_rd_rs1_b14_str) + 8000584c: 0009b383 ld x7,0(x19) + 80005850: 00e38c63 beq x7,x14,80005868 + 80005854: 4c40246f jal x8,80007d18 + 80005858: 80005848 .word 0x80005848 + 8000585c: 00000000 .word 0x00000000 + 80005860: 8001713a .word 0x8001713a + 80005864: 00000000 .word 0x00000000 + 80005868: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x2680c3ece4b71744 + 8000586c: 000cb783 ld x15,0(x25) + 80005870: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0x090536edd0e40018 + 80005874: 000cb803 ld x16,0(x25) + 80005878: 008c8c93 addi x25,x25,8 + +000000008000587c : +Zbkc_clmul_cg_cmp_rd_rs1_b15: + clmul x15, x15, x16 # perform operation + 8000587c: 0b0797b3 clmul x15,x15,x16 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zbkc_clmul_cg_cmp_rd_rs1_b15, Zbkc_clmul_cg_cmp_rd_rs1_b15_str) + 80005880: 0009b383 ld x7,0(x19) + 80005884: 00f38c63 beq x7,x15,8000589c + 80005888: 4900246f jal x8,80007d18 + 8000588c: 8000587c .word 0x8000587c + 80005890: 00000000 .word 0x00000000 + 80005894: 80017173 .word 0x80017173 + 80005898: 00000000 .word 0x00000000 + 8000589c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0xf0a4cd292e4079c3 + 800058a0: 000cb803 ld x16,0(x25) + 800058a4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x4e9e0d59c22f1d12 + 800058a8: 000cba83 ld x21,0(x25) + 800058ac: 008c8c93 addi x25,x25,8 + +00000000800058b0 : +Zbkc_clmul_cg_cmp_rd_rs1_b16: + clmul x16, x16, x21 # perform operation + 800058b0: 0b581833 clmul x16,x16,x21 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkc_clmul_cg_cmp_rd_rs1_b16, Zbkc_clmul_cg_cmp_rd_rs1_b16_str) + 800058b4: 0009b383 ld x7,0(x19) + 800058b8: 01038c63 beq x7,x16,800058d0 + 800058bc: 45c0246f jal x8,80007d18 + 800058c0: 800058b0 .word 0x800058b0 + 800058c4: 00000000 .word 0x00000000 + 800058c8: 800171ac .word 0x800171ac + 800058cc: 00000000 .word 0x00000000 + 800058d0: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xb9a48090878bf27a + 800058d4: 000cb883 ld x17,0(x25) + 800058d8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x9b5ba4c32261afd8 + 800058dc: 000cb903 ld x18,0(x25) + 800058e0: 008c8c93 addi x25,x25,8 + +00000000800058e4 : +Zbkc_clmul_cg_cmp_rd_rs1_b17: + clmul x17, x17, x18 # perform operation + 800058e4: 0b2898b3 clmul x17,x17,x18 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkc_clmul_cg_cmp_rd_rs1_b17, Zbkc_clmul_cg_cmp_rd_rs1_b17_str) + 800058e8: 0009b383 ld x7,0(x19) + 800058ec: 01138c63 beq x7,x17,80005904 + 800058f0: 4280246f jal x8,80007d18 + 800058f4: 800058e4 .word 0x800058e4 + 800058f8: 00000000 .word 0x00000000 + 800058fc: 800171e5 .word 0x800171e5 + 80005900: 00000000 .word 0x00000000 + 80005904: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x20eab7264465e45d + 80005908: 000cb903 ld x18,0(x25) + 8000590c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x282b845834d4beea + 80005910: 000cb303 ld x6,0(x25) + 80005914: 008c8c93 addi x25,x25,8 + +0000000080005918 : +Zbkc_clmul_cg_cmp_rd_rs1_b18: + clmul x18, x18, x6 # perform operation + 80005918: 0a691933 clmul x18,x18,x6 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkc_clmul_cg_cmp_rd_rs1_b18, Zbkc_clmul_cg_cmp_rd_rs1_b18_str) + 8000591c: 0009b383 ld x7,0(x19) + 80005920: 01238c63 beq x7,x18,80005938 + 80005924: 3f40246f jal x8,80007d18 + 80005928: 80005918 .word 0x80005918 + 8000592c: 00000000 .word 0x00000000 + 80005930: 8001721e .word 0x8001721e + 80005934: 00000000 .word 0x00000000 + 80005938: 00898993 addi x19,x19,8 + + mv x16, x19 # switch signature pointer register to avoid conflict with test + 8000593c: 00098813 addi x16,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x8cee938784fe4e2e + 80005940: 000cb983 ld x19,0(x25) + 80005944: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x5ba7de506c643ec0 + 80005948: 000cb303 ld x6,0(x25) + 8000594c: 008c8c93 addi x25,x25,8 + +0000000080005950 : +Zbkc_clmul_cg_cmp_rd_rs1_b19: + clmul x19, x19, x6 # perform operation + 80005950: 0a6999b3 clmul x19,x19,x6 + # Check if x19 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x19, Zbkc_clmul_cg_cmp_rd_rs1_b19, Zbkc_clmul_cg_cmp_rd_rs1_b19_str) + 80005954: 00083383 ld x7,0(x16) + 80005958: 01338c63 beq x7,x19,80005970 + 8000595c: 3bc0246f jal x8,80007d18 + 80005960: 80005950 .word 0x80005950 + 80005964: 00000000 .word 0x00000000 + 80005968: 80017257 .word 0x80017257 + 8000596c: 00000000 .word 0x00000000 + 80005970: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x083784362d850432 + 80005974: 000cba03 ld x20,0(x25) + 80005978: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x7f083aabe46911e2 + 8000597c: 000cbd83 ld x27,0(x25) + 80005980: 008c8c93 addi x25,x25,8 + +0000000080005984 : +Zbkc_clmul_cg_cmp_rd_rs1_b20: + clmul x20, x20, x27 # perform operation + 80005984: 0bba1a33 clmul x20,x20,x27 + # Check if x20 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x20, Zbkc_clmul_cg_cmp_rd_rs1_b20, Zbkc_clmul_cg_cmp_rd_rs1_b20_str) + 80005988: 00083383 ld x7,0(x16) + 8000598c: 01438c63 beq x7,x20,800059a4 + 80005990: 3880246f jal x8,80007d18 + 80005994: 80005984 .word 0x80005984 + 80005998: 00000000 .word 0x00000000 + 8000599c: 80017290 .word 0x80017290 + 800059a0: 00000000 .word 0x00000000 + 800059a4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x12c49214eaf7b564 + 800059a8: 000cba83 ld x21,0(x25) + 800059ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x4) # load rs2: x4 = 0x1584d1df510e98e7 + 800059b0: 000cb203 ld x4,0(x25) + 800059b4: 008c8c93 addi x25,x25,8 + +00000000800059b8 : +Zbkc_clmul_cg_cmp_rd_rs1_b21: + clmul x21, x21, x4 # perform operation + 800059b8: 0a4a9ab3 clmul x21,x21,x4 + # Check if x21 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x21, Zbkc_clmul_cg_cmp_rd_rs1_b21, Zbkc_clmul_cg_cmp_rd_rs1_b21_str) + 800059bc: 00083383 ld x7,0(x16) + 800059c0: 01538c63 beq x7,x21,800059d8 + 800059c4: 3540246f jal x8,80007d18 + 800059c8: 800059b8 .word 0x800059b8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 800172c9 .word 0x800172c9 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x920ee9a5fc881d78 + 800059dc: 000cbb03 ld x22,0(x25) + 800059e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0xc62aa8a5cb1dde1c + 800059e4: 000cbd83 ld x27,0(x25) + 800059e8: 008c8c93 addi x25,x25,8 + +00000000800059ec : +Zbkc_clmul_cg_cmp_rd_rs1_b22: + clmul x22, x22, x27 # perform operation + 800059ec: 0bbb1b33 clmul x22,x22,x27 + # Check if x22 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x22, Zbkc_clmul_cg_cmp_rd_rs1_b22, Zbkc_clmul_cg_cmp_rd_rs1_b22_str) + 800059f0: 00083383 ld x7,0(x16) + 800059f4: 01638c63 beq x7,x22,80005a0c + 800059f8: 3200246f jal x8,80007d18 + 800059fc: 800059ec .word 0x800059ec + 80005a00: 00000000 .word 0x00000000 + 80005a04: 80017302 .word 0x80017302 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x0ccc22c0d7b37976 + 80005a10: 000cbb83 ld x23,0(x25) + 80005a14: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0xe8b9ae20bc9a4f5e + 80005a18: 000cba83 ld x21,0(x25) + 80005a1c: 008c8c93 addi x25,x25,8 + +0000000080005a20 : +Zbkc_clmul_cg_cmp_rd_rs1_b23: + clmul x23, x23, x21 # perform operation + 80005a20: 0b5b9bb3 clmul x23,x23,x21 + # Check if x23 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x23, Zbkc_clmul_cg_cmp_rd_rs1_b23, Zbkc_clmul_cg_cmp_rd_rs1_b23_str) + 80005a24: 00083383 ld x7,0(x16) + 80005a28: 01738c63 beq x7,x23,80005a40 + 80005a2c: 2ec0246f jal x8,80007d18 + 80005a30: 80005a20 .word 0x80005a20 + 80005a34: 00000000 .word 0x00000000 + 80005a38: 8001733b .word 0x8001733b + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xc24afd87ee4f0aa0 + 80005a44: 000cbc03 ld x24,0(x25) + 80005a48: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x09ecfa3e411f3e9f + 80005a4c: 000cb603 ld x12,0(x25) + 80005a50: 008c8c93 addi x25,x25,8 + +0000000080005a54 : +Zbkc_clmul_cg_cmp_rd_rs1_b24: + clmul x24, x24, x12 # perform operation + 80005a54: 0acc1c33 clmul x24,x24,x12 + # Check if x24 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x24, Zbkc_clmul_cg_cmp_rd_rs1_b24, Zbkc_clmul_cg_cmp_rd_rs1_b24_str) + 80005a58: 00083383 ld x7,0(x16) + 80005a5c: 01838c63 beq x7,x24,80005a74 + 80005a60: 2b80246f jal x8,80007d18 + 80005a64: 80005a54 .word 0x80005a54 + 80005a68: 00000000 .word 0x00000000 + 80005a6c: 80017374 .word 0x80017374 + 80005a70: 00000000 .word 0x00000000 + 80005a74: 00880813 addi x16,x16,8 + + mv x28, x25 # switch data pointer register to avoid conflict with test + 80005a78: 000c8e13 addi x28,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0xf4155021fe9370bf + 80005a7c: 000e3c83 ld x25,0(x28) + 80005a80: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x51a874ec2a673fbd + 80005a84: 000e3a03 ld x20,0(x28) + 80005a88: 008e0e13 addi x28,x28,8 + +0000000080005a8c : +Zbkc_clmul_cg_cmp_rd_rs1_b25: + clmul x25, x25, x20 # perform operation + 80005a8c: 0b4c9cb3 clmul x25,x25,x20 + # Check if x25 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x25, Zbkc_clmul_cg_cmp_rd_rs1_b25, Zbkc_clmul_cg_cmp_rd_rs1_b25_str) + 80005a90: 00083383 ld x7,0(x16) + 80005a94: 01938c63 beq x7,x25,80005aac + 80005a98: 2800246f jal x8,80007d18 + 80005a9c: 80005a8c .word 0x80005a8c + 80005aa0: 00000000 .word 0x00000000 + 80005aa4: 800173ad .word 0x800173ad + 80005aa8: 00000000 .word 0x00000000 + 80005aac: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x12899beff4bdab18 + 80005ab0: 000e3d03 ld x26,0(x28) + 80005ab4: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x3) # load rs2: x3 = 0xb1b2028ecdf1817f + 80005ab8: 000e3183 ld x3,0(x28) + 80005abc: 008e0e13 addi x28,x28,8 + +0000000080005ac0 : +Zbkc_clmul_cg_cmp_rd_rs1_b26: + clmul x26, x26, x3 # perform operation + 80005ac0: 0a3d1d33 clmul x26,x26,x3 + # Check if x26 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x26, Zbkc_clmul_cg_cmp_rd_rs1_b26, Zbkc_clmul_cg_cmp_rd_rs1_b26_str) + 80005ac4: 00083383 ld x7,0(x16) + 80005ac8: 01a38c63 beq x7,x26,80005ae0 + 80005acc: 24c0246f jal x8,80007d18 + 80005ad0: 80005ac0 .word 0x80005ac0 + 80005ad4: 00000000 .word 0x00000000 + 80005ad8: 800173e6 .word 0x800173e6 + 80005adc: 00000000 .word 0x00000000 + 80005ae0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0xaacb9b3f4fb6da86 + 80005ae4: 000e3d83 ld x27,0(x28) + 80005ae8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x31) # load rs2: x31 = 0x6ddf8d1760c7e568 + 80005aec: 000e3f83 ld x31,0(x28) + 80005af0: 008e0e13 addi x28,x28,8 + +0000000080005af4 : +Zbkc_clmul_cg_cmp_rd_rs1_b27: + clmul x27, x27, x31 # perform operation + 80005af4: 0bfd9db3 clmul x27,x27,x31 + # Check if x27 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x27, Zbkc_clmul_cg_cmp_rd_rs1_b27, Zbkc_clmul_cg_cmp_rd_rs1_b27_str) + 80005af8: 00083383 ld x7,0(x16) + 80005afc: 01b38c63 beq x7,x27,80005b14 + 80005b00: 2180246f jal x8,80007d18 + 80005b04: 80005af4 .word 0x80005af4 + 80005b08: 00000000 .word 0x00000000 + 80005b0c: 8001741f .word 0x8001741f + 80005b10: 00000000 .word 0x00000000 + 80005b14: 00880813 addi x16,x16,8 + + mv x20, x28 # switch data pointer register to avoid conflict with test + 80005b18: 000e0a13 addi x20,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xe78c59b98c0d8b41 + 80005b1c: 000a3e03 ld x28,0(x20) + 80005b20: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x829b12d7bd5bd136 + 80005b24: 000a3103 ld x2,0(x20) + 80005b28: 008a0a13 addi x20,x20,8 + +0000000080005b2c : +Zbkc_clmul_cg_cmp_rd_rs1_b28: + clmul x28, x28, x2 # perform operation + 80005b2c: 0a2e1e33 clmul x28,x28,x2 + # Check if x28 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x28, Zbkc_clmul_cg_cmp_rd_rs1_b28, Zbkc_clmul_cg_cmp_rd_rs1_b28_str) + 80005b30: 00083383 ld x7,0(x16) + 80005b34: 01c38c63 beq x7,x28,80005b4c + 80005b38: 1e00246f jal x8,80007d18 + 80005b3c: 80005b2c .word 0x80005b2c + 80005b40: 00000000 .word 0x00000000 + 80005b44: 80017458 .word 0x80017458 + 80005b48: 00000000 .word 0x00000000 + 80005b4c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xfe6e1e4c01c16555 + 80005b50: 000a3e83 ld x29,0(x20) + 80005b54: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x9605bead83d1eba5 + 80005b58: 000a3603 ld x12,0(x20) + 80005b5c: 008a0a13 addi x20,x20,8 + +0000000080005b60 : +Zbkc_clmul_cg_cmp_rd_rs1_b29: + clmul x29, x29, x12 # perform operation + 80005b60: 0ace9eb3 clmul x29,x29,x12 + # Check if x29 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x29, Zbkc_clmul_cg_cmp_rd_rs1_b29, Zbkc_clmul_cg_cmp_rd_rs1_b29_str) + 80005b64: 00083383 ld x7,0(x16) + 80005b68: 01d38c63 beq x7,x29,80005b80 + 80005b6c: 1ac0246f jal x8,80007d18 + 80005b70: 80005b60 .word 0x80005b60 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 80017491 .word 0x80017491 + 80005b7c: 00000000 .word 0x00000000 + 80005b80: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xede755984ec6e3c4 + 80005b84: 000a3f03 ld x30,0(x20) + 80005b88: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xcfdf83d9c8c7d450 + 80005b8c: 000a3103 ld x2,0(x20) + 80005b90: 008a0a13 addi x20,x20,8 + +0000000080005b94 : +Zbkc_clmul_cg_cmp_rd_rs1_b30: + clmul x30, x30, x2 # perform operation + 80005b94: 0a2f1f33 clmul x30,x30,x2 + # Check if x30 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x30, Zbkc_clmul_cg_cmp_rd_rs1_b30, Zbkc_clmul_cg_cmp_rd_rs1_b30_str) + 80005b98: 00083383 ld x7,0(x16) + 80005b9c: 01e38c63 beq x7,x30,80005bb4 + 80005ba0: 1780246f jal x8,80007d18 + 80005ba4: 80005b94 .word 0x80005b94 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 800174ca .word 0x800174ca + 80005bb0: 00000000 .word 0x00000000 + 80005bb4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xc82787b118b672a5 + 80005bb8: 000a3f83 ld x31,0(x20) + 80005bbc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xe3155c5dac3e5346 + 80005bc0: 000a3c03 ld x24,0(x20) + 80005bc4: 008a0a13 addi x20,x20,8 + +0000000080005bc8 : +Zbkc_clmul_cg_cmp_rd_rs1_b31: + clmul x31, x31, x24 # perform operation + 80005bc8: 0b8f9fb3 clmul x31,x31,x24 + # Check if x31 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x31, Zbkc_clmul_cg_cmp_rd_rs1_b31, Zbkc_clmul_cg_cmp_rd_rs1_b31_str) + 80005bcc: 00083383 ld x7,0(x16) + 80005bd0: 01f38c63 beq x7,x31,80005be8 + 80005bd4: 1440246f jal x8,80007d18 + 80005bd8: 80005bc8 .word 0x80005bc8 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 80017503 .word 0x80017503 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 00880813 addi x16,x16,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x4a51e3f408448572 + 80005bec: 000a3d03 ld x26,0(x20) + 80005bf0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xe8774925048ee7a2 + 80005bf4: 000a3003 ld x0,0(x20) + 80005bf8: 008a0a13 addi x20,x20,8 + +0000000080005bfc : +Zbkc_clmul_cg_cmp_rd_rs2_b0: + clmul x0, x26, x0 # perform operation + 80005bfc: 0a0d1033 clmul x0,x26,x0 + # Check if x0 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x0, Zbkc_clmul_cg_cmp_rd_rs2_b0, Zbkc_clmul_cg_cmp_rd_rs2_b0_str) + 80005c00: 00083383 ld x7,0(x16) + 80005c04: 00038c63 beq x7,x0,80005c1c + 80005c08: 1100246f jal x8,80007d18 + 80005c0c: 80005bfc .word 0x80005bfc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 8001753c .word 0x8001753c + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x83cc6ff29fcce3fa + 80005c20: 000a3d83 ld x27,0(x20) + 80005c24: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xe51f94cc2fa999bf + 80005c28: 000a3083 ld x1,0(x20) + 80005c2c: 008a0a13 addi x20,x20,8 + +0000000080005c30 : +Zbkc_clmul_cg_cmp_rd_rs2_b1: + clmul x1, x27, x1 # perform operation + 80005c30: 0a1d90b3 clmul x1,x27,x1 + # Check if x1 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x1, Zbkc_clmul_cg_cmp_rd_rs2_b1, Zbkc_clmul_cg_cmp_rd_rs2_b1_str) + 80005c34: 00083383 ld x7,0(x16) + 80005c38: 00138c63 beq x7,x1,80005c50 + 80005c3c: 0dc0246f jal x8,80007d18 + 80005c40: 80005c30 .word 0x80005c30 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 80017574 .word 0x80017574 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x5604fb8f74492f7f + 80005c54: 000a3c03 ld x24,0(x20) + 80005c58: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xb801d1cd9296ba07 + 80005c5c: 000a3103 ld x2,0(x20) + 80005c60: 008a0a13 addi x20,x20,8 + +0000000080005c64 : +Zbkc_clmul_cg_cmp_rd_rs2_b2: + clmul x2, x24, x2 # perform operation + 80005c64: 0a2c1133 clmul x2,x24,x2 + # Check if x2 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x2, Zbkc_clmul_cg_cmp_rd_rs2_b2, Zbkc_clmul_cg_cmp_rd_rs2_b2_str) + 80005c68: 00083383 ld x7,0(x16) + 80005c6c: 00238c63 beq x7,x2,80005c84 + 80005c70: 0a80246f jal x8,80007d18 + 80005c74: 80005c64 .word 0x80005c64 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 800175ac .word 0x800175ac + 80005c80: 00000000 .word 0x00000000 + 80005c84: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x18f8dd0126d19fef + 80005c88: 000a3083 ld x1,0(x20) + 80005c8c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xfbf11276cca7223a + 80005c90: 000a3183 ld x3,0(x20) + 80005c94: 008a0a13 addi x20,x20,8 + +0000000080005c98 : +Zbkc_clmul_cg_cmp_rd_rs2_b3: + clmul x3, x1, x3 # perform operation + 80005c98: 0a3091b3 clmul x3,x1,x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zbkc_clmul_cg_cmp_rd_rs2_b3, Zbkc_clmul_cg_cmp_rd_rs2_b3_str) + 80005c9c: 00083383 ld x7,0(x16) + 80005ca0: 00338c63 beq x7,x3,80005cb8 + 80005ca4: 0740246f jal x8,80007d18 + 80005ca8: 80005c98 .word 0x80005c98 + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 800175e4 .word 0x800175e4 + 80005cb4: 00000000 .word 0x00000000 + 80005cb8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xa05c9104a126d8a1 + 80005cbc: 000a3883 ld x17,0(x20) + 80005cc0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x3355ae1402b47dcb + 80005cc4: 000a3203 ld x4,0(x20) + 80005cc8: 008a0a13 addi x20,x20,8 + +0000000080005ccc : +Zbkc_clmul_cg_cmp_rd_rs2_b4: + clmul x4, x17, x4 # perform operation + 80005ccc: 0a489233 clmul x4,x17,x4 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zbkc_clmul_cg_cmp_rd_rs2_b4, Zbkc_clmul_cg_cmp_rd_rs2_b4_str) + 80005cd0: 00083383 ld x7,0(x16) + 80005cd4: 00438c63 beq x7,x4,80005cec + 80005cd8: 0400246f jal x8,80007d18 + 80005cdc: 80005ccc .word 0x80005ccc + 80005ce0: 00000000 .word 0x00000000 + 80005ce4: 8001761c .word 0x8001761c + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xb44c4a506db318c6 + 80005cf0: 000a3683 ld x13,0(x20) + 80005cf4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x4fc142a2cf95e398 + 80005cf8: 000a3283 ld x5,0(x20) + 80005cfc: 008a0a13 addi x20,x20,8 + +0000000080005d00 : +Zbkc_clmul_cg_cmp_rd_rs2_b5: + clmul x5, x13, x5 # perform operation + 80005d00: 0a5692b3 clmul x5,x13,x5 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkc_clmul_cg_cmp_rd_rs2_b5, Zbkc_clmul_cg_cmp_rd_rs2_b5_str) + 80005d04: 00083383 ld x7,0(x16) + 80005d08: 00538c63 beq x7,x5,80005d20 + 80005d0c: 00c0246f jal x8,80007d18 + 80005d10: 80005d00 .word 0x80005d00 + 80005d14: 00000000 .word 0x00000000 + 80005d18: 80017654 .word 0x80017654 + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x26c87514c4be2d52 + 80005d24: 000a3e03 ld x28,0(x20) + 80005d28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x009d12006dfa4c4e + 80005d2c: 000a3303 ld x6,0(x20) + 80005d30: 008a0a13 addi x20,x20,8 + +0000000080005d34 : +Zbkc_clmul_cg_cmp_rd_rs2_b6: + clmul x6, x28, x6 # perform operation + 80005d34: 0a6e1333 clmul x6,x28,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zbkc_clmul_cg_cmp_rd_rs2_b6, Zbkc_clmul_cg_cmp_rd_rs2_b6_str) + 80005d38: 00083383 ld x7,0(x16) + 80005d3c: 00638c63 beq x7,x6,80005d54 + 80005d40: 7d90146f jal x8,80007d18 + 80005d44: 80005d34 .word 0x80005d34 + 80005d48: 00000000 .word 0x00000000 + 80005d4c: 8001768c .word 0x8001768c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 00880813 addi x16,x16,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d58: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d5c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x705859a7da9cdb07 + 80005d60: 000a3f03 ld x30,0(x20) + 80005d64: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0x200c7191d5ddd23e + 80005d68: 000a3383 ld x7,0(x20) + 80005d6c: 008a0a13 addi x20,x20,8 + +0000000080005d70 : +Zbkc_clmul_cg_cmp_rd_rs2_b7: + clmul x7, x30, x7 # perform operation + 80005d70: 0a7f13b3 clmul x7,x30,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zbkc_clmul_cg_cmp_rd_rs2_b7, Zbkc_clmul_cg_cmp_rd_rs2_b7_str) + 80005d74: 00083683 ld x13,0(x16) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 7c50176f jal x14,80007d40 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 800176c4 .word 0x800176c4 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x861d43226df9dfec + 80005d94: 000a3b83 ld x23,0(x20) + 80005d98: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x1aade8a7cb836ff3 + 80005d9c: 000a3403 ld x8,0(x20) + 80005da0: 008a0a13 addi x20,x20,8 + +0000000080005da4 : +Zbkc_clmul_cg_cmp_rd_rs2_b8: + clmul x8, x23, x8 # perform operation + 80005da4: 0a8b9433 clmul x8,x23,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zbkc_clmul_cg_cmp_rd_rs2_b8, Zbkc_clmul_cg_cmp_rd_rs2_b8_str) + 80005da8: 00083683 ld x13,0(x16) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 7910176f jal x14,80007d40 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 800176fc .word 0x800176fc + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x4a51c086994fb6a2 + 80005dc8: 000a3d83 ld x27,0(x20) + 80005dcc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xdc1d3ec04b7b4f80 + 80005dd0: 000a3483 ld x9,0(x20) + 80005dd4: 008a0a13 addi x20,x20,8 + +0000000080005dd8 : +Zbkc_clmul_cg_cmp_rd_rs2_b9: + clmul x9, x27, x9 # perform operation + 80005dd8: 0a9d94b3 clmul x9,x27,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zbkc_clmul_cg_cmp_rd_rs2_b9, Zbkc_clmul_cg_cmp_rd_rs2_b9_str) + 80005ddc: 00083683 ld x13,0(x16) + 80005de0: 00968c63 beq x13,x9,80005df8 + 80005de4: 75d0176f jal x14,80007d40 + 80005de8: 80005dd8 .word 0x80005dd8 + 80005dec: 00000000 .word 0x00000000 + 80005df0: 80017734 .word 0x80017734 + 80005df4: 00000000 .word 0x00000000 + 80005df8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x8b8d6b51f4251364 + 80005dfc: 000a3f83 ld x31,0(x20) + 80005e00: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xf752deea2a6c12df + 80005e04: 000a3503 ld x10,0(x20) + 80005e08: 008a0a13 addi x20,x20,8 + +0000000080005e0c : +Zbkc_clmul_cg_cmp_rd_rs2_b10: + clmul x10, x31, x10 # perform operation + 80005e0c: 0aaf9533 clmul x10,x31,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zbkc_clmul_cg_cmp_rd_rs2_b10, Zbkc_clmul_cg_cmp_rd_rs2_b10_str) + 80005e10: 00083683 ld x13,0(x16) + 80005e14: 00a68c63 beq x13,x10,80005e2c + 80005e18: 7290176f jal x14,80007d40 + 80005e1c: 80005e0c .word 0x80005e0c + 80005e20: 00000000 .word 0x00000000 + 80005e24: 8001776c .word 0x8001776c + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x7daaec0b5b63970c + 80005e30: 000a3c03 ld x24,0(x20) + 80005e34: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xa02cbfd8611f3517 + 80005e38: 000a3583 ld x11,0(x20) + 80005e3c: 008a0a13 addi x20,x20,8 + +0000000080005e40 : +Zbkc_clmul_cg_cmp_rd_rs2_b11: + clmul x11, x24, x11 # perform operation + 80005e40: 0abc15b3 clmul x11,x24,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zbkc_clmul_cg_cmp_rd_rs2_b11, Zbkc_clmul_cg_cmp_rd_rs2_b11_str) + 80005e44: 00083683 ld x13,0(x16) + 80005e48: 00b68c63 beq x13,x11,80005e60 + 80005e4c: 6f50176f jal x14,80007d40 + 80005e50: 80005e40 .word 0x80005e40 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 800177a5 .word 0x800177a5 + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x2013f037f17cc198 + 80005e64: 000a3503 ld x10,0(x20) + 80005e68: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x96403b07b3e5ce41 + 80005e6c: 000a3603 ld x12,0(x20) + 80005e70: 008a0a13 addi x20,x20,8 + +0000000080005e74 : +Zbkc_clmul_cg_cmp_rd_rs2_b12: + clmul x12, x10, x12 # perform operation + 80005e74: 0ac51633 clmul x12,x10,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zbkc_clmul_cg_cmp_rd_rs2_b12, Zbkc_clmul_cg_cmp_rd_rs2_b12_str) + 80005e78: 00083683 ld x13,0(x16) + 80005e7c: 00c68c63 beq x13,x12,80005e94 + 80005e80: 6c10176f jal x14,80007d40 + 80005e84: 80005e74 .word 0x80005e74 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 800177de .word 0x800177de + 80005e90: 00000000 .word 0x00000000 + 80005e94: 00880813 addi x16,x16,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e98: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005e9c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x6d43886625da0744 + 80005ea0: 000a3183 ld x3,0(x20) + 80005ea4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xc82ece3dbc172658 + 80005ea8: 000a3683 ld x13,0(x20) + 80005eac: 008a0a13 addi x20,x20,8 + +0000000080005eb0 : +Zbkc_clmul_cg_cmp_rd_rs2_b13: + clmul x13, x3, x13 # perform operation + 80005eb0: 0ad196b3 clmul x13,x3,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zbkc_clmul_cg_cmp_rd_rs2_b13, Zbkc_clmul_cg_cmp_rd_rs2_b13_str) + 80005eb4: 00083203 ld x4,0(x16) + 80005eb8: 00d20c63 beq x4,x13,80005ed0 + 80005ebc: 645012ef jal x5,80007d00 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 80017817 .word 0x80017817 + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x0a00efd365a6dbfb + 80005ed4: 000a3903 ld x18,0(x20) + 80005ed8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xcdc7b10bcb48390e + 80005edc: 000a3703 ld x14,0(x20) + 80005ee0: 008a0a13 addi x20,x20,8 + +0000000080005ee4 : +Zbkc_clmul_cg_cmp_rd_rs2_b14: + clmul x14, x18, x14 # perform operation + 80005ee4: 0ae91733 clmul x14,x18,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zbkc_clmul_cg_cmp_rd_rs2_b14, Zbkc_clmul_cg_cmp_rd_rs2_b14_str) + 80005ee8: 00083203 ld x4,0(x16) + 80005eec: 00e20c63 beq x4,x14,80005f04 + 80005ef0: 611012ef jal x5,80007d00 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 80017850 .word 0x80017850 + 80005f00: 00000000 .word 0x00000000 + 80005f04: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x8a74ab38634fe6f6 + 80005f08: 000a3883 ld x17,0(x20) + 80005f0c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x5dc3b67934e8dad0 + 80005f10: 000a3783 ld x15,0(x20) + 80005f14: 008a0a13 addi x20,x20,8 + +0000000080005f18 : +Zbkc_clmul_cg_cmp_rd_rs2_b15: + clmul x15, x17, x15 # perform operation + 80005f18: 0af897b3 clmul x15,x17,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zbkc_clmul_cg_cmp_rd_rs2_b15, Zbkc_clmul_cg_cmp_rd_rs2_b15_str) + 80005f1c: 00083203 ld x4,0(x16) + 80005f20: 00f20c63 beq x4,x15,80005f38 + 80005f24: 5dd012ef jal x5,80007d00 + 80005f28: 80005f18 .word 0x80005f18 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 80017889 .word 0x80017889 + 80005f34: 00000000 .word 0x00000000 + 80005f38: 00880813 addi x16,x16,8 + + mv x23, x16 # switch signature pointer register to avoid conflict with test + 80005f3c: 00080b93 addi x23,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xa28ff410593e06a7 + 80005f40: 000a3883 ld x17,0(x20) + 80005f44: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x4b6a6f1f79d2356a + 80005f48: 000a3803 ld x16,0(x20) + 80005f4c: 008a0a13 addi x20,x20,8 + +0000000080005f50 : +Zbkc_clmul_cg_cmp_rd_rs2_b16: + clmul x16, x17, x16 # perform operation + 80005f50: 0b089833 clmul x16,x17,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkc_clmul_cg_cmp_rd_rs2_b16, Zbkc_clmul_cg_cmp_rd_rs2_b16_str) + 80005f54: 000bb203 ld x4,0(x23) + 80005f58: 01020c63 beq x4,x16,80005f70 + 80005f5c: 5a5012ef jal x5,80007d00 + 80005f60: 80005f50 .word 0x80005f50 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 800178c2 .word 0x800178c2 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x2fbdbec7a0a6b558 + 80005f74: 000a3583 ld x11,0(x20) + 80005f78: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xc71b970200cfecfa + 80005f7c: 000a3883 ld x17,0(x20) + 80005f80: 008a0a13 addi x20,x20,8 + +0000000080005f84 : +Zbkc_clmul_cg_cmp_rd_rs2_b17: + clmul x17, x11, x17 # perform operation + 80005f84: 0b1598b3 clmul x17,x11,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkc_clmul_cg_cmp_rd_rs2_b17, Zbkc_clmul_cg_cmp_rd_rs2_b17_str) + 80005f88: 000bb203 ld x4,0(x23) + 80005f8c: 01120c63 beq x4,x17,80005fa4 + 80005f90: 571012ef jal x5,80007d00 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 800178fb .word 0x800178fb + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xefa28d9edc1fdd0b + 80005fa8: 000a3103 ld x2,0(x20) + 80005fac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xdee2c1fbd9537774 + 80005fb0: 000a3903 ld x18,0(x20) + 80005fb4: 008a0a13 addi x20,x20,8 + +0000000080005fb8 : +Zbkc_clmul_cg_cmp_rd_rs2_b18: + clmul x18, x2, x18 # perform operation + 80005fb8: 0b211933 clmul x18,x2,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkc_clmul_cg_cmp_rd_rs2_b18, Zbkc_clmul_cg_cmp_rd_rs2_b18_str) + 80005fbc: 000bb203 ld x4,0(x23) + 80005fc0: 01220c63 beq x4,x18,80005fd8 + 80005fc4: 53d012ef jal x5,80007d00 + 80005fc8: 80005fb8 .word 0x80005fb8 + 80005fcc: 00000000 .word 0x00000000 + 80005fd0: 80017934 .word 0x80017934 + 80005fd4: 00000000 .word 0x00000000 + 80005fd8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x1dcca35ab3062a44 + 80005fdc: 000a3383 ld x7,0(x20) + 80005fe0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x7e9becaaf4115580 + 80005fe4: 000a3983 ld x19,0(x20) + 80005fe8: 008a0a13 addi x20,x20,8 + +0000000080005fec : +Zbkc_clmul_cg_cmp_rd_rs2_b19: + clmul x19, x7, x19 # perform operation + 80005fec: 0b3399b3 clmul x19,x7,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkc_clmul_cg_cmp_rd_rs2_b19, Zbkc_clmul_cg_cmp_rd_rs2_b19_str) + 80005ff0: 000bb203 ld x4,0(x23) + 80005ff4: 01320c63 beq x4,x19,8000600c + 80005ff8: 509012ef jal x5,80007d00 + 80005ffc: 80005fec .word 0x80005fec + 80006000: 00000000 .word 0x00000000 + 80006004: 8001796d .word 0x8001796d + 80006008: 00000000 .word 0x00000000 + 8000600c: 008b8b93 addi x23,x23,8 + + mv x11, x20 # switch data pointer register to avoid conflict with test + 80006010: 000a0593 addi x11,x20,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x12) # load rs1: x12 = 0x6f1b61e7fcd26148 + 80006014: 0005b603 ld x12,0(x11) + 80006018: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs2: x20 = 0x40d9921bc509d17b + 8000601c: 0005ba03 ld x20,0(x11) + 80006020: 00858593 addi x11,x11,8 + +0000000080006024 : +Zbkc_clmul_cg_cmp_rd_rs2_b20: + clmul x20, x12, x20 # perform operation + 80006024: 0b461a33 clmul x20,x12,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkc_clmul_cg_cmp_rd_rs2_b20, Zbkc_clmul_cg_cmp_rd_rs2_b20_str) + 80006028: 000bb203 ld x4,0(x23) + 8000602c: 01420c63 beq x4,x20,80006044 + 80006030: 4d1012ef jal x5,80007d00 + 80006034: 80006024 .word 0x80006024 + 80006038: 00000000 .word 0x00000000 + 8000603c: 800179a6 .word 0x800179a6 + 80006040: 00000000 .word 0x00000000 + 80006044: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xaa47a75a928b90ca + 80006048: 0005bf83 ld x31,0(x11) + 8000604c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs2: x21 = 0x5eb6463367373abd + 80006050: 0005ba83 ld x21,0(x11) + 80006054: 00858593 addi x11,x11,8 + +0000000080006058 : +Zbkc_clmul_cg_cmp_rd_rs2_b21: + clmul x21, x31, x21 # perform operation + 80006058: 0b5f9ab3 clmul x21,x31,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkc_clmul_cg_cmp_rd_rs2_b21, Zbkc_clmul_cg_cmp_rd_rs2_b21_str) + 8000605c: 000bb203 ld x4,0(x23) + 80006060: 01520c63 beq x4,x21,80006078 + 80006064: 49d012ef jal x5,80007d00 + 80006068: 80006058 .word 0x80006058 + 8000606c: 00000000 .word 0x00000000 + 80006070: 800179df .word 0x800179df + 80006074: 00000000 .word 0x00000000 + 80006078: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs1: x16 = 0x923f113c5dae9b20 + 8000607c: 0005b803 ld x16,0(x11) + 80006080: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x3f4607505c957a4a + 80006084: 0005bb03 ld x22,0(x11) + 80006088: 00858593 addi x11,x11,8 + +000000008000608c : +Zbkc_clmul_cg_cmp_rd_rs2_b22: + clmul x22, x16, x22 # perform operation + 8000608c: 0b681b33 clmul x22,x16,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkc_clmul_cg_cmp_rd_rs2_b22, Zbkc_clmul_cg_cmp_rd_rs2_b22_str) + 80006090: 000bb203 ld x4,0(x23) + 80006094: 01620c63 beq x4,x22,800060ac + 80006098: 469012ef jal x5,80007d00 + 8000609c: 8000608c .word 0x8000608c + 800060a0: 00000000 .word 0x00000000 + 800060a4: 80017a18 .word 0x80017a18 + 800060a8: 00000000 .word 0x00000000 + 800060ac: 008b8b93 addi x23,x23,8 + + mv x25, x23 # switch signature pointer register to avoid conflict with test + 800060b0: 000b8c93 addi x25,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x96f741aaaf2d7655 + 800060b4: 0005b303 ld x6,0(x11) + 800060b8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x050ed03d3052bd13 + 800060bc: 0005bb83 ld x23,0(x11) + 800060c0: 00858593 addi x11,x11,8 + +00000000800060c4 : +Zbkc_clmul_cg_cmp_rd_rs2_b23: + clmul x23, x6, x23 # perform operation + 800060c4: 0b731bb3 clmul x23,x6,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zbkc_clmul_cg_cmp_rd_rs2_b23, Zbkc_clmul_cg_cmp_rd_rs2_b23_str) + 800060c8: 000cb203 ld x4,0(x25) + 800060cc: 01720c63 beq x4,x23,800060e4 + 800060d0: 431012ef jal x5,80007d00 + 800060d4: 800060c4 .word 0x800060c4 + 800060d8: 00000000 .word 0x00000000 + 800060dc: 80017a51 .word 0x80017a51 + 800060e0: 00000000 .word 0x00000000 + 800060e4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x5875cc459a41c232 + 800060e8: 0005b903 ld x18,0(x11) + 800060ec: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs2: x24 = 0xe7c25ebc115985b8 + 800060f0: 0005bc03 ld x24,0(x11) + 800060f4: 00858593 addi x11,x11,8 + +00000000800060f8 : +Zbkc_clmul_cg_cmp_rd_rs2_b24: + clmul x24, x18, x24 # perform operation + 800060f8: 0b891c33 clmul x24,x18,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zbkc_clmul_cg_cmp_rd_rs2_b24, Zbkc_clmul_cg_cmp_rd_rs2_b24_str) + 800060fc: 000cb203 ld x4,0(x25) + 80006100: 01820c63 beq x4,x24,80006118 + 80006104: 3fd012ef jal x5,80007d00 + 80006108: 800060f8 .word 0x800060f8 + 8000610c: 00000000 .word 0x00000000 + 80006110: 80017a8a .word 0x80017a8a + 80006114: 00000000 .word 0x00000000 + 80006118: 008c8c93 addi x25,x25,8 + + mv x9, x25 # switch signature pointer register to avoid conflict with test + 8000611c: 000c8493 addi x9,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0xd7e43383234a1b57 + 80006120: 0005bd83 ld x27,0(x11) + 80006124: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xbd245382ac5cd43c + 80006128: 0005bc83 ld x25,0(x11) + 8000612c: 00858593 addi x11,x11,8 + +0000000080006130 : +Zbkc_clmul_cg_cmp_rd_rs2_b25: + clmul x25, x27, x25 # perform operation + 80006130: 0b9d9cb3 clmul x25,x27,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zbkc_clmul_cg_cmp_rd_rs2_b25, Zbkc_clmul_cg_cmp_rd_rs2_b25_str) + 80006134: 0004b203 ld x4,0(x9) + 80006138: 01920c63 beq x4,x25,80006150 + 8000613c: 3c5012ef jal x5,80007d00 + 80006140: 80006130 .word 0x80006130 + 80006144: 00000000 .word 0x00000000 + 80006148: 80017ac3 .word 0x80017ac3 + 8000614c: 00000000 .word 0x00000000 + 80006150: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x04fb48b0b3cee9b4 + 80006154: 0005b183 ld x3,0(x11) + 80006158: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0xc1e0b68ae04bf8b6 + 8000615c: 0005bd03 ld x26,0(x11) + 80006160: 00858593 addi x11,x11,8 + +0000000080006164 : +Zbkc_clmul_cg_cmp_rd_rs2_b26: + clmul x26, x3, x26 # perform operation + 80006164: 0ba19d33 clmul x26,x3,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zbkc_clmul_cg_cmp_rd_rs2_b26, Zbkc_clmul_cg_cmp_rd_rs2_b26_str) + 80006168: 0004b203 ld x4,0(x9) + 8000616c: 01a20c63 beq x4,x26,80006184 + 80006170: 391012ef jal x5,80007d00 + 80006174: 80006164 .word 0x80006164 + 80006178: 00000000 .word 0x00000000 + 8000617c: 80017afc .word 0x80017afc + 80006180: 00000000 .word 0x00000000 + 80006184: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0x621b4f0238eea192 + 80006188: 0005b783 ld x15,0(x11) + 8000618c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs2: x27 = 0x192dde52a933f95b + 80006190: 0005bd83 ld x27,0(x11) + 80006194: 00858593 addi x11,x11,8 + +0000000080006198 : +Zbkc_clmul_cg_cmp_rd_rs2_b27: + clmul x27, x15, x27 # perform operation + 80006198: 0bb79db3 clmul x27,x15,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zbkc_clmul_cg_cmp_rd_rs2_b27, Zbkc_clmul_cg_cmp_rd_rs2_b27_str) + 8000619c: 0004b203 ld x4,0(x9) + 800061a0: 01b20c63 beq x4,x27,800061b8 + 800061a4: 35d012ef jal x5,80007d00 + 800061a8: 80006198 .word 0x80006198 + 800061ac: 00000000 .word 0x00000000 + 800061b0: 80017b35 .word 0x80017b35 + 800061b4: 00000000 .word 0x00000000 + 800061b8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x1fce94686d25211c + 800061bc: 0005b703 ld x14,0(x11) + 800061c0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs2: x28 = 0x78c3c4df594213db + 800061c4: 0005be03 ld x28,0(x11) + 800061c8: 00858593 addi x11,x11,8 + +00000000800061cc : +Zbkc_clmul_cg_cmp_rd_rs2_b28: + clmul x28, x14, x28 # perform operation + 800061cc: 0bc71e33 clmul x28,x14,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zbkc_clmul_cg_cmp_rd_rs2_b28, Zbkc_clmul_cg_cmp_rd_rs2_b28_str) + 800061d0: 0004b203 ld x4,0(x9) + 800061d4: 01c20c63 beq x4,x28,800061ec + 800061d8: 329012ef jal x5,80007d00 + 800061dc: 800061cc .word 0x800061cc + 800061e0: 00000000 .word 0x00000000 + 800061e4: 80017b6e .word 0x80017b6e + 800061e8: 00000000 .word 0x00000000 + 800061ec: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x14) # load rs1: x14 = 0x08cb95a5aaa6e197 + 800061f0: 0005b703 ld x14,0(x11) + 800061f4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs2: x29 = 0x975247f7ba032f3d + 800061f8: 0005be83 ld x29,0(x11) + 800061fc: 00858593 addi x11,x11,8 + +0000000080006200 : +Zbkc_clmul_cg_cmp_rd_rs2_b29: + clmul x29, x14, x29 # perform operation + 80006200: 0bd71eb3 clmul x29,x14,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zbkc_clmul_cg_cmp_rd_rs2_b29, Zbkc_clmul_cg_cmp_rd_rs2_b29_str) + 80006204: 0004b203 ld x4,0(x9) + 80006208: 01d20c63 beq x4,x29,80006220 + 8000620c: 2f5012ef jal x5,80007d00 + 80006210: 80006200 .word 0x80006200 + 80006214: 00000000 .word 0x00000000 + 80006218: 80017ba7 .word 0x80017ba7 + 8000621c: 00000000 .word 0x00000000 + 80006220: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0xcff4e5c7e97797e0 + 80006224: 0005b983 ld x19,0(x11) + 80006228: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs2: x30 = 0xdaeef89c396ecd37 + 8000622c: 0005bf03 ld x30,0(x11) + 80006230: 00858593 addi x11,x11,8 + +0000000080006234 : +Zbkc_clmul_cg_cmp_rd_rs2_b30: + clmul x30, x19, x30 # perform operation + 80006234: 0be99f33 clmul x30,x19,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zbkc_clmul_cg_cmp_rd_rs2_b30, Zbkc_clmul_cg_cmp_rd_rs2_b30_str) + 80006238: 0004b203 ld x4,0(x9) + 8000623c: 01e20c63 beq x4,x30,80006254 + 80006240: 2c1012ef jal x5,80007d00 + 80006244: 80006234 .word 0x80006234 + 80006248: 00000000 .word 0x00000000 + 8000624c: 80017be0 .word 0x80017be0 + 80006250: 00000000 .word 0x00000000 + 80006254: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x76b3e84422e16c30 + 80006258: 0005b883 ld x17,0(x11) + 8000625c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x3484f1532292443d + 80006260: 0005bf83 ld x31,0(x11) + 80006264: 00858593 addi x11,x11,8 + +0000000080006268 : +Zbkc_clmul_cg_cmp_rd_rs2_b31: + clmul x31, x17, x31 # perform operation + 80006268: 0bf89fb3 clmul x31,x17,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkc_clmul_cg_cmp_rd_rs2_b31, Zbkc_clmul_cg_cmp_rd_rs2_b31_str) + 8000626c: 0004b203 ld x4,0(x9) + 80006270: 01f20c63 beq x4,x31,80006288 + 80006274: 28d012ef jal x5,80007d00 + 80006278: 80006268 .word 0x80006268 + 8000627c: 00000000 .word 0x00000000 + 80006280: 80017c19 .word 0x80017c19 + 80006284: 00000000 .word 0x00000000 + 80006288: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs1: x0 = 0xf0730ce9384bac44 + 8000628c: 0005b003 ld x0,0(x11) + 80006290: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x7f1ee6ab2ad5f0e2 + 80006294: 0005b003 ld x0,0(x11) + 80006298: 00858593 addi x11,x11,8 + +000000008000629c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0: + clmul x0, x0, x0 # perform operation + 8000629c: 0a001033 clmul x0,x0,x0 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b0_str) + 800062a0: 0004b203 ld x4,0(x9) + 800062a4: 00020c63 beq x4,x0,800062bc + 800062a8: 259012ef jal x5,80007d00 + 800062ac: 8000629c .word 0x8000629c + 800062b0: 00000000 .word 0x00000000 + 800062b4: 80017c52 .word 0x80017c52 + 800062b8: 00000000 .word 0x00000000 + 800062bc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0x9e185a9f62bce10b + 800062c0: 0005b083 ld x1,0(x11) + 800062c4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0xde5858ee807a6712 + 800062c8: 0005b083 ld x1,0(x11) + 800062cc: 00858593 addi x11,x11,8 + +00000000800062d0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1: + clmul x1, x1, x1 # perform operation + 800062d0: 0a1090b3 clmul x1,x1,x1 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b1_str) + 800062d4: 0004b203 ld x4,0(x9) + 800062d8: 00120c63 beq x4,x1,800062f0 + 800062dc: 225012ef jal x5,80007d00 + 800062e0: 800062d0 .word 0x800062d0 + 800062e4: 00000000 .word 0x00000000 + 800062e8: 80017c8e .word 0x80017c8e + 800062ec: 00000000 .word 0x00000000 + 800062f0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0x6477c24c1185fbbc + 800062f4: 0005b103 ld x2,0(x11) + 800062f8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x63bc6416ab51d2b0 + 800062fc: 0005b103 ld x2,0(x11) + 80006300: 00858593 addi x11,x11,8 + +0000000080006304 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2: + clmul x2, x2, x2 # perform operation + 80006304: 0a211133 clmul x2,x2,x2 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b2_str) + 80006308: 0004b203 ld x4,0(x9) + 8000630c: 00220c63 beq x4,x2,80006324 + 80006310: 1f1012ef jal x5,80007d00 + 80006314: 80006304 .word 0x80006304 + 80006318: 00000000 .word 0x00000000 + 8000631c: 80017cca .word 0x80017cca + 80006320: 00000000 .word 0x00000000 + 80006324: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xbafa1455bbde94af + 80006328: 0005b183 ld x3,0(x11) + 8000632c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x7e6379f43d2856c5 + 80006330: 0005b183 ld x3,0(x11) + 80006334: 00858593 addi x11,x11,8 + +0000000080006338 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3: + clmul x3, x3, x3 # perform operation + 80006338: 0a3191b3 clmul x3,x3,x3 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b3_str) + 8000633c: 0004b203 ld x4,0(x9) + 80006340: 00320c63 beq x4,x3,80006358 + 80006344: 1bd012ef jal x5,80007d00 + 80006348: 80006338 .word 0x80006338 + 8000634c: 00000000 .word 0x00000000 + 80006350: 80017d06 .word 0x80017d06 + 80006354: 00000000 .word 0x00000000 + 80006358: 00848493 addi x9,x9,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 8000635c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80006360: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x4ddd9366de0b217a + 80006364: 0005b203 ld x4,0(x11) + 80006368: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x821929be3e0f9b2c + 8000636c: 0005b203 ld x4,0(x11) + 80006370: 00858593 addi x11,x11,8 + +0000000080006374 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4: + clmul x4, x4, x4 # perform operation + 80006374: 0a421233 clmul x4,x4,x4 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b4_str) + 80006378: 0004b383 ld x7,0(x9) + 8000637c: 00438c63 beq x7,x4,80006394 + 80006380: 1990146f jal x8,80007d18 + 80006384: 80006374 .word 0x80006374 + 80006388: 00000000 .word 0x00000000 + 8000638c: 80017d42 .word 0x80017d42 + 80006390: 00000000 .word 0x00000000 + 80006394: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x5e7d44fcaf27492b + 80006398: 0005b283 ld x5,0(x11) + 8000639c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xc0a75d393a8f656a + 800063a0: 0005b283 ld x5,0(x11) + 800063a4: 00858593 addi x11,x11,8 + +00000000800063a8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5: + clmul x5, x5, x5 # perform operation + 800063a8: 0a5292b3 clmul x5,x5,x5 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b5_str) + 800063ac: 0004b383 ld x7,0(x9) + 800063b0: 00538c63 beq x7,x5,800063c8 + 800063b4: 1650146f jal x8,80007d18 + 800063b8: 800063a8 .word 0x800063a8 + 800063bc: 00000000 .word 0x00000000 + 800063c0: 80017d7e .word 0x80017d7e + 800063c4: 00000000 .word 0x00000000 + 800063c8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x94beae857d337cc7 + 800063cc: 0005b303 ld x6,0(x11) + 800063d0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0xdbd29ab592111ba8 + 800063d4: 0005b303 ld x6,0(x11) + 800063d8: 00858593 addi x11,x11,8 + +00000000800063dc : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6: + clmul x6, x6, x6 # perform operation + 800063dc: 0a631333 clmul x6,x6,x6 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b6_str) + 800063e0: 0004b383 ld x7,0(x9) + 800063e4: 00638c63 beq x7,x6,800063fc + 800063e8: 1310146f jal x8,80007d18 + 800063ec: 800063dc .word 0x800063dc + 800063f0: 00000000 .word 0x00000000 + 800063f4: 80017dba .word 0x80017dba + 800063f8: 00000000 .word 0x00000000 + 800063fc: 00848493 addi x9,x9,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80006400: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80006404: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xf01becc42b74b234 + 80006408: 0005b383 ld x7,0(x11) + 8000640c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x2a310a340cd7e578 + 80006410: 0005b383 ld x7,0(x11) + 80006414: 00858593 addi x11,x11,8 + +0000000080006418 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7: + clmul x7, x7, x7 # perform operation + 80006418: 0a7393b3 clmul x7,x7,x7 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b7_str) + 8000641c: 0004b683 ld x13,0(x9) + 80006420: 00768c63 beq x13,x7,80006438 + 80006424: 11d0176f jal x14,80007d40 + 80006428: 80006418 .word 0x80006418 + 8000642c: 00000000 .word 0x00000000 + 80006430: 80017df6 .word 0x80017df6 + 80006434: 00000000 .word 0x00000000 + 80006438: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x84aa9fbc6701726a + 8000643c: 0005b403 ld x8,0(x11) + 80006440: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xa8b6e7d9e62996ee + 80006444: 0005b403 ld x8,0(x11) + 80006448: 00858593 addi x11,x11,8 + +000000008000644c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8: + clmul x8, x8, x8 # perform operation + 8000644c: 0a841433 clmul x8,x8,x8 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b8_str) + 80006450: 0004b683 ld x13,0(x9) + 80006454: 00868c63 beq x13,x8,8000646c + 80006458: 0e90176f jal x14,80007d40 + 8000645c: 8000644c .word 0x8000644c + 80006460: 00000000 .word 0x00000000 + 80006464: 80017e32 .word 0x80017e32 + 80006468: 00000000 .word 0x00000000 + 8000646c: 00848493 addi x9,x9,8 + + mv x12, x9 # switch signature pointer register to avoid conflict with test + 80006470: 00048613 addi x12,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x5b085867c5f3907a + 80006474: 0005b483 ld x9,0(x11) + 80006478: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x535aebe904c18aa3 + 8000647c: 0005b483 ld x9,0(x11) + 80006480: 00858593 addi x11,x11,8 + +0000000080006484 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9: + clmul x9, x9, x9 # perform operation + 80006484: 0a9494b3 clmul x9,x9,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b9_str) + 80006488: 00063683 ld x13,0(x12) + 8000648c: 00968c63 beq x13,x9,800064a4 + 80006490: 0b10176f jal x14,80007d40 + 80006494: 80006484 .word 0x80006484 + 80006498: 00000000 .word 0x00000000 + 8000649c: 80017e6e .word 0x80017e6e + 800064a0: 00000000 .word 0x00000000 + 800064a4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x04269014344f97f8 + 800064a8: 0005b503 ld x10,0(x11) + 800064ac: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0xc0bef444165d8b4d + 800064b0: 0005b503 ld x10,0(x11) + 800064b4: 00858593 addi x11,x11,8 + +00000000800064b8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10: + clmul x10, x10, x10 # perform operation + 800064b8: 0aa51533 clmul x10,x10,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b10_str) + 800064bc: 00063683 ld x13,0(x12) + 800064c0: 00a68c63 beq x13,x10,800064d8 + 800064c4: 07d0176f jal x14,80007d40 + 800064c8: 800064b8 .word 0x800064b8 + 800064cc: 00000000 .word 0x00000000 + 800064d0: 80017eaa .word 0x80017eaa + 800064d4: 00000000 .word 0x00000000 + 800064d8: 00860613 addi x12,x12,8 + + mv x19, x11 # switch data pointer register to avoid conflict with test + 800064dc: 00058993 addi x19,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x25831b672c527a1f + 800064e0: 0009b583 ld x11,0(x19) + 800064e4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xb7883aa01491168a + 800064e8: 0009b583 ld x11,0(x19) + 800064ec: 00898993 addi x19,x19,8 + +00000000800064f0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11: + clmul x11, x11, x11 # perform operation + 800064f0: 0ab595b3 clmul x11,x11,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b11_str) + 800064f4: 00063683 ld x13,0(x12) + 800064f8: 00b68c63 beq x13,x11,80006510 + 800064fc: 0450176f jal x14,80007d40 + 80006500: 800064f0 .word 0x800064f0 + 80006504: 00000000 .word 0x00000000 + 80006508: 80017ee7 .word 0x80017ee7 + 8000650c: 00000000 .word 0x00000000 + 80006510: 00860613 addi x12,x12,8 + + mv x15, x12 # switch signature pointer register to avoid conflict with test + 80006514: 00060793 addi x15,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x243b1889c5f13d00 + 80006518: 0009b603 ld x12,0(x19) + 8000651c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xc0a46d8fff44b83e + 80006520: 0009b603 ld x12,0(x19) + 80006524: 00898993 addi x19,x19,8 + +0000000080006528 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12: + clmul x12, x12, x12 # perform operation + 80006528: 0ac61633 clmul x12,x12,x12 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b12_str) + 8000652c: 0007b683 ld x13,0(x15) + 80006530: 00c68c63 beq x13,x12,80006548 + 80006534: 00d0176f jal x14,80007d40 + 80006538: 80006528 .word 0x80006528 + 8000653c: 00000000 .word 0x00000000 + 80006540: 80017f24 .word 0x80017f24 + 80006544: 00000000 .word 0x00000000 + 80006548: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000654c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006550: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0xfbcf58a85f4f53a2 + 80006554: 0009b683 ld x13,0(x19) + 80006558: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xc3843dd1d690d731 + 8000655c: 0009b683 ld x13,0(x19) + 80006560: 00898993 addi x19,x19,8 + +0000000080006564 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13: + clmul x13, x13, x13 # perform operation + 80006564: 0ad696b3 clmul x13,x13,x13 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b13_str) + 80006568: 0007b383 ld x7,0(x15) + 8000656c: 00d38c63 beq x7,x13,80006584 + 80006570: 7a80146f jal x8,80007d18 + 80006574: 80006564 .word 0x80006564 + 80006578: 00000000 .word 0x00000000 + 8000657c: 80017f61 .word 0x80017f61 + 80006580: 00000000 .word 0x00000000 + 80006584: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xb17e72c9b85aabe4 + 80006588: 0009b703 ld x14,0(x19) + 8000658c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x989e46dd69e739d3 + 80006590: 0009b703 ld x14,0(x19) + 80006594: 00898993 addi x19,x19,8 + +0000000080006598 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14: + clmul x14, x14, x14 # perform operation + 80006598: 0ae71733 clmul x14,x14,x14 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b14_str) + 8000659c: 0007b383 ld x7,0(x15) + 800065a0: 00e38c63 beq x7,x14,800065b8 + 800065a4: 7740146f jal x8,80007d18 + 800065a8: 80006598 .word 0x80006598 + 800065ac: 00000000 .word 0x00000000 + 800065b0: 80017f9e .word 0x80017f9e + 800065b4: 00000000 .word 0x00000000 + 800065b8: 00878793 addi x15,x15,8 + + mv x25, x15 # switch signature pointer register to avoid conflict with test + 800065bc: 00078c93 addi x25,x15,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xd7de5159c2d439d3 + 800065c0: 0009b783 ld x15,0(x19) + 800065c4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x0a998dcc389498cc + 800065c8: 0009b783 ld x15,0(x19) + 800065cc: 00898993 addi x19,x19,8 + +00000000800065d0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15: + clmul x15, x15, x15 # perform operation + 800065d0: 0af797b3 clmul x15,x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b15_str) + 800065d4: 000cb383 ld x7,0(x25) + 800065d8: 00f38c63 beq x7,x15,800065f0 + 800065dc: 73c0146f jal x8,80007d18 + 800065e0: 800065d0 .word 0x800065d0 + 800065e4: 00000000 .word 0x00000000 + 800065e8: 80017fdb .word 0x80017fdb + 800065ec: 00000000 .word 0x00000000 + 800065f0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x22ca618b20da5d96 + 800065f4: 0009b803 ld x16,0(x19) + 800065f8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x4bf9501aa62421d0 + 800065fc: 0009b803 ld x16,0(x19) + 80006600: 00898993 addi x19,x19,8 + +0000000080006604 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16: + clmul x16, x16, x16 # perform operation + 80006604: 0b081833 clmul x16,x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b16_str) + 80006608: 000cb383 ld x7,0(x25) + 8000660c: 01038c63 beq x7,x16,80006624 + 80006610: 7080146f jal x8,80007d18 + 80006614: 80006604 .word 0x80006604 + 80006618: 00000000 .word 0x00000000 + 8000661c: 80018018 .word 0x80018018 + 80006620: 00000000 .word 0x00000000 + 80006624: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x5d81080273577a37 + 80006628: 0009b883 ld x17,0(x19) + 8000662c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xc469077a6290111e + 80006630: 0009b883 ld x17,0(x19) + 80006634: 00898993 addi x19,x19,8 + +0000000080006638 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17: + clmul x17, x17, x17 # perform operation + 80006638: 0b1898b3 clmul x17,x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b17_str) + 8000663c: 000cb383 ld x7,0(x25) + 80006640: 01138c63 beq x7,x17,80006658 + 80006644: 6d40146f jal x8,80007d18 + 80006648: 80006638 .word 0x80006638 + 8000664c: 00000000 .word 0x00000000 + 80006650: 80018055 .word 0x80018055 + 80006654: 00000000 .word 0x00000000 + 80006658: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xf0123e0dcba00c92 + 8000665c: 0009b903 ld x18,0(x19) + 80006660: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xeea73efacdfcb6df + 80006664: 0009b903 ld x18,0(x19) + 80006668: 00898993 addi x19,x19,8 + +000000008000666c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18: + clmul x18, x18, x18 # perform operation + 8000666c: 0b291933 clmul x18,x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b18_str) + 80006670: 000cb383 ld x7,0(x25) + 80006674: 01238c63 beq x7,x18,8000668c + 80006678: 6a00146f jal x8,80007d18 + 8000667c: 8000666c .word 0x8000666c + 80006680: 00000000 .word 0x00000000 + 80006684: 80018092 .word 0x80018092 + 80006688: 00000000 .word 0x00000000 + 8000668c: 008c8c93 addi x25,x25,8 + + mv x3, x19 # switch data pointer register to avoid conflict with test + 80006690: 00098193 addi x3,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xc854f0fe85270fd8 + 80006694: 0001b983 ld x19,0(x3) + 80006698: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x8f353fe560aa04cf + 8000669c: 0001b983 ld x19,0(x3) + 800066a0: 00818193 addi x3,x3,8 + +00000000800066a4 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19: + clmul x19, x19, x19 # perform operation + 800066a4: 0b3999b3 clmul x19,x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b19_str) + 800066a8: 000cb383 ld x7,0(x25) + 800066ac: 01338c63 beq x7,x19,800066c4 + 800066b0: 6680146f jal x8,80007d18 + 800066b4: 800066a4 .word 0x800066a4 + 800066b8: 00000000 .word 0x00000000 + 800066bc: 800180cf .word 0x800180cf + 800066c0: 00000000 .word 0x00000000 + 800066c4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x55ea677e8afa5ab0 + 800066c8: 0001ba03 ld x20,0(x3) + 800066cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xae6a3120a03ed30e + 800066d0: 0001ba03 ld x20,0(x3) + 800066d4: 00818193 addi x3,x3,8 + +00000000800066d8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20: + clmul x20, x20, x20 # perform operation + 800066d8: 0b4a1a33 clmul x20,x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b20_str) + 800066dc: 000cb383 ld x7,0(x25) + 800066e0: 01438c63 beq x7,x20,800066f8 + 800066e4: 6340146f jal x8,80007d18 + 800066e8: 800066d8 .word 0x800066d8 + 800066ec: 00000000 .word 0x00000000 + 800066f0: 8001810c .word 0x8001810c + 800066f4: 00000000 .word 0x00000000 + 800066f8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x08ab4e18e7c128d6 + 800066fc: 0001ba83 ld x21,0(x3) + 80006700: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xb45e54391f5a492d + 80006704: 0001ba83 ld x21,0(x3) + 80006708: 00818193 addi x3,x3,8 + +000000008000670c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21: + clmul x21, x21, x21 # perform operation + 8000670c: 0b5a9ab3 clmul x21,x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b21_str) + 80006710: 000cb383 ld x7,0(x25) + 80006714: 01538c63 beq x7,x21,8000672c + 80006718: 6000146f jal x8,80007d18 + 8000671c: 8000670c .word 0x8000670c + 80006720: 00000000 .word 0x00000000 + 80006724: 80018149 .word 0x80018149 + 80006728: 00000000 .word 0x00000000 + 8000672c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xb4cb27469f7c1100 + 80006730: 0001bb03 ld x22,0(x3) + 80006734: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x8fe5e674d2440f32 + 80006738: 0001bb03 ld x22,0(x3) + 8000673c: 00818193 addi x3,x3,8 + +0000000080006740 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22: + clmul x22, x22, x22 # perform operation + 80006740: 0b6b1b33 clmul x22,x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b22_str) + 80006744: 000cb383 ld x7,0(x25) + 80006748: 01638c63 beq x7,x22,80006760 + 8000674c: 5cc0146f jal x8,80007d18 + 80006750: 80006740 .word 0x80006740 + 80006754: 00000000 .word 0x00000000 + 80006758: 80018186 .word 0x80018186 + 8000675c: 00000000 .word 0x00000000 + 80006760: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xa8fda010119bf94d + 80006764: 0001bb83 ld x23,0(x3) + 80006768: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x4e2e6877a5de0767 + 8000676c: 0001bb83 ld x23,0(x3) + 80006770: 00818193 addi x3,x3,8 + +0000000080006774 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23: + clmul x23, x23, x23 # perform operation + 80006774: 0b7b9bb3 clmul x23,x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b23_str) + 80006778: 000cb383 ld x7,0(x25) + 8000677c: 01738c63 beq x7,x23,80006794 + 80006780: 5980146f jal x8,80007d18 + 80006784: 80006774 .word 0x80006774 + 80006788: 00000000 .word 0x00000000 + 8000678c: 800181c3 .word 0x800181c3 + 80006790: 00000000 .word 0x00000000 + 80006794: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xad076df7b5bc6922 + 80006798: 0001bc03 ld x24,0(x3) + 8000679c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xb54aa9dac92a3f8e + 800067a0: 0001bc03 ld x24,0(x3) + 800067a4: 00818193 addi x3,x3,8 + +00000000800067a8 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24: + clmul x24, x24, x24 # perform operation + 800067a8: 0b8c1c33 clmul x24,x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b24_str) + 800067ac: 000cb383 ld x7,0(x25) + 800067b0: 01838c63 beq x7,x24,800067c8 + 800067b4: 5640146f jal x8,80007d18 + 800067b8: 800067a8 .word 0x800067a8 + 800067bc: 00000000 .word 0x00000000 + 800067c0: 80018200 .word 0x80018200 + 800067c4: 00000000 .word 0x00000000 + 800067c8: 008c8c93 addi x25,x25,8 + + mv x17, x25 # switch signature pointer register to avoid conflict with test + 800067cc: 000c8893 addi x17,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xddde302bc31343bb + 800067d0: 0001bc83 ld x25,0(x3) + 800067d4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x344fe3cc673f969c + 800067d8: 0001bc83 ld x25,0(x3) + 800067dc: 00818193 addi x3,x3,8 + +00000000800067e0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25: + clmul x25, x25, x25 # perform operation + 800067e0: 0b9c9cb3 clmul x25,x25,x25 + # Check if x25 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x25, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b25_str) + 800067e4: 0008b383 ld x7,0(x17) + 800067e8: 01938c63 beq x7,x25,80006800 + 800067ec: 52c0146f jal x8,80007d18 + 800067f0: 800067e0 .word 0x800067e0 + 800067f4: 00000000 .word 0x00000000 + 800067f8: 8001823d .word 0x8001823d + 800067fc: 00000000 .word 0x00000000 + 80006800: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x9eaeb9905c124ca7 + 80006804: 0001bd03 ld x26,0(x3) + 80006808: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xd664172748fe6c69 + 8000680c: 0001bd03 ld x26,0(x3) + 80006810: 00818193 addi x3,x3,8 + +0000000080006814 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26: + clmul x26, x26, x26 # perform operation + 80006814: 0bad1d33 clmul x26,x26,x26 + # Check if x26 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x26, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b26_str) + 80006818: 0008b383 ld x7,0(x17) + 8000681c: 01a38c63 beq x7,x26,80006834 + 80006820: 4f80146f jal x8,80007d18 + 80006824: 80006814 .word 0x80006814 + 80006828: 00000000 .word 0x00000000 + 8000682c: 8001827a .word 0x8001827a + 80006830: 00000000 .word 0x00000000 + 80006834: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xb9dfc2a34567d1da + 80006838: 0001bd83 ld x27,0(x3) + 8000683c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x6cfda07f5804d793 + 80006840: 0001bd83 ld x27,0(x3) + 80006844: 00818193 addi x3,x3,8 + +0000000080006848 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27: + clmul x27, x27, x27 # perform operation + 80006848: 0bbd9db3 clmul x27,x27,x27 + # Check if x27 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x27, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b27_str) + 8000684c: 0008b383 ld x7,0(x17) + 80006850: 01b38c63 beq x7,x27,80006868 + 80006854: 4c40146f jal x8,80007d18 + 80006858: 80006848 .word 0x80006848 + 8000685c: 00000000 .word 0x00000000 + 80006860: 800182b7 .word 0x800182b7 + 80006864: 00000000 .word 0x00000000 + 80006868: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xa610e2a256f3c367 + 8000686c: 0001be03 ld x28,0(x3) + 80006870: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x9b6b6e457e575bdf + 80006874: 0001be03 ld x28,0(x3) + 80006878: 00818193 addi x3,x3,8 + +000000008000687c : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28: + clmul x28, x28, x28 # perform operation + 8000687c: 0bce1e33 clmul x28,x28,x28 + # Check if x28 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x28, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b28_str) + 80006880: 0008b383 ld x7,0(x17) + 80006884: 01c38c63 beq x7,x28,8000689c + 80006888: 4900146f jal x8,80007d18 + 8000688c: 8000687c .word 0x8000687c + 80006890: 00000000 .word 0x00000000 + 80006894: 800182f4 .word 0x800182f4 + 80006898: 00000000 .word 0x00000000 + 8000689c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x86d73c0a480ae9c3 + 800068a0: 0001be83 ld x29,0(x3) + 800068a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0x1b9704288c1f97aa + 800068a8: 0001be83 ld x29,0(x3) + 800068ac: 00818193 addi x3,x3,8 + +00000000800068b0 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29: + clmul x29, x29, x29 # perform operation + 800068b0: 0bde9eb3 clmul x29,x29,x29 + # Check if x29 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x29, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b29_str) + 800068b4: 0008b383 ld x7,0(x17) + 800068b8: 01d38c63 beq x7,x29,800068d0 + 800068bc: 45c0146f jal x8,80007d18 + 800068c0: 800068b0 .word 0x800068b0 + 800068c4: 00000000 .word 0x00000000 + 800068c8: 80018331 .word 0x80018331 + 800068cc: 00000000 .word 0x00000000 + 800068d0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x6770230765c4aaa5 + 800068d4: 0001bf03 ld x30,0(x3) + 800068d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x0ca2e43fd9149e1a + 800068dc: 0001bf03 ld x30,0(x3) + 800068e0: 00818193 addi x3,x3,8 + +00000000800068e4 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30: + clmul x30, x30, x30 # perform operation + 800068e4: 0bef1f33 clmul x30,x30,x30 + # Check if x30 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x30, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b30_str) + 800068e8: 0008b383 ld x7,0(x17) + 800068ec: 01e38c63 beq x7,x30,80006904 + 800068f0: 4280146f jal x8,80007d18 + 800068f4: 800068e4 .word 0x800068e4 + 800068f8: 00000000 .word 0x00000000 + 800068fc: 8001836e .word 0x8001836e + 80006900: 00000000 .word 0x00000000 + 80006904: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x16836b05fb7d1995 + 80006908: 0001bf83 ld x31,0(x3) + 8000690c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x2c796507ceaef2f5 + 80006910: 0001bf83 ld x31,0(x3) + 80006914: 00818193 addi x3,x3,8 + +0000000080006918 : +Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31: + clmul x31, x31, x31 # perform operation + 80006918: 0bff9fb3 clmul x31,x31,x31 + # Check if x31 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x31, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31, Zbkc_clmul_cg_cmp_rd_rs1_rs2_b31_str) + 8000691c: 0008b383 ld x7,0(x17) + 80006920: 01f38c63 beq x7,x31,80006938 + 80006924: 3f40146f jal x8,80007d18 + 80006928: 80006918 .word 0x80006918 + 8000692c: 00000000 .word 0x00000000 + 80006930: 800183ab .word 0x800183ab + 80006934: 00000000 .word 0x00000000 + 80006938: 00888893 addi x17,x17,8 + + mv x2, x17 # restore signature pointer to default register for teardown + 8000693c: 00088113 addi x2,x17,0 + +0000000080006940 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006940: 00000513 addi x10,x0,0 + 80006944: 00000073 ecall + 80006948: fff00513 addi x10,x0,-1 + 8000694c: 25800413 addi x8,x0,600 + +0000000080006950 : + 80006950: 34002373 csrrs x6,mscratch,x0 + +0000000080006954 : + 80006954: 2b833383 ld x7,696(x6) + +0000000080006958 : + 80006958: 2a033383 ld x7,672(x6) + +000000008000695c : + 8000695c: 2d033483 ld x9,720(x6) + 80006960: 34049073 csrrw x0,mscratch,x9 + +0000000080006964 : + 80006964: 2c833483 ld x9,712(x6) + 80006968: 305493f3 csrrw x7,mtvec,x9 + 8000696c: ffc4f493 andi x9,x9,-4 + 80006970: ffc3f393 andi x7,x7,-4 + 80006974: 00749e63 bne x9,x7,80006990 + +0000000080006978 : + 80006978: 00030493 addi x9,x6,0 + +000000008000697c : + 8000697c: 0004a783 lw x15,0(x9) + 80006980: 00f3a023 sw x15,0(x7) + 80006984: 00438393 addi x7,x7,4 + 80006988: 00448493 addi x9,x9,4 + 8000698c: fe83c8e3 blt x7,x8,8000697c + 80006990: 0000100f fence.i + +0000000080006994 : + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 00000497 auipc x9,0x0 + 800069a4: 2b048493 addi x9,x9,688 # 80006c50 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 10e49863 bne x9,x14,80006ad0 + 800069c4: 00000013 addi x0,x0,0 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00012517 auipc x10,0x12 + 800069e4: 12f50513 addi x10,x10,303 # 80018b0f + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00033097 auipc x1,0x33 + 80006a04: ba4080e7 jalr x1,-1116(x1) # 800395a4 + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00012517 auipc x10,0x12 + 80006a24: 12950513 addi x10,x10,297 # 80018b49 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00033097 auipc x1,0x33 + 80006a44: b64080e7 jalr x1,-1180(x1) # 800395a4 + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00012517 auipc x10,0x12 + 80006a64: 14950513 addi x10,x10,329 # 80018ba9 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00033097 auipc x1,0x33 + 80006a84: b24080e7 jalr x1,-1244(x1) # 800395a4 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00013517 auipc x10,0x13 + 80006aa4: cb450513 addi x10,x10,-844 # 80019754 + 80006aa8: 00000013 addi x0,x0,0 + 80006aac: 00000013 addi x0,x0,0 + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00033097 auipc x1,0x33 + 80006ac4: ae4080e7 jalr x1,-1308(x1) # 800395a4 + 80006ac8: 00033097 auipc x1,0x33 + 80006acc: b3c080e7 jalr x1,-1220(x1) # 80039604 + +0000000080006ad0 : + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00006317 auipc x6,0x6 + 80006ae4: 8c830313 addi x6,x6,-1848 # 8000c3a8 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00033303 ld x6,0(x6) + 80006b04: 00000013 addi x0,x0,0 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 00014397 auipc x7,0x14 + 80006b24: 72038393 addi x7,x7,1824 # 8001b240 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 40730333 sub x6,x6,x7 + 80006b44: 00000013 addi x0,x0,0 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00014417 auipc x8,0x14 + 80006b64: 6d040413 addi x8,x8,1744 # 8001b230 + 80006b68: 00000013 addi x0,x0,0 + 80006b6c: 00000013 addi x0,x0,0 + 80006b70: 00000013 addi x0,x0,0 + 80006b74: 00000013 addi x0,x0,0 + 80006b78: 00000013 addi x0,x0,0 + 80006b7c: 00000013 addi x0,x0,0 + 80006b80: 00043203 ld x4,0(x8) + 80006b84: 00620c63 beq x4,x6,80006b9c + 80006b88: 1e0013ef jal x7,80007d68 + 80006b8c: 80006ad0 .word 0x80006ad0 + 80006b90: 00000000 .word 0x00000000 + 80006b94: 80018cfd .word 0x80018cfd + 80006b98: 00000000 .word 0x00000000 + +0000000080006b9c : + 80006b9c: 000004b7 lui x9,0x0 + 80006ba0: 00048493 addi x9,x9,0 # 0 + 80006ba4: 00b49493 slli x9,x9,0xb + 80006ba8: 5d648493 addi x9,x9,1494 + 80006bac: 00b49493 slli x9,x9,0xb + 80006bb0: 43748493 addi x9,x9,1079 + 80006bb4: 00a49493 slli x9,x9,0xa + 80006bb8: 2ad48493 addi x9,x9,685 + 80006bbc: 00e49e63 bne x9,x14,80006bd8 + 80006bc0: 1a8013ef jal x7,80007d68 + 80006bc4: 80006c84 .word 0x80006c84 + 80006bc8: 00000000 .word 0x00000000 + 80006bcc: 80018b6b .word 0x80018b6b + 80006bd0: 00000000 .word 0x00000000 + 80006bd4: 00000341 .word 0x00000341 + +0000000080006bd8 : + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00012517 auipc x10,0x12 + 80006be4: ef450513 addi x10,x10,-268 # 80018ad4 + 80006be8: 00000013 addi x0,x0,0 + 80006bec: 00000013 addi x0,x0,0 + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00033097 auipc x1,0x33 + 80006c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80006c08: 00033097 auipc x1,0x33 + 80006c0c: 9dc080e7 jalr x1,-1572(x1) # 800395e4 + +0000000080006c10 : + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00012517 auipc x10,0x12 + 80006c24: eef50513 addi x10,x10,-273 # 80018b0f + 80006c28: 00000013 addi x0,x0,0 + 80006c2c: 00000013 addi x0,x0,0 + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00033097 auipc x1,0x33 + 80006c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80006c48: 00033097 auipc x1,0x33 + 80006c4c: 9bc080e7 jalr x1,-1604(x1) # 80039604 + +0000000080006c50 : + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: 00000717 auipc x14,0x0 + 80006c64: ff070713 addi x14,x14,-16 # 80006c50 + 80006c68: 00000013 addi x0,x0,0 + 80006c6c: 00000013 addi x0,x0,0 + 80006c70: 00000013 addi x0,x0,0 + 80006c74: 00000013 addi x0,x0,0 + 80006c78: 00000013 addi x0,x0,0 + 80006c7c: 00000013 addi x0,x0,0 + 80006c80: cc1ff06f jal x0,80006940 + +0000000080006c84 : + 80006c84: 00000737 lui x14,0x0 + 80006c88: 00070713 addi x14,x14,0 # 0 + 80006c8c: 00b71713 slli x14,x14,0xb + 80006c90: 5d670713 addi x14,x14,1494 + 80006c94: 00b71713 slli x14,x14,0xb + 80006c98: 43770713 addi x14,x14,1079 + 80006c9c: 00a71713 slli x14,x14,0xa + 80006ca0: 2ad70713 addi x14,x14,685 + 80006ca4: c9dff06f jal x0,80006940 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: ab430313 addi x6,x6,-1356 # 80006994 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 0ab50513 addi x10,x10,171 # 8001a18b + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 43850513 addi x10,x10,1080 # 80018558 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: ab250513 addi x10,x10,-1358 # 80018c12 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: 96f50513 addi x10,x10,-1681 # 80018b0f + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: f9848493 addi x9,x9,-104 # 80018538 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 12840413 addi x8,x8,296 # 80038708 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e4946663 bltu x8,x9,80006c50 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018d14 .word 0x80018d14 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80018e16 .word 0x80018e16 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d2f47a63 bgeu x8,x15,80006c84 + 80007754: d2746863 bltu x8,x7,80006c84 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80018f11 .word 0x80018f11 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80019004 .word 0x80019004 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80019177 .word 0x80019177 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bfcff06f jal x0,80006c84 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00010217 auipc x4,0x10 + 80007d04: 6f020213 addi x4,x4,1776 # 800183f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00010397 auipc x7,0x10 + 80007d1c: 6d838393 addi x7,x7,1752 # 800183f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00010697 auipc x13,0x10 + 80007d44: 6b068693 addi x13,x13,1712 # 800183f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00010497 auipc x9,0x10 + 80007d6c: 68848493 addi x9,x9,1672 # 800183f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 5e44a483 lw x9,1508(x9) # 800183f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 31040413 addi x8,x8,784 # 8001a1d0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: 81040413 addi x8,x8,-2032 # 80038710 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 5d848493 addi x9,x9,1496 # 80018518 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 59848493 addi x9,x9,1432 # 80018518 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 56c80813 addi x16,x16,1388 # 80018528 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 54c80813 addi x16,x16,1356 # 80018528 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: d1538393 addi x7,x7,-747 # 80018cfd + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 52880813 addi x16,x16,1320 # 80018520 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: d1038393 addi x7,x7,-752 # 80018d14 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: dfa38393 addi x7,x7,-518 # 80018e16 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: edd38393 addi x7,x7,-291 # 80018f11 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: fb838393 addi x7,x7,-72 # 80019004 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 11338393 addi x7,x7,275 # 80019177 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 07f38393 addi x7,x7,127 # 800190fb + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 0a538393 addi x7,x7,165 # 80019139 + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: ca838393 addi x7,x7,-856 # 80018d54 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: d9038393 addi x7,x7,-624 # 80018e54 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: e7138393 addi x7,x7,-399 # 80018f4d + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: f4d38393 addi x7,x7,-179 # 80019041 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 0a638393 addi x7,x7,166 # 800191b2 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: c7038393 addi x7,x7,-912 # 80018d94 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: d5638393 addi x7,x7,-682 # 80018e92 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: e3538393 addi x7,x7,-459 # 80018f89 + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: f1238393 addi x7,x7,-238 # 8001907e + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 06938393 addi x7,x7,105 # 800191ed + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: c3938393 addi x7,x7,-967 # 80018dd5 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: d1d38393 addi x7,x7,-739 # 80018ed1 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: dfa38393 addi x7,x7,-518 # 80018fc6 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: ed838393 addi x7,x7,-296 # 800190bc + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 02d38393 addi x7,x7,45 # 80019229 + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 05238393 addi x7,x7,82 # 80019266 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 08938393 addi x7,x7,137 # 800192b5 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 16c38393 addi x7,x7,364 # 800193b0 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 25038393 addi x7,x7,592 # 800194ac + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 2a480813 addi x16,x16,676 # 80018520 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 29480813 addi x16,x16,660 # 80018520 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 28c80813 addi x16,x16,652 # 80018524 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 27880813 addi x16,x16,632 # 80018520 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: 80f50513 addi x10,x10,-2033 # 80018b0f + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: 80950513 addi x10,x10,-2039 # 80018b49 + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: 88050513 addi x10,x10,-1920 # 80018c00 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 16853503 ld x10,360(x10) # 80018510 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: 85250513 addi x10,x10,-1966 # 80018c12 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 00852503 lw x10,8(x10) # 800183f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: 81450513 addi x10,x10,-2028 # 80018c14 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 0c852503 lw x10,200(x10) # 800184f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 0f850513 addi x10,x10,248 # 80018558 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00010517 auipc x10,0x10 + 800084a4: 78850513 addi x10,x10,1928 # 80018c28 + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 03053503 ld x10,48(x10) # 800184f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 07850513 addi x10,x10,120 # 80018558 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 13f50513 addi x10,x10,319 # 8001965f + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: ea852503 lw x10,-344(x10) # 800183f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: ff860613 addi x12,x12,-8 # 80018558 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: f6c52503 lw x10,-148(x10) # 800184f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 1b550513 addi x10,x10,437 # 80019775 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: f5860613 addi x12,x12,-168 # 80018558 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: ecc52503 lw x10,-308(x10) # 800184f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: f1860613 addi x12,x12,-232 # 80018558 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: e8c52503 lw x10,-372(x10) # 800184f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: fd850513 addi x10,x10,-40 # 80019658 + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: e9850513 addi x10,x10,-360 # 80018558 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: f7050513 addi x10,x10,-144 # 80019670 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: cc852503 lw x10,-824(x10) # 800183f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: dc853503 ld x10,-568(x10) # 80018500 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: db453503 ld x10,-588(x10) # 80018500 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: df850513 addi x10,x10,-520 # 80018558 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: d9052503 lw x10,-624(x10) # 80018518 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: ee750513 addi x10,x10,-281 # 80019687 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: c2852503 lw x10,-984(x10) # 800183f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: d3053503 ld x10,-720(x10) # 80018508 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: d1c53503 ld x10,-740(x10) # 80018508 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: d5850513 addi x10,x10,-680 # 80018558 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: e5e50513 addi x10,x10,-418 # 8001969e + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: ca053503 ld x10,-864(x10) # 80018508 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: cd850513 addi x10,x10,-808 # 80018558 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: e3c50513 addi x10,x10,-452 # 800196fc + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: c2053503 ld x10,-992(x10) # 80018508 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: c5850513 addi x10,x10,-936 # 80018558 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: bf442403 lw x8,-1036(x8) # 80018520 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: e6150513 addi x10,x10,-415 # 800197a1 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: e4d50513 addi x10,x10,-435 # 800197cd + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: b8080813 addi x16,x16,-1152 # 80018528 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 25250513 addi x10,x10,594 # 80018c12 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: ddd50513 addi x10,x10,-547 # 800197dd + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: ae053503 ld x10,-1312(x10) # 80018508 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: b1850513 addi x10,x10,-1256 # 80018558 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: d8850513 addi x10,x10,-632 # 80019808 + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: a5853503 ld x10,-1448(x10) # 80018500 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: a9850513 addi x10,x10,-1384 # 80018558 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: a1833303 ld x6,-1512(x6) # 80018500 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: a183b383 ld x7,-1512(x7) # 80018508 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: d3750513 addi x10,x10,-713 # 80019837 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: d5f50513 addi x10,x10,-673 # 8001989f + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: 99833303 ld x6,-1640(x6) # 80018500 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: 9983b383 ld x7,-1640(x7) # 80018508 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: 9b850513 addi x10,x10,-1608 # 80018558 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ce650513 addi x10,x10,-794 # 800198c6 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: c4350513 addi x10,x10,-957 # 80019863 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: c3f50513 addi x10,x10,-961 # 8001989f + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: 88033303 ld x6,-1920(x6) # 80018508 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: 8703b383 ld x7,-1936(x7) # 80018500 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: 89850513 addi x10,x10,-1896 # 80018558 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: cae50513 addi x10,x10,-850 # 800199ae + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: d5550513 addi x10,x10,-683 # 80019a95 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 0000f517 auipc x10,0xf + 80008d6c: 7bc52503 lw x10,1980(x10) # 80018524 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: d3150513 addi x10,x10,-719 # 80019ad1 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: ccf50513 addi x10,x10,-817 # 80019aaf + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: c9750513 addi x10,x10,-873 # 80019ab7 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: c5f50513 addi x10,x10,-929 # 80019abf + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: c2850513 addi x10,x10,-984 # 80019ac8 + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: bfa50513 addi x10,x10,-1030 # 80019ada + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 0000f517 auipc x10,0xf + 80008f0c: 61852503 lw x10,1560(x10) # 80018520 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: cd150513 addi x10,x10,-815 # 80019c31 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: b5450513 addi x10,x10,-1196 # 80019af4 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: b4550513 addi x10,x10,-1211 # 80019b25 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: b2550513 addi x10,x10,-1243 # 80019b45 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: b0350513 addi x10,x10,-1277 # 80019b63 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: ae250513 addi x10,x10,-1310 # 80019b82 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: aca50513 addi x10,x10,-1334 # 80019baa + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: ab650513 addi x10,x10,-1354 # 80019bd6 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: aa250513 addi x10,x10,-1374 # 80019c02 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: aa050513 addi x10,x10,-1376 # 80019c40 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 34053503 ld x10,832(x10) # 80018508 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 37850513 addi x10,x10,888 # 80018558 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: a3750513 addi x10,x10,-1481 # 80019c57 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 2b853503 ld x10,696(x10) # 80018500 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 2f850513 addi x10,x10,760 # 80018558 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 29852503 lw x10,664(x10) # 80018520 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: 9ce50513 addi x10,x10,-1586 # 80019c6e + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 24053503 ld x10,576(x10) # 80018508 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: 9a550513 addi x10,x10,-1627 # 80019c85 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 1f853503 ld x10,504(x10) # 80018500 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 1fc52503 lw x10,508(x10) # 80018520 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: 9bb50513 addi x10,x10,-1605 # 80019cfb + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: a5150513 addi x10,x10,-1455 # 80019dd1 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: b0450513 addi x10,x10,-1276 # 80019ec4 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: bbf50513 addi x10,x10,-1089 # 80019fbf + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: c6650513 addi x10,x10,-922 # 8001a0a6 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: 83350513 addi x10,x10,-1997 # 80019cb3 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 09063603 ld x12,144(x12) # 80018538 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 0000f517 auipc x10,0xf + 800094c4: 7dc50513 addi x10,x10,2012 # 80018c9c + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 03850513 addi x10,x10,56 # 80018558 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 02058593 addi x11,x11,32 # 80018580 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 0b058593 addi x11,x11,176 # 80018640 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 4fe50513 addi x10,x10,1278 # 80018abe + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 15450513 addi x10,x10,340 # 80019754 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: f0060613 addi x12,x12,-256 # 80018530 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 0000f517 auipc x10,0xf + 80009644: 67d50513 addi x10,x10,1661 # 80018cbd + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: ed053503 ld x10,-304(x10) # 80018538 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: ed850513 addi x10,x10,-296 # 80018558 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 0000f517 auipc x10,0xf + 800096c4: 60d50513 addi x10,x10,1549 # 80018ccd + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: e5853503 ld x10,-424(x10) # 80018540 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: e5850513 addi x10,x10,-424 # 80018558 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 59d50513 addi x10,x10,1437 # 80018cdd + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: de053503 ld x10,-544(x10) # 80018548 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: dd850513 addi x10,x10,-552 # 80018558 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 52d50513 addi x10,x10,1325 # 80018ced + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: d6853503 ld x10,-664(x10) # 80018550 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: d5850513 addi x10,x10,-680 # 80018558 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: d0860613 addi x12,x12,-760 # 80018530 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: d1860613 addi x12,x12,-744 # 80018558 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 8a830313 addi x6,x6,-1880 # 80006940 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 89030313 addi x6,x6,-1904 # 80006940 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 87830313 addi x6,x6,-1928 # 80006940 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 71078793 addi x15,x15,1808 # 80006950 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: cf010113 addi x2,x2,-784 # 8001a1d0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001977d .word 0x8001977d + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 21828293 addi x5,x5,536 # 80038800 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 1f828293 addi x5,x5,504 # 80038800 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkc-clmulh-00.elf.objdump b/riscv-tests/rv64-Zbkc-clmulh-00.elf.objdump new file mode 100644 index 0000000..0eaa48a --- /dev/null +++ b/riscv-tests/rv64-Zbkc-clmulh-00.elf.objdump @@ -0,0 +1,17093 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkc/Zbkc-clmulh-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkc/Zbkc-clmulh-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c920 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038a00 0000000080038a00 00037a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031ac 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 0000000000000000 0000000000000000 0003b867 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8e3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b906 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b920 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 0000000000000000 0000000000000000 0003b960 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9ea 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038a00 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccXigvv1.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b1 +000000008000e4a3 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b2 +000000008000e4d6 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b3 +000000008000e509 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b4 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e53c l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b5 +000000008000e56f l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b6 +000000008000e5a2 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b7 +000000008000e5d5 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b8 +000000008000e608 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b9 +000000008000e63b l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b9_str +000000008000026c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b10 +000000008000e66f l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b10_str +00000000800002a0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b11 +000000008000e6a4 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b11_str +00000000800002d4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b12 +000000008000e6d9 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b12_str +0000000080000310 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b13 +0000000080007d18 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000e70e l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b13_str +0000000080000344 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b14 +000000008000e743 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b14_str +0000000080000378 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b15 +000000008000e778 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b15_str +00000000800003ac l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b16 +000000008000e7ad l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b16_str +00000000800003e0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b17 +000000008000e7e2 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b17_str +0000000080000414 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b18 +000000008000e817 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b18_str +000000008000044c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b19 +000000008000e84c l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b19_str +0000000080000480 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b20 +000000008000e881 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b20_str +00000000800004b4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b21 +000000008000e8b6 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b21_str +00000000800004e8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b22 +000000008000e8eb l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b22_str +000000008000051c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b23 +000000008000e920 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b23_str +0000000080000550 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b24 +000000008000e955 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b24_str +0000000080000584 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b25 +000000008000e98a l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b25_str +00000000800005b8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b26 +000000008000e9bf l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b26_str +00000000800005ec l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b27 +000000008000e9f4 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b27_str +0000000080000620 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b28 +000000008000ea29 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b28_str +0000000080000654 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b29 +000000008000ea5e l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b29_str +000000008000068c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b30 +000000008000ea93 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b30_str +00000000800006c4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b31 +000000008000eac8 l .data 0000000000000000 Zbkc_clmulh_cg_cp_rs1_b31_str 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Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080002cc4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2 +00000000800123a5 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080002cf8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080012416 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080002d2c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555 +0000000080012487 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str +0000000080002d60 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff +00000000800124f8 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str +0000000080002d94 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe +0000000080012561 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str +0000000080002dc8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000 +00000000800125ca l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str +0000000080002dfc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001 +0000000080012634 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str +0000000080002e30 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0 +000000008001269e l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e64 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +0000000080012700 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str +0000000080002e98 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2 +0000000080012762 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str +0000000080002ecc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000 +00000000800127c4 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str +0000000080002f00 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001 +0000000080012835 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str +0000000080002f34 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff +00000000800128a6 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str +0000000080002f68 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe +0000000080012917 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080002f9c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff +0000000080012988 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080002fd0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe +00000000800129f9 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003004 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080012a6a l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080003038 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080012adb l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +000000008000306c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555 +0000000080012b4c l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str +00000000800030a0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff +0000000080012bbd l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str +00000000800030d4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe +0000000080012c26 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str +0000000080003108 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000 +0000000080012c8f l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str +000000008000313c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001 +0000000080012cf9 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str +0000000080003170 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0 +0000000080012d63 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str +00000000800031a4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1 +0000000080012dc5 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str +00000000800031d8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2 +0000000080012e27 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str +000000008000320c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000 +0000000080012e89 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str +0000000080003240 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080012efa l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +0000000080003274 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080012f6b l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032a8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +0000000080012fdc l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032dc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +000000008001304d l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080003310 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +00000000800130be l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003344 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001312f l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003378 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800131a0 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033ac l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080013211 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033e0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +0000000080013282 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003414 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +00000000800132eb l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003448 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +0000000080013354 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +000000008000347c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800133be l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034b0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013428 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034e4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +000000008001348a l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003518 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800134ec l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +000000008000354c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +000000008001354e l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +0000000080003580 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800135bf l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035b4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080013630 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035e8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +00000000800136a1 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +000000008000361c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +0000000080013712 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080003650 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080013783 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003684 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800137f4 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036b8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013865 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036ec l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +00000000800138d6 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +0000000080003720 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +0000000080013947 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +0000000080003754 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe 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Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014d25 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014d96 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004114 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014dff l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004148 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014e68 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +000000008000417c l .text.rvtest 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.text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe +000000008001589c l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str +00000000800046c4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2 +0000000080015905 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800046f8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa +000000008001596e l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +000000008000472c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555 +00000000800159d7 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str +0000000080004760 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff +0000000080015a40 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str +0000000080004794 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe +0000000080015aa1 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str +00000000800047c8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000 +0000000080015b02 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str +00000000800047fc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001 +0000000080015b64 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str +0000000080004830 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0 +0000000080015bc6 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str +0000000080004864 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1 +0000000080015c21 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str +0000000080004898 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2 +0000000080015c7c l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str +00000000800048cc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000 +0000000080015cd7 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str +0000000080004900 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001 +0000000080015d41 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str +0000000080004934 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff +0000000080015dab l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str +0000000080004968 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe +0000000080015e15 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str +000000008000499c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff +0000000080015e7f l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str +00000000800049d0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe +0000000080015ee9 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str +0000000080004a04 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2 +0000000080015f53 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str +0000000080004a38 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa +0000000080015fbd l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004a6c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555 +0000000080016027 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str +0000000080004aa0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff +0000000080016091 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str +0000000080004ad4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe +00000000800160f3 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str +0000000080004b08 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000 +0000000080016155 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str +0000000080004b3c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001 +00000000800161b8 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str +0000000080004b70 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0 +000000008001621b l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str +0000000080004ba4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1 +0000000080016276 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str +0000000080004bd8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2 +00000000800162d1 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str +0000000080004c0c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000 +000000008001632c l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str +0000000080004c40 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001 +0000000080016396 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str +0000000080004c74 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff +0000000080016400 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str +0000000080004ca8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe +000000008001646a l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str +0000000080004cdc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff +00000000800164d4 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str +0000000080004d10 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe +000000008001653e l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str +0000000080004d44 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2 +00000000800165a8 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str +0000000080004d78 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa +0000000080016612 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004dac l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555 +000000008001667c l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str +0000000080004de0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff +00000000800166e6 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str +0000000080004e14 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe +0000000080016748 l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str +0000000080004e48 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000 +00000000800167aa l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str +0000000080004e7c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001 +000000008001680d l .data 0000000000000000 Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str +0000000080004eb0 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b0 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Zbkc_clmulh_cg_cmp_rs1_rs2_b6_str +0000000080005028 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b7 +0000000080016a06 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b7_str +000000008000505c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b8 +0000000080016a40 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b8_str +0000000080005090 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b9 +0000000080016a7a l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b9_str +00000000800050c4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b10 +0000000080016ab4 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b10_str +00000000800050f8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b11 +0000000080016aef l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b11_str +000000008000512c l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b12 +0000000080016b2a l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b12_str +0000000080005160 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b13 +0000000080016b65 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b13_str +0000000080005194 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b14 +0000000080016ba0 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b14_str +00000000800051c8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b15 +0000000080016bdb l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b15_str +00000000800051fc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b16 +0000000080016c16 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b16_str +0000000080005230 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b17 +0000000080016c51 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b17_str +0000000080005264 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b18 +0000000080016c8c l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b18_str +0000000080005298 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b19 +0000000080016cc7 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b19_str +00000000800052cc l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b20 +0000000080016d02 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b20_str +0000000080005304 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b21 +0000000080016d3d l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b21_str +0000000080005338 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b22 +0000000080016d78 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b22_str +0000000080005370 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b23 +0000000080016db3 l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b23_str +00000000800053a4 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b24 +0000000080016dee l .data 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b24_str +00000000800053d8 l .text.rvtest 0000000000000000 Zbkc_clmulh_cg_cmp_rs1_rs2_b25 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80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x1acbd27438231aba + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x2e210fbcf4bf67b0 + 80000048: 0001b983 ld x19,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkc_clmulh_cg_cp_rs1_b0: + clmulh x28, x0, x19 # perform operation + 80000050: 0b303e33 clmulh x28,x0,x19 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zbkc_clmulh_cg_cp_rs1_b0, Zbkc_clmulh_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01c20c63 beq x4,x28,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1fb2020225d89a9b + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xa51566d153211ffc + 8000007c: 0001ba03 ld x20,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkc_clmulh_cg_cp_rs1_b1: + clmulh x17, x1, x20 # perform operation + 80000084: 0b40b8b3 clmulh x17,x1,x20 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zbkc_clmulh_cg_cp_rs1_b1, Zbkc_clmulh_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01120c63 beq x4,x17,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a3 .word 0x8000e4a3 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x31, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010f93 addi x31,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3dc82f877b4873e4 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0x2a914f286a65b0a9 + 800000b4: 0001b603 ld x12,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkc_clmulh_cg_cp_rs1_b2: + clmulh x7, x2, x12 # perform operation + 800000bc: 0ac133b3 clmulh x7,x2,x12 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zbkc_clmulh_cg_cp_rs1_b2, Zbkc_clmulh_cg_cp_rs1_b2_str) + 800000c0: 000fb203 ld x4,0(x31) + 800000c4: 00720c63 beq x4,x7,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d6 .word 0x8000e4d6 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008f8f93 addi x31,x31,8 + + mv x10, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x71e7cf044d0a7d3b + 800000e4: 00053183 ld x3,0(x10) + 800000e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xf13b64b48d23ab0d + 800000ec: 00053f03 ld x30,0(x10) + 800000f0: 00850513 addi x10,x10,8 + +00000000800000f4 : +Zbkc_clmulh_cg_cp_rs1_b3: + clmulh x2, x3, x30 # perform operation + 800000f4: 0be1b133 clmulh x2,x3,x30 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zbkc_clmulh_cg_cp_rs1_b3, Zbkc_clmulh_cg_cp_rs1_b3_str) + 800000f8: 000fb203 ld x4,0(x31) + 800000fc: 00220c63 beq x4,x2,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e509 .word 0x8000e509 + 80000110: 00000000 .word 0x00000000 + 80000114: 008f8f93 addi x31,x31,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x33f6738b1f49f3c7 + 80000120: 00053203 ld x4,0(x10) + 80000124: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xb7d337840c22a2df + 80000128: 00053383 ld x7,0(x10) + 8000012c: 00850513 addi x10,x10,8 + +0000000080000130 : +Zbkc_clmulh_cg_cp_rs1_b4: + clmulh x18, x4, x7 # perform operation + 80000130: 0a723933 clmulh x18,x4,x7 + # Check if x18 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x18, Zbkc_clmulh_cg_cp_rs1_b4, Zbkc_clmulh_cg_cp_rs1_b4_str) + 80000134: 000fb683 ld x13,0(x31) + 80000138: 01268c63 beq x13,x18,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e53c .word 0x8000e53c + 8000014c: 00000000 .word 0x00000000 + 80000150: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xa5464ca74f29a79f + 80000154: 00053283 ld x5,0(x10) + 80000158: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xd9b4f4b99ad0f954 + 8000015c: 00053003 ld x0,0(x10) + 80000160: 00850513 addi x10,x10,8 + +0000000080000164 : +Zbkc_clmulh_cg_cp_rs1_b5: + clmulh x9, x5, x0 # perform operation + 80000164: 0a02b4b3 clmulh x9,x5,x0 + # Check if x9 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x9, Zbkc_clmulh_cg_cp_rs1_b5, Zbkc_clmulh_cg_cp_rs1_b5_str) + 80000168: 000fb683 ld x13,0(x31) + 8000016c: 00968c63 beq x13,x9,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e56f .word 0x8000e56f + 80000180: 00000000 .word 0x00000000 + 80000184: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf754a2169c49c856 + 80000188: 00053303 ld x6,0(x10) + 8000018c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7c391fa80f6a91ab + 80000190: 00053103 ld x2,0(x10) + 80000194: 00850513 addi x10,x10,8 + +0000000080000198 : +Zbkc_clmulh_cg_cp_rs1_b6: + clmulh x30, x6, x2 # perform operation + 80000198: 0a233f33 clmulh x30,x6,x2 + # Check if x30 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x30, Zbkc_clmulh_cg_cp_rs1_b6, Zbkc_clmulh_cg_cp_rs1_b6_str) + 8000019c: 000fb683 ld x13,0(x31) + 800001a0: 01e68c63 beq x13,x30,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e5a2 .word 0x8000e5a2 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xda5b7dd30c85a575 + 800001bc: 00053383 ld x7,0(x10) + 800001c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xde6752fa66d41bed + 800001c4: 00053f03 ld x30,0(x10) + 800001c8: 00850513 addi x10,x10,8 + +00000000800001cc : +Zbkc_clmulh_cg_cp_rs1_b7: + clmulh x27, x7, x30 # perform operation + 800001cc: 0be3bdb3 clmulh x27,x7,x30 + # Check if x27 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x27, Zbkc_clmulh_cg_cp_rs1_b7, Zbkc_clmulh_cg_cp_rs1_b7_str) + 800001d0: 000fb683 ld x13,0(x31) + 800001d4: 01b68c63 beq x13,x27,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5d5 .word 0x8000e5d5 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x3094358cdb2f971e + 800001f0: 00053403 ld x8,0(x10) + 800001f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x3fadcdb7bb6b6cda + 800001f8: 00053b83 ld x23,0(x10) + 800001fc: 00850513 addi x10,x10,8 + +0000000080000200 : +Zbkc_clmulh_cg_cp_rs1_b8: + clmulh x29, x8, x23 # perform operation + 80000200: 0b743eb3 clmulh x29,x8,x23 + # Check if x29 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x29, Zbkc_clmulh_cg_cp_rs1_b8, Zbkc_clmulh_cg_cp_rs1_b8_str) + 80000204: 000fb683 ld x13,0(x31) + 80000208: 01d68c63 beq x13,x29,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e608 .word 0x8000e608 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x488e7b314c03b4da + 80000224: 00053483 ld x9,0(x10) + 80000228: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x949c612339ed20a3 + 8000022c: 00053d83 ld x27,0(x10) + 80000230: 00850513 addi x10,x10,8 + +0000000080000234 : +Zbkc_clmulh_cg_cp_rs1_b9: + clmulh x18, x9, x27 # perform operation + 80000234: 0bb4b933 clmulh x18,x9,x27 + # Check if x18 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x18, Zbkc_clmulh_cg_cp_rs1_b9, Zbkc_clmulh_cg_cp_rs1_b9_str) + 80000238: 000fb683 ld x13,0(x31) + 8000023c: 01268c63 beq x13,x18,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e63b .word 0x8000e63b + 80000250: 00000000 .word 0x00000000 + 80000254: 008f8f93 addi x31,x31,8 + + mv x19, x10 # switch data pointer register to avoid conflict with test + 80000258: 00050993 addi x19,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x3dd9b0d4709bafa3 + 8000025c: 0009b503 ld x10,0(x19) + 80000260: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x22) # load rs2: x22 = 0xc874340e5d339823 + 80000264: 0009bb03 ld x22,0(x19) + 80000268: 00898993 addi x19,x19,8 + +000000008000026c : +Zbkc_clmulh_cg_cp_rs1_b10: + clmulh x21, x10, x22 # perform operation + 8000026c: 0b653ab3 clmulh x21,x10,x22 + # Check if x21 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x21, Zbkc_clmulh_cg_cp_rs1_b10, Zbkc_clmulh_cg_cp_rs1_b10_str) + 80000270: 000fb683 ld x13,0(x31) + 80000274: 01568c63 beq x13,x21,8000028c + 80000278: 2c90776f jal x14,80007d40 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 8000e66f .word 0x8000e66f + 80000288: 00000000 .word 0x00000000 + 8000028c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x50638b7378b5f2a6 + 80000290: 0009b583 ld x11,0(x19) + 80000294: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0xc2090702a7202bbf + 80000298: 0009b003 ld x0,0(x19) + 8000029c: 00898993 addi x19,x19,8 + +00000000800002a0 : +Zbkc_clmulh_cg_cp_rs1_b11: + clmulh x6, x11, x0 # perform operation + 800002a0: 0a05b333 clmulh x6,x11,x0 + # Check if x6 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x6, Zbkc_clmulh_cg_cp_rs1_b11, Zbkc_clmulh_cg_cp_rs1_b11_str) + 800002a4: 000fb683 ld x13,0(x31) + 800002a8: 00668c63 beq x13,x6,800002c0 + 800002ac: 2950776f jal x14,80007d40 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 8000e6a4 .word 0x8000e6a4 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xccee6b28f9ad3133 + 800002c4: 0009b603 ld x12,0(x19) + 800002c8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x5194e7c7d91fb530 + 800002cc: 0009b803 ld x16,0(x19) + 800002d0: 00898993 addi x19,x19,8 + +00000000800002d4 : +Zbkc_clmulh_cg_cp_rs1_b12: + clmulh x18, x12, x16 # perform operation + 800002d4: 0b063933 clmulh x18,x12,x16 + # Check if x18 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x18, Zbkc_clmulh_cg_cp_rs1_b12, Zbkc_clmulh_cg_cp_rs1_b12_str) + 800002d8: 000fb683 ld x13,0(x31) + 800002dc: 01268c63 beq x13,x18,800002f4 + 800002e0: 2610776f jal x14,80007d40 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 8000e6d9 .word 0x8000e6d9 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 008f8f93 addi x31,x31,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002f8: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002fc: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x312c849c5920c717 + 80000300: 0009b683 ld x13,0(x19) + 80000304: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0x33acc60d441fa5e7 + 80000308: 0009ba83 ld x21,0(x19) + 8000030c: 00898993 addi x19,x19,8 + +0000000080000310 : +Zbkc_clmulh_cg_cp_rs1_b13: + clmulh x29, x13, x21 # perform operation + 80000310: 0b56beb3 clmulh x29,x13,x21 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkc_clmulh_cg_cp_rs1_b13, Zbkc_clmulh_cg_cp_rs1_b13_str) + 80000314: 000fb383 ld x7,0(x31) + 80000318: 01d38c63 beq x7,x29,80000330 + 8000031c: 1fd0746f jal x8,80007d18 + 80000320: 80000310 .word 0x80000310 + 80000324: 00000000 .word 0x00000000 + 80000328: 8000e70e .word 0x8000e70e + 8000032c: 00000000 .word 0x00000000 + 80000330: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xb86cdddccf7202fe + 80000334: 0009b703 ld x14,0(x19) + 80000338: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs2: x21 = 0xeba7a0dc8db50859 + 8000033c: 0009ba83 ld x21,0(x19) + 80000340: 00898993 addi x19,x19,8 + +0000000080000344 : +Zbkc_clmulh_cg_cp_rs1_b14: + clmulh x28, x14, x21 # perform operation + 80000344: 0b573e33 clmulh x28,x14,x21 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkc_clmulh_cg_cp_rs1_b14, Zbkc_clmulh_cg_cp_rs1_b14_str) + 80000348: 000fb383 ld x7,0(x31) + 8000034c: 01c38c63 beq x7,x28,80000364 + 80000350: 1c90746f jal x8,80007d18 + 80000354: 80000344 .word 0x80000344 + 80000358: 00000000 .word 0x00000000 + 8000035c: 8000e743 .word 0x8000e743 + 80000360: 00000000 .word 0x00000000 + 80000364: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x1329380275db68a5 + 80000368: 0009b783 ld x15,0(x19) + 8000036c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x08dcb4452c995db7 + 80000370: 0009b183 ld x3,0(x19) + 80000374: 00898993 addi x19,x19,8 + +0000000080000378 : +Zbkc_clmulh_cg_cp_rs1_b15: + clmulh x0, x15, x3 # perform operation + 80000378: 0a37b033 clmulh x0,x15,x3 + # Check if x0 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x0, Zbkc_clmulh_cg_cp_rs1_b15, Zbkc_clmulh_cg_cp_rs1_b15_str) + 8000037c: 000fb383 ld x7,0(x31) + 80000380: 00038c63 beq x7,x0,80000398 + 80000384: 1950746f jal x8,80007d18 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 8000e778 .word 0x8000e778 + 80000394: 00000000 .word 0x00000000 + 80000398: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x45b59993befcab86 + 8000039c: 0009b803 ld x16,0(x19) + 800003a0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs2: x27 = 0xc713184aedbabd07 + 800003a4: 0009bd83 ld x27,0(x19) + 800003a8: 00898993 addi x19,x19,8 + +00000000800003ac : +Zbkc_clmulh_cg_cp_rs1_b16: + clmulh x15, x16, x27 # perform operation + 800003ac: 0bb837b3 clmulh x15,x16,x27 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkc_clmulh_cg_cp_rs1_b16, Zbkc_clmulh_cg_cp_rs1_b16_str) + 800003b0: 000fb383 ld x7,0(x31) + 800003b4: 00f38c63 beq x7,x15,800003cc + 800003b8: 1610746f jal x8,80007d18 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 8000e7ad .word 0x8000e7ad + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xdb93de0424a070f2 + 800003d0: 0009b883 ld x17,0(x19) + 800003d4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs2: x28 = 0x452f61b178a4a3b3 + 800003d8: 0009be03 ld x28,0(x19) + 800003dc: 00898993 addi x19,x19,8 + +00000000800003e0 : +Zbkc_clmulh_cg_cp_rs1_b17: + clmulh x9, x17, x28 # perform operation + 800003e0: 0bc8b4b3 clmulh x9,x17,x28 + # Check if x9 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x9, Zbkc_clmulh_cg_cp_rs1_b17, Zbkc_clmulh_cg_cp_rs1_b17_str) + 800003e4: 000fb383 ld x7,0(x31) + 800003e8: 00938c63 beq x7,x9,80000400 + 800003ec: 12d0746f jal x8,80007d18 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 8000e7e2 .word 0x8000e7e2 + 800003fc: 00000000 .word 0x00000000 + 80000400: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x49cbf4d23567792f + 80000404: 0009b903 ld x18,0(x19) + 80000408: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs2: x26 = 0x408c71df7f9b4825 + 8000040c: 0009bd03 ld x26,0(x19) + 80000410: 00898993 addi x19,x19,8 + +0000000080000414 : +Zbkc_clmulh_cg_cp_rs1_b18: + clmulh x2, x18, x26 # perform operation + 80000414: 0ba93133 clmulh x2,x18,x26 + # Check if x2 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x2, Zbkc_clmulh_cg_cp_rs1_b18, Zbkc_clmulh_cg_cp_rs1_b18_str) + 80000418: 000fb383 ld x7,0(x31) + 8000041c: 00238c63 beq x7,x2,80000434 + 80000420: 0f90746f jal x8,80007d18 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8000e817 .word 0x8000e817 + 80000430: 00000000 .word 0x00000000 + 80000434: 008f8f93 addi x31,x31,8 + + mv x30, x19 # switch data pointer register to avoid conflict with test + 80000438: 00098f13 addi x30,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x897bccc66f19923e + 8000043c: 000f3983 ld x19,0(x30) + 80000440: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x4) # load rs2: x4 = 0x9a6547f4cd389772 + 80000444: 000f3203 ld x4,0(x30) + 80000448: 008f0f13 addi x30,x30,8 + +000000008000044c : +Zbkc_clmulh_cg_cp_rs1_b19: + clmulh x23, x19, x4 # perform operation + 8000044c: 0a49bbb3 clmulh x23,x19,x4 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkc_clmulh_cg_cp_rs1_b19, Zbkc_clmulh_cg_cp_rs1_b19_str) + 80000450: 000fb383 ld x7,0(x31) + 80000454: 01738c63 beq x7,x23,8000046c + 80000458: 0c10746f jal x8,80007d18 + 8000045c: 8000044c .word 0x8000044c + 80000460: 00000000 .word 0x00000000 + 80000464: 8000e84c .word 0x8000e84c + 80000468: 00000000 .word 0x00000000 + 8000046c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x6e7c528d18d5cb57 + 80000470: 000f3a03 ld x20,0(x30) + 80000474: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0xbcbb9f4ec34ff8d9 + 80000478: 000f3b03 ld x22,0(x30) + 8000047c: 008f0f13 addi x30,x30,8 + +0000000080000480 : +Zbkc_clmulh_cg_cp_rs1_b20: + clmulh x11, x20, x22 # perform operation + 80000480: 0b6a35b3 clmulh x11,x20,x22 + # Check if x11 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x11, Zbkc_clmulh_cg_cp_rs1_b20, Zbkc_clmulh_cg_cp_rs1_b20_str) + 80000484: 000fb383 ld x7,0(x31) + 80000488: 00b38c63 beq x7,x11,800004a0 + 8000048c: 08d0746f jal x8,80007d18 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 8000e881 .word 0x8000e881 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0x108b6e91f0ca2c37 + 800004a4: 000f3a83 ld x21,0(x30) + 800004a8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x0843198f28766044 + 800004ac: 000f3c83 ld x25,0(x30) + 800004b0: 008f0f13 addi x30,x30,8 + +00000000800004b4 : +Zbkc_clmulh_cg_cp_rs1_b21: + clmulh x5, x21, x25 # perform operation + 800004b4: 0b9ab2b3 clmulh x5,x21,x25 + # Check if x5 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x5, Zbkc_clmulh_cg_cp_rs1_b21, Zbkc_clmulh_cg_cp_rs1_b21_str) + 800004b8: 000fb383 ld x7,0(x31) + 800004bc: 00538c63 beq x7,x5,800004d4 + 800004c0: 0590746f jal x8,80007d18 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 8000e8b6 .word 0x8000e8b6 + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0x5a3c0c4514b716f1 + 800004d8: 000f3b03 ld x22,0(x30) + 800004dc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xea0178ca04cc3615 + 800004e0: 000f3603 ld x12,0(x30) + 800004e4: 008f0f13 addi x30,x30,8 + +00000000800004e8 : +Zbkc_clmulh_cg_cp_rs1_b22: + clmulh x11, x22, x12 # perform operation + 800004e8: 0acb35b3 clmulh x11,x22,x12 + # Check if x11 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x11, Zbkc_clmulh_cg_cp_rs1_b22, Zbkc_clmulh_cg_cp_rs1_b22_str) + 800004ec: 000fb383 ld x7,0(x31) + 800004f0: 00b38c63 beq x7,x11,80000508 + 800004f4: 0250746f jal x8,80007d18 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 8000e8eb .word 0x8000e8eb + 80000504: 00000000 .word 0x00000000 + 80000508: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x7a185a5ac2205afe + 8000050c: 000f3b83 ld x23,0(x30) + 80000510: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x7efe4cc98d18f1f5 + 80000514: 000f3d83 ld x27,0(x30) + 80000518: 008f0f13 addi x30,x30,8 + +000000008000051c : +Zbkc_clmulh_cg_cp_rs1_b23: + clmulh x0, x23, x27 # perform operation + 8000051c: 0bbbb033 clmulh x0,x23,x27 + # Check if x0 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x0, Zbkc_clmulh_cg_cp_rs1_b23, Zbkc_clmulh_cg_cp_rs1_b23_str) + 80000520: 000fb383 ld x7,0(x31) + 80000524: 00038c63 beq x7,x0,8000053c + 80000528: 7f00746f jal x8,80007d18 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8000e920 .word 0x8000e920 + 80000538: 00000000 .word 0x00000000 + 8000053c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x3c1648efca9b05ab + 80000540: 000f3c03 ld x24,0(x30) + 80000544: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x3b4307a376b33dfb + 80000548: 000f3d03 ld x26,0(x30) + 8000054c: 008f0f13 addi x30,x30,8 + +0000000080000550 : +Zbkc_clmulh_cg_cp_rs1_b24: + clmulh x13, x24, x26 # perform operation + 80000550: 0bac36b3 clmulh x13,x24,x26 + # Check if x13 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x13, Zbkc_clmulh_cg_cp_rs1_b24, Zbkc_clmulh_cg_cp_rs1_b24_str) + 80000554: 000fb383 ld x7,0(x31) + 80000558: 00d38c63 beq x7,x13,80000570 + 8000055c: 7bc0746f jal x8,80007d18 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8000e955 .word 0x8000e955 + 8000056c: 00000000 .word 0x00000000 + 80000570: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0xead9c3810a94e98d + 80000574: 000f3c83 ld x25,0(x30) + 80000578: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0xf0501fdf0849bb4c + 8000057c: 000f3603 ld x12,0(x30) + 80000580: 008f0f13 addi x30,x30,8 + +0000000080000584 : +Zbkc_clmulh_cg_cp_rs1_b25: + clmulh x17, x25, x12 # perform operation + 80000584: 0accb8b3 clmulh x17,x25,x12 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkc_clmulh_cg_cp_rs1_b25, Zbkc_clmulh_cg_cp_rs1_b25_str) + 80000588: 000fb383 ld x7,0(x31) + 8000058c: 01138c63 beq x7,x17,800005a4 + 80000590: 7880746f jal x8,80007d18 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 8000e98a .word 0x8000e98a + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xb29ca40d2cb0bb0a + 800005a8: 000f3d03 ld x26,0(x30) + 800005ac: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0xc73da9116ab7a322 + 800005b0: 000f3b03 ld x22,0(x30) + 800005b4: 008f0f13 addi x30,x30,8 + +00000000800005b8 : +Zbkc_clmulh_cg_cp_rs1_b26: + clmulh x5, x26, x22 # perform operation + 800005b8: 0b6d32b3 clmulh x5,x26,x22 + # Check if x5 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x5, Zbkc_clmulh_cg_cp_rs1_b26, Zbkc_clmulh_cg_cp_rs1_b26_str) + 800005bc: 000fb383 ld x7,0(x31) + 800005c0: 00538c63 beq x7,x5,800005d8 + 800005c4: 7540746f jal x8,80007d18 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 8000e9bf .word 0x8000e9bf + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x4d71832e7fdcb7d8 + 800005dc: 000f3d83 ld x27,0(x30) + 800005e0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs2: x0 = 0x971068e2c64e5dfa + 800005e4: 000f3003 ld x0,0(x30) + 800005e8: 008f0f13 addi x30,x30,8 + +00000000800005ec : +Zbkc_clmulh_cg_cp_rs1_b27: + clmulh x3, x27, x0 # perform operation + 800005ec: 0a0db1b3 clmulh x3,x27,x0 + # Check if x3 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x3, Zbkc_clmulh_cg_cp_rs1_b27, Zbkc_clmulh_cg_cp_rs1_b27_str) + 800005f0: 000fb383 ld x7,0(x31) + 800005f4: 00338c63 beq x7,x3,8000060c + 800005f8: 7200746f jal x8,80007d18 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 8000e9f4 .word 0x8000e9f4 + 80000608: 00000000 .word 0x00000000 + 8000060c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x5f3d3a35c30566c6 + 80000610: 000f3e03 ld x28,0(x30) + 80000614: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0x6742134ef1a5b8a5 + 80000618: 000f3583 ld x11,0(x30) + 8000061c: 008f0f13 addi x30,x30,8 + +0000000080000620 : +Zbkc_clmulh_cg_cp_rs1_b28: + clmulh x15, x28, x11 # perform operation + 80000620: 0abe37b3 clmulh x15,x28,x11 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkc_clmulh_cg_cp_rs1_b28, Zbkc_clmulh_cg_cp_rs1_b28_str) + 80000624: 000fb383 ld x7,0(x31) + 80000628: 00f38c63 beq x7,x15,80000640 + 8000062c: 6ec0746f jal x8,80007d18 + 80000630: 80000620 .word 0x80000620 + 80000634: 00000000 .word 0x00000000 + 80000638: 8000ea29 .word 0x8000ea29 + 8000063c: 00000000 .word 0x00000000 + 80000640: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x79e654f4d14c99e2 + 80000644: 000f3e83 ld x29,0(x30) + 80000648: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0x65492282a95c99c1 + 8000064c: 000f3a83 ld x21,0(x30) + 80000650: 008f0f13 addi x30,x30,8 + +0000000080000654 : +Zbkc_clmulh_cg_cp_rs1_b29: + clmulh x18, x29, x21 # perform operation + 80000654: 0b5eb933 clmulh x18,x29,x21 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkc_clmulh_cg_cp_rs1_b29, Zbkc_clmulh_cg_cp_rs1_b29_str) + 80000658: 000fb383 ld x7,0(x31) + 8000065c: 01238c63 beq x7,x18,80000674 + 80000660: 6b80746f jal x8,80007d18 + 80000664: 80000654 .word 0x80000654 + 80000668: 00000000 .word 0x00000000 + 8000066c: 8000ea5e .word 0x8000ea5e + 80000670: 00000000 .word 0x00000000 + 80000674: 008f8f93 addi x31,x31,8 + + mv x18, x30 # switch data pointer register to avoid conflict with test + 80000678: 000f0913 addi x18,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0xd01c15fa31dec8ed + 8000067c: 00093f03 ld x30,0(x18) + 80000680: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x3f0d304be0957cc1 + 80000684: 00093b83 ld x23,0(x18) + 80000688: 00890913 addi x18,x18,8 + +000000008000068c : +Zbkc_clmulh_cg_cp_rs1_b30: + clmulh x27, x30, x23 # perform operation + 8000068c: 0b7f3db3 clmulh x27,x30,x23 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkc_clmulh_cg_cp_rs1_b30, Zbkc_clmulh_cg_cp_rs1_b30_str) + 80000690: 000fb383 ld x7,0(x31) + 80000694: 01b38c63 beq x7,x27,800006ac + 80000698: 6800746f jal x8,80007d18 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 8000ea93 .word 0x8000ea93 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 008f8f93 addi x31,x31,8 + + mv x10, x31 # switch signature pointer register to avoid conflict with test + 800006b0: 000f8513 addi x10,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x6965ca3ec87b258a + 800006b4: 00093f83 ld x31,0(x18) + 800006b8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x8b8c61b2a8397fd1 + 800006bc: 00093b03 ld x22,0(x18) + 800006c0: 00890913 addi x18,x18,8 + +00000000800006c4 : +Zbkc_clmulh_cg_cp_rs1_b31: + clmulh x25, x31, x22 # perform operation + 800006c4: 0b6fbcb3 clmulh x25,x31,x22 + # Check if x25 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x25, Zbkc_clmulh_cg_cp_rs1_b31, Zbkc_clmulh_cg_cp_rs1_b31_str) + 800006c8: 00053383 ld x7,0(x10) + 800006cc: 01938c63 beq x7,x25,800006e4 + 800006d0: 6480746f jal x8,80007d18 + 800006d4: 800006c4 .word 0x800006c4 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 8000eac8 .word 0x8000eac8 + 800006e0: 00000000 .word 0x00000000 + 800006e4: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs1: x21 = 0x1b9d77423aff6a85 + 800006e8: 00093a83 ld x21,0(x18) + 800006ec: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs2: x0 = 0xddc80f2d33a90192 + 800006f0: 00093003 ld x0,0(x18) + 800006f4: 00890913 addi x18,x18,8 + +00000000800006f8 : +Zbkc_clmulh_cg_cp_rs2_b0: + clmulh x9, x21, x0 # perform operation + 800006f8: 0a0ab4b3 clmulh x9,x21,x0 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zbkc_clmulh_cg_cp_rs2_b0, Zbkc_clmulh_cg_cp_rs2_b0_str) + 800006fc: 00053383 ld x7,0(x10) + 80000700: 00938c63 beq x7,x9,80000718 + 80000704: 6140746f jal x8,80007d18 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 8000eafd .word 0x8000eafd + 80000714: 00000000 .word 0x00000000 + 80000718: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x40e647ede6ad384c + 8000071c: 00093683 ld x13,0(x18) + 80000720: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x20a40d9090629cd4 + 80000724: 00093083 ld x1,0(x18) + 80000728: 00890913 addi x18,x18,8 + +000000008000072c : +Zbkc_clmulh_cg_cp_rs2_b1: + clmulh x27, x13, x1 # perform operation + 8000072c: 0a16bdb3 clmulh x27,x13,x1 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zbkc_clmulh_cg_cp_rs2_b1, Zbkc_clmulh_cg_cp_rs2_b1_str) + 80000730: 00053383 ld x7,0(x10) + 80000734: 01b38c63 beq x7,x27,8000074c + 80000738: 5e00746f jal x8,80007d18 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000eb31 .word 0x8000eb31 + 80000748: 00000000 .word 0x00000000 + 8000074c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xf360456db6d9f6f9 + 80000750: 00093c83 ld x25,0(x18) + 80000754: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs2: x2 = 0x76f20b8a5ea54e9f + 80000758: 00093103 ld x2,0(x18) + 8000075c: 00890913 addi x18,x18,8 + +0000000080000760 : +Zbkc_clmulh_cg_cp_rs2_b2: + clmulh x0, x25, x2 # perform operation + 80000760: 0a2cb033 clmulh x0,x25,x2 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkc_clmulh_cg_cp_rs2_b2, Zbkc_clmulh_cg_cp_rs2_b2_str) + 80000764: 00053383 ld x7,0(x10) + 80000768: 00038c63 beq x7,x0,80000780 + 8000076c: 5ac0746f jal x8,80007d18 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 8000eb65 .word 0x8000eb65 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x6c72afaf29c58938 + 80000784: 00093083 ld x1,0(x18) + 80000788: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0x8fa076c36ac00856 + 8000078c: 00093183 ld x3,0(x18) + 80000790: 00890913 addi x18,x18,8 + +0000000080000794 : +Zbkc_clmulh_cg_cp_rs2_b3: + clmulh x29, x1, x3 # perform operation + 80000794: 0a30beb3 clmulh x29,x1,x3 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zbkc_clmulh_cg_cp_rs2_b3, Zbkc_clmulh_cg_cp_rs2_b3_str) + 80000798: 00053383 ld x7,0(x10) + 8000079c: 01d38c63 beq x7,x29,800007b4 + 800007a0: 5780746f jal x8,80007d18 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb99 .word 0x8000eb99 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x46f89e808797686d + 800007b8: 00093e03 ld x28,0(x18) + 800007bc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0x989241677089ff41 + 800007c0: 00093203 ld x4,0(x18) + 800007c4: 00890913 addi x18,x18,8 + +00000000800007c8 : +Zbkc_clmulh_cg_cp_rs2_b4: + clmulh x12, x28, x4 # perform operation + 800007c8: 0a4e3633 clmulh x12,x28,x4 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zbkc_clmulh_cg_cp_rs2_b4, Zbkc_clmulh_cg_cp_rs2_b4_str) + 800007cc: 00053383 ld x7,0(x10) + 800007d0: 00c38c63 beq x7,x12,800007e8 + 800007d4: 5440746f jal x8,80007d18 + 800007d8: 800007c8 .word 0x800007c8 + 800007dc: 00000000 .word 0x00000000 + 800007e0: 8000ebcd .word 0x8000ebcd + 800007e4: 00000000 .word 0x00000000 + 800007e8: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x93196371eb8ad0bd + 800007ec: 00093d03 ld x26,0(x18) + 800007f0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs2: x5 = 0x8c8fef8f5f537a21 + 800007f4: 00093283 ld x5,0(x18) + 800007f8: 00890913 addi x18,x18,8 + +00000000800007fc : +Zbkc_clmulh_cg_cp_rs2_b5: + clmulh x13, x26, x5 # perform operation + 800007fc: 0a5d36b3 clmulh x13,x26,x5 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zbkc_clmulh_cg_cp_rs2_b5, Zbkc_clmulh_cg_cp_rs2_b5_str) + 80000800: 00053383 ld x7,0(x10) + 80000804: 00d38c63 beq x7,x13,8000081c + 80000808: 5100746f jal x8,80007d18 + 8000080c: 800007fc .word 0x800007fc + 80000810: 00000000 .word 0x00000000 + 80000814: 8000ec01 .word 0x8000ec01 + 80000818: 00000000 .word 0x00000000 + 8000081c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x2e6ed6f452a24f43 + 80000820: 00093083 ld x1,0(x18) + 80000824: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x856817deef1025f4 + 80000828: 00093303 ld x6,0(x18) + 8000082c: 00890913 addi x18,x18,8 + +0000000080000830 : +Zbkc_clmulh_cg_cp_rs2_b6: + clmulh x5, x1, x6 # perform operation + 80000830: 0a60b2b3 clmulh x5,x1,x6 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkc_clmulh_cg_cp_rs2_b6, Zbkc_clmulh_cg_cp_rs2_b6_str) + 80000834: 00053383 ld x7,0(x10) + 80000838: 00538c63 beq x7,x5,80000850 + 8000083c: 4dc0746f jal x8,80007d18 + 80000840: 80000830 .word 0x80000830 + 80000844: 00000000 .word 0x00000000 + 80000848: 8000ec35 .word 0x8000ec35 + 8000084c: 00000000 .word 0x00000000 + 80000850: 00850513 addi x10,x10,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000854: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000858: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xb2e430c0ab712bb0 + 8000085c: 00093783 ld x15,0(x18) + 80000860: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x0b243f99cf9a936b + 80000864: 00093383 ld x7,0(x18) + 80000868: 00890913 addi x18,x18,8 + +000000008000086c : +Zbkc_clmulh_cg_cp_rs2_b7: + clmulh x1, x15, x7 # perform operation + 8000086c: 0a77b0b3 clmulh x1,x15,x7 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zbkc_clmulh_cg_cp_rs2_b7, Zbkc_clmulh_cg_cp_rs2_b7_str) + 80000870: 00053203 ld x4,0(x10) + 80000874: 00120c63 beq x4,x1,8000088c + 80000878: 488072ef jal x5,80007d00 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000ec69 .word 0x8000ec69 + 80000888: 00000000 .word 0x00000000 + 8000088c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x47e0aad8e39b23e0 + 80000890: 00093a03 ld x20,0(x18) + 80000894: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs2: x8 = 0xceba105fe4d15f9d + 80000898: 00093403 ld x8,0(x18) + 8000089c: 00890913 addi x18,x18,8 + +00000000800008a0 : +Zbkc_clmulh_cg_cp_rs2_b8: + clmulh x7, x20, x8 # perform operation + 800008a0: 0a8a33b3 clmulh x7,x20,x8 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zbkc_clmulh_cg_cp_rs2_b8, Zbkc_clmulh_cg_cp_rs2_b8_str) + 800008a4: 00053203 ld x4,0(x10) + 800008a8: 00720c63 beq x4,x7,800008c0 + 800008ac: 454072ef jal x5,80007d00 + 800008b0: 800008a0 .word 0x800008a0 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 8000ec9d .word 0x8000ec9d + 800008bc: 00000000 .word 0x00000000 + 800008c0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xc85e031c889cca04 + 800008c4: 00093c83 ld x25,0(x18) + 800008c8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs2: x9 = 0xf79fadd10da5a213 + 800008cc: 00093483 ld x9,0(x18) + 800008d0: 00890913 addi x18,x18,8 + +00000000800008d4 : +Zbkc_clmulh_cg_cp_rs2_b9: + clmulh x0, x25, x9 # perform operation + 800008d4: 0a9cb033 clmulh x0,x25,x9 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zbkc_clmulh_cg_cp_rs2_b9, Zbkc_clmulh_cg_cp_rs2_b9_str) + 800008d8: 00053203 ld x4,0(x10) + 800008dc: 00020c63 beq x4,x0,800008f4 + 800008e0: 420072ef jal x5,80007d00 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 8000ecd1 .word 0x8000ecd1 + 800008f0: 00000000 .word 0x00000000 + 800008f4: 00850513 addi x10,x10,8 + + mv x28, x10 # switch signature pointer register to avoid conflict with test + 800008f8: 00050e13 addi x28,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x627f7c09de090aae + 800008fc: 00093f03 ld x30,0(x18) + 80000900: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x291240a46d1b509c + 80000904: 00093503 ld x10,0(x18) + 80000908: 00890913 addi x18,x18,8 + +000000008000090c : +Zbkc_clmulh_cg_cp_rs2_b10: + clmulh x0, x30, x10 # perform operation + 8000090c: 0aaf3033 clmulh x0,x30,x10 + # Check if x0 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x0, Zbkc_clmulh_cg_cp_rs2_b10, Zbkc_clmulh_cg_cp_rs2_b10_str) + 80000910: 000e3203 ld x4,0(x28) + 80000914: 00020c63 beq x4,x0,8000092c + 80000918: 3e8072ef jal x5,80007d00 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 8000ed05 .word 0x8000ed05 + 80000928: 00000000 .word 0x00000000 + 8000092c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0xeaf190267452cf41 + 80000930: 00093f83 ld x31,0(x18) + 80000934: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x91800f74113ecedd + 80000938: 00093583 ld x11,0(x18) + 8000093c: 00890913 addi x18,x18,8 + +0000000080000940 : +Zbkc_clmulh_cg_cp_rs2_b11: + clmulh x6, x31, x11 # perform operation + 80000940: 0abfb333 clmulh x6,x31,x11 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zbkc_clmulh_cg_cp_rs2_b11, Zbkc_clmulh_cg_cp_rs2_b11_str) + 80000944: 000e3203 ld x4,0(x28) + 80000948: 00620c63 beq x4,x6,80000960 + 8000094c: 3b4072ef jal x5,80007d00 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 8000ed3a .word 0x8000ed3a + 8000095c: 00000000 .word 0x00000000 + 80000960: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x767fa508d3fb2671 + 80000964: 00093a03 ld x20,0(x18) + 80000968: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x271d38c0b8eeceb3 + 8000096c: 00093603 ld x12,0(x18) + 80000970: 00890913 addi x18,x18,8 + +0000000080000974 : +Zbkc_clmulh_cg_cp_rs2_b12: + clmulh x27, x20, x12 # perform operation + 80000974: 0aca3db3 clmulh x27,x20,x12 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkc_clmulh_cg_cp_rs2_b12, Zbkc_clmulh_cg_cp_rs2_b12_str) + 80000978: 000e3203 ld x4,0(x28) + 8000097c: 01b20c63 beq x4,x27,80000994 + 80000980: 380072ef jal x5,80007d00 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000ed6f .word 0x8000ed6f + 80000990: 00000000 .word 0x00000000 + 80000994: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0xc527d104d17a79e0 + 80000998: 00093003 ld x0,0(x18) + 8000099c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x2f5655f9f66381ff + 800009a0: 00093683 ld x13,0(x18) + 800009a4: 00890913 addi x18,x18,8 + +00000000800009a8 : +Zbkc_clmulh_cg_cp_rs2_b13: + clmulh x12, x0, x13 # perform operation + 800009a8: 0ad03633 clmulh x12,x0,x13 + # Check if x12 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x12, Zbkc_clmulh_cg_cp_rs2_b13, Zbkc_clmulh_cg_cp_rs2_b13_str) + 800009ac: 000e3203 ld x4,0(x28) + 800009b0: 00c20c63 beq x4,x12,800009c8 + 800009b4: 34c072ef jal x5,80007d00 + 800009b8: 800009a8 .word 0x800009a8 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 8000eda4 .word 0x8000eda4 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xd7ad48b00d49d3c6 + 800009cc: 00093303 ld x6,0(x18) + 800009d0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0x743916304ff57d97 + 800009d4: 00093703 ld x14,0(x18) + 800009d8: 00890913 addi x18,x18,8 + +00000000800009dc : +Zbkc_clmulh_cg_cp_rs2_b14: + clmulh x16, x6, x14 # perform operation + 800009dc: 0ae33833 clmulh x16,x6,x14 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zbkc_clmulh_cg_cp_rs2_b14, Zbkc_clmulh_cg_cp_rs2_b14_str) + 800009e0: 000e3203 ld x4,0(x28) + 800009e4: 01020c63 beq x4,x16,800009fc + 800009e8: 318072ef jal x5,80007d00 + 800009ec: 800009dc .word 0x800009dc + 800009f0: 00000000 .word 0x00000000 + 800009f4: 8000edd9 .word 0x8000edd9 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x03f57c71dc56c9b2 + 80000a00: 00093a03 ld x20,0(x18) + 80000a04: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xea3c2fa535ba6f49 + 80000a08: 00093783 ld x15,0(x18) + 80000a0c: 00890913 addi x18,x18,8 + +0000000080000a10 : +Zbkc_clmulh_cg_cp_rs2_b15: + clmulh x0, x20, x15 # perform operation + 80000a10: 0afa3033 clmulh x0,x20,x15 + # Check if x0 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x0, Zbkc_clmulh_cg_cp_rs2_b15, Zbkc_clmulh_cg_cp_rs2_b15_str) + 80000a14: 000e3203 ld x4,0(x28) + 80000a18: 00020c63 beq x4,x0,80000a30 + 80000a1c: 2e4072ef jal x5,80007d00 + 80000a20: 80000a10 .word 0x80000a10 + 80000a24: 00000000 .word 0x00000000 + 80000a28: 8000ee0e .word 0x8000ee0e + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs1: x20 = 0x0ed61ff94840278e + 80000a34: 00093a03 ld x20,0(x18) + 80000a38: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x864ce39c70cc67ae + 80000a3c: 00093803 ld x16,0(x18) + 80000a40: 00890913 addi x18,x18,8 + +0000000080000a44 : +Zbkc_clmulh_cg_cp_rs2_b16: + clmulh x6, x20, x16 # perform operation + 80000a44: 0b0a3333 clmulh x6,x20,x16 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zbkc_clmulh_cg_cp_rs2_b16, Zbkc_clmulh_cg_cp_rs2_b16_str) + 80000a48: 000e3203 ld x4,0(x28) + 80000a4c: 00620c63 beq x4,x6,80000a64 + 80000a50: 2b0072ef jal x5,80007d00 + 80000a54: 80000a44 .word 0x80000a44 + 80000a58: 00000000 .word 0x00000000 + 80000a5c: 8000ee43 .word 0x8000ee43 + 80000a60: 00000000 .word 0x00000000 + 80000a64: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xed511246b3974bfd + 80000a68: 00093183 ld x3,0(x18) + 80000a6c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xadd884197d749bf9 + 80000a70: 00093883 ld x17,0(x18) + 80000a74: 00890913 addi x18,x18,8 + +0000000080000a78 : +Zbkc_clmulh_cg_cp_rs2_b17: + clmulh x2, x3, x17 # perform operation + 80000a78: 0b11b133 clmulh x2,x3,x17 + # Check if x2 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x2, Zbkc_clmulh_cg_cp_rs2_b17, Zbkc_clmulh_cg_cp_rs2_b17_str) + 80000a7c: 000e3203 ld x4,0(x28) + 80000a80: 00220c63 beq x4,x2,80000a98 + 80000a84: 27c072ef jal x5,80007d00 + 80000a88: 80000a78 .word 0x80000a78 + 80000a8c: 00000000 .word 0x00000000 + 80000a90: 8000ee78 .word 0x8000ee78 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 008e0e13 addi x28,x28,8 + + mv x3, x18 # switch data pointer register to avoid conflict with test + 80000a9c: 00090193 addi x3,x18,0 +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x570eaed7dfb3e598 + 80000aa0: 0001bb03 ld x22,0(x3) + 80000aa4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xaf14b6e7db64299e + 80000aa8: 0001b903 ld x18,0(x3) + 80000aac: 00818193 addi x3,x3,8 + +0000000080000ab0 : +Zbkc_clmulh_cg_cp_rs2_b18: + clmulh x1, x22, x18 # perform operation + 80000ab0: 0b2b30b3 clmulh x1,x22,x18 + # Check if x1 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x1, Zbkc_clmulh_cg_cp_rs2_b18, Zbkc_clmulh_cg_cp_rs2_b18_str) + 80000ab4: 000e3203 ld x4,0(x28) + 80000ab8: 00120c63 beq x4,x1,80000ad0 + 80000abc: 244072ef jal x5,80007d00 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 8000eead .word 0x8000eead + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xdc3674776aecab11 + 80000ad4: 0001b803 ld x16,0(x3) + 80000ad8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x02fe74901779132e + 80000adc: 0001b983 ld x19,0(x3) + 80000ae0: 00818193 addi x3,x3,8 + +0000000080000ae4 : +Zbkc_clmulh_cg_cp_rs2_b19: + clmulh x30, x16, x19 # perform operation + 80000ae4: 0b383f33 clmulh x30,x16,x19 + # Check if x30 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x30, Zbkc_clmulh_cg_cp_rs2_b19, Zbkc_clmulh_cg_cp_rs2_b19_str) + 80000ae8: 000e3203 ld x4,0(x28) + 80000aec: 01e20c63 beq x4,x30,80000b04 + 80000af0: 210072ef jal x5,80007d00 + 80000af4: 80000ae4 .word 0x80000ae4 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 8000eee2 .word 0x8000eee2 + 80000b00: 00000000 .word 0x00000000 + 80000b04: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x388cc3fc5aa4935a + 80000b08: 0001bd03 ld x26,0(x3) + 80000b0c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xedcd161d062599c7 + 80000b10: 0001ba03 ld x20,0(x3) + 80000b14: 00818193 addi x3,x3,8 + +0000000080000b18 : +Zbkc_clmulh_cg_cp_rs2_b20: + clmulh x13, x26, x20 # perform operation + 80000b18: 0b4d36b3 clmulh x13,x26,x20 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zbkc_clmulh_cg_cp_rs2_b20, Zbkc_clmulh_cg_cp_rs2_b20_str) + 80000b1c: 000e3203 ld x4,0(x28) + 80000b20: 00d20c63 beq x4,x13,80000b38 + 80000b24: 1dc072ef jal x5,80007d00 + 80000b28: 80000b18 .word 0x80000b18 + 80000b2c: 00000000 .word 0x00000000 + 80000b30: 8000ef17 .word 0x8000ef17 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x5ede918aa24aa8a2 + 80000b3c: 0001bf83 ld x31,0(x3) + 80000b40: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x013797e39f1ecbba + 80000b44: 0001ba83 ld x21,0(x3) + 80000b48: 00818193 addi x3,x3,8 + +0000000080000b4c : +Zbkc_clmulh_cg_cp_rs2_b21: + clmulh x30, x31, x21 # perform operation + 80000b4c: 0b5fbf33 clmulh x30,x31,x21 + # Check if x30 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x30, Zbkc_clmulh_cg_cp_rs2_b21, Zbkc_clmulh_cg_cp_rs2_b21_str) + 80000b50: 000e3203 ld x4,0(x28) + 80000b54: 01e20c63 beq x4,x30,80000b6c + 80000b58: 1a8072ef jal x5,80007d00 + 80000b5c: 80000b4c .word 0x80000b4c + 80000b60: 00000000 .word 0x00000000 + 80000b64: 8000ef4c .word 0x8000ef4c + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0xaa7e12a493e09042 + 80000b70: 0001b303 ld x6,0(x3) + 80000b74: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x33c5ca2b4b80be35 + 80000b78: 0001bb03 ld x22,0(x3) + 80000b7c: 00818193 addi x3,x3,8 + +0000000080000b80 : +Zbkc_clmulh_cg_cp_rs2_b22: + clmulh x21, x6, x22 # perform operation + 80000b80: 0b633ab3 clmulh x21,x6,x22 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zbkc_clmulh_cg_cp_rs2_b22, Zbkc_clmulh_cg_cp_rs2_b22_str) + 80000b84: 000e3203 ld x4,0(x28) + 80000b88: 01520c63 beq x4,x21,80000ba0 + 80000b8c: 174072ef jal x5,80007d00 + 80000b90: 80000b80 .word 0x80000b80 + 80000b94: 00000000 .word 0x00000000 + 80000b98: 8000ef81 .word 0x8000ef81 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7f806a2e39a2cce8 + 80000ba4: 0001b003 ld x0,0(x3) + 80000ba8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0x1a22cd9a20800862 + 80000bac: 0001bb83 ld x23,0(x3) + 80000bb0: 00818193 addi x3,x3,8 + +0000000080000bb4 : +Zbkc_clmulh_cg_cp_rs2_b23: + clmulh x7, x0, x23 # perform operation + 80000bb4: 0b7033b3 clmulh x7,x0,x23 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zbkc_clmulh_cg_cp_rs2_b23, Zbkc_clmulh_cg_cp_rs2_b23_str) + 80000bb8: 000e3203 ld x4,0(x28) + 80000bbc: 00720c63 beq x4,x7,80000bd4 + 80000bc0: 140072ef jal x5,80007d00 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 8000efb6 .word 0x8000efb6 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0xa60ce2bdd3808b54 + 80000bd8: 0001bf03 ld x30,0(x3) + 80000bdc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0xbd2cbd92c26d2f0d + 80000be0: 0001bc03 ld x24,0(x3) + 80000be4: 00818193 addi x3,x3,8 + +0000000080000be8 : +Zbkc_clmulh_cg_cp_rs2_b24: + clmulh x7, x30, x24 # perform operation + 80000be8: 0b8f33b3 clmulh x7,x30,x24 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zbkc_clmulh_cg_cp_rs2_b24, Zbkc_clmulh_cg_cp_rs2_b24_str) + 80000bec: 000e3203 ld x4,0(x28) + 80000bf0: 00720c63 beq x4,x7,80000c08 + 80000bf4: 10c072ef jal x5,80007d00 + 80000bf8: 80000be8 .word 0x80000be8 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 8000efeb .word 0x8000efeb + 80000c04: 00000000 .word 0x00000000 + 80000c08: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0x30447e687a6b811e + 80000c0c: 0001b783 ld x15,0(x3) + 80000c10: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x6644b679ed26f974 + 80000c14: 0001bc83 ld x25,0(x3) + 80000c18: 00818193 addi x3,x3,8 + +0000000080000c1c : +Zbkc_clmulh_cg_cp_rs2_b25: + clmulh x29, x15, x25 # perform operation + 80000c1c: 0b97beb3 clmulh x29,x15,x25 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zbkc_clmulh_cg_cp_rs2_b25, Zbkc_clmulh_cg_cp_rs2_b25_str) + 80000c20: 000e3203 ld x4,0(x28) + 80000c24: 01d20c63 beq x4,x29,80000c3c + 80000c28: 0d8072ef jal x5,80007d00 + 80000c2c: 80000c1c .word 0x80000c1c + 80000c30: 00000000 .word 0x00000000 + 80000c34: 8000f020 .word 0x8000f020 + 80000c38: 00000000 .word 0x00000000 + 80000c3c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xf0b71d7c721034fe + 80000c40: 0001bd83 ld x27,0(x3) + 80000c44: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0x28f44a71d04356ba + 80000c48: 0001bd03 ld x26,0(x3) + 80000c4c: 00818193 addi x3,x3,8 + +0000000080000c50 : +Zbkc_clmulh_cg_cp_rs2_b26: + clmulh x29, x27, x26 # perform operation + 80000c50: 0badbeb3 clmulh x29,x27,x26 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zbkc_clmulh_cg_cp_rs2_b26, Zbkc_clmulh_cg_cp_rs2_b26_str) + 80000c54: 000e3203 ld x4,0(x28) + 80000c58: 01d20c63 beq x4,x29,80000c70 + 80000c5c: 0a4072ef jal x5,80007d00 + 80000c60: 80000c50 .word 0x80000c50 + 80000c64: 00000000 .word 0x00000000 + 80000c68: 8000f055 .word 0x8000f055 + 80000c6c: 00000000 .word 0x00000000 + 80000c70: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0xc69e5c99aa40f9e0 + 80000c74: 0001b583 ld x11,0(x3) + 80000c78: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x52f5a358f3fb3a66 + 80000c7c: 0001bd83 ld x27,0(x3) + 80000c80: 00818193 addi x3,x3,8 + +0000000080000c84 : +Zbkc_clmulh_cg_cp_rs2_b27: + clmulh x8, x11, x27 # perform operation + 80000c84: 0bb5b433 clmulh x8,x11,x27 + # Check if x8 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x8, Zbkc_clmulh_cg_cp_rs2_b27, Zbkc_clmulh_cg_cp_rs2_b27_str) + 80000c88: 000e3203 ld x4,0(x28) + 80000c8c: 00820c63 beq x4,x8,80000ca4 + 80000c90: 070072ef jal x5,80007d00 + 80000c94: 80000c84 .word 0x80000c84 + 80000c98: 00000000 .word 0x00000000 + 80000c9c: 8000f08a .word 0x8000f08a + 80000ca0: 00000000 .word 0x00000000 + 80000ca4: 008e0e13 addi x28,x28,8 + + mv x17, x28 # switch signature pointer register to avoid conflict with test + 80000ca8: 000e0893 addi x17,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x91437136a67f7a56 + 80000cac: 0001b503 ld x10,0(x3) + 80000cb0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x2f25dece91c67ceb + 80000cb4: 0001be03 ld x28,0(x3) + 80000cb8: 00818193 addi x3,x3,8 + +0000000080000cbc : +Zbkc_clmulh_cg_cp_rs2_b28: + clmulh x29, x10, x28 # perform operation + 80000cbc: 0bc53eb3 clmulh x29,x10,x28 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkc_clmulh_cg_cp_rs2_b28, Zbkc_clmulh_cg_cp_rs2_b28_str) + 80000cc0: 0008b203 ld x4,0(x17) + 80000cc4: 01d20c63 beq x4,x29,80000cdc + 80000cc8: 038072ef jal x5,80007d00 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 8000f0bf .word 0x8000f0bf + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x590d2d38449e4cc6 + 80000ce0: 0001bb03 ld x22,0(x3) + 80000ce4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xb42a171d2174b77f + 80000ce8: 0001be83 ld x29,0(x3) + 80000cec: 00818193 addi x3,x3,8 + +0000000080000cf0 : +Zbkc_clmulh_cg_cp_rs2_b29: + clmulh x6, x22, x29 # perform operation + 80000cf0: 0bdb3333 clmulh x6,x22,x29 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zbkc_clmulh_cg_cp_rs2_b29, Zbkc_clmulh_cg_cp_rs2_b29_str) + 80000cf4: 0008b203 ld x4,0(x17) + 80000cf8: 00620c63 beq x4,x6,80000d10 + 80000cfc: 004072ef jal x5,80007d00 + 80000d00: 80000cf0 .word 0x80000cf0 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 8000f0f4 .word 0x8000f0f4 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0xf1a907806e0a3943 + 80000d14: 0001b803 ld x16,0(x3) + 80000d18: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x8ef3f7ed7d609e61 + 80000d1c: 0001bf03 ld x30,0(x3) + 80000d20: 00818193 addi x3,x3,8 + +0000000080000d24 : +Zbkc_clmulh_cg_cp_rs2_b30: + clmulh x10, x16, x30 # perform operation + 80000d24: 0be83533 clmulh x10,x16,x30 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkc_clmulh_cg_cp_rs2_b30, Zbkc_clmulh_cg_cp_rs2_b30_str) + 80000d28: 0008b203 ld x4,0(x17) + 80000d2c: 00a20c63 beq x4,x10,80000d44 + 80000d30: 7d1062ef jal x5,80007d00 + 80000d34: 80000d24 .word 0x80000d24 + 80000d38: 00000000 .word 0x00000000 + 80000d3c: 8000f129 .word 0x8000f129 + 80000d40: 00000000 .word 0x00000000 + 80000d44: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x705e3e9ad97d45c0 + 80000d48: 0001b383 ld x7,0(x3) + 80000d4c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x6017c5dcff293844 + 80000d50: 0001bf83 ld x31,0(x3) + 80000d54: 00818193 addi x3,x3,8 + +0000000080000d58 : +Zbkc_clmulh_cg_cp_rs2_b31: + clmulh x30, x7, x31 # perform operation + 80000d58: 0bf3bf33 clmulh x30,x7,x31 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkc_clmulh_cg_cp_rs2_b31, Zbkc_clmulh_cg_cp_rs2_b31_str) + 80000d5c: 0008b203 ld x4,0(x17) + 80000d60: 01e20c63 beq x4,x30,80000d78 + 80000d64: 79d062ef jal x5,80007d00 + 80000d68: 80000d58 .word 0x80000d58 + 80000d6c: 00000000 .word 0x00000000 + 80000d70: 8000f15e .word 0x8000f15e + 80000d74: 00000000 .word 0x00000000 + 80000d78: 00888893 addi x17,x17,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x51efacdd6b109697 + 80000d7c: 0001b903 ld x18,0(x3) + 80000d80: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x5dab4c47634de02d + 80000d84: 0001b303 ld x6,0(x3) + 80000d88: 00818193 addi x3,x3,8 + +0000000080000d8c : +Zbkc_clmulh_cg_cp_rd_b0: + clmulh x0, x18, x6 # perform operation + 80000d8c: 0a693033 clmulh x0,x18,x6 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zbkc_clmulh_cg_cp_rd_b0, Zbkc_clmulh_cg_cp_rd_b0_str) + 80000d90: 0008b203 ld x4,0(x17) + 80000d94: 00020c63 beq x4,x0,80000dac + 80000d98: 769062ef jal x5,80007d00 + 80000d9c: 80000d8c .word 0x80000d8c + 80000da0: 00000000 .word 0x00000000 + 80000da4: 8000f193 .word 0x8000f193 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xf4f1857b2b3ff8ae + 80000db0: 0001b603 ld x12,0(x3) + 80000db4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xe09d94fcd371251a + 80000db8: 0001be83 ld x29,0(x3) + 80000dbc: 00818193 addi x3,x3,8 + +0000000080000dc0 : +Zbkc_clmulh_cg_cp_rd_b1: + clmulh x1, x12, x29 # perform operation + 80000dc0: 0bd630b3 clmulh x1,x12,x29 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkc_clmulh_cg_cp_rd_b1, Zbkc_clmulh_cg_cp_rd_b1_str) + 80000dc4: 0008b203 ld x4,0(x17) + 80000dc8: 00120c63 beq x4,x1,80000de0 + 80000dcc: 735062ef jal x5,80007d00 + 80000dd0: 80000dc0 .word 0x80000dc0 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 8000f1c6 .word 0x8000f1c6 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0xc93363f7a8753fc4 + 80000de4: 0001bb03 ld x22,0(x3) + 80000de8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs2: x15 = 0xd2cda77b7ac19877 + 80000dec: 0001b783 ld x15,0(x3) + 80000df0: 00818193 addi x3,x3,8 + +0000000080000df4 : +Zbkc_clmulh_cg_cp_rd_b2: + clmulh x2, x22, x15 # perform operation + 80000df4: 0afb3133 clmulh x2,x22,x15 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkc_clmulh_cg_cp_rd_b2, Zbkc_clmulh_cg_cp_rd_b2_str) + 80000df8: 0008b203 ld x4,0(x17) + 80000dfc: 00220c63 beq x4,x2,80000e14 + 80000e00: 701062ef jal x5,80007d00 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 8000f1f9 .word 0x8000f1f9 + 80000e10: 00000000 .word 0x00000000 + 80000e14: 00888893 addi x17,x17,8 + + mv x21, x3 # switch data pointer register to avoid conflict with test + 80000e18: 00018a93 addi x21,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x8fc290c3d7dda1c9 + 80000e1c: 000ab983 ld x19,0(x21) + 80000e20: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x9b72891880b9dfed + 80000e24: 000ab703 ld x14,0(x21) + 80000e28: 008a8a93 addi x21,x21,8 + +0000000080000e2c : +Zbkc_clmulh_cg_cp_rd_b3: + clmulh x3, x19, x14 # perform operation + 80000e2c: 0ae9b1b3 clmulh x3,x19,x14 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkc_clmulh_cg_cp_rd_b3, Zbkc_clmulh_cg_cp_rd_b3_str) + 80000e30: 0008b203 ld x4,0(x17) + 80000e34: 00320c63 beq x4,x3,80000e4c + 80000e38: 6c9062ef jal x5,80007d00 + 80000e3c: 80000e2c .word 0x80000e2c + 80000e40: 00000000 .word 0x00000000 + 80000e44: 8000f22c .word 0x8000f22c + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 00888893 addi x17,x17,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e50: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e54: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x79195e8e151cf096 + 80000e58: 000ab603 ld x12,0(x21) + 80000e5c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xc0daaca8a00e4705 + 80000e60: 000ab583 ld x11,0(x21) + 80000e64: 008a8a93 addi x21,x21,8 + +0000000080000e68 : +Zbkc_clmulh_cg_cp_rd_b4: + clmulh x4, x12, x11 # perform operation + 80000e68: 0ab63233 clmulh x4,x12,x11 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zbkc_clmulh_cg_cp_rd_b4, Zbkc_clmulh_cg_cp_rd_b4_str) + 80000e6c: 0008b683 ld x13,0(x17) + 80000e70: 00468c63 beq x13,x4,80000e88 + 80000e74: 6cd0676f jal x14,80007d40 + 80000e78: 80000e68 .word 0x80000e68 + 80000e7c: 00000000 .word 0x00000000 + 80000e80: 8000f25f .word 0x8000f25f + 80000e84: 00000000 .word 0x00000000 + 80000e88: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xe15054da907ab4a0 + 80000e8c: 000abb83 ld x23,0(x21) + 80000e90: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x797e93f48d5c2941 + 80000e94: 000abf03 ld x30,0(x21) + 80000e98: 008a8a93 addi x21,x21,8 + +0000000080000e9c : +Zbkc_clmulh_cg_cp_rd_b5: + clmulh x5, x23, x30 # perform operation + 80000e9c: 0bebb2b3 clmulh x5,x23,x30 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zbkc_clmulh_cg_cp_rd_b5, Zbkc_clmulh_cg_cp_rd_b5_str) + 80000ea0: 0008b683 ld x13,0(x17) + 80000ea4: 00568c63 beq x13,x5,80000ebc + 80000ea8: 6990676f jal x14,80007d40 + 80000eac: 80000e9c .word 0x80000e9c + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 8000f292 .word 0x8000f292 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x5ea0224f90d61c57 + 80000ec0: 000abc03 ld x24,0(x21) + 80000ec4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x63fa1b477a4876a9 + 80000ec8: 000abb03 ld x22,0(x21) + 80000ecc: 008a8a93 addi x21,x21,8 + +0000000080000ed0 : +Zbkc_clmulh_cg_cp_rd_b6: + clmulh x6, x24, x22 # perform operation + 80000ed0: 0b6c3333 clmulh x6,x24,x22 + # Check if x6 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x6, Zbkc_clmulh_cg_cp_rd_b6, Zbkc_clmulh_cg_cp_rd_b6_str) + 80000ed4: 0008b683 ld x13,0(x17) + 80000ed8: 00668c63 beq x13,x6,80000ef0 + 80000edc: 6650676f jal x14,80007d40 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 8000f2c5 .word 0x8000f2c5 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x0bacd0f6fee2ab43 + 80000ef4: 000abe03 ld x28,0(x21) + 80000ef8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x6dd7f885f403580f + 80000efc: 000abf83 ld x31,0(x21) + 80000f00: 008a8a93 addi x21,x21,8 + +0000000080000f04 : +Zbkc_clmulh_cg_cp_rd_b7: + clmulh x7, x28, x31 # perform operation + 80000f04: 0bfe33b3 clmulh x7,x28,x31 + # Check if x7 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x7, Zbkc_clmulh_cg_cp_rd_b7, Zbkc_clmulh_cg_cp_rd_b7_str) + 80000f08: 0008b683 ld x13,0(x17) + 80000f0c: 00768c63 beq x13,x7,80000f24 + 80000f10: 6310676f jal x14,80007d40 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 8000f2f8 .word 0x8000f2f8 + 80000f20: 00000000 .word 0x00000000 + 80000f24: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xb4926c3ebaa26867 + 80000f28: 000ab603 ld x12,0(x21) + 80000f2c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x14f656f39be89a40 + 80000f30: 000abf83 ld x31,0(x21) + 80000f34: 008a8a93 addi x21,x21,8 + +0000000080000f38 : +Zbkc_clmulh_cg_cp_rd_b8: + clmulh x8, x12, x31 # perform operation + 80000f38: 0bf63433 clmulh x8,x12,x31 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zbkc_clmulh_cg_cp_rd_b8, Zbkc_clmulh_cg_cp_rd_b8_str) + 80000f3c: 0008b683 ld x13,0(x17) + 80000f40: 00868c63 beq x13,x8,80000f58 + 80000f44: 5fd0676f jal x14,80007d40 + 80000f48: 80000f38 .word 0x80000f38 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 8000f32b .word 0x8000f32b + 80000f54: 00000000 .word 0x00000000 + 80000f58: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x761ed7f77a81c457 + 80000f5c: 000abf03 ld x30,0(x21) + 80000f60: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xfa7499626462bf3e + 80000f64: 000ab783 ld x15,0(x21) + 80000f68: 008a8a93 addi x21,x21,8 + +0000000080000f6c : +Zbkc_clmulh_cg_cp_rd_b9: + clmulh x9, x30, x15 # perform operation + 80000f6c: 0aff34b3 clmulh x9,x30,x15 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zbkc_clmulh_cg_cp_rd_b9, Zbkc_clmulh_cg_cp_rd_b9_str) + 80000f70: 0008b683 ld x13,0(x17) + 80000f74: 00968c63 beq x13,x9,80000f8c + 80000f78: 5c90676f jal x14,80007d40 + 80000f7c: 80000f6c .word 0x80000f6c + 80000f80: 00000000 .word 0x00000000 + 80000f84: 8000f35e .word 0x8000f35e + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0xd9890fcb1e85d8cc + 80000f90: 000abd03 ld x26,0(x21) + 80000f94: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x472fbee413a61d2d + 80000f98: 000ab303 ld x6,0(x21) + 80000f9c: 008a8a93 addi x21,x21,8 + +0000000080000fa0 : +Zbkc_clmulh_cg_cp_rd_b10: + clmulh x10, x26, x6 # perform operation + 80000fa0: 0a6d3533 clmulh x10,x26,x6 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zbkc_clmulh_cg_cp_rd_b10, Zbkc_clmulh_cg_cp_rd_b10_str) + 80000fa4: 0008b683 ld x13,0(x17) + 80000fa8: 00a68c63 beq x13,x10,80000fc0 + 80000fac: 5950676f jal x14,80007d40 + 80000fb0: 80000fa0 .word 0x80000fa0 + 80000fb4: 00000000 .word 0x00000000 + 80000fb8: 8000f391 .word 0x8000f391 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x81c2d2aaf4ce1d0c + 80000fc4: 000ab783 ld x15,0(x21) + 80000fc8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xc93f8e97e9c0ab18 + 80000fcc: 000ab483 ld x9,0(x21) + 80000fd0: 008a8a93 addi x21,x21,8 + +0000000080000fd4 : +Zbkc_clmulh_cg_cp_rd_b11: + clmulh x11, x15, x9 # perform operation + 80000fd4: 0a97b5b3 clmulh x11,x15,x9 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zbkc_clmulh_cg_cp_rd_b11, Zbkc_clmulh_cg_cp_rd_b11_str) + 80000fd8: 0008b683 ld x13,0(x17) + 80000fdc: 00b68c63 beq x13,x11,80000ff4 + 80000fe0: 5610676f jal x14,80007d40 + 80000fe4: 80000fd4 .word 0x80000fd4 + 80000fe8: 00000000 .word 0x00000000 + 80000fec: 8000f3c5 .word 0x8000f3c5 + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x753861bd2be81e05 + 80000ff8: 000ab903 ld x18,0(x21) + 80000ffc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x87d2515334b89ec8 + 80001000: 000ab003 ld x0,0(x21) + 80001004: 008a8a93 addi x21,x21,8 + +0000000080001008 : +Zbkc_clmulh_cg_cp_rd_b12: + clmulh x12, x18, x0 # perform operation + 80001008: 0a093633 clmulh x12,x18,x0 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zbkc_clmulh_cg_cp_rd_b12, Zbkc_clmulh_cg_cp_rd_b12_str) + 8000100c: 0008b683 ld x13,0(x17) + 80001010: 00c68c63 beq x13,x12,80001028 + 80001014: 52d0676f jal x14,80007d40 + 80001018: 80001008 .word 0x80001008 + 8000101c: 00000000 .word 0x00000000 + 80001020: 8000f3f9 .word 0x8000f3f9 + 80001024: 00000000 .word 0x00000000 + 80001028: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000102c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001030: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x45d75ff8d7106f4d + 80001034: 000ab783 ld x15,0(x21) + 80001038: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0xf5116869fd46bb27 + 8000103c: 000abd03 ld x26,0(x21) + 80001040: 008a8a93 addi x21,x21,8 + +0000000080001044 : +Zbkc_clmulh_cg_cp_rd_b13: + clmulh x13, x15, x26 # perform operation + 80001044: 0ba7b6b3 clmulh x13,x15,x26 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zbkc_clmulh_cg_cp_rd_b13, Zbkc_clmulh_cg_cp_rd_b13_str) + 80001048: 0008b383 ld x7,0(x17) + 8000104c: 00d38c63 beq x7,x13,80001064 + 80001050: 4c90646f jal x8,80007d18 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 8000f42d .word 0x8000f42d + 80001060: 00000000 .word 0x00000000 + 80001064: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x4081f39d409aac7c + 80001068: 000abc83 ld x25,0(x21) + 8000106c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xdef1c1ab919f4559 + 80001070: 000ab783 ld x15,0(x21) + 80001074: 008a8a93 addi x21,x21,8 + +0000000080001078 : +Zbkc_clmulh_cg_cp_rd_b14: + clmulh x14, x25, x15 # perform operation + 80001078: 0afcb733 clmulh x14,x25,x15 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zbkc_clmulh_cg_cp_rd_b14, Zbkc_clmulh_cg_cp_rd_b14_str) + 8000107c: 0008b383 ld x7,0(x17) + 80001080: 00e38c63 beq x7,x14,80001098 + 80001084: 4950646f jal x8,80007d18 + 80001088: 80001078 .word 0x80001078 + 8000108c: 00000000 .word 0x00000000 + 80001090: 8000f461 .word 0x8000f461 + 80001094: 00000000 .word 0x00000000 + 80001098: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0x41eb889e8b3ba307 + 8000109c: 000abe83 ld x29,0(x21) + 800010a0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xd8709c2c2e0216e4 + 800010a4: 000ab903 ld x18,0(x21) + 800010a8: 008a8a93 addi x21,x21,8 + +00000000800010ac : +Zbkc_clmulh_cg_cp_rd_b15: + clmulh x15, x29, x18 # perform operation + 800010ac: 0b2eb7b3 clmulh x15,x29,x18 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zbkc_clmulh_cg_cp_rd_b15, Zbkc_clmulh_cg_cp_rd_b15_str) + 800010b0: 0008b383 ld x7,0(x17) + 800010b4: 00f38c63 beq x7,x15,800010cc + 800010b8: 4610646f jal x8,80007d18 + 800010bc: 800010ac .word 0x800010ac + 800010c0: 00000000 .word 0x00000000 + 800010c4: 8000f495 .word 0x8000f495 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x7f1174f673c69eaf + 800010d0: 000ab183 ld x3,0(x21) + 800010d4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x3b2d5265ee34c157 + 800010d8: 000ab483 ld x9,0(x21) + 800010dc: 008a8a93 addi x21,x21,8 + +00000000800010e0 : +Zbkc_clmulh_cg_cp_rd_b16: + clmulh x16, x3, x9 # perform operation + 800010e0: 0a91b833 clmulh x16,x3,x9 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zbkc_clmulh_cg_cp_rd_b16, Zbkc_clmulh_cg_cp_rd_b16_str) + 800010e4: 0008b383 ld x7,0(x17) + 800010e8: 01038c63 beq x7,x16,80001100 + 800010ec: 42d0646f jal x8,80007d18 + 800010f0: 800010e0 .word 0x800010e0 + 800010f4: 00000000 .word 0x00000000 + 800010f8: 8000f4c9 .word 0x8000f4c9 + 800010fc: 00000000 .word 0x00000000 + 80001100: 00888893 addi x17,x17,8 + + mv x28, x17 # switch signature pointer register to avoid conflict with test + 80001104: 00088e13 addi x28,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xf9b6409f69dd1dd0 + 80001108: 000abb03 ld x22,0(x21) + 8000110c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs2: x24 = 0x173e9ec0c390edda + 80001110: 000abc03 ld x24,0(x21) + 80001114: 008a8a93 addi x21,x21,8 + +0000000080001118 : +Zbkc_clmulh_cg_cp_rd_b17: + clmulh x17, x22, x24 # perform operation + 80001118: 0b8b38b3 clmulh x17,x22,x24 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zbkc_clmulh_cg_cp_rd_b17, Zbkc_clmulh_cg_cp_rd_b17_str) + 8000111c: 000e3383 ld x7,0(x28) + 80001120: 01138c63 beq x7,x17,80001138 + 80001124: 3f50646f jal x8,80007d18 + 80001128: 80001118 .word 0x80001118 + 8000112c: 00000000 .word 0x00000000 + 80001130: 8000f4fd .word 0x8000f4fd + 80001134: 00000000 .word 0x00000000 + 80001138: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xa6f3eb3a72313fb5 + 8000113c: 000abd83 ld x27,0(x21) + 80001140: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xf5ac4f9b07385b05 + 80001144: 000ab983 ld x19,0(x21) + 80001148: 008a8a93 addi x21,x21,8 + +000000008000114c : +Zbkc_clmulh_cg_cp_rd_b18: + clmulh x18, x27, x19 # perform operation + 8000114c: 0b3db933 clmulh x18,x27,x19 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zbkc_clmulh_cg_cp_rd_b18, Zbkc_clmulh_cg_cp_rd_b18_str) + 80001150: 000e3383 ld x7,0(x28) + 80001154: 01238c63 beq x7,x18,8000116c + 80001158: 3c10646f jal x8,80007d18 + 8000115c: 8000114c .word 0x8000114c + 80001160: 00000000 .word 0x00000000 + 80001164: 8000f531 .word 0x8000f531 + 80001168: 00000000 .word 0x00000000 + 8000116c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x6637012bdaee6ed1 + 80001170: 000abb03 ld x22,0(x21) + 80001174: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xe274ee7eb19a809f + 80001178: 000ab603 ld x12,0(x21) + 8000117c: 008a8a93 addi x21,x21,8 + +0000000080001180 : +Zbkc_clmulh_cg_cp_rd_b19: + clmulh x19, x22, x12 # perform operation + 80001180: 0acb39b3 clmulh x19,x22,x12 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zbkc_clmulh_cg_cp_rd_b19, Zbkc_clmulh_cg_cp_rd_b19_str) + 80001184: 000e3383 ld x7,0(x28) + 80001188: 01338c63 beq x7,x19,800011a0 + 8000118c: 38d0646f jal x8,80007d18 + 80001190: 80001180 .word 0x80001180 + 80001194: 00000000 .word 0x00000000 + 80001198: 8000f565 .word 0x8000f565 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xa4a7db3a22e58708 + 800011a4: 000abc83 ld x25,0(x21) + 800011a8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xfa6f4222a3ab917a + 800011ac: 000ab603 ld x12,0(x21) + 800011b0: 008a8a93 addi x21,x21,8 + +00000000800011b4 : +Zbkc_clmulh_cg_cp_rd_b20: + clmulh x20, x25, x12 # perform operation + 800011b4: 0accba33 clmulh x20,x25,x12 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zbkc_clmulh_cg_cp_rd_b20, Zbkc_clmulh_cg_cp_rd_b20_str) + 800011b8: 000e3383 ld x7,0(x28) + 800011bc: 01438c63 beq x7,x20,800011d4 + 800011c0: 3590646f jal x8,80007d18 + 800011c4: 800011b4 .word 0x800011b4 + 800011c8: 00000000 .word 0x00000000 + 800011cc: 8000f599 .word 0x8000f599 + 800011d0: 00000000 .word 0x00000000 + 800011d4: 008e0e13 addi x28,x28,8 + + mv x25, x21 # switch data pointer register to avoid conflict with test + 800011d8: 000a8c93 addi x25,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xa98260f640322061 + 800011dc: 000cbc03 ld x24,0(x25) + 800011e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xbbaab0eb86c09169 + 800011e4: 000cbb83 ld x23,0(x25) + 800011e8: 008c8c93 addi x25,x25,8 + +00000000800011ec : +Zbkc_clmulh_cg_cp_rd_b21: + clmulh x21, x24, x23 # perform operation + 800011ec: 0b7c3ab3 clmulh x21,x24,x23 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zbkc_clmulh_cg_cp_rd_b21, Zbkc_clmulh_cg_cp_rd_b21_str) + 800011f0: 000e3383 ld x7,0(x28) + 800011f4: 01538c63 beq x7,x21,8000120c + 800011f8: 3210646f jal x8,80007d18 + 800011fc: 800011ec .word 0x800011ec + 80001200: 00000000 .word 0x00000000 + 80001204: 8000f5cd .word 0x8000f5cd + 80001208: 00000000 .word 0x00000000 + 8000120c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xae6d8c20f3b7fb72 + 80001210: 000cbd03 ld x26,0(x25) + 80001214: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x67a88a1baf26c129 + 80001218: 000cbe83 ld x29,0(x25) + 8000121c: 008c8c93 addi x25,x25,8 + +0000000080001220 : +Zbkc_clmulh_cg_cp_rd_b22: + clmulh x22, x26, x29 # perform operation + 80001220: 0bdd3b33 clmulh x22,x26,x29 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zbkc_clmulh_cg_cp_rd_b22, Zbkc_clmulh_cg_cp_rd_b22_str) + 80001224: 000e3383 ld x7,0(x28) + 80001228: 01638c63 beq x7,x22,80001240 + 8000122c: 2ed0646f jal x8,80007d18 + 80001230: 80001220 .word 0x80001220 + 80001234: 00000000 .word 0x00000000 + 80001238: 8000f601 .word 0x8000f601 + 8000123c: 00000000 .word 0x00000000 + 80001240: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x0b904b0f73f35bca + 80001244: 000cbf03 ld x30,0(x25) + 80001248: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0xc06ba43629f5ea12 + 8000124c: 000cb803 ld x16,0(x25) + 80001250: 008c8c93 addi x25,x25,8 + +0000000080001254 : +Zbkc_clmulh_cg_cp_rd_b23: + clmulh x23, x30, x16 # perform operation + 80001254: 0b0f3bb3 clmulh x23,x30,x16 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zbkc_clmulh_cg_cp_rd_b23, Zbkc_clmulh_cg_cp_rd_b23_str) + 80001258: 000e3383 ld x7,0(x28) + 8000125c: 01738c63 beq x7,x23,80001274 + 80001260: 2b90646f jal x8,80007d18 + 80001264: 80001254 .word 0x80001254 + 80001268: 00000000 .word 0x00000000 + 8000126c: 8000f635 .word 0x8000f635 + 80001270: 00000000 .word 0x00000000 + 80001274: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xc776641cb1ec998b + 80001278: 000cba83 ld x21,0(x25) + 8000127c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x93d1a6a394d8a0e9 + 80001280: 000cbf83 ld x31,0(x25) + 80001284: 008c8c93 addi x25,x25,8 + +0000000080001288 : +Zbkc_clmulh_cg_cp_rd_b24: + clmulh x24, x21, x31 # perform operation + 80001288: 0bfabc33 clmulh x24,x21,x31 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zbkc_clmulh_cg_cp_rd_b24, Zbkc_clmulh_cg_cp_rd_b24_str) + 8000128c: 000e3383 ld x7,0(x28) + 80001290: 01838c63 beq x7,x24,800012a8 + 80001294: 2850646f jal x8,80007d18 + 80001298: 80001288 .word 0x80001288 + 8000129c: 00000000 .word 0x00000000 + 800012a0: 8000f669 .word 0x8000f669 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 008e0e13 addi x28,x28,8 + + mv x23, x25 # switch data pointer register to avoid conflict with test + 800012ac: 000c8b93 addi x23,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x3d3e5bf6daf27d92 + 800012b0: 000bba03 ld x20,0(x23) + 800012b4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xc81dff0f7ba3d67c + 800012b8: 000bb203 ld x4,0(x23) + 800012bc: 008b8b93 addi x23,x23,8 + +00000000800012c0 : +Zbkc_clmulh_cg_cp_rd_b25: + clmulh x25, x20, x4 # perform operation + 800012c0: 0a4a3cb3 clmulh x25,x20,x4 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkc_clmulh_cg_cp_rd_b25, Zbkc_clmulh_cg_cp_rd_b25_str) + 800012c4: 000e3383 ld x7,0(x28) + 800012c8: 01938c63 beq x7,x25,800012e0 + 800012cc: 24d0646f jal x8,80007d18 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 8000f69d .word 0x8000f69d + 800012dc: 00000000 .word 0x00000000 + 800012e0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x63aeb89dde08b608 + 800012e4: 000bb603 ld x12,0(x23) + 800012e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x895ef56293e99d21 + 800012ec: 000bb583 ld x11,0(x23) + 800012f0: 008b8b93 addi x23,x23,8 + +00000000800012f4 : +Zbkc_clmulh_cg_cp_rd_b26: + clmulh x26, x12, x11 # perform operation + 800012f4: 0ab63d33 clmulh x26,x12,x11 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkc_clmulh_cg_cp_rd_b26, Zbkc_clmulh_cg_cp_rd_b26_str) + 800012f8: 000e3383 ld x7,0(x28) + 800012fc: 01a38c63 beq x7,x26,80001314 + 80001300: 2190646f jal x8,80007d18 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 8000f6d1 .word 0x8000f6d1 + 80001310: 00000000 .word 0x00000000 + 80001314: 008e0e13 addi x28,x28,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x053af4ad96167a66 + 80001318: 000bbb03 ld x22,0(x23) + 8000131c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0210ce88bd80a1b7 + 80001320: 000bb983 ld x19,0(x23) + 80001324: 008b8b93 addi x23,x23,8 + +0000000080001328 : +Zbkc_clmulh_cg_cp_rd_b27: + clmulh x27, x22, x19 # perform operation + 80001328: 0b3b3db3 clmulh x27,x22,x19 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zbkc_clmulh_cg_cp_rd_b27, Zbkc_clmulh_cg_cp_rd_b27_str) + 8000132c: 000e3383 ld x7,0(x28) + 80001330: 01b38c63 beq x7,x27,80001348 + 80001334: 1e50646f jal x8,80007d18 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 8000f705 .word 0x8000f705 + 80001344: 00000000 .word 0x00000000 + 80001348: 008e0e13 addi x28,x28,8 + + mv x6, x28 # switch signature pointer register to avoid conflict with test + 8000134c: 000e0313 addi x6,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x824b337cd819d7e6 + 80001350: 000bb283 ld x5,0(x23) + 80001354: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x81b96da2de38300b + 80001358: 000bbd03 ld x26,0(x23) + 8000135c: 008b8b93 addi x23,x23,8 + +0000000080001360 : +Zbkc_clmulh_cg_cp_rd_b28: + clmulh x28, x5, x26 # perform operation + 80001360: 0ba2be33 clmulh x28,x5,x26 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cp_rd_b28, Zbkc_clmulh_cg_cp_rd_b28_str) + 80001364: 00033383 ld x7,0(x6) + 80001368: 01c38c63 beq x7,x28,80001380 + 8000136c: 1ad0646f jal x8,80007d18 + 80001370: 80001360 .word 0x80001360 + 80001374: 00000000 .word 0x00000000 + 80001378: 8000f739 .word 0x8000f739 + 8000137c: 00000000 .word 0x00000000 + 80001380: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xe6e0da8f73cdbec6 + 80001384: 000bb183 ld x3,0(x23) + 80001388: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xfd6afbde5fe8849f + 8000138c: 000bb483 ld x9,0(x23) + 80001390: 008b8b93 addi x23,x23,8 + +0000000080001394 : +Zbkc_clmulh_cg_cp_rd_b29: + clmulh x29, x3, x9 # perform operation + 80001394: 0a91beb3 clmulh x29,x3,x9 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cp_rd_b29, Zbkc_clmulh_cg_cp_rd_b29_str) + 80001398: 00033383 ld x7,0(x6) + 8000139c: 01d38c63 beq x7,x29,800013b4 + 800013a0: 1790646f jal x8,80007d18 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 8000f76d .word 0x8000f76d + 800013b0: 00000000 .word 0x00000000 + 800013b4: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x56ec5f8118cfa3d7 + 800013b8: 000bb483 ld x9,0(x23) + 800013bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x3b4ab058adfec622 + 800013c0: 000bb503 ld x10,0(x23) + 800013c4: 008b8b93 addi x23,x23,8 + +00000000800013c8 : +Zbkc_clmulh_cg_cp_rd_b30: + clmulh x30, x9, x10 # perform operation + 800013c8: 0aa4bf33 clmulh x30,x9,x10 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cp_rd_b30, Zbkc_clmulh_cg_cp_rd_b30_str) + 800013cc: 00033383 ld x7,0(x6) + 800013d0: 01e38c63 beq x7,x30,800013e8 + 800013d4: 1450646f jal x8,80007d18 + 800013d8: 800013c8 .word 0x800013c8 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 8000f7a1 .word 0x8000f7a1 + 800013e4: 00000000 .word 0x00000000 + 800013e8: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x8b5efd189f7e3deb + 800013ec: 000bb083 ld x1,0(x23) + 800013f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xc51475d690e751fa + 800013f4: 000bbd03 ld x26,0(x23) + 800013f8: 008b8b93 addi x23,x23,8 + +00000000800013fc : +Zbkc_clmulh_cg_cp_rd_b31: + clmulh x31, x1, x26 # perform operation + 800013fc: 0ba0bfb3 clmulh x31,x1,x26 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cp_rd_b31, Zbkc_clmulh_cg_cp_rd_b31_str) + 80001400: 00033383 ld x7,0(x6) + 80001404: 01f38c63 beq x7,x31,8000141c + 80001408: 1110646f jal x8,80007d18 + 8000140c: 800013fc .word 0x800013fc + 80001410: 00000000 .word 0x00000000 + 80001414: 8000f7d5 .word 0x8000f7d5 + 80001418: 00000000 .word 0x00000000 + 8000141c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0000000000000000 + 80001420: 000bbe03 ld x28,0(x23) + 80001424: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xb7828dc6721bff90 + 80001428: 000bb283 ld x5,0(x23) + 8000142c: 008b8b93 addi x23,x23,8 + +0000000080001430 : +Zbkc_clmulh_cg_cp_rs1_edges_0x0: + clmulh x14, x28, x5 # perform operation + 80001430: 0a5e3733 clmulh x14,x28,x5 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cp_rs1_edges_0x0, Zbkc_clmulh_cg_cp_rs1_edges_0x0_str) + 80001434: 00033383 ld x7,0(x6) + 80001438: 00e38c63 beq x7,x14,80001450 + 8000143c: 0dd0646f jal x8,80007d18 + 80001440: 80001430 .word 0x80001430 + 80001444: 00000000 .word 0x00000000 + 80001448: 8000f809 .word 0x8000f809 + 8000144c: 00000000 .word 0x00000000 + 80001450: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x0000000000000001 + 80001454: 000bba03 ld x20,0(x23) + 80001458: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xfb798b66d778c38d + 8000145c: 000bb603 ld x12,0(x23) + 80001460: 008b8b93 addi x23,x23,8 + +0000000080001464 : +Zbkc_clmulh_cg_cp_rs1_edges_0x1: + clmulh x11, x20, x12 # perform operation + 80001464: 0aca35b3 clmulh x11,x20,x12 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cp_rs1_edges_0x1, Zbkc_clmulh_cg_cp_rs1_edges_0x1_str) + 80001468: 00033383 ld x7,0(x6) + 8000146c: 00b38c63 beq x7,x11,80001484 + 80001470: 0a90646f jal x8,80007d18 + 80001474: 80001464 .word 0x80001464 + 80001478: 00000000 .word 0x00000000 + 8000147c: 8000f844 .word 0x8000f844 + 80001480: 00000000 .word 0x00000000 + 80001484: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000000000002 + 80001488: 000bb183 ld x3,0(x23) + 8000148c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x5451bb6c4db45003 + 80001490: 000bba03 ld x20,0(x23) + 80001494: 008b8b93 addi x23,x23,8 + +0000000080001498 : +Zbkc_clmulh_cg_cp_rs1_edges_0x2: + clmulh x9, x3, x20 # perform operation + 80001498: 0b41b4b3 clmulh x9,x3,x20 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cp_rs1_edges_0x2, Zbkc_clmulh_cg_cp_rs1_edges_0x2_str) + 8000149c: 00033383 ld x7,0(x6) + 800014a0: 00938c63 beq x7,x9,800014b8 + 800014a4: 0750646f jal x8,80007d18 + 800014a8: 80001498 .word 0x80001498 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 8000f87f .word 0x8000f87f + 800014b4: 00000000 .word 0x00000000 + 800014b8: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x8000000000000000 + 800014bc: 000bbd83 ld x27,0(x23) + 800014c0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0xc596e0f987138ab4 + 800014c4: 000bb783 ld x15,0(x23) + 800014c8: 008b8b93 addi x23,x23,8 + +00000000800014cc : +Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000000: + clmulh x22, x27, x15 # perform operation + 800014cc: 0afdbb33 clmulh x22,x27,x15 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000000, Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d0: 00033383 ld x7,0(x6) + 800014d4: 01638c63 beq x7,x22,800014ec + 800014d8: 0410646f jal x8,80007d18 + 800014dc: 800014cc .word 0x800014cc + 800014e0: 00000000 .word 0x00000000 + 800014e4: 8000f8ba .word 0x8000f8ba + 800014e8: 00000000 .word 0x00000000 + 800014ec: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x8000000000000001 + 800014f0: 000bb983 ld x19,0(x23) + 800014f4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x4355dca3d39afc86 + 800014f8: 000bbc83 ld x25,0(x23) + 800014fc: 008b8b93 addi x23,x23,8 + +0000000080001500 : +Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000001: + clmulh x21, x19, x25 # perform operation + 80001500: 0b99bab3 clmulh x21,x19,x25 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000001, Zbkc_clmulh_cg_cp_rs1_edges_0x8000000000000001_str) + 80001504: 00033383 ld x7,0(x6) + 80001508: 01538c63 beq x7,x21,80001520 + 8000150c: 00d0646f jal x8,80007d18 + 80001510: 80001500 .word 0x80001500 + 80001514: 00000000 .word 0x00000000 + 80001518: 8000f905 .word 0x8000f905 + 8000151c: 00000000 .word 0x00000000 + 80001520: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x7fffffffffffffff + 80001524: 000bb903 ld x18,0(x23) + 80001528: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x801bc8d4077b18c3 + 8000152c: 000bbf03 ld x30,0(x23) + 80001530: 008b8b93 addi x23,x23,8 + +0000000080001534 : +Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffffffffffff: + clmulh x5, x18, x30 # perform operation + 80001534: 0be932b3 clmulh x5,x18,x30 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkc_clmulh_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001538: 00033383 ld x7,0(x6) + 8000153c: 00538c63 beq x7,x5,80001554 + 80001540: 7d80646f jal x8,80007d18 + 80001544: 80001534 .word 0x80001534 + 80001548: 00000000 .word 0x00000000 + 8000154c: 8000f950 .word 0x8000f950 + 80001550: 00000000 .word 0x00000000 + 80001554: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x7ffffffffffffffe + 80001558: 000bb283 ld x5,0(x23) + 8000155c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x7daf428a104a7b67 + 80001560: 000bb183 ld x3,0(x23) + 80001564: 008b8b93 addi x23,x23,8 + +0000000080001568 : +Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffffffffffe: + clmulh x14, x5, x3 # perform operation + 80001568: 0a32b733 clmulh x14,x5,x3 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkc_clmulh_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 8000156c: 00033383 ld x7,0(x6) + 80001570: 00e38c63 beq x7,x14,80001588 + 80001574: 7a40646f jal x8,80007d18 + 80001578: 80001568 .word 0x80001568 + 8000157c: 00000000 .word 0x00000000 + 80001580: 8000f99b .word 0x8000f99b + 80001584: 00000000 .word 0x00000000 + 80001588: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xffffffffffffffff + 8000158c: 000bb103 ld x2,0(x23) + 80001590: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x1709ffce08bc04ab + 80001594: 000bb883 ld x17,0(x23) + 80001598: 008b8b93 addi x23,x23,8 + +000000008000159c : +Zbkc_clmulh_cg_cp_rs1_edges_0xffffffffffffffff: + clmulh x16, x2, x17 # perform operation + 8000159c: 0b113833 clmulh x16,x2,x17 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffffffffffff, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a0: 00033383 ld x7,0(x6) + 800015a4: 01038c63 beq x7,x16,800015bc + 800015a8: 7700646f jal x8,80007d18 + 800015ac: 8000159c .word 0x8000159c + 800015b0: 00000000 .word 0x00000000 + 800015b4: 8000f9e6 .word 0x8000f9e6 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xfffffffffffffffe + 800015c0: 000bb783 ld x15,0(x23) + 800015c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x204799fbdc19c64d + 800015c8: 000bb283 ld x5,0(x23) + 800015cc: 008b8b93 addi x23,x23,8 + +00000000800015d0 : +Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffffffffffe: + clmulh x27, x15, x5 # perform operation + 800015d0: 0a57bdb3 clmulh x27,x15,x5 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d4: 00033383 ld x7,0(x6) + 800015d8: 01b38c63 beq x7,x27,800015f0 + 800015dc: 73c0646f jal x8,80007d18 + 800015e0: 800015d0 .word 0x800015d0 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 8000fa31 .word 0x8000fa31 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800015f4: 000bbe03 ld x28,0(x23) + 800015f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xd1acca18321ad865 + 800015fc: 000bb803 ld x16,0(x23) + 80001600: 008b8b93 addi x23,x23,8 + +0000000080001604 : +Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc887763ae86f2: + clmulh x10, x28, x16 # perform operation + 80001604: 0b0e3533 clmulh x10,x28,x16 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001608: 00033383 ld x7,0(x6) + 8000160c: 00a38c63 beq x7,x10,80001624 + 80001610: 7080646f jal x8,80007d18 + 80001614: 80001604 .word 0x80001604 + 80001618: 00000000 .word 0x00000000 + 8000161c: 8000fa7c .word 0x8000fa7c + 80001620: 00000000 .word 0x00000000 + 80001624: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80001628: 000bb683 ld x13,0(x23) + 8000162c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x625ad02c118b4a65 + 80001630: 000bb283 ld x5,0(x23) + 80001634: 008b8b93 addi x23,x23,8 + +0000000080001638 : +Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + clmulh x10, x13, x5 # perform operation + 80001638: 0a56b533 clmulh x10,x13,x5 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 8000163c: 00033383 ld x7,0(x6) + 80001640: 00a38c63 beq x7,x10,80001658 + 80001644: 6d40646f jal x8,80007d18 + 80001648: 80001638 .word 0x80001638 + 8000164c: 00000000 .word 0x00000000 + 80001650: 8000fac7 .word 0x8000fac7 + 80001654: 00000000 .word 0x00000000 + 80001658: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x5555555555555555 + 8000165c: 000bbe03 ld x28,0(x23) + 80001660: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xbf685584c64bd0a4 + 80001664: 000bb903 ld x18,0(x23) + 80001668: 008b8b93 addi x23,x23,8 + +000000008000166c : +Zbkc_clmulh_cg_cp_rs1_edges_0x5555555555555555: + clmulh x1, x28, x18 # perform operation + 8000166c: 0b2e30b3 clmulh x1,x28,x18 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cp_rs1_edges_0x5555555555555555, Zbkc_clmulh_cg_cp_rs1_edges_0x5555555555555555_str) + 80001670: 00033383 ld x7,0(x6) + 80001674: 00138c63 beq x7,x1,8000168c + 80001678: 6a00646f jal x8,80007d18 + 8000167c: 8000166c .word 0x8000166c + 80001680: 00000000 .word 0x00000000 + 80001684: 8000fb12 .word 0x8000fb12 + 80001688: 00000000 .word 0x00000000 + 8000168c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x00000000ffffffff + 80001690: 000bb583 ld x11,0(x23) + 80001694: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xea396eef667c32b7 + 80001698: 000bb803 ld x16,0(x23) + 8000169c: 008b8b93 addi x23,x23,8 + +00000000800016a0 : +Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff: + clmulh x9, x11, x16 # perform operation + 800016a0: 0b05b4b3 clmulh x9,x11,x16 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff, Zbkc_clmulh_cg_cp_rs1_edges_0xffffffff_str) + 800016a4: 00033383 ld x7,0(x6) + 800016a8: 00938c63 beq x7,x9,800016c0 + 800016ac: 66c0646f jal x8,80007d18 + 800016b0: 800016a0 .word 0x800016a0 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 8000fb5d .word 0x8000fb5d + 800016bc: 00000000 .word 0x00000000 + 800016c0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x00000000fffffffe + 800016c4: 000bb483 ld x9,0(x23) + 800016c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x2364474c48bfe0c6 + 800016cc: 000bbd03 ld x26,0(x23) + 800016d0: 008b8b93 addi x23,x23,8 + +00000000800016d4 : +Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe: + clmulh x25, x9, x26 # perform operation + 800016d4: 0ba4bcb3 clmulh x25,x9,x26 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe, Zbkc_clmulh_cg_cp_rs1_edges_0xfffffffe_str) + 800016d8: 00033383 ld x7,0(x6) + 800016dc: 01938c63 beq x7,x25,800016f4 + 800016e0: 6380646f jal x8,80007d18 + 800016e4: 800016d4 .word 0x800016d4 + 800016e8: 00000000 .word 0x00000000 + 800016ec: 8000fba0 .word 0x8000fba0 + 800016f0: 00000000 .word 0x00000000 + 800016f4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0000000100000000 + 800016f8: 000bbc03 ld x24,0(x23) + 800016fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x4dc15c5adeaf9a91 + 80001700: 000bb903 ld x18,0(x23) + 80001704: 008b8b93 addi x23,x23,8 + +0000000080001708 : +Zbkc_clmulh_cg_cp_rs1_edges_0x100000000: + clmulh x13, x24, x18 # perform operation + 80001708: 0b2c36b3 clmulh x13,x24,x18 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cp_rs1_edges_0x100000000, Zbkc_clmulh_cg_cp_rs1_edges_0x100000000_str) + 8000170c: 00033383 ld x7,0(x6) + 80001710: 00d38c63 beq x7,x13,80001728 + 80001714: 6040646f jal x8,80007d18 + 80001718: 80001708 .word 0x80001708 + 8000171c: 00000000 .word 0x00000000 + 80001720: 8000fbe3 .word 0x8000fbe3 + 80001724: 00000000 .word 0x00000000 + 80001728: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x0000000100000001 + 8000172c: 000bba03 ld x20,0(x23) + 80001730: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x324535d52e8c8bfa + 80001734: 000bb703 ld x14,0(x23) + 80001738: 008b8b93 addi x23,x23,8 + +000000008000173c : +Zbkc_clmulh_cg_cp_rs1_edges_0x100000001: + clmulh x29, x20, x14 # perform operation + 8000173c: 0aea3eb3 clmulh x29,x20,x14 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cp_rs1_edges_0x100000001, Zbkc_clmulh_cg_cp_rs1_edges_0x100000001_str) + 80001740: 00033383 ld x7,0(x6) + 80001744: 01d38c63 beq x7,x29,8000175c + 80001748: 5d00646f jal x8,80007d18 + 8000174c: 8000173c .word 0x8000173c + 80001750: 00000000 .word 0x00000000 + 80001754: 8000fc27 .word 0x8000fc27 + 80001758: 00000000 .word 0x00000000 + 8000175c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xefa8bb44d4cdeae4 + 80001760: 000bbc83 ld x25,0(x23) + 80001764: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x0000000000000000 + 80001768: 000bb283 ld x5,0(x23) + 8000176c: 008b8b93 addi x23,x23,8 + +0000000080001770 : +Zbkc_clmulh_cg_cp_rs2_edges_0x0: + clmulh x16, x25, x5 # perform operation + 80001770: 0a5cb833 clmulh x16,x25,x5 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cp_rs2_edges_0x0, Zbkc_clmulh_cg_cp_rs2_edges_0x0_str) + 80001774: 00033383 ld x7,0(x6) + 80001778: 01038c63 beq x7,x16,80001790 + 8000177c: 59c0646f jal x8,80007d18 + 80001780: 80001770 .word 0x80001770 + 80001784: 00000000 .word 0x00000000 + 80001788: 8000fc6b .word 0x8000fc6b + 8000178c: 00000000 .word 0x00000000 + 80001790: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x1d2697fe69a4f8e7 + 80001794: 000bb203 ld x4,0(x23) + 80001798: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x0000000000000001 + 8000179c: 000bbe03 ld x28,0(x23) + 800017a0: 008b8b93 addi x23,x23,8 + +00000000800017a4 : +Zbkc_clmulh_cg_cp_rs2_edges_0x1: + clmulh x20, x4, x28 # perform operation + 800017a4: 0bc23a33 clmulh x20,x4,x28 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cp_rs2_edges_0x1, Zbkc_clmulh_cg_cp_rs2_edges_0x1_str) + 800017a8: 00033383 ld x7,0(x6) + 800017ac: 01438c63 beq x7,x20,800017c4 + 800017b0: 5680646f jal x8,80007d18 + 800017b4: 800017a4 .word 0x800017a4 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 8000fca7 .word 0x8000fca7 + 800017c0: 00000000 .word 0x00000000 + 800017c4: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x706eb851e68e3c5a + 800017c8: 000bb603 ld x12,0(x23) + 800017cc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x0000000000000002 + 800017d0: 000bba83 ld x21,0(x23) + 800017d4: 008b8b93 addi x23,x23,8 + +00000000800017d8 : +Zbkc_clmulh_cg_cp_rs2_edges_0x2: + clmulh x25, x12, x21 # perform operation + 800017d8: 0b563cb3 clmulh x25,x12,x21 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cp_rs2_edges_0x2, Zbkc_clmulh_cg_cp_rs2_edges_0x2_str) + 800017dc: 00033383 ld x7,0(x6) + 800017e0: 01938c63 beq x7,x25,800017f8 + 800017e4: 5340646f jal x8,80007d18 + 800017e8: 800017d8 .word 0x800017d8 + 800017ec: 00000000 .word 0x00000000 + 800017f0: 8000fce3 .word 0x8000fce3 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x47c90b659f72e008 + 800017fc: 000bb683 ld x13,0(x23) + 80001800: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x8000000000000000 + 80001804: 000bb903 ld x18,0(x23) + 80001808: 008b8b93 addi x23,x23,8 + +000000008000180c : +Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000000: + clmulh x17, x13, x18 # perform operation + 8000180c: 0b26b8b3 clmulh x17,x13,x18 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000000, Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000000_str) + 80001810: 00033383 ld x7,0(x6) + 80001814: 01138c63 beq x7,x17,8000182c + 80001818: 5000646f jal x8,80007d18 + 8000181c: 8000180c .word 0x8000180c + 80001820: 00000000 .word 0x00000000 + 80001824: 8000fd1f .word 0x8000fd1f + 80001828: 00000000 .word 0x00000000 + 8000182c: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x637a7527bd9a1034 + 80001830: 000bb083 ld x1,0(x23) + 80001834: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x8000000000000001 + 80001838: 000bb503 ld x10,0(x23) + 8000183c: 008b8b93 addi x23,x23,8 + +0000000080001840 : +Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000001: + clmulh x22, x1, x10 # perform operation + 80001840: 0aa0bb33 clmulh x22,x1,x10 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000001, Zbkc_clmulh_cg_cp_rs2_edges_0x8000000000000001_str) + 80001844: 00033383 ld x7,0(x6) + 80001848: 01638c63 beq x7,x22,80001860 + 8000184c: 4cc0646f jal x8,80007d18 + 80001850: 80001840 .word 0x80001840 + 80001854: 00000000 .word 0x00000000 + 80001858: 8000fd6a .word 0x8000fd6a + 8000185c: 00000000 .word 0x00000000 + 80001860: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x5825aa9cb185eed8 + 80001864: 000bb483 ld x9,0(x23) + 80001868: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x7fffffffffffffff + 8000186c: 000bb683 ld x13,0(x23) + 80001870: 008b8b93 addi x23,x23,8 + +0000000080001874 : +Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffffffffffff: + clmulh x5, x9, x13 # perform operation + 80001874: 0ad4b2b3 clmulh x5,x9,x13 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkc_clmulh_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001878: 00033383 ld x7,0(x6) + 8000187c: 00538c63 beq x7,x5,80001894 + 80001880: 4980646f jal x8,80007d18 + 80001884: 80001874 .word 0x80001874 + 80001888: 00000000 .word 0x00000000 + 8000188c: 8000fdb5 .word 0x8000fdb5 + 80001890: 00000000 .word 0x00000000 + 80001894: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xf60d9070c04b72c4 + 80001898: 000bb503 ld x10,0(x23) + 8000189c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x7ffffffffffffffe + 800018a0: 000bb603 ld x12,0(x23) + 800018a4: 008b8b93 addi x23,x23,8 + +00000000800018a8 : +Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffffffffffe: + clmulh x4, x10, x12 # perform operation + 800018a8: 0ac53233 clmulh x4,x10,x12 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkc_clmulh_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018ac: 00033383 ld x7,0(x6) + 800018b0: 00438c63 beq x7,x4,800018c8 + 800018b4: 4640646f jal x8,80007d18 + 800018b8: 800018a8 .word 0x800018a8 + 800018bc: 00000000 .word 0x00000000 + 800018c0: 8000fe00 .word 0x8000fe00 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x4305866e0f3cec20 + 800018cc: 000bba03 ld x20,0(x23) + 800018d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xffffffffffffffff + 800018d4: 000bb183 ld x3,0(x23) + 800018d8: 008b8b93 addi x23,x23,8 + +00000000800018dc : +Zbkc_clmulh_cg_cp_rs2_edges_0xffffffffffffffff: + clmulh x24, x20, x3 # perform operation + 800018dc: 0a3a3c33 clmulh x24,x20,x3 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffffffffffff, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e0: 00033383 ld x7,0(x6) + 800018e4: 01838c63 beq x7,x24,800018fc + 800018e8: 4300646f jal x8,80007d18 + 800018ec: 800018dc .word 0x800018dc + 800018f0: 00000000 .word 0x00000000 + 800018f4: 8000fe4b .word 0x8000fe4b + 800018f8: 00000000 .word 0x00000000 + 800018fc: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x243cf45f7d2844e3 + 80001900: 000bb703 ld x14,0(x23) + 80001904: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xfffffffffffffffe + 80001908: 000bb683 ld x13,0(x23) + 8000190c: 008b8b93 addi x23,x23,8 + +0000000080001910 : +Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffffffffffe: + clmulh x29, x14, x13 # perform operation + 80001910: 0ad73eb3 clmulh x29,x14,x13 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001914: 00033383 ld x7,0(x6) + 80001918: 01d38c63 beq x7,x29,80001930 + 8000191c: 3fc0646f jal x8,80007d18 + 80001920: 80001910 .word 0x80001910 + 80001924: 00000000 .word 0x00000000 + 80001928: 8000fe96 .word 0x8000fe96 + 8000192c: 00000000 .word 0x00000000 + 80001930: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x1a318bd358e323ea + 80001934: 000bb503 ld x10,0(x23) + 80001938: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 8000193c: 000bbf83 ld x31,0(x23) + 80001940: 008b8b93 addi x23,x23,8 + +0000000080001944 : +Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc887763ae86f2: + clmulh x15, x10, x31 # perform operation + 80001944: 0bf537b3 clmulh x15,x10,x31 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001948: 00033383 ld x7,0(x6) + 8000194c: 00f38c63 beq x7,x15,80001964 + 80001950: 3c80646f jal x8,80007d18 + 80001954: 80001944 .word 0x80001944 + 80001958: 00000000 .word 0x00000000 + 8000195c: 8000fee1 .word 0x8000fee1 + 80001960: 00000000 .word 0x00000000 + 80001964: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xfb4a43b9c26e3cd2 + 80001968: 000bbf83 ld x31,0(x23) + 8000196c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80001970: 000bb503 ld x10,0(x23) + 80001974: 008b8b93 addi x23,x23,8 + +0000000080001978 : +Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + clmulh x19, x31, x10 # perform operation + 80001978: 0aafb9b3 clmulh x19,x31,x10 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 8000197c: 00033383 ld x7,0(x6) + 80001980: 01338c63 beq x7,x19,80001998 + 80001984: 3940646f jal x8,80007d18 + 80001988: 80001978 .word 0x80001978 + 8000198c: 00000000 .word 0x00000000 + 80001990: 8000ff2c .word 0x8000ff2c + 80001994: 00000000 .word 0x00000000 + 80001998: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xde10c7e82f7051ef + 8000199c: 000bb703 ld x14,0(x23) + 800019a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x5555555555555555 + 800019a4: 000bbb03 ld x22,0(x23) + 800019a8: 008b8b93 addi x23,x23,8 + +00000000800019ac : +Zbkc_clmulh_cg_cp_rs2_edges_0x5555555555555555: + clmulh x9, x14, x22 # perform operation + 800019ac: 0b6734b3 clmulh x9,x14,x22 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cp_rs2_edges_0x5555555555555555, Zbkc_clmulh_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b0: 00033383 ld x7,0(x6) + 800019b4: 00938c63 beq x7,x9,800019cc + 800019b8: 3600646f jal x8,80007d18 + 800019bc: 800019ac .word 0x800019ac + 800019c0: 00000000 .word 0x00000000 + 800019c4: 8000ff77 .word 0x8000ff77 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x544388cfc3b82678 + 800019d0: 000bbc03 ld x24,0(x23) + 800019d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x00000000ffffffff + 800019d8: 000bb083 ld x1,0(x23) + 800019dc: 008b8b93 addi x23,x23,8 + +00000000800019e0 : +Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff: + clmulh x20, x24, x1 # perform operation + 800019e0: 0a1c3a33 clmulh x20,x24,x1 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff, Zbkc_clmulh_cg_cp_rs2_edges_0xffffffff_str) + 800019e4: 00033383 ld x7,0(x6) + 800019e8: 01438c63 beq x7,x20,80001a00 + 800019ec: 32c0646f jal x8,80007d18 + 800019f0: 800019e0 .word 0x800019e0 + 800019f4: 00000000 .word 0x00000000 + 800019f8: 8000ffc2 .word 0x8000ffc2 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x2398a01789c5fa88 + 80001a04: 000bb503 ld x10,0(x23) + 80001a08: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x00000000fffffffe + 80001a0c: 000bbe03 ld x28,0(x23) + 80001a10: 008b8b93 addi x23,x23,8 + +0000000080001a14 : +Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe: + clmulh x30, x10, x28 # perform operation + 80001a14: 0bc53f33 clmulh x30,x10,x28 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe, Zbkc_clmulh_cg_cp_rs2_edges_0xfffffffe_str) + 80001a18: 00033383 ld x7,0(x6) + 80001a1c: 01e38c63 beq x7,x30,80001a34 + 80001a20: 2f80646f jal x8,80007d18 + 80001a24: 80001a14 .word 0x80001a14 + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 80010005 .word 0x80010005 + 80001a30: 00000000 .word 0x00000000 + 80001a34: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x5e5d7e3e72fc8569 + 80001a38: 000bb683 ld x13,0(x23) + 80001a3c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x0000000100000000 + 80001a40: 000bb483 ld x9,0(x23) + 80001a44: 008b8b93 addi x23,x23,8 + +0000000080001a48 : +Zbkc_clmulh_cg_cp_rs2_edges_0x100000000: + clmulh x14, x13, x9 # perform operation + 80001a48: 0a96b733 clmulh x14,x13,x9 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cp_rs2_edges_0x100000000, Zbkc_clmulh_cg_cp_rs2_edges_0x100000000_str) + 80001a4c: 00033383 ld x7,0(x6) + 80001a50: 00e38c63 beq x7,x14,80001a68 + 80001a54: 2c40646f jal x8,80007d18 + 80001a58: 80001a48 .word 0x80001a48 + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 80010048 .word 0x80010048 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 00830313 addi x6,x6,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x659b220c039a0a0f + 80001a6c: 000bb883 ld x17,0(x23) + 80001a70: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000100000001 + 80001a74: 000bbb03 ld x22,0(x23) + 80001a78: 008b8b93 addi x23,x23,8 + +0000000080001a7c : +Zbkc_clmulh_cg_cp_rs2_edges_0x100000001: + clmulh x21, x17, x22 # perform operation + 80001a7c: 0b68bab3 clmulh x21,x17,x22 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cp_rs2_edges_0x100000001, Zbkc_clmulh_cg_cp_rs2_edges_0x100000001_str) + 80001a80: 00033383 ld x7,0(x6) + 80001a84: 01538c63 beq x7,x21,80001a9c + 80001a88: 2900646f jal x8,80007d18 + 80001a8c: 80001a7c .word 0x80001a7c + 80001a90: 00000000 .word 0x00000000 + 80001a94: 8001008c .word 0x8001008c + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x0000000000000000 + 80001aa0: 000bbb03 ld x22,0(x23) + 80001aa4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x0000000000000000 + 80001aa8: 000bb803 ld x16,0(x23) + 80001aac: 008b8b93 addi x23,x23,8 + +0000000080001ab0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + clmulh x14, x22, x16 # perform operation + 80001ab0: 0b0b3733 clmulh x14,x22,x16 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab4: 00033383 ld x7,0(x6) + 80001ab8: 00e38c63 beq x7,x14,80001ad0 + 80001abc: 25c0646f jal x8,80007d18 + 80001ac0: 80001ab0 .word 0x80001ab0 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 800100d0 .word 0x800100d0 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x0000000000000000 + 80001ad4: 000bb803 ld x16,0(x23) + 80001ad8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x0000000000000001 + 80001adc: 000bba83 ld x21,0(x23) + 80001ae0: 008b8b93 addi x23,x23,8 + +0000000080001ae4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + clmulh x18, x16, x21 # perform operation + 80001ae4: 0b583933 clmulh x18,x16,x21 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae8: 00033383 ld x7,0(x6) + 80001aec: 01238c63 beq x7,x18,80001b04 + 80001af0: 2280646f jal x8,80007d18 + 80001af4: 80001ae4 .word 0x80001ae4 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 80010123 .word 0x80010123 + 80001b00: 00000000 .word 0x00000000 + 80001b04: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000000 + 80001b08: 000bb103 ld x2,0(x23) + 80001b0c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x0000000000000002 + 80001b10: 000bb603 ld x12,0(x23) + 80001b14: 008b8b93 addi x23,x23,8 + +0000000080001b18 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + clmulh x29, x2, x12 # perform operation + 80001b18: 0ac13eb3 clmulh x29,x2,x12 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b1c: 00033383 ld x7,0(x6) + 80001b20: 01d38c63 beq x7,x29,80001b38 + 80001b24: 1f40646f jal x8,80007d18 + 80001b28: 80001b18 .word 0x80001b18 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 80010176 .word 0x80010176 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x0000000000000000 + 80001b3c: 000bba83 ld x21,0(x23) + 80001b40: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x8000000000000000 + 80001b44: 000bba03 ld x20,0(x23) + 80001b48: 008b8b93 addi x23,x23,8 + +0000000080001b4c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + clmulh x10, x21, x20 # perform operation + 80001b4c: 0b4ab533 clmulh x10,x21,x20 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b50: 00033383 ld x7,0(x6) + 80001b54: 00a38c63 beq x7,x10,80001b6c + 80001b58: 1c00646f jal x8,80007d18 + 80001b5c: 80001b4c .word 0x80001b4c + 80001b60: 00000000 .word 0x00000000 + 80001b64: 800101c9 .word 0x800101c9 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0000000000000000 + 80001b70: 000bb983 ld x19,0(x23) + 80001b74: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x8000000000000001 + 80001b78: 000bb083 ld x1,0(x23) + 80001b7c: 008b8b93 addi x23,x23,8 + +0000000080001b80 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + clmulh x29, x19, x1 # perform operation + 80001b80: 0a19beb3 clmulh x29,x19,x1 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b84: 00033383 ld x7,0(x6) + 80001b88: 01d38c63 beq x7,x29,80001ba0 + 80001b8c: 18c0646f jal x8,80007d18 + 80001b90: 80001b80 .word 0x80001b80 + 80001b94: 00000000 .word 0x00000000 + 80001b98: 8001022b .word 0x8001022b + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x0000000000000000 + 80001ba4: 000bbd03 ld x26,0(x23) + 80001ba8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x7fffffffffffffff + 80001bac: 000bb983 ld x19,0(x23) + 80001bb0: 008b8b93 addi x23,x23,8 + +0000000080001bb4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + clmulh x15, x26, x19 # perform operation + 80001bb4: 0b3d37b3 clmulh x15,x26,x19 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb8: 00033383 ld x7,0(x6) + 80001bbc: 00f38c63 beq x7,x15,80001bd4 + 80001bc0: 1580646f jal x8,80007d18 + 80001bc4: 80001bb4 .word 0x80001bb4 + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 8001028d .word 0x8001028d + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x0000000000000000 + 80001bd8: 000bbb03 ld x22,0(x23) + 80001bdc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x7ffffffffffffffe + 80001be0: 000bb203 ld x4,0(x23) + 80001be4: 008b8b93 addi x23,x23,8 + +0000000080001be8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + clmulh x15, x22, x4 # perform operation + 80001be8: 0a4b37b3 clmulh x15,x22,x4 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bec: 00033383 ld x7,0(x6) + 80001bf0: 00f38c63 beq x7,x15,80001c08 + 80001bf4: 1240646f jal x8,80007d18 + 80001bf8: 80001be8 .word 0x80001be8 + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 800102ef .word 0x800102ef + 80001c04: 00000000 .word 0x00000000 + 80001c08: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0000000000000000 + 80001c0c: 000bbc03 ld x24,0(x23) + 80001c10: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xffffffffffffffff + 80001c14: 000bb803 ld x16,0(x23) + 80001c18: 008b8b93 addi x23,x23,8 + +0000000080001c1c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + clmulh x26, x24, x16 # perform operation + 80001c1c: 0b0c3d33 clmulh x26,x24,x16 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c20: 00033383 ld x7,0(x6) + 80001c24: 01a38c63 beq x7,x26,80001c3c + 80001c28: 0f00646f jal x8,80007d18 + 80001c2c: 80001c1c .word 0x80001c1c + 80001c30: 00000000 .word 0x00000000 + 80001c34: 80010351 .word 0x80010351 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x0000000000000000 + 80001c40: 000bb603 ld x12,0(x23) + 80001c44: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xfffffffffffffffe + 80001c48: 000bbc83 ld x25,0(x23) + 80001c4c: 008b8b93 addi x23,x23,8 + +0000000080001c50 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + clmulh x4, x12, x25 # perform operation + 80001c50: 0b963233 clmulh x4,x12,x25 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c54: 00033383 ld x7,0(x6) + 80001c58: 00438c63 beq x7,x4,80001c70 + 80001c5c: 0bc0646f jal x8,80007d18 + 80001c60: 80001c50 .word 0x80001c50 + 80001c64: 00000000 .word 0x00000000 + 80001c68: 800103b3 .word 0x800103b3 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000000 + 80001c74: 000bb103 ld x2,0(x23) + 80001c78: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80001c7c: 000bb603 ld x12,0(x23) + 80001c80: 008b8b93 addi x23,x23,8 + +0000000080001c84 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + clmulh x4, x2, x12 # perform operation + 80001c84: 0ac13233 clmulh x4,x2,x12 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c88: 00033383 ld x7,0(x6) + 80001c8c: 00438c63 beq x7,x4,80001ca4 + 80001c90: 0880646f jal x8,80007d18 + 80001c94: 80001c84 .word 0x80001c84 + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 80010415 .word 0x80010415 + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x0000000000000000 + 80001ca8: 000bb583 ld x11,0(x23) + 80001cac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80001cb0: 000bbf03 ld x30,0(x23) + 80001cb4: 008b8b93 addi x23,x23,8 + +0000000080001cb8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x15, x11, x30 # perform operation + 80001cb8: 0be5b7b3 clmulh x15,x11,x30 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cbc: 00033383 ld x7,0(x6) + 80001cc0: 00f38c63 beq x7,x15,80001cd8 + 80001cc4: 0540646f jal x8,80007d18 + 80001cc8: 80001cb8 .word 0x80001cb8 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 80010477 .word 0x80010477 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x0000000000000000 + 80001cdc: 000bb883 ld x17,0(x23) + 80001ce0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5555555555555555 + 80001ce4: 000bb603 ld x12,0(x23) + 80001ce8: 008b8b93 addi x23,x23,8 + +0000000080001cec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + clmulh x22, x17, x12 # perform operation + 80001cec: 0ac8bb33 clmulh x22,x17,x12 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf0: 00033383 ld x7,0(x6) + 80001cf4: 01638c63 beq x7,x22,80001d0c + 80001cf8: 0200646f jal x8,80007d18 + 80001cfc: 80001cec .word 0x80001cec + 80001d00: 00000000 .word 0x00000000 + 80001d04: 800104d9 .word 0x800104d9 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000000000000 + 80001d10: 000bb183 ld x3,0(x23) + 80001d14: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x00000000ffffffff + 80001d18: 000bb683 ld x13,0(x23) + 80001d1c: 008b8b93 addi x23,x23,8 + +0000000080001d20 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + clmulh x31, x3, x13 # perform operation + 80001d20: 0ad1bfb3 clmulh x31,x3,x13 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d24: 00033383 ld x7,0(x6) + 80001d28: 01f38c63 beq x7,x31,80001d40 + 80001d2c: 7ed0546f jal x8,80007d18 + 80001d30: 80001d20 .word 0x80001d20 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 8001053b .word 0x8001053b + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x0000000000000000 + 80001d44: 000bba03 ld x20,0(x23) + 80001d48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000000fffffffe + 80001d4c: 000bbf83 ld x31,0(x23) + 80001d50: 008b8b93 addi x23,x23,8 + +0000000080001d54 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + clmulh x29, x20, x31 # perform operation + 80001d54: 0bfa3eb3 clmulh x29,x20,x31 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d58: 00033383 ld x7,0(x6) + 80001d5c: 01d38c63 beq x7,x29,80001d74 + 80001d60: 7b90546f jal x8,80007d18 + 80001d64: 80001d54 .word 0x80001d54 + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 80010595 .word 0x80010595 + 80001d70: 00000000 .word 0x00000000 + 80001d74: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x0000000000000000 + 80001d78: 000bb583 ld x11,0(x23) + 80001d7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x0000000100000000 + 80001d80: 000bbd03 ld x26,0(x23) + 80001d84: 008b8b93 addi x23,x23,8 + +0000000080001d88 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + clmulh x17, x11, x26 # perform operation + 80001d88: 0ba5b8b3 clmulh x17,x11,x26 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d8c: 00033383 ld x7,0(x6) + 80001d90: 01138c63 beq x7,x17,80001da8 + 80001d94: 7850546f jal x8,80007d18 + 80001d98: 80001d88 .word 0x80001d88 + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 800105ef .word 0x800105ef + 80001da4: 00000000 .word 0x00000000 + 80001da8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x0000000000000000 + 80001dac: 000bba83 ld x21,0(x23) + 80001db0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000100000001 + 80001db4: 000bb983 ld x19,0(x23) + 80001db8: 008b8b93 addi x23,x23,8 + +0000000080001dbc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + clmulh x15, x21, x19 # perform operation + 80001dbc: 0b3ab7b3 clmulh x15,x21,x19 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc0: 00033383 ld x7,0(x6) + 80001dc4: 00f38c63 beq x7,x15,80001ddc + 80001dc8: 7510546f jal x8,80007d18 + 80001dcc: 80001dbc .word 0x80001dbc + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 8001064a .word 0x8001064a + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x0000000000000001 + 80001de0: 000bb203 ld x4,0(x23) + 80001de4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x0000000000000000 + 80001de8: 000bb083 ld x1,0(x23) + 80001dec: 008b8b93 addi x23,x23,8 + +0000000080001df0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + clmulh x21, x4, x1 # perform operation + 80001df0: 0a123ab3 clmulh x21,x4,x1 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df4: 00033383 ld x7,0(x6) + 80001df8: 01538c63 beq x7,x21,80001e10 + 80001dfc: 71d0546f jal x8,80007d18 + 80001e00: 80001df0 .word 0x80001df0 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 800106a5 .word 0x800106a5 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x0000000000000001 + 80001e14: 000bbc83 ld x25,0(x23) + 80001e18: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x0000000000000001 + 80001e1c: 000bbd83 ld x27,0(x23) + 80001e20: 008b8b93 addi x23,x23,8 + +0000000080001e24 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + clmulh x4, x25, x27 # perform operation + 80001e24: 0bbcb233 clmulh x4,x25,x27 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e28: 00033383 ld x7,0(x6) + 80001e2c: 00438c63 beq x7,x4,80001e44 + 80001e30: 6e90546f jal x8,80007d18 + 80001e34: 80001e24 .word 0x80001e24 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 800106f8 .word 0x800106f8 + 80001e40: 00000000 .word 0x00000000 + 80001e44: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x0000000000000001 + 80001e48: 000bbc83 ld x25,0(x23) + 80001e4c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x0000000000000002 + 80001e50: 000bb603 ld x12,0(x23) + 80001e54: 008b8b93 addi x23,x23,8 + +0000000080001e58 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + clmulh x26, x25, x12 # perform operation + 80001e58: 0accbd33 clmulh x26,x25,x12 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e5c: 00033383 ld x7,0(x6) + 80001e60: 01a38c63 beq x7,x26,80001e78 + 80001e64: 6b50546f jal x8,80007d18 + 80001e68: 80001e58 .word 0x80001e58 + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 8001074b .word 0x8001074b + 80001e74: 00000000 .word 0x00000000 + 80001e78: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0000000000000001 + 80001e7c: 000bb983 ld x19,0(x23) + 80001e80: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x8000000000000000 + 80001e84: 000bb583 ld x11,0(x23) + 80001e88: 008b8b93 addi x23,x23,8 + +0000000080001e8c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + clmulh x5, x19, x11 # perform operation + 80001e8c: 0ab9b2b3 clmulh x5,x19,x11 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e90: 00033383 ld x7,0(x6) + 80001e94: 00538c63 beq x7,x5,80001eac + 80001e98: 6810546f jal x8,80007d18 + 80001e9c: 80001e8c .word 0x80001e8c + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 8001079e .word 0x8001079e + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0000000000000001 + 80001eb0: 000bbe03 ld x28,0(x23) + 80001eb4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x8000000000000001 + 80001eb8: 000bb703 ld x14,0(x23) + 80001ebc: 008b8b93 addi x23,x23,8 + +0000000080001ec0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + clmulh x31, x28, x14 # perform operation + 80001ec0: 0aee3fb3 clmulh x31,x28,x14 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec4: 00033383 ld x7,0(x6) + 80001ec8: 01f38c63 beq x7,x31,80001ee0 + 80001ecc: 64d0546f jal x8,80007d18 + 80001ed0: 80001ec0 .word 0x80001ec0 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 80010800 .word 0x80010800 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x0000000000000001 + 80001ee4: 000bbd03 ld x26,0(x23) + 80001ee8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x7fffffffffffffff + 80001eec: 000bb603 ld x12,0(x23) + 80001ef0: 008b8b93 addi x23,x23,8 + +0000000080001ef4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + clmulh x27, x26, x12 # perform operation + 80001ef4: 0acd3db3 clmulh x27,x26,x12 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef8: 00033383 ld x7,0(x6) + 80001efc: 01b38c63 beq x7,x27,80001f14 + 80001f00: 6190546f jal x8,80007d18 + 80001f04: 80001ef4 .word 0x80001ef4 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 80010862 .word 0x80010862 + 80001f10: 00000000 .word 0x00000000 + 80001f14: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x0000000000000001 + 80001f18: 000bbb03 ld x22,0(x23) + 80001f1c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x7ffffffffffffffe + 80001f20: 000bb203 ld x4,0(x23) + 80001f24: 008b8b93 addi x23,x23,8 + +0000000080001f28 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + clmulh x2, x22, x4 # perform operation + 80001f28: 0a4b3133 clmulh x2,x22,x4 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f2c: 00033383 ld x7,0(x6) + 80001f30: 00238c63 beq x7,x2,80001f48 + 80001f34: 5e50546f jal x8,80007d18 + 80001f38: 80001f28 .word 0x80001f28 + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 800108c4 .word 0x800108c4 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x0000000000000001 + 80001f4c: 000bb483 ld x9,0(x23) + 80001f50: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xffffffffffffffff + 80001f54: 000bb683 ld x13,0(x23) + 80001f58: 008b8b93 addi x23,x23,8 + +0000000080001f5c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + clmulh x22, x9, x13 # perform operation + 80001f5c: 0ad4bb33 clmulh x22,x9,x13 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f60: 00033383 ld x7,0(x6) + 80001f64: 01638c63 beq x7,x22,80001f7c + 80001f68: 5b10546f jal x8,80007d18 + 80001f6c: 80001f5c .word 0x80001f5c + 80001f70: 00000000 .word 0x00000000 + 80001f74: 80010926 .word 0x80010926 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x0000000000000001 + 80001f80: 000bb583 ld x11,0(x23) + 80001f84: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xfffffffffffffffe + 80001f88: 000bb283 ld x5,0(x23) + 80001f8c: 008b8b93 addi x23,x23,8 + +0000000080001f90 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + clmulh x30, x11, x5 # perform operation + 80001f90: 0a55bf33 clmulh x30,x11,x5 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f94: 00033383 ld x7,0(x6) + 80001f98: 01e38c63 beq x7,x30,80001fb0 + 80001f9c: 57d0546f jal x8,80007d18 + 80001fa0: 80001f90 .word 0x80001f90 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 80010988 .word 0x80010988 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x0000000000000001 + 80001fb4: 000bb783 ld x15,0(x23) + 80001fb8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 80001fbc: 000bbd83 ld x27,0(x23) + 80001fc0: 008b8b93 addi x23,x23,8 + +0000000080001fc4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + clmulh x22, x15, x27 # perform operation + 80001fc4: 0bb7bb33 clmulh x22,x15,x27 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc8: 00033383 ld x7,0(x6) + 80001fcc: 01638c63 beq x7,x22,80001fe4 + 80001fd0: 5490546f jal x8,80007d18 + 80001fd4: 80001fc4 .word 0x80001fc4 + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 800109ea .word 0x800109ea + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x0000000000000001 + 80001fe8: 000bbf83 ld x31,0(x23) + 80001fec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001ff0: 000bb883 ld x17,0(x23) + 80001ff4: 008b8b93 addi x23,x23,8 + +0000000080001ff8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x29, x31, x17 # perform operation + 80001ff8: 0b1fbeb3 clmulh x29,x31,x17 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ffc: 00033383 ld x7,0(x6) + 80002000: 01d38c63 beq x7,x29,80002018 + 80002004: 5150546f jal x8,80007d18 + 80002008: 80001ff8 .word 0x80001ff8 + 8000200c: 00000000 .word 0x00000000 + 80002010: 80010a4c .word 0x80010a4c + 80002014: 00000000 .word 0x00000000 + 80002018: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x0000000000000001 + 8000201c: 000bb503 ld x10,0(x23) + 80002020: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x5555555555555555 + 80002024: 000bba83 ld x21,0(x23) + 80002028: 008b8b93 addi x23,x23,8 + +000000008000202c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + clmulh x16, x10, x21 # perform operation + 8000202c: 0b553833 clmulh x16,x10,x21 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002030: 00033383 ld x7,0(x6) + 80002034: 01038c63 beq x7,x16,8000204c + 80002038: 4e10546f jal x8,80007d18 + 8000203c: 8000202c .word 0x8000202c + 80002040: 00000000 .word 0x00000000 + 80002044: 80010aae .word 0x80010aae + 80002048: 00000000 .word 0x00000000 + 8000204c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000001 + 80002050: 000bb103 ld x2,0(x23) + 80002054: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x00000000ffffffff + 80002058: 000bbd03 ld x26,0(x23) + 8000205c: 008b8b93 addi x23,x23,8 + +0000000080002060 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + clmulh x11, x2, x26 # perform operation + 80002060: 0ba135b3 clmulh x11,x2,x26 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002064: 00033383 ld x7,0(x6) + 80002068: 00b38c63 beq x7,x11,80002080 + 8000206c: 4ad0546f jal x8,80007d18 + 80002070: 80002060 .word 0x80002060 + 80002074: 00000000 .word 0x00000000 + 80002078: 80010b10 .word 0x80010b10 + 8000207c: 00000000 .word 0x00000000 + 80002080: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x0000000000000001 + 80002084: 000bb803 ld x16,0(x23) + 80002088: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x00000000fffffffe + 8000208c: 000bb603 ld x12,0(x23) + 80002090: 008b8b93 addi x23,x23,8 + +0000000080002094 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + clmulh x5, x16, x12 # perform operation + 80002094: 0ac832b3 clmulh x5,x16,x12 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002098: 00033383 ld x7,0(x6) + 8000209c: 00538c63 beq x7,x5,800020b4 + 800020a0: 4790546f jal x8,80007d18 + 800020a4: 80002094 .word 0x80002094 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 80010b6a .word 0x80010b6a + 800020b0: 00000000 .word 0x00000000 + 800020b4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000001 + 800020b8: 000bb103 ld x2,0(x23) + 800020bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000100000000 + 800020c0: 000bb983 ld x19,0(x23) + 800020c4: 008b8b93 addi x23,x23,8 + +00000000800020c8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + clmulh x22, x2, x19 # perform operation + 800020c8: 0b313b33 clmulh x22,x2,x19 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020cc: 00033383 ld x7,0(x6) + 800020d0: 01638c63 beq x7,x22,800020e8 + 800020d4: 4450546f jal x8,80007d18 + 800020d8: 800020c8 .word 0x800020c8 + 800020dc: 00000000 .word 0x00000000 + 800020e0: 80010bc4 .word 0x80010bc4 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x0000000000000001 + 800020ec: 000bbe83 ld x29,0(x23) + 800020f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x0000000100000001 + 800020f4: 000bbc03 ld x24,0(x23) + 800020f8: 008b8b93 addi x23,x23,8 + +00000000800020fc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + clmulh x26, x29, x24 # perform operation + 800020fc: 0b8ebd33 clmulh x26,x29,x24 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002100: 00033383 ld x7,0(x6) + 80002104: 01a38c63 beq x7,x26,8000211c + 80002108: 4110546f jal x8,80007d18 + 8000210c: 800020fc .word 0x800020fc + 80002110: 00000000 .word 0x00000000 + 80002114: 80010c1f .word 0x80010c1f + 80002118: 00000000 .word 0x00000000 + 8000211c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x0000000000000002 + 80002120: 000bbf83 ld x31,0(x23) + 80002124: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000000000000 + 80002128: 000bba03 ld x20,0(x23) + 8000212c: 008b8b93 addi x23,x23,8 + +0000000080002130 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + clmulh x22, x31, x20 # perform operation + 80002130: 0b4fbb33 clmulh x22,x31,x20 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002134: 00033383 ld x7,0(x6) + 80002138: 01638c63 beq x7,x22,80002150 + 8000213c: 3dd0546f jal x8,80007d18 + 80002140: 80002130 .word 0x80002130 + 80002144: 00000000 .word 0x00000000 + 80002148: 80010c7a .word 0x80010c7a + 8000214c: 00000000 .word 0x00000000 + 80002150: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x0000000000000002 + 80002154: 000bb903 ld x18,0(x23) + 80002158: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000000000001 + 8000215c: 000bbb03 ld x22,0(x23) + 80002160: 008b8b93 addi x23,x23,8 + +0000000080002164 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + clmulh x24, x18, x22 # perform operation + 80002164: 0b693c33 clmulh x24,x18,x22 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002168: 00033383 ld x7,0(x6) + 8000216c: 01838c63 beq x7,x24,80002184 + 80002170: 3a90546f jal x8,80007d18 + 80002174: 80002164 .word 0x80002164 + 80002178: 00000000 .word 0x00000000 + 8000217c: 80010ccd .word 0x80010ccd + 80002180: 00000000 .word 0x00000000 + 80002184: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x0000000000000002 + 80002188: 000bbd03 ld x26,0(x23) + 8000218c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000000000002 + 80002190: 000bbb03 ld x22,0(x23) + 80002194: 008b8b93 addi x23,x23,8 + +0000000080002198 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + clmulh x27, x26, x22 # perform operation + 80002198: 0b6d3db3 clmulh x27,x26,x22 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 8000219c: 00033383 ld x7,0(x6) + 800021a0: 01b38c63 beq x7,x27,800021b8 + 800021a4: 3750546f jal x8,80007d18 + 800021a8: 80002198 .word 0x80002198 + 800021ac: 00000000 .word 0x00000000 + 800021b0: 80010d20 .word 0x80010d20 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x0000000000000002 + 800021bc: 000bb583 ld x11,0(x23) + 800021c0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x8000000000000000 + 800021c4: 000bbf03 ld x30,0(x23) + 800021c8: 008b8b93 addi x23,x23,8 + +00000000800021cc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + clmulh x4, x11, x30 # perform operation + 800021cc: 0be5b233 clmulh x4,x11,x30 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d0: 00033383 ld x7,0(x6) + 800021d4: 00438c63 beq x7,x4,800021ec + 800021d8: 3410546f jal x8,80007d18 + 800021dc: 800021cc .word 0x800021cc + 800021e0: 00000000 .word 0x00000000 + 800021e4: 80010d73 .word 0x80010d73 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x0000000000000002 + 800021f0: 000bb483 ld x9,0(x23) + 800021f4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x8000000000000001 + 800021f8: 000bbf03 ld x30,0(x23) + 800021fc: 008b8b93 addi x23,x23,8 + +0000000080002200 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + clmulh x28, x9, x30 # perform operation + 80002200: 0be4be33 clmulh x28,x9,x30 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002204: 00033383 ld x7,0(x6) + 80002208: 01c38c63 beq x7,x28,80002220 + 8000220c: 30d0546f jal x8,80007d18 + 80002210: 80002200 .word 0x80002200 + 80002214: 00000000 .word 0x00000000 + 80002218: 80010dd5 .word 0x80010dd5 + 8000221c: 00000000 .word 0x00000000 + 80002220: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000002 + 80002224: 000bb103 ld x2,0(x23) + 80002228: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x7fffffffffffffff + 8000222c: 000bb203 ld x4,0(x23) + 80002230: 008b8b93 addi x23,x23,8 + +0000000080002234 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + clmulh x11, x2, x4 # perform operation + 80002234: 0a4135b3 clmulh x11,x2,x4 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002238: 00033383 ld x7,0(x6) + 8000223c: 00b38c63 beq x7,x11,80002254 + 80002240: 2d90546f jal x8,80007d18 + 80002244: 80002234 .word 0x80002234 + 80002248: 00000000 .word 0x00000000 + 8000224c: 80010e37 .word 0x80010e37 + 80002250: 00000000 .word 0x00000000 + 80002254: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0000000000000002 + 80002258: 000bb983 ld x19,0(x23) + 8000225c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80002260: 000bb083 ld x1,0(x23) + 80002264: 008b8b93 addi x23,x23,8 + +0000000080002268 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + clmulh x3, x19, x1 # perform operation + 80002268: 0a19b1b3 clmulh x3,x19,x1 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 8000226c: 00033383 ld x7,0(x6) + 80002270: 00338c63 beq x7,x3,80002288 + 80002274: 2a50546f jal x8,80007d18 + 80002278: 80002268 .word 0x80002268 + 8000227c: 00000000 .word 0x00000000 + 80002280: 80010e99 .word 0x80010e99 + 80002284: 00000000 .word 0x00000000 + 80002288: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x0000000000000002 + 8000228c: 000bb583 ld x11,0(x23) + 80002290: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xffffffffffffffff + 80002294: 000bb503 ld x10,0(x23) + 80002298: 008b8b93 addi x23,x23,8 + +000000008000229c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + clmulh x2, x11, x10 # perform operation + 8000229c: 0aa5b133 clmulh x2,x11,x10 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a0: 00033383 ld x7,0(x6) + 800022a4: 00238c63 beq x7,x2,800022bc + 800022a8: 2710546f jal x8,80007d18 + 800022ac: 8000229c .word 0x8000229c + 800022b0: 00000000 .word 0x00000000 + 800022b4: 80010efb .word 0x80010efb + 800022b8: 00000000 .word 0x00000000 + 800022bc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x0000000000000002 + 800022c0: 000bb483 ld x9,0(x23) + 800022c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xfffffffffffffffe + 800022c8: 000bb903 ld x18,0(x23) + 800022cc: 008b8b93 addi x23,x23,8 + +00000000800022d0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + clmulh x27, x9, x18 # perform operation + 800022d0: 0b24bdb3 clmulh x27,x9,x18 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d4: 00033383 ld x7,0(x6) + 800022d8: 01b38c63 beq x7,x27,800022f0 + 800022dc: 23d0546f jal x8,80007d18 + 800022e0: 800022d0 .word 0x800022d0 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 80010f5d .word 0x80010f5d + 800022ec: 00000000 .word 0x00000000 + 800022f0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x0000000000000002 + 800022f4: 000bb483 ld x9,0(x23) + 800022f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 800022fc: 000bbe83 ld x29,0(x23) + 80002300: 008b8b93 addi x23,x23,8 + +0000000080002304 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + clmulh x2, x9, x29 # perform operation + 80002304: 0bd4b133 clmulh x2,x9,x29 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002308: 00033383 ld x7,0(x6) + 8000230c: 00238c63 beq x7,x2,80002324 + 80002310: 2090546f jal x8,80007d18 + 80002314: 80002304 .word 0x80002304 + 80002318: 00000000 .word 0x00000000 + 8000231c: 80010fbf .word 0x80010fbf + 80002320: 00000000 .word 0x00000000 + 80002324: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0000000000000002 + 80002328: 000bbe03 ld x28,0(x23) + 8000232c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 80002330: 000bb083 ld x1,0(x23) + 80002334: 008b8b93 addi x23,x23,8 + +0000000080002338 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x4, x28, x1 # perform operation + 80002338: 0a1e3233 clmulh x4,x28,x1 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000233c: 00033383 ld x7,0(x6) + 80002340: 00438c63 beq x7,x4,80002358 + 80002344: 1d50546f jal x8,80007d18 + 80002348: 80002338 .word 0x80002338 + 8000234c: 00000000 .word 0x00000000 + 80002350: 80011021 .word 0x80011021 + 80002354: 00000000 .word 0x00000000 + 80002358: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x0000000000000002 + 8000235c: 000bb203 ld x4,0(x23) + 80002360: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x5555555555555555 + 80002364: 000bb903 ld x18,0(x23) + 80002368: 008b8b93 addi x23,x23,8 + +000000008000236c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + clmulh x11, x4, x18 # perform operation + 8000236c: 0b2235b3 clmulh x11,x4,x18 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002370: 00033383 ld x7,0(x6) + 80002374: 00b38c63 beq x7,x11,8000238c + 80002378: 1a10546f jal x8,80007d18 + 8000237c: 8000236c .word 0x8000236c + 80002380: 00000000 .word 0x00000000 + 80002384: 80011083 .word 0x80011083 + 80002388: 00000000 .word 0x00000000 + 8000238c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x0000000000000002 + 80002390: 000bb603 ld x12,0(x23) + 80002394: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x00000000ffffffff + 80002398: 000bbc83 ld x25,0(x23) + 8000239c: 008b8b93 addi x23,x23,8 + +00000000800023a0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + clmulh x1, x12, x25 # perform operation + 800023a0: 0b9630b3 clmulh x1,x12,x25 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a4: 00033383 ld x7,0(x6) + 800023a8: 00138c63 beq x7,x1,800023c0 + 800023ac: 16d0546f jal x8,80007d18 + 800023b0: 800023a0 .word 0x800023a0 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 800110e5 .word 0x800110e5 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x0000000000000002 + 800023c4: 000bbd83 ld x27,0(x23) + 800023c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000000fffffffe + 800023cc: 000bbf83 ld x31,0(x23) + 800023d0: 008b8b93 addi x23,x23,8 + +00000000800023d4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + clmulh x5, x27, x31 # perform operation + 800023d4: 0bfdb2b3 clmulh x5,x27,x31 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d8: 00033383 ld x7,0(x6) + 800023dc: 00538c63 beq x7,x5,800023f4 + 800023e0: 1390546f jal x8,80007d18 + 800023e4: 800023d4 .word 0x800023d4 + 800023e8: 00000000 .word 0x00000000 + 800023ec: 8001113f .word 0x8001113f + 800023f0: 00000000 .word 0x00000000 + 800023f4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x0000000000000002 + 800023f8: 000bbe83 ld x29,0(x23) + 800023fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x0000000100000000 + 80002400: 000bb503 ld x10,0(x23) + 80002404: 008b8b93 addi x23,x23,8 + +0000000080002408 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + clmulh x31, x29, x10 # perform operation + 80002408: 0aaebfb3 clmulh x31,x29,x10 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 8000240c: 00033383 ld x7,0(x6) + 80002410: 01f38c63 beq x7,x31,80002428 + 80002414: 1050546f jal x8,80007d18 + 80002418: 80002408 .word 0x80002408 + 8000241c: 00000000 .word 0x00000000 + 80002420: 80011199 .word 0x80011199 + 80002424: 00000000 .word 0x00000000 + 80002428: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000000000002 + 8000242c: 000bb103 ld x2,0(x23) + 80002430: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x0000000100000001 + 80002434: 000bb583 ld x11,0(x23) + 80002438: 008b8b93 addi x23,x23,8 + +000000008000243c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + clmulh x22, x2, x11 # perform operation + 8000243c: 0ab13b33 clmulh x22,x2,x11 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002440: 00033383 ld x7,0(x6) + 80002444: 01638c63 beq x7,x22,8000245c + 80002448: 0d10546f jal x8,80007d18 + 8000244c: 8000243c .word 0x8000243c + 80002450: 00000000 .word 0x00000000 + 80002454: 800111f4 .word 0x800111f4 + 80002458: 00000000 .word 0x00000000 + 8000245c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x8000000000000000 + 80002460: 000bbb03 ld x22,0(x23) + 80002464: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x0000000000000000 + 80002468: 000bb203 ld x4,0(x23) + 8000246c: 008b8b93 addi x23,x23,8 + +0000000080002470 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + clmulh x11, x22, x4 # perform operation + 80002470: 0a4b35b3 clmulh x11,x22,x4 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002474: 00033383 ld x7,0(x6) + 80002478: 00b38c63 beq x7,x11,80002490 + 8000247c: 09d0546f jal x8,80007d18 + 80002480: 80002470 .word 0x80002470 + 80002484: 00000000 .word 0x00000000 + 80002488: 8001124f .word 0x8001124f + 8000248c: 00000000 .word 0x00000000 + 80002490: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x8000000000000000 + 80002494: 000bb783 ld x15,0(x23) + 80002498: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x0000000000000001 + 8000249c: 000bb583 ld x11,0(x23) + 800024a0: 008b8b93 addi x23,x23,8 + +00000000800024a4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + clmulh x3, x15, x11 # perform operation + 800024a4: 0ab7b1b3 clmulh x3,x15,x11 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a8: 00033383 ld x7,0(x6) + 800024ac: 00338c63 beq x7,x3,800024c4 + 800024b0: 0690546f jal x8,80007d18 + 800024b4: 800024a4 .word 0x800024a4 + 800024b8: 00000000 .word 0x00000000 + 800024bc: 800112b1 .word 0x800112b1 + 800024c0: 00000000 .word 0x00000000 + 800024c4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x8000000000000000 + 800024c8: 000bbf03 ld x30,0(x23) + 800024cc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x0000000000000002 + 800024d0: 000bb783 ld x15,0(x23) + 800024d4: 008b8b93 addi x23,x23,8 + +00000000800024d8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + clmulh x9, x30, x15 # perform operation + 800024d8: 0aff34b3 clmulh x9,x30,x15 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024dc: 00033383 ld x7,0(x6) + 800024e0: 00938c63 beq x7,x9,800024f8 + 800024e4: 0350546f jal x8,80007d18 + 800024e8: 800024d8 .word 0x800024d8 + 800024ec: 00000000 .word 0x00000000 + 800024f0: 80011313 .word 0x80011313 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x8000000000000000 + 800024fc: 000bb583 ld x11,0(x23) + 80002500: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x8000000000000000 + 80002504: 000bb783 ld x15,0(x23) + 80002508: 008b8b93 addi x23,x23,8 + +000000008000250c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + clmulh x13, x11, x15 # perform operation + 8000250c: 0af5b6b3 clmulh x13,x11,x15 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002510: 00033383 ld x7,0(x6) + 80002514: 00d38c63 beq x7,x13,8000252c + 80002518: 0010546f jal x8,80007d18 + 8000251c: 8000250c .word 0x8000250c + 80002520: 00000000 .word 0x00000000 + 80002524: 80011375 .word 0x80011375 + 80002528: 00000000 .word 0x00000000 + 8000252c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x8000000000000000 + 80002530: 000bbb03 ld x22,0(x23) + 80002534: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x8000000000000001 + 80002538: 000bbd83 ld x27,0(x23) + 8000253c: 008b8b93 addi x23,x23,8 + +0000000080002540 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + clmulh x14, x22, x27 # perform operation + 80002540: 0bbb3733 clmulh x14,x22,x27 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002544: 00033383 ld x7,0(x6) + 80002548: 00e38c63 beq x7,x14,80002560 + 8000254c: 7cc0546f jal x8,80007d18 + 80002550: 80002540 .word 0x80002540 + 80002554: 00000000 .word 0x00000000 + 80002558: 800113e6 .word 0x800113e6 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x8000000000000000 + 80002564: 000bbe03 ld x28,0(x23) + 80002568: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x7fffffffffffffff + 8000256c: 000bbc83 ld x25,0(x23) + 80002570: 008b8b93 addi x23,x23,8 + +0000000080002574 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + clmulh x20, x28, x25 # perform operation + 80002574: 0b9e3a33 clmulh x20,x28,x25 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002578: 00033383 ld x7,0(x6) + 8000257c: 01438c63 beq x7,x20,80002594 + 80002580: 7980546f jal x8,80007d18 + 80002584: 80002574 .word 0x80002574 + 80002588: 00000000 .word 0x00000000 + 8000258c: 80011457 .word 0x80011457 + 80002590: 00000000 .word 0x00000000 + 80002594: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x8000000000000000 + 80002598: 000bbd03 ld x26,0(x23) + 8000259c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800025a0: 000bb883 ld x17,0(x23) + 800025a4: 008b8b93 addi x23,x23,8 + +00000000800025a8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + clmulh x12, x26, x17 # perform operation + 800025a8: 0b1d3633 clmulh x12,x26,x17 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025ac: 00033383 ld x7,0(x6) + 800025b0: 00c38c63 beq x7,x12,800025c8 + 800025b4: 7640546f jal x8,80007d18 + 800025b8: 800025a8 .word 0x800025a8 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 800114c8 .word 0x800114c8 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x8000000000000000 + 800025cc: 000bbc83 ld x25,0(x23) + 800025d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xffffffffffffffff + 800025d4: 000bb803 ld x16,0(x23) + 800025d8: 008b8b93 addi x23,x23,8 + +00000000800025dc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + clmulh x30, x25, x16 # perform operation + 800025dc: 0b0cbf33 clmulh x30,x25,x16 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e0: 00033383 ld x7,0(x6) + 800025e4: 01e38c63 beq x7,x30,800025fc + 800025e8: 7300546f jal x8,80007d18 + 800025ec: 800025dc .word 0x800025dc + 800025f0: 00000000 .word 0x00000000 + 800025f4: 80011539 .word 0x80011539 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x8000000000000000 + 80002600: 000bb903 ld x18,0(x23) + 80002604: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xfffffffffffffffe + 80002608: 000bba03 ld x20,0(x23) + 8000260c: 008b8b93 addi x23,x23,8 + +0000000080002610 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + clmulh x5, x18, x20 # perform operation + 80002610: 0b4932b3 clmulh x5,x18,x20 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002614: 00033383 ld x7,0(x6) + 80002618: 00538c63 beq x7,x5,80002630 + 8000261c: 6fc0546f jal x8,80007d18 + 80002620: 80002610 .word 0x80002610 + 80002624: 00000000 .word 0x00000000 + 80002628: 800115aa .word 0x800115aa + 8000262c: 00000000 .word 0x00000000 + 80002630: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x8000000000000000 + 80002634: 000bb903 ld x18,0(x23) + 80002638: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 8000263c: 000bb703 ld x14,0(x23) + 80002640: 008b8b93 addi x23,x23,8 + +0000000080002644 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + clmulh x30, x18, x14 # perform operation + 80002644: 0ae93f33 clmulh x30,x18,x14 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002648: 00033383 ld x7,0(x6) + 8000264c: 01e38c63 beq x7,x30,80002664 + 80002650: 6c80546f jal x8,80007d18 + 80002654: 80002644 .word 0x80002644 + 80002658: 00000000 .word 0x00000000 + 8000265c: 8001161b .word 0x8001161b + 80002660: 00000000 .word 0x00000000 + 80002664: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x8000000000000000 + 80002668: 000bba03 ld x20,0(x23) + 8000266c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80002670: 000bb103 ld x2,0(x23) + 80002674: 008b8b93 addi x23,x23,8 + +0000000080002678 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x15, x20, x2 # perform operation + 80002678: 0a2a37b3 clmulh x15,x20,x2 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000267c: 00033383 ld x7,0(x6) + 80002680: 00f38c63 beq x7,x15,80002698 + 80002684: 6940546f jal x8,80007d18 + 80002688: 80002678 .word 0x80002678 + 8000268c: 00000000 .word 0x00000000 + 80002690: 8001168c .word 0x8001168c + 80002694: 00000000 .word 0x00000000 + 80002698: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x8000000000000000 + 8000269c: 000bbd83 ld x27,0(x23) + 800026a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x5555555555555555 + 800026a4: 000bb883 ld x17,0(x23) + 800026a8: 008b8b93 addi x23,x23,8 + +00000000800026ac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + clmulh x31, x27, x17 # perform operation + 800026ac: 0b1dbfb3 clmulh x31,x27,x17 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b0: 00033383 ld x7,0(x6) + 800026b4: 01f38c63 beq x7,x31,800026cc + 800026b8: 6600546f jal x8,80007d18 + 800026bc: 800026ac .word 0x800026ac + 800026c0: 00000000 .word 0x00000000 + 800026c4: 800116fd .word 0x800116fd + 800026c8: 00000000 .word 0x00000000 + 800026cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x8000000000000000 + 800026d0: 000bb803 ld x16,0(x23) + 800026d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x00000000ffffffff + 800026d8: 000bbe03 ld x28,0(x23) + 800026dc: 008b8b93 addi x23,x23,8 + +00000000800026e0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + clmulh x26, x16, x28 # perform operation + 800026e0: 0bc83d33 clmulh x26,x16,x28 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e4: 00033383 ld x7,0(x6) + 800026e8: 01a38c63 beq x7,x26,80002700 + 800026ec: 62c0546f jal x8,80007d18 + 800026f0: 800026e0 .word 0x800026e0 + 800026f4: 00000000 .word 0x00000000 + 800026f8: 8001176e .word 0x8001176e + 800026fc: 00000000 .word 0x00000000 + 80002700: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x8000000000000000 + 80002704: 000bbd83 ld x27,0(x23) + 80002708: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x00000000fffffffe + 8000270c: 000bb583 ld x11,0(x23) + 80002710: 008b8b93 addi x23,x23,8 + +0000000080002714 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + clmulh x12, x27, x11 # perform operation + 80002714: 0abdb633 clmulh x12,x27,x11 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002718: 00033383 ld x7,0(x6) + 8000271c: 00c38c63 beq x7,x12,80002734 + 80002720: 5f80546f jal x8,80007d18 + 80002724: 80002714 .word 0x80002714 + 80002728: 00000000 .word 0x00000000 + 8000272c: 800117d7 .word 0x800117d7 + 80002730: 00000000 .word 0x00000000 + 80002734: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x8000000000000000 + 80002738: 000bb683 ld x13,0(x23) + 8000273c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000100000000 + 80002740: 000bbb03 ld x22,0(x23) + 80002744: 008b8b93 addi x23,x23,8 + +0000000080002748 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + clmulh x17, x13, x22 # perform operation + 80002748: 0b66b8b3 clmulh x17,x13,x22 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 8000274c: 00033383 ld x7,0(x6) + 80002750: 01138c63 beq x7,x17,80002768 + 80002754: 5c40546f jal x8,80007d18 + 80002758: 80002748 .word 0x80002748 + 8000275c: 00000000 .word 0x00000000 + 80002760: 80011840 .word 0x80011840 + 80002764: 00000000 .word 0x00000000 + 80002768: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x8000000000000000 + 8000276c: 000bb503 ld x10,0(x23) + 80002770: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000100000001 + 80002774: 000bb983 ld x19,0(x23) + 80002778: 008b8b93 addi x23,x23,8 + +000000008000277c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + clmulh x31, x10, x19 # perform operation + 8000277c: 0b353fb3 clmulh x31,x10,x19 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002780: 00033383 ld x7,0(x6) + 80002784: 01f38c63 beq x7,x31,8000279c + 80002788: 5900546f jal x8,80007d18 + 8000278c: 8000277c .word 0x8000277c + 80002790: 00000000 .word 0x00000000 + 80002794: 800118aa .word 0x800118aa + 80002798: 00000000 .word 0x00000000 + 8000279c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x8000000000000001 + 800027a0: 000bbc03 ld x24,0(x23) + 800027a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x0000000000000000 + 800027a8: 000bb103 ld x2,0(x23) + 800027ac: 008b8b93 addi x23,x23,8 + +00000000800027b0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + clmulh x16, x24, x2 # perform operation + 800027b0: 0a2c3833 clmulh x16,x24,x2 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b4: 00033383 ld x7,0(x6) + 800027b8: 01038c63 beq x7,x16,800027d0 + 800027bc: 55c0546f jal x8,80007d18 + 800027c0: 800027b0 .word 0x800027b0 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 80011914 .word 0x80011914 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x8000000000000001 + 800027d4: 000bbc03 ld x24,0(x23) + 800027d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x0000000000000001 + 800027dc: 000bbf83 ld x31,0(x23) + 800027e0: 008b8b93 addi x23,x23,8 + +00000000800027e4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + clmulh x19, x24, x31 # perform operation + 800027e4: 0bfc39b3 clmulh x19,x24,x31 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e8: 00033383 ld x7,0(x6) + 800027ec: 01338c63 beq x7,x19,80002804 + 800027f0: 5280546f jal x8,80007d18 + 800027f4: 800027e4 .word 0x800027e4 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 80011976 .word 0x80011976 + 80002800: 00000000 .word 0x00000000 + 80002804: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x8000000000000001 + 80002808: 000bb983 ld x19,0(x23) + 8000280c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x0000000000000002 + 80002810: 000bb903 ld x18,0(x23) + 80002814: 008b8b93 addi x23,x23,8 + +0000000080002818 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + clmulh x17, x19, x18 # perform operation + 80002818: 0b29b8b3 clmulh x17,x19,x18 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 8000281c: 00033383 ld x7,0(x6) + 80002820: 01138c63 beq x7,x17,80002838 + 80002824: 4f40546f jal x8,80007d18 + 80002828: 80002818 .word 0x80002818 + 8000282c: 00000000 .word 0x00000000 + 80002830: 800119d8 .word 0x800119d8 + 80002834: 00000000 .word 0x00000000 + 80002838: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x8000000000000001 + 8000283c: 000bbd03 ld x26,0(x23) + 80002840: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x8000000000000000 + 80002844: 000bb883 ld x17,0(x23) + 80002848: 008b8b93 addi x23,x23,8 + +000000008000284c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + clmulh x28, x26, x17 # perform operation + 8000284c: 0b1d3e33 clmulh x28,x26,x17 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002850: 00033383 ld x7,0(x6) + 80002854: 01c38c63 beq x7,x28,8000286c + 80002858: 4c00546f jal x8,80007d18 + 8000285c: 8000284c .word 0x8000284c + 80002860: 00000000 .word 0x00000000 + 80002864: 80011a3a .word 0x80011a3a + 80002868: 00000000 .word 0x00000000 + 8000286c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x8000000000000001 + 80002870: 000bbd83 ld x27,0(x23) + 80002874: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x8000000000000001 + 80002878: 000bb703 ld x14,0(x23) + 8000287c: 008b8b93 addi x23,x23,8 + +0000000080002880 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + clmulh x4, x27, x14 # perform operation + 80002880: 0aedb233 clmulh x4,x27,x14 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002884: 00033383 ld x7,0(x6) + 80002888: 00438c63 beq x7,x4,800028a0 + 8000288c: 48c0546f jal x8,80007d18 + 80002890: 80002880 .word 0x80002880 + 80002894: 00000000 .word 0x00000000 + 80002898: 80011aab .word 0x80011aab + 8000289c: 00000000 .word 0x00000000 + 800028a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x8000000000000001 + 800028a4: 000bb283 ld x5,0(x23) + 800028a8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x7fffffffffffffff + 800028ac: 000bba03 ld x20,0(x23) + 800028b0: 008b8b93 addi x23,x23,8 + +00000000800028b4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + clmulh x19, x5, x20 # perform operation + 800028b4: 0b42b9b3 clmulh x19,x5,x20 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b8: 00033383 ld x7,0(x6) + 800028bc: 01338c63 beq x7,x19,800028d4 + 800028c0: 4580546f jal x8,80007d18 + 800028c4: 800028b4 .word 0x800028b4 + 800028c8: 00000000 .word 0x00000000 + 800028cc: 80011b1c .word 0x80011b1c + 800028d0: 00000000 .word 0x00000000 + 800028d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x8000000000000001 + 800028d8: 000bb503 ld x10,0(x23) + 800028dc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x7ffffffffffffffe + 800028e0: 000bba83 ld x21,0(x23) + 800028e4: 008b8b93 addi x23,x23,8 + +00000000800028e8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + clmulh x11, x10, x21 # perform operation + 800028e8: 0b5535b3 clmulh x11,x10,x21 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028ec: 00033383 ld x7,0(x6) + 800028f0: 00b38c63 beq x7,x11,80002908 + 800028f4: 4240546f jal x8,80007d18 + 800028f8: 800028e8 .word 0x800028e8 + 800028fc: 00000000 .word 0x00000000 + 80002900: 80011b8d .word 0x80011b8d + 80002904: 00000000 .word 0x00000000 + 80002908: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x8000000000000001 + 8000290c: 000bb603 ld x12,0(x23) + 80002910: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xffffffffffffffff + 80002914: 000bb583 ld x11,0(x23) + 80002918: 008b8b93 addi x23,x23,8 + +000000008000291c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + clmulh x4, x12, x11 # perform operation + 8000291c: 0ab63233 clmulh x4,x12,x11 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002920: 00033383 ld x7,0(x6) + 80002924: 00438c63 beq x7,x4,8000293c + 80002928: 3f00546f jal x8,80007d18 + 8000292c: 8000291c .word 0x8000291c + 80002930: 00000000 .word 0x00000000 + 80002934: 80011bfe .word 0x80011bfe + 80002938: 00000000 .word 0x00000000 + 8000293c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x8000000000000001 + 80002940: 000bb783 ld x15,0(x23) + 80002944: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xfffffffffffffffe + 80002948: 000bb503 ld x10,0(x23) + 8000294c: 008b8b93 addi x23,x23,8 + +0000000080002950 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + clmulh x26, x15, x10 # perform operation + 80002950: 0aa7bd33 clmulh x26,x15,x10 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002954: 00033383 ld x7,0(x6) + 80002958: 01a38c63 beq x7,x26,80002970 + 8000295c: 3bc0546f jal x8,80007d18 + 80002960: 80002950 .word 0x80002950 + 80002964: 00000000 .word 0x00000000 + 80002968: 80011c6f .word 0x80011c6f + 8000296c: 00000000 .word 0x00000000 + 80002970: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x8000000000000001 + 80002974: 000bbc03 ld x24,0(x23) + 80002978: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 8000297c: 000bb603 ld x12,0(x23) + 80002980: 008b8b93 addi x23,x23,8 + +0000000080002984 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + clmulh x4, x24, x12 # perform operation + 80002984: 0acc3233 clmulh x4,x24,x12 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002988: 00033383 ld x7,0(x6) + 8000298c: 00438c63 beq x7,x4,800029a4 + 80002990: 3880546f jal x8,80007d18 + 80002994: 80002984 .word 0x80002984 + 80002998: 00000000 .word 0x00000000 + 8000299c: 80011ce0 .word 0x80011ce0 + 800029a0: 00000000 .word 0x00000000 + 800029a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x8000000000000001 + 800029a8: 000bba03 ld x20,0(x23) + 800029ac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 800029b0: 000bb603 ld x12,0(x23) + 800029b4: 008b8b93 addi x23,x23,8 + +00000000800029b8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x30, x20, x12 # perform operation + 800029b8: 0aca3f33 clmulh x30,x20,x12 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029bc: 00033383 ld x7,0(x6) + 800029c0: 01e38c63 beq x7,x30,800029d8 + 800029c4: 3540546f jal x8,80007d18 + 800029c8: 800029b8 .word 0x800029b8 + 800029cc: 00000000 .word 0x00000000 + 800029d0: 80011d51 .word 0x80011d51 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x8000000000000001 + 800029dc: 000bb483 ld x9,0(x23) + 800029e0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x5555555555555555 + 800029e4: 000bbf83 ld x31,0(x23) + 800029e8: 008b8b93 addi x23,x23,8 + +00000000800029ec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + clmulh x3, x9, x31 # perform operation + 800029ec: 0bf4b1b3 clmulh x3,x9,x31 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f0: 00033383 ld x7,0(x6) + 800029f4: 00338c63 beq x7,x3,80002a0c + 800029f8: 3200546f jal x8,80007d18 + 800029fc: 800029ec .word 0x800029ec + 80002a00: 00000000 .word 0x00000000 + 80002a04: 80011dc2 .word 0x80011dc2 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x8000000000000001 + 80002a10: 000bbe03 ld x28,0(x23) + 80002a14: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x00000000ffffffff + 80002a18: 000bbc83 ld x25,0(x23) + 80002a1c: 008b8b93 addi x23,x23,8 + +0000000080002a20 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + clmulh x19, x28, x25 # perform operation + 80002a20: 0b9e39b3 clmulh x19,x28,x25 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a24: 00033383 ld x7,0(x6) + 80002a28: 01338c63 beq x7,x19,80002a40 + 80002a2c: 2ec0546f jal x8,80007d18 + 80002a30: 80002a20 .word 0x80002a20 + 80002a34: 00000000 .word 0x00000000 + 80002a38: 80011e33 .word 0x80011e33 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x8000000000000001 + 80002a44: 000bb603 ld x12,0(x23) + 80002a48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x00000000fffffffe + 80002a4c: 000bb083 ld x1,0(x23) + 80002a50: 008b8b93 addi x23,x23,8 + +0000000080002a54 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + clmulh x19, x12, x1 # perform operation + 80002a54: 0a1639b3 clmulh x19,x12,x1 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a58: 00033383 ld x7,0(x6) + 80002a5c: 01338c63 beq x7,x19,80002a74 + 80002a60: 2b80546f jal x8,80007d18 + 80002a64: 80002a54 .word 0x80002a54 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 80011e9c .word 0x80011e9c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x8000000000000001 + 80002a78: 000bb683 ld x13,0(x23) + 80002a7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000100000000 + 80002a80: 000bbb03 ld x22,0(x23) + 80002a84: 008b8b93 addi x23,x23,8 + +0000000080002a88 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + clmulh x17, x13, x22 # perform operation + 80002a88: 0b66b8b3 clmulh x17,x13,x22 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a8c: 00033383 ld x7,0(x6) + 80002a90: 01138c63 beq x7,x17,80002aa8 + 80002a94: 2840546f jal x8,80007d18 + 80002a98: 80002a88 .word 0x80002a88 + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 80011f05 .word 0x80011f05 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x8000000000000001 + 80002aac: 000bbe03 ld x28,0(x23) + 80002ab0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000100000001 + 80002ab4: 000bb983 ld x19,0(x23) + 80002ab8: 008b8b93 addi x23,x23,8 + +0000000080002abc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + clmulh x29, x28, x19 # perform operation + 80002abc: 0b3e3eb3 clmulh x29,x28,x19 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac0: 00033383 ld x7,0(x6) + 80002ac4: 01d38c63 beq x7,x29,80002adc + 80002ac8: 2500546f jal x8,80007d18 + 80002acc: 80002abc .word 0x80002abc + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 80011f6f .word 0x80011f6f + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002ae0: 000bb983 ld x19,0(x23) + 80002ae4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x0000000000000000 + 80002ae8: 000bb683 ld x13,0(x23) + 80002aec: 008b8b93 addi x23,x23,8 + +0000000080002af0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + clmulh x18, x19, x13 # perform operation + 80002af0: 0ad9b933 clmulh x18,x19,x13 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af4: 00033383 ld x7,0(x6) + 80002af8: 01238c63 beq x7,x18,80002b10 + 80002afc: 21c0546f jal x8,80007d18 + 80002b00: 80002af0 .word 0x80002af0 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 80011fd9 .word 0x80011fd9 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002b14: 000bb783 ld x15,0(x23) + 80002b18: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x0000000000000001 + 80002b1c: 000bbd03 ld x26,0(x23) + 80002b20: 008b8b93 addi x23,x23,8 + +0000000080002b24 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + clmulh x20, x15, x26 # perform operation + 80002b24: 0ba7ba33 clmulh x20,x15,x26 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b28: 00033383 ld x7,0(x6) + 80002b2c: 01438c63 beq x7,x20,80002b44 + 80002b30: 1e80546f jal x8,80007d18 + 80002b34: 80002b24 .word 0x80002b24 + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 8001203b .word 0x8001203b + 80002b40: 00000000 .word 0x00000000 + 80002b44: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002b48: 000bb903 ld x18,0(x23) + 80002b4c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000000000002 + 80002b50: 000bb983 ld x19,0(x23) + 80002b54: 008b8b93 addi x23,x23,8 + +0000000080002b58 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + clmulh x21, x18, x19 # perform operation + 80002b58: 0b393ab3 clmulh x21,x18,x19 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b5c: 00033383 ld x7,0(x6) + 80002b60: 01538c63 beq x7,x21,80002b78 + 80002b64: 1b40546f jal x8,80007d18 + 80002b68: 80002b58 .word 0x80002b58 + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 8001209d .word 0x8001209d + 80002b74: 00000000 .word 0x00000000 + 80002b78: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002b7c: 000bb603 ld x12,0(x23) + 80002b80: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x8000000000000000 + 80002b84: 000bb783 ld x15,0(x23) + 80002b88: 008b8b93 addi x23,x23,8 + +0000000080002b8c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + clmulh x5, x12, x15 # perform operation + 80002b8c: 0af632b3 clmulh x5,x12,x15 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b90: 00033383 ld x7,0(x6) + 80002b94: 00538c63 beq x7,x5,80002bac + 80002b98: 1800546f jal x8,80007d18 + 80002b9c: 80002b8c .word 0x80002b8c + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 800120ff .word 0x800120ff + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002bb0: 000bb083 ld x1,0(x23) + 80002bb4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x8000000000000001 + 80002bb8: 000bbe03 ld x28,0(x23) + 80002bbc: 008b8b93 addi x23,x23,8 + +0000000080002bc0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + clmulh x22, x1, x28 # perform operation + 80002bc0: 0bc0bb33 clmulh x22,x1,x28 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc4: 00033383 ld x7,0(x6) + 80002bc8: 01638c63 beq x7,x22,80002be0 + 80002bcc: 14c0546f jal x8,80007d18 + 80002bd0: 80002bc0 .word 0x80002bc0 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 80012170 .word 0x80012170 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002be4: 000bb703 ld x14,0(x23) + 80002be8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x7fffffffffffffff + 80002bec: 000bb183 ld x3,0(x23) + 80002bf0: 008b8b93 addi x23,x23,8 + +0000000080002bf4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + clmulh x26, x14, x3 # perform operation + 80002bf4: 0a373d33 clmulh x26,x14,x3 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf8: 00033383 ld x7,0(x6) + 80002bfc: 01a38c63 beq x7,x26,80002c14 + 80002c00: 1180546f jal x8,80007d18 + 80002c04: 80002bf4 .word 0x80002bf4 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 800121e1 .word 0x800121e1 + 80002c10: 00000000 .word 0x00000000 + 80002c14: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x7fffffffffffffff + 80002c18: 000bb283 ld x5,0(x23) + 80002c1c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x7ffffffffffffffe + 80002c20: 000bbf83 ld x31,0(x23) + 80002c24: 008b8b93 addi x23,x23,8 + +0000000080002c28 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + clmulh x10, x5, x31 # perform operation + 80002c28: 0bf2b533 clmulh x10,x5,x31 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c2c: 00033383 ld x7,0(x6) + 80002c30: 00a38c63 beq x7,x10,80002c48 + 80002c34: 0e40546f jal x8,80007d18 + 80002c38: 80002c28 .word 0x80002c28 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 80012252 .word 0x80012252 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002c4c: 000bbf03 ld x30,0(x23) + 80002c50: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xffffffffffffffff + 80002c54: 000bb683 ld x13,0(x23) + 80002c58: 008b8b93 addi x23,x23,8 + +0000000080002c5c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + clmulh x5, x30, x13 # perform operation + 80002c5c: 0adf32b3 clmulh x5,x30,x13 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c60: 00033383 ld x7,0(x6) + 80002c64: 00538c63 beq x7,x5,80002c7c + 80002c68: 0b00546f jal x8,80007d18 + 80002c6c: 80002c5c .word 0x80002c5c + 80002c70: 00000000 .word 0x00000000 + 80002c74: 800122c3 .word 0x800122c3 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002c80: 000bb683 ld x13,0(x23) + 80002c84: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xfffffffffffffffe + 80002c88: 000bbe83 ld x29,0(x23) + 80002c8c: 008b8b93 addi x23,x23,8 + +0000000080002c90 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + clmulh x12, x13, x29 # perform operation + 80002c90: 0bd6b633 clmulh x12,x13,x29 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c94: 00033383 ld x7,0(x6) + 80002c98: 00c38c63 beq x7,x12,80002cb0 + 80002c9c: 07c0546f jal x8,80007d18 + 80002ca0: 80002c90 .word 0x80002c90 + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 80012334 .word 0x80012334 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002cb4: 000bb803 ld x16,0(x23) + 80002cb8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002cbc: 000bbc03 ld x24,0(x23) + 80002cc0: 008b8b93 addi x23,x23,8 + +0000000080002cc4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + clmulh x1, x16, x24 # perform operation + 80002cc4: 0b8830b3 clmulh x1,x16,x24 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc8: 00033383 ld x7,0(x6) + 80002ccc: 00138c63 beq x7,x1,80002ce4 + 80002cd0: 0480546f jal x8,80007d18 + 80002cd4: 80002cc4 .word 0x80002cc4 + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 800123a5 .word 0x800123a5 + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002ce8: 000bb083 ld x1,0(x23) + 80002cec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80002cf0: 000bbb03 ld x22,0(x23) + 80002cf4: 008b8b93 addi x23,x23,8 + +0000000080002cf8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x3, x1, x22 # perform operation + 80002cf8: 0b60b1b3 clmulh x3,x1,x22 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cfc: 00033383 ld x7,0(x6) + 80002d00: 00338c63 beq x7,x3,80002d18 + 80002d04: 0140546f jal x8,80007d18 + 80002d08: 80002cf8 .word 0x80002cf8 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 80012416 .word 0x80012416 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002d1c: 000bb783 ld x15,0(x23) + 80002d20: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x5555555555555555 + 80002d24: 000bbf03 ld x30,0(x23) + 80002d28: 008b8b93 addi x23,x23,8 + +0000000080002d2c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + clmulh x25, x15, x30 # perform operation + 80002d2c: 0be7bcb3 clmulh x25,x15,x30 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d30: 00033383 ld x7,0(x6) + 80002d34: 01938c63 beq x7,x25,80002d4c + 80002d38: 7e10446f jal x8,80007d18 + 80002d3c: 80002d2c .word 0x80002d2c + 80002d40: 00000000 .word 0x00000000 + 80002d44: 80012487 .word 0x80012487 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002d50: 000bb103 ld x2,0(x23) + 80002d54: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x00000000ffffffff + 80002d58: 000bb503 ld x10,0(x23) + 80002d5c: 008b8b93 addi x23,x23,8 + +0000000080002d60 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + clmulh x28, x2, x10 # perform operation + 80002d60: 0aa13e33 clmulh x28,x2,x10 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d64: 00033383 ld x7,0(x6) + 80002d68: 01c38c63 beq x7,x28,80002d80 + 80002d6c: 7ad0446f jal x8,80007d18 + 80002d70: 80002d60 .word 0x80002d60 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 800124f8 .word 0x800124f8 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x7fffffffffffffff + 80002d84: 000bb283 ld x5,0(x23) + 80002d88: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x00000000fffffffe + 80002d8c: 000bbd03 ld x26,0(x23) + 80002d90: 008b8b93 addi x23,x23,8 + +0000000080002d94 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + clmulh x18, x5, x26 # perform operation + 80002d94: 0ba2b933 clmulh x18,x5,x26 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d98: 00033383 ld x7,0(x6) + 80002d9c: 01238c63 beq x7,x18,80002db4 + 80002da0: 7790446f jal x8,80007d18 + 80002da4: 80002d94 .word 0x80002d94 + 80002da8: 00000000 .word 0x00000000 + 80002dac: 80012561 .word 0x80012561 + 80002db0: 00000000 .word 0x00000000 + 80002db4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002db8: 000bbe83 ld x29,0(x23) + 80002dbc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x0000000100000000 + 80002dc0: 000bb203 ld x4,0(x23) + 80002dc4: 008b8b93 addi x23,x23,8 + +0000000080002dc8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + clmulh x27, x29, x4 # perform operation + 80002dc8: 0a4ebdb3 clmulh x27,x29,x4 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dcc: 00033383 ld x7,0(x6) + 80002dd0: 01b38c63 beq x7,x27,80002de8 + 80002dd4: 7450446f jal x8,80007d18 + 80002dd8: 80002dc8 .word 0x80002dc8 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 800125ca .word 0x800125ca + 80002de4: 00000000 .word 0x00000000 + 80002de8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002dec: 000bb903 ld x18,0(x23) + 80002df0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x0000000100000001 + 80002df4: 000bb503 ld x10,0(x23) + 80002df8: 008b8b93 addi x23,x23,8 + +0000000080002dfc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + clmulh x5, x18, x10 # perform operation + 80002dfc: 0aa932b3 clmulh x5,x18,x10 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e00: 00033383 ld x7,0(x6) + 80002e04: 00538c63 beq x7,x5,80002e1c + 80002e08: 7110446f jal x8,80007d18 + 80002e0c: 80002dfc .word 0x80002dfc + 80002e10: 00000000 .word 0x00000000 + 80002e14: 80012634 .word 0x80012634 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002e20: 000bbf83 ld x31,0(x23) + 80002e24: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x0000000000000000 + 80002e28: 000bba83 ld x21,0(x23) + 80002e2c: 008b8b93 addi x23,x23,8 + +0000000080002e30 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + clmulh x30, x31, x21 # perform operation + 80002e30: 0b5fbf33 clmulh x30,x31,x21 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e34: 00033383 ld x7,0(x6) + 80002e38: 01e38c63 beq x7,x30,80002e50 + 80002e3c: 6dd0446f jal x8,80007d18 + 80002e40: 80002e30 .word 0x80002e30 + 80002e44: 00000000 .word 0x00000000 + 80002e48: 8001269e .word 0x8001269e + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002e54: 000bbd03 ld x26,0(x23) + 80002e58: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000000000001 + 80002e5c: 000bba03 ld x20,0(x23) + 80002e60: 008b8b93 addi x23,x23,8 + +0000000080002e64 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + clmulh x12, x26, x20 # perform operation + 80002e64: 0b4d3633 clmulh x12,x26,x20 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e68: 00033383 ld x7,0(x6) + 80002e6c: 00c38c63 beq x7,x12,80002e84 + 80002e70: 6a90446f jal x8,80007d18 + 80002e74: 80002e64 .word 0x80002e64 + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 80012700 .word 0x80012700 + 80002e80: 00000000 .word 0x00000000 + 80002e84: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002e88: 000bb783 ld x15,0(x23) + 80002e8c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x0000000000000002 + 80002e90: 000bbf03 ld x30,0(x23) + 80002e94: 008b8b93 addi x23,x23,8 + +0000000080002e98 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + clmulh x18, x15, x30 # perform operation + 80002e98: 0be7b933 clmulh x18,x15,x30 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e9c: 00033383 ld x7,0(x6) + 80002ea0: 01238c63 beq x7,x18,80002eb8 + 80002ea4: 6750446f jal x8,80007d18 + 80002ea8: 80002e98 .word 0x80002e98 + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 80012762 .word 0x80012762 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002ebc: 000bb783 ld x15,0(x23) + 80002ec0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x8000000000000000 + 80002ec4: 000bbb03 ld x22,0(x23) + 80002ec8: 008b8b93 addi x23,x23,8 + +0000000080002ecc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + clmulh x10, x15, x22 # perform operation + 80002ecc: 0b67b533 clmulh x10,x15,x22 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed0: 00033383 ld x7,0(x6) + 80002ed4: 00a38c63 beq x7,x10,80002eec + 80002ed8: 6410446f jal x8,80007d18 + 80002edc: 80002ecc .word 0x80002ecc + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 800127c4 .word 0x800127c4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002ef0: 000bb103 ld x2,0(x23) + 80002ef4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x8000000000000001 + 80002ef8: 000bb083 ld x1,0(x23) + 80002efc: 008b8b93 addi x23,x23,8 + +0000000080002f00 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + clmulh x28, x2, x1 # perform operation + 80002f00: 0a113e33 clmulh x28,x2,x1 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f04: 00033383 ld x7,0(x6) + 80002f08: 01c38c63 beq x7,x28,80002f20 + 80002f0c: 60d0446f jal x8,80007d18 + 80002f10: 80002f00 .word 0x80002f00 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 80012835 .word 0x80012835 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002f24: 000bbe83 ld x29,0(x23) + 80002f28: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002f2c: 000bb903 ld x18,0(x23) + 80002f30: 008b8b93 addi x23,x23,8 + +0000000080002f34 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + clmulh x2, x29, x18 # perform operation + 80002f34: 0b2eb133 clmulh x2,x29,x18 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f38: 00033383 ld x7,0(x6) + 80002f3c: 00238c63 beq x7,x2,80002f54 + 80002f40: 5d90446f jal x8,80007d18 + 80002f44: 80002f34 .word 0x80002f34 + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 800128a6 .word 0x800128a6 + 80002f50: 00000000 .word 0x00000000 + 80002f54: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002f58: 000bb883 ld x17,0(x23) + 80002f5c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80002f60: 000bbd03 ld x26,0(x23) + 80002f64: 008b8b93 addi x23,x23,8 + +0000000080002f68 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + clmulh x21, x17, x26 # perform operation + 80002f68: 0ba8bab3 clmulh x21,x17,x26 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f6c: 00033383 ld x7,0(x6) + 80002f70: 01538c63 beq x7,x21,80002f88 + 80002f74: 5a50446f jal x8,80007d18 + 80002f78: 80002f68 .word 0x80002f68 + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 80012917 .word 0x80012917 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80002f8c: 000bb503 ld x10,0(x23) + 80002f90: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xffffffffffffffff + 80002f94: 000bbe03 ld x28,0(x23) + 80002f98: 008b8b93 addi x23,x23,8 + +0000000080002f9c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + clmulh x13, x10, x28 # perform operation + 80002f9c: 0bc536b3 clmulh x13,x10,x28 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa0: 00033383 ld x7,0(x6) + 80002fa4: 00d38c63 beq x7,x13,80002fbc + 80002fa8: 5710446f jal x8,80007d18 + 80002fac: 80002f9c .word 0x80002f9c + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 80012988 .word 0x80012988 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80002fc0: 000bb603 ld x12,0(x23) + 80002fc4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xfffffffffffffffe + 80002fc8: 000bba03 ld x20,0(x23) + 80002fcc: 008b8b93 addi x23,x23,8 + +0000000080002fd0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + clmulh x11, x12, x20 # perform operation + 80002fd0: 0b4635b3 clmulh x11,x12,x20 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd4: 00033383 ld x7,0(x6) + 80002fd8: 00b38c63 beq x7,x11,80002ff0 + 80002fdc: 53d0446f jal x8,80007d18 + 80002fe0: 80002fd0 .word 0x80002fd0 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 800129f9 .word 0x800129f9 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80002ff4: 000bb203 ld x4,0(x23) + 80002ff8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80002ffc: 000bbf03 ld x30,0(x23) + 80003000: 008b8b93 addi x23,x23,8 + +0000000080003004 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + clmulh x1, x4, x30 # perform operation + 80003004: 0be230b3 clmulh x1,x4,x30 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003008: 00033383 ld x7,0(x6) + 8000300c: 00138c63 beq x7,x1,80003024 + 80003010: 5090446f jal x8,80007d18 + 80003014: 80003004 .word 0x80003004 + 80003018: 00000000 .word 0x00000000 + 8000301c: 80012a6a .word 0x80012a6a + 80003020: 00000000 .word 0x00000000 + 80003024: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80003028: 000bba83 ld x21,0(x23) + 8000302c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80003030: 000bbe83 ld x29,0(x23) + 80003034: 008b8b93 addi x23,x23,8 + +0000000080003038 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x31, x21, x29 # perform operation + 80003038: 0bdabfb3 clmulh x31,x21,x29 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000303c: 00033383 ld x7,0(x6) + 80003040: 01f38c63 beq x7,x31,80003058 + 80003044: 4d50446f jal x8,80007d18 + 80003048: 80003038 .word 0x80003038 + 8000304c: 00000000 .word 0x00000000 + 80003050: 80012adb .word 0x80012adb + 80003054: 00000000 .word 0x00000000 + 80003058: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x7ffffffffffffffe + 8000305c: 000bb183 ld x3,0(x23) + 80003060: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x5555555555555555 + 80003064: 000bbc83 ld x25,0(x23) + 80003068: 008b8b93 addi x23,x23,8 + +000000008000306c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + clmulh x16, x3, x25 # perform operation + 8000306c: 0b91b833 clmulh x16,x3,x25 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003070: 00033383 ld x7,0(x6) + 80003074: 01038c63 beq x7,x16,8000308c + 80003078: 4a10446f jal x8,80007d18 + 8000307c: 8000306c .word 0x8000306c + 80003080: 00000000 .word 0x00000000 + 80003084: 80012b4c .word 0x80012b4c + 80003088: 00000000 .word 0x00000000 + 8000308c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80003090: 000bb183 ld x3,0(x23) + 80003094: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x00000000ffffffff + 80003098: 000bb903 ld x18,0(x23) + 8000309c: 008b8b93 addi x23,x23,8 + +00000000800030a0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + clmulh x27, x3, x18 # perform operation + 800030a0: 0b21bdb3 clmulh x27,x3,x18 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a4: 00033383 ld x7,0(x6) + 800030a8: 01b38c63 beq x7,x27,800030c0 + 800030ac: 46d0446f jal x8,80007d18 + 800030b0: 800030a0 .word 0x800030a0 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 80012bbd .word 0x80012bbd + 800030bc: 00000000 .word 0x00000000 + 800030c0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x7ffffffffffffffe + 800030c4: 000bb283 ld x5,0(x23) + 800030c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x00000000fffffffe + 800030cc: 000bb783 ld x15,0(x23) + 800030d0: 008b8b93 addi x23,x23,8 + +00000000800030d4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + clmulh x14, x5, x15 # perform operation + 800030d4: 0af2b733 clmulh x14,x5,x15 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d8: 00033383 ld x7,0(x6) + 800030dc: 00e38c63 beq x7,x14,800030f4 + 800030e0: 4390446f jal x8,80007d18 + 800030e4: 800030d4 .word 0x800030d4 + 800030e8: 00000000 .word 0x00000000 + 800030ec: 80012c26 .word 0x80012c26 + 800030f0: 00000000 .word 0x00000000 + 800030f4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x7ffffffffffffffe + 800030f8: 000bb903 ld x18,0(x23) + 800030fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x0000000100000000 + 80003100: 000bbf83 ld x31,0(x23) + 80003104: 008b8b93 addi x23,x23,8 + +0000000080003108 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + clmulh x14, x18, x31 # perform operation + 80003108: 0bf93733 clmulh x14,x18,x31 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 8000310c: 00033383 ld x7,0(x6) + 80003110: 00e38c63 beq x7,x14,80003128 + 80003114: 4050446f jal x8,80007d18 + 80003118: 80003108 .word 0x80003108 + 8000311c: 00000000 .word 0x00000000 + 80003120: 80012c8f .word 0x80012c8f + 80003124: 00000000 .word 0x00000000 + 80003128: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x7ffffffffffffffe + 8000312c: 000bb603 ld x12,0(x23) + 80003130: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x0000000100000001 + 80003134: 000bbc83 ld x25,0(x23) + 80003138: 008b8b93 addi x23,x23,8 + +000000008000313c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + clmulh x9, x12, x25 # perform operation + 8000313c: 0b9634b3 clmulh x9,x12,x25 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003140: 00033383 ld x7,0(x6) + 80003144: 00938c63 beq x7,x9,8000315c + 80003148: 3d10446f jal x8,80007d18 + 8000314c: 8000313c .word 0x8000313c + 80003150: 00000000 .word 0x00000000 + 80003154: 80012cf9 .word 0x80012cf9 + 80003158: 00000000 .word 0x00000000 + 8000315c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xffffffffffffffff + 80003160: 000bb603 ld x12,0(x23) + 80003164: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x0000000000000000 + 80003168: 000bbf03 ld x30,0(x23) + 8000316c: 008b8b93 addi x23,x23,8 + +0000000080003170 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + clmulh x29, x12, x30 # perform operation + 80003170: 0be63eb3 clmulh x29,x12,x30 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003174: 00033383 ld x7,0(x6) + 80003178: 01d38c63 beq x7,x29,80003190 + 8000317c: 39d0446f jal x8,80007d18 + 80003180: 80003170 .word 0x80003170 + 80003184: 00000000 .word 0x00000000 + 80003188: 80012d63 .word 0x80012d63 + 8000318c: 00000000 .word 0x00000000 + 80003190: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xffffffffffffffff + 80003194: 000bb983 ld x19,0(x23) + 80003198: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x0000000000000001 + 8000319c: 000bbf83 ld x31,0(x23) + 800031a0: 008b8b93 addi x23,x23,8 + +00000000800031a4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + clmulh x22, x19, x31 # perform operation + 800031a4: 0bf9bb33 clmulh x22,x19,x31 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a8: 00033383 ld x7,0(x6) + 800031ac: 01638c63 beq x7,x22,800031c4 + 800031b0: 3690446f jal x8,80007d18 + 800031b4: 800031a4 .word 0x800031a4 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 80012dc5 .word 0x80012dc5 + 800031c0: 00000000 .word 0x00000000 + 800031c4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xffffffffffffffff + 800031c8: 000bb103 ld x2,0(x23) + 800031cc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x0000000000000002 + 800031d0: 000bb483 ld x9,0(x23) + 800031d4: 008b8b93 addi x23,x23,8 + +00000000800031d8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + clmulh x25, x2, x9 # perform operation + 800031d8: 0a913cb3 clmulh x25,x2,x9 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031dc: 00033383 ld x7,0(x6) + 800031e0: 01938c63 beq x7,x25,800031f8 + 800031e4: 3350446f jal x8,80007d18 + 800031e8: 800031d8 .word 0x800031d8 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 80012e27 .word 0x80012e27 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xffffffffffffffff + 800031fc: 000bbc03 ld x24,0(x23) + 80003200: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x8000000000000000 + 80003204: 000bbd03 ld x26,0(x23) + 80003208: 008b8b93 addi x23,x23,8 + +000000008000320c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + clmulh x5, x24, x26 # perform operation + 8000320c: 0bac32b3 clmulh x5,x24,x26 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003210: 00033383 ld x7,0(x6) + 80003214: 00538c63 beq x7,x5,8000322c + 80003218: 3010446f jal x8,80007d18 + 8000321c: 8000320c .word 0x8000320c + 80003220: 00000000 .word 0x00000000 + 80003224: 80012e89 .word 0x80012e89 + 80003228: 00000000 .word 0x00000000 + 8000322c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xffffffffffffffff + 80003230: 000bb103 ld x2,0(x23) + 80003234: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x8000000000000001 + 80003238: 000bb603 ld x12,0(x23) + 8000323c: 008b8b93 addi x23,x23,8 + +0000000080003240 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + clmulh x18, x2, x12 # perform operation + 80003240: 0ac13933 clmulh x18,x2,x12 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003244: 00033383 ld x7,0(x6) + 80003248: 01238c63 beq x7,x18,80003260 + 8000324c: 2cd0446f jal x8,80007d18 + 80003250: 80003240 .word 0x80003240 + 80003254: 00000000 .word 0x00000000 + 80003258: 80012efa .word 0x80012efa + 8000325c: 00000000 .word 0x00000000 + 80003260: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xffffffffffffffff + 80003264: 000bbf83 ld x31,0(x23) + 80003268: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x7fffffffffffffff + 8000326c: 000bb103 ld x2,0(x23) + 80003270: 008b8b93 addi x23,x23,8 + +0000000080003274 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + clmulh x4, x31, x2 # perform operation + 80003274: 0a2fb233 clmulh x4,x31,x2 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003278: 00033383 ld x7,0(x6) + 8000327c: 00438c63 beq x7,x4,80003294 + 80003280: 2990446f jal x8,80007d18 + 80003284: 80003274 .word 0x80003274 + 80003288: 00000000 .word 0x00000000 + 8000328c: 80012f6b .word 0x80012f6b + 80003290: 00000000 .word 0x00000000 + 80003294: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xffffffffffffffff + 80003298: 000bb483 ld x9,0(x23) + 8000329c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x7ffffffffffffffe + 800032a0: 000bb503 ld x10,0(x23) + 800032a4: 008b8b93 addi x23,x23,8 + +00000000800032a8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + clmulh x1, x9, x10 # perform operation + 800032a8: 0aa4b0b3 clmulh x1,x9,x10 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032ac: 00033383 ld x7,0(x6) + 800032b0: 00138c63 beq x7,x1,800032c8 + 800032b4: 2650446f jal x8,80007d18 + 800032b8: 800032a8 .word 0x800032a8 + 800032bc: 00000000 .word 0x00000000 + 800032c0: 80012fdc .word 0x80012fdc + 800032c4: 00000000 .word 0x00000000 + 800032c8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xffffffffffffffff + 800032cc: 000bb703 ld x14,0(x23) + 800032d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xffffffffffffffff + 800032d4: 000bba03 ld x20,0(x23) + 800032d8: 008b8b93 addi x23,x23,8 + +00000000800032dc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + clmulh x12, x14, x20 # perform operation + 800032dc: 0b473633 clmulh x12,x14,x20 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e0: 00033383 ld x7,0(x6) + 800032e4: 00c38c63 beq x7,x12,800032fc + 800032e8: 2310446f jal x8,80007d18 + 800032ec: 800032dc .word 0x800032dc + 800032f0: 00000000 .word 0x00000000 + 800032f4: 8001304d .word 0x8001304d + 800032f8: 00000000 .word 0x00000000 + 800032fc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xffffffffffffffff + 80003300: 000bb503 ld x10,0(x23) + 80003304: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xfffffffffffffffe + 80003308: 000bb983 ld x19,0(x23) + 8000330c: 008b8b93 addi x23,x23,8 + +0000000080003310 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + clmulh x24, x10, x19 # perform operation + 80003310: 0b353c33 clmulh x24,x10,x19 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003314: 00033383 ld x7,0(x6) + 80003318: 01838c63 beq x7,x24,80003330 + 8000331c: 1fd0446f jal x8,80007d18 + 80003320: 80003310 .word 0x80003310 + 80003324: 00000000 .word 0x00000000 + 80003328: 800130be .word 0x800130be + 8000332c: 00000000 .word 0x00000000 + 80003330: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xffffffffffffffff + 80003334: 000bb703 ld x14,0(x23) + 80003338: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 8000333c: 000bbf03 ld x30,0(x23) + 80003340: 008b8b93 addi x23,x23,8 + +0000000080003344 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + clmulh x16, x14, x30 # perform operation + 80003344: 0be73833 clmulh x16,x14,x30 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003348: 00033383 ld x7,0(x6) + 8000334c: 01038c63 beq x7,x16,80003364 + 80003350: 1c90446f jal x8,80007d18 + 80003354: 80003344 .word 0x80003344 + 80003358: 00000000 .word 0x00000000 + 8000335c: 8001312f .word 0x8001312f + 80003360: 00000000 .word 0x00000000 + 80003364: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xffffffffffffffff + 80003368: 000bb503 ld x10,0(x23) + 8000336c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80003370: 000bb803 ld x16,0(x23) + 80003374: 008b8b93 addi x23,x23,8 + +0000000080003378 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x20, x10, x16 # perform operation + 80003378: 0b053a33 clmulh x20,x10,x16 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000337c: 00033383 ld x7,0(x6) + 80003380: 01438c63 beq x7,x20,80003398 + 80003384: 1950446f jal x8,80007d18 + 80003388: 80003378 .word 0x80003378 + 8000338c: 00000000 .word 0x00000000 + 80003390: 800131a0 .word 0x800131a0 + 80003394: 00000000 .word 0x00000000 + 80003398: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xffffffffffffffff + 8000339c: 000bb183 ld x3,0(x23) + 800033a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x5555555555555555 + 800033a4: 000bbd83 ld x27,0(x23) + 800033a8: 008b8b93 addi x23,x23,8 + +00000000800033ac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + clmulh x4, x3, x27 # perform operation + 800033ac: 0bb1b233 clmulh x4,x3,x27 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b0: 00033383 ld x7,0(x6) + 800033b4: 00438c63 beq x7,x4,800033cc + 800033b8: 1610446f jal x8,80007d18 + 800033bc: 800033ac .word 0x800033ac + 800033c0: 00000000 .word 0x00000000 + 800033c4: 80013211 .word 0x80013211 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0xffffffffffffffff + 800033d0: 000bb083 ld x1,0(x23) + 800033d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x00000000ffffffff + 800033d8: 000bb783 ld x15,0(x23) + 800033dc: 008b8b93 addi x23,x23,8 + +00000000800033e0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + clmulh x27, x1, x15 # perform operation + 800033e0: 0af0bdb3 clmulh x27,x1,x15 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e4: 00033383 ld x7,0(x6) + 800033e8: 01b38c63 beq x7,x27,80003400 + 800033ec: 12d0446f jal x8,80007d18 + 800033f0: 800033e0 .word 0x800033e0 + 800033f4: 00000000 .word 0x00000000 + 800033f8: 80013282 .word 0x80013282 + 800033fc: 00000000 .word 0x00000000 + 80003400: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xffffffffffffffff + 80003404: 000bb203 ld x4,0(x23) + 80003408: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x00000000fffffffe + 8000340c: 000bb703 ld x14,0(x23) + 80003410: 008b8b93 addi x23,x23,8 + +0000000080003414 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + clmulh x13, x4, x14 # perform operation + 80003414: 0ae236b3 clmulh x13,x4,x14 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003418: 00033383 ld x7,0(x6) + 8000341c: 00d38c63 beq x7,x13,80003434 + 80003420: 0f90446f jal x8,80007d18 + 80003424: 80003414 .word 0x80003414 + 80003428: 00000000 .word 0x00000000 + 8000342c: 800132eb .word 0x800132eb + 80003430: 00000000 .word 0x00000000 + 80003434: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xffffffffffffffff + 80003438: 000bba03 ld x20,0(x23) + 8000343c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x0000000100000000 + 80003440: 000bb183 ld x3,0(x23) + 80003444: 008b8b93 addi x23,x23,8 + +0000000080003448 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + clmulh x13, x20, x3 # perform operation + 80003448: 0a3a36b3 clmulh x13,x20,x3 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 8000344c: 00033383 ld x7,0(x6) + 80003450: 00d38c63 beq x7,x13,80003468 + 80003454: 0c50446f jal x8,80007d18 + 80003458: 80003448 .word 0x80003448 + 8000345c: 00000000 .word 0x00000000 + 80003460: 80013354 .word 0x80013354 + 80003464: 00000000 .word 0x00000000 + 80003468: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xffffffffffffffff + 8000346c: 000bbe03 ld x28,0(x23) + 80003470: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x0000000100000001 + 80003474: 000bb883 ld x17,0(x23) + 80003478: 008b8b93 addi x23,x23,8 + +000000008000347c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + clmulh x10, x28, x17 # perform operation + 8000347c: 0b1e3533 clmulh x10,x28,x17 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003480: 00033383 ld x7,0(x6) + 80003484: 00a38c63 beq x7,x10,8000349c + 80003488: 0910446f jal x8,80007d18 + 8000348c: 8000347c .word 0x8000347c + 80003490: 00000000 .word 0x00000000 + 80003494: 800133be .word 0x800133be + 80003498: 00000000 .word 0x00000000 + 8000349c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xfffffffffffffffe + 800034a0: 000bbd83 ld x27,0(x23) + 800034a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x0000000000000000 + 800034a8: 000bb183 ld x3,0(x23) + 800034ac: 008b8b93 addi x23,x23,8 + +00000000800034b0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + clmulh x16, x27, x3 # perform operation + 800034b0: 0a3db833 clmulh x16,x27,x3 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b4: 00033383 ld x7,0(x6) + 800034b8: 01038c63 beq x7,x16,800034d0 + 800034bc: 05d0446f jal x8,80007d18 + 800034c0: 800034b0 .word 0x800034b0 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 80013428 .word 0x80013428 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0xfffffffffffffffe + 800034d4: 000bb283 ld x5,0(x23) + 800034d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x0000000000000001 + 800034dc: 000bb803 ld x16,0(x23) + 800034e0: 008b8b93 addi x23,x23,8 + +00000000800034e4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + clmulh x14, x5, x16 # perform operation + 800034e4: 0b02b733 clmulh x14,x5,x16 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e8: 00033383 ld x7,0(x6) + 800034ec: 00e38c63 beq x7,x14,80003504 + 800034f0: 0290446f jal x8,80007d18 + 800034f4: 800034e4 .word 0x800034e4 + 800034f8: 00000000 .word 0x00000000 + 800034fc: 8001348a .word 0x8001348a + 80003500: 00000000 .word 0x00000000 + 80003504: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003508: 000bbe83 ld x29,0(x23) + 8000350c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x0000000000000002 + 80003510: 000bb103 ld x2,0(x23) + 80003514: 008b8b93 addi x23,x23,8 + +0000000080003518 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + clmulh x14, x29, x2 # perform operation + 80003518: 0a2eb733 clmulh x14,x29,x2 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 8000351c: 00033383 ld x7,0(x6) + 80003520: 00e38c63 beq x7,x14,80003538 + 80003524: 7f40446f jal x8,80007d18 + 80003528: 80003518 .word 0x80003518 + 8000352c: 00000000 .word 0x00000000 + 80003530: 800134ec .word 0x800134ec + 80003534: 00000000 .word 0x00000000 + 80003538: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xfffffffffffffffe + 8000353c: 000bba03 ld x20,0(x23) + 80003540: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x8000000000000000 + 80003544: 000bbd83 ld x27,0(x23) + 80003548: 008b8b93 addi x23,x23,8 + +000000008000354c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + clmulh x18, x20, x27 # perform operation + 8000354c: 0bba3933 clmulh x18,x20,x27 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003550: 00033383 ld x7,0(x6) + 80003554: 01238c63 beq x7,x18,8000356c + 80003558: 7c00446f jal x8,80007d18 + 8000355c: 8000354c .word 0x8000354c + 80003560: 00000000 .word 0x00000000 + 80003564: 8001354e .word 0x8001354e + 80003568: 00000000 .word 0x00000000 + 8000356c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xfffffffffffffffe + 80003570: 000bb883 ld x17,0(x23) + 80003574: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x8000000000000001 + 80003578: 000bba83 ld x21,0(x23) + 8000357c: 008b8b93 addi x23,x23,8 + +0000000080003580 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + clmulh x22, x17, x21 # perform operation + 80003580: 0b58bb33 clmulh x22,x17,x21 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003584: 00033383 ld x7,0(x6) + 80003588: 01638c63 beq x7,x22,800035a0 + 8000358c: 78c0446f jal x8,80007d18 + 80003590: 80003580 .word 0x80003580 + 80003594: 00000000 .word 0x00000000 + 80003598: 800135bf .word 0x800135bf + 8000359c: 00000000 .word 0x00000000 + 800035a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xfffffffffffffffe + 800035a4: 000bbd83 ld x27,0(x23) + 800035a8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x7fffffffffffffff + 800035ac: 000bba83 ld x21,0(x23) + 800035b0: 008b8b93 addi x23,x23,8 + +00000000800035b4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + clmulh x20, x27, x21 # perform operation + 800035b4: 0b5dba33 clmulh x20,x27,x21 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b8: 00033383 ld x7,0(x6) + 800035bc: 01438c63 beq x7,x20,800035d4 + 800035c0: 7580446f jal x8,80007d18 + 800035c4: 800035b4 .word 0x800035b4 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 80013630 .word 0x80013630 + 800035d0: 00000000 .word 0x00000000 + 800035d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xfffffffffffffffe + 800035d8: 000bba83 ld x21,0(x23) + 800035dc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x7ffffffffffffffe + 800035e0: 000bb503 ld x10,0(x23) + 800035e4: 008b8b93 addi x23,x23,8 + +00000000800035e8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + clmulh x25, x21, x10 # perform operation + 800035e8: 0aaabcb3 clmulh x25,x21,x10 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035ec: 00033383 ld x7,0(x6) + 800035f0: 01938c63 beq x7,x25,80003608 + 800035f4: 7240446f jal x8,80007d18 + 800035f8: 800035e8 .word 0x800035e8 + 800035fc: 00000000 .word 0x00000000 + 80003600: 800136a1 .word 0x800136a1 + 80003604: 00000000 .word 0x00000000 + 80003608: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xfffffffffffffffe + 8000360c: 000bb903 ld x18,0(x23) + 80003610: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0xffffffffffffffff + 80003614: 000bbd83 ld x27,0(x23) + 80003618: 008b8b93 addi x23,x23,8 + +000000008000361c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + clmulh x4, x18, x27 # perform operation + 8000361c: 0bb93233 clmulh x4,x18,x27 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003620: 00033383 ld x7,0(x6) + 80003624: 00438c63 beq x7,x4,8000363c + 80003628: 6f00446f jal x8,80007d18 + 8000362c: 8000361c .word 0x8000361c + 80003630: 00000000 .word 0x00000000 + 80003634: 80013712 .word 0x80013712 + 80003638: 00000000 .word 0x00000000 + 8000363c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003640: 000bbd03 ld x26,0(x23) + 80003644: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xfffffffffffffffe + 80003648: 000bb083 ld x1,0(x23) + 8000364c: 008b8b93 addi x23,x23,8 + +0000000080003650 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + clmulh x11, x26, x1 # perform operation + 80003650: 0a1d35b3 clmulh x11,x26,x1 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003654: 00033383 ld x7,0(x6) + 80003658: 00b38c63 beq x7,x11,80003670 + 8000365c: 6bc0446f jal x8,80007d18 + 80003660: 80003650 .word 0x80003650 + 80003664: 00000000 .word 0x00000000 + 80003668: 80013783 .word 0x80013783 + 8000366c: 00000000 .word 0x00000000 + 80003670: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003674: 000bbb03 ld x22,0(x23) + 80003678: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 8000367c: 000bb683 ld x13,0(x23) + 80003680: 008b8b93 addi x23,x23,8 + +0000000080003684 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + clmulh x24, x22, x13 # perform operation + 80003684: 0adb3c33 clmulh x24,x22,x13 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003688: 00033383 ld x7,0(x6) + 8000368c: 01838c63 beq x7,x24,800036a4 + 80003690: 6880446f jal x8,80007d18 + 80003694: 80003684 .word 0x80003684 + 80003698: 00000000 .word 0x00000000 + 8000369c: 800137f4 .word 0x800137f4 + 800036a0: 00000000 .word 0x00000000 + 800036a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0xfffffffffffffffe + 800036a8: 000bb283 ld x5,0(x23) + 800036ac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xaaaaaaaaaaaaaaaa + 800036b0: 000bb203 ld x4,0(x23) + 800036b4: 008b8b93 addi x23,x23,8 + +00000000800036b8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x29, x5, x4 # perform operation + 800036b8: 0a42beb3 clmulh x29,x5,x4 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036bc: 00033383 ld x7,0(x6) + 800036c0: 01d38c63 beq x7,x29,800036d8 + 800036c4: 6540446f jal x8,80007d18 + 800036c8: 800036b8 .word 0x800036b8 + 800036cc: 00000000 .word 0x00000000 + 800036d0: 80013865 .word 0x80013865 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xfffffffffffffffe + 800036dc: 000bbd03 ld x26,0(x23) + 800036e0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x5555555555555555 + 800036e4: 000bb183 ld x3,0(x23) + 800036e8: 008b8b93 addi x23,x23,8 + +00000000800036ec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + clmulh x10, x26, x3 # perform operation + 800036ec: 0a3d3533 clmulh x10,x26,x3 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f0: 00033383 ld x7,0(x6) + 800036f4: 00a38c63 beq x7,x10,8000370c + 800036f8: 6200446f jal x8,80007d18 + 800036fc: 800036ec .word 0x800036ec + 80003700: 00000000 .word 0x00000000 + 80003704: 800138d6 .word 0x800138d6 + 80003708: 00000000 .word 0x00000000 + 8000370c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xfffffffffffffffe + 80003710: 000bb803 ld x16,0(x23) + 80003714: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x00000000ffffffff + 80003718: 000bb983 ld x19,0(x23) + 8000371c: 008b8b93 addi x23,x23,8 + +0000000080003720 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + clmulh x1, x16, x19 # perform operation + 80003720: 0b3830b3 clmulh x1,x16,x19 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003724: 00033383 ld x7,0(x6) + 80003728: 00138c63 beq x7,x1,80003740 + 8000372c: 5ec0446f jal x8,80007d18 + 80003730: 80003720 .word 0x80003720 + 80003734: 00000000 .word 0x00000000 + 80003738: 80013947 .word 0x80013947 + 8000373c: 00000000 .word 0x00000000 + 80003740: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xfffffffffffffffe + 80003744: 000bb603 ld x12,0(x23) + 80003748: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x00000000fffffffe + 8000374c: 000bb903 ld x18,0(x23) + 80003750: 008b8b93 addi x23,x23,8 + +0000000080003754 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + clmulh x10, x12, x18 # perform operation + 80003754: 0b263533 clmulh x10,x12,x18 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003758: 00033383 ld x7,0(x6) + 8000375c: 00a38c63 beq x7,x10,80003774 + 80003760: 5b80446f jal x8,80007d18 + 80003764: 80003754 .word 0x80003754 + 80003768: 00000000 .word 0x00000000 + 8000376c: 800139b0 .word 0x800139b0 + 80003770: 00000000 .word 0x00000000 + 80003774: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003778: 000bb483 ld x9,0(x23) + 8000377c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x0000000100000000 + 80003780: 000bbe03 ld x28,0(x23) + 80003784: 008b8b93 addi x23,x23,8 + +0000000080003788 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + clmulh x10, x9, x28 # perform operation + 80003788: 0bc4b533 clmulh x10,x9,x28 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 8000378c: 00033383 ld x7,0(x6) + 80003790: 00a38c63 beq x7,x10,800037a8 + 80003794: 5840446f jal x8,80007d18 + 80003798: 80003788 .word 0x80003788 + 8000379c: 00000000 .word 0x00000000 + 800037a0: 80013a19 .word 0x80013a19 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xfffffffffffffffe + 800037ac: 000bb503 ld x10,0(x23) + 800037b0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x0000000100000001 + 800037b4: 000bb803 ld x16,0(x23) + 800037b8: 008b8b93 addi x23,x23,8 + +00000000800037bc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + clmulh x25, x10, x16 # perform operation + 800037bc: 0b053cb3 clmulh x25,x10,x16 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c0: 00033383 ld x7,0(x6) + 800037c4: 01938c63 beq x7,x25,800037dc + 800037c8: 5500446f jal x8,80007d18 + 800037cc: 800037bc .word 0x800037bc + 800037d0: 00000000 .word 0x00000000 + 800037d4: 80013a83 .word 0x80013a83 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 800037e0: 000bb903 ld x18,0(x23) + 800037e4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x0000000000000000 + 800037e8: 000bbd03 ld x26,0(x23) + 800037ec: 008b8b93 addi x23,x23,8 + +00000000800037f0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + clmulh x16, x18, x26 # perform operation + 800037f0: 0ba93833 clmulh x16,x18,x26 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f4: 00033383 ld x7,0(x6) + 800037f8: 01038c63 beq x7,x16,80003810 + 800037fc: 51c0446f jal x8,80007d18 + 80003800: 800037f0 .word 0x800037f0 + 80003804: 00000000 .word 0x00000000 + 80003808: 80013aed .word 0x80013aed + 8000380c: 00000000 .word 0x00000000 + 80003810: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003814: 000bb583 ld x11,0(x23) + 80003818: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x0000000000000001 + 8000381c: 000bbd03 ld x26,0(x23) + 80003820: 008b8b93 addi x23,x23,8 + +0000000080003824 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + clmulh x21, x11, x26 # perform operation + 80003824: 0ba5bab3 clmulh x21,x11,x26 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003828: 00033383 ld x7,0(x6) + 8000382c: 01538c63 beq x7,x21,80003844 + 80003830: 4e80446f jal x8,80007d18 + 80003834: 80003824 .word 0x80003824 + 80003838: 00000000 .word 0x00000000 + 8000383c: 80013b4f .word 0x80013b4f + 80003840: 00000000 .word 0x00000000 + 80003844: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 80003848: 000bbd03 ld x26,0(x23) + 8000384c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x0000000000000002 + 80003850: 000bb703 ld x14,0(x23) + 80003854: 008b8b93 addi x23,x23,8 + +0000000080003858 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + clmulh x17, x26, x14 # perform operation + 80003858: 0aed38b3 clmulh x17,x26,x14 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 8000385c: 00033383 ld x7,0(x6) + 80003860: 01138c63 beq x7,x17,80003878 + 80003864: 4b40446f jal x8,80007d18 + 80003868: 80003858 .word 0x80003858 + 8000386c: 00000000 .word 0x00000000 + 80003870: 80013bb1 .word 0x80013bb1 + 80003874: 00000000 .word 0x00000000 + 80003878: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 8000387c: 000bb583 ld x11,0(x23) + 80003880: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x8000000000000000 + 80003884: 000bb703 ld x14,0(x23) + 80003888: 008b8b93 addi x23,x23,8 + +000000008000388c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + clmulh x29, x11, x14 # perform operation + 8000388c: 0ae5beb3 clmulh x29,x11,x14 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003890: 00033383 ld x7,0(x6) + 80003894: 01d38c63 beq x7,x29,800038ac + 80003898: 4800446f jal x8,80007d18 + 8000389c: 8000388c .word 0x8000388c + 800038a0: 00000000 .word 0x00000000 + 800038a4: 80013c13 .word 0x80013c13 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 800038b0: 000bb783 ld x15,0(x23) + 800038b4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x8000000000000001 + 800038b8: 000bb483 ld x9,0(x23) + 800038bc: 008b8b93 addi x23,x23,8 + +00000000800038c0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + clmulh x31, x15, x9 # perform operation + 800038c0: 0a97bfb3 clmulh x31,x15,x9 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c4: 00033383 ld x7,0(x6) + 800038c8: 01f38c63 beq x7,x31,800038e0 + 800038cc: 44c0446f jal x8,80007d18 + 800038d0: 800038c0 .word 0x800038c0 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 80013c84 .word 0x80013c84 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 800038e4: 000bb903 ld x18,0(x23) + 800038e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x7fffffffffffffff + 800038ec: 000bbd83 ld x27,0(x23) + 800038f0: 008b8b93 addi x23,x23,8 + +00000000800038f4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + clmulh x3, x18, x27 # perform operation + 800038f4: 0bb931b3 clmulh x3,x18,x27 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f8: 00033383 ld x7,0(x6) + 800038fc: 00338c63 beq x7,x3,80003914 + 80003900: 4180446f jal x8,80007d18 + 80003904: 800038f4 .word 0x800038f4 + 80003908: 00000000 .word 0x00000000 + 8000390c: 80013cf5 .word 0x80013cf5 + 80003910: 00000000 .word 0x00000000 + 80003914: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80003918: 000bb083 ld x1,0(x23) + 8000391c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x7ffffffffffffffe + 80003920: 000bb603 ld x12,0(x23) + 80003924: 008b8b93 addi x23,x23,8 + +0000000080003928 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + clmulh x15, x1, x12 # perform operation + 80003928: 0ac0b7b3 clmulh x15,x1,x12 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 8000392c: 00033383 ld x7,0(x6) + 80003930: 00f38c63 beq x7,x15,80003948 + 80003934: 3e40446f jal x8,80007d18 + 80003938: 80003928 .word 0x80003928 + 8000393c: 00000000 .word 0x00000000 + 80003940: 80013d66 .word 0x80013d66 + 80003944: 00000000 .word 0x00000000 + 80003948: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 8000394c: 000bb903 ld x18,0(x23) + 80003950: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xffffffffffffffff + 80003954: 000bb083 ld x1,0(x23) + 80003958: 008b8b93 addi x23,x23,8 + +000000008000395c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + clmulh x29, x18, x1 # perform operation + 8000395c: 0a193eb3 clmulh x29,x18,x1 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003960: 00033383 ld x7,0(x6) + 80003964: 01d38c63 beq x7,x29,8000397c + 80003968: 3b00446f jal x8,80007d18 + 8000396c: 8000395c .word 0x8000395c + 80003970: 00000000 .word 0x00000000 + 80003974: 80013dd7 .word 0x80013dd7 + 80003978: 00000000 .word 0x00000000 + 8000397c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003980: 000bb103 ld x2,0(x23) + 80003984: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xfffffffffffffffe + 80003988: 000bb083 ld x1,0(x23) + 8000398c: 008b8b93 addi x23,x23,8 + +0000000080003990 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + clmulh x4, x2, x1 # perform operation + 80003990: 0a113233 clmulh x4,x2,x1 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003994: 00033383 ld x7,0(x6) + 80003998: 00438c63 beq x7,x4,800039b0 + 8000399c: 37c0446f jal x8,80007d18 + 800039a0: 80003990 .word 0x80003990 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 80013e48 .word 0x80013e48 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 800039b4: 000bba03 ld x20,0(x23) + 800039b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 800039bc: 000bb983 ld x19,0(x23) + 800039c0: 008b8b93 addi x23,x23,8 + +00000000800039c4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + clmulh x15, x20, x19 # perform operation + 800039c4: 0b3a37b3 clmulh x15,x20,x19 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c8: 00033383 ld x7,0(x6) + 800039cc: 00f38c63 beq x7,x15,800039e4 + 800039d0: 3480446f jal x8,80007d18 + 800039d4: 800039c4 .word 0x800039c4 + 800039d8: 00000000 .word 0x00000000 + 800039dc: 80013eb9 .word 0x80013eb9 + 800039e0: 00000000 .word 0x00000000 + 800039e4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800039e8: 000bb983 ld x19,0(x23) + 800039ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 800039f0: 000bbe03 ld x28,0(x23) + 800039f4: 008b8b93 addi x23,x23,8 + +00000000800039f8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x9, x19, x28 # perform operation + 800039f8: 0bc9b4b3 clmulh x9,x19,x28 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039fc: 00033383 ld x7,0(x6) + 80003a00: 00938c63 beq x7,x9,80003a18 + 80003a04: 3140446f jal x8,80007d18 + 80003a08: 800039f8 .word 0x800039f8 + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 80013f2a .word 0x80013f2a + 80003a14: 00000000 .word 0x00000000 + 80003a18: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 80003a1c: 000bb203 ld x4,0(x23) + 80003a20: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x5555555555555555 + 80003a24: 000bb803 ld x16,0(x23) + 80003a28: 008b8b93 addi x23,x23,8 + +0000000080003a2c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + clmulh x1, x4, x16 # perform operation + 80003a2c: 0b0230b3 clmulh x1,x4,x16 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a30: 00033383 ld x7,0(x6) + 80003a34: 00138c63 beq x7,x1,80003a4c + 80003a38: 2e00446f jal x8,80007d18 + 80003a3c: 80003a2c .word 0x80003a2c + 80003a40: 00000000 .word 0x00000000 + 80003a44: 80013f9b .word 0x80013f9b + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003a50: 000bbc03 ld x24,0(x23) + 80003a54: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x00000000ffffffff + 80003a58: 000bbc83 ld x25,0(x23) + 80003a5c: 008b8b93 addi x23,x23,8 + +0000000080003a60 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + clmulh x31, x24, x25 # perform operation + 80003a60: 0b9c3fb3 clmulh x31,x24,x25 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a64: 00033383 ld x7,0(x6) + 80003a68: 01f38c63 beq x7,x31,80003a80 + 80003a6c: 2ac0446f jal x8,80007d18 + 80003a70: 80003a60 .word 0x80003a60 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 8001400c .word 0x8001400c + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80003a84: 000bba03 ld x20,0(x23) + 80003a88: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x00000000fffffffe + 80003a8c: 000bbe03 ld x28,0(x23) + 80003a90: 008b8b93 addi x23,x23,8 + +0000000080003a94 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + clmulh x4, x20, x28 # perform operation + 80003a94: 0bca3233 clmulh x4,x20,x28 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a98: 00033383 ld x7,0(x6) + 80003a9c: 00438c63 beq x7,x4,80003ab4 + 80003aa0: 2780446f jal x8,80007d18 + 80003aa4: 80003a94 .word 0x80003a94 + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 80014075 .word 0x80014075 + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003ab8: 000bb883 ld x17,0(x23) + 80003abc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000100000000 + 80003ac0: 000bba03 ld x20,0(x23) + 80003ac4: 008b8b93 addi x23,x23,8 + +0000000080003ac8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + clmulh x13, x17, x20 # perform operation + 80003ac8: 0b48b6b3 clmulh x13,x17,x20 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003acc: 00033383 ld x7,0(x6) + 80003ad0: 00d38c63 beq x7,x13,80003ae8 + 80003ad4: 2440446f jal x8,80007d18 + 80003ad8: 80003ac8 .word 0x80003ac8 + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 800140de .word 0x800140de + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003aec: 000bb583 ld x11,0(x23) + 80003af0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000100000001 + 80003af4: 000bba03 ld x20,0(x23) + 80003af8: 008b8b93 addi x23,x23,8 + +0000000080003afc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + clmulh x27, x11, x20 # perform operation + 80003afc: 0b45bdb3 clmulh x27,x11,x20 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b00: 00033383 ld x7,0(x6) + 80003b04: 01b38c63 beq x7,x27,80003b1c + 80003b08: 2100446f jal x8,80007d18 + 80003b0c: 80003afc .word 0x80003afc + 80003b10: 00000000 .word 0x00000000 + 80003b14: 80014148 .word 0x80014148 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003b20: 000bbc03 ld x24,0(x23) + 80003b24: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x0000000000000000 + 80003b28: 000bb103 ld x2,0(x23) + 80003b2c: 008b8b93 addi x23,x23,8 + +0000000080003b30 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + clmulh x1, x24, x2 # perform operation + 80003b30: 0a2c30b3 clmulh x1,x24,x2 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b34: 00033383 ld x7,0(x6) + 80003b38: 00138c63 beq x7,x1,80003b50 + 80003b3c: 1dc0446f jal x8,80007d18 + 80003b40: 80003b30 .word 0x80003b30 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 800141b2 .word 0x800141b2 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b54: 000bb703 ld x14,0(x23) + 80003b58: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x0000000000000001 + 80003b5c: 000bb503 ld x10,0(x23) + 80003b60: 008b8b93 addi x23,x23,8 + +0000000080003b64 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + clmulh x4, x14, x10 # perform operation + 80003b64: 0aa73233 clmulh x4,x14,x10 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b68: 00033383 ld x7,0(x6) + 80003b6c: 00438c63 beq x7,x4,80003b84 + 80003b70: 1a80446f jal x8,80007d18 + 80003b74: 80003b64 .word 0x80003b64 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 80014214 .word 0x80014214 + 80003b80: 00000000 .word 0x00000000 + 80003b84: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003b88: 000bb883 ld x17,0(x23) + 80003b8c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x0000000000000002 + 80003b90: 000bb083 ld x1,0(x23) + 80003b94: 008b8b93 addi x23,x23,8 + +0000000080003b98 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + clmulh x22, x17, x1 # perform operation + 80003b98: 0a18bb33 clmulh x22,x17,x1 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b9c: 00033383 ld x7,0(x6) + 80003ba0: 01638c63 beq x7,x22,80003bb8 + 80003ba4: 1740446f jal x8,80007d18 + 80003ba8: 80003b98 .word 0x80003b98 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 80014276 .word 0x80014276 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003bbc: 000bb583 ld x11,0(x23) + 80003bc0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x8000000000000000 + 80003bc4: 000bb603 ld x12,0(x23) + 80003bc8: 008b8b93 addi x23,x23,8 + +0000000080003bcc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + clmulh x26, x11, x12 # perform operation + 80003bcc: 0ac5bd33 clmulh x26,x11,x12 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd0: 00033383 ld x7,0(x6) + 80003bd4: 01a38c63 beq x7,x26,80003bec + 80003bd8: 1400446f jal x8,80007d18 + 80003bdc: 80003bcc .word 0x80003bcc + 80003be0: 00000000 .word 0x00000000 + 80003be4: 800142d8 .word 0x800142d8 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003bf0: 000bbc03 ld x24,0(x23) + 80003bf4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x8000000000000001 + 80003bf8: 000bbf83 ld x31,0(x23) + 80003bfc: 008b8b93 addi x23,x23,8 + +0000000080003c00 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + clmulh x17, x24, x31 # perform operation + 80003c00: 0bfc38b3 clmulh x17,x24,x31 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c04: 00033383 ld x7,0(x6) + 80003c08: 01138c63 beq x7,x17,80003c20 + 80003c0c: 10c0446f jal x8,80007d18 + 80003c10: 80003c00 .word 0x80003c00 + 80003c14: 00000000 .word 0x00000000 + 80003c18: 80014349 .word 0x80014349 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003c24: 000bb603 ld x12,0(x23) + 80003c28: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x7fffffffffffffff + 80003c2c: 000bba03 ld x20,0(x23) + 80003c30: 008b8b93 addi x23,x23,8 + +0000000080003c34 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + clmulh x18, x12, x20 # perform operation + 80003c34: 0b463933 clmulh x18,x12,x20 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c38: 00033383 ld x7,0(x6) + 80003c3c: 01238c63 beq x7,x18,80003c54 + 80003c40: 0d80446f jal x8,80007d18 + 80003c44: 80003c34 .word 0x80003c34 + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 800143ba .word 0x800143ba + 80003c50: 00000000 .word 0x00000000 + 80003c54: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003c58: 000bbd03 ld x26,0(x23) + 80003c5c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80003c60: 000bb883 ld x17,0(x23) + 80003c64: 008b8b93 addi x23,x23,8 + +0000000080003c68 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + clmulh x20, x26, x17 # perform operation + 80003c68: 0b1d3a33 clmulh x20,x26,x17 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c6c: 00033383 ld x7,0(x6) + 80003c70: 01438c63 beq x7,x20,80003c88 + 80003c74: 0a40446f jal x8,80007d18 + 80003c78: 80003c68 .word 0x80003c68 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 8001442b .word 0x8001442b + 80003c84: 00000000 .word 0x00000000 + 80003c88: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003c8c: 000bb103 ld x2,0(x23) + 80003c90: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xffffffffffffffff + 80003c94: 000bb683 ld x13,0(x23) + 80003c98: 008b8b93 addi x23,x23,8 + +0000000080003c9c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + clmulh x12, x2, x13 # perform operation + 80003c9c: 0ad13633 clmulh x12,x2,x13 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca0: 00033383 ld x7,0(x6) + 80003ca4: 00c38c63 beq x7,x12,80003cbc + 80003ca8: 0700446f jal x8,80007d18 + 80003cac: 80003c9c .word 0x80003c9c + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 8001449c .word 0x8001449c + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003cc0: 000bbe83 ld x29,0(x23) + 80003cc4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xfffffffffffffffe + 80003cc8: 000bb803 ld x16,0(x23) + 80003ccc: 008b8b93 addi x23,x23,8 + +0000000080003cd0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + clmulh x24, x29, x16 # perform operation + 80003cd0: 0b0ebc33 clmulh x24,x29,x16 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd4: 00033383 ld x7,0(x6) + 80003cd8: 01838c63 beq x7,x24,80003cf0 + 80003cdc: 03c0446f jal x8,80007d18 + 80003ce0: 80003cd0 .word 0x80003cd0 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 8001450d .word 0x8001450d + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003cf4: 000bb483 ld x9,0(x23) + 80003cf8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003cfc: 000bb103 ld x2,0(x23) + 80003d00: 008b8b93 addi x23,x23,8 + +0000000080003d04 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + clmulh x16, x9, x2 # perform operation + 80003d04: 0a24b833 clmulh x16,x9,x2 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d08: 00033383 ld x7,0(x6) + 80003d0c: 01038c63 beq x7,x16,80003d24 + 80003d10: 0080446f jal x8,80007d18 + 80003d14: 80003d04 .word 0x80003d04 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 8001457e .word 0x8001457e + 80003d20: 00000000 .word 0x00000000 + 80003d24: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003d28: 000bb683 ld x13,0(x23) + 80003d2c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80003d30: 000bbe03 ld x28,0(x23) + 80003d34: 008b8b93 addi x23,x23,8 + +0000000080003d38 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x3, x13, x28 # perform operation + 80003d38: 0bc6b1b3 clmulh x3,x13,x28 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d3c: 00033383 ld x7,0(x6) + 80003d40: 00338c63 beq x7,x3,80003d58 + 80003d44: 7d50346f jal x8,80007d18 + 80003d48: 80003d38 .word 0x80003d38 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 800145ef .word 0x800145ef + 80003d54: 00000000 .word 0x00000000 + 80003d58: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003d5c: 000bb983 ld x19,0(x23) + 80003d60: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x5555555555555555 + 80003d64: 000bba83 ld x21,0(x23) + 80003d68: 008b8b93 addi x23,x23,8 + +0000000080003d6c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + clmulh x10, x19, x21 # perform operation + 80003d6c: 0b59b533 clmulh x10,x19,x21 + # Check if x10 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x10, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d70: 00033383 ld x7,0(x6) + 80003d74: 00a38c63 beq x7,x10,80003d8c + 80003d78: 7a10346f jal x8,80007d18 + 80003d7c: 80003d6c .word 0x80003d6c + 80003d80: 00000000 .word 0x00000000 + 80003d84: 80014660 .word 0x80014660 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003d90: 000bb883 ld x17,0(x23) + 80003d94: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x00000000ffffffff + 80003d98: 000bbe83 ld x29,0(x23) + 80003d9c: 008b8b93 addi x23,x23,8 + +0000000080003da0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + clmulh x2, x17, x29 # perform operation + 80003da0: 0bd8b133 clmulh x2,x17,x29 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da4: 00033383 ld x7,0(x6) + 80003da8: 00238c63 beq x7,x2,80003dc0 + 80003dac: 76d0346f jal x8,80007d18 + 80003db0: 80003da0 .word 0x80003da0 + 80003db4: 00000000 .word 0x00000000 + 80003db8: 800146d1 .word 0x800146d1 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003dc4: 000bbc03 ld x24,0(x23) + 80003dc8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x00000000fffffffe + 80003dcc: 000bb203 ld x4,0(x23) + 80003dd0: 008b8b93 addi x23,x23,8 + +0000000080003dd4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + clmulh x9, x24, x4 # perform operation + 80003dd4: 0a4c34b3 clmulh x9,x24,x4 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd8: 00033383 ld x7,0(x6) + 80003ddc: 00938c63 beq x7,x9,80003df4 + 80003de0: 7390346f jal x8,80007d18 + 80003de4: 80003dd4 .word 0x80003dd4 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 8001473a .word 0x8001473a + 80003df0: 00000000 .word 0x00000000 + 80003df4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003df8: 000bbb03 ld x22,0(x23) + 80003dfc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x0000000100000000 + 80003e00: 000bbf83 ld x31,0(x23) + 80003e04: 008b8b93 addi x23,x23,8 + +0000000080003e08 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + clmulh x17, x22, x31 # perform operation + 80003e08: 0bfb38b3 clmulh x17,x22,x31 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e0c: 00033383 ld x7,0(x6) + 80003e10: 01138c63 beq x7,x17,80003e28 + 80003e14: 7050346f jal x8,80007d18 + 80003e18: 80003e08 .word 0x80003e08 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 800147a3 .word 0x800147a3 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003e2c: 000bb803 ld x16,0(x23) + 80003e30: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x0000000100000001 + 80003e34: 000bbf03 ld x30,0(x23) + 80003e38: 008b8b93 addi x23,x23,8 + +0000000080003e3c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + clmulh x14, x16, x30 # perform operation + 80003e3c: 0be83733 clmulh x14,x16,x30 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e40: 00033383 ld x7,0(x6) + 80003e44: 00e38c63 beq x7,x14,80003e5c + 80003e48: 6d10346f jal x8,80007d18 + 80003e4c: 80003e3c .word 0x80003e3c + 80003e50: 00000000 .word 0x00000000 + 80003e54: 8001480d .word 0x8001480d + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x5555555555555555 + 80003e60: 000bbe83 ld x29,0(x23) + 80003e64: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x0000000000000000 + 80003e68: 000bb903 ld x18,0(x23) + 80003e6c: 008b8b93 addi x23,x23,8 + +0000000080003e70 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + clmulh x24, x29, x18 # perform operation + 80003e70: 0b2ebc33 clmulh x24,x29,x18 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e74: 00033383 ld x7,0(x6) + 80003e78: 01838c63 beq x7,x24,80003e90 + 80003e7c: 69d0346f jal x8,80007d18 + 80003e80: 80003e70 .word 0x80003e70 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 80014877 .word 0x80014877 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x5555555555555555 + 80003e94: 000bb083 ld x1,0(x23) + 80003e98: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x0000000000000001 + 80003e9c: 000bbd83 ld x27,0(x23) + 80003ea0: 008b8b93 addi x23,x23,8 + +0000000080003ea4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + clmulh x19, x1, x27 # perform operation + 80003ea4: 0bb0b9b3 clmulh x19,x1,x27 + # Check if x19 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x19, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea8: 00033383 ld x7,0(x6) + 80003eac: 01338c63 beq x7,x19,80003ec4 + 80003eb0: 6690346f jal x8,80007d18 + 80003eb4: 80003ea4 .word 0x80003ea4 + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 800148d9 .word 0x800148d9 + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x5555555555555555 + 80003ec8: 000bbe03 ld x28,0(x23) + 80003ecc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x0000000000000002 + 80003ed0: 000bb183 ld x3,0(x23) + 80003ed4: 008b8b93 addi x23,x23,8 + +0000000080003ed8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + clmulh x21, x28, x3 # perform operation + 80003ed8: 0a3e3ab3 clmulh x21,x28,x3 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003edc: 00033383 ld x7,0(x6) + 80003ee0: 01538c63 beq x7,x21,80003ef8 + 80003ee4: 6350346f jal x8,80007d18 + 80003ee8: 80003ed8 .word 0x80003ed8 + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 8001493b .word 0x8001493b + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x5555555555555555 + 80003efc: 000bbd83 ld x27,0(x23) + 80003f00: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x8000000000000000 + 80003f04: 000bb683 ld x13,0(x23) + 80003f08: 008b8b93 addi x23,x23,8 + +0000000080003f0c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + clmulh x20, x27, x13 # perform operation + 80003f0c: 0addba33 clmulh x20,x27,x13 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f10: 00033383 ld x7,0(x6) + 80003f14: 01438c63 beq x7,x20,80003f2c + 80003f18: 6010346f jal x8,80007d18 + 80003f1c: 80003f0c .word 0x80003f0c + 80003f20: 00000000 .word 0x00000000 + 80003f24: 8001499d .word 0x8001499d + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x5555555555555555 + 80003f30: 000bb503 ld x10,0(x23) + 80003f34: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x8000000000000001 + 80003f38: 000bbd03 ld x26,0(x23) + 80003f3c: 008b8b93 addi x23,x23,8 + +0000000080003f40 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + clmulh x18, x10, x26 # perform operation + 80003f40: 0ba53933 clmulh x18,x10,x26 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f44: 00033383 ld x7,0(x6) + 80003f48: 01238c63 beq x7,x18,80003f60 + 80003f4c: 5cd0346f jal x8,80007d18 + 80003f50: 80003f40 .word 0x80003f40 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 80014a0e .word 0x80014a0e + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x5555555555555555 + 80003f64: 000bb803 ld x16,0(x23) + 80003f68: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x7fffffffffffffff + 80003f6c: 000bb783 ld x15,0(x23) + 80003f70: 008b8b93 addi x23,x23,8 + +0000000080003f74 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + clmulh x3, x16, x15 # perform operation + 80003f74: 0af831b3 clmulh x3,x16,x15 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f78: 00033383 ld x7,0(x6) + 80003f7c: 00338c63 beq x7,x3,80003f94 + 80003f80: 5990346f jal x8,80007d18 + 80003f84: 80003f74 .word 0x80003f74 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 80014a7f .word 0x80014a7f + 80003f90: 00000000 .word 0x00000000 + 80003f94: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x5555555555555555 + 80003f98: 000bb183 ld x3,0(x23) + 80003f9c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80003fa0: 000bbc83 ld x25,0(x23) + 80003fa4: 008b8b93 addi x23,x23,8 + +0000000080003fa8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + clmulh x5, x3, x25 # perform operation + 80003fa8: 0b91b2b3 clmulh x5,x3,x25 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fac: 00033383 ld x7,0(x6) + 80003fb0: 00538c63 beq x7,x5,80003fc8 + 80003fb4: 5650346f jal x8,80007d18 + 80003fb8: 80003fa8 .word 0x80003fa8 + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 80014af0 .word 0x80014af0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x5555555555555555 + 80003fcc: 000bb603 ld x12,0(x23) + 80003fd0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xffffffffffffffff + 80003fd4: 000bbc03 ld x24,0(x23) + 80003fd8: 008b8b93 addi x23,x23,8 + +0000000080003fdc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + clmulh x9, x12, x24 # perform operation + 80003fdc: 0b8634b3 clmulh x9,x12,x24 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe0: 00033383 ld x7,0(x6) + 80003fe4: 00938c63 beq x7,x9,80003ffc + 80003fe8: 5310346f jal x8,80007d18 + 80003fec: 80003fdc .word 0x80003fdc + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 80014b61 .word 0x80014b61 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x5555555555555555 + 80004000: 000bb183 ld x3,0(x23) + 80004004: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xfffffffffffffffe + 80004008: 000bbc03 ld x24,0(x23) + 8000400c: 008b8b93 addi x23,x23,8 + +0000000080004010 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + clmulh x29, x3, x24 # perform operation + 80004010: 0b81beb3 clmulh x29,x3,x24 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004014: 00033383 ld x7,0(x6) + 80004018: 01d38c63 beq x7,x29,80004030 + 8000401c: 4fd0346f jal x8,80007d18 + 80004020: 80004010 .word 0x80004010 + 80004024: 00000000 .word 0x00000000 + 80004028: 80014bd2 .word 0x80014bd2 + 8000402c: 00000000 .word 0x00000000 + 80004030: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x5555555555555555 + 80004034: 000bbb03 ld x22,0(x23) + 80004038: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 8000403c: 000bbd03 ld x26,0(x23) + 80004040: 008b8b93 addi x23,x23,8 + +0000000080004044 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + clmulh x3, x22, x26 # perform operation + 80004044: 0bab31b3 clmulh x3,x22,x26 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004048: 00033383 ld x7,0(x6) + 8000404c: 00338c63 beq x7,x3,80004064 + 80004050: 4c90346f jal x8,80007d18 + 80004054: 80004044 .word 0x80004044 + 80004058: 00000000 .word 0x00000000 + 8000405c: 80014c43 .word 0x80014c43 + 80004060: 00000000 .word 0x00000000 + 80004064: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x5555555555555555 + 80004068: 000bbd03 ld x26,0(x23) + 8000406c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80004070: 000bba83 ld x21,0(x23) + 80004074: 008b8b93 addi x23,x23,8 + +0000000080004078 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x18, x26, x21 # perform operation + 80004078: 0b5d3933 clmulh x18,x26,x21 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000407c: 00033383 ld x7,0(x6) + 80004080: 01238c63 beq x7,x18,80004098 + 80004084: 4950346f jal x8,80007d18 + 80004088: 80004078 .word 0x80004078 + 8000408c: 00000000 .word 0x00000000 + 80004090: 80014cb4 .word 0x80014cb4 + 80004094: 00000000 .word 0x00000000 + 80004098: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x5555555555555555 + 8000409c: 000bb883 ld x17,0(x23) + 800040a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x5555555555555555 + 800040a4: 000bb103 ld x2,0(x23) + 800040a8: 008b8b93 addi x23,x23,8 + +00000000800040ac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + clmulh x13, x17, x2 # perform operation + 800040ac: 0a28b6b3 clmulh x13,x17,x2 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b0: 00033383 ld x7,0(x6) + 800040b4: 00d38c63 beq x7,x13,800040cc + 800040b8: 4610346f jal x8,80007d18 + 800040bc: 800040ac .word 0x800040ac + 800040c0: 00000000 .word 0x00000000 + 800040c4: 80014d25 .word 0x80014d25 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x5555555555555555 + 800040d0: 000bb503 ld x10,0(x23) + 800040d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x00000000ffffffff + 800040d8: 000bb583 ld x11,0(x23) + 800040dc: 008b8b93 addi x23,x23,8 + +00000000800040e0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + clmulh x28, x10, x11 # perform operation + 800040e0: 0ab53e33 clmulh x28,x10,x11 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e4: 00033383 ld x7,0(x6) + 800040e8: 01c38c63 beq x7,x28,80004100 + 800040ec: 42d0346f jal x8,80007d18 + 800040f0: 800040e0 .word 0x800040e0 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 80014d96 .word 0x80014d96 + 800040fc: 00000000 .word 0x00000000 + 80004100: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x5555555555555555 + 80004104: 000bb683 ld x13,0(x23) + 80004108: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x00000000fffffffe + 8000410c: 000bba03 ld x20,0(x23) + 80004110: 008b8b93 addi x23,x23,8 + +0000000080004114 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + clmulh x21, x13, x20 # perform operation + 80004114: 0b46bab3 clmulh x21,x13,x20 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004118: 00033383 ld x7,0(x6) + 8000411c: 01538c63 beq x7,x21,80004134 + 80004120: 3f90346f jal x8,80007d18 + 80004124: 80004114 .word 0x80004114 + 80004128: 00000000 .word 0x00000000 + 8000412c: 80014dff .word 0x80014dff + 80004130: 00000000 .word 0x00000000 + 80004134: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x5555555555555555 + 80004138: 000bb503 ld x10,0(x23) + 8000413c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x0000000100000000 + 80004140: 000bb983 ld x19,0(x23) + 80004144: 008b8b93 addi x23,x23,8 + +0000000080004148 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + clmulh x22, x10, x19 # perform operation + 80004148: 0b353b33 clmulh x22,x10,x19 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 8000414c: 00033383 ld x7,0(x6) + 80004150: 01638c63 beq x7,x22,80004168 + 80004154: 3c50346f jal x8,80007d18 + 80004158: 80004148 .word 0x80004148 + 8000415c: 00000000 .word 0x00000000 + 80004160: 80014e68 .word 0x80014e68 + 80004164: 00000000 .word 0x00000000 + 80004168: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x5555555555555555 + 8000416c: 000bb203 ld x4,0(x23) + 80004170: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x0000000100000001 + 80004174: 000bb903 ld x18,0(x23) + 80004178: 008b8b93 addi x23,x23,8 + +000000008000417c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + clmulh x2, x4, x18 # perform operation + 8000417c: 0b223133 clmulh x2,x4,x18 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004180: 00033383 ld x7,0(x6) + 80004184: 00238c63 beq x7,x2,8000419c + 80004188: 3910346f jal x8,80007d18 + 8000418c: 8000417c .word 0x8000417c + 80004190: 00000000 .word 0x00000000 + 80004194: 80014ed2 .word 0x80014ed2 + 80004198: 00000000 .word 0x00000000 + 8000419c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x00000000ffffffff + 800041a0: 000bb483 ld x9,0(x23) + 800041a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x0000000000000000 + 800041a8: 000bbf83 ld x31,0(x23) + 800041ac: 008b8b93 addi x23,x23,8 + +00000000800041b0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + clmulh x27, x9, x31 # perform operation + 800041b0: 0bf4bdb3 clmulh x27,x9,x31 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b4: 00033383 ld x7,0(x6) + 800041b8: 01b38c63 beq x7,x27,800041d0 + 800041bc: 35d0346f jal x8,80007d18 + 800041c0: 800041b0 .word 0x800041b0 + 800041c4: 00000000 .word 0x00000000 + 800041c8: 80014f3c .word 0x80014f3c + 800041cc: 00000000 .word 0x00000000 + 800041d0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x00000000ffffffff + 800041d4: 000bb803 ld x16,0(x23) + 800041d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x0000000000000001 + 800041dc: 000bb483 ld x9,0(x23) + 800041e0: 008b8b93 addi x23,x23,8 + +00000000800041e4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + clmulh x31, x16, x9 # perform operation + 800041e4: 0a983fb3 clmulh x31,x16,x9 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e8: 00033383 ld x7,0(x6) + 800041ec: 01f38c63 beq x7,x31,80004204 + 800041f0: 3290346f jal x8,80007d18 + 800041f4: 800041e4 .word 0x800041e4 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 80014f96 .word 0x80014f96 + 80004200: 00000000 .word 0x00000000 + 80004204: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x00000000ffffffff + 80004208: 000bbf83 ld x31,0(x23) + 8000420c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x0000000000000002 + 80004210: 000bbd83 ld x27,0(x23) + 80004214: 008b8b93 addi x23,x23,8 + +0000000080004218 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + clmulh x30, x31, x27 # perform operation + 80004218: 0bbfbf33 clmulh x30,x31,x27 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 8000421c: 00033383 ld x7,0(x6) + 80004220: 01e38c63 beq x7,x30,80004238 + 80004224: 2f50346f jal x8,80007d18 + 80004228: 80004218 .word 0x80004218 + 8000422c: 00000000 .word 0x00000000 + 80004230: 80014ff0 .word 0x80014ff0 + 80004234: 00000000 .word 0x00000000 + 80004238: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x00000000ffffffff + 8000423c: 000bb803 ld x16,0(x23) + 80004240: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x8000000000000000 + 80004244: 000bbe03 ld x28,0(x23) + 80004248: 008b8b93 addi x23,x23,8 + +000000008000424c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + clmulh x1, x16, x28 # perform operation + 8000424c: 0bc830b3 clmulh x1,x16,x28 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004250: 00033383 ld x7,0(x6) + 80004254: 00138c63 beq x7,x1,8000426c + 80004258: 2c10346f jal x8,80007d18 + 8000425c: 8000424c .word 0x8000424c + 80004260: 00000000 .word 0x00000000 + 80004264: 8001504a .word 0x8001504a + 80004268: 00000000 .word 0x00000000 + 8000426c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x00000000ffffffff + 80004270: 000bbd83 ld x27,0(x23) + 80004274: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x8000000000000001 + 80004278: 000bbe03 ld x28,0(x23) + 8000427c: 008b8b93 addi x23,x23,8 + +0000000080004280 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + clmulh x17, x27, x28 # perform operation + 80004280: 0bcdb8b3 clmulh x17,x27,x28 + # Check if x17 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x17, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004284: 00033383 ld x7,0(x6) + 80004288: 01138c63 beq x7,x17,800042a0 + 8000428c: 28d0346f jal x8,80007d18 + 80004290: 80004280 .word 0x80004280 + 80004294: 00000000 .word 0x00000000 + 80004298: 800150b3 .word 0x800150b3 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x00000000ffffffff + 800042a4: 000bb203 ld x4,0(x23) + 800042a8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x7fffffffffffffff + 800042ac: 000bbc03 ld x24,0(x23) + 800042b0: 008b8b93 addi x23,x23,8 + +00000000800042b4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + clmulh x18, x4, x24 # perform operation + 800042b4: 0b823933 clmulh x18,x4,x24 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b8: 00033383 ld x7,0(x6) + 800042bc: 01238c63 beq x7,x18,800042d4 + 800042c0: 2590346f jal x8,80007d18 + 800042c4: 800042b4 .word 0x800042b4 + 800042c8: 00000000 .word 0x00000000 + 800042cc: 8001511c .word 0x8001511c + 800042d0: 00000000 .word 0x00000000 + 800042d4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x00000000ffffffff + 800042d8: 000bb483 ld x9,0(x23) + 800042dc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x7ffffffffffffffe + 800042e0: 000bb183 ld x3,0(x23) + 800042e4: 008b8b93 addi x23,x23,8 + +00000000800042e8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + clmulh x22, x9, x3 # perform operation + 800042e8: 0a34bb33 clmulh x22,x9,x3 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042ec: 00033383 ld x7,0(x6) + 800042f0: 01638c63 beq x7,x22,80004308 + 800042f4: 2250346f jal x8,80007d18 + 800042f8: 800042e8 .word 0x800042e8 + 800042fc: 00000000 .word 0x00000000 + 80004300: 80015185 .word 0x80015185 + 80004304: 00000000 .word 0x00000000 + 80004308: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x00000000ffffffff + 8000430c: 000bbb03 ld x22,0(x23) + 80004310: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xffffffffffffffff + 80004314: 000bb083 ld x1,0(x23) + 80004318: 008b8b93 addi x23,x23,8 + +000000008000431c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + clmulh x12, x22, x1 # perform operation + 8000431c: 0a1b3633 clmulh x12,x22,x1 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004320: 00033383 ld x7,0(x6) + 80004324: 00c38c63 beq x7,x12,8000433c + 80004328: 1f10346f jal x8,80007d18 + 8000432c: 8000431c .word 0x8000431c + 80004330: 00000000 .word 0x00000000 + 80004334: 800151ee .word 0x800151ee + 80004338: 00000000 .word 0x00000000 + 8000433c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x00000000ffffffff + 80004340: 000bb903 ld x18,0(x23) + 80004344: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xfffffffffffffffe + 80004348: 000bb983 ld x19,0(x23) + 8000434c: 008b8b93 addi x23,x23,8 + +0000000080004350 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + clmulh x2, x18, x19 # perform operation + 80004350: 0b393133 clmulh x2,x18,x19 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004354: 00033383 ld x7,0(x6) + 80004358: 00238c63 beq x7,x2,80004370 + 8000435c: 1bd0346f jal x8,80007d18 + 80004360: 80004350 .word 0x80004350 + 80004364: 00000000 .word 0x00000000 + 80004368: 80015257 .word 0x80015257 + 8000436c: 00000000 .word 0x00000000 + 80004370: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x00000000ffffffff + 80004374: 000bb203 ld x4,0(x23) + 80004378: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 8000437c: 000bb103 ld x2,0(x23) + 80004380: 008b8b93 addi x23,x23,8 + +0000000080004384 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + clmulh x28, x4, x2 # perform operation + 80004384: 0a223e33 clmulh x28,x4,x2 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004388: 00033383 ld x7,0(x6) + 8000438c: 01c38c63 beq x7,x28,800043a4 + 80004390: 1890346f jal x8,80007d18 + 80004394: 80004384 .word 0x80004384 + 80004398: 00000000 .word 0x00000000 + 8000439c: 800152c0 .word 0x800152c0 + 800043a0: 00000000 .word 0x00000000 + 800043a4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x00000000ffffffff + 800043a8: 000bbd83 ld x27,0(x23) + 800043ac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 800043b0: 000bbd03 ld x26,0(x23) + 800043b4: 008b8b93 addi x23,x23,8 + +00000000800043b8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x14, x27, x26 # perform operation + 800043b8: 0badb733 clmulh x14,x27,x26 + # Check if x14 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x14, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043bc: 00033383 ld x7,0(x6) + 800043c0: 00e38c63 beq x7,x14,800043d8 + 800043c4: 1550346f jal x8,80007d18 + 800043c8: 800043b8 .word 0x800043b8 + 800043cc: 00000000 .word 0x00000000 + 800043d0: 80015329 .word 0x80015329 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x00000000ffffffff + 800043dc: 000bb983 ld x19,0(x23) + 800043e0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x5555555555555555 + 800043e4: 000bb903 ld x18,0(x23) + 800043e8: 008b8b93 addi x23,x23,8 + +00000000800043ec : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + clmulh x26, x19, x18 # perform operation + 800043ec: 0b29bd33 clmulh x26,x19,x18 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f0: 00033383 ld x7,0(x6) + 800043f4: 01a38c63 beq x7,x26,8000440c + 800043f8: 1210346f jal x8,80007d18 + 800043fc: 800043ec .word 0x800043ec + 80004400: 00000000 .word 0x00000000 + 80004404: 80015392 .word 0x80015392 + 80004408: 00000000 .word 0x00000000 + 8000440c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x00000000ffffffff + 80004410: 000bb883 ld x17,0(x23) + 80004414: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x00000000ffffffff + 80004418: 000bb703 ld x14,0(x23) + 8000441c: 008b8b93 addi x23,x23,8 + +0000000080004420 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + clmulh x30, x17, x14 # perform operation + 80004420: 0ae8bf33 clmulh x30,x17,x14 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004424: 00033383 ld x7,0(x6) + 80004428: 01e38c63 beq x7,x30,80004440 + 8000442c: 0ed0346f jal x8,80007d18 + 80004430: 80004420 .word 0x80004420 + 80004434: 00000000 .word 0x00000000 + 80004438: 800153fb .word 0x800153fb + 8000443c: 00000000 .word 0x00000000 + 80004440: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x00000000ffffffff + 80004444: 000bb883 ld x17,0(x23) + 80004448: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x00000000fffffffe + 8000444c: 000bb103 ld x2,0(x23) + 80004450: 008b8b93 addi x23,x23,8 + +0000000080004454 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + clmulh x28, x17, x2 # perform operation + 80004454: 0a28be33 clmulh x28,x17,x2 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004458: 00033383 ld x7,0(x6) + 8000445c: 01c38c63 beq x7,x28,80004474 + 80004460: 0b90346f jal x8,80007d18 + 80004464: 80004454 .word 0x80004454 + 80004468: 00000000 .word 0x00000000 + 8000446c: 8001545c .word 0x8001545c + 80004470: 00000000 .word 0x00000000 + 80004474: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x00000000ffffffff + 80004478: 000bb803 ld x16,0(x23) + 8000447c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x0000000100000000 + 80004480: 000bb503 ld x10,0(x23) + 80004484: 008b8b93 addi x23,x23,8 + +0000000080004488 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + clmulh x9, x16, x10 # perform operation + 80004488: 0aa834b3 clmulh x9,x16,x10 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 8000448c: 00033383 ld x7,0(x6) + 80004490: 00938c63 beq x7,x9,800044a8 + 80004494: 0850346f jal x8,80007d18 + 80004498: 80004488 .word 0x80004488 + 8000449c: 00000000 .word 0x00000000 + 800044a0: 800154bd .word 0x800154bd + 800044a4: 00000000 .word 0x00000000 + 800044a8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x00000000ffffffff + 800044ac: 000bb503 ld x10,0(x23) + 800044b0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000100000001 + 800044b4: 000bba03 ld x20,0(x23) + 800044b8: 008b8b93 addi x23,x23,8 + +00000000800044bc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + clmulh x1, x10, x20 # perform operation + 800044bc: 0b4530b3 clmulh x1,x10,x20 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c0: 00033383 ld x7,0(x6) + 800044c4: 00138c63 beq x7,x1,800044dc + 800044c8: 0510346f jal x8,80007d18 + 800044cc: 800044bc .word 0x800044bc + 800044d0: 00000000 .word 0x00000000 + 800044d4: 8001551f .word 0x8001551f + 800044d8: 00000000 .word 0x00000000 + 800044dc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x00000000fffffffe + 800044e0: 000bb083 ld x1,0(x23) + 800044e4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000000000000 + 800044e8: 000bba03 ld x20,0(x23) + 800044ec: 008b8b93 addi x23,x23,8 + +00000000800044f0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + clmulh x9, x1, x20 # perform operation + 800044f0: 0b40b4b3 clmulh x9,x1,x20 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f4: 00033383 ld x7,0(x6) + 800044f8: 00938c63 beq x7,x9,80004510 + 800044fc: 01d0346f jal x8,80007d18 + 80004500: 800044f0 .word 0x800044f0 + 80004504: 00000000 .word 0x00000000 + 80004508: 80015581 .word 0x80015581 + 8000450c: 00000000 .word 0x00000000 + 80004510: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x00000000fffffffe + 80004514: 000bbf83 ld x31,0(x23) + 80004518: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x0000000000000001 + 8000451c: 000bbe83 ld x29,0(x23) + 80004520: 008b8b93 addi x23,x23,8 + +0000000080004524 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + clmulh x18, x31, x29 # perform operation + 80004524: 0bdfb933 clmulh x18,x31,x29 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004528: 00033383 ld x7,0(x6) + 8000452c: 01238c63 beq x7,x18,80004544 + 80004530: 7e80346f jal x8,80007d18 + 80004534: 80004524 .word 0x80004524 + 80004538: 00000000 .word 0x00000000 + 8000453c: 800155db .word 0x800155db + 80004540: 00000000 .word 0x00000000 + 80004544: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x00000000fffffffe + 80004548: 000bbb03 ld x22,0(x23) + 8000454c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x0000000000000002 + 80004550: 000bb783 ld x15,0(x23) + 80004554: 008b8b93 addi x23,x23,8 + +0000000080004558 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + clmulh x16, x22, x15 # perform operation + 80004558: 0afb3833 clmulh x16,x22,x15 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 8000455c: 00033383 ld x7,0(x6) + 80004560: 01038c63 beq x7,x16,80004578 + 80004564: 7b40346f jal x8,80007d18 + 80004568: 80004558 .word 0x80004558 + 8000456c: 00000000 .word 0x00000000 + 80004570: 80015635 .word 0x80015635 + 80004574: 00000000 .word 0x00000000 + 80004578: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x00000000fffffffe + 8000457c: 000bbf83 ld x31,0(x23) + 80004580: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x8000000000000000 + 80004584: 000bb603 ld x12,0(x23) + 80004588: 008b8b93 addi x23,x23,8 + +000000008000458c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + clmulh x21, x31, x12 # perform operation + 8000458c: 0acfbab3 clmulh x21,x31,x12 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004590: 00033383 ld x7,0(x6) + 80004594: 01538c63 beq x7,x21,800045ac + 80004598: 7800346f jal x8,80007d18 + 8000459c: 8000458c .word 0x8000458c + 800045a0: 00000000 .word 0x00000000 + 800045a4: 8001568f .word 0x8001568f + 800045a8: 00000000 .word 0x00000000 + 800045ac: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x00000000fffffffe + 800045b0: 000bb083 ld x1,0(x23) + 800045b4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x8000000000000001 + 800045b8: 000bba03 ld x20,0(x23) + 800045bc: 008b8b93 addi x23,x23,8 + +00000000800045c0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + clmulh x4, x1, x20 # perform operation + 800045c0: 0b40b233 clmulh x4,x1,x20 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c4: 00033383 ld x7,0(x6) + 800045c8: 00438c63 beq x7,x4,800045e0 + 800045cc: 74c0346f jal x8,80007d18 + 800045d0: 800045c0 .word 0x800045c0 + 800045d4: 00000000 .word 0x00000000 + 800045d8: 800156f8 .word 0x800156f8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x00000000fffffffe + 800045e4: 000bb703 ld x14,0(x23) + 800045e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x7fffffffffffffff + 800045ec: 000bb183 ld x3,0(x23) + 800045f0: 008b8b93 addi x23,x23,8 + +00000000800045f4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + clmulh x13, x14, x3 # perform operation + 800045f4: 0a3736b3 clmulh x13,x14,x3 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f8: 00033383 ld x7,0(x6) + 800045fc: 00d38c63 beq x7,x13,80004614 + 80004600: 7180346f jal x8,80007d18 + 80004604: 800045f4 .word 0x800045f4 + 80004608: 00000000 .word 0x00000000 + 8000460c: 80015761 .word 0x80015761 + 80004610: 00000000 .word 0x00000000 + 80004614: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x00000000fffffffe + 80004618: 000bb783 ld x15,0(x23) + 8000461c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80004620: 000bb583 ld x11,0(x23) + 80004624: 008b8b93 addi x23,x23,8 + +0000000080004628 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + clmulh x24, x15, x11 # perform operation + 80004628: 0ab7bc33 clmulh x24,x15,x11 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 8000462c: 00033383 ld x7,0(x6) + 80004630: 01838c63 beq x7,x24,80004648 + 80004634: 6e40346f jal x8,80007d18 + 80004638: 80004628 .word 0x80004628 + 8000463c: 00000000 .word 0x00000000 + 80004640: 800157ca .word 0x800157ca + 80004644: 00000000 .word 0x00000000 + 80004648: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x00000000fffffffe + 8000464c: 000bba03 ld x20,0(x23) + 80004650: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xffffffffffffffff + 80004654: 000bb603 ld x12,0(x23) + 80004658: 008b8b93 addi x23,x23,8 + +000000008000465c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + clmulh x22, x20, x12 # perform operation + 8000465c: 0aca3b33 clmulh x22,x20,x12 + # Check if x22 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x22, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004660: 00033383 ld x7,0(x6) + 80004664: 01638c63 beq x7,x22,8000467c + 80004668: 6b00346f jal x8,80007d18 + 8000466c: 8000465c .word 0x8000465c + 80004670: 00000000 .word 0x00000000 + 80004674: 80015833 .word 0x80015833 + 80004678: 00000000 .word 0x00000000 + 8000467c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x00000000fffffffe + 80004680: 000bbd03 ld x26,0(x23) + 80004684: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0xfffffffffffffffe + 80004688: 000bb203 ld x4,0(x23) + 8000468c: 008b8b93 addi x23,x23,8 + +0000000080004690 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + clmulh x12, x26, x4 # perform operation + 80004690: 0a4d3633 clmulh x12,x26,x4 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004694: 00033383 ld x7,0(x6) + 80004698: 00c38c63 beq x7,x12,800046b0 + 8000469c: 67c0346f jal x8,80007d18 + 800046a0: 80004690 .word 0x80004690 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 8001589c .word 0x8001589c + 800046ac: 00000000 .word 0x00000000 + 800046b0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x00000000fffffffe + 800046b4: 000bb283 ld x5,0(x23) + 800046b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 800046bc: 000bb703 ld x14,0(x23) + 800046c0: 008b8b93 addi x23,x23,8 + +00000000800046c4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + clmulh x25, x5, x14 # perform operation + 800046c4: 0ae2bcb3 clmulh x25,x5,x14 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c8: 00033383 ld x7,0(x6) + 800046cc: 01938c63 beq x7,x25,800046e4 + 800046d0: 6480346f jal x8,80007d18 + 800046d4: 800046c4 .word 0x800046c4 + 800046d8: 00000000 .word 0x00000000 + 800046dc: 80015905 .word 0x80015905 + 800046e0: 00000000 .word 0x00000000 + 800046e4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x00000000fffffffe + 800046e8: 000bbc03 ld x24,0(x23) + 800046ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xaaaaaaaaaaaaaaaa + 800046f0: 000bb283 ld x5,0(x23) + 800046f4: 008b8b93 addi x23,x23,8 + +00000000800046f8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x29, x24, x5 # perform operation + 800046f8: 0a5c3eb3 clmulh x29,x24,x5 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046fc: 00033383 ld x7,0(x6) + 80004700: 01d38c63 beq x7,x29,80004718 + 80004704: 6140346f jal x8,80007d18 + 80004708: 800046f8 .word 0x800046f8 + 8000470c: 00000000 .word 0x00000000 + 80004710: 8001596e .word 0x8001596e + 80004714: 00000000 .word 0x00000000 + 80004718: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x00000000fffffffe + 8000471c: 000bbe03 ld x28,0(x23) + 80004720: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5555555555555555 + 80004724: 000bb603 ld x12,0(x23) + 80004728: 008b8b93 addi x23,x23,8 + +000000008000472c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + clmulh x4, x28, x12 # perform operation + 8000472c: 0ace3233 clmulh x4,x28,x12 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004730: 00033383 ld x7,0(x6) + 80004734: 00438c63 beq x7,x4,8000474c + 80004738: 5e00346f jal x8,80007d18 + 8000473c: 8000472c .word 0x8000472c + 80004740: 00000000 .word 0x00000000 + 80004744: 800159d7 .word 0x800159d7 + 80004748: 00000000 .word 0x00000000 + 8000474c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x00000000fffffffe + 80004750: 000bbc03 ld x24,0(x23) + 80004754: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x00000000ffffffff + 80004758: 000bb203 ld x4,0(x23) + 8000475c: 008b8b93 addi x23,x23,8 + +0000000080004760 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + clmulh x5, x24, x4 # perform operation + 80004760: 0a4c32b3 clmulh x5,x24,x4 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004764: 00033383 ld x7,0(x6) + 80004768: 00538c63 beq x7,x5,80004780 + 8000476c: 5ac0346f jal x8,80007d18 + 80004770: 80004760 .word 0x80004760 + 80004774: 00000000 .word 0x00000000 + 80004778: 80015a40 .word 0x80015a40 + 8000477c: 00000000 .word 0x00000000 + 80004780: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x00000000fffffffe + 80004784: 000bb583 ld x11,0(x23) + 80004788: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x00000000fffffffe + 8000478c: 000bbd03 ld x26,0(x23) + 80004790: 008b8b93 addi x23,x23,8 + +0000000080004794 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + clmulh x12, x11, x26 # perform operation + 80004794: 0ba5b633 clmulh x12,x11,x26 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004798: 00033383 ld x7,0(x6) + 8000479c: 00c38c63 beq x7,x12,800047b4 + 800047a0: 5780346f jal x8,80007d18 + 800047a4: 80004794 .word 0x80004794 + 800047a8: 00000000 .word 0x00000000 + 800047ac: 80015aa1 .word 0x80015aa1 + 800047b0: 00000000 .word 0x00000000 + 800047b4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x00000000fffffffe + 800047b8: 000bb283 ld x5,0(x23) + 800047bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x0000000100000000 + 800047c0: 000bb603 ld x12,0(x23) + 800047c4: 008b8b93 addi x23,x23,8 + +00000000800047c8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + clmulh x3, x5, x12 # perform operation + 800047c8: 0ac2b1b3 clmulh x3,x5,x12 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047cc: 00033383 ld x7,0(x6) + 800047d0: 00338c63 beq x7,x3,800047e8 + 800047d4: 5440346f jal x8,80007d18 + 800047d8: 800047c8 .word 0x800047c8 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 80015b02 .word 0x80015b02 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x00000000fffffffe + 800047ec: 000bba83 ld x21,0(x23) + 800047f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x0000000100000001 + 800047f4: 000bb203 ld x4,0(x23) + 800047f8: 008b8b93 addi x23,x23,8 + +00000000800047fc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + clmulh x12, x21, x4 # perform operation + 800047fc: 0a4ab633 clmulh x12,x21,x4 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004800: 00033383 ld x7,0(x6) + 80004804: 00c38c63 beq x7,x12,8000481c + 80004808: 5100346f jal x8,80007d18 + 8000480c: 800047fc .word 0x800047fc + 80004810: 00000000 .word 0x00000000 + 80004814: 80015b64 .word 0x80015b64 + 80004818: 00000000 .word 0x00000000 + 8000481c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x0000000100000000 + 80004820: 000bb803 ld x16,0(x23) + 80004824: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x0000000000000000 + 80004828: 000bb583 ld x11,0(x23) + 8000482c: 008b8b93 addi x23,x23,8 + +0000000080004830 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + clmulh x27, x16, x11 # perform operation + 80004830: 0ab83db3 clmulh x27,x16,x11 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004834: 00033383 ld x7,0(x6) + 80004838: 01b38c63 beq x7,x27,80004850 + 8000483c: 4dc0346f jal x8,80007d18 + 80004840: 80004830 .word 0x80004830 + 80004844: 00000000 .word 0x00000000 + 80004848: 80015bc6 .word 0x80015bc6 + 8000484c: 00000000 .word 0x00000000 + 80004850: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x0000000100000000 + 80004854: 000bb783 ld x15,0(x23) + 80004858: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x0000000000000001 + 8000485c: 000bbc03 ld x24,0(x23) + 80004860: 008b8b93 addi x23,x23,8 + +0000000080004864 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + clmulh x12, x15, x24 # perform operation + 80004864: 0b87b633 clmulh x12,x15,x24 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004868: 00033383 ld x7,0(x6) + 8000486c: 00c38c63 beq x7,x12,80004884 + 80004870: 4a80346f jal x8,80007d18 + 80004874: 80004864 .word 0x80004864 + 80004878: 00000000 .word 0x00000000 + 8000487c: 80015c21 .word 0x80015c21 + 80004880: 00000000 .word 0x00000000 + 80004884: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x0000000100000000 + 80004888: 000bb803 ld x16,0(x23) + 8000488c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x0000000000000002 + 80004890: 000bb683 ld x13,0(x23) + 80004894: 008b8b93 addi x23,x23,8 + +0000000080004898 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + clmulh x2, x16, x13 # perform operation + 80004898: 0ad83133 clmulh x2,x16,x13 + # Check if x2 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 8000489c: 00033383 ld x7,0(x6) + 800048a0: 00238c63 beq x7,x2,800048b8 + 800048a4: 4740346f jal x8,80007d18 + 800048a8: 80004898 .word 0x80004898 + 800048ac: 00000000 .word 0x00000000 + 800048b0: 80015c7c .word 0x80015c7c + 800048b4: 00000000 .word 0x00000000 + 800048b8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000100000000 + 800048bc: 000bb103 ld x2,0(x23) + 800048c0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x8000000000000000 + 800048c4: 000bb483 ld x9,0(x23) + 800048c8: 008b8b93 addi x23,x23,8 + +00000000800048cc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + clmulh x28, x2, x9 # perform operation + 800048cc: 0a913e33 clmulh x28,x2,x9 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d0: 00033383 ld x7,0(x6) + 800048d4: 01c38c63 beq x7,x28,800048ec + 800048d8: 4400346f jal x8,80007d18 + 800048dc: 800048cc .word 0x800048cc + 800048e0: 00000000 .word 0x00000000 + 800048e4: 80015cd7 .word 0x80015cd7 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000100000000 + 800048f0: 000bb103 ld x2,0(x23) + 800048f4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x8000000000000001 + 800048f8: 000bba83 ld x21,0(x23) + 800048fc: 008b8b93 addi x23,x23,8 + +0000000080004900 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + clmulh x20, x2, x21 # perform operation + 80004900: 0b513a33 clmulh x20,x2,x21 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004904: 00033383 ld x7,0(x6) + 80004908: 01438c63 beq x7,x20,80004920 + 8000490c: 40c0346f jal x8,80007d18 + 80004910: 80004900 .word 0x80004900 + 80004914: 00000000 .word 0x00000000 + 80004918: 80015d41 .word 0x80015d41 + 8000491c: 00000000 .word 0x00000000 + 80004920: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x0000000100000000 + 80004924: 000bb203 ld x4,0(x23) + 80004928: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7fffffffffffffff + 8000492c: 000bb883 ld x17,0(x23) + 80004930: 008b8b93 addi x23,x23,8 + +0000000080004934 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + clmulh x11, x4, x17 # perform operation + 80004934: 0b1235b3 clmulh x11,x4,x17 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004938: 00033383 ld x7,0(x6) + 8000493c: 00b38c63 beq x7,x11,80004954 + 80004940: 3d80346f jal x8,80007d18 + 80004944: 80004934 .word 0x80004934 + 80004948: 00000000 .word 0x00000000 + 8000494c: 80015dab .word 0x80015dab + 80004950: 00000000 .word 0x00000000 + 80004954: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x0000000100000000 + 80004958: 000bbf83 ld x31,0(x23) + 8000495c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80004960: 000bb903 ld x18,0(x23) + 80004964: 008b8b93 addi x23,x23,8 + +0000000080004968 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + clmulh x11, x31, x18 # perform operation + 80004968: 0b2fb5b3 clmulh x11,x31,x18 + # Check if x11 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x11, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 8000496c: 00033383 ld x7,0(x6) + 80004970: 00b38c63 beq x7,x11,80004988 + 80004974: 3a40346f jal x8,80007d18 + 80004978: 80004968 .word 0x80004968 + 8000497c: 00000000 .word 0x00000000 + 80004980: 80015e15 .word 0x80015e15 + 80004984: 00000000 .word 0x00000000 + 80004988: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000100000000 + 8000498c: 000bb183 ld x3,0(x23) + 80004990: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xffffffffffffffff + 80004994: 000bb903 ld x18,0(x23) + 80004998: 008b8b93 addi x23,x23,8 + +000000008000499c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + clmulh x26, x3, x18 # perform operation + 8000499c: 0b21bd33 clmulh x26,x3,x18 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a0: 00033383 ld x7,0(x6) + 800049a4: 01a38c63 beq x7,x26,800049bc + 800049a8: 3700346f jal x8,80007d18 + 800049ac: 8000499c .word 0x8000499c + 800049b0: 00000000 .word 0x00000000 + 800049b4: 80015e7f .word 0x80015e7f + 800049b8: 00000000 .word 0x00000000 + 800049bc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x0000000100000000 + 800049c0: 000bbc83 ld x25,0(x23) + 800049c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0xfffffffffffffffe + 800049c8: 000bb483 ld x9,0(x23) + 800049cc: 008b8b93 addi x23,x23,8 + +00000000800049d0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + clmulh x27, x25, x9 # perform operation + 800049d0: 0a9cbdb3 clmulh x27,x25,x9 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d4: 00033383 ld x7,0(x6) + 800049d8: 01b38c63 beq x7,x27,800049f0 + 800049dc: 33c0346f jal x8,80007d18 + 800049e0: 800049d0 .word 0x800049d0 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 80015ee9 .word 0x80015ee9 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x0000000100000000 + 800049f4: 000bbd03 ld x26,0(x23) + 800049f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 800049fc: 000bbd83 ld x27,0(x23) + 80004a00: 008b8b93 addi x23,x23,8 + +0000000080004a04 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + clmulh x16, x26, x27 # perform operation + 80004a04: 0bbd3833 clmulh x16,x26,x27 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a08: 00033383 ld x7,0(x6) + 80004a0c: 01038c63 beq x7,x16,80004a24 + 80004a10: 3080346f jal x8,80007d18 + 80004a14: 80004a04 .word 0x80004a04 + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 80015f53 .word 0x80015f53 + 80004a20: 00000000 .word 0x00000000 + 80004a24: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x0000000100000000 + 80004a28: 000bb503 ld x10,0(x23) + 80004a2c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80004a30: 000bbc03 ld x24,0(x23) + 80004a34: 008b8b93 addi x23,x23,8 + +0000000080004a38 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x15, x10, x24 # perform operation + 80004a38: 0b8537b3 clmulh x15,x10,x24 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a3c: 00033383 ld x7,0(x6) + 80004a40: 00f38c63 beq x7,x15,80004a58 + 80004a44: 2d40346f jal x8,80007d18 + 80004a48: 80004a38 .word 0x80004a38 + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 80015fbd .word 0x80015fbd + 80004a54: 00000000 .word 0x00000000 + 80004a58: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000100000000 + 80004a5c: 000bb183 ld x3,0(x23) + 80004a60: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x5555555555555555 + 80004a64: 000bbc03 ld x24,0(x23) + 80004a68: 008b8b93 addi x23,x23,8 + +0000000080004a6c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + clmulh x15, x3, x24 # perform operation + 80004a6c: 0b81b7b3 clmulh x15,x3,x24 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a70: 00033383 ld x7,0(x6) + 80004a74: 00f38c63 beq x7,x15,80004a8c + 80004a78: 2a00346f jal x8,80007d18 + 80004a7c: 80004a6c .word 0x80004a6c + 80004a80: 00000000 .word 0x00000000 + 80004a84: 80016027 .word 0x80016027 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0000000100000000 + 80004a90: 000bbe03 ld x28,0(x23) + 80004a94: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x00000000ffffffff + 80004a98: 000bbe83 ld x29,0(x23) + 80004a9c: 008b8b93 addi x23,x23,8 + +0000000080004aa0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + clmulh x1, x28, x29 # perform operation + 80004aa0: 0bde30b3 clmulh x1,x28,x29 + # Check if x1 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa4: 00033383 ld x7,0(x6) + 80004aa8: 00138c63 beq x7,x1,80004ac0 + 80004aac: 26c0346f jal x8,80007d18 + 80004ab0: 80004aa0 .word 0x80004aa0 + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 80016091 .word 0x80016091 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x0000000100000000 + 80004ac4: 000bb703 ld x14,0(x23) + 80004ac8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x00000000fffffffe + 80004acc: 000bbb03 ld x22,0(x23) + 80004ad0: 008b8b93 addi x23,x23,8 + +0000000080004ad4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + clmulh x31, x14, x22 # perform operation + 80004ad4: 0b673fb3 clmulh x31,x14,x22 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad8: 00033383 ld x7,0(x6) + 80004adc: 01f38c63 beq x7,x31,80004af4 + 80004ae0: 2380346f jal x8,80007d18 + 80004ae4: 80004ad4 .word 0x80004ad4 + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 800160f3 .word 0x800160f3 + 80004af0: 00000000 .word 0x00000000 + 80004af4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x0000000100000000 + 80004af8: 000bbb03 ld x22,0(x23) + 80004afc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x0000000100000000 + 80004b00: 000bb803 ld x16,0(x23) + 80004b04: 008b8b93 addi x23,x23,8 + +0000000080004b08 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + clmulh x15, x22, x16 # perform operation + 80004b08: 0b0b37b3 clmulh x15,x22,x16 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b0c: 00033383 ld x7,0(x6) + 80004b10: 00f38c63 beq x7,x15,80004b28 + 80004b14: 2040346f jal x8,80007d18 + 80004b18: 80004b08 .word 0x80004b08 + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 80016155 .word 0x80016155 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000100000000 + 80004b2c: 000bb103 ld x2,0(x23) + 80004b30: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x0000000100000001 + 80004b34: 000bbe03 ld x28,0(x23) + 80004b38: 008b8b93 addi x23,x23,8 + +0000000080004b3c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + clmulh x3, x2, x28 # perform operation + 80004b3c: 0bc131b3 clmulh x3,x2,x28 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b40: 00033383 ld x7,0(x6) + 80004b44: 00338c63 beq x7,x3,80004b5c + 80004b48: 1d00346f jal x8,80007d18 + 80004b4c: 80004b3c .word 0x80004b3c + 80004b50: 00000000 .word 0x00000000 + 80004b54: 800161b8 .word 0x800161b8 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000100000001 + 80004b60: 000bb183 ld x3,0(x23) + 80004b64: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x0000000000000000 + 80004b68: 000bbd03 ld x26,0(x23) + 80004b6c: 008b8b93 addi x23,x23,8 + +0000000080004b70 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + clmulh x27, x3, x26 # perform operation + 80004b70: 0ba1bdb3 clmulh x27,x3,x26 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b74: 00033383 ld x7,0(x6) + 80004b78: 01b38c63 beq x7,x27,80004b90 + 80004b7c: 19c0346f jal x8,80007d18 + 80004b80: 80004b70 .word 0x80004b70 + 80004b84: 00000000 .word 0x00000000 + 80004b88: 8001621b .word 0x8001621b + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000100000001 + 80004b94: 000bb183 ld x3,0(x23) + 80004b98: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x0000000000000001 + 80004b9c: 000bb883 ld x17,0(x23) + 80004ba0: 008b8b93 addi x23,x23,8 + +0000000080004ba4 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + clmulh x21, x3, x17 # perform operation + 80004ba4: 0b11bab3 clmulh x21,x3,x17 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba8: 00033383 ld x7,0(x6) + 80004bac: 01538c63 beq x7,x21,80004bc4 + 80004bb0: 1680346f jal x8,80007d18 + 80004bb4: 80004ba4 .word 0x80004ba4 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 80016276 .word 0x80016276 + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x0000000100000001 + 80004bc8: 000bb483 ld x9,0(x23) + 80004bcc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x0000000000000002 + 80004bd0: 000bbb03 ld x22,0(x23) + 80004bd4: 008b8b93 addi x23,x23,8 + +0000000080004bd8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + clmulh x25, x9, x22 # perform operation + 80004bd8: 0b64bcb3 clmulh x25,x9,x22 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bdc: 00033383 ld x7,0(x6) + 80004be0: 01938c63 beq x7,x25,80004bf8 + 80004be4: 1340346f jal x8,80007d18 + 80004be8: 80004bd8 .word 0x80004bd8 + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 800162d1 .word 0x800162d1 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x0000000100000001 + 80004bfc: 000bbe83 ld x29,0(x23) + 80004c00: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x8000000000000000 + 80004c04: 000bba03 ld x20,0(x23) + 80004c08: 008b8b93 addi x23,x23,8 + +0000000080004c0c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + clmulh x12, x29, x20 # perform operation + 80004c0c: 0b4eb633 clmulh x12,x29,x20 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c10: 00033383 ld x7,0(x6) + 80004c14: 00c38c63 beq x7,x12,80004c2c + 80004c18: 1000346f jal x8,80007d18 + 80004c1c: 80004c0c .word 0x80004c0c + 80004c20: 00000000 .word 0x00000000 + 80004c24: 8001632c .word 0x8001632c + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x0000000100000001 + 80004c30: 000bbe03 ld x28,0(x23) + 80004c34: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x8000000000000001 + 80004c38: 000bbb03 ld x22,0(x23) + 80004c3c: 008b8b93 addi x23,x23,8 + +0000000080004c40 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + clmulh x3, x28, x22 # perform operation + 80004c40: 0b6e31b3 clmulh x3,x28,x22 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c44: 00033383 ld x7,0(x6) + 80004c48: 00338c63 beq x7,x3,80004c60 + 80004c4c: 0cc0346f jal x8,80007d18 + 80004c50: 80004c40 .word 0x80004c40 + 80004c54: 00000000 .word 0x00000000 + 80004c58: 80016396 .word 0x80016396 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x0000000100000001 + 80004c64: 000bbf03 ld x30,0(x23) + 80004c68: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x7fffffffffffffff + 80004c6c: 000bb703 ld x14,0(x23) + 80004c70: 008b8b93 addi x23,x23,8 + +0000000080004c74 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + clmulh x3, x30, x14 # perform operation + 80004c74: 0aef31b3 clmulh x3,x30,x14 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c78: 00033383 ld x7,0(x6) + 80004c7c: 00338c63 beq x7,x3,80004c94 + 80004c80: 0980346f jal x8,80007d18 + 80004c84: 80004c74 .word 0x80004c74 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 80016400 .word 0x80016400 + 80004c90: 00000000 .word 0x00000000 + 80004c94: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x0000000100000001 + 80004c98: 000bb603 ld x12,0(x23) + 80004c9c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80004ca0: 000bb883 ld x17,0(x23) + 80004ca4: 008b8b93 addi x23,x23,8 + +0000000080004ca8 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + clmulh x13, x12, x17 # perform operation + 80004ca8: 0b1636b3 clmulh x13,x12,x17 + # Check if x13 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x13, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cac: 00033383 ld x7,0(x6) + 80004cb0: 00d38c63 beq x7,x13,80004cc8 + 80004cb4: 0640346f jal x8,80007d18 + 80004cb8: 80004ca8 .word 0x80004ca8 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 8001646a .word 0x8001646a + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0000000100000001 + 80004ccc: 000bb983 ld x19,0(x23) + 80004cd0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xffffffffffffffff + 80004cd4: 000bb883 ld x17,0(x23) + 80004cd8: 008b8b93 addi x23,x23,8 + +0000000080004cdc : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + clmulh x15, x19, x17 # perform operation + 80004cdc: 0b19b7b3 clmulh x15,x19,x17 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce0: 00033383 ld x7,0(x6) + 80004ce4: 00f38c63 beq x7,x15,80004cfc + 80004ce8: 0300346f jal x8,80007d18 + 80004cec: 80004cdc .word 0x80004cdc + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 800164d4 .word 0x800164d4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0x0000000100000001 + 80004d00: 000bbf83 ld x31,0(x23) + 80004d04: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xfffffffffffffffe + 80004d08: 000bbe83 ld x29,0(x23) + 80004d0c: 008b8b93 addi x23,x23,8 + +0000000080004d10 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + clmulh x4, x31, x29 # perform operation + 80004d10: 0bdfb233 clmulh x4,x31,x29 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d14: 00033383 ld x7,0(x6) + 80004d18: 00438c63 beq x7,x4,80004d30 + 80004d1c: 7fd0246f jal x8,80007d18 + 80004d20: 80004d10 .word 0x80004d10 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 8001653e .word 0x8001653e + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x0000000100000001 + 80004d34: 000bb083 ld x1,0(x23) + 80004d38: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80004d3c: 000bb803 ld x16,0(x23) + 80004d40: 008b8b93 addi x23,x23,8 + +0000000080004d44 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + clmulh x29, x1, x16 # perform operation + 80004d44: 0b00beb3 clmulh x29,x1,x16 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d48: 00033383 ld x7,0(x6) + 80004d4c: 01d38c63 beq x7,x29,80004d64 + 80004d50: 7c90246f jal x8,80007d18 + 80004d54: 80004d44 .word 0x80004d44 + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 800165a8 .word 0x800165a8 + 80004d60: 00000000 .word 0x00000000 + 80004d64: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000100000001 + 80004d68: 000bb103 ld x2,0(x23) + 80004d6c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80004d70: 000bb803 ld x16,0(x23) + 80004d74: 008b8b93 addi x23,x23,8 + +0000000080004d78 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + clmulh x12, x2, x16 # perform operation + 80004d78: 0b013633 clmulh x12,x2,x16 + # Check if x12 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x12, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d7c: 00033383 ld x7,0(x6) + 80004d80: 00c38c63 beq x7,x12,80004d98 + 80004d84: 7950246f jal x8,80007d18 + 80004d88: 80004d78 .word 0x80004d78 + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 80016612 .word 0x80016612 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x0000000100000001 + 80004d9c: 000bb783 ld x15,0(x23) + 80004da0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x5555555555555555 + 80004da4: 000bba83 ld x21,0(x23) + 80004da8: 008b8b93 addi x23,x23,8 + +0000000080004dac : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + clmulh x9, x15, x21 # perform operation + 80004dac: 0b57b4b3 clmulh x9,x15,x21 + # Check if x9 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x9, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db0: 00033383 ld x7,0(x6) + 80004db4: 00938c63 beq x7,x9,80004dcc + 80004db8: 7610246f jal x8,80007d18 + 80004dbc: 80004dac .word 0x80004dac + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 8001667c .word 0x8001667c + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x0000000100000001 + 80004dd0: 000bb103 ld x2,0(x23) + 80004dd4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x00000000ffffffff + 80004dd8: 000bbc83 ld x25,0(x23) + 80004ddc: 008b8b93 addi x23,x23,8 + +0000000080004de0 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + clmulh x28, x2, x25 # perform operation + 80004de0: 0b913e33 clmulh x28,x2,x25 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de4: 00033383 ld x7,0(x6) + 80004de8: 01c38c63 beq x7,x28,80004e00 + 80004dec: 72d0246f jal x8,80007d18 + 80004df0: 80004de0 .word 0x80004de0 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 800166e6 .word 0x800166e6 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x0000000100000001 + 80004e04: 000bb883 ld x17,0(x23) + 80004e08: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x00000000fffffffe + 80004e0c: 000bbf83 ld x31,0(x23) + 80004e10: 008b8b93 addi x23,x23,8 + +0000000080004e14 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + clmulh x21, x17, x31 # perform operation + 80004e14: 0bf8bab3 clmulh x21,x17,x31 + # Check if x21 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x21, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e18: 00033383 ld x7,0(x6) + 80004e1c: 01538c63 beq x7,x21,80004e34 + 80004e20: 6f90246f jal x8,80007d18 + 80004e24: 80004e14 .word 0x80004e14 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 80016748 .word 0x80016748 + 80004e30: 00000000 .word 0x00000000 + 80004e34: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x0000000100000001 + 80004e38: 000bb183 ld x3,0(x23) + 80004e3c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x0000000100000000 + 80004e40: 000bba03 ld x20,0(x23) + 80004e44: 008b8b93 addi x23,x23,8 + +0000000080004e48 : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + clmulh x4, x3, x20 # perform operation + 80004e48: 0b41b233 clmulh x4,x3,x20 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e4c: 00033383 ld x7,0(x6) + 80004e50: 00438c63 beq x7,x4,80004e68 + 80004e54: 6c50246f jal x8,80007d18 + 80004e58: 80004e48 .word 0x80004e48 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 800167aa .word 0x800167aa + 80004e64: 00000000 .word 0x00000000 + 80004e68: 00830313 addi x6,x6,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x0000000100000001 + 80004e6c: 000bb083 ld x1,0(x23) + 80004e70: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x0000000100000001 + 80004e74: 000bb883 ld x17,0(x23) + 80004e78: 008b8b93 addi x23,x23,8 + +0000000080004e7c : +Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + clmulh x20, x1, x17 # perform operation + 80004e7c: 0b10ba33 clmulh x20,x1,x17 + # Check if x20 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x20, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkc_clmulh_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e80: 00033383 ld x7,0(x6) + 80004e84: 01438c63 beq x7,x20,80004e9c + 80004e88: 6910246f jal x8,80007d18 + 80004e8c: 80004e7c .word 0x80004e7c + 80004e90: 00000000 .word 0x00000000 + 80004e94: 8001680d .word 0x8001680d + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0xb90ead49cf36fd09 + 80004ea0: 000bb003 ld x0,0(x23) + 80004ea4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x9476117557408acc + 80004ea8: 000bb003 ld x0,0(x23) + 80004eac: 008b8b93 addi x23,x23,8 + +0000000080004eb0 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b0: + clmulh x5, x0, x0 # perform operation + 80004eb0: 0a0032b3 clmulh x5,x0,x0 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkc_clmulh_cg_cmp_rs1_rs2_b0, Zbkc_clmulh_cg_cmp_rs1_rs2_b0_str) + 80004eb4: 00033383 ld x7,0(x6) + 80004eb8: 00538c63 beq x7,x5,80004ed0 + 80004ebc: 65d0246f jal x8,80007d18 + 80004ec0: 80004eb0 .word 0x80004eb0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 80016870 .word 0x80016870 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x0067e8db59348443 + 80004ed4: 000bb083 ld x1,0(x23) + 80004ed8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xbc53933cf204838e + 80004edc: 000bb083 ld x1,0(x23) + 80004ee0: 008b8b93 addi x23,x23,8 + +0000000080004ee4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b1: + clmulh x3, x1, x1 # perform operation + 80004ee4: 0a10b1b3 clmulh x3,x1,x1 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zbkc_clmulh_cg_cmp_rs1_rs2_b1, Zbkc_clmulh_cg_cmp_rs1_rs2_b1_str) + 80004ee8: 00033383 ld x7,0(x6) + 80004eec: 00338c63 beq x7,x3,80004f04 + 80004ef0: 6290246f jal x8,80007d18 + 80004ef4: 80004ee4 .word 0x80004ee4 + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 800168aa .word 0x800168aa + 80004f00: 00000000 .word 0x00000000 + 80004f04: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x844c8323bb00d753 + 80004f08: 000bb103 ld x2,0(x23) + 80004f0c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x38a8fd0906ed683b + 80004f10: 000bb103 ld x2,0(x23) + 80004f14: 008b8b93 addi x23,x23,8 + +0000000080004f18 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b2: + clmulh x16, x2, x2 # perform operation + 80004f18: 0a213833 clmulh x16,x2,x2 + # Check if x16 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x16, Zbkc_clmulh_cg_cmp_rs1_rs2_b2, Zbkc_clmulh_cg_cmp_rs1_rs2_b2_str) + 80004f1c: 00033383 ld x7,0(x6) + 80004f20: 01038c63 beq x7,x16,80004f38 + 80004f24: 5f50246f jal x8,80007d18 + 80004f28: 80004f18 .word 0x80004f18 + 80004f2c: 00000000 .word 0x00000000 + 80004f30: 800168e4 .word 0x800168e4 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x4742c8cbd371ffa2 + 80004f3c: 000bb183 ld x3,0(x23) + 80004f40: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xabaf866e25bf53e2 + 80004f44: 000bb183 ld x3,0(x23) + 80004f48: 008b8b93 addi x23,x23,8 + +0000000080004f4c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b3: + clmulh x29, x3, x3 # perform operation + 80004f4c: 0a31beb3 clmulh x29,x3,x3 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zbkc_clmulh_cg_cmp_rs1_rs2_b3, Zbkc_clmulh_cg_cmp_rs1_rs2_b3_str) + 80004f50: 00033383 ld x7,0(x6) + 80004f54: 01d38c63 beq x7,x29,80004f6c + 80004f58: 5c10246f jal x8,80007d18 + 80004f5c: 80004f4c .word 0x80004f4c + 80004f60: 00000000 .word 0x00000000 + 80004f64: 8001691e .word 0x8001691e + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xed3ae410b3105b52 + 80004f70: 000bb203 ld x4,0(x23) + 80004f74: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x719e722d3ef73276 + 80004f78: 000bb203 ld x4,0(x23) + 80004f7c: 008b8b93 addi x23,x23,8 + +0000000080004f80 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b4: + clmulh x15, x4, x4 # perform operation + 80004f80: 0a4237b3 clmulh x15,x4,x4 + # Check if x15 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x15, Zbkc_clmulh_cg_cmp_rs1_rs2_b4, Zbkc_clmulh_cg_cmp_rs1_rs2_b4_str) + 80004f84: 00033383 ld x7,0(x6) + 80004f88: 00f38c63 beq x7,x15,80004fa0 + 80004f8c: 58d0246f jal x8,80007d18 + 80004f90: 80004f80 .word 0x80004f80 + 80004f94: 00000000 .word 0x00000000 + 80004f98: 80016958 .word 0x80016958 + 80004f9c: 00000000 .word 0x00000000 + 80004fa0: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x9e2f87d38a99203f + 80004fa4: 000bb283 ld x5,0(x23) + 80004fa8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x60d18dd63ff1cb83 + 80004fac: 000bb283 ld x5,0(x23) + 80004fb0: 008b8b93 addi x23,x23,8 + +0000000080004fb4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b5: + clmulh x18, x5, x5 # perform operation + 80004fb4: 0a52b933 clmulh x18,x5,x5 + # Check if x18 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x18, Zbkc_clmulh_cg_cmp_rs1_rs2_b5, Zbkc_clmulh_cg_cmp_rs1_rs2_b5_str) + 80004fb8: 00033383 ld x7,0(x6) + 80004fbc: 01238c63 beq x7,x18,80004fd4 + 80004fc0: 5590246f jal x8,80007d18 + 80004fc4: 80004fb4 .word 0x80004fb4 + 80004fc8: 00000000 .word 0x00000000 + 80004fcc: 80016992 .word 0x80016992 + 80004fd0: 00000000 .word 0x00000000 + 80004fd4: 00830313 addi x6,x6,8 + + mv x21, x6 # switch signature pointer register to avoid conflict with test + 80004fd8: 00030a93 addi x21,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x68e80cfc99c890f2 + 80004fdc: 000bb303 ld x6,0(x23) + 80004fe0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xea815343ed7d8466 + 80004fe4: 000bb303 ld x6,0(x23) + 80004fe8: 008b8b93 addi x23,x23,8 + +0000000080004fec : +Zbkc_clmulh_cg_cmp_rs1_rs2_b6: + clmulh x28, x6, x6 # perform operation + 80004fec: 0a633e33 clmulh x28,x6,x6 + # Check if x28 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x28, Zbkc_clmulh_cg_cmp_rs1_rs2_b6, Zbkc_clmulh_cg_cmp_rs1_rs2_b6_str) + 80004ff0: 000ab383 ld x7,0(x21) + 80004ff4: 01c38c63 beq x7,x28,8000500c + 80004ff8: 5210246f jal x8,80007d18 + 80004ffc: 80004fec .word 0x80004fec + 80005000: 00000000 .word 0x00000000 + 80005004: 800169cc .word 0x800169cc + 80005008: 00000000 .word 0x00000000 + 8000500c: 008a8a93 addi x21,x21,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005010: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005014: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x67aadea9d79d9988 + 80005018: 000bb383 ld x7,0(x23) + 8000501c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x1f9a007538e067a3 + 80005020: 000bb383 ld x7,0(x23) + 80005024: 008b8b93 addi x23,x23,8 + +0000000080005028 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b7: + clmulh x1, x7, x7 # perform operation + 80005028: 0a73b0b3 clmulh x1,x7,x7 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zbkc_clmulh_cg_cmp_rs1_rs2_b7, Zbkc_clmulh_cg_cmp_rs1_rs2_b7_str) + 8000502c: 000ab203 ld x4,0(x21) + 80005030: 00120c63 beq x4,x1,80005048 + 80005034: 4cd022ef jal x5,80007d00 + 80005038: 80005028 .word 0x80005028 + 8000503c: 00000000 .word 0x00000000 + 80005040: 80016a06 .word 0x80016a06 + 80005044: 00000000 .word 0x00000000 + 80005048: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x1dfe08be150871ed + 8000504c: 000bb403 ld x8,0(x23) + 80005050: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x9c7159c26998ec0d + 80005054: 000bb403 ld x8,0(x23) + 80005058: 008b8b93 addi x23,x23,8 + +000000008000505c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b8: + clmulh x13, x8, x8 # perform operation + 8000505c: 0a8436b3 clmulh x13,x8,x8 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zbkc_clmulh_cg_cmp_rs1_rs2_b8, Zbkc_clmulh_cg_cmp_rs1_rs2_b8_str) + 80005060: 000ab203 ld x4,0(x21) + 80005064: 00d20c63 beq x4,x13,8000507c + 80005068: 499022ef jal x5,80007d00 + 8000506c: 8000505c .word 0x8000505c + 80005070: 00000000 .word 0x00000000 + 80005074: 80016a40 .word 0x80016a40 + 80005078: 00000000 .word 0x00000000 + 8000507c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x718be3b76bd6f0e0 + 80005080: 000bb483 ld x9,0(x23) + 80005084: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x9434412c3e49a951 + 80005088: 000bb483 ld x9,0(x23) + 8000508c: 008b8b93 addi x23,x23,8 + +0000000080005090 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b9: + clmulh x28, x9, x9 # perform operation + 80005090: 0a94be33 clmulh x28,x9,x9 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zbkc_clmulh_cg_cmp_rs1_rs2_b9, Zbkc_clmulh_cg_cmp_rs1_rs2_b9_str) + 80005094: 000ab203 ld x4,0(x21) + 80005098: 01c20c63 beq x4,x28,800050b0 + 8000509c: 465022ef jal x5,80007d00 + 800050a0: 80005090 .word 0x80005090 + 800050a4: 00000000 .word 0x00000000 + 800050a8: 80016a7a .word 0x80016a7a + 800050ac: 00000000 .word 0x00000000 + 800050b0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x75c8c942c78dcf52 + 800050b4: 000bb503 ld x10,0(x23) + 800050b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0xcd0b31f66d60dab9 + 800050bc: 000bb503 ld x10,0(x23) + 800050c0: 008b8b93 addi x23,x23,8 + +00000000800050c4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b10: + clmulh x9, x10, x10 # perform operation + 800050c4: 0aa534b3 clmulh x9,x10,x10 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zbkc_clmulh_cg_cmp_rs1_rs2_b10, Zbkc_clmulh_cg_cmp_rs1_rs2_b10_str) + 800050c8: 000ab203 ld x4,0(x21) + 800050cc: 00920c63 beq x4,x9,800050e4 + 800050d0: 431022ef jal x5,80007d00 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 80016ab4 .word 0x80016ab4 + 800050e0: 00000000 .word 0x00000000 + 800050e4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x985abd1e1e528637 + 800050e8: 000bb583 ld x11,0(x23) + 800050ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x1fd1739c7c3c180d + 800050f0: 000bb583 ld x11,0(x23) + 800050f4: 008b8b93 addi x23,x23,8 + +00000000800050f8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b11: + clmulh x20, x11, x11 # perform operation + 800050f8: 0ab5ba33 clmulh x20,x11,x11 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zbkc_clmulh_cg_cmp_rs1_rs2_b11, Zbkc_clmulh_cg_cmp_rs1_rs2_b11_str) + 800050fc: 000ab203 ld x4,0(x21) + 80005100: 01420c63 beq x4,x20,80005118 + 80005104: 3fd022ef jal x5,80007d00 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 80016aef .word 0x80016aef + 80005114: 00000000 .word 0x00000000 + 80005118: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xa9ec4a204f64252e + 8000511c: 000bb603 ld x12,0(x23) + 80005120: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0xabfb986e2a1f1ae2 + 80005124: 000bb603 ld x12,0(x23) + 80005128: 008b8b93 addi x23,x23,8 + +000000008000512c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b12: + clmulh x30, x12, x12 # perform operation + 8000512c: 0ac63f33 clmulh x30,x12,x12 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zbkc_clmulh_cg_cmp_rs1_rs2_b12, Zbkc_clmulh_cg_cmp_rs1_rs2_b12_str) + 80005130: 000ab203 ld x4,0(x21) + 80005134: 01e20c63 beq x4,x30,8000514c + 80005138: 3c9022ef jal x5,80007d00 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 80016b2a .word 0x80016b2a + 80005148: 00000000 .word 0x00000000 + 8000514c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xb1ec8a8e261af936 + 80005150: 000bb683 ld x13,0(x23) + 80005154: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x5416449ce0369350 + 80005158: 000bb683 ld x13,0(x23) + 8000515c: 008b8b93 addi x23,x23,8 + +0000000080005160 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b13: + clmulh x1, x13, x13 # perform operation + 80005160: 0ad6b0b3 clmulh x1,x13,x13 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zbkc_clmulh_cg_cmp_rs1_rs2_b13, Zbkc_clmulh_cg_cmp_rs1_rs2_b13_str) + 80005164: 000ab203 ld x4,0(x21) + 80005168: 00120c63 beq x4,x1,80005180 + 8000516c: 395022ef jal x5,80007d00 + 80005170: 80005160 .word 0x80005160 + 80005174: 00000000 .word 0x00000000 + 80005178: 80016b65 .word 0x80016b65 + 8000517c: 00000000 .word 0x00000000 + 80005180: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x97d76cd64fda7245 + 80005184: 000bb703 ld x14,0(x23) + 80005188: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x1a7571a636d4252f + 8000518c: 000bb703 ld x14,0(x23) + 80005190: 008b8b93 addi x23,x23,8 + +0000000080005194 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b14: + clmulh x28, x14, x14 # perform operation + 80005194: 0ae73e33 clmulh x28,x14,x14 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zbkc_clmulh_cg_cmp_rs1_rs2_b14, Zbkc_clmulh_cg_cmp_rs1_rs2_b14_str) + 80005198: 000ab203 ld x4,0(x21) + 8000519c: 01c20c63 beq x4,x28,800051b4 + 800051a0: 361022ef jal x5,80007d00 + 800051a4: 80005194 .word 0x80005194 + 800051a8: 00000000 .word 0x00000000 + 800051ac: 80016ba0 .word 0x80016ba0 + 800051b0: 00000000 .word 0x00000000 + 800051b4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xfd8a9b9158787b29 + 800051b8: 000bb783 ld x15,0(x23) + 800051bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x21e986f8d4639617 + 800051c0: 000bb783 ld x15,0(x23) + 800051c4: 008b8b93 addi x23,x23,8 + +00000000800051c8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b15: + clmulh x8, x15, x15 # perform operation + 800051c8: 0af7b433 clmulh x8,x15,x15 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zbkc_clmulh_cg_cmp_rs1_rs2_b15, Zbkc_clmulh_cg_cmp_rs1_rs2_b15_str) + 800051cc: 000ab203 ld x4,0(x21) + 800051d0: 00820c63 beq x4,x8,800051e8 + 800051d4: 32d022ef jal x5,80007d00 + 800051d8: 800051c8 .word 0x800051c8 + 800051dc: 00000000 .word 0x00000000 + 800051e0: 80016bdb .word 0x80016bdb + 800051e4: 00000000 .word 0x00000000 + 800051e8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x27d798212c5aee22 + 800051ec: 000bb803 ld x16,0(x23) + 800051f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x8baca486d76eaca8 + 800051f4: 000bb803 ld x16,0(x23) + 800051f8: 008b8b93 addi x23,x23,8 + +00000000800051fc : +Zbkc_clmulh_cg_cmp_rs1_rs2_b16: + clmulh x8, x16, x16 # perform operation + 800051fc: 0b083433 clmulh x8,x16,x16 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zbkc_clmulh_cg_cmp_rs1_rs2_b16, Zbkc_clmulh_cg_cmp_rs1_rs2_b16_str) + 80005200: 000ab203 ld x4,0(x21) + 80005204: 00820c63 beq x4,x8,8000521c + 80005208: 2f9022ef jal x5,80007d00 + 8000520c: 800051fc .word 0x800051fc + 80005210: 00000000 .word 0x00000000 + 80005214: 80016c16 .word 0x80016c16 + 80005218: 00000000 .word 0x00000000 + 8000521c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xcab6bbf4423d38cf + 80005220: 000bb883 ld x17,0(x23) + 80005224: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x9b1f7a41fce39b64 + 80005228: 000bb883 ld x17,0(x23) + 8000522c: 008b8b93 addi x23,x23,8 + +0000000080005230 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b17: + clmulh x19, x17, x17 # perform operation + 80005230: 0b18b9b3 clmulh x19,x17,x17 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zbkc_clmulh_cg_cmp_rs1_rs2_b17, Zbkc_clmulh_cg_cmp_rs1_rs2_b17_str) + 80005234: 000ab203 ld x4,0(x21) + 80005238: 01320c63 beq x4,x19,80005250 + 8000523c: 2c5022ef jal x5,80007d00 + 80005240: 80005230 .word 0x80005230 + 80005244: 00000000 .word 0x00000000 + 80005248: 80016c51 .word 0x80016c51 + 8000524c: 00000000 .word 0x00000000 + 80005250: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x44fc587b10d655fd + 80005254: 000bb903 ld x18,0(x23) + 80005258: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xbfcc54751e7521d5 + 8000525c: 000bb903 ld x18,0(x23) + 80005260: 008b8b93 addi x23,x23,8 + +0000000080005264 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b18: + clmulh x24, x18, x18 # perform operation + 80005264: 0b293c33 clmulh x24,x18,x18 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zbkc_clmulh_cg_cmp_rs1_rs2_b18, Zbkc_clmulh_cg_cmp_rs1_rs2_b18_str) + 80005268: 000ab203 ld x4,0(x21) + 8000526c: 01820c63 beq x4,x24,80005284 + 80005270: 291022ef jal x5,80007d00 + 80005274: 80005264 .word 0x80005264 + 80005278: 00000000 .word 0x00000000 + 8000527c: 80016c8c .word 0x80016c8c + 80005280: 00000000 .word 0x00000000 + 80005284: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x325afd997b943f2f + 80005288: 000bb983 ld x19,0(x23) + 8000528c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x35e1d7f4e729d495 + 80005290: 000bb983 ld x19,0(x23) + 80005294: 008b8b93 addi x23,x23,8 + +0000000080005298 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b19: + clmulh x18, x19, x19 # perform operation + 80005298: 0b39b933 clmulh x18,x19,x19 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zbkc_clmulh_cg_cmp_rs1_rs2_b19, Zbkc_clmulh_cg_cmp_rs1_rs2_b19_str) + 8000529c: 000ab203 ld x4,0(x21) + 800052a0: 01220c63 beq x4,x18,800052b8 + 800052a4: 25d022ef jal x5,80007d00 + 800052a8: 80005298 .word 0x80005298 + 800052ac: 00000000 .word 0x00000000 + 800052b0: 80016cc7 .word 0x80016cc7 + 800052b4: 00000000 .word 0x00000000 + 800052b8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x4f8c7b85594cd660 + 800052bc: 000bba03 ld x20,0(x23) + 800052c0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x4b8c572ebc5c264d + 800052c4: 000bba03 ld x20,0(x23) + 800052c8: 008b8b93 addi x23,x23,8 + +00000000800052cc : +Zbkc_clmulh_cg_cmp_rs1_rs2_b20: + clmulh x31, x20, x20 # perform operation + 800052cc: 0b4a3fb3 clmulh x31,x20,x20 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zbkc_clmulh_cg_cmp_rs1_rs2_b20, Zbkc_clmulh_cg_cmp_rs1_rs2_b20_str) + 800052d0: 000ab203 ld x4,0(x21) + 800052d4: 01f20c63 beq x4,x31,800052ec + 800052d8: 229022ef jal x5,80007d00 + 800052dc: 800052cc .word 0x800052cc + 800052e0: 00000000 .word 0x00000000 + 800052e4: 80016d02 .word 0x80016d02 + 800052e8: 00000000 .word 0x00000000 + 800052ec: 008a8a93 addi x21,x21,8 + + mv x9, x21 # switch signature pointer register to avoid conflict with test + 800052f0: 000a8493 addi x9,x21,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xf2f55a1a8fc1226f + 800052f4: 000bba83 ld x21,0(x23) + 800052f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xf4f88c9b86bcb43d + 800052fc: 000bba83 ld x21,0(x23) + 80005300: 008b8b93 addi x23,x23,8 + +0000000080005304 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b21: + clmulh x20, x21, x21 # perform operation + 80005304: 0b5aba33 clmulh x20,x21,x21 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zbkc_clmulh_cg_cmp_rs1_rs2_b21, Zbkc_clmulh_cg_cmp_rs1_rs2_b21_str) + 80005308: 0004b203 ld x4,0(x9) + 8000530c: 01420c63 beq x4,x20,80005324 + 80005310: 1f1022ef jal x5,80007d00 + 80005314: 80005304 .word 0x80005304 + 80005318: 00000000 .word 0x00000000 + 8000531c: 80016d3d .word 0x80016d3d + 80005320: 00000000 .word 0x00000000 + 80005324: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xed5b191bed7a01cd + 80005328: 000bbb03 ld x22,0(x23) + 8000532c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xaace2b9f65ddc862 + 80005330: 000bbb03 ld x22,0(x23) + 80005334: 008b8b93 addi x23,x23,8 + +0000000080005338 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b22: + clmulh x11, x22, x22 # perform operation + 80005338: 0b6b35b3 clmulh x11,x22,x22 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkc_clmulh_cg_cmp_rs1_rs2_b22, Zbkc_clmulh_cg_cmp_rs1_rs2_b22_str) + 8000533c: 0004b203 ld x4,0(x9) + 80005340: 00b20c63 beq x4,x11,80005358 + 80005344: 1bd022ef jal x5,80007d00 + 80005348: 80005338 .word 0x80005338 + 8000534c: 00000000 .word 0x00000000 + 80005350: 80016d78 .word 0x80016d78 + 80005354: 00000000 .word 0x00000000 + 80005358: 00848493 addi x9,x9,8 + + mv x17, x23 # switch data pointer register to avoid conflict with test + 8000535c: 000b8893 addi x17,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x8f327b229529f053 + 80005360: 0008bb83 ld x23,0(x17) + 80005364: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0dd0a33a0a9c1ad2 + 80005368: 0008bb83 ld x23,0(x17) + 8000536c: 00888893 addi x17,x17,8 + +0000000080005370 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b23: + clmulh x31, x23, x23 # perform operation + 80005370: 0b7bbfb3 clmulh x31,x23,x23 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zbkc_clmulh_cg_cmp_rs1_rs2_b23, Zbkc_clmulh_cg_cmp_rs1_rs2_b23_str) + 80005374: 0004b203 ld x4,0(x9) + 80005378: 01f20c63 beq x4,x31,80005390 + 8000537c: 185022ef jal x5,80007d00 + 80005380: 80005370 .word 0x80005370 + 80005384: 00000000 .word 0x00000000 + 80005388: 80016db3 .word 0x80016db3 + 8000538c: 00000000 .word 0x00000000 + 80005390: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x25fd26380c2de304 + 80005394: 0008bc03 ld x24,0(x17) + 80005398: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x71818d8737e7d404 + 8000539c: 0008bc03 ld x24,0(x17) + 800053a0: 00888893 addi x17,x17,8 + +00000000800053a4 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b24: + clmulh x22, x24, x24 # perform operation + 800053a4: 0b8c3b33 clmulh x22,x24,x24 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkc_clmulh_cg_cmp_rs1_rs2_b24, Zbkc_clmulh_cg_cmp_rs1_rs2_b24_str) + 800053a8: 0004b203 ld x4,0(x9) + 800053ac: 01620c63 beq x4,x22,800053c4 + 800053b0: 151022ef jal x5,80007d00 + 800053b4: 800053a4 .word 0x800053a4 + 800053b8: 00000000 .word 0x00000000 + 800053bc: 80016dee .word 0x80016dee + 800053c0: 00000000 .word 0x00000000 + 800053c4: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x7a9556a23ddaa0f7 + 800053c8: 0008bc83 ld x25,0(x17) + 800053cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x3b6cacd4126be2d5 + 800053d0: 0008bc83 ld x25,0(x17) + 800053d4: 00888893 addi x17,x17,8 + +00000000800053d8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b25: + clmulh x13, x25, x25 # perform operation + 800053d8: 0b9cb6b3 clmulh x13,x25,x25 + # Check if x13 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x13, Zbkc_clmulh_cg_cmp_rs1_rs2_b25, Zbkc_clmulh_cg_cmp_rs1_rs2_b25_str) + 800053dc: 0004b203 ld x4,0(x9) + 800053e0: 00d20c63 beq x4,x13,800053f8 + 800053e4: 11d022ef jal x5,80007d00 + 800053e8: 800053d8 .word 0x800053d8 + 800053ec: 00000000 .word 0x00000000 + 800053f0: 80016e29 .word 0x80016e29 + 800053f4: 00000000 .word 0x00000000 + 800053f8: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xb2c2a8068e5ee996 + 800053fc: 0008bd03 ld x26,0(x17) + 80005400: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xe4053300cbf9b802 + 80005404: 0008bd03 ld x26,0(x17) + 80005408: 00888893 addi x17,x17,8 + +000000008000540c : +Zbkc_clmulh_cg_cmp_rs1_rs2_b26: + clmulh x6, x26, x26 # perform operation + 8000540c: 0bad3333 clmulh x6,x26,x26 + # Check if x6 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x6, Zbkc_clmulh_cg_cmp_rs1_rs2_b26, Zbkc_clmulh_cg_cmp_rs1_rs2_b26_str) + 80005410: 0004b203 ld x4,0(x9) + 80005414: 00620c63 beq x4,x6,8000542c + 80005418: 0e9022ef jal x5,80007d00 + 8000541c: 8000540c .word 0x8000540c + 80005420: 00000000 .word 0x00000000 + 80005424: 80016e64 .word 0x80016e64 + 80005428: 00000000 .word 0x00000000 + 8000542c: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xb3bc3eeaf22f1071 + 80005430: 0008bd83 ld x27,0(x17) + 80005434: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x07266e85144ecd0a + 80005438: 0008bd83 ld x27,0(x17) + 8000543c: 00888893 addi x17,x17,8 + +0000000080005440 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b27: + clmulh x14, x27, x27 # perform operation + 80005440: 0bbdb733 clmulh x14,x27,x27 + # Check if x14 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x14, Zbkc_clmulh_cg_cmp_rs1_rs2_b27, Zbkc_clmulh_cg_cmp_rs1_rs2_b27_str) + 80005444: 0004b203 ld x4,0(x9) + 80005448: 00e20c63 beq x4,x14,80005460 + 8000544c: 0b5022ef jal x5,80007d00 + 80005450: 80005440 .word 0x80005440 + 80005454: 00000000 .word 0x00000000 + 80005458: 80016e9f .word 0x80016e9f + 8000545c: 00000000 .word 0x00000000 + 80005460: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x48206375064b297a + 80005464: 0008be03 ld x28,0(x17) + 80005468: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xeeb7909698d4e3aa + 8000546c: 0008be03 ld x28,0(x17) + 80005470: 00888893 addi x17,x17,8 + +0000000080005474 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b28: + clmulh x22, x28, x28 # perform operation + 80005474: 0bce3b33 clmulh x22,x28,x28 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zbkc_clmulh_cg_cmp_rs1_rs2_b28, Zbkc_clmulh_cg_cmp_rs1_rs2_b28_str) + 80005478: 0004b203 ld x4,0(x9) + 8000547c: 01620c63 beq x4,x22,80005494 + 80005480: 081022ef jal x5,80007d00 + 80005484: 80005474 .word 0x80005474 + 80005488: 00000000 .word 0x00000000 + 8000548c: 80016eda .word 0x80016eda + 80005490: 00000000 .word 0x00000000 + 80005494: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xdbd36f8aee47cf5f + 80005498: 0008be83 ld x29,0(x17) + 8000549c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x67709fd3245f4fe4 + 800054a0: 0008be83 ld x29,0(x17) + 800054a4: 00888893 addi x17,x17,8 + +00000000800054a8 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b29: + clmulh x11, x29, x29 # perform operation + 800054a8: 0bdeb5b3 clmulh x11,x29,x29 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkc_clmulh_cg_cmp_rs1_rs2_b29, Zbkc_clmulh_cg_cmp_rs1_rs2_b29_str) + 800054ac: 0004b203 ld x4,0(x9) + 800054b0: 00b20c63 beq x4,x11,800054c8 + 800054b4: 04d022ef jal x5,80007d00 + 800054b8: 800054a8 .word 0x800054a8 + 800054bc: 00000000 .word 0x00000000 + 800054c0: 80016f15 .word 0x80016f15 + 800054c4: 00000000 .word 0x00000000 + 800054c8: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xd09c9a64169e8f67 + 800054cc: 0008bf03 ld x30,0(x17) + 800054d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0xfcdf4d34ae26f585 + 800054d4: 0008bf03 ld x30,0(x17) + 800054d8: 00888893 addi x17,x17,8 + +00000000800054dc : +Zbkc_clmulh_cg_cmp_rs1_rs2_b30: + clmulh x21, x30, x30 # perform operation + 800054dc: 0bef3ab3 clmulh x21,x30,x30 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zbkc_clmulh_cg_cmp_rs1_rs2_b30, Zbkc_clmulh_cg_cmp_rs1_rs2_b30_str) + 800054e0: 0004b203 ld x4,0(x9) + 800054e4: 01520c63 beq x4,x21,800054fc + 800054e8: 019022ef jal x5,80007d00 + 800054ec: 800054dc .word 0x800054dc + 800054f0: 00000000 .word 0x00000000 + 800054f4: 80016f50 .word 0x80016f50 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x78ee3d806ea523ac + 80005500: 0008bf83 ld x31,0(x17) + 80005504: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0xb72c61fc12251c6c + 80005508: 0008bf83 ld x31,0(x17) + 8000550c: 00888893 addi x17,x17,8 + +0000000080005510 : +Zbkc_clmulh_cg_cmp_rs1_rs2_b31: + clmulh x11, x31, x31 # perform operation + 80005510: 0bffb5b3 clmulh x11,x31,x31 + # Check if x11 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x11, Zbkc_clmulh_cg_cmp_rs1_rs2_b31, Zbkc_clmulh_cg_cmp_rs1_rs2_b31_str) + 80005514: 0004b203 ld x4,0(x9) + 80005518: 00b20c63 beq x4,x11,80005530 + 8000551c: 7e4022ef jal x5,80007d00 + 80005520: 80005510 .word 0x80005510 + 80005524: 00000000 .word 0x00000000 + 80005528: 80016f8b .word 0x80016f8b + 8000552c: 00000000 .word 0x00000000 + 80005530: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xe1e82d2da4d75c15 + 80005534: 0008b003 ld x0,0(x17) + 80005538: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x8e36f740d49dd6ae + 8000553c: 0008b903 ld x18,0(x17) + 80005540: 00888893 addi x17,x17,8 + +0000000080005544 : +Zbkc_clmulh_cg_cmp_rd_rs1_b0: + clmulh x0, x0, x18 # perform operation + 80005544: 0b203033 clmulh x0,x0,x18 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zbkc_clmulh_cg_cmp_rd_rs1_b0, Zbkc_clmulh_cg_cmp_rd_rs1_b0_str) + 80005548: 0004b203 ld x4,0(x9) + 8000554c: 00020c63 beq x4,x0,80005564 + 80005550: 7b0022ef jal x5,80007d00 + 80005554: 80005544 .word 0x80005544 + 80005558: 00000000 .word 0x00000000 + 8000555c: 80016fc6 .word 0x80016fc6 + 80005560: 00000000 .word 0x00000000 + 80005564: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xf3819a25b02002cf + 80005568: 0008b083 ld x1,0(x17) + 8000556c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xd0f05f3b03f00158 + 80005570: 0008be03 ld x28,0(x17) + 80005574: 00888893 addi x17,x17,8 + +0000000080005578 : +Zbkc_clmulh_cg_cmp_rd_rs1_b1: + clmulh x1, x1, x28 # perform operation + 80005578: 0bc0b0b3 clmulh x1,x1,x28 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zbkc_clmulh_cg_cmp_rd_rs1_b1, Zbkc_clmulh_cg_cmp_rd_rs1_b1_str) + 8000557c: 0004b203 ld x4,0(x9) + 80005580: 00120c63 beq x4,x1,80005598 + 80005584: 77c022ef jal x5,80007d00 + 80005588: 80005578 .word 0x80005578 + 8000558c: 00000000 .word 0x00000000 + 80005590: 80016fff .word 0x80016fff + 80005594: 00000000 .word 0x00000000 + 80005598: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x2bdae213ee488739 + 8000559c: 0008b103 ld x2,0(x17) + 800055a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x3bdd91198fc5955c + 800055a4: 0008b583 ld x11,0(x17) + 800055a8: 00888893 addi x17,x17,8 + +00000000800055ac : +Zbkc_clmulh_cg_cmp_rd_rs1_b2: + clmulh x2, x2, x11 # perform operation + 800055ac: 0ab13133 clmulh x2,x2,x11 + # Check if x2 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x2, Zbkc_clmulh_cg_cmp_rd_rs1_b2, Zbkc_clmulh_cg_cmp_rd_rs1_b2_str) + 800055b0: 0004b203 ld x4,0(x9) + 800055b4: 00220c63 beq x4,x2,800055cc + 800055b8: 748022ef jal x5,80007d00 + 800055bc: 800055ac .word 0x800055ac + 800055c0: 00000000 .word 0x00000000 + 800055c4: 80017038 .word 0x80017038 + 800055c8: 00000000 .word 0x00000000 + 800055cc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xd02351cae65cf6fa + 800055d0: 0008b183 ld x3,0(x17) + 800055d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x71e61f39cd07fb46 + 800055d8: 0008b783 ld x15,0(x17) + 800055dc: 00888893 addi x17,x17,8 + +00000000800055e0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b3: + clmulh x3, x3, x15 # perform operation + 800055e0: 0af1b1b3 clmulh x3,x3,x15 + # Check if x3 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x3, Zbkc_clmulh_cg_cmp_rd_rs1_b3, Zbkc_clmulh_cg_cmp_rd_rs1_b3_str) + 800055e4: 0004b203 ld x4,0(x9) + 800055e8: 00320c63 beq x4,x3,80005600 + 800055ec: 714022ef jal x5,80007d00 + 800055f0: 800055e0 .word 0x800055e0 + 800055f4: 00000000 .word 0x00000000 + 800055f8: 80017071 .word 0x80017071 + 800055fc: 00000000 .word 0x00000000 + 80005600: 00848493 addi x9,x9,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005604: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005608: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0xc4a6f260347e818a + 8000560c: 0008b203 ld x4,0(x17) + 80005610: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x432994ce0a3dd062 + 80005614: 0008b903 ld x18,0(x17) + 80005618: 00888893 addi x17,x17,8 + +000000008000561c : +Zbkc_clmulh_cg_cmp_rd_rs1_b4: + clmulh x4, x4, x18 # perform operation + 8000561c: 0b223233 clmulh x4,x4,x18 + # Check if x4 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x4, Zbkc_clmulh_cg_cmp_rd_rs1_b4, Zbkc_clmulh_cg_cmp_rd_rs1_b4_str) + 80005620: 0004b683 ld x13,0(x9) + 80005624: 00468c63 beq x13,x4,8000563c + 80005628: 7180276f jal x14,80007d40 + 8000562c: 8000561c .word 0x8000561c + 80005630: 00000000 .word 0x00000000 + 80005634: 800170aa .word 0x800170aa + 80005638: 00000000 .word 0x00000000 + 8000563c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x2c1c78d660d35b3e + 80005640: 0008b283 ld x5,0(x17) + 80005644: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xe5ddbbc323532e05 + 80005648: 0008ba83 ld x21,0(x17) + 8000564c: 00888893 addi x17,x17,8 + +0000000080005650 : +Zbkc_clmulh_cg_cmp_rd_rs1_b5: + clmulh x5, x5, x21 # perform operation + 80005650: 0b52b2b3 clmulh x5,x5,x21 + # Check if x5 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x5, Zbkc_clmulh_cg_cmp_rd_rs1_b5, Zbkc_clmulh_cg_cmp_rd_rs1_b5_str) + 80005654: 0004b683 ld x13,0(x9) + 80005658: 00568c63 beq x13,x5,80005670 + 8000565c: 6e40276f jal x14,80007d40 + 80005660: 80005650 .word 0x80005650 + 80005664: 00000000 .word 0x00000000 + 80005668: 800170e3 .word 0x800170e3 + 8000566c: 00000000 .word 0x00000000 + 80005670: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x2e54fbf52b0d8073 + 80005674: 0008b303 ld x6,0(x17) + 80005678: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xd244f8cd91ad43b5 + 8000567c: 0008b983 ld x19,0(x17) + 80005680: 00888893 addi x17,x17,8 + +0000000080005684 : +Zbkc_clmulh_cg_cmp_rd_rs1_b6: + clmulh x6, x6, x19 # perform operation + 80005684: 0b333333 clmulh x6,x6,x19 + # Check if x6 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x6, Zbkc_clmulh_cg_cmp_rd_rs1_b6, Zbkc_clmulh_cg_cmp_rd_rs1_b6_str) + 80005688: 0004b683 ld x13,0(x9) + 8000568c: 00668c63 beq x13,x6,800056a4 + 80005690: 6b00276f jal x14,80007d40 + 80005694: 80005684 .word 0x80005684 + 80005698: 00000000 .word 0x00000000 + 8000569c: 8001711c .word 0x8001711c + 800056a0: 00000000 .word 0x00000000 + 800056a4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xd3eeb1de6301eafd + 800056a8: 0008b383 ld x7,0(x17) + 800056ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xc53279dfc814e37b + 800056b0: 0008bd03 ld x26,0(x17) + 800056b4: 00888893 addi x17,x17,8 + +00000000800056b8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b7: + clmulh x7, x7, x26 # perform operation + 800056b8: 0ba3b3b3 clmulh x7,x7,x26 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkc_clmulh_cg_cmp_rd_rs1_b7, Zbkc_clmulh_cg_cmp_rd_rs1_b7_str) + 800056bc: 0004b683 ld x13,0(x9) + 800056c0: 00768c63 beq x13,x7,800056d8 + 800056c4: 67c0276f jal x14,80007d40 + 800056c8: 800056b8 .word 0x800056b8 + 800056cc: 00000000 .word 0x00000000 + 800056d0: 80017155 .word 0x80017155 + 800056d4: 00000000 .word 0x00000000 + 800056d8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x3fffca9456197f46 + 800056dc: 0008b403 ld x8,0(x17) + 800056e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xe93a62717f17f4a9 + 800056e4: 0008b083 ld x1,0(x17) + 800056e8: 00888893 addi x17,x17,8 + +00000000800056ec : +Zbkc_clmulh_cg_cmp_rd_rs1_b8: + clmulh x8, x8, x1 # perform operation + 800056ec: 0a143433 clmulh x8,x8,x1 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zbkc_clmulh_cg_cmp_rd_rs1_b8, Zbkc_clmulh_cg_cmp_rd_rs1_b8_str) + 800056f0: 0004b683 ld x13,0(x9) + 800056f4: 00868c63 beq x13,x8,8000570c + 800056f8: 6480276f jal x14,80007d40 + 800056fc: 800056ec .word 0x800056ec + 80005700: 00000000 .word 0x00000000 + 80005704: 8001718e .word 0x8001718e + 80005708: 00000000 .word 0x00000000 + 8000570c: 00848493 addi x9,x9,8 + + mv x11, x9 # switch signature pointer register to avoid conflict with test + 80005710: 00048593 addi x11,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xb757ce6628cd2ff5 + 80005714: 0008b483 ld x9,0(x17) + 80005718: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x88ee7e8074cfc002 + 8000571c: 0008bd83 ld x27,0(x17) + 80005720: 00888893 addi x17,x17,8 + +0000000080005724 : +Zbkc_clmulh_cg_cmp_rd_rs1_b9: + clmulh x9, x9, x27 # perform operation + 80005724: 0bb4b4b3 clmulh x9,x9,x27 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zbkc_clmulh_cg_cmp_rd_rs1_b9, Zbkc_clmulh_cg_cmp_rd_rs1_b9_str) + 80005728: 0005b683 ld x13,0(x11) + 8000572c: 00968c63 beq x13,x9,80005744 + 80005730: 6100276f jal x14,80007d40 + 80005734: 80005724 .word 0x80005724 + 80005738: 00000000 .word 0x00000000 + 8000573c: 800171c7 .word 0x800171c7 + 80005740: 00000000 .word 0x00000000 + 80005744: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x45dff5634cd65c20 + 80005748: 0008b503 ld x10,0(x17) + 8000574c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x48481dd4f3e219a9 + 80005750: 0008b203 ld x4,0(x17) + 80005754: 00888893 addi x17,x17,8 + +0000000080005758 : +Zbkc_clmulh_cg_cmp_rd_rs1_b10: + clmulh x10, x10, x4 # perform operation + 80005758: 0a453533 clmulh x10,x10,x4 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zbkc_clmulh_cg_cmp_rd_rs1_b10, Zbkc_clmulh_cg_cmp_rd_rs1_b10_str) + 8000575c: 0005b683 ld x13,0(x11) + 80005760: 00a68c63 beq x13,x10,80005778 + 80005764: 5dc0276f jal x14,80007d40 + 80005768: 80005758 .word 0x80005758 + 8000576c: 00000000 .word 0x00000000 + 80005770: 80017200 .word 0x80017200 + 80005774: 00000000 .word 0x00000000 + 80005778: 00858593 addi x11,x11,8 + + mv x3, x11 # switch signature pointer register to avoid conflict with test + 8000577c: 00058193 addi x3,x11,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x588f7e80f1e06895 + 80005780: 0008b583 ld x11,0(x17) + 80005784: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xfe0e2a51d7c7616d + 80005788: 0008bd83 ld x27,0(x17) + 8000578c: 00888893 addi x17,x17,8 + +0000000080005790 : +Zbkc_clmulh_cg_cmp_rd_rs1_b11: + clmulh x11, x11, x27 # perform operation + 80005790: 0bb5b5b3 clmulh x11,x11,x27 + # Check if x11 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x11, Zbkc_clmulh_cg_cmp_rd_rs1_b11, Zbkc_clmulh_cg_cmp_rd_rs1_b11_str) + 80005794: 0001b683 ld x13,0(x3) + 80005798: 00b68c63 beq x13,x11,800057b0 + 8000579c: 5a40276f jal x14,80007d40 + 800057a0: 80005790 .word 0x80005790 + 800057a4: 00000000 .word 0x00000000 + 800057a8: 8001723a .word 0x8001723a + 800057ac: 00000000 .word 0x00000000 + 800057b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x7822abf0a5517572 + 800057b4: 0008b603 ld x12,0(x17) + 800057b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x2209061ffb7a7cec + 800057bc: 0008ba03 ld x20,0(x17) + 800057c0: 00888893 addi x17,x17,8 + +00000000800057c4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b12: + clmulh x12, x12, x20 # perform operation + 800057c4: 0b463633 clmulh x12,x12,x20 + # Check if x12 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x12, Zbkc_clmulh_cg_cmp_rd_rs1_b12, Zbkc_clmulh_cg_cmp_rd_rs1_b12_str) + 800057c8: 0001b683 ld x13,0(x3) + 800057cc: 00c68c63 beq x13,x12,800057e4 + 800057d0: 5700276f jal x14,80007d40 + 800057d4: 800057c4 .word 0x800057c4 + 800057d8: 00000000 .word 0x00000000 + 800057dc: 80017274 .word 0x80017274 + 800057e0: 00000000 .word 0x00000000 + 800057e4: 00818193 addi x3,x3,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800057e8: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800057ec: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xeda3b5a86171b8c5 + 800057f0: 0008b683 ld x13,0(x17) + 800057f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x9d4ca8e74ae02957 + 800057f8: 0008b383 ld x7,0(x17) + 800057fc: 00888893 addi x17,x17,8 + +0000000080005800 : +Zbkc_clmulh_cg_cmp_rd_rs1_b13: + clmulh x13, x13, x7 # perform operation + 80005800: 0a76b6b3 clmulh x13,x13,x7 + # Check if x13 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x13, Zbkc_clmulh_cg_cmp_rd_rs1_b13, Zbkc_clmulh_cg_cmp_rd_rs1_b13_str) + 80005804: 0001b203 ld x4,0(x3) + 80005808: 00d20c63 beq x4,x13,80005820 + 8000580c: 4f4022ef jal x5,80007d00 + 80005810: 80005800 .word 0x80005800 + 80005814: 00000000 .word 0x00000000 + 80005818: 800172ae .word 0x800172ae + 8000581c: 00000000 .word 0x00000000 + 80005820: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xa3a116c629609b63 + 80005824: 0008b703 ld x14,0(x17) + 80005828: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x20b5fbba7f369c87 + 8000582c: 0008ba03 ld x20,0(x17) + 80005830: 00888893 addi x17,x17,8 + +0000000080005834 : +Zbkc_clmulh_cg_cmp_rd_rs1_b14: + clmulh x14, x14, x20 # perform operation + 80005834: 0b473733 clmulh x14,x14,x20 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkc_clmulh_cg_cmp_rd_rs1_b14, Zbkc_clmulh_cg_cmp_rd_rs1_b14_str) + 80005838: 0001b203 ld x4,0(x3) + 8000583c: 00e20c63 beq x4,x14,80005854 + 80005840: 4c0022ef jal x5,80007d00 + 80005844: 80005834 .word 0x80005834 + 80005848: 00000000 .word 0x00000000 + 8000584c: 800172e8 .word 0x800172e8 + 80005850: 00000000 .word 0x00000000 + 80005854: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x8dc87ec6b2ed161c + 80005858: 0008b783 ld x15,0(x17) + 8000585c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x9e17d84c03398c20 + 80005860: 0008b583 ld x11,0(x17) + 80005864: 00888893 addi x17,x17,8 + +0000000080005868 : +Zbkc_clmulh_cg_cmp_rd_rs1_b15: + clmulh x15, x15, x11 # perform operation + 80005868: 0ab7b7b3 clmulh x15,x15,x11 + # Check if x15 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x15, Zbkc_clmulh_cg_cmp_rd_rs1_b15, Zbkc_clmulh_cg_cmp_rd_rs1_b15_str) + 8000586c: 0001b203 ld x4,0(x3) + 80005870: 00f20c63 beq x4,x15,80005888 + 80005874: 48c022ef jal x5,80007d00 + 80005878: 80005868 .word 0x80005868 + 8000587c: 00000000 .word 0x00000000 + 80005880: 80017322 .word 0x80017322 + 80005884: 00000000 .word 0x00000000 + 80005888: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xd3662b516c2e44fa + 8000588c: 0008b803 ld x16,0(x17) + 80005890: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xa2fd8d0e22fea37d + 80005894: 0008b103 ld x2,0(x17) + 80005898: 00888893 addi x17,x17,8 + +000000008000589c : +Zbkc_clmulh_cg_cmp_rd_rs1_b16: + clmulh x16, x16, x2 # perform operation + 8000589c: 0a283833 clmulh x16,x16,x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x16, Zbkc_clmulh_cg_cmp_rd_rs1_b16, Zbkc_clmulh_cg_cmp_rd_rs1_b16_str) + 800058a0: 0001b203 ld x4,0(x3) + 800058a4: 01020c63 beq x4,x16,800058bc + 800058a8: 458022ef jal x5,80007d00 + 800058ac: 8000589c .word 0x8000589c + 800058b0: 00000000 .word 0x00000000 + 800058b4: 8001735c .word 0x8001735c + 800058b8: 00000000 .word 0x00000000 + 800058bc: 00818193 addi x3,x3,8 + + mv x27, x17 # switch data pointer register to avoid conflict with test + 800058c0: 00088d93 addi x27,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xff08a01b65df84f5 + 800058c4: 000db883 ld x17,0(x27) + 800058c8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs2: x28 = 0x530384fbd3a129a2 + 800058cc: 000dbe03 ld x28,0(x27) + 800058d0: 008d8d93 addi x27,x27,8 + +00000000800058d4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b17: + clmulh x17, x17, x28 # perform operation + 800058d4: 0bc8b8b3 clmulh x17,x17,x28 + # Check if x17 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x17, Zbkc_clmulh_cg_cmp_rd_rs1_b17, Zbkc_clmulh_cg_cmp_rd_rs1_b17_str) + 800058d8: 0001b203 ld x4,0(x3) + 800058dc: 01120c63 beq x4,x17,800058f4 + 800058e0: 420022ef jal x5,80007d00 + 800058e4: 800058d4 .word 0x800058d4 + 800058e8: 00000000 .word 0x00000000 + 800058ec: 80017396 .word 0x80017396 + 800058f0: 00000000 .word 0x00000000 + 800058f4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0xc74a806faa0c7915 + 800058f8: 000db903 ld x18,0(x27) + 800058fc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x203c3731a80d0471 + 80005900: 000dba83 ld x21,0(x27) + 80005904: 008d8d93 addi x27,x27,8 + +0000000080005908 : +Zbkc_clmulh_cg_cmp_rd_rs1_b18: + clmulh x18, x18, x21 # perform operation + 80005908: 0b593933 clmulh x18,x18,x21 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkc_clmulh_cg_cmp_rd_rs1_b18, Zbkc_clmulh_cg_cmp_rd_rs1_b18_str) + 8000590c: 0001b203 ld x4,0(x3) + 80005910: 01220c63 beq x4,x18,80005928 + 80005914: 3ec022ef jal x5,80007d00 + 80005918: 80005908 .word 0x80005908 + 8000591c: 00000000 .word 0x00000000 + 80005920: 800173d0 .word 0x800173d0 + 80005924: 00000000 .word 0x00000000 + 80005928: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x4af875dacf162588 + 8000592c: 000db983 ld x19,0(x27) + 80005930: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0x13e9d8b4bd461a1f + 80005934: 000db403 ld x8,0(x27) + 80005938: 008d8d93 addi x27,x27,8 + +000000008000593c : +Zbkc_clmulh_cg_cmp_rd_rs1_b19: + clmulh x19, x19, x8 # perform operation + 8000593c: 0a89b9b3 clmulh x19,x19,x8 + # Check if x19 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x19, Zbkc_clmulh_cg_cmp_rd_rs1_b19, Zbkc_clmulh_cg_cmp_rd_rs1_b19_str) + 80005940: 0001b203 ld x4,0(x3) + 80005944: 01320c63 beq x4,x19,8000595c + 80005948: 3b8022ef jal x5,80007d00 + 8000594c: 8000593c .word 0x8000593c + 80005950: 00000000 .word 0x00000000 + 80005954: 8001740a .word 0x8001740a + 80005958: 00000000 .word 0x00000000 + 8000595c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xb4179e209bb729ec + 80005960: 000dba03 ld x20,0(x27) + 80005964: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x76d344d98cb6032c + 80005968: 000db583 ld x11,0(x27) + 8000596c: 008d8d93 addi x27,x27,8 + +0000000080005970 : +Zbkc_clmulh_cg_cmp_rd_rs1_b20: + clmulh x20, x20, x11 # perform operation + 80005970: 0aba3a33 clmulh x20,x20,x11 + # Check if x20 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x20, Zbkc_clmulh_cg_cmp_rd_rs1_b20, Zbkc_clmulh_cg_cmp_rd_rs1_b20_str) + 80005974: 0001b203 ld x4,0(x3) + 80005978: 01420c63 beq x4,x20,80005990 + 8000597c: 384022ef jal x5,80007d00 + 80005980: 80005970 .word 0x80005970 + 80005984: 00000000 .word 0x00000000 + 80005988: 80017444 .word 0x80017444 + 8000598c: 00000000 .word 0x00000000 + 80005990: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x3985606bc623a8a2 + 80005994: 000dba83 ld x21,0(x27) + 80005998: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0xa0752fa73848fc31 + 8000599c: 000db083 ld x1,0(x27) + 800059a0: 008d8d93 addi x27,x27,8 + +00000000800059a4 : +Zbkc_clmulh_cg_cmp_rd_rs1_b21: + clmulh x21, x21, x1 # perform operation + 800059a4: 0a1abab3 clmulh x21,x21,x1 + # Check if x21 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x21, Zbkc_clmulh_cg_cmp_rd_rs1_b21, Zbkc_clmulh_cg_cmp_rd_rs1_b21_str) + 800059a8: 0001b203 ld x4,0(x3) + 800059ac: 01520c63 beq x4,x21,800059c4 + 800059b0: 350022ef jal x5,80007d00 + 800059b4: 800059a4 .word 0x800059a4 + 800059b8: 00000000 .word 0x00000000 + 800059bc: 8001747e .word 0x8001747e + 800059c0: 00000000 .word 0x00000000 + 800059c4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x99ab9778bc176467 + 800059c8: 000dbb03 ld x22,0(x27) + 800059cc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs2: x29 = 0x743c43eeba9fe794 + 800059d0: 000dbe83 ld x29,0(x27) + 800059d4: 008d8d93 addi x27,x27,8 + +00000000800059d8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b22: + clmulh x22, x22, x29 # perform operation + 800059d8: 0bdb3b33 clmulh x22,x22,x29 + # Check if x22 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x22, Zbkc_clmulh_cg_cmp_rd_rs1_b22, Zbkc_clmulh_cg_cmp_rd_rs1_b22_str) + 800059dc: 0001b203 ld x4,0(x3) + 800059e0: 01620c63 beq x4,x22,800059f8 + 800059e4: 31c022ef jal x5,80007d00 + 800059e8: 800059d8 .word 0x800059d8 + 800059ec: 00000000 .word 0x00000000 + 800059f0: 800174b8 .word 0x800174b8 + 800059f4: 00000000 .word 0x00000000 + 800059f8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xe2831f640ca26205 + 800059fc: 000dbb83 ld x23,0(x27) + 80005a00: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0xcd73d9b05d06546f + 80005a04: 000db403 ld x8,0(x27) + 80005a08: 008d8d93 addi x27,x27,8 + +0000000080005a0c : +Zbkc_clmulh_cg_cmp_rd_rs1_b23: + clmulh x23, x23, x8 # perform operation + 80005a0c: 0a8bbbb3 clmulh x23,x23,x8 + # Check if x23 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x23, Zbkc_clmulh_cg_cmp_rd_rs1_b23, Zbkc_clmulh_cg_cmp_rd_rs1_b23_str) + 80005a10: 0001b203 ld x4,0(x3) + 80005a14: 01720c63 beq x4,x23,80005a2c + 80005a18: 2e8022ef jal x5,80007d00 + 80005a1c: 80005a0c .word 0x80005a0c + 80005a20: 00000000 .word 0x00000000 + 80005a24: 800174f2 .word 0x800174f2 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x9dca45cc99b25038 + 80005a30: 000dbc03 ld x24,0(x27) + 80005a34: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x2e4bb5cd6a6f9ce9 + 80005a38: 000db903 ld x18,0(x27) + 80005a3c: 008d8d93 addi x27,x27,8 + +0000000080005a40 : +Zbkc_clmulh_cg_cmp_rd_rs1_b24: + clmulh x24, x24, x18 # perform operation + 80005a40: 0b2c3c33 clmulh x24,x24,x18 + # Check if x24 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x24, Zbkc_clmulh_cg_cmp_rd_rs1_b24, Zbkc_clmulh_cg_cmp_rd_rs1_b24_str) + 80005a44: 0001b203 ld x4,0(x3) + 80005a48: 01820c63 beq x4,x24,80005a60 + 80005a4c: 2b4022ef jal x5,80007d00 + 80005a50: 80005a40 .word 0x80005a40 + 80005a54: 00000000 .word 0x00000000 + 80005a58: 8001752c .word 0x8001752c + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0xf7b0f30d465d8c43 + 80005a64: 000dbc83 ld x25,0(x27) + 80005a68: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0xc5084d58f6d9522e + 80005a6c: 000db403 ld x8,0(x27) + 80005a70: 008d8d93 addi x27,x27,8 + +0000000080005a74 : +Zbkc_clmulh_cg_cmp_rd_rs1_b25: + clmulh x25, x25, x8 # perform operation + 80005a74: 0a8cbcb3 clmulh x25,x25,x8 + # Check if x25 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x25, Zbkc_clmulh_cg_cmp_rd_rs1_b25, Zbkc_clmulh_cg_cmp_rd_rs1_b25_str) + 80005a78: 0001b203 ld x4,0(x3) + 80005a7c: 01920c63 beq x4,x25,80005a94 + 80005a80: 280022ef jal x5,80007d00 + 80005a84: 80005a74 .word 0x80005a74 + 80005a88: 00000000 .word 0x00000000 + 80005a8c: 80017566 .word 0x80017566 + 80005a90: 00000000 .word 0x00000000 + 80005a94: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x77b296bde88a8281 + 80005a98: 000dbd03 ld x26,0(x27) + 80005a9c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0xeb021f2846fe75bd + 80005aa0: 000db003 ld x0,0(x27) + 80005aa4: 008d8d93 addi x27,x27,8 + +0000000080005aa8 : +Zbkc_clmulh_cg_cmp_rd_rs1_b26: + clmulh x26, x26, x0 # perform operation + 80005aa8: 0a0d3d33 clmulh x26,x26,x0 + # Check if x26 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x26, Zbkc_clmulh_cg_cmp_rd_rs1_b26, Zbkc_clmulh_cg_cmp_rd_rs1_b26_str) + 80005aac: 0001b203 ld x4,0(x3) + 80005ab0: 01a20c63 beq x4,x26,80005ac8 + 80005ab4: 24c022ef jal x5,80007d00 + 80005ab8: 80005aa8 .word 0x80005aa8 + 80005abc: 00000000 .word 0x00000000 + 80005ac0: 800175a0 .word 0x800175a0 + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 00818193 addi x3,x3,8 + + mv x21, x27 # switch data pointer register to avoid conflict with test + 80005acc: 000d8a93 addi x21,x27,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xedd83df9e216d593 + 80005ad0: 000abd83 ld x27,0(x21) + 80005ad4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x823fba0008065aa8 + 80005ad8: 000ab483 ld x9,0(x21) + 80005adc: 008a8a93 addi x21,x21,8 + +0000000080005ae0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b27: + clmulh x27, x27, x9 # perform operation + 80005ae0: 0a9dbdb3 clmulh x27,x27,x9 + # Check if x27 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x27, Zbkc_clmulh_cg_cmp_rd_rs1_b27, Zbkc_clmulh_cg_cmp_rd_rs1_b27_str) + 80005ae4: 0001b203 ld x4,0(x3) + 80005ae8: 01b20c63 beq x4,x27,80005b00 + 80005aec: 214022ef jal x5,80007d00 + 80005af0: 80005ae0 .word 0x80005ae0 + 80005af4: 00000000 .word 0x00000000 + 80005af8: 800175da .word 0x800175da + 80005afc: 00000000 .word 0x00000000 + 80005b00: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xed65d8061f018aab + 80005b04: 000abe03 ld x28,0(x21) + 80005b08: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x4d1d9baed3fdb246 + 80005b0c: 000ab483 ld x9,0(x21) + 80005b10: 008a8a93 addi x21,x21,8 + +0000000080005b14 : +Zbkc_clmulh_cg_cmp_rd_rs1_b28: + clmulh x28, x28, x9 # perform operation + 80005b14: 0a9e3e33 clmulh x28,x28,x9 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zbkc_clmulh_cg_cmp_rd_rs1_b28, Zbkc_clmulh_cg_cmp_rd_rs1_b28_str) + 80005b18: 0001b203 ld x4,0(x3) + 80005b1c: 01c20c63 beq x4,x28,80005b34 + 80005b20: 1e0022ef jal x5,80007d00 + 80005b24: 80005b14 .word 0x80005b14 + 80005b28: 00000000 .word 0x00000000 + 80005b2c: 80017614 .word 0x80017614 + 80005b30: 00000000 .word 0x00000000 + 80005b34: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xb7959aaf42e48181 + 80005b38: 000abe83 ld x29,0(x21) + 80005b3c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xf01ef71c36a937ff + 80005b40: 000ab583 ld x11,0(x21) + 80005b44: 008a8a93 addi x21,x21,8 + +0000000080005b48 : +Zbkc_clmulh_cg_cmp_rd_rs1_b29: + clmulh x29, x29, x11 # perform operation + 80005b48: 0abebeb3 clmulh x29,x29,x11 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zbkc_clmulh_cg_cmp_rd_rs1_b29, Zbkc_clmulh_cg_cmp_rd_rs1_b29_str) + 80005b4c: 0001b203 ld x4,0(x3) + 80005b50: 01d20c63 beq x4,x29,80005b68 + 80005b54: 1ac022ef jal x5,80007d00 + 80005b58: 80005b48 .word 0x80005b48 + 80005b5c: 00000000 .word 0x00000000 + 80005b60: 8001764e .word 0x8001764e + 80005b64: 00000000 .word 0x00000000 + 80005b68: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xeff913dc3e004e7e + 80005b6c: 000abf03 ld x30,0(x21) + 80005b70: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x3aa75e8e49fe7a72 + 80005b74: 000ab083 ld x1,0(x21) + 80005b78: 008a8a93 addi x21,x21,8 + +0000000080005b7c : +Zbkc_clmulh_cg_cmp_rd_rs1_b30: + clmulh x30, x30, x1 # perform operation + 80005b7c: 0a1f3f33 clmulh x30,x30,x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zbkc_clmulh_cg_cmp_rd_rs1_b30, Zbkc_clmulh_cg_cmp_rd_rs1_b30_str) + 80005b80: 0001b203 ld x4,0(x3) + 80005b84: 01e20c63 beq x4,x30,80005b9c + 80005b88: 178022ef jal x5,80007d00 + 80005b8c: 80005b7c .word 0x80005b7c + 80005b90: 00000000 .word 0x00000000 + 80005b94: 80017688 .word 0x80017688 + 80005b98: 00000000 .word 0x00000000 + 80005b9c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xb1f34d6fc6cad40c + 80005ba0: 000abf83 ld x31,0(x21) + 80005ba4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xaf1182cbd2b52871 + 80005ba8: 000ab803 ld x16,0(x21) + 80005bac: 008a8a93 addi x21,x21,8 + +0000000080005bb0 : +Zbkc_clmulh_cg_cmp_rd_rs1_b31: + clmulh x31, x31, x16 # perform operation + 80005bb0: 0b0fbfb3 clmulh x31,x31,x16 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zbkc_clmulh_cg_cmp_rd_rs1_b31, Zbkc_clmulh_cg_cmp_rd_rs1_b31_str) + 80005bb4: 0001b203 ld x4,0(x3) + 80005bb8: 01f20c63 beq x4,x31,80005bd0 + 80005bbc: 144022ef jal x5,80007d00 + 80005bc0: 80005bb0 .word 0x80005bb0 + 80005bc4: 00000000 .word 0x00000000 + 80005bc8: 800176c2 .word 0x800176c2 + 80005bcc: 00000000 .word 0x00000000 + 80005bd0: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xe6964786b7b9aeba + 80005bd4: 000abf83 ld x31,0(x21) + 80005bd8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x16af3f0596c1d67a + 80005bdc: 000ab003 ld x0,0(x21) + 80005be0: 008a8a93 addi x21,x21,8 + +0000000080005be4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b0: + clmulh x0, x31, x0 # perform operation + 80005be4: 0a0fb033 clmulh x0,x31,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x0, Zbkc_clmulh_cg_cmp_rd_rs2_b0, Zbkc_clmulh_cg_cmp_rd_rs2_b0_str) + 80005be8: 0001b203 ld x4,0(x3) + 80005bec: 00020c63 beq x4,x0,80005c04 + 80005bf0: 110022ef jal x5,80007d00 + 80005bf4: 80005be4 .word 0x80005be4 + 80005bf8: 00000000 .word 0x00000000 + 80005bfc: 800176fc .word 0x800176fc + 80005c00: 00000000 .word 0x00000000 + 80005c04: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xb67522fc706416a1 + 80005c08: 000ab383 ld x7,0(x21) + 80005c0c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xb39d91291ca0a428 + 80005c10: 000ab083 ld x1,0(x21) + 80005c14: 008a8a93 addi x21,x21,8 + +0000000080005c18 : +Zbkc_clmulh_cg_cmp_rd_rs2_b1: + clmulh x1, x7, x1 # perform operation + 80005c18: 0a13b0b3 clmulh x1,x7,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x1, Zbkc_clmulh_cg_cmp_rd_rs2_b1, Zbkc_clmulh_cg_cmp_rd_rs2_b1_str) + 80005c1c: 0001b203 ld x4,0(x3) + 80005c20: 00120c63 beq x4,x1,80005c38 + 80005c24: 0dc022ef jal x5,80007d00 + 80005c28: 80005c18 .word 0x80005c18 + 80005c2c: 00000000 .word 0x00000000 + 80005c30: 80017735 .word 0x80017735 + 80005c34: 00000000 .word 0x00000000 + 80005c38: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0xa34584c25b3bab16 + 80005c3c: 000ab883 ld x17,0(x21) + 80005c40: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0x59d13780d8215734 + 80005c44: 000ab103 ld x2,0(x21) + 80005c48: 008a8a93 addi x21,x21,8 + +0000000080005c4c : +Zbkc_clmulh_cg_cmp_rd_rs2_b2: + clmulh x2, x17, x2 # perform operation + 80005c4c: 0a28b133 clmulh x2,x17,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x2, Zbkc_clmulh_cg_cmp_rd_rs2_b2, Zbkc_clmulh_cg_cmp_rd_rs2_b2_str) + 80005c50: 0001b203 ld x4,0(x3) + 80005c54: 00220c63 beq x4,x2,80005c6c + 80005c58: 0a8022ef jal x5,80007d00 + 80005c5c: 80005c4c .word 0x80005c4c + 80005c60: 00000000 .word 0x00000000 + 80005c64: 8001776e .word 0x8001776e + 80005c68: 00000000 .word 0x00000000 + 80005c6c: 00818193 addi x3,x3,8 + + mv x28, x3 # switch signature pointer register to avoid conflict with test + 80005c70: 00018e13 addi x28,x3,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x0e56f351a54eaf8a + 80005c74: 000ab803 ld x16,0(x21) + 80005c78: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xc0807d25441a6d84 + 80005c7c: 000ab183 ld x3,0(x21) + 80005c80: 008a8a93 addi x21,x21,8 + +0000000080005c84 : +Zbkc_clmulh_cg_cmp_rd_rs2_b3: + clmulh x3, x16, x3 # perform operation + 80005c84: 0a3831b3 clmulh x3,x16,x3 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zbkc_clmulh_cg_cmp_rd_rs2_b3, Zbkc_clmulh_cg_cmp_rd_rs2_b3_str) + 80005c88: 000e3203 ld x4,0(x28) + 80005c8c: 00320c63 beq x4,x3,80005ca4 + 80005c90: 070022ef jal x5,80007d00 + 80005c94: 80005c84 .word 0x80005c84 + 80005c98: 00000000 .word 0x00000000 + 80005c9c: 800177a7 .word 0x800177a7 + 80005ca0: 00000000 .word 0x00000000 + 80005ca4: 008e0e13 addi x28,x28,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005ca8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005cac: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0x9dfca7c3f5340de0 + 80005cb0: 000ab303 ld x6,0(x21) + 80005cb4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0xfa27a2ac5db7c576 + 80005cb8: 000ab203 ld x4,0(x21) + 80005cbc: 008a8a93 addi x21,x21,8 + +0000000080005cc0 : +Zbkc_clmulh_cg_cmp_rd_rs2_b4: + clmulh x4, x6, x4 # perform operation + 80005cc0: 0a433233 clmulh x4,x6,x4 + # Check if x4 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x4, Zbkc_clmulh_cg_cmp_rd_rs2_b4, Zbkc_clmulh_cg_cmp_rd_rs2_b4_str) + 80005cc4: 000e3683 ld x13,0(x28) + 80005cc8: 00468c63 beq x13,x4,80005ce0 + 80005ccc: 0740276f jal x14,80007d40 + 80005cd0: 80005cc0 .word 0x80005cc0 + 80005cd4: 00000000 .word 0x00000000 + 80005cd8: 800177e0 .word 0x800177e0 + 80005cdc: 00000000 .word 0x00000000 + 80005ce0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x35fccc119b83f824 + 80005ce4: 000abb83 ld x23,0(x21) + 80005ce8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x0d60c644f2ff1fc0 + 80005cec: 000ab283 ld x5,0(x21) + 80005cf0: 008a8a93 addi x21,x21,8 + +0000000080005cf4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b5: + clmulh x5, x23, x5 # perform operation + 80005cf4: 0a5bb2b3 clmulh x5,x23,x5 + # Check if x5 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x5, Zbkc_clmulh_cg_cmp_rd_rs2_b5, Zbkc_clmulh_cg_cmp_rd_rs2_b5_str) + 80005cf8: 000e3683 ld x13,0(x28) + 80005cfc: 00568c63 beq x13,x5,80005d14 + 80005d00: 0400276f jal x14,80007d40 + 80005d04: 80005cf4 .word 0x80005cf4 + 80005d08: 00000000 .word 0x00000000 + 80005d0c: 80017819 .word 0x80017819 + 80005d10: 00000000 .word 0x00000000 + 80005d14: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x7489d8dbb29ab5af + 80005d18: 000ab203 ld x4,0(x21) + 80005d1c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xc9a9a4b86e358641 + 80005d20: 000ab303 ld x6,0(x21) + 80005d24: 008a8a93 addi x21,x21,8 + +0000000080005d28 : +Zbkc_clmulh_cg_cmp_rd_rs2_b6: + clmulh x6, x4, x6 # perform operation + 80005d28: 0a623333 clmulh x6,x4,x6 + # Check if x6 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x6, Zbkc_clmulh_cg_cmp_rd_rs2_b6, Zbkc_clmulh_cg_cmp_rd_rs2_b6_str) + 80005d2c: 000e3683 ld x13,0(x28) + 80005d30: 00668c63 beq x13,x6,80005d48 + 80005d34: 00c0276f jal x14,80007d40 + 80005d38: 80005d28 .word 0x80005d28 + 80005d3c: 00000000 .word 0x00000000 + 80005d40: 80017852 .word 0x80017852 + 80005d44: 00000000 .word 0x00000000 + 80005d48: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x776a03ff000490d0 + 80005d4c: 000ab283 ld x5,0(x21) + 80005d50: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x74025137f745fdce + 80005d54: 000ab383 ld x7,0(x21) + 80005d58: 008a8a93 addi x21,x21,8 + +0000000080005d5c : +Zbkc_clmulh_cg_cmp_rd_rs2_b7: + clmulh x7, x5, x7 # perform operation + 80005d5c: 0a72b3b3 clmulh x7,x5,x7 + # Check if x7 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x7, Zbkc_clmulh_cg_cmp_rd_rs2_b7, Zbkc_clmulh_cg_cmp_rd_rs2_b7_str) + 80005d60: 000e3683 ld x13,0(x28) + 80005d64: 00768c63 beq x13,x7,80005d7c + 80005d68: 7d90176f jal x14,80007d40 + 80005d6c: 80005d5c .word 0x80005d5c + 80005d70: 00000000 .word 0x00000000 + 80005d74: 8001788b .word 0x8001788b + 80005d78: 00000000 .word 0x00000000 + 80005d7c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xfefec4a286969ff2 + 80005d80: 000abd83 ld x27,0(x21) + 80005d84: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xafd285bdbc3a0054 + 80005d88: 000ab403 ld x8,0(x21) + 80005d8c: 008a8a93 addi x21,x21,8 + +0000000080005d90 : +Zbkc_clmulh_cg_cmp_rd_rs2_b8: + clmulh x8, x27, x8 # perform operation + 80005d90: 0a8db433 clmulh x8,x27,x8 + # Check if x8 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x8, Zbkc_clmulh_cg_cmp_rd_rs2_b8, Zbkc_clmulh_cg_cmp_rd_rs2_b8_str) + 80005d94: 000e3683 ld x13,0(x28) + 80005d98: 00868c63 beq x13,x8,80005db0 + 80005d9c: 7a50176f jal x14,80007d40 + 80005da0: 80005d90 .word 0x80005d90 + 80005da4: 00000000 .word 0x00000000 + 80005da8: 800178c4 .word 0x800178c4 + 80005dac: 00000000 .word 0x00000000 + 80005db0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xe0bf2429724a0bf2 + 80005db4: 000abb83 ld x23,0(x21) + 80005db8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xb7af6dee6a8024fc + 80005dbc: 000ab483 ld x9,0(x21) + 80005dc0: 008a8a93 addi x21,x21,8 + +0000000080005dc4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b9: + clmulh x9, x23, x9 # perform operation + 80005dc4: 0a9bb4b3 clmulh x9,x23,x9 + # Check if x9 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x9, Zbkc_clmulh_cg_cmp_rd_rs2_b9, Zbkc_clmulh_cg_cmp_rd_rs2_b9_str) + 80005dc8: 000e3683 ld x13,0(x28) + 80005dcc: 00968c63 beq x13,x9,80005de4 + 80005dd0: 7710176f jal x14,80007d40 + 80005dd4: 80005dc4 .word 0x80005dc4 + 80005dd8: 00000000 .word 0x00000000 + 80005ddc: 800178fd .word 0x800178fd + 80005de0: 00000000 .word 0x00000000 + 80005de4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x854b379e98fa3ea5 + 80005de8: 000ab983 ld x19,0(x21) + 80005dec: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xd323d551dfb4e359 + 80005df0: 000ab503 ld x10,0(x21) + 80005df4: 008a8a93 addi x21,x21,8 + +0000000080005df8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b10: + clmulh x10, x19, x10 # perform operation + 80005df8: 0aa9b533 clmulh x10,x19,x10 + # Check if x10 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x10, Zbkc_clmulh_cg_cmp_rd_rs2_b10, Zbkc_clmulh_cg_cmp_rd_rs2_b10_str) + 80005dfc: 000e3683 ld x13,0(x28) + 80005e00: 00a68c63 beq x13,x10,80005e18 + 80005e04: 73d0176f jal x14,80007d40 + 80005e08: 80005df8 .word 0x80005df8 + 80005e0c: 00000000 .word 0x00000000 + 80005e10: 80017936 .word 0x80017936 + 80005e14: 00000000 .word 0x00000000 + 80005e18: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x7fa4b2dc23a072be + 80005e1c: 000ab103 ld x2,0(x21) + 80005e20: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0xf6ecf82f24c2679d + 80005e24: 000ab583 ld x11,0(x21) + 80005e28: 008a8a93 addi x21,x21,8 + +0000000080005e2c : +Zbkc_clmulh_cg_cmp_rd_rs2_b11: + clmulh x11, x2, x11 # perform operation + 80005e2c: 0ab135b3 clmulh x11,x2,x11 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zbkc_clmulh_cg_cmp_rd_rs2_b11, Zbkc_clmulh_cg_cmp_rd_rs2_b11_str) + 80005e30: 000e3683 ld x13,0(x28) + 80005e34: 00b68c63 beq x13,x11,80005e4c + 80005e38: 7090176f jal x14,80007d40 + 80005e3c: 80005e2c .word 0x80005e2c + 80005e40: 00000000 .word 0x00000000 + 80005e44: 80017970 .word 0x80017970 + 80005e48: 00000000 .word 0x00000000 + 80005e4c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc7b631cb69891eba + 80005e50: 000ab983 ld x19,0(x21) + 80005e54: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x3a4366613bdc00e4 + 80005e58: 000ab603 ld x12,0(x21) + 80005e5c: 008a8a93 addi x21,x21,8 + +0000000080005e60 : +Zbkc_clmulh_cg_cmp_rd_rs2_b12: + clmulh x12, x19, x12 # perform operation + 80005e60: 0ac9b633 clmulh x12,x19,x12 + # Check if x12 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x12, Zbkc_clmulh_cg_cmp_rd_rs2_b12, Zbkc_clmulh_cg_cmp_rd_rs2_b12_str) + 80005e64: 000e3683 ld x13,0(x28) + 80005e68: 00c68c63 beq x13,x12,80005e80 + 80005e6c: 6d50176f jal x14,80007d40 + 80005e70: 80005e60 .word 0x80005e60 + 80005e74: 00000000 .word 0x00000000 + 80005e78: 800179aa .word 0x800179aa + 80005e7c: 00000000 .word 0x00000000 + 80005e80: 008e0e13 addi x28,x28,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e84: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005e88: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x5d55a2f807cd6600 + 80005e8c: 000ab383 ld x7,0(x21) + 80005e90: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0xdcf4fcf87de82c03 + 80005e94: 000ab683 ld x13,0(x21) + 80005e98: 008a8a93 addi x21,x21,8 + +0000000080005e9c : +Zbkc_clmulh_cg_cmp_rd_rs2_b13: + clmulh x13, x7, x13 # perform operation + 80005e9c: 0ad3b6b3 clmulh x13,x7,x13 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zbkc_clmulh_cg_cmp_rd_rs2_b13, Zbkc_clmulh_cg_cmp_rd_rs2_b13_str) + 80005ea0: 000e3203 ld x4,0(x28) + 80005ea4: 00d20c63 beq x4,x13,80005ebc + 80005ea8: 659012ef jal x5,80007d00 + 80005eac: 80005e9c .word 0x80005e9c + 80005eb0: 00000000 .word 0x00000000 + 80005eb4: 800179e4 .word 0x800179e4 + 80005eb8: 00000000 .word 0x00000000 + 80005ebc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xa9120d4d527a67b3 + 80005ec0: 000aba03 ld x20,0(x21) + 80005ec4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x3323e6e741254256 + 80005ec8: 000ab703 ld x14,0(x21) + 80005ecc: 008a8a93 addi x21,x21,8 + +0000000080005ed0 : +Zbkc_clmulh_cg_cmp_rd_rs2_b14: + clmulh x14, x20, x14 # perform operation + 80005ed0: 0aea3733 clmulh x14,x20,x14 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zbkc_clmulh_cg_cmp_rd_rs2_b14, Zbkc_clmulh_cg_cmp_rd_rs2_b14_str) + 80005ed4: 000e3203 ld x4,0(x28) + 80005ed8: 00e20c63 beq x4,x14,80005ef0 + 80005edc: 625012ef jal x5,80007d00 + 80005ee0: 80005ed0 .word 0x80005ed0 + 80005ee4: 00000000 .word 0x00000000 + 80005ee8: 80017a1e .word 0x80017a1e + 80005eec: 00000000 .word 0x00000000 + 80005ef0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x839419303921a038 + 80005ef4: 000ab383 ld x7,0(x21) + 80005ef8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x45574c6e2a2a9559 + 80005efc: 000ab783 ld x15,0(x21) + 80005f00: 008a8a93 addi x21,x21,8 + +0000000080005f04 : +Zbkc_clmulh_cg_cmp_rd_rs2_b15: + clmulh x15, x7, x15 # perform operation + 80005f04: 0af3b7b3 clmulh x15,x7,x15 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zbkc_clmulh_cg_cmp_rd_rs2_b15, Zbkc_clmulh_cg_cmp_rd_rs2_b15_str) + 80005f08: 000e3203 ld x4,0(x28) + 80005f0c: 00f20c63 beq x4,x15,80005f24 + 80005f10: 5f1012ef jal x5,80007d00 + 80005f14: 80005f04 .word 0x80005f04 + 80005f18: 00000000 .word 0x00000000 + 80005f1c: 80017a58 .word 0x80017a58 + 80005f20: 00000000 .word 0x00000000 + 80005f24: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x46974e85b05a2f9a + 80005f28: 000ab783 ld x15,0(x21) + 80005f2c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x7f60e49b8673bd17 + 80005f30: 000ab803 ld x16,0(x21) + 80005f34: 008a8a93 addi x21,x21,8 + +0000000080005f38 : +Zbkc_clmulh_cg_cmp_rd_rs2_b16: + clmulh x16, x15, x16 # perform operation + 80005f38: 0b07b833 clmulh x16,x15,x16 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zbkc_clmulh_cg_cmp_rd_rs2_b16, Zbkc_clmulh_cg_cmp_rd_rs2_b16_str) + 80005f3c: 000e3203 ld x4,0(x28) + 80005f40: 01020c63 beq x4,x16,80005f58 + 80005f44: 5bd012ef jal x5,80007d00 + 80005f48: 80005f38 .word 0x80005f38 + 80005f4c: 00000000 .word 0x00000000 + 80005f50: 80017a92 .word 0x80017a92 + 80005f54: 00000000 .word 0x00000000 + 80005f58: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x33dff55f08818b80 + 80005f5c: 000ab003 ld x0,0(x21) + 80005f60: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xd50f463cf3fbc800 + 80005f64: 000ab883 ld x17,0(x21) + 80005f68: 008a8a93 addi x21,x21,8 + +0000000080005f6c : +Zbkc_clmulh_cg_cmp_rd_rs2_b17: + clmulh x17, x0, x17 # perform operation + 80005f6c: 0b1038b3 clmulh x17,x0,x17 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zbkc_clmulh_cg_cmp_rd_rs2_b17, Zbkc_clmulh_cg_cmp_rd_rs2_b17_str) + 80005f70: 000e3203 ld x4,0(x28) + 80005f74: 01120c63 beq x4,x17,80005f8c + 80005f78: 589012ef jal x5,80007d00 + 80005f7c: 80005f6c .word 0x80005f6c + 80005f80: 00000000 .word 0x00000000 + 80005f84: 80017acc .word 0x80017acc + 80005f88: 00000000 .word 0x00000000 + 80005f8c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xceb91f03bd3fcc0f + 80005f90: 000ab683 ld x13,0(x21) + 80005f94: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xf5b2103ee0b44539 + 80005f98: 000ab903 ld x18,0(x21) + 80005f9c: 008a8a93 addi x21,x21,8 + +0000000080005fa0 : +Zbkc_clmulh_cg_cmp_rd_rs2_b18: + clmulh x18, x13, x18 # perform operation + 80005fa0: 0b26b933 clmulh x18,x13,x18 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zbkc_clmulh_cg_cmp_rd_rs2_b18, Zbkc_clmulh_cg_cmp_rd_rs2_b18_str) + 80005fa4: 000e3203 ld x4,0(x28) + 80005fa8: 01220c63 beq x4,x18,80005fc0 + 80005fac: 555012ef jal x5,80007d00 + 80005fb0: 80005fa0 .word 0x80005fa0 + 80005fb4: 00000000 .word 0x00000000 + 80005fb8: 80017b06 .word 0x80017b06 + 80005fbc: 00000000 .word 0x00000000 + 80005fc0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x2bfc639b35c1953b + 80005fc4: 000ab883 ld x17,0(x21) + 80005fc8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xa9fa7c4010886761 + 80005fcc: 000ab983 ld x19,0(x21) + 80005fd0: 008a8a93 addi x21,x21,8 + +0000000080005fd4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b19: + clmulh x19, x17, x19 # perform operation + 80005fd4: 0b38b9b3 clmulh x19,x17,x19 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zbkc_clmulh_cg_cmp_rd_rs2_b19, Zbkc_clmulh_cg_cmp_rd_rs2_b19_str) + 80005fd8: 000e3203 ld x4,0(x28) + 80005fdc: 01320c63 beq x4,x19,80005ff4 + 80005fe0: 521012ef jal x5,80007d00 + 80005fe4: 80005fd4 .word 0x80005fd4 + 80005fe8: 00000000 .word 0x00000000 + 80005fec: 80017b40 .word 0x80017b40 + 80005ff0: 00000000 .word 0x00000000 + 80005ff4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x3888f4d364a0cbb9 + 80005ff8: 000ab003 ld x0,0(x21) + 80005ffc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xec8e7081f2b7d5ed + 80006000: 000aba03 ld x20,0(x21) + 80006004: 008a8a93 addi x21,x21,8 + +0000000080006008 : +Zbkc_clmulh_cg_cmp_rd_rs2_b20: + clmulh x20, x0, x20 # perform operation + 80006008: 0b403a33 clmulh x20,x0,x20 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zbkc_clmulh_cg_cmp_rd_rs2_b20, Zbkc_clmulh_cg_cmp_rd_rs2_b20_str) + 8000600c: 000e3203 ld x4,0(x28) + 80006010: 01420c63 beq x4,x20,80006028 + 80006014: 4ed012ef jal x5,80007d00 + 80006018: 80006008 .word 0x80006008 + 8000601c: 00000000 .word 0x00000000 + 80006020: 80017b7a .word 0x80017b7a + 80006024: 00000000 .word 0x00000000 + 80006028: 008e0e13 addi x28,x28,8 + + mv x25, x21 # switch data pointer register to avoid conflict with test + 8000602c: 000a8c93 addi x25,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xc70604223d60f694 + 80006030: 000cb903 ld x18,0(x25) + 80006034: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0xa42fb6ae3a6b97b3 + 80006038: 000cba83 ld x21,0(x25) + 8000603c: 008c8c93 addi x25,x25,8 + +0000000080006040 : +Zbkc_clmulh_cg_cmp_rd_rs2_b21: + clmulh x21, x18, x21 # perform operation + 80006040: 0b593ab3 clmulh x21,x18,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zbkc_clmulh_cg_cmp_rd_rs2_b21, Zbkc_clmulh_cg_cmp_rd_rs2_b21_str) + 80006044: 000e3203 ld x4,0(x28) + 80006048: 01520c63 beq x4,x21,80006060 + 8000604c: 4b5012ef jal x5,80007d00 + 80006050: 80006040 .word 0x80006040 + 80006054: 00000000 .word 0x00000000 + 80006058: 80017bb4 .word 0x80017bb4 + 8000605c: 00000000 .word 0x00000000 + 80006060: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x13f06d25111f5c30 + 80006064: 000cb803 ld x16,0(x25) + 80006068: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0xc3bf3f099de5be79 + 8000606c: 000cbb03 ld x22,0(x25) + 80006070: 008c8c93 addi x25,x25,8 + +0000000080006074 : +Zbkc_clmulh_cg_cmp_rd_rs2_b22: + clmulh x22, x16, x22 # perform operation + 80006074: 0b683b33 clmulh x22,x16,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zbkc_clmulh_cg_cmp_rd_rs2_b22, Zbkc_clmulh_cg_cmp_rd_rs2_b22_str) + 80006078: 000e3203 ld x4,0(x28) + 8000607c: 01620c63 beq x4,x22,80006094 + 80006080: 481012ef jal x5,80007d00 + 80006084: 80006074 .word 0x80006074 + 80006088: 00000000 .word 0x00000000 + 8000608c: 80017bee .word 0x80017bee + 80006090: 00000000 .word 0x00000000 + 80006094: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x8ab224fc06a9551c + 80006098: 000cb483 ld x9,0(x25) + 8000609c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xa63ded29bc11a46f + 800060a0: 000cbb83 ld x23,0(x25) + 800060a4: 008c8c93 addi x25,x25,8 + +00000000800060a8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b23: + clmulh x23, x9, x23 # perform operation + 800060a8: 0b74bbb3 clmulh x23,x9,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zbkc_clmulh_cg_cmp_rd_rs2_b23, Zbkc_clmulh_cg_cmp_rd_rs2_b23_str) + 800060ac: 000e3203 ld x4,0(x28) + 800060b0: 01720c63 beq x4,x23,800060c8 + 800060b4: 44d012ef jal x5,80007d00 + 800060b8: 800060a8 .word 0x800060a8 + 800060bc: 00000000 .word 0x00000000 + 800060c0: 80017c28 .word 0x80017c28 + 800060c4: 00000000 .word 0x00000000 + 800060c8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x0a840a63ad391039 + 800060cc: 000cba03 ld x20,0(x25) + 800060d0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x50266dd50cea14e3 + 800060d4: 000cbc03 ld x24,0(x25) + 800060d8: 008c8c93 addi x25,x25,8 + +00000000800060dc : +Zbkc_clmulh_cg_cmp_rd_rs2_b24: + clmulh x24, x20, x24 # perform operation + 800060dc: 0b8a3c33 clmulh x24,x20,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zbkc_clmulh_cg_cmp_rd_rs2_b24, Zbkc_clmulh_cg_cmp_rd_rs2_b24_str) + 800060e0: 000e3203 ld x4,0(x28) + 800060e4: 01820c63 beq x4,x24,800060fc + 800060e8: 419012ef jal x5,80007d00 + 800060ec: 800060dc .word 0x800060dc + 800060f0: 00000000 .word 0x00000000 + 800060f4: 80017c62 .word 0x80017c62 + 800060f8: 00000000 .word 0x00000000 + 800060fc: 008e0e13 addi x28,x28,8 + + mv x9, x25 # switch data pointer register to avoid conflict with test + 80006100: 000c8493 addi x9,x25,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x4a87af16d5df2c43 + 80006104: 0004b883 ld x17,0(x9) + 80006108: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xa18adf6ae1044aa5 + 8000610c: 0004bc83 ld x25,0(x9) + 80006110: 00848493 addi x9,x9,8 + +0000000080006114 : +Zbkc_clmulh_cg_cmp_rd_rs2_b25: + clmulh x25, x17, x25 # perform operation + 80006114: 0b98bcb3 clmulh x25,x17,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zbkc_clmulh_cg_cmp_rd_rs2_b25, Zbkc_clmulh_cg_cmp_rd_rs2_b25_str) + 80006118: 000e3203 ld x4,0(x28) + 8000611c: 01920c63 beq x4,x25,80006134 + 80006120: 3e1012ef jal x5,80007d00 + 80006124: 80006114 .word 0x80006114 + 80006128: 00000000 .word 0x00000000 + 8000612c: 80017c9c .word 0x80017c9c + 80006130: 00000000 .word 0x00000000 + 80006134: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xd35a7168f0e9250f + 80006138: 0004bb03 ld x22,0(x9) + 8000613c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x49ad89481ade34e4 + 80006140: 0004bd03 ld x26,0(x9) + 80006144: 00848493 addi x9,x9,8 + +0000000080006148 : +Zbkc_clmulh_cg_cmp_rd_rs2_b26: + clmulh x26, x22, x26 # perform operation + 80006148: 0bab3d33 clmulh x26,x22,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zbkc_clmulh_cg_cmp_rd_rs2_b26, Zbkc_clmulh_cg_cmp_rd_rs2_b26_str) + 8000614c: 000e3203 ld x4,0(x28) + 80006150: 01a20c63 beq x4,x26,80006168 + 80006154: 3ad012ef jal x5,80007d00 + 80006158: 80006148 .word 0x80006148 + 8000615c: 00000000 .word 0x00000000 + 80006160: 80017cd6 .word 0x80017cd6 + 80006164: 00000000 .word 0x00000000 + 80006168: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2995e2beda4a7aa9 + 8000616c: 0004bd03 ld x26,0(x9) + 80006170: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x539db7e073c90331 + 80006174: 0004bd83 ld x27,0(x9) + 80006178: 00848493 addi x9,x9,8 + +000000008000617c : +Zbkc_clmulh_cg_cmp_rd_rs2_b27: + clmulh x27, x26, x27 # perform operation + 8000617c: 0bbd3db3 clmulh x27,x26,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zbkc_clmulh_cg_cmp_rd_rs2_b27, Zbkc_clmulh_cg_cmp_rd_rs2_b27_str) + 80006180: 000e3203 ld x4,0(x28) + 80006184: 01b20c63 beq x4,x27,8000619c + 80006188: 379012ef jal x5,80007d00 + 8000618c: 8000617c .word 0x8000617c + 80006190: 00000000 .word 0x00000000 + 80006194: 80017d10 .word 0x80017d10 + 80006198: 00000000 .word 0x00000000 + 8000619c: 008e0e13 addi x28,x28,8 + + mv x31, x28 # switch signature pointer register to avoid conflict with test + 800061a0: 000e0f93 addi x31,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xb90e5c3182519723 + 800061a4: 0004b703 ld x14,0(x9) + 800061a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x45659a6279e39cb7 + 800061ac: 0004be03 ld x28,0(x9) + 800061b0: 00848493 addi x9,x9,8 + +00000000800061b4 : +Zbkc_clmulh_cg_cmp_rd_rs2_b28: + clmulh x28, x14, x28 # perform operation + 800061b4: 0bc73e33 clmulh x28,x14,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zbkc_clmulh_cg_cmp_rd_rs2_b28, Zbkc_clmulh_cg_cmp_rd_rs2_b28_str) + 800061b8: 000fb203 ld x4,0(x31) + 800061bc: 01c20c63 beq x4,x28,800061d4 + 800061c0: 341012ef jal x5,80007d00 + 800061c4: 800061b4 .word 0x800061b4 + 800061c8: 00000000 .word 0x00000000 + 800061cc: 80017d4a .word 0x80017d4a + 800061d0: 00000000 .word 0x00000000 + 800061d4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xdc202c4c4563f58c + 800061d8: 0004ba83 ld x21,0(x9) + 800061dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x31a8082c70f40c00 + 800061e0: 0004be83 ld x29,0(x9) + 800061e4: 00848493 addi x9,x9,8 + +00000000800061e8 : +Zbkc_clmulh_cg_cmp_rd_rs2_b29: + clmulh x29, x21, x29 # perform operation + 800061e8: 0bdabeb3 clmulh x29,x21,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zbkc_clmulh_cg_cmp_rd_rs2_b29, Zbkc_clmulh_cg_cmp_rd_rs2_b29_str) + 800061ec: 000fb203 ld x4,0(x31) + 800061f0: 01d20c63 beq x4,x29,80006208 + 800061f4: 30d012ef jal x5,80007d00 + 800061f8: 800061e8 .word 0x800061e8 + 800061fc: 00000000 .word 0x00000000 + 80006200: 80017d84 .word 0x80017d84 + 80006204: 00000000 .word 0x00000000 + 80006208: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x5f82f1777dbfa394 + 8000620c: 0004bd03 ld x26,0(x9) + 80006210: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x5685d4bbff6d3e4b + 80006214: 0004bf03 ld x30,0(x9) + 80006218: 00848493 addi x9,x9,8 + +000000008000621c : +Zbkc_clmulh_cg_cmp_rd_rs2_b30: + clmulh x30, x26, x30 # perform operation + 8000621c: 0bed3f33 clmulh x30,x26,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zbkc_clmulh_cg_cmp_rd_rs2_b30, Zbkc_clmulh_cg_cmp_rd_rs2_b30_str) + 80006220: 000fb203 ld x4,0(x31) + 80006224: 01e20c63 beq x4,x30,8000623c + 80006228: 2d9012ef jal x5,80007d00 + 8000622c: 8000621c .word 0x8000621c + 80006230: 00000000 .word 0x00000000 + 80006234: 80017dbe .word 0x80017dbe + 80006238: 00000000 .word 0x00000000 + 8000623c: 008f8f93 addi x31,x31,8 + + mv x17, x31 # switch signature pointer register to avoid conflict with test + 80006240: 000f8893 addi x17,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x284e78fd8a65be43 + 80006244: 0004bc83 ld x25,0(x9) + 80006248: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x25e05a136fef00da + 8000624c: 0004bf83 ld x31,0(x9) + 80006250: 00848493 addi x9,x9,8 + +0000000080006254 : +Zbkc_clmulh_cg_cmp_rd_rs2_b31: + clmulh x31, x25, x31 # perform operation + 80006254: 0bfcbfb3 clmulh x31,x25,x31 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkc_clmulh_cg_cmp_rd_rs2_b31, Zbkc_clmulh_cg_cmp_rd_rs2_b31_str) + 80006258: 0008b203 ld x4,0(x17) + 8000625c: 01f20c63 beq x4,x31,80006274 + 80006260: 2a1012ef jal x5,80007d00 + 80006264: 80006254 .word 0x80006254 + 80006268: 00000000 .word 0x00000000 + 8000626c: 80017df8 .word 0x80017df8 + 80006270: 00000000 .word 0x00000000 + 80006274: 00888893 addi x17,x17,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x8fbcdf15c36b63f5 + 80006278: 0004b003 ld x0,0(x9) + 8000627c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xb1e82bb9637e8ad9 + 80006280: 0004b003 ld x0,0(x9) + 80006284: 00848493 addi x9,x9,8 + +0000000080006288 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0: + clmulh x0, x0, x0 # perform operation + 80006288: 0a003033 clmulh x0,x0,x0 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b0_str) + 8000628c: 0008b203 ld x4,0(x17) + 80006290: 00020c63 beq x4,x0,800062a8 + 80006294: 26d012ef jal x5,80007d00 + 80006298: 80006288 .word 0x80006288 + 8000629c: 00000000 .word 0x00000000 + 800062a0: 80017e32 .word 0x80017e32 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x1f196bc52e110dd8 + 800062ac: 0004b083 ld x1,0(x9) + 800062b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x44fb43722df7cf9c + 800062b4: 0004b083 ld x1,0(x9) + 800062b8: 00848493 addi x9,x9,8 + +00000000800062bc : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1: + clmulh x1, x1, x1 # perform operation + 800062bc: 0a10b0b3 clmulh x1,x1,x1 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b1_str) + 800062c0: 0008b203 ld x4,0(x17) + 800062c4: 00120c63 beq x4,x1,800062dc + 800062c8: 239012ef jal x5,80007d00 + 800062cc: 800062bc .word 0x800062bc + 800062d0: 00000000 .word 0x00000000 + 800062d4: 80017e6f .word 0x80017e6f + 800062d8: 00000000 .word 0x00000000 + 800062dc: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x878fc40786c3e529 + 800062e0: 0004b103 ld x2,0(x9) + 800062e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xaedfdd6b3276a840 + 800062e8: 0004b103 ld x2,0(x9) + 800062ec: 00848493 addi x9,x9,8 + +00000000800062f0 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2: + clmulh x2, x2, x2 # perform operation + 800062f0: 0a213133 clmulh x2,x2,x2 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b2_str) + 800062f4: 0008b203 ld x4,0(x17) + 800062f8: 00220c63 beq x4,x2,80006310 + 800062fc: 205012ef jal x5,80007d00 + 80006300: 800062f0 .word 0x800062f0 + 80006304: 00000000 .word 0x00000000 + 80006308: 80017eac .word 0x80017eac + 8000630c: 00000000 .word 0x00000000 + 80006310: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x9904787159700b9f + 80006314: 0004b183 ld x3,0(x9) + 80006318: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xddd81e57fd163ef3 + 8000631c: 0004b183 ld x3,0(x9) + 80006320: 00848493 addi x9,x9,8 + +0000000080006324 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3: + clmulh x3, x3, x3 # perform operation + 80006324: 0a31b1b3 clmulh x3,x3,x3 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b3_str) + 80006328: 0008b203 ld x4,0(x17) + 8000632c: 00320c63 beq x4,x3,80006344 + 80006330: 1d1012ef jal x5,80007d00 + 80006334: 80006324 .word 0x80006324 + 80006338: 00000000 .word 0x00000000 + 8000633c: 80017ee9 .word 0x80017ee9 + 80006340: 00000000 .word 0x00000000 + 80006344: 00888893 addi x17,x17,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006348: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000634c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x39b8eb40bd1cd7de + 80006350: 0004b203 ld x4,0(x9) + 80006354: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xd6ecd28c245a3fa2 + 80006358: 0004b203 ld x4,0(x9) + 8000635c: 00848493 addi x9,x9,8 + +0000000080006360 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4: + clmulh x4, x4, x4 # perform operation + 80006360: 0a423233 clmulh x4,x4,x4 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b4_str) + 80006364: 0008b683 ld x13,0(x17) + 80006368: 00468c63 beq x13,x4,80006380 + 8000636c: 1d50176f jal x14,80007d40 + 80006370: 80006360 .word 0x80006360 + 80006374: 00000000 .word 0x00000000 + 80006378: 80017f26 .word 0x80017f26 + 8000637c: 00000000 .word 0x00000000 + 80006380: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xde79868057398cdc + 80006384: 0004b283 ld x5,0(x9) + 80006388: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x218f12c2a8fb8581 + 8000638c: 0004b283 ld x5,0(x9) + 80006390: 00848493 addi x9,x9,8 + +0000000080006394 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5: + clmulh x5, x5, x5 # perform operation + 80006394: 0a52b2b3 clmulh x5,x5,x5 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b5_str) + 80006398: 0008b683 ld x13,0(x17) + 8000639c: 00568c63 beq x13,x5,800063b4 + 800063a0: 1a10176f jal x14,80007d40 + 800063a4: 80006394 .word 0x80006394 + 800063a8: 00000000 .word 0x00000000 + 800063ac: 80017f63 .word 0x80017f63 + 800063b0: 00000000 .word 0x00000000 + 800063b4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xb36bd9788d75b4c6 + 800063b8: 0004b303 ld x6,0(x9) + 800063bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xd7d486ae4154bfd9 + 800063c0: 0004b303 ld x6,0(x9) + 800063c4: 00848493 addi x9,x9,8 + +00000000800063c8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6: + clmulh x6, x6, x6 # perform operation + 800063c8: 0a633333 clmulh x6,x6,x6 + # Check if x6 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x6, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b6_str) + 800063cc: 0008b683 ld x13,0(x17) + 800063d0: 00668c63 beq x13,x6,800063e8 + 800063d4: 16d0176f jal x14,80007d40 + 800063d8: 800063c8 .word 0x800063c8 + 800063dc: 00000000 .word 0x00000000 + 800063e0: 80017fa0 .word 0x80017fa0 + 800063e4: 00000000 .word 0x00000000 + 800063e8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x99094e5cf17ea983 + 800063ec: 0004b383 ld x7,0(x9) + 800063f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0e0c55e7a1febae9 + 800063f4: 0004b383 ld x7,0(x9) + 800063f8: 00848493 addi x9,x9,8 + +00000000800063fc : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7: + clmulh x7, x7, x7 # perform operation + 800063fc: 0a73b3b3 clmulh x7,x7,x7 + # Check if x7 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x7, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b7_str) + 80006400: 0008b683 ld x13,0(x17) + 80006404: 00768c63 beq x13,x7,8000641c + 80006408: 1390176f jal x14,80007d40 + 8000640c: 800063fc .word 0x800063fc + 80006410: 00000000 .word 0x00000000 + 80006414: 80017fdd .word 0x80017fdd + 80006418: 00000000 .word 0x00000000 + 8000641c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0cde58df7785e4af + 80006420: 0004b403 ld x8,0(x9) + 80006424: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xe9bdb8344d6586a9 + 80006428: 0004b403 ld x8,0(x9) + 8000642c: 00848493 addi x9,x9,8 + +0000000080006430 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8: + clmulh x8, x8, x8 # perform operation + 80006430: 0a843433 clmulh x8,x8,x8 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b8_str) + 80006434: 0008b683 ld x13,0(x17) + 80006438: 00868c63 beq x13,x8,80006450 + 8000643c: 1050176f jal x14,80007d40 + 80006440: 80006430 .word 0x80006430 + 80006444: 00000000 .word 0x00000000 + 80006448: 8001801a .word 0x8001801a + 8000644c: 00000000 .word 0x00000000 + 80006450: 00888893 addi x17,x17,8 + + mv x21, x9 # switch data pointer register to avoid conflict with test + 80006454: 00048a93 addi x21,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xef78b87059e67ef3 + 80006458: 000ab483 ld x9,0(x21) + 8000645c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xb1fa5cef0e3b0578 + 80006460: 000ab483 ld x9,0(x21) + 80006464: 008a8a93 addi x21,x21,8 + +0000000080006468 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9: + clmulh x9, x9, x9 # perform operation + 80006468: 0a94b4b3 clmulh x9,x9,x9 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b9_str) + 8000646c: 0008b683 ld x13,0(x17) + 80006470: 00968c63 beq x13,x9,80006488 + 80006474: 0cd0176f jal x14,80007d40 + 80006478: 80006468 .word 0x80006468 + 8000647c: 00000000 .word 0x00000000 + 80006480: 80018057 .word 0x80018057 + 80006484: 00000000 .word 0x00000000 + 80006488: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x6a5a6d5d850a2ffa + 8000648c: 000ab503 ld x10,0(x21) + 80006490: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x1d702f1561158574 + 80006494: 000ab503 ld x10,0(x21) + 80006498: 008a8a93 addi x21,x21,8 + +000000008000649c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10: + clmulh x10, x10, x10 # perform operation + 8000649c: 0aa53533 clmulh x10,x10,x10 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b10_str) + 800064a0: 0008b683 ld x13,0(x17) + 800064a4: 00a68c63 beq x13,x10,800064bc + 800064a8: 0990176f jal x14,80007d40 + 800064ac: 8000649c .word 0x8000649c + 800064b0: 00000000 .word 0x00000000 + 800064b4: 80018094 .word 0x80018094 + 800064b8: 00000000 .word 0x00000000 + 800064bc: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x6eb71d959107c013 + 800064c0: 000ab583 ld x11,0(x21) + 800064c4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x566d7d6cc65eae22 + 800064c8: 000ab583 ld x11,0(x21) + 800064cc: 008a8a93 addi x21,x21,8 + +00000000800064d0 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11: + clmulh x11, x11, x11 # perform operation + 800064d0: 0ab5b5b3 clmulh x11,x11,x11 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b11_str) + 800064d4: 0008b683 ld x13,0(x17) + 800064d8: 00b68c63 beq x13,x11,800064f0 + 800064dc: 0650176f jal x14,80007d40 + 800064e0: 800064d0 .word 0x800064d0 + 800064e4: 00000000 .word 0x00000000 + 800064e8: 800180d2 .word 0x800180d2 + 800064ec: 00000000 .word 0x00000000 + 800064f0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xc8c92e9440b69dbd + 800064f4: 000ab603 ld x12,0(x21) + 800064f8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xa5aa059e8e59d5d7 + 800064fc: 000ab603 ld x12,0(x21) + 80006500: 008a8a93 addi x21,x21,8 + +0000000080006504 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12: + clmulh x12, x12, x12 # perform operation + 80006504: 0ac63633 clmulh x12,x12,x12 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b12_str) + 80006508: 0008b683 ld x13,0(x17) + 8000650c: 00c68c63 beq x13,x12,80006524 + 80006510: 0310176f jal x14,80007d40 + 80006514: 80006504 .word 0x80006504 + 80006518: 00000000 .word 0x00000000 + 8000651c: 80018110 .word 0x80018110 + 80006520: 00000000 .word 0x00000000 + 80006524: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006528: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000652c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0xf51ed6819c4da833 + 80006530: 000ab683 ld x13,0(x21) + 80006534: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x8caa339b536c99f3 + 80006538: 000ab683 ld x13,0(x21) + 8000653c: 008a8a93 addi x21,x21,8 + +0000000080006540 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13: + clmulh x13, x13, x13 # perform operation + 80006540: 0ad6b6b3 clmulh x13,x13,x13 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b13_str) + 80006544: 0008b383 ld x7,0(x17) + 80006548: 00d38c63 beq x7,x13,80006560 + 8000654c: 7cc0146f jal x8,80007d18 + 80006550: 80006540 .word 0x80006540 + 80006554: 00000000 .word 0x00000000 + 80006558: 8001814e .word 0x8001814e + 8000655c: 00000000 .word 0x00000000 + 80006560: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x664762ecdfcc14a3 + 80006564: 000ab703 ld x14,0(x21) + 80006568: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xdc8e6baa9f02d87a + 8000656c: 000ab703 ld x14,0(x21) + 80006570: 008a8a93 addi x21,x21,8 + +0000000080006574 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14: + clmulh x14, x14, x14 # perform operation + 80006574: 0ae73733 clmulh x14,x14,x14 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b14_str) + 80006578: 0008b383 ld x7,0(x17) + 8000657c: 00e38c63 beq x7,x14,80006594 + 80006580: 7980146f jal x8,80007d18 + 80006584: 80006574 .word 0x80006574 + 80006588: 00000000 .word 0x00000000 + 8000658c: 8001818c .word 0x8001818c + 80006590: 00000000 .word 0x00000000 + 80006594: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xd206c4dcc97fad7b + 80006598: 000ab783 ld x15,0(x21) + 8000659c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xd2ae7ad14d076399 + 800065a0: 000ab783 ld x15,0(x21) + 800065a4: 008a8a93 addi x21,x21,8 + +00000000800065a8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15: + clmulh x15, x15, x15 # perform operation + 800065a8: 0af7b7b3 clmulh x15,x15,x15 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b15_str) + 800065ac: 0008b383 ld x7,0(x17) + 800065b0: 00f38c63 beq x7,x15,800065c8 + 800065b4: 7640146f jal x8,80007d18 + 800065b8: 800065a8 .word 0x800065a8 + 800065bc: 00000000 .word 0x00000000 + 800065c0: 800181ca .word 0x800181ca + 800065c4: 00000000 .word 0x00000000 + 800065c8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xe2994fb0df4470c0 + 800065cc: 000ab803 ld x16,0(x21) + 800065d0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0x2daa17efb667cdcc + 800065d4: 000ab803 ld x16,0(x21) + 800065d8: 008a8a93 addi x21,x21,8 + +00000000800065dc : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16: + clmulh x16, x16, x16 # perform operation + 800065dc: 0b083833 clmulh x16,x16,x16 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b16_str) + 800065e0: 0008b383 ld x7,0(x17) + 800065e4: 01038c63 beq x7,x16,800065fc + 800065e8: 7300146f jal x8,80007d18 + 800065ec: 800065dc .word 0x800065dc + 800065f0: 00000000 .word 0x00000000 + 800065f4: 80018208 .word 0x80018208 + 800065f8: 00000000 .word 0x00000000 + 800065fc: 00888893 addi x17,x17,8 + + mv x31, x17 # switch signature pointer register to avoid conflict with test + 80006600: 00088f93 addi x31,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x2548b361f1d341df + 80006604: 000ab883 ld x17,0(x21) + 80006608: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x4f4286c4f0927475 + 8000660c: 000ab883 ld x17,0(x21) + 80006610: 008a8a93 addi x21,x21,8 + +0000000080006614 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17: + clmulh x17, x17, x17 # perform operation + 80006614: 0b18b8b3 clmulh x17,x17,x17 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b17_str) + 80006618: 000fb383 ld x7,0(x31) + 8000661c: 01138c63 beq x7,x17,80006634 + 80006620: 6f80146f jal x8,80007d18 + 80006624: 80006614 .word 0x80006614 + 80006628: 00000000 .word 0x00000000 + 8000662c: 80018246 .word 0x80018246 + 80006630: 00000000 .word 0x00000000 + 80006634: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x3d2485d5c18657d6 + 80006638: 000ab903 ld x18,0(x21) + 8000663c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x699f3877a89a4f9f + 80006640: 000ab903 ld x18,0(x21) + 80006644: 008a8a93 addi x21,x21,8 + +0000000080006648 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18: + clmulh x18, x18, x18 # perform operation + 80006648: 0b293933 clmulh x18,x18,x18 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b18_str) + 8000664c: 000fb383 ld x7,0(x31) + 80006650: 01238c63 beq x7,x18,80006668 + 80006654: 6c40146f jal x8,80007d18 + 80006658: 80006648 .word 0x80006648 + 8000665c: 00000000 .word 0x00000000 + 80006660: 80018284 .word 0x80018284 + 80006664: 00000000 .word 0x00000000 + 80006668: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x72216ea821719f93 + 8000666c: 000ab983 ld x19,0(x21) + 80006670: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x5143f8415d9a7d87 + 80006674: 000ab983 ld x19,0(x21) + 80006678: 008a8a93 addi x21,x21,8 + +000000008000667c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19: + clmulh x19, x19, x19 # perform operation + 8000667c: 0b39b9b3 clmulh x19,x19,x19 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b19_str) + 80006680: 000fb383 ld x7,0(x31) + 80006684: 01338c63 beq x7,x19,8000669c + 80006688: 6900146f jal x8,80007d18 + 8000668c: 8000667c .word 0x8000667c + 80006690: 00000000 .word 0x00000000 + 80006694: 800182c2 .word 0x800182c2 + 80006698: 00000000 .word 0x00000000 + 8000669c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xe4a34d452b80d374 + 800066a0: 000aba03 ld x20,0(x21) + 800066a4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xc3efa7c83beea912 + 800066a8: 000aba03 ld x20,0(x21) + 800066ac: 008a8a93 addi x21,x21,8 + +00000000800066b0 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20: + clmulh x20, x20, x20 # perform operation + 800066b0: 0b4a3a33 clmulh x20,x20,x20 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b20_str) + 800066b4: 000fb383 ld x7,0(x31) + 800066b8: 01438c63 beq x7,x20,800066d0 + 800066bc: 65c0146f jal x8,80007d18 + 800066c0: 800066b0 .word 0x800066b0 + 800066c4: 00000000 .word 0x00000000 + 800066c8: 80018300 .word 0x80018300 + 800066cc: 00000000 .word 0x00000000 + 800066d0: 008f8f93 addi x31,x31,8 + + mv x17, x21 # switch data pointer register to avoid conflict with test + 800066d4: 000a8893 addi x17,x21,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0xcff5d51c3fbdb190 + 800066d8: 0008ba83 ld x21,0(x17) + 800066dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x936e819370f3fcd0 + 800066e0: 0008ba83 ld x21,0(x17) + 800066e4: 00888893 addi x17,x17,8 + +00000000800066e8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21: + clmulh x21, x21, x21 # perform operation + 800066e8: 0b5abab3 clmulh x21,x21,x21 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b21_str) + 800066ec: 000fb383 ld x7,0(x31) + 800066f0: 01538c63 beq x7,x21,80006708 + 800066f4: 6240146f jal x8,80007d18 + 800066f8: 800066e8 .word 0x800066e8 + 800066fc: 00000000 .word 0x00000000 + 80006700: 8001833e .word 0x8001833e + 80006704: 00000000 .word 0x00000000 + 80006708: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xd4aa31a5dbec759f + 8000670c: 0008bb03 ld x22,0(x17) + 80006710: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x407b58fe70e0b41d + 80006714: 0008bb03 ld x22,0(x17) + 80006718: 00888893 addi x17,x17,8 + +000000008000671c : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22: + clmulh x22, x22, x22 # perform operation + 8000671c: 0b6b3b33 clmulh x22,x22,x22 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b22_str) + 80006720: 000fb383 ld x7,0(x31) + 80006724: 01638c63 beq x7,x22,8000673c + 80006728: 5f00146f jal x8,80007d18 + 8000672c: 8000671c .word 0x8000671c + 80006730: 00000000 .word 0x00000000 + 80006734: 8001837c .word 0x8001837c + 80006738: 00000000 .word 0x00000000 + 8000673c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x924b62d4d747be2c + 80006740: 0008bb83 ld x23,0(x17) + 80006744: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x77b4e0b210f302f0 + 80006748: 0008bb83 ld x23,0(x17) + 8000674c: 00888893 addi x17,x17,8 + +0000000080006750 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23: + clmulh x23, x23, x23 # perform operation + 80006750: 0b7bbbb3 clmulh x23,x23,x23 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b23_str) + 80006754: 000fb383 ld x7,0(x31) + 80006758: 01738c63 beq x7,x23,80006770 + 8000675c: 5bc0146f jal x8,80007d18 + 80006760: 80006750 .word 0x80006750 + 80006764: 00000000 .word 0x00000000 + 80006768: 800183ba .word 0x800183ba + 8000676c: 00000000 .word 0x00000000 + 80006770: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x9edbf4901f614f9f + 80006774: 0008bc03 ld x24,0(x17) + 80006778: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x8ca0a53819684e67 + 8000677c: 0008bc03 ld x24,0(x17) + 80006780: 00888893 addi x17,x17,8 + +0000000080006784 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24: + clmulh x24, x24, x24 # perform operation + 80006784: 0b8c3c33 clmulh x24,x24,x24 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b24_str) + 80006788: 000fb383 ld x7,0(x31) + 8000678c: 01838c63 beq x7,x24,800067a4 + 80006790: 5880146f jal x8,80007d18 + 80006794: 80006784 .word 0x80006784 + 80006798: 00000000 .word 0x00000000 + 8000679c: 800183f8 .word 0x800183f8 + 800067a0: 00000000 .word 0x00000000 + 800067a4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x65ef04275184bbc2 + 800067a8: 0008bc83 ld x25,0(x17) + 800067ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x23e03231eca5b500 + 800067b0: 0008bc83 ld x25,0(x17) + 800067b4: 00888893 addi x17,x17,8 + +00000000800067b8 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25: + clmulh x25, x25, x25 # perform operation + 800067b8: 0b9cbcb3 clmulh x25,x25,x25 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b25_str) + 800067bc: 000fb383 ld x7,0(x31) + 800067c0: 01938c63 beq x7,x25,800067d8 + 800067c4: 5540146f jal x8,80007d18 + 800067c8: 800067b8 .word 0x800067b8 + 800067cc: 00000000 .word 0x00000000 + 800067d0: 80018436 .word 0x80018436 + 800067d4: 00000000 .word 0x00000000 + 800067d8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x13660af569f58681 + 800067dc: 0008bd03 ld x26,0(x17) + 800067e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xa1a226ea36ba6244 + 800067e4: 0008bd03 ld x26,0(x17) + 800067e8: 00888893 addi x17,x17,8 + +00000000800067ec : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26: + clmulh x26, x26, x26 # perform operation + 800067ec: 0bad3d33 clmulh x26,x26,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b26_str) + 800067f0: 000fb383 ld x7,0(x31) + 800067f4: 01a38c63 beq x7,x26,8000680c + 800067f8: 5200146f jal x8,80007d18 + 800067fc: 800067ec .word 0x800067ec + 80006800: 00000000 .word 0x00000000 + 80006804: 80018474 .word 0x80018474 + 80006808: 00000000 .word 0x00000000 + 8000680c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xbf7076d2d640b985 + 80006810: 0008bd83 ld x27,0(x17) + 80006814: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x56f6bcda81079f1e + 80006818: 0008bd83 ld x27,0(x17) + 8000681c: 00888893 addi x17,x17,8 + +0000000080006820 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27: + clmulh x27, x27, x27 # perform operation + 80006820: 0bbdbdb3 clmulh x27,x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b27_str) + 80006824: 000fb383 ld x7,0(x31) + 80006828: 01b38c63 beq x7,x27,80006840 + 8000682c: 4ec0146f jal x8,80007d18 + 80006830: 80006820 .word 0x80006820 + 80006834: 00000000 .word 0x00000000 + 80006838: 800184b2 .word 0x800184b2 + 8000683c: 00000000 .word 0x00000000 + 80006840: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x78bb3c02fc6c183e + 80006844: 0008be03 ld x28,0(x17) + 80006848: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xb68db214b7fb4f41 + 8000684c: 0008be03 ld x28,0(x17) + 80006850: 00888893 addi x17,x17,8 + +0000000080006854 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28: + clmulh x28, x28, x28 # perform operation + 80006854: 0bce3e33 clmulh x28,x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b28_str) + 80006858: 000fb383 ld x7,0(x31) + 8000685c: 01c38c63 beq x7,x28,80006874 + 80006860: 4b80146f jal x8,80007d18 + 80006864: 80006854 .word 0x80006854 + 80006868: 00000000 .word 0x00000000 + 8000686c: 800184f0 .word 0x800184f0 + 80006870: 00000000 .word 0x00000000 + 80006874: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x85471f21e393cc59 + 80006878: 0008be83 ld x29,0(x17) + 8000687c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x6dc12a032d98beff + 80006880: 0008be83 ld x29,0(x17) + 80006884: 00888893 addi x17,x17,8 + +0000000080006888 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29: + clmulh x29, x29, x29 # perform operation + 80006888: 0bdebeb3 clmulh x29,x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b29_str) + 8000688c: 000fb383 ld x7,0(x31) + 80006890: 01d38c63 beq x7,x29,800068a8 + 80006894: 4840146f jal x8,80007d18 + 80006898: 80006888 .word 0x80006888 + 8000689c: 00000000 .word 0x00000000 + 800068a0: 8001852e .word 0x8001852e + 800068a4: 00000000 .word 0x00000000 + 800068a8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x001d26a2b1cc58aa + 800068ac: 0008bf03 ld x30,0(x17) + 800068b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x19e3d54398420cbc + 800068b4: 0008bf03 ld x30,0(x17) + 800068b8: 00888893 addi x17,x17,8 + +00000000800068bc : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30: + clmulh x30, x30, x30 # perform operation + 800068bc: 0bef3f33 clmulh x30,x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b30_str) + 800068c0: 000fb383 ld x7,0(x31) + 800068c4: 01e38c63 beq x7,x30,800068dc + 800068c8: 4500146f jal x8,80007d18 + 800068cc: 800068bc .word 0x800068bc + 800068d0: 00000000 .word 0x00000000 + 800068d4: 8001856c .word 0x8001856c + 800068d8: 00000000 .word 0x00000000 + 800068dc: 008f8f93 addi x31,x31,8 + + mv x23, x31 # switch signature pointer register to avoid conflict with test + 800068e0: 000f8b93 addi x23,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x83e222eb66f04fd6 + 800068e4: 0008bf83 ld x31,0(x17) + 800068e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x3b98b118b0b00699 + 800068ec: 0008bf83 ld x31,0(x17) + 800068f0: 00888893 addi x17,x17,8 + +00000000800068f4 : +Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31: + clmulh x31, x31, x31 # perform operation + 800068f4: 0bffbfb3 clmulh x31,x31,x31 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31, Zbkc_clmulh_cg_cmp_rd_rs1_rs2_b31_str) + 800068f8: 000bb383 ld x7,0(x23) + 800068fc: 01f38c63 beq x7,x31,80006914 + 80006900: 4180146f jal x8,80007d18 + 80006904: 800068f4 .word 0x800068f4 + 80006908: 00000000 .word 0x00000000 + 8000690c: 800185aa .word 0x800185aa + 80006910: 00000000 .word 0x00000000 + 80006914: 008b8b93 addi x23,x23,8 + + mv x2, x23 # restore signature pointer to default register for teardown + 80006918: 000b8113 addi x2,x23,0 + +000000008000691c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 8000691c: 00000513 addi x10,x0,0 + 80006920: 00000073 ecall + 80006924: fff00513 addi x10,x0,-1 + 80006928: 25800413 addi x8,x0,600 + +000000008000692c : + 8000692c: 34002373 csrrs x6,mscratch,x0 + +0000000080006930 : + 80006930: 2b833383 ld x7,696(x6) + +0000000080006934 : + 80006934: 2a033383 ld x7,672(x6) + +0000000080006938 : + 80006938: 2d033483 ld x9,720(x6) + 8000693c: 34049073 csrrw x0,mscratch,x9 + +0000000080006940 : + 80006940: 2c833483 ld x9,712(x6) + 80006944: 305493f3 csrrw x7,mtvec,x9 + 80006948: ffc4f493 andi x9,x9,-4 + 8000694c: ffc3f393 andi x7,x7,-4 + 80006950: 00749e63 bne x9,x7,8000696c + +0000000080006954 : + 80006954: 00030493 addi x9,x6,0 + +0000000080006958 : + 80006958: 0004a783 lw x15,0(x9) + 8000695c: 00f3a023 sw x15,0(x7) + 80006960: 00438393 addi x7,x7,4 + 80006964: 00448493 addi x9,x9,4 + 80006968: fe83c8e3 blt x7,x8,80006958 + 8000696c: 0000100f fence.i + +0000000080006970 : + 80006970: 00000013 addi x0,x0,0 + 80006974: 00000013 addi x0,x0,0 + 80006978: 00000013 addi x0,x0,0 + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: 35050513 addi x10,x10,848 # 80018d10 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: 34b50513 addi x10,x10,843 # 80018d4b + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: 36b50513 addi x10,x10,875 # 80018dab + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: ed650513 addi x10,x10,-298 # 80019956 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00015397 auipc x7,0x15 + 80006b04: 95038393 addi x7,x7,-1712 # 8001b450 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00015417 auipc x8,0x15 + 80006b44: 90040413 addi x8,x8,-1792 # 8001b440 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80018eff .word 0x80018eff + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018d6d .word 0x80018d6d + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: 11450513 addi x10,x10,276 # 80018cd4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: 11050513 addi x10,x10,272 # 80018d10 + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cbdff06f jal x0,8000691c + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: c99ff06f jal x0,8000691c + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9030313 addi x6,x6,-1392 # 80006970 + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 2ad50513 addi x10,x10,685 # 8001a38d + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 63850513 addi x10,x10,1592 # 80018758 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: cb450513 addi x10,x10,-844 # 80018e14 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: b7050513 addi x10,x10,-1168 # 80018d10 + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: 19848493 addi x9,x9,408 # 80018738 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 33840413 addi x8,x8,824 # 80038918 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018f16 .word 0x80018f16 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80019018 .word 0x80019018 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80019113 .word 0x80019113 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80019206 .word 0x80019206 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80019379 .word 0x80019379 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00011217 auipc x4,0x11 + 80007d04: 8f020213 addi x4,x4,-1808 # 800185f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00011397 auipc x7,0x11 + 80007d1c: 8d838393 addi x7,x7,-1832 # 800185f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00011697 auipc x13,0x11 + 80007d44: 8b068693 addi x13,x13,-1872 # 800185f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00011497 auipc x9,0x11 + 80007d6c: 88848493 addi x9,x9,-1912 # 800185f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 7e44a483 lw x9,2020(x9) # 800185f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 52040413 addi x8,x8,1312 # 8001a3e0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: a2040413 addi x8,x8,-1504 # 80038920 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 7d848493 addi x9,x9,2008 # 80018718 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 79848493 addi x9,x9,1944 # 80018718 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 76c80813 addi x16,x16,1900 # 80018728 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 74c80813 addi x16,x16,1868 # 80018728 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: f1738393 addi x7,x7,-233 # 80018eff + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 72880813 addi x16,x16,1832 # 80018720 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: f1238393 addi x7,x7,-238 # 80018f16 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: ffc38393 addi x7,x7,-4 # 80019018 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: 0df38393 addi x7,x7,223 # 80019113 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: 1ba38393 addi x7,x7,442 # 80019206 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 31538393 addi x7,x7,789 # 80019379 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 28138393 addi x7,x7,641 # 800192fd + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 2a738393 addi x7,x7,679 # 8001933b + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: eaa38393 addi x7,x7,-342 # 80018f56 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: f9238393 addi x7,x7,-110 # 80019056 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: 07338393 addi x7,x7,115 # 8001914f + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: 14f38393 addi x7,x7,335 # 80019243 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 2a838393 addi x7,x7,680 # 800193b4 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: e7238393 addi x7,x7,-398 # 80018f96 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: f5838393 addi x7,x7,-168 # 80019094 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: 03738393 addi x7,x7,55 # 8001918b + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: 11438393 addi x7,x7,276 # 80019280 + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 26b38393 addi x7,x7,619 # 800193ef + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: e3b38393 addi x7,x7,-453 # 80018fd7 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: f1f38393 addi x7,x7,-225 # 800190d3 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: ffc38393 addi x7,x7,-4 # 800191c8 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: 0da38393 addi x7,x7,218 # 800192be + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 22f38393 addi x7,x7,559 # 8001942b + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 25438393 addi x7,x7,596 # 80019468 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 28b38393 addi x7,x7,651 # 800194b7 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 36e38393 addi x7,x7,878 # 800195b2 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 45238393 addi x7,x7,1106 # 800196ae + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 4a480813 addi x16,x16,1188 # 80018720 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 49480813 addi x16,x16,1172 # 80018720 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 48c80813 addi x16,x16,1164 # 80018724 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 47880813 addi x16,x16,1144 # 80018720 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: a1050513 addi x10,x10,-1520 # 80018d10 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: a0b50513 addi x10,x10,-1525 # 80018d4b + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: a8250513 addi x10,x10,-1406 # 80018e02 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 36853503 ld x10,872(x10) # 80018710 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: a5450513 addi x10,x10,-1452 # 80018e14 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 20852503 lw x10,520(x10) # 800185f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: a1650513 addi x10,x10,-1514 # 80018e16 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 2c852503 lw x10,712(x10) # 800186f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 2f850513 addi x10,x10,760 # 80018758 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: 98a50513 addi x10,x10,-1654 # 80018e2a + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 23053503 ld x10,560(x10) # 800186f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 27850513 addi x10,x10,632 # 80018758 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 34150513 addi x10,x10,833 # 80019861 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: 0a852503 lw x10,168(x10) # 800185f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: 1f860613 addi x12,x12,504 # 80018758 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: 16c52503 lw x10,364(x10) # 800186f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 3b750513 addi x10,x10,951 # 80019977 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: 15860613 addi x12,x12,344 # 80018758 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: 0cc52503 lw x10,204(x10) # 800186f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: 11860613 addi x12,x12,280 # 80018758 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: 08c52503 lw x10,140(x10) # 800186f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: 1da50513 addi x10,x10,474 # 8001985a + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: 09850513 addi x10,x10,152 # 80018758 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: 17250513 addi x10,x10,370 # 80019872 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: ec852503 lw x10,-312(x10) # 800185f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: fc853503 ld x10,-56(x10) # 80018700 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: fb453503 ld x10,-76(x10) # 80018700 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: ff850513 addi x10,x10,-8 # 80018758 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: f9052503 lw x10,-112(x10) # 80018718 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: 0e950513 addi x10,x10,233 # 80019889 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: e2852503 lw x10,-472(x10) # 800185f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: f3053503 ld x10,-208(x10) # 80018708 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: f1c53503 ld x10,-228(x10) # 80018708 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: f5850513 addi x10,x10,-168 # 80018758 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: 06050513 addi x10,x10,96 # 800198a0 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: ea053503 ld x10,-352(x10) # 80018708 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: ed850513 addi x10,x10,-296 # 80018758 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: 03e50513 addi x10,x10,62 # 800198fe + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: e2053503 ld x10,-480(x10) # 80018708 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: e5850513 addi x10,x10,-424 # 80018758 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: df442403 lw x8,-524(x8) # 80018720 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: 06350513 addi x10,x10,99 # 800199a3 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: 04f50513 addi x10,x10,79 # 800199cf + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: d8080813 addi x16,x16,-640 # 80018728 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 45450513 addi x10,x10,1108 # 80018e14 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: fdf50513 addi x10,x10,-33 # 800199df + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: ce053503 ld x10,-800(x10) # 80018708 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: d1850513 addi x10,x10,-744 # 80018758 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: f8a50513 addi x10,x10,-118 # 80019a0a + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: c5853503 ld x10,-936(x10) # 80018700 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: c9850513 addi x10,x10,-872 # 80018758 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: c1833303 ld x6,-1000(x6) # 80018700 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: c183b383 ld x7,-1000(x7) # 80018708 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: f3950513 addi x10,x10,-199 # 80019a39 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: f6150513 addi x10,x10,-159 # 80019aa1 + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: b9833303 ld x6,-1128(x6) # 80018700 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: b983b383 ld x7,-1128(x7) # 80018708 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: bb850513 addi x10,x10,-1096 # 80018758 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ee850513 addi x10,x10,-280 # 80019ac8 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: e4550513 addi x10,x10,-443 # 80019a65 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: e4150513 addi x10,x10,-447 # 80019aa1 + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: a8033303 ld x6,-1408(x6) # 80018708 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: a703b383 ld x7,-1424(x7) # 80018700 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: a9850513 addi x10,x10,-1384 # 80018758 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: eb050513 addi x10,x10,-336 # 80019bb0 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: f5750513 addi x10,x10,-169 # 80019c97 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 00010517 auipc x10,0x10 + 80008d6c: 9bc52503 lw x10,-1604(x10) # 80018724 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: f3350513 addi x10,x10,-205 # 80019cd3 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: ed150513 addi x10,x10,-303 # 80019cb1 + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: e9950513 addi x10,x10,-359 # 80019cb9 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: e6150513 addi x10,x10,-415 # 80019cc1 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: e2a50513 addi x10,x10,-470 # 80019cca + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: dfc50513 addi x10,x10,-516 # 80019cdc + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 00010517 auipc x10,0x10 + 80008f0c: 81852503 lw x10,-2024(x10) # 80018720 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: ed350513 addi x10,x10,-301 # 80019e33 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: d5650513 addi x10,x10,-682 # 80019cf6 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: d4750513 addi x10,x10,-697 # 80019d27 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: d2750513 addi x10,x10,-729 # 80019d47 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: d0550513 addi x10,x10,-763 # 80019d65 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: ce450513 addi x10,x10,-796 # 80019d84 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: ccc50513 addi x10,x10,-820 # 80019dac + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: cb850513 addi x10,x10,-840 # 80019dd8 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: ca450513 addi x10,x10,-860 # 80019e04 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: ca250513 addi x10,x10,-862 # 80019e42 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 54053503 ld x10,1344(x10) # 80018708 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 57850513 addi x10,x10,1400 # 80018758 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: c3950513 addi x10,x10,-967 # 80019e59 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 4b853503 ld x10,1208(x10) # 80018700 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 4f850513 addi x10,x10,1272 # 80018758 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 49852503 lw x10,1176(x10) # 80018720 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: bd050513 addi x10,x10,-1072 # 80019e70 + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 44053503 ld x10,1088(x10) # 80018708 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: ba750513 addi x10,x10,-1113 # 80019e87 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 3f853503 ld x10,1016(x10) # 80018700 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 3fc52503 lw x10,1020(x10) # 80018720 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: bbd50513 addi x10,x10,-1091 # 80019efd + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: c5350513 addi x10,x10,-941 # 80019fd3 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: d0650513 addi x10,x10,-762 # 8001a0c6 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: dc150513 addi x10,x10,-575 # 8001a1c1 + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: e6850513 addi x10,x10,-408 # 8001a2a8 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: a3550513 addi x10,x10,-1483 # 80019eb5 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 29063603 ld x12,656(x12) # 80018738 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 00010517 auipc x10,0x10 + 800094c4: 9de50513 addi x10,x10,-1570 # 80018e9e + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 23850513 addi x10,x10,568 # 80018758 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 22058593 addi x11,x11,544 # 80018780 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 2b058593 addi x11,x11,688 # 80018840 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 6fe50513 addi x10,x10,1790 # 80018cbe + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 35650513 addi x10,x10,854 # 80019956 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: 10060613 addi x12,x12,256 # 80018730 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 00010517 auipc x10,0x10 + 80009644: 87f50513 addi x10,x10,-1921 # 80018ebf + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: 0d053503 ld x10,208(x10) # 80018738 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: 0d850513 addi x10,x10,216 # 80018758 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 00010517 auipc x10,0x10 + 800096c4: 80f50513 addi x10,x10,-2033 # 80018ecf + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: 05853503 ld x10,88(x10) # 80018740 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: 05850513 addi x10,x10,88 # 80018758 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 79f50513 addi x10,x10,1951 # 80018edf + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: fe053503 ld x10,-32(x10) # 80018748 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: fd850513 addi x10,x10,-40 # 80018758 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 72f50513 addi x10,x10,1839 # 80018eef + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: f6853503 ld x10,-152(x10) # 80018750 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: f5850513 addi x10,x10,-168 # 80018758 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: f0860613 addi x12,x12,-248 # 80018730 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: f1860613 addi x12,x12,-232 # 80018758 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 88430313 addi x6,x6,-1916 # 8000691c + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 86c30313 addi x6,x6,-1940 # 8000691c + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 85430313 addi x6,x6,-1964 # 8000691c + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6ec78793 addi x15,x15,1772 # 8000692c + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: f0010113 addi x2,x2,-256 # 8001a3e0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001997f .word 0x8001997f + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 41828293 addi x5,x5,1048 # 80038a00 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 3f828293 addi x5,x5,1016 # 80038a00 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkx-xperm4-00.elf.objdump b/riscv-tests/rv64-Zbkx-xperm4-00.elf.objdump new file mode 100644 index 0000000..0f08175 --- /dev/null +++ b/riscv-tests/rv64-Zbkx-xperm4-00.elf.objdump @@ -0,0 +1,17092 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkx/Zbkx-xperm4-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkx/Zbkx-xperm4-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c920 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038a00 0000000080038a00 00037a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031a6 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 0000000000000000 0000000000000000 0003b861 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8dd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b900 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b920 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 0000000000000000 0000000000000000 0003b960 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9ea 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038a00 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccSv5JGt.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b1 +000000008000e4a3 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b2 +000000008000e4d6 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b3 +000000008000e509 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b4 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e53c l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b5 +000000008000e56f l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b6 +000000008000e5a2 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b7 +000000008000e5d5 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b8 +000000008000e608 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b9 +000000008000e63b l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b9_str +0000000080000268 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b10 +000000008000e66f l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b10_str +000000008000029c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b11 +000000008000e6a4 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b11_str +00000000800002d0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b12 +000000008000e6d9 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b13 +0000000080007d18 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000e70e l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b14 +000000008000e743 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b14_str +0000000080000374 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b15 +000000008000e778 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b15_str +00000000800003a8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b16 +000000008000e7ad l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b16_str +00000000800003e0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b17 +000000008000e7e2 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b17_str +0000000080000414 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b18 +000000008000e817 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b18_str +0000000080000448 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b19 +000000008000e84c l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b19_str +000000008000047c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b20 +000000008000e881 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b20_str +00000000800004b0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b21 +000000008000e8b6 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b21_str +00000000800004e4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b22 +000000008000e8eb l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b22_str +0000000080000518 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b23 +000000008000e920 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b23_str +000000008000054c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b24 +000000008000e955 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b24_str +0000000080000580 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b25 +000000008000e98a l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b25_str +00000000800005b4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b26 +000000008000e9bf l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b26_str +00000000800005e8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b27 +000000008000e9f4 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b27_str +000000008000061c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b28 +000000008000ea29 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b28_str +0000000080000654 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b29 +000000008000ea5e l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b29_str +0000000080000688 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b30 +000000008000ea93 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b30_str +00000000800006bc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b31 +000000008000eac8 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs1_b31_str +00000000800006f0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b0 +000000008000eafd l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b0_str +0000000080000724 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b1 +000000008000eb31 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b1_str +0000000080000758 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b2 +000000008000eb65 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b2_str +000000008000078c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b3 +000000008000eb99 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b3_str +00000000800007c0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b4 +000000008000ebcd l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b4_str +00000000800007f4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b5 +000000008000ec01 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b5_str +0000000080000828 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b6 +000000008000ec35 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b6_str +0000000080000864 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b7 +000000008000ec69 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b7_str +0000000080000898 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b8 +000000008000ec9d l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b8_str +00000000800008cc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b9 +000000008000ecd1 l .data 0000000000000000 Zbkx_xperm4_cg_cp_rs2_b9_str +0000000080000900 l .text.rvtest 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Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +00000000800032fc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +00000000800130be l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003330 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001312f l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003364 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800131a0 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003398 l .text.rvtest 0000000000000000 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0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800133be l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +000000008000349c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013428 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034d0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +000000008001348a l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003504 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800134ec l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +0000000080003538 l .text.rvtest 0000000000000000 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Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080003608 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +0000000080013712 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +000000008000363c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080013783 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003670 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +00000000800137f4 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036a4 l .text.rvtest 0000000000000000 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.text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +0000000080013a19 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037a8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080013a83 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037dc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +0000000080013aed l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +0000000080003810 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +0000000080013b4f l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003844 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +0000000080013bb1 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003878 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +0000000080013c13 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038ac l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080013c84 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038e0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +0000000080013cf5 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003914 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080013d66 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +0000000080003948 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080013dd7 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +000000008000397c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080013e48 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039b0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080013eb9 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +00000000800039e4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa +0000000080013f2a l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003a18 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555 +0000000080013f9b l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str +0000000080003a4c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff +000000008001400c l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str +0000000080003a80 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe 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Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +000000008001457e l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d24 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +00000000800145ef l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d58 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +0000000080014660 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003d8c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +00000000800146d1 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str 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+0000000080003f60 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +0000000080014a7f l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003f94 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +0000000080014af0 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fc8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +0000000080014b61 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080003ffc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +0000000080014bd2 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +0000000080004030 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014c43 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004064 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014cb4 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080004098 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014d25 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040cc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014d96 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004100 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014dff l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004134 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014e68 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +0000000080004168 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001 +0000000080014ed2 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str +000000008000419c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0 +0000000080014f3c l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str +00000000800041d0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1 +0000000080014f96 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str +0000000080004204 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2 +0000000080014ff0 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str +0000000080004238 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000 +000000008001504a l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str +000000008000426c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001 +00000000800150b3 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str +00000000800042a0 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff +000000008001511c l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str +00000000800042d4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe +0000000080015185 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str +0000000080004308 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff +00000000800151ee l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str +000000008000433c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe +0000000080015257 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str +0000000080004370 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2 +00000000800152c0 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str +00000000800043a4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080015329 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800043d8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555 +0000000080015392 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str +000000008000440c l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff +00000000800153fb l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str +0000000080004440 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe +000000008001545c l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str +0000000080004474 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000 +00000000800154bd l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str +00000000800044a8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001 +000000008001551f l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str +00000000800044dc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0 +0000000080015581 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str +0000000080004510 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1 +00000000800155db l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str +0000000080004544 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2 +0000000080015635 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str +0000000080004578 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000 +000000008001568f l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str +00000000800045ac l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001 +00000000800156f8 l .data 0000000000000000 Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str 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Zbkx_xperm4_cg_cmp_rd_rs1_b1 +0000000080016fff l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b1_str +00000000800055a8 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b2 +0000000080017038 l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b2_str +00000000800055dc l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b3 +0000000080017071 l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b3_str +0000000080005610 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b4 +00000000800170aa l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b4_str +0000000080005644 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b5 +00000000800170e3 l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b5_str +0000000080005678 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b6 +000000008001711c l .data 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b6_str +00000000800056b4 l .text.rvtest 0000000000000000 Zbkx_xperm4_cg_cmp_rd_rs1_b7 +0000000080017155 l .data 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00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x2b8b8fb81f73acc5 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs2: x11 = 0xf1772e8c1d60ecae + 80000048: 0001b583 ld x11,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkx_xperm4_cg_cp_rs1_b0: + xperm4 x20, x0, x11 # perform operation + 80000050: 28b02a33 xperm4 x20,x0,x11 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zbkx_xperm4_cg_cp_rs1_b0, Zbkx_xperm4_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01420c63 beq x4,x20,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xe7dcabcc7b86eea8 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs2: x7 = 0x09c5a1a02f6cadfd + 8000007c: 0001b383 ld x7,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkx_xperm4_cg_cp_rs1_b1: + xperm4 x29, x1, x7 # perform operation + 80000084: 2870aeb3 xperm4 x29,x1,x7 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zbkx_xperm4_cg_cp_rs1_b1, Zbkx_xperm4_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01d20c63 beq x4,x29,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a3 .word 0x8000e4a3 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x29, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010e93 addi x29,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x4aecf9b7a87d7a26 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x86ebf28a7592b63d + 800000b4: 0001bc83 ld x25,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkx_xperm4_cg_cp_rs1_b2: + xperm4 x30, x2, x25 # perform operation + 800000bc: 29912f33 xperm4 x30,x2,x25 + # Check if x30 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x30, Zbkx_xperm4_cg_cp_rs1_b2, Zbkx_xperm4_cg_cp_rs1_b2_str) + 800000c0: 000eb203 ld x4,0(x29) + 800000c4: 01e20c63 beq x4,x30,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d6 .word 0x8000e4d6 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008e8e93 addi x29,x29,8 + + mv x17, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018893 addi x17,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x941a89629cfcdac1 + 800000e4: 0008b183 ld x3,0(x17) + 800000e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x44e9b6151912f4ba + 800000ec: 0008bf83 ld x31,0(x17) + 800000f0: 00888893 addi x17,x17,8 + +00000000800000f4 : +Zbkx_xperm4_cg_cp_rs1_b3: + xperm4 x9, x3, x31 # perform operation + 800000f4: 29f1a4b3 xperm4 x9,x3,x31 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zbkx_xperm4_cg_cp_rs1_b3, Zbkx_xperm4_cg_cp_rs1_b3_str) + 800000f8: 000eb203 ld x4,0(x29) + 800000fc: 00920c63 beq x4,x9,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e509 .word 0x8000e509 + 80000110: 00000000 .word 0x00000000 + 80000114: 008e8e93 addi x29,x29,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x0c158af28acf3a34 + 80000120: 0008b203 ld x4,0(x17) + 80000124: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x74339cbd3d000edf + 80000128: 0008b903 ld x18,0(x17) + 8000012c: 00888893 addi x17,x17,8 + +0000000080000130 : +Zbkx_xperm4_cg_cp_rs1_b4: + xperm4 x0, x4, x18 # perform operation + 80000130: 29222033 xperm4 x0,x4,x18 + # Check if x0 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x0, Zbkx_xperm4_cg_cp_rs1_b4, Zbkx_xperm4_cg_cp_rs1_b4_str) + 80000134: 000eb683 ld x13,0(x29) + 80000138: 00068c63 beq x13,x0,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e53c .word 0x8000e53c + 8000014c: 00000000 .word 0x00000000 + 80000150: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x254cfefb5ec7241e + 80000154: 0008b283 ld x5,0(x17) + 80000158: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x6a5790633dcf98a6 + 8000015c: 0008b003 ld x0,0(x17) + 80000160: 00888893 addi x17,x17,8 + +0000000080000164 : +Zbkx_xperm4_cg_cp_rs1_b5: + xperm4 x11, x5, x0 # perform operation + 80000164: 2802a5b3 xperm4 x11,x5,x0 + # Check if x11 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x11, Zbkx_xperm4_cg_cp_rs1_b5, Zbkx_xperm4_cg_cp_rs1_b5_str) + 80000168: 000eb683 ld x13,0(x29) + 8000016c: 00b68c63 beq x13,x11,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e56f .word 0x8000e56f + 80000180: 00000000 .word 0x00000000 + 80000184: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xfe0308ebc5baebf6 + 80000188: 0008b303 ld x6,0(x17) + 8000018c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xa35b6324a312325f + 80000190: 0008bc03 ld x24,0(x17) + 80000194: 00888893 addi x17,x17,8 + +0000000080000198 : +Zbkx_xperm4_cg_cp_rs1_b6: + xperm4 x19, x6, x24 # perform operation + 80000198: 298329b3 xperm4 x19,x6,x24 + # Check if x19 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x19, Zbkx_xperm4_cg_cp_rs1_b6, Zbkx_xperm4_cg_cp_rs1_b6_str) + 8000019c: 000eb683 ld x13,0(x29) + 800001a0: 01368c63 beq x13,x19,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e5a2 .word 0x8000e5a2 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xf11f148c57df791d + 800001bc: 0008b383 ld x7,0(x17) + 800001c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xaefc1bf812c32c4b + 800001c4: 0008b583 ld x11,0(x17) + 800001c8: 00888893 addi x17,x17,8 + +00000000800001cc : +Zbkx_xperm4_cg_cp_rs1_b7: + xperm4 x30, x7, x11 # perform operation + 800001cc: 28b3af33 xperm4 x30,x7,x11 + # Check if x30 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x30, Zbkx_xperm4_cg_cp_rs1_b7, Zbkx_xperm4_cg_cp_rs1_b7_str) + 800001d0: 000eb683 ld x13,0(x29) + 800001d4: 01e68c63 beq x13,x30,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5d5 .word 0x8000e5d5 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x276109eb32f58ab0 + 800001f0: 0008b403 ld x8,0(x17) + 800001f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xec24fd02f55890c6 + 800001f8: 0008b083 ld x1,0(x17) + 800001fc: 00888893 addi x17,x17,8 + +0000000080000200 : +Zbkx_xperm4_cg_cp_rs1_b8: + xperm4 x25, x8, x1 # perform operation + 80000200: 28142cb3 xperm4 x25,x8,x1 + # Check if x25 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x25, Zbkx_xperm4_cg_cp_rs1_b8, Zbkx_xperm4_cg_cp_rs1_b8_str) + 80000204: 000eb683 ld x13,0(x29) + 80000208: 01968c63 beq x13,x25,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e608 .word 0x8000e608 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x2a8ac57d7b1f70c4 + 80000224: 0008b483 ld x9,0(x17) + 80000228: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x977d832b4cb4befa + 8000022c: 0008b903 ld x18,0(x17) + 80000230: 00888893 addi x17,x17,8 + +0000000080000234 : +Zbkx_xperm4_cg_cp_rs1_b9: + xperm4 x19, x9, x18 # perform operation + 80000234: 2924a9b3 xperm4 x19,x9,x18 + # Check if x19 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x19, Zbkx_xperm4_cg_cp_rs1_b9, Zbkx_xperm4_cg_cp_rs1_b9_str) + 80000238: 000eb683 ld x13,0(x29) + 8000023c: 01368c63 beq x13,x19,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e63b .word 0x8000e63b + 80000250: 00000000 .word 0x00000000 + 80000254: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xcaa4bad58c040ee1 + 80000258: 0008b503 ld x10,0(x17) + 8000025c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x4f84aab0cc7229e7 + 80000260: 0008b983 ld x19,0(x17) + 80000264: 00888893 addi x17,x17,8 + +0000000080000268 : +Zbkx_xperm4_cg_cp_rs1_b10: + xperm4 x5, x10, x19 # perform operation + 80000268: 293522b3 xperm4 x5,x10,x19 + # Check if x5 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x5, Zbkx_xperm4_cg_cp_rs1_b10, Zbkx_xperm4_cg_cp_rs1_b10_str) + 8000026c: 000eb683 ld x13,0(x29) + 80000270: 00568c63 beq x13,x5,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e66f .word 0x8000e66f + 80000284: 00000000 .word 0x00000000 + 80000288: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xc92c0b276daeeb85 + 8000028c: 0008b583 ld x11,0(x17) + 80000290: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xd14802a0cb25a413 + 80000294: 0008bd03 ld x26,0(x17) + 80000298: 00888893 addi x17,x17,8 + +000000008000029c : +Zbkx_xperm4_cg_cp_rs1_b11: + xperm4 x30, x11, x26 # perform operation + 8000029c: 29a5af33 xperm4 x30,x11,x26 + # Check if x30 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x30, Zbkx_xperm4_cg_cp_rs1_b11, Zbkx_xperm4_cg_cp_rs1_b11_str) + 800002a0: 000eb683 ld x13,0(x29) + 800002a4: 01e68c63 beq x13,x30,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e6a4 .word 0x8000e6a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xee656934cf620435 + 800002c0: 0008b603 ld x12,0(x17) + 800002c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x5bfdeb7e27d24469 + 800002c8: 0008b783 ld x15,0(x17) + 800002cc: 00888893 addi x17,x17,8 + +00000000800002d0 : +Zbkx_xperm4_cg_cp_rs1_b12: + xperm4 x25, x12, x15 # perform operation + 800002d0: 28f62cb3 xperm4 x25,x12,x15 + # Check if x25 contains the expected result. x29 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x29, x14, x13, x25, Zbkx_xperm4_cg_cp_rs1_b12, Zbkx_xperm4_cg_cp_rs1_b12_str) + 800002d4: 000eb683 ld x13,0(x29) + 800002d8: 01968c63 beq x13,x25,800002f0 + 800002dc: 2650776f jal x14,80007d40 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 8000e6d9 .word 0x8000e6d9 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008e8e93 addi x29,x29,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002f4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xa1bf8b75b3a9cb6b + 800002fc: 0008b683 ld x13,0(x17) + 80000300: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x10e361b745bb3b35 + 80000304: 0008b483 ld x9,0(x17) + 80000308: 00888893 addi x17,x17,8 + +000000008000030c : +Zbkx_xperm4_cg_cp_rs1_b13: + xperm4 x4, x13, x9 # perform operation + 8000030c: 2896a233 xperm4 x4,x13,x9 + # Check if x4 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x4, Zbkx_xperm4_cg_cp_rs1_b13, Zbkx_xperm4_cg_cp_rs1_b13_str) + 80000310: 000eb383 ld x7,0(x29) + 80000314: 00438c63 beq x7,x4,8000032c + 80000318: 2010746f jal x8,80007d18 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e70e .word 0x8000e70e + 80000328: 00000000 .word 0x00000000 + 8000032c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x87d33713c02e7d88 + 80000330: 0008b703 ld x14,0(x17) + 80000334: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x60e96c89fcf44460 + 80000338: 0008b903 ld x18,0(x17) + 8000033c: 00888893 addi x17,x17,8 + +0000000080000340 : +Zbkx_xperm4_cg_cp_rs1_b14: + xperm4 x2, x14, x18 # perform operation + 80000340: 29272133 xperm4 x2,x14,x18 + # Check if x2 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x2, Zbkx_xperm4_cg_cp_rs1_b14, Zbkx_xperm4_cg_cp_rs1_b14_str) + 80000344: 000eb383 ld x7,0(x29) + 80000348: 00238c63 beq x7,x2,80000360 + 8000034c: 1cd0746f jal x8,80007d18 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e743 .word 0x8000e743 + 8000035c: 00000000 .word 0x00000000 + 80000360: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x73136c50205e36ad + 80000364: 0008b783 ld x15,0(x17) + 80000368: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0cbef44a9a427029 + 8000036c: 0008bb03 ld x22,0(x17) + 80000370: 00888893 addi x17,x17,8 + +0000000080000374 : +Zbkx_xperm4_cg_cp_rs1_b15: + xperm4 x1, x15, x22 # perform operation + 80000374: 2967a0b3 xperm4 x1,x15,x22 + # Check if x1 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x1, Zbkx_xperm4_cg_cp_rs1_b15, Zbkx_xperm4_cg_cp_rs1_b15_str) + 80000378: 000eb383 ld x7,0(x29) + 8000037c: 00138c63 beq x7,x1,80000394 + 80000380: 1990746f jal x8,80007d18 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 8000e778 .word 0x8000e778 + 80000390: 00000000 .word 0x00000000 + 80000394: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xa570f4cffa7e56f3 + 80000398: 0008b803 ld x16,0(x17) + 8000039c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x5b36dc69f6bd5dee + 800003a0: 0008b783 ld x15,0(x17) + 800003a4: 00888893 addi x17,x17,8 + +00000000800003a8 : +Zbkx_xperm4_cg_cp_rs1_b16: + xperm4 x5, x16, x15 # perform operation + 800003a8: 28f822b3 xperm4 x5,x16,x15 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zbkx_xperm4_cg_cp_rs1_b16, Zbkx_xperm4_cg_cp_rs1_b16_str) + 800003ac: 000eb383 ld x7,0(x29) + 800003b0: 00538c63 beq x7,x5,800003c8 + 800003b4: 1650746f jal x8,80007d18 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 8000e7ad .word 0x8000e7ad + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008e8e93 addi x29,x29,8 + + mv x16, x17 # switch data pointer register to avoid conflict with test + 800003cc: 00088813 addi x16,x17,0 +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x9541a0d118f0b012 + 800003d0: 00083883 ld x17,0(x16) + 800003d4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x2bab4b74e9e82ec1 + 800003d8: 00083483 ld x9,0(x16) + 800003dc: 00880813 addi x16,x16,8 + +00000000800003e0 : +Zbkx_xperm4_cg_cp_rs1_b17: + xperm4 x0, x17, x9 # perform operation + 800003e0: 2898a033 xperm4 x0,x17,x9 + # Check if x0 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x0, Zbkx_xperm4_cg_cp_rs1_b17, Zbkx_xperm4_cg_cp_rs1_b17_str) + 800003e4: 000eb383 ld x7,0(x29) + 800003e8: 00038c63 beq x7,x0,80000400 + 800003ec: 12d0746f jal x8,80007d18 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 8000e7e2 .word 0x8000e7e2 + 800003fc: 00000000 .word 0x00000000 + 80000400: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x4345516c695017ff + 80000404: 00083903 ld x18,0(x16) + 80000408: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0xcb31603a2f13640c + 8000040c: 00083883 ld x17,0(x16) + 80000410: 00880813 addi x16,x16,8 + +0000000080000414 : +Zbkx_xperm4_cg_cp_rs1_b18: + xperm4 x27, x18, x17 # perform operation + 80000414: 29192db3 xperm4 x27,x18,x17 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zbkx_xperm4_cg_cp_rs1_b18, Zbkx_xperm4_cg_cp_rs1_b18_str) + 80000418: 000eb383 ld x7,0(x29) + 8000041c: 01b38c63 beq x7,x27,80000434 + 80000420: 0f90746f jal x8,80007d18 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8000e817 .word 0x8000e817 + 80000430: 00000000 .word 0x00000000 + 80000434: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x38111e4a3beab81b + 80000438: 00083983 ld x19,0(x16) + 8000043c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xc17f16f2763817aa + 80000440: 00083183 ld x3,0(x16) + 80000444: 00880813 addi x16,x16,8 + +0000000080000448 : +Zbkx_xperm4_cg_cp_rs1_b19: + xperm4 x10, x19, x3 # perform operation + 80000448: 2839a533 xperm4 x10,x19,x3 + # Check if x10 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x10, Zbkx_xperm4_cg_cp_rs1_b19, Zbkx_xperm4_cg_cp_rs1_b19_str) + 8000044c: 000eb383 ld x7,0(x29) + 80000450: 00a38c63 beq x7,x10,80000468 + 80000454: 0c50746f jal x8,80007d18 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8000e84c .word 0x8000e84c + 80000464: 00000000 .word 0x00000000 + 80000468: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x9e1568e55730dae1 + 8000046c: 00083a03 ld x20,0(x16) + 80000470: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x665ac43c879a4662 + 80000474: 00083b83 ld x23,0(x16) + 80000478: 00880813 addi x16,x16,8 + +000000008000047c : +Zbkx_xperm4_cg_cp_rs1_b20: + xperm4 x18, x20, x23 # perform operation + 8000047c: 297a2933 xperm4 x18,x20,x23 + # Check if x18 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x18, Zbkx_xperm4_cg_cp_rs1_b20, Zbkx_xperm4_cg_cp_rs1_b20_str) + 80000480: 000eb383 ld x7,0(x29) + 80000484: 01238c63 beq x7,x18,8000049c + 80000488: 0910746f jal x8,80007d18 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 8000e881 .word 0x8000e881 + 80000498: 00000000 .word 0x00000000 + 8000049c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x5073d3818b2cb88e + 800004a0: 00083a83 ld x21,0(x16) + 800004a4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xb0fc3d9edea8a01d + 800004a8: 00083c83 ld x25,0(x16) + 800004ac: 00880813 addi x16,x16,8 + +00000000800004b0 : +Zbkx_xperm4_cg_cp_rs1_b21: + xperm4 x5, x21, x25 # perform operation + 800004b0: 299aa2b3 xperm4 x5,x21,x25 + # Check if x5 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x5, Zbkx_xperm4_cg_cp_rs1_b21, Zbkx_xperm4_cg_cp_rs1_b21_str) + 800004b4: 000eb383 ld x7,0(x29) + 800004b8: 00538c63 beq x7,x5,800004d0 + 800004bc: 05d0746f jal x8,80007d18 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 8000e8b6 .word 0x8000e8b6 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xd7150d90d5c79ecf + 800004d4: 00083b03 ld x22,0(x16) + 800004d8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xff9a9ee50fc5bd7c + 800004dc: 00083d83 ld x27,0(x16) + 800004e0: 00880813 addi x16,x16,8 + +00000000800004e4 : +Zbkx_xperm4_cg_cp_rs1_b22: + xperm4 x11, x22, x27 # perform operation + 800004e4: 29bb25b3 xperm4 x11,x22,x27 + # Check if x11 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x11, Zbkx_xperm4_cg_cp_rs1_b22, Zbkx_xperm4_cg_cp_rs1_b22_str) + 800004e8: 000eb383 ld x7,0(x29) + 800004ec: 00b38c63 beq x7,x11,80000504 + 800004f0: 0290746f jal x8,80007d18 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 8000e8eb .word 0x8000e8eb + 80000500: 00000000 .word 0x00000000 + 80000504: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x9089c9e5d4821fef + 80000508: 00083b83 ld x23,0(x16) + 8000050c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0xb420f5f53fd7f902 + 80000510: 00083d83 ld x27,0(x16) + 80000514: 00880813 addi x16,x16,8 + +0000000080000518 : +Zbkx_xperm4_cg_cp_rs1_b23: + xperm4 x24, x23, x27 # perform operation + 80000518: 29bbac33 xperm4 x24,x23,x27 + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zbkx_xperm4_cg_cp_rs1_b23, Zbkx_xperm4_cg_cp_rs1_b23_str) + 8000051c: 000eb383 ld x7,0(x29) + 80000520: 01838c63 beq x7,x24,80000538 + 80000524: 7f40746f jal x8,80007d18 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 8000e920 .word 0x8000e920 + 80000534: 00000000 .word 0x00000000 + 80000538: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x303db39c6fbc0e66 + 8000053c: 00083c03 ld x24,0(x16) + 80000540: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x81d733a1b4365481 + 80000544: 00083083 ld x1,0(x16) + 80000548: 00880813 addi x16,x16,8 + +000000008000054c : +Zbkx_xperm4_cg_cp_rs1_b24: + xperm4 x19, x24, x1 # perform operation + 8000054c: 281c29b3 xperm4 x19,x24,x1 + # Check if x19 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x19, Zbkx_xperm4_cg_cp_rs1_b24, Zbkx_xperm4_cg_cp_rs1_b24_str) + 80000550: 000eb383 ld x7,0(x29) + 80000554: 01338c63 beq x7,x19,8000056c + 80000558: 7c00746f jal x8,80007d18 + 8000055c: 8000054c .word 0x8000054c + 80000560: 00000000 .word 0x00000000 + 80000564: 8000e955 .word 0x8000e955 + 80000568: 00000000 .word 0x00000000 + 8000056c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x9ce1704a405b0a3c + 80000570: 00083c83 ld x25,0(x16) + 80000574: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xc538b051dd5cb3d4 + 80000578: 00083103 ld x2,0(x16) + 8000057c: 00880813 addi x16,x16,8 + +0000000080000580 : +Zbkx_xperm4_cg_cp_rs1_b25: + xperm4 x11, x25, x2 # perform operation + 80000580: 282ca5b3 xperm4 x11,x25,x2 + # Check if x11 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x11, Zbkx_xperm4_cg_cp_rs1_b25, Zbkx_xperm4_cg_cp_rs1_b25_str) + 80000584: 000eb383 ld x7,0(x29) + 80000588: 00b38c63 beq x7,x11,800005a0 + 8000058c: 78c0746f jal x8,80007d18 + 80000590: 80000580 .word 0x80000580 + 80000594: 00000000 .word 0x00000000 + 80000598: 8000e98a .word 0x8000e98a + 8000059c: 00000000 .word 0x00000000 + 800005a0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x4975b35681f61775 + 800005a4: 00083d03 ld x26,0(x16) + 800005a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x1221c7636c457ded + 800005ac: 00083983 ld x19,0(x16) + 800005b0: 00880813 addi x16,x16,8 + +00000000800005b4 : +Zbkx_xperm4_cg_cp_rs1_b26: + xperm4 x0, x26, x19 # perform operation + 800005b4: 293d2033 xperm4 x0,x26,x19 + # Check if x0 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x0, Zbkx_xperm4_cg_cp_rs1_b26, Zbkx_xperm4_cg_cp_rs1_b26_str) + 800005b8: 000eb383 ld x7,0(x29) + 800005bc: 00038c63 beq x7,x0,800005d4 + 800005c0: 7580746f jal x8,80007d18 + 800005c4: 800005b4 .word 0x800005b4 + 800005c8: 00000000 .word 0x00000000 + 800005cc: 8000e9bf .word 0x8000e9bf + 800005d0: 00000000 .word 0x00000000 + 800005d4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xd0039b86b22ed3a2 + 800005d8: 00083d83 ld x27,0(x16) + 800005dc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x9250f815379d4fc0 + 800005e0: 00083583 ld x11,0(x16) + 800005e4: 00880813 addi x16,x16,8 + +00000000800005e8 : +Zbkx_xperm4_cg_cp_rs1_b27: + xperm4 x9, x27, x11 # perform operation + 800005e8: 28bda4b3 xperm4 x9,x27,x11 + # Check if x9 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x9, Zbkx_xperm4_cg_cp_rs1_b27, Zbkx_xperm4_cg_cp_rs1_b27_str) + 800005ec: 000eb383 ld x7,0(x29) + 800005f0: 00938c63 beq x7,x9,80000608 + 800005f4: 7240746f jal x8,80007d18 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 8000e9f4 .word 0x8000e9f4 + 80000604: 00000000 .word 0x00000000 + 80000608: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xc19189061a8f749c + 8000060c: 00083e03 ld x28,0(x16) + 80000610: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x76c20e2c66e5dcfc + 80000614: 00083b03 ld x22,0(x16) + 80000618: 00880813 addi x16,x16,8 + +000000008000061c : +Zbkx_xperm4_cg_cp_rs1_b28: + xperm4 x1, x28, x22 # perform operation + 8000061c: 296e20b3 xperm4 x1,x28,x22 + # Check if x1 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x1, Zbkx_xperm4_cg_cp_rs1_b28, Zbkx_xperm4_cg_cp_rs1_b28_str) + 80000620: 000eb383 ld x7,0(x29) + 80000624: 00138c63 beq x7,x1,8000063c + 80000628: 6f00746f jal x8,80007d18 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 8000ea29 .word 0x8000ea29 + 80000638: 00000000 .word 0x00000000 + 8000063c: 008e8e93 addi x29,x29,8 + + mv x20, x29 # switch signature pointer register to avoid conflict with test + 80000640: 000e8a13 addi x20,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xaa4b09ec11a646ab + 80000644: 00083e83 ld x29,0(x16) + 80000648: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x107b76ec4e3dbb9c + 8000064c: 00083e03 ld x28,0(x16) + 80000650: 00880813 addi x16,x16,8 + +0000000080000654 : +Zbkx_xperm4_cg_cp_rs1_b29: + xperm4 x22, x29, x28 # perform operation + 80000654: 29ceab33 xperm4 x22,x29,x28 + # Check if x22 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x22, Zbkx_xperm4_cg_cp_rs1_b29, Zbkx_xperm4_cg_cp_rs1_b29_str) + 80000658: 000a3383 ld x7,0(x20) + 8000065c: 01638c63 beq x7,x22,80000674 + 80000660: 6b80746f jal x8,80007d18 + 80000664: 80000654 .word 0x80000654 + 80000668: 00000000 .word 0x00000000 + 8000066c: 8000ea5e .word 0x8000ea5e + 80000670: 00000000 .word 0x00000000 + 80000674: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x5480dc354bd00038 + 80000678: 00083f03 ld x30,0(x16) + 8000067c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x95d20fe01ca02e7c + 80000680: 00083083 ld x1,0(x16) + 80000684: 00880813 addi x16,x16,8 + +0000000080000688 : +Zbkx_xperm4_cg_cp_rs1_b30: + xperm4 x23, x30, x1 # perform operation + 80000688: 281f2bb3 xperm4 x23,x30,x1 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zbkx_xperm4_cg_cp_rs1_b30, Zbkx_xperm4_cg_cp_rs1_b30_str) + 8000068c: 000a3383 ld x7,0(x20) + 80000690: 01738c63 beq x7,x23,800006a8 + 80000694: 6840746f jal x8,80007d18 + 80000698: 80000688 .word 0x80000688 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 8000ea93 .word 0x8000ea93 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x50242c5df7f308aa + 800006ac: 00083f83 ld x31,0(x16) + 800006b0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xc5552123ac657cea + 800006b4: 00083103 ld x2,0(x16) + 800006b8: 00880813 addi x16,x16,8 + +00000000800006bc : +Zbkx_xperm4_cg_cp_rs1_b31: + xperm4 x18, x31, x2 # perform operation + 800006bc: 282fa933 xperm4 x18,x31,x2 + # Check if x18 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x18, Zbkx_xperm4_cg_cp_rs1_b31, Zbkx_xperm4_cg_cp_rs1_b31_str) + 800006c0: 000a3383 ld x7,0(x20) + 800006c4: 01238c63 beq x7,x18,800006dc + 800006c8: 6500746f jal x8,80007d18 + 800006cc: 800006bc .word 0x800006bc + 800006d0: 00000000 .word 0x00000000 + 800006d4: 8000eac8 .word 0x8000eac8 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x4d527cf145267a5f + 800006e0: 00083783 ld x15,0(x16) + 800006e4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x47bdb26584ceb9aa + 800006e8: 00083003 ld x0,0(x16) + 800006ec: 00880813 addi x16,x16,8 + +00000000800006f0 : +Zbkx_xperm4_cg_cp_rs2_b0: + xperm4 x30, x15, x0 # perform operation + 800006f0: 2807af33 xperm4 x30,x15,x0 + # Check if x30 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x30, Zbkx_xperm4_cg_cp_rs2_b0, Zbkx_xperm4_cg_cp_rs2_b0_str) + 800006f4: 000a3383 ld x7,0(x20) + 800006f8: 01e38c63 beq x7,x30,80000710 + 800006fc: 61c0746f jal x8,80007d18 + 80000700: 800006f0 .word 0x800006f0 + 80000704: 00000000 .word 0x00000000 + 80000708: 8000eafd .word 0x8000eafd + 8000070c: 00000000 .word 0x00000000 + 80000710: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xa2a7e881f8b3e560 + 80000714: 00083603 ld x12,0(x16) + 80000718: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x7a63dadd190c7c01 + 8000071c: 00083083 ld x1,0(x16) + 80000720: 00880813 addi x16,x16,8 + +0000000080000724 : +Zbkx_xperm4_cg_cp_rs2_b1: + xperm4 x14, x12, x1 # perform operation + 80000724: 28162733 xperm4 x14,x12,x1 + # Check if x14 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x14, Zbkx_xperm4_cg_cp_rs2_b1, Zbkx_xperm4_cg_cp_rs2_b1_str) + 80000728: 000a3383 ld x7,0(x20) + 8000072c: 00e38c63 beq x7,x14,80000744 + 80000730: 5e80746f jal x8,80007d18 + 80000734: 80000724 .word 0x80000724 + 80000738: 00000000 .word 0x00000000 + 8000073c: 8000eb31 .word 0x8000eb31 + 80000740: 00000000 .word 0x00000000 + 80000744: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xd92b0ce2c4ad15ef + 80000748: 00083883 ld x17,0(x16) + 8000074c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x180e2680881055c6 + 80000750: 00083103 ld x2,0(x16) + 80000754: 00880813 addi x16,x16,8 + +0000000080000758 : +Zbkx_xperm4_cg_cp_rs2_b2: + xperm4 x27, x17, x2 # perform operation + 80000758: 2828adb3 xperm4 x27,x17,x2 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zbkx_xperm4_cg_cp_rs2_b2, Zbkx_xperm4_cg_cp_rs2_b2_str) + 8000075c: 000a3383 ld x7,0(x20) + 80000760: 01b38c63 beq x7,x27,80000778 + 80000764: 5b40746f jal x8,80007d18 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 8000eb65 .word 0x8000eb65 + 80000774: 00000000 .word 0x00000000 + 80000778: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x6080899b1f666df7 + 8000077c: 00083c03 ld x24,0(x16) + 80000780: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xca5d152650829b61 + 80000784: 00083183 ld x3,0(x16) + 80000788: 00880813 addi x16,x16,8 + +000000008000078c : +Zbkx_xperm4_cg_cp_rs2_b3: + xperm4 x5, x24, x3 # perform operation + 8000078c: 283c22b3 xperm4 x5,x24,x3 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zbkx_xperm4_cg_cp_rs2_b3, Zbkx_xperm4_cg_cp_rs2_b3_str) + 80000790: 000a3383 ld x7,0(x20) + 80000794: 00538c63 beq x7,x5,800007ac + 80000798: 5800746f jal x8,80007d18 + 8000079c: 8000078c .word 0x8000078c + 800007a0: 00000000 .word 0x00000000 + 800007a4: 8000eb99 .word 0x8000eb99 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x84f58bfcf0332679 + 800007b0: 00083883 ld x17,0(x16) + 800007b4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x1043ea94a7d6403f + 800007b8: 00083203 ld x4,0(x16) + 800007bc: 00880813 addi x16,x16,8 + +00000000800007c0 : +Zbkx_xperm4_cg_cp_rs2_b4: + xperm4 x6, x17, x4 # perform operation + 800007c0: 2848a333 xperm4 x6,x17,x4 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zbkx_xperm4_cg_cp_rs2_b4, Zbkx_xperm4_cg_cp_rs2_b4_str) + 800007c4: 000a3383 ld x7,0(x20) + 800007c8: 00638c63 beq x7,x6,800007e0 + 800007cc: 54c0746f jal x8,80007d18 + 800007d0: 800007c0 .word 0x800007c0 + 800007d4: 00000000 .word 0x00000000 + 800007d8: 8000ebcd .word 0x8000ebcd + 800007dc: 00000000 .word 0x00000000 + 800007e0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xb6338fcb60074dc9 + 800007e4: 00083d83 ld x27,0(x16) + 800007e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xa777929ec0c383f8 + 800007ec: 00083283 ld x5,0(x16) + 800007f0: 00880813 addi x16,x16,8 + +00000000800007f4 : +Zbkx_xperm4_cg_cp_rs2_b5: + xperm4 x12, x27, x5 # perform operation + 800007f4: 285da633 xperm4 x12,x27,x5 + # Check if x12 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x12, Zbkx_xperm4_cg_cp_rs2_b5, Zbkx_xperm4_cg_cp_rs2_b5_str) + 800007f8: 000a3383 ld x7,0(x20) + 800007fc: 00c38c63 beq x7,x12,80000814 + 80000800: 5180746f jal x8,80007d18 + 80000804: 800007f4 .word 0x800007f4 + 80000808: 00000000 .word 0x00000000 + 8000080c: 8000ec01 .word 0x8000ec01 + 80000810: 00000000 .word 0x00000000 + 80000814: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x70ad1e6a5868dd35 + 80000818: 00083703 ld x14,0(x16) + 8000081c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xd7a00df80bac8bd8 + 80000820: 00083303 ld x6,0(x16) + 80000824: 00880813 addi x16,x16,8 + +0000000080000828 : +Zbkx_xperm4_cg_cp_rs2_b6: + xperm4 x28, x14, x6 # perform operation + 80000828: 28672e33 xperm4 x28,x14,x6 + # Check if x28 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x28, Zbkx_xperm4_cg_cp_rs2_b6, Zbkx_xperm4_cg_cp_rs2_b6_str) + 8000082c: 000a3383 ld x7,0(x20) + 80000830: 01c38c63 beq x7,x28,80000848 + 80000834: 4e40746f jal x8,80007d18 + 80000838: 80000828 .word 0x80000828 + 8000083c: 00000000 .word 0x00000000 + 80000840: 8000ec35 .word 0x8000ec35 + 80000844: 00000000 .word 0x00000000 + 80000848: 008a0a13 addi x20,x20,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 8000084c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000850: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x0175cd048df479d6 + 80000854: 00083303 ld x6,0(x16) + 80000858: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x23ded22ab8041d45 + 8000085c: 00083383 ld x7,0(x16) + 80000860: 00880813 addi x16,x16,8 + +0000000080000864 : +Zbkx_xperm4_cg_cp_rs2_b7: + xperm4 x23, x6, x7 # perform operation + 80000864: 28732bb3 xperm4 x23,x6,x7 + # Check if x23 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x23, Zbkx_xperm4_cg_cp_rs2_b7, Zbkx_xperm4_cg_cp_rs2_b7_str) + 80000868: 000a3203 ld x4,0(x20) + 8000086c: 01720c63 beq x4,x23,80000884 + 80000870: 490072ef jal x5,80007d00 + 80000874: 80000864 .word 0x80000864 + 80000878: 00000000 .word 0x00000000 + 8000087c: 8000ec69 .word 0x8000ec69 + 80000880: 00000000 .word 0x00000000 + 80000884: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xdf8c45be64f8a189 + 80000888: 00083083 ld x1,0(x16) + 8000088c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x2937a828b634b68c + 80000890: 00083403 ld x8,0(x16) + 80000894: 00880813 addi x16,x16,8 + +0000000080000898 : +Zbkx_xperm4_cg_cp_rs2_b8: + xperm4 x13, x1, x8 # perform operation + 80000898: 2880a6b3 xperm4 x13,x1,x8 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zbkx_xperm4_cg_cp_rs2_b8, Zbkx_xperm4_cg_cp_rs2_b8_str) + 8000089c: 000a3203 ld x4,0(x20) + 800008a0: 00d20c63 beq x4,x13,800008b8 + 800008a4: 45c072ef jal x5,80007d00 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 8000ec9d .word 0x8000ec9d + 800008b4: 00000000 .word 0x00000000 + 800008b8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x1c7e375aaff07fb9 + 800008bc: 00083a83 ld x21,0(x16) + 800008c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xb18b4ff6fe43d487 + 800008c4: 00083483 ld x9,0(x16) + 800008c8: 00880813 addi x16,x16,8 + +00000000800008cc : +Zbkx_xperm4_cg_cp_rs2_b9: + xperm4 x2, x21, x9 # perform operation + 800008cc: 289aa133 xperm4 x2,x21,x9 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zbkx_xperm4_cg_cp_rs2_b9, Zbkx_xperm4_cg_cp_rs2_b9_str) + 800008d0: 000a3203 ld x4,0(x20) + 800008d4: 00220c63 beq x4,x2,800008ec + 800008d8: 428072ef jal x5,80007d00 + 800008dc: 800008cc .word 0x800008cc + 800008e0: 00000000 .word 0x00000000 + 800008e4: 8000ecd1 .word 0x8000ecd1 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xbba876fc00e4411f + 800008f0: 00083403 ld x8,0(x16) + 800008f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xa7bc9853d8397e35 + 800008f8: 00083503 ld x10,0(x16) + 800008fc: 00880813 addi x16,x16,8 + +0000000080000900 : +Zbkx_xperm4_cg_cp_rs2_b10: + xperm4 x30, x8, x10 # perform operation + 80000900: 28a42f33 xperm4 x30,x8,x10 + # Check if x30 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x30, Zbkx_xperm4_cg_cp_rs2_b10, Zbkx_xperm4_cg_cp_rs2_b10_str) + 80000904: 000a3203 ld x4,0(x20) + 80000908: 01e20c63 beq x4,x30,80000920 + 8000090c: 3f4072ef jal x5,80007d00 + 80000910: 80000900 .word 0x80000900 + 80000914: 00000000 .word 0x00000000 + 80000918: 8000ed05 .word 0x8000ed05 + 8000091c: 00000000 .word 0x00000000 + 80000920: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0xef4f70cd29907e8d + 80000924: 00083c03 ld x24,0(x16) + 80000928: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x57b3e9c52de2c8c4 + 8000092c: 00083583 ld x11,0(x16) + 80000930: 00880813 addi x16,x16,8 + +0000000080000934 : +Zbkx_xperm4_cg_cp_rs2_b11: + xperm4 x18, x24, x11 # perform operation + 80000934: 28bc2933 xperm4 x18,x24,x11 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zbkx_xperm4_cg_cp_rs2_b11, Zbkx_xperm4_cg_cp_rs2_b11_str) + 80000938: 000a3203 ld x4,0(x20) + 8000093c: 01220c63 beq x4,x18,80000954 + 80000940: 3c0072ef jal x5,80007d00 + 80000944: 80000934 .word 0x80000934 + 80000948: 00000000 .word 0x00000000 + 8000094c: 8000ed3a .word 0x8000ed3a + 80000950: 00000000 .word 0x00000000 + 80000954: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x85961146668c0a8e + 80000958: 00083f03 ld x30,0(x16) + 8000095c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xc4f533f283fb6f67 + 80000960: 00083603 ld x12,0(x16) + 80000964: 00880813 addi x16,x16,8 + +0000000080000968 : +Zbkx_xperm4_cg_cp_rs2_b12: + xperm4 x14, x30, x12 # perform operation + 80000968: 28cf2733 xperm4 x14,x30,x12 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zbkx_xperm4_cg_cp_rs2_b12, Zbkx_xperm4_cg_cp_rs2_b12_str) + 8000096c: 000a3203 ld x4,0(x20) + 80000970: 00e20c63 beq x4,x14,80000988 + 80000974: 38c072ef jal x5,80007d00 + 80000978: 80000968 .word 0x80000968 + 8000097c: 00000000 .word 0x00000000 + 80000980: 8000ed6f .word 0x8000ed6f + 80000984: 00000000 .word 0x00000000 + 80000988: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xd6e0de06d3e1d321 + 8000098c: 00083e03 ld x28,0(x16) + 80000990: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x60f792427d827727 + 80000994: 00083683 ld x13,0(x16) + 80000998: 00880813 addi x16,x16,8 + +000000008000099c : +Zbkx_xperm4_cg_cp_rs2_b13: + xperm4 x15, x28, x13 # perform operation + 8000099c: 28de27b3 xperm4 x15,x28,x13 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zbkx_xperm4_cg_cp_rs2_b13, Zbkx_xperm4_cg_cp_rs2_b13_str) + 800009a0: 000a3203 ld x4,0(x20) + 800009a4: 00f20c63 beq x4,x15,800009bc + 800009a8: 358072ef jal x5,80007d00 + 800009ac: 8000099c .word 0x8000099c + 800009b0: 00000000 .word 0x00000000 + 800009b4: 8000eda4 .word 0x8000eda4 + 800009b8: 00000000 .word 0x00000000 + 800009bc: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x3b9dfa1ef5a4b350 + 800009c0: 00083c03 ld x24,0(x16) + 800009c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x38931c29eeef847e + 800009c8: 00083703 ld x14,0(x16) + 800009cc: 00880813 addi x16,x16,8 + +00000000800009d0 : +Zbkx_xperm4_cg_cp_rs2_b14: + xperm4 x28, x24, x14 # perform operation + 800009d0: 28ec2e33 xperm4 x28,x24,x14 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zbkx_xperm4_cg_cp_rs2_b14, Zbkx_xperm4_cg_cp_rs2_b14_str) + 800009d4: 000a3203 ld x4,0(x20) + 800009d8: 01c20c63 beq x4,x28,800009f0 + 800009dc: 324072ef jal x5,80007d00 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 8000edd9 .word 0x8000edd9 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x9e88492f3b55ef8a + 800009f4: 00083383 ld x7,0(x16) + 800009f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x4f2fbfbf14e652ec + 800009fc: 00083783 ld x15,0(x16) + 80000a00: 00880813 addi x16,x16,8 + +0000000080000a04 : +Zbkx_xperm4_cg_cp_rs2_b15: + xperm4 x31, x7, x15 # perform operation + 80000a04: 28f3afb3 xperm4 x31,x7,x15 + # Check if x31 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x31, Zbkx_xperm4_cg_cp_rs2_b15, Zbkx_xperm4_cg_cp_rs2_b15_str) + 80000a08: 000a3203 ld x4,0(x20) + 80000a0c: 01f20c63 beq x4,x31,80000a24 + 80000a10: 2f0072ef jal x5,80007d00 + 80000a14: 80000a04 .word 0x80000a04 + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 8000ee0e .word 0x8000ee0e + 80000a20: 00000000 .word 0x00000000 + 80000a24: 008a0a13 addi x20,x20,8 + + mv x12, x16 # switch data pointer register to avoid conflict with test + 80000a28: 00080613 addi x12,x16,0 +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xeff153bdbb1b2cd0 + 80000a2c: 00063003 ld x0,0(x12) + 80000a30: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x30487cac443217fb + 80000a34: 00063803 ld x16,0(x12) + 80000a38: 00860613 addi x12,x12,8 + +0000000080000a3c : +Zbkx_xperm4_cg_cp_rs2_b16: + xperm4 x24, x0, x16 # perform operation + 80000a3c: 29002c33 xperm4 x24,x0,x16 + # Check if x24 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x24, Zbkx_xperm4_cg_cp_rs2_b16, Zbkx_xperm4_cg_cp_rs2_b16_str) + 80000a40: 000a3203 ld x4,0(x20) + 80000a44: 01820c63 beq x4,x24,80000a5c + 80000a48: 2b8072ef jal x5,80007d00 + 80000a4c: 80000a3c .word 0x80000a3c + 80000a50: 00000000 .word 0x00000000 + 80000a54: 8000ee43 .word 0x8000ee43 + 80000a58: 00000000 .word 0x00000000 + 80000a5c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x2c183cb1ca9a45a0 + 80000a60: 00063e83 ld x29,0(x12) + 80000a64: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xbe636b730a092fa2 + 80000a68: 00063883 ld x17,0(x12) + 80000a6c: 00860613 addi x12,x12,8 + +0000000080000a70 : +Zbkx_xperm4_cg_cp_rs2_b17: + xperm4 x6, x29, x17 # perform operation + 80000a70: 291ea333 xperm4 x6,x29,x17 + # Check if x6 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x6, Zbkx_xperm4_cg_cp_rs2_b17, Zbkx_xperm4_cg_cp_rs2_b17_str) + 80000a74: 000a3203 ld x4,0(x20) + 80000a78: 00620c63 beq x4,x6,80000a90 + 80000a7c: 284072ef jal x5,80007d00 + 80000a80: 80000a70 .word 0x80000a70 + 80000a84: 00000000 .word 0x00000000 + 80000a88: 8000ee78 .word 0x8000ee78 + 80000a8c: 00000000 .word 0x00000000 + 80000a90: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x4e82b1254777ffba + 80000a94: 00063583 ld x11,0(x12) + 80000a98: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x7ff6db6ee0c2b836 + 80000a9c: 00063903 ld x18,0(x12) + 80000aa0: 00860613 addi x12,x12,8 + +0000000080000aa4 : +Zbkx_xperm4_cg_cp_rs2_b18: + xperm4 x8, x11, x18 # perform operation + 80000aa4: 2925a433 xperm4 x8,x11,x18 + # Check if x8 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x8, Zbkx_xperm4_cg_cp_rs2_b18, Zbkx_xperm4_cg_cp_rs2_b18_str) + 80000aa8: 000a3203 ld x4,0(x20) + 80000aac: 00820c63 beq x4,x8,80000ac4 + 80000ab0: 250072ef jal x5,80007d00 + 80000ab4: 80000aa4 .word 0x80000aa4 + 80000ab8: 00000000 .word 0x00000000 + 80000abc: 8000eead .word 0x8000eead + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xaf481291b14cf838 + 80000ac8: 00063d03 ld x26,0(x12) + 80000acc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x490413083f9aa018 + 80000ad0: 00063983 ld x19,0(x12) + 80000ad4: 00860613 addi x12,x12,8 + +0000000080000ad8 : +Zbkx_xperm4_cg_cp_rs2_b19: + xperm4 x28, x26, x19 # perform operation + 80000ad8: 293d2e33 xperm4 x28,x26,x19 + # Check if x28 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x28, Zbkx_xperm4_cg_cp_rs2_b19, Zbkx_xperm4_cg_cp_rs2_b19_str) + 80000adc: 000a3203 ld x4,0(x20) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 21c072ef jal x5,80007d00 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 8000eee2 .word 0x8000eee2 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 008a0a13 addi x20,x20,8 + + mv x31, x20 # switch signature pointer register to avoid conflict with test + 80000afc: 000a0f93 addi x31,x20,0 +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x30ba9b335c273f4b + 80000b00: 00063a83 ld x21,0(x12) + 80000b04: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x5b8520f877d298f8 + 80000b08: 00063a03 ld x20,0(x12) + 80000b0c: 00860613 addi x12,x12,8 + +0000000080000b10 : +Zbkx_xperm4_cg_cp_rs2_b20: + xperm4 x22, x21, x20 # perform operation + 80000b10: 294aab33 xperm4 x22,x21,x20 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zbkx_xperm4_cg_cp_rs2_b20, Zbkx_xperm4_cg_cp_rs2_b20_str) + 80000b14: 000fb203 ld x4,0(x31) + 80000b18: 01620c63 beq x4,x22,80000b30 + 80000b1c: 1e4072ef jal x5,80007d00 + 80000b20: 80000b10 .word 0x80000b10 + 80000b24: 00000000 .word 0x00000000 + 80000b28: 8000ef17 .word 0x8000ef17 + 80000b2c: 00000000 .word 0x00000000 + 80000b30: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x84928fc6b1adec96 + 80000b34: 00063983 ld x19,0(x12) + 80000b38: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x78e94cb73924cc1c + 80000b3c: 00063a83 ld x21,0(x12) + 80000b40: 00860613 addi x12,x12,8 + +0000000080000b44 : +Zbkx_xperm4_cg_cp_rs2_b21: + xperm4 x1, x19, x21 # perform operation + 80000b44: 2959a0b3 xperm4 x1,x19,x21 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zbkx_xperm4_cg_cp_rs2_b21, Zbkx_xperm4_cg_cp_rs2_b21_str) + 80000b48: 000fb203 ld x4,0(x31) + 80000b4c: 00120c63 beq x4,x1,80000b64 + 80000b50: 1b0072ef jal x5,80007d00 + 80000b54: 80000b44 .word 0x80000b44 + 80000b58: 00000000 .word 0x00000000 + 80000b5c: 8000ef4c .word 0x8000ef4c + 80000b60: 00000000 .word 0x00000000 + 80000b64: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x185d6bdb38578998 + 80000b68: 00063483 ld x9,0(x12) + 80000b6c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xa2967dab52df9305 + 80000b70: 00063b03 ld x22,0(x12) + 80000b74: 00860613 addi x12,x12,8 + +0000000080000b78 : +Zbkx_xperm4_cg_cp_rs2_b22: + xperm4 x25, x9, x22 # perform operation + 80000b78: 2964acb3 xperm4 x25,x9,x22 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zbkx_xperm4_cg_cp_rs2_b22, Zbkx_xperm4_cg_cp_rs2_b22_str) + 80000b7c: 000fb203 ld x4,0(x31) + 80000b80: 01920c63 beq x4,x25,80000b98 + 80000b84: 17c072ef jal x5,80007d00 + 80000b88: 80000b78 .word 0x80000b78 + 80000b8c: 00000000 .word 0x00000000 + 80000b90: 8000ef81 .word 0x8000ef81 + 80000b94: 00000000 .word 0x00000000 + 80000b98: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xcaf687f2553664c1 + 80000b9c: 00063e03 ld x28,0(x12) + 80000ba0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x3f1019a590b1f218 + 80000ba4: 00063b83 ld x23,0(x12) + 80000ba8: 00860613 addi x12,x12,8 + +0000000080000bac : +Zbkx_xperm4_cg_cp_rs2_b23: + xperm4 x7, x28, x23 # perform operation + 80000bac: 297e23b3 xperm4 x7,x28,x23 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zbkx_xperm4_cg_cp_rs2_b23, Zbkx_xperm4_cg_cp_rs2_b23_str) + 80000bb0: 000fb203 ld x4,0(x31) + 80000bb4: 00720c63 beq x4,x7,80000bcc + 80000bb8: 148072ef jal x5,80007d00 + 80000bbc: 80000bac .word 0x80000bac + 80000bc0: 00000000 .word 0x00000000 + 80000bc4: 8000efb6 .word 0x8000efb6 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x1436a267bec587a8 + 80000bd0: 00063503 ld x10,0(x12) + 80000bd4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x1233d1f2ffd220cd + 80000bd8: 00063c03 ld x24,0(x12) + 80000bdc: 00860613 addi x12,x12,8 + +0000000080000be0 : +Zbkx_xperm4_cg_cp_rs2_b24: + xperm4 x19, x10, x24 # perform operation + 80000be0: 298529b3 xperm4 x19,x10,x24 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zbkx_xperm4_cg_cp_rs2_b24, Zbkx_xperm4_cg_cp_rs2_b24_str) + 80000be4: 000fb203 ld x4,0(x31) + 80000be8: 01320c63 beq x4,x19,80000c00 + 80000bec: 114072ef jal x5,80007d00 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 8000efeb .word 0x8000efeb + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x30285a4b36a45a7b + 80000c04: 00063d03 ld x26,0(x12) + 80000c08: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x563ef7a8e5948ad6 + 80000c0c: 00063c83 ld x25,0(x12) + 80000c10: 00860613 addi x12,x12,8 + +0000000080000c14 : +Zbkx_xperm4_cg_cp_rs2_b25: + xperm4 x10, x26, x25 # perform operation + 80000c14: 299d2533 xperm4 x10,x26,x25 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zbkx_xperm4_cg_cp_rs2_b25, Zbkx_xperm4_cg_cp_rs2_b25_str) + 80000c18: 000fb203 ld x4,0(x31) + 80000c1c: 00a20c63 beq x4,x10,80000c34 + 80000c20: 0e0072ef jal x5,80007d00 + 80000c24: 80000c14 .word 0x80000c14 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 8000f020 .word 0x8000f020 + 80000c30: 00000000 .word 0x00000000 + 80000c34: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x6aa7dddd9fc1a381 + 80000c38: 00063703 ld x14,0(x12) + 80000c3c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xaa04c2af6b62cb7b + 80000c40: 00063d03 ld x26,0(x12) + 80000c44: 00860613 addi x12,x12,8 + +0000000080000c48 : +Zbkx_xperm4_cg_cp_rs2_b26: + xperm4 x8, x14, x26 # perform operation + 80000c48: 29a72433 xperm4 x8,x14,x26 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zbkx_xperm4_cg_cp_rs2_b26, Zbkx_xperm4_cg_cp_rs2_b26_str) + 80000c4c: 000fb203 ld x4,0(x31) + 80000c50: 00820c63 beq x4,x8,80000c68 + 80000c54: 0ac072ef jal x5,80007d00 + 80000c58: 80000c48 .word 0x80000c48 + 80000c5c: 00000000 .word 0x00000000 + 80000c60: 8000f055 .word 0x8000f055 + 80000c64: 00000000 .word 0x00000000 + 80000c68: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xb6a49eb2286485e1 + 80000c6c: 00063b83 ld x23,0(x12) + 80000c70: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x6ab95a08081534df + 80000c74: 00063d83 ld x27,0(x12) + 80000c78: 00860613 addi x12,x12,8 + +0000000080000c7c : +Zbkx_xperm4_cg_cp_rs2_b27: + xperm4 x29, x23, x27 # perform operation + 80000c7c: 29bbaeb3 xperm4 x29,x23,x27 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zbkx_xperm4_cg_cp_rs2_b27, Zbkx_xperm4_cg_cp_rs2_b27_str) + 80000c80: 000fb203 ld x4,0(x31) + 80000c84: 01d20c63 beq x4,x29,80000c9c + 80000c88: 078072ef jal x5,80007d00 + 80000c8c: 80000c7c .word 0x80000c7c + 80000c90: 00000000 .word 0x00000000 + 80000c94: 8000f08a .word 0x8000f08a + 80000c98: 00000000 .word 0x00000000 + 80000c9c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xb8e914bc42413820 + 80000ca0: 00063303 ld x6,0(x12) + 80000ca4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xf35c64ab6e2a2178 + 80000ca8: 00063e03 ld x28,0(x12) + 80000cac: 00860613 addi x12,x12,8 + +0000000080000cb0 : +Zbkx_xperm4_cg_cp_rs2_b28: + xperm4 x21, x6, x28 # perform operation + 80000cb0: 29c32ab3 xperm4 x21,x6,x28 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zbkx_xperm4_cg_cp_rs2_b28, Zbkx_xperm4_cg_cp_rs2_b28_str) + 80000cb4: 000fb203 ld x4,0(x31) + 80000cb8: 01520c63 beq x4,x21,80000cd0 + 80000cbc: 044072ef jal x5,80007d00 + 80000cc0: 80000cb0 .word 0x80000cb0 + 80000cc4: 00000000 .word 0x00000000 + 80000cc8: 8000f0bf .word 0x8000f0bf + 80000ccc: 00000000 .word 0x00000000 + 80000cd0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x4d657f4da2af08be + 80000cd4: 00063083 ld x1,0(x12) + 80000cd8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x28ae292b4f0a322e + 80000cdc: 00063e83 ld x29,0(x12) + 80000ce0: 00860613 addi x12,x12,8 + +0000000080000ce4 : +Zbkx_xperm4_cg_cp_rs2_b29: + xperm4 x16, x1, x29 # perform operation + 80000ce4: 29d0a833 xperm4 x16,x1,x29 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zbkx_xperm4_cg_cp_rs2_b29, Zbkx_xperm4_cg_cp_rs2_b29_str) + 80000ce8: 000fb203 ld x4,0(x31) + 80000cec: 01020c63 beq x4,x16,80000d04 + 80000cf0: 010072ef jal x5,80007d00 + 80000cf4: 80000ce4 .word 0x80000ce4 + 80000cf8: 00000000 .word 0x00000000 + 80000cfc: 8000f0f4 .word 0x8000f0f4 + 80000d00: 00000000 .word 0x00000000 + 80000d04: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x370495edc103ba57 + 80000d08: 00063b03 ld x22,0(x12) + 80000d0c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x599f3f88e41db10c + 80000d10: 00063f03 ld x30,0(x12) + 80000d14: 00860613 addi x12,x12,8 + +0000000080000d18 : +Zbkx_xperm4_cg_cp_rs2_b30: + xperm4 x8, x22, x30 # perform operation + 80000d18: 29eb2433 xperm4 x8,x22,x30 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zbkx_xperm4_cg_cp_rs2_b30, Zbkx_xperm4_cg_cp_rs2_b30_str) + 80000d1c: 000fb203 ld x4,0(x31) + 80000d20: 00820c63 beq x4,x8,80000d38 + 80000d24: 7dd062ef jal x5,80007d00 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 8000f129 .word 0x8000f129 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 008f8f93 addi x31,x31,8 + + mv x22, x31 # switch signature pointer register to avoid conflict with test + 80000d3c: 000f8b13 addi x22,x31,0 +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x24d9d8026ee0d417 + 80000d40: 00063703 ld x14,0(x12) + 80000d44: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x8105c1883f118d0a + 80000d48: 00063f83 ld x31,0(x12) + 80000d4c: 00860613 addi x12,x12,8 + +0000000080000d50 : +Zbkx_xperm4_cg_cp_rs2_b31: + xperm4 x20, x14, x31 # perform operation + 80000d50: 29f72a33 xperm4 x20,x14,x31 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkx_xperm4_cg_cp_rs2_b31, Zbkx_xperm4_cg_cp_rs2_b31_str) + 80000d54: 000b3203 ld x4,0(x22) + 80000d58: 01420c63 beq x4,x20,80000d70 + 80000d5c: 7a5062ef jal x5,80007d00 + 80000d60: 80000d50 .word 0x80000d50 + 80000d64: 00000000 .word 0x00000000 + 80000d68: 8000f15e .word 0x8000f15e + 80000d6c: 00000000 .word 0x00000000 + 80000d70: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x5e1bff13c17ec25b + 80000d74: 00063683 ld x13,0(x12) + 80000d78: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xefa813e9926932dc + 80000d7c: 00063f03 ld x30,0(x12) + 80000d80: 00860613 addi x12,x12,8 + +0000000080000d84 : +Zbkx_xperm4_cg_cp_rd_b0: + xperm4 x0, x13, x30 # perform operation + 80000d84: 29e6a033 xperm4 x0,x13,x30 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zbkx_xperm4_cg_cp_rd_b0, Zbkx_xperm4_cg_cp_rd_b0_str) + 80000d88: 000b3203 ld x4,0(x22) + 80000d8c: 00020c63 beq x4,x0,80000da4 + 80000d90: 771062ef jal x5,80007d00 + 80000d94: 80000d84 .word 0x80000d84 + 80000d98: 00000000 .word 0x00000000 + 80000d9c: 8000f193 .word 0x8000f193 + 80000da0: 00000000 .word 0x00000000 + 80000da4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xc2112cf14b94c808 + 80000da8: 00063683 ld x13,0(x12) + 80000dac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x8bfdbaacbe4e89db + 80000db0: 00063c83 ld x25,0(x12) + 80000db4: 00860613 addi x12,x12,8 + +0000000080000db8 : +Zbkx_xperm4_cg_cp_rd_b1: + xperm4 x1, x13, x25 # perform operation + 80000db8: 2996a0b3 xperm4 x1,x13,x25 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zbkx_xperm4_cg_cp_rd_b1, Zbkx_xperm4_cg_cp_rd_b1_str) + 80000dbc: 000b3203 ld x4,0(x22) + 80000dc0: 00120c63 beq x4,x1,80000dd8 + 80000dc4: 73d062ef jal x5,80007d00 + 80000dc8: 80000db8 .word 0x80000db8 + 80000dcc: 00000000 .word 0x00000000 + 80000dd0: 8000f1c6 .word 0x8000f1c6 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x028cbc3ddfdde025 + 80000ddc: 00063383 ld x7,0(x12) + 80000de0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x681123d235165310 + 80000de4: 00063983 ld x19,0(x12) + 80000de8: 00860613 addi x12,x12,8 + +0000000080000dec : +Zbkx_xperm4_cg_cp_rd_b2: + xperm4 x2, x7, x19 # perform operation + 80000dec: 2933a133 xperm4 x2,x7,x19 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zbkx_xperm4_cg_cp_rd_b2, Zbkx_xperm4_cg_cp_rd_b2_str) + 80000df0: 000b3203 ld x4,0(x22) + 80000df4: 00220c63 beq x4,x2,80000e0c + 80000df8: 709062ef jal x5,80007d00 + 80000dfc: 80000dec .word 0x80000dec + 80000e00: 00000000 .word 0x00000000 + 80000e04: 8000f1f9 .word 0x8000f1f9 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xa7cba3fabfbb2047 + 80000e10: 00063b83 ld x23,0(x12) + 80000e14: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x1b0eeece25429083 + 80000e18: 00063a83 ld x21,0(x12) + 80000e1c: 00860613 addi x12,x12,8 + +0000000080000e20 : +Zbkx_xperm4_cg_cp_rd_b3: + xperm4 x3, x23, x21 # perform operation + 80000e20: 295ba1b3 xperm4 x3,x23,x21 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zbkx_xperm4_cg_cp_rd_b3, Zbkx_xperm4_cg_cp_rd_b3_str) + 80000e24: 000b3203 ld x4,0(x22) + 80000e28: 00320c63 beq x4,x3,80000e40 + 80000e2c: 6d5062ef jal x5,80007d00 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 8000f22c .word 0x8000f22c + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 008b0b13 addi x22,x22,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000e44: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000e48: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x90c2433d41a11d6b + 80000e4c: 00063083 ld x1,0(x12) + 80000e50: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x1472a23bf358b430 + 80000e54: 00063c03 ld x24,0(x12) + 80000e58: 00860613 addi x12,x12,8 + +0000000080000e5c : +Zbkx_xperm4_cg_cp_rd_b4: + xperm4 x4, x1, x24 # perform operation + 80000e5c: 2980a233 xperm4 x4,x1,x24 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zbkx_xperm4_cg_cp_rd_b4, Zbkx_xperm4_cg_cp_rd_b4_str) + 80000e60: 000b3383 ld x7,0(x22) + 80000e64: 00438c63 beq x7,x4,80000e7c + 80000e68: 6b10646f jal x8,80007d18 + 80000e6c: 80000e5c .word 0x80000e5c + 80000e70: 00000000 .word 0x00000000 + 80000e74: 8000f25f .word 0x8000f25f + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5052ff8a2cbb779b + 80000e80: 00063883 ld x17,0(x12) + 80000e84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xca6ef22470c26d9c + 80000e88: 00063d03 ld x26,0(x12) + 80000e8c: 00860613 addi x12,x12,8 + +0000000080000e90 : +Zbkx_xperm4_cg_cp_rd_b5: + xperm4 x5, x17, x26 # perform operation + 80000e90: 29a8a2b3 xperm4 x5,x17,x26 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zbkx_xperm4_cg_cp_rd_b5, Zbkx_xperm4_cg_cp_rd_b5_str) + 80000e94: 000b3383 ld x7,0(x22) + 80000e98: 00538c63 beq x7,x5,80000eb0 + 80000e9c: 67d0646f jal x8,80007d18 + 80000ea0: 80000e90 .word 0x80000e90 + 80000ea4: 00000000 .word 0x00000000 + 80000ea8: 8000f292 .word 0x8000f292 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x910e60f7d916de66 + 80000eb4: 00063783 ld x15,0(x12) + 80000eb8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xb6bf7f23b0aa436f + 80000ebc: 00063183 ld x3,0(x12) + 80000ec0: 00860613 addi x12,x12,8 + +0000000080000ec4 : +Zbkx_xperm4_cg_cp_rd_b6: + xperm4 x6, x15, x3 # perform operation + 80000ec4: 2837a333 xperm4 x6,x15,x3 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zbkx_xperm4_cg_cp_rd_b6, Zbkx_xperm4_cg_cp_rd_b6_str) + 80000ec8: 000b3383 ld x7,0(x22) + 80000ecc: 00638c63 beq x7,x6,80000ee4 + 80000ed0: 6490646f jal x8,80007d18 + 80000ed4: 80000ec4 .word 0x80000ec4 + 80000ed8: 00000000 .word 0x00000000 + 80000edc: 8000f2c5 .word 0x8000f2c5 + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 008b0b13 addi x22,x22,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000ee8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000eec: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x07208c3bfc863c0e + 80000ef0: 00063103 ld x2,0(x12) + 80000ef4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x231220af929d72ce + 80000ef8: 00063003 ld x0,0(x12) + 80000efc: 00860613 addi x12,x12,8 + +0000000080000f00 : +Zbkx_xperm4_cg_cp_rd_b7: + xperm4 x7, x2, x0 # perform operation + 80000f00: 280123b3 xperm4 x7,x2,x0 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zbkx_xperm4_cg_cp_rd_b7, Zbkx_xperm4_cg_cp_rd_b7_str) + 80000f04: 000b3203 ld x4,0(x22) + 80000f08: 00720c63 beq x4,x7,80000f20 + 80000f0c: 5f5062ef jal x5,80007d00 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 8000f2f8 .word 0x8000f2f8 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x9be0bb31a292637c + 80000f24: 00063683 ld x13,0(x12) + 80000f28: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0xc6ab30e8d707f5da + 80000f2c: 00063e83 ld x29,0(x12) + 80000f30: 00860613 addi x12,x12,8 + +0000000080000f34 : +Zbkx_xperm4_cg_cp_rd_b8: + xperm4 x8, x13, x29 # perform operation + 80000f34: 29d6a433 xperm4 x8,x13,x29 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zbkx_xperm4_cg_cp_rd_b8, Zbkx_xperm4_cg_cp_rd_b8_str) + 80000f38: 000b3203 ld x4,0(x22) + 80000f3c: 00820c63 beq x4,x8,80000f54 + 80000f40: 5c1062ef jal x5,80007d00 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 8000f32b .word 0x8000f32b + 80000f50: 00000000 .word 0x00000000 + 80000f54: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x313264b5b06d95f1 + 80000f58: 00063983 ld x19,0(x12) + 80000f5c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xa8de3a7c63d96e16 + 80000f60: 00063e03 ld x28,0(x12) + 80000f64: 00860613 addi x12,x12,8 + +0000000080000f68 : +Zbkx_xperm4_cg_cp_rd_b9: + xperm4 x9, x19, x28 # perform operation + 80000f68: 29c9a4b3 xperm4 x9,x19,x28 + # Check if x9 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x9, Zbkx_xperm4_cg_cp_rd_b9, Zbkx_xperm4_cg_cp_rd_b9_str) + 80000f6c: 000b3203 ld x4,0(x22) + 80000f70: 00920c63 beq x4,x9,80000f88 + 80000f74: 58d062ef jal x5,80007d00 + 80000f78: 80000f68 .word 0x80000f68 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 8000f35e .word 0x8000f35e + 80000f84: 00000000 .word 0x00000000 + 80000f88: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x0b0fa230406c88e4 + 80000f8c: 00063683 ld x13,0(x12) + 80000f90: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x88adb06e06fcbdbc + 80000f94: 00063f83 ld x31,0(x12) + 80000f98: 00860613 addi x12,x12,8 + +0000000080000f9c : +Zbkx_xperm4_cg_cp_rd_b10: + xperm4 x10, x13, x31 # perform operation + 80000f9c: 29f6a533 xperm4 x10,x13,x31 + # Check if x10 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x10, Zbkx_xperm4_cg_cp_rd_b10, Zbkx_xperm4_cg_cp_rd_b10_str) + 80000fa0: 000b3203 ld x4,0(x22) + 80000fa4: 00a20c63 beq x4,x10,80000fbc + 80000fa8: 559062ef jal x5,80007d00 + 80000fac: 80000f9c .word 0x80000f9c + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 8000f391 .word 0x8000f391 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xc58818266beecfa9 + 80000fc0: 00063883 ld x17,0(x12) + 80000fc4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xfd07a7a9c15da661 + 80000fc8: 00063b83 ld x23,0(x12) + 80000fcc: 00860613 addi x12,x12,8 + +0000000080000fd0 : +Zbkx_xperm4_cg_cp_rd_b11: + xperm4 x11, x17, x23 # perform operation + 80000fd0: 2978a5b3 xperm4 x11,x17,x23 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zbkx_xperm4_cg_cp_rd_b11, Zbkx_xperm4_cg_cp_rd_b11_str) + 80000fd4: 000b3203 ld x4,0(x22) + 80000fd8: 00b20c63 beq x4,x11,80000ff0 + 80000fdc: 525062ef jal x5,80007d00 + 80000fe0: 80000fd0 .word 0x80000fd0 + 80000fe4: 00000000 .word 0x00000000 + 80000fe8: 8000f3c5 .word 0x8000f3c5 + 80000fec: 00000000 .word 0x00000000 + 80000ff0: 008b0b13 addi x22,x22,8 + + mv x6, x12 # switch data pointer register to avoid conflict with test + 80000ff4: 00060313 addi x6,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x3441590d98c2b747 + 80000ff8: 00033183 ld x3,0(x6) + 80000ffc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xd66901ae85e6aa28 + 80001000: 00033483 ld x9,0(x6) + 80001004: 00830313 addi x6,x6,8 + +0000000080001008 : +Zbkx_xperm4_cg_cp_rd_b12: + xperm4 x12, x3, x9 # perform operation + 80001008: 2891a633 xperm4 x12,x3,x9 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zbkx_xperm4_cg_cp_rd_b12, Zbkx_xperm4_cg_cp_rd_b12_str) + 8000100c: 000b3203 ld x4,0(x22) + 80001010: 00c20c63 beq x4,x12,80001028 + 80001014: 4ed062ef jal x5,80007d00 + 80001018: 80001008 .word 0x80001008 + 8000101c: 00000000 .word 0x00000000 + 80001020: 8000f3f9 .word 0x8000f3f9 + 80001024: 00000000 .word 0x00000000 + 80001028: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x64313da7a69fb090 + 8000102c: 00033083 ld x1,0(x6) + 80001030: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x2388cdd2dae93b0b + 80001034: 00033c03 ld x24,0(x6) + 80001038: 00830313 addi x6,x6,8 + +000000008000103c : +Zbkx_xperm4_cg_cp_rd_b13: + xperm4 x13, x1, x24 # perform operation + 8000103c: 2980a6b3 xperm4 x13,x1,x24 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zbkx_xperm4_cg_cp_rd_b13, Zbkx_xperm4_cg_cp_rd_b13_str) + 80001040: 000b3203 ld x4,0(x22) + 80001044: 00d20c63 beq x4,x13,8000105c + 80001048: 4b9062ef jal x5,80007d00 + 8000104c: 8000103c .word 0x8000103c + 80001050: 00000000 .word 0x00000000 + 80001054: 8000f42d .word 0x8000f42d + 80001058: 00000000 .word 0x00000000 + 8000105c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xca73caeda6737120 + 80001060: 00033b83 ld x23,0(x6) + 80001064: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x51e94824d76f0bd5 + 80001068: 00033603 ld x12,0(x6) + 8000106c: 00830313 addi x6,x6,8 + +0000000080001070 : +Zbkx_xperm4_cg_cp_rd_b14: + xperm4 x14, x23, x12 # perform operation + 80001070: 28cba733 xperm4 x14,x23,x12 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zbkx_xperm4_cg_cp_rd_b14, Zbkx_xperm4_cg_cp_rd_b14_str) + 80001074: 000b3203 ld x4,0(x22) + 80001078: 00e20c63 beq x4,x14,80001090 + 8000107c: 485062ef jal x5,80007d00 + 80001080: 80001070 .word 0x80001070 + 80001084: 00000000 .word 0x00000000 + 80001088: 8000f461 .word 0x8000f461 + 8000108c: 00000000 .word 0x00000000 + 80001090: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x083882b00889f92a + 80001094: 00033883 ld x17,0(x6) + 80001098: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x15ed857b9f839b0b + 8000109c: 00033c83 ld x25,0(x6) + 800010a0: 00830313 addi x6,x6,8 + +00000000800010a4 : +Zbkx_xperm4_cg_cp_rd_b15: + xperm4 x15, x17, x25 # perform operation + 800010a4: 2998a7b3 xperm4 x15,x17,x25 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zbkx_xperm4_cg_cp_rd_b15, Zbkx_xperm4_cg_cp_rd_b15_str) + 800010a8: 000b3203 ld x4,0(x22) + 800010ac: 00f20c63 beq x4,x15,800010c4 + 800010b0: 451062ef jal x5,80007d00 + 800010b4: 800010a4 .word 0x800010a4 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 8000f495 .word 0x8000f495 + 800010c0: 00000000 .word 0x00000000 + 800010c4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xe02294240e753de2 + 800010c8: 00033903 ld x18,0(x6) + 800010cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xceea83d9181e8e22 + 800010d0: 00033883 ld x17,0(x6) + 800010d4: 00830313 addi x6,x6,8 + +00000000800010d8 : +Zbkx_xperm4_cg_cp_rd_b16: + xperm4 x16, x18, x17 # perform operation + 800010d8: 29192833 xperm4 x16,x18,x17 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zbkx_xperm4_cg_cp_rd_b16, Zbkx_xperm4_cg_cp_rd_b16_str) + 800010dc: 000b3203 ld x4,0(x22) + 800010e0: 01020c63 beq x4,x16,800010f8 + 800010e4: 41d062ef jal x5,80007d00 + 800010e8: 800010d8 .word 0x800010d8 + 800010ec: 00000000 .word 0x00000000 + 800010f0: 8000f4c9 .word 0x8000f4c9 + 800010f4: 00000000 .word 0x00000000 + 800010f8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x584d36df96890ac5 + 800010fc: 00033b83 ld x23,0(x6) + 80001100: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x116c9cf3a9a992fe + 80001104: 00033783 ld x15,0(x6) + 80001108: 00830313 addi x6,x6,8 + +000000008000110c : +Zbkx_xperm4_cg_cp_rd_b17: + xperm4 x17, x23, x15 # perform operation + 8000110c: 28fba8b3 xperm4 x17,x23,x15 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zbkx_xperm4_cg_cp_rd_b17, Zbkx_xperm4_cg_cp_rd_b17_str) + 80001110: 000b3203 ld x4,0(x22) + 80001114: 01120c63 beq x4,x17,8000112c + 80001118: 3e9062ef jal x5,80007d00 + 8000111c: 8000110c .word 0x8000110c + 80001120: 00000000 .word 0x00000000 + 80001124: 8000f4fd .word 0x8000f4fd + 80001128: 00000000 .word 0x00000000 + 8000112c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x4c082c6e5b971e0d + 80001130: 00033183 ld x3,0(x6) + 80001134: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xc047c7febacf2ee1 + 80001138: 00033f83 ld x31,0(x6) + 8000113c: 00830313 addi x6,x6,8 + +0000000080001140 : +Zbkx_xperm4_cg_cp_rd_b18: + xperm4 x18, x3, x31 # perform operation + 80001140: 29f1a933 xperm4 x18,x3,x31 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zbkx_xperm4_cg_cp_rd_b18, Zbkx_xperm4_cg_cp_rd_b18_str) + 80001144: 000b3203 ld x4,0(x22) + 80001148: 01220c63 beq x4,x18,80001160 + 8000114c: 3b5062ef jal x5,80007d00 + 80001150: 80001140 .word 0x80001140 + 80001154: 00000000 .word 0x00000000 + 80001158: 8000f531 .word 0x8000f531 + 8000115c: 00000000 .word 0x00000000 + 80001160: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x4128d63a14ab551b + 80001164: 00033083 ld x1,0(x6) + 80001168: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x6dbe2b58d8ffe589 + 8000116c: 00033d03 ld x26,0(x6) + 80001170: 00830313 addi x6,x6,8 + +0000000080001174 : +Zbkx_xperm4_cg_cp_rd_b19: + xperm4 x19, x1, x26 # perform operation + 80001174: 29a0a9b3 xperm4 x19,x1,x26 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zbkx_xperm4_cg_cp_rd_b19, Zbkx_xperm4_cg_cp_rd_b19_str) + 80001178: 000b3203 ld x4,0(x22) + 8000117c: 01320c63 beq x4,x19,80001194 + 80001180: 381062ef jal x5,80007d00 + 80001184: 80001174 .word 0x80001174 + 80001188: 00000000 .word 0x00000000 + 8000118c: 8000f565 .word 0x8000f565 + 80001190: 00000000 .word 0x00000000 + 80001194: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x602fd6bcdcb54901 + 80001198: 00033703 ld x14,0(x6) + 8000119c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x679a381a30fec572 + 800011a0: 00033883 ld x17,0(x6) + 800011a4: 00830313 addi x6,x6,8 + +00000000800011a8 : +Zbkx_xperm4_cg_cp_rd_b20: + xperm4 x20, x14, x17 # perform operation + 800011a8: 29172a33 xperm4 x20,x14,x17 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zbkx_xperm4_cg_cp_rd_b20, Zbkx_xperm4_cg_cp_rd_b20_str) + 800011ac: 000b3203 ld x4,0(x22) + 800011b0: 01420c63 beq x4,x20,800011c8 + 800011b4: 34d062ef jal x5,80007d00 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 8000f599 .word 0x8000f599 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0e601fa595c822c0 + 800011cc: 00033783 ld x15,0(x6) + 800011d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x99d7ee393a0e3a8c + 800011d4: 00033903 ld x18,0(x6) + 800011d8: 00830313 addi x6,x6,8 + +00000000800011dc : +Zbkx_xperm4_cg_cp_rd_b21: + xperm4 x21, x15, x18 # perform operation + 800011dc: 2927aab3 xperm4 x21,x15,x18 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zbkx_xperm4_cg_cp_rd_b21, Zbkx_xperm4_cg_cp_rd_b21_str) + 800011e0: 000b3203 ld x4,0(x22) + 800011e4: 01520c63 beq x4,x21,800011fc + 800011e8: 319062ef jal x5,80007d00 + 800011ec: 800011dc .word 0x800011dc + 800011f0: 00000000 .word 0x00000000 + 800011f4: 8000f5cd .word 0x8000f5cd + 800011f8: 00000000 .word 0x00000000 + 800011fc: 008b0b13 addi x22,x22,8 + + mv x17, x22 # switch signature pointer register to avoid conflict with test + 80001200: 000b0893 addi x17,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xc7de1a6845005d86 + 80001204: 00033403 ld x8,0(x6) + 80001208: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x187e41d39af1a129 + 8000120c: 00033e83 ld x29,0(x6) + 80001210: 00830313 addi x6,x6,8 + +0000000080001214 : +Zbkx_xperm4_cg_cp_rd_b22: + xperm4 x22, x8, x29 # perform operation + 80001214: 29d42b33 xperm4 x22,x8,x29 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cp_rd_b22, Zbkx_xperm4_cg_cp_rd_b22_str) + 80001218: 0008b203 ld x4,0(x17) + 8000121c: 01620c63 beq x4,x22,80001234 + 80001220: 2e1062ef jal x5,80007d00 + 80001224: 80001214 .word 0x80001214 + 80001228: 00000000 .word 0x00000000 + 8000122c: 8000f601 .word 0x8000f601 + 80001230: 00000000 .word 0x00000000 + 80001234: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x7f5cfb3f3af7a976 + 80001238: 00033703 ld x14,0(x6) + 8000123c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x085cfdbca243ea5b + 80001240: 00033c83 ld x25,0(x6) + 80001244: 00830313 addi x6,x6,8 + +0000000080001248 : +Zbkx_xperm4_cg_cp_rd_b23: + xperm4 x23, x14, x25 # perform operation + 80001248: 29972bb3 xperm4 x23,x14,x25 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cp_rd_b23, Zbkx_xperm4_cg_cp_rd_b23_str) + 8000124c: 0008b203 ld x4,0(x17) + 80001250: 01720c63 beq x4,x23,80001268 + 80001254: 2ad062ef jal x5,80007d00 + 80001258: 80001248 .word 0x80001248 + 8000125c: 00000000 .word 0x00000000 + 80001260: 8000f635 .word 0x8000f635 + 80001264: 00000000 .word 0x00000000 + 80001268: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xd86861817d29c30f + 8000126c: 00033f83 ld x31,0(x6) + 80001270: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x1042b3327f5e974c + 80001274: 00033803 ld x16,0(x6) + 80001278: 00830313 addi x6,x6,8 + +000000008000127c : +Zbkx_xperm4_cg_cp_rd_b24: + xperm4 x24, x31, x16 # perform operation + 8000127c: 290fac33 xperm4 x24,x31,x16 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cp_rd_b24, Zbkx_xperm4_cg_cp_rd_b24_str) + 80001280: 0008b203 ld x4,0(x17) + 80001284: 01820c63 beq x4,x24,8000129c + 80001288: 279062ef jal x5,80007d00 + 8000128c: 8000127c .word 0x8000127c + 80001290: 00000000 .word 0x00000000 + 80001294: 8000f669 .word 0x8000f669 + 80001298: 00000000 .word 0x00000000 + 8000129c: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xfba5cc4cfb25f3fc + 800012a0: 00033703 ld x14,0(x6) + 800012a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xf8af65a2b21b02c3 + 800012a8: 00033803 ld x16,0(x6) + 800012ac: 00830313 addi x6,x6,8 + +00000000800012b0 : +Zbkx_xperm4_cg_cp_rd_b25: + xperm4 x25, x14, x16 # perform operation + 800012b0: 29072cb3 xperm4 x25,x14,x16 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cp_rd_b25, Zbkx_xperm4_cg_cp_rd_b25_str) + 800012b4: 0008b203 ld x4,0(x17) + 800012b8: 01920c63 beq x4,x25,800012d0 + 800012bc: 245062ef jal x5,80007d00 + 800012c0: 800012b0 .word 0x800012b0 + 800012c4: 00000000 .word 0x00000000 + 800012c8: 8000f69d .word 0x8000f69d + 800012cc: 00000000 .word 0x00000000 + 800012d0: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xc225dd0d260c2355 + 800012d4: 00033e03 ld x28,0(x6) + 800012d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x40f67e620293062c + 800012dc: 00033703 ld x14,0(x6) + 800012e0: 00830313 addi x6,x6,8 + +00000000800012e4 : +Zbkx_xperm4_cg_cp_rd_b26: + xperm4 x26, x28, x14 # perform operation + 800012e4: 28ee2d33 xperm4 x26,x28,x14 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cp_rd_b26, Zbkx_xperm4_cg_cp_rd_b26_str) + 800012e8: 0008b203 ld x4,0(x17) + 800012ec: 01a20c63 beq x4,x26,80001304 + 800012f0: 211062ef jal x5,80007d00 + 800012f4: 800012e4 .word 0x800012e4 + 800012f8: 00000000 .word 0x00000000 + 800012fc: 8000f6d1 .word 0x8000f6d1 + 80001300: 00000000 .word 0x00000000 + 80001304: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x580bfd3f03b8ccfb + 80001308: 00033083 ld x1,0(x6) + 8000130c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7ab56ee035e9d961 + 80001310: 00033e83 ld x29,0(x6) + 80001314: 00830313 addi x6,x6,8 + +0000000080001318 : +Zbkx_xperm4_cg_cp_rd_b27: + xperm4 x27, x1, x29 # perform operation + 80001318: 29d0adb3 xperm4 x27,x1,x29 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cp_rd_b27, Zbkx_xperm4_cg_cp_rd_b27_str) + 8000131c: 0008b203 ld x4,0(x17) + 80001320: 01b20c63 beq x4,x27,80001338 + 80001324: 1dd062ef jal x5,80007d00 + 80001328: 80001318 .word 0x80001318 + 8000132c: 00000000 .word 0x00000000 + 80001330: 8000f705 .word 0x8000f705 + 80001334: 00000000 .word 0x00000000 + 80001338: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x12d983ada65ee8c4 + 8000133c: 00033083 ld x1,0(x6) + 80001340: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x22c832c8d0a3dc80 + 80001344: 00033703 ld x14,0(x6) + 80001348: 00830313 addi x6,x6,8 + +000000008000134c : +Zbkx_xperm4_cg_cp_rd_b28: + xperm4 x28, x1, x14 # perform operation + 8000134c: 28e0ae33 xperm4 x28,x1,x14 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cp_rd_b28, Zbkx_xperm4_cg_cp_rd_b28_str) + 80001350: 0008b203 ld x4,0(x17) + 80001354: 01c20c63 beq x4,x28,8000136c + 80001358: 1a9062ef jal x5,80007d00 + 8000135c: 8000134c .word 0x8000134c + 80001360: 00000000 .word 0x00000000 + 80001364: 8000f739 .word 0x8000f739 + 80001368: 00000000 .word 0x00000000 + 8000136c: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x4b9ded72ba687900 + 80001370: 00033103 ld x2,0(x6) + 80001374: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xe777bbc3a99b161a + 80001378: 00033d03 ld x26,0(x6) + 8000137c: 00830313 addi x6,x6,8 + +0000000080001380 : +Zbkx_xperm4_cg_cp_rd_b29: + xperm4 x29, x2, x26 # perform operation + 80001380: 29a12eb3 xperm4 x29,x2,x26 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cp_rd_b29, Zbkx_xperm4_cg_cp_rd_b29_str) + 80001384: 0008b203 ld x4,0(x17) + 80001388: 01d20c63 beq x4,x29,800013a0 + 8000138c: 175062ef jal x5,80007d00 + 80001390: 80001380 .word 0x80001380 + 80001394: 00000000 .word 0x00000000 + 80001398: 8000f76d .word 0x8000f76d + 8000139c: 00000000 .word 0x00000000 + 800013a0: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xb1425463bba8ad56 + 800013a4: 00033f83 ld x31,0(x6) + 800013a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xdf8f094240a85d31 + 800013ac: 00033783 ld x15,0(x6) + 800013b0: 00830313 addi x6,x6,8 + +00000000800013b4 : +Zbkx_xperm4_cg_cp_rd_b30: + xperm4 x30, x31, x15 # perform operation + 800013b4: 28ffaf33 xperm4 x30,x31,x15 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cp_rd_b30, Zbkx_xperm4_cg_cp_rd_b30_str) + 800013b8: 0008b203 ld x4,0(x17) + 800013bc: 01e20c63 beq x4,x30,800013d4 + 800013c0: 141062ef jal x5,80007d00 + 800013c4: 800013b4 .word 0x800013b4 + 800013c8: 00000000 .word 0x00000000 + 800013cc: 8000f7a1 .word 0x8000f7a1 + 800013d0: 00000000 .word 0x00000000 + 800013d4: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x3120ffe4927d48d0 + 800013d8: 00033f03 ld x30,0(x6) + 800013dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xfa1477753dc6fd1a + 800013e0: 00033b83 ld x23,0(x6) + 800013e4: 00830313 addi x6,x6,8 + +00000000800013e8 : +Zbkx_xperm4_cg_cp_rd_b31: + xperm4 x31, x30, x23 # perform operation + 800013e8: 297f2fb3 xperm4 x31,x30,x23 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cp_rd_b31, Zbkx_xperm4_cg_cp_rd_b31_str) + 800013ec: 0008b203 ld x4,0(x17) + 800013f0: 01f20c63 beq x4,x31,80001408 + 800013f4: 10d062ef jal x5,80007d00 + 800013f8: 800013e8 .word 0x800013e8 + 800013fc: 00000000 .word 0x00000000 + 80001400: 8000f7d5 .word 0x8000f7d5 + 80001404: 00000000 .word 0x00000000 + 80001408: 00888893 addi x17,x17,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000000 + 8000140c: 00033983 ld x19,0(x6) + 80001410: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xb7225a38bad8e6b1 + 80001414: 00033d03 ld x26,0(x6) + 80001418: 00830313 addi x6,x6,8 + +000000008000141c : +Zbkx_xperm4_cg_cp_rs1_edges_0x0: + xperm4 x24, x19, x26 # perform operation + 8000141c: 29a9ac33 xperm4 x24,x19,x26 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cp_rs1_edges_0x0, Zbkx_xperm4_cg_cp_rs1_edges_0x0_str) + 80001420: 0008b203 ld x4,0(x17) + 80001424: 01820c63 beq x4,x24,8000143c + 80001428: 0d9062ef jal x5,80007d00 + 8000142c: 8000141c .word 0x8000141c + 80001430: 00000000 .word 0x00000000 + 80001434: 8000f809 .word 0x8000f809 + 80001438: 00000000 .word 0x00000000 + 8000143c: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0000000000000001 + 80001440: 00033383 ld x7,0(x6) + 80001444: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xbe7661e9de62337e + 80001448: 00033f03 ld x30,0(x6) + 8000144c: 00830313 addi x6,x6,8 + +0000000080001450 : +Zbkx_xperm4_cg_cp_rs1_edges_0x1: + xperm4 x28, x7, x30 # perform operation + 80001450: 29e3ae33 xperm4 x28,x7,x30 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_edges_0x1, Zbkx_xperm4_cg_cp_rs1_edges_0x1_str) + 80001454: 0008b203 ld x4,0(x17) + 80001458: 01c20c63 beq x4,x28,80001470 + 8000145c: 0a5062ef jal x5,80007d00 + 80001460: 80001450 .word 0x80001450 + 80001464: 00000000 .word 0x00000000 + 80001468: 8000f844 .word 0x8000f844 + 8000146c: 00000000 .word 0x00000000 + 80001470: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0000000000000002 + 80001474: 00033503 ld x10,0(x6) + 80001478: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xbdc08306c35f4e82 + 8000147c: 00033a83 ld x21,0(x6) + 80001480: 00830313 addi x6,x6,8 + +0000000080001484 : +Zbkx_xperm4_cg_cp_rs1_edges_0x2: + xperm4 x13, x10, x21 # perform operation + 80001484: 295526b3 xperm4 x13,x10,x21 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cp_rs1_edges_0x2, Zbkx_xperm4_cg_cp_rs1_edges_0x2_str) + 80001488: 0008b203 ld x4,0(x17) + 8000148c: 00d20c63 beq x4,x13,800014a4 + 80001490: 071062ef jal x5,80007d00 + 80001494: 80001484 .word 0x80001484 + 80001498: 00000000 .word 0x00000000 + 8000149c: 8000f87f .word 0x8000f87f + 800014a0: 00000000 .word 0x00000000 + 800014a4: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000000 + 800014a8: 00033803 ld x16,0(x6) + 800014ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x8c07a138d32d7d8f + 800014b0: 00033c83 ld x25,0(x6) + 800014b4: 00830313 addi x6,x6,8 + +00000000800014b8 : +Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000000: + xperm4 x21, x16, x25 # perform operation + 800014b8: 29982ab3 xperm4 x21,x16,x25 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000000, Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000000_str) + 800014bc: 0008b203 ld x4,0(x17) + 800014c0: 01520c63 beq x4,x21,800014d8 + 800014c4: 03d062ef jal x5,80007d00 + 800014c8: 800014b8 .word 0x800014b8 + 800014cc: 00000000 .word 0x00000000 + 800014d0: 8000f8ba .word 0x8000f8ba + 800014d4: 00000000 .word 0x00000000 + 800014d8: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x8000000000000001 + 800014dc: 00033c83 ld x25,0(x6) + 800014e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xf13f049b7c0f0047 + 800014e4: 00033c03 ld x24,0(x6) + 800014e8: 00830313 addi x6,x6,8 + +00000000800014ec : +Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000001: + xperm4 x10, x25, x24 # perform operation + 800014ec: 298ca533 xperm4 x10,x25,x24 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000001, Zbkx_xperm4_cg_cp_rs1_edges_0x8000000000000001_str) + 800014f0: 0008b203 ld x4,0(x17) + 800014f4: 00a20c63 beq x4,x10,8000150c + 800014f8: 009062ef jal x5,80007d00 + 800014fc: 800014ec .word 0x800014ec + 80001500: 00000000 .word 0x00000000 + 80001504: 8000f905 .word 0x8000f905 + 80001508: 00000000 .word 0x00000000 + 8000150c: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x7fffffffffffffff + 80001510: 00033383 ld x7,0(x6) + 80001514: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x97fd4539bb156031 + 80001518: 00033d83 ld x27,0(x6) + 8000151c: 00830313 addi x6,x6,8 + +0000000080001520 : +Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffffffffffff: + xperm4 x23, x7, x27 # perform operation + 80001520: 29b3abb3 xperm4 x23,x7,x27 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkx_xperm4_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001524: 0008b203 ld x4,0(x17) + 80001528: 01720c63 beq x4,x23,80001540 + 8000152c: 7d4062ef jal x5,80007d00 + 80001530: 80001520 .word 0x80001520 + 80001534: 00000000 .word 0x00000000 + 80001538: 8000f950 .word 0x8000f950 + 8000153c: 00000000 .word 0x00000000 + 80001540: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80001544: 00033a83 ld x21,0(x6) + 80001548: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x70f95c8c66a53478 + 8000154c: 00033c83 ld x25,0(x6) + 80001550: 00830313 addi x6,x6,8 + +0000000080001554 : +Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffffffffffe: + xperm4 x22, x21, x25 # perform operation + 80001554: 299aab33 xperm4 x22,x21,x25 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkx_xperm4_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001558: 0008b203 ld x4,0(x17) + 8000155c: 01620c63 beq x4,x22,80001574 + 80001560: 7a0062ef jal x5,80007d00 + 80001564: 80001554 .word 0x80001554 + 80001568: 00000000 .word 0x00000000 + 8000156c: 8000f99b .word 0x8000f99b + 80001570: 00000000 .word 0x00000000 + 80001574: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xffffffffffffffff + 80001578: 00033f03 ld x30,0(x6) + 8000157c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xf1dccc75b8aa6011 + 80001580: 00033803 ld x16,0(x6) + 80001584: 00830313 addi x6,x6,8 + +0000000080001588 : +Zbkx_xperm4_cg_cp_rs1_edges_0xffffffffffffffff: + xperm4 x27, x30, x16 # perform operation + 80001588: 290f2db3 xperm4 x27,x30,x16 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffffffffffff, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffffffffffff_str) + 8000158c: 0008b203 ld x4,0(x17) + 80001590: 01b20c63 beq x4,x27,800015a8 + 80001594: 76c062ef jal x5,80007d00 + 80001598: 80001588 .word 0x80001588 + 8000159c: 00000000 .word 0x00000000 + 800015a0: 8000f9e6 .word 0x8000f9e6 + 800015a4: 00000000 .word 0x00000000 + 800015a8: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xfffffffffffffffe + 800015ac: 00033983 ld x19,0(x6) + 800015b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x6ad5e3ad06b5e73f + 800015b4: 00033583 ld x11,0(x6) + 800015b8: 00830313 addi x6,x6,8 + +00000000800015bc : +Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffffffffffe: + xperm4 x22, x19, x11 # perform operation + 800015bc: 28b9ab33 xperm4 x22,x19,x11 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015c0: 0008b203 ld x4,0(x17) + 800015c4: 01620c63 beq x4,x22,800015dc + 800015c8: 738062ef jal x5,80007d00 + 800015cc: 800015bc .word 0x800015bc + 800015d0: 00000000 .word 0x00000000 + 800015d4: 8000fa31 .word 0x8000fa31 + 800015d8: 00000000 .word 0x00000000 + 800015dc: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 800015e0: 00033503 ld x10,0(x6) + 800015e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x2c50a6328addf0e2 + 800015e8: 00033803 ld x16,0(x6) + 800015ec: 00830313 addi x6,x6,8 + +00000000800015f0 : +Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc887763ae86f2: + xperm4 x20, x10, x16 # perform operation + 800015f0: 29052a33 xperm4 x20,x10,x16 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 800015f4: 0008b203 ld x4,0(x17) + 800015f8: 01420c63 beq x4,x20,80001610 + 800015fc: 704062ef jal x5,80007d00 + 80001600: 800015f0 .word 0x800015f0 + 80001604: 00000000 .word 0x00000000 + 80001608: 8000fa7c .word 0x8000fa7c + 8000160c: 00000000 .word 0x00000000 + 80001610: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80001614: 00033903 ld x18,0(x6) + 80001618: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xe65ff1ff30774d40 + 8000161c: 00033503 ld x10,0(x6) + 80001620: 00830313 addi x6,x6,8 + +0000000080001624 : +Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + xperm4 x21, x18, x10 # perform operation + 80001624: 28a92ab3 xperm4 x21,x18,x10 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001628: 0008b203 ld x4,0(x17) + 8000162c: 01520c63 beq x4,x21,80001644 + 80001630: 6d0062ef jal x5,80007d00 + 80001634: 80001624 .word 0x80001624 + 80001638: 00000000 .word 0x00000000 + 8000163c: 8000fac7 .word 0x8000fac7 + 80001640: 00000000 .word 0x00000000 + 80001644: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x5555555555555555 + 80001648: 00033703 ld x14,0(x6) + 8000164c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xbc5c027285a55c28 + 80001650: 00033c03 ld x24,0(x6) + 80001654: 00830313 addi x6,x6,8 + +0000000080001658 : +Zbkx_xperm4_cg_cp_rs1_edges_0x5555555555555555: + xperm4 x28, x14, x24 # perform operation + 80001658: 29872e33 xperm4 x28,x14,x24 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cp_rs1_edges_0x5555555555555555, Zbkx_xperm4_cg_cp_rs1_edges_0x5555555555555555_str) + 8000165c: 0008b203 ld x4,0(x17) + 80001660: 01c20c63 beq x4,x28,80001678 + 80001664: 69c062ef jal x5,80007d00 + 80001668: 80001658 .word 0x80001658 + 8000166c: 00000000 .word 0x00000000 + 80001670: 8000fb12 .word 0x8000fb12 + 80001674: 00000000 .word 0x00000000 + 80001678: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000000ffffffff + 8000167c: 00033103 ld x2,0(x6) + 80001680: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x82e0484b01dfabdf + 80001684: 00033183 ld x3,0(x6) + 80001688: 00830313 addi x6,x6,8 + +000000008000168c : +Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff: + xperm4 x15, x2, x3 # perform operation + 8000168c: 283127b3 xperm4 x15,x2,x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff, Zbkx_xperm4_cg_cp_rs1_edges_0xffffffff_str) + 80001690: 0008b203 ld x4,0(x17) + 80001694: 00f20c63 beq x4,x15,800016ac + 80001698: 668062ef jal x5,80007d00 + 8000169c: 8000168c .word 0x8000168c + 800016a0: 00000000 .word 0x00000000 + 800016a4: 8000fb5d .word 0x8000fb5d + 800016a8: 00000000 .word 0x00000000 + 800016ac: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x00000000fffffffe + 800016b0: 00033803 ld x16,0(x6) + 800016b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xc278e8c57f67b9a1 + 800016b8: 00033a83 ld x21,0(x6) + 800016bc: 00830313 addi x6,x6,8 + +00000000800016c0 : +Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe: + xperm4 x18, x16, x21 # perform operation + 800016c0: 29582933 xperm4 x18,x16,x21 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe, Zbkx_xperm4_cg_cp_rs1_edges_0xfffffffe_str) + 800016c4: 0008b203 ld x4,0(x17) + 800016c8: 01220c63 beq x4,x18,800016e0 + 800016cc: 634062ef jal x5,80007d00 + 800016d0: 800016c0 .word 0x800016c0 + 800016d4: 00000000 .word 0x00000000 + 800016d8: 8000fba0 .word 0x8000fba0 + 800016dc: 00000000 .word 0x00000000 + 800016e0: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000100000000 + 800016e4: 00033f03 ld x30,0(x6) + 800016e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x3ca2f4b11f942d40 + 800016ec: 00033783 ld x15,0(x6) + 800016f0: 00830313 addi x6,x6,8 + +00000000800016f4 : +Zbkx_xperm4_cg_cp_rs1_edges_0x100000000: + xperm4 x25, x30, x15 # perform operation + 800016f4: 28ff2cb3 xperm4 x25,x30,x15 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cp_rs1_edges_0x100000000, Zbkx_xperm4_cg_cp_rs1_edges_0x100000000_str) + 800016f8: 0008b203 ld x4,0(x17) + 800016fc: 01920c63 beq x4,x25,80001714 + 80001700: 600062ef jal x5,80007d00 + 80001704: 800016f4 .word 0x800016f4 + 80001708: 00000000 .word 0x00000000 + 8000170c: 8000fbe3 .word 0x8000fbe3 + 80001710: 00000000 .word 0x00000000 + 80001714: 00888893 addi x17,x17,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000001 + 80001718: 00033f83 ld x31,0(x6) + 8000171c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x2f4412291654072c + 80001720: 00033783 ld x15,0(x6) + 80001724: 00830313 addi x6,x6,8 + +0000000080001728 : +Zbkx_xperm4_cg_cp_rs1_edges_0x100000001: + xperm4 x24, x31, x15 # perform operation + 80001728: 28ffac33 xperm4 x24,x31,x15 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cp_rs1_edges_0x100000001, Zbkx_xperm4_cg_cp_rs1_edges_0x100000001_str) + 8000172c: 0008b203 ld x4,0(x17) + 80001730: 01820c63 beq x4,x24,80001748 + 80001734: 5cc062ef jal x5,80007d00 + 80001738: 80001728 .word 0x80001728 + 8000173c: 00000000 .word 0x00000000 + 80001740: 8000fc27 .word 0x8000fc27 + 80001744: 00000000 .word 0x00000000 + 80001748: 00888893 addi x17,x17,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xce06d9e897e01684 + 8000174c: 00033a03 ld x20,0(x6) + 80001750: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000000000000 + 80001754: 00033783 ld x15,0(x6) + 80001758: 00830313 addi x6,x6,8 + +000000008000175c : +Zbkx_xperm4_cg_cp_rs2_edges_0x0: + xperm4 x19, x20, x15 # perform operation + 8000175c: 28fa29b3 xperm4 x19,x20,x15 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cp_rs2_edges_0x0, Zbkx_xperm4_cg_cp_rs2_edges_0x0_str) + 80001760: 0008b203 ld x4,0(x17) + 80001764: 01320c63 beq x4,x19,8000177c + 80001768: 598062ef jal x5,80007d00 + 8000176c: 8000175c .word 0x8000175c + 80001770: 00000000 .word 0x00000000 + 80001774: 8000fc6b .word 0x8000fc6b + 80001778: 00000000 .word 0x00000000 + 8000177c: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x98b31b0e2290fd50 + 80001780: 00033b03 ld x22,0(x6) + 80001784: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000000000001 + 80001788: 00033903 ld x18,0(x6) + 8000178c: 00830313 addi x6,x6,8 + +0000000080001790 : +Zbkx_xperm4_cg_cp_rs2_edges_0x1: + xperm4 x16, x22, x18 # perform operation + 80001790: 292b2833 xperm4 x16,x22,x18 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cp_rs2_edges_0x1, Zbkx_xperm4_cg_cp_rs2_edges_0x1_str) + 80001794: 0008b203 ld x4,0(x17) + 80001798: 01020c63 beq x4,x16,800017b0 + 8000179c: 564062ef jal x5,80007d00 + 800017a0: 80001790 .word 0x80001790 + 800017a4: 00000000 .word 0x00000000 + 800017a8: 8000fca7 .word 0x8000fca7 + 800017ac: 00000000 .word 0x00000000 + 800017b0: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xe99a471266c79d78 + 800017b4: 00033c03 ld x24,0(x6) + 800017b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0000000000000002 + 800017bc: 00033d83 ld x27,0(x6) + 800017c0: 00830313 addi x6,x6,8 + +00000000800017c4 : +Zbkx_xperm4_cg_cp_rs2_edges_0x2: + xperm4 x22, x24, x27 # perform operation + 800017c4: 29bc2b33 xperm4 x22,x24,x27 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cp_rs2_edges_0x2, Zbkx_xperm4_cg_cp_rs2_edges_0x2_str) + 800017c8: 0008b203 ld x4,0(x17) + 800017cc: 01620c63 beq x4,x22,800017e4 + 800017d0: 530062ef jal x5,80007d00 + 800017d4: 800017c4 .word 0x800017c4 + 800017d8: 00000000 .word 0x00000000 + 800017dc: 8000fce3 .word 0x8000fce3 + 800017e0: 00000000 .word 0x00000000 + 800017e4: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xf54105c7b669a97b + 800017e8: 00033a03 ld x20,0(x6) + 800017ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8000000000000000 + 800017f0: 00033603 ld x12,0(x6) + 800017f4: 00830313 addi x6,x6,8 + +00000000800017f8 : +Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000000: + xperm4 x24, x20, x12 # perform operation + 800017f8: 28ca2c33 xperm4 x24,x20,x12 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000000, Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000000_str) + 800017fc: 0008b203 ld x4,0(x17) + 80001800: 01820c63 beq x4,x24,80001818 + 80001804: 4fc062ef jal x5,80007d00 + 80001808: 800017f8 .word 0x800017f8 + 8000180c: 00000000 .word 0x00000000 + 80001810: 8000fd1f .word 0x8000fd1f + 80001814: 00000000 .word 0x00000000 + 80001818: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0ceda5d7b46db3ab + 8000181c: 00033683 ld x13,0(x6) + 80001820: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8000000000000001 + 80001824: 00033d03 ld x26,0(x6) + 80001828: 00830313 addi x6,x6,8 + +000000008000182c : +Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000001: + xperm4 x11, x13, x26 # perform operation + 8000182c: 29a6a5b3 xperm4 x11,x13,x26 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000001, Zbkx_xperm4_cg_cp_rs2_edges_0x8000000000000001_str) + 80001830: 0008b203 ld x4,0(x17) + 80001834: 00b20c63 beq x4,x11,8000184c + 80001838: 4c8062ef jal x5,80007d00 + 8000183c: 8000182c .word 0x8000182c + 80001840: 00000000 .word 0x00000000 + 80001844: 8000fd6a .word 0x8000fd6a + 80001848: 00000000 .word 0x00000000 + 8000184c: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x4821282e3a830c9b + 80001850: 00033383 ld x7,0(x6) + 80001854: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7fffffffffffffff + 80001858: 00033f83 ld x31,0(x6) + 8000185c: 00830313 addi x6,x6,8 + +0000000080001860 : +Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffffffffffff: + xperm4 x13, x7, x31 # perform operation + 80001860: 29f3a6b3 xperm4 x13,x7,x31 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkx_xperm4_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001864: 0008b203 ld x4,0(x17) + 80001868: 00d20c63 beq x4,x13,80001880 + 8000186c: 494062ef jal x5,80007d00 + 80001870: 80001860 .word 0x80001860 + 80001874: 00000000 .word 0x00000000 + 80001878: 8000fdb5 .word 0x8000fdb5 + 8000187c: 00000000 .word 0x00000000 + 80001880: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x31dad9e4f9e95a3f + 80001884: 00033c03 ld x24,0(x6) + 80001888: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x7ffffffffffffffe + 8000188c: 00033783 ld x15,0(x6) + 80001890: 00830313 addi x6,x6,8 + +0000000080001894 : +Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffffffffffe: + xperm4 x25, x24, x15 # perform operation + 80001894: 28fc2cb3 xperm4 x25,x24,x15 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkx_xperm4_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 80001898: 0008b203 ld x4,0(x17) + 8000189c: 01920c63 beq x4,x25,800018b4 + 800018a0: 460062ef jal x5,80007d00 + 800018a4: 80001894 .word 0x80001894 + 800018a8: 00000000 .word 0x00000000 + 800018ac: 8000fe00 .word 0x8000fe00 + 800018b0: 00000000 .word 0x00000000 + 800018b4: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x8920926134896546 + 800018b8: 00033a03 ld x20,0(x6) + 800018bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xffffffffffffffff + 800018c0: 00033b03 ld x22,0(x6) + 800018c4: 00830313 addi x6,x6,8 + +00000000800018c8 : +Zbkx_xperm4_cg_cp_rs2_edges_0xffffffffffffffff: + xperm4 x10, x20, x22 # perform operation + 800018c8: 296a2533 xperm4 x10,x20,x22 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffffffffffff, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018cc: 0008b203 ld x4,0(x17) + 800018d0: 00a20c63 beq x4,x10,800018e8 + 800018d4: 42c062ef jal x5,80007d00 + 800018d8: 800018c8 .word 0x800018c8 + 800018dc: 00000000 .word 0x00000000 + 800018e0: 8000fe4b .word 0x8000fe4b + 800018e4: 00000000 .word 0x00000000 + 800018e8: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x6272bc42430fa0c1 + 800018ec: 00033783 ld x15,0(x6) + 800018f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xfffffffffffffffe + 800018f4: 00033503 ld x10,0(x6) + 800018f8: 00830313 addi x6,x6,8 + +00000000800018fc : +Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffffffffffe: + xperm4 x3, x15, x10 # perform operation + 800018fc: 28a7a1b3 xperm4 x3,x15,x10 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001900: 0008b203 ld x4,0(x17) + 80001904: 00320c63 beq x4,x3,8000191c + 80001908: 3f8062ef jal x5,80007d00 + 8000190c: 800018fc .word 0x800018fc + 80001910: 00000000 .word 0x00000000 + 80001914: 8000fe96 .word 0x8000fe96 + 80001918: 00000000 .word 0x00000000 + 8000191c: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1c0ba38ea222ad6c + 80001920: 00033e83 ld x29,0(x6) + 80001924: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80001928: 00033f03 ld x30,0(x6) + 8000192c: 00830313 addi x6,x6,8 + +0000000080001930 : +Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc887763ae86f2: + xperm4 x11, x29, x30 # perform operation + 80001930: 29eea5b3 xperm4 x11,x29,x30 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001934: 0008b203 ld x4,0(x17) + 80001938: 00b20c63 beq x4,x11,80001950 + 8000193c: 3c4062ef jal x5,80007d00 + 80001940: 80001930 .word 0x80001930 + 80001944: 00000000 .word 0x00000000 + 80001948: 8000fee1 .word 0x8000fee1 + 8000194c: 00000000 .word 0x00000000 + 80001950: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xccb254660164d598 + 80001954: 00033083 ld x1,0(x6) + 80001958: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 8000195c: 00033e03 ld x28,0(x6) + 80001960: 00830313 addi x6,x6,8 + +0000000080001964 : +Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + xperm4 x12, x1, x28 # perform operation + 80001964: 29c0a633 xperm4 x12,x1,x28 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001968: 0008b203 ld x4,0(x17) + 8000196c: 00c20c63 beq x4,x12,80001984 + 80001970: 390062ef jal x5,80007d00 + 80001974: 80001964 .word 0x80001964 + 80001978: 00000000 .word 0x00000000 + 8000197c: 8000ff2c .word 0x8000ff2c + 80001980: 00000000 .word 0x00000000 + 80001984: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xafd07b4ed8e2a836 + 80001988: 00033403 ld x8,0(x6) + 8000198c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x5555555555555555 + 80001990: 00033a03 ld x20,0(x6) + 80001994: 00830313 addi x6,x6,8 + +0000000080001998 : +Zbkx_xperm4_cg_cp_rs2_edges_0x5555555555555555: + xperm4 x9, x8, x20 # perform operation + 80001998: 294424b3 xperm4 x9,x8,x20 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cp_rs2_edges_0x5555555555555555, Zbkx_xperm4_cg_cp_rs2_edges_0x5555555555555555_str) + 8000199c: 0008b203 ld x4,0(x17) + 800019a0: 00920c63 beq x4,x9,800019b8 + 800019a4: 35c062ef jal x5,80007d00 + 800019a8: 80001998 .word 0x80001998 + 800019ac: 00000000 .word 0x00000000 + 800019b0: 8000ff77 .word 0x8000ff77 + 800019b4: 00000000 .word 0x00000000 + 800019b8: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xadca84f154f6bb9b + 800019bc: 00033d03 ld x26,0(x6) + 800019c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x00000000ffffffff + 800019c4: 00033983 ld x19,0(x6) + 800019c8: 00830313 addi x6,x6,8 + +00000000800019cc : +Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff: + xperm4 x21, x26, x19 # perform operation + 800019cc: 293d2ab3 xperm4 x21,x26,x19 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff, Zbkx_xperm4_cg_cp_rs2_edges_0xffffffff_str) + 800019d0: 0008b203 ld x4,0(x17) + 800019d4: 01520c63 beq x4,x21,800019ec + 800019d8: 328062ef jal x5,80007d00 + 800019dc: 800019cc .word 0x800019cc + 800019e0: 00000000 .word 0x00000000 + 800019e4: 8000ffc2 .word 0x8000ffc2 + 800019e8: 00000000 .word 0x00000000 + 800019ec: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x9ff5a2178bc780ac + 800019f0: 00033103 ld x2,0(x6) + 800019f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x00000000fffffffe + 800019f8: 00033983 ld x19,0(x6) + 800019fc: 00830313 addi x6,x6,8 + +0000000080001a00 : +Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe: + xperm4 x13, x2, x19 # perform operation + 80001a00: 293126b3 xperm4 x13,x2,x19 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe, Zbkx_xperm4_cg_cp_rs2_edges_0xfffffffe_str) + 80001a04: 0008b203 ld x4,0(x17) + 80001a08: 00d20c63 beq x4,x13,80001a20 + 80001a0c: 2f4062ef jal x5,80007d00 + 80001a10: 80001a00 .word 0x80001a00 + 80001a14: 00000000 .word 0x00000000 + 80001a18: 80010005 .word 0x80010005 + 80001a1c: 00000000 .word 0x00000000 + 80001a20: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xc97a40bd70bdb1da + 80001a24: 00033483 ld x9,0(x6) + 80001a28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000100000000 + 80001a2c: 00033503 ld x10,0(x6) + 80001a30: 00830313 addi x6,x6,8 + +0000000080001a34 : +Zbkx_xperm4_cg_cp_rs2_edges_0x100000000: + xperm4 x26, x9, x10 # perform operation + 80001a34: 28a4ad33 xperm4 x26,x9,x10 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cp_rs2_edges_0x100000000, Zbkx_xperm4_cg_cp_rs2_edges_0x100000000_str) + 80001a38: 0008b203 ld x4,0(x17) + 80001a3c: 01a20c63 beq x4,x26,80001a54 + 80001a40: 2c0062ef jal x5,80007d00 + 80001a44: 80001a34 .word 0x80001a34 + 80001a48: 00000000 .word 0x00000000 + 80001a4c: 80010048 .word 0x80010048 + 80001a50: 00000000 .word 0x00000000 + 80001a54: 00888893 addi x17,x17,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xa22aabe901f7df82 + 80001a58: 00033903 ld x18,0(x6) + 80001a5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0000000100000001 + 80001a60: 00033b03 ld x22,0(x6) + 80001a64: 00830313 addi x6,x6,8 + +0000000080001a68 : +Zbkx_xperm4_cg_cp_rs2_edges_0x100000001: + xperm4 x20, x18, x22 # perform operation + 80001a68: 29692a33 xperm4 x20,x18,x22 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cp_rs2_edges_0x100000001, Zbkx_xperm4_cg_cp_rs2_edges_0x100000001_str) + 80001a6c: 0008b203 ld x4,0(x17) + 80001a70: 01420c63 beq x4,x20,80001a88 + 80001a74: 28c062ef jal x5,80007d00 + 80001a78: 80001a68 .word 0x80001a68 + 80001a7c: 00000000 .word 0x00000000 + 80001a80: 8001008c .word 0x8001008c + 80001a84: 00000000 .word 0x00000000 + 80001a88: 00888893 addi x17,x17,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000000 + 80001a8c: 00033a83 ld x21,0(x6) + 80001a90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000000000000 + 80001a94: 00033683 ld x13,0(x6) + 80001a98: 00830313 addi x6,x6,8 + +0000000080001a9c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xperm4 x16, x21, x13 # perform operation + 80001a9c: 28daa833 xperm4 x16,x21,x13 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001aa0: 0008b203 ld x4,0(x17) + 80001aa4: 01020c63 beq x4,x16,80001abc + 80001aa8: 258062ef jal x5,80007d00 + 80001aac: 80001a9c .word 0x80001a9c + 80001ab0: 00000000 .word 0x00000000 + 80001ab4: 800100d0 .word 0x800100d0 + 80001ab8: 00000000 .word 0x00000000 + 80001abc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000000 + 80001ac0: 00033c03 ld x24,0(x6) + 80001ac4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000000000001 + 80001ac8: 00033a83 ld x21,0(x6) + 80001acc: 00830313 addi x6,x6,8 + +0000000080001ad0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xperm4 x30, x24, x21 # perform operation + 80001ad0: 295c2f33 xperm4 x30,x24,x21 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ad4: 0008b203 ld x4,0(x17) + 80001ad8: 01e20c63 beq x4,x30,80001af0 + 80001adc: 224062ef jal x5,80007d00 + 80001ae0: 80001ad0 .word 0x80001ad0 + 80001ae4: 00000000 .word 0x00000000 + 80001ae8: 80010123 .word 0x80010123 + 80001aec: 00000000 .word 0x00000000 + 80001af0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000000 + 80001af4: 00033d83 ld x27,0(x6) + 80001af8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0000000000000002 + 80001afc: 00033b03 ld x22,0(x6) + 80001b00: 00830313 addi x6,x6,8 + +0000000080001b04 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xperm4 x3, x27, x22 # perform operation + 80001b04: 296da1b3 xperm4 x3,x27,x22 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b08: 0008b203 ld x4,0(x17) + 80001b0c: 00320c63 beq x4,x3,80001b24 + 80001b10: 1f0062ef jal x5,80007d00 + 80001b14: 80001b04 .word 0x80001b04 + 80001b18: 00000000 .word 0x00000000 + 80001b1c: 80010176 .word 0x80010176 + 80001b20: 00000000 .word 0x00000000 + 80001b24: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000000000000 + 80001b28: 00033183 ld x3,0(x6) + 80001b2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x8000000000000000 + 80001b30: 00033b03 ld x22,0(x6) + 80001b34: 00830313 addi x6,x6,8 + +0000000080001b38 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + xperm4 x13, x3, x22 # perform operation + 80001b38: 2961a6b3 xperm4 x13,x3,x22 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b3c: 0008b203 ld x4,0(x17) + 80001b40: 00d20c63 beq x4,x13,80001b58 + 80001b44: 1bc062ef jal x5,80007d00 + 80001b48: 80001b38 .word 0x80001b38 + 80001b4c: 00000000 .word 0x00000000 + 80001b50: 800101c9 .word 0x800101c9 + 80001b54: 00000000 .word 0x00000000 + 80001b58: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000000 + 80001b5c: 00033d83 ld x27,0(x6) + 80001b60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 80001b64: 00033383 ld x7,0(x6) + 80001b68: 00830313 addi x6,x6,8 + +0000000080001b6c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + xperm4 x24, x27, x7 # perform operation + 80001b6c: 287dac33 xperm4 x24,x27,x7 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b70: 0008b203 ld x4,0(x17) + 80001b74: 01820c63 beq x4,x24,80001b8c + 80001b78: 188062ef jal x5,80007d00 + 80001b7c: 80001b6c .word 0x80001b6c + 80001b80: 00000000 .word 0x00000000 + 80001b84: 8001022b .word 0x8001022b + 80001b88: 00000000 .word 0x00000000 + 80001b8c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000000000000 + 80001b90: 00033183 ld x3,0(x6) + 80001b94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7fffffffffffffff + 80001b98: 00033503 ld x10,0(x6) + 80001b9c: 00830313 addi x6,x6,8 + +0000000080001ba0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + xperm4 x26, x3, x10 # perform operation + 80001ba0: 28a1ad33 xperm4 x26,x3,x10 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001ba4: 0008b203 ld x4,0(x17) + 80001ba8: 01a20c63 beq x4,x26,80001bc0 + 80001bac: 154062ef jal x5,80007d00 + 80001bb0: 80001ba0 .word 0x80001ba0 + 80001bb4: 00000000 .word 0x00000000 + 80001bb8: 8001028d .word 0x8001028d + 80001bbc: 00000000 .word 0x00000000 + 80001bc0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0000000000000000 + 80001bc4: 00033503 ld x10,0(x6) + 80001bc8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x7ffffffffffffffe + 80001bcc: 00033b03 ld x22,0(x6) + 80001bd0: 00830313 addi x6,x6,8 + +0000000080001bd4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + xperm4 x14, x10, x22 # perform operation + 80001bd4: 29652733 xperm4 x14,x10,x22 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bd8: 0008b203 ld x4,0(x17) + 80001bdc: 00e20c63 beq x4,x14,80001bf4 + 80001be0: 120062ef jal x5,80007d00 + 80001be4: 80001bd4 .word 0x80001bd4 + 80001be8: 00000000 .word 0x00000000 + 80001bec: 800102ef .word 0x800102ef + 80001bf0: 00000000 .word 0x00000000 + 80001bf4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000000 + 80001bf8: 00033983 ld x19,0(x6) + 80001bfc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xffffffffffffffff + 80001c00: 00033683 ld x13,0(x6) + 80001c04: 00830313 addi x6,x6,8 + +0000000080001c08 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + xperm4 x29, x19, x13 # perform operation + 80001c08: 28d9aeb3 xperm4 x29,x19,x13 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c0c: 0008b203 ld x4,0(x17) + 80001c10: 01d20c63 beq x4,x29,80001c28 + 80001c14: 0ec062ef jal x5,80007d00 + 80001c18: 80001c08 .word 0x80001c08 + 80001c1c: 00000000 .word 0x00000000 + 80001c20: 80010351 .word 0x80010351 + 80001c24: 00000000 .word 0x00000000 + 80001c28: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000000 + 80001c2c: 00033803 ld x16,0(x6) + 80001c30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xfffffffffffffffe + 80001c34: 00033d03 ld x26,0(x6) + 80001c38: 00830313 addi x6,x6,8 + +0000000080001c3c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + xperm4 x9, x16, x26 # perform operation + 80001c3c: 29a824b3 xperm4 x9,x16,x26 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c40: 0008b203 ld x4,0(x17) + 80001c44: 00920c63 beq x4,x9,80001c5c + 80001c48: 0b8062ef jal x5,80007d00 + 80001c4c: 80001c3c .word 0x80001c3c + 80001c50: 00000000 .word 0x00000000 + 80001c54: 800103b3 .word 0x800103b3 + 80001c58: 00000000 .word 0x00000000 + 80001c5c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000000000000 + 80001c60: 00033e83 ld x29,0(x6) + 80001c64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 80001c68: 00033d83 ld x27,0(x6) + 80001c6c: 00830313 addi x6,x6,8 + +0000000080001c70 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + xperm4 x19, x29, x27 # perform operation + 80001c70: 29bea9b3 xperm4 x19,x29,x27 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c74: 0008b203 ld x4,0(x17) + 80001c78: 01320c63 beq x4,x19,80001c90 + 80001c7c: 084062ef jal x5,80007d00 + 80001c80: 80001c70 .word 0x80001c70 + 80001c84: 00000000 .word 0x00000000 + 80001c88: 80010415 .word 0x80010415 + 80001c8c: 00000000 .word 0x00000000 + 80001c90: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000000 + 80001c94: 00033983 ld x19,0(x6) + 80001c98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80001c9c: 00033503 ld x10,0(x6) + 80001ca0: 00830313 addi x6,x6,8 + +0000000080001ca4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x31, x19, x10 # perform operation + 80001ca4: 28a9afb3 xperm4 x31,x19,x10 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ca8: 0008b203 ld x4,0(x17) + 80001cac: 01f20c63 beq x4,x31,80001cc4 + 80001cb0: 050062ef jal x5,80007d00 + 80001cb4: 80001ca4 .word 0x80001ca4 + 80001cb8: 00000000 .word 0x00000000 + 80001cbc: 80010477 .word 0x80010477 + 80001cc0: 00000000 .word 0x00000000 + 80001cc4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000000000000 + 80001cc8: 00033a03 ld x20,0(x6) + 80001ccc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5555555555555555 + 80001cd0: 00033703 ld x14,0(x6) + 80001cd4: 00830313 addi x6,x6,8 + +0000000080001cd8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + xperm4 x13, x20, x14 # perform operation + 80001cd8: 28ea26b3 xperm4 x13,x20,x14 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cdc: 0008b203 ld x4,0(x17) + 80001ce0: 00d20c63 beq x4,x13,80001cf8 + 80001ce4: 01c062ef jal x5,80007d00 + 80001ce8: 80001cd8 .word 0x80001cd8 + 80001cec: 00000000 .word 0x00000000 + 80001cf0: 800104d9 .word 0x800104d9 + 80001cf4: 00000000 .word 0x00000000 + 80001cf8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000000 + 80001cfc: 00033803 ld x16,0(x6) + 80001d00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x00000000ffffffff + 80001d04: 00033103 ld x2,0(x6) + 80001d08: 00830313 addi x6,x6,8 + +0000000080001d0c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xperm4 x15, x16, x2 # perform operation + 80001d0c: 282827b3 xperm4 x15,x16,x2 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d10: 0008b203 ld x4,0(x17) + 80001d14: 00f20c63 beq x4,x15,80001d2c + 80001d18: 7e9052ef jal x5,80007d00 + 80001d1c: 80001d0c .word 0x80001d0c + 80001d20: 00000000 .word 0x00000000 + 80001d24: 8001053b .word 0x8001053b + 80001d28: 00000000 .word 0x00000000 + 80001d2c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000000000000 + 80001d30: 00033d03 ld x26,0(x6) + 80001d34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x00000000fffffffe + 80001d38: 00033683 ld x13,0(x6) + 80001d3c: 00830313 addi x6,x6,8 + +0000000080001d40 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xperm4 x2, x26, x13 # perform operation + 80001d40: 28dd2133 xperm4 x2,x26,x13 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d44: 0008b203 ld x4,0(x17) + 80001d48: 00220c63 beq x4,x2,80001d60 + 80001d4c: 7b5052ef jal x5,80007d00 + 80001d50: 80001d40 .word 0x80001d40 + 80001d54: 00000000 .word 0x00000000 + 80001d58: 80010595 .word 0x80010595 + 80001d5c: 00000000 .word 0x00000000 + 80001d60: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000000 + 80001d64: 00033c03 ld x24,0(x6) + 80001d68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000100000000 + 80001d6c: 00033403 ld x8,0(x6) + 80001d70: 00830313 addi x6,x6,8 + +0000000080001d74 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + xperm4 x12, x24, x8 # perform operation + 80001d74: 288c2633 xperm4 x12,x24,x8 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d78: 0008b203 ld x4,0(x17) + 80001d7c: 00c20c63 beq x4,x12,80001d94 + 80001d80: 781052ef jal x5,80007d00 + 80001d84: 80001d74 .word 0x80001d74 + 80001d88: 00000000 .word 0x00000000 + 80001d8c: 800105ef .word 0x800105ef + 80001d90: 00000000 .word 0x00000000 + 80001d94: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0000000000000000 + 80001d98: 00033903 ld x18,0(x6) + 80001d9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000001 + 80001da0: 00033c03 ld x24,0(x6) + 80001da4: 00830313 addi x6,x6,8 + +0000000080001da8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + xperm4 x20, x18, x24 # perform operation + 80001da8: 29892a33 xperm4 x20,x18,x24 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dac: 0008b203 ld x4,0(x17) + 80001db0: 01420c63 beq x4,x20,80001dc8 + 80001db4: 74d052ef jal x5,80007d00 + 80001db8: 80001da8 .word 0x80001da8 + 80001dbc: 00000000 .word 0x00000000 + 80001dc0: 8001064a .word 0x8001064a + 80001dc4: 00000000 .word 0x00000000 + 80001dc8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000000000001 + 80001dcc: 00033e83 ld x29,0(x6) + 80001dd0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x0000000000000000 + 80001dd4: 00033b83 ld x23,0(x6) + 80001dd8: 00830313 addi x6,x6,8 + +0000000080001ddc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xperm4 x3, x29, x23 # perform operation + 80001ddc: 297ea1b3 xperm4 x3,x29,x23 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001de0: 0008b203 ld x4,0(x17) + 80001de4: 00320c63 beq x4,x3,80001dfc + 80001de8: 719052ef jal x5,80007d00 + 80001dec: 80001ddc .word 0x80001ddc + 80001df0: 00000000 .word 0x00000000 + 80001df4: 800106a5 .word 0x800106a5 + 80001df8: 00000000 .word 0x00000000 + 80001dfc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000001 + 80001e00: 00033c03 ld x24,0(x6) + 80001e04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000000000001 + 80001e08: 00033903 ld x18,0(x6) + 80001e0c: 00830313 addi x6,x6,8 + +0000000080001e10 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xperm4 x25, x24, x18 # perform operation + 80001e10: 292c2cb3 xperm4 x25,x24,x18 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e14: 0008b203 ld x4,0(x17) + 80001e18: 01920c63 beq x4,x25,80001e30 + 80001e1c: 6e5052ef jal x5,80007d00 + 80001e20: 80001e10 .word 0x80001e10 + 80001e24: 00000000 .word 0x00000000 + 80001e28: 800106f8 .word 0x800106f8 + 80001e2c: 00000000 .word 0x00000000 + 80001e30: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0000000000000001 + 80001e34: 00033503 ld x10,0(x6) + 80001e38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000002 + 80001e3c: 00033f83 ld x31,0(x6) + 80001e40: 00830313 addi x6,x6,8 + +0000000080001e44 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xperm4 x13, x10, x31 # perform operation + 80001e44: 29f526b3 xperm4 x13,x10,x31 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e48: 0008b203 ld x4,0(x17) + 80001e4c: 00d20c63 beq x4,x13,80001e64 + 80001e50: 6b1052ef jal x5,80007d00 + 80001e54: 80001e44 .word 0x80001e44 + 80001e58: 00000000 .word 0x00000000 + 80001e5c: 8001074b .word 0x8001074b + 80001e60: 00000000 .word 0x00000000 + 80001e64: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0000000000000001 + 80001e68: 00033683 ld x13,0(x6) + 80001e6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x8000000000000000 + 80001e70: 00033503 ld x10,0(x6) + 80001e74: 00830313 addi x6,x6,8 + +0000000080001e78 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + xperm4 x27, x13, x10 # perform operation + 80001e78: 28a6adb3 xperm4 x27,x13,x10 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e7c: 0008b203 ld x4,0(x17) + 80001e80: 01b20c63 beq x4,x27,80001e98 + 80001e84: 67d052ef jal x5,80007d00 + 80001e88: 80001e78 .word 0x80001e78 + 80001e8c: 00000000 .word 0x00000000 + 80001e90: 8001079e .word 0x8001079e + 80001e94: 00000000 .word 0x00000000 + 80001e98: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000000000001 + 80001e9c: 00033f83 ld x31,0(x6) + 80001ea0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8000000000000001 + 80001ea4: 00033183 ld x3,0(x6) + 80001ea8: 00830313 addi x6,x6,8 + +0000000080001eac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + xperm4 x14, x31, x3 # perform operation + 80001eac: 283fa733 xperm4 x14,x31,x3 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001eb0: 0008b203 ld x4,0(x17) + 80001eb4: 00e20c63 beq x4,x14,80001ecc + 80001eb8: 649052ef jal x5,80007d00 + 80001ebc: 80001eac .word 0x80001eac + 80001ec0: 00000000 .word 0x00000000 + 80001ec4: 80010800 .word 0x80010800 + 80001ec8: 00000000 .word 0x00000000 + 80001ecc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000000000001 + 80001ed0: 00033c83 ld x25,0(x6) + 80001ed4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x7fffffffffffffff + 80001ed8: 00033d03 ld x26,0(x6) + 80001edc: 00830313 addi x6,x6,8 + +0000000080001ee0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + xperm4 x12, x25, x26 # perform operation + 80001ee0: 29aca633 xperm4 x12,x25,x26 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ee4: 0008b203 ld x4,0(x17) + 80001ee8: 00c20c63 beq x4,x12,80001f00 + 80001eec: 615052ef jal x5,80007d00 + 80001ef0: 80001ee0 .word 0x80001ee0 + 80001ef4: 00000000 .word 0x00000000 + 80001ef8: 80010862 .word 0x80010862 + 80001efc: 00000000 .word 0x00000000 + 80001f00: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000000000001 + 80001f04: 00033083 ld x1,0(x6) + 80001f08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80001f0c: 00033183 ld x3,0(x6) + 80001f10: 00830313 addi x6,x6,8 + +0000000080001f14 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + xperm4 x10, x1, x3 # perform operation + 80001f14: 2830a533 xperm4 x10,x1,x3 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f18: 0008b203 ld x4,0(x17) + 80001f1c: 00a20c63 beq x4,x10,80001f34 + 80001f20: 5e1052ef jal x5,80007d00 + 80001f24: 80001f14 .word 0x80001f14 + 80001f28: 00000000 .word 0x00000000 + 80001f2c: 800108c4 .word 0x800108c4 + 80001f30: 00000000 .word 0x00000000 + 80001f34: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000001 + 80001f38: 00033a83 ld x21,0(x6) + 80001f3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xffffffffffffffff + 80001f40: 00033c83 ld x25,0(x6) + 80001f44: 00830313 addi x6,x6,8 + +0000000080001f48 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + xperm4 x3, x21, x25 # perform operation + 80001f48: 299aa1b3 xperm4 x3,x21,x25 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f4c: 0008b203 ld x4,0(x17) + 80001f50: 00320c63 beq x4,x3,80001f68 + 80001f54: 5ad052ef jal x5,80007d00 + 80001f58: 80001f48 .word 0x80001f48 + 80001f5c: 00000000 .word 0x00000000 + 80001f60: 80010926 .word 0x80010926 + 80001f64: 00000000 .word 0x00000000 + 80001f68: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000000000001 + 80001f6c: 00033103 ld x2,0(x6) + 80001f70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xfffffffffffffffe + 80001f74: 00033b83 ld x23,0(x6) + 80001f78: 00830313 addi x6,x6,8 + +0000000080001f7c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + xperm4 x31, x2, x23 # perform operation + 80001f7c: 29712fb3 xperm4 x31,x2,x23 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f80: 0008b203 ld x4,0(x17) + 80001f84: 01f20c63 beq x4,x31,80001f9c + 80001f88: 579052ef jal x5,80007d00 + 80001f8c: 80001f7c .word 0x80001f7c + 80001f90: 00000000 .word 0x00000000 + 80001f94: 80010988 .word 0x80010988 + 80001f98: 00000000 .word 0x00000000 + 80001f9c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0000000000000001 + 80001fa0: 00033683 ld x13,0(x6) + 80001fa4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80001fa8: 00033a83 ld x21,0(x6) + 80001fac: 00830313 addi x6,x6,8 + +0000000080001fb0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + xperm4 x15, x13, x21 # perform operation + 80001fb0: 2956a7b3 xperm4 x15,x13,x21 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fb4: 0008b203 ld x4,0(x17) + 80001fb8: 00f20c63 beq x4,x15,80001fd0 + 80001fbc: 545052ef jal x5,80007d00 + 80001fc0: 80001fb0 .word 0x80001fb0 + 80001fc4: 00000000 .word 0x00000000 + 80001fc8: 800109ea .word 0x800109ea + 80001fcc: 00000000 .word 0x00000000 + 80001fd0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0000000000000001 + 80001fd4: 00033403 ld x8,0(x6) + 80001fd8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80001fdc: 00033783 ld x15,0(x6) + 80001fe0: 00830313 addi x6,x6,8 + +0000000080001fe4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x28, x8, x15 # perform operation + 80001fe4: 28f42e33 xperm4 x28,x8,x15 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001fe8: 0008b203 ld x4,0(x17) + 80001fec: 01c20c63 beq x4,x28,80002004 + 80001ff0: 511052ef jal x5,80007d00 + 80001ff4: 80001fe4 .word 0x80001fe4 + 80001ff8: 00000000 .word 0x00000000 + 80001ffc: 80010a4c .word 0x80010a4c + 80002000: 00000000 .word 0x00000000 + 80002004: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x0000000000000001 + 80002008: 00033703 ld x14,0(x6) + 8000200c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x5555555555555555 + 80002010: 00033a03 ld x20,0(x6) + 80002014: 00830313 addi x6,x6,8 + +0000000080002018 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + xperm4 x29, x14, x20 # perform operation + 80002018: 29472eb3 xperm4 x29,x14,x20 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 8000201c: 0008b203 ld x4,0(x17) + 80002020: 01d20c63 beq x4,x29,80002038 + 80002024: 4dd052ef jal x5,80007d00 + 80002028: 80002018 .word 0x80002018 + 8000202c: 00000000 .word 0x00000000 + 80002030: 80010aae .word 0x80010aae + 80002034: 00000000 .word 0x00000000 + 80002038: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000000000001 + 8000203c: 00033583 ld x11,0(x6) + 80002040: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000ffffffff + 80002044: 00033e83 ld x29,0(x6) + 80002048: 00830313 addi x6,x6,8 + +000000008000204c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xperm4 x21, x11, x29 # perform operation + 8000204c: 29d5aab3 xperm4 x21,x11,x29 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002050: 0008b203 ld x4,0(x17) + 80002054: 01520c63 beq x4,x21,8000206c + 80002058: 4a9052ef jal x5,80007d00 + 8000205c: 8000204c .word 0x8000204c + 80002060: 00000000 .word 0x00000000 + 80002064: 80010b10 .word 0x80010b10 + 80002068: 00000000 .word 0x00000000 + 8000206c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000001 + 80002070: 00033a83 ld x21,0(x6) + 80002074: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x00000000fffffffe + 80002078: 00033103 ld x2,0(x6) + 8000207c: 00830313 addi x6,x6,8 + +0000000080002080 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xperm4 x22, x21, x2 # perform operation + 80002080: 282aab33 xperm4 x22,x21,x2 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002084: 0008b203 ld x4,0(x17) + 80002088: 01620c63 beq x4,x22,800020a0 + 8000208c: 475052ef jal x5,80007d00 + 80002090: 80002080 .word 0x80002080 + 80002094: 00000000 .word 0x00000000 + 80002098: 80010b6a .word 0x80010b6a + 8000209c: 00000000 .word 0x00000000 + 800020a0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000000000001 + 800020a4: 00033f03 ld x30,0(x6) + 800020a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0000000100000000 + 800020ac: 00033d83 ld x27,0(x6) + 800020b0: 00830313 addi x6,x6,8 + +00000000800020b4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + xperm4 x20, x30, x27 # perform operation + 800020b4: 29bf2a33 xperm4 x20,x30,x27 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020b8: 0008b203 ld x4,0(x17) + 800020bc: 01420c63 beq x4,x20,800020d4 + 800020c0: 441052ef jal x5,80007d00 + 800020c4: 800020b4 .word 0x800020b4 + 800020c8: 00000000 .word 0x00000000 + 800020cc: 80010bc4 .word 0x80010bc4 + 800020d0: 00000000 .word 0x00000000 + 800020d4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000000000001 + 800020d8: 00033f03 ld x30,0(x6) + 800020dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000100000001 + 800020e0: 00033103 ld x2,0(x6) + 800020e4: 00830313 addi x6,x6,8 + +00000000800020e8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + xperm4 x14, x30, x2 # perform operation + 800020e8: 282f2733 xperm4 x14,x30,x2 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020ec: 0008b203 ld x4,0(x17) + 800020f0: 00e20c63 beq x4,x14,80002108 + 800020f4: 40d052ef jal x5,80007d00 + 800020f8: 800020e8 .word 0x800020e8 + 800020fc: 00000000 .word 0x00000000 + 80002100: 80010c1f .word 0x80010c1f + 80002104: 00000000 .word 0x00000000 + 80002108: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000002 + 8000210c: 00033983 ld x19,0(x6) + 80002110: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000000 + 80002114: 00033083 ld x1,0(x6) + 80002118: 00830313 addi x6,x6,8 + +000000008000211c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xperm4 x11, x19, x1 # perform operation + 8000211c: 2819a5b3 xperm4 x11,x19,x1 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002120: 0008b203 ld x4,0(x17) + 80002124: 00b20c63 beq x4,x11,8000213c + 80002128: 3d9052ef jal x5,80007d00 + 8000212c: 8000211c .word 0x8000211c + 80002130: 00000000 .word 0x00000000 + 80002134: 80010c7a .word 0x80010c7a + 80002138: 00000000 .word 0x00000000 + 8000213c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000002 + 80002140: 00033483 ld x9,0(x6) + 80002144: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0000000000000001 + 80002148: 00033c83 ld x25,0(x6) + 8000214c: 00830313 addi x6,x6,8 + +0000000080002150 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xperm4 x30, x9, x25 # perform operation + 80002150: 2994af33 xperm4 x30,x9,x25 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002154: 0008b203 ld x4,0(x17) + 80002158: 01e20c63 beq x4,x30,80002170 + 8000215c: 3a5052ef jal x5,80007d00 + 80002160: 80002150 .word 0x80002150 + 80002164: 00000000 .word 0x00000000 + 80002168: 80010ccd .word 0x80010ccd + 8000216c: 00000000 .word 0x00000000 + 80002170: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000002 + 80002174: 00033d83 ld x27,0(x6) + 80002178: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000000000002 + 8000217c: 00033103 ld x2,0(x6) + 80002180: 00830313 addi x6,x6,8 + +0000000080002184 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xperm4 x3, x27, x2 # perform operation + 80002184: 282da1b3 xperm4 x3,x27,x2 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002188: 0008b203 ld x4,0(x17) + 8000218c: 00320c63 beq x4,x3,800021a4 + 80002190: 371052ef jal x5,80007d00 + 80002194: 80002184 .word 0x80002184 + 80002198: 00000000 .word 0x00000000 + 8000219c: 80010d20 .word 0x80010d20 + 800021a0: 00000000 .word 0x00000000 + 800021a4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000002 + 800021a8: 00033803 ld x16,0(x6) + 800021ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8000000000000000 + 800021b0: 00033f83 ld x31,0(x6) + 800021b4: 00830313 addi x6,x6,8 + +00000000800021b8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + xperm4 x23, x16, x31 # perform operation + 800021b8: 29f82bb3 xperm4 x23,x16,x31 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021bc: 0008b203 ld x4,0(x17) + 800021c0: 01720c63 beq x4,x23,800021d8 + 800021c4: 33d052ef jal x5,80007d00 + 800021c8: 800021b8 .word 0x800021b8 + 800021cc: 00000000 .word 0x00000000 + 800021d0: 80010d73 .word 0x80010d73 + 800021d4: 00000000 .word 0x00000000 + 800021d8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000000000002 + 800021dc: 00033f83 ld x31,0(x6) + 800021e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 800021e4: 00033383 ld x7,0(x6) + 800021e8: 00830313 addi x6,x6,8 + +00000000800021ec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + xperm4 x22, x31, x7 # perform operation + 800021ec: 287fab33 xperm4 x22,x31,x7 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 800021f0: 0008b203 ld x4,0(x17) + 800021f4: 01620c63 beq x4,x22,8000220c + 800021f8: 309052ef jal x5,80007d00 + 800021fc: 800021ec .word 0x800021ec + 80002200: 00000000 .word 0x00000000 + 80002204: 80010dd5 .word 0x80010dd5 + 80002208: 00000000 .word 0x00000000 + 8000220c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0000000000000002 + 80002210: 00033503 ld x10,0(x6) + 80002214: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002218: 00033903 ld x18,0(x6) + 8000221c: 00830313 addi x6,x6,8 + +0000000080002220 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + xperm4 x30, x10, x18 # perform operation + 80002220: 29252f33 xperm4 x30,x10,x18 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002224: 0008b203 ld x4,0(x17) + 80002228: 01e20c63 beq x4,x30,80002240 + 8000222c: 2d5052ef jal x5,80007d00 + 80002230: 80002220 .word 0x80002220 + 80002234: 00000000 .word 0x00000000 + 80002238: 80010e37 .word 0x80010e37 + 8000223c: 00000000 .word 0x00000000 + 80002240: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000000000002 + 80002244: 00033c83 ld x25,0(x6) + 80002248: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x7ffffffffffffffe + 8000224c: 00033703 ld x14,0(x6) + 80002250: 00830313 addi x6,x6,8 + +0000000080002254 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + xperm4 x15, x25, x14 # perform operation + 80002254: 28eca7b3 xperm4 x15,x25,x14 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002258: 0008b203 ld x4,0(x17) + 8000225c: 00f20c63 beq x4,x15,80002274 + 80002260: 2a1052ef jal x5,80007d00 + 80002264: 80002254 .word 0x80002254 + 80002268: 00000000 .word 0x00000000 + 8000226c: 80010e99 .word 0x80010e99 + 80002270: 00000000 .word 0x00000000 + 80002274: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000000000002 + 80002278: 00033103 ld x2,0(x6) + 8000227c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xffffffffffffffff + 80002280: 00033803 ld x16,0(x6) + 80002284: 00830313 addi x6,x6,8 + +0000000080002288 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + xperm4 x24, x2, x16 # perform operation + 80002288: 29012c33 xperm4 x24,x2,x16 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 8000228c: 0008b203 ld x4,0(x17) + 80002290: 01820c63 beq x4,x24,800022a8 + 80002294: 26d052ef jal x5,80007d00 + 80002298: 80002288 .word 0x80002288 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 80010efb .word 0x80010efb + 800022a4: 00000000 .word 0x00000000 + 800022a8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000000000002 + 800022ac: 00033603 ld x12,0(x6) + 800022b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xfffffffffffffffe + 800022b4: 00033783 ld x15,0(x6) + 800022b8: 00830313 addi x6,x6,8 + +00000000800022bc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + xperm4 x14, x12, x15 # perform operation + 800022bc: 28f62733 xperm4 x14,x12,x15 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022c0: 0008b203 ld x4,0(x17) + 800022c4: 00e20c63 beq x4,x14,800022dc + 800022c8: 239052ef jal x5,80007d00 + 800022cc: 800022bc .word 0x800022bc + 800022d0: 00000000 .word 0x00000000 + 800022d4: 80010f5d .word 0x80010f5d + 800022d8: 00000000 .word 0x00000000 + 800022dc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000002 + 800022e0: 00033a83 ld x21,0(x6) + 800022e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 800022e8: 00033903 ld x18,0(x6) + 800022ec: 00830313 addi x6,x6,8 + +00000000800022f0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + xperm4 x15, x21, x18 # perform operation + 800022f0: 292aa7b3 xperm4 x15,x21,x18 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 800022f4: 0008b203 ld x4,0(x17) + 800022f8: 00f20c63 beq x4,x15,80002310 + 800022fc: 205052ef jal x5,80007d00 + 80002300: 800022f0 .word 0x800022f0 + 80002304: 00000000 .word 0x00000000 + 80002308: 80010fbf .word 0x80010fbf + 8000230c: 00000000 .word 0x00000000 + 80002310: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0000000000000002 + 80002314: 00033503 ld x10,0(x6) + 80002318: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 8000231c: 00033603 ld x12,0(x6) + 80002320: 00830313 addi x6,x6,8 + +0000000080002324 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x20, x10, x12 # perform operation + 80002324: 28c52a33 xperm4 x20,x10,x12 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002328: 0008b203 ld x4,0(x17) + 8000232c: 01420c63 beq x4,x20,80002344 + 80002330: 1d1052ef jal x5,80007d00 + 80002334: 80002324 .word 0x80002324 + 80002338: 00000000 .word 0x00000000 + 8000233c: 80011021 .word 0x80011021 + 80002340: 00000000 .word 0x00000000 + 80002344: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000000000002 + 80002348: 00033f83 ld x31,0(x6) + 8000234c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x5555555555555555 + 80002350: 00033183 ld x3,0(x6) + 80002354: 00830313 addi x6,x6,8 + +0000000080002358 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + xperm4 x13, x31, x3 # perform operation + 80002358: 283fa6b3 xperm4 x13,x31,x3 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 8000235c: 0008b203 ld x4,0(x17) + 80002360: 00d20c63 beq x4,x13,80002378 + 80002364: 19d052ef jal x5,80007d00 + 80002368: 80002358 .word 0x80002358 + 8000236c: 00000000 .word 0x00000000 + 80002370: 80011083 .word 0x80011083 + 80002374: 00000000 .word 0x00000000 + 80002378: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000002 + 8000237c: 00033d83 ld x27,0(x6) + 80002380: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000ffffffff + 80002384: 00033e83 ld x29,0(x6) + 80002388: 00830313 addi x6,x6,8 + +000000008000238c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xperm4 x2, x27, x29 # perform operation + 8000238c: 29dda133 xperm4 x2,x27,x29 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 80002390: 0008b203 ld x4,0(x17) + 80002394: 00220c63 beq x4,x2,800023ac + 80002398: 169052ef jal x5,80007d00 + 8000239c: 8000238c .word 0x8000238c + 800023a0: 00000000 .word 0x00000000 + 800023a4: 800110e5 .word 0x800110e5 + 800023a8: 00000000 .word 0x00000000 + 800023ac: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000002 + 800023b0: 00033c03 ld x24,0(x6) + 800023b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x00000000fffffffe + 800023b8: 00033683 ld x13,0(x6) + 800023bc: 00830313 addi x6,x6,8 + +00000000800023c0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xperm4 x7, x24, x13 # perform operation + 800023c0: 28dc23b3 xperm4 x7,x24,x13 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023c4: 0008b203 ld x4,0(x17) + 800023c8: 00720c63 beq x4,x7,800023e0 + 800023cc: 135052ef jal x5,80007d00 + 800023d0: 800023c0 .word 0x800023c0 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 8001113f .word 0x8001113f + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000002 + 800023e4: 00033a83 ld x21,0(x6) + 800023e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000100000000 + 800023ec: 00033383 ld x7,0(x6) + 800023f0: 00830313 addi x6,x6,8 + +00000000800023f4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + xperm4 x23, x21, x7 # perform operation + 800023f4: 287aabb3 xperm4 x23,x21,x7 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 800023f8: 0008b203 ld x4,0(x17) + 800023fc: 01720c63 beq x4,x23,80002414 + 80002400: 101052ef jal x5,80007d00 + 80002404: 800023f4 .word 0x800023f4 + 80002408: 00000000 .word 0x00000000 + 8000240c: 80011199 .word 0x80011199 + 80002410: 00000000 .word 0x00000000 + 80002414: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000000000002 + 80002418: 00033a03 ld x20,0(x6) + 8000241c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000100000001 + 80002420: 00033703 ld x14,0(x6) + 80002424: 00830313 addi x6,x6,8 + +0000000080002428 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + xperm4 x27, x20, x14 # perform operation + 80002428: 28ea2db3 xperm4 x27,x20,x14 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 8000242c: 0008b203 ld x4,0(x17) + 80002430: 01b20c63 beq x4,x27,80002448 + 80002434: 0cd052ef jal x5,80007d00 + 80002438: 80002428 .word 0x80002428 + 8000243c: 00000000 .word 0x00000000 + 80002440: 800111f4 .word 0x800111f4 + 80002444: 00000000 .word 0x00000000 + 80002448: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x8000000000000000 + 8000244c: 00033f03 ld x30,0(x6) + 80002450: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000000000000 + 80002454: 00033483 ld x9,0(x6) + 80002458: 00830313 addi x6,x6,8 + +000000008000245c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + xperm4 x15, x30, x9 # perform operation + 8000245c: 289f27b3 xperm4 x15,x30,x9 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002460: 0008b203 ld x4,0(x17) + 80002464: 00f20c63 beq x4,x15,8000247c + 80002468: 099052ef jal x5,80007d00 + 8000246c: 8000245c .word 0x8000245c + 80002470: 00000000 .word 0x00000000 + 80002474: 8001124f .word 0x8001124f + 80002478: 00000000 .word 0x00000000 + 8000247c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x8000000000000000 + 80002480: 00033d03 ld x26,0(x6) + 80002484: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000000000001 + 80002488: 00033183 ld x3,0(x6) + 8000248c: 00830313 addi x6,x6,8 + +0000000080002490 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + xperm4 x2, x26, x3 # perform operation + 80002490: 283d2133 xperm4 x2,x26,x3 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 80002494: 0008b203 ld x4,0(x17) + 80002498: 00220c63 beq x4,x2,800024b0 + 8000249c: 065052ef jal x5,80007d00 + 800024a0: 80002490 .word 0x80002490 + 800024a4: 00000000 .word 0x00000000 + 800024a8: 800112b1 .word 0x800112b1 + 800024ac: 00000000 .word 0x00000000 + 800024b0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8000000000000000 + 800024b4: 00033a83 ld x21,0(x6) + 800024b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000000000002 + 800024bc: 00033583 ld x11,0(x6) + 800024c0: 00830313 addi x6,x6,8 + +00000000800024c4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + xperm4 x15, x21, x11 # perform operation + 800024c4: 28baa7b3 xperm4 x15,x21,x11 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024c8: 0008b203 ld x4,0(x17) + 800024cc: 00f20c63 beq x4,x15,800024e4 + 800024d0: 031052ef jal x5,80007d00 + 800024d4: 800024c4 .word 0x800024c4 + 800024d8: 00000000 .word 0x00000000 + 800024dc: 80011313 .word 0x80011313 + 800024e0: 00000000 .word 0x00000000 + 800024e4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x8000000000000000 + 800024e8: 00033903 ld x18,0(x6) + 800024ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x8000000000000000 + 800024f0: 00033083 ld x1,0(x6) + 800024f4: 00830313 addi x6,x6,8 + +00000000800024f8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + xperm4 x19, x18, x1 # perform operation + 800024f8: 281929b3 xperm4 x19,x18,x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 800024fc: 0008b203 ld x4,0(x17) + 80002500: 01320c63 beq x4,x19,80002518 + 80002504: 7fc052ef jal x5,80007d00 + 80002508: 800024f8 .word 0x800024f8 + 8000250c: 00000000 .word 0x00000000 + 80002510: 80011375 .word 0x80011375 + 80002514: 00000000 .word 0x00000000 + 80002518: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 8000251c: 00033583 ld x11,0(x6) + 80002520: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x8000000000000001 + 80002524: 00033403 ld x8,0(x6) + 80002528: 00830313 addi x6,x6,8 + +000000008000252c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + xperm4 x12, x11, x8 # perform operation + 8000252c: 2885a633 xperm4 x12,x11,x8 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002530: 0008b203 ld x4,0(x17) + 80002534: 00c20c63 beq x4,x12,8000254c + 80002538: 7c8052ef jal x5,80007d00 + 8000253c: 8000252c .word 0x8000252c + 80002540: 00000000 .word 0x00000000 + 80002544: 800113e6 .word 0x800113e6 + 80002548: 00000000 .word 0x00000000 + 8000254c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x8000000000000000 + 80002550: 00033e83 ld x29,0(x6) + 80002554: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7fffffffffffffff + 80002558: 00033503 ld x10,0(x6) + 8000255c: 00830313 addi x6,x6,8 + +0000000080002560 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + xperm4 x14, x29, x10 # perform operation + 80002560: 28aea733 xperm4 x14,x29,x10 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002564: 0008b203 ld x4,0(x17) + 80002568: 00e20c63 beq x4,x14,80002580 + 8000256c: 794052ef jal x5,80007d00 + 80002570: 80002560 .word 0x80002560 + 80002574: 00000000 .word 0x00000000 + 80002578: 80011457 .word 0x80011457 + 8000257c: 00000000 .word 0x00000000 + 80002580: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8000000000000000 + 80002584: 00033183 ld x3,0(x6) + 80002588: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7ffffffffffffffe + 8000258c: 00033503 ld x10,0(x6) + 80002590: 00830313 addi x6,x6,8 + +0000000080002594 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + xperm4 x31, x3, x10 # perform operation + 80002594: 28a1afb3 xperm4 x31,x3,x10 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 80002598: 0008b203 ld x4,0(x17) + 8000259c: 01f20c63 beq x4,x31,800025b4 + 800025a0: 760052ef jal x5,80007d00 + 800025a4: 80002594 .word 0x80002594 + 800025a8: 00000000 .word 0x00000000 + 800025ac: 800114c8 .word 0x800114c8 + 800025b0: 00000000 .word 0x00000000 + 800025b4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8000000000000000 + 800025b8: 00033603 ld x12,0(x6) + 800025bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xffffffffffffffff + 800025c0: 00033583 ld x11,0(x6) + 800025c4: 00830313 addi x6,x6,8 + +00000000800025c8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + xperm4 x27, x12, x11 # perform operation + 800025c8: 28b62db3 xperm4 x27,x12,x11 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025cc: 0008b203 ld x4,0(x17) + 800025d0: 01b20c63 beq x4,x27,800025e8 + 800025d4: 72c052ef jal x5,80007d00 + 800025d8: 800025c8 .word 0x800025c8 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 80011539 .word 0x80011539 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8000000000000000 + 800025ec: 00033f83 ld x31,0(x6) + 800025f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xfffffffffffffffe + 800025f4: 00033a83 ld x21,0(x6) + 800025f8: 00830313 addi x6,x6,8 + +00000000800025fc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + xperm4 x29, x31, x21 # perform operation + 800025fc: 295faeb3 xperm4 x29,x31,x21 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002600: 0008b203 ld x4,0(x17) + 80002604: 01d20c63 beq x4,x29,8000261c + 80002608: 6f8052ef jal x5,80007d00 + 8000260c: 800025fc .word 0x800025fc + 80002610: 00000000 .word 0x00000000 + 80002614: 800115aa .word 0x800115aa + 80002618: 00000000 .word 0x00000000 + 8000261c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 80002620: 00033583 ld x11,0(x6) + 80002624: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80002628: 00033683 ld x13,0(x6) + 8000262c: 00830313 addi x6,x6,8 + +0000000080002630 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + xperm4 x1, x11, x13 # perform operation + 80002630: 28d5a0b3 xperm4 x1,x11,x13 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002634: 0008b203 ld x4,0(x17) + 80002638: 00120c63 beq x4,x1,80002650 + 8000263c: 6c4052ef jal x5,80007d00 + 80002640: 80002630 .word 0x80002630 + 80002644: 00000000 .word 0x00000000 + 80002648: 8001161b .word 0x8001161b + 8000264c: 00000000 .word 0x00000000 + 80002650: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 80002654: 00033583 ld x11,0(x6) + 80002658: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 8000265c: 00033f03 ld x30,0(x6) + 80002660: 00830313 addi x6,x6,8 + +0000000080002664 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x25, x11, x30 # perform operation + 80002664: 29e5acb3 xperm4 x25,x11,x30 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002668: 0008b203 ld x4,0(x17) + 8000266c: 01920c63 beq x4,x25,80002684 + 80002670: 690052ef jal x5,80007d00 + 80002674: 80002664 .word 0x80002664 + 80002678: 00000000 .word 0x00000000 + 8000267c: 8001168c .word 0x8001168c + 80002680: 00000000 .word 0x00000000 + 80002684: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x8000000000000000 + 80002688: 00033703 ld x14,0(x6) + 8000268c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5555555555555555 + 80002690: 00033b03 ld x22,0(x6) + 80002694: 00830313 addi x6,x6,8 + +0000000080002698 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + xperm4 x11, x14, x22 # perform operation + 80002698: 296725b3 xperm4 x11,x14,x22 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 8000269c: 0008b203 ld x4,0(x17) + 800026a0: 00b20c63 beq x4,x11,800026b8 + 800026a4: 65c052ef jal x5,80007d00 + 800026a8: 80002698 .word 0x80002698 + 800026ac: 00000000 .word 0x00000000 + 800026b0: 800116fd .word 0x800116fd + 800026b4: 00000000 .word 0x00000000 + 800026b8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 800026bc: 00033583 ld x11,0(x6) + 800026c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x00000000ffffffff + 800026c4: 00033b83 ld x23,0(x6) + 800026c8: 00830313 addi x6,x6,8 + +00000000800026cc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + xperm4 x19, x11, x23 # perform operation + 800026cc: 2975a9b3 xperm4 x19,x11,x23 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026d0: 0008b203 ld x4,0(x17) + 800026d4: 01320c63 beq x4,x19,800026ec + 800026d8: 628052ef jal x5,80007d00 + 800026dc: 800026cc .word 0x800026cc + 800026e0: 00000000 .word 0x00000000 + 800026e4: 8001176e .word 0x8001176e + 800026e8: 00000000 .word 0x00000000 + 800026ec: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8000000000000000 + 800026f0: 00033983 ld x19,0(x6) + 800026f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x00000000fffffffe + 800026f8: 00033103 ld x2,0(x6) + 800026fc: 00830313 addi x6,x6,8 + +0000000080002700 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + xperm4 x8, x19, x2 # perform operation + 80002700: 2829a433 xperm4 x8,x19,x2 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002704: 0008b203 ld x4,0(x17) + 80002708: 00820c63 beq x4,x8,80002720 + 8000270c: 5f4052ef jal x5,80007d00 + 80002710: 80002700 .word 0x80002700 + 80002714: 00000000 .word 0x00000000 + 80002718: 800117d7 .word 0x800117d7 + 8000271c: 00000000 .word 0x00000000 + 80002720: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8000000000000000 + 80002724: 00033d83 ld x27,0(x6) + 80002728: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x0000000100000000 + 8000272c: 00033e03 ld x28,0(x6) + 80002730: 00830313 addi x6,x6,8 + +0000000080002734 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + xperm4 x14, x27, x28 # perform operation + 80002734: 29cda733 xperm4 x14,x27,x28 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002738: 0008b203 ld x4,0(x17) + 8000273c: 00e20c63 beq x4,x14,80002754 + 80002740: 5c0052ef jal x5,80007d00 + 80002744: 80002734 .word 0x80002734 + 80002748: 00000000 .word 0x00000000 + 8000274c: 80011840 .word 0x80011840 + 80002750: 00000000 .word 0x00000000 + 80002754: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 80002758: 00033583 ld x11,0(x6) + 8000275c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000100000001 + 80002760: 00033783 ld x15,0(x6) + 80002764: 00830313 addi x6,x6,8 + +0000000080002768 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + xperm4 x14, x11, x15 # perform operation + 80002768: 28f5a733 xperm4 x14,x11,x15 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 8000276c: 0008b203 ld x4,0(x17) + 80002770: 00e20c63 beq x4,x14,80002788 + 80002774: 58c052ef jal x5,80007d00 + 80002778: 80002768 .word 0x80002768 + 8000277c: 00000000 .word 0x00000000 + 80002780: 800118aa .word 0x800118aa + 80002784: 00000000 .word 0x00000000 + 80002788: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8000000000000001 + 8000278c: 00033d83 ld x27,0(x6) + 80002790: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000000000000 + 80002794: 00033703 ld x14,0(x6) + 80002798: 00830313 addi x6,x6,8 + +000000008000279c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + xperm4 x21, x27, x14 # perform operation + 8000279c: 28edaab3 xperm4 x21,x27,x14 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027a0: 0008b203 ld x4,0(x17) + 800027a4: 01520c63 beq x4,x21,800027bc + 800027a8: 558052ef jal x5,80007d00 + 800027ac: 8000279c .word 0x8000279c + 800027b0: 00000000 .word 0x00000000 + 800027b4: 80011914 .word 0x80011914 + 800027b8: 00000000 .word 0x00000000 + 800027bc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x8000000000000001 + 800027c0: 00033903 ld x18,0(x6) + 800027c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000000000001 + 800027c8: 00033403 ld x8,0(x6) + 800027cc: 00830313 addi x6,x6,8 + +00000000800027d0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + xperm4 x2, x18, x8 # perform operation + 800027d0: 28892133 xperm4 x2,x18,x8 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027d4: 0008b203 ld x4,0(x17) + 800027d8: 00220c63 beq x4,x2,800027f0 + 800027dc: 524052ef jal x5,80007d00 + 800027e0: 800027d0 .word 0x800027d0 + 800027e4: 00000000 .word 0x00000000 + 800027e8: 80011976 .word 0x80011976 + 800027ec: 00000000 .word 0x00000000 + 800027f0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x8000000000000001 + 800027f4: 00033503 ld x10,0(x6) + 800027f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0000000000000002 + 800027fc: 00033b03 ld x22,0(x6) + 80002800: 00830313 addi x6,x6,8 + +0000000080002804 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + xperm4 x12, x10, x22 # perform operation + 80002804: 29652633 xperm4 x12,x10,x22 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002808: 0008b203 ld x4,0(x17) + 8000280c: 00c20c63 beq x4,x12,80002824 + 80002810: 4f0052ef jal x5,80007d00 + 80002814: 80002804 .word 0x80002804 + 80002818: 00000000 .word 0x00000000 + 8000281c: 800119d8 .word 0x800119d8 + 80002820: 00000000 .word 0x00000000 + 80002824: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x8000000000000001 + 80002828: 00033a03 ld x20,0(x6) + 8000282c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x8000000000000000 + 80002830: 00033c83 ld x25,0(x6) + 80002834: 00830313 addi x6,x6,8 + +0000000080002838 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + xperm4 x12, x20, x25 # perform operation + 80002838: 299a2633 xperm4 x12,x20,x25 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 8000283c: 0008b203 ld x4,0(x17) + 80002840: 00c20c63 beq x4,x12,80002858 + 80002844: 4bc052ef jal x5,80007d00 + 80002848: 80002838 .word 0x80002838 + 8000284c: 00000000 .word 0x00000000 + 80002850: 80011a3a .word 0x80011a3a + 80002854: 00000000 .word 0x00000000 + 80002858: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x8000000000000001 + 8000285c: 00033a03 ld x20,0(x6) + 80002860: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 80002864: 00033383 ld x7,0(x6) + 80002868: 00830313 addi x6,x6,8 + +000000008000286c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + xperm4 x21, x20, x7 # perform operation + 8000286c: 287a2ab3 xperm4 x21,x20,x7 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002870: 0008b203 ld x4,0(x17) + 80002874: 01520c63 beq x4,x21,8000288c + 80002878: 488052ef jal x5,80007d00 + 8000287c: 8000286c .word 0x8000286c + 80002880: 00000000 .word 0x00000000 + 80002884: 80011aab .word 0x80011aab + 80002888: 00000000 .word 0x00000000 + 8000288c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8000000000000001 + 80002890: 00033603 ld x12,0(x6) + 80002894: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x7fffffffffffffff + 80002898: 00033083 ld x1,0(x6) + 8000289c: 00830313 addi x6,x6,8 + +00000000800028a0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + xperm4 x14, x12, x1 # perform operation + 800028a0: 28162733 xperm4 x14,x12,x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028a4: 0008b203 ld x4,0(x17) + 800028a8: 00e20c63 beq x4,x14,800028c0 + 800028ac: 454052ef jal x5,80007d00 + 800028b0: 800028a0 .word 0x800028a0 + 800028b4: 00000000 .word 0x00000000 + 800028b8: 80011b1c .word 0x80011b1c + 800028bc: 00000000 .word 0x00000000 + 800028c0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8000000000000001 + 800028c4: 00033d83 ld x27,0(x6) + 800028c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7ffffffffffffffe + 800028cc: 00033403 ld x8,0(x6) + 800028d0: 00830313 addi x6,x6,8 + +00000000800028d4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + xperm4 x25, x27, x8 # perform operation + 800028d4: 288dacb3 xperm4 x25,x27,x8 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028d8: 0008b203 ld x4,0(x17) + 800028dc: 01920c63 beq x4,x25,800028f4 + 800028e0: 420052ef jal x5,80007d00 + 800028e4: 800028d4 .word 0x800028d4 + 800028e8: 00000000 .word 0x00000000 + 800028ec: 80011b8d .word 0x80011b8d + 800028f0: 00000000 .word 0x00000000 + 800028f4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8000000000000001 + 800028f8: 00033983 ld x19,0(x6) + 800028fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xffffffffffffffff + 80002900: 00033c83 ld x25,0(x6) + 80002904: 00830313 addi x6,x6,8 + +0000000080002908 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + xperm4 x14, x19, x25 # perform operation + 80002908: 2999a733 xperm4 x14,x19,x25 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 8000290c: 0008b203 ld x4,0(x17) + 80002910: 00e20c63 beq x4,x14,80002928 + 80002914: 3ec052ef jal x5,80007d00 + 80002918: 80002908 .word 0x80002908 + 8000291c: 00000000 .word 0x00000000 + 80002920: 80011bfe .word 0x80011bfe + 80002924: 00000000 .word 0x00000000 + 80002928: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8000000000000001 + 8000292c: 00033a83 ld x21,0(x6) + 80002930: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xfffffffffffffffe + 80002934: 00033b03 ld x22,0(x6) + 80002938: 00830313 addi x6,x6,8 + +000000008000293c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + xperm4 x14, x21, x22 # perform operation + 8000293c: 296aa733 xperm4 x14,x21,x22 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002940: 0008b203 ld x4,0(x17) + 80002944: 00e20c63 beq x4,x14,8000295c + 80002948: 3b8052ef jal x5,80007d00 + 8000294c: 8000293c .word 0x8000293c + 80002950: 00000000 .word 0x00000000 + 80002954: 80011c6f .word 0x80011c6f + 80002958: 00000000 .word 0x00000000 + 8000295c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8000000000000001 + 80002960: 00033683 ld x13,0(x6) + 80002964: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80002968: 00033f03 ld x30,0(x6) + 8000296c: 00830313 addi x6,x6,8 + +0000000080002970 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + xperm4 x15, x13, x30 # perform operation + 80002970: 29e6a7b3 xperm4 x15,x13,x30 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002974: 0008b203 ld x4,0(x17) + 80002978: 00f20c63 beq x4,x15,80002990 + 8000297c: 384052ef jal x5,80007d00 + 80002980: 80002970 .word 0x80002970 + 80002984: 00000000 .word 0x00000000 + 80002988: 80011ce0 .word 0x80011ce0 + 8000298c: 00000000 .word 0x00000000 + 80002990: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x8000000000000001 + 80002994: 00033d03 ld x26,0(x6) + 80002998: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 8000299c: 00033f03 ld x30,0(x6) + 800029a0: 00830313 addi x6,x6,8 + +00000000800029a4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x15, x26, x30 # perform operation + 800029a4: 29ed27b3 xperm4 x15,x26,x30 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029a8: 0008b203 ld x4,0(x17) + 800029ac: 00f20c63 beq x4,x15,800029c4 + 800029b0: 350052ef jal x5,80007d00 + 800029b4: 800029a4 .word 0x800029a4 + 800029b8: 00000000 .word 0x00000000 + 800029bc: 80011d51 .word 0x80011d51 + 800029c0: 00000000 .word 0x00000000 + 800029c4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8000000000000001 + 800029c8: 00033f83 ld x31,0(x6) + 800029cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x5555555555555555 + 800029d0: 00033a83 ld x21,0(x6) + 800029d4: 00830313 addi x6,x6,8 + +00000000800029d8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + xperm4 x7, x31, x21 # perform operation + 800029d8: 295fa3b3 xperm4 x7,x31,x21 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029dc: 0008b203 ld x4,0(x17) + 800029e0: 00720c63 beq x4,x7,800029f8 + 800029e4: 31c052ef jal x5,80007d00 + 800029e8: 800029d8 .word 0x800029d8 + 800029ec: 00000000 .word 0x00000000 + 800029f0: 80011dc2 .word 0x80011dc2 + 800029f4: 00000000 .word 0x00000000 + 800029f8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x8000000000000001 + 800029fc: 00033103 ld x2,0(x6) + 80002a00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x00000000ffffffff + 80002a04: 00033a83 ld x21,0(x6) + 80002a08: 00830313 addi x6,x6,8 + +0000000080002a0c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + xperm4 x27, x2, x21 # perform operation + 80002a0c: 29512db3 xperm4 x27,x2,x21 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a10: 0008b203 ld x4,0(x17) + 80002a14: 01b20c63 beq x4,x27,80002a2c + 80002a18: 2e8052ef jal x5,80007d00 + 80002a1c: 80002a0c .word 0x80002a0c + 80002a20: 00000000 .word 0x00000000 + 80002a24: 80011e33 .word 0x80011e33 + 80002a28: 00000000 .word 0x00000000 + 80002a2c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8000000000000001 + 80002a30: 00033183 ld x3,0(x6) + 80002a34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x00000000fffffffe + 80002a38: 00033e03 ld x28,0(x6) + 80002a3c: 00830313 addi x6,x6,8 + +0000000080002a40 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + xperm4 x19, x3, x28 # perform operation + 80002a40: 29c1a9b3 xperm4 x19,x3,x28 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a44: 0008b203 ld x4,0(x17) + 80002a48: 01320c63 beq x4,x19,80002a60 + 80002a4c: 2b4052ef jal x5,80007d00 + 80002a50: 80002a40 .word 0x80002a40 + 80002a54: 00000000 .word 0x00000000 + 80002a58: 80011e9c .word 0x80011e9c + 80002a5c: 00000000 .word 0x00000000 + 80002a60: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8000000000000001 + 80002a64: 00033a83 ld x21,0(x6) + 80002a68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0000000100000000 + 80002a6c: 00033d83 ld x27,0(x6) + 80002a70: 00830313 addi x6,x6,8 + +0000000080002a74 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + xperm4 x31, x21, x27 # perform operation + 80002a74: 29baafb3 xperm4 x31,x21,x27 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a78: 0008b203 ld x4,0(x17) + 80002a7c: 01f20c63 beq x4,x31,80002a94 + 80002a80: 280052ef jal x5,80007d00 + 80002a84: 80002a74 .word 0x80002a74 + 80002a88: 00000000 .word 0x00000000 + 80002a8c: 80011f05 .word 0x80011f05 + 80002a90: 00000000 .word 0x00000000 + 80002a94: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8000000000000001 + 80002a98: 00033683 ld x13,0(x6) + 80002a9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000100000001 + 80002aa0: 00033d03 ld x26,0(x6) + 80002aa4: 00830313 addi x6,x6,8 + +0000000080002aa8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + xperm4 x3, x13, x26 # perform operation + 80002aa8: 29a6a1b3 xperm4 x3,x13,x26 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002aac: 0008b203 ld x4,0(x17) + 80002ab0: 00320c63 beq x4,x3,80002ac8 + 80002ab4: 24c052ef jal x5,80007d00 + 80002ab8: 80002aa8 .word 0x80002aa8 + 80002abc: 00000000 .word 0x00000000 + 80002ac0: 80011f6f .word 0x80011f6f + 80002ac4: 00000000 .word 0x00000000 + 80002ac8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002acc: 00033b03 ld x22,0(x6) + 80002ad0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0000000000000000 + 80002ad4: 00033c83 ld x25,0(x6) + 80002ad8: 00830313 addi x6,x6,8 + +0000000080002adc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + xperm4 x21, x22, x25 # perform operation + 80002adc: 299b2ab3 xperm4 x21,x22,x25 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002ae0: 0008b203 ld x4,0(x17) + 80002ae4: 01520c63 beq x4,x21,80002afc + 80002ae8: 218052ef jal x5,80007d00 + 80002aec: 80002adc .word 0x80002adc + 80002af0: 00000000 .word 0x00000000 + 80002af4: 80011fd9 .word 0x80011fd9 + 80002af8: 00000000 .word 0x00000000 + 80002afc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002b00: 00033383 ld x7,0(x6) + 80002b04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000000000001 + 80002b08: 00033483 ld x9,0(x6) + 80002b0c: 00830313 addi x6,x6,8 + +0000000080002b10 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + xperm4 x21, x7, x9 # perform operation + 80002b10: 2893aab3 xperm4 x21,x7,x9 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b14: 0008b203 ld x4,0(x17) + 80002b18: 01520c63 beq x4,x21,80002b30 + 80002b1c: 1e4052ef jal x5,80007d00 + 80002b20: 80002b10 .word 0x80002b10 + 80002b24: 00000000 .word 0x00000000 + 80002b28: 8001203b .word 0x8001203b + 80002b2c: 00000000 .word 0x00000000 + 80002b30: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002b34: 00033e83 ld x29,0(x6) + 80002b38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x0000000000000002 + 80002b3c: 00033a03 ld x20,0(x6) + 80002b40: 00830313 addi x6,x6,8 + +0000000080002b44 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + xperm4 x7, x29, x20 # perform operation + 80002b44: 294ea3b3 xperm4 x7,x29,x20 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b48: 0008b203 ld x4,0(x17) + 80002b4c: 00720c63 beq x4,x7,80002b64 + 80002b50: 1b0052ef jal x5,80007d00 + 80002b54: 80002b44 .word 0x80002b44 + 80002b58: 00000000 .word 0x00000000 + 80002b5c: 8001209d .word 0x8001209d + 80002b60: 00000000 .word 0x00000000 + 80002b64: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x7fffffffffffffff + 80002b68: 00033403 ld x8,0(x6) + 80002b6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x8000000000000000 + 80002b70: 00033083 ld x1,0(x6) + 80002b74: 00830313 addi x6,x6,8 + +0000000080002b78 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + xperm4 x9, x8, x1 # perform operation + 80002b78: 281424b3 xperm4 x9,x8,x1 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b7c: 0008b203 ld x4,0(x17) + 80002b80: 00920c63 beq x4,x9,80002b98 + 80002b84: 17c052ef jal x5,80007d00 + 80002b88: 80002b78 .word 0x80002b78 + 80002b8c: 00000000 .word 0x00000000 + 80002b90: 800120ff .word 0x800120ff + 80002b94: 00000000 .word 0x00000000 + 80002b98: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002b9c: 00033683 ld x13,0(x6) + 80002ba0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8000000000000001 + 80002ba4: 00033603 ld x12,0(x6) + 80002ba8: 00830313 addi x6,x6,8 + +0000000080002bac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + xperm4 x28, x13, x12 # perform operation + 80002bac: 28c6ae33 xperm4 x28,x13,x12 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bb0: 0008b203 ld x4,0(x17) + 80002bb4: 01c20c63 beq x4,x28,80002bcc + 80002bb8: 148052ef jal x5,80007d00 + 80002bbc: 80002bac .word 0x80002bac + 80002bc0: 00000000 .word 0x00000000 + 80002bc4: 80012170 .word 0x80012170 + 80002bc8: 00000000 .word 0x00000000 + 80002bcc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002bd0: 00033683 ld x13,0(x6) + 80002bd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x7fffffffffffffff + 80002bd8: 00033103 ld x2,0(x6) + 80002bdc: 00830313 addi x6,x6,8 + +0000000080002be0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + xperm4 x18, x13, x2 # perform operation + 80002be0: 2826a933 xperm4 x18,x13,x2 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002be4: 0008b203 ld x4,0(x17) + 80002be8: 01220c63 beq x4,x18,80002c00 + 80002bec: 114052ef jal x5,80007d00 + 80002bf0: 80002be0 .word 0x80002be0 + 80002bf4: 00000000 .word 0x00000000 + 80002bf8: 800121e1 .word 0x800121e1 + 80002bfc: 00000000 .word 0x00000000 + 80002c00: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002c04: 00033083 ld x1,0(x6) + 80002c08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80002c0c: 00033e83 ld x29,0(x6) + 80002c10: 00830313 addi x6,x6,8 + +0000000080002c14 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + xperm4 x23, x1, x29 # perform operation + 80002c14: 29d0abb3 xperm4 x23,x1,x29 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c18: 0008b203 ld x4,0(x17) + 80002c1c: 01720c63 beq x4,x23,80002c34 + 80002c20: 0e0052ef jal x5,80007d00 + 80002c24: 80002c14 .word 0x80002c14 + 80002c28: 00000000 .word 0x00000000 + 80002c2c: 80012252 .word 0x80012252 + 80002c30: 00000000 .word 0x00000000 + 80002c34: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c38: 00033a83 ld x21,0(x6) + 80002c3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xffffffffffffffff + 80002c40: 00033b03 ld x22,0(x6) + 80002c44: 00830313 addi x6,x6,8 + +0000000080002c48 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + xperm4 x2, x21, x22 # perform operation + 80002c48: 296aa133 xperm4 x2,x21,x22 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c4c: 0008b203 ld x4,0(x17) + 80002c50: 00220c63 beq x4,x2,80002c68 + 80002c54: 0ac052ef jal x5,80007d00 + 80002c58: 80002c48 .word 0x80002c48 + 80002c5c: 00000000 .word 0x00000000 + 80002c60: 800122c3 .word 0x800122c3 + 80002c64: 00000000 .word 0x00000000 + 80002c68: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002c6c: 00033503 ld x10,0(x6) + 80002c70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xfffffffffffffffe + 80002c74: 00033a03 ld x20,0(x6) + 80002c78: 00830313 addi x6,x6,8 + +0000000080002c7c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + xperm4 x1, x10, x20 # perform operation + 80002c7c: 294520b3 xperm4 x1,x10,x20 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c80: 0008b203 ld x4,0(x17) + 80002c84: 00120c63 beq x4,x1,80002c9c + 80002c88: 078052ef jal x5,80007d00 + 80002c8c: 80002c7c .word 0x80002c7c + 80002c90: 00000000 .word 0x00000000 + 80002c94: 80012334 .word 0x80012334 + 80002c98: 00000000 .word 0x00000000 + 80002c9c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002ca0: 00033f83 ld x31,0(x6) + 80002ca4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80002ca8: 00033383 ld x7,0(x6) + 80002cac: 00830313 addi x6,x6,8 + +0000000080002cb0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + xperm4 x11, x31, x7 # perform operation + 80002cb0: 287fa5b3 xperm4 x11,x31,x7 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cb4: 0008b203 ld x4,0(x17) + 80002cb8: 00b20c63 beq x4,x11,80002cd0 + 80002cbc: 044052ef jal x5,80007d00 + 80002cc0: 80002cb0 .word 0x80002cb0 + 80002cc4: 00000000 .word 0x00000000 + 80002cc8: 800123a5 .word 0x800123a5 + 80002ccc: 00000000 .word 0x00000000 + 80002cd0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002cd4: 00033483 ld x9,0(x6) + 80002cd8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80002cdc: 00033803 ld x16,0(x6) + 80002ce0: 00830313 addi x6,x6,8 + +0000000080002ce4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x24, x9, x16 # perform operation + 80002ce4: 2904ac33 xperm4 x24,x9,x16 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002ce8: 0008b203 ld x4,0(x17) + 80002cec: 01820c63 beq x4,x24,80002d04 + 80002cf0: 010052ef jal x5,80007d00 + 80002cf4: 80002ce4 .word 0x80002ce4 + 80002cf8: 00000000 .word 0x00000000 + 80002cfc: 80012416 .word 0x80012416 + 80002d00: 00000000 .word 0x00000000 + 80002d04: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002d08: 00033c83 ld x25,0(x6) + 80002d0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x5555555555555555 + 80002d10: 00033d03 ld x26,0(x6) + 80002d14: 00830313 addi x6,x6,8 + +0000000080002d18 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + xperm4 x29, x25, x26 # perform operation + 80002d18: 29acaeb3 xperm4 x29,x25,x26 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d1c: 0008b203 ld x4,0(x17) + 80002d20: 01d20c63 beq x4,x29,80002d38 + 80002d24: 7dd042ef jal x5,80007d00 + 80002d28: 80002d18 .word 0x80002d18 + 80002d2c: 00000000 .word 0x00000000 + 80002d30: 80012487 .word 0x80012487 + 80002d34: 00000000 .word 0x00000000 + 80002d38: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002d3c: 00033703 ld x14,0(x6) + 80002d40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x00000000ffffffff + 80002d44: 00033583 ld x11,0(x6) + 80002d48: 00830313 addi x6,x6,8 + +0000000080002d4c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + xperm4 x10, x14, x11 # perform operation + 80002d4c: 28b72533 xperm4 x10,x14,x11 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d50: 0008b203 ld x4,0(x17) + 80002d54: 00a20c63 beq x4,x10,80002d6c + 80002d58: 7a9042ef jal x5,80007d00 + 80002d5c: 80002d4c .word 0x80002d4c + 80002d60: 00000000 .word 0x00000000 + 80002d64: 800124f8 .word 0x800124f8 + 80002d68: 00000000 .word 0x00000000 + 80002d6c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002d70: 00033b03 ld x22,0(x6) + 80002d74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x00000000fffffffe + 80002d78: 00033403 ld x8,0(x6) + 80002d7c: 00830313 addi x6,x6,8 + +0000000080002d80 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + xperm4 x24, x22, x8 # perform operation + 80002d80: 288b2c33 xperm4 x24,x22,x8 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d84: 0008b203 ld x4,0(x17) + 80002d88: 01820c63 beq x4,x24,80002da0 + 80002d8c: 775042ef jal x5,80007d00 + 80002d90: 80002d80 .word 0x80002d80 + 80002d94: 00000000 .word 0x00000000 + 80002d98: 80012561 .word 0x80012561 + 80002d9c: 00000000 .word 0x00000000 + 80002da0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002da4: 00033c83 ld x25,0(x6) + 80002da8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000100000000 + 80002dac: 00033183 ld x3,0(x6) + 80002db0: 00830313 addi x6,x6,8 + +0000000080002db4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + xperm4 x9, x25, x3 # perform operation + 80002db4: 283ca4b3 xperm4 x9,x25,x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002db8: 0008b203 ld x4,0(x17) + 80002dbc: 00920c63 beq x4,x9,80002dd4 + 80002dc0: 741042ef jal x5,80007d00 + 80002dc4: 80002db4 .word 0x80002db4 + 80002dc8: 00000000 .word 0x00000000 + 80002dcc: 800125ca .word 0x800125ca + 80002dd0: 00000000 .word 0x00000000 + 80002dd4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002dd8: 00033603 ld x12,0(x6) + 80002ddc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000100000001 + 80002de0: 00033803 ld x16,0(x6) + 80002de4: 00830313 addi x6,x6,8 + +0000000080002de8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + xperm4 x8, x12, x16 # perform operation + 80002de8: 29062433 xperm4 x8,x12,x16 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002dec: 0008b203 ld x4,0(x17) + 80002df0: 00820c63 beq x4,x8,80002e08 + 80002df4: 70d042ef jal x5,80007d00 + 80002df8: 80002de8 .word 0x80002de8 + 80002dfc: 00000000 .word 0x00000000 + 80002e00: 80012634 .word 0x80012634 + 80002e04: 00000000 .word 0x00000000 + 80002e08: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002e0c: 00033103 ld x2,0(x6) + 80002e10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0000000000000000 + 80002e14: 00033c83 ld x25,0(x6) + 80002e18: 00830313 addi x6,x6,8 + +0000000080002e1c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + xperm4 x20, x2, x25 # perform operation + 80002e1c: 29912a33 xperm4 x20,x2,x25 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e20: 0008b203 ld x4,0(x17) + 80002e24: 01420c63 beq x4,x20,80002e3c + 80002e28: 6d9042ef jal x5,80007d00 + 80002e2c: 80002e1c .word 0x80002e1c + 80002e30: 00000000 .word 0x00000000 + 80002e34: 8001269e .word 0x8001269e + 80002e38: 00000000 .word 0x00000000 + 80002e3c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80002e40: 00033f03 ld x30,0(x6) + 80002e44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000000000001 + 80002e48: 00033803 ld x16,0(x6) + 80002e4c: 00830313 addi x6,x6,8 + +0000000080002e50 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + xperm4 x20, x30, x16 # perform operation + 80002e50: 290f2a33 xperm4 x20,x30,x16 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e54: 0008b203 ld x4,0(x17) + 80002e58: 01420c63 beq x4,x20,80002e70 + 80002e5c: 6a5042ef jal x5,80007d00 + 80002e60: 80002e50 .word 0x80002e50 + 80002e64: 00000000 .word 0x00000000 + 80002e68: 80012700 .word 0x80012700 + 80002e6c: 00000000 .word 0x00000000 + 80002e70: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002e74: 00033a03 ld x20,0(x6) + 80002e78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0000000000000002 + 80002e7c: 00033603 ld x12,0(x6) + 80002e80: 00830313 addi x6,x6,8 + +0000000080002e84 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + xperm4 x25, x20, x12 # perform operation + 80002e84: 28ca2cb3 xperm4 x25,x20,x12 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e88: 0008b203 ld x4,0(x17) + 80002e8c: 01920c63 beq x4,x25,80002ea4 + 80002e90: 671042ef jal x5,80007d00 + 80002e94: 80002e84 .word 0x80002e84 + 80002e98: 00000000 .word 0x00000000 + 80002e9c: 80012762 .word 0x80012762 + 80002ea0: 00000000 .word 0x00000000 + 80002ea4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002ea8: 00033583 ld x11,0(x6) + 80002eac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x8000000000000000 + 80002eb0: 00033903 ld x18,0(x6) + 80002eb4: 00830313 addi x6,x6,8 + +0000000080002eb8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + xperm4 x13, x11, x18 # perform operation + 80002eb8: 2925a6b3 xperm4 x13,x11,x18 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ebc: 0008b203 ld x4,0(x17) + 80002ec0: 00d20c63 beq x4,x13,80002ed8 + 80002ec4: 63d042ef jal x5,80007d00 + 80002ec8: 80002eb8 .word 0x80002eb8 + 80002ecc: 00000000 .word 0x00000000 + 80002ed0: 800127c4 .word 0x800127c4 + 80002ed4: 00000000 .word 0x00000000 + 80002ed8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80002edc: 00033a83 ld x21,0(x6) + 80002ee0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8000000000000001 + 80002ee4: 00033d03 ld x26,0(x6) + 80002ee8: 00830313 addi x6,x6,8 + +0000000080002eec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + xperm4 x15, x21, x26 # perform operation + 80002eec: 29aaa7b3 xperm4 x15,x21,x26 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002ef0: 0008b203 ld x4,0(x17) + 80002ef4: 00f20c63 beq x4,x15,80002f0c + 80002ef8: 609042ef jal x5,80007d00 + 80002efc: 80002eec .word 0x80002eec + 80002f00: 00000000 .word 0x00000000 + 80002f04: 80012835 .word 0x80012835 + 80002f08: 00000000 .word 0x00000000 + 80002f0c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002f10: 00033d83 ld x27,0(x6) + 80002f14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x7fffffffffffffff + 80002f18: 00033b83 ld x23,0(x6) + 80002f1c: 00830313 addi x6,x6,8 + +0000000080002f20 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + xperm4 x25, x27, x23 # perform operation + 80002f20: 297dacb3 xperm4 x25,x27,x23 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f24: 0008b203 ld x4,0(x17) + 80002f28: 01920c63 beq x4,x25,80002f40 + 80002f2c: 5d5042ef jal x5,80007d00 + 80002f30: 80002f20 .word 0x80002f20 + 80002f34: 00000000 .word 0x00000000 + 80002f38: 800128a6 .word 0x800128a6 + 80002f3c: 00000000 .word 0x00000000 + 80002f40: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80002f44: 00033e83 ld x29,0(x6) + 80002f48: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x7ffffffffffffffe + 80002f4c: 00033803 ld x16,0(x6) + 80002f50: 00830313 addi x6,x6,8 + +0000000080002f54 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + xperm4 x23, x29, x16 # perform operation + 80002f54: 290eabb3 xperm4 x23,x29,x16 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f58: 0008b203 ld x4,0(x17) + 80002f5c: 01720c63 beq x4,x23,80002f74 + 80002f60: 5a1042ef jal x5,80007d00 + 80002f64: 80002f54 .word 0x80002f54 + 80002f68: 00000000 .word 0x00000000 + 80002f6c: 80012917 .word 0x80012917 + 80002f70: 00000000 .word 0x00000000 + 80002f74: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80002f78: 00033083 ld x1,0(x6) + 80002f7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xffffffffffffffff + 80002f80: 00033603 ld x12,0(x6) + 80002f84: 00830313 addi x6,x6,8 + +0000000080002f88 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + xperm4 x19, x1, x12 # perform operation + 80002f88: 28c0a9b3 xperm4 x19,x1,x12 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f8c: 0008b203 ld x4,0(x17) + 80002f90: 01320c63 beq x4,x19,80002fa8 + 80002f94: 56d042ef jal x5,80007d00 + 80002f98: 80002f88 .word 0x80002f88 + 80002f9c: 00000000 .word 0x00000000 + 80002fa0: 80012988 .word 0x80012988 + 80002fa4: 00000000 .word 0x00000000 + 80002fa8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80002fac: 00033503 ld x10,0(x6) + 80002fb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfffffffffffffffe + 80002fb4: 00033583 ld x11,0(x6) + 80002fb8: 00830313 addi x6,x6,8 + +0000000080002fbc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + xperm4 x16, x10, x11 # perform operation + 80002fbc: 28b52833 xperm4 x16,x10,x11 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fc0: 0008b203 ld x4,0(x17) + 80002fc4: 01020c63 beq x4,x16,80002fdc + 80002fc8: 539042ef jal x5,80007d00 + 80002fcc: 80002fbc .word 0x80002fbc + 80002fd0: 00000000 .word 0x00000000 + 80002fd4: 800129f9 .word 0x800129f9 + 80002fd8: 00000000 .word 0x00000000 + 80002fdc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002fe0: 00033c83 ld x25,0(x6) + 80002fe4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80002fe8: 00033e83 ld x29,0(x6) + 80002fec: 00830313 addi x6,x6,8 + +0000000080002ff0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xperm4 x13, x25, x29 # perform operation + 80002ff0: 29dca6b3 xperm4 x13,x25,x29 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80002ff4: 0008b203 ld x4,0(x17) + 80002ff8: 00d20c63 beq x4,x13,80003010 + 80002ffc: 505042ef jal x5,80007d00 + 80003000: 80002ff0 .word 0x80002ff0 + 80003004: 00000000 .word 0x00000000 + 80003008: 80012a6a .word 0x80012a6a + 8000300c: 00000000 .word 0x00000000 + 80003010: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80003014: 00033603 ld x12,0(x6) + 80003018: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 8000301c: 00033c83 ld x25,0(x6) + 80003020: 00830313 addi x6,x6,8 + +0000000080003024 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x11, x12, x25 # perform operation + 80003024: 299625b3 xperm4 x11,x12,x25 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003028: 0008b203 ld x4,0(x17) + 8000302c: 00b20c63 beq x4,x11,80003044 + 80003030: 4d1042ef jal x5,80007d00 + 80003034: 80003024 .word 0x80003024 + 80003038: 00000000 .word 0x00000000 + 8000303c: 80012adb .word 0x80012adb + 80003040: 00000000 .word 0x00000000 + 80003044: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80003048: 00033a83 ld x21,0(x6) + 8000304c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5555555555555555 + 80003050: 00033603 ld x12,0(x6) + 80003054: 00830313 addi x6,x6,8 + +0000000080003058 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + xperm4 x9, x21, x12 # perform operation + 80003058: 28caa4b3 xperm4 x9,x21,x12 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 8000305c: 0008b203 ld x4,0(x17) + 80003060: 00920c63 beq x4,x9,80003078 + 80003064: 49d042ef jal x5,80007d00 + 80003068: 80003058 .word 0x80003058 + 8000306c: 00000000 .word 0x00000000 + 80003070: 80012b4c .word 0x80012b4c + 80003074: 00000000 .word 0x00000000 + 80003078: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x7ffffffffffffffe + 8000307c: 00033103 ld x2,0(x6) + 80003080: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x00000000ffffffff + 80003084: 00033483 ld x9,0(x6) + 80003088: 00830313 addi x6,x6,8 + +000000008000308c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + xperm4 x16, x2, x9 # perform operation + 8000308c: 28912833 xperm4 x16,x2,x9 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 80003090: 0008b203 ld x4,0(x17) + 80003094: 01020c63 beq x4,x16,800030ac + 80003098: 469042ef jal x5,80007d00 + 8000309c: 8000308c .word 0x8000308c + 800030a0: 00000000 .word 0x00000000 + 800030a4: 80012bbd .word 0x80012bbd + 800030a8: 00000000 .word 0x00000000 + 800030ac: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030b0: 00033683 ld x13,0(x6) + 800030b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x00000000fffffffe + 800030b8: 00033c83 ld x25,0(x6) + 800030bc: 00830313 addi x6,x6,8 + +00000000800030c0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + xperm4 x2, x13, x25 # perform operation + 800030c0: 2996a133 xperm4 x2,x13,x25 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030c4: 0008b203 ld x4,0(x17) + 800030c8: 00220c63 beq x4,x2,800030e0 + 800030cc: 435042ef jal x5,80007d00 + 800030d0: 800030c0 .word 0x800030c0 + 800030d4: 00000000 .word 0x00000000 + 800030d8: 80012c26 .word 0x80012c26 + 800030dc: 00000000 .word 0x00000000 + 800030e0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030e4: 00033683 ld x13,0(x6) + 800030e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000100000000 + 800030ec: 00033803 ld x16,0(x6) + 800030f0: 00830313 addi x6,x6,8 + +00000000800030f4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + xperm4 x20, x13, x16 # perform operation + 800030f4: 2906aa33 xperm4 x20,x13,x16 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 800030f8: 0008b203 ld x4,0(x17) + 800030fc: 01420c63 beq x4,x20,80003114 + 80003100: 401042ef jal x5,80007d00 + 80003104: 800030f4 .word 0x800030f4 + 80003108: 00000000 .word 0x00000000 + 8000310c: 80012c8f .word 0x80012c8f + 80003110: 00000000 .word 0x00000000 + 80003114: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80003118: 00033a83 ld x21,0(x6) + 8000311c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000100000001 + 80003120: 00033803 ld x16,0(x6) + 80003124: 00830313 addi x6,x6,8 + +0000000080003128 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + xperm4 x29, x21, x16 # perform operation + 80003128: 290aaeb3 xperm4 x29,x21,x16 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 8000312c: 0008b203 ld x4,0(x17) + 80003130: 01d20c63 beq x4,x29,80003148 + 80003134: 3cd042ef jal x5,80007d00 + 80003138: 80003128 .word 0x80003128 + 8000313c: 00000000 .word 0x00000000 + 80003140: 80012cf9 .word 0x80012cf9 + 80003144: 00000000 .word 0x00000000 + 80003148: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xffffffffffffffff + 8000314c: 00033483 ld x9,0(x6) + 80003150: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000000 + 80003154: 00033f83 ld x31,0(x6) + 80003158: 00830313 addi x6,x6,8 + +000000008000315c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + xperm4 x10, x9, x31 # perform operation + 8000315c: 29f4a533 xperm4 x10,x9,x31 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003160: 0008b203 ld x4,0(x17) + 80003164: 00a20c63 beq x4,x10,8000317c + 80003168: 399042ef jal x5,80007d00 + 8000316c: 8000315c .word 0x8000315c + 80003170: 00000000 .word 0x00000000 + 80003174: 80012d63 .word 0x80012d63 + 80003178: 00000000 .word 0x00000000 + 8000317c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xffffffffffffffff + 80003180: 00033083 ld x1,0(x6) + 80003184: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000000000001 + 80003188: 00033c03 ld x24,0(x6) + 8000318c: 00830313 addi x6,x6,8 + +0000000080003190 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + xperm4 x16, x1, x24 # perform operation + 80003190: 2980a833 xperm4 x16,x1,x24 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 80003194: 0008b203 ld x4,0(x17) + 80003198: 01020c63 beq x4,x16,800031b0 + 8000319c: 365042ef jal x5,80007d00 + 800031a0: 80003190 .word 0x80003190 + 800031a4: 00000000 .word 0x00000000 + 800031a8: 80012dc5 .word 0x80012dc5 + 800031ac: 00000000 .word 0x00000000 + 800031b0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xffffffffffffffff + 800031b4: 00033583 ld x11,0(x6) + 800031b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000000000002 + 800031bc: 00033c03 ld x24,0(x6) + 800031c0: 00830313 addi x6,x6,8 + +00000000800031c4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + xperm4 x22, x11, x24 # perform operation + 800031c4: 2985ab33 xperm4 x22,x11,x24 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031c8: 0008b203 ld x4,0(x17) + 800031cc: 01620c63 beq x4,x22,800031e4 + 800031d0: 331042ef jal x5,80007d00 + 800031d4: 800031c4 .word 0x800031c4 + 800031d8: 00000000 .word 0x00000000 + 800031dc: 80012e27 .word 0x80012e27 + 800031e0: 00000000 .word 0x00000000 + 800031e4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xffffffffffffffff + 800031e8: 00033b83 ld x23,0(x6) + 800031ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x8000000000000000 + 800031f0: 00033903 ld x18,0(x6) + 800031f4: 00830313 addi x6,x6,8 + +00000000800031f8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + xperm4 x24, x23, x18 # perform operation + 800031f8: 292bac33 xperm4 x24,x23,x18 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 800031fc: 0008b203 ld x4,0(x17) + 80003200: 01820c63 beq x4,x24,80003218 + 80003204: 2fd042ef jal x5,80007d00 + 80003208: 800031f8 .word 0x800031f8 + 8000320c: 00000000 .word 0x00000000 + 80003210: 80012e89 .word 0x80012e89 + 80003214: 00000000 .word 0x00000000 + 80003218: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xffffffffffffffff + 8000321c: 00033d03 ld x26,0(x6) + 80003220: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x8000000000000001 + 80003224: 00033703 ld x14,0(x6) + 80003228: 00830313 addi x6,x6,8 + +000000008000322c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + xperm4 x8, x26, x14 # perform operation + 8000322c: 28ed2433 xperm4 x8,x26,x14 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003230: 0008b203 ld x4,0(x17) + 80003234: 00820c63 beq x4,x8,8000324c + 80003238: 2c9042ef jal x5,80007d00 + 8000323c: 8000322c .word 0x8000322c + 80003240: 00000000 .word 0x00000000 + 80003244: 80012efa .word 0x80012efa + 80003248: 00000000 .word 0x00000000 + 8000324c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xffffffffffffffff + 80003250: 00033803 ld x16,0(x6) + 80003254: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7fffffffffffffff + 80003258: 00033c83 ld x25,0(x6) + 8000325c: 00830313 addi x6,x6,8 + +0000000080003260 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + xperm4 x20, x16, x25 # perform operation + 80003260: 29982a33 xperm4 x20,x16,x25 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003264: 0008b203 ld x4,0(x17) + 80003268: 01420c63 beq x4,x20,80003280 + 8000326c: 295042ef jal x5,80007d00 + 80003270: 80003260 .word 0x80003260 + 80003274: 00000000 .word 0x00000000 + 80003278: 80012f6b .word 0x80012f6b + 8000327c: 00000000 .word 0x00000000 + 80003280: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xffffffffffffffff + 80003284: 00033483 ld x9,0(x6) + 80003288: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7ffffffffffffffe + 8000328c: 00033f83 ld x31,0(x6) + 80003290: 00830313 addi x6,x6,8 + +0000000080003294 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + xperm4 x27, x9, x31 # perform operation + 80003294: 29f4adb3 xperm4 x27,x9,x31 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80003298: 0008b203 ld x4,0(x17) + 8000329c: 01b20c63 beq x4,x27,800032b4 + 800032a0: 261042ef jal x5,80007d00 + 800032a4: 80003294 .word 0x80003294 + 800032a8: 00000000 .word 0x00000000 + 800032ac: 80012fdc .word 0x80012fdc + 800032b0: 00000000 .word 0x00000000 + 800032b4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xffffffffffffffff + 800032b8: 00033a03 ld x20,0(x6) + 800032bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xffffffffffffffff + 800032c0: 00033b83 ld x23,0(x6) + 800032c4: 00830313 addi x6,x6,8 + +00000000800032c8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + xperm4 x24, x20, x23 # perform operation + 800032c8: 297a2c33 xperm4 x24,x20,x23 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032cc: 0008b203 ld x4,0(x17) + 800032d0: 01820c63 beq x4,x24,800032e8 + 800032d4: 22d042ef jal x5,80007d00 + 800032d8: 800032c8 .word 0x800032c8 + 800032dc: 00000000 .word 0x00000000 + 800032e0: 8001304d .word 0x8001304d + 800032e4: 00000000 .word 0x00000000 + 800032e8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xffffffffffffffff + 800032ec: 00033a83 ld x21,0(x6) + 800032f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xfffffffffffffffe + 800032f4: 00033103 ld x2,0(x6) + 800032f8: 00830313 addi x6,x6,8 + +00000000800032fc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + xperm4 x26, x21, x2 # perform operation + 800032fc: 282aad33 xperm4 x26,x21,x2 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003300: 0008b203 ld x4,0(x17) + 80003304: 01a20c63 beq x4,x26,8000331c + 80003308: 1f9042ef jal x5,80007d00 + 8000330c: 800032fc .word 0x800032fc + 80003310: 00000000 .word 0x00000000 + 80003314: 800130be .word 0x800130be + 80003318: 00000000 .word 0x00000000 + 8000331c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xffffffffffffffff + 80003320: 00033903 ld x18,0(x6) + 80003324: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003328: 00033103 ld x2,0(x6) + 8000332c: 00830313 addi x6,x6,8 + +0000000080003330 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + xperm4 x12, x18, x2 # perform operation + 80003330: 28292633 xperm4 x12,x18,x2 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003334: 0008b203 ld x4,0(x17) + 80003338: 00c20c63 beq x4,x12,80003350 + 8000333c: 1c5042ef jal x5,80007d00 + 80003340: 80003330 .word 0x80003330 + 80003344: 00000000 .word 0x00000000 + 80003348: 8001312f .word 0x8001312f + 8000334c: 00000000 .word 0x00000000 + 80003350: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xffffffffffffffff + 80003354: 00033803 ld x16,0(x6) + 80003358: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xaaaaaaaaaaaaaaaa + 8000335c: 00033b83 ld x23,0(x6) + 80003360: 00830313 addi x6,x6,8 + +0000000080003364 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x30, x16, x23 # perform operation + 80003364: 29782f33 xperm4 x30,x16,x23 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003368: 0008b203 ld x4,0(x17) + 8000336c: 01e20c63 beq x4,x30,80003384 + 80003370: 191042ef jal x5,80007d00 + 80003374: 80003364 .word 0x80003364 + 80003378: 00000000 .word 0x00000000 + 8000337c: 800131a0 .word 0x800131a0 + 80003380: 00000000 .word 0x00000000 + 80003384: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xffffffffffffffff + 80003388: 00033f03 ld x30,0(x6) + 8000338c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x5555555555555555 + 80003390: 00033503 ld x10,0(x6) + 80003394: 00830313 addi x6,x6,8 + +0000000080003398 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + xperm4 x13, x30, x10 # perform operation + 80003398: 28af26b3 xperm4 x13,x30,x10 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 8000339c: 0008b203 ld x4,0(x17) + 800033a0: 00d20c63 beq x4,x13,800033b8 + 800033a4: 15d042ef jal x5,80007d00 + 800033a8: 80003398 .word 0x80003398 + 800033ac: 00000000 .word 0x00000000 + 800033b0: 80013211 .word 0x80013211 + 800033b4: 00000000 .word 0x00000000 + 800033b8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xffffffffffffffff + 800033bc: 00033b03 ld x22,0(x6) + 800033c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x00000000ffffffff + 800033c4: 00033803 ld x16,0(x6) + 800033c8: 00830313 addi x6,x6,8 + +00000000800033cc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + xperm4 x23, x22, x16 # perform operation + 800033cc: 290b2bb3 xperm4 x23,x22,x16 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033d0: 0008b203 ld x4,0(x17) + 800033d4: 01720c63 beq x4,x23,800033ec + 800033d8: 129042ef jal x5,80007d00 + 800033dc: 800033cc .word 0x800033cc + 800033e0: 00000000 .word 0x00000000 + 800033e4: 80013282 .word 0x80013282 + 800033e8: 00000000 .word 0x00000000 + 800033ec: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xffffffffffffffff + 800033f0: 00033c03 ld x24,0(x6) + 800033f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x00000000fffffffe + 800033f8: 00033a03 ld x20,0(x6) + 800033fc: 00830313 addi x6,x6,8 + +0000000080003400 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + xperm4 x13, x24, x20 # perform operation + 80003400: 294c26b3 xperm4 x13,x24,x20 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003404: 0008b203 ld x4,0(x17) + 80003408: 00d20c63 beq x4,x13,80003420 + 8000340c: 0f5042ef jal x5,80007d00 + 80003410: 80003400 .word 0x80003400 + 80003414: 00000000 .word 0x00000000 + 80003418: 800132eb .word 0x800132eb + 8000341c: 00000000 .word 0x00000000 + 80003420: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xffffffffffffffff + 80003424: 00033983 ld x19,0(x6) + 80003428: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0000000100000000 + 8000342c: 00033e83 ld x29,0(x6) + 80003430: 00830313 addi x6,x6,8 + +0000000080003434 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + xperm4 x18, x19, x29 # perform operation + 80003434: 29d9a933 xperm4 x18,x19,x29 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003438: 0008b203 ld x4,0(x17) + 8000343c: 01220c63 beq x4,x18,80003454 + 80003440: 0c1042ef jal x5,80007d00 + 80003444: 80003434 .word 0x80003434 + 80003448: 00000000 .word 0x00000000 + 8000344c: 80013354 .word 0x80013354 + 80003450: 00000000 .word 0x00000000 + 80003454: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xffffffffffffffff + 80003458: 00033503 ld x10,0(x6) + 8000345c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000100000001 + 80003460: 00033983 ld x19,0(x6) + 80003464: 00830313 addi x6,x6,8 + +0000000080003468 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + xperm4 x29, x10, x19 # perform operation + 80003468: 29352eb3 xperm4 x29,x10,x19 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 8000346c: 0008b203 ld x4,0(x17) + 80003470: 01d20c63 beq x4,x29,80003488 + 80003474: 08d042ef jal x5,80007d00 + 80003478: 80003468 .word 0x80003468 + 8000347c: 00000000 .word 0x00000000 + 80003480: 800133be .word 0x800133be + 80003484: 00000000 .word 0x00000000 + 80003488: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xfffffffffffffffe + 8000348c: 00033903 ld x18,0(x6) + 80003490: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000000 + 80003494: 00033f83 ld x31,0(x6) + 80003498: 00830313 addi x6,x6,8 + +000000008000349c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + xperm4 x2, x18, x31 # perform operation + 8000349c: 29f92133 xperm4 x2,x18,x31 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034a0: 0008b203 ld x4,0(x17) + 800034a4: 00220c63 beq x4,x2,800034bc + 800034a8: 059042ef jal x5,80007d00 + 800034ac: 8000349c .word 0x8000349c + 800034b0: 00000000 .word 0x00000000 + 800034b4: 80013428 .word 0x80013428 + 800034b8: 00000000 .word 0x00000000 + 800034bc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xfffffffffffffffe + 800034c0: 00033403 ld x8,0(x6) + 800034c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0000000000000001 + 800034c8: 00033b03 ld x22,0(x6) + 800034cc: 00830313 addi x6,x6,8 + +00000000800034d0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + xperm4 x7, x8, x22 # perform operation + 800034d0: 296423b3 xperm4 x7,x8,x22 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034d4: 0008b203 ld x4,0(x17) + 800034d8: 00720c63 beq x4,x7,800034f0 + 800034dc: 025042ef jal x5,80007d00 + 800034e0: 800034d0 .word 0x800034d0 + 800034e4: 00000000 .word 0x00000000 + 800034e8: 8001348a .word 0x8001348a + 800034ec: 00000000 .word 0x00000000 + 800034f0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xfffffffffffffffe + 800034f4: 00033983 ld x19,0(x6) + 800034f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000000000002 + 800034fc: 00033383 ld x7,0(x6) + 80003500: 00830313 addi x6,x6,8 + +0000000080003504 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + xperm4 x13, x19, x7 # perform operation + 80003504: 2879a6b3 xperm4 x13,x19,x7 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003508: 0008b203 ld x4,0(x17) + 8000350c: 00d20c63 beq x4,x13,80003524 + 80003510: 7f0042ef jal x5,80007d00 + 80003514: 80003504 .word 0x80003504 + 80003518: 00000000 .word 0x00000000 + 8000351c: 800134ec .word 0x800134ec + 80003520: 00000000 .word 0x00000000 + 80003524: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003528: 00033703 ld x14,0(x6) + 8000352c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x8000000000000000 + 80003530: 00033503 ld x10,0(x6) + 80003534: 00830313 addi x6,x6,8 + +0000000080003538 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + xperm4 x16, x14, x10 # perform operation + 80003538: 28a72833 xperm4 x16,x14,x10 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 8000353c: 0008b203 ld x4,0(x17) + 80003540: 01020c63 beq x4,x16,80003558 + 80003544: 7bc042ef jal x5,80007d00 + 80003548: 80003538 .word 0x80003538 + 8000354c: 00000000 .word 0x00000000 + 80003550: 8001354e .word 0x8001354e + 80003554: 00000000 .word 0x00000000 + 80003558: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xfffffffffffffffe + 8000355c: 00033f03 ld x30,0(x6) + 80003560: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x8000000000000001 + 80003564: 00033503 ld x10,0(x6) + 80003568: 00830313 addi x6,x6,8 + +000000008000356c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + xperm4 x31, x30, x10 # perform operation + 8000356c: 28af2fb3 xperm4 x31,x30,x10 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003570: 0008b203 ld x4,0(x17) + 80003574: 01f20c63 beq x4,x31,8000358c + 80003578: 788042ef jal x5,80007d00 + 8000357c: 8000356c .word 0x8000356c + 80003580: 00000000 .word 0x00000000 + 80003584: 800135bf .word 0x800135bf + 80003588: 00000000 .word 0x00000000 + 8000358c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xfffffffffffffffe + 80003590: 00033f03 ld x30,0(x6) + 80003594: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7fffffffffffffff + 80003598: 00033e83 ld x29,0(x6) + 8000359c: 00830313 addi x6,x6,8 + +00000000800035a0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + xperm4 x13, x30, x29 # perform operation + 800035a0: 29df26b3 xperm4 x13,x30,x29 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035a4: 0008b203 ld x4,0(x17) + 800035a8: 00d20c63 beq x4,x13,800035c0 + 800035ac: 754042ef jal x5,80007d00 + 800035b0: 800035a0 .word 0x800035a0 + 800035b4: 00000000 .word 0x00000000 + 800035b8: 80013630 .word 0x80013630 + 800035bc: 00000000 .word 0x00000000 + 800035c0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xfffffffffffffffe + 800035c4: 00033f03 ld x30,0(x6) + 800035c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x7ffffffffffffffe + 800035cc: 00033a83 ld x21,0(x6) + 800035d0: 00830313 addi x6,x6,8 + +00000000800035d4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + xperm4 x8, x30, x21 # perform operation + 800035d4: 295f2433 xperm4 x8,x30,x21 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035d8: 0008b203 ld x4,0(x17) + 800035dc: 00820c63 beq x4,x8,800035f4 + 800035e0: 720042ef jal x5,80007d00 + 800035e4: 800035d4 .word 0x800035d4 + 800035e8: 00000000 .word 0x00000000 + 800035ec: 800136a1 .word 0x800136a1 + 800035f0: 00000000 .word 0x00000000 + 800035f4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xfffffffffffffffe + 800035f8: 00033603 ld x12,0(x6) + 800035fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xffffffffffffffff + 80003600: 00033183 ld x3,0(x6) + 80003604: 00830313 addi x6,x6,8 + +0000000080003608 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + xperm4 x8, x12, x3 # perform operation + 80003608: 28362433 xperm4 x8,x12,x3 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 8000360c: 0008b203 ld x4,0(x17) + 80003610: 00820c63 beq x4,x8,80003628 + 80003614: 6ec042ef jal x5,80007d00 + 80003618: 80003608 .word 0x80003608 + 8000361c: 00000000 .word 0x00000000 + 80003620: 80013712 .word 0x80013712 + 80003624: 00000000 .word 0x00000000 + 80003628: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xfffffffffffffffe + 8000362c: 00033383 ld x7,0(x6) + 80003630: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xfffffffffffffffe + 80003634: 00033703 ld x14,0(x6) + 80003638: 00830313 addi x6,x6,8 + +000000008000363c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + xperm4 x1, x7, x14 # perform operation + 8000363c: 28e3a0b3 xperm4 x1,x7,x14 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003640: 0008b203 ld x4,0(x17) + 80003644: 00120c63 beq x4,x1,8000365c + 80003648: 6b8042ef jal x5,80007d00 + 8000364c: 8000363c .word 0x8000363c + 80003650: 00000000 .word 0x00000000 + 80003654: 80013783 .word 0x80013783 + 80003658: 00000000 .word 0x00000000 + 8000365c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003660: 00033e83 ld x29,0(x6) + 80003664: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80003668: 00033783 ld x15,0(x6) + 8000366c: 00830313 addi x6,x6,8 + +0000000080003670 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xperm4 x24, x29, x15 # perform operation + 80003670: 28feac33 xperm4 x24,x29,x15 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003674: 0008b203 ld x4,0(x17) + 80003678: 01820c63 beq x4,x24,80003690 + 8000367c: 684042ef jal x5,80007d00 + 80003680: 80003670 .word 0x80003670 + 80003684: 00000000 .word 0x00000000 + 80003688: 800137f4 .word 0x800137f4 + 8000368c: 00000000 .word 0x00000000 + 80003690: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003694: 00033d03 ld x26,0(x6) + 80003698: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 8000369c: 00033683 ld x13,0(x6) + 800036a0: 00830313 addi x6,x6,8 + +00000000800036a4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x28, x26, x13 # perform operation + 800036a4: 28dd2e33 xperm4 x28,x26,x13 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036a8: 0008b203 ld x4,0(x17) + 800036ac: 01c20c63 beq x4,x28,800036c4 + 800036b0: 650042ef jal x5,80007d00 + 800036b4: 800036a4 .word 0x800036a4 + 800036b8: 00000000 .word 0x00000000 + 800036bc: 80013865 .word 0x80013865 + 800036c0: 00000000 .word 0x00000000 + 800036c4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xfffffffffffffffe + 800036c8: 00033783 ld x15,0(x6) + 800036cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x5555555555555555 + 800036d0: 00033683 ld x13,0(x6) + 800036d4: 00830313 addi x6,x6,8 + +00000000800036d8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + xperm4 x10, x15, x13 # perform operation + 800036d8: 28d7a533 xperm4 x10,x15,x13 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036dc: 0008b203 ld x4,0(x17) + 800036e0: 00a20c63 beq x4,x10,800036f8 + 800036e4: 61c042ef jal x5,80007d00 + 800036e8: 800036d8 .word 0x800036d8 + 800036ec: 00000000 .word 0x00000000 + 800036f0: 800138d6 .word 0x800138d6 + 800036f4: 00000000 .word 0x00000000 + 800036f8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xfffffffffffffffe + 800036fc: 00033083 ld x1,0(x6) + 80003700: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000ffffffff + 80003704: 00033e83 ld x29,0(x6) + 80003708: 00830313 addi x6,x6,8 + +000000008000370c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + xperm4 x10, x1, x29 # perform operation + 8000370c: 29d0a533 xperm4 x10,x1,x29 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003710: 0008b203 ld x4,0(x17) + 80003714: 00a20c63 beq x4,x10,8000372c + 80003718: 5e8042ef jal x5,80007d00 + 8000371c: 8000370c .word 0x8000370c + 80003720: 00000000 .word 0x00000000 + 80003724: 80013947 .word 0x80013947 + 80003728: 00000000 .word 0x00000000 + 8000372c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003730: 00033e83 ld x29,0(x6) + 80003734: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x00000000fffffffe + 80003738: 00033c83 ld x25,0(x6) + 8000373c: 00830313 addi x6,x6,8 + +0000000080003740 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + xperm4 x12, x29, x25 # perform operation + 80003740: 299ea633 xperm4 x12,x29,x25 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003744: 0008b203 ld x4,0(x17) + 80003748: 00c20c63 beq x4,x12,80003760 + 8000374c: 5b4042ef jal x5,80007d00 + 80003750: 80003740 .word 0x80003740 + 80003754: 00000000 .word 0x00000000 + 80003758: 800139b0 .word 0x800139b0 + 8000375c: 00000000 .word 0x00000000 + 80003760: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003764: 00033483 ld x9,0(x6) + 80003768: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000100000000 + 8000376c: 00033503 ld x10,0(x6) + 80003770: 00830313 addi x6,x6,8 + +0000000080003774 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + xperm4 x2, x9, x10 # perform operation + 80003774: 28a4a133 xperm4 x2,x9,x10 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003778: 0008b203 ld x4,0(x17) + 8000377c: 00220c63 beq x4,x2,80003794 + 80003780: 580042ef jal x5,80007d00 + 80003784: 80003774 .word 0x80003774 + 80003788: 00000000 .word 0x00000000 + 8000378c: 80013a19 .word 0x80013a19 + 80003790: 00000000 .word 0x00000000 + 80003794: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xfffffffffffffffe + 80003798: 00033583 ld x11,0(x6) + 8000379c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000100000001 + 800037a0: 00033803 ld x16,0(x6) + 800037a4: 00830313 addi x6,x6,8 + +00000000800037a8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + xperm4 x25, x11, x16 # perform operation + 800037a8: 2905acb3 xperm4 x25,x11,x16 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037ac: 0008b203 ld x4,0(x17) + 800037b0: 01920c63 beq x4,x25,800037c8 + 800037b4: 54c042ef jal x5,80007d00 + 800037b8: 800037a8 .word 0x800037a8 + 800037bc: 00000000 .word 0x00000000 + 800037c0: 80013a83 .word 0x80013a83 + 800037c4: 00000000 .word 0x00000000 + 800037c8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 800037cc: 00033f83 ld x31,0(x6) + 800037d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000000000000 + 800037d4: 00033503 ld x10,0(x6) + 800037d8: 00830313 addi x6,x6,8 + +00000000800037dc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + xperm4 x7, x31, x10 # perform operation + 800037dc: 28afa3b3 xperm4 x7,x31,x10 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037e0: 0008b203 ld x4,0(x17) + 800037e4: 00720c63 beq x4,x7,800037fc + 800037e8: 518042ef jal x5,80007d00 + 800037ec: 800037dc .word 0x800037dc + 800037f0: 00000000 .word 0x00000000 + 800037f4: 80013aed .word 0x80013aed + 800037f8: 00000000 .word 0x00000000 + 800037fc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80003800: 00033783 ld x15,0(x6) + 80003804: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000000000001 + 80003808: 00033103 ld x2,0(x6) + 8000380c: 00830313 addi x6,x6,8 + +0000000080003810 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + xperm4 x25, x15, x2 # perform operation + 80003810: 2827acb3 xperm4 x25,x15,x2 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003814: 0008b203 ld x4,0(x17) + 80003818: 01920c63 beq x4,x25,80003830 + 8000381c: 4e4042ef jal x5,80007d00 + 80003820: 80003810 .word 0x80003810 + 80003824: 00000000 .word 0x00000000 + 80003828: 80013b4f .word 0x80013b4f + 8000382c: 00000000 .word 0x00000000 + 80003830: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80003834: 00033803 ld x16,0(x6) + 80003838: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000002 + 8000383c: 00033083 ld x1,0(x6) + 80003840: 00830313 addi x6,x6,8 + +0000000080003844 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + xperm4 x11, x16, x1 # perform operation + 80003844: 281825b3 xperm4 x11,x16,x1 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003848: 0008b203 ld x4,0(x17) + 8000384c: 00b20c63 beq x4,x11,80003864 + 80003850: 4b0042ef jal x5,80007d00 + 80003854: 80003844 .word 0x80003844 + 80003858: 00000000 .word 0x00000000 + 8000385c: 80013bb1 .word 0x80013bb1 + 80003860: 00000000 .word 0x00000000 + 80003864: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003868: 00033c03 ld x24,0(x6) + 8000386c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x8000000000000000 + 80003870: 00033d83 ld x27,0(x6) + 80003874: 00830313 addi x6,x6,8 + +0000000080003878 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + xperm4 x19, x24, x27 # perform operation + 80003878: 29bc29b3 xperm4 x19,x24,x27 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 8000387c: 0008b203 ld x4,0(x17) + 80003880: 01320c63 beq x4,x19,80003898 + 80003884: 47c042ef jal x5,80007d00 + 80003888: 80003878 .word 0x80003878 + 8000388c: 00000000 .word 0x00000000 + 80003890: 80013c13 .word 0x80013c13 + 80003894: 00000000 .word 0x00000000 + 80003898: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 8000389c: 00033d03 ld x26,0(x6) + 800038a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x8000000000000001 + 800038a4: 00033b03 ld x22,0(x6) + 800038a8: 00830313 addi x6,x6,8 + +00000000800038ac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + xperm4 x29, x26, x22 # perform operation + 800038ac: 296d2eb3 xperm4 x29,x26,x22 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038b0: 0008b203 ld x4,0(x17) + 800038b4: 01d20c63 beq x4,x29,800038cc + 800038b8: 448042ef jal x5,80007d00 + 800038bc: 800038ac .word 0x800038ac + 800038c0: 00000000 .word 0x00000000 + 800038c4: 80013c84 .word 0x80013c84 + 800038c8: 00000000 .word 0x00000000 + 800038cc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800038d0: 00033603 ld x12,0(x6) + 800038d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x7fffffffffffffff + 800038d8: 00033103 ld x2,0(x6) + 800038dc: 00830313 addi x6,x6,8 + +00000000800038e0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + xperm4 x21, x12, x2 # perform operation + 800038e0: 28262ab3 xperm4 x21,x12,x2 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038e4: 0008b203 ld x4,0(x17) + 800038e8: 01520c63 beq x4,x21,80003900 + 800038ec: 414042ef jal x5,80007d00 + 800038f0: 800038e0 .word 0x800038e0 + 800038f4: 00000000 .word 0x00000000 + 800038f8: 80013cf5 .word 0x80013cf5 + 800038fc: 00000000 .word 0x00000000 + 80003900: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003904: 00033183 ld x3,0(x6) + 80003908: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x7ffffffffffffffe + 8000390c: 00033103 ld x2,0(x6) + 80003910: 00830313 addi x6,x6,8 + +0000000080003914 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + xperm4 x12, x3, x2 # perform operation + 80003914: 2821a633 xperm4 x12,x3,x2 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003918: 0008b203 ld x4,0(x17) + 8000391c: 00c20c63 beq x4,x12,80003934 + 80003920: 3e0042ef jal x5,80007d00 + 80003924: 80003914 .word 0x80003914 + 80003928: 00000000 .word 0x00000000 + 8000392c: 80013d66 .word 0x80013d66 + 80003930: 00000000 .word 0x00000000 + 80003934: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003938: 00033983 ld x19,0(x6) + 8000393c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xffffffffffffffff + 80003940: 00033483 ld x9,0(x6) + 80003944: 00830313 addi x6,x6,8 + +0000000080003948 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + xperm4 x25, x19, x9 # perform operation + 80003948: 2899acb3 xperm4 x25,x19,x9 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 8000394c: 0008b203 ld x4,0(x17) + 80003950: 01920c63 beq x4,x25,80003968 + 80003954: 3ac042ef jal x5,80007d00 + 80003958: 80003948 .word 0x80003948 + 8000395c: 00000000 .word 0x00000000 + 80003960: 80013dd7 .word 0x80013dd7 + 80003964: 00000000 .word 0x00000000 + 80003968: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 8000396c: 00033f83 ld x31,0(x6) + 80003970: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xfffffffffffffffe + 80003974: 00033a83 ld x21,0(x6) + 80003978: 00830313 addi x6,x6,8 + +000000008000397c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + xperm4 x29, x31, x21 # perform operation + 8000397c: 295faeb3 xperm4 x29,x31,x21 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003980: 0008b203 ld x4,0(x17) + 80003984: 01d20c63 beq x4,x29,8000399c + 80003988: 378042ef jal x5,80007d00 + 8000398c: 8000397c .word 0x8000397c + 80003990: 00000000 .word 0x00000000 + 80003994: 80013e48 .word 0x80013e48 + 80003998: 00000000 .word 0x00000000 + 8000399c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 800039a0: 00033483 ld x9,0(x6) + 800039a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 800039a8: 00033e83 ld x29,0(x6) + 800039ac: 00830313 addi x6,x6,8 + +00000000800039b0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + xperm4 x8, x9, x29 # perform operation + 800039b0: 29d4a433 xperm4 x8,x9,x29 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039b4: 0008b203 ld x4,0(x17) + 800039b8: 00820c63 beq x4,x8,800039d0 + 800039bc: 344042ef jal x5,80007d00 + 800039c0: 800039b0 .word 0x800039b0 + 800039c4: 00000000 .word 0x00000000 + 800039c8: 80013eb9 .word 0x80013eb9 + 800039cc: 00000000 .word 0x00000000 + 800039d0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800039d4: 00033603 ld x12,0(x6) + 800039d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 800039dc: 00033f03 ld x30,0(x6) + 800039e0: 00830313 addi x6,x6,8 + +00000000800039e4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x15, x12, x30 # perform operation + 800039e4: 29e627b3 xperm4 x15,x12,x30 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039e8: 0008b203 ld x4,0(x17) + 800039ec: 00f20c63 beq x4,x15,80003a04 + 800039f0: 310042ef jal x5,80007d00 + 800039f4: 800039e4 .word 0x800039e4 + 800039f8: 00000000 .word 0x00000000 + 800039fc: 80013f2a .word 0x80013f2a + 80003a00: 00000000 .word 0x00000000 + 80003a04: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003a08: 00033b03 ld x22,0(x6) + 80003a0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x5555555555555555 + 80003a10: 00033783 ld x15,0(x6) + 80003a14: 00830313 addi x6,x6,8 + +0000000080003a18 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + xperm4 x1, x22, x15 # perform operation + 80003a18: 28fb20b3 xperm4 x1,x22,x15 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a1c: 0008b203 ld x4,0(x17) + 80003a20: 00120c63 beq x4,x1,80003a38 + 80003a24: 2dc042ef jal x5,80007d00 + 80003a28: 80003a18 .word 0x80003a18 + 80003a2c: 00000000 .word 0x00000000 + 80003a30: 80013f9b .word 0x80013f9b + 80003a34: 00000000 .word 0x00000000 + 80003a38: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003a3c: 00033b83 ld x23,0(x6) + 80003a40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x00000000ffffffff + 80003a44: 00033703 ld x14,0(x6) + 80003a48: 00830313 addi x6,x6,8 + +0000000080003a4c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + xperm4 x28, x23, x14 # perform operation + 80003a4c: 28ebae33 xperm4 x28,x23,x14 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a50: 0008b203 ld x4,0(x17) + 80003a54: 01c20c63 beq x4,x28,80003a6c + 80003a58: 2a8042ef jal x5,80007d00 + 80003a5c: 80003a4c .word 0x80003a4c + 80003a60: 00000000 .word 0x00000000 + 80003a64: 8001400c .word 0x8001400c + 80003a68: 00000000 .word 0x00000000 + 80003a6c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003a70: 00033f83 ld x31,0(x6) + 80003a74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x00000000fffffffe + 80003a78: 00033d83 ld x27,0(x6) + 80003a7c: 00830313 addi x6,x6,8 + +0000000080003a80 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + xperm4 x28, x31, x27 # perform operation + 80003a80: 29bfae33 xperm4 x28,x31,x27 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a84: 0008b203 ld x4,0(x17) + 80003a88: 01c20c63 beq x4,x28,80003aa0 + 80003a8c: 274042ef jal x5,80007d00 + 80003a90: 80003a80 .word 0x80003a80 + 80003a94: 00000000 .word 0x00000000 + 80003a98: 80014075 .word 0x80014075 + 80003a9c: 00000000 .word 0x00000000 + 80003aa0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003aa4: 00033503 ld x10,0(x6) + 80003aa8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000100000000 + 80003aac: 00033483 ld x9,0(x6) + 80003ab0: 00830313 addi x6,x6,8 + +0000000080003ab4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + xperm4 x14, x10, x9 # perform operation + 80003ab4: 28952733 xperm4 x14,x10,x9 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ab8: 0008b203 ld x4,0(x17) + 80003abc: 00e20c63 beq x4,x14,80003ad4 + 80003ac0: 240042ef jal x5,80007d00 + 80003ac4: 80003ab4 .word 0x80003ab4 + 80003ac8: 00000000 .word 0x00000000 + 80003acc: 800140de .word 0x800140de + 80003ad0: 00000000 .word 0x00000000 + 80003ad4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003ad8: 00033f83 ld x31,0(x6) + 80003adc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000100000001 + 80003ae0: 00033183 ld x3,0(x6) + 80003ae4: 00830313 addi x6,x6,8 + +0000000080003ae8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + xperm4 x26, x31, x3 # perform operation + 80003ae8: 283fad33 xperm4 x26,x31,x3 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003aec: 0008b203 ld x4,0(x17) + 80003af0: 01a20c63 beq x4,x26,80003b08 + 80003af4: 20c042ef jal x5,80007d00 + 80003af8: 80003ae8 .word 0x80003ae8 + 80003afc: 00000000 .word 0x00000000 + 80003b00: 80014148 .word 0x80014148 + 80003b04: 00000000 .word 0x00000000 + 80003b08: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003b0c: 00033103 ld x2,0(x6) + 80003b10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000000000000 + 80003b14: 00033c03 ld x24,0(x6) + 80003b18: 00830313 addi x6,x6,8 + +0000000080003b1c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + xperm4 x3, x2, x24 # perform operation + 80003b1c: 298121b3 xperm4 x3,x2,x24 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b20: 0008b203 ld x4,0(x17) + 80003b24: 00320c63 beq x4,x3,80003b3c + 80003b28: 1d8042ef jal x5,80007d00 + 80003b2c: 80003b1c .word 0x80003b1c + 80003b30: 00000000 .word 0x00000000 + 80003b34: 800141b2 .word 0x800141b2 + 80003b38: 00000000 .word 0x00000000 + 80003b3c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003b40: 00033c03 ld x24,0(x6) + 80003b44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000000000001 + 80003b48: 00033683 ld x13,0(x6) + 80003b4c: 00830313 addi x6,x6,8 + +0000000080003b50 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + xperm4 x31, x24, x13 # perform operation + 80003b50: 28dc2fb3 xperm4 x31,x24,x13 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b54: 0008b203 ld x4,0(x17) + 80003b58: 01f20c63 beq x4,x31,80003b70 + 80003b5c: 1a4042ef jal x5,80007d00 + 80003b60: 80003b50 .word 0x80003b50 + 80003b64: 00000000 .word 0x00000000 + 80003b68: 80014214 .word 0x80014214 + 80003b6c: 00000000 .word 0x00000000 + 80003b70: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80003b74: 00033383 ld x7,0(x6) + 80003b78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000000000002 + 80003b7c: 00033403 ld x8,0(x6) + 80003b80: 00830313 addi x6,x6,8 + +0000000080003b84 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + xperm4 x10, x7, x8 # perform operation + 80003b84: 2883a533 xperm4 x10,x7,x8 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b88: 0008b203 ld x4,0(x17) + 80003b8c: 00a20c63 beq x4,x10,80003ba4 + 80003b90: 170042ef jal x5,80007d00 + 80003b94: 80003b84 .word 0x80003b84 + 80003b98: 00000000 .word 0x00000000 + 80003b9c: 80014276 .word 0x80014276 + 80003ba0: 00000000 .word 0x00000000 + 80003ba4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003ba8: 00033983 ld x19,0(x6) + 80003bac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x8000000000000000 + 80003bb0: 00033583 ld x11,0(x6) + 80003bb4: 00830313 addi x6,x6,8 + +0000000080003bb8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + xperm4 x13, x19, x11 # perform operation + 80003bb8: 28b9a6b3 xperm4 x13,x19,x11 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bbc: 0008b203 ld x4,0(x17) + 80003bc0: 00d20c63 beq x4,x13,80003bd8 + 80003bc4: 13c042ef jal x5,80007d00 + 80003bc8: 80003bb8 .word 0x80003bb8 + 80003bcc: 00000000 .word 0x00000000 + 80003bd0: 800142d8 .word 0x800142d8 + 80003bd4: 00000000 .word 0x00000000 + 80003bd8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003bdc: 00033903 ld x18,0(x6) + 80003be0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8000000000000001 + 80003be4: 00033183 ld x3,0(x6) + 80003be8: 00830313 addi x6,x6,8 + +0000000080003bec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + xperm4 x16, x18, x3 # perform operation + 80003bec: 28392833 xperm4 x16,x18,x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003bf0: 0008b203 ld x4,0(x17) + 80003bf4: 01020c63 beq x4,x16,80003c0c + 80003bf8: 108042ef jal x5,80007d00 + 80003bfc: 80003bec .word 0x80003bec + 80003c00: 00000000 .word 0x00000000 + 80003c04: 80014349 .word 0x80014349 + 80003c08: 00000000 .word 0x00000000 + 80003c0c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003c10: 00033c83 ld x25,0(x6) + 80003c14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7fffffffffffffff + 80003c18: 00033403 ld x8,0(x6) + 80003c1c: 00830313 addi x6,x6,8 + +0000000080003c20 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + xperm4 x24, x25, x8 # perform operation + 80003c20: 288cac33 xperm4 x24,x25,x8 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c24: 0008b203 ld x4,0(x17) + 80003c28: 01820c63 beq x4,x24,80003c40 + 80003c2c: 0d4042ef jal x5,80007d00 + 80003c30: 80003c20 .word 0x80003c20 + 80003c34: 00000000 .word 0x00000000 + 80003c38: 800143ba .word 0x800143ba + 80003c3c: 00000000 .word 0x00000000 + 80003c40: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003c44: 00033083 ld x1,0(x6) + 80003c48: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80003c4c: 00033f03 ld x30,0(x6) + 80003c50: 00830313 addi x6,x6,8 + +0000000080003c54 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + xperm4 x13, x1, x30 # perform operation + 80003c54: 29e0a6b3 xperm4 x13,x1,x30 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c58: 0008b203 ld x4,0(x17) + 80003c5c: 00d20c63 beq x4,x13,80003c74 + 80003c60: 0a0042ef jal x5,80007d00 + 80003c64: 80003c54 .word 0x80003c54 + 80003c68: 00000000 .word 0x00000000 + 80003c6c: 8001442b .word 0x8001442b + 80003c70: 00000000 .word 0x00000000 + 80003c74: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003c78: 00033583 ld x11,0(x6) + 80003c7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xffffffffffffffff + 80003c80: 00033483 ld x9,0(x6) + 80003c84: 00830313 addi x6,x6,8 + +0000000080003c88 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + xperm4 x16, x11, x9 # perform operation + 80003c88: 2895a833 xperm4 x16,x11,x9 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c8c: 0008b203 ld x4,0(x17) + 80003c90: 01020c63 beq x4,x16,80003ca8 + 80003c94: 06c042ef jal x5,80007d00 + 80003c98: 80003c88 .word 0x80003c88 + 80003c9c: 00000000 .word 0x00000000 + 80003ca0: 8001449c .word 0x8001449c + 80003ca4: 00000000 .word 0x00000000 + 80003ca8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003cac: 00033783 ld x15,0(x6) + 80003cb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xfffffffffffffffe + 80003cb4: 00033403 ld x8,0(x6) + 80003cb8: 00830313 addi x6,x6,8 + +0000000080003cbc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + xperm4 x14, x15, x8 # perform operation + 80003cbc: 2887a733 xperm4 x14,x15,x8 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cc0: 0008b203 ld x4,0(x17) + 80003cc4: 00e20c63 beq x4,x14,80003cdc + 80003cc8: 038042ef jal x5,80007d00 + 80003ccc: 80003cbc .word 0x80003cbc + 80003cd0: 00000000 .word 0x00000000 + 80003cd4: 8001450d .word 0x8001450d + 80003cd8: 00000000 .word 0x00000000 + 80003cdc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003ce0: 00033c03 ld x24,0(x6) + 80003ce4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80003ce8: 00033603 ld x12,0(x6) + 80003cec: 00830313 addi x6,x6,8 + +0000000080003cf0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + xperm4 x29, x24, x12 # perform operation + 80003cf0: 28cc2eb3 xperm4 x29,x24,x12 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003cf4: 0008b203 ld x4,0(x17) + 80003cf8: 01d20c63 beq x4,x29,80003d10 + 80003cfc: 004042ef jal x5,80007d00 + 80003d00: 80003cf0 .word 0x80003cf0 + 80003d04: 00000000 .word 0x00000000 + 80003d08: 8001457e .word 0x8001457e + 80003d0c: 00000000 .word 0x00000000 + 80003d10: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003d14: 00033483 ld x9,0(x6) + 80003d18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80003d1c: 00033583 ld x11,0(x6) + 80003d20: 00830313 addi x6,x6,8 + +0000000080003d24 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x3, x9, x11 # perform operation + 80003d24: 28b4a1b3 xperm4 x3,x9,x11 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d28: 0008b203 ld x4,0(x17) + 80003d2c: 00320c63 beq x4,x3,80003d44 + 80003d30: 7d1032ef jal x5,80007d00 + 80003d34: 80003d24 .word 0x80003d24 + 80003d38: 00000000 .word 0x00000000 + 80003d3c: 800145ef .word 0x800145ef + 80003d40: 00000000 .word 0x00000000 + 80003d44: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003d48: 00033483 ld x9,0(x6) + 80003d4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x5555555555555555 + 80003d50: 00033f03 ld x30,0(x6) + 80003d54: 00830313 addi x6,x6,8 + +0000000080003d58 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + xperm4 x13, x9, x30 # perform operation + 80003d58: 29e4a6b3 xperm4 x13,x9,x30 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d5c: 0008b203 ld x4,0(x17) + 80003d60: 00d20c63 beq x4,x13,80003d78 + 80003d64: 79d032ef jal x5,80007d00 + 80003d68: 80003d58 .word 0x80003d58 + 80003d6c: 00000000 .word 0x00000000 + 80003d70: 80014660 .word 0x80014660 + 80003d74: 00000000 .word 0x00000000 + 80003d78: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003d7c: 00033583 ld x11,0(x6) + 80003d80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x00000000ffffffff + 80003d84: 00033483 ld x9,0(x6) + 80003d88: 00830313 addi x6,x6,8 + +0000000080003d8c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + xperm4 x20, x11, x9 # perform operation + 80003d8c: 2895aa33 xperm4 x20,x11,x9 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003d90: 0008b203 ld x4,0(x17) + 80003d94: 01420c63 beq x4,x20,80003dac + 80003d98: 769032ef jal x5,80007d00 + 80003d9c: 80003d8c .word 0x80003d8c + 80003da0: 00000000 .word 0x00000000 + 80003da4: 800146d1 .word 0x800146d1 + 80003da8: 00000000 .word 0x00000000 + 80003dac: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003db0: 00033b03 ld x22,0(x6) + 80003db4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000fffffffe + 80003db8: 00033e83 ld x29,0(x6) + 80003dbc: 00830313 addi x6,x6,8 + +0000000080003dc0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + xperm4 x30, x22, x29 # perform operation + 80003dc0: 29db2f33 xperm4 x30,x22,x29 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dc4: 0008b203 ld x4,0(x17) + 80003dc8: 01e20c63 beq x4,x30,80003de0 + 80003dcc: 735032ef jal x5,80007d00 + 80003dd0: 80003dc0 .word 0x80003dc0 + 80003dd4: 00000000 .word 0x00000000 + 80003dd8: 8001473a .word 0x8001473a + 80003ddc: 00000000 .word 0x00000000 + 80003de0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003de4: 00033703 ld x14,0(x6) + 80003de8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000100000000 + 80003dec: 00033103 ld x2,0(x6) + 80003df0: 00830313 addi x6,x6,8 + +0000000080003df4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + xperm4 x8, x14, x2 # perform operation + 80003df4: 28272433 xperm4 x8,x14,x2 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003df8: 0008b203 ld x4,0(x17) + 80003dfc: 00820c63 beq x4,x8,80003e14 + 80003e00: 701032ef jal x5,80007d00 + 80003e04: 80003df4 .word 0x80003df4 + 80003e08: 00000000 .word 0x00000000 + 80003e0c: 800147a3 .word 0x800147a3 + 80003e10: 00000000 .word 0x00000000 + 80003e14: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003e18: 00033b83 ld x23,0(x6) + 80003e1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000100000001 + 80003e20: 00033403 ld x8,0(x6) + 80003e24: 00830313 addi x6,x6,8 + +0000000080003e28 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + xperm4 x18, x23, x8 # perform operation + 80003e28: 288ba933 xperm4 x18,x23,x8 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e2c: 0008b203 ld x4,0(x17) + 80003e30: 01220c63 beq x4,x18,80003e48 + 80003e34: 6cd032ef jal x5,80007d00 + 80003e38: 80003e28 .word 0x80003e28 + 80003e3c: 00000000 .word 0x00000000 + 80003e40: 8001480d .word 0x8001480d + 80003e44: 00000000 .word 0x00000000 + 80003e48: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5555555555555555 + 80003e4c: 00033503 ld x10,0(x6) + 80003e50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000000000000 + 80003e54: 00033183 ld x3,0(x6) + 80003e58: 00830313 addi x6,x6,8 + +0000000080003e5c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + xperm4 x22, x10, x3 # perform operation + 80003e5c: 28352b33 xperm4 x22,x10,x3 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e60: 0008b203 ld x4,0(x17) + 80003e64: 01620c63 beq x4,x22,80003e7c + 80003e68: 699032ef jal x5,80007d00 + 80003e6c: 80003e5c .word 0x80003e5c + 80003e70: 00000000 .word 0x00000000 + 80003e74: 80014877 .word 0x80014877 + 80003e78: 00000000 .word 0x00000000 + 80003e7c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x5555555555555555 + 80003e80: 00033a83 ld x21,0(x6) + 80003e84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x0000000000000001 + 80003e88: 00033b83 ld x23,0(x6) + 80003e8c: 00830313 addi x6,x6,8 + +0000000080003e90 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + xperm4 x22, x21, x23 # perform operation + 80003e90: 297aab33 xperm4 x22,x21,x23 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003e94: 0008b203 ld x4,0(x17) + 80003e98: 01620c63 beq x4,x22,80003eb0 + 80003e9c: 665032ef jal x5,80007d00 + 80003ea0: 80003e90 .word 0x80003e90 + 80003ea4: 00000000 .word 0x00000000 + 80003ea8: 800148d9 .word 0x800148d9 + 80003eac: 00000000 .word 0x00000000 + 80003eb0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x5555555555555555 + 80003eb4: 00033583 ld x11,0(x6) + 80003eb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000000000002 + 80003ebc: 00033683 ld x13,0(x6) + 80003ec0: 00830313 addi x6,x6,8 + +0000000080003ec4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + xperm4 x1, x11, x13 # perform operation + 80003ec4: 28d5a0b3 xperm4 x1,x11,x13 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ec8: 0008b203 ld x4,0(x17) + 80003ecc: 00120c63 beq x4,x1,80003ee4 + 80003ed0: 631032ef jal x5,80007d00 + 80003ed4: 80003ec4 .word 0x80003ec4 + 80003ed8: 00000000 .word 0x00000000 + 80003edc: 8001493b .word 0x8001493b + 80003ee0: 00000000 .word 0x00000000 + 80003ee4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5555555555555555 + 80003ee8: 00033d83 ld x27,0(x6) + 80003eec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8000000000000000 + 80003ef0: 00033e03 ld x28,0(x6) + 80003ef4: 00830313 addi x6,x6,8 + +0000000080003ef8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + xperm4 x23, x27, x28 # perform operation + 80003ef8: 29cdabb3 xperm4 x23,x27,x28 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003efc: 0008b203 ld x4,0(x17) + 80003f00: 01720c63 beq x4,x23,80003f18 + 80003f04: 5fd032ef jal x5,80007d00 + 80003f08: 80003ef8 .word 0x80003ef8 + 80003f0c: 00000000 .word 0x00000000 + 80003f10: 8001499d .word 0x8001499d + 80003f14: 00000000 .word 0x00000000 + 80003f18: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5555555555555555 + 80003f1c: 00033683 ld x13,0(x6) + 80003f20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x8000000000000001 + 80003f24: 00033e83 ld x29,0(x6) + 80003f28: 00830313 addi x6,x6,8 + +0000000080003f2c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + xperm4 x9, x13, x29 # perform operation + 80003f2c: 29d6a4b3 xperm4 x9,x13,x29 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f30: 0008b203 ld x4,0(x17) + 80003f34: 00920c63 beq x4,x9,80003f4c + 80003f38: 5c9032ef jal x5,80007d00 + 80003f3c: 80003f2c .word 0x80003f2c + 80003f40: 00000000 .word 0x00000000 + 80003f44: 80014a0e .word 0x80014a0e + 80003f48: 00000000 .word 0x00000000 + 80003f4c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5555555555555555 + 80003f50: 00033503 ld x10,0(x6) + 80003f54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x7fffffffffffffff + 80003f58: 00033b83 ld x23,0(x6) + 80003f5c: 00830313 addi x6,x6,8 + +0000000080003f60 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + xperm4 x30, x10, x23 # perform operation + 80003f60: 29752f33 xperm4 x30,x10,x23 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f64: 0008b203 ld x4,0(x17) + 80003f68: 01e20c63 beq x4,x30,80003f80 + 80003f6c: 595032ef jal x5,80007d00 + 80003f70: 80003f60 .word 0x80003f60 + 80003f74: 00000000 .word 0x00000000 + 80003f78: 80014a7f .word 0x80014a7f + 80003f7c: 00000000 .word 0x00000000 + 80003f80: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x5555555555555555 + 80003f84: 00033383 ld x7,0(x6) + 80003f88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80003f8c: 00033e83 ld x29,0(x6) + 80003f90: 00830313 addi x6,x6,8 + +0000000080003f94 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + xperm4 x8, x7, x29 # perform operation + 80003f94: 29d3a433 xperm4 x8,x7,x29 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003f98: 0008b203 ld x4,0(x17) + 80003f9c: 00820c63 beq x4,x8,80003fb4 + 80003fa0: 561032ef jal x5,80007d00 + 80003fa4: 80003f94 .word 0x80003f94 + 80003fa8: 00000000 .word 0x00000000 + 80003fac: 80014af0 .word 0x80014af0 + 80003fb0: 00000000 .word 0x00000000 + 80003fb4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x5555555555555555 + 80003fb8: 00033c83 ld x25,0(x6) + 80003fbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xffffffffffffffff + 80003fc0: 00033a83 ld x21,0(x6) + 80003fc4: 00830313 addi x6,x6,8 + +0000000080003fc8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + xperm4 x26, x25, x21 # perform operation + 80003fc8: 295cad33 xperm4 x26,x25,x21 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fcc: 0008b203 ld x4,0(x17) + 80003fd0: 01a20c63 beq x4,x26,80003fe8 + 80003fd4: 52d032ef jal x5,80007d00 + 80003fd8: 80003fc8 .word 0x80003fc8 + 80003fdc: 00000000 .word 0x00000000 + 80003fe0: 80014b61 .word 0x80014b61 + 80003fe4: 00000000 .word 0x00000000 + 80003fe8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5555555555555555 + 80003fec: 00033683 ld x13,0(x6) + 80003ff0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xfffffffffffffffe + 80003ff4: 00033483 ld x9,0(x6) + 80003ff8: 00830313 addi x6,x6,8 + +0000000080003ffc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + xperm4 x20, x13, x9 # perform operation + 80003ffc: 2896aa33 xperm4 x20,x13,x9 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004000: 0008b203 ld x4,0(x17) + 80004004: 01420c63 beq x4,x20,8000401c + 80004008: 4f9032ef jal x5,80007d00 + 8000400c: 80003ffc .word 0x80003ffc + 80004010: 00000000 .word 0x00000000 + 80004014: 80014bd2 .word 0x80014bd2 + 80004018: 00000000 .word 0x00000000 + 8000401c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x5555555555555555 + 80004020: 00033a03 ld x20,0(x6) + 80004024: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80004028: 00033383 ld x7,0(x6) + 8000402c: 00830313 addi x6,x6,8 + +0000000080004030 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + xperm4 x13, x20, x7 # perform operation + 80004030: 287a26b3 xperm4 x13,x20,x7 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004034: 0008b203 ld x4,0(x17) + 80004038: 00d20c63 beq x4,x13,80004050 + 8000403c: 4c5032ef jal x5,80007d00 + 80004040: 80004030 .word 0x80004030 + 80004044: 00000000 .word 0x00000000 + 80004048: 80014c43 .word 0x80014c43 + 8000404c: 00000000 .word 0x00000000 + 80004050: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x5555555555555555 + 80004054: 00033083 ld x1,0(x6) + 80004058: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 8000405c: 00033703 ld x14,0(x6) + 80004060: 00830313 addi x6,x6,8 + +0000000080004064 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x30, x1, x14 # perform operation + 80004064: 28e0af33 xperm4 x30,x1,x14 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004068: 0008b203 ld x4,0(x17) + 8000406c: 01e20c63 beq x4,x30,80004084 + 80004070: 491032ef jal x5,80007d00 + 80004074: 80004064 .word 0x80004064 + 80004078: 00000000 .word 0x00000000 + 8000407c: 80014cb4 .word 0x80014cb4 + 80004080: 00000000 .word 0x00000000 + 80004084: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x5555555555555555 + 80004088: 00033483 ld x9,0(x6) + 8000408c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x5555555555555555 + 80004090: 00033983 ld x19,0(x6) + 80004094: 00830313 addi x6,x6,8 + +0000000080004098 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + xperm4 x21, x9, x19 # perform operation + 80004098: 2934aab3 xperm4 x21,x9,x19 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 8000409c: 0008b203 ld x4,0(x17) + 800040a0: 01520c63 beq x4,x21,800040b8 + 800040a4: 45d032ef jal x5,80007d00 + 800040a8: 80004098 .word 0x80004098 + 800040ac: 00000000 .word 0x00000000 + 800040b0: 80014d25 .word 0x80014d25 + 800040b4: 00000000 .word 0x00000000 + 800040b8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5555555555555555 + 800040bc: 00033683 ld x13,0(x6) + 800040c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x00000000ffffffff + 800040c4: 00033a83 ld x21,0(x6) + 800040c8: 00830313 addi x6,x6,8 + +00000000800040cc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + xperm4 x29, x13, x21 # perform operation + 800040cc: 2956aeb3 xperm4 x29,x13,x21 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040d0: 0008b203 ld x4,0(x17) + 800040d4: 01d20c63 beq x4,x29,800040ec + 800040d8: 429032ef jal x5,80007d00 + 800040dc: 800040cc .word 0x800040cc + 800040e0: 00000000 .word 0x00000000 + 800040e4: 80014d96 .word 0x80014d96 + 800040e8: 00000000 .word 0x00000000 + 800040ec: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5555555555555555 + 800040f0: 00033603 ld x12,0(x6) + 800040f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x00000000fffffffe + 800040f8: 00033803 ld x16,0(x6) + 800040fc: 00830313 addi x6,x6,8 + +0000000080004100 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + xperm4 x19, x12, x16 # perform operation + 80004100: 290629b3 xperm4 x19,x12,x16 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004104: 0008b203 ld x4,0(x17) + 80004108: 01320c63 beq x4,x19,80004120 + 8000410c: 3f5032ef jal x5,80007d00 + 80004110: 80004100 .word 0x80004100 + 80004114: 00000000 .word 0x00000000 + 80004118: 80014dff .word 0x80014dff + 8000411c: 00000000 .word 0x00000000 + 80004120: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x5555555555555555 + 80004124: 00033c03 ld x24,0(x6) + 80004128: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000100000000 + 8000412c: 00033a83 ld x21,0(x6) + 80004130: 00830313 addi x6,x6,8 + +0000000080004134 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + xperm4 x31, x24, x21 # perform operation + 80004134: 295c2fb3 xperm4 x31,x24,x21 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004138: 0008b203 ld x4,0(x17) + 8000413c: 01f20c63 beq x4,x31,80004154 + 80004140: 3c1032ef jal x5,80007d00 + 80004144: 80004134 .word 0x80004134 + 80004148: 00000000 .word 0x00000000 + 8000414c: 80014e68 .word 0x80014e68 + 80004150: 00000000 .word 0x00000000 + 80004154: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x5555555555555555 + 80004158: 00033a83 ld x21,0(x6) + 8000415c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000001 + 80004160: 00033c03 ld x24,0(x6) + 80004164: 00830313 addi x6,x6,8 + +0000000080004168 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + xperm4 x10, x21, x24 # perform operation + 80004168: 298aa533 xperm4 x10,x21,x24 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 8000416c: 0008b203 ld x4,0(x17) + 80004170: 00a20c63 beq x4,x10,80004188 + 80004174: 38d032ef jal x5,80007d00 + 80004178: 80004168 .word 0x80004168 + 8000417c: 00000000 .word 0x00000000 + 80004180: 80014ed2 .word 0x80014ed2 + 80004184: 00000000 .word 0x00000000 + 80004188: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x00000000ffffffff + 8000418c: 00033183 ld x3,0(x6) + 80004190: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000000000000 + 80004194: 00033383 ld x7,0(x6) + 80004198: 00830313 addi x6,x6,8 + +000000008000419c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xperm4 x14, x3, x7 # perform operation + 8000419c: 2871a733 xperm4 x14,x3,x7 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041a0: 0008b203 ld x4,0(x17) + 800041a4: 00e20c63 beq x4,x14,800041bc + 800041a8: 359032ef jal x5,80007d00 + 800041ac: 8000419c .word 0x8000419c + 800041b0: 00000000 .word 0x00000000 + 800041b4: 80014f3c .word 0x80014f3c + 800041b8: 00000000 .word 0x00000000 + 800041bc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x00000000ffffffff + 800041c0: 00033703 ld x14,0(x6) + 800041c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000000000001 + 800041c8: 00033a83 ld x21,0(x6) + 800041cc: 00830313 addi x6,x6,8 + +00000000800041d0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xperm4 x28, x14, x21 # perform operation + 800041d0: 29572e33 xperm4 x28,x14,x21 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041d4: 0008b203 ld x4,0(x17) + 800041d8: 01c20c63 beq x4,x28,800041f0 + 800041dc: 325032ef jal x5,80007d00 + 800041e0: 800041d0 .word 0x800041d0 + 800041e4: 00000000 .word 0x00000000 + 800041e8: 80014f96 .word 0x80014f96 + 800041ec: 00000000 .word 0x00000000 + 800041f0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000ffffffff + 800041f4: 00033a03 ld x20,0(x6) + 800041f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000000000002 + 800041fc: 00033c03 ld x24,0(x6) + 80004200: 00830313 addi x6,x6,8 + +0000000080004204 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xperm4 x14, x20, x24 # perform operation + 80004204: 298a2733 xperm4 x14,x20,x24 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004208: 0008b203 ld x4,0(x17) + 8000420c: 00e20c63 beq x4,x14,80004224 + 80004210: 2f1032ef jal x5,80007d00 + 80004214: 80004204 .word 0x80004204 + 80004218: 00000000 .word 0x00000000 + 8000421c: 80014ff0 .word 0x80014ff0 + 80004220: 00000000 .word 0x00000000 + 80004224: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x00000000ffffffff + 80004228: 00033a83 ld x21,0(x6) + 8000422c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8000000000000000 + 80004230: 00033e03 ld x28,0(x6) + 80004234: 00830313 addi x6,x6,8 + +0000000080004238 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + xperm4 x26, x21, x28 # perform operation + 80004238: 29caad33 xperm4 x26,x21,x28 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 8000423c: 0008b203 ld x4,0(x17) + 80004240: 01a20c63 beq x4,x26,80004258 + 80004244: 2bd032ef jal x5,80007d00 + 80004248: 80004238 .word 0x80004238 + 8000424c: 00000000 .word 0x00000000 + 80004250: 8001504a .word 0x8001504a + 80004254: 00000000 .word 0x00000000 + 80004258: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x00000000ffffffff + 8000425c: 00033083 ld x1,0(x6) + 80004260: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x8000000000000001 + 80004264: 00033c03 ld x24,0(x6) + 80004268: 00830313 addi x6,x6,8 + +000000008000426c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + xperm4 x20, x1, x24 # perform operation + 8000426c: 2980aa33 xperm4 x20,x1,x24 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004270: 0008b203 ld x4,0(x17) + 80004274: 01420c63 beq x4,x20,8000428c + 80004278: 289032ef jal x5,80007d00 + 8000427c: 8000426c .word 0x8000426c + 80004280: 00000000 .word 0x00000000 + 80004284: 800150b3 .word 0x800150b3 + 80004288: 00000000 .word 0x00000000 + 8000428c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x00000000ffffffff + 80004290: 00033503 ld x10,0(x6) + 80004294: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x7fffffffffffffff + 80004298: 00033c03 ld x24,0(x6) + 8000429c: 00830313 addi x6,x6,8 + +00000000800042a0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + xperm4 x7, x10, x24 # perform operation + 800042a0: 298523b3 xperm4 x7,x10,x24 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042a4: 0008b203 ld x4,0(x17) + 800042a8: 00720c63 beq x4,x7,800042c0 + 800042ac: 255032ef jal x5,80007d00 + 800042b0: 800042a0 .word 0x800042a0 + 800042b4: 00000000 .word 0x00000000 + 800042b8: 8001511c .word 0x8001511c + 800042bc: 00000000 .word 0x00000000 + 800042c0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x00000000ffffffff + 800042c4: 00033683 ld x13,0(x6) + 800042c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x7ffffffffffffffe + 800042cc: 00033d83 ld x27,0(x6) + 800042d0: 00830313 addi x6,x6,8 + +00000000800042d4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + xperm4 x31, x13, x27 # perform operation + 800042d4: 29b6afb3 xperm4 x31,x13,x27 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042d8: 0008b203 ld x4,0(x17) + 800042dc: 01f20c63 beq x4,x31,800042f4 + 800042e0: 221032ef jal x5,80007d00 + 800042e4: 800042d4 .word 0x800042d4 + 800042e8: 00000000 .word 0x00000000 + 800042ec: 80015185 .word 0x80015185 + 800042f0: 00000000 .word 0x00000000 + 800042f4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x00000000ffffffff + 800042f8: 00033c83 ld x25,0(x6) + 800042fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xffffffffffffffff + 80004300: 00033783 ld x15,0(x6) + 80004304: 00830313 addi x6,x6,8 + +0000000080004308 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + xperm4 x12, x25, x15 # perform operation + 80004308: 28fca633 xperm4 x12,x25,x15 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 8000430c: 0008b203 ld x4,0(x17) + 80004310: 00c20c63 beq x4,x12,80004328 + 80004314: 1ed032ef jal x5,80007d00 + 80004318: 80004308 .word 0x80004308 + 8000431c: 00000000 .word 0x00000000 + 80004320: 800151ee .word 0x800151ee + 80004324: 00000000 .word 0x00000000 + 80004328: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000ffffffff + 8000432c: 00033a03 ld x20,0(x6) + 80004330: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004334: 00033583 ld x11,0(x6) + 80004338: 00830313 addi x6,x6,8 + +000000008000433c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + xperm4 x14, x20, x11 # perform operation + 8000433c: 28ba2733 xperm4 x14,x20,x11 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004340: 0008b203 ld x4,0(x17) + 80004344: 00e20c63 beq x4,x14,8000435c + 80004348: 1b9032ef jal x5,80007d00 + 8000434c: 8000433c .word 0x8000433c + 80004350: 00000000 .word 0x00000000 + 80004354: 80015257 .word 0x80015257 + 80004358: 00000000 .word 0x00000000 + 8000435c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x00000000ffffffff + 80004360: 00033e83 ld x29,0(x6) + 80004364: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80004368: 00033b83 ld x23,0(x6) + 8000436c: 00830313 addi x6,x6,8 + +0000000080004370 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + xperm4 x22, x29, x23 # perform operation + 80004370: 297eab33 xperm4 x22,x29,x23 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004374: 0008b203 ld x4,0(x17) + 80004378: 01620c63 beq x4,x22,80004390 + 8000437c: 185032ef jal x5,80007d00 + 80004380: 80004370 .word 0x80004370 + 80004384: 00000000 .word 0x00000000 + 80004388: 800152c0 .word 0x800152c0 + 8000438c: 00000000 .word 0x00000000 + 80004390: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x00000000ffffffff + 80004394: 00033b03 ld x22,0(x6) + 80004398: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 8000439c: 00033a83 ld x21,0(x6) + 800043a0: 00830313 addi x6,x6,8 + +00000000800043a4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x15, x22, x21 # perform operation + 800043a4: 295b27b3 xperm4 x15,x22,x21 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043a8: 0008b203 ld x4,0(x17) + 800043ac: 00f20c63 beq x4,x15,800043c4 + 800043b0: 151032ef jal x5,80007d00 + 800043b4: 800043a4 .word 0x800043a4 + 800043b8: 00000000 .word 0x00000000 + 800043bc: 80015329 .word 0x80015329 + 800043c0: 00000000 .word 0x00000000 + 800043c4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x00000000ffffffff + 800043c8: 00033f83 ld x31,0(x6) + 800043cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x5555555555555555 + 800043d0: 00033403 ld x8,0(x6) + 800043d4: 00830313 addi x6,x6,8 + +00000000800043d8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + xperm4 x21, x31, x8 # perform operation + 800043d8: 288faab3 xperm4 x21,x31,x8 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043dc: 0008b203 ld x4,0(x17) + 800043e0: 01520c63 beq x4,x21,800043f8 + 800043e4: 11d032ef jal x5,80007d00 + 800043e8: 800043d8 .word 0x800043d8 + 800043ec: 00000000 .word 0x00000000 + 800043f0: 80015392 .word 0x80015392 + 800043f4: 00000000 .word 0x00000000 + 800043f8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x00000000ffffffff + 800043fc: 00033383 ld x7,0(x6) + 80004400: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x00000000ffffffff + 80004404: 00033a83 ld x21,0(x6) + 80004408: 00830313 addi x6,x6,8 + +000000008000440c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xperm4 x19, x7, x21 # perform operation + 8000440c: 2953a9b3 xperm4 x19,x7,x21 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004410: 0008b203 ld x4,0(x17) + 80004414: 01320c63 beq x4,x19,8000442c + 80004418: 0e9032ef jal x5,80007d00 + 8000441c: 8000440c .word 0x8000440c + 80004420: 00000000 .word 0x00000000 + 80004424: 800153fb .word 0x800153fb + 80004428: 00000000 .word 0x00000000 + 8000442c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000ffffffff + 80004430: 00033603 ld x12,0(x6) + 80004434: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x00000000fffffffe + 80004438: 00033b03 ld x22,0(x6) + 8000443c: 00830313 addi x6,x6,8 + +0000000080004440 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xperm4 x19, x12, x22 # perform operation + 80004440: 296629b3 xperm4 x19,x12,x22 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004444: 0008b203 ld x4,0(x17) + 80004448: 01320c63 beq x4,x19,80004460 + 8000444c: 0b5032ef jal x5,80007d00 + 80004450: 80004440 .word 0x80004440 + 80004454: 00000000 .word 0x00000000 + 80004458: 8001545c .word 0x8001545c + 8000445c: 00000000 .word 0x00000000 + 80004460: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x00000000ffffffff + 80004464: 00033503 ld x10,0(x6) + 80004468: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000100000000 + 8000446c: 00033083 ld x1,0(x6) + 80004470: 00830313 addi x6,x6,8 + +0000000080004474 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + xperm4 x23, x10, x1 # perform operation + 80004474: 28152bb3 xperm4 x23,x10,x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004478: 0008b203 ld x4,0(x17) + 8000447c: 01720c63 beq x4,x23,80004494 + 80004480: 081032ef jal x5,80007d00 + 80004484: 80004474 .word 0x80004474 + 80004488: 00000000 .word 0x00000000 + 8000448c: 800154bd .word 0x800154bd + 80004490: 00000000 .word 0x00000000 + 80004494: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x00000000ffffffff + 80004498: 00033903 ld x18,0(x6) + 8000449c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000100000001 + 800044a0: 00033383 ld x7,0(x6) + 800044a4: 00830313 addi x6,x6,8 + +00000000800044a8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + xperm4 x9, x18, x7 # perform operation + 800044a8: 287924b3 xperm4 x9,x18,x7 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044ac: 0008b203 ld x4,0(x17) + 800044b0: 00920c63 beq x4,x9,800044c8 + 800044b4: 04d032ef jal x5,80007d00 + 800044b8: 800044a8 .word 0x800044a8 + 800044bc: 00000000 .word 0x00000000 + 800044c0: 8001551f .word 0x8001551f + 800044c4: 00000000 .word 0x00000000 + 800044c8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x00000000fffffffe + 800044cc: 00033e83 ld x29,0(x6) + 800044d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000000 + 800044d4: 00033f83 ld x31,0(x6) + 800044d8: 00830313 addi x6,x6,8 + +00000000800044dc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xperm4 x8, x29, x31 # perform operation + 800044dc: 29fea433 xperm4 x8,x29,x31 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044e0: 0008b203 ld x4,0(x17) + 800044e4: 00820c63 beq x4,x8,800044fc + 800044e8: 019032ef jal x5,80007d00 + 800044ec: 800044dc .word 0x800044dc + 800044f0: 00000000 .word 0x00000000 + 800044f4: 80015581 .word 0x80015581 + 800044f8: 00000000 .word 0x00000000 + 800044fc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000fffffffe + 80004500: 00033603 ld x12,0(x6) + 80004504: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000000000001 + 80004508: 00033a83 ld x21,0(x6) + 8000450c: 00830313 addi x6,x6,8 + +0000000080004510 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xperm4 x7, x12, x21 # perform operation + 80004510: 295623b3 xperm4 x7,x12,x21 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004514: 0008b203 ld x4,0(x17) + 80004518: 00720c63 beq x4,x7,80004530 + 8000451c: 7e4032ef jal x5,80007d00 + 80004520: 80004510 .word 0x80004510 + 80004524: 00000000 .word 0x00000000 + 80004528: 800155db .word 0x800155db + 8000452c: 00000000 .word 0x00000000 + 80004530: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x00000000fffffffe + 80004534: 00033903 ld x18,0(x6) + 80004538: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000000000002 + 8000453c: 00033383 ld x7,0(x6) + 80004540: 00830313 addi x6,x6,8 + +0000000080004544 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xperm4 x1, x18, x7 # perform operation + 80004544: 287920b3 xperm4 x1,x18,x7 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004548: 0008b203 ld x4,0(x17) + 8000454c: 00120c63 beq x4,x1,80004564 + 80004550: 7b0032ef jal x5,80007d00 + 80004554: 80004544 .word 0x80004544 + 80004558: 00000000 .word 0x00000000 + 8000455c: 80015635 .word 0x80015635 + 80004560: 00000000 .word 0x00000000 + 80004564: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x00000000fffffffe + 80004568: 00033c83 ld x25,0(x6) + 8000456c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x8000000000000000 + 80004570: 00033a03 ld x20,0(x6) + 80004574: 00830313 addi x6,x6,8 + +0000000080004578 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + xperm4 x11, x25, x20 # perform operation + 80004578: 294ca5b3 xperm4 x11,x25,x20 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 8000457c: 0008b203 ld x4,0(x17) + 80004580: 00b20c63 beq x4,x11,80004598 + 80004584: 77c032ef jal x5,80007d00 + 80004588: 80004578 .word 0x80004578 + 8000458c: 00000000 .word 0x00000000 + 80004590: 8001568f .word 0x8001568f + 80004594: 00000000 .word 0x00000000 + 80004598: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000fffffffe + 8000459c: 00033603 ld x12,0(x6) + 800045a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8000000000000001 + 800045a4: 00033f83 ld x31,0(x6) + 800045a8: 00830313 addi x6,x6,8 + +00000000800045ac : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + xperm4 x25, x12, x31 # perform operation + 800045ac: 29f62cb3 xperm4 x25,x12,x31 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045b0: 0008b203 ld x4,0(x17) + 800045b4: 01920c63 beq x4,x25,800045cc + 800045b8: 748032ef jal x5,80007d00 + 800045bc: 800045ac .word 0x800045ac + 800045c0: 00000000 .word 0x00000000 + 800045c4: 800156f8 .word 0x800156f8 + 800045c8: 00000000 .word 0x00000000 + 800045cc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x00000000fffffffe + 800045d0: 00033803 ld x16,0(x6) + 800045d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x7fffffffffffffff + 800045d8: 00033a03 ld x20,0(x6) + 800045dc: 00830313 addi x6,x6,8 + +00000000800045e0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + xperm4 x27, x16, x20 # perform operation + 800045e0: 29482db3 xperm4 x27,x16,x20 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045e4: 0008b203 ld x4,0(x17) + 800045e8: 01b20c63 beq x4,x27,80004600 + 800045ec: 714032ef jal x5,80007d00 + 800045f0: 800045e0 .word 0x800045e0 + 800045f4: 00000000 .word 0x00000000 + 800045f8: 80015761 .word 0x80015761 + 800045fc: 00000000 .word 0x00000000 + 80004600: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x00000000fffffffe + 80004604: 00033a83 ld x21,0(x6) + 80004608: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x7ffffffffffffffe + 8000460c: 00033083 ld x1,0(x6) + 80004610: 00830313 addi x6,x6,8 + +0000000080004614 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + xperm4 x14, x21, x1 # perform operation + 80004614: 281aa733 xperm4 x14,x21,x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004618: 0008b203 ld x4,0(x17) + 8000461c: 00e20c63 beq x4,x14,80004634 + 80004620: 6e0032ef jal x5,80007d00 + 80004624: 80004614 .word 0x80004614 + 80004628: 00000000 .word 0x00000000 + 8000462c: 800157ca .word 0x800157ca + 80004630: 00000000 .word 0x00000000 + 80004634: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x00000000fffffffe + 80004638: 00033c03 ld x24,0(x6) + 8000463c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xffffffffffffffff + 80004640: 00033403 ld x8,0(x6) + 80004644: 00830313 addi x6,x6,8 + +0000000080004648 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + xperm4 x25, x24, x8 # perform operation + 80004648: 288c2cb3 xperm4 x25,x24,x8 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 8000464c: 0008b203 ld x4,0(x17) + 80004650: 01920c63 beq x4,x25,80004668 + 80004654: 6ac032ef jal x5,80007d00 + 80004658: 80004648 .word 0x80004648 + 8000465c: 00000000 .word 0x00000000 + 80004660: 80015833 .word 0x80015833 + 80004664: 00000000 .word 0x00000000 + 80004668: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x00000000fffffffe + 8000466c: 00033683 ld x13,0(x6) + 80004670: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xfffffffffffffffe + 80004674: 00033e03 ld x28,0(x6) + 80004678: 00830313 addi x6,x6,8 + +000000008000467c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + xperm4 x22, x13, x28 # perform operation + 8000467c: 29c6ab33 xperm4 x22,x13,x28 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004680: 0008b203 ld x4,0(x17) + 80004684: 01620c63 beq x4,x22,8000469c + 80004688: 678032ef jal x5,80007d00 + 8000468c: 8000467c .word 0x8000467c + 80004690: 00000000 .word 0x00000000 + 80004694: 8001589c .word 0x8001589c + 80004698: 00000000 .word 0x00000000 + 8000469c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000000fffffffe + 800046a0: 00033103 ld x2,0(x6) + 800046a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 800046a8: 00033c83 ld x25,0(x6) + 800046ac: 00830313 addi x6,x6,8 + +00000000800046b0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + xperm4 x23, x2, x25 # perform operation + 800046b0: 29912bb3 xperm4 x23,x2,x25 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046b4: 0008b203 ld x4,0(x17) + 800046b8: 01720c63 beq x4,x23,800046d0 + 800046bc: 644032ef jal x5,80007d00 + 800046c0: 800046b0 .word 0x800046b0 + 800046c4: 00000000 .word 0x00000000 + 800046c8: 80015905 .word 0x80015905 + 800046cc: 00000000 .word 0x00000000 + 800046d0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x00000000fffffffe + 800046d4: 00033f83 ld x31,0(x6) + 800046d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 800046dc: 00033783 ld x15,0(x6) + 800046e0: 00830313 addi x6,x6,8 + +00000000800046e4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x21, x31, x15 # perform operation + 800046e4: 28ffaab3 xperm4 x21,x31,x15 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046e8: 0008b203 ld x4,0(x17) + 800046ec: 01520c63 beq x4,x21,80004704 + 800046f0: 610032ef jal x5,80007d00 + 800046f4: 800046e4 .word 0x800046e4 + 800046f8: 00000000 .word 0x00000000 + 800046fc: 8001596e .word 0x8001596e + 80004700: 00000000 .word 0x00000000 + 80004704: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x00000000fffffffe + 80004708: 00033183 ld x3,0(x6) + 8000470c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x5555555555555555 + 80004710: 00033d83 ld x27,0(x6) + 80004714: 00830313 addi x6,x6,8 + +0000000080004718 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + xperm4 x29, x3, x27 # perform operation + 80004718: 29b1aeb3 xperm4 x29,x3,x27 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 8000471c: 0008b203 ld x4,0(x17) + 80004720: 01d20c63 beq x4,x29,80004738 + 80004724: 5dc032ef jal x5,80007d00 + 80004728: 80004718 .word 0x80004718 + 8000472c: 00000000 .word 0x00000000 + 80004730: 800159d7 .word 0x800159d7 + 80004734: 00000000 .word 0x00000000 + 80004738: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x00000000fffffffe + 8000473c: 00033183 ld x3,0(x6) + 80004740: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x00000000ffffffff + 80004744: 00033b03 ld x22,0(x6) + 80004748: 00830313 addi x6,x6,8 + +000000008000474c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xperm4 x29, x3, x22 # perform operation + 8000474c: 2961aeb3 xperm4 x29,x3,x22 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004750: 0008b203 ld x4,0(x17) + 80004754: 01d20c63 beq x4,x29,8000476c + 80004758: 5a8032ef jal x5,80007d00 + 8000475c: 8000474c .word 0x8000474c + 80004760: 00000000 .word 0x00000000 + 80004764: 80015a40 .word 0x80015a40 + 80004768: 00000000 .word 0x00000000 + 8000476c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x00000000fffffffe + 80004770: 00033583 ld x11,0(x6) + 80004774: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x00000000fffffffe + 80004778: 00033703 ld x14,0(x6) + 8000477c: 00830313 addi x6,x6,8 + +0000000080004780 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xperm4 x2, x11, x14 # perform operation + 80004780: 28e5a133 xperm4 x2,x11,x14 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004784: 0008b203 ld x4,0(x17) + 80004788: 00220c63 beq x4,x2,800047a0 + 8000478c: 574032ef jal x5,80007d00 + 80004790: 80004780 .word 0x80004780 + 80004794: 00000000 .word 0x00000000 + 80004798: 80015aa1 .word 0x80015aa1 + 8000479c: 00000000 .word 0x00000000 + 800047a0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x00000000fffffffe + 800047a4: 00033e03 ld x28,0(x6) + 800047a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000100000000 + 800047ac: 00033f83 ld x31,0(x6) + 800047b0: 00830313 addi x6,x6,8 + +00000000800047b4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + xperm4 x23, x28, x31 # perform operation + 800047b4: 29fe2bb3 xperm4 x23,x28,x31 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047b8: 0008b203 ld x4,0(x17) + 800047bc: 01720c63 beq x4,x23,800047d4 + 800047c0: 540032ef jal x5,80007d00 + 800047c4: 800047b4 .word 0x800047b4 + 800047c8: 00000000 .word 0x00000000 + 800047cc: 80015b02 .word 0x80015b02 + 800047d0: 00000000 .word 0x00000000 + 800047d4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x00000000fffffffe + 800047d8: 00033d83 ld x27,0(x6) + 800047dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000100000001 + 800047e0: 00033383 ld x7,0(x6) + 800047e4: 00830313 addi x6,x6,8 + +00000000800047e8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + xperm4 x24, x27, x7 # perform operation + 800047e8: 287dac33 xperm4 x24,x27,x7 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047ec: 0008b203 ld x4,0(x17) + 800047f0: 01820c63 beq x4,x24,80004808 + 800047f4: 50c032ef jal x5,80007d00 + 800047f8: 800047e8 .word 0x800047e8 + 800047fc: 00000000 .word 0x00000000 + 80004800: 80015b64 .word 0x80015b64 + 80004804: 00000000 .word 0x00000000 + 80004808: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000100000000 + 8000480c: 00033c83 ld x25,0(x6) + 80004810: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x0000000000000000 + 80004814: 00033f03 ld x30,0(x6) + 80004818: 00830313 addi x6,x6,8 + +000000008000481c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + xperm4 x15, x25, x30 # perform operation + 8000481c: 29eca7b3 xperm4 x15,x25,x30 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004820: 0008b203 ld x4,0(x17) + 80004824: 00f20c63 beq x4,x15,8000483c + 80004828: 4d8032ef jal x5,80007d00 + 8000482c: 8000481c .word 0x8000481c + 80004830: 00000000 .word 0x00000000 + 80004834: 80015bc6 .word 0x80015bc6 + 80004838: 00000000 .word 0x00000000 + 8000483c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000100000000 + 80004840: 00033083 ld x1,0(x6) + 80004844: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x0000000000000001 + 80004848: 00033b83 ld x23,0(x6) + 8000484c: 00830313 addi x6,x6,8 + +0000000080004850 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + xperm4 x11, x1, x23 # perform operation + 80004850: 2970a5b3 xperm4 x11,x1,x23 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004854: 0008b203 ld x4,0(x17) + 80004858: 00b20c63 beq x4,x11,80004870 + 8000485c: 4a4032ef jal x5,80007d00 + 80004860: 80004850 .word 0x80004850 + 80004864: 00000000 .word 0x00000000 + 80004868: 80015c21 .word 0x80015c21 + 8000486c: 00000000 .word 0x00000000 + 80004870: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000000 + 80004874: 00033f83 ld x31,0(x6) + 80004878: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000000000002 + 8000487c: 00033803 ld x16,0(x6) + 80004880: 00830313 addi x6,x6,8 + +0000000080004884 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + xperm4 x2, x31, x16 # perform operation + 80004884: 290fa133 xperm4 x2,x31,x16 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004888: 0008b203 ld x4,0(x17) + 8000488c: 00220c63 beq x4,x2,800048a4 + 80004890: 470032ef jal x5,80007d00 + 80004894: 80004884 .word 0x80004884 + 80004898: 00000000 .word 0x00000000 + 8000489c: 80015c7c .word 0x80015c7c + 800048a0: 00000000 .word 0x00000000 + 800048a4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000000 + 800048a8: 00033f83 ld x31,0(x6) + 800048ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8000000000000000 + 800048b0: 00033d03 ld x26,0(x6) + 800048b4: 00830313 addi x6,x6,8 + +00000000800048b8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + xperm4 x13, x31, x26 # perform operation + 800048b8: 29afa6b3 xperm4 x13,x31,x26 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048bc: 0008b203 ld x4,0(x17) + 800048c0: 00d20c63 beq x4,x13,800048d8 + 800048c4: 43c032ef jal x5,80007d00 + 800048c8: 800048b8 .word 0x800048b8 + 800048cc: 00000000 .word 0x00000000 + 800048d0: 80015cd7 .word 0x80015cd7 + 800048d4: 00000000 .word 0x00000000 + 800048d8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000100000000 + 800048dc: 00033d83 ld x27,0(x6) + 800048e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 800048e4: 00033383 ld x7,0(x6) + 800048e8: 00830313 addi x6,x6,8 + +00000000800048ec : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + xperm4 x31, x27, x7 # perform operation + 800048ec: 287dafb3 xperm4 x31,x27,x7 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 800048f0: 0008b203 ld x4,0(x17) + 800048f4: 01f20c63 beq x4,x31,8000490c + 800048f8: 408032ef jal x5,80007d00 + 800048fc: 800048ec .word 0x800048ec + 80004900: 00000000 .word 0x00000000 + 80004904: 80015d41 .word 0x80015d41 + 80004908: 00000000 .word 0x00000000 + 8000490c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000100000000 + 80004910: 00033e03 ld x28,0(x6) + 80004914: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x7fffffffffffffff + 80004918: 00033383 ld x7,0(x6) + 8000491c: 00830313 addi x6,x6,8 + +0000000080004920 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + xperm4 x13, x28, x7 # perform operation + 80004920: 287e26b3 xperm4 x13,x28,x7 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004924: 0008b203 ld x4,0(x17) + 80004928: 00d20c63 beq x4,x13,80004940 + 8000492c: 3d4032ef jal x5,80007d00 + 80004930: 80004920 .word 0x80004920 + 80004934: 00000000 .word 0x00000000 + 80004938: 80015dab .word 0x80015dab + 8000493c: 00000000 .word 0x00000000 + 80004940: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x0000000100000000 + 80004944: 00033b83 ld x23,0(x6) + 80004948: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x7ffffffffffffffe + 8000494c: 00033803 ld x16,0(x6) + 80004950: 00830313 addi x6,x6,8 + +0000000080004954 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + xperm4 x11, x23, x16 # perform operation + 80004954: 290ba5b3 xperm4 x11,x23,x16 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004958: 0008b203 ld x4,0(x17) + 8000495c: 00b20c63 beq x4,x11,80004974 + 80004960: 3a0032ef jal x5,80007d00 + 80004964: 80004954 .word 0x80004954 + 80004968: 00000000 .word 0x00000000 + 8000496c: 80015e15 .word 0x80015e15 + 80004970: 00000000 .word 0x00000000 + 80004974: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0000000100000000 + 80004978: 00033383 ld x7,0(x6) + 8000497c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xffffffffffffffff + 80004980: 00033f83 ld x31,0(x6) + 80004984: 00830313 addi x6,x6,8 + +0000000080004988 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + xperm4 x23, x7, x31 # perform operation + 80004988: 29f3abb3 xperm4 x23,x7,x31 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 8000498c: 0008b203 ld x4,0(x17) + 80004990: 01720c63 beq x4,x23,800049a8 + 80004994: 36c032ef jal x5,80007d00 + 80004998: 80004988 .word 0x80004988 + 8000499c: 00000000 .word 0x00000000 + 800049a0: 80015e7f .word 0x80015e7f + 800049a4: 00000000 .word 0x00000000 + 800049a8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000100000000 + 800049ac: 00033803 ld x16,0(x6) + 800049b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xfffffffffffffffe + 800049b4: 00033c83 ld x25,0(x6) + 800049b8: 00830313 addi x6,x6,8 + +00000000800049bc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + xperm4 x2, x16, x25 # perform operation + 800049bc: 29982133 xperm4 x2,x16,x25 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049c0: 0008b203 ld x4,0(x17) + 800049c4: 00220c63 beq x4,x2,800049dc + 800049c8: 338032ef jal x5,80007d00 + 800049cc: 800049bc .word 0x800049bc + 800049d0: 00000000 .word 0x00000000 + 800049d4: 80015ee9 .word 0x80015ee9 + 800049d8: 00000000 .word 0x00000000 + 800049dc: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x0000000100000000 + 800049e0: 00033b83 ld x23,0(x6) + 800049e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 800049e8: 00033c83 ld x25,0(x6) + 800049ec: 00830313 addi x6,x6,8 + +00000000800049f0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + xperm4 x21, x23, x25 # perform operation + 800049f0: 299baab3 xperm4 x21,x23,x25 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 800049f4: 0008b203 ld x4,0(x17) + 800049f8: 01520c63 beq x4,x21,80004a10 + 800049fc: 304032ef jal x5,80007d00 + 80004a00: 800049f0 .word 0x800049f0 + 80004a04: 00000000 .word 0x00000000 + 80004a08: 80015f53 .word 0x80015f53 + 80004a0c: 00000000 .word 0x00000000 + 80004a10: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0000000100000000 + 80004a14: 00033903 ld x18,0(x6) + 80004a18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80004a1c: 00033b03 ld x22,0(x6) + 80004a20: 00830313 addi x6,x6,8 + +0000000080004a24 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x28, x18, x22 # perform operation + 80004a24: 29692e33 xperm4 x28,x18,x22 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a28: 0008b203 ld x4,0(x17) + 80004a2c: 01c20c63 beq x4,x28,80004a44 + 80004a30: 2d0032ef jal x5,80007d00 + 80004a34: 80004a24 .word 0x80004a24 + 80004a38: 00000000 .word 0x00000000 + 80004a3c: 80015fbd .word 0x80015fbd + 80004a40: 00000000 .word 0x00000000 + 80004a44: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000000 + 80004a48: 00033f83 ld x31,0(x6) + 80004a4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x5555555555555555 + 80004a50: 00033683 ld x13,0(x6) + 80004a54: 00830313 addi x6,x6,8 + +0000000080004a58 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + xperm4 x22, x31, x13 # perform operation + 80004a58: 28dfab33 xperm4 x22,x31,x13 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a5c: 0008b203 ld x4,0(x17) + 80004a60: 01620c63 beq x4,x22,80004a78 + 80004a64: 29c032ef jal x5,80007d00 + 80004a68: 80004a58 .word 0x80004a58 + 80004a6c: 00000000 .word 0x00000000 + 80004a70: 80016027 .word 0x80016027 + 80004a74: 00000000 .word 0x00000000 + 80004a78: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0000000100000000 + 80004a7c: 00033903 ld x18,0(x6) + 80004a80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x00000000ffffffff + 80004a84: 00033f83 ld x31,0(x6) + 80004a88: 00830313 addi x6,x6,8 + +0000000080004a8c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + xperm4 x22, x18, x31 # perform operation + 80004a8c: 29f92b33 xperm4 x22,x18,x31 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004a90: 0008b203 ld x4,0(x17) + 80004a94: 01620c63 beq x4,x22,80004aac + 80004a98: 268032ef jal x5,80007d00 + 80004a9c: 80004a8c .word 0x80004a8c + 80004aa0: 00000000 .word 0x00000000 + 80004aa4: 80016091 .word 0x80016091 + 80004aa8: 00000000 .word 0x00000000 + 80004aac: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000100000000 + 80004ab0: 00033603 ld x12,0(x6) + 80004ab4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x00000000fffffffe + 80004ab8: 00033503 ld x10,0(x6) + 80004abc: 00830313 addi x6,x6,8 + +0000000080004ac0 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + xperm4 x19, x12, x10 # perform operation + 80004ac0: 28a629b3 xperm4 x19,x12,x10 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ac4: 0008b203 ld x4,0(x17) + 80004ac8: 01320c63 beq x4,x19,80004ae0 + 80004acc: 234032ef jal x5,80007d00 + 80004ad0: 80004ac0 .word 0x80004ac0 + 80004ad4: 00000000 .word 0x00000000 + 80004ad8: 800160f3 .word 0x800160f3 + 80004adc: 00000000 .word 0x00000000 + 80004ae0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000100000000 + 80004ae4: 00033a83 ld x21,0(x6) + 80004ae8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0000000100000000 + 80004aec: 00033d83 ld x27,0(x6) + 80004af0: 00830313 addi x6,x6,8 + +0000000080004af4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + xperm4 x25, x21, x27 # perform operation + 80004af4: 29baacb3 xperm4 x25,x21,x27 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004af8: 0008b203 ld x4,0(x17) + 80004afc: 01920c63 beq x4,x25,80004b14 + 80004b00: 200032ef jal x5,80007d00 + 80004b04: 80004af4 .word 0x80004af4 + 80004b08: 00000000 .word 0x00000000 + 80004b0c: 80016155 .word 0x80016155 + 80004b10: 00000000 .word 0x00000000 + 80004b14: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000100000000 + 80004b18: 00033e83 ld x29,0(x6) + 80004b1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000100000001 + 80004b20: 00033783 ld x15,0(x6) + 80004b24: 00830313 addi x6,x6,8 + +0000000080004b28 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + xperm4 x25, x29, x15 # perform operation + 80004b28: 28feacb3 xperm4 x25,x29,x15 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b2c: 0008b203 ld x4,0(x17) + 80004b30: 01920c63 beq x4,x25,80004b48 + 80004b34: 1cc032ef jal x5,80007d00 + 80004b38: 80004b28 .word 0x80004b28 + 80004b3c: 00000000 .word 0x00000000 + 80004b40: 800161b8 .word 0x800161b8 + 80004b44: 00000000 .word 0x00000000 + 80004b48: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004b4c: 00033583 ld x11,0(x6) + 80004b50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0000000000000000 + 80004b54: 00033603 ld x12,0(x6) + 80004b58: 00830313 addi x6,x6,8 + +0000000080004b5c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + xperm4 x7, x11, x12 # perform operation + 80004b5c: 28c5a3b3 xperm4 x7,x11,x12 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b60: 0008b203 ld x4,0(x17) + 80004b64: 00720c63 beq x4,x7,80004b7c + 80004b68: 198032ef jal x5,80007d00 + 80004b6c: 80004b5c .word 0x80004b5c + 80004b70: 00000000 .word 0x00000000 + 80004b74: 8001621b .word 0x8001621b + 80004b78: 00000000 .word 0x00000000 + 80004b7c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0000000100000001 + 80004b80: 00033683 ld x13,0(x6) + 80004b84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000000000001 + 80004b88: 00033703 ld x14,0(x6) + 80004b8c: 00830313 addi x6,x6,8 + +0000000080004b90 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + xperm4 x23, x13, x14 # perform operation + 80004b90: 28e6abb3 xperm4 x23,x13,x14 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004b94: 0008b203 ld x4,0(x17) + 80004b98: 01720c63 beq x4,x23,80004bb0 + 80004b9c: 164032ef jal x5,80007d00 + 80004ba0: 80004b90 .word 0x80004b90 + 80004ba4: 00000000 .word 0x00000000 + 80004ba8: 80016276 .word 0x80016276 + 80004bac: 00000000 .word 0x00000000 + 80004bb0: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004bb4: 00033583 ld x11,0(x6) + 80004bb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0000000000000002 + 80004bbc: 00033e83 ld x29,0(x6) + 80004bc0: 00830313 addi x6,x6,8 + +0000000080004bc4 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + xperm4 x23, x11, x29 # perform operation + 80004bc4: 29d5abb3 xperm4 x23,x11,x29 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bc8: 0008b203 ld x4,0(x17) + 80004bcc: 01720c63 beq x4,x23,80004be4 + 80004bd0: 130032ef jal x5,80007d00 + 80004bd4: 80004bc4 .word 0x80004bc4 + 80004bd8: 00000000 .word 0x00000000 + 80004bdc: 800162d1 .word 0x800162d1 + 80004be0: 00000000 .word 0x00000000 + 80004be4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000100000001 + 80004be8: 00033d83 ld x27,0(x6) + 80004bec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8000000000000000 + 80004bf0: 00033183 ld x3,0(x6) + 80004bf4: 00830313 addi x6,x6,8 + +0000000080004bf8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + xperm4 x14, x27, x3 # perform operation + 80004bf8: 283da733 xperm4 x14,x27,x3 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004bfc: 0008b203 ld x4,0(x17) + 80004c00: 00e20c63 beq x4,x14,80004c18 + 80004c04: 0fc032ef jal x5,80007d00 + 80004c08: 80004bf8 .word 0x80004bf8 + 80004c0c: 00000000 .word 0x00000000 + 80004c10: 8001632c .word 0x8001632c + 80004c14: 00000000 .word 0x00000000 + 80004c18: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000100000001 + 80004c1c: 00033603 ld x12,0(x6) + 80004c20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 80004c24: 00033383 ld x7,0(x6) + 80004c28: 00830313 addi x6,x6,8 + +0000000080004c2c : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + xperm4 x11, x12, x7 # perform operation + 80004c2c: 287625b3 xperm4 x11,x12,x7 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c30: 0008b203 ld x4,0(x17) + 80004c34: 00b20c63 beq x4,x11,80004c4c + 80004c38: 0c8032ef jal x5,80007d00 + 80004c3c: 80004c2c .word 0x80004c2c + 80004c40: 00000000 .word 0x00000000 + 80004c44: 80016396 .word 0x80016396 + 80004c48: 00000000 .word 0x00000000 + 80004c4c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000100000001 + 80004c50: 00033c83 ld x25,0(x6) + 80004c54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7fffffffffffffff + 80004c58: 00033403 ld x8,0(x6) + 80004c5c: 00830313 addi x6,x6,8 + +0000000080004c60 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + xperm4 x19, x25, x8 # perform operation + 80004c60: 288ca9b3 xperm4 x19,x25,x8 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c64: 0008b203 ld x4,0(x17) + 80004c68: 01320c63 beq x4,x19,80004c80 + 80004c6c: 094032ef jal x5,80007d00 + 80004c70: 80004c60 .word 0x80004c60 + 80004c74: 00000000 .word 0x00000000 + 80004c78: 80016400 .word 0x80016400 + 80004c7c: 00000000 .word 0x00000000 + 80004c80: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004c84: 00033583 ld x11,0(x6) + 80004c88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80004c8c: 00033b83 ld x23,0(x6) + 80004c90: 00830313 addi x6,x6,8 + +0000000080004c94 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + xperm4 x24, x11, x23 # perform operation + 80004c94: 2975ac33 xperm4 x24,x11,x23 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004c98: 0008b203 ld x4,0(x17) + 80004c9c: 01820c63 beq x4,x24,80004cb4 + 80004ca0: 060032ef jal x5,80007d00 + 80004ca4: 80004c94 .word 0x80004c94 + 80004ca8: 00000000 .word 0x00000000 + 80004cac: 8001646a .word 0x8001646a + 80004cb0: 00000000 .word 0x00000000 + 80004cb4: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000001 + 80004cb8: 00033f83 ld x31,0(x6) + 80004cbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xffffffffffffffff + 80004cc0: 00033903 ld x18,0(x6) + 80004cc4: 00830313 addi x6,x6,8 + +0000000080004cc8 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + xperm4 x7, x31, x18 # perform operation + 80004cc8: 292fa3b3 xperm4 x7,x31,x18 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ccc: 0008b203 ld x4,0(x17) + 80004cd0: 00720c63 beq x4,x7,80004ce8 + 80004cd4: 02c032ef jal x5,80007d00 + 80004cd8: 80004cc8 .word 0x80004cc8 + 80004cdc: 00000000 .word 0x00000000 + 80004ce0: 800164d4 .word 0x800164d4 + 80004ce4: 00000000 .word 0x00000000 + 80004ce8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000100000001 + 80004cec: 00033103 ld x2,0(x6) + 80004cf0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xfffffffffffffffe + 80004cf4: 00033683 ld x13,0(x6) + 80004cf8: 00830313 addi x6,x6,8 + +0000000080004cfc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + xperm4 x18, x2, x13 # perform operation + 80004cfc: 28d12933 xperm4 x18,x2,x13 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d00: 0008b203 ld x4,0(x17) + 80004d04: 01220c63 beq x4,x18,80004d1c + 80004d08: 7f9022ef jal x5,80007d00 + 80004d0c: 80004cfc .word 0x80004cfc + 80004d10: 00000000 .word 0x00000000 + 80004d14: 8001653e .word 0x8001653e + 80004d18: 00000000 .word 0x00000000 + 80004d1c: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0000000100000001 + 80004d20: 00033403 ld x8,0(x6) + 80004d24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80004d28: 00033603 ld x12,0(x6) + 80004d2c: 00830313 addi x6,x6,8 + +0000000080004d30 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + xperm4 x14, x8, x12 # perform operation + 80004d30: 28c42733 xperm4 x14,x8,x12 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d34: 0008b203 ld x4,0(x17) + 80004d38: 00e20c63 beq x4,x14,80004d50 + 80004d3c: 7c5022ef jal x5,80007d00 + 80004d40: 80004d30 .word 0x80004d30 + 80004d44: 00000000 .word 0x00000000 + 80004d48: 800165a8 .word 0x800165a8 + 80004d4c: 00000000 .word 0x00000000 + 80004d50: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000100000001 + 80004d54: 00033083 ld x1,0(x6) + 80004d58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80004d5c: 00033e83 ld x29,0(x6) + 80004d60: 00830313 addi x6,x6,8 + +0000000080004d64 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + xperm4 x26, x1, x29 # perform operation + 80004d64: 29d0ad33 xperm4 x26,x1,x29 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d68: 0008b203 ld x4,0(x17) + 80004d6c: 01a20c63 beq x4,x26,80004d84 + 80004d70: 791022ef jal x5,80007d00 + 80004d74: 80004d64 .word 0x80004d64 + 80004d78: 00000000 .word 0x00000000 + 80004d7c: 80016612 .word 0x80016612 + 80004d80: 00000000 .word 0x00000000 + 80004d84: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0000000100000001 + 80004d88: 00033383 ld x7,0(x6) + 80004d8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5555555555555555 + 80004d90: 00033103 ld x2,0(x6) + 80004d94: 00830313 addi x6,x6,8 + +0000000080004d98 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + xperm4 x13, x7, x2 # perform operation + 80004d98: 2823a6b3 xperm4 x13,x7,x2 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004d9c: 0008b203 ld x4,0(x17) + 80004da0: 00d20c63 beq x4,x13,80004db8 + 80004da4: 75d022ef jal x5,80007d00 + 80004da8: 80004d98 .word 0x80004d98 + 80004dac: 00000000 .word 0x00000000 + 80004db0: 8001667c .word 0x8001667c + 80004db4: 00000000 .word 0x00000000 + 80004db8: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000100000001 + 80004dbc: 00033e03 ld x28,0(x6) + 80004dc0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x00000000ffffffff + 80004dc4: 00033a83 ld x21,0(x6) + 80004dc8: 00830313 addi x6,x6,8 + +0000000080004dcc : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + xperm4 x26, x28, x21 # perform operation + 80004dcc: 295e2d33 xperm4 x26,x28,x21 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dd0: 0008b203 ld x4,0(x17) + 80004dd4: 01a20c63 beq x4,x26,80004dec + 80004dd8: 729022ef jal x5,80007d00 + 80004ddc: 80004dcc .word 0x80004dcc + 80004de0: 00000000 .word 0x00000000 + 80004de4: 800166e6 .word 0x800166e6 + 80004de8: 00000000 .word 0x00000000 + 80004dec: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004df0: 00033583 ld x11,0(x6) + 80004df4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x00000000fffffffe + 80004df8: 00033403 ld x8,0(x6) + 80004dfc: 00830313 addi x6,x6,8 + +0000000080004e00 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + xperm4 x20, x11, x8 # perform operation + 80004e00: 2885aa33 xperm4 x20,x11,x8 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e04: 0008b203 ld x4,0(x17) + 80004e08: 01420c63 beq x4,x20,80004e20 + 80004e0c: 6f5022ef jal x5,80007d00 + 80004e10: 80004e00 .word 0x80004e00 + 80004e14: 00000000 .word 0x00000000 + 80004e18: 80016748 .word 0x80016748 + 80004e1c: 00000000 .word 0x00000000 + 80004e20: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0000000100000001 + 80004e24: 00033403 ld x8,0(x6) + 80004e28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000100000000 + 80004e2c: 00033803 ld x16,0(x6) + 80004e30: 00830313 addi x6,x6,8 + +0000000080004e34 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + xperm4 x27, x8, x16 # perform operation + 80004e34: 29042db3 xperm4 x27,x8,x16 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e38: 0008b203 ld x4,0(x17) + 80004e3c: 01b20c63 beq x4,x27,80004e54 + 80004e40: 6c1022ef jal x5,80007d00 + 80004e44: 80004e34 .word 0x80004e34 + 80004e48: 00000000 .word 0x00000000 + 80004e4c: 800167aa .word 0x800167aa + 80004e50: 00000000 .word 0x00000000 + 80004e54: 00888893 addi x17,x17,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004e58: 00033583 ld x11,0(x6) + 80004e5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x0000000100000001 + 80004e60: 00033e03 ld x28,0(x6) + 80004e64: 00830313 addi x6,x6,8 + +0000000080004e68 : +Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + xperm4 x23, x11, x28 # perform operation + 80004e68: 29c5abb3 xperm4 x23,x11,x28 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkx_xperm4_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e6c: 0008b203 ld x4,0(x17) + 80004e70: 01720c63 beq x4,x23,80004e88 + 80004e74: 68d022ef jal x5,80007d00 + 80004e78: 80004e68 .word 0x80004e68 + 80004e7c: 00000000 .word 0x00000000 + 80004e80: 8001680d .word 0x8001680d + 80004e84: 00000000 .word 0x00000000 + 80004e88: 00888893 addi x17,x17,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x88229a6d96c19a19 + 80004e8c: 00033003 ld x0,0(x6) + 80004e90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0xdc43a3406ebd86a5 + 80004e94: 00033003 ld x0,0(x6) + 80004e98: 00830313 addi x6,x6,8 + +0000000080004e9c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b0: + xperm4 x2, x0, x0 # perform operation + 80004e9c: 28002133 xperm4 x2,x0,x0 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zbkx_xperm4_cg_cmp_rs1_rs2_b0, Zbkx_xperm4_cg_cmp_rs1_rs2_b0_str) + 80004ea0: 0008b203 ld x4,0(x17) + 80004ea4: 00220c63 beq x4,x2,80004ebc + 80004ea8: 659022ef jal x5,80007d00 + 80004eac: 80004e9c .word 0x80004e9c + 80004eb0: 00000000 .word 0x00000000 + 80004eb4: 80016870 .word 0x80016870 + 80004eb8: 00000000 .word 0x00000000 + 80004ebc: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x6d36aa3f08856cbb + 80004ec0: 00033083 ld x1,0(x6) + 80004ec4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x3e7e14956a2b0ee1 + 80004ec8: 00033083 ld x1,0(x6) + 80004ecc: 00830313 addi x6,x6,8 + +0000000080004ed0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b1: + xperm4 x20, x1, x1 # perform operation + 80004ed0: 2810aa33 xperm4 x20,x1,x1 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zbkx_xperm4_cg_cmp_rs1_rs2_b1, Zbkx_xperm4_cg_cmp_rs1_rs2_b1_str) + 80004ed4: 0008b203 ld x4,0(x17) + 80004ed8: 01420c63 beq x4,x20,80004ef0 + 80004edc: 625022ef jal x5,80007d00 + 80004ee0: 80004ed0 .word 0x80004ed0 + 80004ee4: 00000000 .word 0x00000000 + 80004ee8: 800168aa .word 0x800168aa + 80004eec: 00000000 .word 0x00000000 + 80004ef0: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x56999b2cb7669f2a + 80004ef4: 00033103 ld x2,0(x6) + 80004ef8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x17a89f8e39731eb7 + 80004efc: 00033103 ld x2,0(x6) + 80004f00: 00830313 addi x6,x6,8 + +0000000080004f04 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b2: + xperm4 x24, x2, x2 # perform operation + 80004f04: 28212c33 xperm4 x24,x2,x2 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zbkx_xperm4_cg_cmp_rs1_rs2_b2, Zbkx_xperm4_cg_cmp_rs1_rs2_b2_str) + 80004f08: 0008b203 ld x4,0(x17) + 80004f0c: 01820c63 beq x4,x24,80004f24 + 80004f10: 5f1022ef jal x5,80007d00 + 80004f14: 80004f04 .word 0x80004f04 + 80004f18: 00000000 .word 0x00000000 + 80004f1c: 800168e4 .word 0x800168e4 + 80004f20: 00000000 .word 0x00000000 + 80004f24: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x7a8781862239e04f + 80004f28: 00033183 ld x3,0(x6) + 80004f2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x91d234cbd53ea0de + 80004f30: 00033183 ld x3,0(x6) + 80004f34: 00830313 addi x6,x6,8 + +0000000080004f38 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b3: + xperm4 x26, x3, x3 # perform operation + 80004f38: 2831ad33 xperm4 x26,x3,x3 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zbkx_xperm4_cg_cmp_rs1_rs2_b3, Zbkx_xperm4_cg_cmp_rs1_rs2_b3_str) + 80004f3c: 0008b203 ld x4,0(x17) + 80004f40: 01a20c63 beq x4,x26,80004f58 + 80004f44: 5bd022ef jal x5,80007d00 + 80004f48: 80004f38 .word 0x80004f38 + 80004f4c: 00000000 .word 0x00000000 + 80004f50: 8001691e .word 0x8001691e + 80004f54: 00000000 .word 0x00000000 + 80004f58: 00888893 addi x17,x17,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f5c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f60: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x19db251d16d49ffc + 80004f64: 00033203 ld x4,0(x6) + 80004f68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x5566b7fce355f7f4 + 80004f6c: 00033203 ld x4,0(x6) + 80004f70: 00830313 addi x6,x6,8 + +0000000080004f74 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b4: + xperm4 x22, x4, x4 # perform operation + 80004f74: 28422b33 xperm4 x22,x4,x4 + # Check if x22 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x22, Zbkx_xperm4_cg_cmp_rs1_rs2_b4, Zbkx_xperm4_cg_cmp_rs1_rs2_b4_str) + 80004f78: 0008b383 ld x7,0(x17) + 80004f7c: 01638c63 beq x7,x22,80004f94 + 80004f80: 5990246f jal x8,80007d18 + 80004f84: 80004f74 .word 0x80004f74 + 80004f88: 00000000 .word 0x00000000 + 80004f8c: 80016958 .word 0x80016958 + 80004f90: 00000000 .word 0x00000000 + 80004f94: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x8f06f7de2bd0fc77 + 80004f98: 00033283 ld x5,0(x6) + 80004f9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x53cfb5d4fd38e056 + 80004fa0: 00033283 ld x5,0(x6) + 80004fa4: 00830313 addi x6,x6,8 + +0000000080004fa8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b5: + xperm4 x12, x5, x5 # perform operation + 80004fa8: 2852a633 xperm4 x12,x5,x5 + # Check if x12 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x12, Zbkx_xperm4_cg_cmp_rs1_rs2_b5, Zbkx_xperm4_cg_cmp_rs1_rs2_b5_str) + 80004fac: 0008b383 ld x7,0(x17) + 80004fb0: 00c38c63 beq x7,x12,80004fc8 + 80004fb4: 5650246f jal x8,80007d18 + 80004fb8: 80004fa8 .word 0x80004fa8 + 80004fbc: 00000000 .word 0x00000000 + 80004fc0: 80016992 .word 0x80016992 + 80004fc4: 00000000 .word 0x00000000 + 80004fc8: 00888893 addi x17,x17,8 + + mv x15, x6 # switch data pointer register to avoid conflict with test + 80004fcc: 00030793 addi x15,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x776a6c58234bf06f + 80004fd0: 0007b303 ld x6,0(x15) + 80004fd4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xd4c11f4dc1c3c2bb + 80004fd8: 0007b303 ld x6,0(x15) + 80004fdc: 00878793 addi x15,x15,8 + +0000000080004fe0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b6: + xperm4 x20, x6, x6 # perform operation + 80004fe0: 28632a33 xperm4 x20,x6,x6 + # Check if x20 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x20, Zbkx_xperm4_cg_cmp_rs1_rs2_b6, Zbkx_xperm4_cg_cmp_rs1_rs2_b6_str) + 80004fe4: 0008b383 ld x7,0(x17) + 80004fe8: 01438c63 beq x7,x20,80005000 + 80004fec: 52d0246f jal x8,80007d18 + 80004ff0: 80004fe0 .word 0x80004fe0 + 80004ff4: 00000000 .word 0x00000000 + 80004ff8: 800169cc .word 0x800169cc + 80004ffc: 00000000 .word 0x00000000 + 80005000: 00888893 addi x17,x17,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005004: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005008: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x8d7ab8771af07235 + 8000500c: 0007b383 ld x7,0(x15) + 80005010: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xcdb3369c3f79d49b + 80005014: 0007b383 ld x7,0(x15) + 80005018: 00878793 addi x15,x15,8 + +000000008000501c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b7: + xperm4 x19, x7, x7 # perform operation + 8000501c: 2873a9b3 xperm4 x19,x7,x7 + # Check if x19 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x19, Zbkx_xperm4_cg_cmp_rs1_rs2_b7, Zbkx_xperm4_cg_cmp_rs1_rs2_b7_str) + 80005020: 0008b683 ld x13,0(x17) + 80005024: 01368c63 beq x13,x19,8000503c + 80005028: 5190276f jal x14,80007d40 + 8000502c: 8000501c .word 0x8000501c + 80005030: 00000000 .word 0x00000000 + 80005034: 80016a06 .word 0x80016a06 + 80005038: 00000000 .word 0x00000000 + 8000503c: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xab239a98f86d667b + 80005040: 0007b403 ld x8,0(x15) + 80005044: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x22a2c6e2d88d0580 + 80005048: 0007b403 ld x8,0(x15) + 8000504c: 00878793 addi x15,x15,8 + +0000000080005050 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b8: + xperm4 x30, x8, x8 # perform operation + 80005050: 28842f33 xperm4 x30,x8,x8 + # Check if x30 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x30, Zbkx_xperm4_cg_cmp_rs1_rs2_b8, Zbkx_xperm4_cg_cmp_rs1_rs2_b8_str) + 80005054: 0008b683 ld x13,0(x17) + 80005058: 01e68c63 beq x13,x30,80005070 + 8000505c: 4e50276f jal x14,80007d40 + 80005060: 80005050 .word 0x80005050 + 80005064: 00000000 .word 0x00000000 + 80005068: 80016a40 .word 0x80016a40 + 8000506c: 00000000 .word 0x00000000 + 80005070: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x38b8ec63f4e239a6 + 80005074: 0007b483 ld x9,0(x15) + 80005078: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x743c1c09a3c442f1 + 8000507c: 0007b483 ld x9,0(x15) + 80005080: 00878793 addi x15,x15,8 + +0000000080005084 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b9: + xperm4 x1, x9, x9 # perform operation + 80005084: 2894a0b3 xperm4 x1,x9,x9 + # Check if x1 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x1, Zbkx_xperm4_cg_cmp_rs1_rs2_b9, Zbkx_xperm4_cg_cmp_rs1_rs2_b9_str) + 80005088: 0008b683 ld x13,0(x17) + 8000508c: 00168c63 beq x13,x1,800050a4 + 80005090: 4b10276f jal x14,80007d40 + 80005094: 80005084 .word 0x80005084 + 80005098: 00000000 .word 0x00000000 + 8000509c: 80016a7a .word 0x80016a7a + 800050a0: 00000000 .word 0x00000000 + 800050a4: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xefd301b9685adf31 + 800050a8: 0007b503 ld x10,0(x15) + 800050ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xaee3acdcb530a4f8 + 800050b0: 0007b503 ld x10,0(x15) + 800050b4: 00878793 addi x15,x15,8 + +00000000800050b8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b10: + xperm4 x3, x10, x10 # perform operation + 800050b8: 28a521b3 xperm4 x3,x10,x10 + # Check if x3 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x3, Zbkx_xperm4_cg_cmp_rs1_rs2_b10, Zbkx_xperm4_cg_cmp_rs1_rs2_b10_str) + 800050bc: 0008b683 ld x13,0(x17) + 800050c0: 00368c63 beq x13,x3,800050d8 + 800050c4: 47d0276f jal x14,80007d40 + 800050c8: 800050b8 .word 0x800050b8 + 800050cc: 00000000 .word 0x00000000 + 800050d0: 80016ab4 .word 0x80016ab4 + 800050d4: 00000000 .word 0x00000000 + 800050d8: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x1cf8adb09c79e094 + 800050dc: 0007b583 ld x11,0(x15) + 800050e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x307ffe89b4846dbf + 800050e4: 0007b583 ld x11,0(x15) + 800050e8: 00878793 addi x15,x15,8 + +00000000800050ec : +Zbkx_xperm4_cg_cmp_rs1_rs2_b11: + xperm4 x20, x11, x11 # perform operation + 800050ec: 28b5aa33 xperm4 x20,x11,x11 + # Check if x20 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x20, Zbkx_xperm4_cg_cmp_rs1_rs2_b11, Zbkx_xperm4_cg_cmp_rs1_rs2_b11_str) + 800050f0: 0008b683 ld x13,0(x17) + 800050f4: 01468c63 beq x13,x20,8000510c + 800050f8: 4490276f jal x14,80007d40 + 800050fc: 800050ec .word 0x800050ec + 80005100: 00000000 .word 0x00000000 + 80005104: 80016aef .word 0x80016aef + 80005108: 00000000 .word 0x00000000 + 8000510c: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xf81b73e7f8ee170a + 80005110: 0007b603 ld x12,0(x15) + 80005114: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xe721ce6ce89d3208 + 80005118: 0007b603 ld x12,0(x15) + 8000511c: 00878793 addi x15,x15,8 + +0000000080005120 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b12: + xperm4 x10, x12, x12 # perform operation + 80005120: 28c62533 xperm4 x10,x12,x12 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zbkx_xperm4_cg_cmp_rs1_rs2_b12, Zbkx_xperm4_cg_cmp_rs1_rs2_b12_str) + 80005124: 0008b683 ld x13,0(x17) + 80005128: 00a68c63 beq x13,x10,80005140 + 8000512c: 4150276f jal x14,80007d40 + 80005130: 80005120 .word 0x80005120 + 80005134: 00000000 .word 0x00000000 + 80005138: 80016b2a .word 0x80016b2a + 8000513c: 00000000 .word 0x00000000 + 80005140: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005144: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005148: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xe97ced0c6fb01ed9 + 8000514c: 0007b683 ld x13,0(x15) + 80005150: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x36e5674d36a04509 + 80005154: 0007b683 ld x13,0(x15) + 80005158: 00878793 addi x15,x15,8 + +000000008000515c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b13: + xperm4 x9, x13, x13 # perform operation + 8000515c: 28d6a4b3 xperm4 x9,x13,x13 + # Check if x9 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x9, Zbkx_xperm4_cg_cmp_rs1_rs2_b13, Zbkx_xperm4_cg_cmp_rs1_rs2_b13_str) + 80005160: 0008b383 ld x7,0(x17) + 80005164: 00938c63 beq x7,x9,8000517c + 80005168: 3b10246f jal x8,80007d18 + 8000516c: 8000515c .word 0x8000515c + 80005170: 00000000 .word 0x00000000 + 80005174: 80016b65 .word 0x80016b65 + 80005178: 00000000 .word 0x00000000 + 8000517c: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xb9ca6491e03dcda7 + 80005180: 0007b703 ld x14,0(x15) + 80005184: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xeb7079cfb4a608b4 + 80005188: 0007b703 ld x14,0(x15) + 8000518c: 00878793 addi x15,x15,8 + +0000000080005190 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b14: + xperm4 x22, x14, x14 # perform operation + 80005190: 28e72b33 xperm4 x22,x14,x14 + # Check if x22 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x22, Zbkx_xperm4_cg_cmp_rs1_rs2_b14, Zbkx_xperm4_cg_cmp_rs1_rs2_b14_str) + 80005194: 0008b383 ld x7,0(x17) + 80005198: 01638c63 beq x7,x22,800051b0 + 8000519c: 37d0246f jal x8,80007d18 + 800051a0: 80005190 .word 0x80005190 + 800051a4: 00000000 .word 0x00000000 + 800051a8: 80016ba0 .word 0x80016ba0 + 800051ac: 00000000 .word 0x00000000 + 800051b0: 00888893 addi x17,x17,8 + + mv x12, x15 # switch data pointer register to avoid conflict with test + 800051b4: 00078613 addi x12,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xda0cecc298b66e6f + 800051b8: 00063783 ld x15,0(x12) + 800051bc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x1c824c5cba811879 + 800051c0: 00063783 ld x15,0(x12) + 800051c4: 00860613 addi x12,x12,8 + +00000000800051c8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b15: + xperm4 x24, x15, x15 # perform operation + 800051c8: 28f7ac33 xperm4 x24,x15,x15 + # Check if x24 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x24, Zbkx_xperm4_cg_cmp_rs1_rs2_b15, Zbkx_xperm4_cg_cmp_rs1_rs2_b15_str) + 800051cc: 0008b383 ld x7,0(x17) + 800051d0: 01838c63 beq x7,x24,800051e8 + 800051d4: 3450246f jal x8,80007d18 + 800051d8: 800051c8 .word 0x800051c8 + 800051dc: 00000000 .word 0x00000000 + 800051e0: 80016bdb .word 0x80016bdb + 800051e4: 00000000 .word 0x00000000 + 800051e8: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xbd3050ab03f95279 + 800051ec: 00063803 ld x16,0(x12) + 800051f0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xeb4b59d34f1b41ea + 800051f4: 00063803 ld x16,0(x12) + 800051f8: 00860613 addi x12,x12,8 + +00000000800051fc : +Zbkx_xperm4_cg_cmp_rs1_rs2_b16: + xperm4 x21, x16, x16 # perform operation + 800051fc: 29082ab3 xperm4 x21,x16,x16 + # Check if x21 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x21, Zbkx_xperm4_cg_cmp_rs1_rs2_b16, Zbkx_xperm4_cg_cmp_rs1_rs2_b16_str) + 80005200: 0008b383 ld x7,0(x17) + 80005204: 01538c63 beq x7,x21,8000521c + 80005208: 3110246f jal x8,80007d18 + 8000520c: 800051fc .word 0x800051fc + 80005210: 00000000 .word 0x00000000 + 80005214: 80016c16 .word 0x80016c16 + 80005218: 00000000 .word 0x00000000 + 8000521c: 00888893 addi x17,x17,8 + + mv x9, x17 # switch signature pointer register to avoid conflict with test + 80005220: 00088493 addi x9,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5b0b8c036f652af4 + 80005224: 00063883 ld x17,0(x12) + 80005228: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x58ae3baaa641cc58 + 8000522c: 00063883 ld x17,0(x12) + 80005230: 00860613 addi x12,x12,8 + +0000000080005234 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b17: + xperm4 x15, x17, x17 # perform operation + 80005234: 2918a7b3 xperm4 x15,x17,x17 + # Check if x15 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x15, Zbkx_xperm4_cg_cmp_rs1_rs2_b17, Zbkx_xperm4_cg_cmp_rs1_rs2_b17_str) + 80005238: 0004b383 ld x7,0(x9) + 8000523c: 00f38c63 beq x7,x15,80005254 + 80005240: 2d90246f jal x8,80007d18 + 80005244: 80005234 .word 0x80005234 + 80005248: 00000000 .word 0x00000000 + 8000524c: 80016c51 .word 0x80016c51 + 80005250: 00000000 .word 0x00000000 + 80005254: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x299b29e6f0489ca0 + 80005258: 00063903 ld x18,0(x12) + 8000525c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x2d0664392c733a9b + 80005260: 00063903 ld x18,0(x12) + 80005264: 00860613 addi x12,x12,8 + +0000000080005268 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b18: + xperm4 x15, x18, x18 # perform operation + 80005268: 292927b3 xperm4 x15,x18,x18 + # Check if x15 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x15, Zbkx_xperm4_cg_cmp_rs1_rs2_b18, Zbkx_xperm4_cg_cmp_rs1_rs2_b18_str) + 8000526c: 0004b383 ld x7,0(x9) + 80005270: 00f38c63 beq x7,x15,80005288 + 80005274: 2a50246f jal x8,80007d18 + 80005278: 80005268 .word 0x80005268 + 8000527c: 00000000 .word 0x00000000 + 80005280: 80016c8c .word 0x80016c8c + 80005284: 00000000 .word 0x00000000 + 80005288: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xc15f7520518530c4 + 8000528c: 00063983 ld x19,0(x12) + 80005290: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0xc092914b72ba9a7c + 80005294: 00063983 ld x19,0(x12) + 80005298: 00860613 addi x12,x12,8 + +000000008000529c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b19: + xperm4 x17, x19, x19 # perform operation + 8000529c: 2939a8b3 xperm4 x17,x19,x19 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zbkx_xperm4_cg_cmp_rs1_rs2_b19, Zbkx_xperm4_cg_cmp_rs1_rs2_b19_str) + 800052a0: 0004b383 ld x7,0(x9) + 800052a4: 01138c63 beq x7,x17,800052bc + 800052a8: 2710246f jal x8,80007d18 + 800052ac: 8000529c .word 0x8000529c + 800052b0: 00000000 .word 0x00000000 + 800052b4: 80016cc7 .word 0x80016cc7 + 800052b8: 00000000 .word 0x00000000 + 800052bc: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x2102e5cbef25850f + 800052c0: 00063a03 ld x20,0(x12) + 800052c4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xec4df92331c2e792 + 800052c8: 00063a03 ld x20,0(x12) + 800052cc: 00860613 addi x12,x12,8 + +00000000800052d0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b20: + xperm4 x0, x20, x20 # perform operation + 800052d0: 294a2033 xperm4 x0,x20,x20 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zbkx_xperm4_cg_cmp_rs1_rs2_b20, Zbkx_xperm4_cg_cmp_rs1_rs2_b20_str) + 800052d4: 0004b383 ld x7,0(x9) + 800052d8: 00038c63 beq x7,x0,800052f0 + 800052dc: 23d0246f jal x8,80007d18 + 800052e0: 800052d0 .word 0x800052d0 + 800052e4: 00000000 .word 0x00000000 + 800052e8: 80016d02 .word 0x80016d02 + 800052ec: 00000000 .word 0x00000000 + 800052f0: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x8b4c8e591713a4be + 800052f4: 00063a83 ld x21,0(x12) + 800052f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xaf60ac90c380acd3 + 800052fc: 00063a83 ld x21,0(x12) + 80005300: 00860613 addi x12,x12,8 + +0000000080005304 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b21: + xperm4 x26, x21, x21 # perform operation + 80005304: 295aad33 xperm4 x26,x21,x21 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkx_xperm4_cg_cmp_rs1_rs2_b21, Zbkx_xperm4_cg_cmp_rs1_rs2_b21_str) + 80005308: 0004b383 ld x7,0(x9) + 8000530c: 01a38c63 beq x7,x26,80005324 + 80005310: 2090246f jal x8,80007d18 + 80005314: 80005304 .word 0x80005304 + 80005318: 00000000 .word 0x00000000 + 8000531c: 80016d3d .word 0x80016d3d + 80005320: 00000000 .word 0x00000000 + 80005324: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x6ea9ec8d937a1dc7 + 80005328: 00063b03 ld x22,0(x12) + 8000532c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x9e04e4b4078c04d1 + 80005330: 00063b03 ld x22,0(x12) + 80005334: 00860613 addi x12,x12,8 + +0000000080005338 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b22: + xperm4 x26, x22, x22 # perform operation + 80005338: 296b2d33 xperm4 x26,x22,x22 + # Check if x26 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x26, Zbkx_xperm4_cg_cmp_rs1_rs2_b22, Zbkx_xperm4_cg_cmp_rs1_rs2_b22_str) + 8000533c: 0004b383 ld x7,0(x9) + 80005340: 01a38c63 beq x7,x26,80005358 + 80005344: 1d50246f jal x8,80007d18 + 80005348: 80005338 .word 0x80005338 + 8000534c: 00000000 .word 0x00000000 + 80005350: 80016d78 .word 0x80016d78 + 80005354: 00000000 .word 0x00000000 + 80005358: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x657c098fdb75cee1 + 8000535c: 00063b83 ld x23,0(x12) + 80005360: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xde14febe4aaad801 + 80005364: 00063b83 ld x23,0(x12) + 80005368: 00860613 addi x12,x12,8 + +000000008000536c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b23: + xperm4 x24, x23, x23 # perform operation + 8000536c: 297bac33 xperm4 x24,x23,x23 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zbkx_xperm4_cg_cmp_rs1_rs2_b23, Zbkx_xperm4_cg_cmp_rs1_rs2_b23_str) + 80005370: 0004b383 ld x7,0(x9) + 80005374: 01838c63 beq x7,x24,8000538c + 80005378: 1a10246f jal x8,80007d18 + 8000537c: 8000536c .word 0x8000536c + 80005380: 00000000 .word 0x00000000 + 80005384: 80016db3 .word 0x80016db3 + 80005388: 00000000 .word 0x00000000 + 8000538c: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x7e0a545057dd7deb + 80005390: 00063c03 ld x24,0(x12) + 80005394: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xfd24e731ec91036a + 80005398: 00063c03 ld x24,0(x12) + 8000539c: 00860613 addi x12,x12,8 + +00000000800053a0 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b24: + xperm4 x13, x24, x24 # perform operation + 800053a0: 298c26b3 xperm4 x13,x24,x24 + # Check if x13 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x13, Zbkx_xperm4_cg_cmp_rs1_rs2_b24, Zbkx_xperm4_cg_cmp_rs1_rs2_b24_str) + 800053a4: 0004b383 ld x7,0(x9) + 800053a8: 00d38c63 beq x7,x13,800053c0 + 800053ac: 16d0246f jal x8,80007d18 + 800053b0: 800053a0 .word 0x800053a0 + 800053b4: 00000000 .word 0x00000000 + 800053b8: 80016dee .word 0x80016dee + 800053bc: 00000000 .word 0x00000000 + 800053c0: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xf03921e8fa80bb78 + 800053c4: 00063c83 ld x25,0(x12) + 800053c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xc4080b3c01aec7bf + 800053cc: 00063c83 ld x25,0(x12) + 800053d0: 00860613 addi x12,x12,8 + +00000000800053d4 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b25: + xperm4 x23, x25, x25 # perform operation + 800053d4: 299cabb3 xperm4 x23,x25,x25 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zbkx_xperm4_cg_cmp_rs1_rs2_b25, Zbkx_xperm4_cg_cmp_rs1_rs2_b25_str) + 800053d8: 0004b383 ld x7,0(x9) + 800053dc: 01738c63 beq x7,x23,800053f4 + 800053e0: 1390246f jal x8,80007d18 + 800053e4: 800053d4 .word 0x800053d4 + 800053e8: 00000000 .word 0x00000000 + 800053ec: 80016e29 .word 0x80016e29 + 800053f0: 00000000 .word 0x00000000 + 800053f4: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x34fb3b9fa3d37a5d + 800053f8: 00063d03 ld x26,0(x12) + 800053fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xad4a105d2feb32d2 + 80005400: 00063d03 ld x26,0(x12) + 80005404: 00860613 addi x12,x12,8 + +0000000080005408 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b26: + xperm4 x27, x26, x26 # perform operation + 80005408: 29ad2db3 xperm4 x27,x26,x26 + # Check if x27 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x27, Zbkx_xperm4_cg_cmp_rs1_rs2_b26, Zbkx_xperm4_cg_cmp_rs1_rs2_b26_str) + 8000540c: 0004b383 ld x7,0(x9) + 80005410: 01b38c63 beq x7,x27,80005428 + 80005414: 1050246f jal x8,80007d18 + 80005418: 80005408 .word 0x80005408 + 8000541c: 00000000 .word 0x00000000 + 80005420: 80016e64 .word 0x80016e64 + 80005424: 00000000 .word 0x00000000 + 80005428: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x35a5581efd8c6065 + 8000542c: 00063d83 ld x27,0(x12) + 80005430: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x815f419b53938a3b + 80005434: 00063d83 ld x27,0(x12) + 80005438: 00860613 addi x12,x12,8 + +000000008000543c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b27: + xperm4 x2, x27, x27 # perform operation + 8000543c: 29bda133 xperm4 x2,x27,x27 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkx_xperm4_cg_cmp_rs1_rs2_b27, Zbkx_xperm4_cg_cmp_rs1_rs2_b27_str) + 80005440: 0004b383 ld x7,0(x9) + 80005444: 00238c63 beq x7,x2,8000545c + 80005448: 0d10246f jal x8,80007d18 + 8000544c: 8000543c .word 0x8000543c + 80005450: 00000000 .word 0x00000000 + 80005454: 80016e9f .word 0x80016e9f + 80005458: 00000000 .word 0x00000000 + 8000545c: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x77648ad6f9fd0a9d + 80005460: 00063e03 ld x28,0(x12) + 80005464: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x1a66e24c677f8be4 + 80005468: 00063e03 ld x28,0(x12) + 8000546c: 00860613 addi x12,x12,8 + +0000000080005470 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b28: + xperm4 x29, x28, x28 # perform operation + 80005470: 29ce2eb3 xperm4 x29,x28,x28 + # Check if x29 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x29, Zbkx_xperm4_cg_cmp_rs1_rs2_b28, Zbkx_xperm4_cg_cmp_rs1_rs2_b28_str) + 80005474: 0004b383 ld x7,0(x9) + 80005478: 01d38c63 beq x7,x29,80005490 + 8000547c: 09d0246f jal x8,80007d18 + 80005480: 80005470 .word 0x80005470 + 80005484: 00000000 .word 0x00000000 + 80005488: 80016eda .word 0x80016eda + 8000548c: 00000000 .word 0x00000000 + 80005490: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x0749fa33cf0eadde + 80005494: 00063e83 ld x29,0(x12) + 80005498: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x202523c74874d10a + 8000549c: 00063e83 ld x29,0(x12) + 800054a0: 00860613 addi x12,x12,8 + +00000000800054a4 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b29: + xperm4 x22, x29, x29 # perform operation + 800054a4: 29deab33 xperm4 x22,x29,x29 + # Check if x22 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x22, Zbkx_xperm4_cg_cmp_rs1_rs2_b29, Zbkx_xperm4_cg_cmp_rs1_rs2_b29_str) + 800054a8: 0004b383 ld x7,0(x9) + 800054ac: 01638c63 beq x7,x22,800054c4 + 800054b0: 0690246f jal x8,80007d18 + 800054b4: 800054a4 .word 0x800054a4 + 800054b8: 00000000 .word 0x00000000 + 800054bc: 80016f15 .word 0x80016f15 + 800054c0: 00000000 .word 0x00000000 + 800054c4: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x1e0072eac3e80a66 + 800054c8: 00063f03 ld x30,0(x12) + 800054cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x4960e04197f4fcb6 + 800054d0: 00063f03 ld x30,0(x12) + 800054d4: 00860613 addi x12,x12,8 + +00000000800054d8 : +Zbkx_xperm4_cg_cmp_rs1_rs2_b30: + xperm4 x6, x30, x30 # perform operation + 800054d8: 29ef2333 xperm4 x6,x30,x30 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkx_xperm4_cg_cmp_rs1_rs2_b30, Zbkx_xperm4_cg_cmp_rs1_rs2_b30_str) + 800054dc: 0004b383 ld x7,0(x9) + 800054e0: 00638c63 beq x7,x6,800054f8 + 800054e4: 0350246f jal x8,80007d18 + 800054e8: 800054d8 .word 0x800054d8 + 800054ec: 00000000 .word 0x00000000 + 800054f0: 80016f50 .word 0x80016f50 + 800054f4: 00000000 .word 0x00000000 + 800054f8: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x8e48bce7b07f08a7 + 800054fc: 00063f83 ld x31,0(x12) + 80005500: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x48d9349681917a97 + 80005504: 00063f83 ld x31,0(x12) + 80005508: 00860613 addi x12,x12,8 + +000000008000550c : +Zbkx_xperm4_cg_cmp_rs1_rs2_b31: + xperm4 x4, x31, x31 # perform operation + 8000550c: 29ffa233 xperm4 x4,x31,x31 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkx_xperm4_cg_cmp_rs1_rs2_b31, Zbkx_xperm4_cg_cmp_rs1_rs2_b31_str) + 80005510: 0004b383 ld x7,0(x9) + 80005514: 00438c63 beq x7,x4,8000552c + 80005518: 0010246f jal x8,80007d18 + 8000551c: 8000550c .word 0x8000550c + 80005520: 00000000 .word 0x00000000 + 80005524: 80016f8b .word 0x80016f8b + 80005528: 00000000 .word 0x00000000 + 8000552c: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x31a03fbd395bdfd2 + 80005530: 00063003 ld x0,0(x12) + 80005534: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x7a99659cca87ab2b + 80005538: 00063f83 ld x31,0(x12) + 8000553c: 00860613 addi x12,x12,8 + +0000000080005540 : +Zbkx_xperm4_cg_cmp_rd_rs1_b0: + xperm4 x0, x0, x31 # perform operation + 80005540: 29f02033 xperm4 x0,x0,x31 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zbkx_xperm4_cg_cmp_rd_rs1_b0, Zbkx_xperm4_cg_cmp_rd_rs1_b0_str) + 80005544: 0004b383 ld x7,0(x9) + 80005548: 00038c63 beq x7,x0,80005560 + 8000554c: 7cc0246f jal x8,80007d18 + 80005550: 80005540 .word 0x80005540 + 80005554: 00000000 .word 0x00000000 + 80005558: 80016fc6 .word 0x80016fc6 + 8000555c: 00000000 .word 0x00000000 + 80005560: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x050050eba5c49319 + 80005564: 00063083 ld x1,0(x12) + 80005568: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xab39934cd327ce17 + 8000556c: 00063203 ld x4,0(x12) + 80005570: 00860613 addi x12,x12,8 + +0000000080005574 : +Zbkx_xperm4_cg_cmp_rd_rs1_b1: + xperm4 x1, x1, x4 # perform operation + 80005574: 2840a0b3 xperm4 x1,x1,x4 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zbkx_xperm4_cg_cmp_rd_rs1_b1, Zbkx_xperm4_cg_cmp_rd_rs1_b1_str) + 80005578: 0004b383 ld x7,0(x9) + 8000557c: 00138c63 beq x7,x1,80005594 + 80005580: 7980246f jal x8,80007d18 + 80005584: 80005574 .word 0x80005574 + 80005588: 00000000 .word 0x00000000 + 8000558c: 80016fff .word 0x80016fff + 80005590: 00000000 .word 0x00000000 + 80005594: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xee8acbc49a8fdfae + 80005598: 00063103 ld x2,0(x12) + 8000559c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x9bac13d261c5e6e8 + 800055a0: 00063e03 ld x28,0(x12) + 800055a4: 00860613 addi x12,x12,8 + +00000000800055a8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b2: + xperm4 x2, x2, x28 # perform operation + 800055a8: 29c12133 xperm4 x2,x2,x28 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zbkx_xperm4_cg_cmp_rd_rs1_b2, Zbkx_xperm4_cg_cmp_rd_rs1_b2_str) + 800055ac: 0004b383 ld x7,0(x9) + 800055b0: 00238c63 beq x7,x2,800055c8 + 800055b4: 7640246f jal x8,80007d18 + 800055b8: 800055a8 .word 0x800055a8 + 800055bc: 00000000 .word 0x00000000 + 800055c0: 80017038 .word 0x80017038 + 800055c4: 00000000 .word 0x00000000 + 800055c8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xcd40d1528cc8c49a + 800055cc: 00063183 ld x3,0(x12) + 800055d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7f9a1da86b076022 + 800055d4: 00063f03 ld x30,0(x12) + 800055d8: 00860613 addi x12,x12,8 + +00000000800055dc : +Zbkx_xperm4_cg_cmp_rd_rs1_b3: + xperm4 x3, x3, x30 # perform operation + 800055dc: 29e1a1b3 xperm4 x3,x3,x30 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zbkx_xperm4_cg_cmp_rd_rs1_b3, Zbkx_xperm4_cg_cmp_rd_rs1_b3_str) + 800055e0: 0004b383 ld x7,0(x9) + 800055e4: 00338c63 beq x7,x3,800055fc + 800055e8: 7300246f jal x8,80007d18 + 800055ec: 800055dc .word 0x800055dc + 800055f0: 00000000 .word 0x00000000 + 800055f4: 80017071 .word 0x80017071 + 800055f8: 00000000 .word 0x00000000 + 800055fc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xc1fa61805bf9244d + 80005600: 00063203 ld x4,0(x12) + 80005604: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x93e31ec480ecaf8f + 80005608: 00063b83 ld x23,0(x12) + 8000560c: 00860613 addi x12,x12,8 + +0000000080005610 : +Zbkx_xperm4_cg_cmp_rd_rs1_b4: + xperm4 x4, x4, x23 # perform operation + 80005610: 29722233 xperm4 x4,x4,x23 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs1_b4, Zbkx_xperm4_cg_cmp_rd_rs1_b4_str) + 80005614: 0004b383 ld x7,0(x9) + 80005618: 00438c63 beq x7,x4,80005630 + 8000561c: 6fc0246f jal x8,80007d18 + 80005620: 80005610 .word 0x80005610 + 80005624: 00000000 .word 0x00000000 + 80005628: 800170aa .word 0x800170aa + 8000562c: 00000000 .word 0x00000000 + 80005630: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xab32ca980c9002cb + 80005634: 00063283 ld x5,0(x12) + 80005638: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x097fbe3d8b9e6453 + 8000563c: 00063d83 ld x27,0(x12) + 80005640: 00860613 addi x12,x12,8 + +0000000080005644 : +Zbkx_xperm4_cg_cmp_rd_rs1_b5: + xperm4 x5, x5, x27 # perform operation + 80005644: 29b2a2b3 xperm4 x5,x5,x27 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs1_b5, Zbkx_xperm4_cg_cmp_rd_rs1_b5_str) + 80005648: 0004b383 ld x7,0(x9) + 8000564c: 00538c63 beq x7,x5,80005664 + 80005650: 6c80246f jal x8,80007d18 + 80005654: 80005644 .word 0x80005644 + 80005658: 00000000 .word 0x00000000 + 8000565c: 800170e3 .word 0x800170e3 + 80005660: 00000000 .word 0x00000000 + 80005664: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x4235e1c827a11ded + 80005668: 00063303 ld x6,0(x12) + 8000566c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xa5525e82d7bb46e2 + 80005670: 00063e03 ld x28,0(x12) + 80005674: 00860613 addi x12,x12,8 + +0000000080005678 : +Zbkx_xperm4_cg_cmp_rd_rs1_b6: + xperm4 x6, x6, x28 # perform operation + 80005678: 29c32333 xperm4 x6,x6,x28 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs1_b6, Zbkx_xperm4_cg_cmp_rd_rs1_b6_str) + 8000567c: 0004b383 ld x7,0(x9) + 80005680: 00638c63 beq x7,x6,80005698 + 80005684: 6940246f jal x8,80007d18 + 80005688: 80005678 .word 0x80005678 + 8000568c: 00000000 .word 0x00000000 + 80005690: 8001711c .word 0x8001711c + 80005694: 00000000 .word 0x00000000 + 80005698: 00848493 addi x9,x9,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000569c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056a0: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x339f2f9071c65202 + 800056a4: 00063383 ld x7,0(x12) + 800056a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x82262f6d7262d67d + 800056ac: 00063103 ld x2,0(x12) + 800056b0: 00860613 addi x12,x12,8 + +00000000800056b4 : +Zbkx_xperm4_cg_cmp_rd_rs1_b7: + xperm4 x7, x7, x2 # perform operation + 800056b4: 2823a3b3 xperm4 x7,x7,x2 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zbkx_xperm4_cg_cmp_rd_rs1_b7, Zbkx_xperm4_cg_cmp_rd_rs1_b7_str) + 800056b8: 0004b683 ld x13,0(x9) + 800056bc: 00768c63 beq x13,x7,800056d4 + 800056c0: 6800276f jal x14,80007d40 + 800056c4: 800056b4 .word 0x800056b4 + 800056c8: 00000000 .word 0x00000000 + 800056cc: 80017155 .word 0x80017155 + 800056d0: 00000000 .word 0x00000000 + 800056d4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xe8ad7594cb6fe751 + 800056d8: 00063403 ld x8,0(x12) + 800056dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x142ba1dd26cbd203 + 800056e0: 00063a03 ld x20,0(x12) + 800056e4: 00860613 addi x12,x12,8 + +00000000800056e8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b8: + xperm4 x8, x8, x20 # perform operation + 800056e8: 29442433 xperm4 x8,x8,x20 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zbkx_xperm4_cg_cmp_rd_rs1_b8, Zbkx_xperm4_cg_cmp_rd_rs1_b8_str) + 800056ec: 0004b683 ld x13,0(x9) + 800056f0: 00868c63 beq x13,x8,80005708 + 800056f4: 64c0276f jal x14,80007d40 + 800056f8: 800056e8 .word 0x800056e8 + 800056fc: 00000000 .word 0x00000000 + 80005700: 8001718e .word 0x8001718e + 80005704: 00000000 .word 0x00000000 + 80005708: 00848493 addi x9,x9,8 + + mv x28, x9 # switch signature pointer register to avoid conflict with test + 8000570c: 00048e13 addi x28,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xb9a5df79e1d7116f + 80005710: 00063483 ld x9,0(x12) + 80005714: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x9d9c6c47aa535b1a + 80005718: 00063e83 ld x29,0(x12) + 8000571c: 00860613 addi x12,x12,8 + +0000000080005720 : +Zbkx_xperm4_cg_cmp_rd_rs1_b9: + xperm4 x9, x9, x29 # perform operation + 80005720: 29d4a4b3 xperm4 x9,x9,x29 + # Check if x9 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x9, Zbkx_xperm4_cg_cmp_rd_rs1_b9, Zbkx_xperm4_cg_cmp_rd_rs1_b9_str) + 80005724: 000e3683 ld x13,0(x28) + 80005728: 00968c63 beq x13,x9,80005740 + 8000572c: 6140276f jal x14,80007d40 + 80005730: 80005720 .word 0x80005720 + 80005734: 00000000 .word 0x00000000 + 80005738: 800171c7 .word 0x800171c7 + 8000573c: 00000000 .word 0x00000000 + 80005740: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x533ebea96ede19b9 + 80005744: 00063503 ld x10,0(x12) + 80005748: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x8e1546341eec8dc5 + 8000574c: 00063f03 ld x30,0(x12) + 80005750: 00860613 addi x12,x12,8 + +0000000080005754 : +Zbkx_xperm4_cg_cmp_rd_rs1_b10: + xperm4 x10, x10, x30 # perform operation + 80005754: 29e52533 xperm4 x10,x10,x30 + # Check if x10 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x10, Zbkx_xperm4_cg_cmp_rd_rs1_b10, Zbkx_xperm4_cg_cmp_rd_rs1_b10_str) + 80005758: 000e3683 ld x13,0(x28) + 8000575c: 00a68c63 beq x13,x10,80005774 + 80005760: 5e00276f jal x14,80007d40 + 80005764: 80005754 .word 0x80005754 + 80005768: 00000000 .word 0x00000000 + 8000576c: 80017200 .word 0x80017200 + 80005770: 00000000 .word 0x00000000 + 80005774: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x820ea036614be8fd + 80005778: 00063583 ld x11,0(x12) + 8000577c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xef7bf728e1093f3a + 80005780: 00063483 ld x9,0(x12) + 80005784: 00860613 addi x12,x12,8 + +0000000080005788 : +Zbkx_xperm4_cg_cmp_rd_rs1_b11: + xperm4 x11, x11, x9 # perform operation + 80005788: 2895a5b3 xperm4 x11,x11,x9 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zbkx_xperm4_cg_cmp_rd_rs1_b11, Zbkx_xperm4_cg_cmp_rd_rs1_b11_str) + 8000578c: 000e3683 ld x13,0(x28) + 80005790: 00b68c63 beq x13,x11,800057a8 + 80005794: 5ac0276f jal x14,80007d40 + 80005798: 80005788 .word 0x80005788 + 8000579c: 00000000 .word 0x00000000 + 800057a0: 8001723a .word 0x8001723a + 800057a4: 00000000 .word 0x00000000 + 800057a8: 008e0e13 addi x28,x28,8 + + mv x15, x12 # switch data pointer register to avoid conflict with test + 800057ac: 00060793 addi x15,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xc18f1887ee672808 + 800057b0: 0007b603 ld x12,0(x15) + 800057b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xab2a62bceedfea66 + 800057b8: 0007b483 ld x9,0(x15) + 800057bc: 00878793 addi x15,x15,8 + +00000000800057c0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b12: + xperm4 x12, x12, x9 # perform operation + 800057c0: 28962633 xperm4 x12,x12,x9 + # Check if x12 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x12, Zbkx_xperm4_cg_cmp_rd_rs1_b12, Zbkx_xperm4_cg_cmp_rd_rs1_b12_str) + 800057c4: 000e3683 ld x13,0(x28) + 800057c8: 00c68c63 beq x13,x12,800057e0 + 800057cc: 5740276f jal x14,80007d40 + 800057d0: 800057c0 .word 0x800057c0 + 800057d4: 00000000 .word 0x00000000 + 800057d8: 80017274 .word 0x80017274 + 800057dc: 00000000 .word 0x00000000 + 800057e0: 008e0e13 addi x28,x28,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057e4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800057e8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xa7b560c5b57f6b3b + 800057ec: 0007b683 ld x13,0(x15) + 800057f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x7550bd646b70739f + 800057f4: 0007b603 ld x12,0(x15) + 800057f8: 00878793 addi x15,x15,8 + +00000000800057fc : +Zbkx_xperm4_cg_cmp_rd_rs1_b13: + xperm4 x13, x13, x12 # perform operation + 800057fc: 28c6a6b3 xperm4 x13,x13,x12 + # Check if x13 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x13, Zbkx_xperm4_cg_cmp_rd_rs1_b13, Zbkx_xperm4_cg_cmp_rd_rs1_b13_str) + 80005800: 000e3383 ld x7,0(x28) + 80005804: 00d38c63 beq x7,x13,8000581c + 80005808: 5100246f jal x8,80007d18 + 8000580c: 800057fc .word 0x800057fc + 80005810: 00000000 .word 0x00000000 + 80005814: 800172ae .word 0x800172ae + 80005818: 00000000 .word 0x00000000 + 8000581c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x536d427ca6324260 + 80005820: 0007b703 ld x14,0(x15) + 80005824: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x68cc4c55dd670c9b + 80005828: 0007be83 ld x29,0(x15) + 8000582c: 00878793 addi x15,x15,8 + +0000000080005830 : +Zbkx_xperm4_cg_cmp_rd_rs1_b14: + xperm4 x14, x14, x29 # perform operation + 80005830: 29d72733 xperm4 x14,x14,x29 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zbkx_xperm4_cg_cmp_rd_rs1_b14, Zbkx_xperm4_cg_cmp_rd_rs1_b14_str) + 80005834: 000e3383 ld x7,0(x28) + 80005838: 00e38c63 beq x7,x14,80005850 + 8000583c: 4dc0246f jal x8,80007d18 + 80005840: 80005830 .word 0x80005830 + 80005844: 00000000 .word 0x00000000 + 80005848: 800172e8 .word 0x800172e8 + 8000584c: 00000000 .word 0x00000000 + 80005850: 008e0e13 addi x28,x28,8 + + mv x26, x15 # switch data pointer register to avoid conflict with test + 80005854: 00078d13 addi x26,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x8191dc4db98671c2 + 80005858: 000d3783 ld x15,0(x26) + 8000585c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0x6b8050730793b8b4 + 80005860: 000d3083 ld x1,0(x26) + 80005864: 008d0d13 addi x26,x26,8 + +0000000080005868 : +Zbkx_xperm4_cg_cmp_rd_rs1_b15: + xperm4 x15, x15, x1 # perform operation + 80005868: 2817a7b3 xperm4 x15,x15,x1 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zbkx_xperm4_cg_cmp_rd_rs1_b15, Zbkx_xperm4_cg_cmp_rd_rs1_b15_str) + 8000586c: 000e3383 ld x7,0(x28) + 80005870: 00f38c63 beq x7,x15,80005888 + 80005874: 4a40246f jal x8,80007d18 + 80005878: 80005868 .word 0x80005868 + 8000587c: 00000000 .word 0x00000000 + 80005880: 80017322 .word 0x80017322 + 80005884: 00000000 .word 0x00000000 + 80005888: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xb9b1451dcf869612 + 8000588c: 000d3803 ld x16,0(x26) + 80005890: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0x67ba569dda8d78d9 + 80005894: 000d3603 ld x12,0(x26) + 80005898: 008d0d13 addi x26,x26,8 + +000000008000589c : +Zbkx_xperm4_cg_cmp_rd_rs1_b16: + xperm4 x16, x16, x12 # perform operation + 8000589c: 28c82833 xperm4 x16,x16,x12 + # Check if x16 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x16, Zbkx_xperm4_cg_cmp_rd_rs1_b16, Zbkx_xperm4_cg_cmp_rd_rs1_b16_str) + 800058a0: 000e3383 ld x7,0(x28) + 800058a4: 01038c63 beq x7,x16,800058bc + 800058a8: 4700246f jal x8,80007d18 + 800058ac: 8000589c .word 0x8000589c + 800058b0: 00000000 .word 0x00000000 + 800058b4: 8001735c .word 0x8001735c + 800058b8: 00000000 .word 0x00000000 + 800058bc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xab715ad3f16001a9 + 800058c0: 000d3883 ld x17,0(x26) + 800058c4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xa4c1c74a7f5a7abf + 800058c8: 000d3b83 ld x23,0(x26) + 800058cc: 008d0d13 addi x26,x26,8 + +00000000800058d0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b17: + xperm4 x17, x17, x23 # perform operation + 800058d0: 2978a8b3 xperm4 x17,x17,x23 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zbkx_xperm4_cg_cmp_rd_rs1_b17, Zbkx_xperm4_cg_cmp_rd_rs1_b17_str) + 800058d4: 000e3383 ld x7,0(x28) + 800058d8: 01138c63 beq x7,x17,800058f0 + 800058dc: 43c0246f jal x8,80007d18 + 800058e0: 800058d0 .word 0x800058d0 + 800058e4: 00000000 .word 0x00000000 + 800058e8: 80017396 .word 0x80017396 + 800058ec: 00000000 .word 0x00000000 + 800058f0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x4ffa460dca343f2e + 800058f4: 000d3903 ld x18,0(x26) + 800058f8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x024e73e6c0fd061a + 800058fc: 000d3183 ld x3,0(x26) + 80005900: 008d0d13 addi x26,x26,8 + +0000000080005904 : +Zbkx_xperm4_cg_cmp_rd_rs1_b18: + xperm4 x18, x18, x3 # perform operation + 80005904: 28392933 xperm4 x18,x18,x3 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zbkx_xperm4_cg_cmp_rd_rs1_b18, Zbkx_xperm4_cg_cmp_rd_rs1_b18_str) + 80005908: 000e3383 ld x7,0(x28) + 8000590c: 01238c63 beq x7,x18,80005924 + 80005910: 4080246f jal x8,80007d18 + 80005914: 80005904 .word 0x80005904 + 80005918: 00000000 .word 0x00000000 + 8000591c: 800173d0 .word 0x800173d0 + 80005920: 00000000 .word 0x00000000 + 80005924: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x0844c5cbe18e831e + 80005928: 000d3983 ld x19,0(x26) + 8000592c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x4e9f520b85f5971f + 80005930: 000d3a03 ld x20,0(x26) + 80005934: 008d0d13 addi x26,x26,8 + +0000000080005938 : +Zbkx_xperm4_cg_cmp_rd_rs1_b19: + xperm4 x19, x19, x20 # perform operation + 80005938: 2949a9b3 xperm4 x19,x19,x20 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zbkx_xperm4_cg_cmp_rd_rs1_b19, Zbkx_xperm4_cg_cmp_rd_rs1_b19_str) + 8000593c: 000e3383 ld x7,0(x28) + 80005940: 01338c63 beq x7,x19,80005958 + 80005944: 3d40246f jal x8,80007d18 + 80005948: 80005938 .word 0x80005938 + 8000594c: 00000000 .word 0x00000000 + 80005950: 8001740a .word 0x8001740a + 80005954: 00000000 .word 0x00000000 + 80005958: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0xda3761b3dbe00051 + 8000595c: 000d3a03 ld x20,0(x26) + 80005960: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x6d08dedbf8e8c6f1 + 80005964: 000d3e83 ld x29,0(x26) + 80005968: 008d0d13 addi x26,x26,8 + +000000008000596c : +Zbkx_xperm4_cg_cmp_rd_rs1_b20: + xperm4 x20, x20, x29 # perform operation + 8000596c: 29da2a33 xperm4 x20,x20,x29 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zbkx_xperm4_cg_cmp_rd_rs1_b20, Zbkx_xperm4_cg_cmp_rd_rs1_b20_str) + 80005970: 000e3383 ld x7,0(x28) + 80005974: 01438c63 beq x7,x20,8000598c + 80005978: 3a00246f jal x8,80007d18 + 8000597c: 8000596c .word 0x8000596c + 80005980: 00000000 .word 0x00000000 + 80005984: 80017444 .word 0x80017444 + 80005988: 00000000 .word 0x00000000 + 8000598c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x8d99b4a19ff0b6cb + 80005990: 000d3a83 ld x21,0(x26) + 80005994: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0xe14aa552da7bfca2 + 80005998: 000d3783 ld x15,0(x26) + 8000599c: 008d0d13 addi x26,x26,8 + +00000000800059a0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b21: + xperm4 x21, x21, x15 # perform operation + 800059a0: 28faaab3 xperm4 x21,x21,x15 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zbkx_xperm4_cg_cmp_rd_rs1_b21, Zbkx_xperm4_cg_cmp_rd_rs1_b21_str) + 800059a4: 000e3383 ld x7,0(x28) + 800059a8: 01538c63 beq x7,x21,800059c0 + 800059ac: 36c0246f jal x8,80007d18 + 800059b0: 800059a0 .word 0x800059a0 + 800059b4: 00000000 .word 0x00000000 + 800059b8: 8001747e .word 0x8001747e + 800059bc: 00000000 .word 0x00000000 + 800059c0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xd8d942216e688db5 + 800059c4: 000d3b03 ld x22,0(x26) + 800059c8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0x88c3d076d100e79b + 800059cc: 000d3003 ld x0,0(x26) + 800059d0: 008d0d13 addi x26,x26,8 + +00000000800059d4 : +Zbkx_xperm4_cg_cmp_rd_rs1_b22: + xperm4 x22, x22, x0 # perform operation + 800059d4: 280b2b33 xperm4 x22,x22,x0 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zbkx_xperm4_cg_cmp_rd_rs1_b22, Zbkx_xperm4_cg_cmp_rd_rs1_b22_str) + 800059d8: 000e3383 ld x7,0(x28) + 800059dc: 01638c63 beq x7,x22,800059f4 + 800059e0: 3380246f jal x8,80007d18 + 800059e4: 800059d4 .word 0x800059d4 + 800059e8: 00000000 .word 0x00000000 + 800059ec: 800174b8 .word 0x800174b8 + 800059f0: 00000000 .word 0x00000000 + 800059f4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x9e3543965b3efeea + 800059f8: 000d3b83 ld x23,0(x26) + 800059fc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xa8670196e8c1bda6 + 80005a00: 000d3f03 ld x30,0(x26) + 80005a04: 008d0d13 addi x26,x26,8 + +0000000080005a08 : +Zbkx_xperm4_cg_cmp_rd_rs1_b23: + xperm4 x23, x23, x30 # perform operation + 80005a08: 29ebabb3 xperm4 x23,x23,x30 + # Check if x23 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x23, Zbkx_xperm4_cg_cmp_rd_rs1_b23, Zbkx_xperm4_cg_cmp_rd_rs1_b23_str) + 80005a0c: 000e3383 ld x7,0(x28) + 80005a10: 01738c63 beq x7,x23,80005a28 + 80005a14: 3040246f jal x8,80007d18 + 80005a18: 80005a08 .word 0x80005a08 + 80005a1c: 00000000 .word 0x00000000 + 80005a20: 800174f2 .word 0x800174f2 + 80005a24: 00000000 .word 0x00000000 + 80005a28: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xb76378a7dc236ddb + 80005a2c: 000d3c03 ld x24,0(x26) + 80005a30: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs2: x5 = 0xe0f95f374fc3444c + 80005a34: 000d3283 ld x5,0(x26) + 80005a38: 008d0d13 addi x26,x26,8 + +0000000080005a3c : +Zbkx_xperm4_cg_cmp_rd_rs1_b24: + xperm4 x24, x24, x5 # perform operation + 80005a3c: 285c2c33 xperm4 x24,x24,x5 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zbkx_xperm4_cg_cmp_rd_rs1_b24, Zbkx_xperm4_cg_cmp_rd_rs1_b24_str) + 80005a40: 000e3383 ld x7,0(x28) + 80005a44: 01838c63 beq x7,x24,80005a5c + 80005a48: 2d00246f jal x8,80007d18 + 80005a4c: 80005a3c .word 0x80005a3c + 80005a50: 00000000 .word 0x00000000 + 80005a54: 8001752c .word 0x8001752c + 80005a58: 00000000 .word 0x00000000 + 80005a5c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xbbb58e6dafee634e + 80005a60: 000d3c83 ld x25,0(x26) + 80005a64: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x3ead22a3a5fc50b3 + 80005a68: 000d3703 ld x14,0(x26) + 80005a6c: 008d0d13 addi x26,x26,8 + +0000000080005a70 : +Zbkx_xperm4_cg_cmp_rd_rs1_b25: + xperm4 x25, x25, x14 # perform operation + 80005a70: 28ecacb3 xperm4 x25,x25,x14 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zbkx_xperm4_cg_cmp_rd_rs1_b25, Zbkx_xperm4_cg_cmp_rd_rs1_b25_str) + 80005a74: 000e3383 ld x7,0(x28) + 80005a78: 01938c63 beq x7,x25,80005a90 + 80005a7c: 29c0246f jal x8,80007d18 + 80005a80: 80005a70 .word 0x80005a70 + 80005a84: 00000000 .word 0x00000000 + 80005a88: 80017566 .word 0x80017566 + 80005a8c: 00000000 .word 0x00000000 + 80005a90: 008e0e13 addi x28,x28,8 + + mv x10, x26 # switch data pointer register to avoid conflict with test + 80005a94: 000d0513 addi x10,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xb59397c510a6ddb7 + 80005a98: 00053d03 ld x26,0(x10) + 80005a9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaa7dcede0335a2f8 + 80005aa0: 00053c03 ld x24,0(x10) + 80005aa4: 00850513 addi x10,x10,8 + +0000000080005aa8 : +Zbkx_xperm4_cg_cmp_rd_rs1_b26: + xperm4 x26, x26, x24 # perform operation + 80005aa8: 298d2d33 xperm4 x26,x26,x24 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zbkx_xperm4_cg_cmp_rd_rs1_b26, Zbkx_xperm4_cg_cmp_rd_rs1_b26_str) + 80005aac: 000e3383 ld x7,0(x28) + 80005ab0: 01a38c63 beq x7,x26,80005ac8 + 80005ab4: 2640246f jal x8,80007d18 + 80005ab8: 80005aa8 .word 0x80005aa8 + 80005abc: 00000000 .word 0x00000000 + 80005ac0: 800175a0 .word 0x800175a0 + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x051fa152c6f6f97f + 80005acc: 00053d83 ld x27,0(x10) + 80005ad0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x9a9afbebe2abcec2 + 80005ad4: 00053303 ld x6,0(x10) + 80005ad8: 00850513 addi x10,x10,8 + +0000000080005adc : +Zbkx_xperm4_cg_cmp_rd_rs1_b27: + xperm4 x27, x27, x6 # perform operation + 80005adc: 286dadb3 xperm4 x27,x27,x6 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zbkx_xperm4_cg_cmp_rd_rs1_b27, Zbkx_xperm4_cg_cmp_rd_rs1_b27_str) + 80005ae0: 000e3383 ld x7,0(x28) + 80005ae4: 01b38c63 beq x7,x27,80005afc + 80005ae8: 2300246f jal x8,80007d18 + 80005aec: 80005adc .word 0x80005adc + 80005af0: 00000000 .word 0x00000000 + 80005af4: 800175da .word 0x800175da + 80005af8: 00000000 .word 0x00000000 + 80005afc: 008e0e13 addi x28,x28,8 + + mv x21, x28 # switch signature pointer register to avoid conflict with test + 80005b00: 000e0a93 addi x21,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xa5fba4d972d0d8a5 + 80005b04: 00053e03 ld x28,0(x10) + 80005b08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x92136d0f5066d3b4 + 80005b0c: 00053b03 ld x22,0(x10) + 80005b10: 00850513 addi x10,x10,8 + +0000000080005b14 : +Zbkx_xperm4_cg_cmp_rd_rs1_b28: + xperm4 x28, x28, x22 # perform operation + 80005b14: 296e2e33 xperm4 x28,x28,x22 + # Check if x28 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x28, Zbkx_xperm4_cg_cmp_rd_rs1_b28, Zbkx_xperm4_cg_cmp_rd_rs1_b28_str) + 80005b18: 000ab383 ld x7,0(x21) + 80005b1c: 01c38c63 beq x7,x28,80005b34 + 80005b20: 1f80246f jal x8,80007d18 + 80005b24: 80005b14 .word 0x80005b14 + 80005b28: 00000000 .word 0x00000000 + 80005b2c: 80017614 .word 0x80017614 + 80005b30: 00000000 .word 0x00000000 + 80005b34: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x93bfc3a60f41c187 + 80005b38: 00053e83 ld x29,0(x10) + 80005b3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xbbf17fd74f1d885a + 80005b40: 00053f83 ld x31,0(x10) + 80005b44: 00850513 addi x10,x10,8 + +0000000080005b48 : +Zbkx_xperm4_cg_cmp_rd_rs1_b29: + xperm4 x29, x29, x31 # perform operation + 80005b48: 29feaeb3 xperm4 x29,x29,x31 + # Check if x29 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x29, Zbkx_xperm4_cg_cmp_rd_rs1_b29, Zbkx_xperm4_cg_cmp_rd_rs1_b29_str) + 80005b4c: 000ab383 ld x7,0(x21) + 80005b50: 01d38c63 beq x7,x29,80005b68 + 80005b54: 1c40246f jal x8,80007d18 + 80005b58: 80005b48 .word 0x80005b48 + 80005b5c: 00000000 .word 0x00000000 + 80005b60: 8001764e .word 0x8001764e + 80005b64: 00000000 .word 0x00000000 + 80005b68: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xb351b093ea312907 + 80005b6c: 00053f03 ld x30,0(x10) + 80005b70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x28fecc75980fb15c + 80005b74: 00053983 ld x19,0(x10) + 80005b78: 00850513 addi x10,x10,8 + +0000000080005b7c : +Zbkx_xperm4_cg_cmp_rd_rs1_b30: + xperm4 x30, x30, x19 # perform operation + 80005b7c: 293f2f33 xperm4 x30,x30,x19 + # Check if x30 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x30, Zbkx_xperm4_cg_cmp_rd_rs1_b30, Zbkx_xperm4_cg_cmp_rd_rs1_b30_str) + 80005b80: 000ab383 ld x7,0(x21) + 80005b84: 01e38c63 beq x7,x30,80005b9c + 80005b88: 1900246f jal x8,80007d18 + 80005b8c: 80005b7c .word 0x80005b7c + 80005b90: 00000000 .word 0x00000000 + 80005b94: 80017688 .word 0x80017688 + 80005b98: 00000000 .word 0x00000000 + 80005b9c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xa2eab7bc4331a7c7 + 80005ba0: 00053f83 ld x31,0(x10) + 80005ba4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xcfe9c39c2c36bd6d + 80005ba8: 00053b03 ld x22,0(x10) + 80005bac: 00850513 addi x10,x10,8 + +0000000080005bb0 : +Zbkx_xperm4_cg_cmp_rd_rs1_b31: + xperm4 x31, x31, x22 # perform operation + 80005bb0: 296fafb3 xperm4 x31,x31,x22 + # Check if x31 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x31, Zbkx_xperm4_cg_cmp_rd_rs1_b31, Zbkx_xperm4_cg_cmp_rd_rs1_b31_str) + 80005bb4: 000ab383 ld x7,0(x21) + 80005bb8: 01f38c63 beq x7,x31,80005bd0 + 80005bbc: 15c0246f jal x8,80007d18 + 80005bc0: 80005bb0 .word 0x80005bb0 + 80005bc4: 00000000 .word 0x00000000 + 80005bc8: 800176c2 .word 0x800176c2 + 80005bcc: 00000000 .word 0x00000000 + 80005bd0: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x63ab19fad0db72e0 + 80005bd4: 00053683 ld x13,0(x10) + 80005bd8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x65acce99fe931fc8 + 80005bdc: 00053003 ld x0,0(x10) + 80005be0: 00850513 addi x10,x10,8 + +0000000080005be4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b0: + xperm4 x0, x13, x0 # perform operation + 80005be4: 2806a033 xperm4 x0,x13,x0 + # Check if x0 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x0, Zbkx_xperm4_cg_cmp_rd_rs2_b0, Zbkx_xperm4_cg_cmp_rd_rs2_b0_str) + 80005be8: 000ab383 ld x7,0(x21) + 80005bec: 00038c63 beq x7,x0,80005c04 + 80005bf0: 1280246f jal x8,80007d18 + 80005bf4: 80005be4 .word 0x80005be4 + 80005bf8: 00000000 .word 0x00000000 + 80005bfc: 800176fc .word 0x800176fc + 80005c00: 00000000 .word 0x00000000 + 80005c04: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x6d419c6004a40b71 + 80005c08: 00053103 ld x2,0(x10) + 80005c0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x39eb7da2380cb9dc + 80005c10: 00053083 ld x1,0(x10) + 80005c14: 00850513 addi x10,x10,8 + +0000000080005c18 : +Zbkx_xperm4_cg_cmp_rd_rs2_b1: + xperm4 x1, x2, x1 # perform operation + 80005c18: 281120b3 xperm4 x1,x2,x1 + # Check if x1 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x1, Zbkx_xperm4_cg_cmp_rd_rs2_b1, Zbkx_xperm4_cg_cmp_rd_rs2_b1_str) + 80005c1c: 000ab383 ld x7,0(x21) + 80005c20: 00138c63 beq x7,x1,80005c38 + 80005c24: 0f40246f jal x8,80007d18 + 80005c28: 80005c18 .word 0x80005c18 + 80005c2c: 00000000 .word 0x00000000 + 80005c30: 80017735 .word 0x80017735 + 80005c34: 00000000 .word 0x00000000 + 80005c38: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf672dd58dfb666f8 + 80005c3c: 00053303 ld x6,0(x10) + 80005c40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x87dd7bb7c3efb8b1 + 80005c44: 00053103 ld x2,0(x10) + 80005c48: 00850513 addi x10,x10,8 + +0000000080005c4c : +Zbkx_xperm4_cg_cmp_rd_rs2_b2: + xperm4 x2, x6, x2 # perform operation + 80005c4c: 28232133 xperm4 x2,x6,x2 + # Check if x2 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x2, Zbkx_xperm4_cg_cmp_rd_rs2_b2, Zbkx_xperm4_cg_cmp_rd_rs2_b2_str) + 80005c50: 000ab383 ld x7,0(x21) + 80005c54: 00238c63 beq x7,x2,80005c6c + 80005c58: 0c00246f jal x8,80007d18 + 80005c5c: 80005c4c .word 0x80005c4c + 80005c60: 00000000 .word 0x00000000 + 80005c64: 8001776e .word 0x8001776e + 80005c68: 00000000 .word 0x00000000 + 80005c6c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xb40729c52aa16d39 + 80005c70: 00053303 ld x6,0(x10) + 80005c74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x1d2cd230d21f1f75 + 80005c78: 00053183 ld x3,0(x10) + 80005c7c: 00850513 addi x10,x10,8 + +0000000080005c80 : +Zbkx_xperm4_cg_cmp_rd_rs2_b3: + xperm4 x3, x6, x3 # perform operation + 80005c80: 283321b3 xperm4 x3,x6,x3 + # Check if x3 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x3, Zbkx_xperm4_cg_cmp_rd_rs2_b3, Zbkx_xperm4_cg_cmp_rd_rs2_b3_str) + 80005c84: 000ab383 ld x7,0(x21) + 80005c88: 00338c63 beq x7,x3,80005ca0 + 80005c8c: 08c0246f jal x8,80007d18 + 80005c90: 80005c80 .word 0x80005c80 + 80005c94: 00000000 .word 0x00000000 + 80005c98: 800177a7 .word 0x800177a7 + 80005c9c: 00000000 .word 0x00000000 + 80005ca0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfdf37ed4e978af99 + 80005ca4: 00053b03 ld x22,0(x10) + 80005ca8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xdc0137a5c52a7e16 + 80005cac: 00053203 ld x4,0(x10) + 80005cb0: 00850513 addi x10,x10,8 + +0000000080005cb4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b4: + xperm4 x4, x22, x4 # perform operation + 80005cb4: 284b2233 xperm4 x4,x22,x4 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs2_b4, Zbkx_xperm4_cg_cmp_rd_rs2_b4_str) + 80005cb8: 000ab383 ld x7,0(x21) + 80005cbc: 00438c63 beq x7,x4,80005cd4 + 80005cc0: 0580246f jal x8,80007d18 + 80005cc4: 80005cb4 .word 0x80005cb4 + 80005cc8: 00000000 .word 0x00000000 + 80005ccc: 800177e0 .word 0x800177e0 + 80005cd0: 00000000 .word 0x00000000 + 80005cd4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x284ee28bc9913c5d + 80005cd8: 00053703 ld x14,0(x10) + 80005cdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x55e62580767388b8 + 80005ce0: 00053283 ld x5,0(x10) + 80005ce4: 00850513 addi x10,x10,8 + +0000000080005ce8 : +Zbkx_xperm4_cg_cmp_rd_rs2_b5: + xperm4 x5, x14, x5 # perform operation + 80005ce8: 285722b3 xperm4 x5,x14,x5 + # Check if x5 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs2_b5, Zbkx_xperm4_cg_cmp_rd_rs2_b5_str) + 80005cec: 000ab383 ld x7,0(x21) + 80005cf0: 00538c63 beq x7,x5,80005d08 + 80005cf4: 0240246f jal x8,80007d18 + 80005cf8: 80005ce8 .word 0x80005ce8 + 80005cfc: 00000000 .word 0x00000000 + 80005d00: 80017819 .word 0x80017819 + 80005d04: 00000000 .word 0x00000000 + 80005d08: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x3778cc62e93375d0 + 80005d0c: 00053e83 ld x29,0(x10) + 80005d10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xd14297f0b7c62201 + 80005d14: 00053303 ld x6,0(x10) + 80005d18: 00850513 addi x10,x10,8 + +0000000080005d1c : +Zbkx_xperm4_cg_cmp_rd_rs2_b6: + xperm4 x6, x29, x6 # perform operation + 80005d1c: 286ea333 xperm4 x6,x29,x6 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs2_b6, Zbkx_xperm4_cg_cmp_rd_rs2_b6_str) + 80005d20: 000ab383 ld x7,0(x21) + 80005d24: 00638c63 beq x7,x6,80005d3c + 80005d28: 7f10146f jal x8,80007d18 + 80005d2c: 80005d1c .word 0x80005d1c + 80005d30: 00000000 .word 0x00000000 + 80005d34: 80017852 .word 0x80017852 + 80005d38: 00000000 .word 0x00000000 + 80005d3c: 008a8a93 addi x21,x21,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d40: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d44: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xdcf3dbcecb268875 + 80005d48: 00053003 ld x0,0(x10) + 80005d4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xd87eaca15639b6cc + 80005d50: 00053383 ld x7,0(x10) + 80005d54: 00850513 addi x10,x10,8 + +0000000080005d58 : +Zbkx_xperm4_cg_cmp_rd_rs2_b7: + xperm4 x7, x0, x7 # perform operation + 80005d58: 287023b3 xperm4 x7,x0,x7 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zbkx_xperm4_cg_cmp_rd_rs2_b7, Zbkx_xperm4_cg_cmp_rd_rs2_b7_str) + 80005d5c: 000ab683 ld x13,0(x21) + 80005d60: 00768c63 beq x13,x7,80005d78 + 80005d64: 7dd0176f jal x14,80007d40 + 80005d68: 80005d58 .word 0x80005d58 + 80005d6c: 00000000 .word 0x00000000 + 80005d70: 8001788b .word 0x8001788b + 80005d74: 00000000 .word 0x00000000 + 80005d78: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xd473658d7c7d6055 + 80005d7c: 00053e83 ld x29,0(x10) + 80005d80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x61005309f60398a6 + 80005d84: 00053403 ld x8,0(x10) + 80005d88: 00850513 addi x10,x10,8 + +0000000080005d8c : +Zbkx_xperm4_cg_cmp_rd_rs2_b8: + xperm4 x8, x29, x8 # perform operation + 80005d8c: 288ea433 xperm4 x8,x29,x8 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zbkx_xperm4_cg_cmp_rd_rs2_b8, Zbkx_xperm4_cg_cmp_rd_rs2_b8_str) + 80005d90: 000ab683 ld x13,0(x21) + 80005d94: 00868c63 beq x13,x8,80005dac + 80005d98: 7a90176f jal x14,80007d40 + 80005d9c: 80005d8c .word 0x80005d8c + 80005da0: 00000000 .word 0x00000000 + 80005da4: 800178c4 .word 0x800178c4 + 80005da8: 00000000 .word 0x00000000 + 80005dac: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x3962ba93f8e38b86 + 80005db0: 00053e83 ld x29,0(x10) + 80005db4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x9f994fc32d997f76 + 80005db8: 00053483 ld x9,0(x10) + 80005dbc: 00850513 addi x10,x10,8 + +0000000080005dc0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b9: + xperm4 x9, x29, x9 # perform operation + 80005dc0: 289ea4b3 xperm4 x9,x29,x9 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zbkx_xperm4_cg_cmp_rd_rs2_b9, Zbkx_xperm4_cg_cmp_rd_rs2_b9_str) + 80005dc4: 000ab683 ld x13,0(x21) + 80005dc8: 00968c63 beq x13,x9,80005de0 + 80005dcc: 7750176f jal x14,80007d40 + 80005dd0: 80005dc0 .word 0x80005dc0 + 80005dd4: 00000000 .word 0x00000000 + 80005dd8: 800178fd .word 0x800178fd + 80005ddc: 00000000 .word 0x00000000 + 80005de0: 008a8a93 addi x21,x21,8 + + mv x11, x10 # switch data pointer register to avoid conflict with test + 80005de4: 00050593 addi x11,x10,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xc22e7102f6dcaaa6 + 80005de8: 0005b783 ld x15,0(x11) + 80005dec: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x9061bea1f6e5631c + 80005df0: 0005b503 ld x10,0(x11) + 80005df4: 00858593 addi x11,x11,8 + +0000000080005df8 : +Zbkx_xperm4_cg_cmp_rd_rs2_b10: + xperm4 x10, x15, x10 # perform operation + 80005df8: 28a7a533 xperm4 x10,x15,x10 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zbkx_xperm4_cg_cmp_rd_rs2_b10, Zbkx_xperm4_cg_cmp_rd_rs2_b10_str) + 80005dfc: 000ab683 ld x13,0(x21) + 80005e00: 00a68c63 beq x13,x10,80005e18 + 80005e04: 73d0176f jal x14,80007d40 + 80005e08: 80005df8 .word 0x80005df8 + 80005e0c: 00000000 .word 0x00000000 + 80005e10: 80017936 .word 0x80017936 + 80005e14: 00000000 .word 0x00000000 + 80005e18: 008a8a93 addi x21,x21,8 + + mv x1, x11 # switch data pointer register to avoid conflict with test + 80005e1c: 00058093 addi x1,x11,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x28c1cebcbf34deb4 + 80005e20: 0000ba03 ld x20,0(x1) + 80005e24: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs2: x11 = 0x2a0bd203e4690acd + 80005e28: 0000b583 ld x11,0(x1) + 80005e2c: 00808093 addi x1,x1,8 + +0000000080005e30 : +Zbkx_xperm4_cg_cmp_rd_rs2_b11: + xperm4 x11, x20, x11 # perform operation + 80005e30: 28ba25b3 xperm4 x11,x20,x11 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zbkx_xperm4_cg_cmp_rd_rs2_b11, Zbkx_xperm4_cg_cmp_rd_rs2_b11_str) + 80005e34: 000ab683 ld x13,0(x21) + 80005e38: 00b68c63 beq x13,x11,80005e50 + 80005e3c: 7050176f jal x14,80007d40 + 80005e40: 80005e30 .word 0x80005e30 + 80005e44: 00000000 .word 0x00000000 + 80005e48: 80017970 .word 0x80017970 + 80005e4c: 00000000 .word 0x00000000 + 80005e50: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x09ce5747c5da6589 + 80005e54: 0000b803 ld x16,0(x1) + 80005e58: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs2: x12 = 0x9da7aef2656c53be + 80005e5c: 0000b603 ld x12,0(x1) + 80005e60: 00808093 addi x1,x1,8 + +0000000080005e64 : +Zbkx_xperm4_cg_cmp_rd_rs2_b12: + xperm4 x12, x16, x12 # perform operation + 80005e64: 28c82633 xperm4 x12,x16,x12 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zbkx_xperm4_cg_cmp_rd_rs2_b12, Zbkx_xperm4_cg_cmp_rd_rs2_b12_str) + 80005e68: 000ab683 ld x13,0(x21) + 80005e6c: 00c68c63 beq x13,x12,80005e84 + 80005e70: 6d10176f jal x14,80007d40 + 80005e74: 80005e64 .word 0x80005e64 + 80005e78: 00000000 .word 0x00000000 + 80005e7c: 800179aa .word 0x800179aa + 80005e80: 00000000 .word 0x00000000 + 80005e84: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e88: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e8c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x77fb25b05e97ad9f + 80005e90: 0000be03 ld x28,0(x1) + 80005e94: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs2: x13 = 0xba21beecaeb8b7e9 + 80005e98: 0000b683 ld x13,0(x1) + 80005e9c: 00808093 addi x1,x1,8 + +0000000080005ea0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b13: + xperm4 x13, x28, x13 # perform operation + 80005ea0: 28de26b3 xperm4 x13,x28,x13 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zbkx_xperm4_cg_cmp_rd_rs2_b13, Zbkx_xperm4_cg_cmp_rd_rs2_b13_str) + 80005ea4: 000ab383 ld x7,0(x21) + 80005ea8: 00d38c63 beq x7,x13,80005ec0 + 80005eac: 66d0146f jal x8,80007d18 + 80005eb0: 80005ea0 .word 0x80005ea0 + 80005eb4: 00000000 .word 0x00000000 + 80005eb8: 800179e4 .word 0x800179e4 + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x26affd2edc91a22e + 80005ec4: 0000b803 ld x16,0(x1) + 80005ec8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs2: x14 = 0x492b16e318d54def + 80005ecc: 0000b703 ld x14,0(x1) + 80005ed0: 00808093 addi x1,x1,8 + +0000000080005ed4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b14: + xperm4 x14, x16, x14 # perform operation + 80005ed4: 28e82733 xperm4 x14,x16,x14 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zbkx_xperm4_cg_cmp_rd_rs2_b14, Zbkx_xperm4_cg_cmp_rd_rs2_b14_str) + 80005ed8: 000ab383 ld x7,0(x21) + 80005edc: 00e38c63 beq x7,x14,80005ef4 + 80005ee0: 6390146f jal x8,80007d18 + 80005ee4: 80005ed4 .word 0x80005ed4 + 80005ee8: 00000000 .word 0x00000000 + 80005eec: 80017a1e .word 0x80017a1e + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x36080d884f2a68af + 80005ef8: 0000bb83 ld x23,0(x1) + 80005efc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs2: x15 = 0xb8a572b9c06d1020 + 80005f00: 0000b783 ld x15,0(x1) + 80005f04: 00808093 addi x1,x1,8 + +0000000080005f08 : +Zbkx_xperm4_cg_cmp_rd_rs2_b15: + xperm4 x15, x23, x15 # perform operation + 80005f08: 28fba7b3 xperm4 x15,x23,x15 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zbkx_xperm4_cg_cmp_rd_rs2_b15, Zbkx_xperm4_cg_cmp_rd_rs2_b15_str) + 80005f0c: 000ab383 ld x7,0(x21) + 80005f10: 00f38c63 beq x7,x15,80005f28 + 80005f14: 6050146f jal x8,80007d18 + 80005f18: 80005f08 .word 0x80005f08 + 80005f1c: 00000000 .word 0x00000000 + 80005f20: 80017a58 .word 0x80017a58 + 80005f24: 00000000 .word 0x00000000 + 80005f28: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x18b161d42f077b46 + 80005f2c: 0000b783 ld x15,0(x1) + 80005f30: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs2: x16 = 0xe191f87d5b43321f + 80005f34: 0000b803 ld x16,0(x1) + 80005f38: 00808093 addi x1,x1,8 + +0000000080005f3c : +Zbkx_xperm4_cg_cmp_rd_rs2_b16: + xperm4 x16, x15, x16 # perform operation + 80005f3c: 2907a833 xperm4 x16,x15,x16 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zbkx_xperm4_cg_cmp_rd_rs2_b16, Zbkx_xperm4_cg_cmp_rd_rs2_b16_str) + 80005f40: 000ab383 ld x7,0(x21) + 80005f44: 01038c63 beq x7,x16,80005f5c + 80005f48: 5d10146f jal x8,80007d18 + 80005f4c: 80005f3c .word 0x80005f3c + 80005f50: 00000000 .word 0x00000000 + 80005f54: 80017a92 .word 0x80017a92 + 80005f58: 00000000 .word 0x00000000 + 80005f5c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0x116005a9b9c1142f + 80005f60: 0000be03 ld x28,0(x1) + 80005f64: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs2: x17 = 0x1fad2d5cfc7b382a + 80005f68: 0000b883 ld x17,0(x1) + 80005f6c: 00808093 addi x1,x1,8 + +0000000080005f70 : +Zbkx_xperm4_cg_cmp_rd_rs2_b17: + xperm4 x17, x28, x17 # perform operation + 80005f70: 291e28b3 xperm4 x17,x28,x17 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zbkx_xperm4_cg_cmp_rd_rs2_b17, Zbkx_xperm4_cg_cmp_rd_rs2_b17_str) + 80005f74: 000ab383 ld x7,0(x21) + 80005f78: 01138c63 beq x7,x17,80005f90 + 80005f7c: 59d0146f jal x8,80007d18 + 80005f80: 80005f70 .word 0x80005f70 + 80005f84: 00000000 .word 0x00000000 + 80005f88: 80017acc .word 0x80017acc + 80005f8c: 00000000 .word 0x00000000 + 80005f90: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x30e8b276c10b10c0 + 80005f94: 0000b483 ld x9,0(x1) + 80005f98: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs2: x18 = 0xf78d30fc0cac83d5 + 80005f9c: 0000b903 ld x18,0(x1) + 80005fa0: 00808093 addi x1,x1,8 + +0000000080005fa4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b18: + xperm4 x18, x9, x18 # perform operation + 80005fa4: 2924a933 xperm4 x18,x9,x18 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zbkx_xperm4_cg_cmp_rd_rs2_b18, Zbkx_xperm4_cg_cmp_rd_rs2_b18_str) + 80005fa8: 000ab383 ld x7,0(x21) + 80005fac: 01238c63 beq x7,x18,80005fc4 + 80005fb0: 5690146f jal x8,80007d18 + 80005fb4: 80005fa4 .word 0x80005fa4 + 80005fb8: 00000000 .word 0x00000000 + 80005fbc: 80017b06 .word 0x80017b06 + 80005fc0: 00000000 .word 0x00000000 + 80005fc4: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x18c607a9821a9b99 + 80005fc8: 0000bb03 ld x22,0(x1) + 80005fcc: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs2: x19 = 0x3745caa552061873 + 80005fd0: 0000b983 ld x19,0(x1) + 80005fd4: 00808093 addi x1,x1,8 + +0000000080005fd8 : +Zbkx_xperm4_cg_cmp_rd_rs2_b19: + xperm4 x19, x22, x19 # perform operation + 80005fd8: 293b29b3 xperm4 x19,x22,x19 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zbkx_xperm4_cg_cmp_rd_rs2_b19, Zbkx_xperm4_cg_cmp_rd_rs2_b19_str) + 80005fdc: 000ab383 ld x7,0(x21) + 80005fe0: 01338c63 beq x7,x19,80005ff8 + 80005fe4: 5350146f jal x8,80007d18 + 80005fe8: 80005fd8 .word 0x80005fd8 + 80005fec: 00000000 .word 0x00000000 + 80005ff0: 80017b40 .word 0x80017b40 + 80005ff4: 00000000 .word 0x00000000 + 80005ff8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x566c39d17bf49dac + 80005ffc: 0000b583 ld x11,0(x1) + 80006000: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs2: x20 = 0x3e260c5974a5955b + 80006004: 0000ba03 ld x20,0(x1) + 80006008: 00808093 addi x1,x1,8 + +000000008000600c : +Zbkx_xperm4_cg_cmp_rd_rs2_b20: + xperm4 x20, x11, x20 # perform operation + 8000600c: 2945aa33 xperm4 x20,x11,x20 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zbkx_xperm4_cg_cmp_rd_rs2_b20, Zbkx_xperm4_cg_cmp_rd_rs2_b20_str) + 80006010: 000ab383 ld x7,0(x21) + 80006014: 01438c63 beq x7,x20,8000602c + 80006018: 5010146f jal x8,80007d18 + 8000601c: 8000600c .word 0x8000600c + 80006020: 00000000 .word 0x00000000 + 80006024: 80017b7a .word 0x80017b7a + 80006028: 00000000 .word 0x00000000 + 8000602c: 008a8a93 addi x21,x21,8 + + mv x31, x21 # switch signature pointer register to avoid conflict with test + 80006030: 000a8f93 addi x31,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x06e5601fcecedacf + 80006034: 0000b903 ld x18,0(x1) + 80006038: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs2: x21 = 0xe908d69593b3481e + 8000603c: 0000ba83 ld x21,0(x1) + 80006040: 00808093 addi x1,x1,8 + +0000000080006044 : +Zbkx_xperm4_cg_cmp_rd_rs2_b21: + xperm4 x21, x18, x21 # perform operation + 80006044: 29592ab3 xperm4 x21,x18,x21 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkx_xperm4_cg_cmp_rd_rs2_b21, Zbkx_xperm4_cg_cmp_rd_rs2_b21_str) + 80006048: 000fb383 ld x7,0(x31) + 8000604c: 01538c63 beq x7,x21,80006064 + 80006050: 4c90146f jal x8,80007d18 + 80006054: 80006044 .word 0x80006044 + 80006058: 00000000 .word 0x00000000 + 8000605c: 80017bb4 .word 0x80017bb4 + 80006060: 00000000 .word 0x00000000 + 80006064: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x19525ae8bac80444 + 80006068: 0000b983 ld x19,0(x1) + 8000606c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs2: x22 = 0x7555bbb498f75125 + 80006070: 0000bb03 ld x22,0(x1) + 80006074: 00808093 addi x1,x1,8 + +0000000080006078 : +Zbkx_xperm4_cg_cmp_rd_rs2_b22: + xperm4 x22, x19, x22 # perform operation + 80006078: 2969ab33 xperm4 x22,x19,x22 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkx_xperm4_cg_cmp_rd_rs2_b22, Zbkx_xperm4_cg_cmp_rd_rs2_b22_str) + 8000607c: 000fb383 ld x7,0(x31) + 80006080: 01638c63 beq x7,x22,80006098 + 80006084: 4950146f jal x8,80007d18 + 80006088: 80006078 .word 0x80006078 + 8000608c: 00000000 .word 0x00000000 + 80006090: 80017bee .word 0x80017bee + 80006094: 00000000 .word 0x00000000 + 80006098: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xe081013335a8ddfe + 8000609c: 0000b703 ld x14,0(x1) + 800060a0: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs2: x23 = 0xbf32c3266a47d225 + 800060a4: 0000bb83 ld x23,0(x1) + 800060a8: 00808093 addi x1,x1,8 + +00000000800060ac : +Zbkx_xperm4_cg_cmp_rd_rs2_b23: + xperm4 x23, x14, x23 # perform operation + 800060ac: 29772bb3 xperm4 x23,x14,x23 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkx_xperm4_cg_cmp_rd_rs2_b23, Zbkx_xperm4_cg_cmp_rd_rs2_b23_str) + 800060b0: 000fb383 ld x7,0(x31) + 800060b4: 01738c63 beq x7,x23,800060cc + 800060b8: 4610146f jal x8,80007d18 + 800060bc: 800060ac .word 0x800060ac + 800060c0: 00000000 .word 0x00000000 + 800060c4: 80017c28 .word 0x80017c28 + 800060c8: 00000000 .word 0x00000000 + 800060cc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xa81745f133f6f0ce + 800060d0: 0000b683 ld x13,0(x1) + 800060d4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs2: x24 = 0x20bbd83d0954850b + 800060d8: 0000bc03 ld x24,0(x1) + 800060dc: 00808093 addi x1,x1,8 + +00000000800060e0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b24: + xperm4 x24, x13, x24 # perform operation + 800060e0: 2986ac33 xperm4 x24,x13,x24 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkx_xperm4_cg_cmp_rd_rs2_b24, Zbkx_xperm4_cg_cmp_rd_rs2_b24_str) + 800060e4: 000fb383 ld x7,0(x31) + 800060e8: 01838c63 beq x7,x24,80006100 + 800060ec: 42d0146f jal x8,80007d18 + 800060f0: 800060e0 .word 0x800060e0 + 800060f4: 00000000 .word 0x00000000 + 800060f8: 80017c62 .word 0x80017c62 + 800060fc: 00000000 .word 0x00000000 + 80006100: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x43f57d193a0767f2 + 80006104: 0000ba03 ld x20,0(x1) + 80006108: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs2: x25 = 0x216ef4ad20c840bb + 8000610c: 0000bc83 ld x25,0(x1) + 80006110: 00808093 addi x1,x1,8 + +0000000080006114 : +Zbkx_xperm4_cg_cmp_rd_rs2_b25: + xperm4 x25, x20, x25 # perform operation + 80006114: 299a2cb3 xperm4 x25,x20,x25 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkx_xperm4_cg_cmp_rd_rs2_b25, Zbkx_xperm4_cg_cmp_rd_rs2_b25_str) + 80006118: 000fb383 ld x7,0(x31) + 8000611c: 01938c63 beq x7,x25,80006134 + 80006120: 3f90146f jal x8,80007d18 + 80006124: 80006114 .word 0x80006114 + 80006128: 00000000 .word 0x00000000 + 8000612c: 80017c9c .word 0x80017c9c + 80006130: 00000000 .word 0x00000000 + 80006134: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0x98b003b35363fdc7 + 80006138: 0000bc03 ld x24,0(x1) + 8000613c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs2: x26 = 0x02c25a7a21bc2a6b + 80006140: 0000bd03 ld x26,0(x1) + 80006144: 00808093 addi x1,x1,8 + +0000000080006148 : +Zbkx_xperm4_cg_cmp_rd_rs2_b26: + xperm4 x26, x24, x26 # perform operation + 80006148: 29ac2d33 xperm4 x26,x24,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkx_xperm4_cg_cmp_rd_rs2_b26, Zbkx_xperm4_cg_cmp_rd_rs2_b26_str) + 8000614c: 000fb383 ld x7,0(x31) + 80006150: 01a38c63 beq x7,x26,80006168 + 80006154: 3c50146f jal x8,80007d18 + 80006158: 80006148 .word 0x80006148 + 8000615c: 00000000 .word 0x00000000 + 80006160: 80017cd6 .word 0x80017cd6 + 80006164: 00000000 .word 0x00000000 + 80006168: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xbe56171f4b3d35e7 + 8000616c: 0000b683 ld x13,0(x1) + 80006170: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs2: x27 = 0xd8030e7d07f9551f + 80006174: 0000bd83 ld x27,0(x1) + 80006178: 00808093 addi x1,x1,8 + +000000008000617c : +Zbkx_xperm4_cg_cmp_rd_rs2_b27: + xperm4 x27, x13, x27 # perform operation + 8000617c: 29b6adb3 xperm4 x27,x13,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkx_xperm4_cg_cmp_rd_rs2_b27, Zbkx_xperm4_cg_cmp_rd_rs2_b27_str) + 80006180: 000fb383 ld x7,0(x31) + 80006184: 01b38c63 beq x7,x27,8000619c + 80006188: 3910146f jal x8,80007d18 + 8000618c: 8000617c .word 0x8000617c + 80006190: 00000000 .word 0x00000000 + 80006194: 80017d10 .word 0x80017d10 + 80006198: 00000000 .word 0x00000000 + 8000619c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x58dafcdc48513d2b + 800061a0: 0000bd83 ld x27,0(x1) + 800061a4: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs2: x28 = 0x26974785d7833d2a + 800061a8: 0000be03 ld x28,0(x1) + 800061ac: 00808093 addi x1,x1,8 + +00000000800061b0 : +Zbkx_xperm4_cg_cmp_rd_rs2_b28: + xperm4 x28, x27, x28 # perform operation + 800061b0: 29cdae33 xperm4 x28,x27,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkx_xperm4_cg_cmp_rd_rs2_b28, Zbkx_xperm4_cg_cmp_rd_rs2_b28_str) + 800061b4: 000fb383 ld x7,0(x31) + 800061b8: 01c38c63 beq x7,x28,800061d0 + 800061bc: 35d0146f jal x8,80007d18 + 800061c0: 800061b0 .word 0x800061b0 + 800061c4: 00000000 .word 0x00000000 + 800061c8: 80017d4a .word 0x80017d4a + 800061cc: 00000000 .word 0x00000000 + 800061d0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xcbda5ae23d4b477a + 800061d4: 0000bc83 ld x25,0(x1) + 800061d8: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs2: x29 = 0x6cfd319acdee0a4b + 800061dc: 0000be83 ld x29,0(x1) + 800061e0: 00808093 addi x1,x1,8 + +00000000800061e4 : +Zbkx_xperm4_cg_cmp_rd_rs2_b29: + xperm4 x29, x25, x29 # perform operation + 800061e4: 29dcaeb3 xperm4 x29,x25,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkx_xperm4_cg_cmp_rd_rs2_b29, Zbkx_xperm4_cg_cmp_rd_rs2_b29_str) + 800061e8: 000fb383 ld x7,0(x31) + 800061ec: 01d38c63 beq x7,x29,80006204 + 800061f0: 3290146f jal x8,80007d18 + 800061f4: 800061e4 .word 0x800061e4 + 800061f8: 00000000 .word 0x00000000 + 800061fc: 80017d84 .word 0x80017d84 + 80006200: 00000000 .word 0x00000000 + 80006204: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xabd9dce9f3df0397 + 80006208: 0000b103 ld x2,0(x1) + 8000620c: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs2: x30 = 0x55f49e2897e9c083 + 80006210: 0000bf03 ld x30,0(x1) + 80006214: 00808093 addi x1,x1,8 + +0000000080006218 : +Zbkx_xperm4_cg_cmp_rd_rs2_b30: + xperm4 x30, x2, x30 # perform operation + 80006218: 29e12f33 xperm4 x30,x2,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkx_xperm4_cg_cmp_rd_rs2_b30, Zbkx_xperm4_cg_cmp_rd_rs2_b30_str) + 8000621c: 000fb383 ld x7,0(x31) + 80006220: 01e38c63 beq x7,x30,80006238 + 80006224: 2f50146f jal x8,80007d18 + 80006228: 80006218 .word 0x80006218 + 8000622c: 00000000 .word 0x00000000 + 80006230: 80017dbe .word 0x80017dbe + 80006234: 00000000 .word 0x00000000 + 80006238: 008f8f93 addi x31,x31,8 + + mv x16, x31 # switch signature pointer register to avoid conflict with test + 8000623c: 000f8813 addi x16,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x3255186a24a687a5 + 80006240: 0000b583 ld x11,0(x1) + 80006244: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs2: x31 = 0xdbdf4f95b3a567db + 80006248: 0000bf83 ld x31,0(x1) + 8000624c: 00808093 addi x1,x1,8 + +0000000080006250 : +Zbkx_xperm4_cg_cmp_rd_rs2_b31: + xperm4 x31, x11, x31 # perform operation + 80006250: 29f5afb3 xperm4 x31,x11,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x31, Zbkx_xperm4_cg_cmp_rd_rs2_b31, Zbkx_xperm4_cg_cmp_rd_rs2_b31_str) + 80006254: 00083383 ld x7,0(x16) + 80006258: 01f38c63 beq x7,x31,80006270 + 8000625c: 2bd0146f jal x8,80007d18 + 80006260: 80006250 .word 0x80006250 + 80006264: 00000000 .word 0x00000000 + 80006268: 80017df8 .word 0x80017df8 + 8000626c: 00000000 .word 0x00000000 + 80006270: 00880813 addi x16,x16,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x5156e4a401f5cdf6 + 80006274: 0000b003 ld x0,0(x1) + 80006278: 00808093 addi x1,x1,8 + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs2: x0 = 0x2bae1a7fe822a8b0 + 8000627c: 0000b003 ld x0,0(x1) + 80006280: 00808093 addi x1,x1,8 + +0000000080006284 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0: + xperm4 x0, x0, x0 # perform operation + 80006284: 28002033 xperm4 x0,x0,x0 + # Check if x0 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x0, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b0_str) + 80006288: 00083383 ld x7,0(x16) + 8000628c: 00038c63 beq x7,x0,800062a4 + 80006290: 2890146f jal x8,80007d18 + 80006294: 80006284 .word 0x80006284 + 80006298: 00000000 .word 0x00000000 + 8000629c: 80017e32 .word 0x80017e32 + 800062a0: 00000000 .word 0x00000000 + 800062a4: 00880813 addi x16,x16,8 + + mv x31, x1 # switch data pointer register to avoid conflict with test + 800062a8: 00008f93 addi x31,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs1: x1 = 0xeef42417b9481a02 + 800062ac: 000fb083 ld x1,0(x31) + 800062b0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x1) # load rs2: x1 = 0x84554d24389744be + 800062b4: 000fb083 ld x1,0(x31) + 800062b8: 008f8f93 addi x31,x31,8 + +00000000800062bc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1: + xperm4 x1, x1, x1 # perform operation + 800062bc: 2810a0b3 xperm4 x1,x1,x1 + # Check if x1 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x1, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b1_str) + 800062c0: 00083383 ld x7,0(x16) + 800062c4: 00138c63 beq x7,x1,800062dc + 800062c8: 2510146f jal x8,80007d18 + 800062cc: 800062bc .word 0x800062bc + 800062d0: 00000000 .word 0x00000000 + 800062d4: 80017e6f .word 0x80017e6f + 800062d8: 00000000 .word 0x00000000 + 800062dc: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs1: x2 = 0xaf2089dbb05898f8 + 800062e0: 000fb103 ld x2,0(x31) + 800062e4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x2) # load rs2: x2 = 0xdd7c4951b35b5f71 + 800062e8: 000fb103 ld x2,0(x31) + 800062ec: 008f8f93 addi x31,x31,8 + +00000000800062f0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2: + xperm4 x2, x2, x2 # perform operation + 800062f0: 28212133 xperm4 x2,x2,x2 + # Check if x2 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x2, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b2_str) + 800062f4: 00083383 ld x7,0(x16) + 800062f8: 00238c63 beq x7,x2,80006310 + 800062fc: 21d0146f jal x8,80007d18 + 80006300: 800062f0 .word 0x800062f0 + 80006304: 00000000 .word 0x00000000 + 80006308: 80017eac .word 0x80017eac + 8000630c: 00000000 .word 0x00000000 + 80006310: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0xb9429d0fdd4b04a6 + 80006314: 000fb183 ld x3,0(x31) + 80006318: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs2: x3 = 0xd7ee8093bc2acc51 + 8000631c: 000fb183 ld x3,0(x31) + 80006320: 008f8f93 addi x31,x31,8 + +0000000080006324 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3: + xperm4 x3, x3, x3 # perform operation + 80006324: 2831a1b3 xperm4 x3,x3,x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b3_str) + 80006328: 00083383 ld x7,0(x16) + 8000632c: 00338c63 beq x7,x3,80006344 + 80006330: 1e90146f jal x8,80007d18 + 80006334: 80006324 .word 0x80006324 + 80006338: 00000000 .word 0x00000000 + 8000633c: 80017ee9 .word 0x80017ee9 + 80006340: 00000000 .word 0x00000000 + 80006344: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0xf9eb0395f51bb820 + 80006348: 000fb203 ld x4,0(x31) + 8000634c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs2: x4 = 0x5c3f01e636710a2c + 80006350: 000fb203 ld x4,0(x31) + 80006354: 008f8f93 addi x31,x31,8 + +0000000080006358 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4: + xperm4 x4, x4, x4 # perform operation + 80006358: 28422233 xperm4 x4,x4,x4 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b4_str) + 8000635c: 00083383 ld x7,0(x16) + 80006360: 00438c63 beq x7,x4,80006378 + 80006364: 1b50146f jal x8,80007d18 + 80006368: 80006358 .word 0x80006358 + 8000636c: 00000000 .word 0x00000000 + 80006370: 80017f26 .word 0x80017f26 + 80006374: 00000000 .word 0x00000000 + 80006378: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0xe2ee99b9097abeb3 + 8000637c: 000fb283 ld x5,0(x31) + 80006380: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs2: x5 = 0xff0487e7c440259f + 80006384: 000fb283 ld x5,0(x31) + 80006388: 008f8f93 addi x31,x31,8 + +000000008000638c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5: + xperm4 x5, x5, x5 # perform operation + 8000638c: 2852a2b3 xperm4 x5,x5,x5 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b5_str) + 80006390: 00083383 ld x7,0(x16) + 80006394: 00538c63 beq x7,x5,800063ac + 80006398: 1810146f jal x8,80007d18 + 8000639c: 8000638c .word 0x8000638c + 800063a0: 00000000 .word 0x00000000 + 800063a4: 80017f63 .word 0x80017f63 + 800063a8: 00000000 .word 0x00000000 + 800063ac: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xa8ae266bb31213aa + 800063b0: 000fb303 ld x6,0(x31) + 800063b4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs2: x6 = 0x99e3b04c5d6ffc53 + 800063b8: 000fb303 ld x6,0(x31) + 800063bc: 008f8f93 addi x31,x31,8 + +00000000800063c0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6: + xperm4 x6, x6, x6 # perform operation + 800063c0: 28632333 xperm4 x6,x6,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x6, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b6_str) + 800063c4: 00083383 ld x7,0(x16) + 800063c8: 00638c63 beq x7,x6,800063e0 + 800063cc: 14d0146f jal x8,80007d18 + 800063d0: 800063c0 .word 0x800063c0 + 800063d4: 00000000 .word 0x00000000 + 800063d8: 80017fa0 .word 0x80017fa0 + 800063dc: 00000000 .word 0x00000000 + 800063e0: 00880813 addi x16,x16,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800063e4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800063e8: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0x4af2947591534be6 + 800063ec: 000fb383 ld x7,0(x31) + 800063f0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs2: x7 = 0x58137ad0b30fdb37 + 800063f4: 000fb383 ld x7,0(x31) + 800063f8: 008f8f93 addi x31,x31,8 + +00000000800063fc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7: + xperm4 x7, x7, x7 # perform operation + 800063fc: 2873a3b3 xperm4 x7,x7,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b7_str) + 80006400: 00083683 ld x13,0(x16) + 80006404: 00768c63 beq x13,x7,8000641c + 80006408: 1390176f jal x14,80007d40 + 8000640c: 800063fc .word 0x800063fc + 80006410: 00000000 .word 0x00000000 + 80006414: 80017fdd .word 0x80017fdd + 80006418: 00000000 .word 0x00000000 + 8000641c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x35caa300d77c50e0 + 80006420: 000fb403 ld x8,0(x31) + 80006424: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs2: x8 = 0xfb01c2c156e965e1 + 80006428: 000fb403 ld x8,0(x31) + 8000642c: 008f8f93 addi x31,x31,8 + +0000000080006430 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8: + xperm4 x8, x8, x8 # perform operation + 80006430: 28842433 xperm4 x8,x8,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b8_str) + 80006434: 00083683 ld x13,0(x16) + 80006438: 00868c63 beq x13,x8,80006450 + 8000643c: 1050176f jal x14,80007d40 + 80006440: 80006430 .word 0x80006430 + 80006444: 00000000 .word 0x00000000 + 80006448: 8001801a .word 0x8001801a + 8000644c: 00000000 .word 0x00000000 + 80006450: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0xf59149e878cbfae3 + 80006454: 000fb483 ld x9,0(x31) + 80006458: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs2: x9 = 0xee7c137c7ae9e6be + 8000645c: 000fb483 ld x9,0(x31) + 80006460: 008f8f93 addi x31,x31,8 + +0000000080006464 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9: + xperm4 x9, x9, x9 # perform operation + 80006464: 2894a4b3 xperm4 x9,x9,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b9_str) + 80006468: 00083683 ld x13,0(x16) + 8000646c: 00968c63 beq x13,x9,80006484 + 80006470: 0d10176f jal x14,80007d40 + 80006474: 80006464 .word 0x80006464 + 80006478: 00000000 .word 0x00000000 + 8000647c: 80018057 .word 0x80018057 + 80006480: 00000000 .word 0x00000000 + 80006484: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0x2132bd70d23c8a73 + 80006488: 000fb503 ld x10,0(x31) + 8000648c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs2: x10 = 0x5a7ba123c4dbbb28 + 80006490: 000fb503 ld x10,0(x31) + 80006494: 008f8f93 addi x31,x31,8 + +0000000080006498 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10: + xperm4 x10, x10, x10 # perform operation + 80006498: 28a52533 xperm4 x10,x10,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b10_str) + 8000649c: 00083683 ld x13,0(x16) + 800064a0: 00a68c63 beq x13,x10,800064b8 + 800064a4: 09d0176f jal x14,80007d40 + 800064a8: 80006498 .word 0x80006498 + 800064ac: 00000000 .word 0x00000000 + 800064b0: 80018094 .word 0x80018094 + 800064b4: 00000000 .word 0x00000000 + 800064b8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0xa434c085bf88e516 + 800064bc: 000fb583 ld x11,0(x31) + 800064c0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs2: x11 = 0xf890f763a506711e + 800064c4: 000fb583 ld x11,0(x31) + 800064c8: 008f8f93 addi x31,x31,8 + +00000000800064cc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11: + xperm4 x11, x11, x11 # perform operation + 800064cc: 28b5a5b3 xperm4 x11,x11,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b11_str) + 800064d0: 00083683 ld x13,0(x16) + 800064d4: 00b68c63 beq x13,x11,800064ec + 800064d8: 0690176f jal x14,80007d40 + 800064dc: 800064cc .word 0x800064cc + 800064e0: 00000000 .word 0x00000000 + 800064e4: 800180d2 .word 0x800180d2 + 800064e8: 00000000 .word 0x00000000 + 800064ec: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x20bcf86773158b65 + 800064f0: 000fb603 ld x12,0(x31) + 800064f4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs2: x12 = 0xcf8640f92545abfc + 800064f8: 000fb603 ld x12,0(x31) + 800064fc: 008f8f93 addi x31,x31,8 + +0000000080006500 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12: + xperm4 x12, x12, x12 # perform operation + 80006500: 28c62633 xperm4 x12,x12,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b12_str) + 80006504: 00083683 ld x13,0(x16) + 80006508: 00c68c63 beq x13,x12,80006520 + 8000650c: 0350176f jal x14,80007d40 + 80006510: 80006500 .word 0x80006500 + 80006514: 00000000 .word 0x00000000 + 80006518: 80018110 .word 0x80018110 + 8000651c: 00000000 .word 0x00000000 + 80006520: 00880813 addi x16,x16,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80006524: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006528: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0xe3453b13a8d1ca20 + 8000652c: 000fb683 ld x13,0(x31) + 80006530: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs2: x13 = 0xebaa2bae0166ade7 + 80006534: 000fb683 ld x13,0(x31) + 80006538: 008f8f93 addi x31,x31,8 + +000000008000653c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13: + xperm4 x13, x13, x13 # perform operation + 8000653c: 28d6a6b3 xperm4 x13,x13,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b13_str) + 80006540: 00083383 ld x7,0(x16) + 80006544: 00d38c63 beq x7,x13,8000655c + 80006548: 7d00146f jal x8,80007d18 + 8000654c: 8000653c .word 0x8000653c + 80006550: 00000000 .word 0x00000000 + 80006554: 8001814e .word 0x8001814e + 80006558: 00000000 .word 0x00000000 + 8000655c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x5626cc220ce6087f + 80006560: 000fb703 ld x14,0(x31) + 80006564: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs2: x14 = 0x3e007355e36365f0 + 80006568: 000fb703 ld x14,0(x31) + 8000656c: 008f8f93 addi x31,x31,8 + +0000000080006570 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14: + xperm4 x14, x14, x14 # perform operation + 80006570: 28e72733 xperm4 x14,x14,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x14, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b14_str) + 80006574: 00083383 ld x7,0(x16) + 80006578: 00e38c63 beq x7,x14,80006590 + 8000657c: 79c0146f jal x8,80007d18 + 80006580: 80006570 .word 0x80006570 + 80006584: 00000000 .word 0x00000000 + 80006588: 8001818c .word 0x8001818c + 8000658c: 00000000 .word 0x00000000 + 80006590: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0x87b12ffde49723f2 + 80006594: 000fb783 ld x15,0(x31) + 80006598: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs2: x15 = 0xeeffb2c530d3fc5a + 8000659c: 000fb783 ld x15,0(x31) + 800065a0: 008f8f93 addi x31,x31,8 + +00000000800065a4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15: + xperm4 x15, x15, x15 # perform operation + 800065a4: 28f7a7b3 xperm4 x15,x15,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x15, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b15_str) + 800065a8: 00083383 ld x7,0(x16) + 800065ac: 00f38c63 beq x7,x15,800065c4 + 800065b0: 7680146f jal x8,80007d18 + 800065b4: 800065a4 .word 0x800065a4 + 800065b8: 00000000 .word 0x00000000 + 800065bc: 800181ca .word 0x800181ca + 800065c0: 00000000 .word 0x00000000 + 800065c4: 00880813 addi x16,x16,8 + + mv x19, x16 # switch signature pointer register to avoid conflict with test + 800065c8: 00080993 addi x19,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x72e67c71363bf90b + 800065cc: 000fb803 ld x16,0(x31) + 800065d0: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs2: x16 = 0x2c1ab6d0a1698711 + 800065d4: 000fb803 ld x16,0(x31) + 800065d8: 008f8f93 addi x31,x31,8 + +00000000800065dc : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16: + xperm4 x16, x16, x16 # perform operation + 800065dc: 29082833 xperm4 x16,x16,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x16, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b16_str) + 800065e0: 0009b383 ld x7,0(x19) + 800065e4: 01038c63 beq x7,x16,800065fc + 800065e8: 7300146f jal x8,80007d18 + 800065ec: 800065dc .word 0x800065dc + 800065f0: 00000000 .word 0x00000000 + 800065f4: 80018208 .word 0x80018208 + 800065f8: 00000000 .word 0x00000000 + 800065fc: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0x483b5e9775a45dc8 + 80006600: 000fb883 ld x17,0(x31) + 80006604: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs2: x17 = 0xc4c7eb215032c13d + 80006608: 000fb883 ld x17,0(x31) + 8000660c: 008f8f93 addi x31,x31,8 + +0000000080006610 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17: + xperm4 x17, x17, x17 # perform operation + 80006610: 2918a8b3 xperm4 x17,x17,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b17_str) + 80006614: 0009b383 ld x7,0(x19) + 80006618: 01138c63 beq x7,x17,80006630 + 8000661c: 6fc0146f jal x8,80007d18 + 80006620: 80006610 .word 0x80006610 + 80006624: 00000000 .word 0x00000000 + 80006628: 80018246 .word 0x80018246 + 8000662c: 00000000 .word 0x00000000 + 80006630: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0xc00fd3cfe3a647b9 + 80006634: 000fb903 ld x18,0(x31) + 80006638: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs2: x18 = 0x124d6b7b11c9fae0 + 8000663c: 000fb903 ld x18,0(x31) + 80006640: 008f8f93 addi x31,x31,8 + +0000000080006644 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18: + xperm4 x18, x18, x18 # perform operation + 80006644: 29292933 xperm4 x18,x18,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b18_str) + 80006648: 0009b383 ld x7,0(x19) + 8000664c: 01238c63 beq x7,x18,80006664 + 80006650: 6c80146f jal x8,80007d18 + 80006654: 80006644 .word 0x80006644 + 80006658: 00000000 .word 0x00000000 + 8000665c: 80018284 .word 0x80018284 + 80006660: 00000000 .word 0x00000000 + 80006664: 00898993 addi x19,x19,8 + + mv x18, x19 # switch signature pointer register to avoid conflict with test + 80006668: 00098913 addi x18,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x10cd30195b6d98d6 + 8000666c: 000fb983 ld x19,0(x31) + 80006670: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs2: x19 = 0x0f2e77a764ea1e70 + 80006674: 000fb983 ld x19,0(x31) + 80006678: 008f8f93 addi x31,x31,8 + +000000008000667c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19: + xperm4 x19, x19, x19 # perform operation + 8000667c: 2939a9b3 xperm4 x19,x19,x19 + # Check if x19 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x19, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b19_str) + 80006680: 00093383 ld x7,0(x18) + 80006684: 01338c63 beq x7,x19,8000669c + 80006688: 6900146f jal x8,80007d18 + 8000668c: 8000667c .word 0x8000667c + 80006690: 00000000 .word 0x00000000 + 80006694: 800182c2 .word 0x800182c2 + 80006698: 00000000 .word 0x00000000 + 8000669c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0xd561da64cea2b8c9 + 800066a0: 000fba03 ld x20,0(x31) + 800066a4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs2: x20 = 0xbc48c504a6fd6773 + 800066a8: 000fba03 ld x20,0(x31) + 800066ac: 008f8f93 addi x31,x31,8 + +00000000800066b0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20: + xperm4 x20, x20, x20 # perform operation + 800066b0: 294a2a33 xperm4 x20,x20,x20 + # Check if x20 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x20, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b20_str) + 800066b4: 00093383 ld x7,0(x18) + 800066b8: 01438c63 beq x7,x20,800066d0 + 800066bc: 65c0146f jal x8,80007d18 + 800066c0: 800066b0 .word 0x800066b0 + 800066c4: 00000000 .word 0x00000000 + 800066c8: 80018300 .word 0x80018300 + 800066cc: 00000000 .word 0x00000000 + 800066d0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x427f8b99851bd506 + 800066d4: 000fba83 ld x21,0(x31) + 800066d8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xee2fa0e54a988077 + 800066dc: 000fba83 ld x21,0(x31) + 800066e0: 008f8f93 addi x31,x31,8 + +00000000800066e4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21: + xperm4 x21, x21, x21 # perform operation + 800066e4: 295aaab3 xperm4 x21,x21,x21 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b21_str) + 800066e8: 00093383 ld x7,0(x18) + 800066ec: 01538c63 beq x7,x21,80006704 + 800066f0: 6280146f jal x8,80007d18 + 800066f4: 800066e4 .word 0x800066e4 + 800066f8: 00000000 .word 0x00000000 + 800066fc: 8001833e .word 0x8001833e + 80006700: 00000000 .word 0x00000000 + 80006704: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xe9fde78a8a5fbb84 + 80006708: 000fbb03 ld x22,0(x31) + 8000670c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x4349765d37146062 + 80006710: 000fbb03 ld x22,0(x31) + 80006714: 008f8f93 addi x31,x31,8 + +0000000080006718 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22: + xperm4 x22, x22, x22 # perform operation + 80006718: 296b2b33 xperm4 x22,x22,x22 + # Check if x22 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x22, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b22_str) + 8000671c: 00093383 ld x7,0(x18) + 80006720: 01638c63 beq x7,x22,80006738 + 80006724: 5f40146f jal x8,80007d18 + 80006728: 80006718 .word 0x80006718 + 8000672c: 00000000 .word 0x00000000 + 80006730: 8001837c .word 0x8001837c + 80006734: 00000000 .word 0x00000000 + 80006738: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xaba0b5b19cda6c92 + 8000673c: 000fbb83 ld x23,0(x31) + 80006740: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x973edf0c1aface4a + 80006744: 000fbb83 ld x23,0(x31) + 80006748: 008f8f93 addi x31,x31,8 + +000000008000674c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23: + xperm4 x23, x23, x23 # perform operation + 8000674c: 297babb3 xperm4 x23,x23,x23 + # Check if x23 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x23, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b23_str) + 80006750: 00093383 ld x7,0(x18) + 80006754: 01738c63 beq x7,x23,8000676c + 80006758: 5c00146f jal x8,80007d18 + 8000675c: 8000674c .word 0x8000674c + 80006760: 00000000 .word 0x00000000 + 80006764: 800183ba .word 0x800183ba + 80006768: 00000000 .word 0x00000000 + 8000676c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x995959e4cb12d188 + 80006770: 000fbc03 ld x24,0(x31) + 80006774: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0xad5894ea40523bdd + 80006778: 000fbc03 ld x24,0(x31) + 8000677c: 008f8f93 addi x31,x31,8 + +0000000080006780 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24: + xperm4 x24, x24, x24 # perform operation + 80006780: 298c2c33 xperm4 x24,x24,x24 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b24_str) + 80006784: 00093383 ld x7,0(x18) + 80006788: 01838c63 beq x7,x24,800067a0 + 8000678c: 58c0146f jal x8,80007d18 + 80006790: 80006780 .word 0x80006780 + 80006794: 00000000 .word 0x00000000 + 80006798: 800183f8 .word 0x800183f8 + 8000679c: 00000000 .word 0x00000000 + 800067a0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x8f118fb72eb2a5fc + 800067a4: 000fbc83 ld x25,0(x31) + 800067a8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x8068f38f036a36a5 + 800067ac: 000fbc83 ld x25,0(x31) + 800067b0: 008f8f93 addi x31,x31,8 + +00000000800067b4 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25: + xperm4 x25, x25, x25 # perform operation + 800067b4: 299cacb3 xperm4 x25,x25,x25 + # Check if x25 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x25, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b25_str) + 800067b8: 00093383 ld x7,0(x18) + 800067bc: 01938c63 beq x7,x25,800067d4 + 800067c0: 5580146f jal x8,80007d18 + 800067c4: 800067b4 .word 0x800067b4 + 800067c8: 00000000 .word 0x00000000 + 800067cc: 80018436 .word 0x80018436 + 800067d0: 00000000 .word 0x00000000 + 800067d4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x4d49c6a757e0807a + 800067d8: 000fbd03 ld x26,0(x31) + 800067dc: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0xb312ebd87a7b0b41 + 800067e0: 000fbd03 ld x26,0(x31) + 800067e4: 008f8f93 addi x31,x31,8 + +00000000800067e8 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26: + xperm4 x26, x26, x26 # perform operation + 800067e8: 29ad2d33 xperm4 x26,x26,x26 + # Check if x26 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x26, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b26_str) + 800067ec: 00093383 ld x7,0(x18) + 800067f0: 01a38c63 beq x7,x26,80006808 + 800067f4: 5240146f jal x8,80007d18 + 800067f8: 800067e8 .word 0x800067e8 + 800067fc: 00000000 .word 0x00000000 + 80006800: 80018474 .word 0x80018474 + 80006804: 00000000 .word 0x00000000 + 80006808: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0x566aefcf1a27472b + 8000680c: 000fbd83 ld x27,0(x31) + 80006810: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0x02beb2104352d49a + 80006814: 000fbd83 ld x27,0(x31) + 80006818: 008f8f93 addi x31,x31,8 + +000000008000681c : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27: + xperm4 x27, x27, x27 # perform operation + 8000681c: 29bdadb3 xperm4 x27,x27,x27 + # Check if x27 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x27, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b27_str) + 80006820: 00093383 ld x7,0(x18) + 80006824: 01b38c63 beq x7,x27,8000683c + 80006828: 4f00146f jal x8,80007d18 + 8000682c: 8000681c .word 0x8000681c + 80006830: 00000000 .word 0x00000000 + 80006834: 800184b2 .word 0x800184b2 + 80006838: 00000000 .word 0x00000000 + 8000683c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x6e22d09f119cf56a + 80006840: 000fbe03 ld x28,0(x31) + 80006844: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x113d6d1b87c8606c + 80006848: 000fbe03 ld x28,0(x31) + 8000684c: 008f8f93 addi x31,x31,8 + +0000000080006850 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28: + xperm4 x28, x28, x28 # perform operation + 80006850: 29ce2e33 xperm4 x28,x28,x28 + # Check if x28 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x28, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b28_str) + 80006854: 00093383 ld x7,0(x18) + 80006858: 01c38c63 beq x7,x28,80006870 + 8000685c: 4bc0146f jal x8,80007d18 + 80006860: 80006850 .word 0x80006850 + 80006864: 00000000 .word 0x00000000 + 80006868: 800184f0 .word 0x800184f0 + 8000686c: 00000000 .word 0x00000000 + 80006870: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xba807b90fdd7a59e + 80006874: 000fbe83 ld x29,0(x31) + 80006878: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x3348442d7d80151b + 8000687c: 000fbe83 ld x29,0(x31) + 80006880: 008f8f93 addi x31,x31,8 + +0000000080006884 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29: + xperm4 x29, x29, x29 # perform operation + 80006884: 29deaeb3 xperm4 x29,x29,x29 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b29_str) + 80006888: 00093383 ld x7,0(x18) + 8000688c: 01d38c63 beq x7,x29,800068a4 + 80006890: 4880146f jal x8,80007d18 + 80006894: 80006884 .word 0x80006884 + 80006898: 00000000 .word 0x00000000 + 8000689c: 8001852e .word 0x8001852e + 800068a0: 00000000 .word 0x00000000 + 800068a4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xffd4711f02591697 + 800068a8: 000fbf03 ld x30,0(x31) + 800068ac: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0xa6e72be95930585a + 800068b0: 000fbf03 ld x30,0(x31) + 800068b4: 008f8f93 addi x31,x31,8 + +00000000800068b8 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30: + xperm4 x30, x30, x30 # perform operation + 800068b8: 29ef2f33 xperm4 x30,x30,x30 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b30_str) + 800068bc: 00093383 ld x7,0(x18) + 800068c0: 01e38c63 beq x7,x30,800068d8 + 800068c4: 4540146f jal x8,80007d18 + 800068c8: 800068b8 .word 0x800068b8 + 800068cc: 00000000 .word 0x00000000 + 800068d0: 8001856c .word 0x8001856c + 800068d4: 00000000 .word 0x00000000 + 800068d8: 00890913 addi x18,x18,8 + + mv x20, x31 # switch data pointer register to avoid conflict with test + 800068dc: 000f8a13 addi x20,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xe791079a37fb654b + 800068e0: 000a3f83 ld x31,0(x20) + 800068e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xf6a284179c891634 + 800068e8: 000a3f83 ld x31,0(x20) + 800068ec: 008a0a13 addi x20,x20,8 + +00000000800068f0 : +Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31: + xperm4 x31, x31, x31 # perform operation + 800068f0: 29ffafb3 xperm4 x31,x31,x31 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31, Zbkx_xperm4_cg_cmp_rd_rs1_rs2_b31_str) + 800068f4: 00093383 ld x7,0(x18) + 800068f8: 01f38c63 beq x7,x31,80006910 + 800068fc: 41c0146f jal x8,80007d18 + 80006900: 800068f0 .word 0x800068f0 + 80006904: 00000000 .word 0x00000000 + 80006908: 800185aa .word 0x800185aa + 8000690c: 00000000 .word 0x00000000 + 80006910: 00890913 addi x18,x18,8 + + mv x2, x18 # restore signature pointer to default register for teardown + 80006914: 00090113 addi x2,x18,0 + +0000000080006918 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006918: 00000513 addi x10,x0,0 + 8000691c: 00000073 ecall + 80006920: fff00513 addi x10,x0,-1 + 80006924: 25800413 addi x8,x0,600 + +0000000080006928 : + 80006928: 34002373 csrrs x6,mscratch,x0 + +000000008000692c : + 8000692c: 2b833383 ld x7,696(x6) + +0000000080006930 : + 80006930: 2a033383 ld x7,672(x6) + +0000000080006934 : + 80006934: 2d033483 ld x9,720(x6) + 80006938: 34049073 csrrw x0,mscratch,x9 + +000000008000693c : + 8000693c: 2c833483 ld x9,712(x6) + 80006940: 305493f3 csrrw x7,mtvec,x9 + 80006944: ffc4f493 andi x9,x9,-4 + 80006948: ffc3f393 andi x7,x7,-4 + 8000694c: 00749e63 bne x9,x7,80006968 + +0000000080006950 : + 80006950: 00030493 addi x9,x6,0 + +0000000080006954 : + 80006954: 0004a783 lw x15,0(x9) + 80006958: 00f3a023 sw x15,0(x7) + 8000695c: 00438393 addi x7,x7,4 + 80006960: 00448493 addi x9,x9,4 + 80006964: fe83c8e3 blt x7,x8,80006954 + 80006968: 0000100f fence.i + +000000008000696c : + 8000696c: 00000013 addi x0,x0,0 + 80006970: 00000013 addi x0,x0,0 + 80006974: 00000013 addi x0,x0,0 + 80006978: 00000013 addi x0,x0,0 + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: 35050513 addi x10,x10,848 # 80018d10 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: 34b50513 addi x10,x10,843 # 80018d4b + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: 36b50513 addi x10,x10,875 # 80018dab + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: ed650513 addi x10,x10,-298 # 80019956 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00015397 auipc x7,0x15 + 80006b04: 95038393 addi x7,x7,-1712 # 8001b450 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00015417 auipc x8,0x15 + 80006b44: 90040413 addi x8,x8,-1792 # 8001b440 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80018eff .word 0x80018eff + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018d6d .word 0x80018d6d + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: 11450513 addi x10,x10,276 # 80018cd4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: 11050513 addi x10,x10,272 # 80018d10 + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cb9ff06f jal x0,80006918 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: c95ff06f jal x0,80006918 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a8c30313 addi x6,x6,-1396 # 8000696c + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 2ad50513 addi x10,x10,685 # 8001a38d + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 63850513 addi x10,x10,1592 # 80018758 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: cb450513 addi x10,x10,-844 # 80018e14 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: b7050513 addi x10,x10,-1168 # 80018d10 + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: 19848493 addi x9,x9,408 # 80018738 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 33840413 addi x8,x8,824 # 80038918 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018f16 .word 0x80018f16 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80019018 .word 0x80019018 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80019113 .word 0x80019113 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80019206 .word 0x80019206 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80019379 .word 0x80019379 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00011217 auipc x4,0x11 + 80007d04: 8f020213 addi x4,x4,-1808 # 800185f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00011397 auipc x7,0x11 + 80007d1c: 8d838393 addi x7,x7,-1832 # 800185f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00011697 auipc x13,0x11 + 80007d44: 8b068693 addi x13,x13,-1872 # 800185f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00011497 auipc x9,0x11 + 80007d6c: 88848493 addi x9,x9,-1912 # 800185f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 7e44a483 lw x9,2020(x9) # 800185f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 52040413 addi x8,x8,1312 # 8001a3e0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: a2040413 addi x8,x8,-1504 # 80038920 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 7d848493 addi x9,x9,2008 # 80018718 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 79848493 addi x9,x9,1944 # 80018718 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 76c80813 addi x16,x16,1900 # 80018728 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 74c80813 addi x16,x16,1868 # 80018728 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: f1738393 addi x7,x7,-233 # 80018eff + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 72880813 addi x16,x16,1832 # 80018720 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: f1238393 addi x7,x7,-238 # 80018f16 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: ffc38393 addi x7,x7,-4 # 80019018 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: 0df38393 addi x7,x7,223 # 80019113 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: 1ba38393 addi x7,x7,442 # 80019206 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 31538393 addi x7,x7,789 # 80019379 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 28138393 addi x7,x7,641 # 800192fd + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 2a738393 addi x7,x7,679 # 8001933b + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: eaa38393 addi x7,x7,-342 # 80018f56 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: f9238393 addi x7,x7,-110 # 80019056 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: 07338393 addi x7,x7,115 # 8001914f + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: 14f38393 addi x7,x7,335 # 80019243 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 2a838393 addi x7,x7,680 # 800193b4 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: e7238393 addi x7,x7,-398 # 80018f96 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: f5838393 addi x7,x7,-168 # 80019094 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: 03738393 addi x7,x7,55 # 8001918b + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: 11438393 addi x7,x7,276 # 80019280 + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 26b38393 addi x7,x7,619 # 800193ef + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: e3b38393 addi x7,x7,-453 # 80018fd7 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: f1f38393 addi x7,x7,-225 # 800190d3 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: ffc38393 addi x7,x7,-4 # 800191c8 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: 0da38393 addi x7,x7,218 # 800192be + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 22f38393 addi x7,x7,559 # 8001942b + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 25438393 addi x7,x7,596 # 80019468 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 28b38393 addi x7,x7,651 # 800194b7 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 36e38393 addi x7,x7,878 # 800195b2 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 45238393 addi x7,x7,1106 # 800196ae + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 4a480813 addi x16,x16,1188 # 80018720 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 49480813 addi x16,x16,1172 # 80018720 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 48c80813 addi x16,x16,1164 # 80018724 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 47880813 addi x16,x16,1144 # 80018720 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: a1050513 addi x10,x10,-1520 # 80018d10 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: a0b50513 addi x10,x10,-1525 # 80018d4b + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: a8250513 addi x10,x10,-1406 # 80018e02 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 36853503 ld x10,872(x10) # 80018710 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: a5450513 addi x10,x10,-1452 # 80018e14 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 20852503 lw x10,520(x10) # 800185f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: a1650513 addi x10,x10,-1514 # 80018e16 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 2c852503 lw x10,712(x10) # 800186f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 2f850513 addi x10,x10,760 # 80018758 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: 98a50513 addi x10,x10,-1654 # 80018e2a + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 23053503 ld x10,560(x10) # 800186f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 27850513 addi x10,x10,632 # 80018758 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 34150513 addi x10,x10,833 # 80019861 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: 0a852503 lw x10,168(x10) # 800185f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: 1f860613 addi x12,x12,504 # 80018758 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: 16c52503 lw x10,364(x10) # 800186f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 3b750513 addi x10,x10,951 # 80019977 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: 15860613 addi x12,x12,344 # 80018758 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: 0cc52503 lw x10,204(x10) # 800186f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: 11860613 addi x12,x12,280 # 80018758 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: 08c52503 lw x10,140(x10) # 800186f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: 1da50513 addi x10,x10,474 # 8001985a + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: 09850513 addi x10,x10,152 # 80018758 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: 17250513 addi x10,x10,370 # 80019872 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: ec852503 lw x10,-312(x10) # 800185f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: fc853503 ld x10,-56(x10) # 80018700 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: fb453503 ld x10,-76(x10) # 80018700 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: ff850513 addi x10,x10,-8 # 80018758 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: f9052503 lw x10,-112(x10) # 80018718 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: 0e950513 addi x10,x10,233 # 80019889 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: e2852503 lw x10,-472(x10) # 800185f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: f3053503 ld x10,-208(x10) # 80018708 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: f1c53503 ld x10,-228(x10) # 80018708 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: f5850513 addi x10,x10,-168 # 80018758 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: 06050513 addi x10,x10,96 # 800198a0 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: ea053503 ld x10,-352(x10) # 80018708 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: ed850513 addi x10,x10,-296 # 80018758 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: 03e50513 addi x10,x10,62 # 800198fe + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: e2053503 ld x10,-480(x10) # 80018708 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: e5850513 addi x10,x10,-424 # 80018758 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: df442403 lw x8,-524(x8) # 80018720 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: 06350513 addi x10,x10,99 # 800199a3 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: 04f50513 addi x10,x10,79 # 800199cf + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: d8080813 addi x16,x16,-640 # 80018728 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 45450513 addi x10,x10,1108 # 80018e14 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: fdf50513 addi x10,x10,-33 # 800199df + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: ce053503 ld x10,-800(x10) # 80018708 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: d1850513 addi x10,x10,-744 # 80018758 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: f8a50513 addi x10,x10,-118 # 80019a0a + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: c5853503 ld x10,-936(x10) # 80018700 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: c9850513 addi x10,x10,-872 # 80018758 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: c1833303 ld x6,-1000(x6) # 80018700 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: c183b383 ld x7,-1000(x7) # 80018708 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: f3950513 addi x10,x10,-199 # 80019a39 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: f6150513 addi x10,x10,-159 # 80019aa1 + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: b9833303 ld x6,-1128(x6) # 80018700 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: b983b383 ld x7,-1128(x7) # 80018708 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: bb850513 addi x10,x10,-1096 # 80018758 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ee850513 addi x10,x10,-280 # 80019ac8 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: e4550513 addi x10,x10,-443 # 80019a65 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: e4150513 addi x10,x10,-447 # 80019aa1 + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: a8033303 ld x6,-1408(x6) # 80018708 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: a703b383 ld x7,-1424(x7) # 80018700 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: a9850513 addi x10,x10,-1384 # 80018758 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: eb050513 addi x10,x10,-336 # 80019bb0 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: f5750513 addi x10,x10,-169 # 80019c97 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 00010517 auipc x10,0x10 + 80008d6c: 9bc52503 lw x10,-1604(x10) # 80018724 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: f3350513 addi x10,x10,-205 # 80019cd3 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: ed150513 addi x10,x10,-303 # 80019cb1 + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: e9950513 addi x10,x10,-359 # 80019cb9 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: e6150513 addi x10,x10,-415 # 80019cc1 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: e2a50513 addi x10,x10,-470 # 80019cca + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: dfc50513 addi x10,x10,-516 # 80019cdc + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 00010517 auipc x10,0x10 + 80008f0c: 81852503 lw x10,-2024(x10) # 80018720 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: ed350513 addi x10,x10,-301 # 80019e33 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: d5650513 addi x10,x10,-682 # 80019cf6 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: d4750513 addi x10,x10,-697 # 80019d27 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: d2750513 addi x10,x10,-729 # 80019d47 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: d0550513 addi x10,x10,-763 # 80019d65 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: ce450513 addi x10,x10,-796 # 80019d84 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: ccc50513 addi x10,x10,-820 # 80019dac + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: cb850513 addi x10,x10,-840 # 80019dd8 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: ca450513 addi x10,x10,-860 # 80019e04 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: ca250513 addi x10,x10,-862 # 80019e42 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 54053503 ld x10,1344(x10) # 80018708 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 57850513 addi x10,x10,1400 # 80018758 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: c3950513 addi x10,x10,-967 # 80019e59 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 4b853503 ld x10,1208(x10) # 80018700 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 4f850513 addi x10,x10,1272 # 80018758 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 49852503 lw x10,1176(x10) # 80018720 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: bd050513 addi x10,x10,-1072 # 80019e70 + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 44053503 ld x10,1088(x10) # 80018708 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: ba750513 addi x10,x10,-1113 # 80019e87 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 3f853503 ld x10,1016(x10) # 80018700 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 3fc52503 lw x10,1020(x10) # 80018720 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: bbd50513 addi x10,x10,-1091 # 80019efd + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: c5350513 addi x10,x10,-941 # 80019fd3 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: d0650513 addi x10,x10,-762 # 8001a0c6 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: dc150513 addi x10,x10,-575 # 8001a1c1 + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: e6850513 addi x10,x10,-408 # 8001a2a8 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: a3550513 addi x10,x10,-1483 # 80019eb5 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 29063603 ld x12,656(x12) # 80018738 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 00010517 auipc x10,0x10 + 800094c4: 9de50513 addi x10,x10,-1570 # 80018e9e + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 23850513 addi x10,x10,568 # 80018758 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 22058593 addi x11,x11,544 # 80018780 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 2b058593 addi x11,x11,688 # 80018840 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 6fe50513 addi x10,x10,1790 # 80018cbe + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 35650513 addi x10,x10,854 # 80019956 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: 10060613 addi x12,x12,256 # 80018730 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 00010517 auipc x10,0x10 + 80009644: 87f50513 addi x10,x10,-1921 # 80018ebf + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: 0d053503 ld x10,208(x10) # 80018738 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: 0d850513 addi x10,x10,216 # 80018758 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 00010517 auipc x10,0x10 + 800096c4: 80f50513 addi x10,x10,-2033 # 80018ecf + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: 05853503 ld x10,88(x10) # 80018740 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: 05850513 addi x10,x10,88 # 80018758 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 79f50513 addi x10,x10,1951 # 80018edf + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: fe053503 ld x10,-32(x10) # 80018748 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: fd850513 addi x10,x10,-40 # 80018758 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 72f50513 addi x10,x10,1839 # 80018eef + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: f6853503 ld x10,-152(x10) # 80018750 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: f5850513 addi x10,x10,-168 # 80018758 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: f0860613 addi x12,x12,-248 # 80018730 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: f1860613 addi x12,x12,-232 # 80018758 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 88030313 addi x6,x6,-1920 # 80006918 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 86830313 addi x6,x6,-1944 # 80006918 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 85030313 addi x6,x6,-1968 # 80006918 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6e878793 addi x15,x15,1768 # 80006928 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: f0010113 addi x2,x2,-256 # 8001a3e0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001997f .word 0x8001997f + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 41828293 addi x5,x5,1048 # 80038a00 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 3f828293 addi x5,x5,1016 # 80038a00 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zbkx-xperm8-00.elf.objdump b/riscv-tests/rv64-Zbkx-xperm8-00.elf.objdump new file mode 100644 index 0000000..602e32a --- /dev/null +++ b/riscv-tests/rv64-Zbkx-xperm8-00.elf.objdump @@ -0,0 +1,17096 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkx/Zbkx-xperm8-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zbkx/Zbkx-xperm8-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002c920 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038a00 0000000080038a00 00037a00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031be 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007c 0000000000000000 0000000000000000 0003b879 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8f5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b918 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b930 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008a 0000000000000000 0000000000000000 0003b970 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9fa 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038a00 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cceoO1Hx.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b1 +000000008000e4a3 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b2 +000000008000e4d6 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b3 +000000008000e509 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b4 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e53c l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b5 +000000008000e56f l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b6 +000000008000e5a2 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b7 +000000008000e5d5 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b8 +000000008000e608 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b9 +000000008000e63b l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b9_str +0000000080000268 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b10 +000000008000e66f l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b10_str +000000008000029c l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b11 +000000008000e6a4 l .data 0000000000000000 Zbkx_xperm8_cg_cp_rs1_b11_str +00000000800002d0 l .text.rvtest 0000000000000000 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Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032dc l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +000000008001304d l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080003310 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +00000000800130be l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003344 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001312f l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003378 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800131a0 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033ac l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080013211 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033e0 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +0000000080013282 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003414 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +00000000800132eb l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003448 l 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Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str +0000000080003d04 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2 +000000008001457e l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str +0000000080003d38 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa +00000000800145ef l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003d6c l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555 +0000000080014660 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str +0000000080003da0 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff +00000000800146d1 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str +0000000080003dd4 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe +000000008001473a l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str +0000000080003e08 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000 +00000000800147a3 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str +0000000080003e3c l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001 +000000008001480d l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str +0000000080003e70 l .text.rvtest 0000000000000000 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Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +0000000080014a0e l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f74 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +0000000080014a7f l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fa8 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +0000000080014af0 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fdc l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +0000000080014b61 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004010 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +0000000080014bd2 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +0000000080004044 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080014c43 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004078 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa +0000000080014cb4 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800040ac l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555 +0000000080014d25 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str +00000000800040e0 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff +0000000080014d96 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str +0000000080004114 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe +0000000080014dff l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str +0000000080004148 l .text.rvtest 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000 +0000000080014e68 l .data 0000000000000000 Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str +000000008000417c l .text.rvtest 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80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x6ad35894c888353e + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xbd692e5b375a1843 + 80000048: 0001ba83 ld x21,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zbkx_xperm8_cg_cp_rs1_b0: + xperm8 x25, x0, x21 # perform operation + 80000050: 29504cb3 xperm8 x25,x0,x21 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zbkx_xperm8_cg_cp_rs1_b0, Zbkx_xperm8_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01920c63 beq x4,x25,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x27d3c8b12f840930 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs2: x9 = 0x06ae7ef70af4fe50 + 8000007c: 0001b483 ld x9,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zbkx_xperm8_cg_cp_rs1_b1: + xperm8 x12, x1, x9 # perform operation + 80000084: 2890c633 xperm8 x12,x1,x9 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zbkx_xperm8_cg_cp_rs1_b1, Zbkx_xperm8_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 00c20c63 beq x4,x12,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a3 .word 0x8000e4a3 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x1, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010093 addi x1,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x348cd4269b7577b4 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x868ed11c7f58eb51 + 800000b4: 0001be03 ld x28,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zbkx_xperm8_cg_cp_rs1_b2: + xperm8 x25, x2, x28 # perform operation + 800000bc: 29c14cb3 xperm8 x25,x2,x28 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zbkx_xperm8_cg_cp_rs1_b2, Zbkx_xperm8_cg_cp_rs1_b2_str) + 800000c0: 0000b203 ld x4,0(x1) + 800000c4: 01920c63 beq x4,x25,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4d6 .word 0x8000e4d6 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00808093 addi x1,x1,8 + + mv x22, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018b13 addi x22,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x2f27ea5b86f16f52 + 800000e4: 000b3183 ld x3,0(x22) + 800000e8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x3ca8ec1a73a3b2ae + 800000ec: 000b3803 ld x16,0(x22) + 800000f0: 008b0b13 addi x22,x22,8 + +00000000800000f4 : +Zbkx_xperm8_cg_cp_rs1_b3: + xperm8 x7, x3, x16 # perform operation + 800000f4: 2901c3b3 xperm8 x7,x3,x16 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zbkx_xperm8_cg_cp_rs1_b3, Zbkx_xperm8_cg_cp_rs1_b3_str) + 800000f8: 0000b203 ld x4,0(x1) + 800000fc: 00720c63 beq x4,x7,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e509 .word 0x8000e509 + 80000110: 00000000 .word 0x00000000 + 80000114: 00808093 addi x1,x1,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0x6d1b9ec8a39abd34 + 80000120: 000b3203 ld x4,0(x22) + 80000124: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x34c1c2cafb80828f + 80000128: 000b3f03 ld x30,0(x22) + 8000012c: 008b0b13 addi x22,x22,8 + +0000000080000130 : +Zbkx_xperm8_cg_cp_rs1_b4: + xperm8 x21, x4, x30 # perform operation + 80000130: 29e24ab3 xperm8 x21,x4,x30 + # Check if x21 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x21, Zbkx_xperm8_cg_cp_rs1_b4, Zbkx_xperm8_cg_cp_rs1_b4_str) + 80000134: 0000b683 ld x13,0(x1) + 80000138: 01568c63 beq x13,x21,80000150 + 8000013c: 4050776f jal x14,80007d40 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e53c .word 0x8000e53c + 8000014c: 00000000 .word 0x00000000 + 80000150: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0xb27aa2ec6881c139 + 80000154: 000b3283 ld x5,0(x22) + 80000158: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x7b31f477648b564f + 8000015c: 000b3783 ld x15,0(x22) + 80000160: 008b0b13 addi x22,x22,8 + +0000000080000164 : +Zbkx_xperm8_cg_cp_rs1_b5: + xperm8 x12, x5, x15 # perform operation + 80000164: 28f2c633 xperm8 x12,x5,x15 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zbkx_xperm8_cg_cp_rs1_b5, Zbkx_xperm8_cg_cp_rs1_b5_str) + 80000168: 0000b683 ld x13,0(x1) + 8000016c: 00c68c63 beq x13,x12,80000184 + 80000170: 3d10776f jal x14,80007d40 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e56f .word 0x8000e56f + 80000180: 00000000 .word 0x00000000 + 80000184: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0x08fe03186bcf6de4 + 80000188: 000b3303 ld x6,0(x22) + 8000018c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xc677c046c05ed479 + 80000190: 000b3503 ld x10,0(x22) + 80000194: 008b0b13 addi x22,x22,8 + +0000000080000198 : +Zbkx_xperm8_cg_cp_rs1_b6: + xperm8 x8, x6, x10 # perform operation + 80000198: 28a34433 xperm8 x8,x6,x10 + # Check if x8 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x8, Zbkx_xperm8_cg_cp_rs1_b6, Zbkx_xperm8_cg_cp_rs1_b6_str) + 8000019c: 0000b683 ld x13,0(x1) + 800001a0: 00868c63 beq x13,x8,800001b8 + 800001a4: 39d0776f jal x14,80007d40 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e5a2 .word 0x8000e5a2 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0xdbd7da329a504299 + 800001bc: 000b3383 ld x7,0(x22) + 800001c0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs2: x23 = 0xe72f10dd7d5c384a + 800001c4: 000b3b83 ld x23,0(x22) + 800001c8: 008b0b13 addi x22,x22,8 + +00000000800001cc : +Zbkx_xperm8_cg_cp_rs1_b7: + xperm8 x10, x7, x23 # perform operation + 800001cc: 2973c533 xperm8 x10,x7,x23 + # Check if x10 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x10, Zbkx_xperm8_cg_cp_rs1_b7, Zbkx_xperm8_cg_cp_rs1_b7_str) + 800001d0: 0000b683 ld x13,0(x1) + 800001d4: 00a68c63 beq x13,x10,800001ec + 800001d8: 3690776f jal x14,80007d40 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 8000e5d5 .word 0x8000e5d5 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xf21ae77d708ea82a + 800001f0: 000b3403 ld x8,0(x22) + 800001f4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs2: x27 = 0x82322972fc8f6b36 + 800001f8: 000b3d83 ld x27,0(x22) + 800001fc: 008b0b13 addi x22,x22,8 + +0000000080000200 : +Zbkx_xperm8_cg_cp_rs1_b8: + xperm8 x16, x8, x27 # perform operation + 80000200: 29b44833 xperm8 x16,x8,x27 + # Check if x16 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x16, Zbkx_xperm8_cg_cp_rs1_b8, Zbkx_xperm8_cg_cp_rs1_b8_str) + 80000204: 0000b683 ld x13,0(x1) + 80000208: 01068c63 beq x13,x16,80000220 + 8000020c: 3350776f jal x14,80007d40 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 8000e608 .word 0x8000e608 + 8000021c: 00000000 .word 0x00000000 + 80000220: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x289cbb47a79e4224 + 80000224: 000b3483 ld x9,0(x22) + 80000228: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x82879b6b59c1d01d + 8000022c: 000b3403 ld x8,0(x22) + 80000230: 008b0b13 addi x22,x22,8 + +0000000080000234 : +Zbkx_xperm8_cg_cp_rs1_b9: + xperm8 x15, x9, x8 # perform operation + 80000234: 2884c7b3 xperm8 x15,x9,x8 + # Check if x15 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x15, Zbkx_xperm8_cg_cp_rs1_b9, Zbkx_xperm8_cg_cp_rs1_b9_str) + 80000238: 0000b683 ld x13,0(x1) + 8000023c: 00f68c63 beq x13,x15,80000254 + 80000240: 3010776f jal x14,80007d40 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8000e63b .word 0x8000e63b + 80000250: 00000000 .word 0x00000000 + 80000254: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x40eb59b539a5a6d1 + 80000258: 000b3503 ld x10,0(x22) + 8000025c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0x7f5d735e746479ef + 80000260: 000b3d03 ld x26,0(x22) + 80000264: 008b0b13 addi x22,x22,8 + +0000000080000268 : +Zbkx_xperm8_cg_cp_rs1_b10: + xperm8 x12, x10, x26 # perform operation + 80000268: 29a54633 xperm8 x12,x10,x26 + # Check if x12 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x12, Zbkx_xperm8_cg_cp_rs1_b10, Zbkx_xperm8_cg_cp_rs1_b10_str) + 8000026c: 0000b683 ld x13,0(x1) + 80000270: 00c68c63 beq x13,x12,80000288 + 80000274: 2cd0776f jal x14,80007d40 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 8000e66f .word 0x8000e66f + 80000284: 00000000 .word 0x00000000 + 80000288: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x630eaa46c2bf665f + 8000028c: 000b3583 ld x11,0(x22) + 80000290: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x5e761db57d388ba9 + 80000294: 000b3383 ld x7,0(x22) + 80000298: 008b0b13 addi x22,x22,8 + +000000008000029c : +Zbkx_xperm8_cg_cp_rs1_b11: + xperm8 x3, x11, x7 # perform operation + 8000029c: 2875c1b3 xperm8 x3,x11,x7 + # Check if x3 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x3, Zbkx_xperm8_cg_cp_rs1_b11, Zbkx_xperm8_cg_cp_rs1_b11_str) + 800002a0: 0000b683 ld x13,0(x1) + 800002a4: 00368c63 beq x13,x3,800002bc + 800002a8: 2990776f jal x14,80007d40 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 8000e6a4 .word 0x8000e6a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x65c24985b1e814dc + 800002c0: 000b3603 ld x12,0(x22) + 800002c4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x7c7ade1be4dc2cfd + 800002c8: 000b3383 ld x7,0(x22) + 800002cc: 008b0b13 addi x22,x22,8 + +00000000800002d0 : +Zbkx_xperm8_cg_cp_rs1_b12: + xperm8 x3, x12, x7 # perform operation + 800002d0: 287641b3 xperm8 x3,x12,x7 + # Check if x3 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x3, Zbkx_xperm8_cg_cp_rs1_b12, Zbkx_xperm8_cg_cp_rs1_b12_str) + 800002d4: 0000b683 ld x13,0(x1) + 800002d8: 00368c63 beq x13,x3,800002f0 + 800002dc: 2650776f jal x14,80007d40 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 8000e6d9 .word 0x8000e6d9 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 00808093 addi x1,x1,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x852299692ea4e73c + 800002fc: 000b3683 ld x13,0(x22) + 80000300: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0xdc46d197de1e1912 + 80000304: 000b3e83 ld x29,0(x22) + 80000308: 008b0b13 addi x22,x22,8 + +000000008000030c : +Zbkx_xperm8_cg_cp_rs1_b13: + xperm8 x14, x13, x29 # perform operation + 8000030c: 29d6c733 xperm8 x14,x13,x29 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkx_xperm8_cg_cp_rs1_b13, Zbkx_xperm8_cg_cp_rs1_b13_str) + 80000310: 0000b203 ld x4,0(x1) + 80000314: 00e20c63 beq x4,x14,8000032c + 80000318: 1e9072ef jal x5,80007d00 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8000e70e .word 0x8000e70e + 80000328: 00000000 .word 0x00000000 + 8000032c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0xbf9bd15a490bd9c3 + 80000330: 000b3703 ld x14,0(x22) + 80000334: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x41e27a9f545cb87c + 80000338: 000b3f03 ld x30,0(x22) + 8000033c: 008b0b13 addi x22,x22,8 + +0000000080000340 : +Zbkx_xperm8_cg_cp_rs1_b14: + xperm8 x8, x14, x30 # perform operation + 80000340: 29e74433 xperm8 x8,x14,x30 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkx_xperm8_cg_cp_rs1_b14, Zbkx_xperm8_cg_cp_rs1_b14_str) + 80000344: 0000b203 ld x4,0(x1) + 80000348: 00820c63 beq x4,x8,80000360 + 8000034c: 1b5072ef jal x5,80007d00 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8000e743 .word 0x8000e743 + 8000035c: 00000000 .word 0x00000000 + 80000360: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x3e8f6bd6bd3ad486 + 80000364: 000b3783 ld x15,0(x22) + 80000368: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x699ea78528ba102a + 8000036c: 000b3983 ld x19,0(x22) + 80000370: 008b0b13 addi x22,x22,8 + +0000000080000374 : +Zbkx_xperm8_cg_cp_rs1_b15: + xperm8 x14, x15, x19 # perform operation + 80000374: 2937c733 xperm8 x14,x15,x19 + # Check if x14 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x14, Zbkx_xperm8_cg_cp_rs1_b15, Zbkx_xperm8_cg_cp_rs1_b15_str) + 80000378: 0000b203 ld x4,0(x1) + 8000037c: 00e20c63 beq x4,x14,80000394 + 80000380: 181072ef jal x5,80007d00 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 8000e778 .word 0x8000e778 + 80000390: 00000000 .word 0x00000000 + 80000394: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x77d9d350b789ffd2 + 80000398: 000b3803 ld x16,0(x22) + 8000039c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0xa43bcda0ef301f90 + 800003a0: 000b3783 ld x15,0(x22) + 800003a4: 008b0b13 addi x22,x22,8 + +00000000800003a8 : +Zbkx_xperm8_cg_cp_rs1_b16: + xperm8 x0, x16, x15 # perform operation + 800003a8: 28f84033 xperm8 x0,x16,x15 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zbkx_xperm8_cg_cp_rs1_b16, Zbkx_xperm8_cg_cp_rs1_b16_str) + 800003ac: 0000b203 ld x4,0(x1) + 800003b0: 00020c63 beq x4,x0,800003c8 + 800003b4: 14d072ef jal x5,80007d00 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 8000e7ad .word 0x8000e7ad + 800003c4: 00000000 .word 0x00000000 + 800003c8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xcab2d72f636dc4e3 + 800003cc: 000b3883 ld x17,0(x22) + 800003d0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x4abf9f266dd1abc0 + 800003d4: 000b3383 ld x7,0(x22) + 800003d8: 008b0b13 addi x22,x22,8 + +00000000800003dc : +Zbkx_xperm8_cg_cp_rs1_b17: + xperm8 x2, x17, x7 # perform operation + 800003dc: 2878c133 xperm8 x2,x17,x7 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zbkx_xperm8_cg_cp_rs1_b17, Zbkx_xperm8_cg_cp_rs1_b17_str) + 800003e0: 0000b203 ld x4,0(x1) + 800003e4: 00220c63 beq x4,x2,800003fc + 800003e8: 119072ef jal x5,80007d00 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 8000e7e2 .word 0x8000e7e2 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x37521cda8b080498 + 80000400: 000b3903 ld x18,0(x22) + 80000404: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs2: x26 = 0xaebbab0a02f11956 + 80000408: 000b3d03 ld x26,0(x22) + 8000040c: 008b0b13 addi x22,x22,8 + +0000000080000410 : +Zbkx_xperm8_cg_cp_rs1_b18: + xperm8 x24, x18, x26 # perform operation + 80000410: 29a94c33 xperm8 x24,x18,x26 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zbkx_xperm8_cg_cp_rs1_b18, Zbkx_xperm8_cg_cp_rs1_b18_str) + 80000414: 0000b203 ld x4,0(x1) + 80000418: 01820c63 beq x4,x24,80000430 + 8000041c: 0e5072ef jal x5,80007d00 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 8000e817 .word 0x8000e817 + 8000042c: 00000000 .word 0x00000000 + 80000430: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x55c3372213e5c7f5 + 80000434: 000b3983 ld x19,0(x22) + 80000438: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0xe624efbd07bed38f + 8000043c: 000b3f03 ld x30,0(x22) + 80000440: 008b0b13 addi x22,x22,8 + +0000000080000444 : +Zbkx_xperm8_cg_cp_rs1_b19: + xperm8 x20, x19, x30 # perform operation + 80000444: 29e9ca33 xperm8 x20,x19,x30 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zbkx_xperm8_cg_cp_rs1_b19, Zbkx_xperm8_cg_cp_rs1_b19_str) + 80000448: 0000b203 ld x4,0(x1) + 8000044c: 01420c63 beq x4,x20,80000464 + 80000450: 0b1072ef jal x5,80007d00 + 80000454: 80000444 .word 0x80000444 + 80000458: 00000000 .word 0x00000000 + 8000045c: 8000e84c .word 0x8000e84c + 80000460: 00000000 .word 0x00000000 + 80000464: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0xd9ebe881b2c5b0ca + 80000468: 000b3a03 ld x20,0(x22) + 8000046c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0x0792edf7d91e5e12 + 80000470: 000b3903 ld x18,0(x22) + 80000474: 008b0b13 addi x22,x22,8 + +0000000080000478 : +Zbkx_xperm8_cg_cp_rs1_b20: + xperm8 x15, x20, x18 # perform operation + 80000478: 292a47b3 xperm8 x15,x20,x18 + # Check if x15 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x15, Zbkx_xperm8_cg_cp_rs1_b20, Zbkx_xperm8_cg_cp_rs1_b20_str) + 8000047c: 0000b203 ld x4,0(x1) + 80000480: 00f20c63 beq x4,x15,80000498 + 80000484: 07d072ef jal x5,80007d00 + 80000488: 80000478 .word 0x80000478 + 8000048c: 00000000 .word 0x00000000 + 80000490: 8000e881 .word 0x8000e881 + 80000494: 00000000 .word 0x00000000 + 80000498: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xe01d7c8314281e90 + 8000049c: 000b3a83 ld x21,0(x22) + 800004a0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x823307591e88408b + 800004a4: 000b3403 ld x8,0(x22) + 800004a8: 008b0b13 addi x22,x22,8 + +00000000800004ac : +Zbkx_xperm8_cg_cp_rs1_b21: + xperm8 x23, x21, x8 # perform operation + 800004ac: 288acbb3 xperm8 x23,x21,x8 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkx_xperm8_cg_cp_rs1_b21, Zbkx_xperm8_cg_cp_rs1_b21_str) + 800004b0: 0000b203 ld x4,0(x1) + 800004b4: 01720c63 beq x4,x23,800004cc + 800004b8: 049072ef jal x5,80007d00 + 800004bc: 800004ac .word 0x800004ac + 800004c0: 00000000 .word 0x00000000 + 800004c4: 8000e8b6 .word 0x8000e8b6 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 00808093 addi x1,x1,8 + + mv x27, x22 # switch data pointer register to avoid conflict with test + 800004d0: 000b0d93 addi x27,x22,0 +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x6feeda211372e499 + 800004d4: 000dbb03 ld x22,0(x27) + 800004d8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs2: x28 = 0x87b7619a62daed71 + 800004dc: 000dbe03 ld x28,0(x27) + 800004e0: 008d8d93 addi x27,x27,8 + +00000000800004e4 : +Zbkx_xperm8_cg_cp_rs1_b22: + xperm8 x30, x22, x28 # perform operation + 800004e4: 29cb4f33 xperm8 x30,x22,x28 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkx_xperm8_cg_cp_rs1_b22, Zbkx_xperm8_cg_cp_rs1_b22_str) + 800004e8: 0000b203 ld x4,0(x1) + 800004ec: 01e20c63 beq x4,x30,80000504 + 800004f0: 011072ef jal x5,80007d00 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 8000e8eb .word 0x8000e8eb + 80000500: 00000000 .word 0x00000000 + 80000504: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x41f67a39a71c3671 + 80000508: 000dbb83 ld x23,0(x27) + 8000050c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x8bf9434edce0c50a + 80000510: 000dba03 ld x20,0(x27) + 80000514: 008d8d93 addi x27,x27,8 + +0000000080000518 : +Zbkx_xperm8_cg_cp_rs1_b23: + xperm8 x26, x23, x20 # perform operation + 80000518: 294bcd33 xperm8 x26,x23,x20 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zbkx_xperm8_cg_cp_rs1_b23, Zbkx_xperm8_cg_cp_rs1_b23_str) + 8000051c: 0000b203 ld x4,0(x1) + 80000520: 01a20c63 beq x4,x26,80000538 + 80000524: 7dc072ef jal x5,80007d00 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 8000e920 .word 0x8000e920 + 80000534: 00000000 .word 0x00000000 + 80000538: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xdce287cbbd6d9675 + 8000053c: 000dbc03 ld x24,0(x27) + 80000540: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xfda1d2a91c37a2d5 + 80000544: 000db683 ld x13,0(x27) + 80000548: 008d8d93 addi x27,x27,8 + +000000008000054c : +Zbkx_xperm8_cg_cp_rs1_b24: + xperm8 x17, x24, x13 # perform operation + 8000054c: 28dc48b3 xperm8 x17,x24,x13 + # Check if x17 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x17, Zbkx_xperm8_cg_cp_rs1_b24, Zbkx_xperm8_cg_cp_rs1_b24_str) + 80000550: 0000b203 ld x4,0(x1) + 80000554: 01120c63 beq x4,x17,8000056c + 80000558: 7a8072ef jal x5,80007d00 + 8000055c: 8000054c .word 0x8000054c + 80000560: 00000000 .word 0x00000000 + 80000564: 8000e955 .word 0x8000e955 + 80000568: 00000000 .word 0x00000000 + 8000056c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x1934c6ae5456e5a9 + 80000570: 000dbc83 ld x25,0(x27) + 80000574: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0xf52d428b06e5a8ce + 80000578: 000db783 ld x15,0(x27) + 8000057c: 008d8d93 addi x27,x27,8 + +0000000080000580 : +Zbkx_xperm8_cg_cp_rs1_b25: + xperm8 x8, x25, x15 # perform operation + 80000580: 28fcc433 xperm8 x8,x25,x15 + # Check if x8 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x8, Zbkx_xperm8_cg_cp_rs1_b25, Zbkx_xperm8_cg_cp_rs1_b25_str) + 80000584: 0000b203 ld x4,0(x1) + 80000588: 00820c63 beq x4,x8,800005a0 + 8000058c: 774072ef jal x5,80007d00 + 80000590: 80000580 .word 0x80000580 + 80000594: 00000000 .word 0x00000000 + 80000598: 8000e98a .word 0x8000e98a + 8000059c: 00000000 .word 0x00000000 + 800005a0: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xf40c7dbd6534da78 + 800005a4: 000dbd03 ld x26,0(x27) + 800005a8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0x2624f15f6d79d669 + 800005ac: 000db503 ld x10,0(x27) + 800005b0: 008d8d93 addi x27,x27,8 + +00000000800005b4 : +Zbkx_xperm8_cg_cp_rs1_b26: + xperm8 x30, x26, x10 # perform operation + 800005b4: 28ad4f33 xperm8 x30,x26,x10 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkx_xperm8_cg_cp_rs1_b26, Zbkx_xperm8_cg_cp_rs1_b26_str) + 800005b8: 0000b203 ld x4,0(x1) + 800005bc: 01e20c63 beq x4,x30,800005d4 + 800005c0: 740072ef jal x5,80007d00 + 800005c4: 800005b4 .word 0x800005b4 + 800005c8: 00000000 .word 0x00000000 + 800005cc: 8000e9bf .word 0x8000e9bf + 800005d0: 00000000 .word 0x00000000 + 800005d4: 00808093 addi x1,x1,8 + + mv x19, x27 # switch data pointer register to avoid conflict with test + 800005d8: 000d8993 addi x19,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x4b4b3edcd762891c + 800005dc: 0009bd83 ld x27,0(x19) + 800005e0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0xbac71e4fcbf0686b + 800005e4: 0009b183 ld x3,0(x19) + 800005e8: 00898993 addi x19,x19,8 + +00000000800005ec : +Zbkx_xperm8_cg_cp_rs1_b27: + xperm8 x9, x27, x3 # perform operation + 800005ec: 283dc4b3 xperm8 x9,x27,x3 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkx_xperm8_cg_cp_rs1_b27, Zbkx_xperm8_cg_cp_rs1_b27_str) + 800005f0: 0000b203 ld x4,0(x1) + 800005f4: 00920c63 beq x4,x9,8000060c + 800005f8: 708072ef jal x5,80007d00 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 8000e9f4 .word 0x8000e9f4 + 80000608: 00000000 .word 0x00000000 + 8000060c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x19, x28) # load rs1: x28 = 0x79288d6b269e63d4 + 80000610: 0009be03 ld x28,0(x19) + 80000614: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x0dbe3769d04113e4 + 80000618: 0009b403 ld x8,0(x19) + 8000061c: 00898993 addi x19,x19,8 + +0000000080000620 : +Zbkx_xperm8_cg_cp_rs1_b28: + xperm8 x30, x28, x8 # perform operation + 80000620: 288e4f33 xperm8 x30,x28,x8 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zbkx_xperm8_cg_cp_rs1_b28, Zbkx_xperm8_cg_cp_rs1_b28_str) + 80000624: 0000b203 ld x4,0(x1) + 80000628: 01e20c63 beq x4,x30,80000640 + 8000062c: 6d4072ef jal x5,80007d00 + 80000630: 80000620 .word 0x80000620 + 80000634: 00000000 .word 0x00000000 + 80000638: 8000ea29 .word 0x8000ea29 + 8000063c: 00000000 .word 0x00000000 + 80000640: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0xa72e78b578efe40a + 80000644: 0009be83 ld x29,0(x19) + 80000648: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs2: x24 = 0xc451d66e83857d1b + 8000064c: 0009bc03 ld x24,0(x19) + 80000650: 00898993 addi x19,x19,8 + +0000000080000654 : +Zbkx_xperm8_cg_cp_rs1_b29: + xperm8 x23, x29, x24 # perform operation + 80000654: 298ecbb3 xperm8 x23,x29,x24 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zbkx_xperm8_cg_cp_rs1_b29, Zbkx_xperm8_cg_cp_rs1_b29_str) + 80000658: 0000b203 ld x4,0(x1) + 8000065c: 01720c63 beq x4,x23,80000674 + 80000660: 6a0072ef jal x5,80007d00 + 80000664: 80000654 .word 0x80000654 + 80000668: 00000000 .word 0x00000000 + 8000066c: 8000ea5e .word 0x8000ea5e + 80000670: 00000000 .word 0x00000000 + 80000674: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x4ec6e8834e6bf39f + 80000678: 0009bf03 ld x30,0(x19) + 8000067c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xb2d42c900e289374 + 80000680: 0009b583 ld x11,0(x19) + 80000684: 00898993 addi x19,x19,8 + +0000000080000688 : +Zbkx_xperm8_cg_cp_rs1_b30: + xperm8 x29, x30, x11 # perform operation + 80000688: 28bf4eb3 xperm8 x29,x30,x11 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zbkx_xperm8_cg_cp_rs1_b30, Zbkx_xperm8_cg_cp_rs1_b30_str) + 8000068c: 0000b203 ld x4,0(x1) + 80000690: 01d20c63 beq x4,x29,800006a8 + 80000694: 66c072ef jal x5,80007d00 + 80000698: 80000688 .word 0x80000688 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 8000ea93 .word 0x8000ea93 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x19, x31) # load rs1: x31 = 0x24bbd3106bf37a0b + 800006ac: 0009bf83 ld x31,0(x19) + 800006b0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x38f9891b837a6d92 + 800006b4: 0009b103 ld x2,0(x19) + 800006b8: 00898993 addi x19,x19,8 + +00000000800006bc : +Zbkx_xperm8_cg_cp_rs1_b31: + xperm8 x9, x31, x2 # perform operation + 800006bc: 282fc4b3 xperm8 x9,x31,x2 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zbkx_xperm8_cg_cp_rs1_b31, Zbkx_xperm8_cg_cp_rs1_b31_str) + 800006c0: 0000b203 ld x4,0(x1) + 800006c4: 00920c63 beq x4,x9,800006dc + 800006c8: 638072ef jal x5,80007d00 + 800006cc: 800006bc .word 0x800006bc + 800006d0: 00000000 .word 0x00000000 + 800006d4: 8000eac8 .word 0x8000eac8 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x30a38ea9bf163257 + 800006e0: 0009bd03 ld x26,0(x19) + 800006e4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x0) # load rs2: x0 = 0x7f159c35356d2890 + 800006e8: 0009b003 ld x0,0(x19) + 800006ec: 00898993 addi x19,x19,8 + +00000000800006f0 : +Zbkx_xperm8_cg_cp_rs2_b0: + xperm8 x22, x26, x0 # perform operation + 800006f0: 280d4b33 xperm8 x22,x26,x0 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zbkx_xperm8_cg_cp_rs2_b0, Zbkx_xperm8_cg_cp_rs2_b0_str) + 800006f4: 0000b203 ld x4,0(x1) + 800006f8: 01620c63 beq x4,x22,80000710 + 800006fc: 604072ef jal x5,80007d00 + 80000700: 800006f0 .word 0x800006f0 + 80000704: 00000000 .word 0x00000000 + 80000708: 8000eafd .word 0x8000eafd + 8000070c: 00000000 .word 0x00000000 + 80000710: 00808093 addi x1,x1,8 + + mv x3, x1 # switch signature pointer register to avoid conflict with test + 80000714: 00008193 addi x3,x1,0 +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x82c5ce3642bf5d6b + 80000718: 0009b703 ld x14,0(x19) + 8000071c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x1) # load rs2: x1 = 0x1900a6501131fa19 + 80000720: 0009b083 ld x1,0(x19) + 80000724: 00898993 addi x19,x19,8 + +0000000080000728 : +Zbkx_xperm8_cg_cp_rs2_b1: + xperm8 x18, x14, x1 # perform operation + 80000728: 28174933 xperm8 x18,x14,x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x18, Zbkx_xperm8_cg_cp_rs2_b1, Zbkx_xperm8_cg_cp_rs2_b1_str) + 8000072c: 0001b203 ld x4,0(x3) + 80000730: 01220c63 beq x4,x18,80000748 + 80000734: 5cc072ef jal x5,80007d00 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 8000eb31 .word 0x8000eb31 + 80000744: 00000000 .word 0x00000000 + 80000748: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x966cd0f4d58c2d9b + 8000074c: 0009b383 ld x7,0(x19) + 80000750: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x2) # load rs2: x2 = 0x90f89f0b3a98d8d9 + 80000754: 0009b103 ld x2,0(x19) + 80000758: 00898993 addi x19,x19,8 + +000000008000075c : +Zbkx_xperm8_cg_cp_rs2_b2: + xperm8 x14, x7, x2 # perform operation + 8000075c: 2823c733 xperm8 x14,x7,x2 + # Check if x14 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x14, Zbkx_xperm8_cg_cp_rs2_b2, Zbkx_xperm8_cg_cp_rs2_b2_str) + 80000760: 0001b203 ld x4,0(x3) + 80000764: 00e20c63 beq x4,x14,8000077c + 80000768: 598072ef jal x5,80007d00 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 8000eb65 .word 0x8000eb65 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00818193 addi x3,x3,8 + + mv x11, x3 # switch signature pointer register to avoid conflict with test + 80000780: 00018593 addi x11,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x4db398c44f3dae0e + 80000784: 0009b703 ld x14,0(x19) + 80000788: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs2: x3 = 0x19c47c1551e5c96a + 8000078c: 0009b183 ld x3,0(x19) + 80000790: 00898993 addi x19,x19,8 + +0000000080000794 : +Zbkx_xperm8_cg_cp_rs2_b3: + xperm8 x0, x14, x3 # perform operation + 80000794: 28374033 xperm8 x0,x14,x3 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zbkx_xperm8_cg_cp_rs2_b3, Zbkx_xperm8_cg_cp_rs2_b3_str) + 80000798: 0005b203 ld x4,0(x11) + 8000079c: 00020c63 beq x4,x0,800007b4 + 800007a0: 560072ef jal x5,80007d00 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 8000eb99 .word 0x8000eb99 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00858593 addi x11,x11,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007bc: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x19, x24) # load rs1: x24 = 0xfaf2e9ac73932332 + 800007c0: 0009bc03 ld x24,0(x19) + 800007c4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x4) # load rs2: x4 = 0xa7625600eb985ce9 + 800007c8: 0009b203 ld x4,0(x19) + 800007cc: 00898993 addi x19,x19,8 + +00000000800007d0 : +Zbkx_xperm8_cg_cp_rs2_b4: + xperm8 x0, x24, x4 # perform operation + 800007d0: 284c4033 xperm8 x0,x24,x4 + # Check if x0 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x0, Zbkx_xperm8_cg_cp_rs2_b4, Zbkx_xperm8_cg_cp_rs2_b4_str) + 800007d4: 0005b683 ld x13,0(x11) + 800007d8: 00068c63 beq x13,x0,800007f0 + 800007dc: 5640776f jal x14,80007d40 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000ebcd .word 0x8000ebcd + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x9685527bd5c9bb70 + 800007f4: 0009bc83 ld x25,0(x19) + 800007f8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs2: x5 = 0x3eea40fa7fb6b7da + 800007fc: 0009b283 ld x5,0(x19) + 80000800: 00898993 addi x19,x19,8 + +0000000080000804 : +Zbkx_xperm8_cg_cp_rs2_b5: + xperm8 x23, x25, x5 # perform operation + 80000804: 285ccbb3 xperm8 x23,x25,x5 + # Check if x23 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x23, Zbkx_xperm8_cg_cp_rs2_b5, Zbkx_xperm8_cg_cp_rs2_b5_str) + 80000808: 0005b683 ld x13,0(x11) + 8000080c: 01768c63 beq x13,x23,80000824 + 80000810: 5300776f jal x14,80007d40 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000ec01 .word 0x8000ec01 + 80000820: 00000000 .word 0x00000000 + 80000824: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x21) # load rs1: x21 = 0x6fb74c3b858f3073 + 80000828: 0009ba83 ld x21,0(x19) + 8000082c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x800d77cb79841105 + 80000830: 0009b303 ld x6,0(x19) + 80000834: 00898993 addi x19,x19,8 + +0000000080000838 : +Zbkx_xperm8_cg_cp_rs2_b6: + xperm8 x4, x21, x6 # perform operation + 80000838: 286ac233 xperm8 x4,x21,x6 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zbkx_xperm8_cg_cp_rs2_b6, Zbkx_xperm8_cg_cp_rs2_b6_str) + 8000083c: 0005b683 ld x13,0(x11) + 80000840: 00468c63 beq x13,x4,80000858 + 80000844: 4fc0776f jal x14,80007d40 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ec35 .word 0x8000ec35 + 80000854: 00000000 .word 0x00000000 + 80000858: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x15c0ed66bbf049a4 + 8000085c: 0009b183 ld x3,0(x19) + 80000860: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xf1945ff526eab8a7 + 80000864: 0009b383 ld x7,0(x19) + 80000868: 00898993 addi x19,x19,8 + +000000008000086c : +Zbkx_xperm8_cg_cp_rs2_b7: + xperm8 x2, x3, x7 # perform operation + 8000086c: 2871c133 xperm8 x2,x3,x7 + # Check if x2 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x2, Zbkx_xperm8_cg_cp_rs2_b7, Zbkx_xperm8_cg_cp_rs2_b7_str) + 80000870: 0005b683 ld x13,0(x11) + 80000874: 00268c63 beq x13,x2,8000088c + 80000878: 4c80776f jal x14,80007d40 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000ec69 .word 0x8000ec69 + 80000888: 00000000 .word 0x00000000 + 8000088c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x26) # load rs1: x26 = 0x8f8a51b6fd8774c1 + 80000890: 0009bd03 ld x26,0(x19) + 80000894: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0xc0957629c9b521a0 + 80000898: 0009b403 ld x8,0(x19) + 8000089c: 00898993 addi x19,x19,8 + +00000000800008a0 : +Zbkx_xperm8_cg_cp_rs2_b8: + xperm8 x23, x26, x8 # perform operation + 800008a0: 288d4bb3 xperm8 x23,x26,x8 + # Check if x23 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x23, Zbkx_xperm8_cg_cp_rs2_b8, Zbkx_xperm8_cg_cp_rs2_b8_str) + 800008a4: 0005b683 ld x13,0(x11) + 800008a8: 01768c63 beq x13,x23,800008c0 + 800008ac: 4940776f jal x14,80007d40 + 800008b0: 800008a0 .word 0x800008a0 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 8000ec9d .word 0x8000ec9d + 800008bc: 00000000 .word 0x00000000 + 800008c0: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xaba26dc51a686e44 + 800008c4: 0009b903 ld x18,0(x19) + 800008c8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0x3b9e58c89f0fa6ce + 800008cc: 0009b483 ld x9,0(x19) + 800008d0: 00898993 addi x19,x19,8 + +00000000800008d4 : +Zbkx_xperm8_cg_cp_rs2_b9: + xperm8 x12, x18, x9 # perform operation + 800008d4: 28994633 xperm8 x12,x18,x9 + # Check if x12 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x12, Zbkx_xperm8_cg_cp_rs2_b9, Zbkx_xperm8_cg_cp_rs2_b9_str) + 800008d8: 0005b683 ld x13,0(x11) + 800008dc: 00c68c63 beq x13,x12,800008f4 + 800008e0: 4600776f jal x14,80007d40 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 8000ecd1 .word 0x8000ecd1 + 800008f0: 00000000 .word 0x00000000 + 800008f4: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x5) # load rs1: x5 = 0xb853ae69d5f7659d + 800008f8: 0009b283 ld x5,0(x19) + 800008fc: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xd7356c055950708d + 80000900: 0009b503 ld x10,0(x19) + 80000904: 00898993 addi x19,x19,8 + +0000000080000908 : +Zbkx_xperm8_cg_cp_rs2_b10: + xperm8 x12, x5, x10 # perform operation + 80000908: 28a2c633 xperm8 x12,x5,x10 + # Check if x12 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x12, Zbkx_xperm8_cg_cp_rs2_b10, Zbkx_xperm8_cg_cp_rs2_b10_str) + 8000090c: 0005b683 ld x13,0(x11) + 80000910: 00c68c63 beq x13,x12,80000928 + 80000914: 42c0776f jal x14,80007d40 + 80000918: 80000908 .word 0x80000908 + 8000091c: 00000000 .word 0x00000000 + 80000920: 8000ed05 .word 0x8000ed05 + 80000924: 00000000 .word 0x00000000 + 80000928: 00858593 addi x11,x11,8 + + mv x10, x11 # switch signature pointer register to avoid conflict with test + 8000092c: 00058513 addi x10,x11,0 +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x30) # load rs1: x30 = 0x6c745cb8e22a6e8c + 80000930: 0009bf03 ld x30,0(x19) + 80000934: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0x5fd050c04ec19f51 + 80000938: 0009b583 ld x11,0(x19) + 8000093c: 00898993 addi x19,x19,8 + +0000000080000940 : +Zbkx_xperm8_cg_cp_rs2_b11: + xperm8 x31, x30, x11 # perform operation + 80000940: 28bf4fb3 xperm8 x31,x30,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x31, Zbkx_xperm8_cg_cp_rs2_b11, Zbkx_xperm8_cg_cp_rs2_b11_str) + 80000944: 00053683 ld x13,0(x10) + 80000948: 01f68c63 beq x13,x31,80000960 + 8000094c: 3f40776f jal x14,80007d40 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 8000ed3a .word 0x8000ed3a + 8000095c: 00000000 .word 0x00000000 + 80000960: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xfde38632c53ff97d + 80000964: 0009b403 ld x8,0(x19) + 80000968: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xa0984260c54d877e + 8000096c: 0009b603 ld x12,0(x19) + 80000970: 00898993 addi x19,x19,8 + +0000000080000974 : +Zbkx_xperm8_cg_cp_rs2_b12: + xperm8 x23, x8, x12 # perform operation + 80000974: 28c44bb3 xperm8 x23,x8,x12 + # Check if x23 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x23, Zbkx_xperm8_cg_cp_rs2_b12, Zbkx_xperm8_cg_cp_rs2_b12_str) + 80000978: 00053683 ld x13,0(x10) + 8000097c: 01768c63 beq x13,x23,80000994 + 80000980: 3c00776f jal x14,80007d40 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000ed6f .word 0x8000ed6f + 80000990: 00000000 .word 0x00000000 + 80000994: 00850513 addi x10,x10,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000998: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000099c: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x28aad8563c8583f2 + 800009a0: 0009b803 ld x16,0(x19) + 800009a4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x074c7fcf15dc4aaa + 800009a8: 0009b683 ld x13,0(x19) + 800009ac: 00898993 addi x19,x19,8 + +00000000800009b0 : +Zbkx_xperm8_cg_cp_rs2_b13: + xperm8 x14, x16, x13 # perform operation + 800009b0: 28d84733 xperm8 x14,x16,x13 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zbkx_xperm8_cg_cp_rs2_b13, Zbkx_xperm8_cg_cp_rs2_b13_str) + 800009b4: 00053383 ld x7,0(x10) + 800009b8: 00e38c63 beq x7,x14,800009d0 + 800009bc: 35c0746f jal x8,80007d18 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 8000eda4 .word 0x8000eda4 + 800009cc: 00000000 .word 0x00000000 + 800009d0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x27) # load rs1: x27 = 0x88e2b57edf656498 + 800009d4: 0009bd83 ld x27,0(x19) + 800009d8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xead9c7ce62c8c892 + 800009dc: 0009b703 ld x14,0(x19) + 800009e0: 00898993 addi x19,x19,8 + +00000000800009e4 : +Zbkx_xperm8_cg_cp_rs2_b14: + xperm8 x21, x27, x14 # perform operation + 800009e4: 28edcab3 xperm8 x21,x27,x14 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zbkx_xperm8_cg_cp_rs2_b14, Zbkx_xperm8_cg_cp_rs2_b14_str) + 800009e8: 00053383 ld x7,0(x10) + 800009ec: 01538c63 beq x7,x21,80000a04 + 800009f0: 3280746f jal x8,80007d18 + 800009f4: 800009e4 .word 0x800009e4 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 8000edd9 .word 0x8000edd9 + 80000a00: 00000000 .word 0x00000000 + 80000a04: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x3) # load rs1: x3 = 0x44f4559b56a63932 + 80000a08: 0009b183 ld x3,0(x19) + 80000a0c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x6378369a66e26f09 + 80000a10: 0009b783 ld x15,0(x19) + 80000a14: 00898993 addi x19,x19,8 + +0000000080000a18 : +Zbkx_xperm8_cg_cp_rs2_b15: + xperm8 x9, x3, x15 # perform operation + 80000a18: 28f1c4b3 xperm8 x9,x3,x15 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zbkx_xperm8_cg_cp_rs2_b15, Zbkx_xperm8_cg_cp_rs2_b15_str) + 80000a1c: 00053383 ld x7,0(x10) + 80000a20: 00938c63 beq x7,x9,80000a38 + 80000a24: 2f40746f jal x8,80007d18 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 8000ee0e .word 0x8000ee0e + 80000a34: 00000000 .word 0x00000000 + 80000a38: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x8ed76f69a78264a6 + 80000a3c: 0009b603 ld x12,0(x19) + 80000a40: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xd1950bdbb35ef1ae + 80000a44: 0009b803 ld x16,0(x19) + 80000a48: 00898993 addi x19,x19,8 + +0000000080000a4c : +Zbkx_xperm8_cg_cp_rs2_b16: + xperm8 x20, x12, x16 # perform operation + 80000a4c: 29064a33 xperm8 x20,x12,x16 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zbkx_xperm8_cg_cp_rs2_b16, Zbkx_xperm8_cg_cp_rs2_b16_str) + 80000a50: 00053383 ld x7,0(x10) + 80000a54: 01438c63 beq x7,x20,80000a6c + 80000a58: 2c00746f jal x8,80007d18 + 80000a5c: 80000a4c .word 0x80000a4c + 80000a60: 00000000 .word 0x00000000 + 80000a64: 8000ee43 .word 0x8000ee43 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xda171d2bd87f3314 + 80000a70: 0009ba03 ld x20,0(x19) + 80000a74: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xfeb4bc026422f67b + 80000a78: 0009b883 ld x17,0(x19) + 80000a7c: 00898993 addi x19,x19,8 + +0000000080000a80 : +Zbkx_xperm8_cg_cp_rs2_b17: + xperm8 x18, x20, x17 # perform operation + 80000a80: 291a4933 xperm8 x18,x20,x17 + # Check if x18 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x18, Zbkx_xperm8_cg_cp_rs2_b17, Zbkx_xperm8_cg_cp_rs2_b17_str) + 80000a84: 00053383 ld x7,0(x10) + 80000a88: 01238c63 beq x7,x18,80000aa0 + 80000a8c: 28c0746f jal x8,80007d18 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000ee78 .word 0x8000ee78 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0xeabc65614f94ef46 + 80000aa4: 0009bc83 ld x25,0(x19) + 80000aa8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x882ea7ae2cad291f + 80000aac: 0009b903 ld x18,0(x19) + 80000ab0: 00898993 addi x19,x19,8 + +0000000080000ab4 : +Zbkx_xperm8_cg_cp_rs2_b18: + xperm8 x17, x25, x18 # perform operation + 80000ab4: 292cc8b3 xperm8 x17,x25,x18 + # Check if x17 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x17, Zbkx_xperm8_cg_cp_rs2_b18, Zbkx_xperm8_cg_cp_rs2_b18_str) + 80000ab8: 00053383 ld x7,0(x10) + 80000abc: 01138c63 beq x7,x17,80000ad4 + 80000ac0: 2580746f jal x8,80007d18 + 80000ac4: 80000ab4 .word 0x80000ab4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 8000eead .word 0x8000eead + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 00850513 addi x10,x10,8 + + mv x21, x19 # switch data pointer register to avoid conflict with test + 80000ad8: 00098a93 addi x21,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x31d469fa9004f28f + 80000adc: 000abc03 ld x24,0(x21) + 80000ae0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0xe91fe218ec9f779d + 80000ae4: 000ab983 ld x19,0(x21) + 80000ae8: 008a8a93 addi x21,x21,8 + +0000000080000aec : +Zbkx_xperm8_cg_cp_rs2_b19: + xperm8 x14, x24, x19 # perform operation + 80000aec: 293c4733 xperm8 x14,x24,x19 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zbkx_xperm8_cg_cp_rs2_b19, Zbkx_xperm8_cg_cp_rs2_b19_str) + 80000af0: 00053383 ld x7,0(x10) + 80000af4: 00e38c63 beq x7,x14,80000b0c + 80000af8: 2200746f jal x8,80007d18 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000eee2 .word 0x8000eee2 + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x9106c62677564a7a + 80000b10: 000abd03 ld x26,0(x21) + 80000b14: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xf9b4055fe8e07ba5 + 80000b18: 000aba03 ld x20,0(x21) + 80000b1c: 008a8a93 addi x21,x21,8 + +0000000080000b20 : +Zbkx_xperm8_cg_cp_rs2_b20: + xperm8 x0, x26, x20 # perform operation + 80000b20: 294d4033 xperm8 x0,x26,x20 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkx_xperm8_cg_cp_rs2_b20, Zbkx_xperm8_cg_cp_rs2_b20_str) + 80000b24: 00053383 ld x7,0(x10) + 80000b28: 00038c63 beq x7,x0,80000b40 + 80000b2c: 1ec0746f jal x8,80007d18 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 8000ef17 .word 0x8000ef17 + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 00850513 addi x10,x10,8 + + mv x16, x21 # switch data pointer register to avoid conflict with test + 80000b44: 000a8813 addi x16,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x08bcb890810ce15b + 80000b48: 00083e03 ld x28,0(x16) + 80000b4c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x1e06c73b47bc6a34 + 80000b50: 00083a83 ld x21,0(x16) + 80000b54: 00880813 addi x16,x16,8 + +0000000080000b58 : +Zbkx_xperm8_cg_cp_rs2_b21: + xperm8 x15, x28, x21 # perform operation + 80000b58: 295e47b3 xperm8 x15,x28,x21 + # Check if x15 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x15, Zbkx_xperm8_cg_cp_rs2_b21, Zbkx_xperm8_cg_cp_rs2_b21_str) + 80000b5c: 00053383 ld x7,0(x10) + 80000b60: 00f38c63 beq x7,x15,80000b78 + 80000b64: 1b40746f jal x8,80007d18 + 80000b68: 80000b58 .word 0x80000b58 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 8000ef4c .word 0x8000ef4c + 80000b74: 00000000 .word 0x00000000 + 80000b78: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xe8f2057c1b65b2bb + 80000b7c: 00083603 ld x12,0(x16) + 80000b80: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x2b129340f84a5f00 + 80000b84: 00083b03 ld x22,0(x16) + 80000b88: 00880813 addi x16,x16,8 + +0000000080000b8c : +Zbkx_xperm8_cg_cp_rs2_b22: + xperm8 x3, x12, x22 # perform operation + 80000b8c: 296641b3 xperm8 x3,x12,x22 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkx_xperm8_cg_cp_rs2_b22, Zbkx_xperm8_cg_cp_rs2_b22_str) + 80000b90: 00053383 ld x7,0(x10) + 80000b94: 00338c63 beq x7,x3,80000bac + 80000b98: 1800746f jal x8,80007d18 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 8000ef81 .word 0x8000ef81 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x3f3aabba3b6d1429 + 80000bb0: 00083c03 ld x24,0(x16) + 80000bb4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x1d001435de448013 + 80000bb8: 00083b83 ld x23,0(x16) + 80000bbc: 00880813 addi x16,x16,8 + +0000000080000bc0 : +Zbkx_xperm8_cg_cp_rs2_b23: + xperm8 x19, x24, x23 # perform operation + 80000bc0: 297c49b3 xperm8 x19,x24,x23 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkx_xperm8_cg_cp_rs2_b23, Zbkx_xperm8_cg_cp_rs2_b23_str) + 80000bc4: 00053383 ld x7,0(x10) + 80000bc8: 01338c63 beq x7,x19,80000be0 + 80000bcc: 14c0746f jal x8,80007d18 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000efb6 .word 0x8000efb6 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x4bee95bb44f869cc + 80000be4: 00083303 ld x6,0(x16) + 80000be8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x2832bee34048ed46 + 80000bec: 00083c03 ld x24,0(x16) + 80000bf0: 00880813 addi x16,x16,8 + +0000000080000bf4 : +Zbkx_xperm8_cg_cp_rs2_b24: + xperm8 x22, x6, x24 # perform operation + 80000bf4: 29834b33 xperm8 x22,x6,x24 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zbkx_xperm8_cg_cp_rs2_b24, Zbkx_xperm8_cg_cp_rs2_b24_str) + 80000bf8: 00053383 ld x7,0(x10) + 80000bfc: 01638c63 beq x7,x22,80000c14 + 80000c00: 1180746f jal x8,80007d18 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000efeb .word 0x8000efeb + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x752d97a27ee0d54a + 80000c18: 00083e83 ld x29,0(x16) + 80000c1c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xc29645622623d26c + 80000c20: 00083c83 ld x25,0(x16) + 80000c24: 00880813 addi x16,x16,8 + +0000000080000c28 : +Zbkx_xperm8_cg_cp_rs2_b25: + xperm8 x26, x29, x25 # perform operation + 80000c28: 299ecd33 xperm8 x26,x29,x25 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zbkx_xperm8_cg_cp_rs2_b25, Zbkx_xperm8_cg_cp_rs2_b25_str) + 80000c2c: 00053383 ld x7,0(x10) + 80000c30: 01a38c63 beq x7,x26,80000c48 + 80000c34: 0e40746f jal x8,80007d18 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000f020 .word 0x8000f020 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xeb7c31e8edfaafa2 + 80000c4c: 00083303 ld x6,0(x16) + 80000c50: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xa4a004ba605d242e + 80000c54: 00083d03 ld x26,0(x16) + 80000c58: 00880813 addi x16,x16,8 + +0000000080000c5c : +Zbkx_xperm8_cg_cp_rs2_b26: + xperm8 x30, x6, x26 # perform operation + 80000c5c: 29a34f33 xperm8 x30,x6,x26 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zbkx_xperm8_cg_cp_rs2_b26, Zbkx_xperm8_cg_cp_rs2_b26_str) + 80000c60: 00053383 ld x7,0(x10) + 80000c64: 01e38c63 beq x7,x30,80000c7c + 80000c68: 0b00746f jal x8,80007d18 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 8000f055 .word 0x8000f055 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0xd4a8aeee8fc5366b + 80000c80: 00083283 ld x5,0(x16) + 80000c84: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x3e714951f6c2a751 + 80000c88: 00083d83 ld x27,0(x16) + 80000c8c: 00880813 addi x16,x16,8 + +0000000080000c90 : +Zbkx_xperm8_cg_cp_rs2_b27: + xperm8 x14, x5, x27 # perform operation + 80000c90: 29b2c733 xperm8 x14,x5,x27 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zbkx_xperm8_cg_cp_rs2_b27, Zbkx_xperm8_cg_cp_rs2_b27_str) + 80000c94: 00053383 ld x7,0(x10) + 80000c98: 00e38c63 beq x7,x14,80000cb0 + 80000c9c: 07c0746f jal x8,80007d18 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000f08a .word 0x8000f08a + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x126a1e478221d774 + 80000cb4: 00083203 ld x4,0(x16) + 80000cb8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x196251a947807526 + 80000cbc: 00083e03 ld x28,0(x16) + 80000cc0: 00880813 addi x16,x16,8 + +0000000080000cc4 : +Zbkx_xperm8_cg_cp_rs2_b28: + xperm8 x23, x4, x28 # perform operation + 80000cc4: 29c24bb3 xperm8 x23,x4,x28 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zbkx_xperm8_cg_cp_rs2_b28, Zbkx_xperm8_cg_cp_rs2_b28_str) + 80000cc8: 00053383 ld x7,0(x10) + 80000ccc: 01738c63 beq x7,x23,80000ce4 + 80000cd0: 0480746f jal x8,80007d18 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 8000f0bf .word 0x8000f0bf + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x3c7ef20646c58687 + 80000ce8: 00083683 ld x13,0(x16) + 80000cec: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x91cd2a70ce5f05c9 + 80000cf0: 00083e83 ld x29,0(x16) + 80000cf4: 00880813 addi x16,x16,8 + +0000000080000cf8 : +Zbkx_xperm8_cg_cp_rs2_b29: + xperm8 x23, x13, x29 # perform operation + 80000cf8: 29d6cbb3 xperm8 x23,x13,x29 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zbkx_xperm8_cg_cp_rs2_b29, Zbkx_xperm8_cg_cp_rs2_b29_str) + 80000cfc: 00053383 ld x7,0(x10) + 80000d00: 01738c63 beq x7,x23,80000d18 + 80000d04: 0140746f jal x8,80007d18 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8000f0f4 .word 0x8000f0f4 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x116c0d9fd21b8045 + 80000d1c: 00083583 ld x11,0(x16) + 80000d20: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x7b8a865e272eeb0c + 80000d24: 00083f03 ld x30,0(x16) + 80000d28: 00880813 addi x16,x16,8 + +0000000080000d2c : +Zbkx_xperm8_cg_cp_rs2_b30: + xperm8 x6, x11, x30 # perform operation + 80000d2c: 29e5c333 xperm8 x6,x11,x30 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkx_xperm8_cg_cp_rs2_b30, Zbkx_xperm8_cg_cp_rs2_b30_str) + 80000d30: 00053383 ld x7,0(x10) + 80000d34: 00638c63 beq x7,x6,80000d4c + 80000d38: 7e10646f jal x8,80007d18 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 8000f129 .word 0x8000f129 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xb5555f941516a33e + 80000d50: 00083083 ld x1,0(x16) + 80000d54: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x71e27425680894fc + 80000d58: 00083f83 ld x31,0(x16) + 80000d5c: 00880813 addi x16,x16,8 + +0000000080000d60 : +Zbkx_xperm8_cg_cp_rs2_b31: + xperm8 x19, x1, x31 # perform operation + 80000d60: 29f0c9b3 xperm8 x19,x1,x31 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zbkx_xperm8_cg_cp_rs2_b31, Zbkx_xperm8_cg_cp_rs2_b31_str) + 80000d64: 00053383 ld x7,0(x10) + 80000d68: 01338c63 beq x7,x19,80000d80 + 80000d6c: 7ad0646f jal x8,80007d18 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8000f15e .word 0x8000f15e + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x92c96a3bcb323609 + 80000d84: 00083683 ld x13,0(x16) + 80000d88: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x385c1a3df249699e + 80000d8c: 00083703 ld x14,0(x16) + 80000d90: 00880813 addi x16,x16,8 + +0000000080000d94 : +Zbkx_xperm8_cg_cp_rd_b0: + xperm8 x0, x13, x14 # perform operation + 80000d94: 28e6c033 xperm8 x0,x13,x14 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zbkx_xperm8_cg_cp_rd_b0, Zbkx_xperm8_cg_cp_rd_b0_str) + 80000d98: 00053383 ld x7,0(x10) + 80000d9c: 00038c63 beq x7,x0,80000db4 + 80000da0: 7790646f jal x8,80007d18 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 8000f193 .word 0x8000f193 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x27b0ecdd04fbfe70 + 80000db8: 00083e83 ld x29,0(x16) + 80000dbc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x8796d330e59a56fc + 80000dc0: 00083683 ld x13,0(x16) + 80000dc4: 00880813 addi x16,x16,8 + +0000000080000dc8 : +Zbkx_xperm8_cg_cp_rd_b1: + xperm8 x1, x29, x13 # perform operation + 80000dc8: 28dec0b3 xperm8 x1,x29,x13 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zbkx_xperm8_cg_cp_rd_b1, Zbkx_xperm8_cg_cp_rd_b1_str) + 80000dcc: 00053383 ld x7,0(x10) + 80000dd0: 00138c63 beq x7,x1,80000de8 + 80000dd4: 7450646f jal x8,80007d18 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 8000f1c6 .word 0x8000f1c6 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x7b18e661596b5207 + 80000dec: 00083c03 ld x24,0(x16) + 80000df0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xa7912d10c5a45c34 + 80000df4: 00083d03 ld x26,0(x16) + 80000df8: 00880813 addi x16,x16,8 + +0000000080000dfc : +Zbkx_xperm8_cg_cp_rd_b2: + xperm8 x2, x24, x26 # perform operation + 80000dfc: 29ac4133 xperm8 x2,x24,x26 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zbkx_xperm8_cg_cp_rd_b2, Zbkx_xperm8_cg_cp_rd_b2_str) + 80000e00: 00053383 ld x7,0(x10) + 80000e04: 00238c63 beq x7,x2,80000e1c + 80000e08: 7110646f jal x8,80007d18 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 8000f1f9 .word 0x8000f1f9 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0xfc966a5b83f15e5c + 80000e20: 00083c03 ld x24,0(x16) + 80000e24: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x50940b30d5552cda + 80000e28: 00083703 ld x14,0(x16) + 80000e2c: 00880813 addi x16,x16,8 + +0000000080000e30 : +Zbkx_xperm8_cg_cp_rd_b3: + xperm8 x3, x24, x14 # perform operation + 80000e30: 28ec41b3 xperm8 x3,x24,x14 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zbkx_xperm8_cg_cp_rd_b3, Zbkx_xperm8_cg_cp_rd_b3_str) + 80000e34: 00053383 ld x7,0(x10) + 80000e38: 00338c63 beq x7,x3,80000e50 + 80000e3c: 6dd0646f jal x8,80007d18 + 80000e40: 80000e30 .word 0x80000e30 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 8000f22c .word 0x8000f22c + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0e949969ae2b73a3 + 80000e54: 00083a83 ld x21,0(x16) + 80000e58: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x53ce0f9605441a94 + 80000e5c: 00083d83 ld x27,0(x16) + 80000e60: 00880813 addi x16,x16,8 + +0000000080000e64 : +Zbkx_xperm8_cg_cp_rd_b4: + xperm8 x4, x21, x27 # perform operation + 80000e64: 29bac233 xperm8 x4,x21,x27 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zbkx_xperm8_cg_cp_rd_b4, Zbkx_xperm8_cg_cp_rd_b4_str) + 80000e68: 00053383 ld x7,0(x10) + 80000e6c: 00438c63 beq x7,x4,80000e84 + 80000e70: 6a90646f jal x8,80007d18 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 8000f25f .word 0x8000f25f + 80000e80: 00000000 .word 0x00000000 + 80000e84: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x9a3a0ff1beb732cf + 80000e88: 00083783 ld x15,0(x16) + 80000e8c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x031592f5eda1ee4a + 80000e90: 00083083 ld x1,0(x16) + 80000e94: 00880813 addi x16,x16,8 + +0000000080000e98 : +Zbkx_xperm8_cg_cp_rd_b5: + xperm8 x5, x15, x1 # perform operation + 80000e98: 2817c2b3 xperm8 x5,x15,x1 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zbkx_xperm8_cg_cp_rd_b5, Zbkx_xperm8_cg_cp_rd_b5_str) + 80000e9c: 00053383 ld x7,0(x10) + 80000ea0: 00538c63 beq x7,x5,80000eb8 + 80000ea4: 6750646f jal x8,80007d18 + 80000ea8: 80000e98 .word 0x80000e98 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 8000f292 .word 0x8000f292 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x97c9682c8e394aa2 + 80000ebc: 00083683 ld x13,0(x16) + 80000ec0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xf6c26d92402b6c50 + 80000ec4: 00083e83 ld x29,0(x16) + 80000ec8: 00880813 addi x16,x16,8 + +0000000080000ecc : +Zbkx_xperm8_cg_cp_rd_b6: + xperm8 x6, x13, x29 # perform operation + 80000ecc: 29d6c333 xperm8 x6,x13,x29 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zbkx_xperm8_cg_cp_rd_b6, Zbkx_xperm8_cg_cp_rd_b6_str) + 80000ed0: 00053383 ld x7,0(x10) + 80000ed4: 00638c63 beq x7,x6,80000eec + 80000ed8: 6410646f jal x8,80007d18 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 8000f2c5 .word 0x8000f2c5 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ef0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000ef4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x52a1654d240533ac + 80000ef8: 00083003 ld x0,0(x16) + 80000efc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xaf5ed9c7a0589c3b + 80000f00: 00083b83 ld x23,0(x16) + 80000f04: 00880813 addi x16,x16,8 + +0000000080000f08 : +Zbkx_xperm8_cg_cp_rd_b7: + xperm8 x7, x0, x23 # perform operation + 80000f08: 297043b3 xperm8 x7,x0,x23 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zbkx_xperm8_cg_cp_rd_b7, Zbkx_xperm8_cg_cp_rd_b7_str) + 80000f0c: 00053683 ld x13,0(x10) + 80000f10: 00768c63 beq x13,x7,80000f28 + 80000f14: 62d0676f jal x14,80007d40 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 8000f2f8 .word 0x8000f2f8 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x651054b5cd410214 + 80000f2c: 00083983 ld x19,0(x16) + 80000f30: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xb474f496b2e5bf4a + 80000f34: 00083f83 ld x31,0(x16) + 80000f38: 00880813 addi x16,x16,8 + +0000000080000f3c : +Zbkx_xperm8_cg_cp_rd_b8: + xperm8 x8, x19, x31 # perform operation + 80000f3c: 29f9c433 xperm8 x8,x19,x31 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zbkx_xperm8_cg_cp_rd_b8, Zbkx_xperm8_cg_cp_rd_b8_str) + 80000f40: 00053683 ld x13,0(x10) + 80000f44: 00868c63 beq x13,x8,80000f5c + 80000f48: 5f90676f jal x14,80007d40 + 80000f4c: 80000f3c .word 0x80000f3c + 80000f50: 00000000 .word 0x00000000 + 80000f54: 8000f32b .word 0x8000f32b + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xa76ca9b3e259f50a + 80000f60: 00083383 ld x7,0(x16) + 80000f64: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xe54f62de509bd21b + 80000f68: 00083603 ld x12,0(x16) + 80000f6c: 00880813 addi x16,x16,8 + +0000000080000f70 : +Zbkx_xperm8_cg_cp_rd_b9: + xperm8 x9, x7, x12 # perform operation + 80000f70: 28c3c4b3 xperm8 x9,x7,x12 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zbkx_xperm8_cg_cp_rd_b9, Zbkx_xperm8_cg_cp_rd_b9_str) + 80000f74: 00053683 ld x13,0(x10) + 80000f78: 00968c63 beq x13,x9,80000f90 + 80000f7c: 5c50676f jal x14,80007d40 + 80000f80: 80000f70 .word 0x80000f70 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 8000f35e .word 0x8000f35e + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 00850513 addi x10,x10,8 + + mv x31, x10 # switch signature pointer register to avoid conflict with test + 80000f94: 00050f93 addi x31,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x014bf9b44bda69b0 + 80000f98: 00083a83 ld x21,0(x16) + 80000f9c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0xf242d8e7a0bfc809 + 80000fa0: 00083c83 ld x25,0(x16) + 80000fa4: 00880813 addi x16,x16,8 + +0000000080000fa8 : +Zbkx_xperm8_cg_cp_rd_b10: + xperm8 x10, x21, x25 # perform operation + 80000fa8: 299ac533 xperm8 x10,x21,x25 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zbkx_xperm8_cg_cp_rd_b10, Zbkx_xperm8_cg_cp_rd_b10_str) + 80000fac: 000fb683 ld x13,0(x31) + 80000fb0: 00a68c63 beq x13,x10,80000fc8 + 80000fb4: 58d0676f jal x14,80007d40 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 8000f391 .word 0x8000f391 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x851a6e950af74863 + 80000fcc: 00083d83 ld x27,0(x16) + 80000fd0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs2: x17 = 0x6f6180bf658c859a + 80000fd4: 00083883 ld x17,0(x16) + 80000fd8: 00880813 addi x16,x16,8 + +0000000080000fdc : +Zbkx_xperm8_cg_cp_rd_b11: + xperm8 x11, x27, x17 # perform operation + 80000fdc: 291dc5b3 xperm8 x11,x27,x17 + # Check if x11 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x11, Zbkx_xperm8_cg_cp_rd_b11, Zbkx_xperm8_cg_cp_rd_b11_str) + 80000fe0: 000fb683 ld x13,0(x31) + 80000fe4: 00b68c63 beq x13,x11,80000ffc + 80000fe8: 5590676f jal x14,80007d40 + 80000fec: 80000fdc .word 0x80000fdc + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 8000f3c5 .word 0x8000f3c5 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x5f16f6f78c9350d3 + 80001000: 00083083 ld x1,0(x16) + 80001004: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x6296100a78ea6198 + 80001008: 00083303 ld x6,0(x16) + 8000100c: 00880813 addi x16,x16,8 + +0000000080001010 : +Zbkx_xperm8_cg_cp_rd_b12: + xperm8 x12, x1, x6 # perform operation + 80001010: 2860c633 xperm8 x12,x1,x6 + # Check if x12 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x12, Zbkx_xperm8_cg_cp_rd_b12, Zbkx_xperm8_cg_cp_rd_b12_str) + 80001014: 000fb683 ld x13,0(x31) + 80001018: 00c68c63 beq x13,x12,80001030 + 8000101c: 5250676f jal x14,80007d40 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 8000f3f9 .word 0x8000f3f9 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008f8f93 addi x31,x31,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001034: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001038: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xf67cb3fa29ed65ca + 8000103c: 00083d83 ld x27,0(x16) + 80001040: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x44e1cd19a5bc1291 + 80001044: 00083203 ld x4,0(x16) + 80001048: 00880813 addi x16,x16,8 + +000000008000104c : +Zbkx_xperm8_cg_cp_rd_b13: + xperm8 x13, x27, x4 # perform operation + 8000104c: 284dc6b3 xperm8 x13,x27,x4 + # Check if x13 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x13, Zbkx_xperm8_cg_cp_rd_b13, Zbkx_xperm8_cg_cp_rd_b13_str) + 80001050: 000fb383 ld x7,0(x31) + 80001054: 00d38c63 beq x7,x13,8000106c + 80001058: 4c10646f jal x8,80007d18 + 8000105c: 8000104c .word 0x8000104c + 80001060: 00000000 .word 0x00000000 + 80001064: 8000f42d .word 0x8000f42d + 80001068: 00000000 .word 0x00000000 + 8000106c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x7557693fcf4369b4 + 80001070: 00083483 ld x9,0(x16) + 80001074: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0xf1735cd28acf03e2 + 80001078: 00083e83 ld x29,0(x16) + 8000107c: 00880813 addi x16,x16,8 + +0000000080001080 : +Zbkx_xperm8_cg_cp_rd_b14: + xperm8 x14, x9, x29 # perform operation + 80001080: 29d4c733 xperm8 x14,x9,x29 + # Check if x14 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x14, Zbkx_xperm8_cg_cp_rd_b14, Zbkx_xperm8_cg_cp_rd_b14_str) + 80001084: 000fb383 ld x7,0(x31) + 80001088: 00e38c63 beq x7,x14,800010a0 + 8000108c: 48d0646f jal x8,80007d18 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 8000f461 .word 0x8000f461 + 8000109c: 00000000 .word 0x00000000 + 800010a0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x26e5e06c54a6cbbd + 800010a4: 00083f03 ld x30,0(x16) + 800010a8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xaa970390105ddef0 + 800010ac: 00083b03 ld x22,0(x16) + 800010b0: 00880813 addi x16,x16,8 + +00000000800010b4 : +Zbkx_xperm8_cg_cp_rd_b15: + xperm8 x15, x30, x22 # perform operation + 800010b4: 296f47b3 xperm8 x15,x30,x22 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zbkx_xperm8_cg_cp_rd_b15, Zbkx_xperm8_cg_cp_rd_b15_str) + 800010b8: 000fb383 ld x7,0(x31) + 800010bc: 00f38c63 beq x7,x15,800010d4 + 800010c0: 4590646f jal x8,80007d18 + 800010c4: 800010b4 .word 0x800010b4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 8000f495 .word 0x8000f495 + 800010d0: 00000000 .word 0x00000000 + 800010d4: 008f8f93 addi x31,x31,8 + + mv x10, x16 # switch data pointer register to avoid conflict with test + 800010d8: 00080513 addi x10,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xa1290092bedc9f9b + 800010dc: 00053483 ld x9,0(x10) + 800010e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x859b37feb0557372 + 800010e4: 00053b83 ld x23,0(x10) + 800010e8: 00850513 addi x10,x10,8 + +00000000800010ec : +Zbkx_xperm8_cg_cp_rd_b16: + xperm8 x16, x9, x23 # perform operation + 800010ec: 2974c833 xperm8 x16,x9,x23 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zbkx_xperm8_cg_cp_rd_b16, Zbkx_xperm8_cg_cp_rd_b16_str) + 800010f0: 000fb383 ld x7,0(x31) + 800010f4: 01038c63 beq x7,x16,8000110c + 800010f8: 4210646f jal x8,80007d18 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f4c9 .word 0x8000f4c9 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x75b36a0054539c8c + 80001110: 00053b83 ld x23,0(x10) + 80001114: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xf908013cacb91885 + 80001118: 00053d83 ld x27,0(x10) + 8000111c: 00850513 addi x10,x10,8 + +0000000080001120 : +Zbkx_xperm8_cg_cp_rd_b17: + xperm8 x17, x23, x27 # perform operation + 80001120: 29bbc8b3 xperm8 x17,x23,x27 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zbkx_xperm8_cg_cp_rd_b17, Zbkx_xperm8_cg_cp_rd_b17_str) + 80001124: 000fb383 ld x7,0(x31) + 80001128: 01138c63 beq x7,x17,80001140 + 8000112c: 3ed0646f jal x8,80007d18 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f4fd .word 0x8000f4fd + 8000113c: 00000000 .word 0x00000000 + 80001140: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xf7af95a0a1d68a18 + 80001144: 00053003 ld x0,0(x10) + 80001148: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6f0ac5038137b5c7 + 8000114c: 00053a03 ld x20,0(x10) + 80001150: 00850513 addi x10,x10,8 + +0000000080001154 : +Zbkx_xperm8_cg_cp_rd_b18: + xperm8 x18, x0, x20 # perform operation + 80001154: 29404933 xperm8 x18,x0,x20 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zbkx_xperm8_cg_cp_rd_b18, Zbkx_xperm8_cg_cp_rd_b18_str) + 80001158: 000fb383 ld x7,0(x31) + 8000115c: 01238c63 beq x7,x18,80001174 + 80001160: 3b90646f jal x8,80007d18 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 8000f531 .word 0x8000f531 + 80001170: 00000000 .word 0x00000000 + 80001174: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x4a8f41a825cb3894 + 80001178: 00053103 ld x2,0(x10) + 8000117c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x04e2b5161cd15307 + 80001180: 00053183 ld x3,0(x10) + 80001184: 00850513 addi x10,x10,8 + +0000000080001188 : +Zbkx_xperm8_cg_cp_rd_b19: + xperm8 x19, x2, x3 # perform operation + 80001188: 283149b3 xperm8 x19,x2,x3 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zbkx_xperm8_cg_cp_rd_b19, Zbkx_xperm8_cg_cp_rd_b19_str) + 8000118c: 000fb383 ld x7,0(x31) + 80001190: 01338c63 beq x7,x19,800011a8 + 80001194: 3850646f jal x8,80007d18 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8000f565 .word 0x8000f565 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x43a275b3fd357d7b + 800011ac: 00053e83 ld x29,0(x10) + 800011b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xd49c69f290755c00 + 800011b4: 00053083 ld x1,0(x10) + 800011b8: 00850513 addi x10,x10,8 + +00000000800011bc : +Zbkx_xperm8_cg_cp_rd_b20: + xperm8 x20, x29, x1 # perform operation + 800011bc: 281eca33 xperm8 x20,x29,x1 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zbkx_xperm8_cg_cp_rd_b20, Zbkx_xperm8_cg_cp_rd_b20_str) + 800011c0: 000fb383 ld x7,0(x31) + 800011c4: 01438c63 beq x7,x20,800011dc + 800011c8: 3510646f jal x8,80007d18 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 8000f599 .word 0x8000f599 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x575a2985bdc556c3 + 800011e0: 00053683 ld x13,0(x10) + 800011e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x1a3113da04cf0583 + 800011e8: 00053883 ld x17,0(x10) + 800011ec: 00850513 addi x10,x10,8 + +00000000800011f0 : +Zbkx_xperm8_cg_cp_rd_b21: + xperm8 x21, x13, x17 # perform operation + 800011f0: 2916cab3 xperm8 x21,x13,x17 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zbkx_xperm8_cg_cp_rd_b21, Zbkx_xperm8_cg_cp_rd_b21_str) + 800011f4: 000fb383 ld x7,0(x31) + 800011f8: 01538c63 beq x7,x21,80001210 + 800011fc: 31d0646f jal x8,80007d18 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8000f5cd .word 0x8000f5cd + 8000120c: 00000000 .word 0x00000000 + 80001210: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0f9085ddd8bda463 + 80001214: 00053983 ld x19,0(x10) + 80001218: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x61c23dbea8e373d8 + 8000121c: 00053083 ld x1,0(x10) + 80001220: 00850513 addi x10,x10,8 + +0000000080001224 : +Zbkx_xperm8_cg_cp_rd_b22: + xperm8 x22, x19, x1 # perform operation + 80001224: 2819cb33 xperm8 x22,x19,x1 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zbkx_xperm8_cg_cp_rd_b22, Zbkx_xperm8_cg_cp_rd_b22_str) + 80001228: 000fb383 ld x7,0(x31) + 8000122c: 01638c63 beq x7,x22,80001244 + 80001230: 2e90646f jal x8,80007d18 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 8000f601 .word 0x8000f601 + 80001240: 00000000 .word 0x00000000 + 80001244: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xb2a2f634a5514cce + 80001248: 00053a03 ld x20,0(x10) + 8000124c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x08a980555e2aa4d4 + 80001250: 00053283 ld x5,0(x10) + 80001254: 00850513 addi x10,x10,8 + +0000000080001258 : +Zbkx_xperm8_cg_cp_rd_b23: + xperm8 x23, x20, x5 # perform operation + 80001258: 285a4bb3 xperm8 x23,x20,x5 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zbkx_xperm8_cg_cp_rd_b23, Zbkx_xperm8_cg_cp_rd_b23_str) + 8000125c: 000fb383 ld x7,0(x31) + 80001260: 01738c63 beq x7,x23,80001278 + 80001264: 2b50646f jal x8,80007d18 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 8000f635 .word 0x8000f635 + 80001274: 00000000 .word 0x00000000 + 80001278: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x36c300566ad5f27a + 8000127c: 00053b03 ld x22,0(x10) + 80001280: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8769485cef3ea656 + 80001284: 00053103 ld x2,0(x10) + 80001288: 00850513 addi x10,x10,8 + +000000008000128c : +Zbkx_xperm8_cg_cp_rd_b24: + xperm8 x24, x22, x2 # perform operation + 8000128c: 282b4c33 xperm8 x24,x22,x2 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zbkx_xperm8_cg_cp_rd_b24, Zbkx_xperm8_cg_cp_rd_b24_str) + 80001290: 000fb383 ld x7,0(x31) + 80001294: 01838c63 beq x7,x24,800012ac + 80001298: 2810646f jal x8,80007d18 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000f669 .word 0x8000f669 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x8d8c575b33490aaa + 800012b0: 00053903 ld x18,0(x10) + 800012b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0a0f67ef6b398266 + 800012b8: 00053303 ld x6,0(x10) + 800012bc: 00850513 addi x10,x10,8 + +00000000800012c0 : +Zbkx_xperm8_cg_cp_rd_b25: + xperm8 x25, x18, x6 # perform operation + 800012c0: 28694cb3 xperm8 x25,x18,x6 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zbkx_xperm8_cg_cp_rd_b25, Zbkx_xperm8_cg_cp_rd_b25_str) + 800012c4: 000fb383 ld x7,0(x31) + 800012c8: 01938c63 beq x7,x25,800012e0 + 800012cc: 24d0646f jal x8,80007d18 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 8000f69d .word 0x8000f69d + 800012dc: 00000000 .word 0x00000000 + 800012e0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xce1782c8e4142d3b + 800012e4: 00053e83 ld x29,0(x10) + 800012e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xb079055e59e8384a + 800012ec: 00053983 ld x19,0(x10) + 800012f0: 00850513 addi x10,x10,8 + +00000000800012f4 : +Zbkx_xperm8_cg_cp_rd_b26: + xperm8 x26, x29, x19 # perform operation + 800012f4: 293ecd33 xperm8 x26,x29,x19 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zbkx_xperm8_cg_cp_rd_b26, Zbkx_xperm8_cg_cp_rd_b26_str) + 800012f8: 000fb383 ld x7,0(x31) + 800012fc: 01a38c63 beq x7,x26,80001314 + 80001300: 2190646f jal x8,80007d18 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 8000f6d1 .word 0x8000f6d1 + 80001310: 00000000 .word 0x00000000 + 80001314: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xa3dc39df270df68b + 80001318: 00053f03 ld x30,0(x10) + 8000131c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xc331c8c796a9d661 + 80001320: 00053903 ld x18,0(x10) + 80001324: 00850513 addi x10,x10,8 + +0000000080001328 : +Zbkx_xperm8_cg_cp_rd_b27: + xperm8 x27, x30, x18 # perform operation + 80001328: 292f4db3 xperm8 x27,x30,x18 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zbkx_xperm8_cg_cp_rd_b27, Zbkx_xperm8_cg_cp_rd_b27_str) + 8000132c: 000fb383 ld x7,0(x31) + 80001330: 01b38c63 beq x7,x27,80001348 + 80001334: 1e50646f jal x8,80007d18 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 8000f705 .word 0x8000f705 + 80001344: 00000000 .word 0x00000000 + 80001348: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x9cecdff266d01f79 + 8000134c: 00053b83 ld x23,0(x10) + 80001350: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xc0852d5d9163cdc9 + 80001354: 00053703 ld x14,0(x10) + 80001358: 00850513 addi x10,x10,8 + +000000008000135c : +Zbkx_xperm8_cg_cp_rd_b28: + xperm8 x28, x23, x14 # perform operation + 8000135c: 28ebce33 xperm8 x28,x23,x14 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zbkx_xperm8_cg_cp_rd_b28, Zbkx_xperm8_cg_cp_rd_b28_str) + 80001360: 000fb383 ld x7,0(x31) + 80001364: 01c38c63 beq x7,x28,8000137c + 80001368: 1b10646f jal x8,80007d18 + 8000136c: 8000135c .word 0x8000135c + 80001370: 00000000 .word 0x00000000 + 80001374: 8000f739 .word 0x8000f739 + 80001378: 00000000 .word 0x00000000 + 8000137c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x2e826b03126b4c20 + 80001380: 00053303 ld x6,0(x10) + 80001384: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x8da5a47c1fba4829 + 80001388: 00053603 ld x12,0(x10) + 8000138c: 00850513 addi x10,x10,8 + +0000000080001390 : +Zbkx_xperm8_cg_cp_rd_b29: + xperm8 x29, x6, x12 # perform operation + 80001390: 28c34eb3 xperm8 x29,x6,x12 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zbkx_xperm8_cg_cp_rd_b29, Zbkx_xperm8_cg_cp_rd_b29_str) + 80001394: 000fb383 ld x7,0(x31) + 80001398: 01d38c63 beq x7,x29,800013b0 + 8000139c: 17d0646f jal x8,80007d18 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000f76d .word 0x8000f76d + 800013ac: 00000000 .word 0x00000000 + 800013b0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x080e4b65006f8846 + 800013b4: 00053803 ld x16,0(x10) + 800013b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xf3d0cc7a4e63b1fa + 800013bc: 00053883 ld x17,0(x10) + 800013c0: 00850513 addi x10,x10,8 + +00000000800013c4 : +Zbkx_xperm8_cg_cp_rd_b30: + xperm8 x30, x16, x17 # perform operation + 800013c4: 29184f33 xperm8 x30,x16,x17 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zbkx_xperm8_cg_cp_rd_b30, Zbkx_xperm8_cg_cp_rd_b30_str) + 800013c8: 000fb383 ld x7,0(x31) + 800013cc: 01e38c63 beq x7,x30,800013e4 + 800013d0: 1490646f jal x8,80007d18 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 8000f7a1 .word 0x8000f7a1 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 008f8f93 addi x31,x31,8 + + mv x30, x31 # switch signature pointer register to avoid conflict with test + 800013e8: 000f8f13 addi x30,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x2c5fc3b133c92945 + 800013ec: 00053e03 ld x28,0(x10) + 800013f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x239a0341ae540508 + 800013f4: 00053203 ld x4,0(x10) + 800013f8: 00850513 addi x10,x10,8 + +00000000800013fc : +Zbkx_xperm8_cg_cp_rd_b31: + xperm8 x31, x28, x4 # perform operation + 800013fc: 284e4fb3 xperm8 x31,x28,x4 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cp_rd_b31, Zbkx_xperm8_cg_cp_rd_b31_str) + 80001400: 000f3383 ld x7,0(x30) + 80001404: 01f38c63 beq x7,x31,8000141c + 80001408: 1110646f jal x8,80007d18 + 8000140c: 800013fc .word 0x800013fc + 80001410: 00000000 .word 0x00000000 + 80001414: 8000f7d5 .word 0x8000f7d5 + 80001418: 00000000 .word 0x00000000 + 8000141c: 008f0f13 addi x30,x30,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000000000000 + 80001420: 00053b83 ld x23,0(x10) + 80001424: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x113ee6732e216082 + 80001428: 00053583 ld x11,0(x10) + 8000142c: 00850513 addi x10,x10,8 + +0000000080001430 : +Zbkx_xperm8_cg_cp_rs1_edges_0x0: + xperm8 x22, x23, x11 # perform operation + 80001430: 28bbcb33 xperm8 x22,x23,x11 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cp_rs1_edges_0x0, Zbkx_xperm8_cg_cp_rs1_edges_0x0_str) + 80001434: 000f3383 ld x7,0(x30) + 80001438: 01638c63 beq x7,x22,80001450 + 8000143c: 0dd0646f jal x8,80007d18 + 80001440: 80001430 .word 0x80001430 + 80001444: 00000000 .word 0x00000000 + 80001448: 8000f809 .word 0x8000f809 + 8000144c: 00000000 .word 0x00000000 + 80001450: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 80001454: 00053a03 ld x20,0(x10) + 80001458: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xebf8fec4c6165543 + 8000145c: 00053183 ld x3,0(x10) + 80001460: 00850513 addi x10,x10,8 + +0000000080001464 : +Zbkx_xperm8_cg_cp_rs1_edges_0x1: + xperm8 x13, x20, x3 # perform operation + 80001464: 283a46b3 xperm8 x13,x20,x3 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_edges_0x1, Zbkx_xperm8_cg_cp_rs1_edges_0x1_str) + 80001468: 000f3383 ld x7,0(x30) + 8000146c: 00d38c63 beq x7,x13,80001484 + 80001470: 0a90646f jal x8,80007d18 + 80001474: 80001464 .word 0x80001464 + 80001478: 00000000 .word 0x00000000 + 8000147c: 8000f844 .word 0x8000f844 + 80001480: 00000000 .word 0x00000000 + 80001484: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000002 + 80001488: 00053783 ld x15,0(x10) + 8000148c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xe3bc3e69439cd8d4 + 80001490: 00053883 ld x17,0(x10) + 80001494: 00850513 addi x10,x10,8 + +0000000080001498 : +Zbkx_xperm8_cg_cp_rs1_edges_0x2: + xperm8 x16, x15, x17 # perform operation + 80001498: 2917c833 xperm8 x16,x15,x17 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_edges_0x2, Zbkx_xperm8_cg_cp_rs1_edges_0x2_str) + 8000149c: 000f3383 ld x7,0(x30) + 800014a0: 01038c63 beq x7,x16,800014b8 + 800014a4: 0750646f jal x8,80007d18 + 800014a8: 80001498 .word 0x80001498 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 8000f87f .word 0x8000f87f + 800014b4: 00000000 .word 0x00000000 + 800014b8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000000 + 800014bc: 00053703 ld x14,0(x10) + 800014c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5a10bc0536698346 + 800014c4: 00053b03 ld x22,0(x10) + 800014c8: 00850513 addi x10,x10,8 + +00000000800014cc : +Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000000: + xperm8 x15, x14, x22 # perform operation + 800014cc: 296747b3 xperm8 x15,x14,x22 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000000, Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d0: 000f3383 ld x7,0(x30) + 800014d4: 00f38c63 beq x7,x15,800014ec + 800014d8: 0410646f jal x8,80007d18 + 800014dc: 800014cc .word 0x800014cc + 800014e0: 00000000 .word 0x00000000 + 800014e4: 8000f8ba .word 0x8000f8ba + 800014e8: 00000000 .word 0x00000000 + 800014ec: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000001 + 800014f0: 00053a03 ld x20,0(x10) + 800014f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xc5d4fb0a6cb0606e + 800014f8: 00053d83 ld x27,0(x10) + 800014fc: 00850513 addi x10,x10,8 + +0000000080001500 : +Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000001: + xperm8 x6, x20, x27 # perform operation + 80001500: 29ba4333 xperm8 x6,x20,x27 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000001, Zbkx_xperm8_cg_cp_rs1_edges_0x8000000000000001_str) + 80001504: 000f3383 ld x7,0(x30) + 80001508: 00638c63 beq x7,x6,80001520 + 8000150c: 00d0646f jal x8,80007d18 + 80001510: 80001500 .word 0x80001500 + 80001514: 00000000 .word 0x00000000 + 80001518: 8000f905 .word 0x8000f905 + 8000151c: 00000000 .word 0x00000000 + 80001520: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7fffffffffffffff + 80001524: 00053e83 ld x29,0(x10) + 80001528: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xec4ac2334539dfa4 + 8000152c: 00053a83 ld x21,0(x10) + 80001530: 00850513 addi x10,x10,8 + +0000000080001534 : +Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffffffffffff: + xperm8 x14, x29, x21 # perform operation + 80001534: 295ec733 xperm8 x14,x29,x21 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffffffffffff, Zbkx_xperm8_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001538: 000f3383 ld x7,0(x30) + 8000153c: 00e38c63 beq x7,x14,80001554 + 80001540: 7d80646f jal x8,80007d18 + 80001544: 80001534 .word 0x80001534 + 80001548: 00000000 .word 0x00000000 + 8000154c: 8000f950 .word 0x8000f950 + 80001550: 00000000 .word 0x00000000 + 80001554: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80001558: 00053e83 ld x29,0(x10) + 8000155c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xc6ee6a234e329768 + 80001560: 00053a03 ld x20,0(x10) + 80001564: 00850513 addi x10,x10,8 + +0000000080001568 : +Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffffffffffe: + xperm8 x26, x29, x20 # perform operation + 80001568: 294ecd33 xperm8 x26,x29,x20 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffffffffffe, Zbkx_xperm8_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 8000156c: 000f3383 ld x7,0(x30) + 80001570: 01a38c63 beq x7,x26,80001588 + 80001574: 7a40646f jal x8,80007d18 + 80001578: 80001568 .word 0x80001568 + 8000157c: 00000000 .word 0x00000000 + 80001580: 8000f99b .word 0x8000f99b + 80001584: 00000000 .word 0x00000000 + 80001588: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xffffffffffffffff + 8000158c: 00053583 ld x11,0(x10) + 80001590: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x1db0d2e40b206aff + 80001594: 00053083 ld x1,0(x10) + 80001598: 00850513 addi x10,x10,8 + +000000008000159c : +Zbkx_xperm8_cg_cp_rs1_edges_0xffffffffffffffff: + xperm8 x3, x11, x1 # perform operation + 8000159c: 2815c1b3 xperm8 x3,x11,x1 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffffffffffff, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a0: 000f3383 ld x7,0(x30) + 800015a4: 00338c63 beq x7,x3,800015bc + 800015a8: 7700646f jal x8,80007d18 + 800015ac: 8000159c .word 0x8000159c + 800015b0: 00000000 .word 0x00000000 + 800015b4: 8000f9e6 .word 0x8000f9e6 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xfffffffffffffffe + 800015c0: 00053d83 ld x27,0(x10) + 800015c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x20007638409d7fd5 + 800015c8: 00053c03 ld x24,0(x10) + 800015cc: 00850513 addi x10,x10,8 + +00000000800015d0 : +Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffffffffffe: + xperm8 x19, x27, x24 # perform operation + 800015d0: 298dc9b3 xperm8 x19,x27,x24 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffffffffffe, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d4: 000f3383 ld x7,0(x30) + 800015d8: 01338c63 beq x7,x19,800015f0 + 800015dc: 73c0646f jal x8,80007d18 + 800015e0: 800015d0 .word 0x800015d0 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 8000fa31 .word 0x8000fa31 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800015f4: 00053e83 ld x29,0(x10) + 800015f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x3c0d8a6d4aeaef04 + 800015fc: 00053583 ld x11,0(x10) + 80001600: 00850513 addi x10,x10,8 + +0000000080001604 : +Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc887763ae86f2: + xperm8 x3, x29, x11 # perform operation + 80001604: 28bec1b3 xperm8 x3,x29,x11 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001608: 000f3383 ld x7,0(x30) + 8000160c: 00338c63 beq x7,x3,80001624 + 80001610: 7080646f jal x8,80007d18 + 80001614: 80001604 .word 0x80001604 + 80001618: 00000000 .word 0x00000000 + 8000161c: 8000fa7c .word 0x8000fa7c + 80001620: 00000000 .word 0x00000000 + 80001624: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80001628: 00053a83 ld x21,0(x10) + 8000162c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7a295da4a0fdd7a4 + 80001630: 00053d83 ld x27,0(x10) + 80001634: 00850513 addi x10,x10,8 + +0000000080001638 : +Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + xperm8 x13, x21, x27 # perform operation + 80001638: 29bac6b3 xperm8 x13,x21,x27 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 8000163c: 000f3383 ld x7,0(x30) + 80001640: 00d38c63 beq x7,x13,80001658 + 80001644: 6d40646f jal x8,80007d18 + 80001648: 80001638 .word 0x80001638 + 8000164c: 00000000 .word 0x00000000 + 80001650: 8000fac7 .word 0x8000fac7 + 80001654: 00000000 .word 0x00000000 + 80001658: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5555555555555555 + 8000165c: 00053883 ld x17,0(x10) + 80001660: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x02104d108e09513b + 80001664: 00053903 ld x18,0(x10) + 80001668: 00850513 addi x10,x10,8 + +000000008000166c : +Zbkx_xperm8_cg_cp_rs1_edges_0x5555555555555555: + xperm8 x28, x17, x18 # perform operation + 8000166c: 2928ce33 xperm8 x28,x17,x18 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cp_rs1_edges_0x5555555555555555, Zbkx_xperm8_cg_cp_rs1_edges_0x5555555555555555_str) + 80001670: 000f3383 ld x7,0(x30) + 80001674: 01c38c63 beq x7,x28,8000168c + 80001678: 6a00646f jal x8,80007d18 + 8000167c: 8000166c .word 0x8000166c + 80001680: 00000000 .word 0x00000000 + 80001684: 8000fb12 .word 0x8000fb12 + 80001688: 00000000 .word 0x00000000 + 8000168c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000000ffffffff + 80001690: 00053083 ld x1,0(x10) + 80001694: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xa0fa145f26415fc3 + 80001698: 00053b83 ld x23,0(x10) + 8000169c: 00850513 addi x10,x10,8 + +00000000800016a0 : +Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff: + xperm8 x11, x1, x23 # perform operation + 800016a0: 2970c5b3 xperm8 x11,x1,x23 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff, Zbkx_xperm8_cg_cp_rs1_edges_0xffffffff_str) + 800016a4: 000f3383 ld x7,0(x30) + 800016a8: 00b38c63 beq x7,x11,800016c0 + 800016ac: 66c0646f jal x8,80007d18 + 800016b0: 800016a0 .word 0x800016a0 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 8000fb5d .word 0x8000fb5d + 800016bc: 00000000 .word 0x00000000 + 800016c0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x00000000fffffffe + 800016c4: 00053983 ld x19,0(x10) + 800016c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x1196f6b96bfb1e5a + 800016cc: 00053603 ld x12,0(x10) + 800016d0: 00850513 addi x10,x10,8 + +00000000800016d4 : +Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe: + xperm8 x16, x19, x12 # perform operation + 800016d4: 28c9c833 xperm8 x16,x19,x12 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe, Zbkx_xperm8_cg_cp_rs1_edges_0xfffffffe_str) + 800016d8: 000f3383 ld x7,0(x30) + 800016dc: 01038c63 beq x7,x16,800016f4 + 800016e0: 6380646f jal x8,80007d18 + 800016e4: 800016d4 .word 0x800016d4 + 800016e8: 00000000 .word 0x00000000 + 800016ec: 8000fba0 .word 0x8000fba0 + 800016f0: 00000000 .word 0x00000000 + 800016f4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000100000000 + 800016f8: 00053703 ld x14,0(x10) + 800016fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x69a9aad966b67b6d + 80001700: 00053a83 ld x21,0(x10) + 80001704: 00850513 addi x10,x10,8 + +0000000080001708 : +Zbkx_xperm8_cg_cp_rs1_edges_0x100000000: + xperm8 x15, x14, x21 # perform operation + 80001708: 295747b3 xperm8 x15,x14,x21 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cp_rs1_edges_0x100000000, Zbkx_xperm8_cg_cp_rs1_edges_0x100000000_str) + 8000170c: 000f3383 ld x7,0(x30) + 80001710: 00f38c63 beq x7,x15,80001728 + 80001714: 6040646f jal x8,80007d18 + 80001718: 80001708 .word 0x80001708 + 8000171c: 00000000 .word 0x00000000 + 80001720: 8000fbe3 .word 0x8000fbe3 + 80001724: 00000000 .word 0x00000000 + 80001728: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000001 + 8000172c: 00053c03 ld x24,0(x10) + 80001730: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xc0abe40521bcbede + 80001734: 00053083 ld x1,0(x10) + 80001738: 00850513 addi x10,x10,8 + +000000008000173c : +Zbkx_xperm8_cg_cp_rs1_edges_0x100000001: + xperm8 x16, x24, x1 # perform operation + 8000173c: 281c4833 xperm8 x16,x24,x1 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cp_rs1_edges_0x100000001, Zbkx_xperm8_cg_cp_rs1_edges_0x100000001_str) + 80001740: 000f3383 ld x7,0(x30) + 80001744: 01038c63 beq x7,x16,8000175c + 80001748: 5d00646f jal x8,80007d18 + 8000174c: 8000173c .word 0x8000173c + 80001750: 00000000 .word 0x00000000 + 80001754: 8000fc27 .word 0x8000fc27 + 80001758: 00000000 .word 0x00000000 + 8000175c: 008f0f13 addi x30,x30,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xcbbbe63ede03959c + 80001760: 00053283 ld x5,0(x10) + 80001764: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 80001768: 00053683 ld x13,0(x10) + 8000176c: 00850513 addi x10,x10,8 + +0000000080001770 : +Zbkx_xperm8_cg_cp_rs2_edges_0x0: + xperm8 x6, x5, x13 # perform operation + 80001770: 28d2c333 xperm8 x6,x5,x13 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cp_rs2_edges_0x0, Zbkx_xperm8_cg_cp_rs2_edges_0x0_str) + 80001774: 000f3383 ld x7,0(x30) + 80001778: 00638c63 beq x7,x6,80001790 + 8000177c: 59c0646f jal x8,80007d18 + 80001780: 80001770 .word 0x80001770 + 80001784: 00000000 .word 0x00000000 + 80001788: 8000fc6b .word 0x8000fc6b + 8000178c: 00000000 .word 0x00000000 + 80001790: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x560944a2308a58b7 + 80001794: 00053683 ld x13,0(x10) + 80001798: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000001 + 8000179c: 00053703 ld x14,0(x10) + 800017a0: 00850513 addi x10,x10,8 + +00000000800017a4 : +Zbkx_xperm8_cg_cp_rs2_edges_0x1: + xperm8 x20, x13, x14 # perform operation + 800017a4: 28e6ca33 xperm8 x20,x13,x14 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cp_rs2_edges_0x1, Zbkx_xperm8_cg_cp_rs2_edges_0x1_str) + 800017a8: 000f3383 ld x7,0(x30) + 800017ac: 01438c63 beq x7,x20,800017c4 + 800017b0: 5680646f jal x8,80007d18 + 800017b4: 800017a4 .word 0x800017a4 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 8000fca7 .word 0x8000fca7 + 800017c0: 00000000 .word 0x00000000 + 800017c4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x1ed0fc209fe4cf6d + 800017c8: 00053883 ld x17,0(x10) + 800017cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000002 + 800017d0: 00053183 ld x3,0(x10) + 800017d4: 00850513 addi x10,x10,8 + +00000000800017d8 : +Zbkx_xperm8_cg_cp_rs2_edges_0x2: + xperm8 x20, x17, x3 # perform operation + 800017d8: 2838ca33 xperm8 x20,x17,x3 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cp_rs2_edges_0x2, Zbkx_xperm8_cg_cp_rs2_edges_0x2_str) + 800017dc: 000f3383 ld x7,0(x30) + 800017e0: 01438c63 beq x7,x20,800017f8 + 800017e4: 5340646f jal x8,80007d18 + 800017e8: 800017d8 .word 0x800017d8 + 800017ec: 00000000 .word 0x00000000 + 800017f0: 8000fce3 .word 0x8000fce3 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x9c9322beb28ea7cc + 800017fc: 00053083 ld x1,0(x10) + 80001800: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000000 + 80001804: 00053303 ld x6,0(x10) + 80001808: 00850513 addi x10,x10,8 + +000000008000180c : +Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000000: + xperm8 x29, x1, x6 # perform operation + 8000180c: 2860ceb3 xperm8 x29,x1,x6 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000000, Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000000_str) + 80001810: 000f3383 ld x7,0(x30) + 80001814: 01d38c63 beq x7,x29,8000182c + 80001818: 5000646f jal x8,80007d18 + 8000181c: 8000180c .word 0x8000180c + 80001820: 00000000 .word 0x00000000 + 80001824: 8000fd1f .word 0x8000fd1f + 80001828: 00000000 .word 0x00000000 + 8000182c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x4549f475bc266ea4 + 80001830: 00053703 ld x14,0(x10) + 80001834: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000001 + 80001838: 00053883 ld x17,0(x10) + 8000183c: 00850513 addi x10,x10,8 + +0000000080001840 : +Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000001: + xperm8 x11, x14, x17 # perform operation + 80001840: 291745b3 xperm8 x11,x14,x17 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000001, Zbkx_xperm8_cg_cp_rs2_edges_0x8000000000000001_str) + 80001844: 000f3383 ld x7,0(x30) + 80001848: 00b38c63 beq x7,x11,80001860 + 8000184c: 4cc0646f jal x8,80007d18 + 80001850: 80001840 .word 0x80001840 + 80001854: 00000000 .word 0x00000000 + 80001858: 8000fd6a .word 0x8000fd6a + 8000185c: 00000000 .word 0x00000000 + 80001860: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x69d3e5ea92866268 + 80001864: 00053803 ld x16,0(x10) + 80001868: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7fffffffffffffff + 8000186c: 00053103 ld x2,0(x10) + 80001870: 00850513 addi x10,x10,8 + +0000000080001874 : +Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffffffffffff: + xperm8 x24, x16, x2 # perform operation + 80001874: 28284c33 xperm8 x24,x16,x2 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffffffffffff, Zbkx_xperm8_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001878: 000f3383 ld x7,0(x30) + 8000187c: 01838c63 beq x7,x24,80001894 + 80001880: 4980646f jal x8,80007d18 + 80001884: 80001874 .word 0x80001874 + 80001888: 00000000 .word 0x00000000 + 8000188c: 8000fdb5 .word 0x8000fdb5 + 80001890: 00000000 .word 0x00000000 + 80001894: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xc6b126d497d9c616 + 80001898: 00053b03 ld x22,0(x10) + 8000189c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x7ffffffffffffffe + 800018a0: 00053e83 ld x29,0(x10) + 800018a4: 00850513 addi x10,x10,8 + +00000000800018a8 : +Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffffffffffe: + xperm8 x24, x22, x29 # perform operation + 800018a8: 29db4c33 xperm8 x24,x22,x29 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffffffffffe, Zbkx_xperm8_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018ac: 000f3383 ld x7,0(x30) + 800018b0: 01838c63 beq x7,x24,800018c8 + 800018b4: 4640646f jal x8,80007d18 + 800018b8: 800018a8 .word 0x800018a8 + 800018bc: 00000000 .word 0x00000000 + 800018c0: 8000fe00 .word 0x8000fe00 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x41ebf68e5993e78f + 800018cc: 00053d03 ld x26,0(x10) + 800018d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 800018d4: 00053e03 ld x28,0(x10) + 800018d8: 00850513 addi x10,x10,8 + +00000000800018dc : +Zbkx_xperm8_cg_cp_rs2_edges_0xffffffffffffffff: + xperm8 x13, x26, x28 # perform operation + 800018dc: 29cd46b3 xperm8 x13,x26,x28 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffffffffffff, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e0: 000f3383 ld x7,0(x30) + 800018e4: 00d38c63 beq x7,x13,800018fc + 800018e8: 4300646f jal x8,80007d18 + 800018ec: 800018dc .word 0x800018dc + 800018f0: 00000000 .word 0x00000000 + 800018f4: 8000fe4b .word 0x8000fe4b + 800018f8: 00000000 .word 0x00000000 + 800018fc: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x6689639399eefef8 + 80001900: 00053983 ld x19,0(x10) + 80001904: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xfffffffffffffffe + 80001908: 00053183 ld x3,0(x10) + 8000190c: 00850513 addi x10,x10,8 + +0000000080001910 : +Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffffffffffe: + xperm8 x27, x19, x3 # perform operation + 80001910: 2839cdb3 xperm8 x27,x19,x3 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffffffffffe, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001914: 000f3383 ld x7,0(x30) + 80001918: 01b38c63 beq x7,x27,80001930 + 8000191c: 3fc0646f jal x8,80007d18 + 80001920: 80001910 .word 0x80001910 + 80001924: 00000000 .word 0x00000000 + 80001928: 8000fe96 .word 0x8000fe96 + 8000192c: 00000000 .word 0x00000000 + 80001930: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x7853f15d44d18562 + 80001934: 00053183 ld x3,0(x10) + 80001938: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 8000193c: 00053b03 ld x22,0(x10) + 80001940: 00850513 addi x10,x10,8 + +0000000080001944 : +Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc887763ae86f2: + xperm8 x15, x3, x22 # perform operation + 80001944: 2961c7b3 xperm8 x15,x3,x22 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001948: 000f3383 ld x7,0(x30) + 8000194c: 00f38c63 beq x7,x15,80001964 + 80001950: 3c80646f jal x8,80007d18 + 80001954: 80001944 .word 0x80001944 + 80001958: 00000000 .word 0x00000000 + 8000195c: 8000fee1 .word 0x8000fee1 + 80001960: 00000000 .word 0x00000000 + 80001964: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8c860b38e2625931 + 80001968: 00053103 ld x2,0(x10) + 8000196c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80001970: 00053803 ld x16,0(x10) + 80001974: 00850513 addi x10,x10,8 + +0000000080001978 : +Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + xperm8 x23, x2, x16 # perform operation + 80001978: 29014bb3 xperm8 x23,x2,x16 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 8000197c: 000f3383 ld x7,0(x30) + 80001980: 01738c63 beq x7,x23,80001998 + 80001984: 3940646f jal x8,80007d18 + 80001988: 80001978 .word 0x80001978 + 8000198c: 00000000 .word 0x00000000 + 80001990: 8000ff2c .word 0x8000ff2c + 80001994: 00000000 .word 0x00000000 + 80001998: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8d3183f1a0e95e58 + 8000199c: 00053683 ld x13,0(x10) + 800019a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5555555555555555 + 800019a4: 00053c83 ld x25,0(x10) + 800019a8: 00850513 addi x10,x10,8 + +00000000800019ac : +Zbkx_xperm8_cg_cp_rs2_edges_0x5555555555555555: + xperm8 x29, x13, x25 # perform operation + 800019ac: 2996ceb3 xperm8 x29,x13,x25 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cp_rs2_edges_0x5555555555555555, Zbkx_xperm8_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b0: 000f3383 ld x7,0(x30) + 800019b4: 01d38c63 beq x7,x29,800019cc + 800019b8: 3600646f jal x8,80007d18 + 800019bc: 800019ac .word 0x800019ac + 800019c0: 00000000 .word 0x00000000 + 800019c4: 8000ff77 .word 0x8000ff77 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xad6291cca6dfd52a + 800019d0: 00053d83 ld x27,0(x10) + 800019d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000ffffffff + 800019d8: 00053903 ld x18,0(x10) + 800019dc: 00850513 addi x10,x10,8 + +00000000800019e0 : +Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff: + xperm8 x9, x27, x18 # perform operation + 800019e0: 292dc4b3 xperm8 x9,x27,x18 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff, Zbkx_xperm8_cg_cp_rs2_edges_0xffffffff_str) + 800019e4: 000f3383 ld x7,0(x30) + 800019e8: 00938c63 beq x7,x9,80001a00 + 800019ec: 32c0646f jal x8,80007d18 + 800019f0: 800019e0 .word 0x800019e0 + 800019f4: 00000000 .word 0x00000000 + 800019f8: 8000ffc2 .word 0x8000ffc2 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xeb6c2da4c0544d57 + 80001a04: 00053883 ld x17,0(x10) + 80001a08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000fffffffe + 80001a0c: 00053e83 ld x29,0(x10) + 80001a10: 00850513 addi x10,x10,8 + +0000000080001a14 : +Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe: + xperm8 x26, x17, x29 # perform operation + 80001a14: 29d8cd33 xperm8 x26,x17,x29 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe, Zbkx_xperm8_cg_cp_rs2_edges_0xfffffffe_str) + 80001a18: 000f3383 ld x7,0(x30) + 80001a1c: 01a38c63 beq x7,x26,80001a34 + 80001a20: 2f80646f jal x8,80007d18 + 80001a24: 80001a14 .word 0x80001a14 + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 80010005 .word 0x80010005 + 80001a30: 00000000 .word 0x00000000 + 80001a34: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x8f1c6ef5e3c43e66 + 80001a38: 00053803 ld x16,0(x10) + 80001a3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000000 + 80001a40: 00053603 ld x12,0(x10) + 80001a44: 00850513 addi x10,x10,8 + +0000000080001a48 : +Zbkx_xperm8_cg_cp_rs2_edges_0x100000000: + xperm8 x2, x16, x12 # perform operation + 80001a48: 28c84133 xperm8 x2,x16,x12 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cp_rs2_edges_0x100000000, Zbkx_xperm8_cg_cp_rs2_edges_0x100000000_str) + 80001a4c: 000f3383 ld x7,0(x30) + 80001a50: 00238c63 beq x7,x2,80001a68 + 80001a54: 2c40646f jal x8,80007d18 + 80001a58: 80001a48 .word 0x80001a48 + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 80010048 .word 0x80010048 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8fe800098d3a6e1e + 80001a6c: 00053a03 ld x20,0(x10) + 80001a70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000100000001 + 80001a74: 00053183 ld x3,0(x10) + 80001a78: 00850513 addi x10,x10,8 + +0000000080001a7c : +Zbkx_xperm8_cg_cp_rs2_edges_0x100000001: + xperm8 x1, x20, x3 # perform operation + 80001a7c: 283a40b3 xperm8 x1,x20,x3 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cp_rs2_edges_0x100000001, Zbkx_xperm8_cg_cp_rs2_edges_0x100000001_str) + 80001a80: 000f3383 ld x7,0(x30) + 80001a84: 00138c63 beq x7,x1,80001a9c + 80001a88: 2900646f jal x8,80007d18 + 80001a8c: 80001a7c .word 0x80001a7c + 80001a90: 00000000 .word 0x00000000 + 80001a94: 8001008c .word 0x8001008c + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 008f0f13 addi x30,x30,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000000 + 80001aa0: 00053e83 ld x29,0(x10) + 80001aa4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000000 + 80001aa8: 00053883 ld x17,0(x10) + 80001aac: 00850513 addi x10,x10,8 + +0000000080001ab0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + xperm8 x27, x29, x17 # perform operation + 80001ab0: 291ecdb3 xperm8 x27,x29,x17 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab4: 000f3383 ld x7,0(x30) + 80001ab8: 01b38c63 beq x7,x27,80001ad0 + 80001abc: 25c0646f jal x8,80007d18 + 80001ac0: 80001ab0 .word 0x80001ab0 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 800100d0 .word 0x800100d0 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0000000000000000 + 80001ad4: 00053203 ld x4,0(x10) + 80001ad8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000001 + 80001adc: 00053683 ld x13,0(x10) + 80001ae0: 00850513 addi x10,x10,8 + +0000000080001ae4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + xperm8 x27, x4, x13 # perform operation + 80001ae4: 28d24db3 xperm8 x27,x4,x13 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae8: 000f3383 ld x7,0(x30) + 80001aec: 01b38c63 beq x7,x27,80001b04 + 80001af0: 2280646f jal x8,80007d18 + 80001af4: 80001ae4 .word 0x80001ae4 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 80010123 .word 0x80010123 + 80001b00: 00000000 .word 0x00000000 + 80001b04: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80001b08: 00053983 ld x19,0(x10) + 80001b0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000000000002 + 80001b10: 00053603 ld x12,0(x10) + 80001b14: 00850513 addi x10,x10,8 + +0000000080001b18 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + xperm8 x20, x19, x12 # perform operation + 80001b18: 28c9ca33 xperm8 x20,x19,x12 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b1c: 000f3383 ld x7,0(x30) + 80001b20: 01438c63 beq x7,x20,80001b38 + 80001b24: 1f40646f jal x8,80007d18 + 80001b28: 80001b18 .word 0x80001b18 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 80010176 .word 0x80010176 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000000 + 80001b3c: 00053f83 ld x31,0(x10) + 80001b40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000000 + 80001b44: 00053803 ld x16,0(x10) + 80001b48: 00850513 addi x10,x10,8 + +0000000080001b4c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + xperm8 x29, x31, x16 # perform operation + 80001b4c: 290fceb3 xperm8 x29,x31,x16 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b50: 000f3383 ld x7,0(x30) + 80001b54: 01d38c63 beq x7,x29,80001b6c + 80001b58: 1c00646f jal x8,80007d18 + 80001b5c: 80001b4c .word 0x80001b4c + 80001b60: 00000000 .word 0x00000000 + 80001b64: 800101c9 .word 0x800101c9 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000000 + 80001b70: 00053b03 ld x22,0(x10) + 80001b74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8000000000000001 + 80001b78: 00053983 ld x19,0(x10) + 80001b7c: 00850513 addi x10,x10,8 + +0000000080001b80 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + xperm8 x15, x22, x19 # perform operation + 80001b80: 293b47b3 xperm8 x15,x22,x19 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b84: 000f3383 ld x7,0(x30) + 80001b88: 00f38c63 beq x7,x15,80001ba0 + 80001b8c: 18c0646f jal x8,80007d18 + 80001b90: 80001b80 .word 0x80001b80 + 80001b94: 00000000 .word 0x00000000 + 80001b98: 8001022b .word 0x8001022b + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000000 + 80001ba4: 00053d83 ld x27,0(x10) + 80001ba8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7fffffffffffffff + 80001bac: 00053b83 ld x23,0(x10) + 80001bb0: 00850513 addi x10,x10,8 + +0000000080001bb4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + xperm8 x19, x27, x23 # perform operation + 80001bb4: 297dc9b3 xperm8 x19,x27,x23 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb8: 000f3383 ld x7,0(x30) + 80001bbc: 01338c63 beq x7,x19,80001bd4 + 80001bc0: 1580646f jal x8,80007d18 + 80001bc4: 80001bb4 .word 0x80001bb4 + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 8001028d .word 0x8001028d + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000000 + 80001bd8: 00053583 ld x11,0(x10) + 80001bdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80001be0: 00053c83 ld x25,0(x10) + 80001be4: 00850513 addi x10,x10,8 + +0000000080001be8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + xperm8 x5, x11, x25 # perform operation + 80001be8: 2995c2b3 xperm8 x5,x11,x25 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bec: 000f3383 ld x7,0(x30) + 80001bf0: 00538c63 beq x7,x5,80001c08 + 80001bf4: 1240646f jal x8,80007d18 + 80001bf8: 80001be8 .word 0x80001be8 + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 800102ef .word 0x800102ef + 80001c04: 00000000 .word 0x00000000 + 80001c08: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000000 + 80001c0c: 00053803 ld x16,0(x10) + 80001c10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 80001c14: 00053e03 ld x28,0(x10) + 80001c18: 00850513 addi x10,x10,8 + +0000000080001c1c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + xperm8 x20, x16, x28 # perform operation + 80001c1c: 29c84a33 xperm8 x20,x16,x28 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c20: 000f3383 ld x7,0(x30) + 80001c24: 01438c63 beq x7,x20,80001c3c + 80001c28: 0f00646f jal x8,80007d18 + 80001c2c: 80001c1c .word 0x80001c1c + 80001c30: 00000000 .word 0x00000000 + 80001c34: 80010351 .word 0x80010351 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000000 + 80001c40: 00053783 ld x15,0(x10) + 80001c44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xfffffffffffffffe + 80001c48: 00053803 ld x16,0(x10) + 80001c4c: 00850513 addi x10,x10,8 + +0000000080001c50 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + xperm8 x24, x15, x16 # perform operation + 80001c50: 2907cc33 xperm8 x24,x15,x16 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c54: 000f3383 ld x7,0(x30) + 80001c58: 01838c63 beq x7,x24,80001c70 + 80001c5c: 0bc0646f jal x8,80007d18 + 80001c60: 80001c50 .word 0x80001c50 + 80001c64: 00000000 .word 0x00000000 + 80001c68: 800103b3 .word 0x800103b3 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000000 + 80001c74: 00053c03 ld x24,0(x10) + 80001c78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80001c7c: 00053783 ld x15,0(x10) + 80001c80: 00850513 addi x10,x10,8 + +0000000080001c84 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + xperm8 x29, x24, x15 # perform operation + 80001c84: 28fc4eb3 xperm8 x29,x24,x15 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c88: 000f3383 ld x7,0(x30) + 80001c8c: 01d38c63 beq x7,x29,80001ca4 + 80001c90: 0880646f jal x8,80007d18 + 80001c94: 80001c84 .word 0x80001c84 + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 80010415 .word 0x80010415 + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80001ca8: 00053983 ld x19,0(x10) + 80001cac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80001cb0: 00053e83 ld x29,0(x10) + 80001cb4: 00850513 addi x10,x10,8 + +0000000080001cb8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x27, x19, x29 # perform operation + 80001cb8: 29d9cdb3 xperm8 x27,x19,x29 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cbc: 000f3383 ld x7,0(x30) + 80001cc0: 01b38c63 beq x7,x27,80001cd8 + 80001cc4: 0540646f jal x8,80007d18 + 80001cc8: 80001cb8 .word 0x80001cb8 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 80010477 .word 0x80010477 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000000 + 80001cdc: 00053103 ld x2,0(x10) + 80001ce0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5555555555555555 + 80001ce4: 00053803 ld x16,0(x10) + 80001ce8: 00850513 addi x10,x10,8 + +0000000080001cec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + xperm8 x13, x2, x16 # perform operation + 80001cec: 290146b3 xperm8 x13,x2,x16 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf0: 000f3383 ld x7,0(x30) + 80001cf4: 00d38c63 beq x7,x13,80001d0c + 80001cf8: 0200646f jal x8,80007d18 + 80001cfc: 80001cec .word 0x80001cec + 80001d00: 00000000 .word 0x00000000 + 80001d04: 800104d9 .word 0x800104d9 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0000000000000000 + 80001d10: 00053203 ld x4,0(x10) + 80001d14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000000ffffffff + 80001d18: 00053803 ld x16,0(x10) + 80001d1c: 00850513 addi x10,x10,8 + +0000000080001d20 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + xperm8 x17, x4, x16 # perform operation + 80001d20: 290248b3 xperm8 x17,x4,x16 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d24: 000f3383 ld x7,0(x30) + 80001d28: 01138c63 beq x7,x17,80001d40 + 80001d2c: 7ed0546f jal x8,80007d18 + 80001d30: 80001d20 .word 0x80001d20 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 8001053b .word 0x8001053b + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000000 + 80001d44: 00053783 ld x15,0(x10) + 80001d48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d4c: 00053b03 ld x22,0(x10) + 80001d50: 00850513 addi x10,x10,8 + +0000000080001d54 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + xperm8 x3, x15, x22 # perform operation + 80001d54: 2967c1b3 xperm8 x3,x15,x22 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d58: 000f3383 ld x7,0(x30) + 80001d5c: 00338c63 beq x7,x3,80001d74 + 80001d60: 7b90546f jal x8,80007d18 + 80001d64: 80001d54 .word 0x80001d54 + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 80010595 .word 0x80010595 + 80001d70: 00000000 .word 0x00000000 + 80001d74: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000000 + 80001d78: 00053103 ld x2,0(x10) + 80001d7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 80001d80: 00053483 ld x9,0(x10) + 80001d84: 00850513 addi x10,x10,8 + +0000000080001d88 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + xperm8 x22, x2, x9 # perform operation + 80001d88: 28914b33 xperm8 x22,x2,x9 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d8c: 000f3383 ld x7,0(x30) + 80001d90: 01638c63 beq x7,x22,80001da8 + 80001d94: 7850546f jal x8,80007d18 + 80001d98: 80001d88 .word 0x80001d88 + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 800105ef .word 0x800105ef + 80001da4: 00000000 .word 0x00000000 + 80001da8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000000 + 80001dac: 00053a03 ld x20,0(x10) + 80001db0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000100000001 + 80001db4: 00053d03 ld x26,0(x10) + 80001db8: 00850513 addi x10,x10,8 + +0000000080001dbc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + xperm8 x15, x20, x26 # perform operation + 80001dbc: 29aa47b3 xperm8 x15,x20,x26 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc0: 000f3383 ld x7,0(x30) + 80001dc4: 00f38c63 beq x7,x15,80001ddc + 80001dc8: 7510546f jal x8,80007d18 + 80001dcc: 80001dbc .word 0x80001dbc + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 8001064a .word 0x8001064a + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001de0: 00053a83 ld x21,0(x10) + 80001de4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000000 + 80001de8: 00053d03 ld x26,0(x10) + 80001dec: 00850513 addi x10,x10,8 + +0000000080001df0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + xperm8 x27, x21, x26 # perform operation + 80001df0: 29aacdb3 xperm8 x27,x21,x26 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df4: 000f3383 ld x7,0(x30) + 80001df8: 01b38c63 beq x7,x27,80001e10 + 80001dfc: 71d0546f jal x8,80007d18 + 80001e00: 80001df0 .word 0x80001df0 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 800106a5 .word 0x800106a5 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000001 + 80001e14: 00053703 ld x14,0(x10) + 80001e18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000000000001 + 80001e1c: 00053483 ld x9,0(x10) + 80001e20: 00850513 addi x10,x10,8 + +0000000080001e24 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + xperm8 x3, x14, x9 # perform operation + 80001e24: 289741b3 xperm8 x3,x14,x9 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e28: 000f3383 ld x7,0(x30) + 80001e2c: 00338c63 beq x7,x3,80001e44 + 80001e30: 6e90546f jal x8,80007d18 + 80001e34: 80001e24 .word 0x80001e24 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 800106f8 .word 0x800106f8 + 80001e40: 00000000 .word 0x00000000 + 80001e44: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000000000001 + 80001e48: 00053903 ld x18,0(x10) + 80001e4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000002 + 80001e50: 00053983 ld x19,0(x10) + 80001e54: 00850513 addi x10,x10,8 + +0000000080001e58 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + xperm8 x1, x18, x19 # perform operation + 80001e58: 293940b3 xperm8 x1,x18,x19 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e5c: 000f3383 ld x7,0(x30) + 80001e60: 00138c63 beq x7,x1,80001e78 + 80001e64: 6b50546f jal x8,80007d18 + 80001e68: 80001e58 .word 0x80001e58 + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 8001074b .word 0x8001074b + 80001e74: 00000000 .word 0x00000000 + 80001e78: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000001 + 80001e7c: 00053683 ld x13,0(x10) + 80001e80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000000 + 80001e84: 00053303 ld x6,0(x10) + 80001e88: 00850513 addi x10,x10,8 + +0000000080001e8c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + xperm8 x15, x13, x6 # perform operation + 80001e8c: 2866c7b3 xperm8 x15,x13,x6 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e90: 000f3383 ld x7,0(x30) + 80001e94: 00f38c63 beq x7,x15,80001eac + 80001e98: 6810546f jal x8,80007d18 + 80001e9c: 80001e8c .word 0x80001e8c + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 8001079e .word 0x8001079e + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000001 + 80001eb0: 00053b03 ld x22,0(x10) + 80001eb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80001eb8: 00053303 ld x6,0(x10) + 80001ebc: 00850513 addi x10,x10,8 + +0000000080001ec0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + xperm8 x31, x22, x6 # perform operation + 80001ec0: 286b4fb3 xperm8 x31,x22,x6 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec4: 000f3383 ld x7,0(x30) + 80001ec8: 01f38c63 beq x7,x31,80001ee0 + 80001ecc: 64d0546f jal x8,80007d18 + 80001ed0: 80001ec0 .word 0x80001ec0 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 80010800 .word 0x80010800 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000001 + 80001ee4: 00053883 ld x17,0(x10) + 80001ee8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x7fffffffffffffff + 80001eec: 00053183 ld x3,0(x10) + 80001ef0: 00850513 addi x10,x10,8 + +0000000080001ef4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + xperm8 x20, x17, x3 # perform operation + 80001ef4: 2838ca33 xperm8 x20,x17,x3 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef8: 000f3383 ld x7,0(x30) + 80001efc: 01438c63 beq x7,x20,80001f14 + 80001f00: 6190546f jal x8,80007d18 + 80001f04: 80001ef4 .word 0x80001ef4 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 80010862 .word 0x80010862 + 80001f10: 00000000 .word 0x00000000 + 80001f14: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000000000001 + 80001f18: 00053283 ld x5,0(x10) + 80001f1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffffffffffe + 80001f20: 00053683 ld x13,0(x10) + 80001f24: 00850513 addi x10,x10,8 + +0000000080001f28 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + xperm8 x12, x5, x13 # perform operation + 80001f28: 28d2c633 xperm8 x12,x5,x13 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f2c: 000f3383 ld x7,0(x30) + 80001f30: 00c38c63 beq x7,x12,80001f48 + 80001f34: 5e50546f jal x8,80007d18 + 80001f38: 80001f28 .word 0x80001f28 + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 800108c4 .word 0x800108c4 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80001f4c: 00053483 ld x9,0(x10) + 80001f50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xffffffffffffffff + 80001f54: 00053a83 ld x21,0(x10) + 80001f58: 00850513 addi x10,x10,8 + +0000000080001f5c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + xperm8 x13, x9, x21 # perform operation + 80001f5c: 2954c6b3 xperm8 x13,x9,x21 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f60: 000f3383 ld x7,0(x30) + 80001f64: 00d38c63 beq x7,x13,80001f7c + 80001f68: 5b10546f jal x8,80007d18 + 80001f6c: 80001f5c .word 0x80001f5c + 80001f70: 00000000 .word 0x00000000 + 80001f74: 80010926 .word 0x80010926 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000000000001 + 80001f80: 00053303 ld x6,0(x10) + 80001f84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xfffffffffffffffe + 80001f88: 00053b83 ld x23,0(x10) + 80001f8c: 00850513 addi x10,x10,8 + +0000000080001f90 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + xperm8 x27, x6, x23 # perform operation + 80001f90: 29734db3 xperm8 x27,x6,x23 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f94: 000f3383 ld x7,0(x30) + 80001f98: 01b38c63 beq x7,x27,80001fb0 + 80001f9c: 57d0546f jal x8,80007d18 + 80001fa0: 80001f90 .word 0x80001f90 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 80010988 .word 0x80010988 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000001 + 80001fb4: 00053783 ld x15,0(x10) + 80001fb8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 80001fbc: 00053d03 ld x26,0(x10) + 80001fc0: 00850513 addi x10,x10,8 + +0000000080001fc4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + xperm8 x11, x15, x26 # perform operation + 80001fc4: 29a7c5b3 xperm8 x11,x15,x26 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc8: 000f3383 ld x7,0(x30) + 80001fcc: 00b38c63 beq x7,x11,80001fe4 + 80001fd0: 5490546f jal x8,80007d18 + 80001fd4: 80001fc4 .word 0x80001fc4 + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 800109ea .word 0x800109ea + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000001 + 80001fe8: 00053b03 ld x22,0(x10) + 80001fec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001ff0: 00053883 ld x17,0(x10) + 80001ff4: 00850513 addi x10,x10,8 + +0000000080001ff8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x18, x22, x17 # perform operation + 80001ff8: 291b4933 xperm8 x18,x22,x17 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ffc: 000f3383 ld x7,0(x30) + 80002000: 01238c63 beq x7,x18,80002018 + 80002004: 5150546f jal x8,80007d18 + 80002008: 80001ff8 .word 0x80001ff8 + 8000200c: 00000000 .word 0x00000000 + 80002010: 80010a4c .word 0x80010a4c + 80002014: 00000000 .word 0x00000000 + 80002018: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000001 + 8000201c: 00053c83 ld x25,0(x10) + 80002020: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5555555555555555 + 80002024: 00053303 ld x6,0(x10) + 80002028: 00850513 addi x10,x10,8 + +000000008000202c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + xperm8 x27, x25, x6 # perform operation + 8000202c: 286ccdb3 xperm8 x27,x25,x6 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002030: 000f3383 ld x7,0(x30) + 80002034: 01b38c63 beq x7,x27,8000204c + 80002038: 4e10546f jal x8,80007d18 + 8000203c: 8000202c .word 0x8000202c + 80002040: 00000000 .word 0x00000000 + 80002044: 80010aae .word 0x80010aae + 80002048: 00000000 .word 0x00000000 + 8000204c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80002050: 00053483 ld x9,0(x10) + 80002054: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x00000000ffffffff + 80002058: 00053183 ld x3,0(x10) + 8000205c: 00850513 addi x10,x10,8 + +0000000080002060 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + xperm8 x4, x9, x3 # perform operation + 80002060: 2834c233 xperm8 x4,x9,x3 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002064: 000f3383 ld x7,0(x30) + 80002068: 00438c63 beq x7,x4,80002080 + 8000206c: 4ad0546f jal x8,80007d18 + 80002070: 80002060 .word 0x80002060 + 80002074: 00000000 .word 0x00000000 + 80002078: 80010b10 .word 0x80010b10 + 8000207c: 00000000 .word 0x00000000 + 80002080: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80002084: 00053483 ld x9,0(x10) + 80002088: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 8000208c: 00053a83 ld x21,0(x10) + 80002090: 00850513 addi x10,x10,8 + +0000000080002094 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + xperm8 x17, x9, x21 # perform operation + 80002094: 2954c8b3 xperm8 x17,x9,x21 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002098: 000f3383 ld x7,0(x30) + 8000209c: 01138c63 beq x7,x17,800020b4 + 800020a0: 4790546f jal x8,80007d18 + 800020a4: 80002094 .word 0x80002094 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 80010b6a .word 0x80010b6a + 800020b0: 00000000 .word 0x00000000 + 800020b4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000000000001 + 800020b8: 00053e03 ld x28,0(x10) + 800020bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000000 + 800020c0: 00053303 ld x6,0(x10) + 800020c4: 00850513 addi x10,x10,8 + +00000000800020c8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + xperm8 x31, x28, x6 # perform operation + 800020c8: 286e4fb3 xperm8 x31,x28,x6 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020cc: 000f3383 ld x7,0(x30) + 800020d0: 01f38c63 beq x7,x31,800020e8 + 800020d4: 4450546f jal x8,80007d18 + 800020d8: 800020c8 .word 0x800020c8 + 800020dc: 00000000 .word 0x00000000 + 800020e0: 80010bc4 .word 0x80010bc4 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000001 + 800020ec: 00053b03 ld x22,0(x10) + 800020f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000001 + 800020f4: 00053483 ld x9,0(x10) + 800020f8: 00850513 addi x10,x10,8 + +00000000800020fc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + xperm8 x21, x22, x9 # perform operation + 800020fc: 289b4ab3 xperm8 x21,x22,x9 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002100: 000f3383 ld x7,0(x30) + 80002104: 01538c63 beq x7,x21,8000211c + 80002108: 4110546f jal x8,80007d18 + 8000210c: 800020fc .word 0x800020fc + 80002110: 00000000 .word 0x00000000 + 80002114: 80010c1f .word 0x80010c1f + 80002118: 00000000 .word 0x00000000 + 8000211c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000000000002 + 80002120: 00053283 ld x5,0(x10) + 80002124: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000000 + 80002128: 00053103 ld x2,0(x10) + 8000212c: 00850513 addi x10,x10,8 + +0000000080002130 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + xperm8 x11, x5, x2 # perform operation + 80002130: 2822c5b3 xperm8 x11,x5,x2 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002134: 000f3383 ld x7,0(x30) + 80002138: 00b38c63 beq x7,x11,80002150 + 8000213c: 3dd0546f jal x8,80007d18 + 80002140: 80002130 .word 0x80002130 + 80002144: 00000000 .word 0x00000000 + 80002148: 80010c7a .word 0x80010c7a + 8000214c: 00000000 .word 0x00000000 + 80002150: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000002 + 80002154: 00053c83 ld x25,0(x10) + 80002158: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000001 + 8000215c: 00053783 ld x15,0(x10) + 80002160: 00850513 addi x10,x10,8 + +0000000080002164 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + xperm8 x1, x25, x15 # perform operation + 80002164: 28fcc0b3 xperm8 x1,x25,x15 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002168: 000f3383 ld x7,0(x30) + 8000216c: 00138c63 beq x7,x1,80002184 + 80002170: 3a90546f jal x8,80007d18 + 80002174: 80002164 .word 0x80002164 + 80002178: 00000000 .word 0x00000000 + 8000217c: 80010ccd .word 0x80010ccd + 80002180: 00000000 .word 0x00000000 + 80002184: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000002 + 80002188: 00053783 ld x15,0(x10) + 8000218c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000002 + 80002190: 00053d03 ld x26,0(x10) + 80002194: 00850513 addi x10,x10,8 + +0000000080002198 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + xperm8 x25, x15, x26 # perform operation + 80002198: 29a7ccb3 xperm8 x25,x15,x26 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 8000219c: 000f3383 ld x7,0(x30) + 800021a0: 01938c63 beq x7,x25,800021b8 + 800021a4: 3750546f jal x8,80007d18 + 800021a8: 80002198 .word 0x80002198 + 800021ac: 00000000 .word 0x00000000 + 800021b0: 80010d20 .word 0x80010d20 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 800021bc: 00053e83 ld x29,0(x10) + 800021c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 800021c4: 00053f83 ld x31,0(x10) + 800021c8: 00850513 addi x10,x10,8 + +00000000800021cc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + xperm8 x3, x29, x31 # perform operation + 800021cc: 29fec1b3 xperm8 x3,x29,x31 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d0: 000f3383 ld x7,0(x30) + 800021d4: 00338c63 beq x7,x3,800021ec + 800021d8: 3410546f jal x8,80007d18 + 800021dc: 800021cc .word 0x800021cc + 800021e0: 00000000 .word 0x00000000 + 800021e4: 80010d73 .word 0x80010d73 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000002 + 800021f0: 00053d83 ld x27,0(x10) + 800021f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x8000000000000001 + 800021f8: 00053a83 ld x21,0(x10) + 800021fc: 00850513 addi x10,x10,8 + +0000000080002200 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + xperm8 x20, x27, x21 # perform operation + 80002200: 295dca33 xperm8 x20,x27,x21 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002204: 000f3383 ld x7,0(x30) + 80002208: 01438c63 beq x7,x20,80002220 + 8000220c: 30d0546f jal x8,80007d18 + 80002210: 80002200 .word 0x80002200 + 80002214: 00000000 .word 0x00000000 + 80002218: 80010dd5 .word 0x80010dd5 + 8000221c: 00000000 .word 0x00000000 + 80002220: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 80002224: 00053e83 ld x29,0(x10) + 80002228: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7fffffffffffffff + 8000222c: 00053c03 ld x24,0(x10) + 80002230: 00850513 addi x10,x10,8 + +0000000080002234 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + xperm8 x9, x29, x24 # perform operation + 80002234: 298ec4b3 xperm8 x9,x29,x24 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002238: 000f3383 ld x7,0(x30) + 8000223c: 00938c63 beq x7,x9,80002254 + 80002240: 2d90546f jal x8,80007d18 + 80002244: 80002234 .word 0x80002234 + 80002248: 00000000 .word 0x00000000 + 8000224c: 80010e37 .word 0x80010e37 + 80002250: 00000000 .word 0x00000000 + 80002254: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000002 + 80002258: 00053b03 ld x22,0(x10) + 8000225c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80002260: 00053b83 ld x23,0(x10) + 80002264: 00850513 addi x10,x10,8 + +0000000080002268 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + xperm8 x6, x22, x23 # perform operation + 80002268: 297b4333 xperm8 x6,x22,x23 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 8000226c: 000f3383 ld x7,0(x30) + 80002270: 00638c63 beq x7,x6,80002288 + 80002274: 2a50546f jal x8,80007d18 + 80002278: 80002268 .word 0x80002268 + 8000227c: 00000000 .word 0x00000000 + 80002280: 80010e99 .word 0x80010e99 + 80002284: 00000000 .word 0x00000000 + 80002288: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000002 + 8000228c: 00053583 ld x11,0(x10) + 80002290: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xffffffffffffffff + 80002294: 00053603 ld x12,0(x10) + 80002298: 00850513 addi x10,x10,8 + +000000008000229c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + xperm8 x16, x11, x12 # perform operation + 8000229c: 28c5c833 xperm8 x16,x11,x12 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a0: 000f3383 ld x7,0(x30) + 800022a4: 01038c63 beq x7,x16,800022bc + 800022a8: 2710546f jal x8,80007d18 + 800022ac: 8000229c .word 0x8000229c + 800022b0: 00000000 .word 0x00000000 + 800022b4: 80010efb .word 0x80010efb + 800022b8: 00000000 .word 0x00000000 + 800022bc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000002 + 800022c0: 00053483 ld x9,0(x10) + 800022c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xfffffffffffffffe + 800022c8: 00053283 ld x5,0(x10) + 800022cc: 00850513 addi x10,x10,8 + +00000000800022d0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + xperm8 x4, x9, x5 # perform operation + 800022d0: 2854c233 xperm8 x4,x9,x5 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d4: 000f3383 ld x7,0(x30) + 800022d8: 00438c63 beq x7,x4,800022f0 + 800022dc: 23d0546f jal x8,80007d18 + 800022e0: 800022d0 .word 0x800022d0 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 80010f5d .word 0x80010f5d + 800022ec: 00000000 .word 0x00000000 + 800022f0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000000000002 + 800022f4: 00053283 ld x5,0(x10) + 800022f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 800022fc: 00053903 ld x18,0(x10) + 80002300: 00850513 addi x10,x10,8 + +0000000080002304 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + xperm8 x15, x5, x18 # perform operation + 80002304: 2922c7b3 xperm8 x15,x5,x18 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002308: 000f3383 ld x7,0(x30) + 8000230c: 00f38c63 beq x7,x15,80002324 + 80002310: 2090546f jal x8,80007d18 + 80002314: 80002304 .word 0x80002304 + 80002318: 00000000 .word 0x00000000 + 8000231c: 80010fbf .word 0x80010fbf + 80002320: 00000000 .word 0x00000000 + 80002324: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 80002328: 00053e83 ld x29,0(x10) + 8000232c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80002330: 00053903 ld x18,0(x10) + 80002334: 00850513 addi x10,x10,8 + +0000000080002338 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x19, x29, x18 # perform operation + 80002338: 292ec9b3 xperm8 x19,x29,x18 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000233c: 000f3383 ld x7,0(x30) + 80002340: 01338c63 beq x7,x19,80002358 + 80002344: 1d50546f jal x8,80007d18 + 80002348: 80002338 .word 0x80002338 + 8000234c: 00000000 .word 0x00000000 + 80002350: 80011021 .word 0x80011021 + 80002354: 00000000 .word 0x00000000 + 80002358: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000000000002 + 8000235c: 00053283 ld x5,0(x10) + 80002360: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5555555555555555 + 80002364: 00053983 ld x19,0(x10) + 80002368: 00850513 addi x10,x10,8 + +000000008000236c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + xperm8 x31, x5, x19 # perform operation + 8000236c: 2932cfb3 xperm8 x31,x5,x19 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002370: 000f3383 ld x7,0(x30) + 80002374: 01f38c63 beq x7,x31,8000238c + 80002378: 1a10546f jal x8,80007d18 + 8000237c: 8000236c .word 0x8000236c + 80002380: 00000000 .word 0x00000000 + 80002384: 80011083 .word 0x80011083 + 80002388: 00000000 .word 0x00000000 + 8000238c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 80002390: 00053e83 ld x29,0(x10) + 80002394: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000ffffffff + 80002398: 00053483 ld x9,0(x10) + 8000239c: 00850513 addi x10,x10,8 + +00000000800023a0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + xperm8 x2, x29, x9 # perform operation + 800023a0: 289ec133 xperm8 x2,x29,x9 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a4: 000f3383 ld x7,0(x30) + 800023a8: 00238c63 beq x7,x2,800023c0 + 800023ac: 16d0546f jal x8,80007d18 + 800023b0: 800023a0 .word 0x800023a0 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 800110e5 .word 0x800110e5 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000000000002 + 800023c4: 00053083 ld x1,0(x10) + 800023c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 800023cc: 00053483 ld x9,0(x10) + 800023d0: 00850513 addi x10,x10,8 + +00000000800023d4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + xperm8 x13, x1, x9 # perform operation + 800023d4: 2890c6b3 xperm8 x13,x1,x9 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d8: 000f3383 ld x7,0(x30) + 800023dc: 00d38c63 beq x7,x13,800023f4 + 800023e0: 1390546f jal x8,80007d18 + 800023e4: 800023d4 .word 0x800023d4 + 800023e8: 00000000 .word 0x00000000 + 800023ec: 8001113f .word 0x8001113f + 800023f0: 00000000 .word 0x00000000 + 800023f4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000000000002 + 800023f8: 00053e83 ld x29,0(x10) + 800023fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000100000000 + 80002400: 00053703 ld x14,0(x10) + 80002404: 00850513 addi x10,x10,8 + +0000000080002408 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + xperm8 x24, x29, x14 # perform operation + 80002408: 28eecc33 xperm8 x24,x29,x14 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 8000240c: 000f3383 ld x7,0(x30) + 80002410: 01838c63 beq x7,x24,80002428 + 80002414: 1050546f jal x8,80007d18 + 80002418: 80002408 .word 0x80002408 + 8000241c: 00000000 .word 0x00000000 + 80002420: 80011199 .word 0x80011199 + 80002424: 00000000 .word 0x00000000 + 80002428: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000002 + 8000242c: 00053883 ld x17,0(x10) + 80002430: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000100000001 + 80002434: 00053083 ld x1,0(x10) + 80002438: 00850513 addi x10,x10,8 + +000000008000243c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + xperm8 x28, x17, x1 # perform operation + 8000243c: 2818ce33 xperm8 x28,x17,x1 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002440: 000f3383 ld x7,0(x30) + 80002444: 01c38c63 beq x7,x28,8000245c + 80002448: 0d10546f jal x8,80007d18 + 8000244c: 8000243c .word 0x8000243c + 80002450: 00000000 .word 0x00000000 + 80002454: 800111f4 .word 0x800111f4 + 80002458: 00000000 .word 0x00000000 + 8000245c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000000 + 80002460: 00053e83 ld x29,0(x10) + 80002464: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000000 + 80002468: 00053d03 ld x26,0(x10) + 8000246c: 00850513 addi x10,x10,8 + +0000000080002470 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + xperm8 x11, x29, x26 # perform operation + 80002470: 29aec5b3 xperm8 x11,x29,x26 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002474: 000f3383 ld x7,0(x30) + 80002478: 00b38c63 beq x7,x11,80002490 + 8000247c: 09d0546f jal x8,80007d18 + 80002480: 80002470 .word 0x80002470 + 80002484: 00000000 .word 0x00000000 + 80002488: 8001124f .word 0x8001124f + 8000248c: 00000000 .word 0x00000000 + 80002490: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x8000000000000000 + 80002494: 00053983 ld x19,0(x10) + 80002498: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000001 + 8000249c: 00053a83 ld x21,0(x10) + 800024a0: 00850513 addi x10,x10,8 + +00000000800024a4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + xperm8 x11, x19, x21 # perform operation + 800024a4: 2959c5b3 xperm8 x11,x19,x21 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a8: 000f3383 ld x7,0(x30) + 800024ac: 00b38c63 beq x7,x11,800024c4 + 800024b0: 0690546f jal x8,80007d18 + 800024b4: 800024a4 .word 0x800024a4 + 800024b8: 00000000 .word 0x00000000 + 800024bc: 800112b1 .word 0x800112b1 + 800024c0: 00000000 .word 0x00000000 + 800024c4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x8000000000000000 + 800024c8: 00053283 ld x5,0(x10) + 800024cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 800024d0: 00053683 ld x13,0(x10) + 800024d4: 00850513 addi x10,x10,8 + +00000000800024d8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + xperm8 x15, x5, x13 # perform operation + 800024d8: 28d2c7b3 xperm8 x15,x5,x13 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024dc: 000f3383 ld x7,0(x30) + 800024e0: 00f38c63 beq x7,x15,800024f8 + 800024e4: 0350546f jal x8,80007d18 + 800024e8: 800024d8 .word 0x800024d8 + 800024ec: 00000000 .word 0x00000000 + 800024f0: 80011313 .word 0x80011313 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x8000000000000000 + 800024fc: 00053803 ld x16,0(x10) + 80002500: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8000000000000000 + 80002504: 00053983 ld x19,0(x10) + 80002508: 00850513 addi x10,x10,8 + +000000008000250c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + xperm8 x1, x16, x19 # perform operation + 8000250c: 293840b3 xperm8 x1,x16,x19 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002510: 000f3383 ld x7,0(x30) + 80002514: 00138c63 beq x7,x1,8000252c + 80002518: 0010546f jal x8,80007d18 + 8000251c: 8000250c .word 0x8000250c + 80002520: 00000000 .word 0x00000000 + 80002524: 80011375 .word 0x80011375 + 80002528: 00000000 .word 0x00000000 + 8000252c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000000 + 80002530: 00053d03 ld x26,0(x10) + 80002534: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x8000000000000001 + 80002538: 00053683 ld x13,0(x10) + 8000253c: 00850513 addi x10,x10,8 + +0000000080002540 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + xperm8 x20, x26, x13 # perform operation + 80002540: 28dd4a33 xperm8 x20,x26,x13 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002544: 000f3383 ld x7,0(x30) + 80002548: 01438c63 beq x7,x20,80002560 + 8000254c: 7cc0546f jal x8,80007d18 + 80002550: 80002540 .word 0x80002540 + 80002554: 00000000 .word 0x00000000 + 80002558: 800113e6 .word 0x800113e6 + 8000255c: 00000000 .word 0x00000000 + 80002560: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000000 + 80002564: 00053103 ld x2,0(x10) + 80002568: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7fffffffffffffff + 8000256c: 00053c03 ld x24,0(x10) + 80002570: 00850513 addi x10,x10,8 + +0000000080002574 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + xperm8 x22, x2, x24 # perform operation + 80002574: 29814b33 xperm8 x22,x2,x24 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002578: 000f3383 ld x7,0(x30) + 8000257c: 01638c63 beq x7,x22,80002594 + 80002580: 7980546f jal x8,80007d18 + 80002584: 80002574 .word 0x80002574 + 80002588: 00000000 .word 0x00000000 + 8000258c: 80011457 .word 0x80011457 + 80002590: 00000000 .word 0x00000000 + 80002594: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8000000000000000 + 80002598: 00053303 ld x6,0(x10) + 8000259c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x7ffffffffffffffe + 800025a0: 00053c03 ld x24,0(x10) + 800025a4: 00850513 addi x10,x10,8 + +00000000800025a8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + xperm8 x5, x6, x24 # perform operation + 800025a8: 298342b3 xperm8 x5,x6,x24 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025ac: 000f3383 ld x7,0(x30) + 800025b0: 00538c63 beq x7,x5,800025c8 + 800025b4: 7640546f jal x8,80007d18 + 800025b8: 800025a8 .word 0x800025a8 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 800114c8 .word 0x800114c8 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x8000000000000000 + 800025cc: 00053e03 ld x28,0(x10) + 800025d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xffffffffffffffff + 800025d4: 00053183 ld x3,0(x10) + 800025d8: 00850513 addi x10,x10,8 + +00000000800025dc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + xperm8 x1, x28, x3 # perform operation + 800025dc: 283e40b3 xperm8 x1,x28,x3 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e0: 000f3383 ld x7,0(x30) + 800025e4: 00138c63 beq x7,x1,800025fc + 800025e8: 7300546f jal x8,80007d18 + 800025ec: 800025dc .word 0x800025dc + 800025f0: 00000000 .word 0x00000000 + 800025f4: 80011539 .word 0x80011539 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8000000000000000 + 80002600: 00053783 ld x15,0(x10) + 80002604: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xfffffffffffffffe + 80002608: 00053203 ld x4,0(x10) + 8000260c: 00850513 addi x10,x10,8 + +0000000080002610 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + xperm8 x17, x15, x4 # perform operation + 80002610: 2847c8b3 xperm8 x17,x15,x4 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002614: 000f3383 ld x7,0(x30) + 80002618: 01138c63 beq x7,x17,80002630 + 8000261c: 6fc0546f jal x8,80007d18 + 80002620: 80002610 .word 0x80002610 + 80002624: 00000000 .word 0x00000000 + 80002628: 800115aa .word 0x800115aa + 8000262c: 00000000 .word 0x00000000 + 80002630: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000000 + 80002634: 00053a83 ld x21,0(x10) + 80002638: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 8000263c: 00053183 ld x3,0(x10) + 80002640: 00850513 addi x10,x10,8 + +0000000080002644 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + xperm8 x25, x21, x3 # perform operation + 80002644: 283accb3 xperm8 x25,x21,x3 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002648: 000f3383 ld x7,0(x30) + 8000264c: 01938c63 beq x7,x25,80002664 + 80002650: 6c80546f jal x8,80007d18 + 80002654: 80002644 .word 0x80002644 + 80002658: 00000000 .word 0x00000000 + 8000265c: 8001161b .word 0x8001161b + 80002660: 00000000 .word 0x00000000 + 80002664: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 80002668: 00053683 ld x13,0(x10) + 8000266c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80002670: 00053303 ld x6,0(x10) + 80002674: 00850513 addi x10,x10,8 + +0000000080002678 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x31, x13, x6 # perform operation + 80002678: 2866cfb3 xperm8 x31,x13,x6 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000267c: 000f3383 ld x7,0(x30) + 80002680: 01f38c63 beq x7,x31,80002698 + 80002684: 6940546f jal x8,80007d18 + 80002688: 80002678 .word 0x80002678 + 8000268c: 00000000 .word 0x00000000 + 80002690: 8001168c .word 0x8001168c + 80002694: 00000000 .word 0x00000000 + 80002698: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x8000000000000000 + 8000269c: 00053b83 ld x23,0(x10) + 800026a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5555555555555555 + 800026a4: 00053683 ld x13,0(x10) + 800026a8: 00850513 addi x10,x10,8 + +00000000800026ac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + xperm8 x20, x23, x13 # perform operation + 800026ac: 28dbca33 xperm8 x20,x23,x13 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b0: 000f3383 ld x7,0(x30) + 800026b4: 01438c63 beq x7,x20,800026cc + 800026b8: 6600546f jal x8,80007d18 + 800026bc: 800026ac .word 0x800026ac + 800026c0: 00000000 .word 0x00000000 + 800026c4: 800116fd .word 0x800116fd + 800026c8: 00000000 .word 0x00000000 + 800026cc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000000 + 800026d0: 00053703 ld x14,0(x10) + 800026d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000000ffffffff + 800026d8: 00053803 ld x16,0(x10) + 800026dc: 00850513 addi x10,x10,8 + +00000000800026e0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + xperm8 x5, x14, x16 # perform operation + 800026e0: 290742b3 xperm8 x5,x14,x16 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e4: 000f3383 ld x7,0(x30) + 800026e8: 00538c63 beq x7,x5,80002700 + 800026ec: 62c0546f jal x8,80007d18 + 800026f0: 800026e0 .word 0x800026e0 + 800026f4: 00000000 .word 0x00000000 + 800026f8: 8001176e .word 0x8001176e + 800026fc: 00000000 .word 0x00000000 + 80002700: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000000 + 80002704: 00053f83 ld x31,0(x10) + 80002708: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000fffffffe + 8000270c: 00053c83 ld x25,0(x10) + 80002710: 00850513 addi x10,x10,8 + +0000000080002714 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + xperm8 x12, x31, x25 # perform operation + 80002714: 299fc633 xperm8 x12,x31,x25 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002718: 000f3383 ld x7,0(x30) + 8000271c: 00c38c63 beq x7,x12,80002734 + 80002720: 5f80546f jal x8,80007d18 + 80002724: 80002714 .word 0x80002714 + 80002728: 00000000 .word 0x00000000 + 8000272c: 800117d7 .word 0x800117d7 + 80002730: 00000000 .word 0x00000000 + 80002734: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000000 + 80002738: 00053a03 ld x20,0(x10) + 8000273c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000100000000 + 80002740: 00053803 ld x16,0(x10) + 80002744: 00850513 addi x10,x10,8 + +0000000080002748 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + xperm8 x6, x20, x16 # perform operation + 80002748: 290a4333 xperm8 x6,x20,x16 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 8000274c: 000f3383 ld x7,0(x30) + 80002750: 00638c63 beq x7,x6,80002768 + 80002754: 5c40546f jal x8,80007d18 + 80002758: 80002748 .word 0x80002748 + 8000275c: 00000000 .word 0x00000000 + 80002760: 80011840 .word 0x80011840 + 80002764: 00000000 .word 0x00000000 + 80002768: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8000000000000000 + 8000276c: 00053183 ld x3,0(x10) + 80002770: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000100000001 + 80002774: 00053d83 ld x27,0(x10) + 80002778: 00850513 addi x10,x10,8 + +000000008000277c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + xperm8 x20, x3, x27 # perform operation + 8000277c: 29b1ca33 xperm8 x20,x3,x27 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002780: 000f3383 ld x7,0(x30) + 80002784: 01438c63 beq x7,x20,8000279c + 80002788: 5900546f jal x8,80007d18 + 8000278c: 8000277c .word 0x8000277c + 80002790: 00000000 .word 0x00000000 + 80002794: 800118aa .word 0x800118aa + 80002798: 00000000 .word 0x00000000 + 8000279c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 800027a0: 00053083 ld x1,0(x10) + 800027a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000000 + 800027a8: 00053303 ld x6,0(x10) + 800027ac: 00850513 addi x10,x10,8 + +00000000800027b0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + xperm8 x17, x1, x6 # perform operation + 800027b0: 2860c8b3 xperm8 x17,x1,x6 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b4: 000f3383 ld x7,0(x30) + 800027b8: 01138c63 beq x7,x17,800027d0 + 800027bc: 55c0546f jal x8,80007d18 + 800027c0: 800027b0 .word 0x800027b0 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 80011914 .word 0x80011914 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000001 + 800027d4: 00053f83 ld x31,0(x10) + 800027d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000001 + 800027dc: 00053703 ld x14,0(x10) + 800027e0: 00850513 addi x10,x10,8 + +00000000800027e4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + xperm8 x16, x31, x14 # perform operation + 800027e4: 28efc833 xperm8 x16,x31,x14 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e8: 000f3383 ld x7,0(x30) + 800027ec: 01038c63 beq x7,x16,80002804 + 800027f0: 5280546f jal x8,80007d18 + 800027f4: 800027e4 .word 0x800027e4 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 80011976 .word 0x80011976 + 80002800: 00000000 .word 0x00000000 + 80002804: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8000000000000001 + 80002808: 00053303 ld x6,0(x10) + 8000280c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000000000002 + 80002810: 00053803 ld x16,0(x10) + 80002814: 00850513 addi x10,x10,8 + +0000000080002818 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + xperm8 x9, x6, x16 # perform operation + 80002818: 290344b3 xperm8 x9,x6,x16 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 8000281c: 000f3383 ld x7,0(x30) + 80002820: 00938c63 beq x7,x9,80002838 + 80002824: 4f40546f jal x8,80007d18 + 80002828: 80002818 .word 0x80002818 + 8000282c: 00000000 .word 0x00000000 + 80002830: 800119d8 .word 0x800119d8 + 80002834: 00000000 .word 0x00000000 + 80002838: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000001 + 8000283c: 00053d03 ld x26,0(x10) + 80002840: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x8000000000000000 + 80002844: 00053483 ld x9,0(x10) + 80002848: 00850513 addi x10,x10,8 + +000000008000284c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + xperm8 x18, x26, x9 # perform operation + 8000284c: 289d4933 xperm8 x18,x26,x9 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002850: 000f3383 ld x7,0(x30) + 80002854: 01238c63 beq x7,x18,8000286c + 80002858: 4c00546f jal x8,80007d18 + 8000285c: 8000284c .word 0x8000284c + 80002860: 00000000 .word 0x00000000 + 80002864: 80011a3a .word 0x80011a3a + 80002868: 00000000 .word 0x00000000 + 8000286c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x8000000000000001 + 80002870: 00053303 ld x6,0(x10) + 80002874: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000001 + 80002878: 00053803 ld x16,0(x10) + 8000287c: 00850513 addi x10,x10,8 + +0000000080002880 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + xperm8 x26, x6, x16 # perform operation + 80002880: 29034d33 xperm8 x26,x6,x16 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002884: 000f3383 ld x7,0(x30) + 80002888: 01a38c63 beq x7,x26,800028a0 + 8000288c: 48c0546f jal x8,80007d18 + 80002890: 80002880 .word 0x80002880 + 80002894: 00000000 .word 0x00000000 + 80002898: 80011aab .word 0x80011aab + 8000289c: 00000000 .word 0x00000000 + 800028a0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x8000000000000001 + 800028a4: 00053203 ld x4,0(x10) + 800028a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7fffffffffffffff + 800028ac: 00053883 ld x17,0(x10) + 800028b0: 00850513 addi x10,x10,8 + +00000000800028b4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + xperm8 x16, x4, x17 # perform operation + 800028b4: 29124833 xperm8 x16,x4,x17 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b8: 000f3383 ld x7,0(x30) + 800028bc: 01038c63 beq x7,x16,800028d4 + 800028c0: 4580546f jal x8,80007d18 + 800028c4: 800028b4 .word 0x800028b4 + 800028c8: 00000000 .word 0x00000000 + 800028cc: 80011b1c .word 0x80011b1c + 800028d0: 00000000 .word 0x00000000 + 800028d4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000001 + 800028d8: 00053c03 ld x24,0(x10) + 800028dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7ffffffffffffffe + 800028e0: 00053283 ld x5,0(x10) + 800028e4: 00850513 addi x10,x10,8 + +00000000800028e8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + xperm8 x9, x24, x5 # perform operation + 800028e8: 285c44b3 xperm8 x9,x24,x5 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028ec: 000f3383 ld x7,0(x30) + 800028f0: 00938c63 beq x7,x9,80002908 + 800028f4: 4240546f jal x8,80007d18 + 800028f8: 800028e8 .word 0x800028e8 + 800028fc: 00000000 .word 0x00000000 + 80002900: 80011b8d .word 0x80011b8d + 80002904: 00000000 .word 0x00000000 + 80002908: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x8000000000000001 + 8000290c: 00053983 ld x19,0(x10) + 80002910: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xffffffffffffffff + 80002914: 00053d03 ld x26,0(x10) + 80002918: 00850513 addi x10,x10,8 + +000000008000291c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + xperm8 x25, x19, x26 # perform operation + 8000291c: 29a9ccb3 xperm8 x25,x19,x26 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002920: 000f3383 ld x7,0(x30) + 80002924: 01938c63 beq x7,x25,8000293c + 80002928: 3f00546f jal x8,80007d18 + 8000292c: 8000291c .word 0x8000291c + 80002930: 00000000 .word 0x00000000 + 80002934: 80011bfe .word 0x80011bfe + 80002938: 00000000 .word 0x00000000 + 8000293c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 80002940: 00053083 ld x1,0(x10) + 80002944: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xfffffffffffffffe + 80002948: 00053303 ld x6,0(x10) + 8000294c: 00850513 addi x10,x10,8 + +0000000080002950 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + xperm8 x11, x1, x6 # perform operation + 80002950: 2860c5b3 xperm8 x11,x1,x6 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002954: 000f3383 ld x7,0(x30) + 80002958: 00b38c63 beq x7,x11,80002970 + 8000295c: 3bc0546f jal x8,80007d18 + 80002960: 80002950 .word 0x80002950 + 80002964: 00000000 .word 0x00000000 + 80002968: 80011c6f .word 0x80011c6f + 8000296c: 00000000 .word 0x00000000 + 80002970: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x8000000000000001 + 80002974: 00053583 ld x11,0(x10) + 80002978: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 8000297c: 00053983 ld x19,0(x10) + 80002980: 00850513 addi x10,x10,8 + +0000000080002984 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + xperm8 x22, x11, x19 # perform operation + 80002984: 2935cb33 xperm8 x22,x11,x19 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002988: 000f3383 ld x7,0(x30) + 8000298c: 01638c63 beq x7,x22,800029a4 + 80002990: 3880546f jal x8,80007d18 + 80002994: 80002984 .word 0x80002984 + 80002998: 00000000 .word 0x00000000 + 8000299c: 80011ce0 .word 0x80011ce0 + 800029a0: 00000000 .word 0x00000000 + 800029a4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000001 + 800029a8: 00053103 ld x2,0(x10) + 800029ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 800029b0: 00053603 ld x12,0(x10) + 800029b4: 00850513 addi x10,x10,8 + +00000000800029b8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x15, x2, x12 # perform operation + 800029b8: 28c147b3 xperm8 x15,x2,x12 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029bc: 000f3383 ld x7,0(x30) + 800029c0: 00f38c63 beq x7,x15,800029d8 + 800029c4: 3540546f jal x8,80007d18 + 800029c8: 800029b8 .word 0x800029b8 + 800029cc: 00000000 .word 0x00000000 + 800029d0: 80011d51 .word 0x80011d51 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x8000000000000001 + 800029dc: 00053203 ld x4,0(x10) + 800029e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x5555555555555555 + 800029e4: 00053603 ld x12,0(x10) + 800029e8: 00850513 addi x10,x10,8 + +00000000800029ec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + xperm8 x15, x4, x12 # perform operation + 800029ec: 28c247b3 xperm8 x15,x4,x12 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f0: 000f3383 ld x7,0(x30) + 800029f4: 00f38c63 beq x7,x15,80002a0c + 800029f8: 3200546f jal x8,80007d18 + 800029fc: 800029ec .word 0x800029ec + 80002a00: 00000000 .word 0x00000000 + 80002a04: 80011dc2 .word 0x80011dc2 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x8000000000000001 + 80002a10: 00053983 ld x19,0(x10) + 80002a14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x00000000ffffffff + 80002a18: 00053283 ld x5,0(x10) + 80002a1c: 00850513 addi x10,x10,8 + +0000000080002a20 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + xperm8 x14, x19, x5 # perform operation + 80002a20: 2859c733 xperm8 x14,x19,x5 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a24: 000f3383 ld x7,0(x30) + 80002a28: 00e38c63 beq x7,x14,80002a40 + 80002a2c: 2ec0546f jal x8,80007d18 + 80002a30: 80002a20 .word 0x80002a20 + 80002a34: 00000000 .word 0x00000000 + 80002a38: 80011e33 .word 0x80011e33 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000001 + 80002a44: 00053d83 ld x27,0(x10) + 80002a48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000fffffffe + 80002a4c: 00053703 ld x14,0(x10) + 80002a50: 00850513 addi x10,x10,8 + +0000000080002a54 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + xperm8 x22, x27, x14 # perform operation + 80002a54: 28edcb33 xperm8 x22,x27,x14 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a58: 000f3383 ld x7,0(x30) + 80002a5c: 01638c63 beq x7,x22,80002a74 + 80002a60: 2b80546f jal x8,80007d18 + 80002a64: 80002a54 .word 0x80002a54 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 80011e9c .word 0x80011e9c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 80002a78: 00053083 ld x1,0(x10) + 80002a7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000000 + 80002a80: 00053783 ld x15,0(x10) + 80002a84: 00850513 addi x10,x10,8 + +0000000080002a88 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + xperm8 x31, x1, x15 # perform operation + 80002a88: 28f0cfb3 xperm8 x31,x1,x15 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a8c: 000f3383 ld x7,0(x30) + 80002a90: 01f38c63 beq x7,x31,80002aa8 + 80002a94: 2840546f jal x8,80007d18 + 80002a98: 80002a88 .word 0x80002a88 + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 80011f05 .word 0x80011f05 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000001 + 80002aac: 00053a03 ld x20,0(x10) + 80002ab0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80002ab4: 00053a83 ld x21,0(x10) + 80002ab8: 00850513 addi x10,x10,8 + +0000000080002abc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + xperm8 x23, x20, x21 # perform operation + 80002abc: 295a4bb3 xperm8 x23,x20,x21 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac0: 000f3383 ld x7,0(x30) + 80002ac4: 01738c63 beq x7,x23,80002adc + 80002ac8: 2500546f jal x8,80007d18 + 80002acc: 80002abc .word 0x80002abc + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 80011f6f .word 0x80011f6f + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002ae0: 00053b83 ld x23,0(x10) + 80002ae4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000000 + 80002ae8: 00053883 ld x17,0(x10) + 80002aec: 00850513 addi x10,x10,8 + +0000000080002af0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + xperm8 x21, x23, x17 # perform operation + 80002af0: 291bcab3 xperm8 x21,x23,x17 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af4: 000f3383 ld x7,0(x30) + 80002af8: 01538c63 beq x7,x21,80002b10 + 80002afc: 21c0546f jal x8,80007d18 + 80002b00: 80002af0 .word 0x80002af0 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 80011fd9 .word 0x80011fd9 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002b14: 00053e03 ld x28,0(x10) + 80002b18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000001 + 80002b1c: 00053183 ld x3,0(x10) + 80002b20: 00850513 addi x10,x10,8 + +0000000080002b24 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + xperm8 x26, x28, x3 # perform operation + 80002b24: 283e4d33 xperm8 x26,x28,x3 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b28: 000f3383 ld x7,0(x30) + 80002b2c: 01a38c63 beq x7,x26,80002b44 + 80002b30: 1e80546f jal x8,80007d18 + 80002b34: 80002b24 .word 0x80002b24 + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 8001203b .word 0x8001203b + 80002b40: 00000000 .word 0x00000000 + 80002b44: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002b48: 00053703 ld x14,0(x10) + 80002b4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000002 + 80002b50: 00053983 ld x19,0(x10) + 80002b54: 00850513 addi x10,x10,8 + +0000000080002b58 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + xperm8 x3, x14, x19 # perform operation + 80002b58: 293741b3 xperm8 x3,x14,x19 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b5c: 000f3383 ld x7,0(x30) + 80002b60: 00338c63 beq x7,x3,80002b78 + 80002b64: 1b40546f jal x8,80007d18 + 80002b68: 80002b58 .word 0x80002b58 + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 8001209d .word 0x8001209d + 80002b74: 00000000 .word 0x00000000 + 80002b78: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x7fffffffffffffff + 80002b7c: 00053203 ld x4,0(x10) + 80002b80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000000 + 80002b84: 00053903 ld x18,0(x10) + 80002b88: 00850513 addi x10,x10,8 + +0000000080002b8c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + xperm8 x17, x4, x18 # perform operation + 80002b8c: 292248b3 xperm8 x17,x4,x18 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b90: 000f3383 ld x7,0(x30) + 80002b94: 01138c63 beq x7,x17,80002bac + 80002b98: 1800546f jal x8,80007d18 + 80002b9c: 80002b8c .word 0x80002b8c + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 800120ff .word 0x800120ff + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002bb0: 00053c83 ld x25,0(x10) + 80002bb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000001 + 80002bb8: 00053c03 ld x24,0(x10) + 80002bbc: 00850513 addi x10,x10,8 + +0000000080002bc0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + xperm8 x6, x25, x24 # perform operation + 80002bc0: 298cc333 xperm8 x6,x25,x24 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc4: 000f3383 ld x7,0(x30) + 80002bc8: 00638c63 beq x7,x6,80002be0 + 80002bcc: 14c0546f jal x8,80007d18 + 80002bd0: 80002bc0 .word 0x80002bc0 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 80012170 .word 0x80012170 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002be4: 00053b83 ld x23,0(x10) + 80002be8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7fffffffffffffff + 80002bec: 00053883 ld x17,0(x10) + 80002bf0: 00850513 addi x10,x10,8 + +0000000080002bf4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + xperm8 x26, x23, x17 # perform operation + 80002bf4: 291bcd33 xperm8 x26,x23,x17 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf8: 000f3383 ld x7,0(x30) + 80002bfc: 01a38c63 beq x7,x26,80002c14 + 80002c00: 1180546f jal x8,80007d18 + 80002c04: 80002bf4 .word 0x80002bf4 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 800121e1 .word 0x800121e1 + 80002c10: 00000000 .word 0x00000000 + 80002c14: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002c18: 00053c03 ld x24,0(x10) + 80002c1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80002c20: 00053903 ld x18,0(x10) + 80002c24: 00850513 addi x10,x10,8 + +0000000080002c28 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + xperm8 x13, x24, x18 # perform operation + 80002c28: 292c46b3 xperm8 x13,x24,x18 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c2c: 000f3383 ld x7,0(x30) + 80002c30: 00d38c63 beq x7,x13,80002c48 + 80002c34: 0e40546f jal x8,80007d18 + 80002c38: 80002c28 .word 0x80002c28 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 80012252 .word 0x80012252 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002c4c: 00053583 ld x11,0(x10) + 80002c50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 80002c54: 00053e03 ld x28,0(x10) + 80002c58: 00850513 addi x10,x10,8 + +0000000080002c5c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + xperm8 x3, x11, x28 # perform operation + 80002c5c: 29c5c1b3 xperm8 x3,x11,x28 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c60: 000f3383 ld x7,0(x30) + 80002c64: 00338c63 beq x7,x3,80002c7c + 80002c68: 0b00546f jal x8,80007d18 + 80002c6c: 80002c5c .word 0x80002c5c + 80002c70: 00000000 .word 0x00000000 + 80002c74: 800122c3 .word 0x800122c3 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002c80: 00053683 ld x13,0(x10) + 80002c84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002c88: 00053f83 ld x31,0(x10) + 80002c8c: 00850513 addi x10,x10,8 + +0000000080002c90 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + xperm8 x12, x13, x31 # perform operation + 80002c90: 29f6c633 xperm8 x12,x13,x31 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c94: 000f3383 ld x7,0(x30) + 80002c98: 00c38c63 beq x7,x12,80002cb0 + 80002c9c: 07c0546f jal x8,80007d18 + 80002ca0: 80002c90 .word 0x80002c90 + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 80012334 .word 0x80012334 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002cb4: 00053983 ld x19,0(x10) + 80002cb8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80002cbc: 00053803 ld x16,0(x10) + 80002cc0: 00850513 addi x10,x10,8 + +0000000080002cc4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + xperm8 x22, x19, x16 # perform operation + 80002cc4: 2909cb33 xperm8 x22,x19,x16 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc8: 000f3383 ld x7,0(x30) + 80002ccc: 01638c63 beq x7,x22,80002ce4 + 80002cd0: 0480546f jal x8,80007d18 + 80002cd4: 80002cc4 .word 0x80002cc4 + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 800123a5 .word 0x800123a5 + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002ce8: 00053f83 ld x31,0(x10) + 80002cec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80002cf0: 00053903 ld x18,0(x10) + 80002cf4: 00850513 addi x10,x10,8 + +0000000080002cf8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x27, x31, x18 # perform operation + 80002cf8: 292fcdb3 xperm8 x27,x31,x18 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cfc: 000f3383 ld x7,0(x30) + 80002d00: 01b38c63 beq x7,x27,80002d18 + 80002d04: 0140546f jal x8,80007d18 + 80002d08: 80002cf8 .word 0x80002cf8 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 80012416 .word 0x80012416 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002d1c: 00053983 ld x19,0(x10) + 80002d20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5555555555555555 + 80002d24: 00053b03 ld x22,0(x10) + 80002d28: 00850513 addi x10,x10,8 + +0000000080002d2c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + xperm8 x4, x19, x22 # perform operation + 80002d2c: 2969c233 xperm8 x4,x19,x22 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d30: 000f3383 ld x7,0(x30) + 80002d34: 00438c63 beq x7,x4,80002d4c + 80002d38: 7e10446f jal x8,80007d18 + 80002d3c: 80002d2c .word 0x80002d2c + 80002d40: 00000000 .word 0x00000000 + 80002d44: 80012487 .word 0x80012487 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002d50: 00053783 ld x15,0(x10) + 80002d54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000ffffffff + 80002d58: 00053b83 ld x23,0(x10) + 80002d5c: 00850513 addi x10,x10,8 + +0000000080002d60 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + xperm8 x13, x15, x23 # perform operation + 80002d60: 2977c6b3 xperm8 x13,x15,x23 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d64: 000f3383 ld x7,0(x30) + 80002d68: 00d38c63 beq x7,x13,80002d80 + 80002d6c: 7ad0446f jal x8,80007d18 + 80002d70: 80002d60 .word 0x80002d60 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 800124f8 .word 0x800124f8 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002d84: 00053603 ld x12,0(x10) + 80002d88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000fffffffe + 80002d8c: 00053883 ld x17,0(x10) + 80002d90: 00850513 addi x10,x10,8 + +0000000080002d94 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + xperm8 x9, x12, x17 # perform operation + 80002d94: 291644b3 xperm8 x9,x12,x17 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d98: 000f3383 ld x7,0(x30) + 80002d9c: 00938c63 beq x7,x9,80002db4 + 80002da0: 7790446f jal x8,80007d18 + 80002da4: 80002d94 .word 0x80002d94 + 80002da8: 00000000 .word 0x00000000 + 80002dac: 80012561 .word 0x80012561 + 80002db0: 00000000 .word 0x00000000 + 80002db4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002db8: 00053083 ld x1,0(x10) + 80002dbc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000000 + 80002dc0: 00053783 ld x15,0(x10) + 80002dc4: 00850513 addi x10,x10,8 + +0000000080002dc8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + xperm8 x31, x1, x15 # perform operation + 80002dc8: 28f0cfb3 xperm8 x31,x1,x15 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dcc: 000f3383 ld x7,0(x30) + 80002dd0: 01f38c63 beq x7,x31,80002de8 + 80002dd4: 7450446f jal x8,80007d18 + 80002dd8: 80002dc8 .word 0x80002dc8 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 800125ca .word 0x800125ca + 80002de4: 00000000 .word 0x00000000 + 80002de8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002dec: 00053083 ld x1,0(x10) + 80002df0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000001 + 80002df4: 00053c83 ld x25,0(x10) + 80002df8: 00850513 addi x10,x10,8 + +0000000080002dfc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + xperm8 x6, x1, x25 # perform operation + 80002dfc: 2990c333 xperm8 x6,x1,x25 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e00: 000f3383 ld x7,0(x30) + 80002e04: 00638c63 beq x7,x6,80002e1c + 80002e08: 7110446f jal x8,80007d18 + 80002e0c: 80002dfc .word 0x80002dfc + 80002e10: 00000000 .word 0x00000000 + 80002e14: 80012634 .word 0x80012634 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002e20: 00053783 ld x15,0(x10) + 80002e24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000000000000 + 80002e28: 00053083 ld x1,0(x10) + 80002e2c: 00850513 addi x10,x10,8 + +0000000080002e30 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + xperm8 x2, x15, x1 # perform operation + 80002e30: 2817c133 xperm8 x2,x15,x1 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e34: 000f3383 ld x7,0(x30) + 80002e38: 00238c63 beq x7,x2,80002e50 + 80002e3c: 6dd0446f jal x8,80007d18 + 80002e40: 80002e30 .word 0x80002e30 + 80002e44: 00000000 .word 0x00000000 + 80002e48: 8001269e .word 0x8001269e + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002e54: 00053783 ld x15,0(x10) + 80002e58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000000000001 + 80002e5c: 00053483 ld x9,0(x10) + 80002e60: 00850513 addi x10,x10,8 + +0000000080002e64 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + xperm8 x5, x15, x9 # perform operation + 80002e64: 2897c2b3 xperm8 x5,x15,x9 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e68: 000f3383 ld x7,0(x30) + 80002e6c: 00538c63 beq x7,x5,80002e84 + 80002e70: 6a90446f jal x8,80007d18 + 80002e74: 80002e64 .word 0x80002e64 + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 80012700 .word 0x80012700 + 80002e80: 00000000 .word 0x00000000 + 80002e84: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002e88: 00053e03 ld x28,0(x10) + 80002e8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000002 + 80002e90: 00053f83 ld x31,0(x10) + 80002e94: 00850513 addi x10,x10,8 + +0000000080002e98 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + xperm8 x27, x28, x31 # perform operation + 80002e98: 29fe4db3 xperm8 x27,x28,x31 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e9c: 000f3383 ld x7,0(x30) + 80002ea0: 01b38c63 beq x7,x27,80002eb8 + 80002ea4: 6750446f jal x8,80007d18 + 80002ea8: 80002e98 .word 0x80002e98 + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 80012762 .word 0x80012762 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002ebc: 00053883 ld x17,0(x10) + 80002ec0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8000000000000000 + 80002ec4: 00053783 ld x15,0(x10) + 80002ec8: 00850513 addi x10,x10,8 + +0000000080002ecc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + xperm8 x5, x17, x15 # perform operation + 80002ecc: 28f8c2b3 xperm8 x5,x17,x15 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed0: 000f3383 ld x7,0(x30) + 80002ed4: 00538c63 beq x7,x5,80002eec + 80002ed8: 6410446f jal x8,80007d18 + 80002edc: 80002ecc .word 0x80002ecc + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 800127c4 .word 0x800127c4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80002ef0: 00053203 ld x4,0(x10) + 80002ef4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x8000000000000001 + 80002ef8: 00053c03 ld x24,0(x10) + 80002efc: 00850513 addi x10,x10,8 + +0000000080002f00 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + xperm8 x31, x4, x24 # perform operation + 80002f00: 29824fb3 xperm8 x31,x4,x24 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f04: 000f3383 ld x7,0(x30) + 80002f08: 01f38c63 beq x7,x31,80002f20 + 80002f0c: 60d0446f jal x8,80007d18 + 80002f10: 80002f00 .word 0x80002f00 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 80012835 .word 0x80012835 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80002f24: 00053203 ld x4,0(x10) + 80002f28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7fffffffffffffff + 80002f2c: 00053f83 ld x31,0(x10) + 80002f30: 00850513 addi x10,x10,8 + +0000000080002f34 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + xperm8 x5, x4, x31 # perform operation + 80002f34: 29f242b3 xperm8 x5,x4,x31 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f38: 000f3383 ld x7,0(x30) + 80002f3c: 00538c63 beq x7,x5,80002f54 + 80002f40: 5d90446f jal x8,80007d18 + 80002f44: 80002f34 .word 0x80002f34 + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 800128a6 .word 0x800128a6 + 80002f50: 00000000 .word 0x00000000 + 80002f54: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002f58: 00053583 ld x11,0(x10) + 80002f5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80002f60: 00053483 ld x9,0(x10) + 80002f64: 00850513 addi x10,x10,8 + +0000000080002f68 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + xperm8 x15, x11, x9 # perform operation + 80002f68: 2895c7b3 xperm8 x15,x11,x9 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f6c: 000f3383 ld x7,0(x30) + 80002f70: 00f38c63 beq x7,x15,80002f88 + 80002f74: 5a50446f jal x8,80007d18 + 80002f78: 80002f68 .word 0x80002f68 + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 80012917 .word 0x80012917 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002f8c: 00053703 ld x14,0(x10) + 80002f90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0xffffffffffffffff + 80002f94: 00053583 ld x11,0(x10) + 80002f98: 00850513 addi x10,x10,8 + +0000000080002f9c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + xperm8 x5, x14, x11 # perform operation + 80002f9c: 28b742b3 xperm8 x5,x14,x11 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa0: 000f3383 ld x7,0(x30) + 80002fa4: 00538c63 beq x7,x5,80002fbc + 80002fa8: 5710446f jal x8,80007d18 + 80002fac: 80002f9c .word 0x80002f9c + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 80012988 .word 0x80012988 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002fc0: 00053303 ld x6,0(x10) + 80002fc4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xfffffffffffffffe + 80002fc8: 00053103 ld x2,0(x10) + 80002fcc: 00850513 addi x10,x10,8 + +0000000080002fd0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + xperm8 x5, x6, x2 # perform operation + 80002fd0: 282342b3 xperm8 x5,x6,x2 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd4: 000f3383 ld x7,0(x30) + 80002fd8: 00538c63 beq x7,x5,80002ff0 + 80002fdc: 53d0446f jal x8,80007d18 + 80002fe0: 80002fd0 .word 0x80002fd0 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 800129f9 .word 0x800129f9 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002ff4: 00053e03 ld x28,0(x10) + 80002ff8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80002ffc: 00053103 ld x2,0(x10) + 80003000: 00850513 addi x10,x10,8 + +0000000080003004 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xperm8 x29, x28, x2 # perform operation + 80003004: 282e4eb3 xperm8 x29,x28,x2 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003008: 000f3383 ld x7,0(x30) + 8000300c: 01d38c63 beq x7,x29,80003024 + 80003010: 5090446f jal x8,80007d18 + 80003014: 80003004 .word 0x80003004 + 80003018: 00000000 .word 0x00000000 + 8000301c: 80012a6a .word 0x80012a6a + 80003020: 00000000 .word 0x00000000 + 80003024: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80003028: 00053683 ld x13,0(x10) + 8000302c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80003030: 00053783 ld x15,0(x10) + 80003034: 00850513 addi x10,x10,8 + +0000000080003038 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x18, x13, x15 # perform operation + 80003038: 28f6c933 xperm8 x18,x13,x15 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000303c: 000f3383 ld x7,0(x30) + 80003040: 01238c63 beq x7,x18,80003058 + 80003044: 4d50446f jal x8,80007d18 + 80003048: 80003038 .word 0x80003038 + 8000304c: 00000000 .word 0x00000000 + 80003050: 80012adb .word 0x80012adb + 80003054: 00000000 .word 0x00000000 + 80003058: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7ffffffffffffffe + 8000305c: 00053d03 ld x26,0(x10) + 80003060: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x5555555555555555 + 80003064: 00053e03 ld x28,0(x10) + 80003068: 00850513 addi x10,x10,8 + +000000008000306c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + xperm8 x13, x26, x28 # perform operation + 8000306c: 29cd46b3 xperm8 x13,x26,x28 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003070: 000f3383 ld x7,0(x30) + 80003074: 00d38c63 beq x7,x13,8000308c + 80003078: 4a10446f jal x8,80007d18 + 8000307c: 8000306c .word 0x8000306c + 80003080: 00000000 .word 0x00000000 + 80003084: 80012b4c .word 0x80012b4c + 80003088: 00000000 .word 0x00000000 + 8000308c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003090: 00053703 ld x14,0(x10) + 80003094: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000ffffffff + 80003098: 00053e83 ld x29,0(x10) + 8000309c: 00850513 addi x10,x10,8 + +00000000800030a0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + xperm8 x31, x14, x29 # perform operation + 800030a0: 29d74fb3 xperm8 x31,x14,x29 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a4: 000f3383 ld x7,0(x30) + 800030a8: 01f38c63 beq x7,x31,800030c0 + 800030ac: 46d0446f jal x8,80007d18 + 800030b0: 800030a0 .word 0x800030a0 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 80012bbd .word 0x80012bbd + 800030bc: 00000000 .word 0x00000000 + 800030c0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7ffffffffffffffe + 800030c4: 00053c83 ld x25,0(x10) + 800030c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 800030cc: 00053a83 ld x21,0(x10) + 800030d0: 00850513 addi x10,x10,8 + +00000000800030d4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + xperm8 x12, x25, x21 # perform operation + 800030d4: 295cc633 xperm8 x12,x25,x21 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d8: 000f3383 ld x7,0(x30) + 800030dc: 00c38c63 beq x7,x12,800030f4 + 800030e0: 4390446f jal x8,80007d18 + 800030e4: 800030d4 .word 0x800030d4 + 800030e8: 00000000 .word 0x00000000 + 800030ec: 80012c26 .word 0x80012c26 + 800030f0: 00000000 .word 0x00000000 + 800030f4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7ffffffffffffffe + 800030f8: 00053b83 ld x23,0(x10) + 800030fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000000 + 80003100: 00053a83 ld x21,0(x10) + 80003104: 00850513 addi x10,x10,8 + +0000000080003108 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + xperm8 x29, x23, x21 # perform operation + 80003108: 295bceb3 xperm8 x29,x23,x21 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 8000310c: 000f3383 ld x7,0(x30) + 80003110: 01d38c63 beq x7,x29,80003128 + 80003114: 4050446f jal x8,80007d18 + 80003118: 80003108 .word 0x80003108 + 8000311c: 00000000 .word 0x00000000 + 80003120: 80012c8f .word 0x80012c8f + 80003124: 00000000 .word 0x00000000 + 80003128: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7ffffffffffffffe + 8000312c: 00053a83 ld x21,0(x10) + 80003130: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000001 + 80003134: 00053303 ld x6,0(x10) + 80003138: 00850513 addi x10,x10,8 + +000000008000313c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + xperm8 x3, x21, x6 # perform operation + 8000313c: 286ac1b3 xperm8 x3,x21,x6 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003140: 000f3383 ld x7,0(x30) + 80003144: 00338c63 beq x7,x3,8000315c + 80003148: 3d10446f jal x8,80007d18 + 8000314c: 8000313c .word 0x8000313c + 80003150: 00000000 .word 0x00000000 + 80003154: 80012cf9 .word 0x80012cf9 + 80003158: 00000000 .word 0x00000000 + 8000315c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xffffffffffffffff + 80003160: 00053983 ld x19,0(x10) + 80003164: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000000 + 80003168: 00053783 ld x15,0(x10) + 8000316c: 00850513 addi x10,x10,8 + +0000000080003170 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + xperm8 x13, x19, x15 # perform operation + 80003170: 28f9c6b3 xperm8 x13,x19,x15 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003174: 000f3383 ld x7,0(x30) + 80003178: 00d38c63 beq x7,x13,80003190 + 8000317c: 39d0446f jal x8,80007d18 + 80003180: 80003170 .word 0x80003170 + 80003184: 00000000 .word 0x00000000 + 80003188: 80012d63 .word 0x80012d63 + 8000318c: 00000000 .word 0x00000000 + 80003190: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xffffffffffffffff + 80003194: 00053c83 ld x25,0(x10) + 80003198: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000001 + 8000319c: 00053203 ld x4,0(x10) + 800031a0: 00850513 addi x10,x10,8 + +00000000800031a4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + xperm8 x5, x25, x4 # perform operation + 800031a4: 284cc2b3 xperm8 x5,x25,x4 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a8: 000f3383 ld x7,0(x30) + 800031ac: 00538c63 beq x7,x5,800031c4 + 800031b0: 3690446f jal x8,80007d18 + 800031b4: 800031a4 .word 0x800031a4 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 80012dc5 .word 0x80012dc5 + 800031c0: 00000000 .word 0x00000000 + 800031c4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffffffffffff + 800031c8: 00053b83 ld x23,0(x10) + 800031cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 800031d0: 00053903 ld x18,0(x10) + 800031d4: 00850513 addi x10,x10,8 + +00000000800031d8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + xperm8 x4, x23, x18 # perform operation + 800031d8: 292bc233 xperm8 x4,x23,x18 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031dc: 000f3383 ld x7,0(x30) + 800031e0: 00438c63 beq x7,x4,800031f8 + 800031e4: 3350446f jal x8,80007d18 + 800031e8: 800031d8 .word 0x800031d8 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 80012e27 .word 0x80012e27 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xffffffffffffffff + 800031fc: 00053083 ld x1,0(x10) + 80003200: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000000 + 80003204: 00053d03 ld x26,0(x10) + 80003208: 00850513 addi x10,x10,8 + +000000008000320c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + xperm8 x31, x1, x26 # perform operation + 8000320c: 29a0cfb3 xperm8 x31,x1,x26 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003210: 000f3383 ld x7,0(x30) + 80003214: 01f38c63 beq x7,x31,8000322c + 80003218: 3010446f jal x8,80007d18 + 8000321c: 8000320c .word 0x8000320c + 80003220: 00000000 .word 0x00000000 + 80003224: 80012e89 .word 0x80012e89 + 80003228: 00000000 .word 0x00000000 + 8000322c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xffffffffffffffff + 80003230: 00053a03 ld x20,0(x10) + 80003234: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80003238: 00053303 ld x6,0(x10) + 8000323c: 00850513 addi x10,x10,8 + +0000000080003240 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + xperm8 x4, x20, x6 # perform operation + 80003240: 286a4233 xperm8 x4,x20,x6 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003244: 000f3383 ld x7,0(x30) + 80003248: 00438c63 beq x7,x4,80003260 + 8000324c: 2cd0446f jal x8,80007d18 + 80003250: 80003240 .word 0x80003240 + 80003254: 00000000 .word 0x00000000 + 80003258: 80012efa .word 0x80012efa + 8000325c: 00000000 .word 0x00000000 + 80003260: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xffffffffffffffff + 80003264: 00053b83 ld x23,0(x10) + 80003268: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7fffffffffffffff + 8000326c: 00053a03 ld x20,0(x10) + 80003270: 00850513 addi x10,x10,8 + +0000000080003274 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + xperm8 x31, x23, x20 # perform operation + 80003274: 294bcfb3 xperm8 x31,x23,x20 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003278: 000f3383 ld x7,0(x30) + 8000327c: 01f38c63 beq x7,x31,80003294 + 80003280: 2990446f jal x8,80007d18 + 80003284: 80003274 .word 0x80003274 + 80003288: 00000000 .word 0x00000000 + 8000328c: 80012f6b .word 0x80012f6b + 80003290: 00000000 .word 0x00000000 + 80003294: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xffffffffffffffff + 80003298: 00053683 ld x13,0(x10) + 8000329c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x7ffffffffffffffe + 800032a0: 00053603 ld x12,0(x10) + 800032a4: 00850513 addi x10,x10,8 + +00000000800032a8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + xperm8 x3, x13, x12 # perform operation + 800032a8: 28c6c1b3 xperm8 x3,x13,x12 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032ac: 000f3383 ld x7,0(x30) + 800032b0: 00338c63 beq x7,x3,800032c8 + 800032b4: 2650446f jal x8,80007d18 + 800032b8: 800032a8 .word 0x800032a8 + 800032bc: 00000000 .word 0x00000000 + 800032c0: 80012fdc .word 0x80012fdc + 800032c4: 00000000 .word 0x00000000 + 800032c8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffffffffffff + 800032cc: 00053e83 ld x29,0(x10) + 800032d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xffffffffffffffff + 800032d4: 00053883 ld x17,0(x10) + 800032d8: 00850513 addi x10,x10,8 + +00000000800032dc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + xperm8 x24, x29, x17 # perform operation + 800032dc: 291ecc33 xperm8 x24,x29,x17 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e0: 000f3383 ld x7,0(x30) + 800032e4: 01838c63 beq x7,x24,800032fc + 800032e8: 2310446f jal x8,80007d18 + 800032ec: 800032dc .word 0x800032dc + 800032f0: 00000000 .word 0x00000000 + 800032f4: 8001304d .word 0x8001304d + 800032f8: 00000000 .word 0x00000000 + 800032fc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xffffffffffffffff + 80003300: 00053e83 ld x29,0(x10) + 80003304: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xfffffffffffffffe + 80003308: 00053783 ld x15,0(x10) + 8000330c: 00850513 addi x10,x10,8 + +0000000080003310 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + xperm8 x19, x29, x15 # perform operation + 80003310: 28fec9b3 xperm8 x19,x29,x15 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003314: 000f3383 ld x7,0(x30) + 80003318: 01338c63 beq x7,x19,80003330 + 8000331c: 1fd0446f jal x8,80007d18 + 80003320: 80003310 .word 0x80003310 + 80003324: 00000000 .word 0x00000000 + 80003328: 800130be .word 0x800130be + 8000332c: 00000000 .word 0x00000000 + 80003330: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffffffffffff + 80003334: 00053703 ld x14,0(x10) + 80003338: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 8000333c: 00053903 ld x18,0(x10) + 80003340: 00850513 addi x10,x10,8 + +0000000080003344 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + xperm8 x13, x14, x18 # perform operation + 80003344: 292746b3 xperm8 x13,x14,x18 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003348: 000f3383 ld x7,0(x30) + 8000334c: 00d38c63 beq x7,x13,80003364 + 80003350: 1c90446f jal x8,80007d18 + 80003354: 80003344 .word 0x80003344 + 80003358: 00000000 .word 0x00000000 + 8000335c: 8001312f .word 0x8001312f + 80003360: 00000000 .word 0x00000000 + 80003364: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xffffffffffffffff + 80003368: 00053603 ld x12,0(x10) + 8000336c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80003370: 00053a83 ld x21,0(x10) + 80003374: 00850513 addi x10,x10,8 + +0000000080003378 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x20, x12, x21 # perform operation + 80003378: 29564a33 xperm8 x20,x12,x21 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000337c: 000f3383 ld x7,0(x30) + 80003380: 01438c63 beq x7,x20,80003398 + 80003384: 1950446f jal x8,80007d18 + 80003388: 80003378 .word 0x80003378 + 8000338c: 00000000 .word 0x00000000 + 80003390: 800131a0 .word 0x800131a0 + 80003394: 00000000 .word 0x00000000 + 80003398: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xffffffffffffffff + 8000339c: 00053283 ld x5,0(x10) + 800033a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5555555555555555 + 800033a4: 00053703 ld x14,0(x10) + 800033a8: 00850513 addi x10,x10,8 + +00000000800033ac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + xperm8 x6, x5, x14 # perform operation + 800033ac: 28e2c333 xperm8 x6,x5,x14 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b0: 000f3383 ld x7,0(x30) + 800033b4: 00638c63 beq x7,x6,800033cc + 800033b8: 1610446f jal x8,80007d18 + 800033bc: 800033ac .word 0x800033ac + 800033c0: 00000000 .word 0x00000000 + 800033c4: 80013211 .word 0x80013211 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xffffffffffffffff + 800033d0: 00053183 ld x3,0(x10) + 800033d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000ffffffff + 800033d8: 00053483 ld x9,0(x10) + 800033dc: 00850513 addi x10,x10,8 + +00000000800033e0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + xperm8 x18, x3, x9 # perform operation + 800033e0: 2891c933 xperm8 x18,x3,x9 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e4: 000f3383 ld x7,0(x30) + 800033e8: 01238c63 beq x7,x18,80003400 + 800033ec: 12d0446f jal x8,80007d18 + 800033f0: 800033e0 .word 0x800033e0 + 800033f4: 00000000 .word 0x00000000 + 800033f8: 80013282 .word 0x80013282 + 800033fc: 00000000 .word 0x00000000 + 80003400: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffffffffffff + 80003404: 00053703 ld x14,0(x10) + 80003408: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000fffffffe + 8000340c: 00053a83 ld x21,0(x10) + 80003410: 00850513 addi x10,x10,8 + +0000000080003414 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + xperm8 x9, x14, x21 # perform operation + 80003414: 295744b3 xperm8 x9,x14,x21 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003418: 000f3383 ld x7,0(x30) + 8000341c: 00938c63 beq x7,x9,80003434 + 80003420: 0f90446f jal x8,80007d18 + 80003424: 80003414 .word 0x80003414 + 80003428: 00000000 .word 0x00000000 + 8000342c: 800132eb .word 0x800132eb + 80003430: 00000000 .word 0x00000000 + 80003434: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xffffffffffffffff + 80003438: 00053883 ld x17,0(x10) + 8000343c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000000 + 80003440: 00053783 ld x15,0(x10) + 80003444: 00850513 addi x10,x10,8 + +0000000080003448 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + xperm8 x25, x17, x15 # perform operation + 80003448: 28f8ccb3 xperm8 x25,x17,x15 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 8000344c: 000f3383 ld x7,0(x30) + 80003450: 01938c63 beq x7,x25,80003468 + 80003454: 0c50446f jal x8,80007d18 + 80003458: 80003448 .word 0x80003448 + 8000345c: 00000000 .word 0x00000000 + 80003460: 80013354 .word 0x80013354 + 80003464: 00000000 .word 0x00000000 + 80003468: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffffffffffff + 8000346c: 00053703 ld x14,0(x10) + 80003470: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000001 + 80003474: 00053c83 ld x25,0(x10) + 80003478: 00850513 addi x10,x10,8 + +000000008000347c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + xperm8 x11, x14, x25 # perform operation + 8000347c: 299745b3 xperm8 x11,x14,x25 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003480: 000f3383 ld x7,0(x30) + 80003484: 00b38c63 beq x7,x11,8000349c + 80003488: 0910446f jal x8,80007d18 + 8000348c: 8000347c .word 0x8000347c + 80003490: 00000000 .word 0x00000000 + 80003494: 800133be .word 0x800133be + 80003498: 00000000 .word 0x00000000 + 8000349c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffffffffffe + 800034a0: 00053883 ld x17,0(x10) + 800034a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000000 + 800034a8: 00053183 ld x3,0(x10) + 800034ac: 00850513 addi x10,x10,8 + +00000000800034b0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + xperm8 x14, x17, x3 # perform operation + 800034b0: 2838c733 xperm8 x14,x17,x3 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b4: 000f3383 ld x7,0(x30) + 800034b8: 00e38c63 beq x7,x14,800034d0 + 800034bc: 05d0446f jal x8,80007d18 + 800034c0: 800034b0 .word 0x800034b0 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 80013428 .word 0x80013428 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800034d4: 00053c03 ld x24,0(x10) + 800034d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000000000001 + 800034dc: 00053c83 ld x25,0(x10) + 800034e0: 00850513 addi x10,x10,8 + +00000000800034e4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + xperm8 x14, x24, x25 # perform operation + 800034e4: 299c4733 xperm8 x14,x24,x25 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e8: 000f3383 ld x7,0(x30) + 800034ec: 00e38c63 beq x7,x14,80003504 + 800034f0: 0290446f jal x8,80007d18 + 800034f4: 800034e4 .word 0x800034e4 + 800034f8: 00000000 .word 0x00000000 + 800034fc: 8001348a .word 0x8001348a + 80003500: 00000000 .word 0x00000000 + 80003504: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfffffffffffffffe + 80003508: 00053803 ld x16,0(x10) + 8000350c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000002 + 80003510: 00053303 ld x6,0(x10) + 80003514: 00850513 addi x10,x10,8 + +0000000080003518 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + xperm8 x23, x16, x6 # perform operation + 80003518: 28684bb3 xperm8 x23,x16,x6 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 8000351c: 000f3383 ld x7,0(x30) + 80003520: 01738c63 beq x7,x23,80003538 + 80003524: 7f40446f jal x8,80007d18 + 80003528: 80003518 .word 0x80003518 + 8000352c: 00000000 .word 0x00000000 + 80003530: 800134ec .word 0x800134ec + 80003534: 00000000 .word 0x00000000 + 80003538: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xfffffffffffffffe + 8000353c: 00053283 ld x5,0(x10) + 80003540: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000000 + 80003544: 00053b03 ld x22,0(x10) + 80003548: 00850513 addi x10,x10,8 + +000000008000354c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + xperm8 x25, x5, x22 # perform operation + 8000354c: 2962ccb3 xperm8 x25,x5,x22 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003550: 000f3383 ld x7,0(x30) + 80003554: 01938c63 beq x7,x25,8000356c + 80003558: 7c00446f jal x8,80007d18 + 8000355c: 8000354c .word 0x8000354c + 80003560: 00000000 .word 0x00000000 + 80003564: 8001354e .word 0x8001354e + 80003568: 00000000 .word 0x00000000 + 8000356c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xfffffffffffffffe + 80003570: 00053803 ld x16,0(x10) + 80003574: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000001 + 80003578: 00053d03 ld x26,0(x10) + 8000357c: 00850513 addi x10,x10,8 + +0000000080003580 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + xperm8 x23, x16, x26 # perform operation + 80003580: 29a84bb3 xperm8 x23,x16,x26 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003584: 000f3383 ld x7,0(x30) + 80003588: 01738c63 beq x7,x23,800035a0 + 8000358c: 78c0446f jal x8,80007d18 + 80003590: 80003580 .word 0x80003580 + 80003594: 00000000 .word 0x00000000 + 80003598: 800135bf .word 0x800135bf + 8000359c: 00000000 .word 0x00000000 + 800035a0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xfffffffffffffffe + 800035a4: 00053a03 ld x20,0(x10) + 800035a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x7fffffffffffffff + 800035ac: 00053603 ld x12,0(x10) + 800035b0: 00850513 addi x10,x10,8 + +00000000800035b4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + xperm8 x9, x20, x12 # perform operation + 800035b4: 28ca44b3 xperm8 x9,x20,x12 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b8: 000f3383 ld x7,0(x30) + 800035bc: 00938c63 beq x7,x9,800035d4 + 800035c0: 7580446f jal x8,80007d18 + 800035c4: 800035b4 .word 0x800035b4 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 80013630 .word 0x80013630 + 800035d0: 00000000 .word 0x00000000 + 800035d4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xfffffffffffffffe + 800035d8: 00053d83 ld x27,0(x10) + 800035dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7ffffffffffffffe + 800035e0: 00053583 ld x11,0(x10) + 800035e4: 00850513 addi x10,x10,8 + +00000000800035e8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + xperm8 x19, x27, x11 # perform operation + 800035e8: 28bdc9b3 xperm8 x19,x27,x11 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035ec: 000f3383 ld x7,0(x30) + 800035f0: 01338c63 beq x7,x19,80003608 + 800035f4: 7240446f jal x8,80007d18 + 800035f8: 800035e8 .word 0x800035e8 + 800035fc: 00000000 .word 0x00000000 + 80003600: 800136a1 .word 0x800136a1 + 80003604: 00000000 .word 0x00000000 + 80003608: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xfffffffffffffffe + 8000360c: 00053183 ld x3,0(x10) + 80003610: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xffffffffffffffff + 80003614: 00053c83 ld x25,0(x10) + 80003618: 00850513 addi x10,x10,8 + +000000008000361c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + xperm8 x4, x3, x25 # perform operation + 8000361c: 2991c233 xperm8 x4,x3,x25 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003620: 000f3383 ld x7,0(x30) + 80003624: 00438c63 beq x7,x4,8000363c + 80003628: 6f00446f jal x8,80007d18 + 8000362c: 8000361c .word 0x8000361c + 80003630: 00000000 .word 0x00000000 + 80003634: 80013712 .word 0x80013712 + 80003638: 00000000 .word 0x00000000 + 8000363c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xfffffffffffffffe + 80003640: 00053f83 ld x31,0(x10) + 80003644: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xfffffffffffffffe + 80003648: 00053103 ld x2,0(x10) + 8000364c: 00850513 addi x10,x10,8 + +0000000080003650 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + xperm8 x4, x31, x2 # perform operation + 80003650: 282fc233 xperm8 x4,x31,x2 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003654: 000f3383 ld x7,0(x30) + 80003658: 00438c63 beq x7,x4,80003670 + 8000365c: 6bc0446f jal x8,80007d18 + 80003660: 80003650 .word 0x80003650 + 80003664: 00000000 .word 0x00000000 + 80003668: 80013783 .word 0x80013783 + 8000366c: 00000000 .word 0x00000000 + 80003670: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffffffffffe + 80003674: 00053883 ld x17,0(x10) + 80003678: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 8000367c: 00053c03 ld x24,0(x10) + 80003680: 00850513 addi x10,x10,8 + +0000000080003684 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + xperm8 x19, x17, x24 # perform operation + 80003684: 2988c9b3 xperm8 x19,x17,x24 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003688: 000f3383 ld x7,0(x30) + 8000368c: 01338c63 beq x7,x19,800036a4 + 80003690: 6880446f jal x8,80007d18 + 80003694: 80003684 .word 0x80003684 + 80003698: 00000000 .word 0x00000000 + 8000369c: 800137f4 .word 0x800137f4 + 800036a0: 00000000 .word 0x00000000 + 800036a4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfffffffffffffffe + 800036a8: 00053a83 ld x21,0(x10) + 800036ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 800036b0: 00053303 ld x6,0(x10) + 800036b4: 00850513 addi x10,x10,8 + +00000000800036b8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x15, x21, x6 # perform operation + 800036b8: 286ac7b3 xperm8 x15,x21,x6 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036bc: 000f3383 ld x7,0(x30) + 800036c0: 00f38c63 beq x7,x15,800036d8 + 800036c4: 6540446f jal x8,80007d18 + 800036c8: 800036b8 .word 0x800036b8 + 800036cc: 00000000 .word 0x00000000 + 800036d0: 80013865 .word 0x80013865 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xfffffffffffffffe + 800036dc: 00053f83 ld x31,0(x10) + 800036e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x5555555555555555 + 800036e4: 00053203 ld x4,0(x10) + 800036e8: 00850513 addi x10,x10,8 + +00000000800036ec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + xperm8 x11, x31, x4 # perform operation + 800036ec: 284fc5b3 xperm8 x11,x31,x4 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f0: 000f3383 ld x7,0(x30) + 800036f4: 00b38c63 beq x7,x11,8000370c + 800036f8: 6200446f jal x8,80007d18 + 800036fc: 800036ec .word 0x800036ec + 80003700: 00000000 .word 0x00000000 + 80003704: 800138d6 .word 0x800138d6 + 80003708: 00000000 .word 0x00000000 + 8000370c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xfffffffffffffffe + 80003710: 00053183 ld x3,0(x10) + 80003714: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000000ffffffff + 80003718: 00053603 ld x12,0(x10) + 8000371c: 00850513 addi x10,x10,8 + +0000000080003720 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + xperm8 x22, x3, x12 # perform operation + 80003720: 28c1cb33 xperm8 x22,x3,x12 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003724: 000f3383 ld x7,0(x30) + 80003728: 01638c63 beq x7,x22,80003740 + 8000372c: 5ec0446f jal x8,80007d18 + 80003730: 80003720 .word 0x80003720 + 80003734: 00000000 .word 0x00000000 + 80003738: 80013947 .word 0x80013947 + 8000373c: 00000000 .word 0x00000000 + 80003740: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xfffffffffffffffe + 80003744: 00053e03 ld x28,0(x10) + 80003748: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000fffffffe + 8000374c: 00053c83 ld x25,0(x10) + 80003750: 00850513 addi x10,x10,8 + +0000000080003754 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + xperm8 x3, x28, x25 # perform operation + 80003754: 299e41b3 xperm8 x3,x28,x25 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003758: 000f3383 ld x7,0(x30) + 8000375c: 00338c63 beq x7,x3,80003774 + 80003760: 5b80446f jal x8,80007d18 + 80003764: 80003754 .word 0x80003754 + 80003768: 00000000 .word 0x00000000 + 8000376c: 800139b0 .word 0x800139b0 + 80003770: 00000000 .word 0x00000000 + 80003774: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xfffffffffffffffe + 80003778: 00053603 ld x12,0(x10) + 8000377c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000000 + 80003780: 00053b03 ld x22,0(x10) + 80003784: 00850513 addi x10,x10,8 + +0000000080003788 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + xperm8 x16, x12, x22 # perform operation + 80003788: 29664833 xperm8 x16,x12,x22 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 8000378c: 000f3383 ld x7,0(x30) + 80003790: 01038c63 beq x7,x16,800037a8 + 80003794: 5840446f jal x8,80007d18 + 80003798: 80003788 .word 0x80003788 + 8000379c: 00000000 .word 0x00000000 + 800037a0: 80013a19 .word 0x80013a19 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xfffffffffffffffe + 800037ac: 00053883 ld x17,0(x10) + 800037b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000100000001 + 800037b4: 00053f83 ld x31,0(x10) + 800037b8: 00850513 addi x10,x10,8 + +00000000800037bc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + xperm8 x21, x17, x31 # perform operation + 800037bc: 29f8cab3 xperm8 x21,x17,x31 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c0: 000f3383 ld x7,0(x30) + 800037c4: 01538c63 beq x7,x21,800037dc + 800037c8: 5500446f jal x8,80007d18 + 800037cc: 800037bc .word 0x800037bc + 800037d0: 00000000 .word 0x00000000 + 800037d4: 80013a83 .word 0x80013a83 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800037e0: 00053683 ld x13,0(x10) + 800037e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000000000000 + 800037e8: 00053483 ld x9,0(x10) + 800037ec: 00850513 addi x10,x10,8 + +00000000800037f0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + xperm8 x17, x13, x9 # perform operation + 800037f0: 2896c8b3 xperm8 x17,x13,x9 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f4: 000f3383 ld x7,0(x30) + 800037f8: 01138c63 beq x7,x17,80003810 + 800037fc: 51c0446f jal x8,80007d18 + 80003800: 800037f0 .word 0x800037f0 + 80003804: 00000000 .word 0x00000000 + 80003808: 80013aed .word 0x80013aed + 8000380c: 00000000 .word 0x00000000 + 80003810: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003814: 00053583 ld x11,0(x10) + 80003818: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x0000000000000001 + 8000381c: 00053283 ld x5,0(x10) + 80003820: 00850513 addi x10,x10,8 + +0000000080003824 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + xperm8 x29, x11, x5 # perform operation + 80003824: 2855ceb3 xperm8 x29,x11,x5 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003828: 000f3383 ld x7,0(x30) + 8000382c: 01d38c63 beq x7,x29,80003844 + 80003830: 4e80446f jal x8,80007d18 + 80003834: 80003824 .word 0x80003824 + 80003838: 00000000 .word 0x00000000 + 8000383c: 80013b4f .word 0x80013b4f + 80003840: 00000000 .word 0x00000000 + 80003844: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x5bbc887763ae86f2 + 80003848: 00053283 ld x5,0(x10) + 8000384c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000002 + 80003850: 00053783 ld x15,0(x10) + 80003854: 00850513 addi x10,x10,8 + +0000000080003858 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + xperm8 x24, x5, x15 # perform operation + 80003858: 28f2cc33 xperm8 x24,x5,x15 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 8000385c: 000f3383 ld x7,0(x30) + 80003860: 01838c63 beq x7,x24,80003878 + 80003864: 4b40446f jal x8,80007d18 + 80003868: 80003858 .word 0x80003858 + 8000386c: 00000000 .word 0x00000000 + 80003870: 80013bb1 .word 0x80013bb1 + 80003874: 00000000 .word 0x00000000 + 80003878: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 8000387c: 00053803 ld x16,0(x10) + 80003880: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x8000000000000000 + 80003884: 00053e03 ld x28,0(x10) + 80003888: 00850513 addi x10,x10,8 + +000000008000388c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + xperm8 x15, x16, x28 # perform operation + 8000388c: 29c847b3 xperm8 x15,x16,x28 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003890: 000f3383 ld x7,0(x30) + 80003894: 00f38c63 beq x7,x15,800038ac + 80003898: 4800446f jal x8,80007d18 + 8000389c: 8000388c .word 0x8000388c + 800038a0: 00000000 .word 0x00000000 + 800038a4: 80013c13 .word 0x80013c13 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 800038b0: 00053d83 ld x27,0(x10) + 800038b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x8000000000000001 + 800038b8: 00053e83 ld x29,0(x10) + 800038bc: 00850513 addi x10,x10,8 + +00000000800038c0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + xperm8 x3, x27, x29 # perform operation + 800038c0: 29ddc1b3 xperm8 x3,x27,x29 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c4: 000f3383 ld x7,0(x30) + 800038c8: 00338c63 beq x7,x3,800038e0 + 800038cc: 44c0446f jal x8,80007d18 + 800038d0: 800038c0 .word 0x800038c0 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 80013c84 .word 0x80013c84 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 800038e4: 00053183 ld x3,0(x10) + 800038e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x7fffffffffffffff + 800038ec: 00053b03 ld x22,0(x10) + 800038f0: 00850513 addi x10,x10,8 + +00000000800038f4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + xperm8 x4, x3, x22 # perform operation + 800038f4: 2961c233 xperm8 x4,x3,x22 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f8: 000f3383 ld x7,0(x30) + 800038fc: 00438c63 beq x7,x4,80003914 + 80003900: 4180446f jal x8,80007d18 + 80003904: 800038f4 .word 0x800038f4 + 80003908: 00000000 .word 0x00000000 + 8000390c: 80013cf5 .word 0x80013cf5 + 80003910: 00000000 .word 0x00000000 + 80003914: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80003918: 00053483 ld x9,0(x10) + 8000391c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7ffffffffffffffe + 80003920: 00053d83 ld x27,0(x10) + 80003924: 00850513 addi x10,x10,8 + +0000000080003928 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + xperm8 x28, x9, x27 # perform operation + 80003928: 29b4ce33 xperm8 x28,x9,x27 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 8000392c: 000f3383 ld x7,0(x30) + 80003930: 01c38c63 beq x7,x28,80003948 + 80003934: 3e40446f jal x8,80007d18 + 80003938: 80003928 .word 0x80003928 + 8000393c: 00000000 .word 0x00000000 + 80003940: 80013d66 .word 0x80013d66 + 80003944: 00000000 .word 0x00000000 + 80003948: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 8000394c: 00053a83 ld x21,0(x10) + 80003950: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffffffffffff + 80003954: 00053b83 ld x23,0(x10) + 80003958: 00850513 addi x10,x10,8 + +000000008000395c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + xperm8 x1, x21, x23 # perform operation + 8000395c: 297ac0b3 xperm8 x1,x21,x23 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003960: 000f3383 ld x7,0(x30) + 80003964: 00138c63 beq x7,x1,8000397c + 80003968: 3b00446f jal x8,80007d18 + 8000396c: 8000395c .word 0x8000395c + 80003970: 00000000 .word 0x00000000 + 80003974: 80013dd7 .word 0x80013dd7 + 80003978: 00000000 .word 0x00000000 + 8000397c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003980: 00053983 ld x19,0(x10) + 80003984: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xfffffffffffffffe + 80003988: 00053783 ld x15,0(x10) + 8000398c: 00850513 addi x10,x10,8 + +0000000080003990 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + xperm8 x27, x19, x15 # perform operation + 80003990: 28f9cdb3 xperm8 x27,x19,x15 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003994: 000f3383 ld x7,0(x30) + 80003998: 01b38c63 beq x7,x27,800039b0 + 8000399c: 37c0446f jal x8,80007d18 + 800039a0: 80003990 .word 0x80003990 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 80013e48 .word 0x80013e48 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800039b4: 00053983 ld x19,0(x10) + 800039b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 800039bc: 00053b83 ld x23,0(x10) + 800039c0: 00850513 addi x10,x10,8 + +00000000800039c4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + xperm8 x24, x19, x23 # perform operation + 800039c4: 2979cc33 xperm8 x24,x19,x23 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c8: 000f3383 ld x7,0(x30) + 800039cc: 01838c63 beq x7,x24,800039e4 + 800039d0: 3480446f jal x8,80007d18 + 800039d4: 800039c4 .word 0x800039c4 + 800039d8: 00000000 .word 0x00000000 + 800039dc: 80013eb9 .word 0x80013eb9 + 800039e0: 00000000 .word 0x00000000 + 800039e4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 800039e8: 00053683 ld x13,0(x10) + 800039ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 800039f0: 00053703 ld x14,0(x10) + 800039f4: 00850513 addi x10,x10,8 + +00000000800039f8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x28, x13, x14 # perform operation + 800039f8: 28e6ce33 xperm8 x28,x13,x14 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039fc: 000f3383 ld x7,0(x30) + 80003a00: 01c38c63 beq x7,x28,80003a18 + 80003a04: 3140446f jal x8,80007d18 + 80003a08: 800039f8 .word 0x800039f8 + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 80013f2a .word 0x80013f2a + 80003a14: 00000000 .word 0x00000000 + 80003a18: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003a1c: 00053f83 ld x31,0(x10) + 80003a20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x5555555555555555 + 80003a24: 00053a03 ld x20,0(x10) + 80003a28: 00850513 addi x10,x10,8 + +0000000080003a2c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + xperm8 x26, x31, x20 # perform operation + 80003a2c: 294fcd33 xperm8 x26,x31,x20 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a30: 000f3383 ld x7,0(x30) + 80003a34: 01a38c63 beq x7,x26,80003a4c + 80003a38: 2e00446f jal x8,80007d18 + 80003a3c: 80003a2c .word 0x80003a2c + 80003a40: 00000000 .word 0x00000000 + 80003a44: 80013f9b .word 0x80013f9b + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x5bbc887763ae86f2 + 80003a50: 00053283 ld x5,0(x10) + 80003a54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x00000000ffffffff + 80003a58: 00053703 ld x14,0(x10) + 80003a5c: 00850513 addi x10,x10,8 + +0000000080003a60 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + xperm8 x12, x5, x14 # perform operation + 80003a60: 28e2c633 xperm8 x12,x5,x14 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a64: 000f3383 ld x7,0(x30) + 80003a68: 00c38c63 beq x7,x12,80003a80 + 80003a6c: 2ac0446f jal x8,80007d18 + 80003a70: 80003a60 .word 0x80003a60 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 8001400c .word 0x8001400c + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003a84: 00053b03 ld x22,0(x10) + 80003a88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000000fffffffe + 80003a8c: 00053303 ld x6,0(x10) + 80003a90: 00850513 addi x10,x10,8 + +0000000080003a94 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + xperm8 x9, x22, x6 # perform operation + 80003a94: 286b44b3 xperm8 x9,x22,x6 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a98: 000f3383 ld x7,0(x30) + 80003a9c: 00938c63 beq x7,x9,80003ab4 + 80003aa0: 2780446f jal x8,80007d18 + 80003aa4: 80003a94 .word 0x80003a94 + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 80014075 .word 0x80014075 + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003ab8: 00053103 ld x2,0(x10) + 80003abc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000100000000 + 80003ac0: 00053983 ld x19,0(x10) + 80003ac4: 00850513 addi x10,x10,8 + +0000000080003ac8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + xperm8 x12, x2, x19 # perform operation + 80003ac8: 29314633 xperm8 x12,x2,x19 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003acc: 000f3383 ld x7,0(x30) + 80003ad0: 00c38c63 beq x7,x12,80003ae8 + 80003ad4: 2440446f jal x8,80007d18 + 80003ad8: 80003ac8 .word 0x80003ac8 + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 800140de .word 0x800140de + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003aec: 00053b83 ld x23,0(x10) + 80003af0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80003af4: 00053a83 ld x21,0(x10) + 80003af8: 00850513 addi x10,x10,8 + +0000000080003afc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + xperm8 x29, x23, x21 # perform operation + 80003afc: 295bceb3 xperm8 x29,x23,x21 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b00: 000f3383 ld x7,0(x30) + 80003b04: 01d38c63 beq x7,x29,80003b1c + 80003b08: 2100446f jal x8,80007d18 + 80003b0c: 80003afc .word 0x80003afc + 80003b10: 00000000 .word 0x00000000 + 80003b14: 80014148 .word 0x80014148 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003b20: 00053903 ld x18,0(x10) + 80003b24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000000 + 80003b28: 00053203 ld x4,0(x10) + 80003b2c: 00850513 addi x10,x10,8 + +0000000080003b30 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + xperm8 x2, x18, x4 # perform operation + 80003b30: 28494133 xperm8 x2,x18,x4 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b34: 000f3383 ld x7,0(x30) + 80003b38: 00238c63 beq x7,x2,80003b50 + 80003b3c: 1dc0446f jal x8,80007d18 + 80003b40: 80003b30 .word 0x80003b30 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 800141b2 .word 0x800141b2 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003b54: 00053a83 ld x21,0(x10) + 80003b58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000001 + 80003b5c: 00053683 ld x13,0(x10) + 80003b60: 00850513 addi x10,x10,8 + +0000000080003b64 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + xperm8 x17, x21, x13 # perform operation + 80003b64: 28dac8b3 xperm8 x17,x21,x13 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b68: 000f3383 ld x7,0(x30) + 80003b6c: 01138c63 beq x7,x17,80003b84 + 80003b70: 1a80446f jal x8,80007d18 + 80003b74: 80003b64 .word 0x80003b64 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 80014214 .word 0x80014214 + 80003b80: 00000000 .word 0x00000000 + 80003b84: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003b88: 00053a03 ld x20,0(x10) + 80003b8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000002 + 80003b90: 00053103 ld x2,0(x10) + 80003b94: 00850513 addi x10,x10,8 + +0000000080003b98 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + xperm8 x16, x20, x2 # perform operation + 80003b98: 282a4833 xperm8 x16,x20,x2 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b9c: 000f3383 ld x7,0(x30) + 80003ba0: 01038c63 beq x7,x16,80003bb8 + 80003ba4: 1740446f jal x8,80007d18 + 80003ba8: 80003b98 .word 0x80003b98 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 80014276 .word 0x80014276 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003bbc: 00053983 ld x19,0(x10) + 80003bc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x8000000000000000 + 80003bc4: 00053183 ld x3,0(x10) + 80003bc8: 00850513 addi x10,x10,8 + +0000000080003bcc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + xperm8 x20, x19, x3 # perform operation + 80003bcc: 2839ca33 xperm8 x20,x19,x3 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd0: 000f3383 ld x7,0(x30) + 80003bd4: 01438c63 beq x7,x20,80003bec + 80003bd8: 1400446f jal x8,80007d18 + 80003bdc: 80003bcc .word 0x80003bcc + 80003be0: 00000000 .word 0x00000000 + 80003be4: 800142d8 .word 0x800142d8 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003bf0: 00053703 ld x14,0(x10) + 80003bf4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8000000000000001 + 80003bf8: 00053a03 ld x20,0(x10) + 80003bfc: 00850513 addi x10,x10,8 + +0000000080003c00 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + xperm8 x4, x14, x20 # perform operation + 80003c00: 29474233 xperm8 x4,x14,x20 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c04: 000f3383 ld x7,0(x30) + 80003c08: 00438c63 beq x7,x4,80003c20 + 80003c0c: 10c0446f jal x8,80007d18 + 80003c10: 80003c00 .word 0x80003c00 + 80003c14: 00000000 .word 0x00000000 + 80003c18: 80014349 .word 0x80014349 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003c24: 00053303 ld x6,0(x10) + 80003c28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7fffffffffffffff + 80003c2c: 00053583 ld x11,0(x10) + 80003c30: 00850513 addi x10,x10,8 + +0000000080003c34 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + xperm8 x15, x6, x11 # perform operation + 80003c34: 28b347b3 xperm8 x15,x6,x11 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c38: 000f3383 ld x7,0(x30) + 80003c3c: 00f38c63 beq x7,x15,80003c54 + 80003c40: 0d80446f jal x8,80007d18 + 80003c44: 80003c34 .word 0x80003c34 + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 800143ba .word 0x800143ba + 80003c50: 00000000 .word 0x00000000 + 80003c54: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003c58: 00053903 ld x18,0(x10) + 80003c5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80003c60: 00053983 ld x19,0(x10) + 80003c64: 00850513 addi x10,x10,8 + +0000000080003c68 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + xperm8 x6, x18, x19 # perform operation + 80003c68: 29394333 xperm8 x6,x18,x19 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c6c: 000f3383 ld x7,0(x30) + 80003c70: 00638c63 beq x7,x6,80003c88 + 80003c74: 0a40446f jal x8,80007d18 + 80003c78: 80003c68 .word 0x80003c68 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 8001442b .word 0x8001442b + 80003c84: 00000000 .word 0x00000000 + 80003c88: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003c8c: 00053a83 ld x21,0(x10) + 80003c90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xffffffffffffffff + 80003c94: 00053703 ld x14,0(x10) + 80003c98: 00850513 addi x10,x10,8 + +0000000080003c9c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + xperm8 x31, x21, x14 # perform operation + 80003c9c: 28eacfb3 xperm8 x31,x21,x14 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca0: 000f3383 ld x7,0(x30) + 80003ca4: 01f38c63 beq x7,x31,80003cbc + 80003ca8: 0700446f jal x8,80007d18 + 80003cac: 80003c9c .word 0x80003c9c + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 8001449c .word 0x8001449c + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xaaaaaaaaaaaaaaaa + 80003cc0: 00053283 ld x5,0(x10) + 80003cc4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xfffffffffffffffe + 80003cc8: 00053083 ld x1,0(x10) + 80003ccc: 00850513 addi x10,x10,8 + +0000000080003cd0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + xperm8 x9, x5, x1 # perform operation + 80003cd0: 2812c4b3 xperm8 x9,x5,x1 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd4: 000f3383 ld x7,0(x30) + 80003cd8: 00938c63 beq x7,x9,80003cf0 + 80003cdc: 03c0446f jal x8,80007d18 + 80003ce0: 80003cd0 .word 0x80003cd0 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 8001450d .word 0x8001450d + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003cf4: 00053f83 ld x31,0(x10) + 80003cf8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80003cfc: 00053703 ld x14,0(x10) + 80003d00: 00850513 addi x10,x10,8 + +0000000080003d04 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + xperm8 x1, x31, x14 # perform operation + 80003d04: 28efc0b3 xperm8 x1,x31,x14 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d08: 000f3383 ld x7,0(x30) + 80003d0c: 00138c63 beq x7,x1,80003d24 + 80003d10: 0080446f jal x8,80007d18 + 80003d14: 80003d04 .word 0x80003d04 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 8001457e .word 0x8001457e + 80003d20: 00000000 .word 0x00000000 + 80003d24: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003d28: 00053603 ld x12,0(x10) + 80003d2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80003d30: 00053c03 ld x24,0(x10) + 80003d34: 00850513 addi x10,x10,8 + +0000000080003d38 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x1, x12, x24 # perform operation + 80003d38: 298640b3 xperm8 x1,x12,x24 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d3c: 000f3383 ld x7,0(x30) + 80003d40: 00138c63 beq x7,x1,80003d58 + 80003d44: 7d50346f jal x8,80007d18 + 80003d48: 80003d38 .word 0x80003d38 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 800145ef .word 0x800145ef + 80003d54: 00000000 .word 0x00000000 + 80003d58: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003d5c: 00053303 ld x6,0(x10) + 80003d60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5555555555555555 + 80003d64: 00053783 ld x15,0(x10) + 80003d68: 00850513 addi x10,x10,8 + +0000000080003d6c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + xperm8 x29, x6, x15 # perform operation + 80003d6c: 28f34eb3 xperm8 x29,x6,x15 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d70: 000f3383 ld x7,0(x30) + 80003d74: 01d38c63 beq x7,x29,80003d8c + 80003d78: 7a10346f jal x8,80007d18 + 80003d7c: 80003d6c .word 0x80003d6c + 80003d80: 00000000 .word 0x00000000 + 80003d84: 80014660 .word 0x80014660 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003d90: 00053083 ld x1,0(x10) + 80003d94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x00000000ffffffff + 80003d98: 00053903 ld x18,0(x10) + 80003d9c: 00850513 addi x10,x10,8 + +0000000080003da0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + xperm8 x16, x1, x18 # perform operation + 80003da0: 2920c833 xperm8 x16,x1,x18 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da4: 000f3383 ld x7,0(x30) + 80003da8: 01038c63 beq x7,x16,80003dc0 + 80003dac: 76d0346f jal x8,80007d18 + 80003db0: 80003da0 .word 0x80003da0 + 80003db4: 00000000 .word 0x00000000 + 80003db8: 800146d1 .word 0x800146d1 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003dc4: 00053083 ld x1,0(x10) + 80003dc8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000fffffffe + 80003dcc: 00053d83 ld x27,0(x10) + 80003dd0: 00850513 addi x10,x10,8 + +0000000080003dd4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + xperm8 x28, x1, x27 # perform operation + 80003dd4: 29b0ce33 xperm8 x28,x1,x27 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd8: 000f3383 ld x7,0(x30) + 80003ddc: 01c38c63 beq x7,x28,80003df4 + 80003de0: 7390346f jal x8,80007d18 + 80003de4: 80003dd4 .word 0x80003dd4 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 8001473a .word 0x8001473a + 80003df0: 00000000 .word 0x00000000 + 80003df4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003df8: 00053103 ld x2,0(x10) + 80003dfc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000100000000 + 80003e00: 00053803 ld x16,0(x10) + 80003e04: 00850513 addi x10,x10,8 + +0000000080003e08 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + xperm8 x12, x2, x16 # perform operation + 80003e08: 29014633 xperm8 x12,x2,x16 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e0c: 000f3383 ld x7,0(x30) + 80003e10: 00c38c63 beq x7,x12,80003e28 + 80003e14: 7050346f jal x8,80007d18 + 80003e18: 80003e08 .word 0x80003e08 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 800147a3 .word 0x800147a3 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003e2c: 00053483 ld x9,0(x10) + 80003e30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000100000001 + 80003e34: 00053583 ld x11,0(x10) + 80003e38: 00850513 addi x10,x10,8 + +0000000080003e3c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + xperm8 x16, x9, x11 # perform operation + 80003e3c: 28b4c833 xperm8 x16,x9,x11 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e40: 000f3383 ld x7,0(x30) + 80003e44: 01038c63 beq x7,x16,80003e5c + 80003e48: 6d10346f jal x8,80007d18 + 80003e4c: 80003e3c .word 0x80003e3c + 80003e50: 00000000 .word 0x00000000 + 80003e54: 8001480d .word 0x8001480d + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5555555555555555 + 80003e60: 00053483 ld x9,0(x10) + 80003e64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000000 + 80003e68: 00053203 ld x4,0(x10) + 80003e6c: 00850513 addi x10,x10,8 + +0000000080003e70 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + xperm8 x3, x9, x4 # perform operation + 80003e70: 2844c1b3 xperm8 x3,x9,x4 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e74: 000f3383 ld x7,0(x30) + 80003e78: 00338c63 beq x7,x3,80003e90 + 80003e7c: 69d0346f jal x8,80007d18 + 80003e80: 80003e70 .word 0x80003e70 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 80014877 .word 0x80014877 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x5555555555555555 + 80003e94: 00053303 ld x6,0(x10) + 80003e98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000001 + 80003e9c: 00053e03 ld x28,0(x10) + 80003ea0: 00850513 addi x10,x10,8 + +0000000080003ea4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + xperm8 x23, x6, x28 # perform operation + 80003ea4: 29c34bb3 xperm8 x23,x6,x28 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea8: 000f3383 ld x7,0(x30) + 80003eac: 01738c63 beq x7,x23,80003ec4 + 80003eb0: 6690346f jal x8,80007d18 + 80003eb4: 80003ea4 .word 0x80003ea4 + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 800148d9 .word 0x800148d9 + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x5555555555555555 + 80003ec8: 00053983 ld x19,0(x10) + 80003ecc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000000000002 + 80003ed0: 00053803 ld x16,0(x10) + 80003ed4: 00850513 addi x10,x10,8 + +0000000080003ed8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + xperm8 x14, x19, x16 # perform operation + 80003ed8: 2909c733 xperm8 x14,x19,x16 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003edc: 000f3383 ld x7,0(x30) + 80003ee0: 00e38c63 beq x7,x14,80003ef8 + 80003ee4: 6350346f jal x8,80007d18 + 80003ee8: 80003ed8 .word 0x80003ed8 + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 8001493b .word 0x8001493b + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5555555555555555 + 80003efc: 00053e03 ld x28,0(x10) + 80003f00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8000000000000000 + 80003f04: 00053783 ld x15,0(x10) + 80003f08: 00850513 addi x10,x10,8 + +0000000080003f0c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + xperm8 x14, x28, x15 # perform operation + 80003f0c: 28fe4733 xperm8 x14,x28,x15 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f10: 000f3383 ld x7,0(x30) + 80003f14: 00e38c63 beq x7,x14,80003f2c + 80003f18: 6010346f jal x8,80007d18 + 80003f1c: 80003f0c .word 0x80003f0c + 80003f20: 00000000 .word 0x00000000 + 80003f24: 8001499d .word 0x8001499d + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x5555555555555555 + 80003f30: 00053203 ld x4,0(x10) + 80003f34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000001 + 80003f38: 00053d03 ld x26,0(x10) + 80003f3c: 00850513 addi x10,x10,8 + +0000000080003f40 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + xperm8 x5, x4, x26 # perform operation + 80003f40: 29a242b3 xperm8 x5,x4,x26 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f44: 000f3383 ld x7,0(x30) + 80003f48: 00538c63 beq x7,x5,80003f60 + 80003f4c: 5cd0346f jal x8,80007d18 + 80003f50: 80003f40 .word 0x80003f40 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 80014a0e .word 0x80014a0e + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x5555555555555555 + 80003f64: 00053e83 ld x29,0(x10) + 80003f68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7fffffffffffffff + 80003f6c: 00053283 ld x5,0(x10) + 80003f70: 00850513 addi x10,x10,8 + +0000000080003f74 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + xperm8 x20, x29, x5 # perform operation + 80003f74: 285eca33 xperm8 x20,x29,x5 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f78: 000f3383 ld x7,0(x30) + 80003f7c: 01438c63 beq x7,x20,80003f94 + 80003f80: 5990346f jal x8,80007d18 + 80003f84: 80003f74 .word 0x80003f74 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 80014a7f .word 0x80014a7f + 80003f90: 00000000 .word 0x00000000 + 80003f94: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x5555555555555555 + 80003f98: 00053d03 ld x26,0(x10) + 80003f9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80003fa0: 00053183 ld x3,0(x10) + 80003fa4: 00850513 addi x10,x10,8 + +0000000080003fa8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + xperm8 x13, x26, x3 # perform operation + 80003fa8: 283d46b3 xperm8 x13,x26,x3 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fac: 000f3383 ld x7,0(x30) + 80003fb0: 00d38c63 beq x7,x13,80003fc8 + 80003fb4: 5650346f jal x8,80007d18 + 80003fb8: 80003fa8 .word 0x80003fa8 + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 80014af0 .word 0x80014af0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5555555555555555 + 80003fcc: 00053803 ld x16,0(x10) + 80003fd0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xffffffffffffffff + 80003fd4: 00053303 ld x6,0(x10) + 80003fd8: 00850513 addi x10,x10,8 + +0000000080003fdc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + xperm8 x11, x16, x6 # perform operation + 80003fdc: 286845b3 xperm8 x11,x16,x6 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe0: 000f3383 ld x7,0(x30) + 80003fe4: 00b38c63 beq x7,x11,80003ffc + 80003fe8: 5310346f jal x8,80007d18 + 80003fec: 80003fdc .word 0x80003fdc + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 80014b61 .word 0x80014b61 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5555555555555555 + 80004000: 00053c83 ld x25,0(x10) + 80004004: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffffffffffe + 80004008: 00053983 ld x19,0(x10) + 8000400c: 00850513 addi x10,x10,8 + +0000000080004010 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + xperm8 x12, x25, x19 # perform operation + 80004010: 293cc633 xperm8 x12,x25,x19 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004014: 000f3383 ld x7,0(x30) + 80004018: 00c38c63 beq x7,x12,80004030 + 8000401c: 4fd0346f jal x8,80007d18 + 80004020: 80004010 .word 0x80004010 + 80004024: 00000000 .word 0x00000000 + 80004028: 80014bd2 .word 0x80014bd2 + 8000402c: 00000000 .word 0x00000000 + 80004030: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5555555555555555 + 80004034: 00053083 ld x1,0(x10) + 80004038: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 8000403c: 00053d83 ld x27,0(x10) + 80004040: 00850513 addi x10,x10,8 + +0000000080004044 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + xperm8 x19, x1, x27 # perform operation + 80004044: 29b0c9b3 xperm8 x19,x1,x27 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004048: 000f3383 ld x7,0(x30) + 8000404c: 01338c63 beq x7,x19,80004064 + 80004050: 4c90346f jal x8,80007d18 + 80004054: 80004044 .word 0x80004044 + 80004058: 00000000 .word 0x00000000 + 8000405c: 80014c43 .word 0x80014c43 + 80004060: 00000000 .word 0x00000000 + 80004064: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x5555555555555555 + 80004068: 00053303 ld x6,0(x10) + 8000406c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80004070: 00053683 ld x13,0(x10) + 80004074: 00850513 addi x10,x10,8 + +0000000080004078 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x31, x6, x13 # perform operation + 80004078: 28d34fb3 xperm8 x31,x6,x13 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 8000407c: 000f3383 ld x7,0(x30) + 80004080: 01f38c63 beq x7,x31,80004098 + 80004084: 4950346f jal x8,80007d18 + 80004088: 80004078 .word 0x80004078 + 8000408c: 00000000 .word 0x00000000 + 80004090: 80014cb4 .word 0x80014cb4 + 80004094: 00000000 .word 0x00000000 + 80004098: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x5555555555555555 + 8000409c: 00053803 ld x16,0(x10) + 800040a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x5555555555555555 + 800040a4: 00053083 ld x1,0(x10) + 800040a8: 00850513 addi x10,x10,8 + +00000000800040ac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + xperm8 x20, x16, x1 # perform operation + 800040ac: 28184a33 xperm8 x20,x16,x1 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b0: 000f3383 ld x7,0(x30) + 800040b4: 01438c63 beq x7,x20,800040cc + 800040b8: 4610346f jal x8,80007d18 + 800040bc: 800040ac .word 0x800040ac + 800040c0: 00000000 .word 0x00000000 + 800040c4: 80014d25 .word 0x80014d25 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5555555555555555 + 800040d0: 00053b83 ld x23,0(x10) + 800040d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000000ffffffff + 800040d8: 00053303 ld x6,0(x10) + 800040dc: 00850513 addi x10,x10,8 + +00000000800040e0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + xperm8 x16, x23, x6 # perform operation + 800040e0: 286bc833 xperm8 x16,x23,x6 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e4: 000f3383 ld x7,0(x30) + 800040e8: 01038c63 beq x7,x16,80004100 + 800040ec: 42d0346f jal x8,80007d18 + 800040f0: 800040e0 .word 0x800040e0 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 80014d96 .word 0x80014d96 + 800040fc: 00000000 .word 0x00000000 + 80004100: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x5555555555555555 + 80004104: 00053a03 ld x20,0(x10) + 80004108: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000000fffffffe + 8000410c: 00053083 ld x1,0(x10) + 80004110: 00850513 addi x10,x10,8 + +0000000080004114 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + xperm8 x15, x20, x1 # perform operation + 80004114: 281a47b3 xperm8 x15,x20,x1 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004118: 000f3383 ld x7,0(x30) + 8000411c: 00f38c63 beq x7,x15,80004134 + 80004120: 3f90346f jal x8,80007d18 + 80004124: 80004114 .word 0x80004114 + 80004128: 00000000 .word 0x00000000 + 8000412c: 80014dff .word 0x80014dff + 80004130: 00000000 .word 0x00000000 + 80004134: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5555555555555555 + 80004138: 00053883 ld x17,0(x10) + 8000413c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000000 + 80004140: 00053c83 ld x25,0(x10) + 80004144: 00850513 addi x10,x10,8 + +0000000080004148 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + xperm8 x26, x17, x25 # perform operation + 80004148: 2998cd33 xperm8 x26,x17,x25 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 8000414c: 000f3383 ld x7,0(x30) + 80004150: 01a38c63 beq x7,x26,80004168 + 80004154: 3c50346f jal x8,80007d18 + 80004158: 80004148 .word 0x80004148 + 8000415c: 00000000 .word 0x00000000 + 80004160: 80014e68 .word 0x80014e68 + 80004164: 00000000 .word 0x00000000 + 80004168: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5555555555555555 + 8000416c: 00053c83 ld x25,0(x10) + 80004170: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000001 + 80004174: 00053603 ld x12,0(x10) + 80004178: 00850513 addi x10,x10,8 + +000000008000417c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + xperm8 x23, x25, x12 # perform operation + 8000417c: 28cccbb3 xperm8 x23,x25,x12 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004180: 000f3383 ld x7,0(x30) + 80004184: 01738c63 beq x7,x23,8000419c + 80004188: 3910346f jal x8,80007d18 + 8000418c: 8000417c .word 0x8000417c + 80004190: 00000000 .word 0x00000000 + 80004194: 80014ed2 .word 0x80014ed2 + 80004198: 00000000 .word 0x00000000 + 8000419c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000ffffffff + 800041a0: 00053603 ld x12,0(x10) + 800041a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000000 + 800041a8: 00053b03 ld x22,0(x10) + 800041ac: 00850513 addi x10,x10,8 + +00000000800041b0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + xperm8 x13, x12, x22 # perform operation + 800041b0: 296646b3 xperm8 x13,x12,x22 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b4: 000f3383 ld x7,0(x30) + 800041b8: 00d38c63 beq x7,x13,800041d0 + 800041bc: 35d0346f jal x8,80007d18 + 800041c0: 800041b0 .word 0x800041b0 + 800041c4: 00000000 .word 0x00000000 + 800041c8: 80014f3c .word 0x80014f3c + 800041cc: 00000000 .word 0x00000000 + 800041d0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000ffffffff + 800041d4: 00053483 ld x9,0(x10) + 800041d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000001 + 800041dc: 00053203 ld x4,0(x10) + 800041e0: 00850513 addi x10,x10,8 + +00000000800041e4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + xperm8 x20, x9, x4 # perform operation + 800041e4: 2844ca33 xperm8 x20,x9,x4 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e8: 000f3383 ld x7,0(x30) + 800041ec: 01438c63 beq x7,x20,80004204 + 800041f0: 3290346f jal x8,80007d18 + 800041f4: 800041e4 .word 0x800041e4 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 80014f96 .word 0x80014f96 + 80004200: 00000000 .word 0x00000000 + 80004204: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000ffffffff + 80004208: 00053e83 ld x29,0(x10) + 8000420c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 80004210: 00053903 ld x18,0(x10) + 80004214: 00850513 addi x10,x10,8 + +0000000080004218 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + xperm8 x6, x29, x18 # perform operation + 80004218: 292ec333 xperm8 x6,x29,x18 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 8000421c: 000f3383 ld x7,0(x30) + 80004220: 00638c63 beq x7,x6,80004238 + 80004224: 2f50346f jal x8,80007d18 + 80004228: 80004218 .word 0x80004218 + 8000422c: 00000000 .word 0x00000000 + 80004230: 80014ff0 .word 0x80014ff0 + 80004234: 00000000 .word 0x00000000 + 80004238: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x00000000ffffffff + 8000423c: 00053903 ld x18,0(x10) + 80004240: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000000 + 80004244: 00053303 ld x6,0(x10) + 80004248: 00850513 addi x10,x10,8 + +000000008000424c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + xperm8 x21, x18, x6 # perform operation + 8000424c: 28694ab3 xperm8 x21,x18,x6 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004250: 000f3383 ld x7,0(x30) + 80004254: 01538c63 beq x7,x21,8000426c + 80004258: 2c10346f jal x8,80007d18 + 8000425c: 8000424c .word 0x8000424c + 80004260: 00000000 .word 0x00000000 + 80004264: 8001504a .word 0x8001504a + 80004268: 00000000 .word 0x00000000 + 8000426c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x00000000ffffffff + 80004270: 00053d03 ld x26,0(x10) + 80004274: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000001 + 80004278: 00053103 ld x2,0(x10) + 8000427c: 00850513 addi x10,x10,8 + +0000000080004280 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + xperm8 x21, x26, x2 # perform operation + 80004280: 282d4ab3 xperm8 x21,x26,x2 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004284: 000f3383 ld x7,0(x30) + 80004288: 01538c63 beq x7,x21,800042a0 + 8000428c: 28d0346f jal x8,80007d18 + 80004290: 80004280 .word 0x80004280 + 80004294: 00000000 .word 0x00000000 + 80004298: 800150b3 .word 0x800150b3 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000ffffffff + 800042a4: 00053683 ld x13,0(x10) + 800042a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7fffffffffffffff + 800042ac: 00053083 ld x1,0(x10) + 800042b0: 00850513 addi x10,x10,8 + +00000000800042b4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + xperm8 x23, x13, x1 # perform operation + 800042b4: 2816cbb3 xperm8 x23,x13,x1 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b8: 000f3383 ld x7,0(x30) + 800042bc: 01738c63 beq x7,x23,800042d4 + 800042c0: 2590346f jal x8,80007d18 + 800042c4: 800042b4 .word 0x800042b4 + 800042c8: 00000000 .word 0x00000000 + 800042cc: 8001511c .word 0x8001511c + 800042d0: 00000000 .word 0x00000000 + 800042d4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000ffffffff + 800042d8: 00053803 ld x16,0(x10) + 800042dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffffffffffe + 800042e0: 00053e03 ld x28,0(x10) + 800042e4: 00850513 addi x10,x10,8 + +00000000800042e8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + xperm8 x24, x16, x28 # perform operation + 800042e8: 29c84c33 xperm8 x24,x16,x28 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042ec: 000f3383 ld x7,0(x30) + 800042f0: 01838c63 beq x7,x24,80004308 + 800042f4: 2250346f jal x8,80007d18 + 800042f8: 800042e8 .word 0x800042e8 + 800042fc: 00000000 .word 0x00000000 + 80004300: 80015185 .word 0x80015185 + 80004304: 00000000 .word 0x00000000 + 80004308: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x00000000ffffffff + 8000430c: 00053e03 ld x28,0(x10) + 80004310: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xffffffffffffffff + 80004314: 00053103 ld x2,0(x10) + 80004318: 00850513 addi x10,x10,8 + +000000008000431c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + xperm8 x21, x28, x2 # perform operation + 8000431c: 282e4ab3 xperm8 x21,x28,x2 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004320: 000f3383 ld x7,0(x30) + 80004324: 01538c63 beq x7,x21,8000433c + 80004328: 1f10346f jal x8,80007d18 + 8000432c: 8000431c .word 0x8000431c + 80004330: 00000000 .word 0x00000000 + 80004334: 800151ee .word 0x800151ee + 80004338: 00000000 .word 0x00000000 + 8000433c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x00000000ffffffff + 80004340: 00053803 ld x16,0(x10) + 80004344: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfffffffffffffffe + 80004348: 00053f83 ld x31,0(x10) + 8000434c: 00850513 addi x10,x10,8 + +0000000080004350 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + xperm8 x15, x16, x31 # perform operation + 80004350: 29f847b3 xperm8 x15,x16,x31 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004354: 000f3383 ld x7,0(x30) + 80004358: 00f38c63 beq x7,x15,80004370 + 8000435c: 1bd0346f jal x8,80007d18 + 80004360: 80004350 .word 0x80004350 + 80004364: 00000000 .word 0x00000000 + 80004368: 80015257 .word 0x80015257 + 8000436c: 00000000 .word 0x00000000 + 80004370: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000000ffffffff + 80004374: 00053583 ld x11,0(x10) + 80004378: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 8000437c: 00053d83 ld x27,0(x10) + 80004380: 00850513 addi x10,x10,8 + +0000000080004384 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + xperm8 x2, x11, x27 # perform operation + 80004384: 29b5c133 xperm8 x2,x11,x27 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004388: 000f3383 ld x7,0(x30) + 8000438c: 00238c63 beq x7,x2,800043a4 + 80004390: 1890346f jal x8,80007d18 + 80004394: 80004384 .word 0x80004384 + 80004398: 00000000 .word 0x00000000 + 8000439c: 800152c0 .word 0x800152c0 + 800043a0: 00000000 .word 0x00000000 + 800043a4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000ffffffff + 800043a8: 00053e83 ld x29,0(x10) + 800043ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 800043b0: 00053103 ld x2,0(x10) + 800043b4: 00850513 addi x10,x10,8 + +00000000800043b8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x5, x29, x2 # perform operation + 800043b8: 282ec2b3 xperm8 x5,x29,x2 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043bc: 000f3383 ld x7,0(x30) + 800043c0: 00538c63 beq x7,x5,800043d8 + 800043c4: 1550346f jal x8,80007d18 + 800043c8: 800043b8 .word 0x800043b8 + 800043cc: 00000000 .word 0x00000000 + 800043d0: 80015329 .word 0x80015329 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x00000000ffffffff + 800043dc: 00053983 ld x19,0(x10) + 800043e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5555555555555555 + 800043e4: 00053903 ld x18,0(x10) + 800043e8: 00850513 addi x10,x10,8 + +00000000800043ec : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + xperm8 x6, x19, x18 # perform operation + 800043ec: 2929c333 xperm8 x6,x19,x18 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f0: 000f3383 ld x7,0(x30) + 800043f4: 00638c63 beq x7,x6,8000440c + 800043f8: 1210346f jal x8,80007d18 + 800043fc: 800043ec .word 0x800043ec + 80004400: 00000000 .word 0x00000000 + 80004404: 80015392 .word 0x80015392 + 80004408: 00000000 .word 0x00000000 + 8000440c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000ffffffff + 80004410: 00053483 ld x9,0(x10) + 80004414: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x00000000ffffffff + 80004418: 00053e83 ld x29,0(x10) + 8000441c: 00850513 addi x10,x10,8 + +0000000080004420 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + xperm8 x1, x9, x29 # perform operation + 80004420: 29d4c0b3 xperm8 x1,x9,x29 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004424: 000f3383 ld x7,0(x30) + 80004428: 00138c63 beq x7,x1,80004440 + 8000442c: 0ed0346f jal x8,80007d18 + 80004430: 80004420 .word 0x80004420 + 80004434: 00000000 .word 0x00000000 + 80004438: 800153fb .word 0x800153fb + 8000443c: 00000000 .word 0x00000000 + 80004440: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000ffffffff + 80004444: 00053e83 ld x29,0(x10) + 80004448: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000fffffffe + 8000444c: 00053c83 ld x25,0(x10) + 80004450: 00850513 addi x10,x10,8 + +0000000080004454 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + xperm8 x5, x29, x25 # perform operation + 80004454: 299ec2b3 xperm8 x5,x29,x25 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004458: 000f3383 ld x7,0(x30) + 8000445c: 00538c63 beq x7,x5,80004474 + 80004460: 0b90346f jal x8,80007d18 + 80004464: 80004454 .word 0x80004454 + 80004468: 00000000 .word 0x00000000 + 8000446c: 8001545c .word 0x8001545c + 80004470: 00000000 .word 0x00000000 + 80004474: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000ffffffff + 80004478: 00053683 ld x13,0(x10) + 8000447c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000100000000 + 80004480: 00053d83 ld x27,0(x10) + 80004484: 00850513 addi x10,x10,8 + +0000000080004488 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + xperm8 x31, x13, x27 # perform operation + 80004488: 29b6cfb3 xperm8 x31,x13,x27 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 8000448c: 000f3383 ld x7,0(x30) + 80004490: 01f38c63 beq x7,x31,800044a8 + 80004494: 0850346f jal x8,80007d18 + 80004498: 80004488 .word 0x80004488 + 8000449c: 00000000 .word 0x00000000 + 800044a0: 800154bd .word 0x800154bd + 800044a4: 00000000 .word 0x00000000 + 800044a8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x00000000ffffffff + 800044ac: 00053e03 ld x28,0(x10) + 800044b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000100000001 + 800044b4: 00053203 ld x4,0(x10) + 800044b8: 00850513 addi x10,x10,8 + +00000000800044bc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + xperm8 x31, x28, x4 # perform operation + 800044bc: 284e4fb3 xperm8 x31,x28,x4 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c0: 000f3383 ld x7,0(x30) + 800044c4: 01f38c63 beq x7,x31,800044dc + 800044c8: 0510346f jal x8,80007d18 + 800044cc: 800044bc .word 0x800044bc + 800044d0: 00000000 .word 0x00000000 + 800044d4: 8001551f .word 0x8001551f + 800044d8: 00000000 .word 0x00000000 + 800044dc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 800044e0: 00053d83 ld x27,0(x10) + 800044e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000000 + 800044e8: 00053e83 ld x29,0(x10) + 800044ec: 00850513 addi x10,x10,8 + +00000000800044f0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + xperm8 x24, x27, x29 # perform operation + 800044f0: 29ddcc33 xperm8 x24,x27,x29 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f4: 000f3383 ld x7,0(x30) + 800044f8: 01838c63 beq x7,x24,80004510 + 800044fc: 01d0346f jal x8,80007d18 + 80004500: 800044f0 .word 0x800044f0 + 80004504: 00000000 .word 0x00000000 + 80004508: 80015581 .word 0x80015581 + 8000450c: 00000000 .word 0x00000000 + 80004510: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000fffffffe + 80004514: 00053603 ld x12,0(x10) + 80004518: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000001 + 8000451c: 00053183 ld x3,0(x10) + 80004520: 00850513 addi x10,x10,8 + +0000000080004524 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + xperm8 x16, x12, x3 # perform operation + 80004524: 28364833 xperm8 x16,x12,x3 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004528: 000f3383 ld x7,0(x30) + 8000452c: 01038c63 beq x7,x16,80004544 + 80004530: 7e80346f jal x8,80007d18 + 80004534: 80004524 .word 0x80004524 + 80004538: 00000000 .word 0x00000000 + 8000453c: 800155db .word 0x800155db + 80004540: 00000000 .word 0x00000000 + 80004544: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000fffffffe + 80004548: 00053783 ld x15,0(x10) + 8000454c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x0000000000000002 + 80004550: 00053183 ld x3,0(x10) + 80004554: 00850513 addi x10,x10,8 + +0000000080004558 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + xperm8 x1, x15, x3 # perform operation + 80004558: 2837c0b3 xperm8 x1,x15,x3 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 8000455c: 000f3383 ld x7,0(x30) + 80004560: 00138c63 beq x7,x1,80004578 + 80004564: 7b40346f jal x8,80007d18 + 80004568: 80004558 .word 0x80004558 + 8000456c: 00000000 .word 0x00000000 + 80004570: 80015635 .word 0x80015635 + 80004574: 00000000 .word 0x00000000 + 80004578: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x00000000fffffffe + 8000457c: 00053203 ld x4,0(x10) + 80004580: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000000 + 80004584: 00053b03 ld x22,0(x10) + 80004588: 00850513 addi x10,x10,8 + +000000008000458c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + xperm8 x9, x4, x22 # perform operation + 8000458c: 296244b3 xperm8 x9,x4,x22 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004590: 000f3383 ld x7,0(x30) + 80004594: 00938c63 beq x7,x9,800045ac + 80004598: 7800346f jal x8,80007d18 + 8000459c: 8000458c .word 0x8000458c + 800045a0: 00000000 .word 0x00000000 + 800045a4: 8001568f .word 0x8001568f + 800045a8: 00000000 .word 0x00000000 + 800045ac: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 800045b0: 00053d83 ld x27,0(x10) + 800045b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000001 + 800045b8: 00053f83 ld x31,0(x10) + 800045bc: 00850513 addi x10,x10,8 + +00000000800045c0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + xperm8 x2, x27, x31 # perform operation + 800045c0: 29fdc133 xperm8 x2,x27,x31 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c4: 000f3383 ld x7,0(x30) + 800045c8: 00238c63 beq x7,x2,800045e0 + 800045cc: 74c0346f jal x8,80007d18 + 800045d0: 800045c0 .word 0x800045c0 + 800045d4: 00000000 .word 0x00000000 + 800045d8: 800156f8 .word 0x800156f8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000fffffffe + 800045e4: 00053a03 ld x20,0(x10) + 800045e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7fffffffffffffff + 800045ec: 00053983 ld x19,0(x10) + 800045f0: 00850513 addi x10,x10,8 + +00000000800045f4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + xperm8 x2, x20, x19 # perform operation + 800045f4: 293a4133 xperm8 x2,x20,x19 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f8: 000f3383 ld x7,0(x30) + 800045fc: 00238c63 beq x7,x2,80004614 + 80004600: 7180346f jal x8,80007d18 + 80004604: 800045f4 .word 0x800045f4 + 80004608: 00000000 .word 0x00000000 + 8000460c: 80015761 .word 0x80015761 + 80004610: 00000000 .word 0x00000000 + 80004614: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x00000000fffffffe + 80004618: 00053203 ld x4,0(x10) + 8000461c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80004620: 00053103 ld x2,0(x10) + 80004624: 00850513 addi x10,x10,8 + +0000000080004628 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + xperm8 x14, x4, x2 # perform operation + 80004628: 28224733 xperm8 x14,x4,x2 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 8000462c: 000f3383 ld x7,0(x30) + 80004630: 00e38c63 beq x7,x14,80004648 + 80004634: 6e40346f jal x8,80007d18 + 80004638: 80004628 .word 0x80004628 + 8000463c: 00000000 .word 0x00000000 + 80004640: 800157ca .word 0x800157ca + 80004644: 00000000 .word 0x00000000 + 80004648: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000fffffffe + 8000464c: 00053b83 ld x23,0(x10) + 80004650: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xffffffffffffffff + 80004654: 00053903 ld x18,0(x10) + 80004658: 00850513 addi x10,x10,8 + +000000008000465c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + xperm8 x27, x23, x18 # perform operation + 8000465c: 292bcdb3 xperm8 x27,x23,x18 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004660: 000f3383 ld x7,0(x30) + 80004664: 01b38c63 beq x7,x27,8000467c + 80004668: 6b00346f jal x8,80007d18 + 8000466c: 8000465c .word 0x8000465c + 80004670: 00000000 .word 0x00000000 + 80004674: 80015833 .word 0x80015833 + 80004678: 00000000 .word 0x00000000 + 8000467c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x00000000fffffffe + 80004680: 00053283 ld x5,0(x10) + 80004684: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xfffffffffffffffe + 80004688: 00053083 ld x1,0(x10) + 8000468c: 00850513 addi x10,x10,8 + +0000000080004690 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + xperm8 x11, x5, x1 # perform operation + 80004690: 2812c5b3 xperm8 x11,x5,x1 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004694: 000f3383 ld x7,0(x30) + 80004698: 00b38c63 beq x7,x11,800046b0 + 8000469c: 67c0346f jal x8,80007d18 + 800046a0: 80004690 .word 0x80004690 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 8001589c .word 0x8001589c + 800046ac: 00000000 .word 0x00000000 + 800046b0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 800046b4: 00053303 ld x6,0(x10) + 800046b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 800046bc: 00053a83 ld x21,0(x10) + 800046c0: 00850513 addi x10,x10,8 + +00000000800046c4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + xperm8 x29, x6, x21 # perform operation + 800046c4: 29534eb3 xperm8 x29,x6,x21 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c8: 000f3383 ld x7,0(x30) + 800046cc: 01d38c63 beq x7,x29,800046e4 + 800046d0: 6480346f jal x8,80007d18 + 800046d4: 800046c4 .word 0x800046c4 + 800046d8: 00000000 .word 0x00000000 + 800046dc: 80015905 .word 0x80015905 + 800046e0: 00000000 .word 0x00000000 + 800046e4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 800046e8: 00053303 ld x6,0(x10) + 800046ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 800046f0: 00053983 ld x19,0(x10) + 800046f4: 00850513 addi x10,x10,8 + +00000000800046f8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x17, x6, x19 # perform operation + 800046f8: 293348b3 xperm8 x17,x6,x19 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046fc: 000f3383 ld x7,0(x30) + 80004700: 01138c63 beq x7,x17,80004718 + 80004704: 6140346f jal x8,80007d18 + 80004708: 800046f8 .word 0x800046f8 + 8000470c: 00000000 .word 0x00000000 + 80004710: 8001596e .word 0x8001596e + 80004714: 00000000 .word 0x00000000 + 80004718: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 8000471c: 00053303 ld x6,0(x10) + 80004720: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5555555555555555 + 80004724: 00053a83 ld x21,0(x10) + 80004728: 00850513 addi x10,x10,8 + +000000008000472c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + xperm8 x3, x6, x21 # perform operation + 8000472c: 295341b3 xperm8 x3,x6,x21 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004730: 000f3383 ld x7,0(x30) + 80004734: 00338c63 beq x7,x3,8000474c + 80004738: 5e00346f jal x8,80007d18 + 8000473c: 8000472c .word 0x8000472c + 80004740: 00000000 .word 0x00000000 + 80004744: 800159d7 .word 0x800159d7 + 80004748: 00000000 .word 0x00000000 + 8000474c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x00000000fffffffe + 80004750: 00053603 ld x12,0(x10) + 80004754: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x00000000ffffffff + 80004758: 00053083 ld x1,0(x10) + 8000475c: 00850513 addi x10,x10,8 + +0000000080004760 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + xperm8 x22, x12, x1 # perform operation + 80004760: 28164b33 xperm8 x22,x12,x1 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004764: 000f3383 ld x7,0(x30) + 80004768: 01638c63 beq x7,x22,80004780 + 8000476c: 5ac0346f jal x8,80007d18 + 80004770: 80004760 .word 0x80004760 + 80004774: 00000000 .word 0x00000000 + 80004778: 80015a40 .word 0x80015a40 + 8000477c: 00000000 .word 0x00000000 + 80004780: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000fffffffe + 80004784: 00053a83 ld x21,0(x10) + 80004788: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 8000478c: 00053483 ld x9,0(x10) + 80004790: 00850513 addi x10,x10,8 + +0000000080004794 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + xperm8 x16, x21, x9 # perform operation + 80004794: 289ac833 xperm8 x16,x21,x9 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004798: 000f3383 ld x7,0(x30) + 8000479c: 01038c63 beq x7,x16,800047b4 + 800047a0: 5780346f jal x8,80007d18 + 800047a4: 80004794 .word 0x80004794 + 800047a8: 00000000 .word 0x00000000 + 800047ac: 80015aa1 .word 0x80015aa1 + 800047b0: 00000000 .word 0x00000000 + 800047b4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000fffffffe + 800047b8: 00053a03 ld x20,0(x10) + 800047bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000000 + 800047c0: 00053b83 ld x23,0(x10) + 800047c4: 00850513 addi x10,x10,8 + +00000000800047c8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + xperm8 x9, x20, x23 # perform operation + 800047c8: 297a44b3 xperm8 x9,x20,x23 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047cc: 000f3383 ld x7,0(x30) + 800047d0: 00938c63 beq x7,x9,800047e8 + 800047d4: 5440346f jal x8,80007d18 + 800047d8: 800047c8 .word 0x800047c8 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 80015b02 .word 0x80015b02 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x00000000fffffffe + 800047ec: 00053b03 ld x22,0(x10) + 800047f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000100000001 + 800047f4: 00053583 ld x11,0(x10) + 800047f8: 00850513 addi x10,x10,8 + +00000000800047fc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + xperm8 x19, x22, x11 # perform operation + 800047fc: 28bb49b3 xperm8 x19,x22,x11 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004800: 000f3383 ld x7,0(x30) + 80004804: 01338c63 beq x7,x19,8000481c + 80004808: 5100346f jal x8,80007d18 + 8000480c: 800047fc .word 0x800047fc + 80004810: 00000000 .word 0x00000000 + 80004814: 80015b64 .word 0x80015b64 + 80004818: 00000000 .word 0x00000000 + 8000481c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004820: 00053303 ld x6,0(x10) + 80004824: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000000000000 + 80004828: 00053583 ld x11,0(x10) + 8000482c: 00850513 addi x10,x10,8 + +0000000080004830 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + xperm8 x13, x6, x11 # perform operation + 80004830: 28b346b3 xperm8 x13,x6,x11 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004834: 000f3383 ld x7,0(x30) + 80004838: 00d38c63 beq x7,x13,80004850 + 8000483c: 4dc0346f jal x8,80007d18 + 80004840: 80004830 .word 0x80004830 + 80004844: 00000000 .word 0x00000000 + 80004848: 80015bc6 .word 0x80015bc6 + 8000484c: 00000000 .word 0x00000000 + 80004850: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000100000000 + 80004854: 00053803 ld x16,0(x10) + 80004858: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000000000001 + 8000485c: 00053a83 ld x21,0(x10) + 80004860: 00850513 addi x10,x10,8 + +0000000080004864 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + xperm8 x20, x16, x21 # perform operation + 80004864: 29584a33 xperm8 x20,x16,x21 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004868: 000f3383 ld x7,0(x30) + 8000486c: 01438c63 beq x7,x20,80004884 + 80004870: 4a80346f jal x8,80007d18 + 80004874: 80004864 .word 0x80004864 + 80004878: 00000000 .word 0x00000000 + 8000487c: 80015c21 .word 0x80015c21 + 80004880: 00000000 .word 0x00000000 + 80004884: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000000 + 80004888: 00053b03 ld x22,0(x10) + 8000488c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000002 + 80004890: 00053c03 ld x24,0(x10) + 80004894: 00850513 addi x10,x10,8 + +0000000080004898 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + xperm8 x5, x22, x24 # perform operation + 80004898: 298b42b3 xperm8 x5,x22,x24 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 8000489c: 000f3383 ld x7,0(x30) + 800048a0: 00538c63 beq x7,x5,800048b8 + 800048a4: 4740346f jal x8,80007d18 + 800048a8: 80004898 .word 0x80004898 + 800048ac: 00000000 .word 0x00000000 + 800048b0: 80015c7c .word 0x80015c7c + 800048b4: 00000000 .word 0x00000000 + 800048b8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000000 + 800048bc: 00053c03 ld x24,0(x10) + 800048c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x8000000000000000 + 800048c4: 00053203 ld x4,0(x10) + 800048c8: 00850513 addi x10,x10,8 + +00000000800048cc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + xperm8 x6, x24, x4 # perform operation + 800048cc: 284c4333 xperm8 x6,x24,x4 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d0: 000f3383 ld x7,0(x30) + 800048d4: 00638c63 beq x7,x6,800048ec + 800048d8: 4400346f jal x8,80007d18 + 800048dc: 800048cc .word 0x800048cc + 800048e0: 00000000 .word 0x00000000 + 800048e4: 80015cd7 .word 0x80015cd7 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000100000000 + 800048f0: 00053803 ld x16,0(x10) + 800048f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000001 + 800048f8: 00053903 ld x18,0(x10) + 800048fc: 00850513 addi x10,x10,8 + +0000000080004900 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + xperm8 x6, x16, x18 # perform operation + 80004900: 29284333 xperm8 x6,x16,x18 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004904: 000f3383 ld x7,0(x30) + 80004908: 00638c63 beq x7,x6,80004920 + 8000490c: 40c0346f jal x8,80007d18 + 80004910: 80004900 .word 0x80004900 + 80004914: 00000000 .word 0x00000000 + 80004918: 80015d41 .word 0x80015d41 + 8000491c: 00000000 .word 0x00000000 + 80004920: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000100000000 + 80004924: 00053583 ld x11,0(x10) + 80004928: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x7fffffffffffffff + 8000492c: 00053783 ld x15,0(x10) + 80004930: 00850513 addi x10,x10,8 + +0000000080004934 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + xperm8 x5, x11, x15 # perform operation + 80004934: 28f5c2b3 xperm8 x5,x11,x15 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004938: 000f3383 ld x7,0(x30) + 8000493c: 00538c63 beq x7,x5,80004954 + 80004940: 3d80346f jal x8,80007d18 + 80004944: 80004934 .word 0x80004934 + 80004948: 00000000 .word 0x00000000 + 8000494c: 80015dab .word 0x80015dab + 80004950: 00000000 .word 0x00000000 + 80004954: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000100000000 + 80004958: 00053883 ld x17,0(x10) + 8000495c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80004960: 00053983 ld x19,0(x10) + 80004964: 00850513 addi x10,x10,8 + +0000000080004968 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + xperm8 x20, x17, x19 # perform operation + 80004968: 2938ca33 xperm8 x20,x17,x19 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 8000496c: 000f3383 ld x7,0(x30) + 80004970: 01438c63 beq x7,x20,80004988 + 80004974: 3a40346f jal x8,80007d18 + 80004978: 80004968 .word 0x80004968 + 8000497c: 00000000 .word 0x00000000 + 80004980: 80015e15 .word 0x80015e15 + 80004984: 00000000 .word 0x00000000 + 80004988: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000000 + 8000498c: 00053c03 ld x24,0(x10) + 80004990: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 80004994: 00053b03 ld x22,0(x10) + 80004998: 00850513 addi x10,x10,8 + +000000008000499c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + xperm8 x14, x24, x22 # perform operation + 8000499c: 296c4733 xperm8 x14,x24,x22 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a0: 000f3383 ld x7,0(x30) + 800049a4: 00e38c63 beq x7,x14,800049bc + 800049a8: 3700346f jal x8,80007d18 + 800049ac: 8000499c .word 0x8000499c + 800049b0: 00000000 .word 0x00000000 + 800049b4: 80015e7f .word 0x80015e7f + 800049b8: 00000000 .word 0x00000000 + 800049bc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 800049c0: 00053a03 ld x20,0(x10) + 800049c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffffffffffe + 800049c8: 00053983 ld x19,0(x10) + 800049cc: 00850513 addi x10,x10,8 + +00000000800049d0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + xperm8 x27, x20, x19 # perform operation + 800049d0: 293a4db3 xperm8 x27,x20,x19 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d4: 000f3383 ld x7,0(x30) + 800049d8: 01b38c63 beq x7,x27,800049f0 + 800049dc: 33c0346f jal x8,80007d18 + 800049e0: 800049d0 .word 0x800049d0 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 80015ee9 .word 0x80015ee9 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000000 + 800049f4: 00053e03 ld x28,0(x10) + 800049f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 800049fc: 00053183 ld x3,0(x10) + 80004a00: 00850513 addi x10,x10,8 + +0000000080004a04 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + xperm8 x31, x28, x3 # perform operation + 80004a04: 283e4fb3 xperm8 x31,x28,x3 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a08: 000f3383 ld x7,0(x30) + 80004a0c: 01f38c63 beq x7,x31,80004a24 + 80004a10: 3080346f jal x8,80007d18 + 80004a14: 80004a04 .word 0x80004a04 + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 80015f53 .word 0x80015f53 + 80004a20: 00000000 .word 0x00000000 + 80004a24: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000000 + 80004a28: 00053983 ld x19,0(x10) + 80004a2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80004a30: 00053803 ld x16,0(x10) + 80004a34: 00850513 addi x10,x10,8 + +0000000080004a38 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x27, x19, x16 # perform operation + 80004a38: 2909cdb3 xperm8 x27,x19,x16 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a3c: 000f3383 ld x7,0(x30) + 80004a40: 01b38c63 beq x7,x27,80004a58 + 80004a44: 2d40346f jal x8,80007d18 + 80004a48: 80004a38 .word 0x80004a38 + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 80015fbd .word 0x80015fbd + 80004a54: 00000000 .word 0x00000000 + 80004a58: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000100000000 + 80004a5c: 00053a83 ld x21,0(x10) + 80004a60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5555555555555555 + 80004a64: 00053d03 ld x26,0(x10) + 80004a68: 00850513 addi x10,x10,8 + +0000000080004a6c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + xperm8 x28, x21, x26 # perform operation + 80004a6c: 29aace33 xperm8 x28,x21,x26 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a70: 000f3383 ld x7,0(x30) + 80004a74: 01c38c63 beq x7,x28,80004a8c + 80004a78: 2a00346f jal x8,80007d18 + 80004a7c: 80004a6c .word 0x80004a6c + 80004a80: 00000000 .word 0x00000000 + 80004a84: 80016027 .word 0x80016027 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000000 + 80004a90: 00053603 ld x12,0(x10) + 80004a94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x00000000ffffffff + 80004a98: 00053683 ld x13,0(x10) + 80004a9c: 00850513 addi x10,x10,8 + +0000000080004aa0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + xperm8 x6, x12, x13 # perform operation + 80004aa0: 28d64333 xperm8 x6,x12,x13 + # Check if x6 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x6, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa4: 000f3383 ld x7,0(x30) + 80004aa8: 00638c63 beq x7,x6,80004ac0 + 80004aac: 26c0346f jal x8,80007d18 + 80004ab0: 80004aa0 .word 0x80004aa0 + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 80016091 .word 0x80016091 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000100000000 + 80004ac4: 00053583 ld x11,0(x10) + 80004ac8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 80004acc: 00053483 ld x9,0(x10) + 80004ad0: 00850513 addi x10,x10,8 + +0000000080004ad4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + xperm8 x19, x11, x9 # perform operation + 80004ad4: 2895c9b3 xperm8 x19,x11,x9 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad8: 000f3383 ld x7,0(x30) + 80004adc: 01338c63 beq x7,x19,80004af4 + 80004ae0: 2380346f jal x8,80007d18 + 80004ae4: 80004ad4 .word 0x80004ad4 + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 800160f3 .word 0x800160f3 + 80004af0: 00000000 .word 0x00000000 + 80004af4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000100000000 + 80004af8: 00053683 ld x13,0(x10) + 80004afc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000100000000 + 80004b00: 00053583 ld x11,0(x10) + 80004b04: 00850513 addi x10,x10,8 + +0000000080004b08 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + xperm8 x31, x13, x11 # perform operation + 80004b08: 28b6cfb3 xperm8 x31,x13,x11 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b0c: 000f3383 ld x7,0(x30) + 80004b10: 01f38c63 beq x7,x31,80004b28 + 80004b14: 2040346f jal x8,80007d18 + 80004b18: 80004b08 .word 0x80004b08 + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 80016155 .word 0x80016155 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004b2c: 00053303 ld x6,0(x10) + 80004b30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000001 + 80004b34: 00053783 ld x15,0(x10) + 80004b38: 00850513 addi x10,x10,8 + +0000000080004b3c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + xperm8 x13, x6, x15 # perform operation + 80004b3c: 28f346b3 xperm8 x13,x6,x15 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b40: 000f3383 ld x7,0(x30) + 80004b44: 00d38c63 beq x7,x13,80004b5c + 80004b48: 1d00346f jal x8,80007d18 + 80004b4c: 80004b3c .word 0x80004b3c + 80004b50: 00000000 .word 0x00000000 + 80004b54: 800161b8 .word 0x800161b8 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000100000001 + 80004b60: 00053583 ld x11,0(x10) + 80004b64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000000 + 80004b68: 00053683 ld x13,0(x10) + 80004b6c: 00850513 addi x10,x10,8 + +0000000080004b70 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + xperm8 x5, x11, x13 # perform operation + 80004b70: 28d5c2b3 xperm8 x5,x11,x13 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b74: 000f3383 ld x7,0(x30) + 80004b78: 00538c63 beq x7,x5,80004b90 + 80004b7c: 19c0346f jal x8,80007d18 + 80004b80: 80004b70 .word 0x80004b70 + 80004b84: 00000000 .word 0x00000000 + 80004b88: 8001621b .word 0x8001621b + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000001 + 80004b94: 00053a03 ld x20,0(x10) + 80004b98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000001 + 80004b9c: 00053b83 ld x23,0(x10) + 80004ba0: 00850513 addi x10,x10,8 + +0000000080004ba4 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + xperm8 x3, x20, x23 # perform operation + 80004ba4: 297a41b3 xperm8 x3,x20,x23 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba8: 000f3383 ld x7,0(x30) + 80004bac: 00338c63 beq x7,x3,80004bc4 + 80004bb0: 1680346f jal x8,80007d18 + 80004bb4: 80004ba4 .word 0x80004ba4 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 80016276 .word 0x80016276 + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000100000001 + 80004bc8: 00053283 ld x5,0(x10) + 80004bcc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000002 + 80004bd0: 00053883 ld x17,0(x10) + 80004bd4: 00850513 addi x10,x10,8 + +0000000080004bd8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + xperm8 x26, x5, x17 # perform operation + 80004bd8: 2912cd33 xperm8 x26,x5,x17 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bdc: 000f3383 ld x7,0(x30) + 80004be0: 01a38c63 beq x7,x26,80004bf8 + 80004be4: 1340346f jal x8,80007d18 + 80004be8: 80004bd8 .word 0x80004bd8 + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 800162d1 .word 0x800162d1 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000100000001 + 80004bfc: 00053c83 ld x25,0(x10) + 80004c00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x8000000000000000 + 80004c04: 00053583 ld x11,0(x10) + 80004c08: 00850513 addi x10,x10,8 + +0000000080004c0c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + xperm8 x4, x25, x11 # perform operation + 80004c0c: 28bcc233 xperm8 x4,x25,x11 + # Check if x4 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x4, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c10: 000f3383 ld x7,0(x30) + 80004c14: 00438c63 beq x7,x4,80004c2c + 80004c18: 1000346f jal x8,80007d18 + 80004c1c: 80004c0c .word 0x80004c0c + 80004c20: 00000000 .word 0x00000000 + 80004c24: 8001632c .word 0x8001632c + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000001 + 80004c30: 00053a03 ld x20,0(x10) + 80004c34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80004c38: 00053303 ld x6,0(x10) + 80004c3c: 00850513 addi x10,x10,8 + +0000000080004c40 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + xperm8 x25, x20, x6 # perform operation + 80004c40: 286a4cb3 xperm8 x25,x20,x6 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c44: 000f3383 ld x7,0(x30) + 80004c48: 01938c63 beq x7,x25,80004c60 + 80004c4c: 0cc0346f jal x8,80007d18 + 80004c50: 80004c40 .word 0x80004c40 + 80004c54: 00000000 .word 0x00000000 + 80004c58: 80016396 .word 0x80016396 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000001 + 80004c64: 00053483 ld x9,0(x10) + 80004c68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7fffffffffffffff + 80004c6c: 00053983 ld x19,0(x10) + 80004c70: 00850513 addi x10,x10,8 + +0000000080004c74 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + xperm8 x1, x9, x19 # perform operation + 80004c74: 2934c0b3 xperm8 x1,x9,x19 + # Check if x1 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x1, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c78: 000f3383 ld x7,0(x30) + 80004c7c: 00138c63 beq x7,x1,80004c94 + 80004c80: 0980346f jal x8,80007d18 + 80004c84: 80004c74 .word 0x80004c74 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 80016400 .word 0x80016400 + 80004c90: 00000000 .word 0x00000000 + 80004c94: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000100000001 + 80004c98: 00053a83 ld x21,0(x10) + 80004c9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7ffffffffffffffe + 80004ca0: 00053b83 ld x23,0(x10) + 80004ca4: 00850513 addi x10,x10,8 + +0000000080004ca8 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + xperm8 x18, x21, x23 # perform operation + 80004ca8: 297ac933 xperm8 x18,x21,x23 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cac: 000f3383 ld x7,0(x30) + 80004cb0: 01238c63 beq x7,x18,80004cc8 + 80004cb4: 0640346f jal x8,80007d18 + 80004cb8: 80004ca8 .word 0x80004ca8 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 8001646a .word 0x8001646a + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000100000001 + 80004ccc: 00053283 ld x5,0(x10) + 80004cd0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xffffffffffffffff + 80004cd4: 00053903 ld x18,0(x10) + 80004cd8: 00850513 addi x10,x10,8 + +0000000080004cdc : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + xperm8 x3, x5, x18 # perform operation + 80004cdc: 2922c1b3 xperm8 x3,x5,x18 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce0: 000f3383 ld x7,0(x30) + 80004ce4: 00338c63 beq x7,x3,80004cfc + 80004ce8: 0300346f jal x8,80007d18 + 80004cec: 80004cdc .word 0x80004cdc + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 800164d4 .word 0x800164d4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000001 + 80004d00: 00053603 ld x12,0(x10) + 80004d04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xfffffffffffffffe + 80004d08: 00053d83 ld x27,0(x10) + 80004d0c: 00850513 addi x10,x10,8 + +0000000080004d10 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + xperm8 x24, x12, x27 # perform operation + 80004d10: 29b64c33 xperm8 x24,x12,x27 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d14: 000f3383 ld x7,0(x30) + 80004d18: 01838c63 beq x7,x24,80004d30 + 80004d1c: 7fd0246f jal x8,80007d18 + 80004d20: 80004d10 .word 0x80004d10 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 8001653e .word 0x8001653e + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000001 + 80004d34: 00053b03 ld x22,0(x10) + 80004d38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004d3c: 00053683 ld x13,0(x10) + 80004d40: 00850513 addi x10,x10,8 + +0000000080004d44 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + xperm8 x9, x22, x13 # perform operation + 80004d44: 28db44b3 xperm8 x9,x22,x13 + # Check if x9 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x9, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d48: 000f3383 ld x7,0(x30) + 80004d4c: 00938c63 beq x7,x9,80004d64 + 80004d50: 7c90246f jal x8,80007d18 + 80004d54: 80004d44 .word 0x80004d44 + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 800165a8 .word 0x800165a8 + 80004d60: 00000000 .word 0x00000000 + 80004d64: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000100000001 + 80004d68: 00053f83 ld x31,0(x10) + 80004d6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xaaaaaaaaaaaaaaaa + 80004d70: 00053b83 ld x23,0(x10) + 80004d74: 00850513 addi x10,x10,8 + +0000000080004d78 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + xperm8 x2, x31, x23 # perform operation + 80004d78: 297fc133 xperm8 x2,x31,x23 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d7c: 000f3383 ld x7,0(x30) + 80004d80: 00238c63 beq x7,x2,80004d98 + 80004d84: 7950246f jal x8,80007d18 + 80004d88: 80004d78 .word 0x80004d78 + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 80016612 .word 0x80016612 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000100000001 + 80004d9c: 00053083 ld x1,0(x10) + 80004da0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5555555555555555 + 80004da4: 00053d83 ld x27,0(x10) + 80004da8: 00850513 addi x10,x10,8 + +0000000080004dac : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + xperm8 x13, x1, x27 # perform operation + 80004dac: 29b0c6b3 xperm8 x13,x1,x27 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db0: 000f3383 ld x7,0(x30) + 80004db4: 00d38c63 beq x7,x13,80004dcc + 80004db8: 7610246f jal x8,80007d18 + 80004dbc: 80004dac .word 0x80004dac + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 8001667c .word 0x8001667c + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000001 + 80004dd0: 00053103 ld x2,0(x10) + 80004dd4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000000ffffffff + 80004dd8: 00053b03 ld x22,0(x10) + 80004ddc: 00850513 addi x10,x10,8 + +0000000080004de0 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + xperm8 x14, x2, x22 # perform operation + 80004de0: 29614733 xperm8 x14,x2,x22 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de4: 000f3383 ld x7,0(x30) + 80004de8: 00e38c63 beq x7,x14,80004e00 + 80004dec: 72d0246f jal x8,80007d18 + 80004df0: 80004de0 .word 0x80004de0 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 800166e6 .word 0x800166e6 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000001 + 80004e04: 00053103 ld x2,0(x10) + 80004e08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000fffffffe + 80004e0c: 00053c83 ld x25,0(x10) + 80004e10: 00850513 addi x10,x10,8 + +0000000080004e14 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + xperm8 x16, x2, x25 # perform operation + 80004e14: 29914833 xperm8 x16,x2,x25 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e18: 000f3383 ld x7,0(x30) + 80004e1c: 01038c63 beq x7,x16,80004e34 + 80004e20: 6f90246f jal x8,80007d18 + 80004e24: 80004e14 .word 0x80004e14 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 80016748 .word 0x80016748 + 80004e30: 00000000 .word 0x00000000 + 80004e34: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0000000100000001 + 80004e38: 00053203 ld x4,0(x10) + 80004e3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000000 + 80004e40: 00053b03 ld x22,0(x10) + 80004e44: 00850513 addi x10,x10,8 + +0000000080004e48 : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + xperm8 x11, x4, x22 # perform operation + 80004e48: 296245b3 xperm8 x11,x4,x22 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e4c: 000f3383 ld x7,0(x30) + 80004e50: 00b38c63 beq x7,x11,80004e68 + 80004e54: 6c50246f jal x8,80007d18 + 80004e58: 80004e48 .word 0x80004e48 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 800167aa .word 0x800167aa + 80004e64: 00000000 .word 0x00000000 + 80004e68: 008f0f13 addi x30,x30,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000100000001 + 80004e6c: 00053b03 ld x22,0(x10) + 80004e70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x0000000100000001 + 80004e74: 00053a83 ld x21,0(x10) + 80004e78: 00850513 addi x10,x10,8 + +0000000080004e7c : +Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + xperm8 x19, x22, x21 # perform operation + 80004e7c: 295b49b3 xperm8 x19,x22,x21 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zbkx_xperm8_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e80: 000f3383 ld x7,0(x30) + 80004e84: 01338c63 beq x7,x19,80004e9c + 80004e88: 6910246f jal x8,80007d18 + 80004e8c: 80004e7c .word 0x80004e7c + 80004e90: 00000000 .word 0x00000000 + 80004e94: 8001680d .word 0x8001680d + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 008f0f13 addi x30,x30,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x5e6fb15343806b78 + 80004ea0: 00053003 ld x0,0(x10) + 80004ea4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xa65bee2dac39dda6 + 80004ea8: 00053003 ld x0,0(x10) + 80004eac: 00850513 addi x10,x10,8 + +0000000080004eb0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b0: + xperm8 x27, x0, x0 # perform operation + 80004eb0: 28004db3 xperm8 x27,x0,x0 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zbkx_xperm8_cg_cmp_rs1_rs2_b0, Zbkx_xperm8_cg_cmp_rs1_rs2_b0_str) + 80004eb4: 000f3383 ld x7,0(x30) + 80004eb8: 01b38c63 beq x7,x27,80004ed0 + 80004ebc: 65d0246f jal x8,80007d18 + 80004ec0: 80004eb0 .word 0x80004eb0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 80016870 .word 0x80016870 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xed4ac6b9247f41bc + 80004ed4: 00053083 ld x1,0(x10) + 80004ed8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xc716e732cc46fb01 + 80004edc: 00053083 ld x1,0(x10) + 80004ee0: 00850513 addi x10,x10,8 + +0000000080004ee4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b1: + xperm8 x3, x1, x1 # perform operation + 80004ee4: 2810c1b3 xperm8 x3,x1,x1 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b1, Zbkx_xperm8_cg_cmp_rs1_rs2_b1_str) + 80004ee8: 000f3383 ld x7,0(x30) + 80004eec: 00338c63 beq x7,x3,80004f04 + 80004ef0: 6290246f jal x8,80007d18 + 80004ef4: 80004ee4 .word 0x80004ee4 + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 800168aa .word 0x800168aa + 80004f00: 00000000 .word 0x00000000 + 80004f04: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x31ac37f739e7cbb7 + 80004f08: 00053103 ld x2,0(x10) + 80004f0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x51262d7d7b97823f + 80004f10: 00053103 ld x2,0(x10) + 80004f14: 00850513 addi x10,x10,8 + +0000000080004f18 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b2: + xperm8 x24, x2, x2 # perform operation + 80004f18: 28214c33 xperm8 x24,x2,x2 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zbkx_xperm8_cg_cmp_rs1_rs2_b2, Zbkx_xperm8_cg_cmp_rs1_rs2_b2_str) + 80004f1c: 000f3383 ld x7,0(x30) + 80004f20: 01838c63 beq x7,x24,80004f38 + 80004f24: 5f50246f jal x8,80007d18 + 80004f28: 80004f18 .word 0x80004f18 + 80004f2c: 00000000 .word 0x00000000 + 80004f30: 800168e4 .word 0x800168e4 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xb222489ddd42b9b0 + 80004f3c: 00053183 ld x3,0(x10) + 80004f40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x4f6f5761ea79e7c3 + 80004f44: 00053183 ld x3,0(x10) + 80004f48: 00850513 addi x10,x10,8 + +0000000080004f4c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b3: + xperm8 x2, x3, x3 # perform operation + 80004f4c: 2831c133 xperm8 x2,x3,x3 + # Check if x2 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x2, Zbkx_xperm8_cg_cmp_rs1_rs2_b3, Zbkx_xperm8_cg_cmp_rs1_rs2_b3_str) + 80004f50: 000f3383 ld x7,0(x30) + 80004f54: 00238c63 beq x7,x2,80004f6c + 80004f58: 5c10246f jal x8,80007d18 + 80004f5c: 80004f4c .word 0x80004f4c + 80004f60: 00000000 .word 0x00000000 + 80004f64: 8001691e .word 0x8001691e + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xd35a70f6a9a07e9d + 80004f70: 00053203 ld x4,0(x10) + 80004f74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xf3917b9eed3edc39 + 80004f78: 00053203 ld x4,0(x10) + 80004f7c: 00850513 addi x10,x10,8 + +0000000080004f80 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b4: + xperm8 x3, x4, x4 # perform operation + 80004f80: 284241b3 xperm8 x3,x4,x4 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b4, Zbkx_xperm8_cg_cmp_rs1_rs2_b4_str) + 80004f84: 000f3383 ld x7,0(x30) + 80004f88: 00338c63 beq x7,x3,80004fa0 + 80004f8c: 58d0246f jal x8,80007d18 + 80004f90: 80004f80 .word 0x80004f80 + 80004f94: 00000000 .word 0x00000000 + 80004f98: 80016958 .word 0x80016958 + 80004f9c: 00000000 .word 0x00000000 + 80004fa0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x9719cebef20306c5 + 80004fa4: 00053283 ld x5,0(x10) + 80004fa8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x4d9d15af1ad1c4d2 + 80004fac: 00053283 ld x5,0(x10) + 80004fb0: 00850513 addi x10,x10,8 + +0000000080004fb4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b5: + xperm8 x20, x5, x5 # perform operation + 80004fb4: 2852ca33 xperm8 x20,x5,x5 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b5, Zbkx_xperm8_cg_cmp_rs1_rs2_b5_str) + 80004fb8: 000f3383 ld x7,0(x30) + 80004fbc: 01438c63 beq x7,x20,80004fd4 + 80004fc0: 5590246f jal x8,80007d18 + 80004fc4: 80004fb4 .word 0x80004fb4 + 80004fc8: 00000000 .word 0x00000000 + 80004fcc: 80016992 .word 0x80016992 + 80004fd0: 00000000 .word 0x00000000 + 80004fd4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xdba1116f7691e2f6 + 80004fd8: 00053303 ld x6,0(x10) + 80004fdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x01721fb76f7342b0 + 80004fe0: 00053303 ld x6,0(x10) + 80004fe4: 00850513 addi x10,x10,8 + +0000000080004fe8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b6: + xperm8 x20, x6, x6 # perform operation + 80004fe8: 28634a33 xperm8 x20,x6,x6 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b6, Zbkx_xperm8_cg_cmp_rs1_rs2_b6_str) + 80004fec: 000f3383 ld x7,0(x30) + 80004ff0: 01438c63 beq x7,x20,80005008 + 80004ff4: 5250246f jal x8,80007d18 + 80004ff8: 80004fe8 .word 0x80004fe8 + 80004ffc: 00000000 .word 0x00000000 + 80005000: 800169cc .word 0x800169cc + 80005004: 00000000 .word 0x00000000 + 80005008: 008f0f13 addi x30,x30,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000500c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005010: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xaa300f43c16e1553 + 80005014: 00053383 ld x7,0(x10) + 80005018: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0xe18f1083acdca10d + 8000501c: 00053383 ld x7,0(x10) + 80005020: 00850513 addi x10,x10,8 + +0000000080005024 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b7: + xperm8 x1, x7, x7 # perform operation + 80005024: 2873c0b3 xperm8 x1,x7,x7 + # Check if x1 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x1, Zbkx_xperm8_cg_cmp_rs1_rs2_b7, Zbkx_xperm8_cg_cmp_rs1_rs2_b7_str) + 80005028: 000f3683 ld x13,0(x30) + 8000502c: 00168c63 beq x13,x1,80005044 + 80005030: 5110276f jal x14,80007d40 + 80005034: 80005024 .word 0x80005024 + 80005038: 00000000 .word 0x00000000 + 8000503c: 80016a06 .word 0x80016a06 + 80005040: 00000000 .word 0x00000000 + 80005044: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6ce53a195f4c8282 + 80005048: 00053403 ld x8,0(x10) + 8000504c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x44402daa707a6336 + 80005050: 00053403 ld x8,0(x10) + 80005054: 00850513 addi x10,x10,8 + +0000000080005058 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b8: + xperm8 x3, x8, x8 # perform operation + 80005058: 288441b3 xperm8 x3,x8,x8 + # Check if x3 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b8, Zbkx_xperm8_cg_cmp_rs1_rs2_b8_str) + 8000505c: 000f3683 ld x13,0(x30) + 80005060: 00368c63 beq x13,x3,80005078 + 80005064: 4dd0276f jal x14,80007d40 + 80005068: 80005058 .word 0x80005058 + 8000506c: 00000000 .word 0x00000000 + 80005070: 80016a40 .word 0x80016a40 + 80005074: 00000000 .word 0x00000000 + 80005078: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xb43d90ebb806f0eb + 8000507c: 00053483 ld x9,0(x10) + 80005080: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xf0f7341f853bc0f4 + 80005084: 00053483 ld x9,0(x10) + 80005088: 00850513 addi x10,x10,8 + +000000008000508c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b9: + xperm8 x12, x9, x9 # perform operation + 8000508c: 2894c633 xperm8 x12,x9,x9 + # Check if x12 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x12, Zbkx_xperm8_cg_cmp_rs1_rs2_b9, Zbkx_xperm8_cg_cmp_rs1_rs2_b9_str) + 80005090: 000f3683 ld x13,0(x30) + 80005094: 00c68c63 beq x13,x12,800050ac + 80005098: 4a90276f jal x14,80007d40 + 8000509c: 8000508c .word 0x8000508c + 800050a0: 00000000 .word 0x00000000 + 800050a4: 80016a7a .word 0x80016a7a + 800050a8: 00000000 .word 0x00000000 + 800050ac: 008f0f13 addi x30,x30,8 + + mv x23, x10 # switch data pointer register to avoid conflict with test + 800050b0: 00050b93 addi x23,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x5b808b864ff81945 + 800050b4: 000bb503 ld x10,0(x23) + 800050b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x3bbf70c9c1a59c13 + 800050bc: 000bb503 ld x10,0(x23) + 800050c0: 008b8b93 addi x23,x23,8 + +00000000800050c4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b10: + xperm8 x19, x10, x10 # perform operation + 800050c4: 28a549b3 xperm8 x19,x10,x10 + # Check if x19 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x19, Zbkx_xperm8_cg_cmp_rs1_rs2_b10, Zbkx_xperm8_cg_cmp_rs1_rs2_b10_str) + 800050c8: 000f3683 ld x13,0(x30) + 800050cc: 01368c63 beq x13,x19,800050e4 + 800050d0: 4710276f jal x14,80007d40 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 80016ab4 .word 0x80016ab4 + 800050e0: 00000000 .word 0x00000000 + 800050e4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xeeef3c56f1b8ee9f + 800050e8: 000bb583 ld x11,0(x23) + 800050ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0xf09b7291f24e125b + 800050f0: 000bb583 ld x11,0(x23) + 800050f4: 008b8b93 addi x23,x23,8 + +00000000800050f8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b11: + xperm8 x26, x11, x11 # perform operation + 800050f8: 28b5cd33 xperm8 x26,x11,x11 + # Check if x26 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x26, Zbkx_xperm8_cg_cmp_rs1_rs2_b11, Zbkx_xperm8_cg_cmp_rs1_rs2_b11_str) + 800050fc: 000f3683 ld x13,0(x30) + 80005100: 01a68c63 beq x13,x26,80005118 + 80005104: 43d0276f jal x14,80007d40 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 80016aef .word 0x80016aef + 80005114: 00000000 .word 0x00000000 + 80005118: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x9b585989a9260ea6 + 8000511c: 000bb603 ld x12,0(x23) + 80005120: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x9d98a3d6e6deb709 + 80005124: 000bb603 ld x12,0(x23) + 80005128: 008b8b93 addi x23,x23,8 + +000000008000512c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b12: + xperm8 x27, x12, x12 # perform operation + 8000512c: 28c64db3 xperm8 x27,x12,x12 + # Check if x27 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x27, Zbkx_xperm8_cg_cmp_rs1_rs2_b12, Zbkx_xperm8_cg_cmp_rs1_rs2_b12_str) + 80005130: 000f3683 ld x13,0(x30) + 80005134: 01b68c63 beq x13,x27,8000514c + 80005138: 4090276f jal x14,80007d40 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 80016b2a .word 0x80016b2a + 80005148: 00000000 .word 0x00000000 + 8000514c: 008f0f13 addi x30,x30,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005150: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005154: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x59352c0522bf90ad + 80005158: 000bb683 ld x13,0(x23) + 8000515c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x8f95757b99b3bfa7 + 80005160: 000bb683 ld x13,0(x23) + 80005164: 008b8b93 addi x23,x23,8 + +0000000080005168 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b13: + xperm8 x15, x13, x13 # perform operation + 80005168: 28d6c7b3 xperm8 x15,x13,x13 + # Check if x15 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x15, Zbkx_xperm8_cg_cmp_rs1_rs2_b13, Zbkx_xperm8_cg_cmp_rs1_rs2_b13_str) + 8000516c: 000f3203 ld x4,0(x30) + 80005170: 00f20c63 beq x4,x15,80005188 + 80005174: 38d022ef jal x5,80007d00 + 80005178: 80005168 .word 0x80005168 + 8000517c: 00000000 .word 0x00000000 + 80005180: 80016b65 .word 0x80016b65 + 80005184: 00000000 .word 0x00000000 + 80005188: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0x0b92431826cc2f6c + 8000518c: 000bb703 ld x14,0(x23) + 80005190: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x21bd3a771a469796 + 80005194: 000bb703 ld x14,0(x23) + 80005198: 008b8b93 addi x23,x23,8 + +000000008000519c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b14: + xperm8 x20, x14, x14 # perform operation + 8000519c: 28e74a33 xperm8 x20,x14,x14 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b14, Zbkx_xperm8_cg_cmp_rs1_rs2_b14_str) + 800051a0: 000f3203 ld x4,0(x30) + 800051a4: 01420c63 beq x4,x20,800051bc + 800051a8: 359022ef jal x5,80007d00 + 800051ac: 8000519c .word 0x8000519c + 800051b0: 00000000 .word 0x00000000 + 800051b4: 80016ba0 .word 0x80016ba0 + 800051b8: 00000000 .word 0x00000000 + 800051bc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xc8acbc14e60a7ac7 + 800051c0: 000bb783 ld x15,0(x23) + 800051c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x074c9e4ca87d2d5a + 800051c8: 000bb783 ld x15,0(x23) + 800051cc: 008b8b93 addi x23,x23,8 + +00000000800051d0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b15: + xperm8 x20, x15, x15 # perform operation + 800051d0: 28f7ca33 xperm8 x20,x15,x15 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zbkx_xperm8_cg_cmp_rs1_rs2_b15, Zbkx_xperm8_cg_cmp_rs1_rs2_b15_str) + 800051d4: 000f3203 ld x4,0(x30) + 800051d8: 01420c63 beq x4,x20,800051f0 + 800051dc: 325022ef jal x5,80007d00 + 800051e0: 800051d0 .word 0x800051d0 + 800051e4: 00000000 .word 0x00000000 + 800051e8: 80016bdb .word 0x80016bdb + 800051ec: 00000000 .word 0x00000000 + 800051f0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x34ef5cc991717116 + 800051f4: 000bb803 ld x16,0(x23) + 800051f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x88257bfa59de2d7a + 800051fc: 000bb803 ld x16,0(x23) + 80005200: 008b8b93 addi x23,x23,8 + +0000000080005204 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b16: + xperm8 x22, x16, x16 # perform operation + 80005204: 29084b33 xperm8 x22,x16,x16 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zbkx_xperm8_cg_cmp_rs1_rs2_b16, Zbkx_xperm8_cg_cmp_rs1_rs2_b16_str) + 80005208: 000f3203 ld x4,0(x30) + 8000520c: 01620c63 beq x4,x22,80005224 + 80005210: 2f1022ef jal x5,80007d00 + 80005214: 80005204 .word 0x80005204 + 80005218: 00000000 .word 0x00000000 + 8000521c: 80016c16 .word 0x80016c16 + 80005220: 00000000 .word 0x00000000 + 80005224: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x15f27cf24d0ac4ab + 80005228: 000bb883 ld x17,0(x23) + 8000522c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x07f3aebd84a51da7 + 80005230: 000bb883 ld x17,0(x23) + 80005234: 008b8b93 addi x23,x23,8 + +0000000080005238 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b17: + xperm8 x28, x17, x17 # perform operation + 80005238: 2918ce33 xperm8 x28,x17,x17 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zbkx_xperm8_cg_cmp_rs1_rs2_b17, Zbkx_xperm8_cg_cmp_rs1_rs2_b17_str) + 8000523c: 000f3203 ld x4,0(x30) + 80005240: 01c20c63 beq x4,x28,80005258 + 80005244: 2bd022ef jal x5,80007d00 + 80005248: 80005238 .word 0x80005238 + 8000524c: 00000000 .word 0x00000000 + 80005250: 80016c51 .word 0x80016c51 + 80005254: 00000000 .word 0x00000000 + 80005258: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x06c27a2b783033e9 + 8000525c: 000bb903 ld x18,0(x23) + 80005260: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x683cebb09ca7baac + 80005264: 000bb903 ld x18,0(x23) + 80005268: 008b8b93 addi x23,x23,8 + +000000008000526c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b18: + xperm8 x28, x18, x18 # perform operation + 8000526c: 29294e33 xperm8 x28,x18,x18 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zbkx_xperm8_cg_cmp_rs1_rs2_b18, Zbkx_xperm8_cg_cmp_rs1_rs2_b18_str) + 80005270: 000f3203 ld x4,0(x30) + 80005274: 01c20c63 beq x4,x28,8000528c + 80005278: 289022ef jal x5,80007d00 + 8000527c: 8000526c .word 0x8000526c + 80005280: 00000000 .word 0x00000000 + 80005284: 80016c8c .word 0x80016c8c + 80005288: 00000000 .word 0x00000000 + 8000528c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x96396a6a9a5fc99d + 80005290: 000bb983 ld x19,0(x23) + 80005294: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x18451b822b156859 + 80005298: 000bb983 ld x19,0(x23) + 8000529c: 008b8b93 addi x23,x23,8 + +00000000800052a0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b19: + xperm8 x21, x19, x19 # perform operation + 800052a0: 2939cab3 xperm8 x21,x19,x19 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b19, Zbkx_xperm8_cg_cmp_rs1_rs2_b19_str) + 800052a4: 000f3203 ld x4,0(x30) + 800052a8: 01520c63 beq x4,x21,800052c0 + 800052ac: 255022ef jal x5,80007d00 + 800052b0: 800052a0 .word 0x800052a0 + 800052b4: 00000000 .word 0x00000000 + 800052b8: 80016cc7 .word 0x80016cc7 + 800052bc: 00000000 .word 0x00000000 + 800052c0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x518384110b0ba1fc + 800052c4: 000bba03 ld x20,0(x23) + 800052c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xabe2ce75d1fc138c + 800052cc: 000bba03 ld x20,0(x23) + 800052d0: 008b8b93 addi x23,x23,8 + +00000000800052d4 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b20: + xperm8 x24, x20, x20 # perform operation + 800052d4: 294a4c33 xperm8 x24,x20,x20 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zbkx_xperm8_cg_cmp_rs1_rs2_b20, Zbkx_xperm8_cg_cmp_rs1_rs2_b20_str) + 800052d8: 000f3203 ld x4,0(x30) + 800052dc: 01820c63 beq x4,x24,800052f4 + 800052e0: 221022ef jal x5,80007d00 + 800052e4: 800052d4 .word 0x800052d4 + 800052e8: 00000000 .word 0x00000000 + 800052ec: 80016d02 .word 0x80016d02 + 800052f0: 00000000 .word 0x00000000 + 800052f4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x1ac41bb01e405875 + 800052f8: 000bba83 ld x21,0(x23) + 800052fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x34f7047fe791c9db + 80005300: 000bba83 ld x21,0(x23) + 80005304: 008b8b93 addi x23,x23,8 + +0000000080005308 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b21: + xperm8 x2, x21, x21 # perform operation + 80005308: 295ac133 xperm8 x2,x21,x21 + # Check if x2 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x2, Zbkx_xperm8_cg_cmp_rs1_rs2_b21, Zbkx_xperm8_cg_cmp_rs1_rs2_b21_str) + 8000530c: 000f3203 ld x4,0(x30) + 80005310: 00220c63 beq x4,x2,80005328 + 80005314: 1ed022ef jal x5,80007d00 + 80005318: 80005308 .word 0x80005308 + 8000531c: 00000000 .word 0x00000000 + 80005320: 80016d3d .word 0x80016d3d + 80005324: 00000000 .word 0x00000000 + 80005328: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xc15c23c20c2c0834 + 8000532c: 000bbb03 ld x22,0(x23) + 80005330: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xb93d22509897dd1f + 80005334: 000bbb03 ld x22,0(x23) + 80005338: 008b8b93 addi x23,x23,8 + +000000008000533c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b22: + xperm8 x28, x22, x22 # perform operation + 8000533c: 296b4e33 xperm8 x28,x22,x22 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zbkx_xperm8_cg_cmp_rs1_rs2_b22, Zbkx_xperm8_cg_cmp_rs1_rs2_b22_str) + 80005340: 000f3203 ld x4,0(x30) + 80005344: 01c20c63 beq x4,x28,8000535c + 80005348: 1b9022ef jal x5,80007d00 + 8000534c: 8000533c .word 0x8000533c + 80005350: 00000000 .word 0x00000000 + 80005354: 80016d78 .word 0x80016d78 + 80005358: 00000000 .word 0x00000000 + 8000535c: 008f0f13 addi x30,x30,8 + + mv x27, x23 # switch data pointer register to avoid conflict with test + 80005360: 000b8d93 addi x27,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x72b92c2886e8e656 + 80005364: 000dbb83 ld x23,0(x27) + 80005368: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x9d4457f3b03dc585 + 8000536c: 000dbb83 ld x23,0(x27) + 80005370: 008d8d93 addi x27,x27,8 + +0000000080005374 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b23: + xperm8 x12, x23, x23 # perform operation + 80005374: 297bc633 xperm8 x12,x23,x23 + # Check if x12 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x12, Zbkx_xperm8_cg_cmp_rs1_rs2_b23, Zbkx_xperm8_cg_cmp_rs1_rs2_b23_str) + 80005378: 000f3203 ld x4,0(x30) + 8000537c: 00c20c63 beq x4,x12,80005394 + 80005380: 181022ef jal x5,80007d00 + 80005384: 80005374 .word 0x80005374 + 80005388: 00000000 .word 0x00000000 + 8000538c: 80016db3 .word 0x80016db3 + 80005390: 00000000 .word 0x00000000 + 80005394: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x101e72ec639ffaee + 80005398: 000dbc03 ld x24,0(x27) + 8000539c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x898373f14590205d + 800053a0: 000dbc03 ld x24,0(x27) + 800053a4: 008d8d93 addi x27,x27,8 + +00000000800053a8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b24: + xperm8 x3, x24, x24 # perform operation + 800053a8: 298c41b3 xperm8 x3,x24,x24 + # Check if x3 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x3, Zbkx_xperm8_cg_cmp_rs1_rs2_b24, Zbkx_xperm8_cg_cmp_rs1_rs2_b24_str) + 800053ac: 000f3203 ld x4,0(x30) + 800053b0: 00320c63 beq x4,x3,800053c8 + 800053b4: 14d022ef jal x5,80007d00 + 800053b8: 800053a8 .word 0x800053a8 + 800053bc: 00000000 .word 0x00000000 + 800053c0: 80016dee .word 0x80016dee + 800053c4: 00000000 .word 0x00000000 + 800053c8: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x9edb994dd87b0615 + 800053cc: 000dbc83 ld x25,0(x27) + 800053d0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0xe583454cbce3002a + 800053d4: 000dbc83 ld x25,0(x27) + 800053d8: 008d8d93 addi x27,x27,8 + +00000000800053dc : +Zbkx_xperm8_cg_cmp_rs1_rs2_b25: + xperm8 x17, x25, x25 # perform operation + 800053dc: 299cc8b3 xperm8 x17,x25,x25 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zbkx_xperm8_cg_cmp_rs1_rs2_b25, Zbkx_xperm8_cg_cmp_rs1_rs2_b25_str) + 800053e0: 000f3203 ld x4,0(x30) + 800053e4: 01120c63 beq x4,x17,800053fc + 800053e8: 119022ef jal x5,80007d00 + 800053ec: 800053dc .word 0x800053dc + 800053f0: 00000000 .word 0x00000000 + 800053f4: 80016e29 .word 0x80016e29 + 800053f8: 00000000 .word 0x00000000 + 800053fc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xf07f958267df3b20 + 80005400: 000dbd03 ld x26,0(x27) + 80005404: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x8c9da4af712e4348 + 80005408: 000dbd03 ld x26,0(x27) + 8000540c: 008d8d93 addi x27,x27,8 + +0000000080005410 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b26: + xperm8 x17, x26, x26 # perform operation + 80005410: 29ad48b3 xperm8 x17,x26,x26 + # Check if x17 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x17, Zbkx_xperm8_cg_cmp_rs1_rs2_b26, Zbkx_xperm8_cg_cmp_rs1_rs2_b26_str) + 80005414: 000f3203 ld x4,0(x30) + 80005418: 01120c63 beq x4,x17,80005430 + 8000541c: 0e5022ef jal x5,80007d00 + 80005420: 80005410 .word 0x80005410 + 80005424: 00000000 .word 0x00000000 + 80005428: 80016e64 .word 0x80016e64 + 8000542c: 00000000 .word 0x00000000 + 80005430: 008f0f13 addi x30,x30,8 + + mv x17, x27 # switch data pointer register to avoid conflict with test + 80005434: 000d8893 addi x17,x27,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xed332f1940cf113f + 80005438: 0008bd83 ld x27,0(x17) + 8000543c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xe9d774144e910f09 + 80005440: 0008bd83 ld x27,0(x17) + 80005444: 00888893 addi x17,x17,8 + +0000000080005448 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b27: + xperm8 x8, x27, x27 # perform operation + 80005448: 29bdc433 xperm8 x8,x27,x27 + # Check if x8 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x8, Zbkx_xperm8_cg_cmp_rs1_rs2_b27, Zbkx_xperm8_cg_cmp_rs1_rs2_b27_str) + 8000544c: 000f3203 ld x4,0(x30) + 80005450: 00820c63 beq x4,x8,80005468 + 80005454: 0ad022ef jal x5,80007d00 + 80005458: 80005448 .word 0x80005448 + 8000545c: 00000000 .word 0x00000000 + 80005460: 80016e9f .word 0x80016e9f + 80005464: 00000000 .word 0x00000000 + 80005468: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x995715a6dedbe15c + 8000546c: 0008be03 ld x28,0(x17) + 80005470: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x608451189c09c7b2 + 80005474: 0008be03 ld x28,0(x17) + 80005478: 00888893 addi x17,x17,8 + +000000008000547c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b28: + xperm8 x7, x28, x28 # perform operation + 8000547c: 29ce43b3 xperm8 x7,x28,x28 + # Check if x7 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x7, Zbkx_xperm8_cg_cmp_rs1_rs2_b28, Zbkx_xperm8_cg_cmp_rs1_rs2_b28_str) + 80005480: 000f3203 ld x4,0(x30) + 80005484: 00720c63 beq x4,x7,8000549c + 80005488: 079022ef jal x5,80007d00 + 8000548c: 8000547c .word 0x8000547c + 80005490: 00000000 .word 0x00000000 + 80005494: 80016eda .word 0x80016eda + 80005498: 00000000 .word 0x00000000 + 8000549c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x353539472d5ebc4b + 800054a0: 0008be83 ld x29,0(x17) + 800054a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xd4243b6f2ddf4536 + 800054a8: 0008be83 ld x29,0(x17) + 800054ac: 00888893 addi x17,x17,8 + +00000000800054b0 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b29: + xperm8 x21, x29, x29 # perform operation + 800054b0: 29decab3 xperm8 x21,x29,x29 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zbkx_xperm8_cg_cmp_rs1_rs2_b29, Zbkx_xperm8_cg_cmp_rs1_rs2_b29_str) + 800054b4: 000f3203 ld x4,0(x30) + 800054b8: 01520c63 beq x4,x21,800054d0 + 800054bc: 045022ef jal x5,80007d00 + 800054c0: 800054b0 .word 0x800054b0 + 800054c4: 00000000 .word 0x00000000 + 800054c8: 80016f15 .word 0x80016f15 + 800054cc: 00000000 .word 0x00000000 + 800054d0: 008f0f13 addi x30,x30,8 + + mv x6, x30 # switch signature pointer register to avoid conflict with test + 800054d4: 000f0313 addi x6,x30,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xcdcb64eb9da38dfe + 800054d8: 0008bf03 ld x30,0(x17) + 800054dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x4d18e8d9bac31e8d + 800054e0: 0008bf03 ld x30,0(x17) + 800054e4: 00888893 addi x17,x17,8 + +00000000800054e8 : +Zbkx_xperm8_cg_cmp_rs1_rs2_b30: + xperm8 x15, x30, x30 # perform operation + 800054e8: 29ef47b3 xperm8 x15,x30,x30 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zbkx_xperm8_cg_cmp_rs1_rs2_b30, Zbkx_xperm8_cg_cmp_rs1_rs2_b30_str) + 800054ec: 00033203 ld x4,0(x6) + 800054f0: 00f20c63 beq x4,x15,80005508 + 800054f4: 00d022ef jal x5,80007d00 + 800054f8: 800054e8 .word 0x800054e8 + 800054fc: 00000000 .word 0x00000000 + 80005500: 80016f50 .word 0x80016f50 + 80005504: 00000000 .word 0x00000000 + 80005508: 00830313 addi x6,x6,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x733f3458f397fb53 + 8000550c: 0008bf83 ld x31,0(x17) + 80005510: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x34bb4da91246cb58 + 80005514: 0008bf83 ld x31,0(x17) + 80005518: 00888893 addi x17,x17,8 + +000000008000551c : +Zbkx_xperm8_cg_cmp_rs1_rs2_b31: + xperm8 x18, x31, x31 # perform operation + 8000551c: 29ffc933 xperm8 x18,x31,x31 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zbkx_xperm8_cg_cmp_rs1_rs2_b31, Zbkx_xperm8_cg_cmp_rs1_rs2_b31_str) + 80005520: 00033203 ld x4,0(x6) + 80005524: 01220c63 beq x4,x18,8000553c + 80005528: 7d8022ef jal x5,80007d00 + 8000552c: 8000551c .word 0x8000551c + 80005530: 00000000 .word 0x00000000 + 80005534: 80016f8b .word 0x80016f8b + 80005538: 00000000 .word 0x00000000 + 8000553c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xfcc339d9ec497a46 + 80005540: 0008b003 ld x0,0(x17) + 80005544: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xe9a9e54ed7ec9863 + 80005548: 0008b403 ld x8,0(x17) + 8000554c: 00888893 addi x17,x17,8 + +0000000080005550 : +Zbkx_xperm8_cg_cmp_rd_rs1_b0: + xperm8 x0, x0, x8 # perform operation + 80005550: 28804033 xperm8 x0,x0,x8 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zbkx_xperm8_cg_cmp_rd_rs1_b0, Zbkx_xperm8_cg_cmp_rd_rs1_b0_str) + 80005554: 00033203 ld x4,0(x6) + 80005558: 00020c63 beq x4,x0,80005570 + 8000555c: 7a4022ef jal x5,80007d00 + 80005560: 80005550 .word 0x80005550 + 80005564: 00000000 .word 0x00000000 + 80005568: 80016fc6 .word 0x80016fc6 + 8000556c: 00000000 .word 0x00000000 + 80005570: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xead46039ed16ff2c + 80005574: 0008b083 ld x1,0(x17) + 80005578: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xb9b5a4b8de6903a2 + 8000557c: 0008bc03 ld x24,0(x17) + 80005580: 00888893 addi x17,x17,8 + +0000000080005584 : +Zbkx_xperm8_cg_cmp_rd_rs1_b1: + xperm8 x1, x1, x24 # perform operation + 80005584: 2980c0b3 xperm8 x1,x1,x24 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zbkx_xperm8_cg_cmp_rd_rs1_b1, Zbkx_xperm8_cg_cmp_rd_rs1_b1_str) + 80005588: 00033203 ld x4,0(x6) + 8000558c: 00120c63 beq x4,x1,800055a4 + 80005590: 770022ef jal x5,80007d00 + 80005594: 80005584 .word 0x80005584 + 80005598: 00000000 .word 0x00000000 + 8000559c: 80016fff .word 0x80016fff + 800055a0: 00000000 .word 0x00000000 + 800055a4: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x5bdb4c9d20f793d0 + 800055a8: 0008b103 ld x2,0(x17) + 800055ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x689c703b0b59d37a + 800055b0: 0008be03 ld x28,0(x17) + 800055b4: 00888893 addi x17,x17,8 + +00000000800055b8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b2: + xperm8 x2, x2, x28 # perform operation + 800055b8: 29c14133 xperm8 x2,x2,x28 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zbkx_xperm8_cg_cmp_rd_rs1_b2, Zbkx_xperm8_cg_cmp_rd_rs1_b2_str) + 800055bc: 00033203 ld x4,0(x6) + 800055c0: 00220c63 beq x4,x2,800055d8 + 800055c4: 73c022ef jal x5,80007d00 + 800055c8: 800055b8 .word 0x800055b8 + 800055cc: 00000000 .word 0x00000000 + 800055d0: 80017038 .word 0x80017038 + 800055d4: 00000000 .word 0x00000000 + 800055d8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x4b06d5153e05f07d + 800055dc: 0008b183 ld x3,0(x17) + 800055e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x2d0c6aae4131d13c + 800055e4: 0008bf03 ld x30,0(x17) + 800055e8: 00888893 addi x17,x17,8 + +00000000800055ec : +Zbkx_xperm8_cg_cmp_rd_rs1_b3: + xperm8 x3, x3, x30 # perform operation + 800055ec: 29e1c1b3 xperm8 x3,x3,x30 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zbkx_xperm8_cg_cmp_rd_rs1_b3, Zbkx_xperm8_cg_cmp_rd_rs1_b3_str) + 800055f0: 00033203 ld x4,0(x6) + 800055f4: 00320c63 beq x4,x3,8000560c + 800055f8: 708022ef jal x5,80007d00 + 800055fc: 800055ec .word 0x800055ec + 80005600: 00000000 .word 0x00000000 + 80005604: 80017071 .word 0x80017071 + 80005608: 00000000 .word 0x00000000 + 8000560c: 00830313 addi x6,x6,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005610: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005614: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x8f002508aba24a21 + 80005618: 0008b203 ld x4,0(x17) + 8000561c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x1c6d14f91b335913 + 80005620: 0008be03 ld x28,0(x17) + 80005624: 00888893 addi x17,x17,8 + +0000000080005628 : +Zbkx_xperm8_cg_cmp_rd_rs1_b4: + xperm8 x4, x4, x28 # perform operation + 80005628: 29c24233 xperm8 x4,x4,x28 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zbkx_xperm8_cg_cmp_rd_rs1_b4, Zbkx_xperm8_cg_cmp_rd_rs1_b4_str) + 8000562c: 00033383 ld x7,0(x6) + 80005630: 00438c63 beq x7,x4,80005648 + 80005634: 6e40246f jal x8,80007d18 + 80005638: 80005628 .word 0x80005628 + 8000563c: 00000000 .word 0x00000000 + 80005640: 800170aa .word 0x800170aa + 80005644: 00000000 .word 0x00000000 + 80005648: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xbf305946318509b2 + 8000564c: 0008b283 ld x5,0(x17) + 80005650: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x8b1524f18bebaf59 + 80005654: 0008bd83 ld x27,0(x17) + 80005658: 00888893 addi x17,x17,8 + +000000008000565c : +Zbkx_xperm8_cg_cmp_rd_rs1_b5: + xperm8 x5, x5, x27 # perform operation + 8000565c: 29b2c2b3 xperm8 x5,x5,x27 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zbkx_xperm8_cg_cmp_rd_rs1_b5, Zbkx_xperm8_cg_cmp_rd_rs1_b5_str) + 80005660: 00033383 ld x7,0(x6) + 80005664: 00538c63 beq x7,x5,8000567c + 80005668: 6b00246f jal x8,80007d18 + 8000566c: 8000565c .word 0x8000565c + 80005670: 00000000 .word 0x00000000 + 80005674: 800170e3 .word 0x800170e3 + 80005678: 00000000 .word 0x00000000 + 8000567c: 00830313 addi x6,x6,8 + + mv x29, x6 # switch signature pointer register to avoid conflict with test + 80005680: 00030e93 addi x29,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xa1c995ce85663994 + 80005684: 0008b303 ld x6,0(x17) + 80005688: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x21c491cedfad68af + 8000568c: 0008ba83 ld x21,0(x17) + 80005690: 00888893 addi x17,x17,8 + +0000000080005694 : +Zbkx_xperm8_cg_cmp_rd_rs1_b6: + xperm8 x6, x6, x21 # perform operation + 80005694: 29534333 xperm8 x6,x6,x21 + # Check if x6 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x6, Zbkx_xperm8_cg_cmp_rd_rs1_b6, Zbkx_xperm8_cg_cmp_rd_rs1_b6_str) + 80005698: 000eb383 ld x7,0(x29) + 8000569c: 00638c63 beq x7,x6,800056b4 + 800056a0: 6780246f jal x8,80007d18 + 800056a4: 80005694 .word 0x80005694 + 800056a8: 00000000 .word 0x00000000 + 800056ac: 8001711c .word 0x8001711c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 008e8e93 addi x29,x29,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056b8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056bc: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xfd37bbda2b06f13d + 800056c0: 0008b383 ld x7,0(x17) + 800056c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x0f98d09f9686cf4c + 800056c8: 0008b003 ld x0,0(x17) + 800056cc: 00888893 addi x17,x17,8 + +00000000800056d0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b7: + xperm8 x7, x7, x0 # perform operation + 800056d0: 2803c3b3 xperm8 x7,x7,x0 + # Check if x7 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x7, Zbkx_xperm8_cg_cmp_rd_rs1_b7, Zbkx_xperm8_cg_cmp_rd_rs1_b7_str) + 800056d4: 000eb203 ld x4,0(x29) + 800056d8: 00720c63 beq x4,x7,800056f0 + 800056dc: 624022ef jal x5,80007d00 + 800056e0: 800056d0 .word 0x800056d0 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 80017155 .word 0x80017155 + 800056ec: 00000000 .word 0x00000000 + 800056f0: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xf162fdb32a9fe7c9 + 800056f4: 0008b403 ld x8,0(x17) + 800056f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x2fbf5af4df4542a3 + 800056fc: 0008b683 ld x13,0(x17) + 80005700: 00888893 addi x17,x17,8 + +0000000080005704 : +Zbkx_xperm8_cg_cmp_rd_rs1_b8: + xperm8 x8, x8, x13 # perform operation + 80005704: 28d44433 xperm8 x8,x8,x13 + # Check if x8 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x8, Zbkx_xperm8_cg_cmp_rd_rs1_b8, Zbkx_xperm8_cg_cmp_rd_rs1_b8_str) + 80005708: 000eb203 ld x4,0(x29) + 8000570c: 00820c63 beq x4,x8,80005724 + 80005710: 5f0022ef jal x5,80007d00 + 80005714: 80005704 .word 0x80005704 + 80005718: 00000000 .word 0x00000000 + 8000571c: 8001718e .word 0x8001718e + 80005720: 00000000 .word 0x00000000 + 80005724: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x45799c7cc1c9abd0 + 80005728: 0008b483 ld x9,0(x17) + 8000572c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x5309effe9b04e568 + 80005730: 0008b803 ld x16,0(x17) + 80005734: 00888893 addi x17,x17,8 + +0000000080005738 : +Zbkx_xperm8_cg_cmp_rd_rs1_b9: + xperm8 x9, x9, x16 # perform operation + 80005738: 2904c4b3 xperm8 x9,x9,x16 + # Check if x9 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x9, Zbkx_xperm8_cg_cmp_rd_rs1_b9, Zbkx_xperm8_cg_cmp_rd_rs1_b9_str) + 8000573c: 000eb203 ld x4,0(x29) + 80005740: 00920c63 beq x4,x9,80005758 + 80005744: 5bc022ef jal x5,80007d00 + 80005748: 80005738 .word 0x80005738 + 8000574c: 00000000 .word 0x00000000 + 80005750: 800171c7 .word 0x800171c7 + 80005754: 00000000 .word 0x00000000 + 80005758: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xb46be5779c7b8a79 + 8000575c: 0008b503 ld x10,0(x17) + 80005760: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x368b052c97ae93ce + 80005764: 0008b083 ld x1,0(x17) + 80005768: 00888893 addi x17,x17,8 + +000000008000576c : +Zbkx_xperm8_cg_cmp_rd_rs1_b10: + xperm8 x10, x10, x1 # perform operation + 8000576c: 28154533 xperm8 x10,x10,x1 + # Check if x10 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x10, Zbkx_xperm8_cg_cmp_rd_rs1_b10, Zbkx_xperm8_cg_cmp_rd_rs1_b10_str) + 80005770: 000eb203 ld x4,0(x29) + 80005774: 00a20c63 beq x4,x10,8000578c + 80005778: 588022ef jal x5,80007d00 + 8000577c: 8000576c .word 0x8000576c + 80005780: 00000000 .word 0x00000000 + 80005784: 80017200 .word 0x80017200 + 80005788: 00000000 .word 0x00000000 + 8000578c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7544eb0c9cca4662 + 80005790: 0008b583 ld x11,0(x17) + 80005794: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xf4d02a27ba54a153 + 80005798: 0008b403 ld x8,0(x17) + 8000579c: 00888893 addi x17,x17,8 + +00000000800057a0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b11: + xperm8 x11, x11, x8 # perform operation + 800057a0: 2885c5b3 xperm8 x11,x11,x8 + # Check if x11 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x11, Zbkx_xperm8_cg_cmp_rd_rs1_b11, Zbkx_xperm8_cg_cmp_rd_rs1_b11_str) + 800057a4: 000eb203 ld x4,0(x29) + 800057a8: 00b20c63 beq x4,x11,800057c0 + 800057ac: 554022ef jal x5,80007d00 + 800057b0: 800057a0 .word 0x800057a0 + 800057b4: 00000000 .word 0x00000000 + 800057b8: 8001723a .word 0x8001723a + 800057bc: 00000000 .word 0x00000000 + 800057c0: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0d996af1abd900c5 + 800057c4: 0008b603 ld x12,0(x17) + 800057c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x67d191d09d943c34 + 800057cc: 0008b903 ld x18,0(x17) + 800057d0: 00888893 addi x17,x17,8 + +00000000800057d4 : +Zbkx_xperm8_cg_cmp_rd_rs1_b12: + xperm8 x12, x12, x18 # perform operation + 800057d4: 29264633 xperm8 x12,x12,x18 + # Check if x12 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x12, Zbkx_xperm8_cg_cmp_rd_rs1_b12, Zbkx_xperm8_cg_cmp_rd_rs1_b12_str) + 800057d8: 000eb203 ld x4,0(x29) + 800057dc: 00c20c63 beq x4,x12,800057f4 + 800057e0: 520022ef jal x5,80007d00 + 800057e4: 800057d4 .word 0x800057d4 + 800057e8: 00000000 .word 0x00000000 + 800057ec: 80017274 .word 0x80017274 + 800057f0: 00000000 .word 0x00000000 + 800057f4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x2219a9f89e177ef5 + 800057f8: 0008b683 ld x13,0(x17) + 800057fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x1f35599a00fb3fd3 + 80005800: 0008b783 ld x15,0(x17) + 80005804: 00888893 addi x17,x17,8 + +0000000080005808 : +Zbkx_xperm8_cg_cmp_rd_rs1_b13: + xperm8 x13, x13, x15 # perform operation + 80005808: 28f6c6b3 xperm8 x13,x13,x15 + # Check if x13 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x13, Zbkx_xperm8_cg_cmp_rd_rs1_b13, Zbkx_xperm8_cg_cmp_rd_rs1_b13_str) + 8000580c: 000eb203 ld x4,0(x29) + 80005810: 00d20c63 beq x4,x13,80005828 + 80005814: 4ec022ef jal x5,80007d00 + 80005818: 80005808 .word 0x80005808 + 8000581c: 00000000 .word 0x00000000 + 80005820: 800172ae .word 0x800172ae + 80005824: 00000000 .word 0x00000000 + 80005828: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x3e05160b675b0b58 + 8000582c: 0008b703 ld x14,0(x17) + 80005830: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x728ed5a6292636ff + 80005834: 0008bc03 ld x24,0(x17) + 80005838: 00888893 addi x17,x17,8 + +000000008000583c : +Zbkx_xperm8_cg_cmp_rd_rs1_b14: + xperm8 x14, x14, x24 # perform operation + 8000583c: 29874733 xperm8 x14,x14,x24 + # Check if x14 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x14, Zbkx_xperm8_cg_cmp_rd_rs1_b14, Zbkx_xperm8_cg_cmp_rd_rs1_b14_str) + 80005840: 000eb203 ld x4,0(x29) + 80005844: 00e20c63 beq x4,x14,8000585c + 80005848: 4b8022ef jal x5,80007d00 + 8000584c: 8000583c .word 0x8000583c + 80005850: 00000000 .word 0x00000000 + 80005854: 800172e8 .word 0x800172e8 + 80005858: 00000000 .word 0x00000000 + 8000585c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x78c482b03bcc048a + 80005860: 0008b783 ld x15,0(x17) + 80005864: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x623c2777c5ba2de7 + 80005868: 0008bf83 ld x31,0(x17) + 8000586c: 00888893 addi x17,x17,8 + +0000000080005870 : +Zbkx_xperm8_cg_cmp_rd_rs1_b15: + xperm8 x15, x15, x31 # perform operation + 80005870: 29f7c7b3 xperm8 x15,x15,x31 + # Check if x15 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x15, Zbkx_xperm8_cg_cmp_rd_rs1_b15, Zbkx_xperm8_cg_cmp_rd_rs1_b15_str) + 80005874: 000eb203 ld x4,0(x29) + 80005878: 00f20c63 beq x4,x15,80005890 + 8000587c: 484022ef jal x5,80007d00 + 80005880: 80005870 .word 0x80005870 + 80005884: 00000000 .word 0x00000000 + 80005888: 80017322 .word 0x80017322 + 8000588c: 00000000 .word 0x00000000 + 80005890: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x7f2099ba11fa4b84 + 80005894: 0008b803 ld x16,0(x17) + 80005898: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x99b7bdb0a4936dc3 + 8000589c: 0008b603 ld x12,0(x17) + 800058a0: 00888893 addi x17,x17,8 + +00000000800058a4 : +Zbkx_xperm8_cg_cmp_rd_rs1_b16: + xperm8 x16, x16, x12 # perform operation + 800058a4: 28c84833 xperm8 x16,x16,x12 + # Check if x16 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x16, Zbkx_xperm8_cg_cmp_rd_rs1_b16, Zbkx_xperm8_cg_cmp_rd_rs1_b16_str) + 800058a8: 000eb203 ld x4,0(x29) + 800058ac: 01020c63 beq x4,x16,800058c4 + 800058b0: 450022ef jal x5,80007d00 + 800058b4: 800058a4 .word 0x800058a4 + 800058b8: 00000000 .word 0x00000000 + 800058bc: 8001735c .word 0x8001735c + 800058c0: 00000000 .word 0x00000000 + 800058c4: 008e8e93 addi x29,x29,8 + + mv x26, x17 # switch data pointer register to avoid conflict with test + 800058c8: 00088d13 addi x26,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x38ffc21d1e904e3a + 800058cc: 000d3883 ld x17,0(x26) + 800058d0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs2: x3 = 0x50f6d2a7e34e19aa + 800058d4: 000d3183 ld x3,0(x26) + 800058d8: 008d0d13 addi x26,x26,8 + +00000000800058dc : +Zbkx_xperm8_cg_cmp_rd_rs1_b17: + xperm8 x17, x17, x3 # perform operation + 800058dc: 2838c8b3 xperm8 x17,x17,x3 + # Check if x17 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x17, Zbkx_xperm8_cg_cmp_rd_rs1_b17, Zbkx_xperm8_cg_cmp_rd_rs1_b17_str) + 800058e0: 000eb203 ld x4,0(x29) + 800058e4: 01120c63 beq x4,x17,800058fc + 800058e8: 418022ef jal x5,80007d00 + 800058ec: 800058dc .word 0x800058dc + 800058f0: 00000000 .word 0x00000000 + 800058f4: 80017396 .word 0x80017396 + 800058f8: 00000000 .word 0x00000000 + 800058fc: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x6d5a4d276a41cfe2 + 80005900: 000d3903 ld x18,0(x26) + 80005904: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xb4aac10c11b7c44f + 80005908: 000d3c03 ld x24,0(x26) + 8000590c: 008d0d13 addi x26,x26,8 + +0000000080005910 : +Zbkx_xperm8_cg_cmp_rd_rs1_b18: + xperm8 x18, x18, x24 # perform operation + 80005910: 29894933 xperm8 x18,x18,x24 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zbkx_xperm8_cg_cmp_rd_rs1_b18, Zbkx_xperm8_cg_cmp_rd_rs1_b18_str) + 80005914: 000eb203 ld x4,0(x29) + 80005918: 01220c63 beq x4,x18,80005930 + 8000591c: 3e4022ef jal x5,80007d00 + 80005920: 80005910 .word 0x80005910 + 80005924: 00000000 .word 0x00000000 + 80005928: 800173d0 .word 0x800173d0 + 8000592c: 00000000 .word 0x00000000 + 80005930: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x41d7929740c1ef07 + 80005934: 000d3983 ld x19,0(x26) + 80005938: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x804555953c3346f6 + 8000593c: 000d3383 ld x7,0(x26) + 80005940: 008d0d13 addi x26,x26,8 + +0000000080005944 : +Zbkx_xperm8_cg_cmp_rd_rs1_b19: + xperm8 x19, x19, x7 # perform operation + 80005944: 2879c9b3 xperm8 x19,x19,x7 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zbkx_xperm8_cg_cmp_rd_rs1_b19, Zbkx_xperm8_cg_cmp_rd_rs1_b19_str) + 80005948: 000eb203 ld x4,0(x29) + 8000594c: 01320c63 beq x4,x19,80005964 + 80005950: 3b0022ef jal x5,80007d00 + 80005954: 80005944 .word 0x80005944 + 80005958: 00000000 .word 0x00000000 + 8000595c: 8001740a .word 0x8001740a + 80005960: 00000000 .word 0x00000000 + 80005964: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x917bb15cf4bec39f + 80005968: 000d3a03 ld x20,0(x26) + 8000596c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xccc9f9e404f43dfa + 80005970: 000d3983 ld x19,0(x26) + 80005974: 008d0d13 addi x26,x26,8 + +0000000080005978 : +Zbkx_xperm8_cg_cmp_rd_rs1_b20: + xperm8 x20, x20, x19 # perform operation + 80005978: 293a4a33 xperm8 x20,x20,x19 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zbkx_xperm8_cg_cmp_rd_rs1_b20, Zbkx_xperm8_cg_cmp_rd_rs1_b20_str) + 8000597c: 000eb203 ld x4,0(x29) + 80005980: 01420c63 beq x4,x20,80005998 + 80005984: 37c022ef jal x5,80007d00 + 80005988: 80005978 .word 0x80005978 + 8000598c: 00000000 .word 0x00000000 + 80005990: 80017444 .word 0x80017444 + 80005994: 00000000 .word 0x00000000 + 80005998: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x20015f2cadde3665 + 8000599c: 000d3a83 ld x21,0(x26) + 800059a0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0x0a3dda725ef25eeb + 800059a4: 000d3383 ld x7,0(x26) + 800059a8: 008d0d13 addi x26,x26,8 + +00000000800059ac : +Zbkx_xperm8_cg_cmp_rd_rs1_b21: + xperm8 x21, x21, x7 # perform operation + 800059ac: 287acab3 xperm8 x21,x21,x7 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zbkx_xperm8_cg_cmp_rd_rs1_b21, Zbkx_xperm8_cg_cmp_rd_rs1_b21_str) + 800059b0: 000eb203 ld x4,0(x29) + 800059b4: 01520c63 beq x4,x21,800059cc + 800059b8: 348022ef jal x5,80007d00 + 800059bc: 800059ac .word 0x800059ac + 800059c0: 00000000 .word 0x00000000 + 800059c4: 8001747e .word 0x8001747e + 800059c8: 00000000 .word 0x00000000 + 800059cc: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xb396a9373dd7037f + 800059d0: 000d3b03 ld x22,0(x26) + 800059d4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x403e7e557cbc13bb + 800059d8: 000d3983 ld x19,0(x26) + 800059dc: 008d0d13 addi x26,x26,8 + +00000000800059e0 : +Zbkx_xperm8_cg_cmp_rd_rs1_b22: + xperm8 x22, x22, x19 # perform operation + 800059e0: 293b4b33 xperm8 x22,x22,x19 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zbkx_xperm8_cg_cmp_rd_rs1_b22, Zbkx_xperm8_cg_cmp_rd_rs1_b22_str) + 800059e4: 000eb203 ld x4,0(x29) + 800059e8: 01620c63 beq x4,x22,80005a00 + 800059ec: 314022ef jal x5,80007d00 + 800059f0: 800059e0 .word 0x800059e0 + 800059f4: 00000000 .word 0x00000000 + 800059f8: 800174b8 .word 0x800174b8 + 800059fc: 00000000 .word 0x00000000 + 80005a00: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x1b21073afe1e5ddd + 80005a04: 000d3b83 ld x23,0(x26) + 80005a08: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs2: x7 = 0xa08090cef5c26c54 + 80005a0c: 000d3383 ld x7,0(x26) + 80005a10: 008d0d13 addi x26,x26,8 + +0000000080005a14 : +Zbkx_xperm8_cg_cmp_rd_rs1_b23: + xperm8 x23, x23, x7 # perform operation + 80005a14: 287bcbb3 xperm8 x23,x23,x7 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zbkx_xperm8_cg_cmp_rd_rs1_b23, Zbkx_xperm8_cg_cmp_rd_rs1_b23_str) + 80005a18: 000eb203 ld x4,0(x29) + 80005a1c: 01720c63 beq x4,x23,80005a34 + 80005a20: 2e0022ef jal x5,80007d00 + 80005a24: 80005a14 .word 0x80005a14 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 800174f2 .word 0x800174f2 + 80005a30: 00000000 .word 0x00000000 + 80005a34: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x443067421c298261 + 80005a38: 000d3c03 ld x24,0(x26) + 80005a3c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0xa1d47127eadc3fc4 + 80005a40: 000d3983 ld x19,0(x26) + 80005a44: 008d0d13 addi x26,x26,8 + +0000000080005a48 : +Zbkx_xperm8_cg_cmp_rd_rs1_b24: + xperm8 x24, x24, x19 # perform operation + 80005a48: 293c4c33 xperm8 x24,x24,x19 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zbkx_xperm8_cg_cmp_rd_rs1_b24, Zbkx_xperm8_cg_cmp_rd_rs1_b24_str) + 80005a4c: 000eb203 ld x4,0(x29) + 80005a50: 01820c63 beq x4,x24,80005a68 + 80005a54: 2ac022ef jal x5,80007d00 + 80005a58: 80005a48 .word 0x80005a48 + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 8001752c .word 0x8001752c + 80005a64: 00000000 .word 0x00000000 + 80005a68: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xc64cf34456d4d7e4 + 80005a6c: 000d3c83 ld x25,0(x26) + 80005a70: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x334e01d722732b92 + 80005a74: 000d3a03 ld x20,0(x26) + 80005a78: 008d0d13 addi x26,x26,8 + +0000000080005a7c : +Zbkx_xperm8_cg_cmp_rd_rs1_b25: + xperm8 x25, x25, x20 # perform operation + 80005a7c: 294cccb3 xperm8 x25,x25,x20 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zbkx_xperm8_cg_cmp_rd_rs1_b25, Zbkx_xperm8_cg_cmp_rd_rs1_b25_str) + 80005a80: 000eb203 ld x4,0(x29) + 80005a84: 01920c63 beq x4,x25,80005a9c + 80005a88: 278022ef jal x5,80007d00 + 80005a8c: 80005a7c .word 0x80005a7c + 80005a90: 00000000 .word 0x00000000 + 80005a94: 80017566 .word 0x80017566 + 80005a98: 00000000 .word 0x00000000 + 80005a9c: 008e8e93 addi x29,x29,8 + + mv x16, x26 # switch data pointer register to avoid conflict with test + 80005aa0: 000d0813 addi x16,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x834d4354cc157cba + 80005aa4: 00083d03 ld x26,0(x16) + 80005aa8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x78802e8068e77cb1 + 80005aac: 00083483 ld x9,0(x16) + 80005ab0: 00880813 addi x16,x16,8 + +0000000080005ab4 : +Zbkx_xperm8_cg_cmp_rd_rs1_b26: + xperm8 x26, x26, x9 # perform operation + 80005ab4: 289d4d33 xperm8 x26,x26,x9 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zbkx_xperm8_cg_cmp_rd_rs1_b26, Zbkx_xperm8_cg_cmp_rd_rs1_b26_str) + 80005ab8: 000eb203 ld x4,0(x29) + 80005abc: 01a20c63 beq x4,x26,80005ad4 + 80005ac0: 240022ef jal x5,80007d00 + 80005ac4: 80005ab4 .word 0x80005ab4 + 80005ac8: 00000000 .word 0x00000000 + 80005acc: 800175a0 .word 0x800175a0 + 80005ad0: 00000000 .word 0x00000000 + 80005ad4: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x0081492f753ef1df + 80005ad8: 00083d83 ld x27,0(x16) + 80005adc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xf6db3c7bb63f3860 + 80005ae0: 00083a83 ld x21,0(x16) + 80005ae4: 00880813 addi x16,x16,8 + +0000000080005ae8 : +Zbkx_xperm8_cg_cmp_rd_rs1_b27: + xperm8 x27, x27, x21 # perform operation + 80005ae8: 295dcdb3 xperm8 x27,x27,x21 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zbkx_xperm8_cg_cmp_rd_rs1_b27, Zbkx_xperm8_cg_cmp_rd_rs1_b27_str) + 80005aec: 000eb203 ld x4,0(x29) + 80005af0: 01b20c63 beq x4,x27,80005b08 + 80005af4: 20c022ef jal x5,80007d00 + 80005af8: 80005ae8 .word 0x80005ae8 + 80005afc: 00000000 .word 0x00000000 + 80005b00: 800175da .word 0x800175da + 80005b04: 00000000 .word 0x00000000 + 80005b08: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x96de2d420661db4d + 80005b0c: 00083e03 ld x28,0(x16) + 80005b10: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x33d7d58fc780eee1 + 80005b14: 00083983 ld x19,0(x16) + 80005b18: 00880813 addi x16,x16,8 + +0000000080005b1c : +Zbkx_xperm8_cg_cmp_rd_rs1_b28: + xperm8 x28, x28, x19 # perform operation + 80005b1c: 293e4e33 xperm8 x28,x28,x19 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zbkx_xperm8_cg_cmp_rd_rs1_b28, Zbkx_xperm8_cg_cmp_rd_rs1_b28_str) + 80005b20: 000eb203 ld x4,0(x29) + 80005b24: 01c20c63 beq x4,x28,80005b3c + 80005b28: 1d8022ef jal x5,80007d00 + 80005b2c: 80005b1c .word 0x80005b1c + 80005b30: 00000000 .word 0x00000000 + 80005b34: 80017614 .word 0x80017614 + 80005b38: 00000000 .word 0x00000000 + 80005b3c: 008e8e93 addi x29,x29,8 + + mv x23, x29 # switch signature pointer register to avoid conflict with test + 80005b40: 000e8b93 addi x23,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x4f3e041fe3a4e188 + 80005b44: 00083e83 ld x29,0(x16) + 80005b48: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0xfc5760feeb5e7ef3 + 80005b4c: 00083583 ld x11,0(x16) + 80005b50: 00880813 addi x16,x16,8 + +0000000080005b54 : +Zbkx_xperm8_cg_cmp_rd_rs1_b29: + xperm8 x29, x29, x11 # perform operation + 80005b54: 28beceb3 xperm8 x29,x29,x11 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zbkx_xperm8_cg_cmp_rd_rs1_b29, Zbkx_xperm8_cg_cmp_rd_rs1_b29_str) + 80005b58: 000bb203 ld x4,0(x23) + 80005b5c: 01d20c63 beq x4,x29,80005b74 + 80005b60: 1a0022ef jal x5,80007d00 + 80005b64: 80005b54 .word 0x80005b54 + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 8001764e .word 0x8001764e + 80005b70: 00000000 .word 0x00000000 + 80005b74: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x9fe80fb3030e48d0 + 80005b78: 00083f03 ld x30,0(x16) + 80005b7c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0xae15103efcc49567 + 80005b80: 00083c03 ld x24,0(x16) + 80005b84: 00880813 addi x16,x16,8 + +0000000080005b88 : +Zbkx_xperm8_cg_cmp_rd_rs1_b30: + xperm8 x30, x30, x24 # perform operation + 80005b88: 298f4f33 xperm8 x30,x30,x24 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zbkx_xperm8_cg_cmp_rd_rs1_b30, Zbkx_xperm8_cg_cmp_rd_rs1_b30_str) + 80005b8c: 000bb203 ld x4,0(x23) + 80005b90: 01e20c63 beq x4,x30,80005ba8 + 80005b94: 16c022ef jal x5,80007d00 + 80005b98: 80005b88 .word 0x80005b88 + 80005b9c: 00000000 .word 0x00000000 + 80005ba0: 80017688 .word 0x80017688 + 80005ba4: 00000000 .word 0x00000000 + 80005ba8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x9e9c5dad27700cf4 + 80005bac: 00083f83 ld x31,0(x16) + 80005bb0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xf062a8b3582d6ff5 + 80005bb4: 00083d03 ld x26,0(x16) + 80005bb8: 00880813 addi x16,x16,8 + +0000000080005bbc : +Zbkx_xperm8_cg_cmp_rd_rs1_b31: + xperm8 x31, x31, x26 # perform operation + 80005bbc: 29afcfb3 xperm8 x31,x31,x26 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zbkx_xperm8_cg_cmp_rd_rs1_b31, Zbkx_xperm8_cg_cmp_rd_rs1_b31_str) + 80005bc0: 000bb203 ld x4,0(x23) + 80005bc4: 01f20c63 beq x4,x31,80005bdc + 80005bc8: 138022ef jal x5,80007d00 + 80005bcc: 80005bbc .word 0x80005bbc + 80005bd0: 00000000 .word 0x00000000 + 80005bd4: 800176c2 .word 0x800176c2 + 80005bd8: 00000000 .word 0x00000000 + 80005bdc: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0xe11a7626634025a9 + 80005be0: 00083d03 ld x26,0(x16) + 80005be4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xdd2e9ff19129dc07 + 80005be8: 00083003 ld x0,0(x16) + 80005bec: 00880813 addi x16,x16,8 + +0000000080005bf0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b0: + xperm8 x0, x26, x0 # perform operation + 80005bf0: 280d4033 xperm8 x0,x26,x0 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zbkx_xperm8_cg_cmp_rd_rs2_b0, Zbkx_xperm8_cg_cmp_rd_rs2_b0_str) + 80005bf4: 000bb203 ld x4,0(x23) + 80005bf8: 00020c63 beq x4,x0,80005c10 + 80005bfc: 104022ef jal x5,80007d00 + 80005c00: 80005bf0 .word 0x80005bf0 + 80005c04: 00000000 .word 0x00000000 + 80005c08: 800176fc .word 0x800176fc + 80005c0c: 00000000 .word 0x00000000 + 80005c10: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xc41ed2be8de29a39 + 80005c14: 00083503 ld x10,0(x16) + 80005c18: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0x2e2a27688d718d57 + 80005c1c: 00083083 ld x1,0(x16) + 80005c20: 00880813 addi x16,x16,8 + +0000000080005c24 : +Zbkx_xperm8_cg_cmp_rd_rs2_b1: + xperm8 x1, x10, x1 # perform operation + 80005c24: 281540b3 xperm8 x1,x10,x1 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zbkx_xperm8_cg_cmp_rd_rs2_b1, Zbkx_xperm8_cg_cmp_rd_rs2_b1_str) + 80005c28: 000bb203 ld x4,0(x23) + 80005c2c: 00120c63 beq x4,x1,80005c44 + 80005c30: 0d0022ef jal x5,80007d00 + 80005c34: 80005c24 .word 0x80005c24 + 80005c38: 00000000 .word 0x00000000 + 80005c3c: 80017735 .word 0x80017735 + 80005c40: 00000000 .word 0x00000000 + 80005c44: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x875c1cfe0fd7607a + 80005c48: 00083583 ld x11,0(x16) + 80005c4c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x3ab9d46cd823b010 + 80005c50: 00083103 ld x2,0(x16) + 80005c54: 00880813 addi x16,x16,8 + +0000000080005c58 : +Zbkx_xperm8_cg_cmp_rd_rs2_b2: + xperm8 x2, x11, x2 # perform operation + 80005c58: 2825c133 xperm8 x2,x11,x2 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zbkx_xperm8_cg_cmp_rd_rs2_b2, Zbkx_xperm8_cg_cmp_rd_rs2_b2_str) + 80005c5c: 000bb203 ld x4,0(x23) + 80005c60: 00220c63 beq x4,x2,80005c78 + 80005c64: 09c022ef jal x5,80007d00 + 80005c68: 80005c58 .word 0x80005c58 + 80005c6c: 00000000 .word 0x00000000 + 80005c70: 8001776e .word 0x8001776e + 80005c74: 00000000 .word 0x00000000 + 80005c78: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x948856fe2f1d183a + 80005c7c: 00083583 ld x11,0(x16) + 80005c80: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x8d8d69d95ed51cd6 + 80005c84: 00083183 ld x3,0(x16) + 80005c88: 00880813 addi x16,x16,8 + +0000000080005c8c : +Zbkx_xperm8_cg_cmp_rd_rs2_b3: + xperm8 x3, x11, x3 # perform operation + 80005c8c: 2835c1b3 xperm8 x3,x11,x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zbkx_xperm8_cg_cmp_rd_rs2_b3, Zbkx_xperm8_cg_cmp_rd_rs2_b3_str) + 80005c90: 000bb203 ld x4,0(x23) + 80005c94: 00320c63 beq x4,x3,80005cac + 80005c98: 068022ef jal x5,80007d00 + 80005c9c: 80005c8c .word 0x80005c8c + 80005ca0: 00000000 .word 0x00000000 + 80005ca4: 800177a7 .word 0x800177a7 + 80005ca8: 00000000 .word 0x00000000 + 80005cac: 008b8b93 addi x23,x23,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005cb0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005cb4: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x78baec1509110cf9 + 80005cb8: 00083f03 ld x30,0(x16) + 80005cbc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x73c57b818a1ebccc + 80005cc0: 00083203 ld x4,0(x16) + 80005cc4: 00880813 addi x16,x16,8 + +0000000080005cc8 : +Zbkx_xperm8_cg_cmp_rd_rs2_b4: + xperm8 x4, x30, x4 # perform operation + 80005cc8: 284f4233 xperm8 x4,x30,x4 + # Check if x4 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x4, Zbkx_xperm8_cg_cmp_rd_rs2_b4, Zbkx_xperm8_cg_cmp_rd_rs2_b4_str) + 80005ccc: 000bb383 ld x7,0(x23) + 80005cd0: 00438c63 beq x7,x4,80005ce8 + 80005cd4: 0440246f jal x8,80007d18 + 80005cd8: 80005cc8 .word 0x80005cc8 + 80005cdc: 00000000 .word 0x00000000 + 80005ce0: 800177e0 .word 0x800177e0 + 80005ce4: 00000000 .word 0x00000000 + 80005ce8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x308c788b47461c99 + 80005cec: 00083103 ld x2,0(x16) + 80005cf0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xa90556f61d9f9fba + 80005cf4: 00083283 ld x5,0(x16) + 80005cf8: 00880813 addi x16,x16,8 + +0000000080005cfc : +Zbkx_xperm8_cg_cmp_rd_rs2_b5: + xperm8 x5, x2, x5 # perform operation + 80005cfc: 285142b3 xperm8 x5,x2,x5 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zbkx_xperm8_cg_cmp_rd_rs2_b5, Zbkx_xperm8_cg_cmp_rd_rs2_b5_str) + 80005d00: 000bb383 ld x7,0(x23) + 80005d04: 00538c63 beq x7,x5,80005d1c + 80005d08: 0100246f jal x8,80007d18 + 80005d0c: 80005cfc .word 0x80005cfc + 80005d10: 00000000 .word 0x00000000 + 80005d14: 80017819 .word 0x80017819 + 80005d18: 00000000 .word 0x00000000 + 80005d1c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xf30174ba0ef3b2a2 + 80005d20: 00083d83 ld x27,0(x16) + 80005d24: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xcaf15f7c1fef4b37 + 80005d28: 00083303 ld x6,0(x16) + 80005d2c: 00880813 addi x16,x16,8 + +0000000080005d30 : +Zbkx_xperm8_cg_cmp_rd_rs2_b6: + xperm8 x6, x27, x6 # perform operation + 80005d30: 286dc333 xperm8 x6,x27,x6 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zbkx_xperm8_cg_cmp_rd_rs2_b6, Zbkx_xperm8_cg_cmp_rd_rs2_b6_str) + 80005d34: 000bb383 ld x7,0(x23) + 80005d38: 00638c63 beq x7,x6,80005d50 + 80005d3c: 7dd0146f jal x8,80007d18 + 80005d40: 80005d30 .word 0x80005d30 + 80005d44: 00000000 .word 0x00000000 + 80005d48: 80017852 .word 0x80017852 + 80005d4c: 00000000 .word 0x00000000 + 80005d50: 008b8b93 addi x23,x23,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d54: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d58: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x1af47d5535abd5ac + 80005d5c: 00083f03 ld x30,0(x16) + 80005d60: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x0d94d67ac0291378 + 80005d64: 00083383 ld x7,0(x16) + 80005d68: 00880813 addi x16,x16,8 + +0000000080005d6c : +Zbkx_xperm8_cg_cmp_rd_rs2_b7: + xperm8 x7, x30, x7 # perform operation + 80005d6c: 287f43b3 xperm8 x7,x30,x7 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zbkx_xperm8_cg_cmp_rd_rs2_b7, Zbkx_xperm8_cg_cmp_rd_rs2_b7_str) + 80005d70: 000bb683 ld x13,0(x23) + 80005d74: 00768c63 beq x13,x7,80005d8c + 80005d78: 7c90176f jal x14,80007d40 + 80005d7c: 80005d6c .word 0x80005d6c + 80005d80: 00000000 .word 0x00000000 + 80005d84: 8001788b .word 0x8001788b + 80005d88: 00000000 .word 0x00000000 + 80005d8c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x4dbd982684aba182 + 80005d90: 00083003 ld x0,0(x16) + 80005d94: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xfb9d3c2a37550a69 + 80005d98: 00083403 ld x8,0(x16) + 80005d9c: 00880813 addi x16,x16,8 + +0000000080005da0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b8: + xperm8 x8, x0, x8 # perform operation + 80005da0: 28804433 xperm8 x8,x0,x8 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zbkx_xperm8_cg_cmp_rd_rs2_b8, Zbkx_xperm8_cg_cmp_rd_rs2_b8_str) + 80005da4: 000bb683 ld x13,0(x23) + 80005da8: 00868c63 beq x13,x8,80005dc0 + 80005dac: 7950176f jal x14,80007d40 + 80005db0: 80005da0 .word 0x80005da0 + 80005db4: 00000000 .word 0x00000000 + 80005db8: 800178c4 .word 0x800178c4 + 80005dbc: 00000000 .word 0x00000000 + 80005dc0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x26f0ebf1fe897238 + 80005dc4: 00083283 ld x5,0(x16) + 80005dc8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xf77001ac317ce21a + 80005dcc: 00083483 ld x9,0(x16) + 80005dd0: 00880813 addi x16,x16,8 + +0000000080005dd4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b9: + xperm8 x9, x5, x9 # perform operation + 80005dd4: 2892c4b3 xperm8 x9,x5,x9 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zbkx_xperm8_cg_cmp_rd_rs2_b9, Zbkx_xperm8_cg_cmp_rd_rs2_b9_str) + 80005dd8: 000bb683 ld x13,0(x23) + 80005ddc: 00968c63 beq x13,x9,80005df4 + 80005de0: 7610176f jal x14,80007d40 + 80005de4: 80005dd4 .word 0x80005dd4 + 80005de8: 00000000 .word 0x00000000 + 80005dec: 800178fd .word 0x800178fd + 80005df0: 00000000 .word 0x00000000 + 80005df4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x390f8683c6b1f2eb + 80005df8: 00083a83 ld x21,0(x16) + 80005dfc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xd62469ff8c0d4164 + 80005e00: 00083503 ld x10,0(x16) + 80005e04: 00880813 addi x16,x16,8 + +0000000080005e08 : +Zbkx_xperm8_cg_cmp_rd_rs2_b10: + xperm8 x10, x21, x10 # perform operation + 80005e08: 28aac533 xperm8 x10,x21,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zbkx_xperm8_cg_cmp_rd_rs2_b10, Zbkx_xperm8_cg_cmp_rd_rs2_b10_str) + 80005e0c: 000bb683 ld x13,0(x23) + 80005e10: 00a68c63 beq x13,x10,80005e28 + 80005e14: 72d0176f jal x14,80007d40 + 80005e18: 80005e08 .word 0x80005e08 + 80005e1c: 00000000 .word 0x00000000 + 80005e20: 80017936 .word 0x80017936 + 80005e24: 00000000 .word 0x00000000 + 80005e28: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x5202da75827358a1 + 80005e2c: 00083003 ld x0,0(x16) + 80005e30: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x4d11dc48ef50da11 + 80005e34: 00083583 ld x11,0(x16) + 80005e38: 00880813 addi x16,x16,8 + +0000000080005e3c : +Zbkx_xperm8_cg_cmp_rd_rs2_b11: + xperm8 x11, x0, x11 # perform operation + 80005e3c: 28b045b3 xperm8 x11,x0,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zbkx_xperm8_cg_cmp_rd_rs2_b11, Zbkx_xperm8_cg_cmp_rd_rs2_b11_str) + 80005e40: 000bb683 ld x13,0(x23) + 80005e44: 00b68c63 beq x13,x11,80005e5c + 80005e48: 6f90176f jal x14,80007d40 + 80005e4c: 80005e3c .word 0x80005e3c + 80005e50: 00000000 .word 0x00000000 + 80005e54: 80017970 .word 0x80017970 + 80005e58: 00000000 .word 0x00000000 + 80005e5c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0xfc1cfde1211b8ad9 + 80005e60: 00083d83 ld x27,0(x16) + 80005e64: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x3f810635c737e126 + 80005e68: 00083603 ld x12,0(x16) + 80005e6c: 00880813 addi x16,x16,8 + +0000000080005e70 : +Zbkx_xperm8_cg_cmp_rd_rs2_b12: + xperm8 x12, x27, x12 # perform operation + 80005e70: 28cdc633 xperm8 x12,x27,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zbkx_xperm8_cg_cmp_rd_rs2_b12, Zbkx_xperm8_cg_cmp_rd_rs2_b12_str) + 80005e74: 000bb683 ld x13,0(x23) + 80005e78: 00c68c63 beq x13,x12,80005e90 + 80005e7c: 6c50176f jal x14,80007d40 + 80005e80: 80005e70 .word 0x80005e70 + 80005e84: 00000000 .word 0x00000000 + 80005e88: 800179aa .word 0x800179aa + 80005e8c: 00000000 .word 0x00000000 + 80005e90: 008b8b93 addi x23,x23,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e94: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005e98: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x1ab62f5042568ea5 + 80005e9c: 00083183 ld x3,0(x16) + 80005ea0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x2c4628091c329fd4 + 80005ea4: 00083683 ld x13,0(x16) + 80005ea8: 00880813 addi x16,x16,8 + +0000000080005eac : +Zbkx_xperm8_cg_cmp_rd_rs2_b13: + xperm8 x13, x3, x13 # perform operation + 80005eac: 28d1c6b3 xperm8 x13,x3,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zbkx_xperm8_cg_cmp_rd_rs2_b13, Zbkx_xperm8_cg_cmp_rd_rs2_b13_str) + 80005eb0: 000bb203 ld x4,0(x23) + 80005eb4: 00d20c63 beq x4,x13,80005ecc + 80005eb8: 649012ef jal x5,80007d00 + 80005ebc: 80005eac .word 0x80005eac + 80005ec0: 00000000 .word 0x00000000 + 80005ec4: 800179e4 .word 0x800179e4 + 80005ec8: 00000000 .word 0x00000000 + 80005ecc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x59a978d423079cf0 + 80005ed0: 00083083 ld x1,0(x16) + 80005ed4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x51ea9daa813bc538 + 80005ed8: 00083703 ld x14,0(x16) + 80005edc: 00880813 addi x16,x16,8 + +0000000080005ee0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b14: + xperm8 x14, x1, x14 # perform operation + 80005ee0: 28e0c733 xperm8 x14,x1,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zbkx_xperm8_cg_cmp_rd_rs2_b14, Zbkx_xperm8_cg_cmp_rd_rs2_b14_str) + 80005ee4: 000bb203 ld x4,0(x23) + 80005ee8: 00e20c63 beq x4,x14,80005f00 + 80005eec: 615012ef jal x5,80007d00 + 80005ef0: 80005ee0 .word 0x80005ee0 + 80005ef4: 00000000 .word 0x00000000 + 80005ef8: 80017a1e .word 0x80017a1e + 80005efc: 00000000 .word 0x00000000 + 80005f00: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x4a38bdd494c8c3bd + 80005f04: 00083683 ld x13,0(x16) + 80005f08: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x3ac69cb03c84218c + 80005f0c: 00083783 ld x15,0(x16) + 80005f10: 00880813 addi x16,x16,8 + +0000000080005f14 : +Zbkx_xperm8_cg_cmp_rd_rs2_b15: + xperm8 x15, x13, x15 # perform operation + 80005f14: 28f6c7b3 xperm8 x15,x13,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zbkx_xperm8_cg_cmp_rd_rs2_b15, Zbkx_xperm8_cg_cmp_rd_rs2_b15_str) + 80005f18: 000bb203 ld x4,0(x23) + 80005f1c: 00f20c63 beq x4,x15,80005f34 + 80005f20: 5e1012ef jal x5,80007d00 + 80005f24: 80005f14 .word 0x80005f14 + 80005f28: 00000000 .word 0x00000000 + 80005f2c: 80017a58 .word 0x80017a58 + 80005f30: 00000000 .word 0x00000000 + 80005f34: 008b8b93 addi x23,x23,8 + + mv x2, x16 # switch data pointer register to avoid conflict with test + 80005f38: 00080113 addi x2,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xfcd5ca0e3b3743f0 + 80005f3c: 00013403 ld x8,0(x2) + 80005f40: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xfbf25a6e2f6eec48 + 80005f44: 00013803 ld x16,0(x2) + 80005f48: 00810113 addi x2,x2,8 + +0000000080005f4c : +Zbkx_xperm8_cg_cmp_rd_rs2_b16: + xperm8 x16, x8, x16 # perform operation + 80005f4c: 29044833 xperm8 x16,x8,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zbkx_xperm8_cg_cmp_rd_rs2_b16, Zbkx_xperm8_cg_cmp_rd_rs2_b16_str) + 80005f50: 000bb203 ld x4,0(x23) + 80005f54: 01020c63 beq x4,x16,80005f6c + 80005f58: 5a9012ef jal x5,80007d00 + 80005f5c: 80005f4c .word 0x80005f4c + 80005f60: 00000000 .word 0x00000000 + 80005f64: 80017a92 .word 0x80017a92 + 80005f68: 00000000 .word 0x00000000 + 80005f6c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x5d25cad5d6689b16 + 80005f70: 00013c83 ld x25,0(x2) + 80005f74: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0xe3e08ed9101e5a2d + 80005f78: 00013883 ld x17,0(x2) + 80005f7c: 00810113 addi x2,x2,8 + +0000000080005f80 : +Zbkx_xperm8_cg_cmp_rd_rs2_b17: + xperm8 x17, x25, x17 # perform operation + 80005f80: 291cc8b3 xperm8 x17,x25,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zbkx_xperm8_cg_cmp_rd_rs2_b17, Zbkx_xperm8_cg_cmp_rd_rs2_b17_str) + 80005f84: 000bb203 ld x4,0(x23) + 80005f88: 01120c63 beq x4,x17,80005fa0 + 80005f8c: 575012ef jal x5,80007d00 + 80005f90: 80005f80 .word 0x80005f80 + 80005f94: 00000000 .word 0x00000000 + 80005f98: 80017acc .word 0x80017acc + 80005f9c: 00000000 .word 0x00000000 + 80005fa0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xc3db416a93ec05ad + 80005fa4: 00013983 ld x19,0(x2) + 80005fa8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x1b0632db6814c277 + 80005fac: 00013903 ld x18,0(x2) + 80005fb0: 00810113 addi x2,x2,8 + +0000000080005fb4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b18: + xperm8 x18, x19, x18 # perform operation + 80005fb4: 2929c933 xperm8 x18,x19,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zbkx_xperm8_cg_cmp_rd_rs2_b18, Zbkx_xperm8_cg_cmp_rd_rs2_b18_str) + 80005fb8: 000bb203 ld x4,0(x23) + 80005fbc: 01220c63 beq x4,x18,80005fd4 + 80005fc0: 541012ef jal x5,80007d00 + 80005fc4: 80005fb4 .word 0x80005fb4 + 80005fc8: 00000000 .word 0x00000000 + 80005fcc: 80017b06 .word 0x80017b06 + 80005fd0: 00000000 .word 0x00000000 + 80005fd4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x99b4d11e02e7486b + 80005fd8: 00013783 ld x15,0(x2) + 80005fdc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xdedfb77ed70d33a4 + 80005fe0: 00013983 ld x19,0(x2) + 80005fe4: 00810113 addi x2,x2,8 + +0000000080005fe8 : +Zbkx_xperm8_cg_cmp_rd_rs2_b19: + xperm8 x19, x15, x19 # perform operation + 80005fe8: 2937c9b3 xperm8 x19,x15,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zbkx_xperm8_cg_cmp_rd_rs2_b19, Zbkx_xperm8_cg_cmp_rd_rs2_b19_str) + 80005fec: 000bb203 ld x4,0(x23) + 80005ff0: 01320c63 beq x4,x19,80006008 + 80005ff4: 50d012ef jal x5,80007d00 + 80005ff8: 80005fe8 .word 0x80005fe8 + 80005ffc: 00000000 .word 0x00000000 + 80006000: 80017b40 .word 0x80017b40 + 80006004: 00000000 .word 0x00000000 + 80006008: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5f05fd644c932c30 + 8000600c: 00013f03 ld x30,0(x2) + 80006010: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x8cb222aff1ac2653 + 80006014: 00013a03 ld x20,0(x2) + 80006018: 00810113 addi x2,x2,8 + +000000008000601c : +Zbkx_xperm8_cg_cmp_rd_rs2_b20: + xperm8 x20, x30, x20 # perform operation + 8000601c: 294f4a33 xperm8 x20,x30,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zbkx_xperm8_cg_cmp_rd_rs2_b20, Zbkx_xperm8_cg_cmp_rd_rs2_b20_str) + 80006020: 000bb203 ld x4,0(x23) + 80006024: 01420c63 beq x4,x20,8000603c + 80006028: 4d9012ef jal x5,80007d00 + 8000602c: 8000601c .word 0x8000601c + 80006030: 00000000 .word 0x00000000 + 80006034: 80017b7a .word 0x80017b7a + 80006038: 00000000 .word 0x00000000 + 8000603c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x982c0a755fa0c839 + 80006040: 00013d03 ld x26,0(x2) + 80006044: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xd9c17ba918b8aec4 + 80006048: 00013a83 ld x21,0(x2) + 8000604c: 00810113 addi x2,x2,8 + +0000000080006050 : +Zbkx_xperm8_cg_cmp_rd_rs2_b21: + xperm8 x21, x26, x21 # perform operation + 80006050: 295d4ab3 xperm8 x21,x26,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zbkx_xperm8_cg_cmp_rd_rs2_b21, Zbkx_xperm8_cg_cmp_rd_rs2_b21_str) + 80006054: 000bb203 ld x4,0(x23) + 80006058: 01520c63 beq x4,x21,80006070 + 8000605c: 4a5012ef jal x5,80007d00 + 80006060: 80006050 .word 0x80006050 + 80006064: 00000000 .word 0x00000000 + 80006068: 80017bb4 .word 0x80017bb4 + 8000606c: 00000000 .word 0x00000000 + 80006070: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x1f3e0d83dde367c7 + 80006074: 00013383 ld x7,0(x2) + 80006078: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x476c489886b05a3f + 8000607c: 00013b03 ld x22,0(x2) + 80006080: 00810113 addi x2,x2,8 + +0000000080006084 : +Zbkx_xperm8_cg_cmp_rd_rs2_b22: + xperm8 x22, x7, x22 # perform operation + 80006084: 2963cb33 xperm8 x22,x7,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zbkx_xperm8_cg_cmp_rd_rs2_b22, Zbkx_xperm8_cg_cmp_rd_rs2_b22_str) + 80006088: 000bb203 ld x4,0(x23) + 8000608c: 01620c63 beq x4,x22,800060a4 + 80006090: 471012ef jal x5,80007d00 + 80006094: 80006084 .word 0x80006084 + 80006098: 00000000 .word 0x00000000 + 8000609c: 80017bee .word 0x80017bee + 800060a0: 00000000 .word 0x00000000 + 800060a4: 008b8b93 addi x23,x23,8 + + mv x12, x23 # switch signature pointer register to avoid conflict with test + 800060a8: 000b8613 addi x12,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x9e265f3631891938 + 800060ac: 00013983 ld x19,0(x2) + 800060b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x40834b391320ef84 + 800060b4: 00013b83 ld x23,0(x2) + 800060b8: 00810113 addi x2,x2,8 + +00000000800060bc : +Zbkx_xperm8_cg_cmp_rd_rs2_b23: + xperm8 x23, x19, x23 # perform operation + 800060bc: 2979cbb3 xperm8 x23,x19,x23 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zbkx_xperm8_cg_cmp_rd_rs2_b23, Zbkx_xperm8_cg_cmp_rd_rs2_b23_str) + 800060c0: 00063203 ld x4,0(x12) + 800060c4: 01720c63 beq x4,x23,800060dc + 800060c8: 439012ef jal x5,80007d00 + 800060cc: 800060bc .word 0x800060bc + 800060d0: 00000000 .word 0x00000000 + 800060d4: 80017c28 .word 0x80017c28 + 800060d8: 00000000 .word 0x00000000 + 800060dc: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x443a5acd7f13601b + 800060e0: 00013883 ld x17,0(x2) + 800060e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xcea9f46aba08cb44 + 800060e8: 00013c03 ld x24,0(x2) + 800060ec: 00810113 addi x2,x2,8 + +00000000800060f0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b24: + xperm8 x24, x17, x24 # perform operation + 800060f0: 2988cc33 xperm8 x24,x17,x24 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zbkx_xperm8_cg_cmp_rd_rs2_b24, Zbkx_xperm8_cg_cmp_rd_rs2_b24_str) + 800060f4: 00063203 ld x4,0(x12) + 800060f8: 01820c63 beq x4,x24,80006110 + 800060fc: 405012ef jal x5,80007d00 + 80006100: 800060f0 .word 0x800060f0 + 80006104: 00000000 .word 0x00000000 + 80006108: 80017c62 .word 0x80017c62 + 8000610c: 00000000 .word 0x00000000 + 80006110: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x2d2b2e176d1e6b30 + 80006114: 00013783 ld x15,0(x2) + 80006118: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xb71c50fcc6fd43bb + 8000611c: 00013c83 ld x25,0(x2) + 80006120: 00810113 addi x2,x2,8 + +0000000080006124 : +Zbkx_xperm8_cg_cmp_rd_rs2_b25: + xperm8 x25, x15, x25 # perform operation + 80006124: 2997ccb3 xperm8 x25,x15,x25 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zbkx_xperm8_cg_cmp_rd_rs2_b25, Zbkx_xperm8_cg_cmp_rd_rs2_b25_str) + 80006128: 00063203 ld x4,0(x12) + 8000612c: 01920c63 beq x4,x25,80006144 + 80006130: 3d1012ef jal x5,80007d00 + 80006134: 80006124 .word 0x80006124 + 80006138: 00000000 .word 0x00000000 + 8000613c: 80017c9c .word 0x80017c9c + 80006140: 00000000 .word 0x00000000 + 80006144: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x2063ec70fb02b5f0 + 80006148: 00013b03 ld x22,0(x2) + 8000614c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xe134bda7b6b43829 + 80006150: 00013d03 ld x26,0(x2) + 80006154: 00810113 addi x2,x2,8 + +0000000080006158 : +Zbkx_xperm8_cg_cmp_rd_rs2_b26: + xperm8 x26, x22, x26 # perform operation + 80006158: 29ab4d33 xperm8 x26,x22,x26 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zbkx_xperm8_cg_cmp_rd_rs2_b26, Zbkx_xperm8_cg_cmp_rd_rs2_b26_str) + 8000615c: 00063203 ld x4,0(x12) + 80006160: 01a20c63 beq x4,x26,80006178 + 80006164: 39d012ef jal x5,80007d00 + 80006168: 80006158 .word 0x80006158 + 8000616c: 00000000 .word 0x00000000 + 80006170: 80017cd6 .word 0x80017cd6 + 80006174: 00000000 .word 0x00000000 + 80006178: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xac889e1623fc72bf + 8000617c: 00013183 ld x3,0(x2) + 80006180: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x97e2bf58cc970510 + 80006184: 00013d83 ld x27,0(x2) + 80006188: 00810113 addi x2,x2,8 + +000000008000618c : +Zbkx_xperm8_cg_cmp_rd_rs2_b27: + xperm8 x27, x3, x27 # perform operation + 8000618c: 29b1cdb3 xperm8 x27,x3,x27 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zbkx_xperm8_cg_cmp_rd_rs2_b27, Zbkx_xperm8_cg_cmp_rd_rs2_b27_str) + 80006190: 00063203 ld x4,0(x12) + 80006194: 01b20c63 beq x4,x27,800061ac + 80006198: 369012ef jal x5,80007d00 + 8000619c: 8000618c .word 0x8000618c + 800061a0: 00000000 .word 0x00000000 + 800061a4: 80017d10 .word 0x80017d10 + 800061a8: 00000000 .word 0x00000000 + 800061ac: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x13da6c5fd521f73b + 800061b0: 00013583 ld x11,0(x2) + 800061b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x2f71d4242b846b0a + 800061b8: 00013e03 ld x28,0(x2) + 800061bc: 00810113 addi x2,x2,8 + +00000000800061c0 : +Zbkx_xperm8_cg_cmp_rd_rs2_b28: + xperm8 x28, x11, x28 # perform operation + 800061c0: 29c5ce33 xperm8 x28,x11,x28 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zbkx_xperm8_cg_cmp_rd_rs2_b28, Zbkx_xperm8_cg_cmp_rd_rs2_b28_str) + 800061c4: 00063203 ld x4,0(x12) + 800061c8: 01c20c63 beq x4,x28,800061e0 + 800061cc: 335012ef jal x5,80007d00 + 800061d0: 800061c0 .word 0x800061c0 + 800061d4: 00000000 .word 0x00000000 + 800061d8: 80017d4a .word 0x80017d4a + 800061dc: 00000000 .word 0x00000000 + 800061e0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x189f0c1e6876bb89 + 800061e4: 00013783 ld x15,0(x2) + 800061e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x5c7d14d86afa589e + 800061ec: 00013e83 ld x29,0(x2) + 800061f0: 00810113 addi x2,x2,8 + +00000000800061f4 : +Zbkx_xperm8_cg_cmp_rd_rs2_b29: + xperm8 x29, x15, x29 # perform operation + 800061f4: 29d7ceb3 xperm8 x29,x15,x29 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zbkx_xperm8_cg_cmp_rd_rs2_b29, Zbkx_xperm8_cg_cmp_rd_rs2_b29_str) + 800061f8: 00063203 ld x4,0(x12) + 800061fc: 01d20c63 beq x4,x29,80006214 + 80006200: 301012ef jal x5,80007d00 + 80006204: 800061f4 .word 0x800061f4 + 80006208: 00000000 .word 0x00000000 + 8000620c: 80017d84 .word 0x80017d84 + 80006210: 00000000 .word 0x00000000 + 80006214: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x4c97ae003016362e + 80006218: 00013483 ld x9,0(x2) + 8000621c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x232e3ad095c725d8 + 80006220: 00013f03 ld x30,0(x2) + 80006224: 00810113 addi x2,x2,8 + +0000000080006228 : +Zbkx_xperm8_cg_cmp_rd_rs2_b30: + xperm8 x30, x9, x30 # perform operation + 80006228: 29e4cf33 xperm8 x30,x9,x30 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zbkx_xperm8_cg_cmp_rd_rs2_b30, Zbkx_xperm8_cg_cmp_rd_rs2_b30_str) + 8000622c: 00063203 ld x4,0(x12) + 80006230: 01e20c63 beq x4,x30,80006248 + 80006234: 2cd012ef jal x5,80007d00 + 80006238: 80006228 .word 0x80006228 + 8000623c: 00000000 .word 0x00000000 + 80006240: 80017dbe .word 0x80017dbe + 80006244: 00000000 .word 0x00000000 + 80006248: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x7993f1b2df35627a + 8000624c: 00013003 ld x0,0(x2) + 80006250: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x5f119e7a330fa32c + 80006254: 00013f83 ld x31,0(x2) + 80006258: 00810113 addi x2,x2,8 + +000000008000625c : +Zbkx_xperm8_cg_cmp_rd_rs2_b31: + xperm8 x31, x0, x31 # perform operation + 8000625c: 29f04fb3 xperm8 x31,x0,x31 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zbkx_xperm8_cg_cmp_rd_rs2_b31, Zbkx_xperm8_cg_cmp_rd_rs2_b31_str) + 80006260: 00063203 ld x4,0(x12) + 80006264: 01f20c63 beq x4,x31,8000627c + 80006268: 299012ef jal x5,80007d00 + 8000626c: 8000625c .word 0x8000625c + 80006270: 00000000 .word 0x00000000 + 80006274: 80017df8 .word 0x80017df8 + 80006278: 00000000 .word 0x00000000 + 8000627c: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0xc7475e50d39506c9 + 80006280: 00013003 ld x0,0(x2) + 80006284: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0xb75717bf87f3394b + 80006288: 00013003 ld x0,0(x2) + 8000628c: 00810113 addi x2,x2,8 + +0000000080006290 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0: + xperm8 x0, x0, x0 # perform operation + 80006290: 28004033 xperm8 x0,x0,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b0_str) + 80006294: 00063203 ld x4,0(x12) + 80006298: 00020c63 beq x4,x0,800062b0 + 8000629c: 265012ef jal x5,80007d00 + 800062a0: 80006290 .word 0x80006290 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 80017e32 .word 0x80017e32 + 800062ac: 00000000 .word 0x00000000 + 800062b0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xb9753f2297b091f3 + 800062b4: 00013083 ld x1,0(x2) + 800062b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xf90c2ec689970c81 + 800062bc: 00013083 ld x1,0(x2) + 800062c0: 00810113 addi x2,x2,8 + +00000000800062c4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1: + xperm8 x1, x1, x1 # perform operation + 800062c4: 2810c0b3 xperm8 x1,x1,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b1_str) + 800062c8: 00063203 ld x4,0(x12) + 800062cc: 00120c63 beq x4,x1,800062e4 + 800062d0: 231012ef jal x5,80007d00 + 800062d4: 800062c4 .word 0x800062c4 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 80017e6f .word 0x80017e6f + 800062e0: 00000000 .word 0x00000000 + 800062e4: 00860613 addi x12,x12,8 + + mv x11, x2 # switch data pointer register to avoid conflict with test + 800062e8: 00010593 addi x11,x2,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs1: x2 = 0x22b52b976405d2c2 + 800062ec: 0005b103 ld x2,0(x11) + 800062f0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0xec950d1cccc8c91d + 800062f4: 0005b103 ld x2,0(x11) + 800062f8: 00858593 addi x11,x11,8 + +00000000800062fc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2: + xperm8 x2, x2, x2 # perform operation + 800062fc: 28214133 xperm8 x2,x2,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b2_str) + 80006300: 00063203 ld x4,0(x12) + 80006304: 00220c63 beq x4,x2,8000631c + 80006308: 1f9012ef jal x5,80007d00 + 8000630c: 800062fc .word 0x800062fc + 80006310: 00000000 .word 0x00000000 + 80006314: 80017eac .word 0x80017eac + 80006318: 00000000 .word 0x00000000 + 8000631c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x8f19e36e5d0b45cf + 80006320: 0005b183 ld x3,0(x11) + 80006324: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0x361b0ac55e5e27cf + 80006328: 0005b183 ld x3,0(x11) + 8000632c: 00858593 addi x11,x11,8 + +0000000080006330 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3: + xperm8 x3, x3, x3 # perform operation + 80006330: 2831c1b3 xperm8 x3,x3,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b3_str) + 80006334: 00063203 ld x4,0(x12) + 80006338: 00320c63 beq x4,x3,80006350 + 8000633c: 1c5012ef jal x5,80007d00 + 80006340: 80006330 .word 0x80006330 + 80006344: 00000000 .word 0x00000000 + 80006348: 80017ee9 .word 0x80017ee9 + 8000634c: 00000000 .word 0x00000000 + 80006350: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006354: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80006358: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x17aa9446c0e6d005 + 8000635c: 0005b203 ld x4,0(x11) + 80006360: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0xac2067406267088b + 80006364: 0005b203 ld x4,0(x11) + 80006368: 00858593 addi x11,x11,8 + +000000008000636c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4: + xperm8 x4, x4, x4 # perform operation + 8000636c: 28424233 xperm8 x4,x4,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b4_str) + 80006370: 00063683 ld x13,0(x12) + 80006374: 00468c63 beq x13,x4,8000638c + 80006378: 1c90176f jal x14,80007d40 + 8000637c: 8000636c .word 0x8000636c + 80006380: 00000000 .word 0x00000000 + 80006384: 80017f26 .word 0x80017f26 + 80006388: 00000000 .word 0x00000000 + 8000638c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x4d93322c436ac834 + 80006390: 0005b283 ld x5,0(x11) + 80006394: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0xc2c780437d2ccd26 + 80006398: 0005b283 ld x5,0(x11) + 8000639c: 00858593 addi x11,x11,8 + +00000000800063a0 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5: + xperm8 x5, x5, x5 # perform operation + 800063a0: 2852c2b3 xperm8 x5,x5,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b5_str) + 800063a4: 00063683 ld x13,0(x12) + 800063a8: 00568c63 beq x13,x5,800063c0 + 800063ac: 1950176f jal x14,80007d40 + 800063b0: 800063a0 .word 0x800063a0 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 80017f63 .word 0x80017f63 + 800063bc: 00000000 .word 0x00000000 + 800063c0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x48d3fe5155ebfa67 + 800063c4: 0005b303 ld x6,0(x11) + 800063c8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x166ce7844be57cec + 800063cc: 0005b303 ld x6,0(x11) + 800063d0: 00858593 addi x11,x11,8 + +00000000800063d4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6: + xperm8 x6, x6, x6 # perform operation + 800063d4: 28634333 xperm8 x6,x6,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b6_str) + 800063d8: 00063683 ld x13,0(x12) + 800063dc: 00668c63 beq x13,x6,800063f4 + 800063e0: 1610176f jal x14,80007d40 + 800063e4: 800063d4 .word 0x800063d4 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 80017fa0 .word 0x80017fa0 + 800063f0: 00000000 .word 0x00000000 + 800063f4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0xd90ba56ff128a706 + 800063f8: 0005b383 ld x7,0(x11) + 800063fc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0x766e6cd231148abb + 80006400: 0005b383 ld x7,0(x11) + 80006404: 00858593 addi x11,x11,8 + +0000000080006408 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7: + xperm8 x7, x7, x7 # perform operation + 80006408: 2873c3b3 xperm8 x7,x7,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b7_str) + 8000640c: 00063683 ld x13,0(x12) + 80006410: 00768c63 beq x13,x7,80006428 + 80006414: 12d0176f jal x14,80007d40 + 80006418: 80006408 .word 0x80006408 + 8000641c: 00000000 .word 0x00000000 + 80006420: 80017fdd .word 0x80017fdd + 80006424: 00000000 .word 0x00000000 + 80006428: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0xd5852c9c704239f9 + 8000642c: 0005b403 ld x8,0(x11) + 80006430: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xbb5a171c95a49f13 + 80006434: 0005b403 ld x8,0(x11) + 80006438: 00858593 addi x11,x11,8 + +000000008000643c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8: + xperm8 x8, x8, x8 # perform operation + 8000643c: 28844433 xperm8 x8,x8,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b8_str) + 80006440: 00063683 ld x13,0(x12) + 80006444: 00868c63 beq x13,x8,8000645c + 80006448: 0f90176f jal x14,80007d40 + 8000644c: 8000643c .word 0x8000643c + 80006450: 00000000 .word 0x00000000 + 80006454: 8001801a .word 0x8001801a + 80006458: 00000000 .word 0x00000000 + 8000645c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x3cfaa83f22b463d0 + 80006460: 0005b483 ld x9,0(x11) + 80006464: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0x05736bf27305b05f + 80006468: 0005b483 ld x9,0(x11) + 8000646c: 00858593 addi x11,x11,8 + +0000000080006470 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9: + xperm8 x9, x9, x9 # perform operation + 80006470: 2894c4b3 xperm8 x9,x9,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b9_str) + 80006474: 00063683 ld x13,0(x12) + 80006478: 00968c63 beq x13,x9,80006490 + 8000647c: 0c50176f jal x14,80007d40 + 80006480: 80006470 .word 0x80006470 + 80006484: 00000000 .word 0x00000000 + 80006488: 80018057 .word 0x80018057 + 8000648c: 00000000 .word 0x00000000 + 80006490: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x787956181f2aa4e1 + 80006494: 0005b503 ld x10,0(x11) + 80006498: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x2ca1a1f73ce687f4 + 8000649c: 0005b503 ld x10,0(x11) + 800064a0: 00858593 addi x11,x11,8 + +00000000800064a4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10: + xperm8 x10, x10, x10 # perform operation + 800064a4: 28a54533 xperm8 x10,x10,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b10_str) + 800064a8: 00063683 ld x13,0(x12) + 800064ac: 00a68c63 beq x13,x10,800064c4 + 800064b0: 0910176f jal x14,80007d40 + 800064b4: 800064a4 .word 0x800064a4 + 800064b8: 00000000 .word 0x00000000 + 800064bc: 80018094 .word 0x80018094 + 800064c0: 00000000 .word 0x00000000 + 800064c4: 00860613 addi x12,x12,8 + + mv x25, x11 # switch data pointer register to avoid conflict with test + 800064c8: 00058c93 addi x25,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xbabade8dfd517a3d + 800064cc: 000cb583 ld x11,0(x25) + 800064d0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x2e6262076bfab908 + 800064d4: 000cb583 ld x11,0(x25) + 800064d8: 008c8c93 addi x25,x25,8 + +00000000800064dc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11: + xperm8 x11, x11, x11 # perform operation + 800064dc: 28b5c5b3 xperm8 x11,x11,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b11_str) + 800064e0: 00063683 ld x13,0(x12) + 800064e4: 00b68c63 beq x13,x11,800064fc + 800064e8: 0590176f jal x14,80007d40 + 800064ec: 800064dc .word 0x800064dc + 800064f0: 00000000 .word 0x00000000 + 800064f4: 800180d2 .word 0x800180d2 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 00860613 addi x12,x12,8 + + mv x19, x12 # switch signature pointer register to avoid conflict with test + 80006500: 00060993 addi x19,x12,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0xf8f91a9e5a6b2ed8 + 80006504: 000cb603 ld x12,0(x25) + 80006508: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x1f4c43c7f94c143e + 8000650c: 000cb603 ld x12,0(x25) + 80006510: 008c8c93 addi x25,x25,8 + +0000000080006514 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12: + xperm8 x12, x12, x12 # perform operation + 80006514: 28c64633 xperm8 x12,x12,x12 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b12_str) + 80006518: 0009b683 ld x13,0(x19) + 8000651c: 00c68c63 beq x13,x12,80006534 + 80006520: 0210176f jal x14,80007d40 + 80006524: 80006514 .word 0x80006514 + 80006528: 00000000 .word 0x00000000 + 8000652c: 80018110 .word 0x80018110 + 80006530: 00000000 .word 0x00000000 + 80006534: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80006538: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000653c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x5ed362ebd83fe428 + 80006540: 000cb683 ld x13,0(x25) + 80006544: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x49a7fd389582627d + 80006548: 000cb683 ld x13,0(x25) + 8000654c: 008c8c93 addi x25,x25,8 + +0000000080006550 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13: + xperm8 x13, x13, x13 # perform operation + 80006550: 28d6c6b3 xperm8 x13,x13,x13 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b13_str) + 80006554: 0009b203 ld x4,0(x19) + 80006558: 00d20c63 beq x4,x13,80006570 + 8000655c: 7a4012ef jal x5,80007d00 + 80006560: 80006550 .word 0x80006550 + 80006564: 00000000 .word 0x00000000 + 80006568: 8001814e .word 0x8001814e + 8000656c: 00000000 .word 0x00000000 + 80006570: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x2a50fe05f086ed34 + 80006574: 000cb703 ld x14,0(x25) + 80006578: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0xc2cf32e305cad9b3 + 8000657c: 000cb703 ld x14,0(x25) + 80006580: 008c8c93 addi x25,x25,8 + +0000000080006584 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14: + xperm8 x14, x14, x14 # perform operation + 80006584: 28e74733 xperm8 x14,x14,x14 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b14_str) + 80006588: 0009b203 ld x4,0(x19) + 8000658c: 00e20c63 beq x4,x14,800065a4 + 80006590: 770012ef jal x5,80007d00 + 80006594: 80006584 .word 0x80006584 + 80006598: 00000000 .word 0x00000000 + 8000659c: 8001818c .word 0x8001818c + 800065a0: 00000000 .word 0x00000000 + 800065a4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x276885e4ef28e449 + 800065a8: 000cb783 ld x15,0(x25) + 800065ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0xea0e6d60e74873b7 + 800065b0: 000cb783 ld x15,0(x25) + 800065b4: 008c8c93 addi x25,x25,8 + +00000000800065b8 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15: + xperm8 x15, x15, x15 # perform operation + 800065b8: 28f7c7b3 xperm8 x15,x15,x15 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b15_str) + 800065bc: 0009b203 ld x4,0(x19) + 800065c0: 00f20c63 beq x4,x15,800065d8 + 800065c4: 73c012ef jal x5,80007d00 + 800065c8: 800065b8 .word 0x800065b8 + 800065cc: 00000000 .word 0x00000000 + 800065d0: 800181ca .word 0x800181ca + 800065d4: 00000000 .word 0x00000000 + 800065d8: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x207c0ffc9a09fcbf + 800065dc: 000cb803 ld x16,0(x25) + 800065e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs2: x16 = 0x791f9e866ae7c956 + 800065e4: 000cb803 ld x16,0(x25) + 800065e8: 008c8c93 addi x25,x25,8 + +00000000800065ec : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16: + xperm8 x16, x16, x16 # perform operation + 800065ec: 29084833 xperm8 x16,x16,x16 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b16_str) + 800065f0: 0009b203 ld x4,0(x19) + 800065f4: 01020c63 beq x4,x16,8000660c + 800065f8: 708012ef jal x5,80007d00 + 800065fc: 800065ec .word 0x800065ec + 80006600: 00000000 .word 0x00000000 + 80006604: 80018208 .word 0x80018208 + 80006608: 00000000 .word 0x00000000 + 8000660c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x33436b3ed6ad7223 + 80006610: 000cb883 ld x17,0(x25) + 80006614: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0x8b7f97137cee11bf + 80006618: 000cb883 ld x17,0(x25) + 8000661c: 008c8c93 addi x25,x25,8 + +0000000080006620 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17: + xperm8 x17, x17, x17 # perform operation + 80006620: 2918c8b3 xperm8 x17,x17,x17 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b17_str) + 80006624: 0009b203 ld x4,0(x19) + 80006628: 01120c63 beq x4,x17,80006640 + 8000662c: 6d4012ef jal x5,80007d00 + 80006630: 80006620 .word 0x80006620 + 80006634: 00000000 .word 0x00000000 + 80006638: 80018246 .word 0x80018246 + 8000663c: 00000000 .word 0x00000000 + 80006640: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x3da35121c9b05437 + 80006644: 000cb903 ld x18,0(x25) + 80006648: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x2a4908ed05d4dcc5 + 8000664c: 000cb903 ld x18,0(x25) + 80006650: 008c8c93 addi x25,x25,8 + +0000000080006654 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18: + xperm8 x18, x18, x18 # perform operation + 80006654: 29294933 xperm8 x18,x18,x18 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 0009b203 ld x4,0(x19) + 8000665c: 01220c63 beq x4,x18,80006674 + 80006660: 6a0012ef jal x5,80007d00 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 80018284 .word 0x80018284 + 80006670: 00000000 .word 0x00000000 + 80006674: 00898993 addi x19,x19,8 + + mv x11, x19 # switch signature pointer register to avoid conflict with test + 80006678: 00098593 addi x11,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x19a701018eae86a4 + 8000667c: 000cb983 ld x19,0(x25) + 80006680: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x2aec27cee9703b3e + 80006684: 000cb983 ld x19,0(x25) + 80006688: 008c8c93 addi x25,x25,8 + +000000008000668c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19: + xperm8 x19, x19, x19 # perform operation + 8000668c: 2939c9b3 xperm8 x19,x19,x19 + # Check if x19 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x19, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b19_str) + 80006690: 0005b203 ld x4,0(x11) + 80006694: 01320c63 beq x4,x19,800066ac + 80006698: 668012ef jal x5,80007d00 + 8000669c: 8000668c .word 0x8000668c + 800066a0: 00000000 .word 0x00000000 + 800066a4: 800182c2 .word 0x800182c2 + 800066a8: 00000000 .word 0x00000000 + 800066ac: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x529c9579f4449514 + 800066b0: 000cba03 ld x20,0(x25) + 800066b4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x568a1966c87bd4d4 + 800066b8: 000cba03 ld x20,0(x25) + 800066bc: 008c8c93 addi x25,x25,8 + +00000000800066c0 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20: + xperm8 x20, x20, x20 # perform operation + 800066c0: 294a4a33 xperm8 x20,x20,x20 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b20_str) + 800066c4: 0005b203 ld x4,0(x11) + 800066c8: 01420c63 beq x4,x20,800066e0 + 800066cc: 634012ef jal x5,80007d00 + 800066d0: 800066c0 .word 0x800066c0 + 800066d4: 00000000 .word 0x00000000 + 800066d8: 80018300 .word 0x80018300 + 800066dc: 00000000 .word 0x00000000 + 800066e0: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x8d26ce9c3a4f0954 + 800066e4: 000cba83 ld x21,0(x25) + 800066e8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x2ef15907e21ba451 + 800066ec: 000cba83 ld x21,0(x25) + 800066f0: 008c8c93 addi x25,x25,8 + +00000000800066f4 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21: + xperm8 x21, x21, x21 # perform operation + 800066f4: 295acab3 xperm8 x21,x21,x21 + # Check if x21 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x21, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b21_str) + 800066f8: 0005b203 ld x4,0(x11) + 800066fc: 01520c63 beq x4,x21,80006714 + 80006700: 600012ef jal x5,80007d00 + 80006704: 800066f4 .word 0x800066f4 + 80006708: 00000000 .word 0x00000000 + 8000670c: 8001833e .word 0x8001833e + 80006710: 00000000 .word 0x00000000 + 80006714: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xb766ee57bc702147 + 80006718: 000cbb03 ld x22,0(x25) + 8000671c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x6c5cf8c1142a4ebf + 80006720: 000cbb03 ld x22,0(x25) + 80006724: 008c8c93 addi x25,x25,8 + +0000000080006728 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22: + xperm8 x22, x22, x22 # perform operation + 80006728: 296b4b33 xperm8 x22,x22,x22 + # Check if x22 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x22, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b22_str) + 8000672c: 0005b203 ld x4,0(x11) + 80006730: 01620c63 beq x4,x22,80006748 + 80006734: 5cc012ef jal x5,80007d00 + 80006738: 80006728 .word 0x80006728 + 8000673c: 00000000 .word 0x00000000 + 80006740: 8001837c .word 0x8001837c + 80006744: 00000000 .word 0x00000000 + 80006748: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x873bb20f25ef0378 + 8000674c: 000cbb83 ld x23,0(x25) + 80006750: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x98d615955a15d879 + 80006754: 000cbb83 ld x23,0(x25) + 80006758: 008c8c93 addi x25,x25,8 + +000000008000675c : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23: + xperm8 x23, x23, x23 # perform operation + 8000675c: 297bcbb3 xperm8 x23,x23,x23 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b23_str) + 80006760: 0005b203 ld x4,0(x11) + 80006764: 01720c63 beq x4,x23,8000677c + 80006768: 598012ef jal x5,80007d00 + 8000676c: 8000675c .word 0x8000675c + 80006770: 00000000 .word 0x00000000 + 80006774: 800183ba .word 0x800183ba + 80006778: 00000000 .word 0x00000000 + 8000677c: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xa79c223e7c52fe04 + 80006780: 000cbc03 ld x24,0(x25) + 80006784: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xe1dc9760ce9c2648 + 80006788: 000cbc03 ld x24,0(x25) + 8000678c: 008c8c93 addi x25,x25,8 + +0000000080006790 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24: + xperm8 x24, x24, x24 # perform operation + 80006790: 298c4c33 xperm8 x24,x24,x24 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b24_str) + 80006794: 0005b203 ld x4,0(x11) + 80006798: 01820c63 beq x4,x24,800067b0 + 8000679c: 564012ef jal x5,80007d00 + 800067a0: 80006790 .word 0x80006790 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 800183f8 .word 0x800183f8 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 00858593 addi x11,x11,8 + + mv x16, x25 # switch data pointer register to avoid conflict with test + 800067b4: 000c8813 addi x16,x25,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xca010600a795cc9b + 800067b8: 00083c83 ld x25,0(x16) + 800067bc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x85de5a884a0417d2 + 800067c0: 00083c83 ld x25,0(x16) + 800067c4: 00880813 addi x16,x16,8 + +00000000800067c8 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25: + xperm8 x25, x25, x25 # perform operation + 800067c8: 299cccb3 xperm8 x25,x25,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b25_str) + 800067cc: 0005b203 ld x4,0(x11) + 800067d0: 01920c63 beq x4,x25,800067e8 + 800067d4: 52c012ef jal x5,80007d00 + 800067d8: 800067c8 .word 0x800067c8 + 800067dc: 00000000 .word 0x00000000 + 800067e0: 80018436 .word 0x80018436 + 800067e4: 00000000 .word 0x00000000 + 800067e8: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x8ba8d65e73426d20 + 800067ec: 00083d03 ld x26,0(x16) + 800067f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xa8bb76e21e90fd68 + 800067f4: 00083d03 ld x26,0(x16) + 800067f8: 00880813 addi x16,x16,8 + +00000000800067fc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26: + xperm8 x26, x26, x26 # perform operation + 800067fc: 29ad4d33 xperm8 x26,x26,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x26, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b26_str) + 80006800: 0005b203 ld x4,0(x11) + 80006804: 01a20c63 beq x4,x26,8000681c + 80006808: 4f8012ef jal x5,80007d00 + 8000680c: 800067fc .word 0x800067fc + 80006810: 00000000 .word 0x00000000 + 80006814: 80018474 .word 0x80018474 + 80006818: 00000000 .word 0x00000000 + 8000681c: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x43a44aa2b31b90db + 80006820: 00083d83 ld x27,0(x16) + 80006824: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x7085bcd1a12c8ed3 + 80006828: 00083d83 ld x27,0(x16) + 8000682c: 00880813 addi x16,x16,8 + +0000000080006830 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27: + xperm8 x27, x27, x27 # perform operation + 80006830: 29bdcdb3 xperm8 x27,x27,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x27, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 0005b203 ld x4,0(x11) + 80006838: 01b20c63 beq x4,x27,80006850 + 8000683c: 4c4012ef jal x5,80007d00 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 800184b2 .word 0x800184b2 + 8000684c: 00000000 .word 0x00000000 + 80006850: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x5a6007ef716ad028 + 80006854: 00083e03 ld x28,0(x16) + 80006858: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0xa4fb09c1e122e795 + 8000685c: 00083e03 ld x28,0(x16) + 80006860: 00880813 addi x16,x16,8 + +0000000080006864 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28: + xperm8 x28, x28, x28 # perform operation + 80006864: 29ce4e33 xperm8 x28,x28,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x28, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 0005b203 ld x4,0(x11) + 8000686c: 01c20c63 beq x4,x28,80006884 + 80006870: 490012ef jal x5,80007d00 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 800184f0 .word 0x800184f0 + 80006880: 00000000 .word 0x00000000 + 80006884: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x4e51fc210d3055ce + 80006888: 00083e83 ld x29,0(x16) + 8000688c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x158fdcd89bca2b4b + 80006890: 00083e83 ld x29,0(x16) + 80006894: 00880813 addi x16,x16,8 + +0000000080006898 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29: + xperm8 x29, x29, x29 # perform operation + 80006898: 29deceb3 xperm8 x29,x29,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x29, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 0005b203 ld x4,0(x11) + 800068a0: 01d20c63 beq x4,x29,800068b8 + 800068a4: 45c012ef jal x5,80007d00 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 8001852e .word 0x8001852e + 800068b4: 00000000 .word 0x00000000 + 800068b8: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x701d3a7efad179e1 + 800068bc: 00083f03 ld x30,0(x16) + 800068c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xbc91db3d7742d96c + 800068c4: 00083f03 ld x30,0(x16) + 800068c8: 00880813 addi x16,x16,8 + +00000000800068cc : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30: + xperm8 x30, x30, x30 # perform operation + 800068cc: 29ef4f33 xperm8 x30,x30,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b30_str) + 800068d0: 0005b203 ld x4,0(x11) + 800068d4: 01e20c63 beq x4,x30,800068ec + 800068d8: 428012ef jal x5,80007d00 + 800068dc: 800068cc .word 0x800068cc + 800068e0: 00000000 .word 0x00000000 + 800068e4: 8001856c .word 0x8001856c + 800068e8: 00000000 .word 0x00000000 + 800068ec: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x0015f292de762188 + 800068f0: 00083f83 ld x31,0(x16) + 800068f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0xa3eff40d3890756b + 800068f8: 00083f83 ld x31,0(x16) + 800068fc: 00880813 addi x16,x16,8 + +0000000080006900 : +Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31: + xperm8 x31, x31, x31 # perform operation + 80006900: 29ffcfb3 xperm8 x31,x31,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x31, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31, Zbkx_xperm8_cg_cmp_rd_rs1_rs2_b31_str) + 80006904: 0005b203 ld x4,0(x11) + 80006908: 01f20c63 beq x4,x31,80006920 + 8000690c: 3f4012ef jal x5,80007d00 + 80006910: 80006900 .word 0x80006900 + 80006914: 00000000 .word 0x00000000 + 80006918: 800185aa .word 0x800185aa + 8000691c: 00000000 .word 0x00000000 + 80006920: 00858593 addi x11,x11,8 + + mv x2, x11 # restore signature pointer to default register for teardown + 80006924: 00058113 addi x2,x11,0 + +0000000080006928 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006928: 00000513 addi x10,x0,0 + 8000692c: 00000073 ecall + 80006930: fff00513 addi x10,x0,-1 + 80006934: 25800413 addi x8,x0,600 + +0000000080006938 : + 80006938: 34002373 csrrs x6,mscratch,x0 + +000000008000693c : + 8000693c: 2b833383 ld x7,696(x6) + +0000000080006940 : + 80006940: 2a033383 ld x7,672(x6) + +0000000080006944 : + 80006944: 2d033483 ld x9,720(x6) + 80006948: 34049073 csrrw x0,mscratch,x9 + +000000008000694c : + 8000694c: 2c833483 ld x9,712(x6) + 80006950: 305493f3 csrrw x7,mtvec,x9 + 80006954: ffc4f493 andi x9,x9,-4 + 80006958: ffc3f393 andi x7,x7,-4 + 8000695c: 00749e63 bne x9,x7,80006978 + +0000000080006960 : + 80006960: 00030493 addi x9,x6,0 + +0000000080006964 : + 80006964: 0004a783 lw x15,0(x9) + 80006968: 00f3a023 sw x15,0(x7) + 8000696c: 00438393 addi x7,x7,4 + 80006970: 00448493 addi x9,x9,4 + 80006974: fe83c8e3 blt x7,x8,80006964 + 80006978: 0000100f fence.i + +000000008000697c : + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: 35050513 addi x10,x10,848 # 80018d10 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: 34b50513 addi x10,x10,843 # 80018d4b + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: 36b50513 addi x10,x10,875 # 80018dab + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: ed650513 addi x10,x10,-298 # 80019956 + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00015397 auipc x7,0x15 + 80006b04: 95038393 addi x7,x7,-1712 # 8001b450 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00015417 auipc x8,0x15 + 80006b44: 90040413 addi x8,x8,-1792 # 8001b440 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80018eff .word 0x80018eff + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80018d6d .word 0x80018d6d + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: 11450513 addi x10,x10,276 # 80018cd4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: 11050513 addi x10,x10,272 # 80018d10 + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc9ff06f jal x0,80006928 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: ca5ff06f jal x0,80006928 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9c30313 addi x6,x6,-1380 # 8000697c + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 2ad50513 addi x10,x10,685 # 8001a38d + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00011517 auipc x10,0x11 + 80007124: 63850513 addi x10,x10,1592 # 80018758 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: cb450513 addi x10,x10,-844 # 80018e14 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: b7050513 addi x10,x10,-1168 # 80018d10 + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: 19848493 addi x9,x9,408 # 80018738 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 33840413 addi x8,x8,824 # 80038918 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 80018f16 .word 0x80018f16 + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 80019018 .word 0x80019018 + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80019113 .word 0x80019113 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 80019206 .word 0x80019206 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 80019379 .word 0x80019379 + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00011217 auipc x4,0x11 + 80007d04: 8f020213 addi x4,x4,-1808 # 800185f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00011397 auipc x7,0x11 + 80007d1c: 8d838393 addi x7,x7,-1832 # 800185f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00011697 auipc x13,0x11 + 80007d44: 8b068693 addi x13,x13,-1872 # 800185f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00011497 auipc x9,0x11 + 80007d6c: 88848493 addi x9,x9,-1912 # 800185f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00010497 auipc x9,0x10 + 80007e10: 7e44a483 lw x9,2020(x9) # 800185f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00012417 auipc x8,0x12 + 80007ec4: 52040413 addi x8,x8,1312 # 8001a3e0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: a2040413 addi x8,x8,-1504 # 80038920 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00010497 auipc x9,0x10 + 80007f44: 7d848493 addi x9,x9,2008 # 80018718 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00010497 auipc x9,0x10 + 80007f84: 79848493 addi x9,x9,1944 # 80018718 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00010817 auipc x16,0x10 + 80007fc0: 76c80813 addi x16,x16,1900 # 80018728 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00010817 auipc x16,0x10 + 80007fe0: 74c80813 addi x16,x16,1868 # 80018728 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: f1738393 addi x7,x7,-233 # 80018eff + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00010817 auipc x16,0x10 + 80007ffc: 72880813 addi x16,x16,1832 # 80018720 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: f1238393 addi x7,x7,-238 # 80018f16 + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: ffc38393 addi x7,x7,-4 # 80019018 + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: 0df38393 addi x7,x7,223 # 80019113 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: 1ba38393 addi x7,x7,442 # 80019206 + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 31538393 addi x7,x7,789 # 80019379 + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 28138393 addi x7,x7,641 # 800192fd + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 2a738393 addi x7,x7,679 # 8001933b + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: eaa38393 addi x7,x7,-342 # 80018f56 + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: f9238393 addi x7,x7,-110 # 80019056 + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: 07338393 addi x7,x7,115 # 8001914f + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: 14f38393 addi x7,x7,335 # 80019243 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 2a838393 addi x7,x7,680 # 800193b4 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: e7238393 addi x7,x7,-398 # 80018f96 + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: f5838393 addi x7,x7,-168 # 80019094 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: 03738393 addi x7,x7,55 # 8001918b + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: 11438393 addi x7,x7,276 # 80019280 + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 26b38393 addi x7,x7,619 # 800193ef + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: e3b38393 addi x7,x7,-453 # 80018fd7 + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: f1f38393 addi x7,x7,-225 # 800190d3 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: ffc38393 addi x7,x7,-4 # 800191c8 + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: 0da38393 addi x7,x7,218 # 800192be + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 22f38393 addi x7,x7,559 # 8001942b + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 25438393 addi x7,x7,596 # 80019468 + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 28b38393 addi x7,x7,651 # 800194b7 + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 36e38393 addi x7,x7,878 # 800195b2 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00011397 auipc x7,0x11 + 80008260: 45238393 addi x7,x7,1106 # 800196ae + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00010817 auipc x16,0x10 + 80008280: 4a480813 addi x16,x16,1188 # 80018720 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00010817 auipc x16,0x10 + 80008290: 49480813 addi x16,x16,1172 # 80018720 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00010817 auipc x16,0x10 + 8000829c: 48c80813 addi x16,x16,1164 # 80018724 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00010817 auipc x16,0x10 + 800082ac: 47880813 addi x16,x16,1144 # 80018720 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: a1050513 addi x10,x10,-1520 # 80018d10 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: a0b50513 addi x10,x10,-1525 # 80018d4b + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: a8250513 addi x10,x10,-1406 # 80018e02 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 36853503 ld x10,872(x10) # 80018710 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: a5450513 addi x10,x10,-1452 # 80018e14 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 20852503 lw x10,520(x10) # 800185f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: a1650513 addi x10,x10,-1514 # 80018e16 + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 2c852503 lw x10,712(x10) # 800186f0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 2f850513 addi x10,x10,760 # 80018758 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: 98a50513 addi x10,x10,-1654 # 80018e2a + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 23053503 ld x10,560(x10) # 800186f8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 27850513 addi x10,x10,632 # 80018758 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 34150513 addi x10,x10,833 # 80019861 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: 0a852503 lw x10,168(x10) # 800185f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: 1f860613 addi x12,x12,504 # 80018758 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: 16c52503 lw x10,364(x10) # 800186f4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 3b750513 addi x10,x10,951 # 80019977 + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: 15860613 addi x12,x12,344 # 80018758 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: 0cc52503 lw x10,204(x10) # 800186f4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: 11860613 addi x12,x12,280 # 80018758 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: 08c52503 lw x10,140(x10) # 800186f4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: 1da50513 addi x10,x10,474 # 8001985a + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: 09850513 addi x10,x10,152 # 80018758 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: 17250513 addi x10,x10,370 # 80019872 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: ec852503 lw x10,-312(x10) # 800185f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: fc853503 ld x10,-56(x10) # 80018700 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: fb453503 ld x10,-76(x10) # 80018700 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: ff850513 addi x10,x10,-8 # 80018758 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: f9052503 lw x10,-112(x10) # 80018718 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: 0e950513 addi x10,x10,233 # 80019889 + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: e2852503 lw x10,-472(x10) # 800185f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: f3053503 ld x10,-208(x10) # 80018708 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: f1c53503 ld x10,-228(x10) # 80018708 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: f5850513 addi x10,x10,-168 # 80018758 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: 06050513 addi x10,x10,96 # 800198a0 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: ea053503 ld x10,-352(x10) # 80018708 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: ed850513 addi x10,x10,-296 # 80018758 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: 03e50513 addi x10,x10,62 # 800198fe + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: e2053503 ld x10,-480(x10) # 80018708 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: e5850513 addi x10,x10,-424 # 80018758 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: df442403 lw x8,-524(x8) # 80018720 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: 06350513 addi x10,x10,99 # 800199a3 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: 04f50513 addi x10,x10,79 # 800199cf + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: d8080813 addi x16,x16,-640 # 80018728 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00010517 auipc x10,0x10 + 800089c4: 45450513 addi x10,x10,1108 # 80018e14 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: fdf50513 addi x10,x10,-33 # 800199df + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: ce053503 ld x10,-800(x10) # 80018708 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: d1850513 addi x10,x10,-744 # 80018758 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: f8a50513 addi x10,x10,-118 # 80019a0a + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: c5853503 ld x10,-936(x10) # 80018700 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: c9850513 addi x10,x10,-872 # 80018758 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: c1833303 ld x6,-1000(x6) # 80018700 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: c183b383 ld x7,-1000(x7) # 80018708 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: f3950513 addi x10,x10,-199 # 80019a39 + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: f6150513 addi x10,x10,-159 # 80019aa1 + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: b9833303 ld x6,-1128(x6) # 80018700 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: b983b383 ld x7,-1128(x7) # 80018708 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: bb850513 addi x10,x10,-1096 # 80018758 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: ee850513 addi x10,x10,-280 # 80019ac8 + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: e4550513 addi x10,x10,-443 # 80019a65 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: e4150513 addi x10,x10,-447 # 80019aa1 + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: a8033303 ld x6,-1408(x6) # 80018708 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: a703b383 ld x7,-1424(x7) # 80018700 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: a9850513 addi x10,x10,-1384 # 80018758 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: eb050513 addi x10,x10,-336 # 80019bb0 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: f5750513 addi x10,x10,-169 # 80019c97 + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 00010517 auipc x10,0x10 + 80008d6c: 9bc52503 lw x10,-1604(x10) # 80018724 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: f3350513 addi x10,x10,-205 # 80019cd3 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: ed150513 addi x10,x10,-303 # 80019cb1 + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: e9950513 addi x10,x10,-359 # 80019cb9 + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: e6150513 addi x10,x10,-415 # 80019cc1 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: e2a50513 addi x10,x10,-470 # 80019cca + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: dfc50513 addi x10,x10,-516 # 80019cdc + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 00010517 auipc x10,0x10 + 80008f0c: 81852503 lw x10,-2024(x10) # 80018720 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: ed350513 addi x10,x10,-301 # 80019e33 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: d5650513 addi x10,x10,-682 # 80019cf6 + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: d4750513 addi x10,x10,-697 # 80019d27 + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: d2750513 addi x10,x10,-729 # 80019d47 + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: d0550513 addi x10,x10,-763 # 80019d65 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: ce450513 addi x10,x10,-796 # 80019d84 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: ccc50513 addi x10,x10,-820 # 80019dac + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: cb850513 addi x10,x10,-840 # 80019dd8 + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: ca450513 addi x10,x10,-860 # 80019e04 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: ca250513 addi x10,x10,-862 # 80019e42 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 0000f517 auipc x10,0xf + 800091cc: 54053503 ld x10,1344(x10) # 80018708 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 0000f517 auipc x10,0xf + 800091e4: 57850513 addi x10,x10,1400 # 80018758 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: c3950513 addi x10,x10,-967 # 80019e59 + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 0000f517 auipc x10,0xf + 8000924c: 4b853503 ld x10,1208(x10) # 80018700 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 0000f517 auipc x10,0xf + 80009264: 4f850513 addi x10,x10,1272 # 80018758 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 0000f517 auipc x10,0xf + 8000928c: 49852503 lw x10,1176(x10) # 80018720 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: bd050513 addi x10,x10,-1072 # 80019e70 + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 0000f517 auipc x10,0xf + 800092cc: 44053503 ld x10,1088(x10) # 80018708 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: ba750513 addi x10,x10,-1113 # 80019e87 + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 3f853503 ld x10,1016(x10) # 80018700 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 3fc52503 lw x10,1020(x10) # 80018720 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: bbd50513 addi x10,x10,-1091 # 80019efd + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: c5350513 addi x10,x10,-941 # 80019fd3 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: d0650513 addi x10,x10,-762 # 8001a0c6 + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: dc150513 addi x10,x10,-575 # 8001a1c1 + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: e6850513 addi x10,x10,-408 # 8001a2a8 + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: a3550513 addi x10,x10,-1483 # 80019eb5 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 29063603 ld x12,656(x12) # 80018738 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 00010517 auipc x10,0x10 + 800094c4: 9de50513 addi x10,x10,-1570 # 80018e9e + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 23850513 addi x10,x10,568 # 80018758 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 22058593 addi x11,x11,544 # 80018780 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 2b058593 addi x11,x11,688 # 80018840 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 0000f517 auipc x10,0xf + 800095c4: 6fe50513 addi x10,x10,1790 # 80018cbe + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 35650513 addi x10,x10,854 # 80019956 + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: 10060613 addi x12,x12,256 # 80018730 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 00010517 auipc x10,0x10 + 80009644: 87f50513 addi x10,x10,-1921 # 80018ebf + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: 0d053503 ld x10,208(x10) # 80018738 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: 0d850513 addi x10,x10,216 # 80018758 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 00010517 auipc x10,0x10 + 800096c4: 80f50513 addi x10,x10,-2033 # 80018ecf + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: 05853503 ld x10,88(x10) # 80018740 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: 05850513 addi x10,x10,88 # 80018758 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 0000f517 auipc x10,0xf + 80009744: 79f50513 addi x10,x10,1951 # 80018edf + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: fe053503 ld x10,-32(x10) # 80018748 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: fd850513 addi x10,x10,-40 # 80018758 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 0000f517 auipc x10,0xf + 800097c4: 72f50513 addi x10,x10,1839 # 80018eef + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: f6853503 ld x10,-152(x10) # 80018750 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: f5850513 addi x10,x10,-168 # 80018758 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: f0860613 addi x12,x12,-248 # 80018730 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: f1860613 addi x12,x12,-232 # 80018758 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89030313 addi x6,x6,-1904 # 80006928 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87830313 addi x6,x6,-1928 # 80006928 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86030313 addi x6,x6,-1952 # 80006928 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f878793 addi x15,x15,1784 # 80006938 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: f0010113 addi x2,x2,-256 # 8001a3e0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 8001997f .word 0x8001997f + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: fffff297 auipc x5,0xfffff + 800395ec: 41828293 addi x5,x5,1048 # 80038a00 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 3f828293 addi x5,x5,1016 # 80038a00 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknd-aes64ds-00.elf.objdump b/riscv-tests/rv64-Zknd-aes64ds-00.elf.objdump new file mode 100644 index 0000000..4b84fc1 --- /dev/null +++ b/riscv-tests/rv64-Zknd-aes64ds-00.elf.objdump @@ -0,0 +1,23495 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ds-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ds-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000040680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cd00 memsz 0x000000000000cd00 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000032680 memsz 0x0000000000032680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000ccc0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00031bb0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041c00 0000000080041c00 0003fc00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080042000 0000000080042000 00040000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00040680 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Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000 +0000000080019ad0 l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str +0000000080003f38 l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001 +0000000080019b42 l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str +0000000080003f6c l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff +0000000080019bb4 l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str +0000000080003fa0 l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe +0000000080019c26 l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str +0000000080003fd4 l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff +0000000080019c98 l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str +0000000080004008 l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe +0000000080019d0a l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str +000000008000403c l .text.rvtest 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2 +0000000080019d7c l .data 0000000000000000 Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str +0000000080004070 l .text.rvtest 0000000000000000 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0000000000000000 cleanup_epilogs +0000000080043000 g .text.rvmodel 0000000000000000 _end +0000000080041d00 g .tohost 0000000000000000 fromhost +0000000080041c00 g .tohost 0000000000000000 tohost +0000000080009ff0 g .text.rvtest 0000000000000000 rvtest_fail_summary +000000008000a0c0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00042097 auipc x1,0x42 + 80000004: 0e008093 addi x1,x1,224 # 800420e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xdc75d24d5ba9c2b9 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x7312f7028288fee5 + 80000048: 0001bc03 ld x24,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zknd_aes64ds_cg_cp_rs1_b0: + aes64ds x13, x0, x24 # perform operation + 80000050: 3b8006b3 aes64ds x13,x0,x24 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknd_aes64ds_cg_cp_rs1_b0, Zknd_aes64ds_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00d20c63 beq x4,x13,80000070 + 8000005c: 0a40b2ef jal x5,8000b100 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 80013470 .word 0x80013470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xbbe2e2e1df870748 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x2ebe60af813e6189 + 8000007c: 0001bc83 ld x25,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zknd_aes64ds_cg_cp_rs1_b1: + aes64ds x22, x1, x25 # perform operation + 80000084: 3b908b33 aes64ds x22,x1,x25 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknd_aes64ds_cg_cp_rs1_b1, Zknd_aes64ds_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01620c63 beq x4,x22,800000a4 + 80000090: 0700b2ef jal x5,8000b100 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134a4 .word 0x800134a4 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x21, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010a93 addi x21,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc00dde557f3d4eab + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0x25fd4870ae2e95fd + 800000b4: 0001bb03 ld x22,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zknd_aes64ds_cg_cp_rs1_b2: + aes64ds x24, x2, x22 # perform operation + 800000bc: 3b610c33 aes64ds x24,x2,x22 + # Check if x24 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x24, Zknd_aes64ds_cg_cp_rs1_b2, Zknd_aes64ds_cg_cp_rs1_b2_str) + 800000c0: 000ab203 ld x4,0(x21) + 800000c4: 01820c63 beq x4,x24,800000dc + 800000c8: 0380b2ef jal x5,8000b100 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 800134d8 .word 0x800134d8 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008a8a93 addi x21,x21,8 + + mv x26, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018d13 addi x26,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0xd2e8279233d1b2d1 + 800000e4: 000d3183 ld x3,0(x26) + 800000e8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0xa2fa8d3e24194822 + 800000ec: 000d3703 ld x14,0(x26) + 800000f0: 008d0d13 addi x26,x26,8 + +00000000800000f4 : +Zknd_aes64ds_cg_cp_rs1_b3: + aes64ds x22, x3, x14 # perform operation + 800000f4: 3ae18b33 aes64ds x22,x3,x14 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknd_aes64ds_cg_cp_rs1_b3, Zknd_aes64ds_cg_cp_rs1_b3_str) + 800000f8: 000ab203 ld x4,0(x21) + 800000fc: 01620c63 beq x4,x22,80000114 + 80000100: 0000b2ef jal x5,8000b100 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8001350c .word 0x8001350c + 80000110: 00000000 .word 0x00000000 + 80000114: 008a8a93 addi x21,x21,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs1: x4 = 0xdb23bbe0ab971df9 + 80000120: 000d3203 ld x4,0(x26) + 80000124: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x091939a58383c156 + 80000128: 000d3b03 ld x22,0(x26) + 8000012c: 008d0d13 addi x26,x26,8 + +0000000080000130 : +Zknd_aes64ds_cg_cp_rs1_b4: + aes64ds x12, x4, x22 # perform operation + 80000130: 3b620633 aes64ds x12,x4,x22 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknd_aes64ds_cg_cp_rs1_b4, Zknd_aes64ds_cg_cp_rs1_b4_str) + 80000134: 000ab683 ld x13,0(x21) + 80000138: 00c68c63 beq x13,x12,80000150 + 8000013c: 0040b76f jal x14,8000b140 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 80013540 .word 0x80013540 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x26, x5) # load rs1: x5 = 0x664d19d29d166927 + 80000154: 000d3283 ld x5,0(x26) + 80000158: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0xc233e4b32c832802 + 8000015c: 000d3003 ld x0,0(x26) + 80000160: 008d0d13 addi x26,x26,8 + +0000000080000164 : +Zknd_aes64ds_cg_cp_rs1_b5: + aes64ds x11, x5, x0 # perform operation + 80000164: 3a0285b3 aes64ds x11,x5,x0 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zknd_aes64ds_cg_cp_rs1_b5, Zknd_aes64ds_cg_cp_rs1_b5_str) + 80000168: 000ab683 ld x13,0(x21) + 8000016c: 00b68c63 beq x13,x11,80000184 + 80000170: 7d10a76f jal x14,8000b140 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 80013574 .word 0x80013574 + 80000180: 00000000 .word 0x00000000 + 80000184: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x03be52efd771972c + 80000188: 000d3303 ld x6,0(x26) + 8000018c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x27) # load rs2: x27 = 0x13ed9cff63fed982 + 80000190: 000d3d83 ld x27,0(x26) + 80000194: 008d0d13 addi x26,x26,8 + +0000000080000198 : +Zknd_aes64ds_cg_cp_rs1_b6: + aes64ds x7, x6, x27 # perform operation + 80000198: 3bb303b3 aes64ds x7,x6,x27 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zknd_aes64ds_cg_cp_rs1_b6, Zknd_aes64ds_cg_cp_rs1_b6_str) + 8000019c: 000ab683 ld x13,0(x21) + 800001a0: 00768c63 beq x13,x7,800001b8 + 800001a4: 79d0a76f jal x14,8000b140 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135a8 .word 0x800135a8 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x26, x7) # load rs1: x7 = 0x40faa74dd78a943f + 800001bc: 000d3383 ld x7,0(x26) + 800001c0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x0) # load rs2: x0 = 0x55be59e1bb46b449 + 800001c4: 000d3003 ld x0,0(x26) + 800001c8: 008d0d13 addi x26,x26,8 + +00000000800001cc : +Zknd_aes64ds_cg_cp_rs1_b7: + aes64ds x31, x7, x0 # perform operation + 800001cc: 3a038fb3 aes64ds x31,x7,x0 + # Check if x31 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x31, Zknd_aes64ds_cg_cp_rs1_b7, Zknd_aes64ds_cg_cp_rs1_b7_str) + 800001d0: 000ab683 ld x13,0(x21) + 800001d4: 01f68c63 beq x13,x31,800001ec + 800001d8: 7690a76f jal x14,8000b140 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 800135dc .word 0x800135dc + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0xffe3634a0cf227ec + 800001f0: 000d3403 ld x8,0(x26) + 800001f4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs2: x28 = 0x1f6a87e4c74311a6 + 800001f8: 000d3e03 ld x28,0(x26) + 800001fc: 008d0d13 addi x26,x26,8 + +0000000080000200 : +Zknd_aes64ds_cg_cp_rs1_b8: + aes64ds x17, x8, x28 # perform operation + 80000200: 3bc408b3 aes64ds x17,x8,x28 + # Check if x17 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x17, Zknd_aes64ds_cg_cp_rs1_b8, Zknd_aes64ds_cg_cp_rs1_b8_str) + 80000204: 000ab683 ld x13,0(x21) + 80000208: 01168c63 beq x13,x17,80000220 + 8000020c: 7350a76f jal x14,8000b140 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 80013610 .word 0x80013610 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0xdfa79896dec4bcff + 80000224: 000d3483 ld x9,0(x26) + 80000228: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xa9e9d0cee4741974 + 8000022c: 000d3a03 ld x20,0(x26) + 80000230: 008d0d13 addi x26,x26,8 + +0000000080000234 : +Zknd_aes64ds_cg_cp_rs1_b9: + aes64ds x28, x9, x20 # perform operation + 80000234: 3b448e33 aes64ds x28,x9,x20 + # Check if x28 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x28, Zknd_aes64ds_cg_cp_rs1_b9, Zknd_aes64ds_cg_cp_rs1_b9_str) + 80000238: 000ab683 ld x13,0(x21) + 8000023c: 01c68c63 beq x13,x28,80000254 + 80000240: 7010a76f jal x14,8000b140 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 80013644 .word 0x80013644 + 80000250: 00000000 .word 0x00000000 + 80000254: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0xdb0f92764402ce1e + 80000258: 000d3503 ld x10,0(x26) + 8000025c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x30) # load rs2: x30 = 0xa4b3dda707e16ec0 + 80000260: 000d3f03 ld x30,0(x26) + 80000264: 008d0d13 addi x26,x26,8 + +0000000080000268 : +Zknd_aes64ds_cg_cp_rs1_b10: + aes64ds x0, x10, x30 # perform operation + 80000268: 3be50033 aes64ds x0,x10,x30 + # Check if x0 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x0, Zknd_aes64ds_cg_cp_rs1_b10, Zknd_aes64ds_cg_cp_rs1_b10_str) + 8000026c: 000ab683 ld x13,0(x21) + 80000270: 00068c63 beq x13,x0,80000288 + 80000274: 6cd0a76f jal x14,8000b140 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 80013679 .word 0x80013679 + 80000284: 00000000 .word 0x00000000 + 80000288: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x181fae6c568877ed + 8000028c: 000d3583 ld x11,0(x26) + 80000290: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x3e89d65f9da97d4b + 80000294: 000d3c83 ld x25,0(x26) + 80000298: 008d0d13 addi x26,x26,8 + +000000008000029c : +Zknd_aes64ds_cg_cp_rs1_b11: + aes64ds x10, x11, x25 # perform operation + 8000029c: 3b958533 aes64ds x10,x11,x25 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zknd_aes64ds_cg_cp_rs1_b11, Zknd_aes64ds_cg_cp_rs1_b11_str) + 800002a0: 000ab683 ld x13,0(x21) + 800002a4: 00a68c63 beq x13,x10,800002bc + 800002a8: 6990a76f jal x14,8000b140 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 800136af .word 0x800136af + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x9bd1ac05846eeeea + 800002c0: 000d3603 ld x12,0(x26) + 800002c4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x4) # load rs2: x4 = 0x168099fee8aa7bc6 + 800002c8: 000d3203 ld x4,0(x26) + 800002cc: 008d0d13 addi x26,x26,8 + +00000000800002d0 : +Zknd_aes64ds_cg_cp_rs1_b12: + aes64ds x29, x12, x4 # perform operation + 800002d0: 3a460eb3 aes64ds x29,x12,x4 + # Check if x29 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x29, Zknd_aes64ds_cg_cp_rs1_b12, Zknd_aes64ds_cg_cp_rs1_b12_str) + 800002d4: 000ab683 ld x13,0(x21) + 800002d8: 01d68c63 beq x13,x29,800002f0 + 800002dc: 6650a76f jal x14,8000b140 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 800136e5 .word 0x800136e5 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002f4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0x792b693b5efbdfe8 + 800002fc: 000d3683 ld x13,0(x26) + 80000300: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xd6cf7d03a7f7d29d + 80000304: 000d3b83 ld x23,0(x26) + 80000308: 008d0d13 addi x26,x26,8 + +000000008000030c : +Zknd_aes64ds_cg_cp_rs1_b13: + aes64ds x19, x13, x23 # perform operation + 8000030c: 3b7689b3 aes64ds x19,x13,x23 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zknd_aes64ds_cg_cp_rs1_b13, Zknd_aes64ds_cg_cp_rs1_b13_str) + 80000310: 000ab383 ld x7,0(x21) + 80000314: 01338c63 beq x7,x19,8000032c + 80000318: 6010a46f jal x8,8000b118 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8001371b .word 0x8001371b + 80000328: 00000000 .word 0x00000000 + 8000032c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x3f4b47a0fb471045 + 80000330: 000d3703 ld x14,0(x26) + 80000334: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xeee3d18751e700f2 + 80000338: 000d3483 ld x9,0(x26) + 8000033c: 008d0d13 addi x26,x26,8 + +0000000080000340 : +Zknd_aes64ds_cg_cp_rs1_b14: + aes64ds x4, x14, x9 # perform operation + 80000340: 3a970233 aes64ds x4,x14,x9 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknd_aes64ds_cg_cp_rs1_b14, Zknd_aes64ds_cg_cp_rs1_b14_str) + 80000344: 000ab383 ld x7,0(x21) + 80000348: 00438c63 beq x7,x4,80000360 + 8000034c: 5cd0a46f jal x8,8000b118 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 80013751 .word 0x80013751 + 8000035c: 00000000 .word 0x00000000 + 80000360: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0xc9e233d7d5513330 + 80000364: 000d3783 ld x15,0(x26) + 80000368: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x35c5a7eca475a962 + 8000036c: 000d3c03 ld x24,0(x26) + 80000370: 008d0d13 addi x26,x26,8 + +0000000080000374 : +Zknd_aes64ds_cg_cp_rs1_b15: + aes64ds x10, x15, x24 # perform operation + 80000374: 3b878533 aes64ds x10,x15,x24 + # Check if x10 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x10, Zknd_aes64ds_cg_cp_rs1_b15, Zknd_aes64ds_cg_cp_rs1_b15_str) + 80000378: 000ab383 ld x7,0(x21) + 8000037c: 00a38c63 beq x7,x10,80000394 + 80000380: 5990a46f jal x8,8000b118 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 80013787 .word 0x80013787 + 80000390: 00000000 .word 0x00000000 + 80000394: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xe9668549fee12acb + 80000398: 000d3803 ld x16,0(x26) + 8000039c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x04fe2280f4458633 + 800003a0: 000d3983 ld x19,0(x26) + 800003a4: 008d0d13 addi x26,x26,8 + +00000000800003a8 : +Zknd_aes64ds_cg_cp_rs1_b16: + aes64ds x17, x16, x19 # perform operation + 800003a8: 3b3808b3 aes64ds x17,x16,x19 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zknd_aes64ds_cg_cp_rs1_b16, Zknd_aes64ds_cg_cp_rs1_b16_str) + 800003ac: 000ab383 ld x7,0(x21) + 800003b0: 01138c63 beq x7,x17,800003c8 + 800003b4: 5650a46f jal x8,8000b118 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 800137bd .word 0x800137bd + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0xd0589d52fd77148c + 800003cc: 000d3883 ld x17,0(x26) + 800003d0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xc7667e912862c3f9 + 800003d4: 000d3f83 ld x31,0(x26) + 800003d8: 008d0d13 addi x26,x26,8 + +00000000800003dc : +Zknd_aes64ds_cg_cp_rs1_b17: + aes64ds x25, x17, x31 # perform operation + 800003dc: 3bf88cb3 aes64ds x25,x17,x31 + # Check if x25 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x25, Zknd_aes64ds_cg_cp_rs1_b17, Zknd_aes64ds_cg_cp_rs1_b17_str) + 800003e0: 000ab383 ld x7,0(x21) + 800003e4: 01938c63 beq x7,x25,800003fc + 800003e8: 5310a46f jal x8,8000b118 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 800137f3 .word 0x800137f3 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xdefa303f56b74c80 + 80000400: 000d3903 ld x18,0(x26) + 80000404: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x1) # load rs2: x1 = 0xb8a548f65e4afad2 + 80000408: 000d3083 ld x1,0(x26) + 8000040c: 008d0d13 addi x26,x26,8 + +0000000080000410 : +Zknd_aes64ds_cg_cp_rs1_b18: + aes64ds x6, x18, x1 # perform operation + 80000410: 3a190333 aes64ds x6,x18,x1 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zknd_aes64ds_cg_cp_rs1_b18, Zknd_aes64ds_cg_cp_rs1_b18_str) + 80000414: 000ab383 ld x7,0(x21) + 80000418: 00638c63 beq x7,x6,80000430 + 8000041c: 4fd0a46f jal x8,8000b118 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 80013829 .word 0x80013829 + 8000042c: 00000000 .word 0x00000000 + 80000430: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x97502033fbcad049 + 80000434: 000d3983 ld x19,0(x26) + 80000438: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs2: x31 = 0xf2b4000313d93de9 + 8000043c: 000d3f83 ld x31,0(x26) + 80000440: 008d0d13 addi x26,x26,8 + +0000000080000444 : +Zknd_aes64ds_cg_cp_rs1_b19: + aes64ds x27, x19, x31 # perform operation + 80000444: 3bf98db3 aes64ds x27,x19,x31 + # Check if x27 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x27, Zknd_aes64ds_cg_cp_rs1_b19, Zknd_aes64ds_cg_cp_rs1_b19_str) + 80000448: 000ab383 ld x7,0(x21) + 8000044c: 01b38c63 beq x7,x27,80000464 + 80000450: 4c90a46f jal x8,8000b118 + 80000454: 80000444 .word 0x80000444 + 80000458: 00000000 .word 0x00000000 + 8000045c: 8001385f .word 0x8001385f + 80000460: 00000000 .word 0x00000000 + 80000464: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x6839d203c259fe95 + 80000468: 000d3a03 ld x20,0(x26) + 8000046c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x3f938b5cc4a57dc5 + 80000470: 000d3983 ld x19,0(x26) + 80000474: 008d0d13 addi x26,x26,8 + +0000000080000478 : +Zknd_aes64ds_cg_cp_rs1_b20: + aes64ds x0, x20, x19 # perform operation + 80000478: 3b3a0033 aes64ds x0,x20,x19 + # Check if x0 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x0, Zknd_aes64ds_cg_cp_rs1_b20, Zknd_aes64ds_cg_cp_rs1_b20_str) + 8000047c: 000ab383 ld x7,0(x21) + 80000480: 00038c63 beq x7,x0,80000498 + 80000484: 4950a46f jal x8,8000b118 + 80000488: 80000478 .word 0x80000478 + 8000048c: 00000000 .word 0x00000000 + 80000490: 80013895 .word 0x80013895 + 80000494: 00000000 .word 0x00000000 + 80000498: 008a8a93 addi x21,x21,8 + + mv x31, x21 # switch signature pointer register to avoid conflict with test + 8000049c: 000a8f93 addi x31,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x7267fae8d944e58d + 800004a0: 000d3a83 ld x21,0(x26) + 800004a4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x61aaa0301bf61d1a + 800004a8: 000d3c83 ld x25,0(x26) + 800004ac: 008d0d13 addi x26,x26,8 + +00000000800004b0 : +Zknd_aes64ds_cg_cp_rs1_b21: + aes64ds x12, x21, x25 # perform operation + 800004b0: 3b9a8633 aes64ds x12,x21,x25 + # Check if x12 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x12, Zknd_aes64ds_cg_cp_rs1_b21, Zknd_aes64ds_cg_cp_rs1_b21_str) + 800004b4: 000fb383 ld x7,0(x31) + 800004b8: 00c38c63 beq x7,x12,800004d0 + 800004bc: 45d0a46f jal x8,8000b118 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 800138cb .word 0x800138cb + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xf2c5a7794efec71c + 800004d4: 000d3b03 ld x22,0(x26) + 800004d8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0x296495c519f99c41 + 800004dc: 000d3a03 ld x20,0(x26) + 800004e0: 008d0d13 addi x26,x26,8 + +00000000800004e4 : +Zknd_aes64ds_cg_cp_rs1_b22: + aes64ds x11, x22, x20 # perform operation + 800004e4: 3b4b05b3 aes64ds x11,x22,x20 + # Check if x11 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x11, Zknd_aes64ds_cg_cp_rs1_b22, Zknd_aes64ds_cg_cp_rs1_b22_str) + 800004e8: 000fb383 ld x7,0(x31) + 800004ec: 00b38c63 beq x7,x11,80000504 + 800004f0: 4290a46f jal x8,8000b118 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 80013901 .word 0x80013901 + 80000500: 00000000 .word 0x00000000 + 80000504: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x5d4744bd47f747cd + 80000508: 000d3b83 ld x23,0(x26) + 8000050c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xb5bbd9d29c064369 + 80000510: 000d3a03 ld x20,0(x26) + 80000514: 008d0d13 addi x26,x26,8 + +0000000080000518 : +Zknd_aes64ds_cg_cp_rs1_b23: + aes64ds x4, x23, x20 # perform operation + 80000518: 3b4b8233 aes64ds x4,x23,x20 + # Check if x4 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x4, Zknd_aes64ds_cg_cp_rs1_b23, Zknd_aes64ds_cg_cp_rs1_b23_str) + 8000051c: 000fb383 ld x7,0(x31) + 80000520: 00438c63 beq x7,x4,80000538 + 80000524: 3f50a46f jal x8,8000b118 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 80013937 .word 0x80013937 + 80000534: 00000000 .word 0x00000000 + 80000538: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0xc2bf9154e86782e6 + 8000053c: 000d3c03 ld x24,0(x26) + 80000540: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs2: x29 = 0x7857ea7673d7cd53 + 80000544: 000d3e83 ld x29,0(x26) + 80000548: 008d0d13 addi x26,x26,8 + +000000008000054c : +Zknd_aes64ds_cg_cp_rs1_b24: + aes64ds x28, x24, x29 # perform operation + 8000054c: 3bdc0e33 aes64ds x28,x24,x29 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zknd_aes64ds_cg_cp_rs1_b24, Zknd_aes64ds_cg_cp_rs1_b24_str) + 80000550: 000fb383 ld x7,0(x31) + 80000554: 01c38c63 beq x7,x28,8000056c + 80000558: 3c10a46f jal x8,8000b118 + 8000055c: 8000054c .word 0x8000054c + 80000560: 00000000 .word 0x00000000 + 80000564: 8001396d .word 0x8001396d + 80000568: 00000000 .word 0x00000000 + 8000056c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0x30d1c4de5a2aa5c3 + 80000570: 000d3c83 ld x25,0(x26) + 80000574: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0x2732907986732c0c + 80000578: 000d3483 ld x9,0(x26) + 8000057c: 008d0d13 addi x26,x26,8 + +0000000080000580 : +Zknd_aes64ds_cg_cp_rs1_b25: + aes64ds x6, x25, x9 # perform operation + 80000580: 3a9c8333 aes64ds x6,x25,x9 + # Check if x6 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x6, Zknd_aes64ds_cg_cp_rs1_b25, Zknd_aes64ds_cg_cp_rs1_b25_str) + 80000584: 000fb383 ld x7,0(x31) + 80000588: 00638c63 beq x7,x6,800005a0 + 8000058c: 38d0a46f jal x8,8000b118 + 80000590: 80000580 .word 0x80000580 + 80000594: 00000000 .word 0x00000000 + 80000598: 800139a3 .word 0x800139a3 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 008f8f93 addi x31,x31,8 + + mv x22, x26 # switch data pointer register to avoid conflict with test + 800005a4: 000d0b13 addi x22,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0xa517ea1a3355ff7a + 800005a8: 000b3d03 ld x26,0(x22) + 800005ac: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0x5ea0c934673950bb + 800005b0: 000b3783 ld x15,0(x22) + 800005b4: 008b0b13 addi x22,x22,8 + +00000000800005b8 : +Zknd_aes64ds_cg_cp_rs1_b26: + aes64ds x10, x26, x15 # perform operation + 800005b8: 3afd0533 aes64ds x10,x26,x15 + # Check if x10 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x10, Zknd_aes64ds_cg_cp_rs1_b26, Zknd_aes64ds_cg_cp_rs1_b26_str) + 800005bc: 000fb383 ld x7,0(x31) + 800005c0: 00a38c63 beq x7,x10,800005d8 + 800005c4: 3550a46f jal x8,8000b118 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 800139d9 .word 0x800139d9 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x832aa18237e8169d + 800005dc: 000b3d83 ld x27,0(x22) + 800005e0: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs2: x29 = 0x14b04ecd65b6ffa4 + 800005e4: 000b3e83 ld x29,0(x22) + 800005e8: 008b0b13 addi x22,x22,8 + +00000000800005ec : +Zknd_aes64ds_cg_cp_rs1_b27: + aes64ds x14, x27, x29 # perform operation + 800005ec: 3bdd8733 aes64ds x14,x27,x29 + # Check if x14 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x14, Zknd_aes64ds_cg_cp_rs1_b27, Zknd_aes64ds_cg_cp_rs1_b27_str) + 800005f0: 000fb383 ld x7,0(x31) + 800005f4: 00e38c63 beq x7,x14,8000060c + 800005f8: 3210a46f jal x8,8000b118 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80013a0f .word 0x80013a0f + 80000608: 00000000 .word 0x00000000 + 8000060c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x068561f970d0b361 + 80000610: 000b3e03 ld x28,0(x22) + 80000614: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs2: x30 = 0x53143d052ba922c7 + 80000618: 000b3f03 ld x30,0(x22) + 8000061c: 008b0b13 addi x22,x22,8 + +0000000080000620 : +Zknd_aes64ds_cg_cp_rs1_b28: + aes64ds x3, x28, x30 # perform operation + 80000620: 3bee01b3 aes64ds x3,x28,x30 + # Check if x3 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x3, Zknd_aes64ds_cg_cp_rs1_b28, Zknd_aes64ds_cg_cp_rs1_b28_str) + 80000624: 000fb383 ld x7,0(x31) + 80000628: 00338c63 beq x7,x3,80000640 + 8000062c: 2ed0a46f jal x8,8000b118 + 80000630: 80000620 .word 0x80000620 + 80000634: 00000000 .word 0x00000000 + 80000638: 80013a45 .word 0x80013a45 + 8000063c: 00000000 .word 0x00000000 + 80000640: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x6c2b41fdace1d9fb + 80000644: 000b3e83 ld x29,0(x22) + 80000648: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0xff243d9ff41c71a8 + 8000064c: 000b3983 ld x19,0(x22) + 80000650: 008b0b13 addi x22,x22,8 + +0000000080000654 : +Zknd_aes64ds_cg_cp_rs1_b29: + aes64ds x15, x29, x19 # perform operation + 80000654: 3b3e87b3 aes64ds x15,x29,x19 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zknd_aes64ds_cg_cp_rs1_b29, Zknd_aes64ds_cg_cp_rs1_b29_str) + 80000658: 000fb383 ld x7,0(x31) + 8000065c: 00f38c63 beq x7,x15,80000674 + 80000660: 2b90a46f jal x8,8000b118 + 80000664: 80000654 .word 0x80000654 + 80000668: 00000000 .word 0x00000000 + 8000066c: 80013a7b .word 0x80013a7b + 80000670: 00000000 .word 0x00000000 + 80000674: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0xdcaf3144e5cfa88b + 80000678: 000b3f03 ld x30,0(x22) + 8000067c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0x58b4d275859e3878 + 80000680: 000b3203 ld x4,0(x22) + 80000684: 008b0b13 addi x22,x22,8 + +0000000080000688 : +Zknd_aes64ds_cg_cp_rs1_b30: + aes64ds x27, x30, x4 # perform operation + 80000688: 3a4f0db3 aes64ds x27,x30,x4 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zknd_aes64ds_cg_cp_rs1_b30, Zknd_aes64ds_cg_cp_rs1_b30_str) + 8000068c: 000fb383 ld x7,0(x31) + 80000690: 01b38c63 beq x7,x27,800006a8 + 80000694: 2850a46f jal x8,8000b118 + 80000698: 80000688 .word 0x80000688 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 80013ab1 .word 0x80013ab1 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 008f8f93 addi x31,x31,8 + + mv x21, x31 # switch signature pointer register to avoid conflict with test + 800006ac: 000f8a93 addi x21,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0x402cbe37e94a79c2 + 800006b0: 000b3f83 ld x31,0(x22) + 800006b4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x3224c9f0aaf93bbc + 800006b8: 000b3483 ld x9,0(x22) + 800006bc: 008b0b13 addi x22,x22,8 + +00000000800006c0 : +Zknd_aes64ds_cg_cp_rs1_b31: + aes64ds x26, x31, x9 # perform operation + 800006c0: 3a9f8d33 aes64ds x26,x31,x9 + # Check if x26 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x26, Zknd_aes64ds_cg_cp_rs1_b31, Zknd_aes64ds_cg_cp_rs1_b31_str) + 800006c4: 000ab383 ld x7,0(x21) + 800006c8: 01a38c63 beq x7,x26,800006e0 + 800006cc: 24d0a46f jal x8,8000b118 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 80013ae7 .word 0x80013ae7 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x735ed129b77735a2 + 800006e4: 000b3e03 ld x28,0(x22) + 800006e8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs2: x0 = 0x8029c01e3773aae6 + 800006ec: 000b3003 ld x0,0(x22) + 800006f0: 008b0b13 addi x22,x22,8 + +00000000800006f4 : +Zknd_aes64ds_cg_cp_rs2_b0: + aes64ds x24, x28, x0 # perform operation + 800006f4: 3a0e0c33 aes64ds x24,x28,x0 + # Check if x24 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x24, Zknd_aes64ds_cg_cp_rs2_b0, Zknd_aes64ds_cg_cp_rs2_b0_str) + 800006f8: 000ab383 ld x7,0(x21) + 800006fc: 01838c63 beq x7,x24,80000714 + 80000700: 2190a46f jal x8,8000b118 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80013b1d .word 0x80013b1d + 80000710: 00000000 .word 0x00000000 + 80000714: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x823df4883b0f946a + 80000718: 000b3683 ld x13,0(x22) + 8000071c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs2: x1 = 0xcff882235e910021 + 80000720: 000b3083 ld x1,0(x22) + 80000724: 008b0b13 addi x22,x22,8 + +0000000080000728 : +Zknd_aes64ds_cg_cp_rs2_b1: + aes64ds x15, x13, x1 # perform operation + 80000728: 3a1687b3 aes64ds x15,x13,x1 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zknd_aes64ds_cg_cp_rs2_b1, Zknd_aes64ds_cg_cp_rs2_b1_str) + 8000072c: 000ab383 ld x7,0(x21) + 80000730: 00f38c63 beq x7,x15,80000748 + 80000734: 1e50a46f jal x8,8000b118 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80013b52 .word 0x80013b52 + 80000744: 00000000 .word 0x00000000 + 80000748: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x5f876ad7537a0fa1 + 8000074c: 000b3903 ld x18,0(x22) + 80000750: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs2: x2 = 0x889ec09d61f9238a + 80000754: 000b3103 ld x2,0(x22) + 80000758: 008b0b13 addi x22,x22,8 + +000000008000075c : +Zknd_aes64ds_cg_cp_rs2_b2: + aes64ds x14, x18, x2 # perform operation + 8000075c: 3a290733 aes64ds x14,x18,x2 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zknd_aes64ds_cg_cp_rs2_b2, Zknd_aes64ds_cg_cp_rs2_b2_str) + 80000760: 000ab383 ld x7,0(x21) + 80000764: 00e38c63 beq x7,x14,8000077c + 80000768: 1b10a46f jal x8,8000b118 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 80013b87 .word 0x80013b87 + 80000778: 00000000 .word 0x00000000 + 8000077c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x9172ff2fc15b145f + 80000780: 000b3903 ld x18,0(x22) + 80000784: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs2: x3 = 0x35bd168ea46b34ba + 80000788: 000b3183 ld x3,0(x22) + 8000078c: 008b0b13 addi x22,x22,8 + +0000000080000790 : +Zknd_aes64ds_cg_cp_rs2_b3: + aes64ds x0, x18, x3 # perform operation + 80000790: 3a390033 aes64ds x0,x18,x3 + # Check if x0 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x0, Zknd_aes64ds_cg_cp_rs2_b3, Zknd_aes64ds_cg_cp_rs2_b3_str) + 80000794: 000ab383 ld x7,0(x21) + 80000798: 00038c63 beq x7,x0,800007b0 + 8000079c: 17d0a46f jal x8,8000b118 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 80013bbc .word 0x80013bbc + 800007ac: 00000000 .word 0x00000000 + 800007b0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0xd2ae0bf893e2554b + 800007b4: 000b3983 ld x19,0(x22) + 800007b8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs2: x4 = 0xb1e15c025b2513a2 + 800007bc: 000b3203 ld x4,0(x22) + 800007c0: 008b0b13 addi x22,x22,8 + +00000000800007c4 : +Zknd_aes64ds_cg_cp_rs2_b4: + aes64ds x13, x19, x4 # perform operation + 800007c4: 3a4986b3 aes64ds x13,x19,x4 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknd_aes64ds_cg_cp_rs2_b4, Zknd_aes64ds_cg_cp_rs2_b4_str) + 800007c8: 000ab383 ld x7,0(x21) + 800007cc: 00d38c63 beq x7,x13,800007e4 + 800007d0: 1490a46f jal x8,8000b118 + 800007d4: 800007c4 .word 0x800007c4 + 800007d8: 00000000 .word 0x00000000 + 800007dc: 80013bf1 .word 0x80013bf1 + 800007e0: 00000000 .word 0x00000000 + 800007e4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x985ae9905c62d620 + 800007e8: 000b3a03 ld x20,0(x22) + 800007ec: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs2: x5 = 0x82ac05b2382c49de + 800007f0: 000b3283 ld x5,0(x22) + 800007f4: 008b0b13 addi x22,x22,8 + +00000000800007f8 : +Zknd_aes64ds_cg_cp_rs2_b5: + aes64ds x27, x20, x5 # perform operation + 800007f8: 3a5a0db3 aes64ds x27,x20,x5 + # Check if x27 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x27, Zknd_aes64ds_cg_cp_rs2_b5, Zknd_aes64ds_cg_cp_rs2_b5_str) + 800007fc: 000ab383 ld x7,0(x21) + 80000800: 01b38c63 beq x7,x27,80000818 + 80000804: 1150a46f jal x8,8000b118 + 80000808: 800007f8 .word 0x800007f8 + 8000080c: 00000000 .word 0x00000000 + 80000810: 80013c26 .word 0x80013c26 + 80000814: 00000000 .word 0x00000000 + 80000818: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x8db46b9ab85fa184 + 8000081c: 000b3f03 ld x30,0(x22) + 80000820: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs2: x6 = 0x661668a90952d9d3 + 80000824: 000b3303 ld x6,0(x22) + 80000828: 008b0b13 addi x22,x22,8 + +000000008000082c : +Zknd_aes64ds_cg_cp_rs2_b6: + aes64ds x23, x30, x6 # perform operation + 8000082c: 3a6f0bb3 aes64ds x23,x30,x6 + # Check if x23 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x23, Zknd_aes64ds_cg_cp_rs2_b6, Zknd_aes64ds_cg_cp_rs2_b6_str) + 80000830: 000ab383 ld x7,0(x21) + 80000834: 01738c63 beq x7,x23,8000084c + 80000838: 0e10a46f jal x8,8000b118 + 8000083c: 8000082c .word 0x8000082c + 80000840: 00000000 .word 0x00000000 + 80000844: 80013c5b .word 0x80013c5b + 80000848: 00000000 .word 0x00000000 + 8000084c: 008a8a93 addi x21,x21,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000850: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000854: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x0795b32985620a2c + 80000858: 000b3e03 ld x28,0(x22) + 8000085c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs2: x7 = 0x7cb667a5662fc670 + 80000860: 000b3383 ld x7,0(x22) + 80000864: 008b0b13 addi x22,x22,8 + +0000000080000868 : +Zknd_aes64ds_cg_cp_rs2_b7: + aes64ds x20, x28, x7 # perform operation + 80000868: 3a7e0a33 aes64ds x20,x28,x7 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknd_aes64ds_cg_cp_rs2_b7, Zknd_aes64ds_cg_cp_rs2_b7_str) + 8000086c: 000ab203 ld x4,0(x21) + 80000870: 01420c63 beq x4,x20,80000888 + 80000874: 08d0a2ef jal x5,8000b100 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 80013c90 .word 0x80013c90 + 80000884: 00000000 .word 0x00000000 + 80000888: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0xb6ecb4ba1c2dc46b + 8000088c: 000b3883 ld x17,0(x22) + 80000890: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs2: x8 = 0x523d53b0d9763c8d + 80000894: 000b3403 ld x8,0(x22) + 80000898: 008b0b13 addi x22,x22,8 + +000000008000089c : +Zknd_aes64ds_cg_cp_rs2_b8: + aes64ds x7, x17, x8 # perform operation + 8000089c: 3a8883b3 aes64ds x7,x17,x8 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zknd_aes64ds_cg_cp_rs2_b8, Zknd_aes64ds_cg_cp_rs2_b8_str) + 800008a0: 000ab203 ld x4,0(x21) + 800008a4: 00720c63 beq x4,x7,800008bc + 800008a8: 0590a2ef jal x5,8000b100 + 800008ac: 8000089c .word 0x8000089c + 800008b0: 00000000 .word 0x00000000 + 800008b4: 80013cc5 .word 0x80013cc5 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0xfbf208859be5572a + 800008c0: 000b3683 ld x13,0(x22) + 800008c4: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs2: x9 = 0x3e5146ec650117f0 + 800008c8: 000b3483 ld x9,0(x22) + 800008cc: 008b0b13 addi x22,x22,8 + +00000000800008d0 : +Zknd_aes64ds_cg_cp_rs2_b9: + aes64ds x20, x13, x9 # perform operation + 800008d0: 3a968a33 aes64ds x20,x13,x9 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknd_aes64ds_cg_cp_rs2_b9, Zknd_aes64ds_cg_cp_rs2_b9_str) + 800008d4: 000ab203 ld x4,0(x21) + 800008d8: 01420c63 beq x4,x20,800008f0 + 800008dc: 0250a2ef jal x5,8000b100 + 800008e0: 800008d0 .word 0x800008d0 + 800008e4: 00000000 .word 0x00000000 + 800008e8: 80013cfa .word 0x80013cfa + 800008ec: 00000000 .word 0x00000000 + 800008f0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xc79a73d11529f4a7 + 800008f4: 000b3603 ld x12,0(x22) + 800008f8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs2: x10 = 0xc9940fe1477d9408 + 800008fc: 000b3503 ld x10,0(x22) + 80000900: 008b0b13 addi x22,x22,8 + +0000000080000904 : +Zknd_aes64ds_cg_cp_rs2_b10: + aes64ds x2, x12, x10 # perform operation + 80000904: 3aa60133 aes64ds x2,x12,x10 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zknd_aes64ds_cg_cp_rs2_b10, Zknd_aes64ds_cg_cp_rs2_b10_str) + 80000908: 000ab203 ld x4,0(x21) + 8000090c: 00220c63 beq x4,x2,80000924 + 80000910: 7f00a2ef jal x5,8000b100 + 80000914: 80000904 .word 0x80000904 + 80000918: 00000000 .word 0x00000000 + 8000091c: 80013d2f .word 0x80013d2f + 80000920: 00000000 .word 0x00000000 + 80000924: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x838ffc52909a755d + 80000928: 000b3783 ld x15,0(x22) + 8000092c: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs2: x11 = 0xb3bf52f5c0f1e57c + 80000930: 000b3583 ld x11,0(x22) + 80000934: 008b0b13 addi x22,x22,8 + +0000000080000938 : +Zknd_aes64ds_cg_cp_rs2_b11: + aes64ds x16, x15, x11 # perform operation + 80000938: 3ab78833 aes64ds x16,x15,x11 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknd_aes64ds_cg_cp_rs2_b11, Zknd_aes64ds_cg_cp_rs2_b11_str) + 8000093c: 000ab203 ld x4,0(x21) + 80000940: 01020c63 beq x4,x16,80000958 + 80000944: 7bc0a2ef jal x5,8000b100 + 80000948: 80000938 .word 0x80000938 + 8000094c: 00000000 .word 0x00000000 + 80000950: 80013d65 .word 0x80013d65 + 80000954: 00000000 .word 0x00000000 + 80000958: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x6c1bb449bf58ed8d + 8000095c: 000b3183 ld x3,0(x22) + 80000960: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs2: x12 = 0x567b727ac5526b79 + 80000964: 000b3603 ld x12,0(x22) + 80000968: 008b0b13 addi x22,x22,8 + +000000008000096c : +Zknd_aes64ds_cg_cp_rs2_b12: + aes64ds x0, x3, x12 # perform operation + 8000096c: 3ac18033 aes64ds x0,x3,x12 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zknd_aes64ds_cg_cp_rs2_b12, Zknd_aes64ds_cg_cp_rs2_b12_str) + 80000970: 000ab203 ld x4,0(x21) + 80000974: 00020c63 beq x4,x0,8000098c + 80000978: 7880a2ef jal x5,8000b100 + 8000097c: 8000096c .word 0x8000096c + 80000980: 00000000 .word 0x00000000 + 80000984: 80013d9b .word 0x80013d9b + 80000988: 00000000 .word 0x00000000 + 8000098c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0xca5dcc6c10b44192 + 80000990: 000b3303 ld x6,0(x22) + 80000994: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs2: x13 = 0x054df9ab6a85f401 + 80000998: 000b3683 ld x13,0(x22) + 8000099c: 008b0b13 addi x22,x22,8 + +00000000800009a0 : +Zknd_aes64ds_cg_cp_rs2_b13: + aes64ds x2, x6, x13 # perform operation + 800009a0: 3ad30133 aes64ds x2,x6,x13 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zknd_aes64ds_cg_cp_rs2_b13, Zknd_aes64ds_cg_cp_rs2_b13_str) + 800009a4: 000ab203 ld x4,0(x21) + 800009a8: 00220c63 beq x4,x2,800009c0 + 800009ac: 7540a2ef jal x5,8000b100 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 80013dd1 .word 0x80013dd1 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x1c041becad891e82 + 800009c4: 000b3803 ld x16,0(x22) + 800009c8: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs2: x14 = 0x2251736016857778 + 800009cc: 000b3703 ld x14,0(x22) + 800009d0: 008b0b13 addi x22,x22,8 + +00000000800009d4 : +Zknd_aes64ds_cg_cp_rs2_b14: + aes64ds x18, x16, x14 # perform operation + 800009d4: 3ae80933 aes64ds x18,x16,x14 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknd_aes64ds_cg_cp_rs2_b14, Zknd_aes64ds_cg_cp_rs2_b14_str) + 800009d8: 000ab203 ld x4,0(x21) + 800009dc: 01220c63 beq x4,x18,800009f4 + 800009e0: 7200a2ef jal x5,8000b100 + 800009e4: 800009d4 .word 0x800009d4 + 800009e8: 00000000 .word 0x00000000 + 800009ec: 80013e07 .word 0x80013e07 + 800009f0: 00000000 .word 0x00000000 + 800009f4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x168296dbaaa0a564 + 800009f8: 000b3c03 ld x24,0(x22) + 800009fc: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs2: x15 = 0xe8ad7c94631c2455 + 80000a00: 000b3783 ld x15,0(x22) + 80000a04: 008b0b13 addi x22,x22,8 + +0000000080000a08 : +Zknd_aes64ds_cg_cp_rs2_b15: + aes64ds x18, x24, x15 # perform operation + 80000a08: 3afc0933 aes64ds x18,x24,x15 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknd_aes64ds_cg_cp_rs2_b15, Zknd_aes64ds_cg_cp_rs2_b15_str) + 80000a0c: 000ab203 ld x4,0(x21) + 80000a10: 01220c63 beq x4,x18,80000a28 + 80000a14: 6ec0a2ef jal x5,8000b100 + 80000a18: 80000a08 .word 0x80000a08 + 80000a1c: 00000000 .word 0x00000000 + 80000a20: 80013e3d .word 0x80013e3d + 80000a24: 00000000 .word 0x00000000 + 80000a28: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x156f854c39352464 + 80000a2c: 000b3a03 ld x20,0(x22) + 80000a30: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs2: x16 = 0x22725884ea3d4f88 + 80000a34: 000b3803 ld x16,0(x22) + 80000a38: 008b0b13 addi x22,x22,8 + +0000000080000a3c : +Zknd_aes64ds_cg_cp_rs2_b16: + aes64ds x31, x20, x16 # perform operation + 80000a3c: 3b0a0fb3 aes64ds x31,x20,x16 + # Check if x31 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x31, Zknd_aes64ds_cg_cp_rs2_b16, Zknd_aes64ds_cg_cp_rs2_b16_str) + 80000a40: 000ab203 ld x4,0(x21) + 80000a44: 01f20c63 beq x4,x31,80000a5c + 80000a48: 6b80a2ef jal x5,8000b100 + 80000a4c: 80000a3c .word 0x80000a3c + 80000a50: 00000000 .word 0x00000000 + 80000a54: 80013e73 .word 0x80013e73 + 80000a58: 00000000 .word 0x00000000 + 80000a5c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xaf7ff27ee339cefd + 80000a60: 000b3503 ld x10,0(x22) + 80000a64: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs2: x17 = 0x8675dbb86c5efcb5 + 80000a68: 000b3883 ld x17,0(x22) + 80000a6c: 008b0b13 addi x22,x22,8 + +0000000080000a70 : +Zknd_aes64ds_cg_cp_rs2_b17: + aes64ds x18, x10, x17 # perform operation + 80000a70: 3b150933 aes64ds x18,x10,x17 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknd_aes64ds_cg_cp_rs2_b17, Zknd_aes64ds_cg_cp_rs2_b17_str) + 80000a74: 000ab203 ld x4,0(x21) + 80000a78: 01220c63 beq x4,x18,80000a90 + 80000a7c: 6840a2ef jal x5,8000b100 + 80000a80: 80000a70 .word 0x80000a70 + 80000a84: 00000000 .word 0x00000000 + 80000a88: 80013ea9 .word 0x80013ea9 + 80000a8c: 00000000 .word 0x00000000 + 80000a90: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0x270829813cd7b352 + 80000a94: 000b3383 ld x7,0(x22) + 80000a98: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs2: x18 = 0xc704da98f59226b3 + 80000a9c: 000b3903 ld x18,0(x22) + 80000aa0: 008b0b13 addi x22,x22,8 + +0000000080000aa4 : +Zknd_aes64ds_cg_cp_rs2_b18: + aes64ds x12, x7, x18 # perform operation + 80000aa4: 3b238633 aes64ds x12,x7,x18 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknd_aes64ds_cg_cp_rs2_b18, Zknd_aes64ds_cg_cp_rs2_b18_str) + 80000aa8: 000ab203 ld x4,0(x21) + 80000aac: 00c20c63 beq x4,x12,80000ac4 + 80000ab0: 6500a2ef jal x5,8000b100 + 80000ab4: 80000aa4 .word 0x80000aa4 + 80000ab8: 00000000 .word 0x00000000 + 80000abc: 80013edf .word 0x80013edf + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0xf7f4f24d5edb0c7e + 80000ac8: 000b3003 ld x0,0(x22) + 80000acc: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs2: x19 = 0x75b57be35ffb7517 + 80000ad0: 000b3983 ld x19,0(x22) + 80000ad4: 008b0b13 addi x22,x22,8 + +0000000080000ad8 : +Zknd_aes64ds_cg_cp_rs2_b19: + aes64ds x8, x0, x19 # perform operation + 80000ad8: 3b300433 aes64ds x8,x0,x19 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknd_aes64ds_cg_cp_rs2_b19, Zknd_aes64ds_cg_cp_rs2_b19_str) + 80000adc: 000ab203 ld x4,0(x21) + 80000ae0: 00820c63 beq x4,x8,80000af8 + 80000ae4: 61c0a2ef jal x5,8000b100 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 80013f15 .word 0x80013f15 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0xe1bef2bc8c3050d3 + 80000afc: 000b3c03 ld x24,0(x22) + 80000b00: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs2: x20 = 0xf709a7b8537033a6 + 80000b04: 000b3a03 ld x20,0(x22) + 80000b08: 008b0b13 addi x22,x22,8 + +0000000080000b0c : +Zknd_aes64ds_cg_cp_rs2_b20: + aes64ds x16, x24, x20 # perform operation + 80000b0c: 3b4c0833 aes64ds x16,x24,x20 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknd_aes64ds_cg_cp_rs2_b20, Zknd_aes64ds_cg_cp_rs2_b20_str) + 80000b10: 000ab203 ld x4,0(x21) + 80000b14: 01020c63 beq x4,x16,80000b2c + 80000b18: 5e80a2ef jal x5,8000b100 + 80000b1c: 80000b0c .word 0x80000b0c + 80000b20: 00000000 .word 0x00000000 + 80000b24: 80013f4b .word 0x80013f4b + 80000b28: 00000000 .word 0x00000000 + 80000b2c: 008a8a93 addi x21,x21,8 + + mv x10, x21 # switch signature pointer register to avoid conflict with test + 80000b30: 000a8513 addi x10,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0xf7da1c09b612e535 + 80000b34: 000b3e03 ld x28,0(x22) + 80000b38: 008b0b13 addi x22,x22,8 + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs2: x21 = 0x500126847843eb03 + 80000b3c: 000b3a83 ld x21,0(x22) + 80000b40: 008b0b13 addi x22,x22,8 + +0000000080000b44 : +Zknd_aes64ds_cg_cp_rs2_b21: + aes64ds x14, x28, x21 # perform operation + 80000b44: 3b5e0733 aes64ds x14,x28,x21 + # Check if x14 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x14, Zknd_aes64ds_cg_cp_rs2_b21, Zknd_aes64ds_cg_cp_rs2_b21_str) + 80000b48: 00053203 ld x4,0(x10) + 80000b4c: 00e20c63 beq x4,x14,80000b64 + 80000b50: 5b00a2ef jal x5,8000b100 + 80000b54: 80000b44 .word 0x80000b44 + 80000b58: 00000000 .word 0x00000000 + 80000b5c: 80013f81 .word 0x80013f81 + 80000b60: 00000000 .word 0x00000000 + 80000b64: 00850513 addi x10,x10,8 + + mv x16, x22 # switch data pointer register to avoid conflict with test + 80000b68: 000b0813 addi x16,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xaf1a60cc65f9feec + 80000b6c: 00083e83 ld x29,0(x16) + 80000b70: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x8853924f50648d00 + 80000b74: 00083b03 ld x22,0(x16) + 80000b78: 00880813 addi x16,x16,8 + +0000000080000b7c : +Zknd_aes64ds_cg_cp_rs2_b22: + aes64ds x24, x29, x22 # perform operation + 80000b7c: 3b6e8c33 aes64ds x24,x29,x22 + # Check if x24 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x24, Zknd_aes64ds_cg_cp_rs2_b22, Zknd_aes64ds_cg_cp_rs2_b22_str) + 80000b80: 00053203 ld x4,0(x10) + 80000b84: 01820c63 beq x4,x24,80000b9c + 80000b88: 5780a2ef jal x5,8000b100 + 80000b8c: 80000b7c .word 0x80000b7c + 80000b90: 00000000 .word 0x00000000 + 80000b94: 80013fb7 .word 0x80013fb7 + 80000b98: 00000000 .word 0x00000000 + 80000b9c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x881f1015f0525289 + 80000ba0: 00083183 ld x3,0(x16) + 80000ba4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0x9d36a37da35ad3b9 + 80000ba8: 00083b83 ld x23,0(x16) + 80000bac: 00880813 addi x16,x16,8 + +0000000080000bb0 : +Zknd_aes64ds_cg_cp_rs2_b23: + aes64ds x20, x3, x23 # perform operation + 80000bb0: 3b718a33 aes64ds x20,x3,x23 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknd_aes64ds_cg_cp_rs2_b23, Zknd_aes64ds_cg_cp_rs2_b23_str) + 80000bb4: 00053203 ld x4,0(x10) + 80000bb8: 01420c63 beq x4,x20,80000bd0 + 80000bbc: 5440a2ef jal x5,8000b100 + 80000bc0: 80000bb0 .word 0x80000bb0 + 80000bc4: 00000000 .word 0x00000000 + 80000bc8: 80013fed .word 0x80013fed + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x937f8cc4b2517b55 + 80000bd4: 00083483 ld x9,0(x16) + 80000bd8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x170eefab5f7e9fa2 + 80000bdc: 00083c03 ld x24,0(x16) + 80000be0: 00880813 addi x16,x16,8 + +0000000080000be4 : +Zknd_aes64ds_cg_cp_rs2_b24: + aes64ds x8, x9, x24 # perform operation + 80000be4: 3b848433 aes64ds x8,x9,x24 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknd_aes64ds_cg_cp_rs2_b24, Zknd_aes64ds_cg_cp_rs2_b24_str) + 80000be8: 00053203 ld x4,0(x10) + 80000bec: 00820c63 beq x4,x8,80000c04 + 80000bf0: 5100a2ef jal x5,8000b100 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80014023 .word 0x80014023 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x98223cec714b29ec + 80000c08: 00083983 ld x19,0(x16) + 80000c0c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x0b970f78dff9d874 + 80000c10: 00083c83 ld x25,0(x16) + 80000c14: 00880813 addi x16,x16,8 + +0000000080000c18 : +Zknd_aes64ds_cg_cp_rs2_b25: + aes64ds x29, x19, x25 # perform operation + 80000c18: 3b998eb3 aes64ds x29,x19,x25 + # Check if x29 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x29, Zknd_aes64ds_cg_cp_rs2_b25, Zknd_aes64ds_cg_cp_rs2_b25_str) + 80000c1c: 00053203 ld x4,0(x10) + 80000c20: 01d20c63 beq x4,x29,80000c38 + 80000c24: 4dc0a2ef jal x5,8000b100 + 80000c28: 80000c18 .word 0x80000c18 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 80014059 .word 0x80014059 + 80000c34: 00000000 .word 0x00000000 + 80000c38: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xb3940a0dd897fd61 + 80000c3c: 00083e03 ld x28,0(x16) + 80000c40: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs2: x26 = 0xa0b246fcb54384ff + 80000c44: 00083d03 ld x26,0(x16) + 80000c48: 00880813 addi x16,x16,8 + +0000000080000c4c : +Zknd_aes64ds_cg_cp_rs2_b26: + aes64ds x6, x28, x26 # perform operation + 80000c4c: 3bae0333 aes64ds x6,x28,x26 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknd_aes64ds_cg_cp_rs2_b26, Zknd_aes64ds_cg_cp_rs2_b26_str) + 80000c50: 00053203 ld x4,0(x10) + 80000c54: 00620c63 beq x4,x6,80000c6c + 80000c58: 4a80a2ef jal x5,8000b100 + 80000c5c: 80000c4c .word 0x80000c4c + 80000c60: 00000000 .word 0x00000000 + 80000c64: 8001408f .word 0x8001408f + 80000c68: 00000000 .word 0x00000000 + 80000c6c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x80d7c20ac93355c3 + 80000c70: 00083d03 ld x26,0(x16) + 80000c74: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x79032f692e875a67 + 80000c78: 00083d83 ld x27,0(x16) + 80000c7c: 00880813 addi x16,x16,8 + +0000000080000c80 : +Zknd_aes64ds_cg_cp_rs2_b27: + aes64ds x7, x26, x27 # perform operation + 80000c80: 3bbd03b3 aes64ds x7,x26,x27 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknd_aes64ds_cg_cp_rs2_b27, Zknd_aes64ds_cg_cp_rs2_b27_str) + 80000c84: 00053203 ld x4,0(x10) + 80000c88: 00720c63 beq x4,x7,80000ca0 + 80000c8c: 4740a2ef jal x5,8000b100 + 80000c90: 80000c80 .word 0x80000c80 + 80000c94: 00000000 .word 0x00000000 + 80000c98: 800140c5 .word 0x800140c5 + 80000c9c: 00000000 .word 0x00000000 + 80000ca0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xd8d20b7aab3c1203 + 80000ca4: 00083483 ld x9,0(x16) + 80000ca8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x0d98b6f7ca0752d4 + 80000cac: 00083e03 ld x28,0(x16) + 80000cb0: 00880813 addi x16,x16,8 + +0000000080000cb4 : +Zknd_aes64ds_cg_cp_rs2_b28: + aes64ds x21, x9, x28 # perform operation + 80000cb4: 3bc48ab3 aes64ds x21,x9,x28 + # Check if x21 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x21, Zknd_aes64ds_cg_cp_rs2_b28, Zknd_aes64ds_cg_cp_rs2_b28_str) + 80000cb8: 00053203 ld x4,0(x10) + 80000cbc: 01520c63 beq x4,x21,80000cd4 + 80000cc0: 4400a2ef jal x5,8000b100 + 80000cc4: 80000cb4 .word 0x80000cb4 + 80000cc8: 00000000 .word 0x00000000 + 80000ccc: 800140fb .word 0x800140fb + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x04859db2e6e4c2c5 + 80000cd8: 00083703 ld x14,0(x16) + 80000cdc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs2: x29 = 0x6c6fd0b7c2804f6d + 80000ce0: 00083e83 ld x29,0(x16) + 80000ce4: 00880813 addi x16,x16,8 + +0000000080000ce8 : +Zknd_aes64ds_cg_cp_rs2_b29: + aes64ds x23, x14, x29 # perform operation + 80000ce8: 3bd70bb3 aes64ds x23,x14,x29 + # Check if x23 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x23, Zknd_aes64ds_cg_cp_rs2_b29, Zknd_aes64ds_cg_cp_rs2_b29_str) + 80000cec: 00053203 ld x4,0(x10) + 80000cf0: 01720c63 beq x4,x23,80000d08 + 80000cf4: 40c0a2ef jal x5,8000b100 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80014131 .word 0x80014131 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xebd85fab5a9b3043 + 80000d0c: 00083b83 ld x23,0(x16) + 80000d10: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0xa35c8c3c11466af9 + 80000d14: 00083f03 ld x30,0(x16) + 80000d18: 00880813 addi x16,x16,8 + +0000000080000d1c : +Zknd_aes64ds_cg_cp_rs2_b30: + aes64ds x18, x23, x30 # perform operation + 80000d1c: 3beb8933 aes64ds x18,x23,x30 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknd_aes64ds_cg_cp_rs2_b30, Zknd_aes64ds_cg_cp_rs2_b30_str) + 80000d20: 00053203 ld x4,0(x10) + 80000d24: 01220c63 beq x4,x18,80000d3c + 80000d28: 3d80a2ef jal x5,8000b100 + 80000d2c: 80000d1c .word 0x80000d1c + 80000d30: 00000000 .word 0x00000000 + 80000d34: 80014167 .word 0x80014167 + 80000d38: 00000000 .word 0x00000000 + 80000d3c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x311e13cc7df3f8be + 80000d40: 00083303 ld x6,0(x16) + 80000d44: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs2: x31 = 0x169c485723de7854 + 80000d48: 00083f83 ld x31,0(x16) + 80000d4c: 00880813 addi x16,x16,8 + +0000000080000d50 : +Zknd_aes64ds_cg_cp_rs2_b31: + aes64ds x2, x6, x31 # perform operation + 80000d50: 3bf30133 aes64ds x2,x6,x31 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknd_aes64ds_cg_cp_rs2_b31, Zknd_aes64ds_cg_cp_rs2_b31_str) + 80000d54: 00053203 ld x4,0(x10) + 80000d58: 00220c63 beq x4,x2,80000d70 + 80000d5c: 3a40a2ef jal x5,8000b100 + 80000d60: 80000d50 .word 0x80000d50 + 80000d64: 00000000 .word 0x00000000 + 80000d68: 8001419d .word 0x8001419d + 80000d6c: 00000000 .word 0x00000000 + 80000d70: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xa1eb65a74cef22a4 + 80000d74: 00083583 ld x11,0(x16) + 80000d78: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x9ce07c89ff49d9c0 + 80000d7c: 00083483 ld x9,0(x16) + 80000d80: 00880813 addi x16,x16,8 + +0000000080000d84 : +Zknd_aes64ds_cg_cp_rd_b0: + aes64ds x0, x11, x9 # perform operation + 80000d84: 3a958033 aes64ds x0,x11,x9 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zknd_aes64ds_cg_cp_rd_b0, Zknd_aes64ds_cg_cp_rd_b0_str) + 80000d88: 00053203 ld x4,0(x10) + 80000d8c: 00020c63 beq x4,x0,80000da4 + 80000d90: 3700a2ef jal x5,8000b100 + 80000d94: 80000d84 .word 0x80000d84 + 80000d98: 00000000 .word 0x00000000 + 80000d9c: 800141d3 .word 0x800141d3 + 80000da0: 00000000 .word 0x00000000 + 80000da4: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x3b01538ffb23a027 + 80000da8: 00083883 ld x17,0(x16) + 80000dac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x2425614f881db0aa + 80000db0: 00083403 ld x8,0(x16) + 80000db4: 00880813 addi x16,x16,8 + +0000000080000db8 : +Zknd_aes64ds_cg_cp_rd_b1: + aes64ds x1, x17, x8 # perform operation + 80000db8: 3a8880b3 aes64ds x1,x17,x8 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknd_aes64ds_cg_cp_rd_b1, Zknd_aes64ds_cg_cp_rd_b1_str) + 80000dbc: 00053203 ld x4,0(x10) + 80000dc0: 00120c63 beq x4,x1,80000dd8 + 80000dc4: 33c0a2ef jal x5,8000b100 + 80000dc8: 80000db8 .word 0x80000db8 + 80000dcc: 00000000 .word 0x00000000 + 80000dd0: 80014207 .word 0x80014207 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xd01b3dcc1a2d60bf + 80000ddc: 00083783 ld x15,0(x16) + 80000de0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x172605ac7e9e4178 + 80000de4: 00083d83 ld x27,0(x16) + 80000de8: 00880813 addi x16,x16,8 + +0000000080000dec : +Zknd_aes64ds_cg_cp_rd_b2: + aes64ds x2, x15, x27 # perform operation + 80000dec: 3bb78133 aes64ds x2,x15,x27 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknd_aes64ds_cg_cp_rd_b2, Zknd_aes64ds_cg_cp_rd_b2_str) + 80000df0: 00053203 ld x4,0(x10) + 80000df4: 00220c63 beq x4,x2,80000e0c + 80000df8: 3080a2ef jal x5,8000b100 + 80000dfc: 80000dec .word 0x80000dec + 80000e00: 00000000 .word 0x00000000 + 80000e04: 8001423b .word 0x8001423b + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x780547764fde3052 + 80000e10: 00083c03 ld x24,0(x16) + 80000e14: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x42c8a77cf489d008 + 80000e18: 00083303 ld x6,0(x16) + 80000e1c: 00880813 addi x16,x16,8 + +0000000080000e20 : +Zknd_aes64ds_cg_cp_rd_b3: + aes64ds x3, x24, x6 # perform operation + 80000e20: 3a6c01b3 aes64ds x3,x24,x6 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknd_aes64ds_cg_cp_rd_b3, Zknd_aes64ds_cg_cp_rd_b3_str) + 80000e24: 00053203 ld x4,0(x10) + 80000e28: 00320c63 beq x4,x3,80000e40 + 80000e2c: 2d40a2ef jal x5,8000b100 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 8001426f .word 0x8001426f + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 00850513 addi x10,x10,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000e44: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000e48: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x5df5f538af972570 + 80000e4c: 00083d83 ld x27,0(x16) + 80000e50: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x6564e055f8cfb90e + 80000e54: 00083603 ld x12,0(x16) + 80000e58: 00880813 addi x16,x16,8 + +0000000080000e5c : +Zknd_aes64ds_cg_cp_rd_b4: + aes64ds x4, x27, x12 # perform operation + 80000e5c: 3acd8233 aes64ds x4,x27,x12 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes64ds_cg_cp_rd_b4, Zknd_aes64ds_cg_cp_rd_b4_str) + 80000e60: 00053383 ld x7,0(x10) + 80000e64: 00438c63 beq x7,x4,80000e7c + 80000e68: 2b00a46f jal x8,8000b118 + 80000e6c: 80000e5c .word 0x80000e5c + 80000e70: 00000000 .word 0x00000000 + 80000e74: 800142a3 .word 0x800142a3 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0xd623c11a9edfe6a0 + 80000e80: 00083c03 ld x24,0(x16) + 80000e84: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x1c58c3f594e3acdb + 80000e88: 00083d83 ld x27,0(x16) + 80000e8c: 00880813 addi x16,x16,8 + +0000000080000e90 : +Zknd_aes64ds_cg_cp_rd_b5: + aes64ds x5, x24, x27 # perform operation + 80000e90: 3bbc02b3 aes64ds x5,x24,x27 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes64ds_cg_cp_rd_b5, Zknd_aes64ds_cg_cp_rd_b5_str) + 80000e94: 00053383 ld x7,0(x10) + 80000e98: 00538c63 beq x7,x5,80000eb0 + 80000e9c: 27c0a46f jal x8,8000b118 + 80000ea0: 80000e90 .word 0x80000e90 + 80000ea4: 00000000 .word 0x00000000 + 80000ea8: 800142d7 .word 0x800142d7 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xb5ef6a21e411f58c + 80000eb4: 00083b03 ld x22,0(x16) + 80000eb8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs2: x27 = 0x9cf138159e27121e + 80000ebc: 00083d83 ld x27,0(x16) + 80000ec0: 00880813 addi x16,x16,8 + +0000000080000ec4 : +Zknd_aes64ds_cg_cp_rd_b6: + aes64ds x6, x22, x27 # perform operation + 80000ec4: 3bbb0333 aes64ds x6,x22,x27 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes64ds_cg_cp_rd_b6, Zknd_aes64ds_cg_cp_rd_b6_str) + 80000ec8: 00053383 ld x7,0(x10) + 80000ecc: 00638c63 beq x7,x6,80000ee4 + 80000ed0: 2480a46f jal x8,8000b118 + 80000ed4: 80000ec4 .word 0x80000ec4 + 80000ed8: 00000000 .word 0x00000000 + 80000edc: 8001430b .word 0x8001430b + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ee8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000eec: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x1f3ac1cb681d1392 + 80000ef0: 00083983 ld x19,0(x16) + 80000ef4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x2ee85b08a9e556a1 + 80000ef8: 00083a83 ld x21,0(x16) + 80000efc: 00880813 addi x16,x16,8 + +0000000080000f00 : +Zknd_aes64ds_cg_cp_rd_b7: + aes64ds x7, x19, x21 # perform operation + 80000f00: 3b5983b3 aes64ds x7,x19,x21 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zknd_aes64ds_cg_cp_rd_b7, Zknd_aes64ds_cg_cp_rd_b7_str) + 80000f04: 00053683 ld x13,0(x10) + 80000f08: 00768c63 beq x13,x7,80000f20 + 80000f0c: 2340a76f jal x14,8000b140 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 8001433f .word 0x8001433f + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x496c88c7907569a9 + 80000f24: 00083883 ld x17,0(x16) + 80000f28: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xc91dc7e692aa37ec + 80000f2c: 00083083 ld x1,0(x16) + 80000f30: 00880813 addi x16,x16,8 + +0000000080000f34 : +Zknd_aes64ds_cg_cp_rd_b8: + aes64ds x8, x17, x1 # perform operation + 80000f34: 3a188433 aes64ds x8,x17,x1 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zknd_aes64ds_cg_cp_rd_b8, Zknd_aes64ds_cg_cp_rd_b8_str) + 80000f38: 00053683 ld x13,0(x10) + 80000f3c: 00868c63 beq x13,x8,80000f54 + 80000f40: 2000a76f jal x14,8000b140 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 80014373 .word 0x80014373 + 80000f50: 00000000 .word 0x00000000 + 80000f54: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x42ec0fe1a254f747 + 80000f58: 00083003 ld x0,0(x16) + 80000f5c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x9ba479f25c8b4ba4 + 80000f60: 00083b03 ld x22,0(x16) + 80000f64: 00880813 addi x16,x16,8 + +0000000080000f68 : +Zknd_aes64ds_cg_cp_rd_b9: + aes64ds x9, x0, x22 # perform operation + 80000f68: 3b6004b3 aes64ds x9,x0,x22 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zknd_aes64ds_cg_cp_rd_b9, Zknd_aes64ds_cg_cp_rd_b9_str) + 80000f6c: 00053683 ld x13,0(x10) + 80000f70: 00968c63 beq x13,x9,80000f88 + 80000f74: 1cc0a76f jal x14,8000b140 + 80000f78: 80000f68 .word 0x80000f68 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 800143a7 .word 0x800143a7 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 00850513 addi x10,x10,8 + + mv x18, x10 # switch signature pointer register to avoid conflict with test + 80000f8c: 00050913 addi x18,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x4eac534277850e9c + 80000f90: 00083f03 ld x30,0(x16) + 80000f94: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x9acd457399ef5017 + 80000f98: 00083983 ld x19,0(x16) + 80000f9c: 00880813 addi x16,x16,8 + +0000000080000fa0 : +Zknd_aes64ds_cg_cp_rd_b10: + aes64ds x10, x30, x19 # perform operation + 80000fa0: 3b3f0533 aes64ds x10,x30,x19 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zknd_aes64ds_cg_cp_rd_b10, Zknd_aes64ds_cg_cp_rd_b10_str) + 80000fa4: 00093683 ld x13,0(x18) + 80000fa8: 00a68c63 beq x13,x10,80000fc0 + 80000fac: 1940a76f jal x14,8000b140 + 80000fb0: 80000fa0 .word 0x80000fa0 + 80000fb4: 00000000 .word 0x00000000 + 80000fb8: 800143db .word 0x800143db + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x18f006e2bbe7508e + 80000fc4: 00083203 ld x4,0(x16) + 80000fc8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xb6dcf5ecd5ba2539 + 80000fcc: 00083103 ld x2,0(x16) + 80000fd0: 00880813 addi x16,x16,8 + +0000000080000fd4 : +Zknd_aes64ds_cg_cp_rd_b11: + aes64ds x11, x4, x2 # perform operation + 80000fd4: 3a2205b3 aes64ds x11,x4,x2 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zknd_aes64ds_cg_cp_rd_b11, Zknd_aes64ds_cg_cp_rd_b11_str) + 80000fd8: 00093683 ld x13,0(x18) + 80000fdc: 00b68c63 beq x13,x11,80000ff4 + 80000fe0: 1600a76f jal x14,8000b140 + 80000fe4: 80000fd4 .word 0x80000fd4 + 80000fe8: 00000000 .word 0x00000000 + 80000fec: 80014410 .word 0x80014410 + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x05499f6920af1532 + 80000ff8: 00083d83 ld x27,0(x16) + 80000ffc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x058c231314aa05c1 + 80001000: 00083203 ld x4,0(x16) + 80001004: 00880813 addi x16,x16,8 + +0000000080001008 : +Zknd_aes64ds_cg_cp_rd_b12: + aes64ds x12, x27, x4 # perform operation + 80001008: 3a4d8633 aes64ds x12,x27,x4 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zknd_aes64ds_cg_cp_rd_b12, Zknd_aes64ds_cg_cp_rd_b12_str) + 8000100c: 00093683 ld x13,0(x18) + 80001010: 00c68c63 beq x13,x12,80001028 + 80001014: 12c0a76f jal x14,8000b140 + 80001018: 80001008 .word 0x80001008 + 8000101c: 00000000 .word 0x00000000 + 80001020: 80014445 .word 0x80014445 + 80001024: 00000000 .word 0x00000000 + 80001028: 00890913 addi x18,x18,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000102c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001030: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x9ae9631f34508696 + 80001034: 00083a83 ld x21,0(x16) + 80001038: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs2: x24 = 0x900b03075e753ad7 + 8000103c: 00083c03 ld x24,0(x16) + 80001040: 00880813 addi x16,x16,8 + +0000000080001044 : +Zknd_aes64ds_cg_cp_rd_b13: + aes64ds x13, x21, x24 # perform operation + 80001044: 3b8a86b3 aes64ds x13,x21,x24 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zknd_aes64ds_cg_cp_rd_b13, Zknd_aes64ds_cg_cp_rd_b13_str) + 80001048: 00093203 ld x4,0(x18) + 8000104c: 00d20c63 beq x4,x13,80001064 + 80001050: 0b00a2ef jal x5,8000b100 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 8001447a .word 0x8001447a + 80001060: 00000000 .word 0x00000000 + 80001064: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x32d0b853e5629cf2 + 80001068: 00083603 ld x12,0(x16) + 8000106c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xad6fe14cbd556c51 + 80001070: 00083083 ld x1,0(x16) + 80001074: 00880813 addi x16,x16,8 + +0000000080001078 : +Zknd_aes64ds_cg_cp_rd_b14: + aes64ds x14, x12, x1 # perform operation + 80001078: 3a160733 aes64ds x14,x12,x1 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zknd_aes64ds_cg_cp_rd_b14, Zknd_aes64ds_cg_cp_rd_b14_str) + 8000107c: 00093203 ld x4,0(x18) + 80001080: 00e20c63 beq x4,x14,80001098 + 80001084: 07c0a2ef jal x5,8000b100 + 80001088: 80001078 .word 0x80001078 + 8000108c: 00000000 .word 0x00000000 + 80001090: 800144af .word 0x800144af + 80001094: 00000000 .word 0x00000000 + 80001098: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x34d96f2e5ab10c2f + 8000109c: 00083a03 ld x20,0(x16) + 800010a0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0xc6271694c8aa42ab + 800010a4: 00083983 ld x19,0(x16) + 800010a8: 00880813 addi x16,x16,8 + +00000000800010ac : +Zknd_aes64ds_cg_cp_rd_b15: + aes64ds x15, x20, x19 # perform operation + 800010ac: 3b3a07b3 aes64ds x15,x20,x19 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zknd_aes64ds_cg_cp_rd_b15, Zknd_aes64ds_cg_cp_rd_b15_str) + 800010b0: 00093203 ld x4,0(x18) + 800010b4: 00f20c63 beq x4,x15,800010cc + 800010b8: 0480a2ef jal x5,8000b100 + 800010bc: 800010ac .word 0x800010ac + 800010c0: 00000000 .word 0x00000000 + 800010c4: 800144e4 .word 0x800144e4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 00890913 addi x18,x18,8 + + mv x2, x16 # switch data pointer register to avoid conflict with test + 800010d0: 00080113 addi x2,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x088d5981fa463027 + 800010d4: 00013083 ld x1,0(x2) + 800010d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xd8614d9dd15b9f70 + 800010dc: 00013e83 ld x29,0(x2) + 800010e0: 00810113 addi x2,x2,8 + +00000000800010e4 : +Zknd_aes64ds_cg_cp_rd_b16: + aes64ds x16, x1, x29 # perform operation + 800010e4: 3bd08833 aes64ds x16,x1,x29 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zknd_aes64ds_cg_cp_rd_b16, Zknd_aes64ds_cg_cp_rd_b16_str) + 800010e8: 00093203 ld x4,0(x18) + 800010ec: 01020c63 beq x4,x16,80001104 + 800010f0: 0100a2ef jal x5,8000b100 + 800010f4: 800010e4 .word 0x800010e4 + 800010f8: 00000000 .word 0x00000000 + 800010fc: 80014519 .word 0x80014519 + 80001100: 00000000 .word 0x00000000 + 80001104: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xaf3d618bb4d41772 + 80001108: 00013783 ld x15,0(x2) + 8000110c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xbfa7b57f8a65f7d8 + 80001110: 00013403 ld x8,0(x2) + 80001114: 00810113 addi x2,x2,8 + +0000000080001118 : +Zknd_aes64ds_cg_cp_rd_b17: + aes64ds x17, x15, x8 # perform operation + 80001118: 3a8788b3 aes64ds x17,x15,x8 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zknd_aes64ds_cg_cp_rd_b17, Zknd_aes64ds_cg_cp_rd_b17_str) + 8000111c: 00093203 ld x4,0(x18) + 80001120: 01120c63 beq x4,x17,80001138 + 80001124: 7dd092ef jal x5,8000b100 + 80001128: 80001118 .word 0x80001118 + 8000112c: 00000000 .word 0x00000000 + 80001130: 8001454e .word 0x8001454e + 80001134: 00000000 .word 0x00000000 + 80001138: 00890913 addi x18,x18,8 + + mv x16, x18 # switch signature pointer register to avoid conflict with test + 8000113c: 00090813 addi x16,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x4da0f6436aeb1932 + 80001140: 00013a83 ld x21,0(x2) + 80001144: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0x7ec0f05b97494021 + 80001148: 00013003 ld x0,0(x2) + 8000114c: 00810113 addi x2,x2,8 + +0000000080001150 : +Zknd_aes64ds_cg_cp_rd_b18: + aes64ds x18, x21, x0 # perform operation + 80001150: 3a0a8933 aes64ds x18,x21,x0 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cp_rd_b18, Zknd_aes64ds_cg_cp_rd_b18_str) + 80001154: 00083203 ld x4,0(x16) + 80001158: 01220c63 beq x4,x18,80001170 + 8000115c: 7a5092ef jal x5,8000b100 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80014583 .word 0x80014583 + 8000116c: 00000000 .word 0x00000000 + 80001170: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xd434339af3671dcc + 80001174: 00013d03 ld x26,0(x2) + 80001178: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x14d640c9d1e6758a + 8000117c: 00013703 ld x14,0(x2) + 80001180: 00810113 addi x2,x2,8 + +0000000080001184 : +Zknd_aes64ds_cg_cp_rd_b19: + aes64ds x19, x26, x14 # perform operation + 80001184: 3aed09b3 aes64ds x19,x26,x14 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cp_rd_b19, Zknd_aes64ds_cg_cp_rd_b19_str) + 80001188: 00083203 ld x4,0(x16) + 8000118c: 01320c63 beq x4,x19,800011a4 + 80001190: 771092ef jal x5,8000b100 + 80001194: 80001184 .word 0x80001184 + 80001198: 00000000 .word 0x00000000 + 8000119c: 800145b8 .word 0x800145b8 + 800011a0: 00000000 .word 0x00000000 + 800011a4: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xeff7a1eb4144fbd5 + 800011a8: 00013f83 ld x31,0(x2) + 800011ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x9681fee5f9da0f57 + 800011b0: 00013e83 ld x29,0(x2) + 800011b4: 00810113 addi x2,x2,8 + +00000000800011b8 : +Zknd_aes64ds_cg_cp_rd_b20: + aes64ds x20, x31, x29 # perform operation + 800011b8: 3bdf8a33 aes64ds x20,x31,x29 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cp_rd_b20, Zknd_aes64ds_cg_cp_rd_b20_str) + 800011bc: 00083203 ld x4,0(x16) + 800011c0: 01420c63 beq x4,x20,800011d8 + 800011c4: 73d092ef jal x5,8000b100 + 800011c8: 800011b8 .word 0x800011b8 + 800011cc: 00000000 .word 0x00000000 + 800011d0: 800145ed .word 0x800145ed + 800011d4: 00000000 .word 0x00000000 + 800011d8: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xd59289fbc2b6cc00 + 800011dc: 00013d03 ld x26,0(x2) + 800011e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x8c270da15934f5e7 + 800011e4: 00013e83 ld x29,0(x2) + 800011e8: 00810113 addi x2,x2,8 + +00000000800011ec : +Zknd_aes64ds_cg_cp_rd_b21: + aes64ds x21, x26, x29 # perform operation + 800011ec: 3bdd0ab3 aes64ds x21,x26,x29 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cp_rd_b21, Zknd_aes64ds_cg_cp_rd_b21_str) + 800011f0: 00083203 ld x4,0(x16) + 800011f4: 01520c63 beq x4,x21,8000120c + 800011f8: 709092ef jal x5,8000b100 + 800011fc: 800011ec .word 0x800011ec + 80001200: 00000000 .word 0x00000000 + 80001204: 80014622 .word 0x80014622 + 80001208: 00000000 .word 0x00000000 + 8000120c: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x77d23b3bf5158957 + 80001210: 00013003 ld x0,0(x2) + 80001214: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x739f5c4b99d35983 + 80001218: 00013f83 ld x31,0(x2) + 8000121c: 00810113 addi x2,x2,8 + +0000000080001220 : +Zknd_aes64ds_cg_cp_rd_b22: + aes64ds x22, x0, x31 # perform operation + 80001220: 3bf00b33 aes64ds x22,x0,x31 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cp_rd_b22, Zknd_aes64ds_cg_cp_rd_b22_str) + 80001224: 00083203 ld x4,0(x16) + 80001228: 01620c63 beq x4,x22,80001240 + 8000122c: 6d5092ef jal x5,8000b100 + 80001230: 80001220 .word 0x80001220 + 80001234: 00000000 .word 0x00000000 + 80001238: 80014657 .word 0x80014657 + 8000123c: 00000000 .word 0x00000000 + 80001240: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xa1b2e5c855ca70f6 + 80001244: 00013583 ld x11,0(x2) + 80001248: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xcf47272177040c1a + 8000124c: 00013c83 ld x25,0(x2) + 80001250: 00810113 addi x2,x2,8 + +0000000080001254 : +Zknd_aes64ds_cg_cp_rd_b23: + aes64ds x23, x11, x25 # perform operation + 80001254: 3b958bb3 aes64ds x23,x11,x25 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cp_rd_b23, Zknd_aes64ds_cg_cp_rd_b23_str) + 80001258: 00083203 ld x4,0(x16) + 8000125c: 01720c63 beq x4,x23,80001274 + 80001260: 6a1092ef jal x5,8000b100 + 80001264: 80001254 .word 0x80001254 + 80001268: 00000000 .word 0x00000000 + 8000126c: 8001468c .word 0x8001468c + 80001270: 00000000 .word 0x00000000 + 80001274: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xcfe6b52fa6c4a1a8 + 80001278: 00013a03 ld x20,0(x2) + 8000127c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x432fc374b661ea11 + 80001280: 00013983 ld x19,0(x2) + 80001284: 00810113 addi x2,x2,8 + +0000000080001288 : +Zknd_aes64ds_cg_cp_rd_b24: + aes64ds x24, x20, x19 # perform operation + 80001288: 3b3a0c33 aes64ds x24,x20,x19 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cp_rd_b24, Zknd_aes64ds_cg_cp_rd_b24_str) + 8000128c: 00083203 ld x4,0(x16) + 80001290: 01820c63 beq x4,x24,800012a8 + 80001294: 66d092ef jal x5,8000b100 + 80001298: 80001288 .word 0x80001288 + 8000129c: 00000000 .word 0x00000000 + 800012a0: 800146c1 .word 0x800146c1 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xf1609b6caafa9a89 + 800012ac: 00013a83 ld x21,0(x2) + 800012b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x3e6c326bf537a6d1 + 800012b4: 00013183 ld x3,0(x2) + 800012b8: 00810113 addi x2,x2,8 + +00000000800012bc : +Zknd_aes64ds_cg_cp_rd_b25: + aes64ds x25, x21, x3 # perform operation + 800012bc: 3a3a8cb3 aes64ds x25,x21,x3 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cp_rd_b25, Zknd_aes64ds_cg_cp_rd_b25_str) + 800012c0: 00083203 ld x4,0(x16) + 800012c4: 01920c63 beq x4,x25,800012dc + 800012c8: 639092ef jal x5,8000b100 + 800012cc: 800012bc .word 0x800012bc + 800012d0: 00000000 .word 0x00000000 + 800012d4: 800146f6 .word 0x800146f6 + 800012d8: 00000000 .word 0x00000000 + 800012dc: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xb84cc516bc562f5a + 800012e0: 00013a03 ld x20,0(x2) + 800012e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x4e9130cc3da78595 + 800012e8: 00013d83 ld x27,0(x2) + 800012ec: 00810113 addi x2,x2,8 + +00000000800012f0 : +Zknd_aes64ds_cg_cp_rd_b26: + aes64ds x26, x20, x27 # perform operation + 800012f0: 3bba0d33 aes64ds x26,x20,x27 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cp_rd_b26, Zknd_aes64ds_cg_cp_rd_b26_str) + 800012f4: 00083203 ld x4,0(x16) + 800012f8: 01a20c63 beq x4,x26,80001310 + 800012fc: 605092ef jal x5,8000b100 + 80001300: 800012f0 .word 0x800012f0 + 80001304: 00000000 .word 0x00000000 + 80001308: 8001472b .word 0x8001472b + 8000130c: 00000000 .word 0x00000000 + 80001310: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xcd1caa998626d3d6 + 80001314: 00013083 ld x1,0(x2) + 80001318: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x8e3d6561e922cdae + 8000131c: 00013403 ld x8,0(x2) + 80001320: 00810113 addi x2,x2,8 + +0000000080001324 : +Zknd_aes64ds_cg_cp_rd_b27: + aes64ds x27, x1, x8 # perform operation + 80001324: 3a808db3 aes64ds x27,x1,x8 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cp_rd_b27, Zknd_aes64ds_cg_cp_rd_b27_str) + 80001328: 00083203 ld x4,0(x16) + 8000132c: 01b20c63 beq x4,x27,80001344 + 80001330: 5d1092ef jal x5,8000b100 + 80001334: 80001324 .word 0x80001324 + 80001338: 00000000 .word 0x00000000 + 8000133c: 80014760 .word 0x80014760 + 80001340: 00000000 .word 0x00000000 + 80001344: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x0afc6e6900982b4a + 80001348: 00013003 ld x0,0(x2) + 8000134c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0xa7c557944c755d5b + 80001350: 00013883 ld x17,0(x2) + 80001354: 00810113 addi x2,x2,8 + +0000000080001358 : +Zknd_aes64ds_cg_cp_rd_b28: + aes64ds x28, x0, x17 # perform operation + 80001358: 3b100e33 aes64ds x28,x0,x17 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cp_rd_b28, Zknd_aes64ds_cg_cp_rd_b28_str) + 8000135c: 00083203 ld x4,0(x16) + 80001360: 01c20c63 beq x4,x28,80001378 + 80001364: 59d092ef jal x5,8000b100 + 80001368: 80001358 .word 0x80001358 + 8000136c: 00000000 .word 0x00000000 + 80001370: 80014795 .word 0x80014795 + 80001374: 00000000 .word 0x00000000 + 80001378: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xdad316851b5893ea + 8000137c: 00013903 ld x18,0(x2) + 80001380: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x9ff3355efdde9db6 + 80001384: 00013783 ld x15,0(x2) + 80001388: 00810113 addi x2,x2,8 + +000000008000138c : +Zknd_aes64ds_cg_cp_rd_b29: + aes64ds x29, x18, x15 # perform operation + 8000138c: 3af90eb3 aes64ds x29,x18,x15 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cp_rd_b29, Zknd_aes64ds_cg_cp_rd_b29_str) + 80001390: 00083203 ld x4,0(x16) + 80001394: 01d20c63 beq x4,x29,800013ac + 80001398: 569092ef jal x5,8000b100 + 8000139c: 8000138c .word 0x8000138c + 800013a0: 00000000 .word 0x00000000 + 800013a4: 800147ca .word 0x800147ca + 800013a8: 00000000 .word 0x00000000 + 800013ac: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xc77184f1486ad7e1 + 800013b0: 00013683 ld x13,0(x2) + 800013b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xf47d51ba8f9aad29 + 800013b8: 00013d03 ld x26,0(x2) + 800013bc: 00810113 addi x2,x2,8 + +00000000800013c0 : +Zknd_aes64ds_cg_cp_rd_b30: + aes64ds x30, x13, x26 # perform operation + 800013c0: 3ba68f33 aes64ds x30,x13,x26 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cp_rd_b30, Zknd_aes64ds_cg_cp_rd_b30_str) + 800013c4: 00083203 ld x4,0(x16) + 800013c8: 01e20c63 beq x4,x30,800013e0 + 800013cc: 535092ef jal x5,8000b100 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 800147ff .word 0x800147ff + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x9186e4269168318e + 800013e4: 00013603 ld x12,0(x2) + 800013e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xf46da1c8197f7b80 + 800013ec: 00013b83 ld x23,0(x2) + 800013f0: 00810113 addi x2,x2,8 + +00000000800013f4 : +Zknd_aes64ds_cg_cp_rd_b31: + aes64ds x31, x12, x23 # perform operation + 800013f4: 3b760fb3 aes64ds x31,x12,x23 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cp_rd_b31, Zknd_aes64ds_cg_cp_rd_b31_str) + 800013f8: 00083203 ld x4,0(x16) + 800013fc: 01f20c63 beq x4,x31,80001414 + 80001400: 501092ef jal x5,8000b100 + 80001404: 800013f4 .word 0x800013f4 + 80001408: 00000000 .word 0x00000000 + 8000140c: 80014834 .word 0x80014834 + 80001410: 00000000 .word 0x00000000 + 80001414: 00880813 addi x16,x16,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x0000000000000000 + 80001418: 00013d03 ld x26,0(x2) + 8000141c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xe918477405195af2 + 80001420: 00013303 ld x6,0(x2) + 80001424: 00810113 addi x2,x2,8 + +0000000080001428 : +Zknd_aes64ds_cg_cp_rs1_edges_0x0: + aes64ds x30, x26, x6 # perform operation + 80001428: 3a6d0f33 aes64ds x30,x26,x6 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cp_rs1_edges_0x0, Zknd_aes64ds_cg_cp_rs1_edges_0x0_str) + 8000142c: 00083203 ld x4,0(x16) + 80001430: 01e20c63 beq x4,x30,80001448 + 80001434: 4cd092ef jal x5,8000b100 + 80001438: 80001428 .word 0x80001428 + 8000143c: 00000000 .word 0x00000000 + 80001440: 80014869 .word 0x80014869 + 80001444: 00000000 .word 0x00000000 + 80001448: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x0000000000000001 + 8000144c: 00013d03 ld x26,0(x2) + 80001450: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x9a8230a95286f95d + 80001454: 00013b03 ld x22,0(x2) + 80001458: 00810113 addi x2,x2,8 + +000000008000145c : +Zknd_aes64ds_cg_cp_rs1_edges_0x1: + aes64ds x29, x26, x22 # perform operation + 8000145c: 3b6d0eb3 aes64ds x29,x26,x22 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cp_rs1_edges_0x1, Zknd_aes64ds_cg_cp_rs1_edges_0x1_str) + 80001460: 00083203 ld x4,0(x16) + 80001464: 01d20c63 beq x4,x29,8000147c + 80001468: 499092ef jal x5,8000b100 + 8000146c: 8000145c .word 0x8000145c + 80001470: 00000000 .word 0x00000000 + 80001474: 800148a5 .word 0x800148a5 + 80001478: 00000000 .word 0x00000000 + 8000147c: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000000000002 + 80001480: 00013603 ld x12,0(x2) + 80001484: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xf3273a09b9ad8f5e + 80001488: 00013403 ld x8,0(x2) + 8000148c: 00810113 addi x2,x2,8 + +0000000080001490 : +Zknd_aes64ds_cg_cp_rs1_edges_0x2: + aes64ds x24, x12, x8 # perform operation + 80001490: 3a860c33 aes64ds x24,x12,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cp_rs1_edges_0x2, Zknd_aes64ds_cg_cp_rs1_edges_0x2_str) + 80001494: 00083203 ld x4,0(x16) + 80001498: 01820c63 beq x4,x24,800014b0 + 8000149c: 465092ef jal x5,8000b100 + 800014a0: 80001490 .word 0x80001490 + 800014a4: 00000000 .word 0x00000000 + 800014a8: 800148e1 .word 0x800148e1 + 800014ac: 00000000 .word 0x00000000 + 800014b0: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x8000000000000000 + 800014b4: 00013f83 ld x31,0(x2) + 800014b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x9d6a345104c5ea87 + 800014bc: 00013a83 ld x21,0(x2) + 800014c0: 00810113 addi x2,x2,8 + +00000000800014c4 : +Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000000: + aes64ds x12, x31, x21 # perform operation + 800014c4: 3b5f8633 aes64ds x12,x31,x21 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000000, Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000000_str) + 800014c8: 00083203 ld x4,0(x16) + 800014cc: 00c20c63 beq x4,x12,800014e4 + 800014d0: 431092ef jal x5,8000b100 + 800014d4: 800014c4 .word 0x800014c4 + 800014d8: 00000000 .word 0x00000000 + 800014dc: 8001491d .word 0x8001491d + 800014e0: 00000000 .word 0x00000000 + 800014e4: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8000000000000001 + 800014e8: 00013783 ld x15,0(x2) + 800014ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xef833acd480bb679 + 800014f0: 00013c83 ld x25,0(x2) + 800014f4: 00810113 addi x2,x2,8 + +00000000800014f8 : +Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000001: + aes64ds x8, x15, x25 # perform operation + 800014f8: 3b978433 aes64ds x8,x15,x25 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000001, Zknd_aes64ds_cg_cp_rs1_edges_0x8000000000000001_str) + 800014fc: 00083203 ld x4,0(x16) + 80001500: 00820c63 beq x4,x8,80001518 + 80001504: 3fd092ef jal x5,8000b100 + 80001508: 800014f8 .word 0x800014f8 + 8000150c: 00000000 .word 0x00000000 + 80001510: 80014969 .word 0x80014969 + 80001514: 00000000 .word 0x00000000 + 80001518: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x7fffffffffffffff + 8000151c: 00013783 ld x15,0(x2) + 80001520: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xd5b9dc190496a494 + 80001524: 00013503 ld x10,0(x2) + 80001528: 00810113 addi x2,x2,8 + +000000008000152c : +Zknd_aes64ds_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64ds x13, x15, x10 # perform operation + 8000152c: 3aa786b3 aes64ds x13,x15,x10 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cp_rs1_edges_0x7fffffffffffffff, Zknd_aes64ds_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001530: 00083203 ld x4,0(x16) + 80001534: 00d20c63 beq x4,x13,8000154c + 80001538: 3c9092ef jal x5,8000b100 + 8000153c: 8000152c .word 0x8000152c + 80001540: 00000000 .word 0x00000000 + 80001544: 800149b5 .word 0x800149b5 + 80001548: 00000000 .word 0x00000000 + 8000154c: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80001550: 00013d03 ld x26,0(x2) + 80001554: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xec532191158065ab + 80001558: 00013603 ld x12,0(x2) + 8000155c: 00810113 addi x2,x2,8 + +0000000080001560 : +Zknd_aes64ds_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64ds x25, x26, x12 # perform operation + 80001560: 3acd0cb3 aes64ds x25,x26,x12 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknd_aes64ds_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001564: 00083203 ld x4,0(x16) + 80001568: 01920c63 beq x4,x25,80001580 + 8000156c: 395092ef jal x5,8000b100 + 80001570: 80001560 .word 0x80001560 + 80001574: 00000000 .word 0x00000000 + 80001578: 80014a01 .word 0x80014a01 + 8000157c: 00000000 .word 0x00000000 + 80001580: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xffffffffffffffff + 80001584: 00013d03 ld x26,0(x2) + 80001588: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x37cc3a00505588b9 + 8000158c: 00013983 ld x19,0(x2) + 80001590: 00810113 addi x2,x2,8 + +0000000080001594 : +Zknd_aes64ds_cg_cp_rs1_edges_0xffffffffffffffff: + aes64ds x6, x26, x19 # perform operation + 80001594: 3b3d0333 aes64ds x6,x26,x19 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cp_rs1_edges_0xffffffffffffffff, Zknd_aes64ds_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80001598: 00083203 ld x4,0(x16) + 8000159c: 00620c63 beq x4,x6,800015b4 + 800015a0: 361092ef jal x5,8000b100 + 800015a4: 80001594 .word 0x80001594 + 800015a8: 00000000 .word 0x00000000 + 800015ac: 80014a4d .word 0x80014a4d + 800015b0: 00000000 .word 0x00000000 + 800015b4: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xfffffffffffffffe + 800015b8: 00013683 ld x13,0(x2) + 800015bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x3bc5eb92d97ea0f9 + 800015c0: 00013083 ld x1,0(x2) + 800015c4: 00810113 addi x2,x2,8 + +00000000800015c8 : +Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64ds x3, x13, x1 # perform operation + 800015c8: 3a1681b3 aes64ds x3,x13,x1 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffffffffffe, Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015cc: 00083203 ld x4,0(x16) + 800015d0: 00320c63 beq x4,x3,800015e8 + 800015d4: 32d092ef jal x5,8000b100 + 800015d8: 800015c8 .word 0x800015c8 + 800015dc: 00000000 .word 0x00000000 + 800015e0: 80014a99 .word 0x80014a99 + 800015e4: 00000000 .word 0x00000000 + 800015e8: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 800015ec: 00013503 ld x10,0(x2) + 800015f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x7581b64adcd7605e + 800015f4: 00013403 ld x8,0(x2) + 800015f8: 00810113 addi x2,x2,8 + +00000000800015fc : +Zknd_aes64ds_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64ds x25, x10, x8 # perform operation + 800015fc: 3a850cb3 aes64ds x25,x10,x8 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001600: 00083203 ld x4,0(x16) + 80001604: 01920c63 beq x4,x25,8000161c + 80001608: 2f9092ef jal x5,8000b100 + 8000160c: 800015fc .word 0x800015fc + 80001610: 00000000 .word 0x00000000 + 80001614: 80014ae5 .word 0x80014ae5 + 80001618: 00000000 .word 0x00000000 + 8000161c: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80001620: 00013a03 ld x20,0(x2) + 80001624: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xfee2991b6c15b4eb + 80001628: 00013e03 ld x28,0(x2) + 8000162c: 00810113 addi x2,x2,8 + +0000000080001630 : +Zknd_aes64ds_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64ds x11, x20, x28 # perform operation + 80001630: 3bca05b3 aes64ds x11,x20,x28 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001634: 00083203 ld x4,0(x16) + 80001638: 00b20c63 beq x4,x11,80001650 + 8000163c: 2c5092ef jal x5,8000b100 + 80001640: 80001630 .word 0x80001630 + 80001644: 00000000 .word 0x00000000 + 80001648: 80014b31 .word 0x80014b31 + 8000164c: 00000000 .word 0x00000000 + 80001650: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x5555555555555555 + 80001654: 00013683 ld x13,0(x2) + 80001658: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xdaac91adb499ef97 + 8000165c: 00013c83 ld x25,0(x2) + 80001660: 00810113 addi x2,x2,8 + +0000000080001664 : +Zknd_aes64ds_cg_cp_rs1_edges_0x5555555555555555: + aes64ds x23, x13, x25 # perform operation + 80001664: 3b968bb3 aes64ds x23,x13,x25 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cp_rs1_edges_0x5555555555555555, Zknd_aes64ds_cg_cp_rs1_edges_0x5555555555555555_str) + 80001668: 00083203 ld x4,0(x16) + 8000166c: 01720c63 beq x4,x23,80001684 + 80001670: 291092ef jal x5,8000b100 + 80001674: 80001664 .word 0x80001664 + 80001678: 00000000 .word 0x00000000 + 8000167c: 80014b7d .word 0x80014b7d + 80001680: 00000000 .word 0x00000000 + 80001684: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x00000000ffffffff + 80001688: 00013e83 ld x29,0(x2) + 8000168c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xc486b2e87f406a45 + 80001690: 00013583 ld x11,0(x2) + 80001694: 00810113 addi x2,x2,8 + +0000000080001698 : +Zknd_aes64ds_cg_cp_rs1_edges_0xffffffff: + aes64ds x6, x29, x11 # perform operation + 80001698: 3abe8333 aes64ds x6,x29,x11 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cp_rs1_edges_0xffffffff, Zknd_aes64ds_cg_cp_rs1_edges_0xffffffff_str) + 8000169c: 00083203 ld x4,0(x16) + 800016a0: 00620c63 beq x4,x6,800016b8 + 800016a4: 25d092ef jal x5,8000b100 + 800016a8: 80001698 .word 0x80001698 + 800016ac: 00000000 .word 0x00000000 + 800016b0: 80014bc9 .word 0x80014bc9 + 800016b4: 00000000 .word 0x00000000 + 800016b8: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x00000000fffffffe + 800016bc: 00013c03 ld x24,0(x2) + 800016c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x6f59a03ef15e1e6f + 800016c4: 00013d83 ld x27,0(x2) + 800016c8: 00810113 addi x2,x2,8 + +00000000800016cc : +Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffe: + aes64ds x20, x24, x27 # perform operation + 800016cc: 3bbc0a33 aes64ds x20,x24,x27 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffe, Zknd_aes64ds_cg_cp_rs1_edges_0xfffffffe_str) + 800016d0: 00083203 ld x4,0(x16) + 800016d4: 01420c63 beq x4,x20,800016ec + 800016d8: 229092ef jal x5,8000b100 + 800016dc: 800016cc .word 0x800016cc + 800016e0: 00000000 .word 0x00000000 + 800016e4: 80014c0d .word 0x80014c0d + 800016e8: 00000000 .word 0x00000000 + 800016ec: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000100000000 + 800016f0: 00013f83 ld x31,0(x2) + 800016f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x2b0ada0b702a7923 + 800016f8: 00013b83 ld x23,0(x2) + 800016fc: 00810113 addi x2,x2,8 + +0000000080001700 : +Zknd_aes64ds_cg_cp_rs1_edges_0x100000000: + aes64ds x7, x31, x23 # perform operation + 80001700: 3b7f83b3 aes64ds x7,x31,x23 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cp_rs1_edges_0x100000000, Zknd_aes64ds_cg_cp_rs1_edges_0x100000000_str) + 80001704: 00083203 ld x4,0(x16) + 80001708: 00720c63 beq x4,x7,80001720 + 8000170c: 1f5092ef jal x5,8000b100 + 80001710: 80001700 .word 0x80001700 + 80001714: 00000000 .word 0x00000000 + 80001718: 80014c51 .word 0x80014c51 + 8000171c: 00000000 .word 0x00000000 + 80001720: 00880813 addi x16,x16,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x0000000100000001 + 80001724: 00013883 ld x17,0(x2) + 80001728: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xa91e60c196fa0924 + 8000172c: 00013b83 ld x23,0(x2) + 80001730: 00810113 addi x2,x2,8 + +0000000080001734 : +Zknd_aes64ds_cg_cp_rs1_edges_0x100000001: + aes64ds x6, x17, x23 # perform operation + 80001734: 3b788333 aes64ds x6,x17,x23 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cp_rs1_edges_0x100000001, Zknd_aes64ds_cg_cp_rs1_edges_0x100000001_str) + 80001738: 00083203 ld x4,0(x16) + 8000173c: 00620c63 beq x4,x6,80001754 + 80001740: 1c1092ef jal x5,8000b100 + 80001744: 80001734 .word 0x80001734 + 80001748: 00000000 .word 0x00000000 + 8000174c: 80014c96 .word 0x80014c96 + 80001750: 00000000 .word 0x00000000 + 80001754: 00880813 addi x16,x16,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x289aae0ae0e0e73b + 80001758: 00013183 ld x3,0(x2) + 8000175c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x0000000000000000 + 80001760: 00013783 ld x15,0(x2) + 80001764: 00810113 addi x2,x2,8 + +0000000080001768 : +Zknd_aes64ds_cg_cp_rs2_edges_0x0: + aes64ds x17, x3, x15 # perform operation + 80001768: 3af188b3 aes64ds x17,x3,x15 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cp_rs2_edges_0x0, Zknd_aes64ds_cg_cp_rs2_edges_0x0_str) + 8000176c: 00083203 ld x4,0(x16) + 80001770: 01120c63 beq x4,x17,80001788 + 80001774: 18d092ef jal x5,8000b100 + 80001778: 80001768 .word 0x80001768 + 8000177c: 00000000 .word 0x00000000 + 80001780: 80014cdb .word 0x80014cdb + 80001784: 00000000 .word 0x00000000 + 80001788: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x4492e9aec05ea137 + 8000178c: 00013903 ld x18,0(x2) + 80001790: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x0000000000000001 + 80001794: 00013703 ld x14,0(x2) + 80001798: 00810113 addi x2,x2,8 + +000000008000179c : +Zknd_aes64ds_cg_cp_rs2_edges_0x1: + aes64ds x12, x18, x14 # perform operation + 8000179c: 3ae90633 aes64ds x12,x18,x14 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cp_rs2_edges_0x1, Zknd_aes64ds_cg_cp_rs2_edges_0x1_str) + 800017a0: 00083203 ld x4,0(x16) + 800017a4: 00c20c63 beq x4,x12,800017bc + 800017a8: 159092ef jal x5,8000b100 + 800017ac: 8000179c .word 0x8000179c + 800017b0: 00000000 .word 0x00000000 + 800017b4: 80014d18 .word 0x80014d18 + 800017b8: 00000000 .word 0x00000000 + 800017bc: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xbab2f5406ff5d026 + 800017c0: 00013f83 ld x31,0(x2) + 800017c4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0000000000000002 + 800017c8: 00013083 ld x1,0(x2) + 800017cc: 00810113 addi x2,x2,8 + +00000000800017d0 : +Zknd_aes64ds_cg_cp_rs2_edges_0x2: + aes64ds x3, x31, x1 # perform operation + 800017d0: 3a1f81b3 aes64ds x3,x31,x1 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cp_rs2_edges_0x2, Zknd_aes64ds_cg_cp_rs2_edges_0x2_str) + 800017d4: 00083203 ld x4,0(x16) + 800017d8: 00320c63 beq x4,x3,800017f0 + 800017dc: 125092ef jal x5,8000b100 + 800017e0: 800017d0 .word 0x800017d0 + 800017e4: 00000000 .word 0x00000000 + 800017e8: 80014d55 .word 0x80014d55 + 800017ec: 00000000 .word 0x00000000 + 800017f0: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x2c4410cc7c4d64d8 + 800017f4: 00013883 ld x17,0(x2) + 800017f8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x8000000000000000 + 800017fc: 00013903 ld x18,0(x2) + 80001800: 00810113 addi x2,x2,8 + +0000000080001804 : +Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000000: + aes64ds x11, x17, x18 # perform operation + 80001804: 3b2885b3 aes64ds x11,x17,x18 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000000, Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000000_str) + 80001808: 00083203 ld x4,0(x16) + 8000180c: 00b20c63 beq x4,x11,80001824 + 80001810: 0f1092ef jal x5,8000b100 + 80001814: 80001804 .word 0x80001804 + 80001818: 00000000 .word 0x00000000 + 8000181c: 80014d92 .word 0x80014d92 + 80001820: 00000000 .word 0x00000000 + 80001824: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x49c25cac9b91330f + 80001828: 00013c83 ld x25,0(x2) + 8000182c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x8000000000000001 + 80001830: 00013183 ld x3,0(x2) + 80001834: 00810113 addi x2,x2,8 + +0000000080001838 : +Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000001: + aes64ds x29, x25, x3 # perform operation + 80001838: 3a3c8eb3 aes64ds x29,x25,x3 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000001, Zknd_aes64ds_cg_cp_rs2_edges_0x8000000000000001_str) + 8000183c: 00083203 ld x4,0(x16) + 80001840: 01d20c63 beq x4,x29,80001858 + 80001844: 0bd092ef jal x5,8000b100 + 80001848: 80001838 .word 0x80001838 + 8000184c: 00000000 .word 0x00000000 + 80001850: 80014dde .word 0x80014dde + 80001854: 00000000 .word 0x00000000 + 80001858: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x86a4719d415504f4 + 8000185c: 00013403 ld x8,0(x2) + 80001860: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x7fffffffffffffff + 80001864: 00013c03 ld x24,0(x2) + 80001868: 00810113 addi x2,x2,8 + +000000008000186c : +Zknd_aes64ds_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64ds x7, x8, x24 # perform operation + 8000186c: 3b8403b3 aes64ds x7,x8,x24 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cp_rs2_edges_0x7fffffffffffffff, Zknd_aes64ds_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001870: 00083203 ld x4,0(x16) + 80001874: 00720c63 beq x4,x7,8000188c + 80001878: 089092ef jal x5,8000b100 + 8000187c: 8000186c .word 0x8000186c + 80001880: 00000000 .word 0x00000000 + 80001884: 80014e2a .word 0x80014e2a + 80001888: 00000000 .word 0x00000000 + 8000188c: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xbd1eb5c766b378fa + 80001890: 00013e03 ld x28,0(x2) + 80001894: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80001898: 00013503 ld x10,0(x2) + 8000189c: 00810113 addi x2,x2,8 + +00000000800018a0 : +Zknd_aes64ds_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64ds x14, x28, x10 # perform operation + 800018a0: 3aae0733 aes64ds x14,x28,x10 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cp_rs2_edges_0x7ffffffffffffffe, Zknd_aes64ds_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018a4: 00083203 ld x4,0(x16) + 800018a8: 00e20c63 beq x4,x14,800018c0 + 800018ac: 055092ef jal x5,8000b100 + 800018b0: 800018a0 .word 0x800018a0 + 800018b4: 00000000 .word 0x00000000 + 800018b8: 80014e76 .word 0x80014e76 + 800018bc: 00000000 .word 0x00000000 + 800018c0: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x1be4d9c462488abe + 800018c4: 00013d03 ld x26,0(x2) + 800018c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xffffffffffffffff + 800018cc: 00013503 ld x10,0(x2) + 800018d0: 00810113 addi x2,x2,8 + +00000000800018d4 : +Zknd_aes64ds_cg_cp_rs2_edges_0xffffffffffffffff: + aes64ds x19, x26, x10 # perform operation + 800018d4: 3aad09b3 aes64ds x19,x26,x10 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cp_rs2_edges_0xffffffffffffffff, Zknd_aes64ds_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018d8: 00083203 ld x4,0(x16) + 800018dc: 01320c63 beq x4,x19,800018f4 + 800018e0: 021092ef jal x5,8000b100 + 800018e4: 800018d4 .word 0x800018d4 + 800018e8: 00000000 .word 0x00000000 + 800018ec: 80014ec2 .word 0x80014ec2 + 800018f0: 00000000 .word 0x00000000 + 800018f4: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x3c3d693a01395819 + 800018f8: 00013983 ld x19,0(x2) + 800018fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xfffffffffffffffe + 80001900: 00013e03 ld x28,0(x2) + 80001904: 00810113 addi x2,x2,8 + +0000000080001908 : +Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64ds x24, x19, x28 # perform operation + 80001908: 3bc98c33 aes64ds x24,x19,x28 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffffffffffe, Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000190c: 00083203 ld x4,0(x16) + 80001910: 01820c63 beq x4,x24,80001928 + 80001914: 7ec092ef jal x5,8000b100 + 80001918: 80001908 .word 0x80001908 + 8000191c: 00000000 .word 0x00000000 + 80001920: 80014f0e .word 0x80014f0e + 80001924: 00000000 .word 0x00000000 + 80001928: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xf5044a8454070a3e + 8000192c: 00013083 ld x1,0(x2) + 80001930: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80001934: 00013603 ld x12,0(x2) + 80001938: 00810113 addi x2,x2,8 + +000000008000193c : +Zknd_aes64ds_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64ds x21, x1, x12 # perform operation + 8000193c: 3ac08ab3 aes64ds x21,x1,x12 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001940: 00083203 ld x4,0(x16) + 80001944: 01520c63 beq x4,x21,8000195c + 80001948: 7b8092ef jal x5,8000b100 + 8000194c: 8000193c .word 0x8000193c + 80001950: 00000000 .word 0x00000000 + 80001954: 80014f5a .word 0x80014f5a + 80001958: 00000000 .word 0x00000000 + 8000195c: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x2a454d3179b43652 + 80001960: 00013503 ld x10,0(x2) + 80001964: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80001968: 00013483 ld x9,0(x2) + 8000196c: 00810113 addi x2,x2,8 + +0000000080001970 : +Zknd_aes64ds_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64ds x29, x10, x9 # perform operation + 80001970: 3a950eb3 aes64ds x29,x10,x9 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001974: 00083203 ld x4,0(x16) + 80001978: 01d20c63 beq x4,x29,80001990 + 8000197c: 784092ef jal x5,8000b100 + 80001980: 80001970 .word 0x80001970 + 80001984: 00000000 .word 0x00000000 + 80001988: 80014fa6 .word 0x80014fa6 + 8000198c: 00000000 .word 0x00000000 + 80001990: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x115b075d894b51ee + 80001994: 00013703 ld x14,0(x2) + 80001998: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x5555555555555555 + 8000199c: 00013c83 ld x25,0(x2) + 800019a0: 00810113 addi x2,x2,8 + +00000000800019a4 : +Zknd_aes64ds_cg_cp_rs2_edges_0x5555555555555555: + aes64ds x10, x14, x25 # perform operation + 800019a4: 3b970533 aes64ds x10,x14,x25 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cp_rs2_edges_0x5555555555555555, Zknd_aes64ds_cg_cp_rs2_edges_0x5555555555555555_str) + 800019a8: 00083203 ld x4,0(x16) + 800019ac: 00a20c63 beq x4,x10,800019c4 + 800019b0: 750092ef jal x5,8000b100 + 800019b4: 800019a4 .word 0x800019a4 + 800019b8: 00000000 .word 0x00000000 + 800019bc: 80014ff2 .word 0x80014ff2 + 800019c0: 00000000 .word 0x00000000 + 800019c4: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xdbe14711452cbb51 + 800019c8: 00013a83 ld x21,0(x2) + 800019cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x00000000ffffffff + 800019d0: 00013883 ld x17,0(x2) + 800019d4: 00810113 addi x2,x2,8 + +00000000800019d8 : +Zknd_aes64ds_cg_cp_rs2_edges_0xffffffff: + aes64ds x26, x21, x17 # perform operation + 800019d8: 3b1a8d33 aes64ds x26,x21,x17 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cp_rs2_edges_0xffffffff, Zknd_aes64ds_cg_cp_rs2_edges_0xffffffff_str) + 800019dc: 00083203 ld x4,0(x16) + 800019e0: 01a20c63 beq x4,x26,800019f8 + 800019e4: 71c092ef jal x5,8000b100 + 800019e8: 800019d8 .word 0x800019d8 + 800019ec: 00000000 .word 0x00000000 + 800019f0: 8001503e .word 0x8001503e + 800019f4: 00000000 .word 0x00000000 + 800019f8: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xf6ef7e038b5a7c45 + 800019fc: 00013783 ld x15,0(x2) + 80001a00: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x00000000fffffffe + 80001a04: 00013483 ld x9,0(x2) + 80001a08: 00810113 addi x2,x2,8 + +0000000080001a0c : +Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffe: + aes64ds x14, x15, x9 # perform operation + 80001a0c: 3a978733 aes64ds x14,x15,x9 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffe, Zknd_aes64ds_cg_cp_rs2_edges_0xfffffffe_str) + 80001a10: 00083203 ld x4,0(x16) + 80001a14: 00e20c63 beq x4,x14,80001a2c + 80001a18: 6e8092ef jal x5,8000b100 + 80001a1c: 80001a0c .word 0x80001a0c + 80001a20: 00000000 .word 0x00000000 + 80001a24: 80015082 .word 0x80015082 + 80001a28: 00000000 .word 0x00000000 + 80001a2c: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x5b4eedfdf5ec6d53 + 80001a30: 00013d03 ld x26,0(x2) + 80001a34: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x0000000100000000 + 80001a38: 00013c03 ld x24,0(x2) + 80001a3c: 00810113 addi x2,x2,8 + +0000000080001a40 : +Zknd_aes64ds_cg_cp_rs2_edges_0x100000000: + aes64ds x20, x26, x24 # perform operation + 80001a40: 3b8d0a33 aes64ds x20,x26,x24 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cp_rs2_edges_0x100000000, Zknd_aes64ds_cg_cp_rs2_edges_0x100000000_str) + 80001a44: 00083203 ld x4,0(x16) + 80001a48: 01420c63 beq x4,x20,80001a60 + 80001a4c: 6b4092ef jal x5,8000b100 + 80001a50: 80001a40 .word 0x80001a40 + 80001a54: 00000000 .word 0x00000000 + 80001a58: 800150c6 .word 0x800150c6 + 80001a5c: 00000000 .word 0x00000000 + 80001a60: 00880813 addi x16,x16,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x752a879e6b39ee44 + 80001a64: 00013683 ld x13,0(x2) + 80001a68: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x0000000100000001 + 80001a6c: 00013403 ld x8,0(x2) + 80001a70: 00810113 addi x2,x2,8 + +0000000080001a74 : +Zknd_aes64ds_cg_cp_rs2_edges_0x100000001: + aes64ds x24, x13, x8 # perform operation + 80001a74: 3a868c33 aes64ds x24,x13,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cp_rs2_edges_0x100000001, Zknd_aes64ds_cg_cp_rs2_edges_0x100000001_str) + 80001a78: 00083203 ld x4,0(x16) + 80001a7c: 01820c63 beq x4,x24,80001a94 + 80001a80: 680092ef jal x5,8000b100 + 80001a84: 80001a74 .word 0x80001a74 + 80001a88: 00000000 .word 0x00000000 + 80001a8c: 8001510b .word 0x8001510b + 80001a90: 00000000 .word 0x00000000 + 80001a94: 00880813 addi x16,x16,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000000 + 80001a98: 00013483 ld x9,0(x2) + 80001a9c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x0000000000000000 + 80001aa0: 00013a03 ld x20,0(x2) + 80001aa4: 00810113 addi x2,x2,8 + +0000000080001aa8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64ds x27, x9, x20 # perform operation + 80001aa8: 3b448db3 aes64ds x27,x9,x20 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001aac: 00083203 ld x4,0(x16) + 80001ab0: 01b20c63 beq x4,x27,80001ac8 + 80001ab4: 64c092ef jal x5,8000b100 + 80001ab8: 80001aa8 .word 0x80001aa8 + 80001abc: 00000000 .word 0x00000000 + 80001ac0: 80015150 .word 0x80015150 + 80001ac4: 00000000 .word 0x00000000 + 80001ac8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x0000000000000000 + 80001acc: 00013f03 ld x30,0(x2) + 80001ad0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x0000000000000001 + 80001ad4: 00013c03 ld x24,0(x2) + 80001ad8: 00810113 addi x2,x2,8 + +0000000080001adc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64ds x25, x30, x24 # perform operation + 80001adc: 3b8f0cb3 aes64ds x25,x30,x24 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae0: 00083203 ld x4,0(x16) + 80001ae4: 01920c63 beq x4,x25,80001afc + 80001ae8: 618092ef jal x5,8000b100 + 80001aec: 80001adc .word 0x80001adc + 80001af0: 00000000 .word 0x00000000 + 80001af4: 800151a4 .word 0x800151a4 + 80001af8: 00000000 .word 0x00000000 + 80001afc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x0000000000000000 + 80001b00: 00013903 ld x18,0(x2) + 80001b04: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x0000000000000002 + 80001b08: 00013603 ld x12,0(x2) + 80001b0c: 00810113 addi x2,x2,8 + +0000000080001b10 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64ds x28, x18, x12 # perform operation + 80001b10: 3ac90e33 aes64ds x28,x18,x12 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b14: 00083203 ld x4,0(x16) + 80001b18: 01c20c63 beq x4,x28,80001b30 + 80001b1c: 5e4092ef jal x5,8000b100 + 80001b20: 80001b10 .word 0x80001b10 + 80001b24: 00000000 .word 0x00000000 + 80001b28: 800151f8 .word 0x800151f8 + 80001b2c: 00000000 .word 0x00000000 + 80001b30: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0000000000000000 + 80001b34: 00013b03 ld x22,0(x2) + 80001b38: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x8000000000000000 + 80001b3c: 00013583 ld x11,0(x2) + 80001b40: 00810113 addi x2,x2,8 + +0000000080001b44 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64ds x13, x22, x11 # perform operation + 80001b44: 3abb06b3 aes64ds x13,x22,x11 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b48: 00083203 ld x4,0(x16) + 80001b4c: 00d20c63 beq x4,x13,80001b64 + 80001b50: 5b0092ef jal x5,8000b100 + 80001b54: 80001b44 .word 0x80001b44 + 80001b58: 00000000 .word 0x00000000 + 80001b5c: 8001524c .word 0x8001524c + 80001b60: 00000000 .word 0x00000000 + 80001b64: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000000 + 80001b68: 00013483 ld x9,0(x2) + 80001b6c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x8000000000000001 + 80001b70: 00013683 ld x13,0(x2) + 80001b74: 00810113 addi x2,x2,8 + +0000000080001b78 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64ds x22, x9, x13 # perform operation + 80001b78: 3ad48b33 aes64ds x22,x9,x13 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b7c: 00083203 ld x4,0(x16) + 80001b80: 01620c63 beq x4,x22,80001b98 + 80001b84: 57c092ef jal x5,8000b100 + 80001b88: 80001b78 .word 0x80001b78 + 80001b8c: 00000000 .word 0x00000000 + 80001b90: 800152af .word 0x800152af + 80001b94: 00000000 .word 0x00000000 + 80001b98: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x0000000000000000 + 80001b9c: 00013e03 ld x28,0(x2) + 80001ba0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x7fffffffffffffff + 80001ba4: 00013b03 ld x22,0(x2) + 80001ba8: 00810113 addi x2,x2,8 + +0000000080001bac : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64ds x29, x28, x22 # perform operation + 80001bac: 3b6e0eb3 aes64ds x29,x28,x22 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb0: 00083203 ld x4,0(x16) + 80001bb4: 01d20c63 beq x4,x29,80001bcc + 80001bb8: 548092ef jal x5,8000b100 + 80001bbc: 80001bac .word 0x80001bac + 80001bc0: 00000000 .word 0x00000000 + 80001bc4: 80015312 .word 0x80015312 + 80001bc8: 00000000 .word 0x00000000 + 80001bcc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x0000000000000000 + 80001bd0: 00013c83 ld x25,0(x2) + 80001bd4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80001bd8: 00013e83 ld x29,0(x2) + 80001bdc: 00810113 addi x2,x2,8 + +0000000080001be0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64ds x6, x25, x29 # perform operation + 80001be0: 3bdc8333 aes64ds x6,x25,x29 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001be4: 00083203 ld x4,0(x16) + 80001be8: 00620c63 beq x4,x6,80001c00 + 80001bec: 514092ef jal x5,8000b100 + 80001bf0: 80001be0 .word 0x80001be0 + 80001bf4: 00000000 .word 0x00000000 + 80001bf8: 80015375 .word 0x80015375 + 80001bfc: 00000000 .word 0x00000000 + 80001c00: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x0000000000000000 + 80001c04: 00013883 ld x17,0(x2) + 80001c08: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xffffffffffffffff + 80001c0c: 00013383 ld x7,0(x2) + 80001c10: 00810113 addi x2,x2,8 + +0000000080001c14 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64ds x6, x17, x7 # perform operation + 80001c14: 3a788333 aes64ds x6,x17,x7 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c18: 00083203 ld x4,0(x16) + 80001c1c: 00620c63 beq x4,x6,80001c34 + 80001c20: 4e0092ef jal x5,8000b100 + 80001c24: 80001c14 .word 0x80001c14 + 80001c28: 00000000 .word 0x00000000 + 80001c2c: 800153d8 .word 0x800153d8 + 80001c30: 00000000 .word 0x00000000 + 80001c34: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x0000000000000000 + 80001c38: 00013d03 ld x26,0(x2) + 80001c3c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xfffffffffffffffe + 80001c40: 00013183 ld x3,0(x2) + 80001c44: 00810113 addi x2,x2,8 + +0000000080001c48 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64ds x30, x26, x3 # perform operation + 80001c48: 3a3d0f33 aes64ds x30,x26,x3 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c4c: 00083203 ld x4,0(x16) + 80001c50: 01e20c63 beq x4,x30,80001c68 + 80001c54: 4ac092ef jal x5,8000b100 + 80001c58: 80001c48 .word 0x80001c48 + 80001c5c: 00000000 .word 0x00000000 + 80001c60: 8001543b .word 0x8001543b + 80001c64: 00000000 .word 0x00000000 + 80001c68: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000000000000 + 80001c6c: 00013503 ld x10,0(x2) + 80001c70: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80001c74: 00013983 ld x19,0(x2) + 80001c78: 00810113 addi x2,x2,8 + +0000000080001c7c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64ds x21, x10, x19 # perform operation + 80001c7c: 3b350ab3 aes64ds x21,x10,x19 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c80: 00083203 ld x4,0(x16) + 80001c84: 01520c63 beq x4,x21,80001c9c + 80001c88: 478092ef jal x5,8000b100 + 80001c8c: 80001c7c .word 0x80001c7c + 80001c90: 00000000 .word 0x00000000 + 80001c94: 8001549e .word 0x8001549e + 80001c98: 00000000 .word 0x00000000 + 80001c9c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000000000000 + 80001ca0: 00013603 ld x12,0(x2) + 80001ca4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80001ca8: 00013e83 ld x29,0(x2) + 80001cac: 00810113 addi x2,x2,8 + +0000000080001cb0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x27, x12, x29 # perform operation + 80001cb0: 3bd60db3 aes64ds x27,x12,x29 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cb4: 00083203 ld x4,0(x16) + 80001cb8: 01b20c63 beq x4,x27,80001cd0 + 80001cbc: 444092ef jal x5,8000b100 + 80001cc0: 80001cb0 .word 0x80001cb0 + 80001cc4: 00000000 .word 0x00000000 + 80001cc8: 80015501 .word 0x80015501 + 80001ccc: 00000000 .word 0x00000000 + 80001cd0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000000000000 + 80001cd4: 00013683 ld x13,0(x2) + 80001cd8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x5555555555555555 + 80001cdc: 00013503 ld x10,0(x2) + 80001ce0: 00810113 addi x2,x2,8 + +0000000080001ce4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64ds x14, x13, x10 # perform operation + 80001ce4: 3aa68733 aes64ds x14,x13,x10 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001ce8: 00083203 ld x4,0(x16) + 80001cec: 00e20c63 beq x4,x14,80001d04 + 80001cf0: 410092ef jal x5,8000b100 + 80001cf4: 80001ce4 .word 0x80001ce4 + 80001cf8: 00000000 .word 0x00000000 + 80001cfc: 80015564 .word 0x80015564 + 80001d00: 00000000 .word 0x00000000 + 80001d04: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x0000000000000000 + 80001d08: 00013b83 ld x23,0(x2) + 80001d0c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x00000000ffffffff + 80001d10: 00013d03 ld x26,0(x2) + 80001d14: 00810113 addi x2,x2,8 + +0000000080001d18 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64ds x11, x23, x26 # perform operation + 80001d18: 3bab85b3 aes64ds x11,x23,x26 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d1c: 00083203 ld x4,0(x16) + 80001d20: 00b20c63 beq x4,x11,80001d38 + 80001d24: 3dc092ef jal x5,8000b100 + 80001d28: 80001d18 .word 0x80001d18 + 80001d2c: 00000000 .word 0x00000000 + 80001d30: 800155c7 .word 0x800155c7 + 80001d34: 00000000 .word 0x00000000 + 80001d38: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000000000000 + 80001d3c: 00013603 ld x12,0(x2) + 80001d40: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d44: 00013b03 ld x22,0(x2) + 80001d48: 00810113 addi x2,x2,8 + +0000000080001d4c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64ds x10, x12, x22 # perform operation + 80001d4c: 3b660533 aes64ds x10,x12,x22 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d50: 00083203 ld x4,0(x16) + 80001d54: 00a20c63 beq x4,x10,80001d6c + 80001d58: 3a8092ef jal x5,8000b100 + 80001d5c: 80001d4c .word 0x80001d4c + 80001d60: 00000000 .word 0x00000000 + 80001d64: 80015622 .word 0x80015622 + 80001d68: 00000000 .word 0x00000000 + 80001d6c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000000000000 + 80001d70: 00013603 ld x12,0(x2) + 80001d74: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x0000000100000000 + 80001d78: 00013f03 ld x30,0(x2) + 80001d7c: 00810113 addi x2,x2,8 + +0000000080001d80 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64ds x25, x12, x30 # perform operation + 80001d80: 3be60cb3 aes64ds x25,x12,x30 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d84: 00083203 ld x4,0(x16) + 80001d88: 01920c63 beq x4,x25,80001da0 + 80001d8c: 374092ef jal x5,8000b100 + 80001d90: 80001d80 .word 0x80001d80 + 80001d94: 00000000 .word 0x00000000 + 80001d98: 8001567d .word 0x8001567d + 80001d9c: 00000000 .word 0x00000000 + 80001da0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0000000000000000 + 80001da4: 00013d83 ld x27,0(x2) + 80001da8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0000000100000001 + 80001dac: 00013083 ld x1,0(x2) + 80001db0: 00810113 addi x2,x2,8 + +0000000080001db4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64ds x21, x27, x1 # perform operation + 80001db4: 3a1d8ab3 aes64ds x21,x27,x1 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001db8: 00083203 ld x4,0(x16) + 80001dbc: 01520c63 beq x4,x21,80001dd4 + 80001dc0: 340092ef jal x5,8000b100 + 80001dc4: 80001db4 .word 0x80001db4 + 80001dc8: 00000000 .word 0x00000000 + 80001dcc: 800156d9 .word 0x800156d9 + 80001dd0: 00000000 .word 0x00000000 + 80001dd4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000001 + 80001dd8: 00013483 ld x9,0(x2) + 80001ddc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x0000000000000000 + 80001de0: 00013503 ld x10,0(x2) + 80001de4: 00810113 addi x2,x2,8 + +0000000080001de8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64ds x1, x9, x10 # perform operation + 80001de8: 3aa480b3 aes64ds x1,x9,x10 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dec: 00083203 ld x4,0(x16) + 80001df0: 00120c63 beq x4,x1,80001e08 + 80001df4: 30c092ef jal x5,8000b100 + 80001df8: 80001de8 .word 0x80001de8 + 80001dfc: 00000000 .word 0x00000000 + 80001e00: 80015735 .word 0x80015735 + 80001e04: 00000000 .word 0x00000000 + 80001e08: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x0000000000000001 + 80001e0c: 00013183 ld x3,0(x2) + 80001e10: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x0000000000000001 + 80001e14: 00013f83 ld x31,0(x2) + 80001e18: 00810113 addi x2,x2,8 + +0000000080001e1c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64ds x23, x3, x31 # perform operation + 80001e1c: 3bf18bb3 aes64ds x23,x3,x31 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e20: 00083203 ld x4,0(x16) + 80001e24: 01720c63 beq x4,x23,80001e3c + 80001e28: 2d8092ef jal x5,8000b100 + 80001e2c: 80001e1c .word 0x80001e1c + 80001e30: 00000000 .word 0x00000000 + 80001e34: 80015789 .word 0x80015789 + 80001e38: 00000000 .word 0x00000000 + 80001e3c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0000000000000001 + 80001e40: 00013d83 ld x27,0(x2) + 80001e44: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000000000002 + 80001e48: 00013383 ld x7,0(x2) + 80001e4c: 00810113 addi x2,x2,8 + +0000000080001e50 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64ds x24, x27, x7 # perform operation + 80001e50: 3a7d8c33 aes64ds x24,x27,x7 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e54: 00083203 ld x4,0(x16) + 80001e58: 01820c63 beq x4,x24,80001e70 + 80001e5c: 2a4092ef jal x5,8000b100 + 80001e60: 80001e50 .word 0x80001e50 + 80001e64: 00000000 .word 0x00000000 + 80001e68: 800157dd .word 0x800157dd + 80001e6c: 00000000 .word 0x00000000 + 80001e70: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x0000000000000001 + 80001e74: 00013303 ld x6,0(x2) + 80001e78: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x8000000000000000 + 80001e7c: 00013b83 ld x23,0(x2) + 80001e80: 00810113 addi x2,x2,8 + +0000000080001e84 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64ds x9, x6, x23 # perform operation + 80001e84: 3b7304b3 aes64ds x9,x6,x23 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e88: 00083203 ld x4,0(x16) + 80001e8c: 00920c63 beq x4,x9,80001ea4 + 80001e90: 270092ef jal x5,8000b100 + 80001e94: 80001e84 .word 0x80001e84 + 80001e98: 00000000 .word 0x00000000 + 80001e9c: 80015831 .word 0x80015831 + 80001ea0: 00000000 .word 0x00000000 + 80001ea4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x0000000000000001 + 80001ea8: 00013c83 ld x25,0(x2) + 80001eac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x8000000000000001 + 80001eb0: 00013d03 ld x26,0(x2) + 80001eb4: 00810113 addi x2,x2,8 + +0000000080001eb8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64ds x27, x25, x26 # perform operation + 80001eb8: 3bac8db3 aes64ds x27,x25,x26 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ebc: 00083203 ld x4,0(x16) + 80001ec0: 01b20c63 beq x4,x27,80001ed8 + 80001ec4: 23c092ef jal x5,8000b100 + 80001ec8: 80001eb8 .word 0x80001eb8 + 80001ecc: 00000000 .word 0x00000000 + 80001ed0: 80015894 .word 0x80015894 + 80001ed4: 00000000 .word 0x00000000 + 80001ed8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x0000000000000001 + 80001edc: 00013883 ld x17,0(x2) + 80001ee0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x7fffffffffffffff + 80001ee4: 00013b83 ld x23,0(x2) + 80001ee8: 00810113 addi x2,x2,8 + +0000000080001eec : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64ds x31, x17, x23 # perform operation + 80001eec: 3b788fb3 aes64ds x31,x17,x23 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef0: 00083203 ld x4,0(x16) + 80001ef4: 01f20c63 beq x4,x31,80001f0c + 80001ef8: 208092ef jal x5,8000b100 + 80001efc: 80001eec .word 0x80001eec + 80001f00: 00000000 .word 0x00000000 + 80001f04: 800158f7 .word 0x800158f7 + 80001f08: 00000000 .word 0x00000000 + 80001f0c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000000000001 + 80001f10: 00013683 ld x13,0(x2) + 80001f14: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x7ffffffffffffffe + 80001f18: 00013f83 ld x31,0(x2) + 80001f1c: 00810113 addi x2,x2,8 + +0000000080001f20 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64ds x3, x13, x31 # perform operation + 80001f20: 3bf681b3 aes64ds x3,x13,x31 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f24: 00083203 ld x4,0(x16) + 80001f28: 00320c63 beq x4,x3,80001f40 + 80001f2c: 1d4092ef jal x5,8000b100 + 80001f30: 80001f20 .word 0x80001f20 + 80001f34: 00000000 .word 0x00000000 + 80001f38: 8001595a .word 0x8001595a + 80001f3c: 00000000 .word 0x00000000 + 80001f40: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x0000000000000001 + 80001f44: 00013e83 ld x29,0(x2) + 80001f48: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xffffffffffffffff + 80001f4c: 00013f03 ld x30,0(x2) + 80001f50: 00810113 addi x2,x2,8 + +0000000080001f54 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64ds x25, x29, x30 # perform operation + 80001f54: 3bee8cb3 aes64ds x25,x29,x30 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f58: 00083203 ld x4,0(x16) + 80001f5c: 01920c63 beq x4,x25,80001f74 + 80001f60: 1a0092ef jal x5,8000b100 + 80001f64: 80001f54 .word 0x80001f54 + 80001f68: 00000000 .word 0x00000000 + 80001f6c: 800159bd .word 0x800159bd + 80001f70: 00000000 .word 0x00000000 + 80001f74: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x0000000000000001 + 80001f78: 00013883 ld x17,0(x2) + 80001f7c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xfffffffffffffffe + 80001f80: 00013383 ld x7,0(x2) + 80001f84: 00810113 addi x2,x2,8 + +0000000080001f88 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64ds x30, x17, x7 # perform operation + 80001f88: 3a788f33 aes64ds x30,x17,x7 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f8c: 00083203 ld x4,0(x16) + 80001f90: 01e20c63 beq x4,x30,80001fa8 + 80001f94: 16c092ef jal x5,8000b100 + 80001f98: 80001f88 .word 0x80001f88 + 80001f9c: 00000000 .word 0x00000000 + 80001fa0: 80015a20 .word 0x80015a20 + 80001fa4: 00000000 .word 0x00000000 + 80001fa8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000000000001 + 80001fac: 00013683 ld x13,0(x2) + 80001fb0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x5bbc887763ae86f2 + 80001fb4: 00013b03 ld x22,0(x2) + 80001fb8: 00810113 addi x2,x2,8 + +0000000080001fbc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64ds x30, x13, x22 # perform operation + 80001fbc: 3b668f33 aes64ds x30,x13,x22 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc0: 00083203 ld x4,0(x16) + 80001fc4: 01e20c63 beq x4,x30,80001fdc + 80001fc8: 138092ef jal x5,8000b100 + 80001fcc: 80001fbc .word 0x80001fbc + 80001fd0: 00000000 .word 0x00000000 + 80001fd4: 80015a83 .word 0x80015a83 + 80001fd8: 00000000 .word 0x00000000 + 80001fdc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x0000000000000001 + 80001fe0: 00013983 ld x19,0(x2) + 80001fe4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80001fe8: 00013603 ld x12,0(x2) + 80001fec: 00810113 addi x2,x2,8 + +0000000080001ff0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x20, x19, x12 # perform operation + 80001ff0: 3ac98a33 aes64ds x20,x19,x12 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ff4: 00083203 ld x4,0(x16) + 80001ff8: 01420c63 beq x4,x20,80002010 + 80001ffc: 104092ef jal x5,8000b100 + 80002000: 80001ff0 .word 0x80001ff0 + 80002004: 00000000 .word 0x00000000 + 80002008: 80015ae6 .word 0x80015ae6 + 8000200c: 00000000 .word 0x00000000 + 80002010: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000001 + 80002014: 00013483 ld x9,0(x2) + 80002018: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x5555555555555555 + 8000201c: 00013503 ld x10,0(x2) + 80002020: 00810113 addi x2,x2,8 + +0000000080002024 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64ds x13, x9, x10 # perform operation + 80002024: 3aa486b3 aes64ds x13,x9,x10 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002028: 00083203 ld x4,0(x16) + 8000202c: 00d20c63 beq x4,x13,80002044 + 80002030: 0d0092ef jal x5,8000b100 + 80002034: 80002024 .word 0x80002024 + 80002038: 00000000 .word 0x00000000 + 8000203c: 80015b49 .word 0x80015b49 + 80002040: 00000000 .word 0x00000000 + 80002044: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x0000000000000001 + 80002048: 00013c03 ld x24,0(x2) + 8000204c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x00000000ffffffff + 80002050: 00013d83 ld x27,0(x2) + 80002054: 00810113 addi x2,x2,8 + +0000000080002058 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64ds x7, x24, x27 # perform operation + 80002058: 3bbc03b3 aes64ds x7,x24,x27 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000205c: 00083203 ld x4,0(x16) + 80002060: 00720c63 beq x4,x7,80002078 + 80002064: 09c092ef jal x5,8000b100 + 80002068: 80002058 .word 0x80002058 + 8000206c: 00000000 .word 0x00000000 + 80002070: 80015bac .word 0x80015bac + 80002074: 00000000 .word 0x00000000 + 80002078: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000000000001 + 8000207c: 00013683 ld x13,0(x2) + 80002080: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x00000000fffffffe + 80002084: 00013483 ld x9,0(x2) + 80002088: 00810113 addi x2,x2,8 + +000000008000208c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64ds x6, x13, x9 # perform operation + 8000208c: 3a968333 aes64ds x6,x13,x9 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002090: 00083203 ld x4,0(x16) + 80002094: 00620c63 beq x4,x6,800020ac + 80002098: 068092ef jal x5,8000b100 + 8000209c: 8000208c .word 0x8000208c + 800020a0: 00000000 .word 0x00000000 + 800020a4: 80015c07 .word 0x80015c07 + 800020a8: 00000000 .word 0x00000000 + 800020ac: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000000000001 + 800020b0: 00013503 ld x10,0(x2) + 800020b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0000000100000000 + 800020b8: 00013903 ld x18,0(x2) + 800020bc: 00810113 addi x2,x2,8 + +00000000800020c0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64ds x27, x10, x18 # perform operation + 800020c0: 3b250db3 aes64ds x27,x10,x18 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020c4: 00083203 ld x4,0(x16) + 800020c8: 01b20c63 beq x4,x27,800020e0 + 800020cc: 034092ef jal x5,8000b100 + 800020d0: 800020c0 .word 0x800020c0 + 800020d4: 00000000 .word 0x00000000 + 800020d8: 80015c62 .word 0x80015c62 + 800020dc: 00000000 .word 0x00000000 + 800020e0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x0000000000000001 + 800020e4: 00013183 ld x3,0(x2) + 800020e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x0000000100000001 + 800020ec: 00013783 ld x15,0(x2) + 800020f0: 00810113 addi x2,x2,8 + +00000000800020f4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64ds x20, x3, x15 # perform operation + 800020f4: 3af18a33 aes64ds x20,x3,x15 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020f8: 00083203 ld x4,0(x16) + 800020fc: 01420c63 beq x4,x20,80002114 + 80002100: 000092ef jal x5,8000b100 + 80002104: 800020f4 .word 0x800020f4 + 80002108: 00000000 .word 0x00000000 + 8000210c: 80015cbe .word 0x80015cbe + 80002110: 00000000 .word 0x00000000 + 80002114: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000002 + 80002118: 00013483 ld x9,0(x2) + 8000211c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x0000000000000000 + 80002120: 00013f03 ld x30,0(x2) + 80002124: 00810113 addi x2,x2,8 + +0000000080002128 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64ds x24, x9, x30 # perform operation + 80002128: 3be48c33 aes64ds x24,x9,x30 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000212c: 00083203 ld x4,0(x16) + 80002130: 01820c63 beq x4,x24,80002148 + 80002134: 7cd082ef jal x5,8000b100 + 80002138: 80002128 .word 0x80002128 + 8000213c: 00000000 .word 0x00000000 + 80002140: 80015d1a .word 0x80015d1a + 80002144: 00000000 .word 0x00000000 + 80002148: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x0000000000000002 + 8000214c: 00013b83 ld x23,0(x2) + 80002150: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0000000000000001 + 80002154: 00013083 ld x1,0(x2) + 80002158: 00810113 addi x2,x2,8 + +000000008000215c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64ds x14, x23, x1 # perform operation + 8000215c: 3a1b8733 aes64ds x14,x23,x1 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002160: 00083203 ld x4,0(x16) + 80002164: 00e20c63 beq x4,x14,8000217c + 80002168: 799082ef jal x5,8000b100 + 8000216c: 8000215c .word 0x8000215c + 80002170: 00000000 .word 0x00000000 + 80002174: 80015d6e .word 0x80015d6e + 80002178: 00000000 .word 0x00000000 + 8000217c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x0000000000000002 + 80002180: 00013303 ld x6,0(x2) + 80002184: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x0000000000000002 + 80002188: 00013e83 ld x29,0(x2) + 8000218c: 00810113 addi x2,x2,8 + +0000000080002190 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64ds x26, x6, x29 # perform operation + 80002190: 3bd30d33 aes64ds x26,x6,x29 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002194: 00083203 ld x4,0(x16) + 80002198: 01a20c63 beq x4,x26,800021b0 + 8000219c: 765082ef jal x5,8000b100 + 800021a0: 80002190 .word 0x80002190 + 800021a4: 00000000 .word 0x00000000 + 800021a8: 80015dc2 .word 0x80015dc2 + 800021ac: 00000000 .word 0x00000000 + 800021b0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0000000000000002 + 800021b4: 00013783 ld x15,0(x2) + 800021b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x8000000000000000 + 800021bc: 00013683 ld x13,0(x2) + 800021c0: 00810113 addi x2,x2,8 + +00000000800021c4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64ds x17, x15, x13 # perform operation + 800021c4: 3ad788b3 aes64ds x17,x15,x13 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021c8: 00083203 ld x4,0(x16) + 800021cc: 01120c63 beq x4,x17,800021e4 + 800021d0: 731082ef jal x5,8000b100 + 800021d4: 800021c4 .word 0x800021c4 + 800021d8: 00000000 .word 0x00000000 + 800021dc: 80015e16 .word 0x80015e16 + 800021e0: 00000000 .word 0x00000000 + 800021e4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x0000000000000002 + 800021e8: 00013703 ld x14,0(x2) + 800021ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x8000000000000001 + 800021f0: 00013403 ld x8,0(x2) + 800021f4: 00810113 addi x2,x2,8 + +00000000800021f8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64ds x24, x14, x8 # perform operation + 800021f8: 3a870c33 aes64ds x24,x14,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 800021fc: 00083203 ld x4,0(x16) + 80002200: 01820c63 beq x4,x24,80002218 + 80002204: 6fd082ef jal x5,8000b100 + 80002208: 800021f8 .word 0x800021f8 + 8000220c: 00000000 .word 0x00000000 + 80002210: 80015e79 .word 0x80015e79 + 80002214: 00000000 .word 0x00000000 + 80002218: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000000000002 + 8000221c: 00013f83 ld x31,0(x2) + 80002220: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x7fffffffffffffff + 80002224: 00013e83 ld x29,0(x2) + 80002228: 00810113 addi x2,x2,8 + +000000008000222c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64ds x11, x31, x29 # perform operation + 8000222c: 3bdf85b3 aes64ds x11,x31,x29 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002230: 00083203 ld x4,0(x16) + 80002234: 00b20c63 beq x4,x11,8000224c + 80002238: 6c9082ef jal x5,8000b100 + 8000223c: 8000222c .word 0x8000222c + 80002240: 00000000 .word 0x00000000 + 80002244: 80015edc .word 0x80015edc + 80002248: 00000000 .word 0x00000000 + 8000224c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x0000000000000002 + 80002250: 00013703 ld x14,0(x2) + 80002254: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x7ffffffffffffffe + 80002258: 00013e03 ld x28,0(x2) + 8000225c: 00810113 addi x2,x2,8 + +0000000080002260 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64ds x15, x14, x28 # perform operation + 80002260: 3bc707b3 aes64ds x15,x14,x28 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002264: 00083203 ld x4,0(x16) + 80002268: 00f20c63 beq x4,x15,80002280 + 8000226c: 695082ef jal x5,8000b100 + 80002270: 80002260 .word 0x80002260 + 80002274: 00000000 .word 0x00000000 + 80002278: 80015f3f .word 0x80015f3f + 8000227c: 00000000 .word 0x00000000 + 80002280: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x0000000000000002 + 80002284: 00013d03 ld x26,0(x2) + 80002288: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xffffffffffffffff + 8000228c: 00013583 ld x11,0(x2) + 80002290: 00810113 addi x2,x2,8 + +0000000080002294 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64ds x7, x26, x11 # perform operation + 80002294: 3abd03b3 aes64ds x7,x26,x11 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 80002298: 00083203 ld x4,0(x16) + 8000229c: 00720c63 beq x4,x7,800022b4 + 800022a0: 661082ef jal x5,8000b100 + 800022a4: 80002294 .word 0x80002294 + 800022a8: 00000000 .word 0x00000000 + 800022ac: 80015fa2 .word 0x80015fa2 + 800022b0: 00000000 .word 0x00000000 + 800022b4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0000000000000002 + 800022b8: 00013583 ld x11,0(x2) + 800022bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xfffffffffffffffe + 800022c0: 00013783 ld x15,0(x2) + 800022c4: 00810113 addi x2,x2,8 + +00000000800022c8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64ds x21, x11, x15 # perform operation + 800022c8: 3af58ab3 aes64ds x21,x11,x15 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022cc: 00083203 ld x4,0(x16) + 800022d0: 01520c63 beq x4,x21,800022e8 + 800022d4: 62d082ef jal x5,8000b100 + 800022d8: 800022c8 .word 0x800022c8 + 800022dc: 00000000 .word 0x00000000 + 800022e0: 80016005 .word 0x80016005 + 800022e4: 00000000 .word 0x00000000 + 800022e8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000002 + 800022ec: 00013483 ld x9,0(x2) + 800022f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 800022f4: 00013883 ld x17,0(x2) + 800022f8: 00810113 addi x2,x2,8 + +00000000800022fc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64ds x15, x9, x17 # perform operation + 800022fc: 3b1487b3 aes64ds x15,x9,x17 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002300: 00083203 ld x4,0(x16) + 80002304: 00f20c63 beq x4,x15,8000231c + 80002308: 5f9082ef jal x5,8000b100 + 8000230c: 800022fc .word 0x800022fc + 80002310: 00000000 .word 0x00000000 + 80002314: 80016068 .word 0x80016068 + 80002318: 00000000 .word 0x00000000 + 8000231c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x0000000000000002 + 80002320: 00013483 ld x9,0(x2) + 80002324: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80002328: 00013703 ld x14,0(x2) + 8000232c: 00810113 addi x2,x2,8 + +0000000080002330 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x19, x9, x14 # perform operation + 80002330: 3ae489b3 aes64ds x19,x9,x14 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002334: 00083203 ld x4,0(x16) + 80002338: 01320c63 beq x4,x19,80002350 + 8000233c: 5c5082ef jal x5,8000b100 + 80002340: 80002330 .word 0x80002330 + 80002344: 00000000 .word 0x00000000 + 80002348: 800160cb .word 0x800160cb + 8000234c: 00000000 .word 0x00000000 + 80002350: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0000000000000002 + 80002354: 00013583 ld x11,0(x2) + 80002358: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5555555555555555 + 8000235c: 00013983 ld x19,0(x2) + 80002360: 00810113 addi x2,x2,8 + +0000000080002364 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64ds x13, x11, x19 # perform operation + 80002364: 3b3586b3 aes64ds x13,x11,x19 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002368: 00083203 ld x4,0(x16) + 8000236c: 00d20c63 beq x4,x13,80002384 + 80002370: 591082ef jal x5,8000b100 + 80002374: 80002364 .word 0x80002364 + 80002378: 00000000 .word 0x00000000 + 8000237c: 8001612e .word 0x8001612e + 80002380: 00000000 .word 0x00000000 + 80002384: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000000000002 + 80002388: 00013f83 ld x31,0(x2) + 8000238c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000ffffffff + 80002390: 00013b03 ld x22,0(x2) + 80002394: 00810113 addi x2,x2,8 + +0000000080002398 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64ds x28, x31, x22 # perform operation + 80002398: 3b6f8e33 aes64ds x28,x31,x22 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 8000239c: 00083203 ld x4,0(x16) + 800023a0: 01c20c63 beq x4,x28,800023b8 + 800023a4: 55d082ef jal x5,8000b100 + 800023a8: 80002398 .word 0x80002398 + 800023ac: 00000000 .word 0x00000000 + 800023b0: 80016191 .word 0x80016191 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x0000000000000002 + 800023bc: 00013983 ld x19,0(x2) + 800023c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x00000000fffffffe + 800023c4: 00013b83 ld x23,0(x2) + 800023c8: 00810113 addi x2,x2,8 + +00000000800023cc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64ds x10, x19, x23 # perform operation + 800023cc: 3b798533 aes64ds x10,x19,x23 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d0: 00083203 ld x4,0(x16) + 800023d4: 00a20c63 beq x4,x10,800023ec + 800023d8: 529082ef jal x5,8000b100 + 800023dc: 800023cc .word 0x800023cc + 800023e0: 00000000 .word 0x00000000 + 800023e4: 800161ec .word 0x800161ec + 800023e8: 00000000 .word 0x00000000 + 800023ec: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x0000000000000002 + 800023f0: 00013383 ld x7,0(x2) + 800023f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0000000100000000 + 800023f8: 00013d03 ld x26,0(x2) + 800023fc: 00810113 addi x2,x2,8 + +0000000080002400 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64ds x21, x7, x26 # perform operation + 80002400: 3ba38ab3 aes64ds x21,x7,x26 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002404: 00083203 ld x4,0(x16) + 80002408: 01520c63 beq x4,x21,80002420 + 8000240c: 4f5082ef jal x5,8000b100 + 80002410: 80002400 .word 0x80002400 + 80002414: 00000000 .word 0x00000000 + 80002418: 80016247 .word 0x80016247 + 8000241c: 00000000 .word 0x00000000 + 80002420: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x0000000000000002 + 80002424: 00013703 ld x14,0(x2) + 80002428: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x0000000100000001 + 8000242c: 00013683 ld x13,0(x2) + 80002430: 00810113 addi x2,x2,8 + +0000000080002434 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64ds x25, x14, x13 # perform operation + 80002434: 3ad70cb3 aes64ds x25,x14,x13 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002438: 00083203 ld x4,0(x16) + 8000243c: 01920c63 beq x4,x25,80002454 + 80002440: 4c1082ef jal x5,8000b100 + 80002444: 80002434 .word 0x80002434 + 80002448: 00000000 .word 0x00000000 + 8000244c: 800162a3 .word 0x800162a3 + 80002450: 00000000 .word 0x00000000 + 80002454: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x8000000000000000 + 80002458: 00013a03 ld x20,0(x2) + 8000245c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x0000000000000000 + 80002460: 00013603 ld x12,0(x2) + 80002464: 00810113 addi x2,x2,8 + +0000000080002468 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64ds x3, x20, x12 # perform operation + 80002468: 3aca01b3 aes64ds x3,x20,x12 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000246c: 00083203 ld x4,0(x16) + 80002470: 00320c63 beq x4,x3,80002488 + 80002474: 48d082ef jal x5,8000b100 + 80002478: 80002468 .word 0x80002468 + 8000247c: 00000000 .word 0x00000000 + 80002480: 800162ff .word 0x800162ff + 80002484: 00000000 .word 0x00000000 + 80002488: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x8000000000000000 + 8000248c: 00013383 ld x7,0(x2) + 80002490: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x0000000000000001 + 80002494: 00013983 ld x19,0(x2) + 80002498: 00810113 addi x2,x2,8 + +000000008000249c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64ds x26, x7, x19 # perform operation + 8000249c: 3b338d33 aes64ds x26,x7,x19 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a0: 00083203 ld x4,0(x16) + 800024a4: 01a20c63 beq x4,x26,800024bc + 800024a8: 459082ef jal x5,8000b100 + 800024ac: 8000249c .word 0x8000249c + 800024b0: 00000000 .word 0x00000000 + 800024b4: 80016362 .word 0x80016362 + 800024b8: 00000000 .word 0x00000000 + 800024bc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x8000000000000000 + 800024c0: 00013d83 ld x27,0(x2) + 800024c4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000000000002 + 800024c8: 00013383 ld x7,0(x2) + 800024cc: 00810113 addi x2,x2,8 + +00000000800024d0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64ds x8, x27, x7 # perform operation + 800024d0: 3a7d8433 aes64ds x8,x27,x7 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024d4: 00083203 ld x4,0(x16) + 800024d8: 00820c63 beq x4,x8,800024f0 + 800024dc: 425082ef jal x5,8000b100 + 800024e0: 800024d0 .word 0x800024d0 + 800024e4: 00000000 .word 0x00000000 + 800024e8: 800163c5 .word 0x800163c5 + 800024ec: 00000000 .word 0x00000000 + 800024f0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x8000000000000000 + 800024f4: 00013603 ld x12,0(x2) + 800024f8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x8000000000000000 + 800024fc: 00013383 ld x7,0(x2) + 80002500: 00810113 addi x2,x2,8 + +0000000080002504 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64ds x21, x12, x7 # perform operation + 80002504: 3a760ab3 aes64ds x21,x12,x7 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002508: 00083203 ld x4,0(x16) + 8000250c: 01520c63 beq x4,x21,80002524 + 80002510: 3f1082ef jal x5,8000b100 + 80002514: 80002504 .word 0x80002504 + 80002518: 00000000 .word 0x00000000 + 8000251c: 80016428 .word 0x80016428 + 80002520: 00000000 .word 0x00000000 + 80002524: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8000000000000000 + 80002528: 00013783 ld x15,0(x2) + 8000252c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x8000000000000001 + 80002530: 00013683 ld x13,0(x2) + 80002534: 00810113 addi x2,x2,8 + +0000000080002538 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64ds x12, x15, x13 # perform operation + 80002538: 3ad78633 aes64ds x12,x15,x13 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000253c: 00083203 ld x4,0(x16) + 80002540: 00c20c63 beq x4,x12,80002558 + 80002544: 3bd082ef jal x5,8000b100 + 80002548: 80002538 .word 0x80002538 + 8000254c: 00000000 .word 0x00000000 + 80002550: 8001649a .word 0x8001649a + 80002554: 00000000 .word 0x00000000 + 80002558: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x8000000000000000 + 8000255c: 00013983 ld x19,0(x2) + 80002560: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x7fffffffffffffff + 80002564: 00013a03 ld x20,0(x2) + 80002568: 00810113 addi x2,x2,8 + +000000008000256c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64ds x28, x19, x20 # perform operation + 8000256c: 3b498e33 aes64ds x28,x19,x20 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002570: 00083203 ld x4,0(x16) + 80002574: 01c20c63 beq x4,x28,8000258c + 80002578: 389082ef jal x5,8000b100 + 8000257c: 8000256c .word 0x8000256c + 80002580: 00000000 .word 0x00000000 + 80002584: 8001650c .word 0x8001650c + 80002588: 00000000 .word 0x00000000 + 8000258c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x8000000000000000 + 80002590: 00013e03 ld x28,0(x2) + 80002594: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80002598: 00013303 ld x6,0(x2) + 8000259c: 00810113 addi x2,x2,8 + +00000000800025a0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64ds x23, x28, x6 # perform operation + 800025a0: 3a6e0bb3 aes64ds x23,x28,x6 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025a4: 00083203 ld x4,0(x16) + 800025a8: 01720c63 beq x4,x23,800025c0 + 800025ac: 355082ef jal x5,8000b100 + 800025b0: 800025a0 .word 0x800025a0 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 8001657e .word 0x8001657e + 800025bc: 00000000 .word 0x00000000 + 800025c0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x8000000000000000 + 800025c4: 00013983 ld x19,0(x2) + 800025c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xffffffffffffffff + 800025cc: 00013b03 ld x22,0(x2) + 800025d0: 00810113 addi x2,x2,8 + +00000000800025d4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64ds x27, x19, x22 # perform operation + 800025d4: 3b698db3 aes64ds x27,x19,x22 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025d8: 00083203 ld x4,0(x16) + 800025dc: 01b20c63 beq x4,x27,800025f4 + 800025e0: 321082ef jal x5,8000b100 + 800025e4: 800025d4 .word 0x800025d4 + 800025e8: 00000000 .word 0x00000000 + 800025ec: 800165f0 .word 0x800165f0 + 800025f0: 00000000 .word 0x00000000 + 800025f4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x8000000000000000 + 800025f8: 00013d03 ld x26,0(x2) + 800025fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xfffffffffffffffe + 80002600: 00013583 ld x11,0(x2) + 80002604: 00810113 addi x2,x2,8 + +0000000080002608 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64ds x3, x26, x11 # perform operation + 80002608: 3abd01b3 aes64ds x3,x26,x11 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000260c: 00083203 ld x4,0(x16) + 80002610: 00320c63 beq x4,x3,80002628 + 80002614: 2ed082ef jal x5,8000b100 + 80002618: 80002608 .word 0x80002608 + 8000261c: 00000000 .word 0x00000000 + 80002620: 80016662 .word 0x80016662 + 80002624: 00000000 .word 0x00000000 + 80002628: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x8000000000000000 + 8000262c: 00013983 ld x19,0(x2) + 80002630: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80002634: 00013903 ld x18,0(x2) + 80002638: 00810113 addi x2,x2,8 + +000000008000263c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64ds x21, x19, x18 # perform operation + 8000263c: 3b298ab3 aes64ds x21,x19,x18 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002640: 00083203 ld x4,0(x16) + 80002644: 01520c63 beq x4,x21,8000265c + 80002648: 2b9082ef jal x5,8000b100 + 8000264c: 8000263c .word 0x8000263c + 80002650: 00000000 .word 0x00000000 + 80002654: 800166d4 .word 0x800166d4 + 80002658: 00000000 .word 0x00000000 + 8000265c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8000000000000000 + 80002660: 00013783 ld x15,0(x2) + 80002664: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 80002668: 00013d83 ld x27,0(x2) + 8000266c: 00810113 addi x2,x2,8 + +0000000080002670 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x26, x15, x27 # perform operation + 80002670: 3bb78d33 aes64ds x26,x15,x27 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002674: 00083203 ld x4,0(x16) + 80002678: 01a20c63 beq x4,x26,80002690 + 8000267c: 285082ef jal x5,8000b100 + 80002680: 80002670 .word 0x80002670 + 80002684: 00000000 .word 0x00000000 + 80002688: 80016746 .word 0x80016746 + 8000268c: 00000000 .word 0x00000000 + 80002690: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x8000000000000000 + 80002694: 00013183 ld x3,0(x2) + 80002698: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x5555555555555555 + 8000269c: 00013503 ld x10,0(x2) + 800026a0: 00810113 addi x2,x2,8 + +00000000800026a4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64ds x23, x3, x10 # perform operation + 800026a4: 3aa18bb3 aes64ds x23,x3,x10 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026a8: 00083203 ld x4,0(x16) + 800026ac: 01720c63 beq x4,x23,800026c4 + 800026b0: 251082ef jal x5,8000b100 + 800026b4: 800026a4 .word 0x800026a4 + 800026b8: 00000000 .word 0x00000000 + 800026bc: 800167b8 .word 0x800167b8 + 800026c0: 00000000 .word 0x00000000 + 800026c4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x8000000000000000 + 800026c8: 00013b83 ld x23,0(x2) + 800026cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x00000000ffffffff + 800026d0: 00013a03 ld x20,0(x2) + 800026d4: 00810113 addi x2,x2,8 + +00000000800026d8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64ds x14, x23, x20 # perform operation + 800026d8: 3b4b8733 aes64ds x14,x23,x20 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026dc: 00083203 ld x4,0(x16) + 800026e0: 00e20c63 beq x4,x14,800026f8 + 800026e4: 21d082ef jal x5,8000b100 + 800026e8: 800026d8 .word 0x800026d8 + 800026ec: 00000000 .word 0x00000000 + 800026f0: 8001682a .word 0x8001682a + 800026f4: 00000000 .word 0x00000000 + 800026f8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x8000000000000000 + 800026fc: 00013303 ld x6,0(x2) + 80002700: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x00000000fffffffe + 80002704: 00013883 ld x17,0(x2) + 80002708: 00810113 addi x2,x2,8 + +000000008000270c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64ds x28, x6, x17 # perform operation + 8000270c: 3b130e33 aes64ds x28,x6,x17 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002710: 00083203 ld x4,0(x16) + 80002714: 01c20c63 beq x4,x28,8000272c + 80002718: 1e9082ef jal x5,8000b100 + 8000271c: 8000270c .word 0x8000270c + 80002720: 00000000 .word 0x00000000 + 80002724: 80016894 .word 0x80016894 + 80002728: 00000000 .word 0x00000000 + 8000272c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x8000000000000000 + 80002730: 00013b03 ld x22,0(x2) + 80002734: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x0000000100000000 + 80002738: 00013783 ld x15,0(x2) + 8000273c: 00810113 addi x2,x2,8 + +0000000080002740 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64ds x29, x22, x15 # perform operation + 80002740: 3afb0eb3 aes64ds x29,x22,x15 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002744: 00083203 ld x4,0(x16) + 80002748: 01d20c63 beq x4,x29,80002760 + 8000274c: 1b5082ef jal x5,8000b100 + 80002750: 80002740 .word 0x80002740 + 80002754: 00000000 .word 0x00000000 + 80002758: 800168fe .word 0x800168fe + 8000275c: 00000000 .word 0x00000000 + 80002760: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x8000000000000000 + 80002764: 00013403 ld x8,0(x2) + 80002768: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x0000000100000001 + 8000276c: 00013183 ld x3,0(x2) + 80002770: 00810113 addi x2,x2,8 + +0000000080002774 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64ds x26, x8, x3 # perform operation + 80002774: 3a340d33 aes64ds x26,x8,x3 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002778: 00083203 ld x4,0(x16) + 8000277c: 01a20c63 beq x4,x26,80002794 + 80002780: 181082ef jal x5,8000b100 + 80002784: 80002774 .word 0x80002774 + 80002788: 00000000 .word 0x00000000 + 8000278c: 80016969 .word 0x80016969 + 80002790: 00000000 .word 0x00000000 + 80002794: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x8000000000000001 + 80002798: 00013f83 ld x31,0(x2) + 8000279c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0000000000000000 + 800027a0: 00013903 ld x18,0(x2) + 800027a4: 00810113 addi x2,x2,8 + +00000000800027a8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64ds x28, x31, x18 # perform operation + 800027a8: 3b2f8e33 aes64ds x28,x31,x18 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027ac: 00083203 ld x4,0(x16) + 800027b0: 01c20c63 beq x4,x28,800027c8 + 800027b4: 14d082ef jal x5,8000b100 + 800027b8: 800027a8 .word 0x800027a8 + 800027bc: 00000000 .word 0x00000000 + 800027c0: 800169d4 .word 0x800169d4 + 800027c4: 00000000 .word 0x00000000 + 800027c8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x8000000000000001 + 800027cc: 00013f03 ld x30,0(x2) + 800027d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x0000000000000001 + 800027d4: 00013403 ld x8,0(x2) + 800027d8: 00810113 addi x2,x2,8 + +00000000800027dc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64ds x9, x30, x8 # perform operation + 800027dc: 3a8f04b3 aes64ds x9,x30,x8 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e0: 00083203 ld x4,0(x16) + 800027e4: 00920c63 beq x4,x9,800027fc + 800027e8: 119082ef jal x5,8000b100 + 800027ec: 800027dc .word 0x800027dc + 800027f0: 00000000 .word 0x00000000 + 800027f4: 80016a37 .word 0x80016a37 + 800027f8: 00000000 .word 0x00000000 + 800027fc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x8000000000000001 + 80002800: 00013303 ld x6,0(x2) + 80002804: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x0000000000000002 + 80002808: 00013d83 ld x27,0(x2) + 8000280c: 00810113 addi x2,x2,8 + +0000000080002810 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64ds x3, x6, x27 # perform operation + 80002810: 3bb301b3 aes64ds x3,x6,x27 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002814: 00083203 ld x4,0(x16) + 80002818: 00320c63 beq x4,x3,80002830 + 8000281c: 0e5082ef jal x5,8000b100 + 80002820: 80002810 .word 0x80002810 + 80002824: 00000000 .word 0x00000000 + 80002828: 80016a9a .word 0x80016a9a + 8000282c: 00000000 .word 0x00000000 + 80002830: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x8000000000000001 + 80002834: 00013e83 ld x29,0(x2) + 80002838: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x8000000000000000 + 8000283c: 00013583 ld x11,0(x2) + 80002840: 00810113 addi x2,x2,8 + +0000000080002844 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64ds x23, x29, x11 # perform operation + 80002844: 3abe8bb3 aes64ds x23,x29,x11 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002848: 00083203 ld x4,0(x16) + 8000284c: 01720c63 beq x4,x23,80002864 + 80002850: 0b1082ef jal x5,8000b100 + 80002854: 80002844 .word 0x80002844 + 80002858: 00000000 .word 0x00000000 + 8000285c: 80016afd .word 0x80016afd + 80002860: 00000000 .word 0x00000000 + 80002864: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x8000000000000001 + 80002868: 00013f83 ld x31,0(x2) + 8000286c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x8000000000000001 + 80002870: 00013603 ld x12,0(x2) + 80002874: 00810113 addi x2,x2,8 + +0000000080002878 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64ds x25, x31, x12 # perform operation + 80002878: 3acf8cb3 aes64ds x25,x31,x12 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000287c: 00083203 ld x4,0(x16) + 80002880: 01920c63 beq x4,x25,80002898 + 80002884: 07d082ef jal x5,8000b100 + 80002888: 80002878 .word 0x80002878 + 8000288c: 00000000 .word 0x00000000 + 80002890: 80016b6f .word 0x80016b6f + 80002894: 00000000 .word 0x00000000 + 80002898: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x8000000000000001 + 8000289c: 00013e03 ld x28,0(x2) + 800028a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x7fffffffffffffff + 800028a4: 00013f03 ld x30,0(x2) + 800028a8: 00810113 addi x2,x2,8 + +00000000800028ac : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64ds x19, x28, x30 # perform operation + 800028ac: 3bee09b3 aes64ds x19,x28,x30 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b0: 00083203 ld x4,0(x16) + 800028b4: 01320c63 beq x4,x19,800028cc + 800028b8: 049082ef jal x5,8000b100 + 800028bc: 800028ac .word 0x800028ac + 800028c0: 00000000 .word 0x00000000 + 800028c4: 80016be1 .word 0x80016be1 + 800028c8: 00000000 .word 0x00000000 + 800028cc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x8000000000000001 + 800028d0: 00013a83 ld x21,0(x2) + 800028d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x7ffffffffffffffe + 800028d8: 00013d03 ld x26,0(x2) + 800028dc: 00810113 addi x2,x2,8 + +00000000800028e0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64ds x20, x21, x26 # perform operation + 800028e0: 3baa8a33 aes64ds x20,x21,x26 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028e4: 00083203 ld x4,0(x16) + 800028e8: 01420c63 beq x4,x20,80002900 + 800028ec: 015082ef jal x5,8000b100 + 800028f0: 800028e0 .word 0x800028e0 + 800028f4: 00000000 .word 0x00000000 + 800028f8: 80016c53 .word 0x80016c53 + 800028fc: 00000000 .word 0x00000000 + 80002900: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8000000000000001 + 80002904: 00013783 ld x15,0(x2) + 80002908: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xffffffffffffffff + 8000290c: 00013583 ld x11,0(x2) + 80002910: 00810113 addi x2,x2,8 + +0000000080002914 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64ds x26, x15, x11 # perform operation + 80002914: 3ab78d33 aes64ds x26,x15,x11 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002918: 00083203 ld x4,0(x16) + 8000291c: 01a20c63 beq x4,x26,80002934 + 80002920: 7e0082ef jal x5,8000b100 + 80002924: 80002914 .word 0x80002914 + 80002928: 00000000 .word 0x00000000 + 8000292c: 80016cc5 .word 0x80016cc5 + 80002930: 00000000 .word 0x00000000 + 80002934: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x8000000000000001 + 80002938: 00013d83 ld x27,0(x2) + 8000293c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002940: 00013f83 ld x31,0(x2) + 80002944: 00810113 addi x2,x2,8 + +0000000080002948 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64ds x22, x27, x31 # perform operation + 80002948: 3bfd8b33 aes64ds x22,x27,x31 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000294c: 00083203 ld x4,0(x16) + 80002950: 01620c63 beq x4,x22,80002968 + 80002954: 7ac082ef jal x5,8000b100 + 80002958: 80002948 .word 0x80002948 + 8000295c: 00000000 .word 0x00000000 + 80002960: 80016d37 .word 0x80016d37 + 80002964: 00000000 .word 0x00000000 + 80002968: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x8000000000000001 + 8000296c: 00013483 ld x9,0(x2) + 80002970: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 80002974: 00013403 ld x8,0(x2) + 80002978: 00810113 addi x2,x2,8 + +000000008000297c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64ds x27, x9, x8 # perform operation + 8000297c: 3a848db3 aes64ds x27,x9,x8 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002980: 00083203 ld x4,0(x16) + 80002984: 01b20c63 beq x4,x27,8000299c + 80002988: 778082ef jal x5,8000b100 + 8000298c: 8000297c .word 0x8000297c + 80002990: 00000000 .word 0x00000000 + 80002994: 80016da9 .word 0x80016da9 + 80002998: 00000000 .word 0x00000000 + 8000299c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x8000000000000001 + 800029a0: 00013d83 ld x27,0(x2) + 800029a4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 800029a8: 00013683 ld x13,0(x2) + 800029ac: 00810113 addi x2,x2,8 + +00000000800029b0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x18, x27, x13 # perform operation + 800029b0: 3add8933 aes64ds x18,x27,x13 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029b4: 00083203 ld x4,0(x16) + 800029b8: 01220c63 beq x4,x18,800029d0 + 800029bc: 744082ef jal x5,8000b100 + 800029c0: 800029b0 .word 0x800029b0 + 800029c4: 00000000 .word 0x00000000 + 800029c8: 80016e1b .word 0x80016e1b + 800029cc: 00000000 .word 0x00000000 + 800029d0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x8000000000000001 + 800029d4: 00013303 ld x6,0(x2) + 800029d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x5555555555555555 + 800029dc: 00013a03 ld x20,0(x2) + 800029e0: 00810113 addi x2,x2,8 + +00000000800029e4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64ds x21, x6, x20 # perform operation + 800029e4: 3b430ab3 aes64ds x21,x6,x20 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029e8: 00083203 ld x4,0(x16) + 800029ec: 01520c63 beq x4,x21,80002a04 + 800029f0: 710082ef jal x5,8000b100 + 800029f4: 800029e4 .word 0x800029e4 + 800029f8: 00000000 .word 0x00000000 + 800029fc: 80016e8d .word 0x80016e8d + 80002a00: 00000000 .word 0x00000000 + 80002a04: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x8000000000000001 + 80002a08: 00013f83 ld x31,0(x2) + 80002a0c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x00000000ffffffff + 80002a10: 00013e83 ld x29,0(x2) + 80002a14: 00810113 addi x2,x2,8 + +0000000080002a18 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64ds x12, x31, x29 # perform operation + 80002a18: 3bdf8633 aes64ds x12,x31,x29 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a1c: 00083203 ld x4,0(x16) + 80002a20: 00c20c63 beq x4,x12,80002a38 + 80002a24: 6dc082ef jal x5,8000b100 + 80002a28: 80002a18 .word 0x80002a18 + 80002a2c: 00000000 .word 0x00000000 + 80002a30: 80016eff .word 0x80016eff + 80002a34: 00000000 .word 0x00000000 + 80002a38: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x8000000000000001 + 80002a3c: 00013703 ld x14,0(x2) + 80002a40: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x00000000fffffffe + 80002a44: 00013503 ld x10,0(x2) + 80002a48: 00810113 addi x2,x2,8 + +0000000080002a4c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64ds x18, x14, x10 # perform operation + 80002a4c: 3aa70933 aes64ds x18,x14,x10 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a50: 00083203 ld x4,0(x16) + 80002a54: 01220c63 beq x4,x18,80002a6c + 80002a58: 6a8082ef jal x5,8000b100 + 80002a5c: 80002a4c .word 0x80002a4c + 80002a60: 00000000 .word 0x00000000 + 80002a64: 80016f69 .word 0x80016f69 + 80002a68: 00000000 .word 0x00000000 + 80002a6c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x8000000000000001 + 80002a70: 00013e03 ld x28,0(x2) + 80002a74: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x0000000100000000 + 80002a78: 00013503 ld x10,0(x2) + 80002a7c: 00810113 addi x2,x2,8 + +0000000080002a80 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64ds x14, x28, x10 # perform operation + 80002a80: 3aae0733 aes64ds x14,x28,x10 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a84: 00083203 ld x4,0(x16) + 80002a88: 00e20c63 beq x4,x14,80002aa0 + 80002a8c: 674082ef jal x5,8000b100 + 80002a90: 80002a80 .word 0x80002a80 + 80002a94: 00000000 .word 0x00000000 + 80002a98: 80016fd3 .word 0x80016fd3 + 80002a9c: 00000000 .word 0x00000000 + 80002aa0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x8000000000000001 + 80002aa4: 00013b03 ld x22,0(x2) + 80002aa8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x0000000100000001 + 80002aac: 00013403 ld x8,0(x2) + 80002ab0: 00810113 addi x2,x2,8 + +0000000080002ab4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64ds x30, x22, x8 # perform operation + 80002ab4: 3a8b0f33 aes64ds x30,x22,x8 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ab8: 00083203 ld x4,0(x16) + 80002abc: 01e20c63 beq x4,x30,80002ad4 + 80002ac0: 640082ef jal x5,8000b100 + 80002ac4: 80002ab4 .word 0x80002ab4 + 80002ac8: 00000000 .word 0x00000000 + 80002acc: 8001703e .word 0x8001703e + 80002ad0: 00000000 .word 0x00000000 + 80002ad4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002ad8: 00013183 ld x3,0(x2) + 80002adc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000000000000 + 80002ae0: 00013383 ld x7,0(x2) + 80002ae4: 00810113 addi x2,x2,8 + +0000000080002ae8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64ds x6, x3, x7 # perform operation + 80002ae8: 3a718333 aes64ds x6,x3,x7 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002aec: 00083203 ld x4,0(x16) + 80002af0: 00620c63 beq x4,x6,80002b08 + 80002af4: 60c082ef jal x5,8000b100 + 80002af8: 80002ae8 .word 0x80002ae8 + 80002afc: 00000000 .word 0x00000000 + 80002b00: 800170a9 .word 0x800170a9 + 80002b04: 00000000 .word 0x00000000 + 80002b08: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002b0c: 00013683 ld x13,0(x2) + 80002b10: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x0000000000000001 + 80002b14: 00013a83 ld x21,0(x2) + 80002b18: 00810113 addi x2,x2,8 + +0000000080002b1c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64ds x24, x13, x21 # perform operation + 80002b1c: 3b568c33 aes64ds x24,x13,x21 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b20: 00083203 ld x4,0(x16) + 80002b24: 01820c63 beq x4,x24,80002b3c + 80002b28: 5d8082ef jal x5,8000b100 + 80002b2c: 80002b1c .word 0x80002b1c + 80002b30: 00000000 .word 0x00000000 + 80002b34: 8001710c .word 0x8001710c + 80002b38: 00000000 .word 0x00000000 + 80002b3c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002b40: 00013f03 ld x30,0(x2) + 80002b44: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0000000000000002 + 80002b48: 00013903 ld x18,0(x2) + 80002b4c: 00810113 addi x2,x2,8 + +0000000080002b50 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64ds x9, x30, x18 # perform operation + 80002b50: 3b2f04b3 aes64ds x9,x30,x18 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b54: 00083203 ld x4,0(x16) + 80002b58: 00920c63 beq x4,x9,80002b70 + 80002b5c: 5a4082ef jal x5,8000b100 + 80002b60: 80002b50 .word 0x80002b50 + 80002b64: 00000000 .word 0x00000000 + 80002b68: 8001716f .word 0x8001716f + 80002b6c: 00000000 .word 0x00000000 + 80002b70: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002b74: 00013783 ld x15,0(x2) + 80002b78: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x8000000000000000 + 80002b7c: 00013703 ld x14,0(x2) + 80002b80: 00810113 addi x2,x2,8 + +0000000080002b84 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64ds x6, x15, x14 # perform operation + 80002b84: 3ae78333 aes64ds x6,x15,x14 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b88: 00083203 ld x4,0(x16) + 80002b8c: 00620c63 beq x4,x6,80002ba4 + 80002b90: 570082ef jal x5,8000b100 + 80002b94: 80002b84 .word 0x80002b84 + 80002b98: 00000000 .word 0x00000000 + 80002b9c: 800171d2 .word 0x800171d2 + 80002ba0: 00000000 .word 0x00000000 + 80002ba4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x7fffffffffffffff + 80002ba8: 00013303 ld x6,0(x2) + 80002bac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x8000000000000001 + 80002bb0: 00013c03 ld x24,0(x2) + 80002bb4: 00810113 addi x2,x2,8 + +0000000080002bb8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64ds x13, x6, x24 # perform operation + 80002bb8: 3b8306b3 aes64ds x13,x6,x24 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bbc: 00083203 ld x4,0(x16) + 80002bc0: 00d20c63 beq x4,x13,80002bd8 + 80002bc4: 53c082ef jal x5,8000b100 + 80002bc8: 80002bb8 .word 0x80002bb8 + 80002bcc: 00000000 .word 0x00000000 + 80002bd0: 80017244 .word 0x80017244 + 80002bd4: 00000000 .word 0x00000000 + 80002bd8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002bdc: 00013503 ld x10,0(x2) + 80002be0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x7fffffffffffffff + 80002be4: 00013983 ld x19,0(x2) + 80002be8: 00810113 addi x2,x2,8 + +0000000080002bec : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ds x15, x10, x19 # perform operation + 80002bec: 3b3507b3 aes64ds x15,x10,x19 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf0: 00083203 ld x4,0(x16) + 80002bf4: 00f20c63 beq x4,x15,80002c0c + 80002bf8: 508082ef jal x5,8000b100 + 80002bfc: 80002bec .word 0x80002bec + 80002c00: 00000000 .word 0x00000000 + 80002c04: 800172b6 .word 0x800172b6 + 80002c08: 00000000 .word 0x00000000 + 80002c0c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002c10: 00013783 ld x15,0(x2) + 80002c14: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80002c18: 00013f03 ld x30,0(x2) + 80002c1c: 00810113 addi x2,x2,8 + +0000000080002c20 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ds x26, x15, x30 # perform operation + 80002c20: 3be78d33 aes64ds x26,x15,x30 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c24: 00083203 ld x4,0(x16) + 80002c28: 01a20c63 beq x4,x26,80002c40 + 80002c2c: 4d4082ef jal x5,8000b100 + 80002c30: 80002c20 .word 0x80002c20 + 80002c34: 00000000 .word 0x00000000 + 80002c38: 80017328 .word 0x80017328 + 80002c3c: 00000000 .word 0x00000000 + 80002c40: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002c44: 00013c03 ld x24,0(x2) + 80002c48: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xffffffffffffffff + 80002c4c: 00013503 ld x10,0(x2) + 80002c50: 00810113 addi x2,x2,8 + +0000000080002c54 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64ds x25, x24, x10 # perform operation + 80002c54: 3aac0cb3 aes64ds x25,x24,x10 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c58: 00083203 ld x4,0(x16) + 80002c5c: 01920c63 beq x4,x25,80002c74 + 80002c60: 4a0082ef jal x5,8000b100 + 80002c64: 80002c54 .word 0x80002c54 + 80002c68: 00000000 .word 0x00000000 + 80002c6c: 8001739a .word 0x8001739a + 80002c70: 00000000 .word 0x00000000 + 80002c74: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002c78: 00013183 ld x3,0(x2) + 80002c7c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xfffffffffffffffe + 80002c80: 00013503 ld x10,0(x2) + 80002c84: 00810113 addi x2,x2,8 + +0000000080002c88 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ds x8, x3, x10 # perform operation + 80002c88: 3aa18433 aes64ds x8,x3,x10 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c8c: 00083203 ld x4,0(x16) + 80002c90: 00820c63 beq x4,x8,80002ca8 + 80002c94: 46c082ef jal x5,8000b100 + 80002c98: 80002c88 .word 0x80002c88 + 80002c9c: 00000000 .word 0x00000000 + 80002ca0: 8001740c .word 0x8001740c + 80002ca4: 00000000 .word 0x00000000 + 80002ca8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002cac: 00013083 ld x1,0(x2) + 80002cb0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80002cb4: 00013903 ld x18,0(x2) + 80002cb8: 00810113 addi x2,x2,8 + +0000000080002cbc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ds x8, x1, x18 # perform operation + 80002cbc: 3b208433 aes64ds x8,x1,x18 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc0: 00083203 ld x4,0(x16) + 80002cc4: 00820c63 beq x4,x8,80002cdc + 80002cc8: 438082ef jal x5,8000b100 + 80002ccc: 80002cbc .word 0x80002cbc + 80002cd0: 00000000 .word 0x00000000 + 80002cd4: 8001747e .word 0x8001747e + 80002cd8: 00000000 .word 0x00000000 + 80002cdc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002ce0: 00013a83 ld x21,0(x2) + 80002ce4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 80002ce8: 00013d03 ld x26,0(x2) + 80002cec: 00810113 addi x2,x2,8 + +0000000080002cf0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x15, x21, x26 # perform operation + 80002cf0: 3baa87b3 aes64ds x15,x21,x26 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cf4: 00083203 ld x4,0(x16) + 80002cf8: 00f20c63 beq x4,x15,80002d10 + 80002cfc: 404082ef jal x5,8000b100 + 80002d00: 80002cf0 .word 0x80002cf0 + 80002d04: 00000000 .word 0x00000000 + 80002d08: 800174f0 .word 0x800174f0 + 80002d0c: 00000000 .word 0x00000000 + 80002d10: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002d14: 00013383 ld x7,0(x2) + 80002d18: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x5555555555555555 + 80002d1c: 00013903 ld x18,0(x2) + 80002d20: 00810113 addi x2,x2,8 + +0000000080002d24 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64ds x6, x7, x18 # perform operation + 80002d24: 3b238333 aes64ds x6,x7,x18 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d28: 00083203 ld x4,0(x16) + 80002d2c: 00620c63 beq x4,x6,80002d44 + 80002d30: 3d0082ef jal x5,8000b100 + 80002d34: 80002d24 .word 0x80002d24 + 80002d38: 00000000 .word 0x00000000 + 80002d3c: 80017562 .word 0x80017562 + 80002d40: 00000000 .word 0x00000000 + 80002d44: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002d48: 00013683 ld x13,0(x2) + 80002d4c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x00000000ffffffff + 80002d50: 00013383 ld x7,0(x2) + 80002d54: 00810113 addi x2,x2,8 + +0000000080002d58 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64ds x27, x13, x7 # perform operation + 80002d58: 3a768db3 aes64ds x27,x13,x7 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d5c: 00083203 ld x4,0(x16) + 80002d60: 01b20c63 beq x4,x27,80002d78 + 80002d64: 39c082ef jal x5,8000b100 + 80002d68: 80002d58 .word 0x80002d58 + 80002d6c: 00000000 .word 0x00000000 + 80002d70: 800175d4 .word 0x800175d4 + 80002d74: 00000000 .word 0x00000000 + 80002d78: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002d7c: 00013a83 ld x21,0(x2) + 80002d80: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x00000000fffffffe + 80002d84: 00013e03 ld x28,0(x2) + 80002d88: 00810113 addi x2,x2,8 + +0000000080002d8c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64ds x1, x21, x28 # perform operation + 80002d8c: 3bca80b3 aes64ds x1,x21,x28 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d90: 00083203 ld x4,0(x16) + 80002d94: 00120c63 beq x4,x1,80002dac + 80002d98: 368082ef jal x5,8000b100 + 80002d9c: 80002d8c .word 0x80002d8c + 80002da0: 00000000 .word 0x00000000 + 80002da4: 8001763e .word 0x8001763e + 80002da8: 00000000 .word 0x00000000 + 80002dac: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002db0: 00013d83 ld x27,0(x2) + 80002db4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x0000000100000000 + 80002db8: 00013a83 ld x21,0(x2) + 80002dbc: 00810113 addi x2,x2,8 + +0000000080002dc0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64ds x28, x27, x21 # perform operation + 80002dc0: 3b5d8e33 aes64ds x28,x27,x21 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dc4: 00083203 ld x4,0(x16) + 80002dc8: 01c20c63 beq x4,x28,80002de0 + 80002dcc: 334082ef jal x5,8000b100 + 80002dd0: 80002dc0 .word 0x80002dc0 + 80002dd4: 00000000 .word 0x00000000 + 80002dd8: 800176a8 .word 0x800176a8 + 80002ddc: 00000000 .word 0x00000000 + 80002de0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002de4: 00013c03 ld x24,0(x2) + 80002de8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0000000100000001 + 80002dec: 00013d03 ld x26,0(x2) + 80002df0: 00810113 addi x2,x2,8 + +0000000080002df4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64ds x17, x24, x26 # perform operation + 80002df4: 3bac08b3 aes64ds x17,x24,x26 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002df8: 00083203 ld x4,0(x16) + 80002dfc: 01120c63 beq x4,x17,80002e14 + 80002e00: 300082ef jal x5,8000b100 + 80002e04: 80002df4 .word 0x80002df4 + 80002e08: 00000000 .word 0x00000000 + 80002e0c: 80017713 .word 0x80017713 + 80002e10: 00000000 .word 0x00000000 + 80002e14: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002e18: 00013903 ld x18,0(x2) + 80002e1c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000000000000 + 80002e20: 00013383 ld x7,0(x2) + 80002e24: 00810113 addi x2,x2,8 + +0000000080002e28 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64ds x9, x18, x7 # perform operation + 80002e28: 3a7904b3 aes64ds x9,x18,x7 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e2c: 00083203 ld x4,0(x16) + 80002e30: 00920c63 beq x4,x9,80002e48 + 80002e34: 2cc082ef jal x5,8000b100 + 80002e38: 80002e28 .word 0x80002e28 + 80002e3c: 00000000 .word 0x00000000 + 80002e40: 8001777e .word 0x8001777e + 80002e44: 00000000 .word 0x00000000 + 80002e48: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002e4c: 00013583 ld x11,0(x2) + 80002e50: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0000000000000001 + 80002e54: 00013903 ld x18,0(x2) + 80002e58: 00810113 addi x2,x2,8 + +0000000080002e5c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64ds x12, x11, x18 # perform operation + 80002e5c: 3b258633 aes64ds x12,x11,x18 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e60: 00083203 ld x4,0(x16) + 80002e64: 00c20c63 beq x4,x12,80002e7c + 80002e68: 298082ef jal x5,8000b100 + 80002e6c: 80002e5c .word 0x80002e5c + 80002e70: 00000000 .word 0x00000000 + 80002e74: 800177e1 .word 0x800177e1 + 80002e78: 00000000 .word 0x00000000 + 80002e7c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80002e80: 00013383 ld x7,0(x2) + 80002e84: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x0000000000000002 + 80002e88: 00013f83 ld x31,0(x2) + 80002e8c: 00810113 addi x2,x2,8 + +0000000080002e90 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64ds x26, x7, x31 # perform operation + 80002e90: 3bf38d33 aes64ds x26,x7,x31 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e94: 00083203 ld x4,0(x16) + 80002e98: 01a20c63 beq x4,x26,80002eb0 + 80002e9c: 264082ef jal x5,8000b100 + 80002ea0: 80002e90 .word 0x80002e90 + 80002ea4: 00000000 .word 0x00000000 + 80002ea8: 80017844 .word 0x80017844 + 80002eac: 00000000 .word 0x00000000 + 80002eb0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002eb4: 00013683 ld x13,0(x2) + 80002eb8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x8000000000000000 + 80002ebc: 00013f83 ld x31,0(x2) + 80002ec0: 00810113 addi x2,x2,8 + +0000000080002ec4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64ds x19, x13, x31 # perform operation + 80002ec4: 3bf689b3 aes64ds x19,x13,x31 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ec8: 00083203 ld x4,0(x16) + 80002ecc: 01320c63 beq x4,x19,80002ee4 + 80002ed0: 230082ef jal x5,8000b100 + 80002ed4: 80002ec4 .word 0x80002ec4 + 80002ed8: 00000000 .word 0x00000000 + 80002edc: 800178a7 .word 0x800178a7 + 80002ee0: 00000000 .word 0x00000000 + 80002ee4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002ee8: 00013a03 ld x20,0(x2) + 80002eec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x8000000000000001 + 80002ef0: 00013e83 ld x29,0(x2) + 80002ef4: 00810113 addi x2,x2,8 + +0000000080002ef8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64ds x31, x20, x29 # perform operation + 80002ef8: 3bda0fb3 aes64ds x31,x20,x29 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002efc: 00083203 ld x4,0(x16) + 80002f00: 01f20c63 beq x4,x31,80002f18 + 80002f04: 1fc082ef jal x5,8000b100 + 80002f08: 80002ef8 .word 0x80002ef8 + 80002f0c: 00000000 .word 0x00000000 + 80002f10: 80017919 .word 0x80017919 + 80002f14: 00000000 .word 0x00000000 + 80002f18: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002f1c: 00013783 ld x15,0(x2) + 80002f20: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x7fffffffffffffff + 80002f24: 00013f03 ld x30,0(x2) + 80002f28: 00810113 addi x2,x2,8 + +0000000080002f2c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ds x23, x15, x30 # perform operation + 80002f2c: 3be78bb3 aes64ds x23,x15,x30 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f30: 00083203 ld x4,0(x16) + 80002f34: 01720c63 beq x4,x23,80002f4c + 80002f38: 1c8082ef jal x5,8000b100 + 80002f3c: 80002f2c .word 0x80002f2c + 80002f40: 00000000 .word 0x00000000 + 80002f44: 8001798b .word 0x8001798b + 80002f48: 00000000 .word 0x00000000 + 80002f4c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002f50: 00013d83 ld x27,0(x2) + 80002f54: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80002f58: 00013d03 ld x26,0(x2) + 80002f5c: 00810113 addi x2,x2,8 + +0000000080002f60 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ds x11, x27, x26 # perform operation + 80002f60: 3bad85b3 aes64ds x11,x27,x26 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f64: 00083203 ld x4,0(x16) + 80002f68: 00b20c63 beq x4,x11,80002f80 + 80002f6c: 194082ef jal x5,8000b100 + 80002f70: 80002f60 .word 0x80002f60 + 80002f74: 00000000 .word 0x00000000 + 80002f78: 800179fd .word 0x800179fd + 80002f7c: 00000000 .word 0x00000000 + 80002f80: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002f84: 00013903 ld x18,0(x2) + 80002f88: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xffffffffffffffff + 80002f8c: 00013603 ld x12,0(x2) + 80002f90: 00810113 addi x2,x2,8 + +0000000080002f94 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ds x8, x18, x12 # perform operation + 80002f94: 3ac90433 aes64ds x8,x18,x12 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f98: 00083203 ld x4,0(x16) + 80002f9c: 00820c63 beq x4,x8,80002fb4 + 80002fa0: 160082ef jal x5,8000b100 + 80002fa4: 80002f94 .word 0x80002f94 + 80002fa8: 00000000 .word 0x00000000 + 80002fac: 80017a6f .word 0x80017a6f + 80002fb0: 00000000 .word 0x00000000 + 80002fb4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80002fb8: 00013083 ld x1,0(x2) + 80002fbc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xfffffffffffffffe + 80002fc0: 00013303 ld x6,0(x2) + 80002fc4: 00810113 addi x2,x2,8 + +0000000080002fc8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ds x28, x1, x6 # perform operation + 80002fc8: 3a608e33 aes64ds x28,x1,x6 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fcc: 00083203 ld x4,0(x16) + 80002fd0: 01c20c63 beq x4,x28,80002fe8 + 80002fd4: 12c082ef jal x5,8000b100 + 80002fd8: 80002fc8 .word 0x80002fc8 + 80002fdc: 00000000 .word 0x00000000 + 80002fe0: 80017ae1 .word 0x80017ae1 + 80002fe4: 00000000 .word 0x00000000 + 80002fe8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80002fec: 00013f03 ld x30,0(x2) + 80002ff0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002ff4: 00013c03 ld x24,0(x2) + 80002ff8: 00810113 addi x2,x2,8 + +0000000080002ffc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ds x15, x30, x24 # perform operation + 80002ffc: 3b8f07b3 aes64ds x15,x30,x24 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003000: 00083203 ld x4,0(x16) + 80003004: 00f20c63 beq x4,x15,8000301c + 80003008: 0f8082ef jal x5,8000b100 + 8000300c: 80002ffc .word 0x80002ffc + 80003010: 00000000 .word 0x00000000 + 80003014: 80017b53 .word 0x80017b53 + 80003018: 00000000 .word 0x00000000 + 8000301c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80003020: 00013c83 ld x25,0(x2) + 80003024: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 80003028: 00013603 ld x12,0(x2) + 8000302c: 00810113 addi x2,x2,8 + +0000000080003030 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x22, x25, x12 # perform operation + 80003030: 3acc8b33 aes64ds x22,x25,x12 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003034: 00083203 ld x4,0(x16) + 80003038: 01620c63 beq x4,x22,80003050 + 8000303c: 0c4082ef jal x5,8000b100 + 80003040: 80003030 .word 0x80003030 + 80003044: 00000000 .word 0x00000000 + 80003048: 80017bc5 .word 0x80017bc5 + 8000304c: 00000000 .word 0x00000000 + 80003050: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003054: 00013703 ld x14,0(x2) + 80003058: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x5555555555555555 + 8000305c: 00013a83 ld x21,0(x2) + 80003060: 00810113 addi x2,x2,8 + +0000000080003064 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64ds x3, x14, x21 # perform operation + 80003064: 3b5701b3 aes64ds x3,x14,x21 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003068: 00083203 ld x4,0(x16) + 8000306c: 00320c63 beq x4,x3,80003084 + 80003070: 090082ef jal x5,8000b100 + 80003074: 80003064 .word 0x80003064 + 80003078: 00000000 .word 0x00000000 + 8000307c: 80017c37 .word 0x80017c37 + 80003080: 00000000 .word 0x00000000 + 80003084: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80003088: 00013183 ld x3,0(x2) + 8000308c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x00000000ffffffff + 80003090: 00013883 ld x17,0(x2) + 80003094: 00810113 addi x2,x2,8 + +0000000080003098 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64ds x15, x3, x17 # perform operation + 80003098: 3b1187b3 aes64ds x15,x3,x17 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 8000309c: 00083203 ld x4,0(x16) + 800030a0: 00f20c63 beq x4,x15,800030b8 + 800030a4: 05c082ef jal x5,8000b100 + 800030a8: 80003098 .word 0x80003098 + 800030ac: 00000000 .word 0x00000000 + 800030b0: 80017ca9 .word 0x80017ca9 + 800030b4: 00000000 .word 0x00000000 + 800030b8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030bc: 00013683 ld x13,0(x2) + 800030c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x00000000fffffffe + 800030c4: 00013a03 ld x20,0(x2) + 800030c8: 00810113 addi x2,x2,8 + +00000000800030cc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64ds x18, x13, x20 # perform operation + 800030cc: 3b468933 aes64ds x18,x13,x20 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d0: 00083203 ld x4,0(x16) + 800030d4: 01220c63 beq x4,x18,800030ec + 800030d8: 028082ef jal x5,8000b100 + 800030dc: 800030cc .word 0x800030cc + 800030e0: 00000000 .word 0x00000000 + 800030e4: 80017d13 .word 0x80017d13 + 800030e8: 00000000 .word 0x00000000 + 800030ec: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x7ffffffffffffffe + 800030f0: 00013f83 ld x31,0(x2) + 800030f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x0000000100000000 + 800030f8: 00013783 ld x15,0(x2) + 800030fc: 00810113 addi x2,x2,8 + +0000000080003100 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64ds x11, x31, x15 # perform operation + 80003100: 3aff85b3 aes64ds x11,x31,x15 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003104: 00083203 ld x4,0(x16) + 80003108: 00b20c63 beq x4,x11,80003120 + 8000310c: 7f5072ef jal x5,8000b100 + 80003110: 80003100 .word 0x80003100 + 80003114: 00000000 .word 0x00000000 + 80003118: 80017d7d .word 0x80017d7d + 8000311c: 00000000 .word 0x00000000 + 80003120: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80003124: 00013d03 ld x26,0(x2) + 80003128: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x0000000100000001 + 8000312c: 00013603 ld x12,0(x2) + 80003130: 00810113 addi x2,x2,8 + +0000000080003134 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64ds x15, x26, x12 # perform operation + 80003134: 3acd07b3 aes64ds x15,x26,x12 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003138: 00083203 ld x4,0(x16) + 8000313c: 00f20c63 beq x4,x15,80003154 + 80003140: 7c1072ef jal x5,8000b100 + 80003144: 80003134 .word 0x80003134 + 80003148: 00000000 .word 0x00000000 + 8000314c: 80017de8 .word 0x80017de8 + 80003150: 00000000 .word 0x00000000 + 80003154: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xffffffffffffffff + 80003158: 00013f83 ld x31,0(x2) + 8000315c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x0000000000000000 + 80003160: 00013703 ld x14,0(x2) + 80003164: 00810113 addi x2,x2,8 + +0000000080003168 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64ds x21, x31, x14 # perform operation + 80003168: 3aef8ab3 aes64ds x21,x31,x14 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000316c: 00083203 ld x4,0(x16) + 80003170: 01520c63 beq x4,x21,80003188 + 80003174: 78d072ef jal x5,8000b100 + 80003178: 80003168 .word 0x80003168 + 8000317c: 00000000 .word 0x00000000 + 80003180: 80017e53 .word 0x80017e53 + 80003184: 00000000 .word 0x00000000 + 80003188: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xffffffffffffffff + 8000318c: 00013c83 ld x25,0(x2) + 80003190: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x0000000000000001 + 80003194: 00013c03 ld x24,0(x2) + 80003198: 00810113 addi x2,x2,8 + +000000008000319c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64ds x9, x25, x24 # perform operation + 8000319c: 3b8c84b3 aes64ds x9,x25,x24 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a0: 00083203 ld x4,0(x16) + 800031a4: 00920c63 beq x4,x9,800031bc + 800031a8: 759072ef jal x5,8000b100 + 800031ac: 8000319c .word 0x8000319c + 800031b0: 00000000 .word 0x00000000 + 800031b4: 80017eb6 .word 0x80017eb6 + 800031b8: 00000000 .word 0x00000000 + 800031bc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xffffffffffffffff + 800031c0: 00013703 ld x14,0(x2) + 800031c4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x0000000000000002 + 800031c8: 00013c83 ld x25,0(x2) + 800031cc: 00810113 addi x2,x2,8 + +00000000800031d0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64ds x12, x14, x25 # perform operation + 800031d0: 3b970633 aes64ds x12,x14,x25 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031d4: 00083203 ld x4,0(x16) + 800031d8: 00c20c63 beq x4,x12,800031f0 + 800031dc: 725072ef jal x5,8000b100 + 800031e0: 800031d0 .word 0x800031d0 + 800031e4: 00000000 .word 0x00000000 + 800031e8: 80017f19 .word 0x80017f19 + 800031ec: 00000000 .word 0x00000000 + 800031f0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xffffffffffffffff + 800031f4: 00013583 ld x11,0(x2) + 800031f8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x8000000000000000 + 800031fc: 00013703 ld x14,0(x2) + 80003200: 00810113 addi x2,x2,8 + +0000000080003204 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64ds x1, x11, x14 # perform operation + 80003204: 3ae580b3 aes64ds x1,x11,x14 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003208: 00083203 ld x4,0(x16) + 8000320c: 00120c63 beq x4,x1,80003224 + 80003210: 6f1072ef jal x5,8000b100 + 80003214: 80003204 .word 0x80003204 + 80003218: 00000000 .word 0x00000000 + 8000321c: 80017f7c .word 0x80017f7c + 80003220: 00000000 .word 0x00000000 + 80003224: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xffffffffffffffff + 80003228: 00013083 ld x1,0(x2) + 8000322c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x8000000000000001 + 80003230: 00013583 ld x11,0(x2) + 80003234: 00810113 addi x2,x2,8 + +0000000080003238 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64ds x20, x1, x11 # perform operation + 80003238: 3ab08a33 aes64ds x20,x1,x11 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000323c: 00083203 ld x4,0(x16) + 80003240: 01420c63 beq x4,x20,80003258 + 80003244: 6bd072ef jal x5,8000b100 + 80003248: 80003238 .word 0x80003238 + 8000324c: 00000000 .word 0x00000000 + 80003250: 80017fee .word 0x80017fee + 80003254: 00000000 .word 0x00000000 + 80003258: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xffffffffffffffff + 8000325c: 00013583 ld x11,0(x2) + 80003260: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x7fffffffffffffff + 80003264: 00013f83 ld x31,0(x2) + 80003268: 00810113 addi x2,x2,8 + +000000008000326c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ds x8, x11, x31 # perform operation + 8000326c: 3bf58433 aes64ds x8,x11,x31 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003270: 00083203 ld x4,0(x16) + 80003274: 00820c63 beq x4,x8,8000328c + 80003278: 689072ef jal x5,8000b100 + 8000327c: 8000326c .word 0x8000326c + 80003280: 00000000 .word 0x00000000 + 80003284: 80018060 .word 0x80018060 + 80003288: 00000000 .word 0x00000000 + 8000328c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xffffffffffffffff + 80003290: 00013403 ld x8,0(x2) + 80003294: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80003298: 00013a03 ld x20,0(x2) + 8000329c: 00810113 addi x2,x2,8 + +00000000800032a0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ds x27, x8, x20 # perform operation + 800032a0: 3b440db3 aes64ds x27,x8,x20 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032a4: 00083203 ld x4,0(x16) + 800032a8: 01b20c63 beq x4,x27,800032c0 + 800032ac: 655072ef jal x5,8000b100 + 800032b0: 800032a0 .word 0x800032a0 + 800032b4: 00000000 .word 0x00000000 + 800032b8: 800180d2 .word 0x800180d2 + 800032bc: 00000000 .word 0x00000000 + 800032c0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xffffffffffffffff + 800032c4: 00013883 ld x17,0(x2) + 800032c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xffffffffffffffff + 800032cc: 00013c03 ld x24,0(x2) + 800032d0: 00810113 addi x2,x2,8 + +00000000800032d4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64ds x20, x17, x24 # perform operation + 800032d4: 3b888a33 aes64ds x20,x17,x24 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032d8: 00083203 ld x4,0(x16) + 800032dc: 01420c63 beq x4,x20,800032f4 + 800032e0: 621072ef jal x5,8000b100 + 800032e4: 800032d4 .word 0x800032d4 + 800032e8: 00000000 .word 0x00000000 + 800032ec: 80018144 .word 0x80018144 + 800032f0: 00000000 .word 0x00000000 + 800032f4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xffffffffffffffff + 800032f8: 00013b03 ld x22,0(x2) + 800032fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xfffffffffffffffe + 80003300: 00013983 ld x19,0(x2) + 80003304: 00810113 addi x2,x2,8 + +0000000080003308 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ds x23, x22, x19 # perform operation + 80003308: 3b3b0bb3 aes64ds x23,x22,x19 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000330c: 00083203 ld x4,0(x16) + 80003310: 01720c63 beq x4,x23,80003328 + 80003314: 5ed072ef jal x5,8000b100 + 80003318: 80003308 .word 0x80003308 + 8000331c: 00000000 .word 0x00000000 + 80003320: 800181b6 .word 0x800181b6 + 80003324: 00000000 .word 0x00000000 + 80003328: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xffffffffffffffff + 8000332c: 00013b83 ld x23,0(x2) + 80003330: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80003334: 00013883 ld x17,0(x2) + 80003338: 00810113 addi x2,x2,8 + +000000008000333c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ds x10, x23, x17 # perform operation + 8000333c: 3b1b8533 aes64ds x10,x23,x17 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003340: 00083203 ld x4,0(x16) + 80003344: 00a20c63 beq x4,x10,8000335c + 80003348: 5b9072ef jal x5,8000b100 + 8000334c: 8000333c .word 0x8000333c + 80003350: 00000000 .word 0x00000000 + 80003354: 80018228 .word 0x80018228 + 80003358: 00000000 .word 0x00000000 + 8000335c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xffffffffffffffff + 80003360: 00013b03 ld x22,0(x2) + 80003364: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 80003368: 00013d03 ld x26,0(x2) + 8000336c: 00810113 addi x2,x2,8 + +0000000080003370 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x3, x22, x26 # perform operation + 80003370: 3bab01b3 aes64ds x3,x22,x26 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003374: 00083203 ld x4,0(x16) + 80003378: 00320c63 beq x4,x3,80003390 + 8000337c: 585072ef jal x5,8000b100 + 80003380: 80003370 .word 0x80003370 + 80003384: 00000000 .word 0x00000000 + 80003388: 8001829a .word 0x8001829a + 8000338c: 00000000 .word 0x00000000 + 80003390: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xffffffffffffffff + 80003394: 00013183 ld x3,0(x2) + 80003398: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5555555555555555 + 8000339c: 00013983 ld x19,0(x2) + 800033a0: 00810113 addi x2,x2,8 + +00000000800033a4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64ds x20, x3, x19 # perform operation + 800033a4: 3b318a33 aes64ds x20,x3,x19 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033a8: 00083203 ld x4,0(x16) + 800033ac: 01420c63 beq x4,x20,800033c4 + 800033b0: 551072ef jal x5,8000b100 + 800033b4: 800033a4 .word 0x800033a4 + 800033b8: 00000000 .word 0x00000000 + 800033bc: 8001830c .word 0x8001830c + 800033c0: 00000000 .word 0x00000000 + 800033c4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xffffffffffffffff + 800033c8: 00013083 ld x1,0(x2) + 800033cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x00000000ffffffff + 800033d0: 00013f83 ld x31,0(x2) + 800033d4: 00810113 addi x2,x2,8 + +00000000800033d8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64ds x19, x1, x31 # perform operation + 800033d8: 3bf089b3 aes64ds x19,x1,x31 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033dc: 00083203 ld x4,0(x16) + 800033e0: 01320c63 beq x4,x19,800033f8 + 800033e4: 51d072ef jal x5,8000b100 + 800033e8: 800033d8 .word 0x800033d8 + 800033ec: 00000000 .word 0x00000000 + 800033f0: 8001837e .word 0x8001837e + 800033f4: 00000000 .word 0x00000000 + 800033f8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xffffffffffffffff + 800033fc: 00013083 ld x1,0(x2) + 80003400: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000fffffffe + 80003404: 00013b03 ld x22,0(x2) + 80003408: 00810113 addi x2,x2,8 + +000000008000340c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64ds x14, x1, x22 # perform operation + 8000340c: 3b608733 aes64ds x14,x1,x22 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003410: 00083203 ld x4,0(x16) + 80003414: 00e20c63 beq x4,x14,8000342c + 80003418: 4e9072ef jal x5,8000b100 + 8000341c: 8000340c .word 0x8000340c + 80003420: 00000000 .word 0x00000000 + 80003424: 800183e8 .word 0x800183e8 + 80003428: 00000000 .word 0x00000000 + 8000342c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xffffffffffffffff + 80003430: 00013d03 ld x26,0(x2) + 80003434: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x0000000100000000 + 80003438: 00013a83 ld x21,0(x2) + 8000343c: 00810113 addi x2,x2,8 + +0000000080003440 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64ds x24, x26, x21 # perform operation + 80003440: 3b5d0c33 aes64ds x24,x26,x21 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003444: 00083203 ld x4,0(x16) + 80003448: 01820c63 beq x4,x24,80003460 + 8000344c: 4b5072ef jal x5,8000b100 + 80003450: 80003440 .word 0x80003440 + 80003454: 00000000 .word 0x00000000 + 80003458: 80018452 .word 0x80018452 + 8000345c: 00000000 .word 0x00000000 + 80003460: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xffffffffffffffff + 80003464: 00013883 ld x17,0(x2) + 80003468: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000100000001 + 8000346c: 00013383 ld x7,0(x2) + 80003470: 00810113 addi x2,x2,8 + +0000000080003474 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64ds x22, x17, x7 # perform operation + 80003474: 3a788b33 aes64ds x22,x17,x7 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003478: 00083203 ld x4,0(x16) + 8000347c: 01620c63 beq x4,x22,80003494 + 80003480: 481072ef jal x5,8000b100 + 80003484: 80003474 .word 0x80003474 + 80003488: 00000000 .word 0x00000000 + 8000348c: 800184bd .word 0x800184bd + 80003490: 00000000 .word 0x00000000 + 80003494: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xfffffffffffffffe + 80003498: 00013303 ld x6,0(x2) + 8000349c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x0000000000000000 + 800034a0: 00013a03 ld x20,0(x2) + 800034a4: 00810113 addi x2,x2,8 + +00000000800034a8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64ds x23, x6, x20 # perform operation + 800034a8: 3b430bb3 aes64ds x23,x6,x20 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034ac: 00083203 ld x4,0(x16) + 800034b0: 01720c63 beq x4,x23,800034c8 + 800034b4: 44d072ef jal x5,8000b100 + 800034b8: 800034a8 .word 0x800034a8 + 800034bc: 00000000 .word 0x00000000 + 800034c0: 80018528 .word 0x80018528 + 800034c4: 00000000 .word 0x00000000 + 800034c8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xfffffffffffffffe + 800034cc: 00013183 ld x3,0(x2) + 800034d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x0000000000000001 + 800034d4: 00013a03 ld x20,0(x2) + 800034d8: 00810113 addi x2,x2,8 + +00000000800034dc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64ds x25, x3, x20 # perform operation + 800034dc: 3b418cb3 aes64ds x25,x3,x20 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e0: 00083203 ld x4,0(x16) + 800034e4: 01920c63 beq x4,x25,800034fc + 800034e8: 419072ef jal x5,8000b100 + 800034ec: 800034dc .word 0x800034dc + 800034f0: 00000000 .word 0x00000000 + 800034f4: 8001858b .word 0x8001858b + 800034f8: 00000000 .word 0x00000000 + 800034fc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xfffffffffffffffe + 80003500: 00013183 ld x3,0(x2) + 80003504: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x0000000000000002 + 80003508: 00013703 ld x14,0(x2) + 8000350c: 00810113 addi x2,x2,8 + +0000000080003510 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64ds x6, x3, x14 # perform operation + 80003510: 3ae18333 aes64ds x6,x3,x14 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003514: 00083203 ld x4,0(x16) + 80003518: 00620c63 beq x4,x6,80003530 + 8000351c: 3e5072ef jal x5,8000b100 + 80003520: 80003510 .word 0x80003510 + 80003524: 00000000 .word 0x00000000 + 80003528: 800185ee .word 0x800185ee + 8000352c: 00000000 .word 0x00000000 + 80003530: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xfffffffffffffffe + 80003534: 00013983 ld x19,0(x2) + 80003538: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x8000000000000000 + 8000353c: 00013d83 ld x27,0(x2) + 80003540: 00810113 addi x2,x2,8 + +0000000080003544 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64ds x31, x19, x27 # perform operation + 80003544: 3bb98fb3 aes64ds x31,x19,x27 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003548: 00083203 ld x4,0(x16) + 8000354c: 01f20c63 beq x4,x31,80003564 + 80003550: 3b1072ef jal x5,8000b100 + 80003554: 80003544 .word 0x80003544 + 80003558: 00000000 .word 0x00000000 + 8000355c: 80018651 .word 0x80018651 + 80003560: 00000000 .word 0x00000000 + 80003564: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xfffffffffffffffe + 80003568: 00013303 ld x6,0(x2) + 8000356c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x8000000000000001 + 80003570: 00013a03 ld x20,0(x2) + 80003574: 00810113 addi x2,x2,8 + +0000000080003578 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64ds x9, x6, x20 # perform operation + 80003578: 3b4304b3 aes64ds x9,x6,x20 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000357c: 00083203 ld x4,0(x16) + 80003580: 00920c63 beq x4,x9,80003598 + 80003584: 37d072ef jal x5,8000b100 + 80003588: 80003578 .word 0x80003578 + 8000358c: 00000000 .word 0x00000000 + 80003590: 800186c3 .word 0x800186c3 + 80003594: 00000000 .word 0x00000000 + 80003598: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xfffffffffffffffe + 8000359c: 00013703 ld x14,0(x2) + 800035a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x7fffffffffffffff + 800035a4: 00013983 ld x19,0(x2) + 800035a8: 00810113 addi x2,x2,8 + +00000000800035ac : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ds x11, x14, x19 # perform operation + 800035ac: 3b3705b3 aes64ds x11,x14,x19 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b0: 00083203 ld x4,0(x16) + 800035b4: 00b20c63 beq x4,x11,800035cc + 800035b8: 349072ef jal x5,8000b100 + 800035bc: 800035ac .word 0x800035ac + 800035c0: 00000000 .word 0x00000000 + 800035c4: 80018735 .word 0x80018735 + 800035c8: 00000000 .word 0x00000000 + 800035cc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xfffffffffffffffe + 800035d0: 00013783 ld x15,0(x2) + 800035d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x7ffffffffffffffe + 800035d8: 00013e03 ld x28,0(x2) + 800035dc: 00810113 addi x2,x2,8 + +00000000800035e0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ds x19, x15, x28 # perform operation + 800035e0: 3bc789b3 aes64ds x19,x15,x28 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035e4: 00083203 ld x4,0(x16) + 800035e8: 01320c63 beq x4,x19,80003600 + 800035ec: 315072ef jal x5,8000b100 + 800035f0: 800035e0 .word 0x800035e0 + 800035f4: 00000000 .word 0x00000000 + 800035f8: 800187a7 .word 0x800187a7 + 800035fc: 00000000 .word 0x00000000 + 80003600: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xfffffffffffffffe + 80003604: 00013c83 ld x25,0(x2) + 80003608: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xffffffffffffffff + 8000360c: 00013e03 ld x28,0(x2) + 80003610: 00810113 addi x2,x2,8 + +0000000080003614 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ds x13, x25, x28 # perform operation + 80003614: 3bcc86b3 aes64ds x13,x25,x28 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003618: 00083203 ld x4,0(x16) + 8000361c: 00d20c63 beq x4,x13,80003634 + 80003620: 2e1072ef jal x5,8000b100 + 80003624: 80003614 .word 0x80003614 + 80003628: 00000000 .word 0x00000000 + 8000362c: 80018819 .word 0x80018819 + 80003630: 00000000 .word 0x00000000 + 80003634: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003638: 00013b03 ld x22,0(x2) + 8000363c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xfffffffffffffffe + 80003640: 00013683 ld x13,0(x2) + 80003644: 00810113 addi x2,x2,8 + +0000000080003648 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ds x20, x22, x13 # perform operation + 80003648: 3adb0a33 aes64ds x20,x22,x13 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000364c: 00083203 ld x4,0(x16) + 80003650: 01420c63 beq x4,x20,80003668 + 80003654: 2ad072ef jal x5,8000b100 + 80003658: 80003648 .word 0x80003648 + 8000365c: 00000000 .word 0x00000000 + 80003660: 8001888b .word 0x8001888b + 80003664: 00000000 .word 0x00000000 + 80003668: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xfffffffffffffffe + 8000366c: 00013a83 ld x21,0(x2) + 80003670: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80003674: 00013e83 ld x29,0(x2) + 80003678: 00810113 addi x2,x2,8 + +000000008000367c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ds x22, x21, x29 # perform operation + 8000367c: 3bda8b33 aes64ds x22,x21,x29 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003680: 00083203 ld x4,0(x16) + 80003684: 01620c63 beq x4,x22,8000369c + 80003688: 279072ef jal x5,8000b100 + 8000368c: 8000367c .word 0x8000367c + 80003690: 00000000 .word 0x00000000 + 80003694: 800188fd .word 0x800188fd + 80003698: 00000000 .word 0x00000000 + 8000369c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xfffffffffffffffe + 800036a0: 00013583 ld x11,0(x2) + 800036a4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 800036a8: 00013c83 ld x25,0(x2) + 800036ac: 00810113 addi x2,x2,8 + +00000000800036b0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x29, x11, x25 # perform operation + 800036b0: 3b958eb3 aes64ds x29,x11,x25 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036b4: 00083203 ld x4,0(x16) + 800036b8: 01d20c63 beq x4,x29,800036d0 + 800036bc: 245072ef jal x5,8000b100 + 800036c0: 800036b0 .word 0x800036b0 + 800036c4: 00000000 .word 0x00000000 + 800036c8: 8001896f .word 0x8001896f + 800036cc: 00000000 .word 0x00000000 + 800036d0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xfffffffffffffffe + 800036d4: 00013083 ld x1,0(x2) + 800036d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x5555555555555555 + 800036dc: 00013c03 ld x24,0(x2) + 800036e0: 00810113 addi x2,x2,8 + +00000000800036e4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64ds x19, x1, x24 # perform operation + 800036e4: 3b8089b3 aes64ds x19,x1,x24 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036e8: 00083203 ld x4,0(x16) + 800036ec: 01320c63 beq x4,x19,80003704 + 800036f0: 211072ef jal x5,8000b100 + 800036f4: 800036e4 .word 0x800036e4 + 800036f8: 00000000 .word 0x00000000 + 800036fc: 800189e1 .word 0x800189e1 + 80003700: 00000000 .word 0x00000000 + 80003704: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003708: 00013b03 ld x22,0(x2) + 8000370c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x00000000ffffffff + 80003710: 00013883 ld x17,0(x2) + 80003714: 00810113 addi x2,x2,8 + +0000000080003718 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64ds x14, x22, x17 # perform operation + 80003718: 3b1b0733 aes64ds x14,x22,x17 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000371c: 00083203 ld x4,0(x16) + 80003720: 00e20c63 beq x4,x14,80003738 + 80003724: 1dd072ef jal x5,8000b100 + 80003728: 80003718 .word 0x80003718 + 8000372c: 00000000 .word 0x00000000 + 80003730: 80018a53 .word 0x80018a53 + 80003734: 00000000 .word 0x00000000 + 80003738: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xfffffffffffffffe + 8000373c: 00013f03 ld x30,0(x2) + 80003740: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x00000000fffffffe + 80003744: 00013b83 ld x23,0(x2) + 80003748: 00810113 addi x2,x2,8 + +000000008000374c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64ds x22, x30, x23 # perform operation + 8000374c: 3b7f0b33 aes64ds x22,x30,x23 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003750: 00083203 ld x4,0(x16) + 80003754: 01620c63 beq x4,x22,8000376c + 80003758: 1a9072ef jal x5,8000b100 + 8000375c: 8000374c .word 0x8000374c + 80003760: 00000000 .word 0x00000000 + 80003764: 80018abd .word 0x80018abd + 80003768: 00000000 .word 0x00000000 + 8000376c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003770: 00013d83 ld x27,0(x2) + 80003774: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x0000000100000000 + 80003778: 00013f03 ld x30,0(x2) + 8000377c: 00810113 addi x2,x2,8 + +0000000080003780 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64ds x13, x27, x30 # perform operation + 80003780: 3bed86b3 aes64ds x13,x27,x30 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003784: 00083203 ld x4,0(x16) + 80003788: 00d20c63 beq x4,x13,800037a0 + 8000378c: 175072ef jal x5,8000b100 + 80003790: 80003780 .word 0x80003780 + 80003794: 00000000 .word 0x00000000 + 80003798: 80018b27 .word 0x80018b27 + 8000379c: 00000000 .word 0x00000000 + 800037a0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xfffffffffffffffe + 800037a4: 00013c03 ld x24,0(x2) + 800037a8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0000000100000001 + 800037ac: 00013b83 ld x23,0(x2) + 800037b0: 00810113 addi x2,x2,8 + +00000000800037b4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64ds x7, x24, x23 # perform operation + 800037b4: 3b7c03b3 aes64ds x7,x24,x23 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037b8: 00083203 ld x4,0(x16) + 800037bc: 00720c63 beq x4,x7,800037d4 + 800037c0: 141072ef jal x5,8000b100 + 800037c4: 800037b4 .word 0x800037b4 + 800037c8: 00000000 .word 0x00000000 + 800037cc: 80018b92 .word 0x80018b92 + 800037d0: 00000000 .word 0x00000000 + 800037d4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 800037d8: 00013a03 ld x20,0(x2) + 800037dc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x0000000000000000 + 800037e0: 00013603 ld x12,0(x2) + 800037e4: 00810113 addi x2,x2,8 + +00000000800037e8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64ds x13, x20, x12 # perform operation + 800037e8: 3aca06b3 aes64ds x13,x20,x12 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037ec: 00083203 ld x4,0(x16) + 800037f0: 00d20c63 beq x4,x13,80003808 + 800037f4: 10d072ef jal x5,8000b100 + 800037f8: 800037e8 .word 0x800037e8 + 800037fc: 00000000 .word 0x00000000 + 80003800: 80018bfd .word 0x80018bfd + 80003804: 00000000 .word 0x00000000 + 80003808: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 8000380c: 00013b83 ld x23,0(x2) + 80003810: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x0000000000000001 + 80003814: 00013f83 ld x31,0(x2) + 80003818: 00810113 addi x2,x2,8 + +000000008000381c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64ds x6, x23, x31 # perform operation + 8000381c: 3bfb8333 aes64ds x6,x23,x31 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003820: 00083203 ld x4,0(x16) + 80003824: 00620c63 beq x4,x6,8000383c + 80003828: 0d9072ef jal x5,8000b100 + 8000382c: 8000381c .word 0x8000381c + 80003830: 00000000 .word 0x00000000 + 80003834: 80018c60 .word 0x80018c60 + 80003838: 00000000 .word 0x00000000 + 8000383c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003840: 00013303 ld x6,0(x2) + 80003844: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x0000000000000002 + 80003848: 00013683 ld x13,0(x2) + 8000384c: 00810113 addi x2,x2,8 + +0000000080003850 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64ds x25, x6, x13 # perform operation + 80003850: 3ad30cb3 aes64ds x25,x6,x13 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003854: 00083203 ld x4,0(x16) + 80003858: 01920c63 beq x4,x25,80003870 + 8000385c: 0a5072ef jal x5,8000b100 + 80003860: 80003850 .word 0x80003850 + 80003864: 00000000 .word 0x00000000 + 80003868: 80018cc3 .word 0x80018cc3 + 8000386c: 00000000 .word 0x00000000 + 80003870: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003874: 00013303 ld x6,0(x2) + 80003878: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x8000000000000000 + 8000387c: 00013703 ld x14,0(x2) + 80003880: 00810113 addi x2,x2,8 + +0000000080003884 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64ds x27, x6, x14 # perform operation + 80003884: 3ae30db3 aes64ds x27,x6,x14 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003888: 00083203 ld x4,0(x16) + 8000388c: 01b20c63 beq x4,x27,800038a4 + 80003890: 071072ef jal x5,8000b100 + 80003894: 80003884 .word 0x80003884 + 80003898: 00000000 .word 0x00000000 + 8000389c: 80018d26 .word 0x80018d26 + 800038a0: 00000000 .word 0x00000000 + 800038a4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 800038a8: 00013b83 ld x23,0(x2) + 800038ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x8000000000000001 + 800038b0: 00013a03 ld x20,0(x2) + 800038b4: 00810113 addi x2,x2,8 + +00000000800038b8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64ds x30, x23, x20 # perform operation + 800038b8: 3b4b8f33 aes64ds x30,x23,x20 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038bc: 00083203 ld x4,0(x16) + 800038c0: 01e20c63 beq x4,x30,800038d8 + 800038c4: 03d072ef jal x5,8000b100 + 800038c8: 800038b8 .word 0x800038b8 + 800038cc: 00000000 .word 0x00000000 + 800038d0: 80018d98 .word 0x80018d98 + 800038d4: 00000000 .word 0x00000000 + 800038d8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 800038dc: 00013f03 ld x30,0(x2) + 800038e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x7fffffffffffffff + 800038e4: 00013503 ld x10,0(x2) + 800038e8: 00810113 addi x2,x2,8 + +00000000800038ec : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64ds x6, x30, x10 # perform operation + 800038ec: 3aaf0333 aes64ds x6,x30,x10 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f0: 00083203 ld x4,0(x16) + 800038f4: 00620c63 beq x4,x6,8000390c + 800038f8: 009072ef jal x5,8000b100 + 800038fc: 800038ec .word 0x800038ec + 80003900: 00000000 .word 0x00000000 + 80003904: 80018e0a .word 0x80018e0a + 80003908: 00000000 .word 0x00000000 + 8000390c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003910: 00013c83 ld x25,0(x2) + 80003914: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80003918: 00013983 ld x19,0(x2) + 8000391c: 00810113 addi x2,x2,8 + +0000000080003920 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64ds x12, x25, x19 # perform operation + 80003920: 3b3c8633 aes64ds x12,x25,x19 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003924: 00083203 ld x4,0(x16) + 80003928: 00c20c63 beq x4,x12,80003940 + 8000392c: 7d4072ef jal x5,8000b100 + 80003930: 80003920 .word 0x80003920 + 80003934: 00000000 .word 0x00000000 + 80003938: 80018e7c .word 0x80018e7c + 8000393c: 00000000 .word 0x00000000 + 80003940: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003944: 00013503 ld x10,0(x2) + 80003948: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xffffffffffffffff + 8000394c: 00013183 ld x3,0(x2) + 80003950: 00810113 addi x2,x2,8 + +0000000080003954 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64ds x25, x10, x3 # perform operation + 80003954: 3a350cb3 aes64ds x25,x10,x3 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003958: 00083203 ld x4,0(x16) + 8000395c: 01920c63 beq x4,x25,80003974 + 80003960: 7a0072ef jal x5,8000b100 + 80003964: 80003954 .word 0x80003954 + 80003968: 00000000 .word 0x00000000 + 8000396c: 80018eee .word 0x80018eee + 80003970: 00000000 .word 0x00000000 + 80003974: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003978: 00013b03 ld x22,0(x2) + 8000397c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0xfffffffffffffffe + 80003980: 00013883 ld x17,0(x2) + 80003984: 00810113 addi x2,x2,8 + +0000000080003988 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64ds x31, x22, x17 # perform operation + 80003988: 3b1b0fb3 aes64ds x31,x22,x17 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000398c: 00083203 ld x4,0(x16) + 80003990: 01f20c63 beq x4,x31,800039a8 + 80003994: 76c072ef jal x5,8000b100 + 80003998: 80003988 .word 0x80003988 + 8000399c: 00000000 .word 0x00000000 + 800039a0: 80018f60 .word 0x80018f60 + 800039a4: 00000000 .word 0x00000000 + 800039a8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 800039ac: 00013a83 ld x21,0(x2) + 800039b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 800039b4: 00013603 ld x12,0(x2) + 800039b8: 00810113 addi x2,x2,8 + +00000000800039bc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64ds x25, x21, x12 # perform operation + 800039bc: 3aca8cb3 aes64ds x25,x21,x12 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c0: 00083203 ld x4,0(x16) + 800039c4: 01920c63 beq x4,x25,800039dc + 800039c8: 738072ef jal x5,8000b100 + 800039cc: 800039bc .word 0x800039bc + 800039d0: 00000000 .word 0x00000000 + 800039d4: 80018fd2 .word 0x80018fd2 + 800039d8: 00000000 .word 0x00000000 + 800039dc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800039e0: 00013e83 ld x29,0(x2) + 800039e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 800039e8: 00013903 ld x18,0(x2) + 800039ec: 00810113 addi x2,x2,8 + +00000000800039f0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x9, x29, x18 # perform operation + 800039f0: 3b2e84b3 aes64ds x9,x29,x18 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039f4: 00083203 ld x4,0(x16) + 800039f8: 00920c63 beq x4,x9,80003a10 + 800039fc: 704072ef jal x5,8000b100 + 80003a00: 800039f0 .word 0x800039f0 + 80003a04: 00000000 .word 0x00000000 + 80003a08: 80019044 .word 0x80019044 + 80003a0c: 00000000 .word 0x00000000 + 80003a10: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003a14: 00013f03 ld x30,0(x2) + 80003a18: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x5555555555555555 + 80003a1c: 00013383 ld x7,0(x2) + 80003a20: 00810113 addi x2,x2,8 + +0000000080003a24 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64ds x3, x30, x7 # perform operation + 80003a24: 3a7f01b3 aes64ds x3,x30,x7 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a28: 00083203 ld x4,0(x16) + 80003a2c: 00320c63 beq x4,x3,80003a44 + 80003a30: 6d0072ef jal x5,8000b100 + 80003a34: 80003a24 .word 0x80003a24 + 80003a38: 00000000 .word 0x00000000 + 80003a3c: 800190b6 .word 0x800190b6 + 80003a40: 00000000 .word 0x00000000 + 80003a44: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003a48: 00013503 ld x10,0(x2) + 80003a4c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x00000000ffffffff + 80003a50: 00013083 ld x1,0(x2) + 80003a54: 00810113 addi x2,x2,8 + +0000000080003a58 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64ds x19, x10, x1 # perform operation + 80003a58: 3a1509b3 aes64ds x19,x10,x1 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a5c: 00083203 ld x4,0(x16) + 80003a60: 01320c63 beq x4,x19,80003a78 + 80003a64: 69c072ef jal x5,8000b100 + 80003a68: 80003a58 .word 0x80003a58 + 80003a6c: 00000000 .word 0x00000000 + 80003a70: 80019128 .word 0x80019128 + 80003a74: 00000000 .word 0x00000000 + 80003a78: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003a7c: 00013183 ld x3,0(x2) + 80003a80: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x00000000fffffffe + 80003a84: 00013a83 ld x21,0(x2) + 80003a88: 00810113 addi x2,x2,8 + +0000000080003a8c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64ds x10, x3, x21 # perform operation + 80003a8c: 3b518533 aes64ds x10,x3,x21 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a90: 00083203 ld x4,0(x16) + 80003a94: 00a20c63 beq x4,x10,80003aac + 80003a98: 668072ef jal x5,8000b100 + 80003a9c: 80003a8c .word 0x80003a8c + 80003aa0: 00000000 .word 0x00000000 + 80003aa4: 80019192 .word 0x80019192 + 80003aa8: 00000000 .word 0x00000000 + 80003aac: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80003ab0: 00013783 ld x15,0(x2) + 80003ab4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0000000100000000 + 80003ab8: 00013b83 ld x23,0(x2) + 80003abc: 00810113 addi x2,x2,8 + +0000000080003ac0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64ds x31, x15, x23 # perform operation + 80003ac0: 3b778fb3 aes64ds x31,x15,x23 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ac4: 00083203 ld x4,0(x16) + 80003ac8: 01f20c63 beq x4,x31,80003ae0 + 80003acc: 634072ef jal x5,8000b100 + 80003ad0: 80003ac0 .word 0x80003ac0 + 80003ad4: 00000000 .word 0x00000000 + 80003ad8: 800191fc .word 0x800191fc + 80003adc: 00000000 .word 0x00000000 + 80003ae0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 80003ae4: 00013403 ld x8,0(x2) + 80003ae8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x0000000100000001 + 80003aec: 00013e83 ld x29,0(x2) + 80003af0: 00810113 addi x2,x2,8 + +0000000080003af4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64ds x10, x8, x29 # perform operation + 80003af4: 3bd40533 aes64ds x10,x8,x29 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003af8: 00083203 ld x4,0(x16) + 80003afc: 00a20c63 beq x4,x10,80003b14 + 80003b00: 600072ef jal x5,8000b100 + 80003b04: 80003af4 .word 0x80003af4 + 80003b08: 00000000 .word 0x00000000 + 80003b0c: 80019267 .word 0x80019267 + 80003b10: 00000000 .word 0x00000000 + 80003b14: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003b18: 00013c03 ld x24,0(x2) + 80003b1c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x0000000000000000 + 80003b20: 00013983 ld x19,0(x2) + 80003b24: 00810113 addi x2,x2,8 + +0000000080003b28 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64ds x23, x24, x19 # perform operation + 80003b28: 3b3c0bb3 aes64ds x23,x24,x19 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b2c: 00083203 ld x4,0(x16) + 80003b30: 01720c63 beq x4,x23,80003b48 + 80003b34: 5cc072ef jal x5,8000b100 + 80003b38: 80003b28 .word 0x80003b28 + 80003b3c: 00000000 .word 0x00000000 + 80003b40: 800192d2 .word 0x800192d2 + 80003b44: 00000000 .word 0x00000000 + 80003b48: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003b4c: 00013583 ld x11,0(x2) + 80003b50: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x0000000000000001 + 80003b54: 00013383 ld x7,0(x2) + 80003b58: 00810113 addi x2,x2,8 + +0000000080003b5c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64ds x10, x11, x7 # perform operation + 80003b5c: 3a758533 aes64ds x10,x11,x7 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b60: 00083203 ld x4,0(x16) + 80003b64: 00a20c63 beq x4,x10,80003b7c + 80003b68: 598072ef jal x5,8000b100 + 80003b6c: 80003b5c .word 0x80003b5c + 80003b70: 00000000 .word 0x00000000 + 80003b74: 80019335 .word 0x80019335 + 80003b78: 00000000 .word 0x00000000 + 80003b7c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80003b80: 00013403 ld x8,0(x2) + 80003b84: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x0000000000000002 + 80003b88: 00013f83 ld x31,0(x2) + 80003b8c: 00810113 addi x2,x2,8 + +0000000080003b90 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64ds x3, x8, x31 # perform operation + 80003b90: 3bf401b3 aes64ds x3,x8,x31 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b94: 00083203 ld x4,0(x16) + 80003b98: 00320c63 beq x4,x3,80003bb0 + 80003b9c: 564072ef jal x5,8000b100 + 80003ba0: 80003b90 .word 0x80003b90 + 80003ba4: 00000000 .word 0x00000000 + 80003ba8: 80019398 .word 0x80019398 + 80003bac: 00000000 .word 0x00000000 + 80003bb0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003bb4: 00013883 ld x17,0(x2) + 80003bb8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x8000000000000000 + 80003bbc: 00013d83 ld x27,0(x2) + 80003bc0: 00810113 addi x2,x2,8 + +0000000080003bc4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64ds x8, x17, x27 # perform operation + 80003bc4: 3bb88433 aes64ds x8,x17,x27 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bc8: 00083203 ld x4,0(x16) + 80003bcc: 00820c63 beq x4,x8,80003be4 + 80003bd0: 530072ef jal x5,8000b100 + 80003bd4: 80003bc4 .word 0x80003bc4 + 80003bd8: 00000000 .word 0x00000000 + 80003bdc: 800193fb .word 0x800193fb + 80003be0: 00000000 .word 0x00000000 + 80003be4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80003be8: 00013c03 ld x24,0(x2) + 80003bec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x8000000000000001 + 80003bf0: 00013403 ld x8,0(x2) + 80003bf4: 00810113 addi x2,x2,8 + +0000000080003bf8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64ds x17, x24, x8 # perform operation + 80003bf8: 3a8c08b3 aes64ds x17,x24,x8 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003bfc: 00083203 ld x4,0(x16) + 80003c00: 01120c63 beq x4,x17,80003c18 + 80003c04: 4fc072ef jal x5,8000b100 + 80003c08: 80003bf8 .word 0x80003bf8 + 80003c0c: 00000000 .word 0x00000000 + 80003c10: 8001946d .word 0x8001946d + 80003c14: 00000000 .word 0x00000000 + 80003c18: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003c1c: 00013683 ld x13,0(x2) + 80003c20: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x7fffffffffffffff + 80003c24: 00013983 ld x19,0(x2) + 80003c28: 00810113 addi x2,x2,8 + +0000000080003c2c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64ds x21, x13, x19 # perform operation + 80003c2c: 3b368ab3 aes64ds x21,x13,x19 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c30: 00083203 ld x4,0(x16) + 80003c34: 01520c63 beq x4,x21,80003c4c + 80003c38: 4c8072ef jal x5,8000b100 + 80003c3c: 80003c2c .word 0x80003c2c + 80003c40: 00000000 .word 0x00000000 + 80003c44: 800194df .word 0x800194df + 80003c48: 00000000 .word 0x00000000 + 80003c4c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003c50: 00013583 ld x11,0(x2) + 80003c54: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80003c58: 00013903 ld x18,0(x2) + 80003c5c: 00810113 addi x2,x2,8 + +0000000080003c60 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64ds x3, x11, x18 # perform operation + 80003c60: 3b2581b3 aes64ds x3,x11,x18 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c64: 00083203 ld x4,0(x16) + 80003c68: 00320c63 beq x4,x3,80003c80 + 80003c6c: 494072ef jal x5,8000b100 + 80003c70: 80003c60 .word 0x80003c60 + 80003c74: 00000000 .word 0x00000000 + 80003c78: 80019551 .word 0x80019551 + 80003c7c: 00000000 .word 0x00000000 + 80003c80: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003c84: 00013583 ld x11,0(x2) + 80003c88: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xffffffffffffffff + 80003c8c: 00013e83 ld x29,0(x2) + 80003c90: 00810113 addi x2,x2,8 + +0000000080003c94 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64ds x12, x11, x29 # perform operation + 80003c94: 3bd58633 aes64ds x12,x11,x29 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c98: 00083203 ld x4,0(x16) + 80003c9c: 00c20c63 beq x4,x12,80003cb4 + 80003ca0: 460072ef jal x5,8000b100 + 80003ca4: 80003c94 .word 0x80003c94 + 80003ca8: 00000000 .word 0x00000000 + 80003cac: 800195c3 .word 0x800195c3 + 80003cb0: 00000000 .word 0x00000000 + 80003cb4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xaaaaaaaaaaaaaaaa + 80003cb8: 00013d83 ld x27,0(x2) + 80003cbc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0xfffffffffffffffe + 80003cc0: 00013583 ld x11,0(x2) + 80003cc4: 00810113 addi x2,x2,8 + +0000000080003cc8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64ds x24, x27, x11 # perform operation + 80003cc8: 3abd8c33 aes64ds x24,x27,x11 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003ccc: 00083203 ld x4,0(x16) + 80003cd0: 01820c63 beq x4,x24,80003ce8 + 80003cd4: 42c072ef jal x5,8000b100 + 80003cd8: 80003cc8 .word 0x80003cc8 + 80003cdc: 00000000 .word 0x00000000 + 80003ce0: 80019635 .word 0x80019635 + 80003ce4: 00000000 .word 0x00000000 + 80003ce8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003cec: 00013503 ld x10,0(x2) + 80003cf0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80003cf4: 00013b83 ld x23,0(x2) + 80003cf8: 00810113 addi x2,x2,8 + +0000000080003cfc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64ds x13, x10, x23 # perform operation + 80003cfc: 3b7506b3 aes64ds x13,x10,x23 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d00: 00083203 ld x4,0(x16) + 80003d04: 00d20c63 beq x4,x13,80003d1c + 80003d08: 3f8072ef jal x5,8000b100 + 80003d0c: 80003cfc .word 0x80003cfc + 80003d10: 00000000 .word 0x00000000 + 80003d14: 800196a7 .word 0x800196a7 + 80003d18: 00000000 .word 0x00000000 + 80003d1c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003d20: 00013483 ld x9,0(x2) + 80003d24: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80003d28: 00013883 ld x17,0(x2) + 80003d2c: 00810113 addi x2,x2,8 + +0000000080003d30 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x29, x9, x17 # perform operation + 80003d30: 3b148eb3 aes64ds x29,x9,x17 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d34: 00083203 ld x4,0(x16) + 80003d38: 01d20c63 beq x4,x29,80003d50 + 80003d3c: 3c4072ef jal x5,8000b100 + 80003d40: 80003d30 .word 0x80003d30 + 80003d44: 00000000 .word 0x00000000 + 80003d48: 80019719 .word 0x80019719 + 80003d4c: 00000000 .word 0x00000000 + 80003d50: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80003d54: 00013403 ld x8,0(x2) + 80003d58: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x5555555555555555 + 80003d5c: 00013303 ld x6,0(x2) + 80003d60: 00810113 addi x2,x2,8 + +0000000080003d64 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64ds x9, x8, x6 # perform operation + 80003d64: 3a6404b3 aes64ds x9,x8,x6 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d68: 00083203 ld x4,0(x16) + 80003d6c: 00920c63 beq x4,x9,80003d84 + 80003d70: 390072ef jal x5,8000b100 + 80003d74: 80003d64 .word 0x80003d64 + 80003d78: 00000000 .word 0x00000000 + 80003d7c: 8001978b .word 0x8001978b + 80003d80: 00000000 .word 0x00000000 + 80003d84: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003d88: 00013f03 ld x30,0(x2) + 80003d8c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x00000000ffffffff + 80003d90: 00013d83 ld x27,0(x2) + 80003d94: 00810113 addi x2,x2,8 + +0000000080003d98 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64ds x11, x30, x27 # perform operation + 80003d98: 3bbf05b3 aes64ds x11,x30,x27 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003d9c: 00083203 ld x4,0(x16) + 80003da0: 00b20c63 beq x4,x11,80003db8 + 80003da4: 35c072ef jal x5,8000b100 + 80003da8: 80003d98 .word 0x80003d98 + 80003dac: 00000000 .word 0x00000000 + 80003db0: 800197fd .word 0x800197fd + 80003db4: 00000000 .word 0x00000000 + 80003db8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003dbc: 00013303 ld x6,0(x2) + 80003dc0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x00000000fffffffe + 80003dc4: 00013e83 ld x29,0(x2) + 80003dc8: 00810113 addi x2,x2,8 + +0000000080003dcc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64ds x11, x6, x29 # perform operation + 80003dcc: 3bd305b3 aes64ds x11,x6,x29 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd0: 00083203 ld x4,0(x16) + 80003dd4: 00b20c63 beq x4,x11,80003dec + 80003dd8: 328072ef jal x5,8000b100 + 80003ddc: 80003dcc .word 0x80003dcc + 80003de0: 00000000 .word 0x00000000 + 80003de4: 80019867 .word 0x80019867 + 80003de8: 00000000 .word 0x00000000 + 80003dec: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003df0: 00013303 ld x6,0(x2) + 80003df4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x0000000100000000 + 80003df8: 00013783 ld x15,0(x2) + 80003dfc: 00810113 addi x2,x2,8 + +0000000080003e00 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64ds x3, x6, x15 # perform operation + 80003e00: 3af301b3 aes64ds x3,x6,x15 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e04: 00083203 ld x4,0(x16) + 80003e08: 00320c63 beq x4,x3,80003e20 + 80003e0c: 2f4072ef jal x5,8000b100 + 80003e10: 80003e00 .word 0x80003e00 + 80003e14: 00000000 .word 0x00000000 + 80003e18: 800198d1 .word 0x800198d1 + 80003e1c: 00000000 .word 0x00000000 + 80003e20: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003e24: 00013f83 ld x31,0(x2) + 80003e28: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x0000000100000001 + 80003e2c: 00013603 ld x12,0(x2) + 80003e30: 00810113 addi x2,x2,8 + +0000000080003e34 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64ds x11, x31, x12 # perform operation + 80003e34: 3acf85b3 aes64ds x11,x31,x12 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e38: 00083203 ld x4,0(x16) + 80003e3c: 00b20c63 beq x4,x11,80003e54 + 80003e40: 2c0072ef jal x5,8000b100 + 80003e44: 80003e34 .word 0x80003e34 + 80003e48: 00000000 .word 0x00000000 + 80003e4c: 8001993c .word 0x8001993c + 80003e50: 00000000 .word 0x00000000 + 80003e54: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x5555555555555555 + 80003e58: 00013783 ld x15,0(x2) + 80003e5c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0000000000000000 + 80003e60: 00013083 ld x1,0(x2) + 80003e64: 00810113 addi x2,x2,8 + +0000000080003e68 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64ds x28, x15, x1 # perform operation + 80003e68: 3a178e33 aes64ds x28,x15,x1 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e6c: 00083203 ld x4,0(x16) + 80003e70: 01c20c63 beq x4,x28,80003e88 + 80003e74: 28c072ef jal x5,8000b100 + 80003e78: 80003e68 .word 0x80003e68 + 80003e7c: 00000000 .word 0x00000000 + 80003e80: 800199a7 .word 0x800199a7 + 80003e84: 00000000 .word 0x00000000 + 80003e88: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x5555555555555555 + 80003e8c: 00013d03 ld x26,0(x2) + 80003e90: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x0000000000000001 + 80003e94: 00013e83 ld x29,0(x2) + 80003e98: 00810113 addi x2,x2,8 + +0000000080003e9c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64ds x8, x26, x29 # perform operation + 80003e9c: 3bdd0433 aes64ds x8,x26,x29 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea0: 00083203 ld x4,0(x16) + 80003ea4: 00820c63 beq x4,x8,80003ebc + 80003ea8: 258072ef jal x5,8000b100 + 80003eac: 80003e9c .word 0x80003e9c + 80003eb0: 00000000 .word 0x00000000 + 80003eb4: 80019a0a .word 0x80019a0a + 80003eb8: 00000000 .word 0x00000000 + 80003ebc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5555555555555555 + 80003ec0: 00013403 ld x8,0(x2) + 80003ec4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x0000000000000002 + 80003ec8: 00013583 ld x11,0(x2) + 80003ecc: 00810113 addi x2,x2,8 + +0000000080003ed0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64ds x25, x8, x11 # perform operation + 80003ed0: 3ab40cb3 aes64ds x25,x8,x11 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ed4: 00083203 ld x4,0(x16) + 80003ed8: 01920c63 beq x4,x25,80003ef0 + 80003edc: 224072ef jal x5,8000b100 + 80003ee0: 80003ed0 .word 0x80003ed0 + 80003ee4: 00000000 .word 0x00000000 + 80003ee8: 80019a6d .word 0x80019a6d + 80003eec: 00000000 .word 0x00000000 + 80003ef0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x5555555555555555 + 80003ef4: 00013883 ld x17,0(x2) + 80003ef8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x8000000000000000 + 80003efc: 00013e03 ld x28,0(x2) + 80003f00: 00810113 addi x2,x2,8 + +0000000080003f04 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64ds x30, x17, x28 # perform operation + 80003f04: 3bc88f33 aes64ds x30,x17,x28 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f08: 00083203 ld x4,0(x16) + 80003f0c: 01e20c63 beq x4,x30,80003f24 + 80003f10: 1f0072ef jal x5,8000b100 + 80003f14: 80003f04 .word 0x80003f04 + 80003f18: 00000000 .word 0x00000000 + 80003f1c: 80019ad0 .word 0x80019ad0 + 80003f20: 00000000 .word 0x00000000 + 80003f24: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x5555555555555555 + 80003f28: 00013d83 ld x27,0(x2) + 80003f2c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x8000000000000001 + 80003f30: 00013303 ld x6,0(x2) + 80003f34: 00810113 addi x2,x2,8 + +0000000080003f38 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64ds x14, x27, x6 # perform operation + 80003f38: 3a6d8733 aes64ds x14,x27,x6 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f3c: 00083203 ld x4,0(x16) + 80003f40: 00e20c63 beq x4,x14,80003f58 + 80003f44: 1bc072ef jal x5,8000b100 + 80003f48: 80003f38 .word 0x80003f38 + 80003f4c: 00000000 .word 0x00000000 + 80003f50: 80019b42 .word 0x80019b42 + 80003f54: 00000000 .word 0x00000000 + 80003f58: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x5555555555555555 + 80003f5c: 00013883 ld x17,0(x2) + 80003f60: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x7fffffffffffffff + 80003f64: 00013383 ld x7,0(x2) + 80003f68: 00810113 addi x2,x2,8 + +0000000080003f6c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64ds x14, x17, x7 # perform operation + 80003f6c: 3a788733 aes64ds x14,x17,x7 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f70: 00083203 ld x4,0(x16) + 80003f74: 00e20c63 beq x4,x14,80003f8c + 80003f78: 188072ef jal x5,8000b100 + 80003f7c: 80003f6c .word 0x80003f6c + 80003f80: 00000000 .word 0x00000000 + 80003f84: 80019bb4 .word 0x80019bb4 + 80003f88: 00000000 .word 0x00000000 + 80003f8c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x5555555555555555 + 80003f90: 00013c03 ld x24,0(x2) + 80003f94: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80003f98: 00013c83 ld x25,0(x2) + 80003f9c: 00810113 addi x2,x2,8 + +0000000080003fa0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64ds x31, x24, x25 # perform operation + 80003fa0: 3b9c0fb3 aes64ds x31,x24,x25 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fa4: 00083203 ld x4,0(x16) + 80003fa8: 01f20c63 beq x4,x31,80003fc0 + 80003fac: 154072ef jal x5,8000b100 + 80003fb0: 80003fa0 .word 0x80003fa0 + 80003fb4: 00000000 .word 0x00000000 + 80003fb8: 80019c26 .word 0x80019c26 + 80003fbc: 00000000 .word 0x00000000 + 80003fc0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x5555555555555555 + 80003fc4: 00013d03 ld x26,0(x2) + 80003fc8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xffffffffffffffff + 80003fcc: 00013503 ld x10,0(x2) + 80003fd0: 00810113 addi x2,x2,8 + +0000000080003fd4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64ds x1, x26, x10 # perform operation + 80003fd4: 3aad00b3 aes64ds x1,x26,x10 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fd8: 00083203 ld x4,0(x16) + 80003fdc: 00120c63 beq x4,x1,80003ff4 + 80003fe0: 120072ef jal x5,8000b100 + 80003fe4: 80003fd4 .word 0x80003fd4 + 80003fe8: 00000000 .word 0x00000000 + 80003fec: 80019c98 .word 0x80019c98 + 80003ff0: 00000000 .word 0x00000000 + 80003ff4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5555555555555555 + 80003ff8: 00013403 ld x8,0(x2) + 80003ffc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xfffffffffffffffe + 80004000: 00013303 ld x6,0(x2) + 80004004: 00810113 addi x2,x2,8 + +0000000080004008 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64ds x26, x8, x6 # perform operation + 80004008: 3a640d33 aes64ds x26,x8,x6 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000400c: 00083203 ld x4,0(x16) + 80004010: 01a20c63 beq x4,x26,80004028 + 80004014: 0ec072ef jal x5,8000b100 + 80004018: 80004008 .word 0x80004008 + 8000401c: 00000000 .word 0x00000000 + 80004020: 80019d0a .word 0x80019d0a + 80004024: 00000000 .word 0x00000000 + 80004028: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x5555555555555555 + 8000402c: 00013603 ld x12,0(x2) + 80004030: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80004034: 00013883 ld x17,0(x2) + 80004038: 00810113 addi x2,x2,8 + +000000008000403c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64ds x27, x12, x17 # perform operation + 8000403c: 3b160db3 aes64ds x27,x12,x17 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004040: 00083203 ld x4,0(x16) + 80004044: 01b20c63 beq x4,x27,8000405c + 80004048: 0b8072ef jal x5,8000b100 + 8000404c: 8000403c .word 0x8000403c + 80004050: 00000000 .word 0x00000000 + 80004054: 80019d7c .word 0x80019d7c + 80004058: 00000000 .word 0x00000000 + 8000405c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x5555555555555555 + 80004060: 00013703 ld x14,0(x2) + 80004064: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004068: 00013983 ld x19,0(x2) + 8000406c: 00810113 addi x2,x2,8 + +0000000080004070 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x31, x14, x19 # perform operation + 80004070: 3b370fb3 aes64ds x31,x14,x19 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004074: 00083203 ld x4,0(x16) + 80004078: 01f20c63 beq x4,x31,80004090 + 8000407c: 084072ef jal x5,8000b100 + 80004080: 80004070 .word 0x80004070 + 80004084: 00000000 .word 0x00000000 + 80004088: 80019dee .word 0x80019dee + 8000408c: 00000000 .word 0x00000000 + 80004090: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x5555555555555555 + 80004094: 00013a83 ld x21,0(x2) + 80004098: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x5555555555555555 + 8000409c: 00013983 ld x19,0(x2) + 800040a0: 00810113 addi x2,x2,8 + +00000000800040a4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64ds x3, x21, x19 # perform operation + 800040a4: 3b3a81b3 aes64ds x3,x21,x19 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040a8: 00083203 ld x4,0(x16) + 800040ac: 00320c63 beq x4,x3,800040c4 + 800040b0: 050072ef jal x5,8000b100 + 800040b4: 800040a4 .word 0x800040a4 + 800040b8: 00000000 .word 0x00000000 + 800040bc: 80019e60 .word 0x80019e60 + 800040c0: 00000000 .word 0x00000000 + 800040c4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x5555555555555555 + 800040c8: 00013c03 ld x24,0(x2) + 800040cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000ffffffff + 800040d0: 00013b03 ld x22,0(x2) + 800040d4: 00810113 addi x2,x2,8 + +00000000800040d8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64ds x13, x24, x22 # perform operation + 800040d8: 3b6c06b3 aes64ds x13,x24,x22 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040dc: 00083203 ld x4,0(x16) + 800040e0: 00d20c63 beq x4,x13,800040f8 + 800040e4: 01c072ef jal x5,8000b100 + 800040e8: 800040d8 .word 0x800040d8 + 800040ec: 00000000 .word 0x00000000 + 800040f0: 80019ed2 .word 0x80019ed2 + 800040f4: 00000000 .word 0x00000000 + 800040f8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x5555555555555555 + 800040fc: 00013403 ld x8,0(x2) + 80004100: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x00000000fffffffe + 80004104: 00013a03 ld x20,0(x2) + 80004108: 00810113 addi x2,x2,8 + +000000008000410c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64ds x31, x8, x20 # perform operation + 8000410c: 3b440fb3 aes64ds x31,x8,x20 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004110: 00083203 ld x4,0(x16) + 80004114: 01f20c63 beq x4,x31,8000412c + 80004118: 7e9062ef jal x5,8000b100 + 8000411c: 8000410c .word 0x8000410c + 80004120: 00000000 .word 0x00000000 + 80004124: 80019f3c .word 0x80019f3c + 80004128: 00000000 .word 0x00000000 + 8000412c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x5555555555555555 + 80004130: 00013083 ld x1,0(x2) + 80004134: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0000000100000000 + 80004138: 00013b83 ld x23,0(x2) + 8000413c: 00810113 addi x2,x2,8 + +0000000080004140 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64ds x14, x1, x23 # perform operation + 80004140: 3b708733 aes64ds x14,x1,x23 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004144: 00083203 ld x4,0(x16) + 80004148: 00e20c63 beq x4,x14,80004160 + 8000414c: 7b5062ef jal x5,8000b100 + 80004150: 80004140 .word 0x80004140 + 80004154: 00000000 .word 0x00000000 + 80004158: 80019fa6 .word 0x80019fa6 + 8000415c: 00000000 .word 0x00000000 + 80004160: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x5555555555555555 + 80004164: 00013703 ld x14,0(x2) + 80004168: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x0000000100000001 + 8000416c: 00013483 ld x9,0(x2) + 80004170: 00810113 addi x2,x2,8 + +0000000080004174 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64ds x19, x14, x9 # perform operation + 80004174: 3a9709b3 aes64ds x19,x14,x9 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004178: 00083203 ld x4,0(x16) + 8000417c: 01320c63 beq x4,x19,80004194 + 80004180: 781062ef jal x5,8000b100 + 80004184: 80004174 .word 0x80004174 + 80004188: 00000000 .word 0x00000000 + 8000418c: 8001a011 .word 0x8001a011 + 80004190: 00000000 .word 0x00000000 + 80004194: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x00000000ffffffff + 80004198: 00013303 ld x6,0(x2) + 8000419c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x0000000000000000 + 800041a0: 00013d83 ld x27,0(x2) + 800041a4: 00810113 addi x2,x2,8 + +00000000800041a8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64ds x21, x6, x27 # perform operation + 800041a8: 3bb30ab3 aes64ds x21,x6,x27 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041ac: 00083203 ld x4,0(x16) + 800041b0: 01520c63 beq x4,x21,800041c8 + 800041b4: 74d062ef jal x5,8000b100 + 800041b8: 800041a8 .word 0x800041a8 + 800041bc: 00000000 .word 0x00000000 + 800041c0: 8001a07c .word 0x8001a07c + 800041c4: 00000000 .word 0x00000000 + 800041c8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x00000000ffffffff + 800041cc: 00013b83 ld x23,0(x2) + 800041d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x0000000000000001 + 800041d4: 00013483 ld x9,0(x2) + 800041d8: 00810113 addi x2,x2,8 + +00000000800041dc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64ds x26, x23, x9 # perform operation + 800041dc: 3a9b8d33 aes64ds x26,x23,x9 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e0: 00083203 ld x4,0(x16) + 800041e4: 01a20c63 beq x4,x26,800041fc + 800041e8: 719062ef jal x5,8000b100 + 800041ec: 800041dc .word 0x800041dc + 800041f0: 00000000 .word 0x00000000 + 800041f4: 8001a0d7 .word 0x8001a0d7 + 800041f8: 00000000 .word 0x00000000 + 800041fc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x00000000ffffffff + 80004200: 00013603 ld x12,0(x2) + 80004204: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x0000000000000002 + 80004208: 00013f83 ld x31,0(x2) + 8000420c: 00810113 addi x2,x2,8 + +0000000080004210 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64ds x23, x12, x31 # perform operation + 80004210: 3bf60bb3 aes64ds x23,x12,x31 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004214: 00083203 ld x4,0(x16) + 80004218: 01720c63 beq x4,x23,80004230 + 8000421c: 6e5062ef jal x5,8000b100 + 80004220: 80004210 .word 0x80004210 + 80004224: 00000000 .word 0x00000000 + 80004228: 8001a132 .word 0x8001a132 + 8000422c: 00000000 .word 0x00000000 + 80004230: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x00000000ffffffff + 80004234: 00013883 ld x17,0(x2) + 80004238: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x8000000000000000 + 8000423c: 00013d03 ld x26,0(x2) + 80004240: 00810113 addi x2,x2,8 + +0000000080004244 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64ds x12, x17, x26 # perform operation + 80004244: 3ba88633 aes64ds x12,x17,x26 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004248: 00083203 ld x4,0(x16) + 8000424c: 00c20c63 beq x4,x12,80004264 + 80004250: 6b1062ef jal x5,8000b100 + 80004254: 80004244 .word 0x80004244 + 80004258: 00000000 .word 0x00000000 + 8000425c: 8001a18d .word 0x8001a18d + 80004260: 00000000 .word 0x00000000 + 80004264: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x00000000ffffffff + 80004268: 00013d03 ld x26,0(x2) + 8000426c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x8000000000000001 + 80004270: 00013f03 ld x30,0(x2) + 80004274: 00810113 addi x2,x2,8 + +0000000080004278 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64ds x19, x26, x30 # perform operation + 80004278: 3bed09b3 aes64ds x19,x26,x30 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000427c: 00083203 ld x4,0(x16) + 80004280: 01320c63 beq x4,x19,80004298 + 80004284: 67d062ef jal x5,8000b100 + 80004288: 80004278 .word 0x80004278 + 8000428c: 00000000 .word 0x00000000 + 80004290: 8001a1f7 .word 0x8001a1f7 + 80004294: 00000000 .word 0x00000000 + 80004298: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x00000000ffffffff + 8000429c: 00013503 ld x10,0(x2) + 800042a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x7fffffffffffffff + 800042a4: 00013683 ld x13,0(x2) + 800042a8: 00810113 addi x2,x2,8 + +00000000800042ac : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64ds x9, x10, x13 # perform operation + 800042ac: 3ad504b3 aes64ds x9,x10,x13 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b0: 00083203 ld x4,0(x16) + 800042b4: 00920c63 beq x4,x9,800042cc + 800042b8: 649062ef jal x5,8000b100 + 800042bc: 800042ac .word 0x800042ac + 800042c0: 00000000 .word 0x00000000 + 800042c4: 8001a261 .word 0x8001a261 + 800042c8: 00000000 .word 0x00000000 + 800042cc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x00000000ffffffff + 800042d0: 00013083 ld x1,0(x2) + 800042d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x7ffffffffffffffe + 800042d8: 00013483 ld x9,0(x2) + 800042dc: 00810113 addi x2,x2,8 + +00000000800042e0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64ds x12, x1, x9 # perform operation + 800042e0: 3a908633 aes64ds x12,x1,x9 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042e4: 00083203 ld x4,0(x16) + 800042e8: 00c20c63 beq x4,x12,80004300 + 800042ec: 615062ef jal x5,8000b100 + 800042f0: 800042e0 .word 0x800042e0 + 800042f4: 00000000 .word 0x00000000 + 800042f8: 8001a2cb .word 0x8001a2cb + 800042fc: 00000000 .word 0x00000000 + 80004300: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x00000000ffffffff + 80004304: 00013a03 ld x20,0(x2) + 80004308: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xffffffffffffffff + 8000430c: 00013c83 ld x25,0(x2) + 80004310: 00810113 addi x2,x2,8 + +0000000080004314 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64ds x12, x20, x25 # perform operation + 80004314: 3b9a0633 aes64ds x12,x20,x25 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004318: 00083203 ld x4,0(x16) + 8000431c: 00c20c63 beq x4,x12,80004334 + 80004320: 5e1062ef jal x5,8000b100 + 80004324: 80004314 .word 0x80004314 + 80004328: 00000000 .word 0x00000000 + 8000432c: 8001a335 .word 0x8001a335 + 80004330: 00000000 .word 0x00000000 + 80004334: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x00000000ffffffff + 80004338: 00013683 ld x13,0(x2) + 8000433c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xfffffffffffffffe + 80004340: 00013503 ld x10,0(x2) + 80004344: 00810113 addi x2,x2,8 + +0000000080004348 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64ds x29, x13, x10 # perform operation + 80004348: 3aa68eb3 aes64ds x29,x13,x10 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000434c: 00083203 ld x4,0(x16) + 80004350: 01d20c63 beq x4,x29,80004368 + 80004354: 5ad062ef jal x5,8000b100 + 80004358: 80004348 .word 0x80004348 + 8000435c: 00000000 .word 0x00000000 + 80004360: 8001a39f .word 0x8001a39f + 80004364: 00000000 .word 0x00000000 + 80004368: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000000ffffffff + 8000436c: 00013403 ld x8,0(x2) + 80004370: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80004374: 00013583 ld x11,0(x2) + 80004378: 00810113 addi x2,x2,8 + +000000008000437c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64ds x29, x8, x11 # perform operation + 8000437c: 3ab40eb3 aes64ds x29,x8,x11 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004380: 00083203 ld x4,0(x16) + 80004384: 01d20c63 beq x4,x29,8000439c + 80004388: 579062ef jal x5,8000b100 + 8000438c: 8000437c .word 0x8000437c + 80004390: 00000000 .word 0x00000000 + 80004394: 8001a409 .word 0x8001a409 + 80004398: 00000000 .word 0x00000000 + 8000439c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x00000000ffffffff + 800043a0: 00013f83 ld x31,0(x2) + 800043a4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 800043a8: 00013483 ld x9,0(x2) + 800043ac: 00810113 addi x2,x2,8 + +00000000800043b0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x29, x31, x9 # perform operation + 800043b0: 3a9f8eb3 aes64ds x29,x31,x9 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043b4: 00083203 ld x4,0(x16) + 800043b8: 01d20c63 beq x4,x29,800043d0 + 800043bc: 545062ef jal x5,8000b100 + 800043c0: 800043b0 .word 0x800043b0 + 800043c4: 00000000 .word 0x00000000 + 800043c8: 8001a473 .word 0x8001a473 + 800043cc: 00000000 .word 0x00000000 + 800043d0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x00000000ffffffff + 800043d4: 00013703 ld x14,0(x2) + 800043d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x5555555555555555 + 800043dc: 00013c83 ld x25,0(x2) + 800043e0: 00810113 addi x2,x2,8 + +00000000800043e4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64ds x27, x14, x25 # perform operation + 800043e4: 3b970db3 aes64ds x27,x14,x25 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043e8: 00083203 ld x4,0(x16) + 800043ec: 01b20c63 beq x4,x27,80004404 + 800043f0: 511062ef jal x5,8000b100 + 800043f4: 800043e4 .word 0x800043e4 + 800043f8: 00000000 .word 0x00000000 + 800043fc: 8001a4dd .word 0x8001a4dd + 80004400: 00000000 .word 0x00000000 + 80004404: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x00000000ffffffff + 80004408: 00013583 ld x11,0(x2) + 8000440c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x00000000ffffffff + 80004410: 00013303 ld x6,0(x2) + 80004414: 00810113 addi x2,x2,8 + +0000000080004418 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64ds x13, x11, x6 # perform operation + 80004418: 3a6586b3 aes64ds x13,x11,x6 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000441c: 00083203 ld x4,0(x16) + 80004420: 00d20c63 beq x4,x13,80004438 + 80004424: 4dd062ef jal x5,8000b100 + 80004428: 80004418 .word 0x80004418 + 8000442c: 00000000 .word 0x00000000 + 80004430: 8001a547 .word 0x8001a547 + 80004434: 00000000 .word 0x00000000 + 80004438: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x00000000ffffffff + 8000443c: 00013303 ld x6,0(x2) + 80004440: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x00000000fffffffe + 80004444: 00013d03 ld x26,0(x2) + 80004448: 00810113 addi x2,x2,8 + +000000008000444c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64ds x15, x6, x26 # perform operation + 8000444c: 3ba307b3 aes64ds x15,x6,x26 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004450: 00083203 ld x4,0(x16) + 80004454: 00f20c63 beq x4,x15,8000446c + 80004458: 4a9062ef jal x5,8000b100 + 8000445c: 8000444c .word 0x8000444c + 80004460: 00000000 .word 0x00000000 + 80004464: 8001a5a9 .word 0x8001a5a9 + 80004468: 00000000 .word 0x00000000 + 8000446c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x00000000ffffffff + 80004470: 00013f03 ld x30,0(x2) + 80004474: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x0000000100000000 + 80004478: 00013483 ld x9,0(x2) + 8000447c: 00810113 addi x2,x2,8 + +0000000080004480 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64ds x11, x30, x9 # perform operation + 80004480: 3a9f05b3 aes64ds x11,x30,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004484: 00083203 ld x4,0(x16) + 80004488: 00b20c63 beq x4,x11,800044a0 + 8000448c: 475062ef jal x5,8000b100 + 80004490: 80004480 .word 0x80004480 + 80004494: 00000000 .word 0x00000000 + 80004498: 8001a60b .word 0x8001a60b + 8000449c: 00000000 .word 0x00000000 + 800044a0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x00000000ffffffff + 800044a4: 00013583 ld x11,0(x2) + 800044a8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x0000000100000001 + 800044ac: 00013a03 ld x20,0(x2) + 800044b0: 00810113 addi x2,x2,8 + +00000000800044b4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64ds x27, x11, x20 # perform operation + 800044b4: 3b458db3 aes64ds x27,x11,x20 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044b8: 00083203 ld x4,0(x16) + 800044bc: 01b20c63 beq x4,x27,800044d4 + 800044c0: 441062ef jal x5,8000b100 + 800044c4: 800044b4 .word 0x800044b4 + 800044c8: 00000000 .word 0x00000000 + 800044cc: 8001a66e .word 0x8001a66e + 800044d0: 00000000 .word 0x00000000 + 800044d4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x00000000fffffffe + 800044d8: 00013383 ld x7,0(x2) + 800044dc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x0000000000000000 + 800044e0: 00013a83 ld x21,0(x2) + 800044e4: 00810113 addi x2,x2,8 + +00000000800044e8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64ds x30, x7, x21 # perform operation + 800044e8: 3b538f33 aes64ds x30,x7,x21 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044ec: 00083203 ld x4,0(x16) + 800044f0: 01e20c63 beq x4,x30,80004508 + 800044f4: 40d062ef jal x5,8000b100 + 800044f8: 800044e8 .word 0x800044e8 + 800044fc: 00000000 .word 0x00000000 + 80004500: 8001a6d1 .word 0x8001a6d1 + 80004504: 00000000 .word 0x00000000 + 80004508: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x00000000fffffffe + 8000450c: 00013d03 ld x26,0(x2) + 80004510: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0000000000000001 + 80004514: 00013903 ld x18,0(x2) + 80004518: 00810113 addi x2,x2,8 + +000000008000451c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64ds x3, x26, x18 # perform operation + 8000451c: 3b2d01b3 aes64ds x3,x26,x18 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004520: 00083203 ld x4,0(x16) + 80004524: 00320c63 beq x4,x3,8000453c + 80004528: 3d9062ef jal x5,8000b100 + 8000452c: 8000451c .word 0x8000451c + 80004530: 00000000 .word 0x00000000 + 80004534: 8001a72c .word 0x8001a72c + 80004538: 00000000 .word 0x00000000 + 8000453c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000000fffffffe + 80004540: 00013e03 ld x28,0(x2) + 80004544: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x0000000000000002 + 80004548: 00013683 ld x13,0(x2) + 8000454c: 00810113 addi x2,x2,8 + +0000000080004550 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64ds x1, x28, x13 # perform operation + 80004550: 3ade00b3 aes64ds x1,x28,x13 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004554: 00083203 ld x4,0(x16) + 80004558: 00120c63 beq x4,x1,80004570 + 8000455c: 3a5062ef jal x5,8000b100 + 80004560: 80004550 .word 0x80004550 + 80004564: 00000000 .word 0x00000000 + 80004568: 8001a787 .word 0x8001a787 + 8000456c: 00000000 .word 0x00000000 + 80004570: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000000fffffffe + 80004574: 00013e03 ld x28,0(x2) + 80004578: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x8000000000000000 + 8000457c: 00013983 ld x19,0(x2) + 80004580: 00810113 addi x2,x2,8 + +0000000080004584 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64ds x8, x28, x19 # perform operation + 80004584: 3b3e0433 aes64ds x8,x28,x19 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004588: 00083203 ld x4,0(x16) + 8000458c: 00820c63 beq x4,x8,800045a4 + 80004590: 371062ef jal x5,8000b100 + 80004594: 80004584 .word 0x80004584 + 80004598: 00000000 .word 0x00000000 + 8000459c: 8001a7e2 .word 0x8001a7e2 + 800045a0: 00000000 .word 0x00000000 + 800045a4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x00000000fffffffe + 800045a8: 00013183 ld x3,0(x2) + 800045ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x8000000000000001 + 800045b0: 00013483 ld x9,0(x2) + 800045b4: 00810113 addi x2,x2,8 + +00000000800045b8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64ds x19, x3, x9 # perform operation + 800045b8: 3a9189b3 aes64ds x19,x3,x9 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045bc: 00083203 ld x4,0(x16) + 800045c0: 01320c63 beq x4,x19,800045d8 + 800045c4: 33d062ef jal x5,8000b100 + 800045c8: 800045b8 .word 0x800045b8 + 800045cc: 00000000 .word 0x00000000 + 800045d0: 8001a84c .word 0x8001a84c + 800045d4: 00000000 .word 0x00000000 + 800045d8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x00000000fffffffe + 800045dc: 00013a03 ld x20,0(x2) + 800045e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x7fffffffffffffff + 800045e4: 00013b83 ld x23,0(x2) + 800045e8: 00810113 addi x2,x2,8 + +00000000800045ec : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64ds x17, x20, x23 # perform operation + 800045ec: 3b7a08b3 aes64ds x17,x20,x23 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f0: 00083203 ld x4,0(x16) + 800045f4: 01120c63 beq x4,x17,8000460c + 800045f8: 309062ef jal x5,8000b100 + 800045fc: 800045ec .word 0x800045ec + 80004600: 00000000 .word 0x00000000 + 80004604: 8001a8b6 .word 0x8001a8b6 + 80004608: 00000000 .word 0x00000000 + 8000460c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x00000000fffffffe + 80004610: 00013783 ld x15,0(x2) + 80004614: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80004618: 00013903 ld x18,0(x2) + 8000461c: 00810113 addi x2,x2,8 + +0000000080004620 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64ds x10, x15, x18 # perform operation + 80004620: 3b278533 aes64ds x10,x15,x18 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004624: 00083203 ld x4,0(x16) + 80004628: 00a20c63 beq x4,x10,80004640 + 8000462c: 2d5062ef jal x5,8000b100 + 80004630: 80004620 .word 0x80004620 + 80004634: 00000000 .word 0x00000000 + 80004638: 8001a920 .word 0x8001a920 + 8000463c: 00000000 .word 0x00000000 + 80004640: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x00000000fffffffe + 80004644: 00013e83 ld x29,0(x2) + 80004648: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xffffffffffffffff + 8000464c: 00013603 ld x12,0(x2) + 80004650: 00810113 addi x2,x2,8 + +0000000080004654 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64ds x18, x29, x12 # perform operation + 80004654: 3ace8933 aes64ds x18,x29,x12 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004658: 00083203 ld x4,0(x16) + 8000465c: 01220c63 beq x4,x18,80004674 + 80004660: 2a1062ef jal x5,8000b100 + 80004664: 80004654 .word 0x80004654 + 80004668: 00000000 .word 0x00000000 + 8000466c: 8001a98a .word 0x8001a98a + 80004670: 00000000 .word 0x00000000 + 80004674: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000000fffffffe + 80004678: 00013403 ld x8,0(x2) + 8000467c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xfffffffffffffffe + 80004680: 00013a83 ld x21,0(x2) + 80004684: 00810113 addi x2,x2,8 + +0000000080004688 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64ds x30, x8, x21 # perform operation + 80004688: 3b540f33 aes64ds x30,x8,x21 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000468c: 00083203 ld x4,0(x16) + 80004690: 01e20c63 beq x4,x30,800046a8 + 80004694: 26d062ef jal x5,8000b100 + 80004698: 80004688 .word 0x80004688 + 8000469c: 00000000 .word 0x00000000 + 800046a0: 8001a9f4 .word 0x8001a9f4 + 800046a4: 00000000 .word 0x00000000 + 800046a8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x00000000fffffffe + 800046ac: 00013b03 ld x22,0(x2) + 800046b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 800046b4: 00013e03 ld x28,0(x2) + 800046b8: 00810113 addi x2,x2,8 + +00000000800046bc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64ds x19, x22, x28 # perform operation + 800046bc: 3bcb09b3 aes64ds x19,x22,x28 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c0: 00083203 ld x4,0(x16) + 800046c4: 01320c63 beq x4,x19,800046dc + 800046c8: 239062ef jal x5,8000b100 + 800046cc: 800046bc .word 0x800046bc + 800046d0: 00000000 .word 0x00000000 + 800046d4: 8001aa5e .word 0x8001aa5e + 800046d8: 00000000 .word 0x00000000 + 800046dc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x00000000fffffffe + 800046e0: 00013903 ld x18,0(x2) + 800046e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 800046e8: 00013483 ld x9,0(x2) + 800046ec: 00810113 addi x2,x2,8 + +00000000800046f0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x28, x18, x9 # perform operation + 800046f0: 3a990e33 aes64ds x28,x18,x9 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046f4: 00083203 ld x4,0(x16) + 800046f8: 01c20c63 beq x4,x28,80004710 + 800046fc: 205062ef jal x5,8000b100 + 80004700: 800046f0 .word 0x800046f0 + 80004704: 00000000 .word 0x00000000 + 80004708: 8001aac8 .word 0x8001aac8 + 8000470c: 00000000 .word 0x00000000 + 80004710: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x00000000fffffffe + 80004714: 00013f83 ld x31,0(x2) + 80004718: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x5555555555555555 + 8000471c: 00013903 ld x18,0(x2) + 80004720: 00810113 addi x2,x2,8 + +0000000080004724 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64ds x29, x31, x18 # perform operation + 80004724: 3b2f8eb3 aes64ds x29,x31,x18 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004728: 00083203 ld x4,0(x16) + 8000472c: 01d20c63 beq x4,x29,80004744 + 80004730: 1d1062ef jal x5,8000b100 + 80004734: 80004724 .word 0x80004724 + 80004738: 00000000 .word 0x00000000 + 8000473c: 8001ab32 .word 0x8001ab32 + 80004740: 00000000 .word 0x00000000 + 80004744: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x00000000fffffffe + 80004748: 00013403 ld x8,0(x2) + 8000474c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x00000000ffffffff + 80004750: 00013583 ld x11,0(x2) + 80004754: 00810113 addi x2,x2,8 + +0000000080004758 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64ds x19, x8, x11 # perform operation + 80004758: 3ab409b3 aes64ds x19,x8,x11 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000475c: 00083203 ld x4,0(x16) + 80004760: 01320c63 beq x4,x19,80004778 + 80004764: 19d062ef jal x5,8000b100 + 80004768: 80004758 .word 0x80004758 + 8000476c: 00000000 .word 0x00000000 + 80004770: 8001ab9c .word 0x8001ab9c + 80004774: 00000000 .word 0x00000000 + 80004778: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x00000000fffffffe + 8000477c: 00013b83 ld x23,0(x2) + 80004780: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x00000000fffffffe + 80004784: 00013c83 ld x25,0(x2) + 80004788: 00810113 addi x2,x2,8 + +000000008000478c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64ds x31, x23, x25 # perform operation + 8000478c: 3b9b8fb3 aes64ds x31,x23,x25 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004790: 00083203 ld x4,0(x16) + 80004794: 01f20c63 beq x4,x31,800047ac + 80004798: 169062ef jal x5,8000b100 + 8000479c: 8000478c .word 0x8000478c + 800047a0: 00000000 .word 0x00000000 + 800047a4: 8001abfe .word 0x8001abfe + 800047a8: 00000000 .word 0x00000000 + 800047ac: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x00000000fffffffe + 800047b0: 00013f03 ld x30,0(x2) + 800047b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0000000100000000 + 800047b8: 00013d03 ld x26,0(x2) + 800047bc: 00810113 addi x2,x2,8 + +00000000800047c0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64ds x8, x30, x26 # perform operation + 800047c0: 3baf0433 aes64ds x8,x30,x26 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047c4: 00083203 ld x4,0(x16) + 800047c8: 00820c63 beq x4,x8,800047e0 + 800047cc: 135062ef jal x5,8000b100 + 800047d0: 800047c0 .word 0x800047c0 + 800047d4: 00000000 .word 0x00000000 + 800047d8: 8001ac60 .word 0x8001ac60 + 800047dc: 00000000 .word 0x00000000 + 800047e0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000000fffffffe + 800047e4: 00013e03 ld x28,0(x2) + 800047e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0000000100000001 + 800047ec: 00013b83 ld x23,0(x2) + 800047f0: 00810113 addi x2,x2,8 + +00000000800047f4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64ds x6, x28, x23 # perform operation + 800047f4: 3b7e0333 aes64ds x6,x28,x23 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047f8: 00083203 ld x4,0(x16) + 800047fc: 00620c63 beq x4,x6,80004814 + 80004800: 101062ef jal x5,8000b100 + 80004804: 800047f4 .word 0x800047f4 + 80004808: 00000000 .word 0x00000000 + 8000480c: 8001acc3 .word 0x8001acc3 + 80004810: 00000000 .word 0x00000000 + 80004814: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x0000000100000000 + 80004818: 00013c03 ld x24,0(x2) + 8000481c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x0000000000000000 + 80004820: 00013683 ld x13,0(x2) + 80004824: 00810113 addi x2,x2,8 + +0000000080004828 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64ds x1, x24, x13 # perform operation + 80004828: 3adc00b3 aes64ds x1,x24,x13 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000482c: 00083203 ld x4,0(x16) + 80004830: 00120c63 beq x4,x1,80004848 + 80004834: 0cd062ef jal x5,8000b100 + 80004838: 80004828 .word 0x80004828 + 8000483c: 00000000 .word 0x00000000 + 80004840: 8001ad26 .word 0x8001ad26 + 80004844: 00000000 .word 0x00000000 + 80004848: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x0000000100000000 + 8000484c: 00013303 ld x6,0(x2) + 80004850: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x0000000000000001 + 80004854: 00013403 ld x8,0(x2) + 80004858: 00810113 addi x2,x2,8 + +000000008000485c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64ds x10, x6, x8 # perform operation + 8000485c: 3a830533 aes64ds x10,x6,x8 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004860: 00083203 ld x4,0(x16) + 80004864: 00a20c63 beq x4,x10,8000487c + 80004868: 099062ef jal x5,8000b100 + 8000486c: 8000485c .word 0x8000485c + 80004870: 00000000 .word 0x00000000 + 80004874: 8001ad82 .word 0x8001ad82 + 80004878: 00000000 .word 0x00000000 + 8000487c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x0000000100000000 + 80004880: 00013a83 ld x21,0(x2) + 80004884: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x0000000000000002 + 80004888: 00013503 ld x10,0(x2) + 8000488c: 00810113 addi x2,x2,8 + +0000000080004890 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64ds x15, x21, x10 # perform operation + 80004890: 3aaa87b3 aes64ds x15,x21,x10 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004894: 00083203 ld x4,0(x16) + 80004898: 00f20c63 beq x4,x15,800048b0 + 8000489c: 065062ef jal x5,8000b100 + 800048a0: 80004890 .word 0x80004890 + 800048a4: 00000000 .word 0x00000000 + 800048a8: 8001adde .word 0x8001adde + 800048ac: 00000000 .word 0x00000000 + 800048b0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000100000000 + 800048b4: 00013f83 ld x31,0(x2) + 800048b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x8000000000000000 + 800048bc: 00013483 ld x9,0(x2) + 800048c0: 00810113 addi x2,x2,8 + +00000000800048c4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64ds x6, x31, x9 # perform operation + 800048c4: 3a9f8333 aes64ds x6,x31,x9 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048c8: 00083203 ld x4,0(x16) + 800048cc: 00620c63 beq x4,x6,800048e4 + 800048d0: 031062ef jal x5,8000b100 + 800048d4: 800048c4 .word 0x800048c4 + 800048d8: 00000000 .word 0x00000000 + 800048dc: 8001ae3a .word 0x8001ae3a + 800048e0: 00000000 .word 0x00000000 + 800048e4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000100000000 + 800048e8: 00013503 ld x10,0(x2) + 800048ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x8000000000000001 + 800048f0: 00013b03 ld x22,0(x2) + 800048f4: 00810113 addi x2,x2,8 + +00000000800048f8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64ds x7, x10, x22 # perform operation + 800048f8: 3b6503b3 aes64ds x7,x10,x22 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 800048fc: 00083203 ld x4,0(x16) + 80004900: 00720c63 beq x4,x7,80004918 + 80004904: 7fc062ef jal x5,8000b100 + 80004908: 800048f8 .word 0x800048f8 + 8000490c: 00000000 .word 0x00000000 + 80004910: 8001aea5 .word 0x8001aea5 + 80004914: 00000000 .word 0x00000000 + 80004918: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000100000000 + 8000491c: 00013f83 ld x31,0(x2) + 80004920: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x7fffffffffffffff + 80004924: 00013383 ld x7,0(x2) + 80004928: 00810113 addi x2,x2,8 + +000000008000492c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64ds x28, x31, x7 # perform operation + 8000492c: 3a7f8e33 aes64ds x28,x31,x7 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004930: 00083203 ld x4,0(x16) + 80004934: 01c20c63 beq x4,x28,8000494c + 80004938: 7c8062ef jal x5,8000b100 + 8000493c: 8000492c .word 0x8000492c + 80004940: 00000000 .word 0x00000000 + 80004944: 8001af10 .word 0x8001af10 + 80004948: 00000000 .word 0x00000000 + 8000494c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000100000000 + 80004950: 00013f83 ld x31,0(x2) + 80004954: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80004958: 00013d03 ld x26,0(x2) + 8000495c: 00810113 addi x2,x2,8 + +0000000080004960 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64ds x12, x31, x26 # perform operation + 80004960: 3baf8633 aes64ds x12,x31,x26 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004964: 00083203 ld x4,0(x16) + 80004968: 00c20c63 beq x4,x12,80004980 + 8000496c: 794062ef jal x5,8000b100 + 80004970: 80004960 .word 0x80004960 + 80004974: 00000000 .word 0x00000000 + 80004978: 8001af7b .word 0x8001af7b + 8000497c: 00000000 .word 0x00000000 + 80004980: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x0000000100000000 + 80004984: 00013903 ld x18,0(x2) + 80004988: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xffffffffffffffff + 8000498c: 00013d03 ld x26,0(x2) + 80004990: 00810113 addi x2,x2,8 + +0000000080004994 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64ds x10, x18, x26 # perform operation + 80004994: 3ba90533 aes64ds x10,x18,x26 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 80004998: 00083203 ld x4,0(x16) + 8000499c: 00a20c63 beq x4,x10,800049b4 + 800049a0: 760062ef jal x5,8000b100 + 800049a4: 80004994 .word 0x80004994 + 800049a8: 00000000 .word 0x00000000 + 800049ac: 8001afe6 .word 0x8001afe6 + 800049b0: 00000000 .word 0x00000000 + 800049b4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x0000000100000000 + 800049b8: 00013183 ld x3,0(x2) + 800049bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xfffffffffffffffe + 800049c0: 00013e83 ld x29,0(x2) + 800049c4: 00810113 addi x2,x2,8 + +00000000800049c8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64ds x15, x3, x29 # perform operation + 800049c8: 3bd187b3 aes64ds x15,x3,x29 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049cc: 00083203 ld x4,0(x16) + 800049d0: 00f20c63 beq x4,x15,800049e8 + 800049d4: 72c062ef jal x5,8000b100 + 800049d8: 800049c8 .word 0x800049c8 + 800049dc: 00000000 .word 0x00000000 + 800049e0: 8001b051 .word 0x8001b051 + 800049e4: 00000000 .word 0x00000000 + 800049e8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x0000000100000000 + 800049ec: 00013403 ld x8,0(x2) + 800049f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 800049f4: 00013583 ld x11,0(x2) + 800049f8: 00810113 addi x2,x2,8 + +00000000800049fc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64ds x23, x8, x11 # perform operation + 800049fc: 3ab40bb3 aes64ds x23,x8,x11 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a00: 00083203 ld x4,0(x16) + 80004a04: 01720c63 beq x4,x23,80004a1c + 80004a08: 6f8062ef jal x5,8000b100 + 80004a0c: 800049fc .word 0x800049fc + 80004a10: 00000000 .word 0x00000000 + 80004a14: 8001b0bc .word 0x8001b0bc + 80004a18: 00000000 .word 0x00000000 + 80004a1c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x0000000100000000 + 80004a20: 00013b83 ld x23,0(x2) + 80004a24: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80004a28: 00013683 ld x13,0(x2) + 80004a2c: 00810113 addi x2,x2,8 + +0000000080004a30 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x18, x23, x13 # perform operation + 80004a30: 3adb8933 aes64ds x18,x23,x13 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a34: 00083203 ld x4,0(x16) + 80004a38: 01220c63 beq x4,x18,80004a50 + 80004a3c: 6c4062ef jal x5,8000b100 + 80004a40: 80004a30 .word 0x80004a30 + 80004a44: 00000000 .word 0x00000000 + 80004a48: 8001b127 .word 0x8001b127 + 80004a4c: 00000000 .word 0x00000000 + 80004a50: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0000000100000000 + 80004a54: 00013603 ld x12,0(x2) + 80004a58: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x5555555555555555 + 80004a5c: 00013f03 ld x30,0(x2) + 80004a60: 00810113 addi x2,x2,8 + +0000000080004a64 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64ds x3, x12, x30 # perform operation + 80004a64: 3be601b3 aes64ds x3,x12,x30 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a68: 00083203 ld x4,0(x16) + 80004a6c: 00320c63 beq x4,x3,80004a84 + 80004a70: 690062ef jal x5,8000b100 + 80004a74: 80004a64 .word 0x80004a64 + 80004a78: 00000000 .word 0x00000000 + 80004a7c: 8001b192 .word 0x8001b192 + 80004a80: 00000000 .word 0x00000000 + 80004a84: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x0000000100000000 + 80004a88: 00013403 ld x8,0(x2) + 80004a8c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x00000000ffffffff + 80004a90: 00013383 ld x7,0(x2) + 80004a94: 00810113 addi x2,x2,8 + +0000000080004a98 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64ds x3, x8, x7 # perform operation + 80004a98: 3a7401b3 aes64ds x3,x8,x7 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004a9c: 00083203 ld x4,0(x16) + 80004aa0: 00320c63 beq x4,x3,80004ab8 + 80004aa4: 65c062ef jal x5,8000b100 + 80004aa8: 80004a98 .word 0x80004a98 + 80004aac: 00000000 .word 0x00000000 + 80004ab0: 8001b1fd .word 0x8001b1fd + 80004ab4: 00000000 .word 0x00000000 + 80004ab8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x0000000100000000 + 80004abc: 00013703 ld x14,0(x2) + 80004ac0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x00000000fffffffe + 80004ac4: 00013b03 ld x22,0(x2) + 80004ac8: 00810113 addi x2,x2,8 + +0000000080004acc : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64ds x15, x14, x22 # perform operation + 80004acc: 3b6707b3 aes64ds x15,x14,x22 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad0: 00083203 ld x4,0(x16) + 80004ad4: 00f20c63 beq x4,x15,80004aec + 80004ad8: 628062ef jal x5,8000b100 + 80004adc: 80004acc .word 0x80004acc + 80004ae0: 00000000 .word 0x00000000 + 80004ae4: 8001b260 .word 0x8001b260 + 80004ae8: 00000000 .word 0x00000000 + 80004aec: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0000000100000000 + 80004af0: 00013d83 ld x27,0(x2) + 80004af4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x0000000100000000 + 80004af8: 00013c03 ld x24,0(x2) + 80004afc: 00810113 addi x2,x2,8 + +0000000080004b00 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64ds x31, x27, x24 # perform operation + 80004b00: 3b8d8fb3 aes64ds x31,x27,x24 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b04: 00083203 ld x4,0(x16) + 80004b08: 01f20c63 beq x4,x31,80004b20 + 80004b0c: 5f4062ef jal x5,8000b100 + 80004b10: 80004b00 .word 0x80004b00 + 80004b14: 00000000 .word 0x00000000 + 80004b18: 8001b2c3 .word 0x8001b2c3 + 80004b1c: 00000000 .word 0x00000000 + 80004b20: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x0000000100000000 + 80004b24: 00013683 ld x13,0(x2) + 80004b28: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x0000000100000001 + 80004b2c: 00013703 ld x14,0(x2) + 80004b30: 00810113 addi x2,x2,8 + +0000000080004b34 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64ds x23, x13, x14 # perform operation + 80004b34: 3ae68bb3 aes64ds x23,x13,x14 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b38: 00083203 ld x4,0(x16) + 80004b3c: 01720c63 beq x4,x23,80004b54 + 80004b40: 5c0062ef jal x5,8000b100 + 80004b44: 80004b34 .word 0x80004b34 + 80004b48: 00000000 .word 0x00000000 + 80004b4c: 8001b327 .word 0x8001b327 + 80004b50: 00000000 .word 0x00000000 + 80004b54: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000100000001 + 80004b58: 00013503 ld x10,0(x2) + 80004b5c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x0000000000000000 + 80004b60: 00013e03 ld x28,0(x2) + 80004b64: 00810113 addi x2,x2,8 + +0000000080004b68 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64ds x3, x10, x28 # perform operation + 80004b68: 3bc501b3 aes64ds x3,x10,x28 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b6c: 00083203 ld x4,0(x16) + 80004b70: 00320c63 beq x4,x3,80004b88 + 80004b74: 58c062ef jal x5,8000b100 + 80004b78: 80004b68 .word 0x80004b68 + 80004b7c: 00000000 .word 0x00000000 + 80004b80: 8001b38b .word 0x8001b38b + 80004b84: 00000000 .word 0x00000000 + 80004b88: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x0000000100000001 + 80004b8c: 00013303 ld x6,0(x2) + 80004b90: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x0000000000000001 + 80004b94: 00013d03 ld x26,0(x2) + 80004b98: 00810113 addi x2,x2,8 + +0000000080004b9c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64ds x17, x6, x26 # perform operation + 80004b9c: 3ba308b3 aes64ds x17,x6,x26 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba0: 00083203 ld x4,0(x16) + 80004ba4: 01120c63 beq x4,x17,80004bbc + 80004ba8: 558062ef jal x5,8000b100 + 80004bac: 80004b9c .word 0x80004b9c + 80004bb0: 00000000 .word 0x00000000 + 80004bb4: 8001b3e7 .word 0x8001b3e7 + 80004bb8: 00000000 .word 0x00000000 + 80004bbc: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x0000000100000001 + 80004bc0: 00013183 ld x3,0(x2) + 80004bc4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x0000000000000002 + 80004bc8: 00013d83 ld x27,0(x2) + 80004bcc: 00810113 addi x2,x2,8 + +0000000080004bd0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64ds x12, x3, x27 # perform operation + 80004bd0: 3bb18633 aes64ds x12,x3,x27 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bd4: 00083203 ld x4,0(x16) + 80004bd8: 00c20c63 beq x4,x12,80004bf0 + 80004bdc: 524062ef jal x5,8000b100 + 80004be0: 80004bd0 .word 0x80004bd0 + 80004be4: 00000000 .word 0x00000000 + 80004be8: 8001b443 .word 0x8001b443 + 80004bec: 00000000 .word 0x00000000 + 80004bf0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x0000000100000001 + 80004bf4: 00013e83 ld x29,0(x2) + 80004bf8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x8000000000000000 + 80004bfc: 00013a03 ld x20,0(x2) + 80004c00: 00810113 addi x2,x2,8 + +0000000080004c04 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64ds x21, x29, x20 # perform operation + 80004c04: 3b4e8ab3 aes64ds x21,x29,x20 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c08: 00083203 ld x4,0(x16) + 80004c0c: 01520c63 beq x4,x21,80004c24 + 80004c10: 4f0062ef jal x5,8000b100 + 80004c14: 80004c04 .word 0x80004c04 + 80004c18: 00000000 .word 0x00000000 + 80004c1c: 8001b49f .word 0x8001b49f + 80004c20: 00000000 .word 0x00000000 + 80004c24: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x0000000100000001 + 80004c28: 00013f83 ld x31,0(x2) + 80004c2c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x8000000000000001 + 80004c30: 00013b83 ld x23,0(x2) + 80004c34: 00810113 addi x2,x2,8 + +0000000080004c38 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64ds x9, x31, x23 # perform operation + 80004c38: 3b7f84b3 aes64ds x9,x31,x23 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c3c: 00083203 ld x4,0(x16) + 80004c40: 00920c63 beq x4,x9,80004c58 + 80004c44: 4bc062ef jal x5,8000b100 + 80004c48: 80004c38 .word 0x80004c38 + 80004c4c: 00000000 .word 0x00000000 + 80004c50: 8001b50a .word 0x8001b50a + 80004c54: 00000000 .word 0x00000000 + 80004c58: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x0000000100000001 + 80004c5c: 00013983 ld x19,0(x2) + 80004c60: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x7fffffffffffffff + 80004c64: 00013a03 ld x20,0(x2) + 80004c68: 00810113 addi x2,x2,8 + +0000000080004c6c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64ds x8, x19, x20 # perform operation + 80004c6c: 3b498433 aes64ds x8,x19,x20 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c70: 00083203 ld x4,0(x16) + 80004c74: 00820c63 beq x4,x8,80004c8c + 80004c78: 488062ef jal x5,8000b100 + 80004c7c: 80004c6c .word 0x80004c6c + 80004c80: 00000000 .word 0x00000000 + 80004c84: 8001b575 .word 0x8001b575 + 80004c88: 00000000 .word 0x00000000 + 80004c8c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x0000000100000001 + 80004c90: 00013083 ld x1,0(x2) + 80004c94: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x7ffffffffffffffe + 80004c98: 00013e03 ld x28,0(x2) + 80004c9c: 00810113 addi x2,x2,8 + +0000000080004ca0 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64ds x12, x1, x28 # perform operation + 80004ca0: 3bc08633 aes64ds x12,x1,x28 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004ca4: 00083203 ld x4,0(x16) + 80004ca8: 00c20c63 beq x4,x12,80004cc0 + 80004cac: 454062ef jal x5,8000b100 + 80004cb0: 80004ca0 .word 0x80004ca0 + 80004cb4: 00000000 .word 0x00000000 + 80004cb8: 8001b5e0 .word 0x8001b5e0 + 80004cbc: 00000000 .word 0x00000000 + 80004cc0: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x0000000100000001 + 80004cc4: 00013503 ld x10,0(x2) + 80004cc8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xffffffffffffffff + 80004ccc: 00013b83 ld x23,0(x2) + 80004cd0: 00810113 addi x2,x2,8 + +0000000080004cd4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64ds x26, x10, x23 # perform operation + 80004cd4: 3b750d33 aes64ds x26,x10,x23 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cd8: 00083203 ld x4,0(x16) + 80004cdc: 01a20c63 beq x4,x26,80004cf4 + 80004ce0: 420062ef jal x5,8000b100 + 80004ce4: 80004cd4 .word 0x80004cd4 + 80004ce8: 00000000 .word 0x00000000 + 80004cec: 8001b64b .word 0x8001b64b + 80004cf0: 00000000 .word 0x00000000 + 80004cf4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0000000100000001 + 80004cf8: 00013b03 ld x22,0(x2) + 80004cfc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xfffffffffffffffe + 80004d00: 00013e83 ld x29,0(x2) + 80004d04: 00810113 addi x2,x2,8 + +0000000080004d08 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64ds x25, x22, x29 # perform operation + 80004d08: 3bdb0cb3 aes64ds x25,x22,x29 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d0c: 00083203 ld x4,0(x16) + 80004d10: 01920c63 beq x4,x25,80004d28 + 80004d14: 3ec062ef jal x5,8000b100 + 80004d18: 80004d08 .word 0x80004d08 + 80004d1c: 00000000 .word 0x00000000 + 80004d20: 8001b6b6 .word 0x8001b6b6 + 80004d24: 00000000 .word 0x00000000 + 80004d28: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0000000100000001 + 80004d2c: 00013583 ld x11,0(x2) + 80004d30: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80004d34: 00013883 ld x17,0(x2) + 80004d38: 00810113 addi x2,x2,8 + +0000000080004d3c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64ds x9, x11, x17 # perform operation + 80004d3c: 3b1584b3 aes64ds x9,x11,x17 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d40: 00083203 ld x4,0(x16) + 80004d44: 00920c63 beq x4,x9,80004d5c + 80004d48: 3b8062ef jal x5,8000b100 + 80004d4c: 80004d3c .word 0x80004d3c + 80004d50: 00000000 .word 0x00000000 + 80004d54: 8001b721 .word 0x8001b721 + 80004d58: 00000000 .word 0x00000000 + 80004d5c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x0000000100000001 + 80004d60: 00013c03 ld x24,0(x2) + 80004d64: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 80004d68: 00013183 ld x3,0(x2) + 80004d6c: 00810113 addi x2,x2,8 + +0000000080004d70 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ds x11, x24, x3 # perform operation + 80004d70: 3a3c05b3 aes64ds x11,x24,x3 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d74: 00083203 ld x4,0(x16) + 80004d78: 00b20c63 beq x4,x11,80004d90 + 80004d7c: 384062ef jal x5,8000b100 + 80004d80: 80004d70 .word 0x80004d70 + 80004d84: 00000000 .word 0x00000000 + 80004d88: 8001b78c .word 0x8001b78c + 80004d8c: 00000000 .word 0x00000000 + 80004d90: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0000000100000001 + 80004d94: 00013d83 ld x27,0(x2) + 80004d98: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x5555555555555555 + 80004d9c: 00013e03 ld x28,0(x2) + 80004da0: 00810113 addi x2,x2,8 + +0000000080004da4 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64ds x30, x27, x28 # perform operation + 80004da4: 3bcd8f33 aes64ds x30,x27,x28 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004da8: 00083203 ld x4,0(x16) + 80004dac: 01e20c63 beq x4,x30,80004dc4 + 80004db0: 350062ef jal x5,8000b100 + 80004db4: 80004da4 .word 0x80004da4 + 80004db8: 00000000 .word 0x00000000 + 80004dbc: 8001b7f7 .word 0x8001b7f7 + 80004dc0: 00000000 .word 0x00000000 + 80004dc4: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x0000000100000001 + 80004dc8: 00013c03 ld x24,0(x2) + 80004dcc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x00000000ffffffff + 80004dd0: 00013903 ld x18,0(x2) + 80004dd4: 00810113 addi x2,x2,8 + +0000000080004dd8 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64ds x25, x24, x18 # perform operation + 80004dd8: 3b2c0cb3 aes64ds x25,x24,x18 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004ddc: 00083203 ld x4,0(x16) + 80004de0: 01920c63 beq x4,x25,80004df8 + 80004de4: 31c062ef jal x5,8000b100 + 80004de8: 80004dd8 .word 0x80004dd8 + 80004dec: 00000000 .word 0x00000000 + 80004df0: 8001b862 .word 0x8001b862 + 80004df4: 00000000 .word 0x00000000 + 80004df8: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0000000100000001 + 80004dfc: 00013d83 ld x27,0(x2) + 80004e00: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x00000000fffffffe + 80004e04: 00013583 ld x11,0(x2) + 80004e08: 00810113 addi x2,x2,8 + +0000000080004e0c : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64ds x15, x27, x11 # perform operation + 80004e0c: 3abd87b3 aes64ds x15,x27,x11 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e10: 00083203 ld x4,0(x16) + 80004e14: 00f20c63 beq x4,x15,80004e2c + 80004e18: 2e8062ef jal x5,8000b100 + 80004e1c: 80004e0c .word 0x80004e0c + 80004e20: 00000000 .word 0x00000000 + 80004e24: 8001b8c5 .word 0x8001b8c5 + 80004e28: 00000000 .word 0x00000000 + 80004e2c: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x0000000100000001 + 80004e30: 00013983 ld x19,0(x2) + 80004e34: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x0000000100000000 + 80004e38: 00013c83 ld x25,0(x2) + 80004e3c: 00810113 addi x2,x2,8 + +0000000080004e40 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64ds x29, x19, x25 # perform operation + 80004e40: 3b998eb3 aes64ds x29,x19,x25 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e44: 00083203 ld x4,0(x16) + 80004e48: 01d20c63 beq x4,x29,80004e60 + 80004e4c: 2b4062ef jal x5,8000b100 + 80004e50: 80004e40 .word 0x80004e40 + 80004e54: 00000000 .word 0x00000000 + 80004e58: 8001b928 .word 0x8001b928 + 80004e5c: 00000000 .word 0x00000000 + 80004e60: 00880813 addi x16,x16,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x0000000100000001 + 80004e64: 00013a83 ld x21,0(x2) + 80004e68: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x0000000100000001 + 80004e6c: 00013303 ld x6,0(x2) + 80004e70: 00810113 addi x2,x2,8 + +0000000080004e74 : +Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64ds x14, x21, x6 # perform operation + 80004e74: 3a6a8733 aes64ds x14,x21,x6 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zknd_aes64ds_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e78: 00083203 ld x4,0(x16) + 80004e7c: 00e20c63 beq x4,x14,80004e94 + 80004e80: 280062ef jal x5,8000b100 + 80004e84: 80004e74 .word 0x80004e74 + 80004e88: 00000000 .word 0x00000000 + 80004e8c: 8001b98c .word 0x8001b98c + 80004e90: 00000000 .word 0x00000000 + 80004e94: 00880813 addi x16,x16,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x5c477b05a38ff017 + 80004e98: 00013003 ld x0,0(x2) + 80004e9c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs2: x0 = 0x199982dde0017045 + 80004ea0: 00013003 ld x0,0(x2) + 80004ea4: 00810113 addi x2,x2,8 + +0000000080004ea8 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b0: + aes64ds x23, x0, x0 # perform operation + 80004ea8: 3a000bb3 aes64ds x23,x0,x0 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zknd_aes64ds_cg_cmp_rs1_rs2_b0, Zknd_aes64ds_cg_cmp_rs1_rs2_b0_str) + 80004eac: 00083203 ld x4,0(x16) + 80004eb0: 01720c63 beq x4,x23,80004ec8 + 80004eb4: 24c062ef jal x5,8000b100 + 80004eb8: 80004ea8 .word 0x80004ea8 + 80004ebc: 00000000 .word 0x00000000 + 80004ec0: 8001b9f0 .word 0x8001b9f0 + 80004ec4: 00000000 .word 0x00000000 + 80004ec8: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x60be2281cbbb3c06 + 80004ecc: 00013083 ld x1,0(x2) + 80004ed0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x362fbc2627b75efe + 80004ed4: 00013083 ld x1,0(x2) + 80004ed8: 00810113 addi x2,x2,8 + +0000000080004edc : +Zknd_aes64ds_cg_cmp_rs1_rs2_b1: + aes64ds x10, x1, x1 # perform operation + 80004edc: 3a108533 aes64ds x10,x1,x1 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zknd_aes64ds_cg_cmp_rs1_rs2_b1, Zknd_aes64ds_cg_cmp_rs1_rs2_b1_str) + 80004ee0: 00083203 ld x4,0(x16) + 80004ee4: 00a20c63 beq x4,x10,80004efc + 80004ee8: 218062ef jal x5,8000b100 + 80004eec: 80004edc .word 0x80004edc + 80004ef0: 00000000 .word 0x00000000 + 80004ef4: 8001ba2b .word 0x8001ba2b + 80004ef8: 00000000 .word 0x00000000 + 80004efc: 00880813 addi x16,x16,8 + + mv x17, x2 # switch data pointer register to avoid conflict with test + 80004f00: 00010893 addi x17,x2,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x5060e12c7ce44e4d + 80004f04: 0008b103 ld x2,0(x17) + 80004f08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xf8c2f32be1f2279c + 80004f0c: 0008b103 ld x2,0(x17) + 80004f10: 00888893 addi x17,x17,8 + +0000000080004f14 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b2: + aes64ds x25, x2, x2 # perform operation + 80004f14: 3a210cb3 aes64ds x25,x2,x2 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ds_cg_cmp_rs1_rs2_b2, Zknd_aes64ds_cg_cmp_rs1_rs2_b2_str) + 80004f18: 00083203 ld x4,0(x16) + 80004f1c: 01920c63 beq x4,x25,80004f34 + 80004f20: 1e0062ef jal x5,8000b100 + 80004f24: 80004f14 .word 0x80004f14 + 80004f28: 00000000 .word 0x00000000 + 80004f2c: 8001ba66 .word 0x8001ba66 + 80004f30: 00000000 .word 0x00000000 + 80004f34: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x3bb57af01c4f8013 + 80004f38: 0008b183 ld x3,0(x17) + 80004f3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x10ca9083dbaf35e6 + 80004f40: 0008b183 ld x3,0(x17) + 80004f44: 00888893 addi x17,x17,8 + +0000000080004f48 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b3: + aes64ds x22, x3, x3 # perform operation + 80004f48: 3a318b33 aes64ds x22,x3,x3 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ds_cg_cmp_rs1_rs2_b3, Zknd_aes64ds_cg_cmp_rs1_rs2_b3_str) + 80004f4c: 00083203 ld x4,0(x16) + 80004f50: 01620c63 beq x4,x22,80004f68 + 80004f54: 1ac062ef jal x5,8000b100 + 80004f58: 80004f48 .word 0x80004f48 + 80004f5c: 00000000 .word 0x00000000 + 80004f60: 8001baa1 .word 0x8001baa1 + 80004f64: 00000000 .word 0x00000000 + 80004f68: 00880813 addi x16,x16,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f6c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f70: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x2ccc92560d12db06 + 80004f74: 0008b203 ld x4,0(x17) + 80004f78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x0d2b06c6da888931 + 80004f7c: 0008b203 ld x4,0(x17) + 80004f80: 00888893 addi x17,x17,8 + +0000000080004f84 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b4: + aes64ds x3, x4, x4 # perform operation + 80004f84: 3a4201b3 aes64ds x3,x4,x4 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zknd_aes64ds_cg_cmp_rs1_rs2_b4, Zknd_aes64ds_cg_cmp_rs1_rs2_b4_str) + 80004f88: 00083383 ld x7,0(x16) + 80004f8c: 00338c63 beq x7,x3,80004fa4 + 80004f90: 1880646f jal x8,8000b118 + 80004f94: 80004f84 .word 0x80004f84 + 80004f98: 00000000 .word 0x00000000 + 80004f9c: 8001badc .word 0x8001badc + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xc903ae33a0d47b50 + 80004fa8: 0008b283 ld x5,0(x17) + 80004fac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x0ee351c830266bec + 80004fb0: 0008b283 ld x5,0(x17) + 80004fb4: 00888893 addi x17,x17,8 + +0000000080004fb8 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b5: + aes64ds x4, x5, x5 # perform operation + 80004fb8: 3a528233 aes64ds x4,x5,x5 + # Check if x4 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x4, Zknd_aes64ds_cg_cmp_rs1_rs2_b5, Zknd_aes64ds_cg_cmp_rs1_rs2_b5_str) + 80004fbc: 00083383 ld x7,0(x16) + 80004fc0: 00438c63 beq x7,x4,80004fd8 + 80004fc4: 1540646f jal x8,8000b118 + 80004fc8: 80004fb8 .word 0x80004fb8 + 80004fcc: 00000000 .word 0x00000000 + 80004fd0: 8001bb17 .word 0x8001bb17 + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xe4e1ceb173030f41 + 80004fdc: 0008b303 ld x6,0(x17) + 80004fe0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x45d1aceda9c270c4 + 80004fe4: 0008b303 ld x6,0(x17) + 80004fe8: 00888893 addi x17,x17,8 + +0000000080004fec : +Zknd_aes64ds_cg_cmp_rs1_rs2_b6: + aes64ds x3, x6, x6 # perform operation + 80004fec: 3a6301b3 aes64ds x3,x6,x6 + # Check if x3 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x3, Zknd_aes64ds_cg_cmp_rs1_rs2_b6, Zknd_aes64ds_cg_cmp_rs1_rs2_b6_str) + 80004ff0: 00083383 ld x7,0(x16) + 80004ff4: 00338c63 beq x7,x3,8000500c + 80004ff8: 1200646f jal x8,8000b118 + 80004ffc: 80004fec .word 0x80004fec + 80005000: 00000000 .word 0x00000000 + 80005004: 8001bb52 .word 0x8001bb52 + 80005008: 00000000 .word 0x00000000 + 8000500c: 00880813 addi x16,x16,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005010: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005014: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xbae819d4b72ff45f + 80005018: 0008b383 ld x7,0(x17) + 8000501c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x88c2d4c2d3157f73 + 80005020: 0008b383 ld x7,0(x17) + 80005024: 00888893 addi x17,x17,8 + +0000000080005028 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b7: + aes64ds x24, x7, x7 # perform operation + 80005028: 3a738c33 aes64ds x24,x7,x7 + # Check if x24 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x24, Zknd_aes64ds_cg_cmp_rs1_rs2_b7, Zknd_aes64ds_cg_cmp_rs1_rs2_b7_str) + 8000502c: 00083683 ld x13,0(x16) + 80005030: 01868c63 beq x13,x24,80005048 + 80005034: 10c0676f jal x14,8000b140 + 80005038: 80005028 .word 0x80005028 + 8000503c: 00000000 .word 0x00000000 + 80005040: 8001bb8d .word 0x8001bb8d + 80005044: 00000000 .word 0x00000000 + 80005048: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x8ea516643fd394b9 + 8000504c: 0008b403 ld x8,0(x17) + 80005050: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x6c975ad58e18d34a + 80005054: 0008b403 ld x8,0(x17) + 80005058: 00888893 addi x17,x17,8 + +000000008000505c : +Zknd_aes64ds_cg_cmp_rs1_rs2_b8: + aes64ds x21, x8, x8 # perform operation + 8000505c: 3a840ab3 aes64ds x21,x8,x8 + # Check if x21 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x21, Zknd_aes64ds_cg_cmp_rs1_rs2_b8, Zknd_aes64ds_cg_cmp_rs1_rs2_b8_str) + 80005060: 00083683 ld x13,0(x16) + 80005064: 01568c63 beq x13,x21,8000507c + 80005068: 0d80676f jal x14,8000b140 + 8000506c: 8000505c .word 0x8000505c + 80005070: 00000000 .word 0x00000000 + 80005074: 8001bbc8 .word 0x8001bbc8 + 80005078: 00000000 .word 0x00000000 + 8000507c: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0812991b45582703 + 80005080: 0008b483 ld x9,0(x17) + 80005084: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8cd0c4251e3e0260 + 80005088: 0008b483 ld x9,0(x17) + 8000508c: 00888893 addi x17,x17,8 + +0000000080005090 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b9: + aes64ds x11, x9, x9 # perform operation + 80005090: 3a9485b3 aes64ds x11,x9,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zknd_aes64ds_cg_cmp_rs1_rs2_b9, Zknd_aes64ds_cg_cmp_rs1_rs2_b9_str) + 80005094: 00083683 ld x13,0(x16) + 80005098: 00b68c63 beq x13,x11,800050b0 + 8000509c: 0a40676f jal x14,8000b140 + 800050a0: 80005090 .word 0x80005090 + 800050a4: 00000000 .word 0x00000000 + 800050a8: 8001bc03 .word 0x8001bc03 + 800050ac: 00000000 .word 0x00000000 + 800050b0: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x1fd16c1ff50e2e03 + 800050b4: 0008b503 ld x10,0(x17) + 800050b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x27636a22a87f783d + 800050bc: 0008b503 ld x10,0(x17) + 800050c0: 00888893 addi x17,x17,8 + +00000000800050c4 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b10: + aes64ds x23, x10, x10 # perform operation + 800050c4: 3aa50bb3 aes64ds x23,x10,x10 + # Check if x23 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x23, Zknd_aes64ds_cg_cmp_rs1_rs2_b10, Zknd_aes64ds_cg_cmp_rs1_rs2_b10_str) + 800050c8: 00083683 ld x13,0(x16) + 800050cc: 01768c63 beq x13,x23,800050e4 + 800050d0: 0700676f jal x14,8000b140 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 8001bc3e .word 0x8001bc3e + 800050e0: 00000000 .word 0x00000000 + 800050e4: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xa2485bf88c82277f + 800050e8: 0008b583 ld x11,0(x17) + 800050ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x1706a14ada80d538 + 800050f0: 0008b583 ld x11,0(x17) + 800050f4: 00888893 addi x17,x17,8 + +00000000800050f8 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b11: + aes64ds x25, x11, x11 # perform operation + 800050f8: 3ab58cb3 aes64ds x25,x11,x11 + # Check if x25 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x25, Zknd_aes64ds_cg_cmp_rs1_rs2_b11, Zknd_aes64ds_cg_cmp_rs1_rs2_b11_str) + 800050fc: 00083683 ld x13,0(x16) + 80005100: 01968c63 beq x13,x25,80005118 + 80005104: 03c0676f jal x14,8000b140 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 8001bc7a .word 0x8001bc7a + 80005114: 00000000 .word 0x00000000 + 80005118: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xdc1b2fb7c7ce5dfe + 8000511c: 0008b603 ld x12,0(x17) + 80005120: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0603554361b194db + 80005124: 0008b603 ld x12,0(x17) + 80005128: 00888893 addi x17,x17,8 + +000000008000512c : +Zknd_aes64ds_cg_cmp_rs1_rs2_b12: + aes64ds x21, x12, x12 # perform operation + 8000512c: 3ac60ab3 aes64ds x21,x12,x12 + # Check if x21 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x21, Zknd_aes64ds_cg_cmp_rs1_rs2_b12, Zknd_aes64ds_cg_cmp_rs1_rs2_b12_str) + 80005130: 00083683 ld x13,0(x16) + 80005134: 01568c63 beq x13,x21,8000514c + 80005138: 0080676f jal x14,8000b140 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 8001bcb6 .word 0x8001bcb6 + 80005148: 00000000 .word 0x00000000 + 8000514c: 00880813 addi x16,x16,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005150: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005154: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xd66ee4d6efac719d + 80005158: 0008b683 ld x13,0(x17) + 8000515c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x01ee96d98152336f + 80005160: 0008b683 ld x13,0(x17) + 80005164: 00888893 addi x17,x17,8 + +0000000080005168 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b13: + aes64ds x27, x13, x13 # perform operation + 80005168: 3ad68db3 aes64ds x27,x13,x13 + # Check if x27 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x27, Zknd_aes64ds_cg_cmp_rs1_rs2_b13, Zknd_aes64ds_cg_cmp_rs1_rs2_b13_str) + 8000516c: 00083383 ld x7,0(x16) + 80005170: 01b38c63 beq x7,x27,80005188 + 80005174: 7a50546f jal x8,8000b118 + 80005178: 80005168 .word 0x80005168 + 8000517c: 00000000 .word 0x00000000 + 80005180: 8001bcf2 .word 0x8001bcf2 + 80005184: 00000000 .word 0x00000000 + 80005188: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x8e53b45e8736a32b + 8000518c: 0008b703 ld x14,0(x17) + 80005190: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xcca6676f890774e8 + 80005194: 0008b703 ld x14,0(x17) + 80005198: 00888893 addi x17,x17,8 + +000000008000519c : +Zknd_aes64ds_cg_cmp_rs1_rs2_b14: + aes64ds x31, x14, x14 # perform operation + 8000519c: 3ae70fb3 aes64ds x31,x14,x14 + # Check if x31 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x31, Zknd_aes64ds_cg_cmp_rs1_rs2_b14, Zknd_aes64ds_cg_cmp_rs1_rs2_b14_str) + 800051a0: 00083383 ld x7,0(x16) + 800051a4: 01f38c63 beq x7,x31,800051bc + 800051a8: 7710546f jal x8,8000b118 + 800051ac: 8000519c .word 0x8000519c + 800051b0: 00000000 .word 0x00000000 + 800051b4: 8001bd2e .word 0x8001bd2e + 800051b8: 00000000 .word 0x00000000 + 800051bc: 00880813 addi x16,x16,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xb944ec0248cd2c39 + 800051c0: 0008b783 ld x15,0(x17) + 800051c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0xd9df4fe9cb35abd5 + 800051c8: 0008b783 ld x15,0(x17) + 800051cc: 00888893 addi x17,x17,8 + +00000000800051d0 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b15: + aes64ds x5, x15, x15 # perform operation + 800051d0: 3af782b3 aes64ds x5,x15,x15 + # Check if x5 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x5, Zknd_aes64ds_cg_cmp_rs1_rs2_b15, Zknd_aes64ds_cg_cmp_rs1_rs2_b15_str) + 800051d4: 00083383 ld x7,0(x16) + 800051d8: 00538c63 beq x7,x5,800051f0 + 800051dc: 73d0546f jal x8,8000b118 + 800051e0: 800051d0 .word 0x800051d0 + 800051e4: 00000000 .word 0x00000000 + 800051e8: 8001bd6a .word 0x8001bd6a + 800051ec: 00000000 .word 0x00000000 + 800051f0: 00880813 addi x16,x16,8 + + mv x15, x16 # switch signature pointer register to avoid conflict with test + 800051f4: 00080793 addi x15,x16,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xc3bee63aa715ee28 + 800051f8: 0008b803 ld x16,0(x17) + 800051fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8b49df368e1f2e53 + 80005200: 0008b803 ld x16,0(x17) + 80005204: 00888893 addi x17,x17,8 + +0000000080005208 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b16: + aes64ds x31, x16, x16 # perform operation + 80005208: 3b080fb3 aes64ds x31,x16,x16 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknd_aes64ds_cg_cmp_rs1_rs2_b16, Zknd_aes64ds_cg_cmp_rs1_rs2_b16_str) + 8000520c: 0007b383 ld x7,0(x15) + 80005210: 01f38c63 beq x7,x31,80005228 + 80005214: 7050546f jal x8,8000b118 + 80005218: 80005208 .word 0x80005208 + 8000521c: 00000000 .word 0x00000000 + 80005220: 8001bda6 .word 0x8001bda6 + 80005224: 00000000 .word 0x00000000 + 80005228: 00878793 addi x15,x15,8 + + mv x10, x17 # switch data pointer register to avoid conflict with test + 8000522c: 00088513 addi x10,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x77275bbb360c7994 + 80005230: 00053883 ld x17,0(x10) + 80005234: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xbd1a93597127dcc9 + 80005238: 00053883 ld x17,0(x10) + 8000523c: 00850513 addi x10,x10,8 + +0000000080005240 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b17: + aes64ds x5, x17, x17 # perform operation + 80005240: 3b1882b3 aes64ds x5,x17,x17 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknd_aes64ds_cg_cmp_rs1_rs2_b17, Zknd_aes64ds_cg_cmp_rs1_rs2_b17_str) + 80005244: 0007b383 ld x7,0(x15) + 80005248: 00538c63 beq x7,x5,80005260 + 8000524c: 6cd0546f jal x8,8000b118 + 80005250: 80005240 .word 0x80005240 + 80005254: 00000000 .word 0x00000000 + 80005258: 8001bde2 .word 0x8001bde2 + 8000525c: 00000000 .word 0x00000000 + 80005260: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x79dcec7c353e29c4 + 80005264: 00053903 ld x18,0(x10) + 80005268: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5f9d911b64413761 + 8000526c: 00053903 ld x18,0(x10) + 80005270: 00850513 addi x10,x10,8 + +0000000080005274 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b18: + aes64ds x30, x18, x18 # perform operation + 80005274: 3b290f33 aes64ds x30,x18,x18 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zknd_aes64ds_cg_cmp_rs1_rs2_b18, Zknd_aes64ds_cg_cmp_rs1_rs2_b18_str) + 80005278: 0007b383 ld x7,0(x15) + 8000527c: 01e38c63 beq x7,x30,80005294 + 80005280: 6990546f jal x8,8000b118 + 80005284: 80005274 .word 0x80005274 + 80005288: 00000000 .word 0x00000000 + 8000528c: 8001be1e .word 0x8001be1e + 80005290: 00000000 .word 0x00000000 + 80005294: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xdb0f66e92fc99a0a + 80005298: 00053983 ld x19,0(x10) + 8000529c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8e2425d636f48f12 + 800052a0: 00053983 ld x19,0(x10) + 800052a4: 00850513 addi x10,x10,8 + +00000000800052a8 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b19: + aes64ds x17, x19, x19 # perform operation + 800052a8: 3b3988b3 aes64ds x17,x19,x19 + # Check if x17 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x17, Zknd_aes64ds_cg_cmp_rs1_rs2_b19, Zknd_aes64ds_cg_cmp_rs1_rs2_b19_str) + 800052ac: 0007b383 ld x7,0(x15) + 800052b0: 01138c63 beq x7,x17,800052c8 + 800052b4: 6650546f jal x8,8000b118 + 800052b8: 800052a8 .word 0x800052a8 + 800052bc: 00000000 .word 0x00000000 + 800052c0: 8001be5a .word 0x8001be5a + 800052c4: 00000000 .word 0x00000000 + 800052c8: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x4fda3ad3265bb993 + 800052cc: 00053a03 ld x20,0(x10) + 800052d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8bf07e76763b0ced + 800052d4: 00053a03 ld x20,0(x10) + 800052d8: 00850513 addi x10,x10,8 + +00000000800052dc : +Zknd_aes64ds_cg_cmp_rs1_rs2_b20: + aes64ds x25, x20, x20 # perform operation + 800052dc: 3b4a0cb3 aes64ds x25,x20,x20 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknd_aes64ds_cg_cmp_rs1_rs2_b20, Zknd_aes64ds_cg_cmp_rs1_rs2_b20_str) + 800052e0: 0007b383 ld x7,0(x15) + 800052e4: 01938c63 beq x7,x25,800052fc + 800052e8: 6310546f jal x8,8000b118 + 800052ec: 800052dc .word 0x800052dc + 800052f0: 00000000 .word 0x00000000 + 800052f4: 8001be96 .word 0x8001be96 + 800052f8: 00000000 .word 0x00000000 + 800052fc: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x15d3ba609b6ceb4a + 80005300: 00053a83 ld x21,0(x10) + 80005304: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x31da14b2ed386c79 + 80005308: 00053a83 ld x21,0(x10) + 8000530c: 00850513 addi x10,x10,8 + +0000000080005310 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b21: + aes64ds x31, x21, x21 # perform operation + 80005310: 3b5a8fb3 aes64ds x31,x21,x21 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zknd_aes64ds_cg_cmp_rs1_rs2_b21, Zknd_aes64ds_cg_cmp_rs1_rs2_b21_str) + 80005314: 0007b383 ld x7,0(x15) + 80005318: 01f38c63 beq x7,x31,80005330 + 8000531c: 5fd0546f jal x8,8000b118 + 80005320: 80005310 .word 0x80005310 + 80005324: 00000000 .word 0x00000000 + 80005328: 8001bed2 .word 0x8001bed2 + 8000532c: 00000000 .word 0x00000000 + 80005330: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x9f9a0b85329d76c5 + 80005334: 00053b03 ld x22,0(x10) + 80005338: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xf2423044307367e0 + 8000533c: 00053b03 ld x22,0(x10) + 80005340: 00850513 addi x10,x10,8 + +0000000080005344 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b22: + aes64ds x30, x22, x22 # perform operation + 80005344: 3b6b0f33 aes64ds x30,x22,x22 + # Check if x30 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x30, Zknd_aes64ds_cg_cmp_rs1_rs2_b22, Zknd_aes64ds_cg_cmp_rs1_rs2_b22_str) + 80005348: 0007b383 ld x7,0(x15) + 8000534c: 01e38c63 beq x7,x30,80005364 + 80005350: 5c90546f jal x8,8000b118 + 80005354: 80005344 .word 0x80005344 + 80005358: 00000000 .word 0x00000000 + 8000535c: 8001bf0e .word 0x8001bf0e + 80005360: 00000000 .word 0x00000000 + 80005364: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x1436f0d06de06c5c + 80005368: 00053b83 ld x23,0(x10) + 8000536c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x42935ce75ced91b0 + 80005370: 00053b83 ld x23,0(x10) + 80005374: 00850513 addi x10,x10,8 + +0000000080005378 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b23: + aes64ds x13, x23, x23 # perform operation + 80005378: 3b7b86b3 aes64ds x13,x23,x23 + # Check if x13 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x13, Zknd_aes64ds_cg_cmp_rs1_rs2_b23, Zknd_aes64ds_cg_cmp_rs1_rs2_b23_str) + 8000537c: 0007b383 ld x7,0(x15) + 80005380: 00d38c63 beq x7,x13,80005398 + 80005384: 5950546f jal x8,8000b118 + 80005388: 80005378 .word 0x80005378 + 8000538c: 00000000 .word 0x00000000 + 80005390: 8001bf4a .word 0x8001bf4a + 80005394: 00000000 .word 0x00000000 + 80005398: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x28b267be887a7a88 + 8000539c: 00053c03 ld x24,0(x10) + 800053a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x68439da7567350f0 + 800053a4: 00053c03 ld x24,0(x10) + 800053a8: 00850513 addi x10,x10,8 + +00000000800053ac : +Zknd_aes64ds_cg_cmp_rs1_rs2_b24: + aes64ds x9, x24, x24 # perform operation + 800053ac: 3b8c04b3 aes64ds x9,x24,x24 + # Check if x9 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x9, Zknd_aes64ds_cg_cmp_rs1_rs2_b24, Zknd_aes64ds_cg_cmp_rs1_rs2_b24_str) + 800053b0: 0007b383 ld x7,0(x15) + 800053b4: 00938c63 beq x7,x9,800053cc + 800053b8: 5610546f jal x8,8000b118 + 800053bc: 800053ac .word 0x800053ac + 800053c0: 00000000 .word 0x00000000 + 800053c4: 8001bf86 .word 0x8001bf86 + 800053c8: 00000000 .word 0x00000000 + 800053cc: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x3958724d5350dd0e + 800053d0: 00053c83 ld x25,0(x10) + 800053d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x57f16cab2c6d54de + 800053d8: 00053c83 ld x25,0(x10) + 800053dc: 00850513 addi x10,x10,8 + +00000000800053e0 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b25: + aes64ds x2, x25, x25 # perform operation + 800053e0: 3b9c8133 aes64ds x2,x25,x25 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknd_aes64ds_cg_cmp_rs1_rs2_b25, Zknd_aes64ds_cg_cmp_rs1_rs2_b25_str) + 800053e4: 0007b383 ld x7,0(x15) + 800053e8: 00238c63 beq x7,x2,80005400 + 800053ec: 52d0546f jal x8,8000b118 + 800053f0: 800053e0 .word 0x800053e0 + 800053f4: 00000000 .word 0x00000000 + 800053f8: 8001bfc2 .word 0x8001bfc2 + 800053fc: 00000000 .word 0x00000000 + 80005400: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x90aa6d19ca53e334 + 80005404: 00053d03 ld x26,0(x10) + 80005408: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xc0e75b7b8d7b4b41 + 8000540c: 00053d03 ld x26,0(x10) + 80005410: 00850513 addi x10,x10,8 + +0000000080005414 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b26: + aes64ds x12, x26, x26 # perform operation + 80005414: 3bad0633 aes64ds x12,x26,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x12, Zknd_aes64ds_cg_cmp_rs1_rs2_b26, Zknd_aes64ds_cg_cmp_rs1_rs2_b26_str) + 80005418: 0007b383 ld x7,0(x15) + 8000541c: 00c38c63 beq x7,x12,80005434 + 80005420: 4f90546f jal x8,8000b118 + 80005424: 80005414 .word 0x80005414 + 80005428: 00000000 .word 0x00000000 + 8000542c: 8001bffe .word 0x8001bffe + 80005430: 00000000 .word 0x00000000 + 80005434: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x2ec940b7305e91dd + 80005438: 00053d83 ld x27,0(x10) + 8000543c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0xba06cae49b76a32f + 80005440: 00053d83 ld x27,0(x10) + 80005444: 00850513 addi x10,x10,8 + +0000000080005448 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b27: + aes64ds x24, x27, x27 # perform operation + 80005448: 3bbd8c33 aes64ds x24,x27,x27 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zknd_aes64ds_cg_cmp_rs1_rs2_b27, Zknd_aes64ds_cg_cmp_rs1_rs2_b27_str) + 8000544c: 0007b383 ld x7,0(x15) + 80005450: 01838c63 beq x7,x24,80005468 + 80005454: 4c50546f jal x8,8000b118 + 80005458: 80005448 .word 0x80005448 + 8000545c: 00000000 .word 0x00000000 + 80005460: 8001c03a .word 0x8001c03a + 80005464: 00000000 .word 0x00000000 + 80005468: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xd03069399a777297 + 8000546c: 00053e03 ld x28,0(x10) + 80005470: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xff909b637b6335b9 + 80005474: 00053e03 ld x28,0(x10) + 80005478: 00850513 addi x10,x10,8 + +000000008000547c : +Zknd_aes64ds_cg_cmp_rs1_rs2_b28: + aes64ds x16, x28, x28 # perform operation + 8000547c: 3bce0833 aes64ds x16,x28,x28 + # Check if x16 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x16, Zknd_aes64ds_cg_cmp_rs1_rs2_b28, Zknd_aes64ds_cg_cmp_rs1_rs2_b28_str) + 80005480: 0007b383 ld x7,0(x15) + 80005484: 01038c63 beq x7,x16,8000549c + 80005488: 4910546f jal x8,8000b118 + 8000548c: 8000547c .word 0x8000547c + 80005490: 00000000 .word 0x00000000 + 80005494: 8001c076 .word 0x8001c076 + 80005498: 00000000 .word 0x00000000 + 8000549c: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x4c450454b3064599 + 800054a0: 00053e83 ld x29,0(x10) + 800054a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xa4d7fcc09103f19c + 800054a8: 00053e83 ld x29,0(x10) + 800054ac: 00850513 addi x10,x10,8 + +00000000800054b0 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b29: + aes64ds x22, x29, x29 # perform operation + 800054b0: 3bde8b33 aes64ds x22,x29,x29 + # Check if x22 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x22, Zknd_aes64ds_cg_cmp_rs1_rs2_b29, Zknd_aes64ds_cg_cmp_rs1_rs2_b29_str) + 800054b4: 0007b383 ld x7,0(x15) + 800054b8: 01638c63 beq x7,x22,800054d0 + 800054bc: 45d0546f jal x8,8000b118 + 800054c0: 800054b0 .word 0x800054b0 + 800054c4: 00000000 .word 0x00000000 + 800054c8: 8001c0b2 .word 0x8001c0b2 + 800054cc: 00000000 .word 0x00000000 + 800054d0: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xea38210dca027d7d + 800054d4: 00053f03 ld x30,0(x10) + 800054d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x4c5819b2fc7d2d35 + 800054dc: 00053f03 ld x30,0(x10) + 800054e0: 00850513 addi x10,x10,8 + +00000000800054e4 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b30: + aes64ds x25, x30, x30 # perform operation + 800054e4: 3bef0cb3 aes64ds x25,x30,x30 + # Check if x25 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x25, Zknd_aes64ds_cg_cmp_rs1_rs2_b30, Zknd_aes64ds_cg_cmp_rs1_rs2_b30_str) + 800054e8: 0007b383 ld x7,0(x15) + 800054ec: 01938c63 beq x7,x25,80005504 + 800054f0: 4290546f jal x8,8000b118 + 800054f4: 800054e4 .word 0x800054e4 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 8001c0ee .word 0x8001c0ee + 80005500: 00000000 .word 0x00000000 + 80005504: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xf805ec33f2b62d6a + 80005508: 00053f83 ld x31,0(x10) + 8000550c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xd1168bbc09a409b2 + 80005510: 00053f83 ld x31,0(x10) + 80005514: 00850513 addi x10,x10,8 + +0000000080005518 : +Zknd_aes64ds_cg_cmp_rs1_rs2_b31: + aes64ds x14, x31, x31 # perform operation + 80005518: 3bff8733 aes64ds x14,x31,x31 + # Check if x14 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x14, Zknd_aes64ds_cg_cmp_rs1_rs2_b31, Zknd_aes64ds_cg_cmp_rs1_rs2_b31_str) + 8000551c: 0007b383 ld x7,0(x15) + 80005520: 00e38c63 beq x7,x14,80005538 + 80005524: 3f50546f jal x8,8000b118 + 80005528: 80005518 .word 0x80005518 + 8000552c: 00000000 .word 0x00000000 + 80005530: 8001c12a .word 0x8001c12a + 80005534: 00000000 .word 0x00000000 + 80005538: 00878793 addi x15,x15,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x91b97cba826a2442 + 8000553c: 00053003 ld x0,0(x10) + 80005540: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7f2bde997a39829a + 80005544: 00053483 ld x9,0(x10) + 80005548: 00850513 addi x10,x10,8 + +000000008000554c : +Zknd_aes64ds_cg_cmp_rd_rs1_b0: + aes64ds x0, x0, x9 # perform operation + 8000554c: 3a900033 aes64ds x0,x0,x9 + # Check if x0 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x0, Zknd_aes64ds_cg_cmp_rd_rs1_b0, Zknd_aes64ds_cg_cmp_rd_rs1_b0_str) + 80005550: 0007b383 ld x7,0(x15) + 80005554: 00038c63 beq x7,x0,8000556c + 80005558: 3c10546f jal x8,8000b118 + 8000555c: 8000554c .word 0x8000554c + 80005560: 00000000 .word 0x00000000 + 80005564: 8001c166 .word 0x8001c166 + 80005568: 00000000 .word 0x00000000 + 8000556c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xb182c468437891fc + 80005570: 00053083 ld x1,0(x10) + 80005574: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x8e34a44f08f89b43 + 80005578: 00053a83 ld x21,0(x10) + 8000557c: 00850513 addi x10,x10,8 + +0000000080005580 : +Zknd_aes64ds_cg_cmp_rd_rs1_b1: + aes64ds x1, x1, x21 # perform operation + 80005580: 3b5080b3 aes64ds x1,x1,x21 + # Check if x1 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x1, Zknd_aes64ds_cg_cmp_rd_rs1_b1, Zknd_aes64ds_cg_cmp_rd_rs1_b1_str) + 80005584: 0007b383 ld x7,0(x15) + 80005588: 00138c63 beq x7,x1,800055a0 + 8000558c: 38d0546f jal x8,8000b118 + 80005590: 80005580 .word 0x80005580 + 80005594: 00000000 .word 0x00000000 + 80005598: 8001c1a0 .word 0x8001c1a0 + 8000559c: 00000000 .word 0x00000000 + 800055a0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x1da9622d54deea76 + 800055a4: 00053103 ld x2,0(x10) + 800055a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x730bcf36f1535b85 + 800055ac: 00053883 ld x17,0(x10) + 800055b0: 00850513 addi x10,x10,8 + +00000000800055b4 : +Zknd_aes64ds_cg_cmp_rd_rs1_b2: + aes64ds x2, x2, x17 # perform operation + 800055b4: 3b110133 aes64ds x2,x2,x17 + # Check if x2 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x2, Zknd_aes64ds_cg_cmp_rd_rs1_b2, Zknd_aes64ds_cg_cmp_rd_rs1_b2_str) + 800055b8: 0007b383 ld x7,0(x15) + 800055bc: 00238c63 beq x7,x2,800055d4 + 800055c0: 3590546f jal x8,8000b118 + 800055c4: 800055b4 .word 0x800055b4 + 800055c8: 00000000 .word 0x00000000 + 800055cc: 8001c1da .word 0x8001c1da + 800055d0: 00000000 .word 0x00000000 + 800055d4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x7791f2fc420f8d2a + 800055d8: 00053183 ld x3,0(x10) + 800055dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xcde1483cf9d36b2c + 800055e0: 00053683 ld x13,0(x10) + 800055e4: 00850513 addi x10,x10,8 + +00000000800055e8 : +Zknd_aes64ds_cg_cmp_rd_rs1_b3: + aes64ds x3, x3, x13 # perform operation + 800055e8: 3ad181b3 aes64ds x3,x3,x13 + # Check if x3 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x3, Zknd_aes64ds_cg_cmp_rd_rs1_b3, Zknd_aes64ds_cg_cmp_rd_rs1_b3_str) + 800055ec: 0007b383 ld x7,0(x15) + 800055f0: 00338c63 beq x7,x3,80005608 + 800055f4: 3250546f jal x8,8000b118 + 800055f8: 800055e8 .word 0x800055e8 + 800055fc: 00000000 .word 0x00000000 + 80005600: 8001c214 .word 0x8001c214 + 80005604: 00000000 .word 0x00000000 + 80005608: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x91ec20ec4ab33279 + 8000560c: 00053203 ld x4,0(x10) + 80005610: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x786a89a1dff4fc7a + 80005614: 00053a83 ld x21,0(x10) + 80005618: 00850513 addi x10,x10,8 + +000000008000561c : +Zknd_aes64ds_cg_cmp_rd_rs1_b4: + aes64ds x4, x4, x21 # perform operation + 8000561c: 3b520233 aes64ds x4,x4,x21 + # Check if x4 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x4, Zknd_aes64ds_cg_cmp_rd_rs1_b4, Zknd_aes64ds_cg_cmp_rd_rs1_b4_str) + 80005620: 0007b383 ld x7,0(x15) + 80005624: 00438c63 beq x7,x4,8000563c + 80005628: 2f10546f jal x8,8000b118 + 8000562c: 8000561c .word 0x8000561c + 80005630: 00000000 .word 0x00000000 + 80005634: 8001c24e .word 0x8001c24e + 80005638: 00000000 .word 0x00000000 + 8000563c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x05d48dcc370981f7 + 80005640: 00053283 ld x5,0(x10) + 80005644: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x33aaf1d95e3506e2 + 80005648: 00053903 ld x18,0(x10) + 8000564c: 00850513 addi x10,x10,8 + +0000000080005650 : +Zknd_aes64ds_cg_cmp_rd_rs1_b5: + aes64ds x5, x5, x18 # perform operation + 80005650: 3b2282b3 aes64ds x5,x5,x18 + # Check if x5 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x5, Zknd_aes64ds_cg_cmp_rd_rs1_b5, Zknd_aes64ds_cg_cmp_rd_rs1_b5_str) + 80005654: 0007b383 ld x7,0(x15) + 80005658: 00538c63 beq x7,x5,80005670 + 8000565c: 2bd0546f jal x8,8000b118 + 80005660: 80005650 .word 0x80005650 + 80005664: 00000000 .word 0x00000000 + 80005668: 8001c288 .word 0x8001c288 + 8000566c: 00000000 .word 0x00000000 + 80005670: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x3f94c25c36c7ca9c + 80005674: 00053303 ld x6,0(x10) + 80005678: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xa4e0038a72c527c1 + 8000567c: 00053803 ld x16,0(x10) + 80005680: 00850513 addi x10,x10,8 + +0000000080005684 : +Zknd_aes64ds_cg_cmp_rd_rs1_b6: + aes64ds x6, x6, x16 # perform operation + 80005684: 3b030333 aes64ds x6,x6,x16 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknd_aes64ds_cg_cmp_rd_rs1_b6, Zknd_aes64ds_cg_cmp_rd_rs1_b6_str) + 80005688: 0007b383 ld x7,0(x15) + 8000568c: 00638c63 beq x7,x6,800056a4 + 80005690: 2890546f jal x8,8000b118 + 80005694: 80005684 .word 0x80005684 + 80005698: 00000000 .word 0x00000000 + 8000569c: 8001c2c2 .word 0x8001c2c2 + 800056a0: 00000000 .word 0x00000000 + 800056a4: 00878793 addi x15,x15,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056a8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056ac: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xc46e8fe6696e61d1 + 800056b0: 00053383 ld x7,0(x10) + 800056b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xd341b9d1c29a6a14 + 800056b8: 00053f83 ld x31,0(x10) + 800056bc: 00850513 addi x10,x10,8 + +00000000800056c0 : +Zknd_aes64ds_cg_cmp_rd_rs1_b7: + aes64ds x7, x7, x31 # perform operation + 800056c0: 3bf383b3 aes64ds x7,x7,x31 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64ds_cg_cmp_rd_rs1_b7, Zknd_aes64ds_cg_cmp_rd_rs1_b7_str) + 800056c4: 0007b203 ld x4,0(x15) + 800056c8: 00720c63 beq x4,x7,800056e0 + 800056cc: 235052ef jal x5,8000b100 + 800056d0: 800056c0 .word 0x800056c0 + 800056d4: 00000000 .word 0x00000000 + 800056d8: 8001c2fc .word 0x8001c2fc + 800056dc: 00000000 .word 0x00000000 + 800056e0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x9816b0f821a8878f + 800056e4: 00053403 ld x8,0(x10) + 800056e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5f8588bada57057a + 800056ec: 00053d03 ld x26,0(x10) + 800056f0: 00850513 addi x10,x10,8 + +00000000800056f4 : +Zknd_aes64ds_cg_cmp_rd_rs1_b8: + aes64ds x8, x8, x26 # perform operation + 800056f4: 3ba40433 aes64ds x8,x8,x26 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64ds_cg_cmp_rd_rs1_b8, Zknd_aes64ds_cg_cmp_rd_rs1_b8_str) + 800056f8: 0007b203 ld x4,0(x15) + 800056fc: 00820c63 beq x4,x8,80005714 + 80005700: 201052ef jal x5,8000b100 + 80005704: 800056f4 .word 0x800056f4 + 80005708: 00000000 .word 0x00000000 + 8000570c: 8001c336 .word 0x8001c336 + 80005710: 00000000 .word 0x00000000 + 80005714: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xe0fe937891d37cc7 + 80005718: 00053483 ld x9,0(x10) + 8000571c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x66a9169703f88fbb + 80005720: 00053403 ld x8,0(x10) + 80005724: 00850513 addi x10,x10,8 + +0000000080005728 : +Zknd_aes64ds_cg_cmp_rd_rs1_b9: + aes64ds x9, x9, x8 # perform operation + 80005728: 3a8484b3 aes64ds x9,x9,x8 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64ds_cg_cmp_rd_rs1_b9, Zknd_aes64ds_cg_cmp_rd_rs1_b9_str) + 8000572c: 0007b203 ld x4,0(x15) + 80005730: 00920c63 beq x4,x9,80005748 + 80005734: 1cd052ef jal x5,8000b100 + 80005738: 80005728 .word 0x80005728 + 8000573c: 00000000 .word 0x00000000 + 80005740: 8001c370 .word 0x8001c370 + 80005744: 00000000 .word 0x00000000 + 80005748: 00878793 addi x15,x15,8 + + mv x29, x10 # switch data pointer register to avoid conflict with test + 8000574c: 00050e93 addi x29,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xcb451cc0b3584355 + 80005750: 000eb503 ld x10,0(x29) + 80005754: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x31) # load rs2: x31 = 0x9a7b7ab825d1c92d + 80005758: 000ebf83 ld x31,0(x29) + 8000575c: 008e8e93 addi x29,x29,8 + +0000000080005760 : +Zknd_aes64ds_cg_cmp_rd_rs1_b10: + aes64ds x10, x10, x31 # perform operation + 80005760: 3bf50533 aes64ds x10,x10,x31 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64ds_cg_cmp_rd_rs1_b10, Zknd_aes64ds_cg_cmp_rd_rs1_b10_str) + 80005764: 0007b203 ld x4,0(x15) + 80005768: 00a20c63 beq x4,x10,80005780 + 8000576c: 195052ef jal x5,8000b100 + 80005770: 80005760 .word 0x80005760 + 80005774: 00000000 .word 0x00000000 + 80005778: 8001c3aa .word 0x8001c3aa + 8000577c: 00000000 .word 0x00000000 + 80005780: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0xadc48e16e2d6e6bf + 80005784: 000eb583 ld x11,0(x29) + 80005788: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x8c8a46db34259276 + 8000578c: 000eb103 ld x2,0(x29) + 80005790: 008e8e93 addi x29,x29,8 + +0000000080005794 : +Zknd_aes64ds_cg_cmp_rd_rs1_b11: + aes64ds x11, x11, x2 # perform operation + 80005794: 3a2585b3 aes64ds x11,x11,x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64ds_cg_cmp_rd_rs1_b11, Zknd_aes64ds_cg_cmp_rd_rs1_b11_str) + 80005798: 0007b203 ld x4,0(x15) + 8000579c: 00b20c63 beq x4,x11,800057b4 + 800057a0: 161052ef jal x5,8000b100 + 800057a4: 80005794 .word 0x80005794 + 800057a8: 00000000 .word 0x00000000 + 800057ac: 8001c3e5 .word 0x8001c3e5 + 800057b0: 00000000 .word 0x00000000 + 800057b4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x70eb24e5ce8a8058 + 800057b8: 000eb603 ld x12,0(x29) + 800057bc: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs2: x24 = 0x35afc22d3a2fc7b7 + 800057c0: 000ebc03 ld x24,0(x29) + 800057c4: 008e8e93 addi x29,x29,8 + +00000000800057c8 : +Zknd_aes64ds_cg_cmp_rd_rs1_b12: + aes64ds x12, x12, x24 # perform operation + 800057c8: 3b860633 aes64ds x12,x12,x24 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64ds_cg_cmp_rd_rs1_b12, Zknd_aes64ds_cg_cmp_rd_rs1_b12_str) + 800057cc: 0007b203 ld x4,0(x15) + 800057d0: 00c20c63 beq x4,x12,800057e8 + 800057d4: 12d052ef jal x5,8000b100 + 800057d8: 800057c8 .word 0x800057c8 + 800057dc: 00000000 .word 0x00000000 + 800057e0: 8001c420 .word 0x8001c420 + 800057e4: 00000000 .word 0x00000000 + 800057e8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x7e620d084b2bad84 + 800057ec: 000eb683 ld x13,0(x29) + 800057f0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0xb763e2838b9c9f2d + 800057f4: 000eb503 ld x10,0(x29) + 800057f8: 008e8e93 addi x29,x29,8 + +00000000800057fc : +Zknd_aes64ds_cg_cmp_rd_rs1_b13: + aes64ds x13, x13, x10 # perform operation + 800057fc: 3aa686b3 aes64ds x13,x13,x10 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64ds_cg_cmp_rd_rs1_b13, Zknd_aes64ds_cg_cmp_rd_rs1_b13_str) + 80005800: 0007b203 ld x4,0(x15) + 80005804: 00d20c63 beq x4,x13,8000581c + 80005808: 0f9052ef jal x5,8000b100 + 8000580c: 800057fc .word 0x800057fc + 80005810: 00000000 .word 0x00000000 + 80005814: 8001c45b .word 0x8001c45b + 80005818: 00000000 .word 0x00000000 + 8000581c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x2974ae4cacfeb758 + 80005820: 000eb703 ld x14,0(x29) + 80005824: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0xd764d0c6f5a0a6c8 + 80005828: 000eb503 ld x10,0(x29) + 8000582c: 008e8e93 addi x29,x29,8 + +0000000080005830 : +Zknd_aes64ds_cg_cmp_rd_rs1_b14: + aes64ds x14, x14, x10 # perform operation + 80005830: 3aa70733 aes64ds x14,x14,x10 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64ds_cg_cmp_rd_rs1_b14, Zknd_aes64ds_cg_cmp_rd_rs1_b14_str) + 80005834: 0007b203 ld x4,0(x15) + 80005838: 00e20c63 beq x4,x14,80005850 + 8000583c: 0c5052ef jal x5,8000b100 + 80005840: 80005830 .word 0x80005830 + 80005844: 00000000 .word 0x00000000 + 80005848: 8001c496 .word 0x8001c496 + 8000584c: 00000000 .word 0x00000000 + 80005850: 00878793 addi x15,x15,8 + + mv x17, x15 # switch signature pointer register to avoid conflict with test + 80005854: 00078893 addi x17,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x8f70a3c3204c2cd7 + 80005858: 000eb783 ld x15,0(x29) + 8000585c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs2: x13 = 0xd158e3c24c8b11f8 + 80005860: 000eb683 ld x13,0(x29) + 80005864: 008e8e93 addi x29,x29,8 + +0000000080005868 : +Zknd_aes64ds_cg_cmp_rd_rs1_b15: + aes64ds x15, x15, x13 # perform operation + 80005868: 3ad787b3 aes64ds x15,x15,x13 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cmp_rd_rs1_b15, Zknd_aes64ds_cg_cmp_rd_rs1_b15_str) + 8000586c: 0008b203 ld x4,0(x17) + 80005870: 00f20c63 beq x4,x15,80005888 + 80005874: 08d052ef jal x5,8000b100 + 80005878: 80005868 .word 0x80005868 + 8000587c: 00000000 .word 0x00000000 + 80005880: 8001c4d1 .word 0x8001c4d1 + 80005884: 00000000 .word 0x00000000 + 80005888: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0xf2bd381c5d4e7d3b + 8000588c: 000eb803 ld x16,0(x29) + 80005890: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0xdf25f81eb82a0784 + 80005894: 000eb303 ld x6,0(x29) + 80005898: 008e8e93 addi x29,x29,8 + +000000008000589c : +Zknd_aes64ds_cg_cmp_rd_rs1_b16: + aes64ds x16, x16, x6 # perform operation + 8000589c: 3a680833 aes64ds x16,x16,x6 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cmp_rd_rs1_b16, Zknd_aes64ds_cg_cmp_rd_rs1_b16_str) + 800058a0: 0008b203 ld x4,0(x17) + 800058a4: 01020c63 beq x4,x16,800058bc + 800058a8: 059052ef jal x5,8000b100 + 800058ac: 8000589c .word 0x8000589c + 800058b0: 00000000 .word 0x00000000 + 800058b4: 8001c50c .word 0x8001c50c + 800058b8: 00000000 .word 0x00000000 + 800058bc: 00888893 addi x17,x17,8 + + mv x6, x17 # switch signature pointer register to avoid conflict with test + 800058c0: 00088313 addi x6,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x0427b2c3cdf66630 + 800058c4: 000eb883 ld x17,0(x29) + 800058c8: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xe323e8c99e86af03 + 800058cc: 000eb783 ld x15,0(x29) + 800058d0: 008e8e93 addi x29,x29,8 + +00000000800058d4 : +Zknd_aes64ds_cg_cmp_rd_rs1_b17: + aes64ds x17, x17, x15 # perform operation + 800058d4: 3af888b3 aes64ds x17,x17,x15 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zknd_aes64ds_cg_cmp_rd_rs1_b17, Zknd_aes64ds_cg_cmp_rd_rs1_b17_str) + 800058d8: 00033203 ld x4,0(x6) + 800058dc: 01120c63 beq x4,x17,800058f4 + 800058e0: 021052ef jal x5,8000b100 + 800058e4: 800058d4 .word 0x800058d4 + 800058e8: 00000000 .word 0x00000000 + 800058ec: 8001c547 .word 0x8001c547 + 800058f0: 00000000 .word 0x00000000 + 800058f4: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0xd1a94eaf5fa309b2 + 800058f8: 000eb903 ld x18,0(x29) + 800058fc: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0x95b41c66c24a7171 + 80005900: 000ebd83 ld x27,0(x29) + 80005904: 008e8e93 addi x29,x29,8 + +0000000080005908 : +Zknd_aes64ds_cg_cmp_rd_rs1_b18: + aes64ds x18, x18, x27 # perform operation + 80005908: 3bb90933 aes64ds x18,x18,x27 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zknd_aes64ds_cg_cmp_rd_rs1_b18, Zknd_aes64ds_cg_cmp_rd_rs1_b18_str) + 8000590c: 00033203 ld x4,0(x6) + 80005910: 01220c63 beq x4,x18,80005928 + 80005914: 7ec052ef jal x5,8000b100 + 80005918: 80005908 .word 0x80005908 + 8000591c: 00000000 .word 0x00000000 + 80005920: 8001c582 .word 0x8001c582 + 80005924: 00000000 .word 0x00000000 + 80005928: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0xbb94ba80f001f1de + 8000592c: 000eb983 ld x19,0(x29) + 80005930: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0xee543def29d1a93c + 80005934: 000eb383 ld x7,0(x29) + 80005938: 008e8e93 addi x29,x29,8 + +000000008000593c : +Zknd_aes64ds_cg_cmp_rd_rs1_b19: + aes64ds x19, x19, x7 # perform operation + 8000593c: 3a7989b3 aes64ds x19,x19,x7 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zknd_aes64ds_cg_cmp_rd_rs1_b19, Zknd_aes64ds_cg_cmp_rd_rs1_b19_str) + 80005940: 00033203 ld x4,0(x6) + 80005944: 01320c63 beq x4,x19,8000595c + 80005948: 7b8052ef jal x5,8000b100 + 8000594c: 8000593c .word 0x8000593c + 80005950: 00000000 .word 0x00000000 + 80005954: 8001c5bd .word 0x8001c5bd + 80005958: 00000000 .word 0x00000000 + 8000595c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xe6468f6f9a463917 + 80005960: 000eba03 ld x20,0(x29) + 80005964: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs2: x27 = 0xbcaba02df1386990 + 80005968: 000ebd83 ld x27,0(x29) + 8000596c: 008e8e93 addi x29,x29,8 + +0000000080005970 : +Zknd_aes64ds_cg_cmp_rd_rs1_b20: + aes64ds x20, x20, x27 # perform operation + 80005970: 3bba0a33 aes64ds x20,x20,x27 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zknd_aes64ds_cg_cmp_rd_rs1_b20, Zknd_aes64ds_cg_cmp_rd_rs1_b20_str) + 80005974: 00033203 ld x4,0(x6) + 80005978: 01420c63 beq x4,x20,80005990 + 8000597c: 784052ef jal x5,8000b100 + 80005980: 80005970 .word 0x80005970 + 80005984: 00000000 .word 0x00000000 + 80005988: 8001c5f8 .word 0x8001c5f8 + 8000598c: 00000000 .word 0x00000000 + 80005990: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xf97bdcea1501978c + 80005994: 000eba83 ld x21,0(x29) + 80005998: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x14b60b4598873596 + 8000599c: 000ebc83 ld x25,0(x29) + 800059a0: 008e8e93 addi x29,x29,8 + +00000000800059a4 : +Zknd_aes64ds_cg_cmp_rd_rs1_b21: + aes64ds x21, x21, x25 # perform operation + 800059a4: 3b9a8ab3 aes64ds x21,x21,x25 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zknd_aes64ds_cg_cmp_rd_rs1_b21, Zknd_aes64ds_cg_cmp_rd_rs1_b21_str) + 800059a8: 00033203 ld x4,0(x6) + 800059ac: 01520c63 beq x4,x21,800059c4 + 800059b0: 750052ef jal x5,8000b100 + 800059b4: 800059a4 .word 0x800059a4 + 800059b8: 00000000 .word 0x00000000 + 800059bc: 8001c633 .word 0x8001c633 + 800059c0: 00000000 .word 0x00000000 + 800059c4: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x40613beddc875213 + 800059c8: 000ebb03 ld x22,0(x29) + 800059cc: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0xe8dbe388bfb23783 + 800059d0: 000eb703 ld x14,0(x29) + 800059d4: 008e8e93 addi x29,x29,8 + +00000000800059d8 : +Zknd_aes64ds_cg_cmp_rd_rs1_b22: + aes64ds x22, x22, x14 # perform operation + 800059d8: 3aeb0b33 aes64ds x22,x22,x14 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zknd_aes64ds_cg_cmp_rd_rs1_b22, Zknd_aes64ds_cg_cmp_rd_rs1_b22_str) + 800059dc: 00033203 ld x4,0(x6) + 800059e0: 01620c63 beq x4,x22,800059f8 + 800059e4: 71c052ef jal x5,8000b100 + 800059e8: 800059d8 .word 0x800059d8 + 800059ec: 00000000 .word 0x00000000 + 800059f0: 8001c66e .word 0x8001c66e + 800059f4: 00000000 .word 0x00000000 + 800059f8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x5560fadc9dfaca77 + 800059fc: 000ebb83 ld x23,0(x29) + 80005a00: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs2: x16 = 0x83395abc34dfec23 + 80005a04: 000eb803 ld x16,0(x29) + 80005a08: 008e8e93 addi x29,x29,8 + +0000000080005a0c : +Zknd_aes64ds_cg_cmp_rd_rs1_b23: + aes64ds x23, x23, x16 # perform operation + 80005a0c: 3b0b8bb3 aes64ds x23,x23,x16 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknd_aes64ds_cg_cmp_rd_rs1_b23, Zknd_aes64ds_cg_cmp_rd_rs1_b23_str) + 80005a10: 00033203 ld x4,0(x6) + 80005a14: 01720c63 beq x4,x23,80005a2c + 80005a18: 6e8052ef jal x5,8000b100 + 80005a1c: 80005a0c .word 0x80005a0c + 80005a20: 00000000 .word 0x00000000 + 80005a24: 8001c6a9 .word 0x8001c6a9 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0x3506b6c35f14127d + 80005a30: 000ebc03 ld x24,0(x29) + 80005a34: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x964ae412f5ae25dc + 80005a38: 000eb703 ld x14,0(x29) + 80005a3c: 008e8e93 addi x29,x29,8 + +0000000080005a40 : +Zknd_aes64ds_cg_cmp_rd_rs1_b24: + aes64ds x24, x24, x14 # perform operation + 80005a40: 3aec0c33 aes64ds x24,x24,x14 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zknd_aes64ds_cg_cmp_rd_rs1_b24, Zknd_aes64ds_cg_cmp_rd_rs1_b24_str) + 80005a44: 00033203 ld x4,0(x6) + 80005a48: 01820c63 beq x4,x24,80005a60 + 80005a4c: 6b4052ef jal x5,8000b100 + 80005a50: 80005a40 .word 0x80005a40 + 80005a54: 00000000 .word 0x00000000 + 80005a58: 8001c6e4 .word 0x8001c6e4 + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0xaa834646a896b659 + 80005a64: 000ebc83 ld x25,0(x29) + 80005a68: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0x0d929d216a0e7de8 + 80005a6c: 000eb603 ld x12,0(x29) + 80005a70: 008e8e93 addi x29,x29,8 + +0000000080005a74 : +Zknd_aes64ds_cg_cmp_rd_rs1_b25: + aes64ds x25, x25, x12 # perform operation + 80005a74: 3acc8cb3 aes64ds x25,x25,x12 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zknd_aes64ds_cg_cmp_rd_rs1_b25, Zknd_aes64ds_cg_cmp_rd_rs1_b25_str) + 80005a78: 00033203 ld x4,0(x6) + 80005a7c: 01920c63 beq x4,x25,80005a94 + 80005a80: 680052ef jal x5,8000b100 + 80005a84: 80005a74 .word 0x80005a74 + 80005a88: 00000000 .word 0x00000000 + 80005a8c: 8001c71f .word 0x8001c71f + 80005a90: 00000000 .word 0x00000000 + 80005a94: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x89659f74dc3bbb0b + 80005a98: 000ebd03 ld x26,0(x29) + 80005a9c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs2: x7 = 0x0f1d27d0547490ea + 80005aa0: 000eb383 ld x7,0(x29) + 80005aa4: 008e8e93 addi x29,x29,8 + +0000000080005aa8 : +Zknd_aes64ds_cg_cmp_rd_rs1_b26: + aes64ds x26, x26, x7 # perform operation + 80005aa8: 3a7d0d33 aes64ds x26,x26,x7 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zknd_aes64ds_cg_cmp_rd_rs1_b26, Zknd_aes64ds_cg_cmp_rd_rs1_b26_str) + 80005aac: 00033203 ld x4,0(x6) + 80005ab0: 01a20c63 beq x4,x26,80005ac8 + 80005ab4: 64c052ef jal x5,8000b100 + 80005ab8: 80005aa8 .word 0x80005aa8 + 80005abc: 00000000 .word 0x00000000 + 80005ac0: 8001c75a .word 0x8001c75a + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x0238adcd3f807283 + 80005acc: 000ebd83 ld x27,0(x29) + 80005ad0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0xa2473a0ea4d67f43 + 80005ad4: 000ebe03 ld x28,0(x29) + 80005ad8: 008e8e93 addi x29,x29,8 + +0000000080005adc : +Zknd_aes64ds_cg_cmp_rd_rs1_b27: + aes64ds x27, x27, x28 # perform operation + 80005adc: 3bcd8db3 aes64ds x27,x27,x28 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zknd_aes64ds_cg_cmp_rd_rs1_b27, Zknd_aes64ds_cg_cmp_rd_rs1_b27_str) + 80005ae0: 00033203 ld x4,0(x6) + 80005ae4: 01b20c63 beq x4,x27,80005afc + 80005ae8: 618052ef jal x5,8000b100 + 80005aec: 80005adc .word 0x80005adc + 80005af0: 00000000 .word 0x00000000 + 80005af4: 8001c795 .word 0x8001c795 + 80005af8: 00000000 .word 0x00000000 + 80005afc: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xc4936c6b4b3f7e11 + 80005b00: 000ebe03 ld x28,0(x29) + 80005b04: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0x08eb6702bb6b9579 + 80005b08: 000ebd03 ld x26,0(x29) + 80005b0c: 008e8e93 addi x29,x29,8 + +0000000080005b10 : +Zknd_aes64ds_cg_cmp_rd_rs1_b28: + aes64ds x28, x28, x26 # perform operation + 80005b10: 3bae0e33 aes64ds x28,x28,x26 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zknd_aes64ds_cg_cmp_rd_rs1_b28, Zknd_aes64ds_cg_cmp_rd_rs1_b28_str) + 80005b14: 00033203 ld x4,0(x6) + 80005b18: 01c20c63 beq x4,x28,80005b30 + 80005b1c: 5e4052ef jal x5,8000b100 + 80005b20: 80005b10 .word 0x80005b10 + 80005b24: 00000000 .word 0x00000000 + 80005b28: 8001c7d0 .word 0x8001c7d0 + 80005b2c: 00000000 .word 0x00000000 + 80005b30: 00830313 addi x6,x6,8 + + mv x17, x29 # switch data pointer register to avoid conflict with test + 80005b34: 000e8893 addi x17,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x2759ddd16acc167c + 80005b38: 0008be83 ld x29,0(x17) + 80005b3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xdba27b7dbb327ab1 + 80005b40: 0008be03 ld x28,0(x17) + 80005b44: 00888893 addi x17,x17,8 + +0000000080005b48 : +Zknd_aes64ds_cg_cmp_rd_rs1_b29: + aes64ds x29, x29, x28 # perform operation + 80005b48: 3bce8eb3 aes64ds x29,x29,x28 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zknd_aes64ds_cg_cmp_rd_rs1_b29, Zknd_aes64ds_cg_cmp_rd_rs1_b29_str) + 80005b4c: 00033203 ld x4,0(x6) + 80005b50: 01d20c63 beq x4,x29,80005b68 + 80005b54: 5ac052ef jal x5,8000b100 + 80005b58: 80005b48 .word 0x80005b48 + 80005b5c: 00000000 .word 0x00000000 + 80005b60: 8001c80b .word 0x8001c80b + 80005b64: 00000000 .word 0x00000000 + 80005b68: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x44178155e408be8c + 80005b6c: 0008bf03 ld x30,0(x17) + 80005b70: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x4cf03605550e2dcd + 80005b74: 0008bf83 ld x31,0(x17) + 80005b78: 00888893 addi x17,x17,8 + +0000000080005b7c : +Zknd_aes64ds_cg_cmp_rd_rs1_b30: + aes64ds x30, x30, x31 # perform operation + 80005b7c: 3bff0f33 aes64ds x30,x30,x31 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zknd_aes64ds_cg_cmp_rd_rs1_b30, Zknd_aes64ds_cg_cmp_rd_rs1_b30_str) + 80005b80: 00033203 ld x4,0(x6) + 80005b84: 01e20c63 beq x4,x30,80005b9c + 80005b88: 578052ef jal x5,8000b100 + 80005b8c: 80005b7c .word 0x80005b7c + 80005b90: 00000000 .word 0x00000000 + 80005b94: 8001c846 .word 0x8001c846 + 80005b98: 00000000 .word 0x00000000 + 80005b9c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x14d7a7c2813a85a6 + 80005ba0: 0008bf83 ld x31,0(x17) + 80005ba4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xe82a9127ae4c3091 + 80005ba8: 0008ba83 ld x21,0(x17) + 80005bac: 00888893 addi x17,x17,8 + +0000000080005bb0 : +Zknd_aes64ds_cg_cmp_rd_rs1_b31: + aes64ds x31, x31, x21 # perform operation + 80005bb0: 3b5f8fb3 aes64ds x31,x31,x21 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zknd_aes64ds_cg_cmp_rd_rs1_b31, Zknd_aes64ds_cg_cmp_rd_rs1_b31_str) + 80005bb4: 00033203 ld x4,0(x6) + 80005bb8: 01f20c63 beq x4,x31,80005bd0 + 80005bbc: 544052ef jal x5,8000b100 + 80005bc0: 80005bb0 .word 0x80005bb0 + 80005bc4: 00000000 .word 0x00000000 + 80005bc8: 8001c881 .word 0x8001c881 + 80005bcc: 00000000 .word 0x00000000 + 80005bd0: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x3ed10feba17c2059 + 80005bd4: 0008bb03 ld x22,0(x17) + 80005bd8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0xb46c170b2521e29b + 80005bdc: 0008b003 ld x0,0(x17) + 80005be0: 00888893 addi x17,x17,8 + +0000000080005be4 : +Zknd_aes64ds_cg_cmp_rd_rs2_b0: + aes64ds x0, x22, x0 # perform operation + 80005be4: 3a0b0033 aes64ds x0,x22,x0 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zknd_aes64ds_cg_cmp_rd_rs2_b0, Zknd_aes64ds_cg_cmp_rd_rs2_b0_str) + 80005be8: 00033203 ld x4,0(x6) + 80005bec: 00020c63 beq x4,x0,80005c04 + 80005bf0: 510052ef jal x5,8000b100 + 80005bf4: 80005be4 .word 0x80005be4 + 80005bf8: 00000000 .word 0x00000000 + 80005bfc: 8001c8bc .word 0x8001c8bc + 80005c00: 00000000 .word 0x00000000 + 80005c04: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xb0dc9ee5a8ae1b9b + 80005c08: 0008b983 ld x19,0(x17) + 80005c0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x13d16c7e4ecf2cd7 + 80005c10: 0008b083 ld x1,0(x17) + 80005c14: 00888893 addi x17,x17,8 + +0000000080005c18 : +Zknd_aes64ds_cg_cmp_rd_rs2_b1: + aes64ds x1, x19, x1 # perform operation + 80005c18: 3a1980b3 aes64ds x1,x19,x1 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zknd_aes64ds_cg_cmp_rd_rs2_b1, Zknd_aes64ds_cg_cmp_rd_rs2_b1_str) + 80005c1c: 00033203 ld x4,0(x6) + 80005c20: 00120c63 beq x4,x1,80005c38 + 80005c24: 4dc052ef jal x5,8000b100 + 80005c28: 80005c18 .word 0x80005c18 + 80005c2c: 00000000 .word 0x00000000 + 80005c30: 8001c8f6 .word 0x8001c8f6 + 80005c34: 00000000 .word 0x00000000 + 80005c38: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x887737c53a2b0900 + 80005c3c: 0008bf03 ld x30,0(x17) + 80005c40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x0ab6de046986994f + 80005c44: 0008b103 ld x2,0(x17) + 80005c48: 00888893 addi x17,x17,8 + +0000000080005c4c : +Zknd_aes64ds_cg_cmp_rd_rs2_b2: + aes64ds x2, x30, x2 # perform operation + 80005c4c: 3a2f0133 aes64ds x2,x30,x2 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zknd_aes64ds_cg_cmp_rd_rs2_b2, Zknd_aes64ds_cg_cmp_rd_rs2_b2_str) + 80005c50: 00033203 ld x4,0(x6) + 80005c54: 00220c63 beq x4,x2,80005c6c + 80005c58: 4a8052ef jal x5,8000b100 + 80005c5c: 80005c4c .word 0x80005c4c + 80005c60: 00000000 .word 0x00000000 + 80005c64: 8001c930 .word 0x8001c930 + 80005c68: 00000000 .word 0x00000000 + 80005c6c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x185e69bcda4c34d0 + 80005c70: 0008b483 ld x9,0(x17) + 80005c74: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xeb6315b1eae8ff7d + 80005c78: 0008b183 ld x3,0(x17) + 80005c7c: 00888893 addi x17,x17,8 + +0000000080005c80 : +Zknd_aes64ds_cg_cmp_rd_rs2_b3: + aes64ds x3, x9, x3 # perform operation + 80005c80: 3a3481b3 aes64ds x3,x9,x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknd_aes64ds_cg_cmp_rd_rs2_b3, Zknd_aes64ds_cg_cmp_rd_rs2_b3_str) + 80005c84: 00033203 ld x4,0(x6) + 80005c88: 00320c63 beq x4,x3,80005ca0 + 80005c8c: 474052ef jal x5,8000b100 + 80005c90: 80005c80 .word 0x80005c80 + 80005c94: 00000000 .word 0x00000000 + 80005c98: 8001c96a .word 0x8001c96a + 80005c9c: 00000000 .word 0x00000000 + 80005ca0: 00830313 addi x6,x6,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005ca4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005ca8: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0xf0174b955391a684 + 80005cac: 0008b003 ld x0,0(x17) + 80005cb0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0xcc2bc9ef1596fcb4 + 80005cb4: 0008b203 ld x4,0(x17) + 80005cb8: 00888893 addi x17,x17,8 + +0000000080005cbc : +Zknd_aes64ds_cg_cmp_rd_rs2_b4: + aes64ds x4, x0, x4 # perform operation + 80005cbc: 3a400233 aes64ds x4,x0,x4 + # Check if x4 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x4, Zknd_aes64ds_cg_cmp_rd_rs2_b4, Zknd_aes64ds_cg_cmp_rd_rs2_b4_str) + 80005cc0: 00033683 ld x13,0(x6) + 80005cc4: 00468c63 beq x13,x4,80005cdc + 80005cc8: 4780576f jal x14,8000b140 + 80005ccc: 80005cbc .word 0x80005cbc + 80005cd0: 00000000 .word 0x00000000 + 80005cd4: 8001c9a4 .word 0x8001c9a4 + 80005cd8: 00000000 .word 0x00000000 + 80005cdc: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x71ab18211f502173 + 80005ce0: 0008bc83 ld x25,0(x17) + 80005ce4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0xf52aaf493de4cb09 + 80005ce8: 0008b283 ld x5,0(x17) + 80005cec: 00888893 addi x17,x17,8 + +0000000080005cf0 : +Zknd_aes64ds_cg_cmp_rd_rs2_b5: + aes64ds x5, x25, x5 # perform operation + 80005cf0: 3a5c82b3 aes64ds x5,x25,x5 + # Check if x5 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x5, Zknd_aes64ds_cg_cmp_rd_rs2_b5, Zknd_aes64ds_cg_cmp_rd_rs2_b5_str) + 80005cf4: 00033683 ld x13,0(x6) + 80005cf8: 00568c63 beq x13,x5,80005d10 + 80005cfc: 4440576f jal x14,8000b140 + 80005d00: 80005cf0 .word 0x80005cf0 + 80005d04: 00000000 .word 0x00000000 + 80005d08: 8001c9de .word 0x8001c9de + 80005d0c: 00000000 .word 0x00000000 + 80005d10: 00830313 addi x6,x6,8 + + mv x16, x6 # switch signature pointer register to avoid conflict with test + 80005d14: 00030813 addi x16,x6,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x412bda933de811ed + 80005d18: 0008b003 ld x0,0(x17) + 80005d1c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x87ac4a2369a94ec5 + 80005d20: 0008b303 ld x6,0(x17) + 80005d24: 00888893 addi x17,x17,8 + +0000000080005d28 : +Zknd_aes64ds_cg_cmp_rd_rs2_b6: + aes64ds x6, x0, x6 # perform operation + 80005d28: 3a600333 aes64ds x6,x0,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x6, Zknd_aes64ds_cg_cmp_rd_rs2_b6, Zknd_aes64ds_cg_cmp_rd_rs2_b6_str) + 80005d2c: 00083683 ld x13,0(x16) + 80005d30: 00668c63 beq x13,x6,80005d48 + 80005d34: 40c0576f jal x14,8000b140 + 80005d38: 80005d28 .word 0x80005d28 + 80005d3c: 00000000 .word 0x00000000 + 80005d40: 8001ca18 .word 0x8001ca18 + 80005d44: 00000000 .word 0x00000000 + 80005d48: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xe5974046a2a87c22 + 80005d4c: 0008b283 ld x5,0(x17) + 80005d50: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x6c80a5eef313f698 + 80005d54: 0008b383 ld x7,0(x17) + 80005d58: 00888893 addi x17,x17,8 + +0000000080005d5c : +Zknd_aes64ds_cg_cmp_rd_rs2_b7: + aes64ds x7, x5, x7 # perform operation + 80005d5c: 3a7283b3 aes64ds x7,x5,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zknd_aes64ds_cg_cmp_rd_rs2_b7, Zknd_aes64ds_cg_cmp_rd_rs2_b7_str) + 80005d60: 00083683 ld x13,0(x16) + 80005d64: 00768c63 beq x13,x7,80005d7c + 80005d68: 3d80576f jal x14,8000b140 + 80005d6c: 80005d5c .word 0x80005d5c + 80005d70: 00000000 .word 0x00000000 + 80005d74: 8001ca52 .word 0x8001ca52 + 80005d78: 00000000 .word 0x00000000 + 80005d7c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x17f70a0c2a64939c + 80005d80: 0008b203 ld x4,0(x17) + 80005d84: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x3b1420d5d8202755 + 80005d88: 0008b403 ld x8,0(x17) + 80005d8c: 00888893 addi x17,x17,8 + +0000000080005d90 : +Zknd_aes64ds_cg_cmp_rd_rs2_b8: + aes64ds x8, x4, x8 # perform operation + 80005d90: 3a820433 aes64ds x8,x4,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zknd_aes64ds_cg_cmp_rd_rs2_b8, Zknd_aes64ds_cg_cmp_rd_rs2_b8_str) + 80005d94: 00083683 ld x13,0(x16) + 80005d98: 00868c63 beq x13,x8,80005db0 + 80005d9c: 3a40576f jal x14,8000b140 + 80005da0: 80005d90 .word 0x80005d90 + 80005da4: 00000000 .word 0x00000000 + 80005da8: 8001ca8c .word 0x8001ca8c + 80005dac: 00000000 .word 0x00000000 + 80005db0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xe6c7b5bad267ccfe + 80005db4: 0008be03 ld x28,0(x17) + 80005db8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x40bb7fe3ee858a4d + 80005dbc: 0008b483 ld x9,0(x17) + 80005dc0: 00888893 addi x17,x17,8 + +0000000080005dc4 : +Zknd_aes64ds_cg_cmp_rd_rs2_b9: + aes64ds x9, x28, x9 # perform operation + 80005dc4: 3a9e04b3 aes64ds x9,x28,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zknd_aes64ds_cg_cmp_rd_rs2_b9, Zknd_aes64ds_cg_cmp_rd_rs2_b9_str) + 80005dc8: 00083683 ld x13,0(x16) + 80005dcc: 00968c63 beq x13,x9,80005de4 + 80005dd0: 3700576f jal x14,8000b140 + 80005dd4: 80005dc4 .word 0x80005dc4 + 80005dd8: 00000000 .word 0x00000000 + 80005ddc: 8001cac6 .word 0x8001cac6 + 80005de0: 00000000 .word 0x00000000 + 80005de4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x005d33631a037b2d + 80005de8: 0008bd03 ld x26,0(x17) + 80005dec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xea5943ea9aee8918 + 80005df0: 0008b503 ld x10,0(x17) + 80005df4: 00888893 addi x17,x17,8 + +0000000080005df8 : +Zknd_aes64ds_cg_cmp_rd_rs2_b10: + aes64ds x10, x26, x10 # perform operation + 80005df8: 3aad0533 aes64ds x10,x26,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zknd_aes64ds_cg_cmp_rd_rs2_b10, Zknd_aes64ds_cg_cmp_rd_rs2_b10_str) + 80005dfc: 00083683 ld x13,0(x16) + 80005e00: 00a68c63 beq x13,x10,80005e18 + 80005e04: 33c0576f jal x14,8000b140 + 80005e08: 80005df8 .word 0x80005df8 + 80005e0c: 00000000 .word 0x00000000 + 80005e10: 8001cb00 .word 0x8001cb00 + 80005e14: 00000000 .word 0x00000000 + 80005e18: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x27445aa85fe5af2d + 80005e1c: 0008b503 ld x10,0(x17) + 80005e20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x78e27ddc5cc32233 + 80005e24: 0008b583 ld x11,0(x17) + 80005e28: 00888893 addi x17,x17,8 + +0000000080005e2c : +Zknd_aes64ds_cg_cmp_rd_rs2_b11: + aes64ds x11, x10, x11 # perform operation + 80005e2c: 3ab505b3 aes64ds x11,x10,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zknd_aes64ds_cg_cmp_rd_rs2_b11, Zknd_aes64ds_cg_cmp_rd_rs2_b11_str) + 80005e30: 00083683 ld x13,0(x16) + 80005e34: 00b68c63 beq x13,x11,80005e4c + 80005e38: 3080576f jal x14,8000b140 + 80005e3c: 80005e2c .word 0x80005e2c + 80005e40: 00000000 .word 0x00000000 + 80005e44: 8001cb3b .word 0x8001cb3b + 80005e48: 00000000 .word 0x00000000 + 80005e4c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xd9b498a6b581e698 + 80005e50: 0008b583 ld x11,0(x17) + 80005e54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0xa0a32e59c65e5954 + 80005e58: 0008b603 ld x12,0(x17) + 80005e5c: 00888893 addi x17,x17,8 + +0000000080005e60 : +Zknd_aes64ds_cg_cmp_rd_rs2_b12: + aes64ds x12, x11, x12 # perform operation + 80005e60: 3ac58633 aes64ds x12,x11,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zknd_aes64ds_cg_cmp_rd_rs2_b12, Zknd_aes64ds_cg_cmp_rd_rs2_b12_str) + 80005e64: 00083683 ld x13,0(x16) + 80005e68: 00c68c63 beq x13,x12,80005e80 + 80005e6c: 2d40576f jal x14,8000b140 + 80005e70: 80005e60 .word 0x80005e60 + 80005e74: 00000000 .word 0x00000000 + 80005e78: 8001cb76 .word 0x8001cb76 + 80005e7c: 00000000 .word 0x00000000 + 80005e80: 00880813 addi x16,x16,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e84: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005e88: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x34da417530fd15b7 + 80005e8c: 0008b583 ld x11,0(x17) + 80005e90: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x54f571b077765a8e + 80005e94: 0008b683 ld x13,0(x17) + 80005e98: 00888893 addi x17,x17,8 + +0000000080005e9c : +Zknd_aes64ds_cg_cmp_rd_rs2_b13: + aes64ds x13, x11, x13 # perform operation + 80005e9c: 3ad586b3 aes64ds x13,x11,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zknd_aes64ds_cg_cmp_rd_rs2_b13, Zknd_aes64ds_cg_cmp_rd_rs2_b13_str) + 80005ea0: 00083203 ld x4,0(x16) + 80005ea4: 00d20c63 beq x4,x13,80005ebc + 80005ea8: 258052ef jal x5,8000b100 + 80005eac: 80005e9c .word 0x80005e9c + 80005eb0: 00000000 .word 0x00000000 + 80005eb4: 8001cbb1 .word 0x8001cbb1 + 80005eb8: 00000000 .word 0x00000000 + 80005ebc: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x02e2366885c5d7e3 + 80005ec0: 0008b983 ld x19,0(x17) + 80005ec4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x1511aa5076b8c211 + 80005ec8: 0008b703 ld x14,0(x17) + 80005ecc: 00888893 addi x17,x17,8 + +0000000080005ed0 : +Zknd_aes64ds_cg_cmp_rd_rs2_b14: + aes64ds x14, x19, x14 # perform operation + 80005ed0: 3ae98733 aes64ds x14,x19,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zknd_aes64ds_cg_cmp_rd_rs2_b14, Zknd_aes64ds_cg_cmp_rd_rs2_b14_str) + 80005ed4: 00083203 ld x4,0(x16) + 80005ed8: 00e20c63 beq x4,x14,80005ef0 + 80005edc: 224052ef jal x5,8000b100 + 80005ee0: 80005ed0 .word 0x80005ed0 + 80005ee4: 00000000 .word 0x00000000 + 80005ee8: 8001cbec .word 0x8001cbec + 80005eec: 00000000 .word 0x00000000 + 80005ef0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x8acbc799232111d5 + 80005ef4: 0008bb03 ld x22,0(x17) + 80005ef8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0xe3a525b212b6be0f + 80005efc: 0008b783 ld x15,0(x17) + 80005f00: 00888893 addi x17,x17,8 + +0000000080005f04 : +Zknd_aes64ds_cg_cmp_rd_rs2_b15: + aes64ds x15, x22, x15 # perform operation + 80005f04: 3afb07b3 aes64ds x15,x22,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ds_cg_cmp_rd_rs2_b15, Zknd_aes64ds_cg_cmp_rd_rs2_b15_str) + 80005f08: 00083203 ld x4,0(x16) + 80005f0c: 00f20c63 beq x4,x15,80005f24 + 80005f10: 1f0052ef jal x5,8000b100 + 80005f14: 80005f04 .word 0x80005f04 + 80005f18: 00000000 .word 0x00000000 + 80005f1c: 8001cc27 .word 0x8001cc27 + 80005f20: 00000000 .word 0x00000000 + 80005f24: 00880813 addi x16,x16,8 + + mv x28, x16 # switch signature pointer register to avoid conflict with test + 80005f28: 00080e13 addi x28,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x4ee247014667e1f3 + 80005f2c: 0008bb83 ld x23,0(x17) + 80005f30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x43d181a0a2e59d20 + 80005f34: 0008b803 ld x16,0(x17) + 80005f38: 00888893 addi x17,x17,8 + +0000000080005f3c : +Zknd_aes64ds_cg_cmp_rd_rs2_b16: + aes64ds x16, x23, x16 # perform operation + 80005f3c: 3b0b8833 aes64ds x16,x23,x16 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zknd_aes64ds_cg_cmp_rd_rs2_b16, Zknd_aes64ds_cg_cmp_rd_rs2_b16_str) + 80005f40: 000e3203 ld x4,0(x28) + 80005f44: 01020c63 beq x4,x16,80005f5c + 80005f48: 1b8052ef jal x5,8000b100 + 80005f4c: 80005f3c .word 0x80005f3c + 80005f50: 00000000 .word 0x00000000 + 80005f54: 8001cc62 .word 0x8001cc62 + 80005f58: 00000000 .word 0x00000000 + 80005f5c: 008e0e13 addi x28,x28,8 + + mv x23, x17 # switch data pointer register to avoid conflict with test + 80005f60: 00088b93 addi x23,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x6c07dcbfb4422f7e + 80005f64: 000bb903 ld x18,0(x23) + 80005f68: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x3d7a529ff2b141c8 + 80005f6c: 000bb883 ld x17,0(x23) + 80005f70: 008b8b93 addi x23,x23,8 + +0000000080005f74 : +Zknd_aes64ds_cg_cmp_rd_rs2_b17: + aes64ds x17, x18, x17 # perform operation + 80005f74: 3b1908b3 aes64ds x17,x18,x17 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zknd_aes64ds_cg_cmp_rd_rs2_b17, Zknd_aes64ds_cg_cmp_rd_rs2_b17_str) + 80005f78: 000e3203 ld x4,0(x28) + 80005f7c: 01120c63 beq x4,x17,80005f94 + 80005f80: 180052ef jal x5,8000b100 + 80005f84: 80005f74 .word 0x80005f74 + 80005f88: 00000000 .word 0x00000000 + 80005f8c: 8001cc9d .word 0x8001cc9d + 80005f90: 00000000 .word 0x00000000 + 80005f94: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xca66927b8ac7cca3 + 80005f98: 000bba03 ld x20,0(x23) + 80005f9c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x59cab1a571de7cc5 + 80005fa0: 000bb903 ld x18,0(x23) + 80005fa4: 008b8b93 addi x23,x23,8 + +0000000080005fa8 : +Zknd_aes64ds_cg_cmp_rd_rs2_b18: + aes64ds x18, x20, x18 # perform operation + 80005fa8: 3b2a0933 aes64ds x18,x20,x18 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zknd_aes64ds_cg_cmp_rd_rs2_b18, Zknd_aes64ds_cg_cmp_rd_rs2_b18_str) + 80005fac: 000e3203 ld x4,0(x28) + 80005fb0: 01220c63 beq x4,x18,80005fc8 + 80005fb4: 14c052ef jal x5,8000b100 + 80005fb8: 80005fa8 .word 0x80005fa8 + 80005fbc: 00000000 .word 0x00000000 + 80005fc0: 8001ccd8 .word 0x8001ccd8 + 80005fc4: 00000000 .word 0x00000000 + 80005fc8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xc55935de93764ad1 + 80005fcc: 000bb783 ld x15,0(x23) + 80005fd0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xc1784151140b644c + 80005fd4: 000bb983 ld x19,0(x23) + 80005fd8: 008b8b93 addi x23,x23,8 + +0000000080005fdc : +Zknd_aes64ds_cg_cmp_rd_rs2_b19: + aes64ds x19, x15, x19 # perform operation + 80005fdc: 3b3789b3 aes64ds x19,x15,x19 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zknd_aes64ds_cg_cmp_rd_rs2_b19, Zknd_aes64ds_cg_cmp_rd_rs2_b19_str) + 80005fe0: 000e3203 ld x4,0(x28) + 80005fe4: 01320c63 beq x4,x19,80005ffc + 80005fe8: 118052ef jal x5,8000b100 + 80005fec: 80005fdc .word 0x80005fdc + 80005ff0: 00000000 .word 0x00000000 + 80005ff4: 8001cd13 .word 0x8001cd13 + 80005ff8: 00000000 .word 0x00000000 + 80005ffc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x2e7ed89c1c8261d2 + 80006000: 000bb483 ld x9,0(x23) + 80006004: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xb43ef1249997551d + 80006008: 000bba03 ld x20,0(x23) + 8000600c: 008b8b93 addi x23,x23,8 + +0000000080006010 : +Zknd_aes64ds_cg_cmp_rd_rs2_b20: + aes64ds x20, x9, x20 # perform operation + 80006010: 3b448a33 aes64ds x20,x9,x20 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknd_aes64ds_cg_cmp_rd_rs2_b20, Zknd_aes64ds_cg_cmp_rd_rs2_b20_str) + 80006014: 000e3203 ld x4,0(x28) + 80006018: 01420c63 beq x4,x20,80006030 + 8000601c: 0e4052ef jal x5,8000b100 + 80006020: 80006010 .word 0x80006010 + 80006024: 00000000 .word 0x00000000 + 80006028: 8001cd4e .word 0x8001cd4e + 8000602c: 00000000 .word 0x00000000 + 80006030: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xc19f3efcfeb23e9c + 80006034: 000bbd83 ld x27,0(x23) + 80006038: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xbace1bea1cb7fd76 + 8000603c: 000bba83 ld x21,0(x23) + 80006040: 008b8b93 addi x23,x23,8 + +0000000080006044 : +Zknd_aes64ds_cg_cmp_rd_rs2_b21: + aes64ds x21, x27, x21 # perform operation + 80006044: 3b5d8ab3 aes64ds x21,x27,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zknd_aes64ds_cg_cmp_rd_rs2_b21, Zknd_aes64ds_cg_cmp_rd_rs2_b21_str) + 80006048: 000e3203 ld x4,0(x28) + 8000604c: 01520c63 beq x4,x21,80006064 + 80006050: 0b0052ef jal x5,8000b100 + 80006054: 80006044 .word 0x80006044 + 80006058: 00000000 .word 0x00000000 + 8000605c: 8001cd89 .word 0x8001cd89 + 80006060: 00000000 .word 0x00000000 + 80006064: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xc21041854a4e5271 + 80006068: 000bb803 ld x16,0(x23) + 8000606c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x19f50b4e3873dd08 + 80006070: 000bbb03 ld x22,0(x23) + 80006074: 008b8b93 addi x23,x23,8 + +0000000080006078 : +Zknd_aes64ds_cg_cmp_rd_rs2_b22: + aes64ds x22, x16, x22 # perform operation + 80006078: 3b680b33 aes64ds x22,x16,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zknd_aes64ds_cg_cmp_rd_rs2_b22, Zknd_aes64ds_cg_cmp_rd_rs2_b22_str) + 8000607c: 000e3203 ld x4,0(x28) + 80006080: 01620c63 beq x4,x22,80006098 + 80006084: 07c052ef jal x5,8000b100 + 80006088: 80006078 .word 0x80006078 + 8000608c: 00000000 .word 0x00000000 + 80006090: 8001cdc4 .word 0x8001cdc4 + 80006094: 00000000 .word 0x00000000 + 80006098: 008e0e13 addi x28,x28,8 + + mv x15, x23 # switch data pointer register to avoid conflict with test + 8000609c: 000b8793 addi x15,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x4f38cb3fbdc85faf + 800060a0: 0007bd83 ld x27,0(x15) + 800060a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xe418b0539956432c + 800060a8: 0007bb83 ld x23,0(x15) + 800060ac: 00878793 addi x15,x15,8 + +00000000800060b0 : +Zknd_aes64ds_cg_cmp_rd_rs2_b23: + aes64ds x23, x27, x23 # perform operation + 800060b0: 3b7d8bb3 aes64ds x23,x27,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zknd_aes64ds_cg_cmp_rd_rs2_b23, Zknd_aes64ds_cg_cmp_rd_rs2_b23_str) + 800060b4: 000e3203 ld x4,0(x28) + 800060b8: 01720c63 beq x4,x23,800060d0 + 800060bc: 044052ef jal x5,8000b100 + 800060c0: 800060b0 .word 0x800060b0 + 800060c4: 00000000 .word 0x00000000 + 800060c8: 8001cdff .word 0x8001cdff + 800060cc: 00000000 .word 0x00000000 + 800060d0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x530d5a1be6799d53 + 800060d4: 0007b503 ld x10,0(x15) + 800060d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x831e584870ae92b0 + 800060dc: 0007bc03 ld x24,0(x15) + 800060e0: 00878793 addi x15,x15,8 + +00000000800060e4 : +Zknd_aes64ds_cg_cmp_rd_rs2_b24: + aes64ds x24, x10, x24 # perform operation + 800060e4: 3b850c33 aes64ds x24,x10,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zknd_aes64ds_cg_cmp_rd_rs2_b24, Zknd_aes64ds_cg_cmp_rd_rs2_b24_str) + 800060e8: 000e3203 ld x4,0(x28) + 800060ec: 01820c63 beq x4,x24,80006104 + 800060f0: 010052ef jal x5,8000b100 + 800060f4: 800060e4 .word 0x800060e4 + 800060f8: 00000000 .word 0x00000000 + 800060fc: 8001ce3a .word 0x8001ce3a + 80006100: 00000000 .word 0x00000000 + 80006104: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x42ad0a40a84524a5 + 80006108: 0007b183 ld x3,0(x15) + 8000610c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xd0a9f99aa170210d + 80006110: 0007bc83 ld x25,0(x15) + 80006114: 00878793 addi x15,x15,8 + +0000000080006118 : +Zknd_aes64ds_cg_cmp_rd_rs2_b25: + aes64ds x25, x3, x25 # perform operation + 80006118: 3b918cb3 aes64ds x25,x3,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zknd_aes64ds_cg_cmp_rd_rs2_b25, Zknd_aes64ds_cg_cmp_rd_rs2_b25_str) + 8000611c: 000e3203 ld x4,0(x28) + 80006120: 01920c63 beq x4,x25,80006138 + 80006124: 7dd042ef jal x5,8000b100 + 80006128: 80006118 .word 0x80006118 + 8000612c: 00000000 .word 0x00000000 + 80006130: 8001ce75 .word 0x8001ce75 + 80006134: 00000000 .word 0x00000000 + 80006138: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x2d9fb83d15c81ddf + 8000613c: 0007bf03 ld x30,0(x15) + 80006140: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x0c157c87149b0d01 + 80006144: 0007bd03 ld x26,0(x15) + 80006148: 00878793 addi x15,x15,8 + +000000008000614c : +Zknd_aes64ds_cg_cmp_rd_rs2_b26: + aes64ds x26, x30, x26 # perform operation + 8000614c: 3baf0d33 aes64ds x26,x30,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zknd_aes64ds_cg_cmp_rd_rs2_b26, Zknd_aes64ds_cg_cmp_rd_rs2_b26_str) + 80006150: 000e3203 ld x4,0(x28) + 80006154: 01a20c63 beq x4,x26,8000616c + 80006158: 7a9042ef jal x5,8000b100 + 8000615c: 8000614c .word 0x8000614c + 80006160: 00000000 .word 0x00000000 + 80006164: 8001ceb0 .word 0x8001ceb0 + 80006168: 00000000 .word 0x00000000 + 8000616c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x44e4ef62fb84a2a0 + 80006170: 0007b383 ld x7,0(x15) + 80006174: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xe0e91d5869e1b15e + 80006178: 0007bd83 ld x27,0(x15) + 8000617c: 00878793 addi x15,x15,8 + +0000000080006180 : +Zknd_aes64ds_cg_cmp_rd_rs2_b27: + aes64ds x27, x7, x27 # perform operation + 80006180: 3bb38db3 aes64ds x27,x7,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zknd_aes64ds_cg_cmp_rd_rs2_b27, Zknd_aes64ds_cg_cmp_rd_rs2_b27_str) + 80006184: 000e3203 ld x4,0(x28) + 80006188: 01b20c63 beq x4,x27,800061a0 + 8000618c: 775042ef jal x5,8000b100 + 80006190: 80006180 .word 0x80006180 + 80006194: 00000000 .word 0x00000000 + 80006198: 8001ceeb .word 0x8001ceeb + 8000619c: 00000000 .word 0x00000000 + 800061a0: 008e0e13 addi x28,x28,8 + + mv x2, x28 # switch signature pointer register to avoid conflict with test + 800061a4: 000e0113 addi x2,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x56ce0e8679253c3a + 800061a8: 0007bd03 ld x26,0(x15) + 800061ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x6a2b64c0055953e8 + 800061b0: 0007be03 ld x28,0(x15) + 800061b4: 00878793 addi x15,x15,8 + +00000000800061b8 : +Zknd_aes64ds_cg_cmp_rd_rs2_b28: + aes64ds x28, x26, x28 # perform operation + 800061b8: 3bcd0e33 aes64ds x28,x26,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknd_aes64ds_cg_cmp_rd_rs2_b28, Zknd_aes64ds_cg_cmp_rd_rs2_b28_str) + 800061bc: 00013203 ld x4,0(x2) + 800061c0: 01c20c63 beq x4,x28,800061d8 + 800061c4: 73d042ef jal x5,8000b100 + 800061c8: 800061b8 .word 0x800061b8 + 800061cc: 00000000 .word 0x00000000 + 800061d0: 8001cf26 .word 0x8001cf26 + 800061d4: 00000000 .word 0x00000000 + 800061d8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x1d47bc0502822379 + 800061dc: 0007be03 ld x28,0(x15) + 800061e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xf910e2663fbc6626 + 800061e4: 0007be83 ld x29,0(x15) + 800061e8: 00878793 addi x15,x15,8 + +00000000800061ec : +Zknd_aes64ds_cg_cmp_rd_rs2_b29: + aes64ds x29, x28, x29 # perform operation + 800061ec: 3bde0eb3 aes64ds x29,x28,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes64ds_cg_cmp_rd_rs2_b29, Zknd_aes64ds_cg_cmp_rd_rs2_b29_str) + 800061f0: 00013203 ld x4,0(x2) + 800061f4: 01d20c63 beq x4,x29,8000620c + 800061f8: 709042ef jal x5,8000b100 + 800061fc: 800061ec .word 0x800061ec + 80006200: 00000000 .word 0x00000000 + 80006204: 8001cf61 .word 0x8001cf61 + 80006208: 00000000 .word 0x00000000 + 8000620c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x55de419233e49660 + 80006210: 0007bd03 ld x26,0(x15) + 80006214: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x889f0f87ec6e9acc + 80006218: 0007bf03 ld x30,0(x15) + 8000621c: 00878793 addi x15,x15,8 + +0000000080006220 : +Zknd_aes64ds_cg_cmp_rd_rs2_b30: + aes64ds x30, x26, x30 # perform operation + 80006220: 3bed0f33 aes64ds x30,x26,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknd_aes64ds_cg_cmp_rd_rs2_b30, Zknd_aes64ds_cg_cmp_rd_rs2_b30_str) + 80006224: 00013203 ld x4,0(x2) + 80006228: 01e20c63 beq x4,x30,80006240 + 8000622c: 6d5042ef jal x5,8000b100 + 80006230: 80006220 .word 0x80006220 + 80006234: 00000000 .word 0x00000000 + 80006238: 8001cf9c .word 0x8001cf9c + 8000623c: 00000000 .word 0x00000000 + 80006240: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xb36da2651744a715 + 80006244: 0007b603 ld x12,0(x15) + 80006248: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x132cb7b8f1687d78 + 8000624c: 0007bf83 ld x31,0(x15) + 80006250: 00878793 addi x15,x15,8 + +0000000080006254 : +Zknd_aes64ds_cg_cmp_rd_rs2_b31: + aes64ds x31, x12, x31 # perform operation + 80006254: 3bf60fb3 aes64ds x31,x12,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknd_aes64ds_cg_cmp_rd_rs2_b31, Zknd_aes64ds_cg_cmp_rd_rs2_b31_str) + 80006258: 00013203 ld x4,0(x2) + 8000625c: 01f20c63 beq x4,x31,80006274 + 80006260: 6a1042ef jal x5,8000b100 + 80006264: 80006254 .word 0x80006254 + 80006268: 00000000 .word 0x00000000 + 8000626c: 8001cfd7 .word 0x8001cfd7 + 80006270: 00000000 .word 0x00000000 + 80006274: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x7fe1112efc3ef6d7 + 80006278: 0007b003 ld x0,0(x15) + 8000627c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x12b82d4ed8348bc5 + 80006280: 0007b003 ld x0,0(x15) + 80006284: 00878793 addi x15,x15,8 + +0000000080006288 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b0: + aes64ds x0, x0, x0 # perform operation + 80006288: 3a000033 aes64ds x0,x0,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b0, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b0_str) + 8000628c: 00013203 ld x4,0(x2) + 80006290: 00020c63 beq x4,x0,800062a8 + 80006294: 66d042ef jal x5,8000b100 + 80006298: 80006288 .word 0x80006288 + 8000629c: 00000000 .word 0x00000000 + 800062a0: 8001d012 .word 0x8001d012 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x19629d347d4f9c08 + 800062ac: 0007b083 ld x1,0(x15) + 800062b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xc4e98db5c20a5a0b + 800062b4: 0007b083 ld x1,0(x15) + 800062b8: 00878793 addi x15,x15,8 + +00000000800062bc : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b1: + aes64ds x1, x1, x1 # perform operation + 800062bc: 3a1080b3 aes64ds x1,x1,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b1, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b1_str) + 800062c0: 00013203 ld x4,0(x2) + 800062c4: 00120c63 beq x4,x1,800062dc + 800062c8: 639042ef jal x5,8000b100 + 800062cc: 800062bc .word 0x800062bc + 800062d0: 00000000 .word 0x00000000 + 800062d4: 8001d050 .word 0x8001d050 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 00810113 addi x2,x2,8 + + mv x20, x2 # switch signature pointer register to avoid conflict with test + 800062e0: 00010a13 addi x20,x2,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xeec2c5272b12e45b + 800062e4: 0007b103 ld x2,0(x15) + 800062e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x37f04cd54d872cf4 + 800062ec: 0007b103 ld x2,0(x15) + 800062f0: 00878793 addi x15,x15,8 + +00000000800062f4 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b2: + aes64ds x2, x2, x2 # perform operation + 800062f4: 3a210133 aes64ds x2,x2,x2 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b2, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b2_str) + 800062f8: 000a3203 ld x4,0(x20) + 800062fc: 00220c63 beq x4,x2,80006314 + 80006300: 601042ef jal x5,8000b100 + 80006304: 800062f4 .word 0x800062f4 + 80006308: 00000000 .word 0x00000000 + 8000630c: 8001d08e .word 0x8001d08e + 80006310: 00000000 .word 0x00000000 + 80006314: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0db3c1a662b3ad3a + 80006318: 0007b183 ld x3,0(x15) + 8000631c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xb7e2076a019fc2b4 + 80006320: 0007b183 ld x3,0(x15) + 80006324: 00878793 addi x15,x15,8 + +0000000080006328 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b3: + aes64ds x3, x3, x3 # perform operation + 80006328: 3a3181b3 aes64ds x3,x3,x3 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b3, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b3_str) + 8000632c: 000a3203 ld x4,0(x20) + 80006330: 00320c63 beq x4,x3,80006348 + 80006334: 5cd042ef jal x5,8000b100 + 80006338: 80006328 .word 0x80006328 + 8000633c: 00000000 .word 0x00000000 + 80006340: 8001d0cc .word 0x8001d0cc + 80006344: 00000000 .word 0x00000000 + 80006348: 008a0a13 addi x20,x20,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 8000634c: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80006350: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x7b9441d447a9e6ad + 80006354: 0007b203 ld x4,0(x15) + 80006358: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xd76abc26b475599d + 8000635c: 0007b203 ld x4,0(x15) + 80006360: 00878793 addi x15,x15,8 + +0000000080006364 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b4: + aes64ds x4, x4, x4 # perform operation + 80006364: 3a420233 aes64ds x4,x4,x4 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b4, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b4_str) + 80006368: 000a3383 ld x7,0(x20) + 8000636c: 00438c63 beq x7,x4,80006384 + 80006370: 5a90446f jal x8,8000b118 + 80006374: 80006364 .word 0x80006364 + 80006378: 00000000 .word 0x00000000 + 8000637c: 8001d10a .word 0x8001d10a + 80006380: 00000000 .word 0x00000000 + 80006384: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x6eb350d1b3eed7be + 80006388: 0007b283 ld x5,0(x15) + 8000638c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xad88637ece25b93d + 80006390: 0007b283 ld x5,0(x15) + 80006394: 00878793 addi x15,x15,8 + +0000000080006398 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b5: + aes64ds x5, x5, x5 # perform operation + 80006398: 3a5282b3 aes64ds x5,x5,x5 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b5, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b5_str) + 8000639c: 000a3383 ld x7,0(x20) + 800063a0: 00538c63 beq x7,x5,800063b8 + 800063a4: 5750446f jal x8,8000b118 + 800063a8: 80006398 .word 0x80006398 + 800063ac: 00000000 .word 0x00000000 + 800063b0: 8001d148 .word 0x8001d148 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x10ed40bcdb68a82e + 800063bc: 0007b303 ld x6,0(x15) + 800063c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xbedc17d7487fe974 + 800063c4: 0007b303 ld x6,0(x15) + 800063c8: 00878793 addi x15,x15,8 + +00000000800063cc : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b6: + aes64ds x6, x6, x6 # perform operation + 800063cc: 3a630333 aes64ds x6,x6,x6 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b6, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b6_str) + 800063d0: 000a3383 ld x7,0(x20) + 800063d4: 00638c63 beq x7,x6,800063ec + 800063d8: 5410446f jal x8,8000b118 + 800063dc: 800063cc .word 0x800063cc + 800063e0: 00000000 .word 0x00000000 + 800063e4: 8001d186 .word 0x8001d186 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 008a0a13 addi x20,x20,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800063f0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800063f4: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x5f024a3c73212cf8 + 800063f8: 0007b383 ld x7,0(x15) + 800063fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0xae85cc2c46dc07c9 + 80006400: 0007b383 ld x7,0(x15) + 80006404: 00878793 addi x15,x15,8 + +0000000080006408 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b7: + aes64ds x7, x7, x7 # perform operation + 80006408: 3a7383b3 aes64ds x7,x7,x7 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b7, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b7_str) + 8000640c: 000a3203 ld x4,0(x20) + 80006410: 00720c63 beq x4,x7,80006428 + 80006414: 4ed042ef jal x5,8000b100 + 80006418: 80006408 .word 0x80006408 + 8000641c: 00000000 .word 0x00000000 + 80006420: 8001d1c4 .word 0x8001d1c4 + 80006424: 00000000 .word 0x00000000 + 80006428: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x692728b7912d6068 + 8000642c: 0007b403 ld x8,0(x15) + 80006430: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0xa7de304f728589ca + 80006434: 0007b403 ld x8,0(x15) + 80006438: 00878793 addi x15,x15,8 + +000000008000643c : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b8: + aes64ds x8, x8, x8 # perform operation + 8000643c: 3a840433 aes64ds x8,x8,x8 + # Check if x8 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x8, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b8, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b8_str) + 80006440: 000a3203 ld x4,0(x20) + 80006444: 00820c63 beq x4,x8,8000645c + 80006448: 4b9042ef jal x5,8000b100 + 8000644c: 8000643c .word 0x8000643c + 80006450: 00000000 .word 0x00000000 + 80006454: 8001d202 .word 0x8001d202 + 80006458: 00000000 .word 0x00000000 + 8000645c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x9b0ac2810a86aa35 + 80006460: 0007b483 ld x9,0(x15) + 80006464: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x623a5ca7501c01ed + 80006468: 0007b483 ld x9,0(x15) + 8000646c: 00878793 addi x15,x15,8 + +0000000080006470 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b9: + aes64ds x9, x9, x9 # perform operation + 80006470: 3a9484b3 aes64ds x9,x9,x9 + # Check if x9 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x9, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b9, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b9_str) + 80006474: 000a3203 ld x4,0(x20) + 80006478: 00920c63 beq x4,x9,80006490 + 8000647c: 485042ef jal x5,8000b100 + 80006480: 80006470 .word 0x80006470 + 80006484: 00000000 .word 0x00000000 + 80006488: 8001d240 .word 0x8001d240 + 8000648c: 00000000 .word 0x00000000 + 80006490: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x2f085470b3af0c65 + 80006494: 0007b503 ld x10,0(x15) + 80006498: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x48e28c57566eee91 + 8000649c: 0007b503 ld x10,0(x15) + 800064a0: 00878793 addi x15,x15,8 + +00000000800064a4 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b10: + aes64ds x10, x10, x10 # perform operation + 800064a4: 3aa50533 aes64ds x10,x10,x10 + # Check if x10 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x10, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b10, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b10_str) + 800064a8: 000a3203 ld x4,0(x20) + 800064ac: 00a20c63 beq x4,x10,800064c4 + 800064b0: 451042ef jal x5,8000b100 + 800064b4: 800064a4 .word 0x800064a4 + 800064b8: 00000000 .word 0x00000000 + 800064bc: 8001d27e .word 0x8001d27e + 800064c0: 00000000 .word 0x00000000 + 800064c4: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x1d55541fb51aafb4 + 800064c8: 0007b583 ld x11,0(x15) + 800064cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x7baa645d62629530 + 800064d0: 0007b583 ld x11,0(x15) + 800064d4: 00878793 addi x15,x15,8 + +00000000800064d8 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b11: + aes64ds x11, x11, x11 # perform operation + 800064d8: 3ab585b3 aes64ds x11,x11,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x11, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b11, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b11_str) + 800064dc: 000a3203 ld x4,0(x20) + 800064e0: 00b20c63 beq x4,x11,800064f8 + 800064e4: 41d042ef jal x5,8000b100 + 800064e8: 800064d8 .word 0x800064d8 + 800064ec: 00000000 .word 0x00000000 + 800064f0: 8001d2bd .word 0x8001d2bd + 800064f4: 00000000 .word 0x00000000 + 800064f8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x487dfa7d9bd500fe + 800064fc: 0007b603 ld x12,0(x15) + 80006500: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x3f14212c6e00c685 + 80006504: 0007b603 ld x12,0(x15) + 80006508: 00878793 addi x15,x15,8 + +000000008000650c : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b12: + aes64ds x12, x12, x12 # perform operation + 8000650c: 3ac60633 aes64ds x12,x12,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b12, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b12_str) + 80006510: 000a3203 ld x4,0(x20) + 80006514: 00c20c63 beq x4,x12,8000652c + 80006518: 3e9042ef jal x5,8000b100 + 8000651c: 8000650c .word 0x8000650c + 80006520: 00000000 .word 0x00000000 + 80006524: 8001d2fc .word 0x8001d2fc + 80006528: 00000000 .word 0x00000000 + 8000652c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xded3993347937a82 + 80006530: 0007b683 ld x13,0(x15) + 80006534: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xe6bff0e6cc5d49b4 + 80006538: 0007b683 ld x13,0(x15) + 8000653c: 00878793 addi x15,x15,8 + +0000000080006540 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b13: + aes64ds x13, x13, x13 # perform operation + 80006540: 3ad686b3 aes64ds x13,x13,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b13, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b13_str) + 80006544: 000a3203 ld x4,0(x20) + 80006548: 00d20c63 beq x4,x13,80006560 + 8000654c: 3b5042ef jal x5,8000b100 + 80006550: 80006540 .word 0x80006540 + 80006554: 00000000 .word 0x00000000 + 80006558: 8001d33b .word 0x8001d33b + 8000655c: 00000000 .word 0x00000000 + 80006560: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x77146a3a089da695 + 80006564: 0007b703 ld x14,0(x15) + 80006568: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xb27f9c8472ee4ab8 + 8000656c: 0007b703 ld x14,0(x15) + 80006570: 00878793 addi x15,x15,8 + +0000000080006574 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b14: + aes64ds x14, x14, x14 # perform operation + 80006574: 3ae70733 aes64ds x14,x14,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b14, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b14_str) + 80006578: 000a3203 ld x4,0(x20) + 8000657c: 00e20c63 beq x4,x14,80006594 + 80006580: 381042ef jal x5,8000b100 + 80006584: 80006574 .word 0x80006574 + 80006588: 00000000 .word 0x00000000 + 8000658c: 8001d37a .word 0x8001d37a + 80006590: 00000000 .word 0x00000000 + 80006594: 008a0a13 addi x20,x20,8 + + mv x2, x15 # switch data pointer register to avoid conflict with test + 80006598: 00078113 addi x2,x15,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0ca5d0dfdb1987b4 + 8000659c: 00013783 ld x15,0(x2) + 800065a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x8e8d05663a6a87d6 + 800065a4: 00013783 ld x15,0(x2) + 800065a8: 00810113 addi x2,x2,8 + +00000000800065ac : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b15: + aes64ds x15, x15, x15 # perform operation + 800065ac: 3af787b3 aes64ds x15,x15,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b15, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b15_str) + 800065b0: 000a3203 ld x4,0(x20) + 800065b4: 00f20c63 beq x4,x15,800065cc + 800065b8: 349042ef jal x5,8000b100 + 800065bc: 800065ac .word 0x800065ac + 800065c0: 00000000 .word 0x00000000 + 800065c4: 8001d3b9 .word 0x8001d3b9 + 800065c8: 00000000 .word 0x00000000 + 800065cc: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x327cfaaf7e894a52 + 800065d0: 00013803 ld x16,0(x2) + 800065d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x02a61527c1dde626 + 800065d8: 00013803 ld x16,0(x2) + 800065dc: 00810113 addi x2,x2,8 + +00000000800065e0 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b16: + aes64ds x16, x16, x16 # perform operation + 800065e0: 3b080833 aes64ds x16,x16,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b16, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b16_str) + 800065e4: 000a3203 ld x4,0(x20) + 800065e8: 01020c63 beq x4,x16,80006600 + 800065ec: 315042ef jal x5,8000b100 + 800065f0: 800065e0 .word 0x800065e0 + 800065f4: 00000000 .word 0x00000000 + 800065f8: 8001d3f8 .word 0x8001d3f8 + 800065fc: 00000000 .word 0x00000000 + 80006600: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x3133591da0996c28 + 80006604: 00013883 ld x17,0(x2) + 80006608: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs2: x17 = 0x56f46dc20a0d10a9 + 8000660c: 00013883 ld x17,0(x2) + 80006610: 00810113 addi x2,x2,8 + +0000000080006614 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b17: + aes64ds x17, x17, x17 # perform operation + 80006614: 3b1888b3 aes64ds x17,x17,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b17, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b17_str) + 80006618: 000a3203 ld x4,0(x20) + 8000661c: 01120c63 beq x4,x17,80006634 + 80006620: 2e1042ef jal x5,8000b100 + 80006624: 80006614 .word 0x80006614 + 80006628: 00000000 .word 0x00000000 + 8000662c: 8001d437 .word 0x8001d437 + 80006630: 00000000 .word 0x00000000 + 80006634: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xdfda0c8a299550ee + 80006638: 00013903 ld x18,0(x2) + 8000663c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x546ecd018bfb29ce + 80006640: 00013903 ld x18,0(x2) + 80006644: 00810113 addi x2,x2,8 + +0000000080006648 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b18: + aes64ds x18, x18, x18 # perform operation + 80006648: 3b290933 aes64ds x18,x18,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b18, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b18_str) + 8000664c: 000a3203 ld x4,0(x20) + 80006650: 01220c63 beq x4,x18,80006668 + 80006654: 2ad042ef jal x5,8000b100 + 80006658: 80006648 .word 0x80006648 + 8000665c: 00000000 .word 0x00000000 + 80006660: 8001d476 .word 0x8001d476 + 80006664: 00000000 .word 0x00000000 + 80006668: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x6a4e06cb939f0ee7 + 8000666c: 00013983 ld x19,0(x2) + 80006670: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x6765b134f3f3f99c + 80006674: 00013983 ld x19,0(x2) + 80006678: 00810113 addi x2,x2,8 + +000000008000667c : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b19: + aes64ds x19, x19, x19 # perform operation + 8000667c: 3b3989b3 aes64ds x19,x19,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b19, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b19_str) + 80006680: 000a3203 ld x4,0(x20) + 80006684: 01320c63 beq x4,x19,8000669c + 80006688: 279042ef jal x5,8000b100 + 8000668c: 8000667c .word 0x8000667c + 80006690: 00000000 .word 0x00000000 + 80006694: 8001d4b5 .word 0x8001d4b5 + 80006698: 00000000 .word 0x00000000 + 8000669c: 008a0a13 addi x20,x20,8 + + mv x17, x20 # switch signature pointer register to avoid conflict with test + 800066a0: 000a0893 addi x17,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x9479ca2d89de99d8 + 800066a4: 00013a03 ld x20,0(x2) + 800066a8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x56185078b5ce1e61 + 800066ac: 00013a03 ld x20,0(x2) + 800066b0: 00810113 addi x2,x2,8 + +00000000800066b4 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b20: + aes64ds x20, x20, x20 # perform operation + 800066b4: 3b4a0a33 aes64ds x20,x20,x20 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b20, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b20_str) + 800066b8: 0008b203 ld x4,0(x17) + 800066bc: 01420c63 beq x4,x20,800066d4 + 800066c0: 241042ef jal x5,8000b100 + 800066c4: 800066b4 .word 0x800066b4 + 800066c8: 00000000 .word 0x00000000 + 800066cc: 8001d4f4 .word 0x8001d4f4 + 800066d0: 00000000 .word 0x00000000 + 800066d4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x8ee1da8e315d38de + 800066d8: 00013a83 ld x21,0(x2) + 800066dc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x16a3e2cd214dad3c + 800066e0: 00013a83 ld x21,0(x2) + 800066e4: 00810113 addi x2,x2,8 + +00000000800066e8 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b21: + aes64ds x21, x21, x21 # perform operation + 800066e8: 3b5a8ab3 aes64ds x21,x21,x21 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b21, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b21_str) + 800066ec: 0008b203 ld x4,0(x17) + 800066f0: 01520c63 beq x4,x21,80006708 + 800066f4: 20d042ef jal x5,8000b100 + 800066f8: 800066e8 .word 0x800066e8 + 800066fc: 00000000 .word 0x00000000 + 80006700: 8001d533 .word 0x8001d533 + 80006704: 00000000 .word 0x00000000 + 80006708: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0dec58b4e0ef799a + 8000670c: 00013b03 ld x22,0(x2) + 80006710: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x3b7874499b955c32 + 80006714: 00013b03 ld x22,0(x2) + 80006718: 00810113 addi x2,x2,8 + +000000008000671c : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b22: + aes64ds x22, x22, x22 # perform operation + 8000671c: 3b6b0b33 aes64ds x22,x22,x22 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b22, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b22_str) + 80006720: 0008b203 ld x4,0(x17) + 80006724: 01620c63 beq x4,x22,8000673c + 80006728: 1d9042ef jal x5,8000b100 + 8000672c: 8000671c .word 0x8000671c + 80006730: 00000000 .word 0x00000000 + 80006734: 8001d572 .word 0x8001d572 + 80006738: 00000000 .word 0x00000000 + 8000673c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x6d29146eed324fd0 + 80006740: 00013b83 ld x23,0(x2) + 80006744: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0c2f459e86e8f942 + 80006748: 00013b83 ld x23,0(x2) + 8000674c: 00810113 addi x2,x2,8 + +0000000080006750 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b23: + aes64ds x23, x23, x23 # perform operation + 80006750: 3b7b8bb3 aes64ds x23,x23,x23 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b23, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b23_str) + 80006754: 0008b203 ld x4,0(x17) + 80006758: 01720c63 beq x4,x23,80006770 + 8000675c: 1a5042ef jal x5,8000b100 + 80006760: 80006750 .word 0x80006750 + 80006764: 00000000 .word 0x00000000 + 80006768: 8001d5b1 .word 0x8001d5b1 + 8000676c: 00000000 .word 0x00000000 + 80006770: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x6ae4fb3d996151c4 + 80006774: 00013c03 ld x24,0(x2) + 80006778: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x7d062c61f110efaf + 8000677c: 00013c03 ld x24,0(x2) + 80006780: 00810113 addi x2,x2,8 + +0000000080006784 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b24: + aes64ds x24, x24, x24 # perform operation + 80006784: 3b8c0c33 aes64ds x24,x24,x24 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b24, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b24_str) + 80006788: 0008b203 ld x4,0(x17) + 8000678c: 01820c63 beq x4,x24,800067a4 + 80006790: 171042ef jal x5,8000b100 + 80006794: 80006784 .word 0x80006784 + 80006798: 00000000 .word 0x00000000 + 8000679c: 8001d5f0 .word 0x8001d5f0 + 800067a0: 00000000 .word 0x00000000 + 800067a4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x51e9b56cfa7a46b8 + 800067a8: 00013c83 ld x25,0(x2) + 800067ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x05417002fc07a730 + 800067b0: 00013c83 ld x25,0(x2) + 800067b4: 00810113 addi x2,x2,8 + +00000000800067b8 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b25: + aes64ds x25, x25, x25 # perform operation + 800067b8: 3b9c8cb3 aes64ds x25,x25,x25 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b25, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b25_str) + 800067bc: 0008b203 ld x4,0(x17) + 800067c0: 01920c63 beq x4,x25,800067d8 + 800067c4: 13d042ef jal x5,8000b100 + 800067c8: 800067b8 .word 0x800067b8 + 800067cc: 00000000 .word 0x00000000 + 800067d0: 8001d62f .word 0x8001d62f + 800067d4: 00000000 .word 0x00000000 + 800067d8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x9b4c8cedd769ca26 + 800067dc: 00013d03 ld x26,0(x2) + 800067e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x4db548dc973dfda7 + 800067e4: 00013d03 ld x26,0(x2) + 800067e8: 00810113 addi x2,x2,8 + +00000000800067ec : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b26: + aes64ds x26, x26, x26 # perform operation + 800067ec: 3bad0d33 aes64ds x26,x26,x26 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b26, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b26_str) + 800067f0: 0008b203 ld x4,0(x17) + 800067f4: 01a20c63 beq x4,x26,8000680c + 800067f8: 109042ef jal x5,8000b100 + 800067fc: 800067ec .word 0x800067ec + 80006800: 00000000 .word 0x00000000 + 80006804: 8001d66e .word 0x8001d66e + 80006808: 00000000 .word 0x00000000 + 8000680c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x78e2478aeb2aabbd + 80006810: 00013d83 ld x27,0(x2) + 80006814: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x295e508ee2ca5d5a + 80006818: 00013d83 ld x27,0(x2) + 8000681c: 00810113 addi x2,x2,8 + +0000000080006820 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b27: + aes64ds x27, x27, x27 # perform operation + 80006820: 3bbd8db3 aes64ds x27,x27,x27 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b27, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b27_str) + 80006824: 0008b203 ld x4,0(x17) + 80006828: 01b20c63 beq x4,x27,80006840 + 8000682c: 0d5042ef jal x5,8000b100 + 80006830: 80006820 .word 0x80006820 + 80006834: 00000000 .word 0x00000000 + 80006838: 8001d6ad .word 0x8001d6ad + 8000683c: 00000000 .word 0x00000000 + 80006840: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xac599441b03b7fca + 80006844: 00013e03 ld x28,0(x2) + 80006848: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x43adb5540d06408f + 8000684c: 00013e03 ld x28,0(x2) + 80006850: 00810113 addi x2,x2,8 + +0000000080006854 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b28: + aes64ds x28, x28, x28 # perform operation + 80006854: 3bce0e33 aes64ds x28,x28,x28 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b28, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b28_str) + 80006858: 0008b203 ld x4,0(x17) + 8000685c: 01c20c63 beq x4,x28,80006874 + 80006860: 0a1042ef jal x5,8000b100 + 80006864: 80006854 .word 0x80006854 + 80006868: 00000000 .word 0x00000000 + 8000686c: 8001d6ec .word 0x8001d6ec + 80006870: 00000000 .word 0x00000000 + 80006874: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x9a700507e276bd4c + 80006878: 00013e83 ld x29,0(x2) + 8000687c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x318fbc5bb0c7f2ba + 80006880: 00013e83 ld x29,0(x2) + 80006884: 00810113 addi x2,x2,8 + +0000000080006888 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b29: + aes64ds x29, x29, x29 # perform operation + 80006888: 3bde8eb3 aes64ds x29,x29,x29 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b29, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b29_str) + 8000688c: 0008b203 ld x4,0(x17) + 80006890: 01d20c63 beq x4,x29,800068a8 + 80006894: 06d042ef jal x5,8000b100 + 80006898: 80006888 .word 0x80006888 + 8000689c: 00000000 .word 0x00000000 + 800068a0: 8001d72b .word 0x8001d72b + 800068a4: 00000000 .word 0x00000000 + 800068a8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x44fb35cf548b704b + 800068ac: 00013f03 ld x30,0(x2) + 800068b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x9d5c0f98a886fcdf + 800068b4: 00013f03 ld x30,0(x2) + 800068b8: 00810113 addi x2,x2,8 + +00000000800068bc : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b30: + aes64ds x30, x30, x30 # perform operation + 800068bc: 3bef0f33 aes64ds x30,x30,x30 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b30, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b30_str) + 800068c0: 0008b203 ld x4,0(x17) + 800068c4: 01e20c63 beq x4,x30,800068dc + 800068c8: 039042ef jal x5,8000b100 + 800068cc: 800068bc .word 0x800068bc + 800068d0: 00000000 .word 0x00000000 + 800068d4: 8001d76a .word 0x8001d76a + 800068d8: 00000000 .word 0x00000000 + 800068dc: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xe9f3dc2baa2d9dc1 + 800068e0: 00013f83 ld x31,0(x2) + 800068e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x3bff12113a4e2738 + 800068e8: 00013f83 ld x31,0(x2) + 800068ec: 00810113 addi x2,x2,8 + +00000000800068f0 : +Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b31: + aes64ds x31, x31, x31 # perform operation + 800068f0: 3bff8fb3 aes64ds x31,x31,x31 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b31, Zknd_aes64ds_cg_cmp_rd_rs1_rs2_b31_str) + 800068f4: 0008b203 ld x4,0(x17) + 800068f8: 01f20c63 beq x4,x31,80006910 + 800068fc: 005042ef jal x5,8000b100 + 80006900: 800068f0 .word 0x800068f0 + 80006904: 00000000 .word 0x00000000 + 80006908: 8001d7a9 .word 0x8001d7a9 + 8000690c: 00000000 .word 0x00000000 + 80006910: 00888893 addi x17,x17,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x0000000000000000 + 80006914: 00013083 ld x1,0(x2) + 80006918: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x0000000000000000 + 8000691c: 00013183 ld x3,0(x2) + 80006920: 00810113 addi x2,x2,8 + +0000000080006924 : +Zknd_aes64ds_cg_cp_sbox_b0: + aes64ds x20, x1, x3 # perform operation + 80006924: 3a308a33 aes64ds x20,x1,x3 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b0, Zknd_aes64ds_cg_cp_sbox_b0_str) + 80006928: 0008b203 ld x4,0(x17) + 8000692c: 01420c63 beq x4,x20,80006944 + 80006930: 7d0042ef jal x5,8000b100 + 80006934: 80006924 .word 0x80006924 + 80006938: 00000000 .word 0x00000000 + 8000693c: 8001d7e8 .word 0x8001d7e8 + 80006940: 00000000 .word 0x00000000 + 80006944: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x0101010101010101 + 80006948: 00013703 ld x14,0(x2) + 8000694c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x0101010101010101 + 80006950: 00013f03 ld x30,0(x2) + 80006954: 00810113 addi x2,x2,8 + +0000000080006958 : +Zknd_aes64ds_cg_cp_sbox_b1: + aes64ds x8, x14, x30 # perform operation + 80006958: 3be70433 aes64ds x8,x14,x30 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b1, Zknd_aes64ds_cg_cp_sbox_b1_str) + 8000695c: 0008b203 ld x4,0(x17) + 80006960: 00820c63 beq x4,x8,80006978 + 80006964: 79c042ef jal x5,8000b100 + 80006968: 80006958 .word 0x80006958 + 8000696c: 00000000 .word 0x00000000 + 80006970: 8001d81f .word 0x8001d81f + 80006974: 00000000 .word 0x00000000 + 80006978: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0202020202020202 + 8000697c: 00013783 ld x15,0(x2) + 80006980: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x0202020202020202 + 80006984: 00013e83 ld x29,0(x2) + 80006988: 00810113 addi x2,x2,8 + +000000008000698c : +Zknd_aes64ds_cg_cp_sbox_b2: + aes64ds x14, x15, x29 # perform operation + 8000698c: 3bd78733 aes64ds x14,x15,x29 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b2, Zknd_aes64ds_cg_cp_sbox_b2_str) + 80006990: 0008b203 ld x4,0(x17) + 80006994: 00e20c63 beq x4,x14,800069ac + 80006998: 768042ef jal x5,8000b100 + 8000699c: 8000698c .word 0x8000698c + 800069a0: 00000000 .word 0x00000000 + 800069a4: 8001d856 .word 0x8001d856 + 800069a8: 00000000 .word 0x00000000 + 800069ac: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0303030303030303 + 800069b0: 00013583 ld x11,0(x2) + 800069b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x0303030303030303 + 800069b8: 00013903 ld x18,0(x2) + 800069bc: 00810113 addi x2,x2,8 + +00000000800069c0 : +Zknd_aes64ds_cg_cp_sbox_b3: + aes64ds x29, x11, x18 # perform operation + 800069c0: 3b258eb3 aes64ds x29,x11,x18 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b3, Zknd_aes64ds_cg_cp_sbox_b3_str) + 800069c4: 0008b203 ld x4,0(x17) + 800069c8: 01d20c63 beq x4,x29,800069e0 + 800069cc: 734042ef jal x5,8000b100 + 800069d0: 800069c0 .word 0x800069c0 + 800069d4: 00000000 .word 0x00000000 + 800069d8: 8001d88d .word 0x8001d88d + 800069dc: 00000000 .word 0x00000000 + 800069e0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x0404040404040404 + 800069e4: 00013383 ld x7,0(x2) + 800069e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0404040404040404 + 800069ec: 00013b83 ld x23,0(x2) + 800069f0: 00810113 addi x2,x2,8 + +00000000800069f4 : +Zknd_aes64ds_cg_cp_sbox_b4: + aes64ds x22, x7, x23 # perform operation + 800069f4: 3b738b33 aes64ds x22,x7,x23 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b4, Zknd_aes64ds_cg_cp_sbox_b4_str) + 800069f8: 0008b203 ld x4,0(x17) + 800069fc: 01620c63 beq x4,x22,80006a14 + 80006a00: 700042ef jal x5,8000b100 + 80006a04: 800069f4 .word 0x800069f4 + 80006a08: 00000000 .word 0x00000000 + 80006a0c: 8001d8c4 .word 0x8001d8c4 + 80006a10: 00000000 .word 0x00000000 + 80006a14: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x0505050505050505 + 80006a18: 00013d83 ld x27,0(x2) + 80006a1c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x0505050505050505 + 80006a20: 00013e83 ld x29,0(x2) + 80006a24: 00810113 addi x2,x2,8 + +0000000080006a28 : +Zknd_aes64ds_cg_cp_sbox_b5: + aes64ds x13, x27, x29 # perform operation + 80006a28: 3bdd86b3 aes64ds x13,x27,x29 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b5, Zknd_aes64ds_cg_cp_sbox_b5_str) + 80006a2c: 0008b203 ld x4,0(x17) + 80006a30: 00d20c63 beq x4,x13,80006a48 + 80006a34: 6cc042ef jal x5,8000b100 + 80006a38: 80006a28 .word 0x80006a28 + 80006a3c: 00000000 .word 0x00000000 + 80006a40: 8001d8fb .word 0x8001d8fb + 80006a44: 00000000 .word 0x00000000 + 80006a48: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x0606060606060606 + 80006a4c: 00013903 ld x18,0(x2) + 80006a50: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x0606060606060606 + 80006a54: 00013403 ld x8,0(x2) + 80006a58: 00810113 addi x2,x2,8 + +0000000080006a5c : +Zknd_aes64ds_cg_cp_sbox_b6: + aes64ds x3, x18, x8 # perform operation + 80006a5c: 3a8901b3 aes64ds x3,x18,x8 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b6, Zknd_aes64ds_cg_cp_sbox_b6_str) + 80006a60: 0008b203 ld x4,0(x17) + 80006a64: 00320c63 beq x4,x3,80006a7c + 80006a68: 698042ef jal x5,8000b100 + 80006a6c: 80006a5c .word 0x80006a5c + 80006a70: 00000000 .word 0x00000000 + 80006a74: 8001d932 .word 0x8001d932 + 80006a78: 00000000 .word 0x00000000 + 80006a7c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x0707070707070707 + 80006a80: 00013a83 ld x21,0(x2) + 80006a84: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x0707070707070707 + 80006a88: 00013983 ld x19,0(x2) + 80006a8c: 00810113 addi x2,x2,8 + +0000000080006a90 : +Zknd_aes64ds_cg_cp_sbox_b7: + aes64ds x11, x21, x19 # perform operation + 80006a90: 3b3a85b3 aes64ds x11,x21,x19 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b7, Zknd_aes64ds_cg_cp_sbox_b7_str) + 80006a94: 0008b203 ld x4,0(x17) + 80006a98: 00b20c63 beq x4,x11,80006ab0 + 80006a9c: 664042ef jal x5,8000b100 + 80006aa0: 80006a90 .word 0x80006a90 + 80006aa4: 00000000 .word 0x00000000 + 80006aa8: 8001d969 .word 0x8001d969 + 80006aac: 00000000 .word 0x00000000 + 80006ab0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0808080808080808 + 80006ab4: 00013583 ld x11,0(x2) + 80006ab8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x0808080808080808 + 80006abc: 00013803 ld x16,0(x2) + 80006ac0: 00810113 addi x2,x2,8 + +0000000080006ac4 : +Zknd_aes64ds_cg_cp_sbox_b8: + aes64ds x24, x11, x16 # perform operation + 80006ac4: 3b058c33 aes64ds x24,x11,x16 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b8, Zknd_aes64ds_cg_cp_sbox_b8_str) + 80006ac8: 0008b203 ld x4,0(x17) + 80006acc: 01820c63 beq x4,x24,80006ae4 + 80006ad0: 630042ef jal x5,8000b100 + 80006ad4: 80006ac4 .word 0x80006ac4 + 80006ad8: 00000000 .word 0x00000000 + 80006adc: 8001d9a0 .word 0x8001d9a0 + 80006ae0: 00000000 .word 0x00000000 + 80006ae4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x0909090909090909 + 80006ae8: 00013383 ld x7,0(x2) + 80006aec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x0909090909090909 + 80006af0: 00013b83 ld x23,0(x2) + 80006af4: 00810113 addi x2,x2,8 + +0000000080006af8 : +Zknd_aes64ds_cg_cp_sbox_b9: + aes64ds x30, x7, x23 # perform operation + 80006af8: 3b738f33 aes64ds x30,x7,x23 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b9, Zknd_aes64ds_cg_cp_sbox_b9_str) + 80006afc: 0008b203 ld x4,0(x17) + 80006b00: 01e20c63 beq x4,x30,80006b18 + 80006b04: 5fc042ef jal x5,8000b100 + 80006b08: 80006af8 .word 0x80006af8 + 80006b0c: 00000000 .word 0x00000000 + 80006b10: 8001d9d7 .word 0x8001d9d7 + 80006b14: 00000000 .word 0x00000000 + 80006b18: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0a0a0a0a0a0a0a0a + 80006b1c: 00013b03 ld x22,0(x2) + 80006b20: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x0a0a0a0a0a0a0a0a + 80006b24: 00013483 ld x9,0(x2) + 80006b28: 00810113 addi x2,x2,8 + +0000000080006b2c : +Zknd_aes64ds_cg_cp_sbox_b10: + aes64ds x19, x22, x9 # perform operation + 80006b2c: 3a9b09b3 aes64ds x19,x22,x9 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b10, Zknd_aes64ds_cg_cp_sbox_b10_str) + 80006b30: 0008b203 ld x4,0(x17) + 80006b34: 01320c63 beq x4,x19,80006b4c + 80006b38: 5c8042ef jal x5,8000b100 + 80006b3c: 80006b2c .word 0x80006b2c + 80006b40: 00000000 .word 0x00000000 + 80006b44: 8001da0e .word 0x8001da0e + 80006b48: 00000000 .word 0x00000000 + 80006b4c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x0b0b0b0b0b0b0b0b + 80006b50: 00013e03 ld x28,0(x2) + 80006b54: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x0b0b0b0b0b0b0b0b + 80006b58: 00013c03 ld x24,0(x2) + 80006b5c: 00810113 addi x2,x2,8 + +0000000080006b60 : +Zknd_aes64ds_cg_cp_sbox_b11: + aes64ds x26, x28, x24 # perform operation + 80006b60: 3b8e0d33 aes64ds x26,x28,x24 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b11, Zknd_aes64ds_cg_cp_sbox_b11_str) + 80006b64: 0008b203 ld x4,0(x17) + 80006b68: 01a20c63 beq x4,x26,80006b80 + 80006b6c: 594042ef jal x5,8000b100 + 80006b70: 80006b60 .word 0x80006b60 + 80006b74: 00000000 .word 0x00000000 + 80006b78: 8001da46 .word 0x8001da46 + 80006b7c: 00000000 .word 0x00000000 + 80006b80: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x0c0c0c0c0c0c0c0c + 80006b84: 00013083 ld x1,0(x2) + 80006b88: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x0c0c0c0c0c0c0c0c + 80006b8c: 00013a83 ld x21,0(x2) + 80006b90: 00810113 addi x2,x2,8 + +0000000080006b94 : +Zknd_aes64ds_cg_cp_sbox_b12: + aes64ds x22, x1, x21 # perform operation + 80006b94: 3b508b33 aes64ds x22,x1,x21 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b12, Zknd_aes64ds_cg_cp_sbox_b12_str) + 80006b98: 0008b203 ld x4,0(x17) + 80006b9c: 01620c63 beq x4,x22,80006bb4 + 80006ba0: 560042ef jal x5,8000b100 + 80006ba4: 80006b94 .word 0x80006b94 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 8001da7e .word 0x8001da7e + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x0d0d0d0d0d0d0d0d + 80006bb8: 00013f03 ld x30,0(x2) + 80006bbc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x0d0d0d0d0d0d0d0d + 80006bc0: 00013183 ld x3,0(x2) + 80006bc4: 00810113 addi x2,x2,8 + +0000000080006bc8 : +Zknd_aes64ds_cg_cp_sbox_b13: + aes64ds x6, x30, x3 # perform operation + 80006bc8: 3a3f0333 aes64ds x6,x30,x3 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b13, Zknd_aes64ds_cg_cp_sbox_b13_str) + 80006bcc: 0008b203 ld x4,0(x17) + 80006bd0: 00620c63 beq x4,x6,80006be8 + 80006bd4: 52c042ef jal x5,8000b100 + 80006bd8: 80006bc8 .word 0x80006bc8 + 80006bdc: 00000000 .word 0x00000000 + 80006be0: 8001dab6 .word 0x8001dab6 + 80006be4: 00000000 .word 0x00000000 + 80006be8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x0e0e0e0e0e0e0e0e + 80006bec: 00013383 ld x7,0(x2) + 80006bf0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x0e0e0e0e0e0e0e0e + 80006bf4: 00013b03 ld x22,0(x2) + 80006bf8: 00810113 addi x2,x2,8 + +0000000080006bfc : +Zknd_aes64ds_cg_cp_sbox_b14: + aes64ds x27, x7, x22 # perform operation + 80006bfc: 3b638db3 aes64ds x27,x7,x22 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b14, Zknd_aes64ds_cg_cp_sbox_b14_str) + 80006c00: 0008b203 ld x4,0(x17) + 80006c04: 01b20c63 beq x4,x27,80006c1c + 80006c08: 4f8042ef jal x5,8000b100 + 80006c0c: 80006bfc .word 0x80006bfc + 80006c10: 00000000 .word 0x00000000 + 80006c14: 8001daee .word 0x8001daee + 80006c18: 00000000 .word 0x00000000 + 80006c1c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x0f0f0f0f0f0f0f0f + 80006c20: 00013603 ld x12,0(x2) + 80006c24: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x0f0f0f0f0f0f0f0f + 80006c28: 00013083 ld x1,0(x2) + 80006c2c: 00810113 addi x2,x2,8 + +0000000080006c30 : +Zknd_aes64ds_cg_cp_sbox_b15: + aes64ds x30, x12, x1 # perform operation + 80006c30: 3a160f33 aes64ds x30,x12,x1 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b15, Zknd_aes64ds_cg_cp_sbox_b15_str) + 80006c34: 0008b203 ld x4,0(x17) + 80006c38: 01e20c63 beq x4,x30,80006c50 + 80006c3c: 4c4042ef jal x5,8000b100 + 80006c40: 80006c30 .word 0x80006c30 + 80006c44: 00000000 .word 0x00000000 + 80006c48: 8001db26 .word 0x8001db26 + 80006c4c: 00000000 .word 0x00000000 + 80006c50: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x1010101010101010 + 80006c54: 00013583 ld x11,0(x2) + 80006c58: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x1010101010101010 + 80006c5c: 00013783 ld x15,0(x2) + 80006c60: 00810113 addi x2,x2,8 + +0000000080006c64 : +Zknd_aes64ds_cg_cp_sbox_b16: + aes64ds x29, x11, x15 # perform operation + 80006c64: 3af58eb3 aes64ds x29,x11,x15 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b16, Zknd_aes64ds_cg_cp_sbox_b16_str) + 80006c68: 0008b203 ld x4,0(x17) + 80006c6c: 01d20c63 beq x4,x29,80006c84 + 80006c70: 490042ef jal x5,8000b100 + 80006c74: 80006c64 .word 0x80006c64 + 80006c78: 00000000 .word 0x00000000 + 80006c7c: 8001db5e .word 0x8001db5e + 80006c80: 00000000 .word 0x00000000 + 80006c84: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x1111111111111111 + 80006c88: 00013e83 ld x29,0(x2) + 80006c8c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x1111111111111111 + 80006c90: 00013d03 ld x26,0(x2) + 80006c94: 00810113 addi x2,x2,8 + +0000000080006c98 : +Zknd_aes64ds_cg_cp_sbox_b17: + aes64ds x14, x29, x26 # perform operation + 80006c98: 3bae8733 aes64ds x14,x29,x26 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b17, Zknd_aes64ds_cg_cp_sbox_b17_str) + 80006c9c: 0008b203 ld x4,0(x17) + 80006ca0: 00e20c63 beq x4,x14,80006cb8 + 80006ca4: 45c042ef jal x5,8000b100 + 80006ca8: 80006c98 .word 0x80006c98 + 80006cac: 00000000 .word 0x00000000 + 80006cb0: 8001db96 .word 0x8001db96 + 80006cb4: 00000000 .word 0x00000000 + 80006cb8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x1212121212121212 + 80006cbc: 00013e03 ld x28,0(x2) + 80006cc0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x1212121212121212 + 80006cc4: 00013183 ld x3,0(x2) + 80006cc8: 00810113 addi x2,x2,8 + +0000000080006ccc : +Zknd_aes64ds_cg_cp_sbox_b18: + aes64ds x26, x28, x3 # perform operation + 80006ccc: 3a3e0d33 aes64ds x26,x28,x3 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b18, Zknd_aes64ds_cg_cp_sbox_b18_str) + 80006cd0: 0008b203 ld x4,0(x17) + 80006cd4: 01a20c63 beq x4,x26,80006cec + 80006cd8: 428042ef jal x5,8000b100 + 80006cdc: 80006ccc .word 0x80006ccc + 80006ce0: 00000000 .word 0x00000000 + 80006ce4: 8001dbce .word 0x8001dbce + 80006ce8: 00000000 .word 0x00000000 + 80006cec: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x1313131313131313 + 80006cf0: 00013803 ld x16,0(x2) + 80006cf4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x1313131313131313 + 80006cf8: 00013603 ld x12,0(x2) + 80006cfc: 00810113 addi x2,x2,8 + +0000000080006d00 : +Zknd_aes64ds_cg_cp_sbox_b19: + aes64ds x1, x16, x12 # perform operation + 80006d00: 3ac800b3 aes64ds x1,x16,x12 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b19, Zknd_aes64ds_cg_cp_sbox_b19_str) + 80006d04: 0008b203 ld x4,0(x17) + 80006d08: 00120c63 beq x4,x1,80006d20 + 80006d0c: 3f4042ef jal x5,8000b100 + 80006d10: 80006d00 .word 0x80006d00 + 80006d14: 00000000 .word 0x00000000 + 80006d18: 8001dc06 .word 0x8001dc06 + 80006d1c: 00000000 .word 0x00000000 + 80006d20: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x1414141414141414 + 80006d24: 00013083 ld x1,0(x2) + 80006d28: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x1414141414141414 + 80006d2c: 00013e83 ld x29,0(x2) + 80006d30: 00810113 addi x2,x2,8 + +0000000080006d34 : +Zknd_aes64ds_cg_cp_sbox_b20: + aes64ds x12, x1, x29 # perform operation + 80006d34: 3bd08633 aes64ds x12,x1,x29 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b20, Zknd_aes64ds_cg_cp_sbox_b20_str) + 80006d38: 0008b203 ld x4,0(x17) + 80006d3c: 00c20c63 beq x4,x12,80006d54 + 80006d40: 3c0042ef jal x5,8000b100 + 80006d44: 80006d34 .word 0x80006d34 + 80006d48: 00000000 .word 0x00000000 + 80006d4c: 8001dc3e .word 0x8001dc3e + 80006d50: 00000000 .word 0x00000000 + 80006d54: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x1515151515151515 + 80006d58: 00013303 ld x6,0(x2) + 80006d5c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x1515151515151515 + 80006d60: 00013403 ld x8,0(x2) + 80006d64: 00810113 addi x2,x2,8 + +0000000080006d68 : +Zknd_aes64ds_cg_cp_sbox_b21: + aes64ds x9, x6, x8 # perform operation + 80006d68: 3a8304b3 aes64ds x9,x6,x8 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b21, Zknd_aes64ds_cg_cp_sbox_b21_str) + 80006d6c: 0008b203 ld x4,0(x17) + 80006d70: 00920c63 beq x4,x9,80006d88 + 80006d74: 38c042ef jal x5,8000b100 + 80006d78: 80006d68 .word 0x80006d68 + 80006d7c: 00000000 .word 0x00000000 + 80006d80: 8001dc76 .word 0x8001dc76 + 80006d84: 00000000 .word 0x00000000 + 80006d88: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x1616161616161616 + 80006d8c: 00013403 ld x8,0(x2) + 80006d90: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x1616161616161616 + 80006d94: 00013e03 ld x28,0(x2) + 80006d98: 00810113 addi x2,x2,8 + +0000000080006d9c : +Zknd_aes64ds_cg_cp_sbox_b22: + aes64ds x30, x8, x28 # perform operation + 80006d9c: 3bc40f33 aes64ds x30,x8,x28 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b22, Zknd_aes64ds_cg_cp_sbox_b22_str) + 80006da0: 0008b203 ld x4,0(x17) + 80006da4: 01e20c63 beq x4,x30,80006dbc + 80006da8: 358042ef jal x5,8000b100 + 80006dac: 80006d9c .word 0x80006d9c + 80006db0: 00000000 .word 0x00000000 + 80006db4: 8001dcae .word 0x8001dcae + 80006db8: 00000000 .word 0x00000000 + 80006dbc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x1717171717171717 + 80006dc0: 00013503 ld x10,0(x2) + 80006dc4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x1717171717171717 + 80006dc8: 00013483 ld x9,0(x2) + 80006dcc: 00810113 addi x2,x2,8 + +0000000080006dd0 : +Zknd_aes64ds_cg_cp_sbox_b23: + aes64ds x19, x10, x9 # perform operation + 80006dd0: 3a9509b3 aes64ds x19,x10,x9 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b23, Zknd_aes64ds_cg_cp_sbox_b23_str) + 80006dd4: 0008b203 ld x4,0(x17) + 80006dd8: 01320c63 beq x4,x19,80006df0 + 80006ddc: 324042ef jal x5,8000b100 + 80006de0: 80006dd0 .word 0x80006dd0 + 80006de4: 00000000 .word 0x00000000 + 80006de8: 8001dce6 .word 0x8001dce6 + 80006dec: 00000000 .word 0x00000000 + 80006df0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x1818181818181818 + 80006df4: 00013383 ld x7,0(x2) + 80006df8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x1818181818181818 + 80006dfc: 00013083 ld x1,0(x2) + 80006e00: 00810113 addi x2,x2,8 + +0000000080006e04 : +Zknd_aes64ds_cg_cp_sbox_b24: + aes64ds x14, x7, x1 # perform operation + 80006e04: 3a138733 aes64ds x14,x7,x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b24, Zknd_aes64ds_cg_cp_sbox_b24_str) + 80006e08: 0008b203 ld x4,0(x17) + 80006e0c: 00e20c63 beq x4,x14,80006e24 + 80006e10: 2f0042ef jal x5,8000b100 + 80006e14: 80006e04 .word 0x80006e04 + 80006e18: 00000000 .word 0x00000000 + 80006e1c: 8001dd1e .word 0x8001dd1e + 80006e20: 00000000 .word 0x00000000 + 80006e24: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x1919191919191919 + 80006e28: 00013c03 ld x24,0(x2) + 80006e2c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x1919191919191919 + 80006e30: 00013b83 ld x23,0(x2) + 80006e34: 00810113 addi x2,x2,8 + +0000000080006e38 : +Zknd_aes64ds_cg_cp_sbox_b25: + aes64ds x29, x24, x23 # perform operation + 80006e38: 3b7c0eb3 aes64ds x29,x24,x23 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b25, Zknd_aes64ds_cg_cp_sbox_b25_str) + 80006e3c: 0008b203 ld x4,0(x17) + 80006e40: 01d20c63 beq x4,x29,80006e58 + 80006e44: 2bc042ef jal x5,8000b100 + 80006e48: 80006e38 .word 0x80006e38 + 80006e4c: 00000000 .word 0x00000000 + 80006e50: 8001dd56 .word 0x8001dd56 + 80006e54: 00000000 .word 0x00000000 + 80006e58: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x1a1a1a1a1a1a1a1a + 80006e5c: 00013a03 ld x20,0(x2) + 80006e60: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x1a1a1a1a1a1a1a1a + 80006e64: 00013c03 ld x24,0(x2) + 80006e68: 00810113 addi x2,x2,8 + +0000000080006e6c : +Zknd_aes64ds_cg_cp_sbox_b26: + aes64ds x10, x20, x24 # perform operation + 80006e6c: 3b8a0533 aes64ds x10,x20,x24 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b26, Zknd_aes64ds_cg_cp_sbox_b26_str) + 80006e70: 0008b203 ld x4,0(x17) + 80006e74: 00a20c63 beq x4,x10,80006e8c + 80006e78: 288042ef jal x5,8000b100 + 80006e7c: 80006e6c .word 0x80006e6c + 80006e80: 00000000 .word 0x00000000 + 80006e84: 8001dd8e .word 0x8001dd8e + 80006e88: 00000000 .word 0x00000000 + 80006e8c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x1b1b1b1b1b1b1b1b + 80006e90: 00013d83 ld x27,0(x2) + 80006e94: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x1b1b1b1b1b1b1b1b + 80006e98: 00013a03 ld x20,0(x2) + 80006e9c: 00810113 addi x2,x2,8 + +0000000080006ea0 : +Zknd_aes64ds_cg_cp_sbox_b27: + aes64ds x9, x27, x20 # perform operation + 80006ea0: 3b4d84b3 aes64ds x9,x27,x20 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b27, Zknd_aes64ds_cg_cp_sbox_b27_str) + 80006ea4: 0008b203 ld x4,0(x17) + 80006ea8: 00920c63 beq x4,x9,80006ec0 + 80006eac: 254042ef jal x5,8000b100 + 80006eb0: 80006ea0 .word 0x80006ea0 + 80006eb4: 00000000 .word 0x00000000 + 80006eb8: 8001ddc6 .word 0x8001ddc6 + 80006ebc: 00000000 .word 0x00000000 + 80006ec0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x1c1c1c1c1c1c1c1c + 80006ec4: 00013583 ld x11,0(x2) + 80006ec8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x1c1c1c1c1c1c1c1c + 80006ecc: 00013683 ld x13,0(x2) + 80006ed0: 00810113 addi x2,x2,8 + +0000000080006ed4 : +Zknd_aes64ds_cg_cp_sbox_b28: + aes64ds x20, x11, x13 # perform operation + 80006ed4: 3ad58a33 aes64ds x20,x11,x13 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b28, Zknd_aes64ds_cg_cp_sbox_b28_str) + 80006ed8: 0008b203 ld x4,0(x17) + 80006edc: 01420c63 beq x4,x20,80006ef4 + 80006ee0: 220042ef jal x5,8000b100 + 80006ee4: 80006ed4 .word 0x80006ed4 + 80006ee8: 00000000 .word 0x00000000 + 80006eec: 8001ddfe .word 0x8001ddfe + 80006ef0: 00000000 .word 0x00000000 + 80006ef4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x1d1d1d1d1d1d1d1d + 80006ef8: 00013903 ld x18,0(x2) + 80006efc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x1d1d1d1d1d1d1d1d + 80006f00: 00013483 ld x9,0(x2) + 80006f04: 00810113 addi x2,x2,8 + +0000000080006f08 : +Zknd_aes64ds_cg_cp_sbox_b29: + aes64ds x10, x18, x9 # perform operation + 80006f08: 3a990533 aes64ds x10,x18,x9 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b29, Zknd_aes64ds_cg_cp_sbox_b29_str) + 80006f0c: 0008b203 ld x4,0(x17) + 80006f10: 00a20c63 beq x4,x10,80006f28 + 80006f14: 1ec042ef jal x5,8000b100 + 80006f18: 80006f08 .word 0x80006f08 + 80006f1c: 00000000 .word 0x00000000 + 80006f20: 8001de36 .word 0x8001de36 + 80006f24: 00000000 .word 0x00000000 + 80006f28: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x1e1e1e1e1e1e1e1e + 80006f2c: 00013b03 ld x22,0(x2) + 80006f30: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x1e1e1e1e1e1e1e1e + 80006f34: 00013083 ld x1,0(x2) + 80006f38: 00810113 addi x2,x2,8 + +0000000080006f3c : +Zknd_aes64ds_cg_cp_sbox_b30: + aes64ds x11, x22, x1 # perform operation + 80006f3c: 3a1b05b3 aes64ds x11,x22,x1 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b30, Zknd_aes64ds_cg_cp_sbox_b30_str) + 80006f40: 0008b203 ld x4,0(x17) + 80006f44: 00b20c63 beq x4,x11,80006f5c + 80006f48: 1b8042ef jal x5,8000b100 + 80006f4c: 80006f3c .word 0x80006f3c + 80006f50: 00000000 .word 0x00000000 + 80006f54: 8001de6e .word 0x8001de6e + 80006f58: 00000000 .word 0x00000000 + 80006f5c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x1f1f1f1f1f1f1f1f + 80006f60: 00013703 ld x14,0(x2) + 80006f64: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x1f1f1f1f1f1f1f1f + 80006f68: 00013a83 ld x21,0(x2) + 80006f6c: 00810113 addi x2,x2,8 + +0000000080006f70 : +Zknd_aes64ds_cg_cp_sbox_b31: + aes64ds x15, x14, x21 # perform operation + 80006f70: 3b5707b3 aes64ds x15,x14,x21 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b31, Zknd_aes64ds_cg_cp_sbox_b31_str) + 80006f74: 0008b203 ld x4,0(x17) + 80006f78: 00f20c63 beq x4,x15,80006f90 + 80006f7c: 184042ef jal x5,8000b100 + 80006f80: 80006f70 .word 0x80006f70 + 80006f84: 00000000 .word 0x00000000 + 80006f88: 8001dea6 .word 0x8001dea6 + 80006f8c: 00000000 .word 0x00000000 + 80006f90: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x2020202020202020 + 80006f94: 00013c83 ld x25,0(x2) + 80006f98: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2020202020202020 + 80006f9c: 00013d03 ld x26,0(x2) + 80006fa0: 00810113 addi x2,x2,8 + +0000000080006fa4 : +Zknd_aes64ds_cg_cp_sbox_b32: + aes64ds x27, x25, x26 # perform operation + 80006fa4: 3bac8db3 aes64ds x27,x25,x26 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b32, Zknd_aes64ds_cg_cp_sbox_b32_str) + 80006fa8: 0008b203 ld x4,0(x17) + 80006fac: 01b20c63 beq x4,x27,80006fc4 + 80006fb0: 150042ef jal x5,8000b100 + 80006fb4: 80006fa4 .word 0x80006fa4 + 80006fb8: 00000000 .word 0x00000000 + 80006fbc: 8001dede .word 0x8001dede + 80006fc0: 00000000 .word 0x00000000 + 80006fc4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x2121212121212121 + 80006fc8: 00013783 ld x15,0(x2) + 80006fcc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x2121212121212121 + 80006fd0: 00013c03 ld x24,0(x2) + 80006fd4: 00810113 addi x2,x2,8 + +0000000080006fd8 : +Zknd_aes64ds_cg_cp_sbox_b33: + aes64ds x6, x15, x24 # perform operation + 80006fd8: 3b878333 aes64ds x6,x15,x24 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b33, Zknd_aes64ds_cg_cp_sbox_b33_str) + 80006fdc: 0008b203 ld x4,0(x17) + 80006fe0: 00620c63 beq x4,x6,80006ff8 + 80006fe4: 11c042ef jal x5,8000b100 + 80006fe8: 80006fd8 .word 0x80006fd8 + 80006fec: 00000000 .word 0x00000000 + 80006ff0: 8001df16 .word 0x8001df16 + 80006ff4: 00000000 .word 0x00000000 + 80006ff8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x2222222222222222 + 80006ffc: 00013603 ld x12,0(x2) + 80007000: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x2222222222222222 + 80007004: 00013e03 ld x28,0(x2) + 80007008: 00810113 addi x2,x2,8 + +000000008000700c : +Zknd_aes64ds_cg_cp_sbox_b34: + aes64ds x31, x12, x28 # perform operation + 8000700c: 3bc60fb3 aes64ds x31,x12,x28 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cp_sbox_b34, Zknd_aes64ds_cg_cp_sbox_b34_str) + 80007010: 0008b203 ld x4,0(x17) + 80007014: 01f20c63 beq x4,x31,8000702c + 80007018: 0e8042ef jal x5,8000b100 + 8000701c: 8000700c .word 0x8000700c + 80007020: 00000000 .word 0x00000000 + 80007024: 8001df4e .word 0x8001df4e + 80007028: 00000000 .word 0x00000000 + 8000702c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x2323232323232323 + 80007030: 00013383 ld x7,0(x2) + 80007034: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x2323232323232323 + 80007038: 00013d83 ld x27,0(x2) + 8000703c: 00810113 addi x2,x2,8 + +0000000080007040 : +Zknd_aes64ds_cg_cp_sbox_b35: + aes64ds x28, x7, x27 # perform operation + 80007040: 3bb38e33 aes64ds x28,x7,x27 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b35, Zknd_aes64ds_cg_cp_sbox_b35_str) + 80007044: 0008b203 ld x4,0(x17) + 80007048: 01c20c63 beq x4,x28,80007060 + 8000704c: 0b4042ef jal x5,8000b100 + 80007050: 80007040 .word 0x80007040 + 80007054: 00000000 .word 0x00000000 + 80007058: 8001df86 .word 0x8001df86 + 8000705c: 00000000 .word 0x00000000 + 80007060: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x2424242424242424 + 80007064: 00013483 ld x9,0(x2) + 80007068: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x2424242424242424 + 8000706c: 00013a83 ld x21,0(x2) + 80007070: 00810113 addi x2,x2,8 + +0000000080007074 : +Zknd_aes64ds_cg_cp_sbox_b36: + aes64ds x14, x9, x21 # perform operation + 80007074: 3b548733 aes64ds x14,x9,x21 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b36, Zknd_aes64ds_cg_cp_sbox_b36_str) + 80007078: 0008b203 ld x4,0(x17) + 8000707c: 00e20c63 beq x4,x14,80007094 + 80007080: 080042ef jal x5,8000b100 + 80007084: 80007074 .word 0x80007074 + 80007088: 00000000 .word 0x00000000 + 8000708c: 8001dfbe .word 0x8001dfbe + 80007090: 00000000 .word 0x00000000 + 80007094: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x2525252525252525 + 80007098: 00013303 ld x6,0(x2) + 8000709c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x2525252525252525 + 800070a0: 00013a83 ld x21,0(x2) + 800070a4: 00810113 addi x2,x2,8 + +00000000800070a8 : +Zknd_aes64ds_cg_cp_sbox_b37: + aes64ds x30, x6, x21 # perform operation + 800070a8: 3b530f33 aes64ds x30,x6,x21 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b37, Zknd_aes64ds_cg_cp_sbox_b37_str) + 800070ac: 0008b203 ld x4,0(x17) + 800070b0: 01e20c63 beq x4,x30,800070c8 + 800070b4: 04c042ef jal x5,8000b100 + 800070b8: 800070a8 .word 0x800070a8 + 800070bc: 00000000 .word 0x00000000 + 800070c0: 8001dff6 .word 0x8001dff6 + 800070c4: 00000000 .word 0x00000000 + 800070c8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x2626262626262626 + 800070cc: 00013503 ld x10,0(x2) + 800070d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x2626262626262626 + 800070d4: 00013803 ld x16,0(x2) + 800070d8: 00810113 addi x2,x2,8 + +00000000800070dc : +Zknd_aes64ds_cg_cp_sbox_b38: + aes64ds x3, x10, x16 # perform operation + 800070dc: 3b0501b3 aes64ds x3,x10,x16 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b38, Zknd_aes64ds_cg_cp_sbox_b38_str) + 800070e0: 0008b203 ld x4,0(x17) + 800070e4: 00320c63 beq x4,x3,800070fc + 800070e8: 018042ef jal x5,8000b100 + 800070ec: 800070dc .word 0x800070dc + 800070f0: 00000000 .word 0x00000000 + 800070f4: 8001e02e .word 0x8001e02e + 800070f8: 00000000 .word 0x00000000 + 800070fc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x2727272727272727 + 80007100: 00013d83 ld x27,0(x2) + 80007104: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2727272727272727 + 80007108: 00013d03 ld x26,0(x2) + 8000710c: 00810113 addi x2,x2,8 + +0000000080007110 : +Zknd_aes64ds_cg_cp_sbox_b39: + aes64ds x19, x27, x26 # perform operation + 80007110: 3bad89b3 aes64ds x19,x27,x26 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b39, Zknd_aes64ds_cg_cp_sbox_b39_str) + 80007114: 0008b203 ld x4,0(x17) + 80007118: 01320c63 beq x4,x19,80007130 + 8000711c: 7e5032ef jal x5,8000b100 + 80007120: 80007110 .word 0x80007110 + 80007124: 00000000 .word 0x00000000 + 80007128: 8001e066 .word 0x8001e066 + 8000712c: 00000000 .word 0x00000000 + 80007130: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x2828282828282828 + 80007134: 00013903 ld x18,0(x2) + 80007138: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x2828282828282828 + 8000713c: 00013a03 ld x20,0(x2) + 80007140: 00810113 addi x2,x2,8 + +0000000080007144 : +Zknd_aes64ds_cg_cp_sbox_b40: + aes64ds x1, x18, x20 # perform operation + 80007144: 3b4900b3 aes64ds x1,x18,x20 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b40, Zknd_aes64ds_cg_cp_sbox_b40_str) + 80007148: 0008b203 ld x4,0(x17) + 8000714c: 00120c63 beq x4,x1,80007164 + 80007150: 7b1032ef jal x5,8000b100 + 80007154: 80007144 .word 0x80007144 + 80007158: 00000000 .word 0x00000000 + 8000715c: 8001e09e .word 0x8001e09e + 80007160: 00000000 .word 0x00000000 + 80007164: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x2929292929292929 + 80007168: 00013503 ld x10,0(x2) + 8000716c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2929292929292929 + 80007170: 00013d03 ld x26,0(x2) + 80007174: 00810113 addi x2,x2,8 + +0000000080007178 : +Zknd_aes64ds_cg_cp_sbox_b41: + aes64ds x11, x10, x26 # perform operation + 80007178: 3ba505b3 aes64ds x11,x10,x26 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b41, Zknd_aes64ds_cg_cp_sbox_b41_str) + 8000717c: 0008b203 ld x4,0(x17) + 80007180: 00b20c63 beq x4,x11,80007198 + 80007184: 77d032ef jal x5,8000b100 + 80007188: 80007178 .word 0x80007178 + 8000718c: 00000000 .word 0x00000000 + 80007190: 8001e0d6 .word 0x8001e0d6 + 80007194: 00000000 .word 0x00000000 + 80007198: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x2a2a2a2a2a2a2a2a + 8000719c: 00013f03 ld x30,0(x2) + 800071a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x2a2a2a2a2a2a2a2a + 800071a4: 00013383 ld x7,0(x2) + 800071a8: 00810113 addi x2,x2,8 + +00000000800071ac : +Zknd_aes64ds_cg_cp_sbox_b42: + aes64ds x26, x30, x7 # perform operation + 800071ac: 3a7f0d33 aes64ds x26,x30,x7 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b42, Zknd_aes64ds_cg_cp_sbox_b42_str) + 800071b0: 0008b203 ld x4,0(x17) + 800071b4: 01a20c63 beq x4,x26,800071cc + 800071b8: 749032ef jal x5,8000b100 + 800071bc: 800071ac .word 0x800071ac + 800071c0: 00000000 .word 0x00000000 + 800071c4: 8001e10e .word 0x8001e10e + 800071c8: 00000000 .word 0x00000000 + 800071cc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x2b2b2b2b2b2b2b2b + 800071d0: 00013903 ld x18,0(x2) + 800071d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x2b2b2b2b2b2b2b2b + 800071d8: 00013983 ld x19,0(x2) + 800071dc: 00810113 addi x2,x2,8 + +00000000800071e0 : +Zknd_aes64ds_cg_cp_sbox_b43: + aes64ds x25, x18, x19 # perform operation + 800071e0: 3b390cb3 aes64ds x25,x18,x19 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b43, Zknd_aes64ds_cg_cp_sbox_b43_str) + 800071e4: 0008b203 ld x4,0(x17) + 800071e8: 01920c63 beq x4,x25,80007200 + 800071ec: 715032ef jal x5,8000b100 + 800071f0: 800071e0 .word 0x800071e0 + 800071f4: 00000000 .word 0x00000000 + 800071f8: 8001e146 .word 0x8001e146 + 800071fc: 00000000 .word 0x00000000 + 80007200: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x2c2c2c2c2c2c2c2c + 80007204: 00013083 ld x1,0(x2) + 80007208: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x2c2c2c2c2c2c2c2c + 8000720c: 00013a03 ld x20,0(x2) + 80007210: 00810113 addi x2,x2,8 + +0000000080007214 : +Zknd_aes64ds_cg_cp_sbox_b44: + aes64ds x26, x1, x20 # perform operation + 80007214: 3b408d33 aes64ds x26,x1,x20 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b44, Zknd_aes64ds_cg_cp_sbox_b44_str) + 80007218: 0008b203 ld x4,0(x17) + 8000721c: 01a20c63 beq x4,x26,80007234 + 80007220: 6e1032ef jal x5,8000b100 + 80007224: 80007214 .word 0x80007214 + 80007228: 00000000 .word 0x00000000 + 8000722c: 8001e17e .word 0x8001e17e + 80007230: 00000000 .word 0x00000000 + 80007234: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x2d2d2d2d2d2d2d2d + 80007238: 00013183 ld x3,0(x2) + 8000723c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x2d2d2d2d2d2d2d2d + 80007240: 00013683 ld x13,0(x2) + 80007244: 00810113 addi x2,x2,8 + +0000000080007248 : +Zknd_aes64ds_cg_cp_sbox_b45: + aes64ds x1, x3, x13 # perform operation + 80007248: 3ad180b3 aes64ds x1,x3,x13 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b45, Zknd_aes64ds_cg_cp_sbox_b45_str) + 8000724c: 0008b203 ld x4,0(x17) + 80007250: 00120c63 beq x4,x1,80007268 + 80007254: 6ad032ef jal x5,8000b100 + 80007258: 80007248 .word 0x80007248 + 8000725c: 00000000 .word 0x00000000 + 80007260: 8001e1b6 .word 0x8001e1b6 + 80007264: 00000000 .word 0x00000000 + 80007268: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x2e2e2e2e2e2e2e2e + 8000726c: 00013e03 ld x28,0(x2) + 80007270: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x2e2e2e2e2e2e2e2e + 80007274: 00013d03 ld x26,0(x2) + 80007278: 00810113 addi x2,x2,8 + +000000008000727c : +Zknd_aes64ds_cg_cp_sbox_b46: + aes64ds x27, x28, x26 # perform operation + 8000727c: 3bae0db3 aes64ds x27,x28,x26 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b46, Zknd_aes64ds_cg_cp_sbox_b46_str) + 80007280: 0008b203 ld x4,0(x17) + 80007284: 01b20c63 beq x4,x27,8000729c + 80007288: 679032ef jal x5,8000b100 + 8000728c: 8000727c .word 0x8000727c + 80007290: 00000000 .word 0x00000000 + 80007294: 8001e1ee .word 0x8001e1ee + 80007298: 00000000 .word 0x00000000 + 8000729c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x2f2f2f2f2f2f2f2f + 800072a0: 00013f83 ld x31,0(x2) + 800072a4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x2f2f2f2f2f2f2f2f + 800072a8: 00013f03 ld x30,0(x2) + 800072ac: 00810113 addi x2,x2,8 + +00000000800072b0 : +Zknd_aes64ds_cg_cp_sbox_b47: + aes64ds x29, x31, x30 # perform operation + 800072b0: 3bef8eb3 aes64ds x29,x31,x30 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b47, Zknd_aes64ds_cg_cp_sbox_b47_str) + 800072b4: 0008b203 ld x4,0(x17) + 800072b8: 01d20c63 beq x4,x29,800072d0 + 800072bc: 645032ef jal x5,8000b100 + 800072c0: 800072b0 .word 0x800072b0 + 800072c4: 00000000 .word 0x00000000 + 800072c8: 8001e226 .word 0x8001e226 + 800072cc: 00000000 .word 0x00000000 + 800072d0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x3030303030303030 + 800072d4: 00013e83 ld x29,0(x2) + 800072d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x3030303030303030 + 800072dc: 00013483 ld x9,0(x2) + 800072e0: 00810113 addi x2,x2,8 + +00000000800072e4 : +Zknd_aes64ds_cg_cp_sbox_b48: + aes64ds x1, x29, x9 # perform operation + 800072e4: 3a9e80b3 aes64ds x1,x29,x9 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b48, Zknd_aes64ds_cg_cp_sbox_b48_str) + 800072e8: 0008b203 ld x4,0(x17) + 800072ec: 00120c63 beq x4,x1,80007304 + 800072f0: 611032ef jal x5,8000b100 + 800072f4: 800072e4 .word 0x800072e4 + 800072f8: 00000000 .word 0x00000000 + 800072fc: 8001e25e .word 0x8001e25e + 80007300: 00000000 .word 0x00000000 + 80007304: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x3131313131313131 + 80007308: 00013703 ld x14,0(x2) + 8000730c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x3131313131313131 + 80007310: 00013c03 ld x24,0(x2) + 80007314: 00810113 addi x2,x2,8 + +0000000080007318 : +Zknd_aes64ds_cg_cp_sbox_b49: + aes64ds x23, x14, x24 # perform operation + 80007318: 3b870bb3 aes64ds x23,x14,x24 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b49, Zknd_aes64ds_cg_cp_sbox_b49_str) + 8000731c: 0008b203 ld x4,0(x17) + 80007320: 01720c63 beq x4,x23,80007338 + 80007324: 5dd032ef jal x5,8000b100 + 80007328: 80007318 .word 0x80007318 + 8000732c: 00000000 .word 0x00000000 + 80007330: 8001e296 .word 0x8001e296 + 80007334: 00000000 .word 0x00000000 + 80007338: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x3232323232323232 + 8000733c: 00013303 ld x6,0(x2) + 80007340: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x3232323232323232 + 80007344: 00013983 ld x19,0(x2) + 80007348: 00810113 addi x2,x2,8 + +000000008000734c : +Zknd_aes64ds_cg_cp_sbox_b50: + aes64ds x7, x6, x19 # perform operation + 8000734c: 3b3303b3 aes64ds x7,x6,x19 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b50, Zknd_aes64ds_cg_cp_sbox_b50_str) + 80007350: 0008b203 ld x4,0(x17) + 80007354: 00720c63 beq x4,x7,8000736c + 80007358: 5a9032ef jal x5,8000b100 + 8000735c: 8000734c .word 0x8000734c + 80007360: 00000000 .word 0x00000000 + 80007364: 8001e2ce .word 0x8001e2ce + 80007368: 00000000 .word 0x00000000 + 8000736c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x3333333333333333 + 80007370: 00013903 ld x18,0(x2) + 80007374: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x3333333333333333 + 80007378: 00013e83 ld x29,0(x2) + 8000737c: 00810113 addi x2,x2,8 + +0000000080007380 : +Zknd_aes64ds_cg_cp_sbox_b51: + aes64ds x7, x18, x29 # perform operation + 80007380: 3bd903b3 aes64ds x7,x18,x29 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b51, Zknd_aes64ds_cg_cp_sbox_b51_str) + 80007384: 0008b203 ld x4,0(x17) + 80007388: 00720c63 beq x4,x7,800073a0 + 8000738c: 575032ef jal x5,8000b100 + 80007390: 80007380 .word 0x80007380 + 80007394: 00000000 .word 0x00000000 + 80007398: 8001e306 .word 0x8001e306 + 8000739c: 00000000 .word 0x00000000 + 800073a0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x3434343434343434 + 800073a4: 00013603 ld x12,0(x2) + 800073a8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x3434343434343434 + 800073ac: 00013983 ld x19,0(x2) + 800073b0: 00810113 addi x2,x2,8 + +00000000800073b4 : +Zknd_aes64ds_cg_cp_sbox_b52: + aes64ds x10, x12, x19 # perform operation + 800073b4: 3b360533 aes64ds x10,x12,x19 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b52, Zknd_aes64ds_cg_cp_sbox_b52_str) + 800073b8: 0008b203 ld x4,0(x17) + 800073bc: 00a20c63 beq x4,x10,800073d4 + 800073c0: 541032ef jal x5,8000b100 + 800073c4: 800073b4 .word 0x800073b4 + 800073c8: 00000000 .word 0x00000000 + 800073cc: 8001e33e .word 0x8001e33e + 800073d0: 00000000 .word 0x00000000 + 800073d4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x3535353535353535 + 800073d8: 00013d83 ld x27,0(x2) + 800073dc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x3535353535353535 + 800073e0: 00013d03 ld x26,0(x2) + 800073e4: 00810113 addi x2,x2,8 + +00000000800073e8 : +Zknd_aes64ds_cg_cp_sbox_b53: + aes64ds x15, x27, x26 # perform operation + 800073e8: 3bad87b3 aes64ds x15,x27,x26 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b53, Zknd_aes64ds_cg_cp_sbox_b53_str) + 800073ec: 0008b203 ld x4,0(x17) + 800073f0: 00f20c63 beq x4,x15,80007408 + 800073f4: 50d032ef jal x5,8000b100 + 800073f8: 800073e8 .word 0x800073e8 + 800073fc: 00000000 .word 0x00000000 + 80007400: 8001e376 .word 0x8001e376 + 80007404: 00000000 .word 0x00000000 + 80007408: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x3636363636363636 + 8000740c: 00013d83 ld x27,0(x2) + 80007410: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x3636363636363636 + 80007414: 00013183 ld x3,0(x2) + 80007418: 00810113 addi x2,x2,8 + +000000008000741c : +Zknd_aes64ds_cg_cp_sbox_b54: + aes64ds x23, x27, x3 # perform operation + 8000741c: 3a3d8bb3 aes64ds x23,x27,x3 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b54, Zknd_aes64ds_cg_cp_sbox_b54_str) + 80007420: 0008b203 ld x4,0(x17) + 80007424: 01720c63 beq x4,x23,8000743c + 80007428: 4d9032ef jal x5,8000b100 + 8000742c: 8000741c .word 0x8000741c + 80007430: 00000000 .word 0x00000000 + 80007434: 8001e3ae .word 0x8001e3ae + 80007438: 00000000 .word 0x00000000 + 8000743c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x3737373737373737 + 80007440: 00013403 ld x8,0(x2) + 80007444: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x3737373737373737 + 80007448: 00013383 ld x7,0(x2) + 8000744c: 00810113 addi x2,x2,8 + +0000000080007450 : +Zknd_aes64ds_cg_cp_sbox_b55: + aes64ds x29, x8, x7 # perform operation + 80007450: 3a740eb3 aes64ds x29,x8,x7 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b55, Zknd_aes64ds_cg_cp_sbox_b55_str) + 80007454: 0008b203 ld x4,0(x17) + 80007458: 01d20c63 beq x4,x29,80007470 + 8000745c: 4a5032ef jal x5,8000b100 + 80007460: 80007450 .word 0x80007450 + 80007464: 00000000 .word 0x00000000 + 80007468: 8001e3e6 .word 0x8001e3e6 + 8000746c: 00000000 .word 0x00000000 + 80007470: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x3838383838383838 + 80007474: 00013483 ld x9,0(x2) + 80007478: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x3838383838383838 + 8000747c: 00013783 ld x15,0(x2) + 80007480: 00810113 addi x2,x2,8 + +0000000080007484 : +Zknd_aes64ds_cg_cp_sbox_b56: + aes64ds x26, x9, x15 # perform operation + 80007484: 3af48d33 aes64ds x26,x9,x15 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b56, Zknd_aes64ds_cg_cp_sbox_b56_str) + 80007488: 0008b203 ld x4,0(x17) + 8000748c: 01a20c63 beq x4,x26,800074a4 + 80007490: 471032ef jal x5,8000b100 + 80007494: 80007484 .word 0x80007484 + 80007498: 00000000 .word 0x00000000 + 8000749c: 8001e41e .word 0x8001e41e + 800074a0: 00000000 .word 0x00000000 + 800074a4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x3939393939393939 + 800074a8: 00013783 ld x15,0(x2) + 800074ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x3939393939393939 + 800074b0: 00013383 ld x7,0(x2) + 800074b4: 00810113 addi x2,x2,8 + +00000000800074b8 : +Zknd_aes64ds_cg_cp_sbox_b57: + aes64ds x29, x15, x7 # perform operation + 800074b8: 3a778eb3 aes64ds x29,x15,x7 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b57, Zknd_aes64ds_cg_cp_sbox_b57_str) + 800074bc: 0008b203 ld x4,0(x17) + 800074c0: 01d20c63 beq x4,x29,800074d8 + 800074c4: 43d032ef jal x5,8000b100 + 800074c8: 800074b8 .word 0x800074b8 + 800074cc: 00000000 .word 0x00000000 + 800074d0: 8001e456 .word 0x8001e456 + 800074d4: 00000000 .word 0x00000000 + 800074d8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x3a3a3a3a3a3a3a3a + 800074dc: 00013a03 ld x20,0(x2) + 800074e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x3a3a3a3a3a3a3a3a + 800074e4: 00013403 ld x8,0(x2) + 800074e8: 00810113 addi x2,x2,8 + +00000000800074ec : +Zknd_aes64ds_cg_cp_sbox_b58: + aes64ds x27, x20, x8 # perform operation + 800074ec: 3a8a0db3 aes64ds x27,x20,x8 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b58, Zknd_aes64ds_cg_cp_sbox_b58_str) + 800074f0: 0008b203 ld x4,0(x17) + 800074f4: 01b20c63 beq x4,x27,8000750c + 800074f8: 409032ef jal x5,8000b100 + 800074fc: 800074ec .word 0x800074ec + 80007500: 00000000 .word 0x00000000 + 80007504: 8001e48e .word 0x8001e48e + 80007508: 00000000 .word 0x00000000 + 8000750c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x3b3b3b3b3b3b3b3b + 80007510: 00013603 ld x12,0(x2) + 80007514: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x3b3b3b3b3b3b3b3b + 80007518: 00013f03 ld x30,0(x2) + 8000751c: 00810113 addi x2,x2,8 + +0000000080007520 : +Zknd_aes64ds_cg_cp_sbox_b59: + aes64ds x18, x12, x30 # perform operation + 80007520: 3be60933 aes64ds x18,x12,x30 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b59, Zknd_aes64ds_cg_cp_sbox_b59_str) + 80007524: 0008b203 ld x4,0(x17) + 80007528: 01220c63 beq x4,x18,80007540 + 8000752c: 3d5032ef jal x5,8000b100 + 80007530: 80007520 .word 0x80007520 + 80007534: 00000000 .word 0x00000000 + 80007538: 8001e4c6 .word 0x8001e4c6 + 8000753c: 00000000 .word 0x00000000 + 80007540: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x3c3c3c3c3c3c3c3c + 80007544: 00013183 ld x3,0(x2) + 80007548: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x3c3c3c3c3c3c3c3c + 8000754c: 00013d83 ld x27,0(x2) + 80007550: 00810113 addi x2,x2,8 + +0000000080007554 : +Zknd_aes64ds_cg_cp_sbox_b60: + aes64ds x21, x3, x27 # perform operation + 80007554: 3bb18ab3 aes64ds x21,x3,x27 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ds_cg_cp_sbox_b60, Zknd_aes64ds_cg_cp_sbox_b60_str) + 80007558: 0008b203 ld x4,0(x17) + 8000755c: 01520c63 beq x4,x21,80007574 + 80007560: 3a1032ef jal x5,8000b100 + 80007564: 80007554 .word 0x80007554 + 80007568: 00000000 .word 0x00000000 + 8000756c: 8001e4fe .word 0x8001e4fe + 80007570: 00000000 .word 0x00000000 + 80007574: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x3d3d3d3d3d3d3d3d + 80007578: 00013b03 ld x22,0(x2) + 8000757c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x3d3d3d3d3d3d3d3d + 80007580: 00013703 ld x14,0(x2) + 80007584: 00810113 addi x2,x2,8 + +0000000080007588 : +Zknd_aes64ds_cg_cp_sbox_b61: + aes64ds x26, x22, x14 # perform operation + 80007588: 3aeb0d33 aes64ds x26,x22,x14 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b61, Zknd_aes64ds_cg_cp_sbox_b61_str) + 8000758c: 0008b203 ld x4,0(x17) + 80007590: 01a20c63 beq x4,x26,800075a8 + 80007594: 36d032ef jal x5,8000b100 + 80007598: 80007588 .word 0x80007588 + 8000759c: 00000000 .word 0x00000000 + 800075a0: 8001e536 .word 0x8001e536 + 800075a4: 00000000 .word 0x00000000 + 800075a8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x3e3e3e3e3e3e3e3e + 800075ac: 00013683 ld x13,0(x2) + 800075b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x3e3e3e3e3e3e3e3e + 800075b4: 00013983 ld x19,0(x2) + 800075b8: 00810113 addi x2,x2,8 + +00000000800075bc : +Zknd_aes64ds_cg_cp_sbox_b62: + aes64ds x18, x13, x19 # perform operation + 800075bc: 3b368933 aes64ds x18,x13,x19 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b62, Zknd_aes64ds_cg_cp_sbox_b62_str) + 800075c0: 0008b203 ld x4,0(x17) + 800075c4: 01220c63 beq x4,x18,800075dc + 800075c8: 339032ef jal x5,8000b100 + 800075cc: 800075bc .word 0x800075bc + 800075d0: 00000000 .word 0x00000000 + 800075d4: 8001e56e .word 0x8001e56e + 800075d8: 00000000 .word 0x00000000 + 800075dc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x3f3f3f3f3f3f3f3f + 800075e0: 00013183 ld x3,0(x2) + 800075e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x3f3f3f3f3f3f3f3f + 800075e8: 00013803 ld x16,0(x2) + 800075ec: 00810113 addi x2,x2,8 + +00000000800075f0 : +Zknd_aes64ds_cg_cp_sbox_b63: + aes64ds x19, x3, x16 # perform operation + 800075f0: 3b0189b3 aes64ds x19,x3,x16 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b63, Zknd_aes64ds_cg_cp_sbox_b63_str) + 800075f4: 0008b203 ld x4,0(x17) + 800075f8: 01320c63 beq x4,x19,80007610 + 800075fc: 305032ef jal x5,8000b100 + 80007600: 800075f0 .word 0x800075f0 + 80007604: 00000000 .word 0x00000000 + 80007608: 8001e5a6 .word 0x8001e5a6 + 8000760c: 00000000 .word 0x00000000 + 80007610: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x4040404040404040 + 80007614: 00013e83 ld x29,0(x2) + 80007618: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x4040404040404040 + 8000761c: 00013783 ld x15,0(x2) + 80007620: 00810113 addi x2,x2,8 + +0000000080007624 : +Zknd_aes64ds_cg_cp_sbox_b64: + aes64ds x14, x29, x15 # perform operation + 80007624: 3afe8733 aes64ds x14,x29,x15 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b64, Zknd_aes64ds_cg_cp_sbox_b64_str) + 80007628: 0008b203 ld x4,0(x17) + 8000762c: 00e20c63 beq x4,x14,80007644 + 80007630: 2d1032ef jal x5,8000b100 + 80007634: 80007624 .word 0x80007624 + 80007638: 00000000 .word 0x00000000 + 8000763c: 8001e5de .word 0x8001e5de + 80007640: 00000000 .word 0x00000000 + 80007644: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x4141414141414141 + 80007648: 00013583 ld x11,0(x2) + 8000764c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x4141414141414141 + 80007650: 00013a03 ld x20,0(x2) + 80007654: 00810113 addi x2,x2,8 + +0000000080007658 : +Zknd_aes64ds_cg_cp_sbox_b65: + aes64ds x14, x11, x20 # perform operation + 80007658: 3b458733 aes64ds x14,x11,x20 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b65, Zknd_aes64ds_cg_cp_sbox_b65_str) + 8000765c: 0008b203 ld x4,0(x17) + 80007660: 00e20c63 beq x4,x14,80007678 + 80007664: 29d032ef jal x5,8000b100 + 80007668: 80007658 .word 0x80007658 + 8000766c: 00000000 .word 0x00000000 + 80007670: 8001e616 .word 0x8001e616 + 80007674: 00000000 .word 0x00000000 + 80007678: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x4242424242424242 + 8000767c: 00013783 ld x15,0(x2) + 80007680: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x4242424242424242 + 80007684: 00013383 ld x7,0(x2) + 80007688: 00810113 addi x2,x2,8 + +000000008000768c : +Zknd_aes64ds_cg_cp_sbox_b66: + aes64ds x1, x15, x7 # perform operation + 8000768c: 3a7780b3 aes64ds x1,x15,x7 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b66, Zknd_aes64ds_cg_cp_sbox_b66_str) + 80007690: 0008b203 ld x4,0(x17) + 80007694: 00120c63 beq x4,x1,800076ac + 80007698: 269032ef jal x5,8000b100 + 8000769c: 8000768c .word 0x8000768c + 800076a0: 00000000 .word 0x00000000 + 800076a4: 8001e64e .word 0x8001e64e + 800076a8: 00000000 .word 0x00000000 + 800076ac: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x4343434343434343 + 800076b0: 00013403 ld x8,0(x2) + 800076b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x4343434343434343 + 800076b8: 00013f83 ld x31,0(x2) + 800076bc: 00810113 addi x2,x2,8 + +00000000800076c0 : +Zknd_aes64ds_cg_cp_sbox_b67: + aes64ds x1, x8, x31 # perform operation + 800076c0: 3bf400b3 aes64ds x1,x8,x31 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b67, Zknd_aes64ds_cg_cp_sbox_b67_str) + 800076c4: 0008b203 ld x4,0(x17) + 800076c8: 00120c63 beq x4,x1,800076e0 + 800076cc: 235032ef jal x5,8000b100 + 800076d0: 800076c0 .word 0x800076c0 + 800076d4: 00000000 .word 0x00000000 + 800076d8: 8001e686 .word 0x8001e686 + 800076dc: 00000000 .word 0x00000000 + 800076e0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x4444444444444444 + 800076e4: 00013603 ld x12,0(x2) + 800076e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x4444444444444444 + 800076ec: 00013303 ld x6,0(x2) + 800076f0: 00810113 addi x2,x2,8 + +00000000800076f4 : +Zknd_aes64ds_cg_cp_sbox_b68: + aes64ds x28, x12, x6 # perform operation + 800076f4: 3a660e33 aes64ds x28,x12,x6 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b68, Zknd_aes64ds_cg_cp_sbox_b68_str) + 800076f8: 0008b203 ld x4,0(x17) + 800076fc: 01c20c63 beq x4,x28,80007714 + 80007700: 201032ef jal x5,8000b100 + 80007704: 800076f4 .word 0x800076f4 + 80007708: 00000000 .word 0x00000000 + 8000770c: 8001e6be .word 0x8001e6be + 80007710: 00000000 .word 0x00000000 + 80007714: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x4545454545454545 + 80007718: 00013803 ld x16,0(x2) + 8000771c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x4545454545454545 + 80007720: 00013903 ld x18,0(x2) + 80007724: 00810113 addi x2,x2,8 + +0000000080007728 : +Zknd_aes64ds_cg_cp_sbox_b69: + aes64ds x31, x16, x18 # perform operation + 80007728: 3b280fb3 aes64ds x31,x16,x18 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cp_sbox_b69, Zknd_aes64ds_cg_cp_sbox_b69_str) + 8000772c: 0008b203 ld x4,0(x17) + 80007730: 01f20c63 beq x4,x31,80007748 + 80007734: 1cd032ef jal x5,8000b100 + 80007738: 80007728 .word 0x80007728 + 8000773c: 00000000 .word 0x00000000 + 80007740: 8001e6f6 .word 0x8001e6f6 + 80007744: 00000000 .word 0x00000000 + 80007748: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x4646464646464646 + 8000774c: 00013183 ld x3,0(x2) + 80007750: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x4646464646464646 + 80007754: 00013303 ld x6,0(x2) + 80007758: 00810113 addi x2,x2,8 + +000000008000775c : +Zknd_aes64ds_cg_cp_sbox_b70: + aes64ds x1, x3, x6 # perform operation + 8000775c: 3a6180b3 aes64ds x1,x3,x6 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b70, Zknd_aes64ds_cg_cp_sbox_b70_str) + 80007760: 0008b203 ld x4,0(x17) + 80007764: 00120c63 beq x4,x1,8000777c + 80007768: 199032ef jal x5,8000b100 + 8000776c: 8000775c .word 0x8000775c + 80007770: 00000000 .word 0x00000000 + 80007774: 8001e72e .word 0x8001e72e + 80007778: 00000000 .word 0x00000000 + 8000777c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x4747474747474747 + 80007780: 00013a83 ld x21,0(x2) + 80007784: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x4747474747474747 + 80007788: 00013c83 ld x25,0(x2) + 8000778c: 00810113 addi x2,x2,8 + +0000000080007790 : +Zknd_aes64ds_cg_cp_sbox_b71: + aes64ds x20, x21, x25 # perform operation + 80007790: 3b9a8a33 aes64ds x20,x21,x25 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b71, Zknd_aes64ds_cg_cp_sbox_b71_str) + 80007794: 0008b203 ld x4,0(x17) + 80007798: 01420c63 beq x4,x20,800077b0 + 8000779c: 165032ef jal x5,8000b100 + 800077a0: 80007790 .word 0x80007790 + 800077a4: 00000000 .word 0x00000000 + 800077a8: 8001e766 .word 0x8001e766 + 800077ac: 00000000 .word 0x00000000 + 800077b0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x4848484848484848 + 800077b4: 00013683 ld x13,0(x2) + 800077b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x4848484848484848 + 800077bc: 00013483 ld x9,0(x2) + 800077c0: 00810113 addi x2,x2,8 + +00000000800077c4 : +Zknd_aes64ds_cg_cp_sbox_b72: + aes64ds x6, x13, x9 # perform operation + 800077c4: 3a968333 aes64ds x6,x13,x9 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b72, Zknd_aes64ds_cg_cp_sbox_b72_str) + 800077c8: 0008b203 ld x4,0(x17) + 800077cc: 00620c63 beq x4,x6,800077e4 + 800077d0: 131032ef jal x5,8000b100 + 800077d4: 800077c4 .word 0x800077c4 + 800077d8: 00000000 .word 0x00000000 + 800077dc: 8001e79e .word 0x8001e79e + 800077e0: 00000000 .word 0x00000000 + 800077e4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x4949494949494949 + 800077e8: 00013783 ld x15,0(x2) + 800077ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x4949494949494949 + 800077f0: 00013a83 ld x21,0(x2) + 800077f4: 00810113 addi x2,x2,8 + +00000000800077f8 : +Zknd_aes64ds_cg_cp_sbox_b73: + aes64ds x12, x15, x21 # perform operation + 800077f8: 3b578633 aes64ds x12,x15,x21 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b73, Zknd_aes64ds_cg_cp_sbox_b73_str) + 800077fc: 0008b203 ld x4,0(x17) + 80007800: 00c20c63 beq x4,x12,80007818 + 80007804: 0fd032ef jal x5,8000b100 + 80007808: 800077f8 .word 0x800077f8 + 8000780c: 00000000 .word 0x00000000 + 80007810: 8001e7d6 .word 0x8001e7d6 + 80007814: 00000000 .word 0x00000000 + 80007818: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x4a4a4a4a4a4a4a4a + 8000781c: 00013d03 ld x26,0(x2) + 80007820: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x4a4a4a4a4a4a4a4a + 80007824: 00013a83 ld x21,0(x2) + 80007828: 00810113 addi x2,x2,8 + +000000008000782c : +Zknd_aes64ds_cg_cp_sbox_b74: + aes64ds x18, x26, x21 # perform operation + 8000782c: 3b5d0933 aes64ds x18,x26,x21 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b74, Zknd_aes64ds_cg_cp_sbox_b74_str) + 80007830: 0008b203 ld x4,0(x17) + 80007834: 01220c63 beq x4,x18,8000784c + 80007838: 0c9032ef jal x5,8000b100 + 8000783c: 8000782c .word 0x8000782c + 80007840: 00000000 .word 0x00000000 + 80007844: 8001e80e .word 0x8001e80e + 80007848: 00000000 .word 0x00000000 + 8000784c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x4b4b4b4b4b4b4b4b + 80007850: 00013683 ld x13,0(x2) + 80007854: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x4b4b4b4b4b4b4b4b + 80007858: 00013603 ld x12,0(x2) + 8000785c: 00810113 addi x2,x2,8 + +0000000080007860 : +Zknd_aes64ds_cg_cp_sbox_b75: + aes64ds x10, x13, x12 # perform operation + 80007860: 3ac68533 aes64ds x10,x13,x12 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b75, Zknd_aes64ds_cg_cp_sbox_b75_str) + 80007864: 0008b203 ld x4,0(x17) + 80007868: 00a20c63 beq x4,x10,80007880 + 8000786c: 095032ef jal x5,8000b100 + 80007870: 80007860 .word 0x80007860 + 80007874: 00000000 .word 0x00000000 + 80007878: 8001e846 .word 0x8001e846 + 8000787c: 00000000 .word 0x00000000 + 80007880: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x4c4c4c4c4c4c4c4c + 80007884: 00013c83 ld x25,0(x2) + 80007888: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x4c4c4c4c4c4c4c4c + 8000788c: 00013503 ld x10,0(x2) + 80007890: 00810113 addi x2,x2,8 + +0000000080007894 : +Zknd_aes64ds_cg_cp_sbox_b76: + aes64ds x11, x25, x10 # perform operation + 80007894: 3aac85b3 aes64ds x11,x25,x10 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b76, Zknd_aes64ds_cg_cp_sbox_b76_str) + 80007898: 0008b203 ld x4,0(x17) + 8000789c: 00b20c63 beq x4,x11,800078b4 + 800078a0: 061032ef jal x5,8000b100 + 800078a4: 80007894 .word 0x80007894 + 800078a8: 00000000 .word 0x00000000 + 800078ac: 8001e87e .word 0x8001e87e + 800078b0: 00000000 .word 0x00000000 + 800078b4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x4d4d4d4d4d4d4d4d + 800078b8: 00013803 ld x16,0(x2) + 800078bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x4d4d4d4d4d4d4d4d + 800078c0: 00013983 ld x19,0(x2) + 800078c4: 00810113 addi x2,x2,8 + +00000000800078c8 : +Zknd_aes64ds_cg_cp_sbox_b77: + aes64ds x25, x16, x19 # perform operation + 800078c8: 3b380cb3 aes64ds x25,x16,x19 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b77, Zknd_aes64ds_cg_cp_sbox_b77_str) + 800078cc: 0008b203 ld x4,0(x17) + 800078d0: 01920c63 beq x4,x25,800078e8 + 800078d4: 02d032ef jal x5,8000b100 + 800078d8: 800078c8 .word 0x800078c8 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 8001e8b6 .word 0x8001e8b6 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x4e4e4e4e4e4e4e4e + 800078ec: 00013d83 ld x27,0(x2) + 800078f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x4e4e4e4e4e4e4e4e + 800078f4: 00013d03 ld x26,0(x2) + 800078f8: 00810113 addi x2,x2,8 + +00000000800078fc : +Zknd_aes64ds_cg_cp_sbox_b78: + aes64ds x30, x27, x26 # perform operation + 800078fc: 3bad8f33 aes64ds x30,x27,x26 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b78, Zknd_aes64ds_cg_cp_sbox_b78_str) + 80007900: 0008b203 ld x4,0(x17) + 80007904: 01e20c63 beq x4,x30,8000791c + 80007908: 7f8032ef jal x5,8000b100 + 8000790c: 800078fc .word 0x800078fc + 80007910: 00000000 .word 0x00000000 + 80007914: 8001e8ee .word 0x8001e8ee + 80007918: 00000000 .word 0x00000000 + 8000791c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x4f4f4f4f4f4f4f4f + 80007920: 00013b03 ld x22,0(x2) + 80007924: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x4f4f4f4f4f4f4f4f + 80007928: 00013803 ld x16,0(x2) + 8000792c: 00810113 addi x2,x2,8 + +0000000080007930 : +Zknd_aes64ds_cg_cp_sbox_b79: + aes64ds x9, x22, x16 # perform operation + 80007930: 3b0b04b3 aes64ds x9,x22,x16 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b79, Zknd_aes64ds_cg_cp_sbox_b79_str) + 80007934: 0008b203 ld x4,0(x17) + 80007938: 00920c63 beq x4,x9,80007950 + 8000793c: 7c4032ef jal x5,8000b100 + 80007940: 80007930 .word 0x80007930 + 80007944: 00000000 .word 0x00000000 + 80007948: 8001e926 .word 0x8001e926 + 8000794c: 00000000 .word 0x00000000 + 80007950: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x5050505050505050 + 80007954: 00013b03 ld x22,0(x2) + 80007958: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x5050505050505050 + 8000795c: 00013b83 ld x23,0(x2) + 80007960: 00810113 addi x2,x2,8 + +0000000080007964 : +Zknd_aes64ds_cg_cp_sbox_b80: + aes64ds x15, x22, x23 # perform operation + 80007964: 3b7b07b3 aes64ds x15,x22,x23 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b80, Zknd_aes64ds_cg_cp_sbox_b80_str) + 80007968: 0008b203 ld x4,0(x17) + 8000796c: 00f20c63 beq x4,x15,80007984 + 80007970: 790032ef jal x5,8000b100 + 80007974: 80007964 .word 0x80007964 + 80007978: 00000000 .word 0x00000000 + 8000797c: 8001e95e .word 0x8001e95e + 80007980: 00000000 .word 0x00000000 + 80007984: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x5151515151515151 + 80007988: 00013683 ld x13,0(x2) + 8000798c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x5151515151515151 + 80007990: 00013383 ld x7,0(x2) + 80007994: 00810113 addi x2,x2,8 + +0000000080007998 : +Zknd_aes64ds_cg_cp_sbox_b81: + aes64ds x29, x13, x7 # perform operation + 80007998: 3a768eb3 aes64ds x29,x13,x7 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b81, Zknd_aes64ds_cg_cp_sbox_b81_str) + 8000799c: 0008b203 ld x4,0(x17) + 800079a0: 01d20c63 beq x4,x29,800079b8 + 800079a4: 75c032ef jal x5,8000b100 + 800079a8: 80007998 .word 0x80007998 + 800079ac: 00000000 .word 0x00000000 + 800079b0: 8001e996 .word 0x8001e996 + 800079b4: 00000000 .word 0x00000000 + 800079b8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x5252525252525252 + 800079bc: 00013703 ld x14,0(x2) + 800079c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x5252525252525252 + 800079c4: 00013683 ld x13,0(x2) + 800079c8: 00810113 addi x2,x2,8 + +00000000800079cc : +Zknd_aes64ds_cg_cp_sbox_b82: + aes64ds x7, x14, x13 # perform operation + 800079cc: 3ad703b3 aes64ds x7,x14,x13 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b82, Zknd_aes64ds_cg_cp_sbox_b82_str) + 800079d0: 0008b203 ld x4,0(x17) + 800079d4: 00720c63 beq x4,x7,800079ec + 800079d8: 728032ef jal x5,8000b100 + 800079dc: 800079cc .word 0x800079cc + 800079e0: 00000000 .word 0x00000000 + 800079e4: 8001e9ce .word 0x8001e9ce + 800079e8: 00000000 .word 0x00000000 + 800079ec: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x5353535353535353 + 800079f0: 00013383 ld x7,0(x2) + 800079f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x5353535353535353 + 800079f8: 00013f03 ld x30,0(x2) + 800079fc: 00810113 addi x2,x2,8 + +0000000080007a00 : +Zknd_aes64ds_cg_cp_sbox_b83: + aes64ds x13, x7, x30 # perform operation + 80007a00: 3be386b3 aes64ds x13,x7,x30 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b83, Zknd_aes64ds_cg_cp_sbox_b83_str) + 80007a04: 0008b203 ld x4,0(x17) + 80007a08: 00d20c63 beq x4,x13,80007a20 + 80007a0c: 6f4032ef jal x5,8000b100 + 80007a10: 80007a00 .word 0x80007a00 + 80007a14: 00000000 .word 0x00000000 + 80007a18: 8001ea06 .word 0x8001ea06 + 80007a1c: 00000000 .word 0x00000000 + 80007a20: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x5454545454545454 + 80007a24: 00013503 ld x10,0(x2) + 80007a28: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x5454545454545454 + 80007a2c: 00013083 ld x1,0(x2) + 80007a30: 00810113 addi x2,x2,8 + +0000000080007a34 : +Zknd_aes64ds_cg_cp_sbox_b84: + aes64ds x15, x10, x1 # perform operation + 80007a34: 3a1507b3 aes64ds x15,x10,x1 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b84, Zknd_aes64ds_cg_cp_sbox_b84_str) + 80007a38: 0008b203 ld x4,0(x17) + 80007a3c: 00f20c63 beq x4,x15,80007a54 + 80007a40: 6c0032ef jal x5,8000b100 + 80007a44: 80007a34 .word 0x80007a34 + 80007a48: 00000000 .word 0x00000000 + 80007a4c: 8001ea3e .word 0x8001ea3e + 80007a50: 00000000 .word 0x00000000 + 80007a54: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5555555555555555 + 80007a58: 00013f03 ld x30,0(x2) + 80007a5c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x5555555555555555 + 80007a60: 00013083 ld x1,0(x2) + 80007a64: 00810113 addi x2,x2,8 + +0000000080007a68 : +Zknd_aes64ds_cg_cp_sbox_b85: + aes64ds x10, x30, x1 # perform operation + 80007a68: 3a1f0533 aes64ds x10,x30,x1 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b85, Zknd_aes64ds_cg_cp_sbox_b85_str) + 80007a6c: 0008b203 ld x4,0(x17) + 80007a70: 00a20c63 beq x4,x10,80007a88 + 80007a74: 68c032ef jal x5,8000b100 + 80007a78: 80007a68 .word 0x80007a68 + 80007a7c: 00000000 .word 0x00000000 + 80007a80: 8001ea76 .word 0x8001ea76 + 80007a84: 00000000 .word 0x00000000 + 80007a88: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x5656565656565656 + 80007a8c: 00013483 ld x9,0(x2) + 80007a90: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x5656565656565656 + 80007a94: 00013583 ld x11,0(x2) + 80007a98: 00810113 addi x2,x2,8 + +0000000080007a9c : +Zknd_aes64ds_cg_cp_sbox_b86: + aes64ds x26, x9, x11 # perform operation + 80007a9c: 3ab48d33 aes64ds x26,x9,x11 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b86, Zknd_aes64ds_cg_cp_sbox_b86_str) + 80007aa0: 0008b203 ld x4,0(x17) + 80007aa4: 01a20c63 beq x4,x26,80007abc + 80007aa8: 658032ef jal x5,8000b100 + 80007aac: 80007a9c .word 0x80007a9c + 80007ab0: 00000000 .word 0x00000000 + 80007ab4: 8001eaae .word 0x8001eaae + 80007ab8: 00000000 .word 0x00000000 + 80007abc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x5757575757575757 + 80007ac0: 00013e03 ld x28,0(x2) + 80007ac4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0x5757575757575757 + 80007ac8: 00013903 ld x18,0(x2) + 80007acc: 00810113 addi x2,x2,8 + +0000000080007ad0 : +Zknd_aes64ds_cg_cp_sbox_b87: + aes64ds x30, x28, x18 # perform operation + 80007ad0: 3b2e0f33 aes64ds x30,x28,x18 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b87, Zknd_aes64ds_cg_cp_sbox_b87_str) + 80007ad4: 0008b203 ld x4,0(x17) + 80007ad8: 01e20c63 beq x4,x30,80007af0 + 80007adc: 624032ef jal x5,8000b100 + 80007ae0: 80007ad0 .word 0x80007ad0 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 8001eae6 .word 0x8001eae6 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x5858585858585858 + 80007af4: 00013a03 ld x20,0(x2) + 80007af8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x5858585858585858 + 80007afc: 00013583 ld x11,0(x2) + 80007b00: 00810113 addi x2,x2,8 + +0000000080007b04 : +Zknd_aes64ds_cg_cp_sbox_b88: + aes64ds x10, x20, x11 # perform operation + 80007b04: 3aba0533 aes64ds x10,x20,x11 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b88, Zknd_aes64ds_cg_cp_sbox_b88_str) + 80007b08: 0008b203 ld x4,0(x17) + 80007b0c: 00a20c63 beq x4,x10,80007b24 + 80007b10: 5f0032ef jal x5,8000b100 + 80007b14: 80007b04 .word 0x80007b04 + 80007b18: 00000000 .word 0x00000000 + 80007b1c: 8001eb1e .word 0x8001eb1e + 80007b20: 00000000 .word 0x00000000 + 80007b24: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x5959595959595959 + 80007b28: 00013903 ld x18,0(x2) + 80007b2c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0x5959595959595959 + 80007b30: 00013403 ld x8,0(x2) + 80007b34: 00810113 addi x2,x2,8 + +0000000080007b38 : +Zknd_aes64ds_cg_cp_sbox_b89: + aes64ds x29, x18, x8 # perform operation + 80007b38: 3a890eb3 aes64ds x29,x18,x8 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b89, Zknd_aes64ds_cg_cp_sbox_b89_str) + 80007b3c: 0008b203 ld x4,0(x17) + 80007b40: 01d20c63 beq x4,x29,80007b58 + 80007b44: 5bc032ef jal x5,8000b100 + 80007b48: 80007b38 .word 0x80007b38 + 80007b4c: 00000000 .word 0x00000000 + 80007b50: 8001eb56 .word 0x8001eb56 + 80007b54: 00000000 .word 0x00000000 + 80007b58: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5a5a5a5a5a5a5a5a + 80007b5c: 00013183 ld x3,0(x2) + 80007b60: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x5a5a5a5a5a5a5a5a + 80007b64: 00013f83 ld x31,0(x2) + 80007b68: 00810113 addi x2,x2,8 + +0000000080007b6c : +Zknd_aes64ds_cg_cp_sbox_b90: + aes64ds x24, x3, x31 # perform operation + 80007b6c: 3bf18c33 aes64ds x24,x3,x31 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b90, Zknd_aes64ds_cg_cp_sbox_b90_str) + 80007b70: 0008b203 ld x4,0(x17) + 80007b74: 01820c63 beq x4,x24,80007b8c + 80007b78: 588032ef jal x5,8000b100 + 80007b7c: 80007b6c .word 0x80007b6c + 80007b80: 00000000 .word 0x00000000 + 80007b84: 8001eb8e .word 0x8001eb8e + 80007b88: 00000000 .word 0x00000000 + 80007b8c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5b5b5b5b5b5b5b5b + 80007b90: 00013183 ld x3,0(x2) + 80007b94: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0x5b5b5b5b5b5b5b5b + 80007b98: 00013783 ld x15,0(x2) + 80007b9c: 00810113 addi x2,x2,8 + +0000000080007ba0 : +Zknd_aes64ds_cg_cp_sbox_b91: + aes64ds x29, x3, x15 # perform operation + 80007ba0: 3af18eb3 aes64ds x29,x3,x15 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b91, Zknd_aes64ds_cg_cp_sbox_b91_str) + 80007ba4: 0008b203 ld x4,0(x17) + 80007ba8: 01d20c63 beq x4,x29,80007bc0 + 80007bac: 554032ef jal x5,8000b100 + 80007bb0: 80007ba0 .word 0x80007ba0 + 80007bb4: 00000000 .word 0x00000000 + 80007bb8: 8001ebc6 .word 0x8001ebc6 + 80007bbc: 00000000 .word 0x00000000 + 80007bc0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x5c5c5c5c5c5c5c5c + 80007bc4: 00013683 ld x13,0(x2) + 80007bc8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x5c5c5c5c5c5c5c5c + 80007bcc: 00013c03 ld x24,0(x2) + 80007bd0: 00810113 addi x2,x2,8 + +0000000080007bd4 : +Zknd_aes64ds_cg_cp_sbox_b92: + aes64ds x31, x13, x24 # perform operation + 80007bd4: 3b868fb3 aes64ds x31,x13,x24 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cp_sbox_b92, Zknd_aes64ds_cg_cp_sbox_b92_str) + 80007bd8: 0008b203 ld x4,0(x17) + 80007bdc: 01f20c63 beq x4,x31,80007bf4 + 80007be0: 520032ef jal x5,8000b100 + 80007be4: 80007bd4 .word 0x80007bd4 + 80007be8: 00000000 .word 0x00000000 + 80007bec: 8001ebfe .word 0x8001ebfe + 80007bf0: 00000000 .word 0x00000000 + 80007bf4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x5d5d5d5d5d5d5d5d + 80007bf8: 00013083 ld x1,0(x2) + 80007bfc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x5d5d5d5d5d5d5d5d + 80007c00: 00013b83 ld x23,0(x2) + 80007c04: 00810113 addi x2,x2,8 + +0000000080007c08 : +Zknd_aes64ds_cg_cp_sbox_b93: + aes64ds x18, x1, x23 # perform operation + 80007c08: 3b708933 aes64ds x18,x1,x23 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b93, Zknd_aes64ds_cg_cp_sbox_b93_str) + 80007c0c: 0008b203 ld x4,0(x17) + 80007c10: 01220c63 beq x4,x18,80007c28 + 80007c14: 4ec032ef jal x5,8000b100 + 80007c18: 80007c08 .word 0x80007c08 + 80007c1c: 00000000 .word 0x00000000 + 80007c20: 8001ec36 .word 0x8001ec36 + 80007c24: 00000000 .word 0x00000000 + 80007c28: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x5e5e5e5e5e5e5e5e + 80007c2c: 00013183 ld x3,0(x2) + 80007c30: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x5e5e5e5e5e5e5e5e + 80007c34: 00013f03 ld x30,0(x2) + 80007c38: 00810113 addi x2,x2,8 + +0000000080007c3c : +Zknd_aes64ds_cg_cp_sbox_b94: + aes64ds x28, x3, x30 # perform operation + 80007c3c: 3be18e33 aes64ds x28,x3,x30 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b94, Zknd_aes64ds_cg_cp_sbox_b94_str) + 80007c40: 0008b203 ld x4,0(x17) + 80007c44: 01c20c63 beq x4,x28,80007c5c + 80007c48: 4b8032ef jal x5,8000b100 + 80007c4c: 80007c3c .word 0x80007c3c + 80007c50: 00000000 .word 0x00000000 + 80007c54: 8001ec6e .word 0x8001ec6e + 80007c58: 00000000 .word 0x00000000 + 80007c5c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x5f5f5f5f5f5f5f5f + 80007c60: 00013a03 ld x20,0(x2) + 80007c64: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x5f5f5f5f5f5f5f5f + 80007c68: 00013b03 ld x22,0(x2) + 80007c6c: 00810113 addi x2,x2,8 + +0000000080007c70 : +Zknd_aes64ds_cg_cp_sbox_b95: + aes64ds x19, x20, x22 # perform operation + 80007c70: 3b6a09b3 aes64ds x19,x20,x22 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b95, Zknd_aes64ds_cg_cp_sbox_b95_str) + 80007c74: 0008b203 ld x4,0(x17) + 80007c78: 01320c63 beq x4,x19,80007c90 + 80007c7c: 484032ef jal x5,8000b100 + 80007c80: 80007c70 .word 0x80007c70 + 80007c84: 00000000 .word 0x00000000 + 80007c88: 8001eca6 .word 0x8001eca6 + 80007c8c: 00000000 .word 0x00000000 + 80007c90: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x6060606060606060 + 80007c94: 00013503 ld x10,0(x2) + 80007c98: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x6060606060606060 + 80007c9c: 00013303 ld x6,0(x2) + 80007ca0: 00810113 addi x2,x2,8 + +0000000080007ca4 : +Zknd_aes64ds_cg_cp_sbox_b96: + aes64ds x1, x10, x6 # perform operation + 80007ca4: 3a6500b3 aes64ds x1,x10,x6 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b96, Zknd_aes64ds_cg_cp_sbox_b96_str) + 80007ca8: 0008b203 ld x4,0(x17) + 80007cac: 00120c63 beq x4,x1,80007cc4 + 80007cb0: 450032ef jal x5,8000b100 + 80007cb4: 80007ca4 .word 0x80007ca4 + 80007cb8: 00000000 .word 0x00000000 + 80007cbc: 8001ecde .word 0x8001ecde + 80007cc0: 00000000 .word 0x00000000 + 80007cc4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x6161616161616161 + 80007cc8: 00013583 ld x11,0(x2) + 80007ccc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x6161616161616161 + 80007cd0: 00013e83 ld x29,0(x2) + 80007cd4: 00810113 addi x2,x2,8 + +0000000080007cd8 : +Zknd_aes64ds_cg_cp_sbox_b97: + aes64ds x1, x11, x29 # perform operation + 80007cd8: 3bd580b3 aes64ds x1,x11,x29 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b97, Zknd_aes64ds_cg_cp_sbox_b97_str) + 80007cdc: 0008b203 ld x4,0(x17) + 80007ce0: 00120c63 beq x4,x1,80007cf8 + 80007ce4: 41c032ef jal x5,8000b100 + 80007ce8: 80007cd8 .word 0x80007cd8 + 80007cec: 00000000 .word 0x00000000 + 80007cf0: 8001ed16 .word 0x8001ed16 + 80007cf4: 00000000 .word 0x00000000 + 80007cf8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x6262626262626262 + 80007cfc: 00013f83 ld x31,0(x2) + 80007d00: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0x6262626262626262 + 80007d04: 00013f03 ld x30,0(x2) + 80007d08: 00810113 addi x2,x2,8 + +0000000080007d0c : +Zknd_aes64ds_cg_cp_sbox_b98: + aes64ds x12, x31, x30 # perform operation + 80007d0c: 3bef8633 aes64ds x12,x31,x30 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b98, Zknd_aes64ds_cg_cp_sbox_b98_str) + 80007d10: 0008b203 ld x4,0(x17) + 80007d14: 00c20c63 beq x4,x12,80007d2c + 80007d18: 3e8032ef jal x5,8000b100 + 80007d1c: 80007d0c .word 0x80007d0c + 80007d20: 00000000 .word 0x00000000 + 80007d24: 8001ed4e .word 0x8001ed4e + 80007d28: 00000000 .word 0x00000000 + 80007d2c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x6363636363636363 + 80007d30: 00013f03 ld x30,0(x2) + 80007d34: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x6363636363636363 + 80007d38: 00013d83 ld x27,0(x2) + 80007d3c: 00810113 addi x2,x2,8 + +0000000080007d40 : +Zknd_aes64ds_cg_cp_sbox_b99: + aes64ds x24, x30, x27 # perform operation + 80007d40: 3bbf0c33 aes64ds x24,x30,x27 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b99, Zknd_aes64ds_cg_cp_sbox_b99_str) + 80007d44: 0008b203 ld x4,0(x17) + 80007d48: 01820c63 beq x4,x24,80007d60 + 80007d4c: 3b4032ef jal x5,8000b100 + 80007d50: 80007d40 .word 0x80007d40 + 80007d54: 00000000 .word 0x00000000 + 80007d58: 8001ed86 .word 0x8001ed86 + 80007d5c: 00000000 .word 0x00000000 + 80007d60: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x6464646464646464 + 80007d64: 00013483 ld x9,0(x2) + 80007d68: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x6464646464646464 + 80007d6c: 00013d03 ld x26,0(x2) + 80007d70: 00810113 addi x2,x2,8 + +0000000080007d74 : +Zknd_aes64ds_cg_cp_sbox_b100: + aes64ds x30, x9, x26 # perform operation + 80007d74: 3ba48f33 aes64ds x30,x9,x26 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b100, Zknd_aes64ds_cg_cp_sbox_b100_str) + 80007d78: 0008b203 ld x4,0(x17) + 80007d7c: 01e20c63 beq x4,x30,80007d94 + 80007d80: 380032ef jal x5,8000b100 + 80007d84: 80007d74 .word 0x80007d74 + 80007d88: 00000000 .word 0x00000000 + 80007d8c: 8001edbe .word 0x8001edbe + 80007d90: 00000000 .word 0x00000000 + 80007d94: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x6565656565656565 + 80007d98: 00013c83 ld x25,0(x2) + 80007d9c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x6565656565656565 + 80007da0: 00013a83 ld x21,0(x2) + 80007da4: 00810113 addi x2,x2,8 + +0000000080007da8 : +Zknd_aes64ds_cg_cp_sbox_b101: + aes64ds x12, x25, x21 # perform operation + 80007da8: 3b5c8633 aes64ds x12,x25,x21 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b101, Zknd_aes64ds_cg_cp_sbox_b101_str) + 80007dac: 0008b203 ld x4,0(x17) + 80007db0: 00c20c63 beq x4,x12,80007dc8 + 80007db4: 34c032ef jal x5,8000b100 + 80007db8: 80007da8 .word 0x80007da8 + 80007dbc: 00000000 .word 0x00000000 + 80007dc0: 8001edf7 .word 0x8001edf7 + 80007dc4: 00000000 .word 0x00000000 + 80007dc8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x6666666666666666 + 80007dcc: 00013303 ld x6,0(x2) + 80007dd0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x6666666666666666 + 80007dd4: 00013583 ld x11,0(x2) + 80007dd8: 00810113 addi x2,x2,8 + +0000000080007ddc : +Zknd_aes64ds_cg_cp_sbox_b102: + aes64ds x22, x6, x11 # perform operation + 80007ddc: 3ab30b33 aes64ds x22,x6,x11 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b102, Zknd_aes64ds_cg_cp_sbox_b102_str) + 80007de0: 0008b203 ld x4,0(x17) + 80007de4: 01620c63 beq x4,x22,80007dfc + 80007de8: 318032ef jal x5,8000b100 + 80007dec: 80007ddc .word 0x80007ddc + 80007df0: 00000000 .word 0x00000000 + 80007df4: 8001ee30 .word 0x8001ee30 + 80007df8: 00000000 .word 0x00000000 + 80007dfc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x6767676767676767 + 80007e00: 00013303 ld x6,0(x2) + 80007e04: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x6767676767676767 + 80007e08: 00013c83 ld x25,0(x2) + 80007e0c: 00810113 addi x2,x2,8 + +0000000080007e10 : +Zknd_aes64ds_cg_cp_sbox_b103: + aes64ds x8, x6, x25 # perform operation + 80007e10: 3b930433 aes64ds x8,x6,x25 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b103, Zknd_aes64ds_cg_cp_sbox_b103_str) + 80007e14: 0008b203 ld x4,0(x17) + 80007e18: 00820c63 beq x4,x8,80007e30 + 80007e1c: 2e4032ef jal x5,8000b100 + 80007e20: 80007e10 .word 0x80007e10 + 80007e24: 00000000 .word 0x00000000 + 80007e28: 8001ee69 .word 0x8001ee69 + 80007e2c: 00000000 .word 0x00000000 + 80007e30: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x6868686868686868 + 80007e34: 00013303 ld x6,0(x2) + 80007e38: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x6868686868686868 + 80007e3c: 00013b03 ld x22,0(x2) + 80007e40: 00810113 addi x2,x2,8 + +0000000080007e44 : +Zknd_aes64ds_cg_cp_sbox_b104: + aes64ds x30, x6, x22 # perform operation + 80007e44: 3b630f33 aes64ds x30,x6,x22 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b104, Zknd_aes64ds_cg_cp_sbox_b104_str) + 80007e48: 0008b203 ld x4,0(x17) + 80007e4c: 01e20c63 beq x4,x30,80007e64 + 80007e50: 2b0032ef jal x5,8000b100 + 80007e54: 80007e44 .word 0x80007e44 + 80007e58: 00000000 .word 0x00000000 + 80007e5c: 8001eea2 .word 0x8001eea2 + 80007e60: 00000000 .word 0x00000000 + 80007e64: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x6969696969696969 + 80007e68: 00013b03 ld x22,0(x2) + 80007e6c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x6969696969696969 + 80007e70: 00013e03 ld x28,0(x2) + 80007e74: 00810113 addi x2,x2,8 + +0000000080007e78 : +Zknd_aes64ds_cg_cp_sbox_b105: + aes64ds x9, x22, x28 # perform operation + 80007e78: 3bcb04b3 aes64ds x9,x22,x28 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b105, Zknd_aes64ds_cg_cp_sbox_b105_str) + 80007e7c: 0008b203 ld x4,0(x17) + 80007e80: 00920c63 beq x4,x9,80007e98 + 80007e84: 27c032ef jal x5,8000b100 + 80007e88: 80007e78 .word 0x80007e78 + 80007e8c: 00000000 .word 0x00000000 + 80007e90: 8001eedb .word 0x8001eedb + 80007e94: 00000000 .word 0x00000000 + 80007e98: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x6a6a6a6a6a6a6a6a + 80007e9c: 00013303 ld x6,0(x2) + 80007ea0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x6a6a6a6a6a6a6a6a + 80007ea4: 00013683 ld x13,0(x2) + 80007ea8: 00810113 addi x2,x2,8 + +0000000080007eac : +Zknd_aes64ds_cg_cp_sbox_b106: + aes64ds x3, x6, x13 # perform operation + 80007eac: 3ad301b3 aes64ds x3,x6,x13 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b106, Zknd_aes64ds_cg_cp_sbox_b106_str) + 80007eb0: 0008b203 ld x4,0(x17) + 80007eb4: 00320c63 beq x4,x3,80007ecc + 80007eb8: 248032ef jal x5,8000b100 + 80007ebc: 80007eac .word 0x80007eac + 80007ec0: 00000000 .word 0x00000000 + 80007ec4: 8001ef14 .word 0x8001ef14 + 80007ec8: 00000000 .word 0x00000000 + 80007ecc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x6b6b6b6b6b6b6b6b + 80007ed0: 00013783 ld x15,0(x2) + 80007ed4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x6b6b6b6b6b6b6b6b + 80007ed8: 00013d03 ld x26,0(x2) + 80007edc: 00810113 addi x2,x2,8 + +0000000080007ee0 : +Zknd_aes64ds_cg_cp_sbox_b107: + aes64ds x7, x15, x26 # perform operation + 80007ee0: 3ba783b3 aes64ds x7,x15,x26 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b107, Zknd_aes64ds_cg_cp_sbox_b107_str) + 80007ee4: 0008b203 ld x4,0(x17) + 80007ee8: 00720c63 beq x4,x7,80007f00 + 80007eec: 214032ef jal x5,8000b100 + 80007ef0: 80007ee0 .word 0x80007ee0 + 80007ef4: 00000000 .word 0x00000000 + 80007ef8: 8001ef4d .word 0x8001ef4d + 80007efc: 00000000 .word 0x00000000 + 80007f00: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x6c6c6c6c6c6c6c6c + 80007f04: 00013903 ld x18,0(x2) + 80007f08: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x6c6c6c6c6c6c6c6c + 80007f0c: 00013083 ld x1,0(x2) + 80007f10: 00810113 addi x2,x2,8 + +0000000080007f14 : +Zknd_aes64ds_cg_cp_sbox_b108: + aes64ds x21, x18, x1 # perform operation + 80007f14: 3a190ab3 aes64ds x21,x18,x1 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ds_cg_cp_sbox_b108, Zknd_aes64ds_cg_cp_sbox_b108_str) + 80007f18: 0008b203 ld x4,0(x17) + 80007f1c: 01520c63 beq x4,x21,80007f34 + 80007f20: 1e0032ef jal x5,8000b100 + 80007f24: 80007f14 .word 0x80007f14 + 80007f28: 00000000 .word 0x00000000 + 80007f2c: 8001ef86 .word 0x8001ef86 + 80007f30: 00000000 .word 0x00000000 + 80007f34: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x6d6d6d6d6d6d6d6d + 80007f38: 00013503 ld x10,0(x2) + 80007f3c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x6d6d6d6d6d6d6d6d + 80007f40: 00013983 ld x19,0(x2) + 80007f44: 00810113 addi x2,x2,8 + +0000000080007f48 : +Zknd_aes64ds_cg_cp_sbox_b109: + aes64ds x23, x10, x19 # perform operation + 80007f48: 3b350bb3 aes64ds x23,x10,x19 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b109, Zknd_aes64ds_cg_cp_sbox_b109_str) + 80007f4c: 0008b203 ld x4,0(x17) + 80007f50: 01720c63 beq x4,x23,80007f68 + 80007f54: 1ac032ef jal x5,8000b100 + 80007f58: 80007f48 .word 0x80007f48 + 80007f5c: 00000000 .word 0x00000000 + 80007f60: 8001efbf .word 0x8001efbf + 80007f64: 00000000 .word 0x00000000 + 80007f68: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x6e6e6e6e6e6e6e6e + 80007f6c: 00013403 ld x8,0(x2) + 80007f70: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x6e6e6e6e6e6e6e6e + 80007f74: 00013983 ld x19,0(x2) + 80007f78: 00810113 addi x2,x2,8 + +0000000080007f7c : +Zknd_aes64ds_cg_cp_sbox_b110: + aes64ds x14, x8, x19 # perform operation + 80007f7c: 3b340733 aes64ds x14,x8,x19 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b110, Zknd_aes64ds_cg_cp_sbox_b110_str) + 80007f80: 0008b203 ld x4,0(x17) + 80007f84: 00e20c63 beq x4,x14,80007f9c + 80007f88: 178032ef jal x5,8000b100 + 80007f8c: 80007f7c .word 0x80007f7c + 80007f90: 00000000 .word 0x00000000 + 80007f94: 8001eff8 .word 0x8001eff8 + 80007f98: 00000000 .word 0x00000000 + 80007f9c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x6f6f6f6f6f6f6f6f + 80007fa0: 00013d83 ld x27,0(x2) + 80007fa4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x6f6f6f6f6f6f6f6f + 80007fa8: 00013a83 ld x21,0(x2) + 80007fac: 00810113 addi x2,x2,8 + +0000000080007fb0 : +Zknd_aes64ds_cg_cp_sbox_b111: + aes64ds x12, x27, x21 # perform operation + 80007fb0: 3b5d8633 aes64ds x12,x27,x21 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b111, Zknd_aes64ds_cg_cp_sbox_b111_str) + 80007fb4: 0008b203 ld x4,0(x17) + 80007fb8: 00c20c63 beq x4,x12,80007fd0 + 80007fbc: 144032ef jal x5,8000b100 + 80007fc0: 80007fb0 .word 0x80007fb0 + 80007fc4: 00000000 .word 0x00000000 + 80007fc8: 8001f031 .word 0x8001f031 + 80007fcc: 00000000 .word 0x00000000 + 80007fd0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x7070707070707070 + 80007fd4: 00013a83 ld x21,0(x2) + 80007fd8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x7070707070707070 + 80007fdc: 00013c83 ld x25,0(x2) + 80007fe0: 00810113 addi x2,x2,8 + +0000000080007fe4 : +Zknd_aes64ds_cg_cp_sbox_b112: + aes64ds x29, x21, x25 # perform operation + 80007fe4: 3b9a8eb3 aes64ds x29,x21,x25 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b112, Zknd_aes64ds_cg_cp_sbox_b112_str) + 80007fe8: 0008b203 ld x4,0(x17) + 80007fec: 01d20c63 beq x4,x29,80008004 + 80007ff0: 110032ef jal x5,8000b100 + 80007ff4: 80007fe4 .word 0x80007fe4 + 80007ff8: 00000000 .word 0x00000000 + 80007ffc: 8001f06a .word 0x8001f06a + 80008000: 00000000 .word 0x00000000 + 80008004: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x7171717171717171 + 80008008: 00013b03 ld x22,0(x2) + 8000800c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0x7171717171717171 + 80008010: 00013083 ld x1,0(x2) + 80008014: 00810113 addi x2,x2,8 + +0000000080008018 : +Zknd_aes64ds_cg_cp_sbox_b113: + aes64ds x8, x22, x1 # perform operation + 80008018: 3a1b0433 aes64ds x8,x22,x1 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b113, Zknd_aes64ds_cg_cp_sbox_b113_str) + 8000801c: 0008b203 ld x4,0(x17) + 80008020: 00820c63 beq x4,x8,80008038 + 80008024: 0dc032ef jal x5,8000b100 + 80008028: 80008018 .word 0x80008018 + 8000802c: 00000000 .word 0x00000000 + 80008030: 8001f0a3 .word 0x8001f0a3 + 80008034: 00000000 .word 0x00000000 + 80008038: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x7272727272727272 + 8000803c: 00013a83 ld x21,0(x2) + 80008040: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0x7272727272727272 + 80008044: 00013d83 ld x27,0(x2) + 80008048: 00810113 addi x2,x2,8 + +000000008000804c : +Zknd_aes64ds_cg_cp_sbox_b114: + aes64ds x9, x21, x27 # perform operation + 8000804c: 3bba84b3 aes64ds x9,x21,x27 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b114, Zknd_aes64ds_cg_cp_sbox_b114_str) + 80008050: 0008b203 ld x4,0(x17) + 80008054: 00920c63 beq x4,x9,8000806c + 80008058: 0a8032ef jal x5,8000b100 + 8000805c: 8000804c .word 0x8000804c + 80008060: 00000000 .word 0x00000000 + 80008064: 8001f0dc .word 0x8001f0dc + 80008068: 00000000 .word 0x00000000 + 8000806c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x7373737373737373 + 80008070: 00013603 ld x12,0(x2) + 80008074: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x7373737373737373 + 80008078: 00013c03 ld x24,0(x2) + 8000807c: 00810113 addi x2,x2,8 + +0000000080008080 : +Zknd_aes64ds_cg_cp_sbox_b115: + aes64ds x7, x12, x24 # perform operation + 80008080: 3b8603b3 aes64ds x7,x12,x24 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b115, Zknd_aes64ds_cg_cp_sbox_b115_str) + 80008084: 0008b203 ld x4,0(x17) + 80008088: 00720c63 beq x4,x7,800080a0 + 8000808c: 074032ef jal x5,8000b100 + 80008090: 80008080 .word 0x80008080 + 80008094: 00000000 .word 0x00000000 + 80008098: 8001f115 .word 0x8001f115 + 8000809c: 00000000 .word 0x00000000 + 800080a0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x7474747474747474 + 800080a4: 00013603 ld x12,0(x2) + 800080a8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x7474747474747474 + 800080ac: 00013803 ld x16,0(x2) + 800080b0: 00810113 addi x2,x2,8 + +00000000800080b4 : +Zknd_aes64ds_cg_cp_sbox_b116: + aes64ds x21, x12, x16 # perform operation + 800080b4: 3b060ab3 aes64ds x21,x12,x16 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ds_cg_cp_sbox_b116, Zknd_aes64ds_cg_cp_sbox_b116_str) + 800080b8: 0008b203 ld x4,0(x17) + 800080bc: 01520c63 beq x4,x21,800080d4 + 800080c0: 040032ef jal x5,8000b100 + 800080c4: 800080b4 .word 0x800080b4 + 800080c8: 00000000 .word 0x00000000 + 800080cc: 8001f14e .word 0x8001f14e + 800080d0: 00000000 .word 0x00000000 + 800080d4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x7575757575757575 + 800080d8: 00013503 ld x10,0(x2) + 800080dc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x7575757575757575 + 800080e0: 00013b83 ld x23,0(x2) + 800080e4: 00810113 addi x2,x2,8 + +00000000800080e8 : +Zknd_aes64ds_cg_cp_sbox_b117: + aes64ds x8, x10, x23 # perform operation + 800080e8: 3b750433 aes64ds x8,x10,x23 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b117, Zknd_aes64ds_cg_cp_sbox_b117_str) + 800080ec: 0008b203 ld x4,0(x17) + 800080f0: 00820c63 beq x4,x8,80008108 + 800080f4: 00c032ef jal x5,8000b100 + 800080f8: 800080e8 .word 0x800080e8 + 800080fc: 00000000 .word 0x00000000 + 80008100: 8001f187 .word 0x8001f187 + 80008104: 00000000 .word 0x00000000 + 80008108: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x7676767676767676 + 8000810c: 00013903 ld x18,0(x2) + 80008110: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0x7676767676767676 + 80008114: 00013b03 ld x22,0(x2) + 80008118: 00810113 addi x2,x2,8 + +000000008000811c : +Zknd_aes64ds_cg_cp_sbox_b118: + aes64ds x30, x18, x22 # perform operation + 8000811c: 3b690f33 aes64ds x30,x18,x22 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b118, Zknd_aes64ds_cg_cp_sbox_b118_str) + 80008120: 0008b203 ld x4,0(x17) + 80008124: 01e20c63 beq x4,x30,8000813c + 80008128: 7d9022ef jal x5,8000b100 + 8000812c: 8000811c .word 0x8000811c + 80008130: 00000000 .word 0x00000000 + 80008134: 8001f1c0 .word 0x8001f1c0 + 80008138: 00000000 .word 0x00000000 + 8000813c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x7777777777777777 + 80008140: 00013983 ld x19,0(x2) + 80008144: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0x7777777777777777 + 80008148: 00013483 ld x9,0(x2) + 8000814c: 00810113 addi x2,x2,8 + +0000000080008150 : +Zknd_aes64ds_cg_cp_sbox_b119: + aes64ds x18, x19, x9 # perform operation + 80008150: 3a998933 aes64ds x18,x19,x9 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b119, Zknd_aes64ds_cg_cp_sbox_b119_str) + 80008154: 0008b203 ld x4,0(x17) + 80008158: 01220c63 beq x4,x18,80008170 + 8000815c: 7a5022ef jal x5,8000b100 + 80008160: 80008150 .word 0x80008150 + 80008164: 00000000 .word 0x00000000 + 80008168: 8001f1f9 .word 0x8001f1f9 + 8000816c: 00000000 .word 0x00000000 + 80008170: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7878787878787878 + 80008174: 00013583 ld x11,0(x2) + 80008178: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x7878787878787878 + 8000817c: 00013503 ld x10,0(x2) + 80008180: 00810113 addi x2,x2,8 + +0000000080008184 : +Zknd_aes64ds_cg_cp_sbox_b120: + aes64ds x26, x11, x10 # perform operation + 80008184: 3aa58d33 aes64ds x26,x11,x10 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b120, Zknd_aes64ds_cg_cp_sbox_b120_str) + 80008188: 0008b203 ld x4,0(x17) + 8000818c: 01a20c63 beq x4,x26,800081a4 + 80008190: 771022ef jal x5,8000b100 + 80008194: 80008184 .word 0x80008184 + 80008198: 00000000 .word 0x00000000 + 8000819c: 8001f232 .word 0x8001f232 + 800081a0: 00000000 .word 0x00000000 + 800081a4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x7979797979797979 + 800081a8: 00013683 ld x13,0(x2) + 800081ac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x7979797979797979 + 800081b0: 00013e83 ld x29,0(x2) + 800081b4: 00810113 addi x2,x2,8 + +00000000800081b8 : +Zknd_aes64ds_cg_cp_sbox_b121: + aes64ds x1, x13, x29 # perform operation + 800081b8: 3bd680b3 aes64ds x1,x13,x29 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b121, Zknd_aes64ds_cg_cp_sbox_b121_str) + 800081bc: 0008b203 ld x4,0(x17) + 800081c0: 00120c63 beq x4,x1,800081d8 + 800081c4: 73d022ef jal x5,8000b100 + 800081c8: 800081b8 .word 0x800081b8 + 800081cc: 00000000 .word 0x00000000 + 800081d0: 8001f26b .word 0x8001f26b + 800081d4: 00000000 .word 0x00000000 + 800081d8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x7a7a7a7a7a7a7a7a + 800081dc: 00013d83 ld x27,0(x2) + 800081e0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x7a7a7a7a7a7a7a7a + 800081e4: 00013603 ld x12,0(x2) + 800081e8: 00810113 addi x2,x2,8 + +00000000800081ec : +Zknd_aes64ds_cg_cp_sbox_b122: + aes64ds x18, x27, x12 # perform operation + 800081ec: 3acd8933 aes64ds x18,x27,x12 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b122, Zknd_aes64ds_cg_cp_sbox_b122_str) + 800081f0: 0008b203 ld x4,0(x17) + 800081f4: 01220c63 beq x4,x18,8000820c + 800081f8: 709022ef jal x5,8000b100 + 800081fc: 800081ec .word 0x800081ec + 80008200: 00000000 .word 0x00000000 + 80008204: 8001f2a4 .word 0x8001f2a4 + 80008208: 00000000 .word 0x00000000 + 8000820c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x7b7b7b7b7b7b7b7b + 80008210: 00013183 ld x3,0(x2) + 80008214: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x7b7b7b7b7b7b7b7b + 80008218: 00013d03 ld x26,0(x2) + 8000821c: 00810113 addi x2,x2,8 + +0000000080008220 : +Zknd_aes64ds_cg_cp_sbox_b123: + aes64ds x13, x3, x26 # perform operation + 80008220: 3ba186b3 aes64ds x13,x3,x26 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b123, Zknd_aes64ds_cg_cp_sbox_b123_str) + 80008224: 0008b203 ld x4,0(x17) + 80008228: 00d20c63 beq x4,x13,80008240 + 8000822c: 6d5022ef jal x5,8000b100 + 80008230: 80008220 .word 0x80008220 + 80008234: 00000000 .word 0x00000000 + 80008238: 8001f2dd .word 0x8001f2dd + 8000823c: 00000000 .word 0x00000000 + 80008240: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x7c7c7c7c7c7c7c7c + 80008244: 00013e03 ld x28,0(x2) + 80008248: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x7c7c7c7c7c7c7c7c + 8000824c: 00013683 ld x13,0(x2) + 80008250: 00810113 addi x2,x2,8 + +0000000080008254 : +Zknd_aes64ds_cg_cp_sbox_b124: + aes64ds x3, x28, x13 # perform operation + 80008254: 3ade01b3 aes64ds x3,x28,x13 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b124, Zknd_aes64ds_cg_cp_sbox_b124_str) + 80008258: 0008b203 ld x4,0(x17) + 8000825c: 00320c63 beq x4,x3,80008274 + 80008260: 6a1022ef jal x5,8000b100 + 80008264: 80008254 .word 0x80008254 + 80008268: 00000000 .word 0x00000000 + 8000826c: 8001f316 .word 0x8001f316 + 80008270: 00000000 .word 0x00000000 + 80008274: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x7d7d7d7d7d7d7d7d + 80008278: 00013d03 ld x26,0(x2) + 8000827c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x7d7d7d7d7d7d7d7d + 80008280: 00013183 ld x3,0(x2) + 80008284: 00810113 addi x2,x2,8 + +0000000080008288 : +Zknd_aes64ds_cg_cp_sbox_b125: + aes64ds x1, x26, x3 # perform operation + 80008288: 3a3d00b3 aes64ds x1,x26,x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b125, Zknd_aes64ds_cg_cp_sbox_b125_str) + 8000828c: 0008b203 ld x4,0(x17) + 80008290: 00120c63 beq x4,x1,800082a8 + 80008294: 66d022ef jal x5,8000b100 + 80008298: 80008288 .word 0x80008288 + 8000829c: 00000000 .word 0x00000000 + 800082a0: 8001f34f .word 0x8001f34f + 800082a4: 00000000 .word 0x00000000 + 800082a8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7e7e7e7e7e7e7e7e + 800082ac: 00013583 ld x11,0(x2) + 800082b0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0x7e7e7e7e7e7e7e7e + 800082b4: 00013b83 ld x23,0(x2) + 800082b8: 00810113 addi x2,x2,8 + +00000000800082bc : +Zknd_aes64ds_cg_cp_sbox_b126: + aes64ds x10, x11, x23 # perform operation + 800082bc: 3b758533 aes64ds x10,x11,x23 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b126, Zknd_aes64ds_cg_cp_sbox_b126_str) + 800082c0: 0008b203 ld x4,0(x17) + 800082c4: 00a20c63 beq x4,x10,800082dc + 800082c8: 639022ef jal x5,8000b100 + 800082cc: 800082bc .word 0x800082bc + 800082d0: 00000000 .word 0x00000000 + 800082d4: 8001f388 .word 0x8001f388 + 800082d8: 00000000 .word 0x00000000 + 800082dc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x7f7f7f7f7f7f7f7f + 800082e0: 00013a83 ld x21,0(x2) + 800082e4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x7f7f7f7f7f7f7f7f + 800082e8: 00013583 ld x11,0(x2) + 800082ec: 00810113 addi x2,x2,8 + +00000000800082f0 : +Zknd_aes64ds_cg_cp_sbox_b127: + aes64ds x9, x21, x11 # perform operation + 800082f0: 3aba84b3 aes64ds x9,x21,x11 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b127, Zknd_aes64ds_cg_cp_sbox_b127_str) + 800082f4: 0008b203 ld x4,0(x17) + 800082f8: 00920c63 beq x4,x9,80008310 + 800082fc: 605022ef jal x5,8000b100 + 80008300: 800082f0 .word 0x800082f0 + 80008304: 00000000 .word 0x00000000 + 80008308: 8001f3c1 .word 0x8001f3c1 + 8000830c: 00000000 .word 0x00000000 + 80008310: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x8080808080808080 + 80008314: 00013183 ld x3,0(x2) + 80008318: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0x8080808080808080 + 8000831c: 00013683 ld x13,0(x2) + 80008320: 00810113 addi x2,x2,8 + +0000000080008324 : +Zknd_aes64ds_cg_cp_sbox_b128: + aes64ds x12, x3, x13 # perform operation + 80008324: 3ad18633 aes64ds x12,x3,x13 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b128, Zknd_aes64ds_cg_cp_sbox_b128_str) + 80008328: 0008b203 ld x4,0(x17) + 8000832c: 00c20c63 beq x4,x12,80008344 + 80008330: 5d1022ef jal x5,8000b100 + 80008334: 80008324 .word 0x80008324 + 80008338: 00000000 .word 0x00000000 + 8000833c: 8001f3fa .word 0x8001f3fa + 80008340: 00000000 .word 0x00000000 + 80008344: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x8181818181818181 + 80008348: 00013e03 ld x28,0(x2) + 8000834c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x8181818181818181 + 80008350: 00013603 ld x12,0(x2) + 80008354: 00810113 addi x2,x2,8 + +0000000080008358 : +Zknd_aes64ds_cg_cp_sbox_b129: + aes64ds x24, x28, x12 # perform operation + 80008358: 3ace0c33 aes64ds x24,x28,x12 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b129, Zknd_aes64ds_cg_cp_sbox_b129_str) + 8000835c: 0008b203 ld x4,0(x17) + 80008360: 01820c63 beq x4,x24,80008378 + 80008364: 59d022ef jal x5,8000b100 + 80008368: 80008358 .word 0x80008358 + 8000836c: 00000000 .word 0x00000000 + 80008370: 8001f433 .word 0x8001f433 + 80008374: 00000000 .word 0x00000000 + 80008378: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8282828282828282 + 8000837c: 00013783 ld x15,0(x2) + 80008380: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0x8282828282828282 + 80008384: 00013e03 ld x28,0(x2) + 80008388: 00810113 addi x2,x2,8 + +000000008000838c : +Zknd_aes64ds_cg_cp_sbox_b130: + aes64ds x18, x15, x28 # perform operation + 8000838c: 3bc78933 aes64ds x18,x15,x28 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b130, Zknd_aes64ds_cg_cp_sbox_b130_str) + 80008390: 0008b203 ld x4,0(x17) + 80008394: 01220c63 beq x4,x18,800083ac + 80008398: 569022ef jal x5,8000b100 + 8000839c: 8000838c .word 0x8000838c + 800083a0: 00000000 .word 0x00000000 + 800083a4: 8001f46c .word 0x8001f46c + 800083a8: 00000000 .word 0x00000000 + 800083ac: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x8383838383838383 + 800083b0: 00013083 ld x1,0(x2) + 800083b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x8383838383838383 + 800083b8: 00013803 ld x16,0(x2) + 800083bc: 00810113 addi x2,x2,8 + +00000000800083c0 : +Zknd_aes64ds_cg_cp_sbox_b131: + aes64ds x27, x1, x16 # perform operation + 800083c0: 3b008db3 aes64ds x27,x1,x16 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b131, Zknd_aes64ds_cg_cp_sbox_b131_str) + 800083c4: 0008b203 ld x4,0(x17) + 800083c8: 01b20c63 beq x4,x27,800083e0 + 800083cc: 535022ef jal x5,8000b100 + 800083d0: 800083c0 .word 0x800083c0 + 800083d4: 00000000 .word 0x00000000 + 800083d8: 8001f4a5 .word 0x8001f4a5 + 800083dc: 00000000 .word 0x00000000 + 800083e0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x8484848484848484 + 800083e4: 00013183 ld x3,0(x2) + 800083e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x8484848484848484 + 800083ec: 00013603 ld x12,0(x2) + 800083f0: 00810113 addi x2,x2,8 + +00000000800083f4 : +Zknd_aes64ds_cg_cp_sbox_b132: + aes64ds x14, x3, x12 # perform operation + 800083f4: 3ac18733 aes64ds x14,x3,x12 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b132, Zknd_aes64ds_cg_cp_sbox_b132_str) + 800083f8: 0008b203 ld x4,0(x17) + 800083fc: 00e20c63 beq x4,x14,80008414 + 80008400: 501022ef jal x5,8000b100 + 80008404: 800083f4 .word 0x800083f4 + 80008408: 00000000 .word 0x00000000 + 8000840c: 8001f4de .word 0x8001f4de + 80008410: 00000000 .word 0x00000000 + 80008414: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0x8585858585858585 + 80008418: 00013903 ld x18,0(x2) + 8000841c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0x8585858585858585 + 80008420: 00013503 ld x10,0(x2) + 80008424: 00810113 addi x2,x2,8 + +0000000080008428 : +Zknd_aes64ds_cg_cp_sbox_b133: + aes64ds x30, x18, x10 # perform operation + 80008428: 3aa90f33 aes64ds x30,x18,x10 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b133, Zknd_aes64ds_cg_cp_sbox_b133_str) + 8000842c: 0008b203 ld x4,0(x17) + 80008430: 01e20c63 beq x4,x30,80008448 + 80008434: 4cd022ef jal x5,8000b100 + 80008438: 80008428 .word 0x80008428 + 8000843c: 00000000 .word 0x00000000 + 80008440: 8001f517 .word 0x8001f517 + 80008444: 00000000 .word 0x00000000 + 80008448: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x8686868686868686 + 8000844c: 00013b03 ld x22,0(x2) + 80008450: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x8686868686868686 + 80008454: 00013a03 ld x20,0(x2) + 80008458: 00810113 addi x2,x2,8 + +000000008000845c : +Zknd_aes64ds_cg_cp_sbox_b134: + aes64ds x1, x22, x20 # perform operation + 8000845c: 3b4b00b3 aes64ds x1,x22,x20 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b134, Zknd_aes64ds_cg_cp_sbox_b134_str) + 80008460: 0008b203 ld x4,0(x17) + 80008464: 00120c63 beq x4,x1,8000847c + 80008468: 499022ef jal x5,8000b100 + 8000846c: 8000845c .word 0x8000845c + 80008470: 00000000 .word 0x00000000 + 80008474: 8001f550 .word 0x8001f550 + 80008478: 00000000 .word 0x00000000 + 8000847c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x8787878787878787 + 80008480: 00013583 ld x11,0(x2) + 80008484: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x8787878787878787 + 80008488: 00013c03 ld x24,0(x2) + 8000848c: 00810113 addi x2,x2,8 + +0000000080008490 : +Zknd_aes64ds_cg_cp_sbox_b135: + aes64ds x26, x11, x24 # perform operation + 80008490: 3b858d33 aes64ds x26,x11,x24 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b135, Zknd_aes64ds_cg_cp_sbox_b135_str) + 80008494: 0008b203 ld x4,0(x17) + 80008498: 01a20c63 beq x4,x26,800084b0 + 8000849c: 465022ef jal x5,8000b100 + 800084a0: 80008490 .word 0x80008490 + 800084a4: 00000000 .word 0x00000000 + 800084a8: 8001f589 .word 0x8001f589 + 800084ac: 00000000 .word 0x00000000 + 800084b0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0x8888888888888888 + 800084b4: 00013a03 ld x20,0(x2) + 800084b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0x8888888888888888 + 800084bc: 00013383 ld x7,0(x2) + 800084c0: 00810113 addi x2,x2,8 + +00000000800084c4 : +Zknd_aes64ds_cg_cp_sbox_b136: + aes64ds x12, x20, x7 # perform operation + 800084c4: 3a7a0633 aes64ds x12,x20,x7 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b136, Zknd_aes64ds_cg_cp_sbox_b136_str) + 800084c8: 0008b203 ld x4,0(x17) + 800084cc: 00c20c63 beq x4,x12,800084e4 + 800084d0: 431022ef jal x5,8000b100 + 800084d4: 800084c4 .word 0x800084c4 + 800084d8: 00000000 .word 0x00000000 + 800084dc: 8001f5c2 .word 0x8001f5c2 + 800084e0: 00000000 .word 0x00000000 + 800084e4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x8989898989898989 + 800084e8: 00013703 ld x14,0(x2) + 800084ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0x8989898989898989 + 800084f0: 00013a83 ld x21,0(x2) + 800084f4: 00810113 addi x2,x2,8 + +00000000800084f8 : +Zknd_aes64ds_cg_cp_sbox_b137: + aes64ds x16, x14, x21 # perform operation + 800084f8: 3b570833 aes64ds x16,x14,x21 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cp_sbox_b137, Zknd_aes64ds_cg_cp_sbox_b137_str) + 800084fc: 0008b203 ld x4,0(x17) + 80008500: 01020c63 beq x4,x16,80008518 + 80008504: 3fd022ef jal x5,8000b100 + 80008508: 800084f8 .word 0x800084f8 + 8000850c: 00000000 .word 0x00000000 + 80008510: 8001f5fb .word 0x8001f5fb + 80008514: 00000000 .word 0x00000000 + 80008518: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x8a8a8a8a8a8a8a8a + 8000851c: 00013483 ld x9,0(x2) + 80008520: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x8a8a8a8a8a8a8a8a + 80008524: 00013603 ld x12,0(x2) + 80008528: 00810113 addi x2,x2,8 + +000000008000852c : +Zknd_aes64ds_cg_cp_sbox_b138: + aes64ds x3, x9, x12 # perform operation + 8000852c: 3ac481b3 aes64ds x3,x9,x12 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b138, Zknd_aes64ds_cg_cp_sbox_b138_str) + 80008530: 0008b203 ld x4,0(x17) + 80008534: 00320c63 beq x4,x3,8000854c + 80008538: 3c9022ef jal x5,8000b100 + 8000853c: 8000852c .word 0x8000852c + 80008540: 00000000 .word 0x00000000 + 80008544: 8001f634 .word 0x8001f634 + 80008548: 00000000 .word 0x00000000 + 8000854c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x8b8b8b8b8b8b8b8b + 80008550: 00013c03 ld x24,0(x2) + 80008554: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x8b8b8b8b8b8b8b8b + 80008558: 00013e83 ld x29,0(x2) + 8000855c: 00810113 addi x2,x2,8 + +0000000080008560 : +Zknd_aes64ds_cg_cp_sbox_b139: + aes64ds x25, x24, x29 # perform operation + 80008560: 3bdc0cb3 aes64ds x25,x24,x29 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b139, Zknd_aes64ds_cg_cp_sbox_b139_str) + 80008564: 0008b203 ld x4,0(x17) + 80008568: 01920c63 beq x4,x25,80008580 + 8000856c: 395022ef jal x5,8000b100 + 80008570: 80008560 .word 0x80008560 + 80008574: 00000000 .word 0x00000000 + 80008578: 8001f66d .word 0x8001f66d + 8000857c: 00000000 .word 0x00000000 + 80008580: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x8c8c8c8c8c8c8c8c + 80008584: 00013383 ld x7,0(x2) + 80008588: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x8c8c8c8c8c8c8c8c + 8000858c: 00013603 ld x12,0(x2) + 80008590: 00810113 addi x2,x2,8 + +0000000080008594 : +Zknd_aes64ds_cg_cp_sbox_b140: + aes64ds x13, x7, x12 # perform operation + 80008594: 3ac386b3 aes64ds x13,x7,x12 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b140, Zknd_aes64ds_cg_cp_sbox_b140_str) + 80008598: 0008b203 ld x4,0(x17) + 8000859c: 00d20c63 beq x4,x13,800085b4 + 800085a0: 361022ef jal x5,8000b100 + 800085a4: 80008594 .word 0x80008594 + 800085a8: 00000000 .word 0x00000000 + 800085ac: 8001f6a6 .word 0x8001f6a6 + 800085b0: 00000000 .word 0x00000000 + 800085b4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x8d8d8d8d8d8d8d8d + 800085b8: 00013383 ld x7,0(x2) + 800085bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0x8d8d8d8d8d8d8d8d + 800085c0: 00013703 ld x14,0(x2) + 800085c4: 00810113 addi x2,x2,8 + +00000000800085c8 : +Zknd_aes64ds_cg_cp_sbox_b141: + aes64ds x8, x7, x14 # perform operation + 800085c8: 3ae38433 aes64ds x8,x7,x14 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b141, Zknd_aes64ds_cg_cp_sbox_b141_str) + 800085cc: 0008b203 ld x4,0(x17) + 800085d0: 00820c63 beq x4,x8,800085e8 + 800085d4: 32d022ef jal x5,8000b100 + 800085d8: 800085c8 .word 0x800085c8 + 800085dc: 00000000 .word 0x00000000 + 800085e0: 8001f6df .word 0x8001f6df + 800085e4: 00000000 .word 0x00000000 + 800085e8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x8e8e8e8e8e8e8e8e + 800085ec: 00013983 ld x19,0(x2) + 800085f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x8e8e8e8e8e8e8e8e + 800085f4: 00013803 ld x16,0(x2) + 800085f8: 00810113 addi x2,x2,8 + +00000000800085fc : +Zknd_aes64ds_cg_cp_sbox_b142: + aes64ds x20, x19, x16 # perform operation + 800085fc: 3b098a33 aes64ds x20,x19,x16 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b142, Zknd_aes64ds_cg_cp_sbox_b142_str) + 80008600: 0008b203 ld x4,0(x17) + 80008604: 01420c63 beq x4,x20,8000861c + 80008608: 2f9022ef jal x5,8000b100 + 8000860c: 800085fc .word 0x800085fc + 80008610: 00000000 .word 0x00000000 + 80008614: 8001f718 .word 0x8001f718 + 80008618: 00000000 .word 0x00000000 + 8000861c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x8f8f8f8f8f8f8f8f + 80008620: 00013183 ld x3,0(x2) + 80008624: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0x8f8f8f8f8f8f8f8f + 80008628: 00013c03 ld x24,0(x2) + 8000862c: 00810113 addi x2,x2,8 + +0000000080008630 : +Zknd_aes64ds_cg_cp_sbox_b143: + aes64ds x22, x3, x24 # perform operation + 80008630: 3b818b33 aes64ds x22,x3,x24 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b143, Zknd_aes64ds_cg_cp_sbox_b143_str) + 80008634: 0008b203 ld x4,0(x17) + 80008638: 01620c63 beq x4,x22,80008650 + 8000863c: 2c5022ef jal x5,8000b100 + 80008640: 80008630 .word 0x80008630 + 80008644: 00000000 .word 0x00000000 + 80008648: 8001f751 .word 0x8001f751 + 8000864c: 00000000 .word 0x00000000 + 80008650: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x9090909090909090 + 80008654: 00013803 ld x16,0(x2) + 80008658: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0x9090909090909090 + 8000865c: 00013603 ld x12,0(x2) + 80008660: 00810113 addi x2,x2,8 + +0000000080008664 : +Zknd_aes64ds_cg_cp_sbox_b144: + aes64ds x1, x16, x12 # perform operation + 80008664: 3ac800b3 aes64ds x1,x16,x12 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b144, Zknd_aes64ds_cg_cp_sbox_b144_str) + 80008668: 0008b203 ld x4,0(x17) + 8000866c: 00120c63 beq x4,x1,80008684 + 80008670: 291022ef jal x5,8000b100 + 80008674: 80008664 .word 0x80008664 + 80008678: 00000000 .word 0x00000000 + 8000867c: 8001f78a .word 0x8001f78a + 80008680: 00000000 .word 0x00000000 + 80008684: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x9191919191919191 + 80008688: 00013083 ld x1,0(x2) + 8000868c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x9191919191919191 + 80008690: 00013803 ld x16,0(x2) + 80008694: 00810113 addi x2,x2,8 + +0000000080008698 : +Zknd_aes64ds_cg_cp_sbox_b145: + aes64ds x23, x1, x16 # perform operation + 80008698: 3b008bb3 aes64ds x23,x1,x16 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b145, Zknd_aes64ds_cg_cp_sbox_b145_str) + 8000869c: 0008b203 ld x4,0(x17) + 800086a0: 01720c63 beq x4,x23,800086b8 + 800086a4: 25d022ef jal x5,8000b100 + 800086a8: 80008698 .word 0x80008698 + 800086ac: 00000000 .word 0x00000000 + 800086b0: 8001f7c3 .word 0x8001f7c3 + 800086b4: 00000000 .word 0x00000000 + 800086b8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x9292929292929292 + 800086bc: 00013583 ld x11,0(x2) + 800086c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x9292929292929292 + 800086c4: 00013e83 ld x29,0(x2) + 800086c8: 00810113 addi x2,x2,8 + +00000000800086cc : +Zknd_aes64ds_cg_cp_sbox_b146: + aes64ds x14, x11, x29 # perform operation + 800086cc: 3bd58733 aes64ds x14,x11,x29 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b146, Zknd_aes64ds_cg_cp_sbox_b146_str) + 800086d0: 0008b203 ld x4,0(x17) + 800086d4: 00e20c63 beq x4,x14,800086ec + 800086d8: 229022ef jal x5,8000b100 + 800086dc: 800086cc .word 0x800086cc + 800086e0: 00000000 .word 0x00000000 + 800086e4: 8001f7fc .word 0x8001f7fc + 800086e8: 00000000 .word 0x00000000 + 800086ec: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x9393939393939393 + 800086f0: 00013603 ld x12,0(x2) + 800086f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs2: x11 = 0x9393939393939393 + 800086f8: 00013583 ld x11,0(x2) + 800086fc: 00810113 addi x2,x2,8 + +0000000080008700 : +Zknd_aes64ds_cg_cp_sbox_b147: + aes64ds x22, x12, x11 # perform operation + 80008700: 3ab60b33 aes64ds x22,x12,x11 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b147, Zknd_aes64ds_cg_cp_sbox_b147_str) + 80008704: 0008b203 ld x4,0(x17) + 80008708: 01620c63 beq x4,x22,80008720 + 8000870c: 1f5022ef jal x5,8000b100 + 80008710: 80008700 .word 0x80008700 + 80008714: 00000000 .word 0x00000000 + 80008718: 8001f835 .word 0x8001f835 + 8000871c: 00000000 .word 0x00000000 + 80008720: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x9494949494949494 + 80008724: 00013983 ld x19,0(x2) + 80008728: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x9494949494949494 + 8000872c: 00013803 ld x16,0(x2) + 80008730: 00810113 addi x2,x2,8 + +0000000080008734 : +Zknd_aes64ds_cg_cp_sbox_b148: + aes64ds x12, x19, x16 # perform operation + 80008734: 3b098633 aes64ds x12,x19,x16 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b148, Zknd_aes64ds_cg_cp_sbox_b148_str) + 80008738: 0008b203 ld x4,0(x17) + 8000873c: 00c20c63 beq x4,x12,80008754 + 80008740: 1c1022ef jal x5,8000b100 + 80008744: 80008734 .word 0x80008734 + 80008748: 00000000 .word 0x00000000 + 8000874c: 8001f86e .word 0x8001f86e + 80008750: 00000000 .word 0x00000000 + 80008754: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x9595959595959595 + 80008758: 00013a83 ld x21,0(x2) + 8000875c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0x9595959595959595 + 80008760: 00013c83 ld x25,0(x2) + 80008764: 00810113 addi x2,x2,8 + +0000000080008768 : +Zknd_aes64ds_cg_cp_sbox_b149: + aes64ds x24, x21, x25 # perform operation + 80008768: 3b9a8c33 aes64ds x24,x21,x25 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b149, Zknd_aes64ds_cg_cp_sbox_b149_str) + 8000876c: 0008b203 ld x4,0(x17) + 80008770: 01820c63 beq x4,x24,80008788 + 80008774: 18d022ef jal x5,8000b100 + 80008778: 80008768 .word 0x80008768 + 8000877c: 00000000 .word 0x00000000 + 80008780: 8001f8a7 .word 0x8001f8a7 + 80008784: 00000000 .word 0x00000000 + 80008788: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x9696969696969696 + 8000878c: 00013383 ld x7,0(x2) + 80008790: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x9696969696969696 + 80008794: 00013d03 ld x26,0(x2) + 80008798: 00810113 addi x2,x2,8 + +000000008000879c : +Zknd_aes64ds_cg_cp_sbox_b150: + aes64ds x3, x7, x26 # perform operation + 8000879c: 3ba381b3 aes64ds x3,x7,x26 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b150, Zknd_aes64ds_cg_cp_sbox_b150_str) + 800087a0: 0008b203 ld x4,0(x17) + 800087a4: 00320c63 beq x4,x3,800087bc + 800087a8: 159022ef jal x5,8000b100 + 800087ac: 8000879c .word 0x8000879c + 800087b0: 00000000 .word 0x00000000 + 800087b4: 8001f8e0 .word 0x8001f8e0 + 800087b8: 00000000 .word 0x00000000 + 800087bc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x9797979797979797 + 800087c0: 00013303 ld x6,0(x2) + 800087c4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0x9797979797979797 + 800087c8: 00013e83 ld x29,0(x2) + 800087cc: 00810113 addi x2,x2,8 + +00000000800087d0 : +Zknd_aes64ds_cg_cp_sbox_b151: + aes64ds x21, x6, x29 # perform operation + 800087d0: 3bd30ab3 aes64ds x21,x6,x29 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ds_cg_cp_sbox_b151, Zknd_aes64ds_cg_cp_sbox_b151_str) + 800087d4: 0008b203 ld x4,0(x17) + 800087d8: 01520c63 beq x4,x21,800087f0 + 800087dc: 125022ef jal x5,8000b100 + 800087e0: 800087d0 .word 0x800087d0 + 800087e4: 00000000 .word 0x00000000 + 800087e8: 8001f919 .word 0x8001f919 + 800087ec: 00000000 .word 0x00000000 + 800087f0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x9898989898989898 + 800087f4: 00013c03 ld x24,0(x2) + 800087f8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x9898989898989898 + 800087fc: 00013f83 ld x31,0(x2) + 80008800: 00810113 addi x2,x2,8 + +0000000080008804 : +Zknd_aes64ds_cg_cp_sbox_b152: + aes64ds x23, x24, x31 # perform operation + 80008804: 3bfc0bb3 aes64ds x23,x24,x31 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b152, Zknd_aes64ds_cg_cp_sbox_b152_str) + 80008808: 0008b203 ld x4,0(x17) + 8000880c: 01720c63 beq x4,x23,80008824 + 80008810: 0f1022ef jal x5,8000b100 + 80008814: 80008804 .word 0x80008804 + 80008818: 00000000 .word 0x00000000 + 8000881c: 8001f952 .word 0x8001f952 + 80008820: 00000000 .word 0x00000000 + 80008824: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0x9999999999999999 + 80008828: 00013403 ld x8,0(x2) + 8000882c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0x9999999999999999 + 80008830: 00013d03 ld x26,0(x2) + 80008834: 00810113 addi x2,x2,8 + +0000000080008838 : +Zknd_aes64ds_cg_cp_sbox_b153: + aes64ds x19, x8, x26 # perform operation + 80008838: 3ba409b3 aes64ds x19,x8,x26 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b153, Zknd_aes64ds_cg_cp_sbox_b153_str) + 8000883c: 0008b203 ld x4,0(x17) + 80008840: 01320c63 beq x4,x19,80008858 + 80008844: 0bd022ef jal x5,8000b100 + 80008848: 80008838 .word 0x80008838 + 8000884c: 00000000 .word 0x00000000 + 80008850: 8001f98b .word 0x8001f98b + 80008854: 00000000 .word 0x00000000 + 80008858: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x9a9a9a9a9a9a9a9a + 8000885c: 00013e83 ld x29,0(x2) + 80008860: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0x9a9a9a9a9a9a9a9a + 80008864: 00013f83 ld x31,0(x2) + 80008868: 00810113 addi x2,x2,8 + +000000008000886c : +Zknd_aes64ds_cg_cp_sbox_b154: + aes64ds x6, x29, x31 # perform operation + 8000886c: 3bfe8333 aes64ds x6,x29,x31 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b154, Zknd_aes64ds_cg_cp_sbox_b154_str) + 80008870: 0008b203 ld x4,0(x17) + 80008874: 00620c63 beq x4,x6,8000888c + 80008878: 089022ef jal x5,8000b100 + 8000887c: 8000886c .word 0x8000886c + 80008880: 00000000 .word 0x00000000 + 80008884: 8001f9c4 .word 0x8001f9c4 + 80008888: 00000000 .word 0x00000000 + 8000888c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x9b9b9b9b9b9b9b9b + 80008890: 00013e83 ld x29,0(x2) + 80008894: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0x9b9b9b9b9b9b9b9b + 80008898: 00013983 ld x19,0(x2) + 8000889c: 00810113 addi x2,x2,8 + +00000000800088a0 : +Zknd_aes64ds_cg_cp_sbox_b155: + aes64ds x6, x29, x19 # perform operation + 800088a0: 3b3e8333 aes64ds x6,x29,x19 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b155, Zknd_aes64ds_cg_cp_sbox_b155_str) + 800088a4: 0008b203 ld x4,0(x17) + 800088a8: 00620c63 beq x4,x6,800088c0 + 800088ac: 055022ef jal x5,8000b100 + 800088b0: 800088a0 .word 0x800088a0 + 800088b4: 00000000 .word 0x00000000 + 800088b8: 8001f9fd .word 0x8001f9fd + 800088bc: 00000000 .word 0x00000000 + 800088c0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x9c9c9c9c9c9c9c9c + 800088c4: 00013d83 ld x27,0(x2) + 800088c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0x9c9c9c9c9c9c9c9c + 800088cc: 00013a03 ld x20,0(x2) + 800088d0: 00810113 addi x2,x2,8 + +00000000800088d4 : +Zknd_aes64ds_cg_cp_sbox_b156: + aes64ds x15, x27, x20 # perform operation + 800088d4: 3b4d87b3 aes64ds x15,x27,x20 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b156, Zknd_aes64ds_cg_cp_sbox_b156_str) + 800088d8: 0008b203 ld x4,0(x17) + 800088dc: 00f20c63 beq x4,x15,800088f4 + 800088e0: 021022ef jal x5,8000b100 + 800088e4: 800088d4 .word 0x800088d4 + 800088e8: 00000000 .word 0x00000000 + 800088ec: 8001fa36 .word 0x8001fa36 + 800088f0: 00000000 .word 0x00000000 + 800088f4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0x9d9d9d9d9d9d9d9d + 800088f8: 00013183 ld x3,0(x2) + 800088fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0x9d9d9d9d9d9d9d9d + 80008900: 00013803 ld x16,0(x2) + 80008904: 00810113 addi x2,x2,8 + +0000000080008908 : +Zknd_aes64ds_cg_cp_sbox_b157: + aes64ds x30, x3, x16 # perform operation + 80008908: 3b018f33 aes64ds x30,x3,x16 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b157, Zknd_aes64ds_cg_cp_sbox_b157_str) + 8000890c: 0008b203 ld x4,0(x17) + 80008910: 01e20c63 beq x4,x30,80008928 + 80008914: 7ec022ef jal x5,8000b100 + 80008918: 80008908 .word 0x80008908 + 8000891c: 00000000 .word 0x00000000 + 80008920: 8001fa6f .word 0x8001fa6f + 80008924: 00000000 .word 0x00000000 + 80008928: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0x9e9e9e9e9e9e9e9e + 8000892c: 00013503 ld x10,0(x2) + 80008930: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0x9e9e9e9e9e9e9e9e + 80008934: 00013303 ld x6,0(x2) + 80008938: 00810113 addi x2,x2,8 + +000000008000893c : +Zknd_aes64ds_cg_cp_sbox_b158: + aes64ds x13, x10, x6 # perform operation + 8000893c: 3a6506b3 aes64ds x13,x10,x6 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b158, Zknd_aes64ds_cg_cp_sbox_b158_str) + 80008940: 0008b203 ld x4,0(x17) + 80008944: 00d20c63 beq x4,x13,8000895c + 80008948: 7b8022ef jal x5,8000b100 + 8000894c: 8000893c .word 0x8000893c + 80008950: 00000000 .word 0x00000000 + 80008954: 8001faa8 .word 0x8001faa8 + 80008958: 00000000 .word 0x00000000 + 8000895c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x9f9f9f9f9f9f9f9f + 80008960: 00013a83 ld x21,0(x2) + 80008964: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0x9f9f9f9f9f9f9f9f + 80008968: 00013183 ld x3,0(x2) + 8000896c: 00810113 addi x2,x2,8 + +0000000080008970 : +Zknd_aes64ds_cg_cp_sbox_b159: + aes64ds x27, x21, x3 # perform operation + 80008970: 3a3a8db3 aes64ds x27,x21,x3 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b159, Zknd_aes64ds_cg_cp_sbox_b159_str) + 80008974: 0008b203 ld x4,0(x17) + 80008978: 01b20c63 beq x4,x27,80008990 + 8000897c: 784022ef jal x5,8000b100 + 80008980: 80008970 .word 0x80008970 + 80008984: 00000000 .word 0x00000000 + 80008988: 8001fae1 .word 0x8001fae1 + 8000898c: 00000000 .word 0x00000000 + 80008990: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xa0a0a0a0a0a0a0a0 + 80008994: 00013303 ld x6,0(x2) + 80008998: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xa0a0a0a0a0a0a0a0 + 8000899c: 00013403 ld x8,0(x2) + 800089a0: 00810113 addi x2,x2,8 + +00000000800089a4 : +Zknd_aes64ds_cg_cp_sbox_b160: + aes64ds x25, x6, x8 # perform operation + 800089a4: 3a830cb3 aes64ds x25,x6,x8 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b160, Zknd_aes64ds_cg_cp_sbox_b160_str) + 800089a8: 0008b203 ld x4,0(x17) + 800089ac: 01920c63 beq x4,x25,800089c4 + 800089b0: 750022ef jal x5,8000b100 + 800089b4: 800089a4 .word 0x800089a4 + 800089b8: 00000000 .word 0x00000000 + 800089bc: 8001fb1a .word 0x8001fb1a + 800089c0: 00000000 .word 0x00000000 + 800089c4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xa1a1a1a1a1a1a1a1 + 800089c8: 00013c83 ld x25,0(x2) + 800089cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xa1a1a1a1a1a1a1a1 + 800089d0: 00013b03 ld x22,0(x2) + 800089d4: 00810113 addi x2,x2,8 + +00000000800089d8 : +Zknd_aes64ds_cg_cp_sbox_b161: + aes64ds x11, x25, x22 # perform operation + 800089d8: 3b6c85b3 aes64ds x11,x25,x22 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b161, Zknd_aes64ds_cg_cp_sbox_b161_str) + 800089dc: 0008b203 ld x4,0(x17) + 800089e0: 00b20c63 beq x4,x11,800089f8 + 800089e4: 71c022ef jal x5,8000b100 + 800089e8: 800089d8 .word 0x800089d8 + 800089ec: 00000000 .word 0x00000000 + 800089f0: 8001fb53 .word 0x8001fb53 + 800089f4: 00000000 .word 0x00000000 + 800089f8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xa2a2a2a2a2a2a2a2 + 800089fc: 00013603 ld x12,0(x2) + 80008a00: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xa2a2a2a2a2a2a2a2 + 80008a04: 00013b83 ld x23,0(x2) + 80008a08: 00810113 addi x2,x2,8 + +0000000080008a0c : +Zknd_aes64ds_cg_cp_sbox_b162: + aes64ds x31, x12, x23 # perform operation + 80008a0c: 3b760fb3 aes64ds x31,x12,x23 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cp_sbox_b162, Zknd_aes64ds_cg_cp_sbox_b162_str) + 80008a10: 0008b203 ld x4,0(x17) + 80008a14: 01f20c63 beq x4,x31,80008a2c + 80008a18: 6e8022ef jal x5,8000b100 + 80008a1c: 80008a0c .word 0x80008a0c + 80008a20: 00000000 .word 0x00000000 + 80008a24: 8001fb8c .word 0x8001fb8c + 80008a28: 00000000 .word 0x00000000 + 80008a2c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xa3a3a3a3a3a3a3a3 + 80008a30: 00013b03 ld x22,0(x2) + 80008a34: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xa3a3a3a3a3a3a3a3 + 80008a38: 00013a83 ld x21,0(x2) + 80008a3c: 00810113 addi x2,x2,8 + +0000000080008a40 : +Zknd_aes64ds_cg_cp_sbox_b163: + aes64ds x29, x22, x21 # perform operation + 80008a40: 3b5b0eb3 aes64ds x29,x22,x21 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b163, Zknd_aes64ds_cg_cp_sbox_b163_str) + 80008a44: 0008b203 ld x4,0(x17) + 80008a48: 01d20c63 beq x4,x29,80008a60 + 80008a4c: 6b4022ef jal x5,8000b100 + 80008a50: 80008a40 .word 0x80008a40 + 80008a54: 00000000 .word 0x00000000 + 80008a58: 8001fbc5 .word 0x8001fbc5 + 80008a5c: 00000000 .word 0x00000000 + 80008a60: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xa4a4a4a4a4a4a4a4 + 80008a64: 00013e03 ld x28,0(x2) + 80008a68: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xa4a4a4a4a4a4a4a4 + 80008a6c: 00013c03 ld x24,0(x2) + 80008a70: 00810113 addi x2,x2,8 + +0000000080008a74 : +Zknd_aes64ds_cg_cp_sbox_b164: + aes64ds x8, x28, x24 # perform operation + 80008a74: 3b8e0433 aes64ds x8,x28,x24 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b164, Zknd_aes64ds_cg_cp_sbox_b164_str) + 80008a78: 0008b203 ld x4,0(x17) + 80008a7c: 00820c63 beq x4,x8,80008a94 + 80008a80: 680022ef jal x5,8000b100 + 80008a84: 80008a74 .word 0x80008a74 + 80008a88: 00000000 .word 0x00000000 + 80008a8c: 8001fbfe .word 0x8001fbfe + 80008a90: 00000000 .word 0x00000000 + 80008a94: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xa5a5a5a5a5a5a5a5 + 80008a98: 00013383 ld x7,0(x2) + 80008a9c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xa5a5a5a5a5a5a5a5 + 80008aa0: 00013b83 ld x23,0(x2) + 80008aa4: 00810113 addi x2,x2,8 + +0000000080008aa8 : +Zknd_aes64ds_cg_cp_sbox_b165: + aes64ds x12, x7, x23 # perform operation + 80008aa8: 3b738633 aes64ds x12,x7,x23 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b165, Zknd_aes64ds_cg_cp_sbox_b165_str) + 80008aac: 0008b203 ld x4,0(x17) + 80008ab0: 00c20c63 beq x4,x12,80008ac8 + 80008ab4: 64c022ef jal x5,8000b100 + 80008ab8: 80008aa8 .word 0x80008aa8 + 80008abc: 00000000 .word 0x00000000 + 80008ac0: 8001fc37 .word 0x8001fc37 + 80008ac4: 00000000 .word 0x00000000 + 80008ac8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xa6a6a6a6a6a6a6a6 + 80008acc: 00013b03 ld x22,0(x2) + 80008ad0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xa6a6a6a6a6a6a6a6 + 80008ad4: 00013f83 ld x31,0(x2) + 80008ad8: 00810113 addi x2,x2,8 + +0000000080008adc : +Zknd_aes64ds_cg_cp_sbox_b166: + aes64ds x25, x22, x31 # perform operation + 80008adc: 3bfb0cb3 aes64ds x25,x22,x31 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b166, Zknd_aes64ds_cg_cp_sbox_b166_str) + 80008ae0: 0008b203 ld x4,0(x17) + 80008ae4: 01920c63 beq x4,x25,80008afc + 80008ae8: 618022ef jal x5,8000b100 + 80008aec: 80008adc .word 0x80008adc + 80008af0: 00000000 .word 0x00000000 + 80008af4: 8001fc70 .word 0x8001fc70 + 80008af8: 00000000 .word 0x00000000 + 80008afc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xa7a7a7a7a7a7a7a7 + 80008b00: 00013503 ld x10,0(x2) + 80008b04: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xa7a7a7a7a7a7a7a7 + 80008b08: 00013d03 ld x26,0(x2) + 80008b0c: 00810113 addi x2,x2,8 + +0000000080008b10 : +Zknd_aes64ds_cg_cp_sbox_b167: + aes64ds x27, x10, x26 # perform operation + 80008b10: 3ba50db3 aes64ds x27,x10,x26 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b167, Zknd_aes64ds_cg_cp_sbox_b167_str) + 80008b14: 0008b203 ld x4,0(x17) + 80008b18: 01b20c63 beq x4,x27,80008b30 + 80008b1c: 5e4022ef jal x5,8000b100 + 80008b20: 80008b10 .word 0x80008b10 + 80008b24: 00000000 .word 0x00000000 + 80008b28: 8001fca9 .word 0x8001fca9 + 80008b2c: 00000000 .word 0x00000000 + 80008b30: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xa8a8a8a8a8a8a8a8 + 80008b34: 00013903 ld x18,0(x2) + 80008b38: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xa8a8a8a8a8a8a8a8 + 80008b3c: 00013803 ld x16,0(x2) + 80008b40: 00810113 addi x2,x2,8 + +0000000080008b44 : +Zknd_aes64ds_cg_cp_sbox_b168: + aes64ds x25, x18, x16 # perform operation + 80008b44: 3b090cb3 aes64ds x25,x18,x16 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknd_aes64ds_cg_cp_sbox_b168, Zknd_aes64ds_cg_cp_sbox_b168_str) + 80008b48: 0008b203 ld x4,0(x17) + 80008b4c: 01920c63 beq x4,x25,80008b64 + 80008b50: 5b0022ef jal x5,8000b100 + 80008b54: 80008b44 .word 0x80008b44 + 80008b58: 00000000 .word 0x00000000 + 80008b5c: 8001fce2 .word 0x8001fce2 + 80008b60: 00000000 .word 0x00000000 + 80008b64: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xa9a9a9a9a9a9a9a9 + 80008b68: 00013303 ld x6,0(x2) + 80008b6c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xa9a9a9a9a9a9a9a9 + 80008b70: 00013483 ld x9,0(x2) + 80008b74: 00810113 addi x2,x2,8 + +0000000080008b78 : +Zknd_aes64ds_cg_cp_sbox_b169: + aes64ds x3, x6, x9 # perform operation + 80008b78: 3a9301b3 aes64ds x3,x6,x9 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b169, Zknd_aes64ds_cg_cp_sbox_b169_str) + 80008b7c: 0008b203 ld x4,0(x17) + 80008b80: 00320c63 beq x4,x3,80008b98 + 80008b84: 57c022ef jal x5,8000b100 + 80008b88: 80008b78 .word 0x80008b78 + 80008b8c: 00000000 .word 0x00000000 + 80008b90: 8001fd1b .word 0x8001fd1b + 80008b94: 00000000 .word 0x00000000 + 80008b98: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80008b9c: 00013583 ld x11,0(x2) + 80008ba0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80008ba4: 00013703 ld x14,0(x2) + 80008ba8: 00810113 addi x2,x2,8 + +0000000080008bac : +Zknd_aes64ds_cg_cp_sbox_b170: + aes64ds x7, x11, x14 # perform operation + 80008bac: 3ae583b3 aes64ds x7,x11,x14 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b170, Zknd_aes64ds_cg_cp_sbox_b170_str) + 80008bb0: 0008b203 ld x4,0(x17) + 80008bb4: 00720c63 beq x4,x7,80008bcc + 80008bb8: 548022ef jal x5,8000b100 + 80008bbc: 80008bac .word 0x80008bac + 80008bc0: 00000000 .word 0x00000000 + 80008bc4: 8001fd54 .word 0x8001fd54 + 80008bc8: 00000000 .word 0x00000000 + 80008bcc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xabababababababab + 80008bd0: 00013f83 ld x31,0(x2) + 80008bd4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xabababababababab + 80008bd8: 00013183 ld x3,0(x2) + 80008bdc: 00810113 addi x2,x2,8 + +0000000080008be0 : +Zknd_aes64ds_cg_cp_sbox_b171: + aes64ds x9, x31, x3 # perform operation + 80008be0: 3a3f84b3 aes64ds x9,x31,x3 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b171, Zknd_aes64ds_cg_cp_sbox_b171_str) + 80008be4: 0008b203 ld x4,0(x17) + 80008be8: 00920c63 beq x4,x9,80008c00 + 80008bec: 514022ef jal x5,8000b100 + 80008bf0: 80008be0 .word 0x80008be0 + 80008bf4: 00000000 .word 0x00000000 + 80008bf8: 8001fd8d .word 0x8001fd8d + 80008bfc: 00000000 .word 0x00000000 + 80008c00: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xacacacacacacacac + 80008c04: 00013f83 ld x31,0(x2) + 80008c08: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xacacacacacacacac + 80008c0c: 00013903 ld x18,0(x2) + 80008c10: 00810113 addi x2,x2,8 + +0000000080008c14 : +Zknd_aes64ds_cg_cp_sbox_b172: + aes64ds x10, x31, x18 # perform operation + 80008c14: 3b2f8533 aes64ds x10,x31,x18 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b172, Zknd_aes64ds_cg_cp_sbox_b172_str) + 80008c18: 0008b203 ld x4,0(x17) + 80008c1c: 00a20c63 beq x4,x10,80008c34 + 80008c20: 4e0022ef jal x5,8000b100 + 80008c24: 80008c14 .word 0x80008c14 + 80008c28: 00000000 .word 0x00000000 + 80008c2c: 8001fdc6 .word 0x8001fdc6 + 80008c30: 00000000 .word 0x00000000 + 80008c34: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xadadadadadadadad + 80008c38: 00013403 ld x8,0(x2) + 80008c3c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xadadadadadadadad + 80008c40: 00013803 ld x16,0(x2) + 80008c44: 00810113 addi x2,x2,8 + +0000000080008c48 : +Zknd_aes64ds_cg_cp_sbox_b173: + aes64ds x14, x8, x16 # perform operation + 80008c48: 3b040733 aes64ds x14,x8,x16 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b173, Zknd_aes64ds_cg_cp_sbox_b173_str) + 80008c4c: 0008b203 ld x4,0(x17) + 80008c50: 00e20c63 beq x4,x14,80008c68 + 80008c54: 4ac022ef jal x5,8000b100 + 80008c58: 80008c48 .word 0x80008c48 + 80008c5c: 00000000 .word 0x00000000 + 80008c60: 8001fdff .word 0x8001fdff + 80008c64: 00000000 .word 0x00000000 + 80008c68: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xaeaeaeaeaeaeaeae + 80008c6c: 00013d03 ld x26,0(x2) + 80008c70: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xaeaeaeaeaeaeaeae + 80008c74: 00013a03 ld x20,0(x2) + 80008c78: 00810113 addi x2,x2,8 + +0000000080008c7c : +Zknd_aes64ds_cg_cp_sbox_b174: + aes64ds x28, x26, x20 # perform operation + 80008c7c: 3b4d0e33 aes64ds x28,x26,x20 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b174, Zknd_aes64ds_cg_cp_sbox_b174_str) + 80008c80: 0008b203 ld x4,0(x17) + 80008c84: 01c20c63 beq x4,x28,80008c9c + 80008c88: 478022ef jal x5,8000b100 + 80008c8c: 80008c7c .word 0x80008c7c + 80008c90: 00000000 .word 0x00000000 + 80008c94: 8001fe38 .word 0x8001fe38 + 80008c98: 00000000 .word 0x00000000 + 80008c9c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xafafafafafafafaf + 80008ca0: 00013503 ld x10,0(x2) + 80008ca4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xafafafafafafafaf + 80008ca8: 00013083 ld x1,0(x2) + 80008cac: 00810113 addi x2,x2,8 + +0000000080008cb0 : +Zknd_aes64ds_cg_cp_sbox_b175: + aes64ds x23, x10, x1 # perform operation + 80008cb0: 3a150bb3 aes64ds x23,x10,x1 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b175, Zknd_aes64ds_cg_cp_sbox_b175_str) + 80008cb4: 0008b203 ld x4,0(x17) + 80008cb8: 01720c63 beq x4,x23,80008cd0 + 80008cbc: 444022ef jal x5,8000b100 + 80008cc0: 80008cb0 .word 0x80008cb0 + 80008cc4: 00000000 .word 0x00000000 + 80008cc8: 8001fe71 .word 0x8001fe71 + 80008ccc: 00000000 .word 0x00000000 + 80008cd0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xb0b0b0b0b0b0b0b0 + 80008cd4: 00013683 ld x13,0(x2) + 80008cd8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xb0b0b0b0b0b0b0b0 + 80008cdc: 00013383 ld x7,0(x2) + 80008ce0: 00810113 addi x2,x2,8 + +0000000080008ce4 : +Zknd_aes64ds_cg_cp_sbox_b176: + aes64ds x19, x13, x7 # perform operation + 80008ce4: 3a7689b3 aes64ds x19,x13,x7 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b176, Zknd_aes64ds_cg_cp_sbox_b176_str) + 80008ce8: 0008b203 ld x4,0(x17) + 80008cec: 01320c63 beq x4,x19,80008d04 + 80008cf0: 410022ef jal x5,8000b100 + 80008cf4: 80008ce4 .word 0x80008ce4 + 80008cf8: 00000000 .word 0x00000000 + 80008cfc: 8001feaa .word 0x8001feaa + 80008d00: 00000000 .word 0x00000000 + 80008d04: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xb1b1b1b1b1b1b1b1 + 80008d08: 00013303 ld x6,0(x2) + 80008d0c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xb1b1b1b1b1b1b1b1 + 80008d10: 00013e03 ld x28,0(x2) + 80008d14: 00810113 addi x2,x2,8 + +0000000080008d18 : +Zknd_aes64ds_cg_cp_sbox_b177: + aes64ds x22, x6, x28 # perform operation + 80008d18: 3bc30b33 aes64ds x22,x6,x28 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b177, Zknd_aes64ds_cg_cp_sbox_b177_str) + 80008d1c: 0008b203 ld x4,0(x17) + 80008d20: 01620c63 beq x4,x22,80008d38 + 80008d24: 3dc022ef jal x5,8000b100 + 80008d28: 80008d18 .word 0x80008d18 + 80008d2c: 00000000 .word 0x00000000 + 80008d30: 8001fee3 .word 0x8001fee3 + 80008d34: 00000000 .word 0x00000000 + 80008d38: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xb2b2b2b2b2b2b2b2 + 80008d3c: 00013403 ld x8,0(x2) + 80008d40: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs2: x13 = 0xb2b2b2b2b2b2b2b2 + 80008d44: 00013683 ld x13,0(x2) + 80008d48: 00810113 addi x2,x2,8 + +0000000080008d4c : +Zknd_aes64ds_cg_cp_sbox_b178: + aes64ds x23, x8, x13 # perform operation + 80008d4c: 3ad40bb3 aes64ds x23,x8,x13 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b178, Zknd_aes64ds_cg_cp_sbox_b178_str) + 80008d50: 0008b203 ld x4,0(x17) + 80008d54: 01720c63 beq x4,x23,80008d6c + 80008d58: 3a8022ef jal x5,8000b100 + 80008d5c: 80008d4c .word 0x80008d4c + 80008d60: 00000000 .word 0x00000000 + 80008d64: 8001ff1c .word 0x8001ff1c + 80008d68: 00000000 .word 0x00000000 + 80008d6c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xb3b3b3b3b3b3b3b3 + 80008d70: 00013e03 ld x28,0(x2) + 80008d74: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xb3b3b3b3b3b3b3b3 + 80008d78: 00013c03 ld x24,0(x2) + 80008d7c: 00810113 addi x2,x2,8 + +0000000080008d80 : +Zknd_aes64ds_cg_cp_sbox_b179: + aes64ds x20, x28, x24 # perform operation + 80008d80: 3b8e0a33 aes64ds x20,x28,x24 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b179, Zknd_aes64ds_cg_cp_sbox_b179_str) + 80008d84: 0008b203 ld x4,0(x17) + 80008d88: 01420c63 beq x4,x20,80008da0 + 80008d8c: 374022ef jal x5,8000b100 + 80008d90: 80008d80 .word 0x80008d80 + 80008d94: 00000000 .word 0x00000000 + 80008d98: 8001ff55 .word 0x8001ff55 + 80008d9c: 00000000 .word 0x00000000 + 80008da0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xb4b4b4b4b4b4b4b4 + 80008da4: 00013a83 ld x21,0(x2) + 80008da8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xb4b4b4b4b4b4b4b4 + 80008dac: 00013e03 ld x28,0(x2) + 80008db0: 00810113 addi x2,x2,8 + +0000000080008db4 : +Zknd_aes64ds_cg_cp_sbox_b180: + aes64ds x22, x21, x28 # perform operation + 80008db4: 3bca8b33 aes64ds x22,x21,x28 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b180, Zknd_aes64ds_cg_cp_sbox_b180_str) + 80008db8: 0008b203 ld x4,0(x17) + 80008dbc: 01620c63 beq x4,x22,80008dd4 + 80008dc0: 340022ef jal x5,8000b100 + 80008dc4: 80008db4 .word 0x80008db4 + 80008dc8: 00000000 .word 0x00000000 + 80008dcc: 8001ff8e .word 0x8001ff8e + 80008dd0: 00000000 .word 0x00000000 + 80008dd4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xb5b5b5b5b5b5b5b5 + 80008dd8: 00013783 ld x15,0(x2) + 80008ddc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xb5b5b5b5b5b5b5b5 + 80008de0: 00013d03 ld x26,0(x2) + 80008de4: 00810113 addi x2,x2,8 + +0000000080008de8 : +Zknd_aes64ds_cg_cp_sbox_b181: + aes64ds x1, x15, x26 # perform operation + 80008de8: 3ba780b3 aes64ds x1,x15,x26 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b181, Zknd_aes64ds_cg_cp_sbox_b181_str) + 80008dec: 0008b203 ld x4,0(x17) + 80008df0: 00120c63 beq x4,x1,80008e08 + 80008df4: 30c022ef jal x5,8000b100 + 80008df8: 80008de8 .word 0x80008de8 + 80008dfc: 00000000 .word 0x00000000 + 80008e00: 8001ffc7 .word 0x8001ffc7 + 80008e04: 00000000 .word 0x00000000 + 80008e08: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xb6b6b6b6b6b6b6b6 + 80008e0c: 00013703 ld x14,0(x2) + 80008e10: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xb6b6b6b6b6b6b6b6 + 80008e14: 00013b03 ld x22,0(x2) + 80008e18: 00810113 addi x2,x2,8 + +0000000080008e1c : +Zknd_aes64ds_cg_cp_sbox_b182: + aes64ds x1, x14, x22 # perform operation + 80008e1c: 3b6700b3 aes64ds x1,x14,x22 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b182, Zknd_aes64ds_cg_cp_sbox_b182_str) + 80008e20: 0008b203 ld x4,0(x17) + 80008e24: 00120c63 beq x4,x1,80008e3c + 80008e28: 2d8022ef jal x5,8000b100 + 80008e2c: 80008e1c .word 0x80008e1c + 80008e30: 00000000 .word 0x00000000 + 80008e34: 80020000 .word 0x80020000 + 80008e38: 00000000 .word 0x00000000 + 80008e3c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xb7b7b7b7b7b7b7b7 + 80008e40: 00013403 ld x8,0(x2) + 80008e44: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xb7b7b7b7b7b7b7b7 + 80008e48: 00013083 ld x1,0(x2) + 80008e4c: 00810113 addi x2,x2,8 + +0000000080008e50 : +Zknd_aes64ds_cg_cp_sbox_b183: + aes64ds x3, x8, x1 # perform operation + 80008e50: 3a1401b3 aes64ds x3,x8,x1 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b183, Zknd_aes64ds_cg_cp_sbox_b183_str) + 80008e54: 0008b203 ld x4,0(x17) + 80008e58: 00320c63 beq x4,x3,80008e70 + 80008e5c: 2a4022ef jal x5,8000b100 + 80008e60: 80008e50 .word 0x80008e50 + 80008e64: 00000000 .word 0x00000000 + 80008e68: 80020039 .word 0x80020039 + 80008e6c: 00000000 .word 0x00000000 + 80008e70: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xb8b8b8b8b8b8b8b8 + 80008e74: 00013803 ld x16,0(x2) + 80008e78: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xb8b8b8b8b8b8b8b8 + 80008e7c: 00013f03 ld x30,0(x2) + 80008e80: 00810113 addi x2,x2,8 + +0000000080008e84 : +Zknd_aes64ds_cg_cp_sbox_b184: + aes64ds x12, x16, x30 # perform operation + 80008e84: 3be80633 aes64ds x12,x16,x30 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b184, Zknd_aes64ds_cg_cp_sbox_b184_str) + 80008e88: 0008b203 ld x4,0(x17) + 80008e8c: 00c20c63 beq x4,x12,80008ea4 + 80008e90: 270022ef jal x5,8000b100 + 80008e94: 80008e84 .word 0x80008e84 + 80008e98: 00000000 .word 0x00000000 + 80008e9c: 80020072 .word 0x80020072 + 80008ea0: 00000000 .word 0x00000000 + 80008ea4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xb9b9b9b9b9b9b9b9 + 80008ea8: 00013483 ld x9,0(x2) + 80008eac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs2: x25 = 0xb9b9b9b9b9b9b9b9 + 80008eb0: 00013c83 ld x25,0(x2) + 80008eb4: 00810113 addi x2,x2,8 + +0000000080008eb8 : +Zknd_aes64ds_cg_cp_sbox_b185: + aes64ds x16, x9, x25 # perform operation + 80008eb8: 3b948833 aes64ds x16,x9,x25 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cp_sbox_b185, Zknd_aes64ds_cg_cp_sbox_b185_str) + 80008ebc: 0008b203 ld x4,0(x17) + 80008ec0: 01020c63 beq x4,x16,80008ed8 + 80008ec4: 23c022ef jal x5,8000b100 + 80008ec8: 80008eb8 .word 0x80008eb8 + 80008ecc: 00000000 .word 0x00000000 + 80008ed0: 800200ab .word 0x800200ab + 80008ed4: 00000000 .word 0x00000000 + 80008ed8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xbabababababababa + 80008edc: 00013183 ld x3,0(x2) + 80008ee0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xbabababababababa + 80008ee4: 00013703 ld x14,0(x2) + 80008ee8: 00810113 addi x2,x2,8 + +0000000080008eec : +Zknd_aes64ds_cg_cp_sbox_b186: + aes64ds x31, x3, x14 # perform operation + 80008eec: 3ae18fb3 aes64ds x31,x3,x14 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknd_aes64ds_cg_cp_sbox_b186, Zknd_aes64ds_cg_cp_sbox_b186_str) + 80008ef0: 0008b203 ld x4,0(x17) + 80008ef4: 01f20c63 beq x4,x31,80008f0c + 80008ef8: 208022ef jal x5,8000b100 + 80008efc: 80008eec .word 0x80008eec + 80008f00: 00000000 .word 0x00000000 + 80008f04: 800200e4 .word 0x800200e4 + 80008f08: 00000000 .word 0x00000000 + 80008f0c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xbbbbbbbbbbbbbbbb + 80008f10: 00013303 ld x6,0(x2) + 80008f14: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xbbbbbbbbbbbbbbbb + 80008f18: 00013a83 ld x21,0(x2) + 80008f1c: 00810113 addi x2,x2,8 + +0000000080008f20 : +Zknd_aes64ds_cg_cp_sbox_b187: + aes64ds x9, x6, x21 # perform operation + 80008f20: 3b5304b3 aes64ds x9,x6,x21 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b187, Zknd_aes64ds_cg_cp_sbox_b187_str) + 80008f24: 0008b203 ld x4,0(x17) + 80008f28: 00920c63 beq x4,x9,80008f40 + 80008f2c: 1d4022ef jal x5,8000b100 + 80008f30: 80008f20 .word 0x80008f20 + 80008f34: 00000000 .word 0x00000000 + 80008f38: 8002011d .word 0x8002011d + 80008f3c: 00000000 .word 0x00000000 + 80008f40: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xbcbcbcbcbcbcbcbc + 80008f44: 00013a03 ld x20,0(x2) + 80008f48: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xbcbcbcbcbcbcbcbc + 80008f4c: 00013e83 ld x29,0(x2) + 80008f50: 00810113 addi x2,x2,8 + +0000000080008f54 : +Zknd_aes64ds_cg_cp_sbox_b188: + aes64ds x15, x20, x29 # perform operation + 80008f54: 3bda07b3 aes64ds x15,x20,x29 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b188, Zknd_aes64ds_cg_cp_sbox_b188_str) + 80008f58: 0008b203 ld x4,0(x17) + 80008f5c: 00f20c63 beq x4,x15,80008f74 + 80008f60: 1a0022ef jal x5,8000b100 + 80008f64: 80008f54 .word 0x80008f54 + 80008f68: 00000000 .word 0x00000000 + 80008f6c: 80020156 .word 0x80020156 + 80008f70: 00000000 .word 0x00000000 + 80008f74: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xbdbdbdbdbdbdbdbd + 80008f78: 00013303 ld x6,0(x2) + 80008f7c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xbdbdbdbdbdbdbdbd + 80008f80: 00013983 ld x19,0(x2) + 80008f84: 00810113 addi x2,x2,8 + +0000000080008f88 : +Zknd_aes64ds_cg_cp_sbox_b189: + aes64ds x12, x6, x19 # perform operation + 80008f88: 3b330633 aes64ds x12,x6,x19 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b189, Zknd_aes64ds_cg_cp_sbox_b189_str) + 80008f8c: 0008b203 ld x4,0(x17) + 80008f90: 00c20c63 beq x4,x12,80008fa8 + 80008f94: 16c022ef jal x5,8000b100 + 80008f98: 80008f88 .word 0x80008f88 + 80008f9c: 00000000 .word 0x00000000 + 80008fa0: 8002018f .word 0x8002018f + 80008fa4: 00000000 .word 0x00000000 + 80008fa8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xbebebebebebebebe + 80008fac: 00013583 ld x11,0(x2) + 80008fb0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xbebebebebebebebe + 80008fb4: 00013783 ld x15,0(x2) + 80008fb8: 00810113 addi x2,x2,8 + +0000000080008fbc : +Zknd_aes64ds_cg_cp_sbox_b190: + aes64ds x10, x11, x15 # perform operation + 80008fbc: 3af58533 aes64ds x10,x11,x15 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b190, Zknd_aes64ds_cg_cp_sbox_b190_str) + 80008fc0: 0008b203 ld x4,0(x17) + 80008fc4: 00a20c63 beq x4,x10,80008fdc + 80008fc8: 138022ef jal x5,8000b100 + 80008fcc: 80008fbc .word 0x80008fbc + 80008fd0: 00000000 .word 0x00000000 + 80008fd4: 800201c8 .word 0x800201c8 + 80008fd8: 00000000 .word 0x00000000 + 80008fdc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xbfbfbfbfbfbfbfbf + 80008fe0: 00013083 ld x1,0(x2) + 80008fe4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xbfbfbfbfbfbfbfbf + 80008fe8: 00013f83 ld x31,0(x2) + 80008fec: 00810113 addi x2,x2,8 + +0000000080008ff0 : +Zknd_aes64ds_cg_cp_sbox_b191: + aes64ds x26, x1, x31 # perform operation + 80008ff0: 3bf08d33 aes64ds x26,x1,x31 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b191, Zknd_aes64ds_cg_cp_sbox_b191_str) + 80008ff4: 0008b203 ld x4,0(x17) + 80008ff8: 01a20c63 beq x4,x26,80009010 + 80008ffc: 104022ef jal x5,8000b100 + 80009000: 80008ff0 .word 0x80008ff0 + 80009004: 00000000 .word 0x00000000 + 80009008: 80020201 .word 0x80020201 + 8000900c: 00000000 .word 0x00000000 + 80009010: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xc0c0c0c0c0c0c0c0 + 80009014: 00013183 ld x3,0(x2) + 80009018: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xc0c0c0c0c0c0c0c0 + 8000901c: 00013383 ld x7,0(x2) + 80009020: 00810113 addi x2,x2,8 + +0000000080009024 : +Zknd_aes64ds_cg_cp_sbox_b192: + aes64ds x24, x3, x7 # perform operation + 80009024: 3a718c33 aes64ds x24,x3,x7 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b192, Zknd_aes64ds_cg_cp_sbox_b192_str) + 80009028: 0008b203 ld x4,0(x17) + 8000902c: 01820c63 beq x4,x24,80009044 + 80009030: 0d0022ef jal x5,8000b100 + 80009034: 80009024 .word 0x80009024 + 80009038: 00000000 .word 0x00000000 + 8000903c: 8002023a .word 0x8002023a + 80009040: 00000000 .word 0x00000000 + 80009044: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xc1c1c1c1c1c1c1c1 + 80009048: 00013d83 ld x27,0(x2) + 8000904c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xc1c1c1c1c1c1c1c1 + 80009050: 00013e03 ld x28,0(x2) + 80009054: 00810113 addi x2,x2,8 + +0000000080009058 : +Zknd_aes64ds_cg_cp_sbox_b193: + aes64ds x24, x27, x28 # perform operation + 80009058: 3bcd8c33 aes64ds x24,x27,x28 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b193, Zknd_aes64ds_cg_cp_sbox_b193_str) + 8000905c: 0008b203 ld x4,0(x17) + 80009060: 01820c63 beq x4,x24,80009078 + 80009064: 09c022ef jal x5,8000b100 + 80009068: 80009058 .word 0x80009058 + 8000906c: 00000000 .word 0x00000000 + 80009070: 80020273 .word 0x80020273 + 80009074: 00000000 .word 0x00000000 + 80009078: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xc2c2c2c2c2c2c2c2 + 8000907c: 00013c03 ld x24,0(x2) + 80009080: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xc2c2c2c2c2c2c2c2 + 80009084: 00013f03 ld x30,0(x2) + 80009088: 00810113 addi x2,x2,8 + +000000008000908c : +Zknd_aes64ds_cg_cp_sbox_b194: + aes64ds x18, x24, x30 # perform operation + 8000908c: 3bec0933 aes64ds x18,x24,x30 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b194, Zknd_aes64ds_cg_cp_sbox_b194_str) + 80009090: 0008b203 ld x4,0(x17) + 80009094: 01220c63 beq x4,x18,800090ac + 80009098: 068022ef jal x5,8000b100 + 8000909c: 8000908c .word 0x8000908c + 800090a0: 00000000 .word 0x00000000 + 800090a4: 800202ac .word 0x800202ac + 800090a8: 00000000 .word 0x00000000 + 800090ac: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xc3c3c3c3c3c3c3c3 + 800090b0: 00013083 ld x1,0(x2) + 800090b4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xc3c3c3c3c3c3c3c3 + 800090b8: 00013e03 ld x28,0(x2) + 800090bc: 00810113 addi x2,x2,8 + +00000000800090c0 : +Zknd_aes64ds_cg_cp_sbox_b195: + aes64ds x13, x1, x28 # perform operation + 800090c0: 3bc086b3 aes64ds x13,x1,x28 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ds_cg_cp_sbox_b195, Zknd_aes64ds_cg_cp_sbox_b195_str) + 800090c4: 0008b203 ld x4,0(x17) + 800090c8: 00d20c63 beq x4,x13,800090e0 + 800090cc: 034022ef jal x5,8000b100 + 800090d0: 800090c0 .word 0x800090c0 + 800090d4: 00000000 .word 0x00000000 + 800090d8: 800202e5 .word 0x800202e5 + 800090dc: 00000000 .word 0x00000000 + 800090e0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs1: x8 = 0xc4c4c4c4c4c4c4c4 + 800090e4: 00013403 ld x8,0(x2) + 800090e8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xc4c4c4c4c4c4c4c4 + 800090ec: 00013983 ld x19,0(x2) + 800090f0: 00810113 addi x2,x2,8 + +00000000800090f4 : +Zknd_aes64ds_cg_cp_sbox_b196: + aes64ds x14, x8, x19 # perform operation + 800090f4: 3b340733 aes64ds x14,x8,x19 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b196, Zknd_aes64ds_cg_cp_sbox_b196_str) + 800090f8: 0008b203 ld x4,0(x17) + 800090fc: 00e20c63 beq x4,x14,80009114 + 80009100: 000022ef jal x5,8000b100 + 80009104: 800090f4 .word 0x800090f4 + 80009108: 00000000 .word 0x00000000 + 8000910c: 8002031e .word 0x8002031e + 80009110: 00000000 .word 0x00000000 + 80009114: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xc5c5c5c5c5c5c5c5 + 80009118: 00013b03 ld x22,0(x2) + 8000911c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xc5c5c5c5c5c5c5c5 + 80009120: 00013f03 ld x30,0(x2) + 80009124: 00810113 addi x2,x2,8 + +0000000080009128 : +Zknd_aes64ds_cg_cp_sbox_b197: + aes64ds x18, x22, x30 # perform operation + 80009128: 3beb0933 aes64ds x18,x22,x30 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b197, Zknd_aes64ds_cg_cp_sbox_b197_str) + 8000912c: 0008b203 ld x4,0(x17) + 80009130: 01220c63 beq x4,x18,80009148 + 80009134: 7cd012ef jal x5,8000b100 + 80009138: 80009128 .word 0x80009128 + 8000913c: 00000000 .word 0x00000000 + 80009140: 80020357 .word 0x80020357 + 80009144: 00000000 .word 0x00000000 + 80009148: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xc6c6c6c6c6c6c6c6 + 8000914c: 00013c83 ld x25,0(x2) + 80009150: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xc6c6c6c6c6c6c6c6 + 80009154: 00013383 ld x7,0(x2) + 80009158: 00810113 addi x2,x2,8 + +000000008000915c : +Zknd_aes64ds_cg_cp_sbox_b198: + aes64ds x23, x25, x7 # perform operation + 8000915c: 3a7c8bb3 aes64ds x23,x25,x7 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b198, Zknd_aes64ds_cg_cp_sbox_b198_str) + 80009160: 0008b203 ld x4,0(x17) + 80009164: 01720c63 beq x4,x23,8000917c + 80009168: 799012ef jal x5,8000b100 + 8000916c: 8000915c .word 0x8000915c + 80009170: 00000000 .word 0x00000000 + 80009174: 80020390 .word 0x80020390 + 80009178: 00000000 .word 0x00000000 + 8000917c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xc7c7c7c7c7c7c7c7 + 80009180: 00013383 ld x7,0(x2) + 80009184: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xc7c7c7c7c7c7c7c7 + 80009188: 00013803 ld x16,0(x2) + 8000918c: 00810113 addi x2,x2,8 + +0000000080009190 : +Zknd_aes64ds_cg_cp_sbox_b199: + aes64ds x30, x7, x16 # perform operation + 80009190: 3b038f33 aes64ds x30,x7,x16 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b199, Zknd_aes64ds_cg_cp_sbox_b199_str) + 80009194: 0008b203 ld x4,0(x17) + 80009198: 01e20c63 beq x4,x30,800091b0 + 8000919c: 765012ef jal x5,8000b100 + 800091a0: 80009190 .word 0x80009190 + 800091a4: 00000000 .word 0x00000000 + 800091a8: 800203c9 .word 0x800203c9 + 800091ac: 00000000 .word 0x00000000 + 800091b0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xc8c8c8c8c8c8c8c8 + 800091b4: 00013683 ld x13,0(x2) + 800091b8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs2: x29 = 0xc8c8c8c8c8c8c8c8 + 800091bc: 00013e83 ld x29,0(x2) + 800091c0: 00810113 addi x2,x2,8 + +00000000800091c4 : +Zknd_aes64ds_cg_cp_sbox_b200: + aes64ds x1, x13, x29 # perform operation + 800091c4: 3bd680b3 aes64ds x1,x13,x29 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b200, Zknd_aes64ds_cg_cp_sbox_b200_str) + 800091c8: 0008b203 ld x4,0(x17) + 800091cc: 00120c63 beq x4,x1,800091e4 + 800091d0: 731012ef jal x5,8000b100 + 800091d4: 800091c4 .word 0x800091c4 + 800091d8: 00000000 .word 0x00000000 + 800091dc: 80020402 .word 0x80020402 + 800091e0: 00000000 .word 0x00000000 + 800091e4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xc9c9c9c9c9c9c9c9 + 800091e8: 00013683 ld x13,0(x2) + 800091ec: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xc9c9c9c9c9c9c9c9 + 800091f0: 00013b83 ld x23,0(x2) + 800091f4: 00810113 addi x2,x2,8 + +00000000800091f8 : +Zknd_aes64ds_cg_cp_sbox_b201: + aes64ds x1, x13, x23 # perform operation + 800091f8: 3b7680b3 aes64ds x1,x13,x23 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b201, Zknd_aes64ds_cg_cp_sbox_b201_str) + 800091fc: 0008b203 ld x4,0(x17) + 80009200: 00120c63 beq x4,x1,80009218 + 80009204: 6fd012ef jal x5,8000b100 + 80009208: 800091f8 .word 0x800091f8 + 8000920c: 00000000 .word 0x00000000 + 80009210: 8002043b .word 0x8002043b + 80009214: 00000000 .word 0x00000000 + 80009218: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xcacacacacacacaca + 8000921c: 00013503 ld x10,0(x2) + 80009220: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xcacacacacacacaca + 80009224: 00013903 ld x18,0(x2) + 80009228: 00810113 addi x2,x2,8 + +000000008000922c : +Zknd_aes64ds_cg_cp_sbox_b202: + aes64ds x6, x10, x18 # perform operation + 8000922c: 3b250333 aes64ds x6,x10,x18 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b202, Zknd_aes64ds_cg_cp_sbox_b202_str) + 80009230: 0008b203 ld x4,0(x17) + 80009234: 00620c63 beq x4,x6,8000924c + 80009238: 6c9012ef jal x5,8000b100 + 8000923c: 8000922c .word 0x8000922c + 80009240: 00000000 .word 0x00000000 + 80009244: 80020474 .word 0x80020474 + 80009248: 00000000 .word 0x00000000 + 8000924c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xcbcbcbcbcbcbcbcb + 80009250: 00013a03 ld x20,0(x2) + 80009254: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xcbcbcbcbcbcbcbcb + 80009258: 00013903 ld x18,0(x2) + 8000925c: 00810113 addi x2,x2,8 + +0000000080009260 : +Zknd_aes64ds_cg_cp_sbox_b203: + aes64ds x16, x20, x18 # perform operation + 80009260: 3b2a0833 aes64ds x16,x20,x18 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cp_sbox_b203, Zknd_aes64ds_cg_cp_sbox_b203_str) + 80009264: 0008b203 ld x4,0(x17) + 80009268: 01020c63 beq x4,x16,80009280 + 8000926c: 695012ef jal x5,8000b100 + 80009270: 80009260 .word 0x80009260 + 80009274: 00000000 .word 0x00000000 + 80009278: 800204ad .word 0x800204ad + 8000927c: 00000000 .word 0x00000000 + 80009280: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xcccccccccccccccc + 80009284: 00013703 ld x14,0(x2) + 80009288: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xcccccccccccccccc + 8000928c: 00013803 ld x16,0(x2) + 80009290: 00810113 addi x2,x2,8 + +0000000080009294 : +Zknd_aes64ds_cg_cp_sbox_b204: + aes64ds x3, x14, x16 # perform operation + 80009294: 3b0701b3 aes64ds x3,x14,x16 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zknd_aes64ds_cg_cp_sbox_b204, Zknd_aes64ds_cg_cp_sbox_b204_str) + 80009298: 0008b203 ld x4,0(x17) + 8000929c: 00320c63 beq x4,x3,800092b4 + 800092a0: 661012ef jal x5,8000b100 + 800092a4: 80009294 .word 0x80009294 + 800092a8: 00000000 .word 0x00000000 + 800092ac: 800204e6 .word 0x800204e6 + 800092b0: 00000000 .word 0x00000000 + 800092b4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xcdcdcdcdcdcdcdcd + 800092b8: 00013f83 ld x31,0(x2) + 800092bc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xcdcdcdcdcdcdcdcd + 800092c0: 00013983 ld x19,0(x2) + 800092c4: 00810113 addi x2,x2,8 + +00000000800092c8 : +Zknd_aes64ds_cg_cp_sbox_b205: + aes64ds x22, x31, x19 # perform operation + 800092c8: 3b3f8b33 aes64ds x22,x31,x19 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b205, Zknd_aes64ds_cg_cp_sbox_b205_str) + 800092cc: 0008b203 ld x4,0(x17) + 800092d0: 01620c63 beq x4,x22,800092e8 + 800092d4: 62d012ef jal x5,8000b100 + 800092d8: 800092c8 .word 0x800092c8 + 800092dc: 00000000 .word 0x00000000 + 800092e0: 8002051f .word 0x8002051f + 800092e4: 00000000 .word 0x00000000 + 800092e8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xcececececececece + 800092ec: 00013b83 ld x23,0(x2) + 800092f0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xcececececececece + 800092f4: 00013783 ld x15,0(x2) + 800092f8: 00810113 addi x2,x2,8 + +00000000800092fc : +Zknd_aes64ds_cg_cp_sbox_b206: + aes64ds x30, x23, x15 # perform operation + 800092fc: 3afb8f33 aes64ds x30,x23,x15 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b206, Zknd_aes64ds_cg_cp_sbox_b206_str) + 80009300: 0008b203 ld x4,0(x17) + 80009304: 01e20c63 beq x4,x30,8000931c + 80009308: 5f9012ef jal x5,8000b100 + 8000930c: 800092fc .word 0x800092fc + 80009310: 00000000 .word 0x00000000 + 80009314: 80020558 .word 0x80020558 + 80009318: 00000000 .word 0x00000000 + 8000931c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xcfcfcfcfcfcfcfcf + 80009320: 00013583 ld x11,0(x2) + 80009324: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xcfcfcfcfcfcfcfcf + 80009328: 00013a83 ld x21,0(x2) + 8000932c: 00810113 addi x2,x2,8 + +0000000080009330 : +Zknd_aes64ds_cg_cp_sbox_b207: + aes64ds x26, x11, x21 # perform operation + 80009330: 3b558d33 aes64ds x26,x11,x21 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b207, Zknd_aes64ds_cg_cp_sbox_b207_str) + 80009334: 0008b203 ld x4,0(x17) + 80009338: 01a20c63 beq x4,x26,80009350 + 8000933c: 5c5012ef jal x5,8000b100 + 80009340: 80009330 .word 0x80009330 + 80009344: 00000000 .word 0x00000000 + 80009348: 80020591 .word 0x80020591 + 8000934c: 00000000 .word 0x00000000 + 80009350: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xd0d0d0d0d0d0d0d0 + 80009354: 00013083 ld x1,0(x2) + 80009358: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xd0d0d0d0d0d0d0d0 + 8000935c: 00013983 ld x19,0(x2) + 80009360: 00810113 addi x2,x2,8 + +0000000080009364 : +Zknd_aes64ds_cg_cp_sbox_b208: + aes64ds x10, x1, x19 # perform operation + 80009364: 3b308533 aes64ds x10,x1,x19 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b208, Zknd_aes64ds_cg_cp_sbox_b208_str) + 80009368: 0008b203 ld x4,0(x17) + 8000936c: 00a20c63 beq x4,x10,80009384 + 80009370: 591012ef jal x5,8000b100 + 80009374: 80009364 .word 0x80009364 + 80009378: 00000000 .word 0x00000000 + 8000937c: 800205ca .word 0x800205ca + 80009380: 00000000 .word 0x00000000 + 80009384: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xd1d1d1d1d1d1d1d1 + 80009388: 00013303 ld x6,0(x2) + 8000938c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xd1d1d1d1d1d1d1d1 + 80009390: 00013c03 ld x24,0(x2) + 80009394: 00810113 addi x2,x2,8 + +0000000080009398 : +Zknd_aes64ds_cg_cp_sbox_b209: + aes64ds x15, x6, x24 # perform operation + 80009398: 3b8307b3 aes64ds x15,x6,x24 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b209, Zknd_aes64ds_cg_cp_sbox_b209_str) + 8000939c: 0008b203 ld x4,0(x17) + 800093a0: 00f20c63 beq x4,x15,800093b8 + 800093a4: 55d012ef jal x5,8000b100 + 800093a8: 80009398 .word 0x80009398 + 800093ac: 00000000 .word 0x00000000 + 800093b0: 80020603 .word 0x80020603 + 800093b4: 00000000 .word 0x00000000 + 800093b8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xd2d2d2d2d2d2d2d2 + 800093bc: 00013483 ld x9,0(x2) + 800093c0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xd2d2d2d2d2d2d2d2 + 800093c4: 00013783 ld x15,0(x2) + 800093c8: 00810113 addi x2,x2,8 + +00000000800093cc : +Zknd_aes64ds_cg_cp_sbox_b210: + aes64ds x1, x9, x15 # perform operation + 800093cc: 3af480b3 aes64ds x1,x9,x15 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zknd_aes64ds_cg_cp_sbox_b210, Zknd_aes64ds_cg_cp_sbox_b210_str) + 800093d0: 0008b203 ld x4,0(x17) + 800093d4: 00120c63 beq x4,x1,800093ec + 800093d8: 529012ef jal x5,8000b100 + 800093dc: 800093cc .word 0x800093cc + 800093e0: 00000000 .word 0x00000000 + 800093e4: 8002063c .word 0x8002063c + 800093e8: 00000000 .word 0x00000000 + 800093ec: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xd3d3d3d3d3d3d3d3 + 800093f0: 00013c83 ld x25,0(x2) + 800093f4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xd3d3d3d3d3d3d3d3 + 800093f8: 00013083 ld x1,0(x2) + 800093fc: 00810113 addi x2,x2,8 + +0000000080009400 : +Zknd_aes64ds_cg_cp_sbox_b211: + aes64ds x19, x25, x1 # perform operation + 80009400: 3a1c89b3 aes64ds x19,x25,x1 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b211, Zknd_aes64ds_cg_cp_sbox_b211_str) + 80009404: 0008b203 ld x4,0(x17) + 80009408: 01320c63 beq x4,x19,80009420 + 8000940c: 4f5012ef jal x5,8000b100 + 80009410: 80009400 .word 0x80009400 + 80009414: 00000000 .word 0x00000000 + 80009418: 80020675 .word 0x80020675 + 8000941c: 00000000 .word 0x00000000 + 80009420: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xd4d4d4d4d4d4d4d4 + 80009424: 00013c03 ld x24,0(x2) + 80009428: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xd4d4d4d4d4d4d4d4 + 8000942c: 00013083 ld x1,0(x2) + 80009430: 00810113 addi x2,x2,8 + +0000000080009434 : +Zknd_aes64ds_cg_cp_sbox_b212: + aes64ds x22, x24, x1 # perform operation + 80009434: 3a1c0b33 aes64ds x22,x24,x1 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b212, Zknd_aes64ds_cg_cp_sbox_b212_str) + 80009438: 0008b203 ld x4,0(x17) + 8000943c: 01620c63 beq x4,x22,80009454 + 80009440: 4c1012ef jal x5,8000b100 + 80009444: 80009434 .word 0x80009434 + 80009448: 00000000 .word 0x00000000 + 8000944c: 800206ae .word 0x800206ae + 80009450: 00000000 .word 0x00000000 + 80009454: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xd5d5d5d5d5d5d5d5 + 80009458: 00013603 ld x12,0(x2) + 8000945c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs2: x28 = 0xd5d5d5d5d5d5d5d5 + 80009460: 00013e03 ld x28,0(x2) + 80009464: 00810113 addi x2,x2,8 + +0000000080009468 : +Zknd_aes64ds_cg_cp_sbox_b213: + aes64ds x10, x12, x28 # perform operation + 80009468: 3bc60533 aes64ds x10,x12,x28 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b213, Zknd_aes64ds_cg_cp_sbox_b213_str) + 8000946c: 0008b203 ld x4,0(x17) + 80009470: 00a20c63 beq x4,x10,80009488 + 80009474: 48d012ef jal x5,8000b100 + 80009478: 80009468 .word 0x80009468 + 8000947c: 00000000 .word 0x00000000 + 80009480: 800206e7 .word 0x800206e7 + 80009484: 00000000 .word 0x00000000 + 80009488: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xd6d6d6d6d6d6d6d6 + 8000948c: 00013783 ld x15,0(x2) + 80009490: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xd6d6d6d6d6d6d6d6 + 80009494: 00013f83 ld x31,0(x2) + 80009498: 00810113 addi x2,x2,8 + +000000008000949c : +Zknd_aes64ds_cg_cp_sbox_b214: + aes64ds x22, x15, x31 # perform operation + 8000949c: 3bf78b33 aes64ds x22,x15,x31 + # Check if x22 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x22, Zknd_aes64ds_cg_cp_sbox_b214, Zknd_aes64ds_cg_cp_sbox_b214_str) + 800094a0: 0008b203 ld x4,0(x17) + 800094a4: 01620c63 beq x4,x22,800094bc + 800094a8: 459012ef jal x5,8000b100 + 800094ac: 8000949c .word 0x8000949c + 800094b0: 00000000 .word 0x00000000 + 800094b4: 80020720 .word 0x80020720 + 800094b8: 00000000 .word 0x00000000 + 800094bc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xd7d7d7d7d7d7d7d7 + 800094c0: 00013783 ld x15,0(x2) + 800094c4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xd7d7d7d7d7d7d7d7 + 800094c8: 00013d83 ld x27,0(x2) + 800094cc: 00810113 addi x2,x2,8 + +00000000800094d0 : +Zknd_aes64ds_cg_cp_sbox_b215: + aes64ds x16, x15, x27 # perform operation + 800094d0: 3bb78833 aes64ds x16,x15,x27 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cp_sbox_b215, Zknd_aes64ds_cg_cp_sbox_b215_str) + 800094d4: 0008b203 ld x4,0(x17) + 800094d8: 01020c63 beq x4,x16,800094f0 + 800094dc: 425012ef jal x5,8000b100 + 800094e0: 800094d0 .word 0x800094d0 + 800094e4: 00000000 .word 0x00000000 + 800094e8: 80020759 .word 0x80020759 + 800094ec: 00000000 .word 0x00000000 + 800094f0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xd8d8d8d8d8d8d8d8 + 800094f4: 00013d83 ld x27,0(x2) + 800094f8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xd8d8d8d8d8d8d8d8 + 800094fc: 00013983 ld x19,0(x2) + 80009500: 00810113 addi x2,x2,8 + +0000000080009504 : +Zknd_aes64ds_cg_cp_sbox_b216: + aes64ds x8, x27, x19 # perform operation + 80009504: 3b3d8433 aes64ds x8,x27,x19 + # Check if x8 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x8, Zknd_aes64ds_cg_cp_sbox_b216, Zknd_aes64ds_cg_cp_sbox_b216_str) + 80009508: 0008b203 ld x4,0(x17) + 8000950c: 00820c63 beq x4,x8,80009524 + 80009510: 3f1012ef jal x5,8000b100 + 80009514: 80009504 .word 0x80009504 + 80009518: 00000000 .word 0x00000000 + 8000951c: 80020792 .word 0x80020792 + 80009520: 00000000 .word 0x00000000 + 80009524: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xd9d9d9d9d9d9d9d9 + 80009528: 00013e03 ld x28,0(x2) + 8000952c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs2: x23 = 0xd9d9d9d9d9d9d9d9 + 80009530: 00013b83 ld x23,0(x2) + 80009534: 00810113 addi x2,x2,8 + +0000000080009538 : +Zknd_aes64ds_cg_cp_sbox_b217: + aes64ds x16, x28, x23 # perform operation + 80009538: 3b7e0833 aes64ds x16,x28,x23 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zknd_aes64ds_cg_cp_sbox_b217, Zknd_aes64ds_cg_cp_sbox_b217_str) + 8000953c: 0008b203 ld x4,0(x17) + 80009540: 01020c63 beq x4,x16,80009558 + 80009544: 3bd012ef jal x5,8000b100 + 80009548: 80009538 .word 0x80009538 + 8000954c: 00000000 .word 0x00000000 + 80009550: 800207cb .word 0x800207cb + 80009554: 00000000 .word 0x00000000 + 80009558: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xdadadadadadadada + 8000955c: 00013f83 ld x31,0(x2) + 80009560: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xdadadadadadadada + 80009564: 00013803 ld x16,0(x2) + 80009568: 00810113 addi x2,x2,8 + +000000008000956c : +Zknd_aes64ds_cg_cp_sbox_b218: + aes64ds x15, x31, x16 # perform operation + 8000956c: 3b0f87b3 aes64ds x15,x31,x16 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b218, Zknd_aes64ds_cg_cp_sbox_b218_str) + 80009570: 0008b203 ld x4,0(x17) + 80009574: 00f20c63 beq x4,x15,8000958c + 80009578: 389012ef jal x5,8000b100 + 8000957c: 8000956c .word 0x8000956c + 80009580: 00000000 .word 0x00000000 + 80009584: 80020804 .word 0x80020804 + 80009588: 00000000 .word 0x00000000 + 8000958c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xdbdbdbdbdbdbdbdb + 80009590: 00013e83 ld x29,0(x2) + 80009594: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xdbdbdbdbdbdbdbdb + 80009598: 00013703 ld x14,0(x2) + 8000959c: 00810113 addi x2,x2,8 + +00000000800095a0 : +Zknd_aes64ds_cg_cp_sbox_b219: + aes64ds x26, x29, x14 # perform operation + 800095a0: 3aee8d33 aes64ds x26,x29,x14 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b219, Zknd_aes64ds_cg_cp_sbox_b219_str) + 800095a4: 0008b203 ld x4,0(x17) + 800095a8: 01a20c63 beq x4,x26,800095c0 + 800095ac: 355012ef jal x5,8000b100 + 800095b0: 800095a0 .word 0x800095a0 + 800095b4: 00000000 .word 0x00000000 + 800095b8: 8002083d .word 0x8002083d + 800095bc: 00000000 .word 0x00000000 + 800095c0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0xdcdcdcdcdcdcdcdc + 800095c4: 00013c03 ld x24,0(x2) + 800095c8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xdcdcdcdcdcdcdcdc + 800095cc: 00013383 ld x7,0(x2) + 800095d0: 00810113 addi x2,x2,8 + +00000000800095d4 : +Zknd_aes64ds_cg_cp_sbox_b220: + aes64ds x12, x24, x7 # perform operation + 800095d4: 3a7c0633 aes64ds x12,x24,x7 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b220, Zknd_aes64ds_cg_cp_sbox_b220_str) + 800095d8: 0008b203 ld x4,0(x17) + 800095dc: 00c20c63 beq x4,x12,800095f4 + 800095e0: 321012ef jal x5,8000b100 + 800095e4: 800095d4 .word 0x800095d4 + 800095e8: 00000000 .word 0x00000000 + 800095ec: 80020876 .word 0x80020876 + 800095f0: 00000000 .word 0x00000000 + 800095f4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0xdddddddddddddddd + 800095f8: 00013f03 ld x30,0(x2) + 800095fc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xdddddddddddddddd + 80009600: 00013903 ld x18,0(x2) + 80009604: 00810113 addi x2,x2,8 + +0000000080009608 : +Zknd_aes64ds_cg_cp_sbox_b221: + aes64ds x28, x30, x18 # perform operation + 80009608: 3b2f0e33 aes64ds x28,x30,x18 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b221, Zknd_aes64ds_cg_cp_sbox_b221_str) + 8000960c: 0008b203 ld x4,0(x17) + 80009610: 01c20c63 beq x4,x28,80009628 + 80009614: 2ed012ef jal x5,8000b100 + 80009618: 80009608 .word 0x80009608 + 8000961c: 00000000 .word 0x00000000 + 80009620: 800208af .word 0x800208af + 80009624: 00000000 .word 0x00000000 + 80009628: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xdededededededede + 8000962c: 00013f83 ld x31,0(x2) + 80009630: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xdededededededede + 80009634: 00013a03 ld x20,0(x2) + 80009638: 00810113 addi x2,x2,8 + +000000008000963c : +Zknd_aes64ds_cg_cp_sbox_b222: + aes64ds x6, x31, x20 # perform operation + 8000963c: 3b4f8333 aes64ds x6,x31,x20 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b222, Zknd_aes64ds_cg_cp_sbox_b222_str) + 80009640: 0008b203 ld x4,0(x17) + 80009644: 00620c63 beq x4,x6,8000965c + 80009648: 2b9012ef jal x5,8000b100 + 8000964c: 8000963c .word 0x8000963c + 80009650: 00000000 .word 0x00000000 + 80009654: 800208e8 .word 0x800208e8 + 80009658: 00000000 .word 0x00000000 + 8000965c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xdfdfdfdfdfdfdfdf + 80009660: 00013703 ld x14,0(x2) + 80009664: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs2: x15 = 0xdfdfdfdfdfdfdfdf + 80009668: 00013783 ld x15,0(x2) + 8000966c: 00810113 addi x2,x2,8 + +0000000080009670 : +Zknd_aes64ds_cg_cp_sbox_b223: + aes64ds x27, x14, x15 # perform operation + 80009670: 3af70db3 aes64ds x27,x14,x15 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b223, Zknd_aes64ds_cg_cp_sbox_b223_str) + 80009674: 0008b203 ld x4,0(x17) + 80009678: 01b20c63 beq x4,x27,80009690 + 8000967c: 285012ef jal x5,8000b100 + 80009680: 80009670 .word 0x80009670 + 80009684: 00000000 .word 0x00000000 + 80009688: 80020921 .word 0x80020921 + 8000968c: 00000000 .word 0x00000000 + 80009690: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xe0e0e0e0e0e0e0e0 + 80009694: 00013503 ld x10,0(x2) + 80009698: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xe0e0e0e0e0e0e0e0 + 8000969c: 00013803 ld x16,0(x2) + 800096a0: 00810113 addi x2,x2,8 + +00000000800096a4 : +Zknd_aes64ds_cg_cp_sbox_b224: + aes64ds x11, x10, x16 # perform operation + 800096a4: 3b0505b3 aes64ds x11,x10,x16 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b224, Zknd_aes64ds_cg_cp_sbox_b224_str) + 800096a8: 0008b203 ld x4,0(x17) + 800096ac: 00b20c63 beq x4,x11,800096c4 + 800096b0: 251012ef jal x5,8000b100 + 800096b4: 800096a4 .word 0x800096a4 + 800096b8: 00000000 .word 0x00000000 + 800096bc: 8002095a .word 0x8002095a + 800096c0: 00000000 .word 0x00000000 + 800096c4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xe1e1e1e1e1e1e1e1 + 800096c8: 00013803 ld x16,0(x2) + 800096cc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xe1e1e1e1e1e1e1e1 + 800096d0: 00013b03 ld x22,0(x2) + 800096d4: 00810113 addi x2,x2,8 + +00000000800096d8 : +Zknd_aes64ds_cg_cp_sbox_b225: + aes64ds x12, x16, x22 # perform operation + 800096d8: 3b680633 aes64ds x12,x16,x22 + # Check if x12 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x12, Zknd_aes64ds_cg_cp_sbox_b225, Zknd_aes64ds_cg_cp_sbox_b225_str) + 800096dc: 0008b203 ld x4,0(x17) + 800096e0: 00c20c63 beq x4,x12,800096f8 + 800096e4: 21d012ef jal x5,8000b100 + 800096e8: 800096d8 .word 0x800096d8 + 800096ec: 00000000 .word 0x00000000 + 800096f0: 80020993 .word 0x80020993 + 800096f4: 00000000 .word 0x00000000 + 800096f8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0xe2e2e2e2e2e2e2e2 + 800096fc: 00013583 ld x11,0(x2) + 80009700: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs2: x20 = 0xe2e2e2e2e2e2e2e2 + 80009704: 00013a03 ld x20,0(x2) + 80009708: 00810113 addi x2,x2,8 + +000000008000970c : +Zknd_aes64ds_cg_cp_sbox_b226: + aes64ds x23, x11, x20 # perform operation + 8000970c: 3b458bb3 aes64ds x23,x11,x20 + # Check if x23 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x23, Zknd_aes64ds_cg_cp_sbox_b226, Zknd_aes64ds_cg_cp_sbox_b226_str) + 80009710: 0008b203 ld x4,0(x17) + 80009714: 01720c63 beq x4,x23,8000972c + 80009718: 1e9012ef jal x5,8000b100 + 8000971c: 8000970c .word 0x8000970c + 80009720: 00000000 .word 0x00000000 + 80009724: 800209cc .word 0x800209cc + 80009728: 00000000 .word 0x00000000 + 8000972c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0xe3e3e3e3e3e3e3e3 + 80009730: 00013e03 ld x28,0(x2) + 80009734: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs2: x26 = 0xe3e3e3e3e3e3e3e3 + 80009738: 00013d03 ld x26,0(x2) + 8000973c: 00810113 addi x2,x2,8 + +0000000080009740 : +Zknd_aes64ds_cg_cp_sbox_b227: + aes64ds x6, x28, x26 # perform operation + 80009740: 3bae0333 aes64ds x6,x28,x26 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b227, Zknd_aes64ds_cg_cp_sbox_b227_str) + 80009744: 0008b203 ld x4,0(x17) + 80009748: 00620c63 beq x4,x6,80009760 + 8000974c: 1b5012ef jal x5,8000b100 + 80009750: 80009740 .word 0x80009740 + 80009754: 00000000 .word 0x00000000 + 80009758: 80020a05 .word 0x80020a05 + 8000975c: 00000000 .word 0x00000000 + 80009760: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0xe4e4e4e4e4e4e4e4 + 80009764: 00013803 ld x16,0(x2) + 80009768: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xe4e4e4e4e4e4e4e4 + 8000976c: 00013b03 ld x22,0(x2) + 80009770: 00810113 addi x2,x2,8 + +0000000080009774 : +Zknd_aes64ds_cg_cp_sbox_b228: + aes64ds x19, x16, x22 # perform operation + 80009774: 3b6809b3 aes64ds x19,x16,x22 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b228, Zknd_aes64ds_cg_cp_sbox_b228_str) + 80009778: 0008b203 ld x4,0(x17) + 8000977c: 01320c63 beq x4,x19,80009794 + 80009780: 181012ef jal x5,8000b100 + 80009784: 80009774 .word 0x80009774 + 80009788: 00000000 .word 0x00000000 + 8000978c: 80020a3e .word 0x80020a3e + 80009790: 00000000 .word 0x00000000 + 80009794: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xe5e5e5e5e5e5e5e5 + 80009798: 00013a03 ld x20,0(x2) + 8000979c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xe5e5e5e5e5e5e5e5 + 800097a0: 00013503 ld x10,0(x2) + 800097a4: 00810113 addi x2,x2,8 + +00000000800097a8 : +Zknd_aes64ds_cg_cp_sbox_b229: + aes64ds x24, x20, x10 # perform operation + 800097a8: 3aaa0c33 aes64ds x24,x20,x10 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b229, Zknd_aes64ds_cg_cp_sbox_b229_str) + 800097ac: 0008b203 ld x4,0(x17) + 800097b0: 01820c63 beq x4,x24,800097c8 + 800097b4: 14d012ef jal x5,8000b100 + 800097b8: 800097a8 .word 0x800097a8 + 800097bc: 00000000 .word 0x00000000 + 800097c0: 80020a77 .word 0x80020a77 + 800097c4: 00000000 .word 0x00000000 + 800097c8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0xe6e6e6e6e6e6e6e6 + 800097cc: 00013e83 ld x29,0(x2) + 800097d0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xe6e6e6e6e6e6e6e6 + 800097d4: 00013083 ld x1,0(x2) + 800097d8: 00810113 addi x2,x2,8 + +00000000800097dc : +Zknd_aes64ds_cg_cp_sbox_b230: + aes64ds x14, x29, x1 # perform operation + 800097dc: 3a1e8733 aes64ds x14,x29,x1 + # Check if x14 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x14, Zknd_aes64ds_cg_cp_sbox_b230, Zknd_aes64ds_cg_cp_sbox_b230_str) + 800097e0: 0008b203 ld x4,0(x17) + 800097e4: 00e20c63 beq x4,x14,800097fc + 800097e8: 119012ef jal x5,8000b100 + 800097ec: 800097dc .word 0x800097dc + 800097f0: 00000000 .word 0x00000000 + 800097f4: 80020ab0 .word 0x80020ab0 + 800097f8: 00000000 .word 0x00000000 + 800097fc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xe7e7e7e7e7e7e7e7 + 80009800: 00013a83 ld x21,0(x2) + 80009804: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xe7e7e7e7e7e7e7e7 + 80009808: 00013b03 ld x22,0(x2) + 8000980c: 00810113 addi x2,x2,8 + +0000000080009810 : +Zknd_aes64ds_cg_cp_sbox_b231: + aes64ds x11, x21, x22 # perform operation + 80009810: 3b6a85b3 aes64ds x11,x21,x22 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b231, Zknd_aes64ds_cg_cp_sbox_b231_str) + 80009814: 0008b203 ld x4,0(x17) + 80009818: 00b20c63 beq x4,x11,80009830 + 8000981c: 0e5012ef jal x5,8000b100 + 80009820: 80009810 .word 0x80009810 + 80009824: 00000000 .word 0x00000000 + 80009828: 80020ae9 .word 0x80020ae9 + 8000982c: 00000000 .word 0x00000000 + 80009830: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xe8e8e8e8e8e8e8e8 + 80009834: 00013b03 ld x22,0(x2) + 80009838: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs2: x1 = 0xe8e8e8e8e8e8e8e8 + 8000983c: 00013083 ld x1,0(x2) + 80009840: 00810113 addi x2,x2,8 + +0000000080009844 : +Zknd_aes64ds_cg_cp_sbox_b232: + aes64ds x6, x22, x1 # perform operation + 80009844: 3a1b0333 aes64ds x6,x22,x1 + # Check if x6 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x6, Zknd_aes64ds_cg_cp_sbox_b232, Zknd_aes64ds_cg_cp_sbox_b232_str) + 80009848: 0008b203 ld x4,0(x17) + 8000984c: 00620c63 beq x4,x6,80009864 + 80009850: 0b1012ef jal x5,8000b100 + 80009854: 80009844 .word 0x80009844 + 80009858: 00000000 .word 0x00000000 + 8000985c: 80020b22 .word 0x80020b22 + 80009860: 00000000 .word 0x00000000 + 80009864: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xe9e9e9e9e9e9e9e9 + 80009868: 00013483 ld x9,0(x2) + 8000986c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs2: x7 = 0xe9e9e9e9e9e9e9e9 + 80009870: 00013383 ld x7,0(x2) + 80009874: 00810113 addi x2,x2,8 + +0000000080009878 : +Zknd_aes64ds_cg_cp_sbox_b233: + aes64ds x26, x9, x7 # perform operation + 80009878: 3a748d33 aes64ds x26,x9,x7 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b233, Zknd_aes64ds_cg_cp_sbox_b233_str) + 8000987c: 0008b203 ld x4,0(x17) + 80009880: 01a20c63 beq x4,x26,80009898 + 80009884: 07d012ef jal x5,8000b100 + 80009888: 80009878 .word 0x80009878 + 8000988c: 00000000 .word 0x00000000 + 80009890: 80020b5b .word 0x80020b5b + 80009894: 00000000 .word 0x00000000 + 80009898: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xeaeaeaeaeaeaeaea + 8000989c: 00013b03 ld x22,0(x2) + 800098a0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xeaeaeaeaeaeaeaea + 800098a4: 00013c03 ld x24,0(x2) + 800098a8: 00810113 addi x2,x2,8 + +00000000800098ac : +Zknd_aes64ds_cg_cp_sbox_b234: + aes64ds x27, x22, x24 # perform operation + 800098ac: 3b8b0db3 aes64ds x27,x22,x24 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknd_aes64ds_cg_cp_sbox_b234, Zknd_aes64ds_cg_cp_sbox_b234_str) + 800098b0: 0008b203 ld x4,0(x17) + 800098b4: 01b20c63 beq x4,x27,800098cc + 800098b8: 049012ef jal x5,8000b100 + 800098bc: 800098ac .word 0x800098ac + 800098c0: 00000000 .word 0x00000000 + 800098c4: 80020b94 .word 0x80020b94 + 800098c8: 00000000 .word 0x00000000 + 800098cc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xebebebebebebebeb + 800098d0: 00013a03 ld x20,0(x2) + 800098d4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xebebebebebebebeb + 800098d8: 00013703 ld x14,0(x2) + 800098dc: 00810113 addi x2,x2,8 + +00000000800098e0 : +Zknd_aes64ds_cg_cp_sbox_b235: + aes64ds x18, x20, x14 # perform operation + 800098e0: 3aea0933 aes64ds x18,x20,x14 + # Check if x18 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x18, Zknd_aes64ds_cg_cp_sbox_b235, Zknd_aes64ds_cg_cp_sbox_b235_str) + 800098e4: 0008b203 ld x4,0(x17) + 800098e8: 01220c63 beq x4,x18,80009900 + 800098ec: 015012ef jal x5,8000b100 + 800098f0: 800098e0 .word 0x800098e0 + 800098f4: 00000000 .word 0x00000000 + 800098f8: 80020bcd .word 0x80020bcd + 800098fc: 00000000 .word 0x00000000 + 80009900: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xecececececececec + 80009904: 00013783 ld x15,0(x2) + 80009908: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs2: x12 = 0xecececececececec + 8000990c: 00013603 ld x12,0(x2) + 80009910: 00810113 addi x2,x2,8 + +0000000080009914 : +Zknd_aes64ds_cg_cp_sbox_b236: + aes64ds x7, x15, x12 # perform operation + 80009914: 3ac783b3 aes64ds x7,x15,x12 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b236, Zknd_aes64ds_cg_cp_sbox_b236_str) + 80009918: 0008b203 ld x4,0(x17) + 8000991c: 00720c63 beq x4,x7,80009934 + 80009920: 7e0012ef jal x5,8000b100 + 80009924: 80009914 .word 0x80009914 + 80009928: 00000000 .word 0x00000000 + 8000992c: 80020c06 .word 0x80020c06 + 80009930: 00000000 .word 0x00000000 + 80009934: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xedededededededed + 80009938: 00013483 ld x9,0(x2) + 8000993c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs2: x22 = 0xedededededededed + 80009940: 00013b03 ld x22,0(x2) + 80009944: 00810113 addi x2,x2,8 + +0000000080009948 : +Zknd_aes64ds_cg_cp_sbox_b237: + aes64ds x11, x9, x22 # perform operation + 80009948: 3b6485b3 aes64ds x11,x9,x22 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b237, Zknd_aes64ds_cg_cp_sbox_b237_str) + 8000994c: 0008b203 ld x4,0(x17) + 80009950: 00b20c63 beq x4,x11,80009968 + 80009954: 7ac012ef jal x5,8000b100 + 80009958: 80009948 .word 0x80009948 + 8000995c: 00000000 .word 0x00000000 + 80009960: 80020c3f .word 0x80020c3f + 80009964: 00000000 .word 0x00000000 + 80009968: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xeeeeeeeeeeeeeeee + 8000996c: 00013b03 ld x22,0(x2) + 80009970: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xeeeeeeeeeeeeeeee + 80009974: 00013f03 ld x30,0(x2) + 80009978: 00810113 addi x2,x2,8 + +000000008000997c : +Zknd_aes64ds_cg_cp_sbox_b238: + aes64ds x9, x22, x30 # perform operation + 8000997c: 3beb04b3 aes64ds x9,x22,x30 + # Check if x9 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x9, Zknd_aes64ds_cg_cp_sbox_b238, Zknd_aes64ds_cg_cp_sbox_b238_str) + 80009980: 0008b203 ld x4,0(x17) + 80009984: 00920c63 beq x4,x9,8000999c + 80009988: 778012ef jal x5,8000b100 + 8000998c: 8000997c .word 0x8000997c + 80009990: 00000000 .word 0x00000000 + 80009994: 80020c78 .word 0x80020c78 + 80009998: 00000000 .word 0x00000000 + 8000999c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xefefefefefefefef + 800099a0: 00013c83 ld x25,0(x2) + 800099a4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs2: x16 = 0xefefefefefefefef + 800099a8: 00013803 ld x16,0(x2) + 800099ac: 00810113 addi x2,x2,8 + +00000000800099b0 : +Zknd_aes64ds_cg_cp_sbox_b239: + aes64ds x19, x25, x16 # perform operation + 800099b0: 3b0c89b3 aes64ds x19,x25,x16 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ds_cg_cp_sbox_b239, Zknd_aes64ds_cg_cp_sbox_b239_str) + 800099b4: 0008b203 ld x4,0(x17) + 800099b8: 01320c63 beq x4,x19,800099d0 + 800099bc: 744012ef jal x5,8000b100 + 800099c0: 800099b0 .word 0x800099b0 + 800099c4: 00000000 .word 0x00000000 + 800099c8: 80020cb1 .word 0x80020cb1 + 800099cc: 00000000 .word 0x00000000 + 800099d0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xf0f0f0f0f0f0f0f0 + 800099d4: 00013083 ld x1,0(x2) + 800099d8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs2: x14 = 0xf0f0f0f0f0f0f0f0 + 800099dc: 00013703 ld x14,0(x2) + 800099e0: 00810113 addi x2,x2,8 + +00000000800099e4 : +Zknd_aes64ds_cg_cp_sbox_b240: + aes64ds x28, x1, x14 # perform operation + 800099e4: 3ae08e33 aes64ds x28,x1,x14 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b240, Zknd_aes64ds_cg_cp_sbox_b240_str) + 800099e8: 0008b203 ld x4,0(x17) + 800099ec: 01c20c63 beq x4,x28,80009a04 + 800099f0: 710012ef jal x5,8000b100 + 800099f4: 800099e4 .word 0x800099e4 + 800099f8: 00000000 .word 0x00000000 + 800099fc: 80020cea .word 0x80020cea + 80009a00: 00000000 .word 0x00000000 + 80009a04: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xf1f1f1f1f1f1f1f1 + 80009a08: 00013c83 ld x25,0(x2) + 80009a0c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs2: x19 = 0xf1f1f1f1f1f1f1f1 + 80009a10: 00013983 ld x19,0(x2) + 80009a14: 00810113 addi x2,x2,8 + +0000000080009a18 : +Zknd_aes64ds_cg_cp_sbox_b241: + aes64ds x7, x25, x19 # perform operation + 80009a18: 3b3c83b3 aes64ds x7,x25,x19 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ds_cg_cp_sbox_b241, Zknd_aes64ds_cg_cp_sbox_b241_str) + 80009a1c: 0008b203 ld x4,0(x17) + 80009a20: 00720c63 beq x4,x7,80009a38 + 80009a24: 6dc012ef jal x5,8000b100 + 80009a28: 80009a18 .word 0x80009a18 + 80009a2c: 00000000 .word 0x00000000 + 80009a30: 80020d23 .word 0x80020d23 + 80009a34: 00000000 .word 0x00000000 + 80009a38: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xf2f2f2f2f2f2f2f2 + 80009a3c: 00013a83 ld x21,0(x2) + 80009a40: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xf2f2f2f2f2f2f2f2 + 80009a44: 00013183 ld x3,0(x2) + 80009a48: 00810113 addi x2,x2,8 + +0000000080009a4c : +Zknd_aes64ds_cg_cp_sbox_b242: + aes64ds x24, x21, x3 # perform operation + 80009a4c: 3a3a8c33 aes64ds x24,x21,x3 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b242, Zknd_aes64ds_cg_cp_sbox_b242_str) + 80009a50: 0008b203 ld x4,0(x17) + 80009a54: 01820c63 beq x4,x24,80009a6c + 80009a58: 6a8012ef jal x5,8000b100 + 80009a5c: 80009a4c .word 0x80009a4c + 80009a60: 00000000 .word 0x00000000 + 80009a64: 80020d5c .word 0x80020d5c + 80009a68: 00000000 .word 0x00000000 + 80009a6c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0xf3f3f3f3f3f3f3f3 + 80009a70: 00013783 ld x15,0(x2) + 80009a74: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xf3f3f3f3f3f3f3f3 + 80009a78: 00013903 ld x18,0(x2) + 80009a7c: 00810113 addi x2,x2,8 + +0000000080009a80 : +Zknd_aes64ds_cg_cp_sbox_b243: + aes64ds x24, x15, x18 # perform operation + 80009a80: 3b278c33 aes64ds x24,x15,x18 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b243, Zknd_aes64ds_cg_cp_sbox_b243_str) + 80009a84: 0008b203 ld x4,0(x17) + 80009a88: 01820c63 beq x4,x24,80009aa0 + 80009a8c: 674012ef jal x5,8000b100 + 80009a90: 80009a80 .word 0x80009a80 + 80009a94: 00000000 .word 0x00000000 + 80009a98: 80020d95 .word 0x80020d95 + 80009a9c: 00000000 .word 0x00000000 + 80009aa0: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0xf4f4f4f4f4f4f4f4 + 80009aa4: 00013383 ld x7,0(x2) + 80009aa8: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs2: x9 = 0xf4f4f4f4f4f4f4f4 + 80009aac: 00013483 ld x9,0(x2) + 80009ab0: 00810113 addi x2,x2,8 + +0000000080009ab4 : +Zknd_aes64ds_cg_cp_sbox_b244: + aes64ds x10, x7, x9 # perform operation + 80009ab4: 3a938533 aes64ds x10,x7,x9 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ds_cg_cp_sbox_b244, Zknd_aes64ds_cg_cp_sbox_b244_str) + 80009ab8: 0008b203 ld x4,0(x17) + 80009abc: 00a20c63 beq x4,x10,80009ad4 + 80009ac0: 640012ef jal x5,8000b100 + 80009ac4: 80009ab4 .word 0x80009ab4 + 80009ac8: 00000000 .word 0x00000000 + 80009acc: 80020dce .word 0x80020dce + 80009ad0: 00000000 .word 0x00000000 + 80009ad4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xf5f5f5f5f5f5f5f5 + 80009ad8: 00013983 ld x19,0(x2) + 80009adc: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xf5f5f5f5f5f5f5f5 + 80009ae0: 00013503 ld x10,0(x2) + 80009ae4: 00810113 addi x2,x2,8 + +0000000080009ae8 : +Zknd_aes64ds_cg_cp_sbox_b245: + aes64ds x20, x19, x10 # perform operation + 80009ae8: 3aa98a33 aes64ds x20,x19,x10 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknd_aes64ds_cg_cp_sbox_b245, Zknd_aes64ds_cg_cp_sbox_b245_str) + 80009aec: 0008b203 ld x4,0(x17) + 80009af0: 01420c63 beq x4,x20,80009b08 + 80009af4: 60c012ef jal x5,8000b100 + 80009af8: 80009ae8 .word 0x80009ae8 + 80009afc: 00000000 .word 0x00000000 + 80009b00: 80020e07 .word 0x80020e07 + 80009b04: 00000000 .word 0x00000000 + 80009b08: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0xf6f6f6f6f6f6f6f6 + 80009b0c: 00013f83 ld x31,0(x2) + 80009b10: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs2: x30 = 0xf6f6f6f6f6f6f6f6 + 80009b14: 00013f03 ld x30,0(x2) + 80009b18: 00810113 addi x2,x2,8 + +0000000080009b1c : +Zknd_aes64ds_cg_cp_sbox_b246: + aes64ds x15, x31, x30 # perform operation + 80009b1c: 3bef87b3 aes64ds x15,x31,x30 + # Check if x15 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x15, Zknd_aes64ds_cg_cp_sbox_b246, Zknd_aes64ds_cg_cp_sbox_b246_str) + 80009b20: 0008b203 ld x4,0(x17) + 80009b24: 00f20c63 beq x4,x15,80009b3c + 80009b28: 5d8012ef jal x5,8000b100 + 80009b2c: 80009b1c .word 0x80009b1c + 80009b30: 00000000 .word 0x00000000 + 80009b34: 80020e40 .word 0x80020e40 + 80009b38: 00000000 .word 0x00000000 + 80009b3c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xf7f7f7f7f7f7f7f7 + 80009b40: 00013703 ld x14,0(x2) + 80009b44: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs2: x21 = 0xf7f7f7f7f7f7f7f7 + 80009b48: 00013a83 ld x21,0(x2) + 80009b4c: 00810113 addi x2,x2,8 + +0000000080009b50 : +Zknd_aes64ds_cg_cp_sbox_b247: + aes64ds x29, x14, x21 # perform operation + 80009b50: 3b570eb3 aes64ds x29,x14,x21 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b247, Zknd_aes64ds_cg_cp_sbox_b247_str) + 80009b54: 0008b203 ld x4,0(x17) + 80009b58: 01d20c63 beq x4,x29,80009b70 + 80009b5c: 5a4012ef jal x5,8000b100 + 80009b60: 80009b50 .word 0x80009b50 + 80009b64: 00000000 .word 0x00000000 + 80009b68: 80020e79 .word 0x80020e79 + 80009b6c: 00000000 .word 0x00000000 + 80009b70: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0xf8f8f8f8f8f8f8f8 + 80009b74: 00013303 ld x6,0(x2) + 80009b78: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs2: x18 = 0xf8f8f8f8f8f8f8f8 + 80009b7c: 00013903 ld x18,0(x2) + 80009b80: 00810113 addi x2,x2,8 + +0000000080009b84 : +Zknd_aes64ds_cg_cp_sbox_b248: + aes64ds x11, x6, x18 # perform operation + 80009b84: 3b2305b3 aes64ds x11,x6,x18 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b248, Zknd_aes64ds_cg_cp_sbox_b248_str) + 80009b88: 0008b203 ld x4,0(x17) + 80009b8c: 00b20c63 beq x4,x11,80009ba4 + 80009b90: 570012ef jal x5,8000b100 + 80009b94: 80009b84 .word 0x80009b84 + 80009b98: 00000000 .word 0x00000000 + 80009b9c: 80020eb2 .word 0x80020eb2 + 80009ba0: 00000000 .word 0x00000000 + 80009ba4: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0xf9f9f9f9f9f9f9f9 + 80009ba8: 00013683 ld x13,0(x2) + 80009bac: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x8) # load rs2: x8 = 0xf9f9f9f9f9f9f9f9 + 80009bb0: 00013403 ld x8,0(x2) + 80009bb4: 00810113 addi x2,x2,8 + +0000000080009bb8 : +Zknd_aes64ds_cg_cp_sbox_b249: + aes64ds x29, x13, x8 # perform operation + 80009bb8: 3a868eb3 aes64ds x29,x13,x8 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknd_aes64ds_cg_cp_sbox_b249, Zknd_aes64ds_cg_cp_sbox_b249_str) + 80009bbc: 0008b203 ld x4,0(x17) + 80009bc0: 01d20c63 beq x4,x29,80009bd8 + 80009bc4: 53c012ef jal x5,8000b100 + 80009bc8: 80009bb8 .word 0x80009bb8 + 80009bcc: 00000000 .word 0x00000000 + 80009bd0: 80020eeb .word 0x80020eeb + 80009bd4: 00000000 .word 0x00000000 + 80009bd8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xfafafafafafafafa + 80009bdc: 00013d03 ld x26,0(x2) + 80009be0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs2: x24 = 0xfafafafafafafafa + 80009be4: 00013c03 ld x24,0(x2) + 80009be8: 00810113 addi x2,x2,8 + +0000000080009bec : +Zknd_aes64ds_cg_cp_sbox_b250: + aes64ds x28, x26, x24 # perform operation + 80009bec: 3b8d0e33 aes64ds x28,x26,x24 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b250, Zknd_aes64ds_cg_cp_sbox_b250_str) + 80009bf0: 0008b203 ld x4,0(x17) + 80009bf4: 01c20c63 beq x4,x28,80009c0c + 80009bf8: 508012ef jal x5,8000b100 + 80009bfc: 80009bec .word 0x80009bec + 80009c00: 00000000 .word 0x00000000 + 80009c04: 80020f24 .word 0x80020f24 + 80009c08: 00000000 .word 0x00000000 + 80009c0c: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs1: x10 = 0xfbfbfbfbfbfbfbfb + 80009c10: 00013503 ld x10,0(x2) + 80009c14: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs2: x31 = 0xfbfbfbfbfbfbfbfb + 80009c18: 00013f83 ld x31,0(x2) + 80009c1c: 00810113 addi x2,x2,8 + +0000000080009c20 : +Zknd_aes64ds_cg_cp_sbox_b251: + aes64ds x24, x10, x31 # perform operation + 80009c20: 3bf50c33 aes64ds x24,x10,x31 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zknd_aes64ds_cg_cp_sbox_b251, Zknd_aes64ds_cg_cp_sbox_b251_str) + 80009c24: 0008b203 ld x4,0(x17) + 80009c28: 01820c63 beq x4,x24,80009c40 + 80009c2c: 4d4012ef jal x5,8000b100 + 80009c30: 80009c20 .word 0x80009c20 + 80009c34: 00000000 .word 0x00000000 + 80009c38: 80020f5d .word 0x80020f5d + 80009c3c: 00000000 .word 0x00000000 + 80009c40: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0xfcfcfcfcfcfcfcfc + 80009c44: 00013703 ld x14,0(x2) + 80009c48: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs2: x27 = 0xfcfcfcfcfcfcfcfc + 80009c4c: 00013d83 ld x27,0(x2) + 80009c50: 00810113 addi x2,x2,8 + +0000000080009c54 : +Zknd_aes64ds_cg_cp_sbox_b252: + aes64ds x30, x14, x27 # perform operation + 80009c54: 3bb70f33 aes64ds x30,x14,x27 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknd_aes64ds_cg_cp_sbox_b252, Zknd_aes64ds_cg_cp_sbox_b252_str) + 80009c58: 0008b203 ld x4,0(x17) + 80009c5c: 01e20c63 beq x4,x30,80009c74 + 80009c60: 4a0012ef jal x5,8000b100 + 80009c64: 80009c54 .word 0x80009c54 + 80009c68: 00000000 .word 0x00000000 + 80009c6c: 80020f96 .word 0x80020f96 + 80009c70: 00000000 .word 0x00000000 + 80009c74: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xfdfdfdfdfdfdfdfd + 80009c78: 00013983 ld x19,0(x2) + 80009c7c: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x10) # load rs2: x10 = 0xfdfdfdfdfdfdfdfd + 80009c80: 00013503 ld x10,0(x2) + 80009c84: 00810113 addi x2,x2,8 + +0000000080009c88 : +Zknd_aes64ds_cg_cp_sbox_b253: + aes64ds x11, x19, x10 # perform operation + 80009c88: 3aa985b3 aes64ds x11,x19,x10 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknd_aes64ds_cg_cp_sbox_b253, Zknd_aes64ds_cg_cp_sbox_b253_str) + 80009c8c: 0008b203 ld x4,0(x17) + 80009c90: 00b20c63 beq x4,x11,80009ca8 + 80009c94: 46c012ef jal x5,8000b100 + 80009c98: 80009c88 .word 0x80009c88 + 80009c9c: 00000000 .word 0x00000000 + 80009ca0: 80020fcf .word 0x80020fcf + 80009ca4: 00000000 .word 0x00000000 + 80009ca8: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xfefefefefefefefe + 80009cac: 00013a83 ld x21,0(x2) + 80009cb0: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs2: x3 = 0xfefefefefefefefe + 80009cb4: 00013183 ld x3,0(x2) + 80009cb8: 00810113 addi x2,x2,8 + +0000000080009cbc : +Zknd_aes64ds_cg_cp_sbox_b254: + aes64ds x26, x21, x3 # perform operation + 80009cbc: 3a3a8d33 aes64ds x26,x21,x3 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ds_cg_cp_sbox_b254, Zknd_aes64ds_cg_cp_sbox_b254_str) + 80009cc0: 0008b203 ld x4,0(x17) + 80009cc4: 01a20c63 beq x4,x26,80009cdc + 80009cc8: 438012ef jal x5,8000b100 + 80009ccc: 80009cbc .word 0x80009cbc + 80009cd0: 00000000 .word 0x00000000 + 80009cd4: 80021008 .word 0x80021008 + 80009cd8: 00000000 .word 0x00000000 + 80009cdc: 00888893 addi x17,x17,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xffffffffffffffff + 80009ce0: 00013b83 ld x23,0(x2) + 80009ce4: 00810113 addi x2,x2,8 + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs2: x6 = 0xffffffffffffffff + 80009ce8: 00013303 ld x6,0(x2) + 80009cec: 00810113 addi x2,x2,8 + +0000000080009cf0 : +Zknd_aes64ds_cg_cp_sbox_b255: + aes64ds x28, x23, x6 # perform operation + 80009cf0: 3a6b8e33 aes64ds x28,x23,x6 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ds_cg_cp_sbox_b255, Zknd_aes64ds_cg_cp_sbox_b255_str) + 80009cf4: 0008b203 ld x4,0(x17) + 80009cf8: 01c20c63 beq x4,x28,80009d10 + 80009cfc: 404012ef jal x5,8000b100 + 80009d00: 80009cf0 .word 0x80009cf0 + 80009d04: 00000000 .word 0x00000000 + 80009d08: 80021041 .word 0x80021041 + 80009d0c: 00000000 .word 0x00000000 + 80009d10: 00888893 addi x17,x17,8 + + mv x2, x17 # restore signature pointer to default register for teardown + 80009d14: 00088113 addi x2,x17,0 + +0000000080009d18 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009d18: 00000513 addi x10,x0,0 + 80009d1c: 00000073 ecall + 80009d20: fff00513 addi x10,x0,-1 + 80009d24: 25800413 addi x8,x0,600 + +0000000080009d28 : + 80009d28: 34002373 csrrs x6,mscratch,x0 + +0000000080009d2c : + 80009d2c: 2b833383 ld x7,696(x6) + +0000000080009d30 : + 80009d30: 2a033383 ld x7,672(x6) + +0000000080009d34 : + 80009d34: 2d033483 ld x9,720(x6) + 80009d38: 34049073 csrrw x0,mscratch,x9 + +0000000080009d3c : + 80009d3c: 2c833483 ld x9,712(x6) + 80009d40: 305493f3 csrrw x7,mtvec,x9 + 80009d44: ffc4f493 andi x9,x9,-4 + 80009d48: ffc3f393 andi x7,x7,-4 + 80009d4c: 00749e63 bne x9,x7,80009d68 + +0000000080009d50 : + 80009d50: 00030493 addi x9,x6,0 + +0000000080009d54 : + 80009d54: 0004a783 lw x15,0(x9) + 80009d58: 00f3a023 sw x15,0(x7) + 80009d5c: 00438393 addi x7,x7,4 + 80009d60: 00448493 addi x9,x9,4 + 80009d64: fe83c8e3 blt x7,x8,80009d54 + 80009d68: 0000100f fence.i + +0000000080009d6c : + 80009d6c: 00000013 addi x0,x0,0 + 80009d70: 00000013 addi x0,x0,0 + 80009d74: 00000013 addi x0,x0,0 + 80009d78: 00000013 addi x0,x0,0 + 80009d7c: 00000013 addi x0,x0,0 + 80009d80: 00000497 auipc x9,0x0 + 80009d84: 2b048493 addi x9,x9,688 # 8000a030 + 80009d88: 00000013 addi x0,x0,0 + 80009d8c: 00000013 addi x0,x0,0 + 80009d90: 00000013 addi x0,x0,0 + 80009d94: 00000013 addi x0,x0,0 + 80009d98: 00000013 addi x0,x0,0 + 80009d9c: 00000013 addi x0,x0,0 + 80009da0: 10e49863 bne x9,x14,80009eb0 + 80009da4: 00000013 addi x0,x0,0 + 80009da8: 00000013 addi x0,x0,0 + 80009dac: 00000013 addi x0,x0,0 + 80009db0: 00000013 addi x0,x0,0 + 80009db4: 00000013 addi x0,x0,0 + 80009db8: 00000013 addi x0,x0,0 + 80009dbc: 00000013 addi x0,x0,0 + 80009dc0: 00018517 auipc x10,0x18 + 80009dc4: 9e150513 addi x10,x10,-1567 # 800217a1 + 80009dc8: 00000013 addi x0,x0,0 + 80009dcc: 00000013 addi x0,x0,0 + 80009dd0: 00000013 addi x0,x0,0 + 80009dd4: 00000013 addi x0,x0,0 + 80009dd8: 00000013 addi x0,x0,0 + 80009ddc: 00000013 addi x0,x0,0 + 80009de0: 00038097 auipc x1,0x38 + 80009de4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 80009de8: 00000013 addi x0,x0,0 + 80009dec: 00000013 addi x0,x0,0 + 80009df0: 00000013 addi x0,x0,0 + 80009df4: 00000013 addi x0,x0,0 + 80009df8: 00000013 addi x0,x0,0 + 80009dfc: 00000013 addi x0,x0,0 + 80009e00: 00018517 auipc x10,0x18 + 80009e04: 9dd50513 addi x10,x10,-1571 # 800217dd + 80009e08: 00000013 addi x0,x0,0 + 80009e0c: 00000013 addi x0,x0,0 + 80009e10: 00000013 addi x0,x0,0 + 80009e14: 00000013 addi x0,x0,0 + 80009e18: 00000013 addi x0,x0,0 + 80009e1c: 00000013 addi x0,x0,0 + 80009e20: 00038097 auipc x1,0x38 + 80009e24: 784080e7 jalr x1,1924(x1) # 800425a4 + 80009e28: 00000013 addi x0,x0,0 + 80009e2c: 00000013 addi x0,x0,0 + 80009e30: 00000013 addi x0,x0,0 + 80009e34: 00000013 addi x0,x0,0 + 80009e38: 00000013 addi x0,x0,0 + 80009e3c: 00000013 addi x0,x0,0 + 80009e40: 00018517 auipc x10,0x18 + 80009e44: 9fd50513 addi x10,x10,-1539 # 8002183d + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00038097 auipc x1,0x38 + 80009e64: 744080e7 jalr x1,1860(x1) # 800425a4 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 00018517 auipc x10,0x18 + 80009e84: 56850513 addi x10,x10,1384 # 800223e8 + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00038097 auipc x1,0x38 + 80009ea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 80009ea8: 00038097 auipc x1,0x38 + 80009eac: 75c080e7 jalr x1,1884(x1) # 80042604 + +0000000080009eb0 : + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00006317 auipc x6,0x6 + 80009ec4: 4e830313 addi x6,x6,1256 # 800103a8 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00033303 ld x6,0(x6) + 80009ee4: 00000013 addi x0,x0,0 + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 0001a397 auipc x7,0x1a + 80009f04: 7e038393 addi x7,x7,2016 # 800246e0 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 40730333 sub x6,x6,x7 + 80009f24: 00000013 addi x0,x0,0 + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 0001a417 auipc x8,0x1a + 80009f44: 79040413 addi x8,x8,1936 # 800246d0 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00043203 ld x4,0(x8) + 80009f64: 00620c63 beq x4,x6,80009f7c + 80009f68: 200013ef jal x7,8000b168 + 80009f6c: 80009eb0 .word 0x80009eb0 + 80009f70: 00000000 .word 0x00000000 + 80009f74: 80021991 .word 0x80021991 + 80009f78: 00000000 .word 0x00000000 + +0000000080009f7c : + 80009f7c: 000004b7 lui x9,0x0 + 80009f80: 00048493 addi x9,x9,0 # 0 + 80009f84: 00b49493 slli x9,x9,0xb + 80009f88: 5d648493 addi x9,x9,1494 + 80009f8c: 00b49493 slli x9,x9,0xb + 80009f90: 43748493 addi x9,x9,1079 + 80009f94: 00a49493 slli x9,x9,0xa + 80009f98: 2ad48493 addi x9,x9,685 + 80009f9c: 00e49e63 bne x9,x14,80009fb8 + 80009fa0: 1c8013ef jal x7,8000b168 + 80009fa4: 8000a064 .word 0x8000a064 + 80009fa8: 00000000 .word 0x00000000 + 80009fac: 800217ff .word 0x800217ff + 80009fb0: 00000000 .word 0x00000000 + 80009fb4: 00000341 .word 0x00000341 + +0000000080009fb8 : + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00017517 auipc x10,0x17 + 80009fc4: 7a450513 addi x10,x10,1956 # 80021764 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 00038097 auipc x1,0x38 + 80009fe4: 5c4080e7 jalr x1,1476(x1) # 800425a4 + 80009fe8: 00038097 auipc x1,0x38 + 80009fec: 5fc080e7 jalr x1,1532(x1) # 800425e4 + +0000000080009ff0 : + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 00017517 auipc x10,0x17 + 8000a004: 7a150513 addi x10,x10,1953 # 800217a1 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 00038097 auipc x1,0x38 + 8000a024: 584080e7 jalr x1,1412(x1) # 800425a4 + 8000a028: 00038097 auipc x1,0x38 + 8000a02c: 5dc080e7 jalr x1,1500(x1) # 80042604 + +000000008000a030 : + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00000717 auipc x14,0x0 + 8000a044: ff070713 addi x14,x14,-16 # 8000a030 + 8000a048: 00000013 addi x0,x0,0 + 8000a04c: 00000013 addi x0,x0,0 + 8000a050: 00000013 addi x0,x0,0 + 8000a054: 00000013 addi x0,x0,0 + 8000a058: 00000013 addi x0,x0,0 + 8000a05c: 00000013 addi x0,x0,0 + 8000a060: cb9ff06f jal x0,80009d18 + +000000008000a064 : + 8000a064: 00000737 lui x14,0x0 + 8000a068: 00070713 addi x14,x14,0 # 0 + 8000a06c: 00b71713 slli x14,x14,0xb + 8000a070: 5d670713 addi x14,x14,1494 + 8000a074: 00b71713 slli x14,x14,0xb + 8000a078: 43770713 addi x14,x14,1079 + 8000a07c: 00a71713 slli x14,x14,0xa + 8000a080: 2ad70713 addi x14,x14,685 + 8000a084: c95ff06f jal x0,80009d18 + 8000a088: 00000013 addi x0,x0,0 + 8000a08c: 00000013 addi x0,x0,0 + 8000a090: 00000013 addi x0,x0,0 + 8000a094: 00000013 addi x0,x0,0 + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00000013 addi x0,x0,0 + 8000a0a4: 00000013 addi x0,x0,0 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + +000000008000a0c0 : + 8000a0c0: 1000006f jal x0,8000a1c0 + 8000a0c4: 1080006f jal x0,8000a1cc + 8000a0c8: 1100006f jal x0,8000a1d8 + 8000a0cc: 1180006f jal x0,8000a1e4 + 8000a0d0: 1200006f jal x0,8000a1f0 + 8000a0d4: 1280006f jal x0,8000a1fc + 8000a0d8: 1300006f jal x0,8000a208 + 8000a0dc: 1380006f jal x0,8000a214 + 8000a0e0: 1400006f jal x0,8000a220 + 8000a0e4: 1480006f jal x0,8000a22c + 8000a0e8: 1500006f jal x0,8000a238 + 8000a0ec: 1580006f jal x0,8000a244 + 8000a0f0: 1600006f jal x0,8000a250 + 8000a0f4: 1680006f jal x0,8000a25c + 8000a0f8: 1700006f jal x0,8000a268 + 8000a0fc: 1780006f jal x0,8000a274 + 8000a100: 1800006f jal x0,8000a280 + 8000a104: 1880006f jal x0,8000a28c + 8000a108: 1900006f jal x0,8000a298 + 8000a10c: 1980006f jal x0,8000a2a4 + 8000a110: 1a00006f jal x0,8000a2b0 + 8000a114: 1a80006f jal x0,8000a2bc + 8000a118: 1b00006f jal x0,8000a2c8 + 8000a11c: 1b80006f jal x0,8000a2d4 + 8000a120: 1c00006f jal x0,8000a2e0 + 8000a124: 1bc0006f jal x0,8000a2e0 + 8000a128: 1b80006f jal x0,8000a2e0 + 8000a12c: 1b40006f jal x0,8000a2e0 + 8000a130: 1b00006f jal x0,8000a2e0 + 8000a134: 1ac0006f jal x0,8000a2e0 + 8000a138: 1a80006f jal x0,8000a2e0 + 8000a13c: 1a40006f jal x0,8000a2e0 + 8000a140: 1a00006f jal x0,8000a2e0 + 8000a144: 19c0006f jal x0,8000a2e0 + 8000a148: 1980006f jal x0,8000a2e0 + 8000a14c: 1940006f jal x0,8000a2e0 + 8000a150: 1900006f jal x0,8000a2e0 + 8000a154: 18c0006f jal x0,8000a2e0 + 8000a158: 1880006f jal x0,8000a2e0 + 8000a15c: 1840006f jal x0,8000a2e0 + 8000a160: 1800006f jal x0,8000a2e0 + 8000a164: 17c0006f jal x0,8000a2e0 + 8000a168: 1780006f jal x0,8000a2e0 + 8000a16c: 1740006f jal x0,8000a2e0 + 8000a170: 1700006f jal x0,8000a2e0 + 8000a174: 16c0006f jal x0,8000a2e0 + 8000a178: 1680006f jal x0,8000a2e0 + 8000a17c: 1640006f jal x0,8000a2e0 + 8000a180: 1600006f jal x0,8000a2e0 + 8000a184: 15c0006f jal x0,8000a2e0 + 8000a188: 1580006f jal x0,8000a2e0 + 8000a18c: 1540006f jal x0,8000a2e0 + 8000a190: 1500006f jal x0,8000a2e0 + 8000a194: 14c0006f jal x0,8000a2e0 + 8000a198: 1480006f jal x0,8000a2e0 + 8000a19c: 1440006f jal x0,8000a2e0 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 13c0006f jal x0,8000a2e0 + 8000a1a8: 1380006f jal x0,8000a2e0 + 8000a1ac: 1340006f jal x0,8000a2e0 + 8000a1b0: 1300006f jal x0,8000a2e0 + 8000a1b4: 12c0006f jal x0,8000a2e0 + 8000a1b8: 1280006f jal x0,8000a2e0 + 8000a1bc: 1240006f jal x0,8000a2e0 + +000000008000a1c0 : + 8000a1c0: 34011173 csrrw x2,mscratch,x2 + 8000a1c4: 30f13423 sd x15,776(x2) + 8000a1c8: 13c007ef jal x15,8000a304 + 8000a1cc: 34011173 csrrw x2,mscratch,x2 + 8000a1d0: 30f13423 sd x15,776(x2) + 8000a1d4: 130007ef jal x15,8000a304 + 8000a1d8: 34011173 csrrw x2,mscratch,x2 + 8000a1dc: 30f13423 sd x15,776(x2) + 8000a1e0: 124007ef jal x15,8000a304 + 8000a1e4: 34011173 csrrw x2,mscratch,x2 + 8000a1e8: 30f13423 sd x15,776(x2) + 8000a1ec: 118007ef jal x15,8000a304 + 8000a1f0: 34011173 csrrw x2,mscratch,x2 + 8000a1f4: 30f13423 sd x15,776(x2) + 8000a1f8: 10c007ef jal x15,8000a304 + 8000a1fc: 34011173 csrrw x2,mscratch,x2 + 8000a200: 30f13423 sd x15,776(x2) + 8000a204: 100007ef jal x15,8000a304 + 8000a208: 34011173 csrrw x2,mscratch,x2 + 8000a20c: 30f13423 sd x15,776(x2) + 8000a210: 0f4007ef jal x15,8000a304 + 8000a214: 34011173 csrrw x2,mscratch,x2 + 8000a218: 30f13423 sd x15,776(x2) + 8000a21c: 0e8007ef jal x15,8000a304 + 8000a220: 34011173 csrrw x2,mscratch,x2 + 8000a224: 30f13423 sd x15,776(x2) + 8000a228: 0dc007ef jal x15,8000a304 + 8000a22c: 34011173 csrrw x2,mscratch,x2 + 8000a230: 30f13423 sd x15,776(x2) + 8000a234: 0d0007ef jal x15,8000a304 + 8000a238: 34011173 csrrw x2,mscratch,x2 + 8000a23c: 30f13423 sd x15,776(x2) + 8000a240: 0c4007ef jal x15,8000a304 + 8000a244: 34011173 csrrw x2,mscratch,x2 + 8000a248: 30f13423 sd x15,776(x2) + 8000a24c: 0b8007ef jal x15,8000a304 + 8000a250: 34011173 csrrw x2,mscratch,x2 + 8000a254: 30f13423 sd x15,776(x2) + 8000a258: 0ac007ef jal x15,8000a304 + 8000a25c: 34011173 csrrw x2,mscratch,x2 + 8000a260: 30f13423 sd x15,776(x2) + 8000a264: 0a0007ef jal x15,8000a304 + 8000a268: 34011173 csrrw x2,mscratch,x2 + 8000a26c: 30f13423 sd x15,776(x2) + 8000a270: 094007ef jal x15,8000a304 + 8000a274: 34011173 csrrw x2,mscratch,x2 + 8000a278: 30f13423 sd x15,776(x2) + 8000a27c: 088007ef jal x15,8000a304 + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 07c007ef jal x15,8000a304 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 070007ef jal x15,8000a304 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 064007ef jal x15,8000a304 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 058007ef jal x15,8000a304 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 04c007ef jal x15,8000a304 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 040007ef jal x15,8000a304 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 034007ef jal x15,8000a304 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 028007ef jal x15,8000a304 + +000000008000a2e0 : + 8000a2e0: 00000317 auipc x6,0x0 + 8000a2e4: a8c30313 addi x6,x6,-1396 # 80009d6c + 8000a2e8: 00000013 addi x0,x0,0 + 8000a2ec: 00000013 addi x0,x0,0 + 8000a2f0: 00000013 addi x0,x0,0 + 8000a2f4: 00000013 addi x0,x0,0 + 8000a2f8: 00000013 addi x0,x0,0 + 8000a2fc: 00000013 addi x0,x0,0 + 8000a300: 00030067 jalr x0,0(x6) + +000000008000a304 : + 8000a304: 30e13023 sd x14,768(x2) + 8000a308: 34011773 csrrw x14,mscratch,x2 + 8000a30c: 30e13823 sd x14,784(x2) + 8000a310: 2b013703 ld x14,688(x2) + 8000a314: 00070067 jalr x0,0(x14) + +000000008000a318 : + 8000a318: 2e913c23 sd x9,760(x2) + 8000a31c: 2e813823 sd x8,752(x2) + 8000a320: 2e713423 sd x7,744(x2) + 8000a324: 2e613023 sd x6,736(x2) + 8000a328: 00000013 addi x0,x0,0 + 8000a32c: 00000013 addi x0,x0,0 + 8000a330: 00000013 addi x0,x0,0 + 8000a334: 00000013 addi x0,x0,0 + 8000a338: 00000013 addi x0,x0,0 + 8000a33c: 00000013 addi x0,x0,0 + 8000a340: 00006317 auipc x6,0x6 + 8000a344: dc830313 addi x6,x6,-568 # 80010108 + 8000a348: 00000013 addi x0,x0,0 + 8000a34c: 00000013 addi x0,x0,0 + 8000a350: 00000013 addi x0,x0,0 + 8000a354: 00000013 addi x0,x0,0 + 8000a358: 00000013 addi x0,x0,0 + 8000a35c: 00000013 addi x0,x0,0 + 8000a360: 00033383 ld x7,0(x6) + 8000a364: 00138393 addi x7,x7,1 + 8000a368: 00733023 sd x7,0(x6) + 8000a36c: 34202773 csrrs x14,mcause,x0 + +000000008000a370 : + 8000a370: fff00493 addi x9,x0,-1 + 8000a374: 00d4d493 srli x9,x9,0xd + 8000a378: 00c49493 slli x9,x9,0xc + 8000a37c: fff4c493 xori x9,x9,-1 + 8000a380: 00e4f4b3 and x9,x9,x14 + +000000008000a384 : + 8000a384: ffe48413 addi x8,x9,-2 + 8000a388: 00041663 bne x8,x0,8000a394 + +000000008000a38c : + 8000a38c: 500502e3 beq x10,x0,8000b090 + 8000a390: 5b40006f jal x0,8000a944 + +000000008000a394 : + 8000a394: ff848413 addi x8,x9,-8 + 8000a398: 00245413 srli x8,x8,0x2 + 8000a39c: 5a041463 bne x8,x0,8000a944 + +000000008000a3a0 : + 8000a3a0: 4e0508e3 beq x10,x0,8000b090 + +000000008000a3a4 : + 8000a3a4: fff50493 addi x9,x10,-1 + 8000a3a8: 00500393 addi x7,x0,5 + 8000a3ac: 0274e063 bltu x9,x7,8000a3cc + 8000a3b0: 07300393 addi x7,x0,115 + 8000a3b4: 00750463 beq x10,x7,8000a3bc + 8000a3b8: 08c0006f jal x0,8000a444 + +000000008000a3bc : + 8000a3bc: 34102573 csrrs x10,mepc,x0 + 8000a3c0: 00450413 addi x8,x10,4 + 8000a3c4: 34141073 csrrw x0,mepc,x8 + 8000a3c8: 0310006f jal x0,8000abf8 + +000000008000a3cc : + 8000a3cc: 341024f3 csrrs x9,mepc,x0 + 8000a3d0: 00448493 addi x9,x9,4 + 8000a3d4: 34149073 csrrw x0,mepc,x9 + 8000a3d8: 00100393 addi x7,x0,1 + 8000a3dc: 00750e63 beq x10,x7,8000a3f8 + 8000a3e0: 00200393 addi x7,x0,2 + 8000a3e4: 02750463 beq x10,x7,8000a40c + 8000a3e8: 00300393 addi x7,x0,3 + 8000a3ec: 04750063 beq x10,x7,8000a42c + 8000a3f0: fff00513 addi x10,x0,-1 + 8000a3f4: 0050006f jal x0,8000abf8 + +000000008000a3f8 : + 8000a3f8: fff00493 addi x9,x0,-1 + 8000a3fc: 03e4d493 srli x9,x9,0x3e + 8000a400: 00b49493 slli x9,x9,0xb + 8000a404: 3004a073 csrrs x0,mstatus,x9 + 8000a408: 7f00006f jal x0,8000abf8 + +000000008000a40c : + 8000a40c: fff00493 addi x9,x0,-1 + 8000a410: 03e4d493 srli x9,x9,0x3e + 8000a414: 00b49493 slli x9,x9,0xb + 8000a418: 3004b073 csrrc x0,mstatus,x9 + 8000a41c: 00100493 addi x9,x0,1 + 8000a420: 00b49493 slli x9,x9,0xb + 8000a424: 3004a073 csrrs x0,mstatus,x9 + 8000a428: 7d00006f jal x0,8000abf8 + +000000008000a42c : + 8000a42c: fff00493 addi x9,x0,-1 + 8000a430: 03e4d493 srli x9,x9,0x3e + 8000a434: 00b49493 slli x9,x9,0xb + 8000a438: 3004b073 csrrc x0,mstatus,x9 + 8000a43c: 7bc0006f jal x0,8000abf8 + +000000008000a440 : + 8000a440: 00000013 addi x0,x0,0 + +000000008000a444 : + 8000a444: 00000013 addi x0,x0,0 + 8000a448: 00000013 addi x0,x0,0 + 8000a44c: 00000013 addi x0,x0,0 + 8000a450: 00000013 addi x0,x0,0 + 8000a454: 00000013 addi x0,x0,0 + 8000a458: 00000013 addi x0,x0,0 + 8000a45c: 00000013 addi x0,x0,0 + 8000a460: 00000397 auipc x7,0x0 + 8000a464: 17038393 addi x7,x7,368 # 8000a5d0 + 8000a468: 00000013 addi x0,x0,0 + 8000a46c: 00000013 addi x0,x0,0 + 8000a470: 00000013 addi x0,x0,0 + 8000a474: 00000013 addi x0,x0,0 + 8000a478: 00000013 addi x0,x0,0 + 8000a47c: 00000013 addi x0,x0,0 + +000000008000a480 : + 8000a480: 0003e403 lwu x8,0(x7) + 8000a484: 00a40863 beq x8,x10,8000a494 + 8000a488: 04040863 beq x8,x0,8000a4d8 + 8000a48c: 00838393 addi x7,x7,8 + 8000a490: ff1ff06f jal x0,8000a480 + +000000008000a494 : + 8000a494: 00008493 addi x9,x1,0 + 8000a498: 00000013 addi x0,x0,0 + 8000a49c: 00000013 addi x0,x0,0 + 8000a4a0: 00000097 auipc x1,0x0 + 8000a4a4: 02408093 addi x1,x1,36 # 8000a4c4 + 8000a4a8: 00000013 addi x0,x0,0 + 8000a4ac: 00000013 addi x0,x0,0 + 8000a4b0: 00000013 addi x0,x0,0 + 8000a4b4: 00000013 addi x0,x0,0 + 8000a4b8: 00000013 addi x0,x0,0 + 8000a4bc: 00000013 addi x0,x0,0 + 8000a4c0: 00038067 jalr x0,0(x7) + +000000008000a4c4 : + 8000a4c4: 00048093 addi x1,x9,0 + 8000a4c8: 34102473 csrrs x8,mepc,x0 + 8000a4cc: 00440413 addi x8,x8,4 + 8000a4d0: 34141073 csrrw x0,mepc,x8 + 8000a4d4: 7240006f jal x0,8000abf8 + +000000008000a4d8 : + 8000a4d8: 00050493 addi x9,x10,0 + 8000a4dc: 00000013 addi x0,x0,0 + 8000a4e0: 00019517 auipc x10,0x19 + 8000a4e4: 93f50513 addi x10,x10,-1729 # 80022e1f + 8000a4e8: 00000013 addi x0,x0,0 + 8000a4ec: 00000013 addi x0,x0,0 + 8000a4f0: 00000013 addi x0,x0,0 + 8000a4f4: 00000013 addi x0,x0,0 + 8000a4f8: 00000013 addi x0,x0,0 + 8000a4fc: 00000013 addi x0,x0,0 + 8000a500: 00038097 auipc x1,0x38 + 8000a504: 0a4080e7 jalr x1,164(x1) # 800425a4 + 8000a508: 00048513 addi x10,x9,0 + 8000a50c: 02000593 addi x11,x0,32 + 8000a510: 728020ef jal x1,8000cc38 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00017517 auipc x10,0x17 + 8000a524: cc850513 addi x10,x10,-824 # 800211e8 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + 8000a540: 00038097 auipc x1,0x38 + 8000a544: 064080e7 jalr x1,100(x1) # 800425a4 + 8000a548: 00000013 addi x0,x0,0 + 8000a54c: 00000013 addi x0,x0,0 + 8000a550: 00000013 addi x0,x0,0 + 8000a554: 00000013 addi x0,x0,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00017517 auipc x10,0x17 + 8000a564: 34650513 addi x10,x10,838 # 800218a6 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00038097 auipc x1,0x38 + 8000a584: 024080e7 jalr x1,36(x1) # 800425a4 + 8000a588: 00000013 addi x0,x0,0 + 8000a58c: 00000013 addi x0,x0,0 + 8000a590: 00000013 addi x0,x0,0 + 8000a594: 00000013 addi x0,x0,0 + 8000a598: 00000013 addi x0,x0,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00017517 auipc x10,0x17 + 8000a5a4: 20150513 addi x10,x10,513 # 800217a1 + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00038097 auipc x1,0x38 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000a5c8: 00038097 auipc x1,0x38 + 8000a5cc: 03c080e7 jalr x1,60(x1) # 80042604 + +000000008000a5d0 : + 8000a5d0: 30002573 .word 0x30002573 + 8000a5d4: 00008067 jalr x0,0(x1) + 8000a5d8: 30059073 .word 0x30059073 + 8000a5dc: 00008067 jalr x0,0(x1) + 8000a5e0: 3005a073 .word 0x3005a073 + 8000a5e4: 00008067 jalr x0,0(x1) + 8000a5e8: 3005b073 .word 0x3005b073 + 8000a5ec: 00008067 jalr x0,0(x1) + 8000a5f0: 30402573 .word 0x30402573 + 8000a5f4: 00008067 jalr x0,0(x1) + 8000a5f8: 30459073 .word 0x30459073 + 8000a5fc: 00008067 jalr x0,0(x1) + 8000a600: 3045a073 .word 0x3045a073 + 8000a604: 00008067 jalr x0,0(x1) + 8000a608: 3045b073 .word 0x3045b073 + 8000a60c: 00008067 jalr x0,0(x1) + 8000a610: 30602573 .word 0x30602573 + 8000a614: 00008067 jalr x0,0(x1) + 8000a618: 30659073 .word 0x30659073 + 8000a61c: 00008067 jalr x0,0(x1) + 8000a620: 3065a073 .word 0x3065a073 + 8000a624: 00008067 jalr x0,0(x1) + 8000a628: 3065b073 .word 0x3065b073 + 8000a62c: 00008067 jalr x0,0(x1) + 8000a630: 30a02573 .word 0x30a02573 + 8000a634: 00008067 jalr x0,0(x1) + 8000a638: 30a59073 .word 0x30a59073 + 8000a63c: 00008067 jalr x0,0(x1) + 8000a640: 30a5a073 .word 0x30a5a073 + 8000a644: 00008067 jalr x0,0(x1) + 8000a648: 30a5b073 .word 0x30a5b073 + 8000a64c: 00008067 jalr x0,0(x1) + 8000a650: 34402573 .word 0x34402573 + 8000a654: 00008067 jalr x0,0(x1) + 8000a658: 34459073 .word 0x34459073 + 8000a65c: 00008067 jalr x0,0(x1) + 8000a660: 3445a073 .word 0x3445a073 + 8000a664: 00008067 jalr x0,0(x1) + 8000a668: 3445b073 .word 0x3445b073 + 8000a66c: 00008067 jalr x0,0(x1) + 8000a670: 74702573 .word 0x74702573 + 8000a674: 00008067 jalr x0,0(x1) + 8000a678: 74759073 .word 0x74759073 + 8000a67c: 00008067 jalr x0,0(x1) + 8000a680: 7475a073 .word 0x7475a073 + 8000a684: 00008067 jalr x0,0(x1) + 8000a688: 7475b073 .word 0x7475b073 + 8000a68c: 00008067 jalr x0,0(x1) + 8000a690: 32002573 .word 0x32002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 32059073 .word 0x32059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3205a073 .word 0x3205a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3205b073 .word 0x3205b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: b0002573 .word 0xb0002573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: b0059073 .word 0xb0059073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: b005a073 .word 0xb005a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: b005b073 .word 0xb005b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: b0202573 .word 0xb0202573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: b0259073 .word 0xb0259073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: b025a073 .word 0xb025a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: b025b073 .word 0xb025b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 10002573 .word 0x10002573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 10059073 .word 0x10059073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 1005a073 .word 0x1005a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 1005b073 .word 0x1005b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 10402573 .word 0x10402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 10459073 .word 0x10459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 1045a073 .word 0x1045a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 1045b073 .word 0x1045b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 10602573 .word 0x10602573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 10659073 .word 0x10659073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 1065a073 .word 0x1065a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 1065b073 .word 0x1065b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 10a02573 .word 0x10a02573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 10a59073 .word 0x10a59073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 10a5a073 .word 0x10a5a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 10a5b073 .word 0x10a5b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: 14402573 .word 0x14402573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: 14459073 .word 0x14459073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: 1445a073 .word 0x1445a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: 1445b073 .word 0x1445b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: 14d02573 .word 0x14d02573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: 14d59073 .word 0x14d59073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: 14d5a073 .word 0x14d5a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: 14d5b073 .word 0x14d5b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 18002573 .word 0x18002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 18059073 .word 0x18059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1805a073 .word 0x1805a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1805b073 .word 0x1805b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 7a002573 .word 0x7a002573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 7a059073 .word 0x7a059073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 7a05a073 .word 0x7a05a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 7a05b073 .word 0x7a05b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 7a102573 .word 0x7a102573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 7a159073 .word 0x7a159073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 7a15a073 .word 0x7a15a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 7a15b073 .word 0x7a15b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 7a202573 .word 0x7a202573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 7a259073 .word 0x7a259073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 7a25a073 .word 0x7a25a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 7a25b073 .word 0x7a25b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 7a302573 .word 0x7a302573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 7a359073 .word 0x7a359073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 7a35a073 .word 0x7a35a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 7a35b073 .word 0x7a35b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 7a402573 .word 0x7a402573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 7a459073 .word 0x7a459073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 7a45a073 .word 0x7a45a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 7a45b073 .word 0x7a45b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 7a502573 .word 0x7a502573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 7a559073 .word 0x7a559073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 7a55a073 .word 0x7a55a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 7a55b073 .word 0x7a55b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a802573 .word 0x7a802573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a859073 .word 0x7a859073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a85a073 .word 0x7a85a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a85b073 .word 0x7a85b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7aa02573 .word 0x7aa02573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7aa59073 .word 0x7aa59073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7aa5a073 .word 0x7aa5a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7aa5b073 .word 0x7aa5b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 5a802573 .word 0x5a802573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 5a859073 .word 0x5a859073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 5a85a073 .word 0x5a85a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 5a85b073 .word 0x5a85b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 6a802573 .word 0x6a802573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 6a859073 .word 0x6a859073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 6a85a073 .word 0x6a85a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 6a85b073 .word 0x6a85b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 0005a503 lw x10,0(x11) + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 0045a503 lw x10,4(x11) + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 00c5a023 sw x12,0(x11) + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 00c5a223 sw x12,4(x11) + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 0005b503 ld x10,0(x11) + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 00c5b023 sd x12,0(x11) + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 00000000 .word 0x00000000 + +000000008000a944 : + 8000a944: 02000393 addi x7,x0,32 + 8000a948: 00075c63 bge x14,x0,8000a960 + +000000008000a94c : + 8000a94c: 00171413 slli x8,x14,0x1 + 8000a950: ff240413 addi x8,x8,-14 + 8000a954: 00045663 bge x8,x0,8000a960 + 8000a958: 01800393 addi x7,x0,24 + 8000a95c: 0040006f jal x0,8000a960 + +000000008000a960 : + 8000a960: ca810113 addi x2,x2,-856 + 8000a964: 5f013303 ld x6,1520(x2) + 8000a968: 007304b3 add x9,x6,x7 + 8000a96c: 5e913823 sd x9,1520(x2) + 8000a970: 5d013403 ld x8,1488(x2) + 8000a974: 40830333 sub x6,x6,x8 + 8000a978: 35810113 addi x2,x2,856 + 8000a97c: 27813403 ld x8,632(x2) + 8000a980: 00830333 add x6,x6,x8 + 8000a984: 34102473 csrrs x8,mepc,x0 + 8000a988: 00000013 addi x0,x0,0 + 8000a98c: 00000013 addi x0,x0,0 + 8000a990: 00000013 addi x0,x0,0 + 8000a994: 00000013 addi x0,x0,0 + 8000a998: 00000013 addi x0,x0,0 + 8000a99c: 00000013 addi x0,x0,0 + 8000a9a0: 00017497 auipc x9,0x17 + 8000a9a4: 82848493 addi x9,x9,-2008 # 800211c8 + 8000a9a8: 00000013 addi x0,x0,0 + 8000a9ac: 00000013 addi x0,x0,0 + 8000a9b0: 00000013 addi x0,x0,0 + 8000a9b4: 00000013 addi x0,x0,0 + 8000a9b8: 00000013 addi x0,x0,0 + 8000a9bc: 00000013 addi x0,x0,0 + 8000a9c0: 0084b023 sd x8,0(x9) + 8000a9c4: 00e4b423 sd x14,8(x9) + 8000a9c8: 34302473 csrrs x8,mtval,x0 + 8000a9cc: 0084b823 sd x8,16(x9) + 8000a9d0: 30002473 csrrs x8,mstatus,x0 + 8000a9d4: 0084bc23 sd x8,24(x9) + 8000a9d8: 00000013 addi x0,x0,0 + 8000a9dc: 00000013 addi x0,x0,0 + 8000a9e0: 00037417 auipc x8,0x37 + 8000a9e4: 1c840413 addi x8,x8,456 # 80041ba8 + 8000a9e8: 00000013 addi x0,x0,0 + 8000a9ec: 00000013 addi x0,x0,0 + 8000a9f0: 00000013 addi x0,x0,0 + 8000a9f4: 00000013 addi x0,x0,0 + 8000a9f8: 00000013 addi x0,x0,0 + 8000a9fc: 00000013 addi x0,x0,0 + 8000aa00: 007304b3 add x9,x6,x7 + 8000aa04: e2946663 bltu x8,x9,8000a030 + +000000008000aa08 : + 8000aa08: 2c013403 ld x8,704(x2) + 8000aa0c: 408787b3 sub x15,x15,x8 + 8000aa10: 00179493 slli x9,x15,0x1 + 8000aa14: 009787b3 add x15,x15,x9 + 8000aa18: 0057d793 srli x15,x15,0x5 + 8000aa1c: 00679793 slli x15,x15,0x6 + 8000aa20: 0077e7b3 or x15,x15,x7 + 8000aa24: 00378793 addi x15,x15,3 + 8000aa28: 02075a63 bge x14,x0,8000aa5c + 8000aa2c: 00f00413 addi x8,x0,15 + 8000aa30: 00877433 and x8,x14,x8 + 8000aa34: 304024f3 csrrs x9,mie,x0 + 8000aa38: 0084d4b3 srl x9,x9,x8 + 8000aa3c: 0014f493 andi x9,x9,1 + 8000aa40: 00b49493 slli x9,x9,0xb + 8000aa44: 0097e7b3 or x15,x15,x9 + 8000aa48: 344024f3 csrrs x9,mip,x0 + 8000aa4c: 0084d4b3 srl x9,x9,x8 + 8000aa50: 0014f493 andi x9,x9,1 + 8000aa54: 00c49493 slli x9,x9,0xc + 8000aa58: 0097e7b3 or x15,x15,x9 + 8000aa5c: 300023f3 csrrs x7,mstatus,x0 + 8000aa60: 02f39393 slli x7,x7,0x2f + 8000aa64: 0223d393 srli x7,x7,0x22 + 8000aa68: 00000437 lui x8,0x0 + 8000aa6c: 00040413 addi x8,x8,0 # 0 + 8000aa70: 00b41413 slli x8,x8,0xb + 8000aa74: 00140413 addi x8,x8,1 + 8000aa78: 00b41413 slli x8,x8,0xb + 8000aa7c: 06740413 addi x8,x8,103 + 8000aa80: 00a41413 slli x8,x8,0xa + 8000aa84: 3e540413 addi x8,x8,997 + 8000aa88: fff44413 xori x8,x8,-1 + 8000aa8c: 0083f433 and x8,x7,x8 + 8000aa90: 0087e433 or x8,x15,x8 + 8000aa94: 0204d493 srli x9,x9,0x20 + 8000aa98: 1c04f493 andi x9,x9,448 + 8000aa9c: 00849493 slli x9,x9,0x8 + 8000aaa0: 00946433 or x8,x8,x9 + 8000aaa4: 00033483 ld x9,0(x6) + 8000aaa8: 02848263 beq x9,x8,8000aacc + 8000aaac: 00040313 addi x6,x8,0 + 8000aab0: 00048213 addi x4,x9,0 + 8000aab4: 6b4003ef jal x7,8000b168 + 8000aab8: 8000aa08 .word 0x8000aa08 + 8000aabc: 00000000 .word 0x00000000 + 8000aac0: 800219a8 .word 0x800219a8 + 8000aac4: 00000000 .word 0x00000000 + 8000aac8: 00000341 .word 0x00000341 + +000000008000aacc : + 8000aacc: 00070413 addi x8,x14,0 + 8000aad0: 00833483 ld x9,8(x6) + 8000aad4: 02848263 beq x9,x8,8000aaf8 + 8000aad8: 00040313 addi x6,x8,0 + 8000aadc: 00048213 addi x4,x9,0 + 8000aae0: 688003ef jal x7,8000b168 + 8000aae4: 8000aacc .word 0x8000aacc + 8000aae8: 00000000 .word 0x00000000 + 8000aaec: 80021aaa .word 0x80021aaa + 8000aaf0: 00000000 .word 0x00000000 + 8000aaf4: 00000341 .word 0x00000341 + 8000aaf8: 12074063 blt x14,x0,8000ac18 + +000000008000aafc : + 8000aafc: 34102473 csrrs x8,mepc,x0 + 8000ab00: 00010493 addi x9,x2,0 + 8000ab04: 0040006f jal x0,8000ab08 + +000000008000ab08 : + 8000ab08: 08000393 addi x7,x0,128 + 8000ab0c: 04740863 beq x8,x7,8000ab5c + 8000ab10: 00238393 addi x7,x7,2 + 8000ab14: 04740463 beq x8,x7,8000ab5c + 8000ab18: 04040263 beq x8,x0,8000ab5c + 8000ab1c: 2884b383 ld x7,648(x9) + 8000ab20: 2904b783 ld x15,656(x9) + 8000ab24: 007787b3 add x15,x15,x7 + 8000ab28: 00f47463 bgeu x8,x15,8000ab30 + 8000ab2c: 02747663 bgeu x8,x7,8000ab58 + +000000008000ab30 : + 8000ab30: 2584b383 ld x7,600(x9) + 8000ab34: 2604b783 ld x15,608(x9) + 8000ab38: 007787b3 add x15,x15,x7 + 8000ab3c: 00f47463 bgeu x8,x15,8000ab44 + 8000ab40: 00747c63 bgeu x8,x7,8000ab58 + +000000008000ab44 : + 8000ab44: 2684b383 ld x7,616(x9) + 8000ab48: 2704b783 ld x15,624(x9) + 8000ab4c: 007787b3 add x15,x15,x7 + 8000ab50: d0f47a63 bgeu x8,x15,8000a064 + 8000ab54: d0746863 bltu x8,x7,8000a064 + +000000008000ab58 : + 8000ab58: 40740433 sub x8,x8,x7 + +000000008000ab5c : + 8000ab5c: 01033483 ld x9,16(x6) + 8000ab60: 02848263 beq x9,x8,8000ab84 + 8000ab64: 00040313 addi x6,x8,0 + 8000ab68: 00048213 addi x4,x9,0 + 8000ab6c: 5fc003ef jal x7,8000b168 + 8000ab70: 8000ab5c .word 0x8000ab5c + 8000ab74: 00000000 .word 0x00000000 + 8000ab78: 80021ba5 .word 0x80021ba5 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 00000341 .word 0x00000341 + +000000008000ab84 : + 8000ab84: 34102473 csrrs x8,mepc,x0 + 8000ab88: 342023f3 csrrs x7,mcause,x0 + 8000ab8c: 00c00793 addi x15,x0,12 + 8000ab90: 00f38a63 beq x7,x15,8000aba4 + 8000ab94: 00100793 addi x15,x0,1 + 8000ab98: 00f38663 beq x7,x15,8000aba4 + 8000ab9c: 01400793 addi x15,x0,20 + 8000aba0: 00f39663 bne x7,x15,8000abac + 8000aba4: 34109073 csrrw x0,mepc,x1 + 8000aba8: 0100006f jal x0,8000abb8 + +000000008000abac : + 8000abac: 00400393 addi x7,x0,4 + 8000abb0: 00740433 add x8,x8,x7 + 8000abb4: 34141073 csrrw x0,mepc,x8 + +000000008000abb8 : + 8000abb8: 34302473 csrrs x8,mtval,x0 + +000000008000abbc : + 8000abbc: 01833483 ld x9,24(x6) + 8000abc0: 02848263 beq x9,x8,8000abe4 + 8000abc4: 00040313 addi x6,x8,0 + 8000abc8: 00048213 addi x4,x9,0 + 8000abcc: 59c003ef jal x7,8000b168 + 8000abd0: 8000abbc .word 0x8000abbc + 8000abd4: 00000000 .word 0x00000000 + 8000abd8: 80021c98 .word 0x80021c98 + 8000abdc: 00000000 .word 0x00000000 + 8000abe0: 00000341 .word 0x00000341 + +000000008000abe4 : + 8000abe4: 30102473 csrrs x8,misa,x0 + 8000abe8: 03841413 slli x8,x8,0x38 + 8000abec: 00045263 bge x8,x0,8000abf0 + +000000008000abf0 : + 8000abf0: 20000393 addi x7,x0,512 + 8000abf4: 0640006f jal x0,8000ac58 + +000000008000abf8 : + 8000abf8: 2e013303 ld x6,736(x2) + 8000abfc: 2e813383 ld x7,744(x2) + 8000ac00: 2f013403 ld x8,752(x2) + 8000ac04: 2f813483 ld x9,760(x2) + 8000ac08: 30013703 ld x14,768(x2) + 8000ac0c: 30813783 ld x15,776(x2) + 8000ac10: 31013103 ld x2,784(x2) + 8000ac14: 30200073 mret + +000000008000ac18 : + 8000ac18: 00100413 addi x8,x0,1 + 8000ac1c: 01f77393 andi x7,x14,31 + 8000ac20: 00741433 sll x8,x8,x7 + 8000ac24: 304434f3 csrrc x9,mie,x8 + 8000ac28: 34443473 csrrc x8,mip,x8 + +000000008000ac2c : + 8000ac2c: 01033483 ld x9,16(x6) + 8000ac30: 02848263 beq x9,x8,8000ac54 + 8000ac34: 00040313 addi x6,x8,0 + 8000ac38: 00048213 addi x4,x9,0 + 8000ac3c: 52c003ef jal x7,8000b168 + 8000ac40: 8000ac2c .word 0x8000ac2c + 8000ac44: 00000000 .word 0x00000000 + 8000ac48: 80021e0b .word 0x80021e0b + 8000ac4c: 00000000 .word 0x00000000 + 8000ac50: 00000341 .word 0x00000341 + 8000ac54: 00000393 addi x7,x0,0 + +000000008000ac58 : + 8000ac58: 00000417 auipc x8,0x0 + 8000ac5c: 03c40413 addi x8,x8,60 # 8000ac94 + 8000ac60: 00740433 add x8,x8,x7 + 8000ac64: 00371393 slli x7,x14,0x3 + 8000ac68: 00740433 add x8,x8,x7 + 8000ac6c: ff847413 andi x8,x8,-8 + 8000ac70: 00043403 ld x8,0(x8) + +000000008000ac74 : + 8000ac74: 00040a63 beq x8,x0,8000ac88 + 8000ac78: 03f41393 slli x7,x8,0x3f + 8000ac7c: 0003d863 bge x7,x0,8000ac8c + 8000ac80: 00145413 srli x8,x8,0x1 + 8000ac84: f6870ae3 beq x14,x8,8000abf8 + 8000ac88: bdcff06f jal x0,8000a064 + +000000008000ac8c : + 8000ac8c: 00040067 jalr x0,0(x8) + +000000008000ac90 : + ... + 8000ac98: 00000001 .word 0x00000001 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000001 .word 0x00000001 + 8000aca4: 00000000 .word 0x00000000 + 8000aca8: 80042000 .word 0x80042000 + ... + 8000acb8: 00000001 .word 0x00000001 + 8000acbc: 00000000 .word 0x00000000 + 8000acc0: 00000001 .word 0x00000001 + 8000acc4: 00000000 .word 0x00000000 + 8000acc8: 80042014 .word 0x80042014 + ... + 8000acd8: 00000001 .word 0x00000001 + 8000acdc: 00000000 .word 0x00000000 + 8000ace0: 00000001 .word 0x00000001 + 8000ace4: 00000000 .word 0x00000000 + 8000ace8: 8004202c .word 0x8004202c + 8000acec: 00000000 .word 0x00000000 + 8000acf0: 00000001 .word 0x00000001 + 8000acf4: 00000000 .word 0x00000000 + 8000acf8: 00000001 .word 0x00000001 + 8000acfc: 00000000 .word 0x00000000 + 8000ad00: 00000001 .word 0x00000001 + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 00000001 .word 0x00000001 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000001 .word 0x00000001 + 8000ad14: 00000000 .word 0x00000000 + 8000ad18: 00000001 .word 0x00000001 + 8000ad1c: 00000000 .word 0x00000000 + 8000ad20: 00000001 .word 0x00000001 + 8000ad24: 00000000 .word 0x00000000 + 8000ad28: 00000001 .word 0x00000001 + 8000ad2c: 00000000 .word 0x00000000 + 8000ad30: 00000001 .word 0x00000001 + 8000ad34: 00000000 .word 0x00000000 + 8000ad38: 00000001 .word 0x00000001 + 8000ad3c: 00000000 .word 0x00000000 + 8000ad40: 00000001 .word 0x00000001 + 8000ad44: 00000000 .word 0x00000000 + 8000ad48: 00000001 .word 0x00000001 + ... + +000000008000ae90 : + 8000ae90: 00000001 .word 0x00000001 + 8000ae94: 00000000 .word 0x00000000 + 8000ae98: 00000003 .word 0x00000003 + 8000ae9c: 00000000 .word 0x00000000 + 8000aea0: 00000005 .word 0x00000005 + 8000aea4: 00000000 .word 0x00000000 + 8000aea8: 00000007 .word 0x00000007 + 8000aeac: 00000000 .word 0x00000000 + 8000aeb0: 00000009 .word 0x00000009 + 8000aeb4: 00000000 .word 0x00000000 + 8000aeb8: 0000000b .word 0x0000000b + 8000aebc: 00000000 .word 0x00000000 + 8000aec0: 0000000d .word 0x0000000d + 8000aec4: 00000000 .word 0x00000000 + 8000aec8: 0000000f .word 0x0000000f + 8000aecc: 00000000 .word 0x00000000 + 8000aed0: 00000011 .word 0x00000011 + 8000aed4: 00000000 .word 0x00000000 + 8000aed8: 00000013 .word 0x00000013 + 8000aedc: 00000000 .word 0x00000000 + 8000aee0: 00000015 .word 0x00000015 + 8000aee4: 00000000 .word 0x00000000 + 8000aee8: 00000017 .word 0x00000017 + 8000aeec: 00000000 .word 0x00000000 + 8000aef0: 00000019 .word 0x00000019 + 8000aef4: 00000000 .word 0x00000000 + 8000aef8: 0000001b .word 0x0000001b + 8000aefc: 00000000 .word 0x00000000 + 8000af00: 0000001d .word 0x0000001d + 8000af04: 00000000 .word 0x00000000 + 8000af08: 0000001f .word 0x0000001f + 8000af0c: 00000000 .word 0x00000000 + 8000af10: 00000021 .word 0x00000021 + 8000af14: 00000000 .word 0x00000000 + 8000af18: 00000023 .word 0x00000023 + 8000af1c: 00000000 .word 0x00000000 + 8000af20: 00000025 .word 0x00000025 + 8000af24: 00000000 .word 0x00000000 + 8000af28: 00000027 .word 0x00000027 + 8000af2c: 00000000 .word 0x00000000 + 8000af30: 00000029 .word 0x00000029 + 8000af34: 00000000 .word 0x00000000 + 8000af38: 0000002b .word 0x0000002b + 8000af3c: 00000000 .word 0x00000000 + 8000af40: 0000002d .word 0x0000002d + 8000af44: 00000000 .word 0x00000000 + 8000af48: 0000002f .word 0x0000002f + ... + +000000008000b090 : + 8000b090: 300023f3 csrrs x7,mstatus,x0 + 8000b094: 00b3d493 srli x9,x7,0xb + 8000b098: 0034f493 andi x9,x9,3 + 8000b09c: ffd48413 addi x8,x9,-3 + 8000b0a0: 341023f3 csrrs x7,mepc,x0 + 8000b0a4: 00000493 addi x9,x0,0 + 8000b0a8: 02040c63 beq x8,x0,8000b0e0 + 8000b0ac: 35810113 addi x2,x2,856 + 8000b0b0: 300023f3 csrrs x7,mstatus,x0 + 8000b0b4: 01839393 slli x7,x7,0x18 + 8000b0b8: 0003da63 bge x7,x0,8000b0cc + +000000008000b0bc : + 8000b0bc: 35810113 addi x2,x2,856 + 8000b0c0: 5b013783 ld x15,1456(x2) + 8000b0c4: ca810113 addi x2,x2,-856 + 8000b0c8: 0080006f jal x0,8000b0d0 + +000000008000b0cc : + 8000b0cc: f0013783 ld x15,-256(x2) + 8000b0d0: 341023f3 csrrs x7,mepc,x0 + 8000b0d4: 40f383b3 sub x7,x7,x15 + 8000b0d8: ca810113 addi x2,x2,-856 + 8000b0dc: 25813483 ld x9,600(x2) + +000000008000b0e0 : + 8000b0e0: 007483b3 add x7,x9,x7 + 8000b0e4: 2e013303 ld x6,736(x2) + 8000b0e8: 2f013403 ld x8,752(x2) + 8000b0ec: 2f813483 ld x9,760(x2) + 8000b0f0: 30013703 ld x14,768(x2) + 8000b0f4: 30813783 ld x15,776(x2) + 8000b0f8: 31013103 ld x2,784(x2) + 8000b0fc: 00438067 jalr x0,4(x7) + +000000008000b100 : + 8000b100: 00016217 auipc x4,0x16 + 8000b104: f8020213 addi x4,x4,-128 # 80021080 + 8000b108: 02523423 sd x5,40(x4) # 28 + 8000b10c: 00123423 sd x1,8(x4) # 8 + 8000b110: 00023023 sd x0,0(x4) # 0 + 8000b114: 0880006f jal x0,8000b19c + +000000008000b118 : + 8000b118: 00016397 auipc x7,0x16 + 8000b11c: f6838393 addi x7,x7,-152 # 80021080 + 8000b120: 0483b023 sd x8,64(x7) + 8000b124: 0243b023 sd x4,32(x7) + 8000b128: 0253b423 sd x5,40(x7) + 8000b12c: 0013b423 sd x1,8(x7) + 8000b130: 0003b023 sd x0,0(x7) + 8000b134: 00038213 addi x4,x7,0 + 8000b138: 00040293 addi x5,x8,0 + 8000b13c: 0600006f jal x0,8000b19c + +000000008000b140 : + 8000b140: 00016697 auipc x13,0x16 + 8000b144: f4068693 addi x13,x13,-192 # 80021080 + 8000b148: 06e6b823 sd x14,112(x13) + 8000b14c: 0246b023 sd x4,32(x13) + 8000b150: 0256b423 sd x5,40(x13) + 8000b154: 0016b423 sd x1,8(x13) + 8000b158: 0006b023 sd x0,0(x13) + 8000b15c: 00068213 addi x4,x13,0 + 8000b160: 00070293 addi x5,x14,0 + 8000b164: 0380006f jal x0,8000b19c + +000000008000b168 : + 8000b168: 00016497 auipc x9,0x16 + 8000b16c: f1848493 addi x9,x9,-232 # 80021080 + 8000b170: 0674b423 sd x7,104(x9) + 8000b174: 0244b023 sd x4,32(x9) + 8000b178: 0254b423 sd x5,40(x9) + 8000b17c: 0014b423 sd x1,8(x9) + 8000b180: 00300093 addi x1,x0,3 + 8000b184: 0014b023 sd x1,0(x9) + 8000b188: 1064b823 sd x6,272(x9) + 8000b18c: 1044bc23 sd x4,280(x9) + 8000b190: 00048213 addi x4,x9,0 + 8000b194: 00038293 addi x5,x7,0 + 8000b198: 0040006f jal x0,8000b19c + +000000008000b19c : + 8000b19c: 00223823 sd x2,16(x4) # 10 + 8000b1a0: 00323c23 sd x3,24(x4) # 18 + 8000b1a4: 02623823 sd x6,48(x4) # 30 + 8000b1a8: 02723c23 sd x7,56(x4) # 38 + 8000b1ac: 04823023 sd x8,64(x4) # 40 + 8000b1b0: 04923423 sd x9,72(x4) # 48 + 8000b1b4: 04a23823 sd x10,80(x4) # 50 + 8000b1b8: 04b23c23 sd x11,88(x4) # 58 + 8000b1bc: 06c23023 sd x12,96(x4) # 60 + 8000b1c0: 06d23423 sd x13,104(x4) # 68 + 8000b1c4: 06e23823 sd x14,112(x4) # 70 + 8000b1c8: 06f23c23 sd x15,120(x4) # 78 + 8000b1cc: 09023023 sd x16,128(x4) # 80 + 8000b1d0: 09123423 sd x17,136(x4) # 88 + 8000b1d4: 09223823 sd x18,144(x4) # 90 + 8000b1d8: 09323c23 sd x19,152(x4) # 98 + 8000b1dc: 0b423023 sd x20,160(x4) # a0 + 8000b1e0: 0b523423 sd x21,168(x4) # a8 + 8000b1e4: 0b623823 sd x22,176(x4) # b0 + 8000b1e8: 0b723c23 sd x23,184(x4) # b8 + 8000b1ec: 0d823023 sd x24,192(x4) # c0 + 8000b1f0: 0d923423 sd x25,200(x4) # c8 + 8000b1f4: 0da23823 sd x26,208(x4) # d0 + 8000b1f8: 0db23c23 sd x27,216(x4) # d8 + 8000b1fc: 0fc23023 sd x28,224(x4) # e0 + 8000b200: 0fd23423 sd x29,232(x4) # e8 + 8000b204: 0fe23823 sd x30,240(x4) # f0 + 8000b208: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b20c : + 8000b20c: 00016497 auipc x9,0x16 + 8000b210: e744a483 lw x9,-396(x9) # 80021080 + 8000b214: 00300513 addi x10,x0,3 + 8000b218: 18a48a63 beq x9,x10,8000b3ac + +000000008000b21c : + 8000b21c: ffa2d303 lhu x6,-6(x5) + 8000b220: ff82d383 lhu x7,-8(x5) + 8000b224: 01031313 slli x6,x6,0x10 + 8000b228: 00736333 or x6,x6,x7 + 8000b22c: 00f35393 srli x7,x6,0xf + 8000b230: 01f3f393 andi x7,x7,31 + 8000b234: 01435413 srli x8,x6,0x14 + 8000b238: 01f47413 andi x8,x8,31 + 8000b23c: 10822223 sw x8,260(x4) # 104 + 8000b240: 00341313 slli x6,x8,0x3 + 8000b244: 00620333 add x6,x4,x6 + 8000b248: 00033303 ld x6,0(x6) + 8000b24c: 10623823 sd x6,272(x4) # 110 + 8000b250: ff62d303 lhu x6,-10(x5) + 8000b254: ff42d383 lhu x7,-12(x5) + 8000b258: 01031313 slli x6,x6,0x10 + 8000b25c: 00736333 or x6,x6,x7 + 8000b260: 00030513 addi x10,x6,0 + 8000b264: 07f37413 andi x8,x6,127 + 8000b268: 00300493 addi x9,x0,3 + 8000b26c: 0c941463 bne x8,x9,8000b334 + 8000b270: 00c35413 srli x8,x6,0xc + 8000b274: 00747413 andi x8,x8,7 + 8000b278: 00300493 addi x9,x0,3 + 8000b27c: 0a941c63 bne x8,x9,8000b334 + 8000b280: 41435393 srai x7,x6,0x14 + 8000b284: 00f35313 srli x6,x6,0xf + 8000b288: 01f37313 andi x6,x6,31 + 8000b28c: 00331313 slli x6,x6,0x3 + 8000b290: 00620333 add x6,x4,x6 + 8000b294: 00033303 ld x6,0(x6) + 8000b298: 00730333 add x6,x6,x7 + 8000b29c: 00737413 andi x8,x6,7 + 8000b2a0: 0c041663 bne x8,x0,8000b36c + 8000b2a4: 00000013 addi x0,x0,0 + 8000b2a8: 00000013 addi x0,x0,0 + 8000b2ac: 00000013 addi x0,x0,0 + 8000b2b0: 00000013 addi x0,x0,0 + 8000b2b4: 00000013 addi x0,x0,0 + 8000b2b8: 00000013 addi x0,x0,0 + 8000b2bc: 00000013 addi x0,x0,0 + 8000b2c0: 00018417 auipc x8,0x18 + 8000b2c4: bb040413 addi x8,x8,-1104 # 80022e70 + 8000b2c8: 00000013 addi x0,x0,0 + 8000b2cc: 00000013 addi x0,x0,0 + 8000b2d0: 00000013 addi x0,x0,0 + 8000b2d4: 00000013 addi x0,x0,0 + 8000b2d8: 00000013 addi x0,x0,0 + 8000b2dc: 00000013 addi x0,x0,0 + 8000b2e0: 08836663 bltu x6,x8,8000b36c + 8000b2e4: 00000013 addi x0,x0,0 + 8000b2e8: 00000013 addi x0,x0,0 + 8000b2ec: 00000013 addi x0,x0,0 + 8000b2f0: 00000013 addi x0,x0,0 + 8000b2f4: 00000013 addi x0,x0,0 + 8000b2f8: 00000013 addi x0,x0,0 + 8000b2fc: 00000013 addi x0,x0,0 + 8000b300: 00037417 auipc x8,0x37 + 8000b304: 8b040413 addi x8,x8,-1872 # 80041bb0 + 8000b308: 00000013 addi x0,x0,0 + 8000b30c: 00000013 addi x0,x0,0 + 8000b310: 00000013 addi x0,x0,0 + 8000b314: 00000013 addi x0,x0,0 + 8000b318: 00000013 addi x0,x0,0 + 8000b31c: 00000013 addi x0,x0,0 + 8000b320: ff840413 addi x8,x8,-8 + 8000b324: 04646463 bltu x8,x6,8000b36c + 8000b328: 00033303 ld x6,0(x6) + 8000b32c: 10623c23 sd x6,280(x4) # 118 + 8000b330: 3880006f jal x0,8000b6b8 + +000000008000b334 : + 8000b334: 00100413 addi x8,x0,1 + 8000b338: 00000013 addi x0,x0,0 + 8000b33c: 00000013 addi x0,x0,0 + 8000b340: 00016497 auipc x9,0x16 + 8000b344: e6848493 addi x9,x9,-408 # 800211a8 + 8000b348: 00000013 addi x0,x0,0 + 8000b34c: 00000013 addi x0,x0,0 + 8000b350: 00000013 addi x0,x0,0 + 8000b354: 00000013 addi x0,x0,0 + 8000b358: 00000013 addi x0,x0,0 + 8000b35c: 00000013 addi x0,x0,0 + 8000b360: 0084a023 sw x8,0(x9) + 8000b364: 10a23c23 sd x10,280(x4) # 118 + 8000b368: 3500006f jal x0,8000b6b8 + +000000008000b36c : + 8000b36c: 00200413 addi x8,x0,2 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00016497 auipc x9,0x16 + 8000b384: e2848493 addi x9,x9,-472 # 800211a8 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 0084a023 sw x8,0(x9) + 8000b3a4: 10623c23 sd x6,280(x4) # 118 + 8000b3a8: 3100006f jal x0,8000b6b8 + +000000008000b3ac : + 8000b3ac: 0082e303 lwu x6,8(x5) + 8000b3b0: 00c2a383 lw x7,12(x5) + 8000b3b4: 02039393 slli x7,x7,0x20 + 8000b3b8: 00736333 or x6,x6,x7 + 8000b3bc: 00016817 auipc x16,0x16 + 8000b3c0: dfc80813 addi x16,x16,-516 # 800211b8 + 8000b3c4: 00683023 sd x6,0(x16) + 8000b3c8: 0002e303 lwu x6,0(x5) + 8000b3cc: 0042a383 lw x7,4(x5) + 8000b3d0: 02039393 slli x7,x7,0x20 + 8000b3d4: 00736333 or x6,x6,x7 + 8000b3d8: 10623423 sd x6,264(x4) # 108 + 8000b3dc: 00016817 auipc x16,0x16 + 8000b3e0: ddc80813 addi x16,x16,-548 # 800211b8 + 8000b3e4: 00083303 ld x6,0(x16) + 8000b3e8: 00016397 auipc x7,0x16 + 8000b3ec: 5a938393 addi x7,x7,1449 # 80021991 + 8000b3f0: 28730463 beq x6,x7,8000b678 + 8000b3f4: 00000413 addi x8,x0,0 + 8000b3f8: 00016817 auipc x16,0x16 + 8000b3fc: db880813 addi x16,x16,-584 # 800211b0 + 8000b400: 00882023 sw x8,0(x16) + 8000b404: 00016397 auipc x7,0x16 + 8000b408: 5a438393 addi x7,x7,1444 # 800219a8 + 8000b40c: 00731863 bne x6,x7,8000b41c + 8000b410: 00100413 addi x8,x0,1 + 8000b414: 00000493 addi x9,x0,0 + 8000b418: 2740006f jal x0,8000b68c + 8000b41c: 00016397 auipc x7,0x16 + 8000b420: 68e38393 addi x7,x7,1678 # 80021aaa + 8000b424: 00731863 bne x6,x7,8000b434 + 8000b428: 00200413 addi x8,x0,2 + 8000b42c: 00000493 addi x9,x0,0 + 8000b430: 25c0006f jal x0,8000b68c + 8000b434: 00016397 auipc x7,0x16 + 8000b438: 77138393 addi x7,x7,1905 # 80021ba5 + 8000b43c: 00731863 bne x6,x7,8000b44c + 8000b440: 00300413 addi x8,x0,3 + 8000b444: 00000493 addi x9,x0,0 + 8000b448: 2440006f jal x0,8000b68c + 8000b44c: 00017397 auipc x7,0x17 + 8000b450: 84c38393 addi x7,x7,-1972 # 80021c98 + 8000b454: 00731863 bne x6,x7,8000b464 + 8000b458: 00400413 addi x8,x0,4 + 8000b45c: 00000493 addi x9,x0,0 + 8000b460: 22c0006f jal x0,8000b68c + 8000b464: 00017397 auipc x7,0x17 + 8000b468: 9a738393 addi x7,x7,-1625 # 80021e0b + 8000b46c: 00731863 bne x6,x7,8000b47c + 8000b470: 00500413 addi x8,x0,5 + 8000b474: 00000493 addi x9,x0,0 + 8000b478: 2140006f jal x0,8000b68c + 8000b47c: 00017397 auipc x7,0x17 + 8000b480: 91338393 addi x7,x7,-1773 # 80021d8f + 8000b484: 00731863 bne x6,x7,8000b494 + 8000b488: 00600413 addi x8,x0,6 + 8000b48c: 00000493 addi x9,x0,0 + 8000b490: 1fc0006f jal x0,8000b68c + 8000b494: 00017397 auipc x7,0x17 + 8000b498: 93938393 addi x7,x7,-1735 # 80021dcd + 8000b49c: 00731863 bne x6,x7,8000b4ac + 8000b4a0: 00700413 addi x8,x0,7 + 8000b4a4: 00000493 addi x9,x0,0 + 8000b4a8: 1e40006f jal x0,8000b68c + 8000b4ac: 00016397 auipc x7,0x16 + 8000b4b0: 53c38393 addi x7,x7,1340 # 800219e8 + 8000b4b4: 00731863 bne x6,x7,8000b4c4 + 8000b4b8: 00100413 addi x8,x0,1 + 8000b4bc: 00100493 addi x9,x0,1 + 8000b4c0: 1cc0006f jal x0,8000b68c + 8000b4c4: 00016397 auipc x7,0x16 + 8000b4c8: 62438393 addi x7,x7,1572 # 80021ae8 + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00200413 addi x8,x0,2 + 8000b4d4: 00100493 addi x9,x0,1 + 8000b4d8: 1b40006f jal x0,8000b68c + 8000b4dc: 00016397 auipc x7,0x16 + 8000b4e0: 70538393 addi x7,x7,1797 # 80021be1 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00300413 addi x8,x0,3 + 8000b4ec: 00100493 addi x9,x0,1 + 8000b4f0: 19c0006f jal x0,8000b68c + 8000b4f4: 00016397 auipc x7,0x16 + 8000b4f8: 7e138393 addi x7,x7,2017 # 80021cd5 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00400413 addi x8,x0,4 + 8000b504: 00100493 addi x9,x0,1 + 8000b508: 1840006f jal x0,8000b68c + 8000b50c: 00017397 auipc x7,0x17 + 8000b510: 93a38393 addi x7,x7,-1734 # 80021e46 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00500413 addi x8,x0,5 + 8000b51c: 00100493 addi x9,x0,1 + 8000b520: 16c0006f jal x0,8000b68c + 8000b524: 00016397 auipc x7,0x16 + 8000b528: 50438393 addi x7,x7,1284 # 80021a28 + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00100413 addi x8,x0,1 + 8000b534: 00200493 addi x9,x0,2 + 8000b538: 1540006f jal x0,8000b68c + 8000b53c: 00016397 auipc x7,0x16 + 8000b540: 5ea38393 addi x7,x7,1514 # 80021b26 + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00200413 addi x8,x0,2 + 8000b54c: 00200493 addi x9,x0,2 + 8000b550: 13c0006f jal x0,8000b68c + 8000b554: 00016397 auipc x7,0x16 + 8000b558: 6c938393 addi x7,x7,1737 # 80021c1d + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00300413 addi x8,x0,3 + 8000b564: 00200493 addi x9,x0,2 + 8000b568: 1240006f jal x0,8000b68c + 8000b56c: 00016397 auipc x7,0x16 + 8000b570: 7a638393 addi x7,x7,1958 # 80021d12 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00400413 addi x8,x0,4 + 8000b57c: 00200493 addi x9,x0,2 + 8000b580: 10c0006f jal x0,8000b68c + 8000b584: 00017397 auipc x7,0x17 + 8000b588: 8fd38393 addi x7,x7,-1795 # 80021e81 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00500413 addi x8,x0,5 + 8000b594: 00200493 addi x9,x0,2 + 8000b598: 0f40006f jal x0,8000b68c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 4cd38393 addi x7,x7,1229 # 80021a69 + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00100413 addi x8,x0,1 + 8000b5ac: 00300493 addi x9,x0,3 + 8000b5b0: 0dc0006f jal x0,8000b68c + 8000b5b4: 00016397 auipc x7,0x16 + 8000b5b8: 5b138393 addi x7,x7,1457 # 80021b65 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00200413 addi x8,x0,2 + 8000b5c4: 00300493 addi x9,x0,3 + 8000b5c8: 0c40006f jal x0,8000b68c + 8000b5cc: 00016397 auipc x7,0x16 + 8000b5d0: 68e38393 addi x7,x7,1678 # 80021c5a + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00300413 addi x8,x0,3 + 8000b5dc: 00300493 addi x9,x0,3 + 8000b5e0: 0ac0006f jal x0,8000b68c + 8000b5e4: 00016397 auipc x7,0x16 + 8000b5e8: 76c38393 addi x7,x7,1900 # 80021d50 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00400413 addi x8,x0,4 + 8000b5f4: 00300493 addi x9,x0,3 + 8000b5f8: 0940006f jal x0,8000b68c + 8000b5fc: 00017397 auipc x7,0x17 + 8000b600: 8c138393 addi x7,x7,-1855 # 80021ebd + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00500413 addi x8,x0,5 + 8000b60c: 00300493 addi x9,x0,3 + 8000b610: 07c0006f jal x0,8000b68c + 8000b614: 00017397 auipc x7,0x17 + 8000b618: 8e638393 addi x7,x7,-1818 # 80021efa + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00800413 addi x8,x0,8 + 8000b624: 00000493 addi x9,x0,0 + 8000b628: 0640006f jal x0,8000b68c + 8000b62c: 00017397 auipc x7,0x17 + 8000b630: 91d38393 addi x7,x7,-1763 # 80021f49 + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00800413 addi x8,x0,8 + 8000b63c: 00000493 addi x9,x0,0 + 8000b640: 04c0006f jal x0,8000b68c + 8000b644: 00017397 auipc x7,0x17 + 8000b648: a0038393 addi x7,x7,-1536 # 80022044 + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00800413 addi x8,x0,8 + 8000b654: 00100493 addi x9,x0,1 + 8000b658: 0340006f jal x0,8000b68c + 8000b65c: 00017397 auipc x7,0x17 + 8000b660: ae438393 addi x7,x7,-1308 # 80022140 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00800413 addi x8,x0,8 + 8000b66c: 00200493 addi x9,x0,2 + 8000b670: 01c0006f jal x0,8000b68c + 8000b674: 0340006f jal x0,8000b6a8 + +000000008000b678 : + 8000b678: 00900413 addi x8,x0,9 + 8000b67c: 00016817 auipc x16,0x16 + 8000b680: b3480813 addi x16,x16,-1228 # 800211b0 + 8000b684: 00882023 sw x8,0(x16) + 8000b688: 0300006f jal x0,8000b6b8 + +000000008000b68c : + 8000b68c: 00016817 auipc x16,0x16 + 8000b690: b2480813 addi x16,x16,-1244 # 800211b0 + 8000b694: 00882023 sw x8,0(x16) + 8000b698: 00016817 auipc x16,0x16 + 8000b69c: b1c80813 addi x16,x16,-1252 # 800211b4 + 8000b6a0: 00982023 sw x9,0(x16) + 8000b6a4: 0140006f jal x0,8000b6b8 + +000000008000b6a8 : + 8000b6a8: 00016817 auipc x16,0x16 + 8000b6ac: b0880813 addi x16,x16,-1272 # 800211b0 + 8000b6b0: 00082023 sw x0,0(x16) + 8000b6b4: 0040006f jal x0,8000b6b8 + +000000008000b6b8 : + 8000b6b8: 0002e303 lwu x6,0(x5) + 8000b6bc: 0042a383 lw x7,4(x5) + 8000b6c0: 02039393 slli x7,x7,0x20 + 8000b6c4: 00736333 or x6,x6,x7 + 8000b6c8: 10623423 sd x6,264(x4) # 108 + 8000b6cc: 00035383 lhu x7,0(x6) + 8000b6d0: 0033f413 andi x8,x7,3 + 8000b6d4: 00300493 addi x9,x0,3 + 8000b6d8: 00941863 bne x8,x9,8000b6e8 + 8000b6dc: 00235403 lhu x8,2(x6) + 8000b6e0: 01041413 slli x8,x8,0x10 + 8000b6e4: 0083e3b3 or x7,x7,x8 + 8000b6e8: 10722023 sw x7,256(x4) # 100 + 8000b6ec: 0082e303 lwu x6,8(x5) + 8000b6f0: 00c2a383 lw x7,12(x5) + 8000b6f4: 02039393 slli x7,x7,0x20 + 8000b6f8: 00736333 or x6,x6,x7 + 8000b6fc: 12623023 sd x6,288(x4) # 120 + +000000008000b700 : + 8000b700: 00016517 auipc x10,0x16 + 8000b704: 0a150513 addi x10,x10,161 # 800217a1 + 8000b708: 00000013 addi x0,x0,0 + 8000b70c: 00000013 addi x0,x0,0 + 8000b710: 00000013 addi x0,x0,0 + 8000b714: 00000013 addi x0,x0,0 + 8000b718: 00000013 addi x0,x0,0 + 8000b71c: 00000013 addi x0,x0,0 + 8000b720: 00037097 auipc x1,0x37 + 8000b724: e84080e7 jalr x1,-380(x1) # 800425a4 + 8000b728: 00000013 addi x0,x0,0 + 8000b72c: 00000013 addi x0,x0,0 + 8000b730: 00000013 addi x0,x0,0 + 8000b734: 00000013 addi x0,x0,0 + 8000b738: 00000013 addi x0,x0,0 + 8000b73c: 00000013 addi x0,x0,0 + 8000b740: 00016517 auipc x10,0x16 + 8000b744: 09d50513 addi x10,x10,157 # 800217dd + 8000b748: 00000013 addi x0,x0,0 + 8000b74c: 00000013 addi x0,x0,0 + 8000b750: 00000013 addi x0,x0,0 + 8000b754: 00000013 addi x0,x0,0 + 8000b758: 00000013 addi x0,x0,0 + 8000b75c: 00000013 addi x0,x0,0 + 8000b760: 00037097 auipc x1,0x37 + 8000b764: e44080e7 jalr x1,-444(x1) # 800425a4 + +000000008000b768 : + 8000b768: 00000013 addi x0,x0,0 + 8000b76c: 00000013 addi x0,x0,0 + 8000b770: 00000013 addi x0,x0,0 + 8000b774: 00000013 addi x0,x0,0 + 8000b778: 00000013 addi x0,x0,0 + 8000b77c: 00000013 addi x0,x0,0 + 8000b780: 00016517 auipc x10,0x16 + 8000b784: 11450513 addi x10,x10,276 # 80021894 + 8000b788: 00000013 addi x0,x0,0 + 8000b78c: 00000013 addi x0,x0,0 + 8000b790: 00000013 addi x0,x0,0 + 8000b794: 00000013 addi x0,x0,0 + 8000b798: 00000013 addi x0,x0,0 + 8000b79c: 00000013 addi x0,x0,0 + 8000b7a0: 00037097 auipc x1,0x37 + 8000b7a4: e04080e7 jalr x1,-508(x1) # 800425a4 + +000000008000b7a8 : + 8000b7a8: 00016517 auipc x10,0x16 + 8000b7ac: 9f853503 ld x10,-1544(x10) # 800211a0 + 8000b7b0: 00037097 auipc x1,0x37 + 8000b7b4: df4080e7 jalr x1,-524(x1) # 800425a4 + +000000008000b7b8 : + 8000b7b8: 00000013 addi x0,x0,0 + 8000b7bc: 00000013 addi x0,x0,0 + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: 0e650513 addi x10,x10,230 # 800218a6 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00037097 auipc x1,0x37 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000b7e8: 00016517 auipc x10,0x16 + 8000b7ec: 89852503 lw x10,-1896(x10) # 80021080 + 8000b7f0: 00300593 addi x11,x0,3 + 8000b7f4: 52b50c63 beq x10,x11,8000bd2c + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: 0a850513 addi x10,x10,168 # 800218a8 + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00037097 auipc x1,0x37 + 8000b824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000b828: 00016517 auipc x10,0x16 + 8000b82c: 95852503 lw x10,-1704(x10) # 80021180 + 8000b830: 02000593 addi x11,x0,32 + 8000b834: 00357613 andi x12,x10,3 + 8000b838: 00300693 addi x13,x0,3 + 8000b83c: 00d60463 beq x12,x13,8000b844 + 8000b840: 01000593 addi x11,x0,16 + 8000b844: 3f4010ef jal x1,8000cc38 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00016517 auipc x10,0x16 + 8000b864: 98850513 addi x10,x10,-1656 # 800211e8 + 8000b868: 00000013 addi x0,x0,0 + 8000b86c: 00000013 addi x0,x0,0 + 8000b870: 00000013 addi x0,x0,0 + 8000b874: 00000013 addi x0,x0,0 + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00037097 auipc x1,0x37 + 8000b884: d24080e7 jalr x1,-732(x1) # 800425a4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00016517 auipc x10,0x16 + 8000b8a4: 01c50513 addi x10,x10,28 # 800218bc + 8000b8a8: 00000013 addi x0,x0,0 + 8000b8ac: 00000013 addi x0,x0,0 + 8000b8b0: 00000013 addi x0,x0,0 + 8000b8b4: 00000013 addi x0,x0,0 + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00037097 auipc x1,0x37 + 8000b8c4: ce4080e7 jalr x1,-796(x1) # 800425a4 + 8000b8c8: 00016517 auipc x10,0x16 + 8000b8cc: 8c053503 ld x10,-1856(x10) # 80021188 + 8000b8d0: 04000593 addi x11,x0,64 + 8000b8d4: 364010ef jal x1,8000cc38 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00016517 auipc x10,0x16 + 8000b8e4: 90850513 addi x10,x10,-1784 # 800211e8 + 8000b8e8: 00000013 addi x0,x0,0 + 8000b8ec: 00000013 addi x0,x0,0 + 8000b8f0: 00000013 addi x0,x0,0 + 8000b8f4: 00000013 addi x0,x0,0 + 8000b8f8: 00000013 addi x0,x0,0 + 8000b8fc: 00000013 addi x0,x0,0 + 8000b900: 00037097 auipc x1,0x37 + 8000b904: ca4080e7 jalr x1,-860(x1) # 800425a4 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00017517 auipc x10,0x17 + 8000b924: 9d350513 addi x10,x10,-1581 # 800222f3 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00037097 auipc x1,0x37 + 8000b944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000b948: 00015517 auipc x10,0x15 + 8000b94c: 73852503 lw x10,1848(x10) # 80021080 + 8000b950: 00050663 beq x10,x0,8000b95c + 8000b954: 00300593 addi x11,x0,3 + 8000b958: 04b51063 bne x10,x11,8000b998 + 8000b95c: 07800593 addi x11,x0,120 + 8000b960: 00016617 auipc x12,0x16 + 8000b964: 88860613 addi x12,x12,-1912 # 800211e8 + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00b60023 sb x11,0(x12) + 8000b984: 00160613 addi x12,x12,1 + 8000b988: 00015517 auipc x10,0x15 + 8000b98c: 7fc52503 lw x10,2044(x10) # 80021184 + 8000b990: 324010ef jal x1,8000ccb4 + 8000b994: 1180006f jal x0,8000baac + +000000008000b998 : + 8000b998: 00100593 addi x11,x0,1 + 8000b99c: 04b50863 beq x10,x11,8000b9ec + 8000b9a0: 00400593 addi x11,x0,4 + 8000b9a4: 08b50a63 beq x10,x11,8000ba38 + 8000b9a8: 00500593 addi x11,x0,5 + 8000b9ac: 0cb50463 beq x10,x11,8000ba74 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00017517 auipc x10,0x17 + 8000b9c4: a4950513 addi x10,x10,-1463 # 80022409 + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00037097 auipc x1,0x37 + 8000b9e4: bc4080e7 jalr x1,-1084(x1) # 800425a4 + 8000b9e8: 1000006f jal x0,8000bae8 + +000000008000b9ec : + 8000b9ec: 06600593 addi x11,x0,102 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00015617 auipc x12,0x15 + 8000ba04: 7e860613 addi x12,x12,2024 # 800211e8 + 8000ba08: 00000013 addi x0,x0,0 + 8000ba0c: 00000013 addi x0,x0,0 + 8000ba10: 00000013 addi x0,x0,0 + 8000ba14: 00000013 addi x0,x0,0 + 8000ba18: 00000013 addi x0,x0,0 + 8000ba1c: 00000013 addi x0,x0,0 + 8000ba20: 00b60023 sb x11,0(x12) + 8000ba24: 00160613 addi x12,x12,1 + 8000ba28: 00015517 auipc x10,0x15 + 8000ba2c: 75c52503 lw x10,1884(x10) # 80021184 + 8000ba30: 284010ef jal x1,8000ccb4 + 8000ba34: 0780006f jal x0,8000baac + +000000008000ba38 : + 8000ba38: 07600593 addi x11,x0,118 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00015617 auipc x12,0x15 + 8000ba44: 7a860613 addi x12,x12,1960 # 800211e8 + 8000ba48: 00000013 addi x0,x0,0 + 8000ba4c: 00000013 addi x0,x0,0 + 8000ba50: 00000013 addi x0,x0,0 + 8000ba54: 00000013 addi x0,x0,0 + 8000ba58: 00000013 addi x0,x0,0 + 8000ba5c: 00000013 addi x0,x0,0 + 8000ba60: 00b60023 sb x11,0(x12) + 8000ba64: 00160613 addi x12,x12,1 + 8000ba68: 00015517 auipc x10,0x15 + 8000ba6c: 71c52503 lw x10,1820(x10) # 80021184 + 8000ba70: 244010ef jal x1,8000ccb4 + +000000008000ba74 : + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00017517 auipc x10,0x17 + 8000ba84: 86c50513 addi x10,x10,-1940 # 800222ec + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00037097 auipc x1,0x37 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000baa8: 0400006f jal x0,8000bae8 + +000000008000baac : + 8000baac: 00000013 addi x0,x0,0 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00015517 auipc x10,0x15 + 8000bac4: 72850513 addi x10,x10,1832 # 800211e8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00037097 auipc x1,0x37 + 8000bae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + +000000008000bae8 : + 8000bae8: 00000013 addi x0,x0,0 + 8000baec: 00000013 addi x0,x0,0 + 8000baf0: 00000013 addi x0,x0,0 + 8000baf4: 00000013 addi x0,x0,0 + 8000baf8: 00000013 addi x0,x0,0 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00017517 auipc x10,0x17 + 8000bb04: 80450513 addi x10,x10,-2044 # 80022304 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00037097 auipc x1,0x37 + 8000bb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000bb28: 00015517 auipc x10,0x15 + 8000bb2c: 55852503 lw x10,1368(x10) # 80021080 + 8000bb30: 00100593 addi x11,x0,1 + 8000bb34: 00b51c63 bne x10,x11,8000bb4c + 8000bb38: 00015517 auipc x10,0x15 + 8000bb3c: 65853503 ld x10,1624(x10) # 80021190 + 8000bb40: 04000593 addi x11,x0,64 + 8000bb44: 0f4010ef jal x1,8000cc38 + 8000bb48: 0140006f jal x0,8000bb5c + +000000008000bb4c : + 8000bb4c: 00015517 auipc x10,0x15 + 8000bb50: 64453503 ld x10,1604(x10) # 80021190 + 8000bb54: 04000593 addi x11,x0,64 + 8000bb58: 0e0010ef jal x1,8000cc38 + +000000008000bb5c : + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00015517 auipc x10,0x15 + 8000bb64: 68850513 addi x10,x10,1672 # 800211e8 + 8000bb68: 00000013 addi x0,x0,0 + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00037097 auipc x1,0x37 + 8000bb84: a24080e7 jalr x1,-1500(x1) # 800425a4 + 8000bb88: 00015517 auipc x10,0x15 + 8000bb8c: 62052503 lw x10,1568(x10) # 800211a8 + 8000bb90: 08051e63 bne x10,x0,8000bc2c + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00016517 auipc x10,0x16 + 8000bba4: 77b50513 addi x10,x10,1915 # 8002231b + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00037097 auipc x1,0x37 + 8000bbc4: 9e4080e7 jalr x1,-1564(x1) # 800425a4 + 8000bbc8: 00015517 auipc x10,0x15 + 8000bbcc: 4b852503 lw x10,1208(x10) # 80021080 + 8000bbd0: 00100593 addi x11,x0,1 + 8000bbd4: 00b51c63 bne x10,x11,8000bbec + 8000bbd8: 00015517 auipc x10,0x15 + 8000bbdc: 5c053503 ld x10,1472(x10) # 80021198 + 8000bbe0: 04000593 addi x11,x0,64 + 8000bbe4: 054010ef jal x1,8000cc38 + 8000bbe8: 0140006f jal x0,8000bbfc + +000000008000bbec : + 8000bbec: 00015517 auipc x10,0x15 + 8000bbf0: 5ac53503 ld x10,1452(x10) # 80021198 + 8000bbf4: 04000593 addi x11,x0,64 + 8000bbf8: 040010ef jal x1,8000cc38 + +000000008000bbfc : + 8000bbfc: 00000013 addi x0,x0,0 + 8000bc00: 00015517 auipc x10,0x15 + 8000bc04: 5e850513 addi x10,x10,1512 # 800211e8 + 8000bc08: 00000013 addi x0,x0,0 + 8000bc0c: 00000013 addi x0,x0,0 + 8000bc10: 00000013 addi x0,x0,0 + 8000bc14: 00000013 addi x0,x0,0 + 8000bc18: 00000013 addi x0,x0,0 + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00037097 auipc x1,0x37 + 8000bc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000bc28: 5bd0006f jal x0,8000c9e4 + +000000008000bc2c : + 8000bc2c: 00100593 addi x11,x0,1 + 8000bc30: 06b51e63 bne x10,x11,8000bcac + +000000008000bc34 : + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00016517 auipc x10,0x16 + 8000bc44: 6f250513 addi x10,x10,1778 # 80022332 + 8000bc48: 00000013 addi x0,x0,0 + 8000bc4c: 00000013 addi x0,x0,0 + 8000bc50: 00000013 addi x0,x0,0 + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00037097 auipc x1,0x37 + 8000bc64: 944080e7 jalr x1,-1724(x1) # 800425a4 + 8000bc68: 00015517 auipc x10,0x15 + 8000bc6c: 53053503 ld x10,1328(x10) # 80021198 + 8000bc70: 02000593 addi x11,x0,32 + 8000bc74: 7c5000ef jal x1,8000cc38 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00015517 auipc x10,0x15 + 8000bc84: 56850513 addi x10,x10,1384 # 800211e8 + 8000bc88: 00000013 addi x0,x0,0 + 8000bc8c: 00000013 addi x0,x0,0 + 8000bc90: 00000013 addi x0,x0,0 + 8000bc94: 00000013 addi x0,x0,0 + 8000bc98: 00000013 addi x0,x0,0 + 8000bc9c: 00000013 addi x0,x0,0 + 8000bca0: 00037097 auipc x1,0x37 + 8000bca4: 904080e7 jalr x1,-1788(x1) # 800425a4 + 8000bca8: 53d0006f jal x0,8000c9e4 + +000000008000bcac : + 8000bcac: 00000013 addi x0,x0,0 + 8000bcb0: 00000013 addi x0,x0,0 + 8000bcb4: 00000013 addi x0,x0,0 + 8000bcb8: 00000013 addi x0,x0,0 + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00016517 auipc x10,0x16 + 8000bcc4: 6d050513 addi x10,x10,1744 # 80022390 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00037097 auipc x1,0x37 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000bce8: 00015517 auipc x10,0x15 + 8000bcec: 4b053503 ld x10,1200(x10) # 80021198 + 8000bcf0: 04000593 addi x11,x0,64 + 8000bcf4: 745000ef jal x1,8000cc38 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00015517 auipc x10,0x15 + 8000bd04: 4e850513 addi x10,x10,1256 # 800211e8 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00037097 auipc x1,0x37 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800425a4 + 8000bd28: 4bd0006f jal x0,8000c9e4 + +000000008000bd2c : + 8000bd2c: 00015417 auipc x8,0x15 + 8000bd30: 48442403 lw x8,1156(x8) # 800211b0 + 8000bd34: 00900493 addi x9,x0,9 + 8000bd38: 0a940c63 beq x8,x9,8000bdf0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00016517 auipc x10,0x16 + 8000bd44: 6f550513 addi x10,x10,1781 # 80022435 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00037097 auipc x1,0x37 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800425a4 + 8000bd68: 00000013 addi x0,x0,0 + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00016517 auipc x10,0x16 + 8000bd84: 6e150513 addi x10,x10,1761 # 80022461 + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00037097 auipc x1,0x37 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800425a4 + 8000bda8: 00015817 auipc x16,0x15 + 8000bdac: 41080813 addi x16,x16,1040 # 800211b8 + 8000bdb0: 00083503 ld x10,0(x16) + 8000bdb4: 00036097 auipc x1,0x36 + 8000bdb8: 7f0080e7 jalr x1,2032(x1) # 800425a4 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00016517 auipc x10,0x16 + 8000bdc4: ae650513 addi x10,x10,-1306 # 800218a6 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00036097 auipc x1,0x36 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 8000bde8: 280404e3 beq x8,x0,8000c870 + 8000bdec: 3400006f jal x0,8000c12c + +000000008000bdf0 : + 8000bdf0: 00000013 addi x0,x0,0 + 8000bdf4: 00000013 addi x0,x0,0 + 8000bdf8: 00000013 addi x0,x0,0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00016517 auipc x10,0x16 + 8000be04: 67150513 addi x10,x10,1649 # 80022471 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00036097 auipc x1,0x36 + 8000be24: 784080e7 jalr x1,1924(x1) # 800425a4 + 8000be28: 00015517 auipc x10,0x15 + 8000be2c: 37053503 ld x10,880(x10) # 80021198 + 8000be30: 04000593 addi x11,x0,64 + 8000be34: 605000ef jal x1,8000cc38 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00015517 auipc x10,0x15 + 8000be44: 3a850513 addi x10,x10,936 # 800211e8 + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00036097 auipc x1,0x36 + 8000be64: 744080e7 jalr x1,1860(x1) # 800425a4 + 8000be68: 00000013 addi x0,x0,0 + 8000be6c: 00000013 addi x0,x0,0 + 8000be70: 00000013 addi x0,x0,0 + 8000be74: 00000013 addi x0,x0,0 + 8000be78: 00000013 addi x0,x0,0 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00016517 auipc x10,0x16 + 8000be84: 61c50513 addi x10,x10,1564 # 8002249c + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00036097 auipc x1,0x36 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 8000bea8: 00015517 auipc x10,0x15 + 8000beac: 2e853503 ld x10,744(x10) # 80021190 + 8000beb0: 04000593 addi x11,x0,64 + 8000beb4: 585000ef jal x1,8000cc38 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00015517 auipc x10,0x15 + 8000bec4: 32850513 addi x10,x10,808 # 800211e8 + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00036097 auipc x1,0x36 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800425a4 + 8000bee8: 00015317 auipc x6,0x15 + 8000beec: 2a833303 ld x6,680(x6) # 80021190 + 8000bef0: 00015397 auipc x7,0x15 + 8000bef4: 2a83b383 ld x7,680(x7) # 80021198 + 8000bef8: 10736a63 bltu x6,x7,8000c00c + +000000008000befc : + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00016517 auipc x10,0x16 + 8000bf04: 5cb50513 addi x10,x10,1483 # 800224cb + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00036097 auipc x1,0x36 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800425a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00016517 auipc x10,0x16 + 8000bf44: 5f350513 addi x10,x10,1523 # 80022533 + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00036097 auipc x1,0x36 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800425a4 + 8000bf68: 00015317 auipc x6,0x15 + 8000bf6c: 22833303 ld x6,552(x6) # 80021190 + 8000bf70: 00015397 auipc x7,0x15 + 8000bf74: 2283b383 ld x7,552(x7) # 80021198 + 8000bf78: 40730533 sub x10,x6,x7 + 8000bf7c: 04000593 addi x11,x0,64 + 8000bf80: 4b9000ef jal x1,8000cc38 + 8000bf84: 00000013 addi x0,x0,0 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00015517 auipc x10,0x15 + 8000bfa4: 24850513 addi x10,x10,584 # 800211e8 + 8000bfa8: 00000013 addi x0,x0,0 + 8000bfac: 00000013 addi x0,x0,0 + 8000bfb0: 00000013 addi x0,x0,0 + 8000bfb4: 00000013 addi x0,x0,0 + 8000bfb8: 00000013 addi x0,x0,0 + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00036097 auipc x1,0x36 + 8000bfc4: 5e4080e7 jalr x1,1508(x1) # 800425a4 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00016517 auipc x10,0x16 + 8000bfe4: 57a50513 addi x10,x10,1402 # 8002255a + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00036097 auipc x1,0x36 + 8000c004: 5a4080e7 jalr x1,1444(x1) # 800425a4 + 8000c008: 1dd0006f jal x0,8000c9e4 + +000000008000c00c : + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00016517 auipc x10,0x16 + 8000c024: 4d750513 addi x10,x10,1239 # 800224f7 + 8000c028: 00000013 addi x0,x0,0 + 8000c02c: 00000013 addi x0,x0,0 + 8000c030: 00000013 addi x0,x0,0 + 8000c034: 00000013 addi x0,x0,0 + 8000c038: 00000013 addi x0,x0,0 + 8000c03c: 00000013 addi x0,x0,0 + 8000c040: 00036097 auipc x1,0x36 + 8000c044: 564080e7 jalr x1,1380(x1) # 800425a4 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00016517 auipc x10,0x16 + 8000c064: 4d350513 addi x10,x10,1235 # 80022533 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00036097 auipc x1,0x36 + 8000c084: 524080e7 jalr x1,1316(x1) # 800425a4 + 8000c088: 00015317 auipc x6,0x15 + 8000c08c: 11033303 ld x6,272(x6) # 80021198 + 8000c090: 00015397 auipc x7,0x15 + 8000c094: 1003b383 ld x7,256(x7) # 80021190 + 8000c098: 40730533 sub x10,x6,x7 + 8000c09c: 04000593 addi x11,x0,64 + 8000c0a0: 399000ef jal x1,8000cc38 + 8000c0a4: 00000013 addi x0,x0,0 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00015517 auipc x10,0x15 + 8000c0c4: 12850513 addi x10,x10,296 # 800211e8 + 8000c0c8: 00000013 addi x0,x0,0 + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00036097 auipc x1,0x36 + 8000c0e4: 4c4080e7 jalr x1,1220(x1) # 800425a4 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00016517 auipc x10,0x16 + 8000c104: 54250513 addi x10,x10,1346 # 80022642 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00036097 auipc x1,0x36 + 8000c124: 484080e7 jalr x1,1156(x1) # 800425a4 + 8000c128: 0bd0006f jal x0,8000c9e4 + +000000008000c12c : + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00016517 auipc x10,0x16 + 8000c144: 5e950513 addi x10,x10,1513 # 80022729 + 8000c148: 00000013 addi x0,x0,0 + 8000c14c: 00000013 addi x0,x0,0 + 8000c150: 00000013 addi x0,x0,0 + 8000c154: 00000013 addi x0,x0,0 + 8000c158: 00000013 addi x0,x0,0 + 8000c15c: 00000013 addi x0,x0,0 + 8000c160: 00036097 auipc x1,0x36 + 8000c164: 444080e7 jalr x1,1092(x1) # 800425a4 + 8000c168: 00015517 auipc x10,0x15 + 8000c16c: 04c52503 lw x10,76(x10) # 800211b4 + 8000c170: 04050a63 beq x10,x0,8000c1c4 + 8000c174: 00100593 addi x11,x0,1 + 8000c178: 08b50663 beq x10,x11,8000c204 + 8000c17c: 00200593 addi x11,x0,2 + 8000c180: 0cb50263 beq x10,x11,8000c244 + 8000c184: 00300593 addi x11,x0,3 + 8000c188: 0eb50e63 beq x10,x11,8000c284 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00016517 auipc x10,0x16 + 8000c1a4: 5c550513 addi x10,x10,1477 # 80022765 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 1000006f jal x0,8000c2c0 + +000000008000c1c4 : + 8000c1c4: 00000013 addi x0,x0,0 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00016517 auipc x10,0x16 + 8000c1e4: 56350513 addi x10,x10,1379 # 80022743 + 8000c1e8: 00000013 addi x0,x0,0 + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 0c00006f jal x0,8000c2c0 + +000000008000c204 : + 8000c204: 00000013 addi x0,x0,0 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00016517 auipc x10,0x16 + 8000c224: 52b50513 addi x10,x10,1323 # 8002274b + 8000c228: 00000013 addi x0,x0,0 + 8000c22c: 00000013 addi x0,x0,0 + 8000c230: 00000013 addi x0,x0,0 + 8000c234: 00000013 addi x0,x0,0 + 8000c238: 00000013 addi x0,x0,0 + 8000c23c: 00000013 addi x0,x0,0 + 8000c240: 0800006f jal x0,8000c2c0 + +000000008000c244 : + 8000c244: 00000013 addi x0,x0,0 + 8000c248: 00000013 addi x0,x0,0 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 4f350513 addi x10,x10,1267 # 80022753 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 0400006f jal x0,8000c2c0 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 4bc50513 addi x10,x10,1212 # 8002275c + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + +000000008000c2c0 : + 8000c2c0: 00036097 auipc x1,0x36 + 8000c2c4: 2e4080e7 jalr x1,740(x1) # 800425a4 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 48e50513 addi x10,x10,1166 # 8002276e + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 00036097 auipc x1,0x36 + 8000c304: 2a4080e7 jalr x1,676(x1) # 800425a4 + 8000c308: 00015517 auipc x10,0x15 + 8000c30c: ea852503 lw x10,-344(x10) # 800211b0 + 8000c310: 00100593 addi x11,x0,1 + 8000c314: 06b50863 beq x10,x11,8000c384 + 8000c318: 00200593 addi x11,x0,2 + 8000c31c: 0ab50463 beq x10,x11,8000c3c4 + 8000c320: 00300593 addi x11,x0,3 + 8000c324: 0eb50063 beq x10,x11,8000c404 + 8000c328: 00400593 addi x11,x0,4 + 8000c32c: 10b50c63 beq x10,x11,8000c444 + 8000c330: 00500593 addi x11,x0,5 + 8000c334: 14b50863 beq x10,x11,8000c484 + 8000c338: 00600593 addi x11,x0,6 + 8000c33c: 18b50463 beq x10,x11,8000c4c4 + 8000c340: 00700593 addi x11,x0,7 + 8000c344: 1cb50063 beq x10,x11,8000c504 + 8000c348: 00800593 addi x11,x0,8 + 8000c34c: 1eb50c63 beq x10,x11,8000c544 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00016517 auipc x10,0x16 + 8000c364: 56550513 addi x10,x10,1381 # 800228c5 + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + 8000c380: 2000006f jal x0,8000c580 + +000000008000c384 : + 8000c384: 00000013 addi x0,x0,0 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 3e850513 addi x10,x10,1000 # 80022788 + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 1c00006f jal x0,8000c580 + +000000008000c3c4 : + 8000c3c4: 00000013 addi x0,x0,0 + 8000c3c8: 00000013 addi x0,x0,0 + 8000c3cc: 00000013 addi x0,x0,0 + 8000c3d0: 00000013 addi x0,x0,0 + 8000c3d4: 00000013 addi x0,x0,0 + 8000c3d8: 00000013 addi x0,x0,0 + 8000c3dc: 00000013 addi x0,x0,0 + 8000c3e0: 00016517 auipc x10,0x16 + 8000c3e4: 3d950513 addi x10,x10,985 # 800227b9 + 8000c3e8: 00000013 addi x0,x0,0 + 8000c3ec: 00000013 addi x0,x0,0 + 8000c3f0: 00000013 addi x0,x0,0 + 8000c3f4: 00000013 addi x0,x0,0 + 8000c3f8: 00000013 addi x0,x0,0 + 8000c3fc: 00000013 addi x0,x0,0 + 8000c400: 1800006f jal x0,8000c580 + +000000008000c404 : + 8000c404: 00000013 addi x0,x0,0 + 8000c408: 00000013 addi x0,x0,0 + 8000c40c: 00000013 addi x0,x0,0 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 3b950513 addi x10,x10,953 # 800227d9 + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 1400006f jal x0,8000c580 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 39750513 addi x10,x10,919 # 800227f7 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1000006f jal x0,8000c580 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 37650513 addi x10,x10,886 # 80022816 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 0c00006f jal x0,8000c580 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 35e50513 addi x10,x10,862 # 8002283e + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 0800006f jal x0,8000c580 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 34a50513 addi x10,x10,842 # 8002286a + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 0400006f jal x0,8000c580 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 33650513 addi x10,x10,822 # 80022896 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + +000000008000c580 : + 8000c580: 00036097 auipc x1,0x36 + 8000c584: 024080e7 jalr x1,36(x1) # 800425a4 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 33450513 addi x10,x10,820 # 800228d4 + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 00036097 auipc x1,0x36 + 8000c5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000c5c8: 00015517 auipc x10,0x15 + 8000c5cc: bd053503 ld x10,-1072(x10) # 80021198 + 8000c5d0: 04000593 addi x11,x0,64 + 8000c5d4: 664000ef jal x1,8000cc38 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00015517 auipc x10,0x15 + 8000c5e4: c0850513 addi x10,x10,-1016 # 800211e8 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 00036097 auipc x1,0x36 + 8000c604: fa4080e7 jalr x1,-92(x1) # 800425a4 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 2cb50513 addi x10,x10,715 # 800228eb + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + 8000c640: 00036097 auipc x1,0x36 + 8000c644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000c648: 00015517 auipc x10,0x15 + 8000c64c: b4853503 ld x10,-1208(x10) # 80021190 + 8000c650: 04000593 addi x11,x0,64 + 8000c654: 5e4000ef jal x1,8000cc38 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00015517 auipc x10,0x15 + 8000c664: b8850513 addi x10,x10,-1144 # 800211e8 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00036097 auipc x1,0x36 + 8000c684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: b2852503 lw x10,-1240(x10) # 800211b0 + 8000c690: 00200593 addi x11,x0,2 + 8000c694: 08b51463 bne x10,x11,8000c71c + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00016517 auipc x10,0x16 + 8000c6a4: 26250513 addi x10,x10,610 # 80022902 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00036097 auipc x1,0x36 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800425a4 + 8000c6c8: 00015517 auipc x10,0x15 + 8000c6cc: ad053503 ld x10,-1328(x10) # 80021198 + 8000c6d0: 284000ef jal x1,8000c954 + 8000c6d4: 00036097 auipc x1,0x36 + 8000c6d8: ed0080e7 jalr x1,-304(x1) # 800425a4 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 23950513 addi x10,x10,569 # 80022919 + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00036097 auipc x1,0x36 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800425a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: a8853503 ld x10,-1400(x10) # 80021190 + 8000c710: 244000ef jal x1,8000c954 + 8000c714: 00036097 auipc x1,0x36 + 8000c718: e90080e7 jalr x1,-368(x1) # 800425a4 + +000000008000c71c : + 8000c71c: 00000097 auipc x1,0x0 + 8000c720: 314080e7 jalr x1,788(x1) # 8000ca30 + 8000c724: 00015517 auipc x10,0x15 + 8000c728: a8c52503 lw x10,-1396(x10) # 800211b0 + 8000c72c: 00100593 addi x11,x0,1 + 8000c730: 02b51e63 bne x10,x11,8000c76c + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00016517 auipc x10,0x16 + 8000c744: 24f50513 addi x10,x10,591 # 8002298f + 8000c748: 00000013 addi x0,x0,0 + 8000c74c: 00000013 addi x0,x0,0 + 8000c750: 00000013 addi x0,x0,0 + 8000c754: 00000013 addi x0,x0,0 + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00036097 auipc x1,0x36 + 8000c764: e44080e7 jalr x1,-444(x1) # 800425a4 + 8000c768: 27c0006f jal x0,8000c9e4 + 8000c76c: 00200593 addi x11,x0,2 + 8000c770: 02b51e63 bne x10,x11,8000c7ac + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00016517 auipc x10,0x16 + 8000c784: 2e550513 addi x10,x10,741 # 80022a65 + 8000c788: 00000013 addi x0,x0,0 + 8000c78c: 00000013 addi x0,x0,0 + 8000c790: 00000013 addi x0,x0,0 + 8000c794: 00000013 addi x0,x0,0 + 8000c798: 00000013 addi x0,x0,0 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00036097 auipc x1,0x36 + 8000c7a4: e04080e7 jalr x1,-508(x1) # 800425a4 + 8000c7a8: 23c0006f jal x0,8000c9e4 + 8000c7ac: 00300593 addi x11,x0,3 + 8000c7b0: 02b51e63 bne x10,x11,8000c7ec + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00016517 auipc x10,0x16 + 8000c7c4: 39850513 addi x10,x10,920 # 80022b58 + 8000c7c8: 00000013 addi x0,x0,0 + 8000c7cc: 00000013 addi x0,x0,0 + 8000c7d0: 00000013 addi x0,x0,0 + 8000c7d4: 00000013 addi x0,x0,0 + 8000c7d8: 00000013 addi x0,x0,0 + 8000c7dc: 00000013 addi x0,x0,0 + 8000c7e0: 00036097 auipc x1,0x36 + 8000c7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000c7e8: 1fc0006f jal x0,8000c9e4 + 8000c7ec: 00400593 addi x11,x0,4 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: 45350513 addi x10,x10,1107 # 80022c53 + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00036097 auipc x1,0x36 + 8000c824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000c828: 1bc0006f jal x0,8000c9e4 + 8000c82c: 00500593 addi x11,x0,5 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 4fa50513 addi x10,x10,1274 # 80022d3a + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00036097 auipc x1,0x36 + 8000c864: d44080e7 jalr x1,-700(x1) # 800425a4 + 8000c868: 17c0006f jal x0,8000c9e4 + 8000c86c: 1780006f jal x0,8000c9e4 + +000000008000c870 : + 8000c870: 00000013 addi x0,x0,0 + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 0c750513 addi x10,x10,199 # 80022947 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00036097 auipc x1,0x36 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000c8a8: 00015617 auipc x12,0x15 + 8000c8ac: 92063603 ld x12,-1760(x12) # 800211c8 + 8000c8b0: 00000013 addi x0,x0,0 + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00015517 auipc x10,0x15 + 8000c8c4: 07050513 addi x10,x10,112 # 80021930 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00036097 auipc x1,0x36 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000c8e8: 00065503 lhu x10,0(x12) + 8000c8ec: 01000593 addi x11,x0,16 + 8000c8f0: 00357413 andi x8,x10,3 + 8000c8f4: 00300493 addi x9,x0,3 + 8000c8f8: 00941a63 bne x8,x9,8000c90c + 8000c8fc: 00265403 lhu x8,2(x12) + 8000c900: 01041413 slli x8,x8,0x10 + 8000c904: 00856533 or x10,x10,x8 + 8000c908: 02000593 addi x11,x0,32 + 8000c90c: 32c000ef jal x1,8000cc38 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00015517 auipc x10,0x15 + 8000c924: 8c850513 addi x10,x10,-1848 # 800211e8 + 8000c928: 00000013 addi x0,x0,0 + 8000c92c: 00000013 addi x0,x0,0 + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00036097 auipc x1,0x36 + 8000c944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000c948: 00000097 auipc x1,0x0 + 8000c94c: 0e8080e7 jalr x1,232(x1) # 8000ca30 + 8000c950: 0940006f jal x0,8000c9e4 + +000000008000c954 : + 8000c954: 02054463 blt x10,x0,8000c97c + +000000008000c958 : + 8000c958: 01800593 addi x11,x0,24 + 8000c95c: 04b55863 bge x10,x11,8000c9ac + 8000c960: 00015597 auipc x11,0x15 + 8000c964: 8b058593 addi x11,x11,-1872 # 80021210 + 8000c968: 00251613 slli x12,x10,0x2 + 8000c96c: 00351613 slli x12,x10,0x3 + 8000c970: 00c585b3 add x11,x11,x12 + 8000c974: 0005b503 ld x10,0(x11) + 8000c978: 00008067 jalr x0,0(x1) + +000000008000c97c : + 8000c97c: 00100593 addi x11,x0,1 + 8000c980: 03f59593 slli x11,x11,0x3f + 8000c984: 00b54533 xor x10,x10,x11 + 8000c988: 01000593 addi x11,x0,16 + 8000c98c: 02b55063 bge x10,x11,8000c9ac + 8000c990: 00015597 auipc x11,0x15 + 8000c994: 94058593 addi x11,x11,-1728 # 800212d0 + 8000c998: 00251613 slli x12,x10,0x2 + 8000c99c: 00351613 slli x12,x10,0x3 + 8000c9a0: 00c585b3 add x11,x11,x12 + 8000c9a4: 0005b503 ld x10,0(x11) + 8000c9a8: 00008067 jalr x0,0(x1) + +000000008000c9ac : + 8000c9ac: 00000013 addi x0,x0,0 + 8000c9b0: 00000013 addi x0,x0,0 + 8000c9b4: 00000013 addi x0,x0,0 + 8000c9b8: 00000013 addi x0,x0,0 + 8000c9bc: 00000013 addi x0,x0,0 + 8000c9c0: 00015517 auipc x10,0x15 + 8000c9c4: d8e50513 addi x10,x10,-626 # 8002174e + 8000c9c8: 00000013 addi x0,x0,0 + 8000c9cc: 00000013 addi x0,x0,0 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00008067 jalr x0,0(x1) + +000000008000c9e4 : + 8000c9e4: 00000013 addi x0,x0,0 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00016517 auipc x10,0x16 + 8000ca04: 9e850513 addi x10,x10,-1560 # 800223e8 + 8000ca08: 00000013 addi x0,x0,0 + 8000ca0c: 00000013 addi x0,x0,0 + 8000ca10: 00000013 addi x0,x0,0 + 8000ca14: 00000013 addi x0,x0,0 + 8000ca18: 00000013 addi x0,x0,0 + 8000ca1c: 00000013 addi x0,x0,0 + 8000ca20: 00036097 auipc x1,0x36 + 8000ca24: b84080e7 jalr x1,-1148(x1) # 800425a4 + +000000008000ca28 : + 8000ca28: 00036097 auipc x1,0x36 + 8000ca2c: bdc080e7 jalr x1,-1060(x1) # 80042604 + +000000008000ca30 : + 8000ca30: 00014617 auipc x12,0x14 + 8000ca34: 79060613 addi x12,x12,1936 # 800211c0 + 8000ca38: 00163023 sd x1,0(x12) + 8000ca3c: 00000013 addi x0,x0,0 + 8000ca40: 00015517 auipc x10,0x15 + 8000ca44: f1150513 addi x10,x10,-239 # 80021951 + 8000ca48: 00000013 addi x0,x0,0 + 8000ca4c: 00000013 addi x0,x0,0 + 8000ca50: 00000013 addi x0,x0,0 + 8000ca54: 00000013 addi x0,x0,0 + 8000ca58: 00000013 addi x0,x0,0 + 8000ca5c: 00000013 addi x0,x0,0 + 8000ca60: 00036097 auipc x1,0x36 + 8000ca64: b44080e7 jalr x1,-1212(x1) # 800425a4 + 8000ca68: 00014517 auipc x10,0x14 + 8000ca6c: 76053503 ld x10,1888(x10) # 800211c8 + 8000ca70: 04000593 addi x11,x0,64 + 8000ca74: 1c4000ef jal x1,8000cc38 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00014517 auipc x10,0x14 + 8000ca84: 76850513 addi x10,x10,1896 # 800211e8 + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00036097 auipc x1,0x36 + 8000caa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: ea150513 addi x10,x10,-351 # 80021961 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00036097 auipc x1,0x36 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + 8000cae8: 00014517 auipc x10,0x14 + 8000caec: 6e853503 ld x10,1768(x10) # 800211d0 + 8000caf0: 04000593 addi x11,x0,64 + 8000caf4: 144000ef jal x1,8000cc38 + 8000caf8: 00000013 addi x0,x0,0 + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00014517 auipc x10,0x14 + 8000cb04: 6e850513 addi x10,x10,1768 # 800211e8 + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00036097 auipc x1,0x36 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000cb28: 00000013 addi x0,x0,0 + 8000cb2c: 00000013 addi x0,x0,0 + 8000cb30: 00000013 addi x0,x0,0 + 8000cb34: 00000013 addi x0,x0,0 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00015517 auipc x10,0x15 + 8000cb44: e3150513 addi x10,x10,-463 # 80021971 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00036097 auipc x1,0x36 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000cb68: 00014517 auipc x10,0x14 + 8000cb6c: 67053503 ld x10,1648(x10) # 800211d8 + 8000cb70: 04000593 addi x11,x0,64 + 8000cb74: 0c4000ef jal x1,8000cc38 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00014517 auipc x10,0x14 + 8000cb84: 66850513 addi x10,x10,1640 # 800211e8 + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00036097 auipc x1,0x36 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + 8000cba8: 00000013 addi x0,x0,0 + 8000cbac: 00000013 addi x0,x0,0 + 8000cbb0: 00000013 addi x0,x0,0 + 8000cbb4: 00000013 addi x0,x0,0 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00015517 auipc x10,0x15 + 8000cbc4: dc150513 addi x10,x10,-575 # 80021981 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00036097 auipc x1,0x36 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000cbe8: 00014517 auipc x10,0x14 + 8000cbec: 5f853503 ld x10,1528(x10) # 800211e0 + 8000cbf0: 04000593 addi x11,x0,64 + 8000cbf4: 044000ef jal x1,8000cc38 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00014517 auipc x10,0x14 + 8000cc04: 5e850513 addi x10,x10,1512 # 800211e8 + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00036097 auipc x1,0x36 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000cc28: 00014617 auipc x12,0x14 + 8000cc2c: 59860613 addi x12,x12,1432 # 800211c0 + 8000cc30: 00063083 ld x1,0(x12) + 8000cc34: 00008067 jalr x0,0(x1) + +000000008000cc38 : + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00014617 auipc x12,0x14 + 8000cc44: 5a860613 addi x12,x12,1448 # 800211e8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 03000693 addi x13,x0,48 + 8000cc64: 00d60023 sb x13,0(x12) + 8000cc68: 07800693 addi x13,x0,120 + 8000cc6c: 00d600a3 sb x13,1(x12) + 8000cc70: 00260613 addi x12,x12,2 + 8000cc74: 00058693 addi x13,x11,0 + +000000008000cc78 : + 8000cc78: ffc68693 addi x13,x13,-4 + 8000cc7c: 00d55733 srl x14,x10,x13 + 8000cc80: 00f77713 andi x14,x14,15 + 8000cc84: 00a00793 addi x15,x0,10 + 8000cc88: 00f74663 blt x14,x15,8000cc94 + 8000cc8c: 05770713 addi x14,x14,87 + 8000cc90: 0080006f jal x0,8000cc98 + +000000008000cc94 : + 8000cc94: 03070713 addi x14,x14,48 + +000000008000cc98 : + 8000cc98: 00e60023 sb x14,0(x12) + 8000cc9c: 00160613 addi x12,x12,1 + 8000cca0: fc069ce3 bne x13,x0,8000cc78 + 8000cca4: 00a00693 addi x13,x0,10 + 8000cca8: 00d60023 sb x13,0(x12) + 8000ccac: 000600a3 sb x0,1(x12) + 8000ccb0: 00008067 jalr x0,0(x1) + +000000008000ccb4 : + 8000ccb4: 00a00693 addi x13,x0,10 + 8000ccb8: 02d54663 blt x10,x13,8000cce4 + 8000ccbc: ff650513 addi x10,x10,-10 + 8000ccc0: 03100713 addi x14,x0,49 + 8000ccc4: 00d54c63 blt x10,x13,8000ccdc + 8000ccc8: ff650513 addi x10,x10,-10 + 8000cccc: 03200713 addi x14,x0,50 + 8000ccd0: 00d54663 blt x10,x13,8000ccdc + 8000ccd4: ff650513 addi x10,x10,-10 + 8000ccd8: 03300713 addi x14,x0,51 + 8000ccdc: 00e60023 sb x14,0(x12) + 8000cce0: 00160613 addi x12,x12,1 + 8000cce4: 03050513 addi x10,x10,48 + 8000cce8: 00a60023 sb x10,0(x12) + 8000ccec: 00a00693 addi x13,x0,10 + 8000ccf0: 00d600a3 sb x13,1(x12) + 8000ccf4: 00060123 sb x0,2(x12) + 8000ccf8: 00008067 jalr x0,0(x1) + 8000ccfc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080042000 : + 80042000: 10010737 lui x14,0x10010 + 80042004: 00072023 sw x0,0(x14) # 10010000 + 80042008: fffc9397 auipc x7,0xfffc9 + 8004200c: bf038393 addi x7,x7,-1040 # 8000abf8 + 80042010: 00038067 jalr x0,0(x7) + +0000000080042014 : + 80042014: fff00713 addi x14,x0,-1 + 80042018: 100143b7 lui x7,0x10014 + 8004201c: 00e3b023 sd x14,0(x7) # 10014000 + 80042020: fffc9397 auipc x7,0xfffc9 + 80042024: bd838393 addi x7,x7,-1064 # 8000abf8 + 80042028: 00038067 jalr x0,0(x7) + +000000008004202c : + 8004202c: 10000737 lui x14,0x10000 + 80042030: 0107071b addiw x14,x14,16 # 10000010 + 80042034: 00070023 sb x0,0(x14) + 80042038: fffc9397 auipc x7,0xfffc9 + 8004203c: bc038393 addi x7,x7,-1088 # 8000abf8 + 80042040: 00038067 jalr x0,0(x7) + +0000000080042044 : + 80042044: 00200393 addi x7,x0,2 + 80042048: 3443b073 csrrc x0,mip,x7 + 8004204c: fffc9397 auipc x7,0xfffc9 + 80042050: bac38393 addi x7,x7,-1108 # 8000abf8 + 80042054: 00038067 jalr x0,0(x7) + +0000000080042058 : + 80042058: fffc9397 auipc x7,0xfffc9 + 8004205c: ba038393 addi x7,x7,-1120 # 8000abf8 + 80042060: 00038067 jalr x0,0(x7) + +0000000080042064 : + 80042064: 20000413 addi x8,x0,512 + 80042068: 34443073 csrrc x0,mip,x8 + 8004206c: 34402473 csrrs x8,mip,x0 + 80042070: 00001337 lui x6,0x1 + 80042074: 8003031b addiw x6,x6,-2048 # 800 + 80042078: 00647433 and x8,x8,x6 + 8004207c: 00830863 beq x6,x8,8004208c + 80042080: 10000737 lui x14,0x10000 + 80042084: 0187071b addiw x14,x14,24 # 10000018 + 80042088: 00070023 sb x0,0(x14) + 8004208c: fffc9397 auipc x7,0xfffc9 + 80042090: b6c38393 addi x7,x7,-1172 # 8000abf8 + 80042094: 00038067 jalr x0,0(x7) + +0000000080042098 : + 80042098: fffc8317 auipc x6,0xfffc8 + 8004209c: c8030313 addi x6,x6,-896 # 80009d18 + 800420a0: 00030067 jalr x0,0(x6) + 800420a4: fffc9397 auipc x7,0xfffc9 + 800420a8: b5438393 addi x7,x7,-1196 # 8000abf8 + 800420ac: 00038067 jalr x0,0(x7) + +00000000800420b0 : + 800420b0: fffc8317 auipc x6,0xfffc8 + 800420b4: c6830313 addi x6,x6,-920 # 80009d18 + 800420b8: 00030067 jalr x0,0(x6) + 800420bc: fffc9397 auipc x7,0xfffc9 + 800420c0: b3c38393 addi x7,x7,-1220 # 8000abf8 + 800420c4: 00038067 jalr x0,0(x7) + +00000000800420c8 : + 800420c8: fffc8317 auipc x6,0xfffc8 + 800420cc: c5030313 addi x6,x6,-944 # 80009d18 + 800420d0: 00030067 jalr x0,0(x6) + 800420d4: fffc9397 auipc x7,0xfffc9 + 800420d8: b2438393 addi x7,x7,-1244 # 8000abf8 + 800420dc: 00038067 jalr x0,0(x7) + +00000000800420e0 : + 800420e0: 30401073 csrrw x0,mie,x0 + 800420e4: 34401073 csrrw x0,mip,x0 + 800420e8: 34101073 csrrw x0,mepc,x0 + 800420ec: 34301073 csrrw x0,mtval,x0 + 800420f0: 34201073 csrrw x0,mcause,x0 + 800420f4: 00000013 addi x0,x0,0 + 800420f8: 00000013 addi x0,x0,0 + 800420fc: 00000013 addi x0,x0,0 + 80042100: fffce317 auipc x6,0xfffce + 80042104: 01030313 addi x6,x6,16 # 80010110 + 80042108: 00000013 addi x0,x0,0 + 8004210c: 00000013 addi x0,x0,0 + 80042110: 00000013 addi x0,x0,0 + 80042114: 00000013 addi x0,x0,0 + 80042118: 00000013 addi x0,x0,0 + 8004211c: 00000013 addi x0,x0,0 + +0000000080042120 : + 80042120: 34031473 csrrw x8,mscratch,x6 + 80042124: 2c833823 sd x8,720(x6) + +0000000080042128 : + 80042128: fff00393 addi x7,x0,-1 + 8004212c: 000044b7 lui x9,0x4 + 80042130: 00548493 addi x9,x9,5 # 4005 + 80042134: 00e49493 slli x9,x9,0xe + 80042138: 0074b023 sd x7,0(x9) + 8004213c: 00000013 addi x0,x0,0 + +0000000080042140 : + 80042140: 00000393 addi x7,x0,0 + 80042144: 2a733c23 sd x7,696(x6) + +0000000080042148 : + 80042148: 30502473 csrrs x8,mtvec,x0 + 8004214c: 2c833423 sd x8,712(x6) + 80042150: 00347393 andi x7,x8,3 + 80042154: ffc3f393 andi x7,x7,-4 + 80042158: 2b033483 ld x9,688(x6) + 8004215c: da848493 addi x9,x9,-600 + 80042160: 0074e3b3 or x7,x9,x7 + 80042164: 2c733023 sd x7,704(x6) + 80042168: 30539073 csrrw x0,mtvec,x7 + 8004216c: 30502773 csrrs x14,mtvec,x0 + 80042170: 0e770a63 beq x14,x7,80042264 + 80042174: 30541073 csrrw x0,mtvec,x8 + 80042178: 0a040663 beq x8,x0,80042224 + 8004217c: 2c833023 sd x8,704(x6) + +0000000080042180 : + 80042180: ffc47393 andi x7,x8,-4 + 80042184: 25838413 addi x8,x7,600 + 80042188: 00030113 addi x2,x6,0 + 8004218c: 00000013 addi x0,x0,0 + 80042190: 00000013 addi x0,x0,0 + 80042194: 00000013 addi x0,x0,0 + 80042198: 00000013 addi x0,x0,0 + 8004219c: 00000013 addi x0,x0,0 + 800421a0: 00000717 auipc x14,0x0 + 800421a4: 04c70713 addi x14,x14,76 # 800421ec + 800421a8: 00000013 addi x0,x0,0 + 800421ac: 00000013 addi x0,x0,0 + 800421b0: 00000013 addi x0,x0,0 + 800421b4: 00000013 addi x0,x0,0 + 800421b8: 00000013 addi x0,x0,0 + 800421bc: 00000013 addi x0,x0,0 + 800421c0: 00000797 auipc x15,0x0 + 800421c4: 0a478793 addi x15,x15,164 # 80042264 + 800421c8: 00000013 addi x0,x0,0 + 800421cc: 00000013 addi x0,x0,0 + 800421d0: 00000013 addi x0,x0,0 + 800421d4: 00000013 addi x0,x0,0 + 800421d8: 00000013 addi x0,x0,0 + 800421dc: 00000013 addi x0,x0,0 + 800421e0: 00f3f663 bgeu x7,x15,800421ec + 800421e4: 00877463 bgeu x14,x8,800421ec + 800421e8: 03c0006f jal x0,80042224 + +00000000800421ec : + 800421ec: 0003a783 lw x15,0(x7) + 800421f0: 00f32023 sw x15,0(x6) + 800421f4: 0004a703 lw x14,0(x9) + 800421f8: 00e3a023 sw x14,0(x7) + 800421fc: 0003a783 lw x15,0(x7) + 80042200: 00e79a63 bne x15,x14,80042214 + 80042204: 00438393 addi x7,x7,4 + 80042208: 00430313 addi x6,x6,4 + 8004220c: 00448493 addi x9,x9,4 + 80042210: fc741ee3 bne x8,x7,800421ec + +0000000080042214 : + 80042214: 0000100f fence.i + 80042218: 34002373 csrrs x6,mscratch,x0 + 8004221c: 2a933823 sd x9,688(x6) + 80042220: 04740263 beq x8,x7,80042264 + +0000000080042224 : + 80042224: 00038413 addi x8,x7,0 + 80042228: 00000013 addi x0,x0,0 + 8004222c: 00000013 addi x0,x0,0 + 80042230: 00000013 addi x0,x0,0 + 80042234: 00000013 addi x0,x0,0 + 80042238: 00000013 addi x0,x0,0 + 8004223c: 00000013 addi x0,x0,0 + 80042240: fffc8797 auipc x15,0xfffc8 + 80042244: ae878793 addi x15,x15,-1304 # 80009d28 + 80042248: 00000013 addi x0,x0,0 + 8004224c: 00000013 addi x0,x0,0 + 80042250: 00000013 addi x0,x0,0 + 80042254: 00000013 addi x0,x0,0 + 80042258: 00000013 addi x0,x0,0 + 8004225c: 00000013 addi x0,x0,0 + 80042260: 00078067 jalr x0,0(x15) + +0000000080042264 : + 80042264: 00000013 addi x0,x0,0 + +0000000080042268 : + 80042268: 005002b7 lui x5,0x500 + 8004226c: 0012829b addiw x5,x5,1 # 500001 + 80042270: 00d29293 slli x5,x5,0xd + 80042274: 80028293 addi x5,x5,-2048 + 80042278: 30029073 csrrw x0,mstatus,x5 + 8004227c: 32001073 csrrw x0,mcountinhibit,x0 + 80042280: 32301073 csrrw x0,mhpmevent3,x0 + 80042284: 32401073 csrrw x0,mhpmevent4,x0 + 80042288: 32501073 csrrw x0,mhpmevent5,x0 + 8004228c: 32601073 csrrw x0,mhpmevent6,x0 + 80042290: 32701073 csrrw x0,mhpmevent7,x0 + 80042294: 32801073 csrrw x0,mhpmevent8,x0 + 80042298: 32901073 csrrw x0,mhpmevent9,x0 + 8004229c: 32a01073 csrrw x0,mhpmevent10,x0 + 800422a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800422a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800422a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800422ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800422b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800422b4: 33001073 csrrw x0,mhpmevent16,x0 + 800422b8: 33101073 csrrw x0,mhpmevent17,x0 + 800422bc: 33201073 csrrw x0,mhpmevent18,x0 + 800422c0: 33301073 csrrw x0,mhpmevent19,x0 + 800422c4: 33401073 csrrw x0,mhpmevent20,x0 + 800422c8: 33501073 csrrw x0,mhpmevent21,x0 + 800422cc: 33601073 csrrw x0,mhpmevent22,x0 + 800422d0: 33701073 csrrw x0,mhpmevent23,x0 + 800422d4: 33801073 csrrw x0,mhpmevent24,x0 + 800422d8: 33901073 csrrw x0,mhpmevent25,x0 + 800422dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800422e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800422e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800422e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800422ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800422f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800422f4: 00000013 addi x0,x0,0 + 800422f8: 00000013 addi x0,x0,0 + 800422fc: 00000013 addi x0,x0,0 + 80042300: fffce317 auipc x6,0xfffce + 80042304: e0830313 addi x6,x6,-504 # 80010108 + 80042308: 00000013 addi x0,x0,0 + 8004230c: 00000013 addi x0,x0,0 + 80042310: 00000013 addi x0,x0,0 + 80042314: 00000013 addi x0,x0,0 + 80042318: 00000013 addi x0,x0,0 + 8004231c: 00000013 addi x0,x0,0 + 80042320: 00033023 sd x0,0(x6) + +0000000080042324 : + 80042324: feedc0b7 lui x1,0xfeedc + 80042328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004232c: 00b09093 slli x1,x1,0xb + 80042330: 7f708093 addi x1,x1,2039 + 80042334: 00b09093 slli x1,x1,0xb + 80042338: 36f08093 addi x1,x1,879 + 8004233c: 00a09093 slli x1,x1,0xa + 80042340: 2ad08093 addi x1,x1,685 + 80042344: 03909793 slli x15,x1,0x39 + 80042348: 0070d113 srli x2,x1,0x7 + 8004234c: 00f16133 or x2,x2,x15 + 80042350: 03911793 slli x15,x2,0x39 + 80042354: 00715193 srli x3,x2,0x7 + 80042358: 00f1e1b3 or x3,x3,x15 + 8004235c: 03919793 slli x15,x3,0x39 + 80042360: 0071d213 srli x4,x3,0x7 + 80042364: 00f26233 or x4,x4,x15 + 80042368: 03921793 slli x15,x4,0x39 + 8004236c: 00725293 srli x5,x4,0x7 + 80042370: 00f2e2b3 or x5,x5,x15 + 80042374: 03929793 slli x15,x5,0x39 + 80042378: 0072d313 srli x6,x5,0x7 + 8004237c: 00f36333 or x6,x6,x15 + 80042380: 03931793 slli x15,x6,0x39 + 80042384: 00735393 srli x7,x6,0x7 + 80042388: 00f3e3b3 or x7,x7,x15 + 8004238c: 03939793 slli x15,x7,0x39 + 80042390: 0073d413 srli x8,x7,0x7 + 80042394: 00f46433 or x8,x8,x15 + 80042398: 03941793 slli x15,x8,0x39 + 8004239c: 00745493 srli x9,x8,0x7 + 800423a0: 00f4e4b3 or x9,x9,x15 + 800423a4: 03949793 slli x15,x9,0x39 + 800423a8: 0074d513 srli x10,x9,0x7 + 800423ac: 00f56533 or x10,x10,x15 + 800423b0: 03951793 slli x15,x10,0x39 + 800423b4: 00755593 srli x11,x10,0x7 + 800423b8: 00f5e5b3 or x11,x11,x15 + 800423bc: 03959793 slli x15,x11,0x39 + 800423c0: 0075d613 srli x12,x11,0x7 + 800423c4: 00f66633 or x12,x12,x15 + 800423c8: 03961793 slli x15,x12,0x39 + 800423cc: 00765693 srli x13,x12,0x7 + 800423d0: 00f6e6b3 or x13,x13,x15 + 800423d4: 03969793 slli x15,x13,0x39 + 800423d8: 0076d713 srli x14,x13,0x7 + 800423dc: 00f76733 or x14,x14,x15 + 800423e0: fab807b7 lui x15,0xfab80 + 800423e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800423e8: 00b79793 slli x15,x15,0xb + 800423ec: 7d578793 addi x15,x15,2005 + 800423f0: 00b79793 slli x15,x15,0xb + 800423f4: 5fe78793 addi x15,x15,1534 + 800423f8: 00a79793 slli x15,x15,0xa + 800423fc: 3b678793 addi x15,x15,950 + 80042400: 7d5c0837 lui x16,0x7d5c0 + 80042404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80042408: 00b81813 slli x16,x16,0xb + 8004240c: 3ea80813 addi x16,x16,1002 + 80042410: 00b81813 slli x16,x16,0xb + 80042414: 6ff80813 addi x16,x16,1791 + 80042418: 00a81813 slli x16,x16,0xa + 8004241c: 1db80813 addi x16,x16,475 + 80042420: 03981793 slli x15,x16,0x39 + 80042424: 00785893 srli x17,x16,0x7 + 80042428: 00f8e8b3 or x17,x17,x15 + 8004242c: 03989793 slli x15,x17,0x39 + 80042430: 0078d913 srli x18,x17,0x7 + 80042434: 00f96933 or x18,x18,x15 + 80042438: 03991793 slli x15,x18,0x39 + 8004243c: 00795993 srli x19,x18,0x7 + 80042440: 00f9e9b3 or x19,x19,x15 + 80042444: 03999793 slli x15,x19,0x39 + 80042448: 0079da13 srli x20,x19,0x7 + 8004244c: 00fa6a33 or x20,x20,x15 + 80042450: 039a1793 slli x15,x20,0x39 + 80042454: 007a5a93 srli x21,x20,0x7 + 80042458: 00faeab3 or x21,x21,x15 + 8004245c: 039a9793 slli x15,x21,0x39 + 80042460: 007adb13 srli x22,x21,0x7 + 80042464: 00fb6b33 or x22,x22,x15 + 80042468: 039b1793 slli x15,x22,0x39 + 8004246c: 007b5b93 srli x23,x22,0x7 + 80042470: 00fbebb3 or x23,x23,x15 + 80042474: 039b9793 slli x15,x23,0x39 + 80042478: 007bdc13 srli x24,x23,0x7 + 8004247c: 00fc6c33 or x24,x24,x15 + 80042480: 039c1793 slli x15,x24,0x39 + 80042484: 007c5c93 srli x25,x24,0x7 + 80042488: 00fcecb3 or x25,x25,x15 + 8004248c: 039c9793 slli x15,x25,0x39 + 80042490: 007cdd13 srli x26,x25,0x7 + 80042494: 00fd6d33 or x26,x26,x15 + 80042498: 039d1793 slli x15,x26,0x39 + 8004249c: 007d5d93 srli x27,x26,0x7 + 800424a0: 00fdedb3 or x27,x27,x15 + 800424a4: 039d9793 slli x15,x27,0x39 + 800424a8: 007dde13 srli x28,x27,0x7 + 800424ac: 00fe6e33 or x28,x28,x15 + 800424b0: 039e1793 slli x15,x28,0x39 + 800424b4: 007e5e93 srli x29,x28,0x7 + 800424b8: 00feeeb3 or x29,x29,x15 + 800424bc: 039e9793 slli x15,x29,0x39 + 800424c0: 007edf13 srli x30,x29,0x7 + 800424c4: 00ff6f33 or x30,x30,x15 + 800424c8: 039f1793 slli x15,x30,0x39 + 800424cc: 007f5f93 srli x31,x30,0x7 + 800424d0: 00ffefb3 or x31,x31,x15 + 800424d4: 00000013 addi x0,x0,0 + 800424d8: 00000013 addi x0,x0,0 + 800424dc: 00000013 addi x0,x0,0 + 800424e0: fffe1117 auipc x2,0xfffe1 + 800424e4: 99010113 addi x2,x2,-1648 # 80022e70 + 800424e8: 00000013 addi x0,x0,0 + 800424ec: 00000013 addi x0,x0,0 + 800424f0: 00000013 addi x0,x0,0 + 800424f4: 00000013 addi x0,x0,0 + 800424f8: 00000013 addi x0,x0,0 + 800424fc: 00000013 addi x0,x0,0 + +0000000080042500 : + 80042500: 6f5ca337 lui x6,0x6f5ca + 80042504: 30930313 addi x6,x6,777 # 6f5ca309 + 80042508: 00b31313 slli x6,x6,0xb + 8004250c: 73e30313 addi x6,x6,1854 + 80042510: 00b31313 slli x6,x6,0xb + 80042514: 52c30313 addi x6,x6,1324 + 80042518: 00a31313 slli x6,x6,0xa + 8004251c: 28130313 addi x6,x6,641 + 80042520: fffc9197 auipc x3,0xfffc9 + 80042524: be018193 addi x3,x3,-1056 # 8000b100 + 80042528: 00000013 addi x0,x0,0 + 8004252c: 00000013 addi x0,x0,0 + 80042530: 00000013 addi x0,x0,0 + 80042534: 00000013 addi x0,x0,0 + 80042538: 00000013 addi x0,x0,0 + 8004253c: 00000013 addi x0,x0,0 + 80042540: 00013203 ld x4,0(x2) + 80042544: 00620c63 beq x4,x6,8004255c + 80042548: 000182e7 jalr x5,0(x3) + 8004254c: 80042500 .word 0x80042500 + 80042550: 00000000 .word 0x00000000 + 80042554: 80022411 .word 0x80022411 + 80042558: 00000000 .word 0x00000000 + 8004255c: 00810113 addi x2,x2,8 + 80042560: fffce197 auipc x3,0xfffce + 80042564: f1018193 addi x3,x3,-240 # 80010470 + 80042568: 00000013 addi x0,x0,0 + 8004256c: 00000013 addi x0,x0,0 + 80042570: 00000013 addi x0,x0,0 + 80042574: 00000013 addi x0,x0,0 + 80042578: 00000013 addi x0,x0,0 + 8004257c: 00000013 addi x0,x0,0 + 80042580: fffbe317 auipc x6,0xfffbe + 80042584: ac030313 addi x6,x6,-1344 # 80000040 + 80042588: 00000013 addi x0,x0,0 + 8004258c: 00000013 addi x0,x0,0 + 80042590: 00000013 addi x0,x0,0 + 80042594: 00000013 addi x0,x0,0 + 80042598: 00000013 addi x0,x0,0 + 8004259c: 00000013 addi x0,x0,0 + 800425a0: 00030067 jalr x0,0(x6) + +00000000800425a4 : + 800425a4: 00054303 lbu x6,0(x10) + 800425a8: 00030a63 beq x6,x0,800425bc + 800425ac: 100003b7 lui x7,0x10000 + 800425b0: 00638023 sb x6,0(x7) # 10000000 + 800425b4: 00150513 addi x10,x10,1 + 800425b8: fedff06f jal x0,800425a4 + 800425bc: 00008067 jalr x0,0(x1) + +00000000800425c0 : + 800425c0: ff010113 addi x2,x2,-16 + 800425c4: 00113023 sd x1,0(x2) + 800425c8: 00813423 sd x8,8(x2) + 800425cc: 00000097 auipc x1,0x0 + 800425d0: fd8080e7 jalr x1,-40(x1) # 800425a4 + 800425d4: 00813403 ld x8,8(x2) + 800425d8: 00013083 ld x1,0(x2) + 800425dc: 01010113 addi x2,x2,16 + 800425e0: 00008067 jalr x0,0(x1) + +00000000800425e4 : + 800425e4: 00100093 addi x1,x0,1 + 800425e8: fffff297 auipc x5,0xfffff + 800425ec: 61828293 addi x5,x5,1560 # 80041c00 + +00000000800425f0 : + 800425f0: 0012a023 sw x1,0(x5) + 800425f4: 0002a223 sw x0,4(x5) + +00000000800425f8 : + 800425f8: 00000013 addi x0,x0,0 + 800425fc: ffdff06f jal x0,800425f8 + 80042600: 0000006f jal x0,80042600 + +0000000080042604 : + 80042604: 00300093 addi x1,x0,3 + 80042608: fffff297 auipc x5,0xfffff + 8004260c: 5f828293 addi x5,x5,1528 # 80041c00 + +0000000080042610 : + 80042610: 0012a023 sw x1,0(x5) + 80042614: 0002a223 sw x0,4(x5) + +0000000080042618 : + 80042618: 00000013 addi x0,x0,0 + 8004261c: ffdff06f jal x0,80042618 + 80042620: 0000006f jal x0,80042620 + +0000000080042624 : + 80042624: 00100513 addi x10,x0,1 + 80042628: 100105b7 lui x11,0x10010 + 8004262c: 00a5a023 sw x10,0(x11) # 10010000 + 80042630: 00008067 jalr x0,0(x1) + +0000000080042634 : + 80042634: 100105b7 lui x11,0x10010 + 80042638: 0005a023 sw x0,0(x11) # 10010000 + 8004263c: 00008067 jalr x0,0(x1) + +0000000080042640 : + 80042640: 00100513 addi x10,x0,1 + 80042644: 100005b7 lui x11,0x10000 + 80042648: 0105859b addiw x11,x11,16 # 10000010 + 8004264c: 00a58023 sb x10,0(x11) + 80042650: 00008067 jalr x0,0(x1) + +0000000080042654 : + 80042654: 100005b7 lui x11,0x10000 + 80042658: 0105859b addiw x11,x11,16 # 10000010 + 8004265c: 00058023 sb x0,0(x11) + 80042660: 00008067 jalr x0,0(x1) + 80042664: 00000013 addi x0,x0,0 + 80042668: 00000013 addi x0,x0,0 + 8004266c: 00000013 addi x0,x0,0 + 80042670: 00000013 addi x0,x0,0 + 80042674: 00000013 addi x0,x0,0 + 80042678: 00000013 addi x0,x0,0 + 8004267c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknd-aes64dsm-00.elf.objdump b/riscv-tests/rv64-Zknd-aes64dsm-00.elf.objdump new file mode 100644 index 0000000..bc97aa7 --- /dev/null +++ b/riscv-tests/rv64-Zknd-aes64dsm-00.elf.objdump @@ -0,0 +1,23494 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64dsm-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64dsm-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000041680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cd00 memsz 0x000000000000cd00 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000033680 memsz 0x0000000000033680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000ccc0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00031eb0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041f00 0000000080041f00 0003ff00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080043000 0000000080043000 00041000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00041680 2**0 + CONTENTS, READONLY + 6 .debug_line 000049a0 0000000000000000 0000000000000000 000416bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 0000000000000000 0000000000000000 0004605b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 000460d9 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 000460fc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00046110 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 0000000000000000 0000000000000000 00046150 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 000461dc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080010000 l d .data 0000000000000000 .data +0000000080041f00 l d .tohost 0000000000000000 .tohost +0000000080043000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 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rvtest_fail_summary +000000008000a0c0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00043097 auipc x1,0x43 + 80000004: 0e008093 addi x1,x1,224 # 800430e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x98ba88976d66df6b + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x8ce0735c4a75d047 + 80000048: 0001b503 ld x10,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zknd_aes64dsm_cg_cp_rs1_b0: + aes64dsm x8, x0, x10 # perform operation + 80000050: 3ea00433 aes64dsm x8,x0,x10 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zknd_aes64dsm_cg_cp_rs1_b0, Zknd_aes64dsm_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00820c63 beq x4,x8,80000070 + 8000005c: 0a40b2ef jal x5,8000b100 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 80013470 .word 0x80013470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x1b3229cda84f0f42 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x704bc4252489ad67 + 8000007c: 0001b903 ld x18,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zknd_aes64dsm_cg_cp_rs1_b1: + aes64dsm x29, x1, x18 # perform operation + 80000084: 3f208eb3 aes64dsm x29,x1,x18 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes64dsm_cg_cp_rs1_b1, Zknd_aes64dsm_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01d20c63 beq x4,x29,800000a4 + 80000090: 0700b2ef jal x5,8000b100 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134a5 .word 0x800134a5 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x30, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010f13 addi x30,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x20066117fea47071 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0xb25d3e1cd3fe4880 + 800000b4: 0001b903 ld x18,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zknd_aes64dsm_cg_cp_rs1_b2: + aes64dsm x10, x2, x18 # perform operation + 800000bc: 3f210533 aes64dsm x10,x2,x18 + # Check if x10 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x10, Zknd_aes64dsm_cg_cp_rs1_b2, Zknd_aes64dsm_cg_cp_rs1_b2_str) + 800000c0: 000f3203 ld x4,0(x30) + 800000c4: 00a20c63 beq x4,x10,800000dc + 800000c8: 0380b2ef jal x5,8000b100 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 800134da .word 0x800134da + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008f0f13 addi x30,x30,8 + + mv x11, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xf650b461ca70878a + 800000e4: 0005b183 ld x3,0(x11) + 800000e8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0xde6532fb55052c55 + 800000ec: 0005b883 ld x17,0(x11) + 800000f0: 00858593 addi x11,x11,8 + +00000000800000f4 : +Zknd_aes64dsm_cg_cp_rs1_b3: + aes64dsm x24, x3, x17 # perform operation + 800000f4: 3f118c33 aes64dsm x24,x3,x17 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknd_aes64dsm_cg_cp_rs1_b3, Zknd_aes64dsm_cg_cp_rs1_b3_str) + 800000f8: 000f3203 ld x4,0(x30) + 800000fc: 01820c63 beq x4,x24,80000114 + 80000100: 0000b2ef jal x5,8000b100 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8001350f .word 0x8001350f + 80000110: 00000000 .word 0x00000000 + 80000114: 008f0f13 addi x30,x30,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xed495d3e014b1a66 + 80000120: 0005b203 ld x4,0(x11) + 80000124: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x13) # load rs2: x13 = 0xe65620ceb76cc249 + 80000128: 0005b683 ld x13,0(x11) + 8000012c: 00858593 addi x11,x11,8 + +0000000080000130 : +Zknd_aes64dsm_cg_cp_rs1_b4: + aes64dsm x25, x4, x13 # perform operation + 80000130: 3ed20cb3 aes64dsm x25,x4,x13 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknd_aes64dsm_cg_cp_rs1_b4, Zknd_aes64dsm_cg_cp_rs1_b4_str) + 80000134: 000f3383 ld x7,0(x30) + 80000138: 01938c63 beq x7,x25,80000150 + 8000013c: 7dd0a46f jal x8,8000b118 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 80013544 .word 0x80013544 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x385abf3055edb2bb + 80000154: 0005b283 ld x5,0(x11) + 80000158: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x8ee8e465e9fe3864 + 8000015c: 0005b103 ld x2,0(x11) + 80000160: 00858593 addi x11,x11,8 + +0000000080000164 : +Zknd_aes64dsm_cg_cp_rs1_b5: + aes64dsm x22, x5, x2 # perform operation + 80000164: 3e228b33 aes64dsm x22,x5,x2 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknd_aes64dsm_cg_cp_rs1_b5, Zknd_aes64dsm_cg_cp_rs1_b5_str) + 80000168: 000f3383 ld x7,0(x30) + 8000016c: 01638c63 beq x7,x22,80000184 + 80000170: 7a90a46f jal x8,8000b118 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 80013579 .word 0x80013579 + 80000180: 00000000 .word 0x00000000 + 80000184: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x45a22bfe5c4c7981 + 80000188: 0005b303 ld x6,0(x11) + 8000018c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x8a9446a672e48fa4 + 80000190: 0005bd03 ld x26,0(x11) + 80000194: 00858593 addi x11,x11,8 + +0000000080000198 : +Zknd_aes64dsm_cg_cp_rs1_b6: + aes64dsm x15, x6, x26 # perform operation + 80000198: 3fa307b3 aes64dsm x15,x6,x26 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknd_aes64dsm_cg_cp_rs1_b6, Zknd_aes64dsm_cg_cp_rs1_b6_str) + 8000019c: 000f3383 ld x7,0(x30) + 800001a0: 00f38c63 beq x7,x15,800001b8 + 800001a4: 7750a46f jal x8,8000b118 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135ae .word 0x800135ae + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008f0f13 addi x30,x30,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800001bc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x6f70382a8c4a1887 + 800001c4: 0005b383 ld x7,0(x11) + 800001c8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs2: x23 = 0x538c5f02eff10f7d + 800001cc: 0005bb83 ld x23,0(x11) + 800001d0: 00858593 addi x11,x11,8 + +00000000800001d4 : +Zknd_aes64dsm_cg_cp_rs1_b7: + aes64dsm x3, x7, x23 # perform operation + 800001d4: 3f7381b3 aes64dsm x3,x7,x23 + # Check if x3 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x3, Zknd_aes64dsm_cg_cp_rs1_b7, Zknd_aes64dsm_cg_cp_rs1_b7_str) + 800001d8: 000f3683 ld x13,0(x30) + 800001dc: 00368c63 beq x13,x3,800001f4 + 800001e0: 7610a76f jal x14,8000b140 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 800135e3 .word 0x800135e3 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x1376dcdce0e56015 + 800001f8: 0005b403 ld x8,0(x11) + 800001fc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0xe92a3f3c9d306c92 + 80000200: 0005b103 ld x2,0(x11) + 80000204: 00858593 addi x11,x11,8 + +0000000080000208 : +Zknd_aes64dsm_cg_cp_rs1_b8: + aes64dsm x10, x8, x2 # perform operation + 80000208: 3e240533 aes64dsm x10,x8,x2 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zknd_aes64dsm_cg_cp_rs1_b8, Zknd_aes64dsm_cg_cp_rs1_b8_str) + 8000020c: 000f3683 ld x13,0(x30) + 80000210: 00a68c63 beq x13,x10,80000228 + 80000214: 72d0a76f jal x14,8000b140 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 80013618 .word 0x80013618 + 80000224: 00000000 .word 0x00000000 + 80000228: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x8626298fda7641d9 + 8000022c: 0005b483 ld x9,0(x11) + 80000230: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0xf185e2a93359bffc + 80000234: 0005b803 ld x16,0(x11) + 80000238: 00858593 addi x11,x11,8 + +000000008000023c : +Zknd_aes64dsm_cg_cp_rs1_b9: + aes64dsm x31, x9, x16 # perform operation + 8000023c: 3f048fb3 aes64dsm x31,x9,x16 + # Check if x31 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x31, Zknd_aes64dsm_cg_cp_rs1_b9, Zknd_aes64dsm_cg_cp_rs1_b9_str) + 80000240: 000f3683 ld x13,0(x30) + 80000244: 01f68c63 beq x13,x31,8000025c + 80000248: 6f90a76f jal x14,8000b140 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8001364d .word 0x8001364d + 80000258: 00000000 .word 0x00000000 + 8000025c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xb5f5b5921bf986ef + 80000260: 0005b503 ld x10,0(x11) + 80000264: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs2: x26 = 0x24706c95f3f78863 + 80000268: 0005bd03 ld x26,0(x11) + 8000026c: 00858593 addi x11,x11,8 + +0000000080000270 : +Zknd_aes64dsm_cg_cp_rs1_b10: + aes64dsm x27, x10, x26 # perform operation + 80000270: 3fa50db3 aes64dsm x27,x10,x26 + # Check if x27 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x27, Zknd_aes64dsm_cg_cp_rs1_b10, Zknd_aes64dsm_cg_cp_rs1_b10_str) + 80000274: 000f3683 ld x13,0(x30) + 80000278: 01b68c63 beq x13,x27,80000290 + 8000027c: 6c50a76f jal x14,8000b140 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 80013683 .word 0x80013683 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008f0f13 addi x30,x30,8 + + mv x27, x11 # switch data pointer register to avoid conflict with test + 80000294: 00058d93 addi x27,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xf3d23bff1b68fdc2 + 80000298: 000db583 ld x11,0(x27) + 8000029c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x1c9c509af86066f3 + 800002a0: 000db083 ld x1,0(x27) + 800002a4: 008d8d93 addi x27,x27,8 + +00000000800002a8 : +Zknd_aes64dsm_cg_cp_rs1_b11: + aes64dsm x21, x11, x1 # perform operation + 800002a8: 3e158ab3 aes64dsm x21,x11,x1 + # Check if x21 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x21, Zknd_aes64dsm_cg_cp_rs1_b11, Zknd_aes64dsm_cg_cp_rs1_b11_str) + 800002ac: 000f3683 ld x13,0(x30) + 800002b0: 01568c63 beq x13,x21,800002c8 + 800002b4: 68d0a76f jal x14,8000b140 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 800136ba .word 0x800136ba + 800002c4: 00000000 .word 0x00000000 + 800002c8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x6e6e3d021346e2b5 + 800002cc: 000db603 ld x12,0(x27) + 800002d0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0x6939a25c9281cc99 + 800002d4: 000db283 ld x5,0(x27) + 800002d8: 008d8d93 addi x27,x27,8 + +00000000800002dc : +Zknd_aes64dsm_cg_cp_rs1_b12: + aes64dsm x0, x12, x5 # perform operation + 800002dc: 3e560033 aes64dsm x0,x12,x5 + # Check if x0 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x0, Zknd_aes64dsm_cg_cp_rs1_b12, Zknd_aes64dsm_cg_cp_rs1_b12_str) + 800002e0: 000f3683 ld x13,0(x30) + 800002e4: 00068c63 beq x13,x0,800002fc + 800002e8: 6590a76f jal x14,8000b140 + 800002ec: 800002dc .word 0x800002dc + 800002f0: 00000000 .word 0x00000000 + 800002f4: 800136f1 .word 0x800136f1 + 800002f8: 00000000 .word 0x00000000 + 800002fc: 008f0f13 addi x30,x30,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000300: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000304: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0xc36fb002609057b2 + 80000308: 000db683 ld x13,0(x27) + 8000030c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0xd0ceaad1efbcdd34 + 80000310: 000db103 ld x2,0(x27) + 80000314: 008d8d93 addi x27,x27,8 + +0000000080000318 : +Zknd_aes64dsm_cg_cp_rs1_b13: + aes64dsm x17, x13, x2 # perform operation + 80000318: 3e2688b3 aes64dsm x17,x13,x2 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknd_aes64dsm_cg_cp_rs1_b13, Zknd_aes64dsm_cg_cp_rs1_b13_str) + 8000031c: 000f3383 ld x7,0(x30) + 80000320: 01138c63 beq x7,x17,80000338 + 80000324: 5f50a46f jal x8,8000b118 + 80000328: 80000318 .word 0x80000318 + 8000032c: 00000000 .word 0x00000000 + 80000330: 80013728 .word 0x80013728 + 80000334: 00000000 .word 0x00000000 + 80000338: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x9971227fd6fb565e + 8000033c: 000db703 ld x14,0(x27) + 80000340: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x639fff6c56ef7216 + 80000344: 000db083 ld x1,0(x27) + 80000348: 008d8d93 addi x27,x27,8 + +000000008000034c : +Zknd_aes64dsm_cg_cp_rs1_b14: + aes64dsm x11, x14, x1 # perform operation + 8000034c: 3e1705b3 aes64dsm x11,x14,x1 + # Check if x11 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x11, Zknd_aes64dsm_cg_cp_rs1_b14, Zknd_aes64dsm_cg_cp_rs1_b14_str) + 80000350: 000f3383 ld x7,0(x30) + 80000354: 00b38c63 beq x7,x11,8000036c + 80000358: 5c10a46f jal x8,8000b118 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 8001375f .word 0x8001375f + 80000368: 00000000 .word 0x00000000 + 8000036c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x811e6c734fee11d0 + 80000370: 000db783 ld x15,0(x27) + 80000374: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0x6d8005b40669cec3 + 80000378: 000db503 ld x10,0(x27) + 8000037c: 008d8d93 addi x27,x27,8 + +0000000080000380 : +Zknd_aes64dsm_cg_cp_rs1_b15: + aes64dsm x3, x15, x10 # perform operation + 80000380: 3ea781b3 aes64dsm x3,x15,x10 + # Check if x3 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x3, Zknd_aes64dsm_cg_cp_rs1_b15, Zknd_aes64dsm_cg_cp_rs1_b15_str) + 80000384: 000f3383 ld x7,0(x30) + 80000388: 00338c63 beq x7,x3,800003a0 + 8000038c: 58d0a46f jal x8,8000b118 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 80013796 .word 0x80013796 + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x019c522235221abb + 800003a4: 000db803 ld x16,0(x27) + 800003a8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xfd2e263bea36fa88 + 800003ac: 000db483 ld x9,0(x27) + 800003b0: 008d8d93 addi x27,x27,8 + +00000000800003b4 : +Zknd_aes64dsm_cg_cp_rs1_b16: + aes64dsm x19, x16, x9 # perform operation + 800003b4: 3e9809b3 aes64dsm x19,x16,x9 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknd_aes64dsm_cg_cp_rs1_b16, Zknd_aes64dsm_cg_cp_rs1_b16_str) + 800003b8: 000f3383 ld x7,0(x30) + 800003bc: 01338c63 beq x7,x19,800003d4 + 800003c0: 5590a46f jal x8,8000b118 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 800137cd .word 0x800137cd + 800003d0: 00000000 .word 0x00000000 + 800003d4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x00d92b6e17ee56fa + 800003d8: 000db883 ld x17,0(x27) + 800003dc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0xa3a2ffdf71077663 + 800003e0: 000db703 ld x14,0(x27) + 800003e4: 008d8d93 addi x27,x27,8 + +00000000800003e8 : +Zknd_aes64dsm_cg_cp_rs1_b17: + aes64dsm x29, x17, x14 # perform operation + 800003e8: 3ee88eb3 aes64dsm x29,x17,x14 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknd_aes64dsm_cg_cp_rs1_b17, Zknd_aes64dsm_cg_cp_rs1_b17_str) + 800003ec: 000f3383 ld x7,0(x30) + 800003f0: 01d38c63 beq x7,x29,80000408 + 800003f4: 5250a46f jal x8,8000b118 + 800003f8: 800003e8 .word 0x800003e8 + 800003fc: 00000000 .word 0x00000000 + 80000400: 80013804 .word 0x80013804 + 80000404: 00000000 .word 0x00000000 + 80000408: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x6efe212112021adb + 8000040c: 000db903 ld x18,0(x27) + 80000410: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xafc6cb5108e94d01 + 80000414: 000dba03 ld x20,0(x27) + 80000418: 008d8d93 addi x27,x27,8 + +000000008000041c : +Zknd_aes64dsm_cg_cp_rs1_b18: + aes64dsm x22, x18, x20 # perform operation + 8000041c: 3f490b33 aes64dsm x22,x18,x20 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknd_aes64dsm_cg_cp_rs1_b18, Zknd_aes64dsm_cg_cp_rs1_b18_str) + 80000420: 000f3383 ld x7,0(x30) + 80000424: 01638c63 beq x7,x22,8000043c + 80000428: 4f10a46f jal x8,8000b118 + 8000042c: 8000041c .word 0x8000041c + 80000430: 00000000 .word 0x00000000 + 80000434: 8001383b .word 0x8001383b + 80000438: 00000000 .word 0x00000000 + 8000043c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x2a9f2a558b7db563 + 80000440: 000db983 ld x19,0(x27) + 80000444: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0x454c96caf32853db + 80000448: 000db683 ld x13,0(x27) + 8000044c: 008d8d93 addi x27,x27,8 + +0000000080000450 : +Zknd_aes64dsm_cg_cp_rs1_b19: + aes64dsm x21, x19, x13 # perform operation + 80000450: 3ed98ab3 aes64dsm x21,x19,x13 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknd_aes64dsm_cg_cp_rs1_b19, Zknd_aes64dsm_cg_cp_rs1_b19_str) + 80000454: 000f3383 ld x7,0(x30) + 80000458: 01538c63 beq x7,x21,80000470 + 8000045c: 4bd0a46f jal x8,8000b118 + 80000460: 80000450 .word 0x80000450 + 80000464: 00000000 .word 0x00000000 + 80000468: 80013872 .word 0x80013872 + 8000046c: 00000000 .word 0x00000000 + 80000470: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x9bb95275c29e51aa + 80000474: 000dba03 ld x20,0(x27) + 80000478: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0x3baf643b35d243ed + 8000047c: 000db183 ld x3,0(x27) + 80000480: 008d8d93 addi x27,x27,8 + +0000000080000484 : +Zknd_aes64dsm_cg_cp_rs1_b20: + aes64dsm x26, x20, x3 # perform operation + 80000484: 3e3a0d33 aes64dsm x26,x20,x3 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknd_aes64dsm_cg_cp_rs1_b20, Zknd_aes64dsm_cg_cp_rs1_b20_str) + 80000488: 000f3383 ld x7,0(x30) + 8000048c: 01a38c63 beq x7,x26,800004a4 + 80000490: 4890a46f jal x8,8000b118 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 800138a9 .word 0x800138a9 + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x40ab814eecfa50fc + 800004a8: 000dba83 ld x21,0(x27) + 800004ac: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x18b3ae59c43780ba + 800004b0: 000db583 ld x11,0(x27) + 800004b4: 008d8d93 addi x27,x27,8 + +00000000800004b8 : +Zknd_aes64dsm_cg_cp_rs1_b21: + aes64dsm x23, x21, x11 # perform operation + 800004b8: 3eba8bb3 aes64dsm x23,x21,x11 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknd_aes64dsm_cg_cp_rs1_b21, Zknd_aes64dsm_cg_cp_rs1_b21_str) + 800004bc: 000f3383 ld x7,0(x30) + 800004c0: 01738c63 beq x7,x23,800004d8 + 800004c4: 4550a46f jal x8,8000b118 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 800138e0 .word 0x800138e0 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xe84044473417bd2d + 800004dc: 000dbb03 ld x22,0(x27) + 800004e0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0xff6b31f60834224a + 800004e4: 000dbb83 ld x23,0(x27) + 800004e8: 008d8d93 addi x27,x27,8 + +00000000800004ec : +Zknd_aes64dsm_cg_cp_rs1_b22: + aes64dsm x5, x22, x23 # perform operation + 800004ec: 3f7b02b3 aes64dsm x5,x22,x23 + # Check if x5 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x5, Zknd_aes64dsm_cg_cp_rs1_b22, Zknd_aes64dsm_cg_cp_rs1_b22_str) + 800004f0: 000f3383 ld x7,0(x30) + 800004f4: 00538c63 beq x7,x5,8000050c + 800004f8: 4210a46f jal x8,8000b118 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 80013917 .word 0x80013917 + 80000508: 00000000 .word 0x00000000 + 8000050c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xae895e3c339c4f6f + 80000510: 000dbb83 ld x23,0(x27) + 80000514: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xbd5469ac4c36abea + 80000518: 000db483 ld x9,0(x27) + 8000051c: 008d8d93 addi x27,x27,8 + +0000000080000520 : +Zknd_aes64dsm_cg_cp_rs1_b23: + aes64dsm x22, x23, x9 # perform operation + 80000520: 3e9b8b33 aes64dsm x22,x23,x9 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknd_aes64dsm_cg_cp_rs1_b23, Zknd_aes64dsm_cg_cp_rs1_b23_str) + 80000524: 000f3383 ld x7,0(x30) + 80000528: 01638c63 beq x7,x22,80000540 + 8000052c: 3ed0a46f jal x8,8000b118 + 80000530: 80000520 .word 0x80000520 + 80000534: 00000000 .word 0x00000000 + 80000538: 8001394e .word 0x8001394e + 8000053c: 00000000 .word 0x00000000 + 80000540: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x28611865044f8c66 + 80000544: 000dbc03 ld x24,0(x27) + 80000548: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x7c55758362dd6ccc + 8000054c: 000db603 ld x12,0(x27) + 80000550: 008d8d93 addi x27,x27,8 + +0000000080000554 : +Zknd_aes64dsm_cg_cp_rs1_b24: + aes64dsm x15, x24, x12 # perform operation + 80000554: 3ecc07b3 aes64dsm x15,x24,x12 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknd_aes64dsm_cg_cp_rs1_b24, Zknd_aes64dsm_cg_cp_rs1_b24_str) + 80000558: 000f3383 ld x7,0(x30) + 8000055c: 00f38c63 beq x7,x15,80000574 + 80000560: 3b90a46f jal x8,8000b118 + 80000564: 80000554 .word 0x80000554 + 80000568: 00000000 .word 0x00000000 + 8000056c: 80013985 .word 0x80013985 + 80000570: 00000000 .word 0x00000000 + 80000574: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x78f1a97c1d85f4b7 + 80000578: 000dbc83 ld x25,0(x27) + 8000057c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0x08ace2c98364e1ab + 80000580: 000db483 ld x9,0(x27) + 80000584: 008d8d93 addi x27,x27,8 + +0000000080000588 : +Zknd_aes64dsm_cg_cp_rs1_b25: + aes64dsm x21, x25, x9 # perform operation + 80000588: 3e9c8ab3 aes64dsm x21,x25,x9 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknd_aes64dsm_cg_cp_rs1_b25, Zknd_aes64dsm_cg_cp_rs1_b25_str) + 8000058c: 000f3383 ld x7,0(x30) + 80000590: 01538c63 beq x7,x21,800005a8 + 80000594: 3850a46f jal x8,8000b118 + 80000598: 80000588 .word 0x80000588 + 8000059c: 00000000 .word 0x00000000 + 800005a0: 800139bc .word 0x800139bc + 800005a4: 00000000 .word 0x00000000 + 800005a8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x846581b57e1e692f + 800005ac: 000dbd03 ld x26,0(x27) + 800005b0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x15965f8ef11e6d8a + 800005b4: 000db603 ld x12,0(x27) + 800005b8: 008d8d93 addi x27,x27,8 + +00000000800005bc : +Zknd_aes64dsm_cg_cp_rs1_b26: + aes64dsm x31, x26, x12 # perform operation + 800005bc: 3ecd0fb3 aes64dsm x31,x26,x12 + # Check if x31 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x31, Zknd_aes64dsm_cg_cp_rs1_b26, Zknd_aes64dsm_cg_cp_rs1_b26_str) + 800005c0: 000f3383 ld x7,0(x30) + 800005c4: 01f38c63 beq x7,x31,800005dc + 800005c8: 3510a46f jal x8,8000b118 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 800139f3 .word 0x800139f3 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008f0f13 addi x30,x30,8 + + mv x16, x27 # switch data pointer register to avoid conflict with test + 800005e0: 000d8813 addi x16,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x710bdbee0c871bd9 + 800005e4: 00083d83 ld x27,0(x16) + 800005e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs2: x28 = 0x6e5ee44e7b191ad1 + 800005ec: 00083e03 ld x28,0(x16) + 800005f0: 00880813 addi x16,x16,8 + +00000000800005f4 : +Zknd_aes64dsm_cg_cp_rs1_b27: + aes64dsm x0, x27, x28 # perform operation + 800005f4: 3fcd8033 aes64dsm x0,x27,x28 + # Check if x0 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x0, Zknd_aes64dsm_cg_cp_rs1_b27, Zknd_aes64dsm_cg_cp_rs1_b27_str) + 800005f8: 000f3383 ld x7,0(x30) + 800005fc: 00038c63 beq x7,x0,80000614 + 80000600: 3190a46f jal x8,8000b118 + 80000604: 800005f4 .word 0x800005f4 + 80000608: 00000000 .word 0x00000000 + 8000060c: 80013a2a .word 0x80013a2a + 80000610: 00000000 .word 0x00000000 + 80000614: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0xfa48642bc5ccc1e0 + 80000618: 00083e03 ld x28,0(x16) + 8000061c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xc629293e53befc36 + 80000620: 00083003 ld x0,0(x16) + 80000624: 00880813 addi x16,x16,8 + +0000000080000628 : +Zknd_aes64dsm_cg_cp_rs1_b28: + aes64dsm x19, x28, x0 # perform operation + 80000628: 3e0e09b3 aes64dsm x19,x28,x0 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknd_aes64dsm_cg_cp_rs1_b28, Zknd_aes64dsm_cg_cp_rs1_b28_str) + 8000062c: 000f3383 ld x7,0(x30) + 80000630: 01338c63 beq x7,x19,80000648 + 80000634: 2e50a46f jal x8,8000b118 + 80000638: 80000628 .word 0x80000628 + 8000063c: 00000000 .word 0x00000000 + 80000640: 80013a61 .word 0x80013a61 + 80000644: 00000000 .word 0x00000000 + 80000648: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x320a29115300c513 + 8000064c: 00083e83 ld x29,0(x16) + 80000650: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x61a675b76e2718bc + 80000654: 00083183 ld x3,0(x16) + 80000658: 00880813 addi x16,x16,8 + +000000008000065c : +Zknd_aes64dsm_cg_cp_rs1_b29: + aes64dsm x21, x29, x3 # perform operation + 8000065c: 3e3e8ab3 aes64dsm x21,x29,x3 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknd_aes64dsm_cg_cp_rs1_b29, Zknd_aes64dsm_cg_cp_rs1_b29_str) + 80000660: 000f3383 ld x7,0(x30) + 80000664: 01538c63 beq x7,x21,8000067c + 80000668: 2b10a46f jal x8,8000b118 + 8000066c: 8000065c .word 0x8000065c + 80000670: 00000000 .word 0x00000000 + 80000674: 80013a98 .word 0x80013a98 + 80000678: 00000000 .word 0x00000000 + 8000067c: 008f0f13 addi x30,x30,8 + + mv x28, x30 # switch signature pointer register to avoid conflict with test + 80000680: 000f0e13 addi x28,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0f78a2f0310553be + 80000684: 00083f03 ld x30,0(x16) + 80000688: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x9945967464c9f7b9 + 8000068c: 00083903 ld x18,0(x16) + 80000690: 00880813 addi x16,x16,8 + +0000000080000694 : +Zknd_aes64dsm_cg_cp_rs1_b30: + aes64dsm x25, x30, x18 # perform operation + 80000694: 3f2f0cb3 aes64dsm x25,x30,x18 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknd_aes64dsm_cg_cp_rs1_b30, Zknd_aes64dsm_cg_cp_rs1_b30_str) + 80000698: 000e3383 ld x7,0(x28) + 8000069c: 01938c63 beq x7,x25,800006b4 + 800006a0: 2790a46f jal x8,8000b118 + 800006a4: 80000694 .word 0x80000694 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 80013acf .word 0x80013acf + 800006b0: 00000000 .word 0x00000000 + 800006b4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x3a34830c63b3b23b + 800006b8: 00083f83 ld x31,0(x16) + 800006bc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x752a9bf639ecf317 + 800006c0: 00083783 ld x15,0(x16) + 800006c4: 00880813 addi x16,x16,8 + +00000000800006c8 : +Zknd_aes64dsm_cg_cp_rs1_b31: + aes64dsm x3, x31, x15 # perform operation + 800006c8: 3eff81b3 aes64dsm x3,x31,x15 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64dsm_cg_cp_rs1_b31, Zknd_aes64dsm_cg_cp_rs1_b31_str) + 800006cc: 000e3383 ld x7,0(x28) + 800006d0: 00338c63 beq x7,x3,800006e8 + 800006d4: 2450a46f jal x8,8000b118 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 80013b06 .word 0x80013b06 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 008e0e13 addi x28,x28,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x991eb74de47bba41 + 800006ec: 00083903 ld x18,0(x16) + 800006f0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x5cf75c32d4ea805b + 800006f4: 00083003 ld x0,0(x16) + 800006f8: 00880813 addi x16,x16,8 + +00000000800006fc : +Zknd_aes64dsm_cg_cp_rs2_b0: + aes64dsm x3, x18, x0 # perform operation + 800006fc: 3e0901b3 aes64dsm x3,x18,x0 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64dsm_cg_cp_rs2_b0, Zknd_aes64dsm_cg_cp_rs2_b0_str) + 80000700: 000e3383 ld x7,0(x28) + 80000704: 00338c63 beq x7,x3,8000071c + 80000708: 2110a46f jal x8,8000b118 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80013b3d .word 0x80013b3d + 80000718: 00000000 .word 0x00000000 + 8000071c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xb71034f359f7a587 + 80000720: 00083b83 ld x23,0(x16) + 80000724: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xa3c02fde42513159 + 80000728: 00083083 ld x1,0(x16) + 8000072c: 00880813 addi x16,x16,8 + +0000000080000730 : +Zknd_aes64dsm_cg_cp_rs2_b1: + aes64dsm x0, x23, x1 # perform operation + 80000730: 3e1b8033 aes64dsm x0,x23,x1 + # Check if x0 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x0, Zknd_aes64dsm_cg_cp_rs2_b1, Zknd_aes64dsm_cg_cp_rs2_b1_str) + 80000734: 000e3383 ld x7,0(x28) + 80000738: 00038c63 beq x7,x0,80000750 + 8000073c: 1dd0a46f jal x8,8000b118 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 80013b73 .word 0x80013b73 + 8000074c: 00000000 .word 0x00000000 + 80000750: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x47f07c62d9e68f6b + 80000754: 00083903 ld x18,0(x16) + 80000758: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0x13e2e5e3f2a4e075 + 8000075c: 00083103 ld x2,0(x16) + 80000760: 00880813 addi x16,x16,8 + +0000000080000764 : +Zknd_aes64dsm_cg_cp_rs2_b2: + aes64dsm x1, x18, x2 # perform operation + 80000764: 3e2900b3 aes64dsm x1,x18,x2 + # Check if x1 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x1, Zknd_aes64dsm_cg_cp_rs2_b2, Zknd_aes64dsm_cg_cp_rs2_b2_str) + 80000768: 000e3383 ld x7,0(x28) + 8000076c: 00138c63 beq x7,x1,80000784 + 80000770: 1a90a46f jal x8,8000b118 + 80000774: 80000764 .word 0x80000764 + 80000778: 00000000 .word 0x00000000 + 8000077c: 80013ba9 .word 0x80013ba9 + 80000780: 00000000 .word 0x00000000 + 80000784: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xab3af14aff49c53b + 80000788: 00083883 ld x17,0(x16) + 8000078c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0x6b5cdc2d7a664de1 + 80000790: 00083183 ld x3,0(x16) + 80000794: 00880813 addi x16,x16,8 + +0000000080000798 : +Zknd_aes64dsm_cg_cp_rs2_b3: + aes64dsm x25, x17, x3 # perform operation + 80000798: 3e388cb3 aes64dsm x25,x17,x3 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknd_aes64dsm_cg_cp_rs2_b3, Zknd_aes64dsm_cg_cp_rs2_b3_str) + 8000079c: 000e3383 ld x7,0(x28) + 800007a0: 01938c63 beq x7,x25,800007b8 + 800007a4: 1750a46f jal x8,8000b118 + 800007a8: 80000798 .word 0x80000798 + 800007ac: 00000000 .word 0x00000000 + 800007b0: 80013bdf .word 0x80013bdf + 800007b4: 00000000 .word 0x00000000 + 800007b8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x0f56993afadb7cd9 + 800007bc: 00083303 ld x6,0(x16) + 800007c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0xf64f0183058b33e1 + 800007c4: 00083203 ld x4,0(x16) + 800007c8: 00880813 addi x16,x16,8 + +00000000800007cc : +Zknd_aes64dsm_cg_cp_rs2_b4: + aes64dsm x11, x6, x4 # perform operation + 800007cc: 3e4305b3 aes64dsm x11,x6,x4 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zknd_aes64dsm_cg_cp_rs2_b4, Zknd_aes64dsm_cg_cp_rs2_b4_str) + 800007d0: 000e3383 ld x7,0(x28) + 800007d4: 00b38c63 beq x7,x11,800007ec + 800007d8: 1410a46f jal x8,8000b118 + 800007dc: 800007cc .word 0x800007cc + 800007e0: 00000000 .word 0x00000000 + 800007e4: 80013c15 .word 0x80013c15 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x83147dce944b6bbd + 800007f0: 00083483 ld x9,0(x16) + 800007f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xca671e0dab47cdd8 + 800007f8: 00083283 ld x5,0(x16) + 800007fc: 00880813 addi x16,x16,8 + +0000000080000800 : +Zknd_aes64dsm_cg_cp_rs2_b5: + aes64dsm x25, x9, x5 # perform operation + 80000800: 3e548cb3 aes64dsm x25,x9,x5 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknd_aes64dsm_cg_cp_rs2_b5, Zknd_aes64dsm_cg_cp_rs2_b5_str) + 80000804: 000e3383 ld x7,0(x28) + 80000808: 01938c63 beq x7,x25,80000820 + 8000080c: 10d0a46f jal x8,8000b118 + 80000810: 80000800 .word 0x80000800 + 80000814: 00000000 .word 0x00000000 + 80000818: 80013c4b .word 0x80013c4b + 8000081c: 00000000 .word 0x00000000 + 80000820: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0xa26bd5a858b87159 + 80000824: 00083c03 ld x24,0(x16) + 80000828: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xafabd79af0733f9c + 8000082c: 00083303 ld x6,0(x16) + 80000830: 00880813 addi x16,x16,8 + +0000000080000834 : +Zknd_aes64dsm_cg_cp_rs2_b6: + aes64dsm x10, x24, x6 # perform operation + 80000834: 3e6c0533 aes64dsm x10,x24,x6 + # Check if x10 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x10, Zknd_aes64dsm_cg_cp_rs2_b6, Zknd_aes64dsm_cg_cp_rs2_b6_str) + 80000838: 000e3383 ld x7,0(x28) + 8000083c: 00a38c63 beq x7,x10,80000854 + 80000840: 0d90a46f jal x8,8000b118 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 80013c81 .word 0x80013c81 + 80000850: 00000000 .word 0x00000000 + 80000854: 008e0e13 addi x28,x28,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000858: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 8000085c: 00040713 addi x14,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xc5cd5fc8cf159140 + 80000860: 00083c83 ld x25,0(x16) + 80000864: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x95be8020355150b1 + 80000868: 00083383 ld x7,0(x16) + 8000086c: 00880813 addi x16,x16,8 + +0000000080000870 : +Zknd_aes64dsm_cg_cp_rs2_b7: + aes64dsm x3, x25, x7 # perform operation + 80000870: 3e7c81b3 aes64dsm x3,x25,x7 + # Check if x3 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x3, Zknd_aes64dsm_cg_cp_rs2_b7, Zknd_aes64dsm_cg_cp_rs2_b7_str) + 80000874: 000e3683 ld x13,0(x28) + 80000878: 00368c63 beq x13,x3,80000890 + 8000087c: 0c50a76f jal x14,8000b140 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 80013cb7 .word 0x80013cb7 + 8000088c: 00000000 .word 0x00000000 + 80000890: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x6be4bb42205dcdf1 + 80000894: 00083f83 ld x31,0(x16) + 80000898: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0xa6f9330073db6703 + 8000089c: 00083403 ld x8,0(x16) + 800008a0: 00880813 addi x16,x16,8 + +00000000800008a4 : +Zknd_aes64dsm_cg_cp_rs2_b8: + aes64dsm x4, x31, x8 # perform operation + 800008a4: 3e8f8233 aes64dsm x4,x31,x8 + # Check if x4 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x4, Zknd_aes64dsm_cg_cp_rs2_b8, Zknd_aes64dsm_cg_cp_rs2_b8_str) + 800008a8: 000e3683 ld x13,0(x28) + 800008ac: 00468c63 beq x13,x4,800008c4 + 800008b0: 0910a76f jal x14,8000b140 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 80013ced .word 0x80013ced + 800008c0: 00000000 .word 0x00000000 + 800008c4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x42ce3578cc695bd4 + 800008c8: 00083083 ld x1,0(x16) + 800008cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0xa9e91f36e2dd6a09 + 800008d0: 00083483 ld x9,0(x16) + 800008d4: 00880813 addi x16,x16,8 + +00000000800008d8 : +Zknd_aes64dsm_cg_cp_rs2_b9: + aes64dsm x24, x1, x9 # perform operation + 800008d8: 3e908c33 aes64dsm x24,x1,x9 + # Check if x24 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x24, Zknd_aes64dsm_cg_cp_rs2_b9, Zknd_aes64dsm_cg_cp_rs2_b9_str) + 800008dc: 000e3683 ld x13,0(x28) + 800008e0: 01868c63 beq x13,x24,800008f8 + 800008e4: 05d0a76f jal x14,8000b140 + 800008e8: 800008d8 .word 0x800008d8 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 80013d23 .word 0x80013d23 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x32d65a65d8790f1d + 800008fc: 00083783 ld x15,0(x16) + 80000900: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x32c87eb8e36ccc40 + 80000904: 00083503 ld x10,0(x16) + 80000908: 00880813 addi x16,x16,8 + +000000008000090c : +Zknd_aes64dsm_cg_cp_rs2_b10: + aes64dsm x2, x15, x10 # perform operation + 8000090c: 3ea78133 aes64dsm x2,x15,x10 + # Check if x2 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x2, Zknd_aes64dsm_cg_cp_rs2_b10, Zknd_aes64dsm_cg_cp_rs2_b10_str) + 80000910: 000e3683 ld x13,0(x28) + 80000914: 00268c63 beq x13,x2,8000092c + 80000918: 0290a76f jal x14,8000b140 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 80013d59 .word 0x80013d59 + 80000928: 00000000 .word 0x00000000 + 8000092c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x68a476a39eaf29ca + 80000930: 00083f83 ld x31,0(x16) + 80000934: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0x84508c446f821876 + 80000938: 00083583 ld x11,0(x16) + 8000093c: 00880813 addi x16,x16,8 + +0000000080000940 : +Zknd_aes64dsm_cg_cp_rs2_b11: + aes64dsm x26, x31, x11 # perform operation + 80000940: 3ebf8d33 aes64dsm x26,x31,x11 + # Check if x26 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x26, Zknd_aes64dsm_cg_cp_rs2_b11, Zknd_aes64dsm_cg_cp_rs2_b11_str) + 80000944: 000e3683 ld x13,0(x28) + 80000948: 01a68c63 beq x13,x26,80000960 + 8000094c: 7f40a76f jal x14,8000b140 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 80013d90 .word 0x80013d90 + 8000095c: 00000000 .word 0x00000000 + 80000960: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xe4b81bd132d21c7a + 80000964: 00083f03 ld x30,0(x16) + 80000968: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xb24990b0014e3120 + 8000096c: 00083603 ld x12,0(x16) + 80000970: 00880813 addi x16,x16,8 + +0000000080000974 : +Zknd_aes64dsm_cg_cp_rs2_b12: + aes64dsm x4, x30, x12 # perform operation + 80000974: 3ecf0233 aes64dsm x4,x30,x12 + # Check if x4 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x4, Zknd_aes64dsm_cg_cp_rs2_b12, Zknd_aes64dsm_cg_cp_rs2_b12_str) + 80000978: 000e3683 ld x13,0(x28) + 8000097c: 00468c63 beq x13,x4,80000994 + 80000980: 7c00a76f jal x14,8000b140 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80013dc7 .word 0x80013dc7 + 80000990: 00000000 .word 0x00000000 + 80000994: 008e0e13 addi x28,x28,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000998: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000099c: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x14444fe50c3d1348 + 800009a0: 00083283 ld x5,0(x16) + 800009a4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0xdc0e1a4c679b0faf + 800009a8: 00083683 ld x13,0(x16) + 800009ac: 00880813 addi x16,x16,8 + +00000000800009b0 : +Zknd_aes64dsm_cg_cp_rs2_b13: + aes64dsm x3, x5, x13 # perform operation + 800009b0: 3ed281b3 aes64dsm x3,x5,x13 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64dsm_cg_cp_rs2_b13, Zknd_aes64dsm_cg_cp_rs2_b13_str) + 800009b4: 000e3383 ld x7,0(x28) + 800009b8: 00338c63 beq x7,x3,800009d0 + 800009bc: 75c0a46f jal x8,8000b118 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 80013dfe .word 0x80013dfe + 800009cc: 00000000 .word 0x00000000 + 800009d0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs1: x19 = 0x29d0bd1338c48ccc + 800009d4: 00083983 ld x19,0(x16) + 800009d8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xd29fcfa304b6b4dd + 800009dc: 00083703 ld x14,0(x16) + 800009e0: 00880813 addi x16,x16,8 + +00000000800009e4 : +Zknd_aes64dsm_cg_cp_rs2_b14: + aes64dsm x10, x19, x14 # perform operation + 800009e4: 3ee98533 aes64dsm x10,x19,x14 + # Check if x10 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x10, Zknd_aes64dsm_cg_cp_rs2_b14, Zknd_aes64dsm_cg_cp_rs2_b14_str) + 800009e8: 000e3383 ld x7,0(x28) + 800009ec: 00a38c63 beq x7,x10,80000a04 + 800009f0: 7280a46f jal x8,8000b118 + 800009f4: 800009e4 .word 0x800009e4 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 80013e35 .word 0x80013e35 + 80000a00: 00000000 .word 0x00000000 + 80000a04: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xbed6de2e93df9029 + 80000a08: 00083c83 ld x25,0(x16) + 80000a0c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0xb45328407587ea02 + 80000a10: 00083783 ld x15,0(x16) + 80000a14: 00880813 addi x16,x16,8 + +0000000080000a18 : +Zknd_aes64dsm_cg_cp_rs2_b15: + aes64dsm x3, x25, x15 # perform operation + 80000a18: 3efc81b3 aes64dsm x3,x25,x15 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64dsm_cg_cp_rs2_b15, Zknd_aes64dsm_cg_cp_rs2_b15_str) + 80000a1c: 000e3383 ld x7,0(x28) + 80000a20: 00338c63 beq x7,x3,80000a38 + 80000a24: 6f40a46f jal x8,8000b118 + 80000a28: 80000a18 .word 0x80000a18 + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 80013e6c .word 0x80013e6c + 80000a34: 00000000 .word 0x00000000 + 80000a38: 008e0e13 addi x28,x28,8 + + mv x23, x16 # switch data pointer register to avoid conflict with test + 80000a3c: 00080b93 addi x23,x16,0 +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x60611bdde96adecb + 80000a40: 000bb903 ld x18,0(x23) + 80000a44: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x7478e64d1e75657a + 80000a48: 000bb803 ld x16,0(x23) + 80000a4c: 008b8b93 addi x23,x23,8 + +0000000080000a50 : +Zknd_aes64dsm_cg_cp_rs2_b16: + aes64dsm x2, x18, x16 # perform operation + 80000a50: 3f090133 aes64dsm x2,x18,x16 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zknd_aes64dsm_cg_cp_rs2_b16, Zknd_aes64dsm_cg_cp_rs2_b16_str) + 80000a54: 000e3383 ld x7,0(x28) + 80000a58: 00238c63 beq x7,x2,80000a70 + 80000a5c: 6bc0a46f jal x8,8000b118 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 80013ea3 .word 0x80013ea3 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x878429f86cb47160 + 80000a74: 000bb003 ld x0,0(x23) + 80000a78: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xa791f667d81e738b + 80000a7c: 000bb883 ld x17,0(x23) + 80000a80: 008b8b93 addi x23,x23,8 + +0000000080000a84 : +Zknd_aes64dsm_cg_cp_rs2_b17: + aes64dsm x4, x0, x17 # perform operation + 80000a84: 3f100233 aes64dsm x4,x0,x17 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zknd_aes64dsm_cg_cp_rs2_b17, Zknd_aes64dsm_cg_cp_rs2_b17_str) + 80000a88: 000e3383 ld x7,0(x28) + 80000a8c: 00438c63 beq x7,x4,80000aa4 + 80000a90: 6880a46f jal x8,8000b118 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 80013eda .word 0x80013eda + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x4180a5b1ce553253 + 80000aa8: 000bb683 ld x13,0(x23) + 80000aac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xe706739004f421ee + 80000ab0: 000bb903 ld x18,0(x23) + 80000ab4: 008b8b93 addi x23,x23,8 + +0000000080000ab8 : +Zknd_aes64dsm_cg_cp_rs2_b18: + aes64dsm x17, x13, x18 # perform operation + 80000ab8: 3f2688b3 aes64dsm x17,x13,x18 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zknd_aes64dsm_cg_cp_rs2_b18, Zknd_aes64dsm_cg_cp_rs2_b18_str) + 80000abc: 000e3383 ld x7,0(x28) + 80000ac0: 01138c63 beq x7,x17,80000ad8 + 80000ac4: 6540a46f jal x8,8000b118 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 80013f11 .word 0x80013f11 + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xf9a76c6674a0aecd + 80000adc: 000bb183 ld x3,0(x23) + 80000ae0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x5154720ecc426424 + 80000ae4: 000bb983 ld x19,0(x23) + 80000ae8: 008b8b93 addi x23,x23,8 + +0000000080000aec : +Zknd_aes64dsm_cg_cp_rs2_b19: + aes64dsm x17, x3, x19 # perform operation + 80000aec: 3f3188b3 aes64dsm x17,x3,x19 + # Check if x17 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x17, Zknd_aes64dsm_cg_cp_rs2_b19, Zknd_aes64dsm_cg_cp_rs2_b19_str) + 80000af0: 000e3383 ld x7,0(x28) + 80000af4: 01138c63 beq x7,x17,80000b0c + 80000af8: 6200a46f jal x8,8000b118 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 80013f48 .word 0x80013f48 + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x078afe7948ab5114 + 80000b10: 000bbc03 ld x24,0(x23) + 80000b14: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x16291af001e4ea0d + 80000b18: 000bba03 ld x20,0(x23) + 80000b1c: 008b8b93 addi x23,x23,8 + +0000000080000b20 : +Zknd_aes64dsm_cg_cp_rs2_b20: + aes64dsm x4, x24, x20 # perform operation + 80000b20: 3f4c0233 aes64dsm x4,x24,x20 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zknd_aes64dsm_cg_cp_rs2_b20, Zknd_aes64dsm_cg_cp_rs2_b20_str) + 80000b24: 000e3383 ld x7,0(x28) + 80000b28: 00438c63 beq x7,x4,80000b40 + 80000b2c: 5ec0a46f jal x8,8000b118 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 80013f7f .word 0x80013f7f + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x0da1f20256c56392 + 80000b44: 000bbd83 ld x27,0(x23) + 80000b48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xda7ff1ab19f3bafd + 80000b4c: 000bba83 ld x21,0(x23) + 80000b50: 008b8b93 addi x23,x23,8 + +0000000080000b54 : +Zknd_aes64dsm_cg_cp_rs2_b21: + aes64dsm x9, x27, x21 # perform operation + 80000b54: 3f5d84b3 aes64dsm x9,x27,x21 + # Check if x9 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x9, Zknd_aes64dsm_cg_cp_rs2_b21, Zknd_aes64dsm_cg_cp_rs2_b21_str) + 80000b58: 000e3383 ld x7,0(x28) + 80000b5c: 00938c63 beq x7,x9,80000b74 + 80000b60: 5b80a46f jal x8,8000b118 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 80013fb6 .word 0x80013fb6 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xe96df22c466fd2be + 80000b78: 000bb183 ld x3,0(x23) + 80000b7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0xb4e60f4c9692321d + 80000b80: 000bbb03 ld x22,0(x23) + 80000b84: 008b8b93 addi x23,x23,8 + +0000000080000b88 : +Zknd_aes64dsm_cg_cp_rs2_b22: + aes64dsm x30, x3, x22 # perform operation + 80000b88: 3f618f33 aes64dsm x30,x3,x22 + # Check if x30 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x30, Zknd_aes64dsm_cg_cp_rs2_b22, Zknd_aes64dsm_cg_cp_rs2_b22_str) + 80000b8c: 000e3383 ld x7,0(x28) + 80000b90: 01e38c63 beq x7,x30,80000ba8 + 80000b94: 5840a46f jal x8,8000b118 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 80013fed .word 0x80013fed + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008e0e13 addi x28,x28,8 + + mv x15, x23 # switch data pointer register to avoid conflict with test + 80000bac: 000b8793 addi x15,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0xd8b1daad508b9bc7 + 80000bb0: 0007b003 ld x0,0(x15) + 80000bb4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x1c4e5b0dfd6b4399 + 80000bb8: 0007bb83 ld x23,0(x15) + 80000bbc: 00878793 addi x15,x15,8 + +0000000080000bc0 : +Zknd_aes64dsm_cg_cp_rs2_b23: + aes64dsm x2, x0, x23 # perform operation + 80000bc0: 3f700133 aes64dsm x2,x0,x23 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zknd_aes64dsm_cg_cp_rs2_b23, Zknd_aes64dsm_cg_cp_rs2_b23_str) + 80000bc4: 000e3383 ld x7,0(x28) + 80000bc8: 00238c63 beq x7,x2,80000be0 + 80000bcc: 54c0a46f jal x8,8000b118 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 80014024 .word 0x80014024 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x424fca1c49174394 + 80000be4: 0007be83 ld x29,0(x15) + 80000be8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xecf8f0d8e2584c3b + 80000bec: 0007bc03 ld x24,0(x15) + 80000bf0: 00878793 addi x15,x15,8 + +0000000080000bf4 : +Zknd_aes64dsm_cg_cp_rs2_b24: + aes64dsm x14, x29, x24 # perform operation + 80000bf4: 3f8e8733 aes64dsm x14,x29,x24 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zknd_aes64dsm_cg_cp_rs2_b24, Zknd_aes64dsm_cg_cp_rs2_b24_str) + 80000bf8: 000e3383 ld x7,0(x28) + 80000bfc: 00e38c63 beq x7,x14,80000c14 + 80000c00: 5180a46f jal x8,8000b118 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8001405b .word 0x8001405b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xba0aa08fb7c59a77 + 80000c18: 0007bc03 ld x24,0(x15) + 80000c1c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x64e386c16450b4f3 + 80000c20: 0007bc83 ld x25,0(x15) + 80000c24: 00878793 addi x15,x15,8 + +0000000080000c28 : +Zknd_aes64dsm_cg_cp_rs2_b25: + aes64dsm x30, x24, x25 # perform operation + 80000c28: 3f9c0f33 aes64dsm x30,x24,x25 + # Check if x30 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x30, Zknd_aes64dsm_cg_cp_rs2_b25, Zknd_aes64dsm_cg_cp_rs2_b25_str) + 80000c2c: 000e3383 ld x7,0(x28) + 80000c30: 01e38c63 beq x7,x30,80000c48 + 80000c34: 4e40a46f jal x8,8000b118 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 80014092 .word 0x80014092 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xa1eefa96ea7370e2 + 80000c4c: 0007bc83 ld x25,0(x15) + 80000c50: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xf1cee8df22048620 + 80000c54: 0007bd03 ld x26,0(x15) + 80000c58: 00878793 addi x15,x15,8 + +0000000080000c5c : +Zknd_aes64dsm_cg_cp_rs2_b26: + aes64dsm x6, x25, x26 # perform operation + 80000c5c: 3fac8333 aes64dsm x6,x25,x26 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs2_b26, Zknd_aes64dsm_cg_cp_rs2_b26_str) + 80000c60: 000e3383 ld x7,0(x28) + 80000c64: 00638c63 beq x7,x6,80000c7c + 80000c68: 4b00a46f jal x8,8000b118 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 800140c9 .word 0x800140c9 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xba1c8dc9963db76b + 80000c80: 0007b703 ld x14,0(x15) + 80000c84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x37a548df2ec6fd55 + 80000c88: 0007bd83 ld x27,0(x15) + 80000c8c: 00878793 addi x15,x15,8 + +0000000080000c90 : +Zknd_aes64dsm_cg_cp_rs2_b27: + aes64dsm x19, x14, x27 # perform operation + 80000c90: 3fb709b3 aes64dsm x19,x14,x27 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zknd_aes64dsm_cg_cp_rs2_b27, Zknd_aes64dsm_cg_cp_rs2_b27_str) + 80000c94: 000e3383 ld x7,0(x28) + 80000c98: 01338c63 beq x7,x19,80000cb0 + 80000c9c: 47c0a46f jal x8,8000b118 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 80014100 .word 0x80014100 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 008e0e13 addi x28,x28,8 + + mv x21, x28 # switch signature pointer register to avoid conflict with test + 80000cb4: 000e0a93 addi x21,x28,0 +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xe54c396a9756943e + 80000cb8: 0007b683 ld x13,0(x15) + 80000cbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xcccb583c57659fae + 80000cc0: 0007be03 ld x28,0(x15) + 80000cc4: 00878793 addi x15,x15,8 + +0000000080000cc8 : +Zknd_aes64dsm_cg_cp_rs2_b28: + aes64dsm x20, x13, x28 # perform operation + 80000cc8: 3fc68a33 aes64dsm x20,x13,x28 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zknd_aes64dsm_cg_cp_rs2_b28, Zknd_aes64dsm_cg_cp_rs2_b28_str) + 80000ccc: 000ab383 ld x7,0(x21) + 80000cd0: 01438c63 beq x7,x20,80000ce8 + 80000cd4: 4440a46f jal x8,8000b118 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 80014137 .word 0x80014137 + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xf37002ecb8990bd3 + 80000cec: 0007b203 ld x4,0(x15) + 80000cf0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xc9c5d808f6e5b3e0 + 80000cf4: 0007be83 ld x29,0(x15) + 80000cf8: 00878793 addi x15,x15,8 + +0000000080000cfc : +Zknd_aes64dsm_cg_cp_rs2_b29: + aes64dsm x26, x4, x29 # perform operation + 80000cfc: 3fd20d33 aes64dsm x26,x4,x29 + # Check if x26 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x26, Zknd_aes64dsm_cg_cp_rs2_b29, Zknd_aes64dsm_cg_cp_rs2_b29_str) + 80000d00: 000ab383 ld x7,0(x21) + 80000d04: 01a38c63 beq x7,x26,80000d1c + 80000d08: 4100a46f jal x8,8000b118 + 80000d0c: 80000cfc .word 0x80000cfc + 80000d10: 00000000 .word 0x00000000 + 80000d14: 8001416e .word 0x8001416e + 80000d18: 00000000 .word 0x00000000 + 80000d1c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x15eef44914c4a372 + 80000d20: 0007b003 ld x0,0(x15) + 80000d24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x9ce8a6ad0cbc175e + 80000d28: 0007bf03 ld x30,0(x15) + 80000d2c: 00878793 addi x15,x15,8 + +0000000080000d30 : +Zknd_aes64dsm_cg_cp_rs2_b30: + aes64dsm x31, x0, x30 # perform operation + 80000d30: 3fe00fb3 aes64dsm x31,x0,x30 + # Check if x31 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x31, Zknd_aes64dsm_cg_cp_rs2_b30, Zknd_aes64dsm_cg_cp_rs2_b30_str) + 80000d34: 000ab383 ld x7,0(x21) + 80000d38: 01f38c63 beq x7,x31,80000d50 + 80000d3c: 3dc0a46f jal x8,8000b118 + 80000d40: 80000d30 .word 0x80000d30 + 80000d44: 00000000 .word 0x00000000 + 80000d48: 800141a5 .word 0x800141a5 + 80000d4c: 00000000 .word 0x00000000 + 80000d50: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xf724e547116a8eaf + 80000d54: 0007b803 ld x16,0(x15) + 80000d58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x375e522c95395215 + 80000d5c: 0007bf83 ld x31,0(x15) + 80000d60: 00878793 addi x15,x15,8 + +0000000080000d64 : +Zknd_aes64dsm_cg_cp_rs2_b31: + aes64dsm x13, x16, x31 # perform operation + 80000d64: 3ff806b3 aes64dsm x13,x16,x31 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknd_aes64dsm_cg_cp_rs2_b31, Zknd_aes64dsm_cg_cp_rs2_b31_str) + 80000d68: 000ab383 ld x7,0(x21) + 80000d6c: 00d38c63 beq x7,x13,80000d84 + 80000d70: 3a80a46f jal x8,8000b118 + 80000d74: 80000d64 .word 0x80000d64 + 80000d78: 00000000 .word 0x00000000 + 80000d7c: 800141dc .word 0x800141dc + 80000d80: 00000000 .word 0x00000000 + 80000d84: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x7a08ba848d901ee2 + 80000d88: 0007b603 ld x12,0(x15) + 80000d8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x40f949764bf9101e + 80000d90: 0007bc83 ld x25,0(x15) + 80000d94: 00878793 addi x15,x15,8 + +0000000080000d98 : +Zknd_aes64dsm_cg_cp_rd_b0: + aes64dsm x0, x12, x25 # perform operation + 80000d98: 3f960033 aes64dsm x0,x12,x25 + # Check if x0 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x0, Zknd_aes64dsm_cg_cp_rd_b0, Zknd_aes64dsm_cg_cp_rd_b0_str) + 80000d9c: 000ab383 ld x7,0(x21) + 80000da0: 00038c63 beq x7,x0,80000db8 + 80000da4: 3740a46f jal x8,8000b118 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 80014213 .word 0x80014213 + 80000db4: 00000000 .word 0x00000000 + 80000db8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xc65218d0fd71140f + 80000dbc: 0007b883 ld x17,0(x15) + 80000dc0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xd8767570e0139127 + 80000dc4: 0007bf03 ld x30,0(x15) + 80000dc8: 00878793 addi x15,x15,8 + +0000000080000dcc : +Zknd_aes64dsm_cg_cp_rd_b1: + aes64dsm x1, x17, x30 # perform operation + 80000dcc: 3fe880b3 aes64dsm x1,x17,x30 + # Check if x1 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x1, Zknd_aes64dsm_cg_cp_rd_b1, Zknd_aes64dsm_cg_cp_rd_b1_str) + 80000dd0: 000ab383 ld x7,0(x21) + 80000dd4: 00138c63 beq x7,x1,80000dec + 80000dd8: 3400a46f jal x8,8000b118 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 80014248 .word 0x80014248 + 80000de8: 00000000 .word 0x00000000 + 80000dec: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x413971296b918c33 + 80000df0: 0007b903 ld x18,0(x15) + 80000df4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x820de65e52f32926 + 80000df8: 0007b203 ld x4,0(x15) + 80000dfc: 00878793 addi x15,x15,8 + +0000000080000e00 : +Zknd_aes64dsm_cg_cp_rd_b2: + aes64dsm x2, x18, x4 # perform operation + 80000e00: 3e490133 aes64dsm x2,x18,x4 + # Check if x2 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x2, Zknd_aes64dsm_cg_cp_rd_b2, Zknd_aes64dsm_cg_cp_rd_b2_str) + 80000e04: 000ab383 ld x7,0(x21) + 80000e08: 00238c63 beq x7,x2,80000e20 + 80000e0c: 30c0a46f jal x8,8000b118 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 8001427d .word 0x8001427d + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xa2b8b35a9504f2a3 + 80000e24: 0007bc03 ld x24,0(x15) + 80000e28: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x8a7afa34b83eb072 + 80000e2c: 0007bf03 ld x30,0(x15) + 80000e30: 00878793 addi x15,x15,8 + +0000000080000e34 : +Zknd_aes64dsm_cg_cp_rd_b3: + aes64dsm x3, x24, x30 # perform operation + 80000e34: 3fec01b3 aes64dsm x3,x24,x30 + # Check if x3 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x3, Zknd_aes64dsm_cg_cp_rd_b3, Zknd_aes64dsm_cg_cp_rd_b3_str) + 80000e38: 000ab383 ld x7,0(x21) + 80000e3c: 00338c63 beq x7,x3,80000e54 + 80000e40: 2d80a46f jal x8,8000b118 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 800142b2 .word 0x800142b2 + 80000e50: 00000000 .word 0x00000000 + 80000e54: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0xd9657624e1f6c2f6 + 80000e58: 0007b003 ld x0,0(x15) + 80000e5c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x9234e0501d9d7a16 + 80000e60: 0007b903 ld x18,0(x15) + 80000e64: 00878793 addi x15,x15,8 + +0000000080000e68 : +Zknd_aes64dsm_cg_cp_rd_b4: + aes64dsm x4, x0, x18 # perform operation + 80000e68: 3f200233 aes64dsm x4,x0,x18 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknd_aes64dsm_cg_cp_rd_b4, Zknd_aes64dsm_cg_cp_rd_b4_str) + 80000e6c: 000ab383 ld x7,0(x21) + 80000e70: 00438c63 beq x7,x4,80000e88 + 80000e74: 2a40a46f jal x8,8000b118 + 80000e78: 80000e68 .word 0x80000e68 + 80000e7c: 00000000 .word 0x00000000 + 80000e80: 800142e7 .word 0x800142e7 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x6154ad086ad511ce + 80000e8c: 0007b203 ld x4,0(x15) + 80000e90: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0xd9f1bbe383712dca + 80000e94: 0007b003 ld x0,0(x15) + 80000e98: 00878793 addi x15,x15,8 + +0000000080000e9c : +Zknd_aes64dsm_cg_cp_rd_b5: + aes64dsm x5, x4, x0 # perform operation + 80000e9c: 3e0202b3 aes64dsm x5,x4,x0 + # Check if x5 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x5, Zknd_aes64dsm_cg_cp_rd_b5, Zknd_aes64dsm_cg_cp_rd_b5_str) + 80000ea0: 000ab383 ld x7,0(x21) + 80000ea4: 00538c63 beq x7,x5,80000ebc + 80000ea8: 2700a46f jal x8,8000b118 + 80000eac: 80000e9c .word 0x80000e9c + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 8001431c .word 0x8001431c + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xb96fe6397a3bb041 + 80000ec0: 0007b503 ld x10,0(x15) + 80000ec4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xef5676213ac1d101 + 80000ec8: 0007ba03 ld x20,0(x15) + 80000ecc: 00878793 addi x15,x15,8 + +0000000080000ed0 : +Zknd_aes64dsm_cg_cp_rd_b6: + aes64dsm x6, x10, x20 # perform operation + 80000ed0: 3f450333 aes64dsm x6,x10,x20 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zknd_aes64dsm_cg_cp_rd_b6, Zknd_aes64dsm_cg_cp_rd_b6_str) + 80000ed4: 000ab383 ld x7,0(x21) + 80000ed8: 00638c63 beq x7,x6,80000ef0 + 80000edc: 23c0a46f jal x8,8000b118 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80014351 .word 0x80014351 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 008a8a93 addi x21,x21,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ef4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000ef8: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xc4c55c130164b87d + 80000efc: 0007b903 ld x18,0(x15) + 80000f00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xf2deb13374bbb093 + 80000f04: 0007be83 ld x29,0(x15) + 80000f08: 00878793 addi x15,x15,8 + +0000000080000f0c : +Zknd_aes64dsm_cg_cp_rd_b7: + aes64dsm x7, x18, x29 # perform operation + 80000f0c: 3fd903b3 aes64dsm x7,x18,x29 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zknd_aes64dsm_cg_cp_rd_b7, Zknd_aes64dsm_cg_cp_rd_b7_str) + 80000f10: 000ab683 ld x13,0(x21) + 80000f14: 00768c63 beq x13,x7,80000f2c + 80000f18: 2280a76f jal x14,8000b140 + 80000f1c: 80000f0c .word 0x80000f0c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 80014386 .word 0x80014386 + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x059d75590f1af7f4 + 80000f30: 0007b803 ld x16,0(x15) + 80000f34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x128e517acd855c4a + 80000f38: 0007b983 ld x19,0(x15) + 80000f3c: 00878793 addi x15,x15,8 + +0000000080000f40 : +Zknd_aes64dsm_cg_cp_rd_b8: + aes64dsm x8, x16, x19 # perform operation + 80000f40: 3f380433 aes64dsm x8,x16,x19 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zknd_aes64dsm_cg_cp_rd_b8, Zknd_aes64dsm_cg_cp_rd_b8_str) + 80000f44: 000ab683 ld x13,0(x21) + 80000f48: 00868c63 beq x13,x8,80000f60 + 80000f4c: 1f40a76f jal x14,8000b140 + 80000f50: 80000f40 .word 0x80000f40 + 80000f54: 00000000 .word 0x00000000 + 80000f58: 800143bb .word 0x800143bb + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x2c69cea31da96b76 + 80000f64: 0007b583 ld x11,0(x15) + 80000f68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x225f15f85104cc2f + 80000f6c: 0007b383 ld x7,0(x15) + 80000f70: 00878793 addi x15,x15,8 + +0000000080000f74 : +Zknd_aes64dsm_cg_cp_rd_b9: + aes64dsm x9, x11, x7 # perform operation + 80000f74: 3e7584b3 aes64dsm x9,x11,x7 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zknd_aes64dsm_cg_cp_rd_b9, Zknd_aes64dsm_cg_cp_rd_b9_str) + 80000f78: 000ab683 ld x13,0(x21) + 80000f7c: 00968c63 beq x13,x9,80000f94 + 80000f80: 1c00a76f jal x14,8000b140 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 800143f0 .word 0x800143f0 + 80000f90: 00000000 .word 0x00000000 + 80000f94: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x1a117a6ebbac32f0 + 80000f98: 0007bf83 ld x31,0(x15) + 80000f9c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x05cfa0957b0712b5 + 80000fa0: 0007b083 ld x1,0(x15) + 80000fa4: 00878793 addi x15,x15,8 + +0000000080000fa8 : +Zknd_aes64dsm_cg_cp_rd_b10: + aes64dsm x10, x31, x1 # perform operation + 80000fa8: 3e1f8533 aes64dsm x10,x31,x1 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zknd_aes64dsm_cg_cp_rd_b10, Zknd_aes64dsm_cg_cp_rd_b10_str) + 80000fac: 000ab683 ld x13,0(x21) + 80000fb0: 00a68c63 beq x13,x10,80000fc8 + 80000fb4: 18c0a76f jal x14,8000b140 + 80000fb8: 80000fa8 .word 0x80000fa8 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 80014425 .word 0x80014425 + 80000fc4: 00000000 .word 0x00000000 + 80000fc8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x8f8df75f3497b24a + 80000fcc: 0007b483 ld x9,0(x15) + 80000fd0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x95855663627ab547 + 80000fd4: 0007b803 ld x16,0(x15) + 80000fd8: 00878793 addi x15,x15,8 + +0000000080000fdc : +Zknd_aes64dsm_cg_cp_rd_b11: + aes64dsm x11, x9, x16 # perform operation + 80000fdc: 3f0485b3 aes64dsm x11,x9,x16 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zknd_aes64dsm_cg_cp_rd_b11, Zknd_aes64dsm_cg_cp_rd_b11_str) + 80000fe0: 000ab683 ld x13,0(x21) + 80000fe4: 00b68c63 beq x13,x11,80000ffc + 80000fe8: 1580a76f jal x14,8000b140 + 80000fec: 80000fdc .word 0x80000fdc + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 8001445b .word 0x8001445b + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x8f0f372c50ab0e28 + 80001000: 0007bf83 ld x31,0(x15) + 80001004: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xb2ff08304fd4303a + 80001008: 0007be83 ld x29,0(x15) + 8000100c: 00878793 addi x15,x15,8 + +0000000080001010 : +Zknd_aes64dsm_cg_cp_rd_b12: + aes64dsm x12, x31, x29 # perform operation + 80001010: 3fdf8633 aes64dsm x12,x31,x29 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknd_aes64dsm_cg_cp_rd_b12, Zknd_aes64dsm_cg_cp_rd_b12_str) + 80001014: 000ab683 ld x13,0(x21) + 80001018: 00c68c63 beq x13,x12,80001030 + 8000101c: 1240a76f jal x14,8000b140 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80014491 .word 0x80014491 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001034: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001038: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x7eca435f6b33b4d5 + 8000103c: 0007b583 ld x11,0(x15) + 80001040: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x66b4153dd2e16f6c + 80001044: 0007b083 ld x1,0(x15) + 80001048: 00878793 addi x15,x15,8 + +000000008000104c : +Zknd_aes64dsm_cg_cp_rd_b13: + aes64dsm x13, x11, x1 # perform operation + 8000104c: 3e1586b3 aes64dsm x13,x11,x1 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknd_aes64dsm_cg_cp_rd_b13, Zknd_aes64dsm_cg_cp_rd_b13_str) + 80001050: 000ab383 ld x7,0(x21) + 80001054: 00d38c63 beq x7,x13,8000106c + 80001058: 0c00a46f jal x8,8000b118 + 8000105c: 8000104c .word 0x8000104c + 80001060: 00000000 .word 0x00000000 + 80001064: 800144c7 .word 0x800144c7 + 80001068: 00000000 .word 0x00000000 + 8000106c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x36d5be234a5f97af + 80001070: 0007bc03 ld x24,0(x15) + 80001074: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x59d3846e2b6559b0 + 80001078: 0007b503 ld x10,0(x15) + 8000107c: 00878793 addi x15,x15,8 + +0000000080001080 : +Zknd_aes64dsm_cg_cp_rd_b14: + aes64dsm x14, x24, x10 # perform operation + 80001080: 3eac0733 aes64dsm x14,x24,x10 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zknd_aes64dsm_cg_cp_rd_b14, Zknd_aes64dsm_cg_cp_rd_b14_str) + 80001084: 000ab383 ld x7,0(x21) + 80001088: 00e38c63 beq x7,x14,800010a0 + 8000108c: 08c0a46f jal x8,8000b118 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 800144fd .word 0x800144fd + 8000109c: 00000000 .word 0x00000000 + 800010a0: 008a8a93 addi x21,x21,8 + + mv x30, x15 # switch data pointer register to avoid conflict with test + 800010a4: 00078f13 addi x30,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x247e8a9da168d87a + 800010a8: 000f3d03 ld x26,0(x30) + 800010ac: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x87274485b2ee153e + 800010b0: 000f3c83 ld x25,0(x30) + 800010b4: 008f0f13 addi x30,x30,8 + +00000000800010b8 : +Zknd_aes64dsm_cg_cp_rd_b15: + aes64dsm x15, x26, x25 # perform operation + 800010b8: 3f9d07b3 aes64dsm x15,x26,x25 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zknd_aes64dsm_cg_cp_rd_b15, Zknd_aes64dsm_cg_cp_rd_b15_str) + 800010bc: 000ab383 ld x7,0(x21) + 800010c0: 00f38c63 beq x7,x15,800010d8 + 800010c4: 0540a46f jal x8,8000b118 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 80014533 .word 0x80014533 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x63e18f783424a718 + 800010dc: 000f3d83 ld x27,0(x30) + 800010e0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs2: x9 = 0x61b99660a9a50978 + 800010e4: 000f3483 ld x9,0(x30) + 800010e8: 008f0f13 addi x30,x30,8 + +00000000800010ec : +Zknd_aes64dsm_cg_cp_rd_b16: + aes64dsm x16, x27, x9 # perform operation + 800010ec: 3e9d8833 aes64dsm x16,x27,x9 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zknd_aes64dsm_cg_cp_rd_b16, Zknd_aes64dsm_cg_cp_rd_b16_str) + 800010f0: 000ab383 ld x7,0(x21) + 800010f4: 01038c63 beq x7,x16,8000110c + 800010f8: 0200a46f jal x8,8000b118 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 80014569 .word 0x80014569 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0x367fd30c72f63cb6 + 80001110: 000f3e03 ld x28,0(x30) + 80001114: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs2: x3 = 0x4c335d7990ac4559 + 80001118: 000f3183 ld x3,0(x30) + 8000111c: 008f0f13 addi x30,x30,8 + +0000000080001120 : +Zknd_aes64dsm_cg_cp_rd_b17: + aes64dsm x17, x28, x3 # perform operation + 80001120: 3e3e08b3 aes64dsm x17,x28,x3 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zknd_aes64dsm_cg_cp_rd_b17, Zknd_aes64dsm_cg_cp_rd_b17_str) + 80001124: 000ab383 ld x7,0(x21) + 80001128: 01138c63 beq x7,x17,80001140 + 8000112c: 7ed0946f jal x8,8000b118 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8001459f .word 0x8001459f + 8000113c: 00000000 .word 0x00000000 + 80001140: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x7666721d0fdcd407 + 80001144: 000f3083 ld x1,0(x30) + 80001148: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xcb06184c06628ddb + 8000114c: 000f3583 ld x11,0(x30) + 80001150: 008f0f13 addi x30,x30,8 + +0000000080001154 : +Zknd_aes64dsm_cg_cp_rd_b18: + aes64dsm x18, x1, x11 # perform operation + 80001154: 3eb08933 aes64dsm x18,x1,x11 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zknd_aes64dsm_cg_cp_rd_b18, Zknd_aes64dsm_cg_cp_rd_b18_str) + 80001158: 000ab383 ld x7,0(x21) + 8000115c: 01238c63 beq x7,x18,80001174 + 80001160: 7b90946f jal x8,8000b118 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 800145d5 .word 0x800145d5 + 80001170: 00000000 .word 0x00000000 + 80001174: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0xfbc702586b16e547 + 80001178: 000f3303 ld x6,0(x30) + 8000117c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x639f3514af6b193c + 80001180: 000f3c83 ld x25,0(x30) + 80001184: 008f0f13 addi x30,x30,8 + +0000000080001188 : +Zknd_aes64dsm_cg_cp_rd_b19: + aes64dsm x19, x6, x25 # perform operation + 80001188: 3f9309b3 aes64dsm x19,x6,x25 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zknd_aes64dsm_cg_cp_rd_b19, Zknd_aes64dsm_cg_cp_rd_b19_str) + 8000118c: 000ab383 ld x7,0(x21) + 80001190: 01338c63 beq x7,x19,800011a8 + 80001194: 7850946f jal x8,8000b118 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8001460b .word 0x8001460b + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0xabc6698fa2de4d14 + 800011ac: 000f3483 ld x9,0(x30) + 800011b0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs2: x6 = 0xf26894d3cbf15660 + 800011b4: 000f3303 ld x6,0(x30) + 800011b8: 008f0f13 addi x30,x30,8 + +00000000800011bc : +Zknd_aes64dsm_cg_cp_rd_b20: + aes64dsm x20, x9, x6 # perform operation + 800011bc: 3e648a33 aes64dsm x20,x9,x6 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zknd_aes64dsm_cg_cp_rd_b20, Zknd_aes64dsm_cg_cp_rd_b20_str) + 800011c0: 000ab383 ld x7,0(x21) + 800011c4: 01438c63 beq x7,x20,800011dc + 800011c8: 7510946f jal x8,8000b118 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 80014641 .word 0x80014641 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 008a8a93 addi x21,x21,8 + + mv x12, x21 # switch signature pointer register to avoid conflict with test + 800011e0: 000a8613 addi x12,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs1: x31 = 0x6ee908d98ab5d63b + 800011e4: 000f3f83 ld x31,0(x30) + 800011e8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x3982deae24a4b51d + 800011ec: 000f3e03 ld x28,0(x30) + 800011f0: 008f0f13 addi x30,x30,8 + +00000000800011f4 : +Zknd_aes64dsm_cg_cp_rd_b21: + aes64dsm x21, x31, x28 # perform operation + 800011f4: 3fcf8ab3 aes64dsm x21,x31,x28 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cp_rd_b21, Zknd_aes64dsm_cg_cp_rd_b21_str) + 800011f8: 00063383 ld x7,0(x12) + 800011fc: 01538c63 beq x7,x21,80001214 + 80001200: 7190946f jal x8,8000b118 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 80014677 .word 0x80014677 + 80001210: 00000000 .word 0x00000000 + 80001214: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xe770b165c0de051d + 80001218: 000f3e83 ld x29,0(x30) + 8000121c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x742fb47cb5972109 + 80001220: 000f3803 ld x16,0(x30) + 80001224: 008f0f13 addi x30,x30,8 + +0000000080001228 : +Zknd_aes64dsm_cg_cp_rd_b22: + aes64dsm x22, x29, x16 # perform operation + 80001228: 3f0e8b33 aes64dsm x22,x29,x16 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cp_rd_b22, Zknd_aes64dsm_cg_cp_rd_b22_str) + 8000122c: 00063383 ld x7,0(x12) + 80001230: 01638c63 beq x7,x22,80001248 + 80001234: 6e50946f jal x8,8000b118 + 80001238: 80001228 .word 0x80001228 + 8000123c: 00000000 .word 0x00000000 + 80001240: 800146ad .word 0x800146ad + 80001244: 00000000 .word 0x00000000 + 80001248: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x88153d09548d64cf + 8000124c: 000f3483 ld x9,0(x30) + 80001250: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0x5e5cb894190c5965 + 80001254: 000f3e83 ld x29,0(x30) + 80001258: 008f0f13 addi x30,x30,8 + +000000008000125c : +Zknd_aes64dsm_cg_cp_rd_b23: + aes64dsm x23, x9, x29 # perform operation + 8000125c: 3fd48bb3 aes64dsm x23,x9,x29 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cp_rd_b23, Zknd_aes64dsm_cg_cp_rd_b23_str) + 80001260: 00063383 ld x7,0(x12) + 80001264: 01738c63 beq x7,x23,8000127c + 80001268: 6b10946f jal x8,8000b118 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 800146e3 .word 0x800146e3 + 80001278: 00000000 .word 0x00000000 + 8000127c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x13f6158d8e846eb8 + 80001280: 000f3483 ld x9,0(x30) + 80001284: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0x660e5d7f897ab94c + 80001288: 000f3683 ld x13,0(x30) + 8000128c: 008f0f13 addi x30,x30,8 + +0000000080001290 : +Zknd_aes64dsm_cg_cp_rd_b24: + aes64dsm x24, x9, x13 # perform operation + 80001290: 3ed48c33 aes64dsm x24,x9,x13 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zknd_aes64dsm_cg_cp_rd_b24, Zknd_aes64dsm_cg_cp_rd_b24_str) + 80001294: 00063383 ld x7,0(x12) + 80001298: 01838c63 beq x7,x24,800012b0 + 8000129c: 67d0946f jal x8,8000b118 + 800012a0: 80001290 .word 0x80001290 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 80014719 .word 0x80014719 + 800012ac: 00000000 .word 0x00000000 + 800012b0: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xcdaed5861ddcca84 + 800012b4: 000f3e83 ld x29,0(x30) + 800012b8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0xc7e8e2b8b5861791 + 800012bc: 000f3703 ld x14,0(x30) + 800012c0: 008f0f13 addi x30,x30,8 + +00000000800012c4 : +Zknd_aes64dsm_cg_cp_rd_b25: + aes64dsm x25, x29, x14 # perform operation + 800012c4: 3eee8cb3 aes64dsm x25,x29,x14 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cp_rd_b25, Zknd_aes64dsm_cg_cp_rd_b25_str) + 800012c8: 00063383 ld x7,0(x12) + 800012cc: 01938c63 beq x7,x25,800012e4 + 800012d0: 6490946f jal x8,8000b118 + 800012d4: 800012c4 .word 0x800012c4 + 800012d8: 00000000 .word 0x00000000 + 800012dc: 8001474f .word 0x8001474f + 800012e0: 00000000 .word 0x00000000 + 800012e4: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x8871257ff58f4e51 + 800012e8: 000f3303 ld x6,0(x30) + 800012ec: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs2: x11 = 0xde2dfe45c53fcf0f + 800012f0: 000f3583 ld x11,0(x30) + 800012f4: 008f0f13 addi x30,x30,8 + +00000000800012f8 : +Zknd_aes64dsm_cg_cp_rd_b26: + aes64dsm x26, x6, x11 # perform operation + 800012f8: 3eb30d33 aes64dsm x26,x6,x11 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cp_rd_b26, Zknd_aes64dsm_cg_cp_rd_b26_str) + 800012fc: 00063383 ld x7,0(x12) + 80001300: 01a38c63 beq x7,x26,80001318 + 80001304: 6150946f jal x8,8000b118 + 80001308: 800012f8 .word 0x800012f8 + 8000130c: 00000000 .word 0x00000000 + 80001310: 80014785 .word 0x80014785 + 80001314: 00000000 .word 0x00000000 + 80001318: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0x6c7392f42b9adcfb + 8000131c: 000f3783 ld x15,0(x30) + 80001320: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x9a59b836644bfa01 + 80001324: 000f3c03 ld x24,0(x30) + 80001328: 008f0f13 addi x30,x30,8 + +000000008000132c : +Zknd_aes64dsm_cg_cp_rd_b27: + aes64dsm x27, x15, x24 # perform operation + 8000132c: 3f878db3 aes64dsm x27,x15,x24 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cp_rd_b27, Zknd_aes64dsm_cg_cp_rd_b27_str) + 80001330: 00063383 ld x7,0(x12) + 80001334: 01b38c63 beq x7,x27,8000134c + 80001338: 5e10946f jal x8,8000b118 + 8000133c: 8000132c .word 0x8000132c + 80001340: 00000000 .word 0x00000000 + 80001344: 800147bb .word 0x800147bb + 80001348: 00000000 .word 0x00000000 + 8000134c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs1: x21 = 0xb9a47e118ae41d80 + 80001350: 000f3a83 ld x21,0(x30) + 80001354: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x9432671c68b89719 + 80001358: 000f3c03 ld x24,0(x30) + 8000135c: 008f0f13 addi x30,x30,8 + +0000000080001360 : +Zknd_aes64dsm_cg_cp_rd_b28: + aes64dsm x28, x21, x24 # perform operation + 80001360: 3f8a8e33 aes64dsm x28,x21,x24 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cp_rd_b28, Zknd_aes64dsm_cg_cp_rd_b28_str) + 80001364: 00063383 ld x7,0(x12) + 80001368: 01c38c63 beq x7,x28,80001380 + 8000136c: 5ad0946f jal x8,8000b118 + 80001370: 80001360 .word 0x80001360 + 80001374: 00000000 .word 0x00000000 + 80001378: 800147f1 .word 0x800147f1 + 8000137c: 00000000 .word 0x00000000 + 80001380: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xae38fe41a573f394 + 80001384: 000f3683 ld x13,0(x30) + 80001388: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs2: x2 = 0x654ce386ac890496 + 8000138c: 000f3103 ld x2,0(x30) + 80001390: 008f0f13 addi x30,x30,8 + +0000000080001394 : +Zknd_aes64dsm_cg_cp_rd_b29: + aes64dsm x29, x13, x2 # perform operation + 80001394: 3e268eb3 aes64dsm x29,x13,x2 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cp_rd_b29, Zknd_aes64dsm_cg_cp_rd_b29_str) + 80001398: 00063383 ld x7,0(x12) + 8000139c: 01d38c63 beq x7,x29,800013b4 + 800013a0: 5790946f jal x8,8000b118 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 80014827 .word 0x80014827 + 800013b0: 00000000 .word 0x00000000 + 800013b4: 00860613 addi x12,x12,8 + + mv x24, x30 # switch data pointer register to avoid conflict with test + 800013b8: 000f0c13 addi x24,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xa7e3cdf68b29c8fa + 800013bc: 000c3a03 ld x20,0(x24) + 800013c0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x6a4234cbda31945a + 800013c4: 000c3783 ld x15,0(x24) + 800013c8: 008c0c13 addi x24,x24,8 + +00000000800013cc : +Zknd_aes64dsm_cg_cp_rd_b30: + aes64dsm x30, x20, x15 # perform operation + 800013cc: 3efa0f33 aes64dsm x30,x20,x15 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64dsm_cg_cp_rd_b30, Zknd_aes64dsm_cg_cp_rd_b30_str) + 800013d0: 00063383 ld x7,0(x12) + 800013d4: 01e38c63 beq x7,x30,800013ec + 800013d8: 5410946f jal x8,8000b118 + 800013dc: 800013cc .word 0x800013cc + 800013e0: 00000000 .word 0x00000000 + 800013e4: 8001485d .word 0x8001485d + 800013e8: 00000000 .word 0x00000000 + 800013ec: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x1668bbc7b0a0bd01 + 800013f0: 000c3203 ld x4,0(x24) + 800013f4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x6ebc414973afe47d + 800013f8: 000c3e83 ld x29,0(x24) + 800013fc: 008c0c13 addi x24,x24,8 + +0000000080001400 : +Zknd_aes64dsm_cg_cp_rd_b31: + aes64dsm x31, x4, x29 # perform operation + 80001400: 3fd20fb3 aes64dsm x31,x4,x29 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cp_rd_b31, Zknd_aes64dsm_cg_cp_rd_b31_str) + 80001404: 00063383 ld x7,0(x12) + 80001408: 01f38c63 beq x7,x31,80001420 + 8000140c: 50d0946f jal x8,8000b118 + 80001410: 80001400 .word 0x80001400 + 80001414: 00000000 .word 0x00000000 + 80001418: 80014893 .word 0x80014893 + 8000141c: 00000000 .word 0x00000000 + 80001420: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0000000000000000 + 80001424: 000c3903 ld x18,0(x24) + 80001428: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x57b3feb2a226b5e3 + 8000142c: 000c3803 ld x16,0(x24) + 80001430: 008c0c13 addi x24,x24,8 + +0000000080001434 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x0: + aes64dsm x6, x18, x16 # perform operation + 80001434: 3f090333 aes64dsm x6,x18,x16 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs1_edges_0x0, Zknd_aes64dsm_cg_cp_rs1_edges_0x0_str) + 80001438: 00063383 ld x7,0(x12) + 8000143c: 00638c63 beq x7,x6,80001454 + 80001440: 4d90946f jal x8,8000b118 + 80001444: 80001434 .word 0x80001434 + 80001448: 00000000 .word 0x00000000 + 8000144c: 800148c9 .word 0x800148c9 + 80001450: 00000000 .word 0x00000000 + 80001454: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x0000000000000001 + 80001458: 000c3c83 ld x25,0(x24) + 8000145c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xeebee8850b951074 + 80001460: 000c3b03 ld x22,0(x24) + 80001464: 008c0c13 addi x24,x24,8 + +0000000080001468 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x1: + aes64dsm x23, x25, x22 # perform operation + 80001468: 3f6c8bb3 aes64dsm x23,x25,x22 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cp_rs1_edges_0x1, Zknd_aes64dsm_cg_cp_rs1_edges_0x1_str) + 8000146c: 00063383 ld x7,0(x12) + 80001470: 01738c63 beq x7,x23,80001488 + 80001474: 4a50946f jal x8,8000b118 + 80001478: 80001468 .word 0x80001468 + 8000147c: 00000000 .word 0x00000000 + 80001480: 80014906 .word 0x80014906 + 80001484: 00000000 .word 0x00000000 + 80001488: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x0000000000000002 + 8000148c: 000c3d83 ld x27,0(x24) + 80001490: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xd8d8465f71066af0 + 80001494: 000c3303 ld x6,0(x24) + 80001498: 008c0c13 addi x24,x24,8 + +000000008000149c : +Zknd_aes64dsm_cg_cp_rs1_edges_0x2: + aes64dsm x15, x27, x6 # perform operation + 8000149c: 3e6d87b3 aes64dsm x15,x27,x6 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cp_rs1_edges_0x2, Zknd_aes64dsm_cg_cp_rs1_edges_0x2_str) + 800014a0: 00063383 ld x7,0(x12) + 800014a4: 00f38c63 beq x7,x15,800014bc + 800014a8: 4710946f jal x8,8000b118 + 800014ac: 8000149c .word 0x8000149c + 800014b0: 00000000 .word 0x00000000 + 800014b4: 80014943 .word 0x80014943 + 800014b8: 00000000 .word 0x00000000 + 800014bc: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000000 + 800014c0: 000c3d03 ld x26,0(x24) + 800014c4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x6fc4bbebb113fa02 + 800014c8: 000c3f03 ld x30,0(x24) + 800014cc: 008c0c13 addi x24,x24,8 + +00000000800014d0 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000000: + aes64dsm x13, x26, x30 # perform operation + 800014d0: 3fed06b3 aes64dsm x13,x26,x30 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000000, Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d4: 00063383 ld x7,0(x12) + 800014d8: 00d38c63 beq x7,x13,800014f0 + 800014dc: 43d0946f jal x8,8000b118 + 800014e0: 800014d0 .word 0x800014d0 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 80014980 .word 0x80014980 + 800014ec: 00000000 .word 0x00000000 + 800014f0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000001 + 800014f4: 000c3d03 ld x26,0(x24) + 800014f8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xcc41fd8b394659cb + 800014fc: 000c3703 ld x14,0(x24) + 80001500: 008c0c13 addi x24,x24,8 + +0000000080001504 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000001: + aes64dsm x6, x26, x14 # perform operation + 80001504: 3eed0333 aes64dsm x6,x26,x14 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000001, Zknd_aes64dsm_cg_cp_rs1_edges_0x8000000000000001_str) + 80001508: 00063383 ld x7,0(x12) + 8000150c: 00638c63 beq x7,x6,80001524 + 80001510: 4090946f jal x8,8000b118 + 80001514: 80001504 .word 0x80001504 + 80001518: 00000000 .word 0x00000000 + 8000151c: 800149cd .word 0x800149cd + 80001520: 00000000 .word 0x00000000 + 80001524: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x7fffffffffffffff + 80001528: 000c3e03 ld x28,0(x24) + 8000152c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x4196a760913fba97 + 80001530: 000c3d03 ld x26,0(x24) + 80001534: 008c0c13 addi x24,x24,8 + +0000000080001538 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64dsm x6, x28, x26 # perform operation + 80001538: 3fae0333 aes64dsm x6,x28,x26 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs1_edges_0x7fffffffffffffff, Zknd_aes64dsm_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 8000153c: 00063383 ld x7,0(x12) + 80001540: 00638c63 beq x7,x6,80001558 + 80001544: 3d50946f jal x8,8000b118 + 80001548: 80001538 .word 0x80001538 + 8000154c: 00000000 .word 0x00000000 + 80001550: 80014a1a .word 0x80014a1a + 80001554: 00000000 .word 0x00000000 + 80001558: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x7ffffffffffffffe + 8000155c: 000c3303 ld x6,0(x24) + 80001560: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0xd3b253d8f2157999 + 80001564: 000c3103 ld x2,0(x24) + 80001568: 008c0c13 addi x24,x24,8 + +000000008000156c : +Zknd_aes64dsm_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64dsm x14, x6, x2 # perform operation + 8000156c: 3e230733 aes64dsm x14,x6,x2 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001570: 00063383 ld x7,0(x12) + 80001574: 00e38c63 beq x7,x14,8000158c + 80001578: 3a10946f jal x8,8000b118 + 8000157c: 8000156c .word 0x8000156c + 80001580: 00000000 .word 0x00000000 + 80001584: 80014a67 .word 0x80014a67 + 80001588: 00000000 .word 0x00000000 + 8000158c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xffffffffffffffff + 80001590: 000c3303 ld x6,0(x24) + 80001594: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xfd3d26f7fa822ccc + 80001598: 000c3983 ld x19,0(x24) + 8000159c: 008c0c13 addi x24,x24,8 + +00000000800015a0 : +Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffffffffffff: + aes64dsm x13, x6, x19 # perform operation + 800015a0: 3f3306b3 aes64dsm x13,x6,x19 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffffffffffff, Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a4: 00063383 ld x7,0(x12) + 800015a8: 00d38c63 beq x7,x13,800015c0 + 800015ac: 36d0946f jal x8,8000b118 + 800015b0: 800015a0 .word 0x800015a0 + 800015b4: 00000000 .word 0x00000000 + 800015b8: 80014ab4 .word 0x80014ab4 + 800015bc: 00000000 .word 0x00000000 + 800015c0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xfffffffffffffffe + 800015c4: 000c3f83 ld x31,0(x24) + 800015c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xf0d7d89eef1aafc7 + 800015cc: 000c3503 ld x10,0(x24) + 800015d0: 008c0c13 addi x24,x24,8 + +00000000800015d4 : +Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64dsm x16, x31, x10 # perform operation + 800015d4: 3eaf8833 aes64dsm x16,x31,x10 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffffffffffe, Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d8: 00063383 ld x7,0(x12) + 800015dc: 01038c63 beq x7,x16,800015f4 + 800015e0: 3390946f jal x8,8000b118 + 800015e4: 800015d4 .word 0x800015d4 + 800015e8: 00000000 .word 0x00000000 + 800015ec: 80014b01 .word 0x80014b01 + 800015f0: 00000000 .word 0x00000000 + 800015f4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800015f8: 000c3e03 ld x28,0(x24) + 800015fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x6df23fbec39f7be6 + 80001600: 000c3d03 ld x26,0(x24) + 80001604: 008c0c13 addi x24,x24,8 + +0000000080001608 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64dsm x15, x28, x26 # perform operation + 80001608: 3fae07b3 aes64dsm x15,x28,x26 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 8000160c: 00063383 ld x7,0(x12) + 80001610: 00f38c63 beq x7,x15,80001628 + 80001614: 3050946f jal x8,8000b118 + 80001618: 80001608 .word 0x80001608 + 8000161c: 00000000 .word 0x00000000 + 80001620: 80014b4e .word 0x80014b4e + 80001624: 00000000 .word 0x00000000 + 80001628: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 8000162c: 000c3803 ld x16,0(x24) + 80001630: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xab5961295d3f21dc + 80001634: 000c3703 ld x14,0(x24) + 80001638: 008c0c13 addi x24,x24,8 + +000000008000163c : +Zknd_aes64dsm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64dsm x28, x16, x14 # perform operation + 8000163c: 3ee80e33 aes64dsm x28,x16,x14 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001640: 00063383 ld x7,0(x12) + 80001644: 01c38c63 beq x7,x28,8000165c + 80001648: 2d10946f jal x8,8000b118 + 8000164c: 8000163c .word 0x8000163c + 80001650: 00000000 .word 0x00000000 + 80001654: 80014b9b .word 0x80014b9b + 80001658: 00000000 .word 0x00000000 + 8000165c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x5555555555555555 + 80001660: 000c3c83 ld x25,0(x24) + 80001664: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x75b18a7a74fce75c + 80001668: 000c3d03 ld x26,0(x24) + 8000166c: 008c0c13 addi x24,x24,8 + +0000000080001670 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x5555555555555555: + aes64dsm x9, x25, x26 # perform operation + 80001670: 3fac84b3 aes64dsm x9,x25,x26 + # Check if x9 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x9, Zknd_aes64dsm_cg_cp_rs1_edges_0x5555555555555555, Zknd_aes64dsm_cg_cp_rs1_edges_0x5555555555555555_str) + 80001674: 00063383 ld x7,0(x12) + 80001678: 00938c63 beq x7,x9,80001690 + 8000167c: 29d0946f jal x8,8000b118 + 80001680: 80001670 .word 0x80001670 + 80001684: 00000000 .word 0x00000000 + 80001688: 80014be8 .word 0x80014be8 + 8000168c: 00000000 .word 0x00000000 + 80001690: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x00000000ffffffff + 80001694: 000c3203 ld x4,0(x24) + 80001698: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xd59feb09d3c76626 + 8000169c: 000c3a03 ld x20,0(x24) + 800016a0: 008c0c13 addi x24,x24,8 + +00000000800016a4 : +Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffff: + aes64dsm x13, x4, x20 # perform operation + 800016a4: 3f4206b3 aes64dsm x13,x4,x20 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffff, Zknd_aes64dsm_cg_cp_rs1_edges_0xffffffff_str) + 800016a8: 00063383 ld x7,0(x12) + 800016ac: 00d38c63 beq x7,x13,800016c4 + 800016b0: 2690946f jal x8,8000b118 + 800016b4: 800016a4 .word 0x800016a4 + 800016b8: 00000000 .word 0x00000000 + 800016bc: 80014c35 .word 0x80014c35 + 800016c0: 00000000 .word 0x00000000 + 800016c4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x00000000fffffffe + 800016c8: 000c3803 ld x16,0(x24) + 800016cc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xf32b3eeb87da0734 + 800016d0: 000c3483 ld x9,0(x24) + 800016d4: 008c0c13 addi x24,x24,8 + +00000000800016d8 : +Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffe: + aes64dsm x29, x16, x9 # perform operation + 800016d8: 3e980eb3 aes64dsm x29,x16,x9 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffe, Zknd_aes64dsm_cg_cp_rs1_edges_0xfffffffe_str) + 800016dc: 00063383 ld x7,0(x12) + 800016e0: 01d38c63 beq x7,x29,800016f8 + 800016e4: 2350946f jal x8,8000b118 + 800016e8: 800016d8 .word 0x800016d8 + 800016ec: 00000000 .word 0x00000000 + 800016f0: 80014c7a .word 0x80014c7a + 800016f4: 00000000 .word 0x00000000 + 800016f8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0000000100000000 + 800016fc: 000c3903 ld x18,0(x24) + 80001700: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x9d624b979fbbaedf + 80001704: 000c3583 ld x11,0(x24) + 80001708: 008c0c13 addi x24,x24,8 + +000000008000170c : +Zknd_aes64dsm_cg_cp_rs1_edges_0x100000000: + aes64dsm x28, x18, x11 # perform operation + 8000170c: 3eb90e33 aes64dsm x28,x18,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cp_rs1_edges_0x100000000, Zknd_aes64dsm_cg_cp_rs1_edges_0x100000000_str) + 80001710: 00063383 ld x7,0(x12) + 80001714: 01c38c63 beq x7,x28,8000172c + 80001718: 2010946f jal x8,8000b118 + 8000171c: 8000170c .word 0x8000170c + 80001720: 00000000 .word 0x00000000 + 80001724: 80014cbf .word 0x80014cbf + 80001728: 00000000 .word 0x00000000 + 8000172c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0000000100000001 + 80001730: 000c3e83 ld x29,0(x24) + 80001734: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x7b98066380442d86 + 80001738: 000c3e03 ld x28,0(x24) + 8000173c: 008c0c13 addi x24,x24,8 + +0000000080001740 : +Zknd_aes64dsm_cg_cp_rs1_edges_0x100000001: + aes64dsm x2, x29, x28 # perform operation + 80001740: 3fce8133 aes64dsm x2,x29,x28 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cp_rs1_edges_0x100000001, Zknd_aes64dsm_cg_cp_rs1_edges_0x100000001_str) + 80001744: 00063383 ld x7,0(x12) + 80001748: 00238c63 beq x7,x2,80001760 + 8000174c: 1cd0946f jal x8,8000b118 + 80001750: 80001740 .word 0x80001740 + 80001754: 00000000 .word 0x00000000 + 80001758: 80014d05 .word 0x80014d05 + 8000175c: 00000000 .word 0x00000000 + 80001760: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x37e488b4e12ca715 + 80001764: 000c3d03 ld x26,0(x24) + 80001768: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x0000000000000000 + 8000176c: 000c3e03 ld x28,0(x24) + 80001770: 008c0c13 addi x24,x24,8 + +0000000080001774 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x0: + aes64dsm x29, x26, x28 # perform operation + 80001774: 3fcd0eb3 aes64dsm x29,x26,x28 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cp_rs2_edges_0x0, Zknd_aes64dsm_cg_cp_rs2_edges_0x0_str) + 80001778: 00063383 ld x7,0(x12) + 8000177c: 01d38c63 beq x7,x29,80001794 + 80001780: 1990946f jal x8,8000b118 + 80001784: 80001774 .word 0x80001774 + 80001788: 00000000 .word 0x00000000 + 8000178c: 80014d4b .word 0x80014d4b + 80001790: 00000000 .word 0x00000000 + 80001794: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xfe4d71b508a388d4 + 80001798: 000c3f83 ld x31,0(x24) + 8000179c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0000000000000001 + 800017a0: 000c3483 ld x9,0(x24) + 800017a4: 008c0c13 addi x24,x24,8 + +00000000800017a8 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x1: + aes64dsm x10, x31, x9 # perform operation + 800017a8: 3e9f8533 aes64dsm x10,x31,x9 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cp_rs2_edges_0x1, Zknd_aes64dsm_cg_cp_rs2_edges_0x1_str) + 800017ac: 00063383 ld x7,0(x12) + 800017b0: 00a38c63 beq x7,x10,800017c8 + 800017b4: 1650946f jal x8,8000b118 + 800017b8: 800017a8 .word 0x800017a8 + 800017bc: 00000000 .word 0x00000000 + 800017c0: 80014d89 .word 0x80014d89 + 800017c4: 00000000 .word 0x00000000 + 800017c8: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x0cd190f67c01e334 + 800017cc: 000c3183 ld x3,0(x24) + 800017d0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x0000000000000002 + 800017d4: 000c3703 ld x14,0(x24) + 800017d8: 008c0c13 addi x24,x24,8 + +00000000800017dc : +Zknd_aes64dsm_cg_cp_rs2_edges_0x2: + aes64dsm x6, x3, x14 # perform operation + 800017dc: 3ee18333 aes64dsm x6,x3,x14 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs2_edges_0x2, Zknd_aes64dsm_cg_cp_rs2_edges_0x2_str) + 800017e0: 00063383 ld x7,0(x12) + 800017e4: 00638c63 beq x7,x6,800017fc + 800017e8: 1310946f jal x8,8000b118 + 800017ec: 800017dc .word 0x800017dc + 800017f0: 00000000 .word 0x00000000 + 800017f4: 80014dc7 .word 0x80014dc7 + 800017f8: 00000000 .word 0x00000000 + 800017fc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0xaf1b60c7762f7304 + 80001800: 000c3c83 ld x25,0(x24) + 80001804: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x8000000000000000 + 80001808: 000c3903 ld x18,0(x24) + 8000180c: 008c0c13 addi x24,x24,8 + +0000000080001810 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000000: + aes64dsm x20, x25, x18 # perform operation + 80001810: 3f2c8a33 aes64dsm x20,x25,x18 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000000, Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000000_str) + 80001814: 00063383 ld x7,0(x12) + 80001818: 01438c63 beq x7,x20,80001830 + 8000181c: 0fd0946f jal x8,8000b118 + 80001820: 80001810 .word 0x80001810 + 80001824: 00000000 .word 0x00000000 + 80001828: 80014e05 .word 0x80014e05 + 8000182c: 00000000 .word 0x00000000 + 80001830: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xf92fceb385c3c0ae + 80001834: 000c3183 ld x3,0(x24) + 80001838: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x8000000000000001 + 8000183c: 000c3f83 ld x31,0(x24) + 80001840: 008c0c13 addi x24,x24,8 + +0000000080001844 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000001: + aes64dsm x14, x3, x31 # perform operation + 80001844: 3ff18733 aes64dsm x14,x3,x31 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000001, Zknd_aes64dsm_cg_cp_rs2_edges_0x8000000000000001_str) + 80001848: 00063383 ld x7,0(x12) + 8000184c: 00e38c63 beq x7,x14,80001864 + 80001850: 0c90946f jal x8,8000b118 + 80001854: 80001844 .word 0x80001844 + 80001858: 00000000 .word 0x00000000 + 8000185c: 80014e52 .word 0x80014e52 + 80001860: 00000000 .word 0x00000000 + 80001864: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xd23f43574dbfa6d1 + 80001868: 000c3303 ld x6,0(x24) + 8000186c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x7fffffffffffffff + 80001870: 000c3883 ld x17,0(x24) + 80001874: 008c0c13 addi x24,x24,8 + +0000000080001878 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64dsm x27, x6, x17 # perform operation + 80001878: 3f130db3 aes64dsm x27,x6,x17 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cp_rs2_edges_0x7fffffffffffffff, Zknd_aes64dsm_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 8000187c: 00063383 ld x7,0(x12) + 80001880: 01b38c63 beq x7,x27,80001898 + 80001884: 0950946f jal x8,8000b118 + 80001888: 80001878 .word 0x80001878 + 8000188c: 00000000 .word 0x00000000 + 80001890: 80014e9f .word 0x80014e9f + 80001894: 00000000 .word 0x00000000 + 80001898: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xec5066cc56e14ca3 + 8000189c: 000c3703 ld x14,0(x24) + 800018a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800018a4: 000c3883 ld x17,0(x24) + 800018a8: 008c0c13 addi x24,x24,8 + +00000000800018ac : +Zknd_aes64dsm_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64dsm x20, x14, x17 # perform operation + 800018ac: 3f170a33 aes64dsm x20,x14,x17 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cp_rs2_edges_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b0: 00063383 ld x7,0(x12) + 800018b4: 01438c63 beq x7,x20,800018cc + 800018b8: 0610946f jal x8,8000b118 + 800018bc: 800018ac .word 0x800018ac + 800018c0: 00000000 .word 0x00000000 + 800018c4: 80014eec .word 0x80014eec + 800018c8: 00000000 .word 0x00000000 + 800018cc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xde1aab9562cc2f23 + 800018d0: 000c3903 ld x18,0(x24) + 800018d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0xffffffffffffffff + 800018d8: 000c3203 ld x4,0(x24) + 800018dc: 008c0c13 addi x24,x24,8 + +00000000800018e0 : +Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffffffffffff: + aes64dsm x22, x18, x4 # perform operation + 800018e0: 3e490b33 aes64dsm x22,x18,x4 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffffffffffff, Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e4: 00063383 ld x7,0(x12) + 800018e8: 01638c63 beq x7,x22,80001900 + 800018ec: 02d0946f jal x8,8000b118 + 800018f0: 800018e0 .word 0x800018e0 + 800018f4: 00000000 .word 0x00000000 + 800018f8: 80014f39 .word 0x80014f39 + 800018fc: 00000000 .word 0x00000000 + 80001900: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xe7757362c399fc4f + 80001904: 000c3903 ld x18,0(x24) + 80001908: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xfffffffffffffffe + 8000190c: 000c3703 ld x14,0(x24) + 80001910: 008c0c13 addi x24,x24,8 + +0000000080001914 : +Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64dsm x1, x18, x14 # perform operation + 80001914: 3ee900b3 aes64dsm x1,x18,x14 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffffffffffe, Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001918: 00063383 ld x7,0(x12) + 8000191c: 00138c63 beq x7,x1,80001934 + 80001920: 7f80946f jal x8,8000b118 + 80001924: 80001914 .word 0x80001914 + 80001928: 00000000 .word 0x00000000 + 8000192c: 80014f86 .word 0x80014f86 + 80001930: 00000000 .word 0x00000000 + 80001934: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0xd9be5523cbe29a95 + 80001938: 000c3c83 ld x25,0(x24) + 8000193c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x5bbc887763ae86f2 + 80001940: 000c3083 ld x1,0(x24) + 80001944: 008c0c13 addi x24,x24,8 + +0000000080001948 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64dsm x29, x25, x1 # perform operation + 80001948: 3e1c8eb3 aes64dsm x29,x25,x1 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 8000194c: 00063383 ld x7,0(x12) + 80001950: 01d38c63 beq x7,x29,80001968 + 80001954: 7c40946f jal x8,8000b118 + 80001958: 80001948 .word 0x80001948 + 8000195c: 00000000 .word 0x00000000 + 80001960: 80014fd3 .word 0x80014fd3 + 80001964: 00000000 .word 0x00000000 + 80001968: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xa44b87df8732e8c5 + 8000196c: 000c3983 ld x19,0(x24) + 80001970: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0xaaaaaaaaaaaaaaaa + 80001974: 000c3103 ld x2,0(x24) + 80001978: 008c0c13 addi x24,x24,8 + +000000008000197c : +Zknd_aes64dsm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64dsm x25, x19, x2 # perform operation + 8000197c: 3e298cb3 aes64dsm x25,x19,x2 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001980: 00063383 ld x7,0(x12) + 80001984: 01938c63 beq x7,x25,8000199c + 80001988: 7900946f jal x8,8000b118 + 8000198c: 8000197c .word 0x8000197c + 80001990: 00000000 .word 0x00000000 + 80001994: 80015020 .word 0x80015020 + 80001998: 00000000 .word 0x00000000 + 8000199c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x0398b9430798cdd5 + 800019a0: 000c3803 ld x16,0(x24) + 800019a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x5555555555555555 + 800019a8: 000c3983 ld x19,0(x24) + 800019ac: 008c0c13 addi x24,x24,8 + +00000000800019b0 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x5555555555555555: + aes64dsm x5, x16, x19 # perform operation + 800019b0: 3f3802b3 aes64dsm x5,x16,x19 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cp_rs2_edges_0x5555555555555555, Zknd_aes64dsm_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b4: 00063383 ld x7,0(x12) + 800019b8: 00538c63 beq x7,x5,800019d0 + 800019bc: 75c0946f jal x8,8000b118 + 800019c0: 800019b0 .word 0x800019b0 + 800019c4: 00000000 .word 0x00000000 + 800019c8: 8001506d .word 0x8001506d + 800019cc: 00000000 .word 0x00000000 + 800019d0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xf196733e73e341f9 + 800019d4: 000c3803 ld x16,0(x24) + 800019d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x00000000ffffffff + 800019dc: 000c3583 ld x11,0(x24) + 800019e0: 008c0c13 addi x24,x24,8 + +00000000800019e4 : +Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffff: + aes64dsm x6, x16, x11 # perform operation + 800019e4: 3eb80333 aes64dsm x6,x16,x11 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffff, Zknd_aes64dsm_cg_cp_rs2_edges_0xffffffff_str) + 800019e8: 00063383 ld x7,0(x12) + 800019ec: 00638c63 beq x7,x6,80001a04 + 800019f0: 7280946f jal x8,8000b118 + 800019f4: 800019e4 .word 0x800019e4 + 800019f8: 00000000 .word 0x00000000 + 800019fc: 800150ba .word 0x800150ba + 80001a00: 00000000 .word 0x00000000 + 80001a04: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xacef3aea4ee7e8ad + 80001a08: 000c3903 ld x18,0(x24) + 80001a0c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x00000000fffffffe + 80001a10: 000c3a83 ld x21,0(x24) + 80001a14: 008c0c13 addi x24,x24,8 + +0000000080001a18 : +Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffe: + aes64dsm x2, x18, x21 # perform operation + 80001a18: 3f590133 aes64dsm x2,x18,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffe, Zknd_aes64dsm_cg_cp_rs2_edges_0xfffffffe_str) + 80001a1c: 00063383 ld x7,0(x12) + 80001a20: 00238c63 beq x7,x2,80001a38 + 80001a24: 6f40946f jal x8,8000b118 + 80001a28: 80001a18 .word 0x80001a18 + 80001a2c: 00000000 .word 0x00000000 + 80001a30: 800150ff .word 0x800150ff + 80001a34: 00000000 .word 0x00000000 + 80001a38: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x533d9943acf23738 + 80001a3c: 000c3803 ld x16,0(x24) + 80001a40: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000100000000 + 80001a44: 000c3e83 ld x29,0(x24) + 80001a48: 008c0c13 addi x24,x24,8 + +0000000080001a4c : +Zknd_aes64dsm_cg_cp_rs2_edges_0x100000000: + aes64dsm x26, x16, x29 # perform operation + 80001a4c: 3fd80d33 aes64dsm x26,x16,x29 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cp_rs2_edges_0x100000000, Zknd_aes64dsm_cg_cp_rs2_edges_0x100000000_str) + 80001a50: 00063383 ld x7,0(x12) + 80001a54: 01a38c63 beq x7,x26,80001a6c + 80001a58: 6c00946f jal x8,8000b118 + 80001a5c: 80001a4c .word 0x80001a4c + 80001a60: 00000000 .word 0x00000000 + 80001a64: 80015144 .word 0x80015144 + 80001a68: 00000000 .word 0x00000000 + 80001a6c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xd201b4be1a10c3f5 + 80001a70: 000c3d83 ld x27,0(x24) + 80001a74: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x0000000100000001 + 80001a78: 000c3c83 ld x25,0(x24) + 80001a7c: 008c0c13 addi x24,x24,8 + +0000000080001a80 : +Zknd_aes64dsm_cg_cp_rs2_edges_0x100000001: + aes64dsm x20, x27, x25 # perform operation + 80001a80: 3f9d8a33 aes64dsm x20,x27,x25 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cp_rs2_edges_0x100000001, Zknd_aes64dsm_cg_cp_rs2_edges_0x100000001_str) + 80001a84: 00063383 ld x7,0(x12) + 80001a88: 01438c63 beq x7,x20,80001aa0 + 80001a8c: 68c0946f jal x8,8000b118 + 80001a90: 80001a80 .word 0x80001a80 + 80001a94: 00000000 .word 0x00000000 + 80001a98: 8001518a .word 0x8001518a + 80001a9c: 00000000 .word 0x00000000 + 80001aa0: 00860613 addi x12,x12,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x0000000000000000 + 80001aa4: 000c3183 ld x3,0(x24) + 80001aa8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x0000000000000000 + 80001aac: 000c3103 ld x2,0(x24) + 80001ab0: 008c0c13 addi x24,x24,8 + +0000000080001ab4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64dsm x5, x3, x2 # perform operation + 80001ab4: 3e2182b3 aes64dsm x5,x3,x2 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab8: 00063383 ld x7,0(x12) + 80001abc: 00538c63 beq x7,x5,80001ad4 + 80001ac0: 6580946f jal x8,8000b118 + 80001ac4: 80001ab4 .word 0x80001ab4 + 80001ac8: 00000000 .word 0x00000000 + 80001acc: 800151d0 .word 0x800151d0 + 80001ad0: 00000000 .word 0x00000000 + 80001ad4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0000000000000000 + 80001ad8: 000c3783 ld x15,0(x24) + 80001adc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x0000000000000001 + 80001ae0: 000c3f83 ld x31,0(x24) + 80001ae4: 008c0c13 addi x24,x24,8 + +0000000080001ae8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64dsm x5, x15, x31 # perform operation + 80001ae8: 3ff782b3 aes64dsm x5,x15,x31 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001aec: 00063383 ld x7,0(x12) + 80001af0: 00538c63 beq x7,x5,80001b08 + 80001af4: 6240946f jal x8,8000b118 + 80001af8: 80001ae8 .word 0x80001ae8 + 80001afc: 00000000 .word 0x00000000 + 80001b00: 80015225 .word 0x80015225 + 80001b04: 00000000 .word 0x00000000 + 80001b08: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000000000000 + 80001b0c: 000c3f03 ld x30,0(x24) + 80001b10: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0000000000000002 + 80001b14: 000c3283 ld x5,0(x24) + 80001b18: 008c0c13 addi x24,x24,8 + +0000000080001b1c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64dsm x25, x30, x5 # perform operation + 80001b1c: 3e5f0cb3 aes64dsm x25,x30,x5 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b20: 00063383 ld x7,0(x12) + 80001b24: 01938c63 beq x7,x25,80001b3c + 80001b28: 5f00946f jal x8,8000b118 + 80001b2c: 80001b1c .word 0x80001b1c + 80001b30: 00000000 .word 0x00000000 + 80001b34: 8001527a .word 0x8001527a + 80001b38: 00000000 .word 0x00000000 + 80001b3c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x0000000000000000 + 80001b40: 000c3a03 ld x20,0(x24) + 80001b44: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x8000000000000000 + 80001b48: 000c3d03 ld x26,0(x24) + 80001b4c: 008c0c13 addi x24,x24,8 + +0000000080001b50 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64dsm x5, x20, x26 # perform operation + 80001b50: 3faa02b3 aes64dsm x5,x20,x26 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b54: 00063383 ld x7,0(x12) + 80001b58: 00538c63 beq x7,x5,80001b70 + 80001b5c: 5bc0946f jal x8,8000b118 + 80001b60: 80001b50 .word 0x80001b50 + 80001b64: 00000000 .word 0x00000000 + 80001b68: 800152cf .word 0x800152cf + 80001b6c: 00000000 .word 0x00000000 + 80001b70: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x0000000000000000 + 80001b74: 000c3303 ld x6,0(x24) + 80001b78: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x8000000000000001 + 80001b7c: 000c3a03 ld x20,0(x24) + 80001b80: 008c0c13 addi x24,x24,8 + +0000000080001b84 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64dsm x11, x6, x20 # perform operation + 80001b84: 3f4305b3 aes64dsm x11,x6,x20 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b88: 00063383 ld x7,0(x12) + 80001b8c: 00b38c63 beq x7,x11,80001ba4 + 80001b90: 5880946f jal x8,8000b118 + 80001b94: 80001b84 .word 0x80001b84 + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 80015333 .word 0x80015333 + 80001ba0: 00000000 .word 0x00000000 + 80001ba4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x0000000000000000 + 80001ba8: 000c3b03 ld x22,0(x24) + 80001bac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x7fffffffffffffff + 80001bb0: 000c3f83 ld x31,0(x24) + 80001bb4: 008c0c13 addi x24,x24,8 + +0000000080001bb8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64dsm x18, x22, x31 # perform operation + 80001bb8: 3ffb0933 aes64dsm x18,x22,x31 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bbc: 00063383 ld x7,0(x12) + 80001bc0: 01238c63 beq x7,x18,80001bd8 + 80001bc4: 5540946f jal x8,8000b118 + 80001bc8: 80001bb8 .word 0x80001bb8 + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 80015397 .word 0x80015397 + 80001bd4: 00000000 .word 0x00000000 + 80001bd8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x0000000000000000 + 80001bdc: 000c3483 ld x9,0(x24) + 80001be0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80001be4: 000c3703 ld x14,0(x24) + 80001be8: 008c0c13 addi x24,x24,8 + +0000000080001bec : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64dsm x22, x9, x14 # perform operation + 80001bec: 3ee48b33 aes64dsm x22,x9,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf0: 00063383 ld x7,0(x12) + 80001bf4: 01638c63 beq x7,x22,80001c0c + 80001bf8: 5200946f jal x8,8000b118 + 80001bfc: 80001bec .word 0x80001bec + 80001c00: 00000000 .word 0x00000000 + 80001c04: 800153fb .word 0x800153fb + 80001c08: 00000000 .word 0x00000000 + 80001c0c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x0000000000000000 + 80001c10: 000c3683 ld x13,0(x24) + 80001c14: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0xffffffffffffffff + 80001c18: 000c3f03 ld x30,0(x24) + 80001c1c: 008c0c13 addi x24,x24,8 + +0000000080001c20 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64dsm x4, x13, x30 # perform operation + 80001c20: 3fe68233 aes64dsm x4,x13,x30 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c24: 00063383 ld x7,0(x12) + 80001c28: 00438c63 beq x7,x4,80001c40 + 80001c2c: 4ec0946f jal x8,8000b118 + 80001c30: 80001c20 .word 0x80001c20 + 80001c34: 00000000 .word 0x00000000 + 80001c38: 8001545f .word 0x8001545f + 80001c3c: 00000000 .word 0x00000000 + 80001c40: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x0000000000000000 + 80001c44: 000c3b03 ld x22,0(x24) + 80001c48: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xfffffffffffffffe + 80001c4c: 000c3803 ld x16,0(x24) + 80001c50: 008c0c13 addi x24,x24,8 + +0000000080001c54 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64dsm x30, x22, x16 # perform operation + 80001c54: 3f0b0f33 aes64dsm x30,x22,x16 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c58: 00063383 ld x7,0(x12) + 80001c5c: 01e38c63 beq x7,x30,80001c74 + 80001c60: 4b80946f jal x8,8000b118 + 80001c64: 80001c54 .word 0x80001c54 + 80001c68: 00000000 .word 0x00000000 + 80001c6c: 800154c3 .word 0x800154c3 + 80001c70: 00000000 .word 0x00000000 + 80001c74: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x0000000000000000 + 80001c78: 000c3683 ld x13,0(x24) + 80001c7c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80001c80: 000c3183 ld x3,0(x24) + 80001c84: 008c0c13 addi x24,x24,8 + +0000000080001c88 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64dsm x28, x13, x3 # perform operation + 80001c88: 3e368e33 aes64dsm x28,x13,x3 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c8c: 00063383 ld x7,0(x12) + 80001c90: 01c38c63 beq x7,x28,80001ca8 + 80001c94: 4840946f jal x8,8000b118 + 80001c98: 80001c88 .word 0x80001c88 + 80001c9c: 00000000 .word 0x00000000 + 80001ca0: 80015527 .word 0x80015527 + 80001ca4: 00000000 .word 0x00000000 + 80001ca8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x0000000000000000 + 80001cac: 000c3c83 ld x25,0(x24) + 80001cb0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80001cb4: 000c3583 ld x11,0(x24) + 80001cb8: 008c0c13 addi x24,x24,8 + +0000000080001cbc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x10, x25, x11 # perform operation + 80001cbc: 3ebc8533 aes64dsm x10,x25,x11 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc0: 00063383 ld x7,0(x12) + 80001cc4: 00a38c63 beq x7,x10,80001cdc + 80001cc8: 4500946f jal x8,8000b118 + 80001ccc: 80001cbc .word 0x80001cbc + 80001cd0: 00000000 .word 0x00000000 + 80001cd4: 8001558b .word 0x8001558b + 80001cd8: 00000000 .word 0x00000000 + 80001cdc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x0000000000000000 + 80001ce0: 000c3483 ld x9,0(x24) + 80001ce4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x5555555555555555 + 80001ce8: 000c3803 ld x16,0(x24) + 80001cec: 008c0c13 addi x24,x24,8 + +0000000080001cf0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64dsm x10, x9, x16 # perform operation + 80001cf0: 3f048533 aes64dsm x10,x9,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf4: 00063383 ld x7,0(x12) + 80001cf8: 00a38c63 beq x7,x10,80001d10 + 80001cfc: 41c0946f jal x8,8000b118 + 80001d00: 80001cf0 .word 0x80001cf0 + 80001d04: 00000000 .word 0x00000000 + 80001d08: 800155ef .word 0x800155ef + 80001d0c: 00000000 .word 0x00000000 + 80001d10: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x0000000000000000 + 80001d14: 000c3103 ld x2,0(x24) + 80001d18: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x00000000ffffffff + 80001d1c: 000c3f83 ld x31,0(x24) + 80001d20: 008c0c13 addi x24,x24,8 + +0000000080001d24 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64dsm x3, x2, x31 # perform operation + 80001d24: 3ff101b3 aes64dsm x3,x2,x31 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d28: 00063383 ld x7,0(x12) + 80001d2c: 00338c63 beq x7,x3,80001d44 + 80001d30: 3e80946f jal x8,8000b118 + 80001d34: 80001d24 .word 0x80001d24 + 80001d38: 00000000 .word 0x00000000 + 80001d3c: 80015653 .word 0x80015653 + 80001d40: 00000000 .word 0x00000000 + 80001d44: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x0000000000000000 + 80001d48: 000c3b83 ld x23,0(x24) + 80001d4c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x00000000fffffffe + 80001d50: 000c3683 ld x13,0(x24) + 80001d54: 008c0c13 addi x24,x24,8 + +0000000080001d58 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64dsm x3, x23, x13 # perform operation + 80001d58: 3edb81b3 aes64dsm x3,x23,x13 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d5c: 00063383 ld x7,0(x12) + 80001d60: 00338c63 beq x7,x3,80001d78 + 80001d64: 3b40946f jal x8,8000b118 + 80001d68: 80001d58 .word 0x80001d58 + 80001d6c: 00000000 .word 0x00000000 + 80001d70: 800156af .word 0x800156af + 80001d74: 00000000 .word 0x00000000 + 80001d78: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x0000000000000000 + 80001d7c: 000c3b03 ld x22,0(x24) + 80001d80: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x0000000100000000 + 80001d84: 000c3a03 ld x20,0(x24) + 80001d88: 008c0c13 addi x24,x24,8 + +0000000080001d8c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64dsm x6, x22, x20 # perform operation + 80001d8c: 3f4b0333 aes64dsm x6,x22,x20 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d90: 00063383 ld x7,0(x12) + 80001d94: 00638c63 beq x7,x6,80001dac + 80001d98: 3800946f jal x8,8000b118 + 80001d9c: 80001d8c .word 0x80001d8c + 80001da0: 00000000 .word 0x00000000 + 80001da4: 8001570b .word 0x8001570b + 80001da8: 00000000 .word 0x00000000 + 80001dac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x0000000000000000 + 80001db0: 000c3a03 ld x20,0(x24) + 80001db4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0000000100000001 + 80001db8: 000c3283 ld x5,0(x24) + 80001dbc: 008c0c13 addi x24,x24,8 + +0000000080001dc0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64dsm x13, x20, x5 # perform operation + 80001dc0: 3e5a06b3 aes64dsm x13,x20,x5 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc4: 00063383 ld x7,0(x12) + 80001dc8: 00d38c63 beq x7,x13,80001de0 + 80001dcc: 34c0946f jal x8,8000b118 + 80001dd0: 80001dc0 .word 0x80001dc0 + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 80015768 .word 0x80015768 + 80001ddc: 00000000 .word 0x00000000 + 80001de0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x0000000000000001 + 80001de4: 000c3d03 ld x26,0(x24) + 80001de8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000000000000 + 80001dec: 000c3783 ld x15,0(x24) + 80001df0: 008c0c13 addi x24,x24,8 + +0000000080001df4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64dsm x20, x26, x15 # perform operation + 80001df4: 3efd0a33 aes64dsm x20,x26,x15 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df8: 00063383 ld x7,0(x12) + 80001dfc: 01438c63 beq x7,x20,80001e14 + 80001e00: 3180946f jal x8,8000b118 + 80001e04: 80001df4 .word 0x80001df4 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 800157c5 .word 0x800157c5 + 80001e10: 00000000 .word 0x00000000 + 80001e14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000000000001 + 80001e18: 000c3f03 ld x30,0(x24) + 80001e1c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x0000000000000001 + 80001e20: 000c3083 ld x1,0(x24) + 80001e24: 008c0c13 addi x24,x24,8 + +0000000080001e28 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64dsm x11, x30, x1 # perform operation + 80001e28: 3e1f05b3 aes64dsm x11,x30,x1 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e2c: 00063383 ld x7,0(x12) + 80001e30: 00b38c63 beq x7,x11,80001e48 + 80001e34: 2e40946f jal x8,8000b118 + 80001e38: 80001e28 .word 0x80001e28 + 80001e3c: 00000000 .word 0x00000000 + 80001e40: 8001581a .word 0x8001581a + 80001e44: 00000000 .word 0x00000000 + 80001e48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000000000001 + 80001e4c: 000c3203 ld x4,0(x24) + 80001e50: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x0000000000000002 + 80001e54: 000c3083 ld x1,0(x24) + 80001e58: 008c0c13 addi x24,x24,8 + +0000000080001e5c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64dsm x20, x4, x1 # perform operation + 80001e5c: 3e120a33 aes64dsm x20,x4,x1 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e60: 00063383 ld x7,0(x12) + 80001e64: 01438c63 beq x7,x20,80001e7c + 80001e68: 2b00946f jal x8,8000b118 + 80001e6c: 80001e5c .word 0x80001e5c + 80001e70: 00000000 .word 0x00000000 + 80001e74: 8001586f .word 0x8001586f + 80001e78: 00000000 .word 0x00000000 + 80001e7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x0000000000000001 + 80001e80: 000c3103 ld x2,0(x24) + 80001e84: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x8000000000000000 + 80001e88: 000c3703 ld x14,0(x24) + 80001e8c: 008c0c13 addi x24,x24,8 + +0000000080001e90 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64dsm x22, x2, x14 # perform operation + 80001e90: 3ee10b33 aes64dsm x22,x2,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e94: 00063383 ld x7,0(x12) + 80001e98: 01638c63 beq x7,x22,80001eb0 + 80001e9c: 27c0946f jal x8,8000b118 + 80001ea0: 80001e90 .word 0x80001e90 + 80001ea4: 00000000 .word 0x00000000 + 80001ea8: 800158c4 .word 0x800158c4 + 80001eac: 00000000 .word 0x00000000 + 80001eb0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x0000000000000001 + 80001eb4: 000c3583 ld x11,0(x24) + 80001eb8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x8000000000000001 + 80001ebc: 000c3103 ld x2,0(x24) + 80001ec0: 008c0c13 addi x24,x24,8 + +0000000080001ec4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64dsm x26, x11, x2 # perform operation + 80001ec4: 3e258d33 aes64dsm x26,x11,x2 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec8: 00063383 ld x7,0(x12) + 80001ecc: 01a38c63 beq x7,x26,80001ee4 + 80001ed0: 2480946f jal x8,8000b118 + 80001ed4: 80001ec4 .word 0x80001ec4 + 80001ed8: 00000000 .word 0x00000000 + 80001edc: 80015928 .word 0x80015928 + 80001ee0: 00000000 .word 0x00000000 + 80001ee4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x0000000000000001 + 80001ee8: 000c3083 ld x1,0(x24) + 80001eec: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x7fffffffffffffff + 80001ef0: 000c3a83 ld x21,0(x24) + 80001ef4: 008c0c13 addi x24,x24,8 + +0000000080001ef8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64dsm x31, x1, x21 # perform operation + 80001ef8: 3f508fb3 aes64dsm x31,x1,x21 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001efc: 00063383 ld x7,0(x12) + 80001f00: 01f38c63 beq x7,x31,80001f18 + 80001f04: 2140946f jal x8,8000b118 + 80001f08: 80001ef8 .word 0x80001ef8 + 80001f0c: 00000000 .word 0x00000000 + 80001f10: 8001598c .word 0x8001598c + 80001f14: 00000000 .word 0x00000000 + 80001f18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x0000000000000001 + 80001f1c: 000c3683 ld x13,0(x24) + 80001f20: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80001f24: 000c3283 ld x5,0(x24) + 80001f28: 008c0c13 addi x24,x24,8 + +0000000080001f2c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64dsm x25, x13, x5 # perform operation + 80001f2c: 3e568cb3 aes64dsm x25,x13,x5 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f30: 00063383 ld x7,0(x12) + 80001f34: 01938c63 beq x7,x25,80001f4c + 80001f38: 1e00946f jal x8,8000b118 + 80001f3c: 80001f2c .word 0x80001f2c + 80001f40: 00000000 .word 0x00000000 + 80001f44: 800159f0 .word 0x800159f0 + 80001f48: 00000000 .word 0x00000000 + 80001f4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x0000000000000001 + 80001f50: 000c3983 ld x19,0(x24) + 80001f54: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xffffffffffffffff + 80001f58: 000c3683 ld x13,0(x24) + 80001f5c: 008c0c13 addi x24,x24,8 + +0000000080001f60 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64dsm x25, x19, x13 # perform operation + 80001f60: 3ed98cb3 aes64dsm x25,x19,x13 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f64: 00063383 ld x7,0(x12) + 80001f68: 01938c63 beq x7,x25,80001f80 + 80001f6c: 1ac0946f jal x8,8000b118 + 80001f70: 80001f60 .word 0x80001f60 + 80001f74: 00000000 .word 0x00000000 + 80001f78: 80015a54 .word 0x80015a54 + 80001f7c: 00000000 .word 0x00000000 + 80001f80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x0000000000000001 + 80001f84: 000c3183 ld x3,0(x24) + 80001f88: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xfffffffffffffffe + 80001f8c: 000c3503 ld x10,0(x24) + 80001f90: 008c0c13 addi x24,x24,8 + +0000000080001f94 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64dsm x19, x3, x10 # perform operation + 80001f94: 3ea189b3 aes64dsm x19,x3,x10 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f98: 00063383 ld x7,0(x12) + 80001f9c: 01338c63 beq x7,x19,80001fb4 + 80001fa0: 1780946f jal x8,8000b118 + 80001fa4: 80001f94 .word 0x80001f94 + 80001fa8: 00000000 .word 0x00000000 + 80001fac: 80015ab8 .word 0x80015ab8 + 80001fb0: 00000000 .word 0x00000000 + 80001fb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x0000000000000001 + 80001fb8: 000c3983 ld x19,0(x24) + 80001fbc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80001fc0: 000c3483 ld x9,0(x24) + 80001fc4: 008c0c13 addi x24,x24,8 + +0000000080001fc8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64dsm x31, x19, x9 # perform operation + 80001fc8: 3e998fb3 aes64dsm x31,x19,x9 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fcc: 00063383 ld x7,0(x12) + 80001fd0: 01f38c63 beq x7,x31,80001fe8 + 80001fd4: 1440946f jal x8,8000b118 + 80001fd8: 80001fc8 .word 0x80001fc8 + 80001fdc: 00000000 .word 0x00000000 + 80001fe0: 80015b1c .word 0x80015b1c + 80001fe4: 00000000 .word 0x00000000 + 80001fe8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x0000000000000001 + 80001fec: 000c3d83 ld x27,0(x24) + 80001ff0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80001ff4: 000c3303 ld x6,0(x24) + 80001ff8: 008c0c13 addi x24,x24,8 + +0000000080001ffc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x29, x27, x6 # perform operation + 80001ffc: 3e6d8eb3 aes64dsm x29,x27,x6 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002000: 00063383 ld x7,0(x12) + 80002004: 01d38c63 beq x7,x29,8000201c + 80002008: 1100946f jal x8,8000b118 + 8000200c: 80001ffc .word 0x80001ffc + 80002010: 00000000 .word 0x00000000 + 80002014: 80015b80 .word 0x80015b80 + 80002018: 00000000 .word 0x00000000 + 8000201c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0000000000000001 + 80002020: 000c3783 ld x15,0(x24) + 80002024: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x5555555555555555 + 80002028: 000c3a03 ld x20,0(x24) + 8000202c: 008c0c13 addi x24,x24,8 + +0000000080002030 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64dsm x21, x15, x20 # perform operation + 80002030: 3f478ab3 aes64dsm x21,x15,x20 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002034: 00063383 ld x7,0(x12) + 80002038: 01538c63 beq x7,x21,80002050 + 8000203c: 0dc0946f jal x8,8000b118 + 80002040: 80002030 .word 0x80002030 + 80002044: 00000000 .word 0x00000000 + 80002048: 80015be4 .word 0x80015be4 + 8000204c: 00000000 .word 0x00000000 + 80002050: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x0000000000000001 + 80002054: 000c3c83 ld x25,0(x24) + 80002058: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x00000000ffffffff + 8000205c: 000c3903 ld x18,0(x24) + 80002060: 008c0c13 addi x24,x24,8 + +0000000080002064 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64dsm x17, x25, x18 # perform operation + 80002064: 3f2c88b3 aes64dsm x17,x25,x18 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002068: 00063383 ld x7,0(x12) + 8000206c: 01138c63 beq x7,x17,80002084 + 80002070: 0a80946f jal x8,8000b118 + 80002074: 80002064 .word 0x80002064 + 80002078: 00000000 .word 0x00000000 + 8000207c: 80015c48 .word 0x80015c48 + 80002080: 00000000 .word 0x00000000 + 80002084: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x0000000000000001 + 80002088: 000c3d03 ld x26,0(x24) + 8000208c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x00000000fffffffe + 80002090: 000c3283 ld x5,0(x24) + 80002094: 008c0c13 addi x24,x24,8 + +0000000080002098 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64dsm x11, x26, x5 # perform operation + 80002098: 3e5d05b3 aes64dsm x11,x26,x5 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 8000209c: 00063383 ld x7,0(x12) + 800020a0: 00b38c63 beq x7,x11,800020b8 + 800020a4: 0740946f jal x8,8000b118 + 800020a8: 80002098 .word 0x80002098 + 800020ac: 00000000 .word 0x00000000 + 800020b0: 80015ca4 .word 0x80015ca4 + 800020b4: 00000000 .word 0x00000000 + 800020b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x0000000000000001 + 800020bc: 000c3703 ld x14,0(x24) + 800020c0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x0000000100000000 + 800020c4: 000c3983 ld x19,0(x24) + 800020c8: 008c0c13 addi x24,x24,8 + +00000000800020cc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64dsm x1, x14, x19 # perform operation + 800020cc: 3f3700b3 aes64dsm x1,x14,x19 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d0: 00063383 ld x7,0(x12) + 800020d4: 00138c63 beq x7,x1,800020ec + 800020d8: 0400946f jal x8,8000b118 + 800020dc: 800020cc .word 0x800020cc + 800020e0: 00000000 .word 0x00000000 + 800020e4: 80015d00 .word 0x80015d00 + 800020e8: 00000000 .word 0x00000000 + 800020ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x0000000000000001 + 800020f0: 000c3f83 ld x31,0(x24) + 800020f4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000100000001 + 800020f8: 000c3783 ld x15,0(x24) + 800020fc: 008c0c13 addi x24,x24,8 + +0000000080002100 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64dsm x10, x31, x15 # perform operation + 80002100: 3eff8533 aes64dsm x10,x31,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002104: 00063383 ld x7,0(x12) + 80002108: 00a38c63 beq x7,x10,80002120 + 8000210c: 00c0946f jal x8,8000b118 + 80002110: 80002100 .word 0x80002100 + 80002114: 00000000 .word 0x00000000 + 80002118: 80015d5d .word 0x80015d5d + 8000211c: 00000000 .word 0x00000000 + 80002120: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000000000002 + 80002124: 000c3203 ld x4,0(x24) + 80002128: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x0000000000000000 + 8000212c: 000c3083 ld x1,0(x24) + 80002130: 008c0c13 addi x24,x24,8 + +0000000080002134 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64dsm x10, x4, x1 # perform operation + 80002134: 3e120533 aes64dsm x10,x4,x1 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002138: 00063383 ld x7,0(x12) + 8000213c: 00a38c63 beq x7,x10,80002154 + 80002140: 7d90846f jal x8,8000b118 + 80002144: 80002134 .word 0x80002134 + 80002148: 00000000 .word 0x00000000 + 8000214c: 80015dba .word 0x80015dba + 80002150: 00000000 .word 0x00000000 + 80002154: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x0000000000000002 + 80002158: 000c3b03 ld x22,0(x24) + 8000215c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x0000000000000001 + 80002160: 000c3983 ld x19,0(x24) + 80002164: 008c0c13 addi x24,x24,8 + +0000000080002168 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64dsm x27, x22, x19 # perform operation + 80002168: 3f3b0db3 aes64dsm x27,x22,x19 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 8000216c: 00063383 ld x7,0(x12) + 80002170: 01b38c63 beq x7,x27,80002188 + 80002174: 7a50846f jal x8,8000b118 + 80002178: 80002168 .word 0x80002168 + 8000217c: 00000000 .word 0x00000000 + 80002180: 80015e0f .word 0x80015e0f + 80002184: 00000000 .word 0x00000000 + 80002188: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x0000000000000002 + 8000218c: 000c3e03 ld x28,0(x24) + 80002190: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000000000002 + 80002194: 000c3d83 ld x27,0(x24) + 80002198: 008c0c13 addi x24,x24,8 + +000000008000219c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64dsm x22, x28, x27 # perform operation + 8000219c: 3fbe0b33 aes64dsm x22,x28,x27 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a0: 00063383 ld x7,0(x12) + 800021a4: 01638c63 beq x7,x22,800021bc + 800021a8: 7710846f jal x8,8000b118 + 800021ac: 8000219c .word 0x8000219c + 800021b0: 00000000 .word 0x00000000 + 800021b4: 80015e64 .word 0x80015e64 + 800021b8: 00000000 .word 0x00000000 + 800021bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000000000002 + 800021c0: 000c3f03 ld x30,0(x24) + 800021c4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x8000000000000000 + 800021c8: 000c3783 ld x15,0(x24) + 800021cc: 008c0c13 addi x24,x24,8 + +00000000800021d0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64dsm x5, x30, x15 # perform operation + 800021d0: 3eff02b3 aes64dsm x5,x30,x15 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d4: 00063383 ld x7,0(x12) + 800021d8: 00538c63 beq x7,x5,800021f0 + 800021dc: 73d0846f jal x8,8000b118 + 800021e0: 800021d0 .word 0x800021d0 + 800021e4: 00000000 .word 0x00000000 + 800021e8: 80015eb9 .word 0x80015eb9 + 800021ec: 00000000 .word 0x00000000 + 800021f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x0000000000000002 + 800021f4: 000c3803 ld x16,0(x24) + 800021f8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x8000000000000001 + 800021fc: 000c3183 ld x3,0(x24) + 80002200: 008c0c13 addi x24,x24,8 + +0000000080002204 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64dsm x9, x16, x3 # perform operation + 80002204: 3e3804b3 aes64dsm x9,x16,x3 + # Check if x9 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x9, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002208: 00063383 ld x7,0(x12) + 8000220c: 00938c63 beq x7,x9,80002224 + 80002210: 7090846f jal x8,8000b118 + 80002214: 80002204 .word 0x80002204 + 80002218: 00000000 .word 0x00000000 + 8000221c: 80015f1d .word 0x80015f1d + 80002220: 00000000 .word 0x00000000 + 80002224: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x0000000000000002 + 80002228: 000c3103 ld x2,0(x24) + 8000222c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x7fffffffffffffff + 80002230: 000c3803 ld x16,0(x24) + 80002234: 008c0c13 addi x24,x24,8 + +0000000080002238 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64dsm x20, x2, x16 # perform operation + 80002238: 3f010a33 aes64dsm x20,x2,x16 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 8000223c: 00063383 ld x7,0(x12) + 80002240: 01438c63 beq x7,x20,80002258 + 80002244: 6d50846f jal x8,8000b118 + 80002248: 80002238 .word 0x80002238 + 8000224c: 00000000 .word 0x00000000 + 80002250: 80015f81 .word 0x80015f81 + 80002254: 00000000 .word 0x00000000 + 80002258: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000000000002 + 8000225c: 000c3f03 ld x30,0(x24) + 80002260: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80002264: 000c3c83 ld x25,0(x24) + 80002268: 008c0c13 addi x24,x24,8 + +000000008000226c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64dsm x28, x30, x25 # perform operation + 8000226c: 3f9f0e33 aes64dsm x28,x30,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002270: 00063383 ld x7,0(x12) + 80002274: 01c38c63 beq x7,x28,8000228c + 80002278: 6a10846f jal x8,8000b118 + 8000227c: 8000226c .word 0x8000226c + 80002280: 00000000 .word 0x00000000 + 80002284: 80015fe5 .word 0x80015fe5 + 80002288: 00000000 .word 0x00000000 + 8000228c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x0000000000000002 + 80002290: 000c3303 ld x6,0(x24) + 80002294: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xffffffffffffffff + 80002298: 000c3503 ld x10,0(x24) + 8000229c: 008c0c13 addi x24,x24,8 + +00000000800022a0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64dsm x19, x6, x10 # perform operation + 800022a0: 3ea309b3 aes64dsm x19,x6,x10 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a4: 00063383 ld x7,0(x12) + 800022a8: 01338c63 beq x7,x19,800022c0 + 800022ac: 66d0846f jal x8,8000b118 + 800022b0: 800022a0 .word 0x800022a0 + 800022b4: 00000000 .word 0x00000000 + 800022b8: 80016049 .word 0x80016049 + 800022bc: 00000000 .word 0x00000000 + 800022c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x0000000000000002 + 800022c4: 000c3a03 ld x20,0(x24) + 800022c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xfffffffffffffffe + 800022cc: 000c3b03 ld x22,0(x24) + 800022d0: 008c0c13 addi x24,x24,8 + +00000000800022d4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64dsm x27, x20, x22 # perform operation + 800022d4: 3f6a0db3 aes64dsm x27,x20,x22 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d8: 00063383 ld x7,0(x12) + 800022dc: 01b38c63 beq x7,x27,800022f4 + 800022e0: 6390846f jal x8,8000b118 + 800022e4: 800022d4 .word 0x800022d4 + 800022e8: 00000000 .word 0x00000000 + 800022ec: 800160ad .word 0x800160ad + 800022f0: 00000000 .word 0x00000000 + 800022f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x0000000000000002 + 800022f8: 000c3703 ld x14,0(x24) + 800022fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 80002300: 000c3a03 ld x20,0(x24) + 80002304: 008c0c13 addi x24,x24,8 + +0000000080002308 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64dsm x21, x14, x20 # perform operation + 80002308: 3f470ab3 aes64dsm x21,x14,x20 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 8000230c: 00063383 ld x7,0(x12) + 80002310: 01538c63 beq x7,x21,80002328 + 80002314: 6050846f jal x8,8000b118 + 80002318: 80002308 .word 0x80002308 + 8000231c: 00000000 .word 0x00000000 + 80002320: 80016111 .word 0x80016111 + 80002324: 00000000 .word 0x00000000 + 80002328: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x0000000000000002 + 8000232c: 000c3f83 ld x31,0(x24) + 80002330: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80002334: 000c3b03 ld x22,0(x24) + 80002338: 008c0c13 addi x24,x24,8 + +000000008000233c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x6, x31, x22 # perform operation + 8000233c: 3f6f8333 aes64dsm x6,x31,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002340: 00063383 ld x7,0(x12) + 80002344: 00638c63 beq x7,x6,8000235c + 80002348: 5d10846f jal x8,8000b118 + 8000234c: 8000233c .word 0x8000233c + 80002350: 00000000 .word 0x00000000 + 80002354: 80016175 .word 0x80016175 + 80002358: 00000000 .word 0x00000000 + 8000235c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0000000000000002 + 80002360: 000c3e83 ld x29,0(x24) + 80002364: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x5555555555555555 + 80002368: 000c3683 ld x13,0(x24) + 8000236c: 008c0c13 addi x24,x24,8 + +0000000080002370 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64dsm x22, x29, x13 # perform operation + 80002370: 3ede8b33 aes64dsm x22,x29,x13 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002374: 00063383 ld x7,0(x12) + 80002378: 01638c63 beq x7,x22,80002390 + 8000237c: 59d0846f jal x8,8000b118 + 80002380: 80002370 .word 0x80002370 + 80002384: 00000000 .word 0x00000000 + 80002388: 800161d9 .word 0x800161d9 + 8000238c: 00000000 .word 0x00000000 + 80002390: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x0000000000000002 + 80002394: 000c3b03 ld x22,0(x24) + 80002398: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x00000000ffffffff + 8000239c: 000c3d83 ld x27,0(x24) + 800023a0: 008c0c13 addi x24,x24,8 + +00000000800023a4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64dsm x1, x22, x27 # perform operation + 800023a4: 3fbb00b3 aes64dsm x1,x22,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a8: 00063383 ld x7,0(x12) + 800023ac: 00138c63 beq x7,x1,800023c4 + 800023b0: 5690846f jal x8,8000b118 + 800023b4: 800023a4 .word 0x800023a4 + 800023b8: 00000000 .word 0x00000000 + 800023bc: 8001623d .word 0x8001623d + 800023c0: 00000000 .word 0x00000000 + 800023c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x0000000000000002 + 800023c8: 000c3283 ld x5,0(x24) + 800023cc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x00000000fffffffe + 800023d0: 000c3e03 ld x28,0(x24) + 800023d4: 008c0c13 addi x24,x24,8 + +00000000800023d8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64dsm x18, x5, x28 # perform operation + 800023d8: 3fc28933 aes64dsm x18,x5,x28 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023dc: 00063383 ld x7,0(x12) + 800023e0: 01238c63 beq x7,x18,800023f8 + 800023e4: 5350846f jal x8,8000b118 + 800023e8: 800023d8 .word 0x800023d8 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 80016299 .word 0x80016299 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x0000000000000002 + 800023fc: 000c3303 ld x6,0(x24) + 80002400: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x0000000100000000 + 80002404: 000c3a03 ld x20,0(x24) + 80002408: 008c0c13 addi x24,x24,8 + +000000008000240c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64dsm x31, x6, x20 # perform operation + 8000240c: 3f430fb3 aes64dsm x31,x6,x20 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002410: 00063383 ld x7,0(x12) + 80002414: 01f38c63 beq x7,x31,8000242c + 80002418: 5010846f jal x8,8000b118 + 8000241c: 8000240c .word 0x8000240c + 80002420: 00000000 .word 0x00000000 + 80002424: 800162f5 .word 0x800162f5 + 80002428: 00000000 .word 0x00000000 + 8000242c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0000000000000002 + 80002430: 000c3e83 ld x29,0(x24) + 80002434: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000100000001 + 80002438: 000c3d03 ld x26,0(x24) + 8000243c: 008c0c13 addi x24,x24,8 + +0000000080002440 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64dsm x23, x29, x26 # perform operation + 80002440: 3fae8bb3 aes64dsm x23,x29,x26 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002444: 00063383 ld x7,0(x12) + 80002448: 01738c63 beq x7,x23,80002460 + 8000244c: 4cd0846f jal x8,8000b118 + 80002450: 80002440 .word 0x80002440 + 80002454: 00000000 .word 0x00000000 + 80002458: 80016352 .word 0x80016352 + 8000245c: 00000000 .word 0x00000000 + 80002460: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x8000000000000000 + 80002464: 000c3903 ld x18,0(x24) + 80002468: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000000000000 + 8000246c: 000c3d03 ld x26,0(x24) + 80002470: 008c0c13 addi x24,x24,8 + +0000000080002474 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64dsm x5, x18, x26 # perform operation + 80002474: 3fa902b3 aes64dsm x5,x18,x26 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002478: 00063383 ld x7,0(x12) + 8000247c: 00538c63 beq x7,x5,80002494 + 80002480: 4990846f jal x8,8000b118 + 80002484: 80002474 .word 0x80002474 + 80002488: 00000000 .word 0x00000000 + 8000248c: 800163af .word 0x800163af + 80002490: 00000000 .word 0x00000000 + 80002494: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000000 + 80002498: 000c3d03 ld x26,0(x24) + 8000249c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000000000001 + 800024a0: 000c3e83 ld x29,0(x24) + 800024a4: 008c0c13 addi x24,x24,8 + +00000000800024a8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64dsm x20, x26, x29 # perform operation + 800024a8: 3fdd0a33 aes64dsm x20,x26,x29 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024ac: 00063383 ld x7,0(x12) + 800024b0: 01438c63 beq x7,x20,800024c8 + 800024b4: 4650846f jal x8,8000b118 + 800024b8: 800024a8 .word 0x800024a8 + 800024bc: 00000000 .word 0x00000000 + 800024c0: 80016413 .word 0x80016413 + 800024c4: 00000000 .word 0x00000000 + 800024c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000000 + 800024cc: 000c3d03 ld x26,0(x24) + 800024d0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x0000000000000002 + 800024d4: 000c3f83 ld x31,0(x24) + 800024d8: 008c0c13 addi x24,x24,8 + +00000000800024dc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64dsm x29, x26, x31 # perform operation + 800024dc: 3ffd0eb3 aes64dsm x29,x26,x31 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e0: 00063383 ld x7,0(x12) + 800024e4: 01d38c63 beq x7,x29,800024fc + 800024e8: 4310846f jal x8,8000b118 + 800024ec: 800024dc .word 0x800024dc + 800024f0: 00000000 .word 0x00000000 + 800024f4: 80016477 .word 0x80016477 + 800024f8: 00000000 .word 0x00000000 + 800024fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x8000000000000000 + 80002500: 000c3e83 ld x29,0(x24) + 80002504: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x8000000000000000 + 80002508: 000c3a83 ld x21,0(x24) + 8000250c: 008c0c13 addi x24,x24,8 + +0000000080002510 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64dsm x15, x29, x21 # perform operation + 80002510: 3f5e87b3 aes64dsm x15,x29,x21 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002514: 00063383 ld x7,0(x12) + 80002518: 00f38c63 beq x7,x15,80002530 + 8000251c: 3fd0846f jal x8,8000b118 + 80002520: 80002510 .word 0x80002510 + 80002524: 00000000 .word 0x00000000 + 80002528: 800164db .word 0x800164db + 8000252c: 00000000 .word 0x00000000 + 80002530: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x8000000000000000 + 80002534: 000c3283 ld x5,0(x24) + 80002538: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x8000000000000001 + 8000253c: 000c3883 ld x17,0(x24) + 80002540: 008c0c13 addi x24,x24,8 + +0000000080002544 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64dsm x13, x5, x17 # perform operation + 80002544: 3f1286b3 aes64dsm x13,x5,x17 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002548: 00063383 ld x7,0(x12) + 8000254c: 00d38c63 beq x7,x13,80002564 + 80002550: 3c90846f jal x8,8000b118 + 80002554: 80002544 .word 0x80002544 + 80002558: 00000000 .word 0x00000000 + 8000255c: 8001654e .word 0x8001654e + 80002560: 00000000 .word 0x00000000 + 80002564: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x8000000000000000 + 80002568: 000c3e03 ld x28,0(x24) + 8000256c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x7fffffffffffffff + 80002570: 000c3f03 ld x30,0(x24) + 80002574: 008c0c13 addi x24,x24,8 + +0000000080002578 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64dsm x26, x28, x30 # perform operation + 80002578: 3fee0d33 aes64dsm x26,x28,x30 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 8000257c: 00063383 ld x7,0(x12) + 80002580: 01a38c63 beq x7,x26,80002598 + 80002584: 3950846f jal x8,8000b118 + 80002588: 80002578 .word 0x80002578 + 8000258c: 00000000 .word 0x00000000 + 80002590: 800165c1 .word 0x800165c1 + 80002594: 00000000 .word 0x00000000 + 80002598: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x8000000000000000 + 8000259c: 000c3683 ld x13,0(x24) + 800025a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x7ffffffffffffffe + 800025a4: 000c3583 ld x11,0(x24) + 800025a8: 008c0c13 addi x24,x24,8 + +00000000800025ac : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64dsm x29, x13, x11 # perform operation + 800025ac: 3eb68eb3 aes64dsm x29,x13,x11 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b0: 00063383 ld x7,0(x12) + 800025b4: 01d38c63 beq x7,x29,800025cc + 800025b8: 3610846f jal x8,8000b118 + 800025bc: 800025ac .word 0x800025ac + 800025c0: 00000000 .word 0x00000000 + 800025c4: 80016634 .word 0x80016634 + 800025c8: 00000000 .word 0x00000000 + 800025cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x8000000000000000 + 800025d0: 000c3883 ld x17,0(x24) + 800025d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xffffffffffffffff + 800025d8: 000c3b03 ld x22,0(x24) + 800025dc: 008c0c13 addi x24,x24,8 + +00000000800025e0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64dsm x16, x17, x22 # perform operation + 800025e0: 3f688833 aes64dsm x16,x17,x22 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e4: 00063383 ld x7,0(x12) + 800025e8: 01038c63 beq x7,x16,80002600 + 800025ec: 32d0846f jal x8,8000b118 + 800025f0: 800025e0 .word 0x800025e0 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 800166a7 .word 0x800166a7 + 800025fc: 00000000 .word 0x00000000 + 80002600: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x8000000000000000 + 80002604: 000c3d83 ld x27,0(x24) + 80002608: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xfffffffffffffffe + 8000260c: 000c3a83 ld x21,0(x24) + 80002610: 008c0c13 addi x24,x24,8 + +0000000080002614 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64dsm x6, x27, x21 # perform operation + 80002614: 3f5d8333 aes64dsm x6,x27,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002618: 00063383 ld x7,0(x12) + 8000261c: 00638c63 beq x7,x6,80002634 + 80002620: 2f90846f jal x8,8000b118 + 80002624: 80002614 .word 0x80002614 + 80002628: 00000000 .word 0x00000000 + 8000262c: 8001671a .word 0x8001671a + 80002630: 00000000 .word 0x00000000 + 80002634: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x8000000000000000 + 80002638: 000c3f03 ld x30,0(x24) + 8000263c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80002640: 000c3803 ld x16,0(x24) + 80002644: 008c0c13 addi x24,x24,8 + +0000000080002648 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64dsm x2, x30, x16 # perform operation + 80002648: 3f0f0133 aes64dsm x2,x30,x16 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 8000264c: 00063383 ld x7,0(x12) + 80002650: 00238c63 beq x7,x2,80002668 + 80002654: 2c50846f jal x8,8000b118 + 80002658: 80002648 .word 0x80002648 + 8000265c: 00000000 .word 0x00000000 + 80002660: 8001678d .word 0x8001678d + 80002664: 00000000 .word 0x00000000 + 80002668: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x8000000000000000 + 8000266c: 000c3783 ld x15,0(x24) + 80002670: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80002674: 000c3b03 ld x22,0(x24) + 80002678: 008c0c13 addi x24,x24,8 + +000000008000267c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x13, x15, x22 # perform operation + 8000267c: 3f6786b3 aes64dsm x13,x15,x22 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002680: 00063383 ld x7,0(x12) + 80002684: 00d38c63 beq x7,x13,8000269c + 80002688: 2910846f jal x8,8000b118 + 8000268c: 8000267c .word 0x8000267c + 80002690: 00000000 .word 0x00000000 + 80002694: 80016800 .word 0x80016800 + 80002698: 00000000 .word 0x00000000 + 8000269c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x8000000000000000 + 800026a0: 000c3703 ld x14,0(x24) + 800026a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x5555555555555555 + 800026a8: 000c3c83 ld x25,0(x24) + 800026ac: 008c0c13 addi x24,x24,8 + +00000000800026b0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64dsm x17, x14, x25 # perform operation + 800026b0: 3f9708b3 aes64dsm x17,x14,x25 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b4: 00063383 ld x7,0(x12) + 800026b8: 01138c63 beq x7,x17,800026d0 + 800026bc: 25d0846f jal x8,8000b118 + 800026c0: 800026b0 .word 0x800026b0 + 800026c4: 00000000 .word 0x00000000 + 800026c8: 80016873 .word 0x80016873 + 800026cc: 00000000 .word 0x00000000 + 800026d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x8000000000000000 + 800026d4: 000c3903 ld x18,0(x24) + 800026d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x00000000ffffffff + 800026dc: 000c3f03 ld x30,0(x24) + 800026e0: 008c0c13 addi x24,x24,8 + +00000000800026e4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64dsm x6, x18, x30 # perform operation + 800026e4: 3fe90333 aes64dsm x6,x18,x30 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e8: 00063383 ld x7,0(x12) + 800026ec: 00638c63 beq x7,x6,80002704 + 800026f0: 2290846f jal x8,8000b118 + 800026f4: 800026e4 .word 0x800026e4 + 800026f8: 00000000 .word 0x00000000 + 800026fc: 800168e6 .word 0x800168e6 + 80002700: 00000000 .word 0x00000000 + 80002704: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x8000000000000000 + 80002708: 000c3803 ld x16,0(x24) + 8000270c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x00000000fffffffe + 80002710: 000c3703 ld x14,0(x24) + 80002714: 008c0c13 addi x24,x24,8 + +0000000080002718 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64dsm x17, x16, x14 # perform operation + 80002718: 3ee808b3 aes64dsm x17,x16,x14 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 8000271c: 00063383 ld x7,0(x12) + 80002720: 01138c63 beq x7,x17,80002738 + 80002724: 1f50846f jal x8,8000b118 + 80002728: 80002718 .word 0x80002718 + 8000272c: 00000000 .word 0x00000000 + 80002730: 80016951 .word 0x80016951 + 80002734: 00000000 .word 0x00000000 + 80002738: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x8000000000000000 + 8000273c: 000c3483 ld x9,0(x24) + 80002740: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0000000100000000 + 80002744: 000c3b83 ld x23,0(x24) + 80002748: 008c0c13 addi x24,x24,8 + +000000008000274c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64dsm x20, x9, x23 # perform operation + 8000274c: 3f748a33 aes64dsm x20,x9,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002750: 00063383 ld x7,0(x12) + 80002754: 01438c63 beq x7,x20,8000276c + 80002758: 1c10846f jal x8,8000b118 + 8000275c: 8000274c .word 0x8000274c + 80002760: 00000000 .word 0x00000000 + 80002764: 800169bc .word 0x800169bc + 80002768: 00000000 .word 0x00000000 + 8000276c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x8000000000000000 + 80002770: 000c3803 ld x16,0(x24) + 80002774: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x0000000100000001 + 80002778: 000c3683 ld x13,0(x24) + 8000277c: 008c0c13 addi x24,x24,8 + +0000000080002780 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64dsm x17, x16, x13 # perform operation + 80002780: 3ed808b3 aes64dsm x17,x16,x13 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002784: 00063383 ld x7,0(x12) + 80002788: 01138c63 beq x7,x17,800027a0 + 8000278c: 18d0846f jal x8,8000b118 + 80002790: 80002780 .word 0x80002780 + 80002794: 00000000 .word 0x00000000 + 80002798: 80016a28 .word 0x80016a28 + 8000279c: 00000000 .word 0x00000000 + 800027a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x8000000000000001 + 800027a4: 000c3d83 ld x27,0(x24) + 800027a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x0000000000000000 + 800027ac: 000c3f03 ld x30,0(x24) + 800027b0: 008c0c13 addi x24,x24,8 + +00000000800027b4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64dsm x3, x27, x30 # perform operation + 800027b4: 3fed81b3 aes64dsm x3,x27,x30 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b8: 00063383 ld x7,0(x12) + 800027bc: 00338c63 beq x7,x3,800027d4 + 800027c0: 1590846f jal x8,8000b118 + 800027c4: 800027b4 .word 0x800027b4 + 800027c8: 00000000 .word 0x00000000 + 800027cc: 80016a94 .word 0x80016a94 + 800027d0: 00000000 .word 0x00000000 + 800027d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x8000000000000001 + 800027d8: 000c3f83 ld x31,0(x24) + 800027dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0000000000000001 + 800027e0: 000c3b83 ld x23,0(x24) + 800027e4: 008c0c13 addi x24,x24,8 + +00000000800027e8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64dsm x28, x31, x23 # perform operation + 800027e8: 3f7f8e33 aes64dsm x28,x31,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027ec: 00063383 ld x7,0(x12) + 800027f0: 01c38c63 beq x7,x28,80002808 + 800027f4: 1250846f jal x8,8000b118 + 800027f8: 800027e8 .word 0x800027e8 + 800027fc: 00000000 .word 0x00000000 + 80002800: 80016af8 .word 0x80016af8 + 80002804: 00000000 .word 0x00000000 + 80002808: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x8000000000000001 + 8000280c: 000c3f03 ld x30,0(x24) + 80002810: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x0000000000000002 + 80002814: 000c3903 ld x18,0(x24) + 80002818: 008c0c13 addi x24,x24,8 + +000000008000281c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64dsm x31, x30, x18 # perform operation + 8000281c: 3f2f0fb3 aes64dsm x31,x30,x18 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002820: 00063383 ld x7,0(x12) + 80002824: 01f38c63 beq x7,x31,8000283c + 80002828: 0f10846f jal x8,8000b118 + 8000282c: 8000281c .word 0x8000281c + 80002830: 00000000 .word 0x00000000 + 80002834: 80016b5c .word 0x80016b5c + 80002838: 00000000 .word 0x00000000 + 8000283c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x8000000000000001 + 80002840: 000c3f83 ld x31,0(x24) + 80002844: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x8000000000000000 + 80002848: 000c3e83 ld x29,0(x24) + 8000284c: 008c0c13 addi x24,x24,8 + +0000000080002850 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64dsm x14, x31, x29 # perform operation + 80002850: 3fdf8733 aes64dsm x14,x31,x29 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002854: 00063383 ld x7,0(x12) + 80002858: 00e38c63 beq x7,x14,80002870 + 8000285c: 0bd0846f jal x8,8000b118 + 80002860: 80002850 .word 0x80002850 + 80002864: 00000000 .word 0x00000000 + 80002868: 80016bc0 .word 0x80016bc0 + 8000286c: 00000000 .word 0x00000000 + 80002870: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x8000000000000001 + 80002874: 000c3f83 ld x31,0(x24) + 80002878: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x8000000000000001 + 8000287c: 000c3303 ld x6,0(x24) + 80002880: 008c0c13 addi x24,x24,8 + +0000000080002884 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64dsm x15, x31, x6 # perform operation + 80002884: 3e6f87b3 aes64dsm x15,x31,x6 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002888: 00063383 ld x7,0(x12) + 8000288c: 00f38c63 beq x7,x15,800028a4 + 80002890: 0890846f jal x8,8000b118 + 80002894: 80002884 .word 0x80002884 + 80002898: 00000000 .word 0x00000000 + 8000289c: 80016c33 .word 0x80016c33 + 800028a0: 00000000 .word 0x00000000 + 800028a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x8000000000000001 + 800028a8: 000c3103 ld x2,0(x24) + 800028ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x7fffffffffffffff + 800028b0: 000c3d83 ld x27,0(x24) + 800028b4: 008c0c13 addi x24,x24,8 + +00000000800028b8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64dsm x22, x2, x27 # perform operation + 800028b8: 3fb10b33 aes64dsm x22,x2,x27 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028bc: 00063383 ld x7,0(x12) + 800028c0: 01638c63 beq x7,x22,800028d8 + 800028c4: 0550846f jal x8,8000b118 + 800028c8: 800028b8 .word 0x800028b8 + 800028cc: 00000000 .word 0x00000000 + 800028d0: 80016ca6 .word 0x80016ca6 + 800028d4: 00000000 .word 0x00000000 + 800028d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000001 + 800028dc: 000c3d03 ld x26,0(x24) + 800028e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x7ffffffffffffffe + 800028e4: 000c3903 ld x18,0(x24) + 800028e8: 008c0c13 addi x24,x24,8 + +00000000800028ec : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64dsm x11, x26, x18 # perform operation + 800028ec: 3f2d05b3 aes64dsm x11,x26,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f0: 00063383 ld x7,0(x12) + 800028f4: 00b38c63 beq x7,x11,8000290c + 800028f8: 0210846f jal x8,8000b118 + 800028fc: 800028ec .word 0x800028ec + 80002900: 00000000 .word 0x00000000 + 80002904: 80016d19 .word 0x80016d19 + 80002908: 00000000 .word 0x00000000 + 8000290c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x8000000000000001 + 80002910: 000c3583 ld x11,0(x24) + 80002914: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xffffffffffffffff + 80002918: 000c3d83 ld x27,0(x24) + 8000291c: 008c0c13 addi x24,x24,8 + +0000000080002920 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64dsm x16, x11, x27 # perform operation + 80002920: 3fb58833 aes64dsm x16,x11,x27 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002924: 00063383 ld x7,0(x12) + 80002928: 01038c63 beq x7,x16,80002940 + 8000292c: 7ec0846f jal x8,8000b118 + 80002930: 80002920 .word 0x80002920 + 80002934: 00000000 .word 0x00000000 + 80002938: 80016d8c .word 0x80016d8c + 8000293c: 00000000 .word 0x00000000 + 80002940: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x8000000000000001 + 80002944: 000c3183 ld x3,0(x24) + 80002948: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xfffffffffffffffe + 8000294c: 000c3a83 ld x21,0(x24) + 80002950: 008c0c13 addi x24,x24,8 + +0000000080002954 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64dsm x23, x3, x21 # perform operation + 80002954: 3f518bb3 aes64dsm x23,x3,x21 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002958: 00063383 ld x7,0(x12) + 8000295c: 01738c63 beq x7,x23,80002974 + 80002960: 7b80846f jal x8,8000b118 + 80002964: 80002954 .word 0x80002954 + 80002968: 00000000 .word 0x00000000 + 8000296c: 80016dff .word 0x80016dff + 80002970: 00000000 .word 0x00000000 + 80002974: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x8000000000000001 + 80002978: 000c3d03 ld x26,0(x24) + 8000297c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80002980: 000c3483 ld x9,0(x24) + 80002984: 008c0c13 addi x24,x24,8 + +0000000080002988 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64dsm x10, x26, x9 # perform operation + 80002988: 3e9d0533 aes64dsm x10,x26,x9 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 8000298c: 00063383 ld x7,0(x12) + 80002990: 00a38c63 beq x7,x10,800029a8 + 80002994: 7840846f jal x8,8000b118 + 80002998: 80002988 .word 0x80002988 + 8000299c: 00000000 .word 0x00000000 + 800029a0: 80016e72 .word 0x80016e72 + 800029a4: 00000000 .word 0x00000000 + 800029a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x8000000000000001 + 800029ac: 000c3303 ld x6,0(x24) + 800029b0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 800029b4: 000c3903 ld x18,0(x24) + 800029b8: 008c0c13 addi x24,x24,8 + +00000000800029bc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x14, x6, x18 # perform operation + 800029bc: 3f230733 aes64dsm x14,x6,x18 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c0: 00063383 ld x7,0(x12) + 800029c4: 00e38c63 beq x7,x14,800029dc + 800029c8: 7500846f jal x8,8000b118 + 800029cc: 800029bc .word 0x800029bc + 800029d0: 00000000 .word 0x00000000 + 800029d4: 80016ee5 .word 0x80016ee5 + 800029d8: 00000000 .word 0x00000000 + 800029dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x8000000000000001 + 800029e0: 000c3303 ld x6,0(x24) + 800029e4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x5555555555555555 + 800029e8: 000c3783 ld x15,0(x24) + 800029ec: 008c0c13 addi x24,x24,8 + +00000000800029f0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64dsm x1, x6, x15 # perform operation + 800029f0: 3ef300b3 aes64dsm x1,x6,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f4: 00063383 ld x7,0(x12) + 800029f8: 00138c63 beq x7,x1,80002a10 + 800029fc: 71c0846f jal x8,8000b118 + 80002a00: 800029f0 .word 0x800029f0 + 80002a04: 00000000 .word 0x00000000 + 80002a08: 80016f58 .word 0x80016f58 + 80002a0c: 00000000 .word 0x00000000 + 80002a10: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x8000000000000001 + 80002a14: 000c3503 ld x10,0(x24) + 80002a18: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x00000000ffffffff + 80002a1c: 000c3e83 ld x29,0(x24) + 80002a20: 008c0c13 addi x24,x24,8 + +0000000080002a24 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64dsm x2, x10, x29 # perform operation + 80002a24: 3fd50133 aes64dsm x2,x10,x29 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a28: 00063383 ld x7,0(x12) + 80002a2c: 00238c63 beq x7,x2,80002a44 + 80002a30: 6e80846f jal x8,8000b118 + 80002a34: 80002a24 .word 0x80002a24 + 80002a38: 00000000 .word 0x00000000 + 80002a3c: 80016fcb .word 0x80016fcb + 80002a40: 00000000 .word 0x00000000 + 80002a44: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x8000000000000001 + 80002a48: 000c3f03 ld x30,0(x24) + 80002a4c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x00000000fffffffe + 80002a50: 000c3b03 ld x22,0(x24) + 80002a54: 008c0c13 addi x24,x24,8 + +0000000080002a58 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64dsm x14, x30, x22 # perform operation + 80002a58: 3f6f0733 aes64dsm x14,x30,x22 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a5c: 00063383 ld x7,0(x12) + 80002a60: 00e38c63 beq x7,x14,80002a78 + 80002a64: 6b40846f jal x8,8000b118 + 80002a68: 80002a58 .word 0x80002a58 + 80002a6c: 00000000 .word 0x00000000 + 80002a70: 80017036 .word 0x80017036 + 80002a74: 00000000 .word 0x00000000 + 80002a78: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x8000000000000001 + 80002a7c: 000c3303 ld x6,0(x24) + 80002a80: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x0000000100000000 + 80002a84: 000c3a03 ld x20,0(x24) + 80002a88: 008c0c13 addi x24,x24,8 + +0000000080002a8c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64dsm x14, x6, x20 # perform operation + 80002a8c: 3f430733 aes64dsm x14,x6,x20 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a90: 00063383 ld x7,0(x12) + 80002a94: 00e38c63 beq x7,x14,80002aac + 80002a98: 6800846f jal x8,8000b118 + 80002a9c: 80002a8c .word 0x80002a8c + 80002aa0: 00000000 .word 0x00000000 + 80002aa4: 800170a1 .word 0x800170a1 + 80002aa8: 00000000 .word 0x00000000 + 80002aac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x8000000000000001 + 80002ab0: 000c3a83 ld x21,0(x24) + 80002ab4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x0000000100000001 + 80002ab8: 000c3e03 ld x28,0(x24) + 80002abc: 008c0c13 addi x24,x24,8 + +0000000080002ac0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64dsm x30, x21, x28 # perform operation + 80002ac0: 3fca8f33 aes64dsm x30,x21,x28 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac4: 00063383 ld x7,0(x12) + 80002ac8: 01e38c63 beq x7,x30,80002ae0 + 80002acc: 64c0846f jal x8,8000b118 + 80002ad0: 80002ac0 .word 0x80002ac0 + 80002ad4: 00000000 .word 0x00000000 + 80002ad8: 8001710d .word 0x8001710d + 80002adc: 00000000 .word 0x00000000 + 80002ae0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002ae4: 000c3483 ld x9,0(x24) + 80002ae8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000000000000 + 80002aec: 000c3783 ld x15,0(x24) + 80002af0: 008c0c13 addi x24,x24,8 + +0000000080002af4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64dsm x26, x9, x15 # perform operation + 80002af4: 3ef48d33 aes64dsm x26,x9,x15 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af8: 00063383 ld x7,0(x12) + 80002afc: 01a38c63 beq x7,x26,80002b14 + 80002b00: 6180846f jal x8,8000b118 + 80002b04: 80002af4 .word 0x80002af4 + 80002b08: 00000000 .word 0x00000000 + 80002b0c: 80017179 .word 0x80017179 + 80002b10: 00000000 .word 0x00000000 + 80002b14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x7fffffffffffffff + 80002b18: 000c3183 ld x3,0(x24) + 80002b1c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x0000000000000001 + 80002b20: 000c3a83 ld x21,0(x24) + 80002b24: 008c0c13 addi x24,x24,8 + +0000000080002b28 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64dsm x16, x3, x21 # perform operation + 80002b28: 3f518833 aes64dsm x16,x3,x21 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b2c: 00063383 ld x7,0(x12) + 80002b30: 01038c63 beq x7,x16,80002b48 + 80002b34: 5e40846f jal x8,8000b118 + 80002b38: 80002b28 .word 0x80002b28 + 80002b3c: 00000000 .word 0x00000000 + 80002b40: 800171dd .word 0x800171dd + 80002b44: 00000000 .word 0x00000000 + 80002b48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002b4c: 000c3a03 ld x20,0(x24) + 80002b50: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x0000000000000002 + 80002b54: 000c3303 ld x6,0(x24) + 80002b58: 008c0c13 addi x24,x24,8 + +0000000080002b5c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64dsm x26, x20, x6 # perform operation + 80002b5c: 3e6a0d33 aes64dsm x26,x20,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b60: 00063383 ld x7,0(x12) + 80002b64: 01a38c63 beq x7,x26,80002b7c + 80002b68: 5b00846f jal x8,8000b118 + 80002b6c: 80002b5c .word 0x80002b5c + 80002b70: 00000000 .word 0x00000000 + 80002b74: 80017241 .word 0x80017241 + 80002b78: 00000000 .word 0x00000000 + 80002b7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002b80: 000c3503 ld x10,0(x24) + 80002b84: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x8000000000000000 + 80002b88: 000c3783 ld x15,0(x24) + 80002b8c: 008c0c13 addi x24,x24,8 + +0000000080002b90 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64dsm x27, x10, x15 # perform operation + 80002b90: 3ef50db3 aes64dsm x27,x10,x15 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b94: 00063383 ld x7,0(x12) + 80002b98: 01b38c63 beq x7,x27,80002bb0 + 80002b9c: 57c0846f jal x8,8000b118 + 80002ba0: 80002b90 .word 0x80002b90 + 80002ba4: 00000000 .word 0x00000000 + 80002ba8: 800172a5 .word 0x800172a5 + 80002bac: 00000000 .word 0x00000000 + 80002bb0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002bb4: 000c3e83 ld x29,0(x24) + 80002bb8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x8000000000000001 + 80002bbc: 000c3a83 ld x21,0(x24) + 80002bc0: 008c0c13 addi x24,x24,8 + +0000000080002bc4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64dsm x11, x29, x21 # perform operation + 80002bc4: 3f5e85b3 aes64dsm x11,x29,x21 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc8: 00063383 ld x7,0(x12) + 80002bcc: 00b38c63 beq x7,x11,80002be4 + 80002bd0: 5480846f jal x8,8000b118 + 80002bd4: 80002bc4 .word 0x80002bc4 + 80002bd8: 00000000 .word 0x00000000 + 80002bdc: 80017318 .word 0x80017318 + 80002be0: 00000000 .word 0x00000000 + 80002be4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002be8: 000c3703 ld x14,0(x24) + 80002bec: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x7fffffffffffffff + 80002bf0: 000c3283 ld x5,0(x24) + 80002bf4: 008c0c13 addi x24,x24,8 + +0000000080002bf8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64dsm x30, x14, x5 # perform operation + 80002bf8: 3e570f33 aes64dsm x30,x14,x5 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bfc: 00063383 ld x7,0(x12) + 80002c00: 01e38c63 beq x7,x30,80002c18 + 80002c04: 5140846f jal x8,8000b118 + 80002c08: 80002bf8 .word 0x80002bf8 + 80002c0c: 00000000 .word 0x00000000 + 80002c10: 8001738b .word 0x8001738b + 80002c14: 00000000 .word 0x00000000 + 80002c18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002c1c: 000c3f83 ld x31,0(x24) + 80002c20: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80002c24: 000c3103 ld x2,0(x24) + 80002c28: 008c0c13 addi x24,x24,8 + +0000000080002c2c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64dsm x3, x31, x2 # perform operation + 80002c2c: 3e2f81b3 aes64dsm x3,x31,x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c30: 00063383 ld x7,0(x12) + 80002c34: 00338c63 beq x7,x3,80002c4c + 80002c38: 4e00846f jal x8,8000b118 + 80002c3c: 80002c2c .word 0x80002c2c + 80002c40: 00000000 .word 0x00000000 + 80002c44: 800173fe .word 0x800173fe + 80002c48: 00000000 .word 0x00000000 + 80002c4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x7fffffffffffffff + 80002c50: 000c3e03 ld x28,0(x24) + 80002c54: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xffffffffffffffff + 80002c58: 000c3183 ld x3,0(x24) + 80002c5c: 008c0c13 addi x24,x24,8 + +0000000080002c60 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64dsm x4, x28, x3 # perform operation + 80002c60: 3e3e0233 aes64dsm x4,x28,x3 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c64: 00063383 ld x7,0(x12) + 80002c68: 00438c63 beq x7,x4,80002c80 + 80002c6c: 4ac0846f jal x8,8000b118 + 80002c70: 80002c60 .word 0x80002c60 + 80002c74: 00000000 .word 0x00000000 + 80002c78: 80017471 .word 0x80017471 + 80002c7c: 00000000 .word 0x00000000 + 80002c80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002c84: 000c3883 ld x17,0(x24) + 80002c88: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xfffffffffffffffe + 80002c8c: 000c3a83 ld x21,0(x24) + 80002c90: 008c0c13 addi x24,x24,8 + +0000000080002c94 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64dsm x13, x17, x21 # perform operation + 80002c94: 3f5886b3 aes64dsm x13,x17,x21 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c98: 00063383 ld x7,0(x12) + 80002c9c: 00d38c63 beq x7,x13,80002cb4 + 80002ca0: 4780846f jal x8,8000b118 + 80002ca4: 80002c94 .word 0x80002c94 + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 800174e4 .word 0x800174e4 + 80002cb0: 00000000 .word 0x00000000 + 80002cb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002cb8: 000c3103 ld x2,0(x24) + 80002cbc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 80002cc0: 000c3d83 ld x27,0(x24) + 80002cc4: 008c0c13 addi x24,x24,8 + +0000000080002cc8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64dsm x22, x2, x27 # perform operation + 80002cc8: 3fb10b33 aes64dsm x22,x2,x27 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002ccc: 00063383 ld x7,0(x12) + 80002cd0: 01638c63 beq x7,x22,80002ce8 + 80002cd4: 4440846f jal x8,8000b118 + 80002cd8: 80002cc8 .word 0x80002cc8 + 80002cdc: 00000000 .word 0x00000000 + 80002ce0: 80017557 .word 0x80017557 + 80002ce4: 00000000 .word 0x00000000 + 80002ce8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002cec: 000c3083 ld x1,0(x24) + 80002cf0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80002cf4: 000c3783 ld x15,0(x24) + 80002cf8: 008c0c13 addi x24,x24,8 + +0000000080002cfc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x27, x1, x15 # perform operation + 80002cfc: 3ef08db3 aes64dsm x27,x1,x15 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d00: 00063383 ld x7,0(x12) + 80002d04: 01b38c63 beq x7,x27,80002d1c + 80002d08: 4100846f jal x8,8000b118 + 80002d0c: 80002cfc .word 0x80002cfc + 80002d10: 00000000 .word 0x00000000 + 80002d14: 800175ca .word 0x800175ca + 80002d18: 00000000 .word 0x00000000 + 80002d1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002d20: 000c3103 ld x2,0(x24) + 80002d24: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x5555555555555555 + 80002d28: 000c3303 ld x6,0(x24) + 80002d2c: 008c0c13 addi x24,x24,8 + +0000000080002d30 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64dsm x18, x2, x6 # perform operation + 80002d30: 3e610933 aes64dsm x18,x2,x6 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d34: 00063383 ld x7,0(x12) + 80002d38: 01238c63 beq x7,x18,80002d50 + 80002d3c: 3dc0846f jal x8,8000b118 + 80002d40: 80002d30 .word 0x80002d30 + 80002d44: 00000000 .word 0x00000000 + 80002d48: 8001763d .word 0x8001763d + 80002d4c: 00000000 .word 0x00000000 + 80002d50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002d54: 000c3e83 ld x29,0(x24) + 80002d58: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x00000000ffffffff + 80002d5c: 000c3783 ld x15,0(x24) + 80002d60: 008c0c13 addi x24,x24,8 + +0000000080002d64 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64dsm x11, x29, x15 # perform operation + 80002d64: 3efe85b3 aes64dsm x11,x29,x15 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d68: 00063383 ld x7,0(x12) + 80002d6c: 00b38c63 beq x7,x11,80002d84 + 80002d70: 3a80846f jal x8,8000b118 + 80002d74: 80002d64 .word 0x80002d64 + 80002d78: 00000000 .word 0x00000000 + 80002d7c: 800176b0 .word 0x800176b0 + 80002d80: 00000000 .word 0x00000000 + 80002d84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002d88: 000c3a03 ld x20,0(x24) + 80002d8c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x00000000fffffffe + 80002d90: 000c3a83 ld x21,0(x24) + 80002d94: 008c0c13 addi x24,x24,8 + +0000000080002d98 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64dsm x14, x20, x21 # perform operation + 80002d98: 3f5a0733 aes64dsm x14,x20,x21 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d9c: 00063383 ld x7,0(x12) + 80002da0: 00e38c63 beq x7,x14,80002db8 + 80002da4: 3740846f jal x8,8000b118 + 80002da8: 80002d98 .word 0x80002d98 + 80002dac: 00000000 .word 0x00000000 + 80002db0: 8001771b .word 0x8001771b + 80002db4: 00000000 .word 0x00000000 + 80002db8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002dbc: 000c3883 ld x17,0(x24) + 80002dc0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x0000000100000000 + 80002dc4: 000c3183 ld x3,0(x24) + 80002dc8: 008c0c13 addi x24,x24,8 + +0000000080002dcc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64dsm x18, x17, x3 # perform operation + 80002dcc: 3e388933 aes64dsm x18,x17,x3 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd0: 00063383 ld x7,0(x12) + 80002dd4: 01238c63 beq x7,x18,80002dec + 80002dd8: 3400846f jal x8,8000b118 + 80002ddc: 80002dcc .word 0x80002dcc + 80002de0: 00000000 .word 0x00000000 + 80002de4: 80017786 .word 0x80017786 + 80002de8: 00000000 .word 0x00000000 + 80002dec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002df0: 000c3e83 ld x29,0(x24) + 80002df4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x0000000100000001 + 80002df8: 000c3203 ld x4,0(x24) + 80002dfc: 008c0c13 addi x24,x24,8 + +0000000080002e00 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64dsm x13, x29, x4 # perform operation + 80002e00: 3e4e86b3 aes64dsm x13,x29,x4 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e04: 00063383 ld x7,0(x12) + 80002e08: 00d38c63 beq x7,x13,80002e20 + 80002e0c: 30c0846f jal x8,8000b118 + 80002e10: 80002e00 .word 0x80002e00 + 80002e14: 00000000 .word 0x00000000 + 80002e18: 800177f2 .word 0x800177f2 + 80002e1c: 00000000 .word 0x00000000 + 80002e20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002e24: 000c3703 ld x14,0(x24) + 80002e28: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000000000000 + 80002e2c: 000c3e83 ld x29,0(x24) + 80002e30: 008c0c13 addi x24,x24,8 + +0000000080002e34 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64dsm x1, x14, x29 # perform operation + 80002e34: 3fd700b3 aes64dsm x1,x14,x29 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e38: 00063383 ld x7,0(x12) + 80002e3c: 00138c63 beq x7,x1,80002e54 + 80002e40: 2d80846f jal x8,8000b118 + 80002e44: 80002e34 .word 0x80002e34 + 80002e48: 00000000 .word 0x00000000 + 80002e4c: 8001785e .word 0x8001785e + 80002e50: 00000000 .word 0x00000000 + 80002e54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002e58: 000c3683 ld x13,0(x24) + 80002e5c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x0000000000000001 + 80002e60: 000c3883 ld x17,0(x24) + 80002e64: 008c0c13 addi x24,x24,8 + +0000000080002e68 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64dsm x20, x13, x17 # perform operation + 80002e68: 3f168a33 aes64dsm x20,x13,x17 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e6c: 00063383 ld x7,0(x12) + 80002e70: 01438c63 beq x7,x20,80002e88 + 80002e74: 2a40846f jal x8,8000b118 + 80002e78: 80002e68 .word 0x80002e68 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 800178c2 .word 0x800178c2 + 80002e84: 00000000 .word 0x00000000 + 80002e88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002e8c: 000c3103 ld x2,0(x24) + 80002e90: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000000000002 + 80002e94: 000c3783 ld x15,0(x24) + 80002e98: 008c0c13 addi x24,x24,8 + +0000000080002e9c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64dsm x29, x2, x15 # perform operation + 80002e9c: 3ef10eb3 aes64dsm x29,x2,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea0: 00063383 ld x7,0(x12) + 80002ea4: 01d38c63 beq x7,x29,80002ebc + 80002ea8: 2700846f jal x8,8000b118 + 80002eac: 80002e9c .word 0x80002e9c + 80002eb0: 00000000 .word 0x00000000 + 80002eb4: 80017926 .word 0x80017926 + 80002eb8: 00000000 .word 0x00000000 + 80002ebc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x7ffffffffffffffe + 80002ec0: 000c3483 ld x9,0(x24) + 80002ec4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x8000000000000000 + 80002ec8: 000c3f83 ld x31,0(x24) + 80002ecc: 008c0c13 addi x24,x24,8 + +0000000080002ed0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64dsm x18, x9, x31 # perform operation + 80002ed0: 3ff48933 aes64dsm x18,x9,x31 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed4: 00063383 ld x7,0(x12) + 80002ed8: 01238c63 beq x7,x18,80002ef0 + 80002edc: 23c0846f jal x8,8000b118 + 80002ee0: 80002ed0 .word 0x80002ed0 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 8001798a .word 0x8001798a + 80002eec: 00000000 .word 0x00000000 + 80002ef0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x7ffffffffffffffe + 80002ef4: 000c3283 ld x5,0(x24) + 80002ef8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x8000000000000001 + 80002efc: 000c3883 ld x17,0(x24) + 80002f00: 008c0c13 addi x24,x24,8 + +0000000080002f04 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64dsm x26, x5, x17 # perform operation + 80002f04: 3f128d33 aes64dsm x26,x5,x17 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f08: 00063383 ld x7,0(x12) + 80002f0c: 01a38c63 beq x7,x26,80002f24 + 80002f10: 2080846f jal x8,8000b118 + 80002f14: 80002f04 .word 0x80002f04 + 80002f18: 00000000 .word 0x00000000 + 80002f1c: 800179fd .word 0x800179fd + 80002f20: 00000000 .word 0x00000000 + 80002f24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f28: 000c3983 ld x19,0(x24) + 80002f2c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002f30: 000c3903 ld x18,0(x24) + 80002f34: 008c0c13 addi x24,x24,8 + +0000000080002f38 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64dsm x20, x19, x18 # perform operation + 80002f38: 3f298a33 aes64dsm x20,x19,x18 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f3c: 00063383 ld x7,0(x12) + 80002f40: 01438c63 beq x7,x20,80002f58 + 80002f44: 1d40846f jal x8,8000b118 + 80002f48: 80002f38 .word 0x80002f38 + 80002f4c: 00000000 .word 0x00000000 + 80002f50: 80017a70 .word 0x80017a70 + 80002f54: 00000000 .word 0x00000000 + 80002f58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002f5c: 000c3683 ld x13,0(x24) + 80002f60: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80002f64: 000c3783 ld x15,0(x24) + 80002f68: 008c0c13 addi x24,x24,8 + +0000000080002f6c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64dsm x29, x13, x15 # perform operation + 80002f6c: 3ef68eb3 aes64dsm x29,x13,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f70: 00063383 ld x7,0(x12) + 80002f74: 01d38c63 beq x7,x29,80002f8c + 80002f78: 1a00846f jal x8,8000b118 + 80002f7c: 80002f6c .word 0x80002f6c + 80002f80: 00000000 .word 0x00000000 + 80002f84: 80017ae3 .word 0x80017ae3 + 80002f88: 00000000 .word 0x00000000 + 80002f8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002f90: 000c3583 ld x11,0(x24) + 80002f94: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xffffffffffffffff + 80002f98: 000c3303 ld x6,0(x24) + 80002f9c: 008c0c13 addi x24,x24,8 + +0000000080002fa0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64dsm x29, x11, x6 # perform operation + 80002fa0: 3e658eb3 aes64dsm x29,x11,x6 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa4: 00063383 ld x7,0(x12) + 80002fa8: 01d38c63 beq x7,x29,80002fc0 + 80002fac: 16c0846f jal x8,8000b118 + 80002fb0: 80002fa0 .word 0x80002fa0 + 80002fb4: 00000000 .word 0x00000000 + 80002fb8: 80017b56 .word 0x80017b56 + 80002fbc: 00000000 .word 0x00000000 + 80002fc0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x7ffffffffffffffe + 80002fc4: 000c3283 ld x5,0(x24) + 80002fc8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0xfffffffffffffffe + 80002fcc: 000c3c83 ld x25,0(x24) + 80002fd0: 008c0c13 addi x24,x24,8 + +0000000080002fd4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64dsm x31, x5, x25 # perform operation + 80002fd4: 3f928fb3 aes64dsm x31,x5,x25 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd8: 00063383 ld x7,0(x12) + 80002fdc: 01f38c63 beq x7,x31,80002ff4 + 80002fe0: 1380846f jal x8,8000b118 + 80002fe4: 80002fd4 .word 0x80002fd4 + 80002fe8: 00000000 .word 0x00000000 + 80002fec: 80017bc9 .word 0x80017bc9 + 80002ff0: 00000000 .word 0x00000000 + 80002ff4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x7ffffffffffffffe + 80002ff8: 000c3483 ld x9,0(x24) + 80002ffc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80003000: 000c3183 ld x3,0(x24) + 80003004: 008c0c13 addi x24,x24,8 + +0000000080003008 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64dsm x10, x9, x3 # perform operation + 80003008: 3e348533 aes64dsm x10,x9,x3 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000300c: 00063383 ld x7,0(x12) + 80003010: 00a38c63 beq x7,x10,80003028 + 80003014: 1040846f jal x8,8000b118 + 80003018: 80003008 .word 0x80003008 + 8000301c: 00000000 .word 0x00000000 + 80003020: 80017c3c .word 0x80017c3c + 80003024: 00000000 .word 0x00000000 + 80003028: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x7ffffffffffffffe + 8000302c: 000c3183 ld x3,0(x24) + 80003030: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80003034: 000c3583 ld x11,0(x24) + 80003038: 008c0c13 addi x24,x24,8 + +000000008000303c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x26, x3, x11 # perform operation + 8000303c: 3eb18d33 aes64dsm x26,x3,x11 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003040: 00063383 ld x7,0(x12) + 80003044: 01a38c63 beq x7,x26,8000305c + 80003048: 0d00846f jal x8,8000b118 + 8000304c: 8000303c .word 0x8000303c + 80003050: 00000000 .word 0x00000000 + 80003054: 80017caf .word 0x80017caf + 80003058: 00000000 .word 0x00000000 + 8000305c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80003060: 000c3b83 ld x23,0(x24) + 80003064: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x5555555555555555 + 80003068: 000c3f03 ld x30,0(x24) + 8000306c: 008c0c13 addi x24,x24,8 + +0000000080003070 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64dsm x4, x23, x30 # perform operation + 80003070: 3feb8233 aes64dsm x4,x23,x30 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003074: 00063383 ld x7,0(x12) + 80003078: 00438c63 beq x7,x4,80003090 + 8000307c: 09c0846f jal x8,8000b118 + 80003080: 80003070 .word 0x80003070 + 80003084: 00000000 .word 0x00000000 + 80003088: 80017d22 .word 0x80017d22 + 8000308c: 00000000 .word 0x00000000 + 80003090: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80003094: 000c3583 ld x11,0(x24) + 80003098: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x00000000ffffffff + 8000309c: 000c3283 ld x5,0(x24) + 800030a0: 008c0c13 addi x24,x24,8 + +00000000800030a4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64dsm x4, x11, x5 # perform operation + 800030a4: 3e558233 aes64dsm x4,x11,x5 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a8: 00063383 ld x7,0(x12) + 800030ac: 00438c63 beq x7,x4,800030c4 + 800030b0: 0680846f jal x8,8000b118 + 800030b4: 800030a4 .word 0x800030a4 + 800030b8: 00000000 .word 0x00000000 + 800030bc: 80017d95 .word 0x80017d95 + 800030c0: 00000000 .word 0x00000000 + 800030c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030c8: 000c3683 ld x13,0(x24) + 800030cc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x00000000fffffffe + 800030d0: 000c3083 ld x1,0(x24) + 800030d4: 008c0c13 addi x24,x24,8 + +00000000800030d8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64dsm x2, x13, x1 # perform operation + 800030d8: 3e168133 aes64dsm x2,x13,x1 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030dc: 00063383 ld x7,0(x12) + 800030e0: 00238c63 beq x7,x2,800030f8 + 800030e4: 0340846f jal x8,8000b118 + 800030e8: 800030d8 .word 0x800030d8 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 80017e00 .word 0x80017e00 + 800030f4: 00000000 .word 0x00000000 + 800030f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x7ffffffffffffffe + 800030fc: 000c3a83 ld x21,0(x24) + 80003100: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000100000000 + 80003104: 000c3d83 ld x27,0(x24) + 80003108: 008c0c13 addi x24,x24,8 + +000000008000310c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64dsm x18, x21, x27 # perform operation + 8000310c: 3fba8933 aes64dsm x18,x21,x27 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003110: 00063383 ld x7,0(x12) + 80003114: 01238c63 beq x7,x18,8000312c + 80003118: 0000846f jal x8,8000b118 + 8000311c: 8000310c .word 0x8000310c + 80003120: 00000000 .word 0x00000000 + 80003124: 80017e6b .word 0x80017e6b + 80003128: 00000000 .word 0x00000000 + 8000312c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80003130: 000c3203 ld x4,0(x24) + 80003134: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000100000001 + 80003138: 000c3783 ld x15,0(x24) + 8000313c: 008c0c13 addi x24,x24,8 + +0000000080003140 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64dsm x13, x4, x15 # perform operation + 80003140: 3ef206b3 aes64dsm x13,x4,x15 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003144: 00063383 ld x7,0(x12) + 80003148: 00d38c63 beq x7,x13,80003160 + 8000314c: 7cd0746f jal x8,8000b118 + 80003150: 80003140 .word 0x80003140 + 80003154: 00000000 .word 0x00000000 + 80003158: 80017ed7 .word 0x80017ed7 + 8000315c: 00000000 .word 0x00000000 + 80003160: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xffffffffffffffff + 80003164: 000c3203 ld x4,0(x24) + 80003168: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000000000000 + 8000316c: 000c3e83 ld x29,0(x24) + 80003170: 008c0c13 addi x24,x24,8 + +0000000080003174 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64dsm x16, x4, x29 # perform operation + 80003174: 3fd20833 aes64dsm x16,x4,x29 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003178: 00063383 ld x7,0(x12) + 8000317c: 01038c63 beq x7,x16,80003194 + 80003180: 7990746f jal x8,8000b118 + 80003184: 80003174 .word 0x80003174 + 80003188: 00000000 .word 0x00000000 + 8000318c: 80017f43 .word 0x80017f43 + 80003190: 00000000 .word 0x00000000 + 80003194: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xffffffffffffffff + 80003198: 000c3203 ld x4,0(x24) + 8000319c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0000000000000001 + 800031a0: 000c3283 ld x5,0(x24) + 800031a4: 008c0c13 addi x24,x24,8 + +00000000800031a8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64dsm x18, x4, x5 # perform operation + 800031a8: 3e520933 aes64dsm x18,x4,x5 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031ac: 00063383 ld x7,0(x12) + 800031b0: 01238c63 beq x7,x18,800031c8 + 800031b4: 7650746f jal x8,8000b118 + 800031b8: 800031a8 .word 0x800031a8 + 800031bc: 00000000 .word 0x00000000 + 800031c0: 80017fa7 .word 0x80017fa7 + 800031c4: 00000000 .word 0x00000000 + 800031c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xffffffffffffffff + 800031cc: 000c3e83 ld x29,0(x24) + 800031d0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x0000000000000002 + 800031d4: 000c3683 ld x13,0(x24) + 800031d8: 008c0c13 addi x24,x24,8 + +00000000800031dc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64dsm x9, x29, x13 # perform operation + 800031dc: 3ede84b3 aes64dsm x9,x29,x13 + # Check if x9 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x9, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e0: 00063383 ld x7,0(x12) + 800031e4: 00938c63 beq x7,x9,800031fc + 800031e8: 7310746f jal x8,8000b118 + 800031ec: 800031dc .word 0x800031dc + 800031f0: 00000000 .word 0x00000000 + 800031f4: 8001800b .word 0x8001800b + 800031f8: 00000000 .word 0x00000000 + 800031fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xffffffffffffffff + 80003200: 000c3883 ld x17,0(x24) + 80003204: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x8000000000000000 + 80003208: 000c3283 ld x5,0(x24) + 8000320c: 008c0c13 addi x24,x24,8 + +0000000080003210 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64dsm x4, x17, x5 # perform operation + 80003210: 3e588233 aes64dsm x4,x17,x5 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003214: 00063383 ld x7,0(x12) + 80003218: 00438c63 beq x7,x4,80003230 + 8000321c: 6fd0746f jal x8,8000b118 + 80003220: 80003210 .word 0x80003210 + 80003224: 00000000 .word 0x00000000 + 80003228: 8001806f .word 0x8001806f + 8000322c: 00000000 .word 0x00000000 + 80003230: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xffffffffffffffff + 80003234: 000c3203 ld x4,0(x24) + 80003238: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x8000000000000001 + 8000323c: 000c3e83 ld x29,0(x24) + 80003240: 008c0c13 addi x24,x24,8 + +0000000080003244 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64dsm x20, x4, x29 # perform operation + 80003244: 3fd20a33 aes64dsm x20,x4,x29 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003248: 00063383 ld x7,0(x12) + 8000324c: 01438c63 beq x7,x20,80003264 + 80003250: 6c90746f jal x8,8000b118 + 80003254: 80003244 .word 0x80003244 + 80003258: 00000000 .word 0x00000000 + 8000325c: 800180e2 .word 0x800180e2 + 80003260: 00000000 .word 0x00000000 + 80003264: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xffffffffffffffff + 80003268: 000c3e83 ld x29,0(x24) + 8000326c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x7fffffffffffffff + 80003270: 000c3c83 ld x25,0(x24) + 80003274: 008c0c13 addi x24,x24,8 + +0000000080003278 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64dsm x6, x29, x25 # perform operation + 80003278: 3f9e8333 aes64dsm x6,x29,x25 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 8000327c: 00063383 ld x7,0(x12) + 80003280: 00638c63 beq x7,x6,80003298 + 80003284: 6950746f jal x8,8000b118 + 80003288: 80003278 .word 0x80003278 + 8000328c: 00000000 .word 0x00000000 + 80003290: 80018155 .word 0x80018155 + 80003294: 00000000 .word 0x00000000 + 80003298: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xffffffffffffffff + 8000329c: 000c3303 ld x6,0(x24) + 800032a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800032a4: 000c3b83 ld x23,0(x24) + 800032a8: 008c0c13 addi x24,x24,8 + +00000000800032ac : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64dsm x18, x6, x23 # perform operation + 800032ac: 3f730933 aes64dsm x18,x6,x23 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b0: 00063383 ld x7,0(x12) + 800032b4: 01238c63 beq x7,x18,800032cc + 800032b8: 6610746f jal x8,8000b118 + 800032bc: 800032ac .word 0x800032ac + 800032c0: 00000000 .word 0x00000000 + 800032c4: 800181c8 .word 0x800181c8 + 800032c8: 00000000 .word 0x00000000 + 800032cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xffffffffffffffff + 800032d0: 000c3903 ld x18,0(x24) + 800032d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xffffffffffffffff + 800032d8: 000c3783 ld x15,0(x24) + 800032dc: 008c0c13 addi x24,x24,8 + +00000000800032e0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64dsm x21, x18, x15 # perform operation + 800032e0: 3ef90ab3 aes64dsm x21,x18,x15 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e4: 00063383 ld x7,0(x12) + 800032e8: 01538c63 beq x7,x21,80003300 + 800032ec: 62d0746f jal x8,8000b118 + 800032f0: 800032e0 .word 0x800032e0 + 800032f4: 00000000 .word 0x00000000 + 800032f8: 8001823b .word 0x8001823b + 800032fc: 00000000 .word 0x00000000 + 80003300: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xffffffffffffffff + 80003304: 000c3f83 ld x31,0(x24) + 80003308: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xfffffffffffffffe + 8000330c: 000c3983 ld x19,0(x24) + 80003310: 008c0c13 addi x24,x24,8 + +0000000080003314 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64dsm x13, x31, x19 # perform operation + 80003314: 3f3f86b3 aes64dsm x13,x31,x19 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003318: 00063383 ld x7,0(x12) + 8000331c: 00d38c63 beq x7,x13,80003334 + 80003320: 5f90746f jal x8,8000b118 + 80003324: 80003314 .word 0x80003314 + 80003328: 00000000 .word 0x00000000 + 8000332c: 800182ae .word 0x800182ae + 80003330: 00000000 .word 0x00000000 + 80003334: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xffffffffffffffff + 80003338: 000c3a03 ld x20,0(x24) + 8000333c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x5bbc887763ae86f2 + 80003340: 000c3503 ld x10,0(x24) + 80003344: 008c0c13 addi x24,x24,8 + +0000000080003348 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64dsm x28, x20, x10 # perform operation + 80003348: 3eaa0e33 aes64dsm x28,x20,x10 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000334c: 00063383 ld x7,0(x12) + 80003350: 01c38c63 beq x7,x28,80003368 + 80003354: 5c50746f jal x8,8000b118 + 80003358: 80003348 .word 0x80003348 + 8000335c: 00000000 .word 0x00000000 + 80003360: 80018321 .word 0x80018321 + 80003364: 00000000 .word 0x00000000 + 80003368: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xffffffffffffffff + 8000336c: 000c3d83 ld x27,0(x24) + 80003370: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80003374: 000c3a03 ld x20,0(x24) + 80003378: 008c0c13 addi x24,x24,8 + +000000008000337c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x13, x27, x20 # perform operation + 8000337c: 3f4d86b3 aes64dsm x13,x27,x20 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003380: 00063383 ld x7,0(x12) + 80003384: 00d38c63 beq x7,x13,8000339c + 80003388: 5910746f jal x8,8000b118 + 8000338c: 8000337c .word 0x8000337c + 80003390: 00000000 .word 0x00000000 + 80003394: 80018394 .word 0x80018394 + 80003398: 00000000 .word 0x00000000 + 8000339c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xffffffffffffffff + 800033a0: 000c3983 ld x19,0(x24) + 800033a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x5555555555555555 + 800033a8: 000c3d83 ld x27,0(x24) + 800033ac: 008c0c13 addi x24,x24,8 + +00000000800033b0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64dsm x5, x19, x27 # perform operation + 800033b0: 3fb982b3 aes64dsm x5,x19,x27 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b4: 00063383 ld x7,0(x12) + 800033b8: 00538c63 beq x7,x5,800033d0 + 800033bc: 55d0746f jal x8,8000b118 + 800033c0: 800033b0 .word 0x800033b0 + 800033c4: 00000000 .word 0x00000000 + 800033c8: 80018407 .word 0x80018407 + 800033cc: 00000000 .word 0x00000000 + 800033d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xffffffffffffffff + 800033d4: 000c3203 ld x4,0(x24) + 800033d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x00000000ffffffff + 800033dc: 000c3d03 ld x26,0(x24) + 800033e0: 008c0c13 addi x24,x24,8 + +00000000800033e4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64dsm x16, x4, x26 # perform operation + 800033e4: 3fa20833 aes64dsm x16,x4,x26 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e8: 00063383 ld x7,0(x12) + 800033ec: 01038c63 beq x7,x16,80003404 + 800033f0: 5290746f jal x8,8000b118 + 800033f4: 800033e4 .word 0x800033e4 + 800033f8: 00000000 .word 0x00000000 + 800033fc: 8001847a .word 0x8001847a + 80003400: 00000000 .word 0x00000000 + 80003404: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xffffffffffffffff + 80003408: 000c3983 ld x19,0(x24) + 8000340c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x00000000fffffffe + 80003410: 000c3783 ld x15,0(x24) + 80003414: 008c0c13 addi x24,x24,8 + +0000000080003418 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64dsm x20, x19, x15 # perform operation + 80003418: 3ef98a33 aes64dsm x20,x19,x15 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 8000341c: 00063383 ld x7,0(x12) + 80003420: 01438c63 beq x7,x20,80003438 + 80003424: 4f50746f jal x8,8000b118 + 80003428: 80003418 .word 0x80003418 + 8000342c: 00000000 .word 0x00000000 + 80003430: 800184e5 .word 0x800184e5 + 80003434: 00000000 .word 0x00000000 + 80003438: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xffffffffffffffff + 8000343c: 000c3903 ld x18,0(x24) + 80003440: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000100000000 + 80003444: 000c3e83 ld x29,0(x24) + 80003448: 008c0c13 addi x24,x24,8 + +000000008000344c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64dsm x4, x18, x29 # perform operation + 8000344c: 3fd90233 aes64dsm x4,x18,x29 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003450: 00063383 ld x7,0(x12) + 80003454: 00438c63 beq x7,x4,8000346c + 80003458: 4c10746f jal x8,8000b118 + 8000345c: 8000344c .word 0x8000344c + 80003460: 00000000 .word 0x00000000 + 80003464: 80018550 .word 0x80018550 + 80003468: 00000000 .word 0x00000000 + 8000346c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xffffffffffffffff + 80003470: 000c3e83 ld x29,0(x24) + 80003474: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000100000001 + 80003478: 000c3d03 ld x26,0(x24) + 8000347c: 008c0c13 addi x24,x24,8 + +0000000080003480 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64dsm x13, x29, x26 # perform operation + 80003480: 3fae86b3 aes64dsm x13,x29,x26 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003484: 00063383 ld x7,0(x12) + 80003488: 00d38c63 beq x7,x13,800034a0 + 8000348c: 48d0746f jal x8,8000b118 + 80003490: 80003480 .word 0x80003480 + 80003494: 00000000 .word 0x00000000 + 80003498: 800185bc .word 0x800185bc + 8000349c: 00000000 .word 0x00000000 + 800034a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xfffffffffffffffe + 800034a4: 000c3703 ld x14,0(x24) + 800034a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0000000000000000 + 800034ac: 000c3483 ld x9,0(x24) + 800034b0: 008c0c13 addi x24,x24,8 + +00000000800034b4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64dsm x27, x14, x9 # perform operation + 800034b4: 3e970db3 aes64dsm x27,x14,x9 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b8: 00063383 ld x7,0(x12) + 800034bc: 01b38c63 beq x7,x27,800034d4 + 800034c0: 4590746f jal x8,8000b118 + 800034c4: 800034b4 .word 0x800034b4 + 800034c8: 00000000 .word 0x00000000 + 800034cc: 80018628 .word 0x80018628 + 800034d0: 00000000 .word 0x00000000 + 800034d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xfffffffffffffffe + 800034d8: 000c3f83 ld x31,0(x24) + 800034dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x0000000000000001 + 800034e0: 000c3c83 ld x25,0(x24) + 800034e4: 008c0c13 addi x24,x24,8 + +00000000800034e8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64dsm x23, x31, x25 # perform operation + 800034e8: 3f9f8bb3 aes64dsm x23,x31,x25 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034ec: 00063383 ld x7,0(x12) + 800034f0: 01738c63 beq x7,x23,80003508 + 800034f4: 4250746f jal x8,8000b118 + 800034f8: 800034e8 .word 0x800034e8 + 800034fc: 00000000 .word 0x00000000 + 80003500: 8001868c .word 0x8001868c + 80003504: 00000000 .word 0x00000000 + 80003508: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xfffffffffffffffe + 8000350c: 000c3d83 ld x27,0(x24) + 80003510: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000000000002 + 80003514: 000c3783 ld x15,0(x24) + 80003518: 008c0c13 addi x24,x24,8 + +000000008000351c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64dsm x28, x27, x15 # perform operation + 8000351c: 3efd8e33 aes64dsm x28,x27,x15 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003520: 00063383 ld x7,0(x12) + 80003524: 01c38c63 beq x7,x28,8000353c + 80003528: 3f10746f jal x8,8000b118 + 8000352c: 8000351c .word 0x8000351c + 80003530: 00000000 .word 0x00000000 + 80003534: 800186f0 .word 0x800186f0 + 80003538: 00000000 .word 0x00000000 + 8000353c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003540: 000c3d83 ld x27,0(x24) + 80003544: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x8000000000000000 + 80003548: 000c3a03 ld x20,0(x24) + 8000354c: 008c0c13 addi x24,x24,8 + +0000000080003550 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64dsm x31, x27, x20 # perform operation + 80003550: 3f4d8fb3 aes64dsm x31,x27,x20 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003554: 00063383 ld x7,0(x12) + 80003558: 01f38c63 beq x7,x31,80003570 + 8000355c: 3bd0746f jal x8,8000b118 + 80003560: 80003550 .word 0x80003550 + 80003564: 00000000 .word 0x00000000 + 80003568: 80018754 .word 0x80018754 + 8000356c: 00000000 .word 0x00000000 + 80003570: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xfffffffffffffffe + 80003574: 000c3883 ld x17,0(x24) + 80003578: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x8000000000000001 + 8000357c: 000c3183 ld x3,0(x24) + 80003580: 008c0c13 addi x24,x24,8 + +0000000080003584 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64dsm x27, x17, x3 # perform operation + 80003584: 3e388db3 aes64dsm x27,x17,x3 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003588: 00063383 ld x7,0(x12) + 8000358c: 01b38c63 beq x7,x27,800035a4 + 80003590: 3890746f jal x8,8000b118 + 80003594: 80003584 .word 0x80003584 + 80003598: 00000000 .word 0x00000000 + 8000359c: 800187c7 .word 0x800187c7 + 800035a0: 00000000 .word 0x00000000 + 800035a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0xfffffffffffffffe + 800035a8: 000c3083 ld x1,0(x24) + 800035ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x7fffffffffffffff + 800035b0: 000c3803 ld x16,0(x24) + 800035b4: 008c0c13 addi x24,x24,8 + +00000000800035b8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64dsm x10, x1, x16 # perform operation + 800035b8: 3f008533 aes64dsm x10,x1,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035bc: 00063383 ld x7,0(x12) + 800035c0: 00a38c63 beq x7,x10,800035d8 + 800035c4: 3550746f jal x8,8000b118 + 800035c8: 800035b8 .word 0x800035b8 + 800035cc: 00000000 .word 0x00000000 + 800035d0: 8001883a .word 0x8001883a + 800035d4: 00000000 .word 0x00000000 + 800035d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xfffffffffffffffe + 800035dc: 000c3583 ld x11,0(x24) + 800035e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800035e4: 000c3683 ld x13,0(x24) + 800035e8: 008c0c13 addi x24,x24,8 + +00000000800035ec : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64dsm x10, x11, x13 # perform operation + 800035ec: 3ed58533 aes64dsm x10,x11,x13 + # Check if x10 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x10, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f0: 00063383 ld x7,0(x12) + 800035f4: 00a38c63 beq x7,x10,8000360c + 800035f8: 3210746f jal x8,8000b118 + 800035fc: 800035ec .word 0x800035ec + 80003600: 00000000 .word 0x00000000 + 80003604: 800188ad .word 0x800188ad + 80003608: 00000000 .word 0x00000000 + 8000360c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xfffffffffffffffe + 80003610: 000c3783 ld x15,0(x24) + 80003614: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xffffffffffffffff + 80003618: 000c3803 ld x16,0(x24) + 8000361c: 008c0c13 addi x24,x24,8 + +0000000080003620 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64dsm x13, x15, x16 # perform operation + 80003620: 3f0786b3 aes64dsm x13,x15,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003624: 00063383 ld x7,0(x12) + 80003628: 00d38c63 beq x7,x13,80003640 + 8000362c: 2ed0746f jal x8,8000b118 + 80003630: 80003620 .word 0x80003620 + 80003634: 00000000 .word 0x00000000 + 80003638: 80018920 .word 0x80018920 + 8000363c: 00000000 .word 0x00000000 + 80003640: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003644: 000c3b03 ld x22,0(x24) + 80003648: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0xfffffffffffffffe + 8000364c: 000c3203 ld x4,0(x24) + 80003650: 008c0c13 addi x24,x24,8 + +0000000080003654 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64dsm x25, x22, x4 # perform operation + 80003654: 3e4b0cb3 aes64dsm x25,x22,x4 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003658: 00063383 ld x7,0(x12) + 8000365c: 01938c63 beq x7,x25,80003674 + 80003660: 2b90746f jal x8,8000b118 + 80003664: 80003654 .word 0x80003654 + 80003668: 00000000 .word 0x00000000 + 8000366c: 80018993 .word 0x80018993 + 80003670: 00000000 .word 0x00000000 + 80003674: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xfffffffffffffffe + 80003678: 000c3103 ld x2,0(x24) + 8000367c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80003680: 000c3303 ld x6,0(x24) + 80003684: 008c0c13 addi x24,x24,8 + +0000000080003688 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64dsm x29, x2, x6 # perform operation + 80003688: 3e610eb3 aes64dsm x29,x2,x6 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000368c: 00063383 ld x7,0(x12) + 80003690: 01d38c63 beq x7,x29,800036a8 + 80003694: 2850746f jal x8,8000b118 + 80003698: 80003688 .word 0x80003688 + 8000369c: 00000000 .word 0x00000000 + 800036a0: 80018a06 .word 0x80018a06 + 800036a4: 00000000 .word 0x00000000 + 800036a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xfffffffffffffffe + 800036ac: 000c3203 ld x4,0(x24) + 800036b0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 800036b4: 000c3d83 ld x27,0(x24) + 800036b8: 008c0c13 addi x24,x24,8 + +00000000800036bc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x1, x4, x27 # perform operation + 800036bc: 3fb200b3 aes64dsm x1,x4,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c0: 00063383 ld x7,0(x12) + 800036c4: 00138c63 beq x7,x1,800036dc + 800036c8: 2510746f jal x8,8000b118 + 800036cc: 800036bc .word 0x800036bc + 800036d0: 00000000 .word 0x00000000 + 800036d4: 80018a79 .word 0x80018a79 + 800036d8: 00000000 .word 0x00000000 + 800036dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0xfffffffffffffffe + 800036e0: 000c3903 ld x18,0(x24) + 800036e4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x5555555555555555 + 800036e8: 000c3803 ld x16,0(x24) + 800036ec: 008c0c13 addi x24,x24,8 + +00000000800036f0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64dsm x22, x18, x16 # perform operation + 800036f0: 3f090b33 aes64dsm x22,x18,x16 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f4: 00063383 ld x7,0(x12) + 800036f8: 01638c63 beq x7,x22,80003710 + 800036fc: 21d0746f jal x8,8000b118 + 80003700: 800036f0 .word 0x800036f0 + 80003704: 00000000 .word 0x00000000 + 80003708: 80018aec .word 0x80018aec + 8000370c: 00000000 .word 0x00000000 + 80003710: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xfffffffffffffffe + 80003714: 000c3783 ld x15,0(x24) + 80003718: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x00000000ffffffff + 8000371c: 000c3683 ld x13,0(x24) + 80003720: 008c0c13 addi x24,x24,8 + +0000000080003724 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64dsm x18, x15, x13 # perform operation + 80003724: 3ed78933 aes64dsm x18,x15,x13 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003728: 00063383 ld x7,0(x12) + 8000372c: 01238c63 beq x7,x18,80003744 + 80003730: 1e90746f jal x8,8000b118 + 80003734: 80003724 .word 0x80003724 + 80003738: 00000000 .word 0x00000000 + 8000373c: 80018b5f .word 0x80018b5f + 80003740: 00000000 .word 0x00000000 + 80003744: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0xfffffffffffffffe + 80003748: 000c3283 ld x5,0(x24) + 8000374c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x00000000fffffffe + 80003750: 000c3a83 ld x21,0(x24) + 80003754: 008c0c13 addi x24,x24,8 + +0000000080003758 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64dsm x6, x5, x21 # perform operation + 80003758: 3f528333 aes64dsm x6,x5,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 8000375c: 00063383 ld x7,0(x12) + 80003760: 00638c63 beq x7,x6,80003778 + 80003764: 1b50746f jal x8,8000b118 + 80003768: 80003758 .word 0x80003758 + 8000376c: 00000000 .word 0x00000000 + 80003770: 80018bca .word 0x80018bca + 80003774: 00000000 .word 0x00000000 + 80003778: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xfffffffffffffffe + 8000377c: 000c3583 ld x11,0(x24) + 80003780: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x0000000100000000 + 80003784: 000c3303 ld x6,0(x24) + 80003788: 008c0c13 addi x24,x24,8 + +000000008000378c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64dsm x16, x11, x6 # perform operation + 8000378c: 3e658833 aes64dsm x16,x11,x6 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003790: 00063383 ld x7,0(x12) + 80003794: 01038c63 beq x7,x16,800037ac + 80003798: 1810746f jal x8,8000b118 + 8000379c: 8000378c .word 0x8000378c + 800037a0: 00000000 .word 0x00000000 + 800037a4: 80018c35 .word 0x80018c35 + 800037a8: 00000000 .word 0x00000000 + 800037ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xfffffffffffffffe + 800037b0: 000c3e83 ld x29,0(x24) + 800037b4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000100000001 + 800037b8: 000c3d03 ld x26,0(x24) + 800037bc: 008c0c13 addi x24,x24,8 + +00000000800037c0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64dsm x5, x29, x26 # perform operation + 800037c0: 3fae82b3 aes64dsm x5,x29,x26 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c4: 00063383 ld x7,0(x12) + 800037c8: 00538c63 beq x7,x5,800037e0 + 800037cc: 14d0746f jal x8,8000b118 + 800037d0: 800037c0 .word 0x800037c0 + 800037d4: 00000000 .word 0x00000000 + 800037d8: 80018ca1 .word 0x80018ca1 + 800037dc: 00000000 .word 0x00000000 + 800037e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 800037e4: 000c3183 ld x3,0(x24) + 800037e8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x0000000000000000 + 800037ec: 000c3a03 ld x20,0(x24) + 800037f0: 008c0c13 addi x24,x24,8 + +00000000800037f4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64dsm x21, x3, x20 # perform operation + 800037f4: 3f418ab3 aes64dsm x21,x3,x20 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f8: 00063383 ld x7,0(x12) + 800037fc: 01538c63 beq x7,x21,80003814 + 80003800: 1190746f jal x8,8000b118 + 80003804: 800037f4 .word 0x800037f4 + 80003808: 00000000 .word 0x00000000 + 8000380c: 80018d0d .word 0x80018d0d + 80003810: 00000000 .word 0x00000000 + 80003814: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003818: 000c3f83 ld x31,0(x24) + 8000381c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000000000001 + 80003820: 000c3e83 ld x29,0(x24) + 80003824: 008c0c13 addi x24,x24,8 + +0000000080003828 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64dsm x19, x31, x29 # perform operation + 80003828: 3fdf89b3 aes64dsm x19,x31,x29 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 8000382c: 00063383 ld x7,0(x12) + 80003830: 01338c63 beq x7,x19,80003848 + 80003834: 0e50746f jal x8,8000b118 + 80003838: 80003828 .word 0x80003828 + 8000383c: 00000000 .word 0x00000000 + 80003840: 80018d71 .word 0x80018d71 + 80003844: 00000000 .word 0x00000000 + 80003848: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 8000384c: 000c3e03 ld x28,0(x24) + 80003850: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0000000000000002 + 80003854: 000c3b83 ld x23,0(x24) + 80003858: 008c0c13 addi x24,x24,8 + +000000008000385c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64dsm x31, x28, x23 # perform operation + 8000385c: 3f7e0fb3 aes64dsm x31,x28,x23 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003860: 00063383 ld x7,0(x12) + 80003864: 01f38c63 beq x7,x31,8000387c + 80003868: 0b10746f jal x8,8000b118 + 8000386c: 8000385c .word 0x8000385c + 80003870: 00000000 .word 0x00000000 + 80003874: 80018dd5 .word 0x80018dd5 + 80003878: 00000000 .word 0x00000000 + 8000387c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003880: 000c3703 ld x14,0(x24) + 80003884: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x8000000000000000 + 80003888: 000c3d83 ld x27,0(x24) + 8000388c: 008c0c13 addi x24,x24,8 + +0000000080003890 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64dsm x4, x14, x27 # perform operation + 80003890: 3fb70233 aes64dsm x4,x14,x27 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003894: 00063383 ld x7,0(x12) + 80003898: 00438c63 beq x7,x4,800038b0 + 8000389c: 07d0746f jal x8,8000b118 + 800038a0: 80003890 .word 0x80003890 + 800038a4: 00000000 .word 0x00000000 + 800038a8: 80018e39 .word 0x80018e39 + 800038ac: 00000000 .word 0x00000000 + 800038b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 800038b4: 000c3803 ld x16,0(x24) + 800038b8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x8000000000000001 + 800038bc: 000c3d83 ld x27,0(x24) + 800038c0: 008c0c13 addi x24,x24,8 + +00000000800038c4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64dsm x22, x16, x27 # perform operation + 800038c4: 3fb80b33 aes64dsm x22,x16,x27 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c8: 00063383 ld x7,0(x12) + 800038cc: 01638c63 beq x7,x22,800038e4 + 800038d0: 0490746f jal x8,8000b118 + 800038d4: 800038c4 .word 0x800038c4 + 800038d8: 00000000 .word 0x00000000 + 800038dc: 80018eac .word 0x80018eac + 800038e0: 00000000 .word 0x00000000 + 800038e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 800038e8: 000c3f03 ld x30,0(x24) + 800038ec: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x7fffffffffffffff + 800038f0: 000c3503 ld x10,0(x24) + 800038f4: 008c0c13 addi x24,x24,8 + +00000000800038f8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64dsm x14, x30, x10 # perform operation + 800038f8: 3eaf0733 aes64dsm x14,x30,x10 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038fc: 00063383 ld x7,0(x12) + 80003900: 00e38c63 beq x7,x14,80003918 + 80003904: 0150746f jal x8,8000b118 + 80003908: 800038f8 .word 0x800038f8 + 8000390c: 00000000 .word 0x00000000 + 80003910: 80018f1f .word 0x80018f1f + 80003914: 00000000 .word 0x00000000 + 80003918: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 8000391c: 000c3d83 ld x27,0(x24) + 80003920: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80003924: 000c3a03 ld x20,0(x24) + 80003928: 008c0c13 addi x24,x24,8 + +000000008000392c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64dsm x28, x27, x20 # perform operation + 8000392c: 3f4d8e33 aes64dsm x28,x27,x20 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003930: 00063383 ld x7,0(x12) + 80003934: 01c38c63 beq x7,x28,8000394c + 80003938: 7e00746f jal x8,8000b118 + 8000393c: 8000392c .word 0x8000392c + 80003940: 00000000 .word 0x00000000 + 80003944: 80018f92 .word 0x80018f92 + 80003948: 00000000 .word 0x00000000 + 8000394c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003950: 000c3f03 ld x30,0(x24) + 80003954: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0xffffffffffffffff + 80003958: 000c3b83 ld x23,0(x24) + 8000395c: 008c0c13 addi x24,x24,8 + +0000000080003960 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64dsm x22, x30, x23 # perform operation + 80003960: 3f7f0b33 aes64dsm x22,x30,x23 + # Check if x22 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x22, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003964: 00063383 ld x7,0(x12) + 80003968: 01638c63 beq x7,x22,80003980 + 8000396c: 7ac0746f jal x8,8000b118 + 80003970: 80003960 .word 0x80003960 + 80003974: 00000000 .word 0x00000000 + 80003978: 80019005 .word 0x80019005 + 8000397c: 00000000 .word 0x00000000 + 80003980: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003984: 000c3503 ld x10,0(x24) + 80003988: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xfffffffffffffffe + 8000398c: 000c3903 ld x18,0(x24) + 80003990: 008c0c13 addi x24,x24,8 + +0000000080003994 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64dsm x6, x10, x18 # perform operation + 80003994: 3f250333 aes64dsm x6,x10,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003998: 00063383 ld x7,0(x12) + 8000399c: 00638c63 beq x7,x6,800039b4 + 800039a0: 7780746f jal x8,8000b118 + 800039a4: 80003994 .word 0x80003994 + 800039a8: 00000000 .word 0x00000000 + 800039ac: 80019078 .word 0x80019078 + 800039b0: 00000000 .word 0x00000000 + 800039b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 800039b8: 000c3c83 ld x25,0(x24) + 800039bc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x5bbc887763ae86f2 + 800039c0: 000c3d83 ld x27,0(x24) + 800039c4: 008c0c13 addi x24,x24,8 + +00000000800039c8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64dsm x29, x25, x27 # perform operation + 800039c8: 3fbc8eb3 aes64dsm x29,x25,x27 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039cc: 00063383 ld x7,0(x12) + 800039d0: 01d38c63 beq x7,x29,800039e8 + 800039d4: 7440746f jal x8,8000b118 + 800039d8: 800039c8 .word 0x800039c8 + 800039dc: 00000000 .word 0x00000000 + 800039e0: 800190eb .word 0x800190eb + 800039e4: 00000000 .word 0x00000000 + 800039e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 800039ec: 000c3d83 ld x27,0(x24) + 800039f0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 800039f4: 000c3683 ld x13,0(x24) + 800039f8: 008c0c13 addi x24,x24,8 + +00000000800039fc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x15, x27, x13 # perform operation + 800039fc: 3edd87b3 aes64dsm x15,x27,x13 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a00: 00063383 ld x7,0(x12) + 80003a04: 00f38c63 beq x7,x15,80003a1c + 80003a08: 7100746f jal x8,8000b118 + 80003a0c: 800039fc .word 0x800039fc + 80003a10: 00000000 .word 0x00000000 + 80003a14: 8001915e .word 0x8001915e + 80003a18: 00000000 .word 0x00000000 + 80003a1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003a20: 000c3983 ld x19,0(x24) + 80003a24: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x5555555555555555 + 80003a28: 000c3c83 ld x25,0(x24) + 80003a2c: 008c0c13 addi x24,x24,8 + +0000000080003a30 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64dsm x3, x19, x25 # perform operation + 80003a30: 3f9981b3 aes64dsm x3,x19,x25 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a34: 00063383 ld x7,0(x12) + 80003a38: 00338c63 beq x7,x3,80003a50 + 80003a3c: 6dc0746f jal x8,8000b118 + 80003a40: 80003a30 .word 0x80003a30 + 80003a44: 00000000 .word 0x00000000 + 80003a48: 800191d1 .word 0x800191d1 + 80003a4c: 00000000 .word 0x00000000 + 80003a50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 80003a54: 000c3e03 ld x28,0(x24) + 80003a58: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x00000000ffffffff + 80003a5c: 000c3203 ld x4,0(x24) + 80003a60: 008c0c13 addi x24,x24,8 + +0000000080003a64 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64dsm x16, x28, x4 # perform operation + 80003a64: 3e4e0833 aes64dsm x16,x28,x4 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a68: 00063383 ld x7,0(x12) + 80003a6c: 01038c63 beq x7,x16,80003a84 + 80003a70: 6a80746f jal x8,8000b118 + 80003a74: 80003a64 .word 0x80003a64 + 80003a78: 00000000 .word 0x00000000 + 80003a7c: 80019244 .word 0x80019244 + 80003a80: 00000000 .word 0x00000000 + 80003a84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003a88: 000c3d83 ld x27,0(x24) + 80003a8c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x00000000fffffffe + 80003a90: 000c3703 ld x14,0(x24) + 80003a94: 008c0c13 addi x24,x24,8 + +0000000080003a98 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64dsm x1, x27, x14 # perform operation + 80003a98: 3eed80b3 aes64dsm x1,x27,x14 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a9c: 00063383 ld x7,0(x12) + 80003aa0: 00138c63 beq x7,x1,80003ab8 + 80003aa4: 6740746f jal x8,8000b118 + 80003aa8: 80003a98 .word 0x80003a98 + 80003aac: 00000000 .word 0x00000000 + 80003ab0: 800192af .word 0x800192af + 80003ab4: 00000000 .word 0x00000000 + 80003ab8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 80003abc: 000c3203 ld x4,0(x24) + 80003ac0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000100000000 + 80003ac4: 000c3d83 ld x27,0(x24) + 80003ac8: 008c0c13 addi x24,x24,8 + +0000000080003acc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64dsm x23, x4, x27 # perform operation + 80003acc: 3fb20bb3 aes64dsm x23,x4,x27 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad0: 00063383 ld x7,0(x12) + 80003ad4: 01738c63 beq x7,x23,80003aec + 80003ad8: 6400746f jal x8,8000b118 + 80003adc: 80003acc .word 0x80003acc + 80003ae0: 00000000 .word 0x00000000 + 80003ae4: 8001931a .word 0x8001931a + 80003ae8: 00000000 .word 0x00000000 + 80003aec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003af0: 000c3583 ld x11,0(x24) + 80003af4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x0000000100000001 + 80003af8: 000c3083 ld x1,0(x24) + 80003afc: 008c0c13 addi x24,x24,8 + +0000000080003b00 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64dsm x19, x11, x1 # perform operation + 80003b00: 3e1589b3 aes64dsm x19,x11,x1 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b04: 00063383 ld x7,0(x12) + 80003b08: 01338c63 beq x7,x19,80003b20 + 80003b0c: 60c0746f jal x8,8000b118 + 80003b10: 80003b00 .word 0x80003b00 + 80003b14: 00000000 .word 0x00000000 + 80003b18: 80019386 .word 0x80019386 + 80003b1c: 00000000 .word 0x00000000 + 80003b20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003b24: 000c3103 ld x2,0(x24) + 80003b28: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000000000000 + 80003b2c: 000c3d03 ld x26,0(x24) + 80003b30: 008c0c13 addi x24,x24,8 + +0000000080003b34 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64dsm x27, x2, x26 # perform operation + 80003b34: 3fa10db3 aes64dsm x27,x2,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b38: 00063383 ld x7,0(x12) + 80003b3c: 01b38c63 beq x7,x27,80003b54 + 80003b40: 5d80746f jal x8,8000b118 + 80003b44: 80003b34 .word 0x80003b34 + 80003b48: 00000000 .word 0x00000000 + 80003b4c: 800193f2 .word 0x800193f2 + 80003b50: 00000000 .word 0x00000000 + 80003b54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003b58: 000c3a03 ld x20,0(x24) + 80003b5c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x0000000000000001 + 80003b60: 000c3783 ld x15,0(x24) + 80003b64: 008c0c13 addi x24,x24,8 + +0000000080003b68 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64dsm x1, x20, x15 # perform operation + 80003b68: 3efa00b3 aes64dsm x1,x20,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b6c: 00063383 ld x7,0(x12) + 80003b70: 00138c63 beq x7,x1,80003b88 + 80003b74: 5a40746f jal x8,8000b118 + 80003b78: 80003b68 .word 0x80003b68 + 80003b7c: 00000000 .word 0x00000000 + 80003b80: 80019456 .word 0x80019456 + 80003b84: 00000000 .word 0x00000000 + 80003b88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003b8c: 000c3183 ld x3,0(x24) + 80003b90: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x0000000000000002 + 80003b94: 000c3083 ld x1,0(x24) + 80003b98: 008c0c13 addi x24,x24,8 + +0000000080003b9c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64dsm x20, x3, x1 # perform operation + 80003b9c: 3e118a33 aes64dsm x20,x3,x1 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba0: 00063383 ld x7,0(x12) + 80003ba4: 01438c63 beq x7,x20,80003bbc + 80003ba8: 5700746f jal x8,8000b118 + 80003bac: 80003b9c .word 0x80003b9c + 80003bb0: 00000000 .word 0x00000000 + 80003bb4: 800194ba .word 0x800194ba + 80003bb8: 00000000 .word 0x00000000 + 80003bbc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003bc0: 000c3083 ld x1,0(x24) + 80003bc4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x8000000000000000 + 80003bc8: 000c3803 ld x16,0(x24) + 80003bcc: 008c0c13 addi x24,x24,8 + +0000000080003bd0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64dsm x13, x1, x16 # perform operation + 80003bd0: 3f0086b3 aes64dsm x13,x1,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd4: 00063383 ld x7,0(x12) + 80003bd8: 00d38c63 beq x7,x13,80003bf0 + 80003bdc: 53c0746f jal x8,8000b118 + 80003be0: 80003bd0 .word 0x80003bd0 + 80003be4: 00000000 .word 0x00000000 + 80003be8: 8001951e .word 0x8001951e + 80003bec: 00000000 .word 0x00000000 + 80003bf0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003bf4: 000c3e83 ld x29,0(x24) + 80003bf8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x8000000000000001 + 80003bfc: 000c3483 ld x9,0(x24) + 80003c00: 008c0c13 addi x24,x24,8 + +0000000080003c04 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64dsm x6, x29, x9 # perform operation + 80003c04: 3e9e8333 aes64dsm x6,x29,x9 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c08: 00063383 ld x7,0(x12) + 80003c0c: 00638c63 beq x7,x6,80003c24 + 80003c10: 5080746f jal x8,8000b118 + 80003c14: 80003c04 .word 0x80003c04 + 80003c18: 00000000 .word 0x00000000 + 80003c1c: 80019591 .word 0x80019591 + 80003c20: 00000000 .word 0x00000000 + 80003c24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003c28: 000c3303 ld x6,0(x24) + 80003c2c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x7fffffffffffffff + 80003c30: 000c3b03 ld x22,0(x24) + 80003c34: 008c0c13 addi x24,x24,8 + +0000000080003c38 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64dsm x26, x6, x22 # perform operation + 80003c38: 3f630d33 aes64dsm x26,x6,x22 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c3c: 00063383 ld x7,0(x12) + 80003c40: 01a38c63 beq x7,x26,80003c58 + 80003c44: 4d40746f jal x8,8000b118 + 80003c48: 80003c38 .word 0x80003c38 + 80003c4c: 00000000 .word 0x00000000 + 80003c50: 80019604 .word 0x80019604 + 80003c54: 00000000 .word 0x00000000 + 80003c58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0xaaaaaaaaaaaaaaaa + 80003c5c: 000c3203 ld x4,0(x24) + 80003c60: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80003c64: 000c3883 ld x17,0(x24) + 80003c68: 008c0c13 addi x24,x24,8 + +0000000080003c6c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64dsm x6, x4, x17 # perform operation + 80003c6c: 3f120333 aes64dsm x6,x4,x17 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c70: 00063383 ld x7,0(x12) + 80003c74: 00638c63 beq x7,x6,80003c8c + 80003c78: 4a00746f jal x8,8000b118 + 80003c7c: 80003c6c .word 0x80003c6c + 80003c80: 00000000 .word 0x00000000 + 80003c84: 80019677 .word 0x80019677 + 80003c88: 00000000 .word 0x00000000 + 80003c8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003c90: 000c3803 ld x16,0(x24) + 80003c94: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0xffffffffffffffff + 80003c98: 000c3b83 ld x23,0(x24) + 80003c9c: 008c0c13 addi x24,x24,8 + +0000000080003ca0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64dsm x28, x16, x23 # perform operation + 80003ca0: 3f780e33 aes64dsm x28,x16,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca4: 00063383 ld x7,0(x12) + 80003ca8: 01c38c63 beq x7,x28,80003cc0 + 80003cac: 46c0746f jal x8,8000b118 + 80003cb0: 80003ca0 .word 0x80003ca0 + 80003cb4: 00000000 .word 0x00000000 + 80003cb8: 800196ea .word 0x800196ea + 80003cbc: 00000000 .word 0x00000000 + 80003cc0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003cc4: 000c3303 ld x6,0(x24) + 80003cc8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xfffffffffffffffe + 80003ccc: 000c3883 ld x17,0(x24) + 80003cd0: 008c0c13 addi x24,x24,8 + +0000000080003cd4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64dsm x19, x6, x17 # perform operation + 80003cd4: 3f1309b3 aes64dsm x19,x6,x17 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd8: 00063383 ld x7,0(x12) + 80003cdc: 01338c63 beq x7,x19,80003cf4 + 80003ce0: 4380746f jal x8,8000b118 + 80003ce4: 80003cd4 .word 0x80003cd4 + 80003ce8: 00000000 .word 0x00000000 + 80003cec: 8001975d .word 0x8001975d + 80003cf0: 00000000 .word 0x00000000 + 80003cf4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003cf8: 000c3b03 ld x22,0(x24) + 80003cfc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x5bbc887763ae86f2 + 80003d00: 000c3083 ld x1,0(x24) + 80003d04: 008c0c13 addi x24,x24,8 + +0000000080003d08 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64dsm x4, x22, x1 # perform operation + 80003d08: 3e1b0233 aes64dsm x4,x22,x1 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d0c: 00063383 ld x7,0(x12) + 80003d10: 00438c63 beq x7,x4,80003d28 + 80003d14: 4040746f jal x8,8000b118 + 80003d18: 80003d08 .word 0x80003d08 + 80003d1c: 00000000 .word 0x00000000 + 80003d20: 800197d0 .word 0x800197d0 + 80003d24: 00000000 .word 0x00000000 + 80003d28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003d2c: 000c3303 ld x6,0(x24) + 80003d30: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80003d34: 000c3783 ld x15,0(x24) + 80003d38: 008c0c13 addi x24,x24,8 + +0000000080003d3c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x27, x6, x15 # perform operation + 80003d3c: 3ef30db3 aes64dsm x27,x6,x15 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d40: 00063383 ld x7,0(x12) + 80003d44: 01b38c63 beq x7,x27,80003d5c + 80003d48: 3d00746f jal x8,8000b118 + 80003d4c: 80003d3c .word 0x80003d3c + 80003d50: 00000000 .word 0x00000000 + 80003d54: 80019843 .word 0x80019843 + 80003d58: 00000000 .word 0x00000000 + 80003d5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003d60: 000c3583 ld x11,0(x24) + 80003d64: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x5555555555555555 + 80003d68: 000c3983 ld x19,0(x24) + 80003d6c: 008c0c13 addi x24,x24,8 + +0000000080003d70 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64dsm x2, x11, x19 # perform operation + 80003d70: 3f358133 aes64dsm x2,x11,x19 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d74: 00063383 ld x7,0(x12) + 80003d78: 00238c63 beq x7,x2,80003d90 + 80003d7c: 39c0746f jal x8,8000b118 + 80003d80: 80003d70 .word 0x80003d70 + 80003d84: 00000000 .word 0x00000000 + 80003d88: 800198b6 .word 0x800198b6 + 80003d8c: 00000000 .word 0x00000000 + 80003d90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003d94: 000c3683 ld x13,0(x24) + 80003d98: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x00000000ffffffff + 80003d9c: 000c3b03 ld x22,0(x24) + 80003da0: 008c0c13 addi x24,x24,8 + +0000000080003da4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64dsm x4, x13, x22 # perform operation + 80003da4: 3f668233 aes64dsm x4,x13,x22 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da8: 00063383 ld x7,0(x12) + 80003dac: 00438c63 beq x7,x4,80003dc4 + 80003db0: 3680746f jal x8,8000b118 + 80003db4: 80003da4 .word 0x80003da4 + 80003db8: 00000000 .word 0x00000000 + 80003dbc: 80019929 .word 0x80019929 + 80003dc0: 00000000 .word 0x00000000 + 80003dc4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003dc8: 000c3303 ld x6,0(x24) + 80003dcc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x00000000fffffffe + 80003dd0: 000c3783 ld x15,0(x24) + 80003dd4: 008c0c13 addi x24,x24,8 + +0000000080003dd8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64dsm x23, x6, x15 # perform operation + 80003dd8: 3ef30bb3 aes64dsm x23,x6,x15 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003ddc: 00063383 ld x7,0(x12) + 80003de0: 01738c63 beq x7,x23,80003df8 + 80003de4: 3340746f jal x8,8000b118 + 80003de8: 80003dd8 .word 0x80003dd8 + 80003dec: 00000000 .word 0x00000000 + 80003df0: 80019994 .word 0x80019994 + 80003df4: 00000000 .word 0x00000000 + 80003df8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003dfc: 000c3483 ld x9,0(x24) + 80003e00: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x0000000100000000 + 80003e04: 000c3583 ld x11,0(x24) + 80003e08: 008c0c13 addi x24,x24,8 + +0000000080003e0c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64dsm x19, x9, x11 # perform operation + 80003e0c: 3eb489b3 aes64dsm x19,x9,x11 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e10: 00063383 ld x7,0(x12) + 80003e14: 01338c63 beq x7,x19,80003e2c + 80003e18: 3000746f jal x8,8000b118 + 80003e1c: 80003e0c .word 0x80003e0c + 80003e20: 00000000 .word 0x00000000 + 80003e24: 800199ff .word 0x800199ff + 80003e28: 00000000 .word 0x00000000 + 80003e2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003e30: 000c3303 ld x6,0(x24) + 80003e34: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x0000000100000001 + 80003e38: 000c3583 ld x11,0(x24) + 80003e3c: 008c0c13 addi x24,x24,8 + +0000000080003e40 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64dsm x17, x6, x11 # perform operation + 80003e40: 3eb308b3 aes64dsm x17,x6,x11 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e44: 00063383 ld x7,0(x12) + 80003e48: 01138c63 beq x7,x17,80003e60 + 80003e4c: 2cc0746f jal x8,8000b118 + 80003e50: 80003e40 .word 0x80003e40 + 80003e54: 00000000 .word 0x00000000 + 80003e58: 80019a6b .word 0x80019a6b + 80003e5c: 00000000 .word 0x00000000 + 80003e60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x5555555555555555 + 80003e64: 000c3b83 ld x23,0(x24) + 80003e68: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x0000000000000000 + 80003e6c: 000c3e83 ld x29,0(x24) + 80003e70: 008c0c13 addi x24,x24,8 + +0000000080003e74 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64dsm x1, x23, x29 # perform operation + 80003e74: 3fdb80b3 aes64dsm x1,x23,x29 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e78: 00063383 ld x7,0(x12) + 80003e7c: 00138c63 beq x7,x1,80003e94 + 80003e80: 2980746f jal x8,8000b118 + 80003e84: 80003e74 .word 0x80003e74 + 80003e88: 00000000 .word 0x00000000 + 80003e8c: 80019ad7 .word 0x80019ad7 + 80003e90: 00000000 .word 0x00000000 + 80003e94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x5555555555555555 + 80003e98: 000c3103 ld x2,0(x24) + 80003e9c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0000000000000001 + 80003ea0: 000c3283 ld x5,0(x24) + 80003ea4: 008c0c13 addi x24,x24,8 + +0000000080003ea8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64dsm x20, x2, x5 # perform operation + 80003ea8: 3e510a33 aes64dsm x20,x2,x5 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eac: 00063383 ld x7,0(x12) + 80003eb0: 01438c63 beq x7,x20,80003ec8 + 80003eb4: 2640746f jal x8,8000b118 + 80003eb8: 80003ea8 .word 0x80003ea8 + 80003ebc: 00000000 .word 0x00000000 + 80003ec0: 80019b3b .word 0x80019b3b + 80003ec4: 00000000 .word 0x00000000 + 80003ec8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x5555555555555555 + 80003ecc: 000c3a03 ld x20,0(x24) + 80003ed0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000000000002 + 80003ed4: 000c3d83 ld x27,0(x24) + 80003ed8: 008c0c13 addi x24,x24,8 + +0000000080003edc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64dsm x1, x20, x27 # perform operation + 80003edc: 3fba00b3 aes64dsm x1,x20,x27 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee0: 00063383 ld x7,0(x12) + 80003ee4: 00138c63 beq x7,x1,80003efc + 80003ee8: 2300746f jal x8,8000b118 + 80003eec: 80003edc .word 0x80003edc + 80003ef0: 00000000 .word 0x00000000 + 80003ef4: 80019b9f .word 0x80019b9f + 80003ef8: 00000000 .word 0x00000000 + 80003efc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x5555555555555555 + 80003f00: 000c3483 ld x9,0(x24) + 80003f04: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x8000000000000000 + 80003f08: 000c3203 ld x4,0(x24) + 80003f0c: 008c0c13 addi x24,x24,8 + +0000000080003f10 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64dsm x6, x9, x4 # perform operation + 80003f10: 3e448333 aes64dsm x6,x9,x4 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f14: 00063383 ld x7,0(x12) + 80003f18: 00638c63 beq x7,x6,80003f30 + 80003f1c: 1fc0746f jal x8,8000b118 + 80003f20: 80003f10 .word 0x80003f10 + 80003f24: 00000000 .word 0x00000000 + 80003f28: 80019c03 .word 0x80019c03 + 80003f2c: 00000000 .word 0x00000000 + 80003f30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x5555555555555555 + 80003f34: 000c3683 ld x13,0(x24) + 80003f38: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x8000000000000001 + 80003f3c: 000c3f03 ld x30,0(x24) + 80003f40: 008c0c13 addi x24,x24,8 + +0000000080003f44 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64dsm x14, x13, x30 # perform operation + 80003f44: 3fe68733 aes64dsm x14,x13,x30 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f48: 00063383 ld x7,0(x12) + 80003f4c: 00e38c63 beq x7,x14,80003f64 + 80003f50: 1c80746f jal x8,8000b118 + 80003f54: 80003f44 .word 0x80003f44 + 80003f58: 00000000 .word 0x00000000 + 80003f5c: 80019c76 .word 0x80019c76 + 80003f60: 00000000 .word 0x00000000 + 80003f64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x5555555555555555 + 80003f68: 000c3e03 ld x28,0(x24) + 80003f6c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x7fffffffffffffff + 80003f70: 000c3303 ld x6,0(x24) + 80003f74: 008c0c13 addi x24,x24,8 + +0000000080003f78 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64dsm x20, x28, x6 # perform operation + 80003f78: 3e6e0a33 aes64dsm x20,x28,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f7c: 00063383 ld x7,0(x12) + 80003f80: 01438c63 beq x7,x20,80003f98 + 80003f84: 1940746f jal x8,8000b118 + 80003f88: 80003f78 .word 0x80003f78 + 80003f8c: 00000000 .word 0x00000000 + 80003f90: 80019ce9 .word 0x80019ce9 + 80003f94: 00000000 .word 0x00000000 + 80003f98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x5555555555555555 + 80003f9c: 000c3583 ld x11,0(x24) + 80003fa0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80003fa4: 000c3883 ld x17,0(x24) + 80003fa8: 008c0c13 addi x24,x24,8 + +0000000080003fac : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64dsm x15, x11, x17 # perform operation + 80003fac: 3f1587b3 aes64dsm x15,x11,x17 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb0: 00063383 ld x7,0(x12) + 80003fb4: 00f38c63 beq x7,x15,80003fcc + 80003fb8: 1600746f jal x8,8000b118 + 80003fbc: 80003fac .word 0x80003fac + 80003fc0: 00000000 .word 0x00000000 + 80003fc4: 80019d5c .word 0x80019d5c + 80003fc8: 00000000 .word 0x00000000 + 80003fcc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x5555555555555555 + 80003fd0: 000c3883 ld x17,0(x24) + 80003fd4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xffffffffffffffff + 80003fd8: 000c3803 ld x16,0(x24) + 80003fdc: 008c0c13 addi x24,x24,8 + +0000000080003fe0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64dsm x18, x17, x16 # perform operation + 80003fe0: 3f088933 aes64dsm x18,x17,x16 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe4: 00063383 ld x7,0(x12) + 80003fe8: 01238c63 beq x7,x18,80004000 + 80003fec: 12c0746f jal x8,8000b118 + 80003ff0: 80003fe0 .word 0x80003fe0 + 80003ff4: 00000000 .word 0x00000000 + 80003ff8: 80019dcf .word 0x80019dcf + 80003ffc: 00000000 .word 0x00000000 + 80004000: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x5555555555555555 + 80004004: 000c3b03 ld x22,0(x24) + 80004008: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xfffffffffffffffe + 8000400c: 000c3803 ld x16,0(x24) + 80004010: 008c0c13 addi x24,x24,8 + +0000000080004014 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64dsm x15, x22, x16 # perform operation + 80004014: 3f0b07b3 aes64dsm x15,x22,x16 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004018: 00063383 ld x7,0(x12) + 8000401c: 00f38c63 beq x7,x15,80004034 + 80004020: 0f80746f jal x8,8000b118 + 80004024: 80004014 .word 0x80004014 + 80004028: 00000000 .word 0x00000000 + 8000402c: 80019e42 .word 0x80019e42 + 80004030: 00000000 .word 0x00000000 + 80004034: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x5555555555555555 + 80004038: 000c3f83 ld x31,0(x24) + 8000403c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80004040: 000c3a83 ld x21,0(x24) + 80004044: 008c0c13 addi x24,x24,8 + +0000000080004048 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64dsm x6, x31, x21 # perform operation + 80004048: 3f5f8333 aes64dsm x6,x31,x21 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 8000404c: 00063383 ld x7,0(x12) + 80004050: 00638c63 beq x7,x6,80004068 + 80004054: 0c40746f jal x8,8000b118 + 80004058: 80004048 .word 0x80004048 + 8000405c: 00000000 .word 0x00000000 + 80004060: 80019eb5 .word 0x80019eb5 + 80004064: 00000000 .word 0x00000000 + 80004068: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x5555555555555555 + 8000406c: 000c3083 ld x1,0(x24) + 80004070: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004074: 000c3983 ld x19,0(x24) + 80004078: 008c0c13 addi x24,x24,8 + +000000008000407c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x25, x1, x19 # perform operation + 8000407c: 3f308cb3 aes64dsm x25,x1,x19 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004080: 00063383 ld x7,0(x12) + 80004084: 01938c63 beq x7,x25,8000409c + 80004088: 0900746f jal x8,8000b118 + 8000408c: 8000407c .word 0x8000407c + 80004090: 00000000 .word 0x00000000 + 80004094: 80019f28 .word 0x80019f28 + 80004098: 00000000 .word 0x00000000 + 8000409c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x5555555555555555 + 800040a0: 000c3783 ld x15,0(x24) + 800040a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x5555555555555555 + 800040a8: 000c3083 ld x1,0(x24) + 800040ac: 008c0c13 addi x24,x24,8 + +00000000800040b0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64dsm x31, x15, x1 # perform operation + 800040b0: 3e178fb3 aes64dsm x31,x15,x1 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b4: 00063383 ld x7,0(x12) + 800040b8: 01f38c63 beq x7,x31,800040d0 + 800040bc: 05c0746f jal x8,8000b118 + 800040c0: 800040b0 .word 0x800040b0 + 800040c4: 00000000 .word 0x00000000 + 800040c8: 80019f9b .word 0x80019f9b + 800040cc: 00000000 .word 0x00000000 + 800040d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x5555555555555555 + 800040d4: 000c3903 ld x18,0(x24) + 800040d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x00000000ffffffff + 800040dc: 000c3883 ld x17,0(x24) + 800040e0: 008c0c13 addi x24,x24,8 + +00000000800040e4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64dsm x26, x18, x17 # perform operation + 800040e4: 3f190d33 aes64dsm x26,x18,x17 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e8: 00063383 ld x7,0(x12) + 800040ec: 01a38c63 beq x7,x26,80004104 + 800040f0: 0280746f jal x8,8000b118 + 800040f4: 800040e4 .word 0x800040e4 + 800040f8: 00000000 .word 0x00000000 + 800040fc: 8001a00e .word 0x8001a00e + 80004100: 00000000 .word 0x00000000 + 80004104: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5555555555555555 + 80004108: 000c3803 ld x16,0(x24) + 8000410c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x00000000fffffffe + 80004110: 000c3e83 ld x29,0(x24) + 80004114: 008c0c13 addi x24,x24,8 + +0000000080004118 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64dsm x25, x16, x29 # perform operation + 80004118: 3fd80cb3 aes64dsm x25,x16,x29 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 8000411c: 00063383 ld x7,0(x12) + 80004120: 01938c63 beq x7,x25,80004138 + 80004124: 7f50646f jal x8,8000b118 + 80004128: 80004118 .word 0x80004118 + 8000412c: 00000000 .word 0x00000000 + 80004130: 8001a079 .word 0x8001a079 + 80004134: 00000000 .word 0x00000000 + 80004138: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x5555555555555555 + 8000413c: 000c3903 ld x18,0(x24) + 80004140: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x0000000100000000 + 80004144: 000c3683 ld x13,0(x24) + 80004148: 008c0c13 addi x24,x24,8 + +000000008000414c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64dsm x28, x18, x13 # perform operation + 8000414c: 3ed90e33 aes64dsm x28,x18,x13 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004150: 00063383 ld x7,0(x12) + 80004154: 01c38c63 beq x7,x28,8000416c + 80004158: 7c10646f jal x8,8000b118 + 8000415c: 8000414c .word 0x8000414c + 80004160: 00000000 .word 0x00000000 + 80004164: 8001a0e4 .word 0x8001a0e4 + 80004168: 00000000 .word 0x00000000 + 8000416c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x5555555555555555 + 80004170: 000c3f83 ld x31,0(x24) + 80004174: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x0000000100000001 + 80004178: 000c3b03 ld x22,0(x24) + 8000417c: 008c0c13 addi x24,x24,8 + +0000000080004180 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64dsm x14, x31, x22 # perform operation + 80004180: 3f6f8733 aes64dsm x14,x31,x22 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004184: 00063383 ld x7,0(x12) + 80004188: 00e38c63 beq x7,x14,800041a0 + 8000418c: 78d0646f jal x8,8000b118 + 80004190: 80004180 .word 0x80004180 + 80004194: 00000000 .word 0x00000000 + 80004198: 8001a150 .word 0x8001a150 + 8000419c: 00000000 .word 0x00000000 + 800041a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x00000000ffffffff + 800041a4: 000c3a83 ld x21,0(x24) + 800041a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x0000000000000000 + 800041ac: 000c3703 ld x14,0(x24) + 800041b0: 008c0c13 addi x24,x24,8 + +00000000800041b4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64dsm x16, x21, x14 # perform operation + 800041b4: 3eea8833 aes64dsm x16,x21,x14 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b8: 00063383 ld x7,0(x12) + 800041bc: 01038c63 beq x7,x16,800041d4 + 800041c0: 7590646f jal x8,8000b118 + 800041c4: 800041b4 .word 0x800041b4 + 800041c8: 00000000 .word 0x00000000 + 800041cc: 8001a1bc .word 0x8001a1bc + 800041d0: 00000000 .word 0x00000000 + 800041d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x00000000ffffffff + 800041d8: 000c3703 ld x14,0(x24) + 800041dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x0000000000000001 + 800041e0: 000c3583 ld x11,0(x24) + 800041e4: 008c0c13 addi x24,x24,8 + +00000000800041e8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64dsm x31, x14, x11 # perform operation + 800041e8: 3eb70fb3 aes64dsm x31,x14,x11 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041ec: 00063383 ld x7,0(x12) + 800041f0: 01f38c63 beq x7,x31,80004208 + 800041f4: 7250646f jal x8,8000b118 + 800041f8: 800041e8 .word 0x800041e8 + 800041fc: 00000000 .word 0x00000000 + 80004200: 8001a218 .word 0x8001a218 + 80004204: 00000000 .word 0x00000000 + 80004208: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x00000000ffffffff + 8000420c: 000c3703 ld x14,0(x24) + 80004210: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x0000000000000002 + 80004214: 000c3103 ld x2,0(x24) + 80004218: 008c0c13 addi x24,x24,8 + +000000008000421c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64dsm x21, x14, x2 # perform operation + 8000421c: 3e270ab3 aes64dsm x21,x14,x2 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004220: 00063383 ld x7,0(x12) + 80004224: 01538c63 beq x7,x21,8000423c + 80004228: 6f10646f jal x8,8000b118 + 8000422c: 8000421c .word 0x8000421c + 80004230: 00000000 .word 0x00000000 + 80004234: 8001a274 .word 0x8001a274 + 80004238: 00000000 .word 0x00000000 + 8000423c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x00000000ffffffff + 80004240: 000c3f83 ld x31,0(x24) + 80004244: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x8000000000000000 + 80004248: 000c3183 ld x3,0(x24) + 8000424c: 008c0c13 addi x24,x24,8 + +0000000080004250 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64dsm x4, x31, x3 # perform operation + 80004250: 3e3f8233 aes64dsm x4,x31,x3 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004254: 00063383 ld x7,0(x12) + 80004258: 00438c63 beq x7,x4,80004270 + 8000425c: 6bd0646f jal x8,8000b118 + 80004260: 80004250 .word 0x80004250 + 80004264: 00000000 .word 0x00000000 + 80004268: 8001a2d0 .word 0x8001a2d0 + 8000426c: 00000000 .word 0x00000000 + 80004270: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x00000000ffffffff + 80004274: 000c3f03 ld x30,0(x24) + 80004278: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x8000000000000001 + 8000427c: 000c3203 ld x4,0(x24) + 80004280: 008c0c13 addi x24,x24,8 + +0000000080004284 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64dsm x23, x30, x4 # perform operation + 80004284: 3e4f0bb3 aes64dsm x23,x30,x4 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004288: 00063383 ld x7,0(x12) + 8000428c: 01738c63 beq x7,x23,800042a4 + 80004290: 6890646f jal x8,8000b118 + 80004294: 80004284 .word 0x80004284 + 80004298: 00000000 .word 0x00000000 + 8000429c: 8001a33b .word 0x8001a33b + 800042a0: 00000000 .word 0x00000000 + 800042a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x00000000ffffffff + 800042a8: 000c3a03 ld x20,0(x24) + 800042ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x7fffffffffffffff + 800042b0: 000c3303 ld x6,0(x24) + 800042b4: 008c0c13 addi x24,x24,8 + +00000000800042b8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64dsm x16, x20, x6 # perform operation + 800042b8: 3e6a0833 aes64dsm x16,x20,x6 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042bc: 00063383 ld x7,0(x12) + 800042c0: 01038c63 beq x7,x16,800042d8 + 800042c4: 6550646f jal x8,8000b118 + 800042c8: 800042b8 .word 0x800042b8 + 800042cc: 00000000 .word 0x00000000 + 800042d0: 8001a3a6 .word 0x8001a3a6 + 800042d4: 00000000 .word 0x00000000 + 800042d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x00000000ffffffff + 800042dc: 000c3903 ld x18,0(x24) + 800042e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x7ffffffffffffffe + 800042e4: 000c3483 ld x9,0(x24) + 800042e8: 008c0c13 addi x24,x24,8 + +00000000800042ec : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64dsm x17, x18, x9 # perform operation + 800042ec: 3e9908b3 aes64dsm x17,x18,x9 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f0: 00063383 ld x7,0(x12) + 800042f4: 01138c63 beq x7,x17,8000430c + 800042f8: 6210646f jal x8,8000b118 + 800042fc: 800042ec .word 0x800042ec + 80004300: 00000000 .word 0x00000000 + 80004304: 8001a411 .word 0x8001a411 + 80004308: 00000000 .word 0x00000000 + 8000430c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x00000000ffffffff + 80004310: 000c3583 ld x11,0(x24) + 80004314: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xffffffffffffffff + 80004318: 000c3783 ld x15,0(x24) + 8000431c: 008c0c13 addi x24,x24,8 + +0000000080004320 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64dsm x23, x11, x15 # perform operation + 80004320: 3ef58bb3 aes64dsm x23,x11,x15 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004324: 00063383 ld x7,0(x12) + 80004328: 01738c63 beq x7,x23,80004340 + 8000432c: 5ed0646f jal x8,8000b118 + 80004330: 80004320 .word 0x80004320 + 80004334: 00000000 .word 0x00000000 + 80004338: 8001a47c .word 0x8001a47c + 8000433c: 00000000 .word 0x00000000 + 80004340: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x00000000ffffffff + 80004344: 000c3903 ld x18,0(x24) + 80004348: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xfffffffffffffffe + 8000434c: 000c3d83 ld x27,0(x24) + 80004350: 008c0c13 addi x24,x24,8 + +0000000080004354 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64dsm x16, x18, x27 # perform operation + 80004354: 3fb90833 aes64dsm x16,x18,x27 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004358: 00063383 ld x7,0(x12) + 8000435c: 01038c63 beq x7,x16,80004374 + 80004360: 5b90646f jal x8,8000b118 + 80004364: 80004354 .word 0x80004354 + 80004368: 00000000 .word 0x00000000 + 8000436c: 8001a4e7 .word 0x8001a4e7 + 80004370: 00000000 .word 0x00000000 + 80004374: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x00000000ffffffff + 80004378: 000c3e83 ld x29,0(x24) + 8000437c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80004380: 000c3483 ld x9,0(x24) + 80004384: 008c0c13 addi x24,x24,8 + +0000000080004388 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64dsm x31, x29, x9 # perform operation + 80004388: 3e9e8fb3 aes64dsm x31,x29,x9 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000438c: 00063383 ld x7,0(x12) + 80004390: 01f38c63 beq x7,x31,800043a8 + 80004394: 5850646f jal x8,8000b118 + 80004398: 80004388 .word 0x80004388 + 8000439c: 00000000 .word 0x00000000 + 800043a0: 8001a552 .word 0x8001a552 + 800043a4: 00000000 .word 0x00000000 + 800043a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x00000000ffffffff + 800043ac: 000c3203 ld x4,0(x24) + 800043b0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 800043b4: 000c3a83 ld x21,0(x24) + 800043b8: 008c0c13 addi x24,x24,8 + +00000000800043bc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x28, x4, x21 # perform operation + 800043bc: 3f520e33 aes64dsm x28,x4,x21 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c0: 00063383 ld x7,0(x12) + 800043c4: 01c38c63 beq x7,x28,800043dc + 800043c8: 5510646f jal x8,8000b118 + 800043cc: 800043bc .word 0x800043bc + 800043d0: 00000000 .word 0x00000000 + 800043d4: 8001a5bd .word 0x8001a5bd + 800043d8: 00000000 .word 0x00000000 + 800043dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x00000000ffffffff + 800043e0: 000c3983 ld x19,0(x24) + 800043e4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x5555555555555555 + 800043e8: 000c3703 ld x14,0(x24) + 800043ec: 008c0c13 addi x24,x24,8 + +00000000800043f0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64dsm x3, x19, x14 # perform operation + 800043f0: 3ee981b3 aes64dsm x3,x19,x14 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f4: 00063383 ld x7,0(x12) + 800043f8: 00338c63 beq x7,x3,80004410 + 800043fc: 51d0646f jal x8,8000b118 + 80004400: 800043f0 .word 0x800043f0 + 80004404: 00000000 .word 0x00000000 + 80004408: 8001a628 .word 0x8001a628 + 8000440c: 00000000 .word 0x00000000 + 80004410: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x00000000ffffffff + 80004414: 000c3483 ld x9,0(x24) + 80004418: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x00000000ffffffff + 8000441c: 000c3e83 ld x29,0(x24) + 80004420: 008c0c13 addi x24,x24,8 + +0000000080004424 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64dsm x19, x9, x29 # perform operation + 80004424: 3fd489b3 aes64dsm x19,x9,x29 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004428: 00063383 ld x7,0(x12) + 8000442c: 01338c63 beq x7,x19,80004444 + 80004430: 4e90646f jal x8,8000b118 + 80004434: 80004424 .word 0x80004424 + 80004438: 00000000 .word 0x00000000 + 8000443c: 8001a693 .word 0x8001a693 + 80004440: 00000000 .word 0x00000000 + 80004444: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x00000000ffffffff + 80004448: 000c3303 ld x6,0(x24) + 8000444c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x00000000fffffffe + 80004450: 000c3583 ld x11,0(x24) + 80004454: 008c0c13 addi x24,x24,8 + +0000000080004458 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64dsm x27, x6, x11 # perform operation + 80004458: 3eb30db3 aes64dsm x27,x6,x11 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 8000445c: 00063383 ld x7,0(x12) + 80004460: 01b38c63 beq x7,x27,80004478 + 80004464: 4b50646f jal x8,8000b118 + 80004468: 80004458 .word 0x80004458 + 8000446c: 00000000 .word 0x00000000 + 80004470: 8001a6f6 .word 0x8001a6f6 + 80004474: 00000000 .word 0x00000000 + 80004478: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x00000000ffffffff + 8000447c: 000c3a83 ld x21,0(x24) + 80004480: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x0000000100000000 + 80004484: 000c3883 ld x17,0(x24) + 80004488: 008c0c13 addi x24,x24,8 + +000000008000448c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64dsm x4, x21, x17 # perform operation + 8000448c: 3f1a8233 aes64dsm x4,x21,x17 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004490: 00063383 ld x7,0(x12) + 80004494: 00438c63 beq x7,x4,800044ac + 80004498: 4810646f jal x8,8000b118 + 8000449c: 8000448c .word 0x8000448c + 800044a0: 00000000 .word 0x00000000 + 800044a4: 8001a759 .word 0x8001a759 + 800044a8: 00000000 .word 0x00000000 + 800044ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x00000000ffffffff + 800044b0: 000c3283 ld x5,0(x24) + 800044b4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x0000000100000001 + 800044b8: 000c3683 ld x13,0(x24) + 800044bc: 008c0c13 addi x24,x24,8 + +00000000800044c0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64dsm x6, x5, x13 # perform operation + 800044c0: 3ed28333 aes64dsm x6,x5,x13 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c4: 00063383 ld x7,0(x12) + 800044c8: 00638c63 beq x7,x6,800044e0 + 800044cc: 44d0646f jal x8,8000b118 + 800044d0: 800044c0 .word 0x800044c0 + 800044d4: 00000000 .word 0x00000000 + 800044d8: 8001a7bd .word 0x8001a7bd + 800044dc: 00000000 .word 0x00000000 + 800044e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x00000000fffffffe + 800044e4: 000c3703 ld x14,0(x24) + 800044e8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000000000000 + 800044ec: 000c3d83 ld x27,0(x24) + 800044f0: 008c0c13 addi x24,x24,8 + +00000000800044f4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64dsm x20, x14, x27 # perform operation + 800044f4: 3fb70a33 aes64dsm x20,x14,x27 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f8: 00063383 ld x7,0(x12) + 800044fc: 01438c63 beq x7,x20,80004514 + 80004500: 4190646f jal x8,8000b118 + 80004504: 800044f4 .word 0x800044f4 + 80004508: 00000000 .word 0x00000000 + 8000450c: 8001a821 .word 0x8001a821 + 80004510: 00000000 .word 0x00000000 + 80004514: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x00000000fffffffe + 80004518: 000c3583 ld x11,0(x24) + 8000451c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x0000000000000001 + 80004520: 000c3283 ld x5,0(x24) + 80004524: 008c0c13 addi x24,x24,8 + +0000000080004528 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64dsm x31, x11, x5 # perform operation + 80004528: 3e558fb3 aes64dsm x31,x11,x5 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 8000452c: 00063383 ld x7,0(x12) + 80004530: 01f38c63 beq x7,x31,80004548 + 80004534: 3e50646f jal x8,8000b118 + 80004538: 80004528 .word 0x80004528 + 8000453c: 00000000 .word 0x00000000 + 80004540: 8001a87d .word 0x8001a87d + 80004544: 00000000 .word 0x00000000 + 80004548: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x00000000fffffffe + 8000454c: 000c3683 ld x13,0(x24) + 80004550: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000000000002 + 80004554: 000c3d83 ld x27,0(x24) + 80004558: 008c0c13 addi x24,x24,8 + +000000008000455c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64dsm x23, x13, x27 # perform operation + 8000455c: 3fb68bb3 aes64dsm x23,x13,x27 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004560: 00063383 ld x7,0(x12) + 80004564: 01738c63 beq x7,x23,8000457c + 80004568: 3b10646f jal x8,8000b118 + 8000456c: 8000455c .word 0x8000455c + 80004570: 00000000 .word 0x00000000 + 80004574: 8001a8d9 .word 0x8001a8d9 + 80004578: 00000000 .word 0x00000000 + 8000457c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x00000000fffffffe + 80004580: 000c3483 ld x9,0(x24) + 80004584: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x8000000000000000 + 80004588: 000c3d83 ld x27,0(x24) + 8000458c: 008c0c13 addi x24,x24,8 + +0000000080004590 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64dsm x19, x9, x27 # perform operation + 80004590: 3fb489b3 aes64dsm x19,x9,x27 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004594: 00063383 ld x7,0(x12) + 80004598: 01338c63 beq x7,x19,800045b0 + 8000459c: 37d0646f jal x8,8000b118 + 800045a0: 80004590 .word 0x80004590 + 800045a4: 00000000 .word 0x00000000 + 800045a8: 8001a935 .word 0x8001a935 + 800045ac: 00000000 .word 0x00000000 + 800045b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs1: x26 = 0x00000000fffffffe + 800045b4: 000c3d03 ld x26,0(x24) + 800045b8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x8000000000000001 + 800045bc: 000c3683 ld x13,0(x24) + 800045c0: 008c0c13 addi x24,x24,8 + +00000000800045c4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64dsm x27, x26, x13 # perform operation + 800045c4: 3edd0db3 aes64dsm x27,x26,x13 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c8: 00063383 ld x7,0(x12) + 800045cc: 01b38c63 beq x7,x27,800045e4 + 800045d0: 3490646f jal x8,8000b118 + 800045d4: 800045c4 .word 0x800045c4 + 800045d8: 00000000 .word 0x00000000 + 800045dc: 8001a9a0 .word 0x8001a9a0 + 800045e0: 00000000 .word 0x00000000 + 800045e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x00000000fffffffe + 800045e8: 000c3b03 ld x22,0(x24) + 800045ec: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x7fffffffffffffff + 800045f0: 000c3903 ld x18,0(x24) + 800045f4: 008c0c13 addi x24,x24,8 + +00000000800045f8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64dsm x16, x22, x18 # perform operation + 800045f8: 3f2b0833 aes64dsm x16,x22,x18 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045fc: 00063383 ld x7,0(x12) + 80004600: 01038c63 beq x7,x16,80004618 + 80004604: 3150646f jal x8,8000b118 + 80004608: 800045f8 .word 0x800045f8 + 8000460c: 00000000 .word 0x00000000 + 80004610: 8001aa0b .word 0x8001aa0b + 80004614: 00000000 .word 0x00000000 + 80004618: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x00000000fffffffe + 8000461c: 000c3183 ld x3,0(x24) + 80004620: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80004624: 000c3283 ld x5,0(x24) + 80004628: 008c0c13 addi x24,x24,8 + +000000008000462c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64dsm x23, x3, x5 # perform operation + 8000462c: 3e518bb3 aes64dsm x23,x3,x5 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004630: 00063383 ld x7,0(x12) + 80004634: 01738c63 beq x7,x23,8000464c + 80004638: 2e10646f jal x8,8000b118 + 8000463c: 8000462c .word 0x8000462c + 80004640: 00000000 .word 0x00000000 + 80004644: 8001aa76 .word 0x8001aa76 + 80004648: 00000000 .word 0x00000000 + 8000464c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x00000000fffffffe + 80004650: 000c3a83 ld x21,0(x24) + 80004654: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0xffffffffffffffff + 80004658: 000c3283 ld x5,0(x24) + 8000465c: 008c0c13 addi x24,x24,8 + +0000000080004660 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64dsm x31, x21, x5 # perform operation + 80004660: 3e5a8fb3 aes64dsm x31,x21,x5 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004664: 00063383 ld x7,0(x12) + 80004668: 01f38c63 beq x7,x31,80004680 + 8000466c: 2ad0646f jal x8,8000b118 + 80004670: 80004660 .word 0x80004660 + 80004674: 00000000 .word 0x00000000 + 80004678: 8001aae1 .word 0x8001aae1 + 8000467c: 00000000 .word 0x00000000 + 80004680: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x00000000fffffffe + 80004684: 000c3103 ld x2,0(x24) + 80004688: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0xfffffffffffffffe + 8000468c: 000c3083 ld x1,0(x24) + 80004690: 008c0c13 addi x24,x24,8 + +0000000080004694 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64dsm x23, x2, x1 # perform operation + 80004694: 3e110bb3 aes64dsm x23,x2,x1 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004698: 00063383 ld x7,0(x12) + 8000469c: 01738c63 beq x7,x23,800046b4 + 800046a0: 2790646f jal x8,8000b118 + 800046a4: 80004694 .word 0x80004694 + 800046a8: 00000000 .word 0x00000000 + 800046ac: 8001ab4c .word 0x8001ab4c + 800046b0: 00000000 .word 0x00000000 + 800046b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x00000000fffffffe + 800046b8: 000c3803 ld x16,0(x24) + 800046bc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 800046c0: 000c3d03 ld x26,0(x24) + 800046c4: 008c0c13 addi x24,x24,8 + +00000000800046c8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64dsm x6, x16, x26 # perform operation + 800046c8: 3fa80333 aes64dsm x6,x16,x26 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046cc: 00063383 ld x7,0(x12) + 800046d0: 00638c63 beq x7,x6,800046e8 + 800046d4: 2450646f jal x8,8000b118 + 800046d8: 800046c8 .word 0x800046c8 + 800046dc: 00000000 .word 0x00000000 + 800046e0: 8001abb7 .word 0x8001abb7 + 800046e4: 00000000 .word 0x00000000 + 800046e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x00000000fffffffe + 800046ec: 000c3583 ld x11,0(x24) + 800046f0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800046f4: 000c3803 ld x16,0(x24) + 800046f8: 008c0c13 addi x24,x24,8 + +00000000800046fc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x28, x11, x16 # perform operation + 800046fc: 3f058e33 aes64dsm x28,x11,x16 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004700: 00063383 ld x7,0(x12) + 80004704: 01c38c63 beq x7,x28,8000471c + 80004708: 2110646f jal x8,8000b118 + 8000470c: 800046fc .word 0x800046fc + 80004710: 00000000 .word 0x00000000 + 80004714: 8001ac22 .word 0x8001ac22 + 80004718: 00000000 .word 0x00000000 + 8000471c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x00000000fffffffe + 80004720: 000c3d83 ld x27,0(x24) + 80004724: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x5555555555555555 + 80004728: 000c3203 ld x4,0(x24) + 8000472c: 008c0c13 addi x24,x24,8 + +0000000080004730 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64dsm x6, x27, x4 # perform operation + 80004730: 3e4d8333 aes64dsm x6,x27,x4 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004734: 00063383 ld x7,0(x12) + 80004738: 00638c63 beq x7,x6,80004750 + 8000473c: 1dd0646f jal x8,8000b118 + 80004740: 80004730 .word 0x80004730 + 80004744: 00000000 .word 0x00000000 + 80004748: 8001ac8d .word 0x8001ac8d + 8000474c: 00000000 .word 0x00000000 + 80004750: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x00000000fffffffe + 80004754: 000c3783 ld x15,0(x24) + 80004758: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x00000000ffffffff + 8000475c: 000c3b83 ld x23,0(x24) + 80004760: 008c0c13 addi x24,x24,8 + +0000000080004764 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64dsm x14, x15, x23 # perform operation + 80004764: 3f778733 aes64dsm x14,x15,x23 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004768: 00063383 ld x7,0(x12) + 8000476c: 00e38c63 beq x7,x14,80004784 + 80004770: 1a90646f jal x8,8000b118 + 80004774: 80004764 .word 0x80004764 + 80004778: 00000000 .word 0x00000000 + 8000477c: 8001acf8 .word 0x8001acf8 + 80004780: 00000000 .word 0x00000000 + 80004784: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x00000000fffffffe + 80004788: 000c3f03 ld x30,0(x24) + 8000478c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x00000000fffffffe + 80004790: 000c3083 ld x1,0(x24) + 80004794: 008c0c13 addi x24,x24,8 + +0000000080004798 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64dsm x19, x30, x1 # perform operation + 80004798: 3e1f09b3 aes64dsm x19,x30,x1 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 8000479c: 00063383 ld x7,0(x12) + 800047a0: 01338c63 beq x7,x19,800047b8 + 800047a4: 1750646f jal x8,8000b118 + 800047a8: 80004798 .word 0x80004798 + 800047ac: 00000000 .word 0x00000000 + 800047b0: 8001ad5b .word 0x8001ad5b + 800047b4: 00000000 .word 0x00000000 + 800047b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0x00000000fffffffe + 800047bc: 000c3d83 ld x27,0(x24) + 800047c0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x0000000100000000 + 800047c4: 000c3f83 ld x31,0(x24) + 800047c8: 008c0c13 addi x24,x24,8 + +00000000800047cc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64dsm x9, x27, x31 # perform operation + 800047cc: 3ffd84b3 aes64dsm x9,x27,x31 + # Check if x9 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x9, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d0: 00063383 ld x7,0(x12) + 800047d4: 00938c63 beq x7,x9,800047ec + 800047d8: 1410646f jal x8,8000b118 + 800047dc: 800047cc .word 0x800047cc + 800047e0: 00000000 .word 0x00000000 + 800047e4: 8001adbe .word 0x8001adbe + 800047e8: 00000000 .word 0x00000000 + 800047ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x00000000fffffffe + 800047f0: 000c3203 ld x4,0(x24) + 800047f4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x0000000100000001 + 800047f8: 000c3683 ld x13,0(x24) + 800047fc: 008c0c13 addi x24,x24,8 + +0000000080004800 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64dsm x25, x4, x13 # perform operation + 80004800: 3ed20cb3 aes64dsm x25,x4,x13 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004804: 00063383 ld x7,0(x12) + 80004808: 01938c63 beq x7,x25,80004820 + 8000480c: 10d0646f jal x8,8000b118 + 80004810: 80004800 .word 0x80004800 + 80004814: 00000000 .word 0x00000000 + 80004818: 8001ae22 .word 0x8001ae22 + 8000481c: 00000000 .word 0x00000000 + 80004820: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x0000000100000000 + 80004824: 000c3683 ld x13,0(x24) + 80004828: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x0000000000000000 + 8000482c: 000c3c83 ld x25,0(x24) + 80004830: 008c0c13 addi x24,x24,8 + +0000000080004834 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64dsm x5, x13, x25 # perform operation + 80004834: 3f9682b3 aes64dsm x5,x13,x25 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004838: 00063383 ld x7,0(x12) + 8000483c: 00538c63 beq x7,x5,80004854 + 80004840: 0d90646f jal x8,8000b118 + 80004844: 80004834 .word 0x80004834 + 80004848: 00000000 .word 0x00000000 + 8000484c: 8001ae86 .word 0x8001ae86 + 80004850: 00000000 .word 0x00000000 + 80004854: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x0000000100000000 + 80004858: 000c3283 ld x5,0(x24) + 8000485c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0x0000000000000001 + 80004860: 000c3d03 ld x26,0(x24) + 80004864: 008c0c13 addi x24,x24,8 + +0000000080004868 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64dsm x30, x5, x26 # perform operation + 80004868: 3fa28f33 aes64dsm x30,x5,x26 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 8000486c: 00063383 ld x7,0(x12) + 80004870: 01e38c63 beq x7,x30,80004888 + 80004874: 0a50646f jal x8,8000b118 + 80004878: 80004868 .word 0x80004868 + 8000487c: 00000000 .word 0x00000000 + 80004880: 8001aee3 .word 0x8001aee3 + 80004884: 00000000 .word 0x00000000 + 80004888: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x0000000100000000 + 8000488c: 000c3303 ld x6,0(x24) + 80004890: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x0000000000000002 + 80004894: 000c3883 ld x17,0(x24) + 80004898: 008c0c13 addi x24,x24,8 + +000000008000489c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64dsm x14, x6, x17 # perform operation + 8000489c: 3f130733 aes64dsm x14,x6,x17 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a0: 00063383 ld x7,0(x12) + 800048a4: 00e38c63 beq x7,x14,800048bc + 800048a8: 0710646f jal x8,8000b118 + 800048ac: 8000489c .word 0x8000489c + 800048b0: 00000000 .word 0x00000000 + 800048b4: 8001af40 .word 0x8001af40 + 800048b8: 00000000 .word 0x00000000 + 800048bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x0000000100000000 + 800048c0: 000c3683 ld x13,0(x24) + 800048c4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x8000000000000000 + 800048c8: 000c3483 ld x9,0(x24) + 800048cc: 008c0c13 addi x24,x24,8 + +00000000800048d0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64dsm x26, x13, x9 # perform operation + 800048d0: 3e968d33 aes64dsm x26,x13,x9 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d4: 00063383 ld x7,0(x12) + 800048d8: 01a38c63 beq x7,x26,800048f0 + 800048dc: 03d0646f jal x8,8000b118 + 800048e0: 800048d0 .word 0x800048d0 + 800048e4: 00000000 .word 0x00000000 + 800048e8: 8001af9d .word 0x8001af9d + 800048ec: 00000000 .word 0x00000000 + 800048f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000100000000 + 800048f4: 000c3203 ld x4,0(x24) + 800048f8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x8000000000000001 + 800048fc: 000c3983 ld x19,0(x24) + 80004900: 008c0c13 addi x24,x24,8 + +0000000080004904 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64dsm x23, x4, x19 # perform operation + 80004904: 3f320bb3 aes64dsm x23,x4,x19 + # Check if x23 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x23, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004908: 00063383 ld x7,0(x12) + 8000490c: 01738c63 beq x7,x23,80004924 + 80004910: 0090646f jal x8,8000b118 + 80004914: 80004904 .word 0x80004904 + 80004918: 00000000 .word 0x00000000 + 8000491c: 8001b009 .word 0x8001b009 + 80004920: 00000000 .word 0x00000000 + 80004924: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0000000100000000 + 80004928: 000c3e83 ld x29,0(x24) + 8000492c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x7fffffffffffffff + 80004930: 000c3303 ld x6,0(x24) + 80004934: 008c0c13 addi x24,x24,8 + +0000000080004938 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64dsm x20, x29, x6 # perform operation + 80004938: 3e6e8a33 aes64dsm x20,x29,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 8000493c: 00063383 ld x7,0(x12) + 80004940: 01438c63 beq x7,x20,80004958 + 80004944: 7d40646f jal x8,8000b118 + 80004948: 80004938 .word 0x80004938 + 8000494c: 00000000 .word 0x00000000 + 80004950: 8001b075 .word 0x8001b075 + 80004954: 00000000 .word 0x00000000 + 80004958: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x0000000100000000 + 8000495c: 000c3303 ld x6,0(x24) + 80004960: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x7ffffffffffffffe + 80004964: 000c3183 ld x3,0(x24) + 80004968: 008c0c13 addi x24,x24,8 + +000000008000496c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64dsm x4, x6, x3 # perform operation + 8000496c: 3e330233 aes64dsm x4,x6,x3 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004970: 00063383 ld x7,0(x12) + 80004974: 00438c63 beq x7,x4,8000498c + 80004978: 7a00646f jal x8,8000b118 + 8000497c: 8000496c .word 0x8000496c + 80004980: 00000000 .word 0x00000000 + 80004984: 8001b0e1 .word 0x8001b0e1 + 80004988: 00000000 .word 0x00000000 + 8000498c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x0000000100000000 + 80004990: 000c3803 ld x16,0(x24) + 80004994: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x26) # load rs2: x26 = 0xffffffffffffffff + 80004998: 000c3d03 ld x26,0(x24) + 8000499c: 008c0c13 addi x24,x24,8 + +00000000800049a0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64dsm x1, x16, x26 # perform operation + 800049a0: 3fa800b3 aes64dsm x1,x16,x26 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a4: 00063383 ld x7,0(x12) + 800049a8: 00138c63 beq x7,x1,800049c0 + 800049ac: 76c0646f jal x8,8000b118 + 800049b0: 800049a0 .word 0x800049a0 + 800049b4: 00000000 .word 0x00000000 + 800049b8: 8001b14d .word 0x8001b14d + 800049bc: 00000000 .word 0x00000000 + 800049c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x0000000100000000 + 800049c4: 000c3283 ld x5,0(x24) + 800049c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0xfffffffffffffffe + 800049cc: 000c3e83 ld x29,0(x24) + 800049d0: 008c0c13 addi x24,x24,8 + +00000000800049d4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64dsm x18, x5, x29 # perform operation + 800049d4: 3fd28933 aes64dsm x18,x5,x29 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d8: 00063383 ld x7,0(x12) + 800049dc: 01238c63 beq x7,x18,800049f4 + 800049e0: 7380646f jal x8,8000b118 + 800049e4: 800049d4 .word 0x800049d4 + 800049e8: 00000000 .word 0x00000000 + 800049ec: 8001b1b9 .word 0x8001b1b9 + 800049f0: 00000000 .word 0x00000000 + 800049f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000100000000 + 800049f8: 000c3f03 ld x30,0(x24) + 800049fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 80004a00: 000c3c83 ld x25,0(x24) + 80004a04: 008c0c13 addi x24,x24,8 + +0000000080004a08 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64dsm x28, x30, x25 # perform operation + 80004a08: 3f9f0e33 aes64dsm x28,x30,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a0c: 00063383 ld x7,0(x12) + 80004a10: 01c38c63 beq x7,x28,80004a28 + 80004a14: 7040646f jal x8,8000b118 + 80004a18: 80004a08 .word 0x80004a08 + 80004a1c: 00000000 .word 0x00000000 + 80004a20: 8001b225 .word 0x8001b225 + 80004a24: 00000000 .word 0x00000000 + 80004a28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x0000000100000000 + 80004a2c: 000c3f83 ld x31,0(x24) + 80004a30: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80004a34: 000c3483 ld x9,0(x24) + 80004a38: 008c0c13 addi x24,x24,8 + +0000000080004a3c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x14, x31, x9 # perform operation + 80004a3c: 3e9f8733 aes64dsm x14,x31,x9 + # Check if x14 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x14, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a40: 00063383 ld x7,0(x12) + 80004a44: 00e38c63 beq x7,x14,80004a5c + 80004a48: 6d00646f jal x8,8000b118 + 80004a4c: 80004a3c .word 0x80004a3c + 80004a50: 00000000 .word 0x00000000 + 80004a54: 8001b291 .word 0x8001b291 + 80004a58: 00000000 .word 0x00000000 + 80004a5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x0000000100000000 + 80004a60: 000c3e83 ld x29,0(x24) + 80004a64: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs2: x30 = 0x5555555555555555 + 80004a68: 000c3f03 ld x30,0(x24) + 80004a6c: 008c0c13 addi x24,x24,8 + +0000000080004a70 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64dsm x20, x29, x30 # perform operation + 80004a70: 3fee8a33 aes64dsm x20,x29,x30 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a74: 00063383 ld x7,0(x12) + 80004a78: 01438c63 beq x7,x20,80004a90 + 80004a7c: 69c0646f jal x8,8000b118 + 80004a80: 80004a70 .word 0x80004a70 + 80004a84: 00000000 .word 0x00000000 + 80004a88: 8001b2fd .word 0x8001b2fd + 80004a8c: 00000000 .word 0x00000000 + 80004a90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x0000000100000000 + 80004a94: 000c3183 ld x3,0(x24) + 80004a98: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x00000000ffffffff + 80004a9c: 000c3283 ld x5,0(x24) + 80004aa0: 008c0c13 addi x24,x24,8 + +0000000080004aa4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64dsm x16, x3, x5 # perform operation + 80004aa4: 3e518833 aes64dsm x16,x3,x5 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa8: 00063383 ld x7,0(x12) + 80004aac: 01038c63 beq x7,x16,80004ac4 + 80004ab0: 6680646f jal x8,8000b118 + 80004ab4: 80004aa4 .word 0x80004aa4 + 80004ab8: 00000000 .word 0x00000000 + 80004abc: 8001b369 .word 0x8001b369 + 80004ac0: 00000000 .word 0x00000000 + 80004ac4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000100000000 + 80004ac8: 000c3203 ld x4,0(x24) + 80004acc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs2: x31 = 0x00000000fffffffe + 80004ad0: 000c3f83 ld x31,0(x24) + 80004ad4: 008c0c13 addi x24,x24,8 + +0000000080004ad8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64dsm x21, x4, x31 # perform operation + 80004ad8: 3ff20ab3 aes64dsm x21,x4,x31 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004adc: 00063383 ld x7,0(x12) + 80004ae0: 01538c63 beq x7,x21,80004af8 + 80004ae4: 6340646f jal x8,8000b118 + 80004ae8: 80004ad8 .word 0x80004ad8 + 80004aec: 00000000 .word 0x00000000 + 80004af0: 8001b3cd .word 0x8001b3cd + 80004af4: 00000000 .word 0x00000000 + 80004af8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000100000000 + 80004afc: 000c3203 ld x4,0(x24) + 80004b00: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000100000000 + 80004b04: 000c3d83 ld x27,0(x24) + 80004b08: 008c0c13 addi x24,x24,8 + +0000000080004b0c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64dsm x5, x4, x27 # perform operation + 80004b0c: 3fb202b3 aes64dsm x5,x4,x27 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b10: 00063383 ld x7,0(x12) + 80004b14: 00538c63 beq x7,x5,80004b2c + 80004b18: 6000646f jal x8,8000b118 + 80004b1c: 80004b0c .word 0x80004b0c + 80004b20: 00000000 .word 0x00000000 + 80004b24: 8001b431 .word 0x8001b431 + 80004b28: 00000000 .word 0x00000000 + 80004b2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x0000000100000000 + 80004b30: 000c3e03 ld x28,0(x24) + 80004b34: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x0000000100000001 + 80004b38: 000c3183 ld x3,0(x24) + 80004b3c: 008c0c13 addi x24,x24,8 + +0000000080004b40 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64dsm x21, x28, x3 # perform operation + 80004b40: 3e3e0ab3 aes64dsm x21,x28,x3 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b44: 00063383 ld x7,0(x12) + 80004b48: 01538c63 beq x7,x21,80004b60 + 80004b4c: 5cc0646f jal x8,8000b118 + 80004b50: 80004b40 .word 0x80004b40 + 80004b54: 00000000 .word 0x00000000 + 80004b58: 8001b496 .word 0x8001b496 + 80004b5c: 00000000 .word 0x00000000 + 80004b60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0000000100000001 + 80004b64: 000c3783 ld x15,0(x24) + 80004b68: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x0000000000000000 + 80004b6c: 000c3e03 ld x28,0(x24) + 80004b70: 008c0c13 addi x24,x24,8 + +0000000080004b74 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64dsm x29, x15, x28 # perform operation + 80004b74: 3fc78eb3 aes64dsm x29,x15,x28 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b78: 00063383 ld x7,0(x12) + 80004b7c: 01d38c63 beq x7,x29,80004b94 + 80004b80: 5980646f jal x8,8000b118 + 80004b84: 80004b74 .word 0x80004b74 + 80004b88: 00000000 .word 0x00000000 + 80004b8c: 8001b4fb .word 0x8001b4fb + 80004b90: 00000000 .word 0x00000000 + 80004b94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0000000100000001 + 80004b98: 000c3783 ld x15,0(x24) + 80004b9c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x0000000000000001 + 80004ba0: 000c3b03 ld x22,0(x24) + 80004ba4: 008c0c13 addi x24,x24,8 + +0000000080004ba8 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64dsm x27, x15, x22 # perform operation + 80004ba8: 3f678db3 aes64dsm x27,x15,x22 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bac: 00063383 ld x7,0(x12) + 80004bb0: 01b38c63 beq x7,x27,80004bc8 + 80004bb4: 5640646f jal x8,8000b118 + 80004bb8: 80004ba8 .word 0x80004ba8 + 80004bbc: 00000000 .word 0x00000000 + 80004bc0: 8001b558 .word 0x8001b558 + 80004bc4: 00000000 .word 0x00000000 + 80004bc8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x0000000100000001 + 80004bcc: 000c3f83 ld x31,0(x24) + 80004bd0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0x0000000000000002 + 80004bd4: 000c3d83 ld x27,0(x24) + 80004bd8: 008c0c13 addi x24,x24,8 + +0000000080004bdc : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64dsm x18, x31, x27 # perform operation + 80004bdc: 3fbf8933 aes64dsm x18,x31,x27 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be0: 00063383 ld x7,0(x12) + 80004be4: 01238c63 beq x7,x18,80004bfc + 80004be8: 5300646f jal x8,8000b118 + 80004bec: 80004bdc .word 0x80004bdc + 80004bf0: 00000000 .word 0x00000000 + 80004bf4: 8001b5b5 .word 0x8001b5b5 + 80004bf8: 00000000 .word 0x00000000 + 80004bfc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x0000000100000001 + 80004c00: 000c3703 ld x14,0(x24) + 80004c04: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x8000000000000000 + 80004c08: 000c3903 ld x18,0(x24) + 80004c0c: 008c0c13 addi x24,x24,8 + +0000000080004c10 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64dsm x6, x14, x18 # perform operation + 80004c10: 3f270333 aes64dsm x6,x14,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c14: 00063383 ld x7,0(x12) + 80004c18: 00638c63 beq x7,x6,80004c30 + 80004c1c: 4fc0646f jal x8,8000b118 + 80004c20: 80004c10 .word 0x80004c10 + 80004c24: 00000000 .word 0x00000000 + 80004c28: 8001b612 .word 0x8001b612 + 80004c2c: 00000000 .word 0x00000000 + 80004c30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0000000100000001 + 80004c34: 000c3903 ld x18,0(x24) + 80004c38: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x8000000000000001 + 80004c3c: 000c3a83 ld x21,0(x24) + 80004c40: 008c0c13 addi x24,x24,8 + +0000000080004c44 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64dsm x13, x18, x21 # perform operation + 80004c44: 3f5906b3 aes64dsm x13,x18,x21 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c48: 00063383 ld x7,0(x12) + 80004c4c: 00d38c63 beq x7,x13,80004c64 + 80004c50: 4c80646f jal x8,8000b118 + 80004c54: 80004c44 .word 0x80004c44 + 80004c58: 00000000 .word 0x00000000 + 80004c5c: 8001b67e .word 0x8001b67e + 80004c60: 00000000 .word 0x00000000 + 80004c64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0x0000000100000001 + 80004c68: 000c3f83 ld x31,0(x24) + 80004c6c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x7fffffffffffffff + 80004c70: 000c3203 ld x4,0(x24) + 80004c74: 008c0c13 addi x24,x24,8 + +0000000080004c78 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64dsm x25, x31, x4 # perform operation + 80004c78: 3e4f8cb3 aes64dsm x25,x31,x4 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c7c: 00063383 ld x7,0(x12) + 80004c80: 01938c63 beq x7,x25,80004c98 + 80004c84: 4940646f jal x8,8000b118 + 80004c88: 80004c78 .word 0x80004c78 + 80004c8c: 00000000 .word 0x00000000 + 80004c90: 8001b6ea .word 0x8001b6ea + 80004c94: 00000000 .word 0x00000000 + 80004c98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000100000001 + 80004c9c: 000c3f03 ld x30,0(x24) + 80004ca0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80004ca4: 000c3283 ld x5,0(x24) + 80004ca8: 008c0c13 addi x24,x24,8 + +0000000080004cac : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64dsm x6, x30, x5 # perform operation + 80004cac: 3e5f0333 aes64dsm x6,x30,x5 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb0: 00063383 ld x7,0(x12) + 80004cb4: 00638c63 beq x7,x6,80004ccc + 80004cb8: 4600646f jal x8,8000b118 + 80004cbc: 80004cac .word 0x80004cac + 80004cc0: 00000000 .word 0x00000000 + 80004cc4: 8001b756 .word 0x8001b756 + 80004cc8: 00000000 .word 0x00000000 + 80004ccc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x0000000100000001 + 80004cd0: 000c3483 ld x9,0(x24) + 80004cd4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xffffffffffffffff + 80004cd8: 000c3583 ld x11,0(x24) + 80004cdc: 008c0c13 addi x24,x24,8 + +0000000080004ce0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64dsm x1, x9, x11 # perform operation + 80004ce0: 3eb480b3 aes64dsm x1,x9,x11 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce4: 00063383 ld x7,0(x12) + 80004ce8: 00138c63 beq x7,x1,80004d00 + 80004cec: 42c0646f jal x8,8000b118 + 80004cf0: 80004ce0 .word 0x80004ce0 + 80004cf4: 00000000 .word 0x00000000 + 80004cf8: 8001b7c2 .word 0x8001b7c2 + 80004cfc: 00000000 .word 0x00000000 + 80004d00: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x0000000100000001 + 80004d04: 000c3203 ld x4,0(x24) + 80004d08: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xfffffffffffffffe + 80004d0c: 000c3783 ld x15,0(x24) + 80004d10: 008c0c13 addi x24,x24,8 + +0000000080004d14 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64dsm x17, x4, x15 # perform operation + 80004d14: 3ef208b3 aes64dsm x17,x4,x15 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d18: 00063383 ld x7,0(x12) + 80004d1c: 01138c63 beq x7,x17,80004d34 + 80004d20: 3f80646f jal x8,8000b118 + 80004d24: 80004d14 .word 0x80004d14 + 80004d28: 00000000 .word 0x00000000 + 80004d2c: 8001b82e .word 0x8001b82e + 80004d30: 00000000 .word 0x00000000 + 80004d34: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x0000000100000001 + 80004d38: 000c3703 ld x14,0(x24) + 80004d3c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80004d40: 000c3e83 ld x29,0(x24) + 80004d44: 008c0c13 addi x24,x24,8 + +0000000080004d48 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64dsm x15, x14, x29 # perform operation + 80004d48: 3fd707b3 aes64dsm x15,x14,x29 + # Check if x15 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x15, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d4c: 00063383 ld x7,0(x12) + 80004d50: 00f38c63 beq x7,x15,80004d68 + 80004d54: 3c40646f jal x8,8000b118 + 80004d58: 80004d48 .word 0x80004d48 + 80004d5c: 00000000 .word 0x00000000 + 80004d60: 8001b89a .word 0x8001b89a + 80004d64: 00000000 .word 0x00000000 + 80004d68: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x0000000100000001 + 80004d6c: 000c3083 ld x1,0(x24) + 80004d70: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80004d74: 000c3483 ld x9,0(x24) + 80004d78: 008c0c13 addi x24,x24,8 + +0000000080004d7c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64dsm x5, x1, x9 # perform operation + 80004d7c: 3e9082b3 aes64dsm x5,x1,x9 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d80: 00063383 ld x7,0(x12) + 80004d84: 00538c63 beq x7,x5,80004d9c + 80004d88: 3900646f jal x8,8000b118 + 80004d8c: 80004d7c .word 0x80004d7c + 80004d90: 00000000 .word 0x00000000 + 80004d94: 8001b906 .word 0x8001b906 + 80004d98: 00000000 .word 0x00000000 + 80004d9c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x0000000100000001 + 80004da0: 000c3983 ld x19,0(x24) + 80004da4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x5555555555555555 + 80004da8: 000c3b83 ld x23,0(x24) + 80004dac: 008c0c13 addi x24,x24,8 + +0000000080004db0 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64dsm x28, x19, x23 # perform operation + 80004db0: 3f798e33 aes64dsm x28,x19,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x28, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db4: 00063383 ld x7,0(x12) + 80004db8: 01c38c63 beq x7,x28,80004dd0 + 80004dbc: 35c0646f jal x8,8000b118 + 80004dc0: 80004db0 .word 0x80004db0 + 80004dc4: 00000000 .word 0x00000000 + 80004dc8: 8001b972 .word 0x8001b972 + 80004dcc: 00000000 .word 0x00000000 + 80004dd0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x0000000100000001 + 80004dd4: 000c3103 ld x2,0(x24) + 80004dd8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x00000000ffffffff + 80004ddc: 000c3283 ld x5,0(x24) + 80004de0: 008c0c13 addi x24,x24,8 + +0000000080004de4 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64dsm x25, x2, x5 # perform operation + 80004de4: 3e510cb3 aes64dsm x25,x2,x5 + # Check if x25 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x25, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de8: 00063383 ld x7,0(x12) + 80004dec: 01938c63 beq x7,x25,80004e04 + 80004df0: 3280646f jal x8,8000b118 + 80004df4: 80004de4 .word 0x80004de4 + 80004df8: 00000000 .word 0x00000000 + 80004dfc: 8001b9de .word 0x8001b9de + 80004e00: 00000000 .word 0x00000000 + 80004e04: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0x0000000100000001 + 80004e08: 000c3f03 ld x30,0(x24) + 80004e0c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x00000000fffffffe + 80004e10: 000c3303 ld x6,0(x24) + 80004e14: 008c0c13 addi x24,x24,8 + +0000000080004e18 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64dsm x11, x30, x6 # perform operation + 80004e18: 3e6f05b3 aes64dsm x11,x30,x6 + # Check if x11 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x11, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e1c: 00063383 ld x7,0(x12) + 80004e20: 00b38c63 beq x7,x11,80004e38 + 80004e24: 2f40646f jal x8,8000b118 + 80004e28: 80004e18 .word 0x80004e18 + 80004e2c: 00000000 .word 0x00000000 + 80004e30: 8001ba42 .word 0x8001ba42 + 80004e34: 00000000 .word 0x00000000 + 80004e38: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x0000000100000001 + 80004e3c: 000c3a83 ld x21,0(x24) + 80004e40: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x0000000100000000 + 80004e44: 000c3803 ld x16,0(x24) + 80004e48: 008c0c13 addi x24,x24,8 + +0000000080004e4c : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64dsm x5, x21, x16 # perform operation + 80004e4c: 3f0a82b3 aes64dsm x5,x21,x16 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e50: 00063383 ld x7,0(x12) + 80004e54: 00538c63 beq x7,x5,80004e6c + 80004e58: 2c00646f jal x8,8000b118 + 80004e5c: 80004e4c .word 0x80004e4c + 80004e60: 00000000 .word 0x00000000 + 80004e64: 8001baa6 .word 0x8001baa6 + 80004e68: 00000000 .word 0x00000000 + 80004e6c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x0000000100000001 + 80004e70: 000c3983 ld x19,0(x24) + 80004e74: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x0000000100000001 + 80004e78: 000c3a83 ld x21,0(x24) + 80004e7c: 008c0c13 addi x24,x24,8 + +0000000080004e80 : +Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64dsm x18, x19, x21 # perform operation + 80004e80: 3f598933 aes64dsm x18,x19,x21 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zknd_aes64dsm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e84: 00063383 ld x7,0(x12) + 80004e88: 01238c63 beq x7,x18,80004ea0 + 80004e8c: 28c0646f jal x8,8000b118 + 80004e90: 80004e80 .word 0x80004e80 + 80004e94: 00000000 .word 0x00000000 + 80004e98: 8001bb0b .word 0x8001bb0b + 80004e9c: 00000000 .word 0x00000000 + 80004ea0: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x803717ef5f3ca766 + 80004ea4: 000c3003 ld x0,0(x24) + 80004ea8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x557712abe371a7e8 + 80004eac: 000c3003 ld x0,0(x24) + 80004eb0: 008c0c13 addi x24,x24,8 + +0000000080004eb4 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b0: + aes64dsm x29, x0, x0 # perform operation + 80004eb4: 3e000eb3 aes64dsm x29,x0,x0 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64dsm_cg_cmp_rs1_rs2_b0, Zknd_aes64dsm_cg_cmp_rs1_rs2_b0_str) + 80004eb8: 00063383 ld x7,0(x12) + 80004ebc: 01d38c63 beq x7,x29,80004ed4 + 80004ec0: 2580646f jal x8,8000b118 + 80004ec4: 80004eb4 .word 0x80004eb4 + 80004ec8: 00000000 .word 0x00000000 + 80004ecc: 8001bb70 .word 0x8001bb70 + 80004ed0: 00000000 .word 0x00000000 + 80004ed4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x990f929dff2ea507 + 80004ed8: 000c3083 ld x1,0(x24) + 80004edc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs2: x1 = 0x157e9e6887db8ab3 + 80004ee0: 000c3083 ld x1,0(x24) + 80004ee4: 008c0c13 addi x24,x24,8 + +0000000080004ee8 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b1: + aes64dsm x17, x1, x1 # perform operation + 80004ee8: 3e1088b3 aes64dsm x17,x1,x1 + # Check if x17 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x17, Zknd_aes64dsm_cg_cmp_rs1_rs2_b1, Zknd_aes64dsm_cg_cmp_rs1_rs2_b1_str) + 80004eec: 00063383 ld x7,0(x12) + 80004ef0: 01138c63 beq x7,x17,80004f08 + 80004ef4: 2240646f jal x8,8000b118 + 80004ef8: 80004ee8 .word 0x80004ee8 + 80004efc: 00000000 .word 0x00000000 + 80004f00: 8001bbac .word 0x8001bbac + 80004f04: 00000000 .word 0x00000000 + 80004f08: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0xf661b37cae0fbe42 + 80004f0c: 000c3103 ld x2,0(x24) + 80004f10: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x559eeae77ccdb985 + 80004f14: 000c3103 ld x2,0(x24) + 80004f18: 008c0c13 addi x24,x24,8 + +0000000080004f1c : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b2: + aes64dsm x9, x2, x2 # perform operation + 80004f1c: 3e2104b3 aes64dsm x9,x2,x2 + # Check if x9 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x9, Zknd_aes64dsm_cg_cmp_rs1_rs2_b2, Zknd_aes64dsm_cg_cmp_rs1_rs2_b2_str) + 80004f20: 00063383 ld x7,0(x12) + 80004f24: 00938c63 beq x7,x9,80004f3c + 80004f28: 1f00646f jal x8,8000b118 + 80004f2c: 80004f1c .word 0x80004f1c + 80004f30: 00000000 .word 0x00000000 + 80004f34: 8001bbe8 .word 0x8001bbe8 + 80004f38: 00000000 .word 0x00000000 + 80004f3c: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xcbb42139c6ac4c91 + 80004f40: 000c3183 ld x3,0(x24) + 80004f44: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xa9f011c13ce0762c + 80004f48: 000c3183 ld x3,0(x24) + 80004f4c: 008c0c13 addi x24,x24,8 + +0000000080004f50 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b3: + aes64dsm x13, x3, x3 # perform operation + 80004f50: 3e3186b3 aes64dsm x13,x3,x3 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknd_aes64dsm_cg_cmp_rs1_rs2_b3, Zknd_aes64dsm_cg_cmp_rs1_rs2_b3_str) + 80004f54: 00063383 ld x7,0(x12) + 80004f58: 00d38c63 beq x7,x13,80004f70 + 80004f5c: 1bc0646f jal x8,8000b118 + 80004f60: 80004f50 .word 0x80004f50 + 80004f64: 00000000 .word 0x00000000 + 80004f68: 8001bc24 .word 0x8001bc24 + 80004f6c: 00000000 .word 0x00000000 + 80004f70: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x34a2e9b7521517be + 80004f74: 000c3203 ld x4,0(x24) + 80004f78: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x73da72732753c6d5 + 80004f7c: 000c3203 ld x4,0(x24) + 80004f80: 008c0c13 addi x24,x24,8 + +0000000080004f84 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b4: + aes64dsm x0, x4, x4 # perform operation + 80004f84: 3e420033 aes64dsm x0,x4,x4 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zknd_aes64dsm_cg_cmp_rs1_rs2_b4, Zknd_aes64dsm_cg_cmp_rs1_rs2_b4_str) + 80004f88: 00063383 ld x7,0(x12) + 80004f8c: 00038c63 beq x7,x0,80004fa4 + 80004f90: 1880646f jal x8,8000b118 + 80004f94: 80004f84 .word 0x80004f84 + 80004f98: 00000000 .word 0x00000000 + 80004f9c: 8001bc60 .word 0x8001bc60 + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x07d004969777b4ab + 80004fa8: 000c3283 ld x5,0(x24) + 80004fac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs2: x5 = 0x16b2fc93c50f73c8 + 80004fb0: 000c3283 ld x5,0(x24) + 80004fb4: 008c0c13 addi x24,x24,8 + +0000000080004fb8 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b5: + aes64dsm x27, x5, x5 # perform operation + 80004fb8: 3e528db3 aes64dsm x27,x5,x5 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zknd_aes64dsm_cg_cmp_rs1_rs2_b5, Zknd_aes64dsm_cg_cmp_rs1_rs2_b5_str) + 80004fbc: 00063383 ld x7,0(x12) + 80004fc0: 01b38c63 beq x7,x27,80004fd8 + 80004fc4: 1540646f jal x8,8000b118 + 80004fc8: 80004fb8 .word 0x80004fb8 + 80004fcc: 00000000 .word 0x00000000 + 80004fd0: 8001bc9c .word 0x8001bc9c + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xd51087b55603bc08 + 80004fdc: 000c3303 ld x6,0(x24) + 80004fe0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0x998d1d700f73027d + 80004fe4: 000c3303 ld x6,0(x24) + 80004fe8: 008c0c13 addi x24,x24,8 + +0000000080004fec : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b6: + aes64dsm x26, x6, x6 # perform operation + 80004fec: 3e630d33 aes64dsm x26,x6,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zknd_aes64dsm_cg_cmp_rs1_rs2_b6, Zknd_aes64dsm_cg_cmp_rs1_rs2_b6_str) + 80004ff0: 00063383 ld x7,0(x12) + 80004ff4: 01a38c63 beq x7,x26,8000500c + 80004ff8: 1200646f jal x8,8000b118 + 80004ffc: 80004fec .word 0x80004fec + 80005000: 00000000 .word 0x00000000 + 80005004: 8001bcd8 .word 0x8001bcd8 + 80005008: 00000000 .word 0x00000000 + 8000500c: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005010: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005014: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0xa18a7ca5e9767daf + 80005018: 000c3383 ld x7,0(x24) + 8000501c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x117d6672855d9607 + 80005020: 000c3383 ld x7,0(x24) + 80005024: 008c0c13 addi x24,x24,8 + +0000000080005028 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b7: + aes64dsm x18, x7, x7 # perform operation + 80005028: 3e738933 aes64dsm x18,x7,x7 + # Check if x18 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x18, Zknd_aes64dsm_cg_cmp_rs1_rs2_b7, Zknd_aes64dsm_cg_cmp_rs1_rs2_b7_str) + 8000502c: 00063683 ld x13,0(x12) + 80005030: 01268c63 beq x13,x18,80005048 + 80005034: 10c0676f jal x14,8000b140 + 80005038: 80005028 .word 0x80005028 + 8000503c: 00000000 .word 0x00000000 + 80005040: 8001bd14 .word 0x8001bd14 + 80005044: 00000000 .word 0x00000000 + 80005048: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0xc523ec3241d31ddd + 8000504c: 000c3403 ld x8,0(x24) + 80005050: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0xd3a06bffa35f4ef3 + 80005054: 000c3403 ld x8,0(x24) + 80005058: 008c0c13 addi x24,x24,8 + +000000008000505c : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b8: + aes64dsm x26, x8, x8 # perform operation + 8000505c: 3e840d33 aes64dsm x26,x8,x8 + # Check if x26 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x26, Zknd_aes64dsm_cg_cmp_rs1_rs2_b8, Zknd_aes64dsm_cg_cmp_rs1_rs2_b8_str) + 80005060: 00063683 ld x13,0(x12) + 80005064: 01a68c63 beq x13,x26,8000507c + 80005068: 0d80676f jal x14,8000b140 + 8000506c: 8000505c .word 0x8000505c + 80005070: 00000000 .word 0x00000000 + 80005074: 8001bd50 .word 0x8001bd50 + 80005078: 00000000 .word 0x00000000 + 8000507c: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xbb37db7b397fdadd + 80005080: 000c3483 ld x9,0(x24) + 80005084: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x5e1a19c045e20bcc + 80005088: 000c3483 ld x9,0(x24) + 8000508c: 008c0c13 addi x24,x24,8 + +0000000080005090 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b9: + aes64dsm x6, x9, x9 # perform operation + 80005090: 3e948333 aes64dsm x6,x9,x9 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zknd_aes64dsm_cg_cmp_rs1_rs2_b9, Zknd_aes64dsm_cg_cmp_rs1_rs2_b9_str) + 80005094: 00063683 ld x13,0(x12) + 80005098: 00668c63 beq x13,x6,800050b0 + 8000509c: 0a40676f jal x14,8000b140 + 800050a0: 80005090 .word 0x80005090 + 800050a4: 00000000 .word 0x00000000 + 800050a8: 8001bd8c .word 0x8001bd8c + 800050ac: 00000000 .word 0x00000000 + 800050b0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x780a4e9a0253985b + 800050b4: 000c3503 ld x10,0(x24) + 800050b8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x8f45df559b167fca + 800050bc: 000c3503 ld x10,0(x24) + 800050c0: 008c0c13 addi x24,x24,8 + +00000000800050c4 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b10: + aes64dsm x30, x10, x10 # perform operation + 800050c4: 3ea50f33 aes64dsm x30,x10,x10 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zknd_aes64dsm_cg_cmp_rs1_rs2_b10, Zknd_aes64dsm_cg_cmp_rs1_rs2_b10_str) + 800050c8: 00063683 ld x13,0(x12) + 800050cc: 01e68c63 beq x13,x30,800050e4 + 800050d0: 0700676f jal x14,8000b140 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 8001bdc8 .word 0x8001bdc8 + 800050e0: 00000000 .word 0x00000000 + 800050e4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0xdd2e59c48b95b7de + 800050e8: 000c3583 ld x11,0(x24) + 800050ec: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xdfc44229c84287d2 + 800050f0: 000c3583 ld x11,0(x24) + 800050f4: 008c0c13 addi x24,x24,8 + +00000000800050f8 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b11: + aes64dsm x30, x11, x11 # perform operation + 800050f8: 3eb58f33 aes64dsm x30,x11,x11 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zknd_aes64dsm_cg_cmp_rs1_rs2_b11, Zknd_aes64dsm_cg_cmp_rs1_rs2_b11_str) + 800050fc: 00063683 ld x13,0(x12) + 80005100: 01e68c63 beq x13,x30,80005118 + 80005104: 03c0676f jal x14,8000b140 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 8001be05 .word 0x8001be05 + 80005114: 00000000 .word 0x00000000 + 80005118: 00860613 addi x12,x12,8 + + mv x17, x12 # switch signature pointer register to avoid conflict with test + 8000511c: 00060893 addi x17,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0xd0bec0c5cd740035 + 80005120: 000c3603 ld x12,0(x24) + 80005124: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0x3b730e27cb2eda16 + 80005128: 000c3603 ld x12,0(x24) + 8000512c: 008c0c13 addi x24,x24,8 + +0000000080005130 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b12: + aes64dsm x21, x12, x12 # perform operation + 80005130: 3ec60ab3 aes64dsm x21,x12,x12 + # Check if x21 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x21, Zknd_aes64dsm_cg_cmp_rs1_rs2_b12, Zknd_aes64dsm_cg_cmp_rs1_rs2_b12_str) + 80005134: 0008b683 ld x13,0(x17) + 80005138: 01568c63 beq x13,x21,80005150 + 8000513c: 0040676f jal x14,8000b140 + 80005140: 80005130 .word 0x80005130 + 80005144: 00000000 .word 0x00000000 + 80005148: 8001be42 .word 0x8001be42 + 8000514c: 00000000 .word 0x00000000 + 80005150: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005154: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005158: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x03b581a50930c8be + 8000515c: 000c3683 ld x13,0(x24) + 80005160: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xb62db985b758d358 + 80005164: 000c3683 ld x13,0(x24) + 80005168: 008c0c13 addi x24,x24,8 + +000000008000516c : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b13: + aes64dsm x3, x13, x13 # perform operation + 8000516c: 3ed681b3 aes64dsm x3,x13,x13 + # Check if x3 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x3, Zknd_aes64dsm_cg_cmp_rs1_rs2_b13, Zknd_aes64dsm_cg_cmp_rs1_rs2_b13_str) + 80005170: 0008b383 ld x7,0(x17) + 80005174: 00338c63 beq x7,x3,8000518c + 80005178: 7a10546f jal x8,8000b118 + 8000517c: 8000516c .word 0x8000516c + 80005180: 00000000 .word 0x00000000 + 80005184: 8001be7f .word 0x8001be7f + 80005188: 00000000 .word 0x00000000 + 8000518c: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xd2d7e33aa278c8d9 + 80005190: 000c3703 ld x14,0(x24) + 80005194: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xdaa4d0fd2a27e46a + 80005198: 000c3703 ld x14,0(x24) + 8000519c: 008c0c13 addi x24,x24,8 + +00000000800051a0 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b14: + aes64dsm x2, x14, x14 # perform operation + 800051a0: 3ee70133 aes64dsm x2,x14,x14 + # Check if x2 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x2, Zknd_aes64dsm_cg_cmp_rs1_rs2_b14, Zknd_aes64dsm_cg_cmp_rs1_rs2_b14_str) + 800051a4: 0008b383 ld x7,0(x17) + 800051a8: 00238c63 beq x7,x2,800051c0 + 800051ac: 76d0546f jal x8,8000b118 + 800051b0: 800051a0 .word 0x800051a0 + 800051b4: 00000000 .word 0x00000000 + 800051b8: 8001bebc .word 0x8001bebc + 800051bc: 00000000 .word 0x00000000 + 800051c0: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x9918c6a53a742c37 + 800051c4: 000c3783 ld x15,0(x24) + 800051c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xadef4027666413a0 + 800051cc: 000c3783 ld x15,0(x24) + 800051d0: 008c0c13 addi x24,x24,8 + +00000000800051d4 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b15: + aes64dsm x29, x15, x15 # perform operation + 800051d4: 3ef78eb3 aes64dsm x29,x15,x15 + # Check if x29 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x29, Zknd_aes64dsm_cg_cmp_rs1_rs2_b15, Zknd_aes64dsm_cg_cmp_rs1_rs2_b15_str) + 800051d8: 0008b383 ld x7,0(x17) + 800051dc: 01d38c63 beq x7,x29,800051f4 + 800051e0: 7390546f jal x8,8000b118 + 800051e4: 800051d4 .word 0x800051d4 + 800051e8: 00000000 .word 0x00000000 + 800051ec: 8001bef9 .word 0x8001bef9 + 800051f0: 00000000 .word 0x00000000 + 800051f4: 00888893 addi x17,x17,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x48ca464b6567c74f + 800051f8: 000c3803 ld x16,0(x24) + 800051fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x7c9c231da5d5661e + 80005200: 000c3803 ld x16,0(x24) + 80005204: 008c0c13 addi x24,x24,8 + +0000000080005208 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b16: + aes64dsm x20, x16, x16 # perform operation + 80005208: 3f080a33 aes64dsm x20,x16,x16 + # Check if x20 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x20, Zknd_aes64dsm_cg_cmp_rs1_rs2_b16, Zknd_aes64dsm_cg_cmp_rs1_rs2_b16_str) + 8000520c: 0008b383 ld x7,0(x17) + 80005210: 01438c63 beq x7,x20,80005228 + 80005214: 7050546f jal x8,8000b118 + 80005218: 80005208 .word 0x80005208 + 8000521c: 00000000 .word 0x00000000 + 80005220: 8001bf36 .word 0x8001bf36 + 80005224: 00000000 .word 0x00000000 + 80005228: 00888893 addi x17,x17,8 + + mv x9, x17 # switch signature pointer register to avoid conflict with test + 8000522c: 00088493 addi x9,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x7e3df73036a533f7 + 80005230: 000c3883 ld x17,0(x24) + 80005234: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0x0668d671dd3cd105 + 80005238: 000c3883 ld x17,0(x24) + 8000523c: 008c0c13 addi x24,x24,8 + +0000000080005240 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b17: + aes64dsm x28, x17, x17 # perform operation + 80005240: 3f188e33 aes64dsm x28,x17,x17 + # Check if x28 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x28, Zknd_aes64dsm_cg_cmp_rs1_rs2_b17, Zknd_aes64dsm_cg_cmp_rs1_rs2_b17_str) + 80005244: 0004b383 ld x7,0(x9) + 80005248: 01c38c63 beq x7,x28,80005260 + 8000524c: 6cd0546f jal x8,8000b118 + 80005250: 80005240 .word 0x80005240 + 80005254: 00000000 .word 0x00000000 + 80005258: 8001bf73 .word 0x8001bf73 + 8000525c: 00000000 .word 0x00000000 + 80005260: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x3add0bf0cf477197 + 80005264: 000c3903 ld x18,0(x24) + 80005268: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x09b7c409e897eabd + 8000526c: 000c3903 ld x18,0(x24) + 80005270: 008c0c13 addi x24,x24,8 + +0000000080005274 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b18: + aes64dsm x17, x18, x18 # perform operation + 80005274: 3f2908b3 aes64dsm x17,x18,x18 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zknd_aes64dsm_cg_cmp_rs1_rs2_b18, Zknd_aes64dsm_cg_cmp_rs1_rs2_b18_str) + 80005278: 0004b383 ld x7,0(x9) + 8000527c: 01138c63 beq x7,x17,80005294 + 80005280: 6990546f jal x8,8000b118 + 80005284: 80005274 .word 0x80005274 + 80005288: 00000000 .word 0x00000000 + 8000528c: 8001bfb0 .word 0x8001bfb0 + 80005290: 00000000 .word 0x00000000 + 80005294: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0xce30d1dfdcd50e58 + 80005298: 000c3983 ld x19,0(x24) + 8000529c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x1ca4ab411f86caf0 + 800052a0: 000c3983 ld x19,0(x24) + 800052a4: 008c0c13 addi x24,x24,8 + +00000000800052a8 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b19: + aes64dsm x30, x19, x19 # perform operation + 800052a8: 3f398f33 aes64dsm x30,x19,x19 + # Check if x30 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x30, Zknd_aes64dsm_cg_cmp_rs1_rs2_b19, Zknd_aes64dsm_cg_cmp_rs1_rs2_b19_str) + 800052ac: 0004b383 ld x7,0(x9) + 800052b0: 01e38c63 beq x7,x30,800052c8 + 800052b4: 6650546f jal x8,8000b118 + 800052b8: 800052a8 .word 0x800052a8 + 800052bc: 00000000 .word 0x00000000 + 800052c0: 8001bfed .word 0x8001bfed + 800052c4: 00000000 .word 0x00000000 + 800052c8: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x108a479d7ac9a1bd + 800052cc: 000c3a03 ld x20,0(x24) + 800052d0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xcd8fd8dc3c4a2781 + 800052d4: 000c3a03 ld x20,0(x24) + 800052d8: 008c0c13 addi x24,x24,8 + +00000000800052dc : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b20: + aes64dsm x10, x20, x20 # perform operation + 800052dc: 3f4a0533 aes64dsm x10,x20,x20 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zknd_aes64dsm_cg_cmp_rs1_rs2_b20, Zknd_aes64dsm_cg_cmp_rs1_rs2_b20_str) + 800052e0: 0004b383 ld x7,0(x9) + 800052e4: 00a38c63 beq x7,x10,800052fc + 800052e8: 6310546f jal x8,8000b118 + 800052ec: 800052dc .word 0x800052dc + 800052f0: 00000000 .word 0x00000000 + 800052f4: 8001c02a .word 0x8001c02a + 800052f8: 00000000 .word 0x00000000 + 800052fc: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xd854f1d97a1605ae + 80005300: 000c3a83 ld x21,0(x24) + 80005304: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x2628de1fd583ad9d + 80005308: 000c3a83 ld x21,0(x24) + 8000530c: 008c0c13 addi x24,x24,8 + +0000000080005310 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b21: + aes64dsm x17, x21, x21 # perform operation + 80005310: 3f5a88b3 aes64dsm x17,x21,x21 + # Check if x17 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x17, Zknd_aes64dsm_cg_cmp_rs1_rs2_b21, Zknd_aes64dsm_cg_cmp_rs1_rs2_b21_str) + 80005314: 0004b383 ld x7,0(x9) + 80005318: 01138c63 beq x7,x17,80005330 + 8000531c: 5fd0546f jal x8,8000b118 + 80005320: 80005310 .word 0x80005310 + 80005324: 00000000 .word 0x00000000 + 80005328: 8001c067 .word 0x8001c067 + 8000532c: 00000000 .word 0x00000000 + 80005330: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x1229cb07c3b55077 + 80005334: 000c3b03 ld x22,0(x24) + 80005338: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x9c86bfe93d16e066 + 8000533c: 000c3b03 ld x22,0(x24) + 80005340: 008c0c13 addi x24,x24,8 + +0000000080005344 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b22: + aes64dsm x4, x22, x22 # perform operation + 80005344: 3f6b0233 aes64dsm x4,x22,x22 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zknd_aes64dsm_cg_cmp_rs1_rs2_b22, Zknd_aes64dsm_cg_cmp_rs1_rs2_b22_str) + 80005348: 0004b383 ld x7,0(x9) + 8000534c: 00438c63 beq x7,x4,80005364 + 80005350: 5c90546f jal x8,8000b118 + 80005354: 80005344 .word 0x80005344 + 80005358: 00000000 .word 0x00000000 + 8000535c: 8001c0a4 .word 0x8001c0a4 + 80005360: 00000000 .word 0x00000000 + 80005364: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x8367657ab47b2b67 + 80005368: 000c3b83 ld x23,0(x24) + 8000536c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x2d7cdec8d96aa604 + 80005370: 000c3b83 ld x23,0(x24) + 80005374: 008c0c13 addi x24,x24,8 + +0000000080005378 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b23: + aes64dsm x31, x23, x23 # perform operation + 80005378: 3f7b8fb3 aes64dsm x31,x23,x23 + # Check if x31 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x31, Zknd_aes64dsm_cg_cmp_rs1_rs2_b23, Zknd_aes64dsm_cg_cmp_rs1_rs2_b23_str) + 8000537c: 0004b383 ld x7,0(x9) + 80005380: 01f38c63 beq x7,x31,80005398 + 80005384: 5950546f jal x8,8000b118 + 80005388: 80005378 .word 0x80005378 + 8000538c: 00000000 .word 0x00000000 + 80005390: 8001c0e1 .word 0x8001c0e1 + 80005394: 00000000 .word 0x00000000 + 80005398: 00848493 addi x9,x9,8 + + mv x6, x24 # switch data pointer register to avoid conflict with test + 8000539c: 000c0313 addi x6,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xbf1e4e9ac4ad218f + 800053a0: 00033c03 ld x24,0(x6) + 800053a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xa2a37637d26c0fad + 800053a8: 00033c03 ld x24,0(x6) + 800053ac: 00830313 addi x6,x6,8 + +00000000800053b0 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b24: + aes64dsm x2, x24, x24 # perform operation + 800053b0: 3f8c0133 aes64dsm x2,x24,x24 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zknd_aes64dsm_cg_cmp_rs1_rs2_b24, Zknd_aes64dsm_cg_cmp_rs1_rs2_b24_str) + 800053b4: 0004b383 ld x7,0(x9) + 800053b8: 00238c63 beq x7,x2,800053d0 + 800053bc: 55d0546f jal x8,8000b118 + 800053c0: 800053b0 .word 0x800053b0 + 800053c4: 00000000 .word 0x00000000 + 800053c8: 8001c11e .word 0x8001c11e + 800053cc: 00000000 .word 0x00000000 + 800053d0: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xc4e0e54148da42b7 + 800053d4: 00033c83 ld x25,0(x6) + 800053d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xae8cb3dc9f7721d3 + 800053dc: 00033c83 ld x25,0(x6) + 800053e0: 00830313 addi x6,x6,8 + +00000000800053e4 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b25: + aes64dsm x10, x25, x25 # perform operation + 800053e4: 3f9c8533 aes64dsm x10,x25,x25 + # Check if x10 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x10, Zknd_aes64dsm_cg_cmp_rs1_rs2_b25, Zknd_aes64dsm_cg_cmp_rs1_rs2_b25_str) + 800053e8: 0004b383 ld x7,0(x9) + 800053ec: 00a38c63 beq x7,x10,80005404 + 800053f0: 5290546f jal x8,8000b118 + 800053f4: 800053e4 .word 0x800053e4 + 800053f8: 00000000 .word 0x00000000 + 800053fc: 8001c15b .word 0x8001c15b + 80005400: 00000000 .word 0x00000000 + 80005404: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x50c0d6f20c8bf5c9 + 80005408: 00033d03 ld x26,0(x6) + 8000540c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x538ef76f7bdaf390 + 80005410: 00033d03 ld x26,0(x6) + 80005414: 00830313 addi x6,x6,8 + +0000000080005418 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b26: + aes64dsm x19, x26, x26 # perform operation + 80005418: 3fad09b3 aes64dsm x19,x26,x26 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zknd_aes64dsm_cg_cmp_rs1_rs2_b26, Zknd_aes64dsm_cg_cmp_rs1_rs2_b26_str) + 8000541c: 0004b383 ld x7,0(x9) + 80005420: 01338c63 beq x7,x19,80005438 + 80005424: 4f50546f jal x8,8000b118 + 80005428: 80005418 .word 0x80005418 + 8000542c: 00000000 .word 0x00000000 + 80005430: 8001c198 .word 0x8001c198 + 80005434: 00000000 .word 0x00000000 + 80005438: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x59ffedd813482345 + 8000543c: 00033d83 ld x27,0(x6) + 80005440: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xd3c21b3440a4b2c1 + 80005444: 00033d83 ld x27,0(x6) + 80005448: 00830313 addi x6,x6,8 + +000000008000544c : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b27: + aes64dsm x19, x27, x27 # perform operation + 8000544c: 3fbd89b3 aes64dsm x19,x27,x27 + # Check if x19 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x19, Zknd_aes64dsm_cg_cmp_rs1_rs2_b27, Zknd_aes64dsm_cg_cmp_rs1_rs2_b27_str) + 80005450: 0004b383 ld x7,0(x9) + 80005454: 01338c63 beq x7,x19,8000546c + 80005458: 4c10546f jal x8,8000b118 + 8000545c: 8000544c .word 0x8000544c + 80005460: 00000000 .word 0x00000000 + 80005464: 8001c1d5 .word 0x8001c1d5 + 80005468: 00000000 .word 0x00000000 + 8000546c: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x7a4e0aedeb485cc0 + 80005470: 00033e03 ld x28,0(x6) + 80005474: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x049559b914401b67 + 80005478: 00033e03 ld x28,0(x6) + 8000547c: 00830313 addi x6,x6,8 + +0000000080005480 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b28: + aes64dsm x4, x28, x28 # perform operation + 80005480: 3fce0233 aes64dsm x4,x28,x28 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zknd_aes64dsm_cg_cmp_rs1_rs2_b28, Zknd_aes64dsm_cg_cmp_rs1_rs2_b28_str) + 80005484: 0004b383 ld x7,0(x9) + 80005488: 00438c63 beq x7,x4,800054a0 + 8000548c: 48d0546f jal x8,8000b118 + 80005490: 80005480 .word 0x80005480 + 80005494: 00000000 .word 0x00000000 + 80005498: 8001c212 .word 0x8001c212 + 8000549c: 00000000 .word 0x00000000 + 800054a0: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x67ebab59cbf9511c + 800054a4: 00033e83 ld x29,0(x6) + 800054a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x4c0404fda6c76896 + 800054ac: 00033e83 ld x29,0(x6) + 800054b0: 00830313 addi x6,x6,8 + +00000000800054b4 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b29: + aes64dsm x24, x29, x29 # perform operation + 800054b4: 3fde8c33 aes64dsm x24,x29,x29 + # Check if x24 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x24, Zknd_aes64dsm_cg_cmp_rs1_rs2_b29, Zknd_aes64dsm_cg_cmp_rs1_rs2_b29_str) + 800054b8: 0004b383 ld x7,0(x9) + 800054bc: 01838c63 beq x7,x24,800054d4 + 800054c0: 4590546f jal x8,8000b118 + 800054c4: 800054b4 .word 0x800054b4 + 800054c8: 00000000 .word 0x00000000 + 800054cc: 8001c24f .word 0x8001c24f + 800054d0: 00000000 .word 0x00000000 + 800054d4: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x5f981752f39db35b + 800054d8: 00033f03 ld x30,0(x6) + 800054dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7ccc4ca25c90f891 + 800054e0: 00033f03 ld x30,0(x6) + 800054e4: 00830313 addi x6,x6,8 + +00000000800054e8 : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b30: + aes64dsm x23, x30, x30 # perform operation + 800054e8: 3fef0bb3 aes64dsm x23,x30,x30 + # Check if x23 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x23, Zknd_aes64dsm_cg_cmp_rs1_rs2_b30, Zknd_aes64dsm_cg_cmp_rs1_rs2_b30_str) + 800054ec: 0004b383 ld x7,0(x9) + 800054f0: 01738c63 beq x7,x23,80005508 + 800054f4: 4250546f jal x8,8000b118 + 800054f8: 800054e8 .word 0x800054e8 + 800054fc: 00000000 .word 0x00000000 + 80005500: 8001c28c .word 0x8001c28c + 80005504: 00000000 .word 0x00000000 + 80005508: 00848493 addi x9,x9,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x42f3dce75d5ff169 + 8000550c: 00033f83 ld x31,0(x6) + 80005510: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xbf623061ff5014a5 + 80005514: 00033f83 ld x31,0(x6) + 80005518: 00830313 addi x6,x6,8 + +000000008000551c : +Zknd_aes64dsm_cg_cmp_rs1_rs2_b31: + aes64dsm x14, x31, x31 # perform operation + 8000551c: 3fff8733 aes64dsm x14,x31,x31 + # Check if x14 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x14, Zknd_aes64dsm_cg_cmp_rs1_rs2_b31, Zknd_aes64dsm_cg_cmp_rs1_rs2_b31_str) + 80005520: 0004b383 ld x7,0(x9) + 80005524: 00e38c63 beq x7,x14,8000553c + 80005528: 3f10546f jal x8,8000b118 + 8000552c: 8000551c .word 0x8000551c + 80005530: 00000000 .word 0x00000000 + 80005534: 8001c2c9 .word 0x8001c2c9 + 80005538: 00000000 .word 0x00000000 + 8000553c: 00848493 addi x9,x9,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0xec1f7a34ba4d7be5 + 80005540: 00033003 ld x0,0(x6) + 80005544: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x06e42f96fdf6c5f2 + 80005548: 00033b83 ld x23,0(x6) + 8000554c: 00830313 addi x6,x6,8 + +0000000080005550 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b0: + aes64dsm x0, x0, x23 # perform operation + 80005550: 3f700033 aes64dsm x0,x0,x23 + # Check if x0 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x0, Zknd_aes64dsm_cg_cmp_rd_rs1_b0, Zknd_aes64dsm_cg_cmp_rd_rs1_b0_str) + 80005554: 0004b383 ld x7,0(x9) + 80005558: 00038c63 beq x7,x0,80005570 + 8000555c: 3bd0546f jal x8,8000b118 + 80005560: 80005550 .word 0x80005550 + 80005564: 00000000 .word 0x00000000 + 80005568: 8001c306 .word 0x8001c306 + 8000556c: 00000000 .word 0x00000000 + 80005570: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x03fd66ff99306812 + 80005574: 00033083 ld x1,0(x6) + 80005578: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xfe9c641b078c3568 + 8000557c: 00033603 ld x12,0(x6) + 80005580: 00830313 addi x6,x6,8 + +0000000080005584 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b1: + aes64dsm x1, x1, x12 # perform operation + 80005584: 3ec080b3 aes64dsm x1,x1,x12 + # Check if x1 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x1, Zknd_aes64dsm_cg_cmp_rd_rs1_b1, Zknd_aes64dsm_cg_cmp_rd_rs1_b1_str) + 80005588: 0004b383 ld x7,0(x9) + 8000558c: 00138c63 beq x7,x1,800055a4 + 80005590: 3890546f jal x8,8000b118 + 80005594: 80005584 .word 0x80005584 + 80005598: 00000000 .word 0x00000000 + 8000559c: 8001c341 .word 0x8001c341 + 800055a0: 00000000 .word 0x00000000 + 800055a4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xdb33c1b4733805a5 + 800055a8: 00033103 ld x2,0(x6) + 800055ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x8fa6fce93e50ee2f + 800055b0: 00033803 ld x16,0(x6) + 800055b4: 00830313 addi x6,x6,8 + +00000000800055b8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b2: + aes64dsm x2, x2, x16 # perform operation + 800055b8: 3f010133 aes64dsm x2,x2,x16 + # Check if x2 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x2, Zknd_aes64dsm_cg_cmp_rd_rs1_b2, Zknd_aes64dsm_cg_cmp_rd_rs1_b2_str) + 800055bc: 0004b383 ld x7,0(x9) + 800055c0: 00238c63 beq x7,x2,800055d8 + 800055c4: 3550546f jal x8,8000b118 + 800055c8: 800055b8 .word 0x800055b8 + 800055cc: 00000000 .word 0x00000000 + 800055d0: 8001c37c .word 0x8001c37c + 800055d4: 00000000 .word 0x00000000 + 800055d8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x287877ff067a6a23 + 800055dc: 00033183 ld x3,0(x6) + 800055e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x7f058e58a4abbdbb + 800055e4: 00033283 ld x5,0(x6) + 800055e8: 00830313 addi x6,x6,8 + +00000000800055ec : +Zknd_aes64dsm_cg_cmp_rd_rs1_b3: + aes64dsm x3, x3, x5 # perform operation + 800055ec: 3e5181b3 aes64dsm x3,x3,x5 + # Check if x3 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x3, Zknd_aes64dsm_cg_cmp_rd_rs1_b3, Zknd_aes64dsm_cg_cmp_rd_rs1_b3_str) + 800055f0: 0004b383 ld x7,0(x9) + 800055f4: 00338c63 beq x7,x3,8000560c + 800055f8: 3210546f jal x8,8000b118 + 800055fc: 800055ec .word 0x800055ec + 80005600: 00000000 .word 0x00000000 + 80005604: 8001c3b7 .word 0x8001c3b7 + 80005608: 00000000 .word 0x00000000 + 8000560c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0x3760864fa1d7124b + 80005610: 00033203 ld x4,0(x6) + 80005614: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x01a83ae1c129f46b + 80005618: 00033503 ld x10,0(x6) + 8000561c: 00830313 addi x6,x6,8 + +0000000080005620 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b4: + aes64dsm x4, x4, x10 # perform operation + 80005620: 3ea20233 aes64dsm x4,x4,x10 + # Check if x4 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x4, Zknd_aes64dsm_cg_cmp_rd_rs1_b4, Zknd_aes64dsm_cg_cmp_rd_rs1_b4_str) + 80005624: 0004b383 ld x7,0(x9) + 80005628: 00438c63 beq x7,x4,80005640 + 8000562c: 2ed0546f jal x8,8000b118 + 80005630: 80005620 .word 0x80005620 + 80005634: 00000000 .word 0x00000000 + 80005638: 8001c3f2 .word 0x8001c3f2 + 8000563c: 00000000 .word 0x00000000 + 80005640: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xe06f4777c696ef79 + 80005644: 00033283 ld x5,0(x6) + 80005648: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xf0691bea98501c99 + 8000564c: 00033783 ld x15,0(x6) + 80005650: 00830313 addi x6,x6,8 + +0000000080005654 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b5: + aes64dsm x5, x5, x15 # perform operation + 80005654: 3ef282b3 aes64dsm x5,x5,x15 + # Check if x5 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x5, Zknd_aes64dsm_cg_cmp_rd_rs1_b5, Zknd_aes64dsm_cg_cmp_rd_rs1_b5_str) + 80005658: 0004b383 ld x7,0(x9) + 8000565c: 00538c63 beq x7,x5,80005674 + 80005660: 2b90546f jal x8,8000b118 + 80005664: 80005654 .word 0x80005654 + 80005668: 00000000 .word 0x00000000 + 8000566c: 8001c42d .word 0x8001c42d + 80005670: 00000000 .word 0x00000000 + 80005674: 00848493 addi x9,x9,8 + + mv x15, x6 # switch data pointer register to avoid conflict with test + 80005678: 00030793 addi x15,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x5fb7f15bd479086a + 8000567c: 0007b303 ld x6,0(x15) + 80005680: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x3048f956980503c1 + 80005684: 0007b903 ld x18,0(x15) + 80005688: 00878793 addi x15,x15,8 + +000000008000568c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b6: + aes64dsm x6, x6, x18 # perform operation + 8000568c: 3f230333 aes64dsm x6,x6,x18 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zknd_aes64dsm_cg_cmp_rd_rs1_b6, Zknd_aes64dsm_cg_cmp_rd_rs1_b6_str) + 80005690: 0004b383 ld x7,0(x9) + 80005694: 00638c63 beq x7,x6,800056ac + 80005698: 2810546f jal x8,8000b118 + 8000569c: 8000568c .word 0x8000568c + 800056a0: 00000000 .word 0x00000000 + 800056a4: 8001c468 .word 0x8001c468 + 800056a8: 00000000 .word 0x00000000 + 800056ac: 00848493 addi x9,x9,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056b0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056b4: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x66a71e919312fb63 + 800056b8: 0007b383 ld x7,0(x15) + 800056bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x462116e62762aedb + 800056c0: 0007b583 ld x11,0(x15) + 800056c4: 00878793 addi x15,x15,8 + +00000000800056c8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b7: + aes64dsm x7, x7, x11 # perform operation + 800056c8: 3eb383b3 aes64dsm x7,x7,x11 + # Check if x7 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x7, Zknd_aes64dsm_cg_cmp_rd_rs1_b7, Zknd_aes64dsm_cg_cmp_rd_rs1_b7_str) + 800056cc: 0004b683 ld x13,0(x9) + 800056d0: 00768c63 beq x13,x7,800056e8 + 800056d4: 26d0576f jal x14,8000b140 + 800056d8: 800056c8 .word 0x800056c8 + 800056dc: 00000000 .word 0x00000000 + 800056e0: 8001c4a3 .word 0x8001c4a3 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x51d31312a070b2d1 + 800056ec: 0007b403 ld x8,0(x15) + 800056f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x086225ee4549b59c + 800056f4: 0007bb03 ld x22,0(x15) + 800056f8: 00878793 addi x15,x15,8 + +00000000800056fc : +Zknd_aes64dsm_cg_cmp_rd_rs1_b8: + aes64dsm x8, x8, x22 # perform operation + 800056fc: 3f640433 aes64dsm x8,x8,x22 + # Check if x8 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x8, Zknd_aes64dsm_cg_cmp_rd_rs1_b8, Zknd_aes64dsm_cg_cmp_rd_rs1_b8_str) + 80005700: 0004b683 ld x13,0(x9) + 80005704: 00868c63 beq x13,x8,8000571c + 80005708: 2390576f jal x14,8000b140 + 8000570c: 800056fc .word 0x800056fc + 80005710: 00000000 .word 0x00000000 + 80005714: 8001c4de .word 0x8001c4de + 80005718: 00000000 .word 0x00000000 + 8000571c: 00848493 addi x9,x9,8 + + mv x30, x9 # switch signature pointer register to avoid conflict with test + 80005720: 00048f13 addi x30,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x9ab6445370037f03 + 80005724: 0007b483 ld x9,0(x15) + 80005728: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xad86403823175e72 + 8000572c: 0007bf83 ld x31,0(x15) + 80005730: 00878793 addi x15,x15,8 + +0000000080005734 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b9: + aes64dsm x9, x9, x31 # perform operation + 80005734: 3ff484b3 aes64dsm x9,x9,x31 + # Check if x9 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x9, Zknd_aes64dsm_cg_cmp_rd_rs1_b9, Zknd_aes64dsm_cg_cmp_rd_rs1_b9_str) + 80005738: 000f3683 ld x13,0(x30) + 8000573c: 00968c63 beq x13,x9,80005754 + 80005740: 2010576f jal x14,8000b140 + 80005744: 80005734 .word 0x80005734 + 80005748: 00000000 .word 0x00000000 + 8000574c: 8001c519 .word 0x8001c519 + 80005750: 00000000 .word 0x00000000 + 80005754: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xea5f83796a5fcbef + 80005758: 0007b503 ld x10,0(x15) + 8000575c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x20d5fb68079d1469 + 80005760: 0007ba03 ld x20,0(x15) + 80005764: 00878793 addi x15,x15,8 + +0000000080005768 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b10: + aes64dsm x10, x10, x20 # perform operation + 80005768: 3f450533 aes64dsm x10,x10,x20 + # Check if x10 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x10, Zknd_aes64dsm_cg_cmp_rd_rs1_b10, Zknd_aes64dsm_cg_cmp_rd_rs1_b10_str) + 8000576c: 000f3683 ld x13,0(x30) + 80005770: 00a68c63 beq x13,x10,80005788 + 80005774: 1cd0576f jal x14,8000b140 + 80005778: 80005768 .word 0x80005768 + 8000577c: 00000000 .word 0x00000000 + 80005780: 8001c554 .word 0x8001c554 + 80005784: 00000000 .word 0x00000000 + 80005788: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xa3d4c70df57940c7 + 8000578c: 0007b583 ld x11,0(x15) + 80005790: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xad165ddda383de37 + 80005794: 0007b303 ld x6,0(x15) + 80005798: 00878793 addi x15,x15,8 + +000000008000579c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b11: + aes64dsm x11, x11, x6 # perform operation + 8000579c: 3e6585b3 aes64dsm x11,x11,x6 + # Check if x11 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x11, Zknd_aes64dsm_cg_cmp_rd_rs1_b11, Zknd_aes64dsm_cg_cmp_rd_rs1_b11_str) + 800057a0: 000f3683 ld x13,0(x30) + 800057a4: 00b68c63 beq x13,x11,800057bc + 800057a8: 1990576f jal x14,8000b140 + 800057ac: 8000579c .word 0x8000579c + 800057b0: 00000000 .word 0x00000000 + 800057b4: 8001c590 .word 0x8001c590 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x4227475c816990d6 + 800057c0: 0007b603 ld x12,0(x15) + 800057c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0xf5c1cfc2be09e2d7 + 800057c8: 0007b003 ld x0,0(x15) + 800057cc: 00878793 addi x15,x15,8 + +00000000800057d0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b12: + aes64dsm x12, x12, x0 # perform operation + 800057d0: 3e060633 aes64dsm x12,x12,x0 + # Check if x12 contains the expected result. x30 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x30, x14, x13, x12, Zknd_aes64dsm_cg_cmp_rd_rs1_b12, Zknd_aes64dsm_cg_cmp_rd_rs1_b12_str) + 800057d4: 000f3683 ld x13,0(x30) + 800057d8: 00c68c63 beq x13,x12,800057f0 + 800057dc: 1650576f jal x14,8000b140 + 800057e0: 800057d0 .word 0x800057d0 + 800057e4: 00000000 .word 0x00000000 + 800057e8: 8001c5cc .word 0x8001c5cc + 800057ec: 00000000 .word 0x00000000 + 800057f0: 008f0f13 addi x30,x30,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057f4: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800057f8: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x998a8510ac119bbe + 800057fc: 0007b683 ld x13,0(x15) + 80005800: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xd9a862d5e014b54b + 80005804: 0007bf83 ld x31,0(x15) + 80005808: 00878793 addi x15,x15,8 + +000000008000580c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b13: + aes64dsm x13, x13, x31 # perform operation + 8000580c: 3ff686b3 aes64dsm x13,x13,x31 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknd_aes64dsm_cg_cmp_rd_rs1_b13, Zknd_aes64dsm_cg_cmp_rd_rs1_b13_str) + 80005810: 000f3383 ld x7,0(x30) + 80005814: 00d38c63 beq x7,x13,8000582c + 80005818: 1010546f jal x8,8000b118 + 8000581c: 8000580c .word 0x8000580c + 80005820: 00000000 .word 0x00000000 + 80005824: 8001c608 .word 0x8001c608 + 80005828: 00000000 .word 0x00000000 + 8000582c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x69dafbe5ade2c38c + 80005830: 0007b703 ld x14,0(x15) + 80005834: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xb43dbbea5525e6a7 + 80005838: 0007be03 ld x28,0(x15) + 8000583c: 00878793 addi x15,x15,8 + +0000000080005840 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b14: + aes64dsm x14, x14, x28 # perform operation + 80005840: 3fc70733 aes64dsm x14,x14,x28 + # Check if x14 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x14, Zknd_aes64dsm_cg_cmp_rd_rs1_b14, Zknd_aes64dsm_cg_cmp_rd_rs1_b14_str) + 80005844: 000f3383 ld x7,0(x30) + 80005848: 00e38c63 beq x7,x14,80005860 + 8000584c: 0cd0546f jal x8,8000b118 + 80005850: 80005840 .word 0x80005840 + 80005854: 00000000 .word 0x00000000 + 80005858: 8001c644 .word 0x8001c644 + 8000585c: 00000000 .word 0x00000000 + 80005860: 008f0f13 addi x30,x30,8 + + mv x23, x15 # switch data pointer register to avoid conflict with test + 80005864: 00078b93 addi x23,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x0cb570ca1c674a0a + 80005868: 000bb783 ld x15,0(x23) + 8000586c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x6b2d0cc4902aaf5b + 80005870: 000bb103 ld x2,0(x23) + 80005874: 008b8b93 addi x23,x23,8 + +0000000080005878 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b15: + aes64dsm x15, x15, x2 # perform operation + 80005878: 3e2787b3 aes64dsm x15,x15,x2 + # Check if x15 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x15, Zknd_aes64dsm_cg_cmp_rd_rs1_b15, Zknd_aes64dsm_cg_cmp_rd_rs1_b15_str) + 8000587c: 000f3383 ld x7,0(x30) + 80005880: 00f38c63 beq x7,x15,80005898 + 80005884: 0950546f jal x8,8000b118 + 80005888: 80005878 .word 0x80005878 + 8000588c: 00000000 .word 0x00000000 + 80005890: 8001c680 .word 0x8001c680 + 80005894: 00000000 .word 0x00000000 + 80005898: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xc906491d534cdd90 + 8000589c: 000bb803 ld x16,0(x23) + 800058a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x91da29810537d48c + 800058a4: 000bbe03 ld x28,0(x23) + 800058a8: 008b8b93 addi x23,x23,8 + +00000000800058ac : +Zknd_aes64dsm_cg_cmp_rd_rs1_b16: + aes64dsm x16, x16, x28 # perform operation + 800058ac: 3fc80833 aes64dsm x16,x16,x28 + # Check if x16 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x16, Zknd_aes64dsm_cg_cmp_rd_rs1_b16, Zknd_aes64dsm_cg_cmp_rd_rs1_b16_str) + 800058b0: 000f3383 ld x7,0(x30) + 800058b4: 01038c63 beq x7,x16,800058cc + 800058b8: 0610546f jal x8,8000b118 + 800058bc: 800058ac .word 0x800058ac + 800058c0: 00000000 .word 0x00000000 + 800058c4: 8001c6bc .word 0x8001c6bc + 800058c8: 00000000 .word 0x00000000 + 800058cc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xa052c26318d04bf4 + 800058d0: 000bb883 ld x17,0(x23) + 800058d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x05ebf601c1be3633 + 800058d8: 000bb503 ld x10,0(x23) + 800058dc: 008b8b93 addi x23,x23,8 + +00000000800058e0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b17: + aes64dsm x17, x17, x10 # perform operation + 800058e0: 3ea888b3 aes64dsm x17,x17,x10 + # Check if x17 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x17, Zknd_aes64dsm_cg_cmp_rd_rs1_b17, Zknd_aes64dsm_cg_cmp_rd_rs1_b17_str) + 800058e4: 000f3383 ld x7,0(x30) + 800058e8: 01138c63 beq x7,x17,80005900 + 800058ec: 02d0546f jal x8,8000b118 + 800058f0: 800058e0 .word 0x800058e0 + 800058f4: 00000000 .word 0x00000000 + 800058f8: 8001c6f8 .word 0x8001c6f8 + 800058fc: 00000000 .word 0x00000000 + 80005900: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x3d590e41a119c78d + 80005904: 000bb903 ld x18,0(x23) + 80005908: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xb57771d104688483 + 8000590c: 000bb703 ld x14,0(x23) + 80005910: 008b8b93 addi x23,x23,8 + +0000000080005914 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b18: + aes64dsm x18, x18, x14 # perform operation + 80005914: 3ee90933 aes64dsm x18,x18,x14 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknd_aes64dsm_cg_cmp_rd_rs1_b18, Zknd_aes64dsm_cg_cmp_rd_rs1_b18_str) + 80005918: 000f3383 ld x7,0(x30) + 8000591c: 01238c63 beq x7,x18,80005934 + 80005920: 7f80546f jal x8,8000b118 + 80005924: 80005914 .word 0x80005914 + 80005928: 00000000 .word 0x00000000 + 8000592c: 8001c734 .word 0x8001c734 + 80005930: 00000000 .word 0x00000000 + 80005934: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x88e847fcf541c4ec + 80005938: 000bb983 ld x19,0(x23) + 8000593c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x00104f5551684cb6 + 80005940: 000bb483 ld x9,0(x23) + 80005944: 008b8b93 addi x23,x23,8 + +0000000080005948 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b19: + aes64dsm x19, x19, x9 # perform operation + 80005948: 3e9989b3 aes64dsm x19,x19,x9 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknd_aes64dsm_cg_cmp_rd_rs1_b19, Zknd_aes64dsm_cg_cmp_rd_rs1_b19_str) + 8000594c: 000f3383 ld x7,0(x30) + 80005950: 01338c63 beq x7,x19,80005968 + 80005954: 7c40546f jal x8,8000b118 + 80005958: 80005948 .word 0x80005948 + 8000595c: 00000000 .word 0x00000000 + 80005960: 8001c770 .word 0x8001c770 + 80005964: 00000000 .word 0x00000000 + 80005968: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xfad2c60c0d8cd804 + 8000596c: 000bba03 ld x20,0(x23) + 80005970: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x2fa35c23c02b3ee1 + 80005974: 000bb183 ld x3,0(x23) + 80005978: 008b8b93 addi x23,x23,8 + +000000008000597c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b20: + aes64dsm x20, x20, x3 # perform operation + 8000597c: 3e3a0a33 aes64dsm x20,x20,x3 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknd_aes64dsm_cg_cmp_rd_rs1_b20, Zknd_aes64dsm_cg_cmp_rd_rs1_b20_str) + 80005980: 000f3383 ld x7,0(x30) + 80005984: 01438c63 beq x7,x20,8000599c + 80005988: 7900546f jal x8,8000b118 + 8000598c: 8000597c .word 0x8000597c + 80005990: 00000000 .word 0x00000000 + 80005994: 8001c7ac .word 0x8001c7ac + 80005998: 00000000 .word 0x00000000 + 8000599c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x5f60e180cdd6786a + 800059a0: 000bba83 ld x21,0(x23) + 800059a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x00e580e5bd7043be + 800059a8: 000bb203 ld x4,0(x23) + 800059ac: 008b8b93 addi x23,x23,8 + +00000000800059b0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b21: + aes64dsm x21, x21, x4 # perform operation + 800059b0: 3e4a8ab3 aes64dsm x21,x21,x4 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknd_aes64dsm_cg_cmp_rd_rs1_b21, Zknd_aes64dsm_cg_cmp_rd_rs1_b21_str) + 800059b4: 000f3383 ld x7,0(x30) + 800059b8: 01538c63 beq x7,x21,800059d0 + 800059bc: 75c0546f jal x8,8000b118 + 800059c0: 800059b0 .word 0x800059b0 + 800059c4: 00000000 .word 0x00000000 + 800059c8: 8001c7e8 .word 0x8001c7e8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x18354ad2eca393ce + 800059d4: 000bbb03 ld x22,0(x23) + 800059d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xa4ef7f68241eb127 + 800059dc: 000bb183 ld x3,0(x23) + 800059e0: 008b8b93 addi x23,x23,8 + +00000000800059e4 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b22: + aes64dsm x22, x22, x3 # perform operation + 800059e4: 3e3b0b33 aes64dsm x22,x22,x3 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknd_aes64dsm_cg_cmp_rd_rs1_b22, Zknd_aes64dsm_cg_cmp_rd_rs1_b22_str) + 800059e8: 000f3383 ld x7,0(x30) + 800059ec: 01638c63 beq x7,x22,80005a04 + 800059f0: 7280546f jal x8,8000b118 + 800059f4: 800059e4 .word 0x800059e4 + 800059f8: 00000000 .word 0x00000000 + 800059fc: 8001c824 .word 0x8001c824 + 80005a00: 00000000 .word 0x00000000 + 80005a04: 008f0f13 addi x30,x30,8 + + mv x21, x23 # switch data pointer register to avoid conflict with test + 80005a08: 000b8a93 addi x21,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x178d806b0acd235f + 80005a0c: 000abb83 ld x23,0(x21) + 80005a10: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x5a74837b98c9dea9 + 80005a14: 000abb03 ld x22,0(x21) + 80005a18: 008a8a93 addi x21,x21,8 + +0000000080005a1c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b23: + aes64dsm x23, x23, x22 # perform operation + 80005a1c: 3f6b8bb3 aes64dsm x23,x23,x22 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknd_aes64dsm_cg_cmp_rd_rs1_b23, Zknd_aes64dsm_cg_cmp_rd_rs1_b23_str) + 80005a20: 000f3383 ld x7,0(x30) + 80005a24: 01738c63 beq x7,x23,80005a3c + 80005a28: 6f00546f jal x8,8000b118 + 80005a2c: 80005a1c .word 0x80005a1c + 80005a30: 00000000 .word 0x00000000 + 80005a34: 8001c860 .word 0x8001c860 + 80005a38: 00000000 .word 0x00000000 + 80005a3c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x395eb2237a41bc61 + 80005a40: 000abc03 ld x24,0(x21) + 80005a44: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0xba0372d0fa6be800 + 80005a48: 000abb03 ld x22,0(x21) + 80005a4c: 008a8a93 addi x21,x21,8 + +0000000080005a50 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b24: + aes64dsm x24, x24, x22 # perform operation + 80005a50: 3f6c0c33 aes64dsm x24,x24,x22 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknd_aes64dsm_cg_cmp_rd_rs1_b24, Zknd_aes64dsm_cg_cmp_rd_rs1_b24_str) + 80005a54: 000f3383 ld x7,0(x30) + 80005a58: 01838c63 beq x7,x24,80005a70 + 80005a5c: 6bc0546f jal x8,8000b118 + 80005a60: 80005a50 .word 0x80005a50 + 80005a64: 00000000 .word 0x00000000 + 80005a68: 8001c89c .word 0x8001c89c + 80005a6c: 00000000 .word 0x00000000 + 80005a70: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x8942898bae90b678 + 80005a74: 000abc83 ld x25,0(x21) + 80005a78: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xb883b10da4906a21 + 80005a7c: 000ab483 ld x9,0(x21) + 80005a80: 008a8a93 addi x21,x21,8 + +0000000080005a84 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b25: + aes64dsm x25, x25, x9 # perform operation + 80005a84: 3e9c8cb3 aes64dsm x25,x25,x9 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknd_aes64dsm_cg_cmp_rd_rs1_b25, Zknd_aes64dsm_cg_cmp_rd_rs1_b25_str) + 80005a88: 000f3383 ld x7,0(x30) + 80005a8c: 01938c63 beq x7,x25,80005aa4 + 80005a90: 6880546f jal x8,8000b118 + 80005a94: 80005a84 .word 0x80005a84 + 80005a98: 00000000 .word 0x00000000 + 80005a9c: 8001c8d8 .word 0x8001c8d8 + 80005aa0: 00000000 .word 0x00000000 + 80005aa4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x41589e9650a3ba0e + 80005aa8: 000abd03 ld x26,0(x21) + 80005aac: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x064e51a95eecf19a + 80005ab0: 000ab903 ld x18,0(x21) + 80005ab4: 008a8a93 addi x21,x21,8 + +0000000080005ab8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b26: + aes64dsm x26, x26, x18 # perform operation + 80005ab8: 3f2d0d33 aes64dsm x26,x26,x18 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknd_aes64dsm_cg_cmp_rd_rs1_b26, Zknd_aes64dsm_cg_cmp_rd_rs1_b26_str) + 80005abc: 000f3383 ld x7,0(x30) + 80005ac0: 01a38c63 beq x7,x26,80005ad8 + 80005ac4: 6540546f jal x8,8000b118 + 80005ac8: 80005ab8 .word 0x80005ab8 + 80005acc: 00000000 .word 0x00000000 + 80005ad0: 8001c914 .word 0x8001c914 + 80005ad4: 00000000 .word 0x00000000 + 80005ad8: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xcef44a2ef81909d4 + 80005adc: 000abd83 ld x27,0(x21) + 80005ae0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x434dfbafe2ffaa03 + 80005ae4: 000ab303 ld x6,0(x21) + 80005ae8: 008a8a93 addi x21,x21,8 + +0000000080005aec : +Zknd_aes64dsm_cg_cmp_rd_rs1_b27: + aes64dsm x27, x27, x6 # perform operation + 80005aec: 3e6d8db3 aes64dsm x27,x27,x6 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknd_aes64dsm_cg_cmp_rd_rs1_b27, Zknd_aes64dsm_cg_cmp_rd_rs1_b27_str) + 80005af0: 000f3383 ld x7,0(x30) + 80005af4: 01b38c63 beq x7,x27,80005b0c + 80005af8: 6200546f jal x8,8000b118 + 80005afc: 80005aec .word 0x80005aec + 80005b00: 00000000 .word 0x00000000 + 80005b04: 8001c950 .word 0x8001c950 + 80005b08: 00000000 .word 0x00000000 + 80005b0c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x19041a06d801da6c + 80005b10: 000abe03 ld x28,0(x21) + 80005b14: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0x3e7453879a1d85ab + 80005b18: 000abf83 ld x31,0(x21) + 80005b1c: 008a8a93 addi x21,x21,8 + +0000000080005b20 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b28: + aes64dsm x28, x28, x31 # perform operation + 80005b20: 3ffe0e33 aes64dsm x28,x28,x31 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknd_aes64dsm_cg_cmp_rd_rs1_b28, Zknd_aes64dsm_cg_cmp_rd_rs1_b28_str) + 80005b24: 000f3383 ld x7,0(x30) + 80005b28: 01c38c63 beq x7,x28,80005b40 + 80005b2c: 5ec0546f jal x8,8000b118 + 80005b30: 80005b20 .word 0x80005b20 + 80005b34: 00000000 .word 0x00000000 + 80005b38: 8001c98c .word 0x8001c98c + 80005b3c: 00000000 .word 0x00000000 + 80005b40: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xb37b0e8ad438a058 + 80005b44: 000abe83 ld x29,0(x21) + 80005b48: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xabb581f5c6862df5 + 80005b4c: 000ab483 ld x9,0(x21) + 80005b50: 008a8a93 addi x21,x21,8 + +0000000080005b54 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b29: + aes64dsm x29, x29, x9 # perform operation + 80005b54: 3e9e8eb3 aes64dsm x29,x29,x9 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknd_aes64dsm_cg_cmp_rd_rs1_b29, Zknd_aes64dsm_cg_cmp_rd_rs1_b29_str) + 80005b58: 000f3383 ld x7,0(x30) + 80005b5c: 01d38c63 beq x7,x29,80005b74 + 80005b60: 5b80546f jal x8,8000b118 + 80005b64: 80005b54 .word 0x80005b54 + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 8001c9c8 .word 0x8001c9c8 + 80005b70: 00000000 .word 0x00000000 + 80005b74: 008f0f13 addi x30,x30,8 + + mv x24, x30 # switch signature pointer register to avoid conflict with test + 80005b78: 000f0c13 addi x24,x30,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x56a1c65a6701a4d2 + 80005b7c: 000abf03 ld x30,0(x21) + 80005b80: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x1cf352e494bd9445 + 80005b84: 000ab303 ld x6,0(x21) + 80005b88: 008a8a93 addi x21,x21,8 + +0000000080005b8c : +Zknd_aes64dsm_cg_cmp_rd_rs1_b30: + aes64dsm x30, x30, x6 # perform operation + 80005b8c: 3e6f0f33 aes64dsm x30,x30,x6 + # Check if x30 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x30, Zknd_aes64dsm_cg_cmp_rd_rs1_b30, Zknd_aes64dsm_cg_cmp_rd_rs1_b30_str) + 80005b90: 000c3383 ld x7,0(x24) + 80005b94: 01e38c63 beq x7,x30,80005bac + 80005b98: 5800546f jal x8,8000b118 + 80005b9c: 80005b8c .word 0x80005b8c + 80005ba0: 00000000 .word 0x00000000 + 80005ba4: 8001ca04 .word 0x8001ca04 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0x422fc3225fec1962 + 80005bb0: 000abf83 ld x31,0(x21) + 80005bb4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x31676fbfcbaba000 + 80005bb8: 000abb83 ld x23,0(x21) + 80005bbc: 008a8a93 addi x21,x21,8 + +0000000080005bc0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_b31: + aes64dsm x31, x31, x23 # perform operation + 80005bc0: 3f7f8fb3 aes64dsm x31,x31,x23 + # Check if x31 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x31, Zknd_aes64dsm_cg_cmp_rd_rs1_b31, Zknd_aes64dsm_cg_cmp_rd_rs1_b31_str) + 80005bc4: 000c3383 ld x7,0(x24) + 80005bc8: 01f38c63 beq x7,x31,80005be0 + 80005bcc: 54c0546f jal x8,8000b118 + 80005bd0: 80005bc0 .word 0x80005bc0 + 80005bd4: 00000000 .word 0x00000000 + 80005bd8: 8001ca40 .word 0x8001ca40 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 008c0c13 addi x24,x24,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x28ad4956bcdd0479 + 80005be4: 000abd03 ld x26,0(x21) + 80005be8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x6f734de7d7c51e60 + 80005bec: 000ab003 ld x0,0(x21) + 80005bf0: 008a8a93 addi x21,x21,8 + +0000000080005bf4 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b0: + aes64dsm x0, x26, x0 # perform operation + 80005bf4: 3e0d0033 aes64dsm x0,x26,x0 + # Check if x0 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x0, Zknd_aes64dsm_cg_cmp_rd_rs2_b0, Zknd_aes64dsm_cg_cmp_rd_rs2_b0_str) + 80005bf8: 000c3383 ld x7,0(x24) + 80005bfc: 00038c63 beq x7,x0,80005c14 + 80005c00: 5180546f jal x8,8000b118 + 80005c04: 80005bf4 .word 0x80005bf4 + 80005c08: 00000000 .word 0x00000000 + 80005c0c: 8001ca7c .word 0x8001ca7c + 80005c10: 00000000 .word 0x00000000 + 80005c14: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x5577fae7b91a6b03 + 80005c18: 000abc83 ld x25,0(x21) + 80005c1c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x4c7e77e4e0243609 + 80005c20: 000ab083 ld x1,0(x21) + 80005c24: 008a8a93 addi x21,x21,8 + +0000000080005c28 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b1: + aes64dsm x1, x25, x1 # perform operation + 80005c28: 3e1c80b3 aes64dsm x1,x25,x1 + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zknd_aes64dsm_cg_cmp_rd_rs2_b1, Zknd_aes64dsm_cg_cmp_rd_rs2_b1_str) + 80005c2c: 000c3383 ld x7,0(x24) + 80005c30: 00138c63 beq x7,x1,80005c48 + 80005c34: 4e40546f jal x8,8000b118 + 80005c38: 80005c28 .word 0x80005c28 + 80005c3c: 00000000 .word 0x00000000 + 80005c40: 8001cab7 .word 0x8001cab7 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x0e6b5b0516701152 + 80005c4c: 000ab483 ld x9,0(x21) + 80005c50: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xaf5bf18ab18e128e + 80005c54: 000ab103 ld x2,0(x21) + 80005c58: 008a8a93 addi x21,x21,8 + +0000000080005c5c : +Zknd_aes64dsm_cg_cmp_rd_rs2_b2: + aes64dsm x2, x9, x2 # perform operation + 80005c5c: 3e248133 aes64dsm x2,x9,x2 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zknd_aes64dsm_cg_cmp_rd_rs2_b2, Zknd_aes64dsm_cg_cmp_rd_rs2_b2_str) + 80005c60: 000c3383 ld x7,0(x24) + 80005c64: 00238c63 beq x7,x2,80005c7c + 80005c68: 4b00546f jal x8,8000b118 + 80005c6c: 80005c5c .word 0x80005c5c + 80005c70: 00000000 .word 0x00000000 + 80005c74: 8001caf2 .word 0x8001caf2 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x29ba4b2fa6273cf3 + 80005c80: 000abb03 ld x22,0(x21) + 80005c84: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs2: x3 = 0xd91f89f3cf59a20e + 80005c88: 000ab183 ld x3,0(x21) + 80005c8c: 008a8a93 addi x21,x21,8 + +0000000080005c90 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b3: + aes64dsm x3, x22, x3 # perform operation + 80005c90: 3e3b01b3 aes64dsm x3,x22,x3 + # Check if x3 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x3, Zknd_aes64dsm_cg_cmp_rd_rs2_b3, Zknd_aes64dsm_cg_cmp_rd_rs2_b3_str) + 80005c94: 000c3383 ld x7,0(x24) + 80005c98: 00338c63 beq x7,x3,80005cb0 + 80005c9c: 47c0546f jal x8,8000b118 + 80005ca0: 80005c90 .word 0x80005c90 + 80005ca4: 00000000 .word 0x00000000 + 80005ca8: 8001cb2d .word 0x8001cb2d + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x736f3ac111812d42 + 80005cb4: 000ab503 ld x10,0(x21) + 80005cb8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x48245e8d8cba1289 + 80005cbc: 000ab203 ld x4,0(x21) + 80005cc0: 008a8a93 addi x21,x21,8 + +0000000080005cc4 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b4: + aes64dsm x4, x10, x4 # perform operation + 80005cc4: 3e450233 aes64dsm x4,x10,x4 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zknd_aes64dsm_cg_cmp_rd_rs2_b4, Zknd_aes64dsm_cg_cmp_rd_rs2_b4_str) + 80005cc8: 000c3383 ld x7,0(x24) + 80005ccc: 00438c63 beq x7,x4,80005ce4 + 80005cd0: 4480546f jal x8,8000b118 + 80005cd4: 80005cc4 .word 0x80005cc4 + 80005cd8: 00000000 .word 0x00000000 + 80005cdc: 8001cb68 .word 0x8001cb68 + 80005ce0: 00000000 .word 0x00000000 + 80005ce4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x611bdcc3506a8739 + 80005ce8: 000ab883 ld x17,0(x21) + 80005cec: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs2: x5 = 0x3c9fc72471b2cba2 + 80005cf0: 000ab283 ld x5,0(x21) + 80005cf4: 008a8a93 addi x21,x21,8 + +0000000080005cf8 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b5: + aes64dsm x5, x17, x5 # perform operation + 80005cf8: 3e5882b3 aes64dsm x5,x17,x5 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zknd_aes64dsm_cg_cmp_rd_rs2_b5, Zknd_aes64dsm_cg_cmp_rd_rs2_b5_str) + 80005cfc: 000c3383 ld x7,0(x24) + 80005d00: 00538c63 beq x7,x5,80005d18 + 80005d04: 4140546f jal x8,8000b118 + 80005d08: 80005cf8 .word 0x80005cf8 + 80005d0c: 00000000 .word 0x00000000 + 80005d10: 8001cba3 .word 0x8001cba3 + 80005d14: 00000000 .word 0x00000000 + 80005d18: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x0d4bf717bfa398a6 + 80005d1c: 000abb83 ld x23,0(x21) + 80005d20: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x77a5313756970465 + 80005d24: 000ab303 ld x6,0(x21) + 80005d28: 008a8a93 addi x21,x21,8 + +0000000080005d2c : +Zknd_aes64dsm_cg_cmp_rd_rs2_b6: + aes64dsm x6, x23, x6 # perform operation + 80005d2c: 3e6b8333 aes64dsm x6,x23,x6 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zknd_aes64dsm_cg_cmp_rd_rs2_b6, Zknd_aes64dsm_cg_cmp_rd_rs2_b6_str) + 80005d30: 000c3383 ld x7,0(x24) + 80005d34: 00638c63 beq x7,x6,80005d4c + 80005d38: 3e00546f jal x8,8000b118 + 80005d3c: 80005d2c .word 0x80005d2c + 80005d40: 00000000 .word 0x00000000 + 80005d44: 8001cbde .word 0x8001cbde + 80005d48: 00000000 .word 0x00000000 + 80005d4c: 008c0c13 addi x24,x24,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d50: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d54: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x2a37921de54a4308 + 80005d58: 000ab403 ld x8,0(x21) + 80005d5c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x1b383cf797773448 + 80005d60: 000ab383 ld x7,0(x21) + 80005d64: 008a8a93 addi x21,x21,8 + +0000000080005d68 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b7: + aes64dsm x7, x8, x7 # perform operation + 80005d68: 3e7403b3 aes64dsm x7,x8,x7 + # Check if x7 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x7, Zknd_aes64dsm_cg_cmp_rd_rs2_b7, Zknd_aes64dsm_cg_cmp_rd_rs2_b7_str) + 80005d6c: 000c3683 ld x13,0(x24) + 80005d70: 00768c63 beq x13,x7,80005d88 + 80005d74: 3cc0576f jal x14,8000b140 + 80005d78: 80005d68 .word 0x80005d68 + 80005d7c: 00000000 .word 0x00000000 + 80005d80: 8001cc19 .word 0x8001cc19 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x265f485aa0c8d5f2 + 80005d8c: 000ab583 ld x11,0(x21) + 80005d90: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0xf2f4f8fd0e8cfc00 + 80005d94: 000ab403 ld x8,0(x21) + 80005d98: 008a8a93 addi x21,x21,8 + +0000000080005d9c : +Zknd_aes64dsm_cg_cmp_rd_rs2_b8: + aes64dsm x8, x11, x8 # perform operation + 80005d9c: 3e858433 aes64dsm x8,x11,x8 + # Check if x8 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x8, Zknd_aes64dsm_cg_cmp_rd_rs2_b8, Zknd_aes64dsm_cg_cmp_rd_rs2_b8_str) + 80005da0: 000c3683 ld x13,0(x24) + 80005da4: 00868c63 beq x13,x8,80005dbc + 80005da8: 3980576f jal x14,8000b140 + 80005dac: 80005d9c .word 0x80005d9c + 80005db0: 00000000 .word 0x00000000 + 80005db4: 8001cc54 .word 0x8001cc54 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x0a6cb0eae8dcc46b + 80005dc0: 000ab183 ld x3,0(x21) + 80005dc4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x7517621aa7d8e37e + 80005dc8: 000ab483 ld x9,0(x21) + 80005dcc: 008a8a93 addi x21,x21,8 + +0000000080005dd0 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b9: + aes64dsm x9, x3, x9 # perform operation + 80005dd0: 3e9184b3 aes64dsm x9,x3,x9 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zknd_aes64dsm_cg_cmp_rd_rs2_b9, Zknd_aes64dsm_cg_cmp_rd_rs2_b9_str) + 80005dd4: 000c3683 ld x13,0(x24) + 80005dd8: 00968c63 beq x13,x9,80005df0 + 80005ddc: 3640576f jal x14,8000b140 + 80005de0: 80005dd0 .word 0x80005dd0 + 80005de4: 00000000 .word 0x00000000 + 80005de8: 8001cc8f .word 0x8001cc8f + 80005dec: 00000000 .word 0x00000000 + 80005df0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0xc1ab67c8f9db5814 + 80005df4: 000abb83 ld x23,0(x21) + 80005df8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x7ba716a86e07533a + 80005dfc: 000ab503 ld x10,0(x21) + 80005e00: 008a8a93 addi x21,x21,8 + +0000000080005e04 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b10: + aes64dsm x10, x23, x10 # perform operation + 80005e04: 3eab8533 aes64dsm x10,x23,x10 + # Check if x10 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x10, Zknd_aes64dsm_cg_cmp_rd_rs2_b10, Zknd_aes64dsm_cg_cmp_rd_rs2_b10_str) + 80005e08: 000c3683 ld x13,0(x24) + 80005e0c: 00a68c63 beq x13,x10,80005e24 + 80005e10: 3300576f jal x14,8000b140 + 80005e14: 80005e04 .word 0x80005e04 + 80005e18: 00000000 .word 0x00000000 + 80005e1c: 8001ccca .word 0x8001ccca + 80005e20: 00000000 .word 0x00000000 + 80005e24: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0xa693bc01ac6da8b7 + 80005e28: 000abb03 ld x22,0(x21) + 80005e2c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x876d0e854b135510 + 80005e30: 000ab583 ld x11,0(x21) + 80005e34: 008a8a93 addi x21,x21,8 + +0000000080005e38 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b11: + aes64dsm x11, x22, x11 # perform operation + 80005e38: 3ebb05b3 aes64dsm x11,x22,x11 + # Check if x11 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x11, Zknd_aes64dsm_cg_cmp_rd_rs2_b11, Zknd_aes64dsm_cg_cmp_rd_rs2_b11_str) + 80005e3c: 000c3683 ld x13,0(x24) + 80005e40: 00b68c63 beq x13,x11,80005e58 + 80005e44: 2fc0576f jal x14,8000b140 + 80005e48: 80005e38 .word 0x80005e38 + 80005e4c: 00000000 .word 0x00000000 + 80005e50: 8001cd06 .word 0x8001cd06 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x035efbdd7b7c3508 + 80005e5c: 000ab103 ld x2,0(x21) + 80005e60: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x18bcf50ce2aa8b11 + 80005e64: 000ab603 ld x12,0(x21) + 80005e68: 008a8a93 addi x21,x21,8 + +0000000080005e6c : +Zknd_aes64dsm_cg_cmp_rd_rs2_b12: + aes64dsm x12, x2, x12 # perform operation + 80005e6c: 3ec10633 aes64dsm x12,x2,x12 + # Check if x12 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x12, Zknd_aes64dsm_cg_cmp_rd_rs2_b12, Zknd_aes64dsm_cg_cmp_rd_rs2_b12_str) + 80005e70: 000c3683 ld x13,0(x24) + 80005e74: 00c68c63 beq x13,x12,80005e8c + 80005e78: 2c80576f jal x14,8000b140 + 80005e7c: 80005e6c .word 0x80005e6c + 80005e80: 00000000 .word 0x00000000 + 80005e84: 8001cd42 .word 0x8001cd42 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 008c0c13 addi x24,x24,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e90: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e94: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x239ba2b141a62a96 + 80005e98: 000abd83 ld x27,0(x21) + 80005e9c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x1278dc7e99ac2147 + 80005ea0: 000ab683 ld x13,0(x21) + 80005ea4: 008a8a93 addi x21,x21,8 + +0000000080005ea8 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b13: + aes64dsm x13, x27, x13 # perform operation + 80005ea8: 3edd86b3 aes64dsm x13,x27,x13 + # Check if x13 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x13, Zknd_aes64dsm_cg_cmp_rd_rs2_b13, Zknd_aes64dsm_cg_cmp_rd_rs2_b13_str) + 80005eac: 000c3383 ld x7,0(x24) + 80005eb0: 00d38c63 beq x7,x13,80005ec8 + 80005eb4: 2640546f jal x8,8000b118 + 80005eb8: 80005ea8 .word 0x80005ea8 + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 8001cd7e .word 0x8001cd7e + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xf692ad65e35d4390 + 80005ecc: 000ab303 ld x6,0(x21) + 80005ed0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0x96651683a71419d6 + 80005ed4: 000ab703 ld x14,0(x21) + 80005ed8: 008a8a93 addi x21,x21,8 + +0000000080005edc : +Zknd_aes64dsm_cg_cmp_rd_rs2_b14: + aes64dsm x14, x6, x14 # perform operation + 80005edc: 3ee30733 aes64dsm x14,x6,x14 + # Check if x14 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x14, Zknd_aes64dsm_cg_cmp_rd_rs2_b14, Zknd_aes64dsm_cg_cmp_rd_rs2_b14_str) + 80005ee0: 000c3383 ld x7,0(x24) + 80005ee4: 00e38c63 beq x7,x14,80005efc + 80005ee8: 2300546f jal x8,8000b118 + 80005eec: 80005edc .word 0x80005edc + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 8001cdba .word 0x8001cdba + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x963e797c85fa75d4 + 80005f00: 000ab803 ld x16,0(x21) + 80005f04: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x3943600ce052ef1e + 80005f08: 000ab783 ld x15,0(x21) + 80005f0c: 008a8a93 addi x21,x21,8 + +0000000080005f10 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b15: + aes64dsm x15, x16, x15 # perform operation + 80005f10: 3ef807b3 aes64dsm x15,x16,x15 + # Check if x15 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x15, Zknd_aes64dsm_cg_cmp_rd_rs2_b15, Zknd_aes64dsm_cg_cmp_rd_rs2_b15_str) + 80005f14: 000c3383 ld x7,0(x24) + 80005f18: 00f38c63 beq x7,x15,80005f30 + 80005f1c: 1fc0546f jal x8,8000b118 + 80005f20: 80005f10 .word 0x80005f10 + 80005f24: 00000000 .word 0x00000000 + 80005f28: 8001cdf6 .word 0x8001cdf6 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x2869f1e47ae84a49 + 80005f34: 000abb03 ld x22,0(x21) + 80005f38: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xdcf06249d7538e3d + 80005f3c: 000ab803 ld x16,0(x21) + 80005f40: 008a8a93 addi x21,x21,8 + +0000000080005f44 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b16: + aes64dsm x16, x22, x16 # perform operation + 80005f44: 3f0b0833 aes64dsm x16,x22,x16 + # Check if x16 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x16, Zknd_aes64dsm_cg_cmp_rd_rs2_b16, Zknd_aes64dsm_cg_cmp_rd_rs2_b16_str) + 80005f48: 000c3383 ld x7,0(x24) + 80005f4c: 01038c63 beq x7,x16,80005f64 + 80005f50: 1c80546f jal x8,8000b118 + 80005f54: 80005f44 .word 0x80005f44 + 80005f58: 00000000 .word 0x00000000 + 80005f5c: 8001ce32 .word 0x8001ce32 + 80005f60: 00000000 .word 0x00000000 + 80005f64: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x8eaf108d6a27ba26 + 80005f68: 000ab503 ld x10,0(x21) + 80005f6c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0xb1584d7ac7ddff97 + 80005f70: 000ab883 ld x17,0(x21) + 80005f74: 008a8a93 addi x21,x21,8 + +0000000080005f78 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b17: + aes64dsm x17, x10, x17 # perform operation + 80005f78: 3f1508b3 aes64dsm x17,x10,x17 + # Check if x17 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x17, Zknd_aes64dsm_cg_cmp_rd_rs2_b17, Zknd_aes64dsm_cg_cmp_rd_rs2_b17_str) + 80005f7c: 000c3383 ld x7,0(x24) + 80005f80: 01138c63 beq x7,x17,80005f98 + 80005f84: 1940546f jal x8,8000b118 + 80005f88: 80005f78 .word 0x80005f78 + 80005f8c: 00000000 .word 0x00000000 + 80005f90: 8001ce6e .word 0x8001ce6e + 80005f94: 00000000 .word 0x00000000 + 80005f98: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x57084eea14b5346b + 80005f9c: 000ab483 ld x9,0(x21) + 80005fa0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0xf9faead0b689fad0 + 80005fa4: 000ab903 ld x18,0(x21) + 80005fa8: 008a8a93 addi x21,x21,8 + +0000000080005fac : +Zknd_aes64dsm_cg_cmp_rd_rs2_b18: + aes64dsm x18, x9, x18 # perform operation + 80005fac: 3f248933 aes64dsm x18,x9,x18 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zknd_aes64dsm_cg_cmp_rd_rs2_b18, Zknd_aes64dsm_cg_cmp_rd_rs2_b18_str) + 80005fb0: 000c3383 ld x7,0(x24) + 80005fb4: 01238c63 beq x7,x18,80005fcc + 80005fb8: 1600546f jal x8,8000b118 + 80005fbc: 80005fac .word 0x80005fac + 80005fc0: 00000000 .word 0x00000000 + 80005fc4: 8001ceaa .word 0x8001ceaa + 80005fc8: 00000000 .word 0x00000000 + 80005fcc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0xcc20736364a54d15 + 80005fd0: 000abe03 ld x28,0(x21) + 80005fd4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x224c2babe33b578b + 80005fd8: 000ab983 ld x19,0(x21) + 80005fdc: 008a8a93 addi x21,x21,8 + +0000000080005fe0 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b19: + aes64dsm x19, x28, x19 # perform operation + 80005fe0: 3f3e09b3 aes64dsm x19,x28,x19 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zknd_aes64dsm_cg_cmp_rd_rs2_b19, Zknd_aes64dsm_cg_cmp_rd_rs2_b19_str) + 80005fe4: 000c3383 ld x7,0(x24) + 80005fe8: 01338c63 beq x7,x19,80006000 + 80005fec: 12c0546f jal x8,8000b118 + 80005ff0: 80005fe0 .word 0x80005fe0 + 80005ff4: 00000000 .word 0x00000000 + 80005ff8: 8001cee6 .word 0x8001cee6 + 80005ffc: 00000000 .word 0x00000000 + 80006000: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x24ca75a528bae2d3 + 80006004: 000ab603 ld x12,0(x21) + 80006008: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0x141246e774a1f054 + 8000600c: 000aba03 ld x20,0(x21) + 80006010: 008a8a93 addi x21,x21,8 + +0000000080006014 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b20: + aes64dsm x20, x12, x20 # perform operation + 80006014: 3f460a33 aes64dsm x20,x12,x20 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zknd_aes64dsm_cg_cmp_rd_rs2_b20, Zknd_aes64dsm_cg_cmp_rd_rs2_b20_str) + 80006018: 000c3383 ld x7,0(x24) + 8000601c: 01438c63 beq x7,x20,80006034 + 80006020: 0f80546f jal x8,8000b118 + 80006024: 80006014 .word 0x80006014 + 80006028: 00000000 .word 0x00000000 + 8000602c: 8001cf22 .word 0x8001cf22 + 80006030: 00000000 .word 0x00000000 + 80006034: 008c0c13 addi x24,x24,8 + + mv x10, x21 # switch data pointer register to avoid conflict with test + 80006038: 000a8513 addi x10,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfd3efd712c878e2f + 8000603c: 00053103 ld x2,0(x10) + 80006040: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x337f7f6dc1260ade + 80006044: 00053a83 ld x21,0(x10) + 80006048: 00850513 addi x10,x10,8 + +000000008000604c : +Zknd_aes64dsm_cg_cmp_rd_rs2_b21: + aes64dsm x21, x2, x21 # perform operation + 8000604c: 3f510ab3 aes64dsm x21,x2,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x21, Zknd_aes64dsm_cg_cmp_rd_rs2_b21, Zknd_aes64dsm_cg_cmp_rd_rs2_b21_str) + 80006050: 000c3383 ld x7,0(x24) + 80006054: 01538c63 beq x7,x21,8000606c + 80006058: 0c00546f jal x8,8000b118 + 8000605c: 8000604c .word 0x8000604c + 80006060: 00000000 .word 0x00000000 + 80006064: 8001cf5e .word 0x8001cf5e + 80006068: 00000000 .word 0x00000000 + 8000606c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xa6cdcf7c90af7b62 + 80006070: 00053283 ld x5,0(x10) + 80006074: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x12b429bf8d517772 + 80006078: 00053b03 ld x22,0(x10) + 8000607c: 00850513 addi x10,x10,8 + +0000000080006080 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b22: + aes64dsm x22, x5, x22 # perform operation + 80006080: 3f628b33 aes64dsm x22,x5,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zknd_aes64dsm_cg_cmp_rd_rs2_b22, Zknd_aes64dsm_cg_cmp_rd_rs2_b22_str) + 80006084: 000c3383 ld x7,0(x24) + 80006088: 01638c63 beq x7,x22,800060a0 + 8000608c: 08c0546f jal x8,8000b118 + 80006090: 80006080 .word 0x80006080 + 80006094: 00000000 .word 0x00000000 + 80006098: 8001cf9a .word 0x8001cf9a + 8000609c: 00000000 .word 0x00000000 + 800060a0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xdbf779ad49468937 + 800060a4: 00053f83 ld x31,0(x10) + 800060a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x2f12bae4d04797cf + 800060ac: 00053b83 ld x23,0(x10) + 800060b0: 00850513 addi x10,x10,8 + +00000000800060b4 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b23: + aes64dsm x23, x31, x23 # perform operation + 800060b4: 3f7f8bb3 aes64dsm x23,x31,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zknd_aes64dsm_cg_cmp_rd_rs2_b23, Zknd_aes64dsm_cg_cmp_rd_rs2_b23_str) + 800060b8: 000c3383 ld x7,0(x24) + 800060bc: 01738c63 beq x7,x23,800060d4 + 800060c0: 0580546f jal x8,8000b118 + 800060c4: 800060b4 .word 0x800060b4 + 800060c8: 00000000 .word 0x00000000 + 800060cc: 8001cfd6 .word 0x8001cfd6 + 800060d0: 00000000 .word 0x00000000 + 800060d4: 008c0c13 addi x24,x24,8 + + mv x11, x24 # switch signature pointer register to avoid conflict with test + 800060d8: 000c0593 addi x11,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x49a8a21a7d5a9a15 + 800060dc: 00053883 ld x17,0(x10) + 800060e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xd372e3ff07edd872 + 800060e4: 00053c03 ld x24,0(x10) + 800060e8: 00850513 addi x10,x10,8 + +00000000800060ec : +Zknd_aes64dsm_cg_cmp_rd_rs2_b24: + aes64dsm x24, x17, x24 # perform operation + 800060ec: 3f888c33 aes64dsm x24,x17,x24 + # Check if x24 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x24, Zknd_aes64dsm_cg_cmp_rd_rs2_b24, Zknd_aes64dsm_cg_cmp_rd_rs2_b24_str) + 800060f0: 0005b383 ld x7,0(x11) + 800060f4: 01838c63 beq x7,x24,8000610c + 800060f8: 0200546f jal x8,8000b118 + 800060fc: 800060ec .word 0x800060ec + 80006100: 00000000 .word 0x00000000 + 80006104: 8001d012 .word 0x8001d012 + 80006108: 00000000 .word 0x00000000 + 8000610c: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x79f29e63bfbebc28 + 80006110: 00053203 ld x4,0(x10) + 80006114: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xf36130316059912c + 80006118: 00053c83 ld x25,0(x10) + 8000611c: 00850513 addi x10,x10,8 + +0000000080006120 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b25: + aes64dsm x25, x4, x25 # perform operation + 80006120: 3f920cb3 aes64dsm x25,x4,x25 + # Check if x25 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x25, Zknd_aes64dsm_cg_cmp_rd_rs2_b25, Zknd_aes64dsm_cg_cmp_rd_rs2_b25_str) + 80006124: 0005b383 ld x7,0(x11) + 80006128: 01938c63 beq x7,x25,80006140 + 8000612c: 7ed0446f jal x8,8000b118 + 80006130: 80006120 .word 0x80006120 + 80006134: 00000000 .word 0x00000000 + 80006138: 8001d04e .word 0x8001d04e + 8000613c: 00000000 .word 0x00000000 + 80006140: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xbc6acff6479be8f7 + 80006144: 00053103 ld x2,0(x10) + 80006148: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x891b11fbad00d8b5 + 8000614c: 00053d03 ld x26,0(x10) + 80006150: 00850513 addi x10,x10,8 + +0000000080006154 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b26: + aes64dsm x26, x2, x26 # perform operation + 80006154: 3fa10d33 aes64dsm x26,x2,x26 + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zknd_aes64dsm_cg_cmp_rd_rs2_b26, Zknd_aes64dsm_cg_cmp_rd_rs2_b26_str) + 80006158: 0005b383 ld x7,0(x11) + 8000615c: 01a38c63 beq x7,x26,80006174 + 80006160: 7b90446f jal x8,8000b118 + 80006164: 80006154 .word 0x80006154 + 80006168: 00000000 .word 0x00000000 + 8000616c: 8001d08a .word 0x8001d08a + 80006170: 00000000 .word 0x00000000 + 80006174: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7827a2518ac5afcc + 80006178: 00053a83 ld x21,0(x10) + 8000617c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x4464268934126b2f + 80006180: 00053d83 ld x27,0(x10) + 80006184: 00850513 addi x10,x10,8 + +0000000080006188 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b27: + aes64dsm x27, x21, x27 # perform operation + 80006188: 3fba8db3 aes64dsm x27,x21,x27 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zknd_aes64dsm_cg_cmp_rd_rs2_b27, Zknd_aes64dsm_cg_cmp_rd_rs2_b27_str) + 8000618c: 0005b383 ld x7,0(x11) + 80006190: 01b38c63 beq x7,x27,800061a8 + 80006194: 7850446f jal x8,8000b118 + 80006198: 80006188 .word 0x80006188 + 8000619c: 00000000 .word 0x00000000 + 800061a0: 8001d0c6 .word 0x8001d0c6 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xd8414198b0e631a0 + 800061ac: 00053183 ld x3,0(x10) + 800061b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x4a65415129c9de97 + 800061b4: 00053e03 ld x28,0(x10) + 800061b8: 00850513 addi x10,x10,8 + +00000000800061bc : +Zknd_aes64dsm_cg_cmp_rd_rs2_b28: + aes64dsm x28, x3, x28 # perform operation + 800061bc: 3fc18e33 aes64dsm x28,x3,x28 + # Check if x28 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x28, Zknd_aes64dsm_cg_cmp_rd_rs2_b28, Zknd_aes64dsm_cg_cmp_rd_rs2_b28_str) + 800061c0: 0005b383 ld x7,0(x11) + 800061c4: 01c38c63 beq x7,x28,800061dc + 800061c8: 7510446f jal x8,8000b118 + 800061cc: 800061bc .word 0x800061bc + 800061d0: 00000000 .word 0x00000000 + 800061d4: 8001d102 .word 0x8001d102 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xcfc7260f77c4f60f + 800061e0: 00053c03 ld x24,0(x10) + 800061e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x51b54e5365ad4c71 + 800061e8: 00053e83 ld x29,0(x10) + 800061ec: 00850513 addi x10,x10,8 + +00000000800061f0 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b29: + aes64dsm x29, x24, x29 # perform operation + 800061f0: 3fdc0eb3 aes64dsm x29,x24,x29 + # Check if x29 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x29, Zknd_aes64dsm_cg_cmp_rd_rs2_b29, Zknd_aes64dsm_cg_cmp_rd_rs2_b29_str) + 800061f4: 0005b383 ld x7,0(x11) + 800061f8: 01d38c63 beq x7,x29,80006210 + 800061fc: 71d0446f jal x8,8000b118 + 80006200: 800061f0 .word 0x800061f0 + 80006204: 00000000 .word 0x00000000 + 80006208: 8001d13e .word 0x8001d13e + 8000620c: 00000000 .word 0x00000000 + 80006210: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x574e9f33871ff1cf + 80006214: 00053e83 ld x29,0(x10) + 80006218: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xf1c6126dee4fcc88 + 8000621c: 00053f03 ld x30,0(x10) + 80006220: 00850513 addi x10,x10,8 + +0000000080006224 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b30: + aes64dsm x30, x29, x30 # perform operation + 80006224: 3fee8f33 aes64dsm x30,x29,x30 + # Check if x30 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x30, Zknd_aes64dsm_cg_cmp_rd_rs2_b30, Zknd_aes64dsm_cg_cmp_rd_rs2_b30_str) + 80006228: 0005b383 ld x7,0(x11) + 8000622c: 01e38c63 beq x7,x30,80006244 + 80006230: 6e90446f jal x8,8000b118 + 80006234: 80006224 .word 0x80006224 + 80006238: 00000000 .word 0x00000000 + 8000623c: 8001d17a .word 0x8001d17a + 80006240: 00000000 .word 0x00000000 + 80006244: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x857befe8da473757 + 80006248: 00053a83 ld x21,0(x10) + 8000624c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xbda5bc5c9a06684b + 80006250: 00053f83 ld x31,0(x10) + 80006254: 00850513 addi x10,x10,8 + +0000000080006258 : +Zknd_aes64dsm_cg_cmp_rd_rs2_b31: + aes64dsm x31, x21, x31 # perform operation + 80006258: 3ffa8fb3 aes64dsm x31,x21,x31 + # Check if x31 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x31, Zknd_aes64dsm_cg_cmp_rd_rs2_b31, Zknd_aes64dsm_cg_cmp_rd_rs2_b31_str) + 8000625c: 0005b383 ld x7,0(x11) + 80006260: 01f38c63 beq x7,x31,80006278 + 80006264: 6b50446f jal x8,8000b118 + 80006268: 80006258 .word 0x80006258 + 8000626c: 00000000 .word 0x00000000 + 80006270: 8001d1b6 .word 0x8001d1b6 + 80006274: 00000000 .word 0x00000000 + 80006278: 00858593 addi x11,x11,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xdc26eadd19f84da3 + 8000627c: 00053003 ld x0,0(x10) + 80006280: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x19d2ef4602aa6da0 + 80006284: 00053003 ld x0,0(x10) + 80006288: 00850513 addi x10,x10,8 + +000000008000628c : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b0: + aes64dsm x0, x0, x0 # perform operation + 8000628c: 3e000033 aes64dsm x0,x0,x0 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b0, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b0_str) + 80006290: 0005b383 ld x7,0(x11) + 80006294: 00038c63 beq x7,x0,800062ac + 80006298: 6810446f jal x8,8000b118 + 8000629c: 8000628c .word 0x8000628c + 800062a0: 00000000 .word 0x00000000 + 800062a4: 8001d1f2 .word 0x8001d1f2 + 800062a8: 00000000 .word 0x00000000 + 800062ac: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x82979e97abdecf81 + 800062b0: 00053083 ld x1,0(x10) + 800062b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xa135c337ec8e0b3d + 800062b8: 00053083 ld x1,0(x10) + 800062bc: 00850513 addi x10,x10,8 + +00000000800062c0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b1: + aes64dsm x1, x1, x1 # perform operation + 800062c0: 3e1080b3 aes64dsm x1,x1,x1 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b1, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b1_str) + 800062c4: 0005b383 ld x7,0(x11) + 800062c8: 00138c63 beq x7,x1,800062e0 + 800062cc: 64d0446f jal x8,8000b118 + 800062d0: 800062c0 .word 0x800062c0 + 800062d4: 00000000 .word 0x00000000 + 800062d8: 8001d231 .word 0x8001d231 + 800062dc: 00000000 .word 0x00000000 + 800062e0: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xd722f667ed8ea758 + 800062e4: 00053103 ld x2,0(x10) + 800062e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x4ffc1c35e369192f + 800062ec: 00053103 ld x2,0(x10) + 800062f0: 00850513 addi x10,x10,8 + +00000000800062f4 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b2: + aes64dsm x2, x2, x2 # perform operation + 800062f4: 3e210133 aes64dsm x2,x2,x2 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b2, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b2_str) + 800062f8: 0005b383 ld x7,0(x11) + 800062fc: 00238c63 beq x7,x2,80006314 + 80006300: 6190446f jal x8,8000b118 + 80006304: 800062f4 .word 0x800062f4 + 80006308: 00000000 .word 0x00000000 + 8000630c: 8001d270 .word 0x8001d270 + 80006310: 00000000 .word 0x00000000 + 80006314: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8184305eb355f5c9 + 80006318: 00053183 ld x3,0(x10) + 8000631c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xb21e80bb1f5bffa4 + 80006320: 00053183 ld x3,0(x10) + 80006324: 00850513 addi x10,x10,8 + +0000000080006328 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b3: + aes64dsm x3, x3, x3 # perform operation + 80006328: 3e3181b3 aes64dsm x3,x3,x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b3, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b3_str) + 8000632c: 0005b383 ld x7,0(x11) + 80006330: 00338c63 beq x7,x3,80006348 + 80006334: 5e50446f jal x8,8000b118 + 80006338: 80006328 .word 0x80006328 + 8000633c: 00000000 .word 0x00000000 + 80006340: 8001d2af .word 0x8001d2af + 80006344: 00000000 .word 0x00000000 + 80006348: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x9dda94d098b015d5 + 8000634c: 00053203 ld x4,0(x10) + 80006350: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x821fd9812ef76bcd + 80006354: 00053203 ld x4,0(x10) + 80006358: 00850513 addi x10,x10,8 + +000000008000635c : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b4: + aes64dsm x4, x4, x4 # perform operation + 8000635c: 3e420233 aes64dsm x4,x4,x4 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b4, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b4_str) + 80006360: 0005b383 ld x7,0(x11) + 80006364: 00438c63 beq x7,x4,8000637c + 80006368: 5b10446f jal x8,8000b118 + 8000636c: 8000635c .word 0x8000635c + 80006370: 00000000 .word 0x00000000 + 80006374: 8001d2ee .word 0x8001d2ee + 80006378: 00000000 .word 0x00000000 + 8000637c: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x3386164b3992e6e1 + 80006380: 00053283 ld x5,0(x10) + 80006384: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xb4fead1c259361c7 + 80006388: 00053283 ld x5,0(x10) + 8000638c: 00850513 addi x10,x10,8 + +0000000080006390 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b5: + aes64dsm x5, x5, x5 # perform operation + 80006390: 3e5282b3 aes64dsm x5,x5,x5 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b5, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b5_str) + 80006394: 0005b383 ld x7,0(x11) + 80006398: 00538c63 beq x7,x5,800063b0 + 8000639c: 57d0446f jal x8,8000b118 + 800063a0: 80006390 .word 0x80006390 + 800063a4: 00000000 .word 0x00000000 + 800063a8: 8001d32d .word 0x8001d32d + 800063ac: 00000000 .word 0x00000000 + 800063b0: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xef76b16416d8a9a0 + 800063b4: 00053303 ld x6,0(x10) + 800063b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7ee856711bd5fa29 + 800063bc: 00053303 ld x6,0(x10) + 800063c0: 00850513 addi x10,x10,8 + +00000000800063c4 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b6: + aes64dsm x6, x6, x6 # perform operation + 800063c4: 3e630333 aes64dsm x6,x6,x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b6, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b6_str) + 800063c8: 0005b383 ld x7,0(x11) + 800063cc: 00638c63 beq x7,x6,800063e4 + 800063d0: 5490446f jal x8,8000b118 + 800063d4: 800063c4 .word 0x800063c4 + 800063d8: 00000000 .word 0x00000000 + 800063dc: 8001d36c .word 0x8001d36c + 800063e0: 00000000 .word 0x00000000 + 800063e4: 00858593 addi x11,x11,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800063e8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800063ec: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x16e7980ca951e7c0 + 800063f0: 00053383 ld x7,0(x10) + 800063f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x1471b867f853744b + 800063f8: 00053383 ld x7,0(x10) + 800063fc: 00850513 addi x10,x10,8 + +0000000080006400 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b7: + aes64dsm x7, x7, x7 # perform operation + 80006400: 3e7383b3 aes64dsm x7,x7,x7 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b7, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b7_str) + 80006404: 0005b203 ld x4,0(x11) + 80006408: 00720c63 beq x4,x7,80006420 + 8000640c: 4f5042ef jal x5,8000b100 + 80006410: 80006400 .word 0x80006400 + 80006414: 00000000 .word 0x00000000 + 80006418: 8001d3ab .word 0x8001d3ab + 8000641c: 00000000 .word 0x00000000 + 80006420: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x89b7dc55257cc14a + 80006424: 00053403 ld x8,0(x10) + 80006428: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xd1f092a07e692483 + 8000642c: 00053403 ld x8,0(x10) + 80006430: 00850513 addi x10,x10,8 + +0000000080006434 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b8: + aes64dsm x8, x8, x8 # perform operation + 80006434: 3e840433 aes64dsm x8,x8,x8 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b8, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b8_str) + 80006438: 0005b203 ld x4,0(x11) + 8000643c: 00820c63 beq x4,x8,80006454 + 80006440: 4c1042ef jal x5,8000b100 + 80006444: 80006434 .word 0x80006434 + 80006448: 00000000 .word 0x00000000 + 8000644c: 8001d3ea .word 0x8001d3ea + 80006450: 00000000 .word 0x00000000 + 80006454: 00858593 addi x11,x11,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x654ef464eec3a31f + 80006458: 00053483 ld x9,0(x10) + 8000645c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x97b0b8be9d19d9b7 + 80006460: 00053483 ld x9,0(x10) + 80006464: 00850513 addi x10,x10,8 + +0000000080006468 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b9: + aes64dsm x9, x9, x9 # perform operation + 80006468: 3e9484b3 aes64dsm x9,x9,x9 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b9, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b9_str) + 8000646c: 0005b203 ld x4,0(x11) + 80006470: 00920c63 beq x4,x9,80006488 + 80006474: 48d042ef jal x5,8000b100 + 80006478: 80006468 .word 0x80006468 + 8000647c: 00000000 .word 0x00000000 + 80006480: 8001d429 .word 0x8001d429 + 80006484: 00000000 .word 0x00000000 + 80006488: 00858593 addi x11,x11,8 + + mv x6, x10 # switch data pointer register to avoid conflict with test + 8000648c: 00050313 addi x6,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xfd055e7e6f6c36e6 + 80006490: 00033503 ld x10,0(x6) + 80006494: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xebd3de1f1eb55b24 + 80006498: 00033503 ld x10,0(x6) + 8000649c: 00830313 addi x6,x6,8 + +00000000800064a0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b10: + aes64dsm x10, x10, x10 # perform operation + 800064a0: 3ea50533 aes64dsm x10,x10,x10 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b10, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b10_str) + 800064a4: 0005b203 ld x4,0(x11) + 800064a8: 00a20c63 beq x4,x10,800064c0 + 800064ac: 455042ef jal x5,8000b100 + 800064b0: 800064a0 .word 0x800064a0 + 800064b4: 00000000 .word 0x00000000 + 800064b8: 8001d468 .word 0x8001d468 + 800064bc: 00000000 .word 0x00000000 + 800064c0: 00858593 addi x11,x11,8 + + mv x22, x11 # switch signature pointer register to avoid conflict with test + 800064c4: 00058b13 addi x22,x11,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x467d13ea7e1b6bf4 + 800064c8: 00033583 ld x11,0(x6) + 800064cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfe434d23235bdb2b + 800064d0: 00033583 ld x11,0(x6) + 800064d4: 00830313 addi x6,x6,8 + +00000000800064d8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b11: + aes64dsm x11, x11, x11 # perform operation + 800064d8: 3eb585b3 aes64dsm x11,x11,x11 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b11, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b11_str) + 800064dc: 000b3203 ld x4,0(x22) + 800064e0: 00b20c63 beq x4,x11,800064f8 + 800064e4: 41d042ef jal x5,8000b100 + 800064e8: 800064d8 .word 0x800064d8 + 800064ec: 00000000 .word 0x00000000 + 800064f0: 8001d4a8 .word 0x8001d4a8 + 800064f4: 00000000 .word 0x00000000 + 800064f8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x563d1042ae5d4614 + 800064fc: 00033603 ld x12,0(x6) + 80006500: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x97a42ea9cd28308d + 80006504: 00033603 ld x12,0(x6) + 80006508: 00830313 addi x6,x6,8 + +000000008000650c : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b12: + aes64dsm x12, x12, x12 # perform operation + 8000650c: 3ec60633 aes64dsm x12,x12,x12 + # Check if x12 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x12, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b12, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b12_str) + 80006510: 000b3203 ld x4,0(x22) + 80006514: 00c20c63 beq x4,x12,8000652c + 80006518: 3e9042ef jal x5,8000b100 + 8000651c: 8000650c .word 0x8000650c + 80006520: 00000000 .word 0x00000000 + 80006524: 8001d4e8 .word 0x8001d4e8 + 80006528: 00000000 .word 0x00000000 + 8000652c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x14855f0a193653fd + 80006530: 00033683 ld x13,0(x6) + 80006534: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xd1c30b6ea7717b7e + 80006538: 00033683 ld x13,0(x6) + 8000653c: 00830313 addi x6,x6,8 + +0000000080006540 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b13: + aes64dsm x13, x13, x13 # perform operation + 80006540: 3ed686b3 aes64dsm x13,x13,x13 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b13, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b13_str) + 80006544: 000b3203 ld x4,0(x22) + 80006548: 00d20c63 beq x4,x13,80006560 + 8000654c: 3b5042ef jal x5,8000b100 + 80006550: 80006540 .word 0x80006540 + 80006554: 00000000 .word 0x00000000 + 80006558: 8001d528 .word 0x8001d528 + 8000655c: 00000000 .word 0x00000000 + 80006560: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xfa198077e75b2203 + 80006564: 00033703 ld x14,0(x6) + 80006568: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x1e1e76eadbca73f1 + 8000656c: 00033703 ld x14,0(x6) + 80006570: 00830313 addi x6,x6,8 + +0000000080006574 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b14: + aes64dsm x14, x14, x14 # perform operation + 80006574: 3ee70733 aes64dsm x14,x14,x14 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b14, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b14_str) + 80006578: 000b3203 ld x4,0(x22) + 8000657c: 00e20c63 beq x4,x14,80006594 + 80006580: 381042ef jal x5,8000b100 + 80006584: 80006574 .word 0x80006574 + 80006588: 00000000 .word 0x00000000 + 8000658c: 8001d568 .word 0x8001d568 + 80006590: 00000000 .word 0x00000000 + 80006594: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xd3a83e5939cf8a0f + 80006598: 00033783 ld x15,0(x6) + 8000659c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xee48bb0704f6750e + 800065a0: 00033783 ld x15,0(x6) + 800065a4: 00830313 addi x6,x6,8 + +00000000800065a8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b15: + aes64dsm x15, x15, x15 # perform operation + 800065a8: 3ef787b3 aes64dsm x15,x15,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b15, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b15_str) + 800065ac: 000b3203 ld x4,0(x22) + 800065b0: 00f20c63 beq x4,x15,800065c8 + 800065b4: 34d042ef jal x5,8000b100 + 800065b8: 800065a8 .word 0x800065a8 + 800065bc: 00000000 .word 0x00000000 + 800065c0: 8001d5a8 .word 0x8001d5a8 + 800065c4: 00000000 .word 0x00000000 + 800065c8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xdfbdaa008324a7c8 + 800065cc: 00033803 ld x16,0(x6) + 800065d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x158e97d3a67582f7 + 800065d4: 00033803 ld x16,0(x6) + 800065d8: 00830313 addi x6,x6,8 + +00000000800065dc : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b16: + aes64dsm x16, x16, x16 # perform operation + 800065dc: 3f080833 aes64dsm x16,x16,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b16, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b16_str) + 800065e0: 000b3203 ld x4,0(x22) + 800065e4: 01020c63 beq x4,x16,800065fc + 800065e8: 319042ef jal x5,8000b100 + 800065ec: 800065dc .word 0x800065dc + 800065f0: 00000000 .word 0x00000000 + 800065f4: 8001d5e8 .word 0x8001d5e8 + 800065f8: 00000000 .word 0x00000000 + 800065fc: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x657c7dd6e7635c1f + 80006600: 00033883 ld x17,0(x6) + 80006604: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x7cc3a0200ecabd9c + 80006608: 00033883 ld x17,0(x6) + 8000660c: 00830313 addi x6,x6,8 + +0000000080006610 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b17: + aes64dsm x17, x17, x17 # perform operation + 80006610: 3f1888b3 aes64dsm x17,x17,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b17, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b17_str) + 80006614: 000b3203 ld x4,0(x22) + 80006618: 01120c63 beq x4,x17,80006630 + 8000661c: 2e5042ef jal x5,8000b100 + 80006620: 80006610 .word 0x80006610 + 80006624: 00000000 .word 0x00000000 + 80006628: 8001d628 .word 0x8001d628 + 8000662c: 00000000 .word 0x00000000 + 80006630: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x3453b4fd2f0f82f3 + 80006634: 00033903 ld x18,0(x6) + 80006638: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x738d8ebdc5597eb3 + 8000663c: 00033903 ld x18,0(x6) + 80006640: 00830313 addi x6,x6,8 + +0000000080006644 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b18: + aes64dsm x18, x18, x18 # perform operation + 80006644: 3f290933 aes64dsm x18,x18,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b18, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b18_str) + 80006648: 000b3203 ld x4,0(x22) + 8000664c: 01220c63 beq x4,x18,80006664 + 80006650: 2b1042ef jal x5,8000b100 + 80006654: 80006644 .word 0x80006644 + 80006658: 00000000 .word 0x00000000 + 8000665c: 8001d668 .word 0x8001d668 + 80006660: 00000000 .word 0x00000000 + 80006664: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x5627dfed5b049279 + 80006668: 00033983 ld x19,0(x6) + 8000666c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x563556c15350cfa2 + 80006670: 00033983 ld x19,0(x6) + 80006674: 00830313 addi x6,x6,8 + +0000000080006678 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b19: + aes64dsm x19, x19, x19 # perform operation + 80006678: 3f3989b3 aes64dsm x19,x19,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b19, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b19_str) + 8000667c: 000b3203 ld x4,0(x22) + 80006680: 01320c63 beq x4,x19,80006698 + 80006684: 27d042ef jal x5,8000b100 + 80006688: 80006678 .word 0x80006678 + 8000668c: 00000000 .word 0x00000000 + 80006690: 8001d6a8 .word 0x8001d6a8 + 80006694: 00000000 .word 0x00000000 + 80006698: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x39a04d7eab002d75 + 8000669c: 00033a03 ld x20,0(x6) + 800066a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x30df5341ec32405e + 800066a4: 00033a03 ld x20,0(x6) + 800066a8: 00830313 addi x6,x6,8 + +00000000800066ac : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b20: + aes64dsm x20, x20, x20 # perform operation + 800066ac: 3f4a0a33 aes64dsm x20,x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b20, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b20_str) + 800066b0: 000b3203 ld x4,0(x22) + 800066b4: 01420c63 beq x4,x20,800066cc + 800066b8: 249042ef jal x5,8000b100 + 800066bc: 800066ac .word 0x800066ac + 800066c0: 00000000 .word 0x00000000 + 800066c4: 8001d6e8 .word 0x8001d6e8 + 800066c8: 00000000 .word 0x00000000 + 800066cc: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xa5937f0be9dc8751 + 800066d0: 00033a83 ld x21,0(x6) + 800066d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x9faa0d9be02c45f1 + 800066d8: 00033a83 ld x21,0(x6) + 800066dc: 00830313 addi x6,x6,8 + +00000000800066e0 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b21: + aes64dsm x21, x21, x21 # perform operation + 800066e0: 3f5a8ab3 aes64dsm x21,x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b21, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b21_str) + 800066e4: 000b3203 ld x4,0(x22) + 800066e8: 01520c63 beq x4,x21,80006700 + 800066ec: 215042ef jal x5,8000b100 + 800066f0: 800066e0 .word 0x800066e0 + 800066f4: 00000000 .word 0x00000000 + 800066f8: 8001d728 .word 0x8001d728 + 800066fc: 00000000 .word 0x00000000 + 80006700: 008b0b13 addi x22,x22,8 + + mv x15, x22 # switch signature pointer register to avoid conflict with test + 80006704: 000b0793 addi x15,x22,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xb0fd5cd668e8ef25 + 80006708: 00033b03 ld x22,0(x6) + 8000670c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xb06f8c2c417c38c7 + 80006710: 00033b03 ld x22,0(x6) + 80006714: 00830313 addi x6,x6,8 + +0000000080006718 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b22: + aes64dsm x22, x22, x22 # perform operation + 80006718: 3f6b0b33 aes64dsm x22,x22,x22 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b22, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b22_str) + 8000671c: 0007b203 ld x4,0(x15) + 80006720: 01620c63 beq x4,x22,80006738 + 80006724: 1dd042ef jal x5,8000b100 + 80006728: 80006718 .word 0x80006718 + 8000672c: 00000000 .word 0x00000000 + 80006730: 8001d768 .word 0x8001d768 + 80006734: 00000000 .word 0x00000000 + 80006738: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xdbd9223122903e87 + 8000673c: 00033b83 ld x23,0(x6) + 80006740: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x940a1ee1320396f4 + 80006744: 00033b83 ld x23,0(x6) + 80006748: 00830313 addi x6,x6,8 + +000000008000674c : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b23: + aes64dsm x23, x23, x23 # perform operation + 8000674c: 3f7b8bb3 aes64dsm x23,x23,x23 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b23, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b23_str) + 80006750: 0007b203 ld x4,0(x15) + 80006754: 01720c63 beq x4,x23,8000676c + 80006758: 1a9042ef jal x5,8000b100 + 8000675c: 8000674c .word 0x8000674c + 80006760: 00000000 .word 0x00000000 + 80006764: 8001d7a8 .word 0x8001d7a8 + 80006768: 00000000 .word 0x00000000 + 8000676c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xcb10b574bee58e07 + 80006770: 00033c03 ld x24,0(x6) + 80006774: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x021e65d1c33384fb + 80006778: 00033c03 ld x24,0(x6) + 8000677c: 00830313 addi x6,x6,8 + +0000000080006780 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b24: + aes64dsm x24, x24, x24 # perform operation + 80006780: 3f8c0c33 aes64dsm x24,x24,x24 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b24, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b24_str) + 80006784: 0007b203 ld x4,0(x15) + 80006788: 01820c63 beq x4,x24,800067a0 + 8000678c: 175042ef jal x5,8000b100 + 80006790: 80006780 .word 0x80006780 + 80006794: 00000000 .word 0x00000000 + 80006798: 8001d7e8 .word 0x8001d7e8 + 8000679c: 00000000 .word 0x00000000 + 800067a0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x46f82c033e0487bb + 800067a4: 00033c83 ld x25,0(x6) + 800067a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x5ba91aef7ba4c45f + 800067ac: 00033c83 ld x25,0(x6) + 800067b0: 00830313 addi x6,x6,8 + +00000000800067b4 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b25: + aes64dsm x25, x25, x25 # perform operation + 800067b4: 3f9c8cb3 aes64dsm x25,x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b25, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b25_str) + 800067b8: 0007b203 ld x4,0(x15) + 800067bc: 01920c63 beq x4,x25,800067d4 + 800067c0: 141042ef jal x5,8000b100 + 800067c4: 800067b4 .word 0x800067b4 + 800067c8: 00000000 .word 0x00000000 + 800067cc: 8001d828 .word 0x8001d828 + 800067d0: 00000000 .word 0x00000000 + 800067d4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xefaa9ffa7bac60a0 + 800067d8: 00033d03 ld x26,0(x6) + 800067dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xdd2a25620f1c9dc2 + 800067e0: 00033d03 ld x26,0(x6) + 800067e4: 00830313 addi x6,x6,8 + +00000000800067e8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b26: + aes64dsm x26, x26, x26 # perform operation + 800067e8: 3fad0d33 aes64dsm x26,x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b26, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b26_str) + 800067ec: 0007b203 ld x4,0(x15) + 800067f0: 01a20c63 beq x4,x26,80006808 + 800067f4: 10d042ef jal x5,8000b100 + 800067f8: 800067e8 .word 0x800067e8 + 800067fc: 00000000 .word 0x00000000 + 80006800: 8001d868 .word 0x8001d868 + 80006804: 00000000 .word 0x00000000 + 80006808: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x6f469b10a7af5176 + 8000680c: 00033d83 ld x27,0(x6) + 80006810: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x3ef10f379202484e + 80006814: 00033d83 ld x27,0(x6) + 80006818: 00830313 addi x6,x6,8 + +000000008000681c : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b27: + aes64dsm x27, x27, x27 # perform operation + 8000681c: 3fbd8db3 aes64dsm x27,x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b27, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b27_str) + 80006820: 0007b203 ld x4,0(x15) + 80006824: 01b20c63 beq x4,x27,8000683c + 80006828: 0d9042ef jal x5,8000b100 + 8000682c: 8000681c .word 0x8000681c + 80006830: 00000000 .word 0x00000000 + 80006834: 8001d8a8 .word 0x8001d8a8 + 80006838: 00000000 .word 0x00000000 + 8000683c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6132faebcf2a3b17 + 80006840: 00033e03 ld x28,0(x6) + 80006844: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x4818ccfb50a90694 + 80006848: 00033e03 ld x28,0(x6) + 8000684c: 00830313 addi x6,x6,8 + +0000000080006850 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b28: + aes64dsm x28, x28, x28 # perform operation + 80006850: 3fce0e33 aes64dsm x28,x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b28, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b28_str) + 80006854: 0007b203 ld x4,0(x15) + 80006858: 01c20c63 beq x4,x28,80006870 + 8000685c: 0a5042ef jal x5,8000b100 + 80006860: 80006850 .word 0x80006850 + 80006864: 00000000 .word 0x00000000 + 80006868: 8001d8e8 .word 0x8001d8e8 + 8000686c: 00000000 .word 0x00000000 + 80006870: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x5856c12205409612 + 80006874: 00033e83 ld x29,0(x6) + 80006878: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x2397343b9e12cc6d + 8000687c: 00033e83 ld x29,0(x6) + 80006880: 00830313 addi x6,x6,8 + +0000000080006884 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b29: + aes64dsm x29, x29, x29 # perform operation + 80006884: 3fde8eb3 aes64dsm x29,x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b29, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b29_str) + 80006888: 0007b203 ld x4,0(x15) + 8000688c: 01d20c63 beq x4,x29,800068a4 + 80006890: 071042ef jal x5,8000b100 + 80006894: 80006884 .word 0x80006884 + 80006898: 00000000 .word 0x00000000 + 8000689c: 8001d928 .word 0x8001d928 + 800068a0: 00000000 .word 0x00000000 + 800068a4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x48559df78c97a4e4 + 800068a8: 00033f03 ld x30,0(x6) + 800068ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x340fe148c0a72b17 + 800068b0: 00033f03 ld x30,0(x6) + 800068b4: 00830313 addi x6,x6,8 + +00000000800068b8 : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b30: + aes64dsm x30, x30, x30 # perform operation + 800068b8: 3fef0f33 aes64dsm x30,x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b30, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b30_str) + 800068bc: 0007b203 ld x4,0(x15) + 800068c0: 01e20c63 beq x4,x30,800068d8 + 800068c4: 03d042ef jal x5,8000b100 + 800068c8: 800068b8 .word 0x800068b8 + 800068cc: 00000000 .word 0x00000000 + 800068d0: 8001d968 .word 0x8001d968 + 800068d4: 00000000 .word 0x00000000 + 800068d8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xf728c312bfb7bb34 + 800068dc: 00033f83 ld x31,0(x6) + 800068e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x32b1c34b23f18b28 + 800068e4: 00033f83 ld x31,0(x6) + 800068e8: 00830313 addi x6,x6,8 + +00000000800068ec : +Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b31: + aes64dsm x31, x31, x31 # perform operation + 800068ec: 3fff8fb3 aes64dsm x31,x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b31, Zknd_aes64dsm_cg_cmp_rd_rs1_rs2_b31_str) + 800068f0: 0007b203 ld x4,0(x15) + 800068f4: 01f20c63 beq x4,x31,8000690c + 800068f8: 009042ef jal x5,8000b100 + 800068fc: 800068ec .word 0x800068ec + 80006900: 00000000 .word 0x00000000 + 80006904: 8001d9a8 .word 0x8001d9a8 + 80006908: 00000000 .word 0x00000000 + 8000690c: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000000000000 + 80006910: 00033f03 ld x30,0(x6) + 80006914: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000000000000 + 80006918: 00033503 ld x10,0(x6) + 8000691c: 00830313 addi x6,x6,8 + +0000000080006920 : +Zknd_aes64dsm_cg_cp_sbox_b0: + aes64dsm x23, x30, x10 # perform operation + 80006920: 3eaf0bb3 aes64dsm x23,x30,x10 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b0, Zknd_aes64dsm_cg_cp_sbox_b0_str) + 80006924: 0007b203 ld x4,0(x15) + 80006928: 01720c63 beq x4,x23,80006940 + 8000692c: 7d4042ef jal x5,8000b100 + 80006930: 80006920 .word 0x80006920 + 80006934: 00000000 .word 0x00000000 + 80006938: 8001d9e8 .word 0x8001d9e8 + 8000693c: 00000000 .word 0x00000000 + 80006940: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0101010101010101 + 80006944: 00033483 ld x9,0(x6) + 80006948: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0101010101010101 + 8000694c: 00033c83 ld x25,0(x6) + 80006950: 00830313 addi x6,x6,8 + +0000000080006954 : +Zknd_aes64dsm_cg_cp_sbox_b1: + aes64dsm x12, x9, x25 # perform operation + 80006954: 3f948633 aes64dsm x12,x9,x25 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b1, Zknd_aes64dsm_cg_cp_sbox_b1_str) + 80006958: 0007b203 ld x4,0(x15) + 8000695c: 00c20c63 beq x4,x12,80006974 + 80006960: 7a0042ef jal x5,8000b100 + 80006964: 80006954 .word 0x80006954 + 80006968: 00000000 .word 0x00000000 + 8000696c: 8001da20 .word 0x8001da20 + 80006970: 00000000 .word 0x00000000 + 80006974: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0202020202020202 + 80006978: 00033a03 ld x20,0(x6) + 8000697c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0202020202020202 + 80006980: 00033683 ld x13,0(x6) + 80006984: 00830313 addi x6,x6,8 + +0000000080006988 : +Zknd_aes64dsm_cg_cp_sbox_b2: + aes64dsm x23, x20, x13 # perform operation + 80006988: 3eda0bb3 aes64dsm x23,x20,x13 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b2, Zknd_aes64dsm_cg_cp_sbox_b2_str) + 8000698c: 0007b203 ld x4,0(x15) + 80006990: 01720c63 beq x4,x23,800069a8 + 80006994: 76c042ef jal x5,8000b100 + 80006998: 80006988 .word 0x80006988 + 8000699c: 00000000 .word 0x00000000 + 800069a0: 8001da58 .word 0x8001da58 + 800069a4: 00000000 .word 0x00000000 + 800069a8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0303030303030303 + 800069ac: 00033803 ld x16,0(x6) + 800069b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0303030303030303 + 800069b4: 00033503 ld x10,0(x6) + 800069b8: 00830313 addi x6,x6,8 + +00000000800069bc : +Zknd_aes64dsm_cg_cp_sbox_b3: + aes64dsm x1, x16, x10 # perform operation + 800069bc: 3ea800b3 aes64dsm x1,x16,x10 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b3, Zknd_aes64dsm_cg_cp_sbox_b3_str) + 800069c0: 0007b203 ld x4,0(x15) + 800069c4: 00120c63 beq x4,x1,800069dc + 800069c8: 738042ef jal x5,8000b100 + 800069cc: 800069bc .word 0x800069bc + 800069d0: 00000000 .word 0x00000000 + 800069d4: 8001da90 .word 0x8001da90 + 800069d8: 00000000 .word 0x00000000 + 800069dc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0404040404040404 + 800069e0: 00033583 ld x11,0(x6) + 800069e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0404040404040404 + 800069e8: 00033083 ld x1,0(x6) + 800069ec: 00830313 addi x6,x6,8 + +00000000800069f0 : +Zknd_aes64dsm_cg_cp_sbox_b4: + aes64dsm x16, x11, x1 # perform operation + 800069f0: 3e158833 aes64dsm x16,x11,x1 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b4, Zknd_aes64dsm_cg_cp_sbox_b4_str) + 800069f4: 0007b203 ld x4,0(x15) + 800069f8: 01020c63 beq x4,x16,80006a10 + 800069fc: 704042ef jal x5,8000b100 + 80006a00: 800069f0 .word 0x800069f0 + 80006a04: 00000000 .word 0x00000000 + 80006a08: 8001dac8 .word 0x8001dac8 + 80006a0c: 00000000 .word 0x00000000 + 80006a10: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0505050505050505 + 80006a14: 00033a03 ld x20,0(x6) + 80006a18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0505050505050505 + 80006a1c: 00033603 ld x12,0(x6) + 80006a20: 00830313 addi x6,x6,8 + +0000000080006a24 : +Zknd_aes64dsm_cg_cp_sbox_b5: + aes64dsm x11, x20, x12 # perform operation + 80006a24: 3eca05b3 aes64dsm x11,x20,x12 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b5, Zknd_aes64dsm_cg_cp_sbox_b5_str) + 80006a28: 0007b203 ld x4,0(x15) + 80006a2c: 00b20c63 beq x4,x11,80006a44 + 80006a30: 6d0042ef jal x5,8000b100 + 80006a34: 80006a24 .word 0x80006a24 + 80006a38: 00000000 .word 0x00000000 + 80006a3c: 8001db00 .word 0x8001db00 + 80006a40: 00000000 .word 0x00000000 + 80006a44: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0606060606060606 + 80006a48: 00033883 ld x17,0(x6) + 80006a4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0606060606060606 + 80006a50: 00033503 ld x10,0(x6) + 80006a54: 00830313 addi x6,x6,8 + +0000000080006a58 : +Zknd_aes64dsm_cg_cp_sbox_b6: + aes64dsm x8, x17, x10 # perform operation + 80006a58: 3ea88433 aes64dsm x8,x17,x10 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b6, Zknd_aes64dsm_cg_cp_sbox_b6_str) + 80006a5c: 0007b203 ld x4,0(x15) + 80006a60: 00820c63 beq x4,x8,80006a78 + 80006a64: 69c042ef jal x5,8000b100 + 80006a68: 80006a58 .word 0x80006a58 + 80006a6c: 00000000 .word 0x00000000 + 80006a70: 8001db38 .word 0x8001db38 + 80006a74: 00000000 .word 0x00000000 + 80006a78: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0707070707070707 + 80006a7c: 00033883 ld x17,0(x6) + 80006a80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0707070707070707 + 80006a84: 00033a83 ld x21,0(x6) + 80006a88: 00830313 addi x6,x6,8 + +0000000080006a8c : +Zknd_aes64dsm_cg_cp_sbox_b7: + aes64dsm x23, x17, x21 # perform operation + 80006a8c: 3f588bb3 aes64dsm x23,x17,x21 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b7, Zknd_aes64dsm_cg_cp_sbox_b7_str) + 80006a90: 0007b203 ld x4,0(x15) + 80006a94: 01720c63 beq x4,x23,80006aac + 80006a98: 668042ef jal x5,8000b100 + 80006a9c: 80006a8c .word 0x80006a8c + 80006aa0: 00000000 .word 0x00000000 + 80006aa4: 8001db70 .word 0x8001db70 + 80006aa8: 00000000 .word 0x00000000 + 80006aac: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0808080808080808 + 80006ab0: 00033803 ld x16,0(x6) + 80006ab4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0808080808080808 + 80006ab8: 00033883 ld x17,0(x6) + 80006abc: 00830313 addi x6,x6,8 + +0000000080006ac0 : +Zknd_aes64dsm_cg_cp_sbox_b8: + aes64dsm x26, x16, x17 # perform operation + 80006ac0: 3f180d33 aes64dsm x26,x16,x17 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b8, Zknd_aes64dsm_cg_cp_sbox_b8_str) + 80006ac4: 0007b203 ld x4,0(x15) + 80006ac8: 01a20c63 beq x4,x26,80006ae0 + 80006acc: 634042ef jal x5,8000b100 + 80006ad0: 80006ac0 .word 0x80006ac0 + 80006ad4: 00000000 .word 0x00000000 + 80006ad8: 8001dba8 .word 0x8001dba8 + 80006adc: 00000000 .word 0x00000000 + 80006ae0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0909090909090909 + 80006ae4: 00033483 ld x9,0(x6) + 80006ae8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0909090909090909 + 80006aec: 00033f83 ld x31,0(x6) + 80006af0: 00830313 addi x6,x6,8 + +0000000080006af4 : +Zknd_aes64dsm_cg_cp_sbox_b9: + aes64dsm x10, x9, x31 # perform operation + 80006af4: 3ff48533 aes64dsm x10,x9,x31 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b9, Zknd_aes64dsm_cg_cp_sbox_b9_str) + 80006af8: 0007b203 ld x4,0(x15) + 80006afc: 00a20c63 beq x4,x10,80006b14 + 80006b00: 600042ef jal x5,8000b100 + 80006b04: 80006af4 .word 0x80006af4 + 80006b08: 00000000 .word 0x00000000 + 80006b0c: 8001dbe0 .word 0x8001dbe0 + 80006b10: 00000000 .word 0x00000000 + 80006b14: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0a0a0a0a0a0a0a0a + 80006b18: 00033603 ld x12,0(x6) + 80006b1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0a0a0a0a0a0a0a0a + 80006b20: 00033c03 ld x24,0(x6) + 80006b24: 00830313 addi x6,x6,8 + +0000000080006b28 : +Zknd_aes64dsm_cg_cp_sbox_b10: + aes64dsm x22, x12, x24 # perform operation + 80006b28: 3f860b33 aes64dsm x22,x12,x24 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b10, Zknd_aes64dsm_cg_cp_sbox_b10_str) + 80006b2c: 0007b203 ld x4,0(x15) + 80006b30: 01620c63 beq x4,x22,80006b48 + 80006b34: 5cc042ef jal x5,8000b100 + 80006b38: 80006b28 .word 0x80006b28 + 80006b3c: 00000000 .word 0x00000000 + 80006b40: 8001dc18 .word 0x8001dc18 + 80006b44: 00000000 .word 0x00000000 + 80006b48: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0b0b0b0b0b0b0b0b + 80006b4c: 00033883 ld x17,0(x6) + 80006b50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x0b0b0b0b0b0b0b0b + 80006b54: 00033e03 ld x28,0(x6) + 80006b58: 00830313 addi x6,x6,8 + +0000000080006b5c : +Zknd_aes64dsm_cg_cp_sbox_b11: + aes64dsm x10, x17, x28 # perform operation + 80006b5c: 3fc88533 aes64dsm x10,x17,x28 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b11, Zknd_aes64dsm_cg_cp_sbox_b11_str) + 80006b60: 0007b203 ld x4,0(x15) + 80006b64: 00a20c63 beq x4,x10,80006b7c + 80006b68: 598042ef jal x5,8000b100 + 80006b6c: 80006b5c .word 0x80006b5c + 80006b70: 00000000 .word 0x00000000 + 80006b74: 8001dc51 .word 0x8001dc51 + 80006b78: 00000000 .word 0x00000000 + 80006b7c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0c0c0c0c0c0c0c0c + 80006b80: 00033e03 ld x28,0(x6) + 80006b84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0c0c0c0c0c0c0c0c + 80006b88: 00033d03 ld x26,0(x6) + 80006b8c: 00830313 addi x6,x6,8 + +0000000080006b90 : +Zknd_aes64dsm_cg_cp_sbox_b12: + aes64dsm x14, x28, x26 # perform operation + 80006b90: 3fae0733 aes64dsm x14,x28,x26 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b12, Zknd_aes64dsm_cg_cp_sbox_b12_str) + 80006b94: 0007b203 ld x4,0(x15) + 80006b98: 00e20c63 beq x4,x14,80006bb0 + 80006b9c: 564042ef jal x5,8000b100 + 80006ba0: 80006b90 .word 0x80006b90 + 80006ba4: 00000000 .word 0x00000000 + 80006ba8: 8001dc8a .word 0x8001dc8a + 80006bac: 00000000 .word 0x00000000 + 80006bb0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0d0d0d0d0d0d0d0d + 80006bb4: 00033f03 ld x30,0(x6) + 80006bb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0d0d0d0d0d0d0d0d + 80006bbc: 00033803 ld x16,0(x6) + 80006bc0: 00830313 addi x6,x6,8 + +0000000080006bc4 : +Zknd_aes64dsm_cg_cp_sbox_b13: + aes64dsm x27, x30, x16 # perform operation + 80006bc4: 3f0f0db3 aes64dsm x27,x30,x16 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b13, Zknd_aes64dsm_cg_cp_sbox_b13_str) + 80006bc8: 0007b203 ld x4,0(x15) + 80006bcc: 01b20c63 beq x4,x27,80006be4 + 80006bd0: 530042ef jal x5,8000b100 + 80006bd4: 80006bc4 .word 0x80006bc4 + 80006bd8: 00000000 .word 0x00000000 + 80006bdc: 8001dcc3 .word 0x8001dcc3 + 80006be0: 00000000 .word 0x00000000 + 80006be4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0e0e0e0e0e0e0e0e + 80006be8: 00033903 ld x18,0(x6) + 80006bec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0e0e0e0e0e0e0e0e + 80006bf0: 00033103 ld x2,0(x6) + 80006bf4: 00830313 addi x6,x6,8 + +0000000080006bf8 : +Zknd_aes64dsm_cg_cp_sbox_b14: + aes64dsm x20, x18, x2 # perform operation + 80006bf8: 3e290a33 aes64dsm x20,x18,x2 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b14, Zknd_aes64dsm_cg_cp_sbox_b14_str) + 80006bfc: 0007b203 ld x4,0(x15) + 80006c00: 01420c63 beq x4,x20,80006c18 + 80006c04: 4fc042ef jal x5,8000b100 + 80006c08: 80006bf8 .word 0x80006bf8 + 80006c0c: 00000000 .word 0x00000000 + 80006c10: 8001dcfc .word 0x8001dcfc + 80006c14: 00000000 .word 0x00000000 + 80006c18: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0f0f0f0f0f0f0f0f + 80006c1c: 00033583 ld x11,0(x6) + 80006c20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0f0f0f0f0f0f0f0f + 80006c24: 00033803 ld x16,0(x6) + 80006c28: 00830313 addi x6,x6,8 + +0000000080006c2c : +Zknd_aes64dsm_cg_cp_sbox_b15: + aes64dsm x22, x11, x16 # perform operation + 80006c2c: 3f058b33 aes64dsm x22,x11,x16 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b15, Zknd_aes64dsm_cg_cp_sbox_b15_str) + 80006c30: 0007b203 ld x4,0(x15) + 80006c34: 01620c63 beq x4,x22,80006c4c + 80006c38: 4c8042ef jal x5,8000b100 + 80006c3c: 80006c2c .word 0x80006c2c + 80006c40: 00000000 .word 0x00000000 + 80006c44: 8001dd35 .word 0x8001dd35 + 80006c48: 00000000 .word 0x00000000 + 80006c4c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x1010101010101010 + 80006c50: 00033183 ld x3,0(x6) + 80006c54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x1010101010101010 + 80006c58: 00033883 ld x17,0(x6) + 80006c5c: 00830313 addi x6,x6,8 + +0000000080006c60 : +Zknd_aes64dsm_cg_cp_sbox_b16: + aes64dsm x19, x3, x17 # perform operation + 80006c60: 3f1189b3 aes64dsm x19,x3,x17 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b16, Zknd_aes64dsm_cg_cp_sbox_b16_str) + 80006c64: 0007b203 ld x4,0(x15) + 80006c68: 01320c63 beq x4,x19,80006c80 + 80006c6c: 494042ef jal x5,8000b100 + 80006c70: 80006c60 .word 0x80006c60 + 80006c74: 00000000 .word 0x00000000 + 80006c78: 8001dd6e .word 0x8001dd6e + 80006c7c: 00000000 .word 0x00000000 + 80006c80: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x1111111111111111 + 80006c84: 00033603 ld x12,0(x6) + 80006c88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x1111111111111111 + 80006c8c: 00033183 ld x3,0(x6) + 80006c90: 00830313 addi x6,x6,8 + +0000000080006c94 : +Zknd_aes64dsm_cg_cp_sbox_b17: + aes64dsm x29, x12, x3 # perform operation + 80006c94: 3e360eb3 aes64dsm x29,x12,x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b17, Zknd_aes64dsm_cg_cp_sbox_b17_str) + 80006c98: 0007b203 ld x4,0(x15) + 80006c9c: 01d20c63 beq x4,x29,80006cb4 + 80006ca0: 460042ef jal x5,8000b100 + 80006ca4: 80006c94 .word 0x80006c94 + 80006ca8: 00000000 .word 0x00000000 + 80006cac: 8001dda7 .word 0x8001dda7 + 80006cb0: 00000000 .word 0x00000000 + 80006cb4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x1212121212121212 + 80006cb8: 00033603 ld x12,0(x6) + 80006cbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x1212121212121212 + 80006cc0: 00033f03 ld x30,0(x6) + 80006cc4: 00830313 addi x6,x6,8 + +0000000080006cc8 : +Zknd_aes64dsm_cg_cp_sbox_b18: + aes64dsm x1, x12, x30 # perform operation + 80006cc8: 3fe600b3 aes64dsm x1,x12,x30 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b18, Zknd_aes64dsm_cg_cp_sbox_b18_str) + 80006ccc: 0007b203 ld x4,0(x15) + 80006cd0: 00120c63 beq x4,x1,80006ce8 + 80006cd4: 42c042ef jal x5,8000b100 + 80006cd8: 80006cc8 .word 0x80006cc8 + 80006cdc: 00000000 .word 0x00000000 + 80006ce0: 8001dde0 .word 0x8001dde0 + 80006ce4: 00000000 .word 0x00000000 + 80006ce8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x1313131313131313 + 80006cec: 00033983 ld x19,0(x6) + 80006cf0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x1313131313131313 + 80006cf4: 00033f03 ld x30,0(x6) + 80006cf8: 00830313 addi x6,x6,8 + +0000000080006cfc : +Zknd_aes64dsm_cg_cp_sbox_b19: + aes64dsm x7, x19, x30 # perform operation + 80006cfc: 3fe983b3 aes64dsm x7,x19,x30 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b19, Zknd_aes64dsm_cg_cp_sbox_b19_str) + 80006d00: 0007b203 ld x4,0(x15) + 80006d04: 00720c63 beq x4,x7,80006d1c + 80006d08: 3f8042ef jal x5,8000b100 + 80006d0c: 80006cfc .word 0x80006cfc + 80006d10: 00000000 .word 0x00000000 + 80006d14: 8001de19 .word 0x8001de19 + 80006d18: 00000000 .word 0x00000000 + 80006d1c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x1414141414141414 + 80006d20: 00033483 ld x9,0(x6) + 80006d24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x1414141414141414 + 80006d28: 00033503 ld x10,0(x6) + 80006d2c: 00830313 addi x6,x6,8 + +0000000080006d30 : +Zknd_aes64dsm_cg_cp_sbox_b20: + aes64dsm x3, x9, x10 # perform operation + 80006d30: 3ea481b3 aes64dsm x3,x9,x10 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b20, Zknd_aes64dsm_cg_cp_sbox_b20_str) + 80006d34: 0007b203 ld x4,0(x15) + 80006d38: 00320c63 beq x4,x3,80006d50 + 80006d3c: 3c4042ef jal x5,8000b100 + 80006d40: 80006d30 .word 0x80006d30 + 80006d44: 00000000 .word 0x00000000 + 80006d48: 8001de52 .word 0x8001de52 + 80006d4c: 00000000 .word 0x00000000 + 80006d50: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x1515151515151515 + 80006d54: 00033103 ld x2,0(x6) + 80006d58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x1515151515151515 + 80006d5c: 00033583 ld x11,0(x6) + 80006d60: 00830313 addi x6,x6,8 + +0000000080006d64 : +Zknd_aes64dsm_cg_cp_sbox_b21: + aes64dsm x27, x2, x11 # perform operation + 80006d64: 3eb10db3 aes64dsm x27,x2,x11 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b21, Zknd_aes64dsm_cg_cp_sbox_b21_str) + 80006d68: 0007b203 ld x4,0(x15) + 80006d6c: 01b20c63 beq x4,x27,80006d84 + 80006d70: 390042ef jal x5,8000b100 + 80006d74: 80006d64 .word 0x80006d64 + 80006d78: 00000000 .word 0x00000000 + 80006d7c: 8001de8b .word 0x8001de8b + 80006d80: 00000000 .word 0x00000000 + 80006d84: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1616161616161616 + 80006d88: 00033e83 ld x29,0(x6) + 80006d8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x1616161616161616 + 80006d90: 00033683 ld x13,0(x6) + 80006d94: 00830313 addi x6,x6,8 + +0000000080006d98 : +Zknd_aes64dsm_cg_cp_sbox_b22: + aes64dsm x22, x29, x13 # perform operation + 80006d98: 3ede8b33 aes64dsm x22,x29,x13 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b22, Zknd_aes64dsm_cg_cp_sbox_b22_str) + 80006d9c: 0007b203 ld x4,0(x15) + 80006da0: 01620c63 beq x4,x22,80006db8 + 80006da4: 35c042ef jal x5,8000b100 + 80006da8: 80006d98 .word 0x80006d98 + 80006dac: 00000000 .word 0x00000000 + 80006db0: 8001dec4 .word 0x8001dec4 + 80006db4: 00000000 .word 0x00000000 + 80006db8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x1717171717171717 + 80006dbc: 00033a03 ld x20,0(x6) + 80006dc0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x1717171717171717 + 80006dc4: 00033903 ld x18,0(x6) + 80006dc8: 00830313 addi x6,x6,8 + +0000000080006dcc : +Zknd_aes64dsm_cg_cp_sbox_b23: + aes64dsm x22, x20, x18 # perform operation + 80006dcc: 3f2a0b33 aes64dsm x22,x20,x18 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b23, Zknd_aes64dsm_cg_cp_sbox_b23_str) + 80006dd0: 0007b203 ld x4,0(x15) + 80006dd4: 01620c63 beq x4,x22,80006dec + 80006dd8: 328042ef jal x5,8000b100 + 80006ddc: 80006dcc .word 0x80006dcc + 80006de0: 00000000 .word 0x00000000 + 80006de4: 8001defd .word 0x8001defd + 80006de8: 00000000 .word 0x00000000 + 80006dec: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x1818181818181818 + 80006df0: 00033103 ld x2,0(x6) + 80006df4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x1818181818181818 + 80006df8: 00033e83 ld x29,0(x6) + 80006dfc: 00830313 addi x6,x6,8 + +0000000080006e00 : +Zknd_aes64dsm_cg_cp_sbox_b24: + aes64dsm x16, x2, x29 # perform operation + 80006e00: 3fd10833 aes64dsm x16,x2,x29 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b24, Zknd_aes64dsm_cg_cp_sbox_b24_str) + 80006e04: 0007b203 ld x4,0(x15) + 80006e08: 01020c63 beq x4,x16,80006e20 + 80006e0c: 2f4042ef jal x5,8000b100 + 80006e10: 80006e00 .word 0x80006e00 + 80006e14: 00000000 .word 0x00000000 + 80006e18: 8001df36 .word 0x8001df36 + 80006e1c: 00000000 .word 0x00000000 + 80006e20: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x1919191919191919 + 80006e24: 00033103 ld x2,0(x6) + 80006e28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x1919191919191919 + 80006e2c: 00033b83 ld x23,0(x6) + 80006e30: 00830313 addi x6,x6,8 + +0000000080006e34 : +Zknd_aes64dsm_cg_cp_sbox_b25: + aes64dsm x27, x2, x23 # perform operation + 80006e34: 3f710db3 aes64dsm x27,x2,x23 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b25, Zknd_aes64dsm_cg_cp_sbox_b25_str) + 80006e38: 0007b203 ld x4,0(x15) + 80006e3c: 01b20c63 beq x4,x27,80006e54 + 80006e40: 2c0042ef jal x5,8000b100 + 80006e44: 80006e34 .word 0x80006e34 + 80006e48: 00000000 .word 0x00000000 + 80006e4c: 8001df6f .word 0x8001df6f + 80006e50: 00000000 .word 0x00000000 + 80006e54: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x1a1a1a1a1a1a1a1a + 80006e58: 00033903 ld x18,0(x6) + 80006e5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x1a1a1a1a1a1a1a1a + 80006e60: 00033883 ld x17,0(x6) + 80006e64: 00830313 addi x6,x6,8 + +0000000080006e68 : +Zknd_aes64dsm_cg_cp_sbox_b26: + aes64dsm x3, x18, x17 # perform operation + 80006e68: 3f1901b3 aes64dsm x3,x18,x17 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b26, Zknd_aes64dsm_cg_cp_sbox_b26_str) + 80006e6c: 0007b203 ld x4,0(x15) + 80006e70: 00320c63 beq x4,x3,80006e88 + 80006e74: 28c042ef jal x5,8000b100 + 80006e78: 80006e68 .word 0x80006e68 + 80006e7c: 00000000 .word 0x00000000 + 80006e80: 8001dfa8 .word 0x8001dfa8 + 80006e84: 00000000 .word 0x00000000 + 80006e88: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x1b1b1b1b1b1b1b1b + 80006e8c: 00033983 ld x19,0(x6) + 80006e90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x1b1b1b1b1b1b1b1b + 80006e94: 00033903 ld x18,0(x6) + 80006e98: 00830313 addi x6,x6,8 + +0000000080006e9c : +Zknd_aes64dsm_cg_cp_sbox_b27: + aes64dsm x17, x19, x18 # perform operation + 80006e9c: 3f2988b3 aes64dsm x17,x19,x18 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b27, Zknd_aes64dsm_cg_cp_sbox_b27_str) + 80006ea0: 0007b203 ld x4,0(x15) + 80006ea4: 01120c63 beq x4,x17,80006ebc + 80006ea8: 258042ef jal x5,8000b100 + 80006eac: 80006e9c .word 0x80006e9c + 80006eb0: 00000000 .word 0x00000000 + 80006eb4: 8001dfe1 .word 0x8001dfe1 + 80006eb8: 00000000 .word 0x00000000 + 80006ebc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x1c1c1c1c1c1c1c1c + 80006ec0: 00033103 ld x2,0(x6) + 80006ec4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x1c1c1c1c1c1c1c1c + 80006ec8: 00033983 ld x19,0(x6) + 80006ecc: 00830313 addi x6,x6,8 + +0000000080006ed0 : +Zknd_aes64dsm_cg_cp_sbox_b28: + aes64dsm x8, x2, x19 # perform operation + 80006ed0: 3f310433 aes64dsm x8,x2,x19 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b28, Zknd_aes64dsm_cg_cp_sbox_b28_str) + 80006ed4: 0007b203 ld x4,0(x15) + 80006ed8: 00820c63 beq x4,x8,80006ef0 + 80006edc: 224042ef jal x5,8000b100 + 80006ee0: 80006ed0 .word 0x80006ed0 + 80006ee4: 00000000 .word 0x00000000 + 80006ee8: 8001e01a .word 0x8001e01a + 80006eec: 00000000 .word 0x00000000 + 80006ef0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x1d1d1d1d1d1d1d1d + 80006ef4: 00033f03 ld x30,0(x6) + 80006ef8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x1d1d1d1d1d1d1d1d + 80006efc: 00033c83 ld x25,0(x6) + 80006f00: 00830313 addi x6,x6,8 + +0000000080006f04 : +Zknd_aes64dsm_cg_cp_sbox_b29: + aes64dsm x20, x30, x25 # perform operation + 80006f04: 3f9f0a33 aes64dsm x20,x30,x25 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b29, Zknd_aes64dsm_cg_cp_sbox_b29_str) + 80006f08: 0007b203 ld x4,0(x15) + 80006f0c: 01420c63 beq x4,x20,80006f24 + 80006f10: 1f0042ef jal x5,8000b100 + 80006f14: 80006f04 .word 0x80006f04 + 80006f18: 00000000 .word 0x00000000 + 80006f1c: 8001e053 .word 0x8001e053 + 80006f20: 00000000 .word 0x00000000 + 80006f24: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x1e1e1e1e1e1e1e1e + 80006f28: 00033a83 ld x21,0(x6) + 80006f2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x1e1e1e1e1e1e1e1e + 80006f30: 00033f03 ld x30,0(x6) + 80006f34: 00830313 addi x6,x6,8 + +0000000080006f38 : +Zknd_aes64dsm_cg_cp_sbox_b30: + aes64dsm x31, x21, x30 # perform operation + 80006f38: 3fea8fb3 aes64dsm x31,x21,x30 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b30, Zknd_aes64dsm_cg_cp_sbox_b30_str) + 80006f3c: 0007b203 ld x4,0(x15) + 80006f40: 01f20c63 beq x4,x31,80006f58 + 80006f44: 1bc042ef jal x5,8000b100 + 80006f48: 80006f38 .word 0x80006f38 + 80006f4c: 00000000 .word 0x00000000 + 80006f50: 8001e08c .word 0x8001e08c + 80006f54: 00000000 .word 0x00000000 + 80006f58: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x1f1f1f1f1f1f1f1f + 80006f5c: 00033083 ld x1,0(x6) + 80006f60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x1f1f1f1f1f1f1f1f + 80006f64: 00033c03 ld x24,0(x6) + 80006f68: 00830313 addi x6,x6,8 + +0000000080006f6c : +Zknd_aes64dsm_cg_cp_sbox_b31: + aes64dsm x10, x1, x24 # perform operation + 80006f6c: 3f808533 aes64dsm x10,x1,x24 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b31, Zknd_aes64dsm_cg_cp_sbox_b31_str) + 80006f70: 0007b203 ld x4,0(x15) + 80006f74: 00a20c63 beq x4,x10,80006f8c + 80006f78: 188042ef jal x5,8000b100 + 80006f7c: 80006f6c .word 0x80006f6c + 80006f80: 00000000 .word 0x00000000 + 80006f84: 8001e0c5 .word 0x8001e0c5 + 80006f88: 00000000 .word 0x00000000 + 80006f8c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x2020202020202020 + 80006f90: 00033983 ld x19,0(x6) + 80006f94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x2020202020202020 + 80006f98: 00033a83 ld x21,0(x6) + 80006f9c: 00830313 addi x6,x6,8 + +0000000080006fa0 : +Zknd_aes64dsm_cg_cp_sbox_b32: + aes64dsm x17, x19, x21 # perform operation + 80006fa0: 3f5988b3 aes64dsm x17,x19,x21 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b32, Zknd_aes64dsm_cg_cp_sbox_b32_str) + 80006fa4: 0007b203 ld x4,0(x15) + 80006fa8: 01120c63 beq x4,x17,80006fc0 + 80006fac: 154042ef jal x5,8000b100 + 80006fb0: 80006fa0 .word 0x80006fa0 + 80006fb4: 00000000 .word 0x00000000 + 80006fb8: 8001e0fe .word 0x8001e0fe + 80006fbc: 00000000 .word 0x00000000 + 80006fc0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x2121212121212121 + 80006fc4: 00033803 ld x16,0(x6) + 80006fc8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x2121212121212121 + 80006fcc: 00033c03 ld x24,0(x6) + 80006fd0: 00830313 addi x6,x6,8 + +0000000080006fd4 : +Zknd_aes64dsm_cg_cp_sbox_b33: + aes64dsm x20, x16, x24 # perform operation + 80006fd4: 3f880a33 aes64dsm x20,x16,x24 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b33, Zknd_aes64dsm_cg_cp_sbox_b33_str) + 80006fd8: 0007b203 ld x4,0(x15) + 80006fdc: 01420c63 beq x4,x20,80006ff4 + 80006fe0: 120042ef jal x5,8000b100 + 80006fe4: 80006fd4 .word 0x80006fd4 + 80006fe8: 00000000 .word 0x00000000 + 80006fec: 8001e137 .word 0x8001e137 + 80006ff0: 00000000 .word 0x00000000 + 80006ff4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x2222222222222222 + 80006ff8: 00033583 ld x11,0(x6) + 80006ffc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x2222222222222222 + 80007000: 00033483 ld x9,0(x6) + 80007004: 00830313 addi x6,x6,8 + +0000000080007008 : +Zknd_aes64dsm_cg_cp_sbox_b34: + aes64dsm x14, x11, x9 # perform operation + 80007008: 3e958733 aes64dsm x14,x11,x9 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b34, Zknd_aes64dsm_cg_cp_sbox_b34_str) + 8000700c: 0007b203 ld x4,0(x15) + 80007010: 00e20c63 beq x4,x14,80007028 + 80007014: 0ec042ef jal x5,8000b100 + 80007018: 80007008 .word 0x80007008 + 8000701c: 00000000 .word 0x00000000 + 80007020: 8001e170 .word 0x8001e170 + 80007024: 00000000 .word 0x00000000 + 80007028: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x2323232323232323 + 8000702c: 00033e03 ld x28,0(x6) + 80007030: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x2323232323232323 + 80007034: 00033703 ld x14,0(x6) + 80007038: 00830313 addi x6,x6,8 + +000000008000703c : +Zknd_aes64dsm_cg_cp_sbox_b35: + aes64dsm x29, x28, x14 # perform operation + 8000703c: 3eee0eb3 aes64dsm x29,x28,x14 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b35, Zknd_aes64dsm_cg_cp_sbox_b35_str) + 80007040: 0007b203 ld x4,0(x15) + 80007044: 01d20c63 beq x4,x29,8000705c + 80007048: 0b8042ef jal x5,8000b100 + 8000704c: 8000703c .word 0x8000703c + 80007050: 00000000 .word 0x00000000 + 80007054: 8001e1a9 .word 0x8001e1a9 + 80007058: 00000000 .word 0x00000000 + 8000705c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x2424242424242424 + 80007060: 00033703 ld x14,0(x6) + 80007064: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x2424242424242424 + 80007068: 00033683 ld x13,0(x6) + 8000706c: 00830313 addi x6,x6,8 + +0000000080007070 : +Zknd_aes64dsm_cg_cp_sbox_b36: + aes64dsm x23, x14, x13 # perform operation + 80007070: 3ed70bb3 aes64dsm x23,x14,x13 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b36, Zknd_aes64dsm_cg_cp_sbox_b36_str) + 80007074: 0007b203 ld x4,0(x15) + 80007078: 01720c63 beq x4,x23,80007090 + 8000707c: 084042ef jal x5,8000b100 + 80007080: 80007070 .word 0x80007070 + 80007084: 00000000 .word 0x00000000 + 80007088: 8001e1e2 .word 0x8001e1e2 + 8000708c: 00000000 .word 0x00000000 + 80007090: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x2525252525252525 + 80007094: 00033403 ld x8,0(x6) + 80007098: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x2525252525252525 + 8000709c: 00033e83 ld x29,0(x6) + 800070a0: 00830313 addi x6,x6,8 + +00000000800070a4 : +Zknd_aes64dsm_cg_cp_sbox_b37: + aes64dsm x17, x8, x29 # perform operation + 800070a4: 3fd408b3 aes64dsm x17,x8,x29 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b37, Zknd_aes64dsm_cg_cp_sbox_b37_str) + 800070a8: 0007b203 ld x4,0(x15) + 800070ac: 01120c63 beq x4,x17,800070c4 + 800070b0: 050042ef jal x5,8000b100 + 800070b4: 800070a4 .word 0x800070a4 + 800070b8: 00000000 .word 0x00000000 + 800070bc: 8001e21b .word 0x8001e21b + 800070c0: 00000000 .word 0x00000000 + 800070c4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x2626262626262626 + 800070c8: 00033803 ld x16,0(x6) + 800070cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x2626262626262626 + 800070d0: 00033683 ld x13,0(x6) + 800070d4: 00830313 addi x6,x6,8 + +00000000800070d8 : +Zknd_aes64dsm_cg_cp_sbox_b38: + aes64dsm x1, x16, x13 # perform operation + 800070d8: 3ed800b3 aes64dsm x1,x16,x13 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b38, Zknd_aes64dsm_cg_cp_sbox_b38_str) + 800070dc: 0007b203 ld x4,0(x15) + 800070e0: 00120c63 beq x4,x1,800070f8 + 800070e4: 01c042ef jal x5,8000b100 + 800070e8: 800070d8 .word 0x800070d8 + 800070ec: 00000000 .word 0x00000000 + 800070f0: 8001e254 .word 0x8001e254 + 800070f4: 00000000 .word 0x00000000 + 800070f8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x2727272727272727 + 800070fc: 00033b03 ld x22,0(x6) + 80007100: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x2727272727272727 + 80007104: 00033f03 ld x30,0(x6) + 80007108: 00830313 addi x6,x6,8 + +000000008000710c : +Zknd_aes64dsm_cg_cp_sbox_b39: + aes64dsm x12, x22, x30 # perform operation + 8000710c: 3feb0633 aes64dsm x12,x22,x30 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b39, Zknd_aes64dsm_cg_cp_sbox_b39_str) + 80007110: 0007b203 ld x4,0(x15) + 80007114: 00c20c63 beq x4,x12,8000712c + 80007118: 7e9032ef jal x5,8000b100 + 8000711c: 8000710c .word 0x8000710c + 80007120: 00000000 .word 0x00000000 + 80007124: 8001e28d .word 0x8001e28d + 80007128: 00000000 .word 0x00000000 + 8000712c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x2828282828282828 + 80007130: 00033103 ld x2,0(x6) + 80007134: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x2828282828282828 + 80007138: 00033b03 ld x22,0(x6) + 8000713c: 00830313 addi x6,x6,8 + +0000000080007140 : +Zknd_aes64dsm_cg_cp_sbox_b40: + aes64dsm x9, x2, x22 # perform operation + 80007140: 3f6104b3 aes64dsm x9,x2,x22 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b40, Zknd_aes64dsm_cg_cp_sbox_b40_str) + 80007144: 0007b203 ld x4,0(x15) + 80007148: 00920c63 beq x4,x9,80007160 + 8000714c: 7b5032ef jal x5,8000b100 + 80007150: 80007140 .word 0x80007140 + 80007154: 00000000 .word 0x00000000 + 80007158: 8001e2c6 .word 0x8001e2c6 + 8000715c: 00000000 .word 0x00000000 + 80007160: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x2929292929292929 + 80007164: 00033703 ld x14,0(x6) + 80007168: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x2929292929292929 + 8000716c: 00033883 ld x17,0(x6) + 80007170: 00830313 addi x6,x6,8 + +0000000080007174 : +Zknd_aes64dsm_cg_cp_sbox_b41: + aes64dsm x1, x14, x17 # perform operation + 80007174: 3f1700b3 aes64dsm x1,x14,x17 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b41, Zknd_aes64dsm_cg_cp_sbox_b41_str) + 80007178: 0007b203 ld x4,0(x15) + 8000717c: 00120c63 beq x4,x1,80007194 + 80007180: 781032ef jal x5,8000b100 + 80007184: 80007174 .word 0x80007174 + 80007188: 00000000 .word 0x00000000 + 8000718c: 8001e2ff .word 0x8001e2ff + 80007190: 00000000 .word 0x00000000 + 80007194: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x2a2a2a2a2a2a2a2a + 80007198: 00033483 ld x9,0(x6) + 8000719c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x2a2a2a2a2a2a2a2a + 800071a0: 00033b83 ld x23,0(x6) + 800071a4: 00830313 addi x6,x6,8 + +00000000800071a8 : +Zknd_aes64dsm_cg_cp_sbox_b42: + aes64dsm x22, x9, x23 # perform operation + 800071a8: 3f748b33 aes64dsm x22,x9,x23 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b42, Zknd_aes64dsm_cg_cp_sbox_b42_str) + 800071ac: 0007b203 ld x4,0(x15) + 800071b0: 01620c63 beq x4,x22,800071c8 + 800071b4: 74d032ef jal x5,8000b100 + 800071b8: 800071a8 .word 0x800071a8 + 800071bc: 00000000 .word 0x00000000 + 800071c0: 8001e338 .word 0x8001e338 + 800071c4: 00000000 .word 0x00000000 + 800071c8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x2b2b2b2b2b2b2b2b + 800071cc: 00033f83 ld x31,0(x6) + 800071d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x2b2b2b2b2b2b2b2b + 800071d4: 00033b83 ld x23,0(x6) + 800071d8: 00830313 addi x6,x6,8 + +00000000800071dc : +Zknd_aes64dsm_cg_cp_sbox_b43: + aes64dsm x11, x31, x23 # perform operation + 800071dc: 3f7f85b3 aes64dsm x11,x31,x23 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b43, Zknd_aes64dsm_cg_cp_sbox_b43_str) + 800071e0: 0007b203 ld x4,0(x15) + 800071e4: 00b20c63 beq x4,x11,800071fc + 800071e8: 719032ef jal x5,8000b100 + 800071ec: 800071dc .word 0x800071dc + 800071f0: 00000000 .word 0x00000000 + 800071f4: 8001e371 .word 0x8001e371 + 800071f8: 00000000 .word 0x00000000 + 800071fc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x2c2c2c2c2c2c2c2c + 80007200: 00033e03 ld x28,0(x6) + 80007204: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x2c2c2c2c2c2c2c2c + 80007208: 00033383 ld x7,0(x6) + 8000720c: 00830313 addi x6,x6,8 + +0000000080007210 : +Zknd_aes64dsm_cg_cp_sbox_b44: + aes64dsm x1, x28, x7 # perform operation + 80007210: 3e7e00b3 aes64dsm x1,x28,x7 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b44, Zknd_aes64dsm_cg_cp_sbox_b44_str) + 80007214: 0007b203 ld x4,0(x15) + 80007218: 00120c63 beq x4,x1,80007230 + 8000721c: 6e5032ef jal x5,8000b100 + 80007220: 80007210 .word 0x80007210 + 80007224: 00000000 .word 0x00000000 + 80007228: 8001e3aa .word 0x8001e3aa + 8000722c: 00000000 .word 0x00000000 + 80007230: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x2d2d2d2d2d2d2d2d + 80007234: 00033403 ld x8,0(x6) + 80007238: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x2d2d2d2d2d2d2d2d + 8000723c: 00033a83 ld x21,0(x6) + 80007240: 00830313 addi x6,x6,8 + +0000000080007244 : +Zknd_aes64dsm_cg_cp_sbox_b45: + aes64dsm x19, x8, x21 # perform operation + 80007244: 3f5409b3 aes64dsm x19,x8,x21 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b45, Zknd_aes64dsm_cg_cp_sbox_b45_str) + 80007248: 0007b203 ld x4,0(x15) + 8000724c: 01320c63 beq x4,x19,80007264 + 80007250: 6b1032ef jal x5,8000b100 + 80007254: 80007244 .word 0x80007244 + 80007258: 00000000 .word 0x00000000 + 8000725c: 8001e3e3 .word 0x8001e3e3 + 80007260: 00000000 .word 0x00000000 + 80007264: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x2e2e2e2e2e2e2e2e + 80007268: 00033083 ld x1,0(x6) + 8000726c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x2e2e2e2e2e2e2e2e + 80007270: 00033603 ld x12,0(x6) + 80007274: 00830313 addi x6,x6,8 + +0000000080007278 : +Zknd_aes64dsm_cg_cp_sbox_b46: + aes64dsm x9, x1, x12 # perform operation + 80007278: 3ec084b3 aes64dsm x9,x1,x12 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b46, Zknd_aes64dsm_cg_cp_sbox_b46_str) + 8000727c: 0007b203 ld x4,0(x15) + 80007280: 00920c63 beq x4,x9,80007298 + 80007284: 67d032ef jal x5,8000b100 + 80007288: 80007278 .word 0x80007278 + 8000728c: 00000000 .word 0x00000000 + 80007290: 8001e41c .word 0x8001e41c + 80007294: 00000000 .word 0x00000000 + 80007298: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x2f2f2f2f2f2f2f2f + 8000729c: 00033c83 ld x25,0(x6) + 800072a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x2f2f2f2f2f2f2f2f + 800072a4: 00033a83 ld x21,0(x6) + 800072a8: 00830313 addi x6,x6,8 + +00000000800072ac : +Zknd_aes64dsm_cg_cp_sbox_b47: + aes64dsm x7, x25, x21 # perform operation + 800072ac: 3f5c83b3 aes64dsm x7,x25,x21 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b47, Zknd_aes64dsm_cg_cp_sbox_b47_str) + 800072b0: 0007b203 ld x4,0(x15) + 800072b4: 00720c63 beq x4,x7,800072cc + 800072b8: 649032ef jal x5,8000b100 + 800072bc: 800072ac .word 0x800072ac + 800072c0: 00000000 .word 0x00000000 + 800072c4: 8001e455 .word 0x8001e455 + 800072c8: 00000000 .word 0x00000000 + 800072cc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x3030303030303030 + 800072d0: 00033383 ld x7,0(x6) + 800072d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x3030303030303030 + 800072d8: 00033883 ld x17,0(x6) + 800072dc: 00830313 addi x6,x6,8 + +00000000800072e0 : +Zknd_aes64dsm_cg_cp_sbox_b48: + aes64dsm x3, x7, x17 # perform operation + 800072e0: 3f1381b3 aes64dsm x3,x7,x17 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b48, Zknd_aes64dsm_cg_cp_sbox_b48_str) + 800072e4: 0007b203 ld x4,0(x15) + 800072e8: 00320c63 beq x4,x3,80007300 + 800072ec: 615032ef jal x5,8000b100 + 800072f0: 800072e0 .word 0x800072e0 + 800072f4: 00000000 .word 0x00000000 + 800072f8: 8001e48e .word 0x8001e48e + 800072fc: 00000000 .word 0x00000000 + 80007300: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x3131313131313131 + 80007304: 00033703 ld x14,0(x6) + 80007308: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x3131313131313131 + 8000730c: 00033683 ld x13,0(x6) + 80007310: 00830313 addi x6,x6,8 + +0000000080007314 : +Zknd_aes64dsm_cg_cp_sbox_b49: + aes64dsm x3, x14, x13 # perform operation + 80007314: 3ed701b3 aes64dsm x3,x14,x13 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b49, Zknd_aes64dsm_cg_cp_sbox_b49_str) + 80007318: 0007b203 ld x4,0(x15) + 8000731c: 00320c63 beq x4,x3,80007334 + 80007320: 5e1032ef jal x5,8000b100 + 80007324: 80007314 .word 0x80007314 + 80007328: 00000000 .word 0x00000000 + 8000732c: 8001e4c7 .word 0x8001e4c7 + 80007330: 00000000 .word 0x00000000 + 80007334: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x3232323232323232 + 80007338: 00033b03 ld x22,0(x6) + 8000733c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x3232323232323232 + 80007340: 00033883 ld x17,0(x6) + 80007344: 00830313 addi x6,x6,8 + +0000000080007348 : +Zknd_aes64dsm_cg_cp_sbox_b50: + aes64dsm x14, x22, x17 # perform operation + 80007348: 3f1b0733 aes64dsm x14,x22,x17 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b50, Zknd_aes64dsm_cg_cp_sbox_b50_str) + 8000734c: 0007b203 ld x4,0(x15) + 80007350: 00e20c63 beq x4,x14,80007368 + 80007354: 5ad032ef jal x5,8000b100 + 80007358: 80007348 .word 0x80007348 + 8000735c: 00000000 .word 0x00000000 + 80007360: 8001e500 .word 0x8001e500 + 80007364: 00000000 .word 0x00000000 + 80007368: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x3333333333333333 + 8000736c: 00033083 ld x1,0(x6) + 80007370: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x3333333333333333 + 80007374: 00033b03 ld x22,0(x6) + 80007378: 00830313 addi x6,x6,8 + +000000008000737c : +Zknd_aes64dsm_cg_cp_sbox_b51: + aes64dsm x7, x1, x22 # perform operation + 8000737c: 3f6083b3 aes64dsm x7,x1,x22 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b51, Zknd_aes64dsm_cg_cp_sbox_b51_str) + 80007380: 0007b203 ld x4,0(x15) + 80007384: 00720c63 beq x4,x7,8000739c + 80007388: 579032ef jal x5,8000b100 + 8000738c: 8000737c .word 0x8000737c + 80007390: 00000000 .word 0x00000000 + 80007394: 8001e539 .word 0x8001e539 + 80007398: 00000000 .word 0x00000000 + 8000739c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x3434343434343434 + 800073a0: 00033983 ld x19,0(x6) + 800073a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x3434343434343434 + 800073a8: 00033c83 ld x25,0(x6) + 800073ac: 00830313 addi x6,x6,8 + +00000000800073b0 : +Zknd_aes64dsm_cg_cp_sbox_b52: + aes64dsm x16, x19, x25 # perform operation + 800073b0: 3f998833 aes64dsm x16,x19,x25 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b52, Zknd_aes64dsm_cg_cp_sbox_b52_str) + 800073b4: 0007b203 ld x4,0(x15) + 800073b8: 01020c63 beq x4,x16,800073d0 + 800073bc: 545032ef jal x5,8000b100 + 800073c0: 800073b0 .word 0x800073b0 + 800073c4: 00000000 .word 0x00000000 + 800073c8: 8001e572 .word 0x8001e572 + 800073cc: 00000000 .word 0x00000000 + 800073d0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x3535353535353535 + 800073d4: 00033c03 ld x24,0(x6) + 800073d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x3535353535353535 + 800073dc: 00033683 ld x13,0(x6) + 800073e0: 00830313 addi x6,x6,8 + +00000000800073e4 : +Zknd_aes64dsm_cg_cp_sbox_b53: + aes64dsm x23, x24, x13 # perform operation + 800073e4: 3edc0bb3 aes64dsm x23,x24,x13 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b53, Zknd_aes64dsm_cg_cp_sbox_b53_str) + 800073e8: 0007b203 ld x4,0(x15) + 800073ec: 01720c63 beq x4,x23,80007404 + 800073f0: 511032ef jal x5,8000b100 + 800073f4: 800073e4 .word 0x800073e4 + 800073f8: 00000000 .word 0x00000000 + 800073fc: 8001e5ab .word 0x8001e5ab + 80007400: 00000000 .word 0x00000000 + 80007404: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x3636363636363636 + 80007408: 00033f03 ld x30,0(x6) + 8000740c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x3636363636363636 + 80007410: 00033803 ld x16,0(x6) + 80007414: 00830313 addi x6,x6,8 + +0000000080007418 : +Zknd_aes64dsm_cg_cp_sbox_b54: + aes64dsm x21, x30, x16 # perform operation + 80007418: 3f0f0ab3 aes64dsm x21,x30,x16 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknd_aes64dsm_cg_cp_sbox_b54, Zknd_aes64dsm_cg_cp_sbox_b54_str) + 8000741c: 0007b203 ld x4,0(x15) + 80007420: 01520c63 beq x4,x21,80007438 + 80007424: 4dd032ef jal x5,8000b100 + 80007428: 80007418 .word 0x80007418 + 8000742c: 00000000 .word 0x00000000 + 80007430: 8001e5e4 .word 0x8001e5e4 + 80007434: 00000000 .word 0x00000000 + 80007438: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x3737373737373737 + 8000743c: 00033f83 ld x31,0(x6) + 80007440: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x3737373737373737 + 80007444: 00033c03 ld x24,0(x6) + 80007448: 00830313 addi x6,x6,8 + +000000008000744c : +Zknd_aes64dsm_cg_cp_sbox_b55: + aes64dsm x11, x31, x24 # perform operation + 8000744c: 3f8f85b3 aes64dsm x11,x31,x24 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b55, Zknd_aes64dsm_cg_cp_sbox_b55_str) + 80007450: 0007b203 ld x4,0(x15) + 80007454: 00b20c63 beq x4,x11,8000746c + 80007458: 4a9032ef jal x5,8000b100 + 8000745c: 8000744c .word 0x8000744c + 80007460: 00000000 .word 0x00000000 + 80007464: 8001e61d .word 0x8001e61d + 80007468: 00000000 .word 0x00000000 + 8000746c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x3838383838383838 + 80007470: 00033483 ld x9,0(x6) + 80007474: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x3838383838383838 + 80007478: 00033703 ld x14,0(x6) + 8000747c: 00830313 addi x6,x6,8 + +0000000080007480 : +Zknd_aes64dsm_cg_cp_sbox_b56: + aes64dsm x1, x9, x14 # perform operation + 80007480: 3ee480b3 aes64dsm x1,x9,x14 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b56, Zknd_aes64dsm_cg_cp_sbox_b56_str) + 80007484: 0007b203 ld x4,0(x15) + 80007488: 00120c63 beq x4,x1,800074a0 + 8000748c: 475032ef jal x5,8000b100 + 80007490: 80007480 .word 0x80007480 + 80007494: 00000000 .word 0x00000000 + 80007498: 8001e656 .word 0x8001e656 + 8000749c: 00000000 .word 0x00000000 + 800074a0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x3939393939393939 + 800074a4: 00033a83 ld x21,0(x6) + 800074a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x3939393939393939 + 800074ac: 00033983 ld x19,0(x6) + 800074b0: 00830313 addi x6,x6,8 + +00000000800074b4 : +Zknd_aes64dsm_cg_cp_sbox_b57: + aes64dsm x11, x21, x19 # perform operation + 800074b4: 3f3a85b3 aes64dsm x11,x21,x19 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b57, Zknd_aes64dsm_cg_cp_sbox_b57_str) + 800074b8: 0007b203 ld x4,0(x15) + 800074bc: 00b20c63 beq x4,x11,800074d4 + 800074c0: 441032ef jal x5,8000b100 + 800074c4: 800074b4 .word 0x800074b4 + 800074c8: 00000000 .word 0x00000000 + 800074cc: 8001e68f .word 0x8001e68f + 800074d0: 00000000 .word 0x00000000 + 800074d4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x3a3a3a3a3a3a3a3a + 800074d8: 00033903 ld x18,0(x6) + 800074dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x3a3a3a3a3a3a3a3a + 800074e0: 00033f03 ld x30,0(x6) + 800074e4: 00830313 addi x6,x6,8 + +00000000800074e8 : +Zknd_aes64dsm_cg_cp_sbox_b58: + aes64dsm x3, x18, x30 # perform operation + 800074e8: 3fe901b3 aes64dsm x3,x18,x30 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b58, Zknd_aes64dsm_cg_cp_sbox_b58_str) + 800074ec: 0007b203 ld x4,0(x15) + 800074f0: 00320c63 beq x4,x3,80007508 + 800074f4: 40d032ef jal x5,8000b100 + 800074f8: 800074e8 .word 0x800074e8 + 800074fc: 00000000 .word 0x00000000 + 80007500: 8001e6c8 .word 0x8001e6c8 + 80007504: 00000000 .word 0x00000000 + 80007508: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x3b3b3b3b3b3b3b3b + 8000750c: 00033083 ld x1,0(x6) + 80007510: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x3b3b3b3b3b3b3b3b + 80007514: 00033e83 ld x29,0(x6) + 80007518: 00830313 addi x6,x6,8 + +000000008000751c : +Zknd_aes64dsm_cg_cp_sbox_b59: + aes64dsm x30, x1, x29 # perform operation + 8000751c: 3fd08f33 aes64dsm x30,x1,x29 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b59, Zknd_aes64dsm_cg_cp_sbox_b59_str) + 80007520: 0007b203 ld x4,0(x15) + 80007524: 01e20c63 beq x4,x30,8000753c + 80007528: 3d9032ef jal x5,8000b100 + 8000752c: 8000751c .word 0x8000751c + 80007530: 00000000 .word 0x00000000 + 80007534: 8001e701 .word 0x8001e701 + 80007538: 00000000 .word 0x00000000 + 8000753c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x3c3c3c3c3c3c3c3c + 80007540: 00033103 ld x2,0(x6) + 80007544: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x3c3c3c3c3c3c3c3c + 80007548: 00033703 ld x14,0(x6) + 8000754c: 00830313 addi x6,x6,8 + +0000000080007550 : +Zknd_aes64dsm_cg_cp_sbox_b60: + aes64dsm x22, x2, x14 # perform operation + 80007550: 3ee10b33 aes64dsm x22,x2,x14 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b60, Zknd_aes64dsm_cg_cp_sbox_b60_str) + 80007554: 0007b203 ld x4,0(x15) + 80007558: 01620c63 beq x4,x22,80007570 + 8000755c: 3a5032ef jal x5,8000b100 + 80007560: 80007550 .word 0x80007550 + 80007564: 00000000 .word 0x00000000 + 80007568: 8001e73a .word 0x8001e73a + 8000756c: 00000000 .word 0x00000000 + 80007570: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x3d3d3d3d3d3d3d3d + 80007574: 00033e83 ld x29,0(x6) + 80007578: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x3d3d3d3d3d3d3d3d + 8000757c: 00033c83 ld x25,0(x6) + 80007580: 00830313 addi x6,x6,8 + +0000000080007584 : +Zknd_aes64dsm_cg_cp_sbox_b61: + aes64dsm x26, x29, x25 # perform operation + 80007584: 3f9e8d33 aes64dsm x26,x29,x25 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b61, Zknd_aes64dsm_cg_cp_sbox_b61_str) + 80007588: 0007b203 ld x4,0(x15) + 8000758c: 01a20c63 beq x4,x26,800075a4 + 80007590: 371032ef jal x5,8000b100 + 80007594: 80007584 .word 0x80007584 + 80007598: 00000000 .word 0x00000000 + 8000759c: 8001e773 .word 0x8001e773 + 800075a0: 00000000 .word 0x00000000 + 800075a4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x3e3e3e3e3e3e3e3e + 800075a8: 00033c83 ld x25,0(x6) + 800075ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x3e3e3e3e3e3e3e3e + 800075b0: 00033c03 ld x24,0(x6) + 800075b4: 00830313 addi x6,x6,8 + +00000000800075b8 : +Zknd_aes64dsm_cg_cp_sbox_b62: + aes64dsm x26, x25, x24 # perform operation + 800075b8: 3f8c8d33 aes64dsm x26,x25,x24 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b62, Zknd_aes64dsm_cg_cp_sbox_b62_str) + 800075bc: 0007b203 ld x4,0(x15) + 800075c0: 01a20c63 beq x4,x26,800075d8 + 800075c4: 33d032ef jal x5,8000b100 + 800075c8: 800075b8 .word 0x800075b8 + 800075cc: 00000000 .word 0x00000000 + 800075d0: 8001e7ac .word 0x8001e7ac + 800075d4: 00000000 .word 0x00000000 + 800075d8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x3f3f3f3f3f3f3f3f + 800075dc: 00033a03 ld x20,0(x6) + 800075e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x3f3f3f3f3f3f3f3f + 800075e4: 00033503 ld x10,0(x6) + 800075e8: 00830313 addi x6,x6,8 + +00000000800075ec : +Zknd_aes64dsm_cg_cp_sbox_b63: + aes64dsm x18, x20, x10 # perform operation + 800075ec: 3eaa0933 aes64dsm x18,x20,x10 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b63, Zknd_aes64dsm_cg_cp_sbox_b63_str) + 800075f0: 0007b203 ld x4,0(x15) + 800075f4: 01220c63 beq x4,x18,8000760c + 800075f8: 309032ef jal x5,8000b100 + 800075fc: 800075ec .word 0x800075ec + 80007600: 00000000 .word 0x00000000 + 80007604: 8001e7e5 .word 0x8001e7e5 + 80007608: 00000000 .word 0x00000000 + 8000760c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x4040404040404040 + 80007610: 00033a03 ld x20,0(x6) + 80007614: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x4040404040404040 + 80007618: 00033583 ld x11,0(x6) + 8000761c: 00830313 addi x6,x6,8 + +0000000080007620 : +Zknd_aes64dsm_cg_cp_sbox_b64: + aes64dsm x25, x20, x11 # perform operation + 80007620: 3eba0cb3 aes64dsm x25,x20,x11 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b64, Zknd_aes64dsm_cg_cp_sbox_b64_str) + 80007624: 0007b203 ld x4,0(x15) + 80007628: 01920c63 beq x4,x25,80007640 + 8000762c: 2d5032ef jal x5,8000b100 + 80007630: 80007620 .word 0x80007620 + 80007634: 00000000 .word 0x00000000 + 80007638: 8001e81e .word 0x8001e81e + 8000763c: 00000000 .word 0x00000000 + 80007640: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x4141414141414141 + 80007644: 00033903 ld x18,0(x6) + 80007648: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x4141414141414141 + 8000764c: 00033c83 ld x25,0(x6) + 80007650: 00830313 addi x6,x6,8 + +0000000080007654 : +Zknd_aes64dsm_cg_cp_sbox_b65: + aes64dsm x20, x18, x25 # perform operation + 80007654: 3f990a33 aes64dsm x20,x18,x25 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b65, Zknd_aes64dsm_cg_cp_sbox_b65_str) + 80007658: 0007b203 ld x4,0(x15) + 8000765c: 01420c63 beq x4,x20,80007674 + 80007660: 2a1032ef jal x5,8000b100 + 80007664: 80007654 .word 0x80007654 + 80007668: 00000000 .word 0x00000000 + 8000766c: 8001e857 .word 0x8001e857 + 80007670: 00000000 .word 0x00000000 + 80007674: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x4242424242424242 + 80007678: 00033483 ld x9,0(x6) + 8000767c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x4242424242424242 + 80007680: 00033503 ld x10,0(x6) + 80007684: 00830313 addi x6,x6,8 + +0000000080007688 : +Zknd_aes64dsm_cg_cp_sbox_b66: + aes64dsm x31, x9, x10 # perform operation + 80007688: 3ea48fb3 aes64dsm x31,x9,x10 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b66, Zknd_aes64dsm_cg_cp_sbox_b66_str) + 8000768c: 0007b203 ld x4,0(x15) + 80007690: 01f20c63 beq x4,x31,800076a8 + 80007694: 26d032ef jal x5,8000b100 + 80007698: 80007688 .word 0x80007688 + 8000769c: 00000000 .word 0x00000000 + 800076a0: 8001e890 .word 0x8001e890 + 800076a4: 00000000 .word 0x00000000 + 800076a8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x4343434343434343 + 800076ac: 00033a03 ld x20,0(x6) + 800076b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x4343434343434343 + 800076b4: 00033e83 ld x29,0(x6) + 800076b8: 00830313 addi x6,x6,8 + +00000000800076bc : +Zknd_aes64dsm_cg_cp_sbox_b67: + aes64dsm x13, x20, x29 # perform operation + 800076bc: 3fda06b3 aes64dsm x13,x20,x29 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b67, Zknd_aes64dsm_cg_cp_sbox_b67_str) + 800076c0: 0007b203 ld x4,0(x15) + 800076c4: 00d20c63 beq x4,x13,800076dc + 800076c8: 239032ef jal x5,8000b100 + 800076cc: 800076bc .word 0x800076bc + 800076d0: 00000000 .word 0x00000000 + 800076d4: 8001e8c9 .word 0x8001e8c9 + 800076d8: 00000000 .word 0x00000000 + 800076dc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x4444444444444444 + 800076e0: 00033a03 ld x20,0(x6) + 800076e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x4444444444444444 + 800076e8: 00033583 ld x11,0(x6) + 800076ec: 00830313 addi x6,x6,8 + +00000000800076f0 : +Zknd_aes64dsm_cg_cp_sbox_b68: + aes64dsm x27, x20, x11 # perform operation + 800076f0: 3eba0db3 aes64dsm x27,x20,x11 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b68, Zknd_aes64dsm_cg_cp_sbox_b68_str) + 800076f4: 0007b203 ld x4,0(x15) + 800076f8: 01b20c63 beq x4,x27,80007710 + 800076fc: 205032ef jal x5,8000b100 + 80007700: 800076f0 .word 0x800076f0 + 80007704: 00000000 .word 0x00000000 + 80007708: 8001e902 .word 0x8001e902 + 8000770c: 00000000 .word 0x00000000 + 80007710: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x4545454545454545 + 80007714: 00033d83 ld x27,0(x6) + 80007718: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x4545454545454545 + 8000771c: 00033183 ld x3,0(x6) + 80007720: 00830313 addi x6,x6,8 + +0000000080007724 : +Zknd_aes64dsm_cg_cp_sbox_b69: + aes64dsm x10, x27, x3 # perform operation + 80007724: 3e3d8533 aes64dsm x10,x27,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b69, Zknd_aes64dsm_cg_cp_sbox_b69_str) + 80007728: 0007b203 ld x4,0(x15) + 8000772c: 00a20c63 beq x4,x10,80007744 + 80007730: 1d1032ef jal x5,8000b100 + 80007734: 80007724 .word 0x80007724 + 80007738: 00000000 .word 0x00000000 + 8000773c: 8001e93b .word 0x8001e93b + 80007740: 00000000 .word 0x00000000 + 80007744: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x4646464646464646 + 80007748: 00033f03 ld x30,0(x6) + 8000774c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x4646464646464646 + 80007750: 00033503 ld x10,0(x6) + 80007754: 00830313 addi x6,x6,8 + +0000000080007758 : +Zknd_aes64dsm_cg_cp_sbox_b70: + aes64dsm x22, x30, x10 # perform operation + 80007758: 3eaf0b33 aes64dsm x22,x30,x10 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b70, Zknd_aes64dsm_cg_cp_sbox_b70_str) + 8000775c: 0007b203 ld x4,0(x15) + 80007760: 01620c63 beq x4,x22,80007778 + 80007764: 19d032ef jal x5,8000b100 + 80007768: 80007758 .word 0x80007758 + 8000776c: 00000000 .word 0x00000000 + 80007770: 8001e974 .word 0x8001e974 + 80007774: 00000000 .word 0x00000000 + 80007778: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x4747474747474747 + 8000777c: 00033e83 ld x29,0(x6) + 80007780: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x4747474747474747 + 80007784: 00033c83 ld x25,0(x6) + 80007788: 00830313 addi x6,x6,8 + +000000008000778c : +Zknd_aes64dsm_cg_cp_sbox_b71: + aes64dsm x1, x29, x25 # perform operation + 8000778c: 3f9e80b3 aes64dsm x1,x29,x25 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b71, Zknd_aes64dsm_cg_cp_sbox_b71_str) + 80007790: 0007b203 ld x4,0(x15) + 80007794: 00120c63 beq x4,x1,800077ac + 80007798: 169032ef jal x5,8000b100 + 8000779c: 8000778c .word 0x8000778c + 800077a0: 00000000 .word 0x00000000 + 800077a4: 8001e9ad .word 0x8001e9ad + 800077a8: 00000000 .word 0x00000000 + 800077ac: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x4848484848484848 + 800077b0: 00033583 ld x11,0(x6) + 800077b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x4848484848484848 + 800077b8: 00033e83 ld x29,0(x6) + 800077bc: 00830313 addi x6,x6,8 + +00000000800077c0 : +Zknd_aes64dsm_cg_cp_sbox_b72: + aes64dsm x2, x11, x29 # perform operation + 800077c0: 3fd58133 aes64dsm x2,x11,x29 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b72, Zknd_aes64dsm_cg_cp_sbox_b72_str) + 800077c4: 0007b203 ld x4,0(x15) + 800077c8: 00220c63 beq x4,x2,800077e0 + 800077cc: 135032ef jal x5,8000b100 + 800077d0: 800077c0 .word 0x800077c0 + 800077d4: 00000000 .word 0x00000000 + 800077d8: 8001e9e6 .word 0x8001e9e6 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x4949494949494949 + 800077e4: 00033f83 ld x31,0(x6) + 800077e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x4949494949494949 + 800077ec: 00033c83 ld x25,0(x6) + 800077f0: 00830313 addi x6,x6,8 + +00000000800077f4 : +Zknd_aes64dsm_cg_cp_sbox_b73: + aes64dsm x22, x31, x25 # perform operation + 800077f4: 3f9f8b33 aes64dsm x22,x31,x25 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b73, Zknd_aes64dsm_cg_cp_sbox_b73_str) + 800077f8: 0007b203 ld x4,0(x15) + 800077fc: 01620c63 beq x4,x22,80007814 + 80007800: 101032ef jal x5,8000b100 + 80007804: 800077f4 .word 0x800077f4 + 80007808: 00000000 .word 0x00000000 + 8000780c: 8001ea1f .word 0x8001ea1f + 80007810: 00000000 .word 0x00000000 + 80007814: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x4a4a4a4a4a4a4a4a + 80007818: 00033c83 ld x25,0(x6) + 8000781c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x4a4a4a4a4a4a4a4a + 80007820: 00033c03 ld x24,0(x6) + 80007824: 00830313 addi x6,x6,8 + +0000000080007828 : +Zknd_aes64dsm_cg_cp_sbox_b74: + aes64dsm x31, x25, x24 # perform operation + 80007828: 3f8c8fb3 aes64dsm x31,x25,x24 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b74, Zknd_aes64dsm_cg_cp_sbox_b74_str) + 8000782c: 0007b203 ld x4,0(x15) + 80007830: 01f20c63 beq x4,x31,80007848 + 80007834: 0cd032ef jal x5,8000b100 + 80007838: 80007828 .word 0x80007828 + 8000783c: 00000000 .word 0x00000000 + 80007840: 8001ea58 .word 0x8001ea58 + 80007844: 00000000 .word 0x00000000 + 80007848: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x4b4b4b4b4b4b4b4b + 8000784c: 00033f83 ld x31,0(x6) + 80007850: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x4b4b4b4b4b4b4b4b + 80007854: 00033b03 ld x22,0(x6) + 80007858: 00830313 addi x6,x6,8 + +000000008000785c : +Zknd_aes64dsm_cg_cp_sbox_b75: + aes64dsm x12, x31, x22 # perform operation + 8000785c: 3f6f8633 aes64dsm x12,x31,x22 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b75, Zknd_aes64dsm_cg_cp_sbox_b75_str) + 80007860: 0007b203 ld x4,0(x15) + 80007864: 00c20c63 beq x4,x12,8000787c + 80007868: 099032ef jal x5,8000b100 + 8000786c: 8000785c .word 0x8000785c + 80007870: 00000000 .word 0x00000000 + 80007874: 8001ea91 .word 0x8001ea91 + 80007878: 00000000 .word 0x00000000 + 8000787c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x4c4c4c4c4c4c4c4c + 80007880: 00033883 ld x17,0(x6) + 80007884: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x4c4c4c4c4c4c4c4c + 80007888: 00033a83 ld x21,0(x6) + 8000788c: 00830313 addi x6,x6,8 + +0000000080007890 : +Zknd_aes64dsm_cg_cp_sbox_b76: + aes64dsm x20, x17, x21 # perform operation + 80007890: 3f588a33 aes64dsm x20,x17,x21 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b76, Zknd_aes64dsm_cg_cp_sbox_b76_str) + 80007894: 0007b203 ld x4,0(x15) + 80007898: 01420c63 beq x4,x20,800078b0 + 8000789c: 065032ef jal x5,8000b100 + 800078a0: 80007890 .word 0x80007890 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 8001eaca .word 0x8001eaca + 800078ac: 00000000 .word 0x00000000 + 800078b0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x4d4d4d4d4d4d4d4d + 800078b4: 00033083 ld x1,0(x6) + 800078b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x4d4d4d4d4d4d4d4d + 800078bc: 00033a03 ld x20,0(x6) + 800078c0: 00830313 addi x6,x6,8 + +00000000800078c4 : +Zknd_aes64dsm_cg_cp_sbox_b77: + aes64dsm x23, x1, x20 # perform operation + 800078c4: 3f408bb3 aes64dsm x23,x1,x20 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b77, Zknd_aes64dsm_cg_cp_sbox_b77_str) + 800078c8: 0007b203 ld x4,0(x15) + 800078cc: 01720c63 beq x4,x23,800078e4 + 800078d0: 031032ef jal x5,8000b100 + 800078d4: 800078c4 .word 0x800078c4 + 800078d8: 00000000 .word 0x00000000 + 800078dc: 8001eb03 .word 0x8001eb03 + 800078e0: 00000000 .word 0x00000000 + 800078e4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x4e4e4e4e4e4e4e4e + 800078e8: 00033883 ld x17,0(x6) + 800078ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x4e4e4e4e4e4e4e4e + 800078f0: 00033a03 ld x20,0(x6) + 800078f4: 00830313 addi x6,x6,8 + +00000000800078f8 : +Zknd_aes64dsm_cg_cp_sbox_b78: + aes64dsm x30, x17, x20 # perform operation + 800078f8: 3f488f33 aes64dsm x30,x17,x20 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b78, Zknd_aes64dsm_cg_cp_sbox_b78_str) + 800078fc: 0007b203 ld x4,0(x15) + 80007900: 01e20c63 beq x4,x30,80007918 + 80007904: 7fc032ef jal x5,8000b100 + 80007908: 800078f8 .word 0x800078f8 + 8000790c: 00000000 .word 0x00000000 + 80007910: 8001eb3c .word 0x8001eb3c + 80007914: 00000000 .word 0x00000000 + 80007918: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x4f4f4f4f4f4f4f4f + 8000791c: 00033d83 ld x27,0(x6) + 80007920: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x4f4f4f4f4f4f4f4f + 80007924: 00033f03 ld x30,0(x6) + 80007928: 00830313 addi x6,x6,8 + +000000008000792c : +Zknd_aes64dsm_cg_cp_sbox_b79: + aes64dsm x13, x27, x30 # perform operation + 8000792c: 3fed86b3 aes64dsm x13,x27,x30 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b79, Zknd_aes64dsm_cg_cp_sbox_b79_str) + 80007930: 0007b203 ld x4,0(x15) + 80007934: 00d20c63 beq x4,x13,8000794c + 80007938: 7c8032ef jal x5,8000b100 + 8000793c: 8000792c .word 0x8000792c + 80007940: 00000000 .word 0x00000000 + 80007944: 8001eb75 .word 0x8001eb75 + 80007948: 00000000 .word 0x00000000 + 8000794c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5050505050505050 + 80007950: 00033f83 ld x31,0(x6) + 80007954: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x5050505050505050 + 80007958: 00033583 ld x11,0(x6) + 8000795c: 00830313 addi x6,x6,8 + +0000000080007960 : +Zknd_aes64dsm_cg_cp_sbox_b80: + aes64dsm x18, x31, x11 # perform operation + 80007960: 3ebf8933 aes64dsm x18,x31,x11 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b80, Zknd_aes64dsm_cg_cp_sbox_b80_str) + 80007964: 0007b203 ld x4,0(x15) + 80007968: 01220c63 beq x4,x18,80007980 + 8000796c: 794032ef jal x5,8000b100 + 80007970: 80007960 .word 0x80007960 + 80007974: 00000000 .word 0x00000000 + 80007978: 8001ebae .word 0x8001ebae + 8000797c: 00000000 .word 0x00000000 + 80007980: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x5151515151515151 + 80007984: 00033f03 ld x30,0(x6) + 80007988: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5151515151515151 + 8000798c: 00033903 ld x18,0(x6) + 80007990: 00830313 addi x6,x6,8 + +0000000080007994 : +Zknd_aes64dsm_cg_cp_sbox_b81: + aes64dsm x31, x30, x18 # perform operation + 80007994: 3f2f0fb3 aes64dsm x31,x30,x18 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b81, Zknd_aes64dsm_cg_cp_sbox_b81_str) + 80007998: 0007b203 ld x4,0(x15) + 8000799c: 01f20c63 beq x4,x31,800079b4 + 800079a0: 760032ef jal x5,8000b100 + 800079a4: 80007994 .word 0x80007994 + 800079a8: 00000000 .word 0x00000000 + 800079ac: 8001ebe7 .word 0x8001ebe7 + 800079b0: 00000000 .word 0x00000000 + 800079b4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x5252525252525252 + 800079b8: 00033083 ld x1,0(x6) + 800079bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x5252525252525252 + 800079c0: 00033483 ld x9,0(x6) + 800079c4: 00830313 addi x6,x6,8 + +00000000800079c8 : +Zknd_aes64dsm_cg_cp_sbox_b82: + aes64dsm x25, x1, x9 # perform operation + 800079c8: 3e908cb3 aes64dsm x25,x1,x9 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b82, Zknd_aes64dsm_cg_cp_sbox_b82_str) + 800079cc: 0007b203 ld x4,0(x15) + 800079d0: 01920c63 beq x4,x25,800079e8 + 800079d4: 72c032ef jal x5,8000b100 + 800079d8: 800079c8 .word 0x800079c8 + 800079dc: 00000000 .word 0x00000000 + 800079e0: 8001ec20 .word 0x8001ec20 + 800079e4: 00000000 .word 0x00000000 + 800079e8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5353535353535353 + 800079ec: 00033503 ld x10,0(x6) + 800079f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5353535353535353 + 800079f4: 00033e83 ld x29,0(x6) + 800079f8: 00830313 addi x6,x6,8 + +00000000800079fc : +Zknd_aes64dsm_cg_cp_sbox_b83: + aes64dsm x9, x10, x29 # perform operation + 800079fc: 3fd504b3 aes64dsm x9,x10,x29 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b83, Zknd_aes64dsm_cg_cp_sbox_b83_str) + 80007a00: 0007b203 ld x4,0(x15) + 80007a04: 00920c63 beq x4,x9,80007a1c + 80007a08: 6f8032ef jal x5,8000b100 + 80007a0c: 800079fc .word 0x800079fc + 80007a10: 00000000 .word 0x00000000 + 80007a14: 8001ec59 .word 0x8001ec59 + 80007a18: 00000000 .word 0x00000000 + 80007a1c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x5454545454545454 + 80007a20: 00033903 ld x18,0(x6) + 80007a24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5454545454545454 + 80007a28: 00033703 ld x14,0(x6) + 80007a2c: 00830313 addi x6,x6,8 + +0000000080007a30 : +Zknd_aes64dsm_cg_cp_sbox_b84: + aes64dsm x28, x18, x14 # perform operation + 80007a30: 3ee90e33 aes64dsm x28,x18,x14 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cp_sbox_b84, Zknd_aes64dsm_cg_cp_sbox_b84_str) + 80007a34: 0007b203 ld x4,0(x15) + 80007a38: 01c20c63 beq x4,x28,80007a50 + 80007a3c: 6c4032ef jal x5,8000b100 + 80007a40: 80007a30 .word 0x80007a30 + 80007a44: 00000000 .word 0x00000000 + 80007a48: 8001ec92 .word 0x8001ec92 + 80007a4c: 00000000 .word 0x00000000 + 80007a50: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x5555555555555555 + 80007a54: 00033f03 ld x30,0(x6) + 80007a58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5555555555555555 + 80007a5c: 00033b03 ld x22,0(x6) + 80007a60: 00830313 addi x6,x6,8 + +0000000080007a64 : +Zknd_aes64dsm_cg_cp_sbox_b85: + aes64dsm x23, x30, x22 # perform operation + 80007a64: 3f6f0bb3 aes64dsm x23,x30,x22 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b85, Zknd_aes64dsm_cg_cp_sbox_b85_str) + 80007a68: 0007b203 ld x4,0(x15) + 80007a6c: 01720c63 beq x4,x23,80007a84 + 80007a70: 690032ef jal x5,8000b100 + 80007a74: 80007a64 .word 0x80007a64 + 80007a78: 00000000 .word 0x00000000 + 80007a7c: 8001eccb .word 0x8001eccb + 80007a80: 00000000 .word 0x00000000 + 80007a84: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5656565656565656 + 80007a88: 00033603 ld x12,0(x6) + 80007a8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5656565656565656 + 80007a90: 00033e83 ld x29,0(x6) + 80007a94: 00830313 addi x6,x6,8 + +0000000080007a98 : +Zknd_aes64dsm_cg_cp_sbox_b86: + aes64dsm x19, x12, x29 # perform operation + 80007a98: 3fd609b3 aes64dsm x19,x12,x29 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b86, Zknd_aes64dsm_cg_cp_sbox_b86_str) + 80007a9c: 0007b203 ld x4,0(x15) + 80007aa0: 01320c63 beq x4,x19,80007ab8 + 80007aa4: 65c032ef jal x5,8000b100 + 80007aa8: 80007a98 .word 0x80007a98 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 8001ed04 .word 0x8001ed04 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x5757575757575757 + 80007abc: 00033083 ld x1,0(x6) + 80007ac0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x5757575757575757 + 80007ac4: 00033e03 ld x28,0(x6) + 80007ac8: 00830313 addi x6,x6,8 + +0000000080007acc : +Zknd_aes64dsm_cg_cp_sbox_b87: + aes64dsm x21, x1, x28 # perform operation + 80007acc: 3fc08ab3 aes64dsm x21,x1,x28 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknd_aes64dsm_cg_cp_sbox_b87, Zknd_aes64dsm_cg_cp_sbox_b87_str) + 80007ad0: 0007b203 ld x4,0(x15) + 80007ad4: 01520c63 beq x4,x21,80007aec + 80007ad8: 628032ef jal x5,8000b100 + 80007adc: 80007acc .word 0x80007acc + 80007ae0: 00000000 .word 0x00000000 + 80007ae4: 8001ed3d .word 0x8001ed3d + 80007ae8: 00000000 .word 0x00000000 + 80007aec: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x5858585858585858 + 80007af0: 00033383 ld x7,0(x6) + 80007af4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x5858585858585858 + 80007af8: 00033883 ld x17,0(x6) + 80007afc: 00830313 addi x6,x6,8 + +0000000080007b00 : +Zknd_aes64dsm_cg_cp_sbox_b88: + aes64dsm x22, x7, x17 # perform operation + 80007b00: 3f138b33 aes64dsm x22,x7,x17 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b88, Zknd_aes64dsm_cg_cp_sbox_b88_str) + 80007b04: 0007b203 ld x4,0(x15) + 80007b08: 01620c63 beq x4,x22,80007b20 + 80007b0c: 5f4032ef jal x5,8000b100 + 80007b10: 80007b00 .word 0x80007b00 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 8001ed76 .word 0x8001ed76 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x5959595959595959 + 80007b24: 00033d03 ld x26,0(x6) + 80007b28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5959595959595959 + 80007b2c: 00033703 ld x14,0(x6) + 80007b30: 00830313 addi x6,x6,8 + +0000000080007b34 : +Zknd_aes64dsm_cg_cp_sbox_b89: + aes64dsm x8, x26, x14 # perform operation + 80007b34: 3eed0433 aes64dsm x8,x26,x14 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b89, Zknd_aes64dsm_cg_cp_sbox_b89_str) + 80007b38: 0007b203 ld x4,0(x15) + 80007b3c: 00820c63 beq x4,x8,80007b54 + 80007b40: 5c0032ef jal x5,8000b100 + 80007b44: 80007b34 .word 0x80007b34 + 80007b48: 00000000 .word 0x00000000 + 80007b4c: 8001edaf .word 0x8001edaf + 80007b50: 00000000 .word 0x00000000 + 80007b54: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x5a5a5a5a5a5a5a5a + 80007b58: 00033883 ld x17,0(x6) + 80007b5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x5a5a5a5a5a5a5a5a + 80007b60: 00033803 ld x16,0(x6) + 80007b64: 00830313 addi x6,x6,8 + +0000000080007b68 : +Zknd_aes64dsm_cg_cp_sbox_b90: + aes64dsm x9, x17, x16 # perform operation + 80007b68: 3f0884b3 aes64dsm x9,x17,x16 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b90, Zknd_aes64dsm_cg_cp_sbox_b90_str) + 80007b6c: 0007b203 ld x4,0(x15) + 80007b70: 00920c63 beq x4,x9,80007b88 + 80007b74: 58c032ef jal x5,8000b100 + 80007b78: 80007b68 .word 0x80007b68 + 80007b7c: 00000000 .word 0x00000000 + 80007b80: 8001ede8 .word 0x8001ede8 + 80007b84: 00000000 .word 0x00000000 + 80007b88: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5b5b5b5b5b5b5b5b + 80007b8c: 00033683 ld x13,0(x6) + 80007b90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x5b5b5b5b5b5b5b5b + 80007b94: 00033983 ld x19,0(x6) + 80007b98: 00830313 addi x6,x6,8 + +0000000080007b9c : +Zknd_aes64dsm_cg_cp_sbox_b91: + aes64dsm x23, x13, x19 # perform operation + 80007b9c: 3f368bb3 aes64dsm x23,x13,x19 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b91, Zknd_aes64dsm_cg_cp_sbox_b91_str) + 80007ba0: 0007b203 ld x4,0(x15) + 80007ba4: 01720c63 beq x4,x23,80007bbc + 80007ba8: 558032ef jal x5,8000b100 + 80007bac: 80007b9c .word 0x80007b9c + 80007bb0: 00000000 .word 0x00000000 + 80007bb4: 8001ee21 .word 0x8001ee21 + 80007bb8: 00000000 .word 0x00000000 + 80007bbc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x5c5c5c5c5c5c5c5c + 80007bc0: 00033483 ld x9,0(x6) + 80007bc4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x5c5c5c5c5c5c5c5c + 80007bc8: 00033f83 ld x31,0(x6) + 80007bcc: 00830313 addi x6,x6,8 + +0000000080007bd0 : +Zknd_aes64dsm_cg_cp_sbox_b92: + aes64dsm x12, x9, x31 # perform operation + 80007bd0: 3ff48633 aes64dsm x12,x9,x31 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b92, Zknd_aes64dsm_cg_cp_sbox_b92_str) + 80007bd4: 0007b203 ld x4,0(x15) + 80007bd8: 00c20c63 beq x4,x12,80007bf0 + 80007bdc: 524032ef jal x5,8000b100 + 80007be0: 80007bd0 .word 0x80007bd0 + 80007be4: 00000000 .word 0x00000000 + 80007be8: 8001ee5a .word 0x8001ee5a + 80007bec: 00000000 .word 0x00000000 + 80007bf0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x5d5d5d5d5d5d5d5d + 80007bf4: 00033383 ld x7,0(x6) + 80007bf8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x5d5d5d5d5d5d5d5d + 80007bfc: 00033b83 ld x23,0(x6) + 80007c00: 00830313 addi x6,x6,8 + +0000000080007c04 : +Zknd_aes64dsm_cg_cp_sbox_b93: + aes64dsm x8, x7, x23 # perform operation + 80007c04: 3f738433 aes64dsm x8,x7,x23 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b93, Zknd_aes64dsm_cg_cp_sbox_b93_str) + 80007c08: 0007b203 ld x4,0(x15) + 80007c0c: 00820c63 beq x4,x8,80007c24 + 80007c10: 4f0032ef jal x5,8000b100 + 80007c14: 80007c04 .word 0x80007c04 + 80007c18: 00000000 .word 0x00000000 + 80007c1c: 8001ee93 .word 0x8001ee93 + 80007c20: 00000000 .word 0x00000000 + 80007c24: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x5e5e5e5e5e5e5e5e + 80007c28: 00033c03 ld x24,0(x6) + 80007c2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x5e5e5e5e5e5e5e5e + 80007c30: 00033a83 ld x21,0(x6) + 80007c34: 00830313 addi x6,x6,8 + +0000000080007c38 : +Zknd_aes64dsm_cg_cp_sbox_b94: + aes64dsm x30, x24, x21 # perform operation + 80007c38: 3f5c0f33 aes64dsm x30,x24,x21 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b94, Zknd_aes64dsm_cg_cp_sbox_b94_str) + 80007c3c: 0007b203 ld x4,0(x15) + 80007c40: 01e20c63 beq x4,x30,80007c58 + 80007c44: 4bc032ef jal x5,8000b100 + 80007c48: 80007c38 .word 0x80007c38 + 80007c4c: 00000000 .word 0x00000000 + 80007c50: 8001eecc .word 0x8001eecc + 80007c54: 00000000 .word 0x00000000 + 80007c58: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5f5f5f5f5f5f5f5f + 80007c5c: 00033d83 ld x27,0(x6) + 80007c60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x5f5f5f5f5f5f5f5f + 80007c64: 00033083 ld x1,0(x6) + 80007c68: 00830313 addi x6,x6,8 + +0000000080007c6c : +Zknd_aes64dsm_cg_cp_sbox_b95: + aes64dsm x9, x27, x1 # perform operation + 80007c6c: 3e1d84b3 aes64dsm x9,x27,x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b95, Zknd_aes64dsm_cg_cp_sbox_b95_str) + 80007c70: 0007b203 ld x4,0(x15) + 80007c74: 00920c63 beq x4,x9,80007c8c + 80007c78: 488032ef jal x5,8000b100 + 80007c7c: 80007c6c .word 0x80007c6c + 80007c80: 00000000 .word 0x00000000 + 80007c84: 8001ef05 .word 0x8001ef05 + 80007c88: 00000000 .word 0x00000000 + 80007c8c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x6060606060606060 + 80007c90: 00033a83 ld x21,0(x6) + 80007c94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x6060606060606060 + 80007c98: 00033903 ld x18,0(x6) + 80007c9c: 00830313 addi x6,x6,8 + +0000000080007ca0 : +Zknd_aes64dsm_cg_cp_sbox_b96: + aes64dsm x20, x21, x18 # perform operation + 80007ca0: 3f2a8a33 aes64dsm x20,x21,x18 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b96, Zknd_aes64dsm_cg_cp_sbox_b96_str) + 80007ca4: 0007b203 ld x4,0(x15) + 80007ca8: 01420c63 beq x4,x20,80007cc0 + 80007cac: 454032ef jal x5,8000b100 + 80007cb0: 80007ca0 .word 0x80007ca0 + 80007cb4: 00000000 .word 0x00000000 + 80007cb8: 8001ef3e .word 0x8001ef3e + 80007cbc: 00000000 .word 0x00000000 + 80007cc0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x6161616161616161 + 80007cc4: 00033f83 ld x31,0(x6) + 80007cc8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x6161616161616161 + 80007ccc: 00033a03 ld x20,0(x6) + 80007cd0: 00830313 addi x6,x6,8 + +0000000080007cd4 : +Zknd_aes64dsm_cg_cp_sbox_b97: + aes64dsm x10, x31, x20 # perform operation + 80007cd4: 3f4f8533 aes64dsm x10,x31,x20 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b97, Zknd_aes64dsm_cg_cp_sbox_b97_str) + 80007cd8: 0007b203 ld x4,0(x15) + 80007cdc: 00a20c63 beq x4,x10,80007cf4 + 80007ce0: 420032ef jal x5,8000b100 + 80007ce4: 80007cd4 .word 0x80007cd4 + 80007ce8: 00000000 .word 0x00000000 + 80007cec: 8001ef77 .word 0x8001ef77 + 80007cf0: 00000000 .word 0x00000000 + 80007cf4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x6262626262626262 + 80007cf8: 00033583 ld x11,0(x6) + 80007cfc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x6262626262626262 + 80007d00: 00033683 ld x13,0(x6) + 80007d04: 00830313 addi x6,x6,8 + +0000000080007d08 : +Zknd_aes64dsm_cg_cp_sbox_b98: + aes64dsm x26, x11, x13 # perform operation + 80007d08: 3ed58d33 aes64dsm x26,x11,x13 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b98, Zknd_aes64dsm_cg_cp_sbox_b98_str) + 80007d0c: 0007b203 ld x4,0(x15) + 80007d10: 01a20c63 beq x4,x26,80007d28 + 80007d14: 3ec032ef jal x5,8000b100 + 80007d18: 80007d08 .word 0x80007d08 + 80007d1c: 00000000 .word 0x00000000 + 80007d20: 8001efb0 .word 0x8001efb0 + 80007d24: 00000000 .word 0x00000000 + 80007d28: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x6363636363636363 + 80007d2c: 00033f83 ld x31,0(x6) + 80007d30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x6363636363636363 + 80007d34: 00033903 ld x18,0(x6) + 80007d38: 00830313 addi x6,x6,8 + +0000000080007d3c : +Zknd_aes64dsm_cg_cp_sbox_b99: + aes64dsm x27, x31, x18 # perform operation + 80007d3c: 3f2f8db3 aes64dsm x27,x31,x18 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b99, Zknd_aes64dsm_cg_cp_sbox_b99_str) + 80007d40: 0007b203 ld x4,0(x15) + 80007d44: 01b20c63 beq x4,x27,80007d5c + 80007d48: 3b8032ef jal x5,8000b100 + 80007d4c: 80007d3c .word 0x80007d3c + 80007d50: 00000000 .word 0x00000000 + 80007d54: 8001efe9 .word 0x8001efe9 + 80007d58: 00000000 .word 0x00000000 + 80007d5c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x6464646464646464 + 80007d60: 00033483 ld x9,0(x6) + 80007d64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x6464646464646464 + 80007d68: 00033403 ld x8,0(x6) + 80007d6c: 00830313 addi x6,x6,8 + +0000000080007d70 : +Zknd_aes64dsm_cg_cp_sbox_b100: + aes64dsm x19, x9, x8 # perform operation + 80007d70: 3e8489b3 aes64dsm x19,x9,x8 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b100, Zknd_aes64dsm_cg_cp_sbox_b100_str) + 80007d74: 0007b203 ld x4,0(x15) + 80007d78: 01320c63 beq x4,x19,80007d90 + 80007d7c: 384032ef jal x5,8000b100 + 80007d80: 80007d70 .word 0x80007d70 + 80007d84: 00000000 .word 0x00000000 + 80007d88: 8001f022 .word 0x8001f022 + 80007d8c: 00000000 .word 0x00000000 + 80007d90: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x6565656565656565 + 80007d94: 00033c03 ld x24,0(x6) + 80007d98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x6565656565656565 + 80007d9c: 00033a03 ld x20,0(x6) + 80007da0: 00830313 addi x6,x6,8 + +0000000080007da4 : +Zknd_aes64dsm_cg_cp_sbox_b101: + aes64dsm x8, x24, x20 # perform operation + 80007da4: 3f4c0433 aes64dsm x8,x24,x20 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b101, Zknd_aes64dsm_cg_cp_sbox_b101_str) + 80007da8: 0007b203 ld x4,0(x15) + 80007dac: 00820c63 beq x4,x8,80007dc4 + 80007db0: 350032ef jal x5,8000b100 + 80007db4: 80007da4 .word 0x80007da4 + 80007db8: 00000000 .word 0x00000000 + 80007dbc: 8001f05c .word 0x8001f05c + 80007dc0: 00000000 .word 0x00000000 + 80007dc4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x6666666666666666 + 80007dc8: 00033c83 ld x25,0(x6) + 80007dcc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x6666666666666666 + 80007dd0: 00033d83 ld x27,0(x6) + 80007dd4: 00830313 addi x6,x6,8 + +0000000080007dd8 : +Zknd_aes64dsm_cg_cp_sbox_b102: + aes64dsm x21, x25, x27 # perform operation + 80007dd8: 3fbc8ab3 aes64dsm x21,x25,x27 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknd_aes64dsm_cg_cp_sbox_b102, Zknd_aes64dsm_cg_cp_sbox_b102_str) + 80007ddc: 0007b203 ld x4,0(x15) + 80007de0: 01520c63 beq x4,x21,80007df8 + 80007de4: 31c032ef jal x5,8000b100 + 80007de8: 80007dd8 .word 0x80007dd8 + 80007dec: 00000000 .word 0x00000000 + 80007df0: 8001f096 .word 0x8001f096 + 80007df4: 00000000 .word 0x00000000 + 80007df8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x6767676767676767 + 80007dfc: 00033e83 ld x29,0(x6) + 80007e00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x6767676767676767 + 80007e04: 00033483 ld x9,0(x6) + 80007e08: 00830313 addi x6,x6,8 + +0000000080007e0c : +Zknd_aes64dsm_cg_cp_sbox_b103: + aes64dsm x22, x29, x9 # perform operation + 80007e0c: 3e9e8b33 aes64dsm x22,x29,x9 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b103, Zknd_aes64dsm_cg_cp_sbox_b103_str) + 80007e10: 0007b203 ld x4,0(x15) + 80007e14: 01620c63 beq x4,x22,80007e2c + 80007e18: 2e8032ef jal x5,8000b100 + 80007e1c: 80007e0c .word 0x80007e0c + 80007e20: 00000000 .word 0x00000000 + 80007e24: 8001f0d0 .word 0x8001f0d0 + 80007e28: 00000000 .word 0x00000000 + 80007e2c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x6868686868686868 + 80007e30: 00033383 ld x7,0(x6) + 80007e34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x6868686868686868 + 80007e38: 00033183 ld x3,0(x6) + 80007e3c: 00830313 addi x6,x6,8 + +0000000080007e40 : +Zknd_aes64dsm_cg_cp_sbox_b104: + aes64dsm x10, x7, x3 # perform operation + 80007e40: 3e338533 aes64dsm x10,x7,x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b104, Zknd_aes64dsm_cg_cp_sbox_b104_str) + 80007e44: 0007b203 ld x4,0(x15) + 80007e48: 00a20c63 beq x4,x10,80007e60 + 80007e4c: 2b4032ef jal x5,8000b100 + 80007e50: 80007e40 .word 0x80007e40 + 80007e54: 00000000 .word 0x00000000 + 80007e58: 8001f10a .word 0x8001f10a + 80007e5c: 00000000 .word 0x00000000 + 80007e60: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x6969696969696969 + 80007e64: 00033983 ld x19,0(x6) + 80007e68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x6969696969696969 + 80007e6c: 00033c83 ld x25,0(x6) + 80007e70: 00830313 addi x6,x6,8 + +0000000080007e74 : +Zknd_aes64dsm_cg_cp_sbox_b105: + aes64dsm x17, x19, x25 # perform operation + 80007e74: 3f9988b3 aes64dsm x17,x19,x25 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b105, Zknd_aes64dsm_cg_cp_sbox_b105_str) + 80007e78: 0007b203 ld x4,0(x15) + 80007e7c: 01120c63 beq x4,x17,80007e94 + 80007e80: 280032ef jal x5,8000b100 + 80007e84: 80007e74 .word 0x80007e74 + 80007e88: 00000000 .word 0x00000000 + 80007e8c: 8001f144 .word 0x8001f144 + 80007e90: 00000000 .word 0x00000000 + 80007e94: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x6a6a6a6a6a6a6a6a + 80007e98: 00033603 ld x12,0(x6) + 80007e9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x6a6a6a6a6a6a6a6a + 80007ea0: 00033d83 ld x27,0(x6) + 80007ea4: 00830313 addi x6,x6,8 + +0000000080007ea8 : +Zknd_aes64dsm_cg_cp_sbox_b106: + aes64dsm x17, x12, x27 # perform operation + 80007ea8: 3fb608b3 aes64dsm x17,x12,x27 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b106, Zknd_aes64dsm_cg_cp_sbox_b106_str) + 80007eac: 0007b203 ld x4,0(x15) + 80007eb0: 01120c63 beq x4,x17,80007ec8 + 80007eb4: 24c032ef jal x5,8000b100 + 80007eb8: 80007ea8 .word 0x80007ea8 + 80007ebc: 00000000 .word 0x00000000 + 80007ec0: 8001f17e .word 0x8001f17e + 80007ec4: 00000000 .word 0x00000000 + 80007ec8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x6b6b6b6b6b6b6b6b + 80007ecc: 00033903 ld x18,0(x6) + 80007ed0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x6b6b6b6b6b6b6b6b + 80007ed4: 00033883 ld x17,0(x6) + 80007ed8: 00830313 addi x6,x6,8 + +0000000080007edc : +Zknd_aes64dsm_cg_cp_sbox_b107: + aes64dsm x29, x18, x17 # perform operation + 80007edc: 3f190eb3 aes64dsm x29,x18,x17 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b107, Zknd_aes64dsm_cg_cp_sbox_b107_str) + 80007ee0: 0007b203 ld x4,0(x15) + 80007ee4: 01d20c63 beq x4,x29,80007efc + 80007ee8: 218032ef jal x5,8000b100 + 80007eec: 80007edc .word 0x80007edc + 80007ef0: 00000000 .word 0x00000000 + 80007ef4: 8001f1b8 .word 0x8001f1b8 + 80007ef8: 00000000 .word 0x00000000 + 80007efc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x6c6c6c6c6c6c6c6c + 80007f00: 00033403 ld x8,0(x6) + 80007f04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x6c6c6c6c6c6c6c6c + 80007f08: 00033883 ld x17,0(x6) + 80007f0c: 00830313 addi x6,x6,8 + +0000000080007f10 : +Zknd_aes64dsm_cg_cp_sbox_b108: + aes64dsm x2, x8, x17 # perform operation + 80007f10: 3f140133 aes64dsm x2,x8,x17 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b108, Zknd_aes64dsm_cg_cp_sbox_b108_str) + 80007f14: 0007b203 ld x4,0(x15) + 80007f18: 00220c63 beq x4,x2,80007f30 + 80007f1c: 1e4032ef jal x5,8000b100 + 80007f20: 80007f10 .word 0x80007f10 + 80007f24: 00000000 .word 0x00000000 + 80007f28: 8001f1f2 .word 0x8001f1f2 + 80007f2c: 00000000 .word 0x00000000 + 80007f30: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x6d6d6d6d6d6d6d6d + 80007f34: 00033583 ld x11,0(x6) + 80007f38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x6d6d6d6d6d6d6d6d + 80007f3c: 00033c83 ld x25,0(x6) + 80007f40: 00830313 addi x6,x6,8 + +0000000080007f44 : +Zknd_aes64dsm_cg_cp_sbox_b109: + aes64dsm x13, x11, x25 # perform operation + 80007f44: 3f9586b3 aes64dsm x13,x11,x25 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b109, Zknd_aes64dsm_cg_cp_sbox_b109_str) + 80007f48: 0007b203 ld x4,0(x15) + 80007f4c: 00d20c63 beq x4,x13,80007f64 + 80007f50: 1b0032ef jal x5,8000b100 + 80007f54: 80007f44 .word 0x80007f44 + 80007f58: 00000000 .word 0x00000000 + 80007f5c: 8001f22c .word 0x8001f22c + 80007f60: 00000000 .word 0x00000000 + 80007f64: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x6e6e6e6e6e6e6e6e + 80007f68: 00033483 ld x9,0(x6) + 80007f6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x6e6e6e6e6e6e6e6e + 80007f70: 00033a03 ld x20,0(x6) + 80007f74: 00830313 addi x6,x6,8 + +0000000080007f78 : +Zknd_aes64dsm_cg_cp_sbox_b110: + aes64dsm x8, x9, x20 # perform operation + 80007f78: 3f448433 aes64dsm x8,x9,x20 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b110, Zknd_aes64dsm_cg_cp_sbox_b110_str) + 80007f7c: 0007b203 ld x4,0(x15) + 80007f80: 00820c63 beq x4,x8,80007f98 + 80007f84: 17c032ef jal x5,8000b100 + 80007f88: 80007f78 .word 0x80007f78 + 80007f8c: 00000000 .word 0x00000000 + 80007f90: 8001f266 .word 0x8001f266 + 80007f94: 00000000 .word 0x00000000 + 80007f98: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x6f6f6f6f6f6f6f6f + 80007f9c: 00033c83 ld x25,0(x6) + 80007fa0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x6f6f6f6f6f6f6f6f + 80007fa4: 00033703 ld x14,0(x6) + 80007fa8: 00830313 addi x6,x6,8 + +0000000080007fac : +Zknd_aes64dsm_cg_cp_sbox_b111: + aes64dsm x18, x25, x14 # perform operation + 80007fac: 3eec8933 aes64dsm x18,x25,x14 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b111, Zknd_aes64dsm_cg_cp_sbox_b111_str) + 80007fb0: 0007b203 ld x4,0(x15) + 80007fb4: 01220c63 beq x4,x18,80007fcc + 80007fb8: 148032ef jal x5,8000b100 + 80007fbc: 80007fac .word 0x80007fac + 80007fc0: 00000000 .word 0x00000000 + 80007fc4: 8001f2a0 .word 0x8001f2a0 + 80007fc8: 00000000 .word 0x00000000 + 80007fcc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x7070707070707070 + 80007fd0: 00033503 ld x10,0(x6) + 80007fd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x7070707070707070 + 80007fd8: 00033383 ld x7,0(x6) + 80007fdc: 00830313 addi x6,x6,8 + +0000000080007fe0 : +Zknd_aes64dsm_cg_cp_sbox_b112: + aes64dsm x3, x10, x7 # perform operation + 80007fe0: 3e7501b3 aes64dsm x3,x10,x7 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b112, Zknd_aes64dsm_cg_cp_sbox_b112_str) + 80007fe4: 0007b203 ld x4,0(x15) + 80007fe8: 00320c63 beq x4,x3,80008000 + 80007fec: 114032ef jal x5,8000b100 + 80007ff0: 80007fe0 .word 0x80007fe0 + 80007ff4: 00000000 .word 0x00000000 + 80007ff8: 8001f2da .word 0x8001f2da + 80007ffc: 00000000 .word 0x00000000 + 80008000: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7171717171717171 + 80008004: 00033c03 ld x24,0(x6) + 80008008: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7171717171717171 + 8000800c: 00033f83 ld x31,0(x6) + 80008010: 00830313 addi x6,x6,8 + +0000000080008014 : +Zknd_aes64dsm_cg_cp_sbox_b113: + aes64dsm x26, x24, x31 # perform operation + 80008014: 3ffc0d33 aes64dsm x26,x24,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b113, Zknd_aes64dsm_cg_cp_sbox_b113_str) + 80008018: 0007b203 ld x4,0(x15) + 8000801c: 01a20c63 beq x4,x26,80008034 + 80008020: 0e0032ef jal x5,8000b100 + 80008024: 80008014 .word 0x80008014 + 80008028: 00000000 .word 0x00000000 + 8000802c: 8001f314 .word 0x8001f314 + 80008030: 00000000 .word 0x00000000 + 80008034: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7272727272727272 + 80008038: 00033a03 ld x20,0(x6) + 8000803c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7272727272727272 + 80008040: 00033403 ld x8,0(x6) + 80008044: 00830313 addi x6,x6,8 + +0000000080008048 : +Zknd_aes64dsm_cg_cp_sbox_b114: + aes64dsm x22, x20, x8 # perform operation + 80008048: 3e8a0b33 aes64dsm x22,x20,x8 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b114, Zknd_aes64dsm_cg_cp_sbox_b114_str) + 8000804c: 0007b203 ld x4,0(x15) + 80008050: 01620c63 beq x4,x22,80008068 + 80008054: 0ac032ef jal x5,8000b100 + 80008058: 80008048 .word 0x80008048 + 8000805c: 00000000 .word 0x00000000 + 80008060: 8001f34e .word 0x8001f34e + 80008064: 00000000 .word 0x00000000 + 80008068: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7373737373737373 + 8000806c: 00033a03 ld x20,0(x6) + 80008070: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x7373737373737373 + 80008074: 00033183 ld x3,0(x6) + 80008078: 00830313 addi x6,x6,8 + +000000008000807c : +Zknd_aes64dsm_cg_cp_sbox_b115: + aes64dsm x31, x20, x3 # perform operation + 8000807c: 3e3a0fb3 aes64dsm x31,x20,x3 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b115, Zknd_aes64dsm_cg_cp_sbox_b115_str) + 80008080: 0007b203 ld x4,0(x15) + 80008084: 01f20c63 beq x4,x31,8000809c + 80008088: 078032ef jal x5,8000b100 + 8000808c: 8000807c .word 0x8000807c + 80008090: 00000000 .word 0x00000000 + 80008094: 8001f388 .word 0x8001f388 + 80008098: 00000000 .word 0x00000000 + 8000809c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7474747474747474 + 800080a0: 00033c03 ld x24,0(x6) + 800080a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7474747474747474 + 800080a8: 00033f03 ld x30,0(x6) + 800080ac: 00830313 addi x6,x6,8 + +00000000800080b0 : +Zknd_aes64dsm_cg_cp_sbox_b116: + aes64dsm x1, x24, x30 # perform operation + 800080b0: 3fec00b3 aes64dsm x1,x24,x30 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b116, Zknd_aes64dsm_cg_cp_sbox_b116_str) + 800080b4: 0007b203 ld x4,0(x15) + 800080b8: 00120c63 beq x4,x1,800080d0 + 800080bc: 044032ef jal x5,8000b100 + 800080c0: 800080b0 .word 0x800080b0 + 800080c4: 00000000 .word 0x00000000 + 800080c8: 8001f3c2 .word 0x8001f3c2 + 800080cc: 00000000 .word 0x00000000 + 800080d0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x7575757575757575 + 800080d4: 00033703 ld x14,0(x6) + 800080d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x7575757575757575 + 800080dc: 00033e03 ld x28,0(x6) + 800080e0: 00830313 addi x6,x6,8 + +00000000800080e4 : +Zknd_aes64dsm_cg_cp_sbox_b117: + aes64dsm x1, x14, x28 # perform operation + 800080e4: 3fc700b3 aes64dsm x1,x14,x28 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b117, Zknd_aes64dsm_cg_cp_sbox_b117_str) + 800080e8: 0007b203 ld x4,0(x15) + 800080ec: 00120c63 beq x4,x1,80008104 + 800080f0: 010032ef jal x5,8000b100 + 800080f4: 800080e4 .word 0x800080e4 + 800080f8: 00000000 .word 0x00000000 + 800080fc: 8001f3fc .word 0x8001f3fc + 80008100: 00000000 .word 0x00000000 + 80008104: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7676767676767676 + 80008108: 00033f03 ld x30,0(x6) + 8000810c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x7676767676767676 + 80008110: 00033b83 ld x23,0(x6) + 80008114: 00830313 addi x6,x6,8 + +0000000080008118 : +Zknd_aes64dsm_cg_cp_sbox_b118: + aes64dsm x17, x30, x23 # perform operation + 80008118: 3f7f08b3 aes64dsm x17,x30,x23 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b118, Zknd_aes64dsm_cg_cp_sbox_b118_str) + 8000811c: 0007b203 ld x4,0(x15) + 80008120: 01120c63 beq x4,x17,80008138 + 80008124: 7dd022ef jal x5,8000b100 + 80008128: 80008118 .word 0x80008118 + 8000812c: 00000000 .word 0x00000000 + 80008130: 8001f436 .word 0x8001f436 + 80008134: 00000000 .word 0x00000000 + 80008138: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x7777777777777777 + 8000813c: 00033883 ld x17,0(x6) + 80008140: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x7777777777777777 + 80008144: 00033583 ld x11,0(x6) + 80008148: 00830313 addi x6,x6,8 + +000000008000814c : +Zknd_aes64dsm_cg_cp_sbox_b119: + aes64dsm x9, x17, x11 # perform operation + 8000814c: 3eb884b3 aes64dsm x9,x17,x11 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b119, Zknd_aes64dsm_cg_cp_sbox_b119_str) + 80008150: 0007b203 ld x4,0(x15) + 80008154: 00920c63 beq x4,x9,8000816c + 80008158: 7a9022ef jal x5,8000b100 + 8000815c: 8000814c .word 0x8000814c + 80008160: 00000000 .word 0x00000000 + 80008164: 8001f470 .word 0x8001f470 + 80008168: 00000000 .word 0x00000000 + 8000816c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x7878787878787878 + 80008170: 00033403 ld x8,0(x6) + 80008174: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x7878787878787878 + 80008178: 00033683 ld x13,0(x6) + 8000817c: 00830313 addi x6,x6,8 + +0000000080008180 : +Zknd_aes64dsm_cg_cp_sbox_b120: + aes64dsm x20, x8, x13 # perform operation + 80008180: 3ed40a33 aes64dsm x20,x8,x13 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b120, Zknd_aes64dsm_cg_cp_sbox_b120_str) + 80008184: 0007b203 ld x4,0(x15) + 80008188: 01420c63 beq x4,x20,800081a0 + 8000818c: 775022ef jal x5,8000b100 + 80008190: 80008180 .word 0x80008180 + 80008194: 00000000 .word 0x00000000 + 80008198: 8001f4aa .word 0x8001f4aa + 8000819c: 00000000 .word 0x00000000 + 800081a0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x7979797979797979 + 800081a4: 00033603 ld x12,0(x6) + 800081a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x7979797979797979 + 800081ac: 00033d83 ld x27,0(x6) + 800081b0: 00830313 addi x6,x6,8 + +00000000800081b4 : +Zknd_aes64dsm_cg_cp_sbox_b121: + aes64dsm x1, x12, x27 # perform operation + 800081b4: 3fb600b3 aes64dsm x1,x12,x27 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b121, Zknd_aes64dsm_cg_cp_sbox_b121_str) + 800081b8: 0007b203 ld x4,0(x15) + 800081bc: 00120c63 beq x4,x1,800081d4 + 800081c0: 741022ef jal x5,8000b100 + 800081c4: 800081b4 .word 0x800081b4 + 800081c8: 00000000 .word 0x00000000 + 800081cc: 8001f4e4 .word 0x8001f4e4 + 800081d0: 00000000 .word 0x00000000 + 800081d4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x7a7a7a7a7a7a7a7a + 800081d8: 00033483 ld x9,0(x6) + 800081dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x7a7a7a7a7a7a7a7a + 800081e0: 00033803 ld x16,0(x6) + 800081e4: 00830313 addi x6,x6,8 + +00000000800081e8 : +Zknd_aes64dsm_cg_cp_sbox_b122: + aes64dsm x13, x9, x16 # perform operation + 800081e8: 3f0486b3 aes64dsm x13,x9,x16 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b122, Zknd_aes64dsm_cg_cp_sbox_b122_str) + 800081ec: 0007b203 ld x4,0(x15) + 800081f0: 00d20c63 beq x4,x13,80008208 + 800081f4: 70d022ef jal x5,8000b100 + 800081f8: 800081e8 .word 0x800081e8 + 800081fc: 00000000 .word 0x00000000 + 80008200: 8001f51e .word 0x8001f51e + 80008204: 00000000 .word 0x00000000 + 80008208: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x7b7b7b7b7b7b7b7b + 8000820c: 00033983 ld x19,0(x6) + 80008210: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7b7b7b7b7b7b7b7b + 80008214: 00033f83 ld x31,0(x6) + 80008218: 00830313 addi x6,x6,8 + +000000008000821c : +Zknd_aes64dsm_cg_cp_sbox_b123: + aes64dsm x27, x19, x31 # perform operation + 8000821c: 3ff98db3 aes64dsm x27,x19,x31 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b123, Zknd_aes64dsm_cg_cp_sbox_b123_str) + 80008220: 0007b203 ld x4,0(x15) + 80008224: 01b20c63 beq x4,x27,8000823c + 80008228: 6d9022ef jal x5,8000b100 + 8000822c: 8000821c .word 0x8000821c + 80008230: 00000000 .word 0x00000000 + 80008234: 8001f558 .word 0x8001f558 + 80008238: 00000000 .word 0x00000000 + 8000823c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7c7c7c7c7c7c7c7c + 80008240: 00033b03 ld x22,0(x6) + 80008244: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x7c7c7c7c7c7c7c7c + 80008248: 00033083 ld x1,0(x6) + 8000824c: 00830313 addi x6,x6,8 + +0000000080008250 : +Zknd_aes64dsm_cg_cp_sbox_b124: + aes64dsm x31, x22, x1 # perform operation + 80008250: 3e1b0fb3 aes64dsm x31,x22,x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b124, Zknd_aes64dsm_cg_cp_sbox_b124_str) + 80008254: 0007b203 ld x4,0(x15) + 80008258: 01f20c63 beq x4,x31,80008270 + 8000825c: 6a5022ef jal x5,8000b100 + 80008260: 80008250 .word 0x80008250 + 80008264: 00000000 .word 0x00000000 + 80008268: 8001f592 .word 0x8001f592 + 8000826c: 00000000 .word 0x00000000 + 80008270: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7d7d7d7d7d7d7d7d + 80008274: 00033f03 ld x30,0(x6) + 80008278: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x7d7d7d7d7d7d7d7d + 8000827c: 00033083 ld x1,0(x6) + 80008280: 00830313 addi x6,x6,8 + +0000000080008284 : +Zknd_aes64dsm_cg_cp_sbox_b125: + aes64dsm x2, x30, x1 # perform operation + 80008284: 3e1f0133 aes64dsm x2,x30,x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b125, Zknd_aes64dsm_cg_cp_sbox_b125_str) + 80008288: 0007b203 ld x4,0(x15) + 8000828c: 00220c63 beq x4,x2,800082a4 + 80008290: 671022ef jal x5,8000b100 + 80008294: 80008284 .word 0x80008284 + 80008298: 00000000 .word 0x00000000 + 8000829c: 8001f5cc .word 0x8001f5cc + 800082a0: 00000000 .word 0x00000000 + 800082a4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x7e7e7e7e7e7e7e7e + 800082a8: 00033b83 ld x23,0(x6) + 800082ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7e7e7e7e7e7e7e7e + 800082b0: 00033503 ld x10,0(x6) + 800082b4: 00830313 addi x6,x6,8 + +00000000800082b8 : +Zknd_aes64dsm_cg_cp_sbox_b126: + aes64dsm x13, x23, x10 # perform operation + 800082b8: 3eab86b3 aes64dsm x13,x23,x10 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b126, Zknd_aes64dsm_cg_cp_sbox_b126_str) + 800082bc: 0007b203 ld x4,0(x15) + 800082c0: 00d20c63 beq x4,x13,800082d8 + 800082c4: 63d022ef jal x5,8000b100 + 800082c8: 800082b8 .word 0x800082b8 + 800082cc: 00000000 .word 0x00000000 + 800082d0: 8001f606 .word 0x8001f606 + 800082d4: 00000000 .word 0x00000000 + 800082d8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x7f7f7f7f7f7f7f7f + 800082dc: 00033483 ld x9,0(x6) + 800082e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x7f7f7f7f7f7f7f7f + 800082e4: 00033183 ld x3,0(x6) + 800082e8: 00830313 addi x6,x6,8 + +00000000800082ec : +Zknd_aes64dsm_cg_cp_sbox_b127: + aes64dsm x7, x9, x3 # perform operation + 800082ec: 3e3483b3 aes64dsm x7,x9,x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b127, Zknd_aes64dsm_cg_cp_sbox_b127_str) + 800082f0: 0007b203 ld x4,0(x15) + 800082f4: 00720c63 beq x4,x7,8000830c + 800082f8: 609022ef jal x5,8000b100 + 800082fc: 800082ec .word 0x800082ec + 80008300: 00000000 .word 0x00000000 + 80008304: 8001f640 .word 0x8001f640 + 80008308: 00000000 .word 0x00000000 + 8000830c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x8080808080808080 + 80008310: 00033c83 ld x25,0(x6) + 80008314: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x8080808080808080 + 80008318: 00033703 ld x14,0(x6) + 8000831c: 00830313 addi x6,x6,8 + +0000000080008320 : +Zknd_aes64dsm_cg_cp_sbox_b128: + aes64dsm x26, x25, x14 # perform operation + 80008320: 3eec8d33 aes64dsm x26,x25,x14 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b128, Zknd_aes64dsm_cg_cp_sbox_b128_str) + 80008324: 0007b203 ld x4,0(x15) + 80008328: 01a20c63 beq x4,x26,80008340 + 8000832c: 5d5022ef jal x5,8000b100 + 80008330: 80008320 .word 0x80008320 + 80008334: 00000000 .word 0x00000000 + 80008338: 8001f67a .word 0x8001f67a + 8000833c: 00000000 .word 0x00000000 + 80008340: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8181818181818181 + 80008344: 00033983 ld x19,0(x6) + 80008348: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8181818181818181 + 8000834c: 00033f83 ld x31,0(x6) + 80008350: 00830313 addi x6,x6,8 + +0000000080008354 : +Zknd_aes64dsm_cg_cp_sbox_b129: + aes64dsm x3, x19, x31 # perform operation + 80008354: 3ff981b3 aes64dsm x3,x19,x31 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b129, Zknd_aes64dsm_cg_cp_sbox_b129_str) + 80008358: 0007b203 ld x4,0(x15) + 8000835c: 00320c63 beq x4,x3,80008374 + 80008360: 5a1022ef jal x5,8000b100 + 80008364: 80008354 .word 0x80008354 + 80008368: 00000000 .word 0x00000000 + 8000836c: 8001f6b4 .word 0x8001f6b4 + 80008370: 00000000 .word 0x00000000 + 80008374: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x8282828282828282 + 80008378: 00033b83 ld x23,0(x6) + 8000837c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x8282828282828282 + 80008380: 00033b03 ld x22,0(x6) + 80008384: 00830313 addi x6,x6,8 + +0000000080008388 : +Zknd_aes64dsm_cg_cp_sbox_b130: + aes64dsm x21, x23, x22 # perform operation + 80008388: 3f6b8ab3 aes64dsm x21,x23,x22 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknd_aes64dsm_cg_cp_sbox_b130, Zknd_aes64dsm_cg_cp_sbox_b130_str) + 8000838c: 0007b203 ld x4,0(x15) + 80008390: 01520c63 beq x4,x21,800083a8 + 80008394: 56d022ef jal x5,8000b100 + 80008398: 80008388 .word 0x80008388 + 8000839c: 00000000 .word 0x00000000 + 800083a0: 8001f6ee .word 0x8001f6ee + 800083a4: 00000000 .word 0x00000000 + 800083a8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8383838383838383 + 800083ac: 00033d83 ld x27,0(x6) + 800083b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8383838383838383 + 800083b4: 00033d03 ld x26,0(x6) + 800083b8: 00830313 addi x6,x6,8 + +00000000800083bc : +Zknd_aes64dsm_cg_cp_sbox_b131: + aes64dsm x17, x27, x26 # perform operation + 800083bc: 3fad88b3 aes64dsm x17,x27,x26 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b131, Zknd_aes64dsm_cg_cp_sbox_b131_str) + 800083c0: 0007b203 ld x4,0(x15) + 800083c4: 01120c63 beq x4,x17,800083dc + 800083c8: 539022ef jal x5,8000b100 + 800083cc: 800083bc .word 0x800083bc + 800083d0: 00000000 .word 0x00000000 + 800083d4: 8001f728 .word 0x8001f728 + 800083d8: 00000000 .word 0x00000000 + 800083dc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8484848484848484 + 800083e0: 00033183 ld x3,0(x6) + 800083e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8484848484848484 + 800083e8: 00033e03 ld x28,0(x6) + 800083ec: 00830313 addi x6,x6,8 + +00000000800083f0 : +Zknd_aes64dsm_cg_cp_sbox_b132: + aes64dsm x8, x3, x28 # perform operation + 800083f0: 3fc18433 aes64dsm x8,x3,x28 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b132, Zknd_aes64dsm_cg_cp_sbox_b132_str) + 800083f4: 0007b203 ld x4,0(x15) + 800083f8: 00820c63 beq x4,x8,80008410 + 800083fc: 505022ef jal x5,8000b100 + 80008400: 800083f0 .word 0x800083f0 + 80008404: 00000000 .word 0x00000000 + 80008408: 8001f762 .word 0x8001f762 + 8000840c: 00000000 .word 0x00000000 + 80008410: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x8585858585858585 + 80008414: 00033903 ld x18,0(x6) + 80008418: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x8585858585858585 + 8000841c: 00033883 ld x17,0(x6) + 80008420: 00830313 addi x6,x6,8 + +0000000080008424 : +Zknd_aes64dsm_cg_cp_sbox_b133: + aes64dsm x23, x18, x17 # perform operation + 80008424: 3f190bb3 aes64dsm x23,x18,x17 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b133, Zknd_aes64dsm_cg_cp_sbox_b133_str) + 80008428: 0007b203 ld x4,0(x15) + 8000842c: 01720c63 beq x4,x23,80008444 + 80008430: 4d1022ef jal x5,8000b100 + 80008434: 80008424 .word 0x80008424 + 80008438: 00000000 .word 0x00000000 + 8000843c: 8001f79c .word 0x8001f79c + 80008440: 00000000 .word 0x00000000 + 80008444: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x8686868686868686 + 80008448: 00033103 ld x2,0(x6) + 8000844c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x8686868686868686 + 80008450: 00033a83 ld x21,0(x6) + 80008454: 00830313 addi x6,x6,8 + +0000000080008458 : +Zknd_aes64dsm_cg_cp_sbox_b134: + aes64dsm x16, x2, x21 # perform operation + 80008458: 3f510833 aes64dsm x16,x2,x21 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b134, Zknd_aes64dsm_cg_cp_sbox_b134_str) + 8000845c: 0007b203 ld x4,0(x15) + 80008460: 01020c63 beq x4,x16,80008478 + 80008464: 49d022ef jal x5,8000b100 + 80008468: 80008458 .word 0x80008458 + 8000846c: 00000000 .word 0x00000000 + 80008470: 8001f7d6 .word 0x8001f7d6 + 80008474: 00000000 .word 0x00000000 + 80008478: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x8787878787878787 + 8000847c: 00033b03 ld x22,0(x6) + 80008480: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x8787878787878787 + 80008484: 00033103 ld x2,0(x6) + 80008488: 00830313 addi x6,x6,8 + +000000008000848c : +Zknd_aes64dsm_cg_cp_sbox_b135: + aes64dsm x23, x22, x2 # perform operation + 8000848c: 3e2b0bb3 aes64dsm x23,x22,x2 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b135, Zknd_aes64dsm_cg_cp_sbox_b135_str) + 80008490: 0007b203 ld x4,0(x15) + 80008494: 01720c63 beq x4,x23,800084ac + 80008498: 469022ef jal x5,8000b100 + 8000849c: 8000848c .word 0x8000848c + 800084a0: 00000000 .word 0x00000000 + 800084a4: 8001f810 .word 0x8001f810 + 800084a8: 00000000 .word 0x00000000 + 800084ac: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8888888888888888 + 800084b0: 00033683 ld x13,0(x6) + 800084b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x8888888888888888 + 800084b8: 00033983 ld x19,0(x6) + 800084bc: 00830313 addi x6,x6,8 + +00000000800084c0 : +Zknd_aes64dsm_cg_cp_sbox_b136: + aes64dsm x23, x13, x19 # perform operation + 800084c0: 3f368bb3 aes64dsm x23,x13,x19 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b136, Zknd_aes64dsm_cg_cp_sbox_b136_str) + 800084c4: 0007b203 ld x4,0(x15) + 800084c8: 01720c63 beq x4,x23,800084e0 + 800084cc: 435022ef jal x5,8000b100 + 800084d0: 800084c0 .word 0x800084c0 + 800084d4: 00000000 .word 0x00000000 + 800084d8: 8001f84a .word 0x8001f84a + 800084dc: 00000000 .word 0x00000000 + 800084e0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x8989898989898989 + 800084e4: 00033b03 ld x22,0(x6) + 800084e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x8989898989898989 + 800084ec: 00033403 ld x8,0(x6) + 800084f0: 00830313 addi x6,x6,8 + +00000000800084f4 : +Zknd_aes64dsm_cg_cp_sbox_b137: + aes64dsm x30, x22, x8 # perform operation + 800084f4: 3e8b0f33 aes64dsm x30,x22,x8 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b137, Zknd_aes64dsm_cg_cp_sbox_b137_str) + 800084f8: 0007b203 ld x4,0(x15) + 800084fc: 01e20c63 beq x4,x30,80008514 + 80008500: 401022ef jal x5,8000b100 + 80008504: 800084f4 .word 0x800084f4 + 80008508: 00000000 .word 0x00000000 + 8000850c: 8001f884 .word 0x8001f884 + 80008510: 00000000 .word 0x00000000 + 80008514: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x8a8a8a8a8a8a8a8a + 80008518: 00033883 ld x17,0(x6) + 8000851c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8a8a8a8a8a8a8a8a + 80008520: 00033603 ld x12,0(x6) + 80008524: 00830313 addi x6,x6,8 + +0000000080008528 : +Zknd_aes64dsm_cg_cp_sbox_b138: + aes64dsm x10, x17, x12 # perform operation + 80008528: 3ec88533 aes64dsm x10,x17,x12 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b138, Zknd_aes64dsm_cg_cp_sbox_b138_str) + 8000852c: 0007b203 ld x4,0(x15) + 80008530: 00a20c63 beq x4,x10,80008548 + 80008534: 3cd022ef jal x5,8000b100 + 80008538: 80008528 .word 0x80008528 + 8000853c: 00000000 .word 0x00000000 + 80008540: 8001f8be .word 0x8001f8be + 80008544: 00000000 .word 0x00000000 + 80008548: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x8b8b8b8b8b8b8b8b + 8000854c: 00033c03 ld x24,0(x6) + 80008550: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8b8b8b8b8b8b8b8b + 80008554: 00033383 ld x7,0(x6) + 80008558: 00830313 addi x6,x6,8 + +000000008000855c : +Zknd_aes64dsm_cg_cp_sbox_b139: + aes64dsm x12, x24, x7 # perform operation + 8000855c: 3e7c0633 aes64dsm x12,x24,x7 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b139, Zknd_aes64dsm_cg_cp_sbox_b139_str) + 80008560: 0007b203 ld x4,0(x15) + 80008564: 00c20c63 beq x4,x12,8000857c + 80008568: 399022ef jal x5,8000b100 + 8000856c: 8000855c .word 0x8000855c + 80008570: 00000000 .word 0x00000000 + 80008574: 8001f8f8 .word 0x8001f8f8 + 80008578: 00000000 .word 0x00000000 + 8000857c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8c8c8c8c8c8c8c8c + 80008580: 00033583 ld x11,0(x6) + 80008584: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x8c8c8c8c8c8c8c8c + 80008588: 00033683 ld x13,0(x6) + 8000858c: 00830313 addi x6,x6,8 + +0000000080008590 : +Zknd_aes64dsm_cg_cp_sbox_b140: + aes64dsm x27, x11, x13 # perform operation + 80008590: 3ed58db3 aes64dsm x27,x11,x13 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b140, Zknd_aes64dsm_cg_cp_sbox_b140_str) + 80008594: 0007b203 ld x4,0(x15) + 80008598: 01b20c63 beq x4,x27,800085b0 + 8000859c: 365022ef jal x5,8000b100 + 800085a0: 80008590 .word 0x80008590 + 800085a4: 00000000 .word 0x00000000 + 800085a8: 8001f932 .word 0x8001f932 + 800085ac: 00000000 .word 0x00000000 + 800085b0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x8d8d8d8d8d8d8d8d + 800085b4: 00033483 ld x9,0(x6) + 800085b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x8d8d8d8d8d8d8d8d + 800085bc: 00033f03 ld x30,0(x6) + 800085c0: 00830313 addi x6,x6,8 + +00000000800085c4 : +Zknd_aes64dsm_cg_cp_sbox_b141: + aes64dsm x7, x9, x30 # perform operation + 800085c4: 3fe483b3 aes64dsm x7,x9,x30 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b141, Zknd_aes64dsm_cg_cp_sbox_b141_str) + 800085c8: 0007b203 ld x4,0(x15) + 800085cc: 00720c63 beq x4,x7,800085e4 + 800085d0: 331022ef jal x5,8000b100 + 800085d4: 800085c4 .word 0x800085c4 + 800085d8: 00000000 .word 0x00000000 + 800085dc: 8001f96c .word 0x8001f96c + 800085e0: 00000000 .word 0x00000000 + 800085e4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x8e8e8e8e8e8e8e8e + 800085e8: 00033c03 ld x24,0(x6) + 800085ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8e8e8e8e8e8e8e8e + 800085f0: 00033183 ld x3,0(x6) + 800085f4: 00830313 addi x6,x6,8 + +00000000800085f8 : +Zknd_aes64dsm_cg_cp_sbox_b142: + aes64dsm x25, x24, x3 # perform operation + 800085f8: 3e3c0cb3 aes64dsm x25,x24,x3 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b142, Zknd_aes64dsm_cg_cp_sbox_b142_str) + 800085fc: 0007b203 ld x4,0(x15) + 80008600: 01920c63 beq x4,x25,80008618 + 80008604: 2fd022ef jal x5,8000b100 + 80008608: 800085f8 .word 0x800085f8 + 8000860c: 00000000 .word 0x00000000 + 80008610: 8001f9a6 .word 0x8001f9a6 + 80008614: 00000000 .word 0x00000000 + 80008618: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x8f8f8f8f8f8f8f8f + 8000861c: 00033883 ld x17,0(x6) + 80008620: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x8f8f8f8f8f8f8f8f + 80008624: 00033a83 ld x21,0(x6) + 80008628: 00830313 addi x6,x6,8 + +000000008000862c : +Zknd_aes64dsm_cg_cp_sbox_b143: + aes64dsm x26, x17, x21 # perform operation + 8000862c: 3f588d33 aes64dsm x26,x17,x21 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b143, Zknd_aes64dsm_cg_cp_sbox_b143_str) + 80008630: 0007b203 ld x4,0(x15) + 80008634: 01a20c63 beq x4,x26,8000864c + 80008638: 2c9022ef jal x5,8000b100 + 8000863c: 8000862c .word 0x8000862c + 80008640: 00000000 .word 0x00000000 + 80008644: 8001f9e0 .word 0x8001f9e0 + 80008648: 00000000 .word 0x00000000 + 8000864c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x9090909090909090 + 80008650: 00033a83 ld x21,0(x6) + 80008654: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x9090909090909090 + 80008658: 00033f03 ld x30,0(x6) + 8000865c: 00830313 addi x6,x6,8 + +0000000080008660 : +Zknd_aes64dsm_cg_cp_sbox_b144: + aes64dsm x2, x21, x30 # perform operation + 80008660: 3fea8133 aes64dsm x2,x21,x30 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b144, Zknd_aes64dsm_cg_cp_sbox_b144_str) + 80008664: 0007b203 ld x4,0(x15) + 80008668: 00220c63 beq x4,x2,80008680 + 8000866c: 295022ef jal x5,8000b100 + 80008670: 80008660 .word 0x80008660 + 80008674: 00000000 .word 0x00000000 + 80008678: 8001fa1a .word 0x8001fa1a + 8000867c: 00000000 .word 0x00000000 + 80008680: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x9191919191919191 + 80008684: 00033483 ld x9,0(x6) + 80008688: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x9191919191919191 + 8000868c: 00033903 ld x18,0(x6) + 80008690: 00830313 addi x6,x6,8 + +0000000080008694 : +Zknd_aes64dsm_cg_cp_sbox_b145: + aes64dsm x17, x9, x18 # perform operation + 80008694: 3f2488b3 aes64dsm x17,x9,x18 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b145, Zknd_aes64dsm_cg_cp_sbox_b145_str) + 80008698: 0007b203 ld x4,0(x15) + 8000869c: 01120c63 beq x4,x17,800086b4 + 800086a0: 261022ef jal x5,8000b100 + 800086a4: 80008694 .word 0x80008694 + 800086a8: 00000000 .word 0x00000000 + 800086ac: 8001fa54 .word 0x8001fa54 + 800086b0: 00000000 .word 0x00000000 + 800086b4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x9292929292929292 + 800086b8: 00033683 ld x13,0(x6) + 800086bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x9292929292929292 + 800086c0: 00033383 ld x7,0(x6) + 800086c4: 00830313 addi x6,x6,8 + +00000000800086c8 : +Zknd_aes64dsm_cg_cp_sbox_b146: + aes64dsm x11, x13, x7 # perform operation + 800086c8: 3e7685b3 aes64dsm x11,x13,x7 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b146, Zknd_aes64dsm_cg_cp_sbox_b146_str) + 800086cc: 0007b203 ld x4,0(x15) + 800086d0: 00b20c63 beq x4,x11,800086e8 + 800086d4: 22d022ef jal x5,8000b100 + 800086d8: 800086c8 .word 0x800086c8 + 800086dc: 00000000 .word 0x00000000 + 800086e0: 8001fa8e .word 0x8001fa8e + 800086e4: 00000000 .word 0x00000000 + 800086e8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x9393939393939393 + 800086ec: 00033b03 ld x22,0(x6) + 800086f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x9393939393939393 + 800086f4: 00033603 ld x12,0(x6) + 800086f8: 00830313 addi x6,x6,8 + +00000000800086fc : +Zknd_aes64dsm_cg_cp_sbox_b147: + aes64dsm x31, x22, x12 # perform operation + 800086fc: 3ecb0fb3 aes64dsm x31,x22,x12 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b147, Zknd_aes64dsm_cg_cp_sbox_b147_str) + 80008700: 0007b203 ld x4,0(x15) + 80008704: 01f20c63 beq x4,x31,8000871c + 80008708: 1f9022ef jal x5,8000b100 + 8000870c: 800086fc .word 0x800086fc + 80008710: 00000000 .word 0x00000000 + 80008714: 8001fac8 .word 0x8001fac8 + 80008718: 00000000 .word 0x00000000 + 8000871c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x9494949494949494 + 80008720: 00033403 ld x8,0(x6) + 80008724: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x9494949494949494 + 80008728: 00033d83 ld x27,0(x6) + 8000872c: 00830313 addi x6,x6,8 + +0000000080008730 : +Zknd_aes64dsm_cg_cp_sbox_b148: + aes64dsm x24, x8, x27 # perform operation + 80008730: 3fb40c33 aes64dsm x24,x8,x27 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64dsm_cg_cp_sbox_b148, Zknd_aes64dsm_cg_cp_sbox_b148_str) + 80008734: 0007b203 ld x4,0(x15) + 80008738: 01820c63 beq x4,x24,80008750 + 8000873c: 1c5022ef jal x5,8000b100 + 80008740: 80008730 .word 0x80008730 + 80008744: 00000000 .word 0x00000000 + 80008748: 8001fb02 .word 0x8001fb02 + 8000874c: 00000000 .word 0x00000000 + 80008750: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x9595959595959595 + 80008754: 00033a83 ld x21,0(x6) + 80008758: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x9595959595959595 + 8000875c: 00033903 ld x18,0(x6) + 80008760: 00830313 addi x6,x6,8 + +0000000080008764 : +Zknd_aes64dsm_cg_cp_sbox_b149: + aes64dsm x13, x21, x18 # perform operation + 80008764: 3f2a86b3 aes64dsm x13,x21,x18 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b149, Zknd_aes64dsm_cg_cp_sbox_b149_str) + 80008768: 0007b203 ld x4,0(x15) + 8000876c: 00d20c63 beq x4,x13,80008784 + 80008770: 191022ef jal x5,8000b100 + 80008774: 80008764 .word 0x80008764 + 80008778: 00000000 .word 0x00000000 + 8000877c: 8001fb3c .word 0x8001fb3c + 80008780: 00000000 .word 0x00000000 + 80008784: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x9696969696969696 + 80008788: 00033e03 ld x28,0(x6) + 8000878c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x9696969696969696 + 80008790: 00033683 ld x13,0(x6) + 80008794: 00830313 addi x6,x6,8 + +0000000080008798 : +Zknd_aes64dsm_cg_cp_sbox_b150: + aes64dsm x20, x28, x13 # perform operation + 80008798: 3ede0a33 aes64dsm x20,x28,x13 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b150, Zknd_aes64dsm_cg_cp_sbox_b150_str) + 8000879c: 0007b203 ld x4,0(x15) + 800087a0: 01420c63 beq x4,x20,800087b8 + 800087a4: 15d022ef jal x5,8000b100 + 800087a8: 80008798 .word 0x80008798 + 800087ac: 00000000 .word 0x00000000 + 800087b0: 8001fb76 .word 0x8001fb76 + 800087b4: 00000000 .word 0x00000000 + 800087b8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x9797979797979797 + 800087bc: 00033e83 ld x29,0(x6) + 800087c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x9797979797979797 + 800087c4: 00033c83 ld x25,0(x6) + 800087c8: 00830313 addi x6,x6,8 + +00000000800087cc : +Zknd_aes64dsm_cg_cp_sbox_b151: + aes64dsm x7, x29, x25 # perform operation + 800087cc: 3f9e83b3 aes64dsm x7,x29,x25 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b151, Zknd_aes64dsm_cg_cp_sbox_b151_str) + 800087d0: 0007b203 ld x4,0(x15) + 800087d4: 00720c63 beq x4,x7,800087ec + 800087d8: 129022ef jal x5,8000b100 + 800087dc: 800087cc .word 0x800087cc + 800087e0: 00000000 .word 0x00000000 + 800087e4: 8001fbb0 .word 0x8001fbb0 + 800087e8: 00000000 .word 0x00000000 + 800087ec: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x9898989898989898 + 800087f0: 00033183 ld x3,0(x6) + 800087f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x9898989898989898 + 800087f8: 00033f03 ld x30,0(x6) + 800087fc: 00830313 addi x6,x6,8 + +0000000080008800 : +Zknd_aes64dsm_cg_cp_sbox_b152: + aes64dsm x2, x3, x30 # perform operation + 80008800: 3fe18133 aes64dsm x2,x3,x30 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b152, Zknd_aes64dsm_cg_cp_sbox_b152_str) + 80008804: 0007b203 ld x4,0(x15) + 80008808: 00220c63 beq x4,x2,80008820 + 8000880c: 0f5022ef jal x5,8000b100 + 80008810: 80008800 .word 0x80008800 + 80008814: 00000000 .word 0x00000000 + 80008818: 8001fbea .word 0x8001fbea + 8000881c: 00000000 .word 0x00000000 + 80008820: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x9999999999999999 + 80008824: 00033383 ld x7,0(x6) + 80008828: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x9999999999999999 + 8000882c: 00033883 ld x17,0(x6) + 80008830: 00830313 addi x6,x6,8 + +0000000080008834 : +Zknd_aes64dsm_cg_cp_sbox_b153: + aes64dsm x12, x7, x17 # perform operation + 80008834: 3f138633 aes64dsm x12,x7,x17 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b153, Zknd_aes64dsm_cg_cp_sbox_b153_str) + 80008838: 0007b203 ld x4,0(x15) + 8000883c: 00c20c63 beq x4,x12,80008854 + 80008840: 0c1022ef jal x5,8000b100 + 80008844: 80008834 .word 0x80008834 + 80008848: 00000000 .word 0x00000000 + 8000884c: 8001fc24 .word 0x8001fc24 + 80008850: 00000000 .word 0x00000000 + 80008854: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x9a9a9a9a9a9a9a9a + 80008858: 00033b83 ld x23,0(x6) + 8000885c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x9a9a9a9a9a9a9a9a + 80008860: 00033903 ld x18,0(x6) + 80008864: 00830313 addi x6,x6,8 + +0000000080008868 : +Zknd_aes64dsm_cg_cp_sbox_b154: + aes64dsm x28, x23, x18 # perform operation + 80008868: 3f2b8e33 aes64dsm x28,x23,x18 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cp_sbox_b154, Zknd_aes64dsm_cg_cp_sbox_b154_str) + 8000886c: 0007b203 ld x4,0(x15) + 80008870: 01c20c63 beq x4,x28,80008888 + 80008874: 08d022ef jal x5,8000b100 + 80008878: 80008868 .word 0x80008868 + 8000887c: 00000000 .word 0x00000000 + 80008880: 8001fc5e .word 0x8001fc5e + 80008884: 00000000 .word 0x00000000 + 80008888: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x9b9b9b9b9b9b9b9b + 8000888c: 00033c03 ld x24,0(x6) + 80008890: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x9b9b9b9b9b9b9b9b + 80008894: 00033c83 ld x25,0(x6) + 80008898: 00830313 addi x6,x6,8 + +000000008000889c : +Zknd_aes64dsm_cg_cp_sbox_b155: + aes64dsm x18, x24, x25 # perform operation + 8000889c: 3f9c0933 aes64dsm x18,x24,x25 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b155, Zknd_aes64dsm_cg_cp_sbox_b155_str) + 800088a0: 0007b203 ld x4,0(x15) + 800088a4: 01220c63 beq x4,x18,800088bc + 800088a8: 059022ef jal x5,8000b100 + 800088ac: 8000889c .word 0x8000889c + 800088b0: 00000000 .word 0x00000000 + 800088b4: 8001fc98 .word 0x8001fc98 + 800088b8: 00000000 .word 0x00000000 + 800088bc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x9c9c9c9c9c9c9c9c + 800088c0: 00033c83 ld x25,0(x6) + 800088c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x9c9c9c9c9c9c9c9c + 800088c8: 00033483 ld x9,0(x6) + 800088cc: 00830313 addi x6,x6,8 + +00000000800088d0 : +Zknd_aes64dsm_cg_cp_sbox_b156: + aes64dsm x7, x25, x9 # perform operation + 800088d0: 3e9c83b3 aes64dsm x7,x25,x9 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b156, Zknd_aes64dsm_cg_cp_sbox_b156_str) + 800088d4: 0007b203 ld x4,0(x15) + 800088d8: 00720c63 beq x4,x7,800088f0 + 800088dc: 025022ef jal x5,8000b100 + 800088e0: 800088d0 .word 0x800088d0 + 800088e4: 00000000 .word 0x00000000 + 800088e8: 8001fcd2 .word 0x8001fcd2 + 800088ec: 00000000 .word 0x00000000 + 800088f0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x9d9d9d9d9d9d9d9d + 800088f4: 00033103 ld x2,0(x6) + 800088f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x9d9d9d9d9d9d9d9d + 800088fc: 00033183 ld x3,0(x6) + 80008900: 00830313 addi x6,x6,8 + +0000000080008904 : +Zknd_aes64dsm_cg_cp_sbox_b157: + aes64dsm x1, x2, x3 # perform operation + 80008904: 3e3100b3 aes64dsm x1,x2,x3 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b157, Zknd_aes64dsm_cg_cp_sbox_b157_str) + 80008908: 0007b203 ld x4,0(x15) + 8000890c: 00120c63 beq x4,x1,80008924 + 80008910: 7f0022ef jal x5,8000b100 + 80008914: 80008904 .word 0x80008904 + 80008918: 00000000 .word 0x00000000 + 8000891c: 8001fd0c .word 0x8001fd0c + 80008920: 00000000 .word 0x00000000 + 80008924: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x9e9e9e9e9e9e9e9e + 80008928: 00033903 ld x18,0(x6) + 8000892c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x9e9e9e9e9e9e9e9e + 80008930: 00033603 ld x12,0(x6) + 80008934: 00830313 addi x6,x6,8 + +0000000080008938 : +Zknd_aes64dsm_cg_cp_sbox_b158: + aes64dsm x17, x18, x12 # perform operation + 80008938: 3ec908b3 aes64dsm x17,x18,x12 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b158, Zknd_aes64dsm_cg_cp_sbox_b158_str) + 8000893c: 0007b203 ld x4,0(x15) + 80008940: 01120c63 beq x4,x17,80008958 + 80008944: 7bc022ef jal x5,8000b100 + 80008948: 80008938 .word 0x80008938 + 8000894c: 00000000 .word 0x00000000 + 80008950: 8001fd46 .word 0x8001fd46 + 80008954: 00000000 .word 0x00000000 + 80008958: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x9f9f9f9f9f9f9f9f + 8000895c: 00033a03 ld x20,0(x6) + 80008960: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x9f9f9f9f9f9f9f9f + 80008964: 00033d03 ld x26,0(x6) + 80008968: 00830313 addi x6,x6,8 + +000000008000896c : +Zknd_aes64dsm_cg_cp_sbox_b159: + aes64dsm x24, x20, x26 # perform operation + 8000896c: 3faa0c33 aes64dsm x24,x20,x26 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64dsm_cg_cp_sbox_b159, Zknd_aes64dsm_cg_cp_sbox_b159_str) + 80008970: 0007b203 ld x4,0(x15) + 80008974: 01820c63 beq x4,x24,8000898c + 80008978: 788022ef jal x5,8000b100 + 8000897c: 8000896c .word 0x8000896c + 80008980: 00000000 .word 0x00000000 + 80008984: 8001fd80 .word 0x8001fd80 + 80008988: 00000000 .word 0x00000000 + 8000898c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xa0a0a0a0a0a0a0a0 + 80008990: 00033903 ld x18,0(x6) + 80008994: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xa0a0a0a0a0a0a0a0 + 80008998: 00033703 ld x14,0(x6) + 8000899c: 00830313 addi x6,x6,8 + +00000000800089a0 : +Zknd_aes64dsm_cg_cp_sbox_b160: + aes64dsm x16, x18, x14 # perform operation + 800089a0: 3ee90833 aes64dsm x16,x18,x14 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b160, Zknd_aes64dsm_cg_cp_sbox_b160_str) + 800089a4: 0007b203 ld x4,0(x15) + 800089a8: 01020c63 beq x4,x16,800089c0 + 800089ac: 754022ef jal x5,8000b100 + 800089b0: 800089a0 .word 0x800089a0 + 800089b4: 00000000 .word 0x00000000 + 800089b8: 8001fdba .word 0x8001fdba + 800089bc: 00000000 .word 0x00000000 + 800089c0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xa1a1a1a1a1a1a1a1 + 800089c4: 00033d03 ld x26,0(x6) + 800089c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xa1a1a1a1a1a1a1a1 + 800089cc: 00033603 ld x12,0(x6) + 800089d0: 00830313 addi x6,x6,8 + +00000000800089d4 : +Zknd_aes64dsm_cg_cp_sbox_b161: + aes64dsm x29, x26, x12 # perform operation + 800089d4: 3ecd0eb3 aes64dsm x29,x26,x12 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b161, Zknd_aes64dsm_cg_cp_sbox_b161_str) + 800089d8: 0007b203 ld x4,0(x15) + 800089dc: 01d20c63 beq x4,x29,800089f4 + 800089e0: 720022ef jal x5,8000b100 + 800089e4: 800089d4 .word 0x800089d4 + 800089e8: 00000000 .word 0x00000000 + 800089ec: 8001fdf4 .word 0x8001fdf4 + 800089f0: 00000000 .word 0x00000000 + 800089f4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xa2a2a2a2a2a2a2a2 + 800089f8: 00033b03 ld x22,0(x6) + 800089fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xa2a2a2a2a2a2a2a2 + 80008a00: 00033d03 ld x26,0(x6) + 80008a04: 00830313 addi x6,x6,8 + +0000000080008a08 : +Zknd_aes64dsm_cg_cp_sbox_b162: + aes64dsm x18, x22, x26 # perform operation + 80008a08: 3fab0933 aes64dsm x18,x22,x26 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b162, Zknd_aes64dsm_cg_cp_sbox_b162_str) + 80008a0c: 0007b203 ld x4,0(x15) + 80008a10: 01220c63 beq x4,x18,80008a28 + 80008a14: 6ec022ef jal x5,8000b100 + 80008a18: 80008a08 .word 0x80008a08 + 80008a1c: 00000000 .word 0x00000000 + 80008a20: 8001fe2e .word 0x8001fe2e + 80008a24: 00000000 .word 0x00000000 + 80008a28: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xa3a3a3a3a3a3a3a3 + 80008a2c: 00033483 ld x9,0(x6) + 80008a30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xa3a3a3a3a3a3a3a3 + 80008a34: 00033503 ld x10,0(x6) + 80008a38: 00830313 addi x6,x6,8 + +0000000080008a3c : +Zknd_aes64dsm_cg_cp_sbox_b163: + aes64dsm x7, x9, x10 # perform operation + 80008a3c: 3ea483b3 aes64dsm x7,x9,x10 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b163, Zknd_aes64dsm_cg_cp_sbox_b163_str) + 80008a40: 0007b203 ld x4,0(x15) + 80008a44: 00720c63 beq x4,x7,80008a5c + 80008a48: 6b8022ef jal x5,8000b100 + 80008a4c: 80008a3c .word 0x80008a3c + 80008a50: 00000000 .word 0x00000000 + 80008a54: 8001fe68 .word 0x8001fe68 + 80008a58: 00000000 .word 0x00000000 + 80008a5c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xa4a4a4a4a4a4a4a4 + 80008a60: 00033083 ld x1,0(x6) + 80008a64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xa4a4a4a4a4a4a4a4 + 80008a68: 00033a83 ld x21,0(x6) + 80008a6c: 00830313 addi x6,x6,8 + +0000000080008a70 : +Zknd_aes64dsm_cg_cp_sbox_b164: + aes64dsm x25, x1, x21 # perform operation + 80008a70: 3f508cb3 aes64dsm x25,x1,x21 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b164, Zknd_aes64dsm_cg_cp_sbox_b164_str) + 80008a74: 0007b203 ld x4,0(x15) + 80008a78: 01920c63 beq x4,x25,80008a90 + 80008a7c: 684022ef jal x5,8000b100 + 80008a80: 80008a70 .word 0x80008a70 + 80008a84: 00000000 .word 0x00000000 + 80008a88: 8001fea2 .word 0x8001fea2 + 80008a8c: 00000000 .word 0x00000000 + 80008a90: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xa5a5a5a5a5a5a5a5 + 80008a94: 00033d03 ld x26,0(x6) + 80008a98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xa5a5a5a5a5a5a5a5 + 80008a9c: 00033503 ld x10,0(x6) + 80008aa0: 00830313 addi x6,x6,8 + +0000000080008aa4 : +Zknd_aes64dsm_cg_cp_sbox_b165: + aes64dsm x9, x26, x10 # perform operation + 80008aa4: 3ead04b3 aes64dsm x9,x26,x10 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b165, Zknd_aes64dsm_cg_cp_sbox_b165_str) + 80008aa8: 0007b203 ld x4,0(x15) + 80008aac: 00920c63 beq x4,x9,80008ac4 + 80008ab0: 650022ef jal x5,8000b100 + 80008ab4: 80008aa4 .word 0x80008aa4 + 80008ab8: 00000000 .word 0x00000000 + 80008abc: 8001fedc .word 0x8001fedc + 80008ac0: 00000000 .word 0x00000000 + 80008ac4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xa6a6a6a6a6a6a6a6 + 80008ac8: 00033983 ld x19,0(x6) + 80008acc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xa6a6a6a6a6a6a6a6 + 80008ad0: 00033e83 ld x29,0(x6) + 80008ad4: 00830313 addi x6,x6,8 + +0000000080008ad8 : +Zknd_aes64dsm_cg_cp_sbox_b166: + aes64dsm x27, x19, x29 # perform operation + 80008ad8: 3fd98db3 aes64dsm x27,x19,x29 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b166, Zknd_aes64dsm_cg_cp_sbox_b166_str) + 80008adc: 0007b203 ld x4,0(x15) + 80008ae0: 01b20c63 beq x4,x27,80008af8 + 80008ae4: 61c022ef jal x5,8000b100 + 80008ae8: 80008ad8 .word 0x80008ad8 + 80008aec: 00000000 .word 0x00000000 + 80008af0: 8001ff16 .word 0x8001ff16 + 80008af4: 00000000 .word 0x00000000 + 80008af8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xa7a7a7a7a7a7a7a7 + 80008afc: 00033e03 ld x28,0(x6) + 80008b00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xa7a7a7a7a7a7a7a7 + 80008b04: 00033d03 ld x26,0(x6) + 80008b08: 00830313 addi x6,x6,8 + +0000000080008b0c : +Zknd_aes64dsm_cg_cp_sbox_b167: + aes64dsm x1, x28, x26 # perform operation + 80008b0c: 3fae00b3 aes64dsm x1,x28,x26 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b167, Zknd_aes64dsm_cg_cp_sbox_b167_str) + 80008b10: 0007b203 ld x4,0(x15) + 80008b14: 00120c63 beq x4,x1,80008b2c + 80008b18: 5e8022ef jal x5,8000b100 + 80008b1c: 80008b0c .word 0x80008b0c + 80008b20: 00000000 .word 0x00000000 + 80008b24: 8001ff50 .word 0x8001ff50 + 80008b28: 00000000 .word 0x00000000 + 80008b2c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xa8a8a8a8a8a8a8a8 + 80008b30: 00033503 ld x10,0(x6) + 80008b34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xa8a8a8a8a8a8a8a8 + 80008b38: 00033a03 ld x20,0(x6) + 80008b3c: 00830313 addi x6,x6,8 + +0000000080008b40 : +Zknd_aes64dsm_cg_cp_sbox_b168: + aes64dsm x12, x10, x20 # perform operation + 80008b40: 3f450633 aes64dsm x12,x10,x20 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b168, Zknd_aes64dsm_cg_cp_sbox_b168_str) + 80008b44: 0007b203 ld x4,0(x15) + 80008b48: 00c20c63 beq x4,x12,80008b60 + 80008b4c: 5b4022ef jal x5,8000b100 + 80008b50: 80008b40 .word 0x80008b40 + 80008b54: 00000000 .word 0x00000000 + 80008b58: 8001ff8a .word 0x8001ff8a + 80008b5c: 00000000 .word 0x00000000 + 80008b60: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xa9a9a9a9a9a9a9a9 + 80008b64: 00033f03 ld x30,0(x6) + 80008b68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xa9a9a9a9a9a9a9a9 + 80008b6c: 00033503 ld x10,0(x6) + 80008b70: 00830313 addi x6,x6,8 + +0000000080008b74 : +Zknd_aes64dsm_cg_cp_sbox_b169: + aes64dsm x11, x30, x10 # perform operation + 80008b74: 3eaf05b3 aes64dsm x11,x30,x10 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b169, Zknd_aes64dsm_cg_cp_sbox_b169_str) + 80008b78: 0007b203 ld x4,0(x15) + 80008b7c: 00b20c63 beq x4,x11,80008b94 + 80008b80: 580022ef jal x5,8000b100 + 80008b84: 80008b74 .word 0x80008b74 + 80008b88: 00000000 .word 0x00000000 + 80008b8c: 8001ffc4 .word 0x8001ffc4 + 80008b90: 00000000 .word 0x00000000 + 80008b94: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80008b98: 00033f03 ld x30,0(x6) + 80008b9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80008ba0: 00033903 ld x18,0(x6) + 80008ba4: 00830313 addi x6,x6,8 + +0000000080008ba8 : +Zknd_aes64dsm_cg_cp_sbox_b170: + aes64dsm x23, x30, x18 # perform operation + 80008ba8: 3f2f0bb3 aes64dsm x23,x30,x18 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b170, Zknd_aes64dsm_cg_cp_sbox_b170_str) + 80008bac: 0007b203 ld x4,0(x15) + 80008bb0: 01720c63 beq x4,x23,80008bc8 + 80008bb4: 54c022ef jal x5,8000b100 + 80008bb8: 80008ba8 .word 0x80008ba8 + 80008bbc: 00000000 .word 0x00000000 + 80008bc0: 8001fffe .word 0x8001fffe + 80008bc4: 00000000 .word 0x00000000 + 80008bc8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xabababababababab + 80008bcc: 00033983 ld x19,0(x6) + 80008bd0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xabababababababab + 80008bd4: 00033583 ld x11,0(x6) + 80008bd8: 00830313 addi x6,x6,8 + +0000000080008bdc : +Zknd_aes64dsm_cg_cp_sbox_b171: + aes64dsm x23, x19, x11 # perform operation + 80008bdc: 3eb98bb3 aes64dsm x23,x19,x11 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b171, Zknd_aes64dsm_cg_cp_sbox_b171_str) + 80008be0: 0007b203 ld x4,0(x15) + 80008be4: 01720c63 beq x4,x23,80008bfc + 80008be8: 518022ef jal x5,8000b100 + 80008bec: 80008bdc .word 0x80008bdc + 80008bf0: 00000000 .word 0x00000000 + 80008bf4: 80020038 .word 0x80020038 + 80008bf8: 00000000 .word 0x00000000 + 80008bfc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xacacacacacacacac + 80008c00: 00033d03 ld x26,0(x6) + 80008c04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xacacacacacacacac + 80008c08: 00033803 ld x16,0(x6) + 80008c0c: 00830313 addi x6,x6,8 + +0000000080008c10 : +Zknd_aes64dsm_cg_cp_sbox_b172: + aes64dsm x25, x26, x16 # perform operation + 80008c10: 3f0d0cb3 aes64dsm x25,x26,x16 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b172, Zknd_aes64dsm_cg_cp_sbox_b172_str) + 80008c14: 0007b203 ld x4,0(x15) + 80008c18: 01920c63 beq x4,x25,80008c30 + 80008c1c: 4e4022ef jal x5,8000b100 + 80008c20: 80008c10 .word 0x80008c10 + 80008c24: 00000000 .word 0x00000000 + 80008c28: 80020072 .word 0x80020072 + 80008c2c: 00000000 .word 0x00000000 + 80008c30: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xadadadadadadadad + 80008c34: 00033c03 ld x24,0(x6) + 80008c38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xadadadadadadadad + 80008c3c: 00033d03 ld x26,0(x6) + 80008c40: 00830313 addi x6,x6,8 + +0000000080008c44 : +Zknd_aes64dsm_cg_cp_sbox_b173: + aes64dsm x13, x24, x26 # perform operation + 80008c44: 3fac06b3 aes64dsm x13,x24,x26 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b173, Zknd_aes64dsm_cg_cp_sbox_b173_str) + 80008c48: 0007b203 ld x4,0(x15) + 80008c4c: 00d20c63 beq x4,x13,80008c64 + 80008c50: 4b0022ef jal x5,8000b100 + 80008c54: 80008c44 .word 0x80008c44 + 80008c58: 00000000 .word 0x00000000 + 80008c5c: 800200ac .word 0x800200ac + 80008c60: 00000000 .word 0x00000000 + 80008c64: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xaeaeaeaeaeaeaeae + 80008c68: 00033e83 ld x29,0(x6) + 80008c6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xaeaeaeaeaeaeaeae + 80008c70: 00033b83 ld x23,0(x6) + 80008c74: 00830313 addi x6,x6,8 + +0000000080008c78 : +Zknd_aes64dsm_cg_cp_sbox_b174: + aes64dsm x7, x29, x23 # perform operation + 80008c78: 3f7e83b3 aes64dsm x7,x29,x23 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b174, Zknd_aes64dsm_cg_cp_sbox_b174_str) + 80008c7c: 0007b203 ld x4,0(x15) + 80008c80: 00720c63 beq x4,x7,80008c98 + 80008c84: 47c022ef jal x5,8000b100 + 80008c88: 80008c78 .word 0x80008c78 + 80008c8c: 00000000 .word 0x00000000 + 80008c90: 800200e6 .word 0x800200e6 + 80008c94: 00000000 .word 0x00000000 + 80008c98: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xafafafafafafafaf + 80008c9c: 00033083 ld x1,0(x6) + 80008ca0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xafafafafafafafaf + 80008ca4: 00033603 ld x12,0(x6) + 80008ca8: 00830313 addi x6,x6,8 + +0000000080008cac : +Zknd_aes64dsm_cg_cp_sbox_b175: + aes64dsm x26, x1, x12 # perform operation + 80008cac: 3ec08d33 aes64dsm x26,x1,x12 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b175, Zknd_aes64dsm_cg_cp_sbox_b175_str) + 80008cb0: 0007b203 ld x4,0(x15) + 80008cb4: 01a20c63 beq x4,x26,80008ccc + 80008cb8: 448022ef jal x5,8000b100 + 80008cbc: 80008cac .word 0x80008cac + 80008cc0: 00000000 .word 0x00000000 + 80008cc4: 80020120 .word 0x80020120 + 80008cc8: 00000000 .word 0x00000000 + 80008ccc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xb0b0b0b0b0b0b0b0 + 80008cd0: 00033183 ld x3,0(x6) + 80008cd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xb0b0b0b0b0b0b0b0 + 80008cd8: 00033b03 ld x22,0(x6) + 80008cdc: 00830313 addi x6,x6,8 + +0000000080008ce0 : +Zknd_aes64dsm_cg_cp_sbox_b176: + aes64dsm x8, x3, x22 # perform operation + 80008ce0: 3f618433 aes64dsm x8,x3,x22 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b176, Zknd_aes64dsm_cg_cp_sbox_b176_str) + 80008ce4: 0007b203 ld x4,0(x15) + 80008ce8: 00820c63 beq x4,x8,80008d00 + 80008cec: 414022ef jal x5,8000b100 + 80008cf0: 80008ce0 .word 0x80008ce0 + 80008cf4: 00000000 .word 0x00000000 + 80008cf8: 8002015a .word 0x8002015a + 80008cfc: 00000000 .word 0x00000000 + 80008d00: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xb1b1b1b1b1b1b1b1 + 80008d04: 00033c83 ld x25,0(x6) + 80008d08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xb1b1b1b1b1b1b1b1 + 80008d0c: 00033183 ld x3,0(x6) + 80008d10: 00830313 addi x6,x6,8 + +0000000080008d14 : +Zknd_aes64dsm_cg_cp_sbox_b177: + aes64dsm x12, x25, x3 # perform operation + 80008d14: 3e3c8633 aes64dsm x12,x25,x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b177, Zknd_aes64dsm_cg_cp_sbox_b177_str) + 80008d18: 0007b203 ld x4,0(x15) + 80008d1c: 00c20c63 beq x4,x12,80008d34 + 80008d20: 3e0022ef jal x5,8000b100 + 80008d24: 80008d14 .word 0x80008d14 + 80008d28: 00000000 .word 0x00000000 + 80008d2c: 80020194 .word 0x80020194 + 80008d30: 00000000 .word 0x00000000 + 80008d34: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xb2b2b2b2b2b2b2b2 + 80008d38: 00033103 ld x2,0(x6) + 80008d3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xb2b2b2b2b2b2b2b2 + 80008d40: 00033b03 ld x22,0(x6) + 80008d44: 00830313 addi x6,x6,8 + +0000000080008d48 : +Zknd_aes64dsm_cg_cp_sbox_b178: + aes64dsm x12, x2, x22 # perform operation + 80008d48: 3f610633 aes64dsm x12,x2,x22 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b178, Zknd_aes64dsm_cg_cp_sbox_b178_str) + 80008d4c: 0007b203 ld x4,0(x15) + 80008d50: 00c20c63 beq x4,x12,80008d68 + 80008d54: 3ac022ef jal x5,8000b100 + 80008d58: 80008d48 .word 0x80008d48 + 80008d5c: 00000000 .word 0x00000000 + 80008d60: 800201ce .word 0x800201ce + 80008d64: 00000000 .word 0x00000000 + 80008d68: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xb3b3b3b3b3b3b3b3 + 80008d6c: 00033583 ld x11,0(x6) + 80008d70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xb3b3b3b3b3b3b3b3 + 80008d74: 00033c83 ld x25,0(x6) + 80008d78: 00830313 addi x6,x6,8 + +0000000080008d7c : +Zknd_aes64dsm_cg_cp_sbox_b179: + aes64dsm x20, x11, x25 # perform operation + 80008d7c: 3f958a33 aes64dsm x20,x11,x25 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zknd_aes64dsm_cg_cp_sbox_b179, Zknd_aes64dsm_cg_cp_sbox_b179_str) + 80008d80: 0007b203 ld x4,0(x15) + 80008d84: 01420c63 beq x4,x20,80008d9c + 80008d88: 378022ef jal x5,8000b100 + 80008d8c: 80008d7c .word 0x80008d7c + 80008d90: 00000000 .word 0x00000000 + 80008d94: 80020208 .word 0x80020208 + 80008d98: 00000000 .word 0x00000000 + 80008d9c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xb4b4b4b4b4b4b4b4 + 80008da0: 00033a83 ld x21,0(x6) + 80008da4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xb4b4b4b4b4b4b4b4 + 80008da8: 00033f83 ld x31,0(x6) + 80008dac: 00830313 addi x6,x6,8 + +0000000080008db0 : +Zknd_aes64dsm_cg_cp_sbox_b180: + aes64dsm x26, x21, x31 # perform operation + 80008db0: 3ffa8d33 aes64dsm x26,x21,x31 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b180, Zknd_aes64dsm_cg_cp_sbox_b180_str) + 80008db4: 0007b203 ld x4,0(x15) + 80008db8: 01a20c63 beq x4,x26,80008dd0 + 80008dbc: 344022ef jal x5,8000b100 + 80008dc0: 80008db0 .word 0x80008db0 + 80008dc4: 00000000 .word 0x00000000 + 80008dc8: 80020242 .word 0x80020242 + 80008dcc: 00000000 .word 0x00000000 + 80008dd0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xb5b5b5b5b5b5b5b5 + 80008dd4: 00033603 ld x12,0(x6) + 80008dd8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xb5b5b5b5b5b5b5b5 + 80008ddc: 00033103 ld x2,0(x6) + 80008de0: 00830313 addi x6,x6,8 + +0000000080008de4 : +Zknd_aes64dsm_cg_cp_sbox_b181: + aes64dsm x22, x12, x2 # perform operation + 80008de4: 3e260b33 aes64dsm x22,x12,x2 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zknd_aes64dsm_cg_cp_sbox_b181, Zknd_aes64dsm_cg_cp_sbox_b181_str) + 80008de8: 0007b203 ld x4,0(x15) + 80008dec: 01620c63 beq x4,x22,80008e04 + 80008df0: 310022ef jal x5,8000b100 + 80008df4: 80008de4 .word 0x80008de4 + 80008df8: 00000000 .word 0x00000000 + 80008dfc: 8002027c .word 0x8002027c + 80008e00: 00000000 .word 0x00000000 + 80008e04: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xb6b6b6b6b6b6b6b6 + 80008e08: 00033f83 ld x31,0(x6) + 80008e0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xb6b6b6b6b6b6b6b6 + 80008e10: 00033503 ld x10,0(x6) + 80008e14: 00830313 addi x6,x6,8 + +0000000080008e18 : +Zknd_aes64dsm_cg_cp_sbox_b182: + aes64dsm x17, x31, x10 # perform operation + 80008e18: 3eaf88b3 aes64dsm x17,x31,x10 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b182, Zknd_aes64dsm_cg_cp_sbox_b182_str) + 80008e1c: 0007b203 ld x4,0(x15) + 80008e20: 01120c63 beq x4,x17,80008e38 + 80008e24: 2dc022ef jal x5,8000b100 + 80008e28: 80008e18 .word 0x80008e18 + 80008e2c: 00000000 .word 0x00000000 + 80008e30: 800202b6 .word 0x800202b6 + 80008e34: 00000000 .word 0x00000000 + 80008e38: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xb7b7b7b7b7b7b7b7 + 80008e3c: 00033683 ld x13,0(x6) + 80008e40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xb7b7b7b7b7b7b7b7 + 80008e44: 00033383 ld x7,0(x6) + 80008e48: 00830313 addi x6,x6,8 + +0000000080008e4c : +Zknd_aes64dsm_cg_cp_sbox_b183: + aes64dsm x19, x13, x7 # perform operation + 80008e4c: 3e7689b3 aes64dsm x19,x13,x7 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b183, Zknd_aes64dsm_cg_cp_sbox_b183_str) + 80008e50: 0007b203 ld x4,0(x15) + 80008e54: 01320c63 beq x4,x19,80008e6c + 80008e58: 2a8022ef jal x5,8000b100 + 80008e5c: 80008e4c .word 0x80008e4c + 80008e60: 00000000 .word 0x00000000 + 80008e64: 800202f0 .word 0x800202f0 + 80008e68: 00000000 .word 0x00000000 + 80008e6c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xb8b8b8b8b8b8b8b8 + 80008e70: 00033b03 ld x22,0(x6) + 80008e74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xb8b8b8b8b8b8b8b8 + 80008e78: 00033d83 ld x27,0(x6) + 80008e7c: 00830313 addi x6,x6,8 + +0000000080008e80 : +Zknd_aes64dsm_cg_cp_sbox_b184: + aes64dsm x2, x22, x27 # perform operation + 80008e80: 3fbb0133 aes64dsm x2,x22,x27 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b184, Zknd_aes64dsm_cg_cp_sbox_b184_str) + 80008e84: 0007b203 ld x4,0(x15) + 80008e88: 00220c63 beq x4,x2,80008ea0 + 80008e8c: 274022ef jal x5,8000b100 + 80008e90: 80008e80 .word 0x80008e80 + 80008e94: 00000000 .word 0x00000000 + 80008e98: 8002032a .word 0x8002032a + 80008e9c: 00000000 .word 0x00000000 + 80008ea0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xb9b9b9b9b9b9b9b9 + 80008ea4: 00033103 ld x2,0(x6) + 80008ea8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xb9b9b9b9b9b9b9b9 + 80008eac: 00033b03 ld x22,0(x6) + 80008eb0: 00830313 addi x6,x6,8 + +0000000080008eb4 : +Zknd_aes64dsm_cg_cp_sbox_b185: + aes64dsm x9, x2, x22 # perform operation + 80008eb4: 3f6104b3 aes64dsm x9,x2,x22 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b185, Zknd_aes64dsm_cg_cp_sbox_b185_str) + 80008eb8: 0007b203 ld x4,0(x15) + 80008ebc: 00920c63 beq x4,x9,80008ed4 + 80008ec0: 240022ef jal x5,8000b100 + 80008ec4: 80008eb4 .word 0x80008eb4 + 80008ec8: 00000000 .word 0x00000000 + 80008ecc: 80020364 .word 0x80020364 + 80008ed0: 00000000 .word 0x00000000 + 80008ed4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xbabababababababa + 80008ed8: 00033583 ld x11,0(x6) + 80008edc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xbabababababababa + 80008ee0: 00033903 ld x18,0(x6) + 80008ee4: 00830313 addi x6,x6,8 + +0000000080008ee8 : +Zknd_aes64dsm_cg_cp_sbox_b186: + aes64dsm x29, x11, x18 # perform operation + 80008ee8: 3f258eb3 aes64dsm x29,x11,x18 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b186, Zknd_aes64dsm_cg_cp_sbox_b186_str) + 80008eec: 0007b203 ld x4,0(x15) + 80008ef0: 01d20c63 beq x4,x29,80008f08 + 80008ef4: 20c022ef jal x5,8000b100 + 80008ef8: 80008ee8 .word 0x80008ee8 + 80008efc: 00000000 .word 0x00000000 + 80008f00: 8002039e .word 0x8002039e + 80008f04: 00000000 .word 0x00000000 + 80008f08: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xbbbbbbbbbbbbbbbb + 80008f0c: 00033883 ld x17,0(x6) + 80008f10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xbbbbbbbbbbbbbbbb + 80008f14: 00033183 ld x3,0(x6) + 80008f18: 00830313 addi x6,x6,8 + +0000000080008f1c : +Zknd_aes64dsm_cg_cp_sbox_b187: + aes64dsm x24, x17, x3 # perform operation + 80008f1c: 3e388c33 aes64dsm x24,x17,x3 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64dsm_cg_cp_sbox_b187, Zknd_aes64dsm_cg_cp_sbox_b187_str) + 80008f20: 0007b203 ld x4,0(x15) + 80008f24: 01820c63 beq x4,x24,80008f3c + 80008f28: 1d8022ef jal x5,8000b100 + 80008f2c: 80008f1c .word 0x80008f1c + 80008f30: 00000000 .word 0x00000000 + 80008f34: 800203d8 .word 0x800203d8 + 80008f38: 00000000 .word 0x00000000 + 80008f3c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xbcbcbcbcbcbcbcbc + 80008f40: 00033f03 ld x30,0(x6) + 80008f44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xbcbcbcbcbcbcbcbc + 80008f48: 00033d03 ld x26,0(x6) + 80008f4c: 00830313 addi x6,x6,8 + +0000000080008f50 : +Zknd_aes64dsm_cg_cp_sbox_b188: + aes64dsm x29, x30, x26 # perform operation + 80008f50: 3faf0eb3 aes64dsm x29,x30,x26 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64dsm_cg_cp_sbox_b188, Zknd_aes64dsm_cg_cp_sbox_b188_str) + 80008f54: 0007b203 ld x4,0(x15) + 80008f58: 01d20c63 beq x4,x29,80008f70 + 80008f5c: 1a4022ef jal x5,8000b100 + 80008f60: 80008f50 .word 0x80008f50 + 80008f64: 00000000 .word 0x00000000 + 80008f68: 80020412 .word 0x80020412 + 80008f6c: 00000000 .word 0x00000000 + 80008f70: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xbdbdbdbdbdbdbdbd + 80008f74: 00033583 ld x11,0(x6) + 80008f78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xbdbdbdbdbdbdbdbd + 80008f7c: 00033903 ld x18,0(x6) + 80008f80: 00830313 addi x6,x6,8 + +0000000080008f84 : +Zknd_aes64dsm_cg_cp_sbox_b189: + aes64dsm x28, x11, x18 # perform operation + 80008f84: 3f258e33 aes64dsm x28,x11,x18 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cp_sbox_b189, Zknd_aes64dsm_cg_cp_sbox_b189_str) + 80008f88: 0007b203 ld x4,0(x15) + 80008f8c: 01c20c63 beq x4,x28,80008fa4 + 80008f90: 170022ef jal x5,8000b100 + 80008f94: 80008f84 .word 0x80008f84 + 80008f98: 00000000 .word 0x00000000 + 80008f9c: 8002044c .word 0x8002044c + 80008fa0: 00000000 .word 0x00000000 + 80008fa4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xbebebebebebebebe + 80008fa8: 00033383 ld x7,0(x6) + 80008fac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xbebebebebebebebe + 80008fb0: 00033983 ld x19,0(x6) + 80008fb4: 00830313 addi x6,x6,8 + +0000000080008fb8 : +Zknd_aes64dsm_cg_cp_sbox_b190: + aes64dsm x9, x7, x19 # perform operation + 80008fb8: 3f3384b3 aes64dsm x9,x7,x19 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b190, Zknd_aes64dsm_cg_cp_sbox_b190_str) + 80008fbc: 0007b203 ld x4,0(x15) + 80008fc0: 00920c63 beq x4,x9,80008fd8 + 80008fc4: 13c022ef jal x5,8000b100 + 80008fc8: 80008fb8 .word 0x80008fb8 + 80008fcc: 00000000 .word 0x00000000 + 80008fd0: 80020486 .word 0x80020486 + 80008fd4: 00000000 .word 0x00000000 + 80008fd8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xbfbfbfbfbfbfbfbf + 80008fdc: 00033683 ld x13,0(x6) + 80008fe0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xbfbfbfbfbfbfbfbf + 80008fe4: 00033983 ld x19,0(x6) + 80008fe8: 00830313 addi x6,x6,8 + +0000000080008fec : +Zknd_aes64dsm_cg_cp_sbox_b191: + aes64dsm x3, x13, x19 # perform operation + 80008fec: 3f3681b3 aes64dsm x3,x13,x19 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b191, Zknd_aes64dsm_cg_cp_sbox_b191_str) + 80008ff0: 0007b203 ld x4,0(x15) + 80008ff4: 00320c63 beq x4,x3,8000900c + 80008ff8: 108022ef jal x5,8000b100 + 80008ffc: 80008fec .word 0x80008fec + 80009000: 00000000 .word 0x00000000 + 80009004: 800204c0 .word 0x800204c0 + 80009008: 00000000 .word 0x00000000 + 8000900c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xc0c0c0c0c0c0c0c0 + 80009010: 00033383 ld x7,0(x6) + 80009014: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xc0c0c0c0c0c0c0c0 + 80009018: 00033703 ld x14,0(x6) + 8000901c: 00830313 addi x6,x6,8 + +0000000080009020 : +Zknd_aes64dsm_cg_cp_sbox_b192: + aes64dsm x27, x7, x14 # perform operation + 80009020: 3ee38db3 aes64dsm x27,x7,x14 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b192, Zknd_aes64dsm_cg_cp_sbox_b192_str) + 80009024: 0007b203 ld x4,0(x15) + 80009028: 01b20c63 beq x4,x27,80009040 + 8000902c: 0d4022ef jal x5,8000b100 + 80009030: 80009020 .word 0x80009020 + 80009034: 00000000 .word 0x00000000 + 80009038: 800204fa .word 0x800204fa + 8000903c: 00000000 .word 0x00000000 + 80009040: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xc1c1c1c1c1c1c1c1 + 80009044: 00033603 ld x12,0(x6) + 80009048: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xc1c1c1c1c1c1c1c1 + 8000904c: 00033f83 ld x31,0(x6) + 80009050: 00830313 addi x6,x6,8 + +0000000080009054 : +Zknd_aes64dsm_cg_cp_sbox_b193: + aes64dsm x14, x12, x31 # perform operation + 80009054: 3ff60733 aes64dsm x14,x12,x31 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b193, Zknd_aes64dsm_cg_cp_sbox_b193_str) + 80009058: 0007b203 ld x4,0(x15) + 8000905c: 00e20c63 beq x4,x14,80009074 + 80009060: 0a0022ef jal x5,8000b100 + 80009064: 80009054 .word 0x80009054 + 80009068: 00000000 .word 0x00000000 + 8000906c: 80020534 .word 0x80020534 + 80009070: 00000000 .word 0x00000000 + 80009074: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xc2c2c2c2c2c2c2c2 + 80009078: 00033d03 ld x26,0(x6) + 8000907c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xc2c2c2c2c2c2c2c2 + 80009080: 00033b83 ld x23,0(x6) + 80009084: 00830313 addi x6,x6,8 + +0000000080009088 : +Zknd_aes64dsm_cg_cp_sbox_b194: + aes64dsm x19, x26, x23 # perform operation + 80009088: 3f7d09b3 aes64dsm x19,x26,x23 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b194, Zknd_aes64dsm_cg_cp_sbox_b194_str) + 8000908c: 0007b203 ld x4,0(x15) + 80009090: 01320c63 beq x4,x19,800090a8 + 80009094: 06c022ef jal x5,8000b100 + 80009098: 80009088 .word 0x80009088 + 8000909c: 00000000 .word 0x00000000 + 800090a0: 8002056e .word 0x8002056e + 800090a4: 00000000 .word 0x00000000 + 800090a8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xc3c3c3c3c3c3c3c3 + 800090ac: 00033a03 ld x20,0(x6) + 800090b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xc3c3c3c3c3c3c3c3 + 800090b4: 00033503 ld x10,0(x6) + 800090b8: 00830313 addi x6,x6,8 + +00000000800090bc : +Zknd_aes64dsm_cg_cp_sbox_b195: + aes64dsm x8, x20, x10 # perform operation + 800090bc: 3eaa0433 aes64dsm x8,x20,x10 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b195, Zknd_aes64dsm_cg_cp_sbox_b195_str) + 800090c0: 0007b203 ld x4,0(x15) + 800090c4: 00820c63 beq x4,x8,800090dc + 800090c8: 038022ef jal x5,8000b100 + 800090cc: 800090bc .word 0x800090bc + 800090d0: 00000000 .word 0x00000000 + 800090d4: 800205a8 .word 0x800205a8 + 800090d8: 00000000 .word 0x00000000 + 800090dc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xc4c4c4c4c4c4c4c4 + 800090e0: 00033f83 ld x31,0(x6) + 800090e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xc4c4c4c4c4c4c4c4 + 800090e8: 00033403 ld x8,0(x6) + 800090ec: 00830313 addi x6,x6,8 + +00000000800090f0 : +Zknd_aes64dsm_cg_cp_sbox_b196: + aes64dsm x7, x31, x8 # perform operation + 800090f0: 3e8f83b3 aes64dsm x7,x31,x8 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b196, Zknd_aes64dsm_cg_cp_sbox_b196_str) + 800090f4: 0007b203 ld x4,0(x15) + 800090f8: 00720c63 beq x4,x7,80009110 + 800090fc: 004022ef jal x5,8000b100 + 80009100: 800090f0 .word 0x800090f0 + 80009104: 00000000 .word 0x00000000 + 80009108: 800205e2 .word 0x800205e2 + 8000910c: 00000000 .word 0x00000000 + 80009110: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xc5c5c5c5c5c5c5c5 + 80009114: 00033103 ld x2,0(x6) + 80009118: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xc5c5c5c5c5c5c5c5 + 8000911c: 00033f03 ld x30,0(x6) + 80009120: 00830313 addi x6,x6,8 + +0000000080009124 : +Zknd_aes64dsm_cg_cp_sbox_b197: + aes64dsm x23, x2, x30 # perform operation + 80009124: 3fe10bb3 aes64dsm x23,x2,x30 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b197, Zknd_aes64dsm_cg_cp_sbox_b197_str) + 80009128: 0007b203 ld x4,0(x15) + 8000912c: 01720c63 beq x4,x23,80009144 + 80009130: 7d1012ef jal x5,8000b100 + 80009134: 80009124 .word 0x80009124 + 80009138: 00000000 .word 0x00000000 + 8000913c: 8002061c .word 0x8002061c + 80009140: 00000000 .word 0x00000000 + 80009144: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xc6c6c6c6c6c6c6c6 + 80009148: 00033383 ld x7,0(x6) + 8000914c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xc6c6c6c6c6c6c6c6 + 80009150: 00033b83 ld x23,0(x6) + 80009154: 00830313 addi x6,x6,8 + +0000000080009158 : +Zknd_aes64dsm_cg_cp_sbox_b198: + aes64dsm x3, x7, x23 # perform operation + 80009158: 3f7381b3 aes64dsm x3,x7,x23 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b198, Zknd_aes64dsm_cg_cp_sbox_b198_str) + 8000915c: 0007b203 ld x4,0(x15) + 80009160: 00320c63 beq x4,x3,80009178 + 80009164: 79d012ef jal x5,8000b100 + 80009168: 80009158 .word 0x80009158 + 8000916c: 00000000 .word 0x00000000 + 80009170: 80020656 .word 0x80020656 + 80009174: 00000000 .word 0x00000000 + 80009178: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xc7c7c7c7c7c7c7c7 + 8000917c: 00033a83 ld x21,0(x6) + 80009180: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xc7c7c7c7c7c7c7c7 + 80009184: 00033883 ld x17,0(x6) + 80009188: 00830313 addi x6,x6,8 + +000000008000918c : +Zknd_aes64dsm_cg_cp_sbox_b199: + aes64dsm x13, x21, x17 # perform operation + 8000918c: 3f1a86b3 aes64dsm x13,x21,x17 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b199, Zknd_aes64dsm_cg_cp_sbox_b199_str) + 80009190: 0007b203 ld x4,0(x15) + 80009194: 00d20c63 beq x4,x13,800091ac + 80009198: 769012ef jal x5,8000b100 + 8000919c: 8000918c .word 0x8000918c + 800091a0: 00000000 .word 0x00000000 + 800091a4: 80020690 .word 0x80020690 + 800091a8: 00000000 .word 0x00000000 + 800091ac: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xc8c8c8c8c8c8c8c8 + 800091b0: 00033a83 ld x21,0(x6) + 800091b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xc8c8c8c8c8c8c8c8 + 800091b8: 00033f03 ld x30,0(x6) + 800091bc: 00830313 addi x6,x6,8 + +00000000800091c0 : +Zknd_aes64dsm_cg_cp_sbox_b200: + aes64dsm x28, x21, x30 # perform operation + 800091c0: 3fea8e33 aes64dsm x28,x21,x30 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cp_sbox_b200, Zknd_aes64dsm_cg_cp_sbox_b200_str) + 800091c4: 0007b203 ld x4,0(x15) + 800091c8: 01c20c63 beq x4,x28,800091e0 + 800091cc: 735012ef jal x5,8000b100 + 800091d0: 800091c0 .word 0x800091c0 + 800091d4: 00000000 .word 0x00000000 + 800091d8: 800206ca .word 0x800206ca + 800091dc: 00000000 .word 0x00000000 + 800091e0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xc9c9c9c9c9c9c9c9 + 800091e4: 00033a83 ld x21,0(x6) + 800091e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xc9c9c9c9c9c9c9c9 + 800091ec: 00033683 ld x13,0(x6) + 800091f0: 00830313 addi x6,x6,8 + +00000000800091f4 : +Zknd_aes64dsm_cg_cp_sbox_b201: + aes64dsm x25, x21, x13 # perform operation + 800091f4: 3eda8cb3 aes64dsm x25,x21,x13 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b201, Zknd_aes64dsm_cg_cp_sbox_b201_str) + 800091f8: 0007b203 ld x4,0(x15) + 800091fc: 01920c63 beq x4,x25,80009214 + 80009200: 701012ef jal x5,8000b100 + 80009204: 800091f4 .word 0x800091f4 + 80009208: 00000000 .word 0x00000000 + 8000920c: 80020704 .word 0x80020704 + 80009210: 00000000 .word 0x00000000 + 80009214: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xcacacacacacacaca + 80009218: 00033e03 ld x28,0(x6) + 8000921c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xcacacacacacacaca + 80009220: 00033c03 ld x24,0(x6) + 80009224: 00830313 addi x6,x6,8 + +0000000080009228 : +Zknd_aes64dsm_cg_cp_sbox_b202: + aes64dsm x3, x28, x24 # perform operation + 80009228: 3f8e01b3 aes64dsm x3,x28,x24 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b202, Zknd_aes64dsm_cg_cp_sbox_b202_str) + 8000922c: 0007b203 ld x4,0(x15) + 80009230: 00320c63 beq x4,x3,80009248 + 80009234: 6cd012ef jal x5,8000b100 + 80009238: 80009228 .word 0x80009228 + 8000923c: 00000000 .word 0x00000000 + 80009240: 8002073e .word 0x8002073e + 80009244: 00000000 .word 0x00000000 + 80009248: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xcbcbcbcbcbcbcbcb + 8000924c: 00033383 ld x7,0(x6) + 80009250: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xcbcbcbcbcbcbcbcb + 80009254: 00033703 ld x14,0(x6) + 80009258: 00830313 addi x6,x6,8 + +000000008000925c : +Zknd_aes64dsm_cg_cp_sbox_b203: + aes64dsm x13, x7, x14 # perform operation + 8000925c: 3ee386b3 aes64dsm x13,x7,x14 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b203, Zknd_aes64dsm_cg_cp_sbox_b203_str) + 80009260: 0007b203 ld x4,0(x15) + 80009264: 00d20c63 beq x4,x13,8000927c + 80009268: 699012ef jal x5,8000b100 + 8000926c: 8000925c .word 0x8000925c + 80009270: 00000000 .word 0x00000000 + 80009274: 80020778 .word 0x80020778 + 80009278: 00000000 .word 0x00000000 + 8000927c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xcccccccccccccccc + 80009280: 00033983 ld x19,0(x6) + 80009284: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xcccccccccccccccc + 80009288: 00033b83 ld x23,0(x6) + 8000928c: 00830313 addi x6,x6,8 + +0000000080009290 : +Zknd_aes64dsm_cg_cp_sbox_b204: + aes64dsm x11, x19, x23 # perform operation + 80009290: 3f7985b3 aes64dsm x11,x19,x23 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b204, Zknd_aes64dsm_cg_cp_sbox_b204_str) + 80009294: 0007b203 ld x4,0(x15) + 80009298: 00b20c63 beq x4,x11,800092b0 + 8000929c: 665012ef jal x5,8000b100 + 800092a0: 80009290 .word 0x80009290 + 800092a4: 00000000 .word 0x00000000 + 800092a8: 800207b2 .word 0x800207b2 + 800092ac: 00000000 .word 0x00000000 + 800092b0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xcdcdcdcdcdcdcdcd + 800092b4: 00033c83 ld x25,0(x6) + 800092b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xcdcdcdcdcdcdcdcd + 800092bc: 00033e83 ld x29,0(x6) + 800092c0: 00830313 addi x6,x6,8 + +00000000800092c4 : +Zknd_aes64dsm_cg_cp_sbox_b205: + aes64dsm x16, x25, x29 # perform operation + 800092c4: 3fdc8833 aes64dsm x16,x25,x29 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zknd_aes64dsm_cg_cp_sbox_b205, Zknd_aes64dsm_cg_cp_sbox_b205_str) + 800092c8: 0007b203 ld x4,0(x15) + 800092cc: 01020c63 beq x4,x16,800092e4 + 800092d0: 631012ef jal x5,8000b100 + 800092d4: 800092c4 .word 0x800092c4 + 800092d8: 00000000 .word 0x00000000 + 800092dc: 800207ec .word 0x800207ec + 800092e0: 00000000 .word 0x00000000 + 800092e4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xcececececececece + 800092e8: 00033e83 ld x29,0(x6) + 800092ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xcececececececece + 800092f0: 00033103 ld x2,0(x6) + 800092f4: 00830313 addi x6,x6,8 + +00000000800092f8 : +Zknd_aes64dsm_cg_cp_sbox_b206: + aes64dsm x23, x29, x2 # perform operation + 800092f8: 3e2e8bb3 aes64dsm x23,x29,x2 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b206, Zknd_aes64dsm_cg_cp_sbox_b206_str) + 800092fc: 0007b203 ld x4,0(x15) + 80009300: 01720c63 beq x4,x23,80009318 + 80009304: 5fd012ef jal x5,8000b100 + 80009308: 800092f8 .word 0x800092f8 + 8000930c: 00000000 .word 0x00000000 + 80009310: 80020826 .word 0x80020826 + 80009314: 00000000 .word 0x00000000 + 80009318: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xcfcfcfcfcfcfcfcf + 8000931c: 00033183 ld x3,0(x6) + 80009320: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xcfcfcfcfcfcfcfcf + 80009324: 00033a83 ld x21,0(x6) + 80009328: 00830313 addi x6,x6,8 + +000000008000932c : +Zknd_aes64dsm_cg_cp_sbox_b207: + aes64dsm x30, x3, x21 # perform operation + 8000932c: 3f518f33 aes64dsm x30,x3,x21 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b207, Zknd_aes64dsm_cg_cp_sbox_b207_str) + 80009330: 0007b203 ld x4,0(x15) + 80009334: 01e20c63 beq x4,x30,8000934c + 80009338: 5c9012ef jal x5,8000b100 + 8000933c: 8000932c .word 0x8000932c + 80009340: 00000000 .word 0x00000000 + 80009344: 80020860 .word 0x80020860 + 80009348: 00000000 .word 0x00000000 + 8000934c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xd0d0d0d0d0d0d0d0 + 80009350: 00033383 ld x7,0(x6) + 80009354: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xd0d0d0d0d0d0d0d0 + 80009358: 00033c03 ld x24,0(x6) + 8000935c: 00830313 addi x6,x6,8 + +0000000080009360 : +Zknd_aes64dsm_cg_cp_sbox_b208: + aes64dsm x10, x7, x24 # perform operation + 80009360: 3f838533 aes64dsm x10,x7,x24 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b208, Zknd_aes64dsm_cg_cp_sbox_b208_str) + 80009364: 0007b203 ld x4,0(x15) + 80009368: 00a20c63 beq x4,x10,80009380 + 8000936c: 595012ef jal x5,8000b100 + 80009370: 80009360 .word 0x80009360 + 80009374: 00000000 .word 0x00000000 + 80009378: 8002089a .word 0x8002089a + 8000937c: 00000000 .word 0x00000000 + 80009380: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xd1d1d1d1d1d1d1d1 + 80009384: 00033903 ld x18,0(x6) + 80009388: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xd1d1d1d1d1d1d1d1 + 8000938c: 00033383 ld x7,0(x6) + 80009390: 00830313 addi x6,x6,8 + +0000000080009394 : +Zknd_aes64dsm_cg_cp_sbox_b209: + aes64dsm x3, x18, x7 # perform operation + 80009394: 3e7901b3 aes64dsm x3,x18,x7 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zknd_aes64dsm_cg_cp_sbox_b209, Zknd_aes64dsm_cg_cp_sbox_b209_str) + 80009398: 0007b203 ld x4,0(x15) + 8000939c: 00320c63 beq x4,x3,800093b4 + 800093a0: 561012ef jal x5,8000b100 + 800093a4: 80009394 .word 0x80009394 + 800093a8: 00000000 .word 0x00000000 + 800093ac: 800208d4 .word 0x800208d4 + 800093b0: 00000000 .word 0x00000000 + 800093b4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xd2d2d2d2d2d2d2d2 + 800093b8: 00033483 ld x9,0(x6) + 800093bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xd2d2d2d2d2d2d2d2 + 800093c0: 00033d03 ld x26,0(x6) + 800093c4: 00830313 addi x6,x6,8 + +00000000800093c8 : +Zknd_aes64dsm_cg_cp_sbox_b210: + aes64dsm x2, x9, x26 # perform operation + 800093c8: 3fa48133 aes64dsm x2,x9,x26 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zknd_aes64dsm_cg_cp_sbox_b210, Zknd_aes64dsm_cg_cp_sbox_b210_str) + 800093cc: 0007b203 ld x4,0(x15) + 800093d0: 00220c63 beq x4,x2,800093e8 + 800093d4: 52d012ef jal x5,8000b100 + 800093d8: 800093c8 .word 0x800093c8 + 800093dc: 00000000 .word 0x00000000 + 800093e0: 8002090e .word 0x8002090e + 800093e4: 00000000 .word 0x00000000 + 800093e8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xd3d3d3d3d3d3d3d3 + 800093ec: 00033583 ld x11,0(x6) + 800093f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xd3d3d3d3d3d3d3d3 + 800093f4: 00033e83 ld x29,0(x6) + 800093f8: 00830313 addi x6,x6,8 + +00000000800093fc : +Zknd_aes64dsm_cg_cp_sbox_b211: + aes64dsm x1, x11, x29 # perform operation + 800093fc: 3fd580b3 aes64dsm x1,x11,x29 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b211, Zknd_aes64dsm_cg_cp_sbox_b211_str) + 80009400: 0007b203 ld x4,0(x15) + 80009404: 00120c63 beq x4,x1,8000941c + 80009408: 4f9012ef jal x5,8000b100 + 8000940c: 800093fc .word 0x800093fc + 80009410: 00000000 .word 0x00000000 + 80009414: 80020948 .word 0x80020948 + 80009418: 00000000 .word 0x00000000 + 8000941c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xd4d4d4d4d4d4d4d4 + 80009420: 00033c83 ld x25,0(x6) + 80009424: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xd4d4d4d4d4d4d4d4 + 80009428: 00033d03 ld x26,0(x6) + 8000942c: 00830313 addi x6,x6,8 + +0000000080009430 : +Zknd_aes64dsm_cg_cp_sbox_b212: + aes64dsm x12, x25, x26 # perform operation + 80009430: 3fac8633 aes64dsm x12,x25,x26 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b212, Zknd_aes64dsm_cg_cp_sbox_b212_str) + 80009434: 0007b203 ld x4,0(x15) + 80009438: 00c20c63 beq x4,x12,80009450 + 8000943c: 4c5012ef jal x5,8000b100 + 80009440: 80009430 .word 0x80009430 + 80009444: 00000000 .word 0x00000000 + 80009448: 80020982 .word 0x80020982 + 8000944c: 00000000 .word 0x00000000 + 80009450: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xd5d5d5d5d5d5d5d5 + 80009454: 00033903 ld x18,0(x6) + 80009458: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xd5d5d5d5d5d5d5d5 + 8000945c: 00033f03 ld x30,0(x6) + 80009460: 00830313 addi x6,x6,8 + +0000000080009464 : +Zknd_aes64dsm_cg_cp_sbox_b213: + aes64dsm x11, x18, x30 # perform operation + 80009464: 3fe905b3 aes64dsm x11,x18,x30 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b213, Zknd_aes64dsm_cg_cp_sbox_b213_str) + 80009468: 0007b203 ld x4,0(x15) + 8000946c: 00b20c63 beq x4,x11,80009484 + 80009470: 491012ef jal x5,8000b100 + 80009474: 80009464 .word 0x80009464 + 80009478: 00000000 .word 0x00000000 + 8000947c: 800209bc .word 0x800209bc + 80009480: 00000000 .word 0x00000000 + 80009484: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xd6d6d6d6d6d6d6d6 + 80009488: 00033383 ld x7,0(x6) + 8000948c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xd6d6d6d6d6d6d6d6 + 80009490: 00033183 ld x3,0(x6) + 80009494: 00830313 addi x6,x6,8 + +0000000080009498 : +Zknd_aes64dsm_cg_cp_sbox_b214: + aes64dsm x1, x7, x3 # perform operation + 80009498: 3e3380b3 aes64dsm x1,x7,x3 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zknd_aes64dsm_cg_cp_sbox_b214, Zknd_aes64dsm_cg_cp_sbox_b214_str) + 8000949c: 0007b203 ld x4,0(x15) + 800094a0: 00120c63 beq x4,x1,800094b8 + 800094a4: 45d012ef jal x5,8000b100 + 800094a8: 80009498 .word 0x80009498 + 800094ac: 00000000 .word 0x00000000 + 800094b0: 800209f6 .word 0x800209f6 + 800094b4: 00000000 .word 0x00000000 + 800094b8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xd7d7d7d7d7d7d7d7 + 800094bc: 00033103 ld x2,0(x6) + 800094c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xd7d7d7d7d7d7d7d7 + 800094c4: 00033e03 ld x28,0(x6) + 800094c8: 00830313 addi x6,x6,8 + +00000000800094cc : +Zknd_aes64dsm_cg_cp_sbox_b215: + aes64dsm x11, x2, x28 # perform operation + 800094cc: 3fc105b3 aes64dsm x11,x2,x28 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b215, Zknd_aes64dsm_cg_cp_sbox_b215_str) + 800094d0: 0007b203 ld x4,0(x15) + 800094d4: 00b20c63 beq x4,x11,800094ec + 800094d8: 429012ef jal x5,8000b100 + 800094dc: 800094cc .word 0x800094cc + 800094e0: 00000000 .word 0x00000000 + 800094e4: 80020a30 .word 0x80020a30 + 800094e8: 00000000 .word 0x00000000 + 800094ec: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xd8d8d8d8d8d8d8d8 + 800094f0: 00033603 ld x12,0(x6) + 800094f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xd8d8d8d8d8d8d8d8 + 800094f8: 00033803 ld x16,0(x6) + 800094fc: 00830313 addi x6,x6,8 + +0000000080009500 : +Zknd_aes64dsm_cg_cp_sbox_b216: + aes64dsm x10, x12, x16 # perform operation + 80009500: 3f060533 aes64dsm x10,x12,x16 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b216, Zknd_aes64dsm_cg_cp_sbox_b216_str) + 80009504: 0007b203 ld x4,0(x15) + 80009508: 00a20c63 beq x4,x10,80009520 + 8000950c: 3f5012ef jal x5,8000b100 + 80009510: 80009500 .word 0x80009500 + 80009514: 00000000 .word 0x00000000 + 80009518: 80020a6a .word 0x80020a6a + 8000951c: 00000000 .word 0x00000000 + 80009520: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xd9d9d9d9d9d9d9d9 + 80009524: 00033803 ld x16,0(x6) + 80009528: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xd9d9d9d9d9d9d9d9 + 8000952c: 00033503 ld x10,0(x6) + 80009530: 00830313 addi x6,x6,8 + +0000000080009534 : +Zknd_aes64dsm_cg_cp_sbox_b217: + aes64dsm x23, x16, x10 # perform operation + 80009534: 3ea80bb3 aes64dsm x23,x16,x10 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b217, Zknd_aes64dsm_cg_cp_sbox_b217_str) + 80009538: 0007b203 ld x4,0(x15) + 8000953c: 01720c63 beq x4,x23,80009554 + 80009540: 3c1012ef jal x5,8000b100 + 80009544: 80009534 .word 0x80009534 + 80009548: 00000000 .word 0x00000000 + 8000954c: 80020aa4 .word 0x80020aa4 + 80009550: 00000000 .word 0x00000000 + 80009554: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xdadadadadadadada + 80009558: 00033103 ld x2,0(x6) + 8000955c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xdadadadadadadada + 80009560: 00033903 ld x18,0(x6) + 80009564: 00830313 addi x6,x6,8 + +0000000080009568 : +Zknd_aes64dsm_cg_cp_sbox_b218: + aes64dsm x30, x2, x18 # perform operation + 80009568: 3f210f33 aes64dsm x30,x2,x18 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64dsm_cg_cp_sbox_b218, Zknd_aes64dsm_cg_cp_sbox_b218_str) + 8000956c: 0007b203 ld x4,0(x15) + 80009570: 01e20c63 beq x4,x30,80009588 + 80009574: 38d012ef jal x5,8000b100 + 80009578: 80009568 .word 0x80009568 + 8000957c: 00000000 .word 0x00000000 + 80009580: 80020ade .word 0x80020ade + 80009584: 00000000 .word 0x00000000 + 80009588: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xdbdbdbdbdbdbdbdb + 8000958c: 00033f03 ld x30,0(x6) + 80009590: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xdbdbdbdbdbdbdbdb + 80009594: 00033e83 ld x29,0(x6) + 80009598: 00830313 addi x6,x6,8 + +000000008000959c : +Zknd_aes64dsm_cg_cp_sbox_b219: + aes64dsm x7, x30, x29 # perform operation + 8000959c: 3fdf03b3 aes64dsm x7,x30,x29 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b219, Zknd_aes64dsm_cg_cp_sbox_b219_str) + 800095a0: 0007b203 ld x4,0(x15) + 800095a4: 00720c63 beq x4,x7,800095bc + 800095a8: 359012ef jal x5,8000b100 + 800095ac: 8000959c .word 0x8000959c + 800095b0: 00000000 .word 0x00000000 + 800095b4: 80020b18 .word 0x80020b18 + 800095b8: 00000000 .word 0x00000000 + 800095bc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xdcdcdcdcdcdcdcdc + 800095c0: 00033e03 ld x28,0(x6) + 800095c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xdcdcdcdcdcdcdcdc + 800095c8: 00033903 ld x18,0(x6) + 800095cc: 00830313 addi x6,x6,8 + +00000000800095d0 : +Zknd_aes64dsm_cg_cp_sbox_b220: + aes64dsm x9, x28, x18 # perform operation + 800095d0: 3f2e04b3 aes64dsm x9,x28,x18 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknd_aes64dsm_cg_cp_sbox_b220, Zknd_aes64dsm_cg_cp_sbox_b220_str) + 800095d4: 0007b203 ld x4,0(x15) + 800095d8: 00920c63 beq x4,x9,800095f0 + 800095dc: 325012ef jal x5,8000b100 + 800095e0: 800095d0 .word 0x800095d0 + 800095e4: 00000000 .word 0x00000000 + 800095e8: 80020b52 .word 0x80020b52 + 800095ec: 00000000 .word 0x00000000 + 800095f0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xdddddddddddddddd + 800095f4: 00033c03 ld x24,0(x6) + 800095f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xdddddddddddddddd + 800095fc: 00033383 ld x7,0(x6) + 80009600: 00830313 addi x6,x6,8 + +0000000080009604 : +Zknd_aes64dsm_cg_cp_sbox_b221: + aes64dsm x25, x24, x7 # perform operation + 80009604: 3e7c0cb3 aes64dsm x25,x24,x7 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b221, Zknd_aes64dsm_cg_cp_sbox_b221_str) + 80009608: 0007b203 ld x4,0(x15) + 8000960c: 01920c63 beq x4,x25,80009624 + 80009610: 2f1012ef jal x5,8000b100 + 80009614: 80009604 .word 0x80009604 + 80009618: 00000000 .word 0x00000000 + 8000961c: 80020b8c .word 0x80020b8c + 80009620: 00000000 .word 0x00000000 + 80009624: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xdededededededede + 80009628: 00033583 ld x11,0(x6) + 8000962c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xdededededededede + 80009630: 00033383 ld x7,0(x6) + 80009634: 00830313 addi x6,x6,8 + +0000000080009638 : +Zknd_aes64dsm_cg_cp_sbox_b222: + aes64dsm x24, x11, x7 # perform operation + 80009638: 3e758c33 aes64dsm x24,x11,x7 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64dsm_cg_cp_sbox_b222, Zknd_aes64dsm_cg_cp_sbox_b222_str) + 8000963c: 0007b203 ld x4,0(x15) + 80009640: 01820c63 beq x4,x24,80009658 + 80009644: 2bd012ef jal x5,8000b100 + 80009648: 80009638 .word 0x80009638 + 8000964c: 00000000 .word 0x00000000 + 80009650: 80020bc6 .word 0x80020bc6 + 80009654: 00000000 .word 0x00000000 + 80009658: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xdfdfdfdfdfdfdfdf + 8000965c: 00033983 ld x19,0(x6) + 80009660: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xdfdfdfdfdfdfdfdf + 80009664: 00033a83 ld x21,0(x6) + 80009668: 00830313 addi x6,x6,8 + +000000008000966c : +Zknd_aes64dsm_cg_cp_sbox_b223: + aes64dsm x28, x19, x21 # perform operation + 8000966c: 3f598e33 aes64dsm x28,x19,x21 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64dsm_cg_cp_sbox_b223, Zknd_aes64dsm_cg_cp_sbox_b223_str) + 80009670: 0007b203 ld x4,0(x15) + 80009674: 01c20c63 beq x4,x28,8000968c + 80009678: 289012ef jal x5,8000b100 + 8000967c: 8000966c .word 0x8000966c + 80009680: 00000000 .word 0x00000000 + 80009684: 80020c00 .word 0x80020c00 + 80009688: 00000000 .word 0x00000000 + 8000968c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xe0e0e0e0e0e0e0e0 + 80009690: 00033a03 ld x20,0(x6) + 80009694: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xe0e0e0e0e0e0e0e0 + 80009698: 00033703 ld x14,0(x6) + 8000969c: 00830313 addi x6,x6,8 + +00000000800096a0 : +Zknd_aes64dsm_cg_cp_sbox_b224: + aes64dsm x31, x20, x14 # perform operation + 800096a0: 3eea0fb3 aes64dsm x31,x20,x14 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b224, Zknd_aes64dsm_cg_cp_sbox_b224_str) + 800096a4: 0007b203 ld x4,0(x15) + 800096a8: 01f20c63 beq x4,x31,800096c0 + 800096ac: 255012ef jal x5,8000b100 + 800096b0: 800096a0 .word 0x800096a0 + 800096b4: 00000000 .word 0x00000000 + 800096b8: 80020c3a .word 0x80020c3a + 800096bc: 00000000 .word 0x00000000 + 800096c0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xe1e1e1e1e1e1e1e1 + 800096c4: 00033e83 ld x29,0(x6) + 800096c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xe1e1e1e1e1e1e1e1 + 800096cc: 00033a83 ld x21,0(x6) + 800096d0: 00830313 addi x6,x6,8 + +00000000800096d4 : +Zknd_aes64dsm_cg_cp_sbox_b225: + aes64dsm x8, x29, x21 # perform operation + 800096d4: 3f5e8433 aes64dsm x8,x29,x21 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b225, Zknd_aes64dsm_cg_cp_sbox_b225_str) + 800096d8: 0007b203 ld x4,0(x15) + 800096dc: 00820c63 beq x4,x8,800096f4 + 800096e0: 221012ef jal x5,8000b100 + 800096e4: 800096d4 .word 0x800096d4 + 800096e8: 00000000 .word 0x00000000 + 800096ec: 80020c74 .word 0x80020c74 + 800096f0: 00000000 .word 0x00000000 + 800096f4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xe2e2e2e2e2e2e2e2 + 800096f8: 00033a03 ld x20,0(x6) + 800096fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xe2e2e2e2e2e2e2e2 + 80009700: 00033b03 ld x22,0(x6) + 80009704: 00830313 addi x6,x6,8 + +0000000080009708 : +Zknd_aes64dsm_cg_cp_sbox_b226: + aes64dsm x26, x20, x22 # perform operation + 80009708: 3f6a0d33 aes64dsm x26,x20,x22 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64dsm_cg_cp_sbox_b226, Zknd_aes64dsm_cg_cp_sbox_b226_str) + 8000970c: 0007b203 ld x4,0(x15) + 80009710: 01a20c63 beq x4,x26,80009728 + 80009714: 1ed012ef jal x5,8000b100 + 80009718: 80009708 .word 0x80009708 + 8000971c: 00000000 .word 0x00000000 + 80009720: 80020cae .word 0x80020cae + 80009724: 00000000 .word 0x00000000 + 80009728: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xe3e3e3e3e3e3e3e3 + 8000972c: 00033c83 ld x25,0(x6) + 80009730: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xe3e3e3e3e3e3e3e3 + 80009734: 00033f83 ld x31,0(x6) + 80009738: 00830313 addi x6,x6,8 + +000000008000973c : +Zknd_aes64dsm_cg_cp_sbox_b227: + aes64dsm x13, x25, x31 # perform operation + 8000973c: 3ffc86b3 aes64dsm x13,x25,x31 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b227, Zknd_aes64dsm_cg_cp_sbox_b227_str) + 80009740: 0007b203 ld x4,0(x15) + 80009744: 00d20c63 beq x4,x13,8000975c + 80009748: 1b9012ef jal x5,8000b100 + 8000974c: 8000973c .word 0x8000973c + 80009750: 00000000 .word 0x00000000 + 80009754: 80020ce8 .word 0x80020ce8 + 80009758: 00000000 .word 0x00000000 + 8000975c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xe4e4e4e4e4e4e4e4 + 80009760: 00033f03 ld x30,0(x6) + 80009764: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xe4e4e4e4e4e4e4e4 + 80009768: 00033603 ld x12,0(x6) + 8000976c: 00830313 addi x6,x6,8 + +0000000080009770 : +Zknd_aes64dsm_cg_cp_sbox_b228: + aes64dsm x27, x30, x12 # perform operation + 80009770: 3ecf0db3 aes64dsm x27,x30,x12 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64dsm_cg_cp_sbox_b228, Zknd_aes64dsm_cg_cp_sbox_b228_str) + 80009774: 0007b203 ld x4,0(x15) + 80009778: 01b20c63 beq x4,x27,80009790 + 8000977c: 185012ef jal x5,8000b100 + 80009780: 80009770 .word 0x80009770 + 80009784: 00000000 .word 0x00000000 + 80009788: 80020d22 .word 0x80020d22 + 8000978c: 00000000 .word 0x00000000 + 80009790: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xe5e5e5e5e5e5e5e5 + 80009794: 00033f03 ld x30,0(x6) + 80009798: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xe5e5e5e5e5e5e5e5 + 8000979c: 00033c03 ld x24,0(x6) + 800097a0: 00830313 addi x6,x6,8 + +00000000800097a4 : +Zknd_aes64dsm_cg_cp_sbox_b229: + aes64dsm x17, x30, x24 # perform operation + 800097a4: 3f8f08b3 aes64dsm x17,x30,x24 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b229, Zknd_aes64dsm_cg_cp_sbox_b229_str) + 800097a8: 0007b203 ld x4,0(x15) + 800097ac: 01120c63 beq x4,x17,800097c4 + 800097b0: 151012ef jal x5,8000b100 + 800097b4: 800097a4 .word 0x800097a4 + 800097b8: 00000000 .word 0x00000000 + 800097bc: 80020d5c .word 0x80020d5c + 800097c0: 00000000 .word 0x00000000 + 800097c4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xe6e6e6e6e6e6e6e6 + 800097c8: 00033803 ld x16,0(x6) + 800097cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xe6e6e6e6e6e6e6e6 + 800097d0: 00033e83 ld x29,0(x6) + 800097d4: 00830313 addi x6,x6,8 + +00000000800097d8 : +Zknd_aes64dsm_cg_cp_sbox_b230: + aes64dsm x8, x16, x29 # perform operation + 800097d8: 3fd80433 aes64dsm x8,x16,x29 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b230, Zknd_aes64dsm_cg_cp_sbox_b230_str) + 800097dc: 0007b203 ld x4,0(x15) + 800097e0: 00820c63 beq x4,x8,800097f8 + 800097e4: 11d012ef jal x5,8000b100 + 800097e8: 800097d8 .word 0x800097d8 + 800097ec: 00000000 .word 0x00000000 + 800097f0: 80020d96 .word 0x80020d96 + 800097f4: 00000000 .word 0x00000000 + 800097f8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xe7e7e7e7e7e7e7e7 + 800097fc: 00033603 ld x12,0(x6) + 80009800: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xe7e7e7e7e7e7e7e7 + 80009804: 00033383 ld x7,0(x6) + 80009808: 00830313 addi x6,x6,8 + +000000008000980c : +Zknd_aes64dsm_cg_cp_sbox_b231: + aes64dsm x8, x12, x7 # perform operation + 8000980c: 3e760433 aes64dsm x8,x12,x7 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b231, Zknd_aes64dsm_cg_cp_sbox_b231_str) + 80009810: 0007b203 ld x4,0(x15) + 80009814: 00820c63 beq x4,x8,8000982c + 80009818: 0e9012ef jal x5,8000b100 + 8000981c: 8000980c .word 0x8000980c + 80009820: 00000000 .word 0x00000000 + 80009824: 80020dd0 .word 0x80020dd0 + 80009828: 00000000 .word 0x00000000 + 8000982c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xe8e8e8e8e8e8e8e8 + 80009830: 00033b03 ld x22,0(x6) + 80009834: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xe8e8e8e8e8e8e8e8 + 80009838: 00033983 ld x19,0(x6) + 8000983c: 00830313 addi x6,x6,8 + +0000000080009840 : +Zknd_aes64dsm_cg_cp_sbox_b232: + aes64dsm x25, x22, x19 # perform operation + 80009840: 3f3b0cb3 aes64dsm x25,x22,x19 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b232, Zknd_aes64dsm_cg_cp_sbox_b232_str) + 80009844: 0007b203 ld x4,0(x15) + 80009848: 01920c63 beq x4,x25,80009860 + 8000984c: 0b5012ef jal x5,8000b100 + 80009850: 80009840 .word 0x80009840 + 80009854: 00000000 .word 0x00000000 + 80009858: 80020e0a .word 0x80020e0a + 8000985c: 00000000 .word 0x00000000 + 80009860: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xe9e9e9e9e9e9e9e9 + 80009864: 00033d83 ld x27,0(x6) + 80009868: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xe9e9e9e9e9e9e9e9 + 8000986c: 00033083 ld x1,0(x6) + 80009870: 00830313 addi x6,x6,8 + +0000000080009874 : +Zknd_aes64dsm_cg_cp_sbox_b233: + aes64dsm x12, x27, x1 # perform operation + 80009874: 3e1d8633 aes64dsm x12,x27,x1 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknd_aes64dsm_cg_cp_sbox_b233, Zknd_aes64dsm_cg_cp_sbox_b233_str) + 80009878: 0007b203 ld x4,0(x15) + 8000987c: 00c20c63 beq x4,x12,80009894 + 80009880: 081012ef jal x5,8000b100 + 80009884: 80009874 .word 0x80009874 + 80009888: 00000000 .word 0x00000000 + 8000988c: 80020e44 .word 0x80020e44 + 80009890: 00000000 .word 0x00000000 + 80009894: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xeaeaeaeaeaeaeaea + 80009898: 00033a83 ld x21,0(x6) + 8000989c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xeaeaeaeaeaeaeaea + 800098a0: 00033403 ld x8,0(x6) + 800098a4: 00830313 addi x6,x6,8 + +00000000800098a8 : +Zknd_aes64dsm_cg_cp_sbox_b234: + aes64dsm x23, x21, x8 # perform operation + 800098a8: 3e8a8bb3 aes64dsm x23,x21,x8 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b234, Zknd_aes64dsm_cg_cp_sbox_b234_str) + 800098ac: 0007b203 ld x4,0(x15) + 800098b0: 01720c63 beq x4,x23,800098c8 + 800098b4: 04d012ef jal x5,8000b100 + 800098b8: 800098a8 .word 0x800098a8 + 800098bc: 00000000 .word 0x00000000 + 800098c0: 80020e7e .word 0x80020e7e + 800098c4: 00000000 .word 0x00000000 + 800098c8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xebebebebebebebeb + 800098cc: 00033683 ld x13,0(x6) + 800098d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xebebebebebebebeb + 800098d4: 00033b03 ld x22,0(x6) + 800098d8: 00830313 addi x6,x6,8 + +00000000800098dc : +Zknd_aes64dsm_cg_cp_sbox_b235: + aes64dsm x10, x13, x22 # perform operation + 800098dc: 3f668533 aes64dsm x10,x13,x22 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b235, Zknd_aes64dsm_cg_cp_sbox_b235_str) + 800098e0: 0007b203 ld x4,0(x15) + 800098e4: 00a20c63 beq x4,x10,800098fc + 800098e8: 019012ef jal x5,8000b100 + 800098ec: 800098dc .word 0x800098dc + 800098f0: 00000000 .word 0x00000000 + 800098f4: 80020eb8 .word 0x80020eb8 + 800098f8: 00000000 .word 0x00000000 + 800098fc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xecececececececec + 80009900: 00033383 ld x7,0(x6) + 80009904: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xecececececececec + 80009908: 00033b83 ld x23,0(x6) + 8000990c: 00830313 addi x6,x6,8 + +0000000080009910 : +Zknd_aes64dsm_cg_cp_sbox_b236: + aes64dsm x19, x7, x23 # perform operation + 80009910: 3f7389b3 aes64dsm x19,x7,x23 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b236, Zknd_aes64dsm_cg_cp_sbox_b236_str) + 80009914: 0007b203 ld x4,0(x15) + 80009918: 01320c63 beq x4,x19,80009930 + 8000991c: 7e4012ef jal x5,8000b100 + 80009920: 80009910 .word 0x80009910 + 80009924: 00000000 .word 0x00000000 + 80009928: 80020ef2 .word 0x80020ef2 + 8000992c: 00000000 .word 0x00000000 + 80009930: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xedededededededed + 80009934: 00033083 ld x1,0(x6) + 80009938: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xedededededededed + 8000993c: 00033683 ld x13,0(x6) + 80009940: 00830313 addi x6,x6,8 + +0000000080009944 : +Zknd_aes64dsm_cg_cp_sbox_b237: + aes64dsm x7, x1, x13 # perform operation + 80009944: 3ed083b3 aes64dsm x7,x1,x13 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b237, Zknd_aes64dsm_cg_cp_sbox_b237_str) + 80009948: 0007b203 ld x4,0(x15) + 8000994c: 00720c63 beq x4,x7,80009964 + 80009950: 7b0012ef jal x5,8000b100 + 80009954: 80009944 .word 0x80009944 + 80009958: 00000000 .word 0x00000000 + 8000995c: 80020f2c .word 0x80020f2c + 80009960: 00000000 .word 0x00000000 + 80009964: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xeeeeeeeeeeeeeeee + 80009968: 00033903 ld x18,0(x6) + 8000996c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xeeeeeeeeeeeeeeee + 80009970: 00033e83 ld x29,0(x6) + 80009974: 00830313 addi x6,x6,8 + +0000000080009978 : +Zknd_aes64dsm_cg_cp_sbox_b238: + aes64dsm x8, x18, x29 # perform operation + 80009978: 3fd90433 aes64dsm x8,x18,x29 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknd_aes64dsm_cg_cp_sbox_b238, Zknd_aes64dsm_cg_cp_sbox_b238_str) + 8000997c: 0007b203 ld x4,0(x15) + 80009980: 00820c63 beq x4,x8,80009998 + 80009984: 77c012ef jal x5,8000b100 + 80009988: 80009978 .word 0x80009978 + 8000998c: 00000000 .word 0x00000000 + 80009990: 80020f66 .word 0x80020f66 + 80009994: 00000000 .word 0x00000000 + 80009998: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xefefefefefefefef + 8000999c: 00033483 ld x9,0(x6) + 800099a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xefefefefefefefef + 800099a4: 00033c03 ld x24,0(x6) + 800099a8: 00830313 addi x6,x6,8 + +00000000800099ac : +Zknd_aes64dsm_cg_cp_sbox_b239: + aes64dsm x14, x9, x24 # perform operation + 800099ac: 3f848733 aes64dsm x14,x9,x24 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b239, Zknd_aes64dsm_cg_cp_sbox_b239_str) + 800099b0: 0007b203 ld x4,0(x15) + 800099b4: 00e20c63 beq x4,x14,800099cc + 800099b8: 748012ef jal x5,8000b100 + 800099bc: 800099ac .word 0x800099ac + 800099c0: 00000000 .word 0x00000000 + 800099c4: 80020fa0 .word 0x80020fa0 + 800099c8: 00000000 .word 0x00000000 + 800099cc: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xf0f0f0f0f0f0f0f0 + 800099d0: 00033c83 ld x25,0(x6) + 800099d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xf0f0f0f0f0f0f0f0 + 800099d8: 00033983 ld x19,0(x6) + 800099dc: 00830313 addi x6,x6,8 + +00000000800099e0 : +Zknd_aes64dsm_cg_cp_sbox_b240: + aes64dsm x13, x25, x19 # perform operation + 800099e0: 3f3c86b3 aes64dsm x13,x25,x19 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknd_aes64dsm_cg_cp_sbox_b240, Zknd_aes64dsm_cg_cp_sbox_b240_str) + 800099e4: 0007b203 ld x4,0(x15) + 800099e8: 00d20c63 beq x4,x13,80009a00 + 800099ec: 714012ef jal x5,8000b100 + 800099f0: 800099e0 .word 0x800099e0 + 800099f4: 00000000 .word 0x00000000 + 800099f8: 80020fda .word 0x80020fda + 800099fc: 00000000 .word 0x00000000 + 80009a00: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xf1f1f1f1f1f1f1f1 + 80009a04: 00033e83 ld x29,0(x6) + 80009a08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xf1f1f1f1f1f1f1f1 + 80009a0c: 00033f83 ld x31,0(x6) + 80009a10: 00830313 addi x6,x6,8 + +0000000080009a14 : +Zknd_aes64dsm_cg_cp_sbox_b241: + aes64dsm x17, x29, x31 # perform operation + 80009a14: 3ffe88b3 aes64dsm x17,x29,x31 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zknd_aes64dsm_cg_cp_sbox_b241, Zknd_aes64dsm_cg_cp_sbox_b241_str) + 80009a18: 0007b203 ld x4,0(x15) + 80009a1c: 01120c63 beq x4,x17,80009a34 + 80009a20: 6e0012ef jal x5,8000b100 + 80009a24: 80009a14 .word 0x80009a14 + 80009a28: 00000000 .word 0x00000000 + 80009a2c: 80021014 .word 0x80021014 + 80009a30: 00000000 .word 0x00000000 + 80009a34: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xf2f2f2f2f2f2f2f2 + 80009a38: 00033a83 ld x21,0(x6) + 80009a3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xf2f2f2f2f2f2f2f2 + 80009a40: 00033603 ld x12,0(x6) + 80009a44: 00830313 addi x6,x6,8 + +0000000080009a48 : +Zknd_aes64dsm_cg_cp_sbox_b242: + aes64dsm x14, x21, x12 # perform operation + 80009a48: 3eca8733 aes64dsm x14,x21,x12 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b242, Zknd_aes64dsm_cg_cp_sbox_b242_str) + 80009a4c: 0007b203 ld x4,0(x15) + 80009a50: 00e20c63 beq x4,x14,80009a68 + 80009a54: 6ac012ef jal x5,8000b100 + 80009a58: 80009a48 .word 0x80009a48 + 80009a5c: 00000000 .word 0x00000000 + 80009a60: 8002104e .word 0x8002104e + 80009a64: 00000000 .word 0x00000000 + 80009a68: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xf3f3f3f3f3f3f3f3 + 80009a6c: 00033903 ld x18,0(x6) + 80009a70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xf3f3f3f3f3f3f3f3 + 80009a74: 00033503 ld x10,0(x6) + 80009a78: 00830313 addi x6,x6,8 + +0000000080009a7c : +Zknd_aes64dsm_cg_cp_sbox_b243: + aes64dsm x14, x18, x10 # perform operation + 80009a7c: 3ea90733 aes64dsm x14,x18,x10 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknd_aes64dsm_cg_cp_sbox_b243, Zknd_aes64dsm_cg_cp_sbox_b243_str) + 80009a80: 0007b203 ld x4,0(x15) + 80009a84: 00e20c63 beq x4,x14,80009a9c + 80009a88: 678012ef jal x5,8000b100 + 80009a8c: 80009a7c .word 0x80009a7c + 80009a90: 00000000 .word 0x00000000 + 80009a94: 80021088 .word 0x80021088 + 80009a98: 00000000 .word 0x00000000 + 80009a9c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xf4f4f4f4f4f4f4f4 + 80009aa0: 00033b83 ld x23,0(x6) + 80009aa4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xf4f4f4f4f4f4f4f4 + 80009aa8: 00033b03 ld x22,0(x6) + 80009aac: 00830313 addi x6,x6,8 + +0000000080009ab0 : +Zknd_aes64dsm_cg_cp_sbox_b244: + aes64dsm x31, x23, x22 # perform operation + 80009ab0: 3f6b8fb3 aes64dsm x31,x23,x22 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64dsm_cg_cp_sbox_b244, Zknd_aes64dsm_cg_cp_sbox_b244_str) + 80009ab4: 0007b203 ld x4,0(x15) + 80009ab8: 01f20c63 beq x4,x31,80009ad0 + 80009abc: 644012ef jal x5,8000b100 + 80009ac0: 80009ab0 .word 0x80009ab0 + 80009ac4: 00000000 .word 0x00000000 + 80009ac8: 800210c2 .word 0x800210c2 + 80009acc: 00000000 .word 0x00000000 + 80009ad0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xf5f5f5f5f5f5f5f5 + 80009ad4: 00033103 ld x2,0(x6) + 80009ad8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xf5f5f5f5f5f5f5f5 + 80009adc: 00033603 ld x12,0(x6) + 80009ae0: 00830313 addi x6,x6,8 + +0000000080009ae4 : +Zknd_aes64dsm_cg_cp_sbox_b245: + aes64dsm x25, x2, x12 # perform operation + 80009ae4: 3ec10cb3 aes64dsm x25,x2,x12 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64dsm_cg_cp_sbox_b245, Zknd_aes64dsm_cg_cp_sbox_b245_str) + 80009ae8: 0007b203 ld x4,0(x15) + 80009aec: 01920c63 beq x4,x25,80009b04 + 80009af0: 610012ef jal x5,8000b100 + 80009af4: 80009ae4 .word 0x80009ae4 + 80009af8: 00000000 .word 0x00000000 + 80009afc: 800210fc .word 0x800210fc + 80009b00: 00000000 .word 0x00000000 + 80009b04: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xf6f6f6f6f6f6f6f6 + 80009b08: 00033383 ld x7,0(x6) + 80009b0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xf6f6f6f6f6f6f6f6 + 80009b10: 00033e83 ld x29,0(x6) + 80009b14: 00830313 addi x6,x6,8 + +0000000080009b18 : +Zknd_aes64dsm_cg_cp_sbox_b246: + aes64dsm x10, x7, x29 # perform operation + 80009b18: 3fd38533 aes64dsm x10,x7,x29 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b246, Zknd_aes64dsm_cg_cp_sbox_b246_str) + 80009b1c: 0007b203 ld x4,0(x15) + 80009b20: 00a20c63 beq x4,x10,80009b38 + 80009b24: 5dc012ef jal x5,8000b100 + 80009b28: 80009b18 .word 0x80009b18 + 80009b2c: 00000000 .word 0x00000000 + 80009b30: 80021136 .word 0x80021136 + 80009b34: 00000000 .word 0x00000000 + 80009b38: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xf7f7f7f7f7f7f7f7 + 80009b3c: 00033a03 ld x20,0(x6) + 80009b40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xf7f7f7f7f7f7f7f7 + 80009b44: 00033183 ld x3,0(x6) + 80009b48: 00830313 addi x6,x6,8 + +0000000080009b4c : +Zknd_aes64dsm_cg_cp_sbox_b247: + aes64dsm x7, x20, x3 # perform operation + 80009b4c: 3e3a03b3 aes64dsm x7,x20,x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b247, Zknd_aes64dsm_cg_cp_sbox_b247_str) + 80009b50: 0007b203 ld x4,0(x15) + 80009b54: 00720c63 beq x4,x7,80009b6c + 80009b58: 5a8012ef jal x5,8000b100 + 80009b5c: 80009b4c .word 0x80009b4c + 80009b60: 00000000 .word 0x00000000 + 80009b64: 80021170 .word 0x80021170 + 80009b68: 00000000 .word 0x00000000 + 80009b6c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xf8f8f8f8f8f8f8f8 + 80009b70: 00033383 ld x7,0(x6) + 80009b74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xf8f8f8f8f8f8f8f8 + 80009b78: 00033e83 ld x29,0(x6) + 80009b7c: 00830313 addi x6,x6,8 + +0000000080009b80 : +Zknd_aes64dsm_cg_cp_sbox_b248: + aes64dsm x23, x7, x29 # perform operation + 80009b80: 3fd38bb3 aes64dsm x23,x7,x29 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64dsm_cg_cp_sbox_b248, Zknd_aes64dsm_cg_cp_sbox_b248_str) + 80009b84: 0007b203 ld x4,0(x15) + 80009b88: 01720c63 beq x4,x23,80009ba0 + 80009b8c: 574012ef jal x5,8000b100 + 80009b90: 80009b80 .word 0x80009b80 + 80009b94: 00000000 .word 0x00000000 + 80009b98: 800211aa .word 0x800211aa + 80009b9c: 00000000 .word 0x00000000 + 80009ba0: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xf9f9f9f9f9f9f9f9 + 80009ba4: 00033483 ld x9,0(x6) + 80009ba8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xf9f9f9f9f9f9f9f9 + 80009bac: 00033903 ld x18,0(x6) + 80009bb0: 00830313 addi x6,x6,8 + +0000000080009bb4 : +Zknd_aes64dsm_cg_cp_sbox_b249: + aes64dsm x19, x9, x18 # perform operation + 80009bb4: 3f2489b3 aes64dsm x19,x9,x18 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zknd_aes64dsm_cg_cp_sbox_b249, Zknd_aes64dsm_cg_cp_sbox_b249_str) + 80009bb8: 0007b203 ld x4,0(x15) + 80009bbc: 01320c63 beq x4,x19,80009bd4 + 80009bc0: 540012ef jal x5,8000b100 + 80009bc4: 80009bb4 .word 0x80009bb4 + 80009bc8: 00000000 .word 0x00000000 + 80009bcc: 800211e4 .word 0x800211e4 + 80009bd0: 00000000 .word 0x00000000 + 80009bd4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfafafafafafafafa + 80009bd8: 00033d03 ld x26,0(x6) + 80009bdc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xfafafafafafafafa + 80009be0: 00033803 ld x16,0(x6) + 80009be4: 00830313 addi x6,x6,8 + +0000000080009be8 : +Zknd_aes64dsm_cg_cp_sbox_b250: + aes64dsm x11, x26, x16 # perform operation + 80009be8: 3f0d05b3 aes64dsm x11,x26,x16 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknd_aes64dsm_cg_cp_sbox_b250, Zknd_aes64dsm_cg_cp_sbox_b250_str) + 80009bec: 0007b203 ld x4,0(x15) + 80009bf0: 00b20c63 beq x4,x11,80009c08 + 80009bf4: 50c012ef jal x5,8000b100 + 80009bf8: 80009be8 .word 0x80009be8 + 80009bfc: 00000000 .word 0x00000000 + 80009c00: 8002121e .word 0x8002121e + 80009c04: 00000000 .word 0x00000000 + 80009c08: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xfbfbfbfbfbfbfbfb + 80009c0c: 00033883 ld x17,0(x6) + 80009c10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xfbfbfbfbfbfbfbfb + 80009c14: 00033803 ld x16,0(x6) + 80009c18: 00830313 addi x6,x6,8 + +0000000080009c1c : +Zknd_aes64dsm_cg_cp_sbox_b251: + aes64dsm x21, x17, x16 # perform operation + 80009c1c: 3f088ab3 aes64dsm x21,x17,x16 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zknd_aes64dsm_cg_cp_sbox_b251, Zknd_aes64dsm_cg_cp_sbox_b251_str) + 80009c20: 0007b203 ld x4,0(x15) + 80009c24: 01520c63 beq x4,x21,80009c3c + 80009c28: 4d8012ef jal x5,8000b100 + 80009c2c: 80009c1c .word 0x80009c1c + 80009c30: 00000000 .word 0x00000000 + 80009c34: 80021258 .word 0x80021258 + 80009c38: 00000000 .word 0x00000000 + 80009c3c: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xfcfcfcfcfcfcfcfc + 80009c40: 00033603 ld x12,0(x6) + 80009c44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xfcfcfcfcfcfcfcfc + 80009c48: 00033803 ld x16,0(x6) + 80009c4c: 00830313 addi x6,x6,8 + +0000000080009c50 : +Zknd_aes64dsm_cg_cp_sbox_b252: + aes64dsm x10, x12, x16 # perform operation + 80009c50: 3f060533 aes64dsm x10,x12,x16 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b252, Zknd_aes64dsm_cg_cp_sbox_b252_str) + 80009c54: 0007b203 ld x4,0(x15) + 80009c58: 00a20c63 beq x4,x10,80009c70 + 80009c5c: 4a4012ef jal x5,8000b100 + 80009c60: 80009c50 .word 0x80009c50 + 80009c64: 00000000 .word 0x00000000 + 80009c68: 80021292 .word 0x80021292 + 80009c6c: 00000000 .word 0x00000000 + 80009c70: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfdfdfdfdfdfdfdfd + 80009c74: 00033d03 ld x26,0(x6) + 80009c78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xfdfdfdfdfdfdfdfd + 80009c7c: 00033b03 ld x22,0(x6) + 80009c80: 00830313 addi x6,x6,8 + +0000000080009c84 : +Zknd_aes64dsm_cg_cp_sbox_b253: + aes64dsm x18, x26, x22 # perform operation + 80009c84: 3f6d0933 aes64dsm x18,x26,x22 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zknd_aes64dsm_cg_cp_sbox_b253, Zknd_aes64dsm_cg_cp_sbox_b253_str) + 80009c88: 0007b203 ld x4,0(x15) + 80009c8c: 01220c63 beq x4,x18,80009ca4 + 80009c90: 470012ef jal x5,8000b100 + 80009c94: 80009c84 .word 0x80009c84 + 80009c98: 00000000 .word 0x00000000 + 80009c9c: 800212cc .word 0x800212cc + 80009ca0: 00000000 .word 0x00000000 + 80009ca4: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xfefefefefefefefe + 80009ca8: 00033503 ld x10,0(x6) + 80009cac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xfefefefefefefefe + 80009cb0: 00033183 ld x3,0(x6) + 80009cb4: 00830313 addi x6,x6,8 + +0000000080009cb8 : +Zknd_aes64dsm_cg_cp_sbox_b254: + aes64dsm x7, x10, x3 # perform operation + 80009cb8: 3e3503b3 aes64dsm x7,x10,x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknd_aes64dsm_cg_cp_sbox_b254, Zknd_aes64dsm_cg_cp_sbox_b254_str) + 80009cbc: 0007b203 ld x4,0(x15) + 80009cc0: 00720c63 beq x4,x7,80009cd8 + 80009cc4: 43c012ef jal x5,8000b100 + 80009cc8: 80009cb8 .word 0x80009cb8 + 80009ccc: 00000000 .word 0x00000000 + 80009cd0: 80021306 .word 0x80021306 + 80009cd4: 00000000 .word 0x00000000 + 80009cd8: 00878793 addi x15,x15,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xffffffffffffffff + 80009cdc: 00033e83 ld x29,0(x6) + 80009ce0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xffffffffffffffff + 80009ce4: 00033703 ld x14,0(x6) + 80009ce8: 00830313 addi x6,x6,8 + +0000000080009cec : +Zknd_aes64dsm_cg_cp_sbox_b255: + aes64dsm x10, x29, x14 # perform operation + 80009cec: 3eee8533 aes64dsm x10,x29,x14 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknd_aes64dsm_cg_cp_sbox_b255, Zknd_aes64dsm_cg_cp_sbox_b255_str) + 80009cf0: 0007b203 ld x4,0(x15) + 80009cf4: 00a20c63 beq x4,x10,80009d0c + 80009cf8: 408012ef jal x5,8000b100 + 80009cfc: 80009cec .word 0x80009cec + 80009d00: 00000000 .word 0x00000000 + 80009d04: 80021340 .word 0x80021340 + 80009d08: 00000000 .word 0x00000000 + 80009d0c: 00878793 addi x15,x15,8 + + mv x2, x15 # restore signature pointer to default register for teardown + 80009d10: 00078113 addi x2,x15,0 + +0000000080009d14 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009d14: 00000513 addi x10,x0,0 + 80009d18: 00000073 ecall + 80009d1c: fff00513 addi x10,x0,-1 + 80009d20: 25800413 addi x8,x0,600 + +0000000080009d24 : + 80009d24: 34002373 csrrs x6,mscratch,x0 + +0000000080009d28 : + 80009d28: 2b833383 ld x7,696(x6) + +0000000080009d2c : + 80009d2c: 2a033383 ld x7,672(x6) + +0000000080009d30 : + 80009d30: 2d033483 ld x9,720(x6) + 80009d34: 34049073 csrrw x0,mscratch,x9 + +0000000080009d38 : + 80009d38: 2c833483 ld x9,712(x6) + 80009d3c: 305493f3 csrrw x7,mtvec,x9 + 80009d40: ffc4f493 andi x9,x9,-4 + 80009d44: ffc3f393 andi x7,x7,-4 + 80009d48: 00749e63 bne x9,x7,80009d64 + +0000000080009d4c : + 80009d4c: 00030493 addi x9,x6,0 + +0000000080009d50 : + 80009d50: 0004a783 lw x15,0(x9) + 80009d54: 00f3a023 sw x15,0(x7) + 80009d58: 00438393 addi x7,x7,4 + 80009d5c: 00448493 addi x9,x9,4 + 80009d60: fe83c8e3 blt x7,x8,80009d50 + 80009d64: 0000100f fence.i + +0000000080009d68 : + 80009d68: 00000013 addi x0,x0,0 + 80009d6c: 00000013 addi x0,x0,0 + 80009d70: 00000013 addi x0,x0,0 + 80009d74: 00000013 addi x0,x0,0 + 80009d78: 00000013 addi x0,x0,0 + 80009d7c: 00000013 addi x0,x0,0 + 80009d80: 00000497 auipc x9,0x0 + 80009d84: 2b048493 addi x9,x9,688 # 8000a030 + 80009d88: 00000013 addi x0,x0,0 + 80009d8c: 00000013 addi x0,x0,0 + 80009d90: 00000013 addi x0,x0,0 + 80009d94: 00000013 addi x0,x0,0 + 80009d98: 00000013 addi x0,x0,0 + 80009d9c: 00000013 addi x0,x0,0 + 80009da0: 10e49863 bne x9,x14,80009eb0 + 80009da4: 00000013 addi x0,x0,0 + 80009da8: 00000013 addi x0,x0,0 + 80009dac: 00000013 addi x0,x0,0 + 80009db0: 00000013 addi x0,x0,0 + 80009db4: 00000013 addi x0,x0,0 + 80009db8: 00000013 addi x0,x0,0 + 80009dbc: 00000013 addi x0,x0,0 + 80009dc0: 00018517 auipc x10,0x18 + 80009dc4: ce250513 addi x10,x10,-798 # 80021aa2 + 80009dc8: 00000013 addi x0,x0,0 + 80009dcc: 00000013 addi x0,x0,0 + 80009dd0: 00000013 addi x0,x0,0 + 80009dd4: 00000013 addi x0,x0,0 + 80009dd8: 00000013 addi x0,x0,0 + 80009ddc: 00000013 addi x0,x0,0 + 80009de0: 00039097 auipc x1,0x39 + 80009de4: 7c4080e7 jalr x1,1988(x1) # 800435a4 + 80009de8: 00000013 addi x0,x0,0 + 80009dec: 00000013 addi x0,x0,0 + 80009df0: 00000013 addi x0,x0,0 + 80009df4: 00000013 addi x0,x0,0 + 80009df8: 00000013 addi x0,x0,0 + 80009dfc: 00000013 addi x0,x0,0 + 80009e00: 00018517 auipc x10,0x18 + 80009e04: cdf50513 addi x10,x10,-801 # 80021adf + 80009e08: 00000013 addi x0,x0,0 + 80009e0c: 00000013 addi x0,x0,0 + 80009e10: 00000013 addi x0,x0,0 + 80009e14: 00000013 addi x0,x0,0 + 80009e18: 00000013 addi x0,x0,0 + 80009e1c: 00000013 addi x0,x0,0 + 80009e20: 00039097 auipc x1,0x39 + 80009e24: 784080e7 jalr x1,1924(x1) # 800435a4 + 80009e28: 00000013 addi x0,x0,0 + 80009e2c: 00000013 addi x0,x0,0 + 80009e30: 00000013 addi x0,x0,0 + 80009e34: 00000013 addi x0,x0,0 + 80009e38: 00000013 addi x0,x0,0 + 80009e3c: 00000013 addi x0,x0,0 + 80009e40: 00018517 auipc x10,0x18 + 80009e44: cff50513 addi x10,x10,-769 # 80021b3f + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00039097 auipc x1,0x39 + 80009e64: 744080e7 jalr x1,1860(x1) # 800435a4 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 00019517 auipc x10,0x19 + 80009e84: 86a50513 addi x10,x10,-1942 # 800226ea + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00039097 auipc x1,0x39 + 80009ea4: 704080e7 jalr x1,1796(x1) # 800435a4 + 80009ea8: 00039097 auipc x1,0x39 + 80009eac: 75c080e7 jalr x1,1884(x1) # 80043604 + +0000000080009eb0 : + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00006317 auipc x6,0x6 + 80009ec4: 4e830313 addi x6,x6,1256 # 800103a8 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00033303 ld x6,0(x6) + 80009ee4: 00000013 addi x0,x0,0 + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 0001b397 auipc x7,0x1b + 80009f04: ae038393 addi x7,x7,-1312 # 800249e0 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 40730333 sub x6,x6,x7 + 80009f24: 00000013 addi x0,x0,0 + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 0001b417 auipc x8,0x1b + 80009f44: a9040413 addi x8,x8,-1392 # 800249d0 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00043203 ld x4,0(x8) + 80009f64: 00620c63 beq x4,x6,80009f7c + 80009f68: 200013ef jal x7,8000b168 + 80009f6c: 80009eb0 .word 0x80009eb0 + 80009f70: 00000000 .word 0x00000000 + 80009f74: 80021c93 .word 0x80021c93 + 80009f78: 00000000 .word 0x00000000 + +0000000080009f7c : + 80009f7c: 000004b7 lui x9,0x0 + 80009f80: 00048493 addi x9,x9,0 # 0 + 80009f84: 00b49493 slli x9,x9,0xb + 80009f88: 5d648493 addi x9,x9,1494 + 80009f8c: 00b49493 slli x9,x9,0xb + 80009f90: 43748493 addi x9,x9,1079 + 80009f94: 00a49493 slli x9,x9,0xa + 80009f98: 2ad48493 addi x9,x9,685 + 80009f9c: 00e49e63 bne x9,x14,80009fb8 + 80009fa0: 1c8013ef jal x7,8000b168 + 80009fa4: 8000a064 .word 0x8000a064 + 80009fa8: 00000000 .word 0x00000000 + 80009fac: 80021b01 .word 0x80021b01 + 80009fb0: 00000000 .word 0x00000000 + 80009fb4: 00000341 .word 0x00000341 + +0000000080009fb8 : + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00018517 auipc x10,0x18 + 80009fc4: aa450513 addi x10,x10,-1372 # 80021a64 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 00039097 auipc x1,0x39 + 80009fe4: 5c4080e7 jalr x1,1476(x1) # 800435a4 + 80009fe8: 00039097 auipc x1,0x39 + 80009fec: 5fc080e7 jalr x1,1532(x1) # 800435e4 + +0000000080009ff0 : + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 00018517 auipc x10,0x18 + 8000a004: aa250513 addi x10,x10,-1374 # 80021aa2 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 00039097 auipc x1,0x39 + 8000a024: 584080e7 jalr x1,1412(x1) # 800435a4 + 8000a028: 00039097 auipc x1,0x39 + 8000a02c: 5dc080e7 jalr x1,1500(x1) # 80043604 + +000000008000a030 : + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00000717 auipc x14,0x0 + 8000a044: ff070713 addi x14,x14,-16 # 8000a030 + 8000a048: 00000013 addi x0,x0,0 + 8000a04c: 00000013 addi x0,x0,0 + 8000a050: 00000013 addi x0,x0,0 + 8000a054: 00000013 addi x0,x0,0 + 8000a058: 00000013 addi x0,x0,0 + 8000a05c: 00000013 addi x0,x0,0 + 8000a060: cb5ff06f jal x0,80009d14 + +000000008000a064 : + 8000a064: 00000737 lui x14,0x0 + 8000a068: 00070713 addi x14,x14,0 # 0 + 8000a06c: 00b71713 slli x14,x14,0xb + 8000a070: 5d670713 addi x14,x14,1494 + 8000a074: 00b71713 slli x14,x14,0xb + 8000a078: 43770713 addi x14,x14,1079 + 8000a07c: 00a71713 slli x14,x14,0xa + 8000a080: 2ad70713 addi x14,x14,685 + 8000a084: c91ff06f jal x0,80009d14 + 8000a088: 00000013 addi x0,x0,0 + 8000a08c: 00000013 addi x0,x0,0 + 8000a090: 00000013 addi x0,x0,0 + 8000a094: 00000013 addi x0,x0,0 + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00000013 addi x0,x0,0 + 8000a0a4: 00000013 addi x0,x0,0 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + +000000008000a0c0 : + 8000a0c0: 1000006f jal x0,8000a1c0 + 8000a0c4: 1080006f jal x0,8000a1cc + 8000a0c8: 1100006f jal x0,8000a1d8 + 8000a0cc: 1180006f jal x0,8000a1e4 + 8000a0d0: 1200006f jal x0,8000a1f0 + 8000a0d4: 1280006f jal x0,8000a1fc + 8000a0d8: 1300006f jal x0,8000a208 + 8000a0dc: 1380006f jal x0,8000a214 + 8000a0e0: 1400006f jal x0,8000a220 + 8000a0e4: 1480006f jal x0,8000a22c + 8000a0e8: 1500006f jal x0,8000a238 + 8000a0ec: 1580006f jal x0,8000a244 + 8000a0f0: 1600006f jal x0,8000a250 + 8000a0f4: 1680006f jal x0,8000a25c + 8000a0f8: 1700006f jal x0,8000a268 + 8000a0fc: 1780006f jal x0,8000a274 + 8000a100: 1800006f jal x0,8000a280 + 8000a104: 1880006f jal x0,8000a28c + 8000a108: 1900006f jal x0,8000a298 + 8000a10c: 1980006f jal x0,8000a2a4 + 8000a110: 1a00006f jal x0,8000a2b0 + 8000a114: 1a80006f jal x0,8000a2bc + 8000a118: 1b00006f jal x0,8000a2c8 + 8000a11c: 1b80006f jal x0,8000a2d4 + 8000a120: 1c00006f jal x0,8000a2e0 + 8000a124: 1bc0006f jal x0,8000a2e0 + 8000a128: 1b80006f jal x0,8000a2e0 + 8000a12c: 1b40006f jal x0,8000a2e0 + 8000a130: 1b00006f jal x0,8000a2e0 + 8000a134: 1ac0006f jal x0,8000a2e0 + 8000a138: 1a80006f jal x0,8000a2e0 + 8000a13c: 1a40006f jal x0,8000a2e0 + 8000a140: 1a00006f jal x0,8000a2e0 + 8000a144: 19c0006f jal x0,8000a2e0 + 8000a148: 1980006f jal x0,8000a2e0 + 8000a14c: 1940006f jal x0,8000a2e0 + 8000a150: 1900006f jal x0,8000a2e0 + 8000a154: 18c0006f jal x0,8000a2e0 + 8000a158: 1880006f jal x0,8000a2e0 + 8000a15c: 1840006f jal x0,8000a2e0 + 8000a160: 1800006f jal x0,8000a2e0 + 8000a164: 17c0006f jal x0,8000a2e0 + 8000a168: 1780006f jal x0,8000a2e0 + 8000a16c: 1740006f jal x0,8000a2e0 + 8000a170: 1700006f jal x0,8000a2e0 + 8000a174: 16c0006f jal x0,8000a2e0 + 8000a178: 1680006f jal x0,8000a2e0 + 8000a17c: 1640006f jal x0,8000a2e0 + 8000a180: 1600006f jal x0,8000a2e0 + 8000a184: 15c0006f jal x0,8000a2e0 + 8000a188: 1580006f jal x0,8000a2e0 + 8000a18c: 1540006f jal x0,8000a2e0 + 8000a190: 1500006f jal x0,8000a2e0 + 8000a194: 14c0006f jal x0,8000a2e0 + 8000a198: 1480006f jal x0,8000a2e0 + 8000a19c: 1440006f jal x0,8000a2e0 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 13c0006f jal x0,8000a2e0 + 8000a1a8: 1380006f jal x0,8000a2e0 + 8000a1ac: 1340006f jal x0,8000a2e0 + 8000a1b0: 1300006f jal x0,8000a2e0 + 8000a1b4: 12c0006f jal x0,8000a2e0 + 8000a1b8: 1280006f jal x0,8000a2e0 + 8000a1bc: 1240006f jal x0,8000a2e0 + +000000008000a1c0 : + 8000a1c0: 34011173 csrrw x2,mscratch,x2 + 8000a1c4: 30f13423 sd x15,776(x2) + 8000a1c8: 13c007ef jal x15,8000a304 + 8000a1cc: 34011173 csrrw x2,mscratch,x2 + 8000a1d0: 30f13423 sd x15,776(x2) + 8000a1d4: 130007ef jal x15,8000a304 + 8000a1d8: 34011173 csrrw x2,mscratch,x2 + 8000a1dc: 30f13423 sd x15,776(x2) + 8000a1e0: 124007ef jal x15,8000a304 + 8000a1e4: 34011173 csrrw x2,mscratch,x2 + 8000a1e8: 30f13423 sd x15,776(x2) + 8000a1ec: 118007ef jal x15,8000a304 + 8000a1f0: 34011173 csrrw x2,mscratch,x2 + 8000a1f4: 30f13423 sd x15,776(x2) + 8000a1f8: 10c007ef jal x15,8000a304 + 8000a1fc: 34011173 csrrw x2,mscratch,x2 + 8000a200: 30f13423 sd x15,776(x2) + 8000a204: 100007ef jal x15,8000a304 + 8000a208: 34011173 csrrw x2,mscratch,x2 + 8000a20c: 30f13423 sd x15,776(x2) + 8000a210: 0f4007ef jal x15,8000a304 + 8000a214: 34011173 csrrw x2,mscratch,x2 + 8000a218: 30f13423 sd x15,776(x2) + 8000a21c: 0e8007ef jal x15,8000a304 + 8000a220: 34011173 csrrw x2,mscratch,x2 + 8000a224: 30f13423 sd x15,776(x2) + 8000a228: 0dc007ef jal x15,8000a304 + 8000a22c: 34011173 csrrw x2,mscratch,x2 + 8000a230: 30f13423 sd x15,776(x2) + 8000a234: 0d0007ef jal x15,8000a304 + 8000a238: 34011173 csrrw x2,mscratch,x2 + 8000a23c: 30f13423 sd x15,776(x2) + 8000a240: 0c4007ef jal x15,8000a304 + 8000a244: 34011173 csrrw x2,mscratch,x2 + 8000a248: 30f13423 sd x15,776(x2) + 8000a24c: 0b8007ef jal x15,8000a304 + 8000a250: 34011173 csrrw x2,mscratch,x2 + 8000a254: 30f13423 sd x15,776(x2) + 8000a258: 0ac007ef jal x15,8000a304 + 8000a25c: 34011173 csrrw x2,mscratch,x2 + 8000a260: 30f13423 sd x15,776(x2) + 8000a264: 0a0007ef jal x15,8000a304 + 8000a268: 34011173 csrrw x2,mscratch,x2 + 8000a26c: 30f13423 sd x15,776(x2) + 8000a270: 094007ef jal x15,8000a304 + 8000a274: 34011173 csrrw x2,mscratch,x2 + 8000a278: 30f13423 sd x15,776(x2) + 8000a27c: 088007ef jal x15,8000a304 + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 07c007ef jal x15,8000a304 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 070007ef jal x15,8000a304 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 064007ef jal x15,8000a304 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 058007ef jal x15,8000a304 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 04c007ef jal x15,8000a304 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 040007ef jal x15,8000a304 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 034007ef jal x15,8000a304 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 028007ef jal x15,8000a304 + +000000008000a2e0 : + 8000a2e0: 00000317 auipc x6,0x0 + 8000a2e4: a8830313 addi x6,x6,-1400 # 80009d68 + 8000a2e8: 00000013 addi x0,x0,0 + 8000a2ec: 00000013 addi x0,x0,0 + 8000a2f0: 00000013 addi x0,x0,0 + 8000a2f4: 00000013 addi x0,x0,0 + 8000a2f8: 00000013 addi x0,x0,0 + 8000a2fc: 00000013 addi x0,x0,0 + 8000a300: 00030067 jalr x0,0(x6) + +000000008000a304 : + 8000a304: 30e13023 sd x14,768(x2) + 8000a308: 34011773 csrrw x14,mscratch,x2 + 8000a30c: 30e13823 sd x14,784(x2) + 8000a310: 2b013703 ld x14,688(x2) + 8000a314: 00070067 jalr x0,0(x14) + +000000008000a318 : + 8000a318: 2e913c23 sd x9,760(x2) + 8000a31c: 2e813823 sd x8,752(x2) + 8000a320: 2e713423 sd x7,744(x2) + 8000a324: 2e613023 sd x6,736(x2) + 8000a328: 00000013 addi x0,x0,0 + 8000a32c: 00000013 addi x0,x0,0 + 8000a330: 00000013 addi x0,x0,0 + 8000a334: 00000013 addi x0,x0,0 + 8000a338: 00000013 addi x0,x0,0 + 8000a33c: 00000013 addi x0,x0,0 + 8000a340: 00006317 auipc x6,0x6 + 8000a344: dc830313 addi x6,x6,-568 # 80010108 + 8000a348: 00000013 addi x0,x0,0 + 8000a34c: 00000013 addi x0,x0,0 + 8000a350: 00000013 addi x0,x0,0 + 8000a354: 00000013 addi x0,x0,0 + 8000a358: 00000013 addi x0,x0,0 + 8000a35c: 00000013 addi x0,x0,0 + 8000a360: 00033383 ld x7,0(x6) + 8000a364: 00138393 addi x7,x7,1 + 8000a368: 00733023 sd x7,0(x6) + 8000a36c: 34202773 csrrs x14,mcause,x0 + +000000008000a370 : + 8000a370: fff00493 addi x9,x0,-1 + 8000a374: 00d4d493 srli x9,x9,0xd + 8000a378: 00c49493 slli x9,x9,0xc + 8000a37c: fff4c493 xori x9,x9,-1 + 8000a380: 00e4f4b3 and x9,x9,x14 + +000000008000a384 : + 8000a384: ffe48413 addi x8,x9,-2 + 8000a388: 00041663 bne x8,x0,8000a394 + +000000008000a38c : + 8000a38c: 500502e3 beq x10,x0,8000b090 + 8000a390: 5b40006f jal x0,8000a944 + +000000008000a394 : + 8000a394: ff848413 addi x8,x9,-8 + 8000a398: 00245413 srli x8,x8,0x2 + 8000a39c: 5a041463 bne x8,x0,8000a944 + +000000008000a3a0 : + 8000a3a0: 4e0508e3 beq x10,x0,8000b090 + +000000008000a3a4 : + 8000a3a4: fff50493 addi x9,x10,-1 + 8000a3a8: 00500393 addi x7,x0,5 + 8000a3ac: 0274e063 bltu x9,x7,8000a3cc + 8000a3b0: 07300393 addi x7,x0,115 + 8000a3b4: 00750463 beq x10,x7,8000a3bc + 8000a3b8: 08c0006f jal x0,8000a444 + +000000008000a3bc : + 8000a3bc: 34102573 csrrs x10,mepc,x0 + 8000a3c0: 00450413 addi x8,x10,4 + 8000a3c4: 34141073 csrrw x0,mepc,x8 + 8000a3c8: 0310006f jal x0,8000abf8 + +000000008000a3cc : + 8000a3cc: 341024f3 csrrs x9,mepc,x0 + 8000a3d0: 00448493 addi x9,x9,4 + 8000a3d4: 34149073 csrrw x0,mepc,x9 + 8000a3d8: 00100393 addi x7,x0,1 + 8000a3dc: 00750e63 beq x10,x7,8000a3f8 + 8000a3e0: 00200393 addi x7,x0,2 + 8000a3e4: 02750463 beq x10,x7,8000a40c + 8000a3e8: 00300393 addi x7,x0,3 + 8000a3ec: 04750063 beq x10,x7,8000a42c + 8000a3f0: fff00513 addi x10,x0,-1 + 8000a3f4: 0050006f jal x0,8000abf8 + +000000008000a3f8 : + 8000a3f8: fff00493 addi x9,x0,-1 + 8000a3fc: 03e4d493 srli x9,x9,0x3e + 8000a400: 00b49493 slli x9,x9,0xb + 8000a404: 3004a073 csrrs x0,mstatus,x9 + 8000a408: 7f00006f jal x0,8000abf8 + +000000008000a40c : + 8000a40c: fff00493 addi x9,x0,-1 + 8000a410: 03e4d493 srli x9,x9,0x3e + 8000a414: 00b49493 slli x9,x9,0xb + 8000a418: 3004b073 csrrc x0,mstatus,x9 + 8000a41c: 00100493 addi x9,x0,1 + 8000a420: 00b49493 slli x9,x9,0xb + 8000a424: 3004a073 csrrs x0,mstatus,x9 + 8000a428: 7d00006f jal x0,8000abf8 + +000000008000a42c : + 8000a42c: fff00493 addi x9,x0,-1 + 8000a430: 03e4d493 srli x9,x9,0x3e + 8000a434: 00b49493 slli x9,x9,0xb + 8000a438: 3004b073 csrrc x0,mstatus,x9 + 8000a43c: 7bc0006f jal x0,8000abf8 + +000000008000a440 : + 8000a440: 00000013 addi x0,x0,0 + +000000008000a444 : + 8000a444: 00000013 addi x0,x0,0 + 8000a448: 00000013 addi x0,x0,0 + 8000a44c: 00000013 addi x0,x0,0 + 8000a450: 00000013 addi x0,x0,0 + 8000a454: 00000013 addi x0,x0,0 + 8000a458: 00000013 addi x0,x0,0 + 8000a45c: 00000013 addi x0,x0,0 + 8000a460: 00000397 auipc x7,0x0 + 8000a464: 17038393 addi x7,x7,368 # 8000a5d0 + 8000a468: 00000013 addi x0,x0,0 + 8000a46c: 00000013 addi x0,x0,0 + 8000a470: 00000013 addi x0,x0,0 + 8000a474: 00000013 addi x0,x0,0 + 8000a478: 00000013 addi x0,x0,0 + 8000a47c: 00000013 addi x0,x0,0 + +000000008000a480 : + 8000a480: 0003e403 lwu x8,0(x7) + 8000a484: 00a40863 beq x8,x10,8000a494 + 8000a488: 04040863 beq x8,x0,8000a4d8 + 8000a48c: 00838393 addi x7,x7,8 + 8000a490: ff1ff06f jal x0,8000a480 + +000000008000a494 : + 8000a494: 00008493 addi x9,x1,0 + 8000a498: 00000013 addi x0,x0,0 + 8000a49c: 00000013 addi x0,x0,0 + 8000a4a0: 00000097 auipc x1,0x0 + 8000a4a4: 02408093 addi x1,x1,36 # 8000a4c4 + 8000a4a8: 00000013 addi x0,x0,0 + 8000a4ac: 00000013 addi x0,x0,0 + 8000a4b0: 00000013 addi x0,x0,0 + 8000a4b4: 00000013 addi x0,x0,0 + 8000a4b8: 00000013 addi x0,x0,0 + 8000a4bc: 00000013 addi x0,x0,0 + 8000a4c0: 00038067 jalr x0,0(x7) + +000000008000a4c4 : + 8000a4c4: 00048093 addi x1,x9,0 + 8000a4c8: 34102473 csrrs x8,mepc,x0 + 8000a4cc: 00440413 addi x8,x8,4 + 8000a4d0: 34141073 csrrw x0,mepc,x8 + 8000a4d4: 7240006f jal x0,8000abf8 + +000000008000a4d8 : + 8000a4d8: 00050493 addi x9,x10,0 + 8000a4dc: 00000013 addi x0,x0,0 + 8000a4e0: 00019517 auipc x10,0x19 + 8000a4e4: c4150513 addi x10,x10,-959 # 80023121 + 8000a4e8: 00000013 addi x0,x0,0 + 8000a4ec: 00000013 addi x0,x0,0 + 8000a4f0: 00000013 addi x0,x0,0 + 8000a4f4: 00000013 addi x0,x0,0 + 8000a4f8: 00000013 addi x0,x0,0 + 8000a4fc: 00000013 addi x0,x0,0 + 8000a500: 00039097 auipc x1,0x39 + 8000a504: 0a4080e7 jalr x1,164(x1) # 800435a4 + 8000a508: 00048513 addi x10,x9,0 + 8000a50c: 02000593 addi x11,x0,32 + 8000a510: 728020ef jal x1,8000cc38 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00017517 auipc x10,0x17 + 8000a524: fc850513 addi x10,x10,-56 # 800214e8 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + 8000a540: 00039097 auipc x1,0x39 + 8000a544: 064080e7 jalr x1,100(x1) # 800435a4 + 8000a548: 00000013 addi x0,x0,0 + 8000a54c: 00000013 addi x0,x0,0 + 8000a550: 00000013 addi x0,x0,0 + 8000a554: 00000013 addi x0,x0,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00017517 auipc x10,0x17 + 8000a564: 64850513 addi x10,x10,1608 # 80021ba8 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00039097 auipc x1,0x39 + 8000a584: 024080e7 jalr x1,36(x1) # 800435a4 + 8000a588: 00000013 addi x0,x0,0 + 8000a58c: 00000013 addi x0,x0,0 + 8000a590: 00000013 addi x0,x0,0 + 8000a594: 00000013 addi x0,x0,0 + 8000a598: 00000013 addi x0,x0,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00017517 auipc x10,0x17 + 8000a5a4: 50250513 addi x10,x10,1282 # 80021aa2 + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00039097 auipc x1,0x39 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800435a4 + 8000a5c8: 00039097 auipc x1,0x39 + 8000a5cc: 03c080e7 jalr x1,60(x1) # 80043604 + +000000008000a5d0 : + 8000a5d0: 30002573 .word 0x30002573 + 8000a5d4: 00008067 jalr x0,0(x1) + 8000a5d8: 30059073 .word 0x30059073 + 8000a5dc: 00008067 jalr x0,0(x1) + 8000a5e0: 3005a073 .word 0x3005a073 + 8000a5e4: 00008067 jalr x0,0(x1) + 8000a5e8: 3005b073 .word 0x3005b073 + 8000a5ec: 00008067 jalr x0,0(x1) + 8000a5f0: 30402573 .word 0x30402573 + 8000a5f4: 00008067 jalr x0,0(x1) + 8000a5f8: 30459073 .word 0x30459073 + 8000a5fc: 00008067 jalr x0,0(x1) + 8000a600: 3045a073 .word 0x3045a073 + 8000a604: 00008067 jalr x0,0(x1) + 8000a608: 3045b073 .word 0x3045b073 + 8000a60c: 00008067 jalr x0,0(x1) + 8000a610: 30602573 .word 0x30602573 + 8000a614: 00008067 jalr x0,0(x1) + 8000a618: 30659073 .word 0x30659073 + 8000a61c: 00008067 jalr x0,0(x1) + 8000a620: 3065a073 .word 0x3065a073 + 8000a624: 00008067 jalr x0,0(x1) + 8000a628: 3065b073 .word 0x3065b073 + 8000a62c: 00008067 jalr x0,0(x1) + 8000a630: 30a02573 .word 0x30a02573 + 8000a634: 00008067 jalr x0,0(x1) + 8000a638: 30a59073 .word 0x30a59073 + 8000a63c: 00008067 jalr x0,0(x1) + 8000a640: 30a5a073 .word 0x30a5a073 + 8000a644: 00008067 jalr x0,0(x1) + 8000a648: 30a5b073 .word 0x30a5b073 + 8000a64c: 00008067 jalr x0,0(x1) + 8000a650: 34402573 .word 0x34402573 + 8000a654: 00008067 jalr x0,0(x1) + 8000a658: 34459073 .word 0x34459073 + 8000a65c: 00008067 jalr x0,0(x1) + 8000a660: 3445a073 .word 0x3445a073 + 8000a664: 00008067 jalr x0,0(x1) + 8000a668: 3445b073 .word 0x3445b073 + 8000a66c: 00008067 jalr x0,0(x1) + 8000a670: 74702573 .word 0x74702573 + 8000a674: 00008067 jalr x0,0(x1) + 8000a678: 74759073 .word 0x74759073 + 8000a67c: 00008067 jalr x0,0(x1) + 8000a680: 7475a073 .word 0x7475a073 + 8000a684: 00008067 jalr x0,0(x1) + 8000a688: 7475b073 .word 0x7475b073 + 8000a68c: 00008067 jalr x0,0(x1) + 8000a690: 32002573 .word 0x32002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 32059073 .word 0x32059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3205a073 .word 0x3205a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3205b073 .word 0x3205b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: b0002573 .word 0xb0002573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: b0059073 .word 0xb0059073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: b005a073 .word 0xb005a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: b005b073 .word 0xb005b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: b0202573 .word 0xb0202573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: b0259073 .word 0xb0259073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: b025a073 .word 0xb025a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: b025b073 .word 0xb025b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 10002573 .word 0x10002573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 10059073 .word 0x10059073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 1005a073 .word 0x1005a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 1005b073 .word 0x1005b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 10402573 .word 0x10402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 10459073 .word 0x10459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 1045a073 .word 0x1045a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 1045b073 .word 0x1045b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 10602573 .word 0x10602573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 10659073 .word 0x10659073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 1065a073 .word 0x1065a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 1065b073 .word 0x1065b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 10a02573 .word 0x10a02573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 10a59073 .word 0x10a59073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 10a5a073 .word 0x10a5a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 10a5b073 .word 0x10a5b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: 14402573 .word 0x14402573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: 14459073 .word 0x14459073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: 1445a073 .word 0x1445a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: 1445b073 .word 0x1445b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: 14d02573 .word 0x14d02573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: 14d59073 .word 0x14d59073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: 14d5a073 .word 0x14d5a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: 14d5b073 .word 0x14d5b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 18002573 .word 0x18002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 18059073 .word 0x18059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1805a073 .word 0x1805a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1805b073 .word 0x1805b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 7a002573 .word 0x7a002573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 7a059073 .word 0x7a059073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 7a05a073 .word 0x7a05a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 7a05b073 .word 0x7a05b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 7a102573 .word 0x7a102573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 7a159073 .word 0x7a159073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 7a15a073 .word 0x7a15a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 7a15b073 .word 0x7a15b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 7a202573 .word 0x7a202573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 7a259073 .word 0x7a259073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 7a25a073 .word 0x7a25a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 7a25b073 .word 0x7a25b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 7a302573 .word 0x7a302573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 7a359073 .word 0x7a359073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 7a35a073 .word 0x7a35a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 7a35b073 .word 0x7a35b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 7a402573 .word 0x7a402573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 7a459073 .word 0x7a459073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 7a45a073 .word 0x7a45a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 7a45b073 .word 0x7a45b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 7a502573 .word 0x7a502573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 7a559073 .word 0x7a559073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 7a55a073 .word 0x7a55a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 7a55b073 .word 0x7a55b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a802573 .word 0x7a802573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a859073 .word 0x7a859073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a85a073 .word 0x7a85a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a85b073 .word 0x7a85b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7aa02573 .word 0x7aa02573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7aa59073 .word 0x7aa59073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7aa5a073 .word 0x7aa5a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7aa5b073 .word 0x7aa5b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 5a802573 .word 0x5a802573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 5a859073 .word 0x5a859073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 5a85a073 .word 0x5a85a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 5a85b073 .word 0x5a85b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 6a802573 .word 0x6a802573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 6a859073 .word 0x6a859073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 6a85a073 .word 0x6a85a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 6a85b073 .word 0x6a85b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 0005a503 lw x10,0(x11) + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 0045a503 lw x10,4(x11) + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 00c5a023 sw x12,0(x11) + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 00c5a223 sw x12,4(x11) + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 0005b503 ld x10,0(x11) + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 00c5b023 sd x12,0(x11) + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 00000000 .word 0x00000000 + +000000008000a944 : + 8000a944: 02000393 addi x7,x0,32 + 8000a948: 00075c63 bge x14,x0,8000a960 + +000000008000a94c : + 8000a94c: 00171413 slli x8,x14,0x1 + 8000a950: ff240413 addi x8,x8,-14 + 8000a954: 00045663 bge x8,x0,8000a960 + 8000a958: 01800393 addi x7,x0,24 + 8000a95c: 0040006f jal x0,8000a960 + +000000008000a960 : + 8000a960: ca810113 addi x2,x2,-856 + 8000a964: 5f013303 ld x6,1520(x2) + 8000a968: 007304b3 add x9,x6,x7 + 8000a96c: 5e913823 sd x9,1520(x2) + 8000a970: 5d013403 ld x8,1488(x2) + 8000a974: 40830333 sub x6,x6,x8 + 8000a978: 35810113 addi x2,x2,856 + 8000a97c: 27813403 ld x8,632(x2) + 8000a980: 00830333 add x6,x6,x8 + 8000a984: 34102473 csrrs x8,mepc,x0 + 8000a988: 00000013 addi x0,x0,0 + 8000a98c: 00000013 addi x0,x0,0 + 8000a990: 00000013 addi x0,x0,0 + 8000a994: 00000013 addi x0,x0,0 + 8000a998: 00000013 addi x0,x0,0 + 8000a99c: 00000013 addi x0,x0,0 + 8000a9a0: 00017497 auipc x9,0x17 + 8000a9a4: b2848493 addi x9,x9,-1240 # 800214c8 + 8000a9a8: 00000013 addi x0,x0,0 + 8000a9ac: 00000013 addi x0,x0,0 + 8000a9b0: 00000013 addi x0,x0,0 + 8000a9b4: 00000013 addi x0,x0,0 + 8000a9b8: 00000013 addi x0,x0,0 + 8000a9bc: 00000013 addi x0,x0,0 + 8000a9c0: 0084b023 sd x8,0(x9) + 8000a9c4: 00e4b423 sd x14,8(x9) + 8000a9c8: 34302473 csrrs x8,mtval,x0 + 8000a9cc: 0084b823 sd x8,16(x9) + 8000a9d0: 30002473 csrrs x8,mstatus,x0 + 8000a9d4: 0084bc23 sd x8,24(x9) + 8000a9d8: 00000013 addi x0,x0,0 + 8000a9dc: 00000013 addi x0,x0,0 + 8000a9e0: 00037417 auipc x8,0x37 + 8000a9e4: 4c840413 addi x8,x8,1224 # 80041ea8 + 8000a9e8: 00000013 addi x0,x0,0 + 8000a9ec: 00000013 addi x0,x0,0 + 8000a9f0: 00000013 addi x0,x0,0 + 8000a9f4: 00000013 addi x0,x0,0 + 8000a9f8: 00000013 addi x0,x0,0 + 8000a9fc: 00000013 addi x0,x0,0 + 8000aa00: 007304b3 add x9,x6,x7 + 8000aa04: e2946663 bltu x8,x9,8000a030 + +000000008000aa08 : + 8000aa08: 2c013403 ld x8,704(x2) + 8000aa0c: 408787b3 sub x15,x15,x8 + 8000aa10: 00179493 slli x9,x15,0x1 + 8000aa14: 009787b3 add x15,x15,x9 + 8000aa18: 0057d793 srli x15,x15,0x5 + 8000aa1c: 00679793 slli x15,x15,0x6 + 8000aa20: 0077e7b3 or x15,x15,x7 + 8000aa24: 00378793 addi x15,x15,3 + 8000aa28: 02075a63 bge x14,x0,8000aa5c + 8000aa2c: 00f00413 addi x8,x0,15 + 8000aa30: 00877433 and x8,x14,x8 + 8000aa34: 304024f3 csrrs x9,mie,x0 + 8000aa38: 0084d4b3 srl x9,x9,x8 + 8000aa3c: 0014f493 andi x9,x9,1 + 8000aa40: 00b49493 slli x9,x9,0xb + 8000aa44: 0097e7b3 or x15,x15,x9 + 8000aa48: 344024f3 csrrs x9,mip,x0 + 8000aa4c: 0084d4b3 srl x9,x9,x8 + 8000aa50: 0014f493 andi x9,x9,1 + 8000aa54: 00c49493 slli x9,x9,0xc + 8000aa58: 0097e7b3 or x15,x15,x9 + 8000aa5c: 300023f3 csrrs x7,mstatus,x0 + 8000aa60: 02f39393 slli x7,x7,0x2f + 8000aa64: 0223d393 srli x7,x7,0x22 + 8000aa68: 00000437 lui x8,0x0 + 8000aa6c: 00040413 addi x8,x8,0 # 0 + 8000aa70: 00b41413 slli x8,x8,0xb + 8000aa74: 00140413 addi x8,x8,1 + 8000aa78: 00b41413 slli x8,x8,0xb + 8000aa7c: 06740413 addi x8,x8,103 + 8000aa80: 00a41413 slli x8,x8,0xa + 8000aa84: 3e540413 addi x8,x8,997 + 8000aa88: fff44413 xori x8,x8,-1 + 8000aa8c: 0083f433 and x8,x7,x8 + 8000aa90: 0087e433 or x8,x15,x8 + 8000aa94: 0204d493 srli x9,x9,0x20 + 8000aa98: 1c04f493 andi x9,x9,448 + 8000aa9c: 00849493 slli x9,x9,0x8 + 8000aaa0: 00946433 or x8,x8,x9 + 8000aaa4: 00033483 ld x9,0(x6) + 8000aaa8: 02848263 beq x9,x8,8000aacc + 8000aaac: 00040313 addi x6,x8,0 + 8000aab0: 00048213 addi x4,x9,0 + 8000aab4: 6b4003ef jal x7,8000b168 + 8000aab8: 8000aa08 .word 0x8000aa08 + 8000aabc: 00000000 .word 0x00000000 + 8000aac0: 80021caa .word 0x80021caa + 8000aac4: 00000000 .word 0x00000000 + 8000aac8: 00000341 .word 0x00000341 + +000000008000aacc : + 8000aacc: 00070413 addi x8,x14,0 + 8000aad0: 00833483 ld x9,8(x6) + 8000aad4: 02848263 beq x9,x8,8000aaf8 + 8000aad8: 00040313 addi x6,x8,0 + 8000aadc: 00048213 addi x4,x9,0 + 8000aae0: 688003ef jal x7,8000b168 + 8000aae4: 8000aacc .word 0x8000aacc + 8000aae8: 00000000 .word 0x00000000 + 8000aaec: 80021dac .word 0x80021dac + 8000aaf0: 00000000 .word 0x00000000 + 8000aaf4: 00000341 .word 0x00000341 + 8000aaf8: 12074063 blt x14,x0,8000ac18 + +000000008000aafc : + 8000aafc: 34102473 csrrs x8,mepc,x0 + 8000ab00: 00010493 addi x9,x2,0 + 8000ab04: 0040006f jal x0,8000ab08 + +000000008000ab08 : + 8000ab08: 08000393 addi x7,x0,128 + 8000ab0c: 04740863 beq x8,x7,8000ab5c + 8000ab10: 00238393 addi x7,x7,2 + 8000ab14: 04740463 beq x8,x7,8000ab5c + 8000ab18: 04040263 beq x8,x0,8000ab5c + 8000ab1c: 2884b383 ld x7,648(x9) + 8000ab20: 2904b783 ld x15,656(x9) + 8000ab24: 007787b3 add x15,x15,x7 + 8000ab28: 00f47463 bgeu x8,x15,8000ab30 + 8000ab2c: 02747663 bgeu x8,x7,8000ab58 + +000000008000ab30 : + 8000ab30: 2584b383 ld x7,600(x9) + 8000ab34: 2604b783 ld x15,608(x9) + 8000ab38: 007787b3 add x15,x15,x7 + 8000ab3c: 00f47463 bgeu x8,x15,8000ab44 + 8000ab40: 00747c63 bgeu x8,x7,8000ab58 + +000000008000ab44 : + 8000ab44: 2684b383 ld x7,616(x9) + 8000ab48: 2704b783 ld x15,624(x9) + 8000ab4c: 007787b3 add x15,x15,x7 + 8000ab50: d0f47a63 bgeu x8,x15,8000a064 + 8000ab54: d0746863 bltu x8,x7,8000a064 + +000000008000ab58 : + 8000ab58: 40740433 sub x8,x8,x7 + +000000008000ab5c : + 8000ab5c: 01033483 ld x9,16(x6) + 8000ab60: 02848263 beq x9,x8,8000ab84 + 8000ab64: 00040313 addi x6,x8,0 + 8000ab68: 00048213 addi x4,x9,0 + 8000ab6c: 5fc003ef jal x7,8000b168 + 8000ab70: 8000ab5c .word 0x8000ab5c + 8000ab74: 00000000 .word 0x00000000 + 8000ab78: 80021ea7 .word 0x80021ea7 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 00000341 .word 0x00000341 + +000000008000ab84 : + 8000ab84: 34102473 csrrs x8,mepc,x0 + 8000ab88: 342023f3 csrrs x7,mcause,x0 + 8000ab8c: 00c00793 addi x15,x0,12 + 8000ab90: 00f38a63 beq x7,x15,8000aba4 + 8000ab94: 00100793 addi x15,x0,1 + 8000ab98: 00f38663 beq x7,x15,8000aba4 + 8000ab9c: 01400793 addi x15,x0,20 + 8000aba0: 00f39663 bne x7,x15,8000abac + 8000aba4: 34109073 csrrw x0,mepc,x1 + 8000aba8: 0100006f jal x0,8000abb8 + +000000008000abac : + 8000abac: 00400393 addi x7,x0,4 + 8000abb0: 00740433 add x8,x8,x7 + 8000abb4: 34141073 csrrw x0,mepc,x8 + +000000008000abb8 : + 8000abb8: 34302473 csrrs x8,mtval,x0 + +000000008000abbc : + 8000abbc: 01833483 ld x9,24(x6) + 8000abc0: 02848263 beq x9,x8,8000abe4 + 8000abc4: 00040313 addi x6,x8,0 + 8000abc8: 00048213 addi x4,x9,0 + 8000abcc: 59c003ef jal x7,8000b168 + 8000abd0: 8000abbc .word 0x8000abbc + 8000abd4: 00000000 .word 0x00000000 + 8000abd8: 80021f9a .word 0x80021f9a + 8000abdc: 00000000 .word 0x00000000 + 8000abe0: 00000341 .word 0x00000341 + +000000008000abe4 : + 8000abe4: 30102473 csrrs x8,misa,x0 + 8000abe8: 03841413 slli x8,x8,0x38 + 8000abec: 00045263 bge x8,x0,8000abf0 + +000000008000abf0 : + 8000abf0: 20000393 addi x7,x0,512 + 8000abf4: 0640006f jal x0,8000ac58 + +000000008000abf8 : + 8000abf8: 2e013303 ld x6,736(x2) + 8000abfc: 2e813383 ld x7,744(x2) + 8000ac00: 2f013403 ld x8,752(x2) + 8000ac04: 2f813483 ld x9,760(x2) + 8000ac08: 30013703 ld x14,768(x2) + 8000ac0c: 30813783 ld x15,776(x2) + 8000ac10: 31013103 ld x2,784(x2) + 8000ac14: 30200073 mret + +000000008000ac18 : + 8000ac18: 00100413 addi x8,x0,1 + 8000ac1c: 01f77393 andi x7,x14,31 + 8000ac20: 00741433 sll x8,x8,x7 + 8000ac24: 304434f3 csrrc x9,mie,x8 + 8000ac28: 34443473 csrrc x8,mip,x8 + +000000008000ac2c : + 8000ac2c: 01033483 ld x9,16(x6) + 8000ac30: 02848263 beq x9,x8,8000ac54 + 8000ac34: 00040313 addi x6,x8,0 + 8000ac38: 00048213 addi x4,x9,0 + 8000ac3c: 52c003ef jal x7,8000b168 + 8000ac40: 8000ac2c .word 0x8000ac2c + 8000ac44: 00000000 .word 0x00000000 + 8000ac48: 8002210d .word 0x8002210d + 8000ac4c: 00000000 .word 0x00000000 + 8000ac50: 00000341 .word 0x00000341 + 8000ac54: 00000393 addi x7,x0,0 + +000000008000ac58 : + 8000ac58: 00000417 auipc x8,0x0 + 8000ac5c: 03c40413 addi x8,x8,60 # 8000ac94 + 8000ac60: 00740433 add x8,x8,x7 + 8000ac64: 00371393 slli x7,x14,0x3 + 8000ac68: 00740433 add x8,x8,x7 + 8000ac6c: ff847413 andi x8,x8,-8 + 8000ac70: 00043403 ld x8,0(x8) + +000000008000ac74 : + 8000ac74: 00040a63 beq x8,x0,8000ac88 + 8000ac78: 03f41393 slli x7,x8,0x3f + 8000ac7c: 0003d863 bge x7,x0,8000ac8c + 8000ac80: 00145413 srli x8,x8,0x1 + 8000ac84: f6870ae3 beq x14,x8,8000abf8 + 8000ac88: bdcff06f jal x0,8000a064 + +000000008000ac8c : + 8000ac8c: 00040067 jalr x0,0(x8) + +000000008000ac90 : + ... + 8000ac98: 00000001 .word 0x00000001 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000001 .word 0x00000001 + 8000aca4: 00000000 .word 0x00000000 + 8000aca8: 80043000 .word 0x80043000 + ... + 8000acb8: 00000001 .word 0x00000001 + 8000acbc: 00000000 .word 0x00000000 + 8000acc0: 00000001 .word 0x00000001 + 8000acc4: 00000000 .word 0x00000000 + 8000acc8: 80043014 .word 0x80043014 + ... + 8000acd8: 00000001 .word 0x00000001 + 8000acdc: 00000000 .word 0x00000000 + 8000ace0: 00000001 .word 0x00000001 + 8000ace4: 00000000 .word 0x00000000 + 8000ace8: 8004302c .word 0x8004302c + 8000acec: 00000000 .word 0x00000000 + 8000acf0: 00000001 .word 0x00000001 + 8000acf4: 00000000 .word 0x00000000 + 8000acf8: 00000001 .word 0x00000001 + 8000acfc: 00000000 .word 0x00000000 + 8000ad00: 00000001 .word 0x00000001 + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 00000001 .word 0x00000001 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000001 .word 0x00000001 + 8000ad14: 00000000 .word 0x00000000 + 8000ad18: 00000001 .word 0x00000001 + 8000ad1c: 00000000 .word 0x00000000 + 8000ad20: 00000001 .word 0x00000001 + 8000ad24: 00000000 .word 0x00000000 + 8000ad28: 00000001 .word 0x00000001 + 8000ad2c: 00000000 .word 0x00000000 + 8000ad30: 00000001 .word 0x00000001 + 8000ad34: 00000000 .word 0x00000000 + 8000ad38: 00000001 .word 0x00000001 + 8000ad3c: 00000000 .word 0x00000000 + 8000ad40: 00000001 .word 0x00000001 + 8000ad44: 00000000 .word 0x00000000 + 8000ad48: 00000001 .word 0x00000001 + ... + +000000008000ae90 : + 8000ae90: 00000001 .word 0x00000001 + 8000ae94: 00000000 .word 0x00000000 + 8000ae98: 00000003 .word 0x00000003 + 8000ae9c: 00000000 .word 0x00000000 + 8000aea0: 00000005 .word 0x00000005 + 8000aea4: 00000000 .word 0x00000000 + 8000aea8: 00000007 .word 0x00000007 + 8000aeac: 00000000 .word 0x00000000 + 8000aeb0: 00000009 .word 0x00000009 + 8000aeb4: 00000000 .word 0x00000000 + 8000aeb8: 0000000b .word 0x0000000b + 8000aebc: 00000000 .word 0x00000000 + 8000aec0: 0000000d .word 0x0000000d + 8000aec4: 00000000 .word 0x00000000 + 8000aec8: 0000000f .word 0x0000000f + 8000aecc: 00000000 .word 0x00000000 + 8000aed0: 00000011 .word 0x00000011 + 8000aed4: 00000000 .word 0x00000000 + 8000aed8: 00000013 .word 0x00000013 + 8000aedc: 00000000 .word 0x00000000 + 8000aee0: 00000015 .word 0x00000015 + 8000aee4: 00000000 .word 0x00000000 + 8000aee8: 00000017 .word 0x00000017 + 8000aeec: 00000000 .word 0x00000000 + 8000aef0: 00000019 .word 0x00000019 + 8000aef4: 00000000 .word 0x00000000 + 8000aef8: 0000001b .word 0x0000001b + 8000aefc: 00000000 .word 0x00000000 + 8000af00: 0000001d .word 0x0000001d + 8000af04: 00000000 .word 0x00000000 + 8000af08: 0000001f .word 0x0000001f + 8000af0c: 00000000 .word 0x00000000 + 8000af10: 00000021 .word 0x00000021 + 8000af14: 00000000 .word 0x00000000 + 8000af18: 00000023 .word 0x00000023 + 8000af1c: 00000000 .word 0x00000000 + 8000af20: 00000025 .word 0x00000025 + 8000af24: 00000000 .word 0x00000000 + 8000af28: 00000027 .word 0x00000027 + 8000af2c: 00000000 .word 0x00000000 + 8000af30: 00000029 .word 0x00000029 + 8000af34: 00000000 .word 0x00000000 + 8000af38: 0000002b .word 0x0000002b + 8000af3c: 00000000 .word 0x00000000 + 8000af40: 0000002d .word 0x0000002d + 8000af44: 00000000 .word 0x00000000 + 8000af48: 0000002f .word 0x0000002f + ... + +000000008000b090 : + 8000b090: 300023f3 csrrs x7,mstatus,x0 + 8000b094: 00b3d493 srli x9,x7,0xb + 8000b098: 0034f493 andi x9,x9,3 + 8000b09c: ffd48413 addi x8,x9,-3 + 8000b0a0: 341023f3 csrrs x7,mepc,x0 + 8000b0a4: 00000493 addi x9,x0,0 + 8000b0a8: 02040c63 beq x8,x0,8000b0e0 + 8000b0ac: 35810113 addi x2,x2,856 + 8000b0b0: 300023f3 csrrs x7,mstatus,x0 + 8000b0b4: 01839393 slli x7,x7,0x18 + 8000b0b8: 0003da63 bge x7,x0,8000b0cc + +000000008000b0bc : + 8000b0bc: 35810113 addi x2,x2,856 + 8000b0c0: 5b013783 ld x15,1456(x2) + 8000b0c4: ca810113 addi x2,x2,-856 + 8000b0c8: 0080006f jal x0,8000b0d0 + +000000008000b0cc : + 8000b0cc: f0013783 ld x15,-256(x2) + 8000b0d0: 341023f3 csrrs x7,mepc,x0 + 8000b0d4: 40f383b3 sub x7,x7,x15 + 8000b0d8: ca810113 addi x2,x2,-856 + 8000b0dc: 25813483 ld x9,600(x2) + +000000008000b0e0 : + 8000b0e0: 007483b3 add x7,x9,x7 + 8000b0e4: 2e013303 ld x6,736(x2) + 8000b0e8: 2f013403 ld x8,752(x2) + 8000b0ec: 2f813483 ld x9,760(x2) + 8000b0f0: 30013703 ld x14,768(x2) + 8000b0f4: 30813783 ld x15,776(x2) + 8000b0f8: 31013103 ld x2,784(x2) + 8000b0fc: 00438067 jalr x0,4(x7) + +000000008000b100 : + 8000b100: 00016217 auipc x4,0x16 + 8000b104: 28020213 addi x4,x4,640 # 80021380 + 8000b108: 02523423 sd x5,40(x4) # 28 + 8000b10c: 00123423 sd x1,8(x4) # 8 + 8000b110: 00023023 sd x0,0(x4) # 0 + 8000b114: 0880006f jal x0,8000b19c + +000000008000b118 : + 8000b118: 00016397 auipc x7,0x16 + 8000b11c: 26838393 addi x7,x7,616 # 80021380 + 8000b120: 0483b023 sd x8,64(x7) + 8000b124: 0243b023 sd x4,32(x7) + 8000b128: 0253b423 sd x5,40(x7) + 8000b12c: 0013b423 sd x1,8(x7) + 8000b130: 0003b023 sd x0,0(x7) + 8000b134: 00038213 addi x4,x7,0 + 8000b138: 00040293 addi x5,x8,0 + 8000b13c: 0600006f jal x0,8000b19c + +000000008000b140 : + 8000b140: 00016697 auipc x13,0x16 + 8000b144: 24068693 addi x13,x13,576 # 80021380 + 8000b148: 06e6b823 sd x14,112(x13) + 8000b14c: 0246b023 sd x4,32(x13) + 8000b150: 0256b423 sd x5,40(x13) + 8000b154: 0016b423 sd x1,8(x13) + 8000b158: 0006b023 sd x0,0(x13) + 8000b15c: 00068213 addi x4,x13,0 + 8000b160: 00070293 addi x5,x14,0 + 8000b164: 0380006f jal x0,8000b19c + +000000008000b168 : + 8000b168: 00016497 auipc x9,0x16 + 8000b16c: 21848493 addi x9,x9,536 # 80021380 + 8000b170: 0674b423 sd x7,104(x9) + 8000b174: 0244b023 sd x4,32(x9) + 8000b178: 0254b423 sd x5,40(x9) + 8000b17c: 0014b423 sd x1,8(x9) + 8000b180: 00300093 addi x1,x0,3 + 8000b184: 0014b023 sd x1,0(x9) + 8000b188: 1064b823 sd x6,272(x9) + 8000b18c: 1044bc23 sd x4,280(x9) + 8000b190: 00048213 addi x4,x9,0 + 8000b194: 00038293 addi x5,x7,0 + 8000b198: 0040006f jal x0,8000b19c + +000000008000b19c : + 8000b19c: 00223823 sd x2,16(x4) # 10 + 8000b1a0: 00323c23 sd x3,24(x4) # 18 + 8000b1a4: 02623823 sd x6,48(x4) # 30 + 8000b1a8: 02723c23 sd x7,56(x4) # 38 + 8000b1ac: 04823023 sd x8,64(x4) # 40 + 8000b1b0: 04923423 sd x9,72(x4) # 48 + 8000b1b4: 04a23823 sd x10,80(x4) # 50 + 8000b1b8: 04b23c23 sd x11,88(x4) # 58 + 8000b1bc: 06c23023 sd x12,96(x4) # 60 + 8000b1c0: 06d23423 sd x13,104(x4) # 68 + 8000b1c4: 06e23823 sd x14,112(x4) # 70 + 8000b1c8: 06f23c23 sd x15,120(x4) # 78 + 8000b1cc: 09023023 sd x16,128(x4) # 80 + 8000b1d0: 09123423 sd x17,136(x4) # 88 + 8000b1d4: 09223823 sd x18,144(x4) # 90 + 8000b1d8: 09323c23 sd x19,152(x4) # 98 + 8000b1dc: 0b423023 sd x20,160(x4) # a0 + 8000b1e0: 0b523423 sd x21,168(x4) # a8 + 8000b1e4: 0b623823 sd x22,176(x4) # b0 + 8000b1e8: 0b723c23 sd x23,184(x4) # b8 + 8000b1ec: 0d823023 sd x24,192(x4) # c0 + 8000b1f0: 0d923423 sd x25,200(x4) # c8 + 8000b1f4: 0da23823 sd x26,208(x4) # d0 + 8000b1f8: 0db23c23 sd x27,216(x4) # d8 + 8000b1fc: 0fc23023 sd x28,224(x4) # e0 + 8000b200: 0fd23423 sd x29,232(x4) # e8 + 8000b204: 0fe23823 sd x30,240(x4) # f0 + 8000b208: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b20c : + 8000b20c: 00016497 auipc x9,0x16 + 8000b210: 1744a483 lw x9,372(x9) # 80021380 + 8000b214: 00300513 addi x10,x0,3 + 8000b218: 18a48a63 beq x9,x10,8000b3ac + +000000008000b21c : + 8000b21c: ffa2d303 lhu x6,-6(x5) + 8000b220: ff82d383 lhu x7,-8(x5) + 8000b224: 01031313 slli x6,x6,0x10 + 8000b228: 00736333 or x6,x6,x7 + 8000b22c: 00f35393 srli x7,x6,0xf + 8000b230: 01f3f393 andi x7,x7,31 + 8000b234: 01435413 srli x8,x6,0x14 + 8000b238: 01f47413 andi x8,x8,31 + 8000b23c: 10822223 sw x8,260(x4) # 104 + 8000b240: 00341313 slli x6,x8,0x3 + 8000b244: 00620333 add x6,x4,x6 + 8000b248: 00033303 ld x6,0(x6) + 8000b24c: 10623823 sd x6,272(x4) # 110 + 8000b250: ff62d303 lhu x6,-10(x5) + 8000b254: ff42d383 lhu x7,-12(x5) + 8000b258: 01031313 slli x6,x6,0x10 + 8000b25c: 00736333 or x6,x6,x7 + 8000b260: 00030513 addi x10,x6,0 + 8000b264: 07f37413 andi x8,x6,127 + 8000b268: 00300493 addi x9,x0,3 + 8000b26c: 0c941463 bne x8,x9,8000b334 + 8000b270: 00c35413 srli x8,x6,0xc + 8000b274: 00747413 andi x8,x8,7 + 8000b278: 00300493 addi x9,x0,3 + 8000b27c: 0a941c63 bne x8,x9,8000b334 + 8000b280: 41435393 srai x7,x6,0x14 + 8000b284: 00f35313 srli x6,x6,0xf + 8000b288: 01f37313 andi x6,x6,31 + 8000b28c: 00331313 slli x6,x6,0x3 + 8000b290: 00620333 add x6,x4,x6 + 8000b294: 00033303 ld x6,0(x6) + 8000b298: 00730333 add x6,x6,x7 + 8000b29c: 00737413 andi x8,x6,7 + 8000b2a0: 0c041663 bne x8,x0,8000b36c + 8000b2a4: 00000013 addi x0,x0,0 + 8000b2a8: 00000013 addi x0,x0,0 + 8000b2ac: 00000013 addi x0,x0,0 + 8000b2b0: 00000013 addi x0,x0,0 + 8000b2b4: 00000013 addi x0,x0,0 + 8000b2b8: 00000013 addi x0,x0,0 + 8000b2bc: 00000013 addi x0,x0,0 + 8000b2c0: 00018417 auipc x8,0x18 + 8000b2c4: eb040413 addi x8,x8,-336 # 80023170 + 8000b2c8: 00000013 addi x0,x0,0 + 8000b2cc: 00000013 addi x0,x0,0 + 8000b2d0: 00000013 addi x0,x0,0 + 8000b2d4: 00000013 addi x0,x0,0 + 8000b2d8: 00000013 addi x0,x0,0 + 8000b2dc: 00000013 addi x0,x0,0 + 8000b2e0: 08836663 bltu x6,x8,8000b36c + 8000b2e4: 00000013 addi x0,x0,0 + 8000b2e8: 00000013 addi x0,x0,0 + 8000b2ec: 00000013 addi x0,x0,0 + 8000b2f0: 00000013 addi x0,x0,0 + 8000b2f4: 00000013 addi x0,x0,0 + 8000b2f8: 00000013 addi x0,x0,0 + 8000b2fc: 00000013 addi x0,x0,0 + 8000b300: 00037417 auipc x8,0x37 + 8000b304: bb040413 addi x8,x8,-1104 # 80041eb0 + 8000b308: 00000013 addi x0,x0,0 + 8000b30c: 00000013 addi x0,x0,0 + 8000b310: 00000013 addi x0,x0,0 + 8000b314: 00000013 addi x0,x0,0 + 8000b318: 00000013 addi x0,x0,0 + 8000b31c: 00000013 addi x0,x0,0 + 8000b320: ff840413 addi x8,x8,-8 + 8000b324: 04646463 bltu x8,x6,8000b36c + 8000b328: 00033303 ld x6,0(x6) + 8000b32c: 10623c23 sd x6,280(x4) # 118 + 8000b330: 3880006f jal x0,8000b6b8 + +000000008000b334 : + 8000b334: 00100413 addi x8,x0,1 + 8000b338: 00000013 addi x0,x0,0 + 8000b33c: 00000013 addi x0,x0,0 + 8000b340: 00016497 auipc x9,0x16 + 8000b344: 16848493 addi x9,x9,360 # 800214a8 + 8000b348: 00000013 addi x0,x0,0 + 8000b34c: 00000013 addi x0,x0,0 + 8000b350: 00000013 addi x0,x0,0 + 8000b354: 00000013 addi x0,x0,0 + 8000b358: 00000013 addi x0,x0,0 + 8000b35c: 00000013 addi x0,x0,0 + 8000b360: 0084a023 sw x8,0(x9) + 8000b364: 10a23c23 sd x10,280(x4) # 118 + 8000b368: 3500006f jal x0,8000b6b8 + +000000008000b36c : + 8000b36c: 00200413 addi x8,x0,2 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00016497 auipc x9,0x16 + 8000b384: 12848493 addi x9,x9,296 # 800214a8 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 0084a023 sw x8,0(x9) + 8000b3a4: 10623c23 sd x6,280(x4) # 118 + 8000b3a8: 3100006f jal x0,8000b6b8 + +000000008000b3ac : + 8000b3ac: 0082e303 lwu x6,8(x5) + 8000b3b0: 00c2a383 lw x7,12(x5) + 8000b3b4: 02039393 slli x7,x7,0x20 + 8000b3b8: 00736333 or x6,x6,x7 + 8000b3bc: 00016817 auipc x16,0x16 + 8000b3c0: 0fc80813 addi x16,x16,252 # 800214b8 + 8000b3c4: 00683023 sd x6,0(x16) + 8000b3c8: 0002e303 lwu x6,0(x5) + 8000b3cc: 0042a383 lw x7,4(x5) + 8000b3d0: 02039393 slli x7,x7,0x20 + 8000b3d4: 00736333 or x6,x6,x7 + 8000b3d8: 10623423 sd x6,264(x4) # 108 + 8000b3dc: 00016817 auipc x16,0x16 + 8000b3e0: 0dc80813 addi x16,x16,220 # 800214b8 + 8000b3e4: 00083303 ld x6,0(x16) + 8000b3e8: 00017397 auipc x7,0x17 + 8000b3ec: 8ab38393 addi x7,x7,-1877 # 80021c93 + 8000b3f0: 28730463 beq x6,x7,8000b678 + 8000b3f4: 00000413 addi x8,x0,0 + 8000b3f8: 00016817 auipc x16,0x16 + 8000b3fc: 0b880813 addi x16,x16,184 # 800214b0 + 8000b400: 00882023 sw x8,0(x16) + 8000b404: 00017397 auipc x7,0x17 + 8000b408: 8a638393 addi x7,x7,-1882 # 80021caa + 8000b40c: 00731863 bne x6,x7,8000b41c + 8000b410: 00100413 addi x8,x0,1 + 8000b414: 00000493 addi x9,x0,0 + 8000b418: 2740006f jal x0,8000b68c + 8000b41c: 00017397 auipc x7,0x17 + 8000b420: 99038393 addi x7,x7,-1648 # 80021dac + 8000b424: 00731863 bne x6,x7,8000b434 + 8000b428: 00200413 addi x8,x0,2 + 8000b42c: 00000493 addi x9,x0,0 + 8000b430: 25c0006f jal x0,8000b68c + 8000b434: 00017397 auipc x7,0x17 + 8000b438: a7338393 addi x7,x7,-1421 # 80021ea7 + 8000b43c: 00731863 bne x6,x7,8000b44c + 8000b440: 00300413 addi x8,x0,3 + 8000b444: 00000493 addi x9,x0,0 + 8000b448: 2440006f jal x0,8000b68c + 8000b44c: 00017397 auipc x7,0x17 + 8000b450: b4e38393 addi x7,x7,-1202 # 80021f9a + 8000b454: 00731863 bne x6,x7,8000b464 + 8000b458: 00400413 addi x8,x0,4 + 8000b45c: 00000493 addi x9,x0,0 + 8000b460: 22c0006f jal x0,8000b68c + 8000b464: 00017397 auipc x7,0x17 + 8000b468: ca938393 addi x7,x7,-855 # 8002210d + 8000b46c: 00731863 bne x6,x7,8000b47c + 8000b470: 00500413 addi x8,x0,5 + 8000b474: 00000493 addi x9,x0,0 + 8000b478: 2140006f jal x0,8000b68c + 8000b47c: 00017397 auipc x7,0x17 + 8000b480: c1538393 addi x7,x7,-1003 # 80022091 + 8000b484: 00731863 bne x6,x7,8000b494 + 8000b488: 00600413 addi x8,x0,6 + 8000b48c: 00000493 addi x9,x0,0 + 8000b490: 1fc0006f jal x0,8000b68c + 8000b494: 00017397 auipc x7,0x17 + 8000b498: c3b38393 addi x7,x7,-965 # 800220cf + 8000b49c: 00731863 bne x6,x7,8000b4ac + 8000b4a0: 00700413 addi x8,x0,7 + 8000b4a4: 00000493 addi x9,x0,0 + 8000b4a8: 1e40006f jal x0,8000b68c + 8000b4ac: 00017397 auipc x7,0x17 + 8000b4b0: 83e38393 addi x7,x7,-1986 # 80021cea + 8000b4b4: 00731863 bne x6,x7,8000b4c4 + 8000b4b8: 00100413 addi x8,x0,1 + 8000b4bc: 00100493 addi x9,x0,1 + 8000b4c0: 1cc0006f jal x0,8000b68c + 8000b4c4: 00017397 auipc x7,0x17 + 8000b4c8: 92638393 addi x7,x7,-1754 # 80021dea + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00200413 addi x8,x0,2 + 8000b4d4: 00100493 addi x9,x0,1 + 8000b4d8: 1b40006f jal x0,8000b68c + 8000b4dc: 00017397 auipc x7,0x17 + 8000b4e0: a0738393 addi x7,x7,-1529 # 80021ee3 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00300413 addi x8,x0,3 + 8000b4ec: 00100493 addi x9,x0,1 + 8000b4f0: 19c0006f jal x0,8000b68c + 8000b4f4: 00017397 auipc x7,0x17 + 8000b4f8: ae338393 addi x7,x7,-1309 # 80021fd7 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00400413 addi x8,x0,4 + 8000b504: 00100493 addi x9,x0,1 + 8000b508: 1840006f jal x0,8000b68c + 8000b50c: 00017397 auipc x7,0x17 + 8000b510: c3c38393 addi x7,x7,-964 # 80022148 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00500413 addi x8,x0,5 + 8000b51c: 00100493 addi x9,x0,1 + 8000b520: 16c0006f jal x0,8000b68c + 8000b524: 00017397 auipc x7,0x17 + 8000b528: 80638393 addi x7,x7,-2042 # 80021d2a + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00100413 addi x8,x0,1 + 8000b534: 00200493 addi x9,x0,2 + 8000b538: 1540006f jal x0,8000b68c + 8000b53c: 00017397 auipc x7,0x17 + 8000b540: 8ec38393 addi x7,x7,-1812 # 80021e28 + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00200413 addi x8,x0,2 + 8000b54c: 00200493 addi x9,x0,2 + 8000b550: 13c0006f jal x0,8000b68c + 8000b554: 00017397 auipc x7,0x17 + 8000b558: 9cb38393 addi x7,x7,-1589 # 80021f1f + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00300413 addi x8,x0,3 + 8000b564: 00200493 addi x9,x0,2 + 8000b568: 1240006f jal x0,8000b68c + 8000b56c: 00017397 auipc x7,0x17 + 8000b570: aa838393 addi x7,x7,-1368 # 80022014 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00400413 addi x8,x0,4 + 8000b57c: 00200493 addi x9,x0,2 + 8000b580: 10c0006f jal x0,8000b68c + 8000b584: 00017397 auipc x7,0x17 + 8000b588: bff38393 addi x7,x7,-1025 # 80022183 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00500413 addi x8,x0,5 + 8000b594: 00200493 addi x9,x0,2 + 8000b598: 0f40006f jal x0,8000b68c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 7cf38393 addi x7,x7,1999 # 80021d6b + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00100413 addi x8,x0,1 + 8000b5ac: 00300493 addi x9,x0,3 + 8000b5b0: 0dc0006f jal x0,8000b68c + 8000b5b4: 00017397 auipc x7,0x17 + 8000b5b8: 8b338393 addi x7,x7,-1869 # 80021e67 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00200413 addi x8,x0,2 + 8000b5c4: 00300493 addi x9,x0,3 + 8000b5c8: 0c40006f jal x0,8000b68c + 8000b5cc: 00017397 auipc x7,0x17 + 8000b5d0: 99038393 addi x7,x7,-1648 # 80021f5c + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00300413 addi x8,x0,3 + 8000b5dc: 00300493 addi x9,x0,3 + 8000b5e0: 0ac0006f jal x0,8000b68c + 8000b5e4: 00017397 auipc x7,0x17 + 8000b5e8: a6e38393 addi x7,x7,-1426 # 80022052 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00400413 addi x8,x0,4 + 8000b5f4: 00300493 addi x9,x0,3 + 8000b5f8: 0940006f jal x0,8000b68c + 8000b5fc: 00017397 auipc x7,0x17 + 8000b600: bc338393 addi x7,x7,-1085 # 800221bf + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00500413 addi x8,x0,5 + 8000b60c: 00300493 addi x9,x0,3 + 8000b610: 07c0006f jal x0,8000b68c + 8000b614: 00017397 auipc x7,0x17 + 8000b618: be838393 addi x7,x7,-1048 # 800221fc + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00800413 addi x8,x0,8 + 8000b624: 00000493 addi x9,x0,0 + 8000b628: 0640006f jal x0,8000b68c + 8000b62c: 00017397 auipc x7,0x17 + 8000b630: c1f38393 addi x7,x7,-993 # 8002224b + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00800413 addi x8,x0,8 + 8000b63c: 00000493 addi x9,x0,0 + 8000b640: 04c0006f jal x0,8000b68c + 8000b644: 00017397 auipc x7,0x17 + 8000b648: d0238393 addi x7,x7,-766 # 80022346 + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00800413 addi x8,x0,8 + 8000b654: 00100493 addi x9,x0,1 + 8000b658: 0340006f jal x0,8000b68c + 8000b65c: 00017397 auipc x7,0x17 + 8000b660: de638393 addi x7,x7,-538 # 80022442 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00800413 addi x8,x0,8 + 8000b66c: 00200493 addi x9,x0,2 + 8000b670: 01c0006f jal x0,8000b68c + 8000b674: 0340006f jal x0,8000b6a8 + +000000008000b678 : + 8000b678: 00900413 addi x8,x0,9 + 8000b67c: 00016817 auipc x16,0x16 + 8000b680: e3480813 addi x16,x16,-460 # 800214b0 + 8000b684: 00882023 sw x8,0(x16) + 8000b688: 0300006f jal x0,8000b6b8 + +000000008000b68c : + 8000b68c: 00016817 auipc x16,0x16 + 8000b690: e2480813 addi x16,x16,-476 # 800214b0 + 8000b694: 00882023 sw x8,0(x16) + 8000b698: 00016817 auipc x16,0x16 + 8000b69c: e1c80813 addi x16,x16,-484 # 800214b4 + 8000b6a0: 00982023 sw x9,0(x16) + 8000b6a4: 0140006f jal x0,8000b6b8 + +000000008000b6a8 : + 8000b6a8: 00016817 auipc x16,0x16 + 8000b6ac: e0880813 addi x16,x16,-504 # 800214b0 + 8000b6b0: 00082023 sw x0,0(x16) + 8000b6b4: 0040006f jal x0,8000b6b8 + +000000008000b6b8 : + 8000b6b8: 0002e303 lwu x6,0(x5) + 8000b6bc: 0042a383 lw x7,4(x5) + 8000b6c0: 02039393 slli x7,x7,0x20 + 8000b6c4: 00736333 or x6,x6,x7 + 8000b6c8: 10623423 sd x6,264(x4) # 108 + 8000b6cc: 00035383 lhu x7,0(x6) + 8000b6d0: 0033f413 andi x8,x7,3 + 8000b6d4: 00300493 addi x9,x0,3 + 8000b6d8: 00941863 bne x8,x9,8000b6e8 + 8000b6dc: 00235403 lhu x8,2(x6) + 8000b6e0: 01041413 slli x8,x8,0x10 + 8000b6e4: 0083e3b3 or x7,x7,x8 + 8000b6e8: 10722023 sw x7,256(x4) # 100 + 8000b6ec: 0082e303 lwu x6,8(x5) + 8000b6f0: 00c2a383 lw x7,12(x5) + 8000b6f4: 02039393 slli x7,x7,0x20 + 8000b6f8: 00736333 or x6,x6,x7 + 8000b6fc: 12623023 sd x6,288(x4) # 120 + +000000008000b700 : + 8000b700: 00016517 auipc x10,0x16 + 8000b704: 3a250513 addi x10,x10,930 # 80021aa2 + 8000b708: 00000013 addi x0,x0,0 + 8000b70c: 00000013 addi x0,x0,0 + 8000b710: 00000013 addi x0,x0,0 + 8000b714: 00000013 addi x0,x0,0 + 8000b718: 00000013 addi x0,x0,0 + 8000b71c: 00000013 addi x0,x0,0 + 8000b720: 00038097 auipc x1,0x38 + 8000b724: e84080e7 jalr x1,-380(x1) # 800435a4 + 8000b728: 00000013 addi x0,x0,0 + 8000b72c: 00000013 addi x0,x0,0 + 8000b730: 00000013 addi x0,x0,0 + 8000b734: 00000013 addi x0,x0,0 + 8000b738: 00000013 addi x0,x0,0 + 8000b73c: 00000013 addi x0,x0,0 + 8000b740: 00016517 auipc x10,0x16 + 8000b744: 39f50513 addi x10,x10,927 # 80021adf + 8000b748: 00000013 addi x0,x0,0 + 8000b74c: 00000013 addi x0,x0,0 + 8000b750: 00000013 addi x0,x0,0 + 8000b754: 00000013 addi x0,x0,0 + 8000b758: 00000013 addi x0,x0,0 + 8000b75c: 00000013 addi x0,x0,0 + 8000b760: 00038097 auipc x1,0x38 + 8000b764: e44080e7 jalr x1,-444(x1) # 800435a4 + +000000008000b768 : + 8000b768: 00000013 addi x0,x0,0 + 8000b76c: 00000013 addi x0,x0,0 + 8000b770: 00000013 addi x0,x0,0 + 8000b774: 00000013 addi x0,x0,0 + 8000b778: 00000013 addi x0,x0,0 + 8000b77c: 00000013 addi x0,x0,0 + 8000b780: 00016517 auipc x10,0x16 + 8000b784: 41650513 addi x10,x10,1046 # 80021b96 + 8000b788: 00000013 addi x0,x0,0 + 8000b78c: 00000013 addi x0,x0,0 + 8000b790: 00000013 addi x0,x0,0 + 8000b794: 00000013 addi x0,x0,0 + 8000b798: 00000013 addi x0,x0,0 + 8000b79c: 00000013 addi x0,x0,0 + 8000b7a0: 00038097 auipc x1,0x38 + 8000b7a4: e04080e7 jalr x1,-508(x1) # 800435a4 + +000000008000b7a8 : + 8000b7a8: 00016517 auipc x10,0x16 + 8000b7ac: cf853503 ld x10,-776(x10) # 800214a0 + 8000b7b0: 00038097 auipc x1,0x38 + 8000b7b4: df4080e7 jalr x1,-524(x1) # 800435a4 + +000000008000b7b8 : + 8000b7b8: 00000013 addi x0,x0,0 + 8000b7bc: 00000013 addi x0,x0,0 + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: 3e850513 addi x10,x10,1000 # 80021ba8 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00038097 auipc x1,0x38 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800435a4 + 8000b7e8: 00016517 auipc x10,0x16 + 8000b7ec: b9852503 lw x10,-1128(x10) # 80021380 + 8000b7f0: 00300593 addi x11,x0,3 + 8000b7f4: 52b50c63 beq x10,x11,8000bd2c + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: 3aa50513 addi x10,x10,938 # 80021baa + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00038097 auipc x1,0x38 + 8000b824: d84080e7 jalr x1,-636(x1) # 800435a4 + 8000b828: 00016517 auipc x10,0x16 + 8000b82c: c5852503 lw x10,-936(x10) # 80021480 + 8000b830: 02000593 addi x11,x0,32 + 8000b834: 00357613 andi x12,x10,3 + 8000b838: 00300693 addi x13,x0,3 + 8000b83c: 00d60463 beq x12,x13,8000b844 + 8000b840: 01000593 addi x11,x0,16 + 8000b844: 3f4010ef jal x1,8000cc38 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00016517 auipc x10,0x16 + 8000b864: c8850513 addi x10,x10,-888 # 800214e8 + 8000b868: 00000013 addi x0,x0,0 + 8000b86c: 00000013 addi x0,x0,0 + 8000b870: 00000013 addi x0,x0,0 + 8000b874: 00000013 addi x0,x0,0 + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00038097 auipc x1,0x38 + 8000b884: d24080e7 jalr x1,-732(x1) # 800435a4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00016517 auipc x10,0x16 + 8000b8a4: 31e50513 addi x10,x10,798 # 80021bbe + 8000b8a8: 00000013 addi x0,x0,0 + 8000b8ac: 00000013 addi x0,x0,0 + 8000b8b0: 00000013 addi x0,x0,0 + 8000b8b4: 00000013 addi x0,x0,0 + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00038097 auipc x1,0x38 + 8000b8c4: ce4080e7 jalr x1,-796(x1) # 800435a4 + 8000b8c8: 00016517 auipc x10,0x16 + 8000b8cc: bc053503 ld x10,-1088(x10) # 80021488 + 8000b8d0: 04000593 addi x11,x0,64 + 8000b8d4: 364010ef jal x1,8000cc38 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00016517 auipc x10,0x16 + 8000b8e4: c0850513 addi x10,x10,-1016 # 800214e8 + 8000b8e8: 00000013 addi x0,x0,0 + 8000b8ec: 00000013 addi x0,x0,0 + 8000b8f0: 00000013 addi x0,x0,0 + 8000b8f4: 00000013 addi x0,x0,0 + 8000b8f8: 00000013 addi x0,x0,0 + 8000b8fc: 00000013 addi x0,x0,0 + 8000b900: 00038097 auipc x1,0x38 + 8000b904: ca4080e7 jalr x1,-860(x1) # 800435a4 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00017517 auipc x10,0x17 + 8000b924: cd550513 addi x10,x10,-811 # 800225f5 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00038097 auipc x1,0x38 + 8000b944: c64080e7 jalr x1,-924(x1) # 800435a4 + 8000b948: 00016517 auipc x10,0x16 + 8000b94c: a3852503 lw x10,-1480(x10) # 80021380 + 8000b950: 00050663 beq x10,x0,8000b95c + 8000b954: 00300593 addi x11,x0,3 + 8000b958: 04b51063 bne x10,x11,8000b998 + 8000b95c: 07800593 addi x11,x0,120 + 8000b960: 00016617 auipc x12,0x16 + 8000b964: b8860613 addi x12,x12,-1144 # 800214e8 + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00b60023 sb x11,0(x12) + 8000b984: 00160613 addi x12,x12,1 + 8000b988: 00016517 auipc x10,0x16 + 8000b98c: afc52503 lw x10,-1284(x10) # 80021484 + 8000b990: 324010ef jal x1,8000ccb4 + 8000b994: 1180006f jal x0,8000baac + +000000008000b998 : + 8000b998: 00100593 addi x11,x0,1 + 8000b99c: 04b50863 beq x10,x11,8000b9ec + 8000b9a0: 00400593 addi x11,x0,4 + 8000b9a4: 08b50a63 beq x10,x11,8000ba38 + 8000b9a8: 00500593 addi x11,x0,5 + 8000b9ac: 0cb50463 beq x10,x11,8000ba74 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00017517 auipc x10,0x17 + 8000b9c4: d4b50513 addi x10,x10,-693 # 8002270b + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00038097 auipc x1,0x38 + 8000b9e4: bc4080e7 jalr x1,-1084(x1) # 800435a4 + 8000b9e8: 1000006f jal x0,8000bae8 + +000000008000b9ec : + 8000b9ec: 06600593 addi x11,x0,102 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00016617 auipc x12,0x16 + 8000ba04: ae860613 addi x12,x12,-1304 # 800214e8 + 8000ba08: 00000013 addi x0,x0,0 + 8000ba0c: 00000013 addi x0,x0,0 + 8000ba10: 00000013 addi x0,x0,0 + 8000ba14: 00000013 addi x0,x0,0 + 8000ba18: 00000013 addi x0,x0,0 + 8000ba1c: 00000013 addi x0,x0,0 + 8000ba20: 00b60023 sb x11,0(x12) + 8000ba24: 00160613 addi x12,x12,1 + 8000ba28: 00016517 auipc x10,0x16 + 8000ba2c: a5c52503 lw x10,-1444(x10) # 80021484 + 8000ba30: 284010ef jal x1,8000ccb4 + 8000ba34: 0780006f jal x0,8000baac + +000000008000ba38 : + 8000ba38: 07600593 addi x11,x0,118 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00016617 auipc x12,0x16 + 8000ba44: aa860613 addi x12,x12,-1368 # 800214e8 + 8000ba48: 00000013 addi x0,x0,0 + 8000ba4c: 00000013 addi x0,x0,0 + 8000ba50: 00000013 addi x0,x0,0 + 8000ba54: 00000013 addi x0,x0,0 + 8000ba58: 00000013 addi x0,x0,0 + 8000ba5c: 00000013 addi x0,x0,0 + 8000ba60: 00b60023 sb x11,0(x12) + 8000ba64: 00160613 addi x12,x12,1 + 8000ba68: 00016517 auipc x10,0x16 + 8000ba6c: a1c52503 lw x10,-1508(x10) # 80021484 + 8000ba70: 244010ef jal x1,8000ccb4 + +000000008000ba74 : + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00017517 auipc x10,0x17 + 8000ba84: b6e50513 addi x10,x10,-1170 # 800225ee + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00038097 auipc x1,0x38 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800435a4 + 8000baa8: 0400006f jal x0,8000bae8 + +000000008000baac : + 8000baac: 00000013 addi x0,x0,0 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00016517 auipc x10,0x16 + 8000bac4: a2850513 addi x10,x10,-1496 # 800214e8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00038097 auipc x1,0x38 + 8000bae4: ac4080e7 jalr x1,-1340(x1) # 800435a4 + +000000008000bae8 : + 8000bae8: 00000013 addi x0,x0,0 + 8000baec: 00000013 addi x0,x0,0 + 8000baf0: 00000013 addi x0,x0,0 + 8000baf4: 00000013 addi x0,x0,0 + 8000baf8: 00000013 addi x0,x0,0 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00017517 auipc x10,0x17 + 8000bb04: b0650513 addi x10,x10,-1274 # 80022606 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00038097 auipc x1,0x38 + 8000bb24: a84080e7 jalr x1,-1404(x1) # 800435a4 + 8000bb28: 00016517 auipc x10,0x16 + 8000bb2c: 85852503 lw x10,-1960(x10) # 80021380 + 8000bb30: 00100593 addi x11,x0,1 + 8000bb34: 00b51c63 bne x10,x11,8000bb4c + 8000bb38: 00016517 auipc x10,0x16 + 8000bb3c: 95853503 ld x10,-1704(x10) # 80021490 + 8000bb40: 04000593 addi x11,x0,64 + 8000bb44: 0f4010ef jal x1,8000cc38 + 8000bb48: 0140006f jal x0,8000bb5c + +000000008000bb4c : + 8000bb4c: 00016517 auipc x10,0x16 + 8000bb50: 94453503 ld x10,-1724(x10) # 80021490 + 8000bb54: 04000593 addi x11,x0,64 + 8000bb58: 0e0010ef jal x1,8000cc38 + +000000008000bb5c : + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00016517 auipc x10,0x16 + 8000bb64: 98850513 addi x10,x10,-1656 # 800214e8 + 8000bb68: 00000013 addi x0,x0,0 + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00038097 auipc x1,0x38 + 8000bb84: a24080e7 jalr x1,-1500(x1) # 800435a4 + 8000bb88: 00016517 auipc x10,0x16 + 8000bb8c: 92052503 lw x10,-1760(x10) # 800214a8 + 8000bb90: 08051e63 bne x10,x0,8000bc2c + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00017517 auipc x10,0x17 + 8000bba4: a7d50513 addi x10,x10,-1411 # 8002261d + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00038097 auipc x1,0x38 + 8000bbc4: 9e4080e7 jalr x1,-1564(x1) # 800435a4 + 8000bbc8: 00015517 auipc x10,0x15 + 8000bbcc: 7b852503 lw x10,1976(x10) # 80021380 + 8000bbd0: 00100593 addi x11,x0,1 + 8000bbd4: 00b51c63 bne x10,x11,8000bbec + 8000bbd8: 00016517 auipc x10,0x16 + 8000bbdc: 8c053503 ld x10,-1856(x10) # 80021498 + 8000bbe0: 04000593 addi x11,x0,64 + 8000bbe4: 054010ef jal x1,8000cc38 + 8000bbe8: 0140006f jal x0,8000bbfc + +000000008000bbec : + 8000bbec: 00016517 auipc x10,0x16 + 8000bbf0: 8ac53503 ld x10,-1876(x10) # 80021498 + 8000bbf4: 04000593 addi x11,x0,64 + 8000bbf8: 040010ef jal x1,8000cc38 + +000000008000bbfc : + 8000bbfc: 00000013 addi x0,x0,0 + 8000bc00: 00016517 auipc x10,0x16 + 8000bc04: 8e850513 addi x10,x10,-1816 # 800214e8 + 8000bc08: 00000013 addi x0,x0,0 + 8000bc0c: 00000013 addi x0,x0,0 + 8000bc10: 00000013 addi x0,x0,0 + 8000bc14: 00000013 addi x0,x0,0 + 8000bc18: 00000013 addi x0,x0,0 + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00038097 auipc x1,0x38 + 8000bc24: 984080e7 jalr x1,-1660(x1) # 800435a4 + 8000bc28: 5bd0006f jal x0,8000c9e4 + +000000008000bc2c : + 8000bc2c: 00100593 addi x11,x0,1 + 8000bc30: 06b51e63 bne x10,x11,8000bcac + +000000008000bc34 : + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00017517 auipc x10,0x17 + 8000bc44: 9f450513 addi x10,x10,-1548 # 80022634 + 8000bc48: 00000013 addi x0,x0,0 + 8000bc4c: 00000013 addi x0,x0,0 + 8000bc50: 00000013 addi x0,x0,0 + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00038097 auipc x1,0x38 + 8000bc64: 944080e7 jalr x1,-1724(x1) # 800435a4 + 8000bc68: 00016517 auipc x10,0x16 + 8000bc6c: 83053503 ld x10,-2000(x10) # 80021498 + 8000bc70: 02000593 addi x11,x0,32 + 8000bc74: 7c5000ef jal x1,8000cc38 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00016517 auipc x10,0x16 + 8000bc84: 86850513 addi x10,x10,-1944 # 800214e8 + 8000bc88: 00000013 addi x0,x0,0 + 8000bc8c: 00000013 addi x0,x0,0 + 8000bc90: 00000013 addi x0,x0,0 + 8000bc94: 00000013 addi x0,x0,0 + 8000bc98: 00000013 addi x0,x0,0 + 8000bc9c: 00000013 addi x0,x0,0 + 8000bca0: 00038097 auipc x1,0x38 + 8000bca4: 904080e7 jalr x1,-1788(x1) # 800435a4 + 8000bca8: 53d0006f jal x0,8000c9e4 + +000000008000bcac : + 8000bcac: 00000013 addi x0,x0,0 + 8000bcb0: 00000013 addi x0,x0,0 + 8000bcb4: 00000013 addi x0,x0,0 + 8000bcb8: 00000013 addi x0,x0,0 + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00017517 auipc x10,0x17 + 8000bcc4: 9d250513 addi x10,x10,-1582 # 80022692 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00038097 auipc x1,0x38 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800435a4 + 8000bce8: 00015517 auipc x10,0x15 + 8000bcec: 7b053503 ld x10,1968(x10) # 80021498 + 8000bcf0: 04000593 addi x11,x0,64 + 8000bcf4: 745000ef jal x1,8000cc38 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00015517 auipc x10,0x15 + 8000bd04: 7e850513 addi x10,x10,2024 # 800214e8 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00038097 auipc x1,0x38 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800435a4 + 8000bd28: 4bd0006f jal x0,8000c9e4 + +000000008000bd2c : + 8000bd2c: 00015417 auipc x8,0x15 + 8000bd30: 78442403 lw x8,1924(x8) # 800214b0 + 8000bd34: 00900493 addi x9,x0,9 + 8000bd38: 0a940c63 beq x8,x9,8000bdf0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00017517 auipc x10,0x17 + 8000bd44: 9f750513 addi x10,x10,-1545 # 80022737 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00038097 auipc x1,0x38 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800435a4 + 8000bd68: 00000013 addi x0,x0,0 + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00017517 auipc x10,0x17 + 8000bd84: 9e350513 addi x10,x10,-1565 # 80022763 + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00038097 auipc x1,0x38 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800435a4 + 8000bda8: 00015817 auipc x16,0x15 + 8000bdac: 71080813 addi x16,x16,1808 # 800214b8 + 8000bdb0: 00083503 ld x10,0(x16) + 8000bdb4: 00037097 auipc x1,0x37 + 8000bdb8: 7f0080e7 jalr x1,2032(x1) # 800435a4 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00016517 auipc x10,0x16 + 8000bdc4: de850513 addi x10,x10,-536 # 80021ba8 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00037097 auipc x1,0x37 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800435a4 + 8000bde8: 280404e3 beq x8,x0,8000c870 + 8000bdec: 3400006f jal x0,8000c12c + +000000008000bdf0 : + 8000bdf0: 00000013 addi x0,x0,0 + 8000bdf4: 00000013 addi x0,x0,0 + 8000bdf8: 00000013 addi x0,x0,0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00017517 auipc x10,0x17 + 8000be04: 97350513 addi x10,x10,-1677 # 80022773 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00037097 auipc x1,0x37 + 8000be24: 784080e7 jalr x1,1924(x1) # 800435a4 + 8000be28: 00015517 auipc x10,0x15 + 8000be2c: 67053503 ld x10,1648(x10) # 80021498 + 8000be30: 04000593 addi x11,x0,64 + 8000be34: 605000ef jal x1,8000cc38 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00015517 auipc x10,0x15 + 8000be44: 6a850513 addi x10,x10,1704 # 800214e8 + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00037097 auipc x1,0x37 + 8000be64: 744080e7 jalr x1,1860(x1) # 800435a4 + 8000be68: 00000013 addi x0,x0,0 + 8000be6c: 00000013 addi x0,x0,0 + 8000be70: 00000013 addi x0,x0,0 + 8000be74: 00000013 addi x0,x0,0 + 8000be78: 00000013 addi x0,x0,0 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00017517 auipc x10,0x17 + 8000be84: 91e50513 addi x10,x10,-1762 # 8002279e + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00037097 auipc x1,0x37 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800435a4 + 8000bea8: 00015517 auipc x10,0x15 + 8000beac: 5e853503 ld x10,1512(x10) # 80021490 + 8000beb0: 04000593 addi x11,x0,64 + 8000beb4: 585000ef jal x1,8000cc38 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00015517 auipc x10,0x15 + 8000bec4: 62850513 addi x10,x10,1576 # 800214e8 + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00037097 auipc x1,0x37 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800435a4 + 8000bee8: 00015317 auipc x6,0x15 + 8000beec: 5a833303 ld x6,1448(x6) # 80021490 + 8000bef0: 00015397 auipc x7,0x15 + 8000bef4: 5a83b383 ld x7,1448(x7) # 80021498 + 8000bef8: 10736a63 bltu x6,x7,8000c00c + +000000008000befc : + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00017517 auipc x10,0x17 + 8000bf04: 8cd50513 addi x10,x10,-1843 # 800227cd + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00037097 auipc x1,0x37 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800435a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00017517 auipc x10,0x17 + 8000bf44: 8f550513 addi x10,x10,-1803 # 80022835 + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00037097 auipc x1,0x37 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800435a4 + 8000bf68: 00015317 auipc x6,0x15 + 8000bf6c: 52833303 ld x6,1320(x6) # 80021490 + 8000bf70: 00015397 auipc x7,0x15 + 8000bf74: 5283b383 ld x7,1320(x7) # 80021498 + 8000bf78: 40730533 sub x10,x6,x7 + 8000bf7c: 04000593 addi x11,x0,64 + 8000bf80: 4b9000ef jal x1,8000cc38 + 8000bf84: 00000013 addi x0,x0,0 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00015517 auipc x10,0x15 + 8000bfa4: 54850513 addi x10,x10,1352 # 800214e8 + 8000bfa8: 00000013 addi x0,x0,0 + 8000bfac: 00000013 addi x0,x0,0 + 8000bfb0: 00000013 addi x0,x0,0 + 8000bfb4: 00000013 addi x0,x0,0 + 8000bfb8: 00000013 addi x0,x0,0 + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00037097 auipc x1,0x37 + 8000bfc4: 5e4080e7 jalr x1,1508(x1) # 800435a4 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00017517 auipc x10,0x17 + 8000bfe4: 87c50513 addi x10,x10,-1924 # 8002285c + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00037097 auipc x1,0x37 + 8000c004: 5a4080e7 jalr x1,1444(x1) # 800435a4 + 8000c008: 1dd0006f jal x0,8000c9e4 + +000000008000c00c : + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00016517 auipc x10,0x16 + 8000c024: 7d950513 addi x10,x10,2009 # 800227f9 + 8000c028: 00000013 addi x0,x0,0 + 8000c02c: 00000013 addi x0,x0,0 + 8000c030: 00000013 addi x0,x0,0 + 8000c034: 00000013 addi x0,x0,0 + 8000c038: 00000013 addi x0,x0,0 + 8000c03c: 00000013 addi x0,x0,0 + 8000c040: 00037097 auipc x1,0x37 + 8000c044: 564080e7 jalr x1,1380(x1) # 800435a4 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00016517 auipc x10,0x16 + 8000c064: 7d550513 addi x10,x10,2005 # 80022835 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00037097 auipc x1,0x37 + 8000c084: 524080e7 jalr x1,1316(x1) # 800435a4 + 8000c088: 00015317 auipc x6,0x15 + 8000c08c: 41033303 ld x6,1040(x6) # 80021498 + 8000c090: 00015397 auipc x7,0x15 + 8000c094: 4003b383 ld x7,1024(x7) # 80021490 + 8000c098: 40730533 sub x10,x6,x7 + 8000c09c: 04000593 addi x11,x0,64 + 8000c0a0: 399000ef jal x1,8000cc38 + 8000c0a4: 00000013 addi x0,x0,0 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00015517 auipc x10,0x15 + 8000c0c4: 42850513 addi x10,x10,1064 # 800214e8 + 8000c0c8: 00000013 addi x0,x0,0 + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00037097 auipc x1,0x37 + 8000c0e4: 4c4080e7 jalr x1,1220(x1) # 800435a4 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00017517 auipc x10,0x17 + 8000c104: 84450513 addi x10,x10,-1980 # 80022944 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00037097 auipc x1,0x37 + 8000c124: 484080e7 jalr x1,1156(x1) # 800435a4 + 8000c128: 0bd0006f jal x0,8000c9e4 + +000000008000c12c : + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00017517 auipc x10,0x17 + 8000c144: 8eb50513 addi x10,x10,-1813 # 80022a2b + 8000c148: 00000013 addi x0,x0,0 + 8000c14c: 00000013 addi x0,x0,0 + 8000c150: 00000013 addi x0,x0,0 + 8000c154: 00000013 addi x0,x0,0 + 8000c158: 00000013 addi x0,x0,0 + 8000c15c: 00000013 addi x0,x0,0 + 8000c160: 00037097 auipc x1,0x37 + 8000c164: 444080e7 jalr x1,1092(x1) # 800435a4 + 8000c168: 00015517 auipc x10,0x15 + 8000c16c: 34c52503 lw x10,844(x10) # 800214b4 + 8000c170: 04050a63 beq x10,x0,8000c1c4 + 8000c174: 00100593 addi x11,x0,1 + 8000c178: 08b50663 beq x10,x11,8000c204 + 8000c17c: 00200593 addi x11,x0,2 + 8000c180: 0cb50263 beq x10,x11,8000c244 + 8000c184: 00300593 addi x11,x0,3 + 8000c188: 0eb50e63 beq x10,x11,8000c284 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00017517 auipc x10,0x17 + 8000c1a4: 8c750513 addi x10,x10,-1849 # 80022a67 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 1000006f jal x0,8000c2c0 + +000000008000c1c4 : + 8000c1c4: 00000013 addi x0,x0,0 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00017517 auipc x10,0x17 + 8000c1e4: 86550513 addi x10,x10,-1947 # 80022a45 + 8000c1e8: 00000013 addi x0,x0,0 + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 0c00006f jal x0,8000c2c0 + +000000008000c204 : + 8000c204: 00000013 addi x0,x0,0 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00017517 auipc x10,0x17 + 8000c224: 82d50513 addi x10,x10,-2003 # 80022a4d + 8000c228: 00000013 addi x0,x0,0 + 8000c22c: 00000013 addi x0,x0,0 + 8000c230: 00000013 addi x0,x0,0 + 8000c234: 00000013 addi x0,x0,0 + 8000c238: 00000013 addi x0,x0,0 + 8000c23c: 00000013 addi x0,x0,0 + 8000c240: 0800006f jal x0,8000c2c0 + +000000008000c244 : + 8000c244: 00000013 addi x0,x0,0 + 8000c248: 00000013 addi x0,x0,0 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 7f550513 addi x10,x10,2037 # 80022a55 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 0400006f jal x0,8000c2c0 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 7be50513 addi x10,x10,1982 # 80022a5e + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + +000000008000c2c0 : + 8000c2c0: 00037097 auipc x1,0x37 + 8000c2c4: 2e4080e7 jalr x1,740(x1) # 800435a4 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 79050513 addi x10,x10,1936 # 80022a70 + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 00037097 auipc x1,0x37 + 8000c304: 2a4080e7 jalr x1,676(x1) # 800435a4 + 8000c308: 00015517 auipc x10,0x15 + 8000c30c: 1a852503 lw x10,424(x10) # 800214b0 + 8000c310: 00100593 addi x11,x0,1 + 8000c314: 06b50863 beq x10,x11,8000c384 + 8000c318: 00200593 addi x11,x0,2 + 8000c31c: 0ab50463 beq x10,x11,8000c3c4 + 8000c320: 00300593 addi x11,x0,3 + 8000c324: 0eb50063 beq x10,x11,8000c404 + 8000c328: 00400593 addi x11,x0,4 + 8000c32c: 10b50c63 beq x10,x11,8000c444 + 8000c330: 00500593 addi x11,x0,5 + 8000c334: 14b50863 beq x10,x11,8000c484 + 8000c338: 00600593 addi x11,x0,6 + 8000c33c: 18b50463 beq x10,x11,8000c4c4 + 8000c340: 00700593 addi x11,x0,7 + 8000c344: 1cb50063 beq x10,x11,8000c504 + 8000c348: 00800593 addi x11,x0,8 + 8000c34c: 1eb50c63 beq x10,x11,8000c544 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00017517 auipc x10,0x17 + 8000c364: 86750513 addi x10,x10,-1945 # 80022bc7 + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + 8000c380: 2000006f jal x0,8000c580 + +000000008000c384 : + 8000c384: 00000013 addi x0,x0,0 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 6ea50513 addi x10,x10,1770 # 80022a8a + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 1c00006f jal x0,8000c580 + +000000008000c3c4 : + 8000c3c4: 00000013 addi x0,x0,0 + 8000c3c8: 00000013 addi x0,x0,0 + 8000c3cc: 00000013 addi x0,x0,0 + 8000c3d0: 00000013 addi x0,x0,0 + 8000c3d4: 00000013 addi x0,x0,0 + 8000c3d8: 00000013 addi x0,x0,0 + 8000c3dc: 00000013 addi x0,x0,0 + 8000c3e0: 00016517 auipc x10,0x16 + 8000c3e4: 6db50513 addi x10,x10,1755 # 80022abb + 8000c3e8: 00000013 addi x0,x0,0 + 8000c3ec: 00000013 addi x0,x0,0 + 8000c3f0: 00000013 addi x0,x0,0 + 8000c3f4: 00000013 addi x0,x0,0 + 8000c3f8: 00000013 addi x0,x0,0 + 8000c3fc: 00000013 addi x0,x0,0 + 8000c400: 1800006f jal x0,8000c580 + +000000008000c404 : + 8000c404: 00000013 addi x0,x0,0 + 8000c408: 00000013 addi x0,x0,0 + 8000c40c: 00000013 addi x0,x0,0 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 6bb50513 addi x10,x10,1723 # 80022adb + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 1400006f jal x0,8000c580 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 69950513 addi x10,x10,1689 # 80022af9 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1000006f jal x0,8000c580 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 67850513 addi x10,x10,1656 # 80022b18 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 0c00006f jal x0,8000c580 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 66050513 addi x10,x10,1632 # 80022b40 + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 0800006f jal x0,8000c580 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 64c50513 addi x10,x10,1612 # 80022b6c + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 0400006f jal x0,8000c580 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 63850513 addi x10,x10,1592 # 80022b98 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + +000000008000c580 : + 8000c580: 00037097 auipc x1,0x37 + 8000c584: 024080e7 jalr x1,36(x1) # 800435a4 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 63650513 addi x10,x10,1590 # 80022bd6 + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 00037097 auipc x1,0x37 + 8000c5c4: fe4080e7 jalr x1,-28(x1) # 800435a4 + 8000c5c8: 00015517 auipc x10,0x15 + 8000c5cc: ed053503 ld x10,-304(x10) # 80021498 + 8000c5d0: 04000593 addi x11,x0,64 + 8000c5d4: 664000ef jal x1,8000cc38 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00015517 auipc x10,0x15 + 8000c5e4: f0850513 addi x10,x10,-248 # 800214e8 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 00037097 auipc x1,0x37 + 8000c604: fa4080e7 jalr x1,-92(x1) # 800435a4 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 5cd50513 addi x10,x10,1485 # 80022bed + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + 8000c640: 00037097 auipc x1,0x37 + 8000c644: f64080e7 jalr x1,-156(x1) # 800435a4 + 8000c648: 00015517 auipc x10,0x15 + 8000c64c: e4853503 ld x10,-440(x10) # 80021490 + 8000c650: 04000593 addi x11,x0,64 + 8000c654: 5e4000ef jal x1,8000cc38 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00015517 auipc x10,0x15 + 8000c664: e8850513 addi x10,x10,-376 # 800214e8 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00037097 auipc x1,0x37 + 8000c684: f24080e7 jalr x1,-220(x1) # 800435a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: e2852503 lw x10,-472(x10) # 800214b0 + 8000c690: 00200593 addi x11,x0,2 + 8000c694: 08b51463 bne x10,x11,8000c71c + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00016517 auipc x10,0x16 + 8000c6a4: 56450513 addi x10,x10,1380 # 80022c04 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00037097 auipc x1,0x37 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800435a4 + 8000c6c8: 00015517 auipc x10,0x15 + 8000c6cc: dd053503 ld x10,-560(x10) # 80021498 + 8000c6d0: 284000ef jal x1,8000c954 + 8000c6d4: 00037097 auipc x1,0x37 + 8000c6d8: ed0080e7 jalr x1,-304(x1) # 800435a4 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 53b50513 addi x10,x10,1339 # 80022c1b + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00037097 auipc x1,0x37 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800435a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: d8853503 ld x10,-632(x10) # 80021490 + 8000c710: 244000ef jal x1,8000c954 + 8000c714: 00037097 auipc x1,0x37 + 8000c718: e90080e7 jalr x1,-368(x1) # 800435a4 + +000000008000c71c : + 8000c71c: 00000097 auipc x1,0x0 + 8000c720: 314080e7 jalr x1,788(x1) # 8000ca30 + 8000c724: 00015517 auipc x10,0x15 + 8000c728: d8c52503 lw x10,-628(x10) # 800214b0 + 8000c72c: 00100593 addi x11,x0,1 + 8000c730: 02b51e63 bne x10,x11,8000c76c + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00016517 auipc x10,0x16 + 8000c744: 55150513 addi x10,x10,1361 # 80022c91 + 8000c748: 00000013 addi x0,x0,0 + 8000c74c: 00000013 addi x0,x0,0 + 8000c750: 00000013 addi x0,x0,0 + 8000c754: 00000013 addi x0,x0,0 + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00037097 auipc x1,0x37 + 8000c764: e44080e7 jalr x1,-444(x1) # 800435a4 + 8000c768: 27c0006f jal x0,8000c9e4 + 8000c76c: 00200593 addi x11,x0,2 + 8000c770: 02b51e63 bne x10,x11,8000c7ac + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00016517 auipc x10,0x16 + 8000c784: 5e750513 addi x10,x10,1511 # 80022d67 + 8000c788: 00000013 addi x0,x0,0 + 8000c78c: 00000013 addi x0,x0,0 + 8000c790: 00000013 addi x0,x0,0 + 8000c794: 00000013 addi x0,x0,0 + 8000c798: 00000013 addi x0,x0,0 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00037097 auipc x1,0x37 + 8000c7a4: e04080e7 jalr x1,-508(x1) # 800435a4 + 8000c7a8: 23c0006f jal x0,8000c9e4 + 8000c7ac: 00300593 addi x11,x0,3 + 8000c7b0: 02b51e63 bne x10,x11,8000c7ec + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00016517 auipc x10,0x16 + 8000c7c4: 69a50513 addi x10,x10,1690 # 80022e5a + 8000c7c8: 00000013 addi x0,x0,0 + 8000c7cc: 00000013 addi x0,x0,0 + 8000c7d0: 00000013 addi x0,x0,0 + 8000c7d4: 00000013 addi x0,x0,0 + 8000c7d8: 00000013 addi x0,x0,0 + 8000c7dc: 00000013 addi x0,x0,0 + 8000c7e0: 00037097 auipc x1,0x37 + 8000c7e4: dc4080e7 jalr x1,-572(x1) # 800435a4 + 8000c7e8: 1fc0006f jal x0,8000c9e4 + 8000c7ec: 00400593 addi x11,x0,4 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: 75550513 addi x10,x10,1877 # 80022f55 + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00037097 auipc x1,0x37 + 8000c824: d84080e7 jalr x1,-636(x1) # 800435a4 + 8000c828: 1bc0006f jal x0,8000c9e4 + 8000c82c: 00500593 addi x11,x0,5 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 7fc50513 addi x10,x10,2044 # 8002303c + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00037097 auipc x1,0x37 + 8000c864: d44080e7 jalr x1,-700(x1) # 800435a4 + 8000c868: 17c0006f jal x0,8000c9e4 + 8000c86c: 1780006f jal x0,8000c9e4 + +000000008000c870 : + 8000c870: 00000013 addi x0,x0,0 + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 3c950513 addi x10,x10,969 # 80022c49 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00037097 auipc x1,0x37 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800435a4 + 8000c8a8: 00015617 auipc x12,0x15 + 8000c8ac: c2063603 ld x12,-992(x12) # 800214c8 + 8000c8b0: 00000013 addi x0,x0,0 + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00015517 auipc x10,0x15 + 8000c8c4: 37250513 addi x10,x10,882 # 80021c32 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00037097 auipc x1,0x37 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800435a4 + 8000c8e8: 00065503 lhu x10,0(x12) + 8000c8ec: 01000593 addi x11,x0,16 + 8000c8f0: 00357413 andi x8,x10,3 + 8000c8f4: 00300493 addi x9,x0,3 + 8000c8f8: 00941a63 bne x8,x9,8000c90c + 8000c8fc: 00265403 lhu x8,2(x12) + 8000c900: 01041413 slli x8,x8,0x10 + 8000c904: 00856533 or x10,x10,x8 + 8000c908: 02000593 addi x11,x0,32 + 8000c90c: 32c000ef jal x1,8000cc38 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00015517 auipc x10,0x15 + 8000c924: bc850513 addi x10,x10,-1080 # 800214e8 + 8000c928: 00000013 addi x0,x0,0 + 8000c92c: 00000013 addi x0,x0,0 + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00037097 auipc x1,0x37 + 8000c944: c64080e7 jalr x1,-924(x1) # 800435a4 + 8000c948: 00000097 auipc x1,0x0 + 8000c94c: 0e8080e7 jalr x1,232(x1) # 8000ca30 + 8000c950: 0940006f jal x0,8000c9e4 + +000000008000c954 : + 8000c954: 02054463 blt x10,x0,8000c97c + +000000008000c958 : + 8000c958: 01800593 addi x11,x0,24 + 8000c95c: 04b55863 bge x10,x11,8000c9ac + 8000c960: 00015597 auipc x11,0x15 + 8000c964: bb058593 addi x11,x11,-1104 # 80021510 + 8000c968: 00251613 slli x12,x10,0x2 + 8000c96c: 00351613 slli x12,x10,0x3 + 8000c970: 00c585b3 add x11,x11,x12 + 8000c974: 0005b503 ld x10,0(x11) + 8000c978: 00008067 jalr x0,0(x1) + +000000008000c97c : + 8000c97c: 00100593 addi x11,x0,1 + 8000c980: 03f59593 slli x11,x11,0x3f + 8000c984: 00b54533 xor x10,x10,x11 + 8000c988: 01000593 addi x11,x0,16 + 8000c98c: 02b55063 bge x10,x11,8000c9ac + 8000c990: 00015597 auipc x11,0x15 + 8000c994: c4058593 addi x11,x11,-960 # 800215d0 + 8000c998: 00251613 slli x12,x10,0x2 + 8000c99c: 00351613 slli x12,x10,0x3 + 8000c9a0: 00c585b3 add x11,x11,x12 + 8000c9a4: 0005b503 ld x10,0(x11) + 8000c9a8: 00008067 jalr x0,0(x1) + +000000008000c9ac : + 8000c9ac: 00000013 addi x0,x0,0 + 8000c9b0: 00000013 addi x0,x0,0 + 8000c9b4: 00000013 addi x0,x0,0 + 8000c9b8: 00000013 addi x0,x0,0 + 8000c9bc: 00000013 addi x0,x0,0 + 8000c9c0: 00015517 auipc x10,0x15 + 8000c9c4: 08e50513 addi x10,x10,142 # 80021a4e + 8000c9c8: 00000013 addi x0,x0,0 + 8000c9cc: 00000013 addi x0,x0,0 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00008067 jalr x0,0(x1) + +000000008000c9e4 : + 8000c9e4: 00000013 addi x0,x0,0 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00016517 auipc x10,0x16 + 8000ca04: cea50513 addi x10,x10,-790 # 800226ea + 8000ca08: 00000013 addi x0,x0,0 + 8000ca0c: 00000013 addi x0,x0,0 + 8000ca10: 00000013 addi x0,x0,0 + 8000ca14: 00000013 addi x0,x0,0 + 8000ca18: 00000013 addi x0,x0,0 + 8000ca1c: 00000013 addi x0,x0,0 + 8000ca20: 00037097 auipc x1,0x37 + 8000ca24: b84080e7 jalr x1,-1148(x1) # 800435a4 + +000000008000ca28 : + 8000ca28: 00037097 auipc x1,0x37 + 8000ca2c: bdc080e7 jalr x1,-1060(x1) # 80043604 + +000000008000ca30 : + 8000ca30: 00015617 auipc x12,0x15 + 8000ca34: a9060613 addi x12,x12,-1392 # 800214c0 + 8000ca38: 00163023 sd x1,0(x12) + 8000ca3c: 00000013 addi x0,x0,0 + 8000ca40: 00015517 auipc x10,0x15 + 8000ca44: 21350513 addi x10,x10,531 # 80021c53 + 8000ca48: 00000013 addi x0,x0,0 + 8000ca4c: 00000013 addi x0,x0,0 + 8000ca50: 00000013 addi x0,x0,0 + 8000ca54: 00000013 addi x0,x0,0 + 8000ca58: 00000013 addi x0,x0,0 + 8000ca5c: 00000013 addi x0,x0,0 + 8000ca60: 00037097 auipc x1,0x37 + 8000ca64: b44080e7 jalr x1,-1212(x1) # 800435a4 + 8000ca68: 00015517 auipc x10,0x15 + 8000ca6c: a6053503 ld x10,-1440(x10) # 800214c8 + 8000ca70: 04000593 addi x11,x0,64 + 8000ca74: 1c4000ef jal x1,8000cc38 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00015517 auipc x10,0x15 + 8000ca84: a6850513 addi x10,x10,-1432 # 800214e8 + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00037097 auipc x1,0x37 + 8000caa4: b04080e7 jalr x1,-1276(x1) # 800435a4 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: 1a350513 addi x10,x10,419 # 80021c63 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00037097 auipc x1,0x37 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800435a4 + 8000cae8: 00015517 auipc x10,0x15 + 8000caec: 9e853503 ld x10,-1560(x10) # 800214d0 + 8000caf0: 04000593 addi x11,x0,64 + 8000caf4: 144000ef jal x1,8000cc38 + 8000caf8: 00000013 addi x0,x0,0 + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00015517 auipc x10,0x15 + 8000cb04: 9e850513 addi x10,x10,-1560 # 800214e8 + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00037097 auipc x1,0x37 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800435a4 + 8000cb28: 00000013 addi x0,x0,0 + 8000cb2c: 00000013 addi x0,x0,0 + 8000cb30: 00000013 addi x0,x0,0 + 8000cb34: 00000013 addi x0,x0,0 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00015517 auipc x10,0x15 + 8000cb44: 13350513 addi x10,x10,307 # 80021c73 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00037097 auipc x1,0x37 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800435a4 + 8000cb68: 00015517 auipc x10,0x15 + 8000cb6c: 97053503 ld x10,-1680(x10) # 800214d8 + 8000cb70: 04000593 addi x11,x0,64 + 8000cb74: 0c4000ef jal x1,8000cc38 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00015517 auipc x10,0x15 + 8000cb84: 96850513 addi x10,x10,-1688 # 800214e8 + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00037097 auipc x1,0x37 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800435a4 + 8000cba8: 00000013 addi x0,x0,0 + 8000cbac: 00000013 addi x0,x0,0 + 8000cbb0: 00000013 addi x0,x0,0 + 8000cbb4: 00000013 addi x0,x0,0 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00015517 auipc x10,0x15 + 8000cbc4: 0c350513 addi x10,x10,195 # 80021c83 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00037097 auipc x1,0x37 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800435a4 + 8000cbe8: 00015517 auipc x10,0x15 + 8000cbec: 8f853503 ld x10,-1800(x10) # 800214e0 + 8000cbf0: 04000593 addi x11,x0,64 + 8000cbf4: 044000ef jal x1,8000cc38 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00015517 auipc x10,0x15 + 8000cc04: 8e850513 addi x10,x10,-1816 # 800214e8 + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00037097 auipc x1,0x37 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800435a4 + 8000cc28: 00015617 auipc x12,0x15 + 8000cc2c: 89860613 addi x12,x12,-1896 # 800214c0 + 8000cc30: 00063083 ld x1,0(x12) + 8000cc34: 00008067 jalr x0,0(x1) + +000000008000cc38 : + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00015617 auipc x12,0x15 + 8000cc44: 8a860613 addi x12,x12,-1880 # 800214e8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 03000693 addi x13,x0,48 + 8000cc64: 00d60023 sb x13,0(x12) + 8000cc68: 07800693 addi x13,x0,120 + 8000cc6c: 00d600a3 sb x13,1(x12) + 8000cc70: 00260613 addi x12,x12,2 + 8000cc74: 00058693 addi x13,x11,0 + +000000008000cc78 : + 8000cc78: ffc68693 addi x13,x13,-4 + 8000cc7c: 00d55733 srl x14,x10,x13 + 8000cc80: 00f77713 andi x14,x14,15 + 8000cc84: 00a00793 addi x15,x0,10 + 8000cc88: 00f74663 blt x14,x15,8000cc94 + 8000cc8c: 05770713 addi x14,x14,87 + 8000cc90: 0080006f jal x0,8000cc98 + +000000008000cc94 : + 8000cc94: 03070713 addi x14,x14,48 + +000000008000cc98 : + 8000cc98: 00e60023 sb x14,0(x12) + 8000cc9c: 00160613 addi x12,x12,1 + 8000cca0: fc069ce3 bne x13,x0,8000cc78 + 8000cca4: 00a00693 addi x13,x0,10 + 8000cca8: 00d60023 sb x13,0(x12) + 8000ccac: 000600a3 sb x0,1(x12) + 8000ccb0: 00008067 jalr x0,0(x1) + +000000008000ccb4 : + 8000ccb4: 00a00693 addi x13,x0,10 + 8000ccb8: 02d54663 blt x10,x13,8000cce4 + 8000ccbc: ff650513 addi x10,x10,-10 + 8000ccc0: 03100713 addi x14,x0,49 + 8000ccc4: 00d54c63 blt x10,x13,8000ccdc + 8000ccc8: ff650513 addi x10,x10,-10 + 8000cccc: 03200713 addi x14,x0,50 + 8000ccd0: 00d54663 blt x10,x13,8000ccdc + 8000ccd4: ff650513 addi x10,x10,-10 + 8000ccd8: 03300713 addi x14,x0,51 + 8000ccdc: 00e60023 sb x14,0(x12) + 8000cce0: 00160613 addi x12,x12,1 + 8000cce4: 03050513 addi x10,x10,48 + 8000cce8: 00a60023 sb x10,0(x12) + 8000ccec: 00a00693 addi x13,x0,10 + 8000ccf0: 00d600a3 sb x13,1(x12) + 8000ccf4: 00060123 sb x0,2(x12) + 8000ccf8: 00008067 jalr x0,0(x1) + 8000ccfc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080043000 : + 80043000: 10010737 lui x14,0x10010 + 80043004: 00072023 sw x0,0(x14) # 10010000 + 80043008: fffc8397 auipc x7,0xfffc8 + 8004300c: bf038393 addi x7,x7,-1040 # 8000abf8 + 80043010: 00038067 jalr x0,0(x7) + +0000000080043014 : + 80043014: fff00713 addi x14,x0,-1 + 80043018: 100143b7 lui x7,0x10014 + 8004301c: 00e3b023 sd x14,0(x7) # 10014000 + 80043020: fffc8397 auipc x7,0xfffc8 + 80043024: bd838393 addi x7,x7,-1064 # 8000abf8 + 80043028: 00038067 jalr x0,0(x7) + +000000008004302c : + 8004302c: 10000737 lui x14,0x10000 + 80043030: 0107071b addiw x14,x14,16 # 10000010 + 80043034: 00070023 sb x0,0(x14) + 80043038: fffc8397 auipc x7,0xfffc8 + 8004303c: bc038393 addi x7,x7,-1088 # 8000abf8 + 80043040: 00038067 jalr x0,0(x7) + +0000000080043044 : + 80043044: 00200393 addi x7,x0,2 + 80043048: 3443b073 csrrc x0,mip,x7 + 8004304c: fffc8397 auipc x7,0xfffc8 + 80043050: bac38393 addi x7,x7,-1108 # 8000abf8 + 80043054: 00038067 jalr x0,0(x7) + +0000000080043058 : + 80043058: fffc8397 auipc x7,0xfffc8 + 8004305c: ba038393 addi x7,x7,-1120 # 8000abf8 + 80043060: 00038067 jalr x0,0(x7) + +0000000080043064 : + 80043064: 20000413 addi x8,x0,512 + 80043068: 34443073 csrrc x0,mip,x8 + 8004306c: 34402473 csrrs x8,mip,x0 + 80043070: 00001337 lui x6,0x1 + 80043074: 8003031b addiw x6,x6,-2048 # 800 + 80043078: 00647433 and x8,x8,x6 + 8004307c: 00830863 beq x6,x8,8004308c + 80043080: 10000737 lui x14,0x10000 + 80043084: 0187071b addiw x14,x14,24 # 10000018 + 80043088: 00070023 sb x0,0(x14) + 8004308c: fffc8397 auipc x7,0xfffc8 + 80043090: b6c38393 addi x7,x7,-1172 # 8000abf8 + 80043094: 00038067 jalr x0,0(x7) + +0000000080043098 : + 80043098: fffc7317 auipc x6,0xfffc7 + 8004309c: c7c30313 addi x6,x6,-900 # 80009d14 + 800430a0: 00030067 jalr x0,0(x6) + 800430a4: fffc8397 auipc x7,0xfffc8 + 800430a8: b5438393 addi x7,x7,-1196 # 8000abf8 + 800430ac: 00038067 jalr x0,0(x7) + +00000000800430b0 : + 800430b0: fffc7317 auipc x6,0xfffc7 + 800430b4: c6430313 addi x6,x6,-924 # 80009d14 + 800430b8: 00030067 jalr x0,0(x6) + 800430bc: fffc8397 auipc x7,0xfffc8 + 800430c0: b3c38393 addi x7,x7,-1220 # 8000abf8 + 800430c4: 00038067 jalr x0,0(x7) + +00000000800430c8 : + 800430c8: fffc7317 auipc x6,0xfffc7 + 800430cc: c4c30313 addi x6,x6,-948 # 80009d14 + 800430d0: 00030067 jalr x0,0(x6) + 800430d4: fffc8397 auipc x7,0xfffc8 + 800430d8: b2438393 addi x7,x7,-1244 # 8000abf8 + 800430dc: 00038067 jalr x0,0(x7) + +00000000800430e0 : + 800430e0: 30401073 csrrw x0,mie,x0 + 800430e4: 34401073 csrrw x0,mip,x0 + 800430e8: 34101073 csrrw x0,mepc,x0 + 800430ec: 34301073 csrrw x0,mtval,x0 + 800430f0: 34201073 csrrw x0,mcause,x0 + 800430f4: 00000013 addi x0,x0,0 + 800430f8: 00000013 addi x0,x0,0 + 800430fc: 00000013 addi x0,x0,0 + 80043100: fffcd317 auipc x6,0xfffcd + 80043104: 01030313 addi x6,x6,16 # 80010110 + 80043108: 00000013 addi x0,x0,0 + 8004310c: 00000013 addi x0,x0,0 + 80043110: 00000013 addi x0,x0,0 + 80043114: 00000013 addi x0,x0,0 + 80043118: 00000013 addi x0,x0,0 + 8004311c: 00000013 addi x0,x0,0 + +0000000080043120 : + 80043120: 34031473 csrrw x8,mscratch,x6 + 80043124: 2c833823 sd x8,720(x6) + +0000000080043128 : + 80043128: fff00393 addi x7,x0,-1 + 8004312c: 000044b7 lui x9,0x4 + 80043130: 00548493 addi x9,x9,5 # 4005 + 80043134: 00e49493 slli x9,x9,0xe + 80043138: 0074b023 sd x7,0(x9) + 8004313c: 00000013 addi x0,x0,0 + +0000000080043140 : + 80043140: 00000393 addi x7,x0,0 + 80043144: 2a733c23 sd x7,696(x6) + +0000000080043148 : + 80043148: 30502473 csrrs x8,mtvec,x0 + 8004314c: 2c833423 sd x8,712(x6) + 80043150: 00347393 andi x7,x8,3 + 80043154: ffc3f393 andi x7,x7,-4 + 80043158: 2b033483 ld x9,688(x6) + 8004315c: da848493 addi x9,x9,-600 + 80043160: 0074e3b3 or x7,x9,x7 + 80043164: 2c733023 sd x7,704(x6) + 80043168: 30539073 csrrw x0,mtvec,x7 + 8004316c: 30502773 csrrs x14,mtvec,x0 + 80043170: 0e770a63 beq x14,x7,80043264 + 80043174: 30541073 csrrw x0,mtvec,x8 + 80043178: 0a040663 beq x8,x0,80043224 + 8004317c: 2c833023 sd x8,704(x6) + +0000000080043180 : + 80043180: ffc47393 andi x7,x8,-4 + 80043184: 25838413 addi x8,x7,600 + 80043188: 00030113 addi x2,x6,0 + 8004318c: 00000013 addi x0,x0,0 + 80043190: 00000013 addi x0,x0,0 + 80043194: 00000013 addi x0,x0,0 + 80043198: 00000013 addi x0,x0,0 + 8004319c: 00000013 addi x0,x0,0 + 800431a0: 00000717 auipc x14,0x0 + 800431a4: 04c70713 addi x14,x14,76 # 800431ec + 800431a8: 00000013 addi x0,x0,0 + 800431ac: 00000013 addi x0,x0,0 + 800431b0: 00000013 addi x0,x0,0 + 800431b4: 00000013 addi x0,x0,0 + 800431b8: 00000013 addi x0,x0,0 + 800431bc: 00000013 addi x0,x0,0 + 800431c0: 00000797 auipc x15,0x0 + 800431c4: 0a478793 addi x15,x15,164 # 80043264 + 800431c8: 00000013 addi x0,x0,0 + 800431cc: 00000013 addi x0,x0,0 + 800431d0: 00000013 addi x0,x0,0 + 800431d4: 00000013 addi x0,x0,0 + 800431d8: 00000013 addi x0,x0,0 + 800431dc: 00000013 addi x0,x0,0 + 800431e0: 00f3f663 bgeu x7,x15,800431ec + 800431e4: 00877463 bgeu x14,x8,800431ec + 800431e8: 03c0006f jal x0,80043224 + +00000000800431ec : + 800431ec: 0003a783 lw x15,0(x7) + 800431f0: 00f32023 sw x15,0(x6) + 800431f4: 0004a703 lw x14,0(x9) + 800431f8: 00e3a023 sw x14,0(x7) + 800431fc: 0003a783 lw x15,0(x7) + 80043200: 00e79a63 bne x15,x14,80043214 + 80043204: 00438393 addi x7,x7,4 + 80043208: 00430313 addi x6,x6,4 + 8004320c: 00448493 addi x9,x9,4 + 80043210: fc741ee3 bne x8,x7,800431ec + +0000000080043214 : + 80043214: 0000100f fence.i + 80043218: 34002373 csrrs x6,mscratch,x0 + 8004321c: 2a933823 sd x9,688(x6) + 80043220: 04740263 beq x8,x7,80043264 + +0000000080043224 : + 80043224: 00038413 addi x8,x7,0 + 80043228: 00000013 addi x0,x0,0 + 8004322c: 00000013 addi x0,x0,0 + 80043230: 00000013 addi x0,x0,0 + 80043234: 00000013 addi x0,x0,0 + 80043238: 00000013 addi x0,x0,0 + 8004323c: 00000013 addi x0,x0,0 + 80043240: fffc7797 auipc x15,0xfffc7 + 80043244: ae478793 addi x15,x15,-1308 # 80009d24 + 80043248: 00000013 addi x0,x0,0 + 8004324c: 00000013 addi x0,x0,0 + 80043250: 00000013 addi x0,x0,0 + 80043254: 00000013 addi x0,x0,0 + 80043258: 00000013 addi x0,x0,0 + 8004325c: 00000013 addi x0,x0,0 + 80043260: 00078067 jalr x0,0(x15) + +0000000080043264 : + 80043264: 00000013 addi x0,x0,0 + +0000000080043268 : + 80043268: 005002b7 lui x5,0x500 + 8004326c: 0012829b addiw x5,x5,1 # 500001 + 80043270: 00d29293 slli x5,x5,0xd + 80043274: 80028293 addi x5,x5,-2048 + 80043278: 30029073 csrrw x0,mstatus,x5 + 8004327c: 32001073 csrrw x0,mcountinhibit,x0 + 80043280: 32301073 csrrw x0,mhpmevent3,x0 + 80043284: 32401073 csrrw x0,mhpmevent4,x0 + 80043288: 32501073 csrrw x0,mhpmevent5,x0 + 8004328c: 32601073 csrrw x0,mhpmevent6,x0 + 80043290: 32701073 csrrw x0,mhpmevent7,x0 + 80043294: 32801073 csrrw x0,mhpmevent8,x0 + 80043298: 32901073 csrrw x0,mhpmevent9,x0 + 8004329c: 32a01073 csrrw x0,mhpmevent10,x0 + 800432a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800432a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800432a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800432ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800432b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800432b4: 33001073 csrrw x0,mhpmevent16,x0 + 800432b8: 33101073 csrrw x0,mhpmevent17,x0 + 800432bc: 33201073 csrrw x0,mhpmevent18,x0 + 800432c0: 33301073 csrrw x0,mhpmevent19,x0 + 800432c4: 33401073 csrrw x0,mhpmevent20,x0 + 800432c8: 33501073 csrrw x0,mhpmevent21,x0 + 800432cc: 33601073 csrrw x0,mhpmevent22,x0 + 800432d0: 33701073 csrrw x0,mhpmevent23,x0 + 800432d4: 33801073 csrrw x0,mhpmevent24,x0 + 800432d8: 33901073 csrrw x0,mhpmevent25,x0 + 800432dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800432e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800432e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800432e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800432ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800432f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800432f4: 00000013 addi x0,x0,0 + 800432f8: 00000013 addi x0,x0,0 + 800432fc: 00000013 addi x0,x0,0 + 80043300: fffcd317 auipc x6,0xfffcd + 80043304: e0830313 addi x6,x6,-504 # 80010108 + 80043308: 00000013 addi x0,x0,0 + 8004330c: 00000013 addi x0,x0,0 + 80043310: 00000013 addi x0,x0,0 + 80043314: 00000013 addi x0,x0,0 + 80043318: 00000013 addi x0,x0,0 + 8004331c: 00000013 addi x0,x0,0 + 80043320: 00033023 sd x0,0(x6) + +0000000080043324 : + 80043324: feedc0b7 lui x1,0xfeedc + 80043328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004332c: 00b09093 slli x1,x1,0xb + 80043330: 7f708093 addi x1,x1,2039 + 80043334: 00b09093 slli x1,x1,0xb + 80043338: 36f08093 addi x1,x1,879 + 8004333c: 00a09093 slli x1,x1,0xa + 80043340: 2ad08093 addi x1,x1,685 + 80043344: 03909793 slli x15,x1,0x39 + 80043348: 0070d113 srli x2,x1,0x7 + 8004334c: 00f16133 or x2,x2,x15 + 80043350: 03911793 slli x15,x2,0x39 + 80043354: 00715193 srli x3,x2,0x7 + 80043358: 00f1e1b3 or x3,x3,x15 + 8004335c: 03919793 slli x15,x3,0x39 + 80043360: 0071d213 srli x4,x3,0x7 + 80043364: 00f26233 or x4,x4,x15 + 80043368: 03921793 slli x15,x4,0x39 + 8004336c: 00725293 srli x5,x4,0x7 + 80043370: 00f2e2b3 or x5,x5,x15 + 80043374: 03929793 slli x15,x5,0x39 + 80043378: 0072d313 srli x6,x5,0x7 + 8004337c: 00f36333 or x6,x6,x15 + 80043380: 03931793 slli x15,x6,0x39 + 80043384: 00735393 srli x7,x6,0x7 + 80043388: 00f3e3b3 or x7,x7,x15 + 8004338c: 03939793 slli x15,x7,0x39 + 80043390: 0073d413 srli x8,x7,0x7 + 80043394: 00f46433 or x8,x8,x15 + 80043398: 03941793 slli x15,x8,0x39 + 8004339c: 00745493 srli x9,x8,0x7 + 800433a0: 00f4e4b3 or x9,x9,x15 + 800433a4: 03949793 slli x15,x9,0x39 + 800433a8: 0074d513 srli x10,x9,0x7 + 800433ac: 00f56533 or x10,x10,x15 + 800433b0: 03951793 slli x15,x10,0x39 + 800433b4: 00755593 srli x11,x10,0x7 + 800433b8: 00f5e5b3 or x11,x11,x15 + 800433bc: 03959793 slli x15,x11,0x39 + 800433c0: 0075d613 srli x12,x11,0x7 + 800433c4: 00f66633 or x12,x12,x15 + 800433c8: 03961793 slli x15,x12,0x39 + 800433cc: 00765693 srli x13,x12,0x7 + 800433d0: 00f6e6b3 or x13,x13,x15 + 800433d4: 03969793 slli x15,x13,0x39 + 800433d8: 0076d713 srli x14,x13,0x7 + 800433dc: 00f76733 or x14,x14,x15 + 800433e0: fab807b7 lui x15,0xfab80 + 800433e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800433e8: 00b79793 slli x15,x15,0xb + 800433ec: 7d578793 addi x15,x15,2005 + 800433f0: 00b79793 slli x15,x15,0xb + 800433f4: 5fe78793 addi x15,x15,1534 + 800433f8: 00a79793 slli x15,x15,0xa + 800433fc: 3b678793 addi x15,x15,950 + 80043400: 7d5c0837 lui x16,0x7d5c0 + 80043404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80043408: 00b81813 slli x16,x16,0xb + 8004340c: 3ea80813 addi x16,x16,1002 + 80043410: 00b81813 slli x16,x16,0xb + 80043414: 6ff80813 addi x16,x16,1791 + 80043418: 00a81813 slli x16,x16,0xa + 8004341c: 1db80813 addi x16,x16,475 + 80043420: 03981793 slli x15,x16,0x39 + 80043424: 00785893 srli x17,x16,0x7 + 80043428: 00f8e8b3 or x17,x17,x15 + 8004342c: 03989793 slli x15,x17,0x39 + 80043430: 0078d913 srli x18,x17,0x7 + 80043434: 00f96933 or x18,x18,x15 + 80043438: 03991793 slli x15,x18,0x39 + 8004343c: 00795993 srli x19,x18,0x7 + 80043440: 00f9e9b3 or x19,x19,x15 + 80043444: 03999793 slli x15,x19,0x39 + 80043448: 0079da13 srli x20,x19,0x7 + 8004344c: 00fa6a33 or x20,x20,x15 + 80043450: 039a1793 slli x15,x20,0x39 + 80043454: 007a5a93 srli x21,x20,0x7 + 80043458: 00faeab3 or x21,x21,x15 + 8004345c: 039a9793 slli x15,x21,0x39 + 80043460: 007adb13 srli x22,x21,0x7 + 80043464: 00fb6b33 or x22,x22,x15 + 80043468: 039b1793 slli x15,x22,0x39 + 8004346c: 007b5b93 srli x23,x22,0x7 + 80043470: 00fbebb3 or x23,x23,x15 + 80043474: 039b9793 slli x15,x23,0x39 + 80043478: 007bdc13 srli x24,x23,0x7 + 8004347c: 00fc6c33 or x24,x24,x15 + 80043480: 039c1793 slli x15,x24,0x39 + 80043484: 007c5c93 srli x25,x24,0x7 + 80043488: 00fcecb3 or x25,x25,x15 + 8004348c: 039c9793 slli x15,x25,0x39 + 80043490: 007cdd13 srli x26,x25,0x7 + 80043494: 00fd6d33 or x26,x26,x15 + 80043498: 039d1793 slli x15,x26,0x39 + 8004349c: 007d5d93 srli x27,x26,0x7 + 800434a0: 00fdedb3 or x27,x27,x15 + 800434a4: 039d9793 slli x15,x27,0x39 + 800434a8: 007dde13 srli x28,x27,0x7 + 800434ac: 00fe6e33 or x28,x28,x15 + 800434b0: 039e1793 slli x15,x28,0x39 + 800434b4: 007e5e93 srli x29,x28,0x7 + 800434b8: 00feeeb3 or x29,x29,x15 + 800434bc: 039e9793 slli x15,x29,0x39 + 800434c0: 007edf13 srli x30,x29,0x7 + 800434c4: 00ff6f33 or x30,x30,x15 + 800434c8: 039f1793 slli x15,x30,0x39 + 800434cc: 007f5f93 srli x31,x30,0x7 + 800434d0: 00ffefb3 or x31,x31,x15 + 800434d4: 00000013 addi x0,x0,0 + 800434d8: 00000013 addi x0,x0,0 + 800434dc: 00000013 addi x0,x0,0 + 800434e0: fffe0117 auipc x2,0xfffe0 + 800434e4: c9010113 addi x2,x2,-880 # 80023170 + 800434e8: 00000013 addi x0,x0,0 + 800434ec: 00000013 addi x0,x0,0 + 800434f0: 00000013 addi x0,x0,0 + 800434f4: 00000013 addi x0,x0,0 + 800434f8: 00000013 addi x0,x0,0 + 800434fc: 00000013 addi x0,x0,0 + +0000000080043500 : + 80043500: 6f5ca337 lui x6,0x6f5ca + 80043504: 30930313 addi x6,x6,777 # 6f5ca309 + 80043508: 00b31313 slli x6,x6,0xb + 8004350c: 73e30313 addi x6,x6,1854 + 80043510: 00b31313 slli x6,x6,0xb + 80043514: 52c30313 addi x6,x6,1324 + 80043518: 00a31313 slli x6,x6,0xa + 8004351c: 28130313 addi x6,x6,641 + 80043520: fffc8197 auipc x3,0xfffc8 + 80043524: be018193 addi x3,x3,-1056 # 8000b100 + 80043528: 00000013 addi x0,x0,0 + 8004352c: 00000013 addi x0,x0,0 + 80043530: 00000013 addi x0,x0,0 + 80043534: 00000013 addi x0,x0,0 + 80043538: 00000013 addi x0,x0,0 + 8004353c: 00000013 addi x0,x0,0 + 80043540: 00013203 ld x4,0(x2) + 80043544: 00620c63 beq x4,x6,8004355c + 80043548: 000182e7 jalr x5,0(x3) + 8004354c: 80043500 .word 0x80043500 + 80043550: 00000000 .word 0x00000000 + 80043554: 80022713 .word 0x80022713 + 80043558: 00000000 .word 0x00000000 + 8004355c: 00810113 addi x2,x2,8 + 80043560: fffcd197 auipc x3,0xfffcd + 80043564: f1018193 addi x3,x3,-240 # 80010470 + 80043568: 00000013 addi x0,x0,0 + 8004356c: 00000013 addi x0,x0,0 + 80043570: 00000013 addi x0,x0,0 + 80043574: 00000013 addi x0,x0,0 + 80043578: 00000013 addi x0,x0,0 + 8004357c: 00000013 addi x0,x0,0 + 80043580: fffbd317 auipc x6,0xfffbd + 80043584: ac030313 addi x6,x6,-1344 # 80000040 + 80043588: 00000013 addi x0,x0,0 + 8004358c: 00000013 addi x0,x0,0 + 80043590: 00000013 addi x0,x0,0 + 80043594: 00000013 addi x0,x0,0 + 80043598: 00000013 addi x0,x0,0 + 8004359c: 00000013 addi x0,x0,0 + 800435a0: 00030067 jalr x0,0(x6) + +00000000800435a4 : + 800435a4: 00054303 lbu x6,0(x10) + 800435a8: 00030a63 beq x6,x0,800435bc + 800435ac: 100003b7 lui x7,0x10000 + 800435b0: 00638023 sb x6,0(x7) # 10000000 + 800435b4: 00150513 addi x10,x10,1 + 800435b8: fedff06f jal x0,800435a4 + 800435bc: 00008067 jalr x0,0(x1) + +00000000800435c0 : + 800435c0: ff010113 addi x2,x2,-16 + 800435c4: 00113023 sd x1,0(x2) + 800435c8: 00813423 sd x8,8(x2) + 800435cc: 00000097 auipc x1,0x0 + 800435d0: fd8080e7 jalr x1,-40(x1) # 800435a4 + 800435d4: 00813403 ld x8,8(x2) + 800435d8: 00013083 ld x1,0(x2) + 800435dc: 01010113 addi x2,x2,16 + 800435e0: 00008067 jalr x0,0(x1) + +00000000800435e4 : + 800435e4: 00100093 addi x1,x0,1 + 800435e8: fffff297 auipc x5,0xfffff + 800435ec: 91828293 addi x5,x5,-1768 # 80041f00 + +00000000800435f0 : + 800435f0: 0012a023 sw x1,0(x5) + 800435f4: 0002a223 sw x0,4(x5) + +00000000800435f8 : + 800435f8: 00000013 addi x0,x0,0 + 800435fc: ffdff06f jal x0,800435f8 + 80043600: 0000006f jal x0,80043600 + +0000000080043604 : + 80043604: 00300093 addi x1,x0,3 + 80043608: fffff297 auipc x5,0xfffff + 8004360c: 8f828293 addi x5,x5,-1800 # 80041f00 + +0000000080043610 : + 80043610: 0012a023 sw x1,0(x5) + 80043614: 0002a223 sw x0,4(x5) + +0000000080043618 : + 80043618: 00000013 addi x0,x0,0 + 8004361c: ffdff06f jal x0,80043618 + 80043620: 0000006f jal x0,80043620 + +0000000080043624 : + 80043624: 00100513 addi x10,x0,1 + 80043628: 100105b7 lui x11,0x10010 + 8004362c: 00a5a023 sw x10,0(x11) # 10010000 + 80043630: 00008067 jalr x0,0(x1) + +0000000080043634 : + 80043634: 100105b7 lui x11,0x10010 + 80043638: 0005a023 sw x0,0(x11) # 10010000 + 8004363c: 00008067 jalr x0,0(x1) + +0000000080043640 : + 80043640: 00100513 addi x10,x0,1 + 80043644: 100005b7 lui x11,0x10000 + 80043648: 0105859b addiw x11,x11,16 # 10000010 + 8004364c: 00a58023 sb x10,0(x11) + 80043650: 00008067 jalr x0,0(x1) + +0000000080043654 : + 80043654: 100005b7 lui x11,0x10000 + 80043658: 0105859b addiw x11,x11,16 # 10000010 + 8004365c: 00058023 sb x0,0(x11) + 80043660: 00008067 jalr x0,0(x1) + 80043664: 00000013 addi x0,x0,0 + 80043668: 00000013 addi x0,x0,0 + 8004366c: 00000013 addi x0,x0,0 + 80043670: 00000013 addi x0,x0,0 + 80043674: 00000013 addi x0,x0,0 + 80043678: 00000013 addi x0,x0,0 + 8004367c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknd-aes64im-00.elf.objdump b/riscv-tests/rv64-Zknd-aes64im-00.elf.objdump new file mode 100644 index 0000000..8cd5858 --- /dev/null +++ b/riscv-tests/rv64-Zknd-aes64im-00.elf.objdump @@ -0,0 +1,6683 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64im-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64im-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00021790 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029800 0000000080029800 00027800 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008fc 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 0000000000000000 0000000000000000 00028fb7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029034 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029057 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029070 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 0000000000000000 0000000000000000 000290b0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002913b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029800 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cc7OvABO.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG 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0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029900 g .tohost 0000000000000000 fromhost +0000000080029800 g .tohost 0000000000000000 tohost +00000000800016d0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xad73e860ac31970d + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknd_aes64im_cg_cp_rs1_b0: + aes64im x25, x0 # perform operation + 80000048: 30001c93 aes64im x25,x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknd_aes64im_cg_cp_rs1_b0, Zknd_aes64im_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01920c63 beq x4,x25,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x70ffdceb9f3bbcfb + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknd_aes64im_cg_cp_rs1_b1: + aes64im x13, x1 # perform operation + 80000074: 30009693 aes64im x13,x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknd_aes64im_cg_cp_rs1_b1, Zknd_aes64im_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00d20c63 beq x4,x13,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008824 .word 0x80008824 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x19, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010993 addi x19,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0b21f8dc2041c449 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknd_aes64im_cg_cp_rs1_b2: + aes64im x6, x2 # perform operation + 800000a4: 30011313 aes64im x6,x2 + # Check if x6 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x6, Zknd_aes64im_cg_cp_rs1_b2, Zknd_aes64im_cg_cp_rs1_b2_str) + 800000a8: 0009b203 ld x4,0(x19) + 800000ac: 00620c63 beq x4,x6,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008858 .word 0x80008858 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00898993 addi x19,x19,8 + + mv x12, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018613 addi x12,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x6acae3d1b1697e29 + 800000cc: 00063183 ld x3,0(x12) + 800000d0: 00860613 addi x12,x12,8 + +00000000800000d4 : +Zknd_aes64im_cg_cp_rs1_b3: + aes64im x27, x3 # perform operation + 800000d4: 30019d93 aes64im x27,x3 + # Check if x27 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x27, Zknd_aes64im_cg_cp_rs1_b3, Zknd_aes64im_cg_cp_rs1_b3_str) + 800000d8: 0009b203 ld x4,0(x19) + 800000dc: 01b20c63 beq x4,x27,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 8000888c .word 0x8000888c + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00898993 addi x19,x19,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x0f9be369ed7ade71 + 80000100: 00063203 ld x4,0(x12) + 80000104: 00860613 addi x12,x12,8 + +0000000080000108 : +Zknd_aes64im_cg_cp_rs1_b4: + aes64im x14, x4 # perform operation + 80000108: 30021713 aes64im x14,x4 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zknd_aes64im_cg_cp_rs1_b4, Zknd_aes64im_cg_cp_rs1_b4_str) + 8000010c: 0009b383 ld x7,0(x19) + 80000110: 00e38c63 beq x7,x14,80000128 + 80000114: 6c40246f jal x8,800027d8 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088c0 .word 0x800088c0 + 80000124: 00000000 .word 0x00000000 + 80000128: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x958bb48e7ffab8aa + 8000012c: 00063283 ld x5,0(x12) + 80000130: 00860613 addi x12,x12,8 + +0000000080000134 : +Zknd_aes64im_cg_cp_rs1_b5: + aes64im x3, x5 # perform operation + 80000134: 30029193 aes64im x3,x5 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zknd_aes64im_cg_cp_rs1_b5, Zknd_aes64im_cg_cp_rs1_b5_str) + 80000138: 0009b383 ld x7,0(x19) + 8000013c: 00338c63 beq x7,x3,80000154 + 80000140: 6980246f jal x8,800027d8 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 800088f4 .word 0x800088f4 + 80000150: 00000000 .word 0x00000000 + 80000154: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xeb91c441a3a9c484 + 80000158: 00063303 ld x6,0(x12) + 8000015c: 00860613 addi x12,x12,8 + +0000000080000160 : +Zknd_aes64im_cg_cp_rs1_b6: + aes64im x14, x6 # perform operation + 80000160: 30031713 aes64im x14,x6 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zknd_aes64im_cg_cp_rs1_b6, Zknd_aes64im_cg_cp_rs1_b6_str) + 80000164: 0009b383 ld x7,0(x19) + 80000168: 00e38c63 beq x7,x14,80000180 + 8000016c: 66c0246f jal x8,800027d8 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 80008928 .word 0x80008928 + 8000017c: 00000000 .word 0x00000000 + 80000180: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x908188dd3c8eedef + 8000018c: 00063383 ld x7,0(x12) + 80000190: 00860613 addi x12,x12,8 + +0000000080000194 : +Zknd_aes64im_cg_cp_rs1_b7: + aes64im x26, x7 # perform operation + 80000194: 30039d13 aes64im x26,x7 + # Check if x26 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x26, Zknd_aes64im_cg_cp_rs1_b7, Zknd_aes64im_cg_cp_rs1_b7_str) + 80000198: 0009b683 ld x13,0(x19) + 8000019c: 01a68c63 beq x13,x26,800001b4 + 800001a0: 6600276f jal x14,80002800 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 8000895c .word 0x8000895c + 800001b0: 00000000 .word 0x00000000 + 800001b4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x44d7b83294c9c8f1 + 800001b8: 00063403 ld x8,0(x12) + 800001bc: 00860613 addi x12,x12,8 + +00000000800001c0 : +Zknd_aes64im_cg_cp_rs1_b8: + aes64im x0, x8 # perform operation + 800001c0: 30041013 aes64im x0,x8 + # Check if x0 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x0, Zknd_aes64im_cg_cp_rs1_b8, Zknd_aes64im_cg_cp_rs1_b8_str) + 800001c4: 0009b683 ld x13,0(x19) + 800001c8: 00068c63 beq x13,x0,800001e0 + 800001cc: 6340276f jal x14,80002800 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 80008990 .word 0x80008990 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x0a34253625868820 + 800001e4: 00063483 ld x9,0(x12) + 800001e8: 00860613 addi x12,x12,8 + +00000000800001ec : +Zknd_aes64im_cg_cp_rs1_b9: + aes64im x17, x9 # perform operation + 800001ec: 30049893 aes64im x17,x9 + # Check if x17 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x17, Zknd_aes64im_cg_cp_rs1_b9, Zknd_aes64im_cg_cp_rs1_b9_str) + 800001f0: 0009b683 ld x13,0(x19) + 800001f4: 01168c63 beq x13,x17,8000020c + 800001f8: 6080276f jal x14,80002800 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 800089c4 .word 0x800089c4 + 80000208: 00000000 .word 0x00000000 + 8000020c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x98aa20c79d4d93dd + 80000210: 00063503 ld x10,0(x12) + 80000214: 00860613 addi x12,x12,8 + +0000000080000218 : +Zknd_aes64im_cg_cp_rs1_b10: + aes64im x2, x10 # perform operation + 80000218: 30051113 aes64im x2,x10 + # Check if x2 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x2, Zknd_aes64im_cg_cp_rs1_b10, Zknd_aes64im_cg_cp_rs1_b10_str) + 8000021c: 0009b683 ld x13,0(x19) + 80000220: 00268c63 beq x13,x2,80000238 + 80000224: 5dc0276f jal x14,80002800 + 80000228: 80000218 .word 0x80000218 + 8000022c: 00000000 .word 0x00000000 + 80000230: 800089f9 .word 0x800089f9 + 80000234: 00000000 .word 0x00000000 + 80000238: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xcc9fb7862a0faf89 + 8000023c: 00063583 ld x11,0(x12) + 80000240: 00860613 addi x12,x12,8 + +0000000080000244 : +Zknd_aes64im_cg_cp_rs1_b11: + aes64im x21, x11 # perform operation + 80000244: 30059a93 aes64im x21,x11 + # Check if x21 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x21, Zknd_aes64im_cg_cp_rs1_b11, Zknd_aes64im_cg_cp_rs1_b11_str) + 80000248: 0009b683 ld x13,0(x19) + 8000024c: 01568c63 beq x13,x21,80000264 + 80000250: 5b00276f jal x14,80002800 + 80000254: 80000244 .word 0x80000244 + 80000258: 00000000 .word 0x00000000 + 8000025c: 80008a2f .word 0x80008a2f + 80000260: 00000000 .word 0x00000000 + 80000264: 00898993 addi x19,x19,8 + + mv x18, x12 # switch data pointer register to avoid conflict with test + 80000268: 00060913 addi x18,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xa500a2f6653db8ae + 8000026c: 00093603 ld x12,0(x18) + 80000270: 00890913 addi x18,x18,8 + +0000000080000274 : +Zknd_aes64im_cg_cp_rs1_b12: + aes64im x10, x12 # perform operation + 80000274: 30061513 aes64im x10,x12 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zknd_aes64im_cg_cp_rs1_b12, Zknd_aes64im_cg_cp_rs1_b12_str) + 80000278: 0009b683 ld x13,0(x19) + 8000027c: 00a68c63 beq x13,x10,80000294 + 80000280: 5800276f jal x14,80002800 + 80000284: 80000274 .word 0x80000274 + 80000288: 00000000 .word 0x00000000 + 8000028c: 80008a65 .word 0x80008a65 + 80000290: 00000000 .word 0x00000000 + 80000294: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000298: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000029c: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x0866bfe1ff4ad1e2 + 800002a0: 00093683 ld x13,0(x18) + 800002a4: 00890913 addi x18,x18,8 + +00000000800002a8 : +Zknd_aes64im_cg_cp_rs1_b13: + aes64im x21, x13 # perform operation + 800002a8: 30069a93 aes64im x21,x13 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zknd_aes64im_cg_cp_rs1_b13, Zknd_aes64im_cg_cp_rs1_b13_str) + 800002ac: 0009b203 ld x4,0(x19) + 800002b0: 01520c63 beq x4,x21,800002c8 + 800002b4: 50c022ef jal x5,800027c0 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 80008a9b .word 0x80008a9b + 800002c4: 00000000 .word 0x00000000 + 800002c8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xb6993181eb5aa96e + 800002cc: 00093703 ld x14,0(x18) + 800002d0: 00890913 addi x18,x18,8 + +00000000800002d4 : +Zknd_aes64im_cg_cp_rs1_b14: + aes64im x29, x14 # perform operation + 800002d4: 30071e93 aes64im x29,x14 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zknd_aes64im_cg_cp_rs1_b14, Zknd_aes64im_cg_cp_rs1_b14_str) + 800002d8: 0009b203 ld x4,0(x19) + 800002dc: 01d20c63 beq x4,x29,800002f4 + 800002e0: 4e0022ef jal x5,800027c0 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 80008ad1 .word 0x80008ad1 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x40c4369dd47f2d24 + 800002f8: 00093783 ld x15,0(x18) + 800002fc: 00890913 addi x18,x18,8 + +0000000080000300 : +Zknd_aes64im_cg_cp_rs1_b15: + aes64im x13, x15 # perform operation + 80000300: 30079693 aes64im x13,x15 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zknd_aes64im_cg_cp_rs1_b15, Zknd_aes64im_cg_cp_rs1_b15_str) + 80000304: 0009b203 ld x4,0(x19) + 80000308: 00d20c63 beq x4,x13,80000320 + 8000030c: 4b4022ef jal x5,800027c0 + 80000310: 80000300 .word 0x80000300 + 80000314: 00000000 .word 0x00000000 + 80000318: 80008b07 .word 0x80008b07 + 8000031c: 00000000 .word 0x00000000 + 80000320: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x628ee9d13cc64058 + 80000324: 00093803 ld x16,0(x18) + 80000328: 00890913 addi x18,x18,8 + +000000008000032c : +Zknd_aes64im_cg_cp_rs1_b16: + aes64im x2, x16 # perform operation + 8000032c: 30081113 aes64im x2,x16 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zknd_aes64im_cg_cp_rs1_b16, Zknd_aes64im_cg_cp_rs1_b16_str) + 80000330: 0009b203 ld x4,0(x19) + 80000334: 00220c63 beq x4,x2,8000034c + 80000338: 488022ef jal x5,800027c0 + 8000033c: 8000032c .word 0x8000032c + 80000340: 00000000 .word 0x00000000 + 80000344: 80008b3d .word 0x80008b3d + 80000348: 00000000 .word 0x00000000 + 8000034c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x15d050c5c12a1201 + 80000350: 00093883 ld x17,0(x18) + 80000354: 00890913 addi x18,x18,8 + +0000000080000358 : +Zknd_aes64im_cg_cp_rs1_b17: + aes64im x7, x17 # perform operation + 80000358: 30089393 aes64im x7,x17 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zknd_aes64im_cg_cp_rs1_b17, Zknd_aes64im_cg_cp_rs1_b17_str) + 8000035c: 0009b203 ld x4,0(x19) + 80000360: 00720c63 beq x4,x7,80000378 + 80000364: 45c022ef jal x5,800027c0 + 80000368: 80000358 .word 0x80000358 + 8000036c: 00000000 .word 0x00000000 + 80000370: 80008b73 .word 0x80008b73 + 80000374: 00000000 .word 0x00000000 + 80000378: 00898993 addi x19,x19,8 + + mv x27, x18 # switch data pointer register to avoid conflict with test + 8000037c: 00090d93 addi x27,x18,0 +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x2c47cd9b8207eb2d + 80000380: 000db903 ld x18,0(x27) + 80000384: 008d8d93 addi x27,x27,8 + +0000000080000388 : +Zknd_aes64im_cg_cp_rs1_b18: + aes64im x17, x18 # perform operation + 80000388: 30091893 aes64im x17,x18 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zknd_aes64im_cg_cp_rs1_b18, Zknd_aes64im_cg_cp_rs1_b18_str) + 8000038c: 0009b203 ld x4,0(x19) + 80000390: 01120c63 beq x4,x17,800003a8 + 80000394: 42c022ef jal x5,800027c0 + 80000398: 80000388 .word 0x80000388 + 8000039c: 00000000 .word 0x00000000 + 800003a0: 80008ba9 .word 0x80008ba9 + 800003a4: 00000000 .word 0x00000000 + 800003a8: 00898993 addi x19,x19,8 + + mv x10, x19 # switch signature pointer register to avoid conflict with test + 800003ac: 00098513 addi x10,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0xb5ea89846e544045 + 800003b0: 000db983 ld x19,0(x27) + 800003b4: 008d8d93 addi x27,x27,8 + +00000000800003b8 : +Zknd_aes64im_cg_cp_rs1_b19: + aes64im x0, x19 # perform operation + 800003b8: 30099013 aes64im x0,x19 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zknd_aes64im_cg_cp_rs1_b19, Zknd_aes64im_cg_cp_rs1_b19_str) + 800003bc: 00053203 ld x4,0(x10) + 800003c0: 00020c63 beq x4,x0,800003d8 + 800003c4: 3fc022ef jal x5,800027c0 + 800003c8: 800003b8 .word 0x800003b8 + 800003cc: 00000000 .word 0x00000000 + 800003d0: 80008bdf .word 0x80008bdf + 800003d4: 00000000 .word 0x00000000 + 800003d8: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xcd92e5f900507db0 + 800003dc: 000dba03 ld x20,0(x27) + 800003e0: 008d8d93 addi x27,x27,8 + +00000000800003e4 : +Zknd_aes64im_cg_cp_rs1_b20: + aes64im x26, x20 # perform operation + 800003e4: 300a1d13 aes64im x26,x20 + # Check if x26 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x26, Zknd_aes64im_cg_cp_rs1_b20, Zknd_aes64im_cg_cp_rs1_b20_str) + 800003e8: 00053203 ld x4,0(x10) + 800003ec: 01a20c63 beq x4,x26,80000404 + 800003f0: 3d0022ef jal x5,800027c0 + 800003f4: 800003e4 .word 0x800003e4 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 80008c15 .word 0x80008c15 + 80000400: 00000000 .word 0x00000000 + 80000404: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xde138a7cff031537 + 80000408: 000dba83 ld x21,0(x27) + 8000040c: 008d8d93 addi x27,x27,8 + +0000000080000410 : +Zknd_aes64im_cg_cp_rs1_b21: + aes64im x0, x21 # perform operation + 80000410: 300a9013 aes64im x0,x21 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zknd_aes64im_cg_cp_rs1_b21, Zknd_aes64im_cg_cp_rs1_b21_str) + 80000414: 00053203 ld x4,0(x10) + 80000418: 00020c63 beq x4,x0,80000430 + 8000041c: 3a4022ef jal x5,800027c0 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 80008c4b .word 0x80008c4b + 8000042c: 00000000 .word 0x00000000 + 80000430: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0xfb63a54ea13d7c6d + 80000434: 000dbb03 ld x22,0(x27) + 80000438: 008d8d93 addi x27,x27,8 + +000000008000043c : +Zknd_aes64im_cg_cp_rs1_b22: + aes64im x19, x22 # perform operation + 8000043c: 300b1993 aes64im x19,x22 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknd_aes64im_cg_cp_rs1_b22, Zknd_aes64im_cg_cp_rs1_b22_str) + 80000440: 00053203 ld x4,0(x10) + 80000444: 01320c63 beq x4,x19,8000045c + 80000448: 378022ef jal x5,800027c0 + 8000044c: 8000043c .word 0x8000043c + 80000450: 00000000 .word 0x00000000 + 80000454: 80008c81 .word 0x80008c81 + 80000458: 00000000 .word 0x00000000 + 8000045c: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x2822fba8d4fdcd23 + 80000460: 000dbb83 ld x23,0(x27) + 80000464: 008d8d93 addi x27,x27,8 + +0000000080000468 : +Zknd_aes64im_cg_cp_rs1_b23: + aes64im x7, x23 # perform operation + 80000468: 300b9393 aes64im x7,x23 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknd_aes64im_cg_cp_rs1_b23, Zknd_aes64im_cg_cp_rs1_b23_str) + 8000046c: 00053203 ld x4,0(x10) + 80000470: 00720c63 beq x4,x7,80000488 + 80000474: 34c022ef jal x5,800027c0 + 80000478: 80000468 .word 0x80000468 + 8000047c: 00000000 .word 0x00000000 + 80000480: 80008cb7 .word 0x80008cb7 + 80000484: 00000000 .word 0x00000000 + 80000488: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x54e9a4b619b558d1 + 8000048c: 000dbc03 ld x24,0(x27) + 80000490: 008d8d93 addi x27,x27,8 + +0000000080000494 : +Zknd_aes64im_cg_cp_rs1_b24: + aes64im x6, x24 # perform operation + 80000494: 300c1313 aes64im x6,x24 + # Check if x6 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x6, Zknd_aes64im_cg_cp_rs1_b24, Zknd_aes64im_cg_cp_rs1_b24_str) + 80000498: 00053203 ld x4,0(x10) + 8000049c: 00620c63 beq x4,x6,800004b4 + 800004a0: 320022ef jal x5,800027c0 + 800004a4: 80000494 .word 0x80000494 + 800004a8: 00000000 .word 0x00000000 + 800004ac: 80008ced .word 0x80008ced + 800004b0: 00000000 .word 0x00000000 + 800004b4: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x4e4f985b0bf04074 + 800004b8: 000dbc83 ld x25,0(x27) + 800004bc: 008d8d93 addi x27,x27,8 + +00000000800004c0 : +Zknd_aes64im_cg_cp_rs1_b25: + aes64im x20, x25 # perform operation + 800004c0: 300c9a13 aes64im x20,x25 + # Check if x20 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x20, Zknd_aes64im_cg_cp_rs1_b25, Zknd_aes64im_cg_cp_rs1_b25_str) + 800004c4: 00053203 ld x4,0(x10) + 800004c8: 01420c63 beq x4,x20,800004e0 + 800004cc: 2f4022ef jal x5,800027c0 + 800004d0: 800004c0 .word 0x800004c0 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 80008d23 .word 0x80008d23 + 800004dc: 00000000 .word 0x00000000 + 800004e0: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x2f4d62816ff7090b + 800004e4: 000dbd03 ld x26,0(x27) + 800004e8: 008d8d93 addi x27,x27,8 + +00000000800004ec : +Zknd_aes64im_cg_cp_rs1_b26: + aes64im x19, x26 # perform operation + 800004ec: 300d1993 aes64im x19,x26 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknd_aes64im_cg_cp_rs1_b26, Zknd_aes64im_cg_cp_rs1_b26_str) + 800004f0: 00053203 ld x4,0(x10) + 800004f4: 01320c63 beq x4,x19,8000050c + 800004f8: 2c8022ef jal x5,800027c0 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 80008d59 .word 0x80008d59 + 80000508: 00000000 .word 0x00000000 + 8000050c: 00850513 addi x10,x10,8 + + mv x23, x27 # switch data pointer register to avoid conflict with test + 80000510: 000d8b93 addi x23,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xc01f3ef1ca92ab46 + 80000514: 000bbd83 ld x27,0(x23) + 80000518: 008b8b93 addi x23,x23,8 + +000000008000051c : +Zknd_aes64im_cg_cp_rs1_b27: + aes64im x15, x27 # perform operation + 8000051c: 300d9793 aes64im x15,x27 + # Check if x15 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x15, Zknd_aes64im_cg_cp_rs1_b27, Zknd_aes64im_cg_cp_rs1_b27_str) + 80000520: 00053203 ld x4,0(x10) + 80000524: 00f20c63 beq x4,x15,8000053c + 80000528: 298022ef jal x5,800027c0 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 80008d8f .word 0x80008d8f + 80000538: 00000000 .word 0x00000000 + 8000053c: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x822c9a03698107b2 + 80000540: 000bbe03 ld x28,0(x23) + 80000544: 008b8b93 addi x23,x23,8 + +0000000080000548 : +Zknd_aes64im_cg_cp_rs1_b28: + aes64im x9, x28 # perform operation + 80000548: 300e1493 aes64im x9,x28 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknd_aes64im_cg_cp_rs1_b28, Zknd_aes64im_cg_cp_rs1_b28_str) + 8000054c: 00053203 ld x4,0(x10) + 80000550: 00920c63 beq x4,x9,80000568 + 80000554: 26c022ef jal x5,800027c0 + 80000558: 80000548 .word 0x80000548 + 8000055c: 00000000 .word 0x00000000 + 80000560: 80008dc5 .word 0x80008dc5 + 80000564: 00000000 .word 0x00000000 + 80000568: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xf7a28eb78ccc3a7d + 8000056c: 000bbe83 ld x29,0(x23) + 80000570: 008b8b93 addi x23,x23,8 + +0000000080000574 : +Zknd_aes64im_cg_cp_rs1_b29: + aes64im x18, x29 # perform operation + 80000574: 300e9913 aes64im x18,x29 + # Check if x18 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x18, Zknd_aes64im_cg_cp_rs1_b29, Zknd_aes64im_cg_cp_rs1_b29_str) + 80000578: 00053203 ld x4,0(x10) + 8000057c: 01220c63 beq x4,x18,80000594 + 80000580: 240022ef jal x5,800027c0 + 80000584: 80000574 .word 0x80000574 + 80000588: 00000000 .word 0x00000000 + 8000058c: 80008dfb .word 0x80008dfb + 80000590: 00000000 .word 0x00000000 + 80000594: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xb727c4c50c217998 + 80000598: 000bbf03 ld x30,0(x23) + 8000059c: 008b8b93 addi x23,x23,8 + +00000000800005a0 : +Zknd_aes64im_cg_cp_rs1_b30: + aes64im x17, x30 # perform operation + 800005a0: 300f1893 aes64im x17,x30 + # Check if x17 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x17, Zknd_aes64im_cg_cp_rs1_b30, Zknd_aes64im_cg_cp_rs1_b30_str) + 800005a4: 00053203 ld x4,0(x10) + 800005a8: 01120c63 beq x4,x17,800005c0 + 800005ac: 214022ef jal x5,800027c0 + 800005b0: 800005a0 .word 0x800005a0 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 80008e31 .word 0x80008e31 + 800005bc: 00000000 .word 0x00000000 + 800005c0: 00850513 addi x10,x10,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xaea020aa1b6ae660 + 800005c4: 000bbf83 ld x31,0(x23) + 800005c8: 008b8b93 addi x23,x23,8 + +00000000800005cc : +Zknd_aes64im_cg_cp_rs1_b31: + aes64im x19, x31 # perform operation + 800005cc: 300f9993 aes64im x19,x31 + # Check if x19 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x19, Zknd_aes64im_cg_cp_rs1_b31, Zknd_aes64im_cg_cp_rs1_b31_str) + 800005d0: 00053203 ld x4,0(x10) + 800005d4: 01320c63 beq x4,x19,800005ec + 800005d8: 1e8022ef jal x5,800027c0 + 800005dc: 800005cc .word 0x800005cc + 800005e0: 00000000 .word 0x00000000 + 800005e4: 80008e67 .word 0x80008e67 + 800005e8: 00000000 .word 0x00000000 + 800005ec: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x757b72d46a625c06 + 800005f0: 000bb383 ld x7,0(x23) + 800005f4: 008b8b93 addi x23,x23,8 + +00000000800005f8 : +Zknd_aes64im_cg_cp_rd_b0: + aes64im x0, x7 # perform operation + 800005f8: 30039013 aes64im x0,x7 + # Check if x0 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x0, Zknd_aes64im_cg_cp_rd_b0, Zknd_aes64im_cg_cp_rd_b0_str) + 800005fc: 00053203 ld x4,0(x10) + 80000600: 00020c63 beq x4,x0,80000618 + 80000604: 1bc022ef jal x5,800027c0 + 80000608: 800005f8 .word 0x800005f8 + 8000060c: 00000000 .word 0x00000000 + 80000610: 80008e9d .word 0x80008e9d + 80000614: 00000000 .word 0x00000000 + 80000618: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0x9cf21c2e2d593b5e + 8000061c: 000bb783 ld x15,0(x23) + 80000620: 008b8b93 addi x23,x23,8 + +0000000080000624 : +Zknd_aes64im_cg_cp_rd_b1: + aes64im x1, x15 # perform operation + 80000624: 30079093 aes64im x1,x15 + # Check if x1 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x1, Zknd_aes64im_cg_cp_rd_b1, Zknd_aes64im_cg_cp_rd_b1_str) + 80000628: 00053203 ld x4,0(x10) + 8000062c: 00120c63 beq x4,x1,80000644 + 80000630: 190022ef jal x5,800027c0 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 80008ed1 .word 0x80008ed1 + 80000640: 00000000 .word 0x00000000 + 80000644: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x3dd737348f3cac7b + 80000648: 000bb983 ld x19,0(x23) + 8000064c: 008b8b93 addi x23,x23,8 + +0000000080000650 : +Zknd_aes64im_cg_cp_rd_b2: + aes64im x2, x19 # perform operation + 80000650: 30099113 aes64im x2,x19 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zknd_aes64im_cg_cp_rd_b2, Zknd_aes64im_cg_cp_rd_b2_str) + 80000654: 00053203 ld x4,0(x10) + 80000658: 00220c63 beq x4,x2,80000670 + 8000065c: 164022ef jal x5,800027c0 + 80000660: 80000650 .word 0x80000650 + 80000664: 00000000 .word 0x00000000 + 80000668: 80008f05 .word 0x80008f05 + 8000066c: 00000000 .word 0x00000000 + 80000670: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xe6b4833b6fd77aa3 + 80000674: 000bbd03 ld x26,0(x23) + 80000678: 008b8b93 addi x23,x23,8 + +000000008000067c : +Zknd_aes64im_cg_cp_rd_b3: + aes64im x3, x26 # perform operation + 8000067c: 300d1193 aes64im x3,x26 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zknd_aes64im_cg_cp_rd_b3, Zknd_aes64im_cg_cp_rd_b3_str) + 80000680: 00053203 ld x4,0(x10) + 80000684: 00320c63 beq x4,x3,8000069c + 80000688: 138022ef jal x5,800027c0 + 8000068c: 8000067c .word 0x8000067c + 80000690: 00000000 .word 0x00000000 + 80000694: 80008f39 .word 0x80008f39 + 80000698: 00000000 .word 0x00000000 + 8000069c: 00850513 addi x10,x10,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800006a0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800006a4: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xfde8fcbf6b9f03b0 + 800006a8: 000bbe03 ld x28,0(x23) + 800006ac: 008b8b93 addi x23,x23,8 + +00000000800006b0 : +Zknd_aes64im_cg_cp_rd_b4: + aes64im x4, x28 # perform operation + 800006b0: 300e1213 aes64im x4,x28 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknd_aes64im_cg_cp_rd_b4, Zknd_aes64im_cg_cp_rd_b4_str) + 800006b4: 00053383 ld x7,0(x10) + 800006b8: 00438c63 beq x7,x4,800006d0 + 800006bc: 11c0246f jal x8,800027d8 + 800006c0: 800006b0 .word 0x800006b0 + 800006c4: 00000000 .word 0x00000000 + 800006c8: 80008f6d .word 0x80008f6d + 800006cc: 00000000 .word 0x00000000 + 800006d0: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x13e779b1d967b82e + 800006d4: 000bb003 ld x0,0(x23) + 800006d8: 008b8b93 addi x23,x23,8 + +00000000800006dc : +Zknd_aes64im_cg_cp_rd_b5: + aes64im x5, x0 # perform operation + 800006dc: 30001293 aes64im x5,x0 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknd_aes64im_cg_cp_rd_b5, Zknd_aes64im_cg_cp_rd_b5_str) + 800006e0: 00053383 ld x7,0(x10) + 800006e4: 00538c63 beq x7,x5,800006fc + 800006e8: 0f00246f jal x8,800027d8 + 800006ec: 800006dc .word 0x800006dc + 800006f0: 00000000 .word 0x00000000 + 800006f4: 80008fa1 .word 0x80008fa1 + 800006f8: 00000000 .word 0x00000000 + 800006fc: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0fc4a31fbe9e18ba + 80000700: 000bbc03 ld x24,0(x23) + 80000704: 008b8b93 addi x23,x23,8 + +0000000080000708 : +Zknd_aes64im_cg_cp_rd_b6: + aes64im x6, x24 # perform operation + 80000708: 300c1313 aes64im x6,x24 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknd_aes64im_cg_cp_rd_b6, Zknd_aes64im_cg_cp_rd_b6_str) + 8000070c: 00053383 ld x7,0(x10) + 80000710: 00638c63 beq x7,x6,80000728 + 80000714: 0c40246f jal x8,800027d8 + 80000718: 80000708 .word 0x80000708 + 8000071c: 00000000 .word 0x00000000 + 80000720: 80008fd5 .word 0x80008fd5 + 80000724: 00000000 .word 0x00000000 + 80000728: 00850513 addi x10,x10,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000072c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000730: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x535642b843cb1464 + 80000734: 000bba03 ld x20,0(x23) + 80000738: 008b8b93 addi x23,x23,8 + +000000008000073c : +Zknd_aes64im_cg_cp_rd_b7: + aes64im x7, x20 # perform operation + 8000073c: 300a1393 aes64im x7,x20 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zknd_aes64im_cg_cp_rd_b7, Zknd_aes64im_cg_cp_rd_b7_str) + 80000740: 00053683 ld x13,0(x10) + 80000744: 00768c63 beq x13,x7,8000075c + 80000748: 0b80276f jal x14,80002800 + 8000074c: 8000073c .word 0x8000073c + 80000750: 00000000 .word 0x00000000 + 80000754: 80009009 .word 0x80009009 + 80000758: 00000000 .word 0x00000000 + 8000075c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x48b4b6e5e8de33ab + 80000760: 000bb583 ld x11,0(x23) + 80000764: 008b8b93 addi x23,x23,8 + +0000000080000768 : +Zknd_aes64im_cg_cp_rd_b8: + aes64im x8, x11 # perform operation + 80000768: 30059413 aes64im x8,x11 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zknd_aes64im_cg_cp_rd_b8, Zknd_aes64im_cg_cp_rd_b8_str) + 8000076c: 00053683 ld x13,0(x10) + 80000770: 00868c63 beq x13,x8,80000788 + 80000774: 08c0276f jal x14,80002800 + 80000778: 80000768 .word 0x80000768 + 8000077c: 00000000 .word 0x00000000 + 80000780: 8000903d .word 0x8000903d + 80000784: 00000000 .word 0x00000000 + 80000788: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x90a3e6dcffde989e + 8000078c: 000bbb03 ld x22,0(x23) + 80000790: 008b8b93 addi x23,x23,8 + +0000000080000794 : +Zknd_aes64im_cg_cp_rd_b9: + aes64im x9, x22 # perform operation + 80000794: 300b1493 aes64im x9,x22 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zknd_aes64im_cg_cp_rd_b9, Zknd_aes64im_cg_cp_rd_b9_str) + 80000798: 00053683 ld x13,0(x10) + 8000079c: 00968c63 beq x13,x9,800007b4 + 800007a0: 0600276f jal x14,80002800 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 80009071 .word 0x80009071 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00850513 addi x10,x10,8 + + mv x31, x10 # switch signature pointer register to avoid conflict with test + 800007b8: 00050f93 addi x31,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0e83badcd2d5f2b3 + 800007bc: 000bb983 ld x19,0(x23) + 800007c0: 008b8b93 addi x23,x23,8 + +00000000800007c4 : +Zknd_aes64im_cg_cp_rd_b10: + aes64im x10, x19 # perform operation + 800007c4: 30099513 aes64im x10,x19 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zknd_aes64im_cg_cp_rd_b10, Zknd_aes64im_cg_cp_rd_b10_str) + 800007c8: 000fb683 ld x13,0(x31) + 800007cc: 00a68c63 beq x13,x10,800007e4 + 800007d0: 0300276f jal x14,80002800 + 800007d4: 800007c4 .word 0x800007c4 + 800007d8: 00000000 .word 0x00000000 + 800007dc: 800090a5 .word 0x800090a5 + 800007e0: 00000000 .word 0x00000000 + 800007e4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xb3579512cf01eca7 + 800007e8: 000bb903 ld x18,0(x23) + 800007ec: 008b8b93 addi x23,x23,8 + +00000000800007f0 : +Zknd_aes64im_cg_cp_rd_b11: + aes64im x11, x18 # perform operation + 800007f0: 30091593 aes64im x11,x18 + # Check if x11 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x11, Zknd_aes64im_cg_cp_rd_b11, Zknd_aes64im_cg_cp_rd_b11_str) + 800007f4: 000fb683 ld x13,0(x31) + 800007f8: 00b68c63 beq x13,x11,80000810 + 800007fc: 0040276f jal x14,80002800 + 80000800: 800007f0 .word 0x800007f0 + 80000804: 00000000 .word 0x00000000 + 80000808: 800090da .word 0x800090da + 8000080c: 00000000 .word 0x00000000 + 80000810: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xa757d6523883d563 + 80000814: 000bba83 ld x21,0(x23) + 80000818: 008b8b93 addi x23,x23,8 + +000000008000081c : +Zknd_aes64im_cg_cp_rd_b12: + aes64im x12, x21 # perform operation + 8000081c: 300a9613 aes64im x12,x21 + # Check if x12 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x12, Zknd_aes64im_cg_cp_rd_b12, Zknd_aes64im_cg_cp_rd_b12_str) + 80000820: 000fb683 ld x13,0(x31) + 80000824: 00c68c63 beq x13,x12,8000083c + 80000828: 7d90176f jal x14,80002800 + 8000082c: 8000081c .word 0x8000081c + 80000830: 00000000 .word 0x00000000 + 80000834: 8000910f .word 0x8000910f + 80000838: 00000000 .word 0x00000000 + 8000083c: 008f8f93 addi x31,x31,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000840: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000844: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x0ad1318dcc2d21d1 + 80000848: 000bb983 ld x19,0(x23) + 8000084c: 008b8b93 addi x23,x23,8 + +0000000080000850 : +Zknd_aes64im_cg_cp_rd_b13: + aes64im x13, x19 # perform operation + 80000850: 30099693 aes64im x13,x19 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zknd_aes64im_cg_cp_rd_b13, Zknd_aes64im_cg_cp_rd_b13_str) + 80000854: 000fb203 ld x4,0(x31) + 80000858: 00d20c63 beq x4,x13,80000870 + 8000085c: 765012ef jal x5,800027c0 + 80000860: 80000850 .word 0x80000850 + 80000864: 00000000 .word 0x00000000 + 80000868: 80009144 .word 0x80009144 + 8000086c: 00000000 .word 0x00000000 + 80000870: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x9d78c1420ed9b4a4 + 80000874: 000bbc03 ld x24,0(x23) + 80000878: 008b8b93 addi x23,x23,8 + +000000008000087c : +Zknd_aes64im_cg_cp_rd_b14: + aes64im x14, x24 # perform operation + 8000087c: 300c1713 aes64im x14,x24 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknd_aes64im_cg_cp_rd_b14, Zknd_aes64im_cg_cp_rd_b14_str) + 80000880: 000fb203 ld x4,0(x31) + 80000884: 00e20c63 beq x4,x14,8000089c + 80000888: 739012ef jal x5,800027c0 + 8000088c: 8000087c .word 0x8000087c + 80000890: 00000000 .word 0x00000000 + 80000894: 80009179 .word 0x80009179 + 80000898: 00000000 .word 0x00000000 + 8000089c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xaa3e6c69dde71573 + 800008a0: 000bb183 ld x3,0(x23) + 800008a4: 008b8b93 addi x23,x23,8 + +00000000800008a8 : +Zknd_aes64im_cg_cp_rd_b15: + aes64im x15, x3 # perform operation + 800008a8: 30019793 aes64im x15,x3 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zknd_aes64im_cg_cp_rd_b15, Zknd_aes64im_cg_cp_rd_b15_str) + 800008ac: 000fb203 ld x4,0(x31) + 800008b0: 00f20c63 beq x4,x15,800008c8 + 800008b4: 70d012ef jal x5,800027c0 + 800008b8: 800008a8 .word 0x800008a8 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 800091ae .word 0x800091ae + 800008c4: 00000000 .word 0x00000000 + 800008c8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x264314adf1896e41 + 800008cc: 000bb303 ld x6,0(x23) + 800008d0: 008b8b93 addi x23,x23,8 + +00000000800008d4 : +Zknd_aes64im_cg_cp_rd_b16: + aes64im x16, x6 # perform operation + 800008d4: 30031813 aes64im x16,x6 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zknd_aes64im_cg_cp_rd_b16, Zknd_aes64im_cg_cp_rd_b16_str) + 800008d8: 000fb203 ld x4,0(x31) + 800008dc: 01020c63 beq x4,x16,800008f4 + 800008e0: 6e1012ef jal x5,800027c0 + 800008e4: 800008d4 .word 0x800008d4 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 800091e3 .word 0x800091e3 + 800008f0: 00000000 .word 0x00000000 + 800008f4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x3ae77d2bd6e36581 + 800008f8: 000bba03 ld x20,0(x23) + 800008fc: 008b8b93 addi x23,x23,8 + +0000000080000900 : +Zknd_aes64im_cg_cp_rd_b17: + aes64im x17, x20 # perform operation + 80000900: 300a1893 aes64im x17,x20 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zknd_aes64im_cg_cp_rd_b17, Zknd_aes64im_cg_cp_rd_b17_str) + 80000904: 000fb203 ld x4,0(x31) + 80000908: 01120c63 beq x4,x17,80000920 + 8000090c: 6b5012ef jal x5,800027c0 + 80000910: 80000900 .word 0x80000900 + 80000914: 00000000 .word 0x00000000 + 80000918: 80009218 .word 0x80009218 + 8000091c: 00000000 .word 0x00000000 + 80000920: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x7f879110343407a4 + 80000924: 000bba03 ld x20,0(x23) + 80000928: 008b8b93 addi x23,x23,8 + +000000008000092c : +Zknd_aes64im_cg_cp_rd_b18: + aes64im x18, x20 # perform operation + 8000092c: 300a1913 aes64im x18,x20 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zknd_aes64im_cg_cp_rd_b18, Zknd_aes64im_cg_cp_rd_b18_str) + 80000930: 000fb203 ld x4,0(x31) + 80000934: 01220c63 beq x4,x18,8000094c + 80000938: 689012ef jal x5,800027c0 + 8000093c: 8000092c .word 0x8000092c + 80000940: 00000000 .word 0x00000000 + 80000944: 8000924d .word 0x8000924d + 80000948: 00000000 .word 0x00000000 + 8000094c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xaafe2269cc5d8c8b + 80000950: 000bb103 ld x2,0(x23) + 80000954: 008b8b93 addi x23,x23,8 + +0000000080000958 : +Zknd_aes64im_cg_cp_rd_b19: + aes64im x19, x2 # perform operation + 80000958: 30011993 aes64im x19,x2 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zknd_aes64im_cg_cp_rd_b19, Zknd_aes64im_cg_cp_rd_b19_str) + 8000095c: 000fb203 ld x4,0(x31) + 80000960: 01320c63 beq x4,x19,80000978 + 80000964: 65d012ef jal x5,800027c0 + 80000968: 80000958 .word 0x80000958 + 8000096c: 00000000 .word 0x00000000 + 80000970: 80009282 .word 0x80009282 + 80000974: 00000000 .word 0x00000000 + 80000978: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x0b4af2b804604c09 + 8000097c: 000bb803 ld x16,0(x23) + 80000980: 008b8b93 addi x23,x23,8 + +0000000080000984 : +Zknd_aes64im_cg_cp_rd_b20: + aes64im x20, x16 # perform operation + 80000984: 30081a13 aes64im x20,x16 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zknd_aes64im_cg_cp_rd_b20, Zknd_aes64im_cg_cp_rd_b20_str) + 80000988: 000fb203 ld x4,0(x31) + 8000098c: 01420c63 beq x4,x20,800009a4 + 80000990: 631012ef jal x5,800027c0 + 80000994: 80000984 .word 0x80000984 + 80000998: 00000000 .word 0x00000000 + 8000099c: 800092b7 .word 0x800092b7 + 800009a0: 00000000 .word 0x00000000 + 800009a4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x6fb1fd9c40799104 + 800009a8: 000bb003 ld x0,0(x23) + 800009ac: 008b8b93 addi x23,x23,8 + +00000000800009b0 : +Zknd_aes64im_cg_cp_rd_b21: + aes64im x21, x0 # perform operation + 800009b0: 30001a93 aes64im x21,x0 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zknd_aes64im_cg_cp_rd_b21, Zknd_aes64im_cg_cp_rd_b21_str) + 800009b4: 000fb203 ld x4,0(x31) + 800009b8: 01520c63 beq x4,x21,800009d0 + 800009bc: 605012ef jal x5,800027c0 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 800092ec .word 0x800092ec + 800009cc: 00000000 .word 0x00000000 + 800009d0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x1001b1158bd6bd77 + 800009d4: 000bb983 ld x19,0(x23) + 800009d8: 008b8b93 addi x23,x23,8 + +00000000800009dc : +Zknd_aes64im_cg_cp_rd_b22: + aes64im x22, x19 # perform operation + 800009dc: 30099b13 aes64im x22,x19 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zknd_aes64im_cg_cp_rd_b22, Zknd_aes64im_cg_cp_rd_b22_str) + 800009e0: 000fb203 ld x4,0(x31) + 800009e4: 01620c63 beq x4,x22,800009fc + 800009e8: 5d9012ef jal x5,800027c0 + 800009ec: 800009dc .word 0x800009dc + 800009f0: 00000000 .word 0x00000000 + 800009f4: 80009321 .word 0x80009321 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 008f8f93 addi x31,x31,8 + + mv x26, x23 # switch data pointer register to avoid conflict with test + 80000a00: 000b8d13 addi x26,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0xb7dadad8736e885b + 80000a04: 000d3803 ld x16,0(x26) + 80000a08: 008d0d13 addi x26,x26,8 + +0000000080000a0c : +Zknd_aes64im_cg_cp_rd_b23: + aes64im x23, x16 # perform operation + 80000a0c: 30081b93 aes64im x23,x16 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zknd_aes64im_cg_cp_rd_b23, Zknd_aes64im_cg_cp_rd_b23_str) + 80000a10: 000fb203 ld x4,0(x31) + 80000a14: 01720c63 beq x4,x23,80000a2c + 80000a18: 5a9012ef jal x5,800027c0 + 80000a1c: 80000a0c .word 0x80000a0c + 80000a20: 00000000 .word 0x00000000 + 80000a24: 80009356 .word 0x80009356 + 80000a28: 00000000 .word 0x00000000 + 80000a2c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x6) # load rs1: x6 = 0x9dcec43c664fb466 + 80000a30: 000d3303 ld x6,0(x26) + 80000a34: 008d0d13 addi x26,x26,8 + +0000000080000a38 : +Zknd_aes64im_cg_cp_rd_b24: + aes64im x24, x6 # perform operation + 80000a38: 30031c13 aes64im x24,x6 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zknd_aes64im_cg_cp_rd_b24, Zknd_aes64im_cg_cp_rd_b24_str) + 80000a3c: 000fb203 ld x4,0(x31) + 80000a40: 01820c63 beq x4,x24,80000a58 + 80000a44: 57d012ef jal x5,800027c0 + 80000a48: 80000a38 .word 0x80000a38 + 80000a4c: 00000000 .word 0x00000000 + 80000a50: 8000938b .word 0x8000938b + 80000a54: 00000000 .word 0x00000000 + 80000a58: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0x0599591e99d10509 + 80000a5c: 000d3b03 ld x22,0(x26) + 80000a60: 008d0d13 addi x26,x26,8 + +0000000080000a64 : +Zknd_aes64im_cg_cp_rd_b25: + aes64im x25, x22 # perform operation + 80000a64: 300b1c93 aes64im x25,x22 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknd_aes64im_cg_cp_rd_b25, Zknd_aes64im_cg_cp_rd_b25_str) + 80000a68: 000fb203 ld x4,0(x31) + 80000a6c: 01920c63 beq x4,x25,80000a84 + 80000a70: 551012ef jal x5,800027c0 + 80000a74: 80000a64 .word 0x80000a64 + 80000a78: 00000000 .word 0x00000000 + 80000a7c: 800093c0 .word 0x800093c0 + 80000a80: 00000000 .word 0x00000000 + 80000a84: 008f8f93 addi x31,x31,8 + + mv x30, x26 # switch data pointer register to avoid conflict with test + 80000a88: 000d0f13 addi x30,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0xcdbeb55deac16ed7 + 80000a8c: 000f3c03 ld x24,0(x30) + 80000a90: 008f0f13 addi x30,x30,8 + +0000000080000a94 : +Zknd_aes64im_cg_cp_rd_b26: + aes64im x26, x24 # perform operation + 80000a94: 300c1d13 aes64im x26,x24 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zknd_aes64im_cg_cp_rd_b26, Zknd_aes64im_cg_cp_rd_b26_str) + 80000a98: 000fb203 ld x4,0(x31) + 80000a9c: 01a20c63 beq x4,x26,80000ab4 + 80000aa0: 521012ef jal x5,800027c0 + 80000aa4: 80000a94 .word 0x80000a94 + 80000aa8: 00000000 .word 0x00000000 + 80000aac: 800093f5 .word 0x800093f5 + 80000ab0: 00000000 .word 0x00000000 + 80000ab4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0xe460ee3d8966545f + 80000ab8: 000f3683 ld x13,0(x30) + 80000abc: 008f0f13 addi x30,x30,8 + +0000000080000ac0 : +Zknd_aes64im_cg_cp_rd_b27: + aes64im x27, x13 # perform operation + 80000ac0: 30069d93 aes64im x27,x13 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zknd_aes64im_cg_cp_rd_b27, Zknd_aes64im_cg_cp_rd_b27_str) + 80000ac4: 000fb203 ld x4,0(x31) + 80000ac8: 01b20c63 beq x4,x27,80000ae0 + 80000acc: 4f5012ef jal x5,800027c0 + 80000ad0: 80000ac0 .word 0x80000ac0 + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 8000942a .word 0x8000942a + 80000adc: 00000000 .word 0x00000000 + 80000ae0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x1) # load rs1: x1 = 0x9d54dd3ec2802fef + 80000ae4: 000f3083 ld x1,0(x30) + 80000ae8: 008f0f13 addi x30,x30,8 + +0000000080000aec : +Zknd_aes64im_cg_cp_rd_b28: + aes64im x28, x1 # perform operation + 80000aec: 30009e13 aes64im x28,x1 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknd_aes64im_cg_cp_rd_b28, Zknd_aes64im_cg_cp_rd_b28_str) + 80000af0: 000fb203 ld x4,0(x31) + 80000af4: 01c20c63 beq x4,x28,80000b0c + 80000af8: 4c9012ef jal x5,800027c0 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 8000945f .word 0x8000945f + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x7) # load rs1: x7 = 0x3368a9b6d74cd1b7 + 80000b10: 000f3383 ld x7,0(x30) + 80000b14: 008f0f13 addi x30,x30,8 + +0000000080000b18 : +Zknd_aes64im_cg_cp_rd_b29: + aes64im x29, x7 # perform operation + 80000b18: 30039e93 aes64im x29,x7 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknd_aes64im_cg_cp_rd_b29, Zknd_aes64im_cg_cp_rd_b29_str) + 80000b1c: 000fb203 ld x4,0(x31) + 80000b20: 01d20c63 beq x4,x29,80000b38 + 80000b24: 49d012ef jal x5,800027c0 + 80000b28: 80000b18 .word 0x80000b18 + 80000b2c: 00000000 .word 0x00000000 + 80000b30: 80009494 .word 0x80009494 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 008f8f93 addi x31,x31,8 + + mv x10, x30 # switch data pointer register to avoid conflict with test + 80000b3c: 000f0513 addi x10,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xa502ca0b77a0cf36 + 80000b40: 00053e03 ld x28,0(x10) + 80000b44: 00850513 addi x10,x10,8 + +0000000080000b48 : +Zknd_aes64im_cg_cp_rd_b30: + aes64im x30, x28 # perform operation + 80000b48: 300e1f13 aes64im x30,x28 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknd_aes64im_cg_cp_rd_b30, Zknd_aes64im_cg_cp_rd_b30_str) + 80000b4c: 000fb203 ld x4,0(x31) + 80000b50: 01e20c63 beq x4,x30,80000b68 + 80000b54: 46d012ef jal x5,800027c0 + 80000b58: 80000b48 .word 0x80000b48 + 80000b5c: 00000000 .word 0x00000000 + 80000b60: 800094c9 .word 0x800094c9 + 80000b64: 00000000 .word 0x00000000 + 80000b68: 008f8f93 addi x31,x31,8 + + mv x23, x31 # switch signature pointer register to avoid conflict with test + 80000b6c: 000f8b93 addi x23,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x4867744f8819704b + 80000b70: 00053883 ld x17,0(x10) + 80000b74: 00850513 addi x10,x10,8 + +0000000080000b78 : +Zknd_aes64im_cg_cp_rd_b31: + aes64im x31, x17 # perform operation + 80000b78: 30089f93 aes64im x31,x17 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zknd_aes64im_cg_cp_rd_b31, Zknd_aes64im_cg_cp_rd_b31_str) + 80000b7c: 000bb203 ld x4,0(x23) + 80000b80: 01f20c63 beq x4,x31,80000b98 + 80000b84: 43d012ef jal x5,800027c0 + 80000b88: 80000b78 .word 0x80000b78 + 80000b8c: 00000000 .word 0x00000000 + 80000b90: 800094fe .word 0x800094fe + 80000b94: 00000000 .word 0x00000000 + 80000b98: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000000 + 80000b9c: 00053483 ld x9,0(x10) + 80000ba0: 00850513 addi x10,x10,8 + +0000000080000ba4 : +Zknd_aes64im_cg_cp_rs1_edges_0x0: + aes64im x7, x9 # perform operation + 80000ba4: 30049393 aes64im x7,x9 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zknd_aes64im_cg_cp_rs1_edges_0x0, Zknd_aes64im_cg_cp_rs1_edges_0x0_str) + 80000ba8: 000bb203 ld x4,0(x23) + 80000bac: 00720c63 beq x4,x7,80000bc4 + 80000bb0: 411012ef jal x5,800027c0 + 80000bb4: 80000ba4 .word 0x80000ba4 + 80000bb8: 00000000 .word 0x00000000 + 80000bbc: 80009533 .word 0x80009533 + 80000bc0: 00000000 .word 0x00000000 + 80000bc4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000001 + 80000bc8: 00053983 ld x19,0(x10) + 80000bcc: 00850513 addi x10,x10,8 + +0000000080000bd0 : +Zknd_aes64im_cg_cp_rs1_edges_0x1: + aes64im x12, x19 # perform operation + 80000bd0: 30099613 aes64im x12,x19 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zknd_aes64im_cg_cp_rs1_edges_0x1, Zknd_aes64im_cg_cp_rs1_edges_0x1_str) + 80000bd4: 000bb203 ld x4,0(x23) + 80000bd8: 00c20c63 beq x4,x12,80000bf0 + 80000bdc: 3e5012ef jal x5,800027c0 + 80000be0: 80000bd0 .word 0x80000bd0 + 80000be4: 00000000 .word 0x00000000 + 80000be8: 8000956f .word 0x8000956f + 80000bec: 00000000 .word 0x00000000 + 80000bf0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000002 + 80000bf4: 00053d83 ld x27,0(x10) + 80000bf8: 00850513 addi x10,x10,8 + +0000000080000bfc : +Zknd_aes64im_cg_cp_rs1_edges_0x2: + aes64im x19, x27 # perform operation + 80000bfc: 300d9993 aes64im x19,x27 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknd_aes64im_cg_cp_rs1_edges_0x2, Zknd_aes64im_cg_cp_rs1_edges_0x2_str) + 80000c00: 000bb203 ld x4,0(x23) + 80000c04: 01320c63 beq x4,x19,80000c1c + 80000c08: 3b9012ef jal x5,800027c0 + 80000c0c: 80000bfc .word 0x80000bfc + 80000c10: 00000000 .word 0x00000000 + 80000c14: 800095ab .word 0x800095ab + 80000c18: 00000000 .word 0x00000000 + 80000c1c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000000 + 80000c20: 00053a03 ld x20,0(x10) + 80000c24: 00850513 addi x10,x10,8 + +0000000080000c28 : +Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000000: + aes64im x7, x20 # perform operation + 80000c28: 300a1393 aes64im x7,x20 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000000, Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c2c: 000bb203 ld x4,0(x23) + 80000c30: 00720c63 beq x4,x7,80000c48 + 80000c34: 38d012ef jal x5,800027c0 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 800095e7 .word 0x800095e7 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x8000000000000001 + 80000c4c: 00053b03 ld x22,0(x10) + 80000c50: 00850513 addi x10,x10,8 + +0000000080000c54 : +Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000001: + aes64im x13, x22 # perform operation + 80000c54: 300b1693 aes64im x13,x22 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000001, Zknd_aes64im_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c58: 000bb203 ld x4,0(x23) + 80000c5c: 00d20c63 beq x4,x13,80000c74 + 80000c60: 361012ef jal x5,800027c0 + 80000c64: 80000c54 .word 0x80000c54 + 80000c68: 00000000 .word 0x00000000 + 80000c6c: 80009632 .word 0x80009632 + 80000c70: 00000000 .word 0x00000000 + 80000c74: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7fffffffffffffff + 80000c78: 00053303 ld x6,0(x10) + 80000c7c: 00850513 addi x10,x10,8 + +0000000080000c80 : +Zknd_aes64im_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64im x27, x6 # perform operation + 80000c80: 30031d93 aes64im x27,x6 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zknd_aes64im_cg_cp_rs1_edges_0x7fffffffffffffff, Zknd_aes64im_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c84: 000bb203 ld x4,0(x23) + 80000c88: 01b20c63 beq x4,x27,80000ca0 + 80000c8c: 335012ef jal x5,800027c0 + 80000c90: 80000c80 .word 0x80000c80 + 80000c94: 00000000 .word 0x00000000 + 80000c98: 8000967d .word 0x8000967d + 80000c9c: 00000000 .word 0x00000000 + 80000ca0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80000ca4: 00053903 ld x18,0(x10) + 80000ca8: 00850513 addi x10,x10,8 + +0000000080000cac : +Zknd_aes64im_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64im x9, x18 # perform operation + 80000cac: 30091493 aes64im x9,x18 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zknd_aes64im_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknd_aes64im_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000cb0: 000bb203 ld x4,0(x23) + 80000cb4: 00920c63 beq x4,x9,80000ccc + 80000cb8: 309012ef jal x5,800027c0 + 80000cbc: 80000cac .word 0x80000cac + 80000cc0: 00000000 .word 0x00000000 + 80000cc4: 800096c8 .word 0x800096c8 + 80000cc8: 00000000 .word 0x00000000 + 80000ccc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xffffffffffffffff + 80000cd0: 00053f03 ld x30,0(x10) + 80000cd4: 00850513 addi x10,x10,8 + +0000000080000cd8 : +Zknd_aes64im_cg_cp_rs1_edges_0xffffffffffffffff: + aes64im x28, x30 # perform operation + 80000cd8: 300f1e13 aes64im x28,x30 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zknd_aes64im_cg_cp_rs1_edges_0xffffffffffffffff, Zknd_aes64im_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cdc: 000bb203 ld x4,0(x23) + 80000ce0: 01c20c63 beq x4,x28,80000cf8 + 80000ce4: 2dd012ef jal x5,800027c0 + 80000ce8: 80000cd8 .word 0x80000cd8 + 80000cec: 00000000 .word 0x00000000 + 80000cf0: 80009713 .word 0x80009713 + 80000cf4: 00000000 .word 0x00000000 + 80000cf8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 80000cfc: 00053c03 ld x24,0(x10) + 80000d00: 00850513 addi x10,x10,8 + +0000000080000d04 : +Zknd_aes64im_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64im x15, x24 # perform operation + 80000d04: 300c1793 aes64im x15,x24 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknd_aes64im_cg_cp_rs1_edges_0xfffffffffffffffe, Zknd_aes64im_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000d08: 000bb203 ld x4,0(x23) + 80000d0c: 00f20c63 beq x4,x15,80000d24 + 80000d10: 2b1012ef jal x5,800027c0 + 80000d14: 80000d04 .word 0x80000d04 + 80000d18: 00000000 .word 0x00000000 + 80000d1c: 8000975e .word 0x8000975e + 80000d20: 00000000 .word 0x00000000 + 80000d24: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80000d28: 00053783 ld x15,0(x10) + 80000d2c: 00850513 addi x10,x10,8 + +0000000080000d30 : +Zknd_aes64im_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64im x21, x15 # perform operation + 80000d30: 30079a93 aes64im x21,x15 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknd_aes64im_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknd_aes64im_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d34: 000bb203 ld x4,0(x23) + 80000d38: 01520c63 beq x4,x21,80000d50 + 80000d3c: 285012ef jal x5,800027c0 + 80000d40: 80000d30 .word 0x80000d30 + 80000d44: 00000000 .word 0x00000000 + 80000d48: 800097a9 .word 0x800097a9 + 80000d4c: 00000000 .word 0x00000000 + 80000d50: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80000d54: 00053d03 ld x26,0(x10) + 80000d58: 00850513 addi x10,x10,8 + +0000000080000d5c : +Zknd_aes64im_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64im x25, x26 # perform operation + 80000d5c: 300d1c93 aes64im x25,x26 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zknd_aes64im_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64im_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d60: 000bb203 ld x4,0(x23) + 80000d64: 01920c63 beq x4,x25,80000d7c + 80000d68: 259012ef jal x5,800027c0 + 80000d6c: 80000d5c .word 0x80000d5c + 80000d70: 00000000 .word 0x00000000 + 80000d74: 800097f4 .word 0x800097f4 + 80000d78: 00000000 .word 0x00000000 + 80000d7c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5555555555555555 + 80000d80: 00053883 ld x17,0(x10) + 80000d84: 00850513 addi x10,x10,8 + +0000000080000d88 : +Zknd_aes64im_cg_cp_rs1_edges_0x5555555555555555: + aes64im x21, x17 # perform operation + 80000d88: 30089a93 aes64im x21,x17 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknd_aes64im_cg_cp_rs1_edges_0x5555555555555555, Zknd_aes64im_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d8c: 000bb203 ld x4,0(x23) + 80000d90: 01520c63 beq x4,x21,80000da8 + 80000d94: 22d012ef jal x5,800027c0 + 80000d98: 80000d88 .word 0x80000d88 + 80000d9c: 00000000 .word 0x00000000 + 80000da0: 8000983f .word 0x8000983f + 80000da4: 00000000 .word 0x00000000 + 80000da8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000ffffffff + 80000dac: 00053d83 ld x27,0(x10) + 80000db0: 00850513 addi x10,x10,8 + +0000000080000db4 : +Zknd_aes64im_cg_cp_rs1_edges_0xffffffff: + aes64im x15, x27 # perform operation + 80000db4: 300d9793 aes64im x15,x27 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknd_aes64im_cg_cp_rs1_edges_0xffffffff, Zknd_aes64im_cg_cp_rs1_edges_0xffffffff_str) + 80000db8: 000bb203 ld x4,0(x23) + 80000dbc: 00f20c63 beq x4,x15,80000dd4 + 80000dc0: 201012ef jal x5,800027c0 + 80000dc4: 80000db4 .word 0x80000db4 + 80000dc8: 00000000 .word 0x00000000 + 80000dcc: 8000988a .word 0x8000988a + 80000dd0: 00000000 .word 0x00000000 + 80000dd4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000fffffffe + 80000dd8: 00053c03 ld x24,0(x10) + 80000ddc: 00850513 addi x10,x10,8 + +0000000080000de0 : +Zknd_aes64im_cg_cp_rs1_edges_0xfffffffe: + aes64im x29, x24 # perform operation + 80000de0: 300c1e93 aes64im x29,x24 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zknd_aes64im_cg_cp_rs1_edges_0xfffffffe, Zknd_aes64im_cg_cp_rs1_edges_0xfffffffe_str) + 80000de4: 000bb203 ld x4,0(x23) + 80000de8: 01d20c63 beq x4,x29,80000e00 + 80000dec: 1d5012ef jal x5,800027c0 + 80000df0: 80000de0 .word 0x80000de0 + 80000df4: 00000000 .word 0x00000000 + 80000df8: 800098cd .word 0x800098cd + 80000dfc: 00000000 .word 0x00000000 + 80000e00: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000100000000 + 80000e04: 00053783 ld x15,0(x10) + 80000e08: 00850513 addi x10,x10,8 + +0000000080000e0c : +Zknd_aes64im_cg_cp_rs1_edges_0x100000000: + aes64im x27, x15 # perform operation + 80000e0c: 30079d93 aes64im x27,x15 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zknd_aes64im_cg_cp_rs1_edges_0x100000000, Zknd_aes64im_cg_cp_rs1_edges_0x100000000_str) + 80000e10: 000bb203 ld x4,0(x23) + 80000e14: 01b20c63 beq x4,x27,80000e2c + 80000e18: 1a9012ef jal x5,800027c0 + 80000e1c: 80000e0c .word 0x80000e0c + 80000e20: 00000000 .word 0x00000000 + 80000e24: 80009910 .word 0x80009910 + 80000e28: 00000000 .word 0x00000000 + 80000e2c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80000e30: 00053303 ld x6,0(x10) + 80000e34: 00850513 addi x10,x10,8 + +0000000080000e38 : +Zknd_aes64im_cg_cp_rs1_edges_0x100000001: + aes64im x9, x6 # perform operation + 80000e38: 30031493 aes64im x9,x6 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zknd_aes64im_cg_cp_rs1_edges_0x100000001, Zknd_aes64im_cg_cp_rs1_edges_0x100000001_str) + 80000e3c: 000bb203 ld x4,0(x23) + 80000e40: 00920c63 beq x4,x9,80000e58 + 80000e44: 17d012ef jal x5,800027c0 + 80000e48: 80000e38 .word 0x80000e38 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 80009954 .word 0x80009954 + 80000e54: 00000000 .word 0x00000000 + 80000e58: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xa62e458cebae3862 + 80000e5c: 00053003 ld x0,0(x10) + 80000e60: 00850513 addi x10,x10,8 + +0000000080000e64 : +Zknd_aes64im_cg_cmp_rd_rs1_b0: + aes64im x0, x0 # perform operation + 80000e64: 30001013 aes64im x0,x0 + # Check if x0 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x0, Zknd_aes64im_cg_cmp_rd_rs1_b0, Zknd_aes64im_cg_cmp_rd_rs1_b0_str) + 80000e68: 000bb203 ld x4,0(x23) + 80000e6c: 00020c63 beq x4,x0,80000e84 + 80000e70: 151012ef jal x5,800027c0 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 80009998 .word 0x80009998 + 80000e80: 00000000 .word 0x00000000 + 80000e84: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x54e57d61a0470acf + 80000e88: 00053083 ld x1,0(x10) + 80000e8c: 00850513 addi x10,x10,8 + +0000000080000e90 : +Zknd_aes64im_cg_cmp_rd_rs1_b1: + aes64im x1, x1 # perform operation + 80000e90: 30009093 aes64im x1,x1 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zknd_aes64im_cg_cmp_rd_rs1_b1, Zknd_aes64im_cg_cmp_rd_rs1_b1_str) + 80000e94: 000bb203 ld x4,0(x23) + 80000e98: 00120c63 beq x4,x1,80000eb0 + 80000e9c: 125012ef jal x5,800027c0 + 80000ea0: 80000e90 .word 0x80000e90 + 80000ea4: 00000000 .word 0x00000000 + 80000ea8: 800099d1 .word 0x800099d1 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x3dbe762ca595f54c + 80000eb4: 00053103 ld x2,0(x10) + 80000eb8: 00850513 addi x10,x10,8 + +0000000080000ebc : +Zknd_aes64im_cg_cmp_rd_rs1_b2: + aes64im x2, x2 # perform operation + 80000ebc: 30011113 aes64im x2,x2 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zknd_aes64im_cg_cmp_rd_rs1_b2, Zknd_aes64im_cg_cmp_rd_rs1_b2_str) + 80000ec0: 000bb203 ld x4,0(x23) + 80000ec4: 00220c63 beq x4,x2,80000edc + 80000ec8: 0f9012ef jal x5,800027c0 + 80000ecc: 80000ebc .word 0x80000ebc + 80000ed0: 00000000 .word 0x00000000 + 80000ed4: 80009a0a .word 0x80009a0a + 80000ed8: 00000000 .word 0x00000000 + 80000edc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x947fc2cc93b00653 + 80000ee0: 00053183 ld x3,0(x10) + 80000ee4: 00850513 addi x10,x10,8 + +0000000080000ee8 : +Zknd_aes64im_cg_cmp_rd_rs1_b3: + aes64im x3, x3 # perform operation + 80000ee8: 30019193 aes64im x3,x3 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zknd_aes64im_cg_cmp_rd_rs1_b3, Zknd_aes64im_cg_cmp_rd_rs1_b3_str) + 80000eec: 000bb203 ld x4,0(x23) + 80000ef0: 00320c63 beq x4,x3,80000f08 + 80000ef4: 0cd012ef jal x5,800027c0 + 80000ef8: 80000ee8 .word 0x80000ee8 + 80000efc: 00000000 .word 0x00000000 + 80000f00: 80009a43 .word 0x80009a43 + 80000f04: 00000000 .word 0x00000000 + 80000f08: 008b8b93 addi x23,x23,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000f0c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000f10: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xb4a97e8c2a87a18a + 80000f14: 00053203 ld x4,0(x10) + 80000f18: 00850513 addi x10,x10,8 + +0000000080000f1c : +Zknd_aes64im_cg_cmp_rd_rs1_b4: + aes64im x4, x4 # perform operation + 80000f1c: 30021213 aes64im x4,x4 + # Check if x4 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x4, Zknd_aes64im_cg_cmp_rd_rs1_b4, Zknd_aes64im_cg_cmp_rd_rs1_b4_str) + 80000f20: 000bb683 ld x13,0(x23) + 80000f24: 00468c63 beq x13,x4,80000f3c + 80000f28: 0d90176f jal x14,80002800 + 80000f2c: 80000f1c .word 0x80000f1c + 80000f30: 00000000 .word 0x00000000 + 80000f34: 80009a7c .word 0x80009a7c + 80000f38: 00000000 .word 0x00000000 + 80000f3c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x57d305ff0d37a87c + 80000f40: 00053283 ld x5,0(x10) + 80000f44: 00850513 addi x10,x10,8 + +0000000080000f48 : +Zknd_aes64im_cg_cmp_rd_rs1_b5: + aes64im x5, x5 # perform operation + 80000f48: 30029293 aes64im x5,x5 + # Check if x5 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x5, Zknd_aes64im_cg_cmp_rd_rs1_b5, Zknd_aes64im_cg_cmp_rd_rs1_b5_str) + 80000f4c: 000bb683 ld x13,0(x23) + 80000f50: 00568c63 beq x13,x5,80000f68 + 80000f54: 0ad0176f jal x14,80002800 + 80000f58: 80000f48 .word 0x80000f48 + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 80009ab5 .word 0x80009ab5 + 80000f64: 00000000 .word 0x00000000 + 80000f68: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x191768004b79c1a1 + 80000f6c: 00053303 ld x6,0(x10) + 80000f70: 00850513 addi x10,x10,8 + +0000000080000f74 : +Zknd_aes64im_cg_cmp_rd_rs1_b6: + aes64im x6, x6 # perform operation + 80000f74: 30031313 aes64im x6,x6 + # Check if x6 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x6, Zknd_aes64im_cg_cmp_rd_rs1_b6, Zknd_aes64im_cg_cmp_rd_rs1_b6_str) + 80000f78: 000bb683 ld x13,0(x23) + 80000f7c: 00668c63 beq x13,x6,80000f94 + 80000f80: 0810176f jal x14,80002800 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 80009aee .word 0x80009aee + 80000f90: 00000000 .word 0x00000000 + 80000f94: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xa25b0a5e3116d6e2 + 80000f98: 00053383 ld x7,0(x10) + 80000f9c: 00850513 addi x10,x10,8 + +0000000080000fa0 : +Zknd_aes64im_cg_cmp_rd_rs1_b7: + aes64im x7, x7 # perform operation + 80000fa0: 30039393 aes64im x7,x7 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zknd_aes64im_cg_cmp_rd_rs1_b7, Zknd_aes64im_cg_cmp_rd_rs1_b7_str) + 80000fa4: 000bb683 ld x13,0(x23) + 80000fa8: 00768c63 beq x13,x7,80000fc0 + 80000fac: 0550176f jal x14,80002800 + 80000fb0: 80000fa0 .word 0x80000fa0 + 80000fb4: 00000000 .word 0x00000000 + 80000fb8: 80009b27 .word 0x80009b27 + 80000fbc: 00000000 .word 0x00000000 + 80000fc0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6dad5ba6d87b9d4d + 80000fc4: 00053403 ld x8,0(x10) + 80000fc8: 00850513 addi x10,x10,8 + +0000000080000fcc : +Zknd_aes64im_cg_cmp_rd_rs1_b8: + aes64im x8, x8 # perform operation + 80000fcc: 30041413 aes64im x8,x8 + # Check if x8 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x8, Zknd_aes64im_cg_cmp_rd_rs1_b8, Zknd_aes64im_cg_cmp_rd_rs1_b8_str) + 80000fd0: 000bb683 ld x13,0(x23) + 80000fd4: 00868c63 beq x13,x8,80000fec + 80000fd8: 0290176f jal x14,80002800 + 80000fdc: 80000fcc .word 0x80000fcc + 80000fe0: 00000000 .word 0x00000000 + 80000fe4: 80009b60 .word 0x80009b60 + 80000fe8: 00000000 .word 0x00000000 + 80000fec: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfea7658e201aeba6 + 80000ff0: 00053483 ld x9,0(x10) + 80000ff4: 00850513 addi x10,x10,8 + +0000000080000ff8 : +Zknd_aes64im_cg_cmp_rd_rs1_b9: + aes64im x9, x9 # perform operation + 80000ff8: 30049493 aes64im x9,x9 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zknd_aes64im_cg_cmp_rd_rs1_b9, Zknd_aes64im_cg_cmp_rd_rs1_b9_str) + 80000ffc: 000bb683 ld x13,0(x23) + 80001000: 00968c63 beq x13,x9,80001018 + 80001004: 7fc0176f jal x14,80002800 + 80001008: 80000ff8 .word 0x80000ff8 + 8000100c: 00000000 .word 0x00000000 + 80001010: 80009b99 .word 0x80009b99 + 80001014: 00000000 .word 0x00000000 + 80001018: 008b8b93 addi x23,x23,8 + + mv x19, x10 # switch data pointer register to avoid conflict with test + 8000101c: 00050993 addi x19,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0x2a492e12b1d0ff43 + 80001020: 0009b503 ld x10,0(x19) + 80001024: 00898993 addi x19,x19,8 + +0000000080001028 : +Zknd_aes64im_cg_cmp_rd_rs1_b10: + aes64im x10, x10 # perform operation + 80001028: 30051513 aes64im x10,x10 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknd_aes64im_cg_cmp_rd_rs1_b10, Zknd_aes64im_cg_cmp_rd_rs1_b10_str) + 8000102c: 000bb683 ld x13,0(x23) + 80001030: 00a68c63 beq x13,x10,80001048 + 80001034: 7cc0176f jal x14,80002800 + 80001038: 80001028 .word 0x80001028 + 8000103c: 00000000 .word 0x00000000 + 80001040: 80009bd2 .word 0x80009bd2 + 80001044: 00000000 .word 0x00000000 + 80001048: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0x6a415bb02b2679e0 + 8000104c: 0009b583 ld x11,0(x19) + 80001050: 00898993 addi x19,x19,8 + +0000000080001054 : +Zknd_aes64im_cg_cmp_rd_rs1_b11: + aes64im x11, x11 # perform operation + 80001054: 30059593 aes64im x11,x11 + # Check if x11 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x11, Zknd_aes64im_cg_cmp_rd_rs1_b11, Zknd_aes64im_cg_cmp_rd_rs1_b11_str) + 80001058: 000bb683 ld x13,0(x23) + 8000105c: 00b68c63 beq x13,x11,80001074 + 80001060: 7a00176f jal x14,80002800 + 80001064: 80001054 .word 0x80001054 + 80001068: 00000000 .word 0x00000000 + 8000106c: 80009c0c .word 0x80009c0c + 80001070: 00000000 .word 0x00000000 + 80001074: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0xb26e1dd8e586fffa + 80001078: 0009b603 ld x12,0(x19) + 8000107c: 00898993 addi x19,x19,8 + +0000000080001080 : +Zknd_aes64im_cg_cmp_rd_rs1_b12: + aes64im x12, x12 # perform operation + 80001080: 30061613 aes64im x12,x12 + # Check if x12 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x12, Zknd_aes64im_cg_cmp_rd_rs1_b12, Zknd_aes64im_cg_cmp_rd_rs1_b12_str) + 80001084: 000bb683 ld x13,0(x23) + 80001088: 00c68c63 beq x13,x12,800010a0 + 8000108c: 7740176f jal x14,80002800 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 80009c46 .word 0x80009c46 + 8000109c: 00000000 .word 0x00000000 + 800010a0: 008b8b93 addi x23,x23,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800010a4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800010a8: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x125555723353c47f + 800010ac: 0009b683 ld x13,0(x19) + 800010b0: 00898993 addi x19,x19,8 + +00000000800010b4 : +Zknd_aes64im_cg_cmp_rd_rs1_b13: + aes64im x13, x13 # perform operation + 800010b4: 30069693 aes64im x13,x13 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zknd_aes64im_cg_cmp_rd_rs1_b13, Zknd_aes64im_cg_cmp_rd_rs1_b13_str) + 800010b8: 000bb203 ld x4,0(x23) + 800010bc: 00d20c63 beq x4,x13,800010d4 + 800010c0: 700012ef jal x5,800027c0 + 800010c4: 800010b4 .word 0x800010b4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 80009c80 .word 0x80009c80 + 800010d0: 00000000 .word 0x00000000 + 800010d4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0x169045a0f9524188 + 800010d8: 0009b703 ld x14,0(x19) + 800010dc: 00898993 addi x19,x19,8 + +00000000800010e0 : +Zknd_aes64im_cg_cmp_rd_rs1_b14: + aes64im x14, x14 # perform operation + 800010e0: 30071713 aes64im x14,x14 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zknd_aes64im_cg_cmp_rd_rs1_b14, Zknd_aes64im_cg_cmp_rd_rs1_b14_str) + 800010e4: 000bb203 ld x4,0(x23) + 800010e8: 00e20c63 beq x4,x14,80001100 + 800010ec: 6d4012ef jal x5,800027c0 + 800010f0: 800010e0 .word 0x800010e0 + 800010f4: 00000000 .word 0x00000000 + 800010f8: 80009cba .word 0x80009cba + 800010fc: 00000000 .word 0x00000000 + 80001100: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0xc3b7c8a54e0b8a03 + 80001104: 0009b783 ld x15,0(x19) + 80001108: 00898993 addi x19,x19,8 + +000000008000110c : +Zknd_aes64im_cg_cmp_rd_rs1_b15: + aes64im x15, x15 # perform operation + 8000110c: 30079793 aes64im x15,x15 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zknd_aes64im_cg_cmp_rd_rs1_b15, Zknd_aes64im_cg_cmp_rd_rs1_b15_str) + 80001110: 000bb203 ld x4,0(x23) + 80001114: 00f20c63 beq x4,x15,8000112c + 80001118: 6a8012ef jal x5,800027c0 + 8000111c: 8000110c .word 0x8000110c + 80001120: 00000000 .word 0x00000000 + 80001124: 80009cf4 .word 0x80009cf4 + 80001128: 00000000 .word 0x00000000 + 8000112c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x7fb5a9e3780e16ed + 80001130: 0009b803 ld x16,0(x19) + 80001134: 00898993 addi x19,x19,8 + +0000000080001138 : +Zknd_aes64im_cg_cmp_rd_rs1_b16: + aes64im x16, x16 # perform operation + 80001138: 30081813 aes64im x16,x16 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zknd_aes64im_cg_cmp_rd_rs1_b16, Zknd_aes64im_cg_cmp_rd_rs1_b16_str) + 8000113c: 000bb203 ld x4,0(x23) + 80001140: 01020c63 beq x4,x16,80001158 + 80001144: 67c012ef jal x5,800027c0 + 80001148: 80001138 .word 0x80001138 + 8000114c: 00000000 .word 0x00000000 + 80001150: 80009d2e .word 0x80009d2e + 80001154: 00000000 .word 0x00000000 + 80001158: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0xd1ff53690afce0ee + 8000115c: 0009b883 ld x17,0(x19) + 80001160: 00898993 addi x19,x19,8 + +0000000080001164 : +Zknd_aes64im_cg_cmp_rd_rs1_b17: + aes64im x17, x17 # perform operation + 80001164: 30089893 aes64im x17,x17 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zknd_aes64im_cg_cmp_rd_rs1_b17, Zknd_aes64im_cg_cmp_rd_rs1_b17_str) + 80001168: 000bb203 ld x4,0(x23) + 8000116c: 01120c63 beq x4,x17,80001184 + 80001170: 650012ef jal x5,800027c0 + 80001174: 80001164 .word 0x80001164 + 80001178: 00000000 .word 0x00000000 + 8000117c: 80009d68 .word 0x80009d68 + 80001180: 00000000 .word 0x00000000 + 80001184: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x531c36f83d0d7dfb + 80001188: 0009b903 ld x18,0(x19) + 8000118c: 00898993 addi x19,x19,8 + +0000000080001190 : +Zknd_aes64im_cg_cmp_rd_rs1_b18: + aes64im x18, x18 # perform operation + 80001190: 30091913 aes64im x18,x18 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zknd_aes64im_cg_cmp_rd_rs1_b18, Zknd_aes64im_cg_cmp_rd_rs1_b18_str) + 80001194: 000bb203 ld x4,0(x23) + 80001198: 01220c63 beq x4,x18,800011b0 + 8000119c: 624012ef jal x5,800027c0 + 800011a0: 80001190 .word 0x80001190 + 800011a4: 00000000 .word 0x00000000 + 800011a8: 80009da2 .word 0x80009da2 + 800011ac: 00000000 .word 0x00000000 + 800011b0: 008b8b93 addi x23,x23,8 + + mv x12, x19 # switch data pointer register to avoid conflict with test + 800011b4: 00098613 addi x12,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x05a0acb1c8537b52 + 800011b8: 00063983 ld x19,0(x12) + 800011bc: 00860613 addi x12,x12,8 + +00000000800011c0 : +Zknd_aes64im_cg_cmp_rd_rs1_b19: + aes64im x19, x19 # perform operation + 800011c0: 30099993 aes64im x19,x19 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknd_aes64im_cg_cmp_rd_rs1_b19, Zknd_aes64im_cg_cmp_rd_rs1_b19_str) + 800011c4: 000bb203 ld x4,0(x23) + 800011c8: 01320c63 beq x4,x19,800011e0 + 800011cc: 5f4012ef jal x5,800027c0 + 800011d0: 800011c0 .word 0x800011c0 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 80009ddc .word 0x80009ddc + 800011dc: 00000000 .word 0x00000000 + 800011e0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xbc6d8652b1dfe80a + 800011e4: 00063a03 ld x20,0(x12) + 800011e8: 00860613 addi x12,x12,8 + +00000000800011ec : +Zknd_aes64im_cg_cmp_rd_rs1_b20: + aes64im x20, x20 # perform operation + 800011ec: 300a1a13 aes64im x20,x20 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zknd_aes64im_cg_cmp_rd_rs1_b20, Zknd_aes64im_cg_cmp_rd_rs1_b20_str) + 800011f0: 000bb203 ld x4,0(x23) + 800011f4: 01420c63 beq x4,x20,8000120c + 800011f8: 5c8012ef jal x5,800027c0 + 800011fc: 800011ec .word 0x800011ec + 80001200: 00000000 .word 0x00000000 + 80001204: 80009e17 .word 0x80009e17 + 80001208: 00000000 .word 0x00000000 + 8000120c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xd91eae52b94309bd + 80001210: 00063a83 ld x21,0(x12) + 80001214: 00860613 addi x12,x12,8 + +0000000080001218 : +Zknd_aes64im_cg_cmp_rd_rs1_b21: + aes64im x21, x21 # perform operation + 80001218: 300a9a93 aes64im x21,x21 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zknd_aes64im_cg_cmp_rd_rs1_b21, Zknd_aes64im_cg_cmp_rd_rs1_b21_str) + 8000121c: 000bb203 ld x4,0(x23) + 80001220: 01520c63 beq x4,x21,80001238 + 80001224: 59c012ef jal x5,800027c0 + 80001228: 80001218 .word 0x80001218 + 8000122c: 00000000 .word 0x00000000 + 80001230: 80009e52 .word 0x80009e52 + 80001234: 00000000 .word 0x00000000 + 80001238: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x626a2ba3e877a594 + 8000123c: 00063b03 ld x22,0(x12) + 80001240: 00860613 addi x12,x12,8 + +0000000080001244 : +Zknd_aes64im_cg_cmp_rd_rs1_b22: + aes64im x22, x22 # perform operation + 80001244: 300b1b13 aes64im x22,x22 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zknd_aes64im_cg_cmp_rd_rs1_b22, Zknd_aes64im_cg_cmp_rd_rs1_b22_str) + 80001248: 000bb203 ld x4,0(x23) + 8000124c: 01620c63 beq x4,x22,80001264 + 80001250: 570012ef jal x5,800027c0 + 80001254: 80001244 .word 0x80001244 + 80001258: 00000000 .word 0x00000000 + 8000125c: 80009e8d .word 0x80009e8d + 80001260: 00000000 .word 0x00000000 + 80001264: 008b8b93 addi x23,x23,8 + + mv x15, x23 # switch signature pointer register to avoid conflict with test + 80001268: 000b8793 addi x15,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x230030890519d384 + 8000126c: 00063b83 ld x23,0(x12) + 80001270: 00860613 addi x12,x12,8 + +0000000080001274 : +Zknd_aes64im_cg_cmp_rd_rs1_b23: + aes64im x23, x23 # perform operation + 80001274: 300b9b93 aes64im x23,x23 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zknd_aes64im_cg_cmp_rd_rs1_b23, Zknd_aes64im_cg_cmp_rd_rs1_b23_str) + 80001278: 0007b203 ld x4,0(x15) + 8000127c: 01720c63 beq x4,x23,80001294 + 80001280: 540012ef jal x5,800027c0 + 80001284: 80001274 .word 0x80001274 + 80001288: 00000000 .word 0x00000000 + 8000128c: 80009ec8 .word 0x80009ec8 + 80001290: 00000000 .word 0x00000000 + 80001294: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xd7a6446591147d33 + 80001298: 00063c03 ld x24,0(x12) + 8000129c: 00860613 addi x12,x12,8 + +00000000800012a0 : +Zknd_aes64im_cg_cmp_rd_rs1_b24: + aes64im x24, x24 # perform operation + 800012a0: 300c1c13 aes64im x24,x24 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zknd_aes64im_cg_cmp_rd_rs1_b24, Zknd_aes64im_cg_cmp_rd_rs1_b24_str) + 800012a4: 0007b203 ld x4,0(x15) + 800012a8: 01820c63 beq x4,x24,800012c0 + 800012ac: 514012ef jal x5,800027c0 + 800012b0: 800012a0 .word 0x800012a0 + 800012b4: 00000000 .word 0x00000000 + 800012b8: 80009f03 .word 0x80009f03 + 800012bc: 00000000 .word 0x00000000 + 800012c0: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x127c049271da1d70 + 800012c4: 00063c83 ld x25,0(x12) + 800012c8: 00860613 addi x12,x12,8 + +00000000800012cc : +Zknd_aes64im_cg_cmp_rd_rs1_b25: + aes64im x25, x25 # perform operation + 800012cc: 300c9c93 aes64im x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zknd_aes64im_cg_cmp_rd_rs1_b25, Zknd_aes64im_cg_cmp_rd_rs1_b25_str) + 800012d0: 0007b203 ld x4,0(x15) + 800012d4: 01920c63 beq x4,x25,800012ec + 800012d8: 4e8012ef jal x5,800027c0 + 800012dc: 800012cc .word 0x800012cc + 800012e0: 00000000 .word 0x00000000 + 800012e4: 80009f3e .word 0x80009f3e + 800012e8: 00000000 .word 0x00000000 + 800012ec: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x032590cce5d1349d + 800012f0: 00063d03 ld x26,0(x12) + 800012f4: 00860613 addi x12,x12,8 + +00000000800012f8 : +Zknd_aes64im_cg_cmp_rd_rs1_b26: + aes64im x26, x26 # perform operation + 800012f8: 300d1d13 aes64im x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zknd_aes64im_cg_cmp_rd_rs1_b26, Zknd_aes64im_cg_cmp_rd_rs1_b26_str) + 800012fc: 0007b203 ld x4,0(x15) + 80001300: 01a20c63 beq x4,x26,80001318 + 80001304: 4bc012ef jal x5,800027c0 + 80001308: 800012f8 .word 0x800012f8 + 8000130c: 00000000 .word 0x00000000 + 80001310: 80009f79 .word 0x80009f79 + 80001314: 00000000 .word 0x00000000 + 80001318: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xe3c622b867bf528a + 8000131c: 00063d83 ld x27,0(x12) + 80001320: 00860613 addi x12,x12,8 + +0000000080001324 : +Zknd_aes64im_cg_cmp_rd_rs1_b27: + aes64im x27, x27 # perform operation + 80001324: 300d9d93 aes64im x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zknd_aes64im_cg_cmp_rd_rs1_b27, Zknd_aes64im_cg_cmp_rd_rs1_b27_str) + 80001328: 0007b203 ld x4,0(x15) + 8000132c: 01b20c63 beq x4,x27,80001344 + 80001330: 490012ef jal x5,800027c0 + 80001334: 80001324 .word 0x80001324 + 80001338: 00000000 .word 0x00000000 + 8000133c: 80009fb4 .word 0x80009fb4 + 80001340: 00000000 .word 0x00000000 + 80001344: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x2f5cead4b660a9cd + 80001348: 00063e03 ld x28,0(x12) + 8000134c: 00860613 addi x12,x12,8 + +0000000080001350 : +Zknd_aes64im_cg_cmp_rd_rs1_b28: + aes64im x28, x28 # perform operation + 80001350: 300e1e13 aes64im x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zknd_aes64im_cg_cmp_rd_rs1_b28, Zknd_aes64im_cg_cmp_rd_rs1_b28_str) + 80001354: 0007b203 ld x4,0(x15) + 80001358: 01c20c63 beq x4,x28,80001370 + 8000135c: 464012ef jal x5,800027c0 + 80001360: 80001350 .word 0x80001350 + 80001364: 00000000 .word 0x00000000 + 80001368: 80009fef .word 0x80009fef + 8000136c: 00000000 .word 0x00000000 + 80001370: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x873ef25444505adf + 80001374: 00063e83 ld x29,0(x12) + 80001378: 00860613 addi x12,x12,8 + +000000008000137c : +Zknd_aes64im_cg_cmp_rd_rs1_b29: + aes64im x29, x29 # perform operation + 8000137c: 300e9e93 aes64im x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zknd_aes64im_cg_cmp_rd_rs1_b29, Zknd_aes64im_cg_cmp_rd_rs1_b29_str) + 80001380: 0007b203 ld x4,0(x15) + 80001384: 01d20c63 beq x4,x29,8000139c + 80001388: 438012ef jal x5,800027c0 + 8000138c: 8000137c .word 0x8000137c + 80001390: 00000000 .word 0x00000000 + 80001394: 8000a02a .word 0x8000a02a + 80001398: 00000000 .word 0x00000000 + 8000139c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x29a422bd58337d7d + 800013a0: 00063f03 ld x30,0(x12) + 800013a4: 00860613 addi x12,x12,8 + +00000000800013a8 : +Zknd_aes64im_cg_cmp_rd_rs1_b30: + aes64im x30, x30 # perform operation + 800013a8: 300f1f13 aes64im x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zknd_aes64im_cg_cmp_rd_rs1_b30, Zknd_aes64im_cg_cmp_rd_rs1_b30_str) + 800013ac: 0007b203 ld x4,0(x15) + 800013b0: 01e20c63 beq x4,x30,800013c8 + 800013b4: 40c012ef jal x5,800027c0 + 800013b8: 800013a8 .word 0x800013a8 + 800013bc: 00000000 .word 0x00000000 + 800013c0: 8000a065 .word 0x8000a065 + 800013c4: 00000000 .word 0x00000000 + 800013c8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x9919ac62b0966f5c + 800013cc: 00063f83 ld x31,0(x12) + 800013d0: 00860613 addi x12,x12,8 + +00000000800013d4 : +Zknd_aes64im_cg_cmp_rd_rs1_b31: + aes64im x31, x31 # perform operation + 800013d4: 300f9f93 aes64im x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zknd_aes64im_cg_cmp_rd_rs1_b31, Zknd_aes64im_cg_cmp_rd_rs1_b31_str) + 800013d8: 0007b203 ld x4,0(x15) + 800013dc: 01f20c63 beq x4,x31,800013f4 + 800013e0: 3e0012ef jal x5,800027c0 + 800013e4: 800013d4 .word 0x800013d4 + 800013e8: 00000000 .word 0x00000000 + 800013ec: 8000a0a0 .word 0x8000a0a0 + 800013f0: 00000000 .word 0x00000000 + 800013f4: 00878793 addi x15,x15,8 + + mv x2, x15 # restore signature pointer to default register for teardown + 800013f8: 00078113 addi x2,x15,0 + +00000000800013fc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013fc: 00000513 addi x10,x0,0 + 80001400: 00000073 ecall + 80001404: fff00513 addi x10,x0,-1 + 80001408: 25800413 addi x8,x0,600 + +000000008000140c : + 8000140c: 34002373 csrrs x6,mscratch,x0 + +0000000080001410 : + 80001410: 2b833383 ld x7,696(x6) + +0000000080001414 : + 80001414: 2a033383 ld x7,672(x6) + +0000000080001418 : + 80001418: 2d033483 ld x9,720(x6) + 8000141c: 34049073 csrrw x0,mscratch,x9 + +0000000080001420 : + 80001420: 2c833483 ld x9,712(x6) + 80001424: 305493f3 csrrw x7,mtvec,x9 + 80001428: ffc4f493 andi x9,x9,-4 + 8000142c: ffc3f393 andi x7,x7,-4 + 80001430: 00749e63 bne x9,x7,8000144c + +0000000080001434 : + 80001434: 00030493 addi x9,x6,0 + +0000000080001438 : + 80001438: 0004a783 lw x15,0(x9) + 8000143c: 00f3a023 sw x15,0(x7) + 80001440: 00438393 addi x7,x7,4 + 80001444: 00448493 addi x9,x9,4 + 80001448: fe83c8e3 blt x7,x8,80001438 + 8000144c: 0000100f fence.i + +0000000080001450 : + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 00000497 auipc x9,0x0 + 80001464: 2b048493 addi x9,x9,688 # 80001710 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 10e49863 bne x9,x14,80001590 + 80001484: 00000013 addi x0,x0,0 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00009517 auipc x10,0x9 + 800014a4: 36150513 addi x10,x10,865 # 8000a801 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00029097 auipc x1,0x29 + 800014c4: 0e4080e7 jalr x1,228(x1) # 8002a5a4 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00009517 auipc x10,0x9 + 800014e4: 35d50513 addi x10,x10,861 # 8000a83d + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00029097 auipc x1,0x29 + 80001504: 0a4080e7 jalr x1,164(x1) # 8002a5a4 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00009517 auipc x10,0x9 + 80001524: 37d50513 addi x10,x10,893 # 8000a89d + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 00029097 auipc x1,0x29 + 80001544: 064080e7 jalr x1,100(x1) # 8002a5a4 + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 0000a517 auipc x10,0xa + 80001564: ee850513 addi x10,x10,-280 # 8000b448 + 80001568: 00000013 addi x0,x0,0 + 8000156c: 00000013 addi x0,x0,0 + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00029097 auipc x1,0x29 + 80001584: 024080e7 jalr x1,36(x1) # 8002a5a4 + 80001588: 00029097 auipc x1,0x29 + 8000158c: 07c080e7 jalr x1,124(x1) # 8002a604 + +0000000080001590 : + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00007317 auipc x6,0x7 + 800015a4: e0830313 addi x6,x6,-504 # 800083a8 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 00033303 ld x6,0(x6) + 800015c4: 00000013 addi x0,x0,0 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 0000b397 auipc x7,0xb + 800015e4: ce038393 addi x7,x7,-800 # 8000c2c0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 40730333 sub x6,x6,x7 + 80001604: 00000013 addi x0,x0,0 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 0000b417 auipc x8,0xb + 80001624: c9040413 addi x8,x8,-880 # 8000c2b0 + 80001628: 00000013 addi x0,x0,0 + 8000162c: 00000013 addi x0,x0,0 + 80001630: 00000013 addi x0,x0,0 + 80001634: 00000013 addi x0,x0,0 + 80001638: 00000013 addi x0,x0,0 + 8000163c: 00000013 addi x0,x0,0 + 80001640: 00043203 ld x4,0(x8) + 80001644: 00620c63 beq x4,x6,8000165c + 80001648: 1e0013ef jal x7,80002828 + 8000164c: 80001590 .word 0x80001590 + 80001650: 00000000 .word 0x00000000 + 80001654: 8000a9f1 .word 0x8000a9f1 + 80001658: 00000000 .word 0x00000000 + +000000008000165c : + 8000165c: 000004b7 lui x9,0x0 + 80001660: 00048493 addi x9,x9,0 # 0 + 80001664: 00b49493 slli x9,x9,0xb + 80001668: 5d648493 addi x9,x9,1494 + 8000166c: 00b49493 slli x9,x9,0xb + 80001670: 43748493 addi x9,x9,1079 + 80001674: 00a49493 slli x9,x9,0xa + 80001678: 2ad48493 addi x9,x9,685 + 8000167c: 00e49e63 bne x9,x14,80001698 + 80001680: 1a8013ef jal x7,80002828 + 80001684: 80001744 .word 0x80001744 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000a85f .word 0x8000a85f + 80001690: 00000000 .word 0x00000000 + 80001694: 00000341 .word 0x00000341 + +0000000080001698 : + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00009517 auipc x10,0x9 + 800016a4: 12450513 addi x10,x10,292 # 8000a7c4 + 800016a8: 00000013 addi x0,x0,0 + 800016ac: 00000013 addi x0,x0,0 + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00029097 auipc x1,0x29 + 800016c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800016c8: 00029097 auipc x1,0x29 + 800016cc: f1c080e7 jalr x1,-228(x1) # 8002a5e4 + +00000000800016d0 : + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00009517 auipc x10,0x9 + 800016e4: 12150513 addi x10,x10,289 # 8000a801 + 800016e8: 00000013 addi x0,x0,0 + 800016ec: 00000013 addi x0,x0,0 + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00029097 auipc x1,0x29 + 80001704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80001708: 00029097 auipc x1,0x29 + 8000170c: efc080e7 jalr x1,-260(x1) # 8002a604 + +0000000080001710 : + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: 00000717 auipc x14,0x0 + 80001724: ff070713 addi x14,x14,-16 # 80001710 + 80001728: 00000013 addi x0,x0,0 + 8000172c: 00000013 addi x0,x0,0 + 80001730: 00000013 addi x0,x0,0 + 80001734: 00000013 addi x0,x0,0 + 80001738: 00000013 addi x0,x0,0 + 8000173c: 00000013 addi x0,x0,0 + 80001740: cbdff06f jal x0,800013fc + +0000000080001744 : + 80001744: 00000737 lui x14,0x0 + 80001748: 00070713 addi x14,x14,0 # 0 + 8000174c: 00b71713 slli x14,x14,0xb + 80001750: 5d670713 addi x14,x14,1494 + 80001754: 00b71713 slli x14,x14,0xb + 80001758: 43770713 addi x14,x14,1079 + 8000175c: 00a71713 slli x14,x14,0xa + 80001760: 2ad70713 addi x14,x14,685 + 80001764: c99ff06f jal x0,800013fc + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: ab030313 addi x6,x6,-1360 # 80001450 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 2df50513 addi x10,x10,735 # 8000be7f + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 66850513 addi x10,x10,1640 # 8000a248 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: ce650513 addi x10,x10,-794 # 8000a906 + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: ba150513 addi x10,x10,-1119 # 8000a801 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 1c848493 addi x9,x9,456 # 8000a228 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00027417 auipc x8,0x27 + 800020a4: 6e840413 addi x8,x8,1768 # 80029788 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e4946663 bltu x8,x9,80001710 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000aa08 .word 0x8000aa08 + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ab0a .word 0x8000ab0a + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d2f47a63 bgeu x8,x15,80001744 + 80002214: d2746863 bltu x8,x7,80001744 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ac05 .word 0x8000ac05 + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000acf8 .word 0x8000acf8 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000ae6b .word 0x8000ae6b + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bfcff06f jal x0,80001744 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: 92020213 addi x4,x4,-1760 # 8000a0e0 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: 90838393 addi x7,x7,-1784 # 8000a0e0 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: 8e068693 addi x13,x13,-1824 # 8000a0e0 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: 8b848493 addi x9,x9,-1864 # 8000a0e0 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 8144a483 lw x9,-2028(x9) # 8000a0e0 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 55040413 addi x8,x8,1360 # 8000bed0 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: dd040413 addi x8,x8,-560 # 80029790 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 80848493 addi x9,x9,-2040 # 8000a208 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00007497 auipc x9,0x7 + 80002a44: 7c848493 addi x9,x9,1992 # 8000a208 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00007817 auipc x16,0x7 + 80002a80: 79c80813 addi x16,x16,1948 # 8000a218 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00007817 auipc x16,0x7 + 80002aa0: 77c80813 addi x16,x16,1916 # 8000a218 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: f4938393 addi x7,x7,-183 # 8000a9f1 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00007817 auipc x16,0x7 + 80002abc: 75880813 addi x16,x16,1880 # 8000a210 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: f4438393 addi x7,x7,-188 # 8000aa08 + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 02e38393 addi x7,x7,46 # 8000ab0a + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 11138393 addi x7,x7,273 # 8000ac05 + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 1ec38393 addi x7,x7,492 # 8000acf8 + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 34738393 addi x7,x7,839 # 8000ae6b + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 2b338393 addi x7,x7,691 # 8000adef + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 2d938393 addi x7,x7,729 # 8000ae2d + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: edc38393 addi x7,x7,-292 # 8000aa48 + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: fc438393 addi x7,x7,-60 # 8000ab48 + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 0a538393 addi x7,x7,165 # 8000ac41 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 18138393 addi x7,x7,385 # 8000ad35 + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 2da38393 addi x7,x7,730 # 8000aea6 + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ea438393 addi x7,x7,-348 # 8000aa88 + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: f8a38393 addi x7,x7,-118 # 8000ab86 + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 06938393 addi x7,x7,105 # 8000ac7d + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 14638393 addi x7,x7,326 # 8000ad72 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 29d38393 addi x7,x7,669 # 8000aee1 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: e6d38393 addi x7,x7,-403 # 8000aac9 + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: f5138393 addi x7,x7,-175 # 8000abc5 + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 02e38393 addi x7,x7,46 # 8000acba + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 10c38393 addi x7,x7,268 # 8000adb0 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 26138393 addi x7,x7,609 # 8000af1d + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 28638393 addi x7,x7,646 # 8000af5a + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 2bd38393 addi x7,x7,701 # 8000afa9 + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 3a038393 addi x7,x7,928 # 8000b0a4 + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 48438393 addi x7,x7,1156 # 8000b1a0 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 4d480813 addi x16,x16,1236 # 8000a210 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 4c480813 addi x16,x16,1220 # 8000a210 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 4bc80813 addi x16,x16,1212 # 8000a214 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 4a880813 addi x16,x16,1192 # 8000a210 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: a4150513 addi x10,x10,-1471 # 8000a801 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: a3d50513 addi x10,x10,-1475 # 8000a83d + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: ab450513 addi x10,x10,-1356 # 8000a8f4 + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 39853503 ld x10,920(x10) # 8000a200 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: a8650513 addi x10,x10,-1402 # 8000a906 + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 23852503 lw x10,568(x10) # 8000a0e0 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: a4850513 addi x10,x10,-1464 # 8000a908 + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 2f852503 lw x10,760(x10) # 8000a1e0 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 32850513 addi x10,x10,808 # 8000a248 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: 9bc50513 addi x10,x10,-1604 # 8000a91c + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 26053503 ld x10,608(x10) # 8000a1e8 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 2a850513 addi x10,x10,680 # 8000a248 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 37350513 addi x10,x10,883 # 8000b353 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 0d852503 lw x10,216(x10) # 8000a0e0 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 22860613 addi x12,x12,552 # 8000a248 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 19c52503 lw x10,412(x10) # 8000a1e4 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 3e950513 addi x10,x10,1001 # 8000b469 + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 18860613 addi x12,x12,392 # 8000a248 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 0fc52503 lw x10,252(x10) # 8000a1e4 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 14860613 addi x12,x12,328 # 8000a248 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 0bc52503 lw x10,188(x10) # 8000a1e4 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 20c50513 addi x10,x10,524 # 8000b34c + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 0c850513 addi x10,x10,200 # 8000a248 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 1a450513 addi x10,x10,420 # 8000b364 + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: ef852503 lw x10,-264(x10) # 8000a0e0 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: ff853503 ld x10,-8(x10) # 8000a1f0 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: fe453503 ld x10,-28(x10) # 8000a1f0 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 02850513 addi x10,x10,40 # 8000a248 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: fc052503 lw x10,-64(x10) # 8000a208 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 11b50513 addi x10,x10,283 # 8000b37b + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: e5852503 lw x10,-424(x10) # 8000a0e0 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: f6053503 ld x10,-160(x10) # 8000a1f8 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: f4c53503 ld x10,-180(x10) # 8000a1f8 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: f8850513 addi x10,x10,-120 # 8000a248 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 09250513 addi x10,x10,146 # 8000b392 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: ed053503 ld x10,-304(x10) # 8000a1f8 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: f0850513 addi x10,x10,-248 # 8000a248 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 07050513 addi x10,x10,112 # 8000b3f0 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: e5053503 ld x10,-432(x10) # 8000a1f8 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: e8850513 addi x10,x10,-376 # 8000a248 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: e2442403 lw x8,-476(x8) # 8000a210 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 09550513 addi x10,x10,149 # 8000b495 + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 08150513 addi x10,x10,129 # 8000b4c1 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: db080813 addi x16,x16,-592 # 8000a218 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 48650513 addi x10,x10,1158 # 8000a906 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 01150513 addi x10,x10,17 # 8000b4d1 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: d1053503 ld x10,-752(x10) # 8000a1f8 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: d4850513 addi x10,x10,-696 # 8000a248 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: fbc50513 addi x10,x10,-68 # 8000b4fc + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: c8853503 ld x10,-888(x10) # 8000a1f0 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: cc850513 addi x10,x10,-824 # 8000a248 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: c4833303 ld x6,-952(x6) # 8000a1f0 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: c483b383 ld x7,-952(x7) # 8000a1f8 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: f6b50513 addi x10,x10,-149 # 8000b52b + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: f9350513 addi x10,x10,-109 # 8000b593 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: bc833303 ld x6,-1080(x6) # 8000a1f0 + 80003630: 00007397 auipc x7,0x7 + 80003634: bc83b383 ld x7,-1080(x7) # 8000a1f8 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: be850513 addi x10,x10,-1048 # 8000a248 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: f1a50513 addi x10,x10,-230 # 8000b5ba + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: e7750513 addi x10,x10,-393 # 8000b557 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: e7350513 addi x10,x10,-397 # 8000b593 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: ab033303 ld x6,-1360(x6) # 8000a1f8 + 80003750: 00007397 auipc x7,0x7 + 80003754: aa03b383 ld x7,-1376(x7) # 8000a1f0 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: ac850513 addi x10,x10,-1336 # 8000a248 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: ee250513 addi x10,x10,-286 # 8000b6a2 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: f8950513 addi x10,x10,-119 # 8000b789 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: 9ec52503 lw x10,-1556(x10) # 8000a214 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: f6550513 addi x10,x10,-155 # 8000b7c5 + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: f0350513 addi x10,x10,-253 # 8000b7a3 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: ecb50513 addi x10,x10,-309 # 8000b7ab + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: e9350513 addi x10,x10,-365 # 8000b7b3 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: e5c50513 addi x10,x10,-420 # 8000b7bc + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: e2e50513 addi x10,x10,-466 # 8000b7ce + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 84852503 lw x10,-1976(x10) # 8000a210 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: f0550513 addi x10,x10,-251 # 8000b925 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: d8850513 addi x10,x10,-632 # 8000b7e8 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: d7950513 addi x10,x10,-647 # 8000b819 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: d5950513 addi x10,x10,-679 # 8000b839 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: d3750513 addi x10,x10,-713 # 8000b857 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: d1650513 addi x10,x10,-746 # 8000b876 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: cfe50513 addi x10,x10,-770 # 8000b89e + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: cea50513 addi x10,x10,-790 # 8000b8ca + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: cd650513 addi x10,x10,-810 # 8000b8f6 + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: cd450513 addi x10,x10,-812 # 8000b934 + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 57053503 ld x10,1392(x10) # 8000a1f8 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 5a850513 addi x10,x10,1448 # 8000a248 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: c6b50513 addi x10,x10,-917 # 8000b94b + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 4e853503 ld x10,1256(x10) # 8000a1f0 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 52850513 addi x10,x10,1320 # 8000a248 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 4c852503 lw x10,1224(x10) # 8000a210 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: c0250513 addi x10,x10,-1022 # 8000b962 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 47053503 ld x10,1136(x10) # 8000a1f8 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: bd950513 addi x10,x10,-1063 # 8000b979 + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 42853503 ld x10,1064(x10) # 8000a1f0 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 42c52503 lw x10,1068(x10) # 8000a210 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: bef50513 addi x10,x10,-1041 # 8000b9ef + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: c8550513 addi x10,x10,-891 # 8000bac5 + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: d3850513 addi x10,x10,-712 # 8000bbb8 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: df350513 addi x10,x10,-525 # 8000bcb3 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: e9a50513 addi x10,x10,-358 # 8000bd9a + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: a6750513 addi x10,x10,-1433 # 8000b9a7 + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 2c063603 ld x12,704(x12) # 8000a228 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: a1050513 addi x10,x10,-1520 # 8000a990 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 26850513 addi x10,x10,616 # 8000a248 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 25058593 addi x11,x11,592 # 8000a270 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 2e058593 addi x11,x11,736 # 8000a330 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00006517 auipc x10,0x6 + 80004084: 72e50513 addi x10,x10,1838 # 8000a7ae + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 38850513 addi x10,x10,904 # 8000b448 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 13060613 addi x12,x12,304 # 8000a220 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: 8b150513 addi x10,x10,-1871 # 8000a9b1 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 10053503 ld x10,256(x10) # 8000a228 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 10850513 addi x10,x10,264 # 8000a248 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 84150513 addi x10,x10,-1983 # 8000a9c1 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 08853503 ld x10,136(x10) # 8000a230 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 08850513 addi x10,x10,136 # 8000a248 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00006517 auipc x10,0x6 + 80004204: 7d150513 addi x10,x10,2001 # 8000a9d1 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 01053503 ld x10,16(x10) # 8000a238 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 00850513 addi x10,x10,8 # 8000a248 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00006517 auipc x10,0x6 + 80004284: 76150513 addi x10,x10,1889 # 8000a9e1 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: f9853503 ld x10,-104(x10) # 8000a240 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: f8850513 addi x10,x10,-120 # 8000a248 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: f3860613 addi x12,x12,-200 # 8000a220 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: f4860613 addi x12,x12,-184 # 8000a248 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 36430313 addi x6,x6,868 # 800013fc + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 34c30313 addi x6,x6,844 # 800013fc + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 33430313 addi x6,x6,820 # 800013fc + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1cc78793 addi x15,x15,460 # 8000140c + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: 9f010113 addi x2,x2,-1552 # 8000bed0 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b471 .word 0x8000b471 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 21828293 addi x5,x5,536 # 80029800 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 1f828293 addi x5,x5,504 # 80029800 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknd-aes64ks1i-00.elf.objdump b/riscv-tests/rv64-Zknd-aes64ks1i-00.elf.objdump new file mode 100644 index 0000000..81a19eb --- /dev/null +++ b/riscv-tests/rv64-Zknd-aes64ks1i-00.elf.objdump @@ -0,0 +1,6914 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ks1i-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ks1i-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000004580 memsz 0x0000000000004580 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004540 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00021b90 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029c00 0000000080029c00 00027c00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000009a4 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007f 0000000000000000 0000000000000000 0002905f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 000290de 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029101 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029120 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008d 0000000000000000 0000000000000000 00029160 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 000291ed 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029c00 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cc3KNUEg.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b0 +0000000080002980 l .text.rvtest 0000000000000000 failedtest_x5_x4 +0000000080008848 l .data 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b1 +000000008000887e l .data 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b2 +00000000800088b4 l .data 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknd_aes64ks1i_cg_cp_rs1_b3 +00000000800088ea l .data 0000000000000000 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+000000008000ad11 l .data 0000000000000000 xepcstr +000000008000b3af l .data 0000000000000000 Mclr_Vext_int_str +000000008000b409 l .data 0000000000000000 Sclr_Mext_int_str +000000008000b4aa l .data 0000000000000000 Sclr_Vext_int_str +000000008000b504 l .data 0000000000000000 Hclr_Mext_int_str +000000008000b5a7 l .data 0000000000000000 Hclr_Vext_int_str +000000008000b602 l .data 0000000000000000 Vclr_Mext_int_str +000000008000b652 l .data 0000000000000000 Vclr_Sext_int_str +000000008000b6a5 l .data 0000000000000000 Vclr_Vext_int_str +000000008000bd44 l .data 0000000000000000 trap_diag_curr_xepc_str +0000000080029b90 g .data 0000000000000000 end_signature +000000008002a5c0 g .text.rvmodel 0000000000000000 rvmodel_io_write_str_c +0000000080029b90 g .data 0000000000000000 rvtest_sig_end +0000000080001b98 g .text.rvtest 0000000000000000 common_Mentry +0000000080001620 g .text.rvtest 0000000000000000 rvtest_Mend +0000000080000000 g .text.init 0000000000000000 rvtest_entry_point +000000008000c280 g .data 0000000000000000 begin_signature +0000000080008108 g .data 0000000000000000 rvtest_trap_count +00000000800015cc g .text.rvtest 0000000000000000 rvtest_code_end +0000000080000040 g .text.rvtest 0000000000000000 rvtest_code_begin +000000008000c280 g .data 0000000000000000 rvtest_sig_begin +0000000080008470 g .data 0000000000000000 rvtest_data_begin +0000000080008110 g .data 0000000000000000 Mtramptbl_sv +000000008000c277 g .data 0000000000000000 rvtest_data_end +00000000800015cc g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029d00 g .tohost 0000000000000000 fromhost +0000000080029c00 g .tohost 0000000000000000 tohost +0000000080001890 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001940 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x9df395680207646b + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknd_aes64ks1i_cg_cp_rs1_b0: + aes64ks1i x31, x0, 7 # perform operation + 80000048: 31701f93 aes64ks1i x31,x0,0x7 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknd_aes64ks1i_cg_cp_rs1_b0, Zknd_aes64ks1i_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01f20c63 beq x4,x31,80000068 + 80000054: 12d022ef jal x5,80002980 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 80008848 .word 0x80008848 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xae82e45eef8e9064 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknd_aes64ks1i_cg_cp_rs1_b1: + aes64ks1i x31, x1, 10 # perform operation + 80000074: 31a09f93 aes64ks1i x31,x1,0xa + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknd_aes64ks1i_cg_cp_rs1_b1, Zknd_aes64ks1i_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01f20c63 beq x4,x31,80000094 + 80000080: 101022ef jal x5,80002980 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 8000887e .word 0x8000887e + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x19, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010993 addi x19,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3633cd6d589c3131 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknd_aes64ks1i_cg_cp_rs1_b2: + aes64ks1i x18, x2, 10 # perform operation + 800000a4: 31a11913 aes64ks1i x18,x2,0xa + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknd_aes64ks1i_cg_cp_rs1_b2, Zknd_aes64ks1i_cg_cp_rs1_b2_str) + 800000a8: 0009b203 ld x4,0(x19) + 800000ac: 01220c63 beq x4,x18,800000c4 + 800000b0: 0d1022ef jal x5,80002980 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 800088b4 .word 0x800088b4 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00898993 addi x19,x19,8 + + mv x11, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x81b27b8a0e847728 + 800000cc: 0005b183 ld x3,0(x11) + 800000d0: 00858593 addi x11,x11,8 + +00000000800000d4 : +Zknd_aes64ks1i_cg_cp_rs1_b3: + aes64ks1i x31, x3, 1 # perform operation + 800000d4: 31119f93 aes64ks1i x31,x3,0x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zknd_aes64ks1i_cg_cp_rs1_b3, Zknd_aes64ks1i_cg_cp_rs1_b3_str) + 800000d8: 0009b203 ld x4,0(x19) + 800000dc: 01f20c63 beq x4,x31,800000f4 + 800000e0: 0a1022ef jal x5,80002980 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 800088ea .word 0x800088ea + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00898993 addi x19,x19,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x076243cbc0c1eab4 + 80000100: 0005b203 ld x4,0(x11) + 80000104: 00858593 addi x11,x11,8 + +0000000080000108 : +Zknd_aes64ks1i_cg_cp_rs1_b4: + aes64ks1i x24, x4, 10 # perform operation + 80000108: 31a21c13 aes64ks1i x24,x4,0xa + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zknd_aes64ks1i_cg_cp_rs1_b4, Zknd_aes64ks1i_cg_cp_rs1_b4_str) + 8000010c: 0009b383 ld x7,0(x19) + 80000110: 01838c63 beq x7,x24,80000128 + 80000114: 0850246f jal x8,80002998 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 80008920 .word 0x80008920 + 80000124: 00000000 .word 0x00000000 + 80000128: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x328d359ca41ebe3e + 8000012c: 0005b283 ld x5,0(x11) + 80000130: 00858593 addi x11,x11,8 + +0000000080000134 : +Zknd_aes64ks1i_cg_cp_rs1_b5: + aes64ks1i x31, x5, 3 # perform operation + 80000134: 31329f93 aes64ks1i x31,x5,0x3 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zknd_aes64ks1i_cg_cp_rs1_b5, Zknd_aes64ks1i_cg_cp_rs1_b5_str) + 80000138: 0009b383 ld x7,0(x19) + 8000013c: 01f38c63 beq x7,x31,80000154 + 80000140: 0590246f jal x8,80002998 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008956 .word 0x80008956 + 80000150: 00000000 .word 0x00000000 + 80000154: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x5c2d122b476452b8 + 80000158: 0005b303 ld x6,0(x11) + 8000015c: 00858593 addi x11,x11,8 + +0000000080000160 : +Zknd_aes64ks1i_cg_cp_rs1_b6: + aes64ks1i x25, x6, 4 # perform operation + 80000160: 31431c93 aes64ks1i x25,x6,0x4 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zknd_aes64ks1i_cg_cp_rs1_b6, Zknd_aes64ks1i_cg_cp_rs1_b6_str) + 80000164: 0009b383 ld x7,0(x19) + 80000168: 01938c63 beq x7,x25,80000180 + 8000016c: 02d0246f jal x8,80002998 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000898c .word 0x8000898c + 8000017c: 00000000 .word 0x00000000 + 80000180: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x9f6a6a0963681697 + 8000018c: 0005b383 ld x7,0(x11) + 80000190: 00858593 addi x11,x11,8 + +0000000080000194 : +Zknd_aes64ks1i_cg_cp_rs1_b7: + aes64ks1i x12, x7, 1 # perform operation + 80000194: 31139613 aes64ks1i x12,x7,0x1 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zknd_aes64ks1i_cg_cp_rs1_b7, Zknd_aes64ks1i_cg_cp_rs1_b7_str) + 80000198: 0009b683 ld x13,0(x19) + 8000019c: 00c68c63 beq x13,x12,800001b4 + 800001a0: 0210276f jal x14,800029c0 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 800089c2 .word 0x800089c2 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x1777a164ccf517b4 + 800001b8: 0005b403 ld x8,0(x11) + 800001bc: 00858593 addi x11,x11,8 + +00000000800001c0 : +Zknd_aes64ks1i_cg_cp_rs1_b8: + aes64ks1i x21, x8, 4 # perform operation + 800001c0: 31441a93 aes64ks1i x21,x8,0x4 + # Check if x21 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x21, Zknd_aes64ks1i_cg_cp_rs1_b8, Zknd_aes64ks1i_cg_cp_rs1_b8_str) + 800001c4: 0009b683 ld x13,0(x19) + 800001c8: 01568c63 beq x13,x21,800001e0 + 800001cc: 7f40276f jal x14,800029c0 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 800089f8 .word 0x800089f8 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x39fd0bba2d6074e3 + 800001e4: 0005b483 ld x9,0(x11) + 800001e8: 00858593 addi x11,x11,8 + +00000000800001ec : +Zknd_aes64ks1i_cg_cp_rs1_b9: + aes64ks1i x3, x9, 10 # perform operation + 800001ec: 31a49193 aes64ks1i x3,x9,0xa + # Check if x3 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x3, Zknd_aes64ks1i_cg_cp_rs1_b9, Zknd_aes64ks1i_cg_cp_rs1_b9_str) + 800001f0: 0009b683 ld x13,0(x19) + 800001f4: 00368c63 beq x13,x3,8000020c + 800001f8: 7c80276f jal x14,800029c0 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 80008a2e .word 0x80008a2e + 80000208: 00000000 .word 0x00000000 + 8000020c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xb67eb7dbc716766f + 80000210: 0005b503 ld x10,0(x11) + 80000214: 00858593 addi x11,x11,8 + +0000000080000218 : +Zknd_aes64ks1i_cg_cp_rs1_b10: + aes64ks1i x25, x10, 4 # perform operation + 80000218: 31451c93 aes64ks1i x25,x10,0x4 + # Check if x25 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x25, Zknd_aes64ks1i_cg_cp_rs1_b10, Zknd_aes64ks1i_cg_cp_rs1_b10_str) + 8000021c: 0009b683 ld x13,0(x19) + 80000220: 01968c63 beq x13,x25,80000238 + 80000224: 79c0276f jal x14,800029c0 + 80000228: 80000218 .word 0x80000218 + 8000022c: 00000000 .word 0x00000000 + 80000230: 80008a65 .word 0x80008a65 + 80000234: 00000000 .word 0x00000000 + 80000238: 00898993 addi x19,x19,8 + + mv x2, x11 # switch data pointer register to avoid conflict with test + 8000023c: 00058113 addi x2,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0f85bdece65b34c6 + 80000240: 00013583 ld x11,0(x2) + 80000244: 00810113 addi x2,x2,8 + +0000000080000248 : +Zknd_aes64ks1i_cg_cp_rs1_b11: + aes64ks1i x16, x11, 3 # perform operation + 80000248: 31359813 aes64ks1i x16,x11,0x3 + # Check if x16 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x16, Zknd_aes64ks1i_cg_cp_rs1_b11, Zknd_aes64ks1i_cg_cp_rs1_b11_str) + 8000024c: 0009b683 ld x13,0(x19) + 80000250: 01068c63 beq x13,x16,80000268 + 80000254: 76c0276f jal x14,800029c0 + 80000258: 80000248 .word 0x80000248 + 8000025c: 00000000 .word 0x00000000 + 80000260: 80008a9d .word 0x80008a9d + 80000264: 00000000 .word 0x00000000 + 80000268: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xb3487e9abf045e36 + 8000026c: 00013603 ld x12,0(x2) + 80000270: 00810113 addi x2,x2,8 + +0000000080000274 : +Zknd_aes64ks1i_cg_cp_rs1_b12: + aes64ks1i x9, x12, 6 # perform operation + 80000274: 31661493 aes64ks1i x9,x12,0x6 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zknd_aes64ks1i_cg_cp_rs1_b12, Zknd_aes64ks1i_cg_cp_rs1_b12_str) + 80000278: 0009b683 ld x13,0(x19) + 8000027c: 00968c63 beq x13,x9,80000294 + 80000280: 7400276f jal x14,800029c0 + 80000284: 80000274 .word 0x80000274 + 80000288: 00000000 .word 0x00000000 + 8000028c: 80008ad5 .word 0x80008ad5 + 80000290: 00000000 .word 0x00000000 + 80000294: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000298: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000029c: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x2052a9896480c1d9 + 800002a0: 00013683 ld x13,0(x2) + 800002a4: 00810113 addi x2,x2,8 + +00000000800002a8 : +Zknd_aes64ks1i_cg_cp_rs1_b13: + aes64ks1i x17, x13, 10 # perform operation + 800002a8: 31a69893 aes64ks1i x17,x13,0xa + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zknd_aes64ks1i_cg_cp_rs1_b13, Zknd_aes64ks1i_cg_cp_rs1_b13_str) + 800002ac: 0009b383 ld x7,0(x19) + 800002b0: 01138c63 beq x7,x17,800002c8 + 800002b4: 6e40246f jal x8,80002998 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 80008b0d .word 0x80008b0d + 800002c4: 00000000 .word 0x00000000 + 800002c8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x491ac466b0020c06 + 800002cc: 00013703 ld x14,0(x2) + 800002d0: 00810113 addi x2,x2,8 + +00000000800002d4 : +Zknd_aes64ks1i_cg_cp_rs1_b14: + aes64ks1i x15, x14, 6 # perform operation + 800002d4: 31671793 aes64ks1i x15,x14,0x6 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zknd_aes64ks1i_cg_cp_rs1_b14, Zknd_aes64ks1i_cg_cp_rs1_b14_str) + 800002d8: 0009b383 ld x7,0(x19) + 800002dc: 00f38c63 beq x7,x15,800002f4 + 800002e0: 6b80246f jal x8,80002998 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 80008b45 .word 0x80008b45 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8d4779b66401443f + 800002f8: 00013783 ld x15,0(x2) + 800002fc: 00810113 addi x2,x2,8 + +0000000080000300 : +Zknd_aes64ks1i_cg_cp_rs1_b15: + aes64ks1i x1, x15, 8 # perform operation + 80000300: 31879093 aes64ks1i x1,x15,0x8 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zknd_aes64ks1i_cg_cp_rs1_b15, Zknd_aes64ks1i_cg_cp_rs1_b15_str) + 80000304: 0009b383 ld x7,0(x19) + 80000308: 00138c63 beq x7,x1,80000320 + 8000030c: 68c0246f jal x8,80002998 + 80000310: 80000300 .word 0x80000300 + 80000314: 00000000 .word 0x00000000 + 80000318: 80008b7d .word 0x80008b7d + 8000031c: 00000000 .word 0x00000000 + 80000320: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x74a8a03b2a4aacfb + 80000324: 00013803 ld x16,0(x2) + 80000328: 00810113 addi x2,x2,8 + +000000008000032c : +Zknd_aes64ks1i_cg_cp_rs1_b16: + aes64ks1i x0, x16, 4 # perform operation + 8000032c: 31481013 aes64ks1i x0,x16,0x4 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zknd_aes64ks1i_cg_cp_rs1_b16, Zknd_aes64ks1i_cg_cp_rs1_b16_str) + 80000330: 0009b383 ld x7,0(x19) + 80000334: 00038c63 beq x7,x0,8000034c + 80000338: 6600246f jal x8,80002998 + 8000033c: 8000032c .word 0x8000032c + 80000340: 00000000 .word 0x00000000 + 80000344: 80008bb5 .word 0x80008bb5 + 80000348: 00000000 .word 0x00000000 + 8000034c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x589a5e628ee04825 + 80000350: 00013883 ld x17,0(x2) + 80000354: 00810113 addi x2,x2,8 + +0000000080000358 : +Zknd_aes64ks1i_cg_cp_rs1_b17: + aes64ks1i x28, x17, 8 # perform operation + 80000358: 31889e13 aes64ks1i x28,x17,0x8 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zknd_aes64ks1i_cg_cp_rs1_b17, Zknd_aes64ks1i_cg_cp_rs1_b17_str) + 8000035c: 0009b383 ld x7,0(x19) + 80000360: 01c38c63 beq x7,x28,80000378 + 80000364: 6340246f jal x8,80002998 + 80000368: 80000358 .word 0x80000358 + 8000036c: 00000000 .word 0x00000000 + 80000370: 80008bed .word 0x80008bed + 80000374: 00000000 .word 0x00000000 + 80000378: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xccc5c249ce075b85 + 8000037c: 00013903 ld x18,0(x2) + 80000380: 00810113 addi x2,x2,8 + +0000000080000384 : +Zknd_aes64ks1i_cg_cp_rs1_b18: + aes64ks1i x22, x18, 7 # perform operation + 80000384: 31791b13 aes64ks1i x22,x18,0x7 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zknd_aes64ks1i_cg_cp_rs1_b18, Zknd_aes64ks1i_cg_cp_rs1_b18_str) + 80000388: 0009b383 ld x7,0(x19) + 8000038c: 01638c63 beq x7,x22,800003a4 + 80000390: 6080246f jal x8,80002998 + 80000394: 80000384 .word 0x80000384 + 80000398: 00000000 .word 0x00000000 + 8000039c: 80008c25 .word 0x80008c25 + 800003a0: 00000000 .word 0x00000000 + 800003a4: 00898993 addi x19,x19,8 + + mv x11, x19 # switch signature pointer register to avoid conflict with test + 800003a8: 00098593 addi x11,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xdd726d21381fe7c2 + 800003ac: 00013983 ld x19,0(x2) + 800003b0: 00810113 addi x2,x2,8 + +00000000800003b4 : +Zknd_aes64ks1i_cg_cp_rs1_b19: + aes64ks1i x12, x19, 10 # perform operation + 800003b4: 31a99613 aes64ks1i x12,x19,0xa + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zknd_aes64ks1i_cg_cp_rs1_b19, Zknd_aes64ks1i_cg_cp_rs1_b19_str) + 800003b8: 0005b383 ld x7,0(x11) + 800003bc: 00c38c63 beq x7,x12,800003d4 + 800003c0: 5d80246f jal x8,80002998 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 80008c5d .word 0x80008c5d + 800003d0: 00000000 .word 0x00000000 + 800003d4: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xc1f19b09a03dbeea + 800003d8: 00013a03 ld x20,0(x2) + 800003dc: 00810113 addi x2,x2,8 + +00000000800003e0 : +Zknd_aes64ks1i_cg_cp_rs1_b20: + aes64ks1i x6, x20, 5 # perform operation + 800003e0: 315a1313 aes64ks1i x6,x20,0x5 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknd_aes64ks1i_cg_cp_rs1_b20, Zknd_aes64ks1i_cg_cp_rs1_b20_str) + 800003e4: 0005b383 ld x7,0(x11) + 800003e8: 00638c63 beq x7,x6,80000400 + 800003ec: 5ac0246f jal x8,80002998 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 80008c95 .word 0x80008c95 + 800003fc: 00000000 .word 0x00000000 + 80000400: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x65a490dc76c3fd0d + 80000404: 00013a83 ld x21,0(x2) + 80000408: 00810113 addi x2,x2,8 + +000000008000040c : +Zknd_aes64ks1i_cg_cp_rs1_b21: + aes64ks1i x27, x21, 7 # perform operation + 8000040c: 317a9d93 aes64ks1i x27,x21,0x7 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zknd_aes64ks1i_cg_cp_rs1_b21, Zknd_aes64ks1i_cg_cp_rs1_b21_str) + 80000410: 0005b383 ld x7,0(x11) + 80000414: 01b38c63 beq x7,x27,8000042c + 80000418: 5800246f jal x8,80002998 + 8000041c: 8000040c .word 0x8000040c + 80000420: 00000000 .word 0x00000000 + 80000424: 80008ccd .word 0x80008ccd + 80000428: 00000000 .word 0x00000000 + 8000042c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0affdfbb3e4d294e + 80000430: 00013b03 ld x22,0(x2) + 80000434: 00810113 addi x2,x2,8 + +0000000080000438 : +Zknd_aes64ks1i_cg_cp_rs1_b22: + aes64ks1i x19, x22, 3 # perform operation + 80000438: 313b1993 aes64ks1i x19,x22,0x3 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zknd_aes64ks1i_cg_cp_rs1_b22, Zknd_aes64ks1i_cg_cp_rs1_b22_str) + 8000043c: 0005b383 ld x7,0(x11) + 80000440: 01338c63 beq x7,x19,80000458 + 80000444: 5540246f jal x8,80002998 + 80000448: 80000438 .word 0x80000438 + 8000044c: 00000000 .word 0x00000000 + 80000450: 80008d05 .word 0x80008d05 + 80000454: 00000000 .word 0x00000000 + 80000458: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x6969c244f760c6dd + 8000045c: 00013b83 ld x23,0(x2) + 80000460: 00810113 addi x2,x2,8 + +0000000080000464 : +Zknd_aes64ks1i_cg_cp_rs1_b23: + aes64ks1i x3, x23, 4 # perform operation + 80000464: 314b9193 aes64ks1i x3,x23,0x4 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zknd_aes64ks1i_cg_cp_rs1_b23, Zknd_aes64ks1i_cg_cp_rs1_b23_str) + 80000468: 0005b383 ld x7,0(x11) + 8000046c: 00338c63 beq x7,x3,80000484 + 80000470: 5280246f jal x8,80002998 + 80000474: 80000464 .word 0x80000464 + 80000478: 00000000 .word 0x00000000 + 8000047c: 80008d3d .word 0x80008d3d + 80000480: 00000000 .word 0x00000000 + 80000484: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x875a267dd9a182f5 + 80000488: 00013c03 ld x24,0(x2) + 8000048c: 00810113 addi x2,x2,8 + +0000000080000490 : +Zknd_aes64ks1i_cg_cp_rs1_b24: + aes64ks1i x4, x24, 9 # perform operation + 80000490: 319c1213 aes64ks1i x4,x24,0x9 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zknd_aes64ks1i_cg_cp_rs1_b24, Zknd_aes64ks1i_cg_cp_rs1_b24_str) + 80000494: 0005b383 ld x7,0(x11) + 80000498: 00438c63 beq x7,x4,800004b0 + 8000049c: 4fc0246f jal x8,80002998 + 800004a0: 80000490 .word 0x80000490 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 80008d75 .word 0x80008d75 + 800004ac: 00000000 .word 0x00000000 + 800004b0: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x8f197f305dbdcc73 + 800004b4: 00013c83 ld x25,0(x2) + 800004b8: 00810113 addi x2,x2,8 + +00000000800004bc : +Zknd_aes64ks1i_cg_cp_rs1_b25: + aes64ks1i x3, x25, 3 # perform operation + 800004bc: 313c9193 aes64ks1i x3,x25,0x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zknd_aes64ks1i_cg_cp_rs1_b25, Zknd_aes64ks1i_cg_cp_rs1_b25_str) + 800004c0: 0005b383 ld x7,0(x11) + 800004c4: 00338c63 beq x7,x3,800004dc + 800004c8: 4d00246f jal x8,80002998 + 800004cc: 800004bc .word 0x800004bc + 800004d0: 00000000 .word 0x00000000 + 800004d4: 80008dad .word 0x80008dad + 800004d8: 00000000 .word 0x00000000 + 800004dc: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x8b8ea52d0a521e00 + 800004e0: 00013d03 ld x26,0(x2) + 800004e4: 00810113 addi x2,x2,8 + +00000000800004e8 : +Zknd_aes64ks1i_cg_cp_rs1_b26: + aes64ks1i x6, x26, 1 # perform operation + 800004e8: 311d1313 aes64ks1i x6,x26,0x1 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknd_aes64ks1i_cg_cp_rs1_b26, Zknd_aes64ks1i_cg_cp_rs1_b26_str) + 800004ec: 0005b383 ld x7,0(x11) + 800004f0: 00638c63 beq x7,x6,80000508 + 800004f4: 4a40246f jal x8,80002998 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 80008de5 .word 0x80008de5 + 80000504: 00000000 .word 0x00000000 + 80000508: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x9c953ca2201d5f6e + 8000050c: 00013d83 ld x27,0(x2) + 80000510: 00810113 addi x2,x2,8 + +0000000080000514 : +Zknd_aes64ks1i_cg_cp_rs1_b27: + aes64ks1i x16, x27, 2 # perform operation + 80000514: 312d9813 aes64ks1i x16,x27,0x2 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zknd_aes64ks1i_cg_cp_rs1_b27, Zknd_aes64ks1i_cg_cp_rs1_b27_str) + 80000518: 0005b383 ld x7,0(x11) + 8000051c: 01038c63 beq x7,x16,80000534 + 80000520: 4780246f jal x8,80002998 + 80000524: 80000514 .word 0x80000514 + 80000528: 00000000 .word 0x00000000 + 8000052c: 80008e1d .word 0x80008e1d + 80000530: 00000000 .word 0x00000000 + 80000534: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x76f30a322baeb11e + 80000538: 00013e03 ld x28,0(x2) + 8000053c: 00810113 addi x2,x2,8 + +0000000080000540 : +Zknd_aes64ks1i_cg_cp_rs1_b28: + aes64ks1i x6, x28, 6 # perform operation + 80000540: 316e1313 aes64ks1i x6,x28,0x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknd_aes64ks1i_cg_cp_rs1_b28, Zknd_aes64ks1i_cg_cp_rs1_b28_str) + 80000544: 0005b383 ld x7,0(x11) + 80000548: 00638c63 beq x7,x6,80000560 + 8000054c: 44c0246f jal x8,80002998 + 80000550: 80000540 .word 0x80000540 + 80000554: 00000000 .word 0x00000000 + 80000558: 80008e55 .word 0x80008e55 + 8000055c: 00000000 .word 0x00000000 + 80000560: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x2ecdc41ffc4b845e + 80000564: 00013e83 ld x29,0(x2) + 80000568: 00810113 addi x2,x2,8 + +000000008000056c : +Zknd_aes64ks1i_cg_cp_rs1_b29: + aes64ks1i x5, x29, 7 # perform operation + 8000056c: 317e9293 aes64ks1i x5,x29,0x7 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zknd_aes64ks1i_cg_cp_rs1_b29, Zknd_aes64ks1i_cg_cp_rs1_b29_str) + 80000570: 0005b383 ld x7,0(x11) + 80000574: 00538c63 beq x7,x5,8000058c + 80000578: 4200246f jal x8,80002998 + 8000057c: 8000056c .word 0x8000056c + 80000580: 00000000 .word 0x00000000 + 80000584: 80008e8d .word 0x80008e8d + 80000588: 00000000 .word 0x00000000 + 8000058c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x1c4ccada30510243 + 80000590: 00013f03 ld x30,0(x2) + 80000594: 00810113 addi x2,x2,8 + +0000000080000598 : +Zknd_aes64ks1i_cg_cp_rs1_b30: + aes64ks1i x21, x30, 5 # perform operation + 80000598: 315f1a93 aes64ks1i x21,x30,0x5 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zknd_aes64ks1i_cg_cp_rs1_b30, Zknd_aes64ks1i_cg_cp_rs1_b30_str) + 8000059c: 0005b383 ld x7,0(x11) + 800005a0: 01538c63 beq x7,x21,800005b8 + 800005a4: 3f40246f jal x8,80002998 + 800005a8: 80000598 .word 0x80000598 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 80008ec5 .word 0x80008ec5 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x599d496f46ef29fe + 800005bc: 00013f83 ld x31,0(x2) + 800005c0: 00810113 addi x2,x2,8 + +00000000800005c4 : +Zknd_aes64ks1i_cg_cp_rs1_b31: + aes64ks1i x26, x31, 10 # perform operation + 800005c4: 31af9d13 aes64ks1i x26,x31,0xa + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zknd_aes64ks1i_cg_cp_rs1_b31, Zknd_aes64ks1i_cg_cp_rs1_b31_str) + 800005c8: 0005b383 ld x7,0(x11) + 800005cc: 01a38c63 beq x7,x26,800005e4 + 800005d0: 3c80246f jal x8,80002998 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 80008efd .word 0x80008efd + 800005e0: 00000000 .word 0x00000000 + 800005e4: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xab271b94f41e5a32 + 800005e8: 00013b03 ld x22,0(x2) + 800005ec: 00810113 addi x2,x2,8 + +00000000800005f0 : +Zknd_aes64ks1i_cg_cp_rd_b0: + aes64ks1i x0, x22, 2 # perform operation + 800005f0: 312b1013 aes64ks1i x0,x22,0x2 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zknd_aes64ks1i_cg_cp_rd_b0, Zknd_aes64ks1i_cg_cp_rd_b0_str) + 800005f4: 0005b383 ld x7,0(x11) + 800005f8: 00038c63 beq x7,x0,80000610 + 800005fc: 39c0246f jal x8,80002998 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80008f35 .word 0x80008f35 + 8000060c: 00000000 .word 0x00000000 + 80000610: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0xa88d80da2917f3c9 + 80000614: 00013283 ld x5,0(x2) + 80000618: 00810113 addi x2,x2,8 + +000000008000061c : +Zknd_aes64ks1i_cg_cp_rd_b1: + aes64ks1i x1, x5, 9 # perform operation + 8000061c: 31929093 aes64ks1i x1,x5,0x9 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zknd_aes64ks1i_cg_cp_rd_b1, Zknd_aes64ks1i_cg_cp_rd_b1_str) + 80000620: 0005b383 ld x7,0(x11) + 80000624: 00138c63 beq x7,x1,8000063c + 80000628: 3700246f jal x8,80002998 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008f6b .word 0x80008f6b + 80000638: 00000000 .word 0x00000000 + 8000063c: 00858593 addi x11,x11,8 + + mv x23, x2 # switch data pointer register to avoid conflict with test + 80000640: 00010b93 addi x23,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x0158786dc0142904 + 80000644: 000bbe83 ld x29,0(x23) + 80000648: 008b8b93 addi x23,x23,8 + +000000008000064c : +Zknd_aes64ks1i_cg_cp_rd_b2: + aes64ks1i x2, x29, 6 # perform operation + 8000064c: 316e9113 aes64ks1i x2,x29,0x6 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zknd_aes64ks1i_cg_cp_rd_b2, Zknd_aes64ks1i_cg_cp_rd_b2_str) + 80000650: 0005b383 ld x7,0(x11) + 80000654: 00238c63 beq x7,x2,8000066c + 80000658: 3400246f jal x8,80002998 + 8000065c: 8000064c .word 0x8000064c + 80000660: 00000000 .word 0x00000000 + 80000664: 80008fa1 .word 0x80008fa1 + 80000668: 00000000 .word 0x00000000 + 8000066c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x7a1e70828465d118 + 80000670: 000bbc03 ld x24,0(x23) + 80000674: 008b8b93 addi x23,x23,8 + +0000000080000678 : +Zknd_aes64ks1i_cg_cp_rd_b3: + aes64ks1i x3, x24, 3 # perform operation + 80000678: 313c1193 aes64ks1i x3,x24,0x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zknd_aes64ks1i_cg_cp_rd_b3, Zknd_aes64ks1i_cg_cp_rd_b3_str) + 8000067c: 0005b383 ld x7,0(x11) + 80000680: 00338c63 beq x7,x3,80000698 + 80000684: 3140246f jal x8,80002998 + 80000688: 80000678 .word 0x80000678 + 8000068c: 00000000 .word 0x00000000 + 80000690: 80008fd7 .word 0x80008fd7 + 80000694: 00000000 .word 0x00000000 + 80000698: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x44d4a7bcc60bff7b + 8000069c: 000bb903 ld x18,0(x23) + 800006a0: 008b8b93 addi x23,x23,8 + +00000000800006a4 : +Zknd_aes64ks1i_cg_cp_rd_b4: + aes64ks1i x4, x18, 2 # perform operation + 800006a4: 31291213 aes64ks1i x4,x18,0x2 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zknd_aes64ks1i_cg_cp_rd_b4, Zknd_aes64ks1i_cg_cp_rd_b4_str) + 800006a8: 0005b383 ld x7,0(x11) + 800006ac: 00438c63 beq x7,x4,800006c4 + 800006b0: 2e80246f jal x8,80002998 + 800006b4: 800006a4 .word 0x800006a4 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 8000900d .word 0x8000900d + 800006c0: 00000000 .word 0x00000000 + 800006c4: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x54647f5c1e27d5ff + 800006c8: 000bb183 ld x3,0(x23) + 800006cc: 008b8b93 addi x23,x23,8 + +00000000800006d0 : +Zknd_aes64ks1i_cg_cp_rd_b5: + aes64ks1i x5, x3, 4 # perform operation + 800006d0: 31419293 aes64ks1i x5,x3,0x4 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zknd_aes64ks1i_cg_cp_rd_b5, Zknd_aes64ks1i_cg_cp_rd_b5_str) + 800006d4: 0005b383 ld x7,0(x11) + 800006d8: 00538c63 beq x7,x5,800006f0 + 800006dc: 2bc0246f jal x8,80002998 + 800006e0: 800006d0 .word 0x800006d0 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 80009043 .word 0x80009043 + 800006ec: 00000000 .word 0x00000000 + 800006f0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0xc0d097186aba52d9 + 800006f4: 000bb083 ld x1,0(x23) + 800006f8: 008b8b93 addi x23,x23,8 + +00000000800006fc : +Zknd_aes64ks1i_cg_cp_rd_b6: + aes64ks1i x6, x1, 10 # perform operation + 800006fc: 31a09313 aes64ks1i x6,x1,0xa + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zknd_aes64ks1i_cg_cp_rd_b6, Zknd_aes64ks1i_cg_cp_rd_b6_str) + 80000700: 0005b383 ld x7,0(x11) + 80000704: 00638c63 beq x7,x6,8000071c + 80000708: 2900246f jal x8,80002998 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80009079 .word 0x80009079 + 80000718: 00000000 .word 0x00000000 + 8000071c: 00858593 addi x11,x11,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000724: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xd57f8cd7c659ca32 + 80000728: 000bbe83 ld x29,0(x23) + 8000072c: 008b8b93 addi x23,x23,8 + +0000000080000730 : +Zknd_aes64ks1i_cg_cp_rd_b7: + aes64ks1i x7, x29, 10 # perform operation + 80000730: 31ae9393 aes64ks1i x7,x29,0xa + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zknd_aes64ks1i_cg_cp_rd_b7, Zknd_aes64ks1i_cg_cp_rd_b7_str) + 80000734: 0005b203 ld x4,0(x11) + 80000738: 00720c63 beq x4,x7,80000750 + 8000073c: 244022ef jal x5,80002980 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 800090af .word 0x800090af + 8000074c: 00000000 .word 0x00000000 + 80000750: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x0ea7f6cf2b962102 + 80000754: 000bb083 ld x1,0(x23) + 80000758: 008b8b93 addi x23,x23,8 + +000000008000075c : +Zknd_aes64ks1i_cg_cp_rd_b8: + aes64ks1i x8, x1, 10 # perform operation + 8000075c: 31a09413 aes64ks1i x8,x1,0xa + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zknd_aes64ks1i_cg_cp_rd_b8, Zknd_aes64ks1i_cg_cp_rd_b8_str) + 80000760: 0005b203 ld x4,0(x11) + 80000764: 00820c63 beq x4,x8,8000077c + 80000768: 218022ef jal x5,80002980 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 800090e5 .word 0x800090e5 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x3674fc571b401626 + 80000780: 000bbd03 ld x26,0(x23) + 80000784: 008b8b93 addi x23,x23,8 + +0000000080000788 : +Zknd_aes64ks1i_cg_cp_rd_b9: + aes64ks1i x9, x26, 4 # perform operation + 80000788: 314d1493 aes64ks1i x9,x26,0x4 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zknd_aes64ks1i_cg_cp_rd_b9, Zknd_aes64ks1i_cg_cp_rd_b9_str) + 8000078c: 0005b203 ld x4,0(x11) + 80000790: 00920c63 beq x4,x9,800007a8 + 80000794: 1ec022ef jal x5,80002980 + 80000798: 80000788 .word 0x80000788 + 8000079c: 00000000 .word 0x00000000 + 800007a0: 8000911b .word 0x8000911b + 800007a4: 00000000 .word 0x00000000 + 800007a8: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0bc9ae19084db7ed + 800007ac: 000bbc03 ld x24,0(x23) + 800007b0: 008b8b93 addi x23,x23,8 + +00000000800007b4 : +Zknd_aes64ks1i_cg_cp_rd_b10: + aes64ks1i x10, x24, 6 # perform operation + 800007b4: 316c1513 aes64ks1i x10,x24,0x6 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zknd_aes64ks1i_cg_cp_rd_b10, Zknd_aes64ks1i_cg_cp_rd_b10_str) + 800007b8: 0005b203 ld x4,0(x11) + 800007bc: 00a20c63 beq x4,x10,800007d4 + 800007c0: 1c0022ef jal x5,80002980 + 800007c4: 800007b4 .word 0x800007b4 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 80009151 .word 0x80009151 + 800007d0: 00000000 .word 0x00000000 + 800007d4: 00858593 addi x11,x11,8 + + mv x24, x11 # switch signature pointer register to avoid conflict with test + 800007d8: 00058c13 addi x24,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x41b05a0fa72a34dd + 800007dc: 000bbf03 ld x30,0(x23) + 800007e0: 008b8b93 addi x23,x23,8 + +00000000800007e4 : +Zknd_aes64ks1i_cg_cp_rd_b11: + aes64ks1i x11, x30, 3 # perform operation + 800007e4: 313f1593 aes64ks1i x11,x30,0x3 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zknd_aes64ks1i_cg_cp_rd_b11, Zknd_aes64ks1i_cg_cp_rd_b11_str) + 800007e8: 000c3203 ld x4,0(x24) + 800007ec: 00b20c63 beq x4,x11,80000804 + 800007f0: 190022ef jal x5,80002980 + 800007f4: 800007e4 .word 0x800007e4 + 800007f8: 00000000 .word 0x00000000 + 800007fc: 80009188 .word 0x80009188 + 80000800: 00000000 .word 0x00000000 + 80000804: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xe17b08091e4c1881 + 80000808: 000bb183 ld x3,0(x23) + 8000080c: 008b8b93 addi x23,x23,8 + +0000000080000810 : +Zknd_aes64ks1i_cg_cp_rd_b12: + aes64ks1i x12, x3, 7 # perform operation + 80000810: 31719613 aes64ks1i x12,x3,0x7 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zknd_aes64ks1i_cg_cp_rd_b12, Zknd_aes64ks1i_cg_cp_rd_b12_str) + 80000814: 000c3203 ld x4,0(x24) + 80000818: 00c20c63 beq x4,x12,80000830 + 8000081c: 164022ef jal x5,80002980 + 80000820: 80000810 .word 0x80000810 + 80000824: 00000000 .word 0x00000000 + 80000828: 800091bf .word 0x800091bf + 8000082c: 00000000 .word 0x00000000 + 80000830: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x30a321309cad0859 + 80000834: 000bbf03 ld x30,0(x23) + 80000838: 008b8b93 addi x23,x23,8 + +000000008000083c : +Zknd_aes64ks1i_cg_cp_rd_b13: + aes64ks1i x13, x30, 1 # perform operation + 8000083c: 311f1693 aes64ks1i x13,x30,0x1 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zknd_aes64ks1i_cg_cp_rd_b13, Zknd_aes64ks1i_cg_cp_rd_b13_str) + 80000840: 000c3203 ld x4,0(x24) + 80000844: 00d20c63 beq x4,x13,8000085c + 80000848: 138022ef jal x5,80002980 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 800091f6 .word 0x800091f6 + 80000858: 00000000 .word 0x00000000 + 8000085c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xa55f8f1318063451 + 80000860: 000bb883 ld x17,0(x23) + 80000864: 008b8b93 addi x23,x23,8 + +0000000080000868 : +Zknd_aes64ks1i_cg_cp_rd_b14: + aes64ks1i x14, x17, 8 # perform operation + 80000868: 31889713 aes64ks1i x14,x17,0x8 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zknd_aes64ks1i_cg_cp_rd_b14, Zknd_aes64ks1i_cg_cp_rd_b14_str) + 8000086c: 000c3203 ld x4,0(x24) + 80000870: 00e20c63 beq x4,x14,80000888 + 80000874: 10c022ef jal x5,80002980 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 8000922d .word 0x8000922d + 80000884: 00000000 .word 0x00000000 + 80000888: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x2f304bbfdf625e84 + 8000088c: 000bb583 ld x11,0(x23) + 80000890: 008b8b93 addi x23,x23,8 + +0000000080000894 : +Zknd_aes64ks1i_cg_cp_rd_b15: + aes64ks1i x15, x11, 2 # perform operation + 80000894: 31259793 aes64ks1i x15,x11,0x2 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zknd_aes64ks1i_cg_cp_rd_b15, Zknd_aes64ks1i_cg_cp_rd_b15_str) + 80000898: 000c3203 ld x4,0(x24) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 0e0022ef jal x5,80002980 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 80009264 .word 0x80009264 + 800008b0: 00000000 .word 0x00000000 + 800008b4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xe823e64ddbaa3df3 + 800008b8: 000bb683 ld x13,0(x23) + 800008bc: 008b8b93 addi x23,x23,8 + +00000000800008c0 : +Zknd_aes64ks1i_cg_cp_rd_b16: + aes64ks1i x16, x13, 6 # perform operation + 800008c0: 31669813 aes64ks1i x16,x13,0x6 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zknd_aes64ks1i_cg_cp_rd_b16, Zknd_aes64ks1i_cg_cp_rd_b16_str) + 800008c4: 000c3203 ld x4,0(x24) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 0b4022ef jal x5,80002980 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 8000929b .word 0x8000929b + 800008dc: 00000000 .word 0x00000000 + 800008e0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xfe16b606434da797 + 800008e4: 000bbc83 ld x25,0(x23) + 800008e8: 008b8b93 addi x23,x23,8 + +00000000800008ec : +Zknd_aes64ks1i_cg_cp_rd_b17: + aes64ks1i x17, x25, 9 # perform operation + 800008ec: 319c9893 aes64ks1i x17,x25,0x9 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknd_aes64ks1i_cg_cp_rd_b17, Zknd_aes64ks1i_cg_cp_rd_b17_str) + 800008f0: 000c3203 ld x4,0(x24) + 800008f4: 01120c63 beq x4,x17,8000090c + 800008f8: 088022ef jal x5,80002980 + 800008fc: 800008ec .word 0x800008ec + 80000900: 00000000 .word 0x00000000 + 80000904: 800092d2 .word 0x800092d2 + 80000908: 00000000 .word 0x00000000 + 8000090c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x080b2ac9fa14b831 + 80000910: 000bb183 ld x3,0(x23) + 80000914: 008b8b93 addi x23,x23,8 + +0000000080000918 : +Zknd_aes64ks1i_cg_cp_rd_b18: + aes64ks1i x18, x3, 3 # perform operation + 80000918: 31319913 aes64ks1i x18,x3,0x3 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zknd_aes64ks1i_cg_cp_rd_b18, Zknd_aes64ks1i_cg_cp_rd_b18_str) + 8000091c: 000c3203 ld x4,0(x24) + 80000920: 01220c63 beq x4,x18,80000938 + 80000924: 05c022ef jal x5,80002980 + 80000928: 80000918 .word 0x80000918 + 8000092c: 00000000 .word 0x00000000 + 80000930: 80009309 .word 0x80009309 + 80000934: 00000000 .word 0x00000000 + 80000938: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x881a4f3eba024e38 + 8000093c: 000bb083 ld x1,0(x23) + 80000940: 008b8b93 addi x23,x23,8 + +0000000080000944 : +Zknd_aes64ks1i_cg_cp_rd_b19: + aes64ks1i x19, x1, 0 # perform operation + 80000944: 31009993 aes64ks1i x19,x1,0x0 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zknd_aes64ks1i_cg_cp_rd_b19, Zknd_aes64ks1i_cg_cp_rd_b19_str) + 80000948: 000c3203 ld x4,0(x24) + 8000094c: 01320c63 beq x4,x19,80000964 + 80000950: 030022ef jal x5,80002980 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 80009340 .word 0x80009340 + 80000960: 00000000 .word 0x00000000 + 80000964: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xfa4b543d9b917d12 + 80000968: 000bb603 ld x12,0(x23) + 8000096c: 008b8b93 addi x23,x23,8 + +0000000080000970 : +Zknd_aes64ks1i_cg_cp_rd_b20: + aes64ks1i x20, x12, 10 # perform operation + 80000970: 31a61a13 aes64ks1i x20,x12,0xa + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zknd_aes64ks1i_cg_cp_rd_b20, Zknd_aes64ks1i_cg_cp_rd_b20_str) + 80000974: 000c3203 ld x4,0(x24) + 80000978: 01420c63 beq x4,x20,80000990 + 8000097c: 004022ef jal x5,80002980 + 80000980: 80000970 .word 0x80000970 + 80000984: 00000000 .word 0x00000000 + 80000988: 80009377 .word 0x80009377 + 8000098c: 00000000 .word 0x00000000 + 80000990: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x72d2302d7d0c72df + 80000994: 000bb383 ld x7,0(x23) + 80000998: 008b8b93 addi x23,x23,8 + +000000008000099c : +Zknd_aes64ks1i_cg_cp_rd_b21: + aes64ks1i x21, x7, 10 # perform operation + 8000099c: 31a39a93 aes64ks1i x21,x7,0xa + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknd_aes64ks1i_cg_cp_rd_b21, Zknd_aes64ks1i_cg_cp_rd_b21_str) + 800009a0: 000c3203 ld x4,0(x24) + 800009a4: 01520c63 beq x4,x21,800009bc + 800009a8: 7d9012ef jal x5,80002980 + 800009ac: 8000099c .word 0x8000099c + 800009b0: 00000000 .word 0x00000000 + 800009b4: 800093ae .word 0x800093ae + 800009b8: 00000000 .word 0x00000000 + 800009bc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xa5d43bae2f004249 + 800009c0: 000bb983 ld x19,0(x23) + 800009c4: 008b8b93 addi x23,x23,8 + +00000000800009c8 : +Zknd_aes64ks1i_cg_cp_rd_b22: + aes64ks1i x22, x19, 7 # perform operation + 800009c8: 31799b13 aes64ks1i x22,x19,0x7 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zknd_aes64ks1i_cg_cp_rd_b22, Zknd_aes64ks1i_cg_cp_rd_b22_str) + 800009cc: 000c3203 ld x4,0(x24) + 800009d0: 01620c63 beq x4,x22,800009e8 + 800009d4: 7ad012ef jal x5,80002980 + 800009d8: 800009c8 .word 0x800009c8 + 800009dc: 00000000 .word 0x00000000 + 800009e0: 800093e5 .word 0x800093e5 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 008c0c13 addi x24,x24,8 + + mv x15, x23 # switch data pointer register to avoid conflict with test + 800009ec: 000b8793 addi x15,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xb724e7d6f28adeee + 800009f0: 0007be83 ld x29,0(x15) + 800009f4: 00878793 addi x15,x15,8 + +00000000800009f8 : +Zknd_aes64ks1i_cg_cp_rd_b23: + aes64ks1i x23, x29, 5 # perform operation + 800009f8: 315e9b93 aes64ks1i x23,x29,0x5 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknd_aes64ks1i_cg_cp_rd_b23, Zknd_aes64ks1i_cg_cp_rd_b23_str) + 800009fc: 000c3203 ld x4,0(x24) + 80000a00: 01720c63 beq x4,x23,80000a18 + 80000a04: 77d012ef jal x5,80002980 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 8000941c .word 0x8000941c + 80000a14: 00000000 .word 0x00000000 + 80000a18: 008c0c13 addi x24,x24,8 + + mv x2, x24 # switch signature pointer register to avoid conflict with test + 80000a1c: 000c0113 addi x2,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x35b30f27f1b493f1 + 80000a20: 0007b383 ld x7,0(x15) + 80000a24: 00878793 addi x15,x15,8 + +0000000080000a28 : +Zknd_aes64ks1i_cg_cp_rd_b24: + aes64ks1i x24, x7, 0 # perform operation + 80000a28: 31039c13 aes64ks1i x24,x7,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknd_aes64ks1i_cg_cp_rd_b24, Zknd_aes64ks1i_cg_cp_rd_b24_str) + 80000a2c: 00013203 ld x4,0(x2) + 80000a30: 01820c63 beq x4,x24,80000a48 + 80000a34: 74d012ef jal x5,80002980 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009453 .word 0x80009453 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xf7024144deda7ab1 + 80000a4c: 0007b703 ld x14,0(x15) + 80000a50: 00878793 addi x15,x15,8 + +0000000080000a54 : +Zknd_aes64ks1i_cg_cp_rd_b25: + aes64ks1i x25, x14, 7 # perform operation + 80000a54: 31771c93 aes64ks1i x25,x14,0x7 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknd_aes64ks1i_cg_cp_rd_b25, Zknd_aes64ks1i_cg_cp_rd_b25_str) + 80000a58: 00013203 ld x4,0(x2) + 80000a5c: 01920c63 beq x4,x25,80000a74 + 80000a60: 721012ef jal x5,80002980 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000948a .word 0x8000948a + 80000a70: 00000000 .word 0x00000000 + 80000a74: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xee520cb10fedea6d + 80000a78: 0007b303 ld x6,0(x15) + 80000a7c: 00878793 addi x15,x15,8 + +0000000080000a80 : +Zknd_aes64ks1i_cg_cp_rd_b26: + aes64ks1i x26, x6, 3 # perform operation + 80000a80: 31331d13 aes64ks1i x26,x6,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zknd_aes64ks1i_cg_cp_rd_b26, Zknd_aes64ks1i_cg_cp_rd_b26_str) + 80000a84: 00013203 ld x4,0(x2) + 80000a88: 01a20c63 beq x4,x26,80000aa0 + 80000a8c: 6f5012ef jal x5,80002980 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 800094c1 .word 0x800094c1 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5e33168c50428d1a + 80000aa4: 0007be03 ld x28,0(x15) + 80000aa8: 00878793 addi x15,x15,8 + +0000000080000aac : +Zknd_aes64ks1i_cg_cp_rd_b27: + aes64ks1i x27, x28, 8 # perform operation + 80000aac: 318e1d93 aes64ks1i x27,x28,0x8 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknd_aes64ks1i_cg_cp_rd_b27, Zknd_aes64ks1i_cg_cp_rd_b27_str) + 80000ab0: 00013203 ld x4,0(x2) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 6c9012ef jal x5,80002980 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094f8 .word 0x800094f8 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xa04c3caede1f47f9 + 80000ad0: 0007b883 ld x17,0(x15) + 80000ad4: 00878793 addi x15,x15,8 + +0000000080000ad8 : +Zknd_aes64ks1i_cg_cp_rd_b28: + aes64ks1i x28, x17, 0 # perform operation + 80000ad8: 31089e13 aes64ks1i x28,x17,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknd_aes64ks1i_cg_cp_rd_b28, Zknd_aes64ks1i_cg_cp_rd_b28_str) + 80000adc: 00013203 ld x4,0(x2) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 69d012ef jal x5,80002980 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 8000952f .word 0x8000952f + 80000af4: 00000000 .word 0x00000000 + 80000af8: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x30acf9b435183841 + 80000afc: 0007b803 ld x16,0(x15) + 80000b00: 00878793 addi x15,x15,8 + +0000000080000b04 : +Zknd_aes64ks1i_cg_cp_rd_b29: + aes64ks1i x29, x16, 7 # perform operation + 80000b04: 31781e93 aes64ks1i x29,x16,0x7 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknd_aes64ks1i_cg_cp_rd_b29, Zknd_aes64ks1i_cg_cp_rd_b29_str) + 80000b08: 00013203 ld x4,0(x2) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 671012ef jal x5,80002980 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 80009566 .word 0x80009566 + 80000b20: 00000000 .word 0x00000000 + 80000b24: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xb4865e321267af2c + 80000b28: 0007b583 ld x11,0(x15) + 80000b2c: 00878793 addi x15,x15,8 + +0000000080000b30 : +Zknd_aes64ks1i_cg_cp_rd_b30: + aes64ks1i x30, x11, 2 # perform operation + 80000b30: 31259f13 aes64ks1i x30,x11,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknd_aes64ks1i_cg_cp_rd_b30, Zknd_aes64ks1i_cg_cp_rd_b30_str) + 80000b34: 00013203 ld x4,0(x2) + 80000b38: 01e20c63 beq x4,x30,80000b50 + 80000b3c: 645012ef jal x5,80002980 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 8000959d .word 0x8000959d + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x86ccd5eaf6844a12 + 80000b54: 0007be83 ld x29,0(x15) + 80000b58: 00878793 addi x15,x15,8 + +0000000080000b5c : +Zknd_aes64ks1i_cg_cp_rd_b31: + aes64ks1i x31, x29, 6 # perform operation + 80000b5c: 316e9f93 aes64ks1i x31,x29,0x6 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknd_aes64ks1i_cg_cp_rd_b31, Zknd_aes64ks1i_cg_cp_rd_b31_str) + 80000b60: 00013203 ld x4,0(x2) + 80000b64: 01f20c63 beq x4,x31,80000b7c + 80000b68: 619012ef jal x5,80002980 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 800095d4 .word 0x800095d4 + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000000000000 + 80000b80: 0007b183 ld x3,0(x15) + 80000b84: 00878793 addi x15,x15,8 + +0000000080000b88 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x0: + aes64ks1i x27, x3, 0 # perform operation + 80000b88: 31019d93 aes64ks1i x27,x3,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknd_aes64ks1i_cg_cp_rs1_edges_0x0, Zknd_aes64ks1i_cg_cp_rs1_edges_0x0_str) + 80000b8c: 00013203 ld x4,0(x2) + 80000b90: 01b20c63 beq x4,x27,80000ba8 + 80000b94: 5ed012ef jal x5,80002980 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000960b .word 0x8000960b + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0000000000000001 + 80000bac: 0007b503 ld x10,0(x15) + 80000bb0: 00878793 addi x15,x15,8 + +0000000080000bb4 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x1: + aes64ks1i x26, x10, 0 # perform operation + 80000bb4: 31051d13 aes64ks1i x26,x10,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zknd_aes64ks1i_cg_cp_rs1_edges_0x1, Zknd_aes64ks1i_cg_cp_rs1_edges_0x1_str) + 80000bb8: 00013203 ld x4,0(x2) + 80000bbc: 01a20c63 beq x4,x26,80000bd4 + 80000bc0: 5c1012ef jal x5,80002980 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80009649 .word 0x80009649 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x0000000000000002 + 80000bd8: 0007b083 ld x1,0(x15) + 80000bdc: 00878793 addi x15,x15,8 + +0000000080000be0 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x2: + aes64ks1i x13, x1, 10 # perform operation + 80000be0: 31a09693 aes64ks1i x13,x1,0xa + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknd_aes64ks1i_cg_cp_rs1_edges_0x2, Zknd_aes64ks1i_cg_cp_rs1_edges_0x2_str) + 80000be4: 00013203 ld x4,0(x2) + 80000be8: 00d20c63 beq x4,x13,80000c00 + 80000bec: 595012ef jal x5,80002980 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 80009687 .word 0x80009687 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8000000000000000 + 80000c04: 0007bb03 ld x22,0(x15) + 80000c08: 00878793 addi x15,x15,8 + +0000000080000c0c : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000: + aes64ks1i x18, x22, 9 # perform operation + 80000c0c: 319b1913 aes64ks1i x18,x22,0x9 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000, Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 00013203 ld x4,0(x2) + 80000c14: 01220c63 beq x4,x18,80000c2c + 80000c18: 569012ef jal x5,80002980 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 800096c5 .word 0x800096c5 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8000000000000001 + 80000c30: 0007bc03 ld x24,0(x15) + 80000c34: 00878793 addi x15,x15,8 + +0000000080000c38 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001: + aes64ks1i x6, x24, 9 # perform operation + 80000c38: 319c1313 aes64ks1i x6,x24,0x9 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001, Zknd_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 00013203 ld x4,0(x2) + 80000c40: 00620c63 beq x4,x6,80000c58 + 80000c44: 53d012ef jal x5,80002980 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 80009712 .word 0x80009712 + 80000c54: 00000000 .word 0x00000000 + 80000c58: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x7fffffffffffffff + 80000c5c: 0007bf03 ld x30,0(x15) + 80000c60: 00878793 addi x15,x15,8 + +0000000080000c64 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64ks1i x19, x30, 10 # perform operation + 80000c64: 31af1993 aes64ks1i x19,x30,0xa + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknd_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff, Zknd_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 00013203 ld x4,0(x2) + 80000c6c: 01320c63 beq x4,x19,80000c84 + 80000c70: 511012ef jal x5,80002980 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 8000975f .word 0x8000975f + 80000c80: 00000000 .word 0x00000000 + 80000c84: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80000c88: 0007bd03 ld x26,0(x15) + 80000c8c: 00878793 addi x15,x15,8 + +0000000080000c90 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64ks1i x1, x26, 1 # perform operation + 80000c90: 311d1093 aes64ks1i x1,x26,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknd_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknd_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 00013203 ld x4,0(x2) + 80000c98: 00120c63 beq x4,x1,80000cb0 + 80000c9c: 4e5012ef jal x5,80002980 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 800097ac .word 0x800097ac + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xffffffffffffffff + 80000cb4: 0007b403 ld x8,0(x15) + 80000cb8: 00878793 addi x15,x15,8 + +0000000080000cbc : +Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff: + aes64ks1i x16, x8, 8 # perform operation + 80000cbc: 31841813 aes64ks1i x16,x8,0x8 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff, Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 00013203 ld x4,0(x2) + 80000cc4: 01020c63 beq x4,x16,80000cdc + 80000cc8: 4b9012ef jal x5,80002980 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800097f9 .word 0x800097f9 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xfffffffffffffffe + 80000ce0: 0007b183 ld x3,0(x15) + 80000ce4: 00878793 addi x15,x15,8 + +0000000080000ce8 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64ks1i x6, x3, 10 # perform operation + 80000ce8: 31a19313 aes64ks1i x6,x3,0xa + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe, Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 00013203 ld x4,0(x2) + 80000cf0: 00620c63 beq x4,x6,80000d08 + 80000cf4: 48d012ef jal x5,80002980 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009846 .word 0x80009846 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80000d0c: 0007b083 ld x1,0(x15) + 80000d10: 00878793 addi x15,x15,8 + +0000000080000d14 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64ks1i x19, x1, 8 # perform operation + 80000d14: 31809993 aes64ks1i x19,x1,0x8 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknd_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknd_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 00013203 ld x4,0(x2) + 80000d1c: 01320c63 beq x4,x19,80000d34 + 80000d20: 461012ef jal x5,80002980 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 80009893 .word 0x80009893 + 80000d30: 00000000 .word 0x00000000 + 80000d34: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80000d38: 0007b883 ld x17,0(x15) + 80000d3c: 00878793 addi x15,x15,8 + +0000000080000d40 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64ks1i x7, x17, 4 # perform operation + 80000d40: 31489393 aes64ks1i x7,x17,0x4 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zknd_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 00013203 ld x4,0(x2) + 80000d48: 00720c63 beq x4,x7,80000d60 + 80000d4c: 435012ef jal x5,80002980 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 800098e0 .word 0x800098e0 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x5555555555555555 + 80000d64: 0007bb83 ld x23,0(x15) + 80000d68: 00878793 addi x15,x15,8 + +0000000080000d6c : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555: + aes64ks1i x6, x23, 2 # perform operation + 80000d6c: 312b9313 aes64ks1i x6,x23,0x2 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknd_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555, Zknd_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 00013203 ld x4,0(x2) + 80000d74: 00620c63 beq x4,x6,80000d8c + 80000d78: 409012ef jal x5,80002980 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 8000992d .word 0x8000992d + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x00000000ffffffff + 80000d90: 0007b583 ld x11,0(x15) + 80000d94: 00878793 addi x15,x15,8 + +0000000080000d98 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffff: + aes64ks1i x12, x11, 9 # perform operation + 80000d98: 31959613 aes64ks1i x12,x11,0x9 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffff, Zknd_aes64ks1i_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 00013203 ld x4,0(x2) + 80000da0: 00c20c63 beq x4,x12,80000db8 + 80000da4: 3dd012ef jal x5,80002980 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000997a .word 0x8000997a + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x00000000fffffffe + 80000dbc: 0007b383 ld x7,0(x15) + 80000dc0: 00878793 addi x15,x15,8 + +0000000080000dc4 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffe: + aes64ks1i x9, x7, 9 # perform operation + 80000dc4: 31939493 aes64ks1i x9,x7,0x9 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffe, Zknd_aes64ks1i_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 00013203 ld x4,0(x2) + 80000dcc: 00920c63 beq x4,x9,80000de4 + 80000dd0: 3b1012ef jal x5,80002980 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800099bf .word 0x800099bf + 80000de0: 00000000 .word 0x00000000 + 80000de4: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x0000000100000000 + 80000de8: 0007b903 ld x18,0(x15) + 80000dec: 00878793 addi x15,x15,8 + +0000000080000df0 : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000000: + aes64ks1i x22, x18, 4 # perform operation + 80000df0: 31491b13 aes64ks1i x22,x18,0x4 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000000, Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 00013203 ld x4,0(x2) + 80000df8: 01620c63 beq x4,x22,80000e10 + 80000dfc: 385012ef jal x5,80002980 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 80009a04 .word 0x80009a04 + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x0000000100000001 + 80000e14: 0007b383 ld x7,0(x15) + 80000e18: 00878793 addi x15,x15,8 + +0000000080000e1c : +Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000001: + aes64ks1i x23, x7, 1 # perform operation + 80000e1c: 31139b93 aes64ks1i x23,x7,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000001, Zknd_aes64ks1i_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 00013203 ld x4,0(x2) + 80000e24: 01720c63 beq x4,x23,80000e3c + 80000e28: 359012ef jal x5,80002980 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009a4a .word 0x80009a4a + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x5aaea48c12c4bfb2 + 80000e40: 0007b003 ld x0,0(x15) + 80000e44: 00878793 addi x15,x15,8 + +0000000080000e48 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b0: + aes64ks1i x0, x0, 8 # perform operation + 80000e48: 31801013 aes64ks1i x0,x0,0x8 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknd_aes64ks1i_cg_cmp_rd_rs1_b0, Zknd_aes64ks1i_cg_cmp_rd_rs1_b0_str) + 80000e4c: 00013203 ld x4,0(x2) + 80000e50: 00020c63 beq x4,x0,80000e68 + 80000e54: 32d012ef jal x5,80002980 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 80009a90 .word 0x80009a90 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x4693acc81822b4ff + 80000e6c: 0007b083 ld x1,0(x15) + 80000e70: 00878793 addi x15,x15,8 + +0000000080000e74 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b1: + aes64ks1i x1, x1, 8 # perform operation + 80000e74: 31809093 aes64ks1i x1,x1,0x8 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknd_aes64ks1i_cg_cmp_rd_rs1_b1, Zknd_aes64ks1i_cg_cmp_rd_rs1_b1_str) + 80000e78: 00013203 ld x4,0(x2) + 80000e7c: 00120c63 beq x4,x1,80000e94 + 80000e80: 301012ef jal x5,80002980 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 80009acb .word 0x80009acb + 80000e90: 00000000 .word 0x00000000 + 80000e94: 00810113 addi x2,x2,8 + + mv x25, x2 # switch signature pointer register to avoid conflict with test + 80000e98: 00010c93 addi x25,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x6bffad22e5b55c19 + 80000e9c: 0007b103 ld x2,0(x15) + 80000ea0: 00878793 addi x15,x15,8 + +0000000080000ea4 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b2: + aes64ks1i x2, x2, 3 # perform operation + 80000ea4: 31311113 aes64ks1i x2,x2,0x3 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknd_aes64ks1i_cg_cmp_rd_rs1_b2, Zknd_aes64ks1i_cg_cmp_rd_rs1_b2_str) + 80000ea8: 000cb203 ld x4,0(x25) + 80000eac: 00220c63 beq x4,x2,80000ec4 + 80000eb0: 2d1012ef jal x5,80002980 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 80009b06 .word 0x80009b06 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7dcf49e0f42e5a83 + 80000ec8: 0007b183 ld x3,0(x15) + 80000ecc: 00878793 addi x15,x15,8 + +0000000080000ed0 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b3: + aes64ks1i x3, x3, 6 # perform operation + 80000ed0: 31619193 aes64ks1i x3,x3,0x6 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknd_aes64ks1i_cg_cmp_rd_rs1_b3, Zknd_aes64ks1i_cg_cmp_rd_rs1_b3_str) + 80000ed4: 000cb203 ld x4,0(x25) + 80000ed8: 00320c63 beq x4,x3,80000ef0 + 80000edc: 2a5012ef jal x5,80002980 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80009b41 .word 0x80009b41 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000ef8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x19656790b3f2a90d + 80000efc: 0007b203 ld x4,0(x15) + 80000f00: 00878793 addi x15,x15,8 + +0000000080000f04 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b4: + aes64ks1i x4, x4, 4 # perform operation + 80000f04: 31421213 aes64ks1i x4,x4,0x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zknd_aes64ks1i_cg_cmp_rd_rs1_b4, Zknd_aes64ks1i_cg_cmp_rd_rs1_b4_str) + 80000f08: 000cb383 ld x7,0(x25) + 80000f0c: 00438c63 beq x7,x4,80000f24 + 80000f10: 2890146f jal x8,80002998 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 80009b7c .word 0x80009b7c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xf429f6ca9e0827c3 + 80000f28: 0007b283 ld x5,0(x15) + 80000f2c: 00878793 addi x15,x15,8 + +0000000080000f30 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b5: + aes64ks1i x5, x5, 9 # perform operation + 80000f30: 31929293 aes64ks1i x5,x5,0x9 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknd_aes64ks1i_cg_cmp_rd_rs1_b5, Zknd_aes64ks1i_cg_cmp_rd_rs1_b5_str) + 80000f34: 000cb383 ld x7,0(x25) + 80000f38: 00538c63 beq x7,x5,80000f50 + 80000f3c: 25d0146f jal x8,80002998 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009bb7 .word 0x80009bb7 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x14e7e1f029f53948 + 80000f54: 0007b303 ld x6,0(x15) + 80000f58: 00878793 addi x15,x15,8 + +0000000080000f5c : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b6: + aes64ks1i x6, x6, 7 # perform operation + 80000f5c: 31731313 aes64ks1i x6,x6,0x7 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknd_aes64ks1i_cg_cmp_rd_rs1_b6, Zknd_aes64ks1i_cg_cmp_rd_rs1_b6_str) + 80000f60: 000cb383 ld x7,0(x25) + 80000f64: 00638c63 beq x7,x6,80000f7c + 80000f68: 2310146f jal x8,80002998 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bf2 .word 0x80009bf2 + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f80: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f84: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x11bae9b401365d45 + 80000f88: 0007b383 ld x7,0(x15) + 80000f8c: 00878793 addi x15,x15,8 + +0000000080000f90 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b7: + aes64ks1i x7, x7, 9 # perform operation + 80000f90: 31939393 aes64ks1i x7,x7,0x9 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zknd_aes64ks1i_cg_cmp_rd_rs1_b7, Zknd_aes64ks1i_cg_cmp_rd_rs1_b7_str) + 80000f94: 000cb203 ld x4,0(x25) + 80000f98: 00720c63 beq x4,x7,80000fb0 + 80000f9c: 1e5012ef jal x5,80002980 + 80000fa0: 80000f90 .word 0x80000f90 + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 80009c2d .word 0x80009c2d + 80000fac: 00000000 .word 0x00000000 + 80000fb0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x3b6ab331cc703811 + 80000fb4: 0007b403 ld x8,0(x15) + 80000fb8: 00878793 addi x15,x15,8 + +0000000080000fbc : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b8: + aes64ks1i x8, x8, 1 # perform operation + 80000fbc: 31141413 aes64ks1i x8,x8,0x1 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zknd_aes64ks1i_cg_cmp_rd_rs1_b8, Zknd_aes64ks1i_cg_cmp_rd_rs1_b8_str) + 80000fc0: 000cb203 ld x4,0(x25) + 80000fc4: 00820c63 beq x4,x8,80000fdc + 80000fc8: 1b9012ef jal x5,80002980 + 80000fcc: 80000fbc .word 0x80000fbc + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 80009c68 .word 0x80009c68 + 80000fd8: 00000000 .word 0x00000000 + 80000fdc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xc625bf6720af94a3 + 80000fe0: 0007b483 ld x9,0(x15) + 80000fe4: 00878793 addi x15,x15,8 + +0000000080000fe8 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b9: + aes64ks1i x9, x9, 5 # perform operation + 80000fe8: 31549493 aes64ks1i x9,x9,0x5 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknd_aes64ks1i_cg_cmp_rd_rs1_b9, Zknd_aes64ks1i_cg_cmp_rd_rs1_b9_str) + 80000fec: 000cb203 ld x4,0(x25) + 80000ff0: 00920c63 beq x4,x9,80001008 + 80000ff4: 18d012ef jal x5,80002980 + 80000ff8: 80000fe8 .word 0x80000fe8 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 80009ca3 .word 0x80009ca3 + 80001004: 00000000 .word 0x00000000 + 80001008: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x62eca1f20053f084 + 8000100c: 0007b503 ld x10,0(x15) + 80001010: 00878793 addi x15,x15,8 + +0000000080001014 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b10: + aes64ks1i x10, x10, 5 # perform operation + 80001014: 31551513 aes64ks1i x10,x10,0x5 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zknd_aes64ks1i_cg_cmp_rd_rs1_b10, Zknd_aes64ks1i_cg_cmp_rd_rs1_b10_str) + 80001018: 000cb203 ld x4,0(x25) + 8000101c: 00a20c63 beq x4,x10,80001034 + 80001020: 161012ef jal x5,80002980 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80009cde .word 0x80009cde + 80001030: 00000000 .word 0x00000000 + 80001034: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xbfe5f5182cb3f0b2 + 80001038: 0007b583 ld x11,0(x15) + 8000103c: 00878793 addi x15,x15,8 + +0000000080001040 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b11: + aes64ks1i x11, x11, 2 # perform operation + 80001040: 31259593 aes64ks1i x11,x11,0x2 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zknd_aes64ks1i_cg_cmp_rd_rs1_b11, Zknd_aes64ks1i_cg_cmp_rd_rs1_b11_str) + 80001044: 000cb203 ld x4,0(x25) + 80001048: 00b20c63 beq x4,x11,80001060 + 8000104c: 135012ef jal x5,80002980 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009d1a .word 0x80009d1a + 8000105c: 00000000 .word 0x00000000 + 80001060: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x882e6537b9306fc4 + 80001064: 0007b603 ld x12,0(x15) + 80001068: 00878793 addi x15,x15,8 + +000000008000106c : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b12: + aes64ks1i x12, x12, 6 # perform operation + 8000106c: 31661613 aes64ks1i x12,x12,0x6 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknd_aes64ks1i_cg_cmp_rd_rs1_b12, Zknd_aes64ks1i_cg_cmp_rd_rs1_b12_str) + 80001070: 000cb203 ld x4,0(x25) + 80001074: 00c20c63 beq x4,x12,8000108c + 80001078: 109012ef jal x5,80002980 + 8000107c: 8000106c .word 0x8000106c + 80001080: 00000000 .word 0x00000000 + 80001084: 80009d56 .word 0x80009d56 + 80001088: 00000000 .word 0x00000000 + 8000108c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x1df98ded8910fe80 + 80001090: 0007b683 ld x13,0(x15) + 80001094: 00878793 addi x15,x15,8 + +0000000080001098 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b13: + aes64ks1i x13, x13, 10 # perform operation + 80001098: 31a69693 aes64ks1i x13,x13,0xa + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknd_aes64ks1i_cg_cmp_rd_rs1_b13, Zknd_aes64ks1i_cg_cmp_rd_rs1_b13_str) + 8000109c: 000cb203 ld x4,0(x25) + 800010a0: 00d20c63 beq x4,x13,800010b8 + 800010a4: 0dd012ef jal x5,80002980 + 800010a8: 80001098 .word 0x80001098 + 800010ac: 00000000 .word 0x00000000 + 800010b0: 80009d92 .word 0x80009d92 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xa56a8fde6377c8e2 + 800010bc: 0007b703 ld x14,0(x15) + 800010c0: 00878793 addi x15,x15,8 + +00000000800010c4 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b14: + aes64ks1i x14, x14, 6 # perform operation + 800010c4: 31671713 aes64ks1i x14,x14,0x6 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknd_aes64ks1i_cg_cmp_rd_rs1_b14, Zknd_aes64ks1i_cg_cmp_rd_rs1_b14_str) + 800010c8: 000cb203 ld x4,0(x25) + 800010cc: 00e20c63 beq x4,x14,800010e4 + 800010d0: 0b1012ef jal x5,80002980 + 800010d4: 800010c4 .word 0x800010c4 + 800010d8: 00000000 .word 0x00000000 + 800010dc: 80009dce .word 0x80009dce + 800010e0: 00000000 .word 0x00000000 + 800010e4: 008c8c93 addi x25,x25,8 + + mv x21, x15 # switch data pointer register to avoid conflict with test + 800010e8: 00078a93 addi x21,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x02408f8d8a5de6e3 + 800010ec: 000ab783 ld x15,0(x21) + 800010f0: 008a8a93 addi x21,x21,8 + +00000000800010f4 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b15: + aes64ks1i x15, x15, 2 # perform operation + 800010f4: 31279793 aes64ks1i x15,x15,0x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknd_aes64ks1i_cg_cmp_rd_rs1_b15, Zknd_aes64ks1i_cg_cmp_rd_rs1_b15_str) + 800010f8: 000cb203 ld x4,0(x25) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 081012ef jal x5,80002980 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e0a .word 0x80009e0a + 80001110: 00000000 .word 0x00000000 + 80001114: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x1df9fcfd65f384a9 + 80001118: 000ab803 ld x16,0(x21) + 8000111c: 008a8a93 addi x21,x21,8 + +0000000080001120 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b16: + aes64ks1i x16, x16, 0 # perform operation + 80001120: 31081813 aes64ks1i x16,x16,0x0 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknd_aes64ks1i_cg_cmp_rd_rs1_b16, Zknd_aes64ks1i_cg_cmp_rd_rs1_b16_str) + 80001124: 000cb203 ld x4,0(x25) + 80001128: 01020c63 beq x4,x16,80001140 + 8000112c: 055012ef jal x5,80002980 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 80009e46 .word 0x80009e46 + 8000113c: 00000000 .word 0x00000000 + 80001140: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x284e6e643ca1b6a6 + 80001144: 000ab883 ld x17,0(x21) + 80001148: 008a8a93 addi x21,x21,8 + +000000008000114c : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b17: + aes64ks1i x17, x17, 9 # perform operation + 8000114c: 31989893 aes64ks1i x17,x17,0x9 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknd_aes64ks1i_cg_cmp_rd_rs1_b17, Zknd_aes64ks1i_cg_cmp_rd_rs1_b17_str) + 80001150: 000cb203 ld x4,0(x25) + 80001154: 01120c63 beq x4,x17,8000116c + 80001158: 029012ef jal x5,80002980 + 8000115c: 8000114c .word 0x8000114c + 80001160: 00000000 .word 0x00000000 + 80001164: 80009e82 .word 0x80009e82 + 80001168: 00000000 .word 0x00000000 + 8000116c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x947dc29303914db9 + 80001170: 000ab903 ld x18,0(x21) + 80001174: 008a8a93 addi x21,x21,8 + +0000000080001178 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b18: + aes64ks1i x18, x18, 2 # perform operation + 80001178: 31291913 aes64ks1i x18,x18,0x2 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknd_aes64ks1i_cg_cmp_rd_rs1_b18, Zknd_aes64ks1i_cg_cmp_rd_rs1_b18_str) + 8000117c: 000cb203 ld x4,0(x25) + 80001180: 01220c63 beq x4,x18,80001198 + 80001184: 7fc012ef jal x5,80002980 + 80001188: 80001178 .word 0x80001178 + 8000118c: 00000000 .word 0x00000000 + 80001190: 80009ebe .word 0x80009ebe + 80001194: 00000000 .word 0x00000000 + 80001198: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc3d97cb5ab270b03 + 8000119c: 000ab983 ld x19,0(x21) + 800011a0: 008a8a93 addi x21,x21,8 + +00000000800011a4 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b19: + aes64ks1i x19, x19, 3 # perform operation + 800011a4: 31399993 aes64ks1i x19,x19,0x3 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes64ks1i_cg_cmp_rd_rs1_b19, Zknd_aes64ks1i_cg_cmp_rd_rs1_b19_str) + 800011a8: 000cb203 ld x4,0(x25) + 800011ac: 01320c63 beq x4,x19,800011c4 + 800011b0: 7d0012ef jal x5,80002980 + 800011b4: 800011a4 .word 0x800011a4 + 800011b8: 00000000 .word 0x00000000 + 800011bc: 80009efa .word 0x80009efa + 800011c0: 00000000 .word 0x00000000 + 800011c4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x3ca62d9b73e9bfe6 + 800011c8: 000aba03 ld x20,0(x21) + 800011cc: 008a8a93 addi x21,x21,8 + +00000000800011d0 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b20: + aes64ks1i x20, x20, 5 # perform operation + 800011d0: 315a1a13 aes64ks1i x20,x20,0x5 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknd_aes64ks1i_cg_cmp_rd_rs1_b20, Zknd_aes64ks1i_cg_cmp_rd_rs1_b20_str) + 800011d4: 000cb203 ld x4,0(x25) + 800011d8: 01420c63 beq x4,x20,800011f0 + 800011dc: 7a4012ef jal x5,80002980 + 800011e0: 800011d0 .word 0x800011d0 + 800011e4: 00000000 .word 0x00000000 + 800011e8: 80009f37 .word 0x80009f37 + 800011ec: 00000000 .word 0x00000000 + 800011f0: 008c8c93 addi x25,x25,8 + + mv x31, x21 # switch data pointer register to avoid conflict with test + 800011f4: 000a8f93 addi x31,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xb623909821bf7f76 + 800011f8: 000fba83 ld x21,0(x31) + 800011fc: 008f8f93 addi x31,x31,8 + +0000000080001200 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b21: + aes64ks1i x21, x21, 9 # perform operation + 80001200: 319a9a93 aes64ks1i x21,x21,0x9 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknd_aes64ks1i_cg_cmp_rd_rs1_b21, Zknd_aes64ks1i_cg_cmp_rd_rs1_b21_str) + 80001204: 000cb203 ld x4,0(x25) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 774012ef jal x5,80002980 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f74 .word 0x80009f74 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x19fee6670abfcb07 + 80001224: 000fbb03 ld x22,0(x31) + 80001228: 008f8f93 addi x31,x31,8 + +000000008000122c : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b22: + aes64ks1i x22, x22, 2 # perform operation + 8000122c: 312b1b13 aes64ks1i x22,x22,0x2 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknd_aes64ks1i_cg_cmp_rd_rs1_b22, Zknd_aes64ks1i_cg_cmp_rd_rs1_b22_str) + 80001230: 000cb203 ld x4,0(x25) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 748012ef jal x5,80002980 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fb1 .word 0x80009fb1 + 80001248: 00000000 .word 0x00000000 + 8000124c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x529ea7adec3a03a5 + 80001250: 000fbb83 ld x23,0(x31) + 80001254: 008f8f93 addi x31,x31,8 + +0000000080001258 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b23: + aes64ks1i x23, x23, 0 # perform operation + 80001258: 310b9b93 aes64ks1i x23,x23,0x0 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes64ks1i_cg_cmp_rd_rs1_b23, Zknd_aes64ks1i_cg_cmp_rd_rs1_b23_str) + 8000125c: 000cb203 ld x4,0(x25) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 71c012ef jal x5,80002980 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009fee .word 0x80009fee + 80001274: 00000000 .word 0x00000000 + 80001278: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x9ab8de4c584ed532 + 8000127c: 000fbc03 ld x24,0(x31) + 80001280: 008f8f93 addi x31,x31,8 + +0000000080001284 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b24: + aes64ks1i x24, x24, 10 # perform operation + 80001284: 31ac1c13 aes64ks1i x24,x24,0xa + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknd_aes64ks1i_cg_cmp_rd_rs1_b24, Zknd_aes64ks1i_cg_cmp_rd_rs1_b24_str) + 80001288: 000cb203 ld x4,0(x25) + 8000128c: 01820c63 beq x4,x24,800012a4 + 80001290: 6f0012ef jal x5,80002980 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000a02b .word 0x8000a02b + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008c8c93 addi x25,x25,8 + + mv x16, x25 # switch signature pointer register to avoid conflict with test + 800012a8: 000c8813 addi x16,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xaaf8b188de588526 + 800012ac: 000fbc83 ld x25,0(x31) + 800012b0: 008f8f93 addi x31,x31,8 + +00000000800012b4 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b25: + aes64ks1i x25, x25, 2 # perform operation + 800012b4: 312c9c93 aes64ks1i x25,x25,0x2 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zknd_aes64ks1i_cg_cmp_rd_rs1_b25, Zknd_aes64ks1i_cg_cmp_rd_rs1_b25_str) + 800012b8: 00083203 ld x4,0(x16) + 800012bc: 01920c63 beq x4,x25,800012d4 + 800012c0: 6c0012ef jal x5,80002980 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 8000a068 .word 0x8000a068 + 800012d0: 00000000 .word 0x00000000 + 800012d4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x2af5cd725e4c7a56 + 800012d8: 000fbd03 ld x26,0(x31) + 800012dc: 008f8f93 addi x31,x31,8 + +00000000800012e0 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b26: + aes64ks1i x26, x26, 2 # perform operation + 800012e0: 312d1d13 aes64ks1i x26,x26,0x2 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zknd_aes64ks1i_cg_cmp_rd_rs1_b26, Zknd_aes64ks1i_cg_cmp_rd_rs1_b26_str) + 800012e4: 00083203 ld x4,0(x16) + 800012e8: 01a20c63 beq x4,x26,80001300 + 800012ec: 694012ef jal x5,80002980 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0a5 .word 0x8000a0a5 + 800012fc: 00000000 .word 0x00000000 + 80001300: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xef111543fce81865 + 80001304: 000fbd83 ld x27,0(x31) + 80001308: 008f8f93 addi x31,x31,8 + +000000008000130c : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b27: + aes64ks1i x27, x27, 0 # perform operation + 8000130c: 310d9d93 aes64ks1i x27,x27,0x0 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zknd_aes64ks1i_cg_cmp_rd_rs1_b27, Zknd_aes64ks1i_cg_cmp_rd_rs1_b27_str) + 80001310: 00083203 ld x4,0(x16) + 80001314: 01b20c63 beq x4,x27,8000132c + 80001318: 668012ef jal x5,80002980 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0e2 .word 0x8000a0e2 + 80001328: 00000000 .word 0x00000000 + 8000132c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x742bf4ec0afef81c + 80001330: 000fbe03 ld x28,0(x31) + 80001334: 008f8f93 addi x31,x31,8 + +0000000080001338 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b28: + aes64ks1i x28, x28, 1 # perform operation + 80001338: 311e1e13 aes64ks1i x28,x28,0x1 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zknd_aes64ks1i_cg_cmp_rd_rs1_b28, Zknd_aes64ks1i_cg_cmp_rd_rs1_b28_str) + 8000133c: 00083203 ld x4,0(x16) + 80001340: 01c20c63 beq x4,x28,80001358 + 80001344: 63c012ef jal x5,80002980 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a11f .word 0x8000a11f + 80001354: 00000000 .word 0x00000000 + 80001358: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x62a8a533f026e74c + 8000135c: 000fbe83 ld x29,0(x31) + 80001360: 008f8f93 addi x31,x31,8 + +0000000080001364 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b29: + aes64ks1i x29, x29, 8 # perform operation + 80001364: 318e9e93 aes64ks1i x29,x29,0x8 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ks1i_cg_cmp_rd_rs1_b29, Zknd_aes64ks1i_cg_cmp_rd_rs1_b29_str) + 80001368: 00083203 ld x4,0(x16) + 8000136c: 01d20c63 beq x4,x29,80001384 + 80001370: 610012ef jal x5,80002980 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000a15c .word 0x8000a15c + 80001380: 00000000 .word 0x00000000 + 80001384: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x2009125954053447 + 80001388: 000fbf03 ld x30,0(x31) + 8000138c: 008f8f93 addi x31,x31,8 + +0000000080001390 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b30: + aes64ks1i x30, x30, 1 # perform operation + 80001390: 311f1f13 aes64ks1i x30,x30,0x1 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zknd_aes64ks1i_cg_cmp_rd_rs1_b30, Zknd_aes64ks1i_cg_cmp_rd_rs1_b30_str) + 80001394: 00083203 ld x4,0(x16) + 80001398: 01e20c63 beq x4,x30,800013b0 + 8000139c: 5e4012ef jal x5,80002980 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000a199 .word 0x8000a199 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00880813 addi x16,x16,8 + + mv x3, x31 # switch data pointer register to avoid conflict with test + 800013b4: 000f8193 addi x3,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x46e8dc908c699c12 + 800013b8: 0001bf83 ld x31,0(x3) + 800013bc: 00818193 addi x3,x3,8 + +00000000800013c0 : +Zknd_aes64ks1i_cg_cmp_rd_rs1_b31: + aes64ks1i x31, x31, 6 # perform operation + 800013c0: 316f9f93 aes64ks1i x31,x31,0x6 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ks1i_cg_cmp_rd_rs1_b31, Zknd_aes64ks1i_cg_cmp_rd_rs1_b31_str) + 800013c4: 00083203 ld x4,0(x16) + 800013c8: 01f20c63 beq x4,x31,800013e0 + 800013cc: 5b4012ef jal x5,80002980 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000a1d6 .word 0x8000a1d6 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00880813 addi x16,x16,8 +///////////////////////////////// +// cp_rnum +///////////////////////////////// + +# Testcase cp_rnum: rnum=0 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x4bd0c82b37139fa8 + 800013e4: 0001b303 ld x6,0(x3) + 800013e8: 00818193 addi x3,x3,8 + +00000000800013ec : +Zknd_aes64ks1i_cg_cp_rnum_b0: + aes64ks1i x29, x6, 0 # perform operation + 800013ec: 31031e93 aes64ks1i x29,x6,0x0 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zknd_aes64ks1i_cg_cp_rnum_b0, Zknd_aes64ks1i_cg_cp_rnum_b0_str) + 800013f0: 00083203 ld x4,0(x16) + 800013f4: 01d20c63 beq x4,x29,8000140c + 800013f8: 588012ef jal x5,80002980 + 800013fc: 800013ec .word 0x800013ec + 80001400: 00000000 .word 0x00000000 + 80001404: 8000a213 .word 0x8000a213 + 80001408: 00000000 .word 0x00000000 + 8000140c: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=1 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x790b155b0167264c + 80001410: 0001b083 ld x1,0(x3) + 80001414: 00818193 addi x3,x3,8 + +0000000080001418 : +Zknd_aes64ks1i_cg_cp_rnum_b1: + aes64ks1i x21, x1, 1 # perform operation + 80001418: 31109a93 aes64ks1i x21,x1,0x1 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zknd_aes64ks1i_cg_cp_rnum_b1, Zknd_aes64ks1i_cg_cp_rnum_b1_str) + 8000141c: 00083203 ld x4,0(x16) + 80001420: 01520c63 beq x4,x21,80001438 + 80001424: 55c012ef jal x5,80002980 + 80001428: 80001418 .word 0x80001418 + 8000142c: 00000000 .word 0x00000000 + 80001430: 8000a24c .word 0x8000a24c + 80001434: 00000000 .word 0x00000000 + 80001438: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=2 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xed8c4684e211d2ed + 8000143c: 0001bc83 ld x25,0(x3) + 80001440: 00818193 addi x3,x3,8 + +0000000080001444 : +Zknd_aes64ks1i_cg_cp_rnum_b2: + aes64ks1i x22, x25, 2 # perform operation + 80001444: 312c9b13 aes64ks1i x22,x25,0x2 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zknd_aes64ks1i_cg_cp_rnum_b2, Zknd_aes64ks1i_cg_cp_rnum_b2_str) + 80001448: 00083203 ld x4,0(x16) + 8000144c: 01620c63 beq x4,x22,80001464 + 80001450: 530012ef jal x5,80002980 + 80001454: 80001444 .word 0x80001444 + 80001458: 00000000 .word 0x00000000 + 8000145c: 8000a285 .word 0x8000a285 + 80001460: 00000000 .word 0x00000000 + 80001464: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=3 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaa6982ba4a758dc2 + 80001468: 0001b483 ld x9,0(x3) + 8000146c: 00818193 addi x3,x3,8 + +0000000080001470 : +Zknd_aes64ks1i_cg_cp_rnum_b3: + aes64ks1i x19, x9, 3 # perform operation + 80001470: 31349993 aes64ks1i x19,x9,0x3 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zknd_aes64ks1i_cg_cp_rnum_b3, Zknd_aes64ks1i_cg_cp_rnum_b3_str) + 80001474: 00083203 ld x4,0(x16) + 80001478: 01320c63 beq x4,x19,80001490 + 8000147c: 504012ef jal x5,80002980 + 80001480: 80001470 .word 0x80001470 + 80001484: 00000000 .word 0x00000000 + 80001488: 8000a2be .word 0x8000a2be + 8000148c: 00000000 .word 0x00000000 + 80001490: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xe9bfe18a2b30a930 + 80001494: 0001b603 ld x12,0(x3) + 80001498: 00818193 addi x3,x3,8 + +000000008000149c : +Zknd_aes64ks1i_cg_cp_rnum_b4: + aes64ks1i x15, x12, 4 # perform operation + 8000149c: 31461793 aes64ks1i x15,x12,0x4 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zknd_aes64ks1i_cg_cp_rnum_b4, Zknd_aes64ks1i_cg_cp_rnum_b4_str) + 800014a0: 00083203 ld x4,0(x16) + 800014a4: 00f20c63 beq x4,x15,800014bc + 800014a8: 4d8012ef jal x5,80002980 + 800014ac: 8000149c .word 0x8000149c + 800014b0: 00000000 .word 0x00000000 + 800014b4: 8000a2f7 .word 0x8000a2f7 + 800014b8: 00000000 .word 0x00000000 + 800014bc: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=5 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x627a06faa93a2abb + 800014c0: 0001bb03 ld x22,0(x3) + 800014c4: 00818193 addi x3,x3,8 + +00000000800014c8 : +Zknd_aes64ks1i_cg_cp_rnum_b5: + aes64ks1i x31, x22, 5 # perform operation + 800014c8: 315b1f93 aes64ks1i x31,x22,0x5 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknd_aes64ks1i_cg_cp_rnum_b5, Zknd_aes64ks1i_cg_cp_rnum_b5_str) + 800014cc: 00083203 ld x4,0(x16) + 800014d0: 01f20c63 beq x4,x31,800014e8 + 800014d4: 4ac012ef jal x5,80002980 + 800014d8: 800014c8 .word 0x800014c8 + 800014dc: 00000000 .word 0x00000000 + 800014e0: 8000a330 .word 0x8000a330 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=6 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x14190e10234b251d + 800014ec: 0001ba83 ld x21,0(x3) + 800014f0: 00818193 addi x3,x3,8 + +00000000800014f4 : +Zknd_aes64ks1i_cg_cp_rnum_b6: + aes64ks1i x12, x21, 6 # perform operation + 800014f4: 316a9613 aes64ks1i x12,x21,0x6 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zknd_aes64ks1i_cg_cp_rnum_b6, Zknd_aes64ks1i_cg_cp_rnum_b6_str) + 800014f8: 00083203 ld x4,0(x16) + 800014fc: 00c20c63 beq x4,x12,80001514 + 80001500: 480012ef jal x5,80002980 + 80001504: 800014f4 .word 0x800014f4 + 80001508: 00000000 .word 0x00000000 + 8000150c: 8000a369 .word 0x8000a369 + 80001510: 00000000 .word 0x00000000 + 80001514: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=7 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xe7ec2f681c3f19ca + 80001518: 0001ba83 ld x21,0(x3) + 8000151c: 00818193 addi x3,x3,8 + +0000000080001520 : +Zknd_aes64ks1i_cg_cp_rnum_b7: + aes64ks1i x0, x21, 7 # perform operation + 80001520: 317a9013 aes64ks1i x0,x21,0x7 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zknd_aes64ks1i_cg_cp_rnum_b7, Zknd_aes64ks1i_cg_cp_rnum_b7_str) + 80001524: 00083203 ld x4,0(x16) + 80001528: 00020c63 beq x4,x0,80001540 + 8000152c: 454012ef jal x5,80002980 + 80001530: 80001520 .word 0x80001520 + 80001534: 00000000 .word 0x00000000 + 80001538: 8000a3a2 .word 0x8000a3a2 + 8000153c: 00000000 .word 0x00000000 + 80001540: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x688b71252c03b182 + 80001544: 0001bd03 ld x26,0(x3) + 80001548: 00818193 addi x3,x3,8 + +000000008000154c : +Zknd_aes64ks1i_cg_cp_rnum_b8: + aes64ks1i x2, x26, 8 # perform operation + 8000154c: 318d1113 aes64ks1i x2,x26,0x8 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknd_aes64ks1i_cg_cp_rnum_b8, Zknd_aes64ks1i_cg_cp_rnum_b8_str) + 80001550: 00083203 ld x4,0(x16) + 80001554: 00220c63 beq x4,x2,8000156c + 80001558: 428012ef jal x5,80002980 + 8000155c: 8000154c .word 0x8000154c + 80001560: 00000000 .word 0x00000000 + 80001564: 8000a3db .word 0x8000a3db + 80001568: 00000000 .word 0x00000000 + 8000156c: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=9 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xf5414f06a265a6b6 + 80001570: 0001ba03 ld x20,0(x3) + 80001574: 00818193 addi x3,x3,8 + +0000000080001578 : +Zknd_aes64ks1i_cg_cp_rnum_b9: + aes64ks1i x18, x20, 9 # perform operation + 80001578: 319a1913 aes64ks1i x18,x20,0x9 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zknd_aes64ks1i_cg_cp_rnum_b9, Zknd_aes64ks1i_cg_cp_rnum_b9_str) + 8000157c: 00083203 ld x4,0(x16) + 80001580: 01220c63 beq x4,x18,80001598 + 80001584: 3fc012ef jal x5,80002980 + 80001588: 80001578 .word 0x80001578 + 8000158c: 00000000 .word 0x00000000 + 80001590: 8000a414 .word 0x8000a414 + 80001594: 00000000 .word 0x00000000 + 80001598: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=10 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x6f135407eb2e44e5 + 8000159c: 0001b503 ld x10,0(x3) + 800015a0: 00818193 addi x3,x3,8 + +00000000800015a4 : +Zknd_aes64ks1i_cg_cp_rnum_b10: + aes64ks1i x2, x10, 10 # perform operation + 800015a4: 31a51113 aes64ks1i x2,x10,0xa + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zknd_aes64ks1i_cg_cp_rnum_b10, Zknd_aes64ks1i_cg_cp_rnum_b10_str) + 800015a8: 00083203 ld x4,0(x16) + 800015ac: 00220c63 beq x4,x2,800015c4 + 800015b0: 3d0012ef jal x5,80002980 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000a44d .word 0x8000a44d + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00880813 addi x16,x16,8 + + mv x2, x16 # restore signature pointer to default register for teardown + 800015c8: 00080113 addi x2,x16,0 + +00000000800015cc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800015cc: 00000513 addi x10,x0,0 + 800015d0: 00000073 ecall + 800015d4: fff00513 addi x10,x0,-1 + 800015d8: 25800413 addi x8,x0,600 + +00000000800015dc : + 800015dc: 34002373 csrrs x6,mscratch,x0 + +00000000800015e0 : + 800015e0: 2b833383 ld x7,696(x6) + +00000000800015e4 : + 800015e4: 2a033383 ld x7,672(x6) + +00000000800015e8 : + 800015e8: 2d033483 ld x9,720(x6) + 800015ec: 34049073 csrrw x0,mscratch,x9 + +00000000800015f0 : + 800015f0: 2c833483 ld x9,712(x6) + 800015f4: 305493f3 csrrw x7,mtvec,x9 + 800015f8: ffc4f493 andi x9,x9,-4 + 800015fc: ffc3f393 andi x7,x7,-4 + 80001600: 00749e63 bne x9,x7,8000161c + +0000000080001604 : + 80001604: 00030493 addi x9,x6,0 + +0000000080001608 : + 80001608: 0004a783 lw x15,0(x9) + 8000160c: 00f3a023 sw x15,0(x7) + 80001610: 00438393 addi x7,x7,4 + 80001614: 00448493 addi x9,x9,4 + 80001618: fe83c8e3 blt x7,x8,80001608 + 8000161c: 0000100f fence.i + +0000000080001620 : + 80001620: 00000497 auipc x9,0x0 + 80001624: 2b048493 addi x9,x9,688 # 800018d0 + 80001628: 00000013 addi x0,x0,0 + 8000162c: 00000013 addi x0,x0,0 + 80001630: 00000013 addi x0,x0,0 + 80001634: 00000013 addi x0,x0,0 + 80001638: 00000013 addi x0,x0,0 + 8000163c: 00000013 addi x0,x0,0 + 80001640: 10e49863 bne x9,x14,80001750 + 80001644: 00000013 addi x0,x0,0 + 80001648: 00000013 addi x0,x0,0 + 8000164c: 00000013 addi x0,x0,0 + 80001650: 00000013 addi x0,x0,0 + 80001654: 00000013 addi x0,x0,0 + 80001658: 00000013 addi x0,x0,0 + 8000165c: 00000013 addi x0,x0,0 + 80001660: 00009517 auipc x10,0x9 + 80001664: 55350513 addi x10,x10,1363 # 8000abb3 + 80001668: 00000013 addi x0,x0,0 + 8000166c: 00000013 addi x0,x0,0 + 80001670: 00000013 addi x0,x0,0 + 80001674: 00000013 addi x0,x0,0 + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00029097 auipc x1,0x29 + 80001684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00009517 auipc x10,0x9 + 800016a4: 55150513 addi x10,x10,1361 # 8000abf1 + 800016a8: 00000013 addi x0,x0,0 + 800016ac: 00000013 addi x0,x0,0 + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00029097 auipc x1,0x29 + 800016c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00009517 auipc x10,0x9 + 800016e4: 57150513 addi x10,x10,1393 # 8000ac51 + 800016e8: 00000013 addi x0,x0,0 + 800016ec: 00000013 addi x0,x0,0 + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00029097 auipc x1,0x29 + 80001704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: 0000a517 auipc x10,0xa + 80001724: 0dc50513 addi x10,x10,220 # 8000b7fc + 80001728: 00000013 addi x0,x0,0 + 8000172c: 00000013 addi x0,x0,0 + 80001730: 00000013 addi x0,x0,0 + 80001734: 00000013 addi x0,x0,0 + 80001738: 00000013 addi x0,x0,0 + 8000173c: 00000013 addi x0,x0,0 + 80001740: 00029097 auipc x1,0x29 + 80001744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80001748: 00029097 auipc x1,0x29 + 8000174c: ebc080e7 jalr x1,-324(x1) # 8002a604 + +0000000080001750 : + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00007317 auipc x6,0x7 + 80001764: c4830313 addi x6,x6,-952 # 800083a8 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + 80001780: 00033303 ld x6,0(x6) + 80001784: 00000013 addi x0,x0,0 + 80001788: 00000013 addi x0,x0,0 + 8000178c: 00000013 addi x0,x0,0 + 80001790: 00000013 addi x0,x0,0 + 80001794: 00000013 addi x0,x0,0 + 80001798: 00000013 addi x0,x0,0 + 8000179c: 00000013 addi x0,x0,0 + 800017a0: 0000b397 auipc x7,0xb + 800017a4: f2838393 addi x7,x7,-216 # 8000c6c8 + 800017a8: 00000013 addi x0,x0,0 + 800017ac: 00000013 addi x0,x0,0 + 800017b0: 00000013 addi x0,x0,0 + 800017b4: 00000013 addi x0,x0,0 + 800017b8: 00000013 addi x0,x0,0 + 800017bc: 00000013 addi x0,x0,0 + 800017c0: 40730333 sub x6,x6,x7 + 800017c4: 00000013 addi x0,x0,0 + 800017c8: 00000013 addi x0,x0,0 + 800017cc: 00000013 addi x0,x0,0 + 800017d0: 00000013 addi x0,x0,0 + 800017d4: 00000013 addi x0,x0,0 + 800017d8: 00000013 addi x0,x0,0 + 800017dc: 00000013 addi x0,x0,0 + 800017e0: 0000b417 auipc x8,0xb + 800017e4: ed840413 addi x8,x8,-296 # 8000c6b8 + 800017e8: 00000013 addi x0,x0,0 + 800017ec: 00000013 addi x0,x0,0 + 800017f0: 00000013 addi x0,x0,0 + 800017f4: 00000013 addi x0,x0,0 + 800017f8: 00000013 addi x0,x0,0 + 800017fc: 00000013 addi x0,x0,0 + 80001800: 00043203 ld x4,0(x8) + 80001804: 00620c63 beq x4,x6,8000181c + 80001808: 1e0013ef jal x7,800029e8 + 8000180c: 80001750 .word 0x80001750 + 80001810: 00000000 .word 0x00000000 + 80001814: 8000ada5 .word 0x8000ada5 + 80001818: 00000000 .word 0x00000000 + +000000008000181c : + 8000181c: 000004b7 lui x9,0x0 + 80001820: 00048493 addi x9,x9,0 # 0 + 80001824: 00b49493 slli x9,x9,0xb + 80001828: 5d648493 addi x9,x9,1494 + 8000182c: 00b49493 slli x9,x9,0xb + 80001830: 43748493 addi x9,x9,1079 + 80001834: 00a49493 slli x9,x9,0xa + 80001838: 2ad48493 addi x9,x9,685 + 8000183c: 00e49e63 bne x9,x14,80001858 + 80001840: 1a8013ef jal x7,800029e8 + 80001844: 80001904 .word 0x80001904 + 80001848: 00000000 .word 0x00000000 + 8000184c: 8000ac13 .word 0x8000ac13 + 80001850: 00000000 .word 0x00000000 + 80001854: 00000341 .word 0x00000341 + +0000000080001858 : + 80001858: 00000013 addi x0,x0,0 + 8000185c: 00000013 addi x0,x0,0 + 80001860: 00009517 auipc x10,0x9 + 80001864: 31450513 addi x10,x10,788 # 8000ab74 + 80001868: 00000013 addi x0,x0,0 + 8000186c: 00000013 addi x0,x0,0 + 80001870: 00000013 addi x0,x0,0 + 80001874: 00000013 addi x0,x0,0 + 80001878: 00000013 addi x0,x0,0 + 8000187c: 00000013 addi x0,x0,0 + 80001880: 00029097 auipc x1,0x29 + 80001884: d24080e7 jalr x1,-732(x1) # 8002a5a4 + 80001888: 00029097 auipc x1,0x29 + 8000188c: d5c080e7 jalr x1,-676(x1) # 8002a5e4 + +0000000080001890 : + 80001890: 00000013 addi x0,x0,0 + 80001894: 00000013 addi x0,x0,0 + 80001898: 00000013 addi x0,x0,0 + 8000189c: 00000013 addi x0,x0,0 + 800018a0: 00009517 auipc x10,0x9 + 800018a4: 31350513 addi x10,x10,787 # 8000abb3 + 800018a8: 00000013 addi x0,x0,0 + 800018ac: 00000013 addi x0,x0,0 + 800018b0: 00000013 addi x0,x0,0 + 800018b4: 00000013 addi x0,x0,0 + 800018b8: 00000013 addi x0,x0,0 + 800018bc: 00000013 addi x0,x0,0 + 800018c0: 00029097 auipc x1,0x29 + 800018c4: ce4080e7 jalr x1,-796(x1) # 8002a5a4 + 800018c8: 00029097 auipc x1,0x29 + 800018cc: d3c080e7 jalr x1,-708(x1) # 8002a604 + +00000000800018d0 : + 800018d0: 00000013 addi x0,x0,0 + 800018d4: 00000013 addi x0,x0,0 + 800018d8: 00000013 addi x0,x0,0 + 800018dc: 00000013 addi x0,x0,0 + 800018e0: 00000717 auipc x14,0x0 + 800018e4: ff070713 addi x14,x14,-16 # 800018d0 + 800018e8: 00000013 addi x0,x0,0 + 800018ec: 00000013 addi x0,x0,0 + 800018f0: 00000013 addi x0,x0,0 + 800018f4: 00000013 addi x0,x0,0 + 800018f8: 00000013 addi x0,x0,0 + 800018fc: 00000013 addi x0,x0,0 + 80001900: ccdff06f jal x0,800015cc + +0000000080001904 : + 80001904: 00000737 lui x14,0x0 + 80001908: 00070713 addi x14,x14,0 # 0 + 8000190c: 00b71713 slli x14,x14,0xb + 80001910: 5d670713 addi x14,x14,1494 + 80001914: 00b71713 slli x14,x14,0xb + 80001918: 43770713 addi x14,x14,1079 + 8000191c: 00a71713 slli x14,x14,0xa + 80001920: 2ad70713 addi x14,x14,685 + 80001924: ca9ff06f jal x0,800015cc + 80001928: 00000013 addi x0,x0,0 + 8000192c: 00000013 addi x0,x0,0 + 80001930: 00000013 addi x0,x0,0 + 80001934: 00000013 addi x0,x0,0 + 80001938: 00000013 addi x0,x0,0 + 8000193c: 00000013 addi x0,x0,0 + +0000000080001940 : + 80001940: 1000006f jal x0,80001a40 + 80001944: 1080006f jal x0,80001a4c + 80001948: 1100006f jal x0,80001a58 + 8000194c: 1180006f jal x0,80001a64 + 80001950: 1200006f jal x0,80001a70 + 80001954: 1280006f jal x0,80001a7c + 80001958: 1300006f jal x0,80001a88 + 8000195c: 1380006f jal x0,80001a94 + 80001960: 1400006f jal x0,80001aa0 + 80001964: 1480006f jal x0,80001aac + 80001968: 1500006f jal x0,80001ab8 + 8000196c: 1580006f jal x0,80001ac4 + 80001970: 1600006f jal x0,80001ad0 + 80001974: 1680006f jal x0,80001adc + 80001978: 1700006f jal x0,80001ae8 + 8000197c: 1780006f jal x0,80001af4 + 80001980: 1800006f jal x0,80001b00 + 80001984: 1880006f jal x0,80001b0c + 80001988: 1900006f jal x0,80001b18 + 8000198c: 1980006f jal x0,80001b24 + 80001990: 1a00006f jal x0,80001b30 + 80001994: 1a80006f jal x0,80001b3c + 80001998: 1b00006f jal x0,80001b48 + 8000199c: 1b80006f jal x0,80001b54 + 800019a0: 1c00006f jal x0,80001b60 + 800019a4: 1bc0006f jal x0,80001b60 + 800019a8: 1b80006f jal x0,80001b60 + 800019ac: 1b40006f jal x0,80001b60 + 800019b0: 1b00006f jal x0,80001b60 + 800019b4: 1ac0006f jal x0,80001b60 + 800019b8: 1a80006f jal x0,80001b60 + 800019bc: 1a40006f jal x0,80001b60 + 800019c0: 1a00006f jal x0,80001b60 + 800019c4: 19c0006f jal x0,80001b60 + 800019c8: 1980006f jal x0,80001b60 + 800019cc: 1940006f jal x0,80001b60 + 800019d0: 1900006f jal x0,80001b60 + 800019d4: 18c0006f jal x0,80001b60 + 800019d8: 1880006f jal x0,80001b60 + 800019dc: 1840006f jal x0,80001b60 + 800019e0: 1800006f jal x0,80001b60 + 800019e4: 17c0006f jal x0,80001b60 + 800019e8: 1780006f jal x0,80001b60 + 800019ec: 1740006f jal x0,80001b60 + 800019f0: 1700006f jal x0,80001b60 + 800019f4: 16c0006f jal x0,80001b60 + 800019f8: 1680006f jal x0,80001b60 + 800019fc: 1640006f jal x0,80001b60 + 80001a00: 1600006f jal x0,80001b60 + 80001a04: 15c0006f jal x0,80001b60 + 80001a08: 1580006f jal x0,80001b60 + 80001a0c: 1540006f jal x0,80001b60 + 80001a10: 1500006f jal x0,80001b60 + 80001a14: 14c0006f jal x0,80001b60 + 80001a18: 1480006f jal x0,80001b60 + 80001a1c: 1440006f jal x0,80001b60 + 80001a20: 1400006f jal x0,80001b60 + 80001a24: 13c0006f jal x0,80001b60 + 80001a28: 1380006f jal x0,80001b60 + 80001a2c: 1340006f jal x0,80001b60 + 80001a30: 1300006f jal x0,80001b60 + 80001a34: 12c0006f jal x0,80001b60 + 80001a38: 1280006f jal x0,80001b60 + 80001a3c: 1240006f jal x0,80001b60 + +0000000080001a40 : + 80001a40: 34011173 csrrw x2,mscratch,x2 + 80001a44: 30f13423 sd x15,776(x2) + 80001a48: 13c007ef jal x15,80001b84 + 80001a4c: 34011173 csrrw x2,mscratch,x2 + 80001a50: 30f13423 sd x15,776(x2) + 80001a54: 130007ef jal x15,80001b84 + 80001a58: 34011173 csrrw x2,mscratch,x2 + 80001a5c: 30f13423 sd x15,776(x2) + 80001a60: 124007ef jal x15,80001b84 + 80001a64: 34011173 csrrw x2,mscratch,x2 + 80001a68: 30f13423 sd x15,776(x2) + 80001a6c: 118007ef jal x15,80001b84 + 80001a70: 34011173 csrrw x2,mscratch,x2 + 80001a74: 30f13423 sd x15,776(x2) + 80001a78: 10c007ef jal x15,80001b84 + 80001a7c: 34011173 csrrw x2,mscratch,x2 + 80001a80: 30f13423 sd x15,776(x2) + 80001a84: 100007ef jal x15,80001b84 + 80001a88: 34011173 csrrw x2,mscratch,x2 + 80001a8c: 30f13423 sd x15,776(x2) + 80001a90: 0f4007ef jal x15,80001b84 + 80001a94: 34011173 csrrw x2,mscratch,x2 + 80001a98: 30f13423 sd x15,776(x2) + 80001a9c: 0e8007ef jal x15,80001b84 + 80001aa0: 34011173 csrrw x2,mscratch,x2 + 80001aa4: 30f13423 sd x15,776(x2) + 80001aa8: 0dc007ef jal x15,80001b84 + 80001aac: 34011173 csrrw x2,mscratch,x2 + 80001ab0: 30f13423 sd x15,776(x2) + 80001ab4: 0d0007ef jal x15,80001b84 + 80001ab8: 34011173 csrrw x2,mscratch,x2 + 80001abc: 30f13423 sd x15,776(x2) + 80001ac0: 0c4007ef jal x15,80001b84 + 80001ac4: 34011173 csrrw x2,mscratch,x2 + 80001ac8: 30f13423 sd x15,776(x2) + 80001acc: 0b8007ef jal x15,80001b84 + 80001ad0: 34011173 csrrw x2,mscratch,x2 + 80001ad4: 30f13423 sd x15,776(x2) + 80001ad8: 0ac007ef jal x15,80001b84 + 80001adc: 34011173 csrrw x2,mscratch,x2 + 80001ae0: 30f13423 sd x15,776(x2) + 80001ae4: 0a0007ef jal x15,80001b84 + 80001ae8: 34011173 csrrw x2,mscratch,x2 + 80001aec: 30f13423 sd x15,776(x2) + 80001af0: 094007ef jal x15,80001b84 + 80001af4: 34011173 csrrw x2,mscratch,x2 + 80001af8: 30f13423 sd x15,776(x2) + 80001afc: 088007ef jal x15,80001b84 + 80001b00: 34011173 csrrw x2,mscratch,x2 + 80001b04: 30f13423 sd x15,776(x2) + 80001b08: 07c007ef jal x15,80001b84 + 80001b0c: 34011173 csrrw x2,mscratch,x2 + 80001b10: 30f13423 sd x15,776(x2) + 80001b14: 070007ef jal x15,80001b84 + 80001b18: 34011173 csrrw x2,mscratch,x2 + 80001b1c: 30f13423 sd x15,776(x2) + 80001b20: 064007ef jal x15,80001b84 + 80001b24: 34011173 csrrw x2,mscratch,x2 + 80001b28: 30f13423 sd x15,776(x2) + 80001b2c: 058007ef jal x15,80001b84 + 80001b30: 34011173 csrrw x2,mscratch,x2 + 80001b34: 30f13423 sd x15,776(x2) + 80001b38: 04c007ef jal x15,80001b84 + 80001b3c: 34011173 csrrw x2,mscratch,x2 + 80001b40: 30f13423 sd x15,776(x2) + 80001b44: 040007ef jal x15,80001b84 + 80001b48: 34011173 csrrw x2,mscratch,x2 + 80001b4c: 30f13423 sd x15,776(x2) + 80001b50: 034007ef jal x15,80001b84 + 80001b54: 34011173 csrrw x2,mscratch,x2 + 80001b58: 30f13423 sd x15,776(x2) + 80001b5c: 028007ef jal x15,80001b84 + +0000000080001b60 : + 80001b60: 00000317 auipc x6,0x0 + 80001b64: ac030313 addi x6,x6,-1344 # 80001620 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00030067 jalr x0,0(x6) + +0000000080001b84 : + 80001b84: 30e13023 sd x14,768(x2) + 80001b88: 34011773 csrrw x14,mscratch,x2 + 80001b8c: 30e13823 sd x14,784(x2) + 80001b90: 2b013703 ld x14,688(x2) + 80001b94: 00070067 jalr x0,0(x14) + +0000000080001b98 : + 80001b98: 2e913c23 sd x9,760(x2) + 80001b9c: 2e813823 sd x8,752(x2) + 80001ba0: 2e713423 sd x7,744(x2) + 80001ba4: 2e613023 sd x6,736(x2) + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00006317 auipc x6,0x6 + 80001bc4: 54830313 addi x6,x6,1352 # 80008108 + 80001bc8: 00000013 addi x0,x0,0 + 80001bcc: 00000013 addi x0,x0,0 + 80001bd0: 00000013 addi x0,x0,0 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00033383 ld x7,0(x6) + 80001be4: 00138393 addi x7,x7,1 + 80001be8: 00733023 sd x7,0(x6) + 80001bec: 34202773 csrrs x14,mcause,x0 + +0000000080001bf0 : + 80001bf0: fff00493 addi x9,x0,-1 + 80001bf4: 00d4d493 srli x9,x9,0xd + 80001bf8: 00c49493 slli x9,x9,0xc + 80001bfc: fff4c493 xori x9,x9,-1 + 80001c00: 00e4f4b3 and x9,x9,x14 + +0000000080001c04 : + 80001c04: ffe48413 addi x8,x9,-2 + 80001c08: 00041663 bne x8,x0,80001c14 + +0000000080001c0c : + 80001c0c: 500502e3 beq x10,x0,80002910 + 80001c10: 5b40006f jal x0,800021c4 + +0000000080001c14 : + 80001c14: ff848413 addi x8,x9,-8 + 80001c18: 00245413 srli x8,x8,0x2 + 80001c1c: 5a041463 bne x8,x0,800021c4 + +0000000080001c20 : + 80001c20: 4e0508e3 beq x10,x0,80002910 + +0000000080001c24 : + 80001c24: fff50493 addi x9,x10,-1 + 80001c28: 00500393 addi x7,x0,5 + 80001c2c: 0274e063 bltu x9,x7,80001c4c + 80001c30: 07300393 addi x7,x0,115 + 80001c34: 00750463 beq x10,x7,80001c3c + 80001c38: 08c0006f jal x0,80001cc4 + +0000000080001c3c : + 80001c3c: 34102573 csrrs x10,mepc,x0 + 80001c40: 00450413 addi x8,x10,4 + 80001c44: 34141073 csrrw x0,mepc,x8 + 80001c48: 0310006f jal x0,80002478 + +0000000080001c4c : + 80001c4c: 341024f3 csrrs x9,mepc,x0 + 80001c50: 00448493 addi x9,x9,4 + 80001c54: 34149073 csrrw x0,mepc,x9 + 80001c58: 00100393 addi x7,x0,1 + 80001c5c: 00750e63 beq x10,x7,80001c78 + 80001c60: 00200393 addi x7,x0,2 + 80001c64: 02750463 beq x10,x7,80001c8c + 80001c68: 00300393 addi x7,x0,3 + 80001c6c: 04750063 beq x10,x7,80001cac + 80001c70: fff00513 addi x10,x0,-1 + 80001c74: 0050006f jal x0,80002478 + +0000000080001c78 : + 80001c78: fff00493 addi x9,x0,-1 + 80001c7c: 03e4d493 srli x9,x9,0x3e + 80001c80: 00b49493 slli x9,x9,0xb + 80001c84: 3004a073 csrrs x0,mstatus,x9 + 80001c88: 7f00006f jal x0,80002478 + +0000000080001c8c : + 80001c8c: fff00493 addi x9,x0,-1 + 80001c90: 03e4d493 srli x9,x9,0x3e + 80001c94: 00b49493 slli x9,x9,0xb + 80001c98: 3004b073 csrrc x0,mstatus,x9 + 80001c9c: 00100493 addi x9,x0,1 + 80001ca0: 00b49493 slli x9,x9,0xb + 80001ca4: 3004a073 csrrs x0,mstatus,x9 + 80001ca8: 7d00006f jal x0,80002478 + +0000000080001cac : + 80001cac: fff00493 addi x9,x0,-1 + 80001cb0: 03e4d493 srli x9,x9,0x3e + 80001cb4: 00b49493 slli x9,x9,0xb + 80001cb8: 3004b073 csrrc x0,mstatus,x9 + 80001cbc: 7bc0006f jal x0,80002478 + +0000000080001cc0 : + 80001cc0: 00000013 addi x0,x0,0 + +0000000080001cc4 : + 80001cc4: 00000013 addi x0,x0,0 + 80001cc8: 00000013 addi x0,x0,0 + 80001ccc: 00000013 addi x0,x0,0 + 80001cd0: 00000013 addi x0,x0,0 + 80001cd4: 00000013 addi x0,x0,0 + 80001cd8: 00000013 addi x0,x0,0 + 80001cdc: 00000013 addi x0,x0,0 + 80001ce0: 00000397 auipc x7,0x0 + 80001ce4: 17038393 addi x7,x7,368 # 80001e50 + 80001ce8: 00000013 addi x0,x0,0 + 80001cec: 00000013 addi x0,x0,0 + 80001cf0: 00000013 addi x0,x0,0 + 80001cf4: 00000013 addi x0,x0,0 + 80001cf8: 00000013 addi x0,x0,0 + 80001cfc: 00000013 addi x0,x0,0 + +0000000080001d00 : + 80001d00: 0003e403 lwu x8,0(x7) + 80001d04: 00a40863 beq x8,x10,80001d14 + 80001d08: 04040863 beq x8,x0,80001d58 + 80001d0c: 00838393 addi x7,x7,8 + 80001d10: ff1ff06f jal x0,80001d00 + +0000000080001d14 : + 80001d14: 00008493 addi x9,x1,0 + 80001d18: 00000013 addi x0,x0,0 + 80001d1c: 00000013 addi x0,x0,0 + 80001d20: 00000097 auipc x1,0x0 + 80001d24: 02408093 addi x1,x1,36 # 80001d44 + 80001d28: 00000013 addi x0,x0,0 + 80001d2c: 00000013 addi x0,x0,0 + 80001d30: 00000013 addi x0,x0,0 + 80001d34: 00000013 addi x0,x0,0 + 80001d38: 00000013 addi x0,x0,0 + 80001d3c: 00000013 addi x0,x0,0 + 80001d40: 00038067 jalr x0,0(x7) + +0000000080001d44 : + 80001d44: 00048093 addi x1,x9,0 + 80001d48: 34102473 csrrs x8,mepc,x0 + 80001d4c: 00440413 addi x8,x8,4 + 80001d50: 34141073 csrrw x0,mepc,x8 + 80001d54: 7240006f jal x0,80002478 + +0000000080001d58 : + 80001d58: 00050493 addi x9,x10,0 + 80001d5c: 00000013 addi x0,x0,0 + 80001d60: 0000a517 auipc x10,0xa + 80001d64: 4d350513 addi x10,x10,1235 # 8000c233 + 80001d68: 00000013 addi x0,x0,0 + 80001d6c: 00000013 addi x0,x0,0 + 80001d70: 00000013 addi x0,x0,0 + 80001d74: 00000013 addi x0,x0,0 + 80001d78: 00000013 addi x0,x0,0 + 80001d7c: 00000013 addi x0,x0,0 + 80001d80: 00029097 auipc x1,0x29 + 80001d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80001d88: 00048513 addi x10,x9,0 + 80001d8c: 02000593 addi x11,x0,32 + 80001d90: 728020ef jal x1,800044b8 + 80001d94: 00000013 addi x0,x0,0 + 80001d98: 00000013 addi x0,x0,0 + 80001d9c: 00000013 addi x0,x0,0 + 80001da0: 00009517 auipc x10,0x9 + 80001da4: 85850513 addi x10,x10,-1960 # 8000a5f8 + 80001da8: 00000013 addi x0,x0,0 + 80001dac: 00000013 addi x0,x0,0 + 80001db0: 00000013 addi x0,x0,0 + 80001db4: 00000013 addi x0,x0,0 + 80001db8: 00000013 addi x0,x0,0 + 80001dbc: 00000013 addi x0,x0,0 + 80001dc0: 00028097 auipc x1,0x28 + 80001dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80001dc8: 00000013 addi x0,x0,0 + 80001dcc: 00000013 addi x0,x0,0 + 80001dd0: 00000013 addi x0,x0,0 + 80001dd4: 00000013 addi x0,x0,0 + 80001dd8: 00000013 addi x0,x0,0 + 80001ddc: 00000013 addi x0,x0,0 + 80001de0: 00009517 auipc x10,0x9 + 80001de4: eda50513 addi x10,x10,-294 # 8000acba + 80001de8: 00000013 addi x0,x0,0 + 80001dec: 00000013 addi x0,x0,0 + 80001df0: 00000013 addi x0,x0,0 + 80001df4: 00000013 addi x0,x0,0 + 80001df8: 00000013 addi x0,x0,0 + 80001dfc: 00000013 addi x0,x0,0 + 80001e00: 00028097 auipc x1,0x28 + 80001e04: 7a4080e7 jalr x1,1956(x1) # 8002a5a4 + 80001e08: 00000013 addi x0,x0,0 + 80001e0c: 00000013 addi x0,x0,0 + 80001e10: 00000013 addi x0,x0,0 + 80001e14: 00000013 addi x0,x0,0 + 80001e18: 00000013 addi x0,x0,0 + 80001e1c: 00000013 addi x0,x0,0 + 80001e20: 00009517 auipc x10,0x9 + 80001e24: d9350513 addi x10,x10,-621 # 8000abb3 + 80001e28: 00000013 addi x0,x0,0 + 80001e2c: 00000013 addi x0,x0,0 + 80001e30: 00000013 addi x0,x0,0 + 80001e34: 00000013 addi x0,x0,0 + 80001e38: 00000013 addi x0,x0,0 + 80001e3c: 00000013 addi x0,x0,0 + 80001e40: 00028097 auipc x1,0x28 + 80001e44: 764080e7 jalr x1,1892(x1) # 8002a5a4 + 80001e48: 00028097 auipc x1,0x28 + 80001e4c: 7bc080e7 jalr x1,1980(x1) # 8002a604 + +0000000080001e50 : + 80001e50: 30002573 .word 0x30002573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 30059073 .word 0x30059073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 3005a073 .word 0x3005a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 3005b073 .word 0x3005b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 30402573 .word 0x30402573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 30459073 .word 0x30459073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 3045a073 .word 0x3045a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 3045b073 .word 0x3045b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 30602573 .word 0x30602573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 30659073 .word 0x30659073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 3065a073 .word 0x3065a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 3065b073 .word 0x3065b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 30a02573 .word 0x30a02573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 30a59073 .word 0x30a59073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 30a5a073 .word 0x30a5a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 30a5b073 .word 0x30a5b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 34402573 .word 0x34402573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 34459073 .word 0x34459073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 3445a073 .word 0x3445a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 3445b073 .word 0x3445b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 74702573 .word 0x74702573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 74759073 .word 0x74759073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7475a073 .word 0x7475a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7475b073 .word 0x7475b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 32002573 .word 0x32002573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 32059073 .word 0x32059073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 3205a073 .word 0x3205a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 3205b073 .word 0x3205b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: b0002573 .word 0xb0002573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: b0059073 .word 0xb0059073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: b005a073 .word 0xb005a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: b005b073 .word 0xb005b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: b0202573 .word 0xb0202573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: b0259073 .word 0xb0259073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: b025a073 .word 0xb025a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: b025b073 .word 0xb025b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 10002573 .word 0x10002573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 10059073 .word 0x10059073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 1005a073 .word 0x1005a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 1005b073 .word 0x1005b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 10402573 .word 0x10402573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 10459073 .word 0x10459073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 1045a073 .word 0x1045a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 1045b073 .word 0x1045b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 10602573 .word 0x10602573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 10659073 .word 0x10659073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 1065a073 .word 0x1065a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 1065b073 .word 0x1065b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 10a02573 .word 0x10a02573 + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 10a59073 .word 0x10a59073 + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 10a5a073 .word 0x10a5a073 + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 10a5b073 .word 0x10a5b073 + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 14402573 .word 0x14402573 + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 14459073 .word 0x14459073 + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 1445a073 .word 0x1445a073 + 80002004: 00008067 jalr x0,0(x1) + 80002008: 1445b073 .word 0x1445b073 + 8000200c: 00008067 jalr x0,0(x1) + 80002010: 14d02573 .word 0x14d02573 + 80002014: 00008067 jalr x0,0(x1) + 80002018: 14d59073 .word 0x14d59073 + 8000201c: 00008067 jalr x0,0(x1) + 80002020: 14d5a073 .word 0x14d5a073 + 80002024: 00008067 jalr x0,0(x1) + 80002028: 14d5b073 .word 0x14d5b073 + 8000202c: 00008067 jalr x0,0(x1) + 80002030: 18002573 .word 0x18002573 + 80002034: 00008067 jalr x0,0(x1) + 80002038: 18059073 .word 0x18059073 + 8000203c: 00008067 jalr x0,0(x1) + 80002040: 1805a073 .word 0x1805a073 + 80002044: 00008067 jalr x0,0(x1) + 80002048: 1805b073 .word 0x1805b073 + 8000204c: 00008067 jalr x0,0(x1) + 80002050: 7a002573 .word 0x7a002573 + 80002054: 00008067 jalr x0,0(x1) + 80002058: 7a059073 .word 0x7a059073 + 8000205c: 00008067 jalr x0,0(x1) + 80002060: 7a05a073 .word 0x7a05a073 + 80002064: 00008067 jalr x0,0(x1) + 80002068: 7a05b073 .word 0x7a05b073 + 8000206c: 00008067 jalr x0,0(x1) + 80002070: 7a102573 .word 0x7a102573 + 80002074: 00008067 jalr x0,0(x1) + 80002078: 7a159073 .word 0x7a159073 + 8000207c: 00008067 jalr x0,0(x1) + 80002080: 7a15a073 .word 0x7a15a073 + 80002084: 00008067 jalr x0,0(x1) + 80002088: 7a15b073 .word 0x7a15b073 + 8000208c: 00008067 jalr x0,0(x1) + 80002090: 7a202573 .word 0x7a202573 + 80002094: 00008067 jalr x0,0(x1) + 80002098: 7a259073 .word 0x7a259073 + 8000209c: 00008067 jalr x0,0(x1) + 800020a0: 7a25a073 .word 0x7a25a073 + 800020a4: 00008067 jalr x0,0(x1) + 800020a8: 7a25b073 .word 0x7a25b073 + 800020ac: 00008067 jalr x0,0(x1) + 800020b0: 7a302573 .word 0x7a302573 + 800020b4: 00008067 jalr x0,0(x1) + 800020b8: 7a359073 .word 0x7a359073 + 800020bc: 00008067 jalr x0,0(x1) + 800020c0: 7a35a073 .word 0x7a35a073 + 800020c4: 00008067 jalr x0,0(x1) + 800020c8: 7a35b073 .word 0x7a35b073 + 800020cc: 00008067 jalr x0,0(x1) + 800020d0: 7a402573 .word 0x7a402573 + 800020d4: 00008067 jalr x0,0(x1) + 800020d8: 7a459073 .word 0x7a459073 + 800020dc: 00008067 jalr x0,0(x1) + 800020e0: 7a45a073 .word 0x7a45a073 + 800020e4: 00008067 jalr x0,0(x1) + 800020e8: 7a45b073 .word 0x7a45b073 + 800020ec: 00008067 jalr x0,0(x1) + 800020f0: 7a502573 .word 0x7a502573 + 800020f4: 00008067 jalr x0,0(x1) + 800020f8: 7a559073 .word 0x7a559073 + 800020fc: 00008067 jalr x0,0(x1) + 80002100: 7a55a073 .word 0x7a55a073 + 80002104: 00008067 jalr x0,0(x1) + 80002108: 7a55b073 .word 0x7a55b073 + 8000210c: 00008067 jalr x0,0(x1) + 80002110: 7a802573 .word 0x7a802573 + 80002114: 00008067 jalr x0,0(x1) + 80002118: 7a859073 .word 0x7a859073 + 8000211c: 00008067 jalr x0,0(x1) + 80002120: 7a85a073 .word 0x7a85a073 + 80002124: 00008067 jalr x0,0(x1) + 80002128: 7a85b073 .word 0x7a85b073 + 8000212c: 00008067 jalr x0,0(x1) + 80002130: 7aa02573 .word 0x7aa02573 + 80002134: 00008067 jalr x0,0(x1) + 80002138: 7aa59073 .word 0x7aa59073 + 8000213c: 00008067 jalr x0,0(x1) + 80002140: 7aa5a073 .word 0x7aa5a073 + 80002144: 00008067 jalr x0,0(x1) + 80002148: 7aa5b073 .word 0x7aa5b073 + 8000214c: 00008067 jalr x0,0(x1) + 80002150: 5a802573 .word 0x5a802573 + 80002154: 00008067 jalr x0,0(x1) + 80002158: 5a859073 .word 0x5a859073 + 8000215c: 00008067 jalr x0,0(x1) + 80002160: 5a85a073 .word 0x5a85a073 + 80002164: 00008067 jalr x0,0(x1) + 80002168: 5a85b073 .word 0x5a85b073 + 8000216c: 00008067 jalr x0,0(x1) + 80002170: 6a802573 .word 0x6a802573 + 80002174: 00008067 jalr x0,0(x1) + 80002178: 6a859073 .word 0x6a859073 + 8000217c: 00008067 jalr x0,0(x1) + 80002180: 6a85a073 .word 0x6a85a073 + 80002184: 00008067 jalr x0,0(x1) + 80002188: 6a85b073 .word 0x6a85b073 + 8000218c: 00008067 jalr x0,0(x1) + 80002190: 0005a503 lw x10,0(x11) + 80002194: 00008067 jalr x0,0(x1) + 80002198: 0045a503 lw x10,4(x11) + 8000219c: 00008067 jalr x0,0(x1) + 800021a0: 00c5a023 sw x12,0(x11) + 800021a4: 00008067 jalr x0,0(x1) + 800021a8: 00c5a223 sw x12,4(x11) + 800021ac: 00008067 jalr x0,0(x1) + 800021b0: 0005b503 ld x10,0(x11) + 800021b4: 00008067 jalr x0,0(x1) + 800021b8: 00c5b023 sd x12,0(x11) + 800021bc: 00008067 jalr x0,0(x1) + 800021c0: 00000000 .word 0x00000000 + +00000000800021c4 : + 800021c4: 02000393 addi x7,x0,32 + 800021c8: 00075c63 bge x14,x0,800021e0 + +00000000800021cc : + 800021cc: 00171413 slli x8,x14,0x1 + 800021d0: ff240413 addi x8,x8,-14 + 800021d4: 00045663 bge x8,x0,800021e0 + 800021d8: 01800393 addi x7,x0,24 + 800021dc: 0040006f jal x0,800021e0 + +00000000800021e0 : + 800021e0: ca810113 addi x2,x2,-856 + 800021e4: 5f013303 ld x6,1520(x2) + 800021e8: 007304b3 add x9,x6,x7 + 800021ec: 5e913823 sd x9,1520(x2) + 800021f0: 5d013403 ld x8,1488(x2) + 800021f4: 40830333 sub x6,x6,x8 + 800021f8: 35810113 addi x2,x2,856 + 800021fc: 27813403 ld x8,632(x2) + 80002200: 00830333 add x6,x6,x8 + 80002204: 34102473 csrrs x8,mepc,x0 + 80002208: 00000013 addi x0,x0,0 + 8000220c: 00000013 addi x0,x0,0 + 80002210: 00000013 addi x0,x0,0 + 80002214: 00000013 addi x0,x0,0 + 80002218: 00000013 addi x0,x0,0 + 8000221c: 00000013 addi x0,x0,0 + 80002220: 00008497 auipc x9,0x8 + 80002224: 3b848493 addi x9,x9,952 # 8000a5d8 + 80002228: 00000013 addi x0,x0,0 + 8000222c: 00000013 addi x0,x0,0 + 80002230: 00000013 addi x0,x0,0 + 80002234: 00000013 addi x0,x0,0 + 80002238: 00000013 addi x0,x0,0 + 8000223c: 00000013 addi x0,x0,0 + 80002240: 0084b023 sd x8,0(x9) + 80002244: 00e4b423 sd x14,8(x9) + 80002248: 34302473 csrrs x8,mtval,x0 + 8000224c: 0084b823 sd x8,16(x9) + 80002250: 30002473 csrrs x8,mstatus,x0 + 80002254: 0084bc23 sd x8,24(x9) + 80002258: 00000013 addi x0,x0,0 + 8000225c: 00000013 addi x0,x0,0 + 80002260: 00028417 auipc x8,0x28 + 80002264: 92840413 addi x8,x8,-1752 # 80029b88 + 80002268: 00000013 addi x0,x0,0 + 8000226c: 00000013 addi x0,x0,0 + 80002270: 00000013 addi x0,x0,0 + 80002274: 00000013 addi x0,x0,0 + 80002278: 00000013 addi x0,x0,0 + 8000227c: 00000013 addi x0,x0,0 + 80002280: 007304b3 add x9,x6,x7 + 80002284: e4946663 bltu x8,x9,800018d0 + +0000000080002288 : + 80002288: 2c013403 ld x8,704(x2) + 8000228c: 408787b3 sub x15,x15,x8 + 80002290: 00179493 slli x9,x15,0x1 + 80002294: 009787b3 add x15,x15,x9 + 80002298: 0057d793 srli x15,x15,0x5 + 8000229c: 00679793 slli x15,x15,0x6 + 800022a0: 0077e7b3 or x15,x15,x7 + 800022a4: 00378793 addi x15,x15,3 + 800022a8: 02075a63 bge x14,x0,800022dc + 800022ac: 00f00413 addi x8,x0,15 + 800022b0: 00877433 and x8,x14,x8 + 800022b4: 304024f3 csrrs x9,mie,x0 + 800022b8: 0084d4b3 srl x9,x9,x8 + 800022bc: 0014f493 andi x9,x9,1 + 800022c0: 00b49493 slli x9,x9,0xb + 800022c4: 0097e7b3 or x15,x15,x9 + 800022c8: 344024f3 csrrs x9,mip,x0 + 800022cc: 0084d4b3 srl x9,x9,x8 + 800022d0: 0014f493 andi x9,x9,1 + 800022d4: 00c49493 slli x9,x9,0xc + 800022d8: 0097e7b3 or x15,x15,x9 + 800022dc: 300023f3 csrrs x7,mstatus,x0 + 800022e0: 02f39393 slli x7,x7,0x2f + 800022e4: 0223d393 srli x7,x7,0x22 + 800022e8: 00000437 lui x8,0x0 + 800022ec: 00040413 addi x8,x8,0 # 0 + 800022f0: 00b41413 slli x8,x8,0xb + 800022f4: 00140413 addi x8,x8,1 + 800022f8: 00b41413 slli x8,x8,0xb + 800022fc: 06740413 addi x8,x8,103 + 80002300: 00a41413 slli x8,x8,0xa + 80002304: 3e540413 addi x8,x8,997 + 80002308: fff44413 xori x8,x8,-1 + 8000230c: 0083f433 and x8,x7,x8 + 80002310: 0087e433 or x8,x15,x8 + 80002314: 0204d493 srli x9,x9,0x20 + 80002318: 1c04f493 andi x9,x9,448 + 8000231c: 00849493 slli x9,x9,0x8 + 80002320: 00946433 or x8,x8,x9 + 80002324: 00033483 ld x9,0(x6) + 80002328: 02848263 beq x9,x8,8000234c + 8000232c: 00040313 addi x6,x8,0 + 80002330: 00048213 addi x4,x9,0 + 80002334: 6b4003ef jal x7,800029e8 + 80002338: 80002288 .word 0x80002288 + 8000233c: 00000000 .word 0x00000000 + 80002340: 8000adbc .word 0x8000adbc + 80002344: 00000000 .word 0x00000000 + 80002348: 00000341 .word 0x00000341 + +000000008000234c : + 8000234c: 00070413 addi x8,x14,0 + 80002350: 00833483 ld x9,8(x6) + 80002354: 02848263 beq x9,x8,80002378 + 80002358: 00040313 addi x6,x8,0 + 8000235c: 00048213 addi x4,x9,0 + 80002360: 688003ef jal x7,800029e8 + 80002364: 8000234c .word 0x8000234c + 80002368: 00000000 .word 0x00000000 + 8000236c: 8000aebe .word 0x8000aebe + 80002370: 00000000 .word 0x00000000 + 80002374: 00000341 .word 0x00000341 + 80002378: 12074063 blt x14,x0,80002498 + +000000008000237c : + 8000237c: 34102473 csrrs x8,mepc,x0 + 80002380: 00010493 addi x9,x2,0 + 80002384: 0040006f jal x0,80002388 + +0000000080002388 : + 80002388: 08000393 addi x7,x0,128 + 8000238c: 04740863 beq x8,x7,800023dc + 80002390: 00238393 addi x7,x7,2 + 80002394: 04740463 beq x8,x7,800023dc + 80002398: 04040263 beq x8,x0,800023dc + 8000239c: 2884b383 ld x7,648(x9) + 800023a0: 2904b783 ld x15,656(x9) + 800023a4: 007787b3 add x15,x15,x7 + 800023a8: 00f47463 bgeu x8,x15,800023b0 + 800023ac: 02747663 bgeu x8,x7,800023d8 + +00000000800023b0 : + 800023b0: 2584b383 ld x7,600(x9) + 800023b4: 2604b783 ld x15,608(x9) + 800023b8: 007787b3 add x15,x15,x7 + 800023bc: 00f47463 bgeu x8,x15,800023c4 + 800023c0: 00747c63 bgeu x8,x7,800023d8 + +00000000800023c4 : + 800023c4: 2684b383 ld x7,616(x9) + 800023c8: 2704b783 ld x15,624(x9) + 800023cc: 007787b3 add x15,x15,x7 + 800023d0: d2f47a63 bgeu x8,x15,80001904 + 800023d4: d2746863 bltu x8,x7,80001904 + +00000000800023d8 : + 800023d8: 40740433 sub x8,x8,x7 + +00000000800023dc : + 800023dc: 01033483 ld x9,16(x6) + 800023e0: 02848263 beq x9,x8,80002404 + 800023e4: 00040313 addi x6,x8,0 + 800023e8: 00048213 addi x4,x9,0 + 800023ec: 5fc003ef jal x7,800029e8 + 800023f0: 800023dc .word 0x800023dc + 800023f4: 00000000 .word 0x00000000 + 800023f8: 8000afb9 .word 0x8000afb9 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000341 .word 0x00000341 + +0000000080002404 : + 80002404: 34102473 csrrs x8,mepc,x0 + 80002408: 342023f3 csrrs x7,mcause,x0 + 8000240c: 00c00793 addi x15,x0,12 + 80002410: 00f38a63 beq x7,x15,80002424 + 80002414: 00100793 addi x15,x0,1 + 80002418: 00f38663 beq x7,x15,80002424 + 8000241c: 01400793 addi x15,x0,20 + 80002420: 00f39663 bne x7,x15,8000242c + 80002424: 34109073 csrrw x0,mepc,x1 + 80002428: 0100006f jal x0,80002438 + +000000008000242c : + 8000242c: 00400393 addi x7,x0,4 + 80002430: 00740433 add x8,x8,x7 + 80002434: 34141073 csrrw x0,mepc,x8 + +0000000080002438 : + 80002438: 34302473 csrrs x8,mtval,x0 + +000000008000243c : + 8000243c: 01833483 ld x9,24(x6) + 80002440: 02848263 beq x9,x8,80002464 + 80002444: 00040313 addi x6,x8,0 + 80002448: 00048213 addi x4,x9,0 + 8000244c: 59c003ef jal x7,800029e8 + 80002450: 8000243c .word 0x8000243c + 80002454: 00000000 .word 0x00000000 + 80002458: 8000b0ac .word 0x8000b0ac + 8000245c: 00000000 .word 0x00000000 + 80002460: 00000341 .word 0x00000341 + +0000000080002464 : + 80002464: 30102473 csrrs x8,misa,x0 + 80002468: 03841413 slli x8,x8,0x38 + 8000246c: 00045263 bge x8,x0,80002470 + +0000000080002470 : + 80002470: 20000393 addi x7,x0,512 + 80002474: 0640006f jal x0,800024d8 + +0000000080002478 : + 80002478: 2e013303 ld x6,736(x2) + 8000247c: 2e813383 ld x7,744(x2) + 80002480: 2f013403 ld x8,752(x2) + 80002484: 2f813483 ld x9,760(x2) + 80002488: 30013703 ld x14,768(x2) + 8000248c: 30813783 ld x15,776(x2) + 80002490: 31013103 ld x2,784(x2) + 80002494: 30200073 mret + +0000000080002498 : + 80002498: 00100413 addi x8,x0,1 + 8000249c: 01f77393 andi x7,x14,31 + 800024a0: 00741433 sll x8,x8,x7 + 800024a4: 304434f3 csrrc x9,mie,x8 + 800024a8: 34443473 csrrc x8,mip,x8 + +00000000800024ac : + 800024ac: 01033483 ld x9,16(x6) + 800024b0: 02848263 beq x9,x8,800024d4 + 800024b4: 00040313 addi x6,x8,0 + 800024b8: 00048213 addi x4,x9,0 + 800024bc: 52c003ef jal x7,800029e8 + 800024c0: 800024ac .word 0x800024ac + 800024c4: 00000000 .word 0x00000000 + 800024c8: 8000b21f .word 0x8000b21f + 800024cc: 00000000 .word 0x00000000 + 800024d0: 00000341 .word 0x00000341 + 800024d4: 00000393 addi x7,x0,0 + +00000000800024d8 : + 800024d8: 00000417 auipc x8,0x0 + 800024dc: 03c40413 addi x8,x8,60 # 80002514 + 800024e0: 00740433 add x8,x8,x7 + 800024e4: 00371393 slli x7,x14,0x3 + 800024e8: 00740433 add x8,x8,x7 + 800024ec: ff847413 andi x8,x8,-8 + 800024f0: 00043403 ld x8,0(x8) + +00000000800024f4 : + 800024f4: 00040a63 beq x8,x0,80002508 + 800024f8: 03f41393 slli x7,x8,0x3f + 800024fc: 0003d863 bge x7,x0,8000250c + 80002500: 00145413 srli x8,x8,0x1 + 80002504: f6870ae3 beq x14,x8,80002478 + 80002508: bfcff06f jal x0,80001904 + +000000008000250c : + 8000250c: 00040067 jalr x0,0(x8) + +0000000080002510 : + ... + 80002518: 00000001 .word 0x00000001 + 8000251c: 00000000 .word 0x00000000 + 80002520: 00000001 .word 0x00000001 + 80002524: 00000000 .word 0x00000000 + 80002528: 8002a000 .word 0x8002a000 + ... + 80002538: 00000001 .word 0x00000001 + 8000253c: 00000000 .word 0x00000000 + 80002540: 00000001 .word 0x00000001 + 80002544: 00000000 .word 0x00000000 + 80002548: 8002a014 .word 0x8002a014 + ... + 80002558: 00000001 .word 0x00000001 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000001 .word 0x00000001 + 80002564: 00000000 .word 0x00000000 + 80002568: 8002a02c .word 0x8002a02c + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000001 .word 0x00000001 + 80002574: 00000000 .word 0x00000000 + 80002578: 00000001 .word 0x00000001 + 8000257c: 00000000 .word 0x00000000 + 80002580: 00000001 .word 0x00000001 + 80002584: 00000000 .word 0x00000000 + 80002588: 00000001 .word 0x00000001 + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000001 .word 0x00000001 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000001 .word 0x00000001 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000001 .word 0x00000001 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000001 .word 0x00000001 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000001 .word 0x00000001 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 00000001 .word 0x00000001 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 00000001 .word 0x00000001 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 00000001 .word 0x00000001 + ... + +0000000080002710 : + 80002710: 00000001 .word 0x00000001 + 80002714: 00000000 .word 0x00000000 + 80002718: 00000003 .word 0x00000003 + 8000271c: 00000000 .word 0x00000000 + 80002720: 00000005 .word 0x00000005 + 80002724: 00000000 .word 0x00000000 + 80002728: 00000007 .word 0x00000007 + 8000272c: 00000000 .word 0x00000000 + 80002730: 00000009 .word 0x00000009 + 80002734: 00000000 .word 0x00000000 + 80002738: 0000000b .word 0x0000000b + 8000273c: 00000000 .word 0x00000000 + 80002740: 0000000d .word 0x0000000d + 80002744: 00000000 .word 0x00000000 + 80002748: 0000000f .word 0x0000000f + 8000274c: 00000000 .word 0x00000000 + 80002750: 00000011 .word 0x00000011 + 80002754: 00000000 .word 0x00000000 + 80002758: 00000013 .word 0x00000013 + 8000275c: 00000000 .word 0x00000000 + 80002760: 00000015 .word 0x00000015 + 80002764: 00000000 .word 0x00000000 + 80002768: 00000017 .word 0x00000017 + 8000276c: 00000000 .word 0x00000000 + 80002770: 00000019 .word 0x00000019 + 80002774: 00000000 .word 0x00000000 + 80002778: 0000001b .word 0x0000001b + 8000277c: 00000000 .word 0x00000000 + 80002780: 0000001d .word 0x0000001d + 80002784: 00000000 .word 0x00000000 + 80002788: 0000001f .word 0x0000001f + 8000278c: 00000000 .word 0x00000000 + 80002790: 00000021 .word 0x00000021 + 80002794: 00000000 .word 0x00000000 + 80002798: 00000023 .word 0x00000023 + 8000279c: 00000000 .word 0x00000000 + 800027a0: 00000025 .word 0x00000025 + 800027a4: 00000000 .word 0x00000000 + 800027a8: 00000027 .word 0x00000027 + 800027ac: 00000000 .word 0x00000000 + 800027b0: 00000029 .word 0x00000029 + 800027b4: 00000000 .word 0x00000000 + 800027b8: 0000002b .word 0x0000002b + 800027bc: 00000000 .word 0x00000000 + 800027c0: 0000002d .word 0x0000002d + 800027c4: 00000000 .word 0x00000000 + 800027c8: 0000002f .word 0x0000002f + ... + +0000000080002910 : + 80002910: 300023f3 csrrs x7,mstatus,x0 + 80002914: 00b3d493 srli x9,x7,0xb + 80002918: 0034f493 andi x9,x9,3 + 8000291c: ffd48413 addi x8,x9,-3 + 80002920: 341023f3 csrrs x7,mepc,x0 + 80002924: 00000493 addi x9,x0,0 + 80002928: 02040c63 beq x8,x0,80002960 + 8000292c: 35810113 addi x2,x2,856 + 80002930: 300023f3 csrrs x7,mstatus,x0 + 80002934: 01839393 slli x7,x7,0x18 + 80002938: 0003da63 bge x7,x0,8000294c + +000000008000293c : + 8000293c: 35810113 addi x2,x2,856 + 80002940: 5b013783 ld x15,1456(x2) + 80002944: ca810113 addi x2,x2,-856 + 80002948: 0080006f jal x0,80002950 + +000000008000294c : + 8000294c: f0013783 ld x15,-256(x2) + 80002950: 341023f3 csrrs x7,mepc,x0 + 80002954: 40f383b3 sub x7,x7,x15 + 80002958: ca810113 addi x2,x2,-856 + 8000295c: 25813483 ld x9,600(x2) + +0000000080002960 : + 80002960: 007483b3 add x7,x9,x7 + 80002964: 2e013303 ld x6,736(x2) + 80002968: 2f013403 ld x8,752(x2) + 8000296c: 2f813483 ld x9,760(x2) + 80002970: 30013703 ld x14,768(x2) + 80002974: 30813783 ld x15,776(x2) + 80002978: 31013103 ld x2,784(x2) + 8000297c: 00438067 jalr x0,4(x7) + +0000000080002980 : + 80002980: 00008217 auipc x4,0x8 + 80002984: b1020213 addi x4,x4,-1264 # 8000a490 + 80002988: 02523423 sd x5,40(x4) # 28 + 8000298c: 00123423 sd x1,8(x4) # 8 + 80002990: 00023023 sd x0,0(x4) # 0 + 80002994: 0880006f jal x0,80002a1c + +0000000080002998 : + 80002998: 00008397 auipc x7,0x8 + 8000299c: af838393 addi x7,x7,-1288 # 8000a490 + 800029a0: 0483b023 sd x8,64(x7) + 800029a4: 0243b023 sd x4,32(x7) + 800029a8: 0253b423 sd x5,40(x7) + 800029ac: 0013b423 sd x1,8(x7) + 800029b0: 0003b023 sd x0,0(x7) + 800029b4: 00038213 addi x4,x7,0 + 800029b8: 00040293 addi x5,x8,0 + 800029bc: 0600006f jal x0,80002a1c + +00000000800029c0 : + 800029c0: 00008697 auipc x13,0x8 + 800029c4: ad068693 addi x13,x13,-1328 # 8000a490 + 800029c8: 06e6b823 sd x14,112(x13) + 800029cc: 0246b023 sd x4,32(x13) + 800029d0: 0256b423 sd x5,40(x13) + 800029d4: 0016b423 sd x1,8(x13) + 800029d8: 0006b023 sd x0,0(x13) + 800029dc: 00068213 addi x4,x13,0 + 800029e0: 00070293 addi x5,x14,0 + 800029e4: 0380006f jal x0,80002a1c + +00000000800029e8 : + 800029e8: 00008497 auipc x9,0x8 + 800029ec: aa848493 addi x9,x9,-1368 # 8000a490 + 800029f0: 0674b423 sd x7,104(x9) + 800029f4: 0244b023 sd x4,32(x9) + 800029f8: 0254b423 sd x5,40(x9) + 800029fc: 0014b423 sd x1,8(x9) + 80002a00: 00300093 addi x1,x0,3 + 80002a04: 0014b023 sd x1,0(x9) + 80002a08: 1064b823 sd x6,272(x9) + 80002a0c: 1044bc23 sd x4,280(x9) + 80002a10: 00048213 addi x4,x9,0 + 80002a14: 00038293 addi x5,x7,0 + 80002a18: 0040006f jal x0,80002a1c + +0000000080002a1c : + 80002a1c: 00223823 sd x2,16(x4) # 10 + 80002a20: 00323c23 sd x3,24(x4) # 18 + 80002a24: 02623823 sd x6,48(x4) # 30 + 80002a28: 02723c23 sd x7,56(x4) # 38 + 80002a2c: 04823023 sd x8,64(x4) # 40 + 80002a30: 04923423 sd x9,72(x4) # 48 + 80002a34: 04a23823 sd x10,80(x4) # 50 + 80002a38: 04b23c23 sd x11,88(x4) # 58 + 80002a3c: 06c23023 sd x12,96(x4) # 60 + 80002a40: 06d23423 sd x13,104(x4) # 68 + 80002a44: 06e23823 sd x14,112(x4) # 70 + 80002a48: 06f23c23 sd x15,120(x4) # 78 + 80002a4c: 09023023 sd x16,128(x4) # 80 + 80002a50: 09123423 sd x17,136(x4) # 88 + 80002a54: 09223823 sd x18,144(x4) # 90 + 80002a58: 09323c23 sd x19,152(x4) # 98 + 80002a5c: 0b423023 sd x20,160(x4) # a0 + 80002a60: 0b523423 sd x21,168(x4) # a8 + 80002a64: 0b623823 sd x22,176(x4) # b0 + 80002a68: 0b723c23 sd x23,184(x4) # b8 + 80002a6c: 0d823023 sd x24,192(x4) # c0 + 80002a70: 0d923423 sd x25,200(x4) # c8 + 80002a74: 0da23823 sd x26,208(x4) # d0 + 80002a78: 0db23c23 sd x27,216(x4) # d8 + 80002a7c: 0fc23023 sd x28,224(x4) # e0 + 80002a80: 0fd23423 sd x29,232(x4) # e8 + 80002a84: 0fe23823 sd x30,240(x4) # f0 + 80002a88: 0ff23c23 sd x31,248(x4) # f8 + +0000000080002a8c : + 80002a8c: 00008497 auipc x9,0x8 + 80002a90: a044a483 lw x9,-1532(x9) # 8000a490 + 80002a94: 00300513 addi x10,x0,3 + 80002a98: 18a48a63 beq x9,x10,80002c2c + +0000000080002a9c : + 80002a9c: ffa2d303 lhu x6,-6(x5) + 80002aa0: ff82d383 lhu x7,-8(x5) + 80002aa4: 01031313 slli x6,x6,0x10 + 80002aa8: 00736333 or x6,x6,x7 + 80002aac: 00f35393 srli x7,x6,0xf + 80002ab0: 01f3f393 andi x7,x7,31 + 80002ab4: 01435413 srli x8,x6,0x14 + 80002ab8: 01f47413 andi x8,x8,31 + 80002abc: 10822223 sw x8,260(x4) # 104 + 80002ac0: 00341313 slli x6,x8,0x3 + 80002ac4: 00620333 add x6,x4,x6 + 80002ac8: 00033303 ld x6,0(x6) + 80002acc: 10623823 sd x6,272(x4) # 110 + 80002ad0: ff62d303 lhu x6,-10(x5) + 80002ad4: ff42d383 lhu x7,-12(x5) + 80002ad8: 01031313 slli x6,x6,0x10 + 80002adc: 00736333 or x6,x6,x7 + 80002ae0: 00030513 addi x10,x6,0 + 80002ae4: 07f37413 andi x8,x6,127 + 80002ae8: 00300493 addi x9,x0,3 + 80002aec: 0c941463 bne x8,x9,80002bb4 + 80002af0: 00c35413 srli x8,x6,0xc + 80002af4: 00747413 andi x8,x8,7 + 80002af8: 00300493 addi x9,x0,3 + 80002afc: 0a941c63 bne x8,x9,80002bb4 + 80002b00: 41435393 srai x7,x6,0x14 + 80002b04: 00f35313 srli x6,x6,0xf + 80002b08: 01f37313 andi x6,x6,31 + 80002b0c: 00331313 slli x6,x6,0x3 + 80002b10: 00620333 add x6,x4,x6 + 80002b14: 00033303 ld x6,0(x6) + 80002b18: 00730333 add x6,x6,x7 + 80002b1c: 00737413 andi x8,x6,7 + 80002b20: 0c041663 bne x8,x0,80002bec + 80002b24: 00000013 addi x0,x0,0 + 80002b28: 00000013 addi x0,x0,0 + 80002b2c: 00000013 addi x0,x0,0 + 80002b30: 00000013 addi x0,x0,0 + 80002b34: 00000013 addi x0,x0,0 + 80002b38: 00000013 addi x0,x0,0 + 80002b3c: 00000013 addi x0,x0,0 + 80002b40: 00009417 auipc x8,0x9 + 80002b44: 74040413 addi x8,x8,1856 # 8000c280 + 80002b48: 00000013 addi x0,x0,0 + 80002b4c: 00000013 addi x0,x0,0 + 80002b50: 00000013 addi x0,x0,0 + 80002b54: 00000013 addi x0,x0,0 + 80002b58: 00000013 addi x0,x0,0 + 80002b5c: 00000013 addi x0,x0,0 + 80002b60: 08836663 bltu x6,x8,80002bec + 80002b64: 00000013 addi x0,x0,0 + 80002b68: 00000013 addi x0,x0,0 + 80002b6c: 00000013 addi x0,x0,0 + 80002b70: 00000013 addi x0,x0,0 + 80002b74: 00000013 addi x0,x0,0 + 80002b78: 00000013 addi x0,x0,0 + 80002b7c: 00000013 addi x0,x0,0 + 80002b80: 00027417 auipc x8,0x27 + 80002b84: 01040413 addi x8,x8,16 # 80029b90 + 80002b88: 00000013 addi x0,x0,0 + 80002b8c: 00000013 addi x0,x0,0 + 80002b90: 00000013 addi x0,x0,0 + 80002b94: 00000013 addi x0,x0,0 + 80002b98: 00000013 addi x0,x0,0 + 80002b9c: 00000013 addi x0,x0,0 + 80002ba0: ff840413 addi x8,x8,-8 + 80002ba4: 04646463 bltu x8,x6,80002bec + 80002ba8: 00033303 ld x6,0(x6) + 80002bac: 10623c23 sd x6,280(x4) # 118 + 80002bb0: 3880006f jal x0,80002f38 + +0000000080002bb4 : + 80002bb4: 00100413 addi x8,x0,1 + 80002bb8: 00000013 addi x0,x0,0 + 80002bbc: 00000013 addi x0,x0,0 + 80002bc0: 00008497 auipc x9,0x8 + 80002bc4: 9f848493 addi x9,x9,-1544 # 8000a5b8 + 80002bc8: 00000013 addi x0,x0,0 + 80002bcc: 00000013 addi x0,x0,0 + 80002bd0: 00000013 addi x0,x0,0 + 80002bd4: 00000013 addi x0,x0,0 + 80002bd8: 00000013 addi x0,x0,0 + 80002bdc: 00000013 addi x0,x0,0 + 80002be0: 0084a023 sw x8,0(x9) + 80002be4: 10a23c23 sd x10,280(x4) # 118 + 80002be8: 3500006f jal x0,80002f38 + +0000000080002bec : + 80002bec: 00200413 addi x8,x0,2 + 80002bf0: 00000013 addi x0,x0,0 + 80002bf4: 00000013 addi x0,x0,0 + 80002bf8: 00000013 addi x0,x0,0 + 80002bfc: 00000013 addi x0,x0,0 + 80002c00: 00008497 auipc x9,0x8 + 80002c04: 9b848493 addi x9,x9,-1608 # 8000a5b8 + 80002c08: 00000013 addi x0,x0,0 + 80002c0c: 00000013 addi x0,x0,0 + 80002c10: 00000013 addi x0,x0,0 + 80002c14: 00000013 addi x0,x0,0 + 80002c18: 00000013 addi x0,x0,0 + 80002c1c: 00000013 addi x0,x0,0 + 80002c20: 0084a023 sw x8,0(x9) + 80002c24: 10623c23 sd x6,280(x4) # 118 + 80002c28: 3100006f jal x0,80002f38 + +0000000080002c2c : + 80002c2c: 0082e303 lwu x6,8(x5) + 80002c30: 00c2a383 lw x7,12(x5) + 80002c34: 02039393 slli x7,x7,0x20 + 80002c38: 00736333 or x6,x6,x7 + 80002c3c: 00008817 auipc x16,0x8 + 80002c40: 98c80813 addi x16,x16,-1652 # 8000a5c8 + 80002c44: 00683023 sd x6,0(x16) + 80002c48: 0002e303 lwu x6,0(x5) + 80002c4c: 0042a383 lw x7,4(x5) + 80002c50: 02039393 slli x7,x7,0x20 + 80002c54: 00736333 or x6,x6,x7 + 80002c58: 10623423 sd x6,264(x4) # 108 + 80002c5c: 00008817 auipc x16,0x8 + 80002c60: 96c80813 addi x16,x16,-1684 # 8000a5c8 + 80002c64: 00083303 ld x6,0(x16) + 80002c68: 00008397 auipc x7,0x8 + 80002c6c: 13d38393 addi x7,x7,317 # 8000ada5 + 80002c70: 28730463 beq x6,x7,80002ef8 + 80002c74: 00000413 addi x8,x0,0 + 80002c78: 00008817 auipc x16,0x8 + 80002c7c: 94880813 addi x16,x16,-1720 # 8000a5c0 + 80002c80: 00882023 sw x8,0(x16) + 80002c84: 00008397 auipc x7,0x8 + 80002c88: 13838393 addi x7,x7,312 # 8000adbc + 80002c8c: 00731863 bne x6,x7,80002c9c + 80002c90: 00100413 addi x8,x0,1 + 80002c94: 00000493 addi x9,x0,0 + 80002c98: 2740006f jal x0,80002f0c + 80002c9c: 00008397 auipc x7,0x8 + 80002ca0: 22238393 addi x7,x7,546 # 8000aebe + 80002ca4: 00731863 bne x6,x7,80002cb4 + 80002ca8: 00200413 addi x8,x0,2 + 80002cac: 00000493 addi x9,x0,0 + 80002cb0: 25c0006f jal x0,80002f0c + 80002cb4: 00008397 auipc x7,0x8 + 80002cb8: 30538393 addi x7,x7,773 # 8000afb9 + 80002cbc: 00731863 bne x6,x7,80002ccc + 80002cc0: 00300413 addi x8,x0,3 + 80002cc4: 00000493 addi x9,x0,0 + 80002cc8: 2440006f jal x0,80002f0c + 80002ccc: 00008397 auipc x7,0x8 + 80002cd0: 3e038393 addi x7,x7,992 # 8000b0ac + 80002cd4: 00731863 bne x6,x7,80002ce4 + 80002cd8: 00400413 addi x8,x0,4 + 80002cdc: 00000493 addi x9,x0,0 + 80002ce0: 22c0006f jal x0,80002f0c + 80002ce4: 00008397 auipc x7,0x8 + 80002ce8: 53b38393 addi x7,x7,1339 # 8000b21f + 80002cec: 00731863 bne x6,x7,80002cfc + 80002cf0: 00500413 addi x8,x0,5 + 80002cf4: 00000493 addi x9,x0,0 + 80002cf8: 2140006f jal x0,80002f0c + 80002cfc: 00008397 auipc x7,0x8 + 80002d00: 4a738393 addi x7,x7,1191 # 8000b1a3 + 80002d04: 00731863 bne x6,x7,80002d14 + 80002d08: 00600413 addi x8,x0,6 + 80002d0c: 00000493 addi x9,x0,0 + 80002d10: 1fc0006f jal x0,80002f0c + 80002d14: 00008397 auipc x7,0x8 + 80002d18: 4cd38393 addi x7,x7,1229 # 8000b1e1 + 80002d1c: 00731863 bne x6,x7,80002d2c + 80002d20: 00700413 addi x8,x0,7 + 80002d24: 00000493 addi x9,x0,0 + 80002d28: 1e40006f jal x0,80002f0c + 80002d2c: 00008397 auipc x7,0x8 + 80002d30: 0d038393 addi x7,x7,208 # 8000adfc + 80002d34: 00731863 bne x6,x7,80002d44 + 80002d38: 00100413 addi x8,x0,1 + 80002d3c: 00100493 addi x9,x0,1 + 80002d40: 1cc0006f jal x0,80002f0c + 80002d44: 00008397 auipc x7,0x8 + 80002d48: 1b838393 addi x7,x7,440 # 8000aefc + 80002d4c: 00731863 bne x6,x7,80002d5c + 80002d50: 00200413 addi x8,x0,2 + 80002d54: 00100493 addi x9,x0,1 + 80002d58: 1b40006f jal x0,80002f0c + 80002d5c: 00008397 auipc x7,0x8 + 80002d60: 29938393 addi x7,x7,665 # 8000aff5 + 80002d64: 00731863 bne x6,x7,80002d74 + 80002d68: 00300413 addi x8,x0,3 + 80002d6c: 00100493 addi x9,x0,1 + 80002d70: 19c0006f jal x0,80002f0c + 80002d74: 00008397 auipc x7,0x8 + 80002d78: 37538393 addi x7,x7,885 # 8000b0e9 + 80002d7c: 00731863 bne x6,x7,80002d8c + 80002d80: 00400413 addi x8,x0,4 + 80002d84: 00100493 addi x9,x0,1 + 80002d88: 1840006f jal x0,80002f0c + 80002d8c: 00008397 auipc x7,0x8 + 80002d90: 4ce38393 addi x7,x7,1230 # 8000b25a + 80002d94: 00731863 bne x6,x7,80002da4 + 80002d98: 00500413 addi x8,x0,5 + 80002d9c: 00100493 addi x9,x0,1 + 80002da0: 16c0006f jal x0,80002f0c + 80002da4: 00008397 auipc x7,0x8 + 80002da8: 09838393 addi x7,x7,152 # 8000ae3c + 80002dac: 00731863 bne x6,x7,80002dbc + 80002db0: 00100413 addi x8,x0,1 + 80002db4: 00200493 addi x9,x0,2 + 80002db8: 1540006f jal x0,80002f0c + 80002dbc: 00008397 auipc x7,0x8 + 80002dc0: 17e38393 addi x7,x7,382 # 8000af3a + 80002dc4: 00731863 bne x6,x7,80002dd4 + 80002dc8: 00200413 addi x8,x0,2 + 80002dcc: 00200493 addi x9,x0,2 + 80002dd0: 13c0006f jal x0,80002f0c + 80002dd4: 00008397 auipc x7,0x8 + 80002dd8: 25d38393 addi x7,x7,605 # 8000b031 + 80002ddc: 00731863 bne x6,x7,80002dec + 80002de0: 00300413 addi x8,x0,3 + 80002de4: 00200493 addi x9,x0,2 + 80002de8: 1240006f jal x0,80002f0c + 80002dec: 00008397 auipc x7,0x8 + 80002df0: 33a38393 addi x7,x7,826 # 8000b126 + 80002df4: 00731863 bne x6,x7,80002e04 + 80002df8: 00400413 addi x8,x0,4 + 80002dfc: 00200493 addi x9,x0,2 + 80002e00: 10c0006f jal x0,80002f0c + 80002e04: 00008397 auipc x7,0x8 + 80002e08: 49138393 addi x7,x7,1169 # 8000b295 + 80002e0c: 00731863 bne x6,x7,80002e1c + 80002e10: 00500413 addi x8,x0,5 + 80002e14: 00200493 addi x9,x0,2 + 80002e18: 0f40006f jal x0,80002f0c + 80002e1c: 00008397 auipc x7,0x8 + 80002e20: 06138393 addi x7,x7,97 # 8000ae7d + 80002e24: 00731863 bne x6,x7,80002e34 + 80002e28: 00100413 addi x8,x0,1 + 80002e2c: 00300493 addi x9,x0,3 + 80002e30: 0dc0006f jal x0,80002f0c + 80002e34: 00008397 auipc x7,0x8 + 80002e38: 14538393 addi x7,x7,325 # 8000af79 + 80002e3c: 00731863 bne x6,x7,80002e4c + 80002e40: 00200413 addi x8,x0,2 + 80002e44: 00300493 addi x9,x0,3 + 80002e48: 0c40006f jal x0,80002f0c + 80002e4c: 00008397 auipc x7,0x8 + 80002e50: 22238393 addi x7,x7,546 # 8000b06e + 80002e54: 00731863 bne x6,x7,80002e64 + 80002e58: 00300413 addi x8,x0,3 + 80002e5c: 00300493 addi x9,x0,3 + 80002e60: 0ac0006f jal x0,80002f0c + 80002e64: 00008397 auipc x7,0x8 + 80002e68: 30038393 addi x7,x7,768 # 8000b164 + 80002e6c: 00731863 bne x6,x7,80002e7c + 80002e70: 00400413 addi x8,x0,4 + 80002e74: 00300493 addi x9,x0,3 + 80002e78: 0940006f jal x0,80002f0c + 80002e7c: 00008397 auipc x7,0x8 + 80002e80: 45538393 addi x7,x7,1109 # 8000b2d1 + 80002e84: 00731863 bne x6,x7,80002e94 + 80002e88: 00500413 addi x8,x0,5 + 80002e8c: 00300493 addi x9,x0,3 + 80002e90: 07c0006f jal x0,80002f0c + 80002e94: 00008397 auipc x7,0x8 + 80002e98: 47a38393 addi x7,x7,1146 # 8000b30e + 80002e9c: 00731863 bne x6,x7,80002eac + 80002ea0: 00800413 addi x8,x0,8 + 80002ea4: 00000493 addi x9,x0,0 + 80002ea8: 0640006f jal x0,80002f0c + 80002eac: 00008397 auipc x7,0x8 + 80002eb0: 4b138393 addi x7,x7,1201 # 8000b35d + 80002eb4: 00731863 bne x6,x7,80002ec4 + 80002eb8: 00800413 addi x8,x0,8 + 80002ebc: 00000493 addi x9,x0,0 + 80002ec0: 04c0006f jal x0,80002f0c + 80002ec4: 00008397 auipc x7,0x8 + 80002ec8: 59438393 addi x7,x7,1428 # 8000b458 + 80002ecc: 00731863 bne x6,x7,80002edc + 80002ed0: 00800413 addi x8,x0,8 + 80002ed4: 00100493 addi x9,x0,1 + 80002ed8: 0340006f jal x0,80002f0c + 80002edc: 00008397 auipc x7,0x8 + 80002ee0: 67838393 addi x7,x7,1656 # 8000b554 + 80002ee4: 00731863 bne x6,x7,80002ef4 + 80002ee8: 00800413 addi x8,x0,8 + 80002eec: 00200493 addi x9,x0,2 + 80002ef0: 01c0006f jal x0,80002f0c + 80002ef4: 0340006f jal x0,80002f28 + +0000000080002ef8 : + 80002ef8: 00900413 addi x8,x0,9 + 80002efc: 00007817 auipc x16,0x7 + 80002f00: 6c480813 addi x16,x16,1732 # 8000a5c0 + 80002f04: 00882023 sw x8,0(x16) + 80002f08: 0300006f jal x0,80002f38 + +0000000080002f0c : + 80002f0c: 00007817 auipc x16,0x7 + 80002f10: 6b480813 addi x16,x16,1716 # 8000a5c0 + 80002f14: 00882023 sw x8,0(x16) + 80002f18: 00007817 auipc x16,0x7 + 80002f1c: 6ac80813 addi x16,x16,1708 # 8000a5c4 + 80002f20: 00982023 sw x9,0(x16) + 80002f24: 0140006f jal x0,80002f38 + +0000000080002f28 : + 80002f28: 00007817 auipc x16,0x7 + 80002f2c: 69880813 addi x16,x16,1688 # 8000a5c0 + 80002f30: 00082023 sw x0,0(x16) + 80002f34: 0040006f jal x0,80002f38 + +0000000080002f38 : + 80002f38: 0002e303 lwu x6,0(x5) + 80002f3c: 0042a383 lw x7,4(x5) + 80002f40: 02039393 slli x7,x7,0x20 + 80002f44: 00736333 or x6,x6,x7 + 80002f48: 10623423 sd x6,264(x4) # 108 + 80002f4c: 00035383 lhu x7,0(x6) + 80002f50: 0033f413 andi x8,x7,3 + 80002f54: 00300493 addi x9,x0,3 + 80002f58: 00941863 bne x8,x9,80002f68 + 80002f5c: 00235403 lhu x8,2(x6) + 80002f60: 01041413 slli x8,x8,0x10 + 80002f64: 0083e3b3 or x7,x7,x8 + 80002f68: 10722023 sw x7,256(x4) # 100 + 80002f6c: 0082e303 lwu x6,8(x5) + 80002f70: 00c2a383 lw x7,12(x5) + 80002f74: 02039393 slli x7,x7,0x20 + 80002f78: 00736333 or x6,x6,x7 + 80002f7c: 12623023 sd x6,288(x4) # 120 + +0000000080002f80 : + 80002f80: 00008517 auipc x10,0x8 + 80002f84: c3350513 addi x10,x10,-973 # 8000abb3 + 80002f88: 00000013 addi x0,x0,0 + 80002f8c: 00000013 addi x0,x0,0 + 80002f90: 00000013 addi x0,x0,0 + 80002f94: 00000013 addi x0,x0,0 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00027097 auipc x1,0x27 + 80002fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00008517 auipc x10,0x8 + 80002fc4: c3150513 addi x10,x10,-975 # 8000abf1 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00027097 auipc x1,0x27 + 80002fe4: 5c4080e7 jalr x1,1476(x1) # 8002a5a4 + +0000000080002fe8 : + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00008517 auipc x10,0x8 + 80003004: ca850513 addi x10,x10,-856 # 8000aca8 + 80003008: 00000013 addi x0,x0,0 + 8000300c: 00000013 addi x0,x0,0 + 80003010: 00000013 addi x0,x0,0 + 80003014: 00000013 addi x0,x0,0 + 80003018: 00000013 addi x0,x0,0 + 8000301c: 00000013 addi x0,x0,0 + 80003020: 00027097 auipc x1,0x27 + 80003024: 584080e7 jalr x1,1412(x1) # 8002a5a4 + +0000000080003028 : + 80003028: 00007517 auipc x10,0x7 + 8000302c: 58853503 ld x10,1416(x10) # 8000a5b0 + 80003030: 00027097 auipc x1,0x27 + 80003034: 574080e7 jalr x1,1396(x1) # 8002a5a4 + +0000000080003038 : + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00008517 auipc x10,0x8 + 80003044: c7a50513 addi x10,x10,-902 # 8000acba + 80003048: 00000013 addi x0,x0,0 + 8000304c: 00000013 addi x0,x0,0 + 80003050: 00000013 addi x0,x0,0 + 80003054: 00000013 addi x0,x0,0 + 80003058: 00000013 addi x0,x0,0 + 8000305c: 00000013 addi x0,x0,0 + 80003060: 00027097 auipc x1,0x27 + 80003064: 544080e7 jalr x1,1348(x1) # 8002a5a4 + 80003068: 00007517 auipc x10,0x7 + 8000306c: 42852503 lw x10,1064(x10) # 8000a490 + 80003070: 00300593 addi x11,x0,3 + 80003074: 52b50c63 beq x10,x11,800035ac + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: c3c50513 addi x10,x10,-964 # 8000acbc + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 00007517 auipc x10,0x7 + 800030ac: 4e852503 lw x10,1256(x10) # 8000a590 + 800030b0: 02000593 addi x11,x0,32 + 800030b4: 00357613 andi x12,x10,3 + 800030b8: 00300693 addi x13,x0,3 + 800030bc: 00d60463 beq x12,x13,800030c4 + 800030c0: 01000593 addi x11,x0,16 + 800030c4: 3f4010ef jal x1,800044b8 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00007517 auipc x10,0x7 + 800030e4: 51850513 addi x10,x10,1304 # 8000a5f8 + 800030e8: 00000013 addi x0,x0,0 + 800030ec: 00000013 addi x0,x0,0 + 800030f0: 00000013 addi x0,x0,0 + 800030f4: 00000013 addi x0,x0,0 + 800030f8: 00000013 addi x0,x0,0 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00027097 auipc x1,0x27 + 80003104: 4a4080e7 jalr x1,1188(x1) # 8002a5a4 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00008517 auipc x10,0x8 + 80003124: bb050513 addi x10,x10,-1104 # 8000acd0 + 80003128: 00000013 addi x0,x0,0 + 8000312c: 00000013 addi x0,x0,0 + 80003130: 00000013 addi x0,x0,0 + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00027097 auipc x1,0x27 + 80003144: 464080e7 jalr x1,1124(x1) # 8002a5a4 + 80003148: 00007517 auipc x10,0x7 + 8000314c: 45053503 ld x10,1104(x10) # 8000a598 + 80003150: 04000593 addi x11,x0,64 + 80003154: 364010ef jal x1,800044b8 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00007517 auipc x10,0x7 + 80003164: 49850513 addi x10,x10,1176 # 8000a5f8 + 80003168: 00000013 addi x0,x0,0 + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00027097 auipc x1,0x27 + 80003184: 424080e7 jalr x1,1060(x1) # 8002a5a4 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00008517 auipc x10,0x8 + 800031a4: 56750513 addi x10,x10,1383 # 8000b707 + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00027097 auipc x1,0x27 + 800031c4: 3e4080e7 jalr x1,996(x1) # 8002a5a4 + 800031c8: 00007517 auipc x10,0x7 + 800031cc: 2c852503 lw x10,712(x10) # 8000a490 + 800031d0: 00050663 beq x10,x0,800031dc + 800031d4: 00300593 addi x11,x0,3 + 800031d8: 04b51063 bne x10,x11,80003218 + 800031dc: 07800593 addi x11,x0,120 + 800031e0: 00007617 auipc x12,0x7 + 800031e4: 41860613 addi x12,x12,1048 # 8000a5f8 + 800031e8: 00000013 addi x0,x0,0 + 800031ec: 00000013 addi x0,x0,0 + 800031f0: 00000013 addi x0,x0,0 + 800031f4: 00000013 addi x0,x0,0 + 800031f8: 00000013 addi x0,x0,0 + 800031fc: 00000013 addi x0,x0,0 + 80003200: 00b60023 sb x11,0(x12) + 80003204: 00160613 addi x12,x12,1 + 80003208: 00007517 auipc x10,0x7 + 8000320c: 38c52503 lw x10,908(x10) # 8000a594 + 80003210: 324010ef jal x1,80004534 + 80003214: 1180006f jal x0,8000332c + +0000000080003218 : + 80003218: 00100593 addi x11,x0,1 + 8000321c: 04b50863 beq x10,x11,8000326c + 80003220: 00400593 addi x11,x0,4 + 80003224: 08b50a63 beq x10,x11,800032b8 + 80003228: 00500593 addi x11,x0,5 + 8000322c: 0cb50463 beq x10,x11,800032f4 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00008517 auipc x10,0x8 + 80003244: 5dd50513 addi x10,x10,1501 # 8000b81d + 80003248: 00000013 addi x0,x0,0 + 8000324c: 00000013 addi x0,x0,0 + 80003250: 00000013 addi x0,x0,0 + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00027097 auipc x1,0x27 + 80003264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80003268: 1000006f jal x0,80003368 + +000000008000326c : + 8000326c: 06600593 addi x11,x0,102 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00007617 auipc x12,0x7 + 80003284: 37860613 addi x12,x12,888 # 8000a5f8 + 80003288: 00000013 addi x0,x0,0 + 8000328c: 00000013 addi x0,x0,0 + 80003290: 00000013 addi x0,x0,0 + 80003294: 00000013 addi x0,x0,0 + 80003298: 00000013 addi x0,x0,0 + 8000329c: 00000013 addi x0,x0,0 + 800032a0: 00b60023 sb x11,0(x12) + 800032a4: 00160613 addi x12,x12,1 + 800032a8: 00007517 auipc x10,0x7 + 800032ac: 2ec52503 lw x10,748(x10) # 8000a594 + 800032b0: 284010ef jal x1,80004534 + 800032b4: 0780006f jal x0,8000332c + +00000000800032b8 : + 800032b8: 07600593 addi x11,x0,118 + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007617 auipc x12,0x7 + 800032c4: 33860613 addi x12,x12,824 # 8000a5f8 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00b60023 sb x11,0(x12) + 800032e4: 00160613 addi x12,x12,1 + 800032e8: 00007517 auipc x10,0x7 + 800032ec: 2ac52503 lw x10,684(x10) # 8000a594 + 800032f0: 244010ef jal x1,80004534 + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 40050513 addi x10,x10,1024 # 8000b700 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 0400006f jal x0,80003368 + +000000008000332c : + 8000332c: 00000013 addi x0,x0,0 + 80003330: 00000013 addi x0,x0,0 + 80003334: 00000013 addi x0,x0,0 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 2b850513 addi x10,x10,696 # 8000a5f8 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + +0000000080003368 : + 80003368: 00000013 addi x0,x0,0 + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 39850513 addi x10,x10,920 # 8000b718 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: 0e852503 lw x10,232(x10) # 8000a490 + 800033b0: 00100593 addi x11,x0,1 + 800033b4: 00b51c63 bne x10,x11,800033cc + 800033b8: 00007517 auipc x10,0x7 + 800033bc: 1e853503 ld x10,488(x10) # 8000a5a0 + 800033c0: 04000593 addi x11,x0,64 + 800033c4: 0f4010ef jal x1,800044b8 + 800033c8: 0140006f jal x0,800033dc + +00000000800033cc : + 800033cc: 00007517 auipc x10,0x7 + 800033d0: 1d453503 ld x10,468(x10) # 8000a5a0 + 800033d4: 04000593 addi x11,x0,64 + 800033d8: 0e0010ef jal x1,800044b8 + +00000000800033dc : + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00007517 auipc x10,0x7 + 800033e4: 21850513 addi x10,x10,536 # 8000a5f8 + 800033e8: 00000013 addi x0,x0,0 + 800033ec: 00000013 addi x0,x0,0 + 800033f0: 00000013 addi x0,x0,0 + 800033f4: 00000013 addi x0,x0,0 + 800033f8: 00000013 addi x0,x0,0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00027097 auipc x1,0x27 + 80003404: 1a4080e7 jalr x1,420(x1) # 8002a5a4 + 80003408: 00007517 auipc x10,0x7 + 8000340c: 1b052503 lw x10,432(x10) # 8000a5b8 + 80003410: 08051e63 bne x10,x0,800034ac + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00008517 auipc x10,0x8 + 80003424: 30f50513 addi x10,x10,783 # 8000b72f + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00027097 auipc x1,0x27 + 80003444: 164080e7 jalr x1,356(x1) # 8002a5a4 + 80003448: 00007517 auipc x10,0x7 + 8000344c: 04852503 lw x10,72(x10) # 8000a490 + 80003450: 00100593 addi x11,x0,1 + 80003454: 00b51c63 bne x10,x11,8000346c + 80003458: 00007517 auipc x10,0x7 + 8000345c: 15053503 ld x10,336(x10) # 8000a5a8 + 80003460: 04000593 addi x11,x0,64 + 80003464: 054010ef jal x1,800044b8 + 80003468: 0140006f jal x0,8000347c + +000000008000346c : + 8000346c: 00007517 auipc x10,0x7 + 80003470: 13c53503 ld x10,316(x10) # 8000a5a8 + 80003474: 04000593 addi x11,x0,64 + 80003478: 040010ef jal x1,800044b8 + +000000008000347c : + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 17850513 addi x10,x10,376 # 8000a5f8 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 5bd0006f jal x0,80004264 + +00000000800034ac : + 800034ac: 00100593 addi x11,x0,1 + 800034b0: 06b51e63 bne x10,x11,8000352c + +00000000800034b4 : + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 28650513 addi x10,x10,646 # 8000b746 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: 0c053503 ld x10,192(x10) # 8000a5a8 + 800034f0: 02000593 addi x11,x0,32 + 800034f4: 7c5000ef jal x1,800044b8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: 0f850513 addi x10,x10,248 # 8000a5f8 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 53d0006f jal x0,80004264 + +000000008000352c : + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 26450513 addi x10,x10,612 # 8000b7a4 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: 04053503 ld x10,64(x10) # 8000a5a8 + 80003570: 04000593 addi x11,x0,64 + 80003574: 745000ef jal x1,800044b8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: 07850513 addi x10,x10,120 # 8000a5f8 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 4bd0006f jal x0,80004264 + +00000000800035ac : + 800035ac: 00007417 auipc x8,0x7 + 800035b0: 01442403 lw x8,20(x8) # 8000a5c0 + 800035b4: 00900493 addi x9,x0,9 + 800035b8: 0a940c63 beq x8,x9,80003670 + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 28950513 addi x10,x10,649 # 8000b849 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 27550513 addi x10,x10,629 # 8000b875 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007817 auipc x16,0x7 + 8000362c: fa080813 addi x16,x16,-96 # 8000a5c8 + 80003630: 00083503 ld x10,0(x16) + 80003634: 00027097 auipc x1,0x27 + 80003638: f70080e7 jalr x1,-144(x1) # 8002a5a4 + 8000363c: 00000013 addi x0,x0,0 + 80003640: 00007517 auipc x10,0x7 + 80003644: 67a50513 addi x10,x10,1658 # 8000acba + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00027097 auipc x1,0x27 + 80003664: f44080e7 jalr x1,-188(x1) # 8002a5a4 + 80003668: 280404e3 beq x8,x0,800040f0 + 8000366c: 3400006f jal x0,800039ac + +0000000080003670 : + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00008517 auipc x10,0x8 + 80003684: 20550513 addi x10,x10,517 # 8000b885 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00027097 auipc x1,0x27 + 800036a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800036a8: 00007517 auipc x10,0x7 + 800036ac: f0053503 ld x10,-256(x10) # 8000a5a8 + 800036b0: 04000593 addi x11,x0,64 + 800036b4: 605000ef jal x1,800044b8 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00007517 auipc x10,0x7 + 800036c4: f3850513 addi x10,x10,-200 # 8000a5f8 + 800036c8: 00000013 addi x0,x0,0 + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00027097 auipc x1,0x27 + 800036e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00008517 auipc x10,0x8 + 80003704: 1b050513 addi x10,x10,432 # 8000b8b0 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00027097 auipc x1,0x27 + 80003724: e84080e7 jalr x1,-380(x1) # 8002a5a4 + 80003728: 00007517 auipc x10,0x7 + 8000372c: e7853503 ld x10,-392(x10) # 8000a5a0 + 80003730: 04000593 addi x11,x0,64 + 80003734: 585000ef jal x1,800044b8 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00007517 auipc x10,0x7 + 80003744: eb850513 addi x10,x10,-328 # 8000a5f8 + 80003748: 00000013 addi x0,x0,0 + 8000374c: 00000013 addi x0,x0,0 + 80003750: 00000013 addi x0,x0,0 + 80003754: 00000013 addi x0,x0,0 + 80003758: 00000013 addi x0,x0,0 + 8000375c: 00000013 addi x0,x0,0 + 80003760: 00027097 auipc x1,0x27 + 80003764: e44080e7 jalr x1,-444(x1) # 8002a5a4 + 80003768: 00007317 auipc x6,0x7 + 8000376c: e3833303 ld x6,-456(x6) # 8000a5a0 + 80003770: 00007397 auipc x7,0x7 + 80003774: e383b383 ld x7,-456(x7) # 8000a5a8 + 80003778: 10736a63 bltu x6,x7,8000388c + +000000008000377c : + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00008517 auipc x10,0x8 + 80003784: 15f50513 addi x10,x10,351 # 8000b8df + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 18750513 addi x10,x10,391 # 8000b947 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 00007317 auipc x6,0x7 + 800037ec: db833303 ld x6,-584(x6) # 8000a5a0 + 800037f0: 00007397 auipc x7,0x7 + 800037f4: db83b383 ld x7,-584(x7) # 8000a5a8 + 800037f8: 40730533 sub x10,x6,x7 + 800037fc: 04000593 addi x11,x0,64 + 80003800: 4b9000ef jal x1,800044b8 + 80003804: 00000013 addi x0,x0,0 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00007517 auipc x10,0x7 + 80003824: dd850513 addi x10,x10,-552 # 8000a5f8 + 80003828: 00000013 addi x0,x0,0 + 8000382c: 00000013 addi x0,x0,0 + 80003830: 00000013 addi x0,x0,0 + 80003834: 00000013 addi x0,x0,0 + 80003838: 00000013 addi x0,x0,0 + 8000383c: 00000013 addi x0,x0,0 + 80003840: 00027097 auipc x1,0x27 + 80003844: d64080e7 jalr x1,-668(x1) # 8002a5a4 + 80003848: 00000013 addi x0,x0,0 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 10e50513 addi x10,x10,270 # 8000b96e + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 00027097 auipc x1,0x27 + 80003884: d24080e7 jalr x1,-732(x1) # 8002a5a4 + 80003888: 1dd0006f jal x0,80004264 + +000000008000388c : + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 06b50513 addi x10,x10,107 # 8000b90b + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 00027097 auipc x1,0x27 + 800038c4: ce4080e7 jalr x1,-796(x1) # 8002a5a4 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 06750513 addi x10,x10,103 # 8000b947 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 00027097 auipc x1,0x27 + 80003904: ca4080e7 jalr x1,-860(x1) # 8002a5a4 + 80003908: 00007317 auipc x6,0x7 + 8000390c: ca033303 ld x6,-864(x6) # 8000a5a8 + 80003910: 00007397 auipc x7,0x7 + 80003914: c903b383 ld x7,-880(x7) # 8000a5a0 + 80003918: 40730533 sub x10,x6,x7 + 8000391c: 04000593 addi x11,x0,64 + 80003920: 399000ef jal x1,800044b8 + 80003924: 00000013 addi x0,x0,0 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 00007517 auipc x10,0x7 + 80003944: cb850513 addi x10,x10,-840 # 8000a5f8 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00027097 auipc x1,0x27 + 80003964: c44080e7 jalr x1,-956(x1) # 8002a5a4 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + 80003980: 00008517 auipc x10,0x8 + 80003984: 0d650513 addi x10,x10,214 # 8000ba56 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00027097 auipc x1,0x27 + 800039a4: c04080e7 jalr x1,-1020(x1) # 8002a5a4 + 800039a8: 0bd0006f jal x0,80004264 + +00000000800039ac : + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00008517 auipc x10,0x8 + 800039c4: 17d50513 addi x10,x10,381 # 8000bb3d + 800039c8: 00000013 addi x0,x0,0 + 800039cc: 00000013 addi x0,x0,0 + 800039d0: 00000013 addi x0,x0,0 + 800039d4: 00000013 addi x0,x0,0 + 800039d8: 00000013 addi x0,x0,0 + 800039dc: 00000013 addi x0,x0,0 + 800039e0: 00027097 auipc x1,0x27 + 800039e4: bc4080e7 jalr x1,-1084(x1) # 8002a5a4 + 800039e8: 00007517 auipc x10,0x7 + 800039ec: bdc52503 lw x10,-1060(x10) # 8000a5c4 + 800039f0: 04050a63 beq x10,x0,80003a44 + 800039f4: 00100593 addi x11,x0,1 + 800039f8: 08b50663 beq x10,x11,80003a84 + 800039fc: 00200593 addi x11,x0,2 + 80003a00: 0cb50263 beq x10,x11,80003ac4 + 80003a04: 00300593 addi x11,x0,3 + 80003a08: 0eb50e63 beq x10,x11,80003b04 + 80003a0c: 00000013 addi x0,x0,0 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 15950513 addi x10,x10,345 # 8000bb79 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 1000006f jal x0,80003b40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: 0f750513 addi x10,x10,247 # 8000bb57 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 0c00006f jal x0,80003b40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: 0bf50513 addi x10,x10,191 # 8000bb5f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 0800006f jal x0,80003b40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: 08750513 addi x10,x10,135 # 8000bb67 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 0400006f jal x0,80003b40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: 05050513 addi x10,x10,80 # 8000bb70 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + +0000000080003b40 : + 80003b40: 00027097 auipc x1,0x27 + 80003b44: a64080e7 jalr x1,-1436(x1) # 8002a5a4 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: 02250513 addi x10,x10,34 # 8000bb82 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 00027097 auipc x1,0x27 + 80003b84: a24080e7 jalr x1,-1500(x1) # 8002a5a4 + 80003b88: 00007517 auipc x10,0x7 + 80003b8c: a3852503 lw x10,-1480(x10) # 8000a5c0 + 80003b90: 00100593 addi x11,x0,1 + 80003b94: 06b50863 beq x10,x11,80003c04 + 80003b98: 00200593 addi x11,x0,2 + 80003b9c: 0ab50463 beq x10,x11,80003c44 + 80003ba0: 00300593 addi x11,x0,3 + 80003ba4: 0eb50063 beq x10,x11,80003c84 + 80003ba8: 00400593 addi x11,x0,4 + 80003bac: 10b50c63 beq x10,x11,80003cc4 + 80003bb0: 00500593 addi x11,x0,5 + 80003bb4: 14b50863 beq x10,x11,80003d04 + 80003bb8: 00600593 addi x11,x0,6 + 80003bbc: 18b50463 beq x10,x11,80003d44 + 80003bc0: 00700593 addi x11,x0,7 + 80003bc4: 1cb50063 beq x10,x11,80003d84 + 80003bc8: 00800593 addi x11,x0,8 + 80003bcc: 1eb50c63 beq x10,x11,80003dc4 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: 0f950513 addi x10,x10,249 # 8000bcd9 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 2000006f jal x0,80003e00 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: f7c50513 addi x10,x10,-132 # 8000bb9c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + 80003c40: 1c00006f jal x0,80003e00 + +0000000080003c44 : + 80003c44: 00000013 addi x0,x0,0 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: f6d50513 addi x10,x10,-147 # 8000bbcd + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 1800006f jal x0,80003e00 + +0000000080003c84 : + 80003c84: 00000013 addi x0,x0,0 + 80003c88: 00000013 addi x0,x0,0 + 80003c8c: 00000013 addi x0,x0,0 + 80003c90: 00000013 addi x0,x0,0 + 80003c94: 00000013 addi x0,x0,0 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00008517 auipc x10,0x8 + 80003ca4: f4d50513 addi x10,x10,-179 # 8000bbed + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 1400006f jal x0,80003e00 + +0000000080003cc4 : + 80003cc4: 00000013 addi x0,x0,0 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: f2b50513 addi x10,x10,-213 # 8000bc0b + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 1000006f jal x0,80003e00 + +0000000080003d04 : + 80003d04: 00000013 addi x0,x0,0 + 80003d08: 00000013 addi x0,x0,0 + 80003d0c: 00000013 addi x0,x0,0 + 80003d10: 00000013 addi x0,x0,0 + 80003d14: 00000013 addi x0,x0,0 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00008517 auipc x10,0x8 + 80003d24: f0a50513 addi x10,x10,-246 # 8000bc2a + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 0c00006f jal x0,80003e00 + +0000000080003d44 : + 80003d44: 00000013 addi x0,x0,0 + 80003d48: 00000013 addi x0,x0,0 + 80003d4c: 00000013 addi x0,x0,0 + 80003d50: 00000013 addi x0,x0,0 + 80003d54: 00000013 addi x0,x0,0 + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: ef250513 addi x10,x10,-270 # 8000bc52 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 0800006f jal x0,80003e00 + +0000000080003d84 : + 80003d84: 00000013 addi x0,x0,0 + 80003d88: 00000013 addi x0,x0,0 + 80003d8c: 00000013 addi x0,x0,0 + 80003d90: 00000013 addi x0,x0,0 + 80003d94: 00000013 addi x0,x0,0 + 80003d98: 00000013 addi x0,x0,0 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: ede50513 addi x10,x10,-290 # 8000bc7e + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 0400006f jal x0,80003e00 + +0000000080003dc4 : + 80003dc4: 00000013 addi x0,x0,0 + 80003dc8: 00000013 addi x0,x0,0 + 80003dcc: 00000013 addi x0,x0,0 + 80003dd0: 00000013 addi x0,x0,0 + 80003dd4: 00000013 addi x0,x0,0 + 80003dd8: 00000013 addi x0,x0,0 + 80003ddc: 00000013 addi x0,x0,0 + 80003de0: 00008517 auipc x10,0x8 + 80003de4: eca50513 addi x10,x10,-310 # 8000bcaa + 80003de8: 00000013 addi x0,x0,0 + 80003dec: 00000013 addi x0,x0,0 + 80003df0: 00000013 addi x0,x0,0 + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + +0000000080003e00 : + 80003e00: 00026097 auipc x1,0x26 + 80003e04: 7a4080e7 jalr x1,1956(x1) # 8002a5a4 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00008517 auipc x10,0x8 + 80003e24: ec850513 addi x10,x10,-312 # 8000bce8 + 80003e28: 00000013 addi x0,x0,0 + 80003e2c: 00000013 addi x0,x0,0 + 80003e30: 00000013 addi x0,x0,0 + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00026097 auipc x1,0x26 + 80003e44: 764080e7 jalr x1,1892(x1) # 8002a5a4 + 80003e48: 00006517 auipc x10,0x6 + 80003e4c: 76053503 ld x10,1888(x10) # 8000a5a8 + 80003e50: 04000593 addi x11,x0,64 + 80003e54: 664000ef jal x1,800044b8 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00006517 auipc x10,0x6 + 80003e64: 79850513 addi x10,x10,1944 # 8000a5f8 + 80003e68: 00000013 addi x0,x0,0 + 80003e6c: 00000013 addi x0,x0,0 + 80003e70: 00000013 addi x0,x0,0 + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00026097 auipc x1,0x26 + 80003e84: 724080e7 jalr x1,1828(x1) # 8002a5a4 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00008517 auipc x10,0x8 + 80003ea4: e5f50513 addi x10,x10,-417 # 8000bcff + 80003ea8: 00000013 addi x0,x0,0 + 80003eac: 00000013 addi x0,x0,0 + 80003eb0: 00000013 addi x0,x0,0 + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00026097 auipc x1,0x26 + 80003ec4: 6e4080e7 jalr x1,1764(x1) # 8002a5a4 + 80003ec8: 00006517 auipc x10,0x6 + 80003ecc: 6d853503 ld x10,1752(x10) # 8000a5a0 + 80003ed0: 04000593 addi x11,x0,64 + 80003ed4: 5e4000ef jal x1,800044b8 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00006517 auipc x10,0x6 + 80003ee4: 71850513 addi x10,x10,1816 # 8000a5f8 + 80003ee8: 00000013 addi x0,x0,0 + 80003eec: 00000013 addi x0,x0,0 + 80003ef0: 00000013 addi x0,x0,0 + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00026097 auipc x1,0x26 + 80003f04: 6a4080e7 jalr x1,1700(x1) # 8002a5a4 + 80003f08: 00006517 auipc x10,0x6 + 80003f0c: 6b852503 lw x10,1720(x10) # 8000a5c0 + 80003f10: 00200593 addi x11,x0,2 + 80003f14: 08b51463 bne x10,x11,80003f9c + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00008517 auipc x10,0x8 + 80003f24: df650513 addi x10,x10,-522 # 8000bd16 + 80003f28: 00000013 addi x0,x0,0 + 80003f2c: 00000013 addi x0,x0,0 + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00026097 auipc x1,0x26 + 80003f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80003f48: 00006517 auipc x10,0x6 + 80003f4c: 66053503 ld x10,1632(x10) # 8000a5a8 + 80003f50: 284000ef jal x1,800041d4 + 80003f54: 00026097 auipc x1,0x26 + 80003f58: 650080e7 jalr x1,1616(x1) # 8002a5a4 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00008517 auipc x10,0x8 + 80003f64: dcd50513 addi x10,x10,-563 # 8000bd2d + 80003f68: 00000013 addi x0,x0,0 + 80003f6c: 00000013 addi x0,x0,0 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00026097 auipc x1,0x26 + 80003f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80003f88: 00006517 auipc x10,0x6 + 80003f8c: 61853503 ld x10,1560(x10) # 8000a5a0 + 80003f90: 244000ef jal x1,800041d4 + 80003f94: 00026097 auipc x1,0x26 + 80003f98: 610080e7 jalr x1,1552(x1) # 8002a5a4 + +0000000080003f9c : + 80003f9c: 00000097 auipc x1,0x0 + 80003fa0: 314080e7 jalr x1,788(x1) # 800042b0 + 80003fa4: 00006517 auipc x10,0x6 + 80003fa8: 61c52503 lw x10,1564(x10) # 8000a5c0 + 80003fac: 00100593 addi x11,x0,1 + 80003fb0: 02b51e63 bne x10,x11,80003fec + 80003fb4: 00000013 addi x0,x0,0 + 80003fb8: 00000013 addi x0,x0,0 + 80003fbc: 00000013 addi x0,x0,0 + 80003fc0: 00008517 auipc x10,0x8 + 80003fc4: de350513 addi x10,x10,-541 # 8000bda3 + 80003fc8: 00000013 addi x0,x0,0 + 80003fcc: 00000013 addi x0,x0,0 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00026097 auipc x1,0x26 + 80003fe4: 5c4080e7 jalr x1,1476(x1) # 8002a5a4 + 80003fe8: 27c0006f jal x0,80004264 + 80003fec: 00200593 addi x11,x0,2 + 80003ff0: 02b51e63 bne x10,x11,8000402c + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00008517 auipc x10,0x8 + 80004004: e7950513 addi x10,x10,-391 # 8000be79 + 80004008: 00000013 addi x0,x0,0 + 8000400c: 00000013 addi x0,x0,0 + 80004010: 00000013 addi x0,x0,0 + 80004014: 00000013 addi x0,x0,0 + 80004018: 00000013 addi x0,x0,0 + 8000401c: 00000013 addi x0,x0,0 + 80004020: 00026097 auipc x1,0x26 + 80004024: 584080e7 jalr x1,1412(x1) # 8002a5a4 + 80004028: 23c0006f jal x0,80004264 + 8000402c: 00300593 addi x11,x0,3 + 80004030: 02b51e63 bne x10,x11,8000406c + 80004034: 00000013 addi x0,x0,0 + 80004038: 00000013 addi x0,x0,0 + 8000403c: 00000013 addi x0,x0,0 + 80004040: 00008517 auipc x10,0x8 + 80004044: f2c50513 addi x10,x10,-212 # 8000bf6c + 80004048: 00000013 addi x0,x0,0 + 8000404c: 00000013 addi x0,x0,0 + 80004050: 00000013 addi x0,x0,0 + 80004054: 00000013 addi x0,x0,0 + 80004058: 00000013 addi x0,x0,0 + 8000405c: 00000013 addi x0,x0,0 + 80004060: 00026097 auipc x1,0x26 + 80004064: 544080e7 jalr x1,1348(x1) # 8002a5a4 + 80004068: 1fc0006f jal x0,80004264 + 8000406c: 00400593 addi x11,x0,4 + 80004070: 02b51e63 bne x10,x11,800040ac + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00008517 auipc x10,0x8 + 80004084: fe750513 addi x10,x10,-25 # 8000c067 + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00026097 auipc x1,0x26 + 800040a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800040a8: 1bc0006f jal x0,80004264 + 800040ac: 00500593 addi x11,x0,5 + 800040b0: 02b51e63 bne x10,x11,800040ec + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00008517 auipc x10,0x8 + 800040c4: 08e50513 addi x10,x10,142 # 8000c14e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + 800040e8: 17c0006f jal x0,80004264 + 800040ec: 1780006f jal x0,80004264 + +00000000800040f0 : + 800040f0: 00000013 addi x0,x0,0 + 800040f4: 00000013 addi x0,x0,0 + 800040f8: 00000013 addi x0,x0,0 + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00008517 auipc x10,0x8 + 80004104: c5b50513 addi x10,x10,-933 # 8000bd5b + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006617 auipc x12,0x6 + 8000412c: 4b063603 ld x12,1200(x12) # 8000a5d8 + 80004130: 00000013 addi x0,x0,0 + 80004134: 00000013 addi x0,x0,0 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00007517 auipc x10,0x7 + 80004144: c0450513 addi x10,x10,-1020 # 8000ad44 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00065503 lhu x10,0(x12) + 8000416c: 01000593 addi x11,x0,16 + 80004170: 00357413 andi x8,x10,3 + 80004174: 00300493 addi x9,x0,3 + 80004178: 00941a63 bne x8,x9,8000418c + 8000417c: 00265403 lhu x8,2(x12) + 80004180: 01041413 slli x8,x8,0x10 + 80004184: 00856533 or x10,x10,x8 + 80004188: 02000593 addi x11,x0,32 + 8000418c: 32c000ef jal x1,800044b8 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00006517 auipc x10,0x6 + 800041a4: 45850513 addi x10,x10,1112 # 8000a5f8 + 800041a8: 00000013 addi x0,x0,0 + 800041ac: 00000013 addi x0,x0,0 + 800041b0: 00000013 addi x0,x0,0 + 800041b4: 00000013 addi x0,x0,0 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00026097 auipc x1,0x26 + 800041c4: 3e4080e7 jalr x1,996(x1) # 8002a5a4 + 800041c8: 00000097 auipc x1,0x0 + 800041cc: 0e8080e7 jalr x1,232(x1) # 800042b0 + 800041d0: 0940006f jal x0,80004264 + +00000000800041d4 : + 800041d4: 02054463 blt x10,x0,800041fc + +00000000800041d8 : + 800041d8: 01800593 addi x11,x0,24 + 800041dc: 04b55863 bge x10,x11,8000422c + 800041e0: 00006597 auipc x11,0x6 + 800041e4: 44058593 addi x11,x11,1088 # 8000a620 + 800041e8: 00251613 slli x12,x10,0x2 + 800041ec: 00351613 slli x12,x10,0x3 + 800041f0: 00c585b3 add x11,x11,x12 + 800041f4: 0005b503 ld x10,0(x11) + 800041f8: 00008067 jalr x0,0(x1) + +00000000800041fc : + 800041fc: 00100593 addi x11,x0,1 + 80004200: 03f59593 slli x11,x11,0x3f + 80004204: 00b54533 xor x10,x10,x11 + 80004208: 01000593 addi x11,x0,16 + 8000420c: 02b55063 bge x10,x11,8000422c + 80004210: 00006597 auipc x11,0x6 + 80004214: 4d058593 addi x11,x11,1232 # 8000a6e0 + 80004218: 00251613 slli x12,x10,0x2 + 8000421c: 00351613 slli x12,x10,0x3 + 80004220: 00c585b3 add x11,x11,x12 + 80004224: 0005b503 ld x10,0(x11) + 80004228: 00008067 jalr x0,0(x1) + +000000008000422c : + 8000422c: 00000013 addi x0,x0,0 + 80004230: 00000013 addi x0,x0,0 + 80004234: 00000013 addi x0,x0,0 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00007517 auipc x10,0x7 + 80004244: 91e50513 addi x10,x10,-1762 # 8000ab5e + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00008067 jalr x0,0(x1) + +0000000080004264 : + 80004264: 00000013 addi x0,x0,0 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 57c50513 addi x10,x10,1404 # 8000b7fc + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + +00000000800042a8 : + 800042a8: 00026097 auipc x1,0x26 + 800042ac: 35c080e7 jalr x1,860(x1) # 8002a604 + +00000000800042b0 : + 800042b0: 00006617 auipc x12,0x6 + 800042b4: 32060613 addi x12,x12,800 # 8000a5d0 + 800042b8: 00163023 sd x1,0(x12) + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00007517 auipc x10,0x7 + 800042c4: aa550513 addi x10,x10,-1371 # 8000ad65 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006517 auipc x10,0x6 + 800042ec: 2f053503 ld x10,752(x10) # 8000a5d8 + 800042f0: 04000593 addi x11,x0,64 + 800042f4: 1c4000ef jal x1,800044b8 + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006517 auipc x10,0x6 + 80004304: 2f850513 addi x10,x10,760 # 8000a5f8 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 00026097 auipc x1,0x26 + 80004324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80004328: 00000013 addi x0,x0,0 + 8000432c: 00000013 addi x0,x0,0 + 80004330: 00000013 addi x0,x0,0 + 80004334: 00000013 addi x0,x0,0 + 80004338: 00000013 addi x0,x0,0 + 8000433c: 00000013 addi x0,x0,0 + 80004340: 00007517 auipc x10,0x7 + 80004344: a3550513 addi x10,x10,-1483 # 8000ad75 + 80004348: 00000013 addi x0,x0,0 + 8000434c: 00000013 addi x0,x0,0 + 80004350: 00000013 addi x0,x0,0 + 80004354: 00000013 addi x0,x0,0 + 80004358: 00000013 addi x0,x0,0 + 8000435c: 00000013 addi x0,x0,0 + 80004360: 00026097 auipc x1,0x26 + 80004364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80004368: 00006517 auipc x10,0x6 + 8000436c: 27853503 ld x10,632(x10) # 8000a5e0 + 80004370: 04000593 addi x11,x0,64 + 80004374: 144000ef jal x1,800044b8 + 80004378: 00000013 addi x0,x0,0 + 8000437c: 00000013 addi x0,x0,0 + 80004380: 00006517 auipc x10,0x6 + 80004384: 27850513 addi x10,x10,632 # 8000a5f8 + 80004388: 00000013 addi x0,x0,0 + 8000438c: 00000013 addi x0,x0,0 + 80004390: 00000013 addi x0,x0,0 + 80004394: 00000013 addi x0,x0,0 + 80004398: 00000013 addi x0,x0,0 + 8000439c: 00000013 addi x0,x0,0 + 800043a0: 00026097 auipc x1,0x26 + 800043a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800043a8: 00000013 addi x0,x0,0 + 800043ac: 00000013 addi x0,x0,0 + 800043b0: 00000013 addi x0,x0,0 + 800043b4: 00000013 addi x0,x0,0 + 800043b8: 00000013 addi x0,x0,0 + 800043bc: 00000013 addi x0,x0,0 + 800043c0: 00007517 auipc x10,0x7 + 800043c4: 9c550513 addi x10,x10,-1595 # 8000ad85 + 800043c8: 00000013 addi x0,x0,0 + 800043cc: 00000013 addi x0,x0,0 + 800043d0: 00000013 addi x0,x0,0 + 800043d4: 00000013 addi x0,x0,0 + 800043d8: 00000013 addi x0,x0,0 + 800043dc: 00000013 addi x0,x0,0 + 800043e0: 00026097 auipc x1,0x26 + 800043e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800043e8: 00006517 auipc x10,0x6 + 800043ec: 20053503 ld x10,512(x10) # 8000a5e8 + 800043f0: 04000593 addi x11,x0,64 + 800043f4: 0c4000ef jal x1,800044b8 + 800043f8: 00000013 addi x0,x0,0 + 800043fc: 00000013 addi x0,x0,0 + 80004400: 00006517 auipc x10,0x6 + 80004404: 1f850513 addi x10,x10,504 # 8000a5f8 + 80004408: 00000013 addi x0,x0,0 + 8000440c: 00000013 addi x0,x0,0 + 80004410: 00000013 addi x0,x0,0 + 80004414: 00000013 addi x0,x0,0 + 80004418: 00000013 addi x0,x0,0 + 8000441c: 00000013 addi x0,x0,0 + 80004420: 00026097 auipc x1,0x26 + 80004424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80004428: 00000013 addi x0,x0,0 + 8000442c: 00000013 addi x0,x0,0 + 80004430: 00000013 addi x0,x0,0 + 80004434: 00000013 addi x0,x0,0 + 80004438: 00000013 addi x0,x0,0 + 8000443c: 00000013 addi x0,x0,0 + 80004440: 00007517 auipc x10,0x7 + 80004444: 95550513 addi x10,x10,-1707 # 8000ad95 + 80004448: 00000013 addi x0,x0,0 + 8000444c: 00000013 addi x0,x0,0 + 80004450: 00000013 addi x0,x0,0 + 80004454: 00000013 addi x0,x0,0 + 80004458: 00000013 addi x0,x0,0 + 8000445c: 00000013 addi x0,x0,0 + 80004460: 00026097 auipc x1,0x26 + 80004464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80004468: 00006517 auipc x10,0x6 + 8000446c: 18853503 ld x10,392(x10) # 8000a5f0 + 80004470: 04000593 addi x11,x0,64 + 80004474: 044000ef jal x1,800044b8 + 80004478: 00000013 addi x0,x0,0 + 8000447c: 00000013 addi x0,x0,0 + 80004480: 00006517 auipc x10,0x6 + 80004484: 17850513 addi x10,x10,376 # 8000a5f8 + 80004488: 00000013 addi x0,x0,0 + 8000448c: 00000013 addi x0,x0,0 + 80004490: 00000013 addi x0,x0,0 + 80004494: 00000013 addi x0,x0,0 + 80004498: 00000013 addi x0,x0,0 + 8000449c: 00000013 addi x0,x0,0 + 800044a0: 00026097 auipc x1,0x26 + 800044a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800044a8: 00006617 auipc x12,0x6 + 800044ac: 12860613 addi x12,x12,296 # 8000a5d0 + 800044b0: 00063083 ld x1,0(x12) + 800044b4: 00008067 jalr x0,0(x1) + +00000000800044b8 : + 800044b8: 00000013 addi x0,x0,0 + 800044bc: 00000013 addi x0,x0,0 + 800044c0: 00006617 auipc x12,0x6 + 800044c4: 13860613 addi x12,x12,312 # 8000a5f8 + 800044c8: 00000013 addi x0,x0,0 + 800044cc: 00000013 addi x0,x0,0 + 800044d0: 00000013 addi x0,x0,0 + 800044d4: 00000013 addi x0,x0,0 + 800044d8: 00000013 addi x0,x0,0 + 800044dc: 00000013 addi x0,x0,0 + 800044e0: 03000693 addi x13,x0,48 + 800044e4: 00d60023 sb x13,0(x12) + 800044e8: 07800693 addi x13,x0,120 + 800044ec: 00d600a3 sb x13,1(x12) + 800044f0: 00260613 addi x12,x12,2 + 800044f4: 00058693 addi x13,x11,0 + +00000000800044f8 : + 800044f8: ffc68693 addi x13,x13,-4 + 800044fc: 00d55733 srl x14,x10,x13 + 80004500: 00f77713 andi x14,x14,15 + 80004504: 00a00793 addi x15,x0,10 + 80004508: 00f74663 blt x14,x15,80004514 + 8000450c: 05770713 addi x14,x14,87 + 80004510: 0080006f jal x0,80004518 + +0000000080004514 : + 80004514: 03070713 addi x14,x14,48 + +0000000080004518 : + 80004518: 00e60023 sb x14,0(x12) + 8000451c: 00160613 addi x12,x12,1 + 80004520: fc069ce3 bne x13,x0,800044f8 + 80004524: 00a00693 addi x13,x0,10 + 80004528: 00d60023 sb x13,0(x12) + 8000452c: 000600a3 sb x0,1(x12) + 80004530: 00008067 jalr x0,0(x1) + +0000000080004534 : + 80004534: 00a00693 addi x13,x0,10 + 80004538: 02d54663 blt x10,x13,80004564 + 8000453c: ff650513 addi x10,x10,-10 + 80004540: 03100713 addi x14,x0,49 + 80004544: 00d54c63 blt x10,x13,8000455c + 80004548: ff650513 addi x10,x10,-10 + 8000454c: 03200713 addi x14,x0,50 + 80004550: 00d54663 blt x10,x13,8000455c + 80004554: ff650513 addi x10,x10,-10 + 80004558: 03300713 addi x14,x0,51 + 8000455c: 00e60023 sb x14,0(x12) + 80004560: 00160613 addi x12,x12,1 + 80004564: 03050513 addi x10,x10,48 + 80004568: 00a60023 sb x10,0(x12) + 8000456c: 00a00693 addi x13,x0,10 + 80004570: 00d600a3 sb x13,1(x12) + 80004574: 00060123 sb x0,2(x12) + 80004578: 00008067 jalr x0,0(x1) + 8000457c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 47038393 addi x7,x7,1136 # 80002478 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 45838393 addi x7,x7,1112 # 80002478 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 44038393 addi x7,x7,1088 # 80002478 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 42c38393 addi x7,x7,1068 # 80002478 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 42038393 addi x7,x7,1056 # 80002478 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 3ec38393 addi x7,x7,1004 # 80002478 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 53430313 addi x6,x6,1332 # 800015cc + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 3d438393 addi x7,x7,980 # 80002478 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 51c30313 addi x6,x6,1308 # 800015cc + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 3bc38393 addi x7,x7,956 # 80002478 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 50430313 addi x6,x6,1284 # 800015cc + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 3a438393 addi x7,x7,932 # 80002478 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 39c78793 addi x15,x15,924 # 800015dc + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: da010113 addi x2,x2,-608 # 8000c280 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 46018193 addi x3,x3,1120 # 80002980 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b825 .word 0x8000b825 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 61828293 addi x5,x5,1560 # 80029c00 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 5f828293 addi x5,x5,1528 # 80029c00 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknd-aes64ks2-00.elf.objdump b/riscv-tests/rv64-Zknd-aes64ks2-00.elf.objdump new file mode 100644 index 0000000..8c80c55 --- /dev/null +++ b/riscv-tests/rv64-Zknd-aes64ks2-00.elf.objdump @@ -0,0 +1,17095 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ks2-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknd/Zknd-aes64ks2-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002cd20 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038e00 0000000080038e00 00037e00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031be 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 0000000000000000 0000000000000000 0003b879 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8f7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b91a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b930 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 0000000000000000 0000000000000000 0003b970 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9fc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038e00 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccqYFew4.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800390e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b0 +0000000080007d00 l .text.rvtest 0000000000000000 failedtest_x5_x4 +000000008000e470 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b1 +000000008000e4a5 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b2 +000000008000e4da l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b3 +000000008000e50f l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b4 +0000000080007d18 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008000e544 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b5 +000000008000e579 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b6 +000000008000e5ae l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b6_str +00000000800001d4 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b7 +0000000080007d40 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008000e5e3 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b7_str +0000000080000208 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b8 +000000008000e618 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b8_str +000000008000023c l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b9 +000000008000e64d l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b9_str +0000000080000270 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b10 +000000008000e683 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b10_str +00000000800002a4 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b11 +000000008000e6ba l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b11_str +00000000800002d8 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b12 +000000008000e6f1 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b12_str +0000000080000314 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b13 +000000008000e728 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b13_str +0000000080000348 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b14 +000000008000e75f l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b14_str +0000000080000380 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b15 +000000008000e796 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b15_str +00000000800003b4 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b16 +000000008000e7cd l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b16_str +00000000800003e8 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b17 +000000008000e804 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b17_str +000000008000041c l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b18 +000000008000e83b l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b18_str +0000000080000450 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b19 +000000008000e872 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b19_str +0000000080000484 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b20 +000000008000e8a9 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b20_str +00000000800004b8 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b21 +000000008000e8e0 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b21_str +00000000800004ec l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b22 +000000008000e917 l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b22_str +0000000080000520 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b23 +000000008000e94e l .data 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b23_str +0000000080000558 l .text.rvtest 0000000000000000 Zknd_aes64ks2_cg_cp_rs1_b24 +000000008000e985 l .data 0000000000000000 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0000000000000000 cleanup_epilogs +000000008003a000 g .text.rvmodel 0000000000000000 _end +0000000080038f00 g .tohost 0000000000000000 fromhost +0000000080038e00 g .tohost 0000000000000000 tohost +0000000080006bf0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080006cc0 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xeff4ee8ecf9dd120 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xfef14da62de48e1f + 80000048: 0001b403 ld x8,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zknd_aes64ks2_cg_cp_rs1_b0: + aes64ks2 x16, x0, x8 # perform operation + 80000050: 7e800833 aes64ks2 x16,x0,x8 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknd_aes64ks2_cg_cp_rs1_b0, Zknd_aes64ks2_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01020c63 beq x4,x16,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6a5f62f531c119e0 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x3645b8bb9a2587e7 + 8000007c: 0001b683 ld x13,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zknd_aes64ks2_cg_cp_rs1_b1: + aes64ks2 x25, x1, x13 # perform operation + 80000084: 7ed08cb3 aes64ks2 x25,x1,x13 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknd_aes64ks2_cg_cp_rs1_b1, Zknd_aes64ks2_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01920c63 beq x4,x25,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a5 .word 0x8000e4a5 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x25, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x36ddf4de4d4f9835 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x988ea4fa7738b30d + 800000b4: 0001ba03 ld x20,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zknd_aes64ks2_cg_cp_rs1_b2: + aes64ks2 x22, x2, x20 # perform operation + 800000bc: 7f410b33 aes64ks2 x22,x2,x20 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknd_aes64ks2_cg_cp_rs1_b2, Zknd_aes64ks2_cg_cp_rs1_b2_str) + 800000c0: 000cb203 ld x4,0(x25) + 800000c4: 01620c63 beq x4,x22,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4da .word 0x8000e4da + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008c8c93 addi x25,x25,8 + + mv x15, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018793 addi x15,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xf081821ac30e1157 + 800000e4: 0007b183 ld x3,0(x15) + 800000e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xa8443ca49c842733 + 800000ec: 0007b483 ld x9,0(x15) + 800000f0: 00878793 addi x15,x15,8 + +00000000800000f4 : +Zknd_aes64ks2_cg_cp_rs1_b3: + aes64ks2 x2, x3, x9 # perform operation + 800000f4: 7e918133 aes64ks2 x2,x3,x9 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknd_aes64ks2_cg_cp_rs1_b3, Zknd_aes64ks2_cg_cp_rs1_b3_str) + 800000f8: 000cb203 ld x4,0(x25) + 800000fc: 00220c63 beq x4,x2,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e50f .word 0x8000e50f + 80000110: 00000000 .word 0x00000000 + 80000114: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xd39529b4647941a1 + 80000120: 0007b203 ld x4,0(x15) + 80000124: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x71c263e057598fea + 80000128: 0007bb83 ld x23,0(x15) + 8000012c: 00878793 addi x15,x15,8 + +0000000080000130 : +Zknd_aes64ks2_cg_cp_rs1_b4: + aes64ks2 x3, x4, x23 # perform operation + 80000130: 7f7201b3 aes64ks2 x3,x4,x23 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknd_aes64ks2_cg_cp_rs1_b4, Zknd_aes64ks2_cg_cp_rs1_b4_str) + 80000134: 000cb383 ld x7,0(x25) + 80000138: 00338c63 beq x7,x3,80000150 + 8000013c: 3dd0746f jal x8,80007d18 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e544 .word 0x8000e544 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xc997d345456356c0 + 80000154: 0007b283 ld x5,0(x15) + 80000158: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xbe2b2d4317224257 + 8000015c: 0007be03 ld x28,0(x15) + 80000160: 00878793 addi x15,x15,8 + +0000000080000164 : +Zknd_aes64ks2_cg_cp_rs1_b5: + aes64ks2 x6, x5, x28 # perform operation + 80000164: 7fc28333 aes64ks2 x6,x5,x28 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknd_aes64ks2_cg_cp_rs1_b5, Zknd_aes64ks2_cg_cp_rs1_b5_str) + 80000168: 000cb383 ld x7,0(x25) + 8000016c: 00638c63 beq x7,x6,80000184 + 80000170: 3a90746f jal x8,80007d18 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e579 .word 0x8000e579 + 80000180: 00000000 .word 0x00000000 + 80000184: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xc66b542e748d4eb4 + 80000188: 0007b303 ld x6,0(x15) + 8000018c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0c06b1ecbfbf3a66 + 80000190: 0007ba83 ld x21,0(x15) + 80000194: 00878793 addi x15,x15,8 + +0000000080000198 : +Zknd_aes64ks2_cg_cp_rs1_b6: + aes64ks2 x2, x6, x21 # perform operation + 80000198: 7f530133 aes64ks2 x2,x6,x21 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zknd_aes64ks2_cg_cp_rs1_b6, Zknd_aes64ks2_cg_cp_rs1_b6_str) + 8000019c: 000cb383 ld x7,0(x25) + 800001a0: 00238c63 beq x7,x2,800001b8 + 800001a4: 3750746f jal x8,80007d18 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e5ae .word 0x8000e5ae + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008c8c93 addi x25,x25,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800001bc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xc089ca68b61e9ba9 + 800001c4: 0007b383 ld x7,0(x15) + 800001c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xfeda8d5b8de0a7d8 + 800001cc: 0007bb03 ld x22,0(x15) + 800001d0: 00878793 addi x15,x15,8 + +00000000800001d4 : +Zknd_aes64ks2_cg_cp_rs1_b7: + aes64ks2 x3, x7, x22 # perform operation + 800001d4: 7f6381b3 aes64ks2 x3,x7,x22 + # Check if x3 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x3, Zknd_aes64ks2_cg_cp_rs1_b7, Zknd_aes64ks2_cg_cp_rs1_b7_str) + 800001d8: 000cb683 ld x13,0(x25) + 800001dc: 00368c63 beq x13,x3,800001f4 + 800001e0: 3610776f jal x14,80007d40 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 8000e5e3 .word 0x8000e5e3 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x4e0f6e80e5d595fe + 800001f8: 0007b403 ld x8,0(x15) + 800001fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x946f83ba34582a47 + 80000200: 0007bb83 ld x23,0(x15) + 80000204: 00878793 addi x15,x15,8 + +0000000080000208 : +Zknd_aes64ks2_cg_cp_rs1_b8: + aes64ks2 x11, x8, x23 # perform operation + 80000208: 7f7405b3 aes64ks2 x11,x8,x23 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknd_aes64ks2_cg_cp_rs1_b8, Zknd_aes64ks2_cg_cp_rs1_b8_str) + 8000020c: 000cb683 ld x13,0(x25) + 80000210: 00b68c63 beq x13,x11,80000228 + 80000214: 32d0776f jal x14,80007d40 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 8000e618 .word 0x8000e618 + 80000224: 00000000 .word 0x00000000 + 80000228: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x6accff43b60b0b98 + 8000022c: 0007b483 ld x9,0(x15) + 80000230: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x8584c36b48f063c3 + 80000234: 0007bb03 ld x22,0(x15) + 80000238: 00878793 addi x15,x15,8 + +000000008000023c : +Zknd_aes64ks2_cg_cp_rs1_b9: + aes64ks2 x23, x9, x22 # perform operation + 8000023c: 7f648bb3 aes64ks2 x23,x9,x22 + # Check if x23 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x23, Zknd_aes64ks2_cg_cp_rs1_b9, Zknd_aes64ks2_cg_cp_rs1_b9_str) + 80000240: 000cb683 ld x13,0(x25) + 80000244: 01768c63 beq x13,x23,8000025c + 80000248: 2f90776f jal x14,80007d40 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8000e64d .word 0x8000e64d + 80000258: 00000000 .word 0x00000000 + 8000025c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x7249fac41074b8b2 + 80000260: 0007b503 ld x10,0(x15) + 80000264: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x4de892c2f3ca28bd + 80000268: 0007bd83 ld x27,0(x15) + 8000026c: 00878793 addi x15,x15,8 + +0000000080000270 : +Zknd_aes64ks2_cg_cp_rs1_b10: + aes64ks2 x16, x10, x27 # perform operation + 80000270: 7fb50833 aes64ks2 x16,x10,x27 + # Check if x16 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x16, Zknd_aes64ks2_cg_cp_rs1_b10, Zknd_aes64ks2_cg_cp_rs1_b10_str) + 80000274: 000cb683 ld x13,0(x25) + 80000278: 01068c63 beq x13,x16,80000290 + 8000027c: 2c50776f jal x14,80007d40 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 8000e683 .word 0x8000e683 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x953445b1a6d591c4 + 80000294: 0007b583 ld x11,0(x15) + 80000298: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x0c451f1a6c84f0fd + 8000029c: 0007b183 ld x3,0(x15) + 800002a0: 00878793 addi x15,x15,8 + +00000000800002a4 : +Zknd_aes64ks2_cg_cp_rs1_b11: + aes64ks2 x22, x11, x3 # perform operation + 800002a4: 7e358b33 aes64ks2 x22,x11,x3 + # Check if x22 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x22, Zknd_aes64ks2_cg_cp_rs1_b11, Zknd_aes64ks2_cg_cp_rs1_b11_str) + 800002a8: 000cb683 ld x13,0(x25) + 800002ac: 01668c63 beq x13,x22,800002c4 + 800002b0: 2910776f jal x14,80007d40 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 8000e6ba .word 0x8000e6ba + 800002c0: 00000000 .word 0x00000000 + 800002c4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x2169a1c30b57f864 + 800002c8: 0007b603 ld x12,0(x15) + 800002cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xea08a974cf9cf37d + 800002d0: 0007b903 ld x18,0(x15) + 800002d4: 00878793 addi x15,x15,8 + +00000000800002d8 : +Zknd_aes64ks2_cg_cp_rs1_b12: + aes64ks2 x28, x12, x18 # perform operation + 800002d8: 7f260e33 aes64ks2 x28,x12,x18 + # Check if x28 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x28, Zknd_aes64ks2_cg_cp_rs1_b12, Zknd_aes64ks2_cg_cp_rs1_b12_str) + 800002dc: 000cb683 ld x13,0(x25) + 800002e0: 01c68c63 beq x13,x28,800002f8 + 800002e4: 25d0776f jal x14,80007d40 + 800002e8: 800002d8 .word 0x800002d8 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 8000e6f1 .word 0x8000e6f1 + 800002f4: 00000000 .word 0x00000000 + 800002f8: 008c8c93 addi x25,x25,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002fc: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000300: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x2860376a9dea2ebf + 80000304: 0007b683 ld x13,0(x15) + 80000308: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x9d86b8f6690c5551 + 8000030c: 0007b883 ld x17,0(x15) + 80000310: 00878793 addi x15,x15,8 + +0000000080000314 : +Zknd_aes64ks2_cg_cp_rs1_b13: + aes64ks2 x16, x13, x17 # perform operation + 80000314: 7f168833 aes64ks2 x16,x13,x17 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknd_aes64ks2_cg_cp_rs1_b13, Zknd_aes64ks2_cg_cp_rs1_b13_str) + 80000318: 000cb383 ld x7,0(x25) + 8000031c: 01038c63 beq x7,x16,80000334 + 80000320: 1f90746f jal x8,80007d18 + 80000324: 80000314 .word 0x80000314 + 80000328: 00000000 .word 0x00000000 + 8000032c: 8000e728 .word 0x8000e728 + 80000330: 00000000 .word 0x00000000 + 80000334: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xd9b4d647b9838e2a + 80000338: 0007b703 ld x14,0(x15) + 8000033c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x8174cba06cb21583 + 80000340: 0007b283 ld x5,0(x15) + 80000344: 00878793 addi x15,x15,8 + +0000000080000348 : +Zknd_aes64ks2_cg_cp_rs1_b14: + aes64ks2 x29, x14, x5 # perform operation + 80000348: 7e570eb3 aes64ks2 x29,x14,x5 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zknd_aes64ks2_cg_cp_rs1_b14, Zknd_aes64ks2_cg_cp_rs1_b14_str) + 8000034c: 000cb383 ld x7,0(x25) + 80000350: 01d38c63 beq x7,x29,80000368 + 80000354: 1c50746f jal x8,80007d18 + 80000358: 80000348 .word 0x80000348 + 8000035c: 00000000 .word 0x00000000 + 80000360: 8000e75f .word 0x8000e75f + 80000364: 00000000 .word 0x00000000 + 80000368: 008c8c93 addi x25,x25,8 + + mv x24, x15 # switch data pointer register to avoid conflict with test + 8000036c: 00078c13 addi x24,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0a379847d206f424 + 80000370: 000c3783 ld x15,0(x24) + 80000374: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x8350f3564b39ce08 + 80000378: 000c3683 ld x13,0(x24) + 8000037c: 008c0c13 addi x24,x24,8 + +0000000080000380 : +Zknd_aes64ks2_cg_cp_rs1_b15: + aes64ks2 x2, x15, x13 # perform operation + 80000380: 7ed78133 aes64ks2 x2,x15,x13 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zknd_aes64ks2_cg_cp_rs1_b15, Zknd_aes64ks2_cg_cp_rs1_b15_str) + 80000384: 000cb383 ld x7,0(x25) + 80000388: 00238c63 beq x7,x2,800003a0 + 8000038c: 18d0746f jal x8,80007d18 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 8000e796 .word 0x8000e796 + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5aa578d713431edd + 800003a4: 000c3803 ld x16,0(x24) + 800003a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x46cea61dd2c83ae2 + 800003ac: 000c3e03 ld x28,0(x24) + 800003b0: 008c0c13 addi x24,x24,8 + +00000000800003b4 : +Zknd_aes64ks2_cg_cp_rs1_b16: + aes64ks2 x11, x16, x28 # perform operation + 800003b4: 7fc805b3 aes64ks2 x11,x16,x28 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zknd_aes64ks2_cg_cp_rs1_b16, Zknd_aes64ks2_cg_cp_rs1_b16_str) + 800003b8: 000cb383 ld x7,0(x25) + 800003bc: 00b38c63 beq x7,x11,800003d4 + 800003c0: 1590746f jal x8,80007d18 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 8000e7cd .word 0x8000e7cd + 800003d0: 00000000 .word 0x00000000 + 800003d4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x690a9997019f81e2 + 800003d8: 000c3883 ld x17,0(x24) + 800003dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xa6fd53bb378dcb70 + 800003e0: 000c3b03 ld x22,0(x24) + 800003e4: 008c0c13 addi x24,x24,8 + +00000000800003e8 : +Zknd_aes64ks2_cg_cp_rs1_b17: + aes64ks2 x31, x17, x22 # perform operation + 800003e8: 7f688fb3 aes64ks2 x31,x17,x22 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zknd_aes64ks2_cg_cp_rs1_b17, Zknd_aes64ks2_cg_cp_rs1_b17_str) + 800003ec: 000cb383 ld x7,0(x25) + 800003f0: 01f38c63 beq x7,x31,80000408 + 800003f4: 1250746f jal x8,80007d18 + 800003f8: 800003e8 .word 0x800003e8 + 800003fc: 00000000 .word 0x00000000 + 80000400: 8000e804 .word 0x8000e804 + 80000404: 00000000 .word 0x00000000 + 80000408: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x45c1759939c88241 + 8000040c: 000c3903 ld x18,0(x24) + 80000410: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0xa46759b57a4125b8 + 80000414: 000c3e03 ld x28,0(x24) + 80000418: 008c0c13 addi x24,x24,8 + +000000008000041c : +Zknd_aes64ks2_cg_cp_rs1_b18: + aes64ks2 x19, x18, x28 # perform operation + 8000041c: 7fc909b3 aes64ks2 x19,x18,x28 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zknd_aes64ks2_cg_cp_rs1_b18, Zknd_aes64ks2_cg_cp_rs1_b18_str) + 80000420: 000cb383 ld x7,0(x25) + 80000424: 01338c63 beq x7,x19,8000043c + 80000428: 0f10746f jal x8,80007d18 + 8000042c: 8000041c .word 0x8000041c + 80000430: 00000000 .word 0x00000000 + 80000434: 8000e83b .word 0x8000e83b + 80000438: 00000000 .word 0x00000000 + 8000043c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x206e41c2e57fbc67 + 80000440: 000c3983 ld x19,0(x24) + 80000444: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0bd3097fb07fff9a + 80000448: 000c3483 ld x9,0(x24) + 8000044c: 008c0c13 addi x24,x24,8 + +0000000080000450 : +Zknd_aes64ks2_cg_cp_rs1_b19: + aes64ks2 x20, x19, x9 # perform operation + 80000450: 7e998a33 aes64ks2 x20,x19,x9 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zknd_aes64ks2_cg_cp_rs1_b19, Zknd_aes64ks2_cg_cp_rs1_b19_str) + 80000454: 000cb383 ld x7,0(x25) + 80000458: 01438c63 beq x7,x20,80000470 + 8000045c: 0bd0746f jal x8,80007d18 + 80000460: 80000450 .word 0x80000450 + 80000464: 00000000 .word 0x00000000 + 80000468: 8000e872 .word 0x8000e872 + 8000046c: 00000000 .word 0x00000000 + 80000470: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xf998bbab18c2aca6 + 80000474: 000c3a03 ld x20,0(x24) + 80000478: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x8c21a973f0af8ec1 + 8000047c: 000c3003 ld x0,0(x24) + 80000480: 008c0c13 addi x24,x24,8 + +0000000080000484 : +Zknd_aes64ks2_cg_cp_rs1_b20: + aes64ks2 x22, x20, x0 # perform operation + 80000484: 7e0a0b33 aes64ks2 x22,x20,x0 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zknd_aes64ks2_cg_cp_rs1_b20, Zknd_aes64ks2_cg_cp_rs1_b20_str) + 80000488: 000cb383 ld x7,0(x25) + 8000048c: 01638c63 beq x7,x22,800004a4 + 80000490: 0890746f jal x8,80007d18 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 8000e8a9 .word 0x8000e8a9 + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x34cb4ba201b5af71 + 800004a8: 000c3a83 ld x21,0(x24) + 800004ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x8c596d4283b50255 + 800004b0: 000c3203 ld x4,0(x24) + 800004b4: 008c0c13 addi x24,x24,8 + +00000000800004b8 : +Zknd_aes64ks2_cg_cp_rs1_b21: + aes64ks2 x3, x21, x4 # perform operation + 800004b8: 7e4a81b3 aes64ks2 x3,x21,x4 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zknd_aes64ks2_cg_cp_rs1_b21, Zknd_aes64ks2_cg_cp_rs1_b21_str) + 800004bc: 000cb383 ld x7,0(x25) + 800004c0: 00338c63 beq x7,x3,800004d8 + 800004c4: 0550746f jal x8,80007d18 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 8000e8e0 .word 0x8000e8e0 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x1fe53db1b9e45cb4 + 800004dc: 000c3b03 ld x22,0(x24) + 800004e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xf991b46a7492ada1 + 800004e4: 000c3d83 ld x27,0(x24) + 800004e8: 008c0c13 addi x24,x24,8 + +00000000800004ec : +Zknd_aes64ks2_cg_cp_rs1_b22: + aes64ks2 x12, x22, x27 # perform operation + 800004ec: 7fbb0633 aes64ks2 x12,x22,x27 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zknd_aes64ks2_cg_cp_rs1_b22, Zknd_aes64ks2_cg_cp_rs1_b22_str) + 800004f0: 000cb383 ld x7,0(x25) + 800004f4: 00c38c63 beq x7,x12,8000050c + 800004f8: 0210746f jal x8,80007d18 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 8000e917 .word 0x8000e917 + 80000508: 00000000 .word 0x00000000 + 8000050c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x8703a14a70028fc6 + 80000510: 000c3b83 ld x23,0(x24) + 80000514: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xfd3401e3c2128c24 + 80000518: 000c3d83 ld x27,0(x24) + 8000051c: 008c0c13 addi x24,x24,8 + +0000000080000520 : +Zknd_aes64ks2_cg_cp_rs1_b23: + aes64ks2 x16, x23, x27 # perform operation + 80000520: 7fbb8833 aes64ks2 x16,x23,x27 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zknd_aes64ks2_cg_cp_rs1_b23, Zknd_aes64ks2_cg_cp_rs1_b23_str) + 80000524: 000cb383 ld x7,0(x25) + 80000528: 01038c63 beq x7,x16,80000540 + 8000052c: 7ec0746f jal x8,80007d18 + 80000530: 80000520 .word 0x80000520 + 80000534: 00000000 .word 0x00000000 + 80000538: 8000e94e .word 0x8000e94e + 8000053c: 00000000 .word 0x00000000 + 80000540: 008c8c93 addi x25,x25,8 + + mv x23, x24 # switch data pointer register to avoid conflict with test + 80000544: 000c0b93 addi x23,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x5d9f4e1cc1bf1e73 + 80000548: 000bbc03 ld x24,0(x23) + 8000054c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x782ca1b51ab18b48 + 80000550: 000bb303 ld x6,0(x23) + 80000554: 008b8b93 addi x23,x23,8 + +0000000080000558 : +Zknd_aes64ks2_cg_cp_rs1_b24: + aes64ks2 x27, x24, x6 # perform operation + 80000558: 7e6c0db3 aes64ks2 x27,x24,x6 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zknd_aes64ks2_cg_cp_rs1_b24, Zknd_aes64ks2_cg_cp_rs1_b24_str) + 8000055c: 000cb383 ld x7,0(x25) + 80000560: 01b38c63 beq x7,x27,80000578 + 80000564: 7b40746f jal x8,80007d18 + 80000568: 80000558 .word 0x80000558 + 8000056c: 00000000 .word 0x00000000 + 80000570: 8000e985 .word 0x8000e985 + 80000574: 00000000 .word 0x00000000 + 80000578: 008c8c93 addi x25,x25,8 + + mv x3, x25 # switch signature pointer register to avoid conflict with test + 8000057c: 000c8193 addi x3,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xe7b4b4554629d354 + 80000580: 000bbc83 ld x25,0(x23) + 80000584: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x7f73ec0cf7ace60d + 80000588: 000bb283 ld x5,0(x23) + 8000058c: 008b8b93 addi x23,x23,8 + +0000000080000590 : +Zknd_aes64ks2_cg_cp_rs1_b25: + aes64ks2 x27, x25, x5 # perform operation + 80000590: 7e5c8db3 aes64ks2 x27,x25,x5 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknd_aes64ks2_cg_cp_rs1_b25, Zknd_aes64ks2_cg_cp_rs1_b25_str) + 80000594: 0001b383 ld x7,0(x3) + 80000598: 01b38c63 beq x7,x27,800005b0 + 8000059c: 77c0746f jal x8,80007d18 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 8000e9bc .word 0x8000e9bc + 800005ac: 00000000 .word 0x00000000 + 800005b0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x9b43771827259c6c + 800005b4: 000bbd03 ld x26,0(x23) + 800005b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xa91865c969bdaf99 + 800005bc: 000bbc83 ld x25,0(x23) + 800005c0: 008b8b93 addi x23,x23,8 + +00000000800005c4 : +Zknd_aes64ks2_cg_cp_rs1_b26: + aes64ks2 x29, x26, x25 # perform operation + 800005c4: 7f9d0eb3 aes64ks2 x29,x26,x25 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zknd_aes64ks2_cg_cp_rs1_b26, Zknd_aes64ks2_cg_cp_rs1_b26_str) + 800005c8: 0001b383 ld x7,0(x3) + 800005cc: 01d38c63 beq x7,x29,800005e4 + 800005d0: 7480746f jal x8,80007d18 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 8000e9f3 .word 0x8000e9f3 + 800005e0: 00000000 .word 0x00000000 + 800005e4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x595df21336dbae9d + 800005e8: 000bbd83 ld x27,0(x23) + 800005ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x976cf6e777e93d01 + 800005f0: 000bb083 ld x1,0(x23) + 800005f4: 008b8b93 addi x23,x23,8 + +00000000800005f8 : +Zknd_aes64ks2_cg_cp_rs1_b27: + aes64ks2 x30, x27, x1 # perform operation + 800005f8: 7e1d8f33 aes64ks2 x30,x27,x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknd_aes64ks2_cg_cp_rs1_b27, Zknd_aes64ks2_cg_cp_rs1_b27_str) + 800005fc: 0001b383 ld x7,0(x3) + 80000600: 01e38c63 beq x7,x30,80000618 + 80000604: 7140746f jal x8,80007d18 + 80000608: 800005f8 .word 0x800005f8 + 8000060c: 00000000 .word 0x00000000 + 80000610: 8000ea2a .word 0x8000ea2a + 80000614: 00000000 .word 0x00000000 + 80000618: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x273992e2bf74bc0c + 8000061c: 000bbe03 ld x28,0(x23) + 80000620: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x4636b0295934808b + 80000624: 000bbc03 ld x24,0(x23) + 80000628: 008b8b93 addi x23,x23,8 + +000000008000062c : +Zknd_aes64ks2_cg_cp_rs1_b28: + aes64ks2 x25, x28, x24 # perform operation + 8000062c: 7f8e0cb3 aes64ks2 x25,x28,x24 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknd_aes64ks2_cg_cp_rs1_b28, Zknd_aes64ks2_cg_cp_rs1_b28_str) + 80000630: 0001b383 ld x7,0(x3) + 80000634: 01938c63 beq x7,x25,8000064c + 80000638: 6e00746f jal x8,80007d18 + 8000063c: 8000062c .word 0x8000062c + 80000640: 00000000 .word 0x00000000 + 80000644: 8000ea61 .word 0x8000ea61 + 80000648: 00000000 .word 0x00000000 + 8000064c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x46ff7f1174a178ba + 80000650: 000bbe83 ld x29,0(x23) + 80000654: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x3e26f822d614f692 + 80000658: 000bb103 ld x2,0(x23) + 8000065c: 008b8b93 addi x23,x23,8 + +0000000080000660 : +Zknd_aes64ks2_cg_cp_rs1_b29: + aes64ks2 x12, x29, x2 # perform operation + 80000660: 7e2e8633 aes64ks2 x12,x29,x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zknd_aes64ks2_cg_cp_rs1_b29, Zknd_aes64ks2_cg_cp_rs1_b29_str) + 80000664: 0001b383 ld x7,0(x3) + 80000668: 00c38c63 beq x7,x12,80000680 + 8000066c: 6ac0746f jal x8,80007d18 + 80000670: 80000660 .word 0x80000660 + 80000674: 00000000 .word 0x00000000 + 80000678: 8000ea98 .word 0x8000ea98 + 8000067c: 00000000 .word 0x00000000 + 80000680: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xdd65082213e9c1ac + 80000684: 000bbf03 ld x30,0(x23) + 80000688: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x7e8fede71d6e82d4 + 8000068c: 000bbb03 ld x22,0(x23) + 80000690: 008b8b93 addi x23,x23,8 + +0000000080000694 : +Zknd_aes64ks2_cg_cp_rs1_b30: + aes64ks2 x21, x30, x22 # perform operation + 80000694: 7f6f0ab3 aes64ks2 x21,x30,x22 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zknd_aes64ks2_cg_cp_rs1_b30, Zknd_aes64ks2_cg_cp_rs1_b30_str) + 80000698: 0001b383 ld x7,0(x3) + 8000069c: 01538c63 beq x7,x21,800006b4 + 800006a0: 6780746f jal x8,80007d18 + 800006a4: 80000694 .word 0x80000694 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 8000eacf .word 0x8000eacf + 800006b0: 00000000 .word 0x00000000 + 800006b4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xacfe767db22ea70d + 800006b8: 000bbf83 ld x31,0(x23) + 800006bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xd7dfaee262d00997 + 800006c0: 000bbd03 ld x26,0(x23) + 800006c4: 008b8b93 addi x23,x23,8 + +00000000800006c8 : +Zknd_aes64ks2_cg_cp_rs1_b31: + aes64ks2 x1, x31, x26 # perform operation + 800006c8: 7faf80b3 aes64ks2 x1,x31,x26 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknd_aes64ks2_cg_cp_rs1_b31, Zknd_aes64ks2_cg_cp_rs1_b31_str) + 800006cc: 0001b383 ld x7,0(x3) + 800006d0: 00138c63 beq x7,x1,800006e8 + 800006d4: 6440746f jal x8,80007d18 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 8000eb06 .word 0x8000eb06 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x6ab45c589345d3e6 + 800006ec: 000bbc83 ld x25,0(x23) + 800006f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x867c5429d11c938e + 800006f4: 000bb003 ld x0,0(x23) + 800006f8: 008b8b93 addi x23,x23,8 + +00000000800006fc : +Zknd_aes64ks2_cg_cp_rs2_b0: + aes64ks2 x20, x25, x0 # perform operation + 800006fc: 7e0c8a33 aes64ks2 x20,x25,x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zknd_aes64ks2_cg_cp_rs2_b0, Zknd_aes64ks2_cg_cp_rs2_b0_str) + 80000700: 0001b383 ld x7,0(x3) + 80000704: 01438c63 beq x7,x20,8000071c + 80000708: 6100746f jal x8,80007d18 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 8000eb3d .word 0x8000eb3d + 80000718: 00000000 .word 0x00000000 + 8000071c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x0a86c381b3cd150e + 80000720: 000bbc83 ld x25,0(x23) + 80000724: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x88b50a34590b2eab + 80000728: 000bb083 ld x1,0(x23) + 8000072c: 008b8b93 addi x23,x23,8 + +0000000080000730 : +Zknd_aes64ks2_cg_cp_rs2_b1: + aes64ks2 x27, x25, x1 # perform operation + 80000730: 7e1c8db3 aes64ks2 x27,x25,x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zknd_aes64ks2_cg_cp_rs2_b1, Zknd_aes64ks2_cg_cp_rs2_b1_str) + 80000734: 0001b383 ld x7,0(x3) + 80000738: 01b38c63 beq x7,x27,80000750 + 8000073c: 5dc0746f jal x8,80007d18 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 8000eb73 .word 0x8000eb73 + 8000074c: 00000000 .word 0x00000000 + 80000750: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xc2a6357688240f18 + 80000754: 000bbd03 ld x26,0(x23) + 80000758: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xdf857f245d01f5f9 + 8000075c: 000bb103 ld x2,0(x23) + 80000760: 008b8b93 addi x23,x23,8 + +0000000080000764 : +Zknd_aes64ks2_cg_cp_rs2_b2: + aes64ks2 x28, x26, x2 # perform operation + 80000764: 7e2d0e33 aes64ks2 x28,x26,x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknd_aes64ks2_cg_cp_rs2_b2, Zknd_aes64ks2_cg_cp_rs2_b2_str) + 80000768: 0001b383 ld x7,0(x3) + 8000076c: 01c38c63 beq x7,x28,80000784 + 80000770: 5a80746f jal x8,80007d18 + 80000774: 80000764 .word 0x80000764 + 80000778: 00000000 .word 0x00000000 + 8000077c: 8000eba9 .word 0x8000eba9 + 80000780: 00000000 .word 0x00000000 + 80000784: 00818193 addi x3,x3,8 + + mv x17, x3 # switch signature pointer register to avoid conflict with test + 80000788: 00018893 addi x17,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x3d5b06b7a218f14c + 8000078c: 000bb283 ld x5,0(x23) + 80000790: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x2d446492f779c322 + 80000794: 000bb183 ld x3,0(x23) + 80000798: 008b8b93 addi x23,x23,8 + +000000008000079c : +Zknd_aes64ks2_cg_cp_rs2_b3: + aes64ks2 x1, x5, x3 # perform operation + 8000079c: 7e3280b3 aes64ks2 x1,x5,x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zknd_aes64ks2_cg_cp_rs2_b3, Zknd_aes64ks2_cg_cp_rs2_b3_str) + 800007a0: 0008b383 ld x7,0(x17) + 800007a4: 00138c63 beq x7,x1,800007bc + 800007a8: 5700746f jal x8,80007d18 + 800007ac: 8000079c .word 0x8000079c + 800007b0: 00000000 .word 0x00000000 + 800007b4: 8000ebdf .word 0x8000ebdf + 800007b8: 00000000 .word 0x00000000 + 800007bc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x051fcc7d40dbfac8 + 800007c0: 000bba03 ld x20,0(x23) + 800007c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x0a548d57c373d289 + 800007c8: 000bb203 ld x4,0(x23) + 800007cc: 008b8b93 addi x23,x23,8 + +00000000800007d0 : +Zknd_aes64ks2_cg_cp_rs2_b4: + aes64ks2 x9, x20, x4 # perform operation + 800007d0: 7e4a04b3 aes64ks2 x9,x20,x4 + # Check if x9 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x9, Zknd_aes64ks2_cg_cp_rs2_b4, Zknd_aes64ks2_cg_cp_rs2_b4_str) + 800007d4: 0008b383 ld x7,0(x17) + 800007d8: 00938c63 beq x7,x9,800007f0 + 800007dc: 53c0746f jal x8,80007d18 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000ec15 .word 0x8000ec15 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xe1514126ee2ff67c + 800007f4: 000bb103 ld x2,0(x23) + 800007f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xa26ed7351e335d9d + 800007fc: 000bb283 ld x5,0(x23) + 80000800: 008b8b93 addi x23,x23,8 + +0000000080000804 : +Zknd_aes64ks2_cg_cp_rs2_b5: + aes64ks2 x15, x2, x5 # perform operation + 80000804: 7e5107b3 aes64ks2 x15,x2,x5 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zknd_aes64ks2_cg_cp_rs2_b5, Zknd_aes64ks2_cg_cp_rs2_b5_str) + 80000808: 0008b383 ld x7,0(x17) + 8000080c: 00f38c63 beq x7,x15,80000824 + 80000810: 5080746f jal x8,80007d18 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000ec4b .word 0x8000ec4b + 80000820: 00000000 .word 0x00000000 + 80000824: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xc260fdf4955a867f + 80000828: 000bbe03 ld x28,0(x23) + 8000082c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xb0f746385fb559ce + 80000830: 000bb303 ld x6,0(x23) + 80000834: 008b8b93 addi x23,x23,8 + +0000000080000838 : +Zknd_aes64ks2_cg_cp_rs2_b6: + aes64ks2 x1, x28, x6 # perform operation + 80000838: 7e6e00b3 aes64ks2 x1,x28,x6 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zknd_aes64ks2_cg_cp_rs2_b6, Zknd_aes64ks2_cg_cp_rs2_b6_str) + 8000083c: 0008b383 ld x7,0(x17) + 80000840: 00138c63 beq x7,x1,80000858 + 80000844: 4d40746f jal x8,80007d18 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ec81 .word 0x8000ec81 + 80000854: 00000000 .word 0x00000000 + 80000858: 00888893 addi x17,x17,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 8000085c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000860: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x2c941a72e975246f + 80000864: 000bbf03 ld x30,0(x23) + 80000868: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x954eb292ecadb7c9 + 8000086c: 000bb383 ld x7,0(x23) + 80000870: 008b8b93 addi x23,x23,8 + +0000000080000874 : +Zknd_aes64ks2_cg_cp_rs2_b7: + aes64ks2 x0, x30, x7 # perform operation + 80000874: 7e7f0033 aes64ks2 x0,x30,x7 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zknd_aes64ks2_cg_cp_rs2_b7, Zknd_aes64ks2_cg_cp_rs2_b7_str) + 80000878: 0008b203 ld x4,0(x17) + 8000087c: 00020c63 beq x4,x0,80000894 + 80000880: 480072ef jal x5,80007d00 + 80000884: 80000874 .word 0x80000874 + 80000888: 00000000 .word 0x00000000 + 8000088c: 8000ecb7 .word 0x8000ecb7 + 80000890: 00000000 .word 0x00000000 + 80000894: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x3768f523cdd63a6b + 80000898: 000bb483 ld x9,0(x23) + 8000089c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xd3af969da4a8a83f + 800008a0: 000bb403 ld x8,0(x23) + 800008a4: 008b8b93 addi x23,x23,8 + +00000000800008a8 : +Zknd_aes64ks2_cg_cp_rs2_b8: + aes64ks2 x26, x9, x8 # perform operation + 800008a8: 7e848d33 aes64ks2 x26,x9,x8 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ks2_cg_cp_rs2_b8, Zknd_aes64ks2_cg_cp_rs2_b8_str) + 800008ac: 0008b203 ld x4,0(x17) + 800008b0: 01a20c63 beq x4,x26,800008c8 + 800008b4: 44c072ef jal x5,80007d00 + 800008b8: 800008a8 .word 0x800008a8 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 8000eced .word 0x8000eced + 800008c4: 00000000 .word 0x00000000 + 800008c8: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x2619c389def5d6d2 + 800008cc: 000bbf03 ld x30,0(x23) + 800008d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x0b9ec5e59e0c74c6 + 800008d4: 000bb483 ld x9,0(x23) + 800008d8: 008b8b93 addi x23,x23,8 + +00000000800008dc : +Zknd_aes64ks2_cg_cp_rs2_b9: + aes64ks2 x28, x30, x9 # perform operation + 800008dc: 7e9f0e33 aes64ks2 x28,x30,x9 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknd_aes64ks2_cg_cp_rs2_b9, Zknd_aes64ks2_cg_cp_rs2_b9_str) + 800008e0: 0008b203 ld x4,0(x17) + 800008e4: 01c20c63 beq x4,x28,800008fc + 800008e8: 418072ef jal x5,80007d00 + 800008ec: 800008dc .word 0x800008dc + 800008f0: 00000000 .word 0x00000000 + 800008f4: 8000ed23 .word 0x8000ed23 + 800008f8: 00000000 .word 0x00000000 + 800008fc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xb23f182b95aeed2a + 80000900: 000bbc83 ld x25,0(x23) + 80000904: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x9629f4fb8e0e7880 + 80000908: 000bb503 ld x10,0(x23) + 8000090c: 008b8b93 addi x23,x23,8 + +0000000080000910 : +Zknd_aes64ks2_cg_cp_rs2_b10: + aes64ks2 x21, x25, x10 # perform operation + 80000910: 7eac8ab3 aes64ks2 x21,x25,x10 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknd_aes64ks2_cg_cp_rs2_b10, Zknd_aes64ks2_cg_cp_rs2_b10_str) + 80000914: 0008b203 ld x4,0(x17) + 80000918: 01520c63 beq x4,x21,80000930 + 8000091c: 3e4072ef jal x5,80007d00 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 8000ed59 .word 0x8000ed59 + 8000092c: 00000000 .word 0x00000000 + 80000930: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xe7d1c7b2e567879a + 80000934: 000bb483 ld x9,0(x23) + 80000938: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x781fe3494a7ceb85 + 8000093c: 000bb583 ld x11,0(x23) + 80000940: 008b8b93 addi x23,x23,8 + +0000000080000944 : +Zknd_aes64ks2_cg_cp_rs2_b11: + aes64ks2 x19, x9, x11 # perform operation + 80000944: 7eb489b3 aes64ks2 x19,x9,x11 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zknd_aes64ks2_cg_cp_rs2_b11, Zknd_aes64ks2_cg_cp_rs2_b11_str) + 80000948: 0008b203 ld x4,0(x17) + 8000094c: 01320c63 beq x4,x19,80000964 + 80000950: 3b0072ef jal x5,80007d00 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 8000ed90 .word 0x8000ed90 + 80000960: 00000000 .word 0x00000000 + 80000964: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xa06a99cee63a9b33 + 80000968: 000bbe83 ld x29,0(x23) + 8000096c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x706954d1539386be + 80000970: 000bb603 ld x12,0(x23) + 80000974: 008b8b93 addi x23,x23,8 + +0000000080000978 : +Zknd_aes64ks2_cg_cp_rs2_b12: + aes64ks2 x10, x29, x12 # perform operation + 80000978: 7ece8533 aes64ks2 x10,x29,x12 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zknd_aes64ks2_cg_cp_rs2_b12, Zknd_aes64ks2_cg_cp_rs2_b12_str) + 8000097c: 0008b203 ld x4,0(x17) + 80000980: 00a20c63 beq x4,x10,80000998 + 80000984: 37c072ef jal x5,80007d00 + 80000988: 80000978 .word 0x80000978 + 8000098c: 00000000 .word 0x00000000 + 80000990: 8000edc7 .word 0x8000edc7 + 80000994: 00000000 .word 0x00000000 + 80000998: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xe4f4dbf6280322f1 + 8000099c: 000bba03 ld x20,0(x23) + 800009a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x94bcf5a220d0633c + 800009a4: 000bb683 ld x13,0(x23) + 800009a8: 008b8b93 addi x23,x23,8 + +00000000800009ac : +Zknd_aes64ks2_cg_cp_rs2_b13: + aes64ks2 x0, x20, x13 # perform operation + 800009ac: 7eda0033 aes64ks2 x0,x20,x13 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zknd_aes64ks2_cg_cp_rs2_b13, Zknd_aes64ks2_cg_cp_rs2_b13_str) + 800009b0: 0008b203 ld x4,0(x17) + 800009b4: 00020c63 beq x4,x0,800009cc + 800009b8: 348072ef jal x5,80007d00 + 800009bc: 800009ac .word 0x800009ac + 800009c0: 00000000 .word 0x00000000 + 800009c4: 8000edfe .word 0x8000edfe + 800009c8: 00000000 .word 0x00000000 + 800009cc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xe8cfdcffc74ba52e + 800009d0: 000bb383 ld x7,0(x23) + 800009d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xd4f7fe5897c88950 + 800009d8: 000bb703 ld x14,0(x23) + 800009dc: 008b8b93 addi x23,x23,8 + +00000000800009e0 : +Zknd_aes64ks2_cg_cp_rs2_b14: + aes64ks2 x13, x7, x14 # perform operation + 800009e0: 7ee386b3 aes64ks2 x13,x7,x14 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zknd_aes64ks2_cg_cp_rs2_b14, Zknd_aes64ks2_cg_cp_rs2_b14_str) + 800009e4: 0008b203 ld x4,0(x17) + 800009e8: 00d20c63 beq x4,x13,80000a00 + 800009ec: 314072ef jal x5,80007d00 + 800009f0: 800009e0 .word 0x800009e0 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 8000ee35 .word 0x8000ee35 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x6c4e7c1f3e6c6a11 + 80000a04: 000bba83 ld x21,0(x23) + 80000a08: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x294c979f4d4f699a + 80000a0c: 000bb783 ld x15,0(x23) + 80000a10: 008b8b93 addi x23,x23,8 + +0000000080000a14 : +Zknd_aes64ks2_cg_cp_rs2_b15: + aes64ks2 x26, x21, x15 # perform operation + 80000a14: 7efa8d33 aes64ks2 x26,x21,x15 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknd_aes64ks2_cg_cp_rs2_b15, Zknd_aes64ks2_cg_cp_rs2_b15_str) + 80000a18: 0008b203 ld x4,0(x17) + 80000a1c: 01a20c63 beq x4,x26,80000a34 + 80000a20: 2e0072ef jal x5,80007d00 + 80000a24: 80000a14 .word 0x80000a14 + 80000a28: 00000000 .word 0x00000000 + 80000a2c: 8000ee6c .word 0x8000ee6c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x1dac39f921472579 + 80000a38: 000bb503 ld x10,0(x23) + 80000a3c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x6b9ad4f715c4fdf4 + 80000a40: 000bb803 ld x16,0(x23) + 80000a44: 008b8b93 addi x23,x23,8 + +0000000080000a48 : +Zknd_aes64ks2_cg_cp_rs2_b16: + aes64ks2 x7, x10, x16 # perform operation + 80000a48: 7f0503b3 aes64ks2 x7,x10,x16 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zknd_aes64ks2_cg_cp_rs2_b16, Zknd_aes64ks2_cg_cp_rs2_b16_str) + 80000a4c: 0008b203 ld x4,0(x17) + 80000a50: 00720c63 beq x4,x7,80000a68 + 80000a54: 2ac072ef jal x5,80007d00 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 8000eea3 .word 0x8000eea3 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 00888893 addi x17,x17,8 + + mv x21, x17 # switch signature pointer register to avoid conflict with test + 80000a6c: 00088a93 addi x21,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x84779e84dec46e77 + 80000a70: 000bb383 ld x7,0(x23) + 80000a74: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x458da096aa430d10 + 80000a78: 000bb883 ld x17,0(x23) + 80000a7c: 008b8b93 addi x23,x23,8 + +0000000080000a80 : +Zknd_aes64ks2_cg_cp_rs2_b17: + aes64ks2 x3, x7, x17 # perform operation + 80000a80: 7f1381b3 aes64ks2 x3,x7,x17 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknd_aes64ks2_cg_cp_rs2_b17, Zknd_aes64ks2_cg_cp_rs2_b17_str) + 80000a84: 000ab203 ld x4,0(x21) + 80000a88: 00320c63 beq x4,x3,80000aa0 + 80000a8c: 274072ef jal x5,80007d00 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000eeda .word 0x8000eeda + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x4d686bbd86b65094 + 80000aa4: 000bbd03 ld x26,0(x23) + 80000aa8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xde738e69a8d7843c + 80000aac: 000bb903 ld x18,0(x23) + 80000ab0: 008b8b93 addi x23,x23,8 + +0000000080000ab4 : +Zknd_aes64ks2_cg_cp_rs2_b18: + aes64ks2 x6, x26, x18 # perform operation + 80000ab4: 7f2d0333 aes64ks2 x6,x26,x18 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zknd_aes64ks2_cg_cp_rs2_b18, Zknd_aes64ks2_cg_cp_rs2_b18_str) + 80000ab8: 000ab203 ld x4,0(x21) + 80000abc: 00620c63 beq x4,x6,80000ad4 + 80000ac0: 240072ef jal x5,80007d00 + 80000ac4: 80000ab4 .word 0x80000ab4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 8000ef11 .word 0x8000ef11 + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x9eabdea301999f71 + 80000ad8: 000bba03 ld x20,0(x23) + 80000adc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x86c309f8e8f7d0c5 + 80000ae0: 000bb983 ld x19,0(x23) + 80000ae4: 008b8b93 addi x23,x23,8 + +0000000080000ae8 : +Zknd_aes64ks2_cg_cp_rs2_b19: + aes64ks2 x27, x20, x19 # perform operation + 80000ae8: 7f3a0db3 aes64ks2 x27,x20,x19 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zknd_aes64ks2_cg_cp_rs2_b19, Zknd_aes64ks2_cg_cp_rs2_b19_str) + 80000aec: 000ab203 ld x4,0(x21) + 80000af0: 01b20c63 beq x4,x27,80000b08 + 80000af4: 20c072ef jal x5,80007d00 + 80000af8: 80000ae8 .word 0x80000ae8 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 8000ef48 .word 0x8000ef48 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xbcdfb62b658a6538 + 80000b0c: 000bbd83 ld x27,0(x23) + 80000b10: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x736b8aba135931a4 + 80000b14: 000bba03 ld x20,0(x23) + 80000b18: 008b8b93 addi x23,x23,8 + +0000000080000b1c : +Zknd_aes64ks2_cg_cp_rs2_b20: + aes64ks2 x16, x27, x20 # perform operation + 80000b1c: 7f4d8833 aes64ks2 x16,x27,x20 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknd_aes64ks2_cg_cp_rs2_b20, Zknd_aes64ks2_cg_cp_rs2_b20_str) + 80000b20: 000ab203 ld x4,0(x21) + 80000b24: 01020c63 beq x4,x16,80000b3c + 80000b28: 1d8072ef jal x5,80007d00 + 80000b2c: 80000b1c .word 0x80000b1c + 80000b30: 00000000 .word 0x00000000 + 80000b34: 8000ef7f .word 0x8000ef7f + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 008a8a93 addi x21,x21,8 + + mv x26, x21 # switch signature pointer register to avoid conflict with test + 80000b40: 000a8d13 addi x26,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xe562a99b950615fd + 80000b44: 000bb883 ld x17,0(x23) + 80000b48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xbabc15522c4326ca + 80000b4c: 000bba83 ld x21,0(x23) + 80000b50: 008b8b93 addi x23,x23,8 + +0000000080000b54 : +Zknd_aes64ks2_cg_cp_rs2_b21: + aes64ks2 x0, x17, x21 # perform operation + 80000b54: 7f588033 aes64ks2 x0,x17,x21 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknd_aes64ks2_cg_cp_rs2_b21, Zknd_aes64ks2_cg_cp_rs2_b21_str) + 80000b58: 000d3203 ld x4,0(x26) + 80000b5c: 00020c63 beq x4,x0,80000b74 + 80000b60: 1a0072ef jal x5,80007d00 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000efb6 .word 0x8000efb6 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x0ba1fd104cbf4f14 + 80000b78: 000bb403 ld x8,0(x23) + 80000b7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x8d1f7261e7f8c6ff + 80000b80: 000bbb03 ld x22,0(x23) + 80000b84: 008b8b93 addi x23,x23,8 + +0000000080000b88 : +Zknd_aes64ks2_cg_cp_rs2_b22: + aes64ks2 x25, x8, x22 # perform operation + 80000b88: 7f640cb3 aes64ks2 x25,x8,x22 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknd_aes64ks2_cg_cp_rs2_b22, Zknd_aes64ks2_cg_cp_rs2_b22_str) + 80000b8c: 000d3203 ld x4,0(x26) + 80000b90: 01920c63 beq x4,x25,80000ba8 + 80000b94: 16c072ef jal x5,80007d00 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000efed .word 0x8000efed + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008d0d13 addi x26,x26,8 + + mv x18, x23 # switch data pointer register to avoid conflict with test + 80000bac: 000b8913 addi x18,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x6b4dba5431397a5c + 80000bb0: 00093603 ld x12,0(x18) + 80000bb4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x044cfd96b0fe7457 + 80000bb8: 00093b83 ld x23,0(x18) + 80000bbc: 00890913 addi x18,x18,8 + +0000000080000bc0 : +Zknd_aes64ks2_cg_cp_rs2_b23: + aes64ks2 x10, x12, x23 # perform operation + 80000bc0: 7f760533 aes64ks2 x10,x12,x23 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zknd_aes64ks2_cg_cp_rs2_b23, Zknd_aes64ks2_cg_cp_rs2_b23_str) + 80000bc4: 000d3203 ld x4,0(x26) + 80000bc8: 00a20c63 beq x4,x10,80000be0 + 80000bcc: 134072ef jal x5,80007d00 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000f024 .word 0x8000f024 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x9d93f68acc048a53 + 80000be4: 00093d83 ld x27,0(x18) + 80000be8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x6a72e25156a1c66b + 80000bec: 00093c03 ld x24,0(x18) + 80000bf0: 00890913 addi x18,x18,8 + +0000000080000bf4 : +Zknd_aes64ks2_cg_cp_rs2_b24: + aes64ks2 x17, x27, x24 # perform operation + 80000bf4: 7f8d88b3 aes64ks2 x17,x27,x24 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknd_aes64ks2_cg_cp_rs2_b24, Zknd_aes64ks2_cg_cp_rs2_b24_str) + 80000bf8: 000d3203 ld x4,0(x26) + 80000bfc: 01120c63 beq x4,x17,80000c14 + 80000c00: 100072ef jal x5,80007d00 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000f05b .word 0x8000f05b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x378069e4909a0b13 + 80000c18: 00093e83 ld x29,0(x18) + 80000c1c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x16a844fbbd5bf50a + 80000c20: 00093c83 ld x25,0(x18) + 80000c24: 00890913 addi x18,x18,8 + +0000000080000c28 : +Zknd_aes64ks2_cg_cp_rs2_b25: + aes64ks2 x6, x29, x25 # perform operation + 80000c28: 7f9e8333 aes64ks2 x6,x29,x25 + # Check if x6 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x6, Zknd_aes64ks2_cg_cp_rs2_b25, Zknd_aes64ks2_cg_cp_rs2_b25_str) + 80000c2c: 000d3203 ld x4,0(x26) + 80000c30: 00620c63 beq x4,x6,80000c48 + 80000c34: 0cc072ef jal x5,80007d00 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000f092 .word 0x8000f092 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 008d0d13 addi x26,x26,8 + + mv x29, x26 # switch signature pointer register to avoid conflict with test + 80000c4c: 000d0e93 addi x29,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x9f5f495438a27d2e + 80000c50: 00093883 ld x17,0(x18) + 80000c54: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x96f04ae37de88a24 + 80000c58: 00093d03 ld x26,0(x18) + 80000c5c: 00890913 addi x18,x18,8 + +0000000080000c60 : +Zknd_aes64ks2_cg_cp_rs2_b26: + aes64ks2 x27, x17, x26 # perform operation + 80000c60: 7fa88db3 aes64ks2 x27,x17,x26 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zknd_aes64ks2_cg_cp_rs2_b26, Zknd_aes64ks2_cg_cp_rs2_b26_str) + 80000c64: 000eb203 ld x4,0(x29) + 80000c68: 01b20c63 beq x4,x27,80000c80 + 80000c6c: 094072ef jal x5,80007d00 + 80000c70: 80000c60 .word 0x80000c60 + 80000c74: 00000000 .word 0x00000000 + 80000c78: 8000f0c9 .word 0x8000f0c9 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x9aa4f128aad75c94 + 80000c84: 00093383 ld x7,0(x18) + 80000c88: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x14b06b92c69021ef + 80000c8c: 00093d83 ld x27,0(x18) + 80000c90: 00890913 addi x18,x18,8 + +0000000080000c94 : +Zknd_aes64ks2_cg_cp_rs2_b27: + aes64ks2 x26, x7, x27 # perform operation + 80000c94: 7fb38d33 aes64ks2 x26,x7,x27 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zknd_aes64ks2_cg_cp_rs2_b27, Zknd_aes64ks2_cg_cp_rs2_b27_str) + 80000c98: 000eb203 ld x4,0(x29) + 80000c9c: 01a20c63 beq x4,x26,80000cb4 + 80000ca0: 060072ef jal x5,80007d00 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000f100 .word 0x8000f100 + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x487a83fd9e18e4e3 + 80000cb8: 00093603 ld x12,0(x18) + 80000cbc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x6e217f8190a4e3af + 80000cc0: 00093e03 ld x28,0(x18) + 80000cc4: 00890913 addi x18,x18,8 + +0000000080000cc8 : +Zknd_aes64ks2_cg_cp_rs2_b28: + aes64ks2 x0, x12, x28 # perform operation + 80000cc8: 7fc60033 aes64ks2 x0,x12,x28 + # Check if x0 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x0, Zknd_aes64ks2_cg_cp_rs2_b28, Zknd_aes64ks2_cg_cp_rs2_b28_str) + 80000ccc: 000eb203 ld x4,0(x29) + 80000cd0: 00020c63 beq x4,x0,80000ce8 + 80000cd4: 02c072ef jal x5,80007d00 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 8000f137 .word 0x8000f137 + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 008e8e93 addi x29,x29,8 + + mv x25, x29 # switch signature pointer register to avoid conflict with test + 80000cec: 000e8c93 addi x25,x29,0 +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x858dfa03dc6b03d0 + 80000cf0: 00093683 ld x13,0(x18) + 80000cf4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x4e7b91a65c9955c8 + 80000cf8: 00093e83 ld x29,0(x18) + 80000cfc: 00890913 addi x18,x18,8 + +0000000080000d00 : +Zknd_aes64ks2_cg_cp_rs2_b29: + aes64ks2 x30, x13, x29 # perform operation + 80000d00: 7fd68f33 aes64ks2 x30,x13,x29 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zknd_aes64ks2_cg_cp_rs2_b29, Zknd_aes64ks2_cg_cp_rs2_b29_str) + 80000d04: 000cb203 ld x4,0(x25) + 80000d08: 01e20c63 beq x4,x30,80000d20 + 80000d0c: 7f5062ef jal x5,80007d00 + 80000d10: 80000d00 .word 0x80000d00 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 8000f16e .word 0x8000f16e + 80000d1c: 00000000 .word 0x00000000 + 80000d20: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x201b60bb414a04f7 + 80000d24: 00093e03 ld x28,0(x18) + 80000d28: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x6e4c61ede09159e7 + 80000d2c: 00093f03 ld x30,0(x18) + 80000d30: 00890913 addi x18,x18,8 + +0000000080000d34 : +Zknd_aes64ks2_cg_cp_rs2_b30: + aes64ks2 x14, x28, x30 # perform operation + 80000d34: 7fee0733 aes64ks2 x14,x28,x30 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknd_aes64ks2_cg_cp_rs2_b30, Zknd_aes64ks2_cg_cp_rs2_b30_str) + 80000d38: 000cb203 ld x4,0(x25) + 80000d3c: 00e20c63 beq x4,x14,80000d54 + 80000d40: 7c1062ef jal x5,80007d00 + 80000d44: 80000d34 .word 0x80000d34 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 8000f1a5 .word 0x8000f1a5 + 80000d50: 00000000 .word 0x00000000 + 80000d54: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xeed9f2d2e4c6aefb + 80000d58: 00093583 ld x11,0(x18) + 80000d5c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xc3341849af10810d + 80000d60: 00093f83 ld x31,0(x18) + 80000d64: 00890913 addi x18,x18,8 + +0000000080000d68 : +Zknd_aes64ks2_cg_cp_rs2_b31: + aes64ks2 x9, x11, x31 # perform operation + 80000d68: 7ff584b3 aes64ks2 x9,x11,x31 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknd_aes64ks2_cg_cp_rs2_b31, Zknd_aes64ks2_cg_cp_rs2_b31_str) + 80000d6c: 000cb203 ld x4,0(x25) + 80000d70: 00920c63 beq x4,x9,80000d88 + 80000d74: 78d062ef jal x5,80007d00 + 80000d78: 80000d68 .word 0x80000d68 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 8000f1dc .word 0x8000f1dc + 80000d84: 00000000 .word 0x00000000 + 80000d88: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7ec1d3de1f2b8aec + 80000d8c: 00093503 ld x10,0(x18) + 80000d90: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x6655eba28fa8bfdb + 80000d94: 00093303 ld x6,0(x18) + 80000d98: 00890913 addi x18,x18,8 + +0000000080000d9c : +Zknd_aes64ks2_cg_cp_rd_b0: + aes64ks2 x0, x10, x6 # perform operation + 80000d9c: 7e650033 aes64ks2 x0,x10,x6 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zknd_aes64ks2_cg_cp_rd_b0, Zknd_aes64ks2_cg_cp_rd_b0_str) + 80000da0: 000cb203 ld x4,0(x25) + 80000da4: 00020c63 beq x4,x0,80000dbc + 80000da8: 759062ef jal x5,80007d00 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 8000f213 .word 0x8000f213 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x117b6e51353965ba + 80000dc0: 00093b03 ld x22,0(x18) + 80000dc4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x31603f4696ede71b + 80000dc8: 00093a83 ld x21,0(x18) + 80000dcc: 00890913 addi x18,x18,8 + +0000000080000dd0 : +Zknd_aes64ks2_cg_cp_rd_b1: + aes64ks2 x1, x22, x21 # perform operation + 80000dd0: 7f5b00b3 aes64ks2 x1,x22,x21 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zknd_aes64ks2_cg_cp_rd_b1, Zknd_aes64ks2_cg_cp_rd_b1_str) + 80000dd4: 000cb203 ld x4,0(x25) + 80000dd8: 00120c63 beq x4,x1,80000df0 + 80000ddc: 725062ef jal x5,80007d00 + 80000de0: 80000dd0 .word 0x80000dd0 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 8000f248 .word 0x8000f248 + 80000dec: 00000000 .word 0x00000000 + 80000df0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x74ee3ebedb9f7122 + 80000df4: 00093783 ld x15,0(x18) + 80000df8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xc1268ce0d8e100f3 + 80000dfc: 00093503 ld x10,0(x18) + 80000e00: 00890913 addi x18,x18,8 + +0000000080000e04 : +Zknd_aes64ks2_cg_cp_rd_b2: + aes64ks2 x2, x15, x10 # perform operation + 80000e04: 7ea78133 aes64ks2 x2,x15,x10 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknd_aes64ks2_cg_cp_rd_b2, Zknd_aes64ks2_cg_cp_rd_b2_str) + 80000e08: 000cb203 ld x4,0(x25) + 80000e0c: 00220c63 beq x4,x2,80000e24 + 80000e10: 6f1062ef jal x5,80007d00 + 80000e14: 80000e04 .word 0x80000e04 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 8000f27d .word 0x8000f27d + 80000e20: 00000000 .word 0x00000000 + 80000e24: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x42663633f2f1c3dc + 80000e28: 00093383 ld x7,0(x18) + 80000e2c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x939252a702d99970 + 80000e30: 00093b83 ld x23,0(x18) + 80000e34: 00890913 addi x18,x18,8 + +0000000080000e38 : +Zknd_aes64ks2_cg_cp_rd_b3: + aes64ks2 x3, x7, x23 # perform operation + 80000e38: 7f7381b3 aes64ks2 x3,x7,x23 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknd_aes64ks2_cg_cp_rd_b3, Zknd_aes64ks2_cg_cp_rd_b3_str) + 80000e3c: 000cb203 ld x4,0(x25) + 80000e40: 00320c63 beq x4,x3,80000e58 + 80000e44: 6bd062ef jal x5,80007d00 + 80000e48: 80000e38 .word 0x80000e38 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 8000f2b2 .word 0x8000f2b2 + 80000e54: 00000000 .word 0x00000000 + 80000e58: 008c8c93 addi x25,x25,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e5c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e60: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xd69fc34d319a0c9d + 80000e64: 00093d83 ld x27,0(x18) + 80000e68: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x9eafcbbae225ed8a + 80000e6c: 00093583 ld x11,0(x18) + 80000e70: 00890913 addi x18,x18,8 + +0000000080000e74 : +Zknd_aes64ks2_cg_cp_rd_b4: + aes64ks2 x4, x27, x11 # perform operation + 80000e74: 7ebd8233 aes64ks2 x4,x27,x11 + # Check if x4 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x4, Zknd_aes64ks2_cg_cp_rd_b4, Zknd_aes64ks2_cg_cp_rd_b4_str) + 80000e78: 000cb683 ld x13,0(x25) + 80000e7c: 00468c63 beq x13,x4,80000e94 + 80000e80: 6c10676f jal x14,80007d40 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 8000f2e7 .word 0x8000f2e7 + 80000e90: 00000000 .word 0x00000000 + 80000e94: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xb3255f34e82ac659 + 80000e98: 00093103 ld x2,0(x18) + 80000e9c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xbfd5a1bcbdae4ad0 + 80000ea0: 00093383 ld x7,0(x18) + 80000ea4: 00890913 addi x18,x18,8 + +0000000080000ea8 : +Zknd_aes64ks2_cg_cp_rd_b5: + aes64ks2 x5, x2, x7 # perform operation + 80000ea8: 7e7102b3 aes64ks2 x5,x2,x7 + # Check if x5 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x5, Zknd_aes64ks2_cg_cp_rd_b5, Zknd_aes64ks2_cg_cp_rd_b5_str) + 80000eac: 000cb683 ld x13,0(x25) + 80000eb0: 00568c63 beq x13,x5,80000ec8 + 80000eb4: 68d0676f jal x14,80007d40 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 8000f31c .word 0x8000f31c + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0xda3a2ca811052e11 + 80000ecc: 00093003 ld x0,0(x18) + 80000ed0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x15816ba6022b31e3 + 80000ed4: 00093083 ld x1,0(x18) + 80000ed8: 00890913 addi x18,x18,8 + +0000000080000edc : +Zknd_aes64ks2_cg_cp_rd_b6: + aes64ks2 x6, x0, x1 # perform operation + 80000edc: 7e100333 aes64ks2 x6,x0,x1 + # Check if x6 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x6, Zknd_aes64ks2_cg_cp_rd_b6, Zknd_aes64ks2_cg_cp_rd_b6_str) + 80000ee0: 000cb683 ld x13,0(x25) + 80000ee4: 00668c63 beq x13,x6,80000efc + 80000ee8: 6590676f jal x14,80007d40 + 80000eec: 80000edc .word 0x80000edc + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 8000f351 .word 0x8000f351 + 80000ef8: 00000000 .word 0x00000000 + 80000efc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xbcddb87651fd437d + 80000f00: 00093c03 ld x24,0(x18) + 80000f04: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xda6a399385d69662 + 80000f08: 00093783 ld x15,0(x18) + 80000f0c: 00890913 addi x18,x18,8 + +0000000080000f10 : +Zknd_aes64ks2_cg_cp_rd_b7: + aes64ks2 x7, x24, x15 # perform operation + 80000f10: 7efc03b3 aes64ks2 x7,x24,x15 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zknd_aes64ks2_cg_cp_rd_b7, Zknd_aes64ks2_cg_cp_rd_b7_str) + 80000f14: 000cb683 ld x13,0(x25) + 80000f18: 00768c63 beq x13,x7,80000f30 + 80000f1c: 6250676f jal x14,80007d40 + 80000f20: 80000f10 .word 0x80000f10 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 8000f386 .word 0x8000f386 + 80000f2c: 00000000 .word 0x00000000 + 80000f30: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x2c6e5687f837fb0b + 80000f34: 00093003 ld x0,0(x18) + 80000f38: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xcc9de1cf18dd552a + 80000f3c: 00093c03 ld x24,0(x18) + 80000f40: 00890913 addi x18,x18,8 + +0000000080000f44 : +Zknd_aes64ks2_cg_cp_rd_b8: + aes64ks2 x8, x0, x24 # perform operation + 80000f44: 7f800433 aes64ks2 x8,x0,x24 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zknd_aes64ks2_cg_cp_rd_b8, Zknd_aes64ks2_cg_cp_rd_b8_str) + 80000f48: 000cb683 ld x13,0(x25) + 80000f4c: 00868c63 beq x13,x8,80000f64 + 80000f50: 5f10676f jal x14,80007d40 + 80000f54: 80000f44 .word 0x80000f44 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 8000f3bb .word 0x8000f3bb + 80000f60: 00000000 .word 0x00000000 + 80000f64: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xef25ad05982f13ae + 80000f68: 00093103 ld x2,0(x18) + 80000f6c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0xb13e9c9bb5512b2a + 80000f70: 00093f03 ld x30,0(x18) + 80000f74: 00890913 addi x18,x18,8 + +0000000080000f78 : +Zknd_aes64ks2_cg_cp_rd_b9: + aes64ks2 x9, x2, x30 # perform operation + 80000f78: 7fe104b3 aes64ks2 x9,x2,x30 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zknd_aes64ks2_cg_cp_rd_b9, Zknd_aes64ks2_cg_cp_rd_b9_str) + 80000f7c: 000cb683 ld x13,0(x25) + 80000f80: 00968c63 beq x13,x9,80000f98 + 80000f84: 5bd0676f jal x14,80007d40 + 80000f88: 80000f78 .word 0x80000f78 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 8000f3f0 .word 0x8000f3f0 + 80000f94: 00000000 .word 0x00000000 + 80000f98: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x71e7a52f2442a49a + 80000f9c: 00093f83 ld x31,0(x18) + 80000fa0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x924c3e5677214113 + 80000fa4: 00093583 ld x11,0(x18) + 80000fa8: 00890913 addi x18,x18,8 + +0000000080000fac : +Zknd_aes64ks2_cg_cp_rd_b10: + aes64ks2 x10, x31, x11 # perform operation + 80000fac: 7ebf8533 aes64ks2 x10,x31,x11 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zknd_aes64ks2_cg_cp_rd_b10, Zknd_aes64ks2_cg_cp_rd_b10_str) + 80000fb0: 000cb683 ld x13,0(x25) + 80000fb4: 00a68c63 beq x13,x10,80000fcc + 80000fb8: 5890676f jal x14,80007d40 + 80000fbc: 80000fac .word 0x80000fac + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 8000f425 .word 0x8000f425 + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x4b5b4b38f5ed516e + 80000fd0: 00093f83 ld x31,0(x18) + 80000fd4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x8847caddc51a8932 + 80000fd8: 00093e03 ld x28,0(x18) + 80000fdc: 00890913 addi x18,x18,8 + +0000000080000fe0 : +Zknd_aes64ks2_cg_cp_rd_b11: + aes64ks2 x11, x31, x28 # perform operation + 80000fe0: 7fcf85b3 aes64ks2 x11,x31,x28 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zknd_aes64ks2_cg_cp_rd_b11, Zknd_aes64ks2_cg_cp_rd_b11_str) + 80000fe4: 000cb683 ld x13,0(x25) + 80000fe8: 00b68c63 beq x13,x11,80001000 + 80000fec: 5550676f jal x14,80007d40 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 8000f45b .word 0x8000f45b + 80000ffc: 00000000 .word 0x00000000 + 80001000: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x31e2b632a6307a79 + 80001004: 00093303 ld x6,0(x18) + 80001008: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xc5595c9b78011670 + 8000100c: 00093a83 ld x21,0(x18) + 80001010: 00890913 addi x18,x18,8 + +0000000080001014 : +Zknd_aes64ks2_cg_cp_rd_b12: + aes64ks2 x12, x6, x21 # perform operation + 80001014: 7f530633 aes64ks2 x12,x6,x21 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zknd_aes64ks2_cg_cp_rd_b12, Zknd_aes64ks2_cg_cp_rd_b12_str) + 80001018: 000cb683 ld x13,0(x25) + 8000101c: 00c68c63 beq x13,x12,80001034 + 80001020: 5210676f jal x14,80007d40 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f491 .word 0x8000f491 + 80001030: 00000000 .word 0x00000000 + 80001034: 008c8c93 addi x25,x25,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001038: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000103c: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xed537ea17d022f06 + 80001040: 00093383 ld x7,0(x18) + 80001044: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x4a1636643cea1ded + 80001048: 00093983 ld x19,0(x18) + 8000104c: 00890913 addi x18,x18,8 + +0000000080001050 : +Zknd_aes64ks2_cg_cp_rd_b13: + aes64ks2 x13, x7, x19 # perform operation + 80001050: 7f3386b3 aes64ks2 x13,x7,x19 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknd_aes64ks2_cg_cp_rd_b13, Zknd_aes64ks2_cg_cp_rd_b13_str) + 80001054: 000cb203 ld x4,0(x25) + 80001058: 00d20c63 beq x4,x13,80001070 + 8000105c: 4a5062ef jal x5,80007d00 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f4c7 .word 0x8000f4c7 + 8000106c: 00000000 .word 0x00000000 + 80001070: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x8f427c2d82fad819 + 80001074: 00093983 ld x19,0(x18) + 80001078: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x999b9111ceef9f04 + 8000107c: 00093303 ld x6,0(x18) + 80001080: 00890913 addi x18,x18,8 + +0000000080001084 : +Zknd_aes64ks2_cg_cp_rd_b14: + aes64ks2 x14, x19, x6 # perform operation + 80001084: 7e698733 aes64ks2 x14,x19,x6 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknd_aes64ks2_cg_cp_rd_b14, Zknd_aes64ks2_cg_cp_rd_b14_str) + 80001088: 000cb203 ld x4,0(x25) + 8000108c: 00e20c63 beq x4,x14,800010a4 + 80001090: 471062ef jal x5,80007d00 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f4fd .word 0x8000f4fd + 800010a0: 00000000 .word 0x00000000 + 800010a4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x02bddd268c0db471 + 800010a8: 00093f03 ld x30,0(x18) + 800010ac: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xd9db8d563039dd08 + 800010b0: 00093703 ld x14,0(x18) + 800010b4: 00890913 addi x18,x18,8 + +00000000800010b8 : +Zknd_aes64ks2_cg_cp_rd_b15: + aes64ks2 x15, x30, x14 # perform operation + 800010b8: 7eef07b3 aes64ks2 x15,x30,x14 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknd_aes64ks2_cg_cp_rd_b15, Zknd_aes64ks2_cg_cp_rd_b15_str) + 800010bc: 000cb203 ld x4,0(x25) + 800010c0: 00f20c63 beq x4,x15,800010d8 + 800010c4: 43d062ef jal x5,80007d00 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 8000f533 .word 0x8000f533 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x6324159b9f6a8d92 + 800010dc: 00093083 ld x1,0(x18) + 800010e0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xa94c9c1dae245ea5 + 800010e4: 00093783 ld x15,0(x18) + 800010e8: 00890913 addi x18,x18,8 + +00000000800010ec : +Zknd_aes64ks2_cg_cp_rd_b16: + aes64ks2 x16, x1, x15 # perform operation + 800010ec: 7ef08833 aes64ks2 x16,x1,x15 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknd_aes64ks2_cg_cp_rd_b16, Zknd_aes64ks2_cg_cp_rd_b16_str) + 800010f0: 000cb203 ld x4,0(x25) + 800010f4: 01020c63 beq x4,x16,8000110c + 800010f8: 409062ef jal x5,80007d00 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f569 .word 0x8000f569 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x288b5af35eb192ea + 80001110: 00093503 ld x10,0(x18) + 80001114: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x9fbc0a83ff4b3f36 + 80001118: 00093583 ld x11,0(x18) + 8000111c: 00890913 addi x18,x18,8 + +0000000080001120 : +Zknd_aes64ks2_cg_cp_rd_b17: + aes64ks2 x17, x10, x11 # perform operation + 80001120: 7eb508b3 aes64ks2 x17,x10,x11 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknd_aes64ks2_cg_cp_rd_b17, Zknd_aes64ks2_cg_cp_rd_b17_str) + 80001124: 000cb203 ld x4,0(x25) + 80001128: 01120c63 beq x4,x17,80001140 + 8000112c: 3d5062ef jal x5,80007d00 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f59f .word 0x8000f59f + 8000113c: 00000000 .word 0x00000000 + 80001140: 008c8c93 addi x25,x25,8 + + mv x9, x18 # switch data pointer register to avoid conflict with test + 80001144: 00090493 addi x9,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xf4b5c66f4143208d + 80001148: 0004b703 ld x14,0(x9) + 8000114c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x24f6c8762bd10a05 + 80001150: 0004bf03 ld x30,0(x9) + 80001154: 00848493 addi x9,x9,8 + +0000000080001158 : +Zknd_aes64ks2_cg_cp_rd_b18: + aes64ks2 x18, x14, x30 # perform operation + 80001158: 7fe70933 aes64ks2 x18,x14,x30 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknd_aes64ks2_cg_cp_rd_b18, Zknd_aes64ks2_cg_cp_rd_b18_str) + 8000115c: 000cb203 ld x4,0(x25) + 80001160: 01220c63 beq x4,x18,80001178 + 80001164: 39d062ef jal x5,80007d00 + 80001168: 80001158 .word 0x80001158 + 8000116c: 00000000 .word 0x00000000 + 80001170: 8000f5d5 .word 0x8000f5d5 + 80001174: 00000000 .word 0x00000000 + 80001178: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xe320d4845b00b82f + 8000117c: 0004bb83 ld x23,0(x9) + 80001180: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xf9ca13bdcaf5d8eb + 80001184: 0004b003 ld x0,0(x9) + 80001188: 00848493 addi x9,x9,8 + +000000008000118c : +Zknd_aes64ks2_cg_cp_rd_b19: + aes64ks2 x19, x23, x0 # perform operation + 8000118c: 7e0b89b3 aes64ks2 x19,x23,x0 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes64ks2_cg_cp_rd_b19, Zknd_aes64ks2_cg_cp_rd_b19_str) + 80001190: 000cb203 ld x4,0(x25) + 80001194: 01320c63 beq x4,x19,800011ac + 80001198: 369062ef jal x5,80007d00 + 8000119c: 8000118c .word 0x8000118c + 800011a0: 00000000 .word 0x00000000 + 800011a4: 8000f60b .word 0x8000f60b + 800011a8: 00000000 .word 0x00000000 + 800011ac: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x855d82cd447549fd + 800011b0: 0004bf83 ld x31,0(x9) + 800011b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x2209e79d5ec08e08 + 800011b8: 0004bb83 ld x23,0(x9) + 800011bc: 00848493 addi x9,x9,8 + +00000000800011c0 : +Zknd_aes64ks2_cg_cp_rd_b20: + aes64ks2 x20, x31, x23 # perform operation + 800011c0: 7f7f8a33 aes64ks2 x20,x31,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknd_aes64ks2_cg_cp_rd_b20, Zknd_aes64ks2_cg_cp_rd_b20_str) + 800011c4: 000cb203 ld x4,0(x25) + 800011c8: 01420c63 beq x4,x20,800011e0 + 800011cc: 335062ef jal x5,80007d00 + 800011d0: 800011c0 .word 0x800011c0 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 8000f641 .word 0x8000f641 + 800011dc: 00000000 .word 0x00000000 + 800011e0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x33d28591cfbf2ff7 + 800011e4: 0004bf03 ld x30,0(x9) + 800011e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xab36df4ad5d130ed + 800011ec: 0004ba03 ld x20,0(x9) + 800011f0: 00848493 addi x9,x9,8 + +00000000800011f4 : +Zknd_aes64ks2_cg_cp_rd_b21: + aes64ks2 x21, x30, x20 # perform operation + 800011f4: 7f4f0ab3 aes64ks2 x21,x30,x20 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknd_aes64ks2_cg_cp_rd_b21, Zknd_aes64ks2_cg_cp_rd_b21_str) + 800011f8: 000cb203 ld x4,0(x25) + 800011fc: 01520c63 beq x4,x21,80001214 + 80001200: 301062ef jal x5,80007d00 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 8000f677 .word 0x8000f677 + 80001210: 00000000 .word 0x00000000 + 80001214: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x26db17242cdd81ce + 80001218: 0004b703 ld x14,0(x9) + 8000121c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfaf61647d6ddd6ca + 80001220: 0004bc03 ld x24,0(x9) + 80001224: 00848493 addi x9,x9,8 + +0000000080001228 : +Zknd_aes64ks2_cg_cp_rd_b22: + aes64ks2 x22, x14, x24 # perform operation + 80001228: 7f870b33 aes64ks2 x22,x14,x24 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknd_aes64ks2_cg_cp_rd_b22, Zknd_aes64ks2_cg_cp_rd_b22_str) + 8000122c: 000cb203 ld x4,0(x25) + 80001230: 01620c63 beq x4,x22,80001248 + 80001234: 2cd062ef jal x5,80007d00 + 80001238: 80001228 .word 0x80001228 + 8000123c: 00000000 .word 0x00000000 + 80001240: 8000f6ad .word 0x8000f6ad + 80001244: 00000000 .word 0x00000000 + 80001248: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x32ed83af8397143d + 8000124c: 0004b003 ld x0,0(x9) + 80001250: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xda17088b74b44ce7 + 80001254: 0004bf83 ld x31,0(x9) + 80001258: 00848493 addi x9,x9,8 + +000000008000125c : +Zknd_aes64ks2_cg_cp_rd_b23: + aes64ks2 x23, x0, x31 # perform operation + 8000125c: 7ff00bb3 aes64ks2 x23,x0,x31 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes64ks2_cg_cp_rd_b23, Zknd_aes64ks2_cg_cp_rd_b23_str) + 80001260: 000cb203 ld x4,0(x25) + 80001264: 01720c63 beq x4,x23,8000127c + 80001268: 299062ef jal x5,80007d00 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 8000f6e3 .word 0x8000f6e3 + 80001278: 00000000 .word 0x00000000 + 8000127c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x2452d5d5bf6cd467 + 80001280: 0004b003 ld x0,0(x9) + 80001284: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xe4eb06b3d1c9ce1c + 80001288: 0004b303 ld x6,0(x9) + 8000128c: 00848493 addi x9,x9,8 + +0000000080001290 : +Zknd_aes64ks2_cg_cp_rd_b24: + aes64ks2 x24, x0, x6 # perform operation + 80001290: 7e600c33 aes64ks2 x24,x0,x6 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknd_aes64ks2_cg_cp_rd_b24, Zknd_aes64ks2_cg_cp_rd_b24_str) + 80001294: 000cb203 ld x4,0(x25) + 80001298: 01820c63 beq x4,x24,800012b0 + 8000129c: 265062ef jal x5,80007d00 + 800012a0: 80001290 .word 0x80001290 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 8000f719 .word 0x8000f719 + 800012ac: 00000000 .word 0x00000000 + 800012b0: 008c8c93 addi x25,x25,8 + + mv x31, x25 # switch signature pointer register to avoid conflict with test + 800012b4: 000c8f93 addi x31,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xedaf2885d8e916c0 + 800012b8: 0004bd03 ld x26,0(x9) + 800012bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xd4a52babf622ca19 + 800012c0: 0004b903 ld x18,0(x9) + 800012c4: 00848493 addi x9,x9,8 + +00000000800012c8 : +Zknd_aes64ks2_cg_cp_rd_b25: + aes64ks2 x25, x26, x18 # perform operation + 800012c8: 7f2d0cb3 aes64ks2 x25,x26,x18 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknd_aes64ks2_cg_cp_rd_b25, Zknd_aes64ks2_cg_cp_rd_b25_str) + 800012cc: 000fb203 ld x4,0(x31) + 800012d0: 01920c63 beq x4,x25,800012e8 + 800012d4: 22d062ef jal x5,80007d00 + 800012d8: 800012c8 .word 0x800012c8 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 8000f74f .word 0x8000f74f + 800012e4: 00000000 .word 0x00000000 + 800012e8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xd0f151b6bd0cbe80 + 800012ec: 0004b003 ld x0,0(x9) + 800012f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xb1820cbc4ccf83a8 + 800012f4: 0004b583 ld x11,0(x9) + 800012f8: 00848493 addi x9,x9,8 + +00000000800012fc : +Zknd_aes64ks2_cg_cp_rd_b26: + aes64ks2 x26, x0, x11 # perform operation + 800012fc: 7eb00d33 aes64ks2 x26,x0,x11 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zknd_aes64ks2_cg_cp_rd_b26, Zknd_aes64ks2_cg_cp_rd_b26_str) + 80001300: 000fb203 ld x4,0(x31) + 80001304: 01a20c63 beq x4,x26,8000131c + 80001308: 1f9062ef jal x5,80007d00 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 8000f785 .word 0x8000f785 + 80001318: 00000000 .word 0x00000000 + 8000131c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2a178848088a8a9a + 80001320: 0004bd03 ld x26,0(x9) + 80001324: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x4bf3dac3c94f2e42 + 80001328: 0004b383 ld x7,0(x9) + 8000132c: 00848493 addi x9,x9,8 + +0000000080001330 : +Zknd_aes64ks2_cg_cp_rd_b27: + aes64ks2 x27, x26, x7 # perform operation + 80001330: 7e7d0db3 aes64ks2 x27,x26,x7 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zknd_aes64ks2_cg_cp_rd_b27, Zknd_aes64ks2_cg_cp_rd_b27_str) + 80001334: 000fb203 ld x4,0(x31) + 80001338: 01b20c63 beq x4,x27,80001350 + 8000133c: 1c5062ef jal x5,80007d00 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 8000f7bb .word 0x8000f7bb + 8000134c: 00000000 .word 0x00000000 + 80001350: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x901dadee9ee3b073 + 80001354: 0004bc03 ld x24,0(x9) + 80001358: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x79ec6c4858aae58c + 8000135c: 0004bd83 ld x27,0(x9) + 80001360: 00848493 addi x9,x9,8 + +0000000080001364 : +Zknd_aes64ks2_cg_cp_rd_b28: + aes64ks2 x28, x24, x27 # perform operation + 80001364: 7fbc0e33 aes64ks2 x28,x24,x27 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknd_aes64ks2_cg_cp_rd_b28, Zknd_aes64ks2_cg_cp_rd_b28_str) + 80001368: 000fb203 ld x4,0(x31) + 8000136c: 01c20c63 beq x4,x28,80001384 + 80001370: 191062ef jal x5,80007d00 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000f7f1 .word 0x8000f7f1 + 80001380: 00000000 .word 0x00000000 + 80001384: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xabbc6ec6415c8a22 + 80001388: 0004b403 ld x8,0(x9) + 8000138c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x79320e291abf9580 + 80001390: 0004bb83 ld x23,0(x9) + 80001394: 00848493 addi x9,x9,8 + +0000000080001398 : +Zknd_aes64ks2_cg_cp_rd_b29: + aes64ks2 x29, x8, x23 # perform operation + 80001398: 7f740eb3 aes64ks2 x29,x8,x23 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknd_aes64ks2_cg_cp_rd_b29, Zknd_aes64ks2_cg_cp_rd_b29_str) + 8000139c: 000fb203 ld x4,0(x31) + 800013a0: 01d20c63 beq x4,x29,800013b8 + 800013a4: 15d062ef jal x5,80007d00 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 8000f827 .word 0x8000f827 + 800013b4: 00000000 .word 0x00000000 + 800013b8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x3c922ce0f3cbb912 + 800013bc: 0004b183 ld x3,0(x9) + 800013c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xb90b7c818b032701 + 800013c4: 0004b083 ld x1,0(x9) + 800013c8: 00848493 addi x9,x9,8 + +00000000800013cc : +Zknd_aes64ks2_cg_cp_rd_b30: + aes64ks2 x30, x3, x1 # perform operation + 800013cc: 7e118f33 aes64ks2 x30,x3,x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknd_aes64ks2_cg_cp_rd_b30, Zknd_aes64ks2_cg_cp_rd_b30_str) + 800013d0: 000fb203 ld x4,0(x31) + 800013d4: 01e20c63 beq x4,x30,800013ec + 800013d8: 129062ef jal x5,80007d00 + 800013dc: 800013cc .word 0x800013cc + 800013e0: 00000000 .word 0x00000000 + 800013e4: 8000f85d .word 0x8000f85d + 800013e8: 00000000 .word 0x00000000 + 800013ec: 008f8f93 addi x31,x31,8 + + mv x12, x31 # switch signature pointer register to avoid conflict with test + 800013f0: 000f8613 addi x12,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x70a573d6370f871c + 800013f4: 0004be03 ld x28,0(x9) + 800013f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x4a71f774f8b884b5 + 800013fc: 0004b883 ld x17,0(x9) + 80001400: 00848493 addi x9,x9,8 + +0000000080001404 : +Zknd_aes64ks2_cg_cp_rd_b31: + aes64ks2 x31, x28, x17 # perform operation + 80001404: 7f1e0fb3 aes64ks2 x31,x28,x17 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cp_rd_b31, Zknd_aes64ks2_cg_cp_rd_b31_str) + 80001408: 00063203 ld x4,0(x12) + 8000140c: 01f20c63 beq x4,x31,80001424 + 80001410: 0f1062ef jal x5,80007d00 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 8000f893 .word 0x8000f893 + 80001420: 00000000 .word 0x00000000 + 80001424: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000000000000 + 80001428: 0004bf03 ld x30,0(x9) + 8000142c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x043ca4f4c9f95d0b + 80001430: 0004b103 ld x2,0(x9) + 80001434: 00848493 addi x9,x9,8 + +0000000080001438 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x0: + aes64ks2 x7, x30, x2 # perform operation + 80001438: 7e2f03b3 aes64ks2 x7,x30,x2 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cp_rs1_edges_0x0, Zknd_aes64ks2_cg_cp_rs1_edges_0x0_str) + 8000143c: 00063203 ld x4,0(x12) + 80001440: 00720c63 beq x4,x7,80001458 + 80001444: 0bd062ef jal x5,80007d00 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 8000f8c9 .word 0x8000f8c9 + 80001454: 00000000 .word 0x00000000 + 80001458: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000001 + 8000145c: 0004b183 ld x3,0(x9) + 80001460: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0daea60c3e10aeef + 80001464: 0004b783 ld x15,0(x9) + 80001468: 00848493 addi x9,x9,8 + +000000008000146c : +Zknd_aes64ks2_cg_cp_rs1_edges_0x1: + aes64ks2 x29, x3, x15 # perform operation + 8000146c: 7ef18eb3 aes64ks2 x29,x3,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cp_rs1_edges_0x1, Zknd_aes64ks2_cg_cp_rs1_edges_0x1_str) + 80001470: 00063203 ld x4,0(x12) + 80001474: 01d20c63 beq x4,x29,8000148c + 80001478: 089062ef jal x5,80007d00 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 8000f906 .word 0x8000f906 + 80001488: 00000000 .word 0x00000000 + 8000148c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 80001490: 0004b503 ld x10,0(x9) + 80001494: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xca9c5ce66ab775d7 + 80001498: 0004bf03 ld x30,0(x9) + 8000149c: 00848493 addi x9,x9,8 + +00000000800014a0 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x2: + aes64ks2 x20, x10, x30 # perform operation + 800014a0: 7fe50a33 aes64ks2 x20,x10,x30 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cp_rs1_edges_0x2, Zknd_aes64ks2_cg_cp_rs1_edges_0x2_str) + 800014a4: 00063203 ld x4,0(x12) + 800014a8: 01420c63 beq x4,x20,800014c0 + 800014ac: 055062ef jal x5,80007d00 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 8000f943 .word 0x8000f943 + 800014bc: 00000000 .word 0x00000000 + 800014c0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x8000000000000000 + 800014c4: 0004b503 ld x10,0(x9) + 800014c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xb6348d230727e3e3 + 800014cc: 0004be83 ld x29,0(x9) + 800014d0: 00848493 addi x9,x9,8 + +00000000800014d4 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000000: + aes64ks2 x25, x10, x29 # perform operation + 800014d4: 7fd50cb3 aes64ks2 x25,x10,x29 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000000, Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d8: 00063203 ld x4,0(x12) + 800014dc: 01920c63 beq x4,x25,800014f4 + 800014e0: 021062ef jal x5,80007d00 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8000f980 .word 0x8000f980 + 800014f0: 00000000 .word 0x00000000 + 800014f4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000001 + 800014f8: 0004ba83 ld x21,0(x9) + 800014fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xa0bc608796b2286e + 80001500: 0004b403 ld x8,0(x9) + 80001504: 00848493 addi x9,x9,8 + +0000000080001508 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000001: + aes64ks2 x27, x21, x8 # perform operation + 80001508: 7e8a8db3 aes64ks2 x27,x21,x8 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000001, Zknd_aes64ks2_cg_cp_rs1_edges_0x8000000000000001_str) + 8000150c: 00063203 ld x4,0(x12) + 80001510: 01b20c63 beq x4,x27,80001528 + 80001514: 7ec062ef jal x5,80007d00 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 8000f9cd .word 0x8000f9cd + 80001524: 00000000 .word 0x00000000 + 80001528: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7fffffffffffffff + 8000152c: 0004b503 ld x10,0(x9) + 80001530: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xce66a6b4807cd4eb + 80001534: 0004b103 ld x2,0(x9) + 80001538: 00848493 addi x9,x9,8 + +000000008000153c : +Zknd_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64ks2 x31, x10, x2 # perform operation + 8000153c: 7e250fb3 aes64ks2 x31,x10,x2 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff, Zknd_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001540: 00063203 ld x4,0(x12) + 80001544: 01f20c63 beq x4,x31,8000155c + 80001548: 7b8062ef jal x5,80007d00 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 8000fa1a .word 0x8000fa1a + 80001558: 00000000 .word 0x00000000 + 8000155c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80001560: 0004be03 ld x28,0(x9) + 80001564: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x032cf5ac018beb68 + 80001568: 0004b383 ld x7,0(x9) + 8000156c: 00848493 addi x9,x9,8 + +0000000080001570 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64ks2 x24, x28, x7 # perform operation + 80001570: 7e7e0c33 aes64ks2 x24,x28,x7 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001574: 00063203 ld x4,0(x12) + 80001578: 01820c63 beq x4,x24,80001590 + 8000157c: 784062ef jal x5,80007d00 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 8000fa67 .word 0x8000fa67 + 8000158c: 00000000 .word 0x00000000 + 80001590: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffffffffffff + 80001594: 0004b083 ld x1,0(x9) + 80001598: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fa85ac4b14ce3d4 + 8000159c: 0004b803 ld x16,0(x9) + 800015a0: 00848493 addi x9,x9,8 + +00000000800015a4 : +Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff: + aes64ks2 x29, x1, x16 # perform operation + 800015a4: 7f008eb3 aes64ks2 x29,x1,x16 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff, Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a8: 00063203 ld x4,0(x12) + 800015ac: 01d20c63 beq x4,x29,800015c4 + 800015b0: 750062ef jal x5,80007d00 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000fab4 .word 0x8000fab4 + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xfffffffffffffffe + 800015c8: 0004bb03 ld x22,0(x9) + 800015cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x209796ce14cdbe4c + 800015d0: 0004b903 ld x18,0(x9) + 800015d4: 00848493 addi x9,x9,8 + +00000000800015d8 : +Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64ks2 x8, x22, x18 # perform operation + 800015d8: 7f2b0433 aes64ks2 x8,x22,x18 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe, Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015dc: 00063203 ld x4,0(x12) + 800015e0: 00820c63 beq x4,x8,800015f8 + 800015e4: 71c062ef jal x5,80007d00 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000fb01 .word 0x8000fb01 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800015fc: 0004be03 ld x28,0(x9) + 80001600: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x24a36bedca9c30bd + 80001604: 0004be83 ld x29,0(x9) + 80001608: 00848493 addi x9,x9,8 + +000000008000160c : +Zknd_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64ks2 x27, x28, x29 # perform operation + 8000160c: 7fde0db3 aes64ks2 x27,x28,x29 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001610: 00063203 ld x4,0(x12) + 80001614: 01b20c63 beq x4,x27,8000162c + 80001618: 6e8062ef jal x5,80007d00 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 8000fb4e .word 0x8000fb4e + 80001628: 00000000 .word 0x00000000 + 8000162c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80001630: 0004bc83 ld x25,0(x9) + 80001634: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x9d8fc35ebfa3f99d + 80001638: 0004b583 ld x11,0(x9) + 8000163c: 00848493 addi x9,x9,8 + +0000000080001640 : +Zknd_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64ks2 x20, x25, x11 # perform operation + 80001640: 7ebc8a33 aes64ks2 x20,x25,x11 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001644: 00063203 ld x4,0(x12) + 80001648: 01420c63 beq x4,x20,80001660 + 8000164c: 6b4062ef jal x5,80007d00 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 8000fb9b .word 0x8000fb9b + 8000165c: 00000000 .word 0x00000000 + 80001660: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5555555555555555 + 80001664: 0004ba83 ld x21,0(x9) + 80001668: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x1661bf18490892c9 + 8000166c: 0004b183 ld x3,0(x9) + 80001670: 00848493 addi x9,x9,8 + +0000000080001674 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x5555555555555555: + aes64ks2 x14, x21, x3 # perform operation + 80001674: 7e3a8733 aes64ks2 x14,x21,x3 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cp_rs1_edges_0x5555555555555555, Zknd_aes64ks2_cg_cp_rs1_edges_0x5555555555555555_str) + 80001678: 00063203 ld x4,0(x12) + 8000167c: 00e20c63 beq x4,x14,80001694 + 80001680: 680062ef jal x5,80007d00 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000fbe8 .word 0x8000fbe8 + 80001690: 00000000 .word 0x00000000 + 80001694: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000000ffffffff + 80001698: 0004b983 ld x19,0(x9) + 8000169c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xe5c00f33f6a429b0 + 800016a0: 0004b183 ld x3,0(x9) + 800016a4: 00848493 addi x9,x9,8 + +00000000800016a8 : +Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffff: + aes64ks2 x15, x19, x3 # perform operation + 800016a8: 7e3987b3 aes64ks2 x15,x19,x3 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffff, Zknd_aes64ks2_cg_cp_rs1_edges_0xffffffff_str) + 800016ac: 00063203 ld x4,0(x12) + 800016b0: 00f20c63 beq x4,x15,800016c8 + 800016b4: 64c062ef jal x5,80007d00 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 8000fc35 .word 0x8000fc35 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800016cc: 0004b183 ld x3,0(x9) + 800016d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x340b4d3199f9e289 + 800016d4: 0004bd03 ld x26,0(x9) + 800016d8: 00848493 addi x9,x9,8 + +00000000800016dc : +Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffe: + aes64ks2 x25, x3, x26 # perform operation + 800016dc: 7fa18cb3 aes64ks2 x25,x3,x26 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffe, Zknd_aes64ks2_cg_cp_rs1_edges_0xfffffffe_str) + 800016e0: 00063203 ld x4,0(x12) + 800016e4: 01920c63 beq x4,x25,800016fc + 800016e8: 618062ef jal x5,80007d00 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 8000fc7a .word 0x8000fc7a + 800016f8: 00000000 .word 0x00000000 + 800016fc: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000100000000 + 80001700: 0004b183 ld x3,0(x9) + 80001704: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xd7ef47b10cd752ab + 80001708: 0004b903 ld x18,0(x9) + 8000170c: 00848493 addi x9,x9,8 + +0000000080001710 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x100000000: + aes64ks2 x17, x3, x18 # perform operation + 80001710: 7f2188b3 aes64ks2 x17,x3,x18 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cp_rs1_edges_0x100000000, Zknd_aes64ks2_cg_cp_rs1_edges_0x100000000_str) + 80001714: 00063203 ld x4,0(x12) + 80001718: 01120c63 beq x4,x17,80001730 + 8000171c: 5e4062ef jal x5,80007d00 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 8000fcbf .word 0x8000fcbf + 8000172c: 00000000 .word 0x00000000 + 80001730: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0000000100000001 + 80001734: 0004b403 ld x8,0(x9) + 80001738: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x01184f167caf3e46 + 8000173c: 0004bf83 ld x31,0(x9) + 80001740: 00848493 addi x9,x9,8 + +0000000080001744 : +Zknd_aes64ks2_cg_cp_rs1_edges_0x100000001: + aes64ks2 x2, x8, x31 # perform operation + 80001744: 7ff40133 aes64ks2 x2,x8,x31 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cp_rs1_edges_0x100000001, Zknd_aes64ks2_cg_cp_rs1_edges_0x100000001_str) + 80001748: 00063203 ld x4,0(x12) + 8000174c: 00220c63 beq x4,x2,80001764 + 80001750: 5b0062ef jal x5,80007d00 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 8000fd05 .word 0x8000fd05 + 80001760: 00000000 .word 0x00000000 + 80001764: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xdf3d67bb86016676 + 80001768: 0004b883 ld x17,0(x9) + 8000176c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 80001770: 0004b503 ld x10,0(x9) + 80001774: 00848493 addi x9,x9,8 + +0000000080001778 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x0: + aes64ks2 x7, x17, x10 # perform operation + 80001778: 7ea883b3 aes64ks2 x7,x17,x10 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cp_rs2_edges_0x0, Zknd_aes64ks2_cg_cp_rs2_edges_0x0_str) + 8000177c: 00063203 ld x4,0(x12) + 80001780: 00720c63 beq x4,x7,80001798 + 80001784: 57c062ef jal x5,80007d00 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 8000fd4b .word 0x8000fd4b + 80001794: 00000000 .word 0x00000000 + 80001798: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x2b44395d613339e7 + 8000179c: 0004b503 ld x10,0(x9) + 800017a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 800017a4: 0004b783 ld x15,0(x9) + 800017a8: 00848493 addi x9,x9,8 + +00000000800017ac : +Zknd_aes64ks2_cg_cp_rs2_edges_0x1: + aes64ks2 x8, x10, x15 # perform operation + 800017ac: 7ef50433 aes64ks2 x8,x10,x15 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cp_rs2_edges_0x1, Zknd_aes64ks2_cg_cp_rs2_edges_0x1_str) + 800017b0: 00063203 ld x4,0(x12) + 800017b4: 00820c63 beq x4,x8,800017cc + 800017b8: 548062ef jal x5,80007d00 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 8000fd89 .word 0x8000fd89 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x2ae1ba9276a9b228 + 800017d0: 0004b383 ld x7,0(x9) + 800017d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000002 + 800017d8: 0004b783 ld x15,0(x9) + 800017dc: 00848493 addi x9,x9,8 + +00000000800017e0 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x2: + aes64ks2 x10, x7, x15 # perform operation + 800017e0: 7ef38533 aes64ks2 x10,x7,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cp_rs2_edges_0x2, Zknd_aes64ks2_cg_cp_rs2_edges_0x2_str) + 800017e4: 00063203 ld x4,0(x12) + 800017e8: 00a20c63 beq x4,x10,80001800 + 800017ec: 514062ef jal x5,80007d00 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 8000fdc7 .word 0x8000fdc7 + 800017fc: 00000000 .word 0x00000000 + 80001800: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7e2efceb08036418 + 80001804: 0004ba83 ld x21,0(x9) + 80001808: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000000 + 8000180c: 0004b403 ld x8,0(x9) + 80001810: 00848493 addi x9,x9,8 + +0000000080001814 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000000: + aes64ks2 x13, x21, x8 # perform operation + 80001814: 7e8a86b3 aes64ks2 x13,x21,x8 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000000, Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000000_str) + 80001818: 00063203 ld x4,0(x12) + 8000181c: 00d20c63 beq x4,x13,80001834 + 80001820: 4e0062ef jal x5,80007d00 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000fe05 .word 0x8000fe05 + 80001830: 00000000 .word 0x00000000 + 80001834: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xd46c98b07c7822ce + 80001838: 0004bc03 ld x24,0(x9) + 8000183c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x8000000000000001 + 80001840: 0004bb83 ld x23,0(x9) + 80001844: 00848493 addi x9,x9,8 + +0000000080001848 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000001: + aes64ks2 x20, x24, x23 # perform operation + 80001848: 7f7c0a33 aes64ks2 x20,x24,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000001, Zknd_aes64ks2_cg_cp_rs2_edges_0x8000000000000001_str) + 8000184c: 00063203 ld x4,0(x12) + 80001850: 01420c63 beq x4,x20,80001868 + 80001854: 4ac062ef jal x5,80007d00 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 8000fe52 .word 0x8000fe52 + 80001864: 00000000 .word 0x00000000 + 80001868: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x2b8507db4451840e + 8000186c: 0004bf83 ld x31,0(x9) + 80001870: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7fffffffffffffff + 80001874: 0004b083 ld x1,0(x9) + 80001878: 00848493 addi x9,x9,8 + +000000008000187c : +Zknd_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64ks2 x15, x31, x1 # perform operation + 8000187c: 7e1f87b3 aes64ks2 x15,x31,x1 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff, Zknd_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001880: 00063203 ld x4,0(x12) + 80001884: 00f20c63 beq x4,x15,8000189c + 80001888: 478062ef jal x5,80007d00 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 8000fe9f .word 0x8000fe9f + 80001898: 00000000 .word 0x00000000 + 8000189c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x2a6d93d30bd5467d + 800018a0: 0004b183 ld x3,0(x9) + 800018a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffffffffffe + 800018a8: 0004b083 ld x1,0(x9) + 800018ac: 00848493 addi x9,x9,8 + +00000000800018b0 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64ks2 x20, x3, x1 # perform operation + 800018b0: 7e118a33 aes64ks2 x20,x3,x1 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b4: 00063203 ld x4,0(x12) + 800018b8: 01420c63 beq x4,x20,800018d0 + 800018bc: 444062ef jal x5,80007d00 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 8000feec .word 0x8000feec + 800018cc: 00000000 .word 0x00000000 + 800018d0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xc213893181816920 + 800018d4: 0004b503 ld x10,0(x9) + 800018d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xffffffffffffffff + 800018dc: 0004b783 ld x15,0(x9) + 800018e0: 00848493 addi x9,x9,8 + +00000000800018e4 : +Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff: + aes64ks2 x8, x10, x15 # perform operation + 800018e4: 7ef50433 aes64ks2 x8,x10,x15 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff, Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e8: 00063203 ld x4,0(x12) + 800018ec: 00820c63 beq x4,x8,80001904 + 800018f0: 410062ef jal x5,80007d00 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 8000ff39 .word 0x8000ff39 + 80001900: 00000000 .word 0x00000000 + 80001904: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x70d446910e77b53e + 80001908: 0004bf03 ld x30,0(x9) + 8000190c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xfffffffffffffffe + 80001910: 0004ba03 ld x20,0(x9) + 80001914: 00848493 addi x9,x9,8 + +0000000080001918 : +Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64ks2 x2, x30, x20 # perform operation + 80001918: 7f4f0133 aes64ks2 x2,x30,x20 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe, Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000191c: 00063203 ld x4,0(x12) + 80001920: 00220c63 beq x4,x2,80001938 + 80001924: 3dc062ef jal x5,80007d00 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 8000ff86 .word 0x8000ff86 + 80001934: 00000000 .word 0x00000000 + 80001938: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xc997fc683478498b + 8000193c: 0004b703 ld x14,0(x9) + 80001940: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80001944: 0004be83 ld x29,0(x9) + 80001948: 00848493 addi x9,x9,8 + +000000008000194c : +Zknd_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64ks2 x24, x14, x29 # perform operation + 8000194c: 7fd70c33 aes64ks2 x24,x14,x29 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001950: 00063203 ld x4,0(x12) + 80001954: 01820c63 beq x4,x24,8000196c + 80001958: 3a8062ef jal x5,80007d00 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 8000ffd3 .word 0x8000ffd3 + 80001968: 00000000 .word 0x00000000 + 8000196c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8ee0b4fb70c93946 + 80001970: 0004ba83 ld x21,0(x9) + 80001974: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 80001978: 0004b183 ld x3,0(x9) + 8000197c: 00848493 addi x9,x9,8 + +0000000080001980 : +Zknd_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64ks2 x16, x21, x3 # perform operation + 80001980: 7e3a8833 aes64ks2 x16,x21,x3 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001984: 00063203 ld x4,0(x12) + 80001988: 01020c63 beq x4,x16,800019a0 + 8000198c: 374062ef jal x5,80007d00 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 80010020 .word 0x80010020 + 8000199c: 00000000 .word 0x00000000 + 800019a0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x22ded7249052c58f + 800019a4: 0004ba03 ld x20,0(x9) + 800019a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5555555555555555 + 800019ac: 0004b183 ld x3,0(x9) + 800019b0: 00848493 addi x9,x9,8 + +00000000800019b4 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x5555555555555555: + aes64ks2 x13, x20, x3 # perform operation + 800019b4: 7e3a06b3 aes64ks2 x13,x20,x3 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cp_rs2_edges_0x5555555555555555, Zknd_aes64ks2_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b8: 00063203 ld x4,0(x12) + 800019bc: 00d20c63 beq x4,x13,800019d4 + 800019c0: 340062ef jal x5,80007d00 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 8001006d .word 0x8001006d + 800019d0: 00000000 .word 0x00000000 + 800019d4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xec8605e832bc9474 + 800019d8: 0004b703 ld x14,0(x9) + 800019dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000000ffffffff + 800019e0: 0004b503 ld x10,0(x9) + 800019e4: 00848493 addi x9,x9,8 + +00000000800019e8 : +Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffff: + aes64ks2 x27, x14, x10 # perform operation + 800019e8: 7ea70db3 aes64ks2 x27,x14,x10 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffff, Zknd_aes64ks2_cg_cp_rs2_edges_0xffffffff_str) + 800019ec: 00063203 ld x4,0(x12) + 800019f0: 01b20c63 beq x4,x27,80001a08 + 800019f4: 30c062ef jal x5,80007d00 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 800100ba .word 0x800100ba + 80001a04: 00000000 .word 0x00000000 + 80001a08: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x66558e4c8b42d246 + 80001a0c: 0004bf83 ld x31,0(x9) + 80001a10: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000fffffffe + 80001a14: 0004bd83 ld x27,0(x9) + 80001a18: 00848493 addi x9,x9,8 + +0000000080001a1c : +Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffe: + aes64ks2 x16, x31, x27 # perform operation + 80001a1c: 7fbf8833 aes64ks2 x16,x31,x27 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffe, Zknd_aes64ks2_cg_cp_rs2_edges_0xfffffffe_str) + 80001a20: 00063203 ld x4,0(x12) + 80001a24: 01020c63 beq x4,x16,80001a3c + 80001a28: 2d8062ef jal x5,80007d00 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 800100ff .word 0x800100ff + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x8d1d3f57864c6f33 + 80001a40: 0004bf83 ld x31,0(x9) + 80001a44: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000100000000 + 80001a48: 0004bb03 ld x22,0(x9) + 80001a4c: 00848493 addi x9,x9,8 + +0000000080001a50 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x100000000: + aes64ks2 x1, x31, x22 # perform operation + 80001a50: 7f6f80b3 aes64ks2 x1,x31,x22 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cp_rs2_edges_0x100000000, Zknd_aes64ks2_cg_cp_rs2_edges_0x100000000_str) + 80001a54: 00063203 ld x4,0(x12) + 80001a58: 00120c63 beq x4,x1,80001a70 + 80001a5c: 2a4062ef jal x5,80007d00 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 80010144 .word 0x80010144 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xe4c34a2dd6916c43 + 80001a74: 0004b183 ld x3,0(x9) + 80001a78: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000100000001 + 80001a7c: 0004b703 ld x14,0(x9) + 80001a80: 00848493 addi x9,x9,8 + +0000000080001a84 : +Zknd_aes64ks2_cg_cp_rs2_edges_0x100000001: + aes64ks2 x22, x3, x14 # perform operation + 80001a84: 7ee18b33 aes64ks2 x22,x3,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cp_rs2_edges_0x100000001, Zknd_aes64ks2_cg_cp_rs2_edges_0x100000001_str) + 80001a88: 00063203 ld x4,0(x12) + 80001a8c: 01620c63 beq x4,x22,80001aa4 + 80001a90: 270062ef jal x5,80007d00 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8001018a .word 0x8001018a + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 00860613 addi x12,x12,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000000000000 + 80001aa8: 0004bb83 ld x23,0(x9) + 80001aac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000000 + 80001ab0: 0004bd03 ld x26,0(x9) + 80001ab4: 00848493 addi x9,x9,8 + +0000000080001ab8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64ks2 x15, x23, x26 # perform operation + 80001ab8: 7fab87b3 aes64ks2 x15,x23,x26 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001abc: 00063203 ld x4,0(x12) + 80001ac0: 00f20c63 beq x4,x15,80001ad8 + 80001ac4: 23c062ef jal x5,80007d00 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 800101d0 .word 0x800101d0 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000000 + 80001adc: 0004be83 ld x29,0(x9) + 80001ae0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000000000001 + 80001ae4: 0004b083 ld x1,0(x9) + 80001ae8: 00848493 addi x9,x9,8 + +0000000080001aec : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64ks2 x24, x29, x1 # perform operation + 80001aec: 7e1e8c33 aes64ks2 x24,x29,x1 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af0: 00063203 ld x4,0(x12) + 80001af4: 01820c63 beq x4,x24,80001b0c + 80001af8: 208062ef jal x5,80007d00 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 80010225 .word 0x80010225 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000000000000 + 80001b10: 0004bc03 ld x24,0(x9) + 80001b14: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000000000002 + 80001b18: 0004b683 ld x13,0(x9) + 80001b1c: 00848493 addi x9,x9,8 + +0000000080001b20 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64ks2 x14, x24, x13 # perform operation + 80001b20: 7edc0733 aes64ks2 x14,x24,x13 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b24: 00063203 ld x4,0(x12) + 80001b28: 00e20c63 beq x4,x14,80001b40 + 80001b2c: 1d4062ef jal x5,80007d00 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 8001027a .word 0x8001027a + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000000 + 80001b44: 0004be03 ld x28,0(x9) + 80001b48: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000000 + 80001b4c: 0004b403 ld x8,0(x9) + 80001b50: 00848493 addi x9,x9,8 + +0000000080001b54 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64ks2 x17, x28, x8 # perform operation + 80001b54: 7e8e08b3 aes64ks2 x17,x28,x8 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b58: 00063203 ld x4,0(x12) + 80001b5c: 01120c63 beq x4,x17,80001b74 + 80001b60: 1a0062ef jal x5,80007d00 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 800102cf .word 0x800102cf + 80001b70: 00000000 .word 0x00000000 + 80001b74: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x0000000000000000 + 80001b78: 0004bb03 ld x22,0(x9) + 80001b7c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x8000000000000001 + 80001b80: 0004b903 ld x18,0(x9) + 80001b84: 00848493 addi x9,x9,8 + +0000000080001b88 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64ks2 x24, x22, x18 # perform operation + 80001b88: 7f2b0c33 aes64ks2 x24,x22,x18 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b8c: 00063203 ld x4,0(x12) + 80001b90: 01820c63 beq x4,x24,80001ba8 + 80001b94: 16c062ef jal x5,80007d00 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 80010333 .word 0x80010333 + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000000000000 + 80001bac: 0004bc03 ld x24,0(x9) + 80001bb0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffffffffffff + 80001bb4: 0004b703 ld x14,0(x9) + 80001bb8: 00848493 addi x9,x9,8 + +0000000080001bbc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64ks2 x22, x24, x14 # perform operation + 80001bbc: 7eec0b33 aes64ks2 x22,x24,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc0: 00063203 ld x4,0(x12) + 80001bc4: 01620c63 beq x4,x22,80001bdc + 80001bc8: 138062ef jal x5,80007d00 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 80010397 .word 0x80010397 + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000000 + 80001be0: 0004ba83 ld x21,0(x9) + 80001be4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80001be8: 0004b783 ld x15,0(x9) + 80001bec: 00848493 addi x9,x9,8 + +0000000080001bf0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x21, x15 # perform operation + 80001bf0: 7efa8133 aes64ks2 x2,x21,x15 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf4: 00063203 ld x4,0(x12) + 80001bf8: 00220c63 beq x4,x2,80001c10 + 80001bfc: 104062ef jal x5,80007d00 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 800103fb .word 0x800103fb + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000000 + 80001c14: 0004ba83 ld x21,0(x9) + 80001c18: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffffffffffff + 80001c1c: 0004bd03 ld x26,0(x9) + 80001c20: 00848493 addi x9,x9,8 + +0000000080001c24 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64ks2 x27, x21, x26 # perform operation + 80001c24: 7faa8db3 aes64ks2 x27,x21,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c28: 00063203 ld x4,0(x12) + 80001c2c: 01b20c63 beq x4,x27,80001c44 + 80001c30: 0d0062ef jal x5,80007d00 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 8001045f .word 0x8001045f + 80001c40: 00000000 .word 0x00000000 + 80001c44: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000000 + 80001c48: 0004b503 ld x10,0(x9) + 80001c4c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffffffffffe + 80001c50: 0004be83 ld x29,0(x9) + 80001c54: 00848493 addi x9,x9,8 + +0000000080001c58 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64ks2 x19, x10, x29 # perform operation + 80001c58: 7fd509b3 aes64ks2 x19,x10,x29 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c5c: 00063203 ld x4,0(x12) + 80001c60: 01320c63 beq x4,x19,80001c78 + 80001c64: 09c062ef jal x5,80007d00 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 800104c3 .word 0x800104c3 + 80001c74: 00000000 .word 0x00000000 + 80001c78: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000000 + 80001c7c: 0004b183 ld x3,0(x9) + 80001c80: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80001c84: 0004b703 ld x14,0(x9) + 80001c88: 00848493 addi x9,x9,8 + +0000000080001c8c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64ks2 x27, x3, x14 # perform operation + 80001c8c: 7ee18db3 aes64ks2 x27,x3,x14 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c90: 00063203 ld x4,0(x12) + 80001c94: 01b20c63 beq x4,x27,80001cac + 80001c98: 068062ef jal x5,80007d00 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 80010527 .word 0x80010527 + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x0000000000000000 + 80001cb0: 0004b683 ld x13,0(x9) + 80001cb4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80001cb8: 0004b783 ld x15,0(x9) + 80001cbc: 00848493 addi x9,x9,8 + +0000000080001cc0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x6, x13, x15 # perform operation + 80001cc0: 7ef68333 aes64ks2 x6,x13,x15 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc4: 00063203 ld x4,0(x12) + 80001cc8: 00620c63 beq x4,x6,80001ce0 + 80001ccc: 034062ef jal x5,80007d00 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 8001058b .word 0x8001058b + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000000 + 80001ce4: 0004b903 ld x18,0(x9) + 80001ce8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x5555555555555555 + 80001cec: 0004b583 ld x11,0(x9) + 80001cf0: 00848493 addi x9,x9,8 + +0000000080001cf4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64ks2 x6, x18, x11 # perform operation + 80001cf4: 7eb90333 aes64ks2 x6,x18,x11 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf8: 00063203 ld x4,0(x12) + 80001cfc: 00620c63 beq x4,x6,80001d14 + 80001d00: 000062ef jal x5,80007d00 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 800105ef .word 0x800105ef + 80001d10: 00000000 .word 0x00000000 + 80001d14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000000 + 80001d18: 0004b983 ld x19,0(x9) + 80001d1c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000ffffffff + 80001d20: 0004ba03 ld x20,0(x9) + 80001d24: 00848493 addi x9,x9,8 + +0000000080001d28 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64ks2 x14, x19, x20 # perform operation + 80001d28: 7f498733 aes64ks2 x14,x19,x20 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d2c: 00063203 ld x4,0(x12) + 80001d30: 00e20c63 beq x4,x14,80001d48 + 80001d34: 7cd052ef jal x5,80007d00 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 80010653 .word 0x80010653 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000000 + 80001d4c: 0004b183 ld x3,0(x9) + 80001d50: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d54: 0004bb03 ld x22,0(x9) + 80001d58: 00848493 addi x9,x9,8 + +0000000080001d5c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64ks2 x10, x3, x22 # perform operation + 80001d5c: 7f618533 aes64ks2 x10,x3,x22 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d60: 00063203 ld x4,0(x12) + 80001d64: 00a20c63 beq x4,x10,80001d7c + 80001d68: 799052ef jal x5,80007d00 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 800106af .word 0x800106af + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000000 + 80001d80: 0004bd03 ld x26,0(x9) + 80001d84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x0000000100000000 + 80001d88: 0004b403 ld x8,0(x9) + 80001d8c: 00848493 addi x9,x9,8 + +0000000080001d90 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64ks2 x23, x26, x8 # perform operation + 80001d90: 7e8d0bb3 aes64ks2 x23,x26,x8 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d94: 00063203 ld x4,0(x12) + 80001d98: 01720c63 beq x4,x23,80001db0 + 80001d9c: 765052ef jal x5,80007d00 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 8001070b .word 0x8001070b + 80001dac: 00000000 .word 0x00000000 + 80001db0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000000 + 80001db4: 0004b383 ld x7,0(x9) + 80001db8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000001 + 80001dbc: 0004b803 ld x16,0(x9) + 80001dc0: 00848493 addi x9,x9,8 + +0000000080001dc4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64ks2 x10, x7, x16 # perform operation + 80001dc4: 7f038533 aes64ks2 x10,x7,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc8: 00063203 ld x4,0(x12) + 80001dcc: 00a20c63 beq x4,x10,80001de4 + 80001dd0: 731052ef jal x5,80007d00 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 80010768 .word 0x80010768 + 80001de0: 00000000 .word 0x00000000 + 80001de4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001de8: 0004bd03 ld x26,0(x9) + 80001dec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x0000000000000000 + 80001df0: 0004b883 ld x17,0(x9) + 80001df4: 00848493 addi x9,x9,8 + +0000000080001df8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64ks2 x21, x26, x17 # perform operation + 80001df8: 7f1d0ab3 aes64ks2 x21,x26,x17 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dfc: 00063203 ld x4,0(x12) + 80001e00: 01520c63 beq x4,x21,80001e18 + 80001e04: 6fd052ef jal x5,80007d00 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 800107c5 .word 0x800107c5 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000000000001 + 80001e1c: 0004b883 ld x17,0(x9) + 80001e20: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000001 + 80001e24: 0004b983 ld x19,0(x9) + 80001e28: 00848493 addi x9,x9,8 + +0000000080001e2c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64ks2 x3, x17, x19 # perform operation + 80001e2c: 7f3881b3 aes64ks2 x3,x17,x19 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e30: 00063203 ld x4,0(x12) + 80001e34: 00320c63 beq x4,x3,80001e4c + 80001e38: 6c9052ef jal x5,80007d00 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 8001081a .word 0x8001081a + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001e50: 0004bd03 ld x26,0(x9) + 80001e54: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000002 + 80001e58: 0004b703 ld x14,0(x9) + 80001e5c: 00848493 addi x9,x9,8 + +0000000080001e60 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64ks2 x21, x26, x14 # perform operation + 80001e60: 7eed0ab3 aes64ks2 x21,x26,x14 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e64: 00063203 ld x4,0(x12) + 80001e68: 01520c63 beq x4,x21,80001e80 + 80001e6c: 695052ef jal x5,80007d00 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 8001086f .word 0x8001086f + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000000000001 + 80001e84: 0004bf83 ld x31,0(x9) + 80001e88: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x8000000000000000 + 80001e8c: 0004b683 ld x13,0(x9) + 80001e90: 00848493 addi x9,x9,8 + +0000000080001e94 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64ks2 x8, x31, x13 # perform operation + 80001e94: 7edf8433 aes64ks2 x8,x31,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e98: 00063203 ld x4,0(x12) + 80001e9c: 00820c63 beq x4,x8,80001eb4 + 80001ea0: 661052ef jal x5,80007d00 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 800108c4 .word 0x800108c4 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001eb8: 0004bd03 ld x26,0(x9) + 80001ebc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000001 + 80001ec0: 0004be03 ld x28,0(x9) + 80001ec4: 00848493 addi x9,x9,8 + +0000000080001ec8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64ks2 x18, x26, x28 # perform operation + 80001ec8: 7fcd0933 aes64ks2 x18,x26,x28 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ecc: 00063203 ld x4,0(x12) + 80001ed0: 01220c63 beq x4,x18,80001ee8 + 80001ed4: 62d052ef jal x5,80007d00 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 80010928 .word 0x80010928 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x0000000000000001 + 80001eec: 0004ba03 ld x20,0(x9) + 80001ef0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7fffffffffffffff + 80001ef4: 0004be83 ld x29,0(x9) + 80001ef8: 00848493 addi x9,x9,8 + +0000000080001efc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64ks2 x16, x20, x29 # perform operation + 80001efc: 7fda0833 aes64ks2 x16,x20,x29 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f00: 00063203 ld x4,0(x12) + 80001f04: 01020c63 beq x4,x16,80001f1c + 80001f08: 5f9052ef jal x5,80007d00 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 8001098c .word 0x8001098c + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000001 + 80001f20: 0004b903 ld x18,0(x9) + 80001f24: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80001f28: 0004b983 ld x19,0(x9) + 80001f2c: 00848493 addi x9,x9,8 + +0000000080001f30 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64ks2 x11, x18, x19 # perform operation + 80001f30: 7f3905b3 aes64ks2 x11,x18,x19 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f34: 00063203 ld x4,0(x12) + 80001f38: 00b20c63 beq x4,x11,80001f50 + 80001f3c: 5c5052ef jal x5,80007d00 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 800109f0 .word 0x800109f0 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000001 + 80001f54: 0004ba83 ld x21,0(x9) + 80001f58: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffffffffffff + 80001f5c: 0004bd03 ld x26,0(x9) + 80001f60: 00848493 addi x9,x9,8 + +0000000080001f64 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64ks2 x23, x21, x26 # perform operation + 80001f64: 7faa8bb3 aes64ks2 x23,x21,x26 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f68: 00063203 ld x4,0(x12) + 80001f6c: 01720c63 beq x4,x23,80001f84 + 80001f70: 591052ef jal x5,80007d00 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 80010a54 .word 0x80010a54 + 80001f80: 00000000 .word 0x00000000 + 80001f84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000000000001 + 80001f88: 0004bb83 ld x23,0(x9) + 80001f8c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xfffffffffffffffe + 80001f90: 0004b883 ld x17,0(x9) + 80001f94: 00848493 addi x9,x9,8 + +0000000080001f98 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64ks2 x8, x23, x17 # perform operation + 80001f98: 7f1b8433 aes64ks2 x8,x23,x17 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f9c: 00063203 ld x4,0(x12) + 80001fa0: 00820c63 beq x4,x8,80001fb8 + 80001fa4: 55d052ef jal x5,80007d00 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 80010ab8 .word 0x80010ab8 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000001 + 80001fbc: 0004be03 ld x28,0(x9) + 80001fc0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80001fc4: 0004b883 ld x17,0(x9) + 80001fc8: 00848493 addi x9,x9,8 + +0000000080001fcc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64ks2 x6, x28, x17 # perform operation + 80001fcc: 7f1e0333 aes64ks2 x6,x28,x17 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd0: 00063203 ld x4,0(x12) + 80001fd4: 00620c63 beq x4,x6,80001fec + 80001fd8: 529052ef jal x5,80007d00 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 80010b1c .word 0x80010b1c + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000000000001 + 80001ff0: 0004bf03 ld x30,0(x9) + 80001ff4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80001ff8: 0004be03 ld x28,0(x9) + 80001ffc: 00848493 addi x9,x9,8 + +0000000080002000 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x8, x30, x28 # perform operation + 80002000: 7fcf0433 aes64ks2 x8,x30,x28 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002004: 00063203 ld x4,0(x12) + 80002008: 00820c63 beq x4,x8,80002020 + 8000200c: 4f5052ef jal x5,80007d00 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 80010b80 .word 0x80010b80 + 8000201c: 00000000 .word 0x00000000 + 80002020: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000000000001 + 80002024: 0004bf83 ld x31,0(x9) + 80002028: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5555555555555555 + 8000202c: 0004bb03 ld x22,0(x9) + 80002030: 00848493 addi x9,x9,8 + +0000000080002034 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64ks2 x23, x31, x22 # perform operation + 80002034: 7f6f8bb3 aes64ks2 x23,x31,x22 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002038: 00063203 ld x4,0(x12) + 8000203c: 01720c63 beq x4,x23,80002054 + 80002040: 4c1052ef jal x5,80007d00 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 80010be4 .word 0x80010be4 + 80002050: 00000000 .word 0x00000000 + 80002054: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000000000001 + 80002058: 0004b883 ld x17,0(x9) + 8000205c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000000ffffffff + 80002060: 0004b783 ld x15,0(x9) + 80002064: 00848493 addi x9,x9,8 + +0000000080002068 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64ks2 x16, x17, x15 # perform operation + 80002068: 7ef88833 aes64ks2 x16,x17,x15 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000206c: 00063203 ld x4,0(x12) + 80002070: 01020c63 beq x4,x16,80002088 + 80002074: 48d052ef jal x5,80007d00 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 80010c48 .word 0x80010c48 + 80002084: 00000000 .word 0x00000000 + 80002088: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000001 + 8000208c: 0004b903 ld x18,0(x9) + 80002090: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000fffffffe + 80002094: 0004ba03 ld x20,0(x9) + 80002098: 00848493 addi x9,x9,8 + +000000008000209c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64ks2 x6, x18, x20 # perform operation + 8000209c: 7f490333 aes64ks2 x6,x18,x20 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a0: 00063203 ld x4,0(x12) + 800020a4: 00620c63 beq x4,x6,800020bc + 800020a8: 459052ef jal x5,80007d00 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80010ca4 .word 0x80010ca4 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000001 + 800020c0: 0004be83 ld x29,0(x9) + 800020c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000100000000 + 800020c8: 0004b583 ld x11,0(x9) + 800020cc: 00848493 addi x9,x9,8 + +00000000800020d0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64ks2 x24, x29, x11 # perform operation + 800020d0: 7ebe8c33 aes64ks2 x24,x29,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d4: 00063203 ld x4,0(x12) + 800020d8: 01820c63 beq x4,x24,800020f0 + 800020dc: 425052ef jal x5,80007d00 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 80010d00 .word 0x80010d00 + 800020ec: 00000000 .word 0x00000000 + 800020f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 800020f4: 0004bd03 ld x26,0(x9) + 800020f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x0000000100000001 + 800020fc: 0004bd83 ld x27,0(x9) + 80002100: 00848493 addi x9,x9,8 + +0000000080002104 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64ks2 x14, x26, x27 # perform operation + 80002104: 7fbd0733 aes64ks2 x14,x26,x27 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002108: 00063203 ld x4,0(x12) + 8000210c: 00e20c63 beq x4,x14,80002124 + 80002110: 3f1052ef jal x5,80007d00 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80010d5d .word 0x80010d5d + 80002120: 00000000 .word 0x00000000 + 80002124: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000002 + 80002128: 0004b983 ld x19,0(x9) + 8000212c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000000 + 80002130: 0004b703 ld x14,0(x9) + 80002134: 00848493 addi x9,x9,8 + +0000000080002138 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64ks2 x31, x19, x14 # perform operation + 80002138: 7ee98fb3 aes64ks2 x31,x19,x14 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000213c: 00063203 ld x4,0(x12) + 80002140: 01f20c63 beq x4,x31,80002158 + 80002144: 3bd052ef jal x5,80007d00 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80010dba .word 0x80010dba + 80002154: 00000000 .word 0x00000000 + 80002158: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000002 + 8000215c: 0004b383 ld x7,0(x9) + 80002160: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 80002164: 0004b783 ld x15,0(x9) + 80002168: 00848493 addi x9,x9,8 + +000000008000216c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64ks2 x20, x7, x15 # perform operation + 8000216c: 7ef38a33 aes64ks2 x20,x7,x15 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002170: 00063203 ld x4,0(x12) + 80002174: 01420c63 beq x4,x20,8000218c + 80002178: 389052ef jal x5,80007d00 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 80010e0f .word 0x80010e0f + 80002188: 00000000 .word 0x00000000 + 8000218c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000002 + 80002190: 0004b383 ld x7,0(x9) + 80002194: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000000000002 + 80002198: 0004bf03 ld x30,0(x9) + 8000219c: 00848493 addi x9,x9,8 + +00000000800021a0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64ks2 x6, x7, x30 # perform operation + 800021a0: 7fe38333 aes64ks2 x6,x7,x30 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a4: 00063203 ld x4,0(x12) + 800021a8: 00620c63 beq x4,x6,800021c0 + 800021ac: 355052ef jal x5,80007d00 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80010e64 .word 0x80010e64 + 800021bc: 00000000 .word 0x00000000 + 800021c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000000000002 + 800021c4: 0004b783 ld x15,0(x9) + 800021c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000000 + 800021cc: 0004be03 ld x28,0(x9) + 800021d0: 00848493 addi x9,x9,8 + +00000000800021d4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64ks2 x23, x15, x28 # perform operation + 800021d4: 7fc78bb3 aes64ks2 x23,x15,x28 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d8: 00063203 ld x4,0(x12) + 800021dc: 01720c63 beq x4,x23,800021f4 + 800021e0: 321052ef jal x5,80007d00 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80010eb9 .word 0x80010eb9 + 800021f0: 00000000 .word 0x00000000 + 800021f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000002 + 800021f8: 0004b903 ld x18,0(x9) + 800021fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x8000000000000001 + 80002200: 0004b803 ld x16,0(x9) + 80002204: 00848493 addi x9,x9,8 + +0000000080002208 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64ks2 x31, x18, x16 # perform operation + 80002208: 7f090fb3 aes64ks2 x31,x18,x16 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 8000220c: 00063203 ld x4,0(x12) + 80002210: 01f20c63 beq x4,x31,80002228 + 80002214: 2ed052ef jal x5,80007d00 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80010f1d .word 0x80010f1d + 80002224: 00000000 .word 0x00000000 + 80002228: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 8000222c: 0004b503 ld x10,0(x9) + 80002230: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80002234: 0004b983 ld x19,0(x9) + 80002238: 00848493 addi x9,x9,8 + +000000008000223c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64ks2 x7, x10, x19 # perform operation + 8000223c: 7f3503b3 aes64ks2 x7,x10,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002240: 00063203 ld x4,0(x12) + 80002244: 00720c63 beq x4,x7,8000225c + 80002248: 2b9052ef jal x5,80007d00 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80010f81 .word 0x80010f81 + 80002258: 00000000 .word 0x00000000 + 8000225c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x0000000000000002 + 80002260: 0004bd83 ld x27,0(x9) + 80002264: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80002268: 0004bc83 ld x25,0(x9) + 8000226c: 00848493 addi x9,x9,8 + +0000000080002270 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64ks2 x15, x27, x25 # perform operation + 80002270: 7f9d87b3 aes64ks2 x15,x27,x25 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002274: 00063203 ld x4,0(x12) + 80002278: 00f20c63 beq x4,x15,80002290 + 8000227c: 285052ef jal x5,80007d00 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80010fe5 .word 0x80010fe5 + 8000228c: 00000000 .word 0x00000000 + 80002290: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000002 + 80002294: 0004be83 ld x29,0(x9) + 80002298: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xffffffffffffffff + 8000229c: 0004b103 ld x2,0(x9) + 800022a0: 00848493 addi x9,x9,8 + +00000000800022a4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64ks2 x3, x29, x2 # perform operation + 800022a4: 7e2e81b3 aes64ks2 x3,x29,x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a8: 00063203 ld x4,0(x12) + 800022ac: 00320c63 beq x4,x3,800022c4 + 800022b0: 251052ef jal x5,80007d00 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80011049 .word 0x80011049 + 800022c0: 00000000 .word 0x00000000 + 800022c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000002 + 800022c8: 0004be83 ld x29,0(x9) + 800022cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfffffffffffffffe + 800022d0: 0004bc03 ld x24,0(x9) + 800022d4: 00848493 addi x9,x9,8 + +00000000800022d8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64ks2 x11, x29, x24 # perform operation + 800022d8: 7f8e85b3 aes64ks2 x11,x29,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022dc: 00063203 ld x4,0(x12) + 800022e0: 00b20c63 beq x4,x11,800022f8 + 800022e4: 21d052ef jal x5,80007d00 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 800110ad .word 0x800110ad + 800022f4: 00000000 .word 0x00000000 + 800022f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000002 + 800022fc: 0004b183 ld x3,0(x9) + 80002300: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002304: 0004bc03 ld x24,0(x9) + 80002308: 00848493 addi x9,x9,8 + +000000008000230c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64ks2 x22, x3, x24 # perform operation + 8000230c: 7f818b33 aes64ks2 x22,x3,x24 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002310: 00063203 ld x4,0(x12) + 80002314: 01620c63 beq x4,x22,8000232c + 80002318: 1e9052ef jal x5,80007d00 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80011111 .word 0x80011111 + 80002328: 00000000 .word 0x00000000 + 8000232c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000002 + 80002330: 0004b183 ld x3,0(x9) + 80002334: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 80002338: 0004b083 ld x1,0(x9) + 8000233c: 00848493 addi x9,x9,8 + +0000000080002340 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x25, x3, x1 # perform operation + 80002340: 7e118cb3 aes64ks2 x25,x3,x1 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002344: 00063203 ld x4,0(x12) + 80002348: 01920c63 beq x4,x25,80002360 + 8000234c: 1b5052ef jal x5,80007d00 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 80011175 .word 0x80011175 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 80002364: 0004b503 ld x10,0(x9) + 80002368: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 8000236c: 0004bb83 ld x23,0(x9) + 80002370: 00848493 addi x9,x9,8 + +0000000080002374 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64ks2 x28, x10, x23 # perform operation + 80002374: 7f750e33 aes64ks2 x28,x10,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002378: 00063203 ld x4,0(x12) + 8000237c: 01c20c63 beq x4,x28,80002394 + 80002380: 181052ef jal x5,80007d00 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 800111d9 .word 0x800111d9 + 80002390: 00000000 .word 0x00000000 + 80002394: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000002 + 80002398: 0004b983 ld x19,0(x9) + 8000239c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000ffffffff + 800023a0: 0004ba83 ld x21,0(x9) + 800023a4: 00848493 addi x9,x9,8 + +00000000800023a8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64ks2 x17, x19, x21 # perform operation + 800023a8: 7f5988b3 aes64ks2 x17,x19,x21 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023ac: 00063203 ld x4,0(x12) + 800023b0: 01120c63 beq x4,x17,800023c8 + 800023b4: 14d052ef jal x5,80007d00 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 8001123d .word 0x8001123d + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x0000000000000002 + 800023cc: 0004b083 ld x1,0(x9) + 800023d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000fffffffe + 800023d4: 0004bd83 ld x27,0(x9) + 800023d8: 00848493 addi x9,x9,8 + +00000000800023dc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64ks2 x14, x1, x27 # perform operation + 800023dc: 7fb08733 aes64ks2 x14,x1,x27 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e0: 00063203 ld x4,0(x12) + 800023e4: 00e20c63 beq x4,x14,800023fc + 800023e8: 119052ef jal x5,80007d00 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 80011299 .word 0x80011299 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x0000000000000002 + 80002400: 0004bd83 ld x27,0(x9) + 80002404: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000100000000 + 80002408: 0004bf03 ld x30,0(x9) + 8000240c: 00848493 addi x9,x9,8 + +0000000080002410 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64ks2 x31, x27, x30 # perform operation + 80002410: 7fed8fb3 aes64ks2 x31,x27,x30 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002414: 00063203 ld x4,0(x12) + 80002418: 01f20c63 beq x4,x31,80002430 + 8000241c: 0e5052ef jal x5,80007d00 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 800112f5 .word 0x800112f5 + 8000242c: 00000000 .word 0x00000000 + 80002430: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000002 + 80002434: 0004be03 ld x28,0(x9) + 80002438: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000001 + 8000243c: 0004bd03 ld x26,0(x9) + 80002440: 00848493 addi x9,x9,8 + +0000000080002444 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64ks2 x31, x28, x26 # perform operation + 80002444: 7fae0fb3 aes64ks2 x31,x28,x26 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002448: 00063203 ld x4,0(x12) + 8000244c: 01f20c63 beq x4,x31,80002464 + 80002450: 0b1052ef jal x5,80007d00 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 80011352 .word 0x80011352 + 80002460: 00000000 .word 0x00000000 + 80002464: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x8000000000000000 + 80002468: 0004bf03 ld x30,0(x9) + 8000246c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000000000000 + 80002470: 0004b383 ld x7,0(x9) + 80002474: 00848493 addi x9,x9,8 + +0000000080002478 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64ks2 x1, x30, x7 # perform operation + 80002478: 7e7f00b3 aes64ks2 x1,x30,x7 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000247c: 00063203 ld x4,0(x12) + 80002480: 00120c63 beq x4,x1,80002498 + 80002484: 07d052ef jal x5,80007d00 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 800113af .word 0x800113af + 80002494: 00000000 .word 0x00000000 + 80002498: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x8000000000000000 + 8000249c: 0004bc03 ld x24,0(x9) + 800024a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000000000001 + 800024a4: 0004bb83 ld x23,0(x9) + 800024a8: 00848493 addi x9,x9,8 + +00000000800024ac : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64ks2 x30, x24, x23 # perform operation + 800024ac: 7f7c0f33 aes64ks2 x30,x24,x23 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b0: 00063203 ld x4,0(x12) + 800024b4: 01e20c63 beq x4,x30,800024cc + 800024b8: 049052ef jal x5,80007d00 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 80011413 .word 0x80011413 + 800024c8: 00000000 .word 0x00000000 + 800024cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x8000000000000000 + 800024d0: 0004b903 ld x18,0(x9) + 800024d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000000000002 + 800024d8: 0004bf03 ld x30,0(x9) + 800024dc: 00848493 addi x9,x9,8 + +00000000800024e0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64ks2 x7, x18, x30 # perform operation + 800024e0: 7fe903b3 aes64ks2 x7,x18,x30 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e4: 00063203 ld x4,0(x12) + 800024e8: 00720c63 beq x4,x7,80002500 + 800024ec: 015052ef jal x5,80007d00 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 80011477 .word 0x80011477 + 800024fc: 00000000 .word 0x00000000 + 80002500: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x8000000000000000 + 80002504: 0004b903 ld x18,0(x9) + 80002508: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000000 + 8000250c: 0004b783 ld x15,0(x9) + 80002510: 00848493 addi x9,x9,8 + +0000000080002514 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64ks2 x1, x18, x15 # perform operation + 80002514: 7ef900b3 aes64ks2 x1,x18,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002518: 00063203 ld x4,0(x12) + 8000251c: 00120c63 beq x4,x1,80002534 + 80002520: 7e0052ef jal x5,80007d00 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 800114db .word 0x800114db + 80002530: 00000000 .word 0x00000000 + 80002534: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x8000000000000000 + 80002538: 0004bf83 ld x31,0(x9) + 8000253c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x8000000000000001 + 80002540: 0004bb83 ld x23,0(x9) + 80002544: 00848493 addi x9,x9,8 + +0000000080002548 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64ks2 x1, x31, x23 # perform operation + 80002548: 7f7f80b3 aes64ks2 x1,x31,x23 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000254c: 00063203 ld x4,0(x12) + 80002550: 00120c63 beq x4,x1,80002568 + 80002554: 7ac052ef jal x5,80007d00 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 8001154e .word 0x8001154e + 80002564: 00000000 .word 0x00000000 + 80002568: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x8000000000000000 + 8000256c: 0004b303 ld x6,0(x9) + 80002570: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7fffffffffffffff + 80002574: 0004b883 ld x17,0(x9) + 80002578: 00848493 addi x9,x9,8 + +000000008000257c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64ks2 x31, x6, x17 # perform operation + 8000257c: 7f130fb3 aes64ks2 x31,x6,x17 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002580: 00063203 ld x4,0(x12) + 80002584: 01f20c63 beq x4,x31,8000259c + 80002588: 778052ef jal x5,80007d00 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 800115c1 .word 0x800115c1 + 80002598: 00000000 .word 0x00000000 + 8000259c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x8000000000000000 + 800025a0: 0004b303 ld x6,0(x9) + 800025a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800025a8: 0004b883 ld x17,0(x9) + 800025ac: 00848493 addi x9,x9,8 + +00000000800025b0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x6, x17 # perform operation + 800025b0: 7f130133 aes64ks2 x2,x6,x17 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b4: 00063203 ld x4,0(x12) + 800025b8: 00220c63 beq x4,x2,800025d0 + 800025bc: 744052ef jal x5,80007d00 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 80011634 .word 0x80011634 + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000000 + 800025d4: 0004b103 ld x2,0(x9) + 800025d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xffffffffffffffff + 800025dc: 0004be83 ld x29,0(x9) + 800025e0: 00848493 addi x9,x9,8 + +00000000800025e4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64ks2 x3, x2, x29 # perform operation + 800025e4: 7fd101b3 aes64ks2 x3,x2,x29 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e8: 00063203 ld x4,0(x12) + 800025ec: 00320c63 beq x4,x3,80002604 + 800025f0: 710052ef jal x5,80007d00 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 800116a7 .word 0x800116a7 + 80002600: 00000000 .word 0x00000000 + 80002604: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x8000000000000000 + 80002608: 0004bd83 ld x27,0(x9) + 8000260c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xfffffffffffffffe + 80002610: 0004b303 ld x6,0(x9) + 80002614: 00848493 addi x9,x9,8 + +0000000080002618 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x27, x6 # perform operation + 80002618: 7e6d8d33 aes64ks2 x26,x27,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000261c: 00063203 ld x4,0(x12) + 80002620: 01a20c63 beq x4,x26,80002638 + 80002624: 6dc052ef jal x5,80007d00 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 8001171a .word 0x8001171a + 80002634: 00000000 .word 0x00000000 + 80002638: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000000 + 8000263c: 0004b103 ld x2,0(x9) + 80002640: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80002644: 0004b883 ld x17,0(x9) + 80002648: 00848493 addi x9,x9,8 + +000000008000264c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64ks2 x29, x2, x17 # perform operation + 8000264c: 7f110eb3 aes64ks2 x29,x2,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002650: 00063203 ld x4,0(x12) + 80002654: 01d20c63 beq x4,x29,8000266c + 80002658: 6a8052ef jal x5,80007d00 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 8001178d .word 0x8001178d + 80002668: 00000000 .word 0x00000000 + 8000266c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x8000000000000000 + 80002670: 0004b883 ld x17,0(x9) + 80002674: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80002678: 0004bf03 ld x30,0(x9) + 8000267c: 00848493 addi x9,x9,8 + +0000000080002680 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x6, x17, x30 # perform operation + 80002680: 7fe88333 aes64ks2 x6,x17,x30 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002684: 00063203 ld x4,0(x12) + 80002688: 00620c63 beq x4,x6,800026a0 + 8000268c: 674052ef jal x5,80007d00 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 80011800 .word 0x80011800 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000000 + 800026a4: 0004ba83 ld x21,0(x9) + 800026a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5555555555555555 + 800026ac: 0004b683 ld x13,0(x9) + 800026b0: 00848493 addi x9,x9,8 + +00000000800026b4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64ks2 x19, x21, x13 # perform operation + 800026b4: 7eda89b3 aes64ks2 x19,x21,x13 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b8: 00063203 ld x4,0(x12) + 800026bc: 01320c63 beq x4,x19,800026d4 + 800026c0: 640052ef jal x5,80007d00 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 80011873 .word 0x80011873 + 800026d0: 00000000 .word 0x00000000 + 800026d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x8000000000000000 + 800026d8: 0004be03 ld x28,0(x9) + 800026dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000000ffffffff + 800026e0: 0004b303 ld x6,0(x9) + 800026e4: 00848493 addi x9,x9,8 + +00000000800026e8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64ks2 x23, x28, x6 # perform operation + 800026e8: 7e6e0bb3 aes64ks2 x23,x28,x6 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026ec: 00063203 ld x4,0(x12) + 800026f0: 01720c63 beq x4,x23,80002708 + 800026f4: 60c052ef jal x5,80007d00 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 800118e6 .word 0x800118e6 + 80002704: 00000000 .word 0x00000000 + 80002708: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x8000000000000000 + 8000270c: 0004b583 ld x11,0(x9) + 80002710: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000fffffffe + 80002714: 0004ba83 ld x21,0(x9) + 80002718: 00848493 addi x9,x9,8 + +000000008000271c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64ks2 x17, x11, x21 # perform operation + 8000271c: 7f5588b3 aes64ks2 x17,x11,x21 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002720: 00063203 ld x4,0(x12) + 80002724: 01120c63 beq x4,x17,8000273c + 80002728: 5d8052ef jal x5,80007d00 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 80011951 .word 0x80011951 + 80002738: 00000000 .word 0x00000000 + 8000273c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x8000000000000000 + 80002740: 0004bb03 ld x22,0(x9) + 80002744: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000000 + 80002748: 0004bd03 ld x26,0(x9) + 8000274c: 00848493 addi x9,x9,8 + +0000000080002750 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64ks2 x18, x22, x26 # perform operation + 80002750: 7fab0933 aes64ks2 x18,x22,x26 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002754: 00063203 ld x4,0(x12) + 80002758: 01220c63 beq x4,x18,80002770 + 8000275c: 5a4052ef jal x5,80007d00 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 800119bc .word 0x800119bc + 8000276c: 00000000 .word 0x00000000 + 80002770: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x8000000000000000 + 80002774: 0004be83 ld x29,0(x9) + 80002778: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000100000001 + 8000277c: 0004bf03 ld x30,0(x9) + 80002780: 00848493 addi x9,x9,8 + +0000000080002784 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64ks2 x21, x29, x30 # perform operation + 80002784: 7fee8ab3 aes64ks2 x21,x29,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002788: 00063203 ld x4,0(x12) + 8000278c: 01520c63 beq x4,x21,800027a4 + 80002790: 570052ef jal x5,80007d00 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 80011a28 .word 0x80011a28 + 800027a0: 00000000 .word 0x00000000 + 800027a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x8000000000000001 + 800027a8: 0004be03 ld x28,0(x9) + 800027ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x0000000000000000 + 800027b0: 0004ba83 ld x21,0(x9) + 800027b4: 00848493 addi x9,x9,8 + +00000000800027b8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64ks2 x25, x28, x21 # perform operation + 800027b8: 7f5e0cb3 aes64ks2 x25,x28,x21 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027bc: 00063203 ld x4,0(x12) + 800027c0: 01920c63 beq x4,x25,800027d8 + 800027c4: 53c052ef jal x5,80007d00 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 80011a94 .word 0x80011a94 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x8000000000000001 + 800027dc: 0004b383 ld x7,0(x9) + 800027e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x0000000000000001 + 800027e4: 0004b183 ld x3,0(x9) + 800027e8: 00848493 addi x9,x9,8 + +00000000800027ec : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64ks2 x8, x7, x3 # perform operation + 800027ec: 7e338433 aes64ks2 x8,x7,x3 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f0: 00063203 ld x4,0(x12) + 800027f4: 00820c63 beq x4,x8,8000280c + 800027f8: 508052ef jal x5,80007d00 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 80011af8 .word 0x80011af8 + 80002808: 00000000 .word 0x00000000 + 8000280c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x8000000000000001 + 80002810: 0004bf03 ld x30,0(x9) + 80002814: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000000000002 + 80002818: 0004b083 ld x1,0(x9) + 8000281c: 00848493 addi x9,x9,8 + +0000000080002820 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64ks2 x25, x30, x1 # perform operation + 80002820: 7e1f0cb3 aes64ks2 x25,x30,x1 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002824: 00063203 ld x4,0(x12) + 80002828: 01920c63 beq x4,x25,80002840 + 8000282c: 4d4052ef jal x5,80007d00 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 80011b5c .word 0x80011b5c + 8000283c: 00000000 .word 0x00000000 + 80002840: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x8000000000000001 + 80002844: 0004b403 ld x8,0(x9) + 80002848: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x8000000000000000 + 8000284c: 0004bc83 ld x25,0(x9) + 80002850: 00848493 addi x9,x9,8 + +0000000080002854 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64ks2 x2, x8, x25 # perform operation + 80002854: 7f940133 aes64ks2 x2,x8,x25 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002858: 00063203 ld x4,0(x12) + 8000285c: 00220c63 beq x4,x2,80002874 + 80002860: 4a0052ef jal x5,80007d00 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 80011bc0 .word 0x80011bc0 + 80002870: 00000000 .word 0x00000000 + 80002874: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000001 + 80002878: 0004ba83 ld x21,0(x9) + 8000287c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x8000000000000001 + 80002880: 0004b683 ld x13,0(x9) + 80002884: 00848493 addi x9,x9,8 + +0000000080002888 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64ks2 x8, x21, x13 # perform operation + 80002888: 7eda8433 aes64ks2 x8,x21,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000288c: 00063203 ld x4,0(x12) + 80002890: 00820c63 beq x4,x8,800028a8 + 80002894: 46c052ef jal x5,80007d00 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 80011c33 .word 0x80011c33 + 800028a4: 00000000 .word 0x00000000 + 800028a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000001 + 800028ac: 0004b103 ld x2,0(x9) + 800028b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7fffffffffffffff + 800028b4: 0004b903 ld x18,0(x9) + 800028b8: 00848493 addi x9,x9,8 + +00000000800028bc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64ks2 x11, x2, x18 # perform operation + 800028bc: 7f2105b3 aes64ks2 x11,x2,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c0: 00063203 ld x4,0(x12) + 800028c4: 00b20c63 beq x4,x11,800028dc + 800028c8: 438052ef jal x5,80007d00 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 80011ca6 .word 0x80011ca6 + 800028d8: 00000000 .word 0x00000000 + 800028dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x8000000000000001 + 800028e0: 0004b683 ld x13,0(x9) + 800028e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x7ffffffffffffffe + 800028e8: 0004bf83 ld x31,0(x9) + 800028ec: 00848493 addi x9,x9,8 + +00000000800028f0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64ks2 x21, x13, x31 # perform operation + 800028f0: 7ff68ab3 aes64ks2 x21,x13,x31 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f4: 00063203 ld x4,0(x12) + 800028f8: 01520c63 beq x4,x21,80002910 + 800028fc: 404052ef jal x5,80007d00 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 80011d19 .word 0x80011d19 + 8000290c: 00000000 .word 0x00000000 + 80002910: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x8000000000000001 + 80002914: 0004b783 ld x15,0(x9) + 80002918: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xffffffffffffffff + 8000291c: 0004bf83 ld x31,0(x9) + 80002920: 00848493 addi x9,x9,8 + +0000000080002924 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64ks2 x18, x15, x31 # perform operation + 80002924: 7ff78933 aes64ks2 x18,x15,x31 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002928: 00063203 ld x4,0(x12) + 8000292c: 01220c63 beq x4,x18,80002944 + 80002930: 3d0052ef jal x5,80007d00 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 80011d8c .word 0x80011d8c + 80002940: 00000000 .word 0x00000000 + 80002944: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x8000000000000001 + 80002948: 0004b803 ld x16,0(x9) + 8000294c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xfffffffffffffffe + 80002950: 0004be03 ld x28,0(x9) + 80002954: 00848493 addi x9,x9,8 + +0000000080002958 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64ks2 x22, x16, x28 # perform operation + 80002958: 7fc80b33 aes64ks2 x22,x16,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000295c: 00063203 ld x4,0(x12) + 80002960: 01620c63 beq x4,x22,80002978 + 80002964: 39c052ef jal x5,80007d00 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80011dff .word 0x80011dff + 80002974: 00000000 .word 0x00000000 + 80002978: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x8000000000000001 + 8000297c: 0004bc03 ld x24,0(x9) + 80002980: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002984: 0004b703 ld x14,0(x9) + 80002988: 00848493 addi x9,x9,8 + +000000008000298c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64ks2 x16, x24, x14 # perform operation + 8000298c: 7eec0833 aes64ks2 x16,x24,x14 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002990: 00063203 ld x4,0(x12) + 80002994: 01020c63 beq x4,x16,800029ac + 80002998: 368052ef jal x5,80007d00 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 80011e72 .word 0x80011e72 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000001 + 800029b0: 0004b103 ld x2,0(x9) + 800029b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 800029b8: 0004b383 ld x7,0(x9) + 800029bc: 00848493 addi x9,x9,8 + +00000000800029c0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x26, x2, x7 # perform operation + 800029c0: 7e710d33 aes64ks2 x26,x2,x7 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c4: 00063203 ld x4,0(x12) + 800029c8: 01a20c63 beq x4,x26,800029e0 + 800029cc: 334052ef jal x5,80007d00 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80011ee5 .word 0x80011ee5 + 800029dc: 00000000 .word 0x00000000 + 800029e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x8000000000000001 + 800029e4: 0004b083 ld x1,0(x9) + 800029e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5555555555555555 + 800029ec: 0004b183 ld x3,0(x9) + 800029f0: 00848493 addi x9,x9,8 + +00000000800029f4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64ks2 x2, x1, x3 # perform operation + 800029f4: 7e308133 aes64ks2 x2,x1,x3 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f8: 00063203 ld x4,0(x12) + 800029fc: 00220c63 beq x4,x2,80002a14 + 80002a00: 300052ef jal x5,80007d00 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80011f58 .word 0x80011f58 + 80002a10: 00000000 .word 0x00000000 + 80002a14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x8000000000000001 + 80002a18: 0004bd03 ld x26,0(x9) + 80002a1c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000ffffffff + 80002a20: 0004be03 ld x28,0(x9) + 80002a24: 00848493 addi x9,x9,8 + +0000000080002a28 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64ks2 x22, x26, x28 # perform operation + 80002a28: 7fcd0b33 aes64ks2 x22,x26,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a2c: 00063203 ld x4,0(x12) + 80002a30: 01620c63 beq x4,x22,80002a48 + 80002a34: 2cc052ef jal x5,80007d00 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80011fcb .word 0x80011fcb + 80002a44: 00000000 .word 0x00000000 + 80002a48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x8000000000000001 + 80002a4c: 0004b983 ld x19,0(x9) + 80002a50: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000fffffffe + 80002a54: 0004bc83 ld x25,0(x9) + 80002a58: 00848493 addi x9,x9,8 + +0000000080002a5c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64ks2 x31, x19, x25 # perform operation + 80002a5c: 7f998fb3 aes64ks2 x31,x19,x25 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a60: 00063203 ld x4,0(x12) + 80002a64: 01f20c63 beq x4,x31,80002a7c + 80002a68: 298052ef jal x5,80007d00 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80012036 .word 0x80012036 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x8000000000000001 + 80002a80: 0004b983 ld x19,0(x9) + 80002a84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x0000000100000000 + 80002a88: 0004b103 ld x2,0(x9) + 80002a8c: 00848493 addi x9,x9,8 + +0000000080002a90 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64ks2 x29, x19, x2 # perform operation + 80002a90: 7e298eb3 aes64ks2 x29,x19,x2 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a94: 00063203 ld x4,0(x12) + 80002a98: 01d20c63 beq x4,x29,80002ab0 + 80002a9c: 264052ef jal x5,80007d00 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 800120a1 .word 0x800120a1 + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x8000000000000001 + 80002ab4: 0004bb83 ld x23,0(x9) + 80002ab8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000100000001 + 80002abc: 0004b683 ld x13,0(x9) + 80002ac0: 00848493 addi x9,x9,8 + +0000000080002ac4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64ks2 x28, x23, x13 # perform operation + 80002ac4: 7edb8e33 aes64ks2 x28,x23,x13 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac8: 00063203 ld x4,0(x12) + 80002acc: 01c20c63 beq x4,x28,80002ae4 + 80002ad0: 230052ef jal x5,80007d00 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 8001210d .word 0x8001210d + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002ae8: 0004bc83 ld x25,0(x9) + 80002aec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000000 + 80002af0: 0004b983 ld x19,0(x9) + 80002af4: 00848493 addi x9,x9,8 + +0000000080002af8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64ks2 x29, x25, x19 # perform operation + 80002af8: 7f3c8eb3 aes64ks2 x29,x25,x19 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002afc: 00063203 ld x4,0(x12) + 80002b00: 01d20c63 beq x4,x29,80002b18 + 80002b04: 1fc052ef jal x5,80007d00 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 80012179 .word 0x80012179 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002b1c: 0004bd03 ld x26,0(x9) + 80002b20: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000000000001 + 80002b24: 0004b383 ld x7,0(x9) + 80002b28: 00848493 addi x9,x9,8 + +0000000080002b2c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64ks2 x28, x26, x7 # perform operation + 80002b2c: 7e7d0e33 aes64ks2 x28,x26,x7 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b30: 00063203 ld x4,0(x12) + 80002b34: 01c20c63 beq x4,x28,80002b4c + 80002b38: 1c8052ef jal x5,80007d00 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 800121dd .word 0x800121dd + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002b50: 0004b783 ld x15,0(x9) + 80002b54: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80002b58: 0004b583 ld x11,0(x9) + 80002b5c: 00848493 addi x9,x9,8 + +0000000080002b60 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64ks2 x28, x15, x11 # perform operation + 80002b60: 7eb78e33 aes64ks2 x28,x15,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b64: 00063203 ld x4,0(x12) + 80002b68: 01c20c63 beq x4,x28,80002b80 + 80002b6c: 194052ef jal x5,80007d00 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 80012241 .word 0x80012241 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002b84: 0004b883 ld x17,0(x9) + 80002b88: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x8000000000000000 + 80002b8c: 0004b803 ld x16,0(x9) + 80002b90: 00848493 addi x9,x9,8 + +0000000080002b94 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64ks2 x23, x17, x16 # perform operation + 80002b94: 7f088bb3 aes64ks2 x23,x17,x16 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b98: 00063203 ld x4,0(x12) + 80002b9c: 01720c63 beq x4,x23,80002bb4 + 80002ba0: 160052ef jal x5,80007d00 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 800122a5 .word 0x800122a5 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002bb8: 0004bf83 ld x31,0(x9) + 80002bbc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x8000000000000001 + 80002bc0: 0004b983 ld x19,0(x9) + 80002bc4: 00848493 addi x9,x9,8 + +0000000080002bc8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64ks2 x7, x31, x19 # perform operation + 80002bc8: 7f3f83b3 aes64ks2 x7,x31,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bcc: 00063203 ld x4,0(x12) + 80002bd0: 00720c63 beq x4,x7,80002be8 + 80002bd4: 12c052ef jal x5,80007d00 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80012318 .word 0x80012318 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002bec: 0004b803 ld x16,0(x9) + 80002bf0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7fffffffffffffff + 80002bf4: 0004b583 ld x11,0(x9) + 80002bf8: 00848493 addi x9,x9,8 + +0000000080002bfc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x1, x16, x11 # perform operation + 80002bfc: 7eb800b3 aes64ks2 x1,x16,x11 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c00: 00063203 ld x4,0(x12) + 80002c04: 00120c63 beq x4,x1,80002c1c + 80002c08: 0f8052ef jal x5,80007d00 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 8001238b .word 0x8001238b + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002c20: 0004ba03 ld x20,0(x9) + 80002c24: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x7ffffffffffffffe + 80002c28: 0004ba83 ld x21,0(x9) + 80002c2c: 00848493 addi x9,x9,8 + +0000000080002c30 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x20, x21 # perform operation + 80002c30: 7f5a0133 aes64ks2 x2,x20,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c34: 00063203 ld x4,0(x12) + 80002c38: 00220c63 beq x4,x2,80002c50 + 80002c3c: 0c4052ef jal x5,80007d00 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 800123fe .word 0x800123fe + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002c54: 0004bb03 ld x22,0(x9) + 80002c58: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xffffffffffffffff + 80002c5c: 0004b503 ld x10,0(x9) + 80002c60: 00848493 addi x9,x9,8 + +0000000080002c64 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x31, x22, x10 # perform operation + 80002c64: 7eab0fb3 aes64ks2 x31,x22,x10 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c68: 00063203 ld x4,0(x12) + 80002c6c: 01f20c63 beq x4,x31,80002c84 + 80002c70: 090052ef jal x5,80007d00 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 80012471 .word 0x80012471 + 80002c80: 00000000 .word 0x00000000 + 80002c84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c88: 0004ba83 ld x21,0(x9) + 80002c8c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xfffffffffffffffe + 80002c90: 0004bb03 ld x22,0(x9) + 80002c94: 00848493 addi x9,x9,8 + +0000000080002c98 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x21, x22 # perform operation + 80002c98: 7f6a8d33 aes64ks2 x26,x21,x22 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c9c: 00063203 ld x4,0(x12) + 80002ca0: 01a20c63 beq x4,x26,80002cb8 + 80002ca4: 05c052ef jal x5,80007d00 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 800124e4 .word 0x800124e4 + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002cbc: 0004b903 ld x18,0(x9) + 80002cc0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80002cc4: 0004b303 ld x6,0(x9) + 80002cc8: 00848493 addi x9,x9,8 + +0000000080002ccc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x25, x18, x6 # perform operation + 80002ccc: 7e690cb3 aes64ks2 x25,x18,x6 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd0: 00063203 ld x4,0(x12) + 80002cd4: 01920c63 beq x4,x25,80002cec + 80002cd8: 028052ef jal x5,80007d00 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 80012557 .word 0x80012557 + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x7fffffffffffffff + 80002cf0: 0004b303 ld x6,0(x9) + 80002cf4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80002cf8: 0004bc03 ld x24,0(x9) + 80002cfc: 00848493 addi x9,x9,8 + +0000000080002d00 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x10, x6, x24 # perform operation + 80002d00: 7f830533 aes64ks2 x10,x6,x24 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d04: 00063203 ld x4,0(x12) + 80002d08: 00a20c63 beq x4,x10,80002d20 + 80002d0c: 7f5042ef jal x5,80007d00 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 800125ca .word 0x800125ca + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d24: 0004bf83 ld x31,0(x9) + 80002d28: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x5555555555555555 + 80002d2c: 0004b403 ld x8,0(x9) + 80002d30: 00848493 addi x9,x9,8 + +0000000080002d34 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64ks2 x23, x31, x8 # perform operation + 80002d34: 7e8f8bb3 aes64ks2 x23,x31,x8 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d38: 00063203 ld x4,0(x12) + 80002d3c: 01720c63 beq x4,x23,80002d54 + 80002d40: 7c1042ef jal x5,80007d00 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 8001263d .word 0x8001263d + 80002d50: 00000000 .word 0x00000000 + 80002d54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002d58: 0004be83 ld x29,0(x9) + 80002d5c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000000ffffffff + 80002d60: 0004bf03 ld x30,0(x9) + 80002d64: 00848493 addi x9,x9,8 + +0000000080002d68 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64ks2 x21, x29, x30 # perform operation + 80002d68: 7fee8ab3 aes64ks2 x21,x29,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d6c: 00063203 ld x4,0(x12) + 80002d70: 01520c63 beq x4,x21,80002d88 + 80002d74: 78d042ef jal x5,80007d00 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 800126b0 .word 0x800126b0 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d8c: 0004bf83 ld x31,0(x9) + 80002d90: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000000fffffffe + 80002d94: 0004b983 ld x19,0(x9) + 80002d98: 00848493 addi x9,x9,8 + +0000000080002d9c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64ks2 x28, x31, x19 # perform operation + 80002d9c: 7f3f8e33 aes64ks2 x28,x31,x19 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da0: 00063203 ld x4,0(x12) + 80002da4: 01c20c63 beq x4,x28,80002dbc + 80002da8: 759042ef jal x5,80007d00 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 8001271b .word 0x8001271b + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002dc0: 0004bb83 ld x23,0(x9) + 80002dc4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000000 + 80002dc8: 0004b803 ld x16,0(x9) + 80002dcc: 00848493 addi x9,x9,8 + +0000000080002dd0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64ks2 x11, x23, x16 # perform operation + 80002dd0: 7f0b85b3 aes64ks2 x11,x23,x16 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd4: 00063203 ld x4,0(x12) + 80002dd8: 00b20c63 beq x4,x11,80002df0 + 80002ddc: 725042ef jal x5,80007d00 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 80012786 .word 0x80012786 + 80002dec: 00000000 .word 0x00000000 + 80002df0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002df4: 0004bf83 ld x31,0(x9) + 80002df8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x0000000100000001 + 80002dfc: 0004b903 ld x18,0(x9) + 80002e00: 00848493 addi x9,x9,8 + +0000000080002e04 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64ks2 x6, x31, x18 # perform operation + 80002e04: 7f2f8333 aes64ks2 x6,x31,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e08: 00063203 ld x4,0(x12) + 80002e0c: 00620c63 beq x4,x6,80002e24 + 80002e10: 6f1042ef jal x5,80007d00 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 800127f2 .word 0x800127f2 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002e28: 0004be03 ld x28,0(x9) + 80002e2c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000000000000 + 80002e30: 0004bb03 ld x22,0(x9) + 80002e34: 00848493 addi x9,x9,8 + +0000000080002e38 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64ks2 x8, x28, x22 # perform operation + 80002e38: 7f6e0433 aes64ks2 x8,x28,x22 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e3c: 00063203 ld x4,0(x12) + 80002e40: 00820c63 beq x4,x8,80002e58 + 80002e44: 6bd042ef jal x5,80007d00 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 8001285e .word 0x8001285e + 80002e54: 00000000 .word 0x00000000 + 80002e58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002e5c: 0004bd83 ld x27,0(x9) + 80002e60: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000000000001 + 80002e64: 0004b803 ld x16,0(x9) + 80002e68: 00848493 addi x9,x9,8 + +0000000080002e6c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64ks2 x24, x27, x16 # perform operation + 80002e6c: 7f0d8c33 aes64ks2 x24,x27,x16 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e70: 00063203 ld x4,0(x12) + 80002e74: 01820c63 beq x4,x24,80002e8c + 80002e78: 689042ef jal x5,80007d00 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 800128c2 .word 0x800128c2 + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002e90: 0004bb03 ld x22,0(x9) + 80002e94: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000002 + 80002e98: 0004bc03 ld x24,0(x9) + 80002e9c: 00848493 addi x9,x9,8 + +0000000080002ea0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64ks2 x13, x22, x24 # perform operation + 80002ea0: 7f8b06b3 aes64ks2 x13,x22,x24 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea4: 00063203 ld x4,0(x12) + 80002ea8: 00d20c63 beq x4,x13,80002ec0 + 80002eac: 655042ef jal x5,80007d00 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 80012926 .word 0x80012926 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80002ec4: 0004b503 ld x10,0(x9) + 80002ec8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x8000000000000000 + 80002ecc: 0004b103 ld x2,0(x9) + 80002ed0: 00848493 addi x9,x9,8 + +0000000080002ed4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64ks2 x30, x10, x2 # perform operation + 80002ed4: 7e250f33 aes64ks2 x30,x10,x2 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed8: 00063203 ld x4,0(x12) + 80002edc: 01e20c63 beq x4,x30,80002ef4 + 80002ee0: 621042ef jal x5,80007d00 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 8001298a .word 0x8001298a + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80002ef8: 0004b383 ld x7,0(x9) + 80002efc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x8000000000000001 + 80002f00: 0004bb03 ld x22,0(x9) + 80002f04: 00848493 addi x9,x9,8 + +0000000080002f08 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64ks2 x6, x7, x22 # perform operation + 80002f08: 7f638333 aes64ks2 x6,x7,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f0c: 00063203 ld x4,0(x12) + 80002f10: 00620c63 beq x4,x6,80002f28 + 80002f14: 5ed042ef jal x5,80007d00 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 800129fd .word 0x800129fd + 80002f24: 00000000 .word 0x00000000 + 80002f28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f2c: 0004b983 ld x19,0(x9) + 80002f30: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffffffffffff + 80002f34: 0004b183 ld x3,0(x9) + 80002f38: 00848493 addi x9,x9,8 + +0000000080002f3c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x25, x19, x3 # perform operation + 80002f3c: 7e398cb3 aes64ks2 x25,x19,x3 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f40: 00063203 ld x4,0(x12) + 80002f44: 01920c63 beq x4,x25,80002f5c + 80002f48: 5b9042ef jal x5,80007d00 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 80012a70 .word 0x80012a70 + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80002f60: 0004b183 ld x3,0(x9) + 80002f64: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80002f68: 0004b703 ld x14,0(x9) + 80002f6c: 00848493 addi x9,x9,8 + +0000000080002f70 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x7, x3, x14 # perform operation + 80002f70: 7ee183b3 aes64ks2 x7,x3,x14 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f74: 00063203 ld x4,0(x12) + 80002f78: 00720c63 beq x4,x7,80002f90 + 80002f7c: 585042ef jal x5,80007d00 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 80012ae3 .word 0x80012ae3 + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f94: 0004b983 ld x19,0(x9) + 80002f98: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xffffffffffffffff + 80002f9c: 0004bd83 ld x27,0(x9) + 80002fa0: 00848493 addi x9,x9,8 + +0000000080002fa4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x11, x19, x27 # perform operation + 80002fa4: 7fb985b3 aes64ks2 x11,x19,x27 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa8: 00063203 ld x4,0(x12) + 80002fac: 00b20c63 beq x4,x11,80002fc4 + 80002fb0: 551042ef jal x5,80007d00 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 80012b56 .word 0x80012b56 + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002fc8: 0004b883 ld x17,0(x9) + 80002fcc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002fd0: 0004bf83 ld x31,0(x9) + 80002fd4: 00848493 addi x9,x9,8 + +0000000080002fd8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x13, x17, x31 # perform operation + 80002fd8: 7ff886b3 aes64ks2 x13,x17,x31 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fdc: 00063203 ld x4,0(x12) + 80002fe0: 00d20c63 beq x4,x13,80002ff8 + 80002fe4: 51d042ef jal x5,80007d00 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 80012bc9 .word 0x80012bc9 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002ffc: 0004b703 ld x14,0(x9) + 80003000: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80003004: 0004b583 ld x11,0(x9) + 80003008: 00848493 addi x9,x9,8 + +000000008000300c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x24, x14, x11 # perform operation + 8000300c: 7eb70c33 aes64ks2 x24,x14,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003010: 00063203 ld x4,0(x12) + 80003014: 01820c63 beq x4,x24,8000302c + 80003018: 4e9042ef jal x5,80007d00 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 80012c3c .word 0x80012c3c + 80003028: 00000000 .word 0x00000000 + 8000302c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80003030: 0004b383 ld x7,0(x9) + 80003034: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80003038: 0004ba03 ld x20,0(x9) + 8000303c: 00848493 addi x9,x9,8 + +0000000080003040 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x29, x7, x20 # perform operation + 80003040: 7f438eb3 aes64ks2 x29,x7,x20 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003044: 00063203 ld x4,0(x12) + 80003048: 01d20c63 beq x4,x29,80003060 + 8000304c: 4b5042ef jal x5,80007d00 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 80012caf .word 0x80012caf + 8000305c: 00000000 .word 0x00000000 + 80003060: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80003064: 0004ba83 ld x21,0(x9) + 80003068: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x5555555555555555 + 8000306c: 0004b503 ld x10,0(x9) + 80003070: 00848493 addi x9,x9,8 + +0000000080003074 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64ks2 x1, x21, x10 # perform operation + 80003074: 7eaa80b3 aes64ks2 x1,x21,x10 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003078: 00063203 ld x4,0(x12) + 8000307c: 00120c63 beq x4,x1,80003094 + 80003080: 481042ef jal x5,80007d00 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 80012d22 .word 0x80012d22 + 80003090: 00000000 .word 0x00000000 + 80003094: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80003098: 0004b783 ld x15,0(x9) + 8000309c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000ffffffff + 800030a0: 0004ba83 ld x21,0(x9) + 800030a4: 00848493 addi x9,x9,8 + +00000000800030a8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64ks2 x24, x15, x21 # perform operation + 800030a8: 7f578c33 aes64ks2 x24,x15,x21 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030ac: 00063203 ld x4,0(x12) + 800030b0: 01820c63 beq x4,x24,800030c8 + 800030b4: 44d042ef jal x5,80007d00 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 80012d95 .word 0x80012d95 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x7ffffffffffffffe + 800030cc: 0004b083 ld x1,0(x9) + 800030d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000fffffffe + 800030d4: 0004be03 ld x28,0(x9) + 800030d8: 00848493 addi x9,x9,8 + +00000000800030dc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64ks2 x22, x1, x28 # perform operation + 800030dc: 7fc08b33 aes64ks2 x22,x1,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e0: 00063203 ld x4,0(x12) + 800030e4: 01620c63 beq x4,x22,800030fc + 800030e8: 419042ef jal x5,80007d00 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 80012e00 .word 0x80012e00 + 800030f8: 00000000 .word 0x00000000 + 800030fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003100: 0004ba03 ld x20,0(x9) + 80003104: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x0000000100000000 + 80003108: 0004b303 ld x6,0(x9) + 8000310c: 00848493 addi x9,x9,8 + +0000000080003110 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64ks2 x28, x20, x6 # perform operation + 80003110: 7e6a0e33 aes64ks2 x28,x20,x6 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003114: 00063203 ld x4,0(x12) + 80003118: 01c20c63 beq x4,x28,80003130 + 8000311c: 3e5042ef jal x5,80007d00 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 80012e6b .word 0x80012e6b + 8000312c: 00000000 .word 0x00000000 + 80003130: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80003134: 0004b783 ld x15,0(x9) + 80003138: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x0000000100000001 + 8000313c: 0004b403 ld x8,0(x9) + 80003140: 00848493 addi x9,x9,8 + +0000000080003144 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64ks2 x27, x15, x8 # perform operation + 80003144: 7e878db3 aes64ks2 x27,x15,x8 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003148: 00063203 ld x4,0(x12) + 8000314c: 01b20c63 beq x4,x27,80003164 + 80003150: 3b1042ef jal x5,80007d00 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 80012ed7 .word 0x80012ed7 + 80003160: 00000000 .word 0x00000000 + 80003164: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xffffffffffffffff + 80003168: 0004b803 ld x16,0(x9) + 8000316c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000000 + 80003170: 0004bd03 ld x26,0(x9) + 80003174: 00848493 addi x9,x9,8 + +0000000080003178 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64ks2 x28, x16, x26 # perform operation + 80003178: 7fa80e33 aes64ks2 x28,x16,x26 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000317c: 00063203 ld x4,0(x12) + 80003180: 01c20c63 beq x4,x28,80003198 + 80003184: 37d042ef jal x5,80007d00 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 80012f43 .word 0x80012f43 + 80003194: 00000000 .word 0x00000000 + 80003198: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffffffffffff + 8000319c: 0004b103 ld x2,0(x9) + 800031a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000001 + 800031a4: 0004bc03 ld x24,0(x9) + 800031a8: 00848493 addi x9,x9,8 + +00000000800031ac : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64ks2 x17, x2, x24 # perform operation + 800031ac: 7f8108b3 aes64ks2 x17,x2,x24 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b0: 00063203 ld x4,0(x12) + 800031b4: 01120c63 beq x4,x17,800031cc + 800031b8: 349042ef jal x5,80007d00 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80012fa7 .word 0x80012fa7 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xffffffffffffffff + 800031d0: 0004be83 ld x29,0(x9) + 800031d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000000000002 + 800031d8: 0004bb03 ld x22,0(x9) + 800031dc: 00848493 addi x9,x9,8 + +00000000800031e0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64ks2 x6, x29, x22 # perform operation + 800031e0: 7f6e8333 aes64ks2 x6,x29,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e4: 00063203 ld x4,0(x12) + 800031e8: 00620c63 beq x4,x6,80003200 + 800031ec: 315042ef jal x5,80007d00 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 8001300b .word 0x8001300b + 800031fc: 00000000 .word 0x00000000 + 80003200: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xffffffffffffffff + 80003204: 0004b503 ld x10,0(x9) + 80003208: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x8000000000000000 + 8000320c: 0004bd83 ld x27,0(x9) + 80003210: 00848493 addi x9,x9,8 + +0000000080003214 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64ks2 x18, x10, x27 # perform operation + 80003214: 7fb50933 aes64ks2 x18,x10,x27 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003218: 00063203 ld x4,0(x12) + 8000321c: 01220c63 beq x4,x18,80003234 + 80003220: 2e1042ef jal x5,80007d00 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 8001306f .word 0x8001306f + 80003230: 00000000 .word 0x00000000 + 80003234: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffffffffffff + 80003238: 0004b083 ld x1,0(x9) + 8000323c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x8000000000000001 + 80003240: 0004bb03 ld x22,0(x9) + 80003244: 00848493 addi x9,x9,8 + +0000000080003248 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64ks2 x15, x1, x22 # perform operation + 80003248: 7f6087b3 aes64ks2 x15,x1,x22 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000324c: 00063203 ld x4,0(x12) + 80003250: 00f20c63 beq x4,x15,80003268 + 80003254: 2ad042ef jal x5,80007d00 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 800130e2 .word 0x800130e2 + 80003264: 00000000 .word 0x00000000 + 80003268: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xffffffffffffffff + 8000326c: 0004be03 ld x28,0(x9) + 80003270: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fffffffffffffff + 80003274: 0004b803 ld x16,0(x9) + 80003278: 00848493 addi x9,x9,8 + +000000008000327c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x2, x28, x16 # perform operation + 8000327c: 7f0e0133 aes64ks2 x2,x28,x16 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003280: 00063203 ld x4,0(x12) + 80003284: 00220c63 beq x4,x2,8000329c + 80003288: 279042ef jal x5,80007d00 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80013155 .word 0x80013155 + 80003298: 00000000 .word 0x00000000 + 8000329c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffffffffffff + 800032a0: 0004b103 ld x2,0(x9) + 800032a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800032a8: 0004b883 ld x17,0(x9) + 800032ac: 00848493 addi x9,x9,8 + +00000000800032b0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x1, x2, x17 # perform operation + 800032b0: 7f1100b3 aes64ks2 x1,x2,x17 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b4: 00063203 ld x4,0(x12) + 800032b8: 00120c63 beq x4,x1,800032d0 + 800032bc: 245042ef jal x5,80007d00 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 800131c8 .word 0x800131c8 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xffffffffffffffff + 800032d4: 0004b783 ld x15,0(x9) + 800032d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffffffffffff + 800032dc: 0004b303 ld x6,0(x9) + 800032e0: 00848493 addi x9,x9,8 + +00000000800032e4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x26, x15, x6 # perform operation + 800032e4: 7e678d33 aes64ks2 x26,x15,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e8: 00063203 ld x4,0(x12) + 800032ec: 01a20c63 beq x4,x26,80003304 + 800032f0: 211042ef jal x5,80007d00 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 8001323b .word 0x8001323b + 80003300: 00000000 .word 0x00000000 + 80003304: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xffffffffffffffff + 80003308: 0004be03 ld x28,0(x9) + 8000330c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xfffffffffffffffe + 80003310: 0004b103 ld x2,0(x9) + 80003314: 00848493 addi x9,x9,8 + +0000000080003318 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x27, x28, x2 # perform operation + 80003318: 7e2e0db3 aes64ks2 x27,x28,x2 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000331c: 00063203 ld x4,0(x12) + 80003320: 01b20c63 beq x4,x27,80003338 + 80003324: 1dd042ef jal x5,80007d00 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 800132ae .word 0x800132ae + 80003334: 00000000 .word 0x00000000 + 80003338: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xffffffffffffffff + 8000333c: 0004bf83 ld x31,0(x9) + 80003340: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80003344: 0004b983 ld x19,0(x9) + 80003348: 00848493 addi x9,x9,8 + +000000008000334c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x21, x31, x19 # perform operation + 8000334c: 7f3f8ab3 aes64ks2 x21,x31,x19 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003350: 00063203 ld x4,0(x12) + 80003354: 01520c63 beq x4,x21,8000336c + 80003358: 1a9042ef jal x5,80007d00 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80013321 .word 0x80013321 + 80003368: 00000000 .word 0x00000000 + 8000336c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xffffffffffffffff + 80003370: 0004b683 ld x13,0(x9) + 80003374: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80003378: 0004ba83 ld x21,0(x9) + 8000337c: 00848493 addi x9,x9,8 + +0000000080003380 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x18, x13, x21 # perform operation + 80003380: 7f568933 aes64ks2 x18,x13,x21 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003384: 00063203 ld x4,0(x12) + 80003388: 01220c63 beq x4,x18,800033a0 + 8000338c: 175042ef jal x5,80007d00 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 80013394 .word 0x80013394 + 8000339c: 00000000 .word 0x00000000 + 800033a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xffffffffffffffff + 800033a4: 0004bf03 ld x30,0(x9) + 800033a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x5555555555555555 + 800033ac: 0004bd83 ld x27,0(x9) + 800033b0: 00848493 addi x9,x9,8 + +00000000800033b4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64ks2 x11, x30, x27 # perform operation + 800033b4: 7fbf05b3 aes64ks2 x11,x30,x27 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b8: 00063203 ld x4,0(x12) + 800033bc: 00b20c63 beq x4,x11,800033d4 + 800033c0: 141042ef jal x5,80007d00 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 80013407 .word 0x80013407 + 800033d0: 00000000 .word 0x00000000 + 800033d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xffffffffffffffff + 800033d8: 0004bd03 ld x26,0(x9) + 800033dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x00000000ffffffff + 800033e0: 0004b583 ld x11,0(x9) + 800033e4: 00848493 addi x9,x9,8 + +00000000800033e8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64ks2 x1, x26, x11 # perform operation + 800033e8: 7ebd00b3 aes64ks2 x1,x26,x11 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033ec: 00063203 ld x4,0(x12) + 800033f0: 00120c63 beq x4,x1,80003408 + 800033f4: 10d042ef jal x5,80007d00 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 8001347a .word 0x8001347a + 80003404: 00000000 .word 0x00000000 + 80003408: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xffffffffffffffff + 8000340c: 0004be83 ld x29,0(x9) + 80003410: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80003414: 0004bd03 ld x26,0(x9) + 80003418: 00848493 addi x9,x9,8 + +000000008000341c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64ks2 x14, x29, x26 # perform operation + 8000341c: 7fae8733 aes64ks2 x14,x29,x26 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003420: 00063203 ld x4,0(x12) + 80003424: 00e20c63 beq x4,x14,8000343c + 80003428: 0d9042ef jal x5,80007d00 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 800134e5 .word 0x800134e5 + 80003438: 00000000 .word 0x00000000 + 8000343c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffffffffffff + 80003440: 0004b703 ld x14,0(x9) + 80003444: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000100000000 + 80003448: 0004b083 ld x1,0(x9) + 8000344c: 00848493 addi x9,x9,8 + +0000000080003450 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64ks2 x11, x14, x1 # perform operation + 80003450: 7e1705b3 aes64ks2 x11,x14,x1 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003454: 00063203 ld x4,0(x12) + 80003458: 00b20c63 beq x4,x11,80003470 + 8000345c: 0a5042ef jal x5,80007d00 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 80013550 .word 0x80013550 + 8000346c: 00000000 .word 0x00000000 + 80003470: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xffffffffffffffff + 80003474: 0004ba83 ld x21,0(x9) + 80003478: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000100000001 + 8000347c: 0004be83 ld x29,0(x9) + 80003480: 00848493 addi x9,x9,8 + +0000000080003484 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64ks2 x10, x21, x29 # perform operation + 80003484: 7fda8533 aes64ks2 x10,x21,x29 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003488: 00063203 ld x4,0(x12) + 8000348c: 00a20c63 beq x4,x10,800034a4 + 80003490: 071042ef jal x5,80007d00 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 800135bc .word 0x800135bc + 800034a0: 00000000 .word 0x00000000 + 800034a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xfffffffffffffffe + 800034a8: 0004bb83 ld x23,0(x9) + 800034ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x0000000000000000 + 800034b0: 0004be03 ld x28,0(x9) + 800034b4: 00848493 addi x9,x9,8 + +00000000800034b8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64ks2 x30, x23, x28 # perform operation + 800034b8: 7fcb8f33 aes64ks2 x30,x23,x28 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034bc: 00063203 ld x4,0(x12) + 800034c0: 01e20c63 beq x4,x30,800034d8 + 800034c4: 03d042ef jal x5,80007d00 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80013628 .word 0x80013628 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xfffffffffffffffe + 800034dc: 0004bd03 ld x26,0(x9) + 800034e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000000000001 + 800034e4: 0004bf83 ld x31,0(x9) + 800034e8: 00848493 addi x9,x9,8 + +00000000800034ec : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64ks2 x7, x26, x31 # perform operation + 800034ec: 7ffd03b3 aes64ks2 x7,x26,x31 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f0: 00063203 ld x4,0(x12) + 800034f4: 00720c63 beq x4,x7,8000350c + 800034f8: 009042ef jal x5,80007d00 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 8001368c .word 0x8001368c + 80003508: 00000000 .word 0x00000000 + 8000350c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003510: 0004b683 ld x13,0(x9) + 80003514: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80003518: 0004b583 ld x11,0(x9) + 8000351c: 00848493 addi x9,x9,8 + +0000000080003520 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64ks2 x19, x13, x11 # perform operation + 80003520: 7eb689b3 aes64ks2 x19,x13,x11 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003524: 00063203 ld x4,0(x12) + 80003528: 01320c63 beq x4,x19,80003540 + 8000352c: 7d4042ef jal x5,80007d00 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 800136f0 .word 0x800136f0 + 8000353c: 00000000 .word 0x00000000 + 80003540: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xfffffffffffffffe + 80003544: 0004bc03 ld x24,0(x9) + 80003548: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x8000000000000000 + 8000354c: 0004b383 ld x7,0(x9) + 80003550: 00848493 addi x9,x9,8 + +0000000080003554 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64ks2 x14, x24, x7 # perform operation + 80003554: 7e7c0733 aes64ks2 x14,x24,x7 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003558: 00063203 ld x4,0(x12) + 8000355c: 00e20c63 beq x4,x14,80003574 + 80003560: 7a0042ef jal x5,80007d00 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 80013754 .word 0x80013754 + 80003570: 00000000 .word 0x00000000 + 80003574: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003578: 0004b703 ld x14,0(x9) + 8000357c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x8000000000000001 + 80003580: 0004b183 ld x3,0(x9) + 80003584: 00848493 addi x9,x9,8 + +0000000080003588 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64ks2 x6, x14, x3 # perform operation + 80003588: 7e370333 aes64ks2 x6,x14,x3 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000358c: 00063203 ld x4,0(x12) + 80003590: 00620c63 beq x4,x6,800035a8 + 80003594: 76c042ef jal x5,80007d00 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 800137c7 .word 0x800137c7 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfffffffffffffffe + 800035ac: 0004b703 ld x14,0(x9) + 800035b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7fffffffffffffff + 800035b4: 0004bf03 ld x30,0(x9) + 800035b8: 00848493 addi x9,x9,8 + +00000000800035bc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x8, x14, x30 # perform operation + 800035bc: 7fe70433 aes64ks2 x8,x14,x30 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c0: 00063203 ld x4,0(x12) + 800035c4: 00820c63 beq x4,x8,800035dc + 800035c8: 738042ef jal x5,80007d00 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 8001383a .word 0x8001383a + 800035d8: 00000000 .word 0x00000000 + 800035dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xfffffffffffffffe + 800035e0: 0004ba03 ld x20,0(x9) + 800035e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800035e8: 0004bb83 ld x23,0(x9) + 800035ec: 00848493 addi x9,x9,8 + +00000000800035f0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x3, x20, x23 # perform operation + 800035f0: 7f7a01b3 aes64ks2 x3,x20,x23 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f4: 00063203 ld x4,0(x12) + 800035f8: 00320c63 beq x4,x3,80003610 + 800035fc: 704042ef jal x5,80007d00 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 800138ad .word 0x800138ad + 8000360c: 00000000 .word 0x00000000 + 80003610: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xfffffffffffffffe + 80003614: 0004b183 ld x3,0(x9) + 80003618: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 8000361c: 0004bf03 ld x30,0(x9) + 80003620: 00848493 addi x9,x9,8 + +0000000080003624 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x21, x3, x30 # perform operation + 80003624: 7fe18ab3 aes64ks2 x21,x3,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003628: 00063203 ld x4,0(x12) + 8000362c: 01520c63 beq x4,x21,80003644 + 80003630: 6d0042ef jal x5,80007d00 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 80013920 .word 0x80013920 + 80003640: 00000000 .word 0x00000000 + 80003644: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xfffffffffffffffe + 80003648: 0004bf03 ld x30,0(x9) + 8000364c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffffffffffe + 80003650: 0004bc83 ld x25,0(x9) + 80003654: 00848493 addi x9,x9,8 + +0000000080003658 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x3, x30, x25 # perform operation + 80003658: 7f9f01b3 aes64ks2 x3,x30,x25 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000365c: 00063203 ld x4,0(x12) + 80003660: 00320c63 beq x4,x3,80003678 + 80003664: 69c042ef jal x5,80007d00 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 80013993 .word 0x80013993 + 80003674: 00000000 .word 0x00000000 + 80003678: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffffffffffe + 8000367c: 0004b903 ld x18,0(x9) + 80003680: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003684: 0004b103 ld x2,0(x9) + 80003688: 00848493 addi x9,x9,8 + +000000008000368c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x17, x18, x2 # perform operation + 8000368c: 7e2908b3 aes64ks2 x17,x18,x2 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003690: 00063203 ld x4,0(x12) + 80003694: 01120c63 beq x4,x17,800036ac + 80003698: 668042ef jal x5,80007d00 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 80013a06 .word 0x80013a06 + 800036a8: 00000000 .word 0x00000000 + 800036ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffffffffffe + 800036b0: 0004b083 ld x1,0(x9) + 800036b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 800036b8: 0004ba03 ld x20,0(x9) + 800036bc: 00848493 addi x9,x9,8 + +00000000800036c0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x30, x1, x20 # perform operation + 800036c0: 7f408f33 aes64ks2 x30,x1,x20 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c4: 00063203 ld x4,0(x12) + 800036c8: 01e20c63 beq x4,x30,800036e0 + 800036cc: 634042ef jal x5,80007d00 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 80013a79 .word 0x80013a79 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffffffffffe + 800036e4: 0004b903 ld x18,0(x9) + 800036e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5555555555555555 + 800036ec: 0004b683 ld x13,0(x9) + 800036f0: 00848493 addi x9,x9,8 + +00000000800036f4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64ks2 x24, x18, x13 # perform operation + 800036f4: 7ed90c33 aes64ks2 x24,x18,x13 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f8: 00063203 ld x4,0(x12) + 800036fc: 01820c63 beq x4,x24,80003714 + 80003700: 600042ef jal x5,80007d00 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 80013aec .word 0x80013aec + 80003710: 00000000 .word 0x00000000 + 80003714: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xfffffffffffffffe + 80003718: 0004b383 ld x7,0(x9) + 8000371c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x00000000ffffffff + 80003720: 0004bc03 ld x24,0(x9) + 80003724: 00848493 addi x9,x9,8 + +0000000080003728 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64ks2 x1, x7, x24 # perform operation + 80003728: 7f8380b3 aes64ks2 x1,x7,x24 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000372c: 00063203 ld x4,0(x12) + 80003730: 00120c63 beq x4,x1,80003748 + 80003734: 5cc042ef jal x5,80007d00 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 80013b5f .word 0x80013b5f + 80003744: 00000000 .word 0x00000000 + 80003748: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xfffffffffffffffe + 8000374c: 0004b803 ld x16,0(x9) + 80003750: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000000fffffffe + 80003754: 0004be83 ld x29,0(x9) + 80003758: 00848493 addi x9,x9,8 + +000000008000375c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64ks2 x13, x16, x29 # perform operation + 8000375c: 7fd806b3 aes64ks2 x13,x16,x29 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003760: 00063203 ld x4,0(x12) + 80003764: 00d20c63 beq x4,x13,8000377c + 80003768: 598042ef jal x5,80007d00 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80013bca .word 0x80013bca + 80003778: 00000000 .word 0x00000000 + 8000377c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xfffffffffffffffe + 80003780: 0004b383 ld x7,0(x9) + 80003784: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000100000000 + 80003788: 0004bb03 ld x22,0(x9) + 8000378c: 00848493 addi x9,x9,8 + +0000000080003790 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64ks2 x21, x7, x22 # perform operation + 80003790: 7f638ab3 aes64ks2 x21,x7,x22 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003794: 00063203 ld x4,0(x12) + 80003798: 01520c63 beq x4,x21,800037b0 + 8000379c: 564042ef jal x5,80007d00 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 80013c35 .word 0x80013c35 + 800037ac: 00000000 .word 0x00000000 + 800037b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xfffffffffffffffe + 800037b4: 0004bc83 ld x25,0(x9) + 800037b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000001 + 800037bc: 0004b803 ld x16,0(x9) + 800037c0: 00848493 addi x9,x9,8 + +00000000800037c4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64ks2 x15, x25, x16 # perform operation + 800037c4: 7f0c87b3 aes64ks2 x15,x25,x16 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c8: 00063203 ld x4,0(x12) + 800037cc: 00f20c63 beq x4,x15,800037e4 + 800037d0: 530042ef jal x5,80007d00 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 80013ca1 .word 0x80013ca1 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 800037e8: 0004b883 ld x17,0(x9) + 800037ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x0000000000000000 + 800037f0: 0004b903 ld x18,0(x9) + 800037f4: 00848493 addi x9,x9,8 + +00000000800037f8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64ks2 x16, x17, x18 # perform operation + 800037f8: 7f288833 aes64ks2 x16,x17,x18 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037fc: 00063203 ld x4,0(x12) + 80003800: 01020c63 beq x4,x16,80003818 + 80003804: 4fc042ef jal x5,80007d00 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 80013d0d .word 0x80013d0d + 80003814: 00000000 .word 0x00000000 + 80003818: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 8000381c: 0004ba83 ld x21,0(x9) + 80003820: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000001 + 80003824: 0004b703 ld x14,0(x9) + 80003828: 00848493 addi x9,x9,8 + +000000008000382c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64ks2 x13, x21, x14 # perform operation + 8000382c: 7eea86b3 aes64ks2 x13,x21,x14 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003830: 00063203 ld x4,0(x12) + 80003834: 00d20c63 beq x4,x13,8000384c + 80003838: 4c8042ef jal x5,80007d00 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 80013d71 .word 0x80013d71 + 80003848: 00000000 .word 0x00000000 + 8000384c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003850: 0004b303 ld x6,0(x9) + 80003854: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000002 + 80003858: 0004b783 ld x15,0(x9) + 8000385c: 00848493 addi x9,x9,8 + +0000000080003860 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64ks2 x21, x6, x15 # perform operation + 80003860: 7ef30ab3 aes64ks2 x21,x6,x15 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003864: 00063203 ld x4,0(x12) + 80003868: 01520c63 beq x4,x21,80003880 + 8000386c: 494042ef jal x5,80007d00 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 80013dd5 .word 0x80013dd5 + 8000387c: 00000000 .word 0x00000000 + 80003880: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003884: 0004b103 ld x2,0(x9) + 80003888: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x8000000000000000 + 8000388c: 0004b503 ld x10,0(x9) + 80003890: 00848493 addi x9,x9,8 + +0000000080003894 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64ks2 x29, x2, x10 # perform operation + 80003894: 7ea10eb3 aes64ks2 x29,x2,x10 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003898: 00063203 ld x4,0(x12) + 8000389c: 01d20c63 beq x4,x29,800038b4 + 800038a0: 460042ef jal x5,80007d00 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 80013e39 .word 0x80013e39 + 800038b0: 00000000 .word 0x00000000 + 800038b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038b8: 0004b983 ld x19,0(x9) + 800038bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000001 + 800038c0: 0004b783 ld x15,0(x9) + 800038c4: 00848493 addi x9,x9,8 + +00000000800038c8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64ks2 x10, x19, x15 # perform operation + 800038c8: 7ef98533 aes64ks2 x10,x19,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038cc: 00063203 ld x4,0(x12) + 800038d0: 00a20c63 beq x4,x10,800038e8 + 800038d4: 42c042ef jal x5,80007d00 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 80013eac .word 0x80013eac + 800038e4: 00000000 .word 0x00000000 + 800038e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038ec: 0004b983 ld x19,0(x9) + 800038f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffffffffffff + 800038f4: 0004ba03 ld x20,0(x9) + 800038f8: 00848493 addi x9,x9,8 + +00000000800038fc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64ks2 x16, x19, x20 # perform operation + 800038fc: 7f498833 aes64ks2 x16,x19,x20 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003900: 00063203 ld x4,0(x12) + 80003904: 01020c63 beq x4,x16,8000391c + 80003908: 3f8042ef jal x5,80007d00 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 80013f1f .word 0x80013f1f + 80003918: 00000000 .word 0x00000000 + 8000391c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003920: 0004bc03 ld x24,0(x9) + 80003924: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80003928: 0004b503 ld x10,0(x9) + 8000392c: 00848493 addi x9,x9,8 + +0000000080003930 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64ks2 x22, x24, x10 # perform operation + 80003930: 7eac0b33 aes64ks2 x22,x24,x10 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003934: 00063203 ld x4,0(x12) + 80003938: 01620c63 beq x4,x22,80003950 + 8000393c: 3c4042ef jal x5,80007d00 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 80013f92 .word 0x80013f92 + 8000394c: 00000000 .word 0x00000000 + 80003950: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 80003954: 0004b903 ld x18,0(x9) + 80003958: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xffffffffffffffff + 8000395c: 0004bf83 ld x31,0(x9) + 80003960: 00848493 addi x9,x9,8 + +0000000080003964 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64ks2 x1, x18, x31 # perform operation + 80003964: 7ff900b3 aes64ks2 x1,x18,x31 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003968: 00063203 ld x4,0(x12) + 8000396c: 00120c63 beq x4,x1,80003984 + 80003970: 390042ef jal x5,80007d00 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80014005 .word 0x80014005 + 80003980: 00000000 .word 0x00000000 + 80003984: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 80003988: 0004bd03 ld x26,0(x9) + 8000398c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xfffffffffffffffe + 80003990: 0004b183 ld x3,0(x9) + 80003994: 00848493 addi x9,x9,8 + +0000000080003998 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64ks2 x19, x26, x3 # perform operation + 80003998: 7e3d09b3 aes64ks2 x19,x26,x3 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000399c: 00063203 ld x4,0(x12) + 800039a0: 01320c63 beq x4,x19,800039b8 + 800039a4: 35c042ef jal x5,80007d00 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80014078 .word 0x80014078 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800039bc: 0004be83 ld x29,0(x9) + 800039c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 800039c4: 0004be03 ld x28,0(x9) + 800039c8: 00848493 addi x9,x9,8 + +00000000800039cc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64ks2 x23, x29, x28 # perform operation + 800039cc: 7fce8bb3 aes64ks2 x23,x29,x28 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d0: 00063203 ld x4,0(x12) + 800039d4: 01720c63 beq x4,x23,800039ec + 800039d8: 328042ef jal x5,80007d00 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 800140eb .word 0x800140eb + 800039e8: 00000000 .word 0x00000000 + 800039ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 800039f0: 0004b583 ld x11,0(x9) + 800039f4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 800039f8: 0004b903 ld x18,0(x9) + 800039fc: 00848493 addi x9,x9,8 + +0000000080003a00 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x1, x11, x18 # perform operation + 80003a00: 7f2580b3 aes64ks2 x1,x11,x18 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a04: 00063203 ld x4,0(x12) + 80003a08: 00120c63 beq x4,x1,80003a20 + 80003a0c: 2f4042ef jal x5,80007d00 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 8001415e .word 0x8001415e + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003a24: 0004bb03 ld x22,0(x9) + 80003a28: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 80003a2c: 0004bb83 ld x23,0(x9) + 80003a30: 00848493 addi x9,x9,8 + +0000000080003a34 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64ks2 x28, x22, x23 # perform operation + 80003a34: 7f7b0e33 aes64ks2 x28,x22,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a38: 00063203 ld x4,0(x12) + 80003a3c: 01c20c63 beq x4,x28,80003a54 + 80003a40: 2c0042ef jal x5,80007d00 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 800141d1 .word 0x800141d1 + 80003a50: 00000000 .word 0x00000000 + 80003a54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003a58: 0004b183 ld x3,0(x9) + 80003a5c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000ffffffff + 80003a60: 0004b103 ld x2,0(x9) + 80003a64: 00848493 addi x9,x9,8 + +0000000080003a68 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64ks2 x20, x3, x2 # perform operation + 80003a68: 7e218a33 aes64ks2 x20,x3,x2 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a6c: 00063203 ld x4,0(x12) + 80003a70: 01420c63 beq x4,x20,80003a88 + 80003a74: 28c042ef jal x5,80007d00 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80014244 .word 0x80014244 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003a8c: 0004b883 ld x17,0(x9) + 80003a90: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000000fffffffe + 80003a94: 0004b783 ld x15,0(x9) + 80003a98: 00848493 addi x9,x9,8 + +0000000080003a9c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64ks2 x1, x17, x15 # perform operation + 80003a9c: 7ef880b3 aes64ks2 x1,x17,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa0: 00063203 ld x4,0(x12) + 80003aa4: 00120c63 beq x4,x1,80003abc + 80003aa8: 258042ef jal x5,80007d00 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 800142af .word 0x800142af + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003ac0: 0004b983 ld x19,0(x9) + 80003ac4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000100000000 + 80003ac8: 0004bf83 ld x31,0(x9) + 80003acc: 00848493 addi x9,x9,8 + +0000000080003ad0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64ks2 x13, x19, x31 # perform operation + 80003ad0: 7ff986b3 aes64ks2 x13,x19,x31 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad4: 00063203 ld x4,0(x12) + 80003ad8: 00d20c63 beq x4,x13,80003af0 + 80003adc: 224042ef jal x5,80007d00 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 8001431a .word 0x8001431a + 80003aec: 00000000 .word 0x00000000 + 80003af0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003af4: 0004bc03 ld x24,0(x9) + 80003af8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000100000001 + 80003afc: 0004b083 ld x1,0(x9) + 80003b00: 00848493 addi x9,x9,8 + +0000000080003b04 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64ks2 x13, x24, x1 # perform operation + 80003b04: 7e1c06b3 aes64ks2 x13,x24,x1 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b08: 00063203 ld x4,0(x12) + 80003b0c: 00d20c63 beq x4,x13,80003b24 + 80003b10: 1f0042ef jal x5,80007d00 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80014386 .word 0x80014386 + 80003b20: 00000000 .word 0x00000000 + 80003b24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b28: 0004b703 ld x14,0(x9) + 80003b2c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 80003b30: 0004b503 ld x10,0(x9) + 80003b34: 00848493 addi x9,x9,8 + +0000000080003b38 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64ks2 x3, x14, x10 # perform operation + 80003b38: 7ea701b3 aes64ks2 x3,x14,x10 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b3c: 00063203 ld x4,0(x12) + 80003b40: 00320c63 beq x4,x3,80003b58 + 80003b44: 1bc042ef jal x5,80007d00 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 800143f2 .word 0x800143f2 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 0004b703 ld x14,0(x9) + 80003b60: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 80003b64: 0004b783 ld x15,0(x9) + 80003b68: 00848493 addi x9,x9,8 + +0000000080003b6c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64ks2 x30, x14, x15 # perform operation + 80003b6c: 7ef70f33 aes64ks2 x30,x14,x15 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b70: 00063203 ld x4,0(x12) + 80003b74: 01e20c63 beq x4,x30,80003b8c + 80003b78: 188042ef jal x5,80007d00 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80014456 .word 0x80014456 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003b90: 0004bd03 ld x26,0(x9) + 80003b94: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x0000000000000002 + 80003b98: 0004b103 ld x2,0(x9) + 80003b9c: 00848493 addi x9,x9,8 + +0000000080003ba0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64ks2 x3, x26, x2 # perform operation + 80003ba0: 7e2d01b3 aes64ks2 x3,x26,x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba4: 00063203 ld x4,0(x12) + 80003ba8: 00320c63 beq x4,x3,80003bc0 + 80003bac: 154042ef jal x5,80007d00 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 800144ba .word 0x800144ba + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 0004b303 ld x6,0(x9) + 80003bc8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x8000000000000000 + 80003bcc: 0004b103 ld x2,0(x9) + 80003bd0: 00848493 addi x9,x9,8 + +0000000080003bd4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64ks2 x10, x6, x2 # perform operation + 80003bd4: 7e230533 aes64ks2 x10,x6,x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd8: 00063203 ld x4,0(x12) + 80003bdc: 00a20c63 beq x4,x10,80003bf4 + 80003be0: 120042ef jal x5,80007d00 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 8001451e .word 0x8001451e + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 0004b083 ld x1,0(x9) + 80003bfc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000001 + 80003c00: 0004b403 ld x8,0(x9) + 80003c04: 00848493 addi x9,x9,8 + +0000000080003c08 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64ks2 x10, x1, x8 # perform operation + 80003c08: 7e808533 aes64ks2 x10,x1,x8 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c0c: 00063203 ld x4,0(x12) + 80003c10: 00a20c63 beq x4,x10,80003c28 + 80003c14: 0ec042ef jal x5,80007d00 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 80014591 .word 0x80014591 + 80003c24: 00000000 .word 0x00000000 + 80003c28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 0004b103 ld x2,0(x9) + 80003c30: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x7fffffffffffffff + 80003c34: 0004b303 ld x6,0(x9) + 80003c38: 00848493 addi x9,x9,8 + +0000000080003c3c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64ks2 x20, x2, x6 # perform operation + 80003c3c: 7e610a33 aes64ks2 x20,x2,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c40: 00063203 ld x4,0(x12) + 80003c44: 01420c63 beq x4,x20,80003c5c + 80003c48: 0b8042ef jal x5,80007d00 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 80014604 .word 0x80014604 + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003c60: 0004b783 ld x15,0(x9) + 80003c64: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80003c68: 0004be83 ld x29,0(x9) + 80003c6c: 00848493 addi x9,x9,8 + +0000000080003c70 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64ks2 x21, x15, x29 # perform operation + 80003c70: 7fd78ab3 aes64ks2 x21,x15,x29 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c74: 00063203 ld x4,0(x12) + 80003c78: 01520c63 beq x4,x21,80003c90 + 80003c7c: 084042ef jal x5,80007d00 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 80014677 .word 0x80014677 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003c94: 0004b583 ld x11,0(x9) + 80003c98: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 80003c9c: 0004bf03 ld x30,0(x9) + 80003ca0: 00848493 addi x9,x9,8 + +0000000080003ca4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64ks2 x20, x11, x30 # perform operation + 80003ca4: 7fe58a33 aes64ks2 x20,x11,x30 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca8: 00063203 ld x4,0(x12) + 80003cac: 01420c63 beq x4,x20,80003cc4 + 80003cb0: 050042ef jal x5,80007d00 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 800146ea .word 0x800146ea + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 0004bb03 ld x22,0(x9) + 80003ccc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xfffffffffffffffe + 80003cd0: 0004be03 ld x28,0(x9) + 80003cd4: 00848493 addi x9,x9,8 + +0000000080003cd8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64ks2 x20, x22, x28 # perform operation + 80003cd8: 7fcb0a33 aes64ks2 x20,x22,x28 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cdc: 00063203 ld x4,0(x12) + 80003ce0: 01420c63 beq x4,x20,80003cf8 + 80003ce4: 01c042ef jal x5,80007d00 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 8001475d .word 0x8001475d + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 0004ba83 ld x21,0(x9) + 80003d00: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80003d04: 0004b903 ld x18,0(x9) + 80003d08: 00848493 addi x9,x9,8 + +0000000080003d0c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64ks2 x2, x21, x18 # perform operation + 80003d0c: 7f2a8133 aes64ks2 x2,x21,x18 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d10: 00063203 ld x4,0(x12) + 80003d14: 00220c63 beq x4,x2,80003d2c + 80003d18: 7e9032ef jal x5,80007d00 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 800147d0 .word 0x800147d0 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003d30: 0004ba03 ld x20,0(x9) + 80003d34: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80003d38: 0004b403 ld x8,0(x9) + 80003d3c: 00848493 addi x9,x9,8 + +0000000080003d40 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x17, x20, x8 # perform operation + 80003d40: 7e8a08b3 aes64ks2 x17,x20,x8 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d44: 00063203 ld x4,0(x12) + 80003d48: 01120c63 beq x4,x17,80003d60 + 80003d4c: 7b5032ef jal x5,80007d00 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 80014843 .word 0x80014843 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003d64: 0004bb03 ld x22,0(x9) + 80003d68: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5555555555555555 + 80003d6c: 0004b703 ld x14,0(x9) + 80003d70: 00848493 addi x9,x9,8 + +0000000080003d74 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64ks2 x29, x22, x14 # perform operation + 80003d74: 7eeb0eb3 aes64ks2 x29,x22,x14 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d78: 00063203 ld x4,0(x12) + 80003d7c: 01d20c63 beq x4,x29,80003d94 + 80003d80: 781032ef jal x5,80007d00 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 800148b6 .word 0x800148b6 + 80003d90: 00000000 .word 0x00000000 + 80003d94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003d98: 0004bf03 ld x30,0(x9) + 80003d9c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x00000000ffffffff + 80003da0: 0004b183 ld x3,0(x9) + 80003da4: 00848493 addi x9,x9,8 + +0000000080003da8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64ks2 x20, x30, x3 # perform operation + 80003da8: 7e3f0a33 aes64ks2 x20,x30,x3 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003dac: 00063203 ld x4,0(x12) + 80003db0: 01420c63 beq x4,x20,80003dc8 + 80003db4: 74d032ef jal x5,80007d00 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 80014929 .word 0x80014929 + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 0004bf83 ld x31,0(x9) + 80003dd0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000fffffffe + 80003dd4: 0004bc83 ld x25,0(x9) + 80003dd8: 00848493 addi x9,x9,8 + +0000000080003ddc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64ks2 x24, x31, x25 # perform operation + 80003ddc: 7f9f8c33 aes64ks2 x24,x31,x25 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de0: 00063203 ld x4,0(x12) + 80003de4: 01820c63 beq x4,x24,80003dfc + 80003de8: 719032ef jal x5,80007d00 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 80014994 .word 0x80014994 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003e00: 0004ba83 ld x21,0(x9) + 80003e04: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x0000000100000000 + 80003e08: 0004be03 ld x28,0(x9) + 80003e0c: 00848493 addi x9,x9,8 + +0000000080003e10 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64ks2 x19, x21, x28 # perform operation + 80003e10: 7fca89b3 aes64ks2 x19,x21,x28 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e14: 00063203 ld x4,0(x12) + 80003e18: 01320c63 beq x4,x19,80003e30 + 80003e1c: 6e5032ef jal x5,80007d00 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 800149ff .word 0x800149ff + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003e34: 0004b883 ld x17,0(x9) + 80003e38: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000100000001 + 80003e3c: 0004be83 ld x29,0(x9) + 80003e40: 00848493 addi x9,x9,8 + +0000000080003e44 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64ks2 x27, x17, x29 # perform operation + 80003e44: 7fd88db3 aes64ks2 x27,x17,x29 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e48: 00063203 ld x4,0(x12) + 80003e4c: 01b20c63 beq x4,x27,80003e64 + 80003e50: 6b1032ef jal x5,80007d00 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 80014a6b .word 0x80014a6b + 80003e60: 00000000 .word 0x00000000 + 80003e64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x5555555555555555 + 80003e68: 0004bf83 ld x31,0(x9) + 80003e6c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000000000000 + 80003e70: 0004b683 ld x13,0(x9) + 80003e74: 00848493 addi x9,x9,8 + +0000000080003e78 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64ks2 x29, x31, x13 # perform operation + 80003e78: 7edf8eb3 aes64ks2 x29,x31,x13 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e7c: 00063203 ld x4,0(x12) + 80003e80: 01d20c63 beq x4,x29,80003e98 + 80003e84: 67d032ef jal x5,80007d00 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 80014ad7 .word 0x80014ad7 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x5555555555555555 + 80003e9c: 0004ba03 ld x20,0(x9) + 80003ea0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000000000001 + 80003ea4: 0004bc83 ld x25,0(x9) + 80003ea8: 00848493 addi x9,x9,8 + +0000000080003eac : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64ks2 x28, x20, x25 # perform operation + 80003eac: 7f9a0e33 aes64ks2 x28,x20,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb0: 00063203 ld x4,0(x12) + 80003eb4: 01c20c63 beq x4,x28,80003ecc + 80003eb8: 649032ef jal x5,80007d00 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 80014b3b .word 0x80014b3b + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x5555555555555555 + 80003ed0: 0004b403 ld x8,0(x9) + 80003ed4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000000000002 + 80003ed8: 0004be83 ld x29,0(x9) + 80003edc: 00848493 addi x9,x9,8 + +0000000080003ee0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64ks2 x28, x8, x29 # perform operation + 80003ee0: 7fd40e33 aes64ks2 x28,x8,x29 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee4: 00063203 ld x4,0(x12) + 80003ee8: 01c20c63 beq x4,x28,80003f00 + 80003eec: 615032ef jal x5,80007d00 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 80014b9f .word 0x80014b9f + 80003efc: 00000000 .word 0x00000000 + 80003f00: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5555555555555555 + 80003f04: 0004bb03 ld x22,0(x9) + 80003f08: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x8000000000000000 + 80003f0c: 0004bf83 ld x31,0(x9) + 80003f10: 00848493 addi x9,x9,8 + +0000000080003f14 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64ks2 x23, x22, x31 # perform operation + 80003f14: 7ffb0bb3 aes64ks2 x23,x22,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f18: 00063203 ld x4,0(x12) + 80003f1c: 01720c63 beq x4,x23,80003f34 + 80003f20: 5e1032ef jal x5,80007d00 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 80014c03 .word 0x80014c03 + 80003f30: 00000000 .word 0x00000000 + 80003f34: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x5555555555555555 + 80003f38: 0004bd83 ld x27,0(x9) + 80003f3c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000001 + 80003f40: 0004b403 ld x8,0(x9) + 80003f44: 00848493 addi x9,x9,8 + +0000000080003f48 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64ks2 x20, x27, x8 # perform operation + 80003f48: 7e8d8a33 aes64ks2 x20,x27,x8 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f4c: 00063203 ld x4,0(x12) + 80003f50: 01420c63 beq x4,x20,80003f68 + 80003f54: 5ad032ef jal x5,80007d00 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 80014c76 .word 0x80014c76 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5555555555555555 + 80003f6c: 0004be03 ld x28,0(x9) + 80003f70: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80003f74: 0004b983 ld x19,0(x9) + 80003f78: 00848493 addi x9,x9,8 + +0000000080003f7c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64ks2 x2, x28, x19 # perform operation + 80003f7c: 7f3e0133 aes64ks2 x2,x28,x19 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f80: 00063203 ld x4,0(x12) + 80003f84: 00220c63 beq x4,x2,80003f9c + 80003f88: 579032ef jal x5,80007d00 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 80014ce9 .word 0x80014ce9 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5555555555555555 + 80003fa0: 0004bb03 ld x22,0(x9) + 80003fa4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80003fa8: 0004ba03 ld x20,0(x9) + 80003fac: 00848493 addi x9,x9,8 + +0000000080003fb0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64ks2 x24, x22, x20 # perform operation + 80003fb0: 7f4b0c33 aes64ks2 x24,x22,x20 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb4: 00063203 ld x4,0(x12) + 80003fb8: 01820c63 beq x4,x24,80003fd0 + 80003fbc: 545032ef jal x5,80007d00 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 80014d5c .word 0x80014d5c + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5555555555555555 + 80003fd4: 0004b583 ld x11,0(x9) + 80003fd8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 80003fdc: 0004bf03 ld x30,0(x9) + 80003fe0: 00848493 addi x9,x9,8 + +0000000080003fe4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64ks2 x2, x11, x30 # perform operation + 80003fe4: 7fe58133 aes64ks2 x2,x11,x30 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe8: 00063203 ld x4,0(x12) + 80003fec: 00220c63 beq x4,x2,80004004 + 80003ff0: 511032ef jal x5,80007d00 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 80014dcf .word 0x80014dcf + 80004000: 00000000 .word 0x00000000 + 80004004: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5555555555555555 + 80004008: 0004ba83 ld x21,0(x9) + 8000400c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xfffffffffffffffe + 80004010: 0004ba03 ld x20,0(x9) + 80004014: 00848493 addi x9,x9,8 + +0000000080004018 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64ks2 x1, x21, x20 # perform operation + 80004018: 7f4a80b3 aes64ks2 x1,x21,x20 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000401c: 00063203 ld x4,0(x12) + 80004020: 00120c63 beq x4,x1,80004038 + 80004024: 4dd032ef jal x5,80007d00 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 80014e42 .word 0x80014e42 + 80004034: 00000000 .word 0x00000000 + 80004038: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5555555555555555 + 8000403c: 0004b983 ld x19,0(x9) + 80004040: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004044: 0004b683 ld x13,0(x9) + 80004048: 00848493 addi x9,x9,8 + +000000008000404c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64ks2 x28, x19, x13 # perform operation + 8000404c: 7ed98e33 aes64ks2 x28,x19,x13 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004050: 00063203 ld x4,0(x12) + 80004054: 01c20c63 beq x4,x28,8000406c + 80004058: 4a9032ef jal x5,80007d00 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 80014eb5 .word 0x80014eb5 + 80004068: 00000000 .word 0x00000000 + 8000406c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x5555555555555555 + 80004070: 0004b383 ld x7,0(x9) + 80004074: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004078: 0004b983 ld x19,0(x9) + 8000407c: 00848493 addi x9,x9,8 + +0000000080004080 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x31, x7, x19 # perform operation + 80004080: 7f338fb3 aes64ks2 x31,x7,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004084: 00063203 ld x4,0(x12) + 80004088: 01f20c63 beq x4,x31,800040a0 + 8000408c: 475032ef jal x5,80007d00 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 80014f28 .word 0x80014f28 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5555555555555555 + 800040a4: 0004b983 ld x19,0(x9) + 800040a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 800040ac: 0004bb83 ld x23,0(x9) + 800040b0: 00848493 addi x9,x9,8 + +00000000800040b4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64ks2 x1, x19, x23 # perform operation + 800040b4: 7f7980b3 aes64ks2 x1,x19,x23 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b8: 00063203 ld x4,0(x12) + 800040bc: 00120c63 beq x4,x1,800040d4 + 800040c0: 441032ef jal x5,80007d00 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80014f9b .word 0x80014f9b + 800040d0: 00000000 .word 0x00000000 + 800040d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5555555555555555 + 800040d8: 0004b583 ld x11,0(x9) + 800040dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000000ffffffff + 800040e0: 0004b803 ld x16,0(x9) + 800040e4: 00848493 addi x9,x9,8 + +00000000800040e8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64ks2 x13, x11, x16 # perform operation + 800040e8: 7f0586b3 aes64ks2 x13,x11,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040ec: 00063203 ld x4,0(x12) + 800040f0: 00d20c63 beq x4,x13,80004108 + 800040f4: 40d032ef jal x5,80007d00 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 8001500e .word 0x8001500e + 80004104: 00000000 .word 0x00000000 + 80004108: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5555555555555555 + 8000410c: 0004b703 ld x14,0(x9) + 80004110: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000fffffffe + 80004114: 0004ba83 ld x21,0(x9) + 80004118: 00848493 addi x9,x9,8 + +000000008000411c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64ks2 x2, x14, x21 # perform operation + 8000411c: 7f570133 aes64ks2 x2,x14,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004120: 00063203 ld x4,0(x12) + 80004124: 00220c63 beq x4,x2,8000413c + 80004128: 3d9032ef jal x5,80007d00 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 80015079 .word 0x80015079 + 80004138: 00000000 .word 0x00000000 + 8000413c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x5555555555555555 + 80004140: 0004b683 ld x13,0(x9) + 80004144: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000100000000 + 80004148: 0004b383 ld x7,0(x9) + 8000414c: 00848493 addi x9,x9,8 + +0000000080004150 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64ks2 x2, x13, x7 # perform operation + 80004150: 7e768133 aes64ks2 x2,x13,x7 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004154: 00063203 ld x4,0(x12) + 80004158: 00220c63 beq x4,x2,80004170 + 8000415c: 3a5032ef jal x5,80007d00 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 800150e4 .word 0x800150e4 + 8000416c: 00000000 .word 0x00000000 + 80004170: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5555555555555555 + 80004174: 0004be03 ld x28,0(x9) + 80004178: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000100000001 + 8000417c: 0004bc83 ld x25,0(x9) + 80004180: 00848493 addi x9,x9,8 + +0000000080004184 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64ks2 x19, x28, x25 # perform operation + 80004184: 7f9e09b3 aes64ks2 x19,x28,x25 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004188: 00063203 ld x4,0(x12) + 8000418c: 01320c63 beq x4,x19,800041a4 + 80004190: 371032ef jal x5,80007d00 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 80015150 .word 0x80015150 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000000ffffffff + 800041a8: 0004b703 ld x14,0(x9) + 800041ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000000000000 + 800041b0: 0004bf83 ld x31,0(x9) + 800041b4: 00848493 addi x9,x9,8 + +00000000800041b8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64ks2 x30, x14, x31 # perform operation + 800041b8: 7ff70f33 aes64ks2 x30,x14,x31 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041bc: 00063203 ld x4,0(x12) + 800041c0: 01e20c63 beq x4,x30,800041d8 + 800041c4: 33d032ef jal x5,80007d00 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 800151bc .word 0x800151bc + 800041d4: 00000000 .word 0x00000000 + 800041d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 800041dc: 0004b383 ld x7,0(x9) + 800041e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000001 + 800041e4: 0004b503 ld x10,0(x9) + 800041e8: 00848493 addi x9,x9,8 + +00000000800041ec : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64ks2 x27, x7, x10 # perform operation + 800041ec: 7ea38db3 aes64ks2 x27,x7,x10 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f0: 00063203 ld x4,0(x12) + 800041f4: 01b20c63 beq x4,x27,8000420c + 800041f8: 309032ef jal x5,80007d00 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 80015218 .word 0x80015218 + 80004208: 00000000 .word 0x00000000 + 8000420c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000000ffffffff + 80004210: 0004b883 ld x17,0(x9) + 80004214: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000002 + 80004218: 0004b703 ld x14,0(x9) + 8000421c: 00848493 addi x9,x9,8 + +0000000080004220 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64ks2 x18, x17, x14 # perform operation + 80004220: 7ee88933 aes64ks2 x18,x17,x14 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004224: 00063203 ld x4,0(x12) + 80004228: 01220c63 beq x4,x18,80004240 + 8000422c: 2d5032ef jal x5,80007d00 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 80015274 .word 0x80015274 + 8000423c: 00000000 .word 0x00000000 + 80004240: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000000ffffffff + 80004244: 0004ba03 ld x20,0(x9) + 80004248: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x8000000000000000 + 8000424c: 0004b303 ld x6,0(x9) + 80004250: 00848493 addi x9,x9,8 + +0000000080004254 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64ks2 x26, x20, x6 # perform operation + 80004254: 7e6a0d33 aes64ks2 x26,x20,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004258: 00063203 ld x4,0(x12) + 8000425c: 01a20c63 beq x4,x26,80004274 + 80004260: 2a1032ef jal x5,80007d00 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 800152d0 .word 0x800152d0 + 80004270: 00000000 .word 0x00000000 + 80004274: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x00000000ffffffff + 80004278: 0004b303 ld x6,0(x9) + 8000427c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x8000000000000001 + 80004280: 0004b183 ld x3,0(x9) + 80004284: 00848493 addi x9,x9,8 + +0000000080004288 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64ks2 x22, x6, x3 # perform operation + 80004288: 7e330b33 aes64ks2 x22,x6,x3 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000428c: 00063203 ld x4,0(x12) + 80004290: 01620c63 beq x4,x22,800042a8 + 80004294: 26d032ef jal x5,80007d00 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 8001533b .word 0x8001533b + 800042a4: 00000000 .word 0x00000000 + 800042a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x00000000ffffffff + 800042ac: 0004b103 ld x2,0(x9) + 800042b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffffffffffff + 800042b4: 0004b183 ld x3,0(x9) + 800042b8: 00848493 addi x9,x9,8 + +00000000800042bc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x15, x2, x3 # perform operation + 800042bc: 7e3107b3 aes64ks2 x15,x2,x3 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c0: 00063203 ld x4,0(x12) + 800042c4: 00f20c63 beq x4,x15,800042dc + 800042c8: 239032ef jal x5,80007d00 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 800153a6 .word 0x800153a6 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000000ffffffff + 800042e0: 0004b703 ld x14,0(x9) + 800042e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800042e8: 0004bb83 ld x23,0(x9) + 800042ec: 00848493 addi x9,x9,8 + +00000000800042f0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x8, x14, x23 # perform operation + 800042f0: 7f770433 aes64ks2 x8,x14,x23 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f4: 00063203 ld x4,0(x12) + 800042f8: 00820c63 beq x4,x8,80004310 + 800042fc: 205032ef jal x5,80007d00 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 80015411 .word 0x80015411 + 8000430c: 00000000 .word 0x00000000 + 80004310: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 80004314: 0004b383 ld x7,0(x9) + 80004318: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xffffffffffffffff + 8000431c: 0004b883 ld x17,0(x9) + 80004320: 00848493 addi x9,x9,8 + +0000000080004324 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x10, x7, x17 # perform operation + 80004324: 7f138533 aes64ks2 x10,x7,x17 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004328: 00063203 ld x4,0(x12) + 8000432c: 00a20c63 beq x4,x10,80004344 + 80004330: 1d1032ef jal x5,80007d00 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 8001547c .word 0x8001547c + 80004340: 00000000 .word 0x00000000 + 80004344: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x00000000ffffffff + 80004348: 0004bb83 ld x23,0(x9) + 8000434c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004350: 0004b583 ld x11,0(x9) + 80004354: 00848493 addi x9,x9,8 + +0000000080004358 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x15, x23, x11 # perform operation + 80004358: 7ebb87b3 aes64ks2 x15,x23,x11 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000435c: 00063203 ld x4,0(x12) + 80004360: 00f20c63 beq x4,x15,80004378 + 80004364: 19d032ef jal x5,80007d00 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 800154e7 .word 0x800154e7 + 80004374: 00000000 .word 0x00000000 + 80004378: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000ffffffff + 8000437c: 0004bd83 ld x27,0(x9) + 80004380: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80004384: 0004b103 ld x2,0(x9) + 80004388: 00848493 addi x9,x9,8 + +000000008000438c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x13, x27, x2 # perform operation + 8000438c: 7e2d86b3 aes64ks2 x13,x27,x2 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004390: 00063203 ld x4,0(x12) + 80004394: 00d20c63 beq x4,x13,800043ac + 80004398: 169032ef jal x5,80007d00 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 80015552 .word 0x80015552 + 800043a8: 00000000 .word 0x00000000 + 800043ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000000ffffffff + 800043b0: 0004b583 ld x11,0(x9) + 800043b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 800043b8: 0004b303 ld x6,0(x9) + 800043bc: 00848493 addi x9,x9,8 + +00000000800043c0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x22, x11, x6 # perform operation + 800043c0: 7e658b33 aes64ks2 x22,x11,x6 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c4: 00063203 ld x4,0(x12) + 800043c8: 01620c63 beq x4,x22,800043e0 + 800043cc: 135032ef jal x5,80007d00 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 800155bd .word 0x800155bd + 800043dc: 00000000 .word 0x00000000 + 800043e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000ffffffff + 800043e4: 0004bf83 ld x31,0(x9) + 800043e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5555555555555555 + 800043ec: 0004b883 ld x17,0(x9) + 800043f0: 00848493 addi x9,x9,8 + +00000000800043f4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64ks2 x26, x31, x17 # perform operation + 800043f4: 7f1f8d33 aes64ks2 x26,x31,x17 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f8: 00063203 ld x4,0(x12) + 800043fc: 01a20c63 beq x4,x26,80004414 + 80004400: 101032ef jal x5,80007d00 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 80015628 .word 0x80015628 + 80004410: 00000000 .word 0x00000000 + 80004414: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000000ffffffff + 80004418: 0004ba83 ld x21,0(x9) + 8000441c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x00000000ffffffff + 80004420: 0004b383 ld x7,0(x9) + 80004424: 00848493 addi x9,x9,8 + +0000000080004428 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64ks2 x17, x21, x7 # perform operation + 80004428: 7e7a88b3 aes64ks2 x17,x21,x7 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000442c: 00063203 ld x4,0(x12) + 80004430: 01120c63 beq x4,x17,80004448 + 80004434: 0cd032ef jal x5,80007d00 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 80015693 .word 0x80015693 + 80004444: 00000000 .word 0x00000000 + 80004448: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 8000444c: 0004b383 ld x7,0(x9) + 80004450: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80004454: 0004bd03 ld x26,0(x9) + 80004458: 00848493 addi x9,x9,8 + +000000008000445c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64ks2 x29, x7, x26 # perform operation + 8000445c: 7fa38eb3 aes64ks2 x29,x7,x26 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004460: 00063203 ld x4,0(x12) + 80004464: 01d20c63 beq x4,x29,8000447c + 80004468: 099032ef jal x5,80007d00 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 800156f6 .word 0x800156f6 + 80004478: 00000000 .word 0x00000000 + 8000447c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000ffffffff + 80004480: 0004be83 ld x29,0(x9) + 80004484: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000100000000 + 80004488: 0004b683 ld x13,0(x9) + 8000448c: 00848493 addi x9,x9,8 + +0000000080004490 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64ks2 x6, x29, x13 # perform operation + 80004490: 7ede8333 aes64ks2 x6,x29,x13 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004494: 00063203 ld x4,0(x12) + 80004498: 00620c63 beq x4,x6,800044b0 + 8000449c: 065032ef jal x5,80007d00 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 80015759 .word 0x80015759 + 800044ac: 00000000 .word 0x00000000 + 800044b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x00000000ffffffff + 800044b4: 0004b083 ld x1,0(x9) + 800044b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000100000001 + 800044bc: 0004b583 ld x11,0(x9) + 800044c0: 00848493 addi x9,x9,8 + +00000000800044c4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64ks2 x23, x1, x11 # perform operation + 800044c4: 7eb08bb3 aes64ks2 x23,x1,x11 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c8: 00063203 ld x4,0(x12) + 800044cc: 01720c63 beq x4,x23,800044e4 + 800044d0: 031032ef jal x5,80007d00 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 800157bd .word 0x800157bd + 800044e0: 00000000 .word 0x00000000 + 800044e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800044e8: 0004b183 ld x3,0(x9) + 800044ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 800044f0: 0004b503 ld x10,0(x9) + 800044f4: 00848493 addi x9,x9,8 + +00000000800044f8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64ks2 x23, x3, x10 # perform operation + 800044f8: 7ea18bb3 aes64ks2 x23,x3,x10 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044fc: 00063203 ld x4,0(x12) + 80004500: 01720c63 beq x4,x23,80004518 + 80004504: 7fc032ef jal x5,80007d00 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 80015821 .word 0x80015821 + 80004514: 00000000 .word 0x00000000 + 80004518: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000000fffffffe + 8000451c: 0004bc03 ld x24,0(x9) + 80004520: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000000000001 + 80004524: 0004bb83 ld x23,0(x9) + 80004528: 00848493 addi x9,x9,8 + +000000008000452c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64ks2 x17, x24, x23 # perform operation + 8000452c: 7f7c08b3 aes64ks2 x17,x24,x23 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004530: 00063203 ld x4,0(x12) + 80004534: 01120c63 beq x4,x17,8000454c + 80004538: 7c8032ef jal x5,80007d00 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 8001587d .word 0x8001587d + 80004548: 00000000 .word 0x00000000 + 8000454c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 80004550: 0004bd83 ld x27,0(x9) + 80004554: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000002 + 80004558: 0004bd03 ld x26,0(x9) + 8000455c: 00848493 addi x9,x9,8 + +0000000080004560 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64ks2 x7, x27, x26 # perform operation + 80004560: 7fad83b3 aes64ks2 x7,x27,x26 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004564: 00063203 ld x4,0(x12) + 80004568: 00720c63 beq x4,x7,80004580 + 8000456c: 794032ef jal x5,80007d00 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 800158d9 .word 0x800158d9 + 8000457c: 00000000 .word 0x00000000 + 80004580: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 80004584: 0004bd83 ld x27,0(x9) + 80004588: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000000 + 8000458c: 0004be03 ld x28,0(x9) + 80004590: 00848493 addi x9,x9,8 + +0000000080004594 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64ks2 x8, x27, x28 # perform operation + 80004594: 7fcd8433 aes64ks2 x8,x27,x28 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004598: 00063203 ld x4,0(x12) + 8000459c: 00820c63 beq x4,x8,800045b4 + 800045a0: 760032ef jal x5,80007d00 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 80015935 .word 0x80015935 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800045b8: 0004b183 ld x3,0(x9) + 800045bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x8000000000000001 + 800045c0: 0004b903 ld x18,0(x9) + 800045c4: 00848493 addi x9,x9,8 + +00000000800045c8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64ks2 x10, x3, x18 # perform operation + 800045c8: 7f218533 aes64ks2 x10,x3,x18 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045cc: 00063203 ld x4,0(x12) + 800045d0: 00a20c63 beq x4,x10,800045e8 + 800045d4: 72c032ef jal x5,80007d00 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 800159a0 .word 0x800159a0 + 800045e4: 00000000 .word 0x00000000 + 800045e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x00000000fffffffe + 800045ec: 0004b403 ld x8,0(x9) + 800045f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7fffffffffffffff + 800045f4: 0004b083 ld x1,0(x9) + 800045f8: 00848493 addi x9,x9,8 + +00000000800045fc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x22, x8, x1 # perform operation + 800045fc: 7e140b33 aes64ks2 x22,x8,x1 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004600: 00063203 ld x4,0(x12) + 80004604: 01620c63 beq x4,x22,8000461c + 80004608: 6f8032ef jal x5,80007d00 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 80015a0b .word 0x80015a0b + 80004618: 00000000 .word 0x00000000 + 8000461c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000fffffffe + 80004620: 0004be83 ld x29,0(x9) + 80004624: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80004628: 0004b883 ld x17,0(x9) + 8000462c: 00848493 addi x9,x9,8 + +0000000080004630 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x11, x29, x17 # perform operation + 80004630: 7f1e85b3 aes64ks2 x11,x29,x17 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004634: 00063203 ld x4,0(x12) + 80004638: 00b20c63 beq x4,x11,80004650 + 8000463c: 6c4032ef jal x5,80007d00 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 80015a76 .word 0x80015a76 + 8000464c: 00000000 .word 0x00000000 + 80004650: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x00000000fffffffe + 80004654: 0004bb03 ld x22,0(x9) + 80004658: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xffffffffffffffff + 8000465c: 0004b883 ld x17,0(x9) + 80004660: 00848493 addi x9,x9,8 + +0000000080004664 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x29, x22, x17 # perform operation + 80004664: 7f1b0eb3 aes64ks2 x29,x22,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004668: 00063203 ld x4,0(x12) + 8000466c: 01d20c63 beq x4,x29,80004684 + 80004670: 690032ef jal x5,80007d00 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 80015ae1 .word 0x80015ae1 + 80004680: 00000000 .word 0x00000000 + 80004684: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 80004688: 0004b183 ld x3,0(x9) + 8000468c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004690: 0004b583 ld x11,0(x9) + 80004694: 00848493 addi x9,x9,8 + +0000000080004698 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x3, x11 # perform operation + 80004698: 7eb18d33 aes64ks2 x26,x3,x11 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000469c: 00063203 ld x4,0(x12) + 800046a0: 01a20c63 beq x4,x26,800046b8 + 800046a4: 65c032ef jal x5,80007d00 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 80015b4c .word 0x80015b4c + 800046b4: 00000000 .word 0x00000000 + 800046b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 800046bc: 0004bd83 ld x27,0(x9) + 800046c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 800046c4: 0004bb83 ld x23,0(x9) + 800046c8: 00848493 addi x9,x9,8 + +00000000800046cc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x11, x27, x23 # perform operation + 800046cc: 7f7d85b3 aes64ks2 x11,x27,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d0: 00063203 ld x4,0(x12) + 800046d4: 00b20c63 beq x4,x11,800046ec + 800046d8: 628032ef jal x5,80007d00 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 80015bb7 .word 0x80015bb7 + 800046e8: 00000000 .word 0x00000000 + 800046ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000fffffffe + 800046f0: 0004b803 ld x16,0(x9) + 800046f4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 800046f8: 0004bc03 ld x24,0(x9) + 800046fc: 00848493 addi x9,x9,8 + +0000000080004700 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x8, x16, x24 # perform operation + 80004700: 7f880433 aes64ks2 x8,x16,x24 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004704: 00063203 ld x4,0(x12) + 80004708: 00820c63 beq x4,x8,80004720 + 8000470c: 5f4032ef jal x5,80007d00 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 80015c22 .word 0x80015c22 + 8000471c: 00000000 .word 0x00000000 + 80004720: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x00000000fffffffe + 80004724: 0004be03 ld x28,0(x9) + 80004728: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x5555555555555555 + 8000472c: 0004b903 ld x18,0(x9) + 80004730: 00848493 addi x9,x9,8 + +0000000080004734 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64ks2 x25, x28, x18 # perform operation + 80004734: 7f2e0cb3 aes64ks2 x25,x28,x18 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004738: 00063203 ld x4,0(x12) + 8000473c: 01920c63 beq x4,x25,80004754 + 80004740: 5c0032ef jal x5,80007d00 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 80015c8d .word 0x80015c8d + 80004750: 00000000 .word 0x00000000 + 80004754: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000fffffffe + 80004758: 0004b803 ld x16,0(x9) + 8000475c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000000ffffffff + 80004760: 0004b883 ld x17,0(x9) + 80004764: 00848493 addi x9,x9,8 + +0000000080004768 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64ks2 x28, x16, x17 # perform operation + 80004768: 7f180e33 aes64ks2 x28,x16,x17 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000476c: 00063203 ld x4,0(x12) + 80004770: 01c20c63 beq x4,x28,80004788 + 80004774: 58c032ef jal x5,80007d00 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 80015cf8 .word 0x80015cf8 + 80004784: 00000000 .word 0x00000000 + 80004788: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x00000000fffffffe + 8000478c: 0004b103 ld x2,0(x9) + 80004790: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000000fffffffe + 80004794: 0004bf03 ld x30,0(x9) + 80004798: 00848493 addi x9,x9,8 + +000000008000479c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64ks2 x14, x2, x30 # perform operation + 8000479c: 7fe10733 aes64ks2 x14,x2,x30 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a0: 00063203 ld x4,0(x12) + 800047a4: 00e20c63 beq x4,x14,800047bc + 800047a8: 558032ef jal x5,80007d00 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 80015d5b .word 0x80015d5b + 800047b8: 00000000 .word 0x00000000 + 800047bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000fffffffe + 800047c0: 0004bf83 ld x31,0(x9) + 800047c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000100000000 + 800047c8: 0004b383 ld x7,0(x9) + 800047cc: 00848493 addi x9,x9,8 + +00000000800047d0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64ks2 x28, x31, x7 # perform operation + 800047d0: 7e7f8e33 aes64ks2 x28,x31,x7 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d4: 00063203 ld x4,0(x12) + 800047d8: 01c20c63 beq x4,x28,800047f0 + 800047dc: 524032ef jal x5,80007d00 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 80015dbe .word 0x80015dbe + 800047ec: 00000000 .word 0x00000000 + 800047f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000000fffffffe + 800047f4: 0004b903 ld x18,0(x9) + 800047f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000001 + 800047fc: 0004bd03 ld x26,0(x9) + 80004800: 00848493 addi x9,x9,8 + +0000000080004804 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64ks2 x27, x18, x26 # perform operation + 80004804: 7fa90db3 aes64ks2 x27,x18,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004808: 00063203 ld x4,0(x12) + 8000480c: 01b20c63 beq x4,x27,80004824 + 80004810: 4f0032ef jal x5,80007d00 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 80015e22 .word 0x80015e22 + 80004820: 00000000 .word 0x00000000 + 80004824: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000000 + 80004828: 0004bb83 ld x23,0(x9) + 8000482c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x0000000000000000 + 80004830: 0004ba03 ld x20,0(x9) + 80004834: 00848493 addi x9,x9,8 + +0000000080004838 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64ks2 x24, x23, x20 # perform operation + 80004838: 7f4b8c33 aes64ks2 x24,x23,x20 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000483c: 00063203 ld x4,0(x12) + 80004840: 01820c63 beq x4,x24,80004858 + 80004844: 4bc032ef jal x5,80007d00 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 80015e86 .word 0x80015e86 + 80004854: 00000000 .word 0x00000000 + 80004858: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000000 + 8000485c: 0004b983 ld x19,0(x9) + 80004860: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000001 + 80004864: 0004b703 ld x14,0(x9) + 80004868: 00848493 addi x9,x9,8 + +000000008000486c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64ks2 x27, x19, x14 # perform operation + 8000486c: 7ee98db3 aes64ks2 x27,x19,x14 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004870: 00063203 ld x4,0(x12) + 80004874: 01b20c63 beq x4,x27,8000488c + 80004878: 488032ef jal x5,80007d00 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 80015ee3 .word 0x80015ee3 + 80004888: 00000000 .word 0x00000000 + 8000488c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000100000000 + 80004890: 0004bf03 ld x30,0(x9) + 80004894: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80004898: 0004b583 ld x11,0(x9) + 8000489c: 00848493 addi x9,x9,8 + +00000000800048a0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64ks2 x18, x30, x11 # perform operation + 800048a0: 7ebf0933 aes64ks2 x18,x30,x11 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a4: 00063203 ld x4,0(x12) + 800048a8: 01220c63 beq x4,x18,800048c0 + 800048ac: 454032ef jal x5,80007d00 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 80015f40 .word 0x80015f40 + 800048bc: 00000000 .word 0x00000000 + 800048c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000100000000 + 800048c4: 0004be03 ld x28,0(x9) + 800048c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x8000000000000000 + 800048cc: 0004b083 ld x1,0(x9) + 800048d0: 00848493 addi x9,x9,8 + +00000000800048d4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64ks2 x2, x28, x1 # perform operation + 800048d4: 7e1e0133 aes64ks2 x2,x28,x1 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d8: 00063203 ld x4,0(x12) + 800048dc: 00220c63 beq x4,x2,800048f4 + 800048e0: 420032ef jal x5,80007d00 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 80015f9d .word 0x80015f9d + 800048f0: 00000000 .word 0x00000000 + 800048f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 800048f8: 0004b583 ld x11,0(x9) + 800048fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000001 + 80004900: 0004b783 ld x15,0(x9) + 80004904: 00848493 addi x9,x9,8 + +0000000080004908 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64ks2 x18, x11, x15 # perform operation + 80004908: 7ef58933 aes64ks2 x18,x11,x15 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 8000490c: 00063203 ld x4,0(x12) + 80004910: 01220c63 beq x4,x18,80004928 + 80004914: 3ec032ef jal x5,80007d00 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 80016009 .word 0x80016009 + 80004924: 00000000 .word 0x00000000 + 80004928: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000100000000 + 8000492c: 0004be83 ld x29,0(x9) + 80004930: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80004934: 0004b983 ld x19,0(x9) + 80004938: 00848493 addi x9,x9,8 + +000000008000493c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64ks2 x31, x29, x19 # perform operation + 8000493c: 7f3e8fb3 aes64ks2 x31,x29,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004940: 00063203 ld x4,0(x12) + 80004944: 01f20c63 beq x4,x31,8000495c + 80004948: 3b8032ef jal x5,80007d00 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 80016075 .word 0x80016075 + 80004958: 00000000 .word 0x00000000 + 8000495c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000100000000 + 80004960: 0004bc03 ld x24,0(x9) + 80004964: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80004968: 0004be83 ld x29,0(x9) + 8000496c: 00848493 addi x9,x9,8 + +0000000080004970 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64ks2 x18, x24, x29 # perform operation + 80004970: 7fdc0933 aes64ks2 x18,x24,x29 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004974: 00063203 ld x4,0(x12) + 80004978: 01220c63 beq x4,x18,80004990 + 8000497c: 384032ef jal x5,80007d00 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 800160e1 .word 0x800160e1 + 8000498c: 00000000 .word 0x00000000 + 80004990: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 80004994: 0004b583 ld x11,0(x9) + 80004998: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xffffffffffffffff + 8000499c: 0004b983 ld x19,0(x9) + 800049a0: 00848493 addi x9,x9,8 + +00000000800049a4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64ks2 x7, x11, x19 # perform operation + 800049a4: 7f3583b3 aes64ks2 x7,x11,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a8: 00063203 ld x4,0(x12) + 800049ac: 00720c63 beq x4,x7,800049c4 + 800049b0: 350032ef jal x5,80007d00 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 8001614d .word 0x8001614d + 800049c0: 00000000 .word 0x00000000 + 800049c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000100000000 + 800049c8: 0004b503 ld x10,0(x9) + 800049cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffffffffffe + 800049d0: 0004bc83 ld x25,0(x9) + 800049d4: 00848493 addi x9,x9,8 + +00000000800049d8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64ks2 x6, x10, x25 # perform operation + 800049d8: 7f950333 aes64ks2 x6,x10,x25 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049dc: 00063203 ld x4,0(x12) + 800049e0: 00620c63 beq x4,x6,800049f8 + 800049e4: 31c032ef jal x5,80007d00 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 800161b9 .word 0x800161b9 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000000 + 800049fc: 0004b883 ld x17,0(x9) + 80004a00: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80004a04: 0004b783 ld x15,0(x9) + 80004a08: 00848493 addi x9,x9,8 + +0000000080004a0c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64ks2 x7, x17, x15 # perform operation + 80004a0c: 7ef883b3 aes64ks2 x7,x17,x15 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a10: 00063203 ld x4,0(x12) + 80004a14: 00720c63 beq x4,x7,80004a2c + 80004a18: 2e8032ef jal x5,80007d00 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 80016225 .word 0x80016225 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000000 + 80004a30: 0004b883 ld x17,0(x9) + 80004a34: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80004a38: 0004b683 ld x13,0(x9) + 80004a3c: 00848493 addi x9,x9,8 + +0000000080004a40 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x11, x17, x13 # perform operation + 80004a40: 7ed885b3 aes64ks2 x11,x17,x13 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a44: 00063203 ld x4,0(x12) + 80004a48: 00b20c63 beq x4,x11,80004a60 + 80004a4c: 2b4032ef jal x5,80007d00 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 80016291 .word 0x80016291 + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 80004a64: 0004b583 ld x11,0(x9) + 80004a68: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x5555555555555555 + 80004a6c: 0004b303 ld x6,0(x9) + 80004a70: 00848493 addi x9,x9,8 + +0000000080004a74 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64ks2 x30, x11, x6 # perform operation + 80004a74: 7e658f33 aes64ks2 x30,x11,x6 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a78: 00063203 ld x4,0(x12) + 80004a7c: 01e20c63 beq x4,x30,80004a94 + 80004a80: 280032ef jal x5,80007d00 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 800162fd .word 0x800162fd + 80004a90: 00000000 .word 0x00000000 + 80004a94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000100000000 + 80004a98: 0004b783 ld x15,0(x9) + 80004a9c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x00000000ffffffff + 80004aa0: 0004b383 ld x7,0(x9) + 80004aa4: 00848493 addi x9,x9,8 + +0000000080004aa8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64ks2 x21, x15, x7 # perform operation + 80004aa8: 7e778ab3 aes64ks2 x21,x15,x7 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aac: 00063203 ld x4,0(x12) + 80004ab0: 01520c63 beq x4,x21,80004ac8 + 80004ab4: 24c032ef jal x5,80007d00 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 80016369 .word 0x80016369 + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x0000000100000000 + 80004acc: 0004bb03 ld x22,0(x9) + 80004ad0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000fffffffe + 80004ad4: 0004be03 ld x28,0(x9) + 80004ad8: 00848493 addi x9,x9,8 + +0000000080004adc : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64ks2 x19, x22, x28 # perform operation + 80004adc: 7fcb09b3 aes64ks2 x19,x22,x28 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae0: 00063203 ld x4,0(x12) + 80004ae4: 01320c63 beq x4,x19,80004afc + 80004ae8: 218032ef jal x5,80007d00 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 800163cd .word 0x800163cd + 80004af8: 00000000 .word 0x00000000 + 80004afc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000100000000 + 80004b00: 0004bf03 ld x30,0(x9) + 80004b04: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000100000000 + 80004b08: 0004bb83 ld x23,0(x9) + 80004b0c: 00848493 addi x9,x9,8 + +0000000080004b10 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64ks2 x14, x30, x23 # perform operation + 80004b10: 7f7f0733 aes64ks2 x14,x30,x23 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b14: 00063203 ld x4,0(x12) + 80004b18: 00e20c63 beq x4,x14,80004b30 + 80004b1c: 1e4032ef jal x5,80007d00 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 80016431 .word 0x80016431 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x0000000100000000 + 80004b34: 0004b303 ld x6,0(x9) + 80004b38: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000100000001 + 80004b3c: 0004bf83 ld x31,0(x9) + 80004b40: 00848493 addi x9,x9,8 + +0000000080004b44 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64ks2 x22, x6, x31 # perform operation + 80004b44: 7ff30b33 aes64ks2 x22,x6,x31 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b48: 00063203 ld x4,0(x12) + 80004b4c: 01620c63 beq x4,x22,80004b64 + 80004b50: 1b0032ef jal x5,80007d00 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 80016496 .word 0x80016496 + 80004b60: 00000000 .word 0x00000000 + 80004b64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000001 + 80004b68: 0004bb83 ld x23,0(x9) + 80004b6c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x0000000000000000 + 80004b70: 0004ba83 ld x21,0(x9) + 80004b74: 00848493 addi x9,x9,8 + +0000000080004b78 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64ks2 x28, x23, x21 # perform operation + 80004b78: 7f5b8e33 aes64ks2 x28,x23,x21 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b7c: 00063203 ld x4,0(x12) + 80004b80: 01c20c63 beq x4,x28,80004b98 + 80004b84: 17c032ef jal x5,80007d00 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 800164fb .word 0x800164fb + 80004b94: 00000000 .word 0x00000000 + 80004b98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000001 + 80004b9c: 0004bb83 ld x23,0(x9) + 80004ba0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000001 + 80004ba4: 0004b983 ld x19,0(x9) + 80004ba8: 00848493 addi x9,x9,8 + +0000000080004bac : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64ks2 x15, x23, x19 # perform operation + 80004bac: 7f3b87b3 aes64ks2 x15,x23,x19 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb0: 00063203 ld x4,0(x12) + 80004bb4: 00f20c63 beq x4,x15,80004bcc + 80004bb8: 148032ef jal x5,80007d00 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 80016558 .word 0x80016558 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x0000000100000001 + 80004bd0: 0004b103 ld x2,0(x9) + 80004bd4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000002 + 80004bd8: 0004bc03 ld x24,0(x9) + 80004bdc: 00848493 addi x9,x9,8 + +0000000080004be0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64ks2 x11, x2, x24 # perform operation + 80004be0: 7f8105b3 aes64ks2 x11,x2,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be4: 00063203 ld x4,0(x12) + 80004be8: 00b20c63 beq x4,x11,80004c00 + 80004bec: 114032ef jal x5,80007d00 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 800165b5 .word 0x800165b5 + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000100000001 + 80004c04: 0004bf83 ld x31,0(x9) + 80004c08: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x8000000000000000 + 80004c0c: 0004b883 ld x17,0(x9) + 80004c10: 00848493 addi x9,x9,8 + +0000000080004c14 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64ks2 x14, x31, x17 # perform operation + 80004c14: 7f1f8733 aes64ks2 x14,x31,x17 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c18: 00063203 ld x4,0(x12) + 80004c1c: 00e20c63 beq x4,x14,80004c34 + 80004c20: 0e0032ef jal x5,80007d00 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 80016612 .word 0x80016612 + 80004c30: 00000000 .word 0x00000000 + 80004c34: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000001 + 80004c38: 0004b883 ld x17,0(x9) + 80004c3c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x8000000000000001 + 80004c40: 0004b503 ld x10,0(x9) + 80004c44: 00848493 addi x9,x9,8 + +0000000080004c48 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64ks2 x16, x17, x10 # perform operation + 80004c48: 7ea88833 aes64ks2 x16,x17,x10 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c4c: 00063203 ld x4,0(x12) + 80004c50: 01020c63 beq x4,x16,80004c68 + 80004c54: 0ac032ef jal x5,80007d00 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 8001667e .word 0x8001667e + 80004c64: 00000000 .word 0x00000000 + 80004c68: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0000000100000001 + 80004c6c: 0004b403 ld x8,0(x9) + 80004c70: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffffffffffff + 80004c74: 0004b703 ld x14,0(x9) + 80004c78: 00848493 addi x9,x9,8 + +0000000080004c7c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64ks2 x1, x8, x14 # perform operation + 80004c7c: 7ee400b3 aes64ks2 x1,x8,x14 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c80: 00063203 ld x4,0(x12) + 80004c84: 00120c63 beq x4,x1,80004c9c + 80004c88: 078032ef jal x5,80007d00 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 800166ea .word 0x800166ea + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000100000001 + 80004ca0: 0004b783 ld x15,0(x9) + 80004ca4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80004ca8: 0004b083 ld x1,0(x9) + 80004cac: 00848493 addi x9,x9,8 + +0000000080004cb0 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64ks2 x30, x15, x1 # perform operation + 80004cb0: 7e178f33 aes64ks2 x30,x15,x1 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb4: 00063203 ld x4,0(x12) + 80004cb8: 01e20c63 beq x4,x30,80004cd0 + 80004cbc: 044032ef jal x5,80007d00 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 80016756 .word 0x80016756 + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000001 + 80004cd4: 0004b583 ld x11,0(x9) + 80004cd8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffffffffffff + 80004cdc: 0004b303 ld x6,0(x9) + 80004ce0: 00848493 addi x9,x9,8 + +0000000080004ce4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64ks2 x14, x11, x6 # perform operation + 80004ce4: 7e658733 aes64ks2 x14,x11,x6 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce8: 00063203 ld x4,0(x12) + 80004cec: 00e20c63 beq x4,x14,80004d04 + 80004cf0: 010032ef jal x5,80007d00 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 800167c2 .word 0x800167c2 + 80004d00: 00000000 .word 0x00000000 + 80004d04: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000100000001 + 80004d08: 0004b903 ld x18,0(x9) + 80004d0c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffffffffffe + 80004d10: 0004be83 ld x29,0(x9) + 80004d14: 00848493 addi x9,x9,8 + +0000000080004d18 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64ks2 x8, x18, x29 # perform operation + 80004d18: 7fd90433 aes64ks2 x8,x18,x29 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d1c: 00063203 ld x4,0(x12) + 80004d20: 00820c63 beq x4,x8,80004d38 + 80004d24: 7dd022ef jal x5,80007d00 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 8001682e .word 0x8001682e + 80004d34: 00000000 .word 0x00000000 + 80004d38: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000100000001 + 80004d3c: 0004b503 ld x10,0(x9) + 80004d40: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80004d44: 0004b383 ld x7,0(x9) + 80004d48: 00848493 addi x9,x9,8 + +0000000080004d4c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64ks2 x6, x10, x7 # perform operation + 80004d4c: 7e750333 aes64ks2 x6,x10,x7 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d50: 00063203 ld x4,0(x12) + 80004d54: 00620c63 beq x4,x6,80004d6c + 80004d58: 7a9022ef jal x5,80007d00 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 8001689a .word 0x8001689a + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000001 + 80004d70: 0004b983 ld x19,0(x9) + 80004d74: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80004d78: 0004be83 ld x29,0(x9) + 80004d7c: 00848493 addi x9,x9,8 + +0000000080004d80 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x14, x19, x29 # perform operation + 80004d80: 7fd98733 aes64ks2 x14,x19,x29 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d84: 00063203 ld x4,0(x12) + 80004d88: 00e20c63 beq x4,x14,80004da0 + 80004d8c: 775022ef jal x5,80007d00 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 80016906 .word 0x80016906 + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000001 + 80004da4: 0004b583 ld x11,0(x9) + 80004da8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x5555555555555555 + 80004dac: 0004bf83 ld x31,0(x9) + 80004db0: 00848493 addi x9,x9,8 + +0000000080004db4 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64ks2 x23, x11, x31 # perform operation + 80004db4: 7ff58bb3 aes64ks2 x23,x11,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db8: 00063203 ld x4,0(x12) + 80004dbc: 01720c63 beq x4,x23,80004dd4 + 80004dc0: 741022ef jal x5,80007d00 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 80016972 .word 0x80016972 + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x0000000100000001 + 80004dd8: 0004b303 ld x6,0(x9) + 80004ddc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x00000000ffffffff + 80004de0: 0004b403 ld x8,0(x9) + 80004de4: 00848493 addi x9,x9,8 + +0000000080004de8 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64ks2 x10, x6, x8 # perform operation + 80004de8: 7e830533 aes64ks2 x10,x6,x8 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dec: 00063203 ld x4,0(x12) + 80004df0: 00a20c63 beq x4,x10,80004e08 + 80004df4: 70d022ef jal x5,80007d00 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 800169de .word 0x800169de + 80004e04: 00000000 .word 0x00000000 + 80004e08: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000001 + 80004e0c: 0004b883 ld x17,0(x9) + 80004e10: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80004e14: 0004bd03 ld x26,0(x9) + 80004e18: 00848493 addi x9,x9,8 + +0000000080004e1c : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64ks2 x21, x17, x26 # perform operation + 80004e1c: 7fa88ab3 aes64ks2 x21,x17,x26 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e20: 00063203 ld x4,0(x12) + 80004e24: 01520c63 beq x4,x21,80004e3c + 80004e28: 6d9022ef jal x5,80007d00 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 80016a42 .word 0x80016a42 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000001 + 80004e40: 0004b983 ld x19,0(x9) + 80004e44: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000000 + 80004e48: 0004b803 ld x16,0(x9) + 80004e4c: 00848493 addi x9,x9,8 + +0000000080004e50 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64ks2 x17, x19, x16 # perform operation + 80004e50: 7f0988b3 aes64ks2 x17,x19,x16 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e54: 00063203 ld x4,0(x12) + 80004e58: 01120c63 beq x4,x17,80004e70 + 80004e5c: 6a5022ef jal x5,80007d00 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 80016aa6 .word 0x80016aa6 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x0000000100000001 + 80004e74: 0004b703 ld x14,0(x9) + 80004e78: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000100000001 + 80004e7c: 0004bc83 ld x25,0(x9) + 80004e80: 00848493 addi x9,x9,8 + +0000000080004e84 : +Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64ks2 x10, x14, x25 # perform operation + 80004e84: 7f970533 aes64ks2 x10,x14,x25 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zknd_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e88: 00063203 ld x4,0(x12) + 80004e8c: 00a20c63 beq x4,x10,80004ea4 + 80004e90: 671022ef jal x5,80007d00 + 80004e94: 80004e84 .word 0x80004e84 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 80016b0b .word 0x80016b0b + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xbcded3641d0c3b8a + 80004ea8: 0004b003 ld x0,0(x9) + 80004eac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x5480ff2117a2832b + 80004eb0: 0004b003 ld x0,0(x9) + 80004eb4: 00848493 addi x9,x9,8 + +0000000080004eb8 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b0: + aes64ks2 x18, x0, x0 # perform operation + 80004eb8: 7e000933 aes64ks2 x18,x0,x0 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknd_aes64ks2_cg_cmp_rs1_rs2_b0, Zknd_aes64ks2_cg_cmp_rs1_rs2_b0_str) + 80004ebc: 00063203 ld x4,0(x12) + 80004ec0: 01220c63 beq x4,x18,80004ed8 + 80004ec4: 63d022ef jal x5,80007d00 + 80004ec8: 80004eb8 .word 0x80004eb8 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 80016b70 .word 0x80016b70 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x77e5ffe2b0baae74 + 80004edc: 0004b083 ld x1,0(x9) + 80004ee0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x8167fb0e796fdeb0 + 80004ee4: 0004b083 ld x1,0(x9) + 80004ee8: 00848493 addi x9,x9,8 + +0000000080004eec : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b1: + aes64ks2 x16, x1, x1 # perform operation + 80004eec: 7e108833 aes64ks2 x16,x1,x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknd_aes64ks2_cg_cmp_rs1_rs2_b1, Zknd_aes64ks2_cg_cmp_rs1_rs2_b1_str) + 80004ef0: 00063203 ld x4,0(x12) + 80004ef4: 01020c63 beq x4,x16,80004f0c + 80004ef8: 609022ef jal x5,80007d00 + 80004efc: 80004eec .word 0x80004eec + 80004f00: 00000000 .word 0x00000000 + 80004f04: 80016bac .word 0x80016bac + 80004f08: 00000000 .word 0x00000000 + 80004f0c: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xdda4bdafb9d56048 + 80004f10: 0004b103 ld x2,0(x9) + 80004f14: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xc442c971ae00c8b8 + 80004f18: 0004b103 ld x2,0(x9) + 80004f1c: 00848493 addi x9,x9,8 + +0000000080004f20 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b2: + aes64ks2 x13, x2, x2 # perform operation + 80004f20: 7e2106b3 aes64ks2 x13,x2,x2 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknd_aes64ks2_cg_cmp_rs1_rs2_b2, Zknd_aes64ks2_cg_cmp_rs1_rs2_b2_str) + 80004f24: 00063203 ld x4,0(x12) + 80004f28: 00d20c63 beq x4,x13,80004f40 + 80004f2c: 5d5022ef jal x5,80007d00 + 80004f30: 80004f20 .word 0x80004f20 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 80016be8 .word 0x80016be8 + 80004f3c: 00000000 .word 0x00000000 + 80004f40: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xb6f5f7b3ad5acd30 + 80004f44: 0004b183 ld x3,0(x9) + 80004f48: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x06de1f6643e8898a + 80004f4c: 0004b183 ld x3,0(x9) + 80004f50: 00848493 addi x9,x9,8 + +0000000080004f54 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b3: + aes64ks2 x26, x3, x3 # perform operation + 80004f54: 7e318d33 aes64ks2 x26,x3,x3 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknd_aes64ks2_cg_cmp_rs1_rs2_b3, Zknd_aes64ks2_cg_cmp_rs1_rs2_b3_str) + 80004f58: 00063203 ld x4,0(x12) + 80004f5c: 01a20c63 beq x4,x26,80004f74 + 80004f60: 5a1022ef jal x5,80007d00 + 80004f64: 80004f54 .word 0x80004f54 + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 80016c24 .word 0x80016c24 + 80004f70: 00000000 .word 0x00000000 + 80004f74: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f78: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f7c: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xeeda3778d435ce8d + 80004f80: 0004b203 ld x4,0(x9) + 80004f84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x6220b01975b244b6 + 80004f88: 0004b203 ld x4,0(x9) + 80004f8c: 00848493 addi x9,x9,8 + +0000000080004f90 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b4: + aes64ks2 x29, x4, x4 # perform operation + 80004f90: 7e420eb3 aes64ks2 x29,x4,x4 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zknd_aes64ks2_cg_cmp_rs1_rs2_b4, Zknd_aes64ks2_cg_cmp_rs1_rs2_b4_str) + 80004f94: 00063383 ld x7,0(x12) + 80004f98: 01d38c63 beq x7,x29,80004fb0 + 80004f9c: 57d0246f jal x8,80007d18 + 80004fa0: 80004f90 .word 0x80004f90 + 80004fa4: 00000000 .word 0x00000000 + 80004fa8: 80016c60 .word 0x80016c60 + 80004fac: 00000000 .word 0x00000000 + 80004fb0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xcc2a544a520b67df + 80004fb4: 0004b283 ld x5,0(x9) + 80004fb8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x7450311384de2873 + 80004fbc: 0004b283 ld x5,0(x9) + 80004fc0: 00848493 addi x9,x9,8 + +0000000080004fc4 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b5: + aes64ks2 x30, x5, x5 # perform operation + 80004fc4: 7e528f33 aes64ks2 x30,x5,x5 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zknd_aes64ks2_cg_cmp_rs1_rs2_b5, Zknd_aes64ks2_cg_cmp_rs1_rs2_b5_str) + 80004fc8: 00063383 ld x7,0(x12) + 80004fcc: 01e38c63 beq x7,x30,80004fe4 + 80004fd0: 5490246f jal x8,80007d18 + 80004fd4: 80004fc4 .word 0x80004fc4 + 80004fd8: 00000000 .word 0x00000000 + 80004fdc: 80016c9c .word 0x80016c9c + 80004fe0: 00000000 .word 0x00000000 + 80004fe4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x6ea802ea32d0437c + 80004fe8: 0004b303 ld x6,0(x9) + 80004fec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xc2f35a1a2b9f9162 + 80004ff0: 0004b303 ld x6,0(x9) + 80004ff4: 00848493 addi x9,x9,8 + +0000000080004ff8 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b6: + aes64ks2 x16, x6, x6 # perform operation + 80004ff8: 7e630833 aes64ks2 x16,x6,x6 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknd_aes64ks2_cg_cmp_rs1_rs2_b6, Zknd_aes64ks2_cg_cmp_rs1_rs2_b6_str) + 80004ffc: 00063383 ld x7,0(x12) + 80005000: 01038c63 beq x7,x16,80005018 + 80005004: 5150246f jal x8,80007d18 + 80005008: 80004ff8 .word 0x80004ff8 + 8000500c: 00000000 .word 0x00000000 + 80005010: 80016cd8 .word 0x80016cd8 + 80005014: 00000000 .word 0x00000000 + 80005018: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000501c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005020: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xbb906de45d0cd0d9 + 80005024: 0004b383 ld x7,0(x9) + 80005028: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x6d4eb6d23071aea0 + 8000502c: 0004b383 ld x7,0(x9) + 80005030: 00848493 addi x9,x9,8 + +0000000080005034 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b7: + aes64ks2 x8, x7, x7 # perform operation + 80005034: 7e738433 aes64ks2 x8,x7,x7 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zknd_aes64ks2_cg_cmp_rs1_rs2_b7, Zknd_aes64ks2_cg_cmp_rs1_rs2_b7_str) + 80005038: 00063683 ld x13,0(x12) + 8000503c: 00868c63 beq x13,x8,80005054 + 80005040: 5010276f jal x14,80007d40 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 80016d14 .word 0x80016d14 + 80005050: 00000000 .word 0x00000000 + 80005054: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xd7b2febaf355bd3f + 80005058: 0004b403 ld x8,0(x9) + 8000505c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x6b9e59f96bed1dc3 + 80005060: 0004b403 ld x8,0(x9) + 80005064: 00848493 addi x9,x9,8 + +0000000080005068 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b8: + aes64ks2 x21, x8, x8 # perform operation + 80005068: 7e840ab3 aes64ks2 x21,x8,x8 + # Check if x21 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x21, Zknd_aes64ks2_cg_cmp_rs1_rs2_b8, Zknd_aes64ks2_cg_cmp_rs1_rs2_b8_str) + 8000506c: 00063683 ld x13,0(x12) + 80005070: 01568c63 beq x13,x21,80005088 + 80005074: 4cd0276f jal x14,80007d40 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 80016d50 .word 0x80016d50 + 80005084: 00000000 .word 0x00000000 + 80005088: 00860613 addi x12,x12,8 + + mv x24, x9 # switch data pointer register to avoid conflict with test + 8000508c: 00048c13 addi x24,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xa2c400e2dbff950b + 80005090: 000c3483 ld x9,0(x24) + 80005094: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x117e8e2ae3db2965 + 80005098: 000c3483 ld x9,0(x24) + 8000509c: 008c0c13 addi x24,x24,8 + +00000000800050a0 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b9: + aes64ks2 x26, x9, x9 # perform operation + 800050a0: 7e948d33 aes64ks2 x26,x9,x9 + # Check if x26 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x26, Zknd_aes64ks2_cg_cmp_rs1_rs2_b9, Zknd_aes64ks2_cg_cmp_rs1_rs2_b9_str) + 800050a4: 00063683 ld x13,0(x12) + 800050a8: 01a68c63 beq x13,x26,800050c0 + 800050ac: 4950276f jal x14,80007d40 + 800050b0: 800050a0 .word 0x800050a0 + 800050b4: 00000000 .word 0x00000000 + 800050b8: 80016d8c .word 0x80016d8c + 800050bc: 00000000 .word 0x00000000 + 800050c0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x35e42ee0d59b6a8d + 800050c4: 000c3503 ld x10,0(x24) + 800050c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xfc78511995b652cc + 800050cc: 000c3503 ld x10,0(x24) + 800050d0: 008c0c13 addi x24,x24,8 + +00000000800050d4 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b10: + aes64ks2 x9, x10, x10 # perform operation + 800050d4: 7ea504b3 aes64ks2 x9,x10,x10 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zknd_aes64ks2_cg_cmp_rs1_rs2_b10, Zknd_aes64ks2_cg_cmp_rs1_rs2_b10_str) + 800050d8: 00063683 ld x13,0(x12) + 800050dc: 00968c63 beq x13,x9,800050f4 + 800050e0: 4610276f jal x14,80007d40 + 800050e4: 800050d4 .word 0x800050d4 + 800050e8: 00000000 .word 0x00000000 + 800050ec: 80016dc8 .word 0x80016dc8 + 800050f0: 00000000 .word 0x00000000 + 800050f4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x70d5703c4fd2deec + 800050f8: 000c3583 ld x11,0(x24) + 800050fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x7886097dd1cd24e1 + 80005100: 000c3583 ld x11,0(x24) + 80005104: 008c0c13 addi x24,x24,8 + +0000000080005108 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b11: + aes64ks2 x16, x11, x11 # perform operation + 80005108: 7eb58833 aes64ks2 x16,x11,x11 + # Check if x16 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x16, Zknd_aes64ks2_cg_cmp_rs1_rs2_b11, Zknd_aes64ks2_cg_cmp_rs1_rs2_b11_str) + 8000510c: 00063683 ld x13,0(x12) + 80005110: 01068c63 beq x13,x16,80005128 + 80005114: 42d0276f jal x14,80007d40 + 80005118: 80005108 .word 0x80005108 + 8000511c: 00000000 .word 0x00000000 + 80005120: 80016e05 .word 0x80016e05 + 80005124: 00000000 .word 0x00000000 + 80005128: 00860613 addi x12,x12,8 + + mv x28, x12 # switch signature pointer register to avoid conflict with test + 8000512c: 00060e13 addi x28,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x5fff7608984a090c + 80005130: 000c3603 ld x12,0(x24) + 80005134: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xe43fe1db2fc5c984 + 80005138: 000c3603 ld x12,0(x24) + 8000513c: 008c0c13 addi x24,x24,8 + +0000000080005140 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b12: + aes64ks2 x17, x12, x12 # perform operation + 80005140: 7ec608b3 aes64ks2 x17,x12,x12 + # Check if x17 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x17, Zknd_aes64ks2_cg_cmp_rs1_rs2_b12, Zknd_aes64ks2_cg_cmp_rs1_rs2_b12_str) + 80005144: 000e3683 ld x13,0(x28) + 80005148: 01168c63 beq x13,x17,80005160 + 8000514c: 3f50276f jal x14,80007d40 + 80005150: 80005140 .word 0x80005140 + 80005154: 00000000 .word 0x00000000 + 80005158: 80016e42 .word 0x80016e42 + 8000515c: 00000000 .word 0x00000000 + 80005160: 008e0e13 addi x28,x28,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005164: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005168: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x53f0f65e9095e44c + 8000516c: 000c3683 ld x13,0(x24) + 80005170: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x83d3a4722d371872 + 80005174: 000c3683 ld x13,0(x24) + 80005178: 008c0c13 addi x24,x24,8 + +000000008000517c : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b13: + aes64ks2 x18, x13, x13 # perform operation + 8000517c: 7ed68933 aes64ks2 x18,x13,x13 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zknd_aes64ks2_cg_cmp_rs1_rs2_b13, Zknd_aes64ks2_cg_cmp_rs1_rs2_b13_str) + 80005180: 000e3383 ld x7,0(x28) + 80005184: 01238c63 beq x7,x18,8000519c + 80005188: 3910246f jal x8,80007d18 + 8000518c: 8000517c .word 0x8000517c + 80005190: 00000000 .word 0x00000000 + 80005194: 80016e7f .word 0x80016e7f + 80005198: 00000000 .word 0x00000000 + 8000519c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x6b4f5194d0cc012f + 800051a0: 000c3703 ld x14,0(x24) + 800051a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xf64d3f50612863bb + 800051a8: 000c3703 ld x14,0(x24) + 800051ac: 008c0c13 addi x24,x24,8 + +00000000800051b0 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b14: + aes64ks2 x25, x14, x14 # perform operation + 800051b0: 7ee70cb3 aes64ks2 x25,x14,x14 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknd_aes64ks2_cg_cmp_rs1_rs2_b14, Zknd_aes64ks2_cg_cmp_rs1_rs2_b14_str) + 800051b4: 000e3383 ld x7,0(x28) + 800051b8: 01938c63 beq x7,x25,800051d0 + 800051bc: 35d0246f jal x8,80007d18 + 800051c0: 800051b0 .word 0x800051b0 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 80016ebc .word 0x80016ebc + 800051cc: 00000000 .word 0x00000000 + 800051d0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xbe5daab7b533998f + 800051d4: 000c3783 ld x15,0(x24) + 800051d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x4c8a1861a3153fac + 800051dc: 000c3783 ld x15,0(x24) + 800051e0: 008c0c13 addi x24,x24,8 + +00000000800051e4 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b15: + aes64ks2 x31, x15, x15 # perform operation + 800051e4: 7ef78fb3 aes64ks2 x31,x15,x15 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zknd_aes64ks2_cg_cmp_rs1_rs2_b15, Zknd_aes64ks2_cg_cmp_rs1_rs2_b15_str) + 800051e8: 000e3383 ld x7,0(x28) + 800051ec: 01f38c63 beq x7,x31,80005204 + 800051f0: 3290246f jal x8,80007d18 + 800051f4: 800051e4 .word 0x800051e4 + 800051f8: 00000000 .word 0x00000000 + 800051fc: 80016ef9 .word 0x80016ef9 + 80005200: 00000000 .word 0x00000000 + 80005204: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5c5d7b28d8b735d5 + 80005208: 000c3803 ld x16,0(x24) + 8000520c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x2a216a73561e79e7 + 80005210: 000c3803 ld x16,0(x24) + 80005214: 008c0c13 addi x24,x24,8 + +0000000080005218 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b16: + aes64ks2 x3, x16, x16 # perform operation + 80005218: 7f0801b3 aes64ks2 x3,x16,x16 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64ks2_cg_cmp_rs1_rs2_b16, Zknd_aes64ks2_cg_cmp_rs1_rs2_b16_str) + 8000521c: 000e3383 ld x7,0(x28) + 80005220: 00338c63 beq x7,x3,80005238 + 80005224: 2f50246f jal x8,80007d18 + 80005228: 80005218 .word 0x80005218 + 8000522c: 00000000 .word 0x00000000 + 80005230: 80016f36 .word 0x80016f36 + 80005234: 00000000 .word 0x00000000 + 80005238: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xbe2d313e20c5d952 + 8000523c: 000c3883 ld x17,0(x24) + 80005240: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xe910ae1527ae4020 + 80005244: 000c3883 ld x17,0(x24) + 80005248: 008c0c13 addi x24,x24,8 + +000000008000524c : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b17: + aes64ks2 x18, x17, x17 # perform operation + 8000524c: 7f188933 aes64ks2 x18,x17,x17 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zknd_aes64ks2_cg_cmp_rs1_rs2_b17, Zknd_aes64ks2_cg_cmp_rs1_rs2_b17_str) + 80005250: 000e3383 ld x7,0(x28) + 80005254: 01238c63 beq x7,x18,8000526c + 80005258: 2c10246f jal x8,80007d18 + 8000525c: 8000524c .word 0x8000524c + 80005260: 00000000 .word 0x00000000 + 80005264: 80016f73 .word 0x80016f73 + 80005268: 00000000 .word 0x00000000 + 8000526c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0a13eac727eda421 + 80005270: 000c3903 ld x18,0(x24) + 80005274: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x0fe0ceba777b8943 + 80005278: 000c3903 ld x18,0(x24) + 8000527c: 008c0c13 addi x24,x24,8 + +0000000080005280 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b18: + aes64ks2 x20, x18, x18 # perform operation + 80005280: 7f290a33 aes64ks2 x20,x18,x18 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zknd_aes64ks2_cg_cmp_rs1_rs2_b18, Zknd_aes64ks2_cg_cmp_rs1_rs2_b18_str) + 80005284: 000e3383 ld x7,0(x28) + 80005288: 01438c63 beq x7,x20,800052a0 + 8000528c: 28d0246f jal x8,80007d18 + 80005290: 80005280 .word 0x80005280 + 80005294: 00000000 .word 0x00000000 + 80005298: 80016fb0 .word 0x80016fb0 + 8000529c: 00000000 .word 0x00000000 + 800052a0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x53ab9ae42c29a857 + 800052a4: 000c3983 ld x19,0(x24) + 800052a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x217d715356078963 + 800052ac: 000c3983 ld x19,0(x24) + 800052b0: 008c0c13 addi x24,x24,8 + +00000000800052b4 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b19: + aes64ks2 x22, x19, x19 # perform operation + 800052b4: 7f398b33 aes64ks2 x22,x19,x19 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zknd_aes64ks2_cg_cmp_rs1_rs2_b19, Zknd_aes64ks2_cg_cmp_rs1_rs2_b19_str) + 800052b8: 000e3383 ld x7,0(x28) + 800052bc: 01638c63 beq x7,x22,800052d4 + 800052c0: 2590246f jal x8,80007d18 + 800052c4: 800052b4 .word 0x800052b4 + 800052c8: 00000000 .word 0x00000000 + 800052cc: 80016fed .word 0x80016fed + 800052d0: 00000000 .word 0x00000000 + 800052d4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xb598113784738028 + 800052d8: 000c3a03 ld x20,0(x24) + 800052dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x3bf61579505211f1 + 800052e0: 000c3a03 ld x20,0(x24) + 800052e4: 008c0c13 addi x24,x24,8 + +00000000800052e8 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b20: + aes64ks2 x3, x20, x20 # perform operation + 800052e8: 7f4a01b3 aes64ks2 x3,x20,x20 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknd_aes64ks2_cg_cmp_rs1_rs2_b20, Zknd_aes64ks2_cg_cmp_rs1_rs2_b20_str) + 800052ec: 000e3383 ld x7,0(x28) + 800052f0: 00338c63 beq x7,x3,80005308 + 800052f4: 2250246f jal x8,80007d18 + 800052f8: 800052e8 .word 0x800052e8 + 800052fc: 00000000 .word 0x00000000 + 80005300: 8001702a .word 0x8001702a + 80005304: 00000000 .word 0x00000000 + 80005308: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xb825be55b33a48ac + 8000530c: 000c3a83 ld x21,0(x24) + 80005310: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xa46ce535f4444292 + 80005314: 000c3a83 ld x21,0(x24) + 80005318: 008c0c13 addi x24,x24,8 + +000000008000531c : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b21: + aes64ks2 x11, x21, x21 # perform operation + 8000531c: 7f5a85b3 aes64ks2 x11,x21,x21 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zknd_aes64ks2_cg_cmp_rs1_rs2_b21, Zknd_aes64ks2_cg_cmp_rs1_rs2_b21_str) + 80005320: 000e3383 ld x7,0(x28) + 80005324: 00b38c63 beq x7,x11,8000533c + 80005328: 1f10246f jal x8,80007d18 + 8000532c: 8000531c .word 0x8000531c + 80005330: 00000000 .word 0x00000000 + 80005334: 80017067 .word 0x80017067 + 80005338: 00000000 .word 0x00000000 + 8000533c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x2a8c482b3182045c + 80005340: 000c3b03 ld x22,0(x24) + 80005344: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xfa5b8d25f0ef1e1d + 80005348: 000c3b03 ld x22,0(x24) + 8000534c: 008c0c13 addi x24,x24,8 + +0000000080005350 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b22: + aes64ks2 x2, x22, x22 # perform operation + 80005350: 7f6b0133 aes64ks2 x2,x22,x22 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zknd_aes64ks2_cg_cmp_rs1_rs2_b22, Zknd_aes64ks2_cg_cmp_rs1_rs2_b22_str) + 80005354: 000e3383 ld x7,0(x28) + 80005358: 00238c63 beq x7,x2,80005370 + 8000535c: 1bd0246f jal x8,80007d18 + 80005360: 80005350 .word 0x80005350 + 80005364: 00000000 .word 0x00000000 + 80005368: 800170a4 .word 0x800170a4 + 8000536c: 00000000 .word 0x00000000 + 80005370: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xc1e1ecd504dcfd20 + 80005374: 000c3b83 ld x23,0(x24) + 80005378: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0a1ccb2c3b083ecd + 8000537c: 000c3b83 ld x23,0(x24) + 80005380: 008c0c13 addi x24,x24,8 + +0000000080005384 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b23: + aes64ks2 x14, x23, x23 # perform operation + 80005384: 7f7b8733 aes64ks2 x14,x23,x23 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zknd_aes64ks2_cg_cmp_rs1_rs2_b23, Zknd_aes64ks2_cg_cmp_rs1_rs2_b23_str) + 80005388: 000e3383 ld x7,0(x28) + 8000538c: 00e38c63 beq x7,x14,800053a4 + 80005390: 1890246f jal x8,80007d18 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 800170e1 .word 0x800170e1 + 800053a0: 00000000 .word 0x00000000 + 800053a4: 008e0e13 addi x28,x28,8 + + mv x20, x24 # switch data pointer register to avoid conflict with test + 800053a8: 000c0a13 addi x20,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x9ff6150d897e6cc7 + 800053ac: 000a3c03 ld x24,0(x20) + 800053b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xba274d1db605d2bd + 800053b4: 000a3c03 ld x24,0(x20) + 800053b8: 008a0a13 addi x20,x20,8 + +00000000800053bc : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b24: + aes64ks2 x18, x24, x24 # perform operation + 800053bc: 7f8c0933 aes64ks2 x18,x24,x24 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zknd_aes64ks2_cg_cmp_rs1_rs2_b24, Zknd_aes64ks2_cg_cmp_rs1_rs2_b24_str) + 800053c0: 000e3383 ld x7,0(x28) + 800053c4: 01238c63 beq x7,x18,800053dc + 800053c8: 1510246f jal x8,80007d18 + 800053cc: 800053bc .word 0x800053bc + 800053d0: 00000000 .word 0x00000000 + 800053d4: 8001711e .word 0x8001711e + 800053d8: 00000000 .word 0x00000000 + 800053dc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xa471ef4537e8a17b + 800053e0: 000a3c83 ld x25,0(x20) + 800053e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x086d45f489653a0b + 800053e8: 000a3c83 ld x25,0(x20) + 800053ec: 008a0a13 addi x20,x20,8 + +00000000800053f0 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b25: + aes64ks2 x9, x25, x25 # perform operation + 800053f0: 7f9c84b3 aes64ks2 x9,x25,x25 + # Check if x9 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x9, Zknd_aes64ks2_cg_cmp_rs1_rs2_b25, Zknd_aes64ks2_cg_cmp_rs1_rs2_b25_str) + 800053f4: 000e3383 ld x7,0(x28) + 800053f8: 00938c63 beq x7,x9,80005410 + 800053fc: 11d0246f jal x8,80007d18 + 80005400: 800053f0 .word 0x800053f0 + 80005404: 00000000 .word 0x00000000 + 80005408: 8001715b .word 0x8001715b + 8000540c: 00000000 .word 0x00000000 + 80005410: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x26692440861059fb + 80005414: 000a3d03 ld x26,0(x20) + 80005418: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x81935718160ed3e2 + 8000541c: 000a3d03 ld x26,0(x20) + 80005420: 008a0a13 addi x20,x20,8 + +0000000080005424 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b26: + aes64ks2 x19, x26, x26 # perform operation + 80005424: 7fad09b3 aes64ks2 x19,x26,x26 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zknd_aes64ks2_cg_cmp_rs1_rs2_b26, Zknd_aes64ks2_cg_cmp_rs1_rs2_b26_str) + 80005428: 000e3383 ld x7,0(x28) + 8000542c: 01338c63 beq x7,x19,80005444 + 80005430: 0e90246f jal x8,80007d18 + 80005434: 80005424 .word 0x80005424 + 80005438: 00000000 .word 0x00000000 + 8000543c: 80017198 .word 0x80017198 + 80005440: 00000000 .word 0x00000000 + 80005444: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x9d97f7be4389959c + 80005448: 000a3d83 ld x27,0(x20) + 8000544c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x195679fd955b652c + 80005450: 000a3d83 ld x27,0(x20) + 80005454: 008a0a13 addi x20,x20,8 + +0000000080005458 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b27: + aes64ks2 x2, x27, x27 # perform operation + 80005458: 7fbd8133 aes64ks2 x2,x27,x27 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zknd_aes64ks2_cg_cmp_rs1_rs2_b27, Zknd_aes64ks2_cg_cmp_rs1_rs2_b27_str) + 8000545c: 000e3383 ld x7,0(x28) + 80005460: 00238c63 beq x7,x2,80005478 + 80005464: 0b50246f jal x8,80007d18 + 80005468: 80005458 .word 0x80005458 + 8000546c: 00000000 .word 0x00000000 + 80005470: 800171d5 .word 0x800171d5 + 80005474: 00000000 .word 0x00000000 + 80005478: 008e0e13 addi x28,x28,8 + + mv x18, x28 # switch signature pointer register to avoid conflict with test + 8000547c: 000e0913 addi x18,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xf9326c7aed43066e + 80005480: 000a3e03 ld x28,0(x20) + 80005484: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x8b8fc2cd76bb94d7 + 80005488: 000a3e03 ld x28,0(x20) + 8000548c: 008a0a13 addi x20,x20,8 + +0000000080005490 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b28: + aes64ks2 x6, x28, x28 # perform operation + 80005490: 7fce0333 aes64ks2 x6,x28,x28 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zknd_aes64ks2_cg_cmp_rs1_rs2_b28, Zknd_aes64ks2_cg_cmp_rs1_rs2_b28_str) + 80005494: 00093383 ld x7,0(x18) + 80005498: 00638c63 beq x7,x6,800054b0 + 8000549c: 07d0246f jal x8,80007d18 + 800054a0: 80005490 .word 0x80005490 + 800054a4: 00000000 .word 0x00000000 + 800054a8: 80017212 .word 0x80017212 + 800054ac: 00000000 .word 0x00000000 + 800054b0: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x1280fbb724314ead + 800054b4: 000a3e83 ld x29,0(x20) + 800054b8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x508ca9342c841074 + 800054bc: 000a3e83 ld x29,0(x20) + 800054c0: 008a0a13 addi x20,x20,8 + +00000000800054c4 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b29: + aes64ks2 x21, x29, x29 # perform operation + 800054c4: 7fde8ab3 aes64ks2 x21,x29,x29 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zknd_aes64ks2_cg_cmp_rs1_rs2_b29, Zknd_aes64ks2_cg_cmp_rs1_rs2_b29_str) + 800054c8: 00093383 ld x7,0(x18) + 800054cc: 01538c63 beq x7,x21,800054e4 + 800054d0: 0490246f jal x8,80007d18 + 800054d4: 800054c4 .word 0x800054c4 + 800054d8: 00000000 .word 0x00000000 + 800054dc: 8001724f .word 0x8001724f + 800054e0: 00000000 .word 0x00000000 + 800054e4: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x6c723e7810ad9500 + 800054e8: 000a3f03 ld x30,0(x20) + 800054ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x6d2b74a9568869ee + 800054f0: 000a3f03 ld x30,0(x20) + 800054f4: 008a0a13 addi x20,x20,8 + +00000000800054f8 : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b30: + aes64ks2 x17, x30, x30 # perform operation + 800054f8: 7fef08b3 aes64ks2 x17,x30,x30 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zknd_aes64ks2_cg_cmp_rs1_rs2_b30, Zknd_aes64ks2_cg_cmp_rs1_rs2_b30_str) + 800054fc: 00093383 ld x7,0(x18) + 80005500: 01138c63 beq x7,x17,80005518 + 80005504: 0150246f jal x8,80007d18 + 80005508: 800054f8 .word 0x800054f8 + 8000550c: 00000000 .word 0x00000000 + 80005510: 8001728c .word 0x8001728c + 80005514: 00000000 .word 0x00000000 + 80005518: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x54c457aa8716ec75 + 8000551c: 000a3f83 ld x31,0(x20) + 80005520: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xeaa7a807be08cd0e + 80005524: 000a3f83 ld x31,0(x20) + 80005528: 008a0a13 addi x20,x20,8 + +000000008000552c : +Zknd_aes64ks2_cg_cmp_rs1_rs2_b31: + aes64ks2 x24, x31, x31 # perform operation + 8000552c: 7fff8c33 aes64ks2 x24,x31,x31 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zknd_aes64ks2_cg_cmp_rs1_rs2_b31, Zknd_aes64ks2_cg_cmp_rs1_rs2_b31_str) + 80005530: 00093383 ld x7,0(x18) + 80005534: 01838c63 beq x7,x24,8000554c + 80005538: 7e00246f jal x8,80007d18 + 8000553c: 8000552c .word 0x8000552c + 80005540: 00000000 .word 0x00000000 + 80005544: 800172c9 .word 0x800172c9 + 80005548: 00000000 .word 0x00000000 + 8000554c: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x6e326e25616cf8d4 + 80005550: 000a3003 ld x0,0(x20) + 80005554: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xa95fe07ed9ca03c5 + 80005558: 000a3b03 ld x22,0(x20) + 8000555c: 008a0a13 addi x20,x20,8 + +0000000080005560 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b0: + aes64ks2 x0, x0, x22 # perform operation + 80005560: 7f600033 aes64ks2 x0,x0,x22 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zknd_aes64ks2_cg_cmp_rd_rs1_b0, Zknd_aes64ks2_cg_cmp_rd_rs1_b0_str) + 80005564: 00093383 ld x7,0(x18) + 80005568: 00038c63 beq x7,x0,80005580 + 8000556c: 7ac0246f jal x8,80007d18 + 80005570: 80005560 .word 0x80005560 + 80005574: 00000000 .word 0x00000000 + 80005578: 80017306 .word 0x80017306 + 8000557c: 00000000 .word 0x00000000 + 80005580: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xd804564c833e06c5 + 80005584: 000a3083 ld x1,0(x20) + 80005588: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x25e6992d2f45769b + 8000558c: 000a3803 ld x16,0(x20) + 80005590: 008a0a13 addi x20,x20,8 + +0000000080005594 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b1: + aes64ks2 x1, x1, x16 # perform operation + 80005594: 7f0080b3 aes64ks2 x1,x1,x16 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zknd_aes64ks2_cg_cmp_rd_rs1_b1, Zknd_aes64ks2_cg_cmp_rd_rs1_b1_str) + 80005598: 00093383 ld x7,0(x18) + 8000559c: 00138c63 beq x7,x1,800055b4 + 800055a0: 7780246f jal x8,80007d18 + 800055a4: 80005594 .word 0x80005594 + 800055a8: 00000000 .word 0x00000000 + 800055ac: 80017341 .word 0x80017341 + 800055b0: 00000000 .word 0x00000000 + 800055b4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x59d718e8da940e59 + 800055b8: 000a3103 ld x2,0(x20) + 800055bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xd6b6955ae66b590e + 800055c0: 000a3083 ld x1,0(x20) + 800055c4: 008a0a13 addi x20,x20,8 + +00000000800055c8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b2: + aes64ks2 x2, x2, x1 # perform operation + 800055c8: 7e110133 aes64ks2 x2,x2,x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zknd_aes64ks2_cg_cmp_rd_rs1_b2, Zknd_aes64ks2_cg_cmp_rd_rs1_b2_str) + 800055cc: 00093383 ld x7,0(x18) + 800055d0: 00238c63 beq x7,x2,800055e8 + 800055d4: 7440246f jal x8,80007d18 + 800055d8: 800055c8 .word 0x800055c8 + 800055dc: 00000000 .word 0x00000000 + 800055e0: 8001737c .word 0x8001737c + 800055e4: 00000000 .word 0x00000000 + 800055e8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xfc80ac31db3156dd + 800055ec: 000a3183 ld x3,0(x20) + 800055f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x0ab91ab5251b4343 + 800055f4: 000a3003 ld x0,0(x20) + 800055f8: 008a0a13 addi x20,x20,8 + +00000000800055fc : +Zknd_aes64ks2_cg_cmp_rd_rs1_b3: + aes64ks2 x3, x3, x0 # perform operation + 800055fc: 7e0181b3 aes64ks2 x3,x3,x0 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zknd_aes64ks2_cg_cmp_rd_rs1_b3, Zknd_aes64ks2_cg_cmp_rd_rs1_b3_str) + 80005600: 00093383 ld x7,0(x18) + 80005604: 00338c63 beq x7,x3,8000561c + 80005608: 7100246f jal x8,80007d18 + 8000560c: 800055fc .word 0x800055fc + 80005610: 00000000 .word 0x00000000 + 80005614: 800173b7 .word 0x800173b7 + 80005618: 00000000 .word 0x00000000 + 8000561c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xb872711b1231f688 + 80005620: 000a3203 ld x4,0(x20) + 80005624: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x41e705daf56d6269 + 80005628: 000a3783 ld x15,0(x20) + 8000562c: 008a0a13 addi x20,x20,8 + +0000000080005630 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b4: + aes64ks2 x4, x4, x15 # perform operation + 80005630: 7ef20233 aes64ks2 x4,x4,x15 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zknd_aes64ks2_cg_cmp_rd_rs1_b4, Zknd_aes64ks2_cg_cmp_rd_rs1_b4_str) + 80005634: 00093383 ld x7,0(x18) + 80005638: 00438c63 beq x7,x4,80005650 + 8000563c: 6dc0246f jal x8,80007d18 + 80005640: 80005630 .word 0x80005630 + 80005644: 00000000 .word 0x00000000 + 80005648: 800173f2 .word 0x800173f2 + 8000564c: 00000000 .word 0x00000000 + 80005650: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xcf44f76f45fa5f00 + 80005654: 000a3283 ld x5,0(x20) + 80005658: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xfb6476b7ee780c35 + 8000565c: 000a3703 ld x14,0(x20) + 80005660: 008a0a13 addi x20,x20,8 + +0000000080005664 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b5: + aes64ks2 x5, x5, x14 # perform operation + 80005664: 7ee282b3 aes64ks2 x5,x5,x14 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zknd_aes64ks2_cg_cmp_rd_rs1_b5, Zknd_aes64ks2_cg_cmp_rd_rs1_b5_str) + 80005668: 00093383 ld x7,0(x18) + 8000566c: 00538c63 beq x7,x5,80005684 + 80005670: 6a80246f jal x8,80007d18 + 80005674: 80005664 .word 0x80005664 + 80005678: 00000000 .word 0x00000000 + 8000567c: 8001742d .word 0x8001742d + 80005680: 00000000 .word 0x00000000 + 80005684: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x5b5ef4c503de6789 + 80005688: 000a3303 ld x6,0(x20) + 8000568c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5be793962436d5ec + 80005690: 000a3b83 ld x23,0(x20) + 80005694: 008a0a13 addi x20,x20,8 + +0000000080005698 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b6: + aes64ks2 x6, x6, x23 # perform operation + 80005698: 7f730333 aes64ks2 x6,x6,x23 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zknd_aes64ks2_cg_cmp_rd_rs1_b6, Zknd_aes64ks2_cg_cmp_rd_rs1_b6_str) + 8000569c: 00093383 ld x7,0(x18) + 800056a0: 00638c63 beq x7,x6,800056b8 + 800056a4: 6740246f jal x8,80007d18 + 800056a8: 80005698 .word 0x80005698 + 800056ac: 00000000 .word 0x00000000 + 800056b0: 80017468 .word 0x80017468 + 800056b4: 00000000 .word 0x00000000 + 800056b8: 00890913 addi x18,x18,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056c0: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x97e21660213e759a + 800056c4: 000a3383 ld x7,0(x20) + 800056c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x402d9ba02a2666c6 + 800056cc: 000a3603 ld x12,0(x20) + 800056d0: 008a0a13 addi x20,x20,8 + +00000000800056d4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b7: + aes64ks2 x7, x7, x12 # perform operation + 800056d4: 7ec383b3 aes64ks2 x7,x7,x12 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zknd_aes64ks2_cg_cmp_rd_rs1_b7, Zknd_aes64ks2_cg_cmp_rd_rs1_b7_str) + 800056d8: 00093203 ld x4,0(x18) + 800056dc: 00720c63 beq x4,x7,800056f4 + 800056e0: 620022ef jal x5,80007d00 + 800056e4: 800056d4 .word 0x800056d4 + 800056e8: 00000000 .word 0x00000000 + 800056ec: 800174a3 .word 0x800174a3 + 800056f0: 00000000 .word 0x00000000 + 800056f4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x4ba3ad60b3ab106f + 800056f8: 000a3403 ld x8,0(x20) + 800056fc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xa9bee6073f4f30b7 + 80005700: 000a3b03 ld x22,0(x20) + 80005704: 008a0a13 addi x20,x20,8 + +0000000080005708 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b8: + aes64ks2 x8, x8, x22 # perform operation + 80005708: 7f640433 aes64ks2 x8,x8,x22 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zknd_aes64ks2_cg_cmp_rd_rs1_b8, Zknd_aes64ks2_cg_cmp_rd_rs1_b8_str) + 8000570c: 00093203 ld x4,0(x18) + 80005710: 00820c63 beq x4,x8,80005728 + 80005714: 5ec022ef jal x5,80007d00 + 80005718: 80005708 .word 0x80005708 + 8000571c: 00000000 .word 0x00000000 + 80005720: 800174de .word 0x800174de + 80005724: 00000000 .word 0x00000000 + 80005728: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x25f620279058d61b + 8000572c: 000a3483 ld x9,0(x20) + 80005730: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x7c871d5603709932 + 80005734: 000a3083 ld x1,0(x20) + 80005738: 008a0a13 addi x20,x20,8 + +000000008000573c : +Zknd_aes64ks2_cg_cmp_rd_rs1_b9: + aes64ks2 x9, x9, x1 # perform operation + 8000573c: 7e1484b3 aes64ks2 x9,x9,x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zknd_aes64ks2_cg_cmp_rd_rs1_b9, Zknd_aes64ks2_cg_cmp_rd_rs1_b9_str) + 80005740: 00093203 ld x4,0(x18) + 80005744: 00920c63 beq x4,x9,8000575c + 80005748: 5b8022ef jal x5,80007d00 + 8000574c: 8000573c .word 0x8000573c + 80005750: 00000000 .word 0x00000000 + 80005754: 80017519 .word 0x80017519 + 80005758: 00000000 .word 0x00000000 + 8000575c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x996e0f39ee566266 + 80005760: 000a3503 ld x10,0(x20) + 80005764: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x6254a842ed3a62e3 + 80005768: 000a3583 ld x11,0(x20) + 8000576c: 008a0a13 addi x20,x20,8 + +0000000080005770 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b10: + aes64ks2 x10, x10, x11 # perform operation + 80005770: 7eb50533 aes64ks2 x10,x10,x11 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zknd_aes64ks2_cg_cmp_rd_rs1_b10, Zknd_aes64ks2_cg_cmp_rd_rs1_b10_str) + 80005774: 00093203 ld x4,0(x18) + 80005778: 00a20c63 beq x4,x10,80005790 + 8000577c: 584022ef jal x5,80007d00 + 80005780: 80005770 .word 0x80005770 + 80005784: 00000000 .word 0x00000000 + 80005788: 80017554 .word 0x80017554 + 8000578c: 00000000 .word 0x00000000 + 80005790: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xa4748ec2bc7c1e08 + 80005794: 000a3583 ld x11,0(x20) + 80005798: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x1a782c960ab9ec24 + 8000579c: 000a3803 ld x16,0(x20) + 800057a0: 008a0a13 addi x20,x20,8 + +00000000800057a4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b11: + aes64ks2 x11, x11, x16 # perform operation + 800057a4: 7f0585b3 aes64ks2 x11,x11,x16 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zknd_aes64ks2_cg_cmp_rd_rs1_b11, Zknd_aes64ks2_cg_cmp_rd_rs1_b11_str) + 800057a8: 00093203 ld x4,0(x18) + 800057ac: 00b20c63 beq x4,x11,800057c4 + 800057b0: 550022ef jal x5,80007d00 + 800057b4: 800057a4 .word 0x800057a4 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 80017590 .word 0x80017590 + 800057c0: 00000000 .word 0x00000000 + 800057c4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x8c2ae5947360bd37 + 800057c8: 000a3603 ld x12,0(x20) + 800057cc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0c8541d4febab204 + 800057d0: 000a3503 ld x10,0(x20) + 800057d4: 008a0a13 addi x20,x20,8 + +00000000800057d8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b12: + aes64ks2 x12, x12, x10 # perform operation + 800057d8: 7ea60633 aes64ks2 x12,x12,x10 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zknd_aes64ks2_cg_cmp_rd_rs1_b12, Zknd_aes64ks2_cg_cmp_rd_rs1_b12_str) + 800057dc: 00093203 ld x4,0(x18) + 800057e0: 00c20c63 beq x4,x12,800057f8 + 800057e4: 51c022ef jal x5,80007d00 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 800175cc .word 0x800175cc + 800057f4: 00000000 .word 0x00000000 + 800057f8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xf3916711710ac9f0 + 800057fc: 000a3683 ld x13,0(x20) + 80005800: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0xd8ed679fcb9b7e44 + 80005804: 000a3d83 ld x27,0(x20) + 80005808: 008a0a13 addi x20,x20,8 + +000000008000580c : +Zknd_aes64ks2_cg_cmp_rd_rs1_b13: + aes64ks2 x13, x13, x27 # perform operation + 8000580c: 7fb686b3 aes64ks2 x13,x13,x27 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zknd_aes64ks2_cg_cmp_rd_rs1_b13, Zknd_aes64ks2_cg_cmp_rd_rs1_b13_str) + 80005810: 00093203 ld x4,0(x18) + 80005814: 00d20c63 beq x4,x13,8000582c + 80005818: 4e8022ef jal x5,80007d00 + 8000581c: 8000580c .word 0x8000580c + 80005820: 00000000 .word 0x00000000 + 80005824: 80017608 .word 0x80017608 + 80005828: 00000000 .word 0x00000000 + 8000582c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x93468895f6a5fcd2 + 80005830: 000a3703 ld x14,0(x20) + 80005834: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xc739e14f97703978 + 80005838: 000a3f83 ld x31,0(x20) + 8000583c: 008a0a13 addi x20,x20,8 + +0000000080005840 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b14: + aes64ks2 x14, x14, x31 # perform operation + 80005840: 7ff70733 aes64ks2 x14,x14,x31 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zknd_aes64ks2_cg_cmp_rd_rs1_b14, Zknd_aes64ks2_cg_cmp_rd_rs1_b14_str) + 80005844: 00093203 ld x4,0(x18) + 80005848: 00e20c63 beq x4,x14,80005860 + 8000584c: 4b4022ef jal x5,80007d00 + 80005850: 80005840 .word 0x80005840 + 80005854: 00000000 .word 0x00000000 + 80005858: 80017644 .word 0x80017644 + 8000585c: 00000000 .word 0x00000000 + 80005860: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x33d51c2b73e567d3 + 80005864: 000a3783 ld x15,0(x20) + 80005868: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x61dfb9c2a06b8b61 + 8000586c: 000a3e03 ld x28,0(x20) + 80005870: 008a0a13 addi x20,x20,8 + +0000000080005874 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b15: + aes64ks2 x15, x15, x28 # perform operation + 80005874: 7fc787b3 aes64ks2 x15,x15,x28 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zknd_aes64ks2_cg_cmp_rd_rs1_b15, Zknd_aes64ks2_cg_cmp_rd_rs1_b15_str) + 80005878: 00093203 ld x4,0(x18) + 8000587c: 00f20c63 beq x4,x15,80005894 + 80005880: 480022ef jal x5,80007d00 + 80005884: 80005874 .word 0x80005874 + 80005888: 00000000 .word 0x00000000 + 8000588c: 80017680 .word 0x80017680 + 80005890: 00000000 .word 0x00000000 + 80005894: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x4438ca24de46c822 + 80005898: 000a3803 ld x16,0(x20) + 8000589c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x469181c0a1f46351 + 800058a0: 000a3d03 ld x26,0(x20) + 800058a4: 008a0a13 addi x20,x20,8 + +00000000800058a8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b16: + aes64ks2 x16, x16, x26 # perform operation + 800058a8: 7fa80833 aes64ks2 x16,x16,x26 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zknd_aes64ks2_cg_cmp_rd_rs1_b16, Zknd_aes64ks2_cg_cmp_rd_rs1_b16_str) + 800058ac: 00093203 ld x4,0(x18) + 800058b0: 01020c63 beq x4,x16,800058c8 + 800058b4: 44c022ef jal x5,80007d00 + 800058b8: 800058a8 .word 0x800058a8 + 800058bc: 00000000 .word 0x00000000 + 800058c0: 800176bc .word 0x800176bc + 800058c4: 00000000 .word 0x00000000 + 800058c8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xe880ee9902103731 + 800058cc: 000a3883 ld x17,0(x20) + 800058d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xcfd120bc4e5a2995 + 800058d4: 000a3b83 ld x23,0(x20) + 800058d8: 008a0a13 addi x20,x20,8 + +00000000800058dc : +Zknd_aes64ks2_cg_cmp_rd_rs1_b17: + aes64ks2 x17, x17, x23 # perform operation + 800058dc: 7f7888b3 aes64ks2 x17,x17,x23 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zknd_aes64ks2_cg_cmp_rd_rs1_b17, Zknd_aes64ks2_cg_cmp_rd_rs1_b17_str) + 800058e0: 00093203 ld x4,0(x18) + 800058e4: 01120c63 beq x4,x17,800058fc + 800058e8: 418022ef jal x5,80007d00 + 800058ec: 800058dc .word 0x800058dc + 800058f0: 00000000 .word 0x00000000 + 800058f4: 800176f8 .word 0x800176f8 + 800058f8: 00000000 .word 0x00000000 + 800058fc: 00890913 addi x18,x18,8 + + mv x19, x18 # switch signature pointer register to avoid conflict with test + 80005900: 00090993 addi x19,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x1f5be4a935827301 + 80005904: 000a3903 ld x18,0(x20) + 80005908: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0f5a1e6074b2233f + 8000590c: 000a3b83 ld x23,0(x20) + 80005910: 008a0a13 addi x20,x20,8 + +0000000080005914 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b18: + aes64ks2 x18, x18, x23 # perform operation + 80005914: 7f790933 aes64ks2 x18,x18,x23 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknd_aes64ks2_cg_cmp_rd_rs1_b18, Zknd_aes64ks2_cg_cmp_rd_rs1_b18_str) + 80005918: 0009b203 ld x4,0(x19) + 8000591c: 01220c63 beq x4,x18,80005934 + 80005920: 3e0022ef jal x5,80007d00 + 80005924: 80005914 .word 0x80005914 + 80005928: 00000000 .word 0x00000000 + 8000592c: 80017734 .word 0x80017734 + 80005930: 00000000 .word 0x00000000 + 80005934: 00898993 addi x19,x19,8 + + mv x25, x19 # switch signature pointer register to avoid conflict with test + 80005938: 00098c93 addi x25,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x328e057adca50c2a + 8000593c: 000a3983 ld x19,0(x20) + 80005940: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xb010948c99912204 + 80005944: 000a3f83 ld x31,0(x20) + 80005948: 008a0a13 addi x20,x20,8 + +000000008000594c : +Zknd_aes64ks2_cg_cmp_rd_rs1_b19: + aes64ks2 x19, x19, x31 # perform operation + 8000594c: 7ff989b3 aes64ks2 x19,x19,x31 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknd_aes64ks2_cg_cmp_rd_rs1_b19, Zknd_aes64ks2_cg_cmp_rd_rs1_b19_str) + 80005950: 000cb203 ld x4,0(x25) + 80005954: 01320c63 beq x4,x19,8000596c + 80005958: 3a8022ef jal x5,80007d00 + 8000595c: 8000594c .word 0x8000594c + 80005960: 00000000 .word 0x00000000 + 80005964: 80017770 .word 0x80017770 + 80005968: 00000000 .word 0x00000000 + 8000596c: 008c8c93 addi x25,x25,8 + + mv x24, x20 # switch data pointer register to avoid conflict with test + 80005970: 000a0c13 addi x24,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x2cd6e2b205e6fda2 + 80005974: 000c3a03 ld x20,0(x24) + 80005978: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x5d6cb7b3217e7427 + 8000597c: 000c3103 ld x2,0(x24) + 80005980: 008c0c13 addi x24,x24,8 + +0000000080005984 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b20: + aes64ks2 x20, x20, x2 # perform operation + 80005984: 7e2a0a33 aes64ks2 x20,x20,x2 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknd_aes64ks2_cg_cmp_rd_rs1_b20, Zknd_aes64ks2_cg_cmp_rd_rs1_b20_str) + 80005988: 000cb203 ld x4,0(x25) + 8000598c: 01420c63 beq x4,x20,800059a4 + 80005990: 370022ef jal x5,80007d00 + 80005994: 80005984 .word 0x80005984 + 80005998: 00000000 .word 0x00000000 + 8000599c: 800177ac .word 0x800177ac + 800059a0: 00000000 .word 0x00000000 + 800059a4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x970d1af4a02fd434 + 800059a8: 000c3a83 ld x21,0(x24) + 800059ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xde3861b3da12f4cc + 800059b0: 000c3a03 ld x20,0(x24) + 800059b4: 008c0c13 addi x24,x24,8 + +00000000800059b8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b21: + aes64ks2 x21, x21, x20 # perform operation + 800059b8: 7f4a8ab3 aes64ks2 x21,x21,x20 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknd_aes64ks2_cg_cmp_rd_rs1_b21, Zknd_aes64ks2_cg_cmp_rd_rs1_b21_str) + 800059bc: 000cb203 ld x4,0(x25) + 800059c0: 01520c63 beq x4,x21,800059d8 + 800059c4: 33c022ef jal x5,80007d00 + 800059c8: 800059b8 .word 0x800059b8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 800177e8 .word 0x800177e8 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xdbb96117fc936ac4 + 800059dc: 000c3b03 ld x22,0(x24) + 800059e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xa3dcbb3a327b4e90 + 800059e4: 000c3503 ld x10,0(x24) + 800059e8: 008c0c13 addi x24,x24,8 + +00000000800059ec : +Zknd_aes64ks2_cg_cmp_rd_rs1_b22: + aes64ks2 x22, x22, x10 # perform operation + 800059ec: 7eab0b33 aes64ks2 x22,x22,x10 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknd_aes64ks2_cg_cmp_rd_rs1_b22, Zknd_aes64ks2_cg_cmp_rd_rs1_b22_str) + 800059f0: 000cb203 ld x4,0(x25) + 800059f4: 01620c63 beq x4,x22,80005a0c + 800059f8: 308022ef jal x5,80007d00 + 800059fc: 800059ec .word 0x800059ec + 80005a00: 00000000 .word 0x00000000 + 80005a04: 80017824 .word 0x80017824 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xecd6dff15e132c3f + 80005a10: 000c3b83 ld x23,0(x24) + 80005a14: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xb1ca35787d23f467 + 80005a18: 000c3183 ld x3,0(x24) + 80005a1c: 008c0c13 addi x24,x24,8 + +0000000080005a20 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b23: + aes64ks2 x23, x23, x3 # perform operation + 80005a20: 7e3b8bb3 aes64ks2 x23,x23,x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknd_aes64ks2_cg_cmp_rd_rs1_b23, Zknd_aes64ks2_cg_cmp_rd_rs1_b23_str) + 80005a24: 000cb203 ld x4,0(x25) + 80005a28: 01720c63 beq x4,x23,80005a40 + 80005a2c: 2d4022ef jal x5,80007d00 + 80005a30: 80005a20 .word 0x80005a20 + 80005a34: 00000000 .word 0x00000000 + 80005a38: 80017860 .word 0x80017860 + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 008c8c93 addi x25,x25,8 + + mv x15, x24 # switch data pointer register to avoid conflict with test + 80005a44: 000c0793 addi x15,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x01c558f04869e259 + 80005a48: 0007bc03 ld x24,0(x15) + 80005a4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x6a07244329d41936 + 80005a50: 0007bb03 ld x22,0(x15) + 80005a54: 00878793 addi x15,x15,8 + +0000000080005a58 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b24: + aes64ks2 x24, x24, x22 # perform operation + 80005a58: 7f6c0c33 aes64ks2 x24,x24,x22 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknd_aes64ks2_cg_cmp_rd_rs1_b24, Zknd_aes64ks2_cg_cmp_rd_rs1_b24_str) + 80005a5c: 000cb203 ld x4,0(x25) + 80005a60: 01820c63 beq x4,x24,80005a78 + 80005a64: 29c022ef jal x5,80007d00 + 80005a68: 80005a58 .word 0x80005a58 + 80005a6c: 00000000 .word 0x00000000 + 80005a70: 8001789c .word 0x8001789c + 80005a74: 00000000 .word 0x00000000 + 80005a78: 008c8c93 addi x25,x25,8 + + mv x18, x25 # switch signature pointer register to avoid conflict with test + 80005a7c: 000c8913 addi x18,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xa5f1613a628ab2a8 + 80005a80: 0007bc83 ld x25,0(x15) + 80005a84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xd163b197abc82095 + 80005a88: 0007b503 ld x10,0(x15) + 80005a8c: 00878793 addi x15,x15,8 + +0000000080005a90 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b25: + aes64ks2 x25, x25, x10 # perform operation + 80005a90: 7eac8cb3 aes64ks2 x25,x25,x10 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zknd_aes64ks2_cg_cmp_rd_rs1_b25, Zknd_aes64ks2_cg_cmp_rd_rs1_b25_str) + 80005a94: 00093203 ld x4,0(x18) + 80005a98: 01920c63 beq x4,x25,80005ab0 + 80005a9c: 264022ef jal x5,80007d00 + 80005aa0: 80005a90 .word 0x80005a90 + 80005aa4: 00000000 .word 0x00000000 + 80005aa8: 800178d8 .word 0x800178d8 + 80005aac: 00000000 .word 0x00000000 + 80005ab0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x3bcadcaa992d68c3 + 80005ab4: 0007bd03 ld x26,0(x15) + 80005ab8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xe5c5d1e2af4467d7 + 80005abc: 0007b483 ld x9,0(x15) + 80005ac0: 00878793 addi x15,x15,8 + +0000000080005ac4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b26: + aes64ks2 x26, x26, x9 # perform operation + 80005ac4: 7e9d0d33 aes64ks2 x26,x26,x9 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zknd_aes64ks2_cg_cmp_rd_rs1_b26, Zknd_aes64ks2_cg_cmp_rd_rs1_b26_str) + 80005ac8: 00093203 ld x4,0(x18) + 80005acc: 01a20c63 beq x4,x26,80005ae4 + 80005ad0: 230022ef jal x5,80007d00 + 80005ad4: 80005ac4 .word 0x80005ac4 + 80005ad8: 00000000 .word 0x00000000 + 80005adc: 80017914 .word 0x80017914 + 80005ae0: 00000000 .word 0x00000000 + 80005ae4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x2e75265f88c5365e + 80005ae8: 0007bd83 ld x27,0(x15) + 80005aec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x6c48b7e2bf79436d + 80005af0: 0007b083 ld x1,0(x15) + 80005af4: 00878793 addi x15,x15,8 + +0000000080005af8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b27: + aes64ks2 x27, x27, x1 # perform operation + 80005af8: 7e1d8db3 aes64ks2 x27,x27,x1 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zknd_aes64ks2_cg_cmp_rd_rs1_b27, Zknd_aes64ks2_cg_cmp_rd_rs1_b27_str) + 80005afc: 00093203 ld x4,0(x18) + 80005b00: 01b20c63 beq x4,x27,80005b18 + 80005b04: 1fc022ef jal x5,80007d00 + 80005b08: 80005af8 .word 0x80005af8 + 80005b0c: 00000000 .word 0x00000000 + 80005b10: 80017950 .word 0x80017950 + 80005b14: 00000000 .word 0x00000000 + 80005b18: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xe2e9a2d905420a6d + 80005b1c: 0007be03 ld x28,0(x15) + 80005b20: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x626f58c80afecf3a + 80005b24: 0007b503 ld x10,0(x15) + 80005b28: 00878793 addi x15,x15,8 + +0000000080005b2c : +Zknd_aes64ks2_cg_cmp_rd_rs1_b28: + aes64ks2 x28, x28, x10 # perform operation + 80005b2c: 7eae0e33 aes64ks2 x28,x28,x10 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zknd_aes64ks2_cg_cmp_rd_rs1_b28, Zknd_aes64ks2_cg_cmp_rd_rs1_b28_str) + 80005b30: 00093203 ld x4,0(x18) + 80005b34: 01c20c63 beq x4,x28,80005b4c + 80005b38: 1c8022ef jal x5,80007d00 + 80005b3c: 80005b2c .word 0x80005b2c + 80005b40: 00000000 .word 0x00000000 + 80005b44: 8001798c .word 0x8001798c + 80005b48: 00000000 .word 0x00000000 + 80005b4c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xec2ddec47c51ccac + 80005b50: 0007be83 ld x29,0(x15) + 80005b54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xc5f19717f79ea563 + 80005b58: 0007bf83 ld x31,0(x15) + 80005b5c: 00878793 addi x15,x15,8 + +0000000080005b60 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b29: + aes64ks2 x29, x29, x31 # perform operation + 80005b60: 7ffe8eb3 aes64ks2 x29,x29,x31 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zknd_aes64ks2_cg_cmp_rd_rs1_b29, Zknd_aes64ks2_cg_cmp_rd_rs1_b29_str) + 80005b64: 00093203 ld x4,0(x18) + 80005b68: 01d20c63 beq x4,x29,80005b80 + 80005b6c: 194022ef jal x5,80007d00 + 80005b70: 80005b60 .word 0x80005b60 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 800179c8 .word 0x800179c8 + 80005b7c: 00000000 .word 0x00000000 + 80005b80: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x71f3bcf533bfa571 + 80005b84: 0007bf03 ld x30,0(x15) + 80005b88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x893fb02430a4aadd + 80005b8c: 0007bd03 ld x26,0(x15) + 80005b90: 00878793 addi x15,x15,8 + +0000000080005b94 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b30: + aes64ks2 x30, x30, x26 # perform operation + 80005b94: 7faf0f33 aes64ks2 x30,x30,x26 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zknd_aes64ks2_cg_cmp_rd_rs1_b30, Zknd_aes64ks2_cg_cmp_rd_rs1_b30_str) + 80005b98: 00093203 ld x4,0(x18) + 80005b9c: 01e20c63 beq x4,x30,80005bb4 + 80005ba0: 160022ef jal x5,80007d00 + 80005ba4: 80005b94 .word 0x80005b94 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 80017a04 .word 0x80017a04 + 80005bb0: 00000000 .word 0x00000000 + 80005bb4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x91bccb70a5e2fff7 + 80005bb8: 0007bf83 ld x31,0(x15) + 80005bbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x882fd8580b2cd545 + 80005bc0: 0007bb83 ld x23,0(x15) + 80005bc4: 00878793 addi x15,x15,8 + +0000000080005bc8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_b31: + aes64ks2 x31, x31, x23 # perform operation + 80005bc8: 7f7f8fb3 aes64ks2 x31,x31,x23 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zknd_aes64ks2_cg_cmp_rd_rs1_b31, Zknd_aes64ks2_cg_cmp_rd_rs1_b31_str) + 80005bcc: 00093203 ld x4,0(x18) + 80005bd0: 01f20c63 beq x4,x31,80005be8 + 80005bd4: 12c022ef jal x5,80007d00 + 80005bd8: 80005bc8 .word 0x80005bc8 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 80017a40 .word 0x80017a40 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xa9b1493fa2b82394 + 80005bec: 0007bb83 ld x23,0(x15) + 80005bf0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x47e8085960cc20cd + 80005bf4: 0007b003 ld x0,0(x15) + 80005bf8: 00878793 addi x15,x15,8 + +0000000080005bfc : +Zknd_aes64ks2_cg_cmp_rd_rs2_b0: + aes64ks2 x0, x23, x0 # perform operation + 80005bfc: 7e0b8033 aes64ks2 x0,x23,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zknd_aes64ks2_cg_cmp_rd_rs2_b0, Zknd_aes64ks2_cg_cmp_rd_rs2_b0_str) + 80005c00: 00093203 ld x4,0(x18) + 80005c04: 00020c63 beq x4,x0,80005c1c + 80005c08: 0f8022ef jal x5,80007d00 + 80005c0c: 80005bfc .word 0x80005bfc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 80017a7c .word 0x80017a7c + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa8e0d0b837800ac1 + 80005c20: 0007bd03 ld x26,0(x15) + 80005c24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x0be03d2815123761 + 80005c28: 0007b083 ld x1,0(x15) + 80005c2c: 00878793 addi x15,x15,8 + +0000000080005c30 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b1: + aes64ks2 x1, x26, x1 # perform operation + 80005c30: 7e1d00b3 aes64ks2 x1,x26,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zknd_aes64ks2_cg_cmp_rd_rs2_b1, Zknd_aes64ks2_cg_cmp_rd_rs2_b1_str) + 80005c34: 00093203 ld x4,0(x18) + 80005c38: 00120c63 beq x4,x1,80005c50 + 80005c3c: 0c4022ef jal x5,80007d00 + 80005c40: 80005c30 .word 0x80005c30 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 80017ab7 .word 0x80017ab7 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xc6aca23c9b4f9102 + 80005c54: 0007be03 ld x28,0(x15) + 80005c58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xd85fb7b51d075914 + 80005c5c: 0007b103 ld x2,0(x15) + 80005c60: 00878793 addi x15,x15,8 + +0000000080005c64 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b2: + aes64ks2 x2, x28, x2 # perform operation + 80005c64: 7e2e0133 aes64ks2 x2,x28,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zknd_aes64ks2_cg_cmp_rd_rs2_b2, Zknd_aes64ks2_cg_cmp_rd_rs2_b2_str) + 80005c68: 00093203 ld x4,0(x18) + 80005c6c: 00220c63 beq x4,x2,80005c84 + 80005c70: 090022ef jal x5,80007d00 + 80005c74: 80005c64 .word 0x80005c64 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 80017af2 .word 0x80017af2 + 80005c80: 00000000 .word 0x00000000 + 80005c84: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0d6a74f819231c7d + 80005c88: 0007bc03 ld x24,0(x15) + 80005c8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xcd14588452a455e9 + 80005c90: 0007b183 ld x3,0(x15) + 80005c94: 00878793 addi x15,x15,8 + +0000000080005c98 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b3: + aes64ks2 x3, x24, x3 # perform operation + 80005c98: 7e3c01b3 aes64ks2 x3,x24,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zknd_aes64ks2_cg_cmp_rd_rs2_b3, Zknd_aes64ks2_cg_cmp_rd_rs2_b3_str) + 80005c9c: 00093203 ld x4,0(x18) + 80005ca0: 00320c63 beq x4,x3,80005cb8 + 80005ca4: 05c022ef jal x5,80007d00 + 80005ca8: 80005c98 .word 0x80005c98 + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 80017b2d .word 0x80017b2d + 80005cb4: 00000000 .word 0x00000000 + 80005cb8: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005cbc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005cc0: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x458325fcfb2f4dd6 + 80005cc4: 0007b103 ld x2,0(x15) + 80005cc8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x020da20fd7edb6c6 + 80005ccc: 0007b203 ld x4,0(x15) + 80005cd0: 00878793 addi x15,x15,8 + +0000000080005cd4 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b4: + aes64ks2 x4, x2, x4 # perform operation + 80005cd4: 7e410233 aes64ks2 x4,x2,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zknd_aes64ks2_cg_cmp_rd_rs2_b4, Zknd_aes64ks2_cg_cmp_rd_rs2_b4_str) + 80005cd8: 00093683 ld x13,0(x18) + 80005cdc: 00468c63 beq x13,x4,80005cf4 + 80005ce0: 0600276f jal x14,80007d40 + 80005ce4: 80005cd4 .word 0x80005cd4 + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 80017b68 .word 0x80017b68 + 80005cf0: 00000000 .word 0x00000000 + 80005cf4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xe73770a6017c7dc6 + 80005cf8: 0007ba83 ld x21,0(x15) + 80005cfc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x4e0341d7fee54b80 + 80005d00: 0007b283 ld x5,0(x15) + 80005d04: 00878793 addi x15,x15,8 + +0000000080005d08 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b5: + aes64ks2 x5, x21, x5 # perform operation + 80005d08: 7e5a82b3 aes64ks2 x5,x21,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zknd_aes64ks2_cg_cmp_rd_rs2_b5, Zknd_aes64ks2_cg_cmp_rd_rs2_b5_str) + 80005d0c: 00093683 ld x13,0(x18) + 80005d10: 00568c63 beq x13,x5,80005d28 + 80005d14: 02c0276f jal x14,80007d40 + 80005d18: 80005d08 .word 0x80005d08 + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 80017ba3 .word 0x80017ba3 + 80005d24: 00000000 .word 0x00000000 + 80005d28: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x0bf3c3d268116029 + 80005d2c: 0007b003 ld x0,0(x15) + 80005d30: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xb9441b737a32a06d + 80005d34: 0007b303 ld x6,0(x15) + 80005d38: 00878793 addi x15,x15,8 + +0000000080005d3c : +Zknd_aes64ks2_cg_cmp_rd_rs2_b6: + aes64ks2 x6, x0, x6 # perform operation + 80005d3c: 7e600333 aes64ks2 x6,x0,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zknd_aes64ks2_cg_cmp_rd_rs2_b6, Zknd_aes64ks2_cg_cmp_rd_rs2_b6_str) + 80005d40: 00093683 ld x13,0(x18) + 80005d44: 00668c63 beq x13,x6,80005d5c + 80005d48: 7f90176f jal x14,80007d40 + 80005d4c: 80005d3c .word 0x80005d3c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 80017bde .word 0x80017bde + 80005d58: 00000000 .word 0x00000000 + 80005d5c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x43a52b5cee1dab80 + 80005d60: 0007b603 ld x12,0(x15) + 80005d64: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x3d519dff301d508e + 80005d68: 0007b383 ld x7,0(x15) + 80005d6c: 00878793 addi x15,x15,8 + +0000000080005d70 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b7: + aes64ks2 x7, x12, x7 # perform operation + 80005d70: 7e7603b3 aes64ks2 x7,x12,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zknd_aes64ks2_cg_cmp_rd_rs2_b7, Zknd_aes64ks2_cg_cmp_rd_rs2_b7_str) + 80005d74: 00093683 ld x13,0(x18) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 7c50176f jal x14,80007d40 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 80017c19 .word 0x80017c19 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x72cfab3a6d7d3837 + 80005d94: 0007b003 ld x0,0(x15) + 80005d98: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x10f6fbc9f87a6c18 + 80005d9c: 0007b403 ld x8,0(x15) + 80005da0: 00878793 addi x15,x15,8 + +0000000080005da4 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b8: + aes64ks2 x8, x0, x8 # perform operation + 80005da4: 7e800433 aes64ks2 x8,x0,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zknd_aes64ks2_cg_cmp_rd_rs2_b8, Zknd_aes64ks2_cg_cmp_rd_rs2_b8_str) + 80005da8: 00093683 ld x13,0(x18) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 7910176f jal x14,80007d40 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 80017c54 .word 0x80017c54 + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xac288838115f226e + 80005dc8: 0007be83 ld x29,0(x15) + 80005dcc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xd36834762890cc45 + 80005dd0: 0007b483 ld x9,0(x15) + 80005dd4: 00878793 addi x15,x15,8 + +0000000080005dd8 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b9: + aes64ks2 x9, x29, x9 # perform operation + 80005dd8: 7e9e84b3 aes64ks2 x9,x29,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zknd_aes64ks2_cg_cmp_rd_rs2_b9, Zknd_aes64ks2_cg_cmp_rd_rs2_b9_str) + 80005ddc: 00093683 ld x13,0(x18) + 80005de0: 00968c63 beq x13,x9,80005df8 + 80005de4: 75d0176f jal x14,80007d40 + 80005de8: 80005dd8 .word 0x80005dd8 + 80005dec: 00000000 .word 0x00000000 + 80005df0: 80017c8f .word 0x80017c8f + 80005df4: 00000000 .word 0x00000000 + 80005df8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x1c4bfc48e4bbf6ec + 80005dfc: 0007be83 ld x29,0(x15) + 80005e00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x6edd7ca4991cd39d + 80005e04: 0007b503 ld x10,0(x15) + 80005e08: 00878793 addi x15,x15,8 + +0000000080005e0c : +Zknd_aes64ks2_cg_cmp_rd_rs2_b10: + aes64ks2 x10, x29, x10 # perform operation + 80005e0c: 7eae8533 aes64ks2 x10,x29,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zknd_aes64ks2_cg_cmp_rd_rs2_b10, Zknd_aes64ks2_cg_cmp_rd_rs2_b10_str) + 80005e10: 00093683 ld x13,0(x18) + 80005e14: 00a68c63 beq x13,x10,80005e2c + 80005e18: 7290176f jal x14,80007d40 + 80005e1c: 80005e0c .word 0x80005e0c + 80005e20: 00000000 .word 0x00000000 + 80005e24: 80017cca .word 0x80017cca + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x5789999edd98012f + 80005e30: 0007b183 ld x3,0(x15) + 80005e34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xfc6c7c6ba824fa35 + 80005e38: 0007b583 ld x11,0(x15) + 80005e3c: 00878793 addi x15,x15,8 + +0000000080005e40 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b11: + aes64ks2 x11, x3, x11 # perform operation + 80005e40: 7eb185b3 aes64ks2 x11,x3,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zknd_aes64ks2_cg_cmp_rd_rs2_b11, Zknd_aes64ks2_cg_cmp_rd_rs2_b11_str) + 80005e44: 00093683 ld x13,0(x18) + 80005e48: 00b68c63 beq x13,x11,80005e60 + 80005e4c: 6f50176f jal x14,80007d40 + 80005e50: 80005e40 .word 0x80005e40 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 80017d06 .word 0x80017d06 + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xfcd0d93b82c16e5f + 80005e64: 0007bf83 ld x31,0(x15) + 80005e68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0766ca1dd32bd626 + 80005e6c: 0007b603 ld x12,0(x15) + 80005e70: 00878793 addi x15,x15,8 + +0000000080005e74 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b12: + aes64ks2 x12, x31, x12 # perform operation + 80005e74: 7ecf8633 aes64ks2 x12,x31,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zknd_aes64ks2_cg_cmp_rd_rs2_b12, Zknd_aes64ks2_cg_cmp_rd_rs2_b12_str) + 80005e78: 00093683 ld x13,0(x18) + 80005e7c: 00c68c63 beq x13,x12,80005e94 + 80005e80: 6c10176f jal x14,80007d40 + 80005e84: 80005e74 .word 0x80005e74 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 80017d42 .word 0x80017d42 + 80005e90: 00000000 .word 0x00000000 + 80005e94: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e98: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e9c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa9baf926c9537c78 + 80005ea0: 0007bd03 ld x26,0(x15) + 80005ea4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x59d2e06d25d2c72d + 80005ea8: 0007b683 ld x13,0(x15) + 80005eac: 00878793 addi x15,x15,8 + +0000000080005eb0 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b13: + aes64ks2 x13, x26, x13 # perform operation + 80005eb0: 7edd06b3 aes64ks2 x13,x26,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zknd_aes64ks2_cg_cmp_rd_rs2_b13, Zknd_aes64ks2_cg_cmp_rd_rs2_b13_str) + 80005eb4: 00093383 ld x7,0(x18) + 80005eb8: 00d38c63 beq x7,x13,80005ed0 + 80005ebc: 65d0146f jal x8,80007d18 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 80017d7e .word 0x80017d7e + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x530e6a8437dc2197 + 80005ed4: 0007bb83 ld x23,0(x15) + 80005ed8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x8cd3f1ee9f270615 + 80005edc: 0007b703 ld x14,0(x15) + 80005ee0: 00878793 addi x15,x15,8 + +0000000080005ee4 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b14: + aes64ks2 x14, x23, x14 # perform operation + 80005ee4: 7eeb8733 aes64ks2 x14,x23,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zknd_aes64ks2_cg_cmp_rd_rs2_b14, Zknd_aes64ks2_cg_cmp_rd_rs2_b14_str) + 80005ee8: 00093383 ld x7,0(x18) + 80005eec: 00e38c63 beq x7,x14,80005f04 + 80005ef0: 6290146f jal x8,80007d18 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 80017dba .word 0x80017dba + 80005f00: 00000000 .word 0x00000000 + 80005f04: 00890913 addi x18,x18,8 + + mv x10, x15 # switch data pointer register to avoid conflict with test + 80005f08: 00078513 addi x10,x15,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8de4a66ab3fe52cf + 80005f0c: 00053483 ld x9,0(x10) + 80005f10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x82f2516b02a05c6a + 80005f14: 00053783 ld x15,0(x10) + 80005f18: 00850513 addi x10,x10,8 + +0000000080005f1c : +Zknd_aes64ks2_cg_cmp_rd_rs2_b15: + aes64ks2 x15, x9, x15 # perform operation + 80005f1c: 7ef487b3 aes64ks2 x15,x9,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zknd_aes64ks2_cg_cmp_rd_rs2_b15, Zknd_aes64ks2_cg_cmp_rd_rs2_b15_str) + 80005f20: 00093383 ld x7,0(x18) + 80005f24: 00f38c63 beq x7,x15,80005f3c + 80005f28: 5f10146f jal x8,80007d18 + 80005f2c: 80005f1c .word 0x80005f1c + 80005f30: 00000000 .word 0x00000000 + 80005f34: 80017df6 .word 0x80017df6 + 80005f38: 00000000 .word 0x00000000 + 80005f3c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x9017536816c5c97c + 80005f40: 00053e03 ld x28,0(x10) + 80005f44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x2669c1afe385a5df + 80005f48: 00053803 ld x16,0(x10) + 80005f4c: 00850513 addi x10,x10,8 + +0000000080005f50 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b16: + aes64ks2 x16, x28, x16 # perform operation + 80005f50: 7f0e0833 aes64ks2 x16,x28,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zknd_aes64ks2_cg_cmp_rd_rs2_b16, Zknd_aes64ks2_cg_cmp_rd_rs2_b16_str) + 80005f54: 00093383 ld x7,0(x18) + 80005f58: 01038c63 beq x7,x16,80005f70 + 80005f5c: 5bd0146f jal x8,80007d18 + 80005f60: 80005f50 .word 0x80005f50 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 80017e32 .word 0x80017e32 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf77ec8a7d2b25d81 + 80005f74: 00053303 ld x6,0(x10) + 80005f78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7aa36cdc26c3b3cb + 80005f7c: 00053883 ld x17,0(x10) + 80005f80: 00850513 addi x10,x10,8 + +0000000080005f84 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b17: + aes64ks2 x17, x6, x17 # perform operation + 80005f84: 7f1308b3 aes64ks2 x17,x6,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zknd_aes64ks2_cg_cmp_rd_rs2_b17, Zknd_aes64ks2_cg_cmp_rd_rs2_b17_str) + 80005f88: 00093383 ld x7,0(x18) + 80005f8c: 01138c63 beq x7,x17,80005fa4 + 80005f90: 5890146f jal x8,80007d18 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 80017e6e .word 0x80017e6e + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 00890913 addi x18,x18,8 + + mv x30, x18 # switch signature pointer register to avoid conflict with test + 80005fa8: 00090f13 addi x30,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xce40a9d90c0ffe20 + 80005fac: 00053b83 ld x23,0(x10) + 80005fb0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7489548150151699 + 80005fb4: 00053903 ld x18,0(x10) + 80005fb8: 00850513 addi x10,x10,8 + +0000000080005fbc : +Zknd_aes64ks2_cg_cmp_rd_rs2_b18: + aes64ks2 x18, x23, x18 # perform operation + 80005fbc: 7f2b8933 aes64ks2 x18,x23,x18 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zknd_aes64ks2_cg_cmp_rd_rs2_b18, Zknd_aes64ks2_cg_cmp_rd_rs2_b18_str) + 80005fc0: 000f3383 ld x7,0(x30) + 80005fc4: 01238c63 beq x7,x18,80005fdc + 80005fc8: 5510146f jal x8,80007d18 + 80005fcc: 80005fbc .word 0x80005fbc + 80005fd0: 00000000 .word 0x00000000 + 80005fd4: 80017eaa .word 0x80017eaa + 80005fd8: 00000000 .word 0x00000000 + 80005fdc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xd966dcdbd773aa3b + 80005fe0: 00053883 ld x17,0(x10) + 80005fe4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7721c3e790a48f98 + 80005fe8: 00053983 ld x19,0(x10) + 80005fec: 00850513 addi x10,x10,8 + +0000000080005ff0 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b19: + aes64ks2 x19, x17, x19 # perform operation + 80005ff0: 7f3889b3 aes64ks2 x19,x17,x19 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zknd_aes64ks2_cg_cmp_rd_rs2_b19, Zknd_aes64ks2_cg_cmp_rd_rs2_b19_str) + 80005ff4: 000f3383 ld x7,0(x30) + 80005ff8: 01338c63 beq x7,x19,80006010 + 80005ffc: 51d0146f jal x8,80007d18 + 80006000: 80005ff0 .word 0x80005ff0 + 80006004: 00000000 .word 0x00000000 + 80006008: 80017ee6 .word 0x80017ee6 + 8000600c: 00000000 .word 0x00000000 + 80006010: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xff13173168c81411 + 80006014: 00053303 ld x6,0(x10) + 80006018: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6fa464a52f4fdc3d + 8000601c: 00053a03 ld x20,0(x10) + 80006020: 00850513 addi x10,x10,8 + +0000000080006024 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b20: + aes64ks2 x20, x6, x20 # perform operation + 80006024: 7f430a33 aes64ks2 x20,x6,x20 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zknd_aes64ks2_cg_cmp_rd_rs2_b20, Zknd_aes64ks2_cg_cmp_rd_rs2_b20_str) + 80006028: 000f3383 ld x7,0(x30) + 8000602c: 01438c63 beq x7,x20,80006044 + 80006030: 4e90146f jal x8,80007d18 + 80006034: 80006024 .word 0x80006024 + 80006038: 00000000 .word 0x00000000 + 8000603c: 80017f22 .word 0x80017f22 + 80006040: 00000000 .word 0x00000000 + 80006044: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xe6d2921017b63790 + 80006048: 00053d03 ld x26,0(x10) + 8000604c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xfdee3bcd340642d3 + 80006050: 00053a83 ld x21,0(x10) + 80006054: 00850513 addi x10,x10,8 + +0000000080006058 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b21: + aes64ks2 x21, x26, x21 # perform operation + 80006058: 7f5d0ab3 aes64ks2 x21,x26,x21 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zknd_aes64ks2_cg_cmp_rd_rs2_b21, Zknd_aes64ks2_cg_cmp_rd_rs2_b21_str) + 8000605c: 000f3383 ld x7,0(x30) + 80006060: 01538c63 beq x7,x21,80006078 + 80006064: 4b50146f jal x8,80007d18 + 80006068: 80006058 .word 0x80006058 + 8000606c: 00000000 .word 0x00000000 + 80006070: 80017f5e .word 0x80017f5e + 80006074: 00000000 .word 0x00000000 + 80006078: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x711d5c46ccdff270 + 8000607c: 00053d03 ld x26,0(x10) + 80006080: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xbf10eb6483c55009 + 80006084: 00053b03 ld x22,0(x10) + 80006088: 00850513 addi x10,x10,8 + +000000008000608c : +Zknd_aes64ks2_cg_cmp_rd_rs2_b22: + aes64ks2 x22, x26, x22 # perform operation + 8000608c: 7f6d0b33 aes64ks2 x22,x26,x22 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zknd_aes64ks2_cg_cmp_rd_rs2_b22, Zknd_aes64ks2_cg_cmp_rd_rs2_b22_str) + 80006090: 000f3383 ld x7,0(x30) + 80006094: 01638c63 beq x7,x22,800060ac + 80006098: 4810146f jal x8,80007d18 + 8000609c: 8000608c .word 0x8000608c + 800060a0: 00000000 .word 0x00000000 + 800060a4: 80017f9a .word 0x80017f9a + 800060a8: 00000000 .word 0x00000000 + 800060ac: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x430c77abaea01eae + 800060b0: 00053683 ld x13,0(x10) + 800060b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x05ae2568d0feb5af + 800060b8: 00053b83 ld x23,0(x10) + 800060bc: 00850513 addi x10,x10,8 + +00000000800060c0 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b23: + aes64ks2 x23, x13, x23 # perform operation + 800060c0: 7f768bb3 aes64ks2 x23,x13,x23 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zknd_aes64ks2_cg_cmp_rd_rs2_b23, Zknd_aes64ks2_cg_cmp_rd_rs2_b23_str) + 800060c4: 000f3383 ld x7,0(x30) + 800060c8: 01738c63 beq x7,x23,800060e0 + 800060cc: 44d0146f jal x8,80007d18 + 800060d0: 800060c0 .word 0x800060c0 + 800060d4: 00000000 .word 0x00000000 + 800060d8: 80017fd6 .word 0x80017fd6 + 800060dc: 00000000 .word 0x00000000 + 800060e0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x05e3ee2927e83945 + 800060e4: 00053983 ld x19,0(x10) + 800060e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x3eb492b81d80528b + 800060ec: 00053c03 ld x24,0(x10) + 800060f0: 00850513 addi x10,x10,8 + +00000000800060f4 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b24: + aes64ks2 x24, x19, x24 # perform operation + 800060f4: 7f898c33 aes64ks2 x24,x19,x24 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zknd_aes64ks2_cg_cmp_rd_rs2_b24, Zknd_aes64ks2_cg_cmp_rd_rs2_b24_str) + 800060f8: 000f3383 ld x7,0(x30) + 800060fc: 01838c63 beq x7,x24,80006114 + 80006100: 4190146f jal x8,80007d18 + 80006104: 800060f4 .word 0x800060f4 + 80006108: 00000000 .word 0x00000000 + 8000610c: 80018012 .word 0x80018012 + 80006110: 00000000 .word 0x00000000 + 80006114: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x15a3164c0de50271 + 80006118: 00053283 ld x5,0(x10) + 8000611c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xe008135863b97487 + 80006120: 00053c83 ld x25,0(x10) + 80006124: 00850513 addi x10,x10,8 + +0000000080006128 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b25: + aes64ks2 x25, x5, x25 # perform operation + 80006128: 7f928cb3 aes64ks2 x25,x5,x25 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zknd_aes64ks2_cg_cmp_rd_rs2_b25, Zknd_aes64ks2_cg_cmp_rd_rs2_b25_str) + 8000612c: 000f3383 ld x7,0(x30) + 80006130: 01938c63 beq x7,x25,80006148 + 80006134: 3e50146f jal x8,80007d18 + 80006138: 80006128 .word 0x80006128 + 8000613c: 00000000 .word 0x00000000 + 80006140: 8001804e .word 0x8001804e + 80006144: 00000000 .word 0x00000000 + 80006148: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xea7ddf4ac72b5f60 + 8000614c: 00053e83 ld x29,0(x10) + 80006150: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x97794f93a84ff6d7 + 80006154: 00053d03 ld x26,0(x10) + 80006158: 00850513 addi x10,x10,8 + +000000008000615c : +Zknd_aes64ks2_cg_cmp_rd_rs2_b26: + aes64ks2 x26, x29, x26 # perform operation + 8000615c: 7fae8d33 aes64ks2 x26,x29,x26 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zknd_aes64ks2_cg_cmp_rd_rs2_b26, Zknd_aes64ks2_cg_cmp_rd_rs2_b26_str) + 80006160: 000f3383 ld x7,0(x30) + 80006164: 01a38c63 beq x7,x26,8000617c + 80006168: 3b10146f jal x8,80007d18 + 8000616c: 8000615c .word 0x8000615c + 80006170: 00000000 .word 0x00000000 + 80006174: 8001808a .word 0x8001808a + 80006178: 00000000 .word 0x00000000 + 8000617c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xf179bab945221623 + 80006180: 00053003 ld x0,0(x10) + 80006184: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x3c913a1775cca290 + 80006188: 00053d83 ld x27,0(x10) + 8000618c: 00850513 addi x10,x10,8 + +0000000080006190 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b27: + aes64ks2 x27, x0, x27 # perform operation + 80006190: 7fb00db3 aes64ks2 x27,x0,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zknd_aes64ks2_cg_cmp_rd_rs2_b27, Zknd_aes64ks2_cg_cmp_rd_rs2_b27_str) + 80006194: 000f3383 ld x7,0(x30) + 80006198: 01b38c63 beq x7,x27,800061b0 + 8000619c: 37d0146f jal x8,80007d18 + 800061a0: 80006190 .word 0x80006190 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 800180c6 .word 0x800180c6 + 800061ac: 00000000 .word 0x00000000 + 800061b0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x01d5db7260ae7b62 + 800061b4: 00053f83 ld x31,0(x10) + 800061b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x620abd4c8629ab90 + 800061bc: 00053e03 ld x28,0(x10) + 800061c0: 00850513 addi x10,x10,8 + +00000000800061c4 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b28: + aes64ks2 x28, x31, x28 # perform operation + 800061c4: 7fcf8e33 aes64ks2 x28,x31,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zknd_aes64ks2_cg_cmp_rd_rs2_b28, Zknd_aes64ks2_cg_cmp_rd_rs2_b28_str) + 800061c8: 000f3383 ld x7,0(x30) + 800061cc: 01c38c63 beq x7,x28,800061e4 + 800061d0: 3490146f jal x8,80007d18 + 800061d4: 800061c4 .word 0x800061c4 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 80018102 .word 0x80018102 + 800061e0: 00000000 .word 0x00000000 + 800061e4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x1bd6635574673ebb + 800061e8: 00053c83 ld x25,0(x10) + 800061ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x937a7d7ecf1cab99 + 800061f0: 00053e83 ld x29,0(x10) + 800061f4: 00850513 addi x10,x10,8 + +00000000800061f8 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b29: + aes64ks2 x29, x25, x29 # perform operation + 800061f8: 7fdc8eb3 aes64ks2 x29,x25,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zknd_aes64ks2_cg_cmp_rd_rs2_b29, Zknd_aes64ks2_cg_cmp_rd_rs2_b29_str) + 800061fc: 000f3383 ld x7,0(x30) + 80006200: 01d38c63 beq x7,x29,80006218 + 80006204: 3150146f jal x8,80007d18 + 80006208: 800061f8 .word 0x800061f8 + 8000620c: 00000000 .word 0x00000000 + 80006210: 8001813e .word 0x8001813e + 80006214: 00000000 .word 0x00000000 + 80006218: 008f0f13 addi x30,x30,8 + + mv x31, x30 # switch signature pointer register to avoid conflict with test + 8000621c: 000f0f93 addi x31,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xe10977d9d66373d2 + 80006220: 00053003 ld x0,0(x10) + 80006224: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x3dd940f3b1dc8bb7 + 80006228: 00053f03 ld x30,0(x10) + 8000622c: 00850513 addi x10,x10,8 + +0000000080006230 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b30: + aes64ks2 x30, x0, x30 # perform operation + 80006230: 7fe00f33 aes64ks2 x30,x0,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zknd_aes64ks2_cg_cmp_rd_rs2_b30, Zknd_aes64ks2_cg_cmp_rd_rs2_b30_str) + 80006234: 000fb383 ld x7,0(x31) + 80006238: 01e38c63 beq x7,x30,80006250 + 8000623c: 2dd0146f jal x8,80007d18 + 80006240: 80006230 .word 0x80006230 + 80006244: 00000000 .word 0x00000000 + 80006248: 8001817a .word 0x8001817a + 8000624c: 00000000 .word 0x00000000 + 80006250: 008f8f93 addi x31,x31,8 + + mv x27, x31 # switch signature pointer register to avoid conflict with test + 80006254: 000f8d93 addi x27,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xdd62ecf558f6b8ff + 80006258: 00053583 ld x11,0(x10) + 8000625c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x14469cbf22c1fcc7 + 80006260: 00053f83 ld x31,0(x10) + 80006264: 00850513 addi x10,x10,8 + +0000000080006268 : +Zknd_aes64ks2_cg_cmp_rd_rs2_b31: + aes64ks2 x31, x11, x31 # perform operation + 80006268: 7ff58fb3 aes64ks2 x31,x11,x31 + # Check if x31 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x31, Zknd_aes64ks2_cg_cmp_rd_rs2_b31, Zknd_aes64ks2_cg_cmp_rd_rs2_b31_str) + 8000626c: 000db383 ld x7,0(x27) + 80006270: 01f38c63 beq x7,x31,80006288 + 80006274: 2a50146f jal x8,80007d18 + 80006278: 80006268 .word 0x80006268 + 8000627c: 00000000 .word 0x00000000 + 80006280: 800181b6 .word 0x800181b6 + 80006284: 00000000 .word 0x00000000 + 80006288: 008d8d93 addi x27,x27,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xad1e818a8af0fd0f + 8000628c: 00053003 ld x0,0(x10) + 80006290: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x78908cb17aa81a9d + 80006294: 00053003 ld x0,0(x10) + 80006298: 00850513 addi x10,x10,8 + +000000008000629c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b0: + aes64ks2 x0, x0, x0 # perform operation + 8000629c: 7e000033 aes64ks2 x0,x0,x0 + # Check if x0 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x0, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b0, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b0_str) + 800062a0: 000db383 ld x7,0(x27) + 800062a4: 00038c63 beq x7,x0,800062bc + 800062a8: 2710146f jal x8,80007d18 + 800062ac: 8000629c .word 0x8000629c + 800062b0: 00000000 .word 0x00000000 + 800062b4: 800181f2 .word 0x800181f2 + 800062b8: 00000000 .word 0x00000000 + 800062bc: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x839eb35dc1e30369 + 800062c0: 00053083 ld x1,0(x10) + 800062c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7512175d507d77ff + 800062c8: 00053083 ld x1,0(x10) + 800062cc: 00850513 addi x10,x10,8 + +00000000800062d0 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b1: + aes64ks2 x1, x1, x1 # perform operation + 800062d0: 7e1080b3 aes64ks2 x1,x1,x1 + # Check if x1 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x1, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b1, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b1_str) + 800062d4: 000db383 ld x7,0(x27) + 800062d8: 00138c63 beq x7,x1,800062f0 + 800062dc: 23d0146f jal x8,80007d18 + 800062e0: 800062d0 .word 0x800062d0 + 800062e4: 00000000 .word 0x00000000 + 800062e8: 80018231 .word 0x80018231 + 800062ec: 00000000 .word 0x00000000 + 800062f0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7ee0d82ef4e9eac8 + 800062f4: 00053103 ld x2,0(x10) + 800062f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x12e15582996eade6 + 800062fc: 00053103 ld x2,0(x10) + 80006300: 00850513 addi x10,x10,8 + +0000000080006304 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b2: + aes64ks2 x2, x2, x2 # perform operation + 80006304: 7e210133 aes64ks2 x2,x2,x2 + # Check if x2 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x2, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b2, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b2_str) + 80006308: 000db383 ld x7,0(x27) + 8000630c: 00238c63 beq x7,x2,80006324 + 80006310: 2090146f jal x8,80007d18 + 80006314: 80006304 .word 0x80006304 + 80006318: 00000000 .word 0x00000000 + 8000631c: 80018270 .word 0x80018270 + 80006320: 00000000 .word 0x00000000 + 80006324: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8e13527ec93d7713 + 80006328: 00053183 ld x3,0(x10) + 8000632c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x3a7c3680e0f93bdf + 80006330: 00053183 ld x3,0(x10) + 80006334: 00850513 addi x10,x10,8 + +0000000080006338 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b3: + aes64ks2 x3, x3, x3 # perform operation + 80006338: 7e3181b3 aes64ks2 x3,x3,x3 + # Check if x3 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x3, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b3, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b3_str) + 8000633c: 000db383 ld x7,0(x27) + 80006340: 00338c63 beq x7,x3,80006358 + 80006344: 1d50146f jal x8,80007d18 + 80006348: 80006338 .word 0x80006338 + 8000634c: 00000000 .word 0x00000000 + 80006350: 800182af .word 0x800182af + 80006354: 00000000 .word 0x00000000 + 80006358: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x3a47393c04daeef3 + 8000635c: 00053203 ld x4,0(x10) + 80006360: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x9873a762da72cb70 + 80006364: 00053203 ld x4,0(x10) + 80006368: 00850513 addi x10,x10,8 + +000000008000636c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b4: + aes64ks2 x4, x4, x4 # perform operation + 8000636c: 7e420233 aes64ks2 x4,x4,x4 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b4, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b4_str) + 80006370: 000db383 ld x7,0(x27) + 80006374: 00438c63 beq x7,x4,8000638c + 80006378: 1a10146f jal x8,80007d18 + 8000637c: 8000636c .word 0x8000636c + 80006380: 00000000 .word 0x00000000 + 80006384: 800182ee .word 0x800182ee + 80006388: 00000000 .word 0x00000000 + 8000638c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x28e86560e605e0f0 + 80006390: 00053283 ld x5,0(x10) + 80006394: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7be0ef26b87610b5 + 80006398: 00053283 ld x5,0(x10) + 8000639c: 00850513 addi x10,x10,8 + +00000000800063a0 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b5: + aes64ks2 x5, x5, x5 # perform operation + 800063a0: 7e5282b3 aes64ks2 x5,x5,x5 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b5, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b5_str) + 800063a4: 000db383 ld x7,0(x27) + 800063a8: 00538c63 beq x7,x5,800063c0 + 800063ac: 16d0146f jal x8,80007d18 + 800063b0: 800063a0 .word 0x800063a0 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 8001832d .word 0x8001832d + 800063bc: 00000000 .word 0x00000000 + 800063c0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xd603004e63588637 + 800063c4: 00053303 ld x6,0(x10) + 800063c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x66aee90f5164f855 + 800063cc: 00053303 ld x6,0(x10) + 800063d0: 00850513 addi x10,x10,8 + +00000000800063d4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b6: + aes64ks2 x6, x6, x6 # perform operation + 800063d4: 7e630333 aes64ks2 x6,x6,x6 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b6, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b6_str) + 800063d8: 000db383 ld x7,0(x27) + 800063dc: 00638c63 beq x7,x6,800063f4 + 800063e0: 1390146f jal x8,80007d18 + 800063e4: 800063d4 .word 0x800063d4 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 8001836c .word 0x8001836c + 800063f0: 00000000 .word 0x00000000 + 800063f4: 008d8d93 addi x27,x27,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800063f8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800063fc: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xe6e3057ffa99d6f9 + 80006400: 00053383 ld x7,0(x10) + 80006404: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7c756e3407fcc050 + 80006408: 00053383 ld x7,0(x10) + 8000640c: 00850513 addi x10,x10,8 + +0000000080006410 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b7: + aes64ks2 x7, x7, x7 # perform operation + 80006410: 7e7383b3 aes64ks2 x7,x7,x7 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b7, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b7_str) + 80006414: 000db203 ld x4,0(x27) + 80006418: 00720c63 beq x4,x7,80006430 + 8000641c: 0e5012ef jal x5,80007d00 + 80006420: 80006410 .word 0x80006410 + 80006424: 00000000 .word 0x00000000 + 80006428: 800183ab .word 0x800183ab + 8000642c: 00000000 .word 0x00000000 + 80006430: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xe3037214a2a6708e + 80006434: 00053403 ld x8,0(x10) + 80006438: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xefe8ecc84593d42f + 8000643c: 00053403 ld x8,0(x10) + 80006440: 00850513 addi x10,x10,8 + +0000000080006444 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b8: + aes64ks2 x8, x8, x8 # perform operation + 80006444: 7e840433 aes64ks2 x8,x8,x8 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b8, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b8_str) + 80006448: 000db203 ld x4,0(x27) + 8000644c: 00820c63 beq x4,x8,80006464 + 80006450: 0b1012ef jal x5,80007d00 + 80006454: 80006444 .word 0x80006444 + 80006458: 00000000 .word 0x00000000 + 8000645c: 800183ea .word 0x800183ea + 80006460: 00000000 .word 0x00000000 + 80006464: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xa9ddf01199d3477a + 80006468: 00053483 ld x9,0(x10) + 8000646c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x03b3e4b63bbe6f6e + 80006470: 00053483 ld x9,0(x10) + 80006474: 00850513 addi x10,x10,8 + +0000000080006478 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b9: + aes64ks2 x9, x9, x9 # perform operation + 80006478: 7e9484b3 aes64ks2 x9,x9,x9 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b9, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b9_str) + 8000647c: 000db203 ld x4,0(x27) + 80006480: 00920c63 beq x4,x9,80006498 + 80006484: 07d012ef jal x5,80007d00 + 80006488: 80006478 .word 0x80006478 + 8000648c: 00000000 .word 0x00000000 + 80006490: 80018429 .word 0x80018429 + 80006494: 00000000 .word 0x00000000 + 80006498: 008d8d93 addi x27,x27,8 + + mv x18, x10 # switch data pointer register to avoid conflict with test + 8000649c: 00050913 addi x18,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xa41aa2fa6f5ebdbf + 800064a0: 00093503 ld x10,0(x18) + 800064a4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x450503a4f23045d9 + 800064a8: 00093503 ld x10,0(x18) + 800064ac: 00890913 addi x18,x18,8 + +00000000800064b0 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b10: + aes64ks2 x10, x10, x10 # perform operation + 800064b0: 7ea50533 aes64ks2 x10,x10,x10 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b10, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b10_str) + 800064b4: 000db203 ld x4,0(x27) + 800064b8: 00a20c63 beq x4,x10,800064d0 + 800064bc: 045012ef jal x5,80007d00 + 800064c0: 800064b0 .word 0x800064b0 + 800064c4: 00000000 .word 0x00000000 + 800064c8: 80018468 .word 0x80018468 + 800064cc: 00000000 .word 0x00000000 + 800064d0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x09539d9f45021cf8 + 800064d4: 00093583 ld x11,0(x18) + 800064d8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xaf5dc43c2eab7436 + 800064dc: 00093583 ld x11,0(x18) + 800064e0: 00890913 addi x18,x18,8 + +00000000800064e4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b11: + aes64ks2 x11, x11, x11 # perform operation + 800064e4: 7eb585b3 aes64ks2 x11,x11,x11 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b11, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b11_str) + 800064e8: 000db203 ld x4,0(x27) + 800064ec: 00b20c63 beq x4,x11,80006504 + 800064f0: 011012ef jal x5,80007d00 + 800064f4: 800064e4 .word 0x800064e4 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 800184a8 .word 0x800184a8 + 80006500: 00000000 .word 0x00000000 + 80006504: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xfe66c4cbdce9609d + 80006508: 00093603 ld x12,0(x18) + 8000650c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x69be5224deb4ac5e + 80006510: 00093603 ld x12,0(x18) + 80006514: 00890913 addi x18,x18,8 + +0000000080006518 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b12: + aes64ks2 x12, x12, x12 # perform operation + 80006518: 7ec60633 aes64ks2 x12,x12,x12 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b12, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b12_str) + 8000651c: 000db203 ld x4,0(x27) + 80006520: 00c20c63 beq x4,x12,80006538 + 80006524: 7dc012ef jal x5,80007d00 + 80006528: 80006518 .word 0x80006518 + 8000652c: 00000000 .word 0x00000000 + 80006530: 800184e8 .word 0x800184e8 + 80006534: 00000000 .word 0x00000000 + 80006538: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xf49ed7e511427643 + 8000653c: 00093683 ld x13,0(x18) + 80006540: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x50433bd87bf76517 + 80006544: 00093683 ld x13,0(x18) + 80006548: 00890913 addi x18,x18,8 + +000000008000654c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b13: + aes64ks2 x13, x13, x13 # perform operation + 8000654c: 7ed686b3 aes64ks2 x13,x13,x13 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b13, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b13_str) + 80006550: 000db203 ld x4,0(x27) + 80006554: 00d20c63 beq x4,x13,8000656c + 80006558: 7a8012ef jal x5,80007d00 + 8000655c: 8000654c .word 0x8000654c + 80006560: 00000000 .word 0x00000000 + 80006564: 80018528 .word 0x80018528 + 80006568: 00000000 .word 0x00000000 + 8000656c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xac595944313da443 + 80006570: 00093703 ld x14,0(x18) + 80006574: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xe270d87ada4148e4 + 80006578: 00093703 ld x14,0(x18) + 8000657c: 00890913 addi x18,x18,8 + +0000000080006580 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b14: + aes64ks2 x14, x14, x14 # perform operation + 80006580: 7ee70733 aes64ks2 x14,x14,x14 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b14, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b14_str) + 80006584: 000db203 ld x4,0(x27) + 80006588: 00e20c63 beq x4,x14,800065a0 + 8000658c: 774012ef jal x5,80007d00 + 80006590: 80006580 .word 0x80006580 + 80006594: 00000000 .word 0x00000000 + 80006598: 80018568 .word 0x80018568 + 8000659c: 00000000 .word 0x00000000 + 800065a0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xd6c5c697d27eff53 + 800065a4: 00093783 ld x15,0(x18) + 800065a8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x31c75b708982b8d6 + 800065ac: 00093783 ld x15,0(x18) + 800065b0: 00890913 addi x18,x18,8 + +00000000800065b4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b15: + aes64ks2 x15, x15, x15 # perform operation + 800065b4: 7ef787b3 aes64ks2 x15,x15,x15 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b15, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b15_str) + 800065b8: 000db203 ld x4,0(x27) + 800065bc: 00f20c63 beq x4,x15,800065d4 + 800065c0: 740012ef jal x5,80007d00 + 800065c4: 800065b4 .word 0x800065b4 + 800065c8: 00000000 .word 0x00000000 + 800065cc: 800185a8 .word 0x800185a8 + 800065d0: 00000000 .word 0x00000000 + 800065d4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x460911c2024a4fd5 + 800065d8: 00093803 ld x16,0(x18) + 800065dc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x08802569da7644ef + 800065e0: 00093803 ld x16,0(x18) + 800065e4: 00890913 addi x18,x18,8 + +00000000800065e8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b16: + aes64ks2 x16, x16, x16 # perform operation + 800065e8: 7f080833 aes64ks2 x16,x16,x16 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b16, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b16_str) + 800065ec: 000db203 ld x4,0(x27) + 800065f0: 01020c63 beq x4,x16,80006608 + 800065f4: 70c012ef jal x5,80007d00 + 800065f8: 800065e8 .word 0x800065e8 + 800065fc: 00000000 .word 0x00000000 + 80006600: 800185e8 .word 0x800185e8 + 80006604: 00000000 .word 0x00000000 + 80006608: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xc8ca97f74386ba5c + 8000660c: 00093883 ld x17,0(x18) + 80006610: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xebe0717f4fc07f61 + 80006614: 00093883 ld x17,0(x18) + 80006618: 00890913 addi x18,x18,8 + +000000008000661c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b17: + aes64ks2 x17, x17, x17 # perform operation + 8000661c: 7f1888b3 aes64ks2 x17,x17,x17 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b17, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b17_str) + 80006620: 000db203 ld x4,0(x27) + 80006624: 01120c63 beq x4,x17,8000663c + 80006628: 6d8012ef jal x5,80007d00 + 8000662c: 8000661c .word 0x8000661c + 80006630: 00000000 .word 0x00000000 + 80006634: 80018628 .word 0x80018628 + 80006638: 00000000 .word 0x00000000 + 8000663c: 008d8d93 addi x27,x27,8 + + mv x19, x18 # switch data pointer register to avoid conflict with test + 80006640: 00090993 addi x19,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xfeabbbedd4bff24f + 80006644: 0009b903 ld x18,0(x19) + 80006648: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xe4e42dce99ec5604 + 8000664c: 0009b903 ld x18,0(x19) + 80006650: 00898993 addi x19,x19,8 + +0000000080006654 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b18: + aes64ks2 x18, x18, x18 # perform operation + 80006654: 7f290933 aes64ks2 x18,x18,x18 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b18, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 000db203 ld x4,0(x27) + 8000665c: 01220c63 beq x4,x18,80006674 + 80006660: 6a0012ef jal x5,80007d00 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 80018668 .word 0x80018668 + 80006670: 00000000 .word 0x00000000 + 80006674: 008d8d93 addi x27,x27,8 + + mv x9, x19 # switch data pointer register to avoid conflict with test + 80006678: 00098493 addi x9,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x38ff2edebb56ca0f + 8000667c: 0004b983 ld x19,0(x9) + 80006680: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xa73722dfd10528f1 + 80006684: 0004b983 ld x19,0(x9) + 80006688: 00848493 addi x9,x9,8 + +000000008000668c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b19: + aes64ks2 x19, x19, x19 # perform operation + 8000668c: 7f3989b3 aes64ks2 x19,x19,x19 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b19, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b19_str) + 80006690: 000db203 ld x4,0(x27) + 80006694: 01320c63 beq x4,x19,800066ac + 80006698: 668012ef jal x5,80007d00 + 8000669c: 8000668c .word 0x8000668c + 800066a0: 00000000 .word 0x00000000 + 800066a4: 800186a8 .word 0x800186a8 + 800066a8: 00000000 .word 0x00000000 + 800066ac: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x3ffda12a73c27ee5 + 800066b0: 0004ba03 ld x20,0(x9) + 800066b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xce64697375960822 + 800066b8: 0004ba03 ld x20,0(x9) + 800066bc: 00848493 addi x9,x9,8 + +00000000800066c0 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b20: + aes64ks2 x20, x20, x20 # perform operation + 800066c0: 7f4a0a33 aes64ks2 x20,x20,x20 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b20, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b20_str) + 800066c4: 000db203 ld x4,0(x27) + 800066c8: 01420c63 beq x4,x20,800066e0 + 800066cc: 634012ef jal x5,80007d00 + 800066d0: 800066c0 .word 0x800066c0 + 800066d4: 00000000 .word 0x00000000 + 800066d8: 800186e8 .word 0x800186e8 + 800066dc: 00000000 .word 0x00000000 + 800066e0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xd1f7a6be6ce86257 + 800066e4: 0004ba83 ld x21,0(x9) + 800066e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x9a685d14bf5dc04f + 800066ec: 0004ba83 ld x21,0(x9) + 800066f0: 00848493 addi x9,x9,8 + +00000000800066f4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b21: + aes64ks2 x21, x21, x21 # perform operation + 800066f4: 7f5a8ab3 aes64ks2 x21,x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b21, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b21_str) + 800066f8: 000db203 ld x4,0(x27) + 800066fc: 01520c63 beq x4,x21,80006714 + 80006700: 600012ef jal x5,80007d00 + 80006704: 800066f4 .word 0x800066f4 + 80006708: 00000000 .word 0x00000000 + 8000670c: 80018728 .word 0x80018728 + 80006710: 00000000 .word 0x00000000 + 80006714: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xafff095726f906b6 + 80006718: 0004bb03 ld x22,0(x9) + 8000671c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x84800ac905aa7801 + 80006720: 0004bb03 ld x22,0(x9) + 80006724: 00848493 addi x9,x9,8 + +0000000080006728 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b22: + aes64ks2 x22, x22, x22 # perform operation + 80006728: 7f6b0b33 aes64ks2 x22,x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b22, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b22_str) + 8000672c: 000db203 ld x4,0(x27) + 80006730: 01620c63 beq x4,x22,80006748 + 80006734: 5cc012ef jal x5,80007d00 + 80006738: 80006728 .word 0x80006728 + 8000673c: 00000000 .word 0x00000000 + 80006740: 80018768 .word 0x80018768 + 80006744: 00000000 .word 0x00000000 + 80006748: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x037c6a12bb397b5b + 8000674c: 0004bb83 ld x23,0(x9) + 80006750: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x3e2825e323acfc4c + 80006754: 0004bb83 ld x23,0(x9) + 80006758: 00848493 addi x9,x9,8 + +000000008000675c : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b23: + aes64ks2 x23, x23, x23 # perform operation + 8000675c: 7f7b8bb3 aes64ks2 x23,x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b23, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b23_str) + 80006760: 000db203 ld x4,0(x27) + 80006764: 01720c63 beq x4,x23,8000677c + 80006768: 598012ef jal x5,80007d00 + 8000676c: 8000675c .word 0x8000675c + 80006770: 00000000 .word 0x00000000 + 80006774: 800187a8 .word 0x800187a8 + 80006778: 00000000 .word 0x00000000 + 8000677c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xedbb45ad21693312 + 80006780: 0004bc03 ld x24,0(x9) + 80006784: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x036df10b138ae27d + 80006788: 0004bc03 ld x24,0(x9) + 8000678c: 00848493 addi x9,x9,8 + +0000000080006790 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b24: + aes64ks2 x24, x24, x24 # perform operation + 80006790: 7f8c0c33 aes64ks2 x24,x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b24, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b24_str) + 80006794: 000db203 ld x4,0(x27) + 80006798: 01820c63 beq x4,x24,800067b0 + 8000679c: 564012ef jal x5,80007d00 + 800067a0: 80006790 .word 0x80006790 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 800187e8 .word 0x800187e8 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xf71cb59cabcd6445 + 800067b4: 0004bc83 ld x25,0(x9) + 800067b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x87cf1ce033376bf7 + 800067bc: 0004bc83 ld x25,0(x9) + 800067c0: 00848493 addi x9,x9,8 + +00000000800067c4 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b25: + aes64ks2 x25, x25, x25 # perform operation + 800067c4: 7f9c8cb3 aes64ks2 x25,x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b25, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b25_str) + 800067c8: 000db203 ld x4,0(x27) + 800067cc: 01920c63 beq x4,x25,800067e4 + 800067d0: 530012ef jal x5,80007d00 + 800067d4: 800067c4 .word 0x800067c4 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 80018828 .word 0x80018828 + 800067e0: 00000000 .word 0x00000000 + 800067e4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x14eca2f772dc7261 + 800067e8: 0004bd03 ld x26,0(x9) + 800067ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xb018b28bf92db852 + 800067f0: 0004bd03 ld x26,0(x9) + 800067f4: 00848493 addi x9,x9,8 + +00000000800067f8 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b26: + aes64ks2 x26, x26, x26 # perform operation + 800067f8: 7fad0d33 aes64ks2 x26,x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b26, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b26_str) + 800067fc: 000db203 ld x4,0(x27) + 80006800: 01a20c63 beq x4,x26,80006818 + 80006804: 4fc012ef jal x5,80007d00 + 80006808: 800067f8 .word 0x800067f8 + 8000680c: 00000000 .word 0x00000000 + 80006810: 80018868 .word 0x80018868 + 80006814: 00000000 .word 0x00000000 + 80006818: 008d8d93 addi x27,x27,8 + + mv x30, x27 # switch signature pointer register to avoid conflict with test + 8000681c: 000d8f13 addi x30,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x9ef8454d7c00c157 + 80006820: 0004bd83 ld x27,0(x9) + 80006824: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x13628cb09c9f1d86 + 80006828: 0004bd83 ld x27,0(x9) + 8000682c: 00848493 addi x9,x9,8 + +0000000080006830 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b27: + aes64ks2 x27, x27, x27 # perform operation + 80006830: 7fbd8db3 aes64ks2 x27,x27,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b27, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 000f3203 ld x4,0(x30) + 80006838: 01b20c63 beq x4,x27,80006850 + 8000683c: 4c4012ef jal x5,80007d00 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 800188a8 .word 0x800188a8 + 8000684c: 00000000 .word 0x00000000 + 80006850: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x05f7c404a12f0325 + 80006854: 0004be03 ld x28,0(x9) + 80006858: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x66df69aabee886f8 + 8000685c: 0004be03 ld x28,0(x9) + 80006860: 00848493 addi x9,x9,8 + +0000000080006864 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b28: + aes64ks2 x28, x28, x28 # perform operation + 80006864: 7fce0e33 aes64ks2 x28,x28,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b28, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 000f3203 ld x4,0(x30) + 8000686c: 01c20c63 beq x4,x28,80006884 + 80006870: 490012ef jal x5,80007d00 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 800188e8 .word 0x800188e8 + 80006880: 00000000 .word 0x00000000 + 80006884: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x068f818a982f97e1 + 80006888: 0004be83 ld x29,0(x9) + 8000688c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x29e1c96733441e00 + 80006890: 0004be83 ld x29,0(x9) + 80006894: 00848493 addi x9,x9,8 + +0000000080006898 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b29: + aes64ks2 x29, x29, x29 # perform operation + 80006898: 7fde8eb3 aes64ks2 x29,x29,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b29, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 000f3203 ld x4,0(x30) + 800068a0: 01d20c63 beq x4,x29,800068b8 + 800068a4: 45c012ef jal x5,80007d00 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 80018928 .word 0x80018928 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 008f0f13 addi x30,x30,8 + + mv x2, x30 # switch signature pointer register to avoid conflict with test + 800068bc: 000f0113 addi x2,x30,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x213612cc7e76d54c + 800068c0: 0004bf03 ld x30,0(x9) + 800068c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x889bdaa1aa30c12a + 800068c8: 0004bf03 ld x30,0(x9) + 800068cc: 00848493 addi x9,x9,8 + +00000000800068d0 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b30: + aes64ks2 x30, x30, x30 # perform operation + 800068d0: 7fef0f33 aes64ks2 x30,x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b30, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b30_str) + 800068d4: 00013203 ld x4,0(x2) + 800068d8: 01e20c63 beq x4,x30,800068f0 + 800068dc: 424012ef jal x5,80007d00 + 800068e0: 800068d0 .word 0x800068d0 + 800068e4: 00000000 .word 0x00000000 + 800068e8: 80018968 .word 0x80018968 + 800068ec: 00000000 .word 0x00000000 + 800068f0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7d498f42748b3cd6 + 800068f4: 0004bf83 ld x31,0(x9) + 800068f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xbc9c43b1863a2794 + 800068fc: 0004bf83 ld x31,0(x9) + 80006900: 00848493 addi x9,x9,8 + +0000000080006904 : +Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b31: + aes64ks2 x31, x31, x31 # perform operation + 80006904: 7fff8fb3 aes64ks2 x31,x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b31, Zknd_aes64ks2_cg_cmp_rd_rs1_rs2_b31_str) + 80006908: 00013203 ld x4,0(x2) + 8000690c: 01f20c63 beq x4,x31,80006924 + 80006910: 3f0012ef jal x5,80007d00 + 80006914: 80006904 .word 0x80006904 + 80006918: 00000000 .word 0x00000000 + 8000691c: 800189a8 .word 0x800189a8 + 80006920: 00000000 .word 0x00000000 + 80006924: 00810113 addi x2,x2,8 + +0000000080006928 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006928: 00000513 addi x10,x0,0 + 8000692c: 00000073 ecall + 80006930: fff00513 addi x10,x0,-1 + 80006934: 25800413 addi x8,x0,600 + +0000000080006938 : + 80006938: 34002373 csrrs x6,mscratch,x0 + +000000008000693c : + 8000693c: 2b833383 ld x7,696(x6) + +0000000080006940 : + 80006940: 2a033383 ld x7,672(x6) + +0000000080006944 : + 80006944: 2d033483 ld x9,720(x6) + 80006948: 34049073 csrrw x0,mscratch,x9 + +000000008000694c : + 8000694c: 2c833483 ld x9,712(x6) + 80006950: 305493f3 csrrw x7,mtvec,x9 + 80006954: ffc4f493 andi x9,x9,-4 + 80006958: ffc3f393 andi x7,x7,-4 + 8000695c: 00749e63 bne x9,x7,80006978 + +0000000080006960 : + 80006960: 00030493 addi x9,x6,0 + +0000000080006964 : + 80006964: 0004a783 lw x15,0(x9) + 80006968: 00f3a023 sw x15,0(x7) + 8000696c: 00438393 addi x7,x7,4 + 80006970: 00448493 addi x9,x9,4 + 80006974: fe83c8e3 blt x7,x8,80006964 + 80006978: 0000100f fence.i + +000000008000697c : + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: 75250513 addi x10,x10,1874 # 80019112 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: 74f50513 addi x10,x10,1871 # 8001914f + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: 76f50513 addi x10,x10,1903 # 800191af + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: 2da50513 addi x10,x10,730 # 80019d5a + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00015397 auipc x7,0x15 + 80006b04: d5038393 addi x7,x7,-688 # 8001b850 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00015417 auipc x8,0x15 + 80006b44: d0040413 addi x8,x8,-768 # 8001b840 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80019303 .word 0x80019303 + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80019171 .word 0x80019171 + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: 51450513 addi x10,x10,1300 # 800190d4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: 51250513 addi x10,x10,1298 # 80019112 + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc9ff06f jal x0,80006928 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: ca5ff06f jal x0,80006928 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9c30313 addi x6,x6,-1380 # 8000697c + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 6b150513 addi x10,x10,1713 # 8001a791 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00012517 auipc x10,0x12 + 80007124: a3850513 addi x10,x10,-1480 # 80018b58 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: 0b850513 addi x10,x10,184 # 80019218 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: f7250513 addi x10,x10,-142 # 80019112 + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: 59848493 addi x9,x9,1432 # 80018b38 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 73840413 addi x8,x8,1848 # 80038d18 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 8001931a .word 0x8001931a + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 8001941c .word 0x8001941c + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80019517 .word 0x80019517 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 8001960a .word 0x8001960a + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 8001977d .word 0x8001977d + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00011217 auipc x4,0x11 + 80007d04: cf020213 addi x4,x4,-784 # 800189f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00011397 auipc x7,0x11 + 80007d1c: cd838393 addi x7,x7,-808 # 800189f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00011697 auipc x13,0x11 + 80007d44: cb068693 addi x13,x13,-848 # 800189f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00011497 auipc x9,0x11 + 80007d6c: c8848493 addi x9,x9,-888 # 800189f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00011497 auipc x9,0x11 + 80007e10: be44a483 lw x9,-1052(x9) # 800189f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00013417 auipc x8,0x13 + 80007ec4: 92040413 addi x8,x8,-1760 # 8001a7e0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: e2040413 addi x8,x8,-480 # 80038d20 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00011497 auipc x9,0x11 + 80007f44: bd848493 addi x9,x9,-1064 # 80018b18 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00011497 auipc x9,0x11 + 80007f84: b9848493 addi x9,x9,-1128 # 80018b18 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00011817 auipc x16,0x11 + 80007fc0: b6c80813 addi x16,x16,-1172 # 80018b28 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00011817 auipc x16,0x11 + 80007fe0: b4c80813 addi x16,x16,-1204 # 80018b28 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: 31b38393 addi x7,x7,795 # 80019303 + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00011817 auipc x16,0x11 + 80007ffc: b2880813 addi x16,x16,-1240 # 80018b20 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: 31638393 addi x7,x7,790 # 8001931a + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: 40038393 addi x7,x7,1024 # 8001941c + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: 4e338393 addi x7,x7,1251 # 80019517 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: 5be38393 addi x7,x7,1470 # 8001960a + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 71938393 addi x7,x7,1817 # 8001977d + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 68538393 addi x7,x7,1669 # 80019701 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 6ab38393 addi x7,x7,1707 # 8001973f + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: 2ae38393 addi x7,x7,686 # 8001935a + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: 39638393 addi x7,x7,918 # 8001945a + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: 47738393 addi x7,x7,1143 # 80019553 + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: 55338393 addi x7,x7,1363 # 80019647 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 6ac38393 addi x7,x7,1708 # 800197b8 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: 27638393 addi x7,x7,630 # 8001939a + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: 35c38393 addi x7,x7,860 # 80019498 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: 43b38393 addi x7,x7,1083 # 8001958f + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: 51838393 addi x7,x7,1304 # 80019684 + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 66f38393 addi x7,x7,1647 # 800197f3 + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: 23f38393 addi x7,x7,575 # 800193db + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: 32338393 addi x7,x7,803 # 800194d7 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: 40038393 addi x7,x7,1024 # 800195cc + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: 4de38393 addi x7,x7,1246 # 800196c2 + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 63338393 addi x7,x7,1587 # 8001982f + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 65838393 addi x7,x7,1624 # 8001986c + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 68f38393 addi x7,x7,1679 # 800198bb + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 77238393 addi x7,x7,1906 # 800199b6 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00012397 auipc x7,0x12 + 80008260: 85638393 addi x7,x7,-1962 # 80019ab2 + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00011817 auipc x16,0x11 + 80008280: 8a480813 addi x16,x16,-1884 # 80018b20 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00011817 auipc x16,0x11 + 80008290: 89480813 addi x16,x16,-1900 # 80018b20 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00011817 auipc x16,0x11 + 8000829c: 88c80813 addi x16,x16,-1908 # 80018b24 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00011817 auipc x16,0x11 + 800082ac: 87880813 addi x16,x16,-1928 # 80018b20 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: e1250513 addi x10,x10,-494 # 80019112 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: e0f50513 addi x10,x10,-497 # 8001914f + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: e8650513 addi x10,x10,-378 # 80019206 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 76853503 ld x10,1896(x10) # 80018b10 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: e5850513 addi x10,x10,-424 # 80019218 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 60852503 lw x10,1544(x10) # 800189f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: e1a50513 addi x10,x10,-486 # 8001921a + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 6c852503 lw x10,1736(x10) # 80018af0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 6f850513 addi x10,x10,1784 # 80018b58 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: d8e50513 addi x10,x10,-626 # 8001922e + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 63053503 ld x10,1584(x10) # 80018af8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 67850513 addi x10,x10,1656 # 80018b58 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 74550513 addi x10,x10,1861 # 80019c65 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: 4a852503 lw x10,1192(x10) # 800189f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: 5f860613 addi x12,x12,1528 # 80018b58 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: 56c52503 lw x10,1388(x10) # 80018af4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 7bb50513 addi x10,x10,1979 # 80019d7b + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: 55860613 addi x12,x12,1368 # 80018b58 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: 4cc52503 lw x10,1228(x10) # 80018af4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: 51860613 addi x12,x12,1304 # 80018b58 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: 48c52503 lw x10,1164(x10) # 80018af4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: 5de50513 addi x10,x10,1502 # 80019c5e + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: 49850513 addi x10,x10,1176 # 80018b58 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: 57650513 addi x10,x10,1398 # 80019c76 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: 2c852503 lw x10,712(x10) # 800189f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: 3c853503 ld x10,968(x10) # 80018b00 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: 3b453503 ld x10,948(x10) # 80018b00 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: 3f850513 addi x10,x10,1016 # 80018b58 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: 39052503 lw x10,912(x10) # 80018b18 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: 4ed50513 addi x10,x10,1261 # 80019c8d + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: 22852503 lw x10,552(x10) # 800189f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: 33053503 ld x10,816(x10) # 80018b08 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: 31c53503 ld x10,796(x10) # 80018b08 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: 35850513 addi x10,x10,856 # 80018b58 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: 46450513 addi x10,x10,1124 # 80019ca4 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: 2a053503 ld x10,672(x10) # 80018b08 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: 2d850513 addi x10,x10,728 # 80018b58 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: 44250513 addi x10,x10,1090 # 80019d02 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: 22053503 ld x10,544(x10) # 80018b08 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: 25850513 addi x10,x10,600 # 80018b58 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: 1f442403 lw x8,500(x8) # 80018b20 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: 46750513 addi x10,x10,1127 # 80019da7 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: 45350513 addi x10,x10,1107 # 80019dd3 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: 18080813 addi x16,x16,384 # 80018b28 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00011517 auipc x10,0x11 + 800089c4: 85850513 addi x10,x10,-1960 # 80019218 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: 3e350513 addi x10,x10,995 # 80019de3 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: 0e053503 ld x10,224(x10) # 80018b08 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: 11850513 addi x10,x10,280 # 80018b58 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: 38e50513 addi x10,x10,910 # 80019e0e + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: 05853503 ld x10,88(x10) # 80018b00 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: 09850513 addi x10,x10,152 # 80018b58 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: 01833303 ld x6,24(x6) # 80018b00 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: 0183b383 ld x7,24(x7) # 80018b08 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: 33d50513 addi x10,x10,829 # 80019e3d + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: 36550513 addi x10,x10,869 # 80019ea5 + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: f9833303 ld x6,-104(x6) # 80018b00 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: f983b383 ld x7,-104(x7) # 80018b08 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: fb850513 addi x10,x10,-72 # 80018b58 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: 2ec50513 addi x10,x10,748 # 80019ecc + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: 24950513 addi x10,x10,585 # 80019e69 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: 24550513 addi x10,x10,581 # 80019ea5 + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: e8033303 ld x6,-384(x6) # 80018b08 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: e703b383 ld x7,-400(x7) # 80018b00 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: e9850513 addi x10,x10,-360 # 80018b58 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: 2b450513 addi x10,x10,692 # 80019fb4 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: 35b50513 addi x10,x10,859 # 8001a09b + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 00010517 auipc x10,0x10 + 80008d6c: dbc52503 lw x10,-580(x10) # 80018b24 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: 33750513 addi x10,x10,823 # 8001a0d7 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: 2d550513 addi x10,x10,725 # 8001a0b5 + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: 29d50513 addi x10,x10,669 # 8001a0bd + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: 26550513 addi x10,x10,613 # 8001a0c5 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: 22e50513 addi x10,x10,558 # 8001a0ce + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: 20050513 addi x10,x10,512 # 8001a0e0 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 00010517 auipc x10,0x10 + 80008f0c: c1852503 lw x10,-1000(x10) # 80018b20 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: 2d750513 addi x10,x10,727 # 8001a237 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: 15a50513 addi x10,x10,346 # 8001a0fa + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: 14b50513 addi x10,x10,331 # 8001a12b + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: 12b50513 addi x10,x10,299 # 8001a14b + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: 10950513 addi x10,x10,265 # 8001a169 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: 0e850513 addi x10,x10,232 # 8001a188 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: 0d050513 addi x10,x10,208 # 8001a1b0 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: 0bc50513 addi x10,x10,188 # 8001a1dc + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: 0a850513 addi x10,x10,168 # 8001a208 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: 0a650513 addi x10,x10,166 # 8001a246 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 00010517 auipc x10,0x10 + 800091cc: 94053503 ld x10,-1728(x10) # 80018b08 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 00010517 auipc x10,0x10 + 800091e4: 97850513 addi x10,x10,-1672 # 80018b58 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: 03d50513 addi x10,x10,61 # 8001a25d + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 00010517 auipc x10,0x10 + 8000924c: 8b853503 ld x10,-1864(x10) # 80018b00 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 00010517 auipc x10,0x10 + 80009264: 8f850513 addi x10,x10,-1800 # 80018b58 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 00010517 auipc x10,0x10 + 8000928c: 89852503 lw x10,-1896(x10) # 80018b20 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: fd450513 addi x10,x10,-44 # 8001a274 + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 00010517 auipc x10,0x10 + 800092cc: 84053503 ld x10,-1984(x10) # 80018b08 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: fab50513 addi x10,x10,-85 # 8001a28b + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 7f853503 ld x10,2040(x10) # 80018b00 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 7fc52503 lw x10,2044(x10) # 80018b20 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: fc150513 addi x10,x10,-63 # 8001a301 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: 05750513 addi x10,x10,87 # 8001a3d7 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: 10a50513 addi x10,x10,266 # 8001a4ca + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: 1c550513 addi x10,x10,453 # 8001a5c5 + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: 26c50513 addi x10,x10,620 # 8001a6ac + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: e3950513 addi x10,x10,-455 # 8001a2b9 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 69063603 ld x12,1680(x12) # 80018b38 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 00010517 auipc x10,0x10 + 800094c4: de250513 addi x10,x10,-542 # 800192a2 + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 63850513 addi x10,x10,1592 # 80018b58 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 62058593 addi x11,x11,1568 # 80018b80 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 6b058593 addi x11,x11,1712 # 80018c40 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 00010517 auipc x10,0x10 + 800095c4: afe50513 addi x10,x10,-1282 # 800190be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 75a50513 addi x10,x10,1882 # 80019d5a + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: 50060613 addi x12,x12,1280 # 80018b30 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 00010517 auipc x10,0x10 + 80009644: c8350513 addi x10,x10,-893 # 800192c3 + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: 4d053503 ld x10,1232(x10) # 80018b38 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: 4d850513 addi x10,x10,1240 # 80018b58 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 00010517 auipc x10,0x10 + 800096c4: c1350513 addi x10,x10,-1005 # 800192d3 + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: 45853503 ld x10,1112(x10) # 80018b40 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: 45850513 addi x10,x10,1112 # 80018b58 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 00010517 auipc x10,0x10 + 80009744: ba350513 addi x10,x10,-1117 # 800192e3 + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: 3e053503 ld x10,992(x10) # 80018b48 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: 3d850513 addi x10,x10,984 # 80018b58 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 00010517 auipc x10,0x10 + 800097c4: b3350513 addi x10,x10,-1229 # 800192f3 + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: 36853503 ld x10,872(x10) # 80018b50 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: 35850513 addi x10,x10,856 # 80018b58 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: 30860613 addi x12,x12,776 # 80018b30 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: 31860613 addi x12,x12,792 # 80018b58 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89030313 addi x6,x6,-1904 # 80006928 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87830313 addi x6,x6,-1928 # 80006928 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86030313 addi x6,x6,-1952 # 80006928 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f878793 addi x15,x15,1784 # 80006938 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: 30010113 addi x2,x2,768 # 8001a7e0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 80019d83 .word 0x80019d83 + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: 00000297 auipc x5,0x0 + 800395ec: 81828293 addi x5,x5,-2024 # 80038e00 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 7f828293 addi x5,x5,2040 # 80038e00 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zkne-aes64es-00.elf.objdump b/riscv-tests/rv64-Zkne-aes64es-00.elf.objdump new file mode 100644 index 0000000..e6e5389 --- /dev/null +++ b/riscv-tests/rv64-Zkne-aes64es-00.elf.objdump @@ -0,0 +1,23496 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64es-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64es-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000040680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cd00 memsz 0x000000000000cd00 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000032680 memsz 0x0000000000032680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000ccc0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00031bb0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041c00 0000000080041c00 0003fc00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080042000 0000000080042000 00040000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00040680 2**0 + CONTENTS, READONLY + 6 .debug_line 000049ac 0000000000000000 0000000000000000 000406bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 0000000000000000 0000000000000000 00045067 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 000450e4 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00045107 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00045120 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 0000000000000000 0000000000000000 00045160 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 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environment and declare main entry point +RVTEST_BEGIN + 80000000: 00042097 auipc x1,0x42 + 80000004: 0e008093 addi x1,x1,224 # 800420e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xa77784d45297509a + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs2: x6 = 0x2a86df90a624a5fa + 80000048: 0001b303 ld x6,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zkne_aes64es_cg_cp_rs1_b0: + aes64es x12, x0, x6 # perform operation + 80000050: 32600633 aes64es x12,x0,x6 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zkne_aes64es_cg_cp_rs1_b0, Zkne_aes64es_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00c20c63 beq x4,x12,80000070 + 8000005c: 0a40b2ef jal x5,8000b100 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 80013470 .word 0x80013470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xcbd294d08dae05fe + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs2: x14 = 0xc549b26b72c6d776 + 8000007c: 0001b703 ld x14,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zkne_aes64es_cg_cp_rs1_b1: + aes64es x6, x1, x14 # perform operation + 80000084: 32e08333 aes64es x6,x1,x14 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes64es_cg_cp_rs1_b1, Zkne_aes64es_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 00620c63 beq x4,x6,800000a4 + 80000090: 0700b2ef jal x5,8000b100 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134a4 .word 0x800134a4 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x11, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010593 addi x11,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x0a6dc7f3f1759c1c + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs2: x10 = 0x32cf87f541a684c1 + 800000b4: 0001b503 ld x10,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zkne_aes64es_cg_cp_rs1_b2: + aes64es x15, x2, x10 # perform operation + 800000bc: 32a107b3 aes64es x15,x2,x10 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zkne_aes64es_cg_cp_rs1_b2, Zkne_aes64es_cg_cp_rs1_b2_str) + 800000c0: 0005b203 ld x4,0(x11) + 800000c4: 00f20c63 beq x4,x15,800000dc + 800000c8: 0380b2ef jal x5,8000b100 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 800134d8 .word 0x800134d8 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00858593 addi x11,x11,8 + + mv x24, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018c13 addi x24,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x3265abac97533dd2 + 800000e4: 000c3183 ld x3,0(x24) + 800000e8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xfba62e88563bfa2e + 800000ec: 000c3b03 ld x22,0(x24) + 800000f0: 008c0c13 addi x24,x24,8 + +00000000800000f4 : +Zkne_aes64es_cg_cp_rs1_b3: + aes64es x8, x3, x22 # perform operation + 800000f4: 33618433 aes64es x8,x3,x22 + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zkne_aes64es_cg_cp_rs1_b3, Zkne_aes64es_cg_cp_rs1_b3_str) + 800000f8: 0005b203 ld x4,0(x11) + 800000fc: 00820c63 beq x4,x8,80000114 + 80000100: 0000b2ef jal x5,8000b100 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8001350c .word 0x8001350c + 80000110: 00000000 .word 0x00000000 + 80000114: 00858593 addi x11,x11,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs1: x4 = 0x9b90bcaa99625d66 + 80000120: 000c3203 ld x4,0(x24) + 80000124: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xf4d4cdb533296616 + 80000128: 000c3983 ld x19,0(x24) + 8000012c: 008c0c13 addi x24,x24,8 + +0000000080000130 : +Zkne_aes64es_cg_cp_rs1_b4: + aes64es x22, x4, x19 # perform operation + 80000130: 33320b33 aes64es x22,x4,x19 + # Check if x22 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x22, Zkne_aes64es_cg_cp_rs1_b4, Zkne_aes64es_cg_cp_rs1_b4_str) + 80000134: 0005b383 ld x7,0(x11) + 80000138: 01638c63 beq x7,x22,80000150 + 8000013c: 7dd0a46f jal x8,8000b118 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 80013540 .word 0x80013540 + 8000014c: 00000000 .word 0x00000000 + 80000150: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0xa8ec0619a9632d8a + 80000154: 000c3283 ld x5,0(x24) + 80000158: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xf70befda4cbcbf45 + 8000015c: 000c3b03 ld x22,0(x24) + 80000160: 008c0c13 addi x24,x24,8 + +0000000080000164 : +Zkne_aes64es_cg_cp_rs1_b5: + aes64es x27, x5, x22 # perform operation + 80000164: 33628db3 aes64es x27,x5,x22 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zkne_aes64es_cg_cp_rs1_b5, Zkne_aes64es_cg_cp_rs1_b5_str) + 80000168: 0005b383 ld x7,0(x11) + 8000016c: 01b38c63 beq x7,x27,80000184 + 80000170: 7a90a46f jal x8,8000b118 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 80013574 .word 0x80013574 + 80000180: 00000000 .word 0x00000000 + 80000184: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0x9bd50aaa2b7a29ae + 80000188: 000c3303 ld x6,0(x24) + 8000018c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs2: x25 = 0xcd3df8afbe3ffb18 + 80000190: 000c3c83 ld x25,0(x24) + 80000194: 008c0c13 addi x24,x24,8 + +0000000080000198 : +Zkne_aes64es_cg_cp_rs1_b6: + aes64es x15, x6, x25 # perform operation + 80000198: 339307b3 aes64es x15,x6,x25 + # Check if x15 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x15, Zkne_aes64es_cg_cp_rs1_b6, Zkne_aes64es_cg_cp_rs1_b6_str) + 8000019c: 0005b383 ld x7,0(x11) + 800001a0: 00f38c63 beq x7,x15,800001b8 + 800001a4: 7750a46f jal x8,8000b118 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135a8 .word 0x800135a8 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00858593 addi x11,x11,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800001bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs1: x7 = 0xb9d134bba8857384 + 800001c4: 000c3383 ld x7,0(x24) + 800001c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xbaa7c35ca3ba4b27 + 800001cc: 000c3a03 ld x20,0(x24) + 800001d0: 008c0c13 addi x24,x24,8 + +00000000800001d4 : +Zkne_aes64es_cg_cp_rs1_b7: + aes64es x13, x7, x20 # perform operation + 800001d4: 334386b3 aes64es x13,x7,x20 + # Check if x13 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x13, Zkne_aes64es_cg_cp_rs1_b7, Zkne_aes64es_cg_cp_rs1_b7_str) + 800001d8: 0005b203 ld x4,0(x11) + 800001dc: 00d20c63 beq x4,x13,800001f4 + 800001e0: 7210a2ef jal x5,8000b100 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 800135dc .word 0x800135dc + 800001f0: 00000000 .word 0x00000000 + 800001f4: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs1: x8 = 0x4d12aee720d9f9b9 + 800001f8: 000c3403 ld x8,0(x24) + 800001fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs2: x29 = 0x26323689aaa12990 + 80000200: 000c3e83 ld x29,0(x24) + 80000204: 008c0c13 addi x24,x24,8 + +0000000080000208 : +Zkne_aes64es_cg_cp_rs1_b8: + aes64es x12, x8, x29 # perform operation + 80000208: 33d40633 aes64es x12,x8,x29 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zkne_aes64es_cg_cp_rs1_b8, Zkne_aes64es_cg_cp_rs1_b8_str) + 8000020c: 0005b203 ld x4,0(x11) + 80000210: 00c20c63 beq x4,x12,80000228 + 80000214: 6ed0a2ef jal x5,8000b100 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 80013610 .word 0x80013610 + 80000224: 00000000 .word 0x00000000 + 80000228: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0x824b745d5340fd44 + 8000022c: 000c3483 ld x9,0(x24) + 80000230: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x94afc47b848dd62f + 80000234: 000c3803 ld x16,0(x24) + 80000238: 008c0c13 addi x24,x24,8 + +000000008000023c : +Zkne_aes64es_cg_cp_rs1_b9: + aes64es x15, x9, x16 # perform operation + 8000023c: 330487b3 aes64es x15,x9,x16 + # Check if x15 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x15, Zkne_aes64es_cg_cp_rs1_b9, Zkne_aes64es_cg_cp_rs1_b9_str) + 80000240: 0005b203 ld x4,0(x11) + 80000244: 00f20c63 beq x4,x15,8000025c + 80000248: 6b90a2ef jal x5,8000b100 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80013644 .word 0x80013644 + 80000258: 00000000 .word 0x00000000 + 8000025c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x1c7121ecbad7bc85 + 80000260: 000c3503 ld x10,0(x24) + 80000264: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x88b6aae23580c605 + 80000268: 000c3b03 ld x22,0(x24) + 8000026c: 008c0c13 addi x24,x24,8 + +0000000080000270 : +Zkne_aes64es_cg_cp_rs1_b10: + aes64es x23, x10, x22 # perform operation + 80000270: 33650bb3 aes64es x23,x10,x22 + # Check if x23 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x23, Zkne_aes64es_cg_cp_rs1_b10, Zkne_aes64es_cg_cp_rs1_b10_str) + 80000274: 0005b203 ld x4,0(x11) + 80000278: 01720c63 beq x4,x23,80000290 + 8000027c: 6850a2ef jal x5,8000b100 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 80013679 .word 0x80013679 + 8000028c: 00000000 .word 0x00000000 + 80000290: 00858593 addi x11,x11,8 + + mv x31, x11 # switch signature pointer register to avoid conflict with test + 80000294: 00058f93 addi x31,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x6d99721bafbb475c + 80000298: 000c3583 ld x11,0(x24) + 8000029c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x921c55ab6f82da53 + 800002a0: 000c3983 ld x19,0(x24) + 800002a4: 008c0c13 addi x24,x24,8 + +00000000800002a8 : +Zkne_aes64es_cg_cp_rs1_b11: + aes64es x16, x11, x19 # perform operation + 800002a8: 33358833 aes64es x16,x11,x19 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zkne_aes64es_cg_cp_rs1_b11, Zkne_aes64es_cg_cp_rs1_b11_str) + 800002ac: 000fb203 ld x4,0(x31) + 800002b0: 01020c63 beq x4,x16,800002c8 + 800002b4: 64d0a2ef jal x5,8000b100 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 800136af .word 0x800136af + 800002c4: 00000000 .word 0x00000000 + 800002c8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x15460887990fd161 + 800002cc: 000c3603 ld x12,0(x24) + 800002d0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0x9ee677e81365e6d3 + 800002d4: 000c3b03 ld x22,0(x24) + 800002d8: 008c0c13 addi x24,x24,8 + +00000000800002dc : +Zkne_aes64es_cg_cp_rs1_b12: + aes64es x13, x12, x22 # perform operation + 800002dc: 336606b3 aes64es x13,x12,x22 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zkne_aes64es_cg_cp_rs1_b12, Zkne_aes64es_cg_cp_rs1_b12_str) + 800002e0: 000fb203 ld x4,0(x31) + 800002e4: 00d20c63 beq x4,x13,800002fc + 800002e8: 6190a2ef jal x5,8000b100 + 800002ec: 800002dc .word 0x800002dc + 800002f0: 00000000 .word 0x00000000 + 800002f4: 800136e5 .word 0x800136e5 + 800002f8: 00000000 .word 0x00000000 + 800002fc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0xb40ea46750c86087 + 80000300: 000c3683 ld x13,0(x24) + 80000304: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x80bc4c5a78aa6d01 + 80000308: 000c3783 ld x15,0(x24) + 8000030c: 008c0c13 addi x24,x24,8 + +0000000080000310 : +Zkne_aes64es_cg_cp_rs1_b13: + aes64es x12, x13, x15 # perform operation + 80000310: 32f68633 aes64es x12,x13,x15 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zkne_aes64es_cg_cp_rs1_b13, Zkne_aes64es_cg_cp_rs1_b13_str) + 80000314: 000fb203 ld x4,0(x31) + 80000318: 00c20c63 beq x4,x12,80000330 + 8000031c: 5e50a2ef jal x5,8000b100 + 80000320: 80000310 .word 0x80000310 + 80000324: 00000000 .word 0x00000000 + 80000328: 8001371b .word 0x8001371b + 8000032c: 00000000 .word 0x00000000 + 80000330: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x87906de5810adedf + 80000334: 000c3703 ld x14,0(x24) + 80000338: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xf4d2fab4e7655187 + 8000033c: 000c3183 ld x3,0(x24) + 80000340: 008c0c13 addi x24,x24,8 + +0000000080000344 : +Zkne_aes64es_cg_cp_rs1_b14: + aes64es x20, x14, x3 # perform operation + 80000344: 32370a33 aes64es x20,x14,x3 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zkne_aes64es_cg_cp_rs1_b14, Zkne_aes64es_cg_cp_rs1_b14_str) + 80000348: 000fb203 ld x4,0(x31) + 8000034c: 01420c63 beq x4,x20,80000364 + 80000350: 5b10a2ef jal x5,8000b100 + 80000354: 80000344 .word 0x80000344 + 80000358: 00000000 .word 0x00000000 + 8000035c: 80013751 .word 0x80013751 + 80000360: 00000000 .word 0x00000000 + 80000364: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x7e8151b5fef96445 + 80000368: 000c3783 ld x15,0(x24) + 8000036c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0x276c8a9090c70638 + 80000370: 000c3183 ld x3,0(x24) + 80000374: 008c0c13 addi x24,x24,8 + +0000000080000378 : +Zkne_aes64es_cg_cp_rs1_b15: + aes64es x8, x15, x3 # perform operation + 80000378: 32378433 aes64es x8,x15,x3 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zkne_aes64es_cg_cp_rs1_b15, Zkne_aes64es_cg_cp_rs1_b15_str) + 8000037c: 000fb203 ld x4,0(x31) + 80000380: 00820c63 beq x4,x8,80000398 + 80000384: 57d0a2ef jal x5,8000b100 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 80013787 .word 0x80013787 + 80000394: 00000000 .word 0x00000000 + 80000398: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0xe4d3054e55fc0403 + 8000039c: 000c3803 ld x16,0(x24) + 800003a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x6faa34191467f93e + 800003a4: 000c3b83 ld x23,0(x24) + 800003a8: 008c0c13 addi x24,x24,8 + +00000000800003ac : +Zkne_aes64es_cg_cp_rs1_b16: + aes64es x9, x16, x23 # perform operation + 800003ac: 337804b3 aes64es x9,x16,x23 + # Check if x9 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x9, Zkne_aes64es_cg_cp_rs1_b16, Zkne_aes64es_cg_cp_rs1_b16_str) + 800003b0: 000fb203 ld x4,0(x31) + 800003b4: 00920c63 beq x4,x9,800003cc + 800003b8: 5490a2ef jal x5,8000b100 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 800137bd .word 0x800137bd + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x130e8f8cb4ec8e7a + 800003d0: 000c3883 ld x17,0(x24) + 800003d4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x7dfda0e46a3f40e3 + 800003d8: 000c3b83 ld x23,0(x24) + 800003dc: 008c0c13 addi x24,x24,8 + +00000000800003e0 : +Zkne_aes64es_cg_cp_rs1_b17: + aes64es x6, x17, x23 # perform operation + 800003e0: 33788333 aes64es x6,x17,x23 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zkne_aes64es_cg_cp_rs1_b17, Zkne_aes64es_cg_cp_rs1_b17_str) + 800003e4: 000fb203 ld x4,0(x31) + 800003e8: 00620c63 beq x4,x6,80000400 + 800003ec: 5150a2ef jal x5,8000b100 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 800137f3 .word 0x800137f3 + 800003fc: 00000000 .word 0x00000000 + 80000400: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x630f8a8a056df94e + 80000404: 000c3903 ld x18,0(x24) + 80000408: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x449d449ae1e92bd2 + 8000040c: 000c3a03 ld x20,0(x24) + 80000410: 008c0c13 addi x24,x24,8 + +0000000080000414 : +Zkne_aes64es_cg_cp_rs1_b18: + aes64es x27, x18, x20 # perform operation + 80000414: 33490db3 aes64es x27,x18,x20 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zkne_aes64es_cg_cp_rs1_b18, Zkne_aes64es_cg_cp_rs1_b18_str) + 80000418: 000fb203 ld x4,0(x31) + 8000041c: 01b20c63 beq x4,x27,80000434 + 80000420: 4e10a2ef jal x5,8000b100 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 80013829 .word 0x80013829 + 80000430: 00000000 .word 0x00000000 + 80000434: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x48e15e639b0a04a6 + 80000438: 000c3983 ld x19,0(x24) + 8000043c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xe5aeb2cb3a1de3c7 + 80000440: 000c3783 ld x15,0(x24) + 80000444: 008c0c13 addi x24,x24,8 + +0000000080000448 : +Zkne_aes64es_cg_cp_rs1_b19: + aes64es x29, x19, x15 # perform operation + 80000448: 32f98eb3 aes64es x29,x19,x15 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zkne_aes64es_cg_cp_rs1_b19, Zkne_aes64es_cg_cp_rs1_b19_str) + 8000044c: 000fb203 ld x4,0(x31) + 80000450: 01d20c63 beq x4,x29,80000468 + 80000454: 4ad0a2ef jal x5,8000b100 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8001385f .word 0x8001385f + 80000464: 00000000 .word 0x00000000 + 80000468: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x66e7be99c2f64e6e + 8000046c: 000c3a03 ld x20,0(x24) + 80000470: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0x4a10bf8c654307b0 + 80000474: 000c3403 ld x8,0(x24) + 80000478: 008c0c13 addi x24,x24,8 + +000000008000047c : +Zkne_aes64es_cg_cp_rs1_b20: + aes64es x27, x20, x8 # perform operation + 8000047c: 328a0db3 aes64es x27,x20,x8 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zkne_aes64es_cg_cp_rs1_b20, Zkne_aes64es_cg_cp_rs1_b20_str) + 80000480: 000fb203 ld x4,0(x31) + 80000484: 01b20c63 beq x4,x27,8000049c + 80000488: 4790a2ef jal x5,8000b100 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 80013895 .word 0x80013895 + 80000498: 00000000 .word 0x00000000 + 8000049c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xa02403bb1c60659d + 800004a0: 000c3a83 ld x21,0(x24) + 800004a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x3438ffa661548e4b + 800004a8: 000c3783 ld x15,0(x24) + 800004ac: 008c0c13 addi x24,x24,8 + +00000000800004b0 : +Zkne_aes64es_cg_cp_rs1_b21: + aes64es x3, x21, x15 # perform operation + 800004b0: 32fa81b3 aes64es x3,x21,x15 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zkne_aes64es_cg_cp_rs1_b21, Zkne_aes64es_cg_cp_rs1_b21_str) + 800004b4: 000fb203 ld x4,0(x31) + 800004b8: 00320c63 beq x4,x3,800004d0 + 800004bc: 4450a2ef jal x5,8000b100 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 800138cb .word 0x800138cb + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x1471b00c7ae9418a + 800004d4: 000c3b03 ld x22,0(x24) + 800004d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x235d579fe7aef4f3 + 800004dc: 000c3783 ld x15,0(x24) + 800004e0: 008c0c13 addi x24,x24,8 + +00000000800004e4 : +Zkne_aes64es_cg_cp_rs1_b22: + aes64es x8, x22, x15 # perform operation + 800004e4: 32fb0433 aes64es x8,x22,x15 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zkne_aes64es_cg_cp_rs1_b22, Zkne_aes64es_cg_cp_rs1_b22_str) + 800004e8: 000fb203 ld x4,0(x31) + 800004ec: 00820c63 beq x4,x8,80000504 + 800004f0: 4110a2ef jal x5,8000b100 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 80013901 .word 0x80013901 + 80000500: 00000000 .word 0x00000000 + 80000504: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x80cd7608212e262e + 80000508: 000c3b83 ld x23,0(x24) + 8000050c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x38c20feff6e8e5a2 + 80000510: 000c3103 ld x2,0(x24) + 80000514: 008c0c13 addi x24,x24,8 + +0000000080000518 : +Zkne_aes64es_cg_cp_rs1_b23: + aes64es x20, x23, x2 # perform operation + 80000518: 322b8a33 aes64es x20,x23,x2 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zkne_aes64es_cg_cp_rs1_b23, Zkne_aes64es_cg_cp_rs1_b23_str) + 8000051c: 000fb203 ld x4,0(x31) + 80000520: 01420c63 beq x4,x20,80000538 + 80000524: 3dd0a2ef jal x5,8000b100 + 80000528: 80000518 .word 0x80000518 + 8000052c: 00000000 .word 0x00000000 + 80000530: 80013937 .word 0x80013937 + 80000534: 00000000 .word 0x00000000 + 80000538: 008f8f93 addi x31,x31,8 + + mv x16, x24 # switch data pointer register to avoid conflict with test + 8000053c: 000c0813 addi x16,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x5ad4b616058144ff + 80000540: 00083c03 ld x24,0(x16) + 80000544: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0xbf36ae0226bfc576 + 80000548: 00083703 ld x14,0(x16) + 8000054c: 00880813 addi x16,x16,8 + +0000000080000550 : +Zkne_aes64es_cg_cp_rs1_b24: + aes64es x22, x24, x14 # perform operation + 80000550: 32ec0b33 aes64es x22,x24,x14 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zkne_aes64es_cg_cp_rs1_b24, Zkne_aes64es_cg_cp_rs1_b24_str) + 80000554: 000fb203 ld x4,0(x31) + 80000558: 01620c63 beq x4,x22,80000570 + 8000055c: 3a50a2ef jal x5,8000b100 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 8001396d .word 0x8001396d + 8000056c: 00000000 .word 0x00000000 + 80000570: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x3f38b188738ba0d5 + 80000574: 00083c83 ld x25,0(x16) + 80000578: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x3cbfbe9d1efad01e + 8000057c: 00083483 ld x9,0(x16) + 80000580: 00880813 addi x16,x16,8 + +0000000080000584 : +Zkne_aes64es_cg_cp_rs1_b25: + aes64es x28, x25, x9 # perform operation + 80000584: 329c8e33 aes64es x28,x25,x9 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zkne_aes64es_cg_cp_rs1_b25, Zkne_aes64es_cg_cp_rs1_b25_str) + 80000588: 000fb203 ld x4,0(x31) + 8000058c: 01c20c63 beq x4,x28,800005a4 + 80000590: 3710a2ef jal x5,8000b100 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 800139a3 .word 0x800139a3 + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x6a44e62bcfa2a590 + 800005a8: 00083d03 ld x26,0(x16) + 800005ac: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs2: x18 = 0x265dde427e45fa2a + 800005b0: 00083903 ld x18,0(x16) + 800005b4: 00880813 addi x16,x16,8 + +00000000800005b8 : +Zkne_aes64es_cg_cp_rs1_b26: + aes64es x14, x26, x18 # perform operation + 800005b8: 332d0733 aes64es x14,x26,x18 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zkne_aes64es_cg_cp_rs1_b26, Zkne_aes64es_cg_cp_rs1_b26_str) + 800005bc: 000fb203 ld x4,0(x31) + 800005c0: 00e20c63 beq x4,x14,800005d8 + 800005c4: 33d0a2ef jal x5,8000b100 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 800139d9 .word 0x800139d9 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x16, x27) # load rs1: x27 = 0x6e7bac2aa320a104 + 800005dc: 00083d83 ld x27,0(x16) + 800005e0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xfb4870f29daa1b73 + 800005e4: 00083a83 ld x21,0(x16) + 800005e8: 00880813 addi x16,x16,8 + +00000000800005ec : +Zkne_aes64es_cg_cp_rs1_b27: + aes64es x8, x27, x21 # perform operation + 800005ec: 335d8433 aes64es x8,x27,x21 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zkne_aes64es_cg_cp_rs1_b27, Zkne_aes64es_cg_cp_rs1_b27_str) + 800005f0: 000fb203 ld x4,0(x31) + 800005f4: 00820c63 beq x4,x8,8000060c + 800005f8: 3090a2ef jal x5,8000b100 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80013a0f .word 0x80013a0f + 80000608: 00000000 .word 0x00000000 + 8000060c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x1c7281d02db65a54 + 80000610: 00083e03 ld x28,0(x16) + 80000614: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x0bc1e7c1213ff914 + 80000618: 00083a83 ld x21,0(x16) + 8000061c: 00880813 addi x16,x16,8 + +0000000080000620 : +Zkne_aes64es_cg_cp_rs1_b28: + aes64es x14, x28, x21 # perform operation + 80000620: 335e0733 aes64es x14,x28,x21 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zkne_aes64es_cg_cp_rs1_b28, Zkne_aes64es_cg_cp_rs1_b28_str) + 80000624: 000fb203 ld x4,0(x31) + 80000628: 00e20c63 beq x4,x14,80000640 + 8000062c: 2d50a2ef jal x5,8000b100 + 80000630: 80000620 .word 0x80000620 + 80000634: 00000000 .word 0x00000000 + 80000638: 80013a45 .word 0x80013a45 + 8000063c: 00000000 .word 0x00000000 + 80000640: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0x1048f3dd6e5d0c89 + 80000644: 00083e83 ld x29,0(x16) + 80000648: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs2: x30 = 0x84118e59f42370b5 + 8000064c: 00083f03 ld x30,0(x16) + 80000650: 00880813 addi x16,x16,8 + +0000000080000654 : +Zkne_aes64es_cg_cp_rs1_b29: + aes64es x25, x29, x30 # perform operation + 80000654: 33ee8cb3 aes64es x25,x29,x30 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zkne_aes64es_cg_cp_rs1_b29, Zkne_aes64es_cg_cp_rs1_b29_str) + 80000658: 000fb203 ld x4,0(x31) + 8000065c: 01920c63 beq x4,x25,80000674 + 80000660: 2a10a2ef jal x5,8000b100 + 80000664: 80000654 .word 0x80000654 + 80000668: 00000000 .word 0x00000000 + 8000066c: 80013a7b .word 0x80013a7b + 80000670: 00000000 .word 0x00000000 + 80000674: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0xa6568c99a61e3703 + 80000678: 00083f03 ld x30,0(x16) + 8000067c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0xa38773f651fa834e + 80000680: 00083603 ld x12,0(x16) + 80000684: 00880813 addi x16,x16,8 + +0000000080000688 : +Zkne_aes64es_cg_cp_rs1_b30: + aes64es x2, x30, x12 # perform operation + 80000688: 32cf0133 aes64es x2,x30,x12 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zkne_aes64es_cg_cp_rs1_b30, Zkne_aes64es_cg_cp_rs1_b30_str) + 8000068c: 000fb203 ld x4,0(x31) + 80000690: 00220c63 beq x4,x2,800006a8 + 80000694: 26d0a2ef jal x5,8000b100 + 80000698: 80000688 .word 0x80000688 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 80013ab1 .word 0x80013ab1 + 800006a4: 00000000 .word 0x00000000 + 800006a8: 008f8f93 addi x31,x31,8 + + mv x19, x31 # switch signature pointer register to avoid conflict with test + 800006ac: 000f8993 addi x19,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0xc717c398134a349a + 800006b0: 00083f83 ld x31,0(x16) + 800006b4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0xf9bc1d5790ce716d + 800006b8: 00083b03 ld x22,0(x16) + 800006bc: 00880813 addi x16,x16,8 + +00000000800006c0 : +Zkne_aes64es_cg_cp_rs1_b31: + aes64es x29, x31, x22 # perform operation + 800006c0: 336f8eb3 aes64es x29,x31,x22 + # Check if x29 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x29, Zkne_aes64es_cg_cp_rs1_b31, Zkne_aes64es_cg_cp_rs1_b31_str) + 800006c4: 0009b203 ld x4,0(x19) + 800006c8: 01d20c63 beq x4,x29,800006e0 + 800006cc: 2350a2ef jal x5,8000b100 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 80013ae7 .word 0x80013ae7 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 00898993 addi x19,x19,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xd0b228c2976bc8f4 + 800006e4: 00083683 ld x13,0(x16) + 800006e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0x4bfbed039a0a7de6 + 800006ec: 00083003 ld x0,0(x16) + 800006f0: 00880813 addi x16,x16,8 + +00000000800006f4 : +Zkne_aes64es_cg_cp_rs2_b0: + aes64es x11, x13, x0 # perform operation + 800006f4: 320685b3 aes64es x11,x13,x0 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zkne_aes64es_cg_cp_rs2_b0, Zkne_aes64es_cg_cp_rs2_b0_str) + 800006f8: 0009b203 ld x4,0(x19) + 800006fc: 00b20c63 beq x4,x11,80000714 + 80000700: 2010a2ef jal x5,8000b100 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80013b1d .word 0x80013b1d + 80000710: 00000000 .word 0x00000000 + 80000714: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x84796c6c1766455c + 80000718: 00083503 ld x10,0(x16) + 8000071c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xb63ba927cb3c6613 + 80000720: 00083083 ld x1,0(x16) + 80000724: 00880813 addi x16,x16,8 + +0000000080000728 : +Zkne_aes64es_cg_cp_rs2_b1: + aes64es x7, x10, x1 # perform operation + 80000728: 321503b3 aes64es x7,x10,x1 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zkne_aes64es_cg_cp_rs2_b1, Zkne_aes64es_cg_cp_rs2_b1_str) + 8000072c: 0009b203 ld x4,0(x19) + 80000730: 00720c63 beq x4,x7,80000748 + 80000734: 1cd0a2ef jal x5,8000b100 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80013b52 .word 0x80013b52 + 80000744: 00000000 .word 0x00000000 + 80000748: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x6ed289d514e41bce + 8000074c: 00083f83 ld x31,0(x16) + 80000750: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs2: x2 = 0xef5b5a4809282b6d + 80000754: 00083103 ld x2,0(x16) + 80000758: 00880813 addi x16,x16,8 + +000000008000075c : +Zkne_aes64es_cg_cp_rs2_b2: + aes64es x23, x31, x2 # perform operation + 8000075c: 322f8bb3 aes64es x23,x31,x2 + # Check if x23 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x23, Zkne_aes64es_cg_cp_rs2_b2, Zkne_aes64es_cg_cp_rs2_b2_str) + 80000760: 0009b203 ld x4,0(x19) + 80000764: 01720c63 beq x4,x23,8000077c + 80000768: 1990a2ef jal x5,8000b100 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 80013b87 .word 0x80013b87 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0xb6de01592b043e87 + 80000780: 00083c83 ld x25,0(x16) + 80000784: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs2: x3 = 0xae8ee0a5f3492781 + 80000788: 00083183 ld x3,0(x16) + 8000078c: 00880813 addi x16,x16,8 + +0000000080000790 : +Zkne_aes64es_cg_cp_rs2_b3: + aes64es x8, x25, x3 # perform operation + 80000790: 323c8433 aes64es x8,x25,x3 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zkne_aes64es_cg_cp_rs2_b3, Zkne_aes64es_cg_cp_rs2_b3_str) + 80000794: 0009b203 ld x4,0(x19) + 80000798: 00820c63 beq x4,x8,800007b0 + 8000079c: 1650a2ef jal x5,8000b100 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 80013bbc .word 0x80013bbc + 800007ac: 00000000 .word 0x00000000 + 800007b0: 00898993 addi x19,x19,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007b8: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0xe5fc02bb08c24b64 + 800007bc: 00083b83 ld x23,0(x16) + 800007c0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs2: x4 = 0x84814d982115ca13 + 800007c4: 00083203 ld x4,0(x16) + 800007c8: 00880813 addi x16,x16,8 + +00000000800007cc : +Zkne_aes64es_cg_cp_rs2_b4: + aes64es x26, x23, x4 # perform operation + 800007cc: 324b8d33 aes64es x26,x23,x4 + # Check if x26 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x26, Zkne_aes64es_cg_cp_rs2_b4, Zkne_aes64es_cg_cp_rs2_b4_str) + 800007d0: 0009b683 ld x13,0(x19) + 800007d4: 01a68c63 beq x13,x26,800007ec + 800007d8: 1690a76f jal x14,8000b140 + 800007dc: 800007cc .word 0x800007cc + 800007e0: 00000000 .word 0x00000000 + 800007e4: 80013bf1 .word 0x80013bf1 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xf728b78eda679d51 + 800007f0: 00083383 ld x7,0(x16) + 800007f4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs2: x5 = 0xe5f3a1561ac19615 + 800007f8: 00083283 ld x5,0(x16) + 800007fc: 00880813 addi x16,x16,8 + +0000000080000800 : +Zkne_aes64es_cg_cp_rs2_b5: + aes64es x9, x7, x5 # perform operation + 80000800: 325384b3 aes64es x9,x7,x5 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zkne_aes64es_cg_cp_rs2_b5, Zkne_aes64es_cg_cp_rs2_b5_str) + 80000804: 0009b683 ld x13,0(x19) + 80000808: 00968c63 beq x13,x9,80000820 + 8000080c: 1350a76f jal x14,8000b140 + 80000810: 80000800 .word 0x80000800 + 80000814: 00000000 .word 0x00000000 + 80000818: 80013c26 .word 0x80013c26 + 8000081c: 00000000 .word 0x00000000 + 80000820: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x75b1b992eb338f33 + 80000824: 00083903 ld x18,0(x16) + 80000828: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0x783274fbf14b6831 + 8000082c: 00083303 ld x6,0(x16) + 80000830: 00880813 addi x16,x16,8 + +0000000080000834 : +Zkne_aes64es_cg_cp_rs2_b6: + aes64es x20, x18, x6 # perform operation + 80000834: 32690a33 aes64es x20,x18,x6 + # Check if x20 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x20, Zkne_aes64es_cg_cp_rs2_b6, Zkne_aes64es_cg_cp_rs2_b6_str) + 80000838: 0009b683 ld x13,0(x19) + 8000083c: 01468c63 beq x13,x20,80000854 + 80000840: 1010a76f jal x14,8000b140 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 80013c5b .word 0x80013c5b + 80000850: 00000000 .word 0x00000000 + 80000854: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x18) # load rs1: x18 = 0x8530d30cc5e2e6da + 80000858: 00083903 ld x18,0(x16) + 8000085c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs2: x7 = 0x5e50c26d7cde634e + 80000860: 00083383 ld x7,0(x16) + 80000864: 00880813 addi x16,x16,8 + +0000000080000868 : +Zkne_aes64es_cg_cp_rs2_b7: + aes64es x30, x18, x7 # perform operation + 80000868: 32790f33 aes64es x30,x18,x7 + # Check if x30 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x30, Zkne_aes64es_cg_cp_rs2_b7, Zkne_aes64es_cg_cp_rs2_b7_str) + 8000086c: 0009b683 ld x13,0(x19) + 80000870: 01e68c63 beq x13,x30,80000888 + 80000874: 0cd0a76f jal x14,8000b140 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 80013c90 .word 0x80013c90 + 80000884: 00000000 .word 0x00000000 + 80000888: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xd23f0464cd196bb0 + 8000088c: 00083603 ld x12,0(x16) + 80000890: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs2: x8 = 0x4c75bc7cdb1de3a1 + 80000894: 00083403 ld x8,0(x16) + 80000898: 00880813 addi x16,x16,8 + +000000008000089c : +Zkne_aes64es_cg_cp_rs2_b8: + aes64es x0, x12, x8 # perform operation + 8000089c: 32860033 aes64es x0,x12,x8 + # Check if x0 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x0, Zkne_aes64es_cg_cp_rs2_b8, Zkne_aes64es_cg_cp_rs2_b8_str) + 800008a0: 0009b683 ld x13,0(x19) + 800008a4: 00068c63 beq x13,x0,800008bc + 800008a8: 0990a76f jal x14,8000b140 + 800008ac: 8000089c .word 0x8000089c + 800008b0: 00000000 .word 0x00000000 + 800008b4: 80013cc5 .word 0x80013cc5 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xdf9b3de331f0fbf6 + 800008c0: 00083e83 ld x29,0(x16) + 800008c4: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x0e788da25f280c22 + 800008c8: 00083483 ld x9,0(x16) + 800008cc: 00880813 addi x16,x16,8 + +00000000800008d0 : +Zkne_aes64es_cg_cp_rs2_b9: + aes64es x18, x29, x9 # perform operation + 800008d0: 329e8933 aes64es x18,x29,x9 + # Check if x18 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x18, Zkne_aes64es_cg_cp_rs2_b9, Zkne_aes64es_cg_cp_rs2_b9_str) + 800008d4: 0009b683 ld x13,0(x19) + 800008d8: 01268c63 beq x13,x18,800008f0 + 800008dc: 0650a76f jal x14,8000b140 + 800008e0: 800008d0 .word 0x800008d0 + 800008e4: 00000000 .word 0x00000000 + 800008e8: 80013cfa .word 0x80013cfa + 800008ec: 00000000 .word 0x00000000 + 800008f0: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0xb2c2c66ab15ba003 + 800008f4: 00083883 ld x17,0(x16) + 800008f8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0x847d0d5e40d06922 + 800008fc: 00083503 ld x10,0(x16) + 80000900: 00880813 addi x16,x16,8 + +0000000080000904 : +Zkne_aes64es_cg_cp_rs2_b10: + aes64es x26, x17, x10 # perform operation + 80000904: 32a88d33 aes64es x26,x17,x10 + # Check if x26 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x26, Zkne_aes64es_cg_cp_rs2_b10, Zkne_aes64es_cg_cp_rs2_b10_str) + 80000908: 0009b683 ld x13,0(x19) + 8000090c: 01a68c63 beq x13,x26,80000924 + 80000910: 0310a76f jal x14,8000b140 + 80000914: 80000904 .word 0x80000904 + 80000918: 00000000 .word 0x00000000 + 8000091c: 80013d2f .word 0x80013d2f + 80000920: 00000000 .word 0x00000000 + 80000924: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xc2c90e62940bbe02 + 80000928: 00083083 ld x1,0(x16) + 8000092c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0xfe5469a2fe2ae8e7 + 80000930: 00083583 ld x11,0(x16) + 80000934: 00880813 addi x16,x16,8 + +0000000080000938 : +Zkne_aes64es_cg_cp_rs2_b11: + aes64es x28, x1, x11 # perform operation + 80000938: 32b08e33 aes64es x28,x1,x11 + # Check if x28 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x28, Zkne_aes64es_cg_cp_rs2_b11, Zkne_aes64es_cg_cp_rs2_b11_str) + 8000093c: 0009b683 ld x13,0(x19) + 80000940: 01c68c63 beq x13,x28,80000958 + 80000944: 7fc0a76f jal x14,8000b140 + 80000948: 80000938 .word 0x80000938 + 8000094c: 00000000 .word 0x00000000 + 80000950: 80013d65 .word 0x80013d65 + 80000954: 00000000 .word 0x00000000 + 80000958: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x561cd358dc9c1188 + 8000095c: 00083c03 ld x24,0(x16) + 80000960: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x14a738d4c57e0206 + 80000964: 00083603 ld x12,0(x16) + 80000968: 00880813 addi x16,x16,8 + +000000008000096c : +Zkne_aes64es_cg_cp_rs2_b12: + aes64es x31, x24, x12 # perform operation + 8000096c: 32cc0fb3 aes64es x31,x24,x12 + # Check if x31 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x31, Zkne_aes64es_cg_cp_rs2_b12, Zkne_aes64es_cg_cp_rs2_b12_str) + 80000970: 0009b683 ld x13,0(x19) + 80000974: 01f68c63 beq x13,x31,8000098c + 80000978: 7c80a76f jal x14,8000b140 + 8000097c: 8000096c .word 0x8000096c + 80000980: 00000000 .word 0x00000000 + 80000984: 80013d9b .word 0x80013d9b + 80000988: 00000000 .word 0x00000000 + 8000098c: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000990: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000994: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x5f6d2ae8bab34d44 + 80000998: 00083a83 ld x21,0(x16) + 8000099c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x20f111a37f8b1aec + 800009a0: 00083683 ld x13,0(x16) + 800009a4: 00880813 addi x16,x16,8 + +00000000800009a8 : +Zkne_aes64es_cg_cp_rs2_b13: + aes64es x14, x21, x13 # perform operation + 800009a8: 32da8733 aes64es x14,x21,x13 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zkne_aes64es_cg_cp_rs2_b13, Zkne_aes64es_cg_cp_rs2_b13_str) + 800009ac: 0009b383 ld x7,0(x19) + 800009b0: 00e38c63 beq x7,x14,800009c8 + 800009b4: 7640a46f jal x8,8000b118 + 800009b8: 800009a8 .word 0x800009a8 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 80013dd1 .word 0x80013dd1 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x21023470883d990e + 800009cc: 00083083 ld x1,0(x16) + 800009d0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x078a3311d412b541 + 800009d4: 00083703 ld x14,0(x16) + 800009d8: 00880813 addi x16,x16,8 + +00000000800009dc : +Zkne_aes64es_cg_cp_rs2_b14: + aes64es x28, x1, x14 # perform operation + 800009dc: 32e08e33 aes64es x28,x1,x14 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zkne_aes64es_cg_cp_rs2_b14, Zkne_aes64es_cg_cp_rs2_b14_str) + 800009e0: 0009b383 ld x7,0(x19) + 800009e4: 01c38c63 beq x7,x28,800009fc + 800009e8: 7300a46f jal x8,8000b118 + 800009ec: 800009dc .word 0x800009dc + 800009f0: 00000000 .word 0x00000000 + 800009f4: 80013e07 .word 0x80013e07 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xd82d9140d64ccf09 + 80000a00: 00083503 ld x10,0(x16) + 80000a04: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x92dd80ed607e987f + 80000a08: 00083783 ld x15,0(x16) + 80000a0c: 00880813 addi x16,x16,8 + +0000000080000a10 : +Zkne_aes64es_cg_cp_rs2_b15: + aes64es x31, x10, x15 # perform operation + 80000a10: 32f50fb3 aes64es x31,x10,x15 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zkne_aes64es_cg_cp_rs2_b15, Zkne_aes64es_cg_cp_rs2_b15_str) + 80000a14: 0009b383 ld x7,0(x19) + 80000a18: 01f38c63 beq x7,x31,80000a30 + 80000a1c: 6fc0a46f jal x8,8000b118 + 80000a20: 80000a10 .word 0x80000a10 + 80000a24: 00000000 .word 0x00000000 + 80000a28: 80013e3d .word 0x80013e3d + 80000a2c: 00000000 .word 0x00000000 + 80000a30: 00898993 addi x19,x19,8 + + mv x30, x16 # switch data pointer register to avoid conflict with test + 80000a34: 00080f13 addi x30,x16,0 +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x9edc4a17e838fc90 + 80000a38: 000f3903 ld x18,0(x30) + 80000a3c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0xecffeb2e29841ed6 + 80000a40: 000f3803 ld x16,0(x30) + 80000a44: 008f0f13 addi x30,x30,8 + +0000000080000a48 : +Zkne_aes64es_cg_cp_rs2_b16: + aes64es x20, x18, x16 # perform operation + 80000a48: 33090a33 aes64es x20,x18,x16 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zkne_aes64es_cg_cp_rs2_b16, Zkne_aes64es_cg_cp_rs2_b16_str) + 80000a4c: 0009b383 ld x7,0(x19) + 80000a50: 01438c63 beq x7,x20,80000a68 + 80000a54: 6c40a46f jal x8,8000b118 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 80013e73 .word 0x80013e73 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x280aa9530613c5e7 + 80000a6c: 000f3803 ld x16,0(x30) + 80000a70: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xa8d6019af461795a + 80000a74: 000f3883 ld x17,0(x30) + 80000a78: 008f0f13 addi x30,x30,8 + +0000000080000a7c : +Zkne_aes64es_cg_cp_rs2_b17: + aes64es x15, x16, x17 # perform operation + 80000a7c: 331807b3 aes64es x15,x16,x17 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zkne_aes64es_cg_cp_rs2_b17, Zkne_aes64es_cg_cp_rs2_b17_str) + 80000a80: 0009b383 ld x7,0(x19) + 80000a84: 00f38c63 beq x7,x15,80000a9c + 80000a88: 6900a46f jal x8,8000b118 + 80000a8c: 80000a7c .word 0x80000a7c + 80000a90: 00000000 .word 0x00000000 + 80000a94: 80013ea9 .word 0x80013ea9 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs1: x22 = 0xeb6d63c0b4f77296 + 80000aa0: 000f3b03 ld x22,0(x30) + 80000aa4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x0b7cde69769c4469 + 80000aa8: 000f3903 ld x18,0(x30) + 80000aac: 008f0f13 addi x30,x30,8 + +0000000080000ab0 : +Zkne_aes64es_cg_cp_rs2_b18: + aes64es x9, x22, x18 # perform operation + 80000ab0: 332b04b3 aes64es x9,x22,x18 + # Check if x9 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x9, Zkne_aes64es_cg_cp_rs2_b18, Zkne_aes64es_cg_cp_rs2_b18_str) + 80000ab4: 0009b383 ld x7,0(x19) + 80000ab8: 00938c63 beq x7,x9,80000ad0 + 80000abc: 65c0a46f jal x8,8000b118 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 80013edf .word 0x80013edf + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 00898993 addi x19,x19,8 + + mv x22, x19 # switch signature pointer register to avoid conflict with test + 80000ad4: 00098b13 addi x22,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x34437d194d896ac7 + 80000ad8: 000f3603 ld x12,0(x30) + 80000adc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0xa3328d4bf58480c7 + 80000ae0: 000f3983 ld x19,0(x30) + 80000ae4: 008f0f13 addi x30,x30,8 + +0000000080000ae8 : +Zkne_aes64es_cg_cp_rs2_b19: + aes64es x25, x12, x19 # perform operation + 80000ae8: 33360cb3 aes64es x25,x12,x19 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zkne_aes64es_cg_cp_rs2_b19, Zkne_aes64es_cg_cp_rs2_b19_str) + 80000aec: 000b3383 ld x7,0(x22) + 80000af0: 01938c63 beq x7,x25,80000b08 + 80000af4: 6240a46f jal x8,8000b118 + 80000af8: 80000ae8 .word 0x80000ae8 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 80013f15 .word 0x80013f15 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0x4951a28a5bf0ae4b + 80000b0c: 000f3983 ld x19,0(x30) + 80000b10: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0xa8c404526257aa6d + 80000b14: 000f3a03 ld x20,0(x30) + 80000b18: 008f0f13 addi x30,x30,8 + +0000000080000b1c : +Zkne_aes64es_cg_cp_rs2_b20: + aes64es x1, x19, x20 # perform operation + 80000b1c: 334980b3 aes64es x1,x19,x20 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zkne_aes64es_cg_cp_rs2_b20, Zkne_aes64es_cg_cp_rs2_b20_str) + 80000b20: 000b3383 ld x7,0(x22) + 80000b24: 00138c63 beq x7,x1,80000b3c + 80000b28: 5f00a46f jal x8,8000b118 + 80000b2c: 80000b1c .word 0x80000b1c + 80000b30: 00000000 .word 0x00000000 + 80000b34: 80013f4b .word 0x80013f4b + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs1: x16 = 0x1e3f616ce5f8eaa8 + 80000b40: 000f3803 ld x16,0(x30) + 80000b44: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0xc11756a968b12dae + 80000b48: 000f3a83 ld x21,0(x30) + 80000b4c: 008f0f13 addi x30,x30,8 + +0000000080000b50 : +Zkne_aes64es_cg_cp_rs2_b21: + aes64es x14, x16, x21 # perform operation + 80000b50: 33580733 aes64es x14,x16,x21 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zkne_aes64es_cg_cp_rs2_b21, Zkne_aes64es_cg_cp_rs2_b21_str) + 80000b54: 000b3383 ld x7,0(x22) + 80000b58: 00e38c63 beq x7,x14,80000b70 + 80000b5c: 5bc0a46f jal x8,8000b118 + 80000b60: 80000b50 .word 0x80000b50 + 80000b64: 00000000 .word 0x00000000 + 80000b68: 80013f81 .word 0x80013f81 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 008b0b13 addi x22,x22,8 + + mv x12, x22 # switch signature pointer register to avoid conflict with test + 80000b74: 000b0613 addi x12,x22,0 +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x16fbd74029c13b85 + 80000b78: 000f3e83 ld x29,0(x30) + 80000b7c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x73231e283d851312 + 80000b80: 000f3b03 ld x22,0(x30) + 80000b84: 008f0f13 addi x30,x30,8 + +0000000080000b88 : +Zkne_aes64es_cg_cp_rs2_b22: + aes64es x24, x29, x22 # perform operation + 80000b88: 336e8c33 aes64es x24,x29,x22 + # Check if x24 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x24, Zkne_aes64es_cg_cp_rs2_b22, Zkne_aes64es_cg_cp_rs2_b22_str) + 80000b8c: 00063383 ld x7,0(x12) + 80000b90: 01838c63 beq x7,x24,80000ba8 + 80000b94: 5840a46f jal x8,8000b118 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 80013fb7 .word 0x80013fb7 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x96ff4c8183db1f8c + 80000bac: 000f3503 ld x10,0(x30) + 80000bb0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0x275212a83f67fa5b + 80000bb4: 000f3b83 ld x23,0(x30) + 80000bb8: 008f0f13 addi x30,x30,8 + +0000000080000bbc : +Zkne_aes64es_cg_cp_rs2_b23: + aes64es x6, x10, x23 # perform operation + 80000bbc: 33750333 aes64es x6,x10,x23 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zkne_aes64es_cg_cp_rs2_b23, Zkne_aes64es_cg_cp_rs2_b23_str) + 80000bc0: 00063383 ld x7,0(x12) + 80000bc4: 00638c63 beq x7,x6,80000bdc + 80000bc8: 5500a46f jal x8,8000b118 + 80000bcc: 80000bbc .word 0x80000bbc + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 80013fed .word 0x80013fed + 80000bd8: 00000000 .word 0x00000000 + 80000bdc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0xc773862179660467 + 80000be0: 000f3303 ld x6,0(x30) + 80000be4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0x8523e481a0ee7956 + 80000be8: 000f3c03 ld x24,0(x30) + 80000bec: 008f0f13 addi x30,x30,8 + +0000000080000bf0 : +Zkne_aes64es_cg_cp_rs2_b24: + aes64es x0, x6, x24 # perform operation + 80000bf0: 33830033 aes64es x0,x6,x24 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zkne_aes64es_cg_cp_rs2_b24, Zkne_aes64es_cg_cp_rs2_b24_str) + 80000bf4: 00063383 ld x7,0(x12) + 80000bf8: 00038c63 beq x7,x0,80000c10 + 80000bfc: 51c0a46f jal x8,8000b118 + 80000c00: 80000bf0 .word 0x80000bf0 + 80000c04: 00000000 .word 0x00000000 + 80000c08: 80014023 .word 0x80014023 + 80000c0c: 00000000 .word 0x00000000 + 80000c10: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0x869745bb62894c20 + 80000c14: 000f3903 ld x18,0(x30) + 80000c18: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x649f94efe408c660 + 80000c1c: 000f3c83 ld x25,0(x30) + 80000c20: 008f0f13 addi x30,x30,8 + +0000000080000c24 : +Zkne_aes64es_cg_cp_rs2_b25: + aes64es x31, x18, x25 # perform operation + 80000c24: 33990fb3 aes64es x31,x18,x25 + # Check if x31 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x31, Zkne_aes64es_cg_cp_rs2_b25, Zkne_aes64es_cg_cp_rs2_b25_str) + 80000c28: 00063383 ld x7,0(x12) + 80000c2c: 01f38c63 beq x7,x31,80000c44 + 80000c30: 4e80a46f jal x8,8000b118 + 80000c34: 80000c24 .word 0x80000c24 + 80000c38: 00000000 .word 0x00000000 + 80000c3c: 80014059 .word 0x80014059 + 80000c40: 00000000 .word 0x00000000 + 80000c44: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x39a0448d7c2663f6 + 80000c48: 000f3c83 ld x25,0(x30) + 80000c4c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x90c43a7f2a6e55e5 + 80000c50: 000f3d03 ld x26,0(x30) + 80000c54: 008f0f13 addi x30,x30,8 + +0000000080000c58 : +Zkne_aes64es_cg_cp_rs2_b26: + aes64es x1, x25, x26 # perform operation + 80000c58: 33ac80b3 aes64es x1,x25,x26 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zkne_aes64es_cg_cp_rs2_b26, Zkne_aes64es_cg_cp_rs2_b26_str) + 80000c5c: 00063383 ld x7,0(x12) + 80000c60: 00138c63 beq x7,x1,80000c78 + 80000c64: 4b40a46f jal x8,8000b118 + 80000c68: 80000c58 .word 0x80000c58 + 80000c6c: 00000000 .word 0x00000000 + 80000c70: 8001408f .word 0x8001408f + 80000c74: 00000000 .word 0x00000000 + 80000c78: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x2) # load rs1: x2 = 0x2d0d07d80fe3ec90 + 80000c7c: 000f3103 ld x2,0(x30) + 80000c80: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0xc97b95de4e89327b + 80000c84: 000f3d83 ld x27,0(x30) + 80000c88: 008f0f13 addi x30,x30,8 + +0000000080000c8c : +Zkne_aes64es_cg_cp_rs2_b27: + aes64es x21, x2, x27 # perform operation + 80000c8c: 33b10ab3 aes64es x21,x2,x27 + # Check if x21 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x21, Zkne_aes64es_cg_cp_rs2_b27, Zkne_aes64es_cg_cp_rs2_b27_str) + 80000c90: 00063383 ld x7,0(x12) + 80000c94: 01538c63 beq x7,x21,80000cac + 80000c98: 4800a46f jal x8,8000b118 + 80000c9c: 80000c8c .word 0x80000c8c + 80000ca0: 00000000 .word 0x00000000 + 80000ca4: 800140c5 .word 0x800140c5 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0xbeae2308f663786b + 80000cb0: 000f3583 ld x11,0(x30) + 80000cb4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0x827e35204acace4d + 80000cb8: 000f3e03 ld x28,0(x30) + 80000cbc: 008f0f13 addi x30,x30,8 + +0000000080000cc0 : +Zkne_aes64es_cg_cp_rs2_b28: + aes64es x4, x11, x28 # perform operation + 80000cc0: 33c58233 aes64es x4,x11,x28 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zkne_aes64es_cg_cp_rs2_b28, Zkne_aes64es_cg_cp_rs2_b28_str) + 80000cc4: 00063383 ld x7,0(x12) + 80000cc8: 00438c63 beq x7,x4,80000ce0 + 80000ccc: 44c0a46f jal x8,8000b118 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 800140fb .word 0x800140fb + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0xf4ecc6430d1893ef + 80000ce4: 000f3583 ld x11,0(x30) + 80000ce8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xf3fa181582c6d08c + 80000cec: 000f3e83 ld x29,0(x30) + 80000cf0: 008f0f13 addi x30,x30,8 + +0000000080000cf4 : +Zkne_aes64es_cg_cp_rs2_b29: + aes64es x20, x11, x29 # perform operation + 80000cf4: 33d58a33 aes64es x20,x11,x29 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zkne_aes64es_cg_cp_rs2_b29, Zkne_aes64es_cg_cp_rs2_b29_str) + 80000cf8: 00063383 ld x7,0(x12) + 80000cfc: 01438c63 beq x7,x20,80000d14 + 80000d00: 4180a46f jal x8,8000b118 + 80000d04: 80000cf4 .word 0x80000cf4 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 80014131 .word 0x80014131 + 80000d10: 00000000 .word 0x00000000 + 80000d14: 00860613 addi x12,x12,8 + + mv x21, x30 # switch data pointer register to avoid conflict with test + 80000d18: 000f0a93 addi x21,x30,0 +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xf3ffd4e6424bc1e1 + 80000d1c: 000ab283 ld x5,0(x21) + 80000d20: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x7caafd4bdc98b771 + 80000d24: 000abf03 ld x30,0(x21) + 80000d28: 008a8a93 addi x21,x21,8 + +0000000080000d2c : +Zkne_aes64es_cg_cp_rs2_b30: + aes64es x19, x5, x30 # perform operation + 80000d2c: 33e289b3 aes64es x19,x5,x30 + # Check if x19 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x19, Zkne_aes64es_cg_cp_rs2_b30, Zkne_aes64es_cg_cp_rs2_b30_str) + 80000d30: 00063383 ld x7,0(x12) + 80000d34: 01338c63 beq x7,x19,80000d4c + 80000d38: 3e00a46f jal x8,8000b118 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 80014167 .word 0x80014167 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x284087f6df56d54c + 80000d50: 000abf03 ld x30,0(x21) + 80000d54: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xc4f027f7586012e1 + 80000d58: 000abf83 ld x31,0(x21) + 80000d5c: 008a8a93 addi x21,x21,8 + +0000000080000d60 : +Zkne_aes64es_cg_cp_rs2_b31: + aes64es x26, x30, x31 # perform operation + 80000d60: 33ff0d33 aes64es x26,x30,x31 + # Check if x26 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x26, Zkne_aes64es_cg_cp_rs2_b31, Zkne_aes64es_cg_cp_rs2_b31_str) + 80000d64: 00063383 ld x7,0(x12) + 80000d68: 01a38c63 beq x7,x26,80000d80 + 80000d6c: 3ac0a46f jal x8,8000b118 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8001419d .word 0x8001419d + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xe247587310a7f798 + 80000d84: 000ab103 ld x2,0(x21) + 80000d88: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x8355ef8f8a534794 + 80000d8c: 000abf03 ld x30,0(x21) + 80000d90: 008a8a93 addi x21,x21,8 + +0000000080000d94 : +Zkne_aes64es_cg_cp_rd_b0: + aes64es x0, x2, x30 # perform operation + 80000d94: 33e10033 aes64es x0,x2,x30 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zkne_aes64es_cg_cp_rd_b0, Zkne_aes64es_cg_cp_rd_b0_str) + 80000d98: 00063383 ld x7,0(x12) + 80000d9c: 00038c63 beq x7,x0,80000db4 + 80000da0: 3780a46f jal x8,8000b118 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 800141d3 .word 0x800141d3 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x90c2fc2bae408e54 + 80000db8: 000abd83 ld x27,0(x21) + 80000dbc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0xd3b73629cd137b24 + 80000dc0: 000abf03 ld x30,0(x21) + 80000dc4: 008a8a93 addi x21,x21,8 + +0000000080000dc8 : +Zkne_aes64es_cg_cp_rd_b1: + aes64es x1, x27, x30 # perform operation + 80000dc8: 33ed80b3 aes64es x1,x27,x30 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zkne_aes64es_cg_cp_rd_b1, Zkne_aes64es_cg_cp_rd_b1_str) + 80000dcc: 00063383 ld x7,0(x12) + 80000dd0: 00138c63 beq x7,x1,80000de8 + 80000dd4: 3440a46f jal x8,8000b118 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 80014207 .word 0x80014207 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0xf2c3da1977019744 + 80000dec: 000ab783 ld x15,0(x21) + 80000df0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0xc6572bc90ff40f95 + 80000df4: 000abe83 ld x29,0(x21) + 80000df8: 008a8a93 addi x21,x21,8 + +0000000080000dfc : +Zkne_aes64es_cg_cp_rd_b2: + aes64es x2, x15, x29 # perform operation + 80000dfc: 33d78133 aes64es x2,x15,x29 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zkne_aes64es_cg_cp_rd_b2, Zkne_aes64es_cg_cp_rd_b2_str) + 80000e00: 00063383 ld x7,0(x12) + 80000e04: 00238c63 beq x7,x2,80000e1c + 80000e08: 3100a46f jal x8,8000b118 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 8001423b .word 0x8001423b + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x82afee0a6c18a5f6 + 80000e20: 000abb03 ld x22,0(x21) + 80000e24: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xb4abc89b3c26a759 + 80000e28: 000ab783 ld x15,0(x21) + 80000e2c: 008a8a93 addi x21,x21,8 + +0000000080000e30 : +Zkne_aes64es_cg_cp_rd_b3: + aes64es x3, x22, x15 # perform operation + 80000e30: 32fb01b3 aes64es x3,x22,x15 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zkne_aes64es_cg_cp_rd_b3, Zkne_aes64es_cg_cp_rd_b3_str) + 80000e34: 00063383 ld x7,0(x12) + 80000e38: 00338c63 beq x7,x3,80000e50 + 80000e3c: 2dc0a46f jal x8,8000b118 + 80000e40: 80000e30 .word 0x80000e30 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 8001426f .word 0x8001426f + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc193ea3a80834414 + 80000e54: 000ab983 ld x19,0(x21) + 80000e58: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0xbb73b8b562b97334 + 80000e5c: 000abe03 ld x28,0(x21) + 80000e60: 008a8a93 addi x21,x21,8 + +0000000080000e64 : +Zkne_aes64es_cg_cp_rd_b4: + aes64es x4, x19, x28 # perform operation + 80000e64: 33c98233 aes64es x4,x19,x28 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zkne_aes64es_cg_cp_rd_b4, Zkne_aes64es_cg_cp_rd_b4_str) + 80000e68: 00063383 ld x7,0(x12) + 80000e6c: 00438c63 beq x7,x4,80000e84 + 80000e70: 2a80a46f jal x8,8000b118 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 800142a3 .word 0x800142a3 + 80000e80: 00000000 .word 0x00000000 + 80000e84: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xc5226d76cc4f6e2a + 80000e88: 000ab303 ld x6,0(x21) + 80000e8c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x1f034823bce83e1e + 80000e90: 000abb83 ld x23,0(x21) + 80000e94: 008a8a93 addi x21,x21,8 + +0000000080000e98 : +Zkne_aes64es_cg_cp_rd_b5: + aes64es x5, x6, x23 # perform operation + 80000e98: 337302b3 aes64es x5,x6,x23 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zkne_aes64es_cg_cp_rd_b5, Zkne_aes64es_cg_cp_rd_b5_str) + 80000e9c: 00063383 ld x7,0(x12) + 80000ea0: 00538c63 beq x7,x5,80000eb8 + 80000ea4: 2740a46f jal x8,8000b118 + 80000ea8: 80000e98 .word 0x80000e98 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 800142d7 .word 0x800142d7 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x53711ffb37f41227 + 80000ebc: 000aba03 ld x20,0(x21) + 80000ec0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0x268bd23fdb5032c1 + 80000ec4: 000abb03 ld x22,0(x21) + 80000ec8: 008a8a93 addi x21,x21,8 + +0000000080000ecc : +Zkne_aes64es_cg_cp_rd_b6: + aes64es x6, x20, x22 # perform operation + 80000ecc: 336a0333 aes64es x6,x20,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zkne_aes64es_cg_cp_rd_b6, Zkne_aes64es_cg_cp_rd_b6_str) + 80000ed0: 00063383 ld x7,0(x12) + 80000ed4: 00638c63 beq x7,x6,80000eec + 80000ed8: 2400a46f jal x8,8000b118 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 8001430b .word 0x8001430b + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000ef0: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000ef4: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x106415c3ff401f61 + 80000ef8: 000ab583 ld x11,0(x21) + 80000efc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x3f00e8d75368f345 + 80000f00: 000ab083 ld x1,0(x21) + 80000f04: 008a8a93 addi x21,x21,8 + +0000000080000f08 : +Zkne_aes64es_cg_cp_rd_b7: + aes64es x7, x11, x1 # perform operation + 80000f08: 321583b3 aes64es x7,x11,x1 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zkne_aes64es_cg_cp_rd_b7, Zkne_aes64es_cg_cp_rd_b7_str) + 80000f0c: 00063683 ld x13,0(x12) + 80000f10: 00768c63 beq x13,x7,80000f28 + 80000f14: 22c0a76f jal x14,8000b140 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 8001433f .word 0x8001433f + 80000f24: 00000000 .word 0x00000000 + 80000f28: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x226c75b05d72c37d + 80000f2c: 000ab503 ld x10,0(x21) + 80000f30: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xd9abff56f15fb656 + 80000f34: 000aba03 ld x20,0(x21) + 80000f38: 008a8a93 addi x21,x21,8 + +0000000080000f3c : +Zkne_aes64es_cg_cp_rd_b8: + aes64es x8, x10, x20 # perform operation + 80000f3c: 33450433 aes64es x8,x10,x20 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zkne_aes64es_cg_cp_rd_b8, Zkne_aes64es_cg_cp_rd_b8_str) + 80000f40: 00063683 ld x13,0(x12) + 80000f44: 00868c63 beq x13,x8,80000f5c + 80000f48: 1f80a76f jal x14,8000b140 + 80000f4c: 80000f3c .word 0x80000f3c + 80000f50: 00000000 .word 0x00000000 + 80000f54: 80014373 .word 0x80014373 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x9a504d6729e7d185 + 80000f60: 000abd83 ld x27,0(x21) + 80000f64: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x90609d2909715ce9 + 80000f68: 000abe83 ld x29,0(x21) + 80000f6c: 008a8a93 addi x21,x21,8 + +0000000080000f70 : +Zkne_aes64es_cg_cp_rd_b9: + aes64es x9, x27, x29 # perform operation + 80000f70: 33dd84b3 aes64es x9,x27,x29 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zkne_aes64es_cg_cp_rd_b9, Zkne_aes64es_cg_cp_rd_b9_str) + 80000f74: 00063683 ld x13,0(x12) + 80000f78: 00968c63 beq x13,x9,80000f90 + 80000f7c: 1c40a76f jal x14,8000b140 + 80000f80: 80000f70 .word 0x80000f70 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 800143a7 .word 0x800143a7 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xa0fa038e8ef56da9 + 80000f94: 000ab103 ld x2,0(x21) + 80000f98: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs2: x26 = 0x9904b25b9c2cb450 + 80000f9c: 000abd03 ld x26,0(x21) + 80000fa0: 008a8a93 addi x21,x21,8 + +0000000080000fa4 : +Zkne_aes64es_cg_cp_rd_b10: + aes64es x10, x2, x26 # perform operation + 80000fa4: 33a10533 aes64es x10,x2,x26 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zkne_aes64es_cg_cp_rd_b10, Zkne_aes64es_cg_cp_rd_b10_str) + 80000fa8: 00063683 ld x13,0(x12) + 80000fac: 00a68c63 beq x13,x10,80000fc4 + 80000fb0: 1900a76f jal x14,8000b140 + 80000fb4: 80000fa4 .word 0x80000fa4 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 800143db .word 0x800143db + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x418ae4f879869f29 + 80000fc8: 000ab883 ld x17,0(x21) + 80000fcc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0xf7beda7a21e86c23 + 80000fd0: 000abe83 ld x29,0(x21) + 80000fd4: 008a8a93 addi x21,x21,8 + +0000000080000fd8 : +Zkne_aes64es_cg_cp_rd_b11: + aes64es x11, x17, x29 # perform operation + 80000fd8: 33d885b3 aes64es x11,x17,x29 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zkne_aes64es_cg_cp_rd_b11, Zkne_aes64es_cg_cp_rd_b11_str) + 80000fdc: 00063683 ld x13,0(x12) + 80000fe0: 00b68c63 beq x13,x11,80000ff8 + 80000fe4: 15c0a76f jal x14,8000b140 + 80000fe8: 80000fd8 .word 0x80000fd8 + 80000fec: 00000000 .word 0x00000000 + 80000ff0: 80014410 .word 0x80014410 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 00860613 addi x12,x12,8 + + mv x16, x12 # switch signature pointer register to avoid conflict with test + 80000ffc: 00060813 addi x16,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0xdff8f43abce76da3 + 80001000: 000abc03 ld x24,0(x21) + 80001004: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0xf4e43ef65b7488b4 + 80001008: 000abe83 ld x29,0(x21) + 8000100c: 008a8a93 addi x21,x21,8 + +0000000080001010 : +Zkne_aes64es_cg_cp_rd_b12: + aes64es x12, x24, x29 # perform operation + 80001010: 33dc0633 aes64es x12,x24,x29 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zkne_aes64es_cg_cp_rd_b12, Zkne_aes64es_cg_cp_rd_b12_str) + 80001014: 00083683 ld x13,0(x16) + 80001018: 00c68c63 beq x13,x12,80001030 + 8000101c: 1240a76f jal x14,8000b140 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80014445 .word 0x80014445 + 8000102c: 00000000 .word 0x00000000 + 80001030: 00880813 addi x16,x16,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80001034: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001038: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xfd6dd1ec7c5b7791 + 8000103c: 000abd83 ld x27,0(x21) + 80001040: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xe33faaf9e5cbca00 + 80001044: 000ab503 ld x10,0(x21) + 80001048: 008a8a93 addi x21,x21,8 + +000000008000104c : +Zkne_aes64es_cg_cp_rd_b13: + aes64es x13, x27, x10 # perform operation + 8000104c: 32ad86b3 aes64es x13,x27,x10 + # Check if x13 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x13, Zkne_aes64es_cg_cp_rd_b13, Zkne_aes64es_cg_cp_rd_b13_str) + 80001050: 00083383 ld x7,0(x16) + 80001054: 00d38c63 beq x7,x13,8000106c + 80001058: 0c00a46f jal x8,8000b118 + 8000105c: 8000104c .word 0x8000104c + 80001060: 00000000 .word 0x00000000 + 80001064: 8001447a .word 0x8001447a + 80001068: 00000000 .word 0x00000000 + 8000106c: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xcb14c3e05c1ba465 + 80001070: 000aba03 ld x20,0(x21) + 80001074: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xcb450eecbcd3e7b2 + 80001078: 000ab083 ld x1,0(x21) + 8000107c: 008a8a93 addi x21,x21,8 + +0000000080001080 : +Zkne_aes64es_cg_cp_rd_b14: + aes64es x14, x20, x1 # perform operation + 80001080: 321a0733 aes64es x14,x20,x1 + # Check if x14 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x14, Zkne_aes64es_cg_cp_rd_b14, Zkne_aes64es_cg_cp_rd_b14_str) + 80001084: 00083383 ld x7,0(x16) + 80001088: 00e38c63 beq x7,x14,800010a0 + 8000108c: 08c0a46f jal x8,8000b118 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 800144af .word 0x800144af + 8000109c: 00000000 .word 0x00000000 + 800010a0: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x23593ff0ec3f3e6d + 800010a4: 000ab903 ld x18,0(x21) + 800010a8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x4eedbc843f39ea4a + 800010ac: 000abf03 ld x30,0(x21) + 800010b0: 008a8a93 addi x21,x21,8 + +00000000800010b4 : +Zkne_aes64es_cg_cp_rd_b15: + aes64es x15, x18, x30 # perform operation + 800010b4: 33e907b3 aes64es x15,x18,x30 + # Check if x15 contains the expected result. x16 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x16, x8, x7, x15, Zkne_aes64es_cg_cp_rd_b15, Zkne_aes64es_cg_cp_rd_b15_str) + 800010b8: 00083383 ld x7,0(x16) + 800010bc: 00f38c63 beq x7,x15,800010d4 + 800010c0: 0580a46f jal x8,8000b118 + 800010c4: 800010b4 .word 0x800010b4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 800144e4 .word 0x800144e4 + 800010d0: 00000000 .word 0x00000000 + 800010d4: 00880813 addi x16,x16,8 + + mv x18, x16 # switch signature pointer register to avoid conflict with test + 800010d8: 00080913 addi x18,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x04fa34749c53e069 + 800010dc: 000ab483 ld x9,0(x21) + 800010e0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x4d733690281577d6 + 800010e4: 000ab083 ld x1,0(x21) + 800010e8: 008a8a93 addi x21,x21,8 + +00000000800010ec : +Zkne_aes64es_cg_cp_rd_b16: + aes64es x16, x9, x1 # perform operation + 800010ec: 32148833 aes64es x16,x9,x1 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zkne_aes64es_cg_cp_rd_b16, Zkne_aes64es_cg_cp_rd_b16_str) + 800010f0: 00093383 ld x7,0(x18) + 800010f4: 01038c63 beq x7,x16,8000110c + 800010f8: 0200a46f jal x8,8000b118 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 80014519 .word 0x80014519 + 80001108: 00000000 .word 0x00000000 + 8000110c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x8d002a934db64eb5 + 80001110: 000ab083 ld x1,0(x21) + 80001114: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x013db449ce0cc59f + 80001118: 000ab303 ld x6,0(x21) + 8000111c: 008a8a93 addi x21,x21,8 + +0000000080001120 : +Zkne_aes64es_cg_cp_rd_b17: + aes64es x17, x1, x6 # perform operation + 80001120: 326088b3 aes64es x17,x1,x6 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zkne_aes64es_cg_cp_rd_b17, Zkne_aes64es_cg_cp_rd_b17_str) + 80001124: 00093383 ld x7,0(x18) + 80001128: 01138c63 beq x7,x17,80001140 + 8000112c: 7ed0946f jal x8,8000b118 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8001454e .word 0x8001454e + 8000113c: 00000000 .word 0x00000000 + 80001140: 00890913 addi x18,x18,8 + + mv x31, x18 # switch signature pointer register to avoid conflict with test + 80001144: 00090f93 addi x31,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x3de2a01035b52cef + 80001148: 000abd83 ld x27,0(x21) + 8000114c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0x361f1886251bf909 + 80001150: 000ab603 ld x12,0(x21) + 80001154: 008a8a93 addi x21,x21,8 + +0000000080001158 : +Zkne_aes64es_cg_cp_rd_b18: + aes64es x18, x27, x12 # perform operation + 80001158: 32cd8933 aes64es x18,x27,x12 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zkne_aes64es_cg_cp_rd_b18, Zkne_aes64es_cg_cp_rd_b18_str) + 8000115c: 000fb383 ld x7,0(x31) + 80001160: 01238c63 beq x7,x18,80001178 + 80001164: 7b50946f jal x8,8000b118 + 80001168: 80001158 .word 0x80001158 + 8000116c: 00000000 .word 0x00000000 + 80001170: 80014583 .word 0x80014583 + 80001174: 00000000 .word 0x00000000 + 80001178: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0x73bae01817a7198a + 8000117c: 000abd83 ld x27,0(x21) + 80001180: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0x09b430930db14ff7 + 80001184: 000ab303 ld x6,0(x21) + 80001188: 008a8a93 addi x21,x21,8 + +000000008000118c : +Zkne_aes64es_cg_cp_rd_b19: + aes64es x19, x27, x6 # perform operation + 8000118c: 326d89b3 aes64es x19,x27,x6 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zkne_aes64es_cg_cp_rd_b19, Zkne_aes64es_cg_cp_rd_b19_str) + 80001190: 000fb383 ld x7,0(x31) + 80001194: 01338c63 beq x7,x19,800011ac + 80001198: 7810946f jal x8,8000b118 + 8000119c: 8000118c .word 0x8000118c + 800011a0: 00000000 .word 0x00000000 + 800011a4: 800145b8 .word 0x800145b8 + 800011a8: 00000000 .word 0x00000000 + 800011ac: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x2f93b39d8c92876b + 800011b0: 000ab883 ld x17,0(x21) + 800011b4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0x0c79e458e5f8edc4 + 800011b8: 000abe03 ld x28,0(x21) + 800011bc: 008a8a93 addi x21,x21,8 + +00000000800011c0 : +Zkne_aes64es_cg_cp_rd_b20: + aes64es x20, x17, x28 # perform operation + 800011c0: 33c88a33 aes64es x20,x17,x28 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zkne_aes64es_cg_cp_rd_b20, Zkne_aes64es_cg_cp_rd_b20_str) + 800011c4: 000fb383 ld x7,0(x31) + 800011c8: 01438c63 beq x7,x20,800011e0 + 800011cc: 74d0946f jal x8,8000b118 + 800011d0: 800011c0 .word 0x800011c0 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 800145ed .word 0x800145ed + 800011dc: 00000000 .word 0x00000000 + 800011e0: 008f8f93 addi x31,x31,8 + + mv x20, x21 # switch data pointer register to avoid conflict with test + 800011e4: 000a8a13 addi x20,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x9bc8049c2116a1fb + 800011e8: 000a3d03 ld x26,0(x20) + 800011ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x389820ce8fc9d95f + 800011f0: 000a3503 ld x10,0(x20) + 800011f4: 008a0a13 addi x20,x20,8 + +00000000800011f8 : +Zkne_aes64es_cg_cp_rd_b21: + aes64es x21, x26, x10 # perform operation + 800011f8: 32ad0ab3 aes64es x21,x26,x10 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zkne_aes64es_cg_cp_rd_b21, Zkne_aes64es_cg_cp_rd_b21_str) + 800011fc: 000fb383 ld x7,0(x31) + 80001200: 01538c63 beq x7,x21,80001218 + 80001204: 7150946f jal x8,8000b118 + 80001208: 800011f8 .word 0x800011f8 + 8000120c: 00000000 .word 0x00000000 + 80001210: 80014622 .word 0x80014622 + 80001214: 00000000 .word 0x00000000 + 80001218: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xfb1bda866214b99a + 8000121c: 000a3703 ld x14,0(x20) + 80001220: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xaffe60142b147a00 + 80001224: 000a3603 ld x12,0(x20) + 80001228: 008a0a13 addi x20,x20,8 + +000000008000122c : +Zkne_aes64es_cg_cp_rd_b22: + aes64es x22, x14, x12 # perform operation + 8000122c: 32c70b33 aes64es x22,x14,x12 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zkne_aes64es_cg_cp_rd_b22, Zkne_aes64es_cg_cp_rd_b22_str) + 80001230: 000fb383 ld x7,0(x31) + 80001234: 01638c63 beq x7,x22,8000124c + 80001238: 6e10946f jal x8,8000b118 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80014657 .word 0x80014657 + 80001248: 00000000 .word 0x00000000 + 8000124c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x01ee6d02e7b1b82c + 80001250: 000a3e03 ld x28,0(x20) + 80001254: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x99c39574e4fdd932 + 80001258: 000a3b03 ld x22,0(x20) + 8000125c: 008a0a13 addi x20,x20,8 + +0000000080001260 : +Zkne_aes64es_cg_cp_rd_b23: + aes64es x23, x28, x22 # perform operation + 80001260: 336e0bb3 aes64es x23,x28,x22 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zkne_aes64es_cg_cp_rd_b23, Zkne_aes64es_cg_cp_rd_b23_str) + 80001264: 000fb383 ld x7,0(x31) + 80001268: 01738c63 beq x7,x23,80001280 + 8000126c: 6ad0946f jal x8,8000b118 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 8001468c .word 0x8001468c + 8000127c: 00000000 .word 0x00000000 + 80001280: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x8387312c0ed1ddf4 + 80001284: 000a3203 ld x4,0(x20) + 80001288: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0xf01904b3db20b00d + 8000128c: 000a3a83 ld x21,0(x20) + 80001290: 008a0a13 addi x20,x20,8 + +0000000080001294 : +Zkne_aes64es_cg_cp_rd_b24: + aes64es x24, x4, x21 # perform operation + 80001294: 33520c33 aes64es x24,x4,x21 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zkne_aes64es_cg_cp_rd_b24, Zkne_aes64es_cg_cp_rd_b24_str) + 80001298: 000fb383 ld x7,0(x31) + 8000129c: 01838c63 beq x7,x24,800012b4 + 800012a0: 6790946f jal x8,8000b118 + 800012a4: 80001294 .word 0x80001294 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 800146c1 .word 0x800146c1 + 800012b0: 00000000 .word 0x00000000 + 800012b4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x582f3ab88b025fd0 + 800012b8: 000a3783 ld x15,0(x20) + 800012bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x91ddaddf79438aa5 + 800012c0: 000a3003 ld x0,0(x20) + 800012c4: 008a0a13 addi x20,x20,8 + +00000000800012c8 : +Zkne_aes64es_cg_cp_rd_b25: + aes64es x25, x15, x0 # perform operation + 800012c8: 32078cb3 aes64es x25,x15,x0 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zkne_aes64es_cg_cp_rd_b25, Zkne_aes64es_cg_cp_rd_b25_str) + 800012cc: 000fb383 ld x7,0(x31) + 800012d0: 01938c63 beq x7,x25,800012e8 + 800012d4: 6450946f jal x8,8000b118 + 800012d8: 800012c8 .word 0x800012c8 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 800146f6 .word 0x800146f6 + 800012e4: 00000000 .word 0x00000000 + 800012e8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xbd499ff3359b8b0e + 800012ec: 000a3983 ld x19,0(x20) + 800012f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0xad90371c53bd51d2 + 800012f4: 000a3283 ld x5,0(x20) + 800012f8: 008a0a13 addi x20,x20,8 + +00000000800012fc : +Zkne_aes64es_cg_cp_rd_b26: + aes64es x26, x19, x5 # perform operation + 800012fc: 32598d33 aes64es x26,x19,x5 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zkne_aes64es_cg_cp_rd_b26, Zkne_aes64es_cg_cp_rd_b26_str) + 80001300: 000fb383 ld x7,0(x31) + 80001304: 01a38c63 beq x7,x26,8000131c + 80001308: 6110946f jal x8,8000b118 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 8001472b .word 0x8001472b + 80001318: 00000000 .word 0x00000000 + 8000131c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x1c88bfc9c90f47a3 + 80001320: 000a3903 ld x18,0(x20) + 80001324: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x06d90f68bb89c07a + 80001328: 000a3183 ld x3,0(x20) + 8000132c: 008a0a13 addi x20,x20,8 + +0000000080001330 : +Zkne_aes64es_cg_cp_rd_b27: + aes64es x27, x18, x3 # perform operation + 80001330: 32390db3 aes64es x27,x18,x3 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zkne_aes64es_cg_cp_rd_b27, Zkne_aes64es_cg_cp_rd_b27_str) + 80001334: 000fb383 ld x7,0(x31) + 80001338: 01b38c63 beq x7,x27,80001350 + 8000133c: 5dd0946f jal x8,8000b118 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 80014760 .word 0x80014760 + 8000134c: 00000000 .word 0x00000000 + 80001350: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x4e3ecd9ea029788d + 80001354: 000a3983 ld x19,0(x20) + 80001358: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x489e74eae58a1b90 + 8000135c: 000a3e83 ld x29,0(x20) + 80001360: 008a0a13 addi x20,x20,8 + +0000000080001364 : +Zkne_aes64es_cg_cp_rd_b28: + aes64es x28, x19, x29 # perform operation + 80001364: 33d98e33 aes64es x28,x19,x29 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zkne_aes64es_cg_cp_rd_b28, Zkne_aes64es_cg_cp_rd_b28_str) + 80001368: 000fb383 ld x7,0(x31) + 8000136c: 01c38c63 beq x7,x28,80001384 + 80001370: 5a90946f jal x8,8000b118 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 80014795 .word 0x80014795 + 80001380: 00000000 .word 0x00000000 + 80001384: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xc37b05ff63a58674 + 80001388: 000a3283 ld x5,0(x20) + 8000138c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x2c71e3605a12ff36 + 80001390: 000a3e03 ld x28,0(x20) + 80001394: 008a0a13 addi x20,x20,8 + +0000000080001398 : +Zkne_aes64es_cg_cp_rd_b29: + aes64es x29, x5, x28 # perform operation + 80001398: 33c28eb3 aes64es x29,x5,x28 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zkne_aes64es_cg_cp_rd_b29, Zkne_aes64es_cg_cp_rd_b29_str) + 8000139c: 000fb383 ld x7,0(x31) + 800013a0: 01d38c63 beq x7,x29,800013b8 + 800013a4: 5750946f jal x8,8000b118 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 800147ca .word 0x800147ca + 800013b4: 00000000 .word 0x00000000 + 800013b8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x13c004892fe972e4 + 800013bc: 000a3203 ld x4,0(x20) + 800013c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x64ade55823620ca5 + 800013c4: 000a3a83 ld x21,0(x20) + 800013c8: 008a0a13 addi x20,x20,8 + +00000000800013cc : +Zkne_aes64es_cg_cp_rd_b30: + aes64es x30, x4, x21 # perform operation + 800013cc: 33520f33 aes64es x30,x4,x21 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zkne_aes64es_cg_cp_rd_b30, Zkne_aes64es_cg_cp_rd_b30_str) + 800013d0: 000fb383 ld x7,0(x31) + 800013d4: 01e38c63 beq x7,x30,800013ec + 800013d8: 5410946f jal x8,8000b118 + 800013dc: 800013cc .word 0x800013cc + 800013e0: 00000000 .word 0x00000000 + 800013e4: 800147ff .word 0x800147ff + 800013e8: 00000000 .word 0x00000000 + 800013ec: 008f8f93 addi x31,x31,8 + + mv x25, x31 # switch signature pointer register to avoid conflict with test + 800013f0: 000f8c93 addi x25,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xaae5d70a0dda23b6 + 800013f4: 000a3283 ld x5,0(x20) + 800013f8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xe2dc966beb92cdc6 + 800013fc: 000a3883 ld x17,0(x20) + 80001400: 008a0a13 addi x20,x20,8 + +0000000080001404 : +Zkne_aes64es_cg_cp_rd_b31: + aes64es x31, x5, x17 # perform operation + 80001404: 33128fb3 aes64es x31,x5,x17 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cp_rd_b31, Zkne_aes64es_cg_cp_rd_b31_str) + 80001408: 000cb383 ld x7,0(x25) + 8000140c: 01f38c63 beq x7,x31,80001424 + 80001410: 5090946f jal x8,8000b118 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 80014834 .word 0x80014834 + 80001420: 00000000 .word 0x00000000 + 80001424: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x0000000000000000 + 80001428: 000a3603 ld x12,0(x20) + 8000142c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x3f91682d4fdd9fd3 + 80001430: 000a3683 ld x13,0(x20) + 80001434: 008a0a13 addi x20,x20,8 + +0000000080001438 : +Zkne_aes64es_cg_cp_rs1_edges_0x0: + aes64es x5, x12, x13 # perform operation + 80001438: 32d602b3 aes64es x5,x12,x13 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cp_rs1_edges_0x0, Zkne_aes64es_cg_cp_rs1_edges_0x0_str) + 8000143c: 000cb383 ld x7,0(x25) + 80001440: 00538c63 beq x7,x5,80001458 + 80001444: 4d50946f jal x8,8000b118 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 80014869 .word 0x80014869 + 80001454: 00000000 .word 0x00000000 + 80001458: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x0000000000000001 + 8000145c: 000a3283 ld x5,0(x20) + 80001460: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x7b74f1672a1cd7d3 + 80001464: 000a3e03 ld x28,0(x20) + 80001468: 008a0a13 addi x20,x20,8 + +000000008000146c : +Zkne_aes64es_cg_cp_rs1_edges_0x1: + aes64es x17, x5, x28 # perform operation + 8000146c: 33c288b3 aes64es x17,x5,x28 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cp_rs1_edges_0x1, Zkne_aes64es_cg_cp_rs1_edges_0x1_str) + 80001470: 000cb383 ld x7,0(x25) + 80001474: 01138c63 beq x7,x17,8000148c + 80001478: 4a10946f jal x8,8000b118 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 800148a5 .word 0x800148a5 + 80001488: 00000000 .word 0x00000000 + 8000148c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x0000000000000002 + 80001490: 000a3783 ld x15,0(x20) + 80001494: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x2a410f81d73a7990 + 80001498: 000a3303 ld x6,0(x20) + 8000149c: 008a0a13 addi x20,x20,8 + +00000000800014a0 : +Zkne_aes64es_cg_cp_rs1_edges_0x2: + aes64es x27, x15, x6 # perform operation + 800014a0: 32678db3 aes64es x27,x15,x6 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cp_rs1_edges_0x2, Zkne_aes64es_cg_cp_rs1_edges_0x2_str) + 800014a4: 000cb383 ld x7,0(x25) + 800014a8: 01b38c63 beq x7,x27,800014c0 + 800014ac: 46d0946f jal x8,8000b118 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 800148e1 .word 0x800148e1 + 800014bc: 00000000 .word 0x00000000 + 800014c0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x8000000000000000 + 800014c4: 000a3a83 ld x21,0(x20) + 800014c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x034edd24732e80f7 + 800014cc: 000a3983 ld x19,0(x20) + 800014d0: 008a0a13 addi x20,x20,8 + +00000000800014d4 : +Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000000: + aes64es x13, x21, x19 # perform operation + 800014d4: 333a86b3 aes64es x13,x21,x19 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000000, Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d8: 000cb383 ld x7,0(x25) + 800014dc: 00d38c63 beq x7,x13,800014f4 + 800014e0: 4390946f jal x8,8000b118 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8001491d .word 0x8001491d + 800014f0: 00000000 .word 0x00000000 + 800014f4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x8000000000000001 + 800014f8: 000a3083 ld x1,0(x20) + 800014fc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x0ba1f6811d6b9352 + 80001500: 000a3e03 ld x28,0(x20) + 80001504: 008a0a13 addi x20,x20,8 + +0000000080001508 : +Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000001: + aes64es x17, x1, x28 # perform operation + 80001508: 33c088b3 aes64es x17,x1,x28 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000001, Zkne_aes64es_cg_cp_rs1_edges_0x8000000000000001_str) + 8000150c: 000cb383 ld x7,0(x25) + 80001510: 01138c63 beq x7,x17,80001528 + 80001514: 4050946f jal x8,8000b118 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 80014969 .word 0x80014969 + 80001524: 00000000 .word 0x00000000 + 80001528: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x7fffffffffffffff + 8000152c: 000a3c03 ld x24,0(x20) + 80001530: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x8adfdb4619c62900 + 80001534: 000a3903 ld x18,0(x20) + 80001538: 008a0a13 addi x20,x20,8 + +000000008000153c : +Zkne_aes64es_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64es x29, x24, x18 # perform operation + 8000153c: 332c0eb3 aes64es x29,x24,x18 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cp_rs1_edges_0x7fffffffffffffff, Zkne_aes64es_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001540: 000cb383 ld x7,0(x25) + 80001544: 01d38c63 beq x7,x29,8000155c + 80001548: 3d10946f jal x8,8000b118 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 800149b5 .word 0x800149b5 + 80001558: 00000000 .word 0x00000000 + 8000155c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80001560: 000a3303 ld x6,0(x20) + 80001564: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x6cc2c7ac9b3eec64 + 80001568: 000a3b83 ld x23,0(x20) + 8000156c: 008a0a13 addi x20,x20,8 + +0000000080001570 : +Zkne_aes64es_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64es x2, x6, x23 # perform operation + 80001570: 33730133 aes64es x2,x6,x23 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cp_rs1_edges_0x7ffffffffffffffe, Zkne_aes64es_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001574: 000cb383 ld x7,0(x25) + 80001578: 00238c63 beq x7,x2,80001590 + 8000157c: 39d0946f jal x8,8000b118 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 80014a01 .word 0x80014a01 + 8000158c: 00000000 .word 0x00000000 + 80001590: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xffffffffffffffff + 80001594: 000a3103 ld x2,0(x20) + 80001598: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x29332d758a400503 + 8000159c: 000a3a83 ld x21,0(x20) + 800015a0: 008a0a13 addi x20,x20,8 + +00000000800015a4 : +Zkne_aes64es_cg_cp_rs1_edges_0xffffffffffffffff: + aes64es x13, x2, x21 # perform operation + 800015a4: 335106b3 aes64es x13,x2,x21 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cp_rs1_edges_0xffffffffffffffff, Zkne_aes64es_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a8: 000cb383 ld x7,0(x25) + 800015ac: 00d38c63 beq x7,x13,800015c4 + 800015b0: 3690946f jal x8,8000b118 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 80014a4d .word 0x80014a4d + 800015c0: 00000000 .word 0x00000000 + 800015c4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xfffffffffffffffe + 800015c8: 000a3103 ld x2,0(x20) + 800015cc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xba45fbaabcfb1b5a + 800015d0: 000a3d03 ld x26,0(x20) + 800015d4: 008a0a13 addi x20,x20,8 + +00000000800015d8 : +Zkne_aes64es_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64es x3, x2, x26 # perform operation + 800015d8: 33a101b3 aes64es x3,x2,x26 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cp_rs1_edges_0xfffffffffffffffe, Zkne_aes64es_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015dc: 000cb383 ld x7,0(x25) + 800015e0: 00338c63 beq x7,x3,800015f8 + 800015e4: 3350946f jal x8,8000b118 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 80014a99 .word 0x80014a99 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800015fc: 000a3603 ld x12,0(x20) + 80001600: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x7610a608b1b51efa + 80001604: 000a3683 ld x13,0(x20) + 80001608: 008a0a13 addi x20,x20,8 + +000000008000160c : +Zkne_aes64es_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64es x27, x12, x13 # perform operation + 8000160c: 32d60db3 aes64es x27,x12,x13 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zkne_aes64es_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001610: 000cb383 ld x7,0(x25) + 80001614: 01b38c63 beq x7,x27,8000162c + 80001618: 3010946f jal x8,8000b118 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 80014ae5 .word 0x80014ae5 + 80001628: 00000000 .word 0x00000000 + 8000162c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80001630: 000a3983 ld x19,0(x20) + 80001634: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x8d6ca8b8743aec4e + 80001638: 000a3b03 ld x22,0(x20) + 8000163c: 008a0a13 addi x20,x20,8 + +0000000080001640 : +Zkne_aes64es_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64es x12, x19, x22 # perform operation + 80001640: 33698633 aes64es x12,x19,x22 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001644: 000cb383 ld x7,0(x25) + 80001648: 00c38c63 beq x7,x12,80001660 + 8000164c: 2cd0946f jal x8,8000b118 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 80014b31 .word 0x80014b31 + 8000165c: 00000000 .word 0x00000000 + 80001660: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x5555555555555555 + 80001664: 000a3183 ld x3,0(x20) + 80001668: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x85d75137c9613213 + 8000166c: 000a3483 ld x9,0(x20) + 80001670: 008a0a13 addi x20,x20,8 + +0000000080001674 : +Zkne_aes64es_cg_cp_rs1_edges_0x5555555555555555: + aes64es x6, x3, x9 # perform operation + 80001674: 32918333 aes64es x6,x3,x9 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cp_rs1_edges_0x5555555555555555, Zkne_aes64es_cg_cp_rs1_edges_0x5555555555555555_str) + 80001678: 000cb383 ld x7,0(x25) + 8000167c: 00638c63 beq x7,x6,80001694 + 80001680: 2990946f jal x8,8000b118 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 80014b7d .word 0x80014b7d + 80001690: 00000000 .word 0x00000000 + 80001694: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x00000000ffffffff + 80001698: 000a3483 ld x9,0(x20) + 8000169c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x1342fa94e0c5db0f + 800016a0: 000a3603 ld x12,0(x20) + 800016a4: 008a0a13 addi x20,x20,8 + +00000000800016a8 : +Zkne_aes64es_cg_cp_rs1_edges_0xffffffff: + aes64es x30, x9, x12 # perform operation + 800016a8: 32c48f33 aes64es x30,x9,x12 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cp_rs1_edges_0xffffffff, Zkne_aes64es_cg_cp_rs1_edges_0xffffffff_str) + 800016ac: 000cb383 ld x7,0(x25) + 800016b0: 01e38c63 beq x7,x30,800016c8 + 800016b4: 2650946f jal x8,8000b118 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 80014bc9 .word 0x80014bc9 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000000fffffffe + 800016cc: 000a3d03 ld x26,0(x20) + 800016d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xf9292a6c6b17d10d + 800016d4: 000a3e03 ld x28,0(x20) + 800016d8: 008a0a13 addi x20,x20,8 + +00000000800016dc : +Zkne_aes64es_cg_cp_rs1_edges_0xfffffffe: + aes64es x10, x26, x28 # perform operation + 800016dc: 33cd0533 aes64es x10,x26,x28 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cp_rs1_edges_0xfffffffe, Zkne_aes64es_cg_cp_rs1_edges_0xfffffffe_str) + 800016e0: 000cb383 ld x7,0(x25) + 800016e4: 00a38c63 beq x7,x10,800016fc + 800016e8: 2310946f jal x8,8000b118 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 80014c0d .word 0x80014c0d + 800016f8: 00000000 .word 0x00000000 + 800016fc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x0000000100000000 + 80001700: 000a3f03 ld x30,0(x20) + 80001704: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xbae9de5a5fc17d78 + 80001708: 000a3783 ld x15,0(x20) + 8000170c: 008a0a13 addi x20,x20,8 + +0000000080001710 : +Zkne_aes64es_cg_cp_rs1_edges_0x100000000: + aes64es x16, x30, x15 # perform operation + 80001710: 32ff0833 aes64es x16,x30,x15 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cp_rs1_edges_0x100000000, Zkne_aes64es_cg_cp_rs1_edges_0x100000000_str) + 80001714: 000cb383 ld x7,0(x25) + 80001718: 01038c63 beq x7,x16,80001730 + 8000171c: 1fd0946f jal x8,8000b118 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 80014c51 .word 0x80014c51 + 8000172c: 00000000 .word 0x00000000 + 80001730: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000100000001 + 80001734: 000a3803 ld x16,0(x20) + 80001738: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xc589f6eec25a3ed3 + 8000173c: 000a3583 ld x11,0(x20) + 80001740: 008a0a13 addi x20,x20,8 + +0000000080001744 : +Zkne_aes64es_cg_cp_rs1_edges_0x100000001: + aes64es x30, x16, x11 # perform operation + 80001744: 32b80f33 aes64es x30,x16,x11 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cp_rs1_edges_0x100000001, Zkne_aes64es_cg_cp_rs1_edges_0x100000001_str) + 80001748: 000cb383 ld x7,0(x25) + 8000174c: 01e38c63 beq x7,x30,80001764 + 80001750: 1c90946f jal x8,8000b118 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 80014c96 .word 0x80014c96 + 80001760: 00000000 .word 0x00000000 + 80001764: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xa3d265cc7acc726c + 80001768: 000a3703 ld x14,0(x20) + 8000176c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000000000000 + 80001770: 000a3283 ld x5,0(x20) + 80001774: 008a0a13 addi x20,x20,8 + +0000000080001778 : +Zkne_aes64es_cg_cp_rs2_edges_0x0: + aes64es x27, x14, x5 # perform operation + 80001778: 32570db3 aes64es x27,x14,x5 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cp_rs2_edges_0x0, Zkne_aes64es_cg_cp_rs2_edges_0x0_str) + 8000177c: 000cb383 ld x7,0(x25) + 80001780: 01b38c63 beq x7,x27,80001798 + 80001784: 1950946f jal x8,8000b118 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 80014cdb .word 0x80014cdb + 80001794: 00000000 .word 0x00000000 + 80001798: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x870579e8ff19cec6 + 8000179c: 000a3e03 ld x28,0(x20) + 800017a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x0000000000000001 + 800017a4: 000a3083 ld x1,0(x20) + 800017a8: 008a0a13 addi x20,x20,8 + +00000000800017ac : +Zkne_aes64es_cg_cp_rs2_edges_0x1: + aes64es x3, x28, x1 # perform operation + 800017ac: 321e01b3 aes64es x3,x28,x1 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cp_rs2_edges_0x1, Zkne_aes64es_cg_cp_rs2_edges_0x1_str) + 800017b0: 000cb383 ld x7,0(x25) + 800017b4: 00338c63 beq x7,x3,800017cc + 800017b8: 1610946f jal x8,8000b118 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 80014d18 .word 0x80014d18 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x7e25911ccc4272b9 + 800017d0: 000a3283 ld x5,0(x20) + 800017d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000000000002 + 800017d8: 000a3683 ld x13,0(x20) + 800017dc: 008a0a13 addi x20,x20,8 + +00000000800017e0 : +Zkne_aes64es_cg_cp_rs2_edges_0x2: + aes64es x4, x5, x13 # perform operation + 800017e0: 32d28233 aes64es x4,x5,x13 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cp_rs2_edges_0x2, Zkne_aes64es_cg_cp_rs2_edges_0x2_str) + 800017e4: 000cb383 ld x7,0(x25) + 800017e8: 00438c63 beq x7,x4,80001800 + 800017ec: 12d0946f jal x8,8000b118 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 80014d55 .word 0x80014d55 + 800017fc: 00000000 .word 0x00000000 + 80001800: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x5cd07f0436b8c084 + 80001804: 000a3303 ld x6,0(x20) + 80001808: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x8000000000000000 + 8000180c: 000a3d03 ld x26,0(x20) + 80001810: 008a0a13 addi x20,x20,8 + +0000000080001814 : +Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000000: + aes64es x10, x6, x26 # perform operation + 80001814: 33a30533 aes64es x10,x6,x26 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000000, Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000000_str) + 80001818: 000cb383 ld x7,0(x25) + 8000181c: 00a38c63 beq x7,x10,80001834 + 80001820: 0f90946f jal x8,8000b118 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 80014d92 .word 0x80014d92 + 80001830: 00000000 .word 0x00000000 + 80001834: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xfea84a4b1038e325 + 80001838: 000a3b83 ld x23,0(x20) + 8000183c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x8000000000000001 + 80001840: 000a3b03 ld x22,0(x20) + 80001844: 008a0a13 addi x20,x20,8 + +0000000080001848 : +Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000001: + aes64es x2, x23, x22 # perform operation + 80001848: 336b8133 aes64es x2,x23,x22 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000001, Zkne_aes64es_cg_cp_rs2_edges_0x8000000000000001_str) + 8000184c: 000cb383 ld x7,0(x25) + 80001850: 00238c63 beq x7,x2,80001868 + 80001854: 0c50946f jal x8,8000b118 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 80014dde .word 0x80014dde + 80001864: 00000000 .word 0x00000000 + 80001868: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x8795d93cbe32b573 + 8000186c: 000a3603 ld x12,0(x20) + 80001870: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x7fffffffffffffff + 80001874: 000a3483 ld x9,0(x20) + 80001878: 008a0a13 addi x20,x20,8 + +000000008000187c : +Zkne_aes64es_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64es x22, x12, x9 # perform operation + 8000187c: 32960b33 aes64es x22,x12,x9 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cp_rs2_edges_0x7fffffffffffffff, Zkne_aes64es_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001880: 000cb383 ld x7,0(x25) + 80001884: 01638c63 beq x7,x22,8000189c + 80001888: 0910946f jal x8,8000b118 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 80014e2a .word 0x80014e2a + 80001898: 00000000 .word 0x00000000 + 8000189c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xb1287503152f3a1f + 800018a0: 000a3e83 ld x29,0(x20) + 800018a4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x7ffffffffffffffe + 800018a8: 000a3783 ld x15,0(x20) + 800018ac: 008a0a13 addi x20,x20,8 + +00000000800018b0 : +Zkne_aes64es_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64es x2, x29, x15 # perform operation + 800018b0: 32fe8133 aes64es x2,x29,x15 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cp_rs2_edges_0x7ffffffffffffffe, Zkne_aes64es_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b4: 000cb383 ld x7,0(x25) + 800018b8: 00238c63 beq x7,x2,800018d0 + 800018bc: 05d0946f jal x8,8000b118 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 80014e76 .word 0x80014e76 + 800018cc: 00000000 .word 0x00000000 + 800018d0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x5709cd1383c5066d + 800018d4: 000a3883 ld x17,0(x20) + 800018d8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xffffffffffffffff + 800018dc: 000a3703 ld x14,0(x20) + 800018e0: 008a0a13 addi x20,x20,8 + +00000000800018e4 : +Zkne_aes64es_cg_cp_rs2_edges_0xffffffffffffffff: + aes64es x30, x17, x14 # perform operation + 800018e4: 32e88f33 aes64es x30,x17,x14 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cp_rs2_edges_0xffffffffffffffff, Zkne_aes64es_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e8: 000cb383 ld x7,0(x25) + 800018ec: 01e38c63 beq x7,x30,80001904 + 800018f0: 0290946f jal x8,8000b118 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 80014ec2 .word 0x80014ec2 + 80001900: 00000000 .word 0x00000000 + 80001904: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x02a69dd32449da21 + 80001908: 000a3203 ld x4,0(x20) + 8000190c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xfffffffffffffffe + 80001910: 000a3f83 ld x31,0(x20) + 80001914: 008a0a13 addi x20,x20,8 + +0000000080001918 : +Zkne_aes64es_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64es x23, x4, x31 # perform operation + 80001918: 33f20bb3 aes64es x23,x4,x31 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cp_rs2_edges_0xfffffffffffffffe, Zkne_aes64es_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000191c: 000cb383 ld x7,0(x25) + 80001920: 01738c63 beq x7,x23,80001938 + 80001924: 7f40946f jal x8,8000b118 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 80014f0e .word 0x80014f0e + 80001934: 00000000 .word 0x00000000 + 80001938: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x79a5ca9fe3b15694 + 8000193c: 000a3583 ld x11,0(x20) + 80001940: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80001944: 000a3183 ld x3,0(x20) + 80001948: 008a0a13 addi x20,x20,8 + +000000008000194c : +Zkne_aes64es_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64es x6, x11, x3 # perform operation + 8000194c: 32358333 aes64es x6,x11,x3 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zkne_aes64es_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001950: 000cb383 ld x7,0(x25) + 80001954: 00638c63 beq x7,x6,8000196c + 80001958: 7c00946f jal x8,8000b118 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 80014f5a .word 0x80014f5a + 80001968: 00000000 .word 0x00000000 + 8000196c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x914a9785283bcf04 + 80001970: 000a3283 ld x5,0(x20) + 80001974: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xaaaaaaaaaaaaaaaa + 80001978: 000a3503 ld x10,0(x20) + 8000197c: 008a0a13 addi x20,x20,8 + +0000000080001980 : +Zkne_aes64es_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64es x3, x5, x10 # perform operation + 80001980: 32a281b3 aes64es x3,x5,x10 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001984: 000cb383 ld x7,0(x25) + 80001988: 00338c63 beq x7,x3,800019a0 + 8000198c: 78c0946f jal x8,8000b118 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 80014fa6 .word 0x80014fa6 + 8000199c: 00000000 .word 0x00000000 + 800019a0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x79a12f5e28ce7beb + 800019a4: 000a3a83 ld x21,0(x20) + 800019a8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x5555555555555555 + 800019ac: 000a3c03 ld x24,0(x20) + 800019b0: 008a0a13 addi x20,x20,8 + +00000000800019b4 : +Zkne_aes64es_cg_cp_rs2_edges_0x5555555555555555: + aes64es x23, x21, x24 # perform operation + 800019b4: 338a8bb3 aes64es x23,x21,x24 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cp_rs2_edges_0x5555555555555555, Zkne_aes64es_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b8: 000cb383 ld x7,0(x25) + 800019bc: 01738c63 beq x7,x23,800019d4 + 800019c0: 7580946f jal x8,8000b118 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 80014ff2 .word 0x80014ff2 + 800019d0: 00000000 .word 0x00000000 + 800019d4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x636c0970462556c1 + 800019d8: 000a3b83 ld x23,0(x20) + 800019dc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x00000000ffffffff + 800019e0: 000a3d03 ld x26,0(x20) + 800019e4: 008a0a13 addi x20,x20,8 + +00000000800019e8 : +Zkne_aes64es_cg_cp_rs2_edges_0xffffffff: + aes64es x11, x23, x26 # perform operation + 800019e8: 33ab85b3 aes64es x11,x23,x26 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cp_rs2_edges_0xffffffff, Zkne_aes64es_cg_cp_rs2_edges_0xffffffff_str) + 800019ec: 000cb383 ld x7,0(x25) + 800019f0: 00b38c63 beq x7,x11,80001a08 + 800019f4: 7240946f jal x8,8000b118 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 8001503e .word 0x8001503e + 80001a04: 00000000 .word 0x00000000 + 80001a08: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x95da88fed45fe6d5 + 80001a0c: 000a3583 ld x11,0(x20) + 80001a10: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x00000000fffffffe + 80001a14: 000a3183 ld x3,0(x20) + 80001a18: 008a0a13 addi x20,x20,8 + +0000000080001a1c : +Zkne_aes64es_cg_cp_rs2_edges_0xfffffffe: + aes64es x16, x11, x3 # perform operation + 80001a1c: 32358833 aes64es x16,x11,x3 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cp_rs2_edges_0xfffffffe, Zkne_aes64es_cg_cp_rs2_edges_0xfffffffe_str) + 80001a20: 000cb383 ld x7,0(x25) + 80001a24: 01038c63 beq x7,x16,80001a3c + 80001a28: 6f00946f jal x8,8000b118 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 80015082 .word 0x80015082 + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x0b28c5b3c6079d55 + 80001a40: 000a3183 ld x3,0(x20) + 80001a44: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000100000000 + 80001a48: 000a3583 ld x11,0(x20) + 80001a4c: 008a0a13 addi x20,x20,8 + +0000000080001a50 : +Zkne_aes64es_cg_cp_rs2_edges_0x100000000: + aes64es x19, x3, x11 # perform operation + 80001a50: 32b189b3 aes64es x19,x3,x11 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cp_rs2_edges_0x100000000, Zkne_aes64es_cg_cp_rs2_edges_0x100000000_str) + 80001a54: 000cb383 ld x7,0(x25) + 80001a58: 01338c63 beq x7,x19,80001a70 + 80001a5c: 6bc0946f jal x8,8000b118 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 800150c6 .word 0x800150c6 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x124f40c173d0f868 + 80001a74: 000a3d03 ld x26,0(x20) + 80001a78: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x0000000100000001 + 80001a7c: 000a3603 ld x12,0(x20) + 80001a80: 008a0a13 addi x20,x20,8 + +0000000080001a84 : +Zkne_aes64es_cg_cp_rs2_edges_0x100000001: + aes64es x27, x26, x12 # perform operation + 80001a84: 32cd0db3 aes64es x27,x26,x12 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cp_rs2_edges_0x100000001, Zkne_aes64es_cg_cp_rs2_edges_0x100000001_str) + 80001a88: 000cb383 ld x7,0(x25) + 80001a8c: 01b38c63 beq x7,x27,80001aa4 + 80001a90: 6880946f jal x8,8000b118 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8001510b .word 0x8001510b + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000000000000 + 80001aa8: 000a3503 ld x10,0(x20) + 80001aac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000000000000 + 80001ab0: 000a3983 ld x19,0(x20) + 80001ab4: 008a0a13 addi x20,x20,8 + +0000000080001ab8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64es x13, x10, x19 # perform operation + 80001ab8: 333506b3 aes64es x13,x10,x19 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001abc: 000cb383 ld x7,0(x25) + 80001ac0: 00d38c63 beq x7,x13,80001ad8 + 80001ac4: 6540946f jal x8,8000b118 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 80015150 .word 0x80015150 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000000000000 + 80001adc: 000a3803 ld x16,0(x20) + 80001ae0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000000000001 + 80001ae4: 000a3983 ld x19,0(x20) + 80001ae8: 008a0a13 addi x20,x20,8 + +0000000080001aec : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64es x17, x16, x19 # perform operation + 80001aec: 333808b3 aes64es x17,x16,x19 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af0: 000cb383 ld x7,0(x25) + 80001af4: 01138c63 beq x7,x17,80001b0c + 80001af8: 6200946f jal x8,8000b118 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 800151a4 .word 0x800151a4 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000000000000 + 80001b10: 000a3803 ld x16,0(x20) + 80001b14: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000000000002 + 80001b18: 000a3983 ld x19,0(x20) + 80001b1c: 008a0a13 addi x20,x20,8 + +0000000080001b20 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64es x23, x16, x19 # perform operation + 80001b20: 33380bb3 aes64es x23,x16,x19 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b24: 000cb383 ld x7,0(x25) + 80001b28: 01738c63 beq x7,x23,80001b40 + 80001b2c: 5ec0946f jal x8,8000b118 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 800151f8 .word 0x800151f8 + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x0000000000000000 + 80001b44: 000a3d83 ld x27,0(x20) + 80001b48: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x8000000000000000 + 80001b4c: 000a3e03 ld x28,0(x20) + 80001b50: 008a0a13 addi x20,x20,8 + +0000000080001b54 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64es x19, x27, x28 # perform operation + 80001b54: 33cd89b3 aes64es x19,x27,x28 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b58: 000cb383 ld x7,0(x25) + 80001b5c: 01338c63 beq x7,x19,80001b74 + 80001b60: 5b80946f jal x8,8000b118 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 8001524c .word 0x8001524c + 80001b70: 00000000 .word 0x00000000 + 80001b74: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x0000000000000000 + 80001b78: 000a3703 ld x14,0(x20) + 80001b7c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x8000000000000001 + 80001b80: 000a3683 ld x13,0(x20) + 80001b84: 008a0a13 addi x20,x20,8 + +0000000080001b88 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64es x21, x14, x13 # perform operation + 80001b88: 32d70ab3 aes64es x21,x14,x13 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b8c: 000cb383 ld x7,0(x25) + 80001b90: 01538c63 beq x7,x21,80001ba8 + 80001b94: 5840946f jal x8,8000b118 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 800152af .word 0x800152af + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x0000000000000000 + 80001bac: 000a3a83 ld x21,0(x20) + 80001bb0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x7fffffffffffffff + 80001bb4: 000a3d83 ld x27,0(x20) + 80001bb8: 008a0a13 addi x20,x20,8 + +0000000080001bbc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64es x26, x21, x27 # perform operation + 80001bbc: 33ba8d33 aes64es x26,x21,x27 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc0: 000cb383 ld x7,0(x25) + 80001bc4: 01a38c63 beq x7,x26,80001bdc + 80001bc8: 5500946f jal x8,8000b118 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 80015312 .word 0x80015312 + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x0000000000000000 + 80001be0: 000a3883 ld x17,0(x20) + 80001be4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80001be8: 000a3903 ld x18,0(x20) + 80001bec: 008a0a13 addi x20,x20,8 + +0000000080001bf0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64es x31, x17, x18 # perform operation + 80001bf0: 33288fb3 aes64es x31,x17,x18 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf4: 000cb383 ld x7,0(x25) + 80001bf8: 01f38c63 beq x7,x31,80001c10 + 80001bfc: 51c0946f jal x8,8000b118 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 80015375 .word 0x80015375 + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000000000000 + 80001c14: 000a3503 ld x10,0(x20) + 80001c18: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xffffffffffffffff + 80001c1c: 000a3883 ld x17,0(x20) + 80001c20: 008a0a13 addi x20,x20,8 + +0000000080001c24 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64es x30, x10, x17 # perform operation + 80001c24: 33150f33 aes64es x30,x10,x17 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c28: 000cb383 ld x7,0(x25) + 80001c2c: 01e38c63 beq x7,x30,80001c44 + 80001c30: 4e80946f jal x8,8000b118 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 800153d8 .word 0x800153d8 + 80001c40: 00000000 .word 0x00000000 + 80001c44: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x0000000000000000 + 80001c48: 000a3603 ld x12,0(x20) + 80001c4c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xfffffffffffffffe + 80001c50: 000a3b03 ld x22,0(x20) + 80001c54: 008a0a13 addi x20,x20,8 + +0000000080001c58 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64es x5, x12, x22 # perform operation + 80001c58: 336602b3 aes64es x5,x12,x22 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c5c: 000cb383 ld x7,0(x25) + 80001c60: 00538c63 beq x7,x5,80001c78 + 80001c64: 4b40946f jal x8,8000b118 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 8001543b .word 0x8001543b + 80001c74: 00000000 .word 0x00000000 + 80001c78: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x0000000000000000 + 80001c7c: 000a3483 ld x9,0(x20) + 80001c80: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80001c84: 000a3703 ld x14,0(x20) + 80001c88: 008a0a13 addi x20,x20,8 + +0000000080001c8c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64es x29, x9, x14 # perform operation + 80001c8c: 32e48eb3 aes64es x29,x9,x14 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c90: 000cb383 ld x7,0(x25) + 80001c94: 01d38c63 beq x7,x29,80001cac + 80001c98: 4800946f jal x8,8000b118 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 8001549e .word 0x8001549e + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x0000000000000000 + 80001cb0: 000a3283 ld x5,0(x20) + 80001cb4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80001cb8: 000a3683 ld x13,0(x20) + 80001cbc: 008a0a13 addi x20,x20,8 + +0000000080001cc0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x14, x5, x13 # perform operation + 80001cc0: 32d28733 aes64es x14,x5,x13 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc4: 000cb383 ld x7,0(x25) + 80001cc8: 00e38c63 beq x7,x14,80001ce0 + 80001ccc: 44c0946f jal x8,8000b118 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 80015501 .word 0x80015501 + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x0000000000000000 + 80001ce4: 000a3603 ld x12,0(x20) + 80001ce8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x5555555555555555 + 80001cec: 000a3d03 ld x26,0(x20) + 80001cf0: 008a0a13 addi x20,x20,8 + +0000000080001cf4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64es x9, x12, x26 # perform operation + 80001cf4: 33a604b3 aes64es x9,x12,x26 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf8: 000cb383 ld x7,0(x25) + 80001cfc: 00938c63 beq x7,x9,80001d14 + 80001d00: 4180946f jal x8,8000b118 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 80015564 .word 0x80015564 + 80001d10: 00000000 .word 0x00000000 + 80001d14: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000000000000 + 80001d18: 000a3803 ld x16,0(x20) + 80001d1c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x00000000ffffffff + 80001d20: 000a3f83 ld x31,0(x20) + 80001d24: 008a0a13 addi x20,x20,8 + +0000000080001d28 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64es x2, x16, x31 # perform operation + 80001d28: 33f80133 aes64es x2,x16,x31 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d2c: 000cb383 ld x7,0(x25) + 80001d30: 00238c63 beq x7,x2,80001d48 + 80001d34: 3e40946f jal x8,8000b118 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 800155c7 .word 0x800155c7 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x0000000000000000 + 80001d4c: 000a3d83 ld x27,0(x20) + 80001d50: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x00000000fffffffe + 80001d54: 000a3483 ld x9,0(x20) + 80001d58: 008a0a13 addi x20,x20,8 + +0000000080001d5c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64es x5, x27, x9 # perform operation + 80001d5c: 329d82b3 aes64es x5,x27,x9 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d60: 000cb383 ld x7,0(x25) + 80001d64: 00538c63 beq x7,x5,80001d7c + 80001d68: 3b00946f jal x8,8000b118 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 80015622 .word 0x80015622 + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x0000000000000000 + 80001d80: 000a3583 ld x11,0(x20) + 80001d84: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000100000000 + 80001d88: 000a3d83 ld x27,0(x20) + 80001d8c: 008a0a13 addi x20,x20,8 + +0000000080001d90 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64es x22, x11, x27 # perform operation + 80001d90: 33b58b33 aes64es x22,x11,x27 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d94: 000cb383 ld x7,0(x25) + 80001d98: 01638c63 beq x7,x22,80001db0 + 80001d9c: 37c0946f jal x8,8000b118 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 8001567d .word 0x8001567d + 80001dac: 00000000 .word 0x00000000 + 80001db0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000000000000 + 80001db4: 000a3503 ld x10,0(x20) + 80001db8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x0000000100000001 + 80001dbc: 000a3183 ld x3,0(x20) + 80001dc0: 008a0a13 addi x20,x20,8 + +0000000080001dc4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64es x21, x10, x3 # perform operation + 80001dc4: 32350ab3 aes64es x21,x10,x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc8: 000cb383 ld x7,0(x25) + 80001dcc: 01538c63 beq x7,x21,80001de4 + 80001dd0: 3480946f jal x8,8000b118 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 800156d9 .word 0x800156d9 + 80001de0: 00000000 .word 0x00000000 + 80001de4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x0000000000000001 + 80001de8: 000a3783 ld x15,0(x20) + 80001dec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0000000000000000 + 80001df0: 000a3b83 ld x23,0(x20) + 80001df4: 008a0a13 addi x20,x20,8 + +0000000080001df8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64es x22, x15, x23 # perform operation + 80001df8: 33778b33 aes64es x22,x15,x23 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dfc: 000cb383 ld x7,0(x25) + 80001e00: 01638c63 beq x7,x22,80001e18 + 80001e04: 3140946f jal x8,8000b118 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 80015735 .word 0x80015735 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x0000000000000001 + 80001e1c: 000a3483 ld x9,0(x20) + 80001e20: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x0000000000000001 + 80001e24: 000a3e83 ld x29,0(x20) + 80001e28: 008a0a13 addi x20,x20,8 + +0000000080001e2c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64es x6, x9, x29 # perform operation + 80001e2c: 33d48333 aes64es x6,x9,x29 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e30: 000cb383 ld x7,0(x25) + 80001e34: 00638c63 beq x7,x6,80001e4c + 80001e38: 2e00946f jal x8,8000b118 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 80015789 .word 0x80015789 + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x0000000000000001 + 80001e50: 000a3183 ld x3,0(x20) + 80001e54: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x0000000000000002 + 80001e58: 000a3803 ld x16,0(x20) + 80001e5c: 008a0a13 addi x20,x20,8 + +0000000080001e60 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64es x29, x3, x16 # perform operation + 80001e60: 33018eb3 aes64es x29,x3,x16 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e64: 000cb383 ld x7,0(x25) + 80001e68: 01d38c63 beq x7,x29,80001e80 + 80001e6c: 2ac0946f jal x8,8000b118 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 800157dd .word 0x800157dd + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x0000000000000001 + 80001e84: 000a3d03 ld x26,0(x20) + 80001e88: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x8000000000000000 + 80001e8c: 000a3903 ld x18,0(x20) + 80001e90: 008a0a13 addi x20,x20,8 + +0000000080001e94 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64es x1, x26, x18 # perform operation + 80001e94: 332d00b3 aes64es x1,x26,x18 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e98: 000cb383 ld x7,0(x25) + 80001e9c: 00138c63 beq x7,x1,80001eb4 + 80001ea0: 2780946f jal x8,8000b118 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 80015831 .word 0x80015831 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x0000000000000001 + 80001eb8: 000a3303 ld x6,0(x20) + 80001ebc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x8000000000000001 + 80001ec0: 000a3b83 ld x23,0(x20) + 80001ec4: 008a0a13 addi x20,x20,8 + +0000000080001ec8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64es x5, x6, x23 # perform operation + 80001ec8: 337302b3 aes64es x5,x6,x23 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ecc: 000cb383 ld x7,0(x25) + 80001ed0: 00538c63 beq x7,x5,80001ee8 + 80001ed4: 2440946f jal x8,8000b118 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 80015894 .word 0x80015894 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x0000000000000001 + 80001eec: 000a3983 ld x19,0(x20) + 80001ef0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x7fffffffffffffff + 80001ef4: 000a3103 ld x2,0(x20) + 80001ef8: 008a0a13 addi x20,x20,8 + +0000000080001efc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64es x21, x19, x2 # perform operation + 80001efc: 32298ab3 aes64es x21,x19,x2 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f00: 000cb383 ld x7,0(x25) + 80001f04: 01538c63 beq x7,x21,80001f1c + 80001f08: 2100946f jal x8,8000b118 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 800158f7 .word 0x800158f7 + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x0000000000000001 + 80001f20: 000a3903 ld x18,0(x20) + 80001f24: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80001f28: 000a3983 ld x19,0(x20) + 80001f2c: 008a0a13 addi x20,x20,8 + +0000000080001f30 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64es x9, x18, x19 # perform operation + 80001f30: 333904b3 aes64es x9,x18,x19 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f34: 000cb383 ld x7,0(x25) + 80001f38: 00938c63 beq x7,x9,80001f50 + 80001f3c: 1dc0946f jal x8,8000b118 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 8001595a .word 0x8001595a + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x0000000000000001 + 80001f54: 000a3103 ld x2,0(x20) + 80001f58: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xffffffffffffffff + 80001f5c: 000a3603 ld x12,0(x20) + 80001f60: 008a0a13 addi x20,x20,8 + +0000000080001f64 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64es x22, x2, x12 # perform operation + 80001f64: 32c10b33 aes64es x22,x2,x12 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f68: 000cb383 ld x7,0(x25) + 80001f6c: 01638c63 beq x7,x22,80001f84 + 80001f70: 1a80946f jal x8,8000b118 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 800159bd .word 0x800159bd + 80001f80: 00000000 .word 0x00000000 + 80001f84: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x0000000000000001 + 80001f88: 000a3083 ld x1,0(x20) + 80001f8c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xfffffffffffffffe + 80001f90: 000a3e03 ld x28,0(x20) + 80001f94: 008a0a13 addi x20,x20,8 + +0000000080001f98 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64es x17, x1, x28 # perform operation + 80001f98: 33c088b3 aes64es x17,x1,x28 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f9c: 000cb383 ld x7,0(x25) + 80001fa0: 01138c63 beq x7,x17,80001fb8 + 80001fa4: 1740946f jal x8,8000b118 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 80015a20 .word 0x80015a20 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000000000001 + 80001fbc: 000a3803 ld x16,0(x20) + 80001fc0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80001fc4: 000a3183 ld x3,0(x20) + 80001fc8: 008a0a13 addi x20,x20,8 + +0000000080001fcc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64es x31, x16, x3 # perform operation + 80001fcc: 32380fb3 aes64es x31,x16,x3 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd0: 000cb383 ld x7,0(x25) + 80001fd4: 01f38c63 beq x7,x31,80001fec + 80001fd8: 1400946f jal x8,8000b118 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 80015a83 .word 0x80015a83 + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x0000000000000001 + 80001ff0: 000a3303 ld x6,0(x20) + 80001ff4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80001ff8: 000a3983 ld x19,0(x20) + 80001ffc: 008a0a13 addi x20,x20,8 + +0000000080002000 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x10, x6, x19 # perform operation + 80002000: 33330533 aes64es x10,x6,x19 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002004: 000cb383 ld x7,0(x25) + 80002008: 00a38c63 beq x7,x10,80002020 + 8000200c: 10c0946f jal x8,8000b118 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 80015ae6 .word 0x80015ae6 + 8000201c: 00000000 .word 0x00000000 + 80002020: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x0000000000000001 + 80002024: 000a3f03 ld x30,0(x20) + 80002028: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x5555555555555555 + 8000202c: 000a3303 ld x6,0(x20) + 80002030: 008a0a13 addi x20,x20,8 + +0000000080002034 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64es x10, x30, x6 # perform operation + 80002034: 326f0533 aes64es x10,x30,x6 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002038: 000cb383 ld x7,0(x25) + 8000203c: 00a38c63 beq x7,x10,80002054 + 80002040: 0d80946f jal x8,8000b118 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 80015b49 .word 0x80015b49 + 80002050: 00000000 .word 0x00000000 + 80002054: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000000000001 + 80002058: 000a3503 ld x10,0(x20) + 8000205c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x00000000ffffffff + 80002060: 000a3483 ld x9,0(x20) + 80002064: 008a0a13 addi x20,x20,8 + +0000000080002068 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64es x17, x10, x9 # perform operation + 80002068: 329508b3 aes64es x17,x10,x9 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000206c: 000cb383 ld x7,0(x25) + 80002070: 01138c63 beq x7,x17,80002088 + 80002074: 0a40946f jal x8,8000b118 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 80015bac .word 0x80015bac + 80002084: 00000000 .word 0x00000000 + 80002088: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x0000000000000001 + 8000208c: 000a3083 ld x1,0(x20) + 80002090: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x00000000fffffffe + 80002094: 000a3283 ld x5,0(x20) + 80002098: 008a0a13 addi x20,x20,8 + +000000008000209c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64es x6, x1, x5 # perform operation + 8000209c: 32508333 aes64es x6,x1,x5 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a0: 000cb383 ld x7,0(x25) + 800020a4: 00638c63 beq x7,x6,800020bc + 800020a8: 0700946f jal x8,8000b118 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80015c07 .word 0x80015c07 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x0000000000000001 + 800020c0: 000a3e83 ld x29,0(x20) + 800020c4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000100000000 + 800020c8: 000a3583 ld x11,0(x20) + 800020cc: 008a0a13 addi x20,x20,8 + +00000000800020d0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64es x21, x29, x11 # perform operation + 800020d0: 32be8ab3 aes64es x21,x29,x11 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d4: 000cb383 ld x7,0(x25) + 800020d8: 01538c63 beq x7,x21,800020f0 + 800020dc: 03c0946f jal x8,8000b118 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 80015c62 .word 0x80015c62 + 800020ec: 00000000 .word 0x00000000 + 800020f0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000000000001 + 800020f4: 000a3f83 ld x31,0(x20) + 800020f8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x0000000100000001 + 800020fc: 000a3903 ld x18,0(x20) + 80002100: 008a0a13 addi x20,x20,8 + +0000000080002104 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64es x27, x31, x18 # perform operation + 80002104: 332f8db3 aes64es x27,x31,x18 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002108: 000cb383 ld x7,0(x25) + 8000210c: 01b38c63 beq x7,x27,80002124 + 80002110: 0080946f jal x8,8000b118 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80015cbe .word 0x80015cbe + 80002120: 00000000 .word 0x00000000 + 80002124: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x0000000000000002 + 80002128: 000a3203 ld x4,0(x20) + 8000212c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x0000000000000000 + 80002130: 000a3783 ld x15,0(x20) + 80002134: 008a0a13 addi x20,x20,8 + +0000000080002138 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64es x19, x4, x15 # perform operation + 80002138: 32f209b3 aes64es x19,x4,x15 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000213c: 000cb383 ld x7,0(x25) + 80002140: 01338c63 beq x7,x19,80002158 + 80002144: 7d50846f jal x8,8000b118 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80015d1a .word 0x80015d1a + 80002154: 00000000 .word 0x00000000 + 80002158: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x0000000000000002 + 8000215c: 000a3b83 ld x23,0(x20) + 80002160: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000000000001 + 80002164: 000a3d83 ld x27,0(x20) + 80002168: 008a0a13 addi x20,x20,8 + +000000008000216c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64es x12, x23, x27 # perform operation + 8000216c: 33bb8633 aes64es x12,x23,x27 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002170: 000cb383 ld x7,0(x25) + 80002174: 00c38c63 beq x7,x12,8000218c + 80002178: 7a10846f jal x8,8000b118 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 80015d6e .word 0x80015d6e + 80002188: 00000000 .word 0x00000000 + 8000218c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x0000000000000002 + 80002190: 000a3883 ld x17,0(x20) + 80002194: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x0000000000000002 + 80002198: 000a3183 ld x3,0(x20) + 8000219c: 008a0a13 addi x20,x20,8 + +00000000800021a0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64es x4, x17, x3 # perform operation + 800021a0: 32388233 aes64es x4,x17,x3 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a4: 000cb383 ld x7,0(x25) + 800021a8: 00438c63 beq x7,x4,800021c0 + 800021ac: 76d0846f jal x8,8000b118 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80015dc2 .word 0x80015dc2 + 800021bc: 00000000 .word 0x00000000 + 800021c0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000000000002 + 800021c4: 000a3f83 ld x31,0(x20) + 800021c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x8000000000000000 + 800021cc: 000a3f03 ld x30,0(x20) + 800021d0: 008a0a13 addi x20,x20,8 + +00000000800021d4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64es x23, x31, x30 # perform operation + 800021d4: 33ef8bb3 aes64es x23,x31,x30 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d8: 000cb383 ld x7,0(x25) + 800021dc: 01738c63 beq x7,x23,800021f4 + 800021e0: 7390846f jal x8,8000b118 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80015e16 .word 0x80015e16 + 800021f0: 00000000 .word 0x00000000 + 800021f4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x0000000000000002 + 800021f8: 000a3183 ld x3,0(x20) + 800021fc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x8000000000000001 + 80002200: 000a3283 ld x5,0(x20) + 80002204: 008a0a13 addi x20,x20,8 + +0000000080002208 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64es x17, x3, x5 # perform operation + 80002208: 325188b3 aes64es x17,x3,x5 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 8000220c: 000cb383 ld x7,0(x25) + 80002210: 01138c63 beq x7,x17,80002228 + 80002214: 7050846f jal x8,8000b118 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80015e79 .word 0x80015e79 + 80002224: 00000000 .word 0x00000000 + 80002228: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x0000000000000002 + 8000222c: 000a3c03 ld x24,0(x20) + 80002230: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x7fffffffffffffff + 80002234: 000a3783 ld x15,0(x20) + 80002238: 008a0a13 addi x20,x20,8 + +000000008000223c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64es x31, x24, x15 # perform operation + 8000223c: 32fc0fb3 aes64es x31,x24,x15 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002240: 000cb383 ld x7,0(x25) + 80002244: 01f38c63 beq x7,x31,8000225c + 80002248: 6d10846f jal x8,8000b118 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80015edc .word 0x80015edc + 80002258: 00000000 .word 0x00000000 + 8000225c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x0000000000000002 + 80002260: 000a3083 ld x1,0(x20) + 80002264: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80002268: 000a3303 ld x6,0(x20) + 8000226c: 008a0a13 addi x20,x20,8 + +0000000080002270 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64es x13, x1, x6 # perform operation + 80002270: 326086b3 aes64es x13,x1,x6 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002274: 000cb383 ld x7,0(x25) + 80002278: 00d38c63 beq x7,x13,80002290 + 8000227c: 69d0846f jal x8,8000b118 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80015f3f .word 0x80015f3f + 8000228c: 00000000 .word 0x00000000 + 80002290: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x0000000000000002 + 80002294: 000a3303 ld x6,0(x20) + 80002298: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xffffffffffffffff + 8000229c: 000a3503 ld x10,0(x20) + 800022a0: 008a0a13 addi x20,x20,8 + +00000000800022a4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64es x2, x6, x10 # perform operation + 800022a4: 32a30133 aes64es x2,x6,x10 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a8: 000cb383 ld x7,0(x25) + 800022ac: 00238c63 beq x7,x2,800022c4 + 800022b0: 6690846f jal x8,8000b118 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80015fa2 .word 0x80015fa2 + 800022c0: 00000000 .word 0x00000000 + 800022c4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x0000000000000002 + 800022c8: 000a3a83 ld x21,0(x20) + 800022cc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xfffffffffffffffe + 800022d0: 000a3803 ld x16,0(x20) + 800022d4: 008a0a13 addi x20,x20,8 + +00000000800022d8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64es x2, x21, x16 # perform operation + 800022d8: 330a8133 aes64es x2,x21,x16 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022dc: 000cb383 ld x7,0(x25) + 800022e0: 00238c63 beq x7,x2,800022f8 + 800022e4: 6350846f jal x8,8000b118 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 80016005 .word 0x80016005 + 800022f4: 00000000 .word 0x00000000 + 800022f8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x0000000000000002 + 800022fc: 000a3983 ld x19,0(x20) + 80002300: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80002304: 000a3b83 ld x23,0(x20) + 80002308: 008a0a13 addi x20,x20,8 + +000000008000230c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64es x12, x19, x23 # perform operation + 8000230c: 33798633 aes64es x12,x19,x23 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002310: 000cb383 ld x7,0(x25) + 80002314: 00c38c63 beq x7,x12,8000232c + 80002318: 6010846f jal x8,8000b118 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80016068 .word 0x80016068 + 80002328: 00000000 .word 0x00000000 + 8000232c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000000000002 + 80002330: 000a3f83 ld x31,0(x20) + 80002334: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80002338: 000a3483 ld x9,0(x20) + 8000233c: 008a0a13 addi x20,x20,8 + +0000000080002340 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x13, x31, x9 # perform operation + 80002340: 329f86b3 aes64es x13,x31,x9 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002344: 000cb383 ld x7,0(x25) + 80002348: 00d38c63 beq x7,x13,80002360 + 8000234c: 5cd0846f jal x8,8000b118 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 800160cb .word 0x800160cb + 8000235c: 00000000 .word 0x00000000 + 80002360: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x0000000000000002 + 80002364: 000a3103 ld x2,0(x20) + 80002368: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x5555555555555555 + 8000236c: 000a3583 ld x11,0(x20) + 80002370: 008a0a13 addi x20,x20,8 + +0000000080002374 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64es x18, x2, x11 # perform operation + 80002374: 32b10933 aes64es x18,x2,x11 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002378: 000cb383 ld x7,0(x25) + 8000237c: 01238c63 beq x7,x18,80002394 + 80002380: 5990846f jal x8,8000b118 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 8001612e .word 0x8001612e + 80002390: 00000000 .word 0x00000000 + 80002394: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x0000000000000002 + 80002398: 000a3783 ld x15,0(x20) + 8000239c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x00000000ffffffff + 800023a0: 000a3683 ld x13,0(x20) + 800023a4: 008a0a13 addi x20,x20,8 + +00000000800023a8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64es x3, x15, x13 # perform operation + 800023a8: 32d781b3 aes64es x3,x15,x13 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023ac: 000cb383 ld x7,0(x25) + 800023b0: 00338c63 beq x7,x3,800023c8 + 800023b4: 5650846f jal x8,8000b118 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 80016191 .word 0x80016191 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x0000000000000002 + 800023cc: 000a3c03 ld x24,0(x20) + 800023d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x00000000fffffffe + 800023d4: 000a3983 ld x19,0(x20) + 800023d8: 008a0a13 addi x20,x20,8 + +00000000800023dc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64es x1, x24, x19 # perform operation + 800023dc: 333c00b3 aes64es x1,x24,x19 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e0: 000cb383 ld x7,0(x25) + 800023e4: 00138c63 beq x7,x1,800023fc + 800023e8: 5310846f jal x8,8000b118 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 800161ec .word 0x800161ec + 800023f8: 00000000 .word 0x00000000 + 800023fc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x0000000000000002 + 80002400: 000a3583 ld x11,0(x20) + 80002404: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000100000000 + 80002408: 000a3283 ld x5,0(x20) + 8000240c: 008a0a13 addi x20,x20,8 + +0000000080002410 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64es x2, x11, x5 # perform operation + 80002410: 32558133 aes64es x2,x11,x5 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002414: 000cb383 ld x7,0(x25) + 80002418: 00238c63 beq x7,x2,80002430 + 8000241c: 4fd0846f jal x8,8000b118 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 80016247 .word 0x80016247 + 8000242c: 00000000 .word 0x00000000 + 80002430: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x0000000000000002 + 80002434: 000a3283 ld x5,0(x20) + 80002438: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x0000000100000001 + 8000243c: 000a3d03 ld x26,0(x20) + 80002440: 008a0a13 addi x20,x20,8 + +0000000080002444 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64es x31, x5, x26 # perform operation + 80002444: 33a28fb3 aes64es x31,x5,x26 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002448: 000cb383 ld x7,0(x25) + 8000244c: 01f38c63 beq x7,x31,80002464 + 80002450: 4c90846f jal x8,8000b118 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 800162a3 .word 0x800162a3 + 80002460: 00000000 .word 0x00000000 + 80002464: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x8000000000000000 + 80002468: 000a3203 ld x4,0(x20) + 8000246c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x0000000000000000 + 80002470: 000a3e03 ld x28,0(x20) + 80002474: 008a0a13 addi x20,x20,8 + +0000000080002478 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64es x18, x4, x28 # perform operation + 80002478: 33c20933 aes64es x18,x4,x28 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000247c: 000cb383 ld x7,0(x25) + 80002480: 01238c63 beq x7,x18,80002498 + 80002484: 4950846f jal x8,8000b118 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 800162ff .word 0x800162ff + 80002494: 00000000 .word 0x00000000 + 80002498: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x8000000000000000 + 8000249c: 000a3303 ld x6,0(x20) + 800024a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x0000000000000001 + 800024a4: 000a3083 ld x1,0(x20) + 800024a8: 008a0a13 addi x20,x20,8 + +00000000800024ac : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64es x10, x6, x1 # perform operation + 800024ac: 32130533 aes64es x10,x6,x1 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b0: 000cb383 ld x7,0(x25) + 800024b4: 00a38c63 beq x7,x10,800024cc + 800024b8: 4610846f jal x8,8000b118 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 80016362 .word 0x80016362 + 800024c8: 00000000 .word 0x00000000 + 800024cc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x8000000000000000 + 800024d0: 000a3683 ld x13,0(x20) + 800024d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x0000000000000002 + 800024d8: 000a3a83 ld x21,0(x20) + 800024dc: 008a0a13 addi x20,x20,8 + +00000000800024e0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64es x28, x13, x21 # perform operation + 800024e0: 33568e33 aes64es x28,x13,x21 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e4: 000cb383 ld x7,0(x25) + 800024e8: 01c38c63 beq x7,x28,80002500 + 800024ec: 42d0846f jal x8,8000b118 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 800163c5 .word 0x800163c5 + 800024fc: 00000000 .word 0x00000000 + 80002500: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x8000000000000000 + 80002504: 000a3903 ld x18,0(x20) + 80002508: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x8000000000000000 + 8000250c: 000a3d03 ld x26,0(x20) + 80002510: 008a0a13 addi x20,x20,8 + +0000000080002514 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64es x28, x18, x26 # perform operation + 80002514: 33a90e33 aes64es x28,x18,x26 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002518: 000cb383 ld x7,0(x25) + 8000251c: 01c38c63 beq x7,x28,80002534 + 80002520: 3f90846f jal x8,8000b118 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 80016428 .word 0x80016428 + 80002530: 00000000 .word 0x00000000 + 80002534: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x8000000000000000 + 80002538: 000a3e83 ld x29,0(x20) + 8000253c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x8000000000000001 + 80002540: 000a3983 ld x19,0(x20) + 80002544: 008a0a13 addi x20,x20,8 + +0000000080002548 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64es x2, x29, x19 # perform operation + 80002548: 333e8133 aes64es x2,x29,x19 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000254c: 000cb383 ld x7,0(x25) + 80002550: 00238c63 beq x7,x2,80002568 + 80002554: 3c50846f jal x8,8000b118 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 8001649a .word 0x8001649a + 80002564: 00000000 .word 0x00000000 + 80002568: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x8000000000000000 + 8000256c: 000a3d03 ld x26,0(x20) + 80002570: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x7fffffffffffffff + 80002574: 000a3203 ld x4,0(x20) + 80002578: 008a0a13 addi x20,x20,8 + +000000008000257c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64es x10, x26, x4 # perform operation + 8000257c: 324d0533 aes64es x10,x26,x4 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002580: 000cb383 ld x7,0(x25) + 80002584: 00a38c63 beq x7,x10,8000259c + 80002588: 3910846f jal x8,8000b118 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 8001650c .word 0x8001650c + 80002598: 00000000 .word 0x00000000 + 8000259c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x8000000000000000 + 800025a0: 000a3a83 ld x21,0(x20) + 800025a4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x7ffffffffffffffe + 800025a8: 000a3d03 ld x26,0(x20) + 800025ac: 008a0a13 addi x20,x20,8 + +00000000800025b0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64es x5, x21, x26 # perform operation + 800025b0: 33aa82b3 aes64es x5,x21,x26 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b4: 000cb383 ld x7,0(x25) + 800025b8: 00538c63 beq x7,x5,800025d0 + 800025bc: 35d0846f jal x8,8000b118 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 8001657e .word 0x8001657e + 800025cc: 00000000 .word 0x00000000 + 800025d0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x8000000000000000 + 800025d4: 000a3e83 ld x29,0(x20) + 800025d8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xffffffffffffffff + 800025dc: 000a3183 ld x3,0(x20) + 800025e0: 008a0a13 addi x20,x20,8 + +00000000800025e4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64es x4, x29, x3 # perform operation + 800025e4: 323e8233 aes64es x4,x29,x3 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e8: 000cb383 ld x7,0(x25) + 800025ec: 00438c63 beq x7,x4,80002604 + 800025f0: 3290846f jal x8,8000b118 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 800165f0 .word 0x800165f0 + 80002600: 00000000 .word 0x00000000 + 80002604: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x8000000000000000 + 80002608: 000a3483 ld x9,0(x20) + 8000260c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0xfffffffffffffffe + 80002610: 000a3d83 ld x27,0(x20) + 80002614: 008a0a13 addi x20,x20,8 + +0000000080002618 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64es x3, x9, x27 # perform operation + 80002618: 33b481b3 aes64es x3,x9,x27 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000261c: 000cb383 ld x7,0(x25) + 80002620: 00338c63 beq x7,x3,80002638 + 80002624: 2f50846f jal x8,8000b118 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 80016662 .word 0x80016662 + 80002634: 00000000 .word 0x00000000 + 80002638: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x8000000000000000 + 8000263c: 000a3203 ld x4,0(x20) + 80002640: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002644: 000a3703 ld x14,0(x20) + 80002648: 008a0a13 addi x20,x20,8 + +000000008000264c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64es x21, x4, x14 # perform operation + 8000264c: 32e20ab3 aes64es x21,x4,x14 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002650: 000cb383 ld x7,0(x25) + 80002654: 01538c63 beq x7,x21,8000266c + 80002658: 2c10846f jal x8,8000b118 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 800166d4 .word 0x800166d4 + 80002668: 00000000 .word 0x00000000 + 8000266c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x8000000000000000 + 80002670: 000a3f03 ld x30,0(x20) + 80002674: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xaaaaaaaaaaaaaaaa + 80002678: 000a3703 ld x14,0(x20) + 8000267c: 008a0a13 addi x20,x20,8 + +0000000080002680 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x16, x30, x14 # perform operation + 80002680: 32ef0833 aes64es x16,x30,x14 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002684: 000cb383 ld x7,0(x25) + 80002688: 01038c63 beq x7,x16,800026a0 + 8000268c: 28d0846f jal x8,8000b118 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 80016746 .word 0x80016746 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x8000000000000000 + 800026a4: 000a3e03 ld x28,0(x20) + 800026a8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x5555555555555555 + 800026ac: 000a3483 ld x9,0(x20) + 800026b0: 008a0a13 addi x20,x20,8 + +00000000800026b4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64es x11, x28, x9 # perform operation + 800026b4: 329e05b3 aes64es x11,x28,x9 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b8: 000cb383 ld x7,0(x25) + 800026bc: 00b38c63 beq x7,x11,800026d4 + 800026c0: 2590846f jal x8,8000b118 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 800167b8 .word 0x800167b8 + 800026d0: 00000000 .word 0x00000000 + 800026d4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x8000000000000000 + 800026d8: 000a3a83 ld x21,0(x20) + 800026dc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x00000000ffffffff + 800026e0: 000a3e03 ld x28,0(x20) + 800026e4: 008a0a13 addi x20,x20,8 + +00000000800026e8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64es x12, x21, x28 # perform operation + 800026e8: 33ca8633 aes64es x12,x21,x28 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026ec: 000cb383 ld x7,0(x25) + 800026f0: 00c38c63 beq x7,x12,80002708 + 800026f4: 2250846f jal x8,8000b118 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 8001682a .word 0x8001682a + 80002704: 00000000 .word 0x00000000 + 80002708: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x8000000000000000 + 8000270c: 000a3283 ld x5,0(x20) + 80002710: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x00000000fffffffe + 80002714: 000a3e83 ld x29,0(x20) + 80002718: 008a0a13 addi x20,x20,8 + +000000008000271c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64es x13, x5, x29 # perform operation + 8000271c: 33d286b3 aes64es x13,x5,x29 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002720: 000cb383 ld x7,0(x25) + 80002724: 00d38c63 beq x7,x13,8000273c + 80002728: 1f10846f jal x8,8000b118 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 80016894 .word 0x80016894 + 80002738: 00000000 .word 0x00000000 + 8000273c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x8000000000000000 + 80002740: 000a3783 ld x15,0(x20) + 80002744: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x0000000100000000 + 80002748: 000a3e83 ld x29,0(x20) + 8000274c: 008a0a13 addi x20,x20,8 + +0000000080002750 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64es x6, x15, x29 # perform operation + 80002750: 33d78333 aes64es x6,x15,x29 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002754: 000cb383 ld x7,0(x25) + 80002758: 00638c63 beq x7,x6,80002770 + 8000275c: 1bd0846f jal x8,8000b118 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 800168fe .word 0x800168fe + 8000276c: 00000000 .word 0x00000000 + 80002770: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x8000000000000000 + 80002774: 000a3603 ld x12,0(x20) + 80002778: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x0000000100000001 + 8000277c: 000a3f83 ld x31,0(x20) + 80002780: 008a0a13 addi x20,x20,8 + +0000000080002784 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64es x24, x12, x31 # perform operation + 80002784: 33f60c33 aes64es x24,x12,x31 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002788: 000cb383 ld x7,0(x25) + 8000278c: 01838c63 beq x7,x24,800027a4 + 80002790: 1890846f jal x8,8000b118 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 80016969 .word 0x80016969 + 800027a0: 00000000 .word 0x00000000 + 800027a4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x8000000000000001 + 800027a8: 000a3903 ld x18,0(x20) + 800027ac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0000000000000000 + 800027b0: 000a3503 ld x10,0(x20) + 800027b4: 008a0a13 addi x20,x20,8 + +00000000800027b8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64es x14, x18, x10 # perform operation + 800027b8: 32a90733 aes64es x14,x18,x10 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027bc: 000cb383 ld x7,0(x25) + 800027c0: 00e38c63 beq x7,x14,800027d8 + 800027c4: 1550846f jal x8,8000b118 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 800169d4 .word 0x800169d4 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x8000000000000001 + 800027dc: 000a3703 ld x14,0(x20) + 800027e0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x0000000000000001 + 800027e4: 000a3a83 ld x21,0(x20) + 800027e8: 008a0a13 addi x20,x20,8 + +00000000800027ec : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64es x26, x14, x21 # perform operation + 800027ec: 33570d33 aes64es x26,x14,x21 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f0: 000cb383 ld x7,0(x25) + 800027f4: 01a38c63 beq x7,x26,8000280c + 800027f8: 1210846f jal x8,8000b118 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 80016a37 .word 0x80016a37 + 80002808: 00000000 .word 0x00000000 + 8000280c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x8000000000000001 + 80002810: 000a3b83 ld x23,0(x20) + 80002814: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000000000002 + 80002818: 000a3583 ld x11,0(x20) + 8000281c: 008a0a13 addi x20,x20,8 + +0000000080002820 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64es x28, x23, x11 # perform operation + 80002820: 32bb8e33 aes64es x28,x23,x11 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002824: 000cb383 ld x7,0(x25) + 80002828: 01c38c63 beq x7,x28,80002840 + 8000282c: 0ed0846f jal x8,8000b118 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 80016a9a .word 0x80016a9a + 8000283c: 00000000 .word 0x00000000 + 80002840: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x8000000000000001 + 80002844: 000a3903 ld x18,0(x20) + 80002848: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x8000000000000000 + 8000284c: 000a3503 ld x10,0(x20) + 80002850: 008a0a13 addi x20,x20,8 + +0000000080002854 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64es x4, x18, x10 # perform operation + 80002854: 32a90233 aes64es x4,x18,x10 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002858: 000cb383 ld x7,0(x25) + 8000285c: 00438c63 beq x7,x4,80002874 + 80002860: 0b90846f jal x8,8000b118 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 80016afd .word 0x80016afd + 80002870: 00000000 .word 0x00000000 + 80002874: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x8000000000000001 + 80002878: 000a3b83 ld x23,0(x20) + 8000287c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x8000000000000001 + 80002880: 000a3103 ld x2,0(x20) + 80002884: 008a0a13 addi x20,x20,8 + +0000000080002888 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64es x14, x23, x2 # perform operation + 80002888: 322b8733 aes64es x14,x23,x2 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000288c: 000cb383 ld x7,0(x25) + 80002890: 00e38c63 beq x7,x14,800028a8 + 80002894: 0850846f jal x8,8000b118 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 80016b6f .word 0x80016b6f + 800028a4: 00000000 .word 0x00000000 + 800028a8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x8000000000000001 + 800028ac: 000a3b83 ld x23,0(x20) + 800028b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x7fffffffffffffff + 800028b4: 000a3203 ld x4,0(x20) + 800028b8: 008a0a13 addi x20,x20,8 + +00000000800028bc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64es x13, x23, x4 # perform operation + 800028bc: 324b86b3 aes64es x13,x23,x4 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c0: 000cb383 ld x7,0(x25) + 800028c4: 00d38c63 beq x7,x13,800028dc + 800028c8: 0510846f jal x8,8000b118 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 80016be1 .word 0x80016be1 + 800028d8: 00000000 .word 0x00000000 + 800028dc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x8000000000000001 + 800028e0: 000a3e83 ld x29,0(x20) + 800028e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x7ffffffffffffffe + 800028e8: 000a3603 ld x12,0(x20) + 800028ec: 008a0a13 addi x20,x20,8 + +00000000800028f0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64es x17, x29, x12 # perform operation + 800028f0: 32ce88b3 aes64es x17,x29,x12 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f4: 000cb383 ld x7,0(x25) + 800028f8: 01138c63 beq x7,x17,80002910 + 800028fc: 01d0846f jal x8,8000b118 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 80016c53 .word 0x80016c53 + 8000290c: 00000000 .word 0x00000000 + 80002910: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x8000000000000001 + 80002914: 000a3083 ld x1,0(x20) + 80002918: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xffffffffffffffff + 8000291c: 000a3f83 ld x31,0(x20) + 80002920: 008a0a13 addi x20,x20,8 + +0000000080002924 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64es x17, x1, x31 # perform operation + 80002924: 33f088b3 aes64es x17,x1,x31 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002928: 000cb383 ld x7,0(x25) + 8000292c: 01138c63 beq x7,x17,80002944 + 80002930: 7e80846f jal x8,8000b118 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 80016cc5 .word 0x80016cc5 + 80002940: 00000000 .word 0x00000000 + 80002944: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x8000000000000001 + 80002948: 000a3d03 ld x26,0(x20) + 8000294c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xfffffffffffffffe + 80002950: 000a3803 ld x16,0(x20) + 80002954: 008a0a13 addi x20,x20,8 + +0000000080002958 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64es x15, x26, x16 # perform operation + 80002958: 330d07b3 aes64es x15,x26,x16 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000295c: 000cb383 ld x7,0(x25) + 80002960: 00f38c63 beq x7,x15,80002978 + 80002964: 7b40846f jal x8,8000b118 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80016d37 .word 0x80016d37 + 80002974: 00000000 .word 0x00000000 + 80002978: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x8000000000000001 + 8000297c: 000a3f83 ld x31,0(x20) + 80002980: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x5bbc887763ae86f2 + 80002984: 000a3203 ld x4,0(x20) + 80002988: 008a0a13 addi x20,x20,8 + +000000008000298c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64es x2, x31, x4 # perform operation + 8000298c: 324f8133 aes64es x2,x31,x4 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002990: 000cb383 ld x7,0(x25) + 80002994: 00238c63 beq x7,x2,800029ac + 80002998: 7800846f jal x8,8000b118 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 80016da9 .word 0x80016da9 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x8000000000000001 + 800029b0: 000a3f03 ld x30,0(x20) + 800029b4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xaaaaaaaaaaaaaaaa + 800029b8: 000a3603 ld x12,0(x20) + 800029bc: 008a0a13 addi x20,x20,8 + +00000000800029c0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x27, x30, x12 # perform operation + 800029c0: 32cf0db3 aes64es x27,x30,x12 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c4: 000cb383 ld x7,0(x25) + 800029c8: 01b38c63 beq x7,x27,800029e0 + 800029cc: 74c0846f jal x8,8000b118 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80016e1b .word 0x80016e1b + 800029dc: 00000000 .word 0x00000000 + 800029e0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x8000000000000001 + 800029e4: 000a3483 ld x9,0(x20) + 800029e8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x5555555555555555 + 800029ec: 000a3683 ld x13,0(x20) + 800029f0: 008a0a13 addi x20,x20,8 + +00000000800029f4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64es x3, x9, x13 # perform operation + 800029f4: 32d481b3 aes64es x3,x9,x13 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f8: 000cb383 ld x7,0(x25) + 800029fc: 00338c63 beq x7,x3,80002a14 + 80002a00: 7180846f jal x8,8000b118 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80016e8d .word 0x80016e8d + 80002a10: 00000000 .word 0x00000000 + 80002a14: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x8000000000000001 + 80002a18: 000a3e03 ld x28,0(x20) + 80002a1c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x00000000ffffffff + 80002a20: 000a3503 ld x10,0(x20) + 80002a24: 008a0a13 addi x20,x20,8 + +0000000080002a28 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64es x24, x28, x10 # perform operation + 80002a28: 32ae0c33 aes64es x24,x28,x10 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a2c: 000cb383 ld x7,0(x25) + 80002a30: 01838c63 beq x7,x24,80002a48 + 80002a34: 6e40846f jal x8,8000b118 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80016eff .word 0x80016eff + 80002a44: 00000000 .word 0x00000000 + 80002a48: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x8000000000000001 + 80002a4c: 000a3203 ld x4,0(x20) + 80002a50: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000000fffffffe + 80002a54: 000a3883 ld x17,0(x20) + 80002a58: 008a0a13 addi x20,x20,8 + +0000000080002a5c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64es x23, x4, x17 # perform operation + 80002a5c: 33120bb3 aes64es x23,x4,x17 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a60: 000cb383 ld x7,0(x25) + 80002a64: 01738c63 beq x7,x23,80002a7c + 80002a68: 6b00846f jal x8,8000b118 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80016f69 .word 0x80016f69 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x8000000000000001 + 80002a80: 000a3d83 ld x27,0(x20) + 80002a84: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x0000000100000000 + 80002a88: 000a3a83 ld x21,0(x20) + 80002a8c: 008a0a13 addi x20,x20,8 + +0000000080002a90 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64es x16, x27, x21 # perform operation + 80002a90: 335d8833 aes64es x16,x27,x21 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a94: 000cb383 ld x7,0(x25) + 80002a98: 01038c63 beq x7,x16,80002ab0 + 80002a9c: 67c0846f jal x8,8000b118 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 80016fd3 .word 0x80016fd3 + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x8000000000000001 + 80002ab4: 000a3483 ld x9,0(x20) + 80002ab8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000100000001 + 80002abc: 000a3983 ld x19,0(x20) + 80002ac0: 008a0a13 addi x20,x20,8 + +0000000080002ac4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64es x21, x9, x19 # perform operation + 80002ac4: 33348ab3 aes64es x21,x9,x19 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac8: 000cb383 ld x7,0(x25) + 80002acc: 01538c63 beq x7,x21,80002ae4 + 80002ad0: 6480846f jal x8,8000b118 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 8001703e .word 0x8001703e + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002ae8: 000a3e83 ld x29,0(x20) + 80002aec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000000000000 + 80002af0: 000a3683 ld x13,0(x20) + 80002af4: 008a0a13 addi x20,x20,8 + +0000000080002af8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64es x24, x29, x13 # perform operation + 80002af8: 32de8c33 aes64es x24,x29,x13 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002afc: 000cb383 ld x7,0(x25) + 80002b00: 01838c63 beq x7,x24,80002b18 + 80002b04: 6140846f jal x8,8000b118 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 800170a9 .word 0x800170a9 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002b1c: 000a3d83 ld x27,0(x20) + 80002b20: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x0000000000000001 + 80002b24: 000a3783 ld x15,0(x20) + 80002b28: 008a0a13 addi x20,x20,8 + +0000000080002b2c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64es x1, x27, x15 # perform operation + 80002b2c: 32fd80b3 aes64es x1,x27,x15 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b30: 000cb383 ld x7,0(x25) + 80002b34: 00138c63 beq x7,x1,80002b4c + 80002b38: 5e00846f jal x8,8000b118 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 8001710c .word 0x8001710c + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002b50: 000a3d83 ld x27,0(x20) + 80002b54: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x0000000000000002 + 80002b58: 000a3203 ld x4,0(x20) + 80002b5c: 008a0a13 addi x20,x20,8 + +0000000080002b60 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64es x2, x27, x4 # perform operation + 80002b60: 324d8133 aes64es x2,x27,x4 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b64: 000cb383 ld x7,0(x25) + 80002b68: 00238c63 beq x7,x2,80002b80 + 80002b6c: 5ac0846f jal x8,8000b118 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 8001716f .word 0x8001716f + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002b84: 000a3803 ld x16,0(x20) + 80002b88: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x8000000000000000 + 80002b8c: 000a3b03 ld x22,0(x20) + 80002b90: 008a0a13 addi x20,x20,8 + +0000000080002b94 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64es x24, x16, x22 # perform operation + 80002b94: 33680c33 aes64es x24,x16,x22 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b98: 000cb383 ld x7,0(x25) + 80002b9c: 01838c63 beq x7,x24,80002bb4 + 80002ba0: 5780846f jal x8,8000b118 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 800171d2 .word 0x800171d2 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002bb8: 000a3f03 ld x30,0(x20) + 80002bbc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x8000000000000001 + 80002bc0: 000a3283 ld x5,0(x20) + 80002bc4: 008a0a13 addi x20,x20,8 + +0000000080002bc8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64es x17, x30, x5 # perform operation + 80002bc8: 325f08b3 aes64es x17,x30,x5 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bcc: 000cb383 ld x7,0(x25) + 80002bd0: 01138c63 beq x7,x17,80002be8 + 80002bd4: 5440846f jal x8,8000b118 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80017244 .word 0x80017244 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002bec: 000a3f03 ld x30,0(x20) + 80002bf0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x7fffffffffffffff + 80002bf4: 000a3203 ld x4,0(x20) + 80002bf8: 008a0a13 addi x20,x20,8 + +0000000080002bfc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64es x29, x30, x4 # perform operation + 80002bfc: 324f0eb3 aes64es x29,x30,x4 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c00: 000cb383 ld x7,0(x25) + 80002c04: 01d38c63 beq x7,x29,80002c1c + 80002c08: 5100846f jal x8,8000b118 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 800172b6 .word 0x800172b6 + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002c20: 000a3883 ld x17,0(x20) + 80002c24: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x7ffffffffffffffe + 80002c28: 000a3c03 ld x24,0(x20) + 80002c2c: 008a0a13 addi x20,x20,8 + +0000000080002c30 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64es x10, x17, x24 # perform operation + 80002c30: 33888533 aes64es x10,x17,x24 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c34: 000cb383 ld x7,0(x25) + 80002c38: 00a38c63 beq x7,x10,80002c50 + 80002c3c: 4dc0846f jal x8,8000b118 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 80017328 .word 0x80017328 + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002c54: 000a3f03 ld x30,0(x20) + 80002c58: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xffffffffffffffff + 80002c5c: 000a3b03 ld x22,0(x20) + 80002c60: 008a0a13 addi x20,x20,8 + +0000000080002c64 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64es x11, x30, x22 # perform operation + 80002c64: 336f05b3 aes64es x11,x30,x22 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c68: 000cb383 ld x7,0(x25) + 80002c6c: 00b38c63 beq x7,x11,80002c84 + 80002c70: 4a80846f jal x8,8000b118 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 8001739a .word 0x8001739a + 80002c80: 00000000 .word 0x00000000 + 80002c84: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x7fffffffffffffff + 80002c88: 000a3603 ld x12,0(x20) + 80002c8c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xfffffffffffffffe + 80002c90: 000a3b83 ld x23,0(x20) + 80002c94: 008a0a13 addi x20,x20,8 + +0000000080002c98 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64es x3, x12, x23 # perform operation + 80002c98: 337601b3 aes64es x3,x12,x23 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c9c: 000cb383 ld x7,0(x25) + 80002ca0: 00338c63 beq x7,x3,80002cb8 + 80002ca4: 4740846f jal x8,8000b118 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 8001740c .word 0x8001740c + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002cbc: 000a3d03 ld x26,0(x20) + 80002cc0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80002cc4: 000a3b83 ld x23,0(x20) + 80002cc8: 008a0a13 addi x20,x20,8 + +0000000080002ccc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64es x11, x26, x23 # perform operation + 80002ccc: 337d05b3 aes64es x11,x26,x23 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd0: 000cb383 ld x7,0(x25) + 80002cd4: 00b38c63 beq x7,x11,80002cec + 80002cd8: 4400846f jal x8,8000b118 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 8001747e .word 0x8001747e + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002cf0: 000a3b83 ld x23,0(x20) + 80002cf4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xaaaaaaaaaaaaaaaa + 80002cf8: 000a3203 ld x4,0(x20) + 80002cfc: 008a0a13 addi x20,x20,8 + +0000000080002d00 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x13, x23, x4 # perform operation + 80002d00: 324b86b3 aes64es x13,x23,x4 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d04: 000cb383 ld x7,0(x25) + 80002d08: 00d38c63 beq x7,x13,80002d20 + 80002d0c: 40c0846f jal x8,8000b118 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 800174f0 .word 0x800174f0 + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002d24: 000a3103 ld x2,0(x20) + 80002d28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x5555555555555555 + 80002d2c: 000a3883 ld x17,0(x20) + 80002d30: 008a0a13 addi x20,x20,8 + +0000000080002d34 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64es x3, x2, x17 # perform operation + 80002d34: 331101b3 aes64es x3,x2,x17 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d38: 000cb383 ld x7,0(x25) + 80002d3c: 00338c63 beq x7,x3,80002d54 + 80002d40: 3d80846f jal x8,8000b118 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 80017562 .word 0x80017562 + 80002d50: 00000000 .word 0x00000000 + 80002d54: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002d58: 000a3503 ld x10,0(x20) + 80002d5c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x00000000ffffffff + 80002d60: 000a3f03 ld x30,0(x20) + 80002d64: 008a0a13 addi x20,x20,8 + +0000000080002d68 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64es x28, x10, x30 # perform operation + 80002d68: 33e50e33 aes64es x28,x10,x30 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d6c: 000cb383 ld x7,0(x25) + 80002d70: 01c38c63 beq x7,x28,80002d88 + 80002d74: 3a40846f jal x8,8000b118 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 800175d4 .word 0x800175d4 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002d8c: 000a3083 ld x1,0(x20) + 80002d90: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x00000000fffffffe + 80002d94: 000a3f83 ld x31,0(x20) + 80002d98: 008a0a13 addi x20,x20,8 + +0000000080002d9c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64es x27, x1, x31 # perform operation + 80002d9c: 33f08db3 aes64es x27,x1,x31 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da0: 000cb383 ld x7,0(x25) + 80002da4: 01b38c63 beq x7,x27,80002dbc + 80002da8: 3700846f jal x8,8000b118 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 8001763e .word 0x8001763e + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002dc0: 000a3b03 ld x22,0(x20) + 80002dc4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000100000000 + 80002dc8: 000a3683 ld x13,0(x20) + 80002dcc: 008a0a13 addi x20,x20,8 + +0000000080002dd0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64es x30, x22, x13 # perform operation + 80002dd0: 32db0f33 aes64es x30,x22,x13 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd4: 000cb383 ld x7,0(x25) + 80002dd8: 01e38c63 beq x7,x30,80002df0 + 80002ddc: 33c0846f jal x8,8000b118 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 800176a8 .word 0x800176a8 + 80002dec: 00000000 .word 0x00000000 + 80002df0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002df4: 000a3483 ld x9,0(x20) + 80002df8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000100000001 + 80002dfc: 000a3583 ld x11,0(x20) + 80002e00: 008a0a13 addi x20,x20,8 + +0000000080002e04 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64es x4, x9, x11 # perform operation + 80002e04: 32b48233 aes64es x4,x9,x11 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e08: 000cb383 ld x7,0(x25) + 80002e0c: 00438c63 beq x7,x4,80002e24 + 80002e10: 3080846f jal x8,8000b118 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 80017713 .word 0x80017713 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002e28: 000a3883 ld x17,0(x20) + 80002e2c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x0000000000000000 + 80002e30: 000a3d03 ld x26,0(x20) + 80002e34: 008a0a13 addi x20,x20,8 + +0000000080002e38 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64es x24, x17, x26 # perform operation + 80002e38: 33a88c33 aes64es x24,x17,x26 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e3c: 000cb383 ld x7,0(x25) + 80002e40: 01838c63 beq x7,x24,80002e58 + 80002e44: 2d40846f jal x8,8000b118 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 8001777e .word 0x8001777e + 80002e54: 00000000 .word 0x00000000 + 80002e58: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002e5c: 000a3683 ld x13,0(x20) + 80002e60: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x0000000000000001 + 80002e64: 000a3703 ld x14,0(x20) + 80002e68: 008a0a13 addi x20,x20,8 + +0000000080002e6c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64es x19, x13, x14 # perform operation + 80002e6c: 32e689b3 aes64es x19,x13,x14 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e70: 000cb383 ld x7,0(x25) + 80002e74: 01338c63 beq x7,x19,80002e8c + 80002e78: 2a00846f jal x8,8000b118 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 800177e1 .word 0x800177e1 + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002e90: 000a3783 ld x15,0(x20) + 80002e94: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000000000002 + 80002e98: 000a3d83 ld x27,0(x20) + 80002e9c: 008a0a13 addi x20,x20,8 + +0000000080002ea0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64es x22, x15, x27 # perform operation + 80002ea0: 33b78b33 aes64es x22,x15,x27 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea4: 000cb383 ld x7,0(x25) + 80002ea8: 01638c63 beq x7,x22,80002ec0 + 80002eac: 26c0846f jal x8,8000b118 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 80017844 .word 0x80017844 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x7ffffffffffffffe + 80002ec4: 000a3303 ld x6,0(x20) + 80002ec8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x8000000000000000 + 80002ecc: 000a3903 ld x18,0(x20) + 80002ed0: 008a0a13 addi x20,x20,8 + +0000000080002ed4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64es x13, x6, x18 # perform operation + 80002ed4: 332306b3 aes64es x13,x6,x18 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed8: 000cb383 ld x7,0(x25) + 80002edc: 00d38c63 beq x7,x13,80002ef4 + 80002ee0: 2380846f jal x8,8000b118 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 800178a7 .word 0x800178a7 + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002ef8: 000a3983 ld x19,0(x20) + 80002efc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x8000000000000001 + 80002f00: 000a3603 ld x12,0(x20) + 80002f04: 008a0a13 addi x20,x20,8 + +0000000080002f08 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64es x31, x19, x12 # perform operation + 80002f08: 32c98fb3 aes64es x31,x19,x12 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f0c: 000cb383 ld x7,0(x25) + 80002f10: 01f38c63 beq x7,x31,80002f28 + 80002f14: 2040846f jal x8,8000b118 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 80017919 .word 0x80017919 + 80002f24: 00000000 .word 0x00000000 + 80002f28: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x7ffffffffffffffe + 80002f2c: 000a3283 ld x5,0(x20) + 80002f30: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x7fffffffffffffff + 80002f34: 000a3f03 ld x30,0(x20) + 80002f38: 008a0a13 addi x20,x20,8 + +0000000080002f3c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64es x23, x5, x30 # perform operation + 80002f3c: 33e28bb3 aes64es x23,x5,x30 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f40: 000cb383 ld x7,0(x25) + 80002f44: 01738c63 beq x7,x23,80002f5c + 80002f48: 1d00846f jal x8,8000b118 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 8001798b .word 0x8001798b + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80002f60: 000a3203 ld x4,0(x20) + 80002f64: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80002f68: 000a3983 ld x19,0(x20) + 80002f6c: 008a0a13 addi x20,x20,8 + +0000000080002f70 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64es x14, x4, x19 # perform operation + 80002f70: 33320733 aes64es x14,x4,x19 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f74: 000cb383 ld x7,0(x25) + 80002f78: 00e38c63 beq x7,x14,80002f90 + 80002f7c: 19c0846f jal x8,8000b118 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 800179fd .word 0x800179fd + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002f94: 000a3703 ld x14,0(x20) + 80002f98: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xffffffffffffffff + 80002f9c: 000a3183 ld x3,0(x20) + 80002fa0: 008a0a13 addi x20,x20,8 + +0000000080002fa4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64es x6, x14, x3 # perform operation + 80002fa4: 32370333 aes64es x6,x14,x3 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa8: 000cb383 ld x7,0(x25) + 80002fac: 00638c63 beq x7,x6,80002fc4 + 80002fb0: 1680846f jal x8,8000b118 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 80017a6f .word 0x80017a6f + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x7ffffffffffffffe + 80002fc8: 000a3203 ld x4,0(x20) + 80002fcc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002fd0: 000a3f83 ld x31,0(x20) + 80002fd4: 008a0a13 addi x20,x20,8 + +0000000080002fd8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64es x9, x4, x31 # perform operation + 80002fd8: 33f204b3 aes64es x9,x4,x31 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fdc: 000cb383 ld x7,0(x25) + 80002fe0: 00938c63 beq x7,x9,80002ff8 + 80002fe4: 1340846f jal x8,8000b118 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 80017ae1 .word 0x80017ae1 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002ffc: 000a3783 ld x15,0(x20) + 80003000: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80003004: 000a3e83 ld x29,0(x20) + 80003008: 008a0a13 addi x20,x20,8 + +000000008000300c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64es x6, x15, x29 # perform operation + 8000300c: 33d78333 aes64es x6,x15,x29 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003010: 000cb383 ld x7,0(x25) + 80003014: 00638c63 beq x7,x6,8000302c + 80003018: 1000846f jal x8,8000b118 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 80017b53 .word 0x80017b53 + 80003028: 00000000 .word 0x00000000 + 8000302c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80003030: 000a3883 ld x17,0(x20) + 80003034: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80003038: 000a3583 ld x11,0(x20) + 8000303c: 008a0a13 addi x20,x20,8 + +0000000080003040 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x30, x17, x11 # perform operation + 80003040: 32b88f33 aes64es x30,x17,x11 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003044: 000cb383 ld x7,0(x25) + 80003048: 01e38c63 beq x7,x30,80003060 + 8000304c: 0cc0846f jal x8,8000b118 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 80017bc5 .word 0x80017bc5 + 8000305c: 00000000 .word 0x00000000 + 80003060: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80003064: 000a3f83 ld x31,0(x20) + 80003068: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x5555555555555555 + 8000306c: 000a3083 ld x1,0(x20) + 80003070: 008a0a13 addi x20,x20,8 + +0000000080003074 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64es x30, x31, x1 # perform operation + 80003074: 321f8f33 aes64es x30,x31,x1 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003078: 000cb383 ld x7,0(x25) + 8000307c: 01e38c63 beq x7,x30,80003094 + 80003080: 0980846f jal x8,8000b118 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 80017c37 .word 0x80017c37 + 80003090: 00000000 .word 0x00000000 + 80003094: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80003098: 000a3503 ld x10,0(x20) + 8000309c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x00000000ffffffff + 800030a0: 000a3283 ld x5,0(x20) + 800030a4: 008a0a13 addi x20,x20,8 + +00000000800030a8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64es x17, x10, x5 # perform operation + 800030a8: 325508b3 aes64es x17,x10,x5 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030ac: 000cb383 ld x7,0(x25) + 800030b0: 01138c63 beq x7,x17,800030c8 + 800030b4: 0640846f jal x8,8000b118 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 80017ca9 .word 0x80017ca9 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x7ffffffffffffffe + 800030cc: 000a3883 ld x17,0(x20) + 800030d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x00000000fffffffe + 800030d4: 000a3e03 ld x28,0(x20) + 800030d8: 008a0a13 addi x20,x20,8 + +00000000800030dc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64es x31, x17, x28 # perform operation + 800030dc: 33c88fb3 aes64es x31,x17,x28 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e0: 000cb383 ld x7,0(x25) + 800030e4: 01f38c63 beq x7,x31,800030fc + 800030e8: 0300846f jal x8,8000b118 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 80017d13 .word 0x80017d13 + 800030f8: 00000000 .word 0x00000000 + 800030fc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x7ffffffffffffffe + 80003100: 000a3083 ld x1,0(x20) + 80003104: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000100000000 + 80003108: 000a3d83 ld x27,0(x20) + 8000310c: 008a0a13 addi x20,x20,8 + +0000000080003110 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64es x24, x1, x27 # perform operation + 80003110: 33b08c33 aes64es x24,x1,x27 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003114: 000cb383 ld x7,0(x25) + 80003118: 01838c63 beq x7,x24,80003130 + 8000311c: 7fd0746f jal x8,8000b118 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 80017d7d .word 0x80017d7d + 8000312c: 00000000 .word 0x00000000 + 80003130: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003134: 000a3703 ld x14,0(x20) + 80003138: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000100000001 + 8000313c: 000a3283 ld x5,0(x20) + 80003140: 008a0a13 addi x20,x20,8 + +0000000080003144 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64es x6, x14, x5 # perform operation + 80003144: 32570333 aes64es x6,x14,x5 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003148: 000cb383 ld x7,0(x25) + 8000314c: 00638c63 beq x7,x6,80003164 + 80003150: 7c90746f jal x8,8000b118 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 80017de8 .word 0x80017de8 + 80003160: 00000000 .word 0x00000000 + 80003164: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0xffffffffffffffff + 80003168: 000a3c03 ld x24,0(x20) + 8000316c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000000000000 + 80003170: 000a3583 ld x11,0(x20) + 80003174: 008a0a13 addi x20,x20,8 + +0000000080003178 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64es x30, x24, x11 # perform operation + 80003178: 32bc0f33 aes64es x30,x24,x11 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000317c: 000cb383 ld x7,0(x25) + 80003180: 01e38c63 beq x7,x30,80003198 + 80003184: 7950746f jal x8,8000b118 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 80017e53 .word 0x80017e53 + 80003194: 00000000 .word 0x00000000 + 80003198: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xffffffffffffffff + 8000319c: 000a3a83 ld x21,0(x20) + 800031a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x0000000000000001 + 800031a4: 000a3203 ld x4,0(x20) + 800031a8: 008a0a13 addi x20,x20,8 + +00000000800031ac : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64es x12, x21, x4 # perform operation + 800031ac: 324a8633 aes64es x12,x21,x4 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b0: 000cb383 ld x7,0(x25) + 800031b4: 00c38c63 beq x7,x12,800031cc + 800031b8: 7610746f jal x8,8000b118 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80017eb6 .word 0x80017eb6 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xffffffffffffffff + 800031d0: 000a3183 ld x3,0(x20) + 800031d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x0000000000000002 + 800031d8: 000a3203 ld x4,0(x20) + 800031dc: 008a0a13 addi x20,x20,8 + +00000000800031e0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64es x6, x3, x4 # perform operation + 800031e0: 32418333 aes64es x6,x3,x4 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e4: 000cb383 ld x7,0(x25) + 800031e8: 00638c63 beq x7,x6,80003200 + 800031ec: 72d0746f jal x8,8000b118 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 80017f19 .word 0x80017f19 + 800031fc: 00000000 .word 0x00000000 + 80003200: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xffffffffffffffff + 80003204: 000a3e83 ld x29,0(x20) + 80003208: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x8000000000000000 + 8000320c: 000a3f83 ld x31,0(x20) + 80003210: 008a0a13 addi x20,x20,8 + +0000000080003214 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64es x15, x29, x31 # perform operation + 80003214: 33fe87b3 aes64es x15,x29,x31 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003218: 000cb383 ld x7,0(x25) + 8000321c: 00f38c63 beq x7,x15,80003234 + 80003220: 6f90746f jal x8,8000b118 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 80017f7c .word 0x80017f7c + 80003230: 00000000 .word 0x00000000 + 80003234: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xffffffffffffffff + 80003238: 000a3483 ld x9,0(x20) + 8000323c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x8000000000000001 + 80003240: 000a3103 ld x2,0(x20) + 80003244: 008a0a13 addi x20,x20,8 + +0000000080003248 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64es x22, x9, x2 # perform operation + 80003248: 32248b33 aes64es x22,x9,x2 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000324c: 000cb383 ld x7,0(x25) + 80003250: 01638c63 beq x7,x22,80003268 + 80003254: 6c50746f jal x8,8000b118 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 80017fee .word 0x80017fee + 80003264: 00000000 .word 0x00000000 + 80003268: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xffffffffffffffff + 8000326c: 000a3f03 ld x30,0(x20) + 80003270: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x7fffffffffffffff + 80003274: 000a3303 ld x6,0(x20) + 80003278: 008a0a13 addi x20,x20,8 + +000000008000327c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64es x26, x30, x6 # perform operation + 8000327c: 326f0d33 aes64es x26,x30,x6 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003280: 000cb383 ld x7,0(x25) + 80003284: 01a38c63 beq x7,x26,8000329c + 80003288: 6910746f jal x8,8000b118 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80018060 .word 0x80018060 + 80003298: 00000000 .word 0x00000000 + 8000329c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xffffffffffffffff + 800032a0: 000a3903 ld x18,0(x20) + 800032a4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x7ffffffffffffffe + 800032a8: 000a3e03 ld x28,0(x20) + 800032ac: 008a0a13 addi x20,x20,8 + +00000000800032b0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64es x17, x18, x28 # perform operation + 800032b0: 33c908b3 aes64es x17,x18,x28 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b4: 000cb383 ld x7,0(x25) + 800032b8: 01138c63 beq x7,x17,800032d0 + 800032bc: 65d0746f jal x8,8000b118 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 800180d2 .word 0x800180d2 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xffffffffffffffff + 800032d4: 000a3b83 ld x23,0(x20) + 800032d8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xffffffffffffffff + 800032dc: 000a3203 ld x4,0(x20) + 800032e0: 008a0a13 addi x20,x20,8 + +00000000800032e4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64es x10, x23, x4 # perform operation + 800032e4: 324b8533 aes64es x10,x23,x4 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e8: 000cb383 ld x7,0(x25) + 800032ec: 00a38c63 beq x7,x10,80003304 + 800032f0: 6290746f jal x8,8000b118 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 80018144 .word 0x80018144 + 80003300: 00000000 .word 0x00000000 + 80003304: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xffffffffffffffff + 80003308: 000a3f03 ld x30,0(x20) + 8000330c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xfffffffffffffffe + 80003310: 000a3203 ld x4,0(x20) + 80003314: 008a0a13 addi x20,x20,8 + +0000000080003318 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64es x9, x30, x4 # perform operation + 80003318: 324f04b3 aes64es x9,x30,x4 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000331c: 000cb383 ld x7,0(x25) + 80003320: 00938c63 beq x7,x9,80003338 + 80003324: 5f50746f jal x8,8000b118 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 800181b6 .word 0x800181b6 + 80003334: 00000000 .word 0x00000000 + 80003338: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0xffffffffffffffff + 8000333c: 000a3d03 ld x26,0(x20) + 80003340: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003344: 000a3103 ld x2,0(x20) + 80003348: 008a0a13 addi x20,x20,8 + +000000008000334c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64es x11, x26, x2 # perform operation + 8000334c: 322d05b3 aes64es x11,x26,x2 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003350: 000cb383 ld x7,0(x25) + 80003354: 00b38c63 beq x7,x11,8000336c + 80003358: 5c10746f jal x8,8000b118 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80018228 .word 0x80018228 + 80003368: 00000000 .word 0x00000000 + 8000336c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xffffffffffffffff + 80003370: 000a3103 ld x2,0(x20) + 80003374: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xaaaaaaaaaaaaaaaa + 80003378: 000a3203 ld x4,0(x20) + 8000337c: 008a0a13 addi x20,x20,8 + +0000000080003380 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x24, x2, x4 # perform operation + 80003380: 32410c33 aes64es x24,x2,x4 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003384: 000cb383 ld x7,0(x25) + 80003388: 01838c63 beq x7,x24,800033a0 + 8000338c: 58d0746f jal x8,8000b118 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 8001829a .word 0x8001829a + 8000339c: 00000000 .word 0x00000000 + 800033a0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xffffffffffffffff + 800033a4: 000a3103 ld x2,0(x20) + 800033a8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x5555555555555555 + 800033ac: 000a3783 ld x15,0(x20) + 800033b0: 008a0a13 addi x20,x20,8 + +00000000800033b4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64es x24, x2, x15 # perform operation + 800033b4: 32f10c33 aes64es x24,x2,x15 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b8: 000cb383 ld x7,0(x25) + 800033bc: 01838c63 beq x7,x24,800033d4 + 800033c0: 5590746f jal x8,8000b118 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 8001830c .word 0x8001830c + 800033d0: 00000000 .word 0x00000000 + 800033d4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xffffffffffffffff + 800033d8: 000a3883 ld x17,0(x20) + 800033dc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x00000000ffffffff + 800033e0: 000a3983 ld x19,0(x20) + 800033e4: 008a0a13 addi x20,x20,8 + +00000000800033e8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64es x9, x17, x19 # perform operation + 800033e8: 333884b3 aes64es x9,x17,x19 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033ec: 000cb383 ld x7,0(x25) + 800033f0: 00938c63 beq x7,x9,80003408 + 800033f4: 5250746f jal x8,8000b118 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 8001837e .word 0x8001837e + 80003404: 00000000 .word 0x00000000 + 80003408: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xffffffffffffffff + 8000340c: 000a3e83 ld x29,0(x20) + 80003410: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x00000000fffffffe + 80003414: 000a3883 ld x17,0(x20) + 80003418: 008a0a13 addi x20,x20,8 + +000000008000341c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64es x26, x29, x17 # perform operation + 8000341c: 331e8d33 aes64es x26,x29,x17 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003420: 000cb383 ld x7,0(x25) + 80003424: 01a38c63 beq x7,x26,8000343c + 80003428: 4f10746f jal x8,8000b118 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 800183e8 .word 0x800183e8 + 80003438: 00000000 .word 0x00000000 + 8000343c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xffffffffffffffff + 80003440: 000a3103 ld x2,0(x20) + 80003444: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x0000000100000000 + 80003448: 000a3803 ld x16,0(x20) + 8000344c: 008a0a13 addi x20,x20,8 + +0000000080003450 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64es x26, x2, x16 # perform operation + 80003450: 33010d33 aes64es x26,x2,x16 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003454: 000cb383 ld x7,0(x25) + 80003458: 01a38c63 beq x7,x26,80003470 + 8000345c: 4bd0746f jal x8,8000b118 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 80018452 .word 0x80018452 + 8000346c: 00000000 .word 0x00000000 + 80003470: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xffffffffffffffff + 80003474: 000a3f83 ld x31,0(x20) + 80003478: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0000000100000001 + 8000347c: 000a3503 ld x10,0(x20) + 80003480: 008a0a13 addi x20,x20,8 + +0000000080003484 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64es x21, x31, x10 # perform operation + 80003484: 32af8ab3 aes64es x21,x31,x10 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003488: 000cb383 ld x7,0(x25) + 8000348c: 01538c63 beq x7,x21,800034a4 + 80003490: 4890746f jal x8,8000b118 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 800184bd .word 0x800184bd + 800034a0: 00000000 .word 0x00000000 + 800034a4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xfffffffffffffffe + 800034a8: 000a3103 ld x2,0(x20) + 800034ac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x0000000000000000 + 800034b0: 000a3e03 ld x28,0(x20) + 800034b4: 008a0a13 addi x20,x20,8 + +00000000800034b8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64es x10, x2, x28 # perform operation + 800034b8: 33c10533 aes64es x10,x2,x28 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034bc: 000cb383 ld x7,0(x25) + 800034c0: 00a38c63 beq x7,x10,800034d8 + 800034c4: 4550746f jal x8,8000b118 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80018528 .word 0x80018528 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xfffffffffffffffe + 800034dc: 000a3b83 ld x23,0(x20) + 800034e0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000000000001 + 800034e4: 000a3683 ld x13,0(x20) + 800034e8: 008a0a13 addi x20,x20,8 + +00000000800034ec : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64es x9, x23, x13 # perform operation + 800034ec: 32db84b3 aes64es x9,x23,x13 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f0: 000cb383 ld x7,0(x25) + 800034f4: 00938c63 beq x7,x9,8000350c + 800034f8: 4210746f jal x8,8000b118 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 8001858b .word 0x8001858b + 80003508: 00000000 .word 0x00000000 + 8000350c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xfffffffffffffffe + 80003510: 000a3903 ld x18,0(x20) + 80003514: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000000000002 + 80003518: 000a3983 ld x19,0(x20) + 8000351c: 008a0a13 addi x20,x20,8 + +0000000080003520 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64es x10, x18, x19 # perform operation + 80003520: 33390533 aes64es x10,x18,x19 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003524: 000cb383 ld x7,0(x25) + 80003528: 00a38c63 beq x7,x10,80003540 + 8000352c: 3ed0746f jal x8,8000b118 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 800185ee .word 0x800185ee + 8000353c: 00000000 .word 0x00000000 + 80003540: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xfffffffffffffffe + 80003544: 000a3e03 ld x28,0(x20) + 80003548: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x8000000000000000 + 8000354c: 000a3903 ld x18,0(x20) + 80003550: 008a0a13 addi x20,x20,8 + +0000000080003554 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64es x21, x28, x18 # perform operation + 80003554: 332e0ab3 aes64es x21,x28,x18 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003558: 000cb383 ld x7,0(x25) + 8000355c: 01538c63 beq x7,x21,80003574 + 80003560: 3b90746f jal x8,8000b118 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 80018651 .word 0x80018651 + 80003570: 00000000 .word 0x00000000 + 80003574: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xfffffffffffffffe + 80003578: 000a3a83 ld x21,0(x20) + 8000357c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x8000000000000001 + 80003580: 000a3683 ld x13,0(x20) + 80003584: 008a0a13 addi x20,x20,8 + +0000000080003588 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64es x4, x21, x13 # perform operation + 80003588: 32da8233 aes64es x4,x21,x13 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000358c: 000cb383 ld x7,0(x25) + 80003590: 00438c63 beq x7,x4,800035a8 + 80003594: 3850746f jal x8,8000b118 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 800186c3 .word 0x800186c3 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xfffffffffffffffe + 800035ac: 000a3083 ld x1,0(x20) + 800035b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x7fffffffffffffff + 800035b4: 000a3e83 ld x29,0(x20) + 800035b8: 008a0a13 addi x20,x20,8 + +00000000800035bc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64es x23, x1, x29 # perform operation + 800035bc: 33d08bb3 aes64es x23,x1,x29 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c0: 000cb383 ld x7,0(x25) + 800035c4: 01738c63 beq x7,x23,800035dc + 800035c8: 3510746f jal x8,8000b118 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 80018735 .word 0x80018735 + 800035d8: 00000000 .word 0x00000000 + 800035dc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xfffffffffffffffe + 800035e0: 000a3303 ld x6,0(x20) + 800035e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x7ffffffffffffffe + 800035e8: 000a3d03 ld x26,0(x20) + 800035ec: 008a0a13 addi x20,x20,8 + +00000000800035f0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64es x24, x6, x26 # perform operation + 800035f0: 33a30c33 aes64es x24,x6,x26 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f4: 000cb383 ld x7,0(x25) + 800035f8: 01838c63 beq x7,x24,80003610 + 800035fc: 31d0746f jal x8,8000b118 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 800187a7 .word 0x800187a7 + 8000360c: 00000000 .word 0x00000000 + 80003610: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xfffffffffffffffe + 80003614: 000a3203 ld x4,0(x20) + 80003618: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xffffffffffffffff + 8000361c: 000a3d03 ld x26,0(x20) + 80003620: 008a0a13 addi x20,x20,8 + +0000000080003624 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64es x21, x4, x26 # perform operation + 80003624: 33a20ab3 aes64es x21,x4,x26 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003628: 000cb383 ld x7,0(x25) + 8000362c: 01538c63 beq x7,x21,80003644 + 80003630: 2e90746f jal x8,8000b118 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 80018819 .word 0x80018819 + 80003640: 00000000 .word 0x00000000 + 80003644: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xfffffffffffffffe + 80003648: 000a3503 ld x10,0(x20) + 8000364c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xfffffffffffffffe + 80003650: 000a3903 ld x18,0(x20) + 80003654: 008a0a13 addi x20,x20,8 + +0000000080003658 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64es x15, x10, x18 # perform operation + 80003658: 332507b3 aes64es x15,x10,x18 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000365c: 000cb383 ld x7,0(x25) + 80003660: 00f38c63 beq x7,x15,80003678 + 80003664: 2b50746f jal x8,8000b118 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 8001888b .word 0x8001888b + 80003674: 00000000 .word 0x00000000 + 80003678: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xfffffffffffffffe + 8000367c: 000a3483 ld x9,0(x20) + 80003680: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x5bbc887763ae86f2 + 80003684: 000a3203 ld x4,0(x20) + 80003688: 008a0a13 addi x20,x20,8 + +000000008000368c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64es x11, x9, x4 # perform operation + 8000368c: 324485b3 aes64es x11,x9,x4 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003690: 000cb383 ld x7,0(x25) + 80003694: 00b38c63 beq x7,x11,800036ac + 80003698: 2810746f jal x8,8000b118 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 800188fd .word 0x800188fd + 800036a8: 00000000 .word 0x00000000 + 800036ac: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xfffffffffffffffe + 800036b0: 000a3b03 ld x22,0(x20) + 800036b4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800036b8: 000a3583 ld x11,0(x20) + 800036bc: 008a0a13 addi x20,x20,8 + +00000000800036c0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x3, x22, x11 # perform operation + 800036c0: 32bb01b3 aes64es x3,x22,x11 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c4: 000cb383 ld x7,0(x25) + 800036c8: 00338c63 beq x7,x3,800036e0 + 800036cc: 24d0746f jal x8,8000b118 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 8001896f .word 0x8001896f + 800036dc: 00000000 .word 0x00000000 + 800036e0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0xfffffffffffffffe + 800036e4: 000a3b83 ld x23,0(x20) + 800036e8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x5555555555555555 + 800036ec: 000a3983 ld x19,0(x20) + 800036f0: 008a0a13 addi x20,x20,8 + +00000000800036f4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64es x28, x23, x19 # perform operation + 800036f4: 333b8e33 aes64es x28,x23,x19 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f8: 000cb383 ld x7,0(x25) + 800036fc: 01c38c63 beq x7,x28,80003714 + 80003700: 2190746f jal x8,8000b118 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 800189e1 .word 0x800189e1 + 80003710: 00000000 .word 0x00000000 + 80003714: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003718: 000a3683 ld x13,0(x20) + 8000371c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x00000000ffffffff + 80003720: 000a3b03 ld x22,0(x20) + 80003724: 008a0a13 addi x20,x20,8 + +0000000080003728 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64es x14, x13, x22 # perform operation + 80003728: 33668733 aes64es x14,x13,x22 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000372c: 000cb383 ld x7,0(x25) + 80003730: 00e38c63 beq x7,x14,80003748 + 80003734: 1e50746f jal x8,8000b118 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 80018a53 .word 0x80018a53 + 80003744: 00000000 .word 0x00000000 + 80003748: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xfffffffffffffffe + 8000374c: 000a3a83 ld x21,0(x20) + 80003750: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x00000000fffffffe + 80003754: 000a3683 ld x13,0(x20) + 80003758: 008a0a13 addi x20,x20,8 + +000000008000375c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64es x31, x21, x13 # perform operation + 8000375c: 32da8fb3 aes64es x31,x21,x13 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003760: 000cb383 ld x7,0(x25) + 80003764: 01f38c63 beq x7,x31,8000377c + 80003768: 1b10746f jal x8,8000b118 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80018abd .word 0x80018abd + 80003778: 00000000 .word 0x00000000 + 8000377c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xfffffffffffffffe + 80003780: 000a3783 ld x15,0(x20) + 80003784: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x0000000100000000 + 80003788: 000a3c03 ld x24,0(x20) + 8000378c: 008a0a13 addi x20,x20,8 + +0000000080003790 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64es x1, x15, x24 # perform operation + 80003790: 338780b3 aes64es x1,x15,x24 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003794: 000cb383 ld x7,0(x25) + 80003798: 00138c63 beq x7,x1,800037b0 + 8000379c: 17d0746f jal x8,8000b118 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 80018b27 .word 0x80018b27 + 800037ac: 00000000 .word 0x00000000 + 800037b0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0xfffffffffffffffe + 800037b4: 000a3f83 ld x31,0(x20) + 800037b8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x0000000100000001 + 800037bc: 000a3a83 ld x21,0(x20) + 800037c0: 008a0a13 addi x20,x20,8 + +00000000800037c4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64es x28, x31, x21 # perform operation + 800037c4: 335f8e33 aes64es x28,x31,x21 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c8: 000cb383 ld x7,0(x25) + 800037cc: 01c38c63 beq x7,x28,800037e4 + 800037d0: 1490746f jal x8,8000b118 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 80018b92 .word 0x80018b92 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 800037e8: 000a3303 ld x6,0(x20) + 800037ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000000000000 + 800037f0: 000a3283 ld x5,0(x20) + 800037f4: 008a0a13 addi x20,x20,8 + +00000000800037f8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64es x3, x6, x5 # perform operation + 800037f8: 325301b3 aes64es x3,x6,x5 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037fc: 000cb383 ld x7,0(x25) + 80003800: 00338c63 beq x7,x3,80003818 + 80003804: 1150746f jal x8,8000b118 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 80018bfd .word 0x80018bfd + 80003814: 00000000 .word 0x00000000 + 80003818: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 8000381c: 000a3103 ld x2,0(x20) + 80003820: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x0000000000000001 + 80003824: 000a3783 ld x15,0(x20) + 80003828: 008a0a13 addi x20,x20,8 + +000000008000382c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64es x19, x2, x15 # perform operation + 8000382c: 32f109b3 aes64es x19,x2,x15 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003830: 000cb383 ld x7,0(x25) + 80003834: 01338c63 beq x7,x19,8000384c + 80003838: 0e10746f jal x8,8000b118 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 80018c60 .word 0x80018c60 + 80003848: 00000000 .word 0x00000000 + 8000384c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x5bbc887763ae86f2 + 80003850: 000a3683 ld x13,0(x20) + 80003854: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x0000000000000002 + 80003858: 000a3583 ld x11,0(x20) + 8000385c: 008a0a13 addi x20,x20,8 + +0000000080003860 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64es x3, x13, x11 # perform operation + 80003860: 32b681b3 aes64es x3,x13,x11 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003864: 000cb383 ld x7,0(x25) + 80003868: 00338c63 beq x7,x3,80003880 + 8000386c: 0ad0746f jal x8,8000b118 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 80018cc3 .word 0x80018cc3 + 8000387c: 00000000 .word 0x00000000 + 80003880: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 80003884: 000a3e03 ld x28,0(x20) + 80003888: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x8000000000000000 + 8000388c: 000a3b03 ld x22,0(x20) + 80003890: 008a0a13 addi x20,x20,8 + +0000000080003894 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64es x21, x28, x22 # perform operation + 80003894: 336e0ab3 aes64es x21,x28,x22 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003898: 000cb383 ld x7,0(x25) + 8000389c: 01538c63 beq x7,x21,800038b4 + 800038a0: 0790746f jal x8,8000b118 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 80018d26 .word 0x80018d26 + 800038b0: 00000000 .word 0x00000000 + 800038b4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800038b8: 000a3e83 ld x29,0(x20) + 800038bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x8000000000000001 + 800038c0: 000a3303 ld x6,0(x20) + 800038c4: 008a0a13 addi x20,x20,8 + +00000000800038c8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64es x30, x29, x6 # perform operation + 800038c8: 326e8f33 aes64es x30,x29,x6 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038cc: 000cb383 ld x7,0(x25) + 800038d0: 01e38c63 beq x7,x30,800038e8 + 800038d4: 0450746f jal x8,8000b118 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 80018d98 .word 0x80018d98 + 800038e4: 00000000 .word 0x00000000 + 800038e8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 800038ec: 000a3a83 ld x21,0(x20) + 800038f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x7fffffffffffffff + 800038f4: 000a3d83 ld x27,0(x20) + 800038f8: 008a0a13 addi x20,x20,8 + +00000000800038fc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64es x26, x21, x27 # perform operation + 800038fc: 33ba8d33 aes64es x26,x21,x27 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003900: 000cb383 ld x7,0(x25) + 80003904: 01a38c63 beq x7,x26,8000391c + 80003908: 0110746f jal x8,8000b118 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 80018e0a .word 0x80018e0a + 80003918: 00000000 .word 0x00000000 + 8000391c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003920: 000a3503 ld x10,0(x20) + 80003924: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x7ffffffffffffffe + 80003928: 000a3a83 ld x21,0(x20) + 8000392c: 008a0a13 addi x20,x20,8 + +0000000080003930 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64es x14, x10, x21 # perform operation + 80003930: 33550733 aes64es x14,x10,x21 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003934: 000cb383 ld x7,0(x25) + 80003938: 00e38c63 beq x7,x14,80003950 + 8000393c: 7dc0746f jal x8,8000b118 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 80018e7c .word 0x80018e7c + 8000394c: 00000000 .word 0x00000000 + 80003950: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 80003954: 000a3603 ld x12,0(x20) + 80003958: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xffffffffffffffff + 8000395c: 000a3e03 ld x28,0(x20) + 80003960: 008a0a13 addi x20,x20,8 + +0000000080003964 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64es x1, x12, x28 # perform operation + 80003964: 33c600b3 aes64es x1,x12,x28 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003968: 000cb383 ld x7,0(x25) + 8000396c: 00138c63 beq x7,x1,80003984 + 80003970: 7a80746f jal x8,8000b118 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80018eee .word 0x80018eee + 80003980: 00000000 .word 0x00000000 + 80003984: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003988: 000a3f03 ld x30,0(x20) + 8000398c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xfffffffffffffffe + 80003990: 000a3483 ld x9,0(x20) + 80003994: 008a0a13 addi x20,x20,8 + +0000000080003998 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64es x31, x30, x9 # perform operation + 80003998: 329f0fb3 aes64es x31,x30,x9 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000399c: 000cb383 ld x7,0(x25) + 800039a0: 01f38c63 beq x7,x31,800039b8 + 800039a4: 7740746f jal x8,8000b118 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80018f60 .word 0x80018f60 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 800039bc: 000a3c03 ld x24,0(x20) + 800039c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 800039c4: 000a3a83 ld x21,0(x20) + 800039c8: 008a0a13 addi x20,x20,8 + +00000000800039cc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64es x16, x24, x21 # perform operation + 800039cc: 335c0833 aes64es x16,x24,x21 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d0: 000cb383 ld x7,0(x25) + 800039d4: 01038c63 beq x7,x16,800039ec + 800039d8: 7400746f jal x8,8000b118 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 80018fd2 .word 0x80018fd2 + 800039e8: 00000000 .word 0x00000000 + 800039ec: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 800039f0: 000a3c03 ld x24,0(x20) + 800039f4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800039f8: 000a3803 ld x16,0(x20) + 800039fc: 008a0a13 addi x20,x20,8 + +0000000080003a00 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x14, x24, x16 # perform operation + 80003a00: 330c0733 aes64es x14,x24,x16 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a04: 000cb383 ld x7,0(x25) + 80003a08: 00e38c63 beq x7,x14,80003a20 + 80003a0c: 70c0746f jal x8,8000b118 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 80019044 .word 0x80019044 + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003a24: 000a3c03 ld x24,0(x20) + 80003a28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x5555555555555555 + 80003a2c: 000a3083 ld x1,0(x20) + 80003a30: 008a0a13 addi x20,x20,8 + +0000000080003a34 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64es x10, x24, x1 # perform operation + 80003a34: 321c0533 aes64es x10,x24,x1 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a38: 000cb383 ld x7,0(x25) + 80003a3c: 00a38c63 beq x7,x10,80003a54 + 80003a40: 6d80746f jal x8,8000b118 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 800190b6 .word 0x800190b6 + 80003a50: 00000000 .word 0x00000000 + 80003a54: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 80003a58: 000a3583 ld x11,0(x20) + 80003a5c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x00000000ffffffff + 80003a60: 000a3c03 ld x24,0(x20) + 80003a64: 008a0a13 addi x20,x20,8 + +0000000080003a68 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64es x10, x11, x24 # perform operation + 80003a68: 33858533 aes64es x10,x11,x24 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a6c: 000cb383 ld x7,0(x25) + 80003a70: 00a38c63 beq x7,x10,80003a88 + 80003a74: 6a40746f jal x8,8000b118 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80019128 .word 0x80019128 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 80003a8c: 000a3903 ld x18,0(x20) + 80003a90: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x00000000fffffffe + 80003a94: 000a3803 ld x16,0(x20) + 80003a98: 008a0a13 addi x20,x20,8 + +0000000080003a9c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64es x23, x18, x16 # perform operation + 80003a9c: 33090bb3 aes64es x23,x18,x16 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa0: 000cb383 ld x7,0(x25) + 80003aa4: 01738c63 beq x7,x23,80003abc + 80003aa8: 6700746f jal x8,8000b118 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 80019192 .word 0x80019192 + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80003ac0: 000a3503 ld x10,0(x20) + 80003ac4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000100000000 + 80003ac8: 000a3283 ld x5,0(x20) + 80003acc: 008a0a13 addi x20,x20,8 + +0000000080003ad0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64es x9, x10, x5 # perform operation + 80003ad0: 325504b3 aes64es x9,x10,x5 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad4: 000cb383 ld x7,0(x25) + 80003ad8: 00938c63 beq x7,x9,80003af0 + 80003adc: 63c0746f jal x8,8000b118 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 800191fc .word 0x800191fc + 80003aec: 00000000 .word 0x00000000 + 80003af0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003af4: 000a3f03 ld x30,0(x20) + 80003af8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x0000000100000001 + 80003afc: 000a3783 ld x15,0(x20) + 80003b00: 008a0a13 addi x20,x20,8 + +0000000080003b04 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64es x14, x30, x15 # perform operation + 80003b04: 32ff0733 aes64es x14,x30,x15 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b08: 000cb383 ld x7,0(x25) + 80003b0c: 00e38c63 beq x7,x14,80003b24 + 80003b10: 6080746f jal x8,8000b118 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80019267 .word 0x80019267 + 80003b20: 00000000 .word 0x00000000 + 80003b24: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003b28: 000a3083 ld x1,0(x20) + 80003b2c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000000000000 + 80003b30: 000a3283 ld x5,0(x20) + 80003b34: 008a0a13 addi x20,x20,8 + +0000000080003b38 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64es x19, x1, x5 # perform operation + 80003b38: 325089b3 aes64es x19,x1,x5 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b3c: 000cb383 ld x7,0(x25) + 80003b40: 01338c63 beq x7,x19,80003b58 + 80003b44: 5d40746f jal x8,8000b118 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 800192d2 .word 0x800192d2 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 000a3583 ld x11,0(x20) + 80003b60: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x0000000000000001 + 80003b64: 000a3e83 ld x29,0(x20) + 80003b68: 008a0a13 addi x20,x20,8 + +0000000080003b6c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64es x18, x11, x29 # perform operation + 80003b6c: 33d58933 aes64es x18,x11,x29 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b70: 000cb383 ld x7,0(x25) + 80003b74: 01238c63 beq x7,x18,80003b8c + 80003b78: 5a00746f jal x8,8000b118 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80019335 .word 0x80019335 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003b90: 000a3883 ld x17,0(x20) + 80003b94: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000000000002 + 80003b98: 000a3d83 ld x27,0(x20) + 80003b9c: 008a0a13 addi x20,x20,8 + +0000000080003ba0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64es x5, x17, x27 # perform operation + 80003ba0: 33b882b3 aes64es x5,x17,x27 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba4: 000cb383 ld x7,0(x25) + 80003ba8: 00538c63 beq x7,x5,80003bc0 + 80003bac: 56c0746f jal x8,8000b118 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 80019398 .word 0x80019398 + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 000a3483 ld x9,0(x20) + 80003bc8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x8000000000000000 + 80003bcc: 000a3183 ld x3,0(x20) + 80003bd0: 008a0a13 addi x20,x20,8 + +0000000080003bd4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64es x29, x9, x3 # perform operation + 80003bd4: 32348eb3 aes64es x29,x9,x3 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd8: 000cb383 ld x7,0(x25) + 80003bdc: 01d38c63 beq x7,x29,80003bf4 + 80003be0: 5380746f jal x8,8000b118 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 800193fb .word 0x800193fb + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 000a3a83 ld x21,0(x20) + 80003bfc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x8000000000000001 + 80003c00: 000a3083 ld x1,0(x20) + 80003c04: 008a0a13 addi x20,x20,8 + +0000000080003c08 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64es x23, x21, x1 # perform operation + 80003c08: 321a8bb3 aes64es x23,x21,x1 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c0c: 000cb383 ld x7,0(x25) + 80003c10: 01738c63 beq x7,x23,80003c28 + 80003c14: 5040746f jal x8,8000b118 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 8001946d .word 0x8001946d + 80003c24: 00000000 .word 0x00000000 + 80003c28: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 000a3883 ld x17,0(x20) + 80003c30: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x7fffffffffffffff + 80003c34: 000a3283 ld x5,0(x20) + 80003c38: 008a0a13 addi x20,x20,8 + +0000000080003c3c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64es x13, x17, x5 # perform operation + 80003c3c: 325886b3 aes64es x13,x17,x5 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c40: 000cb383 ld x7,0(x25) + 80003c44: 00d38c63 beq x7,x13,80003c5c + 80003c48: 4d00746f jal x8,8000b118 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 800194df .word 0x800194df + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003c60: 000a3e83 ld x29,0(x20) + 80003c64: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80003c68: 000a3103 ld x2,0(x20) + 80003c6c: 008a0a13 addi x20,x20,8 + +0000000080003c70 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64es x9, x29, x2 # perform operation + 80003c70: 322e84b3 aes64es x9,x29,x2 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c74: 000cb383 ld x7,0(x25) + 80003c78: 00938c63 beq x7,x9,80003c90 + 80003c7c: 49c0746f jal x8,8000b118 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 80019551 .word 0x80019551 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xaaaaaaaaaaaaaaaa + 80003c94: 000a3283 ld x5,0(x20) + 80003c98: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xffffffffffffffff + 80003c9c: 000a3083 ld x1,0(x20) + 80003ca0: 008a0a13 addi x20,x20,8 + +0000000080003ca4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64es x18, x5, x1 # perform operation + 80003ca4: 32128933 aes64es x18,x5,x1 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca8: 000cb383 ld x7,0(x25) + 80003cac: 01238c63 beq x7,x18,80003cc4 + 80003cb0: 4680746f jal x8,8000b118 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 800195c3 .word 0x800195c3 + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 000a3f03 ld x30,0(x20) + 80003ccc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xfffffffffffffffe + 80003cd0: 000a3603 ld x12,0(x20) + 80003cd4: 008a0a13 addi x20,x20,8 + +0000000080003cd8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64es x5, x30, x12 # perform operation + 80003cd8: 32cf02b3 aes64es x5,x30,x12 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cdc: 000cb383 ld x7,0(x25) + 80003ce0: 00538c63 beq x7,x5,80003cf8 + 80003ce4: 4340746f jal x8,8000b118 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 80019635 .word 0x80019635 + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 000a3603 ld x12,0(x20) + 80003d00: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x5bbc887763ae86f2 + 80003d04: 000a3503 ld x10,0(x20) + 80003d08: 008a0a13 addi x20,x20,8 + +0000000080003d0c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64es x28, x12, x10 # perform operation + 80003d0c: 32a60e33 aes64es x28,x12,x10 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d10: 000cb383 ld x7,0(x25) + 80003d14: 01c38c63 beq x7,x28,80003d2c + 80003d18: 4000746f jal x8,8000b118 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 800196a7 .word 0x800196a7 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003d30: 000a3b03 ld x22,0(x20) + 80003d34: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 80003d38: 000a3d03 ld x26,0(x20) + 80003d3c: 008a0a13 addi x20,x20,8 + +0000000080003d40 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x5, x22, x26 # perform operation + 80003d40: 33ab02b3 aes64es x5,x22,x26 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d44: 000cb383 ld x7,0(x25) + 80003d48: 00538c63 beq x7,x5,80003d60 + 80003d4c: 3cc0746f jal x8,8000b118 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 80019719 .word 0x80019719 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003d64: 000a3e83 ld x29,0(x20) + 80003d68: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x5555555555555555 + 80003d6c: 000a3b03 ld x22,0(x20) + 80003d70: 008a0a13 addi x20,x20,8 + +0000000080003d74 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64es x30, x29, x22 # perform operation + 80003d74: 336e8f33 aes64es x30,x29,x22 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d78: 000cb383 ld x7,0(x25) + 80003d7c: 01e38c63 beq x7,x30,80003d94 + 80003d80: 3980746f jal x8,8000b118 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 8001978b .word 0x8001978b + 80003d90: 00000000 .word 0x00000000 + 80003d94: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003d98: 000a3803 ld x16,0(x20) + 80003d9c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x00000000ffffffff + 80003da0: 000a3783 ld x15,0(x20) + 80003da4: 008a0a13 addi x20,x20,8 + +0000000080003da8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64es x12, x16, x15 # perform operation + 80003da8: 32f80633 aes64es x12,x16,x15 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003dac: 000cb383 ld x7,0(x25) + 80003db0: 00c38c63 beq x7,x12,80003dc8 + 80003db4: 3640746f jal x8,8000b118 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 800197fd .word 0x800197fd + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 000a3903 ld x18,0(x20) + 80003dd0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x00000000fffffffe + 80003dd4: 000a3e83 ld x29,0(x20) + 80003dd8: 008a0a13 addi x20,x20,8 + +0000000080003ddc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64es x10, x18, x29 # perform operation + 80003ddc: 33d90533 aes64es x10,x18,x29 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de0: 000cb383 ld x7,0(x25) + 80003de4: 00a38c63 beq x7,x10,80003dfc + 80003de8: 3300746f jal x8,8000b118 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 80019867 .word 0x80019867 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003e00: 000a3a83 ld x21,0(x20) + 80003e04: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x0000000100000000 + 80003e08: 000a3303 ld x6,0(x20) + 80003e0c: 008a0a13 addi x20,x20,8 + +0000000080003e10 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64es x4, x21, x6 # perform operation + 80003e10: 326a8233 aes64es x4,x21,x6 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e14: 000cb383 ld x7,0(x25) + 80003e18: 00438c63 beq x7,x4,80003e30 + 80003e1c: 2fc0746f jal x8,8000b118 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 800198d1 .word 0x800198d1 + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003e34: 000a3983 ld x19,0(x20) + 80003e38: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x0000000100000001 + 80003e3c: 000a3903 ld x18,0(x20) + 80003e40: 008a0a13 addi x20,x20,8 + +0000000080003e44 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64es x2, x19, x18 # perform operation + 80003e44: 33298133 aes64es x2,x19,x18 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e48: 000cb383 ld x7,0(x25) + 80003e4c: 00238c63 beq x7,x2,80003e64 + 80003e50: 2c80746f jal x8,8000b118 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 8001993c .word 0x8001993c + 80003e60: 00000000 .word 0x00000000 + 80003e64: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x5555555555555555 + 80003e68: 000a3183 ld x3,0(x20) + 80003e6c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x0000000000000000 + 80003e70: 000a3d83 ld x27,0(x20) + 80003e74: 008a0a13 addi x20,x20,8 + +0000000080003e78 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64es x17, x3, x27 # perform operation + 80003e78: 33b188b3 aes64es x17,x3,x27 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e7c: 000cb383 ld x7,0(x25) + 80003e80: 01138c63 beq x7,x17,80003e98 + 80003e84: 2940746f jal x8,8000b118 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 800199a7 .word 0x800199a7 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x5555555555555555 + 80003e9c: 000a3b03 ld x22,0(x20) + 80003ea0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x0000000000000001 + 80003ea4: 000a3783 ld x15,0(x20) + 80003ea8: 008a0a13 addi x20,x20,8 + +0000000080003eac : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64es x27, x22, x15 # perform operation + 80003eac: 32fb0db3 aes64es x27,x22,x15 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb0: 000cb383 ld x7,0(x25) + 80003eb4: 01b38c63 beq x7,x27,80003ecc + 80003eb8: 2600746f jal x8,8000b118 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 80019a0a .word 0x80019a0a + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x5555555555555555 + 80003ed0: 000a3783 ld x15,0(x20) + 80003ed4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0000000000000002 + 80003ed8: 000a3b83 ld x23,0(x20) + 80003edc: 008a0a13 addi x20,x20,8 + +0000000080003ee0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64es x30, x15, x23 # perform operation + 80003ee0: 33778f33 aes64es x30,x15,x23 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee4: 000cb383 ld x7,0(x25) + 80003ee8: 01e38c63 beq x7,x30,80003f00 + 80003eec: 22c0746f jal x8,8000b118 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 80019a6d .word 0x80019a6d + 80003efc: 00000000 .word 0x00000000 + 80003f00: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x5555555555555555 + 80003f04: 000a3d83 ld x27,0(x20) + 80003f08: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x8000000000000000 + 80003f0c: 000a3783 ld x15,0(x20) + 80003f10: 008a0a13 addi x20,x20,8 + +0000000080003f14 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64es x13, x27, x15 # perform operation + 80003f14: 32fd86b3 aes64es x13,x27,x15 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f18: 000cb383 ld x7,0(x25) + 80003f1c: 00d38c63 beq x7,x13,80003f34 + 80003f20: 1f80746f jal x8,8000b118 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 80019ad0 .word 0x80019ad0 + 80003f30: 00000000 .word 0x00000000 + 80003f34: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x5555555555555555 + 80003f38: 000a3f03 ld x30,0(x20) + 80003f3c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x8000000000000001 + 80003f40: 000a3603 ld x12,0(x20) + 80003f44: 008a0a13 addi x20,x20,8 + +0000000080003f48 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64es x28, x30, x12 # perform operation + 80003f48: 32cf0e33 aes64es x28,x30,x12 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f4c: 000cb383 ld x7,0(x25) + 80003f50: 01c38c63 beq x7,x28,80003f68 + 80003f54: 1c40746f jal x8,8000b118 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 80019b42 .word 0x80019b42 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x5555555555555555 + 80003f6c: 000a3203 ld x4,0(x20) + 80003f70: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x7fffffffffffffff + 80003f74: 000a3483 ld x9,0(x20) + 80003f78: 008a0a13 addi x20,x20,8 + +0000000080003f7c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64es x18, x4, x9 # perform operation + 80003f7c: 32920933 aes64es x18,x4,x9 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f80: 000cb383 ld x7,0(x25) + 80003f84: 01238c63 beq x7,x18,80003f9c + 80003f88: 1900746f jal x8,8000b118 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 80019bb4 .word 0x80019bb4 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x5555555555555555 + 80003fa0: 000a3683 ld x13,0(x20) + 80003fa4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80003fa8: 000a3903 ld x18,0(x20) + 80003fac: 008a0a13 addi x20,x20,8 + +0000000080003fb0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64es x9, x13, x18 # perform operation + 80003fb0: 332684b3 aes64es x9,x13,x18 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb4: 000cb383 ld x7,0(x25) + 80003fb8: 00938c63 beq x7,x9,80003fd0 + 80003fbc: 15c0746f jal x8,8000b118 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 80019c26 .word 0x80019c26 + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x5555555555555555 + 80003fd4: 000a3e83 ld x29,0(x20) + 80003fd8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xffffffffffffffff + 80003fdc: 000a3303 ld x6,0(x20) + 80003fe0: 008a0a13 addi x20,x20,8 + +0000000080003fe4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64es x5, x29, x6 # perform operation + 80003fe4: 326e82b3 aes64es x5,x29,x6 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe8: 000cb383 ld x7,0(x25) + 80003fec: 00538c63 beq x7,x5,80004004 + 80003ff0: 1280746f jal x8,8000b118 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 80019c98 .word 0x80019c98 + 80004000: 00000000 .word 0x00000000 + 80004004: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x5555555555555555 + 80004008: 000a3983 ld x19,0(x20) + 8000400c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xfffffffffffffffe + 80004010: 000a3883 ld x17,0(x20) + 80004014: 008a0a13 addi x20,x20,8 + +0000000080004018 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64es x12, x19, x17 # perform operation + 80004018: 33198633 aes64es x12,x19,x17 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000401c: 000cb383 ld x7,0(x25) + 80004020: 00c38c63 beq x7,x12,80004038 + 80004024: 0f40746f jal x8,8000b118 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 80019d0a .word 0x80019d0a + 80004034: 00000000 .word 0x00000000 + 80004038: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x5555555555555555 + 8000403c: 000a3503 ld x10,0(x20) + 80004040: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80004044: 000a3883 ld x17,0(x20) + 80004048: 008a0a13 addi x20,x20,8 + +000000008000404c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64es x23, x10, x17 # perform operation + 8000404c: 33150bb3 aes64es x23,x10,x17 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004050: 000cb383 ld x7,0(x25) + 80004054: 01738c63 beq x7,x23,8000406c + 80004058: 0c00746f jal x8,8000b118 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 80019d7c .word 0x80019d7c + 80004068: 00000000 .word 0x00000000 + 8000406c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x5555555555555555 + 80004070: 000a3703 ld x14,0(x20) + 80004074: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80004078: 000a3303 ld x6,0(x20) + 8000407c: 008a0a13 addi x20,x20,8 + +0000000080004080 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x30, x14, x6 # perform operation + 80004080: 32670f33 aes64es x30,x14,x6 + # Check if x30 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x30, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004084: 000cb383 ld x7,0(x25) + 80004088: 01e38c63 beq x7,x30,800040a0 + 8000408c: 08c0746f jal x8,8000b118 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 80019dee .word 0x80019dee + 8000409c: 00000000 .word 0x00000000 + 800040a0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x5555555555555555 + 800040a4: 000a3b03 ld x22,0(x20) + 800040a8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x5555555555555555 + 800040ac: 000a3803 ld x16,0(x20) + 800040b0: 008a0a13 addi x20,x20,8 + +00000000800040b4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64es x26, x22, x16 # perform operation + 800040b4: 330b0d33 aes64es x26,x22,x16 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b8: 000cb383 ld x7,0(x25) + 800040bc: 01a38c63 beq x7,x26,800040d4 + 800040c0: 0580746f jal x8,8000b118 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80019e60 .word 0x80019e60 + 800040d0: 00000000 .word 0x00000000 + 800040d4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x5555555555555555 + 800040d8: 000a3a83 ld x21,0(x20) + 800040dc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x00000000ffffffff + 800040e0: 000a3803 ld x16,0(x20) + 800040e4: 008a0a13 addi x20,x20,8 + +00000000800040e8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64es x2, x21, x16 # perform operation + 800040e8: 330a8133 aes64es x2,x21,x16 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040ec: 000cb383 ld x7,0(x25) + 800040f0: 00238c63 beq x7,x2,80004108 + 800040f4: 0240746f jal x8,8000b118 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 80019ed2 .word 0x80019ed2 + 80004104: 00000000 .word 0x00000000 + 80004108: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x5555555555555555 + 8000410c: 000a3583 ld x11,0(x20) + 80004110: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x00000000fffffffe + 80004114: 000a3303 ld x6,0(x20) + 80004118: 008a0a13 addi x20,x20,8 + +000000008000411c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64es x13, x11, x6 # perform operation + 8000411c: 326586b3 aes64es x13,x11,x6 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004120: 000cb383 ld x7,0(x25) + 80004124: 00d38c63 beq x7,x13,8000413c + 80004128: 7f10646f jal x8,8000b118 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 80019f3c .word 0x80019f3c + 80004138: 00000000 .word 0x00000000 + 8000413c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x5555555555555555 + 80004140: 000a3483 ld x9,0(x20) + 80004144: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x0000000100000000 + 80004148: 000a3c03 ld x24,0(x20) + 8000414c: 008a0a13 addi x20,x20,8 + +0000000080004150 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64es x10, x9, x24 # perform operation + 80004150: 33848533 aes64es x10,x9,x24 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004154: 000cb383 ld x7,0(x25) + 80004158: 00a38c63 beq x7,x10,80004170 + 8000415c: 7bd0646f jal x8,8000b118 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 80019fa6 .word 0x80019fa6 + 8000416c: 00000000 .word 0x00000000 + 80004170: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x5555555555555555 + 80004174: 000a3e83 ld x29,0(x20) + 80004178: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x0000000100000001 + 8000417c: 000a3483 ld x9,0(x20) + 80004180: 008a0a13 addi x20,x20,8 + +0000000080004184 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64es x1, x29, x9 # perform operation + 80004184: 329e80b3 aes64es x1,x29,x9 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004188: 000cb383 ld x7,0(x25) + 8000418c: 00138c63 beq x7,x1,800041a4 + 80004190: 7890646f jal x8,8000b118 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 8001a011 .word 0x8001a011 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x00000000ffffffff + 800041a8: 000a3083 ld x1,0(x20) + 800041ac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0000000000000000 + 800041b0: 000a3503 ld x10,0(x20) + 800041b4: 008a0a13 addi x20,x20,8 + +00000000800041b8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64es x9, x1, x10 # perform operation + 800041b8: 32a084b3 aes64es x9,x1,x10 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041bc: 000cb383 ld x7,0(x25) + 800041c0: 00938c63 beq x7,x9,800041d8 + 800041c4: 7550646f jal x8,8000b118 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 8001a07c .word 0x8001a07c + 800041d4: 00000000 .word 0x00000000 + 800041d8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000000ffffffff + 800041dc: 000a3d03 ld x26,0(x20) + 800041e0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0x0000000000000001 + 800041e4: 000a3883 ld x17,0(x20) + 800041e8: 008a0a13 addi x20,x20,8 + +00000000800041ec : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64es x18, x26, x17 # perform operation + 800041ec: 331d0933 aes64es x18,x26,x17 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f0: 000cb383 ld x7,0(x25) + 800041f4: 01238c63 beq x7,x18,8000420c + 800041f8: 7210646f jal x8,8000b118 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 8001a0d7 .word 0x8001a0d7 + 80004208: 00000000 .word 0x00000000 + 8000420c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x00000000ffffffff + 80004210: 000a3d83 ld x27,0(x20) + 80004214: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x0000000000000002 + 80004218: 000a3d03 ld x26,0(x20) + 8000421c: 008a0a13 addi x20,x20,8 + +0000000080004220 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64es x6, x27, x26 # perform operation + 80004220: 33ad8333 aes64es x6,x27,x26 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004224: 000cb383 ld x7,0(x25) + 80004228: 00638c63 beq x7,x6,80004240 + 8000422c: 6ed0646f jal x8,8000b118 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 8001a132 .word 0x8001a132 + 8000423c: 00000000 .word 0x00000000 + 80004240: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x00000000ffffffff + 80004244: 000a3703 ld x14,0(x20) + 80004248: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x8000000000000000 + 8000424c: 000a3603 ld x12,0(x20) + 80004250: 008a0a13 addi x20,x20,8 + +0000000080004254 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64es x2, x14, x12 # perform operation + 80004254: 32c70133 aes64es x2,x14,x12 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004258: 000cb383 ld x7,0(x25) + 8000425c: 00238c63 beq x7,x2,80004274 + 80004260: 6b90646f jal x8,8000b118 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 8001a18d .word 0x8001a18d + 80004270: 00000000 .word 0x00000000 + 80004274: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x00000000ffffffff + 80004278: 000a3283 ld x5,0(x20) + 8000427c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x8000000000000001 + 80004280: 000a3983 ld x19,0(x20) + 80004284: 008a0a13 addi x20,x20,8 + +0000000080004288 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64es x12, x5, x19 # perform operation + 80004288: 33328633 aes64es x12,x5,x19 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000428c: 000cb383 ld x7,0(x25) + 80004290: 00c38c63 beq x7,x12,800042a8 + 80004294: 6850646f jal x8,8000b118 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 8001a1f7 .word 0x8001a1f7 + 800042a4: 00000000 .word 0x00000000 + 800042a8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x00000000ffffffff + 800042ac: 000a3703 ld x14,0(x20) + 800042b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x7fffffffffffffff + 800042b4: 000a3203 ld x4,0(x20) + 800042b8: 008a0a13 addi x20,x20,8 + +00000000800042bc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64es x26, x14, x4 # perform operation + 800042bc: 32470d33 aes64es x26,x14,x4 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c0: 000cb383 ld x7,0(x25) + 800042c4: 01a38c63 beq x7,x26,800042dc + 800042c8: 6510646f jal x8,8000b118 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 8001a261 .word 0x8001a261 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000000ffffffff + 800042e0: 000a3c03 ld x24,0(x20) + 800042e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x7ffffffffffffffe + 800042e8: 000a3103 ld x2,0(x20) + 800042ec: 008a0a13 addi x20,x20,8 + +00000000800042f0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64es x9, x24, x2 # perform operation + 800042f0: 322c04b3 aes64es x9,x24,x2 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f4: 000cb383 ld x7,0(x25) + 800042f8: 00938c63 beq x7,x9,80004310 + 800042fc: 61d0646f jal x8,8000b118 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 8001a2cb .word 0x8001a2cb + 8000430c: 00000000 .word 0x00000000 + 80004310: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x00000000ffffffff + 80004314: 000a3b03 ld x22,0(x20) + 80004318: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xffffffffffffffff + 8000431c: 000a3683 ld x13,0(x20) + 80004320: 008a0a13 addi x20,x20,8 + +0000000080004324 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64es x10, x22, x13 # perform operation + 80004324: 32db0533 aes64es x10,x22,x13 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004328: 000cb383 ld x7,0(x25) + 8000432c: 00a38c63 beq x7,x10,80004344 + 80004330: 5e90646f jal x8,8000b118 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 8001a335 .word 0x8001a335 + 80004340: 00000000 .word 0x00000000 + 80004344: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000000ffffffff + 80004348: 000a3503 ld x10,0(x20) + 8000434c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xfffffffffffffffe + 80004350: 000a3083 ld x1,0(x20) + 80004354: 008a0a13 addi x20,x20,8 + +0000000080004358 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64es x26, x10, x1 # perform operation + 80004358: 32150d33 aes64es x26,x10,x1 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000435c: 000cb383 ld x7,0(x25) + 80004360: 01a38c63 beq x7,x26,80004378 + 80004364: 5b50646f jal x8,8000b118 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 8001a39f .word 0x8001a39f + 80004374: 00000000 .word 0x00000000 + 80004378: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x00000000ffffffff + 8000437c: 000a3083 ld x1,0(x20) + 80004380: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80004384: 000a3783 ld x15,0(x20) + 80004388: 008a0a13 addi x20,x20,8 + +000000008000438c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64es x23, x1, x15 # perform operation + 8000438c: 32f08bb3 aes64es x23,x1,x15 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004390: 000cb383 ld x7,0(x25) + 80004394: 01738c63 beq x7,x23,800043ac + 80004398: 5810646f jal x8,8000b118 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 8001a409 .word 0x8001a409 + 800043a8: 00000000 .word 0x00000000 + 800043ac: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x00000000ffffffff + 800043b0: 000a3183 ld x3,0(x20) + 800043b4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800043b8: 000a3803 ld x16,0(x20) + 800043bc: 008a0a13 addi x20,x20,8 + +00000000800043c0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x1, x3, x16 # perform operation + 800043c0: 330180b3 aes64es x1,x3,x16 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c4: 000cb383 ld x7,0(x25) + 800043c8: 00138c63 beq x7,x1,800043e0 + 800043cc: 54d0646f jal x8,8000b118 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 8001a473 .word 0x8001a473 + 800043dc: 00000000 .word 0x00000000 + 800043e0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x00000000ffffffff + 800043e4: 000a3683 ld x13,0(x20) + 800043e8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5555555555555555 + 800043ec: 000a3b83 ld x23,0(x20) + 800043f0: 008a0a13 addi x20,x20,8 + +00000000800043f4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64es x15, x13, x23 # perform operation + 800043f4: 337687b3 aes64es x15,x13,x23 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f8: 000cb383 ld x7,0(x25) + 800043fc: 00f38c63 beq x7,x15,80004414 + 80004400: 5190646f jal x8,8000b118 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 8001a4dd .word 0x8001a4dd + 80004410: 00000000 .word 0x00000000 + 80004414: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x00000000ffffffff + 80004418: 000a3083 ld x1,0(x20) + 8000441c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x00000000ffffffff + 80004420: 000a3b83 ld x23,0(x20) + 80004424: 008a0a13 addi x20,x20,8 + +0000000080004428 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64es x31, x1, x23 # perform operation + 80004428: 33708fb3 aes64es x31,x1,x23 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000442c: 000cb383 ld x7,0(x25) + 80004430: 01f38c63 beq x7,x31,80004448 + 80004434: 4e50646f jal x8,8000b118 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 8001a547 .word 0x8001a547 + 80004444: 00000000 .word 0x00000000 + 80004448: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x00000000ffffffff + 8000444c: 000a3e03 ld x28,0(x20) + 80004450: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x00000000fffffffe + 80004454: 000a3683 ld x13,0(x20) + 80004458: 008a0a13 addi x20,x20,8 + +000000008000445c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64es x15, x28, x13 # perform operation + 8000445c: 32de07b3 aes64es x15,x28,x13 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004460: 000cb383 ld x7,0(x25) + 80004464: 00f38c63 beq x7,x15,8000447c + 80004468: 4b10646f jal x8,8000b118 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 8001a5a9 .word 0x8001a5a9 + 80004478: 00000000 .word 0x00000000 + 8000447c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x00000000ffffffff + 80004480: 000a3983 ld x19,0(x20) + 80004484: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x0000000100000000 + 80004488: 000a3303 ld x6,0(x20) + 8000448c: 008a0a13 addi x20,x20,8 + +0000000080004490 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64es x23, x19, x6 # perform operation + 80004490: 32698bb3 aes64es x23,x19,x6 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004494: 000cb383 ld x7,0(x25) + 80004498: 01738c63 beq x7,x23,800044b0 + 8000449c: 47d0646f jal x8,8000b118 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 8001a60b .word 0x8001a60b + 800044ac: 00000000 .word 0x00000000 + 800044b0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x00000000ffffffff + 800044b4: 000a3803 ld x16,0(x20) + 800044b8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x0000000100000001 + 800044bc: 000a3e83 ld x29,0(x20) + 800044c0: 008a0a13 addi x20,x20,8 + +00000000800044c4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64es x4, x16, x29 # perform operation + 800044c4: 33d80233 aes64es x4,x16,x29 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c8: 000cb383 ld x7,0(x25) + 800044cc: 00438c63 beq x7,x4,800044e4 + 800044d0: 4490646f jal x8,8000b118 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 8001a66e .word 0x8001a66e + 800044e0: 00000000 .word 0x00000000 + 800044e4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x00000000fffffffe + 800044e8: 000a3703 ld x14,0(x20) + 800044ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0000000000000000 + 800044f0: 000a3503 ld x10,0(x20) + 800044f4: 008a0a13 addi x20,x20,8 + +00000000800044f8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64es x23, x14, x10 # perform operation + 800044f8: 32a70bb3 aes64es x23,x14,x10 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044fc: 000cb383 ld x7,0(x25) + 80004500: 01738c63 beq x7,x23,80004518 + 80004504: 4150646f jal x8,8000b118 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 8001a6d1 .word 0x8001a6d1 + 80004514: 00000000 .word 0x00000000 + 80004518: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x00000000fffffffe + 8000451c: 000a3b03 ld x22,0(x20) + 80004520: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0x0000000000000001 + 80004524: 000a3183 ld x3,0(x20) + 80004528: 008a0a13 addi x20,x20,8 + +000000008000452c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64es x27, x22, x3 # perform operation + 8000452c: 323b0db3 aes64es x27,x22,x3 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004530: 000cb383 ld x7,0(x25) + 80004534: 01b38c63 beq x7,x27,8000454c + 80004538: 3e10646f jal x8,8000b118 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 8001a72c .word 0x8001a72c + 80004548: 00000000 .word 0x00000000 + 8000454c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x00000000fffffffe + 80004550: 000a3103 ld x2,0(x20) + 80004554: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0000000000000002 + 80004558: 000a3b83 ld x23,0(x20) + 8000455c: 008a0a13 addi x20,x20,8 + +0000000080004560 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64es x27, x2, x23 # perform operation + 80004560: 33710db3 aes64es x27,x2,x23 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004564: 000cb383 ld x7,0(x25) + 80004568: 01b38c63 beq x7,x27,80004580 + 8000456c: 3ad0646f jal x8,8000b118 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 8001a787 .word 0x8001a787 + 8000457c: 00000000 .word 0x00000000 + 80004580: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000000fffffffe + 80004584: 000a3c03 ld x24,0(x20) + 80004588: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x8000000000000000 + 8000458c: 000a3583 ld x11,0(x20) + 80004590: 008a0a13 addi x20,x20,8 + +0000000080004594 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64es x16, x24, x11 # perform operation + 80004594: 32bc0833 aes64es x16,x24,x11 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004598: 000cb383 ld x7,0(x25) + 8000459c: 01038c63 beq x7,x16,800045b4 + 800045a0: 3790646f jal x8,8000b118 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 8001a7e2 .word 0x8001a7e2 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x00000000fffffffe + 800045b8: 000a3903 ld x18,0(x20) + 800045bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x8000000000000001 + 800045c0: 000a3f83 ld x31,0(x20) + 800045c4: 008a0a13 addi x20,x20,8 + +00000000800045c8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64es x1, x18, x31 # perform operation + 800045c8: 33f900b3 aes64es x1,x18,x31 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045cc: 000cb383 ld x7,0(x25) + 800045d0: 00138c63 beq x7,x1,800045e8 + 800045d4: 3450646f jal x8,8000b118 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 8001a84c .word 0x8001a84c + 800045e4: 00000000 .word 0x00000000 + 800045e8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x00000000fffffffe + 800045ec: 000a3b83 ld x23,0(x20) + 800045f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs2: x21 = 0x7fffffffffffffff + 800045f4: 000a3a83 ld x21,0(x20) + 800045f8: 008a0a13 addi x20,x20,8 + +00000000800045fc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64es x3, x23, x21 # perform operation + 800045fc: 335b81b3 aes64es x3,x23,x21 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004600: 000cb383 ld x7,0(x25) + 80004604: 00338c63 beq x7,x3,8000461c + 80004608: 3110646f jal x8,8000b118 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 8001a8b6 .word 0x8001a8b6 + 80004618: 00000000 .word 0x00000000 + 8000461c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x00000000fffffffe + 80004620: 000a3c03 ld x24,0(x20) + 80004624: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80004628: 000a3f03 ld x30,0(x20) + 8000462c: 008a0a13 addi x20,x20,8 + +0000000080004630 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64es x22, x24, x30 # perform operation + 80004630: 33ec0b33 aes64es x22,x24,x30 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004634: 000cb383 ld x7,0(x25) + 80004638: 01638c63 beq x7,x22,80004650 + 8000463c: 2dd0646f jal x8,8000b118 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 8001a920 .word 0x8001a920 + 8000464c: 00000000 .word 0x00000000 + 80004650: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x00000000fffffffe + 80004654: 000a3b03 ld x22,0(x20) + 80004658: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0xffffffffffffffff + 8000465c: 000a3203 ld x4,0(x20) + 80004660: 008a0a13 addi x20,x20,8 + +0000000080004664 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64es x26, x22, x4 # perform operation + 80004664: 324b0d33 aes64es x26,x22,x4 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004668: 000cb383 ld x7,0(x25) + 8000466c: 01a38c63 beq x7,x26,80004684 + 80004670: 2a90646f jal x8,8000b118 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 8001a98a .word 0x8001a98a + 80004680: 00000000 .word 0x00000000 + 80004684: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x00000000fffffffe + 80004688: 000a3283 ld x5,0(x20) + 8000468c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004690: 000a3583 ld x11,0(x20) + 80004694: 008a0a13 addi x20,x20,8 + +0000000080004698 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64es x27, x5, x11 # perform operation + 80004698: 32b28db3 aes64es x27,x5,x11 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000469c: 000cb383 ld x7,0(x25) + 800046a0: 01b38c63 beq x7,x27,800046b8 + 800046a4: 2750646f jal x8,8000b118 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 8001a9f4 .word 0x8001a9f4 + 800046b4: 00000000 .word 0x00000000 + 800046b8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000000fffffffe + 800046bc: 000a3d03 ld x26,0(x20) + 800046c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x5bbc887763ae86f2 + 800046c4: 000a3283 ld x5,0(x20) + 800046c8: 008a0a13 addi x20,x20,8 + +00000000800046cc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64es x21, x26, x5 # perform operation + 800046cc: 325d0ab3 aes64es x21,x26,x5 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d0: 000cb383 ld x7,0(x25) + 800046d4: 01538c63 beq x7,x21,800046ec + 800046d8: 2410646f jal x8,8000b118 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 8001aa5e .word 0x8001aa5e + 800046e8: 00000000 .word 0x00000000 + 800046ec: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x00000000fffffffe + 800046f0: 000a3d03 ld x26,0(x20) + 800046f4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800046f8: 000a3583 ld x11,0(x20) + 800046fc: 008a0a13 addi x20,x20,8 + +0000000080004700 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x21, x26, x11 # perform operation + 80004700: 32bd0ab3 aes64es x21,x26,x11 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004704: 000cb383 ld x7,0(x25) + 80004708: 01538c63 beq x7,x21,80004720 + 8000470c: 20d0646f jal x8,8000b118 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 8001aac8 .word 0x8001aac8 + 8000471c: 00000000 .word 0x00000000 + 80004720: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x00000000fffffffe + 80004724: 000a3183 ld x3,0(x20) + 80004728: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x5555555555555555 + 8000472c: 000a3483 ld x9,0(x20) + 80004730: 008a0a13 addi x20,x20,8 + +0000000080004734 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64es x2, x3, x9 # perform operation + 80004734: 32918133 aes64es x2,x3,x9 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004738: 000cb383 ld x7,0(x25) + 8000473c: 00238c63 beq x7,x2,80004754 + 80004740: 1d90646f jal x8,8000b118 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 8001ab32 .word 0x8001ab32 + 80004750: 00000000 .word 0x00000000 + 80004754: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x00000000fffffffe + 80004758: 000a3503 ld x10,0(x20) + 8000475c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x00000000ffffffff + 80004760: 000a3d03 ld x26,0(x20) + 80004764: 008a0a13 addi x20,x20,8 + +0000000080004768 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64es x5, x10, x26 # perform operation + 80004768: 33a502b3 aes64es x5,x10,x26 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000476c: 000cb383 ld x7,0(x25) + 80004770: 00538c63 beq x7,x5,80004788 + 80004774: 1a50646f jal x8,8000b118 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 8001ab9c .word 0x8001ab9c + 80004784: 00000000 .word 0x00000000 + 80004788: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x00000000fffffffe + 8000478c: 000a3e83 ld x29,0(x20) + 80004790: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x00000000fffffffe + 80004794: 000a3b83 ld x23,0(x20) + 80004798: 008a0a13 addi x20,x20,8 + +000000008000479c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64es x16, x29, x23 # perform operation + 8000479c: 337e8833 aes64es x16,x29,x23 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a0: 000cb383 ld x7,0(x25) + 800047a4: 01038c63 beq x7,x16,800047bc + 800047a8: 1710646f jal x8,8000b118 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 8001abfe .word 0x8001abfe + 800047b8: 00000000 .word 0x00000000 + 800047bc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x00000000fffffffe + 800047c0: 000a3d83 ld x27,0(x20) + 800047c4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000100000000 + 800047c8: 000a3983 ld x19,0(x20) + 800047cc: 008a0a13 addi x20,x20,8 + +00000000800047d0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64es x3, x27, x19 # perform operation + 800047d0: 333d81b3 aes64es x3,x27,x19 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d4: 000cb383 ld x7,0(x25) + 800047d8: 00338c63 beq x7,x3,800047f0 + 800047dc: 13d0646f jal x8,8000b118 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 8001ac60 .word 0x8001ac60 + 800047ec: 00000000 .word 0x00000000 + 800047f0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x00000000fffffffe + 800047f4: 000a3e83 ld x29,0(x20) + 800047f8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x0000000100000001 + 800047fc: 000a3083 ld x1,0(x20) + 80004800: 008a0a13 addi x20,x20,8 + +0000000080004804 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64es x28, x29, x1 # perform operation + 80004804: 321e8e33 aes64es x28,x29,x1 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004808: 000cb383 ld x7,0(x25) + 8000480c: 01c38c63 beq x7,x28,80004824 + 80004810: 1090646f jal x8,8000b118 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 8001acc3 .word 0x8001acc3 + 80004820: 00000000 .word 0x00000000 + 80004824: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x0000000100000000 + 80004828: 000a3a83 ld x21,0(x20) + 8000482c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x0000000000000000 + 80004830: 000a3283 ld x5,0(x20) + 80004834: 008a0a13 addi x20,x20,8 + +0000000080004838 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64es x9, x21, x5 # perform operation + 80004838: 325a84b3 aes64es x9,x21,x5 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000483c: 000cb383 ld x7,0(x25) + 80004840: 00938c63 beq x7,x9,80004858 + 80004844: 0d50646f jal x8,8000b118 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 8001ad26 .word 0x8001ad26 + 80004854: 00000000 .word 0x00000000 + 80004858: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x0000000100000000 + 8000485c: 000a3983 ld x19,0(x20) + 80004860: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x0000000000000001 + 80004864: 000a3483 ld x9,0(x20) + 80004868: 008a0a13 addi x20,x20,8 + +000000008000486c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64es x27, x19, x9 # perform operation + 8000486c: 32998db3 aes64es x27,x19,x9 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004870: 000cb383 ld x7,0(x25) + 80004874: 01b38c63 beq x7,x27,8000488c + 80004878: 0a10646f jal x8,8000b118 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 8001ad82 .word 0x8001ad82 + 80004888: 00000000 .word 0x00000000 + 8000488c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000100000000 + 80004890: 000a3503 ld x10,0(x20) + 80004894: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x0000000000000002 + 80004898: 000a3d03 ld x26,0(x20) + 8000489c: 008a0a13 addi x20,x20,8 + +00000000800048a0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64es x4, x10, x26 # perform operation + 800048a0: 33a50233 aes64es x4,x10,x26 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a4: 000cb383 ld x7,0(x25) + 800048a8: 00438c63 beq x7,x4,800048c0 + 800048ac: 06d0646f jal x8,8000b118 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 8001adde .word 0x8001adde + 800048bc: 00000000 .word 0x00000000 + 800048c0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x0000000100000000 + 800048c4: 000a3983 ld x19,0(x20) + 800048c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x8000000000000000 + 800048cc: 000a3303 ld x6,0(x20) + 800048d0: 008a0a13 addi x20,x20,8 + +00000000800048d4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64es x12, x19, x6 # perform operation + 800048d4: 32698633 aes64es x12,x19,x6 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d8: 000cb383 ld x7,0(x25) + 800048dc: 00c38c63 beq x7,x12,800048f4 + 800048e0: 0390646f jal x8,8000b118 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 8001ae3a .word 0x8001ae3a + 800048f0: 00000000 .word 0x00000000 + 800048f4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x0000000100000000 + 800048f8: 000a3d03 ld x26,0(x20) + 800048fc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x8000000000000001 + 80004900: 000a3783 ld x15,0(x20) + 80004904: 008a0a13 addi x20,x20,8 + +0000000080004908 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64es x28, x26, x15 # perform operation + 80004908: 32fd0e33 aes64es x28,x26,x15 + # Check if x28 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x28, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 8000490c: 000cb383 ld x7,0(x25) + 80004910: 01c38c63 beq x7,x28,80004928 + 80004914: 0050646f jal x8,8000b118 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 8001aea5 .word 0x8001aea5 + 80004924: 00000000 .word 0x00000000 + 80004928: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x21) # load rs1: x21 = 0x0000000100000000 + 8000492c: 000a3a83 ld x21,0(x20) + 80004930: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x7fffffffffffffff + 80004934: 000a3f03 ld x30,0(x20) + 80004938: 008a0a13 addi x20,x20,8 + +000000008000493c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64es x15, x21, x30 # perform operation + 8000493c: 33ea87b3 aes64es x15,x21,x30 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004940: 000cb383 ld x7,0(x25) + 80004944: 00f38c63 beq x7,x15,8000495c + 80004948: 7d00646f jal x8,8000b118 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 8001af10 .word 0x8001af10 + 80004958: 00000000 .word 0x00000000 + 8000495c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000100000000 + 80004960: 000a3f83 ld x31,0(x20) + 80004964: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80004968: 000a3083 ld x1,0(x20) + 8000496c: 008a0a13 addi x20,x20,8 + +0000000080004970 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64es x15, x31, x1 # perform operation + 80004970: 321f87b3 aes64es x15,x31,x1 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004974: 000cb383 ld x7,0(x25) + 80004978: 00f38c63 beq x7,x15,80004990 + 8000497c: 79c0646f jal x8,8000b118 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 8001af7b .word 0x8001af7b + 8000498c: 00000000 .word 0x00000000 + 80004990: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x0000000100000000 + 80004994: 000a3503 ld x10,0(x20) + 80004998: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xffffffffffffffff + 8000499c: 000a3f83 ld x31,0(x20) + 800049a0: 008a0a13 addi x20,x20,8 + +00000000800049a4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64es x15, x10, x31 # perform operation + 800049a4: 33f507b3 aes64es x15,x10,x31 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a8: 000cb383 ld x7,0(x25) + 800049ac: 00f38c63 beq x7,x15,800049c4 + 800049b0: 7680646f jal x8,8000b118 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 8001afe6 .word 0x8001afe6 + 800049c0: 00000000 .word 0x00000000 + 800049c4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x0000000100000000 + 800049c8: 000a3483 ld x9,0(x20) + 800049cc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0xfffffffffffffffe + 800049d0: 000a3783 ld x15,0(x20) + 800049d4: 008a0a13 addi x20,x20,8 + +00000000800049d8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64es x13, x9, x15 # perform operation + 800049d8: 32f486b3 aes64es x13,x9,x15 + # Check if x13 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x13, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049dc: 000cb383 ld x7,0(x25) + 800049e0: 00d38c63 beq x7,x13,800049f8 + 800049e4: 7340646f jal x8,8000b118 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 8001b051 .word 0x8001b051 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x0000000100000000 + 800049fc: 000a3c03 ld x24,0(x20) + 80004a00: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80004a04: 000a3803 ld x16,0(x20) + 80004a08: 008a0a13 addi x20,x20,8 + +0000000080004a0c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64es x14, x24, x16 # perform operation + 80004a0c: 330c0733 aes64es x14,x24,x16 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a10: 000cb383 ld x7,0(x25) + 80004a14: 00e38c63 beq x7,x14,80004a2c + 80004a18: 7000646f jal x8,8000b118 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 8001b0bc .word 0x8001b0bc + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000100000000 + 80004a30: 000a3f83 ld x31,0(x20) + 80004a34: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80004a38: 000a3483 ld x9,0(x20) + 80004a3c: 008a0a13 addi x20,x20,8 + +0000000080004a40 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x23, x31, x9 # perform operation + 80004a40: 329f8bb3 aes64es x23,x31,x9 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a44: 000cb383 ld x7,0(x25) + 80004a48: 01738c63 beq x7,x23,80004a60 + 80004a4c: 6cc0646f jal x8,8000b118 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 8001b127 .word 0x8001b127 + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x0000000100000000 + 80004a64: 000a3583 ld x11,0(x20) + 80004a68: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5555555555555555 + 80004a6c: 000a3b83 ld x23,0(x20) + 80004a70: 008a0a13 addi x20,x20,8 + +0000000080004a74 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64es x26, x11, x23 # perform operation + 80004a74: 33758d33 aes64es x26,x11,x23 + # Check if x26 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x26, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a78: 000cb383 ld x7,0(x25) + 80004a7c: 01a38c63 beq x7,x26,80004a94 + 80004a80: 6980646f jal x8,8000b118 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 8001b192 .word 0x8001b192 + 80004a90: 00000000 .word 0x00000000 + 80004a94: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0x0000000100000000 + 80004a98: 000a3283 ld x5,0(x20) + 80004a9c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x00000000ffffffff + 80004aa0: 000a3203 ld x4,0(x20) + 80004aa4: 008a0a13 addi x20,x20,8 + +0000000080004aa8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64es x18, x5, x4 # perform operation + 80004aa8: 32428933 aes64es x18,x5,x4 + # Check if x18 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x18, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aac: 000cb383 ld x7,0(x25) + 80004ab0: 01238c63 beq x7,x18,80004ac8 + 80004ab4: 6640646f jal x8,8000b118 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 8001b1fd .word 0x8001b1fd + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x0000000100000000 + 80004acc: 000a3b03 ld x22,0(x20) + 80004ad0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x00000000fffffffe + 80004ad4: 000a3503 ld x10,0(x20) + 80004ad8: 008a0a13 addi x20,x20,8 + +0000000080004adc : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64es x9, x22, x10 # perform operation + 80004adc: 32ab04b3 aes64es x9,x22,x10 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae0: 000cb383 ld x7,0(x25) + 80004ae4: 00938c63 beq x7,x9,80004afc + 80004ae8: 6300646f jal x8,8000b118 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 8001b260 .word 0x8001b260 + 80004af8: 00000000 .word 0x00000000 + 80004afc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x0000000100000000 + 80004b00: 000a3b03 ld x22,0(x20) + 80004b04: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x0000000100000000 + 80004b08: 000a3983 ld x19,0(x20) + 80004b0c: 008a0a13 addi x20,x20,8 + +0000000080004b10 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64es x17, x22, x19 # perform operation + 80004b10: 333b08b3 aes64es x17,x22,x19 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b14: 000cb383 ld x7,0(x25) + 80004b18: 01138c63 beq x7,x17,80004b30 + 80004b1c: 5fc0646f jal x8,8000b118 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 8001b2c3 .word 0x8001b2c3 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x0000000100000000 + 80004b34: 000a3903 ld x18,0(x20) + 80004b38: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x0000000100000001 + 80004b3c: 000a3483 ld x9,0(x20) + 80004b40: 008a0a13 addi x20,x20,8 + +0000000080004b44 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64es x12, x18, x9 # perform operation + 80004b44: 32990633 aes64es x12,x18,x9 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b48: 000cb383 ld x7,0(x25) + 80004b4c: 00c38c63 beq x7,x12,80004b64 + 80004b50: 5c80646f jal x8,8000b118 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 8001b327 .word 0x8001b327 + 80004b60: 00000000 .word 0x00000000 + 80004b64: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x0000000100000001 + 80004b68: 000a3b83 ld x23,0(x20) + 80004b6c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x0000000000000000 + 80004b70: 000a3703 ld x14,0(x20) + 80004b74: 008a0a13 addi x20,x20,8 + +0000000080004b78 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64es x6, x23, x14 # perform operation + 80004b78: 32eb8333 aes64es x6,x23,x14 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b7c: 000cb383 ld x7,0(x25) + 80004b80: 00638c63 beq x7,x6,80004b98 + 80004b84: 5940646f jal x8,8000b118 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 8001b38b .word 0x8001b38b + 80004b94: 00000000 .word 0x00000000 + 80004b98: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x0000000100000001 + 80004b9c: 000a3083 ld x1,0(x20) + 80004ba0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0000000000000001 + 80004ba4: 000a3b83 ld x23,0(x20) + 80004ba8: 008a0a13 addi x20,x20,8 + +0000000080004bac : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64es x24, x1, x23 # perform operation + 80004bac: 33708c33 aes64es x24,x1,x23 + # Check if x24 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x24, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb0: 000cb383 ld x7,0(x25) + 80004bb4: 01838c63 beq x7,x24,80004bcc + 80004bb8: 5600646f jal x8,8000b118 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 8001b3e7 .word 0x8001b3e7 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x0000000100000001 + 80004bd0: 000a3803 ld x16,0(x20) + 80004bd4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0x0000000000000002 + 80004bd8: 000a3c03 ld x24,0(x20) + 80004bdc: 008a0a13 addi x20,x20,8 + +0000000080004be0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64es x1, x16, x24 # perform operation + 80004be0: 338800b3 aes64es x1,x16,x24 + # Check if x1 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x1, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be4: 000cb383 ld x7,0(x25) + 80004be8: 00138c63 beq x7,x1,80004c00 + 80004bec: 52c0646f jal x8,8000b118 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 8001b443 .word 0x8001b443 + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x0000000100000001 + 80004c04: 000a3603 ld x12,0(x20) + 80004c08: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x8000000000000000 + 80004c0c: 000a3e03 ld x28,0(x20) + 80004c10: 008a0a13 addi x20,x20,8 + +0000000080004c14 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64es x6, x12, x28 # perform operation + 80004c14: 33c60333 aes64es x6,x12,x28 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c18: 000cb383 ld x7,0(x25) + 80004c1c: 00638c63 beq x7,x6,80004c34 + 80004c20: 4f80646f jal x8,8000b118 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 8001b49f .word 0x8001b49f + 80004c30: 00000000 .word 0x00000000 + 80004c34: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x0000000100000001 + 80004c38: 000a3203 ld x4,0(x20) + 80004c3c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x8000000000000001 + 80004c40: 000a3783 ld x15,0(x20) + 80004c44: 008a0a13 addi x20,x20,8 + +0000000080004c48 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64es x5, x4, x15 # perform operation + 80004c48: 32f202b3 aes64es x5,x4,x15 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c4c: 000cb383 ld x7,0(x25) + 80004c50: 00538c63 beq x7,x5,80004c68 + 80004c54: 4c40646f jal x8,8000b118 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 8001b50a .word 0x8001b50a + 80004c64: 00000000 .word 0x00000000 + 80004c68: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x0000000100000001 + 80004c6c: 000a3903 ld x18,0(x20) + 80004c70: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x7fffffffffffffff + 80004c74: 000a3583 ld x11,0(x20) + 80004c78: 008a0a13 addi x20,x20,8 + +0000000080004c7c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64es x21, x18, x11 # perform operation + 80004c7c: 32b90ab3 aes64es x21,x18,x11 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c80: 000cb383 ld x7,0(x25) + 80004c84: 01538c63 beq x7,x21,80004c9c + 80004c88: 4900646f jal x8,8000b118 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 8001b575 .word 0x8001b575 + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x0000000100000001 + 80004ca0: 000a3b03 ld x22,0(x20) + 80004ca4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x7ffffffffffffffe + 80004ca8: 000a3283 ld x5,0(x20) + 80004cac: 008a0a13 addi x20,x20,8 + +0000000080004cb0 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64es x23, x22, x5 # perform operation + 80004cb0: 325b0bb3 aes64es x23,x22,x5 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb4: 000cb383 ld x7,0(x25) + 80004cb8: 01738c63 beq x7,x23,80004cd0 + 80004cbc: 45c0646f jal x8,8000b118 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 8001b5e0 .word 0x8001b5e0 + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x0000000100000001 + 80004cd4: 000a3183 ld x3,0(x20) + 80004cd8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xffffffffffffffff + 80004cdc: 000a3d03 ld x26,0(x20) + 80004ce0: 008a0a13 addi x20,x20,8 + +0000000080004ce4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64es x6, x3, x26 # perform operation + 80004ce4: 33a18333 aes64es x6,x3,x26 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce8: 000cb383 ld x7,0(x25) + 80004cec: 00638c63 beq x7,x6,80004d04 + 80004cf0: 4280646f jal x8,8000b118 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 8001b64b .word 0x8001b64b + 80004d00: 00000000 .word 0x00000000 + 80004d04: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x0000000100000001 + 80004d08: 000a3703 ld x14,0(x20) + 80004d0c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0xfffffffffffffffe + 80004d10: 000a3283 ld x5,0(x20) + 80004d14: 008a0a13 addi x20,x20,8 + +0000000080004d18 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64es x16, x14, x5 # perform operation + 80004d18: 32570833 aes64es x16,x14,x5 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d1c: 000cb383 ld x7,0(x25) + 80004d20: 01038c63 beq x7,x16,80004d38 + 80004d24: 3f40646f jal x8,8000b118 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 8001b6b6 .word 0x8001b6b6 + 80004d34: 00000000 .word 0x00000000 + 80004d38: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x0000000100000001 + 80004d3c: 000a3d83 ld x27,0(x20) + 80004d40: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x5bbc887763ae86f2 + 80004d44: 000a3203 ld x4,0(x20) + 80004d48: 008a0a13 addi x20,x20,8 + +0000000080004d4c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64es x23, x27, x4 # perform operation + 80004d4c: 324d8bb3 aes64es x23,x27,x4 + # Check if x23 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x23, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d50: 000cb383 ld x7,0(x25) + 80004d54: 01738c63 beq x7,x23,80004d6c + 80004d58: 3c00646f jal x8,8000b118 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 8001b721 .word 0x8001b721 + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x0000000100000001 + 80004d70: 000a3d83 ld x27,0(x20) + 80004d74: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 80004d78: 000a3183 ld x3,0(x20) + 80004d7c: 008a0a13 addi x20,x20,8 + +0000000080004d80 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64es x6, x27, x3 # perform operation + 80004d80: 323d8333 aes64es x6,x27,x3 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d84: 000cb383 ld x7,0(x25) + 80004d88: 00638c63 beq x7,x6,80004da0 + 80004d8c: 38c0646f jal x8,8000b118 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 8001b78c .word 0x8001b78c + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x0000000100000001 + 80004da4: 000a3703 ld x14,0(x20) + 80004da8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x5555555555555555 + 80004dac: 000a3303 ld x6,0(x20) + 80004db0: 008a0a13 addi x20,x20,8 + +0000000080004db4 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64es x21, x14, x6 # perform operation + 80004db4: 32670ab3 aes64es x21,x14,x6 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db8: 000cb383 ld x7,0(x25) + 80004dbc: 01538c63 beq x7,x21,80004dd4 + 80004dc0: 3580646f jal x8,8000b118 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 8001b7f7 .word 0x8001b7f7 + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0x0000000100000001 + 80004dd8: 000a3083 ld x1,0(x20) + 80004ddc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x00000000ffffffff + 80004de0: 000a3b03 ld x22,0(x20) + 80004de4: 008a0a13 addi x20,x20,8 + +0000000080004de8 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64es x15, x1, x22 # perform operation + 80004de8: 336087b3 aes64es x15,x1,x22 + # Check if x15 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x15, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dec: 000cb383 ld x7,0(x25) + 80004df0: 00f38c63 beq x7,x15,80004e08 + 80004df4: 3240646f jal x8,8000b118 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 8001b862 .word 0x8001b862 + 80004e04: 00000000 .word 0x00000000 + 80004e08: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x0000000100000001 + 80004e0c: 000a3f83 ld x31,0(x20) + 80004e10: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x00000000fffffffe + 80004e14: 000a3583 ld x11,0(x20) + 80004e18: 008a0a13 addi x20,x20,8 + +0000000080004e1c : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64es x2, x31, x11 # perform operation + 80004e1c: 32bf8133 aes64es x2,x31,x11 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e20: 000cb383 ld x7,0(x25) + 80004e24: 00238c63 beq x7,x2,80004e3c + 80004e28: 2f00646f jal x8,8000b118 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 8001b8c5 .word 0x8001b8c5 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x0000000100000001 + 80004e40: 000a3d03 ld x26,0(x20) + 80004e44: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000100000000 + 80004e48: 000a3683 ld x13,0(x20) + 80004e4c: 008a0a13 addi x20,x20,8 + +0000000080004e50 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64es x29, x26, x13 # perform operation + 80004e50: 32dd0eb3 aes64es x29,x26,x13 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e54: 000cb383 ld x7,0(x25) + 80004e58: 01d38c63 beq x7,x29,80004e70 + 80004e5c: 2bc0646f jal x8,8000b118 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 8001b928 .word 0x8001b928 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 008c8c93 addi x25,x25,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs1: x23 = 0x0000000100000001 + 80004e74: 000a3b83 ld x23,0(x20) + 80004e78: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x0000000100000001 + 80004e7c: 000a3683 ld x13,0(x20) + 80004e80: 008a0a13 addi x20,x20,8 + +0000000080004e84 : +Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64es x29, x23, x13 # perform operation + 80004e84: 32db8eb3 aes64es x29,x23,x13 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zkne_aes64es_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e88: 000cb383 ld x7,0(x25) + 80004e8c: 01d38c63 beq x7,x29,80004ea4 + 80004e90: 2880646f jal x8,8000b118 + 80004e94: 80004e84 .word 0x80004e84 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 8001b98c .word 0x8001b98c + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0xe85f7dbb313c287a + 80004ea8: 000a3003 ld x0,0(x20) + 80004eac: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xef169ebe6e1b2fd0 + 80004eb0: 000a3003 ld x0,0(x20) + 80004eb4: 008a0a13 addi x20,x20,8 + +0000000080004eb8 : +Zkne_aes64es_cg_cmp_rs1_rs2_b0: + aes64es x10, x0, x0 # perform operation + 80004eb8: 32000533 aes64es x10,x0,x0 + # Check if x10 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x10, Zkne_aes64es_cg_cmp_rs1_rs2_b0, Zkne_aes64es_cg_cmp_rs1_rs2_b0_str) + 80004ebc: 000cb383 ld x7,0(x25) + 80004ec0: 00a38c63 beq x7,x10,80004ed8 + 80004ec4: 2540646f jal x8,8000b118 + 80004ec8: 80004eb8 .word 0x80004eb8 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 8001b9f0 .word 0x8001b9f0 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xd5f7843ea25d4b4c + 80004edc: 000a3083 ld x1,0(x20) + 80004ee0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x068b799c857ccbf8 + 80004ee4: 000a3083 ld x1,0(x20) + 80004ee8: 008a0a13 addi x20,x20,8 + +0000000080004eec : +Zkne_aes64es_cg_cmp_rs1_rs2_b1: + aes64es x27, x1, x1 # perform operation + 80004eec: 32108db3 aes64es x27,x1,x1 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64es_cg_cmp_rs1_rs2_b1, Zkne_aes64es_cg_cmp_rs1_rs2_b1_str) + 80004ef0: 000cb383 ld x7,0(x25) + 80004ef4: 01b38c63 beq x7,x27,80004f0c + 80004ef8: 2200646f jal x8,8000b118 + 80004efc: 80004eec .word 0x80004eec + 80004f00: 00000000 .word 0x00000000 + 80004f04: 8001ba2b .word 0x8001ba2b + 80004f08: 00000000 .word 0x00000000 + 80004f0c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0xf5f0409bc9c8d32d + 80004f10: 000a3103 ld x2,0(x20) + 80004f14: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0xca9d5d41b6713687 + 80004f18: 000a3103 ld x2,0(x20) + 80004f1c: 008a0a13 addi x20,x20,8 + +0000000080004f20 : +Zkne_aes64es_cg_cmp_rs1_rs2_b2: + aes64es x21, x2, x2 # perform operation + 80004f20: 32210ab3 aes64es x21,x2,x2 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cmp_rs1_rs2_b2, Zkne_aes64es_cg_cmp_rs1_rs2_b2_str) + 80004f24: 000cb383 ld x7,0(x25) + 80004f28: 01538c63 beq x7,x21,80004f40 + 80004f2c: 1ec0646f jal x8,8000b118 + 80004f30: 80004f20 .word 0x80004f20 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 8001ba66 .word 0x8001ba66 + 80004f3c: 00000000 .word 0x00000000 + 80004f40: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x1879eb576f2eb88c + 80004f44: 000a3183 ld x3,0(x20) + 80004f48: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs2: x3 = 0xdda5c19954af3c93 + 80004f4c: 000a3183 ld x3,0(x20) + 80004f50: 008a0a13 addi x20,x20,8 + +0000000080004f54 : +Zkne_aes64es_cg_cmp_rs1_rs2_b3: + aes64es x21, x3, x3 # perform operation + 80004f54: 32318ab3 aes64es x21,x3,x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x21, Zkne_aes64es_cg_cmp_rs1_rs2_b3, Zkne_aes64es_cg_cmp_rs1_rs2_b3_str) + 80004f58: 000cb383 ld x7,0(x25) + 80004f5c: 01538c63 beq x7,x21,80004f74 + 80004f60: 1b80646f jal x8,8000b118 + 80004f64: 80004f54 .word 0x80004f54 + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 8001baa1 .word 0x8001baa1 + 80004f70: 00000000 .word 0x00000000 + 80004f74: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x86f6a02b8ad3a2ab + 80004f78: 000a3203 ld x4,0(x20) + 80004f7c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x600a0b24216ba0d3 + 80004f80: 000a3203 ld x4,0(x20) + 80004f84: 008a0a13 addi x20,x20,8 + +0000000080004f88 : +Zkne_aes64es_cg_cmp_rs1_rs2_b4: + aes64es x17, x4, x4 # perform operation + 80004f88: 324208b3 aes64es x17,x4,x4 + # Check if x17 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x17, Zkne_aes64es_cg_cmp_rs1_rs2_b4, Zkne_aes64es_cg_cmp_rs1_rs2_b4_str) + 80004f8c: 000cb383 ld x7,0(x25) + 80004f90: 01138c63 beq x7,x17,80004fa8 + 80004f94: 1840646f jal x8,8000b118 + 80004f98: 80004f88 .word 0x80004f88 + 80004f9c: 00000000 .word 0x00000000 + 80004fa0: 8001badc .word 0x8001badc + 80004fa4: 00000000 .word 0x00000000 + 80004fa8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xe3256e11324ff7f3 + 80004fac: 000a3283 ld x5,0(x20) + 80004fb0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs2: x5 = 0x5f43d59de9a1894a + 80004fb4: 000a3283 ld x5,0(x20) + 80004fb8: 008a0a13 addi x20,x20,8 + +0000000080004fbc : +Zkne_aes64es_cg_cmp_rs1_rs2_b5: + aes64es x14, x5, x5 # perform operation + 80004fbc: 32528733 aes64es x14,x5,x5 + # Check if x14 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x14, Zkne_aes64es_cg_cmp_rs1_rs2_b5, Zkne_aes64es_cg_cmp_rs1_rs2_b5_str) + 80004fc0: 000cb383 ld x7,0(x25) + 80004fc4: 00e38c63 beq x7,x14,80004fdc + 80004fc8: 1500646f jal x8,8000b118 + 80004fcc: 80004fbc .word 0x80004fbc + 80004fd0: 00000000 .word 0x00000000 + 80004fd4: 8001bb17 .word 0x8001bb17 + 80004fd8: 00000000 .word 0x00000000 + 80004fdc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xd3b95b591caf4db2 + 80004fe0: 000a3303 ld x6,0(x20) + 80004fe4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x6c77b33fbac0d94b + 80004fe8: 000a3303 ld x6,0(x20) + 80004fec: 008a0a13 addi x20,x20,8 + +0000000080004ff0 : +Zkne_aes64es_cg_cmp_rs1_rs2_b6: + aes64es x9, x6, x6 # perform operation + 80004ff0: 326304b3 aes64es x9,x6,x6 + # Check if x9 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x9, Zkne_aes64es_cg_cmp_rs1_rs2_b6, Zkne_aes64es_cg_cmp_rs1_rs2_b6_str) + 80004ff4: 000cb383 ld x7,0(x25) + 80004ff8: 00938c63 beq x7,x9,80005010 + 80004ffc: 11c0646f jal x8,8000b118 + 80005000: 80004ff0 .word 0x80004ff0 + 80005004: 00000000 .word 0x00000000 + 80005008: 8001bb52 .word 0x8001bb52 + 8000500c: 00000000 .word 0x00000000 + 80005010: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005014: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005018: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x0c80e83c0be5daf7 + 8000501c: 000a3383 ld x7,0(x20) + 80005020: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs2: x7 = 0xff47b2d4d0cb8ddc + 80005024: 000a3383 ld x7,0(x20) + 80005028: 008a0a13 addi x20,x20,8 + +000000008000502c : +Zkne_aes64es_cg_cmp_rs1_rs2_b7: + aes64es x21, x7, x7 # perform operation + 8000502c: 32738ab3 aes64es x21,x7,x7 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zkne_aes64es_cg_cmp_rs1_rs2_b7, Zkne_aes64es_cg_cmp_rs1_rs2_b7_str) + 80005030: 000cb203 ld x4,0(x25) + 80005034: 01520c63 beq x4,x21,8000504c + 80005038: 0c8062ef jal x5,8000b100 + 8000503c: 8000502c .word 0x8000502c + 80005040: 00000000 .word 0x00000000 + 80005044: 8001bb8d .word 0x8001bb8d + 80005048: 00000000 .word 0x00000000 + 8000504c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x7cd9b0d1a0dca0d5 + 80005050: 000a3403 ld x8,0(x20) + 80005054: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs2: x8 = 0x8d116e64fb5941fd + 80005058: 000a3403 ld x8,0(x20) + 8000505c: 008a0a13 addi x20,x20,8 + +0000000080005060 : +Zkne_aes64es_cg_cmp_rs1_rs2_b8: + aes64es x26, x8, x8 # perform operation + 80005060: 32840d33 aes64es x26,x8,x8 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zkne_aes64es_cg_cmp_rs1_rs2_b8, Zkne_aes64es_cg_cmp_rs1_rs2_b8_str) + 80005064: 000cb203 ld x4,0(x25) + 80005068: 01a20c63 beq x4,x26,80005080 + 8000506c: 094062ef jal x5,8000b100 + 80005070: 80005060 .word 0x80005060 + 80005074: 00000000 .word 0x00000000 + 80005078: 8001bbc8 .word 0x8001bbc8 + 8000507c: 00000000 .word 0x00000000 + 80005080: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x03d7bf9df9fc38f0 + 80005084: 000a3483 ld x9,0(x20) + 80005088: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x72d05983fbe09cc0 + 8000508c: 000a3483 ld x9,0(x20) + 80005090: 008a0a13 addi x20,x20,8 + +0000000080005094 : +Zkne_aes64es_cg_cmp_rs1_rs2_b9: + aes64es x19, x9, x9 # perform operation + 80005094: 329489b3 aes64es x19,x9,x9 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes64es_cg_cmp_rs1_rs2_b9, Zkne_aes64es_cg_cmp_rs1_rs2_b9_str) + 80005098: 000cb203 ld x4,0(x25) + 8000509c: 01320c63 beq x4,x19,800050b4 + 800050a0: 060062ef jal x5,8000b100 + 800050a4: 80005094 .word 0x80005094 + 800050a8: 00000000 .word 0x00000000 + 800050ac: 8001bc03 .word 0x8001bc03 + 800050b0: 00000000 .word 0x00000000 + 800050b4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x1bb8bf7ab944989e + 800050b8: 000a3503 ld x10,0(x20) + 800050bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x6337ccd385850a75 + 800050c0: 000a3503 ld x10,0(x20) + 800050c4: 008a0a13 addi x20,x20,8 + +00000000800050c8 : +Zkne_aes64es_cg_cmp_rs1_rs2_b10: + aes64es x19, x10, x10 # perform operation + 800050c8: 32a509b3 aes64es x19,x10,x10 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes64es_cg_cmp_rs1_rs2_b10, Zkne_aes64es_cg_cmp_rs1_rs2_b10_str) + 800050cc: 000cb203 ld x4,0(x25) + 800050d0: 01320c63 beq x4,x19,800050e8 + 800050d4: 02c062ef jal x5,8000b100 + 800050d8: 800050c8 .word 0x800050c8 + 800050dc: 00000000 .word 0x00000000 + 800050e0: 8001bc3e .word 0x8001bc3e + 800050e4: 00000000 .word 0x00000000 + 800050e8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x66a012732cf30d7c + 800050ec: 000a3583 ld x11,0(x20) + 800050f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xc27be4a9183ff2bc + 800050f4: 000a3583 ld x11,0(x20) + 800050f8: 008a0a13 addi x20,x20,8 + +00000000800050fc : +Zkne_aes64es_cg_cmp_rs1_rs2_b11: + aes64es x27, x11, x11 # perform operation + 800050fc: 32b58db3 aes64es x27,x11,x11 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zkne_aes64es_cg_cmp_rs1_rs2_b11, Zkne_aes64es_cg_cmp_rs1_rs2_b11_str) + 80005100: 000cb203 ld x4,0(x25) + 80005104: 01b20c63 beq x4,x27,8000511c + 80005108: 7f9052ef jal x5,8000b100 + 8000510c: 800050fc .word 0x800050fc + 80005110: 00000000 .word 0x00000000 + 80005114: 8001bc7a .word 0x8001bc7a + 80005118: 00000000 .word 0x00000000 + 8000511c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xb966d0b6e3406183 + 80005120: 000a3603 ld x12,0(x20) + 80005124: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x2a694a74a792afe2 + 80005128: 000a3603 ld x12,0(x20) + 8000512c: 008a0a13 addi x20,x20,8 + +0000000080005130 : +Zkne_aes64es_cg_cmp_rs1_rs2_b12: + aes64es x6, x12, x12 # perform operation + 80005130: 32c60333 aes64es x6,x12,x12 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zkne_aes64es_cg_cmp_rs1_rs2_b12, Zkne_aes64es_cg_cmp_rs1_rs2_b12_str) + 80005134: 000cb203 ld x4,0(x25) + 80005138: 00620c63 beq x4,x6,80005150 + 8000513c: 7c5052ef jal x5,8000b100 + 80005140: 80005130 .word 0x80005130 + 80005144: 00000000 .word 0x00000000 + 80005148: 8001bcb6 .word 0x8001bcb6 + 8000514c: 00000000 .word 0x00000000 + 80005150: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xec92b3a4b42c8bad + 80005154: 000a3683 ld x13,0(x20) + 80005158: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0xece7cf47a918cc4d + 8000515c: 000a3683 ld x13,0(x20) + 80005160: 008a0a13 addi x20,x20,8 + +0000000080005164 : +Zkne_aes64es_cg_cmp_rs1_rs2_b13: + aes64es x17, x13, x13 # perform operation + 80005164: 32d688b3 aes64es x17,x13,x13 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes64es_cg_cmp_rs1_rs2_b13, Zkne_aes64es_cg_cmp_rs1_rs2_b13_str) + 80005168: 000cb203 ld x4,0(x25) + 8000516c: 01120c63 beq x4,x17,80005184 + 80005170: 791052ef jal x5,8000b100 + 80005174: 80005164 .word 0x80005164 + 80005178: 00000000 .word 0x00000000 + 8000517c: 8001bcf2 .word 0x8001bcf2 + 80005180: 00000000 .word 0x00000000 + 80005184: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xdbac198a270133be + 80005188: 000a3703 ld x14,0(x20) + 8000518c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x75161b252e580ce0 + 80005190: 000a3703 ld x14,0(x20) + 80005194: 008a0a13 addi x20,x20,8 + +0000000080005198 : +Zkne_aes64es_cg_cmp_rs1_rs2_b14: + aes64es x13, x14, x14 # perform operation + 80005198: 32e706b3 aes64es x13,x14,x14 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zkne_aes64es_cg_cmp_rs1_rs2_b14, Zkne_aes64es_cg_cmp_rs1_rs2_b14_str) + 8000519c: 000cb203 ld x4,0(x25) + 800051a0: 00d20c63 beq x4,x13,800051b8 + 800051a4: 75d052ef jal x5,8000b100 + 800051a8: 80005198 .word 0x80005198 + 800051ac: 00000000 .word 0x00000000 + 800051b0: 8001bd2e .word 0x8001bd2e + 800051b4: 00000000 .word 0x00000000 + 800051b8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xe6ce78b7e65b47d6 + 800051bc: 000a3783 ld x15,0(x20) + 800051c0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x763f87299ad677a3 + 800051c4: 000a3783 ld x15,0(x20) + 800051c8: 008a0a13 addi x20,x20,8 + +00000000800051cc : +Zkne_aes64es_cg_cmp_rs1_rs2_b15: + aes64es x27, x15, x15 # perform operation + 800051cc: 32f78db3 aes64es x27,x15,x15 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zkne_aes64es_cg_cmp_rs1_rs2_b15, Zkne_aes64es_cg_cmp_rs1_rs2_b15_str) + 800051d0: 000cb203 ld x4,0(x25) + 800051d4: 01b20c63 beq x4,x27,800051ec + 800051d8: 729052ef jal x5,8000b100 + 800051dc: 800051cc .word 0x800051cc + 800051e0: 00000000 .word 0x00000000 + 800051e4: 8001bd6a .word 0x8001bd6a + 800051e8: 00000000 .word 0x00000000 + 800051ec: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x1036221e33be53bf + 800051f0: 000a3803 ld x16,0(x20) + 800051f4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x5d82e4f0ea270475 + 800051f8: 000a3803 ld x16,0(x20) + 800051fc: 008a0a13 addi x20,x20,8 + +0000000080005200 : +Zkne_aes64es_cg_cmp_rs1_rs2_b16: + aes64es x28, x16, x16 # perform operation + 80005200: 33080e33 aes64es x28,x16,x16 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zkne_aes64es_cg_cmp_rs1_rs2_b16, Zkne_aes64es_cg_cmp_rs1_rs2_b16_str) + 80005204: 000cb203 ld x4,0(x25) + 80005208: 01c20c63 beq x4,x28,80005220 + 8000520c: 6f5052ef jal x5,8000b100 + 80005210: 80005200 .word 0x80005200 + 80005214: 00000000 .word 0x00000000 + 80005218: 8001bda6 .word 0x8001bda6 + 8000521c: 00000000 .word 0x00000000 + 80005220: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x07d94b19dce1f11f + 80005224: 000a3883 ld x17,0(x20) + 80005228: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xd1965d326f29053a + 8000522c: 000a3883 ld x17,0(x20) + 80005230: 008a0a13 addi x20,x20,8 + +0000000080005234 : +Zkne_aes64es_cg_cmp_rs1_rs2_b17: + aes64es x29, x17, x17 # perform operation + 80005234: 33188eb3 aes64es x29,x17,x17 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zkne_aes64es_cg_cmp_rs1_rs2_b17, Zkne_aes64es_cg_cmp_rs1_rs2_b17_str) + 80005238: 000cb203 ld x4,0(x25) + 8000523c: 01d20c63 beq x4,x29,80005254 + 80005240: 6c1052ef jal x5,8000b100 + 80005244: 80005234 .word 0x80005234 + 80005248: 00000000 .word 0x00000000 + 8000524c: 8001bde2 .word 0x8001bde2 + 80005250: 00000000 .word 0x00000000 + 80005254: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x93950bfec42966d2 + 80005258: 000a3903 ld x18,0(x20) + 8000525c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0x4430bd406ae97376 + 80005260: 000a3903 ld x18,0(x20) + 80005264: 008a0a13 addi x20,x20,8 + +0000000080005268 : +Zkne_aes64es_cg_cmp_rs1_rs2_b18: + aes64es x28, x18, x18 # perform operation + 80005268: 33290e33 aes64es x28,x18,x18 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zkne_aes64es_cg_cmp_rs1_rs2_b18, Zkne_aes64es_cg_cmp_rs1_rs2_b18_str) + 8000526c: 000cb203 ld x4,0(x25) + 80005270: 01c20c63 beq x4,x28,80005288 + 80005274: 68d052ef jal x5,8000b100 + 80005278: 80005268 .word 0x80005268 + 8000527c: 00000000 .word 0x00000000 + 80005280: 8001be1e .word 0x8001be1e + 80005284: 00000000 .word 0x00000000 + 80005288: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xde16b403989ade10 + 8000528c: 000a3983 ld x19,0(x20) + 80005290: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0x40c27d309f17badb + 80005294: 000a3983 ld x19,0(x20) + 80005298: 008a0a13 addi x20,x20,8 + +000000008000529c : +Zkne_aes64es_cg_cmp_rs1_rs2_b19: + aes64es x15, x19, x19 # perform operation + 8000529c: 333987b3 aes64es x15,x19,x19 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zkne_aes64es_cg_cmp_rs1_rs2_b19, Zkne_aes64es_cg_cmp_rs1_rs2_b19_str) + 800052a0: 000cb203 ld x4,0(x25) + 800052a4: 00f20c63 beq x4,x15,800052bc + 800052a8: 659052ef jal x5,8000b100 + 800052ac: 8000529c .word 0x8000529c + 800052b0: 00000000 .word 0x00000000 + 800052b4: 8001be5a .word 0x8001be5a + 800052b8: 00000000 .word 0x00000000 + 800052bc: 008c8c93 addi x25,x25,8 + + mv x12, x20 # switch data pointer register to avoid conflict with test + 800052c0: 000a0613 addi x12,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xcd1648647a2517cf + 800052c4: 00063a03 ld x20,0(x12) + 800052c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xd9e1e488bc6278c0 + 800052cc: 00063a03 ld x20,0(x12) + 800052d0: 00860613 addi x12,x12,8 + +00000000800052d4 : +Zkne_aes64es_cg_cmp_rs1_rs2_b20: + aes64es x31, x20, x20 # perform operation + 800052d4: 334a0fb3 aes64es x31,x20,x20 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zkne_aes64es_cg_cmp_rs1_rs2_b20, Zkne_aes64es_cg_cmp_rs1_rs2_b20_str) + 800052d8: 000cb203 ld x4,0(x25) + 800052dc: 01f20c63 beq x4,x31,800052f4 + 800052e0: 621052ef jal x5,8000b100 + 800052e4: 800052d4 .word 0x800052d4 + 800052e8: 00000000 .word 0x00000000 + 800052ec: 8001be96 .word 0x8001be96 + 800052f0: 00000000 .word 0x00000000 + 800052f4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x0b48dbd1d5ffc130 + 800052f8: 00063a83 ld x21,0(x12) + 800052fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x114e94217c5eb9bc + 80005300: 00063a83 ld x21,0(x12) + 80005304: 00860613 addi x12,x12,8 + +0000000080005308 : +Zkne_aes64es_cg_cmp_rs1_rs2_b21: + aes64es x14, x21, x21 # perform operation + 80005308: 335a8733 aes64es x14,x21,x21 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes64es_cg_cmp_rs1_rs2_b21, Zkne_aes64es_cg_cmp_rs1_rs2_b21_str) + 8000530c: 000cb203 ld x4,0(x25) + 80005310: 00e20c63 beq x4,x14,80005328 + 80005314: 5ed052ef jal x5,8000b100 + 80005318: 80005308 .word 0x80005308 + 8000531c: 00000000 .word 0x00000000 + 80005320: 8001bed2 .word 0x8001bed2 + 80005324: 00000000 .word 0x00000000 + 80005328: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x5db1dbf1fee5689d + 8000532c: 00063b03 ld x22,0(x12) + 80005330: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x7117253af1db273f + 80005334: 00063b03 ld x22,0(x12) + 80005338: 00860613 addi x12,x12,8 + +000000008000533c : +Zkne_aes64es_cg_cmp_rs1_rs2_b22: + aes64es x17, x22, x22 # perform operation + 8000533c: 336b08b3 aes64es x17,x22,x22 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes64es_cg_cmp_rs1_rs2_b22, Zkne_aes64es_cg_cmp_rs1_rs2_b22_str) + 80005340: 000cb203 ld x4,0(x25) + 80005344: 01120c63 beq x4,x17,8000535c + 80005348: 5b9052ef jal x5,8000b100 + 8000534c: 8000533c .word 0x8000533c + 80005350: 00000000 .word 0x00000000 + 80005354: 8001bf0e .word 0x8001bf0e + 80005358: 00000000 .word 0x00000000 + 8000535c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x46b29ebd46b1a3c2 + 80005360: 00063b83 ld x23,0(x12) + 80005364: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x9e6df23e1021b19b + 80005368: 00063b83 ld x23,0(x12) + 8000536c: 00860613 addi x12,x12,8 + +0000000080005370 : +Zkne_aes64es_cg_cmp_rs1_rs2_b23: + aes64es x20, x23, x23 # perform operation + 80005370: 337b8a33 aes64es x20,x23,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zkne_aes64es_cg_cmp_rs1_rs2_b23, Zkne_aes64es_cg_cmp_rs1_rs2_b23_str) + 80005374: 000cb203 ld x4,0(x25) + 80005378: 01420c63 beq x4,x20,80005390 + 8000537c: 585052ef jal x5,8000b100 + 80005380: 80005370 .word 0x80005370 + 80005384: 00000000 .word 0x00000000 + 80005388: 8001bf4a .word 0x8001bf4a + 8000538c: 00000000 .word 0x00000000 + 80005390: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xe0fa528491bc7c87 + 80005394: 00063c03 ld x24,0(x12) + 80005398: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xccb59a9bd0f007f9 + 8000539c: 00063c03 ld x24,0(x12) + 800053a0: 00860613 addi x12,x12,8 + +00000000800053a4 : +Zkne_aes64es_cg_cmp_rs1_rs2_b24: + aes64es x10, x24, x24 # perform operation + 800053a4: 338c0533 aes64es x10,x24,x24 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zkne_aes64es_cg_cmp_rs1_rs2_b24, Zkne_aes64es_cg_cmp_rs1_rs2_b24_str) + 800053a8: 000cb203 ld x4,0(x25) + 800053ac: 00a20c63 beq x4,x10,800053c4 + 800053b0: 551052ef jal x5,8000b100 + 800053b4: 800053a4 .word 0x800053a4 + 800053b8: 00000000 .word 0x00000000 + 800053bc: 8001bf86 .word 0x8001bf86 + 800053c0: 00000000 .word 0x00000000 + 800053c4: 008c8c93 addi x25,x25,8 + + mv x2, x25 # switch signature pointer register to avoid conflict with test + 800053c8: 000c8113 addi x2,x25,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x1a7e12229214c686 + 800053cc: 00063c83 ld x25,0(x12) + 800053d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x83377dbe362e9553 + 800053d4: 00063c83 ld x25,0(x12) + 800053d8: 00860613 addi x12,x12,8 + +00000000800053dc : +Zkne_aes64es_cg_cmp_rs1_rs2_b25: + aes64es x27, x25, x25 # perform operation + 800053dc: 339c8db3 aes64es x27,x25,x25 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zkne_aes64es_cg_cmp_rs1_rs2_b25, Zkne_aes64es_cg_cmp_rs1_rs2_b25_str) + 800053e0: 00013203 ld x4,0(x2) + 800053e4: 01b20c63 beq x4,x27,800053fc + 800053e8: 519052ef jal x5,8000b100 + 800053ec: 800053dc .word 0x800053dc + 800053f0: 00000000 .word 0x00000000 + 800053f4: 8001bfc2 .word 0x8001bfc2 + 800053f8: 00000000 .word 0x00000000 + 800053fc: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x3a19ea89ac947107 + 80005400: 00063d03 ld x26,0(x12) + 80005404: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x06c5966c5104dc68 + 80005408: 00063d03 ld x26,0(x12) + 8000540c: 00860613 addi x12,x12,8 + +0000000080005410 : +Zkne_aes64es_cg_cmp_rs1_rs2_b26: + aes64es x14, x26, x26 # perform operation + 80005410: 33ad0733 aes64es x14,x26,x26 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zkne_aes64es_cg_cmp_rs1_rs2_b26, Zkne_aes64es_cg_cmp_rs1_rs2_b26_str) + 80005414: 00013203 ld x4,0(x2) + 80005418: 00e20c63 beq x4,x14,80005430 + 8000541c: 4e5052ef jal x5,8000b100 + 80005420: 80005410 .word 0x80005410 + 80005424: 00000000 .word 0x00000000 + 80005428: 8001bffe .word 0x8001bffe + 8000542c: 00000000 .word 0x00000000 + 80005430: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x064c185091bab4d1 + 80005434: 00063d83 ld x27,0(x12) + 80005438: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x95747db18c77051d + 8000543c: 00063d83 ld x27,0(x12) + 80005440: 00860613 addi x12,x12,8 + +0000000080005444 : +Zkne_aes64es_cg_cmp_rs1_rs2_b27: + aes64es x14, x27, x27 # perform operation + 80005444: 33bd8733 aes64es x14,x27,x27 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zkne_aes64es_cg_cmp_rs1_rs2_b27, Zkne_aes64es_cg_cmp_rs1_rs2_b27_str) + 80005448: 00013203 ld x4,0(x2) + 8000544c: 00e20c63 beq x4,x14,80005464 + 80005450: 4b1052ef jal x5,8000b100 + 80005454: 80005444 .word 0x80005444 + 80005458: 00000000 .word 0x00000000 + 8000545c: 8001c03a .word 0x8001c03a + 80005460: 00000000 .word 0x00000000 + 80005464: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x52d931cc2ab1a520 + 80005468: 00063e03 ld x28,0(x12) + 8000546c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x749677ae345c7215 + 80005470: 00063e03 ld x28,0(x12) + 80005474: 00860613 addi x12,x12,8 + +0000000080005478 : +Zkne_aes64es_cg_cmp_rs1_rs2_b28: + aes64es x6, x28, x28 # perform operation + 80005478: 33ce0333 aes64es x6,x28,x28 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes64es_cg_cmp_rs1_rs2_b28, Zkne_aes64es_cg_cmp_rs1_rs2_b28_str) + 8000547c: 00013203 ld x4,0(x2) + 80005480: 00620c63 beq x4,x6,80005498 + 80005484: 47d052ef jal x5,8000b100 + 80005488: 80005478 .word 0x80005478 + 8000548c: 00000000 .word 0x00000000 + 80005490: 8001c076 .word 0x8001c076 + 80005494: 00000000 .word 0x00000000 + 80005498: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x503fe060dda0849d + 8000549c: 00063e83 ld x29,0(x12) + 800054a0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x318414ad25c2103c + 800054a4: 00063e83 ld x29,0(x12) + 800054a8: 00860613 addi x12,x12,8 + +00000000800054ac : +Zkne_aes64es_cg_cmp_rs1_rs2_b29: + aes64es x13, x29, x29 # perform operation + 800054ac: 33de86b3 aes64es x13,x29,x29 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zkne_aes64es_cg_cmp_rs1_rs2_b29, Zkne_aes64es_cg_cmp_rs1_rs2_b29_str) + 800054b0: 00013203 ld x4,0(x2) + 800054b4: 00d20c63 beq x4,x13,800054cc + 800054b8: 449052ef jal x5,8000b100 + 800054bc: 800054ac .word 0x800054ac + 800054c0: 00000000 .word 0x00000000 + 800054c4: 8001c0b2 .word 0x8001c0b2 + 800054c8: 00000000 .word 0x00000000 + 800054cc: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xdf6ad9fc1e3544ab + 800054d0: 00063f03 ld x30,0(x12) + 800054d4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x5e829068820ec6db + 800054d8: 00063f03 ld x30,0(x12) + 800054dc: 00860613 addi x12,x12,8 + +00000000800054e0 : +Zkne_aes64es_cg_cmp_rs1_rs2_b30: + aes64es x0, x30, x30 # perform operation + 800054e0: 33ef0033 aes64es x0,x30,x30 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zkne_aes64es_cg_cmp_rs1_rs2_b30, Zkne_aes64es_cg_cmp_rs1_rs2_b30_str) + 800054e4: 00013203 ld x4,0(x2) + 800054e8: 00020c63 beq x4,x0,80005500 + 800054ec: 415052ef jal x5,8000b100 + 800054f0: 800054e0 .word 0x800054e0 + 800054f4: 00000000 .word 0x00000000 + 800054f8: 8001c0ee .word 0x8001c0ee + 800054fc: 00000000 .word 0x00000000 + 80005500: 00810113 addi x2,x2,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x5124f3d31dab42ac + 80005504: 00063f83 ld x31,0(x12) + 80005508: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x1a92f9aa4169d7d5 + 8000550c: 00063f83 ld x31,0(x12) + 80005510: 00860613 addi x12,x12,8 + +0000000080005514 : +Zkne_aes64es_cg_cmp_rs1_rs2_b31: + aes64es x27, x31, x31 # perform operation + 80005514: 33ff8db3 aes64es x27,x31,x31 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zkne_aes64es_cg_cmp_rs1_rs2_b31, Zkne_aes64es_cg_cmp_rs1_rs2_b31_str) + 80005518: 00013203 ld x4,0(x2) + 8000551c: 01b20c63 beq x4,x27,80005534 + 80005520: 3e1052ef jal x5,8000b100 + 80005524: 80005514 .word 0x80005514 + 80005528: 00000000 .word 0x00000000 + 8000552c: 8001c12a .word 0x8001c12a + 80005530: 00000000 .word 0x00000000 + 80005534: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x0c935565f4d44d4d + 80005538: 00063003 ld x0,0(x12) + 8000553c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xe0eb33d853bcfe19 + 80005540: 00063883 ld x17,0(x12) + 80005544: 00860613 addi x12,x12,8 + +0000000080005548 : +Zkne_aes64es_cg_cmp_rd_rs1_b0: + aes64es x0, x0, x17 # perform operation + 80005548: 33100033 aes64es x0,x0,x17 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zkne_aes64es_cg_cmp_rd_rs1_b0, Zkne_aes64es_cg_cmp_rd_rs1_b0_str) + 8000554c: 00013203 ld x4,0(x2) + 80005550: 00020c63 beq x4,x0,80005568 + 80005554: 3ad052ef jal x5,8000b100 + 80005558: 80005548 .word 0x80005548 + 8000555c: 00000000 .word 0x00000000 + 80005560: 8001c166 .word 0x8001c166 + 80005564: 00000000 .word 0x00000000 + 80005568: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xfd69d7c475a4caa2 + 8000556c: 00063083 ld x1,0(x12) + 80005570: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x471f4f38d19cc181 + 80005574: 00063803 ld x16,0(x12) + 80005578: 00860613 addi x12,x12,8 + +000000008000557c : +Zkne_aes64es_cg_cmp_rd_rs1_b1: + aes64es x1, x1, x16 # perform operation + 8000557c: 330080b3 aes64es x1,x1,x16 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zkne_aes64es_cg_cmp_rd_rs1_b1, Zkne_aes64es_cg_cmp_rd_rs1_b1_str) + 80005580: 00013203 ld x4,0(x2) + 80005584: 00120c63 beq x4,x1,8000559c + 80005588: 379052ef jal x5,8000b100 + 8000558c: 8000557c .word 0x8000557c + 80005590: 00000000 .word 0x00000000 + 80005594: 8001c1a0 .word 0x8001c1a0 + 80005598: 00000000 .word 0x00000000 + 8000559c: 00810113 addi x2,x2,8 + + mv x10, x2 # switch signature pointer register to avoid conflict with test + 800055a0: 00010513 addi x10,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x5f1d369b9c139024 + 800055a4: 00063103 ld x2,0(x12) + 800055a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xbfbacf1286b96de5 + 800055ac: 00063783 ld x15,0(x12) + 800055b0: 00860613 addi x12,x12,8 + +00000000800055b4 : +Zkne_aes64es_cg_cmp_rd_rs1_b2: + aes64es x2, x2, x15 # perform operation + 800055b4: 32f10133 aes64es x2,x2,x15 + # Check if x2 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x2, Zkne_aes64es_cg_cmp_rd_rs1_b2, Zkne_aes64es_cg_cmp_rd_rs1_b2_str) + 800055b8: 00053203 ld x4,0(x10) + 800055bc: 00220c63 beq x4,x2,800055d4 + 800055c0: 341052ef jal x5,8000b100 + 800055c4: 800055b4 .word 0x800055b4 + 800055c8: 00000000 .word 0x00000000 + 800055cc: 8001c1da .word 0x8001c1da + 800055d0: 00000000 .word 0x00000000 + 800055d4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xff27ceccc796445d + 800055d8: 00063183 ld x3,0(x12) + 800055dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xab7a63b356725b83 + 800055e0: 00063483 ld x9,0(x12) + 800055e4: 00860613 addi x12,x12,8 + +00000000800055e8 : +Zkne_aes64es_cg_cmp_rd_rs1_b3: + aes64es x3, x3, x9 # perform operation + 800055e8: 329181b3 aes64es x3,x3,x9 + # Check if x3 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x3, Zkne_aes64es_cg_cmp_rd_rs1_b3, Zkne_aes64es_cg_cmp_rd_rs1_b3_str) + 800055ec: 00053203 ld x4,0(x10) + 800055f0: 00320c63 beq x4,x3,80005608 + 800055f4: 30d052ef jal x5,8000b100 + 800055f8: 800055e8 .word 0x800055e8 + 800055fc: 00000000 .word 0x00000000 + 80005600: 8001c214 .word 0x8001c214 + 80005604: 00000000 .word 0x00000000 + 80005608: 00850513 addi x10,x10,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 8000560c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005610: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x32856932471f8257 + 80005614: 00063203 ld x4,0(x12) + 80005618: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x75998c8b87667a19 + 8000561c: 00063b03 ld x22,0(x12) + 80005620: 00860613 addi x12,x12,8 + +0000000080005624 : +Zkne_aes64es_cg_cmp_rd_rs1_b4: + aes64es x4, x4, x22 # perform operation + 80005624: 33620233 aes64es x4,x4,x22 + # Check if x4 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x4, Zkne_aes64es_cg_cmp_rd_rs1_b4, Zkne_aes64es_cg_cmp_rd_rs1_b4_str) + 80005628: 00053683 ld x13,0(x10) + 8000562c: 00468c63 beq x13,x4,80005644 + 80005630: 3110576f jal x14,8000b140 + 80005634: 80005624 .word 0x80005624 + 80005638: 00000000 .word 0x00000000 + 8000563c: 8001c24e .word 0x8001c24e + 80005640: 00000000 .word 0x00000000 + 80005644: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x2ee16701cd60d142 + 80005648: 00063283 ld x5,0(x12) + 8000564c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x6e8183a7974e2b3d + 80005650: 00063d83 ld x27,0(x12) + 80005654: 00860613 addi x12,x12,8 + +0000000080005658 : +Zkne_aes64es_cg_cmp_rd_rs1_b5: + aes64es x5, x5, x27 # perform operation + 80005658: 33b282b3 aes64es x5,x5,x27 + # Check if x5 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x5, Zkne_aes64es_cg_cmp_rd_rs1_b5, Zkne_aes64es_cg_cmp_rd_rs1_b5_str) + 8000565c: 00053683 ld x13,0(x10) + 80005660: 00568c63 beq x13,x5,80005678 + 80005664: 2dd0576f jal x14,8000b140 + 80005668: 80005658 .word 0x80005658 + 8000566c: 00000000 .word 0x00000000 + 80005670: 8001c288 .word 0x8001c288 + 80005674: 00000000 .word 0x00000000 + 80005678: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x2ba55a94378f23f4 + 8000567c: 00063303 ld x6,0(x12) + 80005680: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x9942d387ff1a5875 + 80005684: 00063483 ld x9,0(x12) + 80005688: 00860613 addi x12,x12,8 + +000000008000568c : +Zkne_aes64es_cg_cmp_rd_rs1_b6: + aes64es x6, x6, x9 # perform operation + 8000568c: 32930333 aes64es x6,x6,x9 + # Check if x6 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x6, Zkne_aes64es_cg_cmp_rd_rs1_b6, Zkne_aes64es_cg_cmp_rd_rs1_b6_str) + 80005690: 00053683 ld x13,0(x10) + 80005694: 00668c63 beq x13,x6,800056ac + 80005698: 2a90576f jal x14,8000b140 + 8000569c: 8000568c .word 0x8000568c + 800056a0: 00000000 .word 0x00000000 + 800056a4: 8001c2c2 .word 0x8001c2c2 + 800056a8: 00000000 .word 0x00000000 + 800056ac: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x335ff05664d8bb40 + 800056b0: 00063383 ld x7,0(x12) + 800056b4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x89356d2c1256cb42 + 800056b8: 00063f03 ld x30,0(x12) + 800056bc: 00860613 addi x12,x12,8 + +00000000800056c0 : +Zkne_aes64es_cg_cmp_rd_rs1_b7: + aes64es x7, x7, x30 # perform operation + 800056c0: 33e383b3 aes64es x7,x7,x30 + # Check if x7 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x7, Zkne_aes64es_cg_cmp_rd_rs1_b7, Zkne_aes64es_cg_cmp_rd_rs1_b7_str) + 800056c4: 00053683 ld x13,0(x10) + 800056c8: 00768c63 beq x13,x7,800056e0 + 800056cc: 2750576f jal x14,8000b140 + 800056d0: 800056c0 .word 0x800056c0 + 800056d4: 00000000 .word 0x00000000 + 800056d8: 8001c2fc .word 0x8001c2fc + 800056dc: 00000000 .word 0x00000000 + 800056e0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xe35d577077e17be0 + 800056e4: 00063403 ld x8,0(x12) + 800056e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x7c085a866daabbbd + 800056ec: 00063a03 ld x20,0(x12) + 800056f0: 00860613 addi x12,x12,8 + +00000000800056f4 : +Zkne_aes64es_cg_cmp_rd_rs1_b8: + aes64es x8, x8, x20 # perform operation + 800056f4: 33440433 aes64es x8,x8,x20 + # Check if x8 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x8, Zkne_aes64es_cg_cmp_rd_rs1_b8, Zkne_aes64es_cg_cmp_rd_rs1_b8_str) + 800056f8: 00053683 ld x13,0(x10) + 800056fc: 00868c63 beq x13,x8,80005714 + 80005700: 2410576f jal x14,8000b140 + 80005704: 800056f4 .word 0x800056f4 + 80005708: 00000000 .word 0x00000000 + 8000570c: 8001c336 .word 0x8001c336 + 80005710: 00000000 .word 0x00000000 + 80005714: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x07ba17733af4744d + 80005718: 00063483 ld x9,0(x12) + 8000571c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xdf9684d83254d106 + 80005720: 00063f83 ld x31,0(x12) + 80005724: 00860613 addi x12,x12,8 + +0000000080005728 : +Zkne_aes64es_cg_cmp_rd_rs1_b9: + aes64es x9, x9, x31 # perform operation + 80005728: 33f484b3 aes64es x9,x9,x31 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zkne_aes64es_cg_cmp_rd_rs1_b9, Zkne_aes64es_cg_cmp_rd_rs1_b9_str) + 8000572c: 00053683 ld x13,0(x10) + 80005730: 00968c63 beq x13,x9,80005748 + 80005734: 20d0576f jal x14,8000b140 + 80005738: 80005728 .word 0x80005728 + 8000573c: 00000000 .word 0x00000000 + 80005740: 8001c370 .word 0x8001c370 + 80005744: 00000000 .word 0x00000000 + 80005748: 00850513 addi x10,x10,8 + + mv x20, x10 # switch signature pointer register to avoid conflict with test + 8000574c: 00050a13 addi x20,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x449fbbb14100a362 + 80005750: 00063503 ld x10,0(x12) + 80005754: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x7f346ea1dd345bb5 + 80005758: 00063e03 ld x28,0(x12) + 8000575c: 00860613 addi x12,x12,8 + +0000000080005760 : +Zkne_aes64es_cg_cmp_rd_rs1_b10: + aes64es x10, x10, x28 # perform operation + 80005760: 33c50533 aes64es x10,x10,x28 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zkne_aes64es_cg_cmp_rd_rs1_b10, Zkne_aes64es_cg_cmp_rd_rs1_b10_str) + 80005764: 000a3683 ld x13,0(x20) + 80005768: 00a68c63 beq x13,x10,80005780 + 8000576c: 1d50576f jal x14,8000b140 + 80005770: 80005760 .word 0x80005760 + 80005774: 00000000 .word 0x00000000 + 80005778: 8001c3aa .word 0x8001c3aa + 8000577c: 00000000 .word 0x00000000 + 80005780: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x40624755b7a92cf1 + 80005784: 00063583 ld x11,0(x12) + 80005788: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xd8f6a73a6180eae8 + 8000578c: 00063183 ld x3,0(x12) + 80005790: 00860613 addi x12,x12,8 + +0000000080005794 : +Zkne_aes64es_cg_cmp_rd_rs1_b11: + aes64es x11, x11, x3 # perform operation + 80005794: 323585b3 aes64es x11,x11,x3 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zkne_aes64es_cg_cmp_rd_rs1_b11, Zkne_aes64es_cg_cmp_rd_rs1_b11_str) + 80005798: 000a3683 ld x13,0(x20) + 8000579c: 00b68c63 beq x13,x11,800057b4 + 800057a0: 1a10576f jal x14,8000b140 + 800057a4: 80005794 .word 0x80005794 + 800057a8: 00000000 .word 0x00000000 + 800057ac: 8001c3e5 .word 0x8001c3e5 + 800057b0: 00000000 .word 0x00000000 + 800057b4: 008a0a13 addi x20,x20,8 + + mv x28, x12 # switch data pointer register to avoid conflict with test + 800057b8: 00060e13 addi x28,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs1: x12 = 0x3c822120624d032f + 800057bc: 000e3603 ld x12,0(x28) + 800057c0: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x30) # load rs2: x30 = 0xd6accde3ed873289 + 800057c4: 000e3f03 ld x30,0(x28) + 800057c8: 008e0e13 addi x28,x28,8 + +00000000800057cc : +Zkne_aes64es_cg_cmp_rd_rs1_b12: + aes64es x12, x12, x30 # perform operation + 800057cc: 33e60633 aes64es x12,x12,x30 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zkne_aes64es_cg_cmp_rd_rs1_b12, Zkne_aes64es_cg_cmp_rd_rs1_b12_str) + 800057d0: 000a3683 ld x13,0(x20) + 800057d4: 00c68c63 beq x13,x12,800057ec + 800057d8: 1690576f jal x14,8000b140 + 800057dc: 800057cc .word 0x800057cc + 800057e0: 00000000 .word 0x00000000 + 800057e4: 8001c420 .word 0x8001c420 + 800057e8: 00000000 .word 0x00000000 + 800057ec: 008a0a13 addi x20,x20,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057f0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800057f4: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x28, x13) # load rs1: x13 = 0xdc3a33b41f8fd244 + 800057f8: 000e3683 ld x13,0(x28) + 800057fc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x9fec96549dce3aff + 80005800: 000e3c03 ld x24,0(x28) + 80005804: 008e0e13 addi x28,x28,8 + +0000000080005808 : +Zkne_aes64es_cg_cmp_rd_rs1_b13: + aes64es x13, x13, x24 # perform operation + 80005808: 338686b3 aes64es x13,x13,x24 + # Check if x13 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x13, Zkne_aes64es_cg_cmp_rd_rs1_b13, Zkne_aes64es_cg_cmp_rd_rs1_b13_str) + 8000580c: 000a3383 ld x7,0(x20) + 80005810: 00d38c63 beq x7,x13,80005828 + 80005814: 1050546f jal x8,8000b118 + 80005818: 80005808 .word 0x80005808 + 8000581c: 00000000 .word 0x00000000 + 80005820: 8001c45b .word 0x8001c45b + 80005824: 00000000 .word 0x00000000 + 80005828: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0xbc034e5ed40992ae + 8000582c: 000e3703 ld x14,0(x28) + 80005830: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x8dd79d7d718690d6 + 80005834: 000e3c83 ld x25,0(x28) + 80005838: 008e0e13 addi x28,x28,8 + +000000008000583c : +Zkne_aes64es_cg_cmp_rd_rs1_b14: + aes64es x14, x14, x25 # perform operation + 8000583c: 33970733 aes64es x14,x14,x25 + # Check if x14 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x14, Zkne_aes64es_cg_cmp_rd_rs1_b14, Zkne_aes64es_cg_cmp_rd_rs1_b14_str) + 80005840: 000a3383 ld x7,0(x20) + 80005844: 00e38c63 beq x7,x14,8000585c + 80005848: 0d10546f jal x8,8000b118 + 8000584c: 8000583c .word 0x8000583c + 80005850: 00000000 .word 0x00000000 + 80005854: 8001c496 .word 0x8001c496 + 80005858: 00000000 .word 0x00000000 + 8000585c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x28, x15) # load rs1: x15 = 0x39fe30bd4c11173b + 80005860: 000e3783 ld x15,0(x28) + 80005864: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0xa9b3f5689cf5fdee + 80005868: 000e3b83 ld x23,0(x28) + 8000586c: 008e0e13 addi x28,x28,8 + +0000000080005870 : +Zkne_aes64es_cg_cmp_rd_rs1_b15: + aes64es x15, x15, x23 # perform operation + 80005870: 337787b3 aes64es x15,x15,x23 + # Check if x15 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x15, Zkne_aes64es_cg_cmp_rd_rs1_b15, Zkne_aes64es_cg_cmp_rd_rs1_b15_str) + 80005874: 000a3383 ld x7,0(x20) + 80005878: 00f38c63 beq x7,x15,80005890 + 8000587c: 09d0546f jal x8,8000b118 + 80005880: 80005870 .word 0x80005870 + 80005884: 00000000 .word 0x00000000 + 80005888: 8001c4d1 .word 0x8001c4d1 + 8000588c: 00000000 .word 0x00000000 + 80005890: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x28, x16) # load rs1: x16 = 0xa1a8880c03175c9c + 80005894: 000e3803 ld x16,0(x28) + 80005898: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x5) # load rs2: x5 = 0xa0ff2d8b35557ef7 + 8000589c: 000e3283 ld x5,0(x28) + 800058a0: 008e0e13 addi x28,x28,8 + +00000000800058a4 : +Zkne_aes64es_cg_cmp_rd_rs1_b16: + aes64es x16, x16, x5 # perform operation + 800058a4: 32580833 aes64es x16,x16,x5 + # Check if x16 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x16, Zkne_aes64es_cg_cmp_rd_rs1_b16, Zkne_aes64es_cg_cmp_rd_rs1_b16_str) + 800058a8: 000a3383 ld x7,0(x20) + 800058ac: 01038c63 beq x7,x16,800058c4 + 800058b0: 0690546f jal x8,8000b118 + 800058b4: 800058a4 .word 0x800058a4 + 800058b8: 00000000 .word 0x00000000 + 800058bc: 8001c50c .word 0x8001c50c + 800058c0: 00000000 .word 0x00000000 + 800058c4: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xcf32226e1bbe4a71 + 800058c8: 000e3883 ld x17,0(x28) + 800058cc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0x0adcba49fbf4881f + 800058d0: 000e3c03 ld x24,0(x28) + 800058d4: 008e0e13 addi x28,x28,8 + +00000000800058d8 : +Zkne_aes64es_cg_cmp_rd_rs1_b17: + aes64es x17, x17, x24 # perform operation + 800058d8: 338888b3 aes64es x17,x17,x24 + # Check if x17 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x17, Zkne_aes64es_cg_cmp_rd_rs1_b17, Zkne_aes64es_cg_cmp_rd_rs1_b17_str) + 800058dc: 000a3383 ld x7,0(x20) + 800058e0: 01138c63 beq x7,x17,800058f8 + 800058e4: 0350546f jal x8,8000b118 + 800058e8: 800058d8 .word 0x800058d8 + 800058ec: 00000000 .word 0x00000000 + 800058f0: 8001c547 .word 0x8001c547 + 800058f4: 00000000 .word 0x00000000 + 800058f8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0xb1d18c3b4c78353e + 800058fc: 000e3903 ld x18,0(x28) + 80005900: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0x681c89087d7fb67f + 80005904: 000e3103 ld x2,0(x28) + 80005908: 008e0e13 addi x28,x28,8 + +000000008000590c : +Zkne_aes64es_cg_cmp_rd_rs1_b18: + aes64es x18, x18, x2 # perform operation + 8000590c: 32290933 aes64es x18,x18,x2 + # Check if x18 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x18, Zkne_aes64es_cg_cmp_rd_rs1_b18, Zkne_aes64es_cg_cmp_rd_rs1_b18_str) + 80005910: 000a3383 ld x7,0(x20) + 80005914: 01238c63 beq x7,x18,8000592c + 80005918: 0010546f jal x8,8000b118 + 8000591c: 8000590c .word 0x8000590c + 80005920: 00000000 .word 0x00000000 + 80005924: 8001c582 .word 0x8001c582 + 80005928: 00000000 .word 0x00000000 + 8000592c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x9a5901dcc636e611 + 80005930: 000e3983 ld x19,0(x28) + 80005934: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x1cc13d6100420857 + 80005938: 000e3603 ld x12,0(x28) + 8000593c: 008e0e13 addi x28,x28,8 + +0000000080005940 : +Zkne_aes64es_cg_cmp_rd_rs1_b19: + aes64es x19, x19, x12 # perform operation + 80005940: 32c989b3 aes64es x19,x19,x12 + # Check if x19 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x19, Zkne_aes64es_cg_cmp_rd_rs1_b19, Zkne_aes64es_cg_cmp_rd_rs1_b19_str) + 80005944: 000a3383 ld x7,0(x20) + 80005948: 01338c63 beq x7,x19,80005960 + 8000594c: 7cc0546f jal x8,8000b118 + 80005950: 80005940 .word 0x80005940 + 80005954: 00000000 .word 0x00000000 + 80005958: 8001c5bd .word 0x8001c5bd + 8000595c: 00000000 .word 0x00000000 + 80005960: 008a0a13 addi x20,x20,8 + + mv x29, x20 # switch signature pointer register to avoid conflict with test + 80005964: 000a0e93 addi x29,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xaf558ccb541f7270 + 80005968: 000e3a03 ld x20,0(x28) + 8000596c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0xc5bf3c5488bc1070 + 80005970: 000e3603 ld x12,0(x28) + 80005974: 008e0e13 addi x28,x28,8 + +0000000080005978 : +Zkne_aes64es_cg_cmp_rd_rs1_b20: + aes64es x20, x20, x12 # perform operation + 80005978: 32ca0a33 aes64es x20,x20,x12 + # Check if x20 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x20, Zkne_aes64es_cg_cmp_rd_rs1_b20, Zkne_aes64es_cg_cmp_rd_rs1_b20_str) + 8000597c: 000eb383 ld x7,0(x29) + 80005980: 01438c63 beq x7,x20,80005998 + 80005984: 7940546f jal x8,8000b118 + 80005988: 80005978 .word 0x80005978 + 8000598c: 00000000 .word 0x00000000 + 80005990: 8001c5f8 .word 0x8001c5f8 + 80005994: 00000000 .word 0x00000000 + 80005998: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x645bbc153829da0e + 8000599c: 000e3a83 ld x21,0(x28) + 800059a0: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x9dcef20c2c077388 + 800059a4: 000e3603 ld x12,0(x28) + 800059a8: 008e0e13 addi x28,x28,8 + +00000000800059ac : +Zkne_aes64es_cg_cmp_rd_rs1_b21: + aes64es x21, x21, x12 # perform operation + 800059ac: 32ca8ab3 aes64es x21,x21,x12 + # Check if x21 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x21, Zkne_aes64es_cg_cmp_rd_rs1_b21, Zkne_aes64es_cg_cmp_rd_rs1_b21_str) + 800059b0: 000eb383 ld x7,0(x29) + 800059b4: 01538c63 beq x7,x21,800059cc + 800059b8: 7600546f jal x8,8000b118 + 800059bc: 800059ac .word 0x800059ac + 800059c0: 00000000 .word 0x00000000 + 800059c4: 8001c633 .word 0x8001c633 + 800059c8: 00000000 .word 0x00000000 + 800059cc: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xdbb0a7e2841b41e3 + 800059d0: 000e3b03 ld x22,0(x28) + 800059d4: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs2: x11 = 0x5d05e6862b74e61e + 800059d8: 000e3583 ld x11,0(x28) + 800059dc: 008e0e13 addi x28,x28,8 + +00000000800059e0 : +Zkne_aes64es_cg_cmp_rd_rs1_b22: + aes64es x22, x22, x11 # perform operation + 800059e0: 32bb0b33 aes64es x22,x22,x11 + # Check if x22 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x22, Zkne_aes64es_cg_cmp_rd_rs1_b22, Zkne_aes64es_cg_cmp_rd_rs1_b22_str) + 800059e4: 000eb383 ld x7,0(x29) + 800059e8: 01638c63 beq x7,x22,80005a00 + 800059ec: 72c0546f jal x8,8000b118 + 800059f0: 800059e0 .word 0x800059e0 + 800059f4: 00000000 .word 0x00000000 + 800059f8: 8001c66e .word 0x8001c66e + 800059fc: 00000000 .word 0x00000000 + 80005a00: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x0fe4273e925c980b + 80005a04: 000e3b83 ld x23,0(x28) + 80005a08: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs2: x18 = 0xfb16c6eb60803e87 + 80005a0c: 000e3903 ld x18,0(x28) + 80005a10: 008e0e13 addi x28,x28,8 + +0000000080005a14 : +Zkne_aes64es_cg_cmp_rd_rs1_b23: + aes64es x23, x23, x18 # perform operation + 80005a14: 332b8bb3 aes64es x23,x23,x18 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zkne_aes64es_cg_cmp_rd_rs1_b23, Zkne_aes64es_cg_cmp_rd_rs1_b23_str) + 80005a18: 000eb383 ld x7,0(x29) + 80005a1c: 01738c63 beq x7,x23,80005a34 + 80005a20: 6f80546f jal x8,8000b118 + 80005a24: 80005a14 .word 0x80005a14 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 8001c6a9 .word 0x8001c6a9 + 80005a30: 00000000 .word 0x00000000 + 80005a34: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0x140721f6932c2110 + 80005a38: 000e3c03 ld x24,0(x28) + 80005a3c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x12) # load rs2: x12 = 0x91b24840caac41a6 + 80005a40: 000e3603 ld x12,0(x28) + 80005a44: 008e0e13 addi x28,x28,8 + +0000000080005a48 : +Zkne_aes64es_cg_cmp_rd_rs1_b24: + aes64es x24, x24, x12 # perform operation + 80005a48: 32cc0c33 aes64es x24,x24,x12 + # Check if x24 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x24, Zkne_aes64es_cg_cmp_rd_rs1_b24, Zkne_aes64es_cg_cmp_rd_rs1_b24_str) + 80005a4c: 000eb383 ld x7,0(x29) + 80005a50: 01838c63 beq x7,x24,80005a68 + 80005a54: 6c40546f jal x8,8000b118 + 80005a58: 80005a48 .word 0x80005a48 + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 8001c6e4 .word 0x8001c6e4 + 80005a64: 00000000 .word 0x00000000 + 80005a68: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x10832573d7ba247d + 80005a6c: 000e3c83 ld x25,0(x28) + 80005a70: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x2) # load rs2: x2 = 0x01912800bf3adc2c + 80005a74: 000e3103 ld x2,0(x28) + 80005a78: 008e0e13 addi x28,x28,8 + +0000000080005a7c : +Zkne_aes64es_cg_cmp_rd_rs1_b25: + aes64es x25, x25, x2 # perform operation + 80005a7c: 322c8cb3 aes64es x25,x25,x2 + # Check if x25 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x25, Zkne_aes64es_cg_cmp_rd_rs1_b25, Zkne_aes64es_cg_cmp_rd_rs1_b25_str) + 80005a80: 000eb383 ld x7,0(x29) + 80005a84: 01938c63 beq x7,x25,80005a9c + 80005a88: 6900546f jal x8,8000b118 + 80005a8c: 80005a7c .word 0x80005a7c + 80005a90: 00000000 .word 0x00000000 + 80005a94: 8001c71f .word 0x8001c71f + 80005a98: 00000000 .word 0x00000000 + 80005a9c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x7d6c5be162caabaf + 80005aa0: 000e3d03 ld x26,0(x28) + 80005aa4: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs2: x17 = 0xc32be099b1771dad + 80005aa8: 000e3883 ld x17,0(x28) + 80005aac: 008e0e13 addi x28,x28,8 + +0000000080005ab0 : +Zkne_aes64es_cg_cmp_rd_rs1_b26: + aes64es x26, x26, x17 # perform operation + 80005ab0: 331d0d33 aes64es x26,x26,x17 + # Check if x26 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x26, Zkne_aes64es_cg_cmp_rd_rs1_b26, Zkne_aes64es_cg_cmp_rd_rs1_b26_str) + 80005ab4: 000eb383 ld x7,0(x29) + 80005ab8: 01a38c63 beq x7,x26,80005ad0 + 80005abc: 65c0546f jal x8,8000b118 + 80005ac0: 80005ab0 .word 0x80005ab0 + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 8001c75a .word 0x8001c75a + 80005acc: 00000000 .word 0x00000000 + 80005ad0: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x1b2d40943b304ec3 + 80005ad4: 000e3d83 ld x27,0(x28) + 80005ad8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x1a65772b820202b2 + 80005adc: 000e3c83 ld x25,0(x28) + 80005ae0: 008e0e13 addi x28,x28,8 + +0000000080005ae4 : +Zkne_aes64es_cg_cmp_rd_rs1_b27: + aes64es x27, x27, x25 # perform operation + 80005ae4: 339d8db3 aes64es x27,x27,x25 + # Check if x27 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x27, Zkne_aes64es_cg_cmp_rd_rs1_b27, Zkne_aes64es_cg_cmp_rd_rs1_b27_str) + 80005ae8: 000eb383 ld x7,0(x29) + 80005aec: 01b38c63 beq x7,x27,80005b04 + 80005af0: 6280546f jal x8,8000b118 + 80005af4: 80005ae4 .word 0x80005ae4 + 80005af8: 00000000 .word 0x00000000 + 80005afc: 8001c795 .word 0x8001c795 + 80005b00: 00000000 .word 0x00000000 + 80005b04: 008e8e93 addi x29,x29,8 + + mv x12, x28 # switch data pointer register to avoid conflict with test + 80005b08: 000e0613 addi x12,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x989a74901de8cd61 + 80005b0c: 00063e03 ld x28,0(x12) + 80005b10: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x90fbc6796faf9657 + 80005b14: 00063b03 ld x22,0(x12) + 80005b18: 00860613 addi x12,x12,8 + +0000000080005b1c : +Zkne_aes64es_cg_cmp_rd_rs1_b28: + aes64es x28, x28, x22 # perform operation + 80005b1c: 336e0e33 aes64es x28,x28,x22 + # Check if x28 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x28, Zkne_aes64es_cg_cmp_rd_rs1_b28, Zkne_aes64es_cg_cmp_rd_rs1_b28_str) + 80005b20: 000eb383 ld x7,0(x29) + 80005b24: 01c38c63 beq x7,x28,80005b3c + 80005b28: 5f00546f jal x8,8000b118 + 80005b2c: 80005b1c .word 0x80005b1c + 80005b30: 00000000 .word 0x00000000 + 80005b34: 8001c7d0 .word 0x8001c7d0 + 80005b38: 00000000 .word 0x00000000 + 80005b3c: 008e8e93 addi x29,x29,8 + + mv x18, x29 # switch signature pointer register to avoid conflict with test + 80005b40: 000e8913 addi x18,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xc3c7e65f51b393e8 + 80005b44: 00063e83 ld x29,0(x12) + 80005b48: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xb2b3520257e0e988 + 80005b4c: 00063c83 ld x25,0(x12) + 80005b50: 00860613 addi x12,x12,8 + +0000000080005b54 : +Zkne_aes64es_cg_cmp_rd_rs1_b29: + aes64es x29, x29, x25 # perform operation + 80005b54: 339e8eb3 aes64es x29,x29,x25 + # Check if x29 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x29, Zkne_aes64es_cg_cmp_rd_rs1_b29, Zkne_aes64es_cg_cmp_rd_rs1_b29_str) + 80005b58: 00093383 ld x7,0(x18) + 80005b5c: 01d38c63 beq x7,x29,80005b74 + 80005b60: 5b80546f jal x8,8000b118 + 80005b64: 80005b54 .word 0x80005b54 + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 8001c80b .word 0x8001c80b + 80005b70: 00000000 .word 0x00000000 + 80005b74: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xbe77b7ccc4edbc65 + 80005b78: 00063f03 ld x30,0(x12) + 80005b7c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x84db424394fa84de + 80005b80: 00063b03 ld x22,0(x12) + 80005b84: 00860613 addi x12,x12,8 + +0000000080005b88 : +Zkne_aes64es_cg_cmp_rd_rs1_b30: + aes64es x30, x30, x22 # perform operation + 80005b88: 336f0f33 aes64es x30,x30,x22 + # Check if x30 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x30, Zkne_aes64es_cg_cmp_rd_rs1_b30, Zkne_aes64es_cg_cmp_rd_rs1_b30_str) + 80005b8c: 00093383 ld x7,0(x18) + 80005b90: 01e38c63 beq x7,x30,80005ba8 + 80005b94: 5840546f jal x8,8000b118 + 80005b98: 80005b88 .word 0x80005b88 + 80005b9c: 00000000 .word 0x00000000 + 80005ba0: 8001c846 .word 0x8001c846 + 80005ba4: 00000000 .word 0x00000000 + 80005ba8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xcb74c1059ad6700b + 80005bac: 00063f83 ld x31,0(x12) + 80005bb0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xba322bf7dafff365 + 80005bb4: 00063d83 ld x27,0(x12) + 80005bb8: 00860613 addi x12,x12,8 + +0000000080005bbc : +Zkne_aes64es_cg_cmp_rd_rs1_b31: + aes64es x31, x31, x27 # perform operation + 80005bbc: 33bf8fb3 aes64es x31,x31,x27 + # Check if x31 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x31, Zkne_aes64es_cg_cmp_rd_rs1_b31, Zkne_aes64es_cg_cmp_rd_rs1_b31_str) + 80005bc0: 00093383 ld x7,0(x18) + 80005bc4: 01f38c63 beq x7,x31,80005bdc + 80005bc8: 5500546f jal x8,8000b118 + 80005bcc: 80005bbc .word 0x80005bbc + 80005bd0: 00000000 .word 0x00000000 + 80005bd4: 8001c881 .word 0x8001c881 + 80005bd8: 00000000 .word 0x00000000 + 80005bdc: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x4fb43b892bfda551 + 80005be0: 00063a83 ld x21,0(x12) + 80005be4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x1f4576b390003d62 + 80005be8: 00063003 ld x0,0(x12) + 80005bec: 00860613 addi x12,x12,8 + +0000000080005bf0 : +Zkne_aes64es_cg_cmp_rd_rs2_b0: + aes64es x0, x21, x0 # perform operation + 80005bf0: 320a8033 aes64es x0,x21,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zkne_aes64es_cg_cmp_rd_rs2_b0, Zkne_aes64es_cg_cmp_rd_rs2_b0_str) + 80005bf4: 00093383 ld x7,0(x18) + 80005bf8: 00038c63 beq x7,x0,80005c10 + 80005bfc: 51c0546f jal x8,8000b118 + 80005c00: 80005bf0 .word 0x80005bf0 + 80005c04: 00000000 .word 0x00000000 + 80005c08: 8001c8bc .word 0x8001c8bc + 80005c0c: 00000000 .word 0x00000000 + 80005c10: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xf27a57bdef05e4bc + 80005c14: 00063703 ld x14,0(x12) + 80005c18: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xee94777da48da6c5 + 80005c1c: 00063083 ld x1,0(x12) + 80005c20: 00860613 addi x12,x12,8 + +0000000080005c24 : +Zkne_aes64es_cg_cmp_rd_rs2_b1: + aes64es x1, x14, x1 # perform operation + 80005c24: 321700b3 aes64es x1,x14,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zkne_aes64es_cg_cmp_rd_rs2_b1, Zkne_aes64es_cg_cmp_rd_rs2_b1_str) + 80005c28: 00093383 ld x7,0(x18) + 80005c2c: 00138c63 beq x7,x1,80005c44 + 80005c30: 4e80546f jal x8,8000b118 + 80005c34: 80005c24 .word 0x80005c24 + 80005c38: 00000000 .word 0x00000000 + 80005c3c: 8001c8f6 .word 0x8001c8f6 + 80005c40: 00000000 .word 0x00000000 + 80005c44: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x867243b79f7cd795 + 80005c48: 00063b03 ld x22,0(x12) + 80005c4c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x5c4e9363b511f8b2 + 80005c50: 00063103 ld x2,0(x12) + 80005c54: 00860613 addi x12,x12,8 + +0000000080005c58 : +Zkne_aes64es_cg_cmp_rd_rs2_b2: + aes64es x2, x22, x2 # perform operation + 80005c58: 322b0133 aes64es x2,x22,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zkne_aes64es_cg_cmp_rd_rs2_b2, Zkne_aes64es_cg_cmp_rd_rs2_b2_str) + 80005c5c: 00093383 ld x7,0(x18) + 80005c60: 00238c63 beq x7,x2,80005c78 + 80005c64: 4b40546f jal x8,8000b118 + 80005c68: 80005c58 .word 0x80005c58 + 80005c6c: 00000000 .word 0x00000000 + 80005c70: 8001c930 .word 0x8001c930 + 80005c74: 00000000 .word 0x00000000 + 80005c78: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xb7953984ecdede6f + 80005c7c: 00063a03 ld x20,0(x12) + 80005c80: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x59d23f11dc6e2fdd + 80005c84: 00063183 ld x3,0(x12) + 80005c88: 00860613 addi x12,x12,8 + +0000000080005c8c : +Zkne_aes64es_cg_cmp_rd_rs2_b3: + aes64es x3, x20, x3 # perform operation + 80005c8c: 323a01b3 aes64es x3,x20,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zkne_aes64es_cg_cmp_rd_rs2_b3, Zkne_aes64es_cg_cmp_rd_rs2_b3_str) + 80005c90: 00093383 ld x7,0(x18) + 80005c94: 00338c63 beq x7,x3,80005cac + 80005c98: 4800546f jal x8,8000b118 + 80005c9c: 80005c8c .word 0x80005c8c + 80005ca0: 00000000 .word 0x00000000 + 80005ca4: 8001c96a .word 0x8001c96a + 80005ca8: 00000000 .word 0x00000000 + 80005cac: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xfd2f244aaca4b1a6 + 80005cb0: 00063283 ld x5,0(x12) + 80005cb4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x4af1363189308626 + 80005cb8: 00063203 ld x4,0(x12) + 80005cbc: 00860613 addi x12,x12,8 + +0000000080005cc0 : +Zkne_aes64es_cg_cmp_rd_rs2_b4: + aes64es x4, x5, x4 # perform operation + 80005cc0: 32428233 aes64es x4,x5,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zkne_aes64es_cg_cmp_rd_rs2_b4, Zkne_aes64es_cg_cmp_rd_rs2_b4_str) + 80005cc4: 00093383 ld x7,0(x18) + 80005cc8: 00438c63 beq x7,x4,80005ce0 + 80005ccc: 44c0546f jal x8,8000b118 + 80005cd0: 80005cc0 .word 0x80005cc0 + 80005cd4: 00000000 .word 0x00000000 + 80005cd8: 8001c9a4 .word 0x8001c9a4 + 80005cdc: 00000000 .word 0x00000000 + 80005ce0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x60205b10982658fb + 80005ce4: 00063f83 ld x31,0(x12) + 80005ce8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x38f3f3cc530fcca2 + 80005cec: 00063283 ld x5,0(x12) + 80005cf0: 00860613 addi x12,x12,8 + +0000000080005cf4 : +Zkne_aes64es_cg_cmp_rd_rs2_b5: + aes64es x5, x31, x5 # perform operation + 80005cf4: 325f82b3 aes64es x5,x31,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zkne_aes64es_cg_cmp_rd_rs2_b5, Zkne_aes64es_cg_cmp_rd_rs2_b5_str) + 80005cf8: 00093383 ld x7,0(x18) + 80005cfc: 00538c63 beq x7,x5,80005d14 + 80005d00: 4180546f jal x8,8000b118 + 80005d04: 80005cf4 .word 0x80005cf4 + 80005d08: 00000000 .word 0x00000000 + 80005d0c: 8001c9de .word 0x8001c9de + 80005d10: 00000000 .word 0x00000000 + 80005d14: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x206b44b359e84f10 + 80005d18: 00063183 ld x3,0(x12) + 80005d1c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x36631838429c6404 + 80005d20: 00063303 ld x6,0(x12) + 80005d24: 00860613 addi x12,x12,8 + +0000000080005d28 : +Zkne_aes64es_cg_cmp_rd_rs2_b6: + aes64es x6, x3, x6 # perform operation + 80005d28: 32618333 aes64es x6,x3,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zkne_aes64es_cg_cmp_rd_rs2_b6, Zkne_aes64es_cg_cmp_rd_rs2_b6_str) + 80005d2c: 00093383 ld x7,0(x18) + 80005d30: 00638c63 beq x7,x6,80005d48 + 80005d34: 3e40546f jal x8,8000b118 + 80005d38: 80005d28 .word 0x80005d28 + 80005d3c: 00000000 .word 0x00000000 + 80005d40: 8001ca18 .word 0x8001ca18 + 80005d44: 00000000 .word 0x00000000 + 80005d48: 00890913 addi x18,x18,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80005d4c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005d50: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xbb74766f18a2de22 + 80005d54: 00063003 ld x0,0(x12) + 80005d58: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x0a6a0df7268e4f0c + 80005d5c: 00063383 ld x7,0(x12) + 80005d60: 00860613 addi x12,x12,8 + +0000000080005d64 : +Zkne_aes64es_cg_cmp_rd_rs2_b7: + aes64es x7, x0, x7 # perform operation + 80005d64: 327003b3 aes64es x7,x0,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zkne_aes64es_cg_cmp_rd_rs2_b7, Zkne_aes64es_cg_cmp_rd_rs2_b7_str) + 80005d68: 00093203 ld x4,0(x18) + 80005d6c: 00720c63 beq x4,x7,80005d84 + 80005d70: 390052ef jal x5,8000b100 + 80005d74: 80005d64 .word 0x80005d64 + 80005d78: 00000000 .word 0x00000000 + 80005d7c: 8001ca52 .word 0x8001ca52 + 80005d80: 00000000 .word 0x00000000 + 80005d84: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x97ef1f85e70205e4 + 80005d88: 00063383 ld x7,0(x12) + 80005d8c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x1f0431fbc091b655 + 80005d90: 00063403 ld x8,0(x12) + 80005d94: 00860613 addi x12,x12,8 + +0000000080005d98 : +Zkne_aes64es_cg_cmp_rd_rs2_b8: + aes64es x8, x7, x8 # perform operation + 80005d98: 32838433 aes64es x8,x7,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zkne_aes64es_cg_cmp_rd_rs2_b8, Zkne_aes64es_cg_cmp_rd_rs2_b8_str) + 80005d9c: 00093203 ld x4,0(x18) + 80005da0: 00820c63 beq x4,x8,80005db8 + 80005da4: 35c052ef jal x5,8000b100 + 80005da8: 80005d98 .word 0x80005d98 + 80005dac: 00000000 .word 0x00000000 + 80005db0: 8001ca8c .word 0x8001ca8c + 80005db4: 00000000 .word 0x00000000 + 80005db8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x518013a9ce3a1df5 + 80005dbc: 00063783 ld x15,0(x12) + 80005dc0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xa269c7645de158e7 + 80005dc4: 00063483 ld x9,0(x12) + 80005dc8: 00860613 addi x12,x12,8 + +0000000080005dcc : +Zkne_aes64es_cg_cmp_rd_rs2_b9: + aes64es x9, x15, x9 # perform operation + 80005dcc: 329784b3 aes64es x9,x15,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zkne_aes64es_cg_cmp_rd_rs2_b9, Zkne_aes64es_cg_cmp_rd_rs2_b9_str) + 80005dd0: 00093203 ld x4,0(x18) + 80005dd4: 00920c63 beq x4,x9,80005dec + 80005dd8: 328052ef jal x5,8000b100 + 80005ddc: 80005dcc .word 0x80005dcc + 80005de0: 00000000 .word 0x00000000 + 80005de4: 8001cac6 .word 0x8001cac6 + 80005de8: 00000000 .word 0x00000000 + 80005dec: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xeadc58f498b2ae0c + 80005df0: 00063783 ld x15,0(x12) + 80005df4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xadbe055b6f8f2601 + 80005df8: 00063503 ld x10,0(x12) + 80005dfc: 00860613 addi x12,x12,8 + +0000000080005e00 : +Zkne_aes64es_cg_cmp_rd_rs2_b10: + aes64es x10, x15, x10 # perform operation + 80005e00: 32a78533 aes64es x10,x15,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zkne_aes64es_cg_cmp_rd_rs2_b10, Zkne_aes64es_cg_cmp_rd_rs2_b10_str) + 80005e04: 00093203 ld x4,0(x18) + 80005e08: 00a20c63 beq x4,x10,80005e20 + 80005e0c: 2f4052ef jal x5,8000b100 + 80005e10: 80005e00 .word 0x80005e00 + 80005e14: 00000000 .word 0x00000000 + 80005e18: 8001cb00 .word 0x8001cb00 + 80005e1c: 00000000 .word 0x00000000 + 80005e20: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xf61f51925aacd294 + 80005e24: 00063183 ld x3,0(x12) + 80005e28: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xafbba55f704aa41d + 80005e2c: 00063583 ld x11,0(x12) + 80005e30: 00860613 addi x12,x12,8 + +0000000080005e34 : +Zkne_aes64es_cg_cmp_rd_rs2_b11: + aes64es x11, x3, x11 # perform operation + 80005e34: 32b185b3 aes64es x11,x3,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zkne_aes64es_cg_cmp_rd_rs2_b11, Zkne_aes64es_cg_cmp_rd_rs2_b11_str) + 80005e38: 00093203 ld x4,0(x18) + 80005e3c: 00b20c63 beq x4,x11,80005e54 + 80005e40: 2c0052ef jal x5,8000b100 + 80005e44: 80005e34 .word 0x80005e34 + 80005e48: 00000000 .word 0x00000000 + 80005e4c: 8001cb3b .word 0x8001cb3b + 80005e50: 00000000 .word 0x00000000 + 80005e54: 00890913 addi x18,x18,8 + + mv x30, x12 # switch data pointer register to avoid conflict with test + 80005e58: 00060f13 addi x30,x12,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x8) # load rs1: x8 = 0xffa6615cfda94c91 + 80005e5c: 000f3403 ld x8,0(x30) + 80005e60: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs2: x12 = 0x49869270cfa39a41 + 80005e64: 000f3603 ld x12,0(x30) + 80005e68: 008f0f13 addi x30,x30,8 + +0000000080005e6c : +Zkne_aes64es_cg_cmp_rd_rs2_b12: + aes64es x12, x8, x12 # perform operation + 80005e6c: 32c40633 aes64es x12,x8,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zkne_aes64es_cg_cmp_rd_rs2_b12, Zkne_aes64es_cg_cmp_rd_rs2_b12_str) + 80005e70: 00093203 ld x4,0(x18) + 80005e74: 00c20c63 beq x4,x12,80005e8c + 80005e78: 288052ef jal x5,8000b100 + 80005e7c: 80005e6c .word 0x80005e6c + 80005e80: 00000000 .word 0x00000000 + 80005e84: 8001cb76 .word 0x8001cb76 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x3) # load rs1: x3 = 0x19ab5f66a76af5fb + 80005e90: 000f3183 ld x3,0(x30) + 80005e94: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs2: x13 = 0x5e80a873bdd693f3 + 80005e98: 000f3683 ld x13,0(x30) + 80005e9c: 008f0f13 addi x30,x30,8 + +0000000080005ea0 : +Zkne_aes64es_cg_cmp_rd_rs2_b13: + aes64es x13, x3, x13 # perform operation + 80005ea0: 32d186b3 aes64es x13,x3,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zkne_aes64es_cg_cmp_rd_rs2_b13, Zkne_aes64es_cg_cmp_rd_rs2_b13_str) + 80005ea4: 00093203 ld x4,0(x18) + 80005ea8: 00d20c63 beq x4,x13,80005ec0 + 80005eac: 254052ef jal x5,8000b100 + 80005eb0: 80005ea0 .word 0x80005ea0 + 80005eb4: 00000000 .word 0x00000000 + 80005eb8: 8001cbb1 .word 0x8001cbb1 + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x13) # load rs1: x13 = 0x2478541464d9cdc1 + 80005ec4: 000f3683 ld x13,0(x30) + 80005ec8: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x14) # load rs2: x14 = 0x6372e0ae5309074c + 80005ecc: 000f3703 ld x14,0(x30) + 80005ed0: 008f0f13 addi x30,x30,8 + +0000000080005ed4 : +Zkne_aes64es_cg_cmp_rd_rs2_b14: + aes64es x14, x13, x14 # perform operation + 80005ed4: 32e68733 aes64es x14,x13,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zkne_aes64es_cg_cmp_rd_rs2_b14, Zkne_aes64es_cg_cmp_rd_rs2_b14_str) + 80005ed8: 00093203 ld x4,0(x18) + 80005edc: 00e20c63 beq x4,x14,80005ef4 + 80005ee0: 220052ef jal x5,8000b100 + 80005ee4: 80005ed4 .word 0x80005ed4 + 80005ee8: 00000000 .word 0x00000000 + 80005eec: 8001cbec .word 0x8001cbec + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x80f8a03465e43b95 + 80005ef8: 000f3883 ld x17,0(x30) + 80005efc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs2: x15 = 0xc662adae274799c2 + 80005f00: 000f3783 ld x15,0(x30) + 80005f04: 008f0f13 addi x30,x30,8 + +0000000080005f08 : +Zkne_aes64es_cg_cmp_rd_rs2_b15: + aes64es x15, x17, x15 # perform operation + 80005f08: 32f887b3 aes64es x15,x17,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zkne_aes64es_cg_cmp_rd_rs2_b15, Zkne_aes64es_cg_cmp_rd_rs2_b15_str) + 80005f0c: 00093203 ld x4,0(x18) + 80005f10: 00f20c63 beq x4,x15,80005f28 + 80005f14: 1ec052ef jal x5,8000b100 + 80005f18: 80005f08 .word 0x80005f08 + 80005f1c: 00000000 .word 0x00000000 + 80005f20: 8001cc27 .word 0x8001cc27 + 80005f24: 00000000 .word 0x00000000 + 80005f28: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x9) # load rs1: x9 = 0x15065e670c15863f + 80005f2c: 000f3483 ld x9,0(x30) + 80005f30: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x16) # load rs2: x16 = 0x2b4819e2f014c2bd + 80005f34: 000f3803 ld x16,0(x30) + 80005f38: 008f0f13 addi x30,x30,8 + +0000000080005f3c : +Zkne_aes64es_cg_cmp_rd_rs2_b16: + aes64es x16, x9, x16 # perform operation + 80005f3c: 33048833 aes64es x16,x9,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zkne_aes64es_cg_cmp_rd_rs2_b16, Zkne_aes64es_cg_cmp_rd_rs2_b16_str) + 80005f40: 00093203 ld x4,0(x18) + 80005f44: 01020c63 beq x4,x16,80005f5c + 80005f48: 1b8052ef jal x5,8000b100 + 80005f4c: 80005f3c .word 0x80005f3c + 80005f50: 00000000 .word 0x00000000 + 80005f54: 8001cc62 .word 0x8001cc62 + 80005f58: 00000000 .word 0x00000000 + 80005f5c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0xc5cd4ea62bf99268 + 80005f60: 000f3e83 ld x29,0(x30) + 80005f64: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs2: x17 = 0xa9e55767f59612ae + 80005f68: 000f3883 ld x17,0(x30) + 80005f6c: 008f0f13 addi x30,x30,8 + +0000000080005f70 : +Zkne_aes64es_cg_cmp_rd_rs2_b17: + aes64es x17, x29, x17 # perform operation + 80005f70: 331e88b3 aes64es x17,x29,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zkne_aes64es_cg_cmp_rd_rs2_b17, Zkne_aes64es_cg_cmp_rd_rs2_b17_str) + 80005f74: 00093203 ld x4,0(x18) + 80005f78: 01120c63 beq x4,x17,80005f90 + 80005f7c: 184052ef jal x5,8000b100 + 80005f80: 80005f70 .word 0x80005f70 + 80005f84: 00000000 .word 0x00000000 + 80005f88: 8001cc9d .word 0x8001cc9d + 80005f8c: 00000000 .word 0x00000000 + 80005f90: 00890913 addi x18,x18,8 + + mv x29, x18 # switch signature pointer register to avoid conflict with test + 80005f94: 00090e93 addi x29,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs1: x23 = 0x0bed29d05f2721e5 + 80005f98: 000f3b83 ld x23,0(x30) + 80005f9c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs2: x18 = 0x26c16a5ee415d280 + 80005fa0: 000f3903 ld x18,0(x30) + 80005fa4: 008f0f13 addi x30,x30,8 + +0000000080005fa8 : +Zkne_aes64es_cg_cmp_rd_rs2_b18: + aes64es x18, x23, x18 # perform operation + 80005fa8: 332b8933 aes64es x18,x23,x18 + # Check if x18 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x18, Zkne_aes64es_cg_cmp_rd_rs2_b18, Zkne_aes64es_cg_cmp_rd_rs2_b18_str) + 80005fac: 000eb203 ld x4,0(x29) + 80005fb0: 01220c63 beq x4,x18,80005fc8 + 80005fb4: 14c052ef jal x5,8000b100 + 80005fb8: 80005fa8 .word 0x80005fa8 + 80005fbc: 00000000 .word 0x00000000 + 80005fc0: 8001ccd8 .word 0x8001ccd8 + 80005fc4: 00000000 .word 0x00000000 + 80005fc8: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xb234ba1e84d4fbc1 + 80005fcc: 000f3e03 ld x28,0(x30) + 80005fd0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs2: x19 = 0x8e854b7501846f5c + 80005fd4: 000f3983 ld x19,0(x30) + 80005fd8: 008f0f13 addi x30,x30,8 + +0000000080005fdc : +Zkne_aes64es_cg_cmp_rd_rs2_b19: + aes64es x19, x28, x19 # perform operation + 80005fdc: 333e09b3 aes64es x19,x28,x19 + # Check if x19 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x19, Zkne_aes64es_cg_cmp_rd_rs2_b19, Zkne_aes64es_cg_cmp_rd_rs2_b19_str) + 80005fe0: 000eb203 ld x4,0(x29) + 80005fe4: 01320c63 beq x4,x19,80005ffc + 80005fe8: 118052ef jal x5,8000b100 + 80005fec: 80005fdc .word 0x80005fdc + 80005ff0: 00000000 .word 0x00000000 + 80005ff4: 8001cd13 .word 0x8001cd13 + 80005ff8: 00000000 .word 0x00000000 + 80005ffc: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x0bb2193b40ed166f + 80006000: 000f3d83 ld x27,0(x30) + 80006004: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs2: x20 = 0x385618eee7dad91c + 80006008: 000f3a03 ld x20,0(x30) + 8000600c: 008f0f13 addi x30,x30,8 + +0000000080006010 : +Zkne_aes64es_cg_cmp_rd_rs2_b20: + aes64es x20, x27, x20 # perform operation + 80006010: 334d8a33 aes64es x20,x27,x20 + # Check if x20 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x20, Zkne_aes64es_cg_cmp_rd_rs2_b20, Zkne_aes64es_cg_cmp_rd_rs2_b20_str) + 80006014: 000eb203 ld x4,0(x29) + 80006018: 01420c63 beq x4,x20,80006030 + 8000601c: 0e4052ef jal x5,8000b100 + 80006020: 80006010 .word 0x80006010 + 80006024: 00000000 .word 0x00000000 + 80006028: 8001cd4e .word 0x8001cd4e + 8000602c: 00000000 .word 0x00000000 + 80006030: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0xaeb8d4814642a3fb + 80006034: 000f3d03 ld x26,0(x30) + 80006038: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x21) # load rs2: x21 = 0xb089bb9cdf4e8359 + 8000603c: 000f3a83 ld x21,0(x30) + 80006040: 008f0f13 addi x30,x30,8 + +0000000080006044 : +Zkne_aes64es_cg_cmp_rd_rs2_b21: + aes64es x21, x26, x21 # perform operation + 80006044: 335d0ab3 aes64es x21,x26,x21 + # Check if x21 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x21, Zkne_aes64es_cg_cmp_rd_rs2_b21, Zkne_aes64es_cg_cmp_rd_rs2_b21_str) + 80006048: 000eb203 ld x4,0(x29) + 8000604c: 01520c63 beq x4,x21,80006064 + 80006050: 0b0052ef jal x5,8000b100 + 80006054: 80006044 .word 0x80006044 + 80006058: 00000000 .word 0x00000000 + 8000605c: 8001cd89 .word 0x8001cd89 + 80006060: 00000000 .word 0x00000000 + 80006064: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x1442b6a00d3234bb + 80006068: 000f3a03 ld x20,0(x30) + 8000606c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x22) # load rs2: x22 = 0x06c3166db7df16e2 + 80006070: 000f3b03 ld x22,0(x30) + 80006074: 008f0f13 addi x30,x30,8 + +0000000080006078 : +Zkne_aes64es_cg_cmp_rd_rs2_b22: + aes64es x22, x20, x22 # perform operation + 80006078: 336a0b33 aes64es x22,x20,x22 + # Check if x22 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x22, Zkne_aes64es_cg_cmp_rd_rs2_b22, Zkne_aes64es_cg_cmp_rd_rs2_b22_str) + 8000607c: 000eb203 ld x4,0(x29) + 80006080: 01620c63 beq x4,x22,80006098 + 80006084: 07c052ef jal x5,8000b100 + 80006088: 80006078 .word 0x80006078 + 8000608c: 00000000 .word 0x00000000 + 80006090: 8001cdc4 .word 0x8001cdc4 + 80006094: 00000000 .word 0x00000000 + 80006098: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x5db151477d30a716 + 8000609c: 000f3d03 ld x26,0(x30) + 800060a0: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x23) # load rs2: x23 = 0xc9e60a57ce2c89de + 800060a4: 000f3b83 ld x23,0(x30) + 800060a8: 008f0f13 addi x30,x30,8 + +00000000800060ac : +Zkne_aes64es_cg_cmp_rd_rs2_b23: + aes64es x23, x26, x23 # perform operation + 800060ac: 337d0bb3 aes64es x23,x26,x23 + # Check if x23 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x23, Zkne_aes64es_cg_cmp_rd_rs2_b23, Zkne_aes64es_cg_cmp_rd_rs2_b23_str) + 800060b0: 000eb203 ld x4,0(x29) + 800060b4: 01720c63 beq x4,x23,800060cc + 800060b8: 048052ef jal x5,8000b100 + 800060bc: 800060ac .word 0x800060ac + 800060c0: 00000000 .word 0x00000000 + 800060c4: 8001cdff .word 0x8001cdff + 800060c8: 00000000 .word 0x00000000 + 800060cc: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x15) # load rs1: x15 = 0xad479a59bd3ca91d + 800060d0: 000f3783 ld x15,0(x30) + 800060d4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs2: x24 = 0xa5100ba7f18d121b + 800060d8: 000f3c03 ld x24,0(x30) + 800060dc: 008f0f13 addi x30,x30,8 + +00000000800060e0 : +Zkne_aes64es_cg_cmp_rd_rs2_b24: + aes64es x24, x15, x24 # perform operation + 800060e0: 33878c33 aes64es x24,x15,x24 + # Check if x24 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x24, Zkne_aes64es_cg_cmp_rd_rs2_b24, Zkne_aes64es_cg_cmp_rd_rs2_b24_str) + 800060e4: 000eb203 ld x4,0(x29) + 800060e8: 01820c63 beq x4,x24,80006100 + 800060ec: 014052ef jal x5,8000b100 + 800060f0: 800060e0 .word 0x800060e0 + 800060f4: 00000000 .word 0x00000000 + 800060f8: 8001ce3a .word 0x8001ce3a + 800060fc: 00000000 .word 0x00000000 + 80006100: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x6fd5a6f575d57b0b + 80006104: 000f3a03 ld x20,0(x30) + 80006108: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs2: x25 = 0x20097635d50e4d64 + 8000610c: 000f3c83 ld x25,0(x30) + 80006110: 008f0f13 addi x30,x30,8 + +0000000080006114 : +Zkne_aes64es_cg_cmp_rd_rs2_b25: + aes64es x25, x20, x25 # perform operation + 80006114: 339a0cb3 aes64es x25,x20,x25 + # Check if x25 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x25, Zkne_aes64es_cg_cmp_rd_rs2_b25, Zkne_aes64es_cg_cmp_rd_rs2_b25_str) + 80006118: 000eb203 ld x4,0(x29) + 8000611c: 01920c63 beq x4,x25,80006134 + 80006120: 7e1042ef jal x5,8000b100 + 80006124: 80006114 .word 0x80006114 + 80006128: 00000000 .word 0x00000000 + 8000612c: 8001ce75 .word 0x8001ce75 + 80006130: 00000000 .word 0x00000000 + 80006134: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x11) # load rs1: x11 = 0x305faaa3e507685d + 80006138: 000f3583 ld x11,0(x30) + 8000613c: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs2: x26 = 0x40222b249609ac0b + 80006140: 000f3d03 ld x26,0(x30) + 80006144: 008f0f13 addi x30,x30,8 + +0000000080006148 : +Zkne_aes64es_cg_cmp_rd_rs2_b26: + aes64es x26, x11, x26 # perform operation + 80006148: 33a58d33 aes64es x26,x11,x26 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes64es_cg_cmp_rd_rs2_b26, Zkne_aes64es_cg_cmp_rd_rs2_b26_str) + 8000614c: 000eb203 ld x4,0(x29) + 80006150: 01a20c63 beq x4,x26,80006168 + 80006154: 7ad042ef jal x5,8000b100 + 80006158: 80006148 .word 0x80006148 + 8000615c: 00000000 .word 0x00000000 + 80006160: 8001ceb0 .word 0x8001ceb0 + 80006164: 00000000 .word 0x00000000 + 80006168: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x0bc622c40137dbe8 + 8000616c: 000f3503 ld x10,0(x30) + 80006170: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs2: x27 = 0x05c4cc95da50f5ab + 80006174: 000f3d83 ld x27,0(x30) + 80006178: 008f0f13 addi x30,x30,8 + +000000008000617c : +Zkne_aes64es_cg_cmp_rd_rs2_b27: + aes64es x27, x10, x27 # perform operation + 8000617c: 33b50db3 aes64es x27,x10,x27 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes64es_cg_cmp_rd_rs2_b27, Zkne_aes64es_cg_cmp_rd_rs2_b27_str) + 80006180: 000eb203 ld x4,0(x29) + 80006184: 01b20c63 beq x4,x27,8000619c + 80006188: 779042ef jal x5,8000b100 + 8000618c: 8000617c .word 0x8000617c + 80006190: 00000000 .word 0x00000000 + 80006194: 8001ceeb .word 0x8001ceeb + 80006198: 00000000 .word 0x00000000 + 8000619c: 008e8e93 addi x29,x29,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0xddc6b4193db55b1b + 800061a0: 000f3303 ld x6,0(x30) + 800061a4: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs2: x28 = 0xc0f2f1d8671d2c69 + 800061a8: 000f3e03 ld x28,0(x30) + 800061ac: 008f0f13 addi x30,x30,8 + +00000000800061b0 : +Zkne_aes64es_cg_cmp_rd_rs2_b28: + aes64es x28, x6, x28 # perform operation + 800061b0: 33c30e33 aes64es x28,x6,x28 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zkne_aes64es_cg_cmp_rd_rs2_b28, Zkne_aes64es_cg_cmp_rd_rs2_b28_str) + 800061b4: 000eb203 ld x4,0(x29) + 800061b8: 01c20c63 beq x4,x28,800061d0 + 800061bc: 745042ef jal x5,8000b100 + 800061c0: 800061b0 .word 0x800061b0 + 800061c4: 00000000 .word 0x00000000 + 800061c8: 8001cf26 .word 0x8001cf26 + 800061cc: 00000000 .word 0x00000000 + 800061d0: 008e8e93 addi x29,x29,8 + + mv x16, x29 # switch signature pointer register to avoid conflict with test + 800061d4: 000e8813 addi x16,x29,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x0e76f56109c2ca24 + 800061d8: 000f3883 ld x17,0(x30) + 800061dc: 008f0f13 addi x30,x30,8 + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs2: x29 = 0xc10170bfeac68891 + 800061e0: 000f3e83 ld x29,0(x30) + 800061e4: 008f0f13 addi x30,x30,8 + +00000000800061e8 : +Zkne_aes64es_cg_cmp_rd_rs2_b29: + aes64es x29, x17, x29 # perform operation + 800061e8: 33d88eb3 aes64es x29,x17,x29 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cmp_rd_rs2_b29, Zkne_aes64es_cg_cmp_rd_rs2_b29_str) + 800061ec: 00083203 ld x4,0(x16) + 800061f0: 01d20c63 beq x4,x29,80006208 + 800061f4: 70d042ef jal x5,8000b100 + 800061f8: 800061e8 .word 0x800061e8 + 800061fc: 00000000 .word 0x00000000 + 80006200: 8001cf61 .word 0x8001cf61 + 80006204: 00000000 .word 0x00000000 + 80006208: 00880813 addi x16,x16,8 + + mv x27, x30 # switch data pointer register to avoid conflict with test + 8000620c: 000f0d93 addi x27,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x7ac68820bf7cbb2a + 80006210: 000dba03 ld x20,0(x27) + 80006214: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs2: x30 = 0x617b82f6b37939ba + 80006218: 000dbf03 ld x30,0(x27) + 8000621c: 008d8d93 addi x27,x27,8 + +0000000080006220 : +Zkne_aes64es_cg_cmp_rd_rs2_b30: + aes64es x30, x20, x30 # perform operation + 80006220: 33ea0f33 aes64es x30,x20,x30 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cmp_rd_rs2_b30, Zkne_aes64es_cg_cmp_rd_rs2_b30_str) + 80006224: 00083203 ld x4,0(x16) + 80006228: 01e20c63 beq x4,x30,80006240 + 8000622c: 6d5042ef jal x5,8000b100 + 80006230: 80006220 .word 0x80006220 + 80006234: 00000000 .word 0x00000000 + 80006238: 8001cf9c .word 0x8001cf9c + 8000623c: 00000000 .word 0x00000000 + 80006240: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0x65921678e7126fd8 + 80006244: 000dbb83 ld x23,0(x27) + 80006248: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs2: x31 = 0x583436fba1488113 + 8000624c: 000dbf83 ld x31,0(x27) + 80006250: 008d8d93 addi x27,x27,8 + +0000000080006254 : +Zkne_aes64es_cg_cmp_rd_rs2_b31: + aes64es x31, x23, x31 # perform operation + 80006254: 33fb8fb3 aes64es x31,x23,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cmp_rd_rs2_b31, Zkne_aes64es_cg_cmp_rd_rs2_b31_str) + 80006258: 00083203 ld x4,0(x16) + 8000625c: 01f20c63 beq x4,x31,80006274 + 80006260: 6a1042ef jal x5,8000b100 + 80006264: 80006254 .word 0x80006254 + 80006268: 00000000 .word 0x00000000 + 8000626c: 8001cfd7 .word 0x8001cfd7 + 80006270: 00000000 .word 0x00000000 + 80006274: 00880813 addi x16,x16,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs1: x0 = 0xaa224e32dea5a882 + 80006278: 000db003 ld x0,0(x27) + 8000627c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0x9918649a3114a637 + 80006280: 000db003 ld x0,0(x27) + 80006284: 008d8d93 addi x27,x27,8 + +0000000080006288 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b0: + aes64es x0, x0, x0 # perform operation + 80006288: 32000033 aes64es x0,x0,x0 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b0, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b0_str) + 8000628c: 00083203 ld x4,0(x16) + 80006290: 00020c63 beq x4,x0,800062a8 + 80006294: 66d042ef jal x5,8000b100 + 80006298: 80006288 .word 0x80006288 + 8000629c: 00000000 .word 0x00000000 + 800062a0: 8001d012 .word 0x8001d012 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs1: x1 = 0x609db5948137dd7b + 800062ac: 000db083 ld x1,0(x27) + 800062b0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0xfb6139c896a47496 + 800062b4: 000db083 ld x1,0(x27) + 800062b8: 008d8d93 addi x27,x27,8 + +00000000800062bc : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b1: + aes64es x1, x1, x1 # perform operation + 800062bc: 321080b3 aes64es x1,x1,x1 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b1, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b1_str) + 800062c0: 00083203 ld x4,0(x16) + 800062c4: 00120c63 beq x4,x1,800062dc + 800062c8: 639042ef jal x5,8000b100 + 800062cc: 800062bc .word 0x800062bc + 800062d0: 00000000 .word 0x00000000 + 800062d4: 8001d050 .word 0x8001d050 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0xe6099098cf865367 + 800062e0: 000db103 ld x2,0(x27) + 800062e4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0x85e7bd200dbe171a + 800062e8: 000db103 ld x2,0(x27) + 800062ec: 008d8d93 addi x27,x27,8 + +00000000800062f0 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b2: + aes64es x2, x2, x2 # perform operation + 800062f0: 32210133 aes64es x2,x2,x2 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b2, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b2_str) + 800062f4: 00083203 ld x4,0(x16) + 800062f8: 00220c63 beq x4,x2,80006310 + 800062fc: 605042ef jal x5,8000b100 + 80006300: 800062f0 .word 0x800062f0 + 80006304: 00000000 .word 0x00000000 + 80006308: 8001d08e .word 0x8001d08e + 8000630c: 00000000 .word 0x00000000 + 80006310: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0xef824e4d784e29ca + 80006314: 000db183 ld x3,0(x27) + 80006318: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0xc774d73f79922821 + 8000631c: 000db183 ld x3,0(x27) + 80006320: 008d8d93 addi x27,x27,8 + +0000000080006324 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b3: + aes64es x3, x3, x3 # perform operation + 80006324: 323181b3 aes64es x3,x3,x3 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b3, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b3_str) + 80006328: 00083203 ld x4,0(x16) + 8000632c: 00320c63 beq x4,x3,80006344 + 80006330: 5d1042ef jal x5,8000b100 + 80006334: 80006324 .word 0x80006324 + 80006338: 00000000 .word 0x00000000 + 8000633c: 8001d0cc .word 0x8001d0cc + 80006340: 00000000 .word 0x00000000 + 80006344: 00880813 addi x16,x16,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006348: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000634c: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs1: x4 = 0xe6f0165a587f873e + 80006350: 000db203 ld x4,0(x27) + 80006354: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs2: x4 = 0xbcb3d3d342a27364 + 80006358: 000db203 ld x4,0(x27) + 8000635c: 008d8d93 addi x27,x27,8 + +0000000080006360 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b4: + aes64es x4, x4, x4 # perform operation + 80006360: 32420233 aes64es x4,x4,x4 + # Check if x4 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x4, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b4, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b4_str) + 80006364: 00083683 ld x13,0(x16) + 80006368: 00468c63 beq x13,x4,80006380 + 8000636c: 5d50476f jal x14,8000b140 + 80006370: 80006360 .word 0x80006360 + 80006374: 00000000 .word 0x00000000 + 80006378: 8001d10a .word 0x8001d10a + 8000637c: 00000000 .word 0x00000000 + 80006380: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0x6be73b12301f8d46 + 80006384: 000db283 ld x5,0(x27) + 80006388: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0xbc024b4659beab49 + 8000638c: 000db283 ld x5,0(x27) + 80006390: 008d8d93 addi x27,x27,8 + +0000000080006394 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b5: + aes64es x5, x5, x5 # perform operation + 80006394: 325282b3 aes64es x5,x5,x5 + # Check if x5 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x5, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b5, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b5_str) + 80006398: 00083683 ld x13,0(x16) + 8000639c: 00568c63 beq x13,x5,800063b4 + 800063a0: 5a10476f jal x14,8000b140 + 800063a4: 80006394 .word 0x80006394 + 800063a8: 00000000 .word 0x00000000 + 800063ac: 8001d148 .word 0x8001d148 + 800063b0: 00000000 .word 0x00000000 + 800063b4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0x6c9c47c9f14211d0 + 800063b8: 000db303 ld x6,0(x27) + 800063bc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0xf7733cb8703fc8ce + 800063c0: 000db303 ld x6,0(x27) + 800063c4: 008d8d93 addi x27,x27,8 + +00000000800063c8 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b6: + aes64es x6, x6, x6 # perform operation + 800063c8: 32630333 aes64es x6,x6,x6 + # Check if x6 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x6, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b6, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b6_str) + 800063cc: 00083683 ld x13,0(x16) + 800063d0: 00668c63 beq x13,x6,800063e8 + 800063d4: 56d0476f jal x14,8000b140 + 800063d8: 800063c8 .word 0x800063c8 + 800063dc: 00000000 .word 0x00000000 + 800063e0: 8001d186 .word 0x8001d186 + 800063e4: 00000000 .word 0x00000000 + 800063e8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0x21f2bf9f003b8554 + 800063ec: 000db383 ld x7,0(x27) + 800063f0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs2: x7 = 0x9e55ed6ff82e4191 + 800063f4: 000db383 ld x7,0(x27) + 800063f8: 008d8d93 addi x27,x27,8 + +00000000800063fc : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b7: + aes64es x7, x7, x7 # perform operation + 800063fc: 327383b3 aes64es x7,x7,x7 + # Check if x7 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x7, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b7, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b7_str) + 80006400: 00083683 ld x13,0(x16) + 80006404: 00768c63 beq x13,x7,8000641c + 80006408: 5390476f jal x14,8000b140 + 8000640c: 800063fc .word 0x800063fc + 80006410: 00000000 .word 0x00000000 + 80006414: 8001d1c4 .word 0x8001d1c4 + 80006418: 00000000 .word 0x00000000 + 8000641c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x13386a9da6c09b19 + 80006420: 000db403 ld x8,0(x27) + 80006424: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0x1248071044319f61 + 80006428: 000db403 ld x8,0(x27) + 8000642c: 008d8d93 addi x27,x27,8 + +0000000080006430 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b8: + aes64es x8, x8, x8 # perform operation + 80006430: 32840433 aes64es x8,x8,x8 + # Check if x8 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x8, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b8, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b8_str) + 80006434: 00083683 ld x13,0(x16) + 80006438: 00868c63 beq x13,x8,80006450 + 8000643c: 5050476f jal x14,8000b140 + 80006440: 80006430 .word 0x80006430 + 80006444: 00000000 .word 0x00000000 + 80006448: 8001d202 .word 0x8001d202 + 8000644c: 00000000 .word 0x00000000 + 80006450: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x1be16b632d933531 + 80006454: 000db483 ld x9,0(x27) + 80006458: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xdea90611cfdb0a03 + 8000645c: 000db483 ld x9,0(x27) + 80006460: 008d8d93 addi x27,x27,8 + +0000000080006464 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b9: + aes64es x9, x9, x9 # perform operation + 80006464: 329484b3 aes64es x9,x9,x9 + # Check if x9 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x9, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b9, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b9_str) + 80006468: 00083683 ld x13,0(x16) + 8000646c: 00968c63 beq x13,x9,80006484 + 80006470: 4d10476f jal x14,8000b140 + 80006474: 80006464 .word 0x80006464 + 80006478: 00000000 .word 0x00000000 + 8000647c: 8001d240 .word 0x8001d240 + 80006480: 00000000 .word 0x00000000 + 80006484: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x13dcc2e5719943ff + 80006488: 000db503 ld x10,0(x27) + 8000648c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0xd6ae0b9fdbcee785 + 80006490: 000db503 ld x10,0(x27) + 80006494: 008d8d93 addi x27,x27,8 + +0000000080006498 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b10: + aes64es x10, x10, x10 # perform operation + 80006498: 32a50533 aes64es x10,x10,x10 + # Check if x10 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x10, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b10, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b10_str) + 8000649c: 00083683 ld x13,0(x16) + 800064a0: 00a68c63 beq x13,x10,800064b8 + 800064a4: 49d0476f jal x14,8000b140 + 800064a8: 80006498 .word 0x80006498 + 800064ac: 00000000 .word 0x00000000 + 800064b0: 8001d27e .word 0x8001d27e + 800064b4: 00000000 .word 0x00000000 + 800064b8: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x8210c03d925cb488 + 800064bc: 000db583 ld x11,0(x27) + 800064c0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0xdb5106501d87bf4f + 800064c4: 000db583 ld x11,0(x27) + 800064c8: 008d8d93 addi x27,x27,8 + +00000000800064cc : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b11: + aes64es x11, x11, x11 # perform operation + 800064cc: 32b585b3 aes64es x11,x11,x11 + # Check if x11 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x11, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b11, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b11_str) + 800064d0: 00083683 ld x13,0(x16) + 800064d4: 00b68c63 beq x13,x11,800064ec + 800064d8: 4690476f jal x14,8000b140 + 800064dc: 800064cc .word 0x800064cc + 800064e0: 00000000 .word 0x00000000 + 800064e4: 8001d2bd .word 0x8001d2bd + 800064e8: 00000000 .word 0x00000000 + 800064ec: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0xb63b77ca53146251 + 800064f0: 000db603 ld x12,0(x27) + 800064f4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0x32c3ac35a47169a4 + 800064f8: 000db603 ld x12,0(x27) + 800064fc: 008d8d93 addi x27,x27,8 + +0000000080006500 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b12: + aes64es x12, x12, x12 # perform operation + 80006500: 32c60633 aes64es x12,x12,x12 + # Check if x12 contains the expected result. x16 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x16, x14, x13, x12, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b12, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b12_str) + 80006504: 00083683 ld x13,0(x16) + 80006508: 00c68c63 beq x13,x12,80006520 + 8000650c: 4350476f jal x14,8000b140 + 80006510: 80006500 .word 0x80006500 + 80006514: 00000000 .word 0x00000000 + 80006518: 8001d2fc .word 0x8001d2fc + 8000651c: 00000000 .word 0x00000000 + 80006520: 00880813 addi x16,x16,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80006524: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80006528: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x29839ff6a702bc99 + 8000652c: 000db683 ld x13,0(x27) + 80006530: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0x6b5da8392191cf27 + 80006534: 000db683 ld x13,0(x27) + 80006538: 008d8d93 addi x27,x27,8 + +000000008000653c : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b13: + aes64es x13, x13, x13 # perform operation + 8000653c: 32d686b3 aes64es x13,x13,x13 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b13, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b13_str) + 80006540: 00083203 ld x4,0(x16) + 80006544: 00d20c63 beq x4,x13,8000655c + 80006548: 3b9042ef jal x5,8000b100 + 8000654c: 8000653c .word 0x8000653c + 80006550: 00000000 .word 0x00000000 + 80006554: 8001d33b .word 0x8001d33b + 80006558: 00000000 .word 0x00000000 + 8000655c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x5815670ee3cc7225 + 80006560: 000db703 ld x14,0(x27) + 80006564: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x2fc71de264a46f41 + 80006568: 000db703 ld x14,0(x27) + 8000656c: 008d8d93 addi x27,x27,8 + +0000000080006570 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b14: + aes64es x14, x14, x14 # perform operation + 80006570: 32e70733 aes64es x14,x14,x14 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b14, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b14_str) + 80006574: 00083203 ld x4,0(x16) + 80006578: 00e20c63 beq x4,x14,80006590 + 8000657c: 385042ef jal x5,8000b100 + 80006580: 80006570 .word 0x80006570 + 80006584: 00000000 .word 0x00000000 + 80006588: 8001d37a .word 0x8001d37a + 8000658c: 00000000 .word 0x00000000 + 80006590: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0xf32a3ad995f45e5a + 80006594: 000db783 ld x15,0(x27) + 80006598: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x2bce165583e3b104 + 8000659c: 000db783 ld x15,0(x27) + 800065a0: 008d8d93 addi x27,x27,8 + +00000000800065a4 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b15: + aes64es x15, x15, x15 # perform operation + 800065a4: 32f787b3 aes64es x15,x15,x15 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b15, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b15_str) + 800065a8: 00083203 ld x4,0(x16) + 800065ac: 00f20c63 beq x4,x15,800065c4 + 800065b0: 351042ef jal x5,8000b100 + 800065b4: 800065a4 .word 0x800065a4 + 800065b8: 00000000 .word 0x00000000 + 800065bc: 8001d3b9 .word 0x8001d3b9 + 800065c0: 00000000 .word 0x00000000 + 800065c4: 00880813 addi x16,x16,8 + + mv x17, x16 # switch signature pointer register to avoid conflict with test + 800065c8: 00080893 addi x17,x16,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x7128352d2065d983 + 800065cc: 000db803 ld x16,0(x27) + 800065d0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0x10b5f84715a21462 + 800065d4: 000db803 ld x16,0(x27) + 800065d8: 008d8d93 addi x27,x27,8 + +00000000800065dc : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b16: + aes64es x16, x16, x16 # perform operation + 800065dc: 33080833 aes64es x16,x16,x16 + # Check if x16 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x16, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b16, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b16_str) + 800065e0: 0008b203 ld x4,0(x17) + 800065e4: 01020c63 beq x4,x16,800065fc + 800065e8: 319042ef jal x5,8000b100 + 800065ec: 800065dc .word 0x800065dc + 800065f0: 00000000 .word 0x00000000 + 800065f4: 8001d3f8 .word 0x8001d3f8 + 800065f8: 00000000 .word 0x00000000 + 800065fc: 00888893 addi x17,x17,8 + + mv x28, x17 # switch signature pointer register to avoid conflict with test + 80006600: 00088e13 addi x28,x17,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xd366ae21fb8750c1 + 80006604: 000db883 ld x17,0(x27) + 80006608: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x29113721a7072bfa + 8000660c: 000db883 ld x17,0(x27) + 80006610: 008d8d93 addi x27,x27,8 + +0000000080006614 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b17: + aes64es x17, x17, x17 # perform operation + 80006614: 331888b3 aes64es x17,x17,x17 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b17, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b17_str) + 80006618: 000e3203 ld x4,0(x28) + 8000661c: 01120c63 beq x4,x17,80006634 + 80006620: 2e1042ef jal x5,8000b100 + 80006624: 80006614 .word 0x80006614 + 80006628: 00000000 .word 0x00000000 + 8000662c: 8001d437 .word 0x8001d437 + 80006630: 00000000 .word 0x00000000 + 80006634: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x60c4eb7289372ec4 + 80006638: 000db903 ld x18,0(x27) + 8000663c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0xd53a7cbb6127789e + 80006640: 000db903 ld x18,0(x27) + 80006644: 008d8d93 addi x27,x27,8 + +0000000080006648 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b18: + aes64es x18, x18, x18 # perform operation + 80006648: 33290933 aes64es x18,x18,x18 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b18, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b18_str) + 8000664c: 000e3203 ld x4,0(x28) + 80006650: 01220c63 beq x4,x18,80006668 + 80006654: 2ad042ef jal x5,8000b100 + 80006658: 80006648 .word 0x80006648 + 8000665c: 00000000 .word 0x00000000 + 80006660: 8001d476 .word 0x8001d476 + 80006664: 00000000 .word 0x00000000 + 80006668: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x4513c1dcc4cd9015 + 8000666c: 000db983 ld x19,0(x27) + 80006670: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0x622e67090210826e + 80006674: 000db983 ld x19,0(x27) + 80006678: 008d8d93 addi x27,x27,8 + +000000008000667c : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b19: + aes64es x19, x19, x19 # perform operation + 8000667c: 333989b3 aes64es x19,x19,x19 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b19, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b19_str) + 80006680: 000e3203 ld x4,0(x28) + 80006684: 01320c63 beq x4,x19,8000669c + 80006688: 279042ef jal x5,8000b100 + 8000668c: 8000667c .word 0x8000667c + 80006690: 00000000 .word 0x00000000 + 80006694: 8001d4b5 .word 0x8001d4b5 + 80006698: 00000000 .word 0x00000000 + 8000669c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0x30a3838be22ef96c + 800066a0: 000dba03 ld x20,0(x27) + 800066a4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0xe1d4b808ee3215cd + 800066a8: 000dba03 ld x20,0(x27) + 800066ac: 008d8d93 addi x27,x27,8 + +00000000800066b0 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b20: + aes64es x20, x20, x20 # perform operation + 800066b0: 334a0a33 aes64es x20,x20,x20 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b20, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b20_str) + 800066b4: 000e3203 ld x4,0(x28) + 800066b8: 01420c63 beq x4,x20,800066d0 + 800066bc: 245042ef jal x5,8000b100 + 800066c0: 800066b0 .word 0x800066b0 + 800066c4: 00000000 .word 0x00000000 + 800066c8: 8001d4f4 .word 0x8001d4f4 + 800066cc: 00000000 .word 0x00000000 + 800066d0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x2e3f51e09b89b527 + 800066d4: 000dba83 ld x21,0(x27) + 800066d8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0x404321ed45bdd856 + 800066dc: 000dba83 ld x21,0(x27) + 800066e0: 008d8d93 addi x27,x27,8 + +00000000800066e4 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b21: + aes64es x21, x21, x21 # perform operation + 800066e4: 335a8ab3 aes64es x21,x21,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b21, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b21_str) + 800066e8: 000e3203 ld x4,0(x28) + 800066ec: 01520c63 beq x4,x21,80006704 + 800066f0: 211042ef jal x5,8000b100 + 800066f4: 800066e4 .word 0x800066e4 + 800066f8: 00000000 .word 0x00000000 + 800066fc: 8001d533 .word 0x8001d533 + 80006700: 00000000 .word 0x00000000 + 80006704: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x22bb377ef1f79f6e + 80006708: 000dbb03 ld x22,0(x27) + 8000670c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x35a88a6b093b47f2 + 80006710: 000dbb03 ld x22,0(x27) + 80006714: 008d8d93 addi x27,x27,8 + +0000000080006718 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b22: + aes64es x22, x22, x22 # perform operation + 80006718: 336b0b33 aes64es x22,x22,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b22, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b22_str) + 8000671c: 000e3203 ld x4,0(x28) + 80006720: 01620c63 beq x4,x22,80006738 + 80006724: 1dd042ef jal x5,8000b100 + 80006728: 80006718 .word 0x80006718 + 8000672c: 00000000 .word 0x00000000 + 80006730: 8001d572 .word 0x8001d572 + 80006734: 00000000 .word 0x00000000 + 80006738: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xbd83c206d39a2b9f + 8000673c: 000dbb83 ld x23,0(x27) + 80006740: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x0d75bc66e83c1d7c + 80006744: 000dbb83 ld x23,0(x27) + 80006748: 008d8d93 addi x27,x27,8 + +000000008000674c : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b23: + aes64es x23, x23, x23 # perform operation + 8000674c: 337b8bb3 aes64es x23,x23,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b23, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b23_str) + 80006750: 000e3203 ld x4,0(x28) + 80006754: 01720c63 beq x4,x23,8000676c + 80006758: 1a9042ef jal x5,8000b100 + 8000675c: 8000674c .word 0x8000674c + 80006760: 00000000 .word 0x00000000 + 80006764: 8001d5b1 .word 0x8001d5b1 + 80006768: 00000000 .word 0x00000000 + 8000676c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x85368b0802a722c0 + 80006770: 000dbc03 ld x24,0(x27) + 80006774: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0xeaf81c71d0ed2ec2 + 80006778: 000dbc03 ld x24,0(x27) + 8000677c: 008d8d93 addi x27,x27,8 + +0000000080006780 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b24: + aes64es x24, x24, x24 # perform operation + 80006780: 338c0c33 aes64es x24,x24,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b24, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b24_str) + 80006784: 000e3203 ld x4,0(x28) + 80006788: 01820c63 beq x4,x24,800067a0 + 8000678c: 175042ef jal x5,8000b100 + 80006790: 80006780 .word 0x80006780 + 80006794: 00000000 .word 0x00000000 + 80006798: 8001d5f0 .word 0x8001d5f0 + 8000679c: 00000000 .word 0x00000000 + 800067a0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x1f5bcad7e30c508f + 800067a4: 000dbc83 ld x25,0(x27) + 800067a8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x231f162f004fdfef + 800067ac: 000dbc83 ld x25,0(x27) + 800067b0: 008d8d93 addi x27,x27,8 + +00000000800067b4 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b25: + aes64es x25, x25, x25 # perform operation + 800067b4: 339c8cb3 aes64es x25,x25,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b25, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b25_str) + 800067b8: 000e3203 ld x4,0(x28) + 800067bc: 01920c63 beq x4,x25,800067d4 + 800067c0: 141042ef jal x5,8000b100 + 800067c4: 800067b4 .word 0x800067b4 + 800067c8: 00000000 .word 0x00000000 + 800067cc: 8001d62f .word 0x8001d62f + 800067d0: 00000000 .word 0x00000000 + 800067d4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x3cba00f66e105f03 + 800067d8: 000dbd03 ld x26,0(x27) + 800067dc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0xb4799b5296a44730 + 800067e0: 000dbd03 ld x26,0(x27) + 800067e4: 008d8d93 addi x27,x27,8 + +00000000800067e8 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b26: + aes64es x26, x26, x26 # perform operation + 800067e8: 33ad0d33 aes64es x26,x26,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b26, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b26_str) + 800067ec: 000e3203 ld x4,0(x28) + 800067f0: 01a20c63 beq x4,x26,80006808 + 800067f4: 10d042ef jal x5,8000b100 + 800067f8: 800067e8 .word 0x800067e8 + 800067fc: 00000000 .word 0x00000000 + 80006800: 8001d66e .word 0x8001d66e + 80006804: 00000000 .word 0x00000000 + 80006808: 008e0e13 addi x28,x28,8 + + mv x25, x27 # switch data pointer register to avoid conflict with test + 8000680c: 000d8c93 addi x25,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xae18d17c86cad5be + 80006810: 000cbd83 ld x27,0(x25) + 80006814: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x30ff4aaa49dbe321 + 80006818: 000cbd83 ld x27,0(x25) + 8000681c: 008c8c93 addi x25,x25,8 + +0000000080006820 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b27: + aes64es x27, x27, x27 # perform operation + 80006820: 33bd8db3 aes64es x27,x27,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b27, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b27_str) + 80006824: 000e3203 ld x4,0(x28) + 80006828: 01b20c63 beq x4,x27,80006840 + 8000682c: 0d5042ef jal x5,8000b100 + 80006830: 80006820 .word 0x80006820 + 80006834: 00000000 .word 0x00000000 + 80006838: 8001d6ad .word 0x8001d6ad + 8000683c: 00000000 .word 0x00000000 + 80006840: 008e0e13 addi x28,x28,8 + + mv x16, x28 # switch signature pointer register to avoid conflict with test + 80006844: 000e0813 addi x16,x28,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xa05be674368d11a3 + 80006848: 000cbe03 ld x28,0(x25) + 8000684c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0x7fe3a138e4288b06 + 80006850: 000cbe03 ld x28,0(x25) + 80006854: 008c8c93 addi x25,x25,8 + +0000000080006858 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b28: + aes64es x28, x28, x28 # perform operation + 80006858: 33ce0e33 aes64es x28,x28,x28 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b28, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b28_str) + 8000685c: 00083203 ld x4,0(x16) + 80006860: 01c20c63 beq x4,x28,80006878 + 80006864: 09d042ef jal x5,8000b100 + 80006868: 80006858 .word 0x80006858 + 8000686c: 00000000 .word 0x00000000 + 80006870: 8001d6ec .word 0x8001d6ec + 80006874: 00000000 .word 0x00000000 + 80006878: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xa39d7d0111d46e5c + 8000687c: 000cbe83 ld x29,0(x25) + 80006880: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xbdbdf881b4f7cf9d + 80006884: 000cbe83 ld x29,0(x25) + 80006888: 008c8c93 addi x25,x25,8 + +000000008000688c : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b29: + aes64es x29, x29, x29 # perform operation + 8000688c: 33de8eb3 aes64es x29,x29,x29 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b29, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b29_str) + 80006890: 00083203 ld x4,0(x16) + 80006894: 01d20c63 beq x4,x29,800068ac + 80006898: 069042ef jal x5,8000b100 + 8000689c: 8000688c .word 0x8000688c + 800068a0: 00000000 .word 0x00000000 + 800068a4: 8001d72b .word 0x8001d72b + 800068a8: 00000000 .word 0x00000000 + 800068ac: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0xabab3cb4881abbe0 + 800068b0: 000cbf03 ld x30,0(x25) + 800068b4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x1e05df097cf081de + 800068b8: 000cbf03 ld x30,0(x25) + 800068bc: 008c8c93 addi x25,x25,8 + +00000000800068c0 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b30: + aes64es x30, x30, x30 # perform operation + 800068c0: 33ef0f33 aes64es x30,x30,x30 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b30, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b30_str) + 800068c4: 00083203 ld x4,0(x16) + 800068c8: 01e20c63 beq x4,x30,800068e0 + 800068cc: 035042ef jal x5,8000b100 + 800068d0: 800068c0 .word 0x800068c0 + 800068d4: 00000000 .word 0x00000000 + 800068d8: 8001d76a .word 0x8001d76a + 800068dc: 00000000 .word 0x00000000 + 800068e0: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xb00a9cc3de526558 + 800068e4: 000cbf83 ld x31,0(x25) + 800068e8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xf6e75a17c556237e + 800068ec: 000cbf83 ld x31,0(x25) + 800068f0: 008c8c93 addi x25,x25,8 + +00000000800068f4 : +Zkne_aes64es_cg_cmp_rd_rs1_rs2_b31: + aes64es x31, x31, x31 # perform operation + 800068f4: 33ff8fb3 aes64es x31,x31,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b31, Zkne_aes64es_cg_cmp_rd_rs1_rs2_b31_str) + 800068f8: 00083203 ld x4,0(x16) + 800068fc: 01f20c63 beq x4,x31,80006914 + 80006900: 001042ef jal x5,8000b100 + 80006904: 800068f4 .word 0x800068f4 + 80006908: 00000000 .word 0x00000000 + 8000690c: 8001d7a9 .word 0x8001d7a9 + 80006910: 00000000 .word 0x00000000 + 80006914: 00880813 addi x16,x16,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x0000000000000000 + 80006918: 000cbe83 ld x29,0(x25) + 8000691c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x0000000000000000 + 80006920: 000cbd83 ld x27,0(x25) + 80006924: 008c8c93 addi x25,x25,8 + +0000000080006928 : +Zkne_aes64es_cg_cp_sbox_b0: + aes64es x31, x29, x27 # perform operation + 80006928: 33be8fb3 aes64es x31,x29,x27 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b0, Zkne_aes64es_cg_cp_sbox_b0_str) + 8000692c: 00083203 ld x4,0(x16) + 80006930: 01f20c63 beq x4,x31,80006948 + 80006934: 7cc042ef jal x5,8000b100 + 80006938: 80006928 .word 0x80006928 + 8000693c: 00000000 .word 0x00000000 + 80006940: 8001d7e8 .word 0x8001d7e8 + 80006944: 00000000 .word 0x00000000 + 80006948: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x0101010101010101 + 8000694c: 000cba03 ld x20,0(x25) + 80006950: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x0101010101010101 + 80006954: 000cbc03 ld x24,0(x25) + 80006958: 008c8c93 addi x25,x25,8 + +000000008000695c : +Zkne_aes64es_cg_cp_sbox_b1: + aes64es x15, x20, x24 # perform operation + 8000695c: 338a07b3 aes64es x15,x20,x24 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b1, Zkne_aes64es_cg_cp_sbox_b1_str) + 80006960: 00083203 ld x4,0(x16) + 80006964: 00f20c63 beq x4,x15,8000697c + 80006968: 798042ef jal x5,8000b100 + 8000696c: 8000695c .word 0x8000695c + 80006970: 00000000 .word 0x00000000 + 80006974: 8001d81f .word 0x8001d81f + 80006978: 00000000 .word 0x00000000 + 8000697c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x0202020202020202 + 80006980: 000cba83 ld x21,0(x25) + 80006984: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x0202020202020202 + 80006988: 000cbd83 ld x27,0(x25) + 8000698c: 008c8c93 addi x25,x25,8 + +0000000080006990 : +Zkne_aes64es_cg_cp_sbox_b2: + aes64es x14, x21, x27 # perform operation + 80006990: 33ba8733 aes64es x14,x21,x27 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b2, Zkne_aes64es_cg_cp_sbox_b2_str) + 80006994: 00083203 ld x4,0(x16) + 80006998: 00e20c63 beq x4,x14,800069b0 + 8000699c: 764042ef jal x5,8000b100 + 800069a0: 80006990 .word 0x80006990 + 800069a4: 00000000 .word 0x00000000 + 800069a8: 8001d856 .word 0x8001d856 + 800069ac: 00000000 .word 0x00000000 + 800069b0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x0303030303030303 + 800069b4: 000cbc03 ld x24,0(x25) + 800069b8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x0303030303030303 + 800069bc: 000cb583 ld x11,0(x25) + 800069c0: 008c8c93 addi x25,x25,8 + +00000000800069c4 : +Zkne_aes64es_cg_cp_sbox_b3: + aes64es x1, x24, x11 # perform operation + 800069c4: 32bc00b3 aes64es x1,x24,x11 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b3, Zkne_aes64es_cg_cp_sbox_b3_str) + 800069c8: 00083203 ld x4,0(x16) + 800069cc: 00120c63 beq x4,x1,800069e4 + 800069d0: 730042ef jal x5,8000b100 + 800069d4: 800069c4 .word 0x800069c4 + 800069d8: 00000000 .word 0x00000000 + 800069dc: 8001d88d .word 0x8001d88d + 800069e0: 00000000 .word 0x00000000 + 800069e4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x0404040404040404 + 800069e8: 000cb683 ld x13,0(x25) + 800069ec: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x0404040404040404 + 800069f0: 000cbd83 ld x27,0(x25) + 800069f4: 008c8c93 addi x25,x25,8 + +00000000800069f8 : +Zkne_aes64es_cg_cp_sbox_b4: + aes64es x9, x13, x27 # perform operation + 800069f8: 33b684b3 aes64es x9,x13,x27 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b4, Zkne_aes64es_cg_cp_sbox_b4_str) + 800069fc: 00083203 ld x4,0(x16) + 80006a00: 00920c63 beq x4,x9,80006a18 + 80006a04: 6fc042ef jal x5,8000b100 + 80006a08: 800069f8 .word 0x800069f8 + 80006a0c: 00000000 .word 0x00000000 + 80006a10: 8001d8c4 .word 0x8001d8c4 + 80006a14: 00000000 .word 0x00000000 + 80006a18: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x0505050505050505 + 80006a1c: 000cb103 ld x2,0(x25) + 80006a20: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x0505050505050505 + 80006a24: 000cb383 ld x7,0(x25) + 80006a28: 008c8c93 addi x25,x25,8 + +0000000080006a2c : +Zkne_aes64es_cg_cp_sbox_b5: + aes64es x19, x2, x7 # perform operation + 80006a2c: 327109b3 aes64es x19,x2,x7 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b5, Zkne_aes64es_cg_cp_sbox_b5_str) + 80006a30: 00083203 ld x4,0(x16) + 80006a34: 01320c63 beq x4,x19,80006a4c + 80006a38: 6c8042ef jal x5,8000b100 + 80006a3c: 80006a2c .word 0x80006a2c + 80006a40: 00000000 .word 0x00000000 + 80006a44: 8001d8fb .word 0x8001d8fb + 80006a48: 00000000 .word 0x00000000 + 80006a4c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x0606060606060606 + 80006a50: 000cb683 ld x13,0(x25) + 80006a54: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x0606060606060606 + 80006a58: 000cb583 ld x11,0(x25) + 80006a5c: 008c8c93 addi x25,x25,8 + +0000000080006a60 : +Zkne_aes64es_cg_cp_sbox_b6: + aes64es x15, x13, x11 # perform operation + 80006a60: 32b687b3 aes64es x15,x13,x11 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b6, Zkne_aes64es_cg_cp_sbox_b6_str) + 80006a64: 00083203 ld x4,0(x16) + 80006a68: 00f20c63 beq x4,x15,80006a80 + 80006a6c: 694042ef jal x5,8000b100 + 80006a70: 80006a60 .word 0x80006a60 + 80006a74: 00000000 .word 0x00000000 + 80006a78: 8001d932 .word 0x8001d932 + 80006a7c: 00000000 .word 0x00000000 + 80006a80: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x0707070707070707 + 80006a84: 000cb903 ld x18,0(x25) + 80006a88: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x0707070707070707 + 80006a8c: 000cb683 ld x13,0(x25) + 80006a90: 008c8c93 addi x25,x25,8 + +0000000080006a94 : +Zkne_aes64es_cg_cp_sbox_b7: + aes64es x2, x18, x13 # perform operation + 80006a94: 32d90133 aes64es x2,x18,x13 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b7, Zkne_aes64es_cg_cp_sbox_b7_str) + 80006a98: 00083203 ld x4,0(x16) + 80006a9c: 00220c63 beq x4,x2,80006ab4 + 80006aa0: 660042ef jal x5,8000b100 + 80006aa4: 80006a94 .word 0x80006a94 + 80006aa8: 00000000 .word 0x00000000 + 80006aac: 8001d969 .word 0x8001d969 + 80006ab0: 00000000 .word 0x00000000 + 80006ab4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x0808080808080808 + 80006ab8: 000cb583 ld x11,0(x25) + 80006abc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x0808080808080808 + 80006ac0: 000cb783 ld x15,0(x25) + 80006ac4: 008c8c93 addi x25,x25,8 + +0000000080006ac8 : +Zkne_aes64es_cg_cp_sbox_b8: + aes64es x21, x11, x15 # perform operation + 80006ac8: 32f58ab3 aes64es x21,x11,x15 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b8, Zkne_aes64es_cg_cp_sbox_b8_str) + 80006acc: 00083203 ld x4,0(x16) + 80006ad0: 01520c63 beq x4,x21,80006ae8 + 80006ad4: 62c042ef jal x5,8000b100 + 80006ad8: 80006ac8 .word 0x80006ac8 + 80006adc: 00000000 .word 0x00000000 + 80006ae0: 8001d9a0 .word 0x8001d9a0 + 80006ae4: 00000000 .word 0x00000000 + 80006ae8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x0909090909090909 + 80006aec: 000cb703 ld x14,0(x25) + 80006af0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x0909090909090909 + 80006af4: 000cbc03 ld x24,0(x25) + 80006af8: 008c8c93 addi x25,x25,8 + +0000000080006afc : +Zkne_aes64es_cg_cp_sbox_b9: + aes64es x8, x14, x24 # perform operation + 80006afc: 33870433 aes64es x8,x14,x24 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b9, Zkne_aes64es_cg_cp_sbox_b9_str) + 80006b00: 00083203 ld x4,0(x16) + 80006b04: 00820c63 beq x4,x8,80006b1c + 80006b08: 5f8042ef jal x5,8000b100 + 80006b0c: 80006afc .word 0x80006afc + 80006b10: 00000000 .word 0x00000000 + 80006b14: 8001d9d7 .word 0x8001d9d7 + 80006b18: 00000000 .word 0x00000000 + 80006b1c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x0a0a0a0a0a0a0a0a + 80006b20: 000cb303 ld x6,0(x25) + 80006b24: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x0a0a0a0a0a0a0a0a + 80006b28: 000cbf83 ld x31,0(x25) + 80006b2c: 008c8c93 addi x25,x25,8 + +0000000080006b30 : +Zkne_aes64es_cg_cp_sbox_b10: + aes64es x11, x6, x31 # perform operation + 80006b30: 33f305b3 aes64es x11,x6,x31 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b10, Zkne_aes64es_cg_cp_sbox_b10_str) + 80006b34: 00083203 ld x4,0(x16) + 80006b38: 00b20c63 beq x4,x11,80006b50 + 80006b3c: 5c4042ef jal x5,8000b100 + 80006b40: 80006b30 .word 0x80006b30 + 80006b44: 00000000 .word 0x00000000 + 80006b48: 8001da0e .word 0x8001da0e + 80006b4c: 00000000 .word 0x00000000 + 80006b50: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x0b0b0b0b0b0b0b0b + 80006b54: 000cb703 ld x14,0(x25) + 80006b58: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0x0b0b0b0b0b0b0b0b + 80006b5c: 000cb103 ld x2,0(x25) + 80006b60: 008c8c93 addi x25,x25,8 + +0000000080006b64 : +Zkne_aes64es_cg_cp_sbox_b11: + aes64es x1, x14, x2 # perform operation + 80006b64: 322700b3 aes64es x1,x14,x2 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b11, Zkne_aes64es_cg_cp_sbox_b11_str) + 80006b68: 00083203 ld x4,0(x16) + 80006b6c: 00120c63 beq x4,x1,80006b84 + 80006b70: 590042ef jal x5,8000b100 + 80006b74: 80006b64 .word 0x80006b64 + 80006b78: 00000000 .word 0x00000000 + 80006b7c: 8001da46 .word 0x8001da46 + 80006b80: 00000000 .word 0x00000000 + 80006b84: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0x0c0c0c0c0c0c0c0c + 80006b88: 000cb183 ld x3,0(x25) + 80006b8c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x0c0c0c0c0c0c0c0c + 80006b90: 000cb603 ld x12,0(x25) + 80006b94: 008c8c93 addi x25,x25,8 + +0000000080006b98 : +Zkne_aes64es_cg_cp_sbox_b12: + aes64es x20, x3, x12 # perform operation + 80006b98: 32c18a33 aes64es x20,x3,x12 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zkne_aes64es_cg_cp_sbox_b12, Zkne_aes64es_cg_cp_sbox_b12_str) + 80006b9c: 00083203 ld x4,0(x16) + 80006ba0: 01420c63 beq x4,x20,80006bb8 + 80006ba4: 55c042ef jal x5,8000b100 + 80006ba8: 80006b98 .word 0x80006b98 + 80006bac: 00000000 .word 0x00000000 + 80006bb0: 8001da7e .word 0x8001da7e + 80006bb4: 00000000 .word 0x00000000 + 80006bb8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x0d0d0d0d0d0d0d0d + 80006bbc: 000cb383 ld x7,0(x25) + 80006bc0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x0d0d0d0d0d0d0d0d + 80006bc4: 000cbe83 ld x29,0(x25) + 80006bc8: 008c8c93 addi x25,x25,8 + +0000000080006bcc : +Zkne_aes64es_cg_cp_sbox_b13: + aes64es x20, x7, x29 # perform operation + 80006bcc: 33d38a33 aes64es x20,x7,x29 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zkne_aes64es_cg_cp_sbox_b13, Zkne_aes64es_cg_cp_sbox_b13_str) + 80006bd0: 00083203 ld x4,0(x16) + 80006bd4: 01420c63 beq x4,x20,80006bec + 80006bd8: 528042ef jal x5,8000b100 + 80006bdc: 80006bcc .word 0x80006bcc + 80006be0: 00000000 .word 0x00000000 + 80006be4: 8001dab6 .word 0x8001dab6 + 80006be8: 00000000 .word 0x00000000 + 80006bec: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x0e0e0e0e0e0e0e0e + 80006bf0: 000cb403 ld x8,0(x25) + 80006bf4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x0e0e0e0e0e0e0e0e + 80006bf8: 000cbf83 ld x31,0(x25) + 80006bfc: 008c8c93 addi x25,x25,8 + +0000000080006c00 : +Zkne_aes64es_cg_cp_sbox_b14: + aes64es x2, x8, x31 # perform operation + 80006c00: 33f40133 aes64es x2,x8,x31 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b14, Zkne_aes64es_cg_cp_sbox_b14_str) + 80006c04: 00083203 ld x4,0(x16) + 80006c08: 00220c63 beq x4,x2,80006c20 + 80006c0c: 4f4042ef jal x5,8000b100 + 80006c10: 80006c00 .word 0x80006c00 + 80006c14: 00000000 .word 0x00000000 + 80006c18: 8001daee .word 0x8001daee + 80006c1c: 00000000 .word 0x00000000 + 80006c20: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0x0f0f0f0f0f0f0f0f + 80006c24: 000cb183 ld x3,0(x25) + 80006c28: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x0f0f0f0f0f0f0f0f + 80006c2c: 000cbd03 ld x26,0(x25) + 80006c30: 008c8c93 addi x25,x25,8 + +0000000080006c34 : +Zkne_aes64es_cg_cp_sbox_b15: + aes64es x24, x3, x26 # perform operation + 80006c34: 33a18c33 aes64es x24,x3,x26 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b15, Zkne_aes64es_cg_cp_sbox_b15_str) + 80006c38: 00083203 ld x4,0(x16) + 80006c3c: 01820c63 beq x4,x24,80006c54 + 80006c40: 4c0042ef jal x5,8000b100 + 80006c44: 80006c34 .word 0x80006c34 + 80006c48: 00000000 .word 0x00000000 + 80006c4c: 8001db26 .word 0x8001db26 + 80006c50: 00000000 .word 0x00000000 + 80006c54: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x1010101010101010 + 80006c58: 000cbf03 ld x30,0(x25) + 80006c5c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x1010101010101010 + 80006c60: 000cbd03 ld x26,0(x25) + 80006c64: 008c8c93 addi x25,x25,8 + +0000000080006c68 : +Zkne_aes64es_cg_cp_sbox_b16: + aes64es x1, x30, x26 # perform operation + 80006c68: 33af00b3 aes64es x1,x30,x26 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b16, Zkne_aes64es_cg_cp_sbox_b16_str) + 80006c6c: 00083203 ld x4,0(x16) + 80006c70: 00120c63 beq x4,x1,80006c88 + 80006c74: 48c042ef jal x5,8000b100 + 80006c78: 80006c68 .word 0x80006c68 + 80006c7c: 00000000 .word 0x00000000 + 80006c80: 8001db5e .word 0x8001db5e + 80006c84: 00000000 .word 0x00000000 + 80006c88: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x1111111111111111 + 80006c8c: 000cbe83 ld x29,0(x25) + 80006c90: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x1111111111111111 + 80006c94: 000cbb03 ld x22,0(x25) + 80006c98: 008c8c93 addi x25,x25,8 + +0000000080006c9c : +Zkne_aes64es_cg_cp_sbox_b17: + aes64es x21, x29, x22 # perform operation + 80006c9c: 336e8ab3 aes64es x21,x29,x22 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b17, Zkne_aes64es_cg_cp_sbox_b17_str) + 80006ca0: 00083203 ld x4,0(x16) + 80006ca4: 01520c63 beq x4,x21,80006cbc + 80006ca8: 458042ef jal x5,8000b100 + 80006cac: 80006c9c .word 0x80006c9c + 80006cb0: 00000000 .word 0x00000000 + 80006cb4: 8001db96 .word 0x8001db96 + 80006cb8: 00000000 .word 0x00000000 + 80006cbc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x1212121212121212 + 80006cc0: 000cb103 ld x2,0(x25) + 80006cc4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x1212121212121212 + 80006cc8: 000cb183 ld x3,0(x25) + 80006ccc: 008c8c93 addi x25,x25,8 + +0000000080006cd0 : +Zkne_aes64es_cg_cp_sbox_b18: + aes64es x7, x2, x3 # perform operation + 80006cd0: 323103b3 aes64es x7,x2,x3 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b18, Zkne_aes64es_cg_cp_sbox_b18_str) + 80006cd4: 00083203 ld x4,0(x16) + 80006cd8: 00720c63 beq x4,x7,80006cf0 + 80006cdc: 424042ef jal x5,8000b100 + 80006ce0: 80006cd0 .word 0x80006cd0 + 80006ce4: 00000000 .word 0x00000000 + 80006ce8: 8001dbce .word 0x8001dbce + 80006cec: 00000000 .word 0x00000000 + 80006cf0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x1313131313131313 + 80006cf4: 000cb783 ld x15,0(x25) + 80006cf8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x1313131313131313 + 80006cfc: 000cb483 ld x9,0(x25) + 80006d00: 008c8c93 addi x25,x25,8 + +0000000080006d04 : +Zkne_aes64es_cg_cp_sbox_b19: + aes64es x22, x15, x9 # perform operation + 80006d04: 32978b33 aes64es x22,x15,x9 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64es_cg_cp_sbox_b19, Zkne_aes64es_cg_cp_sbox_b19_str) + 80006d08: 00083203 ld x4,0(x16) + 80006d0c: 01620c63 beq x4,x22,80006d24 + 80006d10: 3f0042ef jal x5,8000b100 + 80006d14: 80006d04 .word 0x80006d04 + 80006d18: 00000000 .word 0x00000000 + 80006d1c: 8001dc06 .word 0x8001dc06 + 80006d20: 00000000 .word 0x00000000 + 80006d24: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x1414141414141414 + 80006d28: 000cb603 ld x12,0(x25) + 80006d2c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x1414141414141414 + 80006d30: 000cbe83 ld x29,0(x25) + 80006d34: 008c8c93 addi x25,x25,8 + +0000000080006d38 : +Zkne_aes64es_cg_cp_sbox_b20: + aes64es x18, x12, x29 # perform operation + 80006d38: 33d60933 aes64es x18,x12,x29 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b20, Zkne_aes64es_cg_cp_sbox_b20_str) + 80006d3c: 00083203 ld x4,0(x16) + 80006d40: 01220c63 beq x4,x18,80006d58 + 80006d44: 3bc042ef jal x5,8000b100 + 80006d48: 80006d38 .word 0x80006d38 + 80006d4c: 00000000 .word 0x00000000 + 80006d50: 8001dc3e .word 0x8001dc3e + 80006d54: 00000000 .word 0x00000000 + 80006d58: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x1515151515151515 + 80006d5c: 000cb883 ld x17,0(x25) + 80006d60: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x1515151515151515 + 80006d64: 000cb483 ld x9,0(x25) + 80006d68: 008c8c93 addi x25,x25,8 + +0000000080006d6c : +Zkne_aes64es_cg_cp_sbox_b21: + aes64es x31, x17, x9 # perform operation + 80006d6c: 32988fb3 aes64es x31,x17,x9 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b21, Zkne_aes64es_cg_cp_sbox_b21_str) + 80006d70: 00083203 ld x4,0(x16) + 80006d74: 01f20c63 beq x4,x31,80006d8c + 80006d78: 388042ef jal x5,8000b100 + 80006d7c: 80006d6c .word 0x80006d6c + 80006d80: 00000000 .word 0x00000000 + 80006d84: 8001dc76 .word 0x8001dc76 + 80006d88: 00000000 .word 0x00000000 + 80006d8c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x1616161616161616 + 80006d90: 000cbc03 ld x24,0(x25) + 80006d94: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x1616161616161616 + 80006d98: 000cbb03 ld x22,0(x25) + 80006d9c: 008c8c93 addi x25,x25,8 + +0000000080006da0 : +Zkne_aes64es_cg_cp_sbox_b22: + aes64es x28, x24, x22 # perform operation + 80006da0: 336c0e33 aes64es x28,x24,x22 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b22, Zkne_aes64es_cg_cp_sbox_b22_str) + 80006da4: 00083203 ld x4,0(x16) + 80006da8: 01c20c63 beq x4,x28,80006dc0 + 80006dac: 354042ef jal x5,8000b100 + 80006db0: 80006da0 .word 0x80006da0 + 80006db4: 00000000 .word 0x00000000 + 80006db8: 8001dcae .word 0x8001dcae + 80006dbc: 00000000 .word 0x00000000 + 80006dc0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x1717171717171717 + 80006dc4: 000cb783 ld x15,0(x25) + 80006dc8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x1717171717171717 + 80006dcc: 000cbb03 ld x22,0(x25) + 80006dd0: 008c8c93 addi x25,x25,8 + +0000000080006dd4 : +Zkne_aes64es_cg_cp_sbox_b23: + aes64es x31, x15, x22 # perform operation + 80006dd4: 33678fb3 aes64es x31,x15,x22 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b23, Zkne_aes64es_cg_cp_sbox_b23_str) + 80006dd8: 00083203 ld x4,0(x16) + 80006ddc: 01f20c63 beq x4,x31,80006df4 + 80006de0: 320042ef jal x5,8000b100 + 80006de4: 80006dd4 .word 0x80006dd4 + 80006de8: 00000000 .word 0x00000000 + 80006dec: 8001dce6 .word 0x8001dce6 + 80006df0: 00000000 .word 0x00000000 + 80006df4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x1818181818181818 + 80006df8: 000cb783 ld x15,0(x25) + 80006dfc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x1818181818181818 + 80006e00: 000cb903 ld x18,0(x25) + 80006e04: 008c8c93 addi x25,x25,8 + +0000000080006e08 : +Zkne_aes64es_cg_cp_sbox_b24: + aes64es x1, x15, x18 # perform operation + 80006e08: 332780b3 aes64es x1,x15,x18 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b24, Zkne_aes64es_cg_cp_sbox_b24_str) + 80006e0c: 00083203 ld x4,0(x16) + 80006e10: 00120c63 beq x4,x1,80006e28 + 80006e14: 2ec042ef jal x5,8000b100 + 80006e18: 80006e08 .word 0x80006e08 + 80006e1c: 00000000 .word 0x00000000 + 80006e20: 8001dd1e .word 0x8001dd1e + 80006e24: 00000000 .word 0x00000000 + 80006e28: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x1919191919191919 + 80006e2c: 000cbb03 ld x22,0(x25) + 80006e30: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x1919191919191919 + 80006e34: 000cb903 ld x18,0(x25) + 80006e38: 008c8c93 addi x25,x25,8 + +0000000080006e3c : +Zkne_aes64es_cg_cp_sbox_b25: + aes64es x15, x22, x18 # perform operation + 80006e3c: 332b07b3 aes64es x15,x22,x18 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b25, Zkne_aes64es_cg_cp_sbox_b25_str) + 80006e40: 00083203 ld x4,0(x16) + 80006e44: 00f20c63 beq x4,x15,80006e5c + 80006e48: 2b8042ef jal x5,8000b100 + 80006e4c: 80006e3c .word 0x80006e3c + 80006e50: 00000000 .word 0x00000000 + 80006e54: 8001dd56 .word 0x8001dd56 + 80006e58: 00000000 .word 0x00000000 + 80006e5c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x1a1a1a1a1a1a1a1a + 80006e60: 000cb483 ld x9,0(x25) + 80006e64: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x1a1a1a1a1a1a1a1a + 80006e68: 000cb783 ld x15,0(x25) + 80006e6c: 008c8c93 addi x25,x25,8 + +0000000080006e70 : +Zkne_aes64es_cg_cp_sbox_b26: + aes64es x24, x9, x15 # perform operation + 80006e70: 32f48c33 aes64es x24,x9,x15 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b26, Zkne_aes64es_cg_cp_sbox_b26_str) + 80006e74: 00083203 ld x4,0(x16) + 80006e78: 01820c63 beq x4,x24,80006e90 + 80006e7c: 284042ef jal x5,8000b100 + 80006e80: 80006e70 .word 0x80006e70 + 80006e84: 00000000 .word 0x00000000 + 80006e88: 8001dd8e .word 0x8001dd8e + 80006e8c: 00000000 .word 0x00000000 + 80006e90: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x1b1b1b1b1b1b1b1b + 80006e94: 000cbf03 ld x30,0(x25) + 80006e98: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x1b1b1b1b1b1b1b1b + 80006e9c: 000cbd03 ld x26,0(x25) + 80006ea0: 008c8c93 addi x25,x25,8 + +0000000080006ea4 : +Zkne_aes64es_cg_cp_sbox_b27: + aes64es x20, x30, x26 # perform operation + 80006ea4: 33af0a33 aes64es x20,x30,x26 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zkne_aes64es_cg_cp_sbox_b27, Zkne_aes64es_cg_cp_sbox_b27_str) + 80006ea8: 00083203 ld x4,0(x16) + 80006eac: 01420c63 beq x4,x20,80006ec4 + 80006eb0: 250042ef jal x5,8000b100 + 80006eb4: 80006ea4 .word 0x80006ea4 + 80006eb8: 00000000 .word 0x00000000 + 80006ebc: 8001ddc6 .word 0x8001ddc6 + 80006ec0: 00000000 .word 0x00000000 + 80006ec4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x1c1c1c1c1c1c1c1c + 80006ec8: 000cb403 ld x8,0(x25) + 80006ecc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x1c1c1c1c1c1c1c1c + 80006ed0: 000cb683 ld x13,0(x25) + 80006ed4: 008c8c93 addi x25,x25,8 + +0000000080006ed8 : +Zkne_aes64es_cg_cp_sbox_b28: + aes64es x30, x8, x13 # perform operation + 80006ed8: 32d40f33 aes64es x30,x8,x13 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b28, Zkne_aes64es_cg_cp_sbox_b28_str) + 80006edc: 00083203 ld x4,0(x16) + 80006ee0: 01e20c63 beq x4,x30,80006ef8 + 80006ee4: 21c042ef jal x5,8000b100 + 80006ee8: 80006ed8 .word 0x80006ed8 + 80006eec: 00000000 .word 0x00000000 + 80006ef0: 8001ddfe .word 0x8001ddfe + 80006ef4: 00000000 .word 0x00000000 + 80006ef8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x1d1d1d1d1d1d1d1d + 80006efc: 000cbc03 ld x24,0(x25) + 80006f00: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x1d1d1d1d1d1d1d1d + 80006f04: 000cbf03 ld x30,0(x25) + 80006f08: 008c8c93 addi x25,x25,8 + +0000000080006f0c : +Zkne_aes64es_cg_cp_sbox_b29: + aes64es x19, x24, x30 # perform operation + 80006f0c: 33ec09b3 aes64es x19,x24,x30 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b29, Zkne_aes64es_cg_cp_sbox_b29_str) + 80006f10: 00083203 ld x4,0(x16) + 80006f14: 01320c63 beq x4,x19,80006f2c + 80006f18: 1e8042ef jal x5,8000b100 + 80006f1c: 80006f0c .word 0x80006f0c + 80006f20: 00000000 .word 0x00000000 + 80006f24: 8001de36 .word 0x8001de36 + 80006f28: 00000000 .word 0x00000000 + 80006f2c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x1e1e1e1e1e1e1e1e + 80006f30: 000cb903 ld x18,0(x25) + 80006f34: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x1e1e1e1e1e1e1e1e + 80006f38: 000cbb03 ld x22,0(x25) + 80006f3c: 008c8c93 addi x25,x25,8 + +0000000080006f40 : +Zkne_aes64es_cg_cp_sbox_b30: + aes64es x24, x18, x22 # perform operation + 80006f40: 33690c33 aes64es x24,x18,x22 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b30, Zkne_aes64es_cg_cp_sbox_b30_str) + 80006f44: 00083203 ld x4,0(x16) + 80006f48: 01820c63 beq x4,x24,80006f60 + 80006f4c: 1b4042ef jal x5,8000b100 + 80006f50: 80006f40 .word 0x80006f40 + 80006f54: 00000000 .word 0x00000000 + 80006f58: 8001de6e .word 0x8001de6e + 80006f5c: 00000000 .word 0x00000000 + 80006f60: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x1f1f1f1f1f1f1f1f + 80006f64: 000cb303 ld x6,0(x25) + 80006f68: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x1f1f1f1f1f1f1f1f + 80006f6c: 000cbd83 ld x27,0(x25) + 80006f70: 008c8c93 addi x25,x25,8 + +0000000080006f74 : +Zkne_aes64es_cg_cp_sbox_b31: + aes64es x19, x6, x27 # perform operation + 80006f74: 33b309b3 aes64es x19,x6,x27 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b31, Zkne_aes64es_cg_cp_sbox_b31_str) + 80006f78: 00083203 ld x4,0(x16) + 80006f7c: 01320c63 beq x4,x19,80006f94 + 80006f80: 180042ef jal x5,8000b100 + 80006f84: 80006f74 .word 0x80006f74 + 80006f88: 00000000 .word 0x00000000 + 80006f8c: 8001dea6 .word 0x8001dea6 + 80006f90: 00000000 .word 0x00000000 + 80006f94: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x2020202020202020 + 80006f98: 000cb103 ld x2,0(x25) + 80006f9c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x2020202020202020 + 80006fa0: 000cbb03 ld x22,0(x25) + 80006fa4: 008c8c93 addi x25,x25,8 + +0000000080006fa8 : +Zkne_aes64es_cg_cp_sbox_b32: + aes64es x6, x2, x22 # perform operation + 80006fa8: 33610333 aes64es x6,x2,x22 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b32, Zkne_aes64es_cg_cp_sbox_b32_str) + 80006fac: 00083203 ld x4,0(x16) + 80006fb0: 00620c63 beq x4,x6,80006fc8 + 80006fb4: 14c042ef jal x5,8000b100 + 80006fb8: 80006fa8 .word 0x80006fa8 + 80006fbc: 00000000 .word 0x00000000 + 80006fc0: 8001dede .word 0x8001dede + 80006fc4: 00000000 .word 0x00000000 + 80006fc8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x2121212121212121 + 80006fcc: 000cba03 ld x20,0(x25) + 80006fd0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x2121212121212121 + 80006fd4: 000cbd03 ld x26,0(x25) + 80006fd8: 008c8c93 addi x25,x25,8 + +0000000080006fdc : +Zkne_aes64es_cg_cp_sbox_b33: + aes64es x19, x20, x26 # perform operation + 80006fdc: 33aa09b3 aes64es x19,x20,x26 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b33, Zkne_aes64es_cg_cp_sbox_b33_str) + 80006fe0: 00083203 ld x4,0(x16) + 80006fe4: 01320c63 beq x4,x19,80006ffc + 80006fe8: 118042ef jal x5,8000b100 + 80006fec: 80006fdc .word 0x80006fdc + 80006ff0: 00000000 .word 0x00000000 + 80006ff4: 8001df16 .word 0x8001df16 + 80006ff8: 00000000 .word 0x00000000 + 80006ffc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x2222222222222222 + 80007000: 000cb403 ld x8,0(x25) + 80007004: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0x2222222222222222 + 80007008: 000cbe03 ld x28,0(x25) + 8000700c: 008c8c93 addi x25,x25,8 + +0000000080007010 : +Zkne_aes64es_cg_cp_sbox_b34: + aes64es x9, x8, x28 # perform operation + 80007010: 33c404b3 aes64es x9,x8,x28 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b34, Zkne_aes64es_cg_cp_sbox_b34_str) + 80007014: 00083203 ld x4,0(x16) + 80007018: 00920c63 beq x4,x9,80007030 + 8000701c: 0e4042ef jal x5,8000b100 + 80007020: 80007010 .word 0x80007010 + 80007024: 00000000 .word 0x00000000 + 80007028: 8001df4e .word 0x8001df4e + 8000702c: 00000000 .word 0x00000000 + 80007030: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x2323232323232323 + 80007034: 000cb383 ld x7,0(x25) + 80007038: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x2323232323232323 + 8000703c: 000cbd03 ld x26,0(x25) + 80007040: 008c8c93 addi x25,x25,8 + +0000000080007044 : +Zkne_aes64es_cg_cp_sbox_b35: + aes64es x28, x7, x26 # perform operation + 80007044: 33a38e33 aes64es x28,x7,x26 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b35, Zkne_aes64es_cg_cp_sbox_b35_str) + 80007048: 00083203 ld x4,0(x16) + 8000704c: 01c20c63 beq x4,x28,80007064 + 80007050: 0b0042ef jal x5,8000b100 + 80007054: 80007044 .word 0x80007044 + 80007058: 00000000 .word 0x00000000 + 8000705c: 8001df86 .word 0x8001df86 + 80007060: 00000000 .word 0x00000000 + 80007064: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x2424242424242424 + 80007068: 000cb683 ld x13,0(x25) + 8000706c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x2424242424242424 + 80007070: 000cb783 ld x15,0(x25) + 80007074: 008c8c93 addi x25,x25,8 + +0000000080007078 : +Zkne_aes64es_cg_cp_sbox_b36: + aes64es x3, x13, x15 # perform operation + 80007078: 32f681b3 aes64es x3,x13,x15 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b36, Zkne_aes64es_cg_cp_sbox_b36_str) + 8000707c: 00083203 ld x4,0(x16) + 80007080: 00320c63 beq x4,x3,80007098 + 80007084: 07c042ef jal x5,8000b100 + 80007088: 80007078 .word 0x80007078 + 8000708c: 00000000 .word 0x00000000 + 80007090: 8001dfbe .word 0x8001dfbe + 80007094: 00000000 .word 0x00000000 + 80007098: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x2525252525252525 + 8000709c: 000cb483 ld x9,0(x25) + 800070a0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x2525252525252525 + 800070a4: 000cb083 ld x1,0(x25) + 800070a8: 008c8c93 addi x25,x25,8 + +00000000800070ac : +Zkne_aes64es_cg_cp_sbox_b37: + aes64es x28, x9, x1 # perform operation + 800070ac: 32148e33 aes64es x28,x9,x1 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b37, Zkne_aes64es_cg_cp_sbox_b37_str) + 800070b0: 00083203 ld x4,0(x16) + 800070b4: 01c20c63 beq x4,x28,800070cc + 800070b8: 048042ef jal x5,8000b100 + 800070bc: 800070ac .word 0x800070ac + 800070c0: 00000000 .word 0x00000000 + 800070c4: 8001dff6 .word 0x8001dff6 + 800070c8: 00000000 .word 0x00000000 + 800070cc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x2626262626262626 + 800070d0: 000cb403 ld x8,0(x25) + 800070d4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x2626262626262626 + 800070d8: 000cb383 ld x7,0(x25) + 800070dc: 008c8c93 addi x25,x25,8 + +00000000800070e0 : +Zkne_aes64es_cg_cp_sbox_b38: + aes64es x1, x8, x7 # perform operation + 800070e0: 327400b3 aes64es x1,x8,x7 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b38, Zkne_aes64es_cg_cp_sbox_b38_str) + 800070e4: 00083203 ld x4,0(x16) + 800070e8: 00120c63 beq x4,x1,80007100 + 800070ec: 014042ef jal x5,8000b100 + 800070f0: 800070e0 .word 0x800070e0 + 800070f4: 00000000 .word 0x00000000 + 800070f8: 8001e02e .word 0x8001e02e + 800070fc: 00000000 .word 0x00000000 + 80007100: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x2727272727272727 + 80007104: 000cb103 ld x2,0(x25) + 80007108: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x2727272727272727 + 8000710c: 000cb783 ld x15,0(x25) + 80007110: 008c8c93 addi x25,x25,8 + +0000000080007114 : +Zkne_aes64es_cg_cp_sbox_b39: + aes64es x26, x2, x15 # perform operation + 80007114: 32f10d33 aes64es x26,x2,x15 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b39, Zkne_aes64es_cg_cp_sbox_b39_str) + 80007118: 00083203 ld x4,0(x16) + 8000711c: 01a20c63 beq x4,x26,80007134 + 80007120: 7e1032ef jal x5,8000b100 + 80007124: 80007114 .word 0x80007114 + 80007128: 00000000 .word 0x00000000 + 8000712c: 8001e066 .word 0x8001e066 + 80007130: 00000000 .word 0x00000000 + 80007134: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x2828282828282828 + 80007138: 000cb783 ld x15,0(x25) + 8000713c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x2828282828282828 + 80007140: 000cba83 ld x21,0(x25) + 80007144: 008c8c93 addi x25,x25,8 + +0000000080007148 : +Zkne_aes64es_cg_cp_sbox_b40: + aes64es x13, x15, x21 # perform operation + 80007148: 335786b3 aes64es x13,x15,x21 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b40, Zkne_aes64es_cg_cp_sbox_b40_str) + 8000714c: 00083203 ld x4,0(x16) + 80007150: 00d20c63 beq x4,x13,80007168 + 80007154: 7ad032ef jal x5,8000b100 + 80007158: 80007148 .word 0x80007148 + 8000715c: 00000000 .word 0x00000000 + 80007160: 8001e09e .word 0x8001e09e + 80007164: 00000000 .word 0x00000000 + 80007168: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x2929292929292929 + 8000716c: 000cbe83 ld x29,0(x25) + 80007170: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x2929292929292929 + 80007174: 000cb403 ld x8,0(x25) + 80007178: 008c8c93 addi x25,x25,8 + +000000008000717c : +Zkne_aes64es_cg_cp_sbox_b41: + aes64es x7, x29, x8 # perform operation + 8000717c: 328e83b3 aes64es x7,x29,x8 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b41, Zkne_aes64es_cg_cp_sbox_b41_str) + 80007180: 00083203 ld x4,0(x16) + 80007184: 00720c63 beq x4,x7,8000719c + 80007188: 779032ef jal x5,8000b100 + 8000718c: 8000717c .word 0x8000717c + 80007190: 00000000 .word 0x00000000 + 80007194: 8001e0d6 .word 0x8001e0d6 + 80007198: 00000000 .word 0x00000000 + 8000719c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x2a2a2a2a2a2a2a2a + 800071a0: 000cb083 ld x1,0(x25) + 800071a4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x2a2a2a2a2a2a2a2a + 800071a8: 000cb983 ld x19,0(x25) + 800071ac: 008c8c93 addi x25,x25,8 + +00000000800071b0 : +Zkne_aes64es_cg_cp_sbox_b42: + aes64es x23, x1, x19 # perform operation + 800071b0: 33308bb3 aes64es x23,x1,x19 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zkne_aes64es_cg_cp_sbox_b42, Zkne_aes64es_cg_cp_sbox_b42_str) + 800071b4: 00083203 ld x4,0(x16) + 800071b8: 01720c63 beq x4,x23,800071d0 + 800071bc: 745032ef jal x5,8000b100 + 800071c0: 800071b0 .word 0x800071b0 + 800071c4: 00000000 .word 0x00000000 + 800071c8: 8001e10e .word 0x8001e10e + 800071cc: 00000000 .word 0x00000000 + 800071d0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x2b2b2b2b2b2b2b2b + 800071d4: 000cb903 ld x18,0(x25) + 800071d8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x2b2b2b2b2b2b2b2b + 800071dc: 000cb403 ld x8,0(x25) + 800071e0: 008c8c93 addi x25,x25,8 + +00000000800071e4 : +Zkne_aes64es_cg_cp_sbox_b43: + aes64es x2, x18, x8 # perform operation + 800071e4: 32890133 aes64es x2,x18,x8 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b43, Zkne_aes64es_cg_cp_sbox_b43_str) + 800071e8: 00083203 ld x4,0(x16) + 800071ec: 00220c63 beq x4,x2,80007204 + 800071f0: 711032ef jal x5,8000b100 + 800071f4: 800071e4 .word 0x800071e4 + 800071f8: 00000000 .word 0x00000000 + 800071fc: 8001e146 .word 0x8001e146 + 80007200: 00000000 .word 0x00000000 + 80007204: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x2c2c2c2c2c2c2c2c + 80007208: 000cb403 ld x8,0(x25) + 8000720c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x2c2c2c2c2c2c2c2c + 80007210: 000cb783 ld x15,0(x25) + 80007214: 008c8c93 addi x25,x25,8 + +0000000080007218 : +Zkne_aes64es_cg_cp_sbox_b44: + aes64es x7, x8, x15 # perform operation + 80007218: 32f403b3 aes64es x7,x8,x15 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b44, Zkne_aes64es_cg_cp_sbox_b44_str) + 8000721c: 00083203 ld x4,0(x16) + 80007220: 00720c63 beq x4,x7,80007238 + 80007224: 6dd032ef jal x5,8000b100 + 80007228: 80007218 .word 0x80007218 + 8000722c: 00000000 .word 0x00000000 + 80007230: 8001e17e .word 0x8001e17e + 80007234: 00000000 .word 0x00000000 + 80007238: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x2d2d2d2d2d2d2d2d + 8000723c: 000cbe03 ld x28,0(x25) + 80007240: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x2d2d2d2d2d2d2d2d + 80007244: 000cb483 ld x9,0(x25) + 80007248: 008c8c93 addi x25,x25,8 + +000000008000724c : +Zkne_aes64es_cg_cp_sbox_b45: + aes64es x21, x28, x9 # perform operation + 8000724c: 329e0ab3 aes64es x21,x28,x9 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b45, Zkne_aes64es_cg_cp_sbox_b45_str) + 80007250: 00083203 ld x4,0(x16) + 80007254: 01520c63 beq x4,x21,8000726c + 80007258: 6a9032ef jal x5,8000b100 + 8000725c: 8000724c .word 0x8000724c + 80007260: 00000000 .word 0x00000000 + 80007264: 8001e1b6 .word 0x8001e1b6 + 80007268: 00000000 .word 0x00000000 + 8000726c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x2e2e2e2e2e2e2e2e + 80007270: 000cbd03 ld x26,0(x25) + 80007274: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0x2e2e2e2e2e2e2e2e + 80007278: 000cb883 ld x17,0(x25) + 8000727c: 008c8c93 addi x25,x25,8 + +0000000080007280 : +Zkne_aes64es_cg_cp_sbox_b46: + aes64es x8, x26, x17 # perform operation + 80007280: 331d0433 aes64es x8,x26,x17 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b46, Zkne_aes64es_cg_cp_sbox_b46_str) + 80007284: 00083203 ld x4,0(x16) + 80007288: 00820c63 beq x4,x8,800072a0 + 8000728c: 675032ef jal x5,8000b100 + 80007290: 80007280 .word 0x80007280 + 80007294: 00000000 .word 0x00000000 + 80007298: 8001e1ee .word 0x8001e1ee + 8000729c: 00000000 .word 0x00000000 + 800072a0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x2f2f2f2f2f2f2f2f + 800072a4: 000cbf03 ld x30,0(x25) + 800072a8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x2f2f2f2f2f2f2f2f + 800072ac: 000cbc03 ld x24,0(x25) + 800072b0: 008c8c93 addi x25,x25,8 + +00000000800072b4 : +Zkne_aes64es_cg_cp_sbox_b47: + aes64es x6, x30, x24 # perform operation + 800072b4: 338f0333 aes64es x6,x30,x24 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b47, Zkne_aes64es_cg_cp_sbox_b47_str) + 800072b8: 00083203 ld x4,0(x16) + 800072bc: 00620c63 beq x4,x6,800072d4 + 800072c0: 641032ef jal x5,8000b100 + 800072c4: 800072b4 .word 0x800072b4 + 800072c8: 00000000 .word 0x00000000 + 800072cc: 8001e226 .word 0x8001e226 + 800072d0: 00000000 .word 0x00000000 + 800072d4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x3030303030303030 + 800072d8: 000cbb03 ld x22,0(x25) + 800072dc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x3030303030303030 + 800072e0: 000cbc03 ld x24,0(x25) + 800072e4: 008c8c93 addi x25,x25,8 + +00000000800072e8 : +Zkne_aes64es_cg_cp_sbox_b48: + aes64es x12, x22, x24 # perform operation + 800072e8: 338b0633 aes64es x12,x22,x24 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b48, Zkne_aes64es_cg_cp_sbox_b48_str) + 800072ec: 00083203 ld x4,0(x16) + 800072f0: 00c20c63 beq x4,x12,80007308 + 800072f4: 60d032ef jal x5,8000b100 + 800072f8: 800072e8 .word 0x800072e8 + 800072fc: 00000000 .word 0x00000000 + 80007300: 8001e25e .word 0x8001e25e + 80007304: 00000000 .word 0x00000000 + 80007308: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x3131313131313131 + 8000730c: 000cba03 ld x20,0(x25) + 80007310: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x3131313131313131 + 80007314: 000cbf03 ld x30,0(x25) + 80007318: 008c8c93 addi x25,x25,8 + +000000008000731c : +Zkne_aes64es_cg_cp_sbox_b49: + aes64es x24, x20, x30 # perform operation + 8000731c: 33ea0c33 aes64es x24,x20,x30 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b49, Zkne_aes64es_cg_cp_sbox_b49_str) + 80007320: 00083203 ld x4,0(x16) + 80007324: 01820c63 beq x4,x24,8000733c + 80007328: 5d9032ef jal x5,8000b100 + 8000732c: 8000731c .word 0x8000731c + 80007330: 00000000 .word 0x00000000 + 80007334: 8001e296 .word 0x8001e296 + 80007338: 00000000 .word 0x00000000 + 8000733c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x3232323232323232 + 80007340: 000cbf83 ld x31,0(x25) + 80007344: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x3232323232323232 + 80007348: 000cb583 ld x11,0(x25) + 8000734c: 008c8c93 addi x25,x25,8 + +0000000080007350 : +Zkne_aes64es_cg_cp_sbox_b50: + aes64es x15, x31, x11 # perform operation + 80007350: 32bf87b3 aes64es x15,x31,x11 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b50, Zkne_aes64es_cg_cp_sbox_b50_str) + 80007354: 00083203 ld x4,0(x16) + 80007358: 00f20c63 beq x4,x15,80007370 + 8000735c: 5a5032ef jal x5,8000b100 + 80007360: 80007350 .word 0x80007350 + 80007364: 00000000 .word 0x00000000 + 80007368: 8001e2ce .word 0x8001e2ce + 8000736c: 00000000 .word 0x00000000 + 80007370: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x3333333333333333 + 80007374: 000cb683 ld x13,0(x25) + 80007378: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x3333333333333333 + 8000737c: 000cbf83 ld x31,0(x25) + 80007380: 008c8c93 addi x25,x25,8 + +0000000080007384 : +Zkne_aes64es_cg_cp_sbox_b51: + aes64es x18, x13, x31 # perform operation + 80007384: 33f68933 aes64es x18,x13,x31 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b51, Zkne_aes64es_cg_cp_sbox_b51_str) + 80007388: 00083203 ld x4,0(x16) + 8000738c: 01220c63 beq x4,x18,800073a4 + 80007390: 571032ef jal x5,8000b100 + 80007394: 80007384 .word 0x80007384 + 80007398: 00000000 .word 0x00000000 + 8000739c: 8001e306 .word 0x8001e306 + 800073a0: 00000000 .word 0x00000000 + 800073a4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x3434343434343434 + 800073a8: 000cb303 ld x6,0(x25) + 800073ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x3434343434343434 + 800073b0: 000cbb03 ld x22,0(x25) + 800073b4: 008c8c93 addi x25,x25,8 + +00000000800073b8 : +Zkne_aes64es_cg_cp_sbox_b52: + aes64es x3, x6, x22 # perform operation + 800073b8: 336301b3 aes64es x3,x6,x22 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b52, Zkne_aes64es_cg_cp_sbox_b52_str) + 800073bc: 00083203 ld x4,0(x16) + 800073c0: 00320c63 beq x4,x3,800073d8 + 800073c4: 53d032ef jal x5,8000b100 + 800073c8: 800073b8 .word 0x800073b8 + 800073cc: 00000000 .word 0x00000000 + 800073d0: 8001e33e .word 0x8001e33e + 800073d4: 00000000 .word 0x00000000 + 800073d8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x3535353535353535 + 800073dc: 000cb583 ld x11,0(x25) + 800073e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x3535353535353535 + 800073e4: 000cb083 ld x1,0(x25) + 800073e8: 008c8c93 addi x25,x25,8 + +00000000800073ec : +Zkne_aes64es_cg_cp_sbox_b53: + aes64es x26, x11, x1 # perform operation + 800073ec: 32158d33 aes64es x26,x11,x1 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b53, Zkne_aes64es_cg_cp_sbox_b53_str) + 800073f0: 00083203 ld x4,0(x16) + 800073f4: 01a20c63 beq x4,x26,8000740c + 800073f8: 509032ef jal x5,8000b100 + 800073fc: 800073ec .word 0x800073ec + 80007400: 00000000 .word 0x00000000 + 80007404: 8001e376 .word 0x8001e376 + 80007408: 00000000 .word 0x00000000 + 8000740c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x3636363636363636 + 80007410: 000cbf03 ld x30,0(x25) + 80007414: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x3636363636363636 + 80007418: 000cb603 ld x12,0(x25) + 8000741c: 008c8c93 addi x25,x25,8 + +0000000080007420 : +Zkne_aes64es_cg_cp_sbox_b54: + aes64es x3, x30, x12 # perform operation + 80007420: 32cf01b3 aes64es x3,x30,x12 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b54, Zkne_aes64es_cg_cp_sbox_b54_str) + 80007424: 00083203 ld x4,0(x16) + 80007428: 00320c63 beq x4,x3,80007440 + 8000742c: 4d5032ef jal x5,8000b100 + 80007430: 80007420 .word 0x80007420 + 80007434: 00000000 .word 0x00000000 + 80007438: 8001e3ae .word 0x8001e3ae + 8000743c: 00000000 .word 0x00000000 + 80007440: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x3737373737373737 + 80007444: 000cbb03 ld x22,0(x25) + 80007448: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x3737373737373737 + 8000744c: 000cbe83 ld x29,0(x25) + 80007450: 008c8c93 addi x25,x25,8 + +0000000080007454 : +Zkne_aes64es_cg_cp_sbox_b55: + aes64es x10, x22, x29 # perform operation + 80007454: 33db0533 aes64es x10,x22,x29 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zkne_aes64es_cg_cp_sbox_b55, Zkne_aes64es_cg_cp_sbox_b55_str) + 80007458: 00083203 ld x4,0(x16) + 8000745c: 00a20c63 beq x4,x10,80007474 + 80007460: 4a1032ef jal x5,8000b100 + 80007464: 80007454 .word 0x80007454 + 80007468: 00000000 .word 0x00000000 + 8000746c: 8001e3e6 .word 0x8001e3e6 + 80007470: 00000000 .word 0x00000000 + 80007474: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x3838383838383838 + 80007478: 000cbe83 ld x29,0(x25) + 8000747c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x3838383838383838 + 80007480: 000cb983 ld x19,0(x25) + 80007484: 008c8c93 addi x25,x25,8 + +0000000080007488 : +Zkne_aes64es_cg_cp_sbox_b56: + aes64es x26, x29, x19 # perform operation + 80007488: 333e8d33 aes64es x26,x29,x19 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b56, Zkne_aes64es_cg_cp_sbox_b56_str) + 8000748c: 00083203 ld x4,0(x16) + 80007490: 01a20c63 beq x4,x26,800074a8 + 80007494: 46d032ef jal x5,8000b100 + 80007498: 80007488 .word 0x80007488 + 8000749c: 00000000 .word 0x00000000 + 800074a0: 8001e41e .word 0x8001e41e + 800074a4: 00000000 .word 0x00000000 + 800074a8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x3939393939393939 + 800074ac: 000cbc03 ld x24,0(x25) + 800074b0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x3939393939393939 + 800074b4: 000cb983 ld x19,0(x25) + 800074b8: 008c8c93 addi x25,x25,8 + +00000000800074bc : +Zkne_aes64es_cg_cp_sbox_b57: + aes64es x2, x24, x19 # perform operation + 800074bc: 333c0133 aes64es x2,x24,x19 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b57, Zkne_aes64es_cg_cp_sbox_b57_str) + 800074c0: 00083203 ld x4,0(x16) + 800074c4: 00220c63 beq x4,x2,800074dc + 800074c8: 439032ef jal x5,8000b100 + 800074cc: 800074bc .word 0x800074bc + 800074d0: 00000000 .word 0x00000000 + 800074d4: 8001e456 .word 0x8001e456 + 800074d8: 00000000 .word 0x00000000 + 800074dc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x3a3a3a3a3a3a3a3a + 800074e0: 000cb103 ld x2,0(x25) + 800074e4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x3a3a3a3a3a3a3a3a + 800074e8: 000cbe83 ld x29,0(x25) + 800074ec: 008c8c93 addi x25,x25,8 + +00000000800074f0 : +Zkne_aes64es_cg_cp_sbox_b58: + aes64es x21, x2, x29 # perform operation + 800074f0: 33d10ab3 aes64es x21,x2,x29 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b58, Zkne_aes64es_cg_cp_sbox_b58_str) + 800074f4: 00083203 ld x4,0(x16) + 800074f8: 01520c63 beq x4,x21,80007510 + 800074fc: 405032ef jal x5,8000b100 + 80007500: 800074f0 .word 0x800074f0 + 80007504: 00000000 .word 0x00000000 + 80007508: 8001e48e .word 0x8001e48e + 8000750c: 00000000 .word 0x00000000 + 80007510: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x3b3b3b3b3b3b3b3b + 80007514: 000cb983 ld x19,0(x25) + 80007518: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x3b3b3b3b3b3b3b3b + 8000751c: 000cbc03 ld x24,0(x25) + 80007520: 008c8c93 addi x25,x25,8 + +0000000080007524 : +Zkne_aes64es_cg_cp_sbox_b59: + aes64es x6, x19, x24 # perform operation + 80007524: 33898333 aes64es x6,x19,x24 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b59, Zkne_aes64es_cg_cp_sbox_b59_str) + 80007528: 00083203 ld x4,0(x16) + 8000752c: 00620c63 beq x4,x6,80007544 + 80007530: 3d1032ef jal x5,8000b100 + 80007534: 80007524 .word 0x80007524 + 80007538: 00000000 .word 0x00000000 + 8000753c: 8001e4c6 .word 0x8001e4c6 + 80007540: 00000000 .word 0x00000000 + 80007544: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x3c3c3c3c3c3c3c3c + 80007548: 000cb603 ld x12,0(x25) + 8000754c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x3c3c3c3c3c3c3c3c + 80007550: 000cb503 ld x10,0(x25) + 80007554: 008c8c93 addi x25,x25,8 + +0000000080007558 : +Zkne_aes64es_cg_cp_sbox_b60: + aes64es x1, x12, x10 # perform operation + 80007558: 32a600b3 aes64es x1,x12,x10 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b60, Zkne_aes64es_cg_cp_sbox_b60_str) + 8000755c: 00083203 ld x4,0(x16) + 80007560: 00120c63 beq x4,x1,80007578 + 80007564: 39d032ef jal x5,8000b100 + 80007568: 80007558 .word 0x80007558 + 8000756c: 00000000 .word 0x00000000 + 80007570: 8001e4fe .word 0x8001e4fe + 80007574: 00000000 .word 0x00000000 + 80007578: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x3d3d3d3d3d3d3d3d + 8000757c: 000cb503 ld x10,0(x25) + 80007580: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x3d3d3d3d3d3d3d3d + 80007584: 000cba03 ld x20,0(x25) + 80007588: 008c8c93 addi x25,x25,8 + +000000008000758c : +Zkne_aes64es_cg_cp_sbox_b61: + aes64es x11, x10, x20 # perform operation + 8000758c: 334505b3 aes64es x11,x10,x20 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b61, Zkne_aes64es_cg_cp_sbox_b61_str) + 80007590: 00083203 ld x4,0(x16) + 80007594: 00b20c63 beq x4,x11,800075ac + 80007598: 369032ef jal x5,8000b100 + 8000759c: 8000758c .word 0x8000758c + 800075a0: 00000000 .word 0x00000000 + 800075a4: 8001e536 .word 0x8001e536 + 800075a8: 00000000 .word 0x00000000 + 800075ac: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x3e3e3e3e3e3e3e3e + 800075b0: 000cb103 ld x2,0(x25) + 800075b4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0x3e3e3e3e3e3e3e3e + 800075b8: 000cb883 ld x17,0(x25) + 800075bc: 008c8c93 addi x25,x25,8 + +00000000800075c0 : +Zkne_aes64es_cg_cp_sbox_b62: + aes64es x19, x2, x17 # perform operation + 800075c0: 331109b3 aes64es x19,x2,x17 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b62, Zkne_aes64es_cg_cp_sbox_b62_str) + 800075c4: 00083203 ld x4,0(x16) + 800075c8: 01320c63 beq x4,x19,800075e0 + 800075cc: 335032ef jal x5,8000b100 + 800075d0: 800075c0 .word 0x800075c0 + 800075d4: 00000000 .word 0x00000000 + 800075d8: 8001e56e .word 0x8001e56e + 800075dc: 00000000 .word 0x00000000 + 800075e0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x3f3f3f3f3f3f3f3f + 800075e4: 000cbb03 ld x22,0(x25) + 800075e8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x3f3f3f3f3f3f3f3f + 800075ec: 000cb603 ld x12,0(x25) + 800075f0: 008c8c93 addi x25,x25,8 + +00000000800075f4 : +Zkne_aes64es_cg_cp_sbox_b63: + aes64es x10, x22, x12 # perform operation + 800075f4: 32cb0533 aes64es x10,x22,x12 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zkne_aes64es_cg_cp_sbox_b63, Zkne_aes64es_cg_cp_sbox_b63_str) + 800075f8: 00083203 ld x4,0(x16) + 800075fc: 00a20c63 beq x4,x10,80007614 + 80007600: 301032ef jal x5,8000b100 + 80007604: 800075f4 .word 0x800075f4 + 80007608: 00000000 .word 0x00000000 + 8000760c: 8001e5a6 .word 0x8001e5a6 + 80007610: 00000000 .word 0x00000000 + 80007614: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x4040404040404040 + 80007618: 000cbd03 ld x26,0(x25) + 8000761c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x4040404040404040 + 80007620: 000cb903 ld x18,0(x25) + 80007624: 008c8c93 addi x25,x25,8 + +0000000080007628 : +Zkne_aes64es_cg_cp_sbox_b64: + aes64es x17, x26, x18 # perform operation + 80007628: 332d08b3 aes64es x17,x26,x18 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b64, Zkne_aes64es_cg_cp_sbox_b64_str) + 8000762c: 00083203 ld x4,0(x16) + 80007630: 01120c63 beq x4,x17,80007648 + 80007634: 2cd032ef jal x5,8000b100 + 80007638: 80007628 .word 0x80007628 + 8000763c: 00000000 .word 0x00000000 + 80007640: 8001e5de .word 0x8001e5de + 80007644: 00000000 .word 0x00000000 + 80007648: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x4141414141414141 + 8000764c: 000cbc03 ld x24,0(x25) + 80007650: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x4141414141414141 + 80007654: 000cb483 ld x9,0(x25) + 80007658: 008c8c93 addi x25,x25,8 + +000000008000765c : +Zkne_aes64es_cg_cp_sbox_b65: + aes64es x11, x24, x9 # perform operation + 8000765c: 329c05b3 aes64es x11,x24,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b65, Zkne_aes64es_cg_cp_sbox_b65_str) + 80007660: 00083203 ld x4,0(x16) + 80007664: 00b20c63 beq x4,x11,8000767c + 80007668: 299032ef jal x5,8000b100 + 8000766c: 8000765c .word 0x8000765c + 80007670: 00000000 .word 0x00000000 + 80007674: 8001e616 .word 0x8001e616 + 80007678: 00000000 .word 0x00000000 + 8000767c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x4242424242424242 + 80007680: 000cb383 ld x7,0(x25) + 80007684: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x4242424242424242 + 80007688: 000cb783 ld x15,0(x25) + 8000768c: 008c8c93 addi x25,x25,8 + +0000000080007690 : +Zkne_aes64es_cg_cp_sbox_b66: + aes64es x29, x7, x15 # perform operation + 80007690: 32f38eb3 aes64es x29,x7,x15 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b66, Zkne_aes64es_cg_cp_sbox_b66_str) + 80007694: 00083203 ld x4,0(x16) + 80007698: 01d20c63 beq x4,x29,800076b0 + 8000769c: 265032ef jal x5,8000b100 + 800076a0: 80007690 .word 0x80007690 + 800076a4: 00000000 .word 0x00000000 + 800076a8: 8001e64e .word 0x8001e64e + 800076ac: 00000000 .word 0x00000000 + 800076b0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x4343434343434343 + 800076b4: 000cb583 ld x11,0(x25) + 800076b8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x4343434343434343 + 800076bc: 000cb503 ld x10,0(x25) + 800076c0: 008c8c93 addi x25,x25,8 + +00000000800076c4 : +Zkne_aes64es_cg_cp_sbox_b67: + aes64es x23, x11, x10 # perform operation + 800076c4: 32a58bb3 aes64es x23,x11,x10 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zkne_aes64es_cg_cp_sbox_b67, Zkne_aes64es_cg_cp_sbox_b67_str) + 800076c8: 00083203 ld x4,0(x16) + 800076cc: 01720c63 beq x4,x23,800076e4 + 800076d0: 231032ef jal x5,8000b100 + 800076d4: 800076c4 .word 0x800076c4 + 800076d8: 00000000 .word 0x00000000 + 800076dc: 8001e686 .word 0x8001e686 + 800076e0: 00000000 .word 0x00000000 + 800076e4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x4444444444444444 + 800076e8: 000cba03 ld x20,0(x25) + 800076ec: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x4444444444444444 + 800076f0: 000cb383 ld x7,0(x25) + 800076f4: 008c8c93 addi x25,x25,8 + +00000000800076f8 : +Zkne_aes64es_cg_cp_sbox_b68: + aes64es x23, x20, x7 # perform operation + 800076f8: 327a0bb3 aes64es x23,x20,x7 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zkne_aes64es_cg_cp_sbox_b68, Zkne_aes64es_cg_cp_sbox_b68_str) + 800076fc: 00083203 ld x4,0(x16) + 80007700: 01720c63 beq x4,x23,80007718 + 80007704: 1fd032ef jal x5,8000b100 + 80007708: 800076f8 .word 0x800076f8 + 8000770c: 00000000 .word 0x00000000 + 80007710: 8001e6be .word 0x8001e6be + 80007714: 00000000 .word 0x00000000 + 80007718: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x4545454545454545 + 8000771c: 000cb903 ld x18,0(x25) + 80007720: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x4545454545454545 + 80007724: 000cbd03 ld x26,0(x25) + 80007728: 008c8c93 addi x25,x25,8 + +000000008000772c : +Zkne_aes64es_cg_cp_sbox_b69: + aes64es x17, x18, x26 # perform operation + 8000772c: 33a908b3 aes64es x17,x18,x26 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b69, Zkne_aes64es_cg_cp_sbox_b69_str) + 80007730: 00083203 ld x4,0(x16) + 80007734: 01120c63 beq x4,x17,8000774c + 80007738: 1c9032ef jal x5,8000b100 + 8000773c: 8000772c .word 0x8000772c + 80007740: 00000000 .word 0x00000000 + 80007744: 8001e6f6 .word 0x8001e6f6 + 80007748: 00000000 .word 0x00000000 + 8000774c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x4646464646464646 + 80007750: 000cb783 ld x15,0(x25) + 80007754: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x4646464646464646 + 80007758: 000cb083 ld x1,0(x25) + 8000775c: 008c8c93 addi x25,x25,8 + +0000000080007760 : +Zkne_aes64es_cg_cp_sbox_b70: + aes64es x29, x15, x1 # perform operation + 80007760: 32178eb3 aes64es x29,x15,x1 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b70, Zkne_aes64es_cg_cp_sbox_b70_str) + 80007764: 00083203 ld x4,0(x16) + 80007768: 01d20c63 beq x4,x29,80007780 + 8000776c: 195032ef jal x5,8000b100 + 80007770: 80007760 .word 0x80007760 + 80007774: 00000000 .word 0x00000000 + 80007778: 8001e72e .word 0x8001e72e + 8000777c: 00000000 .word 0x00000000 + 80007780: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x4747474747474747 + 80007784: 000cb483 ld x9,0(x25) + 80007788: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x4747474747474747 + 8000778c: 000cb583 ld x11,0(x25) + 80007790: 008c8c93 addi x25,x25,8 + +0000000080007794 : +Zkne_aes64es_cg_cp_sbox_b71: + aes64es x8, x9, x11 # perform operation + 80007794: 32b48433 aes64es x8,x9,x11 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b71, Zkne_aes64es_cg_cp_sbox_b71_str) + 80007798: 00083203 ld x4,0(x16) + 8000779c: 00820c63 beq x4,x8,800077b4 + 800077a0: 161032ef jal x5,8000b100 + 800077a4: 80007794 .word 0x80007794 + 800077a8: 00000000 .word 0x00000000 + 800077ac: 8001e766 .word 0x8001e766 + 800077b0: 00000000 .word 0x00000000 + 800077b4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0x4848484848484848 + 800077b8: 000cb183 ld x3,0(x25) + 800077bc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0x4848484848484848 + 800077c0: 000cb103 ld x2,0(x25) + 800077c4: 008c8c93 addi x25,x25,8 + +00000000800077c8 : +Zkne_aes64es_cg_cp_sbox_b72: + aes64es x21, x3, x2 # perform operation + 800077c8: 32218ab3 aes64es x21,x3,x2 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b72, Zkne_aes64es_cg_cp_sbox_b72_str) + 800077cc: 00083203 ld x4,0(x16) + 800077d0: 01520c63 beq x4,x21,800077e8 + 800077d4: 12d032ef jal x5,8000b100 + 800077d8: 800077c8 .word 0x800077c8 + 800077dc: 00000000 .word 0x00000000 + 800077e0: 8001e79e .word 0x8001e79e + 800077e4: 00000000 .word 0x00000000 + 800077e8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x4949494949494949 + 800077ec: 000cb703 ld x14,0(x25) + 800077f0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x4949494949494949 + 800077f4: 000cb403 ld x8,0(x25) + 800077f8: 008c8c93 addi x25,x25,8 + +00000000800077fc : +Zkne_aes64es_cg_cp_sbox_b73: + aes64es x9, x14, x8 # perform operation + 800077fc: 328704b3 aes64es x9,x14,x8 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b73, Zkne_aes64es_cg_cp_sbox_b73_str) + 80007800: 00083203 ld x4,0(x16) + 80007804: 00920c63 beq x4,x9,8000781c + 80007808: 0f9032ef jal x5,8000b100 + 8000780c: 800077fc .word 0x800077fc + 80007810: 00000000 .word 0x00000000 + 80007814: 8001e7d6 .word 0x8001e7d6 + 80007818: 00000000 .word 0x00000000 + 8000781c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x4a4a4a4a4a4a4a4a + 80007820: 000cb983 ld x19,0(x25) + 80007824: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x4a4a4a4a4a4a4a4a + 80007828: 000cb583 ld x11,0(x25) + 8000782c: 008c8c93 addi x25,x25,8 + +0000000080007830 : +Zkne_aes64es_cg_cp_sbox_b74: + aes64es x27, x19, x11 # perform operation + 80007830: 32b98db3 aes64es x27,x19,x11 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b74, Zkne_aes64es_cg_cp_sbox_b74_str) + 80007834: 00083203 ld x4,0(x16) + 80007838: 01b20c63 beq x4,x27,80007850 + 8000783c: 0c5032ef jal x5,8000b100 + 80007840: 80007830 .word 0x80007830 + 80007844: 00000000 .word 0x00000000 + 80007848: 8001e80e .word 0x8001e80e + 8000784c: 00000000 .word 0x00000000 + 80007850: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x4b4b4b4b4b4b4b4b + 80007854: 000cb603 ld x12,0(x25) + 80007858: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x4b4b4b4b4b4b4b4b + 8000785c: 000cb403 ld x8,0(x25) + 80007860: 008c8c93 addi x25,x25,8 + +0000000080007864 : +Zkne_aes64es_cg_cp_sbox_b75: + aes64es x31, x12, x8 # perform operation + 80007864: 32860fb3 aes64es x31,x12,x8 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b75, Zkne_aes64es_cg_cp_sbox_b75_str) + 80007868: 00083203 ld x4,0(x16) + 8000786c: 01f20c63 beq x4,x31,80007884 + 80007870: 091032ef jal x5,8000b100 + 80007874: 80007864 .word 0x80007864 + 80007878: 00000000 .word 0x00000000 + 8000787c: 8001e846 .word 0x8001e846 + 80007880: 00000000 .word 0x00000000 + 80007884: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x4c4c4c4c4c4c4c4c + 80007888: 000cb103 ld x2,0(x25) + 8000788c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x4c4c4c4c4c4c4c4c + 80007890: 000cb583 ld x11,0(x25) + 80007894: 008c8c93 addi x25,x25,8 + +0000000080007898 : +Zkne_aes64es_cg_cp_sbox_b76: + aes64es x24, x2, x11 # perform operation + 80007898: 32b10c33 aes64es x24,x2,x11 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b76, Zkne_aes64es_cg_cp_sbox_b76_str) + 8000789c: 00083203 ld x4,0(x16) + 800078a0: 01820c63 beq x4,x24,800078b8 + 800078a4: 05d032ef jal x5,8000b100 + 800078a8: 80007898 .word 0x80007898 + 800078ac: 00000000 .word 0x00000000 + 800078b0: 8001e87e .word 0x8001e87e + 800078b4: 00000000 .word 0x00000000 + 800078b8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x4d4d4d4d4d4d4d4d + 800078bc: 000cb403 ld x8,0(x25) + 800078c0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x4d4d4d4d4d4d4d4d + 800078c4: 000cb383 ld x7,0(x25) + 800078c8: 008c8c93 addi x25,x25,8 + +00000000800078cc : +Zkne_aes64es_cg_cp_sbox_b77: + aes64es x28, x8, x7 # perform operation + 800078cc: 32740e33 aes64es x28,x8,x7 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b77, Zkne_aes64es_cg_cp_sbox_b77_str) + 800078d0: 00083203 ld x4,0(x16) + 800078d4: 01c20c63 beq x4,x28,800078ec + 800078d8: 029032ef jal x5,8000b100 + 800078dc: 800078cc .word 0x800078cc + 800078e0: 00000000 .word 0x00000000 + 800078e4: 8001e8b6 .word 0x8001e8b6 + 800078e8: 00000000 .word 0x00000000 + 800078ec: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0x4e4e4e4e4e4e4e4e + 800078f0: 000cb183 ld x3,0(x25) + 800078f4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0x4e4e4e4e4e4e4e4e + 800078f8: 000cb883 ld x17,0(x25) + 800078fc: 008c8c93 addi x25,x25,8 + +0000000080007900 : +Zkne_aes64es_cg_cp_sbox_b78: + aes64es x8, x3, x17 # perform operation + 80007900: 33118433 aes64es x8,x3,x17 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b78, Zkne_aes64es_cg_cp_sbox_b78_str) + 80007904: 00083203 ld x4,0(x16) + 80007908: 00820c63 beq x4,x8,80007920 + 8000790c: 7f4032ef jal x5,8000b100 + 80007910: 80007900 .word 0x80007900 + 80007914: 00000000 .word 0x00000000 + 80007918: 8001e8ee .word 0x8001e8ee + 8000791c: 00000000 .word 0x00000000 + 80007920: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x4f4f4f4f4f4f4f4f + 80007924: 000cb883 ld x17,0(x25) + 80007928: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0x4f4f4f4f4f4f4f4f + 8000792c: 000cbe03 ld x28,0(x25) + 80007930: 008c8c93 addi x25,x25,8 + +0000000080007934 : +Zkne_aes64es_cg_cp_sbox_b79: + aes64es x21, x17, x28 # perform operation + 80007934: 33c88ab3 aes64es x21,x17,x28 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b79, Zkne_aes64es_cg_cp_sbox_b79_str) + 80007938: 00083203 ld x4,0(x16) + 8000793c: 01520c63 beq x4,x21,80007954 + 80007940: 7c0032ef jal x5,8000b100 + 80007944: 80007934 .word 0x80007934 + 80007948: 00000000 .word 0x00000000 + 8000794c: 8001e926 .word 0x8001e926 + 80007950: 00000000 .word 0x00000000 + 80007954: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x5050505050505050 + 80007958: 000cb403 ld x8,0(x25) + 8000795c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x5050505050505050 + 80007960: 000cbb83 ld x23,0(x25) + 80007964: 008c8c93 addi x25,x25,8 + +0000000080007968 : +Zkne_aes64es_cg_cp_sbox_b80: + aes64es x15, x8, x23 # perform operation + 80007968: 337407b3 aes64es x15,x8,x23 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b80, Zkne_aes64es_cg_cp_sbox_b80_str) + 8000796c: 00083203 ld x4,0(x16) + 80007970: 00f20c63 beq x4,x15,80007988 + 80007974: 78c032ef jal x5,8000b100 + 80007978: 80007968 .word 0x80007968 + 8000797c: 00000000 .word 0x00000000 + 80007980: 8001e95e .word 0x8001e95e + 80007984: 00000000 .word 0x00000000 + 80007988: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x5151515151515151 + 8000798c: 000cb083 ld x1,0(x25) + 80007990: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x5151515151515151 + 80007994: 000cba83 ld x21,0(x25) + 80007998: 008c8c93 addi x25,x25,8 + +000000008000799c : +Zkne_aes64es_cg_cp_sbox_b81: + aes64es x3, x1, x21 # perform operation + 8000799c: 335081b3 aes64es x3,x1,x21 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b81, Zkne_aes64es_cg_cp_sbox_b81_str) + 800079a0: 00083203 ld x4,0(x16) + 800079a4: 00320c63 beq x4,x3,800079bc + 800079a8: 758032ef jal x5,8000b100 + 800079ac: 8000799c .word 0x8000799c + 800079b0: 00000000 .word 0x00000000 + 800079b4: 8001e996 .word 0x8001e996 + 800079b8: 00000000 .word 0x00000000 + 800079bc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x5252525252525252 + 800079c0: 000cb983 ld x19,0(x25) + 800079c4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x5252525252525252 + 800079c8: 000cbe83 ld x29,0(x25) + 800079cc: 008c8c93 addi x25,x25,8 + +00000000800079d0 : +Zkne_aes64es_cg_cp_sbox_b82: + aes64es x24, x19, x29 # perform operation + 800079d0: 33d98c33 aes64es x24,x19,x29 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b82, Zkne_aes64es_cg_cp_sbox_b82_str) + 800079d4: 00083203 ld x4,0(x16) + 800079d8: 01820c63 beq x4,x24,800079f0 + 800079dc: 724032ef jal x5,8000b100 + 800079e0: 800079d0 .word 0x800079d0 + 800079e4: 00000000 .word 0x00000000 + 800079e8: 8001e9ce .word 0x8001e9ce + 800079ec: 00000000 .word 0x00000000 + 800079f0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x5353535353535353 + 800079f4: 000cbf83 ld x31,0(x25) + 800079f8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x5353535353535353 + 800079fc: 000cb183 ld x3,0(x25) + 80007a00: 008c8c93 addi x25,x25,8 + +0000000080007a04 : +Zkne_aes64es_cg_cp_sbox_b83: + aes64es x6, x31, x3 # perform operation + 80007a04: 323f8333 aes64es x6,x31,x3 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b83, Zkne_aes64es_cg_cp_sbox_b83_str) + 80007a08: 00083203 ld x4,0(x16) + 80007a0c: 00620c63 beq x4,x6,80007a24 + 80007a10: 6f0032ef jal x5,8000b100 + 80007a14: 80007a04 .word 0x80007a04 + 80007a18: 00000000 .word 0x00000000 + 80007a1c: 8001ea06 .word 0x8001ea06 + 80007a20: 00000000 .word 0x00000000 + 80007a24: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x5454545454545454 + 80007a28: 000cb603 ld x12,0(x25) + 80007a2c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x5454545454545454 + 80007a30: 000cb483 ld x9,0(x25) + 80007a34: 008c8c93 addi x25,x25,8 + +0000000080007a38 : +Zkne_aes64es_cg_cp_sbox_b84: + aes64es x11, x12, x9 # perform operation + 80007a38: 329605b3 aes64es x11,x12,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b84, Zkne_aes64es_cg_cp_sbox_b84_str) + 80007a3c: 00083203 ld x4,0(x16) + 80007a40: 00b20c63 beq x4,x11,80007a58 + 80007a44: 6bc032ef jal x5,8000b100 + 80007a48: 80007a38 .word 0x80007a38 + 80007a4c: 00000000 .word 0x00000000 + 80007a50: 8001ea3e .word 0x8001ea3e + 80007a54: 00000000 .word 0x00000000 + 80007a58: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x5555555555555555 + 80007a5c: 000cb103 ld x2,0(x25) + 80007a60: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x5555555555555555 + 80007a64: 000cb703 ld x14,0(x25) + 80007a68: 008c8c93 addi x25,x25,8 + +0000000080007a6c : +Zkne_aes64es_cg_cp_sbox_b85: + aes64es x13, x2, x14 # perform operation + 80007a6c: 32e106b3 aes64es x13,x2,x14 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b85, Zkne_aes64es_cg_cp_sbox_b85_str) + 80007a70: 00083203 ld x4,0(x16) + 80007a74: 00d20c63 beq x4,x13,80007a8c + 80007a78: 688032ef jal x5,8000b100 + 80007a7c: 80007a6c .word 0x80007a6c + 80007a80: 00000000 .word 0x00000000 + 80007a84: 8001ea76 .word 0x8001ea76 + 80007a88: 00000000 .word 0x00000000 + 80007a8c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x5656565656565656 + 80007a90: 000cbd83 ld x27,0(x25) + 80007a94: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x5656565656565656 + 80007a98: 000cbb83 ld x23,0(x25) + 80007a9c: 008c8c93 addi x25,x25,8 + +0000000080007aa0 : +Zkne_aes64es_cg_cp_sbox_b86: + aes64es x7, x27, x23 # perform operation + 80007aa0: 337d83b3 aes64es x7,x27,x23 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b86, Zkne_aes64es_cg_cp_sbox_b86_str) + 80007aa4: 00083203 ld x4,0(x16) + 80007aa8: 00720c63 beq x4,x7,80007ac0 + 80007aac: 654032ef jal x5,8000b100 + 80007ab0: 80007aa0 .word 0x80007aa0 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 8001eaae .word 0x8001eaae + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x5757575757575757 + 80007ac4: 000cba83 ld x21,0(x25) + 80007ac8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x5757575757575757 + 80007acc: 000cb603 ld x12,0(x25) + 80007ad0: 008c8c93 addi x25,x25,8 + +0000000080007ad4 : +Zkne_aes64es_cg_cp_sbox_b87: + aes64es x27, x21, x12 # perform operation + 80007ad4: 32ca8db3 aes64es x27,x21,x12 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b87, Zkne_aes64es_cg_cp_sbox_b87_str) + 80007ad8: 00083203 ld x4,0(x16) + 80007adc: 01b20c63 beq x4,x27,80007af4 + 80007ae0: 620032ef jal x5,8000b100 + 80007ae4: 80007ad4 .word 0x80007ad4 + 80007ae8: 00000000 .word 0x00000000 + 80007aec: 8001eae6 .word 0x8001eae6 + 80007af0: 00000000 .word 0x00000000 + 80007af4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x5858585858585858 + 80007af8: 000cbf03 ld x30,0(x25) + 80007afc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x5858585858585858 + 80007b00: 000cb483 ld x9,0(x25) + 80007b04: 008c8c93 addi x25,x25,8 + +0000000080007b08 : +Zkne_aes64es_cg_cp_sbox_b88: + aes64es x28, x30, x9 # perform operation + 80007b08: 329f0e33 aes64es x28,x30,x9 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b88, Zkne_aes64es_cg_cp_sbox_b88_str) + 80007b0c: 00083203 ld x4,0(x16) + 80007b10: 01c20c63 beq x4,x28,80007b28 + 80007b14: 5ec032ef jal x5,8000b100 + 80007b18: 80007b08 .word 0x80007b08 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 8001eb1e .word 0x8001eb1e + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x5959595959595959 + 80007b2c: 000cb303 ld x6,0(x25) + 80007b30: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x5959595959595959 + 80007b34: 000cb183 ld x3,0(x25) + 80007b38: 008c8c93 addi x25,x25,8 + +0000000080007b3c : +Zkne_aes64es_cg_cp_sbox_b89: + aes64es x11, x6, x3 # perform operation + 80007b3c: 323305b3 aes64es x11,x6,x3 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b89, Zkne_aes64es_cg_cp_sbox_b89_str) + 80007b40: 00083203 ld x4,0(x16) + 80007b44: 00b20c63 beq x4,x11,80007b5c + 80007b48: 5b8032ef jal x5,8000b100 + 80007b4c: 80007b3c .word 0x80007b3c + 80007b50: 00000000 .word 0x00000000 + 80007b54: 8001eb56 .word 0x8001eb56 + 80007b58: 00000000 .word 0x00000000 + 80007b5c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x5a5a5a5a5a5a5a5a + 80007b60: 000cbc03 ld x24,0(x25) + 80007b64: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x5a5a5a5a5a5a5a5a + 80007b68: 000cb583 ld x11,0(x25) + 80007b6c: 008c8c93 addi x25,x25,8 + +0000000080007b70 : +Zkne_aes64es_cg_cp_sbox_b90: + aes64es x22, x24, x11 # perform operation + 80007b70: 32bc0b33 aes64es x22,x24,x11 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64es_cg_cp_sbox_b90, Zkne_aes64es_cg_cp_sbox_b90_str) + 80007b74: 00083203 ld x4,0(x16) + 80007b78: 01620c63 beq x4,x22,80007b90 + 80007b7c: 584032ef jal x5,8000b100 + 80007b80: 80007b70 .word 0x80007b70 + 80007b84: 00000000 .word 0x00000000 + 80007b88: 8001eb8e .word 0x8001eb8e + 80007b8c: 00000000 .word 0x00000000 + 80007b90: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x5b5b5b5b5b5b5b5b + 80007b94: 000cba83 ld x21,0(x25) + 80007b98: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x5b5b5b5b5b5b5b5b + 80007b9c: 000cb683 ld x13,0(x25) + 80007ba0: 008c8c93 addi x25,x25,8 + +0000000080007ba4 : +Zkne_aes64es_cg_cp_sbox_b91: + aes64es x31, x21, x13 # perform operation + 80007ba4: 32da8fb3 aes64es x31,x21,x13 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b91, Zkne_aes64es_cg_cp_sbox_b91_str) + 80007ba8: 00083203 ld x4,0(x16) + 80007bac: 01f20c63 beq x4,x31,80007bc4 + 80007bb0: 550032ef jal x5,8000b100 + 80007bb4: 80007ba4 .word 0x80007ba4 + 80007bb8: 00000000 .word 0x00000000 + 80007bbc: 8001ebc6 .word 0x8001ebc6 + 80007bc0: 00000000 .word 0x00000000 + 80007bc4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x5c5c5c5c5c5c5c5c + 80007bc8: 000cb983 ld x19,0(x25) + 80007bcc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x5c5c5c5c5c5c5c5c + 80007bd0: 000cb683 ld x13,0(x25) + 80007bd4: 008c8c93 addi x25,x25,8 + +0000000080007bd8 : +Zkne_aes64es_cg_cp_sbox_b92: + aes64es x12, x19, x13 # perform operation + 80007bd8: 32d98633 aes64es x12,x19,x13 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b92, Zkne_aes64es_cg_cp_sbox_b92_str) + 80007bdc: 00083203 ld x4,0(x16) + 80007be0: 00c20c63 beq x4,x12,80007bf8 + 80007be4: 51c032ef jal x5,8000b100 + 80007be8: 80007bd8 .word 0x80007bd8 + 80007bec: 00000000 .word 0x00000000 + 80007bf0: 8001ebfe .word 0x8001ebfe + 80007bf4: 00000000 .word 0x00000000 + 80007bf8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x5d5d5d5d5d5d5d5d + 80007bfc: 000cb683 ld x13,0(x25) + 80007c00: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x5d5d5d5d5d5d5d5d + 80007c04: 000cb603 ld x12,0(x25) + 80007c08: 008c8c93 addi x25,x25,8 + +0000000080007c0c : +Zkne_aes64es_cg_cp_sbox_b93: + aes64es x20, x13, x12 # perform operation + 80007c0c: 32c68a33 aes64es x20,x13,x12 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zkne_aes64es_cg_cp_sbox_b93, Zkne_aes64es_cg_cp_sbox_b93_str) + 80007c10: 00083203 ld x4,0(x16) + 80007c14: 01420c63 beq x4,x20,80007c2c + 80007c18: 4e8032ef jal x5,8000b100 + 80007c1c: 80007c0c .word 0x80007c0c + 80007c20: 00000000 .word 0x00000000 + 80007c24: 8001ec36 .word 0x8001ec36 + 80007c28: 00000000 .word 0x00000000 + 80007c2c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x5e5e5e5e5e5e5e5e + 80007c30: 000cbf83 ld x31,0(x25) + 80007c34: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x5e5e5e5e5e5e5e5e + 80007c38: 000cb703 ld x14,0(x25) + 80007c3c: 008c8c93 addi x25,x25,8 + +0000000080007c40 : +Zkne_aes64es_cg_cp_sbox_b94: + aes64es x12, x31, x14 # perform operation + 80007c40: 32ef8633 aes64es x12,x31,x14 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b94, Zkne_aes64es_cg_cp_sbox_b94_str) + 80007c44: 00083203 ld x4,0(x16) + 80007c48: 00c20c63 beq x4,x12,80007c60 + 80007c4c: 4b4032ef jal x5,8000b100 + 80007c50: 80007c40 .word 0x80007c40 + 80007c54: 00000000 .word 0x00000000 + 80007c58: 8001ec6e .word 0x8001ec6e + 80007c5c: 00000000 .word 0x00000000 + 80007c60: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x5f5f5f5f5f5f5f5f + 80007c64: 000cbc03 ld x24,0(x25) + 80007c68: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x5f5f5f5f5f5f5f5f + 80007c6c: 000cb603 ld x12,0(x25) + 80007c70: 008c8c93 addi x25,x25,8 + +0000000080007c74 : +Zkne_aes64es_cg_cp_sbox_b95: + aes64es x6, x24, x12 # perform operation + 80007c74: 32cc0333 aes64es x6,x24,x12 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b95, Zkne_aes64es_cg_cp_sbox_b95_str) + 80007c78: 00083203 ld x4,0(x16) + 80007c7c: 00620c63 beq x4,x6,80007c94 + 80007c80: 480032ef jal x5,8000b100 + 80007c84: 80007c74 .word 0x80007c74 + 80007c88: 00000000 .word 0x00000000 + 80007c8c: 8001eca6 .word 0x8001eca6 + 80007c90: 00000000 .word 0x00000000 + 80007c94: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x6060606060606060 + 80007c98: 000cb503 ld x10,0(x25) + 80007c9c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x6060606060606060 + 80007ca0: 000cb583 ld x11,0(x25) + 80007ca4: 008c8c93 addi x25,x25,8 + +0000000080007ca8 : +Zkne_aes64es_cg_cp_sbox_b96: + aes64es x1, x10, x11 # perform operation + 80007ca8: 32b500b3 aes64es x1,x10,x11 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b96, Zkne_aes64es_cg_cp_sbox_b96_str) + 80007cac: 00083203 ld x4,0(x16) + 80007cb0: 00120c63 beq x4,x1,80007cc8 + 80007cb4: 44c032ef jal x5,8000b100 + 80007cb8: 80007ca8 .word 0x80007ca8 + 80007cbc: 00000000 .word 0x00000000 + 80007cc0: 8001ecde .word 0x8001ecde + 80007cc4: 00000000 .word 0x00000000 + 80007cc8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x6161616161616161 + 80007ccc: 000cb703 ld x14,0(x25) + 80007cd0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x6161616161616161 + 80007cd4: 000cbf83 ld x31,0(x25) + 80007cd8: 008c8c93 addi x25,x25,8 + +0000000080007cdc : +Zkne_aes64es_cg_cp_sbox_b97: + aes64es x8, x14, x31 # perform operation + 80007cdc: 33f70433 aes64es x8,x14,x31 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b97, Zkne_aes64es_cg_cp_sbox_b97_str) + 80007ce0: 00083203 ld x4,0(x16) + 80007ce4: 00820c63 beq x4,x8,80007cfc + 80007ce8: 418032ef jal x5,8000b100 + 80007cec: 80007cdc .word 0x80007cdc + 80007cf0: 00000000 .word 0x00000000 + 80007cf4: 8001ed16 .word 0x8001ed16 + 80007cf8: 00000000 .word 0x00000000 + 80007cfc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x6262626262626262 + 80007d00: 000cbf83 ld x31,0(x25) + 80007d04: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x6262626262626262 + 80007d08: 000cb483 ld x9,0(x25) + 80007d0c: 008c8c93 addi x25,x25,8 + +0000000080007d10 : +Zkne_aes64es_cg_cp_sbox_b98: + aes64es x13, x31, x9 # perform operation + 80007d10: 329f86b3 aes64es x13,x31,x9 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b98, Zkne_aes64es_cg_cp_sbox_b98_str) + 80007d14: 00083203 ld x4,0(x16) + 80007d18: 00d20c63 beq x4,x13,80007d30 + 80007d1c: 3e4032ef jal x5,8000b100 + 80007d20: 80007d10 .word 0x80007d10 + 80007d24: 00000000 .word 0x00000000 + 80007d28: 8001ed4e .word 0x8001ed4e + 80007d2c: 00000000 .word 0x00000000 + 80007d30: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x6363636363636363 + 80007d34: 000cbf03 ld x30,0(x25) + 80007d38: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x6363636363636363 + 80007d3c: 000cb483 ld x9,0(x25) + 80007d40: 008c8c93 addi x25,x25,8 + +0000000080007d44 : +Zkne_aes64es_cg_cp_sbox_b99: + aes64es x18, x30, x9 # perform operation + 80007d44: 329f0933 aes64es x18,x30,x9 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b99, Zkne_aes64es_cg_cp_sbox_b99_str) + 80007d48: 00083203 ld x4,0(x16) + 80007d4c: 01220c63 beq x4,x18,80007d64 + 80007d50: 3b0032ef jal x5,8000b100 + 80007d54: 80007d44 .word 0x80007d44 + 80007d58: 00000000 .word 0x00000000 + 80007d5c: 8001ed86 .word 0x8001ed86 + 80007d60: 00000000 .word 0x00000000 + 80007d64: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x6464646464646464 + 80007d68: 000cbc03 ld x24,0(x25) + 80007d6c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x6464646464646464 + 80007d70: 000cb583 ld x11,0(x25) + 80007d74: 008c8c93 addi x25,x25,8 + +0000000080007d78 : +Zkne_aes64es_cg_cp_sbox_b100: + aes64es x19, x24, x11 # perform operation + 80007d78: 32bc09b3 aes64es x19,x24,x11 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b100, Zkne_aes64es_cg_cp_sbox_b100_str) + 80007d7c: 00083203 ld x4,0(x16) + 80007d80: 01320c63 beq x4,x19,80007d98 + 80007d84: 37c032ef jal x5,8000b100 + 80007d88: 80007d78 .word 0x80007d78 + 80007d8c: 00000000 .word 0x00000000 + 80007d90: 8001edbe .word 0x8001edbe + 80007d94: 00000000 .word 0x00000000 + 80007d98: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x6565656565656565 + 80007d9c: 000cba03 ld x20,0(x25) + 80007da0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x6565656565656565 + 80007da4: 000cbb83 ld x23,0(x25) + 80007da8: 008c8c93 addi x25,x25,8 + +0000000080007dac : +Zkne_aes64es_cg_cp_sbox_b101: + aes64es x2, x20, x23 # perform operation + 80007dac: 337a0133 aes64es x2,x20,x23 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b101, Zkne_aes64es_cg_cp_sbox_b101_str) + 80007db0: 00083203 ld x4,0(x16) + 80007db4: 00220c63 beq x4,x2,80007dcc + 80007db8: 348032ef jal x5,8000b100 + 80007dbc: 80007dac .word 0x80007dac + 80007dc0: 00000000 .word 0x00000000 + 80007dc4: 8001edf7 .word 0x8001edf7 + 80007dc8: 00000000 .word 0x00000000 + 80007dcc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x6666666666666666 + 80007dd0: 000cbb83 ld x23,0(x25) + 80007dd4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x6666666666666666 + 80007dd8: 000cbf83 ld x31,0(x25) + 80007ddc: 008c8c93 addi x25,x25,8 + +0000000080007de0 : +Zkne_aes64es_cg_cp_sbox_b102: + aes64es x26, x23, x31 # perform operation + 80007de0: 33fb8d33 aes64es x26,x23,x31 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b102, Zkne_aes64es_cg_cp_sbox_b102_str) + 80007de4: 00083203 ld x4,0(x16) + 80007de8: 01a20c63 beq x4,x26,80007e00 + 80007dec: 314032ef jal x5,8000b100 + 80007df0: 80007de0 .word 0x80007de0 + 80007df4: 00000000 .word 0x00000000 + 80007df8: 8001ee30 .word 0x8001ee30 + 80007dfc: 00000000 .word 0x00000000 + 80007e00: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x6767676767676767 + 80007e04: 000cb703 ld x14,0(x25) + 80007e08: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x6767676767676767 + 80007e0c: 000cbe83 ld x29,0(x25) + 80007e10: 008c8c93 addi x25,x25,8 + +0000000080007e14 : +Zkne_aes64es_cg_cp_sbox_b103: + aes64es x21, x14, x29 # perform operation + 80007e14: 33d70ab3 aes64es x21,x14,x29 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b103, Zkne_aes64es_cg_cp_sbox_b103_str) + 80007e18: 00083203 ld x4,0(x16) + 80007e1c: 01520c63 beq x4,x21,80007e34 + 80007e20: 2e0032ef jal x5,8000b100 + 80007e24: 80007e14 .word 0x80007e14 + 80007e28: 00000000 .word 0x00000000 + 80007e2c: 8001ee69 .word 0x8001ee69 + 80007e30: 00000000 .word 0x00000000 + 80007e34: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x6868686868686868 + 80007e38: 000cbf03 ld x30,0(x25) + 80007e3c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x6868686868686868 + 80007e40: 000cbf83 ld x31,0(x25) + 80007e44: 008c8c93 addi x25,x25,8 + +0000000080007e48 : +Zkne_aes64es_cg_cp_sbox_b104: + aes64es x22, x30, x31 # perform operation + 80007e48: 33ff0b33 aes64es x22,x30,x31 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64es_cg_cp_sbox_b104, Zkne_aes64es_cg_cp_sbox_b104_str) + 80007e4c: 00083203 ld x4,0(x16) + 80007e50: 01620c63 beq x4,x22,80007e68 + 80007e54: 2ac032ef jal x5,8000b100 + 80007e58: 80007e48 .word 0x80007e48 + 80007e5c: 00000000 .word 0x00000000 + 80007e60: 8001eea2 .word 0x8001eea2 + 80007e64: 00000000 .word 0x00000000 + 80007e68: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x6969696969696969 + 80007e6c: 000cbd03 ld x26,0(x25) + 80007e70: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0x6969696969696969 + 80007e74: 000cbf83 ld x31,0(x25) + 80007e78: 008c8c93 addi x25,x25,8 + +0000000080007e7c : +Zkne_aes64es_cg_cp_sbox_b105: + aes64es x11, x26, x31 # perform operation + 80007e7c: 33fd05b3 aes64es x11,x26,x31 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b105, Zkne_aes64es_cg_cp_sbox_b105_str) + 80007e80: 00083203 ld x4,0(x16) + 80007e84: 00b20c63 beq x4,x11,80007e9c + 80007e88: 278032ef jal x5,8000b100 + 80007e8c: 80007e7c .word 0x80007e7c + 80007e90: 00000000 .word 0x00000000 + 80007e94: 8001eedb .word 0x8001eedb + 80007e98: 00000000 .word 0x00000000 + 80007e9c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x6a6a6a6a6a6a6a6a + 80007ea0: 000cb503 ld x10,0(x25) + 80007ea4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x6a6a6a6a6a6a6a6a + 80007ea8: 000cb483 ld x9,0(x25) + 80007eac: 008c8c93 addi x25,x25,8 + +0000000080007eb0 : +Zkne_aes64es_cg_cp_sbox_b106: + aes64es x13, x10, x9 # perform operation + 80007eb0: 329506b3 aes64es x13,x10,x9 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b106, Zkne_aes64es_cg_cp_sbox_b106_str) + 80007eb4: 00083203 ld x4,0(x16) + 80007eb8: 00d20c63 beq x4,x13,80007ed0 + 80007ebc: 244032ef jal x5,8000b100 + 80007ec0: 80007eb0 .word 0x80007eb0 + 80007ec4: 00000000 .word 0x00000000 + 80007ec8: 8001ef14 .word 0x8001ef14 + 80007ecc: 00000000 .word 0x00000000 + 80007ed0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x6b6b6b6b6b6b6b6b + 80007ed4: 000cbc03 ld x24,0(x25) + 80007ed8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x6b6b6b6b6b6b6b6b + 80007edc: 000cb703 ld x14,0(x25) + 80007ee0: 008c8c93 addi x25,x25,8 + +0000000080007ee4 : +Zkne_aes64es_cg_cp_sbox_b107: + aes64es x11, x24, x14 # perform operation + 80007ee4: 32ec05b3 aes64es x11,x24,x14 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b107, Zkne_aes64es_cg_cp_sbox_b107_str) + 80007ee8: 00083203 ld x4,0(x16) + 80007eec: 00b20c63 beq x4,x11,80007f04 + 80007ef0: 210032ef jal x5,8000b100 + 80007ef4: 80007ee4 .word 0x80007ee4 + 80007ef8: 00000000 .word 0x00000000 + 80007efc: 8001ef4d .word 0x8001ef4d + 80007f00: 00000000 .word 0x00000000 + 80007f04: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x6c6c6c6c6c6c6c6c + 80007f08: 000cbf83 ld x31,0(x25) + 80007f0c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x6c6c6c6c6c6c6c6c + 80007f10: 000cbb03 ld x22,0(x25) + 80007f14: 008c8c93 addi x25,x25,8 + +0000000080007f18 : +Zkne_aes64es_cg_cp_sbox_b108: + aes64es x19, x31, x22 # perform operation + 80007f18: 336f89b3 aes64es x19,x31,x22 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b108, Zkne_aes64es_cg_cp_sbox_b108_str) + 80007f1c: 00083203 ld x4,0(x16) + 80007f20: 01320c63 beq x4,x19,80007f38 + 80007f24: 1dc032ef jal x5,8000b100 + 80007f28: 80007f18 .word 0x80007f18 + 80007f2c: 00000000 .word 0x00000000 + 80007f30: 8001ef86 .word 0x8001ef86 + 80007f34: 00000000 .word 0x00000000 + 80007f38: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x6d6d6d6d6d6d6d6d + 80007f3c: 000cbc03 ld x24,0(x25) + 80007f40: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x6d6d6d6d6d6d6d6d + 80007f44: 000cb603 ld x12,0(x25) + 80007f48: 008c8c93 addi x25,x25,8 + +0000000080007f4c : +Zkne_aes64es_cg_cp_sbox_b109: + aes64es x8, x24, x12 # perform operation + 80007f4c: 32cc0433 aes64es x8,x24,x12 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b109, Zkne_aes64es_cg_cp_sbox_b109_str) + 80007f50: 00083203 ld x4,0(x16) + 80007f54: 00820c63 beq x4,x8,80007f6c + 80007f58: 1a8032ef jal x5,8000b100 + 80007f5c: 80007f4c .word 0x80007f4c + 80007f60: 00000000 .word 0x00000000 + 80007f64: 8001efbf .word 0x8001efbf + 80007f68: 00000000 .word 0x00000000 + 80007f6c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x6e6e6e6e6e6e6e6e + 80007f70: 000cb583 ld x11,0(x25) + 80007f74: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x6e6e6e6e6e6e6e6e + 80007f78: 000cb303 ld x6,0(x25) + 80007f7c: 008c8c93 addi x25,x25,8 + +0000000080007f80 : +Zkne_aes64es_cg_cp_sbox_b110: + aes64es x10, x11, x6 # perform operation + 80007f80: 32658533 aes64es x10,x11,x6 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zkne_aes64es_cg_cp_sbox_b110, Zkne_aes64es_cg_cp_sbox_b110_str) + 80007f84: 00083203 ld x4,0(x16) + 80007f88: 00a20c63 beq x4,x10,80007fa0 + 80007f8c: 174032ef jal x5,8000b100 + 80007f90: 80007f80 .word 0x80007f80 + 80007f94: 00000000 .word 0x00000000 + 80007f98: 8001eff8 .word 0x8001eff8 + 80007f9c: 00000000 .word 0x00000000 + 80007fa0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x6f6f6f6f6f6f6f6f + 80007fa4: 000cbd03 ld x26,0(x25) + 80007fa8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0x6f6f6f6f6f6f6f6f + 80007fac: 000cbe03 ld x28,0(x25) + 80007fb0: 008c8c93 addi x25,x25,8 + +0000000080007fb4 : +Zkne_aes64es_cg_cp_sbox_b111: + aes64es x1, x26, x28 # perform operation + 80007fb4: 33cd00b3 aes64es x1,x26,x28 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b111, Zkne_aes64es_cg_cp_sbox_b111_str) + 80007fb8: 00083203 ld x4,0(x16) + 80007fbc: 00120c63 beq x4,x1,80007fd4 + 80007fc0: 140032ef jal x5,8000b100 + 80007fc4: 80007fb4 .word 0x80007fb4 + 80007fc8: 00000000 .word 0x00000000 + 80007fcc: 8001f031 .word 0x8001f031 + 80007fd0: 00000000 .word 0x00000000 + 80007fd4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x7070707070707070 + 80007fd8: 000cbb83 ld x23,0(x25) + 80007fdc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x7070707070707070 + 80007fe0: 000cb603 ld x12,0(x25) + 80007fe4: 008c8c93 addi x25,x25,8 + +0000000080007fe8 : +Zkne_aes64es_cg_cp_sbox_b112: + aes64es x17, x23, x12 # perform operation + 80007fe8: 32cb88b3 aes64es x17,x23,x12 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b112, Zkne_aes64es_cg_cp_sbox_b112_str) + 80007fec: 00083203 ld x4,0(x16) + 80007ff0: 01120c63 beq x4,x17,80008008 + 80007ff4: 10c032ef jal x5,8000b100 + 80007ff8: 80007fe8 .word 0x80007fe8 + 80007ffc: 00000000 .word 0x00000000 + 80008000: 8001f06a .word 0x8001f06a + 80008004: 00000000 .word 0x00000000 + 80008008: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0x7171717171717171 + 8000800c: 000cb083 ld x1,0(x25) + 80008010: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0x7171717171717171 + 80008014: 000cb103 ld x2,0(x25) + 80008018: 008c8c93 addi x25,x25,8 + +000000008000801c : +Zkne_aes64es_cg_cp_sbox_b113: + aes64es x12, x1, x2 # perform operation + 8000801c: 32208633 aes64es x12,x1,x2 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b113, Zkne_aes64es_cg_cp_sbox_b113_str) + 80008020: 00083203 ld x4,0(x16) + 80008024: 00c20c63 beq x4,x12,8000803c + 80008028: 0d8032ef jal x5,8000b100 + 8000802c: 8000801c .word 0x8000801c + 80008030: 00000000 .word 0x00000000 + 80008034: 8001f0a3 .word 0x8001f0a3 + 80008038: 00000000 .word 0x00000000 + 8000803c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x7272727272727272 + 80008040: 000cbd03 ld x26,0(x25) + 80008044: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x7272727272727272 + 80008048: 000cba83 ld x21,0(x25) + 8000804c: 008c8c93 addi x25,x25,8 + +0000000080008050 : +Zkne_aes64es_cg_cp_sbox_b114: + aes64es x27, x26, x21 # perform operation + 80008050: 335d0db3 aes64es x27,x26,x21 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b114, Zkne_aes64es_cg_cp_sbox_b114_str) + 80008054: 00083203 ld x4,0(x16) + 80008058: 01b20c63 beq x4,x27,80008070 + 8000805c: 0a4032ef jal x5,8000b100 + 80008060: 80008050 .word 0x80008050 + 80008064: 00000000 .word 0x00000000 + 80008068: 8001f0dc .word 0x8001f0dc + 8000806c: 00000000 .word 0x00000000 + 80008070: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x7373737373737373 + 80008074: 000cb383 ld x7,0(x25) + 80008078: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x7373737373737373 + 8000807c: 000cbc03 ld x24,0(x25) + 80008080: 008c8c93 addi x25,x25,8 + +0000000080008084 : +Zkne_aes64es_cg_cp_sbox_b115: + aes64es x14, x7, x24 # perform operation + 80008084: 33838733 aes64es x14,x7,x24 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b115, Zkne_aes64es_cg_cp_sbox_b115_str) + 80008088: 00083203 ld x4,0(x16) + 8000808c: 00e20c63 beq x4,x14,800080a4 + 80008090: 070032ef jal x5,8000b100 + 80008094: 80008084 .word 0x80008084 + 80008098: 00000000 .word 0x00000000 + 8000809c: 8001f115 .word 0x8001f115 + 800080a0: 00000000 .word 0x00000000 + 800080a4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x7474747474747474 + 800080a8: 000cb383 ld x7,0(x25) + 800080ac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x7474747474747474 + 800080b0: 000cb683 ld x13,0(x25) + 800080b4: 008c8c93 addi x25,x25,8 + +00000000800080b8 : +Zkne_aes64es_cg_cp_sbox_b116: + aes64es x3, x7, x13 # perform operation + 800080b8: 32d381b3 aes64es x3,x7,x13 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b116, Zkne_aes64es_cg_cp_sbox_b116_str) + 800080bc: 00083203 ld x4,0(x16) + 800080c0: 00320c63 beq x4,x3,800080d8 + 800080c4: 03c032ef jal x5,8000b100 + 800080c8: 800080b8 .word 0x800080b8 + 800080cc: 00000000 .word 0x00000000 + 800080d0: 8001f14e .word 0x8001f14e + 800080d4: 00000000 .word 0x00000000 + 800080d8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x7575757575757575 + 800080dc: 000cb303 ld x6,0(x25) + 800080e0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x7575757575757575 + 800080e4: 000cb403 ld x8,0(x25) + 800080e8: 008c8c93 addi x25,x25,8 + +00000000800080ec : +Zkne_aes64es_cg_cp_sbox_b117: + aes64es x24, x6, x8 # perform operation + 800080ec: 32830c33 aes64es x24,x6,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b117, Zkne_aes64es_cg_cp_sbox_b117_str) + 800080f0: 00083203 ld x4,0(x16) + 800080f4: 01820c63 beq x4,x24,8000810c + 800080f8: 008032ef jal x5,8000b100 + 800080fc: 800080ec .word 0x800080ec + 80008100: 00000000 .word 0x00000000 + 80008104: 8001f187 .word 0x8001f187 + 80008108: 00000000 .word 0x00000000 + 8000810c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x7676767676767676 + 80008110: 000cb883 ld x17,0(x25) + 80008114: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x7676767676767676 + 80008118: 000cbf03 ld x30,0(x25) + 8000811c: 008c8c93 addi x25,x25,8 + +0000000080008120 : +Zkne_aes64es_cg_cp_sbox_b118: + aes64es x7, x17, x30 # perform operation + 80008120: 33e883b3 aes64es x7,x17,x30 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b118, Zkne_aes64es_cg_cp_sbox_b118_str) + 80008124: 00083203 ld x4,0(x16) + 80008128: 00720c63 beq x4,x7,80008140 + 8000812c: 7d5022ef jal x5,8000b100 + 80008130: 80008120 .word 0x80008120 + 80008134: 00000000 .word 0x00000000 + 80008138: 8001f1c0 .word 0x8001f1c0 + 8000813c: 00000000 .word 0x00000000 + 80008140: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x7777777777777777 + 80008144: 000cb903 ld x18,0(x25) + 80008148: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x7777777777777777 + 8000814c: 000cb183 ld x3,0(x25) + 80008150: 008c8c93 addi x25,x25,8 + +0000000080008154 : +Zkne_aes64es_cg_cp_sbox_b119: + aes64es x1, x18, x3 # perform operation + 80008154: 323900b3 aes64es x1,x18,x3 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b119, Zkne_aes64es_cg_cp_sbox_b119_str) + 80008158: 00083203 ld x4,0(x16) + 8000815c: 00120c63 beq x4,x1,80008174 + 80008160: 7a1022ef jal x5,8000b100 + 80008164: 80008154 .word 0x80008154 + 80008168: 00000000 .word 0x00000000 + 8000816c: 8001f1f9 .word 0x8001f1f9 + 80008170: 00000000 .word 0x00000000 + 80008174: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x7878787878787878 + 80008178: 000cb603 ld x12,0(x25) + 8000817c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x7878787878787878 + 80008180: 000cbf03 ld x30,0(x25) + 80008184: 008c8c93 addi x25,x25,8 + +0000000080008188 : +Zkne_aes64es_cg_cp_sbox_b120: + aes64es x13, x12, x30 # perform operation + 80008188: 33e606b3 aes64es x13,x12,x30 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b120, Zkne_aes64es_cg_cp_sbox_b120_str) + 8000818c: 00083203 ld x4,0(x16) + 80008190: 00d20c63 beq x4,x13,800081a8 + 80008194: 76d022ef jal x5,8000b100 + 80008198: 80008188 .word 0x80008188 + 8000819c: 00000000 .word 0x00000000 + 800081a0: 8001f232 .word 0x8001f232 + 800081a4: 00000000 .word 0x00000000 + 800081a8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x7979797979797979 + 800081ac: 000cba03 ld x20,0(x25) + 800081b0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x7979797979797979 + 800081b4: 000cba83 ld x21,0(x25) + 800081b8: 008c8c93 addi x25,x25,8 + +00000000800081bc : +Zkne_aes64es_cg_cp_sbox_b121: + aes64es x14, x20, x21 # perform operation + 800081bc: 335a0733 aes64es x14,x20,x21 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b121, Zkne_aes64es_cg_cp_sbox_b121_str) + 800081c0: 00083203 ld x4,0(x16) + 800081c4: 00e20c63 beq x4,x14,800081dc + 800081c8: 739022ef jal x5,8000b100 + 800081cc: 800081bc .word 0x800081bc + 800081d0: 00000000 .word 0x00000000 + 800081d4: 8001f26b .word 0x8001f26b + 800081d8: 00000000 .word 0x00000000 + 800081dc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x7a7a7a7a7a7a7a7a + 800081e0: 000cb683 ld x13,0(x25) + 800081e4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x7a7a7a7a7a7a7a7a + 800081e8: 000cb983 ld x19,0(x25) + 800081ec: 008c8c93 addi x25,x25,8 + +00000000800081f0 : +Zkne_aes64es_cg_cp_sbox_b122: + aes64es x8, x13, x19 # perform operation + 800081f0: 33368433 aes64es x8,x13,x19 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b122, Zkne_aes64es_cg_cp_sbox_b122_str) + 800081f4: 00083203 ld x4,0(x16) + 800081f8: 00820c63 beq x4,x8,80008210 + 800081fc: 705022ef jal x5,8000b100 + 80008200: 800081f0 .word 0x800081f0 + 80008204: 00000000 .word 0x00000000 + 80008208: 8001f2a4 .word 0x8001f2a4 + 8000820c: 00000000 .word 0x00000000 + 80008210: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0x7b7b7b7b7b7b7b7b + 80008214: 000cb303 ld x6,0(x25) + 80008218: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x7b7b7b7b7b7b7b7b + 8000821c: 000cbd83 ld x27,0(x25) + 80008220: 008c8c93 addi x25,x25,8 + +0000000080008224 : +Zkne_aes64es_cg_cp_sbox_b123: + aes64es x7, x6, x27 # perform operation + 80008224: 33b303b3 aes64es x7,x6,x27 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b123, Zkne_aes64es_cg_cp_sbox_b123_str) + 80008228: 00083203 ld x4,0(x16) + 8000822c: 00720c63 beq x4,x7,80008244 + 80008230: 6d1022ef jal x5,8000b100 + 80008234: 80008224 .word 0x80008224 + 80008238: 00000000 .word 0x00000000 + 8000823c: 8001f2dd .word 0x8001f2dd + 80008240: 00000000 .word 0x00000000 + 80008244: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x7c7c7c7c7c7c7c7c + 80008248: 000cbb83 ld x23,0(x25) + 8000824c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x7c7c7c7c7c7c7c7c + 80008250: 000cb503 ld x10,0(x25) + 80008254: 008c8c93 addi x25,x25,8 + +0000000080008258 : +Zkne_aes64es_cg_cp_sbox_b124: + aes64es x17, x23, x10 # perform operation + 80008258: 32ab88b3 aes64es x17,x23,x10 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b124, Zkne_aes64es_cg_cp_sbox_b124_str) + 8000825c: 00083203 ld x4,0(x16) + 80008260: 01120c63 beq x4,x17,80008278 + 80008264: 69d022ef jal x5,8000b100 + 80008268: 80008258 .word 0x80008258 + 8000826c: 00000000 .word 0x00000000 + 80008270: 8001f316 .word 0x8001f316 + 80008274: 00000000 .word 0x00000000 + 80008278: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x7d7d7d7d7d7d7d7d + 8000827c: 000cb703 ld x14,0(x25) + 80008280: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x7d7d7d7d7d7d7d7d + 80008284: 000cb683 ld x13,0(x25) + 80008288: 008c8c93 addi x25,x25,8 + +000000008000828c : +Zkne_aes64es_cg_cp_sbox_b125: + aes64es x10, x14, x13 # perform operation + 8000828c: 32d70533 aes64es x10,x14,x13 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zkne_aes64es_cg_cp_sbox_b125, Zkne_aes64es_cg_cp_sbox_b125_str) + 80008290: 00083203 ld x4,0(x16) + 80008294: 00a20c63 beq x4,x10,800082ac + 80008298: 669022ef jal x5,8000b100 + 8000829c: 8000828c .word 0x8000828c + 800082a0: 00000000 .word 0x00000000 + 800082a4: 8001f34f .word 0x8001f34f + 800082a8: 00000000 .word 0x00000000 + 800082ac: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x7e7e7e7e7e7e7e7e + 800082b0: 000cba83 ld x21,0(x25) + 800082b4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x7e7e7e7e7e7e7e7e + 800082b8: 000cbb83 ld x23,0(x25) + 800082bc: 008c8c93 addi x25,x25,8 + +00000000800082c0 : +Zkne_aes64es_cg_cp_sbox_b126: + aes64es x30, x21, x23 # perform operation + 800082c0: 337a8f33 aes64es x30,x21,x23 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b126, Zkne_aes64es_cg_cp_sbox_b126_str) + 800082c4: 00083203 ld x4,0(x16) + 800082c8: 01e20c63 beq x4,x30,800082e0 + 800082cc: 635022ef jal x5,8000b100 + 800082d0: 800082c0 .word 0x800082c0 + 800082d4: 00000000 .word 0x00000000 + 800082d8: 8001f388 .word 0x8001f388 + 800082dc: 00000000 .word 0x00000000 + 800082e0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x7f7f7f7f7f7f7f7f + 800082e4: 000cb403 ld x8,0(x25) + 800082e8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x7f7f7f7f7f7f7f7f + 800082ec: 000cb303 ld x6,0(x25) + 800082f0: 008c8c93 addi x25,x25,8 + +00000000800082f4 : +Zkne_aes64es_cg_cp_sbox_b127: + aes64es x7, x8, x6 # perform operation + 800082f4: 326403b3 aes64es x7,x8,x6 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b127, Zkne_aes64es_cg_cp_sbox_b127_str) + 800082f8: 00083203 ld x4,0(x16) + 800082fc: 00720c63 beq x4,x7,80008314 + 80008300: 601022ef jal x5,8000b100 + 80008304: 800082f4 .word 0x800082f4 + 80008308: 00000000 .word 0x00000000 + 8000830c: 8001f3c1 .word 0x8001f3c1 + 80008310: 00000000 .word 0x00000000 + 80008314: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x8080808080808080 + 80008318: 000cb603 ld x12,0(x25) + 8000831c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x8080808080808080 + 80008320: 000cb483 ld x9,0(x25) + 80008324: 008c8c93 addi x25,x25,8 + +0000000080008328 : +Zkne_aes64es_cg_cp_sbox_b128: + aes64es x11, x12, x9 # perform operation + 80008328: 329605b3 aes64es x11,x12,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b128, Zkne_aes64es_cg_cp_sbox_b128_str) + 8000832c: 00083203 ld x4,0(x16) + 80008330: 00b20c63 beq x4,x11,80008348 + 80008334: 5cd022ef jal x5,8000b100 + 80008338: 80008328 .word 0x80008328 + 8000833c: 00000000 .word 0x00000000 + 80008340: 8001f3fa .word 0x8001f3fa + 80008344: 00000000 .word 0x00000000 + 80008348: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x8181818181818181 + 8000834c: 000cbb03 ld x22,0(x25) + 80008350: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x8181818181818181 + 80008354: 000cb383 ld x7,0(x25) + 80008358: 008c8c93 addi x25,x25,8 + +000000008000835c : +Zkne_aes64es_cg_cp_sbox_b129: + aes64es x3, x22, x7 # perform operation + 8000835c: 327b01b3 aes64es x3,x22,x7 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b129, Zkne_aes64es_cg_cp_sbox_b129_str) + 80008360: 00083203 ld x4,0(x16) + 80008364: 00320c63 beq x4,x3,8000837c + 80008368: 599022ef jal x5,8000b100 + 8000836c: 8000835c .word 0x8000835c + 80008370: 00000000 .word 0x00000000 + 80008374: 8001f433 .word 0x8001f433 + 80008378: 00000000 .word 0x00000000 + 8000837c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x8282828282828282 + 80008380: 000cb883 ld x17,0(x25) + 80008384: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x8282828282828282 + 80008388: 000cb083 ld x1,0(x25) + 8000838c: 008c8c93 addi x25,x25,8 + +0000000080008390 : +Zkne_aes64es_cg_cp_sbox_b130: + aes64es x6, x17, x1 # perform operation + 80008390: 32188333 aes64es x6,x17,x1 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b130, Zkne_aes64es_cg_cp_sbox_b130_str) + 80008394: 00083203 ld x4,0(x16) + 80008398: 00620c63 beq x4,x6,800083b0 + 8000839c: 565022ef jal x5,8000b100 + 800083a0: 80008390 .word 0x80008390 + 800083a4: 00000000 .word 0x00000000 + 800083a8: 8001f46c .word 0x8001f46c + 800083ac: 00000000 .word 0x00000000 + 800083b0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x8383838383838383 + 800083b4: 000cb383 ld x7,0(x25) + 800083b8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0x8383838383838383 + 800083bc: 000cbe83 ld x29,0(x25) + 800083c0: 008c8c93 addi x25,x25,8 + +00000000800083c4 : +Zkne_aes64es_cg_cp_sbox_b131: + aes64es x2, x7, x29 # perform operation + 800083c4: 33d38133 aes64es x2,x7,x29 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b131, Zkne_aes64es_cg_cp_sbox_b131_str) + 800083c8: 00083203 ld x4,0(x16) + 800083cc: 00220c63 beq x4,x2,800083e4 + 800083d0: 531022ef jal x5,8000b100 + 800083d4: 800083c4 .word 0x800083c4 + 800083d8: 00000000 .word 0x00000000 + 800083dc: 8001f4a5 .word 0x8001f4a5 + 800083e0: 00000000 .word 0x00000000 + 800083e4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x8484848484848484 + 800083e8: 000cb383 ld x7,0(x25) + 800083ec: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0x8484848484848484 + 800083f0: 000cbc03 ld x24,0(x25) + 800083f4: 008c8c93 addi x25,x25,8 + +00000000800083f8 : +Zkne_aes64es_cg_cp_sbox_b132: + aes64es x21, x7, x24 # perform operation + 800083f8: 33838ab3 aes64es x21,x7,x24 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b132, Zkne_aes64es_cg_cp_sbox_b132_str) + 800083fc: 00083203 ld x4,0(x16) + 80008400: 01520c63 beq x4,x21,80008418 + 80008404: 4fd022ef jal x5,8000b100 + 80008408: 800083f8 .word 0x800083f8 + 8000840c: 00000000 .word 0x00000000 + 80008410: 8001f4de .word 0x8001f4de + 80008414: 00000000 .word 0x00000000 + 80008418: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x8585858585858585 + 8000841c: 000cb983 ld x19,0(x25) + 80008420: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x8585858585858585 + 80008424: 000cba03 ld x20,0(x25) + 80008428: 008c8c93 addi x25,x25,8 + +000000008000842c : +Zkne_aes64es_cg_cp_sbox_b133: + aes64es x7, x19, x20 # perform operation + 8000842c: 334983b3 aes64es x7,x19,x20 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b133, Zkne_aes64es_cg_cp_sbox_b133_str) + 80008430: 00083203 ld x4,0(x16) + 80008434: 00720c63 beq x4,x7,8000844c + 80008438: 4c9022ef jal x5,8000b100 + 8000843c: 8000842c .word 0x8000842c + 80008440: 00000000 .word 0x00000000 + 80008444: 8001f517 .word 0x8001f517 + 80008448: 00000000 .word 0x00000000 + 8000844c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x8686868686868686 + 80008450: 000cbb03 ld x22,0(x25) + 80008454: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x8686868686868686 + 80008458: 000cba83 ld x21,0(x25) + 8000845c: 008c8c93 addi x25,x25,8 + +0000000080008460 : +Zkne_aes64es_cg_cp_sbox_b134: + aes64es x27, x22, x21 # perform operation + 80008460: 335b0db3 aes64es x27,x22,x21 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b134, Zkne_aes64es_cg_cp_sbox_b134_str) + 80008464: 00083203 ld x4,0(x16) + 80008468: 01b20c63 beq x4,x27,80008480 + 8000846c: 495022ef jal x5,8000b100 + 80008470: 80008460 .word 0x80008460 + 80008474: 00000000 .word 0x00000000 + 80008478: 8001f550 .word 0x8001f550 + 8000847c: 00000000 .word 0x00000000 + 80008480: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x8787878787878787 + 80008484: 000cbb03 ld x22,0(x25) + 80008488: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x8787878787878787 + 8000848c: 000cb483 ld x9,0(x25) + 80008490: 008c8c93 addi x25,x25,8 + +0000000080008494 : +Zkne_aes64es_cg_cp_sbox_b135: + aes64es x13, x22, x9 # perform operation + 80008494: 329b06b3 aes64es x13,x22,x9 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b135, Zkne_aes64es_cg_cp_sbox_b135_str) + 80008498: 00083203 ld x4,0(x16) + 8000849c: 00d20c63 beq x4,x13,800084b4 + 800084a0: 461022ef jal x5,8000b100 + 800084a4: 80008494 .word 0x80008494 + 800084a8: 00000000 .word 0x00000000 + 800084ac: 8001f589 .word 0x8001f589 + 800084b0: 00000000 .word 0x00000000 + 800084b4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x8888888888888888 + 800084b8: 000cbb03 ld x22,0(x25) + 800084bc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x8888888888888888 + 800084c0: 000cb383 ld x7,0(x25) + 800084c4: 008c8c93 addi x25,x25,8 + +00000000800084c8 : +Zkne_aes64es_cg_cp_sbox_b136: + aes64es x26, x22, x7 # perform operation + 800084c8: 327b0d33 aes64es x26,x22,x7 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b136, Zkne_aes64es_cg_cp_sbox_b136_str) + 800084cc: 00083203 ld x4,0(x16) + 800084d0: 01a20c63 beq x4,x26,800084e8 + 800084d4: 42d022ef jal x5,8000b100 + 800084d8: 800084c8 .word 0x800084c8 + 800084dc: 00000000 .word 0x00000000 + 800084e0: 8001f5c2 .word 0x8001f5c2 + 800084e4: 00000000 .word 0x00000000 + 800084e8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0x8989898989898989 + 800084ec: 000cb703 ld x14,0(x25) + 800084f0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x8989898989898989 + 800084f4: 000cb903 ld x18,0(x25) + 800084f8: 008c8c93 addi x25,x25,8 + +00000000800084fc : +Zkne_aes64es_cg_cp_sbox_b137: + aes64es x30, x14, x18 # perform operation + 800084fc: 33270f33 aes64es x30,x14,x18 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b137, Zkne_aes64es_cg_cp_sbox_b137_str) + 80008500: 00083203 ld x4,0(x16) + 80008504: 01e20c63 beq x4,x30,8000851c + 80008508: 3f9022ef jal x5,8000b100 + 8000850c: 800084fc .word 0x800084fc + 80008510: 00000000 .word 0x00000000 + 80008514: 8001f5fb .word 0x8001f5fb + 80008518: 00000000 .word 0x00000000 + 8000851c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x8a8a8a8a8a8a8a8a + 80008520: 000cbe03 ld x28,0(x25) + 80008524: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0x8a8a8a8a8a8a8a8a + 80008528: 000cb683 ld x13,0(x25) + 8000852c: 008c8c93 addi x25,x25,8 + +0000000080008530 : +Zkne_aes64es_cg_cp_sbox_b138: + aes64es x29, x28, x13 # perform operation + 80008530: 32de0eb3 aes64es x29,x28,x13 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b138, Zkne_aes64es_cg_cp_sbox_b138_str) + 80008534: 00083203 ld x4,0(x16) + 80008538: 01d20c63 beq x4,x29,80008550 + 8000853c: 3c5022ef jal x5,8000b100 + 80008540: 80008530 .word 0x80008530 + 80008544: 00000000 .word 0x00000000 + 80008548: 8001f634 .word 0x8001f634 + 8000854c: 00000000 .word 0x00000000 + 80008550: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x8b8b8b8b8b8b8b8b + 80008554: 000cba83 ld x21,0(x25) + 80008558: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x8b8b8b8b8b8b8b8b + 8000855c: 000cb303 ld x6,0(x25) + 80008560: 008c8c93 addi x25,x25,8 + +0000000080008564 : +Zkne_aes64es_cg_cp_sbox_b139: + aes64es x13, x21, x6 # perform operation + 80008564: 326a86b3 aes64es x13,x21,x6 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b139, Zkne_aes64es_cg_cp_sbox_b139_str) + 80008568: 00083203 ld x4,0(x16) + 8000856c: 00d20c63 beq x4,x13,80008584 + 80008570: 391022ef jal x5,8000b100 + 80008574: 80008564 .word 0x80008564 + 80008578: 00000000 .word 0x00000000 + 8000857c: 8001f66d .word 0x8001f66d + 80008580: 00000000 .word 0x00000000 + 80008584: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x8c8c8c8c8c8c8c8c + 80008588: 000cb883 ld x17,0(x25) + 8000858c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0x8c8c8c8c8c8c8c8c + 80008590: 000cb983 ld x19,0(x25) + 80008594: 008c8c93 addi x25,x25,8 + +0000000080008598 : +Zkne_aes64es_cg_cp_sbox_b140: + aes64es x22, x17, x19 # perform operation + 80008598: 33388b33 aes64es x22,x17,x19 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64es_cg_cp_sbox_b140, Zkne_aes64es_cg_cp_sbox_b140_str) + 8000859c: 00083203 ld x4,0(x16) + 800085a0: 01620c63 beq x4,x22,800085b8 + 800085a4: 35d022ef jal x5,8000b100 + 800085a8: 80008598 .word 0x80008598 + 800085ac: 00000000 .word 0x00000000 + 800085b0: 8001f6a6 .word 0x8001f6a6 + 800085b4: 00000000 .word 0x00000000 + 800085b8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x8d8d8d8d8d8d8d8d + 800085bc: 000cb403 ld x8,0(x25) + 800085c0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x8d8d8d8d8d8d8d8d + 800085c4: 000cbf03 ld x30,0(x25) + 800085c8: 008c8c93 addi x25,x25,8 + +00000000800085cc : +Zkne_aes64es_cg_cp_sbox_b141: + aes64es x24, x8, x30 # perform operation + 800085cc: 33e40c33 aes64es x24,x8,x30 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b141, Zkne_aes64es_cg_cp_sbox_b141_str) + 800085d0: 00083203 ld x4,0(x16) + 800085d4: 01820c63 beq x4,x24,800085ec + 800085d8: 329022ef jal x5,8000b100 + 800085dc: 800085cc .word 0x800085cc + 800085e0: 00000000 .word 0x00000000 + 800085e4: 8001f6df .word 0x8001f6df + 800085e8: 00000000 .word 0x00000000 + 800085ec: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x8e8e8e8e8e8e8e8e + 800085f0: 000cbd03 ld x26,0(x25) + 800085f4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0x8e8e8e8e8e8e8e8e + 800085f8: 000cba83 ld x21,0(x25) + 800085fc: 008c8c93 addi x25,x25,8 + +0000000080008600 : +Zkne_aes64es_cg_cp_sbox_b142: + aes64es x15, x26, x21 # perform operation + 80008600: 335d07b3 aes64es x15,x26,x21 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b142, Zkne_aes64es_cg_cp_sbox_b142_str) + 80008604: 00083203 ld x4,0(x16) + 80008608: 00f20c63 beq x4,x15,80008620 + 8000860c: 2f5022ef jal x5,8000b100 + 80008610: 80008600 .word 0x80008600 + 80008614: 00000000 .word 0x00000000 + 80008618: 8001f718 .word 0x8001f718 + 8000861c: 00000000 .word 0x00000000 + 80008620: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x8f8f8f8f8f8f8f8f + 80008624: 000cba83 ld x21,0(x25) + 80008628: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x8f8f8f8f8f8f8f8f + 8000862c: 000cbb83 ld x23,0(x25) + 80008630: 008c8c93 addi x25,x25,8 + +0000000080008634 : +Zkne_aes64es_cg_cp_sbox_b143: + aes64es x3, x21, x23 # perform operation + 80008634: 337a81b3 aes64es x3,x21,x23 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b143, Zkne_aes64es_cg_cp_sbox_b143_str) + 80008638: 00083203 ld x4,0(x16) + 8000863c: 00320c63 beq x4,x3,80008654 + 80008640: 2c1022ef jal x5,8000b100 + 80008644: 80008634 .word 0x80008634 + 80008648: 00000000 .word 0x00000000 + 8000864c: 8001f751 .word 0x8001f751 + 80008650: 00000000 .word 0x00000000 + 80008654: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x9090909090909090 + 80008658: 000cb483 ld x9,0(x25) + 8000865c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0x9090909090909090 + 80008660: 000cbe03 ld x28,0(x25) + 80008664: 008c8c93 addi x25,x25,8 + +0000000080008668 : +Zkne_aes64es_cg_cp_sbox_b144: + aes64es x2, x9, x28 # perform operation + 80008668: 33c48133 aes64es x2,x9,x28 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b144, Zkne_aes64es_cg_cp_sbox_b144_str) + 8000866c: 00083203 ld x4,0(x16) + 80008670: 00220c63 beq x4,x2,80008688 + 80008674: 28d022ef jal x5,8000b100 + 80008678: 80008668 .word 0x80008668 + 8000867c: 00000000 .word 0x00000000 + 80008680: 8001f78a .word 0x8001f78a + 80008684: 00000000 .word 0x00000000 + 80008688: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x9191919191919191 + 8000868c: 000cb403 ld x8,0(x25) + 80008690: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0x9191919191919191 + 80008694: 000cb183 ld x3,0(x25) + 80008698: 008c8c93 addi x25,x25,8 + +000000008000869c : +Zkne_aes64es_cg_cp_sbox_b145: + aes64es x30, x8, x3 # perform operation + 8000869c: 32340f33 aes64es x30,x8,x3 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b145, Zkne_aes64es_cg_cp_sbox_b145_str) + 800086a0: 00083203 ld x4,0(x16) + 800086a4: 01e20c63 beq x4,x30,800086bc + 800086a8: 259022ef jal x5,8000b100 + 800086ac: 8000869c .word 0x8000869c + 800086b0: 00000000 .word 0x00000000 + 800086b4: 8001f7c3 .word 0x8001f7c3 + 800086b8: 00000000 .word 0x00000000 + 800086bc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x9292929292929292 + 800086c0: 000cb603 ld x12,0(x25) + 800086c4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs2: x14 = 0x9292929292929292 + 800086c8: 000cb703 ld x14,0(x25) + 800086cc: 008c8c93 addi x25,x25,8 + +00000000800086d0 : +Zkne_aes64es_cg_cp_sbox_b146: + aes64es x20, x12, x14 # perform operation + 800086d0: 32e60a33 aes64es x20,x12,x14 + # Check if x20 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x20, Zkne_aes64es_cg_cp_sbox_b146, Zkne_aes64es_cg_cp_sbox_b146_str) + 800086d4: 00083203 ld x4,0(x16) + 800086d8: 01420c63 beq x4,x20,800086f0 + 800086dc: 225022ef jal x5,8000b100 + 800086e0: 800086d0 .word 0x800086d0 + 800086e4: 00000000 .word 0x00000000 + 800086e8: 8001f7fc .word 0x8001f7fc + 800086ec: 00000000 .word 0x00000000 + 800086f0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x9393939393939393 + 800086f4: 000cb403 ld x8,0(x25) + 800086f8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x9393939393939393 + 800086fc: 000cb303 ld x6,0(x25) + 80008700: 008c8c93 addi x25,x25,8 + +0000000080008704 : +Zkne_aes64es_cg_cp_sbox_b147: + aes64es x3, x8, x6 # perform operation + 80008704: 326401b3 aes64es x3,x8,x6 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b147, Zkne_aes64es_cg_cp_sbox_b147_str) + 80008708: 00083203 ld x4,0(x16) + 8000870c: 00320c63 beq x4,x3,80008724 + 80008710: 1f1022ef jal x5,8000b100 + 80008714: 80008704 .word 0x80008704 + 80008718: 00000000 .word 0x00000000 + 8000871c: 8001f835 .word 0x8001f835 + 80008720: 00000000 .word 0x00000000 + 80008724: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x9494949494949494 + 80008728: 000cbc03 ld x24,0(x25) + 8000872c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x9494949494949494 + 80008730: 000cb083 ld x1,0(x25) + 80008734: 008c8c93 addi x25,x25,8 + +0000000080008738 : +Zkne_aes64es_cg_cp_sbox_b148: + aes64es x2, x24, x1 # perform operation + 80008738: 321c0133 aes64es x2,x24,x1 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b148, Zkne_aes64es_cg_cp_sbox_b148_str) + 8000873c: 00083203 ld x4,0(x16) + 80008740: 00220c63 beq x4,x2,80008758 + 80008744: 1bd022ef jal x5,8000b100 + 80008748: 80008738 .word 0x80008738 + 8000874c: 00000000 .word 0x00000000 + 80008750: 8001f86e .word 0x8001f86e + 80008754: 00000000 .word 0x00000000 + 80008758: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0x9595959595959595 + 8000875c: 000cb983 ld x19,0(x25) + 80008760: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x9595959595959595 + 80008764: 000cbf03 ld x30,0(x25) + 80008768: 008c8c93 addi x25,x25,8 + +000000008000876c : +Zkne_aes64es_cg_cp_sbox_b149: + aes64es x3, x19, x30 # perform operation + 8000876c: 33e981b3 aes64es x3,x19,x30 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b149, Zkne_aes64es_cg_cp_sbox_b149_str) + 80008770: 00083203 ld x4,0(x16) + 80008774: 00320c63 beq x4,x3,8000878c + 80008778: 189022ef jal x5,8000b100 + 8000877c: 8000876c .word 0x8000876c + 80008780: 00000000 .word 0x00000000 + 80008784: 8001f8a7 .word 0x8001f8a7 + 80008788: 00000000 .word 0x00000000 + 8000878c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x9696969696969696 + 80008790: 000cba83 ld x21,0(x25) + 80008794: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x9696969696969696 + 80008798: 000cba03 ld x20,0(x25) + 8000879c: 008c8c93 addi x25,x25,8 + +00000000800087a0 : +Zkne_aes64es_cg_cp_sbox_b150: + aes64es x7, x21, x20 # perform operation + 800087a0: 334a83b3 aes64es x7,x21,x20 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b150, Zkne_aes64es_cg_cp_sbox_b150_str) + 800087a4: 00083203 ld x4,0(x16) + 800087a8: 00720c63 beq x4,x7,800087c0 + 800087ac: 155022ef jal x5,8000b100 + 800087b0: 800087a0 .word 0x800087a0 + 800087b4: 00000000 .word 0x00000000 + 800087b8: 8001f8e0 .word 0x8001f8e0 + 800087bc: 00000000 .word 0x00000000 + 800087c0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x9797979797979797 + 800087c4: 000cbb03 ld x22,0(x25) + 800087c8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x9797979797979797 + 800087cc: 000cb303 ld x6,0(x25) + 800087d0: 008c8c93 addi x25,x25,8 + +00000000800087d4 : +Zkne_aes64es_cg_cp_sbox_b151: + aes64es x28, x22, x6 # perform operation + 800087d4: 326b0e33 aes64es x28,x22,x6 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b151, Zkne_aes64es_cg_cp_sbox_b151_str) + 800087d8: 00083203 ld x4,0(x16) + 800087dc: 01c20c63 beq x4,x28,800087f4 + 800087e0: 121022ef jal x5,8000b100 + 800087e4: 800087d4 .word 0x800087d4 + 800087e8: 00000000 .word 0x00000000 + 800087ec: 8001f919 .word 0x8001f919 + 800087f0: 00000000 .word 0x00000000 + 800087f4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0x9898989898989898 + 800087f8: 000cb103 ld x2,0(x25) + 800087fc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0x9898989898989898 + 80008800: 000cb383 ld x7,0(x25) + 80008804: 008c8c93 addi x25,x25,8 + +0000000080008808 : +Zkne_aes64es_cg_cp_sbox_b152: + aes64es x1, x2, x7 # perform operation + 80008808: 327100b3 aes64es x1,x2,x7 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b152, Zkne_aes64es_cg_cp_sbox_b152_str) + 8000880c: 00083203 ld x4,0(x16) + 80008810: 00120c63 beq x4,x1,80008828 + 80008814: 0ed022ef jal x5,8000b100 + 80008818: 80008808 .word 0x80008808 + 8000881c: 00000000 .word 0x00000000 + 80008820: 8001f952 .word 0x8001f952 + 80008824: 00000000 .word 0x00000000 + 80008828: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x9999999999999999 + 8000882c: 000cb383 ld x7,0(x25) + 80008830: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x9999999999999999 + 80008834: 000cb503 ld x10,0(x25) + 80008838: 008c8c93 addi x25,x25,8 + +000000008000883c : +Zkne_aes64es_cg_cp_sbox_b153: + aes64es x26, x7, x10 # perform operation + 8000883c: 32a38d33 aes64es x26,x7,x10 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b153, Zkne_aes64es_cg_cp_sbox_b153_str) + 80008840: 00083203 ld x4,0(x16) + 80008844: 01a20c63 beq x4,x26,8000885c + 80008848: 0b9022ef jal x5,8000b100 + 8000884c: 8000883c .word 0x8000883c + 80008850: 00000000 .word 0x00000000 + 80008854: 8001f98b .word 0x8001f98b + 80008858: 00000000 .word 0x00000000 + 8000885c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0x9a9a9a9a9a9a9a9a + 80008860: 000cbe83 ld x29,0(x25) + 80008864: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x9a9a9a9a9a9a9a9a + 80008868: 000cbb83 ld x23,0(x25) + 8000886c: 008c8c93 addi x25,x25,8 + +0000000080008870 : +Zkne_aes64es_cg_cp_sbox_b154: + aes64es x28, x29, x23 # perform operation + 80008870: 337e8e33 aes64es x28,x29,x23 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b154, Zkne_aes64es_cg_cp_sbox_b154_str) + 80008874: 00083203 ld x4,0(x16) + 80008878: 01c20c63 beq x4,x28,80008890 + 8000887c: 085022ef jal x5,8000b100 + 80008880: 80008870 .word 0x80008870 + 80008884: 00000000 .word 0x00000000 + 80008888: 8001f9c4 .word 0x8001f9c4 + 8000888c: 00000000 .word 0x00000000 + 80008890: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0x9b9b9b9b9b9b9b9b + 80008894: 000cb403 ld x8,0(x25) + 80008898: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0x9b9b9b9b9b9b9b9b + 8000889c: 000cbb03 ld x22,0(x25) + 800088a0: 008c8c93 addi x25,x25,8 + +00000000800088a4 : +Zkne_aes64es_cg_cp_sbox_b155: + aes64es x24, x8, x22 # perform operation + 800088a4: 33640c33 aes64es x24,x8,x22 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b155, Zkne_aes64es_cg_cp_sbox_b155_str) + 800088a8: 00083203 ld x4,0(x16) + 800088ac: 01820c63 beq x4,x24,800088c4 + 800088b0: 051022ef jal x5,8000b100 + 800088b4: 800088a4 .word 0x800088a4 + 800088b8: 00000000 .word 0x00000000 + 800088bc: 8001f9fd .word 0x8001f9fd + 800088c0: 00000000 .word 0x00000000 + 800088c4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x9c9c9c9c9c9c9c9c + 800088c8: 000cb903 ld x18,0(x25) + 800088cc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x9c9c9c9c9c9c9c9c + 800088d0: 000cbb83 ld x23,0(x25) + 800088d4: 008c8c93 addi x25,x25,8 + +00000000800088d8 : +Zkne_aes64es_cg_cp_sbox_b156: + aes64es x21, x18, x23 # perform operation + 800088d8: 33790ab3 aes64es x21,x18,x23 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b156, Zkne_aes64es_cg_cp_sbox_b156_str) + 800088dc: 00083203 ld x4,0(x16) + 800088e0: 01520c63 beq x4,x21,800088f8 + 800088e4: 01d022ef jal x5,8000b100 + 800088e8: 800088d8 .word 0x800088d8 + 800088ec: 00000000 .word 0x00000000 + 800088f0: 8001fa36 .word 0x8001fa36 + 800088f4: 00000000 .word 0x00000000 + 800088f8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x9d9d9d9d9d9d9d9d + 800088fc: 000cb903 ld x18,0(x25) + 80008900: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0x9d9d9d9d9d9d9d9d + 80008904: 000cb603 ld x12,0(x25) + 80008908: 008c8c93 addi x25,x25,8 + +000000008000890c : +Zkne_aes64es_cg_cp_sbox_b157: + aes64es x24, x18, x12 # perform operation + 8000890c: 32c90c33 aes64es x24,x18,x12 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b157, Zkne_aes64es_cg_cp_sbox_b157_str) + 80008910: 00083203 ld x4,0(x16) + 80008914: 01820c63 beq x4,x24,8000892c + 80008918: 7e8022ef jal x5,8000b100 + 8000891c: 8000890c .word 0x8000890c + 80008920: 00000000 .word 0x00000000 + 80008924: 8001fa6f .word 0x8001fa6f + 80008928: 00000000 .word 0x00000000 + 8000892c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x9e9e9e9e9e9e9e9e + 80008930: 000cbd03 ld x26,0(x25) + 80008934: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0x9e9e9e9e9e9e9e9e + 80008938: 000cb083 ld x1,0(x25) + 8000893c: 008c8c93 addi x25,x25,8 + +0000000080008940 : +Zkne_aes64es_cg_cp_sbox_b158: + aes64es x27, x26, x1 # perform operation + 80008940: 321d0db3 aes64es x27,x26,x1 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b158, Zkne_aes64es_cg_cp_sbox_b158_str) + 80008944: 00083203 ld x4,0(x16) + 80008948: 01b20c63 beq x4,x27,80008960 + 8000894c: 7b4022ef jal x5,8000b100 + 80008950: 80008940 .word 0x80008940 + 80008954: 00000000 .word 0x00000000 + 80008958: 8001faa8 .word 0x8001faa8 + 8000895c: 00000000 .word 0x00000000 + 80008960: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x9f9f9f9f9f9f9f9f + 80008964: 000cbb03 ld x22,0(x25) + 80008968: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x9f9f9f9f9f9f9f9f + 8000896c: 000cb783 ld x15,0(x25) + 80008970: 008c8c93 addi x25,x25,8 + +0000000080008974 : +Zkne_aes64es_cg_cp_sbox_b159: + aes64es x7, x22, x15 # perform operation + 80008974: 32fb03b3 aes64es x7,x22,x15 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b159, Zkne_aes64es_cg_cp_sbox_b159_str) + 80008978: 00083203 ld x4,0(x16) + 8000897c: 00720c63 beq x4,x7,80008994 + 80008980: 780022ef jal x5,8000b100 + 80008984: 80008974 .word 0x80008974 + 80008988: 00000000 .word 0x00000000 + 8000898c: 8001fae1 .word 0x8001fae1 + 80008990: 00000000 .word 0x00000000 + 80008994: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xa0a0a0a0a0a0a0a0 + 80008998: 000cb383 ld x7,0(x25) + 8000899c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xa0a0a0a0a0a0a0a0 + 800089a0: 000cbf03 ld x30,0(x25) + 800089a4: 008c8c93 addi x25,x25,8 + +00000000800089a8 : +Zkne_aes64es_cg_cp_sbox_b160: + aes64es x26, x7, x30 # perform operation + 800089a8: 33e38d33 aes64es x26,x7,x30 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b160, Zkne_aes64es_cg_cp_sbox_b160_str) + 800089ac: 00083203 ld x4,0(x16) + 800089b0: 01a20c63 beq x4,x26,800089c8 + 800089b4: 74c022ef jal x5,8000b100 + 800089b8: 800089a8 .word 0x800089a8 + 800089bc: 00000000 .word 0x00000000 + 800089c0: 8001fb1a .word 0x8001fb1a + 800089c4: 00000000 .word 0x00000000 + 800089c8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xa1a1a1a1a1a1a1a1 + 800089cc: 000cb303 ld x6,0(x25) + 800089d0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xa1a1a1a1a1a1a1a1 + 800089d4: 000cb083 ld x1,0(x25) + 800089d8: 008c8c93 addi x25,x25,8 + +00000000800089dc : +Zkne_aes64es_cg_cp_sbox_b161: + aes64es x29, x6, x1 # perform operation + 800089dc: 32130eb3 aes64es x29,x6,x1 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b161, Zkne_aes64es_cg_cp_sbox_b161_str) + 800089e0: 00083203 ld x4,0(x16) + 800089e4: 01d20c63 beq x4,x29,800089fc + 800089e8: 718022ef jal x5,8000b100 + 800089ec: 800089dc .word 0x800089dc + 800089f0: 00000000 .word 0x00000000 + 800089f4: 8001fb53 .word 0x8001fb53 + 800089f8: 00000000 .word 0x00000000 + 800089fc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0xa2a2a2a2a2a2a2a2 + 80008a00: 000cbb83 ld x23,0(x25) + 80008a04: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0xa2a2a2a2a2a2a2a2 + 80008a08: 000cb483 ld x9,0(x25) + 80008a0c: 008c8c93 addi x25,x25,8 + +0000000080008a10 : +Zkne_aes64es_cg_cp_sbox_b162: + aes64es x14, x23, x9 # perform operation + 80008a10: 329b8733 aes64es x14,x23,x9 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b162, Zkne_aes64es_cg_cp_sbox_b162_str) + 80008a14: 00083203 ld x4,0(x16) + 80008a18: 00e20c63 beq x4,x14,80008a30 + 80008a1c: 6e4022ef jal x5,8000b100 + 80008a20: 80008a10 .word 0x80008a10 + 80008a24: 00000000 .word 0x00000000 + 80008a28: 8001fb8c .word 0x8001fb8c + 80008a2c: 00000000 .word 0x00000000 + 80008a30: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xa3a3a3a3a3a3a3a3 + 80008a34: 000cb903 ld x18,0(x25) + 80008a38: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0xa3a3a3a3a3a3a3a3 + 80008a3c: 000cb503 ld x10,0(x25) + 80008a40: 008c8c93 addi x25,x25,8 + +0000000080008a44 : +Zkne_aes64es_cg_cp_sbox_b163: + aes64es x27, x18, x10 # perform operation + 80008a44: 32a90db3 aes64es x27,x18,x10 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b163, Zkne_aes64es_cg_cp_sbox_b163_str) + 80008a48: 00083203 ld x4,0(x16) + 80008a4c: 01b20c63 beq x4,x27,80008a64 + 80008a50: 6b0022ef jal x5,8000b100 + 80008a54: 80008a44 .word 0x80008a44 + 80008a58: 00000000 .word 0x00000000 + 80008a5c: 8001fbc5 .word 0x8001fbc5 + 80008a60: 00000000 .word 0x00000000 + 80008a64: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xa4a4a4a4a4a4a4a4 + 80008a68: 000cbd83 ld x27,0(x25) + 80008a6c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xa4a4a4a4a4a4a4a4 + 80008a70: 000cb083 ld x1,0(x25) + 80008a74: 008c8c93 addi x25,x25,8 + +0000000080008a78 : +Zkne_aes64es_cg_cp_sbox_b164: + aes64es x24, x27, x1 # perform operation + 80008a78: 321d8c33 aes64es x24,x27,x1 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b164, Zkne_aes64es_cg_cp_sbox_b164_str) + 80008a7c: 00083203 ld x4,0(x16) + 80008a80: 01820c63 beq x4,x24,80008a98 + 80008a84: 67c022ef jal x5,8000b100 + 80008a88: 80008a78 .word 0x80008a78 + 80008a8c: 00000000 .word 0x00000000 + 80008a90: 8001fbfe .word 0x8001fbfe + 80008a94: 00000000 .word 0x00000000 + 80008a98: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xa5a5a5a5a5a5a5a5 + 80008a9c: 000cbc03 ld x24,0(x25) + 80008aa0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xa5a5a5a5a5a5a5a5 + 80008aa4: 000cb883 ld x17,0(x25) + 80008aa8: 008c8c93 addi x25,x25,8 + +0000000080008aac : +Zkne_aes64es_cg_cp_sbox_b165: + aes64es x14, x24, x17 # perform operation + 80008aac: 331c0733 aes64es x14,x24,x17 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b165, Zkne_aes64es_cg_cp_sbox_b165_str) + 80008ab0: 00083203 ld x4,0(x16) + 80008ab4: 00e20c63 beq x4,x14,80008acc + 80008ab8: 648022ef jal x5,8000b100 + 80008abc: 80008aac .word 0x80008aac + 80008ac0: 00000000 .word 0x00000000 + 80008ac4: 8001fc37 .word 0x8001fc37 + 80008ac8: 00000000 .word 0x00000000 + 80008acc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xa6a6a6a6a6a6a6a6 + 80008ad0: 000cb683 ld x13,0(x25) + 80008ad4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xa6a6a6a6a6a6a6a6 + 80008ad8: 000cb383 ld x7,0(x25) + 80008adc: 008c8c93 addi x25,x25,8 + +0000000080008ae0 : +Zkne_aes64es_cg_cp_sbox_b166: + aes64es x3, x13, x7 # perform operation + 80008ae0: 327681b3 aes64es x3,x13,x7 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b166, Zkne_aes64es_cg_cp_sbox_b166_str) + 80008ae4: 00083203 ld x4,0(x16) + 80008ae8: 00320c63 beq x4,x3,80008b00 + 80008aec: 614022ef jal x5,8000b100 + 80008af0: 80008ae0 .word 0x80008ae0 + 80008af4: 00000000 .word 0x00000000 + 80008af8: 8001fc70 .word 0x8001fc70 + 80008afc: 00000000 .word 0x00000000 + 80008b00: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xa7a7a7a7a7a7a7a7 + 80008b04: 000cba03 ld x20,0(x25) + 80008b08: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xa7a7a7a7a7a7a7a7 + 80008b0c: 000cbf83 ld x31,0(x25) + 80008b10: 008c8c93 addi x25,x25,8 + +0000000080008b14 : +Zkne_aes64es_cg_cp_sbox_b167: + aes64es x1, x20, x31 # perform operation + 80008b14: 33fa00b3 aes64es x1,x20,x31 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b167, Zkne_aes64es_cg_cp_sbox_b167_str) + 80008b18: 00083203 ld x4,0(x16) + 80008b1c: 00120c63 beq x4,x1,80008b34 + 80008b20: 5e0022ef jal x5,8000b100 + 80008b24: 80008b14 .word 0x80008b14 + 80008b28: 00000000 .word 0x00000000 + 80008b2c: 8001fca9 .word 0x8001fca9 + 80008b30: 00000000 .word 0x00000000 + 80008b34: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xa8a8a8a8a8a8a8a8 + 80008b38: 000cb683 ld x13,0(x25) + 80008b3c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xa8a8a8a8a8a8a8a8 + 80008b40: 000cbe03 ld x28,0(x25) + 80008b44: 008c8c93 addi x25,x25,8 + +0000000080008b48 : +Zkne_aes64es_cg_cp_sbox_b168: + aes64es x17, x13, x28 # perform operation + 80008b48: 33c688b3 aes64es x17,x13,x28 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b168, Zkne_aes64es_cg_cp_sbox_b168_str) + 80008b4c: 00083203 ld x4,0(x16) + 80008b50: 01120c63 beq x4,x17,80008b68 + 80008b54: 5ac022ef jal x5,8000b100 + 80008b58: 80008b48 .word 0x80008b48 + 80008b5c: 00000000 .word 0x00000000 + 80008b60: 8001fce2 .word 0x8001fce2 + 80008b64: 00000000 .word 0x00000000 + 80008b68: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xa9a9a9a9a9a9a9a9 + 80008b6c: 000cba83 ld x21,0(x25) + 80008b70: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xa9a9a9a9a9a9a9a9 + 80008b74: 000cbe03 ld x28,0(x25) + 80008b78: 008c8c93 addi x25,x25,8 + +0000000080008b7c : +Zkne_aes64es_cg_cp_sbox_b169: + aes64es x6, x21, x28 # perform operation + 80008b7c: 33ca8333 aes64es x6,x21,x28 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b169, Zkne_aes64es_cg_cp_sbox_b169_str) + 80008b80: 00083203 ld x4,0(x16) + 80008b84: 00620c63 beq x4,x6,80008b9c + 80008b88: 578022ef jal x5,8000b100 + 80008b8c: 80008b7c .word 0x80008b7c + 80008b90: 00000000 .word 0x00000000 + 80008b94: 8001fd1b .word 0x8001fd1b + 80008b98: 00000000 .word 0x00000000 + 80008b9c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80008ba0: 000cb903 ld x18,0(x25) + 80008ba4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80008ba8: 000cbe03 ld x28,0(x25) + 80008bac: 008c8c93 addi x25,x25,8 + +0000000080008bb0 : +Zkne_aes64es_cg_cp_sbox_b170: + aes64es x29, x18, x28 # perform operation + 80008bb0: 33c90eb3 aes64es x29,x18,x28 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b170, Zkne_aes64es_cg_cp_sbox_b170_str) + 80008bb4: 00083203 ld x4,0(x16) + 80008bb8: 01d20c63 beq x4,x29,80008bd0 + 80008bbc: 544022ef jal x5,8000b100 + 80008bc0: 80008bb0 .word 0x80008bb0 + 80008bc4: 00000000 .word 0x00000000 + 80008bc8: 8001fd54 .word 0x8001fd54 + 80008bcc: 00000000 .word 0x00000000 + 80008bd0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xabababababababab + 80008bd4: 000cb583 ld x11,0(x25) + 80008bd8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xabababababababab + 80008bdc: 000cb303 ld x6,0(x25) + 80008be0: 008c8c93 addi x25,x25,8 + +0000000080008be4 : +Zkne_aes64es_cg_cp_sbox_b171: + aes64es x2, x11, x6 # perform operation + 80008be4: 32658133 aes64es x2,x11,x6 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b171, Zkne_aes64es_cg_cp_sbox_b171_str) + 80008be8: 00083203 ld x4,0(x16) + 80008bec: 00220c63 beq x4,x2,80008c04 + 80008bf0: 510022ef jal x5,8000b100 + 80008bf4: 80008be4 .word 0x80008be4 + 80008bf8: 00000000 .word 0x00000000 + 80008bfc: 8001fd8d .word 0x8001fd8d + 80008c00: 00000000 .word 0x00000000 + 80008c04: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xacacacacacacacac + 80008c08: 000cbc03 ld x24,0(x25) + 80008c0c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0xacacacacacacacac + 80008c10: 000cba83 ld x21,0(x25) + 80008c14: 008c8c93 addi x25,x25,8 + +0000000080008c18 : +Zkne_aes64es_cg_cp_sbox_b172: + aes64es x27, x24, x21 # perform operation + 80008c18: 335c0db3 aes64es x27,x24,x21 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b172, Zkne_aes64es_cg_cp_sbox_b172_str) + 80008c1c: 00083203 ld x4,0(x16) + 80008c20: 01b20c63 beq x4,x27,80008c38 + 80008c24: 4dc022ef jal x5,8000b100 + 80008c28: 80008c18 .word 0x80008c18 + 80008c2c: 00000000 .word 0x00000000 + 80008c30: 8001fdc6 .word 0x8001fdc6 + 80008c34: 00000000 .word 0x00000000 + 80008c38: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0xadadadadadadadad + 80008c3c: 000cb103 ld x2,0(x25) + 80008c40: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xadadadadadadadad + 80008c44: 000cbe03 ld x28,0(x25) + 80008c48: 008c8c93 addi x25,x25,8 + +0000000080008c4c : +Zkne_aes64es_cg_cp_sbox_b173: + aes64es x17, x2, x28 # perform operation + 80008c4c: 33c108b3 aes64es x17,x2,x28 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b173, Zkne_aes64es_cg_cp_sbox_b173_str) + 80008c50: 00083203 ld x4,0(x16) + 80008c54: 01120c63 beq x4,x17,80008c6c + 80008c58: 4a8022ef jal x5,8000b100 + 80008c5c: 80008c4c .word 0x80008c4c + 80008c60: 00000000 .word 0x00000000 + 80008c64: 8001fdff .word 0x8001fdff + 80008c68: 00000000 .word 0x00000000 + 80008c6c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xaeaeaeaeaeaeaeae + 80008c70: 000cb303 ld x6,0(x25) + 80008c74: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xaeaeaeaeaeaeaeae + 80008c78: 000cba03 ld x20,0(x25) + 80008c7c: 008c8c93 addi x25,x25,8 + +0000000080008c80 : +Zkne_aes64es_cg_cp_sbox_b174: + aes64es x13, x6, x20 # perform operation + 80008c80: 334306b3 aes64es x13,x6,x20 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b174, Zkne_aes64es_cg_cp_sbox_b174_str) + 80008c84: 00083203 ld x4,0(x16) + 80008c88: 00d20c63 beq x4,x13,80008ca0 + 80008c8c: 474022ef jal x5,8000b100 + 80008c90: 80008c80 .word 0x80008c80 + 80008c94: 00000000 .word 0x00000000 + 80008c98: 8001fe38 .word 0x8001fe38 + 80008c9c: 00000000 .word 0x00000000 + 80008ca0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xafafafafafafafaf + 80008ca4: 000cb883 ld x17,0(x25) + 80008ca8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xafafafafafafafaf + 80008cac: 000cb103 ld x2,0(x25) + 80008cb0: 008c8c93 addi x25,x25,8 + +0000000080008cb4 : +Zkne_aes64es_cg_cp_sbox_b175: + aes64es x13, x17, x2 # perform operation + 80008cb4: 322886b3 aes64es x13,x17,x2 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b175, Zkne_aes64es_cg_cp_sbox_b175_str) + 80008cb8: 00083203 ld x4,0(x16) + 80008cbc: 00d20c63 beq x4,x13,80008cd4 + 80008cc0: 440022ef jal x5,8000b100 + 80008cc4: 80008cb4 .word 0x80008cb4 + 80008cc8: 00000000 .word 0x00000000 + 80008ccc: 8001fe71 .word 0x8001fe71 + 80008cd0: 00000000 .word 0x00000000 + 80008cd4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xb0b0b0b0b0b0b0b0 + 80008cd8: 000cbe03 ld x28,0(x25) + 80008cdc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xb0b0b0b0b0b0b0b0 + 80008ce0: 000cbb83 ld x23,0(x25) + 80008ce4: 008c8c93 addi x25,x25,8 + +0000000080008ce8 : +Zkne_aes64es_cg_cp_sbox_b176: + aes64es x26, x28, x23 # perform operation + 80008ce8: 337e0d33 aes64es x26,x28,x23 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b176, Zkne_aes64es_cg_cp_sbox_b176_str) + 80008cec: 00083203 ld x4,0(x16) + 80008cf0: 01a20c63 beq x4,x26,80008d08 + 80008cf4: 40c022ef jal x5,8000b100 + 80008cf8: 80008ce8 .word 0x80008ce8 + 80008cfc: 00000000 .word 0x00000000 + 80008d00: 8001feaa .word 0x8001feaa + 80008d04: 00000000 .word 0x00000000 + 80008d08: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xb1b1b1b1b1b1b1b1 + 80008d0c: 000cb683 ld x13,0(x25) + 80008d10: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xb1b1b1b1b1b1b1b1 + 80008d14: 000cb383 ld x7,0(x25) + 80008d18: 008c8c93 addi x25,x25,8 + +0000000080008d1c : +Zkne_aes64es_cg_cp_sbox_b177: + aes64es x8, x13, x7 # perform operation + 80008d1c: 32768433 aes64es x8,x13,x7 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b177, Zkne_aes64es_cg_cp_sbox_b177_str) + 80008d20: 00083203 ld x4,0(x16) + 80008d24: 00820c63 beq x4,x8,80008d3c + 80008d28: 3d8022ef jal x5,8000b100 + 80008d2c: 80008d1c .word 0x80008d1c + 80008d30: 00000000 .word 0x00000000 + 80008d34: 8001fee3 .word 0x8001fee3 + 80008d38: 00000000 .word 0x00000000 + 80008d3c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xb2b2b2b2b2b2b2b2 + 80008d40: 000cba03 ld x20,0(x25) + 80008d44: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xb2b2b2b2b2b2b2b2 + 80008d48: 000cb603 ld x12,0(x25) + 80008d4c: 008c8c93 addi x25,x25,8 + +0000000080008d50 : +Zkne_aes64es_cg_cp_sbox_b178: + aes64es x27, x20, x12 # perform operation + 80008d50: 32ca0db3 aes64es x27,x20,x12 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b178, Zkne_aes64es_cg_cp_sbox_b178_str) + 80008d54: 00083203 ld x4,0(x16) + 80008d58: 01b20c63 beq x4,x27,80008d70 + 80008d5c: 3a4022ef jal x5,8000b100 + 80008d60: 80008d50 .word 0x80008d50 + 80008d64: 00000000 .word 0x00000000 + 80008d68: 8001ff1c .word 0x8001ff1c + 80008d6c: 00000000 .word 0x00000000 + 80008d70: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xb3b3b3b3b3b3b3b3 + 80008d74: 000cbc03 ld x24,0(x25) + 80008d78: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xb3b3b3b3b3b3b3b3 + 80008d7c: 000cb983 ld x19,0(x25) + 80008d80: 008c8c93 addi x25,x25,8 + +0000000080008d84 : +Zkne_aes64es_cg_cp_sbox_b179: + aes64es x30, x24, x19 # perform operation + 80008d84: 333c0f33 aes64es x30,x24,x19 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b179, Zkne_aes64es_cg_cp_sbox_b179_str) + 80008d88: 00083203 ld x4,0(x16) + 80008d8c: 01e20c63 beq x4,x30,80008da4 + 80008d90: 370022ef jal x5,8000b100 + 80008d94: 80008d84 .word 0x80008d84 + 80008d98: 00000000 .word 0x00000000 + 80008d9c: 8001ff55 .word 0x8001ff55 + 80008da0: 00000000 .word 0x00000000 + 80008da4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xb4b4b4b4b4b4b4b4 + 80008da8: 000cb903 ld x18,0(x25) + 80008dac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0xb4b4b4b4b4b4b4b4 + 80008db0: 000cb583 ld x11,0(x25) + 80008db4: 008c8c93 addi x25,x25,8 + +0000000080008db8 : +Zkne_aes64es_cg_cp_sbox_b180: + aes64es x12, x18, x11 # perform operation + 80008db8: 32b90633 aes64es x12,x18,x11 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b180, Zkne_aes64es_cg_cp_sbox_b180_str) + 80008dbc: 00083203 ld x4,0(x16) + 80008dc0: 00c20c63 beq x4,x12,80008dd8 + 80008dc4: 33c022ef jal x5,8000b100 + 80008dc8: 80008db8 .word 0x80008db8 + 80008dcc: 00000000 .word 0x00000000 + 80008dd0: 8001ff8e .word 0x8001ff8e + 80008dd4: 00000000 .word 0x00000000 + 80008dd8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xb5b5b5b5b5b5b5b5 + 80008ddc: 000cbb03 ld x22,0(x25) + 80008de0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xb5b5b5b5b5b5b5b5 + 80008de4: 000cbf03 ld x30,0(x25) + 80008de8: 008c8c93 addi x25,x25,8 + +0000000080008dec : +Zkne_aes64es_cg_cp_sbox_b181: + aes64es x29, x22, x30 # perform operation + 80008dec: 33eb0eb3 aes64es x29,x22,x30 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64es_cg_cp_sbox_b181, Zkne_aes64es_cg_cp_sbox_b181_str) + 80008df0: 00083203 ld x4,0(x16) + 80008df4: 01d20c63 beq x4,x29,80008e0c + 80008df8: 308022ef jal x5,8000b100 + 80008dfc: 80008dec .word 0x80008dec + 80008e00: 00000000 .word 0x00000000 + 80008e04: 8001ffc7 .word 0x8001ffc7 + 80008e08: 00000000 .word 0x00000000 + 80008e0c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xb6b6b6b6b6b6b6b6 + 80008e10: 000cb583 ld x11,0(x25) + 80008e14: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs2: x3 = 0xb6b6b6b6b6b6b6b6 + 80008e18: 000cb183 ld x3,0(x25) + 80008e1c: 008c8c93 addi x25,x25,8 + +0000000080008e20 : +Zkne_aes64es_cg_cp_sbox_b182: + aes64es x26, x11, x3 # perform operation + 80008e20: 32358d33 aes64es x26,x11,x3 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b182, Zkne_aes64es_cg_cp_sbox_b182_str) + 80008e24: 00083203 ld x4,0(x16) + 80008e28: 01a20c63 beq x4,x26,80008e40 + 80008e2c: 2d4022ef jal x5,8000b100 + 80008e30: 80008e20 .word 0x80008e20 + 80008e34: 00000000 .word 0x00000000 + 80008e38: 80020000 .word 0x80020000 + 80008e3c: 00000000 .word 0x00000000 + 80008e40: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xb7b7b7b7b7b7b7b7 + 80008e44: 000cba83 ld x21,0(x25) + 80008e48: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xb7b7b7b7b7b7b7b7 + 80008e4c: 000cbe83 ld x29,0(x25) + 80008e50: 008c8c93 addi x25,x25,8 + +0000000080008e54 : +Zkne_aes64es_cg_cp_sbox_b183: + aes64es x2, x21, x29 # perform operation + 80008e54: 33da8133 aes64es x2,x21,x29 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b183, Zkne_aes64es_cg_cp_sbox_b183_str) + 80008e58: 00083203 ld x4,0(x16) + 80008e5c: 00220c63 beq x4,x2,80008e74 + 80008e60: 2a0022ef jal x5,8000b100 + 80008e64: 80008e54 .word 0x80008e54 + 80008e68: 00000000 .word 0x00000000 + 80008e6c: 80020039 .word 0x80020039 + 80008e70: 00000000 .word 0x00000000 + 80008e74: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xb8b8b8b8b8b8b8b8 + 80008e78: 000cbf83 ld x31,0(x25) + 80008e7c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0xb8b8b8b8b8b8b8b8 + 80008e80: 000cb783 ld x15,0(x25) + 80008e84: 008c8c93 addi x25,x25,8 + +0000000080008e88 : +Zkne_aes64es_cg_cp_sbox_b184: + aes64es x30, x31, x15 # perform operation + 80008e88: 32ff8f33 aes64es x30,x31,x15 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b184, Zkne_aes64es_cg_cp_sbox_b184_str) + 80008e8c: 00083203 ld x4,0(x16) + 80008e90: 01e20c63 beq x4,x30,80008ea8 + 80008e94: 26c022ef jal x5,8000b100 + 80008e98: 80008e88 .word 0x80008e88 + 80008e9c: 00000000 .word 0x00000000 + 80008ea0: 80020072 .word 0x80020072 + 80008ea4: 00000000 .word 0x00000000 + 80008ea8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xb9b9b9b9b9b9b9b9 + 80008eac: 000cb683 ld x13,0(x25) + 80008eb0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0xb9b9b9b9b9b9b9b9 + 80008eb4: 000cb903 ld x18,0(x25) + 80008eb8: 008c8c93 addi x25,x25,8 + +0000000080008ebc : +Zkne_aes64es_cg_cp_sbox_b185: + aes64es x27, x13, x18 # perform operation + 80008ebc: 33268db3 aes64es x27,x13,x18 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b185, Zkne_aes64es_cg_cp_sbox_b185_str) + 80008ec0: 00083203 ld x4,0(x16) + 80008ec4: 01b20c63 beq x4,x27,80008edc + 80008ec8: 238022ef jal x5,8000b100 + 80008ecc: 80008ebc .word 0x80008ebc + 80008ed0: 00000000 .word 0x00000000 + 80008ed4: 800200ab .word 0x800200ab + 80008ed8: 00000000 .word 0x00000000 + 80008edc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xbabababababababa + 80008ee0: 000cbd03 ld x26,0(x25) + 80008ee4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xbabababababababa + 80008ee8: 000cb103 ld x2,0(x25) + 80008eec: 008c8c93 addi x25,x25,8 + +0000000080008ef0 : +Zkne_aes64es_cg_cp_sbox_b186: + aes64es x15, x26, x2 # perform operation + 80008ef0: 322d07b3 aes64es x15,x26,x2 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b186, Zkne_aes64es_cg_cp_sbox_b186_str) + 80008ef4: 00083203 ld x4,0(x16) + 80008ef8: 00f20c63 beq x4,x15,80008f10 + 80008efc: 204022ef jal x5,8000b100 + 80008f00: 80008ef0 .word 0x80008ef0 + 80008f04: 00000000 .word 0x00000000 + 80008f08: 800200e4 .word 0x800200e4 + 80008f0c: 00000000 .word 0x00000000 + 80008f10: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0xbbbbbbbbbbbbbbbb + 80008f14: 000cb083 ld x1,0(x25) + 80008f18: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xbbbbbbbbbbbbbbbb + 80008f1c: 000cb103 ld x2,0(x25) + 80008f20: 008c8c93 addi x25,x25,8 + +0000000080008f24 : +Zkne_aes64es_cg_cp_sbox_b187: + aes64es x9, x1, x2 # perform operation + 80008f24: 322084b3 aes64es x9,x1,x2 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b187, Zkne_aes64es_cg_cp_sbox_b187_str) + 80008f28: 00083203 ld x4,0(x16) + 80008f2c: 00920c63 beq x4,x9,80008f44 + 80008f30: 1d0022ef jal x5,8000b100 + 80008f34: 80008f24 .word 0x80008f24 + 80008f38: 00000000 .word 0x00000000 + 80008f3c: 8002011d .word 0x8002011d + 80008f40: 00000000 .word 0x00000000 + 80008f44: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xbcbcbcbcbcbcbcbc + 80008f48: 000cb403 ld x8,0(x25) + 80008f4c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xbcbcbcbcbcbcbcbc + 80008f50: 000cbe03 ld x28,0(x25) + 80008f54: 008c8c93 addi x25,x25,8 + +0000000080008f58 : +Zkne_aes64es_cg_cp_sbox_b188: + aes64es x21, x8, x28 # perform operation + 80008f58: 33c40ab3 aes64es x21,x8,x28 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b188, Zkne_aes64es_cg_cp_sbox_b188_str) + 80008f5c: 00083203 ld x4,0(x16) + 80008f60: 01520c63 beq x4,x21,80008f78 + 80008f64: 19c022ef jal x5,8000b100 + 80008f68: 80008f58 .word 0x80008f58 + 80008f6c: 00000000 .word 0x00000000 + 80008f70: 80020156 .word 0x80020156 + 80008f74: 00000000 .word 0x00000000 + 80008f78: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xbdbdbdbdbdbdbdbd + 80008f7c: 000cb983 ld x19,0(x25) + 80008f80: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xbdbdbdbdbdbdbdbd + 80008f84: 000cb383 ld x7,0(x25) + 80008f88: 008c8c93 addi x25,x25,8 + +0000000080008f8c : +Zkne_aes64es_cg_cp_sbox_b189: + aes64es x1, x19, x7 # perform operation + 80008f8c: 327980b3 aes64es x1,x19,x7 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b189, Zkne_aes64es_cg_cp_sbox_b189_str) + 80008f90: 00083203 ld x4,0(x16) + 80008f94: 00120c63 beq x4,x1,80008fac + 80008f98: 168022ef jal x5,8000b100 + 80008f9c: 80008f8c .word 0x80008f8c + 80008fa0: 00000000 .word 0x00000000 + 80008fa4: 8002018f .word 0x8002018f + 80008fa8: 00000000 .word 0x00000000 + 80008fac: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xbebebebebebebebe + 80008fb0: 000cbd03 ld x26,0(x25) + 80008fb4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0xbebebebebebebebe + 80008fb8: 000cb783 ld x15,0(x25) + 80008fbc: 008c8c93 addi x25,x25,8 + +0000000080008fc0 : +Zkne_aes64es_cg_cp_sbox_b190: + aes64es x13, x26, x15 # perform operation + 80008fc0: 32fd06b3 aes64es x13,x26,x15 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b190, Zkne_aes64es_cg_cp_sbox_b190_str) + 80008fc4: 00083203 ld x4,0(x16) + 80008fc8: 00d20c63 beq x4,x13,80008fe0 + 80008fcc: 134022ef jal x5,8000b100 + 80008fd0: 80008fc0 .word 0x80008fc0 + 80008fd4: 00000000 .word 0x00000000 + 80008fd8: 800201c8 .word 0x800201c8 + 80008fdc: 00000000 .word 0x00000000 + 80008fe0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xbfbfbfbfbfbfbfbf + 80008fe4: 000cb903 ld x18,0(x25) + 80008fe8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xbfbfbfbfbfbfbfbf + 80008fec: 000cbf03 ld x30,0(x25) + 80008ff0: 008c8c93 addi x25,x25,8 + +0000000080008ff4 : +Zkne_aes64es_cg_cp_sbox_b191: + aes64es x15, x18, x30 # perform operation + 80008ff4: 33e907b3 aes64es x15,x18,x30 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64es_cg_cp_sbox_b191, Zkne_aes64es_cg_cp_sbox_b191_str) + 80008ff8: 00083203 ld x4,0(x16) + 80008ffc: 00f20c63 beq x4,x15,80009014 + 80009000: 100022ef jal x5,8000b100 + 80009004: 80008ff4 .word 0x80008ff4 + 80009008: 00000000 .word 0x00000000 + 8000900c: 80020201 .word 0x80020201 + 80009010: 00000000 .word 0x00000000 + 80009014: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xc0c0c0c0c0c0c0c0 + 80009018: 000cb303 ld x6,0(x25) + 8000901c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xc0c0c0c0c0c0c0c0 + 80009020: 000cbe83 ld x29,0(x25) + 80009024: 008c8c93 addi x25,x25,8 + +0000000080009028 : +Zkne_aes64es_cg_cp_sbox_b192: + aes64es x11, x6, x29 # perform operation + 80009028: 33d305b3 aes64es x11,x6,x29 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b192, Zkne_aes64es_cg_cp_sbox_b192_str) + 8000902c: 00083203 ld x4,0(x16) + 80009030: 00b20c63 beq x4,x11,80009048 + 80009034: 0cc022ef jal x5,8000b100 + 80009038: 80009028 .word 0x80009028 + 8000903c: 00000000 .word 0x00000000 + 80009040: 8002023a .word 0x8002023a + 80009044: 00000000 .word 0x00000000 + 80009048: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xc1c1c1c1c1c1c1c1 + 8000904c: 000cbe83 ld x29,0(x25) + 80009050: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0xc1c1c1c1c1c1c1c1 + 80009054: 000cb403 ld x8,0(x25) + 80009058: 008c8c93 addi x25,x25,8 + +000000008000905c : +Zkne_aes64es_cg_cp_sbox_b193: + aes64es x24, x29, x8 # perform operation + 8000905c: 328e8c33 aes64es x24,x29,x8 + # Check if x24 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x24, Zkne_aes64es_cg_cp_sbox_b193, Zkne_aes64es_cg_cp_sbox_b193_str) + 80009060: 00083203 ld x4,0(x16) + 80009064: 01820c63 beq x4,x24,8000907c + 80009068: 098022ef jal x5,8000b100 + 8000906c: 8000905c .word 0x8000905c + 80009070: 00000000 .word 0x00000000 + 80009074: 80020273 .word 0x80020273 + 80009078: 00000000 .word 0x00000000 + 8000907c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xc2c2c2c2c2c2c2c2 + 80009080: 000cb383 ld x7,0(x25) + 80009084: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0xc2c2c2c2c2c2c2c2 + 80009088: 000cb583 ld x11,0(x25) + 8000908c: 008c8c93 addi x25,x25,8 + +0000000080009090 : +Zkne_aes64es_cg_cp_sbox_b194: + aes64es x8, x7, x11 # perform operation + 80009090: 32b38433 aes64es x8,x7,x11 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b194, Zkne_aes64es_cg_cp_sbox_b194_str) + 80009094: 00083203 ld x4,0(x16) + 80009098: 00820c63 beq x4,x8,800090b0 + 8000909c: 064022ef jal x5,8000b100 + 800090a0: 80009090 .word 0x80009090 + 800090a4: 00000000 .word 0x00000000 + 800090a8: 800202ac .word 0x800202ac + 800090ac: 00000000 .word 0x00000000 + 800090b0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xc3c3c3c3c3c3c3c3 + 800090b4: 000cbe83 ld x29,0(x25) + 800090b8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xc3c3c3c3c3c3c3c3 + 800090bc: 000cb383 ld x7,0(x25) + 800090c0: 008c8c93 addi x25,x25,8 + +00000000800090c4 : +Zkne_aes64es_cg_cp_sbox_b195: + aes64es x18, x29, x7 # perform operation + 800090c4: 327e8933 aes64es x18,x29,x7 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b195, Zkne_aes64es_cg_cp_sbox_b195_str) + 800090c8: 00083203 ld x4,0(x16) + 800090cc: 01220c63 beq x4,x18,800090e4 + 800090d0: 030022ef jal x5,8000b100 + 800090d4: 800090c4 .word 0x800090c4 + 800090d8: 00000000 .word 0x00000000 + 800090dc: 800202e5 .word 0x800202e5 + 800090e0: 00000000 .word 0x00000000 + 800090e4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xc4c4c4c4c4c4c4c4 + 800090e8: 000cbd83 ld x27,0(x25) + 800090ec: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs2: x21 = 0xc4c4c4c4c4c4c4c4 + 800090f0: 000cba83 ld x21,0(x25) + 800090f4: 008c8c93 addi x25,x25,8 + +00000000800090f8 : +Zkne_aes64es_cg_cp_sbox_b196: + aes64es x19, x27, x21 # perform operation + 800090f8: 335d89b3 aes64es x19,x27,x21 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b196, Zkne_aes64es_cg_cp_sbox_b196_str) + 800090fc: 00083203 ld x4,0(x16) + 80009100: 01320c63 beq x4,x19,80009118 + 80009104: 7fd012ef jal x5,8000b100 + 80009108: 800090f8 .word 0x800090f8 + 8000910c: 00000000 .word 0x00000000 + 80009110: 8002031e .word 0x8002031e + 80009114: 00000000 .word 0x00000000 + 80009118: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0xc5c5c5c5c5c5c5c5 + 8000911c: 000cb083 ld x1,0(x25) + 80009120: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xc5c5c5c5c5c5c5c5 + 80009124: 000cbc03 ld x24,0(x25) + 80009128: 008c8c93 addi x25,x25,8 + +000000008000912c : +Zkne_aes64es_cg_cp_sbox_b197: + aes64es x21, x1, x24 # perform operation + 8000912c: 33808ab3 aes64es x21,x1,x24 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b197, Zkne_aes64es_cg_cp_sbox_b197_str) + 80009130: 00083203 ld x4,0(x16) + 80009134: 01520c63 beq x4,x21,8000914c + 80009138: 7c9012ef jal x5,8000b100 + 8000913c: 8000912c .word 0x8000912c + 80009140: 00000000 .word 0x00000000 + 80009144: 80020357 .word 0x80020357 + 80009148: 00000000 .word 0x00000000 + 8000914c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xc6c6c6c6c6c6c6c6 + 80009150: 000cbd83 ld x27,0(x25) + 80009154: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xc6c6c6c6c6c6c6c6 + 80009158: 000cb983 ld x19,0(x25) + 8000915c: 008c8c93 addi x25,x25,8 + +0000000080009160 : +Zkne_aes64es_cg_cp_sbox_b198: + aes64es x10, x27, x19 # perform operation + 80009160: 333d8533 aes64es x10,x27,x19 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zkne_aes64es_cg_cp_sbox_b198, Zkne_aes64es_cg_cp_sbox_b198_str) + 80009164: 00083203 ld x4,0(x16) + 80009168: 00a20c63 beq x4,x10,80009180 + 8000916c: 795012ef jal x5,8000b100 + 80009170: 80009160 .word 0x80009160 + 80009174: 00000000 .word 0x00000000 + 80009178: 80020390 .word 0x80020390 + 8000917c: 00000000 .word 0x00000000 + 80009180: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xc7c7c7c7c7c7c7c7 + 80009184: 000cbe03 ld x28,0(x25) + 80009188: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xc7c7c7c7c7c7c7c7 + 8000918c: 000cbe83 ld x29,0(x25) + 80009190: 008c8c93 addi x25,x25,8 + +0000000080009194 : +Zkne_aes64es_cg_cp_sbox_b199: + aes64es x11, x28, x29 # perform operation + 80009194: 33de05b3 aes64es x11,x28,x29 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b199, Zkne_aes64es_cg_cp_sbox_b199_str) + 80009198: 00083203 ld x4,0(x16) + 8000919c: 00b20c63 beq x4,x11,800091b4 + 800091a0: 761012ef jal x5,8000b100 + 800091a4: 80009194 .word 0x80009194 + 800091a8: 00000000 .word 0x00000000 + 800091ac: 800203c9 .word 0x800203c9 + 800091b0: 00000000 .word 0x00000000 + 800091b4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xc8c8c8c8c8c8c8c8 + 800091b8: 000cb883 ld x17,0(x25) + 800091bc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xc8c8c8c8c8c8c8c8 + 800091c0: 000cb083 ld x1,0(x25) + 800091c4: 008c8c93 addi x25,x25,8 + +00000000800091c8 : +Zkne_aes64es_cg_cp_sbox_b200: + aes64es x28, x17, x1 # perform operation + 800091c8: 32188e33 aes64es x28,x17,x1 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b200, Zkne_aes64es_cg_cp_sbox_b200_str) + 800091cc: 00083203 ld x4,0(x16) + 800091d0: 01c20c63 beq x4,x28,800091e8 + 800091d4: 72d012ef jal x5,8000b100 + 800091d8: 800091c8 .word 0x800091c8 + 800091dc: 00000000 .word 0x00000000 + 800091e0: 80020402 .word 0x80020402 + 800091e4: 00000000 .word 0x00000000 + 800091e8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xc9c9c9c9c9c9c9c9 + 800091ec: 000cb883 ld x17,0(x25) + 800091f0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xc9c9c9c9c9c9c9c9 + 800091f4: 000cb603 ld x12,0(x25) + 800091f8: 008c8c93 addi x25,x25,8 + +00000000800091fc : +Zkne_aes64es_cg_cp_sbox_b201: + aes64es x30, x17, x12 # perform operation + 800091fc: 32c88f33 aes64es x30,x17,x12 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b201, Zkne_aes64es_cg_cp_sbox_b201_str) + 80009200: 00083203 ld x4,0(x16) + 80009204: 01e20c63 beq x4,x30,8000921c + 80009208: 6f9012ef jal x5,8000b100 + 8000920c: 800091fc .word 0x800091fc + 80009210: 00000000 .word 0x00000000 + 80009214: 8002043b .word 0x8002043b + 80009218: 00000000 .word 0x00000000 + 8000921c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xcacacacacacacaca + 80009220: 000cba83 ld x21,0(x25) + 80009224: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0xcacacacacacacaca + 80009228: 000cb903 ld x18,0(x25) + 8000922c: 008c8c93 addi x25,x25,8 + +0000000080009230 : +Zkne_aes64es_cg_cp_sbox_b202: + aes64es x8, x21, x18 # perform operation + 80009230: 332a8433 aes64es x8,x21,x18 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b202, Zkne_aes64es_cg_cp_sbox_b202_str) + 80009234: 00083203 ld x4,0(x16) + 80009238: 00820c63 beq x4,x8,80009250 + 8000923c: 6c5012ef jal x5,8000b100 + 80009240: 80009230 .word 0x80009230 + 80009244: 00000000 .word 0x00000000 + 80009248: 80020474 .word 0x80020474 + 8000924c: 00000000 .word 0x00000000 + 80009250: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xcbcbcbcbcbcbcbcb + 80009254: 000cba83 ld x21,0(x25) + 80009258: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xcbcbcbcbcbcbcbcb + 8000925c: 000cb383 ld x7,0(x25) + 80009260: 008c8c93 addi x25,x25,8 + +0000000080009264 : +Zkne_aes64es_cg_cp_sbox_b203: + aes64es x31, x21, x7 # perform operation + 80009264: 327a8fb3 aes64es x31,x21,x7 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b203, Zkne_aes64es_cg_cp_sbox_b203_str) + 80009268: 00083203 ld x4,0(x16) + 8000926c: 01f20c63 beq x4,x31,80009284 + 80009270: 691012ef jal x5,8000b100 + 80009274: 80009264 .word 0x80009264 + 80009278: 00000000 .word 0x00000000 + 8000927c: 800204ad .word 0x800204ad + 80009280: 00000000 .word 0x00000000 + 80009284: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xcccccccccccccccc + 80009288: 000cb683 ld x13,0(x25) + 8000928c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xcccccccccccccccc + 80009290: 000cbc03 ld x24,0(x25) + 80009294: 008c8c93 addi x25,x25,8 + +0000000080009298 : +Zkne_aes64es_cg_cp_sbox_b204: + aes64es x18, x13, x24 # perform operation + 80009298: 33868933 aes64es x18,x13,x24 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b204, Zkne_aes64es_cg_cp_sbox_b204_str) + 8000929c: 00083203 ld x4,0(x16) + 800092a0: 01220c63 beq x4,x18,800092b8 + 800092a4: 65d012ef jal x5,8000b100 + 800092a8: 80009298 .word 0x80009298 + 800092ac: 00000000 .word 0x00000000 + 800092b0: 800204e6 .word 0x800204e6 + 800092b4: 00000000 .word 0x00000000 + 800092b8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0xcdcdcdcdcdcdcdcd + 800092bc: 000cb183 ld x3,0(x25) + 800092c0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0xcdcdcdcdcdcdcdcd + 800092c4: 000cbd03 ld x26,0(x25) + 800092c8: 008c8c93 addi x25,x25,8 + +00000000800092cc : +Zkne_aes64es_cg_cp_sbox_b205: + aes64es x14, x3, x26 # perform operation + 800092cc: 33a18733 aes64es x14,x3,x26 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b205, Zkne_aes64es_cg_cp_sbox_b205_str) + 800092d0: 00083203 ld x4,0(x16) + 800092d4: 00e20c63 beq x4,x14,800092ec + 800092d8: 629012ef jal x5,8000b100 + 800092dc: 800092cc .word 0x800092cc + 800092e0: 00000000 .word 0x00000000 + 800092e4: 8002051f .word 0x8002051f + 800092e8: 00000000 .word 0x00000000 + 800092ec: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0xcececececececece + 800092f0: 000cb183 ld x3,0(x25) + 800092f4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0xcececececececece + 800092f8: 000cb783 ld x15,0(x25) + 800092fc: 008c8c93 addi x25,x25,8 + +0000000080009300 : +Zkne_aes64es_cg_cp_sbox_b206: + aes64es x17, x3, x15 # perform operation + 80009300: 32f188b3 aes64es x17,x3,x15 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b206, Zkne_aes64es_cg_cp_sbox_b206_str) + 80009304: 00083203 ld x4,0(x16) + 80009308: 01120c63 beq x4,x17,80009320 + 8000930c: 5f5012ef jal x5,8000b100 + 80009310: 80009300 .word 0x80009300 + 80009314: 00000000 .word 0x00000000 + 80009318: 80020558 .word 0x80020558 + 8000931c: 00000000 .word 0x00000000 + 80009320: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xcfcfcfcfcfcfcfcf + 80009324: 000cb303 ld x6,0(x25) + 80009328: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xcfcfcfcfcfcfcfcf + 8000932c: 000cba03 ld x20,0(x25) + 80009330: 008c8c93 addi x25,x25,8 + +0000000080009334 : +Zkne_aes64es_cg_cp_sbox_b207: + aes64es x23, x6, x20 # perform operation + 80009334: 33430bb3 aes64es x23,x6,x20 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zkne_aes64es_cg_cp_sbox_b207, Zkne_aes64es_cg_cp_sbox_b207_str) + 80009338: 00083203 ld x4,0(x16) + 8000933c: 01720c63 beq x4,x23,80009354 + 80009340: 5c1012ef jal x5,8000b100 + 80009344: 80009334 .word 0x80009334 + 80009348: 00000000 .word 0x00000000 + 8000934c: 80020591 .word 0x80020591 + 80009350: 00000000 .word 0x00000000 + 80009354: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xd0d0d0d0d0d0d0d0 + 80009358: 000cb883 ld x17,0(x25) + 8000935c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xd0d0d0d0d0d0d0d0 + 80009360: 000cbf03 ld x30,0(x25) + 80009364: 008c8c93 addi x25,x25,8 + +0000000080009368 : +Zkne_aes64es_cg_cp_sbox_b208: + aes64es x28, x17, x30 # perform operation + 80009368: 33e88e33 aes64es x28,x17,x30 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b208, Zkne_aes64es_cg_cp_sbox_b208_str) + 8000936c: 00083203 ld x4,0(x16) + 80009370: 01c20c63 beq x4,x28,80009388 + 80009374: 58d012ef jal x5,8000b100 + 80009378: 80009368 .word 0x80009368 + 8000937c: 00000000 .word 0x00000000 + 80009380: 800205ca .word 0x800205ca + 80009384: 00000000 .word 0x00000000 + 80009388: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0xd1d1d1d1d1d1d1d1 + 8000938c: 000cbf03 ld x30,0(x25) + 80009390: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0xd1d1d1d1d1d1d1d1 + 80009394: 000cb503 ld x10,0(x25) + 80009398: 008c8c93 addi x25,x25,8 + +000000008000939c : +Zkne_aes64es_cg_cp_sbox_b209: + aes64es x13, x30, x10 # perform operation + 8000939c: 32af06b3 aes64es x13,x30,x10 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b209, Zkne_aes64es_cg_cp_sbox_b209_str) + 800093a0: 00083203 ld x4,0(x16) + 800093a4: 00d20c63 beq x4,x13,800093bc + 800093a8: 559012ef jal x5,8000b100 + 800093ac: 8000939c .word 0x8000939c + 800093b0: 00000000 .word 0x00000000 + 800093b4: 80020603 .word 0x80020603 + 800093b8: 00000000 .word 0x00000000 + 800093bc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0xd2d2d2d2d2d2d2d2 + 800093c0: 000cb603 ld x12,0(x25) + 800093c4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xd2d2d2d2d2d2d2d2 + 800093c8: 000cb083 ld x1,0(x25) + 800093cc: 008c8c93 addi x25,x25,8 + +00000000800093d0 : +Zkne_aes64es_cg_cp_sbox_b210: + aes64es x14, x12, x1 # perform operation + 800093d0: 32160733 aes64es x14,x12,x1 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b210, Zkne_aes64es_cg_cp_sbox_b210_str) + 800093d4: 00083203 ld x4,0(x16) + 800093d8: 00e20c63 beq x4,x14,800093f0 + 800093dc: 525012ef jal x5,8000b100 + 800093e0: 800093d0 .word 0x800093d0 + 800093e4: 00000000 .word 0x00000000 + 800093e8: 8002063c .word 0x8002063c + 800093ec: 00000000 .word 0x00000000 + 800093f0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xd3d3d3d3d3d3d3d3 + 800093f4: 000cbe83 ld x29,0(x25) + 800093f8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xd3d3d3d3d3d3d3d3 + 800093fc: 000cb303 ld x6,0(x25) + 80009400: 008c8c93 addi x25,x25,8 + +0000000080009404 : +Zkne_aes64es_cg_cp_sbox_b211: + aes64es x31, x29, x6 # perform operation + 80009404: 326e8fb3 aes64es x31,x29,x6 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b211, Zkne_aes64es_cg_cp_sbox_b211_str) + 80009408: 00083203 ld x4,0(x16) + 8000940c: 01f20c63 beq x4,x31,80009424 + 80009410: 4f1012ef jal x5,8000b100 + 80009414: 80009404 .word 0x80009404 + 80009418: 00000000 .word 0x00000000 + 8000941c: 80020675 .word 0x80020675 + 80009420: 00000000 .word 0x00000000 + 80009424: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xd4d4d4d4d4d4d4d4 + 80009428: 000cb303 ld x6,0(x25) + 8000942c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xd4d4d4d4d4d4d4d4 + 80009430: 000cbe03 ld x28,0(x25) + 80009434: 008c8c93 addi x25,x25,8 + +0000000080009438 : +Zkne_aes64es_cg_cp_sbox_b212: + aes64es x21, x6, x28 # perform operation + 80009438: 33c30ab3 aes64es x21,x6,x28 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b212, Zkne_aes64es_cg_cp_sbox_b212_str) + 8000943c: 00083203 ld x4,0(x16) + 80009440: 01520c63 beq x4,x21,80009458 + 80009444: 4bd012ef jal x5,8000b100 + 80009448: 80009438 .word 0x80009438 + 8000944c: 00000000 .word 0x00000000 + 80009450: 800206ae .word 0x800206ae + 80009454: 00000000 .word 0x00000000 + 80009458: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0xd5d5d5d5d5d5d5d5 + 8000945c: 000cb503 ld x10,0(x25) + 80009460: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0xd5d5d5d5d5d5d5d5 + 80009464: 000cbd83 ld x27,0(x25) + 80009468: 008c8c93 addi x25,x25,8 + +000000008000946c : +Zkne_aes64es_cg_cp_sbox_b213: + aes64es x14, x10, x27 # perform operation + 8000946c: 33b50733 aes64es x14,x10,x27 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b213, Zkne_aes64es_cg_cp_sbox_b213_str) + 80009470: 00083203 ld x4,0(x16) + 80009474: 00e20c63 beq x4,x14,8000948c + 80009478: 489012ef jal x5,8000b100 + 8000947c: 8000946c .word 0x8000946c + 80009480: 00000000 .word 0x00000000 + 80009484: 800206e7 .word 0x800206e7 + 80009488: 00000000 .word 0x00000000 + 8000948c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xd6d6d6d6d6d6d6d6 + 80009490: 000cb583 ld x11,0(x25) + 80009494: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xd6d6d6d6d6d6d6d6 + 80009498: 000cb603 ld x12,0(x25) + 8000949c: 008c8c93 addi x25,x25,8 + +00000000800094a0 : +Zkne_aes64es_cg_cp_sbox_b214: + aes64es x13, x11, x12 # perform operation + 800094a0: 32c586b3 aes64es x13,x11,x12 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b214, Zkne_aes64es_cg_cp_sbox_b214_str) + 800094a4: 00083203 ld x4,0(x16) + 800094a8: 00d20c63 beq x4,x13,800094c0 + 800094ac: 455012ef jal x5,8000b100 + 800094b0: 800094a0 .word 0x800094a0 + 800094b4: 00000000 .word 0x00000000 + 800094b8: 80020720 .word 0x80020720 + 800094bc: 00000000 .word 0x00000000 + 800094c0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xd7d7d7d7d7d7d7d7 + 800094c4: 000cb703 ld x14,0(x25) + 800094c8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0xd7d7d7d7d7d7d7d7 + 800094cc: 000cbb03 ld x22,0(x25) + 800094d0: 008c8c93 addi x25,x25,8 + +00000000800094d4 : +Zkne_aes64es_cg_cp_sbox_b215: + aes64es x7, x14, x22 # perform operation + 800094d4: 336703b3 aes64es x7,x14,x22 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b215, Zkne_aes64es_cg_cp_sbox_b215_str) + 800094d8: 00083203 ld x4,0(x16) + 800094dc: 00720c63 beq x4,x7,800094f4 + 800094e0: 421012ef jal x5,8000b100 + 800094e4: 800094d4 .word 0x800094d4 + 800094e8: 00000000 .word 0x00000000 + 800094ec: 80020759 .word 0x80020759 + 800094f0: 00000000 .word 0x00000000 + 800094f4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0xd8d8d8d8d8d8d8d8 + 800094f8: 000cb683 ld x13,0(x25) + 800094fc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xd8d8d8d8d8d8d8d8 + 80009500: 000cbe83 ld x29,0(x25) + 80009504: 008c8c93 addi x25,x25,8 + +0000000080009508 : +Zkne_aes64es_cg_cp_sbox_b216: + aes64es x28, x13, x29 # perform operation + 80009508: 33d68e33 aes64es x28,x13,x29 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b216, Zkne_aes64es_cg_cp_sbox_b216_str) + 8000950c: 00083203 ld x4,0(x16) + 80009510: 01c20c63 beq x4,x28,80009528 + 80009514: 3ed012ef jal x5,8000b100 + 80009518: 80009508 .word 0x80009508 + 8000951c: 00000000 .word 0x00000000 + 80009520: 80020792 .word 0x80020792 + 80009524: 00000000 .word 0x00000000 + 80009528: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xd9d9d9d9d9d9d9d9 + 8000952c: 000cba83 ld x21,0(x25) + 80009530: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xd9d9d9d9d9d9d9d9 + 80009534: 000cb603 ld x12,0(x25) + 80009538: 008c8c93 addi x25,x25,8 + +000000008000953c : +Zkne_aes64es_cg_cp_sbox_b217: + aes64es x11, x21, x12 # perform operation + 8000953c: 32ca85b3 aes64es x11,x21,x12 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b217, Zkne_aes64es_cg_cp_sbox_b217_str) + 80009540: 00083203 ld x4,0(x16) + 80009544: 00b20c63 beq x4,x11,8000955c + 80009548: 3b9012ef jal x5,8000b100 + 8000954c: 8000953c .word 0x8000953c + 80009550: 00000000 .word 0x00000000 + 80009554: 800207cb .word 0x800207cb + 80009558: 00000000 .word 0x00000000 + 8000955c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xdadadadadadadada + 80009560: 000cb703 ld x14,0(x25) + 80009564: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0xdadadadadadadada + 80009568: 000cb503 ld x10,0(x25) + 8000956c: 008c8c93 addi x25,x25,8 + +0000000080009570 : +Zkne_aes64es_cg_cp_sbox_b218: + aes64es x3, x14, x10 # perform operation + 80009570: 32a701b3 aes64es x3,x14,x10 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b218, Zkne_aes64es_cg_cp_sbox_b218_str) + 80009574: 00083203 ld x4,0(x16) + 80009578: 00320c63 beq x4,x3,80009590 + 8000957c: 385012ef jal x5,8000b100 + 80009580: 80009570 .word 0x80009570 + 80009584: 00000000 .word 0x00000000 + 80009588: 80020804 .word 0x80020804 + 8000958c: 00000000 .word 0x00000000 + 80009590: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xdbdbdbdbdbdbdbdb + 80009594: 000cbc03 ld x24,0(x25) + 80009598: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xdbdbdbdbdbdbdbdb + 8000959c: 000cb603 ld x12,0(x25) + 800095a0: 008c8c93 addi x25,x25,8 + +00000000800095a4 : +Zkne_aes64es_cg_cp_sbox_b219: + aes64es x1, x24, x12 # perform operation + 800095a4: 32cc00b3 aes64es x1,x24,x12 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b219, Zkne_aes64es_cg_cp_sbox_b219_str) + 800095a8: 00083203 ld x4,0(x16) + 800095ac: 00120c63 beq x4,x1,800095c4 + 800095b0: 351012ef jal x5,8000b100 + 800095b4: 800095a4 .word 0x800095a4 + 800095b8: 00000000 .word 0x00000000 + 800095bc: 8002083d .word 0x8002083d + 800095c0: 00000000 .word 0x00000000 + 800095c4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xdcdcdcdcdcdcdcdc + 800095c8: 000cb883 ld x17,0(x25) + 800095cc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs2: x12 = 0xdcdcdcdcdcdcdcdc + 800095d0: 000cb603 ld x12,0(x25) + 800095d4: 008c8c93 addi x25,x25,8 + +00000000800095d8 : +Zkne_aes64es_cg_cp_sbox_b220: + aes64es x31, x17, x12 # perform operation + 800095d8: 32c88fb3 aes64es x31,x17,x12 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b220, Zkne_aes64es_cg_cp_sbox_b220_str) + 800095dc: 00083203 ld x4,0(x16) + 800095e0: 01f20c63 beq x4,x31,800095f8 + 800095e4: 31d012ef jal x5,8000b100 + 800095e8: 800095d8 .word 0x800095d8 + 800095ec: 00000000 .word 0x00000000 + 800095f0: 80020876 .word 0x80020876 + 800095f4: 00000000 .word 0x00000000 + 800095f8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xdddddddddddddddd + 800095fc: 000cbf83 ld x31,0(x25) + 80009600: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xdddddddddddddddd + 80009604: 000cb303 ld x6,0(x25) + 80009608: 008c8c93 addi x25,x25,8 + +000000008000960c : +Zkne_aes64es_cg_cp_sbox_b221: + aes64es x2, x31, x6 # perform operation + 8000960c: 326f8133 aes64es x2,x31,x6 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b221, Zkne_aes64es_cg_cp_sbox_b221_str) + 80009610: 00083203 ld x4,0(x16) + 80009614: 00220c63 beq x4,x2,8000962c + 80009618: 2e9012ef jal x5,8000b100 + 8000961c: 8000960c .word 0x8000960c + 80009620: 00000000 .word 0x00000000 + 80009624: 800208af .word 0x800208af + 80009628: 00000000 .word 0x00000000 + 8000962c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xdededededededede + 80009630: 000cb583 ld x11,0(x25) + 80009634: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xdededededededede + 80009638: 000cb083 ld x1,0(x25) + 8000963c: 008c8c93 addi x25,x25,8 + +0000000080009640 : +Zkne_aes64es_cg_cp_sbox_b222: + aes64es x12, x11, x1 # perform operation + 80009640: 32158633 aes64es x12,x11,x1 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64es_cg_cp_sbox_b222, Zkne_aes64es_cg_cp_sbox_b222_str) + 80009644: 00083203 ld x4,0(x16) + 80009648: 00c20c63 beq x4,x12,80009660 + 8000964c: 2b5012ef jal x5,8000b100 + 80009650: 80009640 .word 0x80009640 + 80009654: 00000000 .word 0x00000000 + 80009658: 800208e8 .word 0x800208e8 + 8000965c: 00000000 .word 0x00000000 + 80009660: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xdfdfdfdfdfdfdfdf + 80009664: 000cba83 ld x21,0(x25) + 80009668: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0xdfdfdfdfdfdfdfdf + 8000966c: 000cbd03 ld x26,0(x25) + 80009670: 008c8c93 addi x25,x25,8 + +0000000080009674 : +Zkne_aes64es_cg_cp_sbox_b223: + aes64es x8, x21, x26 # perform operation + 80009674: 33aa8433 aes64es x8,x21,x26 + # Check if x8 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x8, Zkne_aes64es_cg_cp_sbox_b223, Zkne_aes64es_cg_cp_sbox_b223_str) + 80009678: 00083203 ld x4,0(x16) + 8000967c: 00820c63 beq x4,x8,80009694 + 80009680: 281012ef jal x5,8000b100 + 80009684: 80009674 .word 0x80009674 + 80009688: 00000000 .word 0x00000000 + 8000968c: 80020921 .word 0x80020921 + 80009690: 00000000 .word 0x00000000 + 80009694: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0xe0e0e0e0e0e0e0e0 + 80009698: 000cb503 ld x10,0(x25) + 8000969c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xe0e0e0e0e0e0e0e0 + 800096a0: 000cbc03 ld x24,0(x25) + 800096a4: 008c8c93 addi x25,x25,8 + +00000000800096a8 : +Zkne_aes64es_cg_cp_sbox_b224: + aes64es x9, x10, x24 # perform operation + 800096a8: 338504b3 aes64es x9,x10,x24 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b224, Zkne_aes64es_cg_cp_sbox_b224_str) + 800096ac: 00083203 ld x4,0(x16) + 800096b0: 00920c63 beq x4,x9,800096c8 + 800096b4: 24d012ef jal x5,8000b100 + 800096b8: 800096a8 .word 0x800096a8 + 800096bc: 00000000 .word 0x00000000 + 800096c0: 8002095a .word 0x8002095a + 800096c4: 00000000 .word 0x00000000 + 800096c8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0xe1e1e1e1e1e1e1e1 + 800096cc: 000cb483 ld x9,0(x25) + 800096d0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0xe1e1e1e1e1e1e1e1 + 800096d4: 000cbb03 ld x22,0(x25) + 800096d8: 008c8c93 addi x25,x25,8 + +00000000800096dc : +Zkne_aes64es_cg_cp_sbox_b225: + aes64es x19, x9, x22 # perform operation + 800096dc: 336489b3 aes64es x19,x9,x22 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b225, Zkne_aes64es_cg_cp_sbox_b225_str) + 800096e0: 00083203 ld x4,0(x16) + 800096e4: 01320c63 beq x4,x19,800096fc + 800096e8: 219012ef jal x5,8000b100 + 800096ec: 800096dc .word 0x800096dc + 800096f0: 00000000 .word 0x00000000 + 800096f4: 80020993 .word 0x80020993 + 800096f8: 00000000 .word 0x00000000 + 800096fc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xe2e2e2e2e2e2e2e2 + 80009700: 000cb903 ld x18,0(x25) + 80009704: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xe2e2e2e2e2e2e2e2 + 80009708: 000cbb83 ld x23,0(x25) + 8000970c: 008c8c93 addi x25,x25,8 + +0000000080009710 : +Zkne_aes64es_cg_cp_sbox_b226: + aes64es x17, x18, x23 # perform operation + 80009710: 337908b3 aes64es x17,x18,x23 + # Check if x17 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x17, Zkne_aes64es_cg_cp_sbox_b226, Zkne_aes64es_cg_cp_sbox_b226_str) + 80009714: 00083203 ld x4,0(x16) + 80009718: 01120c63 beq x4,x17,80009730 + 8000971c: 1e5012ef jal x5,8000b100 + 80009720: 80009710 .word 0x80009710 + 80009724: 00000000 .word 0x00000000 + 80009728: 800209cc .word 0x800209cc + 8000972c: 00000000 .word 0x00000000 + 80009730: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xe3e3e3e3e3e3e3e3 + 80009734: 000cb703 ld x14,0(x25) + 80009738: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xe3e3e3e3e3e3e3e3 + 8000973c: 000cbf83 ld x31,0(x25) + 80009740: 008c8c93 addi x25,x25,8 + +0000000080009744 : +Zkne_aes64es_cg_cp_sbox_b227: + aes64es x19, x14, x31 # perform operation + 80009744: 33f709b3 aes64es x19,x14,x31 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64es_cg_cp_sbox_b227, Zkne_aes64es_cg_cp_sbox_b227_str) + 80009748: 00083203 ld x4,0(x16) + 8000974c: 01320c63 beq x4,x19,80009764 + 80009750: 1b1012ef jal x5,8000b100 + 80009754: 80009744 .word 0x80009744 + 80009758: 00000000 .word 0x00000000 + 8000975c: 80020a05 .word 0x80020a05 + 80009760: 00000000 .word 0x00000000 + 80009764: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xe4e4e4e4e4e4e4e4 + 80009768: 000cbe03 ld x28,0(x25) + 8000976c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xe4e4e4e4e4e4e4e4 + 80009770: 000cb303 ld x6,0(x25) + 80009774: 008c8c93 addi x25,x25,8 + +0000000080009778 : +Zkne_aes64es_cg_cp_sbox_b228: + aes64es x1, x28, x6 # perform operation + 80009778: 326e00b3 aes64es x1,x28,x6 + # Check if x1 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x1, Zkne_aes64es_cg_cp_sbox_b228, Zkne_aes64es_cg_cp_sbox_b228_str) + 8000977c: 00083203 ld x4,0(x16) + 80009780: 00120c63 beq x4,x1,80009798 + 80009784: 17d012ef jal x5,8000b100 + 80009788: 80009778 .word 0x80009778 + 8000978c: 00000000 .word 0x00000000 + 80009790: 80020a3e .word 0x80020a3e + 80009794: 00000000 .word 0x00000000 + 80009798: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xe5e5e5e5e5e5e5e5 + 8000979c: 000cbb03 ld x22,0(x25) + 800097a0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0xe5e5e5e5e5e5e5e5 + 800097a4: 000cb403 ld x8,0(x25) + 800097a8: 008c8c93 addi x25,x25,8 + +00000000800097ac : +Zkne_aes64es_cg_cp_sbox_b229: + aes64es x31, x22, x8 # perform operation + 800097ac: 328b0fb3 aes64es x31,x22,x8 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b229, Zkne_aes64es_cg_cp_sbox_b229_str) + 800097b0: 00083203 ld x4,0(x16) + 800097b4: 01f20c63 beq x4,x31,800097cc + 800097b8: 149012ef jal x5,8000b100 + 800097bc: 800097ac .word 0x800097ac + 800097c0: 00000000 .word 0x00000000 + 800097c4: 80020a77 .word 0x80020a77 + 800097c8: 00000000 .word 0x00000000 + 800097cc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xe6e6e6e6e6e6e6e6 + 800097d0: 000cb903 ld x18,0(x25) + 800097d4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xe6e6e6e6e6e6e6e6 + 800097d8: 000cb383 ld x7,0(x25) + 800097dc: 008c8c93 addi x25,x25,8 + +00000000800097e0 : +Zkne_aes64es_cg_cp_sbox_b230: + aes64es x21, x18, x7 # perform operation + 800097e0: 32790ab3 aes64es x21,x18,x7 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64es_cg_cp_sbox_b230, Zkne_aes64es_cg_cp_sbox_b230_str) + 800097e4: 00083203 ld x4,0(x16) + 800097e8: 01520c63 beq x4,x21,80009800 + 800097ec: 115012ef jal x5,8000b100 + 800097f0: 800097e0 .word 0x800097e0 + 800097f4: 00000000 .word 0x00000000 + 800097f8: 80020ab0 .word 0x80020ab0 + 800097fc: 00000000 .word 0x00000000 + 80009800: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xe7e7e7e7e7e7e7e7 + 80009804: 000cb703 ld x14,0(x25) + 80009808: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs2: x19 = 0xe7e7e7e7e7e7e7e7 + 8000980c: 000cb983 ld x19,0(x25) + 80009810: 008c8c93 addi x25,x25,8 + +0000000080009814 : +Zkne_aes64es_cg_cp_sbox_b231: + aes64es x2, x14, x19 # perform operation + 80009814: 33370133 aes64es x2,x14,x19 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b231, Zkne_aes64es_cg_cp_sbox_b231_str) + 80009818: 00083203 ld x4,0(x16) + 8000981c: 00220c63 beq x4,x2,80009834 + 80009820: 0e1012ef jal x5,8000b100 + 80009824: 80009814 .word 0x80009814 + 80009828: 00000000 .word 0x00000000 + 8000982c: 80020ae9 .word 0x80020ae9 + 80009830: 00000000 .word 0x00000000 + 80009834: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xe8e8e8e8e8e8e8e8 + 80009838: 000cba83 ld x21,0(x25) + 8000983c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xe8e8e8e8e8e8e8e8 + 80009840: 000cb103 ld x2,0(x25) + 80009844: 008c8c93 addi x25,x25,8 + +0000000080009848 : +Zkne_aes64es_cg_cp_sbox_b232: + aes64es x26, x21, x2 # perform operation + 80009848: 322a8d33 aes64es x26,x21,x2 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64es_cg_cp_sbox_b232, Zkne_aes64es_cg_cp_sbox_b232_str) + 8000984c: 00083203 ld x4,0(x16) + 80009850: 01a20c63 beq x4,x26,80009868 + 80009854: 0ad012ef jal x5,8000b100 + 80009858: 80009848 .word 0x80009848 + 8000985c: 00000000 .word 0x00000000 + 80009860: 80020b22 .word 0x80020b22 + 80009864: 00000000 .word 0x00000000 + 80009868: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xe9e9e9e9e9e9e9e9 + 8000986c: 000cb903 ld x18,0(x25) + 80009870: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0xe9e9e9e9e9e9e9e9 + 80009874: 000cb303 ld x6,0(x25) + 80009878: 008c8c93 addi x25,x25,8 + +000000008000987c : +Zkne_aes64es_cg_cp_sbox_b233: + aes64es x14, x18, x6 # perform operation + 8000987c: 32690733 aes64es x14,x18,x6 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b233, Zkne_aes64es_cg_cp_sbox_b233_str) + 80009880: 00083203 ld x4,0(x16) + 80009884: 00e20c63 beq x4,x14,8000989c + 80009888: 079012ef jal x5,8000b100 + 8000988c: 8000987c .word 0x8000987c + 80009890: 00000000 .word 0x00000000 + 80009894: 80020b5b .word 0x80020b5b + 80009898: 00000000 .word 0x00000000 + 8000989c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xeaeaeaeaeaeaeaea + 800098a0: 000cba03 ld x20,0(x25) + 800098a4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xeaeaeaeaeaeaeaea + 800098a8: 000cbf03 ld x30,0(x25) + 800098ac: 008c8c93 addi x25,x25,8 + +00000000800098b0 : +Zkne_aes64es_cg_cp_sbox_b234: + aes64es x13, x20, x30 # perform operation + 800098b0: 33ea06b3 aes64es x13,x20,x30 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b234, Zkne_aes64es_cg_cp_sbox_b234_str) + 800098b4: 00083203 ld x4,0(x16) + 800098b8: 00d20c63 beq x4,x13,800098d0 + 800098bc: 045012ef jal x5,8000b100 + 800098c0: 800098b0 .word 0x800098b0 + 800098c4: 00000000 .word 0x00000000 + 800098c8: 80020b94 .word 0x80020b94 + 800098cc: 00000000 .word 0x00000000 + 800098d0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xebebebebebebebeb + 800098d4: 000cbd03 ld x26,0(x25) + 800098d8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0xebebebebebebebeb + 800098dc: 000cb483 ld x9,0(x25) + 800098e0: 008c8c93 addi x25,x25,8 + +00000000800098e4 : +Zkne_aes64es_cg_cp_sbox_b235: + aes64es x11, x26, x9 # perform operation + 800098e4: 329d05b3 aes64es x11,x26,x9 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b235, Zkne_aes64es_cg_cp_sbox_b235_str) + 800098e8: 00083203 ld x4,0(x16) + 800098ec: 00b20c63 beq x4,x11,80009904 + 800098f0: 011012ef jal x5,8000b100 + 800098f4: 800098e4 .word 0x800098e4 + 800098f8: 00000000 .word 0x00000000 + 800098fc: 80020bcd .word 0x80020bcd + 80009900: 00000000 .word 0x00000000 + 80009904: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0xecececececececec + 80009908: 000cb503 ld x10,0(x25) + 8000990c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xecececececececec + 80009910: 000cbf03 ld x30,0(x25) + 80009914: 008c8c93 addi x25,x25,8 + +0000000080009918 : +Zkne_aes64es_cg_cp_sbox_b236: + aes64es x6, x10, x30 # perform operation + 80009918: 33e50333 aes64es x6,x10,x30 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b236, Zkne_aes64es_cg_cp_sbox_b236_str) + 8000991c: 00083203 ld x4,0(x16) + 80009920: 00620c63 beq x4,x6,80009938 + 80009924: 7dc012ef jal x5,8000b100 + 80009928: 80009918 .word 0x80009918 + 8000992c: 00000000 .word 0x00000000 + 80009930: 80020c06 .word 0x80020c06 + 80009934: 00000000 .word 0x00000000 + 80009938: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x25, x3) # load rs1: x3 = 0xedededededededed + 8000993c: 000cb183 ld x3,0(x25) + 80009940: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs2: x7 = 0xedededededededed + 80009944: 000cb383 ld x7,0(x25) + 80009948: 008c8c93 addi x25,x25,8 + +000000008000994c : +Zkne_aes64es_cg_cp_sbox_b237: + aes64es x22, x3, x7 # perform operation + 8000994c: 32718b33 aes64es x22,x3,x7 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64es_cg_cp_sbox_b237, Zkne_aes64es_cg_cp_sbox_b237_str) + 80009950: 00083203 ld x4,0(x16) + 80009954: 01620c63 beq x4,x22,8000996c + 80009958: 7a8012ef jal x5,8000b100 + 8000995c: 8000994c .word 0x8000994c + 80009960: 00000000 .word 0x00000000 + 80009964: 80020c3f .word 0x80020c3f + 80009968: 00000000 .word 0x00000000 + 8000996c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0xeeeeeeeeeeeeeeee + 80009970: 000cbf03 ld x30,0(x25) + 80009974: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xeeeeeeeeeeeeeeee + 80009978: 000cb883 ld x17,0(x25) + 8000997c: 008c8c93 addi x25,x25,8 + +0000000080009980 : +Zkne_aes64es_cg_cp_sbox_b238: + aes64es x11, x30, x17 # perform operation + 80009980: 331f05b3 aes64es x11,x30,x17 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b238, Zkne_aes64es_cg_cp_sbox_b238_str) + 80009984: 00083203 ld x4,0(x16) + 80009988: 00b20c63 beq x4,x11,800099a0 + 8000998c: 774012ef jal x5,8000b100 + 80009990: 80009980 .word 0x80009980 + 80009994: 00000000 .word 0x00000000 + 80009998: 80020c78 .word 0x80020c78 + 8000999c: 00000000 .word 0x00000000 + 800099a0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs1: x6 = 0xefefefefefefefef + 800099a4: 000cb303 ld x6,0(x25) + 800099a8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0xefefefefefefefef + 800099ac: 000cb903 ld x18,0(x25) + 800099b0: 008c8c93 addi x25,x25,8 + +00000000800099b4 : +Zkne_aes64es_cg_cp_sbox_b239: + aes64es x2, x6, x18 # perform operation + 800099b4: 33230133 aes64es x2,x6,x18 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64es_cg_cp_sbox_b239, Zkne_aes64es_cg_cp_sbox_b239_str) + 800099b8: 00083203 ld x4,0(x16) + 800099bc: 00220c63 beq x4,x2,800099d4 + 800099c0: 740012ef jal x5,8000b100 + 800099c4: 800099b4 .word 0x800099b4 + 800099c8: 00000000 .word 0x00000000 + 800099cc: 80020cb1 .word 0x80020cb1 + 800099d0: 00000000 .word 0x00000000 + 800099d4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xf0f0f0f0f0f0f0f0 + 800099d8: 000cb403 ld x8,0(x25) + 800099dc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xf0f0f0f0f0f0f0f0 + 800099e0: 000cbe83 ld x29,0(x25) + 800099e4: 008c8c93 addi x25,x25,8 + +00000000800099e8 : +Zkne_aes64es_cg_cp_sbox_b240: + aes64es x9, x8, x29 # perform operation + 800099e8: 33d404b3 aes64es x9,x8,x29 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b240, Zkne_aes64es_cg_cp_sbox_b240_str) + 800099ec: 00083203 ld x4,0(x16) + 800099f0: 00920c63 beq x4,x9,80009a08 + 800099f4: 70c012ef jal x5,8000b100 + 800099f8: 800099e8 .word 0x800099e8 + 800099fc: 00000000 .word 0x00000000 + 80009a00: 80020cea .word 0x80020cea + 80009a04: 00000000 .word 0x00000000 + 80009a08: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xf1f1f1f1f1f1f1f1 + 80009a0c: 000cb983 ld x19,0(x25) + 80009a10: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xf1f1f1f1f1f1f1f1 + 80009a14: 000cbf03 ld x30,0(x25) + 80009a18: 008c8c93 addi x25,x25,8 + +0000000080009a1c : +Zkne_aes64es_cg_cp_sbox_b241: + aes64es x11, x19, x30 # perform operation + 80009a1c: 33e985b3 aes64es x11,x19,x30 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zkne_aes64es_cg_cp_sbox_b241, Zkne_aes64es_cg_cp_sbox_b241_str) + 80009a20: 00083203 ld x4,0(x16) + 80009a24: 00b20c63 beq x4,x11,80009a3c + 80009a28: 6d8012ef jal x5,8000b100 + 80009a2c: 80009a1c .word 0x80009a1c + 80009a30: 00000000 .word 0x00000000 + 80009a34: 80020d23 .word 0x80020d23 + 80009a38: 00000000 .word 0x00000000 + 80009a3c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xf2f2f2f2f2f2f2f2 + 80009a40: 000cba03 ld x20,0(x25) + 80009a44: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xf2f2f2f2f2f2f2f2 + 80009a48: 000cbb83 ld x23,0(x25) + 80009a4c: 008c8c93 addi x25,x25,8 + +0000000080009a50 : +Zkne_aes64es_cg_cp_sbox_b242: + aes64es x14, x20, x23 # perform operation + 80009a50: 337a0733 aes64es x14,x20,x23 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zkne_aes64es_cg_cp_sbox_b242, Zkne_aes64es_cg_cp_sbox_b242_str) + 80009a54: 00083203 ld x4,0(x16) + 80009a58: 00e20c63 beq x4,x14,80009a70 + 80009a5c: 6a4012ef jal x5,8000b100 + 80009a60: 80009a50 .word 0x80009a50 + 80009a64: 00000000 .word 0x00000000 + 80009a68: 80020d5c .word 0x80020d5c + 80009a6c: 00000000 .word 0x00000000 + 80009a70: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xf3f3f3f3f3f3f3f3 + 80009a74: 000cbe03 ld x28,0(x25) + 80009a78: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0xf3f3f3f3f3f3f3f3 + 80009a7c: 000cb583 ld x11,0(x25) + 80009a80: 008c8c93 addi x25,x25,8 + +0000000080009a84 : +Zkne_aes64es_cg_cp_sbox_b243: + aes64es x31, x28, x11 # perform operation + 80009a84: 32be0fb3 aes64es x31,x28,x11 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64es_cg_cp_sbox_b243, Zkne_aes64es_cg_cp_sbox_b243_str) + 80009a88: 00083203 ld x4,0(x16) + 80009a8c: 01f20c63 beq x4,x31,80009aa4 + 80009a90: 670012ef jal x5,8000b100 + 80009a94: 80009a84 .word 0x80009a84 + 80009a98: 00000000 .word 0x00000000 + 80009a9c: 80020d95 .word 0x80020d95 + 80009aa0: 00000000 .word 0x00000000 + 80009aa4: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xf4f4f4f4f4f4f4f4 + 80009aa8: 000cb983 ld x19,0(x25) + 80009aac: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xf4f4f4f4f4f4f4f4 + 80009ab0: 000cbf03 ld x30,0(x25) + 80009ab4: 008c8c93 addi x25,x25,8 + +0000000080009ab8 : +Zkne_aes64es_cg_cp_sbox_b244: + aes64es x6, x19, x30 # perform operation + 80009ab8: 33e98333 aes64es x6,x19,x30 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b244, Zkne_aes64es_cg_cp_sbox_b244_str) + 80009abc: 00083203 ld x4,0(x16) + 80009ac0: 00620c63 beq x4,x6,80009ad8 + 80009ac4: 63c012ef jal x5,8000b100 + 80009ac8: 80009ab8 .word 0x80009ab8 + 80009acc: 00000000 .word 0x00000000 + 80009ad0: 80020dce .word 0x80020dce + 80009ad4: 00000000 .word 0x00000000 + 80009ad8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0xf5f5f5f5f5f5f5f5 + 80009adc: 000cbd83 ld x27,0(x25) + 80009ae0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xf5f5f5f5f5f5f5f5 + 80009ae4: 000cbf83 ld x31,0(x25) + 80009ae8: 008c8c93 addi x25,x25,8 + +0000000080009aec : +Zkne_aes64es_cg_cp_sbox_b245: + aes64es x9, x27, x31 # perform operation + 80009aec: 33fd84b3 aes64es x9,x27,x31 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b245, Zkne_aes64es_cg_cp_sbox_b245_str) + 80009af0: 00083203 ld x4,0(x16) + 80009af4: 00920c63 beq x4,x9,80009b0c + 80009af8: 608012ef jal x5,8000b100 + 80009afc: 80009aec .word 0x80009aec + 80009b00: 00000000 .word 0x00000000 + 80009b04: 80020e07 .word 0x80020e07 + 80009b08: 00000000 .word 0x00000000 + 80009b0c: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs1: x2 = 0xf6f6f6f6f6f6f6f6 + 80009b10: 000cb103 ld x2,0(x25) + 80009b14: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0xf6f6f6f6f6f6f6f6 + 80009b18: 000cbd03 ld x26,0(x25) + 80009b1c: 008c8c93 addi x25,x25,8 + +0000000080009b20 : +Zkne_aes64es_cg_cp_sbox_b246: + aes64es x13, x2, x26 # perform operation + 80009b20: 33a106b3 aes64es x13,x2,x26 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zkne_aes64es_cg_cp_sbox_b246, Zkne_aes64es_cg_cp_sbox_b246_str) + 80009b24: 00083203 ld x4,0(x16) + 80009b28: 00d20c63 beq x4,x13,80009b40 + 80009b2c: 5d4012ef jal x5,8000b100 + 80009b30: 80009b20 .word 0x80009b20 + 80009b34: 00000000 .word 0x00000000 + 80009b38: 80020e40 .word 0x80020e40 + 80009b3c: 00000000 .word 0x00000000 + 80009b40: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xf7f7f7f7f7f7f7f7 + 80009b44: 000cbf83 ld x31,0(x25) + 80009b48: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0xf7f7f7f7f7f7f7f7 + 80009b4c: 000cba03 ld x20,0(x25) + 80009b50: 008c8c93 addi x25,x25,8 + +0000000080009b54 : +Zkne_aes64es_cg_cp_sbox_b247: + aes64es x6, x31, x20 # perform operation + 80009b54: 334f8333 aes64es x6,x31,x20 + # Check if x6 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x6, Zkne_aes64es_cg_cp_sbox_b247, Zkne_aes64es_cg_cp_sbox_b247_str) + 80009b58: 00083203 ld x4,0(x16) + 80009b5c: 00620c63 beq x4,x6,80009b74 + 80009b60: 5a0012ef jal x5,8000b100 + 80009b64: 80009b54 .word 0x80009b54 + 80009b68: 00000000 .word 0x00000000 + 80009b6c: 80020e79 .word 0x80020e79 + 80009b70: 00000000 .word 0x00000000 + 80009b74: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xf8f8f8f8f8f8f8f8 + 80009b78: 000cbe83 ld x29,0(x25) + 80009b7c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs2: x1 = 0xf8f8f8f8f8f8f8f8 + 80009b80: 000cb083 ld x1,0(x25) + 80009b84: 008c8c93 addi x25,x25,8 + +0000000080009b88 : +Zkne_aes64es_cg_cp_sbox_b248: + aes64es x18, x29, x1 # perform operation + 80009b88: 321e8933 aes64es x18,x29,x1 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64es_cg_cp_sbox_b248, Zkne_aes64es_cg_cp_sbox_b248_str) + 80009b8c: 00083203 ld x4,0(x16) + 80009b90: 01220c63 beq x4,x18,80009ba8 + 80009b94: 56c012ef jal x5,8000b100 + 80009b98: 80009b88 .word 0x80009b88 + 80009b9c: 00000000 .word 0x00000000 + 80009ba0: 80020eb2 .word 0x80020eb2 + 80009ba4: 00000000 .word 0x00000000 + 80009ba8: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs1: x8 = 0xf9f9f9f9f9f9f9f9 + 80009bac: 000cb403 ld x8,0(x25) + 80009bb0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xf9f9f9f9f9f9f9f9 + 80009bb4: 000cbe83 ld x29,0(x25) + 80009bb8: 008c8c93 addi x25,x25,8 + +0000000080009bbc : +Zkne_aes64es_cg_cp_sbox_b249: + aes64es x23, x8, x29 # perform operation + 80009bbc: 33d40bb3 aes64es x23,x8,x29 + # Check if x23 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x23, Zkne_aes64es_cg_cp_sbox_b249, Zkne_aes64es_cg_cp_sbox_b249_str) + 80009bc0: 00083203 ld x4,0(x16) + 80009bc4: 01720c63 beq x4,x23,80009bdc + 80009bc8: 538012ef jal x5,8000b100 + 80009bcc: 80009bbc .word 0x80009bbc + 80009bd0: 00000000 .word 0x00000000 + 80009bd4: 80020eeb .word 0x80020eeb + 80009bd8: 00000000 .word 0x00000000 + 80009bdc: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0xfafafafafafafafa + 80009be0: 000cbd03 ld x26,0(x25) + 80009be4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xfafafafafafafafa + 80009be8: 000cb883 ld x17,0(x25) + 80009bec: 008c8c93 addi x25,x25,8 + +0000000080009bf0 : +Zkne_aes64es_cg_cp_sbox_b250: + aes64es x3, x26, x17 # perform operation + 80009bf0: 331d01b3 aes64es x3,x26,x17 + # Check if x3 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x3, Zkne_aes64es_cg_cp_sbox_b250, Zkne_aes64es_cg_cp_sbox_b250_str) + 80009bf4: 00083203 ld x4,0(x16) + 80009bf8: 00320c63 beq x4,x3,80009c10 + 80009bfc: 504012ef jal x5,8000b100 + 80009c00: 80009bf0 .word 0x80009bf0 + 80009c04: 00000000 .word 0x00000000 + 80009c08: 80020f24 .word 0x80020f24 + 80009c0c: 00000000 .word 0x00000000 + 80009c10: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs1: x29 = 0xfbfbfbfbfbfbfbfb + 80009c14: 000cbe83 ld x29,0(x25) + 80009c18: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xfbfbfbfbfbfbfbfb + 80009c1c: 000cbb83 ld x23,0(x25) + 80009c20: 008c8c93 addi x25,x25,8 + +0000000080009c24 : +Zkne_aes64es_cg_cp_sbox_b251: + aes64es x7, x29, x23 # perform operation + 80009c24: 337e83b3 aes64es x7,x29,x23 + # Check if x7 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x7, Zkne_aes64es_cg_cp_sbox_b251, Zkne_aes64es_cg_cp_sbox_b251_str) + 80009c28: 00083203 ld x4,0(x16) + 80009c2c: 00720c63 beq x4,x7,80009c44 + 80009c30: 4d0012ef jal x5,8000b100 + 80009c34: 80009c24 .word 0x80009c24 + 80009c38: 00000000 .word 0x00000000 + 80009c3c: 80020f5d .word 0x80020f5d + 80009c40: 00000000 .word 0x00000000 + 80009c44: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xfcfcfcfcfcfcfcfc + 80009c48: 000cb383 ld x7,0(x25) + 80009c4c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs2: x22 = 0xfcfcfcfcfcfcfcfc + 80009c50: 000cbb03 ld x22,0(x25) + 80009c54: 008c8c93 addi x25,x25,8 + +0000000080009c58 : +Zkne_aes64es_cg_cp_sbox_b252: + aes64es x27, x7, x22 # perform operation + 80009c58: 33638db3 aes64es x27,x7,x22 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64es_cg_cp_sbox_b252, Zkne_aes64es_cg_cp_sbox_b252_str) + 80009c5c: 00083203 ld x4,0(x16) + 80009c60: 01b20c63 beq x4,x27,80009c78 + 80009c64: 49c012ef jal x5,8000b100 + 80009c68: 80009c58 .word 0x80009c58 + 80009c6c: 00000000 .word 0x00000000 + 80009c70: 80020f96 .word 0x80020f96 + 80009c74: 00000000 .word 0x00000000 + 80009c78: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0xfdfdfdfdfdfdfdfd + 80009c7c: 000cb903 ld x18,0(x25) + 80009c80: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs2: x13 = 0xfdfdfdfdfdfdfdfd + 80009c84: 000cb683 ld x13,0(x25) + 80009c88: 008c8c93 addi x25,x25,8 + +0000000080009c8c : +Zkne_aes64es_cg_cp_sbox_b253: + aes64es x28, x18, x13 # perform operation + 80009c8c: 32d90e33 aes64es x28,x18,x13 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64es_cg_cp_sbox_b253, Zkne_aes64es_cg_cp_sbox_b253_str) + 80009c90: 00083203 ld x4,0(x16) + 80009c94: 01c20c63 beq x4,x28,80009cac + 80009c98: 468012ef jal x5,8000b100 + 80009c9c: 80009c8c .word 0x80009c8c + 80009ca0: 00000000 .word 0x00000000 + 80009ca4: 80020fcf .word 0x80020fcf + 80009ca8: 00000000 .word 0x00000000 + 80009cac: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0xfefefefefefefefe + 80009cb0: 000cbf83 ld x31,0(x25) + 80009cb4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0xfefefefefefefefe + 80009cb8: 000cb503 ld x10,0(x25) + 80009cbc: 008c8c93 addi x25,x25,8 + +0000000080009cc0 : +Zkne_aes64es_cg_cp_sbox_b254: + aes64es x30, x31, x10 # perform operation + 80009cc0: 32af8f33 aes64es x30,x31,x10 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64es_cg_cp_sbox_b254, Zkne_aes64es_cg_cp_sbox_b254_str) + 80009cc4: 00083203 ld x4,0(x16) + 80009cc8: 01e20c63 beq x4,x30,80009ce0 + 80009ccc: 434012ef jal x5,8000b100 + 80009cd0: 80009cc0 .word 0x80009cc0 + 80009cd4: 00000000 .word 0x00000000 + 80009cd8: 80021008 .word 0x80021008 + 80009cdc: 00000000 .word 0x00000000 + 80009ce0: 00880813 addi x16,x16,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0xffffffffffffffff + 80009ce4: 000cb883 ld x17,0(x25) + 80009ce8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs2: x24 = 0xffffffffffffffff + 80009cec: 000cbc03 ld x24,0(x25) + 80009cf0: 008c8c93 addi x25,x25,8 + +0000000080009cf4 : +Zkne_aes64es_cg_cp_sbox_b255: + aes64es x9, x17, x24 # perform operation + 80009cf4: 338884b3 aes64es x9,x17,x24 + # Check if x9 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x9, Zkne_aes64es_cg_cp_sbox_b255, Zkne_aes64es_cg_cp_sbox_b255_str) + 80009cf8: 00083203 ld x4,0(x16) + 80009cfc: 00920c63 beq x4,x9,80009d14 + 80009d00: 400012ef jal x5,8000b100 + 80009d04: 80009cf4 .word 0x80009cf4 + 80009d08: 00000000 .word 0x00000000 + 80009d0c: 80021041 .word 0x80021041 + 80009d10: 00000000 .word 0x00000000 + 80009d14: 00880813 addi x16,x16,8 + + mv x2, x16 # restore signature pointer to default register for teardown + 80009d18: 00080113 addi x2,x16,0 + +0000000080009d1c : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009d1c: 00000513 addi x10,x0,0 + 80009d20: 00000073 ecall + 80009d24: fff00513 addi x10,x0,-1 + 80009d28: 25800413 addi x8,x0,600 + +0000000080009d2c : + 80009d2c: 34002373 csrrs x6,mscratch,x0 + +0000000080009d30 : + 80009d30: 2b833383 ld x7,696(x6) + +0000000080009d34 : + 80009d34: 2a033383 ld x7,672(x6) + +0000000080009d38 : + 80009d38: 2d033483 ld x9,720(x6) + 80009d3c: 34049073 csrrw x0,mscratch,x9 + +0000000080009d40 : + 80009d40: 2c833483 ld x9,712(x6) + 80009d44: 305493f3 csrrw x7,mtvec,x9 + 80009d48: ffc4f493 andi x9,x9,-4 + 80009d4c: ffc3f393 andi x7,x7,-4 + 80009d50: 00749e63 bne x9,x7,80009d6c + +0000000080009d54 : + 80009d54: 00030493 addi x9,x6,0 + +0000000080009d58 : + 80009d58: 0004a783 lw x15,0(x9) + 80009d5c: 00f3a023 sw x15,0(x7) + 80009d60: 00438393 addi x7,x7,4 + 80009d64: 00448493 addi x9,x9,4 + 80009d68: fe83c8e3 blt x7,x8,80009d58 + 80009d6c: 0000100f fence.i + +0000000080009d70 : + 80009d70: 00000013 addi x0,x0,0 + 80009d74: 00000013 addi x0,x0,0 + 80009d78: 00000013 addi x0,x0,0 + 80009d7c: 00000013 addi x0,x0,0 + 80009d80: 00000497 auipc x9,0x0 + 80009d84: 2b048493 addi x9,x9,688 # 8000a030 + 80009d88: 00000013 addi x0,x0,0 + 80009d8c: 00000013 addi x0,x0,0 + 80009d90: 00000013 addi x0,x0,0 + 80009d94: 00000013 addi x0,x0,0 + 80009d98: 00000013 addi x0,x0,0 + 80009d9c: 00000013 addi x0,x0,0 + 80009da0: 10e49863 bne x9,x14,80009eb0 + 80009da4: 00000013 addi x0,x0,0 + 80009da8: 00000013 addi x0,x0,0 + 80009dac: 00000013 addi x0,x0,0 + 80009db0: 00000013 addi x0,x0,0 + 80009db4: 00000013 addi x0,x0,0 + 80009db8: 00000013 addi x0,x0,0 + 80009dbc: 00000013 addi x0,x0,0 + 80009dc0: 00018517 auipc x10,0x18 + 80009dc4: 9e150513 addi x10,x10,-1567 # 800217a1 + 80009dc8: 00000013 addi x0,x0,0 + 80009dcc: 00000013 addi x0,x0,0 + 80009dd0: 00000013 addi x0,x0,0 + 80009dd4: 00000013 addi x0,x0,0 + 80009dd8: 00000013 addi x0,x0,0 + 80009ddc: 00000013 addi x0,x0,0 + 80009de0: 00038097 auipc x1,0x38 + 80009de4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 80009de8: 00000013 addi x0,x0,0 + 80009dec: 00000013 addi x0,x0,0 + 80009df0: 00000013 addi x0,x0,0 + 80009df4: 00000013 addi x0,x0,0 + 80009df8: 00000013 addi x0,x0,0 + 80009dfc: 00000013 addi x0,x0,0 + 80009e00: 00018517 auipc x10,0x18 + 80009e04: 9dd50513 addi x10,x10,-1571 # 800217dd + 80009e08: 00000013 addi x0,x0,0 + 80009e0c: 00000013 addi x0,x0,0 + 80009e10: 00000013 addi x0,x0,0 + 80009e14: 00000013 addi x0,x0,0 + 80009e18: 00000013 addi x0,x0,0 + 80009e1c: 00000013 addi x0,x0,0 + 80009e20: 00038097 auipc x1,0x38 + 80009e24: 784080e7 jalr x1,1924(x1) # 800425a4 + 80009e28: 00000013 addi x0,x0,0 + 80009e2c: 00000013 addi x0,x0,0 + 80009e30: 00000013 addi x0,x0,0 + 80009e34: 00000013 addi x0,x0,0 + 80009e38: 00000013 addi x0,x0,0 + 80009e3c: 00000013 addi x0,x0,0 + 80009e40: 00018517 auipc x10,0x18 + 80009e44: 9fd50513 addi x10,x10,-1539 # 8002183d + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00038097 auipc x1,0x38 + 80009e64: 744080e7 jalr x1,1860(x1) # 800425a4 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 00018517 auipc x10,0x18 + 80009e84: 56850513 addi x10,x10,1384 # 800223e8 + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00038097 auipc x1,0x38 + 80009ea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 80009ea8: 00038097 auipc x1,0x38 + 80009eac: 75c080e7 jalr x1,1884(x1) # 80042604 + +0000000080009eb0 : + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00006317 auipc x6,0x6 + 80009ec4: 4e830313 addi x6,x6,1256 # 800103a8 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00033303 ld x6,0(x6) + 80009ee4: 00000013 addi x0,x0,0 + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 0001a397 auipc x7,0x1a + 80009f04: 7e038393 addi x7,x7,2016 # 800246e0 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 40730333 sub x6,x6,x7 + 80009f24: 00000013 addi x0,x0,0 + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 0001a417 auipc x8,0x1a + 80009f44: 79040413 addi x8,x8,1936 # 800246d0 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00043203 ld x4,0(x8) + 80009f64: 00620c63 beq x4,x6,80009f7c + 80009f68: 200013ef jal x7,8000b168 + 80009f6c: 80009eb0 .word 0x80009eb0 + 80009f70: 00000000 .word 0x00000000 + 80009f74: 80021991 .word 0x80021991 + 80009f78: 00000000 .word 0x00000000 + +0000000080009f7c : + 80009f7c: 000004b7 lui x9,0x0 + 80009f80: 00048493 addi x9,x9,0 # 0 + 80009f84: 00b49493 slli x9,x9,0xb + 80009f88: 5d648493 addi x9,x9,1494 + 80009f8c: 00b49493 slli x9,x9,0xb + 80009f90: 43748493 addi x9,x9,1079 + 80009f94: 00a49493 slli x9,x9,0xa + 80009f98: 2ad48493 addi x9,x9,685 + 80009f9c: 00e49e63 bne x9,x14,80009fb8 + 80009fa0: 1c8013ef jal x7,8000b168 + 80009fa4: 8000a064 .word 0x8000a064 + 80009fa8: 00000000 .word 0x00000000 + 80009fac: 800217ff .word 0x800217ff + 80009fb0: 00000000 .word 0x00000000 + 80009fb4: 00000341 .word 0x00000341 + +0000000080009fb8 : + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00017517 auipc x10,0x17 + 80009fc4: 7a450513 addi x10,x10,1956 # 80021764 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 00038097 auipc x1,0x38 + 80009fe4: 5c4080e7 jalr x1,1476(x1) # 800425a4 + 80009fe8: 00038097 auipc x1,0x38 + 80009fec: 5fc080e7 jalr x1,1532(x1) # 800425e4 + +0000000080009ff0 : + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 00017517 auipc x10,0x17 + 8000a004: 7a150513 addi x10,x10,1953 # 800217a1 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 00038097 auipc x1,0x38 + 8000a024: 584080e7 jalr x1,1412(x1) # 800425a4 + 8000a028: 00038097 auipc x1,0x38 + 8000a02c: 5dc080e7 jalr x1,1500(x1) # 80042604 + +000000008000a030 : + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00000717 auipc x14,0x0 + 8000a044: ff070713 addi x14,x14,-16 # 8000a030 + 8000a048: 00000013 addi x0,x0,0 + 8000a04c: 00000013 addi x0,x0,0 + 8000a050: 00000013 addi x0,x0,0 + 8000a054: 00000013 addi x0,x0,0 + 8000a058: 00000013 addi x0,x0,0 + 8000a05c: 00000013 addi x0,x0,0 + 8000a060: cbdff06f jal x0,80009d1c + +000000008000a064 : + 8000a064: 00000737 lui x14,0x0 + 8000a068: 00070713 addi x14,x14,0 # 0 + 8000a06c: 00b71713 slli x14,x14,0xb + 8000a070: 5d670713 addi x14,x14,1494 + 8000a074: 00b71713 slli x14,x14,0xb + 8000a078: 43770713 addi x14,x14,1079 + 8000a07c: 00a71713 slli x14,x14,0xa + 8000a080: 2ad70713 addi x14,x14,685 + 8000a084: c99ff06f jal x0,80009d1c + 8000a088: 00000013 addi x0,x0,0 + 8000a08c: 00000013 addi x0,x0,0 + 8000a090: 00000013 addi x0,x0,0 + 8000a094: 00000013 addi x0,x0,0 + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00000013 addi x0,x0,0 + 8000a0a4: 00000013 addi x0,x0,0 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + +000000008000a0c0 : + 8000a0c0: 1000006f jal x0,8000a1c0 + 8000a0c4: 1080006f jal x0,8000a1cc + 8000a0c8: 1100006f jal x0,8000a1d8 + 8000a0cc: 1180006f jal x0,8000a1e4 + 8000a0d0: 1200006f jal x0,8000a1f0 + 8000a0d4: 1280006f jal x0,8000a1fc + 8000a0d8: 1300006f jal x0,8000a208 + 8000a0dc: 1380006f jal x0,8000a214 + 8000a0e0: 1400006f jal x0,8000a220 + 8000a0e4: 1480006f jal x0,8000a22c + 8000a0e8: 1500006f jal x0,8000a238 + 8000a0ec: 1580006f jal x0,8000a244 + 8000a0f0: 1600006f jal x0,8000a250 + 8000a0f4: 1680006f jal x0,8000a25c + 8000a0f8: 1700006f jal x0,8000a268 + 8000a0fc: 1780006f jal x0,8000a274 + 8000a100: 1800006f jal x0,8000a280 + 8000a104: 1880006f jal x0,8000a28c + 8000a108: 1900006f jal x0,8000a298 + 8000a10c: 1980006f jal x0,8000a2a4 + 8000a110: 1a00006f jal x0,8000a2b0 + 8000a114: 1a80006f jal x0,8000a2bc + 8000a118: 1b00006f jal x0,8000a2c8 + 8000a11c: 1b80006f jal x0,8000a2d4 + 8000a120: 1c00006f jal x0,8000a2e0 + 8000a124: 1bc0006f jal x0,8000a2e0 + 8000a128: 1b80006f jal x0,8000a2e0 + 8000a12c: 1b40006f jal x0,8000a2e0 + 8000a130: 1b00006f jal x0,8000a2e0 + 8000a134: 1ac0006f jal x0,8000a2e0 + 8000a138: 1a80006f jal x0,8000a2e0 + 8000a13c: 1a40006f jal x0,8000a2e0 + 8000a140: 1a00006f jal x0,8000a2e0 + 8000a144: 19c0006f jal x0,8000a2e0 + 8000a148: 1980006f jal x0,8000a2e0 + 8000a14c: 1940006f jal x0,8000a2e0 + 8000a150: 1900006f jal x0,8000a2e0 + 8000a154: 18c0006f jal x0,8000a2e0 + 8000a158: 1880006f jal x0,8000a2e0 + 8000a15c: 1840006f jal x0,8000a2e0 + 8000a160: 1800006f jal x0,8000a2e0 + 8000a164: 17c0006f jal x0,8000a2e0 + 8000a168: 1780006f jal x0,8000a2e0 + 8000a16c: 1740006f jal x0,8000a2e0 + 8000a170: 1700006f jal x0,8000a2e0 + 8000a174: 16c0006f jal x0,8000a2e0 + 8000a178: 1680006f jal x0,8000a2e0 + 8000a17c: 1640006f jal x0,8000a2e0 + 8000a180: 1600006f jal x0,8000a2e0 + 8000a184: 15c0006f jal x0,8000a2e0 + 8000a188: 1580006f jal x0,8000a2e0 + 8000a18c: 1540006f jal x0,8000a2e0 + 8000a190: 1500006f jal x0,8000a2e0 + 8000a194: 14c0006f jal x0,8000a2e0 + 8000a198: 1480006f jal x0,8000a2e0 + 8000a19c: 1440006f jal x0,8000a2e0 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 13c0006f jal x0,8000a2e0 + 8000a1a8: 1380006f jal x0,8000a2e0 + 8000a1ac: 1340006f jal x0,8000a2e0 + 8000a1b0: 1300006f jal x0,8000a2e0 + 8000a1b4: 12c0006f jal x0,8000a2e0 + 8000a1b8: 1280006f jal x0,8000a2e0 + 8000a1bc: 1240006f jal x0,8000a2e0 + +000000008000a1c0 : + 8000a1c0: 34011173 csrrw x2,mscratch,x2 + 8000a1c4: 30f13423 sd x15,776(x2) + 8000a1c8: 13c007ef jal x15,8000a304 + 8000a1cc: 34011173 csrrw x2,mscratch,x2 + 8000a1d0: 30f13423 sd x15,776(x2) + 8000a1d4: 130007ef jal x15,8000a304 + 8000a1d8: 34011173 csrrw x2,mscratch,x2 + 8000a1dc: 30f13423 sd x15,776(x2) + 8000a1e0: 124007ef jal x15,8000a304 + 8000a1e4: 34011173 csrrw x2,mscratch,x2 + 8000a1e8: 30f13423 sd x15,776(x2) + 8000a1ec: 118007ef jal x15,8000a304 + 8000a1f0: 34011173 csrrw x2,mscratch,x2 + 8000a1f4: 30f13423 sd x15,776(x2) + 8000a1f8: 10c007ef jal x15,8000a304 + 8000a1fc: 34011173 csrrw x2,mscratch,x2 + 8000a200: 30f13423 sd x15,776(x2) + 8000a204: 100007ef jal x15,8000a304 + 8000a208: 34011173 csrrw x2,mscratch,x2 + 8000a20c: 30f13423 sd x15,776(x2) + 8000a210: 0f4007ef jal x15,8000a304 + 8000a214: 34011173 csrrw x2,mscratch,x2 + 8000a218: 30f13423 sd x15,776(x2) + 8000a21c: 0e8007ef jal x15,8000a304 + 8000a220: 34011173 csrrw x2,mscratch,x2 + 8000a224: 30f13423 sd x15,776(x2) + 8000a228: 0dc007ef jal x15,8000a304 + 8000a22c: 34011173 csrrw x2,mscratch,x2 + 8000a230: 30f13423 sd x15,776(x2) + 8000a234: 0d0007ef jal x15,8000a304 + 8000a238: 34011173 csrrw x2,mscratch,x2 + 8000a23c: 30f13423 sd x15,776(x2) + 8000a240: 0c4007ef jal x15,8000a304 + 8000a244: 34011173 csrrw x2,mscratch,x2 + 8000a248: 30f13423 sd x15,776(x2) + 8000a24c: 0b8007ef jal x15,8000a304 + 8000a250: 34011173 csrrw x2,mscratch,x2 + 8000a254: 30f13423 sd x15,776(x2) + 8000a258: 0ac007ef jal x15,8000a304 + 8000a25c: 34011173 csrrw x2,mscratch,x2 + 8000a260: 30f13423 sd x15,776(x2) + 8000a264: 0a0007ef jal x15,8000a304 + 8000a268: 34011173 csrrw x2,mscratch,x2 + 8000a26c: 30f13423 sd x15,776(x2) + 8000a270: 094007ef jal x15,8000a304 + 8000a274: 34011173 csrrw x2,mscratch,x2 + 8000a278: 30f13423 sd x15,776(x2) + 8000a27c: 088007ef jal x15,8000a304 + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 07c007ef jal x15,8000a304 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 070007ef jal x15,8000a304 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 064007ef jal x15,8000a304 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 058007ef jal x15,8000a304 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 04c007ef jal x15,8000a304 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 040007ef jal x15,8000a304 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 034007ef jal x15,8000a304 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 028007ef jal x15,8000a304 + +000000008000a2e0 : + 8000a2e0: 00000317 auipc x6,0x0 + 8000a2e4: a9030313 addi x6,x6,-1392 # 80009d70 + 8000a2e8: 00000013 addi x0,x0,0 + 8000a2ec: 00000013 addi x0,x0,0 + 8000a2f0: 00000013 addi x0,x0,0 + 8000a2f4: 00000013 addi x0,x0,0 + 8000a2f8: 00000013 addi x0,x0,0 + 8000a2fc: 00000013 addi x0,x0,0 + 8000a300: 00030067 jalr x0,0(x6) + +000000008000a304 : + 8000a304: 30e13023 sd x14,768(x2) + 8000a308: 34011773 csrrw x14,mscratch,x2 + 8000a30c: 30e13823 sd x14,784(x2) + 8000a310: 2b013703 ld x14,688(x2) + 8000a314: 00070067 jalr x0,0(x14) + +000000008000a318 : + 8000a318: 2e913c23 sd x9,760(x2) + 8000a31c: 2e813823 sd x8,752(x2) + 8000a320: 2e713423 sd x7,744(x2) + 8000a324: 2e613023 sd x6,736(x2) + 8000a328: 00000013 addi x0,x0,0 + 8000a32c: 00000013 addi x0,x0,0 + 8000a330: 00000013 addi x0,x0,0 + 8000a334: 00000013 addi x0,x0,0 + 8000a338: 00000013 addi x0,x0,0 + 8000a33c: 00000013 addi x0,x0,0 + 8000a340: 00006317 auipc x6,0x6 + 8000a344: dc830313 addi x6,x6,-568 # 80010108 + 8000a348: 00000013 addi x0,x0,0 + 8000a34c: 00000013 addi x0,x0,0 + 8000a350: 00000013 addi x0,x0,0 + 8000a354: 00000013 addi x0,x0,0 + 8000a358: 00000013 addi x0,x0,0 + 8000a35c: 00000013 addi x0,x0,0 + 8000a360: 00033383 ld x7,0(x6) + 8000a364: 00138393 addi x7,x7,1 + 8000a368: 00733023 sd x7,0(x6) + 8000a36c: 34202773 csrrs x14,mcause,x0 + +000000008000a370 : + 8000a370: fff00493 addi x9,x0,-1 + 8000a374: 00d4d493 srli x9,x9,0xd + 8000a378: 00c49493 slli x9,x9,0xc + 8000a37c: fff4c493 xori x9,x9,-1 + 8000a380: 00e4f4b3 and x9,x9,x14 + +000000008000a384 : + 8000a384: ffe48413 addi x8,x9,-2 + 8000a388: 00041663 bne x8,x0,8000a394 + +000000008000a38c : + 8000a38c: 500502e3 beq x10,x0,8000b090 + 8000a390: 5b40006f jal x0,8000a944 + +000000008000a394 : + 8000a394: ff848413 addi x8,x9,-8 + 8000a398: 00245413 srli x8,x8,0x2 + 8000a39c: 5a041463 bne x8,x0,8000a944 + +000000008000a3a0 : + 8000a3a0: 4e0508e3 beq x10,x0,8000b090 + +000000008000a3a4 : + 8000a3a4: fff50493 addi x9,x10,-1 + 8000a3a8: 00500393 addi x7,x0,5 + 8000a3ac: 0274e063 bltu x9,x7,8000a3cc + 8000a3b0: 07300393 addi x7,x0,115 + 8000a3b4: 00750463 beq x10,x7,8000a3bc + 8000a3b8: 08c0006f jal x0,8000a444 + +000000008000a3bc : + 8000a3bc: 34102573 csrrs x10,mepc,x0 + 8000a3c0: 00450413 addi x8,x10,4 + 8000a3c4: 34141073 csrrw x0,mepc,x8 + 8000a3c8: 0310006f jal x0,8000abf8 + +000000008000a3cc : + 8000a3cc: 341024f3 csrrs x9,mepc,x0 + 8000a3d0: 00448493 addi x9,x9,4 + 8000a3d4: 34149073 csrrw x0,mepc,x9 + 8000a3d8: 00100393 addi x7,x0,1 + 8000a3dc: 00750e63 beq x10,x7,8000a3f8 + 8000a3e0: 00200393 addi x7,x0,2 + 8000a3e4: 02750463 beq x10,x7,8000a40c + 8000a3e8: 00300393 addi x7,x0,3 + 8000a3ec: 04750063 beq x10,x7,8000a42c + 8000a3f0: fff00513 addi x10,x0,-1 + 8000a3f4: 0050006f jal x0,8000abf8 + +000000008000a3f8 : + 8000a3f8: fff00493 addi x9,x0,-1 + 8000a3fc: 03e4d493 srli x9,x9,0x3e + 8000a400: 00b49493 slli x9,x9,0xb + 8000a404: 3004a073 csrrs x0,mstatus,x9 + 8000a408: 7f00006f jal x0,8000abf8 + +000000008000a40c : + 8000a40c: fff00493 addi x9,x0,-1 + 8000a410: 03e4d493 srli x9,x9,0x3e + 8000a414: 00b49493 slli x9,x9,0xb + 8000a418: 3004b073 csrrc x0,mstatus,x9 + 8000a41c: 00100493 addi x9,x0,1 + 8000a420: 00b49493 slli x9,x9,0xb + 8000a424: 3004a073 csrrs x0,mstatus,x9 + 8000a428: 7d00006f jal x0,8000abf8 + +000000008000a42c : + 8000a42c: fff00493 addi x9,x0,-1 + 8000a430: 03e4d493 srli x9,x9,0x3e + 8000a434: 00b49493 slli x9,x9,0xb + 8000a438: 3004b073 csrrc x0,mstatus,x9 + 8000a43c: 7bc0006f jal x0,8000abf8 + +000000008000a440 : + 8000a440: 00000013 addi x0,x0,0 + +000000008000a444 : + 8000a444: 00000013 addi x0,x0,0 + 8000a448: 00000013 addi x0,x0,0 + 8000a44c: 00000013 addi x0,x0,0 + 8000a450: 00000013 addi x0,x0,0 + 8000a454: 00000013 addi x0,x0,0 + 8000a458: 00000013 addi x0,x0,0 + 8000a45c: 00000013 addi x0,x0,0 + 8000a460: 00000397 auipc x7,0x0 + 8000a464: 17038393 addi x7,x7,368 # 8000a5d0 + 8000a468: 00000013 addi x0,x0,0 + 8000a46c: 00000013 addi x0,x0,0 + 8000a470: 00000013 addi x0,x0,0 + 8000a474: 00000013 addi x0,x0,0 + 8000a478: 00000013 addi x0,x0,0 + 8000a47c: 00000013 addi x0,x0,0 + +000000008000a480 : + 8000a480: 0003e403 lwu x8,0(x7) + 8000a484: 00a40863 beq x8,x10,8000a494 + 8000a488: 04040863 beq x8,x0,8000a4d8 + 8000a48c: 00838393 addi x7,x7,8 + 8000a490: ff1ff06f jal x0,8000a480 + +000000008000a494 : + 8000a494: 00008493 addi x9,x1,0 + 8000a498: 00000013 addi x0,x0,0 + 8000a49c: 00000013 addi x0,x0,0 + 8000a4a0: 00000097 auipc x1,0x0 + 8000a4a4: 02408093 addi x1,x1,36 # 8000a4c4 + 8000a4a8: 00000013 addi x0,x0,0 + 8000a4ac: 00000013 addi x0,x0,0 + 8000a4b0: 00000013 addi x0,x0,0 + 8000a4b4: 00000013 addi x0,x0,0 + 8000a4b8: 00000013 addi x0,x0,0 + 8000a4bc: 00000013 addi x0,x0,0 + 8000a4c0: 00038067 jalr x0,0(x7) + +000000008000a4c4 : + 8000a4c4: 00048093 addi x1,x9,0 + 8000a4c8: 34102473 csrrs x8,mepc,x0 + 8000a4cc: 00440413 addi x8,x8,4 + 8000a4d0: 34141073 csrrw x0,mepc,x8 + 8000a4d4: 7240006f jal x0,8000abf8 + +000000008000a4d8 : + 8000a4d8: 00050493 addi x9,x10,0 + 8000a4dc: 00000013 addi x0,x0,0 + 8000a4e0: 00019517 auipc x10,0x19 + 8000a4e4: 93f50513 addi x10,x10,-1729 # 80022e1f + 8000a4e8: 00000013 addi x0,x0,0 + 8000a4ec: 00000013 addi x0,x0,0 + 8000a4f0: 00000013 addi x0,x0,0 + 8000a4f4: 00000013 addi x0,x0,0 + 8000a4f8: 00000013 addi x0,x0,0 + 8000a4fc: 00000013 addi x0,x0,0 + 8000a500: 00038097 auipc x1,0x38 + 8000a504: 0a4080e7 jalr x1,164(x1) # 800425a4 + 8000a508: 00048513 addi x10,x9,0 + 8000a50c: 02000593 addi x11,x0,32 + 8000a510: 728020ef jal x1,8000cc38 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00017517 auipc x10,0x17 + 8000a524: cc850513 addi x10,x10,-824 # 800211e8 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + 8000a540: 00038097 auipc x1,0x38 + 8000a544: 064080e7 jalr x1,100(x1) # 800425a4 + 8000a548: 00000013 addi x0,x0,0 + 8000a54c: 00000013 addi x0,x0,0 + 8000a550: 00000013 addi x0,x0,0 + 8000a554: 00000013 addi x0,x0,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00017517 auipc x10,0x17 + 8000a564: 34650513 addi x10,x10,838 # 800218a6 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00038097 auipc x1,0x38 + 8000a584: 024080e7 jalr x1,36(x1) # 800425a4 + 8000a588: 00000013 addi x0,x0,0 + 8000a58c: 00000013 addi x0,x0,0 + 8000a590: 00000013 addi x0,x0,0 + 8000a594: 00000013 addi x0,x0,0 + 8000a598: 00000013 addi x0,x0,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00017517 auipc x10,0x17 + 8000a5a4: 20150513 addi x10,x10,513 # 800217a1 + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00038097 auipc x1,0x38 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000a5c8: 00038097 auipc x1,0x38 + 8000a5cc: 03c080e7 jalr x1,60(x1) # 80042604 + +000000008000a5d0 : + 8000a5d0: 30002573 .word 0x30002573 + 8000a5d4: 00008067 jalr x0,0(x1) + 8000a5d8: 30059073 .word 0x30059073 + 8000a5dc: 00008067 jalr x0,0(x1) + 8000a5e0: 3005a073 .word 0x3005a073 + 8000a5e4: 00008067 jalr x0,0(x1) + 8000a5e8: 3005b073 .word 0x3005b073 + 8000a5ec: 00008067 jalr x0,0(x1) + 8000a5f0: 30402573 .word 0x30402573 + 8000a5f4: 00008067 jalr x0,0(x1) + 8000a5f8: 30459073 .word 0x30459073 + 8000a5fc: 00008067 jalr x0,0(x1) + 8000a600: 3045a073 .word 0x3045a073 + 8000a604: 00008067 jalr x0,0(x1) + 8000a608: 3045b073 .word 0x3045b073 + 8000a60c: 00008067 jalr x0,0(x1) + 8000a610: 30602573 .word 0x30602573 + 8000a614: 00008067 jalr x0,0(x1) + 8000a618: 30659073 .word 0x30659073 + 8000a61c: 00008067 jalr x0,0(x1) + 8000a620: 3065a073 .word 0x3065a073 + 8000a624: 00008067 jalr x0,0(x1) + 8000a628: 3065b073 .word 0x3065b073 + 8000a62c: 00008067 jalr x0,0(x1) + 8000a630: 30a02573 .word 0x30a02573 + 8000a634: 00008067 jalr x0,0(x1) + 8000a638: 30a59073 .word 0x30a59073 + 8000a63c: 00008067 jalr x0,0(x1) + 8000a640: 30a5a073 .word 0x30a5a073 + 8000a644: 00008067 jalr x0,0(x1) + 8000a648: 30a5b073 .word 0x30a5b073 + 8000a64c: 00008067 jalr x0,0(x1) + 8000a650: 34402573 .word 0x34402573 + 8000a654: 00008067 jalr x0,0(x1) + 8000a658: 34459073 .word 0x34459073 + 8000a65c: 00008067 jalr x0,0(x1) + 8000a660: 3445a073 .word 0x3445a073 + 8000a664: 00008067 jalr x0,0(x1) + 8000a668: 3445b073 .word 0x3445b073 + 8000a66c: 00008067 jalr x0,0(x1) + 8000a670: 74702573 .word 0x74702573 + 8000a674: 00008067 jalr x0,0(x1) + 8000a678: 74759073 .word 0x74759073 + 8000a67c: 00008067 jalr x0,0(x1) + 8000a680: 7475a073 .word 0x7475a073 + 8000a684: 00008067 jalr x0,0(x1) + 8000a688: 7475b073 .word 0x7475b073 + 8000a68c: 00008067 jalr x0,0(x1) + 8000a690: 32002573 .word 0x32002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 32059073 .word 0x32059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3205a073 .word 0x3205a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3205b073 .word 0x3205b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: b0002573 .word 0xb0002573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: b0059073 .word 0xb0059073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: b005a073 .word 0xb005a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: b005b073 .word 0xb005b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: b0202573 .word 0xb0202573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: b0259073 .word 0xb0259073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: b025a073 .word 0xb025a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: b025b073 .word 0xb025b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 10002573 .word 0x10002573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 10059073 .word 0x10059073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 1005a073 .word 0x1005a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 1005b073 .word 0x1005b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 10402573 .word 0x10402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 10459073 .word 0x10459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 1045a073 .word 0x1045a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 1045b073 .word 0x1045b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 10602573 .word 0x10602573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 10659073 .word 0x10659073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 1065a073 .word 0x1065a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 1065b073 .word 0x1065b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 10a02573 .word 0x10a02573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 10a59073 .word 0x10a59073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 10a5a073 .word 0x10a5a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 10a5b073 .word 0x10a5b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: 14402573 .word 0x14402573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: 14459073 .word 0x14459073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: 1445a073 .word 0x1445a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: 1445b073 .word 0x1445b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: 14d02573 .word 0x14d02573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: 14d59073 .word 0x14d59073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: 14d5a073 .word 0x14d5a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: 14d5b073 .word 0x14d5b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 18002573 .word 0x18002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 18059073 .word 0x18059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1805a073 .word 0x1805a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1805b073 .word 0x1805b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 7a002573 .word 0x7a002573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 7a059073 .word 0x7a059073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 7a05a073 .word 0x7a05a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 7a05b073 .word 0x7a05b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 7a102573 .word 0x7a102573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 7a159073 .word 0x7a159073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 7a15a073 .word 0x7a15a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 7a15b073 .word 0x7a15b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 7a202573 .word 0x7a202573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 7a259073 .word 0x7a259073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 7a25a073 .word 0x7a25a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 7a25b073 .word 0x7a25b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 7a302573 .word 0x7a302573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 7a359073 .word 0x7a359073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 7a35a073 .word 0x7a35a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 7a35b073 .word 0x7a35b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 7a402573 .word 0x7a402573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 7a459073 .word 0x7a459073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 7a45a073 .word 0x7a45a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 7a45b073 .word 0x7a45b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 7a502573 .word 0x7a502573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 7a559073 .word 0x7a559073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 7a55a073 .word 0x7a55a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 7a55b073 .word 0x7a55b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a802573 .word 0x7a802573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a859073 .word 0x7a859073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a85a073 .word 0x7a85a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a85b073 .word 0x7a85b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7aa02573 .word 0x7aa02573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7aa59073 .word 0x7aa59073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7aa5a073 .word 0x7aa5a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7aa5b073 .word 0x7aa5b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 5a802573 .word 0x5a802573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 5a859073 .word 0x5a859073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 5a85a073 .word 0x5a85a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 5a85b073 .word 0x5a85b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 6a802573 .word 0x6a802573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 6a859073 .word 0x6a859073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 6a85a073 .word 0x6a85a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 6a85b073 .word 0x6a85b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 0005a503 lw x10,0(x11) + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 0045a503 lw x10,4(x11) + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 00c5a023 sw x12,0(x11) + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 00c5a223 sw x12,4(x11) + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 0005b503 ld x10,0(x11) + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 00c5b023 sd x12,0(x11) + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 00000000 .word 0x00000000 + +000000008000a944 : + 8000a944: 02000393 addi x7,x0,32 + 8000a948: 00075c63 bge x14,x0,8000a960 + +000000008000a94c : + 8000a94c: 00171413 slli x8,x14,0x1 + 8000a950: ff240413 addi x8,x8,-14 + 8000a954: 00045663 bge x8,x0,8000a960 + 8000a958: 01800393 addi x7,x0,24 + 8000a95c: 0040006f jal x0,8000a960 + +000000008000a960 : + 8000a960: ca810113 addi x2,x2,-856 + 8000a964: 5f013303 ld x6,1520(x2) + 8000a968: 007304b3 add x9,x6,x7 + 8000a96c: 5e913823 sd x9,1520(x2) + 8000a970: 5d013403 ld x8,1488(x2) + 8000a974: 40830333 sub x6,x6,x8 + 8000a978: 35810113 addi x2,x2,856 + 8000a97c: 27813403 ld x8,632(x2) + 8000a980: 00830333 add x6,x6,x8 + 8000a984: 34102473 csrrs x8,mepc,x0 + 8000a988: 00000013 addi x0,x0,0 + 8000a98c: 00000013 addi x0,x0,0 + 8000a990: 00000013 addi x0,x0,0 + 8000a994: 00000013 addi x0,x0,0 + 8000a998: 00000013 addi x0,x0,0 + 8000a99c: 00000013 addi x0,x0,0 + 8000a9a0: 00017497 auipc x9,0x17 + 8000a9a4: 82848493 addi x9,x9,-2008 # 800211c8 + 8000a9a8: 00000013 addi x0,x0,0 + 8000a9ac: 00000013 addi x0,x0,0 + 8000a9b0: 00000013 addi x0,x0,0 + 8000a9b4: 00000013 addi x0,x0,0 + 8000a9b8: 00000013 addi x0,x0,0 + 8000a9bc: 00000013 addi x0,x0,0 + 8000a9c0: 0084b023 sd x8,0(x9) + 8000a9c4: 00e4b423 sd x14,8(x9) + 8000a9c8: 34302473 csrrs x8,mtval,x0 + 8000a9cc: 0084b823 sd x8,16(x9) + 8000a9d0: 30002473 csrrs x8,mstatus,x0 + 8000a9d4: 0084bc23 sd x8,24(x9) + 8000a9d8: 00000013 addi x0,x0,0 + 8000a9dc: 00000013 addi x0,x0,0 + 8000a9e0: 00037417 auipc x8,0x37 + 8000a9e4: 1c840413 addi x8,x8,456 # 80041ba8 + 8000a9e8: 00000013 addi x0,x0,0 + 8000a9ec: 00000013 addi x0,x0,0 + 8000a9f0: 00000013 addi x0,x0,0 + 8000a9f4: 00000013 addi x0,x0,0 + 8000a9f8: 00000013 addi x0,x0,0 + 8000a9fc: 00000013 addi x0,x0,0 + 8000aa00: 007304b3 add x9,x6,x7 + 8000aa04: e2946663 bltu x8,x9,8000a030 + +000000008000aa08 : + 8000aa08: 2c013403 ld x8,704(x2) + 8000aa0c: 408787b3 sub x15,x15,x8 + 8000aa10: 00179493 slli x9,x15,0x1 + 8000aa14: 009787b3 add x15,x15,x9 + 8000aa18: 0057d793 srli x15,x15,0x5 + 8000aa1c: 00679793 slli x15,x15,0x6 + 8000aa20: 0077e7b3 or x15,x15,x7 + 8000aa24: 00378793 addi x15,x15,3 + 8000aa28: 02075a63 bge x14,x0,8000aa5c + 8000aa2c: 00f00413 addi x8,x0,15 + 8000aa30: 00877433 and x8,x14,x8 + 8000aa34: 304024f3 csrrs x9,mie,x0 + 8000aa38: 0084d4b3 srl x9,x9,x8 + 8000aa3c: 0014f493 andi x9,x9,1 + 8000aa40: 00b49493 slli x9,x9,0xb + 8000aa44: 0097e7b3 or x15,x15,x9 + 8000aa48: 344024f3 csrrs x9,mip,x0 + 8000aa4c: 0084d4b3 srl x9,x9,x8 + 8000aa50: 0014f493 andi x9,x9,1 + 8000aa54: 00c49493 slli x9,x9,0xc + 8000aa58: 0097e7b3 or x15,x15,x9 + 8000aa5c: 300023f3 csrrs x7,mstatus,x0 + 8000aa60: 02f39393 slli x7,x7,0x2f + 8000aa64: 0223d393 srli x7,x7,0x22 + 8000aa68: 00000437 lui x8,0x0 + 8000aa6c: 00040413 addi x8,x8,0 # 0 + 8000aa70: 00b41413 slli x8,x8,0xb + 8000aa74: 00140413 addi x8,x8,1 + 8000aa78: 00b41413 slli x8,x8,0xb + 8000aa7c: 06740413 addi x8,x8,103 + 8000aa80: 00a41413 slli x8,x8,0xa + 8000aa84: 3e540413 addi x8,x8,997 + 8000aa88: fff44413 xori x8,x8,-1 + 8000aa8c: 0083f433 and x8,x7,x8 + 8000aa90: 0087e433 or x8,x15,x8 + 8000aa94: 0204d493 srli x9,x9,0x20 + 8000aa98: 1c04f493 andi x9,x9,448 + 8000aa9c: 00849493 slli x9,x9,0x8 + 8000aaa0: 00946433 or x8,x8,x9 + 8000aaa4: 00033483 ld x9,0(x6) + 8000aaa8: 02848263 beq x9,x8,8000aacc + 8000aaac: 00040313 addi x6,x8,0 + 8000aab0: 00048213 addi x4,x9,0 + 8000aab4: 6b4003ef jal x7,8000b168 + 8000aab8: 8000aa08 .word 0x8000aa08 + 8000aabc: 00000000 .word 0x00000000 + 8000aac0: 800219a8 .word 0x800219a8 + 8000aac4: 00000000 .word 0x00000000 + 8000aac8: 00000341 .word 0x00000341 + +000000008000aacc : + 8000aacc: 00070413 addi x8,x14,0 + 8000aad0: 00833483 ld x9,8(x6) + 8000aad4: 02848263 beq x9,x8,8000aaf8 + 8000aad8: 00040313 addi x6,x8,0 + 8000aadc: 00048213 addi x4,x9,0 + 8000aae0: 688003ef jal x7,8000b168 + 8000aae4: 8000aacc .word 0x8000aacc + 8000aae8: 00000000 .word 0x00000000 + 8000aaec: 80021aaa .word 0x80021aaa + 8000aaf0: 00000000 .word 0x00000000 + 8000aaf4: 00000341 .word 0x00000341 + 8000aaf8: 12074063 blt x14,x0,8000ac18 + +000000008000aafc : + 8000aafc: 34102473 csrrs x8,mepc,x0 + 8000ab00: 00010493 addi x9,x2,0 + 8000ab04: 0040006f jal x0,8000ab08 + +000000008000ab08 : + 8000ab08: 08000393 addi x7,x0,128 + 8000ab0c: 04740863 beq x8,x7,8000ab5c + 8000ab10: 00238393 addi x7,x7,2 + 8000ab14: 04740463 beq x8,x7,8000ab5c + 8000ab18: 04040263 beq x8,x0,8000ab5c + 8000ab1c: 2884b383 ld x7,648(x9) + 8000ab20: 2904b783 ld x15,656(x9) + 8000ab24: 007787b3 add x15,x15,x7 + 8000ab28: 00f47463 bgeu x8,x15,8000ab30 + 8000ab2c: 02747663 bgeu x8,x7,8000ab58 + +000000008000ab30 : + 8000ab30: 2584b383 ld x7,600(x9) + 8000ab34: 2604b783 ld x15,608(x9) + 8000ab38: 007787b3 add x15,x15,x7 + 8000ab3c: 00f47463 bgeu x8,x15,8000ab44 + 8000ab40: 00747c63 bgeu x8,x7,8000ab58 + +000000008000ab44 : + 8000ab44: 2684b383 ld x7,616(x9) + 8000ab48: 2704b783 ld x15,624(x9) + 8000ab4c: 007787b3 add x15,x15,x7 + 8000ab50: d0f47a63 bgeu x8,x15,8000a064 + 8000ab54: d0746863 bltu x8,x7,8000a064 + +000000008000ab58 : + 8000ab58: 40740433 sub x8,x8,x7 + +000000008000ab5c : + 8000ab5c: 01033483 ld x9,16(x6) + 8000ab60: 02848263 beq x9,x8,8000ab84 + 8000ab64: 00040313 addi x6,x8,0 + 8000ab68: 00048213 addi x4,x9,0 + 8000ab6c: 5fc003ef jal x7,8000b168 + 8000ab70: 8000ab5c .word 0x8000ab5c + 8000ab74: 00000000 .word 0x00000000 + 8000ab78: 80021ba5 .word 0x80021ba5 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 00000341 .word 0x00000341 + +000000008000ab84 : + 8000ab84: 34102473 csrrs x8,mepc,x0 + 8000ab88: 342023f3 csrrs x7,mcause,x0 + 8000ab8c: 00c00793 addi x15,x0,12 + 8000ab90: 00f38a63 beq x7,x15,8000aba4 + 8000ab94: 00100793 addi x15,x0,1 + 8000ab98: 00f38663 beq x7,x15,8000aba4 + 8000ab9c: 01400793 addi x15,x0,20 + 8000aba0: 00f39663 bne x7,x15,8000abac + 8000aba4: 34109073 csrrw x0,mepc,x1 + 8000aba8: 0100006f jal x0,8000abb8 + +000000008000abac : + 8000abac: 00400393 addi x7,x0,4 + 8000abb0: 00740433 add x8,x8,x7 + 8000abb4: 34141073 csrrw x0,mepc,x8 + +000000008000abb8 : + 8000abb8: 34302473 csrrs x8,mtval,x0 + +000000008000abbc : + 8000abbc: 01833483 ld x9,24(x6) + 8000abc0: 02848263 beq x9,x8,8000abe4 + 8000abc4: 00040313 addi x6,x8,0 + 8000abc8: 00048213 addi x4,x9,0 + 8000abcc: 59c003ef jal x7,8000b168 + 8000abd0: 8000abbc .word 0x8000abbc + 8000abd4: 00000000 .word 0x00000000 + 8000abd8: 80021c98 .word 0x80021c98 + 8000abdc: 00000000 .word 0x00000000 + 8000abe0: 00000341 .word 0x00000341 + +000000008000abe4 : + 8000abe4: 30102473 csrrs x8,misa,x0 + 8000abe8: 03841413 slli x8,x8,0x38 + 8000abec: 00045263 bge x8,x0,8000abf0 + +000000008000abf0 : + 8000abf0: 20000393 addi x7,x0,512 + 8000abf4: 0640006f jal x0,8000ac58 + +000000008000abf8 : + 8000abf8: 2e013303 ld x6,736(x2) + 8000abfc: 2e813383 ld x7,744(x2) + 8000ac00: 2f013403 ld x8,752(x2) + 8000ac04: 2f813483 ld x9,760(x2) + 8000ac08: 30013703 ld x14,768(x2) + 8000ac0c: 30813783 ld x15,776(x2) + 8000ac10: 31013103 ld x2,784(x2) + 8000ac14: 30200073 mret + +000000008000ac18 : + 8000ac18: 00100413 addi x8,x0,1 + 8000ac1c: 01f77393 andi x7,x14,31 + 8000ac20: 00741433 sll x8,x8,x7 + 8000ac24: 304434f3 csrrc x9,mie,x8 + 8000ac28: 34443473 csrrc x8,mip,x8 + +000000008000ac2c : + 8000ac2c: 01033483 ld x9,16(x6) + 8000ac30: 02848263 beq x9,x8,8000ac54 + 8000ac34: 00040313 addi x6,x8,0 + 8000ac38: 00048213 addi x4,x9,0 + 8000ac3c: 52c003ef jal x7,8000b168 + 8000ac40: 8000ac2c .word 0x8000ac2c + 8000ac44: 00000000 .word 0x00000000 + 8000ac48: 80021e0b .word 0x80021e0b + 8000ac4c: 00000000 .word 0x00000000 + 8000ac50: 00000341 .word 0x00000341 + 8000ac54: 00000393 addi x7,x0,0 + +000000008000ac58 : + 8000ac58: 00000417 auipc x8,0x0 + 8000ac5c: 03c40413 addi x8,x8,60 # 8000ac94 + 8000ac60: 00740433 add x8,x8,x7 + 8000ac64: 00371393 slli x7,x14,0x3 + 8000ac68: 00740433 add x8,x8,x7 + 8000ac6c: ff847413 andi x8,x8,-8 + 8000ac70: 00043403 ld x8,0(x8) + +000000008000ac74 : + 8000ac74: 00040a63 beq x8,x0,8000ac88 + 8000ac78: 03f41393 slli x7,x8,0x3f + 8000ac7c: 0003d863 bge x7,x0,8000ac8c + 8000ac80: 00145413 srli x8,x8,0x1 + 8000ac84: f6870ae3 beq x14,x8,8000abf8 + 8000ac88: bdcff06f jal x0,8000a064 + +000000008000ac8c : + 8000ac8c: 00040067 jalr x0,0(x8) + +000000008000ac90 : + ... + 8000ac98: 00000001 .word 0x00000001 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000001 .word 0x00000001 + 8000aca4: 00000000 .word 0x00000000 + 8000aca8: 80042000 .word 0x80042000 + ... + 8000acb8: 00000001 .word 0x00000001 + 8000acbc: 00000000 .word 0x00000000 + 8000acc0: 00000001 .word 0x00000001 + 8000acc4: 00000000 .word 0x00000000 + 8000acc8: 80042014 .word 0x80042014 + ... + 8000acd8: 00000001 .word 0x00000001 + 8000acdc: 00000000 .word 0x00000000 + 8000ace0: 00000001 .word 0x00000001 + 8000ace4: 00000000 .word 0x00000000 + 8000ace8: 8004202c .word 0x8004202c + 8000acec: 00000000 .word 0x00000000 + 8000acf0: 00000001 .word 0x00000001 + 8000acf4: 00000000 .word 0x00000000 + 8000acf8: 00000001 .word 0x00000001 + 8000acfc: 00000000 .word 0x00000000 + 8000ad00: 00000001 .word 0x00000001 + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 00000001 .word 0x00000001 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000001 .word 0x00000001 + 8000ad14: 00000000 .word 0x00000000 + 8000ad18: 00000001 .word 0x00000001 + 8000ad1c: 00000000 .word 0x00000000 + 8000ad20: 00000001 .word 0x00000001 + 8000ad24: 00000000 .word 0x00000000 + 8000ad28: 00000001 .word 0x00000001 + 8000ad2c: 00000000 .word 0x00000000 + 8000ad30: 00000001 .word 0x00000001 + 8000ad34: 00000000 .word 0x00000000 + 8000ad38: 00000001 .word 0x00000001 + 8000ad3c: 00000000 .word 0x00000000 + 8000ad40: 00000001 .word 0x00000001 + 8000ad44: 00000000 .word 0x00000000 + 8000ad48: 00000001 .word 0x00000001 + ... + +000000008000ae90 : + 8000ae90: 00000001 .word 0x00000001 + 8000ae94: 00000000 .word 0x00000000 + 8000ae98: 00000003 .word 0x00000003 + 8000ae9c: 00000000 .word 0x00000000 + 8000aea0: 00000005 .word 0x00000005 + 8000aea4: 00000000 .word 0x00000000 + 8000aea8: 00000007 .word 0x00000007 + 8000aeac: 00000000 .word 0x00000000 + 8000aeb0: 00000009 .word 0x00000009 + 8000aeb4: 00000000 .word 0x00000000 + 8000aeb8: 0000000b .word 0x0000000b + 8000aebc: 00000000 .word 0x00000000 + 8000aec0: 0000000d .word 0x0000000d + 8000aec4: 00000000 .word 0x00000000 + 8000aec8: 0000000f .word 0x0000000f + 8000aecc: 00000000 .word 0x00000000 + 8000aed0: 00000011 .word 0x00000011 + 8000aed4: 00000000 .word 0x00000000 + 8000aed8: 00000013 .word 0x00000013 + 8000aedc: 00000000 .word 0x00000000 + 8000aee0: 00000015 .word 0x00000015 + 8000aee4: 00000000 .word 0x00000000 + 8000aee8: 00000017 .word 0x00000017 + 8000aeec: 00000000 .word 0x00000000 + 8000aef0: 00000019 .word 0x00000019 + 8000aef4: 00000000 .word 0x00000000 + 8000aef8: 0000001b .word 0x0000001b + 8000aefc: 00000000 .word 0x00000000 + 8000af00: 0000001d .word 0x0000001d + 8000af04: 00000000 .word 0x00000000 + 8000af08: 0000001f .word 0x0000001f + 8000af0c: 00000000 .word 0x00000000 + 8000af10: 00000021 .word 0x00000021 + 8000af14: 00000000 .word 0x00000000 + 8000af18: 00000023 .word 0x00000023 + 8000af1c: 00000000 .word 0x00000000 + 8000af20: 00000025 .word 0x00000025 + 8000af24: 00000000 .word 0x00000000 + 8000af28: 00000027 .word 0x00000027 + 8000af2c: 00000000 .word 0x00000000 + 8000af30: 00000029 .word 0x00000029 + 8000af34: 00000000 .word 0x00000000 + 8000af38: 0000002b .word 0x0000002b + 8000af3c: 00000000 .word 0x00000000 + 8000af40: 0000002d .word 0x0000002d + 8000af44: 00000000 .word 0x00000000 + 8000af48: 0000002f .word 0x0000002f + ... + +000000008000b090 : + 8000b090: 300023f3 csrrs x7,mstatus,x0 + 8000b094: 00b3d493 srli x9,x7,0xb + 8000b098: 0034f493 andi x9,x9,3 + 8000b09c: ffd48413 addi x8,x9,-3 + 8000b0a0: 341023f3 csrrs x7,mepc,x0 + 8000b0a4: 00000493 addi x9,x0,0 + 8000b0a8: 02040c63 beq x8,x0,8000b0e0 + 8000b0ac: 35810113 addi x2,x2,856 + 8000b0b0: 300023f3 csrrs x7,mstatus,x0 + 8000b0b4: 01839393 slli x7,x7,0x18 + 8000b0b8: 0003da63 bge x7,x0,8000b0cc + +000000008000b0bc : + 8000b0bc: 35810113 addi x2,x2,856 + 8000b0c0: 5b013783 ld x15,1456(x2) + 8000b0c4: ca810113 addi x2,x2,-856 + 8000b0c8: 0080006f jal x0,8000b0d0 + +000000008000b0cc : + 8000b0cc: f0013783 ld x15,-256(x2) + 8000b0d0: 341023f3 csrrs x7,mepc,x0 + 8000b0d4: 40f383b3 sub x7,x7,x15 + 8000b0d8: ca810113 addi x2,x2,-856 + 8000b0dc: 25813483 ld x9,600(x2) + +000000008000b0e0 : + 8000b0e0: 007483b3 add x7,x9,x7 + 8000b0e4: 2e013303 ld x6,736(x2) + 8000b0e8: 2f013403 ld x8,752(x2) + 8000b0ec: 2f813483 ld x9,760(x2) + 8000b0f0: 30013703 ld x14,768(x2) + 8000b0f4: 30813783 ld x15,776(x2) + 8000b0f8: 31013103 ld x2,784(x2) + 8000b0fc: 00438067 jalr x0,4(x7) + +000000008000b100 : + 8000b100: 00016217 auipc x4,0x16 + 8000b104: f8020213 addi x4,x4,-128 # 80021080 + 8000b108: 02523423 sd x5,40(x4) # 28 + 8000b10c: 00123423 sd x1,8(x4) # 8 + 8000b110: 00023023 sd x0,0(x4) # 0 + 8000b114: 0880006f jal x0,8000b19c + +000000008000b118 : + 8000b118: 00016397 auipc x7,0x16 + 8000b11c: f6838393 addi x7,x7,-152 # 80021080 + 8000b120: 0483b023 sd x8,64(x7) + 8000b124: 0243b023 sd x4,32(x7) + 8000b128: 0253b423 sd x5,40(x7) + 8000b12c: 0013b423 sd x1,8(x7) + 8000b130: 0003b023 sd x0,0(x7) + 8000b134: 00038213 addi x4,x7,0 + 8000b138: 00040293 addi x5,x8,0 + 8000b13c: 0600006f jal x0,8000b19c + +000000008000b140 : + 8000b140: 00016697 auipc x13,0x16 + 8000b144: f4068693 addi x13,x13,-192 # 80021080 + 8000b148: 06e6b823 sd x14,112(x13) + 8000b14c: 0246b023 sd x4,32(x13) + 8000b150: 0256b423 sd x5,40(x13) + 8000b154: 0016b423 sd x1,8(x13) + 8000b158: 0006b023 sd x0,0(x13) + 8000b15c: 00068213 addi x4,x13,0 + 8000b160: 00070293 addi x5,x14,0 + 8000b164: 0380006f jal x0,8000b19c + +000000008000b168 : + 8000b168: 00016497 auipc x9,0x16 + 8000b16c: f1848493 addi x9,x9,-232 # 80021080 + 8000b170: 0674b423 sd x7,104(x9) + 8000b174: 0244b023 sd x4,32(x9) + 8000b178: 0254b423 sd x5,40(x9) + 8000b17c: 0014b423 sd x1,8(x9) + 8000b180: 00300093 addi x1,x0,3 + 8000b184: 0014b023 sd x1,0(x9) + 8000b188: 1064b823 sd x6,272(x9) + 8000b18c: 1044bc23 sd x4,280(x9) + 8000b190: 00048213 addi x4,x9,0 + 8000b194: 00038293 addi x5,x7,0 + 8000b198: 0040006f jal x0,8000b19c + +000000008000b19c : + 8000b19c: 00223823 sd x2,16(x4) # 10 + 8000b1a0: 00323c23 sd x3,24(x4) # 18 + 8000b1a4: 02623823 sd x6,48(x4) # 30 + 8000b1a8: 02723c23 sd x7,56(x4) # 38 + 8000b1ac: 04823023 sd x8,64(x4) # 40 + 8000b1b0: 04923423 sd x9,72(x4) # 48 + 8000b1b4: 04a23823 sd x10,80(x4) # 50 + 8000b1b8: 04b23c23 sd x11,88(x4) # 58 + 8000b1bc: 06c23023 sd x12,96(x4) # 60 + 8000b1c0: 06d23423 sd x13,104(x4) # 68 + 8000b1c4: 06e23823 sd x14,112(x4) # 70 + 8000b1c8: 06f23c23 sd x15,120(x4) # 78 + 8000b1cc: 09023023 sd x16,128(x4) # 80 + 8000b1d0: 09123423 sd x17,136(x4) # 88 + 8000b1d4: 09223823 sd x18,144(x4) # 90 + 8000b1d8: 09323c23 sd x19,152(x4) # 98 + 8000b1dc: 0b423023 sd x20,160(x4) # a0 + 8000b1e0: 0b523423 sd x21,168(x4) # a8 + 8000b1e4: 0b623823 sd x22,176(x4) # b0 + 8000b1e8: 0b723c23 sd x23,184(x4) # b8 + 8000b1ec: 0d823023 sd x24,192(x4) # c0 + 8000b1f0: 0d923423 sd x25,200(x4) # c8 + 8000b1f4: 0da23823 sd x26,208(x4) # d0 + 8000b1f8: 0db23c23 sd x27,216(x4) # d8 + 8000b1fc: 0fc23023 sd x28,224(x4) # e0 + 8000b200: 0fd23423 sd x29,232(x4) # e8 + 8000b204: 0fe23823 sd x30,240(x4) # f0 + 8000b208: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b20c : + 8000b20c: 00016497 auipc x9,0x16 + 8000b210: e744a483 lw x9,-396(x9) # 80021080 + 8000b214: 00300513 addi x10,x0,3 + 8000b218: 18a48a63 beq x9,x10,8000b3ac + +000000008000b21c : + 8000b21c: ffa2d303 lhu x6,-6(x5) + 8000b220: ff82d383 lhu x7,-8(x5) + 8000b224: 01031313 slli x6,x6,0x10 + 8000b228: 00736333 or x6,x6,x7 + 8000b22c: 00f35393 srli x7,x6,0xf + 8000b230: 01f3f393 andi x7,x7,31 + 8000b234: 01435413 srli x8,x6,0x14 + 8000b238: 01f47413 andi x8,x8,31 + 8000b23c: 10822223 sw x8,260(x4) # 104 + 8000b240: 00341313 slli x6,x8,0x3 + 8000b244: 00620333 add x6,x4,x6 + 8000b248: 00033303 ld x6,0(x6) + 8000b24c: 10623823 sd x6,272(x4) # 110 + 8000b250: ff62d303 lhu x6,-10(x5) + 8000b254: ff42d383 lhu x7,-12(x5) + 8000b258: 01031313 slli x6,x6,0x10 + 8000b25c: 00736333 or x6,x6,x7 + 8000b260: 00030513 addi x10,x6,0 + 8000b264: 07f37413 andi x8,x6,127 + 8000b268: 00300493 addi x9,x0,3 + 8000b26c: 0c941463 bne x8,x9,8000b334 + 8000b270: 00c35413 srli x8,x6,0xc + 8000b274: 00747413 andi x8,x8,7 + 8000b278: 00300493 addi x9,x0,3 + 8000b27c: 0a941c63 bne x8,x9,8000b334 + 8000b280: 41435393 srai x7,x6,0x14 + 8000b284: 00f35313 srli x6,x6,0xf + 8000b288: 01f37313 andi x6,x6,31 + 8000b28c: 00331313 slli x6,x6,0x3 + 8000b290: 00620333 add x6,x4,x6 + 8000b294: 00033303 ld x6,0(x6) + 8000b298: 00730333 add x6,x6,x7 + 8000b29c: 00737413 andi x8,x6,7 + 8000b2a0: 0c041663 bne x8,x0,8000b36c + 8000b2a4: 00000013 addi x0,x0,0 + 8000b2a8: 00000013 addi x0,x0,0 + 8000b2ac: 00000013 addi x0,x0,0 + 8000b2b0: 00000013 addi x0,x0,0 + 8000b2b4: 00000013 addi x0,x0,0 + 8000b2b8: 00000013 addi x0,x0,0 + 8000b2bc: 00000013 addi x0,x0,0 + 8000b2c0: 00018417 auipc x8,0x18 + 8000b2c4: bb040413 addi x8,x8,-1104 # 80022e70 + 8000b2c8: 00000013 addi x0,x0,0 + 8000b2cc: 00000013 addi x0,x0,0 + 8000b2d0: 00000013 addi x0,x0,0 + 8000b2d4: 00000013 addi x0,x0,0 + 8000b2d8: 00000013 addi x0,x0,0 + 8000b2dc: 00000013 addi x0,x0,0 + 8000b2e0: 08836663 bltu x6,x8,8000b36c + 8000b2e4: 00000013 addi x0,x0,0 + 8000b2e8: 00000013 addi x0,x0,0 + 8000b2ec: 00000013 addi x0,x0,0 + 8000b2f0: 00000013 addi x0,x0,0 + 8000b2f4: 00000013 addi x0,x0,0 + 8000b2f8: 00000013 addi x0,x0,0 + 8000b2fc: 00000013 addi x0,x0,0 + 8000b300: 00037417 auipc x8,0x37 + 8000b304: 8b040413 addi x8,x8,-1872 # 80041bb0 + 8000b308: 00000013 addi x0,x0,0 + 8000b30c: 00000013 addi x0,x0,0 + 8000b310: 00000013 addi x0,x0,0 + 8000b314: 00000013 addi x0,x0,0 + 8000b318: 00000013 addi x0,x0,0 + 8000b31c: 00000013 addi x0,x0,0 + 8000b320: ff840413 addi x8,x8,-8 + 8000b324: 04646463 bltu x8,x6,8000b36c + 8000b328: 00033303 ld x6,0(x6) + 8000b32c: 10623c23 sd x6,280(x4) # 118 + 8000b330: 3880006f jal x0,8000b6b8 + +000000008000b334 : + 8000b334: 00100413 addi x8,x0,1 + 8000b338: 00000013 addi x0,x0,0 + 8000b33c: 00000013 addi x0,x0,0 + 8000b340: 00016497 auipc x9,0x16 + 8000b344: e6848493 addi x9,x9,-408 # 800211a8 + 8000b348: 00000013 addi x0,x0,0 + 8000b34c: 00000013 addi x0,x0,0 + 8000b350: 00000013 addi x0,x0,0 + 8000b354: 00000013 addi x0,x0,0 + 8000b358: 00000013 addi x0,x0,0 + 8000b35c: 00000013 addi x0,x0,0 + 8000b360: 0084a023 sw x8,0(x9) + 8000b364: 10a23c23 sd x10,280(x4) # 118 + 8000b368: 3500006f jal x0,8000b6b8 + +000000008000b36c : + 8000b36c: 00200413 addi x8,x0,2 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00016497 auipc x9,0x16 + 8000b384: e2848493 addi x9,x9,-472 # 800211a8 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 0084a023 sw x8,0(x9) + 8000b3a4: 10623c23 sd x6,280(x4) # 118 + 8000b3a8: 3100006f jal x0,8000b6b8 + +000000008000b3ac : + 8000b3ac: 0082e303 lwu x6,8(x5) + 8000b3b0: 00c2a383 lw x7,12(x5) + 8000b3b4: 02039393 slli x7,x7,0x20 + 8000b3b8: 00736333 or x6,x6,x7 + 8000b3bc: 00016817 auipc x16,0x16 + 8000b3c0: dfc80813 addi x16,x16,-516 # 800211b8 + 8000b3c4: 00683023 sd x6,0(x16) + 8000b3c8: 0002e303 lwu x6,0(x5) + 8000b3cc: 0042a383 lw x7,4(x5) + 8000b3d0: 02039393 slli x7,x7,0x20 + 8000b3d4: 00736333 or x6,x6,x7 + 8000b3d8: 10623423 sd x6,264(x4) # 108 + 8000b3dc: 00016817 auipc x16,0x16 + 8000b3e0: ddc80813 addi x16,x16,-548 # 800211b8 + 8000b3e4: 00083303 ld x6,0(x16) + 8000b3e8: 00016397 auipc x7,0x16 + 8000b3ec: 5a938393 addi x7,x7,1449 # 80021991 + 8000b3f0: 28730463 beq x6,x7,8000b678 + 8000b3f4: 00000413 addi x8,x0,0 + 8000b3f8: 00016817 auipc x16,0x16 + 8000b3fc: db880813 addi x16,x16,-584 # 800211b0 + 8000b400: 00882023 sw x8,0(x16) + 8000b404: 00016397 auipc x7,0x16 + 8000b408: 5a438393 addi x7,x7,1444 # 800219a8 + 8000b40c: 00731863 bne x6,x7,8000b41c + 8000b410: 00100413 addi x8,x0,1 + 8000b414: 00000493 addi x9,x0,0 + 8000b418: 2740006f jal x0,8000b68c + 8000b41c: 00016397 auipc x7,0x16 + 8000b420: 68e38393 addi x7,x7,1678 # 80021aaa + 8000b424: 00731863 bne x6,x7,8000b434 + 8000b428: 00200413 addi x8,x0,2 + 8000b42c: 00000493 addi x9,x0,0 + 8000b430: 25c0006f jal x0,8000b68c + 8000b434: 00016397 auipc x7,0x16 + 8000b438: 77138393 addi x7,x7,1905 # 80021ba5 + 8000b43c: 00731863 bne x6,x7,8000b44c + 8000b440: 00300413 addi x8,x0,3 + 8000b444: 00000493 addi x9,x0,0 + 8000b448: 2440006f jal x0,8000b68c + 8000b44c: 00017397 auipc x7,0x17 + 8000b450: 84c38393 addi x7,x7,-1972 # 80021c98 + 8000b454: 00731863 bne x6,x7,8000b464 + 8000b458: 00400413 addi x8,x0,4 + 8000b45c: 00000493 addi x9,x0,0 + 8000b460: 22c0006f jal x0,8000b68c + 8000b464: 00017397 auipc x7,0x17 + 8000b468: 9a738393 addi x7,x7,-1625 # 80021e0b + 8000b46c: 00731863 bne x6,x7,8000b47c + 8000b470: 00500413 addi x8,x0,5 + 8000b474: 00000493 addi x9,x0,0 + 8000b478: 2140006f jal x0,8000b68c + 8000b47c: 00017397 auipc x7,0x17 + 8000b480: 91338393 addi x7,x7,-1773 # 80021d8f + 8000b484: 00731863 bne x6,x7,8000b494 + 8000b488: 00600413 addi x8,x0,6 + 8000b48c: 00000493 addi x9,x0,0 + 8000b490: 1fc0006f jal x0,8000b68c + 8000b494: 00017397 auipc x7,0x17 + 8000b498: 93938393 addi x7,x7,-1735 # 80021dcd + 8000b49c: 00731863 bne x6,x7,8000b4ac + 8000b4a0: 00700413 addi x8,x0,7 + 8000b4a4: 00000493 addi x9,x0,0 + 8000b4a8: 1e40006f jal x0,8000b68c + 8000b4ac: 00016397 auipc x7,0x16 + 8000b4b0: 53c38393 addi x7,x7,1340 # 800219e8 + 8000b4b4: 00731863 bne x6,x7,8000b4c4 + 8000b4b8: 00100413 addi x8,x0,1 + 8000b4bc: 00100493 addi x9,x0,1 + 8000b4c0: 1cc0006f jal x0,8000b68c + 8000b4c4: 00016397 auipc x7,0x16 + 8000b4c8: 62438393 addi x7,x7,1572 # 80021ae8 + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00200413 addi x8,x0,2 + 8000b4d4: 00100493 addi x9,x0,1 + 8000b4d8: 1b40006f jal x0,8000b68c + 8000b4dc: 00016397 auipc x7,0x16 + 8000b4e0: 70538393 addi x7,x7,1797 # 80021be1 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00300413 addi x8,x0,3 + 8000b4ec: 00100493 addi x9,x0,1 + 8000b4f0: 19c0006f jal x0,8000b68c + 8000b4f4: 00016397 auipc x7,0x16 + 8000b4f8: 7e138393 addi x7,x7,2017 # 80021cd5 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00400413 addi x8,x0,4 + 8000b504: 00100493 addi x9,x0,1 + 8000b508: 1840006f jal x0,8000b68c + 8000b50c: 00017397 auipc x7,0x17 + 8000b510: 93a38393 addi x7,x7,-1734 # 80021e46 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00500413 addi x8,x0,5 + 8000b51c: 00100493 addi x9,x0,1 + 8000b520: 16c0006f jal x0,8000b68c + 8000b524: 00016397 auipc x7,0x16 + 8000b528: 50438393 addi x7,x7,1284 # 80021a28 + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00100413 addi x8,x0,1 + 8000b534: 00200493 addi x9,x0,2 + 8000b538: 1540006f jal x0,8000b68c + 8000b53c: 00016397 auipc x7,0x16 + 8000b540: 5ea38393 addi x7,x7,1514 # 80021b26 + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00200413 addi x8,x0,2 + 8000b54c: 00200493 addi x9,x0,2 + 8000b550: 13c0006f jal x0,8000b68c + 8000b554: 00016397 auipc x7,0x16 + 8000b558: 6c938393 addi x7,x7,1737 # 80021c1d + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00300413 addi x8,x0,3 + 8000b564: 00200493 addi x9,x0,2 + 8000b568: 1240006f jal x0,8000b68c + 8000b56c: 00016397 auipc x7,0x16 + 8000b570: 7a638393 addi x7,x7,1958 # 80021d12 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00400413 addi x8,x0,4 + 8000b57c: 00200493 addi x9,x0,2 + 8000b580: 10c0006f jal x0,8000b68c + 8000b584: 00017397 auipc x7,0x17 + 8000b588: 8fd38393 addi x7,x7,-1795 # 80021e81 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00500413 addi x8,x0,5 + 8000b594: 00200493 addi x9,x0,2 + 8000b598: 0f40006f jal x0,8000b68c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 4cd38393 addi x7,x7,1229 # 80021a69 + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00100413 addi x8,x0,1 + 8000b5ac: 00300493 addi x9,x0,3 + 8000b5b0: 0dc0006f jal x0,8000b68c + 8000b5b4: 00016397 auipc x7,0x16 + 8000b5b8: 5b138393 addi x7,x7,1457 # 80021b65 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00200413 addi x8,x0,2 + 8000b5c4: 00300493 addi x9,x0,3 + 8000b5c8: 0c40006f jal x0,8000b68c + 8000b5cc: 00016397 auipc x7,0x16 + 8000b5d0: 68e38393 addi x7,x7,1678 # 80021c5a + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00300413 addi x8,x0,3 + 8000b5dc: 00300493 addi x9,x0,3 + 8000b5e0: 0ac0006f jal x0,8000b68c + 8000b5e4: 00016397 auipc x7,0x16 + 8000b5e8: 76c38393 addi x7,x7,1900 # 80021d50 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00400413 addi x8,x0,4 + 8000b5f4: 00300493 addi x9,x0,3 + 8000b5f8: 0940006f jal x0,8000b68c + 8000b5fc: 00017397 auipc x7,0x17 + 8000b600: 8c138393 addi x7,x7,-1855 # 80021ebd + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00500413 addi x8,x0,5 + 8000b60c: 00300493 addi x9,x0,3 + 8000b610: 07c0006f jal x0,8000b68c + 8000b614: 00017397 auipc x7,0x17 + 8000b618: 8e638393 addi x7,x7,-1818 # 80021efa + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00800413 addi x8,x0,8 + 8000b624: 00000493 addi x9,x0,0 + 8000b628: 0640006f jal x0,8000b68c + 8000b62c: 00017397 auipc x7,0x17 + 8000b630: 91d38393 addi x7,x7,-1763 # 80021f49 + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00800413 addi x8,x0,8 + 8000b63c: 00000493 addi x9,x0,0 + 8000b640: 04c0006f jal x0,8000b68c + 8000b644: 00017397 auipc x7,0x17 + 8000b648: a0038393 addi x7,x7,-1536 # 80022044 + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00800413 addi x8,x0,8 + 8000b654: 00100493 addi x9,x0,1 + 8000b658: 0340006f jal x0,8000b68c + 8000b65c: 00017397 auipc x7,0x17 + 8000b660: ae438393 addi x7,x7,-1308 # 80022140 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00800413 addi x8,x0,8 + 8000b66c: 00200493 addi x9,x0,2 + 8000b670: 01c0006f jal x0,8000b68c + 8000b674: 0340006f jal x0,8000b6a8 + +000000008000b678 : + 8000b678: 00900413 addi x8,x0,9 + 8000b67c: 00016817 auipc x16,0x16 + 8000b680: b3480813 addi x16,x16,-1228 # 800211b0 + 8000b684: 00882023 sw x8,0(x16) + 8000b688: 0300006f jal x0,8000b6b8 + +000000008000b68c : + 8000b68c: 00016817 auipc x16,0x16 + 8000b690: b2480813 addi x16,x16,-1244 # 800211b0 + 8000b694: 00882023 sw x8,0(x16) + 8000b698: 00016817 auipc x16,0x16 + 8000b69c: b1c80813 addi x16,x16,-1252 # 800211b4 + 8000b6a0: 00982023 sw x9,0(x16) + 8000b6a4: 0140006f jal x0,8000b6b8 + +000000008000b6a8 : + 8000b6a8: 00016817 auipc x16,0x16 + 8000b6ac: b0880813 addi x16,x16,-1272 # 800211b0 + 8000b6b0: 00082023 sw x0,0(x16) + 8000b6b4: 0040006f jal x0,8000b6b8 + +000000008000b6b8 : + 8000b6b8: 0002e303 lwu x6,0(x5) + 8000b6bc: 0042a383 lw x7,4(x5) + 8000b6c0: 02039393 slli x7,x7,0x20 + 8000b6c4: 00736333 or x6,x6,x7 + 8000b6c8: 10623423 sd x6,264(x4) # 108 + 8000b6cc: 00035383 lhu x7,0(x6) + 8000b6d0: 0033f413 andi x8,x7,3 + 8000b6d4: 00300493 addi x9,x0,3 + 8000b6d8: 00941863 bne x8,x9,8000b6e8 + 8000b6dc: 00235403 lhu x8,2(x6) + 8000b6e0: 01041413 slli x8,x8,0x10 + 8000b6e4: 0083e3b3 or x7,x7,x8 + 8000b6e8: 10722023 sw x7,256(x4) # 100 + 8000b6ec: 0082e303 lwu x6,8(x5) + 8000b6f0: 00c2a383 lw x7,12(x5) + 8000b6f4: 02039393 slli x7,x7,0x20 + 8000b6f8: 00736333 or x6,x6,x7 + 8000b6fc: 12623023 sd x6,288(x4) # 120 + +000000008000b700 : + 8000b700: 00016517 auipc x10,0x16 + 8000b704: 0a150513 addi x10,x10,161 # 800217a1 + 8000b708: 00000013 addi x0,x0,0 + 8000b70c: 00000013 addi x0,x0,0 + 8000b710: 00000013 addi x0,x0,0 + 8000b714: 00000013 addi x0,x0,0 + 8000b718: 00000013 addi x0,x0,0 + 8000b71c: 00000013 addi x0,x0,0 + 8000b720: 00037097 auipc x1,0x37 + 8000b724: e84080e7 jalr x1,-380(x1) # 800425a4 + 8000b728: 00000013 addi x0,x0,0 + 8000b72c: 00000013 addi x0,x0,0 + 8000b730: 00000013 addi x0,x0,0 + 8000b734: 00000013 addi x0,x0,0 + 8000b738: 00000013 addi x0,x0,0 + 8000b73c: 00000013 addi x0,x0,0 + 8000b740: 00016517 auipc x10,0x16 + 8000b744: 09d50513 addi x10,x10,157 # 800217dd + 8000b748: 00000013 addi x0,x0,0 + 8000b74c: 00000013 addi x0,x0,0 + 8000b750: 00000013 addi x0,x0,0 + 8000b754: 00000013 addi x0,x0,0 + 8000b758: 00000013 addi x0,x0,0 + 8000b75c: 00000013 addi x0,x0,0 + 8000b760: 00037097 auipc x1,0x37 + 8000b764: e44080e7 jalr x1,-444(x1) # 800425a4 + +000000008000b768 : + 8000b768: 00000013 addi x0,x0,0 + 8000b76c: 00000013 addi x0,x0,0 + 8000b770: 00000013 addi x0,x0,0 + 8000b774: 00000013 addi x0,x0,0 + 8000b778: 00000013 addi x0,x0,0 + 8000b77c: 00000013 addi x0,x0,0 + 8000b780: 00016517 auipc x10,0x16 + 8000b784: 11450513 addi x10,x10,276 # 80021894 + 8000b788: 00000013 addi x0,x0,0 + 8000b78c: 00000013 addi x0,x0,0 + 8000b790: 00000013 addi x0,x0,0 + 8000b794: 00000013 addi x0,x0,0 + 8000b798: 00000013 addi x0,x0,0 + 8000b79c: 00000013 addi x0,x0,0 + 8000b7a0: 00037097 auipc x1,0x37 + 8000b7a4: e04080e7 jalr x1,-508(x1) # 800425a4 + +000000008000b7a8 : + 8000b7a8: 00016517 auipc x10,0x16 + 8000b7ac: 9f853503 ld x10,-1544(x10) # 800211a0 + 8000b7b0: 00037097 auipc x1,0x37 + 8000b7b4: df4080e7 jalr x1,-524(x1) # 800425a4 + +000000008000b7b8 : + 8000b7b8: 00000013 addi x0,x0,0 + 8000b7bc: 00000013 addi x0,x0,0 + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: 0e650513 addi x10,x10,230 # 800218a6 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00037097 auipc x1,0x37 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000b7e8: 00016517 auipc x10,0x16 + 8000b7ec: 89852503 lw x10,-1896(x10) # 80021080 + 8000b7f0: 00300593 addi x11,x0,3 + 8000b7f4: 52b50c63 beq x10,x11,8000bd2c + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: 0a850513 addi x10,x10,168 # 800218a8 + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00037097 auipc x1,0x37 + 8000b824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000b828: 00016517 auipc x10,0x16 + 8000b82c: 95852503 lw x10,-1704(x10) # 80021180 + 8000b830: 02000593 addi x11,x0,32 + 8000b834: 00357613 andi x12,x10,3 + 8000b838: 00300693 addi x13,x0,3 + 8000b83c: 00d60463 beq x12,x13,8000b844 + 8000b840: 01000593 addi x11,x0,16 + 8000b844: 3f4010ef jal x1,8000cc38 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00016517 auipc x10,0x16 + 8000b864: 98850513 addi x10,x10,-1656 # 800211e8 + 8000b868: 00000013 addi x0,x0,0 + 8000b86c: 00000013 addi x0,x0,0 + 8000b870: 00000013 addi x0,x0,0 + 8000b874: 00000013 addi x0,x0,0 + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00037097 auipc x1,0x37 + 8000b884: d24080e7 jalr x1,-732(x1) # 800425a4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00016517 auipc x10,0x16 + 8000b8a4: 01c50513 addi x10,x10,28 # 800218bc + 8000b8a8: 00000013 addi x0,x0,0 + 8000b8ac: 00000013 addi x0,x0,0 + 8000b8b0: 00000013 addi x0,x0,0 + 8000b8b4: 00000013 addi x0,x0,0 + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00037097 auipc x1,0x37 + 8000b8c4: ce4080e7 jalr x1,-796(x1) # 800425a4 + 8000b8c8: 00016517 auipc x10,0x16 + 8000b8cc: 8c053503 ld x10,-1856(x10) # 80021188 + 8000b8d0: 04000593 addi x11,x0,64 + 8000b8d4: 364010ef jal x1,8000cc38 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00016517 auipc x10,0x16 + 8000b8e4: 90850513 addi x10,x10,-1784 # 800211e8 + 8000b8e8: 00000013 addi x0,x0,0 + 8000b8ec: 00000013 addi x0,x0,0 + 8000b8f0: 00000013 addi x0,x0,0 + 8000b8f4: 00000013 addi x0,x0,0 + 8000b8f8: 00000013 addi x0,x0,0 + 8000b8fc: 00000013 addi x0,x0,0 + 8000b900: 00037097 auipc x1,0x37 + 8000b904: ca4080e7 jalr x1,-860(x1) # 800425a4 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00017517 auipc x10,0x17 + 8000b924: 9d350513 addi x10,x10,-1581 # 800222f3 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00037097 auipc x1,0x37 + 8000b944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000b948: 00015517 auipc x10,0x15 + 8000b94c: 73852503 lw x10,1848(x10) # 80021080 + 8000b950: 00050663 beq x10,x0,8000b95c + 8000b954: 00300593 addi x11,x0,3 + 8000b958: 04b51063 bne x10,x11,8000b998 + 8000b95c: 07800593 addi x11,x0,120 + 8000b960: 00016617 auipc x12,0x16 + 8000b964: 88860613 addi x12,x12,-1912 # 800211e8 + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00b60023 sb x11,0(x12) + 8000b984: 00160613 addi x12,x12,1 + 8000b988: 00015517 auipc x10,0x15 + 8000b98c: 7fc52503 lw x10,2044(x10) # 80021184 + 8000b990: 324010ef jal x1,8000ccb4 + 8000b994: 1180006f jal x0,8000baac + +000000008000b998 : + 8000b998: 00100593 addi x11,x0,1 + 8000b99c: 04b50863 beq x10,x11,8000b9ec + 8000b9a0: 00400593 addi x11,x0,4 + 8000b9a4: 08b50a63 beq x10,x11,8000ba38 + 8000b9a8: 00500593 addi x11,x0,5 + 8000b9ac: 0cb50463 beq x10,x11,8000ba74 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00017517 auipc x10,0x17 + 8000b9c4: a4950513 addi x10,x10,-1463 # 80022409 + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00037097 auipc x1,0x37 + 8000b9e4: bc4080e7 jalr x1,-1084(x1) # 800425a4 + 8000b9e8: 1000006f jal x0,8000bae8 + +000000008000b9ec : + 8000b9ec: 06600593 addi x11,x0,102 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00015617 auipc x12,0x15 + 8000ba04: 7e860613 addi x12,x12,2024 # 800211e8 + 8000ba08: 00000013 addi x0,x0,0 + 8000ba0c: 00000013 addi x0,x0,0 + 8000ba10: 00000013 addi x0,x0,0 + 8000ba14: 00000013 addi x0,x0,0 + 8000ba18: 00000013 addi x0,x0,0 + 8000ba1c: 00000013 addi x0,x0,0 + 8000ba20: 00b60023 sb x11,0(x12) + 8000ba24: 00160613 addi x12,x12,1 + 8000ba28: 00015517 auipc x10,0x15 + 8000ba2c: 75c52503 lw x10,1884(x10) # 80021184 + 8000ba30: 284010ef jal x1,8000ccb4 + 8000ba34: 0780006f jal x0,8000baac + +000000008000ba38 : + 8000ba38: 07600593 addi x11,x0,118 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00015617 auipc x12,0x15 + 8000ba44: 7a860613 addi x12,x12,1960 # 800211e8 + 8000ba48: 00000013 addi x0,x0,0 + 8000ba4c: 00000013 addi x0,x0,0 + 8000ba50: 00000013 addi x0,x0,0 + 8000ba54: 00000013 addi x0,x0,0 + 8000ba58: 00000013 addi x0,x0,0 + 8000ba5c: 00000013 addi x0,x0,0 + 8000ba60: 00b60023 sb x11,0(x12) + 8000ba64: 00160613 addi x12,x12,1 + 8000ba68: 00015517 auipc x10,0x15 + 8000ba6c: 71c52503 lw x10,1820(x10) # 80021184 + 8000ba70: 244010ef jal x1,8000ccb4 + +000000008000ba74 : + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00017517 auipc x10,0x17 + 8000ba84: 86c50513 addi x10,x10,-1940 # 800222ec + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00037097 auipc x1,0x37 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000baa8: 0400006f jal x0,8000bae8 + +000000008000baac : + 8000baac: 00000013 addi x0,x0,0 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00015517 auipc x10,0x15 + 8000bac4: 72850513 addi x10,x10,1832 # 800211e8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00037097 auipc x1,0x37 + 8000bae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + +000000008000bae8 : + 8000bae8: 00000013 addi x0,x0,0 + 8000baec: 00000013 addi x0,x0,0 + 8000baf0: 00000013 addi x0,x0,0 + 8000baf4: 00000013 addi x0,x0,0 + 8000baf8: 00000013 addi x0,x0,0 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00017517 auipc x10,0x17 + 8000bb04: 80450513 addi x10,x10,-2044 # 80022304 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00037097 auipc x1,0x37 + 8000bb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000bb28: 00015517 auipc x10,0x15 + 8000bb2c: 55852503 lw x10,1368(x10) # 80021080 + 8000bb30: 00100593 addi x11,x0,1 + 8000bb34: 00b51c63 bne x10,x11,8000bb4c + 8000bb38: 00015517 auipc x10,0x15 + 8000bb3c: 65853503 ld x10,1624(x10) # 80021190 + 8000bb40: 04000593 addi x11,x0,64 + 8000bb44: 0f4010ef jal x1,8000cc38 + 8000bb48: 0140006f jal x0,8000bb5c + +000000008000bb4c : + 8000bb4c: 00015517 auipc x10,0x15 + 8000bb50: 64453503 ld x10,1604(x10) # 80021190 + 8000bb54: 04000593 addi x11,x0,64 + 8000bb58: 0e0010ef jal x1,8000cc38 + +000000008000bb5c : + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00015517 auipc x10,0x15 + 8000bb64: 68850513 addi x10,x10,1672 # 800211e8 + 8000bb68: 00000013 addi x0,x0,0 + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00037097 auipc x1,0x37 + 8000bb84: a24080e7 jalr x1,-1500(x1) # 800425a4 + 8000bb88: 00015517 auipc x10,0x15 + 8000bb8c: 62052503 lw x10,1568(x10) # 800211a8 + 8000bb90: 08051e63 bne x10,x0,8000bc2c + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00016517 auipc x10,0x16 + 8000bba4: 77b50513 addi x10,x10,1915 # 8002231b + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00037097 auipc x1,0x37 + 8000bbc4: 9e4080e7 jalr x1,-1564(x1) # 800425a4 + 8000bbc8: 00015517 auipc x10,0x15 + 8000bbcc: 4b852503 lw x10,1208(x10) # 80021080 + 8000bbd0: 00100593 addi x11,x0,1 + 8000bbd4: 00b51c63 bne x10,x11,8000bbec + 8000bbd8: 00015517 auipc x10,0x15 + 8000bbdc: 5c053503 ld x10,1472(x10) # 80021198 + 8000bbe0: 04000593 addi x11,x0,64 + 8000bbe4: 054010ef jal x1,8000cc38 + 8000bbe8: 0140006f jal x0,8000bbfc + +000000008000bbec : + 8000bbec: 00015517 auipc x10,0x15 + 8000bbf0: 5ac53503 ld x10,1452(x10) # 80021198 + 8000bbf4: 04000593 addi x11,x0,64 + 8000bbf8: 040010ef jal x1,8000cc38 + +000000008000bbfc : + 8000bbfc: 00000013 addi x0,x0,0 + 8000bc00: 00015517 auipc x10,0x15 + 8000bc04: 5e850513 addi x10,x10,1512 # 800211e8 + 8000bc08: 00000013 addi x0,x0,0 + 8000bc0c: 00000013 addi x0,x0,0 + 8000bc10: 00000013 addi x0,x0,0 + 8000bc14: 00000013 addi x0,x0,0 + 8000bc18: 00000013 addi x0,x0,0 + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00037097 auipc x1,0x37 + 8000bc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000bc28: 5bd0006f jal x0,8000c9e4 + +000000008000bc2c : + 8000bc2c: 00100593 addi x11,x0,1 + 8000bc30: 06b51e63 bne x10,x11,8000bcac + +000000008000bc34 : + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00016517 auipc x10,0x16 + 8000bc44: 6f250513 addi x10,x10,1778 # 80022332 + 8000bc48: 00000013 addi x0,x0,0 + 8000bc4c: 00000013 addi x0,x0,0 + 8000bc50: 00000013 addi x0,x0,0 + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00037097 auipc x1,0x37 + 8000bc64: 944080e7 jalr x1,-1724(x1) # 800425a4 + 8000bc68: 00015517 auipc x10,0x15 + 8000bc6c: 53053503 ld x10,1328(x10) # 80021198 + 8000bc70: 02000593 addi x11,x0,32 + 8000bc74: 7c5000ef jal x1,8000cc38 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00015517 auipc x10,0x15 + 8000bc84: 56850513 addi x10,x10,1384 # 800211e8 + 8000bc88: 00000013 addi x0,x0,0 + 8000bc8c: 00000013 addi x0,x0,0 + 8000bc90: 00000013 addi x0,x0,0 + 8000bc94: 00000013 addi x0,x0,0 + 8000bc98: 00000013 addi x0,x0,0 + 8000bc9c: 00000013 addi x0,x0,0 + 8000bca0: 00037097 auipc x1,0x37 + 8000bca4: 904080e7 jalr x1,-1788(x1) # 800425a4 + 8000bca8: 53d0006f jal x0,8000c9e4 + +000000008000bcac : + 8000bcac: 00000013 addi x0,x0,0 + 8000bcb0: 00000013 addi x0,x0,0 + 8000bcb4: 00000013 addi x0,x0,0 + 8000bcb8: 00000013 addi x0,x0,0 + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00016517 auipc x10,0x16 + 8000bcc4: 6d050513 addi x10,x10,1744 # 80022390 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00037097 auipc x1,0x37 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000bce8: 00015517 auipc x10,0x15 + 8000bcec: 4b053503 ld x10,1200(x10) # 80021198 + 8000bcf0: 04000593 addi x11,x0,64 + 8000bcf4: 745000ef jal x1,8000cc38 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00015517 auipc x10,0x15 + 8000bd04: 4e850513 addi x10,x10,1256 # 800211e8 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00037097 auipc x1,0x37 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800425a4 + 8000bd28: 4bd0006f jal x0,8000c9e4 + +000000008000bd2c : + 8000bd2c: 00015417 auipc x8,0x15 + 8000bd30: 48442403 lw x8,1156(x8) # 800211b0 + 8000bd34: 00900493 addi x9,x0,9 + 8000bd38: 0a940c63 beq x8,x9,8000bdf0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00016517 auipc x10,0x16 + 8000bd44: 6f550513 addi x10,x10,1781 # 80022435 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00037097 auipc x1,0x37 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800425a4 + 8000bd68: 00000013 addi x0,x0,0 + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00016517 auipc x10,0x16 + 8000bd84: 6e150513 addi x10,x10,1761 # 80022461 + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00037097 auipc x1,0x37 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800425a4 + 8000bda8: 00015817 auipc x16,0x15 + 8000bdac: 41080813 addi x16,x16,1040 # 800211b8 + 8000bdb0: 00083503 ld x10,0(x16) + 8000bdb4: 00036097 auipc x1,0x36 + 8000bdb8: 7f0080e7 jalr x1,2032(x1) # 800425a4 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00016517 auipc x10,0x16 + 8000bdc4: ae650513 addi x10,x10,-1306 # 800218a6 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00036097 auipc x1,0x36 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 8000bde8: 280404e3 beq x8,x0,8000c870 + 8000bdec: 3400006f jal x0,8000c12c + +000000008000bdf0 : + 8000bdf0: 00000013 addi x0,x0,0 + 8000bdf4: 00000013 addi x0,x0,0 + 8000bdf8: 00000013 addi x0,x0,0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00016517 auipc x10,0x16 + 8000be04: 67150513 addi x10,x10,1649 # 80022471 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00036097 auipc x1,0x36 + 8000be24: 784080e7 jalr x1,1924(x1) # 800425a4 + 8000be28: 00015517 auipc x10,0x15 + 8000be2c: 37053503 ld x10,880(x10) # 80021198 + 8000be30: 04000593 addi x11,x0,64 + 8000be34: 605000ef jal x1,8000cc38 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00015517 auipc x10,0x15 + 8000be44: 3a850513 addi x10,x10,936 # 800211e8 + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00036097 auipc x1,0x36 + 8000be64: 744080e7 jalr x1,1860(x1) # 800425a4 + 8000be68: 00000013 addi x0,x0,0 + 8000be6c: 00000013 addi x0,x0,0 + 8000be70: 00000013 addi x0,x0,0 + 8000be74: 00000013 addi x0,x0,0 + 8000be78: 00000013 addi x0,x0,0 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00016517 auipc x10,0x16 + 8000be84: 61c50513 addi x10,x10,1564 # 8002249c + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00036097 auipc x1,0x36 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 8000bea8: 00015517 auipc x10,0x15 + 8000beac: 2e853503 ld x10,744(x10) # 80021190 + 8000beb0: 04000593 addi x11,x0,64 + 8000beb4: 585000ef jal x1,8000cc38 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00015517 auipc x10,0x15 + 8000bec4: 32850513 addi x10,x10,808 # 800211e8 + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00036097 auipc x1,0x36 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800425a4 + 8000bee8: 00015317 auipc x6,0x15 + 8000beec: 2a833303 ld x6,680(x6) # 80021190 + 8000bef0: 00015397 auipc x7,0x15 + 8000bef4: 2a83b383 ld x7,680(x7) # 80021198 + 8000bef8: 10736a63 bltu x6,x7,8000c00c + +000000008000befc : + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00016517 auipc x10,0x16 + 8000bf04: 5cb50513 addi x10,x10,1483 # 800224cb + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00036097 auipc x1,0x36 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800425a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00016517 auipc x10,0x16 + 8000bf44: 5f350513 addi x10,x10,1523 # 80022533 + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00036097 auipc x1,0x36 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800425a4 + 8000bf68: 00015317 auipc x6,0x15 + 8000bf6c: 22833303 ld x6,552(x6) # 80021190 + 8000bf70: 00015397 auipc x7,0x15 + 8000bf74: 2283b383 ld x7,552(x7) # 80021198 + 8000bf78: 40730533 sub x10,x6,x7 + 8000bf7c: 04000593 addi x11,x0,64 + 8000bf80: 4b9000ef jal x1,8000cc38 + 8000bf84: 00000013 addi x0,x0,0 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00015517 auipc x10,0x15 + 8000bfa4: 24850513 addi x10,x10,584 # 800211e8 + 8000bfa8: 00000013 addi x0,x0,0 + 8000bfac: 00000013 addi x0,x0,0 + 8000bfb0: 00000013 addi x0,x0,0 + 8000bfb4: 00000013 addi x0,x0,0 + 8000bfb8: 00000013 addi x0,x0,0 + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00036097 auipc x1,0x36 + 8000bfc4: 5e4080e7 jalr x1,1508(x1) # 800425a4 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00016517 auipc x10,0x16 + 8000bfe4: 57a50513 addi x10,x10,1402 # 8002255a + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00036097 auipc x1,0x36 + 8000c004: 5a4080e7 jalr x1,1444(x1) # 800425a4 + 8000c008: 1dd0006f jal x0,8000c9e4 + +000000008000c00c : + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00016517 auipc x10,0x16 + 8000c024: 4d750513 addi x10,x10,1239 # 800224f7 + 8000c028: 00000013 addi x0,x0,0 + 8000c02c: 00000013 addi x0,x0,0 + 8000c030: 00000013 addi x0,x0,0 + 8000c034: 00000013 addi x0,x0,0 + 8000c038: 00000013 addi x0,x0,0 + 8000c03c: 00000013 addi x0,x0,0 + 8000c040: 00036097 auipc x1,0x36 + 8000c044: 564080e7 jalr x1,1380(x1) # 800425a4 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00016517 auipc x10,0x16 + 8000c064: 4d350513 addi x10,x10,1235 # 80022533 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00036097 auipc x1,0x36 + 8000c084: 524080e7 jalr x1,1316(x1) # 800425a4 + 8000c088: 00015317 auipc x6,0x15 + 8000c08c: 11033303 ld x6,272(x6) # 80021198 + 8000c090: 00015397 auipc x7,0x15 + 8000c094: 1003b383 ld x7,256(x7) # 80021190 + 8000c098: 40730533 sub x10,x6,x7 + 8000c09c: 04000593 addi x11,x0,64 + 8000c0a0: 399000ef jal x1,8000cc38 + 8000c0a4: 00000013 addi x0,x0,0 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00015517 auipc x10,0x15 + 8000c0c4: 12850513 addi x10,x10,296 # 800211e8 + 8000c0c8: 00000013 addi x0,x0,0 + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00036097 auipc x1,0x36 + 8000c0e4: 4c4080e7 jalr x1,1220(x1) # 800425a4 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00016517 auipc x10,0x16 + 8000c104: 54250513 addi x10,x10,1346 # 80022642 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00036097 auipc x1,0x36 + 8000c124: 484080e7 jalr x1,1156(x1) # 800425a4 + 8000c128: 0bd0006f jal x0,8000c9e4 + +000000008000c12c : + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00016517 auipc x10,0x16 + 8000c144: 5e950513 addi x10,x10,1513 # 80022729 + 8000c148: 00000013 addi x0,x0,0 + 8000c14c: 00000013 addi x0,x0,0 + 8000c150: 00000013 addi x0,x0,0 + 8000c154: 00000013 addi x0,x0,0 + 8000c158: 00000013 addi x0,x0,0 + 8000c15c: 00000013 addi x0,x0,0 + 8000c160: 00036097 auipc x1,0x36 + 8000c164: 444080e7 jalr x1,1092(x1) # 800425a4 + 8000c168: 00015517 auipc x10,0x15 + 8000c16c: 04c52503 lw x10,76(x10) # 800211b4 + 8000c170: 04050a63 beq x10,x0,8000c1c4 + 8000c174: 00100593 addi x11,x0,1 + 8000c178: 08b50663 beq x10,x11,8000c204 + 8000c17c: 00200593 addi x11,x0,2 + 8000c180: 0cb50263 beq x10,x11,8000c244 + 8000c184: 00300593 addi x11,x0,3 + 8000c188: 0eb50e63 beq x10,x11,8000c284 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00016517 auipc x10,0x16 + 8000c1a4: 5c550513 addi x10,x10,1477 # 80022765 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 1000006f jal x0,8000c2c0 + +000000008000c1c4 : + 8000c1c4: 00000013 addi x0,x0,0 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00016517 auipc x10,0x16 + 8000c1e4: 56350513 addi x10,x10,1379 # 80022743 + 8000c1e8: 00000013 addi x0,x0,0 + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 0c00006f jal x0,8000c2c0 + +000000008000c204 : + 8000c204: 00000013 addi x0,x0,0 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00016517 auipc x10,0x16 + 8000c224: 52b50513 addi x10,x10,1323 # 8002274b + 8000c228: 00000013 addi x0,x0,0 + 8000c22c: 00000013 addi x0,x0,0 + 8000c230: 00000013 addi x0,x0,0 + 8000c234: 00000013 addi x0,x0,0 + 8000c238: 00000013 addi x0,x0,0 + 8000c23c: 00000013 addi x0,x0,0 + 8000c240: 0800006f jal x0,8000c2c0 + +000000008000c244 : + 8000c244: 00000013 addi x0,x0,0 + 8000c248: 00000013 addi x0,x0,0 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 4f350513 addi x10,x10,1267 # 80022753 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 0400006f jal x0,8000c2c0 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 4bc50513 addi x10,x10,1212 # 8002275c + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + +000000008000c2c0 : + 8000c2c0: 00036097 auipc x1,0x36 + 8000c2c4: 2e4080e7 jalr x1,740(x1) # 800425a4 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 48e50513 addi x10,x10,1166 # 8002276e + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 00036097 auipc x1,0x36 + 8000c304: 2a4080e7 jalr x1,676(x1) # 800425a4 + 8000c308: 00015517 auipc x10,0x15 + 8000c30c: ea852503 lw x10,-344(x10) # 800211b0 + 8000c310: 00100593 addi x11,x0,1 + 8000c314: 06b50863 beq x10,x11,8000c384 + 8000c318: 00200593 addi x11,x0,2 + 8000c31c: 0ab50463 beq x10,x11,8000c3c4 + 8000c320: 00300593 addi x11,x0,3 + 8000c324: 0eb50063 beq x10,x11,8000c404 + 8000c328: 00400593 addi x11,x0,4 + 8000c32c: 10b50c63 beq x10,x11,8000c444 + 8000c330: 00500593 addi x11,x0,5 + 8000c334: 14b50863 beq x10,x11,8000c484 + 8000c338: 00600593 addi x11,x0,6 + 8000c33c: 18b50463 beq x10,x11,8000c4c4 + 8000c340: 00700593 addi x11,x0,7 + 8000c344: 1cb50063 beq x10,x11,8000c504 + 8000c348: 00800593 addi x11,x0,8 + 8000c34c: 1eb50c63 beq x10,x11,8000c544 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00016517 auipc x10,0x16 + 8000c364: 56550513 addi x10,x10,1381 # 800228c5 + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + 8000c380: 2000006f jal x0,8000c580 + +000000008000c384 : + 8000c384: 00000013 addi x0,x0,0 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 3e850513 addi x10,x10,1000 # 80022788 + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 1c00006f jal x0,8000c580 + +000000008000c3c4 : + 8000c3c4: 00000013 addi x0,x0,0 + 8000c3c8: 00000013 addi x0,x0,0 + 8000c3cc: 00000013 addi x0,x0,0 + 8000c3d0: 00000013 addi x0,x0,0 + 8000c3d4: 00000013 addi x0,x0,0 + 8000c3d8: 00000013 addi x0,x0,0 + 8000c3dc: 00000013 addi x0,x0,0 + 8000c3e0: 00016517 auipc x10,0x16 + 8000c3e4: 3d950513 addi x10,x10,985 # 800227b9 + 8000c3e8: 00000013 addi x0,x0,0 + 8000c3ec: 00000013 addi x0,x0,0 + 8000c3f0: 00000013 addi x0,x0,0 + 8000c3f4: 00000013 addi x0,x0,0 + 8000c3f8: 00000013 addi x0,x0,0 + 8000c3fc: 00000013 addi x0,x0,0 + 8000c400: 1800006f jal x0,8000c580 + +000000008000c404 : + 8000c404: 00000013 addi x0,x0,0 + 8000c408: 00000013 addi x0,x0,0 + 8000c40c: 00000013 addi x0,x0,0 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 3b950513 addi x10,x10,953 # 800227d9 + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 1400006f jal x0,8000c580 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 39750513 addi x10,x10,919 # 800227f7 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1000006f jal x0,8000c580 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 37650513 addi x10,x10,886 # 80022816 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 0c00006f jal x0,8000c580 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 35e50513 addi x10,x10,862 # 8002283e + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 0800006f jal x0,8000c580 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 34a50513 addi x10,x10,842 # 8002286a + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 0400006f jal x0,8000c580 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 33650513 addi x10,x10,822 # 80022896 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + +000000008000c580 : + 8000c580: 00036097 auipc x1,0x36 + 8000c584: 024080e7 jalr x1,36(x1) # 800425a4 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 33450513 addi x10,x10,820 # 800228d4 + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 00036097 auipc x1,0x36 + 8000c5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000c5c8: 00015517 auipc x10,0x15 + 8000c5cc: bd053503 ld x10,-1072(x10) # 80021198 + 8000c5d0: 04000593 addi x11,x0,64 + 8000c5d4: 664000ef jal x1,8000cc38 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00015517 auipc x10,0x15 + 8000c5e4: c0850513 addi x10,x10,-1016 # 800211e8 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 00036097 auipc x1,0x36 + 8000c604: fa4080e7 jalr x1,-92(x1) # 800425a4 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 2cb50513 addi x10,x10,715 # 800228eb + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + 8000c640: 00036097 auipc x1,0x36 + 8000c644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000c648: 00015517 auipc x10,0x15 + 8000c64c: b4853503 ld x10,-1208(x10) # 80021190 + 8000c650: 04000593 addi x11,x0,64 + 8000c654: 5e4000ef jal x1,8000cc38 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00015517 auipc x10,0x15 + 8000c664: b8850513 addi x10,x10,-1144 # 800211e8 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00036097 auipc x1,0x36 + 8000c684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: b2852503 lw x10,-1240(x10) # 800211b0 + 8000c690: 00200593 addi x11,x0,2 + 8000c694: 08b51463 bne x10,x11,8000c71c + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00016517 auipc x10,0x16 + 8000c6a4: 26250513 addi x10,x10,610 # 80022902 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00036097 auipc x1,0x36 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800425a4 + 8000c6c8: 00015517 auipc x10,0x15 + 8000c6cc: ad053503 ld x10,-1328(x10) # 80021198 + 8000c6d0: 284000ef jal x1,8000c954 + 8000c6d4: 00036097 auipc x1,0x36 + 8000c6d8: ed0080e7 jalr x1,-304(x1) # 800425a4 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 23950513 addi x10,x10,569 # 80022919 + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00036097 auipc x1,0x36 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800425a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: a8853503 ld x10,-1400(x10) # 80021190 + 8000c710: 244000ef jal x1,8000c954 + 8000c714: 00036097 auipc x1,0x36 + 8000c718: e90080e7 jalr x1,-368(x1) # 800425a4 + +000000008000c71c : + 8000c71c: 00000097 auipc x1,0x0 + 8000c720: 314080e7 jalr x1,788(x1) # 8000ca30 + 8000c724: 00015517 auipc x10,0x15 + 8000c728: a8c52503 lw x10,-1396(x10) # 800211b0 + 8000c72c: 00100593 addi x11,x0,1 + 8000c730: 02b51e63 bne x10,x11,8000c76c + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00016517 auipc x10,0x16 + 8000c744: 24f50513 addi x10,x10,591 # 8002298f + 8000c748: 00000013 addi x0,x0,0 + 8000c74c: 00000013 addi x0,x0,0 + 8000c750: 00000013 addi x0,x0,0 + 8000c754: 00000013 addi x0,x0,0 + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00036097 auipc x1,0x36 + 8000c764: e44080e7 jalr x1,-444(x1) # 800425a4 + 8000c768: 27c0006f jal x0,8000c9e4 + 8000c76c: 00200593 addi x11,x0,2 + 8000c770: 02b51e63 bne x10,x11,8000c7ac + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00016517 auipc x10,0x16 + 8000c784: 2e550513 addi x10,x10,741 # 80022a65 + 8000c788: 00000013 addi x0,x0,0 + 8000c78c: 00000013 addi x0,x0,0 + 8000c790: 00000013 addi x0,x0,0 + 8000c794: 00000013 addi x0,x0,0 + 8000c798: 00000013 addi x0,x0,0 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00036097 auipc x1,0x36 + 8000c7a4: e04080e7 jalr x1,-508(x1) # 800425a4 + 8000c7a8: 23c0006f jal x0,8000c9e4 + 8000c7ac: 00300593 addi x11,x0,3 + 8000c7b0: 02b51e63 bne x10,x11,8000c7ec + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00016517 auipc x10,0x16 + 8000c7c4: 39850513 addi x10,x10,920 # 80022b58 + 8000c7c8: 00000013 addi x0,x0,0 + 8000c7cc: 00000013 addi x0,x0,0 + 8000c7d0: 00000013 addi x0,x0,0 + 8000c7d4: 00000013 addi x0,x0,0 + 8000c7d8: 00000013 addi x0,x0,0 + 8000c7dc: 00000013 addi x0,x0,0 + 8000c7e0: 00036097 auipc x1,0x36 + 8000c7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000c7e8: 1fc0006f jal x0,8000c9e4 + 8000c7ec: 00400593 addi x11,x0,4 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: 45350513 addi x10,x10,1107 # 80022c53 + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00036097 auipc x1,0x36 + 8000c824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000c828: 1bc0006f jal x0,8000c9e4 + 8000c82c: 00500593 addi x11,x0,5 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 4fa50513 addi x10,x10,1274 # 80022d3a + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00036097 auipc x1,0x36 + 8000c864: d44080e7 jalr x1,-700(x1) # 800425a4 + 8000c868: 17c0006f jal x0,8000c9e4 + 8000c86c: 1780006f jal x0,8000c9e4 + +000000008000c870 : + 8000c870: 00000013 addi x0,x0,0 + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 0c750513 addi x10,x10,199 # 80022947 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00036097 auipc x1,0x36 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000c8a8: 00015617 auipc x12,0x15 + 8000c8ac: 92063603 ld x12,-1760(x12) # 800211c8 + 8000c8b0: 00000013 addi x0,x0,0 + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00015517 auipc x10,0x15 + 8000c8c4: 07050513 addi x10,x10,112 # 80021930 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00036097 auipc x1,0x36 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000c8e8: 00065503 lhu x10,0(x12) + 8000c8ec: 01000593 addi x11,x0,16 + 8000c8f0: 00357413 andi x8,x10,3 + 8000c8f4: 00300493 addi x9,x0,3 + 8000c8f8: 00941a63 bne x8,x9,8000c90c + 8000c8fc: 00265403 lhu x8,2(x12) + 8000c900: 01041413 slli x8,x8,0x10 + 8000c904: 00856533 or x10,x10,x8 + 8000c908: 02000593 addi x11,x0,32 + 8000c90c: 32c000ef jal x1,8000cc38 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00015517 auipc x10,0x15 + 8000c924: 8c850513 addi x10,x10,-1848 # 800211e8 + 8000c928: 00000013 addi x0,x0,0 + 8000c92c: 00000013 addi x0,x0,0 + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00036097 auipc x1,0x36 + 8000c944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000c948: 00000097 auipc x1,0x0 + 8000c94c: 0e8080e7 jalr x1,232(x1) # 8000ca30 + 8000c950: 0940006f jal x0,8000c9e4 + +000000008000c954 : + 8000c954: 02054463 blt x10,x0,8000c97c + +000000008000c958 : + 8000c958: 01800593 addi x11,x0,24 + 8000c95c: 04b55863 bge x10,x11,8000c9ac + 8000c960: 00015597 auipc x11,0x15 + 8000c964: 8b058593 addi x11,x11,-1872 # 80021210 + 8000c968: 00251613 slli x12,x10,0x2 + 8000c96c: 00351613 slli x12,x10,0x3 + 8000c970: 00c585b3 add x11,x11,x12 + 8000c974: 0005b503 ld x10,0(x11) + 8000c978: 00008067 jalr x0,0(x1) + +000000008000c97c : + 8000c97c: 00100593 addi x11,x0,1 + 8000c980: 03f59593 slli x11,x11,0x3f + 8000c984: 00b54533 xor x10,x10,x11 + 8000c988: 01000593 addi x11,x0,16 + 8000c98c: 02b55063 bge x10,x11,8000c9ac + 8000c990: 00015597 auipc x11,0x15 + 8000c994: 94058593 addi x11,x11,-1728 # 800212d0 + 8000c998: 00251613 slli x12,x10,0x2 + 8000c99c: 00351613 slli x12,x10,0x3 + 8000c9a0: 00c585b3 add x11,x11,x12 + 8000c9a4: 0005b503 ld x10,0(x11) + 8000c9a8: 00008067 jalr x0,0(x1) + +000000008000c9ac : + 8000c9ac: 00000013 addi x0,x0,0 + 8000c9b0: 00000013 addi x0,x0,0 + 8000c9b4: 00000013 addi x0,x0,0 + 8000c9b8: 00000013 addi x0,x0,0 + 8000c9bc: 00000013 addi x0,x0,0 + 8000c9c0: 00015517 auipc x10,0x15 + 8000c9c4: d8e50513 addi x10,x10,-626 # 8002174e + 8000c9c8: 00000013 addi x0,x0,0 + 8000c9cc: 00000013 addi x0,x0,0 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00008067 jalr x0,0(x1) + +000000008000c9e4 : + 8000c9e4: 00000013 addi x0,x0,0 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00016517 auipc x10,0x16 + 8000ca04: 9e850513 addi x10,x10,-1560 # 800223e8 + 8000ca08: 00000013 addi x0,x0,0 + 8000ca0c: 00000013 addi x0,x0,0 + 8000ca10: 00000013 addi x0,x0,0 + 8000ca14: 00000013 addi x0,x0,0 + 8000ca18: 00000013 addi x0,x0,0 + 8000ca1c: 00000013 addi x0,x0,0 + 8000ca20: 00036097 auipc x1,0x36 + 8000ca24: b84080e7 jalr x1,-1148(x1) # 800425a4 + +000000008000ca28 : + 8000ca28: 00036097 auipc x1,0x36 + 8000ca2c: bdc080e7 jalr x1,-1060(x1) # 80042604 + +000000008000ca30 : + 8000ca30: 00014617 auipc x12,0x14 + 8000ca34: 79060613 addi x12,x12,1936 # 800211c0 + 8000ca38: 00163023 sd x1,0(x12) + 8000ca3c: 00000013 addi x0,x0,0 + 8000ca40: 00015517 auipc x10,0x15 + 8000ca44: f1150513 addi x10,x10,-239 # 80021951 + 8000ca48: 00000013 addi x0,x0,0 + 8000ca4c: 00000013 addi x0,x0,0 + 8000ca50: 00000013 addi x0,x0,0 + 8000ca54: 00000013 addi x0,x0,0 + 8000ca58: 00000013 addi x0,x0,0 + 8000ca5c: 00000013 addi x0,x0,0 + 8000ca60: 00036097 auipc x1,0x36 + 8000ca64: b44080e7 jalr x1,-1212(x1) # 800425a4 + 8000ca68: 00014517 auipc x10,0x14 + 8000ca6c: 76053503 ld x10,1888(x10) # 800211c8 + 8000ca70: 04000593 addi x11,x0,64 + 8000ca74: 1c4000ef jal x1,8000cc38 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00014517 auipc x10,0x14 + 8000ca84: 76850513 addi x10,x10,1896 # 800211e8 + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00036097 auipc x1,0x36 + 8000caa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: ea150513 addi x10,x10,-351 # 80021961 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00036097 auipc x1,0x36 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + 8000cae8: 00014517 auipc x10,0x14 + 8000caec: 6e853503 ld x10,1768(x10) # 800211d0 + 8000caf0: 04000593 addi x11,x0,64 + 8000caf4: 144000ef jal x1,8000cc38 + 8000caf8: 00000013 addi x0,x0,0 + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00014517 auipc x10,0x14 + 8000cb04: 6e850513 addi x10,x10,1768 # 800211e8 + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00036097 auipc x1,0x36 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000cb28: 00000013 addi x0,x0,0 + 8000cb2c: 00000013 addi x0,x0,0 + 8000cb30: 00000013 addi x0,x0,0 + 8000cb34: 00000013 addi x0,x0,0 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00015517 auipc x10,0x15 + 8000cb44: e3150513 addi x10,x10,-463 # 80021971 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00036097 auipc x1,0x36 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000cb68: 00014517 auipc x10,0x14 + 8000cb6c: 67053503 ld x10,1648(x10) # 800211d8 + 8000cb70: 04000593 addi x11,x0,64 + 8000cb74: 0c4000ef jal x1,8000cc38 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00014517 auipc x10,0x14 + 8000cb84: 66850513 addi x10,x10,1640 # 800211e8 + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00036097 auipc x1,0x36 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + 8000cba8: 00000013 addi x0,x0,0 + 8000cbac: 00000013 addi x0,x0,0 + 8000cbb0: 00000013 addi x0,x0,0 + 8000cbb4: 00000013 addi x0,x0,0 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00015517 auipc x10,0x15 + 8000cbc4: dc150513 addi x10,x10,-575 # 80021981 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00036097 auipc x1,0x36 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000cbe8: 00014517 auipc x10,0x14 + 8000cbec: 5f853503 ld x10,1528(x10) # 800211e0 + 8000cbf0: 04000593 addi x11,x0,64 + 8000cbf4: 044000ef jal x1,8000cc38 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00014517 auipc x10,0x14 + 8000cc04: 5e850513 addi x10,x10,1512 # 800211e8 + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00036097 auipc x1,0x36 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000cc28: 00014617 auipc x12,0x14 + 8000cc2c: 59860613 addi x12,x12,1432 # 800211c0 + 8000cc30: 00063083 ld x1,0(x12) + 8000cc34: 00008067 jalr x0,0(x1) + +000000008000cc38 : + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00014617 auipc x12,0x14 + 8000cc44: 5a860613 addi x12,x12,1448 # 800211e8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 03000693 addi x13,x0,48 + 8000cc64: 00d60023 sb x13,0(x12) + 8000cc68: 07800693 addi x13,x0,120 + 8000cc6c: 00d600a3 sb x13,1(x12) + 8000cc70: 00260613 addi x12,x12,2 + 8000cc74: 00058693 addi x13,x11,0 + +000000008000cc78 : + 8000cc78: ffc68693 addi x13,x13,-4 + 8000cc7c: 00d55733 srl x14,x10,x13 + 8000cc80: 00f77713 andi x14,x14,15 + 8000cc84: 00a00793 addi x15,x0,10 + 8000cc88: 00f74663 blt x14,x15,8000cc94 + 8000cc8c: 05770713 addi x14,x14,87 + 8000cc90: 0080006f jal x0,8000cc98 + +000000008000cc94 : + 8000cc94: 03070713 addi x14,x14,48 + +000000008000cc98 : + 8000cc98: 00e60023 sb x14,0(x12) + 8000cc9c: 00160613 addi x12,x12,1 + 8000cca0: fc069ce3 bne x13,x0,8000cc78 + 8000cca4: 00a00693 addi x13,x0,10 + 8000cca8: 00d60023 sb x13,0(x12) + 8000ccac: 000600a3 sb x0,1(x12) + 8000ccb0: 00008067 jalr x0,0(x1) + +000000008000ccb4 : + 8000ccb4: 00a00693 addi x13,x0,10 + 8000ccb8: 02d54663 blt x10,x13,8000cce4 + 8000ccbc: ff650513 addi x10,x10,-10 + 8000ccc0: 03100713 addi x14,x0,49 + 8000ccc4: 00d54c63 blt x10,x13,8000ccdc + 8000ccc8: ff650513 addi x10,x10,-10 + 8000cccc: 03200713 addi x14,x0,50 + 8000ccd0: 00d54663 blt x10,x13,8000ccdc + 8000ccd4: ff650513 addi x10,x10,-10 + 8000ccd8: 03300713 addi x14,x0,51 + 8000ccdc: 00e60023 sb x14,0(x12) + 8000cce0: 00160613 addi x12,x12,1 + 8000cce4: 03050513 addi x10,x10,48 + 8000cce8: 00a60023 sb x10,0(x12) + 8000ccec: 00a00693 addi x13,x0,10 + 8000ccf0: 00d600a3 sb x13,1(x12) + 8000ccf4: 00060123 sb x0,2(x12) + 8000ccf8: 00008067 jalr x0,0(x1) + 8000ccfc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080042000 : + 80042000: 10010737 lui x14,0x10010 + 80042004: 00072023 sw x0,0(x14) # 10010000 + 80042008: fffc9397 auipc x7,0xfffc9 + 8004200c: bf038393 addi x7,x7,-1040 # 8000abf8 + 80042010: 00038067 jalr x0,0(x7) + +0000000080042014 : + 80042014: fff00713 addi x14,x0,-1 + 80042018: 100143b7 lui x7,0x10014 + 8004201c: 00e3b023 sd x14,0(x7) # 10014000 + 80042020: fffc9397 auipc x7,0xfffc9 + 80042024: bd838393 addi x7,x7,-1064 # 8000abf8 + 80042028: 00038067 jalr x0,0(x7) + +000000008004202c : + 8004202c: 10000737 lui x14,0x10000 + 80042030: 0107071b addiw x14,x14,16 # 10000010 + 80042034: 00070023 sb x0,0(x14) + 80042038: fffc9397 auipc x7,0xfffc9 + 8004203c: bc038393 addi x7,x7,-1088 # 8000abf8 + 80042040: 00038067 jalr x0,0(x7) + +0000000080042044 : + 80042044: 00200393 addi x7,x0,2 + 80042048: 3443b073 csrrc x0,mip,x7 + 8004204c: fffc9397 auipc x7,0xfffc9 + 80042050: bac38393 addi x7,x7,-1108 # 8000abf8 + 80042054: 00038067 jalr x0,0(x7) + +0000000080042058 : + 80042058: fffc9397 auipc x7,0xfffc9 + 8004205c: ba038393 addi x7,x7,-1120 # 8000abf8 + 80042060: 00038067 jalr x0,0(x7) + +0000000080042064 : + 80042064: 20000413 addi x8,x0,512 + 80042068: 34443073 csrrc x0,mip,x8 + 8004206c: 34402473 csrrs x8,mip,x0 + 80042070: 00001337 lui x6,0x1 + 80042074: 8003031b addiw x6,x6,-2048 # 800 + 80042078: 00647433 and x8,x8,x6 + 8004207c: 00830863 beq x6,x8,8004208c + 80042080: 10000737 lui x14,0x10000 + 80042084: 0187071b addiw x14,x14,24 # 10000018 + 80042088: 00070023 sb x0,0(x14) + 8004208c: fffc9397 auipc x7,0xfffc9 + 80042090: b6c38393 addi x7,x7,-1172 # 8000abf8 + 80042094: 00038067 jalr x0,0(x7) + +0000000080042098 : + 80042098: fffc8317 auipc x6,0xfffc8 + 8004209c: c8430313 addi x6,x6,-892 # 80009d1c + 800420a0: 00030067 jalr x0,0(x6) + 800420a4: fffc9397 auipc x7,0xfffc9 + 800420a8: b5438393 addi x7,x7,-1196 # 8000abf8 + 800420ac: 00038067 jalr x0,0(x7) + +00000000800420b0 : + 800420b0: fffc8317 auipc x6,0xfffc8 + 800420b4: c6c30313 addi x6,x6,-916 # 80009d1c + 800420b8: 00030067 jalr x0,0(x6) + 800420bc: fffc9397 auipc x7,0xfffc9 + 800420c0: b3c38393 addi x7,x7,-1220 # 8000abf8 + 800420c4: 00038067 jalr x0,0(x7) + +00000000800420c8 : + 800420c8: fffc8317 auipc x6,0xfffc8 + 800420cc: c5430313 addi x6,x6,-940 # 80009d1c + 800420d0: 00030067 jalr x0,0(x6) + 800420d4: fffc9397 auipc x7,0xfffc9 + 800420d8: b2438393 addi x7,x7,-1244 # 8000abf8 + 800420dc: 00038067 jalr x0,0(x7) + +00000000800420e0 : + 800420e0: 30401073 csrrw x0,mie,x0 + 800420e4: 34401073 csrrw x0,mip,x0 + 800420e8: 34101073 csrrw x0,mepc,x0 + 800420ec: 34301073 csrrw x0,mtval,x0 + 800420f0: 34201073 csrrw x0,mcause,x0 + 800420f4: 00000013 addi x0,x0,0 + 800420f8: 00000013 addi x0,x0,0 + 800420fc: 00000013 addi x0,x0,0 + 80042100: fffce317 auipc x6,0xfffce + 80042104: 01030313 addi x6,x6,16 # 80010110 + 80042108: 00000013 addi x0,x0,0 + 8004210c: 00000013 addi x0,x0,0 + 80042110: 00000013 addi x0,x0,0 + 80042114: 00000013 addi x0,x0,0 + 80042118: 00000013 addi x0,x0,0 + 8004211c: 00000013 addi x0,x0,0 + +0000000080042120 : + 80042120: 34031473 csrrw x8,mscratch,x6 + 80042124: 2c833823 sd x8,720(x6) + +0000000080042128 : + 80042128: fff00393 addi x7,x0,-1 + 8004212c: 000044b7 lui x9,0x4 + 80042130: 00548493 addi x9,x9,5 # 4005 + 80042134: 00e49493 slli x9,x9,0xe + 80042138: 0074b023 sd x7,0(x9) + 8004213c: 00000013 addi x0,x0,0 + +0000000080042140 : + 80042140: 00000393 addi x7,x0,0 + 80042144: 2a733c23 sd x7,696(x6) + +0000000080042148 : + 80042148: 30502473 csrrs x8,mtvec,x0 + 8004214c: 2c833423 sd x8,712(x6) + 80042150: 00347393 andi x7,x8,3 + 80042154: ffc3f393 andi x7,x7,-4 + 80042158: 2b033483 ld x9,688(x6) + 8004215c: da848493 addi x9,x9,-600 + 80042160: 0074e3b3 or x7,x9,x7 + 80042164: 2c733023 sd x7,704(x6) + 80042168: 30539073 csrrw x0,mtvec,x7 + 8004216c: 30502773 csrrs x14,mtvec,x0 + 80042170: 0e770a63 beq x14,x7,80042264 + 80042174: 30541073 csrrw x0,mtvec,x8 + 80042178: 0a040663 beq x8,x0,80042224 + 8004217c: 2c833023 sd x8,704(x6) + +0000000080042180 : + 80042180: ffc47393 andi x7,x8,-4 + 80042184: 25838413 addi x8,x7,600 + 80042188: 00030113 addi x2,x6,0 + 8004218c: 00000013 addi x0,x0,0 + 80042190: 00000013 addi x0,x0,0 + 80042194: 00000013 addi x0,x0,0 + 80042198: 00000013 addi x0,x0,0 + 8004219c: 00000013 addi x0,x0,0 + 800421a0: 00000717 auipc x14,0x0 + 800421a4: 04c70713 addi x14,x14,76 # 800421ec + 800421a8: 00000013 addi x0,x0,0 + 800421ac: 00000013 addi x0,x0,0 + 800421b0: 00000013 addi x0,x0,0 + 800421b4: 00000013 addi x0,x0,0 + 800421b8: 00000013 addi x0,x0,0 + 800421bc: 00000013 addi x0,x0,0 + 800421c0: 00000797 auipc x15,0x0 + 800421c4: 0a478793 addi x15,x15,164 # 80042264 + 800421c8: 00000013 addi x0,x0,0 + 800421cc: 00000013 addi x0,x0,0 + 800421d0: 00000013 addi x0,x0,0 + 800421d4: 00000013 addi x0,x0,0 + 800421d8: 00000013 addi x0,x0,0 + 800421dc: 00000013 addi x0,x0,0 + 800421e0: 00f3f663 bgeu x7,x15,800421ec + 800421e4: 00877463 bgeu x14,x8,800421ec + 800421e8: 03c0006f jal x0,80042224 + +00000000800421ec : + 800421ec: 0003a783 lw x15,0(x7) + 800421f0: 00f32023 sw x15,0(x6) + 800421f4: 0004a703 lw x14,0(x9) + 800421f8: 00e3a023 sw x14,0(x7) + 800421fc: 0003a783 lw x15,0(x7) + 80042200: 00e79a63 bne x15,x14,80042214 + 80042204: 00438393 addi x7,x7,4 + 80042208: 00430313 addi x6,x6,4 + 8004220c: 00448493 addi x9,x9,4 + 80042210: fc741ee3 bne x8,x7,800421ec + +0000000080042214 : + 80042214: 0000100f fence.i + 80042218: 34002373 csrrs x6,mscratch,x0 + 8004221c: 2a933823 sd x9,688(x6) + 80042220: 04740263 beq x8,x7,80042264 + +0000000080042224 : + 80042224: 00038413 addi x8,x7,0 + 80042228: 00000013 addi x0,x0,0 + 8004222c: 00000013 addi x0,x0,0 + 80042230: 00000013 addi x0,x0,0 + 80042234: 00000013 addi x0,x0,0 + 80042238: 00000013 addi x0,x0,0 + 8004223c: 00000013 addi x0,x0,0 + 80042240: fffc8797 auipc x15,0xfffc8 + 80042244: aec78793 addi x15,x15,-1300 # 80009d2c + 80042248: 00000013 addi x0,x0,0 + 8004224c: 00000013 addi x0,x0,0 + 80042250: 00000013 addi x0,x0,0 + 80042254: 00000013 addi x0,x0,0 + 80042258: 00000013 addi x0,x0,0 + 8004225c: 00000013 addi x0,x0,0 + 80042260: 00078067 jalr x0,0(x15) + +0000000080042264 : + 80042264: 00000013 addi x0,x0,0 + +0000000080042268 : + 80042268: 005002b7 lui x5,0x500 + 8004226c: 0012829b addiw x5,x5,1 # 500001 + 80042270: 00d29293 slli x5,x5,0xd + 80042274: 80028293 addi x5,x5,-2048 + 80042278: 30029073 csrrw x0,mstatus,x5 + 8004227c: 32001073 csrrw x0,mcountinhibit,x0 + 80042280: 32301073 csrrw x0,mhpmevent3,x0 + 80042284: 32401073 csrrw x0,mhpmevent4,x0 + 80042288: 32501073 csrrw x0,mhpmevent5,x0 + 8004228c: 32601073 csrrw x0,mhpmevent6,x0 + 80042290: 32701073 csrrw x0,mhpmevent7,x0 + 80042294: 32801073 csrrw x0,mhpmevent8,x0 + 80042298: 32901073 csrrw x0,mhpmevent9,x0 + 8004229c: 32a01073 csrrw x0,mhpmevent10,x0 + 800422a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800422a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800422a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800422ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800422b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800422b4: 33001073 csrrw x0,mhpmevent16,x0 + 800422b8: 33101073 csrrw x0,mhpmevent17,x0 + 800422bc: 33201073 csrrw x0,mhpmevent18,x0 + 800422c0: 33301073 csrrw x0,mhpmevent19,x0 + 800422c4: 33401073 csrrw x0,mhpmevent20,x0 + 800422c8: 33501073 csrrw x0,mhpmevent21,x0 + 800422cc: 33601073 csrrw x0,mhpmevent22,x0 + 800422d0: 33701073 csrrw x0,mhpmevent23,x0 + 800422d4: 33801073 csrrw x0,mhpmevent24,x0 + 800422d8: 33901073 csrrw x0,mhpmevent25,x0 + 800422dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800422e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800422e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800422e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800422ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800422f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800422f4: 00000013 addi x0,x0,0 + 800422f8: 00000013 addi x0,x0,0 + 800422fc: 00000013 addi x0,x0,0 + 80042300: fffce317 auipc x6,0xfffce + 80042304: e0830313 addi x6,x6,-504 # 80010108 + 80042308: 00000013 addi x0,x0,0 + 8004230c: 00000013 addi x0,x0,0 + 80042310: 00000013 addi x0,x0,0 + 80042314: 00000013 addi x0,x0,0 + 80042318: 00000013 addi x0,x0,0 + 8004231c: 00000013 addi x0,x0,0 + 80042320: 00033023 sd x0,0(x6) + +0000000080042324 : + 80042324: feedc0b7 lui x1,0xfeedc + 80042328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004232c: 00b09093 slli x1,x1,0xb + 80042330: 7f708093 addi x1,x1,2039 + 80042334: 00b09093 slli x1,x1,0xb + 80042338: 36f08093 addi x1,x1,879 + 8004233c: 00a09093 slli x1,x1,0xa + 80042340: 2ad08093 addi x1,x1,685 + 80042344: 03909793 slli x15,x1,0x39 + 80042348: 0070d113 srli x2,x1,0x7 + 8004234c: 00f16133 or x2,x2,x15 + 80042350: 03911793 slli x15,x2,0x39 + 80042354: 00715193 srli x3,x2,0x7 + 80042358: 00f1e1b3 or x3,x3,x15 + 8004235c: 03919793 slli x15,x3,0x39 + 80042360: 0071d213 srli x4,x3,0x7 + 80042364: 00f26233 or x4,x4,x15 + 80042368: 03921793 slli x15,x4,0x39 + 8004236c: 00725293 srli x5,x4,0x7 + 80042370: 00f2e2b3 or x5,x5,x15 + 80042374: 03929793 slli x15,x5,0x39 + 80042378: 0072d313 srli x6,x5,0x7 + 8004237c: 00f36333 or x6,x6,x15 + 80042380: 03931793 slli x15,x6,0x39 + 80042384: 00735393 srli x7,x6,0x7 + 80042388: 00f3e3b3 or x7,x7,x15 + 8004238c: 03939793 slli x15,x7,0x39 + 80042390: 0073d413 srli x8,x7,0x7 + 80042394: 00f46433 or x8,x8,x15 + 80042398: 03941793 slli x15,x8,0x39 + 8004239c: 00745493 srli x9,x8,0x7 + 800423a0: 00f4e4b3 or x9,x9,x15 + 800423a4: 03949793 slli x15,x9,0x39 + 800423a8: 0074d513 srli x10,x9,0x7 + 800423ac: 00f56533 or x10,x10,x15 + 800423b0: 03951793 slli x15,x10,0x39 + 800423b4: 00755593 srli x11,x10,0x7 + 800423b8: 00f5e5b3 or x11,x11,x15 + 800423bc: 03959793 slli x15,x11,0x39 + 800423c0: 0075d613 srli x12,x11,0x7 + 800423c4: 00f66633 or x12,x12,x15 + 800423c8: 03961793 slli x15,x12,0x39 + 800423cc: 00765693 srli x13,x12,0x7 + 800423d0: 00f6e6b3 or x13,x13,x15 + 800423d4: 03969793 slli x15,x13,0x39 + 800423d8: 0076d713 srli x14,x13,0x7 + 800423dc: 00f76733 or x14,x14,x15 + 800423e0: fab807b7 lui x15,0xfab80 + 800423e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800423e8: 00b79793 slli x15,x15,0xb + 800423ec: 7d578793 addi x15,x15,2005 + 800423f0: 00b79793 slli x15,x15,0xb + 800423f4: 5fe78793 addi x15,x15,1534 + 800423f8: 00a79793 slli x15,x15,0xa + 800423fc: 3b678793 addi x15,x15,950 + 80042400: 7d5c0837 lui x16,0x7d5c0 + 80042404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80042408: 00b81813 slli x16,x16,0xb + 8004240c: 3ea80813 addi x16,x16,1002 + 80042410: 00b81813 slli x16,x16,0xb + 80042414: 6ff80813 addi x16,x16,1791 + 80042418: 00a81813 slli x16,x16,0xa + 8004241c: 1db80813 addi x16,x16,475 + 80042420: 03981793 slli x15,x16,0x39 + 80042424: 00785893 srli x17,x16,0x7 + 80042428: 00f8e8b3 or x17,x17,x15 + 8004242c: 03989793 slli x15,x17,0x39 + 80042430: 0078d913 srli x18,x17,0x7 + 80042434: 00f96933 or x18,x18,x15 + 80042438: 03991793 slli x15,x18,0x39 + 8004243c: 00795993 srli x19,x18,0x7 + 80042440: 00f9e9b3 or x19,x19,x15 + 80042444: 03999793 slli x15,x19,0x39 + 80042448: 0079da13 srli x20,x19,0x7 + 8004244c: 00fa6a33 or x20,x20,x15 + 80042450: 039a1793 slli x15,x20,0x39 + 80042454: 007a5a93 srli x21,x20,0x7 + 80042458: 00faeab3 or x21,x21,x15 + 8004245c: 039a9793 slli x15,x21,0x39 + 80042460: 007adb13 srli x22,x21,0x7 + 80042464: 00fb6b33 or x22,x22,x15 + 80042468: 039b1793 slli x15,x22,0x39 + 8004246c: 007b5b93 srli x23,x22,0x7 + 80042470: 00fbebb3 or x23,x23,x15 + 80042474: 039b9793 slli x15,x23,0x39 + 80042478: 007bdc13 srli x24,x23,0x7 + 8004247c: 00fc6c33 or x24,x24,x15 + 80042480: 039c1793 slli x15,x24,0x39 + 80042484: 007c5c93 srli x25,x24,0x7 + 80042488: 00fcecb3 or x25,x25,x15 + 8004248c: 039c9793 slli x15,x25,0x39 + 80042490: 007cdd13 srli x26,x25,0x7 + 80042494: 00fd6d33 or x26,x26,x15 + 80042498: 039d1793 slli x15,x26,0x39 + 8004249c: 007d5d93 srli x27,x26,0x7 + 800424a0: 00fdedb3 or x27,x27,x15 + 800424a4: 039d9793 slli x15,x27,0x39 + 800424a8: 007dde13 srli x28,x27,0x7 + 800424ac: 00fe6e33 or x28,x28,x15 + 800424b0: 039e1793 slli x15,x28,0x39 + 800424b4: 007e5e93 srli x29,x28,0x7 + 800424b8: 00feeeb3 or x29,x29,x15 + 800424bc: 039e9793 slli x15,x29,0x39 + 800424c0: 007edf13 srli x30,x29,0x7 + 800424c4: 00ff6f33 or x30,x30,x15 + 800424c8: 039f1793 slli x15,x30,0x39 + 800424cc: 007f5f93 srli x31,x30,0x7 + 800424d0: 00ffefb3 or x31,x31,x15 + 800424d4: 00000013 addi x0,x0,0 + 800424d8: 00000013 addi x0,x0,0 + 800424dc: 00000013 addi x0,x0,0 + 800424e0: fffe1117 auipc x2,0xfffe1 + 800424e4: 99010113 addi x2,x2,-1648 # 80022e70 + 800424e8: 00000013 addi x0,x0,0 + 800424ec: 00000013 addi x0,x0,0 + 800424f0: 00000013 addi x0,x0,0 + 800424f4: 00000013 addi x0,x0,0 + 800424f8: 00000013 addi x0,x0,0 + 800424fc: 00000013 addi x0,x0,0 + +0000000080042500 : + 80042500: 6f5ca337 lui x6,0x6f5ca + 80042504: 30930313 addi x6,x6,777 # 6f5ca309 + 80042508: 00b31313 slli x6,x6,0xb + 8004250c: 73e30313 addi x6,x6,1854 + 80042510: 00b31313 slli x6,x6,0xb + 80042514: 52c30313 addi x6,x6,1324 + 80042518: 00a31313 slli x6,x6,0xa + 8004251c: 28130313 addi x6,x6,641 + 80042520: fffc9197 auipc x3,0xfffc9 + 80042524: be018193 addi x3,x3,-1056 # 8000b100 + 80042528: 00000013 addi x0,x0,0 + 8004252c: 00000013 addi x0,x0,0 + 80042530: 00000013 addi x0,x0,0 + 80042534: 00000013 addi x0,x0,0 + 80042538: 00000013 addi x0,x0,0 + 8004253c: 00000013 addi x0,x0,0 + 80042540: 00013203 ld x4,0(x2) + 80042544: 00620c63 beq x4,x6,8004255c + 80042548: 000182e7 jalr x5,0(x3) + 8004254c: 80042500 .word 0x80042500 + 80042550: 00000000 .word 0x00000000 + 80042554: 80022411 .word 0x80022411 + 80042558: 00000000 .word 0x00000000 + 8004255c: 00810113 addi x2,x2,8 + 80042560: fffce197 auipc x3,0xfffce + 80042564: f1018193 addi x3,x3,-240 # 80010470 + 80042568: 00000013 addi x0,x0,0 + 8004256c: 00000013 addi x0,x0,0 + 80042570: 00000013 addi x0,x0,0 + 80042574: 00000013 addi x0,x0,0 + 80042578: 00000013 addi x0,x0,0 + 8004257c: 00000013 addi x0,x0,0 + 80042580: fffbe317 auipc x6,0xfffbe + 80042584: ac030313 addi x6,x6,-1344 # 80000040 + 80042588: 00000013 addi x0,x0,0 + 8004258c: 00000013 addi x0,x0,0 + 80042590: 00000013 addi x0,x0,0 + 80042594: 00000013 addi x0,x0,0 + 80042598: 00000013 addi x0,x0,0 + 8004259c: 00000013 addi x0,x0,0 + 800425a0: 00030067 jalr x0,0(x6) + +00000000800425a4 : + 800425a4: 00054303 lbu x6,0(x10) + 800425a8: 00030a63 beq x6,x0,800425bc + 800425ac: 100003b7 lui x7,0x10000 + 800425b0: 00638023 sb x6,0(x7) # 10000000 + 800425b4: 00150513 addi x10,x10,1 + 800425b8: fedff06f jal x0,800425a4 + 800425bc: 00008067 jalr x0,0(x1) + +00000000800425c0 : + 800425c0: ff010113 addi x2,x2,-16 + 800425c4: 00113023 sd x1,0(x2) + 800425c8: 00813423 sd x8,8(x2) + 800425cc: 00000097 auipc x1,0x0 + 800425d0: fd8080e7 jalr x1,-40(x1) # 800425a4 + 800425d4: 00813403 ld x8,8(x2) + 800425d8: 00013083 ld x1,0(x2) + 800425dc: 01010113 addi x2,x2,16 + 800425e0: 00008067 jalr x0,0(x1) + +00000000800425e4 : + 800425e4: 00100093 addi x1,x0,1 + 800425e8: fffff297 auipc x5,0xfffff + 800425ec: 61828293 addi x5,x5,1560 # 80041c00 + +00000000800425f0 : + 800425f0: 0012a023 sw x1,0(x5) + 800425f4: 0002a223 sw x0,4(x5) + +00000000800425f8 : + 800425f8: 00000013 addi x0,x0,0 + 800425fc: ffdff06f jal x0,800425f8 + 80042600: 0000006f jal x0,80042600 + +0000000080042604 : + 80042604: 00300093 addi x1,x0,3 + 80042608: fffff297 auipc x5,0xfffff + 8004260c: 5f828293 addi x5,x5,1528 # 80041c00 + +0000000080042610 : + 80042610: 0012a023 sw x1,0(x5) + 80042614: 0002a223 sw x0,4(x5) + +0000000080042618 : + 80042618: 00000013 addi x0,x0,0 + 8004261c: ffdff06f jal x0,80042618 + 80042620: 0000006f jal x0,80042620 + +0000000080042624 : + 80042624: 00100513 addi x10,x0,1 + 80042628: 100105b7 lui x11,0x10010 + 8004262c: 00a5a023 sw x10,0(x11) # 10010000 + 80042630: 00008067 jalr x0,0(x1) + +0000000080042634 : + 80042634: 100105b7 lui x11,0x10010 + 80042638: 0005a023 sw x0,0(x11) # 10010000 + 8004263c: 00008067 jalr x0,0(x1) + +0000000080042640 : + 80042640: 00100513 addi x10,x0,1 + 80042644: 100005b7 lui x11,0x10000 + 80042648: 0105859b addiw x11,x11,16 # 10000010 + 8004264c: 00a58023 sb x10,0(x11) + 80042650: 00008067 jalr x0,0(x1) + +0000000080042654 : + 80042654: 100005b7 lui x11,0x10000 + 80042658: 0105859b addiw x11,x11,16 # 10000010 + 8004265c: 00058023 sb x0,0(x11) + 80042660: 00008067 jalr x0,0(x1) + 80042664: 00000013 addi x0,x0,0 + 80042668: 00000013 addi x0,x0,0 + 8004266c: 00000013 addi x0,x0,0 + 80042670: 00000013 addi x0,x0,0 + 80042674: 00000013 addi x0,x0,0 + 80042678: 00000013 addi x0,x0,0 + 8004267c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zkne-aes64esm-00.elf.objdump b/riscv-tests/rv64-Zkne-aes64esm-00.elf.objdump new file mode 100644 index 0000000..97d13d8 --- /dev/null +++ b/riscv-tests/rv64-Zkne-aes64esm-00.elf.objdump @@ -0,0 +1,23497 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64esm-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64esm-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000041680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cd00 memsz 0x000000000000cd00 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000033680 memsz 0x0000000000033680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000ccc0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00031eb0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041f00 0000000080041f00 0003ff00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080043000 0000000080043000 00041000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00041680 2**0 + CONTENTS, READONLY + 6 .debug_line 000049b8 0000000000000000 0000000000000000 000416bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 0000000000000000 0000000000000000 00046073 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 000460f1 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00046114 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00046130 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 0000000000000000 0000000000000000 00046170 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 000461fc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080010000 l d .data 0000000000000000 .data +0000000080041f00 l d .tohost 0000000000000000 .tohost +0000000080043000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccK9xzJa.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800430e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b0 +000000008000b100 l .text.rvtest 0000000000000000 failedtest_x5_x4 +0000000080013470 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b1 +00000000800134a5 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b2 +00000000800134da l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b3 +000000008001350f l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b4 +000000008000b118 l .text.rvtest 0000000000000000 failedtest_x8_x7 +0000000080013544 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b5 +0000000080013579 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b6 +00000000800135ae l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b6_str +00000000800001d4 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b7 +00000000800135e3 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b7_str +0000000080000208 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b8 +0000000080013618 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b8_str +000000008000023c l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b9 +000000008001364d l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b9_str +0000000080000270 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b10 +0000000080013683 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b10_str +00000000800002a4 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b11 +00000000800136ba l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b11_str +00000000800002d8 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b12 +00000000800136f1 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b13 +0000000080013728 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b14 +000000008001375f l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b14_str +0000000080000374 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b15 +0000000080013796 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b15_str +00000000800003ac l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b16 +00000000800137cd l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b16_str +00000000800003e0 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b17 +0000000080013804 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b17_str +0000000080000414 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b18 +000000008001383b l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b18_str +0000000080000448 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b19 +0000000080013872 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b19_str +0000000080000480 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b20 +00000000800138a9 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b20_str +00000000800004b4 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b21 +00000000800138e0 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b21_str +00000000800004e8 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b22 +0000000080013917 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b22_str +000000008000051c l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b23 +000000008001394e l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b23_str +0000000080000550 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b24 +0000000080013985 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b24_str +0000000080000584 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b25 +00000000800139bc l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b25_str +00000000800005bc l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b26 +00000000800139f3 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b26_str +00000000800005f0 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b27 +0000000080013a2a l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b27_str +0000000080000624 l .text.rvtest 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b28 +0000000080013a61 l .data 0000000000000000 Zkne_aes64esm_cg_cp_rs1_b28_str +0000000080000658 l .text.rvtest 0000000000000000 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.text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00043097 auipc x1,0x43 + 80000004: 0e008093 addi x1,x1,224 # 800430e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x26daf1f8443b3445 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xc54021120c5cb443 + 80000048: 0001bb83 ld x23,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zkne_aes64esm_cg_cp_rs1_b0: + aes64esm x31, x0, x23 # perform operation + 80000050: 37700fb3 aes64esm x31,x0,x23 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zkne_aes64esm_cg_cp_rs1_b0, Zkne_aes64esm_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01f20c63 beq x4,x31,80000070 + 8000005c: 0a40b2ef jal x5,8000b100 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 80013470 .word 0x80013470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x8f7a5b71f7d2c851 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x44b8b7b02e1be1b6 + 8000007c: 0001ba83 ld x21,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zkne_aes64esm_cg_cp_rs1_b1: + aes64esm x16, x1, x21 # perform operation + 80000084: 37508833 aes64esm x16,x1,x21 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_b1, Zkne_aes64esm_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01020c63 beq x4,x16,800000a4 + 80000090: 0700b2ef jal x5,8000b100 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134a5 .word 0x800134a5 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x26, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010d13 addi x26,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xeeb959559a76557c + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs2: x1 = 0xbdfd89c5eaf31319 + 800000b4: 0001b083 ld x1,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zkne_aes64esm_cg_cp_rs1_b2: + aes64esm x19, x2, x1 # perform operation + 800000bc: 361109b3 aes64esm x19,x2,x1 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zkne_aes64esm_cg_cp_rs1_b2, Zkne_aes64esm_cg_cp_rs1_b2_str) + 800000c0: 000d3203 ld x4,0(x26) + 800000c4: 01320c63 beq x4,x19,800000dc + 800000c8: 0380b2ef jal x5,8000b100 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 800134da .word 0x800134da + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008d0d13 addi x26,x26,8 + + mv x16, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018813 addi x16,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x9e1d9d4c247797da + 800000e4: 00083183 ld x3,0(x16) + 800000e8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs2: x1 = 0xf1eb71077e4f4020 + 800000ec: 00083083 ld x1,0(x16) + 800000f0: 00880813 addi x16,x16,8 + +00000000800000f4 : +Zkne_aes64esm_cg_cp_rs1_b3: + aes64esm x11, x3, x1 # perform operation + 800000f4: 361185b3 aes64esm x11,x3,x1 + # Check if x11 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x11, Zkne_aes64esm_cg_cp_rs1_b3, Zkne_aes64esm_cg_cp_rs1_b3_str) + 800000f8: 000d3203 ld x4,0(x26) + 800000fc: 00b20c63 beq x4,x11,80000114 + 80000100: 0000b2ef jal x5,8000b100 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8001350f .word 0x8001350f + 80000110: 00000000 .word 0x00000000 + 80000114: 008d0d13 addi x26,x26,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xc16d55417a049fc3 + 80000120: 00083203 ld x4,0(x16) + 80000124: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs2: x9 = 0x4a39ce6167ad7db6 + 80000128: 00083483 ld x9,0(x16) + 8000012c: 00880813 addi x16,x16,8 + +0000000080000130 : +Zkne_aes64esm_cg_cp_rs1_b4: + aes64esm x17, x4, x9 # perform operation + 80000130: 369208b3 aes64esm x17,x4,x9 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zkne_aes64esm_cg_cp_rs1_b4, Zkne_aes64esm_cg_cp_rs1_b4_str) + 80000134: 000d3383 ld x7,0(x26) + 80000138: 01138c63 beq x7,x17,80000150 + 8000013c: 7dd0a46f jal x8,8000b118 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 80013544 .word 0x80013544 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0xac6e7d957e92bddd + 80000154: 00083283 ld x5,0(x16) + 80000158: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0xe49e86eff7f08f9c + 8000015c: 00083a83 ld x21,0(x16) + 80000160: 00880813 addi x16,x16,8 + +0000000080000164 : +Zkne_aes64esm_cg_cp_rs1_b5: + aes64esm x1, x5, x21 # perform operation + 80000164: 375280b3 aes64esm x1,x5,x21 + # Check if x1 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x1, Zkne_aes64esm_cg_cp_rs1_b5, Zkne_aes64esm_cg_cp_rs1_b5_str) + 80000168: 000d3383 ld x7,0(x26) + 8000016c: 00138c63 beq x7,x1,80000184 + 80000170: 7a90a46f jal x8,8000b118 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 80013579 .word 0x80013579 + 80000180: 00000000 .word 0x00000000 + 80000184: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x37dea95a90c6dc4a + 80000188: 00083303 ld x6,0(x16) + 8000018c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs2: x25 = 0x864ca9c5f0ba0b41 + 80000190: 00083c83 ld x25,0(x16) + 80000194: 00880813 addi x16,x16,8 + +0000000080000198 : +Zkne_aes64esm_cg_cp_rs1_b6: + aes64esm x22, x6, x25 # perform operation + 80000198: 37930b33 aes64esm x22,x6,x25 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zkne_aes64esm_cg_cp_rs1_b6, Zkne_aes64esm_cg_cp_rs1_b6_str) + 8000019c: 000d3383 ld x7,0(x26) + 800001a0: 01638c63 beq x7,x22,800001b8 + 800001a4: 7750a46f jal x8,8000b118 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135ae .word 0x800135ae + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008d0d13 addi x26,x26,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800001bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xe7236464a01e3ecf + 800001c4: 00083383 ld x7,0(x16) + 800001c8: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs2: x23 = 0xda0f659510524d2f + 800001cc: 00083b83 ld x23,0(x16) + 800001d0: 00880813 addi x16,x16,8 + +00000000800001d4 : +Zkne_aes64esm_cg_cp_rs1_b7: + aes64esm x0, x7, x23 # perform operation + 800001d4: 37738033 aes64esm x0,x7,x23 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zkne_aes64esm_cg_cp_rs1_b7, Zkne_aes64esm_cg_cp_rs1_b7_str) + 800001d8: 000d3203 ld x4,0(x26) + 800001dc: 00020c63 beq x4,x0,800001f4 + 800001e0: 7210a2ef jal x5,8000b100 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 800135e3 .word 0x800135e3 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xcec640deff8fbbbd + 800001f8: 00083403 ld x8,0(x16) + 800001fc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs2: x10 = 0xf12a8a23fd70d2d7 + 80000200: 00083503 ld x10,0(x16) + 80000204: 00880813 addi x16,x16,8 + +0000000080000208 : +Zkne_aes64esm_cg_cp_rs1_b8: + aes64esm x22, x8, x10 # perform operation + 80000208: 36a40b33 aes64esm x22,x8,x10 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zkne_aes64esm_cg_cp_rs1_b8, Zkne_aes64esm_cg_cp_rs1_b8_str) + 8000020c: 000d3203 ld x4,0(x26) + 80000210: 01620c63 beq x4,x22,80000228 + 80000214: 6ed0a2ef jal x5,8000b100 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 80013618 .word 0x80013618 + 80000224: 00000000 .word 0x00000000 + 80000228: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x851a684a76c9fe68 + 8000022c: 00083483 ld x9,0(x16) + 80000230: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs2: x22 = 0x661a3a0d874c248c + 80000234: 00083b03 ld x22,0(x16) + 80000238: 00880813 addi x16,x16,8 + +000000008000023c : +Zkne_aes64esm_cg_cp_rs1_b9: + aes64esm x13, x9, x22 # perform operation + 8000023c: 376486b3 aes64esm x13,x9,x22 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zkne_aes64esm_cg_cp_rs1_b9, Zkne_aes64esm_cg_cp_rs1_b9_str) + 80000240: 000d3203 ld x4,0(x26) + 80000244: 00d20c63 beq x4,x13,8000025c + 80000248: 6b90a2ef jal x5,8000b100 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8001364d .word 0x8001364d + 80000258: 00000000 .word 0x00000000 + 8000025c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xc63309d1aab896cb + 80000260: 00083503 ld x10,0(x16) + 80000264: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs2: x21 = 0x88b768da8d19e80b + 80000268: 00083a83 ld x21,0(x16) + 8000026c: 00880813 addi x16,x16,8 + +0000000080000270 : +Zkne_aes64esm_cg_cp_rs1_b10: + aes64esm x0, x10, x21 # perform operation + 80000270: 37550033 aes64esm x0,x10,x21 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zkne_aes64esm_cg_cp_rs1_b10, Zkne_aes64esm_cg_cp_rs1_b10_str) + 80000274: 000d3203 ld x4,0(x26) + 80000278: 00020c63 beq x4,x0,80000290 + 8000027c: 6850a2ef jal x5,8000b100 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 80013683 .word 0x80013683 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x99d1d643afa37a09 + 80000294: 00083583 ld x11,0(x16) + 80000298: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x19) # load rs2: x19 = 0x3a9ffce815d90e9c + 8000029c: 00083983 ld x19,0(x16) + 800002a0: 00880813 addi x16,x16,8 + +00000000800002a4 : +Zkne_aes64esm_cg_cp_rs1_b11: + aes64esm x18, x11, x19 # perform operation + 800002a4: 37358933 aes64esm x18,x11,x19 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zkne_aes64esm_cg_cp_rs1_b11, Zkne_aes64esm_cg_cp_rs1_b11_str) + 800002a8: 000d3203 ld x4,0(x26) + 800002ac: 01220c63 beq x4,x18,800002c4 + 800002b0: 6510a2ef jal x5,8000b100 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 800136ba .word 0x800136ba + 800002c0: 00000000 .word 0x00000000 + 800002c4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xe3e995127dcceab4 + 800002c8: 00083603 ld x12,0(x16) + 800002cc: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs2: x6 = 0xda1b92fd1f2d4513 + 800002d0: 00083303 ld x6,0(x16) + 800002d4: 00880813 addi x16,x16,8 + +00000000800002d8 : +Zkne_aes64esm_cg_cp_rs1_b12: + aes64esm x9, x12, x6 # perform operation + 800002d8: 366604b3 aes64esm x9,x12,x6 + # Check if x9 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x9, Zkne_aes64esm_cg_cp_rs1_b12, Zkne_aes64esm_cg_cp_rs1_b12_str) + 800002dc: 000d3203 ld x4,0(x26) + 800002e0: 00920c63 beq x4,x9,800002f8 + 800002e4: 61d0a2ef jal x5,8000b100 + 800002e8: 800002d8 .word 0x800002d8 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 800136f1 .word 0x800136f1 + 800002f4: 00000000 .word 0x00000000 + 800002f8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x5e96602a58ccc159 + 800002fc: 00083683 ld x13,0(x16) + 80000300: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x17bd6e35627fe578 + 80000304: 00083783 ld x15,0(x16) + 80000308: 00880813 addi x16,x16,8 + +000000008000030c : +Zkne_aes64esm_cg_cp_rs1_b13: + aes64esm x29, x13, x15 # perform operation + 8000030c: 36f68eb3 aes64esm x29,x13,x15 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zkne_aes64esm_cg_cp_rs1_b13, Zkne_aes64esm_cg_cp_rs1_b13_str) + 80000310: 000d3203 ld x4,0(x26) + 80000314: 01d20c63 beq x4,x29,8000032c + 80000318: 5e90a2ef jal x5,8000b100 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 80013728 .word 0x80013728 + 80000328: 00000000 .word 0x00000000 + 8000032c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x327718719266cde4 + 80000330: 00083703 ld x14,0(x16) + 80000334: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs2: x20 = 0x782d1e146d9a276f + 80000338: 00083a03 ld x20,0(x16) + 8000033c: 00880813 addi x16,x16,8 + +0000000080000340 : +Zkne_aes64esm_cg_cp_rs1_b14: + aes64esm x10, x14, x20 # perform operation + 80000340: 37470533 aes64esm x10,x14,x20 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zkne_aes64esm_cg_cp_rs1_b14, Zkne_aes64esm_cg_cp_rs1_b14_str) + 80000344: 000d3203 ld x4,0(x26) + 80000348: 00a20c63 beq x4,x10,80000360 + 8000034c: 5b50a2ef jal x5,8000b100 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 8001375f .word 0x8001375f + 8000035c: 00000000 .word 0x00000000 + 80000360: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x3c4eb29cadfce92d + 80000364: 00083783 ld x15,0(x16) + 80000368: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs2: x0 = 0xfa7f23ed581f018d + 8000036c: 00083003 ld x0,0(x16) + 80000370: 00880813 addi x16,x16,8 + +0000000080000374 : +Zkne_aes64esm_cg_cp_rs1_b15: + aes64esm x2, x15, x0 # perform operation + 80000374: 36078133 aes64esm x2,x15,x0 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zkne_aes64esm_cg_cp_rs1_b15, Zkne_aes64esm_cg_cp_rs1_b15_str) + 80000378: 000d3203 ld x4,0(x26) + 8000037c: 00220c63 beq x4,x2,80000394 + 80000380: 5810a2ef jal x5,8000b100 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 80013796 .word 0x80013796 + 80000390: 00000000 .word 0x00000000 + 80000394: 008d0d13 addi x26,x26,8 + + mv x20, x16 # switch data pointer register to avoid conflict with test + 80000398: 00080a13 addi x20,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x29056a57abaf2b88 + 8000039c: 000a3803 ld x16,0(x20) + 800003a0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0xe25832958355353d + 800003a4: 000a3503 ld x10,0(x20) + 800003a8: 008a0a13 addi x20,x20,8 + +00000000800003ac : +Zkne_aes64esm_cg_cp_rs1_b16: + aes64esm x30, x16, x10 # perform operation + 800003ac: 36a80f33 aes64esm x30,x16,x10 + # Check if x30 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x30, Zkne_aes64esm_cg_cp_rs1_b16, Zkne_aes64esm_cg_cp_rs1_b16_str) + 800003b0: 000d3203 ld x4,0(x26) + 800003b4: 01e20c63 beq x4,x30,800003cc + 800003b8: 5490a2ef jal x5,8000b100 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 800137cd .word 0x800137cd + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x11a61a739fc66c81 + 800003d0: 000a3883 ld x17,0(x20) + 800003d4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs2: x9 = 0x11e3bccb5af2247a + 800003d8: 000a3483 ld x9,0(x20) + 800003dc: 008a0a13 addi x20,x20,8 + +00000000800003e0 : +Zkne_aes64esm_cg_cp_rs1_b17: + aes64esm x13, x17, x9 # perform operation + 800003e0: 369886b3 aes64esm x13,x17,x9 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zkne_aes64esm_cg_cp_rs1_b17, Zkne_aes64esm_cg_cp_rs1_b17_str) + 800003e4: 000d3203 ld x4,0(x26) + 800003e8: 00d20c63 beq x4,x13,80000400 + 800003ec: 5150a2ef jal x5,8000b100 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 80013804 .word 0x80013804 + 800003fc: 00000000 .word 0x00000000 + 80000400: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x96ad7ecd3412dde8 + 80000404: 000a3903 ld x18,0(x20) + 80000408: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x168d95651dac0472 + 8000040c: 000a3e03 ld x28,0(x20) + 80000410: 008a0a13 addi x20,x20,8 + +0000000080000414 : +Zkne_aes64esm_cg_cp_rs1_b18: + aes64esm x0, x18, x28 # perform operation + 80000414: 37c90033 aes64esm x0,x18,x28 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zkne_aes64esm_cg_cp_rs1_b18, Zkne_aes64esm_cg_cp_rs1_b18_str) + 80000418: 000d3203 ld x4,0(x26) + 8000041c: 00020c63 beq x4,x0,80000434 + 80000420: 4e10a2ef jal x5,8000b100 + 80000424: 80000414 .word 0x80000414 + 80000428: 00000000 .word 0x00000000 + 8000042c: 8001383b .word 0x8001383b + 80000430: 00000000 .word 0x00000000 + 80000434: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xf9399e8d357cc3a0 + 80000438: 000a3983 ld x19,0(x20) + 8000043c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xe70d178498da408a + 80000440: 000a3083 ld x1,0(x20) + 80000444: 008a0a13 addi x20,x20,8 + +0000000080000448 : +Zkne_aes64esm_cg_cp_rs1_b19: + aes64esm x16, x19, x1 # perform operation + 80000448: 36198833 aes64esm x16,x19,x1 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_b19, Zkne_aes64esm_cg_cp_rs1_b19_str) + 8000044c: 000d3203 ld x4,0(x26) + 80000450: 01020c63 beq x4,x16,80000468 + 80000454: 4ad0a2ef jal x5,8000b100 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 80013872 .word 0x80013872 + 80000464: 00000000 .word 0x00000000 + 80000468: 008d0d13 addi x26,x26,8 + + mv x12, x20 # switch data pointer register to avoid conflict with test + 8000046c: 000a0613 addi x12,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x610245e36afe47d3 + 80000470: 00063a03 ld x20,0(x12) + 80000474: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x10cb9af1fa89a562 + 80000478: 00063983 ld x19,0(x12) + 8000047c: 00860613 addi x12,x12,8 + +0000000080000480 : +Zkne_aes64esm_cg_cp_rs1_b20: + aes64esm x2, x20, x19 # perform operation + 80000480: 373a0133 aes64esm x2,x20,x19 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zkne_aes64esm_cg_cp_rs1_b20, Zkne_aes64esm_cg_cp_rs1_b20_str) + 80000484: 000d3203 ld x4,0(x26) + 80000488: 00220c63 beq x4,x2,800004a0 + 8000048c: 4750a2ef jal x5,8000b100 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 800138a9 .word 0x800138a9 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xf24ee6fe95f7a44c + 800004a4: 00063a83 ld x21,0(x12) + 800004a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x5d06677ded46c057 + 800004ac: 00063e03 ld x28,0(x12) + 800004b0: 00860613 addi x12,x12,8 + +00000000800004b4 : +Zkne_aes64esm_cg_cp_rs1_b21: + aes64esm x22, x21, x28 # perform operation + 800004b4: 37ca8b33 aes64esm x22,x21,x28 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zkne_aes64esm_cg_cp_rs1_b21, Zkne_aes64esm_cg_cp_rs1_b21_str) + 800004b8: 000d3203 ld x4,0(x26) + 800004bc: 01620c63 beq x4,x22,800004d4 + 800004c0: 4410a2ef jal x5,8000b100 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 800138e0 .word 0x800138e0 + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x75a3f08a707ce452 + 800004d8: 00063b03 ld x22,0(x12) + 800004dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0x5ea808539e2c1687 + 800004e0: 00063103 ld x2,0(x12) + 800004e4: 00860613 addi x12,x12,8 + +00000000800004e8 : +Zkne_aes64esm_cg_cp_rs1_b22: + aes64esm x11, x22, x2 # perform operation + 800004e8: 362b05b3 aes64esm x11,x22,x2 + # Check if x11 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x11, Zkne_aes64esm_cg_cp_rs1_b22, Zkne_aes64esm_cg_cp_rs1_b22_str) + 800004ec: 000d3203 ld x4,0(x26) + 800004f0: 00b20c63 beq x4,x11,80000508 + 800004f4: 40d0a2ef jal x5,8000b100 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 80013917 .word 0x80013917 + 80000504: 00000000 .word 0x00000000 + 80000508: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x3e0afc4ee110151b + 8000050c: 00063b83 ld x23,0(x12) + 80000510: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x21887281728f0aaf + 80000514: 00063e83 ld x29,0(x12) + 80000518: 00860613 addi x12,x12,8 + +000000008000051c : +Zkne_aes64esm_cg_cp_rs1_b23: + aes64esm x15, x23, x29 # perform operation + 8000051c: 37db87b3 aes64esm x15,x23,x29 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zkne_aes64esm_cg_cp_rs1_b23, Zkne_aes64esm_cg_cp_rs1_b23_str) + 80000520: 000d3203 ld x4,0(x26) + 80000524: 00f20c63 beq x4,x15,8000053c + 80000528: 3d90a2ef jal x5,8000b100 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 8001394e .word 0x8001394e + 80000538: 00000000 .word 0x00000000 + 8000053c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x02dd31351d95fb04 + 80000540: 00063c03 ld x24,0(x12) + 80000544: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x9673826209ee462b + 80000548: 00063303 ld x6,0(x12) + 8000054c: 00860613 addi x12,x12,8 + +0000000080000550 : +Zkne_aes64esm_cg_cp_rs1_b24: + aes64esm x13, x24, x6 # perform operation + 80000550: 366c06b3 aes64esm x13,x24,x6 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zkne_aes64esm_cg_cp_rs1_b24, Zkne_aes64esm_cg_cp_rs1_b24_str) + 80000554: 000d3203 ld x4,0(x26) + 80000558: 00d20c63 beq x4,x13,80000570 + 8000055c: 3a50a2ef jal x5,8000b100 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 80013985 .word 0x80013985 + 8000056c: 00000000 .word 0x00000000 + 80000570: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xeea4b8251699a8ed + 80000574: 00063c83 ld x25,0(x12) + 80000578: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xf446f7cde3cceb57 + 8000057c: 00063803 ld x16,0(x12) + 80000580: 00860613 addi x12,x12,8 + +0000000080000584 : +Zkne_aes64esm_cg_cp_rs1_b25: + aes64esm x24, x25, x16 # perform operation + 80000584: 370c8c33 aes64esm x24,x25,x16 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zkne_aes64esm_cg_cp_rs1_b25, Zkne_aes64esm_cg_cp_rs1_b25_str) + 80000588: 000d3203 ld x4,0(x26) + 8000058c: 01820c63 beq x4,x24,800005a4 + 80000590: 3710a2ef jal x5,8000b100 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 800139bc .word 0x800139bc + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008d0d13 addi x26,x26,8 + + mv x24, x26 # switch signature pointer register to avoid conflict with test + 800005a8: 000d0c13 addi x24,x26,0 +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xd1ff6b9fd055924e + 800005ac: 00063d03 ld x26,0(x12) + 800005b0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x03411c6bb6cf78d9 + 800005b4: 00063f03 ld x30,0(x12) + 800005b8: 00860613 addi x12,x12,8 + +00000000800005bc : +Zkne_aes64esm_cg_cp_rs1_b26: + aes64esm x6, x26, x30 # perform operation + 800005bc: 37ed0333 aes64esm x6,x26,x30 + # Check if x6 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x6, Zkne_aes64esm_cg_cp_rs1_b26, Zkne_aes64esm_cg_cp_rs1_b26_str) + 800005c0: 000c3203 ld x4,0(x24) + 800005c4: 00620c63 beq x4,x6,800005dc + 800005c8: 3390a2ef jal x5,8000b100 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 800139f3 .word 0x800139f3 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x9a374902019101f8 + 800005e0: 00063d83 ld x27,0(x12) + 800005e4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x9eaaa029d8afb8fd + 800005e8: 00063883 ld x17,0(x12) + 800005ec: 00860613 addi x12,x12,8 + +00000000800005f0 : +Zkne_aes64esm_cg_cp_rs1_b27: + aes64esm x8, x27, x17 # perform operation + 800005f0: 371d8433 aes64esm x8,x27,x17 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zkne_aes64esm_cg_cp_rs1_b27, Zkne_aes64esm_cg_cp_rs1_b27_str) + 800005f4: 000c3203 ld x4,0(x24) + 800005f8: 00820c63 beq x4,x8,80000610 + 800005fc: 3050a2ef jal x5,8000b100 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80013a2a .word 0x80013a2a + 8000060c: 00000000 .word 0x00000000 + 80000610: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x9672be2b56d61e86 + 80000614: 00063e03 ld x28,0(x12) + 80000618: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xe64eb92f392e4612 + 8000061c: 00063d83 ld x27,0(x12) + 80000620: 00860613 addi x12,x12,8 + +0000000080000624 : +Zkne_aes64esm_cg_cp_rs1_b28: + aes64esm x16, x28, x27 # perform operation + 80000624: 37be0833 aes64esm x16,x28,x27 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_b28, Zkne_aes64esm_cg_cp_rs1_b28_str) + 80000628: 000c3203 ld x4,0(x24) + 8000062c: 01020c63 beq x4,x16,80000644 + 80000630: 2d10a2ef jal x5,8000b100 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 80013a61 .word 0x80013a61 + 80000640: 00000000 .word 0x00000000 + 80000644: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xf68226ba92b6d173 + 80000648: 00063e83 ld x29,0(x12) + 8000064c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xfefdf42abfcd021a + 80000650: 00063b83 ld x23,0(x12) + 80000654: 00860613 addi x12,x12,8 + +0000000080000658 : +Zkne_aes64esm_cg_cp_rs1_b29: + aes64esm x2, x29, x23 # perform operation + 80000658: 377e8133 aes64esm x2,x29,x23 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zkne_aes64esm_cg_cp_rs1_b29, Zkne_aes64esm_cg_cp_rs1_b29_str) + 8000065c: 000c3203 ld x4,0(x24) + 80000660: 00220c63 beq x4,x2,80000678 + 80000664: 29d0a2ef jal x5,8000b100 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 80013a98 .word 0x80013a98 + 80000674: 00000000 .word 0x00000000 + 80000678: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x501683b6ebc7667a + 8000067c: 00063f03 ld x30,0(x12) + 80000680: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0x349c1d05bd1f9b04 + 80000684: 00063383 ld x7,0(x12) + 80000688: 00860613 addi x12,x12,8 + +000000008000068c : +Zkne_aes64esm_cg_cp_rs1_b30: + aes64esm x23, x30, x7 # perform operation + 8000068c: 367f0bb3 aes64esm x23,x30,x7 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zkne_aes64esm_cg_cp_rs1_b30, Zkne_aes64esm_cg_cp_rs1_b30_str) + 80000690: 000c3203 ld x4,0(x24) + 80000694: 01720c63 beq x4,x23,800006ac + 80000698: 2690a2ef jal x5,8000b100 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 80013acf .word 0x80013acf + 800006a8: 00000000 .word 0x00000000 + 800006ac: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x43a3e4bf0236dc00 + 800006b0: 00063f83 ld x31,0(x12) + 800006b4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x30e2624c07641fd8 + 800006b8: 00063083 ld x1,0(x12) + 800006bc: 00860613 addi x12,x12,8 + +00000000800006c0 : +Zkne_aes64esm_cg_cp_rs1_b31: + aes64esm x9, x31, x1 # perform operation + 800006c0: 361f84b3 aes64esm x9,x31,x1 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zkne_aes64esm_cg_cp_rs1_b31, Zkne_aes64esm_cg_cp_rs1_b31_str) + 800006c4: 000c3203 ld x4,0(x24) + 800006c8: 00920c63 beq x4,x9,800006e0 + 800006cc: 2350a2ef jal x5,8000b100 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 80013b06 .word 0x80013b06 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 008c0c13 addi x24,x24,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x9556d7e0690a1704 + 800006e4: 00063e03 ld x28,0(x12) + 800006e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs2: x0 = 0x32e736b6b8b1c25d + 800006ec: 00063003 ld x0,0(x12) + 800006f0: 00860613 addi x12,x12,8 + +00000000800006f4 : +Zkne_aes64esm_cg_cp_rs2_b0: + aes64esm x31, x28, x0 # perform operation + 800006f4: 360e0fb3 aes64esm x31,x28,x0 + # Check if x31 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x31, Zkne_aes64esm_cg_cp_rs2_b0, Zkne_aes64esm_cg_cp_rs2_b0_str) + 800006f8: 000c3203 ld x4,0(x24) + 800006fc: 01f20c63 beq x4,x31,80000714 + 80000700: 2010a2ef jal x5,8000b100 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80013b3d .word 0x80013b3d + 80000710: 00000000 .word 0x00000000 + 80000714: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x1ab1eef90cb8c4f8 + 80000718: 00063183 ld x3,0(x12) + 8000071c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x9cefc971e37ceb01 + 80000720: 00063083 ld x1,0(x12) + 80000724: 00860613 addi x12,x12,8 + +0000000080000728 : +Zkne_aes64esm_cg_cp_rs2_b1: + aes64esm x31, x3, x1 # perform operation + 80000728: 36118fb3 aes64esm x31,x3,x1 + # Check if x31 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x31, Zkne_aes64esm_cg_cp_rs2_b1, Zkne_aes64esm_cg_cp_rs2_b1_str) + 8000072c: 000c3203 ld x4,0(x24) + 80000730: 01f20c63 beq x4,x31,80000748 + 80000734: 1cd0a2ef jal x5,8000b100 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80013b73 .word 0x80013b73 + 80000744: 00000000 .word 0x00000000 + 80000748: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xcad8eb04a21f570c + 8000074c: 00063403 ld x8,0(x12) + 80000750: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs2: x2 = 0xc7ce9038dca46ff3 + 80000754: 00063103 ld x2,0(x12) + 80000758: 00860613 addi x12,x12,8 + +000000008000075c : +Zkne_aes64esm_cg_cp_rs2_b2: + aes64esm x7, x8, x2 # perform operation + 8000075c: 362403b3 aes64esm x7,x8,x2 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zkne_aes64esm_cg_cp_rs2_b2, Zkne_aes64esm_cg_cp_rs2_b2_str) + 80000760: 000c3203 ld x4,0(x24) + 80000764: 00720c63 beq x4,x7,8000077c + 80000768: 1990a2ef jal x5,8000b100 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 80013ba9 .word 0x80013ba9 + 80000778: 00000000 .word 0x00000000 + 8000077c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xd42111503a537541 + 80000780: 00063983 ld x19,0(x12) + 80000784: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x4248d68d734b8da7 + 80000788: 00063183 ld x3,0(x12) + 8000078c: 00860613 addi x12,x12,8 + +0000000080000790 : +Zkne_aes64esm_cg_cp_rs2_b3: + aes64esm x10, x19, x3 # perform operation + 80000790: 36398533 aes64esm x10,x19,x3 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zkne_aes64esm_cg_cp_rs2_b3, Zkne_aes64esm_cg_cp_rs2_b3_str) + 80000794: 000c3203 ld x4,0(x24) + 80000798: 00a20c63 beq x4,x10,800007b0 + 8000079c: 1650a2ef jal x5,8000b100 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 80013bdf .word 0x80013bdf + 800007ac: 00000000 .word 0x00000000 + 800007b0: 008c0c13 addi x24,x24,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800007b4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800007b8: 00028413 addi x8,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x3b86f96434c89c00 + 800007bc: 00063003 ld x0,0(x12) + 800007c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xf4196ecd2ac670d1 + 800007c4: 00063203 ld x4,0(x12) + 800007c8: 00860613 addi x12,x12,8 + +00000000800007cc : +Zkne_aes64esm_cg_cp_rs2_b4: + aes64esm x19, x0, x4 # perform operation + 800007cc: 364009b3 aes64esm x19,x0,x4 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zkne_aes64esm_cg_cp_rs2_b4, Zkne_aes64esm_cg_cp_rs2_b4_str) + 800007d0: 000c3383 ld x7,0(x24) + 800007d4: 01338c63 beq x7,x19,800007ec + 800007d8: 1410a46f jal x8,8000b118 + 800007dc: 800007cc .word 0x800007cc + 800007e0: 00000000 .word 0x00000000 + 800007e4: 80013c15 .word 0x80013c15 + 800007e8: 00000000 .word 0x00000000 + 800007ec: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xa0aab12aace897cc + 800007f0: 00063983 ld x19,0(x12) + 800007f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xa2bfd1c4f834457f + 800007f8: 00063283 ld x5,0(x12) + 800007fc: 00860613 addi x12,x12,8 + +0000000080000800 : +Zkne_aes64esm_cg_cp_rs2_b5: + aes64esm x13, x19, x5 # perform operation + 80000800: 365986b3 aes64esm x13,x19,x5 + # Check if x13 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x13, Zkne_aes64esm_cg_cp_rs2_b5, Zkne_aes64esm_cg_cp_rs2_b5_str) + 80000804: 000c3383 ld x7,0(x24) + 80000808: 00d38c63 beq x7,x13,80000820 + 8000080c: 10d0a46f jal x8,8000b118 + 80000810: 80000800 .word 0x80000800 + 80000814: 00000000 .word 0x00000000 + 80000818: 80013c4b .word 0x80013c4b + 8000081c: 00000000 .word 0x00000000 + 80000820: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x5e982bd69b92ac13 + 80000824: 00063b03 ld x22,0(x12) + 80000828: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x71a3ee6fd882ff22 + 8000082c: 00063303 ld x6,0(x12) + 80000830: 00860613 addi x12,x12,8 + +0000000080000834 : +Zkne_aes64esm_cg_cp_rs2_b6: + aes64esm x16, x22, x6 # perform operation + 80000834: 366b0833 aes64esm x16,x22,x6 + # Check if x16 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x16, Zkne_aes64esm_cg_cp_rs2_b6, Zkne_aes64esm_cg_cp_rs2_b6_str) + 80000838: 000c3383 ld x7,0(x24) + 8000083c: 01038c63 beq x7,x16,80000854 + 80000840: 0d90a46f jal x8,8000b118 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 80013c81 .word 0x80013c81 + 80000850: 00000000 .word 0x00000000 + 80000854: 008c0c13 addi x24,x24,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000858: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 8000085c: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x4652ae0972e73c59 + 80000860: 00063e83 ld x29,0(x12) + 80000864: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs2: x7 = 0xb5b15c1e95fbf53b + 80000868: 00063383 ld x7,0(x12) + 8000086c: 00860613 addi x12,x12,8 + +0000000080000870 : +Zkne_aes64esm_cg_cp_rs2_b7: + aes64esm x6, x29, x7 # perform operation + 80000870: 367e8333 aes64esm x6,x29,x7 + # Check if x6 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x6, Zkne_aes64esm_cg_cp_rs2_b7, Zkne_aes64esm_cg_cp_rs2_b7_str) + 80000874: 000c3203 ld x4,0(x24) + 80000878: 00620c63 beq x4,x6,80000890 + 8000087c: 0850a2ef jal x5,8000b100 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 80013cb7 .word 0x80013cb7 + 8000088c: 00000000 .word 0x00000000 + 80000890: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x48f8c2f2fd3d2824 + 80000894: 00063803 ld x16,0(x12) + 80000898: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs2: x8 = 0x64acb84198b67017 + 8000089c: 00063403 ld x8,0(x12) + 800008a0: 00860613 addi x12,x12,8 + +00000000800008a4 : +Zkne_aes64esm_cg_cp_rs2_b8: + aes64esm x6, x16, x8 # perform operation + 800008a4: 36880333 aes64esm x6,x16,x8 + # Check if x6 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x6, Zkne_aes64esm_cg_cp_rs2_b8, Zkne_aes64esm_cg_cp_rs2_b8_str) + 800008a8: 000c3203 ld x4,0(x24) + 800008ac: 00620c63 beq x4,x6,800008c4 + 800008b0: 0510a2ef jal x5,8000b100 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 80013ced .word 0x80013ced + 800008c0: 00000000 .word 0x00000000 + 800008c4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xbc29f04ea1e25efc + 800008c8: 00063683 ld x13,0(x12) + 800008cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x9a1c04f66d7d09c7 + 800008d0: 00063483 ld x9,0(x12) + 800008d4: 00860613 addi x12,x12,8 + +00000000800008d8 : +Zkne_aes64esm_cg_cp_rs2_b9: + aes64esm x10, x13, x9 # perform operation + 800008d8: 36968533 aes64esm x10,x13,x9 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zkne_aes64esm_cg_cp_rs2_b9, Zkne_aes64esm_cg_cp_rs2_b9_str) + 800008dc: 000c3203 ld x4,0(x24) + 800008e0: 00a20c63 beq x4,x10,800008f8 + 800008e4: 01d0a2ef jal x5,8000b100 + 800008e8: 800008d8 .word 0x800008d8 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 80013d23 .word 0x80013d23 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x8555d4833ffa59ed + 800008fc: 00063c83 ld x25,0(x12) + 80000900: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x8f0269fb43a33048 + 80000904: 00063503 ld x10,0(x12) + 80000908: 00860613 addi x12,x12,8 + +000000008000090c : +Zkne_aes64esm_cg_cp_rs2_b10: + aes64esm x15, x25, x10 # perform operation + 8000090c: 36ac87b3 aes64esm x15,x25,x10 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zkne_aes64esm_cg_cp_rs2_b10, Zkne_aes64esm_cg_cp_rs2_b10_str) + 80000910: 000c3203 ld x4,0(x24) + 80000914: 00f20c63 beq x4,x15,8000092c + 80000918: 7e80a2ef jal x5,8000b100 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 80013d59 .word 0x80013d59 + 80000928: 00000000 .word 0x00000000 + 8000092c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x49a4bbeb7e6bee74 + 80000930: 00063a83 ld x21,0(x12) + 80000934: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xb6686416130064ee + 80000938: 00063583 ld x11,0(x12) + 8000093c: 00860613 addi x12,x12,8 + +0000000080000940 : +Zkne_aes64esm_cg_cp_rs2_b11: + aes64esm x3, x21, x11 # perform operation + 80000940: 36ba81b3 aes64esm x3,x21,x11 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zkne_aes64esm_cg_cp_rs2_b11, Zkne_aes64esm_cg_cp_rs2_b11_str) + 80000944: 000c3203 ld x4,0(x24) + 80000948: 00320c63 beq x4,x3,80000960 + 8000094c: 7b40a2ef jal x5,8000b100 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 80013d90 .word 0x80013d90 + 8000095c: 00000000 .word 0x00000000 + 80000960: 008c0c13 addi x24,x24,8 + + mv x19, x12 # switch data pointer register to avoid conflict with test + 80000964: 00060993 addi x19,x12,0 +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0xc17bd27d8e7b4ad1 + 80000968: 0009b383 ld x7,0(x19) + 8000096c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0x409423365d3b6565 + 80000970: 0009b603 ld x12,0(x19) + 80000974: 00898993 addi x19,x19,8 + +0000000080000978 : +Zkne_aes64esm_cg_cp_rs2_b12: + aes64esm x16, x7, x12 # perform operation + 80000978: 36c38833 aes64esm x16,x7,x12 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zkne_aes64esm_cg_cp_rs2_b12, Zkne_aes64esm_cg_cp_rs2_b12_str) + 8000097c: 000c3203 ld x4,0(x24) + 80000980: 01020c63 beq x4,x16,80000998 + 80000984: 77c0a2ef jal x5,8000b100 + 80000988: 80000978 .word 0x80000978 + 8000098c: 00000000 .word 0x00000000 + 80000990: 80013dc7 .word 0x80013dc7 + 80000994: 00000000 .word 0x00000000 + 80000998: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xa40e9e1ee1a06acb + 8000099c: 0009b403 ld x8,0(x19) + 800009a0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0x2d7c7edf2fcce4bb + 800009a4: 0009b683 ld x13,0(x19) + 800009a8: 00898993 addi x19,x19,8 + +00000000800009ac : +Zkne_aes64esm_cg_cp_rs2_b13: + aes64esm x7, x8, x13 # perform operation + 800009ac: 36d403b3 aes64esm x7,x8,x13 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zkne_aes64esm_cg_cp_rs2_b13, Zkne_aes64esm_cg_cp_rs2_b13_str) + 800009b0: 000c3203 ld x4,0(x24) + 800009b4: 00720c63 beq x4,x7,800009cc + 800009b8: 7480a2ef jal x5,8000b100 + 800009bc: 800009ac .word 0x800009ac + 800009c0: 00000000 .word 0x00000000 + 800009c4: 80013dfe .word 0x80013dfe + 800009c8: 00000000 .word 0x00000000 + 800009cc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xeede3d1cd2d86205 + 800009d0: 0009b303 ld x6,0(x19) + 800009d4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0xb563680b4fac105e + 800009d8: 0009b703 ld x14,0(x19) + 800009dc: 00898993 addi x19,x19,8 + +00000000800009e0 : +Zkne_aes64esm_cg_cp_rs2_b14: + aes64esm x11, x6, x14 # perform operation + 800009e0: 36e305b3 aes64esm x11,x6,x14 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zkne_aes64esm_cg_cp_rs2_b14, Zkne_aes64esm_cg_cp_rs2_b14_str) + 800009e4: 000c3203 ld x4,0(x24) + 800009e8: 00b20c63 beq x4,x11,80000a00 + 800009ec: 7140a2ef jal x5,8000b100 + 800009f0: 800009e0 .word 0x800009e0 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 80013e35 .word 0x80013e35 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x20) # load rs1: x20 = 0xeb18ba5ee96940de + 80000a04: 0009ba03 ld x20,0(x19) + 80000a08: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0x91076a3c05d54716 + 80000a0c: 0009b783 ld x15,0(x19) + 80000a10: 00898993 addi x19,x19,8 + +0000000080000a14 : +Zkne_aes64esm_cg_cp_rs2_b15: + aes64esm x11, x20, x15 # perform operation + 80000a14: 36fa05b3 aes64esm x11,x20,x15 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zkne_aes64esm_cg_cp_rs2_b15, Zkne_aes64esm_cg_cp_rs2_b15_str) + 80000a18: 000c3203 ld x4,0(x24) + 80000a1c: 00b20c63 beq x4,x11,80000a34 + 80000a20: 6e00a2ef jal x5,8000b100 + 80000a24: 80000a14 .word 0x80000a14 + 80000a28: 00000000 .word 0x00000000 + 80000a2c: 80013e6c .word 0x80013e6c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x29) # load rs1: x29 = 0x4f6ee92322da69b2 + 80000a38: 0009be83 ld x29,0(x19) + 80000a3c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0xea6a74ccfeb12044 + 80000a40: 0009b803 ld x16,0(x19) + 80000a44: 00898993 addi x19,x19,8 + +0000000080000a48 : +Zkne_aes64esm_cg_cp_rs2_b16: + aes64esm x7, x29, x16 # perform operation + 80000a48: 370e83b3 aes64esm x7,x29,x16 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zkne_aes64esm_cg_cp_rs2_b16, Zkne_aes64esm_cg_cp_rs2_b16_str) + 80000a4c: 000c3203 ld x4,0(x24) + 80000a50: 00720c63 beq x4,x7,80000a68 + 80000a54: 6ac0a2ef jal x5,8000b100 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 80013ea3 .word 0x80013ea3 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x25) # load rs1: x25 = 0x6fe6376e633e3e39 + 80000a6c: 0009bc83 ld x25,0(x19) + 80000a70: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xd1dfeb830d1b0b8f + 80000a74: 0009b883 ld x17,0(x19) + 80000a78: 00898993 addi x19,x19,8 + +0000000080000a7c : +Zkne_aes64esm_cg_cp_rs2_b17: + aes64esm x3, x25, x17 # perform operation + 80000a7c: 371c81b3 aes64esm x3,x25,x17 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zkne_aes64esm_cg_cp_rs2_b17, Zkne_aes64esm_cg_cp_rs2_b17_str) + 80000a80: 000c3203 ld x4,0(x24) + 80000a84: 00320c63 beq x4,x3,80000a9c + 80000a88: 6780a2ef jal x5,8000b100 + 80000a8c: 80000a7c .word 0x80000a7c + 80000a90: 00000000 .word 0x00000000 + 80000a94: 80013eda .word 0x80013eda + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x622e9608be20f6bd + 80000aa0: 0009b883 ld x17,0(x19) + 80000aa4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x2809bb06b687bb2a + 80000aa8: 0009b903 ld x18,0(x19) + 80000aac: 00898993 addi x19,x19,8 + +0000000080000ab0 : +Zkne_aes64esm_cg_cp_rs2_b18: + aes64esm x8, x17, x18 # perform operation + 80000ab0: 37288433 aes64esm x8,x17,x18 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zkne_aes64esm_cg_cp_rs2_b18, Zkne_aes64esm_cg_cp_rs2_b18_str) + 80000ab4: 000c3203 ld x4,0(x24) + 80000ab8: 00820c63 beq x4,x8,80000ad0 + 80000abc: 6440a2ef jal x5,8000b100 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 80013f11 .word 0x80013f11 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 008c0c13 addi x24,x24,8 + + mv x26, x19 # switch data pointer register to avoid conflict with test + 80000ad4: 00098d13 addi x26,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x41679466a8930c2e + 80000ad8: 000d3703 ld x14,0(x26) + 80000adc: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x2a4aad7748820e71 + 80000ae0: 000d3983 ld x19,0(x26) + 80000ae4: 008d0d13 addi x26,x26,8 + +0000000080000ae8 : +Zkne_aes64esm_cg_cp_rs2_b19: + aes64esm x0, x14, x19 # perform operation + 80000ae8: 37370033 aes64esm x0,x14,x19 + # Check if x0 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x0, Zkne_aes64esm_cg_cp_rs2_b19, Zkne_aes64esm_cg_cp_rs2_b19_str) + 80000aec: 000c3203 ld x4,0(x24) + 80000af0: 00020c63 beq x4,x0,80000b08 + 80000af4: 60c0a2ef jal x5,8000b100 + 80000af8: 80000ae8 .word 0x80000ae8 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 80013f48 .word 0x80013f48 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x28) # load rs1: x28 = 0xdd6e3169dc8abe3a + 80000b0c: 000d3e03 ld x28,0(x26) + 80000b10: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xe17fe2c106d4857d + 80000b14: 000d3a03 ld x20,0(x26) + 80000b18: 008d0d13 addi x26,x26,8 + +0000000080000b1c : +Zkne_aes64esm_cg_cp_rs2_b20: + aes64esm x15, x28, x20 # perform operation + 80000b1c: 374e07b3 aes64esm x15,x28,x20 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zkne_aes64esm_cg_cp_rs2_b20, Zkne_aes64esm_cg_cp_rs2_b20_str) + 80000b20: 000c3203 ld x4,0(x24) + 80000b24: 00f20c63 beq x4,x15,80000b3c + 80000b28: 5d80a2ef jal x5,8000b100 + 80000b2c: 80000b1c .word 0x80000b1c + 80000b30: 00000000 .word 0x00000000 + 80000b34: 80013f7f .word 0x80013f7f + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x29) # load rs1: x29 = 0x540e21b96a30f35d + 80000b40: 000d3e83 ld x29,0(x26) + 80000b44: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x62aac6c1fbbcf405 + 80000b48: 000d3a83 ld x21,0(x26) + 80000b4c: 008d0d13 addi x26,x26,8 + +0000000080000b50 : +Zkne_aes64esm_cg_cp_rs2_b21: + aes64esm x17, x29, x21 # perform operation + 80000b50: 375e88b3 aes64esm x17,x29,x21 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zkne_aes64esm_cg_cp_rs2_b21, Zkne_aes64esm_cg_cp_rs2_b21_str) + 80000b54: 000c3203 ld x4,0(x24) + 80000b58: 01120c63 beq x4,x17,80000b70 + 80000b5c: 5a40a2ef jal x5,8000b100 + 80000b60: 80000b50 .word 0x80000b50 + 80000b64: 00000000 .word 0x00000000 + 80000b68: 80013fb6 .word 0x80013fb6 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x8) # load rs1: x8 = 0x86201aa37ac6d85c + 80000b74: 000d3403 ld x8,0(x26) + 80000b78: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x1578840598ec1cc6 + 80000b7c: 000d3b03 ld x22,0(x26) + 80000b80: 008d0d13 addi x26,x26,8 + +0000000080000b84 : +Zkne_aes64esm_cg_cp_rs2_b22: + aes64esm x23, x8, x22 # perform operation + 80000b84: 37640bb3 aes64esm x23,x8,x22 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zkne_aes64esm_cg_cp_rs2_b22, Zkne_aes64esm_cg_cp_rs2_b22_str) + 80000b88: 000c3203 ld x4,0(x24) + 80000b8c: 01720c63 beq x4,x23,80000ba4 + 80000b90: 5700a2ef jal x5,8000b100 + 80000b94: 80000b84 .word 0x80000b84 + 80000b98: 00000000 .word 0x00000000 + 80000b9c: 80013fed .word 0x80013fed + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x3) # load rs1: x3 = 0x1518829efc0d5271 + 80000ba8: 000d3183 ld x3,0(x26) + 80000bac: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0xdbee52081ee93097 + 80000bb0: 000d3b83 ld x23,0(x26) + 80000bb4: 008d0d13 addi x26,x26,8 + +0000000080000bb8 : +Zkne_aes64esm_cg_cp_rs2_b23: + aes64esm x25, x3, x23 # perform operation + 80000bb8: 37718cb3 aes64esm x25,x3,x23 + # Check if x25 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x25, Zkne_aes64esm_cg_cp_rs2_b23, Zkne_aes64esm_cg_cp_rs2_b23_str) + 80000bbc: 000c3203 ld x4,0(x24) + 80000bc0: 01920c63 beq x4,x25,80000bd8 + 80000bc4: 53c0a2ef jal x5,8000b100 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 80014024 .word 0x80014024 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 008c0c13 addi x24,x24,8 + + mv x11, x24 # switch signature pointer register to avoid conflict with test + 80000bdc: 000c0593 addi x11,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x5e23c7574770b272 + 80000be0: 000d3a03 ld x20,0(x26) + 80000be4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0xdeb4d23b9b72093f + 80000be8: 000d3c03 ld x24,0(x26) + 80000bec: 008d0d13 addi x26,x26,8 + +0000000080000bf0 : +Zkne_aes64esm_cg_cp_rs2_b24: + aes64esm x25, x20, x24 # perform operation + 80000bf0: 378a0cb3 aes64esm x25,x20,x24 + # Check if x25 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x25, Zkne_aes64esm_cg_cp_rs2_b24, Zkne_aes64esm_cg_cp_rs2_b24_str) + 80000bf4: 0005b203 ld x4,0(x11) + 80000bf8: 01920c63 beq x4,x25,80000c10 + 80000bfc: 5040a2ef jal x5,8000b100 + 80000c00: 80000bf0 .word 0x80000bf0 + 80000c04: 00000000 .word 0x00000000 + 80000c08: 8001405b .word 0x8001405b + 80000c0c: 00000000 .word 0x00000000 + 80000c10: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0xff7617f7c7ec7785 + 80000c14: 000d3903 ld x18,0(x26) + 80000c18: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0xc622629accf66b52 + 80000c1c: 000d3c83 ld x25,0(x26) + 80000c20: 008d0d13 addi x26,x26,8 + +0000000080000c24 : +Zkne_aes64esm_cg_cp_rs2_b25: + aes64esm x3, x18, x25 # perform operation + 80000c24: 379901b3 aes64esm x3,x18,x25 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zkne_aes64esm_cg_cp_rs2_b25, Zkne_aes64esm_cg_cp_rs2_b25_str) + 80000c28: 0005b203 ld x4,0(x11) + 80000c2c: 00320c63 beq x4,x3,80000c44 + 80000c30: 4d00a2ef jal x5,8000b100 + 80000c34: 80000c24 .word 0x80000c24 + 80000c38: 00000000 .word 0x00000000 + 80000c3c: 80014092 .word 0x80014092 + 80000c40: 00000000 .word 0x00000000 + 80000c44: 00858593 addi x11,x11,8 + + mv x25, x26 # switch data pointer register to avoid conflict with test + 80000c48: 000d0c93 addi x25,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x69f2195176040b1b + 80000c4c: 000cb803 ld x16,0(x25) + 80000c50: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0xe79b22f3949b8af7 + 80000c54: 000cbd03 ld x26,0(x25) + 80000c58: 008c8c93 addi x25,x25,8 + +0000000080000c5c : +Zkne_aes64esm_cg_cp_rs2_b26: + aes64esm x20, x16, x26 # perform operation + 80000c5c: 37a80a33 aes64esm x20,x16,x26 + # Check if x20 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x20, Zkne_aes64esm_cg_cp_rs2_b26, Zkne_aes64esm_cg_cp_rs2_b26_str) + 80000c60: 0005b203 ld x4,0(x11) + 80000c64: 01420c63 beq x4,x20,80000c7c + 80000c68: 4980a2ef jal x5,8000b100 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 800140c9 .word 0x800140c9 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xa5f40705d1f6bca3 + 80000c80: 000cb983 ld x19,0(x25) + 80000c84: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x75168a9d8678852b + 80000c88: 000cbd83 ld x27,0(x25) + 80000c8c: 008c8c93 addi x25,x25,8 + +0000000080000c90 : +Zkne_aes64esm_cg_cp_rs2_b27: + aes64esm x30, x19, x27 # perform operation + 80000c90: 37b98f33 aes64esm x30,x19,x27 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zkne_aes64esm_cg_cp_rs2_b27, Zkne_aes64esm_cg_cp_rs2_b27_str) + 80000c94: 0005b203 ld x4,0(x11) + 80000c98: 01e20c63 beq x4,x30,80000cb0 + 80000c9c: 4640a2ef jal x5,8000b100 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 80014100 .word 0x80014100 + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0x1287fa717c3815d1 + 80000cb4: 000cb383 ld x7,0(x25) + 80000cb8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xa598193ac6ee6abf + 80000cbc: 000cbe03 ld x28,0(x25) + 80000cc0: 008c8c93 addi x25,x25,8 + +0000000080000cc4 : +Zkne_aes64esm_cg_cp_rs2_b28: + aes64esm x24, x7, x28 # perform operation + 80000cc4: 37c38c33 aes64esm x24,x7,x28 + # Check if x24 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x24, Zkne_aes64esm_cg_cp_rs2_b28, Zkne_aes64esm_cg_cp_rs2_b28_str) + 80000cc8: 0005b203 ld x4,0(x11) + 80000ccc: 01820c63 beq x4,x24,80000ce4 + 80000cd0: 4300a2ef jal x5,8000b100 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 80014137 .word 0x80014137 + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs1: x26 = 0x44cd4e899ba07640 + 80000ce8: 000cbd03 ld x26,0(x25) + 80000cec: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x29) # load rs2: x29 = 0xd8efc5ecbd015eed + 80000cf0: 000cbe83 ld x29,0(x25) + 80000cf4: 008c8c93 addi x25,x25,8 + +0000000080000cf8 : +Zkne_aes64esm_cg_cp_rs2_b29: + aes64esm x30, x26, x29 # perform operation + 80000cf8: 37dd0f33 aes64esm x30,x26,x29 + # Check if x30 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x30, Zkne_aes64esm_cg_cp_rs2_b29, Zkne_aes64esm_cg_cp_rs2_b29_str) + 80000cfc: 0005b203 ld x4,0(x11) + 80000d00: 01e20c63 beq x4,x30,80000d18 + 80000d04: 3fc0a2ef jal x5,8000b100 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 8001416e .word 0x8001416e + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0x6fab856ca46c798f + 80000d1c: 000cb803 ld x16,0(x25) + 80000d20: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x7547a2e9b29805ac + 80000d24: 000cbf03 ld x30,0(x25) + 80000d28: 008c8c93 addi x25,x25,8 + +0000000080000d2c : +Zkne_aes64esm_cg_cp_rs2_b30: + aes64esm x7, x16, x30 # perform operation + 80000d2c: 37e803b3 aes64esm x7,x16,x30 + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zkne_aes64esm_cg_cp_rs2_b30, Zkne_aes64esm_cg_cp_rs2_b30_str) + 80000d30: 0005b203 ld x4,0(x11) + 80000d34: 00720c63 beq x4,x7,80000d4c + 80000d38: 3c80a2ef jal x5,8000b100 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 800141a5 .word 0x800141a5 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00858593 addi x11,x11,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x969a74a8d166deec + 80000d50: 000cbd83 ld x27,0(x25) + 80000d54: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs2: x31 = 0xba7af4f9a6ffb86c + 80000d58: 000cbf83 ld x31,0(x25) + 80000d5c: 008c8c93 addi x25,x25,8 + +0000000080000d60 : +Zkne_aes64esm_cg_cp_rs2_b31: + aes64esm x12, x27, x31 # perform operation + 80000d60: 37fd8633 aes64esm x12,x27,x31 + # Check if x12 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x12, Zkne_aes64esm_cg_cp_rs2_b31, Zkne_aes64esm_cg_cp_rs2_b31_str) + 80000d64: 0005b203 ld x4,0(x11) + 80000d68: 00c20c63 beq x4,x12,80000d80 + 80000d6c: 3940a2ef jal x5,8000b100 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 800141dc .word 0x800141dc + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x7345ca1733403f75 + 80000d84: 000cbf83 ld x31,0(x25) + 80000d88: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x4e6586bf14493ed2 + 80000d8c: 000cb403 ld x8,0(x25) + 80000d90: 008c8c93 addi x25,x25,8 + +0000000080000d94 : +Zkne_aes64esm_cg_cp_rd_b0: + aes64esm x0, x31, x8 # perform operation + 80000d94: 368f8033 aes64esm x0,x31,x8 + # Check if x0 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x0, Zkne_aes64esm_cg_cp_rd_b0, Zkne_aes64esm_cg_cp_rd_b0_str) + 80000d98: 0005b203 ld x4,0(x11) + 80000d9c: 00020c63 beq x4,x0,80000db4 + 80000da0: 3600a2ef jal x5,8000b100 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 80014213 .word 0x80014213 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0xdfd6e9409ba32d74 + 80000db8: 000cbf03 ld x30,0(x25) + 80000dbc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x26) # load rs2: x26 = 0x78b153ea28681ac0 + 80000dc0: 000cbd03 ld x26,0(x25) + 80000dc4: 008c8c93 addi x25,x25,8 + +0000000080000dc8 : +Zkne_aes64esm_cg_cp_rd_b1: + aes64esm x1, x30, x26 # perform operation + 80000dc8: 37af00b3 aes64esm x1,x30,x26 + # Check if x1 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x1, Zkne_aes64esm_cg_cp_rd_b1, Zkne_aes64esm_cg_cp_rd_b1_str) + 80000dcc: 0005b203 ld x4,0(x11) + 80000dd0: 00120c63 beq x4,x1,80000de8 + 80000dd4: 32c0a2ef jal x5,8000b100 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 80014248 .word 0x80014248 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x2daf586d84106f83 + 80000dec: 000cbf83 ld x31,0(x25) + 80000df0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xa641542701e4c50f + 80000df4: 000cbf03 ld x30,0(x25) + 80000df8: 008c8c93 addi x25,x25,8 + +0000000080000dfc : +Zkne_aes64esm_cg_cp_rd_b2: + aes64esm x2, x31, x30 # perform operation + 80000dfc: 37ef8133 aes64esm x2,x31,x30 + # Check if x2 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x2, Zkne_aes64esm_cg_cp_rd_b2, Zkne_aes64esm_cg_cp_rd_b2_str) + 80000e00: 0005b203 ld x4,0(x11) + 80000e04: 00220c63 beq x4,x2,80000e1c + 80000e08: 2f80a2ef jal x5,8000b100 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 8001427d .word 0x8001427d + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs1: x27 = 0x62ed5e875feaefaa + 80000e20: 000cbd83 ld x27,0(x25) + 80000e24: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs2: x15 = 0x31e236c6f7e25cb4 + 80000e28: 000cb783 ld x15,0(x25) + 80000e2c: 008c8c93 addi x25,x25,8 + +0000000080000e30 : +Zkne_aes64esm_cg_cp_rd_b3: + aes64esm x3, x27, x15 # perform operation + 80000e30: 36fd81b3 aes64esm x3,x27,x15 + # Check if x3 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x3, Zkne_aes64esm_cg_cp_rd_b3, Zkne_aes64esm_cg_cp_rd_b3_str) + 80000e34: 0005b203 ld x4,0(x11) + 80000e38: 00320c63 beq x4,x3,80000e50 + 80000e3c: 2c40a2ef jal x5,8000b100 + 80000e40: 80000e30 .word 0x80000e30 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 800142b2 .word 0x800142b2 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 00858593 addi x11,x11,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e54: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e58: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x25, x31) # load rs1: x31 = 0x8f32370aeca526b3 + 80000e5c: 000cbf83 ld x31,0(x25) + 80000e60: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs2: x18 = 0x1b1b6c6d79dc04c0 + 80000e64: 000cb903 ld x18,0(x25) + 80000e68: 008c8c93 addi x25,x25,8 + +0000000080000e6c : +Zkne_aes64esm_cg_cp_rd_b4: + aes64esm x4, x31, x18 # perform operation + 80000e6c: 372f8233 aes64esm x4,x31,x18 + # Check if x4 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x4, Zkne_aes64esm_cg_cp_rd_b4, Zkne_aes64esm_cg_cp_rd_b4_str) + 80000e70: 0005b683 ld x13,0(x11) + 80000e74: 00468c63 beq x13,x4,80000e8c + 80000e78: 2c80a76f jal x14,8000b140 + 80000e7c: 80000e6c .word 0x80000e6c + 80000e80: 00000000 .word 0x00000000 + 80000e84: 800142e7 .word 0x800142e7 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xd89081bbd18d113b + 80000e90: 000cba03 ld x20,0(x25) + 80000e94: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0x4471d3fbb2ec0778 + 80000e98: 000cbf03 ld x30,0(x25) + 80000e9c: 008c8c93 addi x25,x25,8 + +0000000080000ea0 : +Zkne_aes64esm_cg_cp_rd_b5: + aes64esm x5, x20, x30 # perform operation + 80000ea0: 37ea02b3 aes64esm x5,x20,x30 + # Check if x5 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x5, Zkne_aes64esm_cg_cp_rd_b5, Zkne_aes64esm_cg_cp_rd_b5_str) + 80000ea4: 0005b683 ld x13,0(x11) + 80000ea8: 00568c63 beq x13,x5,80000ec0 + 80000eac: 2940a76f jal x14,8000b140 + 80000eb0: 80000ea0 .word 0x80000ea0 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 8001431c .word 0x8001431c + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x14d78c5484cb5ddc + 80000ec4: 000cb903 ld x18,0(x25) + 80000ec8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs2: x17 = 0xd072b281a4b7aba3 + 80000ecc: 000cb883 ld x17,0(x25) + 80000ed0: 008c8c93 addi x25,x25,8 + +0000000080000ed4 : +Zkne_aes64esm_cg_cp_rd_b6: + aes64esm x6, x18, x17 # perform operation + 80000ed4: 37190333 aes64esm x6,x18,x17 + # Check if x6 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x6, Zkne_aes64esm_cg_cp_rd_b6, Zkne_aes64esm_cg_cp_rd_b6_str) + 80000ed8: 0005b683 ld x13,0(x11) + 80000edc: 00668c63 beq x13,x6,80000ef4 + 80000ee0: 2600a76f jal x14,8000b140 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 80014351 .word 0x80014351 + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x9f4a6c61be84cee1 + 80000ef8: 000cb903 ld x18,0(x25) + 80000efc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x120a7b42af6e0102 + 80000f00: 000cbd83 ld x27,0(x25) + 80000f04: 008c8c93 addi x25,x25,8 + +0000000080000f08 : +Zkne_aes64esm_cg_cp_rd_b7: + aes64esm x7, x18, x27 # perform operation + 80000f08: 37b903b3 aes64esm x7,x18,x27 + # Check if x7 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x7, Zkne_aes64esm_cg_cp_rd_b7, Zkne_aes64esm_cg_cp_rd_b7_str) + 80000f0c: 0005b683 ld x13,0(x11) + 80000f10: 00768c63 beq x13,x7,80000f28 + 80000f14: 22c0a76f jal x14,8000b140 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 80014386 .word 0x80014386 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x5bf40b928f098015 + 80000f2c: 000cbb83 ld x23,0(x25) + 80000f30: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs2: x10 = 0x3a08173a48ce54a5 + 80000f34: 000cb503 ld x10,0(x25) + 80000f38: 008c8c93 addi x25,x25,8 + +0000000080000f3c : +Zkne_aes64esm_cg_cp_rd_b8: + aes64esm x8, x23, x10 # perform operation + 80000f3c: 36ab8433 aes64esm x8,x23,x10 + # Check if x8 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x8, Zkne_aes64esm_cg_cp_rd_b8, Zkne_aes64esm_cg_cp_rd_b8_str) + 80000f40: 0005b683 ld x13,0(x11) + 80000f44: 00868c63 beq x13,x8,80000f5c + 80000f48: 1f80a76f jal x14,8000b140 + 80000f4c: 80000f3c .word 0x80000f3c + 80000f50: 00000000 .word 0x00000000 + 80000f54: 800143bb .word 0x800143bb + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x0daf4dba1c6b8728 + 80000f60: 000cbe03 ld x28,0(x25) + 80000f64: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x5) # load rs2: x5 = 0x1663eb53732adfe5 + 80000f68: 000cb283 ld x5,0(x25) + 80000f6c: 008c8c93 addi x25,x25,8 + +0000000080000f70 : +Zkne_aes64esm_cg_cp_rd_b9: + aes64esm x9, x28, x5 # perform operation + 80000f70: 365e04b3 aes64esm x9,x28,x5 + # Check if x9 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x9, Zkne_aes64esm_cg_cp_rd_b9, Zkne_aes64esm_cg_cp_rd_b9_str) + 80000f74: 0005b683 ld x13,0(x11) + 80000f78: 00968c63 beq x13,x9,80000f90 + 80000f7c: 1c40a76f jal x14,8000b140 + 80000f80: 80000f70 .word 0x80000f70 + 80000f84: 00000000 .word 0x00000000 + 80000f88: 800143f0 .word 0x800143f0 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x8ca05dccf4dd4676 + 80000f94: 000cba83 ld x21,0(x25) + 80000f98: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x1dabc2429ade911f + 80000f9c: 000cbd83 ld x27,0(x25) + 80000fa0: 008c8c93 addi x25,x25,8 + +0000000080000fa4 : +Zkne_aes64esm_cg_cp_rd_b10: + aes64esm x10, x21, x27 # perform operation + 80000fa4: 37ba8533 aes64esm x10,x21,x27 + # Check if x10 contains the expected result. x11 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x11, x14, x13, x10, Zkne_aes64esm_cg_cp_rd_b10, Zkne_aes64esm_cg_cp_rd_b10_str) + 80000fa8: 0005b683 ld x13,0(x11) + 80000fac: 00a68c63 beq x13,x10,80000fc4 + 80000fb0: 1900a76f jal x14,8000b140 + 80000fb4: 80000fa4 .word 0x80000fa4 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 80014425 .word 0x80014425 + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 00858593 addi x11,x11,8 + + mv x18, x11 # switch signature pointer register to avoid conflict with test + 80000fc8: 00058913 addi x18,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xb4fc1cb74d4d5f4b + 80000fcc: 000cbb03 ld x22,0(x25) + 80000fd0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xba2096808c57e45f + 80000fd4: 000cb103 ld x2,0(x25) + 80000fd8: 008c8c93 addi x25,x25,8 + +0000000080000fdc : +Zkne_aes64esm_cg_cp_rd_b11: + aes64esm x11, x22, x2 # perform operation + 80000fdc: 362b05b3 aes64esm x11,x22,x2 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zkne_aes64esm_cg_cp_rd_b11, Zkne_aes64esm_cg_cp_rd_b11_str) + 80000fe0: 00093683 ld x13,0(x18) + 80000fe4: 00b68c63 beq x13,x11,80000ffc + 80000fe8: 1580a76f jal x14,8000b140 + 80000fec: 80000fdc .word 0x80000fdc + 80000ff0: 00000000 .word 0x00000000 + 80000ff4: 8001445b .word 0x8001445b + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0xd39aaa6d73d5f86d + 80001000: 000cb583 ld x11,0(x25) + 80001004: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs2: x28 = 0xdef9f425a194ff62 + 80001008: 000cbe03 ld x28,0(x25) + 8000100c: 008c8c93 addi x25,x25,8 + +0000000080001010 : +Zkne_aes64esm_cg_cp_rd_b12: + aes64esm x12, x11, x28 # perform operation + 80001010: 37c58633 aes64esm x12,x11,x28 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zkne_aes64esm_cg_cp_rd_b12, Zkne_aes64esm_cg_cp_rd_b12_str) + 80001014: 00093683 ld x13,0(x18) + 80001018: 00c68c63 beq x13,x12,80001030 + 8000101c: 1240a76f jal x14,8000b140 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80014491 .word 0x80014491 + 8000102c: 00000000 .word 0x00000000 + 80001030: 00890913 addi x18,x18,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001034: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001038: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x3d1502da556a7962 + 8000103c: 000cbc03 ld x24,0(x25) + 80001040: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xcb796a796651d259 + 80001044: 000cbf03 ld x30,0(x25) + 80001048: 008c8c93 addi x25,x25,8 + +000000008000104c : +Zkne_aes64esm_cg_cp_rd_b13: + aes64esm x13, x24, x30 # perform operation + 8000104c: 37ec06b3 aes64esm x13,x24,x30 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zkne_aes64esm_cg_cp_rd_b13, Zkne_aes64esm_cg_cp_rd_b13_str) + 80001050: 00093203 ld x4,0(x18) + 80001054: 00d20c63 beq x4,x13,8000106c + 80001058: 0a80a2ef jal x5,8000b100 + 8000105c: 8000104c .word 0x8000104c + 80001060: 00000000 .word 0x00000000 + 80001064: 800144c7 .word 0x800144c7 + 80001068: 00000000 .word 0x00000000 + 8000106c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x1) # load rs1: x1 = 0xa5f2111321c4f5af + 80001070: 000cb083 ld x1,0(x25) + 80001074: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0x1944f9d42d65493f + 80001078: 000cb403 ld x8,0(x25) + 8000107c: 008c8c93 addi x25,x25,8 + +0000000080001080 : +Zkne_aes64esm_cg_cp_rd_b14: + aes64esm x14, x1, x8 # perform operation + 80001080: 36808733 aes64esm x14,x1,x8 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zkne_aes64esm_cg_cp_rd_b14, Zkne_aes64esm_cg_cp_rd_b14_str) + 80001084: 00093203 ld x4,0(x18) + 80001088: 00e20c63 beq x4,x14,800010a0 + 8000108c: 0740a2ef jal x5,8000b100 + 80001090: 80001080 .word 0x80001080 + 80001094: 00000000 .word 0x00000000 + 80001098: 800144fd .word 0x800144fd + 8000109c: 00000000 .word 0x00000000 + 800010a0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x2870ea8ee958cd83 + 800010a4: 000cbc03 ld x24,0(x25) + 800010a8: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs2: x9 = 0x505864e18784b09e + 800010ac: 000cb483 ld x9,0(x25) + 800010b0: 008c8c93 addi x25,x25,8 + +00000000800010b4 : +Zkne_aes64esm_cg_cp_rd_b15: + aes64esm x15, x24, x9 # perform operation + 800010b4: 369c07b3 aes64esm x15,x24,x9 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zkne_aes64esm_cg_cp_rd_b15, Zkne_aes64esm_cg_cp_rd_b15_str) + 800010b8: 00093203 ld x4,0(x18) + 800010bc: 00f20c63 beq x4,x15,800010d4 + 800010c0: 0400a2ef jal x5,8000b100 + 800010c4: 800010b4 .word 0x800010b4 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 80014533 .word 0x80014533 + 800010d0: 00000000 .word 0x00000000 + 800010d4: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x34626f7a3ced0e7a + 800010d8: 000cb883 ld x17,0(x25) + 800010dc: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs2: x20 = 0x1ad50667c6cdac3b + 800010e0: 000cba03 ld x20,0(x25) + 800010e4: 008c8c93 addi x25,x25,8 + +00000000800010e8 : +Zkne_aes64esm_cg_cp_rd_b16: + aes64esm x16, x17, x20 # perform operation + 800010e8: 37488833 aes64esm x16,x17,x20 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zkne_aes64esm_cg_cp_rd_b16, Zkne_aes64esm_cg_cp_rd_b16_str) + 800010ec: 00093203 ld x4,0(x18) + 800010f0: 01020c63 beq x4,x16,80001108 + 800010f4: 00c0a2ef jal x5,8000b100 + 800010f8: 800010e8 .word 0x800010e8 + 800010fc: 00000000 .word 0x00000000 + 80001100: 80014569 .word 0x80014569 + 80001104: 00000000 .word 0x00000000 + 80001108: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0x0f03b722af40098a + 8000110c: 000cbe03 ld x28,0(x25) + 80001110: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0x54f04ef475106b8d + 80001114: 000cbb83 ld x23,0(x25) + 80001118: 008c8c93 addi x25,x25,8 + +000000008000111c : +Zkne_aes64esm_cg_cp_rd_b17: + aes64esm x17, x28, x23 # perform operation + 8000111c: 377e08b3 aes64esm x17,x28,x23 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zkne_aes64esm_cg_cp_rd_b17, Zkne_aes64esm_cg_cp_rd_b17_str) + 80001120: 00093203 ld x4,0(x18) + 80001124: 01120c63 beq x4,x17,8000113c + 80001128: 7d9092ef jal x5,8000b100 + 8000112c: 8000111c .word 0x8000111c + 80001130: 00000000 .word 0x00000000 + 80001134: 8001459f .word 0x8001459f + 80001138: 00000000 .word 0x00000000 + 8000113c: 00890913 addi x18,x18,8 + + mv x26, x18 # switch signature pointer register to avoid conflict with test + 80001140: 00090d13 addi x26,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x28) # load rs1: x28 = 0xf6e83fa2c1acd0c4 + 80001144: 000cbe03 ld x28,0(x25) + 80001148: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x8) # load rs2: x8 = 0xa13a42a93e4c2333 + 8000114c: 000cb403 ld x8,0(x25) + 80001150: 008c8c93 addi x25,x25,8 + +0000000080001154 : +Zkne_aes64esm_cg_cp_rd_b18: + aes64esm x18, x28, x8 # perform operation + 80001154: 368e0933 aes64esm x18,x28,x8 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zkne_aes64esm_cg_cp_rd_b18, Zkne_aes64esm_cg_cp_rd_b18_str) + 80001158: 000d3203 ld x4,0(x26) + 8000115c: 01220c63 beq x4,x18,80001174 + 80001160: 7a1092ef jal x5,8000b100 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 800145d5 .word 0x800145d5 + 80001170: 00000000 .word 0x00000000 + 80001174: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x0) # load rs1: x0 = 0x99ef2978d0035209 + 80001178: 000cb003 ld x0,0(x25) + 8000117c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs2: x11 = 0x585aa04888fff7b9 + 80001180: 000cb583 ld x11,0(x25) + 80001184: 008c8c93 addi x25,x25,8 + +0000000080001188 : +Zkne_aes64esm_cg_cp_rd_b19: + aes64esm x19, x0, x11 # perform operation + 80001188: 36b009b3 aes64esm x19,x0,x11 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zkne_aes64esm_cg_cp_rd_b19, Zkne_aes64esm_cg_cp_rd_b19_str) + 8000118c: 000d3203 ld x4,0(x26) + 80001190: 01320c63 beq x4,x19,800011a8 + 80001194: 76d092ef jal x5,8000b100 + 80001198: 80001188 .word 0x80001188 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 8001460b .word 0x8001460b + 800011a4: 00000000 .word 0x00000000 + 800011a8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x7) # load rs1: x7 = 0xf6e99a028c97c402 + 800011ac: 000cb383 ld x7,0(x25) + 800011b0: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs2: x30 = 0xc13df2bb63974218 + 800011b4: 000cbf03 ld x30,0(x25) + 800011b8: 008c8c93 addi x25,x25,8 + +00000000800011bc : +Zkne_aes64esm_cg_cp_rd_b20: + aes64esm x20, x7, x30 # perform operation + 800011bc: 37e38a33 aes64esm x20,x7,x30 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zkne_aes64esm_cg_cp_rd_b20, Zkne_aes64esm_cg_cp_rd_b20_str) + 800011c0: 000d3203 ld x4,0(x26) + 800011c4: 01420c63 beq x4,x20,800011dc + 800011c8: 739092ef jal x5,8000b100 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 80014641 .word 0x80014641 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x9) # load rs1: x9 = 0x28b02d47ff22e807 + 800011e0: 000cb483 ld x9,0(x25) + 800011e4: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs2: x23 = 0xac947ad6d230247d + 800011e8: 000cbb83 ld x23,0(x25) + 800011ec: 008c8c93 addi x25,x25,8 + +00000000800011f0 : +Zkne_aes64esm_cg_cp_rd_b21: + aes64esm x21, x9, x23 # perform operation + 800011f0: 37748ab3 aes64esm x21,x9,x23 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zkne_aes64esm_cg_cp_rd_b21, Zkne_aes64esm_cg_cp_rd_b21_str) + 800011f4: 000d3203 ld x4,0(x26) + 800011f8: 01520c63 beq x4,x21,80001210 + 800011fc: 705092ef jal x5,8000b100 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 80014677 .word 0x80014677 + 8000120c: 00000000 .word 0x00000000 + 80001210: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x30) # load rs1: x30 = 0x5bd5a6e9da6525ed + 80001214: 000cbf03 ld x30,0(x25) + 80001218: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x6) # load rs2: x6 = 0x50fdc202d3a3450e + 8000121c: 000cb303 ld x6,0(x25) + 80001220: 008c8c93 addi x25,x25,8 + +0000000080001224 : +Zkne_aes64esm_cg_cp_rd_b22: + aes64esm x22, x30, x6 # perform operation + 80001224: 366f0b33 aes64esm x22,x30,x6 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zkne_aes64esm_cg_cp_rd_b22, Zkne_aes64esm_cg_cp_rd_b22_str) + 80001228: 000d3203 ld x4,0(x26) + 8000122c: 01620c63 beq x4,x22,80001244 + 80001230: 6d1092ef jal x5,8000b100 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 800146ad .word 0x800146ad + 80001240: 00000000 .word 0x00000000 + 80001244: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x57fed2611a1f457b + 80001248: 000cb903 ld x18,0(x25) + 8000124c: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x2) # load rs2: x2 = 0xa95490c19ecb82a9 + 80001250: 000cb103 ld x2,0(x25) + 80001254: 008c8c93 addi x25,x25,8 + +0000000080001258 : +Zkne_aes64esm_cg_cp_rd_b23: + aes64esm x23, x18, x2 # perform operation + 80001258: 36290bb3 aes64esm x23,x18,x2 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zkne_aes64esm_cg_cp_rd_b23, Zkne_aes64esm_cg_cp_rd_b23_str) + 8000125c: 000d3203 ld x4,0(x26) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 69d092ef jal x5,8000b100 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 800146e3 .word 0x800146e3 + 80001274: 00000000 .word 0x00000000 + 80001278: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x1f1159cb66f90afa + 8000127c: 000cb883 ld x17,0(x25) + 80001280: 008c8c93 addi x25,x25,8 + RVTEST_TESTDATA_LOAD_INT(x25, x27) # load rs2: x27 = 0x9356757e7a0165c5 + 80001284: 000cbd83 ld x27,0(x25) + 80001288: 008c8c93 addi x25,x25,8 + +000000008000128c : +Zkne_aes64esm_cg_cp_rd_b24: + aes64esm x24, x17, x27 # perform operation + 8000128c: 37b88c33 aes64esm x24,x17,x27 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zkne_aes64esm_cg_cp_rd_b24, Zkne_aes64esm_cg_cp_rd_b24_str) + 80001290: 000d3203 ld x4,0(x26) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 669092ef jal x5,8000b100 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 80014719 .word 0x80014719 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 008d0d13 addi x26,x26,8 + + mv x6, x25 # switch data pointer register to avoid conflict with test + 800012b0: 000c8313 addi x6,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xc611d6db5829523f + 800012b4: 00033403 ld x8,0(x6) + 800012b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x629d1974d9cc576c + 800012bc: 00033983 ld x19,0(x6) + 800012c0: 00830313 addi x6,x6,8 + +00000000800012c4 : +Zkne_aes64esm_cg_cp_rd_b25: + aes64esm x25, x8, x19 # perform operation + 800012c4: 37340cb3 aes64esm x25,x8,x19 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zkne_aes64esm_cg_cp_rd_b25, Zkne_aes64esm_cg_cp_rd_b25_str) + 800012c8: 000d3203 ld x4,0(x26) + 800012cc: 01920c63 beq x4,x25,800012e4 + 800012d0: 631092ef jal x5,8000b100 + 800012d4: 800012c4 .word 0x800012c4 + 800012d8: 00000000 .word 0x00000000 + 800012dc: 8001474f .word 0x8001474f + 800012e0: 00000000 .word 0x00000000 + 800012e4: 008d0d13 addi x26,x26,8 + + mv x23, x26 # switch signature pointer register to avoid conflict with test + 800012e8: 000d0b93 addi x23,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xf3ceb084f2b6b1f1 + 800012ec: 00033583 ld x11,0(x6) + 800012f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xad4b169b6ea1a803 + 800012f4: 00033e83 ld x29,0(x6) + 800012f8: 00830313 addi x6,x6,8 + +00000000800012fc : +Zkne_aes64esm_cg_cp_rd_b26: + aes64esm x26, x11, x29 # perform operation + 800012fc: 37d58d33 aes64esm x26,x11,x29 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cp_rd_b26, Zkne_aes64esm_cg_cp_rd_b26_str) + 80001300: 000bb203 ld x4,0(x23) + 80001304: 01a20c63 beq x4,x26,8000131c + 80001308: 5f9092ef jal x5,8000b100 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 80014785 .word 0x80014785 + 80001318: 00000000 .word 0x00000000 + 8000131c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x5dc1e90d7dd017a9 + 80001320: 00033c83 ld x25,0(x6) + 80001324: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x6f863637382b170d + 80001328: 00033a03 ld x20,0(x6) + 8000132c: 00830313 addi x6,x6,8 + +0000000080001330 : +Zkne_aes64esm_cg_cp_rd_b27: + aes64esm x27, x25, x20 # perform operation + 80001330: 374c8db3 aes64esm x27,x25,x20 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cp_rd_b27, Zkne_aes64esm_cg_cp_rd_b27_str) + 80001334: 000bb203 ld x4,0(x23) + 80001338: 01b20c63 beq x4,x27,80001350 + 8000133c: 5c5092ef jal x5,8000b100 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 800147bb .word 0x800147bb + 8000134c: 00000000 .word 0x00000000 + 80001350: 008b8b93 addi x23,x23,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x52e2232756bf3aa1 + 80001354: 00033e83 ld x29,0(x6) + 80001358: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xedcaa15acb97625c + 8000135c: 00033c03 ld x24,0(x6) + 80001360: 00830313 addi x6,x6,8 + +0000000080001364 : +Zkne_aes64esm_cg_cp_rd_b28: + aes64esm x28, x29, x24 # perform operation + 80001364: 378e8e33 aes64esm x28,x29,x24 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cp_rd_b28, Zkne_aes64esm_cg_cp_rd_b28_str) + 80001368: 000bb203 ld x4,0(x23) + 8000136c: 01c20c63 beq x4,x28,80001384 + 80001370: 591092ef jal x5,8000b100 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 800147f1 .word 0x800147f1 + 80001380: 00000000 .word 0x00000000 + 80001384: 008b8b93 addi x23,x23,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x40685539afda651d + 80001388: 00033003 ld x0,0(x6) + 8000138c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x6511d73f95fcc74a + 80001390: 00033683 ld x13,0(x6) + 80001394: 00830313 addi x6,x6,8 + +0000000080001398 : +Zkne_aes64esm_cg_cp_rd_b29: + aes64esm x29, x0, x13 # perform operation + 80001398: 36d00eb3 aes64esm x29,x0,x13 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cp_rd_b29, Zkne_aes64esm_cg_cp_rd_b29_str) + 8000139c: 000bb203 ld x4,0(x23) + 800013a0: 01d20c63 beq x4,x29,800013b8 + 800013a4: 55d092ef jal x5,8000b100 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 80014827 .word 0x80014827 + 800013b4: 00000000 .word 0x00000000 + 800013b8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xf18e226c251e5c5d + 800013bc: 00033e03 ld x28,0(x6) + 800013c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5158fa94452cd0e8 + 800013c4: 00033b03 ld x22,0(x6) + 800013c8: 00830313 addi x6,x6,8 + +00000000800013cc : +Zkne_aes64esm_cg_cp_rd_b30: + aes64esm x30, x28, x22 # perform operation + 800013cc: 376e0f33 aes64esm x30,x28,x22 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cp_rd_b30, Zkne_aes64esm_cg_cp_rd_b30_str) + 800013d0: 000bb203 ld x4,0(x23) + 800013d4: 01e20c63 beq x4,x30,800013ec + 800013d8: 529092ef jal x5,8000b100 + 800013dc: 800013cc .word 0x800013cc + 800013e0: 00000000 .word 0x00000000 + 800013e4: 8001485d .word 0x8001485d + 800013e8: 00000000 .word 0x00000000 + 800013ec: 008b8b93 addi x23,x23,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xc76b726e254c439c + 800013f0: 00033383 ld x7,0(x6) + 800013f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xef34c6893ef311e1 + 800013f8: 00033483 ld x9,0(x6) + 800013fc: 00830313 addi x6,x6,8 + +0000000080001400 : +Zkne_aes64esm_cg_cp_rd_b31: + aes64esm x31, x7, x9 # perform operation + 80001400: 36938fb3 aes64esm x31,x7,x9 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cp_rd_b31, Zkne_aes64esm_cg_cp_rd_b31_str) + 80001404: 000bb203 ld x4,0(x23) + 80001408: 01f20c63 beq x4,x31,80001420 + 8000140c: 4f5092ef jal x5,8000b100 + 80001410: 80001400 .word 0x80001400 + 80001414: 00000000 .word 0x00000000 + 80001418: 80014893 .word 0x80014893 + 8000141c: 00000000 .word 0x00000000 + 80001420: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000000000000 + 80001424: 00033083 ld x1,0(x6) + 80001428: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0dd2b949e792ac11 + 8000142c: 00033883 ld x17,0(x6) + 80001430: 00830313 addi x6,x6,8 + +0000000080001434 : +Zkne_aes64esm_cg_cp_rs1_edges_0x0: + aes64esm x18, x1, x17 # perform operation + 80001434: 37108933 aes64esm x18,x1,x17 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cp_rs1_edges_0x0, Zkne_aes64esm_cg_cp_rs1_edges_0x0_str) + 80001438: 000bb203 ld x4,0(x23) + 8000143c: 01220c63 beq x4,x18,80001454 + 80001440: 4c1092ef jal x5,8000b100 + 80001444: 80001434 .word 0x80001434 + 80001448: 00000000 .word 0x00000000 + 8000144c: 800148c9 .word 0x800148c9 + 80001450: 00000000 .word 0x00000000 + 80001454: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000001 + 80001458: 00033983 ld x19,0(x6) + 8000145c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xb3b701aa6e3b6f1d + 80001460: 00033a83 ld x21,0(x6) + 80001464: 00830313 addi x6,x6,8 + +0000000080001468 : +Zkne_aes64esm_cg_cp_rs1_edges_0x1: + aes64esm x27, x19, x21 # perform operation + 80001468: 37598db3 aes64esm x27,x19,x21 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cp_rs1_edges_0x1, Zkne_aes64esm_cg_cp_rs1_edges_0x1_str) + 8000146c: 000bb203 ld x4,0(x23) + 80001470: 01b20c63 beq x4,x27,80001488 + 80001474: 48d092ef jal x5,8000b100 + 80001478: 80001468 .word 0x80001468 + 8000147c: 00000000 .word 0x00000000 + 80001480: 80014906 .word 0x80014906 + 80001484: 00000000 .word 0x00000000 + 80001488: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000000000002 + 8000148c: 00033e83 ld x29,0(x6) + 80001490: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x1b552d49f7883847 + 80001494: 00033f83 ld x31,0(x6) + 80001498: 00830313 addi x6,x6,8 + +000000008000149c : +Zkne_aes64esm_cg_cp_rs1_edges_0x2: + aes64esm x25, x29, x31 # perform operation + 8000149c: 37fe8cb3 aes64esm x25,x29,x31 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cp_rs1_edges_0x2, Zkne_aes64esm_cg_cp_rs1_edges_0x2_str) + 800014a0: 000bb203 ld x4,0(x23) + 800014a4: 01920c63 beq x4,x25,800014bc + 800014a8: 459092ef jal x5,8000b100 + 800014ac: 8000149c .word 0x8000149c + 800014b0: 00000000 .word 0x00000000 + 800014b4: 80014943 .word 0x80014943 + 800014b8: 00000000 .word 0x00000000 + 800014bc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8000000000000000 + 800014c0: 00033983 ld x19,0(x6) + 800014c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xd9b2d73bf257c979 + 800014c8: 00033783 ld x15,0(x6) + 800014cc: 00830313 addi x6,x6,8 + +00000000800014d0 : +Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000000: + aes64esm x28, x19, x15 # perform operation + 800014d0: 36f98e33 aes64esm x28,x19,x15 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000000, Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d4: 000bb203 ld x4,0(x23) + 800014d8: 01c20c63 beq x4,x28,800014f0 + 800014dc: 425092ef jal x5,8000b100 + 800014e0: 800014d0 .word 0x800014d0 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 80014980 .word 0x80014980 + 800014ec: 00000000 .word 0x00000000 + 800014f0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x8000000000000001 + 800014f4: 00033e03 ld x28,0(x6) + 800014f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xbdec514e5da0ab8b + 800014fc: 00033403 ld x8,0(x6) + 80001500: 00830313 addi x6,x6,8 + +0000000080001504 : +Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000001: + aes64esm x21, x28, x8 # perform operation + 80001504: 368e0ab3 aes64esm x21,x28,x8 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000001, Zkne_aes64esm_cg_cp_rs1_edges_0x8000000000000001_str) + 80001508: 000bb203 ld x4,0(x23) + 8000150c: 01520c63 beq x4,x21,80001524 + 80001510: 3f1092ef jal x5,8000b100 + 80001514: 80001504 .word 0x80001504 + 80001518: 00000000 .word 0x00000000 + 8000151c: 800149cd .word 0x800149cd + 80001520: 00000000 .word 0x00000000 + 80001524: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x7fffffffffffffff + 80001528: 00033703 ld x14,0(x6) + 8000152c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xdaa74a01c2c5adfa + 80001530: 00033083 ld x1,0(x6) + 80001534: 00830313 addi x6,x6,8 + +0000000080001538 : +Zkne_aes64esm_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64esm x13, x14, x1 # perform operation + 80001538: 361706b3 aes64esm x13,x14,x1 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cp_rs1_edges_0x7fffffffffffffff, Zkne_aes64esm_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 8000153c: 000bb203 ld x4,0(x23) + 80001540: 00d20c63 beq x4,x13,80001558 + 80001544: 3bd092ef jal x5,8000b100 + 80001548: 80001538 .word 0x80001538 + 8000154c: 00000000 .word 0x00000000 + 80001550: 80014a1a .word 0x80014a1a + 80001554: 00000000 .word 0x00000000 + 80001558: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7ffffffffffffffe + 8000155c: 00033b03 ld x22,0(x6) + 80001560: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x5464852de554e332 + 80001564: 00033883 ld x17,0(x6) + 80001568: 00830313 addi x6,x6,8 + +000000008000156c : +Zkne_aes64esm_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64esm x16, x22, x17 # perform operation + 8000156c: 371b0833 aes64esm x16,x22,x17 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_edges_0x7ffffffffffffffe, Zkne_aes64esm_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001570: 000bb203 ld x4,0(x23) + 80001574: 01020c63 beq x4,x16,8000158c + 80001578: 389092ef jal x5,8000b100 + 8000157c: 8000156c .word 0x8000156c + 80001580: 00000000 .word 0x00000000 + 80001584: 80014a67 .word 0x80014a67 + 80001588: 00000000 .word 0x00000000 + 8000158c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xffffffffffffffff + 80001590: 00033b03 ld x22,0(x6) + 80001594: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x67ac902416bc0d0c + 80001598: 00033803 ld x16,0(x6) + 8000159c: 00830313 addi x6,x6,8 + +00000000800015a0 : +Zkne_aes64esm_cg_cp_rs1_edges_0xffffffffffffffff: + aes64esm x19, x22, x16 # perform operation + 800015a0: 370b09b3 aes64esm x19,x22,x16 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cp_rs1_edges_0xffffffffffffffff, Zkne_aes64esm_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a4: 000bb203 ld x4,0(x23) + 800015a8: 01320c63 beq x4,x19,800015c0 + 800015ac: 355092ef jal x5,8000b100 + 800015b0: 800015a0 .word 0x800015a0 + 800015b4: 00000000 .word 0x00000000 + 800015b8: 80014ab4 .word 0x80014ab4 + 800015bc: 00000000 .word 0x00000000 + 800015c0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xfffffffffffffffe + 800015c4: 00033a83 ld x21,0(x6) + 800015c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xe9833a8e5faa505e + 800015cc: 00033a03 ld x20,0(x6) + 800015d0: 00830313 addi x6,x6,8 + +00000000800015d4 : +Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64esm x9, x21, x20 # perform operation + 800015d4: 374a84b3 aes64esm x9,x21,x20 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffffffffffe, Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d8: 000bb203 ld x4,0(x23) + 800015dc: 00920c63 beq x4,x9,800015f4 + 800015e0: 321092ef jal x5,8000b100 + 800015e4: 800015d4 .word 0x800015d4 + 800015e8: 00000000 .word 0x00000000 + 800015ec: 80014b01 .word 0x80014b01 + 800015f0: 00000000 .word 0x00000000 + 800015f4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800015f8: 00033e03 ld x28,0(x6) + 800015fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xd4faa653feafcd5c + 80001600: 00033c83 ld x25,0(x6) + 80001604: 00830313 addi x6,x6,8 + +0000000080001608 : +Zkne_aes64esm_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64esm x7, x28, x25 # perform operation + 80001608: 379e03b3 aes64esm x7,x28,x25 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 8000160c: 000bb203 ld x4,0(x23) + 80001610: 00720c63 beq x4,x7,80001628 + 80001614: 2ed092ef jal x5,8000b100 + 80001618: 80001608 .word 0x80001608 + 8000161c: 00000000 .word 0x00000000 + 80001620: 80014b4e .word 0x80014b4e + 80001624: 00000000 .word 0x00000000 + 80001628: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 8000162c: 00033f83 ld x31,0(x6) + 80001630: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xce4b819d068a1cce + 80001634: 00033383 ld x7,0(x6) + 80001638: 00830313 addi x6,x6,8 + +000000008000163c : +Zkne_aes64esm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64esm x15, x31, x7 # perform operation + 8000163c: 367f87b3 aes64esm x15,x31,x7 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001640: 000bb203 ld x4,0(x23) + 80001644: 00f20c63 beq x4,x15,8000165c + 80001648: 2b9092ef jal x5,8000b100 + 8000164c: 8000163c .word 0x8000163c + 80001650: 00000000 .word 0x00000000 + 80001654: 80014b9b .word 0x80014b9b + 80001658: 00000000 .word 0x00000000 + 8000165c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x5555555555555555 + 80001660: 00033783 ld x15,0(x6) + 80001664: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xd610ecdf61dd5b1e + 80001668: 00033883 ld x17,0(x6) + 8000166c: 00830313 addi x6,x6,8 + +0000000080001670 : +Zkne_aes64esm_cg_cp_rs1_edges_0x5555555555555555: + aes64esm x16, x15, x17 # perform operation + 80001670: 37178833 aes64esm x16,x15,x17 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_edges_0x5555555555555555, Zkne_aes64esm_cg_cp_rs1_edges_0x5555555555555555_str) + 80001674: 000bb203 ld x4,0(x23) + 80001678: 01020c63 beq x4,x16,80001690 + 8000167c: 285092ef jal x5,8000b100 + 80001680: 80001670 .word 0x80001670 + 80001684: 00000000 .word 0x00000000 + 80001688: 80014be8 .word 0x80014be8 + 8000168c: 00000000 .word 0x00000000 + 80001690: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x00000000ffffffff + 80001694: 00033d03 ld x26,0(x6) + 80001698: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x17e47360bc977e2b + 8000169c: 00033783 ld x15,0(x6) + 800016a0: 00830313 addi x6,x6,8 + +00000000800016a4 : +Zkne_aes64esm_cg_cp_rs1_edges_0xffffffff: + aes64esm x31, x26, x15 # perform operation + 800016a4: 36fd0fb3 aes64esm x31,x26,x15 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cp_rs1_edges_0xffffffff, Zkne_aes64esm_cg_cp_rs1_edges_0xffffffff_str) + 800016a8: 000bb203 ld x4,0(x23) + 800016ac: 01f20c63 beq x4,x31,800016c4 + 800016b0: 251092ef jal x5,8000b100 + 800016b4: 800016a4 .word 0x800016a4 + 800016b8: 00000000 .word 0x00000000 + 800016bc: 80014c35 .word 0x80014c35 + 800016c0: 00000000 .word 0x00000000 + 800016c4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x00000000fffffffe + 800016c8: 00033e03 ld x28,0(x6) + 800016cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x91359fbe174922b7 + 800016d0: 00033083 ld x1,0(x6) + 800016d4: 00830313 addi x6,x6,8 + +00000000800016d8 : +Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffe: + aes64esm x16, x28, x1 # perform operation + 800016d8: 361e0833 aes64esm x16,x28,x1 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffe, Zkne_aes64esm_cg_cp_rs1_edges_0xfffffffe_str) + 800016dc: 000bb203 ld x4,0(x23) + 800016e0: 01020c63 beq x4,x16,800016f8 + 800016e4: 21d092ef jal x5,8000b100 + 800016e8: 800016d8 .word 0x800016d8 + 800016ec: 00000000 .word 0x00000000 + 800016f0: 80014c7a .word 0x80014c7a + 800016f4: 00000000 .word 0x00000000 + 800016f8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0000000100000000 + 800016fc: 00033783 ld x15,0(x6) + 80001700: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x98abe0cfc8e96d77 + 80001704: 00033d03 ld x26,0(x6) + 80001708: 00830313 addi x6,x6,8 + +000000008000170c : +Zkne_aes64esm_cg_cp_rs1_edges_0x100000000: + aes64esm x27, x15, x26 # perform operation + 8000170c: 37a78db3 aes64esm x27,x15,x26 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cp_rs1_edges_0x100000000, Zkne_aes64esm_cg_cp_rs1_edges_0x100000000_str) + 80001710: 000bb203 ld x4,0(x23) + 80001714: 01b20c63 beq x4,x27,8000172c + 80001718: 1e9092ef jal x5,8000b100 + 8000171c: 8000170c .word 0x8000170c + 80001720: 00000000 .word 0x00000000 + 80001724: 80014cbf .word 0x80014cbf + 80001728: 00000000 .word 0x00000000 + 8000172c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000100000001 + 80001730: 00033a83 ld x21,0(x6) + 80001734: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7d37fc3f276a9b8f + 80001738: 00033e83 ld x29,0(x6) + 8000173c: 00830313 addi x6,x6,8 + +0000000080001740 : +Zkne_aes64esm_cg_cp_rs1_edges_0x100000001: + aes64esm x8, x21, x29 # perform operation + 80001740: 37da8433 aes64esm x8,x21,x29 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cp_rs1_edges_0x100000001, Zkne_aes64esm_cg_cp_rs1_edges_0x100000001_str) + 80001744: 000bb203 ld x4,0(x23) + 80001748: 00820c63 beq x4,x8,80001760 + 8000174c: 1b5092ef jal x5,8000b100 + 80001750: 80001740 .word 0x80001740 + 80001754: 00000000 .word 0x00000000 + 80001758: 80014d05 .word 0x80014d05 + 8000175c: 00000000 .word 0x00000000 + 80001760: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xe03801b2ad5ed4c0 + 80001764: 00033e83 ld x29,0(x6) + 80001768: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0000000000000000 + 8000176c: 00033883 ld x17,0(x6) + 80001770: 00830313 addi x6,x6,8 + +0000000080001774 : +Zkne_aes64esm_cg_cp_rs2_edges_0x0: + aes64esm x20, x29, x17 # perform operation + 80001774: 371e8a33 aes64esm x20,x29,x17 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cp_rs2_edges_0x0, Zkne_aes64esm_cg_cp_rs2_edges_0x0_str) + 80001778: 000bb203 ld x4,0(x23) + 8000177c: 01420c63 beq x4,x20,80001794 + 80001780: 181092ef jal x5,8000b100 + 80001784: 80001774 .word 0x80001774 + 80001788: 00000000 .word 0x00000000 + 8000178c: 80014d4b .word 0x80014d4b + 80001790: 00000000 .word 0x00000000 + 80001794: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x3ec00040c702ae1e + 80001798: 00033083 ld x1,0(x6) + 8000179c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0000000000000001 + 800017a0: 00033e83 ld x29,0(x6) + 800017a4: 00830313 addi x6,x6,8 + +00000000800017a8 : +Zkne_aes64esm_cg_cp_rs2_edges_0x1: + aes64esm x12, x1, x29 # perform operation + 800017a8: 37d08633 aes64esm x12,x1,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cp_rs2_edges_0x1, Zkne_aes64esm_cg_cp_rs2_edges_0x1_str) + 800017ac: 000bb203 ld x4,0(x23) + 800017b0: 00c20c63 beq x4,x12,800017c8 + 800017b4: 14d092ef jal x5,8000b100 + 800017b8: 800017a8 .word 0x800017a8 + 800017bc: 00000000 .word 0x00000000 + 800017c0: 80014d89 .word 0x80014d89 + 800017c4: 00000000 .word 0x00000000 + 800017c8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x9125fb5676dce8f2 + 800017cc: 00033383 ld x7,0(x6) + 800017d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0000000000000002 + 800017d4: 00033603 ld x12,0(x6) + 800017d8: 00830313 addi x6,x6,8 + +00000000800017dc : +Zkne_aes64esm_cg_cp_rs2_edges_0x2: + aes64esm x9, x7, x12 # perform operation + 800017dc: 36c384b3 aes64esm x9,x7,x12 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cp_rs2_edges_0x2, Zkne_aes64esm_cg_cp_rs2_edges_0x2_str) + 800017e0: 000bb203 ld x4,0(x23) + 800017e4: 00920c63 beq x4,x9,800017fc + 800017e8: 119092ef jal x5,8000b100 + 800017ec: 800017dc .word 0x800017dc + 800017f0: 00000000 .word 0x00000000 + 800017f4: 80014dc7 .word 0x80014dc7 + 800017f8: 00000000 .word 0x00000000 + 800017fc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x786f1fa0630addd7 + 80001800: 00033d83 ld x27,0(x6) + 80001804: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8000000000000000 + 80001808: 00033d03 ld x26,0(x6) + 8000180c: 00830313 addi x6,x6,8 + +0000000080001810 : +Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000000: + aes64esm x29, x27, x26 # perform operation + 80001810: 37ad8eb3 aes64esm x29,x27,x26 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000000, Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000000_str) + 80001814: 000bb203 ld x4,0(x23) + 80001818: 01d20c63 beq x4,x29,80001830 + 8000181c: 0e5092ef jal x5,8000b100 + 80001820: 80001810 .word 0x80001810 + 80001824: 00000000 .word 0x00000000 + 80001828: 80014e05 .word 0x80014e05 + 8000182c: 00000000 .word 0x00000000 + 80001830: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xbbbc41921aa7deb0 + 80001834: 00033883 ld x17,0(x6) + 80001838: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x8000000000000001 + 8000183c: 00033403 ld x8,0(x6) + 80001840: 00830313 addi x6,x6,8 + +0000000080001844 : +Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000001: + aes64esm x3, x17, x8 # perform operation + 80001844: 368881b3 aes64esm x3,x17,x8 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000001, Zkne_aes64esm_cg_cp_rs2_edges_0x8000000000000001_str) + 80001848: 000bb203 ld x4,0(x23) + 8000184c: 00320c63 beq x4,x3,80001864 + 80001850: 0b1092ef jal x5,8000b100 + 80001854: 80001844 .word 0x80001844 + 80001858: 00000000 .word 0x00000000 + 8000185c: 80014e52 .word 0x80014e52 + 80001860: 00000000 .word 0x00000000 + 80001864: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xe06a7e655d15ecd1 + 80001868: 00033783 ld x15,0(x6) + 8000186c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x7fffffffffffffff + 80001870: 00033c83 ld x25,0(x6) + 80001874: 00830313 addi x6,x6,8 + +0000000080001878 : +Zkne_aes64esm_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64esm x8, x15, x25 # perform operation + 80001878: 37978433 aes64esm x8,x15,x25 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cp_rs2_edges_0x7fffffffffffffff, Zkne_aes64esm_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 8000187c: 000bb203 ld x4,0(x23) + 80001880: 00820c63 beq x4,x8,80001898 + 80001884: 07d092ef jal x5,8000b100 + 80001888: 80001878 .word 0x80001878 + 8000188c: 00000000 .word 0x00000000 + 80001890: 80014e9f .word 0x80014e9f + 80001894: 00000000 .word 0x00000000 + 80001898: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xaee4df014578f358 + 8000189c: 00033d83 ld x27,0(x6) + 800018a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x7ffffffffffffffe + 800018a4: 00033983 ld x19,0(x6) + 800018a8: 00830313 addi x6,x6,8 + +00000000800018ac : +Zkne_aes64esm_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64esm x2, x27, x19 # perform operation + 800018ac: 373d8133 aes64esm x2,x27,x19 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cp_rs2_edges_0x7ffffffffffffffe, Zkne_aes64esm_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b0: 000bb203 ld x4,0(x23) + 800018b4: 00220c63 beq x4,x2,800018cc + 800018b8: 049092ef jal x5,8000b100 + 800018bc: 800018ac .word 0x800018ac + 800018c0: 00000000 .word 0x00000000 + 800018c4: 80014eec .word 0x80014eec + 800018c8: 00000000 .word 0x00000000 + 800018cc: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xa2b2178dee299d9d + 800018d0: 00033803 ld x16,0(x6) + 800018d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xffffffffffffffff + 800018d8: 00033103 ld x2,0(x6) + 800018dc: 00830313 addi x6,x6,8 + +00000000800018e0 : +Zkne_aes64esm_cg_cp_rs2_edges_0xffffffffffffffff: + aes64esm x1, x16, x2 # perform operation + 800018e0: 362800b3 aes64esm x1,x16,x2 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cp_rs2_edges_0xffffffffffffffff, Zkne_aes64esm_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e4: 000bb203 ld x4,0(x23) + 800018e8: 00120c63 beq x4,x1,80001900 + 800018ec: 015092ef jal x5,8000b100 + 800018f0: 800018e0 .word 0x800018e0 + 800018f4: 00000000 .word 0x00000000 + 800018f8: 80014f39 .word 0x80014f39 + 800018fc: 00000000 .word 0x00000000 + 80001900: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x8c0b0738a035605b + 80001904: 00033b03 ld x22,0(x6) + 80001908: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xfffffffffffffffe + 8000190c: 00033883 ld x17,0(x6) + 80001910: 00830313 addi x6,x6,8 + +0000000080001914 : +Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64esm x11, x22, x17 # perform operation + 80001914: 371b05b3 aes64esm x11,x22,x17 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffffffffffe, Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001918: 000bb203 ld x4,0(x23) + 8000191c: 00b20c63 beq x4,x11,80001934 + 80001920: 7e0092ef jal x5,8000b100 + 80001924: 80001914 .word 0x80001914 + 80001928: 00000000 .word 0x00000000 + 8000192c: 80014f86 .word 0x80014f86 + 80001930: 00000000 .word 0x00000000 + 80001934: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xec5618af7d3213a5 + 80001938: 00033683 ld x13,0(x6) + 8000193c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80001940: 00033603 ld x12,0(x6) + 80001944: 00830313 addi x6,x6,8 + +0000000080001948 : +Zkne_aes64esm_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64esm x10, x13, x12 # perform operation + 80001948: 36c68533 aes64esm x10,x13,x12 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 8000194c: 000bb203 ld x4,0(x23) + 80001950: 00a20c63 beq x4,x10,80001968 + 80001954: 7ac092ef jal x5,8000b100 + 80001958: 80001948 .word 0x80001948 + 8000195c: 00000000 .word 0x00000000 + 80001960: 80014fd3 .word 0x80014fd3 + 80001964: 00000000 .word 0x00000000 + 80001968: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x4f054c40487abb9b + 8000196c: 00033c83 ld x25,0(x6) + 80001970: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80001974: 00033403 ld x8,0(x6) + 80001978: 00830313 addi x6,x6,8 + +000000008000197c : +Zkne_aes64esm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64esm x28, x25, x8 # perform operation + 8000197c: 368c8e33 aes64esm x28,x25,x8 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001980: 000bb203 ld x4,0(x23) + 80001984: 01c20c63 beq x4,x28,8000199c + 80001988: 778092ef jal x5,8000b100 + 8000198c: 8000197c .word 0x8000197c + 80001990: 00000000 .word 0x00000000 + 80001994: 80015020 .word 0x80015020 + 80001998: 00000000 .word 0x00000000 + 8000199c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xe69eeaa728fffe51 + 800019a0: 00033a03 ld x20,0(x6) + 800019a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5555555555555555 + 800019a8: 00033703 ld x14,0(x6) + 800019ac: 00830313 addi x6,x6,8 + +00000000800019b0 : +Zkne_aes64esm_cg_cp_rs2_edges_0x5555555555555555: + aes64esm x28, x20, x14 # perform operation + 800019b0: 36ea0e33 aes64esm x28,x20,x14 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cp_rs2_edges_0x5555555555555555, Zkne_aes64esm_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b4: 000bb203 ld x4,0(x23) + 800019b8: 01c20c63 beq x4,x28,800019d0 + 800019bc: 744092ef jal x5,8000b100 + 800019c0: 800019b0 .word 0x800019b0 + 800019c4: 00000000 .word 0x00000000 + 800019c8: 8001506d .word 0x8001506d + 800019cc: 00000000 .word 0x00000000 + 800019d0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xde967d605aecb490 + 800019d4: 00033803 ld x16,0(x6) + 800019d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x00000000ffffffff + 800019dc: 00033d03 ld x26,0(x6) + 800019e0: 00830313 addi x6,x6,8 + +00000000800019e4 : +Zkne_aes64esm_cg_cp_rs2_edges_0xffffffff: + aes64esm x18, x16, x26 # perform operation + 800019e4: 37a80933 aes64esm x18,x16,x26 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cp_rs2_edges_0xffffffff, Zkne_aes64esm_cg_cp_rs2_edges_0xffffffff_str) + 800019e8: 000bb203 ld x4,0(x23) + 800019ec: 01220c63 beq x4,x18,80001a04 + 800019f0: 710092ef jal x5,8000b100 + 800019f4: 800019e4 .word 0x800019e4 + 800019f8: 00000000 .word 0x00000000 + 800019fc: 800150ba .word 0x800150ba + 80001a00: 00000000 .word 0x00000000 + 80001a04: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x69f6c92896db4d84 + 80001a08: 00033603 ld x12,0(x6) + 80001a0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x00000000fffffffe + 80001a10: 00033f03 ld x30,0(x6) + 80001a14: 00830313 addi x6,x6,8 + +0000000080001a18 : +Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffe: + aes64esm x18, x12, x30 # perform operation + 80001a18: 37e60933 aes64esm x18,x12,x30 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffe, Zkne_aes64esm_cg_cp_rs2_edges_0xfffffffe_str) + 80001a1c: 000bb203 ld x4,0(x23) + 80001a20: 01220c63 beq x4,x18,80001a38 + 80001a24: 6dc092ef jal x5,8000b100 + 80001a28: 80001a18 .word 0x80001a18 + 80001a2c: 00000000 .word 0x00000000 + 80001a30: 800150ff .word 0x800150ff + 80001a34: 00000000 .word 0x00000000 + 80001a38: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x9e0b18e6cc6a1968 + 80001a3c: 00033d83 ld x27,0(x6) + 80001a40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000100000000 + 80001a44: 00033703 ld x14,0(x6) + 80001a48: 00830313 addi x6,x6,8 + +0000000080001a4c : +Zkne_aes64esm_cg_cp_rs2_edges_0x100000000: + aes64esm x29, x27, x14 # perform operation + 80001a4c: 36ed8eb3 aes64esm x29,x27,x14 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cp_rs2_edges_0x100000000, Zkne_aes64esm_cg_cp_rs2_edges_0x100000000_str) + 80001a50: 000bb203 ld x4,0(x23) + 80001a54: 01d20c63 beq x4,x29,80001a6c + 80001a58: 6a8092ef jal x5,8000b100 + 80001a5c: 80001a4c .word 0x80001a4c + 80001a60: 00000000 .word 0x00000000 + 80001a64: 80015144 .word 0x80015144 + 80001a68: 00000000 .word 0x00000000 + 80001a6c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xbdbeb3a16e563e04 + 80001a70: 00033783 ld x15,0(x6) + 80001a74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x0000000100000001 + 80001a78: 00033a03 ld x20,0(x6) + 80001a7c: 00830313 addi x6,x6,8 + +0000000080001a80 : +Zkne_aes64esm_cg_cp_rs2_edges_0x100000001: + aes64esm x1, x15, x20 # perform operation + 80001a80: 374780b3 aes64esm x1,x15,x20 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cp_rs2_edges_0x100000001, Zkne_aes64esm_cg_cp_rs2_edges_0x100000001_str) + 80001a84: 000bb203 ld x4,0(x23) + 80001a88: 00120c63 beq x4,x1,80001aa0 + 80001a8c: 674092ef jal x5,8000b100 + 80001a90: 80001a80 .word 0x80001a80 + 80001a94: 00000000 .word 0x00000000 + 80001a98: 8001518a .word 0x8001518a + 80001a9c: 00000000 .word 0x00000000 + 80001aa0: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000000000000 + 80001aa4: 00033183 ld x3,0(x6) + 80001aa8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000000000000 + 80001aac: 00033903 ld x18,0(x6) + 80001ab0: 00830313 addi x6,x6,8 + +0000000080001ab4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64esm x26, x3, x18 # perform operation + 80001ab4: 37218d33 aes64esm x26,x3,x18 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab8: 000bb203 ld x4,0(x23) + 80001abc: 01a20c63 beq x4,x26,80001ad4 + 80001ac0: 640092ef jal x5,8000b100 + 80001ac4: 80001ab4 .word 0x80001ab4 + 80001ac8: 00000000 .word 0x00000000 + 80001acc: 800151d0 .word 0x800151d0 + 80001ad0: 00000000 .word 0x00000000 + 80001ad4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000000 + 80001ad8: 00033a83 ld x21,0(x6) + 80001adc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000000000001 + 80001ae0: 00033803 ld x16,0(x6) + 80001ae4: 00830313 addi x6,x6,8 + +0000000080001ae8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64esm x24, x21, x16 # perform operation + 80001ae8: 370a8c33 aes64esm x24,x21,x16 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001aec: 000bb203 ld x4,0(x23) + 80001af0: 01820c63 beq x4,x24,80001b08 + 80001af4: 60c092ef jal x5,8000b100 + 80001af8: 80001ae8 .word 0x80001ae8 + 80001afc: 00000000 .word 0x00000000 + 80001b00: 80015225 .word 0x80015225 + 80001b04: 00000000 .word 0x00000000 + 80001b08: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000000000000 + 80001b0c: 00033603 ld x12,0(x6) + 80001b10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000000000002 + 80001b14: 00033803 ld x16,0(x6) + 80001b18: 00830313 addi x6,x6,8 + +0000000080001b1c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64esm x24, x12, x16 # perform operation + 80001b1c: 37060c33 aes64esm x24,x12,x16 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b20: 000bb203 ld x4,0(x23) + 80001b24: 01820c63 beq x4,x24,80001b3c + 80001b28: 5d8092ef jal x5,8000b100 + 80001b2c: 80001b1c .word 0x80001b1c + 80001b30: 00000000 .word 0x00000000 + 80001b34: 8001527a .word 0x8001527a + 80001b38: 00000000 .word 0x00000000 + 80001b3c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0000000000000000 + 80001b40: 00033883 ld x17,0(x6) + 80001b44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x8000000000000000 + 80001b48: 00033c83 ld x25,0(x6) + 80001b4c: 00830313 addi x6,x6,8 + +0000000080001b50 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64esm x20, x17, x25 # perform operation + 80001b50: 37988a33 aes64esm x20,x17,x25 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b54: 000bb203 ld x4,0(x23) + 80001b58: 01420c63 beq x4,x20,80001b70 + 80001b5c: 5a4092ef jal x5,8000b100 + 80001b60: 80001b50 .word 0x80001b50 + 80001b64: 00000000 .word 0x00000000 + 80001b68: 800152cf .word 0x800152cf + 80001b6c: 00000000 .word 0x00000000 + 80001b70: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000000000000 + 80001b74: 00033d03 ld x26,0(x6) + 80001b78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x8000000000000001 + 80001b7c: 00033683 ld x13,0(x6) + 80001b80: 00830313 addi x6,x6,8 + +0000000080001b84 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64esm x8, x26, x13 # perform operation + 80001b84: 36dd0433 aes64esm x8,x26,x13 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b88: 000bb203 ld x4,0(x23) + 80001b8c: 00820c63 beq x4,x8,80001ba4 + 80001b90: 570092ef jal x5,8000b100 + 80001b94: 80001b84 .word 0x80001b84 + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 80015333 .word 0x80015333 + 80001ba0: 00000000 .word 0x00000000 + 80001ba4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000000 + 80001ba8: 00033d83 ld x27,0(x6) + 80001bac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x7fffffffffffffff + 80001bb0: 00033983 ld x19,0(x6) + 80001bb4: 00830313 addi x6,x6,8 + +0000000080001bb8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64esm x18, x27, x19 # perform operation + 80001bb8: 373d8933 aes64esm x18,x27,x19 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bbc: 000bb203 ld x4,0(x23) + 80001bc0: 01220c63 beq x4,x18,80001bd8 + 80001bc4: 53c092ef jal x5,8000b100 + 80001bc8: 80001bb8 .word 0x80001bb8 + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 80015397 .word 0x80015397 + 80001bd4: 00000000 .word 0x00000000 + 80001bd8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000000 + 80001bdc: 00033983 ld x19,0(x6) + 80001be0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80001be4: 00033503 ld x10,0(x6) + 80001be8: 00830313 addi x6,x6,8 + +0000000080001bec : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64esm x27, x19, x10 # perform operation + 80001bec: 36a98db3 aes64esm x27,x19,x10 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf0: 000bb203 ld x4,0(x23) + 80001bf4: 01b20c63 beq x4,x27,80001c0c + 80001bf8: 508092ef jal x5,8000b100 + 80001bfc: 80001bec .word 0x80001bec + 80001c00: 00000000 .word 0x00000000 + 80001c04: 800153fb .word 0x800153fb + 80001c08: 00000000 .word 0x00000000 + 80001c0c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000000000000 + 80001c10: 00033e03 ld x28,0(x6) + 80001c14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xffffffffffffffff + 80001c18: 00033d83 ld x27,0(x6) + 80001c1c: 00830313 addi x6,x6,8 + +0000000080001c20 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64esm x14, x28, x27 # perform operation + 80001c20: 37be0733 aes64esm x14,x28,x27 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c24: 000bb203 ld x4,0(x23) + 80001c28: 00e20c63 beq x4,x14,80001c40 + 80001c2c: 4d4092ef jal x5,8000b100 + 80001c30: 80001c20 .word 0x80001c20 + 80001c34: 00000000 .word 0x00000000 + 80001c38: 8001545f .word 0x8001545f + 80001c3c: 00000000 .word 0x00000000 + 80001c40: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000000000000 + 80001c44: 00033103 ld x2,0(x6) + 80001c48: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xfffffffffffffffe + 80001c4c: 00033983 ld x19,0(x6) + 80001c50: 00830313 addi x6,x6,8 + +0000000080001c54 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64esm x18, x2, x19 # perform operation + 80001c54: 37310933 aes64esm x18,x2,x19 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c58: 000bb203 ld x4,0(x23) + 80001c5c: 01220c63 beq x4,x18,80001c74 + 80001c60: 4a0092ef jal x5,8000b100 + 80001c64: 80001c54 .word 0x80001c54 + 80001c68: 00000000 .word 0x00000000 + 80001c6c: 800154c3 .word 0x800154c3 + 80001c70: 00000000 .word 0x00000000 + 80001c74: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000000 + 80001c78: 00033483 ld x9,0(x6) + 80001c7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80001c80: 00033383 ld x7,0(x6) + 80001c84: 00830313 addi x6,x6,8 + +0000000080001c88 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64esm x24, x9, x7 # perform operation + 80001c88: 36748c33 aes64esm x24,x9,x7 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c8c: 000bb203 ld x4,0(x23) + 80001c90: 01820c63 beq x4,x24,80001ca8 + 80001c94: 46c092ef jal x5,8000b100 + 80001c98: 80001c88 .word 0x80001c88 + 80001c9c: 00000000 .word 0x00000000 + 80001ca0: 80015527 .word 0x80015527 + 80001ca4: 00000000 .word 0x00000000 + 80001ca8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000000 + 80001cac: 00033983 ld x19,0(x6) + 80001cb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xaaaaaaaaaaaaaaaa + 80001cb4: 00033883 ld x17,0(x6) + 80001cb8: 00830313 addi x6,x6,8 + +0000000080001cbc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x20, x19, x17 # perform operation + 80001cbc: 37198a33 aes64esm x20,x19,x17 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc0: 000bb203 ld x4,0(x23) + 80001cc4: 01420c63 beq x4,x20,80001cdc + 80001cc8: 438092ef jal x5,8000b100 + 80001ccc: 80001cbc .word 0x80001cbc + 80001cd0: 00000000 .word 0x00000000 + 80001cd4: 8001558b .word 0x8001558b + 80001cd8: 00000000 .word 0x00000000 + 80001cdc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000000000000 + 80001ce0: 00033e03 ld x28,0(x6) + 80001ce4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x5555555555555555 + 80001ce8: 00033d83 ld x27,0(x6) + 80001cec: 00830313 addi x6,x6,8 + +0000000080001cf0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64esm x16, x28, x27 # perform operation + 80001cf0: 37be0833 aes64esm x16,x28,x27 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf4: 000bb203 ld x4,0(x23) + 80001cf8: 01020c63 beq x4,x16,80001d10 + 80001cfc: 404092ef jal x5,8000b100 + 80001d00: 80001cf0 .word 0x80001cf0 + 80001d04: 00000000 .word 0x00000000 + 80001d08: 800155ef .word 0x800155ef + 80001d0c: 00000000 .word 0x00000000 + 80001d10: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000000 + 80001d14: 00033c03 ld x24,0(x6) + 80001d18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x00000000ffffffff + 80001d1c: 00033f03 ld x30,0(x6) + 80001d20: 00830313 addi x6,x6,8 + +0000000080001d24 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64esm x1, x24, x30 # perform operation + 80001d24: 37ec00b3 aes64esm x1,x24,x30 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d28: 000bb203 ld x4,0(x23) + 80001d2c: 00120c63 beq x4,x1,80001d44 + 80001d30: 3d0092ef jal x5,8000b100 + 80001d34: 80001d24 .word 0x80001d24 + 80001d38: 00000000 .word 0x00000000 + 80001d3c: 80015653 .word 0x80015653 + 80001d40: 00000000 .word 0x00000000 + 80001d44: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000000 + 80001d48: 00033a83 ld x21,0(x6) + 80001d4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x00000000fffffffe + 80001d50: 00033983 ld x19,0(x6) + 80001d54: 00830313 addi x6,x6,8 + +0000000080001d58 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64esm x22, x21, x19 # perform operation + 80001d58: 373a8b33 aes64esm x22,x21,x19 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d5c: 000bb203 ld x4,0(x23) + 80001d60: 01620c63 beq x4,x22,80001d78 + 80001d64: 39c092ef jal x5,8000b100 + 80001d68: 80001d58 .word 0x80001d58 + 80001d6c: 00000000 .word 0x00000000 + 80001d70: 800156af .word 0x800156af + 80001d74: 00000000 .word 0x00000000 + 80001d78: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000000 + 80001d7c: 00033c03 ld x24,0(x6) + 80001d80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000100000000 + 80001d84: 00033d03 ld x26,0(x6) + 80001d88: 00830313 addi x6,x6,8 + +0000000080001d8c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64esm x12, x24, x26 # perform operation + 80001d8c: 37ac0633 aes64esm x12,x24,x26 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d90: 000bb203 ld x4,0(x23) + 80001d94: 00c20c63 beq x4,x12,80001dac + 80001d98: 368092ef jal x5,8000b100 + 80001d9c: 80001d8c .word 0x80001d8c + 80001da0: 00000000 .word 0x00000000 + 80001da4: 8001570b .word 0x8001570b + 80001da8: 00000000 .word 0x00000000 + 80001dac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000000000000 + 80001db0: 00033083 ld x1,0(x6) + 80001db4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000100000001 + 80001db8: 00033503 ld x10,0(x6) + 80001dbc: 00830313 addi x6,x6,8 + +0000000080001dc0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64esm x19, x1, x10 # perform operation + 80001dc0: 36a089b3 aes64esm x19,x1,x10 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc4: 000bb203 ld x4,0(x23) + 80001dc8: 01320c63 beq x4,x19,80001de0 + 80001dcc: 334092ef jal x5,8000b100 + 80001dd0: 80001dc0 .word 0x80001dc0 + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 80015768 .word 0x80015768 + 80001ddc: 00000000 .word 0x00000000 + 80001de0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0000000000000001 + 80001de4: 00033903 ld x18,0(x6) + 80001de8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0000000000000000 + 80001dec: 00033b03 ld x22,0(x6) + 80001df0: 00830313 addi x6,x6,8 + +0000000080001df4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64esm x27, x18, x22 # perform operation + 80001df4: 37690db3 aes64esm x27,x18,x22 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df8: 000bb203 ld x4,0(x23) + 80001dfc: 01b20c63 beq x4,x27,80001e14 + 80001e00: 300092ef jal x5,8000b100 + 80001e04: 80001df4 .word 0x80001df4 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 800157c5 .word 0x800157c5 + 80001e10: 00000000 .word 0x00000000 + 80001e14: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000000000001 + 80001e18: 00033a03 ld x20,0(x6) + 80001e1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000000000001 + 80001e20: 00033703 ld x14,0(x6) + 80001e24: 00830313 addi x6,x6,8 + +0000000080001e28 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64esm x26, x20, x14 # perform operation + 80001e28: 36ea0d33 aes64esm x26,x20,x14 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e2c: 000bb203 ld x4,0(x23) + 80001e30: 01a20c63 beq x4,x26,80001e48 + 80001e34: 2cc092ef jal x5,8000b100 + 80001e38: 80001e28 .word 0x80001e28 + 80001e3c: 00000000 .word 0x00000000 + 80001e40: 8001581a .word 0x8001581a + 80001e44: 00000000 .word 0x00000000 + 80001e48: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000000000001 + 80001e4c: 00033c83 ld x25,0(x6) + 80001e50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000002 + 80001e54: 00033083 ld x1,0(x6) + 80001e58: 00830313 addi x6,x6,8 + +0000000080001e5c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64esm x9, x25, x1 # perform operation + 80001e5c: 361c84b3 aes64esm x9,x25,x1 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e60: 000bb203 ld x4,0(x23) + 80001e64: 00920c63 beq x4,x9,80001e7c + 80001e68: 298092ef jal x5,8000b100 + 80001e6c: 80001e5c .word 0x80001e5c + 80001e70: 00000000 .word 0x00000000 + 80001e74: 8001586f .word 0x8001586f + 80001e78: 00000000 .word 0x00000000 + 80001e7c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000000000001 + 80001e80: 00033d03 ld x26,0(x6) + 80001e84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x8000000000000000 + 80001e88: 00033c03 ld x24,0(x6) + 80001e8c: 00830313 addi x6,x6,8 + +0000000080001e90 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64esm x1, x26, x24 # perform operation + 80001e90: 378d00b3 aes64esm x1,x26,x24 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e94: 000bb203 ld x4,0(x23) + 80001e98: 00120c63 beq x4,x1,80001eb0 + 80001e9c: 264092ef jal x5,8000b100 + 80001ea0: 80001e90 .word 0x80001e90 + 80001ea4: 00000000 .word 0x00000000 + 80001ea8: 800158c4 .word 0x800158c4 + 80001eac: 00000000 .word 0x00000000 + 80001eb0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000000000001 + 80001eb4: 00033183 ld x3,0(x6) + 80001eb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8000000000000001 + 80001ebc: 00033e03 ld x28,0(x6) + 80001ec0: 00830313 addi x6,x6,8 + +0000000080001ec4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64esm x29, x3, x28 # perform operation + 80001ec4: 37c18eb3 aes64esm x29,x3,x28 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec8: 000bb203 ld x4,0(x23) + 80001ecc: 01d20c63 beq x4,x29,80001ee4 + 80001ed0: 230092ef jal x5,8000b100 + 80001ed4: 80001ec4 .word 0x80001ec4 + 80001ed8: 00000000 .word 0x00000000 + 80001edc: 80015928 .word 0x80015928 + 80001ee0: 00000000 .word 0x00000000 + 80001ee4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0000000000000001 + 80001ee8: 00033683 ld x13,0(x6) + 80001eec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x7fffffffffffffff + 80001ef0: 00033603 ld x12,0(x6) + 80001ef4: 00830313 addi x6,x6,8 + +0000000080001ef8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64esm x18, x13, x12 # perform operation + 80001ef8: 36c68933 aes64esm x18,x13,x12 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001efc: 000bb203 ld x4,0(x23) + 80001f00: 01220c63 beq x4,x18,80001f18 + 80001f04: 1fc092ef jal x5,8000b100 + 80001f08: 80001ef8 .word 0x80001ef8 + 80001f0c: 00000000 .word 0x00000000 + 80001f10: 8001598c .word 0x8001598c + 80001f14: 00000000 .word 0x00000000 + 80001f18: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000001 + 80001f1c: 00033483 ld x9,0(x6) + 80001f20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7ffffffffffffffe + 80001f24: 00033f03 ld x30,0(x6) + 80001f28: 00830313 addi x6,x6,8 + +0000000080001f2c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64esm x3, x9, x30 # perform operation + 80001f2c: 37e481b3 aes64esm x3,x9,x30 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f30: 000bb203 ld x4,0(x23) + 80001f34: 00320c63 beq x4,x3,80001f4c + 80001f38: 1c8092ef jal x5,8000b100 + 80001f3c: 80001f2c .word 0x80001f2c + 80001f40: 00000000 .word 0x00000000 + 80001f44: 800159f0 .word 0x800159f0 + 80001f48: 00000000 .word 0x00000000 + 80001f4c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000001 + 80001f50: 00033483 ld x9,0(x6) + 80001f54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xffffffffffffffff + 80001f58: 00033403 ld x8,0(x6) + 80001f5c: 00830313 addi x6,x6,8 + +0000000080001f60 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64esm x22, x9, x8 # perform operation + 80001f60: 36848b33 aes64esm x22,x9,x8 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f64: 000bb203 ld x4,0(x23) + 80001f68: 01620c63 beq x4,x22,80001f80 + 80001f6c: 194092ef jal x5,8000b100 + 80001f70: 80001f60 .word 0x80001f60 + 80001f74: 00000000 .word 0x00000000 + 80001f78: 80015a54 .word 0x80015a54 + 80001f7c: 00000000 .word 0x00000000 + 80001f80: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0000000000000001 + 80001f84: 00033783 ld x15,0(x6) + 80001f88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xfffffffffffffffe + 80001f8c: 00033983 ld x19,0(x6) + 80001f90: 00830313 addi x6,x6,8 + +0000000080001f94 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64esm x14, x15, x19 # perform operation + 80001f94: 37378733 aes64esm x14,x15,x19 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f98: 000bb203 ld x4,0(x23) + 80001f9c: 00e20c63 beq x4,x14,80001fb4 + 80001fa0: 160092ef jal x5,8000b100 + 80001fa4: 80001f94 .word 0x80001f94 + 80001fa8: 00000000 .word 0x00000000 + 80001fac: 80015ab8 .word 0x80015ab8 + 80001fb0: 00000000 .word 0x00000000 + 80001fb4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000000000001 + 80001fb8: 00033e83 ld x29,0(x6) + 80001fbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80001fc0: 00033103 ld x2,0(x6) + 80001fc4: 00830313 addi x6,x6,8 + +0000000080001fc8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64esm x24, x29, x2 # perform operation + 80001fc8: 362e8c33 aes64esm x24,x29,x2 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fcc: 000bb203 ld x4,0(x23) + 80001fd0: 01820c63 beq x4,x24,80001fe8 + 80001fd4: 12c092ef jal x5,8000b100 + 80001fd8: 80001fc8 .word 0x80001fc8 + 80001fdc: 00000000 .word 0x00000000 + 80001fe0: 80015b1c .word 0x80015b1c + 80001fe4: 00000000 .word 0x00000000 + 80001fe8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000000000001 + 80001fec: 00033f83 ld x31,0(x6) + 80001ff0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 80001ff4: 00033383 ld x7,0(x6) + 80001ff8: 00830313 addi x6,x6,8 + +0000000080001ffc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x18, x31, x7 # perform operation + 80001ffc: 367f8933 aes64esm x18,x31,x7 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002000: 000bb203 ld x4,0(x23) + 80002004: 01220c63 beq x4,x18,8000201c + 80002008: 0f8092ef jal x5,8000b100 + 8000200c: 80001ffc .word 0x80001ffc + 80002010: 00000000 .word 0x00000000 + 80002014: 80015b80 .word 0x80015b80 + 80002018: 00000000 .word 0x00000000 + 8000201c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0000000000000001 + 80002020: 00033383 ld x7,0(x6) + 80002024: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5555555555555555 + 80002028: 00033103 ld x2,0(x6) + 8000202c: 00830313 addi x6,x6,8 + +0000000080002030 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64esm x30, x7, x2 # perform operation + 80002030: 36238f33 aes64esm x30,x7,x2 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002034: 000bb203 ld x4,0(x23) + 80002038: 01e20c63 beq x4,x30,80002050 + 8000203c: 0c4092ef jal x5,8000b100 + 80002040: 80002030 .word 0x80002030 + 80002044: 00000000 .word 0x00000000 + 80002048: 80015be4 .word 0x80015be4 + 8000204c: 00000000 .word 0x00000000 + 80002050: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000000000001 + 80002054: 00033583 ld x11,0(x6) + 80002058: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x00000000ffffffff + 8000205c: 00033c03 ld x24,0(x6) + 80002060: 00830313 addi x6,x6,8 + +0000000080002064 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64esm x14, x11, x24 # perform operation + 80002064: 37858733 aes64esm x14,x11,x24 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002068: 000bb203 ld x4,0(x23) + 8000206c: 00e20c63 beq x4,x14,80002084 + 80002070: 090092ef jal x5,8000b100 + 80002074: 80002064 .word 0x80002064 + 80002078: 00000000 .word 0x00000000 + 8000207c: 80015c48 .word 0x80015c48 + 80002080: 00000000 .word 0x00000000 + 80002084: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000000000001 + 80002088: 00033f03 ld x30,0(x6) + 8000208c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x00000000fffffffe + 80002090: 00033f83 ld x31,0(x6) + 80002094: 00830313 addi x6,x6,8 + +0000000080002098 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64esm x14, x30, x31 # perform operation + 80002098: 37ff0733 aes64esm x14,x30,x31 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 8000209c: 000bb203 ld x4,0(x23) + 800020a0: 00e20c63 beq x4,x14,800020b8 + 800020a4: 05c092ef jal x5,8000b100 + 800020a8: 80002098 .word 0x80002098 + 800020ac: 00000000 .word 0x00000000 + 800020b0: 80015ca4 .word 0x80015ca4 + 800020b4: 00000000 .word 0x00000000 + 800020b8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x0000000000000001 + 800020bc: 00033f03 ld x30,0(x6) + 800020c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000100000000 + 800020c4: 00033783 ld x15,0(x6) + 800020c8: 00830313 addi x6,x6,8 + +00000000800020cc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64esm x22, x30, x15 # perform operation + 800020cc: 36ff0b33 aes64esm x22,x30,x15 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d0: 000bb203 ld x4,0(x23) + 800020d4: 01620c63 beq x4,x22,800020ec + 800020d8: 028092ef jal x5,8000b100 + 800020dc: 800020cc .word 0x800020cc + 800020e0: 00000000 .word 0x00000000 + 800020e4: 80015d00 .word 0x80015d00 + 800020e8: 00000000 .word 0x00000000 + 800020ec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0000000000000001 + 800020f0: 00033403 ld x8,0(x6) + 800020f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000100000001 + 800020f8: 00033783 ld x15,0(x6) + 800020fc: 00830313 addi x6,x6,8 + +0000000080002100 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64esm x11, x8, x15 # perform operation + 80002100: 36f405b3 aes64esm x11,x8,x15 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002104: 000bb203 ld x4,0(x23) + 80002108: 00b20c63 beq x4,x11,80002120 + 8000210c: 7f5082ef jal x5,8000b100 + 80002110: 80002100 .word 0x80002100 + 80002114: 00000000 .word 0x00000000 + 80002118: 80015d5d .word 0x80015d5d + 8000211c: 00000000 .word 0x00000000 + 80002120: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000000000002 + 80002124: 00033a03 ld x20,0(x6) + 80002128: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000000000000 + 8000212c: 00033583 ld x11,0(x6) + 80002130: 00830313 addi x6,x6,8 + +0000000080002134 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64esm x31, x20, x11 # perform operation + 80002134: 36ba0fb3 aes64esm x31,x20,x11 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002138: 000bb203 ld x4,0(x23) + 8000213c: 01f20c63 beq x4,x31,80002154 + 80002140: 7c1082ef jal x5,8000b100 + 80002144: 80002134 .word 0x80002134 + 80002148: 00000000 .word 0x00000000 + 8000214c: 80015dba .word 0x80015dba + 80002150: 00000000 .word 0x00000000 + 80002154: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000000000002 + 80002158: 00033603 ld x12,0(x6) + 8000215c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000000000001 + 80002160: 00033903 ld x18,0(x6) + 80002164: 00830313 addi x6,x6,8 + +0000000080002168 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64esm x9, x12, x18 # perform operation + 80002168: 372604b3 aes64esm x9,x12,x18 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 8000216c: 000bb203 ld x4,0(x23) + 80002170: 00920c63 beq x4,x9,80002188 + 80002174: 78d082ef jal x5,8000b100 + 80002178: 80002168 .word 0x80002168 + 8000217c: 00000000 .word 0x00000000 + 80002180: 80015e0f .word 0x80015e0f + 80002184: 00000000 .word 0x00000000 + 80002188: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000002 + 8000218c: 00033d83 ld x27,0(x6) + 80002190: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000000000002 + 80002194: 00033d03 ld x26,0(x6) + 80002198: 00830313 addi x6,x6,8 + +000000008000219c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64esm x18, x27, x26 # perform operation + 8000219c: 37ad8933 aes64esm x18,x27,x26 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a0: 000bb203 ld x4,0(x23) + 800021a4: 01220c63 beq x4,x18,800021bc + 800021a8: 759082ef jal x5,8000b100 + 800021ac: 8000219c .word 0x8000219c + 800021b0: 00000000 .word 0x00000000 + 800021b4: 80015e64 .word 0x80015e64 + 800021b8: 00000000 .word 0x00000000 + 800021bc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000000000002 + 800021c0: 00033d03 ld x26,0(x6) + 800021c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x8000000000000000 + 800021c8: 00033783 ld x15,0(x6) + 800021cc: 00830313 addi x6,x6,8 + +00000000800021d0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64esm x1, x26, x15 # perform operation + 800021d0: 36fd00b3 aes64esm x1,x26,x15 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d4: 000bb203 ld x4,0(x23) + 800021d8: 00120c63 beq x4,x1,800021f0 + 800021dc: 725082ef jal x5,8000b100 + 800021e0: 800021d0 .word 0x800021d0 + 800021e4: 00000000 .word 0x00000000 + 800021e8: 80015eb9 .word 0x80015eb9 + 800021ec: 00000000 .word 0x00000000 + 800021f0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x0000000000000002 + 800021f4: 00033683 ld x13,0(x6) + 800021f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x8000000000000001 + 800021fc: 00033483 ld x9,0(x6) + 80002200: 00830313 addi x6,x6,8 + +0000000080002204 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64esm x3, x13, x9 # perform operation + 80002204: 369681b3 aes64esm x3,x13,x9 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002208: 000bb203 ld x4,0(x23) + 8000220c: 00320c63 beq x4,x3,80002224 + 80002210: 6f1082ef jal x5,8000b100 + 80002214: 80002204 .word 0x80002204 + 80002218: 00000000 .word 0x00000000 + 8000221c: 80015f1d .word 0x80015f1d + 80002220: 00000000 .word 0x00000000 + 80002224: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0000000000000002 + 80002228: 00033983 ld x19,0(x6) + 8000222c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x7fffffffffffffff + 80002230: 00033d83 ld x27,0(x6) + 80002234: 00830313 addi x6,x6,8 + +0000000080002238 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64esm x28, x19, x27 # perform operation + 80002238: 37b98e33 aes64esm x28,x19,x27 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 8000223c: 000bb203 ld x4,0(x23) + 80002240: 01c20c63 beq x4,x28,80002258 + 80002244: 6bd082ef jal x5,8000b100 + 80002248: 80002238 .word 0x80002238 + 8000224c: 00000000 .word 0x00000000 + 80002250: 80015f81 .word 0x80015f81 + 80002254: 00000000 .word 0x00000000 + 80002258: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000000000002 + 8000225c: 00033183 ld x3,0(x6) + 80002260: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80002264: 00033903 ld x18,0(x6) + 80002268: 00830313 addi x6,x6,8 + +000000008000226c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64esm x28, x3, x18 # perform operation + 8000226c: 37218e33 aes64esm x28,x3,x18 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002270: 000bb203 ld x4,0(x23) + 80002274: 01c20c63 beq x4,x28,8000228c + 80002278: 689082ef jal x5,8000b100 + 8000227c: 8000226c .word 0x8000226c + 80002280: 00000000 .word 0x00000000 + 80002284: 80015fe5 .word 0x80015fe5 + 80002288: 00000000 .word 0x00000000 + 8000228c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000002 + 80002290: 00033803 ld x16,0(x6) + 80002294: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xffffffffffffffff + 80002298: 00033f83 ld x31,0(x6) + 8000229c: 00830313 addi x6,x6,8 + +00000000800022a0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64esm x29, x16, x31 # perform operation + 800022a0: 37f80eb3 aes64esm x29,x16,x31 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a4: 000bb203 ld x4,0(x23) + 800022a8: 01d20c63 beq x4,x29,800022c0 + 800022ac: 655082ef jal x5,8000b100 + 800022b0: 800022a0 .word 0x800022a0 + 800022b4: 00000000 .word 0x00000000 + 800022b8: 80016049 .word 0x80016049 + 800022bc: 00000000 .word 0x00000000 + 800022c0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0000000000000002 + 800022c4: 00033d83 ld x27,0(x6) + 800022c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xfffffffffffffffe + 800022cc: 00033c03 ld x24,0(x6) + 800022d0: 00830313 addi x6,x6,8 + +00000000800022d4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64esm x2, x27, x24 # perform operation + 800022d4: 378d8133 aes64esm x2,x27,x24 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d8: 000bb203 ld x4,0(x23) + 800022dc: 00220c63 beq x4,x2,800022f4 + 800022e0: 621082ef jal x5,8000b100 + 800022e4: 800022d4 .word 0x800022d4 + 800022e8: 00000000 .word 0x00000000 + 800022ec: 800160ad .word 0x800160ad + 800022f0: 00000000 .word 0x00000000 + 800022f4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000000000002 + 800022f8: 00033c03 ld x24,0(x6) + 800022fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002300: 00033703 ld x14,0(x6) + 80002304: 00830313 addi x6,x6,8 + +0000000080002308 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64esm x18, x24, x14 # perform operation + 80002308: 36ec0933 aes64esm x18,x24,x14 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 8000230c: 000bb203 ld x4,0(x23) + 80002310: 01220c63 beq x4,x18,80002328 + 80002314: 5ed082ef jal x5,8000b100 + 80002318: 80002308 .word 0x80002308 + 8000231c: 00000000 .word 0x00000000 + 80002320: 80016111 .word 0x80016111 + 80002324: 00000000 .word 0x00000000 + 80002328: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000000000002 + 8000232c: 00033103 ld x2,0(x6) + 80002330: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80002334: 00033f83 ld x31,0(x6) + 80002338: 00830313 addi x6,x6,8 + +000000008000233c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x1, x2, x31 # perform operation + 8000233c: 37f100b3 aes64esm x1,x2,x31 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002340: 000bb203 ld x4,0(x23) + 80002344: 00120c63 beq x4,x1,8000235c + 80002348: 5b9082ef jal x5,8000b100 + 8000234c: 8000233c .word 0x8000233c + 80002350: 00000000 .word 0x00000000 + 80002354: 80016175 .word 0x80016175 + 80002358: 00000000 .word 0x00000000 + 8000235c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000002 + 80002360: 00033803 ld x16,0(x6) + 80002364: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x5555555555555555 + 80002368: 00033a03 ld x20,0(x6) + 8000236c: 00830313 addi x6,x6,8 + +0000000080002370 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64esm x25, x16, x20 # perform operation + 80002370: 37480cb3 aes64esm x25,x16,x20 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002374: 000bb203 ld x4,0(x23) + 80002378: 01920c63 beq x4,x25,80002390 + 8000237c: 585082ef jal x5,8000b100 + 80002380: 80002370 .word 0x80002370 + 80002384: 00000000 .word 0x00000000 + 80002388: 800161d9 .word 0x800161d9 + 8000238c: 00000000 .word 0x00000000 + 80002390: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x0000000000000002 + 80002394: 00033603 ld x12,0(x6) + 80002398: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x00000000ffffffff + 8000239c: 00033b03 ld x22,0(x6) + 800023a0: 00830313 addi x6,x6,8 + +00000000800023a4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64esm x18, x12, x22 # perform operation + 800023a4: 37660933 aes64esm x18,x12,x22 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a8: 000bb203 ld x4,0(x23) + 800023ac: 01220c63 beq x4,x18,800023c4 + 800023b0: 551082ef jal x5,8000b100 + 800023b4: 800023a4 .word 0x800023a4 + 800023b8: 00000000 .word 0x00000000 + 800023bc: 8001623d .word 0x8001623d + 800023c0: 00000000 .word 0x00000000 + 800023c4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000000000002 + 800023c8: 00033a83 ld x21,0(x6) + 800023cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x00000000fffffffe + 800023d0: 00033703 ld x14,0(x6) + 800023d4: 00830313 addi x6,x6,8 + +00000000800023d8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64esm x3, x21, x14 # perform operation + 800023d8: 36ea81b3 aes64esm x3,x21,x14 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023dc: 000bb203 ld x4,0(x23) + 800023e0: 00320c63 beq x4,x3,800023f8 + 800023e4: 51d082ef jal x5,8000b100 + 800023e8: 800023d8 .word 0x800023d8 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 80016299 .word 0x80016299 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000000000002 + 800023fc: 00033583 ld x11,0(x6) + 80002400: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x0000000100000000 + 80002404: 00033f03 ld x30,0(x6) + 80002408: 00830313 addi x6,x6,8 + +000000008000240c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64esm x7, x11, x30 # perform operation + 8000240c: 37e583b3 aes64esm x7,x11,x30 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002410: 000bb203 ld x4,0(x23) + 80002414: 00720c63 beq x4,x7,8000242c + 80002418: 4e9082ef jal x5,8000b100 + 8000241c: 8000240c .word 0x8000240c + 80002420: 00000000 .word 0x00000000 + 80002424: 800162f5 .word 0x800162f5 + 80002428: 00000000 .word 0x00000000 + 8000242c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000002 + 80002430: 00033483 ld x9,0(x6) + 80002434: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000100000001 + 80002438: 00033703 ld x14,0(x6) + 8000243c: 00830313 addi x6,x6,8 + +0000000080002440 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64esm x11, x9, x14 # perform operation + 80002440: 36e485b3 aes64esm x11,x9,x14 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002444: 000bb203 ld x4,0(x23) + 80002448: 00b20c63 beq x4,x11,80002460 + 8000244c: 4b5082ef jal x5,8000b100 + 80002450: 80002440 .word 0x80002440 + 80002454: 00000000 .word 0x00000000 + 80002458: 80016352 .word 0x80016352 + 8000245c: 00000000 .word 0x00000000 + 80002460: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8000000000000000 + 80002464: 00033603 ld x12,0(x6) + 80002468: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000000000000 + 8000246c: 00033103 ld x2,0(x6) + 80002470: 00830313 addi x6,x6,8 + +0000000080002474 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64esm x18, x12, x2 # perform operation + 80002474: 36260933 aes64esm x18,x12,x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002478: 000bb203 ld x4,0(x23) + 8000247c: 01220c63 beq x4,x18,80002494 + 80002480: 481082ef jal x5,8000b100 + 80002484: 80002474 .word 0x80002474 + 80002488: 00000000 .word 0x00000000 + 8000248c: 800163af .word 0x800163af + 80002490: 00000000 .word 0x00000000 + 80002494: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x8000000000000000 + 80002498: 00033e83 ld x29,0(x6) + 8000249c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000000000001 + 800024a0: 00033a83 ld x21,0(x6) + 800024a4: 00830313 addi x6,x6,8 + +00000000800024a8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64esm x16, x29, x21 # perform operation + 800024a8: 375e8833 aes64esm x16,x29,x21 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024ac: 000bb203 ld x4,0(x23) + 800024b0: 01020c63 beq x4,x16,800024c8 + 800024b4: 44d082ef jal x5,8000b100 + 800024b8: 800024a8 .word 0x800024a8 + 800024bc: 00000000 .word 0x00000000 + 800024c0: 80016413 .word 0x80016413 + 800024c4: 00000000 .word 0x00000000 + 800024c8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x8000000000000000 + 800024cc: 00033483 ld x9,0(x6) + 800024d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000000000002 + 800024d4: 00033183 ld x3,0(x6) + 800024d8: 00830313 addi x6,x6,8 + +00000000800024dc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64esm x31, x9, x3 # perform operation + 800024dc: 36348fb3 aes64esm x31,x9,x3 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e0: 000bb203 ld x4,0(x23) + 800024e4: 01f20c63 beq x4,x31,800024fc + 800024e8: 419082ef jal x5,8000b100 + 800024ec: 800024dc .word 0x800024dc + 800024f0: 00000000 .word 0x00000000 + 800024f4: 80016477 .word 0x80016477 + 800024f8: 00000000 .word 0x00000000 + 800024fc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x8000000000000000 + 80002500: 00033503 ld x10,0(x6) + 80002504: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x8000000000000000 + 80002508: 00033e83 ld x29,0(x6) + 8000250c: 00830313 addi x6,x6,8 + +0000000080002510 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64esm x12, x10, x29 # perform operation + 80002510: 37d50633 aes64esm x12,x10,x29 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002514: 000bb203 ld x4,0(x23) + 80002518: 00c20c63 beq x4,x12,80002530 + 8000251c: 3e5082ef jal x5,8000b100 + 80002520: 80002510 .word 0x80002510 + 80002524: 00000000 .word 0x00000000 + 80002528: 800164db .word 0x800164db + 8000252c: 00000000 .word 0x00000000 + 80002530: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8000000000000000 + 80002534: 00033183 ld x3,0(x6) + 80002538: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x8000000000000001 + 8000253c: 00033e83 ld x29,0(x6) + 80002540: 00830313 addi x6,x6,8 + +0000000080002544 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64esm x11, x3, x29 # perform operation + 80002544: 37d185b3 aes64esm x11,x3,x29 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002548: 000bb203 ld x4,0(x23) + 8000254c: 00b20c63 beq x4,x11,80002564 + 80002550: 3b1082ef jal x5,8000b100 + 80002554: 80002544 .word 0x80002544 + 80002558: 00000000 .word 0x00000000 + 8000255c: 8001654e .word 0x8001654e + 80002560: 00000000 .word 0x00000000 + 80002564: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000000 + 80002568: 00033803 ld x16,0(x6) + 8000256c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x7fffffffffffffff + 80002570: 00033703 ld x14,0(x6) + 80002574: 00830313 addi x6,x6,8 + +0000000080002578 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64esm x8, x16, x14 # perform operation + 80002578: 36e80433 aes64esm x8,x16,x14 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 8000257c: 000bb203 ld x4,0(x23) + 80002580: 00820c63 beq x4,x8,80002598 + 80002584: 37d082ef jal x5,8000b100 + 80002588: 80002578 .word 0x80002578 + 8000258c: 00000000 .word 0x00000000 + 80002590: 800165c1 .word 0x800165c1 + 80002594: 00000000 .word 0x00000000 + 80002598: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x8000000000000000 + 8000259c: 00033f03 ld x30,0(x6) + 800025a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x7ffffffffffffffe + 800025a4: 00033b03 ld x22,0(x6) + 800025a8: 00830313 addi x6,x6,8 + +00000000800025ac : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64esm x14, x30, x22 # perform operation + 800025ac: 376f0733 aes64esm x14,x30,x22 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b0: 000bb203 ld x4,0(x23) + 800025b4: 00e20c63 beq x4,x14,800025cc + 800025b8: 349082ef jal x5,8000b100 + 800025bc: 800025ac .word 0x800025ac + 800025c0: 00000000 .word 0x00000000 + 800025c4: 80016634 .word 0x80016634 + 800025c8: 00000000 .word 0x00000000 + 800025cc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8000000000000000 + 800025d0: 00033983 ld x19,0(x6) + 800025d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xffffffffffffffff + 800025d8: 00033c03 ld x24,0(x6) + 800025dc: 00830313 addi x6,x6,8 + +00000000800025e0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64esm x2, x19, x24 # perform operation + 800025e0: 37898133 aes64esm x2,x19,x24 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e4: 000bb203 ld x4,0(x23) + 800025e8: 00220c63 beq x4,x2,80002600 + 800025ec: 315082ef jal x5,8000b100 + 800025f0: 800025e0 .word 0x800025e0 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 800166a7 .word 0x800166a7 + 800025fc: 00000000 .word 0x00000000 + 80002600: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x8000000000000000 + 80002604: 00033083 ld x1,0(x6) + 80002608: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xfffffffffffffffe + 8000260c: 00033f83 ld x31,0(x6) + 80002610: 00830313 addi x6,x6,8 + +0000000080002614 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64esm x7, x1, x31 # perform operation + 80002614: 37f083b3 aes64esm x7,x1,x31 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002618: 000bb203 ld x4,0(x23) + 8000261c: 00720c63 beq x4,x7,80002634 + 80002620: 2e1082ef jal x5,8000b100 + 80002624: 80002614 .word 0x80002614 + 80002628: 00000000 .word 0x00000000 + 8000262c: 8001671a .word 0x8001671a + 80002630: 00000000 .word 0x00000000 + 80002634: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x8000000000000000 + 80002638: 00033703 ld x14,0(x6) + 8000263c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80002640: 00033383 ld x7,0(x6) + 80002644: 00830313 addi x6,x6,8 + +0000000080002648 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64esm x15, x14, x7 # perform operation + 80002648: 367707b3 aes64esm x15,x14,x7 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 8000264c: 000bb203 ld x4,0(x23) + 80002650: 00f20c63 beq x4,x15,80002668 + 80002654: 2ad082ef jal x5,8000b100 + 80002658: 80002648 .word 0x80002648 + 8000265c: 00000000 .word 0x00000000 + 80002660: 8001678d .word 0x8001678d + 80002664: 00000000 .word 0x00000000 + 80002668: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8000000000000000 + 8000266c: 00033583 ld x11,0(x6) + 80002670: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 80002674: 00033b03 ld x22,0(x6) + 80002678: 00830313 addi x6,x6,8 + +000000008000267c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x16, x11, x22 # perform operation + 8000267c: 37658833 aes64esm x16,x11,x22 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002680: 000bb203 ld x4,0(x23) + 80002684: 01020c63 beq x4,x16,8000269c + 80002688: 279082ef jal x5,8000b100 + 8000268c: 8000267c .word 0x8000267c + 80002690: 00000000 .word 0x00000000 + 80002694: 80016800 .word 0x80016800 + 80002698: 00000000 .word 0x00000000 + 8000269c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x8000000000000000 + 800026a0: 00033083 ld x1,0(x6) + 800026a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x5555555555555555 + 800026a8: 00033183 ld x3,0(x6) + 800026ac: 00830313 addi x6,x6,8 + +00000000800026b0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64esm x2, x1, x3 # perform operation + 800026b0: 36308133 aes64esm x2,x1,x3 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b4: 000bb203 ld x4,0(x23) + 800026b8: 00220c63 beq x4,x2,800026d0 + 800026bc: 245082ef jal x5,8000b100 + 800026c0: 800026b0 .word 0x800026b0 + 800026c4: 00000000 .word 0x00000000 + 800026c8: 80016873 .word 0x80016873 + 800026cc: 00000000 .word 0x00000000 + 800026d0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x8000000000000000 + 800026d4: 00033e03 ld x28,0(x6) + 800026d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x00000000ffffffff + 800026dc: 00033683 ld x13,0(x6) + 800026e0: 00830313 addi x6,x6,8 + +00000000800026e4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64esm x20, x28, x13 # perform operation + 800026e4: 36de0a33 aes64esm x20,x28,x13 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e8: 000bb203 ld x4,0(x23) + 800026ec: 01420c63 beq x4,x20,80002704 + 800026f0: 211082ef jal x5,8000b100 + 800026f4: 800026e4 .word 0x800026e4 + 800026f8: 00000000 .word 0x00000000 + 800026fc: 800168e6 .word 0x800168e6 + 80002700: 00000000 .word 0x00000000 + 80002704: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8000000000000000 + 80002708: 00033683 ld x13,0(x6) + 8000270c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x00000000fffffffe + 80002710: 00033983 ld x19,0(x6) + 80002714: 00830313 addi x6,x6,8 + +0000000080002718 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64esm x26, x13, x19 # perform operation + 80002718: 37368d33 aes64esm x26,x13,x19 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 8000271c: 000bb203 ld x4,0(x23) + 80002720: 01a20c63 beq x4,x26,80002738 + 80002724: 1dd082ef jal x5,8000b100 + 80002728: 80002718 .word 0x80002718 + 8000272c: 00000000 .word 0x00000000 + 80002730: 80016951 .word 0x80016951 + 80002734: 00000000 .word 0x00000000 + 80002738: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8000000000000000 + 8000273c: 00033683 ld x13,0(x6) + 80002740: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000100000000 + 80002744: 00033f83 ld x31,0(x6) + 80002748: 00830313 addi x6,x6,8 + +000000008000274c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64esm x18, x13, x31 # perform operation + 8000274c: 37f68933 aes64esm x18,x13,x31 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002750: 000bb203 ld x4,0(x23) + 80002754: 01220c63 beq x4,x18,8000276c + 80002758: 1a9082ef jal x5,8000b100 + 8000275c: 8000274c .word 0x8000274c + 80002760: 00000000 .word 0x00000000 + 80002764: 800169bc .word 0x800169bc + 80002768: 00000000 .word 0x00000000 + 8000276c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8000000000000000 + 80002770: 00033f83 ld x31,0(x6) + 80002774: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000100000001 + 80002778: 00033103 ld x2,0(x6) + 8000277c: 00830313 addi x6,x6,8 + +0000000080002780 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64esm x19, x31, x2 # perform operation + 80002780: 362f89b3 aes64esm x19,x31,x2 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002784: 000bb203 ld x4,0(x23) + 80002788: 01320c63 beq x4,x19,800027a0 + 8000278c: 175082ef jal x5,8000b100 + 80002790: 80002780 .word 0x80002780 + 80002794: 00000000 .word 0x00000000 + 80002798: 80016a28 .word 0x80016a28 + 8000279c: 00000000 .word 0x00000000 + 800027a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8000000000000001 + 800027a4: 00033a83 ld x21,0(x6) + 800027a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000000 + 800027ac: 00033f83 ld x31,0(x6) + 800027b0: 00830313 addi x6,x6,8 + +00000000800027b4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64esm x10, x21, x31 # perform operation + 800027b4: 37fa8533 aes64esm x10,x21,x31 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b8: 000bb203 ld x4,0(x23) + 800027bc: 00a20c63 beq x4,x10,800027d4 + 800027c0: 141082ef jal x5,8000b100 + 800027c4: 800027b4 .word 0x800027b4 + 800027c8: 00000000 .word 0x00000000 + 800027cc: 80016a94 .word 0x80016a94 + 800027d0: 00000000 .word 0x00000000 + 800027d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000001 + 800027d8: 00033803 ld x16,0(x6) + 800027dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x0000000000000001 + 800027e0: 00033a03 ld x20,0(x6) + 800027e4: 00830313 addi x6,x6,8 + +00000000800027e8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64esm x17, x16, x20 # perform operation + 800027e8: 374808b3 aes64esm x17,x16,x20 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027ec: 000bb203 ld x4,0(x23) + 800027f0: 01120c63 beq x4,x17,80002808 + 800027f4: 10d082ef jal x5,8000b100 + 800027f8: 800027e8 .word 0x800027e8 + 800027fc: 00000000 .word 0x00000000 + 80002800: 80016af8 .word 0x80016af8 + 80002804: 00000000 .word 0x00000000 + 80002808: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x8000000000000001 + 8000280c: 00033d03 ld x26,0(x6) + 80002810: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x0000000000000002 + 80002814: 00033a83 ld x21,0(x6) + 80002818: 00830313 addi x6,x6,8 + +000000008000281c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64esm x19, x26, x21 # perform operation + 8000281c: 375d09b3 aes64esm x19,x26,x21 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002820: 000bb203 ld x4,0(x23) + 80002824: 01320c63 beq x4,x19,8000283c + 80002828: 0d9082ef jal x5,8000b100 + 8000282c: 8000281c .word 0x8000281c + 80002830: 00000000 .word 0x00000000 + 80002834: 80016b5c .word 0x80016b5c + 80002838: 00000000 .word 0x00000000 + 8000283c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x8000000000000001 + 80002840: 00033c83 ld x25,0(x6) + 80002844: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x8000000000000000 + 80002848: 00033903 ld x18,0(x6) + 8000284c: 00830313 addi x6,x6,8 + +0000000080002850 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64esm x12, x25, x18 # perform operation + 80002850: 372c8633 aes64esm x12,x25,x18 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002854: 000bb203 ld x4,0(x23) + 80002858: 00c20c63 beq x4,x12,80002870 + 8000285c: 0a5082ef jal x5,8000b100 + 80002860: 80002850 .word 0x80002850 + 80002864: 00000000 .word 0x00000000 + 80002868: 80016bc0 .word 0x80016bc0 + 8000286c: 00000000 .word 0x00000000 + 80002870: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000001 + 80002874: 00033803 ld x16,0(x6) + 80002878: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x8000000000000001 + 8000287c: 00033c03 ld x24,0(x6) + 80002880: 00830313 addi x6,x6,8 + +0000000080002884 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64esm x28, x16, x24 # perform operation + 80002884: 37880e33 aes64esm x28,x16,x24 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002888: 000bb203 ld x4,0(x23) + 8000288c: 01c20c63 beq x4,x28,800028a4 + 80002890: 071082ef jal x5,8000b100 + 80002894: 80002884 .word 0x80002884 + 80002898: 00000000 .word 0x00000000 + 8000289c: 80016c33 .word 0x80016c33 + 800028a0: 00000000 .word 0x00000000 + 800028a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8000000000000001 + 800028a8: 00033183 ld x3,0(x6) + 800028ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x7fffffffffffffff + 800028b0: 00033d83 ld x27,0(x6) + 800028b4: 00830313 addi x6,x6,8 + +00000000800028b8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64esm x8, x3, x27 # perform operation + 800028b8: 37b18433 aes64esm x8,x3,x27 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028bc: 000bb203 ld x4,0(x23) + 800028c0: 00820c63 beq x4,x8,800028d8 + 800028c4: 03d082ef jal x5,8000b100 + 800028c8: 800028b8 .word 0x800028b8 + 800028cc: 00000000 .word 0x00000000 + 800028d0: 80016ca6 .word 0x80016ca6 + 800028d4: 00000000 .word 0x00000000 + 800028d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x8000000000000001 + 800028dc: 00033083 ld x1,0(x6) + 800028e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x7ffffffffffffffe + 800028e4: 00033603 ld x12,0(x6) + 800028e8: 00830313 addi x6,x6,8 + +00000000800028ec : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64esm x30, x1, x12 # perform operation + 800028ec: 36c08f33 aes64esm x30,x1,x12 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f0: 000bb203 ld x4,0(x23) + 800028f4: 01e20c63 beq x4,x30,8000290c + 800028f8: 009082ef jal x5,8000b100 + 800028fc: 800028ec .word 0x800028ec + 80002900: 00000000 .word 0x00000000 + 80002904: 80016d19 .word 0x80016d19 + 80002908: 00000000 .word 0x00000000 + 8000290c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x8000000000000001 + 80002910: 00033403 ld x8,0(x6) + 80002914: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xffffffffffffffff + 80002918: 00033183 ld x3,0(x6) + 8000291c: 00830313 addi x6,x6,8 + +0000000080002920 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64esm x12, x8, x3 # perform operation + 80002920: 36340633 aes64esm x12,x8,x3 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002924: 000bb203 ld x4,0(x23) + 80002928: 00c20c63 beq x4,x12,80002940 + 8000292c: 7d4082ef jal x5,8000b100 + 80002930: 80002920 .word 0x80002920 + 80002934: 00000000 .word 0x00000000 + 80002938: 80016d8c .word 0x80016d8c + 8000293c: 00000000 .word 0x00000000 + 80002940: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x8000000000000001 + 80002944: 00033703 ld x14,0(x6) + 80002948: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xfffffffffffffffe + 8000294c: 00033c83 ld x25,0(x6) + 80002950: 00830313 addi x6,x6,8 + +0000000080002954 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64esm x22, x14, x25 # perform operation + 80002954: 37970b33 aes64esm x22,x14,x25 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002958: 000bb203 ld x4,0(x23) + 8000295c: 01620c63 beq x4,x22,80002974 + 80002960: 7a0082ef jal x5,8000b100 + 80002964: 80002954 .word 0x80002954 + 80002968: 00000000 .word 0x00000000 + 8000296c: 80016dff .word 0x80016dff + 80002970: 00000000 .word 0x00000000 + 80002974: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000001 + 80002978: 00033803 ld x16,0(x6) + 8000297c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80002980: 00033583 ld x11,0(x6) + 80002984: 00830313 addi x6,x6,8 + +0000000080002988 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64esm x24, x16, x11 # perform operation + 80002988: 36b80c33 aes64esm x24,x16,x11 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 8000298c: 000bb203 ld x4,0(x23) + 80002990: 01820c63 beq x4,x24,800029a8 + 80002994: 76c082ef jal x5,8000b100 + 80002998: 80002988 .word 0x80002988 + 8000299c: 00000000 .word 0x00000000 + 800029a0: 80016e72 .word 0x80016e72 + 800029a4: 00000000 .word 0x00000000 + 800029a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x8000000000000001 + 800029ac: 00033f03 ld x30,0(x6) + 800029b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 800029b4: 00033383 ld x7,0(x6) + 800029b8: 00830313 addi x6,x6,8 + +00000000800029bc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x26, x30, x7 # perform operation + 800029bc: 367f0d33 aes64esm x26,x30,x7 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c0: 000bb203 ld x4,0(x23) + 800029c4: 01a20c63 beq x4,x26,800029dc + 800029c8: 738082ef jal x5,8000b100 + 800029cc: 800029bc .word 0x800029bc + 800029d0: 00000000 .word 0x00000000 + 800029d4: 80016ee5 .word 0x80016ee5 + 800029d8: 00000000 .word 0x00000000 + 800029dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x8000000000000001 + 800029e0: 00033d03 ld x26,0(x6) + 800029e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5555555555555555 + 800029e8: 00033103 ld x2,0(x6) + 800029ec: 00830313 addi x6,x6,8 + +00000000800029f0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64esm x14, x26, x2 # perform operation + 800029f0: 362d0733 aes64esm x14,x26,x2 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f4: 000bb203 ld x4,0(x23) + 800029f8: 00e20c63 beq x4,x14,80002a10 + 800029fc: 704082ef jal x5,8000b100 + 80002a00: 800029f0 .word 0x800029f0 + 80002a04: 00000000 .word 0x00000000 + 80002a08: 80016f58 .word 0x80016f58 + 80002a0c: 00000000 .word 0x00000000 + 80002a10: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x8000000000000001 + 80002a14: 00033903 ld x18,0(x6) + 80002a18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x00000000ffffffff + 80002a1c: 00033083 ld x1,0(x6) + 80002a20: 00830313 addi x6,x6,8 + +0000000080002a24 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64esm x21, x18, x1 # perform operation + 80002a24: 36190ab3 aes64esm x21,x18,x1 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a28: 000bb203 ld x4,0(x23) + 80002a2c: 01520c63 beq x4,x21,80002a44 + 80002a30: 6d0082ef jal x5,8000b100 + 80002a34: 80002a24 .word 0x80002a24 + 80002a38: 00000000 .word 0x00000000 + 80002a3c: 80016fcb .word 0x80016fcb + 80002a40: 00000000 .word 0x00000000 + 80002a44: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8000000000000001 + 80002a48: 00033183 ld x3,0(x6) + 80002a4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x00000000fffffffe + 80002a50: 00033103 ld x2,0(x6) + 80002a54: 00830313 addi x6,x6,8 + +0000000080002a58 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64esm x18, x3, x2 # perform operation + 80002a58: 36218933 aes64esm x18,x3,x2 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a5c: 000bb203 ld x4,0(x23) + 80002a60: 01220c63 beq x4,x18,80002a78 + 80002a64: 69c082ef jal x5,8000b100 + 80002a68: 80002a58 .word 0x80002a58 + 80002a6c: 00000000 .word 0x00000000 + 80002a70: 80017036 .word 0x80017036 + 80002a74: 00000000 .word 0x00000000 + 80002a78: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8000000000000001 + 80002a7c: 00033803 ld x16,0(x6) + 80002a80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000100000000 + 80002a84: 00033683 ld x13,0(x6) + 80002a88: 00830313 addi x6,x6,8 + +0000000080002a8c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64esm x28, x16, x13 # perform operation + 80002a8c: 36d80e33 aes64esm x28,x16,x13 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a90: 000bb203 ld x4,0(x23) + 80002a94: 01c20c63 beq x4,x28,80002aac + 80002a98: 668082ef jal x5,8000b100 + 80002a9c: 80002a8c .word 0x80002a8c + 80002aa0: 00000000 .word 0x00000000 + 80002aa4: 800170a1 .word 0x800170a1 + 80002aa8: 00000000 .word 0x00000000 + 80002aac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x8000000000000001 + 80002ab0: 00033683 ld x13,0(x6) + 80002ab4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000001 + 80002ab8: 00033c03 ld x24,0(x6) + 80002abc: 00830313 addi x6,x6,8 + +0000000080002ac0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64esm x18, x13, x24 # perform operation + 80002ac0: 37868933 aes64esm x18,x13,x24 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac4: 000bb203 ld x4,0(x23) + 80002ac8: 01220c63 beq x4,x18,80002ae0 + 80002acc: 634082ef jal x5,8000b100 + 80002ad0: 80002ac0 .word 0x80002ac0 + 80002ad4: 00000000 .word 0x00000000 + 80002ad8: 8001710d .word 0x8001710d + 80002adc: 00000000 .word 0x00000000 + 80002ae0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002ae4: 00033f03 ld x30,0(x6) + 80002ae8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000000000000 + 80002aec: 00033183 ld x3,0(x6) + 80002af0: 00830313 addi x6,x6,8 + +0000000080002af4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64esm x27, x30, x3 # perform operation + 80002af4: 363f0db3 aes64esm x27,x30,x3 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af8: 000bb203 ld x4,0(x23) + 80002afc: 01b20c63 beq x4,x27,80002b14 + 80002b00: 600082ef jal x5,8000b100 + 80002b04: 80002af4 .word 0x80002af4 + 80002b08: 00000000 .word 0x00000000 + 80002b0c: 80017179 .word 0x80017179 + 80002b10: 00000000 .word 0x00000000 + 80002b14: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002b18: 00033d83 ld x27,0(x6) + 80002b1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000000000001 + 80002b20: 00033583 ld x11,0(x6) + 80002b24: 00830313 addi x6,x6,8 + +0000000080002b28 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64esm x30, x27, x11 # perform operation + 80002b28: 36bd8f33 aes64esm x30,x27,x11 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b2c: 000bb203 ld x4,0(x23) + 80002b30: 01e20c63 beq x4,x30,80002b48 + 80002b34: 5cc082ef jal x5,8000b100 + 80002b38: 80002b28 .word 0x80002b28 + 80002b3c: 00000000 .word 0x00000000 + 80002b40: 800171dd .word 0x800171dd + 80002b44: 00000000 .word 0x00000000 + 80002b48: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002b4c: 00033f03 ld x30,0(x6) + 80002b50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000000000002 + 80002b54: 00033483 ld x9,0(x6) + 80002b58: 00830313 addi x6,x6,8 + +0000000080002b5c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64esm x13, x30, x9 # perform operation + 80002b5c: 369f06b3 aes64esm x13,x30,x9 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b60: 000bb203 ld x4,0(x23) + 80002b64: 00d20c63 beq x4,x13,80002b7c + 80002b68: 598082ef jal x5,8000b100 + 80002b6c: 80002b5c .word 0x80002b5c + 80002b70: 00000000 .word 0x00000000 + 80002b74: 80017241 .word 0x80017241 + 80002b78: 00000000 .word 0x00000000 + 80002b7c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002b80: 00033e83 ld x29,0(x6) + 80002b84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x8000000000000000 + 80002b88: 00033c83 ld x25,0(x6) + 80002b8c: 00830313 addi x6,x6,8 + +0000000080002b90 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64esm x28, x29, x25 # perform operation + 80002b90: 379e8e33 aes64esm x28,x29,x25 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b94: 000bb203 ld x4,0(x23) + 80002b98: 01c20c63 beq x4,x28,80002bb0 + 80002b9c: 564082ef jal x5,8000b100 + 80002ba0: 80002b90 .word 0x80002b90 + 80002ba4: 00000000 .word 0x00000000 + 80002ba8: 800172a5 .word 0x800172a5 + 80002bac: 00000000 .word 0x00000000 + 80002bb0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002bb4: 00033e83 ld x29,0(x6) + 80002bb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x8000000000000001 + 80002bbc: 00033c03 ld x24,0(x6) + 80002bc0: 00830313 addi x6,x6,8 + +0000000080002bc4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64esm x17, x29, x24 # perform operation + 80002bc4: 378e88b3 aes64esm x17,x29,x24 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc8: 000bb203 ld x4,0(x23) + 80002bcc: 01120c63 beq x4,x17,80002be4 + 80002bd0: 530082ef jal x5,8000b100 + 80002bd4: 80002bc4 .word 0x80002bc4 + 80002bd8: 00000000 .word 0x00000000 + 80002bdc: 80017318 .word 0x80017318 + 80002be0: 00000000 .word 0x00000000 + 80002be4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002be8: 00033803 ld x16,0(x6) + 80002bec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x7fffffffffffffff + 80002bf0: 00033883 ld x17,0(x6) + 80002bf4: 00830313 addi x6,x6,8 + +0000000080002bf8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64esm x15, x16, x17 # perform operation + 80002bf8: 371807b3 aes64esm x15,x16,x17 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bfc: 000bb203 ld x4,0(x23) + 80002c00: 00f20c63 beq x4,x15,80002c18 + 80002c04: 4fc082ef jal x5,8000b100 + 80002c08: 80002bf8 .word 0x80002bf8 + 80002c0c: 00000000 .word 0x00000000 + 80002c10: 8001738b .word 0x8001738b + 80002c14: 00000000 .word 0x00000000 + 80002c18: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x7fffffffffffffff + 80002c1c: 00033d83 ld x27,0(x6) + 80002c20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7ffffffffffffffe + 80002c24: 00033f83 ld x31,0(x6) + 80002c28: 00830313 addi x6,x6,8 + +0000000080002c2c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64esm x11, x27, x31 # perform operation + 80002c2c: 37fd85b3 aes64esm x11,x27,x31 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c30: 000bb203 ld x4,0(x23) + 80002c34: 00b20c63 beq x4,x11,80002c4c + 80002c38: 4c8082ef jal x5,8000b100 + 80002c3c: 80002c2c .word 0x80002c2c + 80002c40: 00000000 .word 0x00000000 + 80002c44: 800173fe .word 0x800173fe + 80002c48: 00000000 .word 0x00000000 + 80002c4c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002c50: 00033c83 ld x25,0(x6) + 80002c54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xffffffffffffffff + 80002c58: 00033983 ld x19,0(x6) + 80002c5c: 00830313 addi x6,x6,8 + +0000000080002c60 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64esm x28, x25, x19 # perform operation + 80002c60: 373c8e33 aes64esm x28,x25,x19 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c64: 000bb203 ld x4,0(x23) + 80002c68: 01c20c63 beq x4,x28,80002c80 + 80002c6c: 494082ef jal x5,8000b100 + 80002c70: 80002c60 .word 0x80002c60 + 80002c74: 00000000 .word 0x00000000 + 80002c78: 80017471 .word 0x80017471 + 80002c7c: 00000000 .word 0x00000000 + 80002c80: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002c84: 00033383 ld x7,0(x6) + 80002c88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xfffffffffffffffe + 80002c8c: 00033903 ld x18,0(x6) + 80002c90: 00830313 addi x6,x6,8 + +0000000080002c94 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64esm x19, x7, x18 # perform operation + 80002c94: 372389b3 aes64esm x19,x7,x18 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c98: 000bb203 ld x4,0(x23) + 80002c9c: 01320c63 beq x4,x19,80002cb4 + 80002ca0: 460082ef jal x5,8000b100 + 80002ca4: 80002c94 .word 0x80002c94 + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 800174e4 .word 0x800174e4 + 80002cb0: 00000000 .word 0x00000000 + 80002cb4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002cb8: 00033683 ld x13,0(x6) + 80002cbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80002cc0: 00033903 ld x18,0(x6) + 80002cc4: 00830313 addi x6,x6,8 + +0000000080002cc8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64esm x20, x13, x18 # perform operation + 80002cc8: 37268a33 aes64esm x20,x13,x18 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002ccc: 000bb203 ld x4,0(x23) + 80002cd0: 01420c63 beq x4,x20,80002ce8 + 80002cd4: 42c082ef jal x5,8000b100 + 80002cd8: 80002cc8 .word 0x80002cc8 + 80002cdc: 00000000 .word 0x00000000 + 80002ce0: 80017557 .word 0x80017557 + 80002ce4: 00000000 .word 0x00000000 + 80002ce8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002cec: 00033a03 ld x20,0(x6) + 80002cf0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80002cf4: 00033583 ld x11,0(x6) + 80002cf8: 00830313 addi x6,x6,8 + +0000000080002cfc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x14, x20, x11 # perform operation + 80002cfc: 36ba0733 aes64esm x14,x20,x11 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d00: 000bb203 ld x4,0(x23) + 80002d04: 00e20c63 beq x4,x14,80002d1c + 80002d08: 3f8082ef jal x5,8000b100 + 80002d0c: 80002cfc .word 0x80002cfc + 80002d10: 00000000 .word 0x00000000 + 80002d14: 800175ca .word 0x800175ca + 80002d18: 00000000 .word 0x00000000 + 80002d1c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002d20: 00033a83 ld x21,0(x6) + 80002d24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x5555555555555555 + 80002d28: 00033983 ld x19,0(x6) + 80002d2c: 00830313 addi x6,x6,8 + +0000000080002d30 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64esm x28, x21, x19 # perform operation + 80002d30: 373a8e33 aes64esm x28,x21,x19 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d34: 000bb203 ld x4,0(x23) + 80002d38: 01c20c63 beq x4,x28,80002d50 + 80002d3c: 3c4082ef jal x5,8000b100 + 80002d40: 80002d30 .word 0x80002d30 + 80002d44: 00000000 .word 0x00000000 + 80002d48: 8001763d .word 0x8001763d + 80002d4c: 00000000 .word 0x00000000 + 80002d50: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002d54: 00033d03 ld x26,0(x6) + 80002d58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x00000000ffffffff + 80002d5c: 00033583 ld x11,0(x6) + 80002d60: 00830313 addi x6,x6,8 + +0000000080002d64 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64esm x19, x26, x11 # perform operation + 80002d64: 36bd09b3 aes64esm x19,x26,x11 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d68: 000bb203 ld x4,0(x23) + 80002d6c: 01320c63 beq x4,x19,80002d84 + 80002d70: 390082ef jal x5,8000b100 + 80002d74: 80002d64 .word 0x80002d64 + 80002d78: 00000000 .word 0x00000000 + 80002d7c: 800176b0 .word 0x800176b0 + 80002d80: 00000000 .word 0x00000000 + 80002d84: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x7fffffffffffffff + 80002d88: 00033503 ld x10,0(x6) + 80002d8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x00000000fffffffe + 80002d90: 00033583 ld x11,0(x6) + 80002d94: 00830313 addi x6,x6,8 + +0000000080002d98 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64esm x9, x10, x11 # perform operation + 80002d98: 36b504b3 aes64esm x9,x10,x11 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d9c: 000bb203 ld x4,0(x23) + 80002da0: 00920c63 beq x4,x9,80002db8 + 80002da4: 35c082ef jal x5,8000b100 + 80002da8: 80002d98 .word 0x80002d98 + 80002dac: 00000000 .word 0x00000000 + 80002db0: 8001771b .word 0x8001771b + 80002db4: 00000000 .word 0x00000000 + 80002db8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002dbc: 00033583 ld x11,0(x6) + 80002dc0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000100000000 + 80002dc4: 00033383 ld x7,0(x6) + 80002dc8: 00830313 addi x6,x6,8 + +0000000080002dcc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64esm x12, x11, x7 # perform operation + 80002dcc: 36758633 aes64esm x12,x11,x7 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd0: 000bb203 ld x4,0(x23) + 80002dd4: 00c20c63 beq x4,x12,80002dec + 80002dd8: 328082ef jal x5,8000b100 + 80002ddc: 80002dcc .word 0x80002dcc + 80002de0: 00000000 .word 0x00000000 + 80002de4: 80017786 .word 0x80017786 + 80002de8: 00000000 .word 0x00000000 + 80002dec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002df0: 00033b03 ld x22,0(x6) + 80002df4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000001 + 80002df8: 00033c03 ld x24,0(x6) + 80002dfc: 00830313 addi x6,x6,8 + +0000000080002e00 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64esm x21, x22, x24 # perform operation + 80002e00: 378b0ab3 aes64esm x21,x22,x24 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e04: 000bb203 ld x4,0(x23) + 80002e08: 01520c63 beq x4,x21,80002e20 + 80002e0c: 2f4082ef jal x5,8000b100 + 80002e10: 80002e00 .word 0x80002e00 + 80002e14: 00000000 .word 0x00000000 + 80002e18: 800177f2 .word 0x800177f2 + 80002e1c: 00000000 .word 0x00000000 + 80002e20: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002e24: 00033c03 ld x24,0(x6) + 80002e28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000000000000 + 80002e2c: 00033783 ld x15,0(x6) + 80002e30: 00830313 addi x6,x6,8 + +0000000080002e34 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64esm x31, x24, x15 # perform operation + 80002e34: 36fc0fb3 aes64esm x31,x24,x15 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e38: 000bb203 ld x4,0(x23) + 80002e3c: 01f20c63 beq x4,x31,80002e54 + 80002e40: 2c0082ef jal x5,8000b100 + 80002e44: 80002e34 .word 0x80002e34 + 80002e48: 00000000 .word 0x00000000 + 80002e4c: 8001785e .word 0x8001785e + 80002e50: 00000000 .word 0x00000000 + 80002e54: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002e58: 00033c83 ld x25,0(x6) + 80002e5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000000000001 + 80002e60: 00033383 ld x7,0(x6) + 80002e64: 00830313 addi x6,x6,8 + +0000000080002e68 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64esm x21, x25, x7 # perform operation + 80002e68: 367c8ab3 aes64esm x21,x25,x7 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e6c: 000bb203 ld x4,0(x23) + 80002e70: 01520c63 beq x4,x21,80002e88 + 80002e74: 28c082ef jal x5,8000b100 + 80002e78: 80002e68 .word 0x80002e68 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 800178c2 .word 0x800178c2 + 80002e84: 00000000 .word 0x00000000 + 80002e88: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80002e8c: 00033783 ld x15,0(x6) + 80002e90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000000000002 + 80002e94: 00033d03 ld x26,0(x6) + 80002e98: 00830313 addi x6,x6,8 + +0000000080002e9c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64esm x12, x15, x26 # perform operation + 80002e9c: 37a78633 aes64esm x12,x15,x26 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea0: 000bb203 ld x4,0(x23) + 80002ea4: 00c20c63 beq x4,x12,80002ebc + 80002ea8: 258082ef jal x5,8000b100 + 80002eac: 80002e9c .word 0x80002e9c + 80002eb0: 00000000 .word 0x00000000 + 80002eb4: 80017926 .word 0x80017926 + 80002eb8: 00000000 .word 0x00000000 + 80002ebc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002ec0: 00033683 ld x13,0(x6) + 80002ec4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8000000000000000 + 80002ec8: 00033f83 ld x31,0(x6) + 80002ecc: 00830313 addi x6,x6,8 + +0000000080002ed0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64esm x2, x13, x31 # perform operation + 80002ed0: 37f68133 aes64esm x2,x13,x31 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed4: 000bb203 ld x4,0(x23) + 80002ed8: 00220c63 beq x4,x2,80002ef0 + 80002edc: 224082ef jal x5,8000b100 + 80002ee0: 80002ed0 .word 0x80002ed0 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 8001798a .word 0x8001798a + 80002eec: 00000000 .word 0x00000000 + 80002ef0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002ef4: 00033a03 ld x20,0(x6) + 80002ef8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x8000000000000001 + 80002efc: 00033803 ld x16,0(x6) + 80002f00: 00830313 addi x6,x6,8 + +0000000080002f04 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64esm x14, x20, x16 # perform operation + 80002f04: 370a0733 aes64esm x14,x20,x16 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f08: 000bb203 ld x4,0(x23) + 80002f0c: 00e20c63 beq x4,x14,80002f24 + 80002f10: 1f0082ef jal x5,8000b100 + 80002f14: 80002f04 .word 0x80002f04 + 80002f18: 00000000 .word 0x00000000 + 80002f1c: 800179fd .word 0x800179fd + 80002f20: 00000000 .word 0x00000000 + 80002f24: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002f28: 00033b03 ld x22,0(x6) + 80002f2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x7fffffffffffffff + 80002f30: 00033e03 ld x28,0(x6) + 80002f34: 00830313 addi x6,x6,8 + +0000000080002f38 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64esm x21, x22, x28 # perform operation + 80002f38: 37cb0ab3 aes64esm x21,x22,x28 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f3c: 000bb203 ld x4,0(x23) + 80002f40: 01520c63 beq x4,x21,80002f58 + 80002f44: 1bc082ef jal x5,8000b100 + 80002f48: 80002f38 .word 0x80002f38 + 80002f4c: 00000000 .word 0x00000000 + 80002f50: 80017a70 .word 0x80017a70 + 80002f54: 00000000 .word 0x00000000 + 80002f58: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002f5c: 00033c03 ld x24,0(x6) + 80002f60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7ffffffffffffffe + 80002f64: 00033403 ld x8,0(x6) + 80002f68: 00830313 addi x6,x6,8 + +0000000080002f6c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64esm x21, x24, x8 # perform operation + 80002f6c: 368c0ab3 aes64esm x21,x24,x8 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f70: 000bb203 ld x4,0(x23) + 80002f74: 01520c63 beq x4,x21,80002f8c + 80002f78: 188082ef jal x5,8000b100 + 80002f7c: 80002f6c .word 0x80002f6c + 80002f80: 00000000 .word 0x00000000 + 80002f84: 80017ae3 .word 0x80017ae3 + 80002f88: 00000000 .word 0x00000000 + 80002f8c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002f90: 00033b03 ld x22,0(x6) + 80002f94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xffffffffffffffff + 80002f98: 00033d83 ld x27,0(x6) + 80002f9c: 00830313 addi x6,x6,8 + +0000000080002fa0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64esm x29, x22, x27 # perform operation + 80002fa0: 37bb0eb3 aes64esm x29,x22,x27 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa4: 000bb203 ld x4,0(x23) + 80002fa8: 01d20c63 beq x4,x29,80002fc0 + 80002fac: 154082ef jal x5,8000b100 + 80002fb0: 80002fa0 .word 0x80002fa0 + 80002fb4: 00000000 .word 0x00000000 + 80002fb8: 80017b56 .word 0x80017b56 + 80002fbc: 00000000 .word 0x00000000 + 80002fc0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x7ffffffffffffffe + 80002fc4: 00033403 ld x8,0(x6) + 80002fc8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xfffffffffffffffe + 80002fcc: 00033883 ld x17,0(x6) + 80002fd0: 00830313 addi x6,x6,8 + +0000000080002fd4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64esm x3, x8, x17 # perform operation + 80002fd4: 371401b3 aes64esm x3,x8,x17 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd8: 000bb203 ld x4,0(x23) + 80002fdc: 00320c63 beq x4,x3,80002ff4 + 80002fe0: 120082ef jal x5,8000b100 + 80002fe4: 80002fd4 .word 0x80002fd4 + 80002fe8: 00000000 .word 0x00000000 + 80002fec: 80017bc9 .word 0x80017bc9 + 80002ff0: 00000000 .word 0x00000000 + 80002ff4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002ff8: 00033883 ld x17,0(x6) + 80002ffc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x5bbc887763ae86f2 + 80003000: 00033603 ld x12,0(x6) + 80003004: 00830313 addi x6,x6,8 + +0000000080003008 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64esm x24, x17, x12 # perform operation + 80003008: 36c88c33 aes64esm x24,x17,x12 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000300c: 000bb203 ld x4,0(x23) + 80003010: 01820c63 beq x4,x24,80003028 + 80003014: 0ec082ef jal x5,8000b100 + 80003018: 80003008 .word 0x80003008 + 8000301c: 00000000 .word 0x00000000 + 80003020: 80017c3c .word 0x80017c3c + 80003024: 00000000 .word 0x00000000 + 80003028: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x7ffffffffffffffe + 8000302c: 00033803 ld x16,0(x6) + 80003030: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 80003034: 00033083 ld x1,0(x6) + 80003038: 00830313 addi x6,x6,8 + +000000008000303c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x20, x16, x1 # perform operation + 8000303c: 36180a33 aes64esm x20,x16,x1 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003040: 000bb203 ld x4,0(x23) + 80003044: 01420c63 beq x4,x20,8000305c + 80003048: 0b8082ef jal x5,8000b100 + 8000304c: 8000303c .word 0x8000303c + 80003050: 00000000 .word 0x00000000 + 80003054: 80017caf .word 0x80017caf + 80003058: 00000000 .word 0x00000000 + 8000305c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80003060: 00033703 ld x14,0(x6) + 80003064: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x5555555555555555 + 80003068: 00033583 ld x11,0(x6) + 8000306c: 00830313 addi x6,x6,8 + +0000000080003070 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64esm x21, x14, x11 # perform operation + 80003070: 36b70ab3 aes64esm x21,x14,x11 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003074: 000bb203 ld x4,0(x23) + 80003078: 01520c63 beq x4,x21,80003090 + 8000307c: 084082ef jal x5,8000b100 + 80003080: 80003070 .word 0x80003070 + 80003084: 00000000 .word 0x00000000 + 80003088: 80017d22 .word 0x80017d22 + 8000308c: 00000000 .word 0x00000000 + 80003090: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003094: 00033a03 ld x20,0(x6) + 80003098: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x00000000ffffffff + 8000309c: 00033c03 ld x24,0(x6) + 800030a0: 00830313 addi x6,x6,8 + +00000000800030a4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64esm x31, x20, x24 # perform operation + 800030a4: 378a0fb3 aes64esm x31,x20,x24 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a8: 000bb203 ld x4,0(x23) + 800030ac: 01f20c63 beq x4,x31,800030c4 + 800030b0: 050082ef jal x5,8000b100 + 800030b4: 800030a4 .word 0x800030a4 + 800030b8: 00000000 .word 0x00000000 + 800030bc: 80017d95 .word 0x80017d95 + 800030c0: 00000000 .word 0x00000000 + 800030c4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x7ffffffffffffffe + 800030c8: 00033803 ld x16,0(x6) + 800030cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x00000000fffffffe + 800030d0: 00033883 ld x17,0(x6) + 800030d4: 00830313 addi x6,x6,8 + +00000000800030d8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64esm x3, x16, x17 # perform operation + 800030d8: 371801b3 aes64esm x3,x16,x17 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030dc: 000bb203 ld x4,0(x23) + 800030e0: 00320c63 beq x4,x3,800030f8 + 800030e4: 01c082ef jal x5,8000b100 + 800030e8: 800030d8 .word 0x800030d8 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 80017e00 .word 0x80017e00 + 800030f4: 00000000 .word 0x00000000 + 800030f8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x7ffffffffffffffe + 800030fc: 00033503 ld x10,0(x6) + 80003100: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000100000000 + 80003104: 00033183 ld x3,0(x6) + 80003108: 00830313 addi x6,x6,8 + +000000008000310c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64esm x25, x10, x3 # perform operation + 8000310c: 36350cb3 aes64esm x25,x10,x3 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003110: 000bb203 ld x4,0(x23) + 80003114: 01920c63 beq x4,x25,8000312c + 80003118: 7e9072ef jal x5,8000b100 + 8000311c: 8000310c .word 0x8000310c + 80003120: 00000000 .word 0x00000000 + 80003124: 80017e6b .word 0x80017e6b + 80003128: 00000000 .word 0x00000000 + 8000312c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80003130: 00033683 ld x13,0(x6) + 80003134: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000100000001 + 80003138: 00033903 ld x18,0(x6) + 8000313c: 00830313 addi x6,x6,8 + +0000000080003140 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64esm x26, x13, x18 # perform operation + 80003140: 37268d33 aes64esm x26,x13,x18 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003144: 000bb203 ld x4,0(x23) + 80003148: 01a20c63 beq x4,x26,80003160 + 8000314c: 7b5072ef jal x5,8000b100 + 80003150: 80003140 .word 0x80003140 + 80003154: 00000000 .word 0x00000000 + 80003158: 80017ed7 .word 0x80017ed7 + 8000315c: 00000000 .word 0x00000000 + 80003160: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xffffffffffffffff + 80003164: 00033903 ld x18,0(x6) + 80003168: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0000000000000000 + 8000316c: 00033d83 ld x27,0(x6) + 80003170: 00830313 addi x6,x6,8 + +0000000080003174 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64esm x11, x18, x27 # perform operation + 80003174: 37b905b3 aes64esm x11,x18,x27 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003178: 000bb203 ld x4,0(x23) + 8000317c: 00b20c63 beq x4,x11,80003194 + 80003180: 781072ef jal x5,8000b100 + 80003184: 80003174 .word 0x80003174 + 80003188: 00000000 .word 0x00000000 + 8000318c: 80017f43 .word 0x80017f43 + 80003190: 00000000 .word 0x00000000 + 80003194: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xffffffffffffffff + 80003198: 00033083 ld x1,0(x6) + 8000319c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000000000001 + 800031a0: 00033983 ld x19,0(x6) + 800031a4: 00830313 addi x6,x6,8 + +00000000800031a8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64esm x7, x1, x19 # perform operation + 800031a8: 373083b3 aes64esm x7,x1,x19 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031ac: 000bb203 ld x4,0(x23) + 800031b0: 00720c63 beq x4,x7,800031c8 + 800031b4: 74d072ef jal x5,8000b100 + 800031b8: 800031a8 .word 0x800031a8 + 800031bc: 00000000 .word 0x00000000 + 800031c0: 80017fa7 .word 0x80017fa7 + 800031c4: 00000000 .word 0x00000000 + 800031c8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xffffffffffffffff + 800031cc: 00033503 ld x10,0(x6) + 800031d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x0000000000000002 + 800031d4: 00033383 ld x7,0(x6) + 800031d8: 00830313 addi x6,x6,8 + +00000000800031dc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64esm x9, x10, x7 # perform operation + 800031dc: 367504b3 aes64esm x9,x10,x7 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e0: 000bb203 ld x4,0(x23) + 800031e4: 00920c63 beq x4,x9,800031fc + 800031e8: 719072ef jal x5,8000b100 + 800031ec: 800031dc .word 0x800031dc + 800031f0: 00000000 .word 0x00000000 + 800031f4: 8001800b .word 0x8001800b + 800031f8: 00000000 .word 0x00000000 + 800031fc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xffffffffffffffff + 80003200: 00033183 ld x3,0(x6) + 80003204: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x8000000000000000 + 80003208: 00033903 ld x18,0(x6) + 8000320c: 00830313 addi x6,x6,8 + +0000000080003210 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64esm x2, x3, x18 # perform operation + 80003210: 37218133 aes64esm x2,x3,x18 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003214: 000bb203 ld x4,0(x23) + 80003218: 00220c63 beq x4,x2,80003230 + 8000321c: 6e5072ef jal x5,8000b100 + 80003220: 80003210 .word 0x80003210 + 80003224: 00000000 .word 0x00000000 + 80003228: 8001806f .word 0x8001806f + 8000322c: 00000000 .word 0x00000000 + 80003230: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xffffffffffffffff + 80003234: 00033503 ld x10,0(x6) + 80003238: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x8000000000000001 + 8000323c: 00033083 ld x1,0(x6) + 80003240: 00830313 addi x6,x6,8 + +0000000080003244 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64esm x25, x10, x1 # perform operation + 80003244: 36150cb3 aes64esm x25,x10,x1 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003248: 000bb203 ld x4,0(x23) + 8000324c: 01920c63 beq x4,x25,80003264 + 80003250: 6b1072ef jal x5,8000b100 + 80003254: 80003244 .word 0x80003244 + 80003258: 00000000 .word 0x00000000 + 8000325c: 800180e2 .word 0x800180e2 + 80003260: 00000000 .word 0x00000000 + 80003264: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xffffffffffffffff + 80003268: 00033a03 ld x20,0(x6) + 8000326c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x7fffffffffffffff + 80003270: 00033e03 ld x28,0(x6) + 80003274: 00830313 addi x6,x6,8 + +0000000080003278 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64esm x25, x20, x28 # perform operation + 80003278: 37ca0cb3 aes64esm x25,x20,x28 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 8000327c: 000bb203 ld x4,0(x23) + 80003280: 01920c63 beq x4,x25,80003298 + 80003284: 67d072ef jal x5,8000b100 + 80003288: 80003278 .word 0x80003278 + 8000328c: 00000000 .word 0x00000000 + 80003290: 80018155 .word 0x80018155 + 80003294: 00000000 .word 0x00000000 + 80003298: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xffffffffffffffff + 8000329c: 00033403 ld x8,0(x6) + 800032a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x7ffffffffffffffe + 800032a4: 00033b03 ld x22,0(x6) + 800032a8: 00830313 addi x6,x6,8 + +00000000800032ac : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64esm x11, x8, x22 # perform operation + 800032ac: 376405b3 aes64esm x11,x8,x22 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b0: 000bb203 ld x4,0(x23) + 800032b4: 00b20c63 beq x4,x11,800032cc + 800032b8: 649072ef jal x5,8000b100 + 800032bc: 800032ac .word 0x800032ac + 800032c0: 00000000 .word 0x00000000 + 800032c4: 800181c8 .word 0x800181c8 + 800032c8: 00000000 .word 0x00000000 + 800032cc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xffffffffffffffff + 800032d0: 00033103 ld x2,0(x6) + 800032d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xffffffffffffffff + 800032d8: 00033503 ld x10,0(x6) + 800032dc: 00830313 addi x6,x6,8 + +00000000800032e0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64esm x14, x2, x10 # perform operation + 800032e0: 36a10733 aes64esm x14,x2,x10 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e4: 000bb203 ld x4,0(x23) + 800032e8: 00e20c63 beq x4,x14,80003300 + 800032ec: 615072ef jal x5,8000b100 + 800032f0: 800032e0 .word 0x800032e0 + 800032f4: 00000000 .word 0x00000000 + 800032f8: 8001823b .word 0x8001823b + 800032fc: 00000000 .word 0x00000000 + 80003300: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xffffffffffffffff + 80003304: 00033183 ld x3,0(x6) + 80003308: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfffffffffffffffe + 8000330c: 00033583 ld x11,0(x6) + 80003310: 00830313 addi x6,x6,8 + +0000000080003314 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64esm x28, x3, x11 # perform operation + 80003314: 36b18e33 aes64esm x28,x3,x11 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003318: 000bb203 ld x4,0(x23) + 8000331c: 01c20c63 beq x4,x28,80003334 + 80003320: 5e1072ef jal x5,8000b100 + 80003324: 80003314 .word 0x80003314 + 80003328: 00000000 .word 0x00000000 + 8000332c: 800182ae .word 0x800182ae + 80003330: 00000000 .word 0x00000000 + 80003334: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xffffffffffffffff + 80003338: 00033b03 ld x22,0(x6) + 8000333c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80003340: 00033703 ld x14,0(x6) + 80003344: 00830313 addi x6,x6,8 + +0000000080003348 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64esm x10, x22, x14 # perform operation + 80003348: 36eb0533 aes64esm x10,x22,x14 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000334c: 000bb203 ld x4,0(x23) + 80003350: 00a20c63 beq x4,x10,80003368 + 80003354: 5ad072ef jal x5,8000b100 + 80003358: 80003348 .word 0x80003348 + 8000335c: 00000000 .word 0x00000000 + 80003360: 80018321 .word 0x80018321 + 80003364: 00000000 .word 0x00000000 + 80003368: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xffffffffffffffff + 8000336c: 00033803 ld x16,0(x6) + 80003370: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80003374: 00033403 ld x8,0(x6) + 80003378: 00830313 addi x6,x6,8 + +000000008000337c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x12, x16, x8 # perform operation + 8000337c: 36880633 aes64esm x12,x16,x8 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003380: 000bb203 ld x4,0(x23) + 80003384: 00c20c63 beq x4,x12,8000339c + 80003388: 579072ef jal x5,8000b100 + 8000338c: 8000337c .word 0x8000337c + 80003390: 00000000 .word 0x00000000 + 80003394: 80018394 .word 0x80018394 + 80003398: 00000000 .word 0x00000000 + 8000339c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xffffffffffffffff + 800033a0: 00033b03 ld x22,0(x6) + 800033a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5555555555555555 + 800033a8: 00033e83 ld x29,0(x6) + 800033ac: 00830313 addi x6,x6,8 + +00000000800033b0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64esm x18, x22, x29 # perform operation + 800033b0: 37db0933 aes64esm x18,x22,x29 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b4: 000bb203 ld x4,0(x23) + 800033b8: 01220c63 beq x4,x18,800033d0 + 800033bc: 545072ef jal x5,8000b100 + 800033c0: 800033b0 .word 0x800033b0 + 800033c4: 00000000 .word 0x00000000 + 800033c8: 80018407 .word 0x80018407 + 800033cc: 00000000 .word 0x00000000 + 800033d0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xffffffffffffffff + 800033d4: 00033103 ld x2,0(x6) + 800033d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000ffffffff + 800033dc: 00033e83 ld x29,0(x6) + 800033e0: 00830313 addi x6,x6,8 + +00000000800033e4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64esm x22, x2, x29 # perform operation + 800033e4: 37d10b33 aes64esm x22,x2,x29 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e8: 000bb203 ld x4,0(x23) + 800033ec: 01620c63 beq x4,x22,80003404 + 800033f0: 511072ef jal x5,8000b100 + 800033f4: 800033e4 .word 0x800033e4 + 800033f8: 00000000 .word 0x00000000 + 800033fc: 8001847a .word 0x8001847a + 80003400: 00000000 .word 0x00000000 + 80003404: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xffffffffffffffff + 80003408: 00033703 ld x14,0(x6) + 8000340c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x00000000fffffffe + 80003410: 00033683 ld x13,0(x6) + 80003414: 00830313 addi x6,x6,8 + +0000000080003418 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64esm x2, x14, x13 # perform operation + 80003418: 36d70133 aes64esm x2,x14,x13 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 8000341c: 000bb203 ld x4,0(x23) + 80003420: 00220c63 beq x4,x2,80003438 + 80003424: 4dd072ef jal x5,8000b100 + 80003428: 80003418 .word 0x80003418 + 8000342c: 00000000 .word 0x00000000 + 80003430: 800184e5 .word 0x800184e5 + 80003434: 00000000 .word 0x00000000 + 80003438: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xffffffffffffffff + 8000343c: 00033483 ld x9,0(x6) + 80003440: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000100000000 + 80003444: 00033983 ld x19,0(x6) + 80003448: 00830313 addi x6,x6,8 + +000000008000344c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64esm x2, x9, x19 # perform operation + 8000344c: 37348133 aes64esm x2,x9,x19 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003450: 000bb203 ld x4,0(x23) + 80003454: 00220c63 beq x4,x2,8000346c + 80003458: 4a9072ef jal x5,8000b100 + 8000345c: 8000344c .word 0x8000344c + 80003460: 00000000 .word 0x00000000 + 80003464: 80018550 .word 0x80018550 + 80003468: 00000000 .word 0x00000000 + 8000346c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xffffffffffffffff + 80003470: 00033f83 ld x31,0(x6) + 80003474: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000100000001 + 80003478: 00033703 ld x14,0(x6) + 8000347c: 00830313 addi x6,x6,8 + +0000000080003480 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64esm x11, x31, x14 # perform operation + 80003480: 36ef85b3 aes64esm x11,x31,x14 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003484: 000bb203 ld x4,0(x23) + 80003488: 00b20c63 beq x4,x11,800034a0 + 8000348c: 475072ef jal x5,8000b100 + 80003490: 80003480 .word 0x80003480 + 80003494: 00000000 .word 0x00000000 + 80003498: 800185bc .word 0x800185bc + 8000349c: 00000000 .word 0x00000000 + 800034a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xfffffffffffffffe + 800034a4: 00033603 ld x12,0(x6) + 800034a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000000000000 + 800034ac: 00033403 ld x8,0(x6) + 800034b0: 00830313 addi x6,x6,8 + +00000000800034b4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64esm x19, x12, x8 # perform operation + 800034b4: 368609b3 aes64esm x19,x12,x8 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b8: 000bb203 ld x4,0(x23) + 800034bc: 01320c63 beq x4,x19,800034d4 + 800034c0: 441072ef jal x5,8000b100 + 800034c4: 800034b4 .word 0x800034b4 + 800034c8: 00000000 .word 0x00000000 + 800034cc: 80018628 .word 0x80018628 + 800034d0: 00000000 .word 0x00000000 + 800034d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xfffffffffffffffe + 800034d8: 00033503 ld x10,0(x6) + 800034dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x0000000000000001 + 800034e0: 00033103 ld x2,0(x6) + 800034e4: 00830313 addi x6,x6,8 + +00000000800034e8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64esm x21, x10, x2 # perform operation + 800034e8: 36250ab3 aes64esm x21,x10,x2 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034ec: 000bb203 ld x4,0(x23) + 800034f0: 01520c63 beq x4,x21,80003508 + 800034f4: 40d072ef jal x5,8000b100 + 800034f8: 800034e8 .word 0x800034e8 + 800034fc: 00000000 .word 0x00000000 + 80003500: 8001868c .word 0x8001868c + 80003504: 00000000 .word 0x00000000 + 80003508: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xfffffffffffffffe + 8000350c: 00033d83 ld x27,0(x6) + 80003510: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x0000000000000002 + 80003514: 00033783 ld x15,0(x6) + 80003518: 00830313 addi x6,x6,8 + +000000008000351c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64esm x26, x27, x15 # perform operation + 8000351c: 36fd8d33 aes64esm x26,x27,x15 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003520: 000bb203 ld x4,0(x23) + 80003524: 01a20c63 beq x4,x26,8000353c + 80003528: 3d9072ef jal x5,8000b100 + 8000352c: 8000351c .word 0x8000351c + 80003530: 00000000 .word 0x00000000 + 80003534: 800186f0 .word 0x800186f0 + 80003538: 00000000 .word 0x00000000 + 8000353c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xfffffffffffffffe + 80003540: 00033183 ld x3,0(x6) + 80003544: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x8000000000000000 + 80003548: 00033e83 ld x29,0(x6) + 8000354c: 00830313 addi x6,x6,8 + +0000000080003550 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64esm x30, x3, x29 # perform operation + 80003550: 37d18f33 aes64esm x30,x3,x29 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003554: 000bb203 ld x4,0(x23) + 80003558: 01e20c63 beq x4,x30,80003570 + 8000355c: 3a5072ef jal x5,8000b100 + 80003560: 80003550 .word 0x80003550 + 80003564: 00000000 .word 0x00000000 + 80003568: 80018754 .word 0x80018754 + 8000356c: 00000000 .word 0x00000000 + 80003570: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003574: 00033d03 ld x26,0(x6) + 80003578: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8000000000000001 + 8000357c: 00033f83 ld x31,0(x6) + 80003580: 00830313 addi x6,x6,8 + +0000000080003584 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64esm x25, x26, x31 # perform operation + 80003584: 37fd0cb3 aes64esm x25,x26,x31 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003588: 000bb203 ld x4,0(x23) + 8000358c: 01920c63 beq x4,x25,800035a4 + 80003590: 371072ef jal x5,8000b100 + 80003594: 80003584 .word 0x80003584 + 80003598: 00000000 .word 0x00000000 + 8000359c: 800187c7 .word 0x800187c7 + 800035a0: 00000000 .word 0x00000000 + 800035a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xfffffffffffffffe + 800035a8: 00033703 ld x14,0(x6) + 800035ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x7fffffffffffffff + 800035b0: 00033f83 ld x31,0(x6) + 800035b4: 00830313 addi x6,x6,8 + +00000000800035b8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64esm x9, x14, x31 # perform operation + 800035b8: 37f704b3 aes64esm x9,x14,x31 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035bc: 000bb203 ld x4,0(x23) + 800035c0: 00920c63 beq x4,x9,800035d8 + 800035c4: 33d072ef jal x5,8000b100 + 800035c8: 800035b8 .word 0x800035b8 + 800035cc: 00000000 .word 0x00000000 + 800035d0: 8001883a .word 0x8001883a + 800035d4: 00000000 .word 0x00000000 + 800035d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xfffffffffffffffe + 800035dc: 00033503 ld x10,0(x6) + 800035e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800035e4: 00033883 ld x17,0(x6) + 800035e8: 00830313 addi x6,x6,8 + +00000000800035ec : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64esm x13, x10, x17 # perform operation + 800035ec: 371506b3 aes64esm x13,x10,x17 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f0: 000bb203 ld x4,0(x23) + 800035f4: 00d20c63 beq x4,x13,8000360c + 800035f8: 309072ef jal x5,8000b100 + 800035fc: 800035ec .word 0x800035ec + 80003600: 00000000 .word 0x00000000 + 80003604: 800188ad .word 0x800188ad + 80003608: 00000000 .word 0x00000000 + 8000360c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xfffffffffffffffe + 80003610: 00033503 ld x10,0(x6) + 80003614: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xffffffffffffffff + 80003618: 00033683 ld x13,0(x6) + 8000361c: 00830313 addi x6,x6,8 + +0000000080003620 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64esm x17, x10, x13 # perform operation + 80003620: 36d508b3 aes64esm x17,x10,x13 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003624: 000bb203 ld x4,0(x23) + 80003628: 01120c63 beq x4,x17,80003640 + 8000362c: 2d5072ef jal x5,8000b100 + 80003630: 80003620 .word 0x80003620 + 80003634: 00000000 .word 0x00000000 + 80003638: 80018920 .word 0x80018920 + 8000363c: 00000000 .word 0x00000000 + 80003640: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xfffffffffffffffe + 80003644: 00033f83 ld x31,0(x6) + 80003648: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xfffffffffffffffe + 8000364c: 00033383 ld x7,0(x6) + 80003650: 00830313 addi x6,x6,8 + +0000000080003654 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64esm x27, x31, x7 # perform operation + 80003654: 367f8db3 aes64esm x27,x31,x7 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003658: 000bb203 ld x4,0(x23) + 8000365c: 01b20c63 beq x4,x27,80003674 + 80003660: 2a1072ef jal x5,8000b100 + 80003664: 80003654 .word 0x80003654 + 80003668: 00000000 .word 0x00000000 + 8000366c: 80018993 .word 0x80018993 + 80003670: 00000000 .word 0x00000000 + 80003674: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003678: 00033d03 ld x26,0(x6) + 8000367c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003680: 00033103 ld x2,0(x6) + 80003684: 00830313 addi x6,x6,8 + +0000000080003688 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64esm x10, x26, x2 # perform operation + 80003688: 362d0533 aes64esm x10,x26,x2 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 8000368c: 000bb203 ld x4,0(x23) + 80003690: 00a20c63 beq x4,x10,800036a8 + 80003694: 26d072ef jal x5,8000b100 + 80003698: 80003688 .word 0x80003688 + 8000369c: 00000000 .word 0x00000000 + 800036a0: 80018a06 .word 0x80018a06 + 800036a4: 00000000 .word 0x00000000 + 800036a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xfffffffffffffffe + 800036ac: 00033c83 ld x25,0(x6) + 800036b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 800036b4: 00033d03 ld x26,0(x6) + 800036b8: 00830313 addi x6,x6,8 + +00000000800036bc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x31, x25, x26 # perform operation + 800036bc: 37ac8fb3 aes64esm x31,x25,x26 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c0: 000bb203 ld x4,0(x23) + 800036c4: 01f20c63 beq x4,x31,800036dc + 800036c8: 239072ef jal x5,8000b100 + 800036cc: 800036bc .word 0x800036bc + 800036d0: 00000000 .word 0x00000000 + 800036d4: 80018a79 .word 0x80018a79 + 800036d8: 00000000 .word 0x00000000 + 800036dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xfffffffffffffffe + 800036e0: 00033c83 ld x25,0(x6) + 800036e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x5555555555555555 + 800036e8: 00033983 ld x19,0(x6) + 800036ec: 00830313 addi x6,x6,8 + +00000000800036f0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64esm x16, x25, x19 # perform operation + 800036f0: 373c8833 aes64esm x16,x25,x19 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f4: 000bb203 ld x4,0(x23) + 800036f8: 01020c63 beq x4,x16,80003710 + 800036fc: 205072ef jal x5,8000b100 + 80003700: 800036f0 .word 0x800036f0 + 80003704: 00000000 .word 0x00000000 + 80003708: 80018aec .word 0x80018aec + 8000370c: 00000000 .word 0x00000000 + 80003710: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xfffffffffffffffe + 80003714: 00033c83 ld x25,0(x6) + 80003718: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x00000000ffffffff + 8000371c: 00033e03 ld x28,0(x6) + 80003720: 00830313 addi x6,x6,8 + +0000000080003724 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64esm x24, x25, x28 # perform operation + 80003724: 37cc8c33 aes64esm x24,x25,x28 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003728: 000bb203 ld x4,0(x23) + 8000372c: 01820c63 beq x4,x24,80003744 + 80003730: 1d1072ef jal x5,8000b100 + 80003734: 80003724 .word 0x80003724 + 80003738: 00000000 .word 0x00000000 + 8000373c: 80018b5f .word 0x80018b5f + 80003740: 00000000 .word 0x00000000 + 80003744: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xfffffffffffffffe + 80003748: 00033d83 ld x27,0(x6) + 8000374c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x00000000fffffffe + 80003750: 00033d03 ld x26,0(x6) + 80003754: 00830313 addi x6,x6,8 + +0000000080003758 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64esm x25, x27, x26 # perform operation + 80003758: 37ad8cb3 aes64esm x25,x27,x26 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 8000375c: 000bb203 ld x4,0(x23) + 80003760: 01920c63 beq x4,x25,80003778 + 80003764: 19d072ef jal x5,8000b100 + 80003768: 80003758 .word 0x80003758 + 8000376c: 00000000 .word 0x00000000 + 80003770: 80018bca .word 0x80018bca + 80003774: 00000000 .word 0x00000000 + 80003778: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xfffffffffffffffe + 8000377c: 00033e83 ld x29,0(x6) + 80003780: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000000 + 80003784: 00033c03 ld x24,0(x6) + 80003788: 00830313 addi x6,x6,8 + +000000008000378c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64esm x10, x29, x24 # perform operation + 8000378c: 378e8533 aes64esm x10,x29,x24 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003790: 000bb203 ld x4,0(x23) + 80003794: 00a20c63 beq x4,x10,800037ac + 80003798: 169072ef jal x5,8000b100 + 8000379c: 8000378c .word 0x8000378c + 800037a0: 00000000 .word 0x00000000 + 800037a4: 80018c35 .word 0x80018c35 + 800037a8: 00000000 .word 0x00000000 + 800037ac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xfffffffffffffffe + 800037b0: 00033703 ld x14,0(x6) + 800037b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0000000100000001 + 800037b8: 00033e83 ld x29,0(x6) + 800037bc: 00830313 addi x6,x6,8 + +00000000800037c0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64esm x7, x14, x29 # perform operation + 800037c0: 37d703b3 aes64esm x7,x14,x29 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c4: 000bb203 ld x4,0(x23) + 800037c8: 00720c63 beq x4,x7,800037e0 + 800037cc: 135072ef jal x5,8000b100 + 800037d0: 800037c0 .word 0x800037c0 + 800037d4: 00000000 .word 0x00000000 + 800037d8: 80018ca1 .word 0x80018ca1 + 800037dc: 00000000 .word 0x00000000 + 800037e0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 800037e4: 00033883 ld x17,0(x6) + 800037e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000000000000 + 800037ec: 00033d03 ld x26,0(x6) + 800037f0: 00830313 addi x6,x6,8 + +00000000800037f4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64esm x14, x17, x26 # perform operation + 800037f4: 37a88733 aes64esm x14,x17,x26 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f8: 000bb203 ld x4,0(x23) + 800037fc: 00e20c63 beq x4,x14,80003814 + 80003800: 101072ef jal x5,8000b100 + 80003804: 800037f4 .word 0x800037f4 + 80003808: 00000000 .word 0x00000000 + 8000380c: 80018d0d .word 0x80018d0d + 80003810: 00000000 .word 0x00000000 + 80003814: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80003818: 00033a03 ld x20,0(x6) + 8000381c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000001 + 80003820: 00033083 ld x1,0(x6) + 80003824: 00830313 addi x6,x6,8 + +0000000080003828 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64esm x22, x20, x1 # perform operation + 80003828: 361a0b33 aes64esm x22,x20,x1 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 8000382c: 000bb203 ld x4,0(x23) + 80003830: 01620c63 beq x4,x22,80003848 + 80003834: 0cd072ef jal x5,8000b100 + 80003838: 80003828 .word 0x80003828 + 8000383c: 00000000 .word 0x00000000 + 80003840: 80018d71 .word 0x80018d71 + 80003844: 00000000 .word 0x00000000 + 80003848: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 8000384c: 00033883 ld x17,0(x6) + 80003850: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000000000002 + 80003854: 00033983 ld x19,0(x6) + 80003858: 00830313 addi x6,x6,8 + +000000008000385c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64esm x15, x17, x19 # perform operation + 8000385c: 373887b3 aes64esm x15,x17,x19 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003860: 000bb203 ld x4,0(x23) + 80003864: 00f20c63 beq x4,x15,8000387c + 80003868: 099072ef jal x5,8000b100 + 8000386c: 8000385c .word 0x8000385c + 80003870: 00000000 .word 0x00000000 + 80003874: 80018dd5 .word 0x80018dd5 + 80003878: 00000000 .word 0x00000000 + 8000387c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 80003880: 00033c83 ld x25,0(x6) + 80003884: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000000 + 80003888: 00033383 ld x7,0(x6) + 8000388c: 00830313 addi x6,x6,8 + +0000000080003890 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64esm x18, x25, x7 # perform operation + 80003890: 367c8933 aes64esm x18,x25,x7 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003894: 000bb203 ld x4,0(x23) + 80003898: 01220c63 beq x4,x18,800038b0 + 8000389c: 065072ef jal x5,8000b100 + 800038a0: 80003890 .word 0x80003890 + 800038a4: 00000000 .word 0x00000000 + 800038a8: 80018e39 .word 0x80018e39 + 800038ac: 00000000 .word 0x00000000 + 800038b0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038b4: 00033983 ld x19,0(x6) + 800038b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x8000000000000001 + 800038bc: 00033703 ld x14,0(x6) + 800038c0: 00830313 addi x6,x6,8 + +00000000800038c4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64esm x7, x19, x14 # perform operation + 800038c4: 36e983b3 aes64esm x7,x19,x14 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c8: 000bb203 ld x4,0(x23) + 800038cc: 00720c63 beq x4,x7,800038e4 + 800038d0: 031072ef jal x5,8000b100 + 800038d4: 800038c4 .word 0x800038c4 + 800038d8: 00000000 .word 0x00000000 + 800038dc: 80018eac .word 0x80018eac + 800038e0: 00000000 .word 0x00000000 + 800038e4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800038e8: 00033603 ld x12,0(x6) + 800038ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7fffffffffffffff + 800038f0: 00033403 ld x8,0(x6) + 800038f4: 00830313 addi x6,x6,8 + +00000000800038f8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64esm x20, x12, x8 # perform operation + 800038f8: 36860a33 aes64esm x20,x12,x8 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038fc: 000bb203 ld x4,0(x23) + 80003900: 01420c63 beq x4,x20,80003918 + 80003904: 7fc072ef jal x5,8000b100 + 80003908: 800038f8 .word 0x800038f8 + 8000390c: 00000000 .word 0x00000000 + 80003910: 80018f1f .word 0x80018f1f + 80003914: 00000000 .word 0x00000000 + 80003918: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 8000391c: 00033a03 ld x20,0(x6) + 80003920: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80003924: 00033583 ld x11,0(x6) + 80003928: 00830313 addi x6,x6,8 + +000000008000392c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64esm x8, x20, x11 # perform operation + 8000392c: 36ba0433 aes64esm x8,x20,x11 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003930: 000bb203 ld x4,0(x23) + 80003934: 00820c63 beq x4,x8,8000394c + 80003938: 7c8072ef jal x5,8000b100 + 8000393c: 8000392c .word 0x8000392c + 80003940: 00000000 .word 0x00000000 + 80003944: 80018f92 .word 0x80018f92 + 80003948: 00000000 .word 0x00000000 + 8000394c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 80003950: 00033d03 ld x26,0(x6) + 80003954: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xffffffffffffffff + 80003958: 00033403 ld x8,0(x6) + 8000395c: 00830313 addi x6,x6,8 + +0000000080003960 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64esm x22, x26, x8 # perform operation + 80003960: 368d0b33 aes64esm x22,x26,x8 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003964: 000bb203 ld x4,0(x23) + 80003968: 01620c63 beq x4,x22,80003980 + 8000396c: 794072ef jal x5,8000b100 + 80003970: 80003960 .word 0x80003960 + 80003974: 00000000 .word 0x00000000 + 80003978: 80019005 .word 0x80019005 + 8000397c: 00000000 .word 0x00000000 + 80003980: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 80003984: 00033603 ld x12,0(x6) + 80003988: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xfffffffffffffffe + 8000398c: 00033a03 ld x20,0(x6) + 80003990: 00830313 addi x6,x6,8 + +0000000080003994 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64esm x19, x12, x20 # perform operation + 80003994: 374609b3 aes64esm x19,x12,x20 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003998: 000bb203 ld x4,0(x23) + 8000399c: 01320c63 beq x4,x19,800039b4 + 800039a0: 760072ef jal x5,8000b100 + 800039a4: 80003994 .word 0x80003994 + 800039a8: 00000000 .word 0x00000000 + 800039ac: 80019078 .word 0x80019078 + 800039b0: 00000000 .word 0x00000000 + 800039b4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 800039b8: 00033183 ld x3,0(x6) + 800039bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 800039c0: 00033803 ld x16,0(x6) + 800039c4: 00830313 addi x6,x6,8 + +00000000800039c8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64esm x11, x3, x16 # perform operation + 800039c8: 370185b3 aes64esm x11,x3,x16 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039cc: 000bb203 ld x4,0(x23) + 800039d0: 00b20c63 beq x4,x11,800039e8 + 800039d4: 72c072ef jal x5,8000b100 + 800039d8: 800039c8 .word 0x800039c8 + 800039dc: 00000000 .word 0x00000000 + 800039e0: 800190eb .word 0x800190eb + 800039e4: 00000000 .word 0x00000000 + 800039e8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x5bbc887763ae86f2 + 800039ec: 00033c83 ld x25,0(x6) + 800039f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 800039f4: 00033d83 ld x27,0(x6) + 800039f8: 00830313 addi x6,x6,8 + +00000000800039fc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x22, x25, x27 # perform operation + 800039fc: 37bc8b33 aes64esm x22,x25,x27 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a00: 000bb203 ld x4,0(x23) + 80003a04: 01620c63 beq x4,x22,80003a1c + 80003a08: 6f8072ef jal x5,8000b100 + 80003a0c: 800039fc .word 0x800039fc + 80003a10: 00000000 .word 0x00000000 + 80003a14: 8001915e .word 0x8001915e + 80003a18: 00000000 .word 0x00000000 + 80003a1c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80003a20: 00033803 ld x16,0(x6) + 80003a24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x5555555555555555 + 80003a28: 00033583 ld x11,0(x6) + 80003a2c: 00830313 addi x6,x6,8 + +0000000080003a30 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64esm x10, x16, x11 # perform operation + 80003a30: 36b80533 aes64esm x10,x16,x11 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a34: 000bb203 ld x4,0(x23) + 80003a38: 00a20c63 beq x4,x10,80003a50 + 80003a3c: 6c4072ef jal x5,8000b100 + 80003a40: 80003a30 .word 0x80003a30 + 80003a44: 00000000 .word 0x00000000 + 80003a48: 800191d1 .word 0x800191d1 + 80003a4c: 00000000 .word 0x00000000 + 80003a50: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 80003a54: 00033a83 ld x21,0(x6) + 80003a58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x00000000ffffffff + 80003a5c: 00033e03 ld x28,0(x6) + 80003a60: 00830313 addi x6,x6,8 + +0000000080003a64 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64esm x31, x21, x28 # perform operation + 80003a64: 37ca8fb3 aes64esm x31,x21,x28 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a68: 000bb203 ld x4,0(x23) + 80003a6c: 01f20c63 beq x4,x31,80003a84 + 80003a70: 690072ef jal x5,8000b100 + 80003a74: 80003a64 .word 0x80003a64 + 80003a78: 00000000 .word 0x00000000 + 80003a7c: 80019244 .word 0x80019244 + 80003a80: 00000000 .word 0x00000000 + 80003a84: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5bbc887763ae86f2 + 80003a88: 00033d83 ld x27,0(x6) + 80003a8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x00000000fffffffe + 80003a90: 00033903 ld x18,0(x6) + 80003a94: 00830313 addi x6,x6,8 + +0000000080003a98 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64esm x25, x27, x18 # perform operation + 80003a98: 372d8cb3 aes64esm x25,x27,x18 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a9c: 000bb203 ld x4,0(x23) + 80003aa0: 01920c63 beq x4,x25,80003ab8 + 80003aa4: 65c072ef jal x5,8000b100 + 80003aa8: 80003a98 .word 0x80003a98 + 80003aac: 00000000 .word 0x00000000 + 80003ab0: 800192af .word 0x800192af + 80003ab4: 00000000 .word 0x00000000 + 80003ab8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 80003abc: 00033e03 ld x28,0(x6) + 80003ac0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000100000000 + 80003ac4: 00033583 ld x11,0(x6) + 80003ac8: 00830313 addi x6,x6,8 + +0000000080003acc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64esm x13, x28, x11 # perform operation + 80003acc: 36be06b3 aes64esm x13,x28,x11 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad0: 000bb203 ld x4,0(x23) + 80003ad4: 00d20c63 beq x4,x13,80003aec + 80003ad8: 628072ef jal x5,8000b100 + 80003adc: 80003acc .word 0x80003acc + 80003ae0: 00000000 .word 0x00000000 + 80003ae4: 8001931a .word 0x8001931a + 80003ae8: 00000000 .word 0x00000000 + 80003aec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80003af0: 00033703 ld x14,0(x6) + 80003af4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000100000001 + 80003af8: 00033583 ld x11,0(x6) + 80003afc: 00830313 addi x6,x6,8 + +0000000080003b00 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64esm x9, x14, x11 # perform operation + 80003b00: 36b704b3 aes64esm x9,x14,x11 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b04: 000bb203 ld x4,0(x23) + 80003b08: 00920c63 beq x4,x9,80003b20 + 80003b0c: 5f4072ef jal x5,8000b100 + 80003b10: 80003b00 .word 0x80003b00 + 80003b14: 00000000 .word 0x00000000 + 80003b18: 80019386 .word 0x80019386 + 80003b1c: 00000000 .word 0x00000000 + 80003b20: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003b24: 00033a83 ld x21,0(x6) + 80003b28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000000 + 80003b2c: 00033083 ld x1,0(x6) + 80003b30: 00830313 addi x6,x6,8 + +0000000080003b34 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64esm x29, x21, x1 # perform operation + 80003b34: 361a8eb3 aes64esm x29,x21,x1 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b38: 000bb203 ld x4,0(x23) + 80003b3c: 01d20c63 beq x4,x29,80003b54 + 80003b40: 5c0072ef jal x5,8000b100 + 80003b44: 80003b34 .word 0x80003b34 + 80003b48: 00000000 .word 0x00000000 + 80003b4c: 800193f2 .word 0x800193f2 + 80003b50: 00000000 .word 0x00000000 + 80003b54: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80003b58: 00033403 ld x8,0(x6) + 80003b5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x0000000000000001 + 80003b60: 00033e03 ld x28,0(x6) + 80003b64: 00830313 addi x6,x6,8 + +0000000080003b68 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64esm x2, x8, x28 # perform operation + 80003b68: 37c40133 aes64esm x2,x8,x28 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b6c: 000bb203 ld x4,0(x23) + 80003b70: 00220c63 beq x4,x2,80003b88 + 80003b74: 58c072ef jal x5,8000b100 + 80003b78: 80003b68 .word 0x80003b68 + 80003b7c: 00000000 .word 0x00000000 + 80003b80: 80019456 .word 0x80019456 + 80003b84: 00000000 .word 0x00000000 + 80003b88: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b8c: 00033703 ld x14,0(x6) + 80003b90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0000000000000002 + 80003b94: 00033903 ld x18,0(x6) + 80003b98: 00830313 addi x6,x6,8 + +0000000080003b9c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64esm x28, x14, x18 # perform operation + 80003b9c: 37270e33 aes64esm x28,x14,x18 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba0: 000bb203 ld x4,0(x23) + 80003ba4: 01c20c63 beq x4,x28,80003bbc + 80003ba8: 558072ef jal x5,8000b100 + 80003bac: 80003b9c .word 0x80003b9c + 80003bb0: 00000000 .word 0x00000000 + 80003bb4: 800194ba .word 0x800194ba + 80003bb8: 00000000 .word 0x00000000 + 80003bbc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003bc0: 00033683 ld x13,0(x6) + 80003bc4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x8000000000000000 + 80003bc8: 00033f03 ld x30,0(x6) + 80003bcc: 00830313 addi x6,x6,8 + +0000000080003bd0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64esm x10, x13, x30 # perform operation + 80003bd0: 37e68533 aes64esm x10,x13,x30 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd4: 000bb203 ld x4,0(x23) + 80003bd8: 00a20c63 beq x4,x10,80003bf0 + 80003bdc: 524072ef jal x5,8000b100 + 80003be0: 80003bd0 .word 0x80003bd0 + 80003be4: 00000000 .word 0x00000000 + 80003be8: 8001951e .word 0x8001951e + 80003bec: 00000000 .word 0x00000000 + 80003bf0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003bf4: 00033503 ld x10,0(x6) + 80003bf8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x8000000000000001 + 80003bfc: 00033c03 ld x24,0(x6) + 80003c00: 00830313 addi x6,x6,8 + +0000000080003c04 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64esm x21, x10, x24 # perform operation + 80003c04: 37850ab3 aes64esm x21,x10,x24 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c08: 000bb203 ld x4,0(x23) + 80003c0c: 01520c63 beq x4,x21,80003c24 + 80003c10: 4f0072ef jal x5,8000b100 + 80003c14: 80003c04 .word 0x80003c04 + 80003c18: 00000000 .word 0x00000000 + 80003c1c: 80019591 .word 0x80019591 + 80003c20: 00000000 .word 0x00000000 + 80003c24: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003c28: 00033a03 ld x20,0(x6) + 80003c2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x7fffffffffffffff + 80003c30: 00033c03 ld x24,0(x6) + 80003c34: 00830313 addi x6,x6,8 + +0000000080003c38 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64esm x7, x20, x24 # perform operation + 80003c38: 378a03b3 aes64esm x7,x20,x24 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c3c: 000bb203 ld x4,0(x23) + 80003c40: 00720c63 beq x4,x7,80003c58 + 80003c44: 4bc072ef jal x5,8000b100 + 80003c48: 80003c38 .word 0x80003c38 + 80003c4c: 00000000 .word 0x00000000 + 80003c50: 80019604 .word 0x80019604 + 80003c54: 00000000 .word 0x00000000 + 80003c58: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003c5c: 00033803 ld x16,0(x6) + 80003c60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80003c64: 00033783 ld x15,0(x6) + 80003c68: 00830313 addi x6,x6,8 + +0000000080003c6c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64esm x27, x16, x15 # perform operation + 80003c6c: 36f80db3 aes64esm x27,x16,x15 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c70: 000bb203 ld x4,0(x23) + 80003c74: 01b20c63 beq x4,x27,80003c8c + 80003c78: 488072ef jal x5,8000b100 + 80003c7c: 80003c6c .word 0x80003c6c + 80003c80: 00000000 .word 0x00000000 + 80003c84: 80019677 .word 0x80019677 + 80003c88: 00000000 .word 0x00000000 + 80003c8c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003c90: 00033a83 ld x21,0(x6) + 80003c94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xffffffffffffffff + 80003c98: 00033803 ld x16,0(x6) + 80003c9c: 00830313 addi x6,x6,8 + +0000000080003ca0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64esm x10, x21, x16 # perform operation + 80003ca0: 370a8533 aes64esm x10,x21,x16 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca4: 000bb203 ld x4,0(x23) + 80003ca8: 00a20c63 beq x4,x10,80003cc0 + 80003cac: 454072ef jal x5,8000b100 + 80003cb0: 80003ca0 .word 0x80003ca0 + 80003cb4: 00000000 .word 0x00000000 + 80003cb8: 800196ea .word 0x800196ea + 80003cbc: 00000000 .word 0x00000000 + 80003cc0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xaaaaaaaaaaaaaaaa + 80003cc4: 00033603 ld x12,0(x6) + 80003cc8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xfffffffffffffffe + 80003ccc: 00033e03 ld x28,0(x6) + 80003cd0: 00830313 addi x6,x6,8 + +0000000080003cd4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64esm x2, x12, x28 # perform operation + 80003cd4: 37c60133 aes64esm x2,x12,x28 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd8: 000bb203 ld x4,0(x23) + 80003cdc: 00220c63 beq x4,x2,80003cf4 + 80003ce0: 420072ef jal x5,8000b100 + 80003ce4: 80003cd4 .word 0x80003cd4 + 80003ce8: 00000000 .word 0x00000000 + 80003cec: 8001975d .word 0x8001975d + 80003cf0: 00000000 .word 0x00000000 + 80003cf4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80003cf8: 00033383 ld x7,0(x6) + 80003cfc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80003d00: 00033903 ld x18,0(x6) + 80003d04: 00830313 addi x6,x6,8 + +0000000080003d08 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64esm x17, x7, x18 # perform operation + 80003d08: 372388b3 aes64esm x17,x7,x18 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d0c: 000bb203 ld x4,0(x23) + 80003d10: 01120c63 beq x4,x17,80003d28 + 80003d14: 3ec072ef jal x5,8000b100 + 80003d18: 80003d08 .word 0x80003d08 + 80003d1c: 00000000 .word 0x00000000 + 80003d20: 800197d0 .word 0x800197d0 + 80003d24: 00000000 .word 0x00000000 + 80003d28: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003d2c: 00033e03 ld x28,0(x6) + 80003d30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80003d34: 00033a83 ld x21,0(x6) + 80003d38: 00830313 addi x6,x6,8 + +0000000080003d3c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x3, x28, x21 # perform operation + 80003d3c: 375e01b3 aes64esm x3,x28,x21 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d40: 000bb203 ld x4,0(x23) + 80003d44: 00320c63 beq x4,x3,80003d5c + 80003d48: 3b8072ef jal x5,8000b100 + 80003d4c: 80003d3c .word 0x80003d3c + 80003d50: 00000000 .word 0x00000000 + 80003d54: 80019843 .word 0x80019843 + 80003d58: 00000000 .word 0x00000000 + 80003d5c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003d60: 00033783 ld x15,0(x6) + 80003d64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5555555555555555 + 80003d68: 00033b03 ld x22,0(x6) + 80003d6c: 00830313 addi x6,x6,8 + +0000000080003d70 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64esm x21, x15, x22 # perform operation + 80003d70: 37678ab3 aes64esm x21,x15,x22 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d74: 000bb203 ld x4,0(x23) + 80003d78: 01520c63 beq x4,x21,80003d90 + 80003d7c: 384072ef jal x5,8000b100 + 80003d80: 80003d70 .word 0x80003d70 + 80003d84: 00000000 .word 0x00000000 + 80003d88: 800198b6 .word 0x800198b6 + 80003d8c: 00000000 .word 0x00000000 + 80003d90: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xaaaaaaaaaaaaaaaa + 80003d94: 00033183 ld x3,0(x6) + 80003d98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x00000000ffffffff + 80003d9c: 00033083 ld x1,0(x6) + 80003da0: 00830313 addi x6,x6,8 + +0000000080003da4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64esm x17, x3, x1 # perform operation + 80003da4: 361188b3 aes64esm x17,x3,x1 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da8: 000bb203 ld x4,0(x23) + 80003dac: 01120c63 beq x4,x17,80003dc4 + 80003db0: 350072ef jal x5,8000b100 + 80003db4: 80003da4 .word 0x80003da4 + 80003db8: 00000000 .word 0x00000000 + 80003dbc: 80019929 .word 0x80019929 + 80003dc0: 00000000 .word 0x00000000 + 80003dc4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003dc8: 00033683 ld x13,0(x6) + 80003dcc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x00000000fffffffe + 80003dd0: 00033803 ld x16,0(x6) + 80003dd4: 00830313 addi x6,x6,8 + +0000000080003dd8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64esm x25, x13, x16 # perform operation + 80003dd8: 37068cb3 aes64esm x25,x13,x16 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003ddc: 000bb203 ld x4,0(x23) + 80003de0: 01920c63 beq x4,x25,80003df8 + 80003de4: 31c072ef jal x5,8000b100 + 80003de8: 80003dd8 .word 0x80003dd8 + 80003dec: 00000000 .word 0x00000000 + 80003df0: 80019994 .word 0x80019994 + 80003df4: 00000000 .word 0x00000000 + 80003df8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003dfc: 00033683 ld x13,0(x6) + 80003e00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000100000000 + 80003e04: 00033703 ld x14,0(x6) + 80003e08: 00830313 addi x6,x6,8 + +0000000080003e0c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64esm x16, x13, x14 # perform operation + 80003e0c: 36e68833 aes64esm x16,x13,x14 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e10: 000bb203 ld x4,0(x23) + 80003e14: 01020c63 beq x4,x16,80003e2c + 80003e18: 2e8072ef jal x5,8000b100 + 80003e1c: 80003e0c .word 0x80003e0c + 80003e20: 00000000 .word 0x00000000 + 80003e24: 800199ff .word 0x800199ff + 80003e28: 00000000 .word 0x00000000 + 80003e2c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003e30: 00033503 ld x10,0(x6) + 80003e34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0000000100000001 + 80003e38: 00033183 ld x3,0(x6) + 80003e3c: 00830313 addi x6,x6,8 + +0000000080003e40 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64esm x7, x10, x3 # perform operation + 80003e40: 363503b3 aes64esm x7,x10,x3 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e44: 000bb203 ld x4,0(x23) + 80003e48: 00720c63 beq x4,x7,80003e60 + 80003e4c: 2b4072ef jal x5,8000b100 + 80003e50: 80003e40 .word 0x80003e40 + 80003e54: 00000000 .word 0x00000000 + 80003e58: 80019a6b .word 0x80019a6b + 80003e5c: 00000000 .word 0x00000000 + 80003e60: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5555555555555555 + 80003e64: 00033d83 ld x27,0(x6) + 80003e68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x0000000000000000 + 80003e6c: 00033a03 ld x20,0(x6) + 80003e70: 00830313 addi x6,x6,8 + +0000000080003e74 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64esm x28, x27, x20 # perform operation + 80003e74: 374d8e33 aes64esm x28,x27,x20 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e78: 000bb203 ld x4,0(x23) + 80003e7c: 01c20c63 beq x4,x28,80003e94 + 80003e80: 280072ef jal x5,8000b100 + 80003e84: 80003e74 .word 0x80003e74 + 80003e88: 00000000 .word 0x00000000 + 80003e8c: 80019ad7 .word 0x80019ad7 + 80003e90: 00000000 .word 0x00000000 + 80003e94: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5555555555555555 + 80003e98: 00033183 ld x3,0(x6) + 80003e9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x0000000000000001 + 80003ea0: 00033f03 ld x30,0(x6) + 80003ea4: 00830313 addi x6,x6,8 + +0000000080003ea8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64esm x24, x3, x30 # perform operation + 80003ea8: 37e18c33 aes64esm x24,x3,x30 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eac: 000bb203 ld x4,0(x23) + 80003eb0: 01820c63 beq x4,x24,80003ec8 + 80003eb4: 24c072ef jal x5,8000b100 + 80003eb8: 80003ea8 .word 0x80003ea8 + 80003ebc: 00000000 .word 0x00000000 + 80003ec0: 80019b3b .word 0x80019b3b + 80003ec4: 00000000 .word 0x00000000 + 80003ec8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5555555555555555 + 80003ecc: 00033503 ld x10,0(x6) + 80003ed0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0000000000000002 + 80003ed4: 00033703 ld x14,0(x6) + 80003ed8: 00830313 addi x6,x6,8 + +0000000080003edc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64esm x22, x10, x14 # perform operation + 80003edc: 36e50b33 aes64esm x22,x10,x14 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee0: 000bb203 ld x4,0(x23) + 80003ee4: 01620c63 beq x4,x22,80003efc + 80003ee8: 218072ef jal x5,8000b100 + 80003eec: 80003edc .word 0x80003edc + 80003ef0: 00000000 .word 0x00000000 + 80003ef4: 80019b9f .word 0x80019b9f + 80003ef8: 00000000 .word 0x00000000 + 80003efc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x5555555555555555 + 80003f00: 00033403 ld x8,0(x6) + 80003f04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x8000000000000000 + 80003f08: 00033583 ld x11,0(x6) + 80003f0c: 00830313 addi x6,x6,8 + +0000000080003f10 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64esm x24, x8, x11 # perform operation + 80003f10: 36b40c33 aes64esm x24,x8,x11 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f14: 000bb203 ld x4,0(x23) + 80003f18: 01820c63 beq x4,x24,80003f30 + 80003f1c: 1e4072ef jal x5,8000b100 + 80003f20: 80003f10 .word 0x80003f10 + 80003f24: 00000000 .word 0x00000000 + 80003f28: 80019c03 .word 0x80019c03 + 80003f2c: 00000000 .word 0x00000000 + 80003f30: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5555555555555555 + 80003f34: 00033503 ld x10,0(x6) + 80003f38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x8000000000000001 + 80003f3c: 00033903 ld x18,0(x6) + 80003f40: 00830313 addi x6,x6,8 + +0000000080003f44 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64esm x9, x10, x18 # perform operation + 80003f44: 372504b3 aes64esm x9,x10,x18 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f48: 000bb203 ld x4,0(x23) + 80003f4c: 00920c63 beq x4,x9,80003f64 + 80003f50: 1b0072ef jal x5,8000b100 + 80003f54: 80003f44 .word 0x80003f44 + 80003f58: 00000000 .word 0x00000000 + 80003f5c: 80019c76 .word 0x80019c76 + 80003f60: 00000000 .word 0x00000000 + 80003f64: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x5555555555555555 + 80003f68: 00033403 ld x8,0(x6) + 80003f6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x7fffffffffffffff + 80003f70: 00033683 ld x13,0(x6) + 80003f74: 00830313 addi x6,x6,8 + +0000000080003f78 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64esm x3, x8, x13 # perform operation + 80003f78: 36d401b3 aes64esm x3,x8,x13 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f7c: 000bb203 ld x4,0(x23) + 80003f80: 00320c63 beq x4,x3,80003f98 + 80003f84: 17c072ef jal x5,8000b100 + 80003f88: 80003f78 .word 0x80003f78 + 80003f8c: 00000000 .word 0x00000000 + 80003f90: 80019ce9 .word 0x80019ce9 + 80003f94: 00000000 .word 0x00000000 + 80003f98: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x5555555555555555 + 80003f9c: 00033983 ld x19,0(x6) + 80003fa0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80003fa4: 00033583 ld x11,0(x6) + 80003fa8: 00830313 addi x6,x6,8 + +0000000080003fac : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64esm x20, x19, x11 # perform operation + 80003fac: 36b98a33 aes64esm x20,x19,x11 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb0: 000bb203 ld x4,0(x23) + 80003fb4: 01420c63 beq x4,x20,80003fcc + 80003fb8: 148072ef jal x5,8000b100 + 80003fbc: 80003fac .word 0x80003fac + 80003fc0: 00000000 .word 0x00000000 + 80003fc4: 80019d5c .word 0x80019d5c + 80003fc8: 00000000 .word 0x00000000 + 80003fcc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x5555555555555555 + 80003fd0: 00033803 ld x16,0(x6) + 80003fd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xffffffffffffffff + 80003fd8: 00033e83 ld x29,0(x6) + 80003fdc: 00830313 addi x6,x6,8 + +0000000080003fe0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64esm x13, x16, x29 # perform operation + 80003fe0: 37d806b3 aes64esm x13,x16,x29 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe4: 000bb203 ld x4,0(x23) + 80003fe8: 00d20c63 beq x4,x13,80004000 + 80003fec: 114072ef jal x5,8000b100 + 80003ff0: 80003fe0 .word 0x80003fe0 + 80003ff4: 00000000 .word 0x00000000 + 80003ff8: 80019dcf .word 0x80019dcf + 80003ffc: 00000000 .word 0x00000000 + 80004000: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5555555555555555 + 80004004: 00033603 ld x12,0(x6) + 80004008: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xfffffffffffffffe + 8000400c: 00033183 ld x3,0(x6) + 80004010: 00830313 addi x6,x6,8 + +0000000080004014 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64esm x2, x12, x3 # perform operation + 80004014: 36360133 aes64esm x2,x12,x3 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004018: 000bb203 ld x4,0(x23) + 8000401c: 00220c63 beq x4,x2,80004034 + 80004020: 0e0072ef jal x5,8000b100 + 80004024: 80004014 .word 0x80004014 + 80004028: 00000000 .word 0x00000000 + 8000402c: 80019e42 .word 0x80019e42 + 80004030: 00000000 .word 0x00000000 + 80004034: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5555555555555555 + 80004038: 00033183 ld x3,0(x6) + 8000403c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x5bbc887763ae86f2 + 80004040: 00033f83 ld x31,0(x6) + 80004044: 00830313 addi x6,x6,8 + +0000000080004048 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64esm x7, x3, x31 # perform operation + 80004048: 37f183b3 aes64esm x7,x3,x31 + # Check if x7 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x7, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 8000404c: 000bb203 ld x4,0(x23) + 80004050: 00720c63 beq x4,x7,80004068 + 80004054: 0ac072ef jal x5,8000b100 + 80004058: 80004048 .word 0x80004048 + 8000405c: 00000000 .word 0x00000000 + 80004060: 80019eb5 .word 0x80019eb5 + 80004064: 00000000 .word 0x00000000 + 80004068: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5555555555555555 + 8000406c: 00033183 ld x3,0(x6) + 80004070: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80004074: 00033a83 ld x21,0(x6) + 80004078: 00830313 addi x6,x6,8 + +000000008000407c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x20, x3, x21 # perform operation + 8000407c: 37518a33 aes64esm x20,x3,x21 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004080: 000bb203 ld x4,0(x23) + 80004084: 01420c63 beq x4,x20,8000409c + 80004088: 078072ef jal x5,8000b100 + 8000408c: 8000407c .word 0x8000407c + 80004090: 00000000 .word 0x00000000 + 80004094: 80019f28 .word 0x80019f28 + 80004098: 00000000 .word 0x00000000 + 8000409c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x5555555555555555 + 800040a0: 00033903 ld x18,0(x6) + 800040a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x5555555555555555 + 800040a8: 00033e03 ld x28,0(x6) + 800040ac: 00830313 addi x6,x6,8 + +00000000800040b0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64esm x10, x18, x28 # perform operation + 800040b0: 37c90533 aes64esm x10,x18,x28 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b4: 000bb203 ld x4,0(x23) + 800040b8: 00a20c63 beq x4,x10,800040d0 + 800040bc: 044072ef jal x5,8000b100 + 800040c0: 800040b0 .word 0x800040b0 + 800040c4: 00000000 .word 0x00000000 + 800040c8: 80019f9b .word 0x80019f9b + 800040cc: 00000000 .word 0x00000000 + 800040d0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x5555555555555555 + 800040d4: 00033683 ld x13,0(x6) + 800040d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x00000000ffffffff + 800040dc: 00033903 ld x18,0(x6) + 800040e0: 00830313 addi x6,x6,8 + +00000000800040e4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64esm x30, x13, x18 # perform operation + 800040e4: 37268f33 aes64esm x30,x13,x18 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e8: 000bb203 ld x4,0(x23) + 800040ec: 01e20c63 beq x4,x30,80004104 + 800040f0: 010072ef jal x5,8000b100 + 800040f4: 800040e4 .word 0x800040e4 + 800040f8: 00000000 .word 0x00000000 + 800040fc: 8001a00e .word 0x8001a00e + 80004100: 00000000 .word 0x00000000 + 80004104: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x5555555555555555 + 80004108: 00033d03 ld x26,0(x6) + 8000410c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x00000000fffffffe + 80004110: 00033783 ld x15,0(x6) + 80004114: 00830313 addi x6,x6,8 + +0000000080004118 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64esm x10, x26, x15 # perform operation + 80004118: 36fd0533 aes64esm x10,x26,x15 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 8000411c: 000bb203 ld x4,0(x23) + 80004120: 00a20c63 beq x4,x10,80004138 + 80004124: 7dd062ef jal x5,8000b100 + 80004128: 80004118 .word 0x80004118 + 8000412c: 00000000 .word 0x00000000 + 80004130: 8001a079 .word 0x8001a079 + 80004134: 00000000 .word 0x00000000 + 80004138: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x5555555555555555 + 8000413c: 00033783 ld x15,0(x6) + 80004140: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000100000000 + 80004144: 00033f83 ld x31,0(x6) + 80004148: 00830313 addi x6,x6,8 + +000000008000414c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64esm x2, x15, x31 # perform operation + 8000414c: 37f78133 aes64esm x2,x15,x31 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004150: 000bb203 ld x4,0(x23) + 80004154: 00220c63 beq x4,x2,8000416c + 80004158: 7a9062ef jal x5,8000b100 + 8000415c: 8000414c .word 0x8000414c + 80004160: 00000000 .word 0x00000000 + 80004164: 8001a0e4 .word 0x8001a0e4 + 80004168: 00000000 .word 0x00000000 + 8000416c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5555555555555555 + 80004170: 00033d83 ld x27,0(x6) + 80004174: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000100000001 + 80004178: 00033083 ld x1,0(x6) + 8000417c: 00830313 addi x6,x6,8 + +0000000080004180 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64esm x18, x27, x1 # perform operation + 80004180: 361d8933 aes64esm x18,x27,x1 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004184: 000bb203 ld x4,0(x23) + 80004188: 01220c63 beq x4,x18,800041a0 + 8000418c: 775062ef jal x5,8000b100 + 80004190: 80004180 .word 0x80004180 + 80004194: 00000000 .word 0x00000000 + 80004198: 8001a150 .word 0x8001a150 + 8000419c: 00000000 .word 0x00000000 + 800041a0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x00000000ffffffff + 800041a4: 00033883 ld x17,0(x6) + 800041a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0000000000000000 + 800041ac: 00033803 ld x16,0(x6) + 800041b0: 00830313 addi x6,x6,8 + +00000000800041b4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64esm x31, x17, x16 # perform operation + 800041b4: 37088fb3 aes64esm x31,x17,x16 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b8: 000bb203 ld x4,0(x23) + 800041bc: 01f20c63 beq x4,x31,800041d4 + 800041c0: 741062ef jal x5,8000b100 + 800041c4: 800041b4 .word 0x800041b4 + 800041c8: 00000000 .word 0x00000000 + 800041cc: 8001a1bc .word 0x8001a1bc + 800041d0: 00000000 .word 0x00000000 + 800041d4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x00000000ffffffff + 800041d8: 00033d83 ld x27,0(x6) + 800041dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000000000001 + 800041e0: 00033683 ld x13,0(x6) + 800041e4: 00830313 addi x6,x6,8 + +00000000800041e8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64esm x16, x27, x13 # perform operation + 800041e8: 36dd8833 aes64esm x16,x27,x13 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041ec: 000bb203 ld x4,0(x23) + 800041f0: 01020c63 beq x4,x16,80004208 + 800041f4: 70d062ef jal x5,8000b100 + 800041f8: 800041e8 .word 0x800041e8 + 800041fc: 00000000 .word 0x00000000 + 80004200: 8001a218 .word 0x8001a218 + 80004204: 00000000 .word 0x00000000 + 80004208: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000ffffffff + 8000420c: 00033603 ld x12,0(x6) + 80004210: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000000000002 + 80004214: 00033403 ld x8,0(x6) + 80004218: 00830313 addi x6,x6,8 + +000000008000421c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64esm x2, x12, x8 # perform operation + 8000421c: 36860133 aes64esm x2,x12,x8 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004220: 000bb203 ld x4,0(x23) + 80004224: 00220c63 beq x4,x2,8000423c + 80004228: 6d9062ef jal x5,8000b100 + 8000422c: 8000421c .word 0x8000421c + 80004230: 00000000 .word 0x00000000 + 80004234: 8001a274 .word 0x8001a274 + 80004238: 00000000 .word 0x00000000 + 8000423c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000ffffffff + 80004240: 00033a03 ld x20,0(x6) + 80004244: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x8000000000000000 + 80004248: 00033c83 ld x25,0(x6) + 8000424c: 00830313 addi x6,x6,8 + +0000000080004250 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64esm x29, x20, x25 # perform operation + 80004250: 379a0eb3 aes64esm x29,x20,x25 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004254: 000bb203 ld x4,0(x23) + 80004258: 01d20c63 beq x4,x29,80004270 + 8000425c: 6a5062ef jal x5,8000b100 + 80004260: 80004250 .word 0x80004250 + 80004264: 00000000 .word 0x00000000 + 80004268: 8001a2d0 .word 0x8001a2d0 + 8000426c: 00000000 .word 0x00000000 + 80004270: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000ffffffff + 80004274: 00033a03 ld x20,0(x6) + 80004278: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8000000000000001 + 8000427c: 00033383 ld x7,0(x6) + 80004280: 00830313 addi x6,x6,8 + +0000000080004284 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64esm x3, x20, x7 # perform operation + 80004284: 367a01b3 aes64esm x3,x20,x7 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004288: 000bb203 ld x4,0(x23) + 8000428c: 00320c63 beq x4,x3,800042a4 + 80004290: 671062ef jal x5,8000b100 + 80004294: 80004284 .word 0x80004284 + 80004298: 00000000 .word 0x00000000 + 8000429c: 8001a33b .word 0x8001a33b + 800042a0: 00000000 .word 0x00000000 + 800042a4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x00000000ffffffff + 800042a8: 00033883 ld x17,0(x6) + 800042ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x7fffffffffffffff + 800042b0: 00033083 ld x1,0(x6) + 800042b4: 00830313 addi x6,x6,8 + +00000000800042b8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64esm x2, x17, x1 # perform operation + 800042b8: 36188133 aes64esm x2,x17,x1 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042bc: 000bb203 ld x4,0(x23) + 800042c0: 00220c63 beq x4,x2,800042d8 + 800042c4: 63d062ef jal x5,8000b100 + 800042c8: 800042b8 .word 0x800042b8 + 800042cc: 00000000 .word 0x00000000 + 800042d0: 8001a3a6 .word 0x8001a3a6 + 800042d4: 00000000 .word 0x00000000 + 800042d8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x00000000ffffffff + 800042dc: 00033b03 ld x22,0(x6) + 800042e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x7ffffffffffffffe + 800042e4: 00033183 ld x3,0(x6) + 800042e8: 00830313 addi x6,x6,8 + +00000000800042ec : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64esm x12, x22, x3 # perform operation + 800042ec: 363b0633 aes64esm x12,x22,x3 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f0: 000bb203 ld x4,0(x23) + 800042f4: 00c20c63 beq x4,x12,8000430c + 800042f8: 609062ef jal x5,8000b100 + 800042fc: 800042ec .word 0x800042ec + 80004300: 00000000 .word 0x00000000 + 80004304: 8001a411 .word 0x8001a411 + 80004308: 00000000 .word 0x00000000 + 8000430c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x00000000ffffffff + 80004310: 00033883 ld x17,0(x6) + 80004314: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xffffffffffffffff + 80004318: 00033503 ld x10,0(x6) + 8000431c: 00830313 addi x6,x6,8 + +0000000080004320 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64esm x25, x17, x10 # perform operation + 80004320: 36a88cb3 aes64esm x25,x17,x10 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004324: 000bb203 ld x4,0(x23) + 80004328: 01920c63 beq x4,x25,80004340 + 8000432c: 5d5062ef jal x5,8000b100 + 80004330: 80004320 .word 0x80004320 + 80004334: 00000000 .word 0x00000000 + 80004338: 8001a47c .word 0x8001a47c + 8000433c: 00000000 .word 0x00000000 + 80004340: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000000ffffffff + 80004344: 00033103 ld x2,0(x6) + 80004348: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xfffffffffffffffe + 8000434c: 00033803 ld x16,0(x6) + 80004350: 00830313 addi x6,x6,8 + +0000000080004354 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64esm x14, x2, x16 # perform operation + 80004354: 37010733 aes64esm x14,x2,x16 + # Check if x14 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x14, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004358: 000bb203 ld x4,0(x23) + 8000435c: 00e20c63 beq x4,x14,80004374 + 80004360: 5a1062ef jal x5,8000b100 + 80004364: 80004354 .word 0x80004354 + 80004368: 00000000 .word 0x00000000 + 8000436c: 8001a4e7 .word 0x8001a4e7 + 80004370: 00000000 .word 0x00000000 + 80004374: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x00000000ffffffff + 80004378: 00033803 ld x16,0(x6) + 8000437c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x5bbc887763ae86f2 + 80004380: 00033183 ld x3,0(x6) + 80004384: 00830313 addi x6,x6,8 + +0000000080004388 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64esm x17, x16, x3 # perform operation + 80004388: 363808b3 aes64esm x17,x16,x3 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 8000438c: 000bb203 ld x4,0(x23) + 80004390: 01120c63 beq x4,x17,800043a8 + 80004394: 56d062ef jal x5,8000b100 + 80004398: 80004388 .word 0x80004388 + 8000439c: 00000000 .word 0x00000000 + 800043a0: 8001a552 .word 0x8001a552 + 800043a4: 00000000 .word 0x00000000 + 800043a8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x00000000ffffffff + 800043ac: 00033883 ld x17,0(x6) + 800043b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800043b4: 00033803 ld x16,0(x6) + 800043b8: 00830313 addi x6,x6,8 + +00000000800043bc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x1, x17, x16 # perform operation + 800043bc: 370880b3 aes64esm x1,x17,x16 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c0: 000bb203 ld x4,0(x23) + 800043c4: 00120c63 beq x4,x1,800043dc + 800043c8: 539062ef jal x5,8000b100 + 800043cc: 800043bc .word 0x800043bc + 800043d0: 00000000 .word 0x00000000 + 800043d4: 8001a5bd .word 0x8001a5bd + 800043d8: 00000000 .word 0x00000000 + 800043dc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x00000000ffffffff + 800043e0: 00033483 ld x9,0(x6) + 800043e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x5555555555555555 + 800043e8: 00033d83 ld x27,0(x6) + 800043ec: 00830313 addi x6,x6,8 + +00000000800043f0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64esm x30, x9, x27 # perform operation + 800043f0: 37b48f33 aes64esm x30,x9,x27 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f4: 000bb203 ld x4,0(x23) + 800043f8: 01e20c63 beq x4,x30,80004410 + 800043fc: 505062ef jal x5,8000b100 + 80004400: 800043f0 .word 0x800043f0 + 80004404: 00000000 .word 0x00000000 + 80004408: 8001a628 .word 0x8001a628 + 8000440c: 00000000 .word 0x00000000 + 80004410: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000ffffffff + 80004414: 00033603 ld x12,0(x6) + 80004418: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x00000000ffffffff + 8000441c: 00033e03 ld x28,0(x6) + 80004420: 00830313 addi x6,x6,8 + +0000000080004424 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64esm x10, x12, x28 # perform operation + 80004424: 37c60533 aes64esm x10,x12,x28 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004428: 000bb203 ld x4,0(x23) + 8000442c: 00a20c63 beq x4,x10,80004444 + 80004430: 4d1062ef jal x5,8000b100 + 80004434: 80004424 .word 0x80004424 + 80004438: 00000000 .word 0x00000000 + 8000443c: 8001a693 .word 0x8001a693 + 80004440: 00000000 .word 0x00000000 + 80004444: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x00000000ffffffff + 80004448: 00033183 ld x3,0(x6) + 8000444c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x00000000fffffffe + 80004450: 00033403 ld x8,0(x6) + 80004454: 00830313 addi x6,x6,8 + +0000000080004458 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64esm x29, x3, x8 # perform operation + 80004458: 36818eb3 aes64esm x29,x3,x8 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 8000445c: 000bb203 ld x4,0(x23) + 80004460: 01d20c63 beq x4,x29,80004478 + 80004464: 49d062ef jal x5,8000b100 + 80004468: 80004458 .word 0x80004458 + 8000446c: 00000000 .word 0x00000000 + 80004470: 8001a6f6 .word 0x8001a6f6 + 80004474: 00000000 .word 0x00000000 + 80004478: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000ffffffff + 8000447c: 00033603 ld x12,0(x6) + 80004480: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0000000100000000 + 80004484: 00033c83 ld x25,0(x6) + 80004488: 00830313 addi x6,x6,8 + +000000008000448c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64esm x2, x12, x25 # perform operation + 8000448c: 37960133 aes64esm x2,x12,x25 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004490: 000bb203 ld x4,0(x23) + 80004494: 00220c63 beq x4,x2,800044ac + 80004498: 469062ef jal x5,8000b100 + 8000449c: 8000448c .word 0x8000448c + 800044a0: 00000000 .word 0x00000000 + 800044a4: 8001a759 .word 0x8001a759 + 800044a8: 00000000 .word 0x00000000 + 800044ac: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x00000000ffffffff + 800044b0: 00033783 ld x15,0(x6) + 800044b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000100000001 + 800044b8: 00033403 ld x8,0(x6) + 800044bc: 00830313 addi x6,x6,8 + +00000000800044c0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64esm x30, x15, x8 # perform operation + 800044c0: 36878f33 aes64esm x30,x15,x8 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c4: 000bb203 ld x4,0(x23) + 800044c8: 01e20c63 beq x4,x30,800044e0 + 800044cc: 435062ef jal x5,8000b100 + 800044d0: 800044c0 .word 0x800044c0 + 800044d4: 00000000 .word 0x00000000 + 800044d8: 8001a7bd .word 0x8001a7bd + 800044dc: 00000000 .word 0x00000000 + 800044e0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x00000000fffffffe + 800044e4: 00033383 ld x7,0(x6) + 800044e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x0000000000000000 + 800044ec: 00033c83 ld x25,0(x6) + 800044f0: 00830313 addi x6,x6,8 + +00000000800044f4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64esm x13, x7, x25 # perform operation + 800044f4: 379386b3 aes64esm x13,x7,x25 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f8: 000bb203 ld x4,0(x23) + 800044fc: 00d20c63 beq x4,x13,80004514 + 80004500: 401062ef jal x5,8000b100 + 80004504: 800044f4 .word 0x800044f4 + 80004508: 00000000 .word 0x00000000 + 8000450c: 8001a821 .word 0x8001a821 + 80004510: 00000000 .word 0x00000000 + 80004514: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x00000000fffffffe + 80004518: 00033d03 ld x26,0(x6) + 8000451c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000000000001 + 80004520: 00033083 ld x1,0(x6) + 80004524: 00830313 addi x6,x6,8 + +0000000080004528 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64esm x30, x26, x1 # perform operation + 80004528: 361d0f33 aes64esm x30,x26,x1 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 8000452c: 000bb203 ld x4,0(x23) + 80004530: 01e20c63 beq x4,x30,80004548 + 80004534: 3cd062ef jal x5,8000b100 + 80004538: 80004528 .word 0x80004528 + 8000453c: 00000000 .word 0x00000000 + 80004540: 8001a87d .word 0x8001a87d + 80004544: 00000000 .word 0x00000000 + 80004548: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x00000000fffffffe + 8000454c: 00033e83 ld x29,0(x6) + 80004550: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x0000000000000002 + 80004554: 00033683 ld x13,0(x6) + 80004558: 00830313 addi x6,x6,8 + +000000008000455c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64esm x1, x29, x13 # perform operation + 8000455c: 36de80b3 aes64esm x1,x29,x13 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004560: 000bb203 ld x4,0(x23) + 80004564: 00120c63 beq x4,x1,8000457c + 80004568: 399062ef jal x5,8000b100 + 8000456c: 8000455c .word 0x8000455c + 80004570: 00000000 .word 0x00000000 + 80004574: 8001a8d9 .word 0x8001a8d9 + 80004578: 00000000 .word 0x00000000 + 8000457c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000fffffffe + 80004580: 00033a03 ld x20,0(x6) + 80004584: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x8000000000000000 + 80004588: 00033683 ld x13,0(x6) + 8000458c: 00830313 addi x6,x6,8 + +0000000080004590 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64esm x21, x20, x13 # perform operation + 80004590: 36da0ab3 aes64esm x21,x20,x13 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004594: 000bb203 ld x4,0(x23) + 80004598: 01520c63 beq x4,x21,800045b0 + 8000459c: 365062ef jal x5,8000b100 + 800045a0: 80004590 .word 0x80004590 + 800045a4: 00000000 .word 0x00000000 + 800045a8: 8001a935 .word 0x8001a935 + 800045ac: 00000000 .word 0x00000000 + 800045b0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x00000000fffffffe + 800045b4: 00033983 ld x19,0(x6) + 800045b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x8000000000000001 + 800045bc: 00033583 ld x11,0(x6) + 800045c0: 00830313 addi x6,x6,8 + +00000000800045c4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64esm x15, x19, x11 # perform operation + 800045c4: 36b987b3 aes64esm x15,x19,x11 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c8: 000bb203 ld x4,0(x23) + 800045cc: 00f20c63 beq x4,x15,800045e4 + 800045d0: 331062ef jal x5,8000b100 + 800045d4: 800045c4 .word 0x800045c4 + 800045d8: 00000000 .word 0x00000000 + 800045dc: 8001a9a0 .word 0x8001a9a0 + 800045e0: 00000000 .word 0x00000000 + 800045e4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x00000000fffffffe + 800045e8: 00033a03 ld x20,0(x6) + 800045ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x7fffffffffffffff + 800045f0: 00033703 ld x14,0(x6) + 800045f4: 00830313 addi x6,x6,8 + +00000000800045f8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64esm x30, x20, x14 # perform operation + 800045f8: 36ea0f33 aes64esm x30,x20,x14 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045fc: 000bb203 ld x4,0(x23) + 80004600: 01e20c63 beq x4,x30,80004618 + 80004604: 2fd062ef jal x5,8000b100 + 80004608: 800045f8 .word 0x800045f8 + 8000460c: 00000000 .word 0x00000000 + 80004610: 8001aa0b .word 0x8001aa0b + 80004614: 00000000 .word 0x00000000 + 80004618: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x00000000fffffffe + 8000461c: 00033403 ld x8,0(x6) + 80004620: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x7ffffffffffffffe + 80004624: 00033483 ld x9,0(x6) + 80004628: 00830313 addi x6,x6,8 + +000000008000462c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64esm x26, x8, x9 # perform operation + 8000462c: 36940d33 aes64esm x26,x8,x9 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004630: 000bb203 ld x4,0(x23) + 80004634: 01a20c63 beq x4,x26,8000464c + 80004638: 2c9062ef jal x5,8000b100 + 8000463c: 8000462c .word 0x8000462c + 80004640: 00000000 .word 0x00000000 + 80004644: 8001aa76 .word 0x8001aa76 + 80004648: 00000000 .word 0x00000000 + 8000464c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x00000000fffffffe + 80004650: 00033383 ld x7,0(x6) + 80004654: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xffffffffffffffff + 80004658: 00033583 ld x11,0(x6) + 8000465c: 00830313 addi x6,x6,8 + +0000000080004660 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64esm x9, x7, x11 # perform operation + 80004660: 36b384b3 aes64esm x9,x7,x11 + # Check if x9 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x9, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004664: 000bb203 ld x4,0(x23) + 80004668: 00920c63 beq x4,x9,80004680 + 8000466c: 295062ef jal x5,8000b100 + 80004670: 80004660 .word 0x80004660 + 80004674: 00000000 .word 0x00000000 + 80004678: 8001aae1 .word 0x8001aae1 + 8000467c: 00000000 .word 0x00000000 + 80004680: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x00000000fffffffe + 80004684: 00033903 ld x18,0(x6) + 80004688: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xfffffffffffffffe + 8000468c: 00033983 ld x19,0(x6) + 80004690: 00830313 addi x6,x6,8 + +0000000080004694 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64esm x28, x18, x19 # perform operation + 80004694: 37390e33 aes64esm x28,x18,x19 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004698: 000bb203 ld x4,0(x23) + 8000469c: 01c20c63 beq x4,x28,800046b4 + 800046a0: 261062ef jal x5,8000b100 + 800046a4: 80004694 .word 0x80004694 + 800046a8: 00000000 .word 0x00000000 + 800046ac: 8001ab4c .word 0x8001ab4c + 800046b0: 00000000 .word 0x00000000 + 800046b4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x00000000fffffffe + 800046b8: 00033083 ld x1,0(x6) + 800046bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 800046c0: 00033803 ld x16,0(x6) + 800046c4: 00830313 addi x6,x6,8 + +00000000800046c8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64esm x19, x1, x16 # perform operation + 800046c8: 370089b3 aes64esm x19,x1,x16 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046cc: 000bb203 ld x4,0(x23) + 800046d0: 01320c63 beq x4,x19,800046e8 + 800046d4: 22d062ef jal x5,8000b100 + 800046d8: 800046c8 .word 0x800046c8 + 800046dc: 00000000 .word 0x00000000 + 800046e0: 8001abb7 .word 0x8001abb7 + 800046e4: 00000000 .word 0x00000000 + 800046e8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000000fffffffe + 800046ec: 00033103 ld x2,0(x6) + 800046f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 800046f4: 00033a83 ld x21,0(x6) + 800046f8: 00830313 addi x6,x6,8 + +00000000800046fc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x20, x2, x21 # perform operation + 800046fc: 37510a33 aes64esm x20,x2,x21 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004700: 000bb203 ld x4,0(x23) + 80004704: 01420c63 beq x4,x20,8000471c + 80004708: 1f9062ef jal x5,8000b100 + 8000470c: 800046fc .word 0x800046fc + 80004710: 00000000 .word 0x00000000 + 80004714: 8001ac22 .word 0x8001ac22 + 80004718: 00000000 .word 0x00000000 + 8000471c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x00000000fffffffe + 80004720: 00033783 ld x15,0(x6) + 80004724: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5555555555555555 + 80004728: 00033e83 ld x29,0(x6) + 8000472c: 00830313 addi x6,x6,8 + +0000000080004730 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64esm x1, x15, x29 # perform operation + 80004730: 37d780b3 aes64esm x1,x15,x29 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004734: 000bb203 ld x4,0(x23) + 80004738: 00120c63 beq x4,x1,80004750 + 8000473c: 1c5062ef jal x5,8000b100 + 80004740: 80004730 .word 0x80004730 + 80004744: 00000000 .word 0x00000000 + 80004748: 8001ac8d .word 0x8001ac8d + 8000474c: 00000000 .word 0x00000000 + 80004750: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x00000000fffffffe + 80004754: 00033e83 ld x29,0(x6) + 80004758: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x00000000ffffffff + 8000475c: 00033683 ld x13,0(x6) + 80004760: 00830313 addi x6,x6,8 + +0000000080004764 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64esm x18, x29, x13 # perform operation + 80004764: 36de8933 aes64esm x18,x29,x13 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004768: 000bb203 ld x4,0(x23) + 8000476c: 01220c63 beq x4,x18,80004784 + 80004770: 191062ef jal x5,8000b100 + 80004774: 80004764 .word 0x80004764 + 80004778: 00000000 .word 0x00000000 + 8000477c: 8001acf8 .word 0x8001acf8 + 80004780: 00000000 .word 0x00000000 + 80004784: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x00000000fffffffe + 80004788: 00033803 ld x16,0(x6) + 8000478c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x00000000fffffffe + 80004790: 00033483 ld x9,0(x6) + 80004794: 00830313 addi x6,x6,8 + +0000000080004798 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64esm x30, x16, x9 # perform operation + 80004798: 36980f33 aes64esm x30,x16,x9 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 8000479c: 000bb203 ld x4,0(x23) + 800047a0: 01e20c63 beq x4,x30,800047b8 + 800047a4: 15d062ef jal x5,8000b100 + 800047a8: 80004798 .word 0x80004798 + 800047ac: 00000000 .word 0x00000000 + 800047b0: 8001ad5b .word 0x8001ad5b + 800047b4: 00000000 .word 0x00000000 + 800047b8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x00000000fffffffe + 800047bc: 00033a83 ld x21,0(x6) + 800047c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x0000000100000000 + 800047c4: 00033d03 ld x26,0(x6) + 800047c8: 00830313 addi x6,x6,8 + +00000000800047cc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64esm x1, x21, x26 # perform operation + 800047cc: 37aa80b3 aes64esm x1,x21,x26 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d0: 000bb203 ld x4,0(x23) + 800047d4: 00120c63 beq x4,x1,800047ec + 800047d8: 129062ef jal x5,8000b100 + 800047dc: 800047cc .word 0x800047cc + 800047e0: 00000000 .word 0x00000000 + 800047e4: 8001adbe .word 0x8001adbe + 800047e8: 00000000 .word 0x00000000 + 800047ec: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x00000000fffffffe + 800047f0: 00033603 ld x12,0(x6) + 800047f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x0000000100000001 + 800047f8: 00033083 ld x1,0(x6) + 800047fc: 00830313 addi x6,x6,8 + +0000000080004800 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64esm x16, x12, x1 # perform operation + 80004800: 36160833 aes64esm x16,x12,x1 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004804: 000bb203 ld x4,0(x23) + 80004808: 01020c63 beq x4,x16,80004820 + 8000480c: 0f5062ef jal x5,8000b100 + 80004810: 80004800 .word 0x80004800 + 80004814: 00000000 .word 0x00000000 + 80004818: 8001ae22 .word 0x8001ae22 + 8000481c: 00000000 .word 0x00000000 + 80004820: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000100000000 + 80004824: 00033d03 ld x26,0(x6) + 80004828: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0000000000000000 + 8000482c: 00033883 ld x17,0(x6) + 80004830: 00830313 addi x6,x6,8 + +0000000080004834 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64esm x12, x26, x17 # perform operation + 80004834: 371d0633 aes64esm x12,x26,x17 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004838: 000bb203 ld x4,0(x23) + 8000483c: 00c20c63 beq x4,x12,80004854 + 80004840: 0c1062ef jal x5,8000b100 + 80004844: 80004834 .word 0x80004834 + 80004848: 00000000 .word 0x00000000 + 8000484c: 8001ae86 .word 0x8001ae86 + 80004850: 00000000 .word 0x00000000 + 80004854: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x0000000100000000 + 80004858: 00033703 ld x14,0(x6) + 8000485c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x0000000000000001 + 80004860: 00033f83 ld x31,0(x6) + 80004864: 00830313 addi x6,x6,8 + +0000000080004868 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64esm x30, x14, x31 # perform operation + 80004868: 37f70f33 aes64esm x30,x14,x31 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 8000486c: 000bb203 ld x4,0(x23) + 80004870: 01e20c63 beq x4,x30,80004888 + 80004874: 08d062ef jal x5,8000b100 + 80004878: 80004868 .word 0x80004868 + 8000487c: 00000000 .word 0x00000000 + 80004880: 8001aee3 .word 0x8001aee3 + 80004884: 00000000 .word 0x00000000 + 80004888: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0000000100000000 + 8000488c: 00033183 ld x3,0(x6) + 80004890: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000000000002 + 80004894: 00033483 ld x9,0(x6) + 80004898: 00830313 addi x6,x6,8 + +000000008000489c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64esm x21, x3, x9 # perform operation + 8000489c: 36918ab3 aes64esm x21,x3,x9 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a0: 000bb203 ld x4,0(x23) + 800048a4: 01520c63 beq x4,x21,800048bc + 800048a8: 059062ef jal x5,8000b100 + 800048ac: 8000489c .word 0x8000489c + 800048b0: 00000000 .word 0x00000000 + 800048b4: 8001af40 .word 0x8001af40 + 800048b8: 00000000 .word 0x00000000 + 800048bc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000100000000 + 800048c0: 00033e03 ld x28,0(x6) + 800048c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x8000000000000000 + 800048c8: 00033403 ld x8,0(x6) + 800048cc: 00830313 addi x6,x6,8 + +00000000800048d0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64esm x17, x28, x8 # perform operation + 800048d0: 368e08b3 aes64esm x17,x28,x8 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d4: 000bb203 ld x4,0(x23) + 800048d8: 01120c63 beq x4,x17,800048f0 + 800048dc: 025062ef jal x5,8000b100 + 800048e0: 800048d0 .word 0x800048d0 + 800048e4: 00000000 .word 0x00000000 + 800048e8: 8001af9d .word 0x8001af9d + 800048ec: 00000000 .word 0x00000000 + 800048f0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000100000000 + 800048f4: 00033083 ld x1,0(x6) + 800048f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x8000000000000001 + 800048fc: 00033103 ld x2,0(x6) + 80004900: 00830313 addi x6,x6,8 + +0000000080004904 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64esm x27, x1, x2 # perform operation + 80004904: 36208db3 aes64esm x27,x1,x2 + # Check if x27 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x27, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004908: 000bb203 ld x4,0(x23) + 8000490c: 01b20c63 beq x4,x27,80004924 + 80004910: 7f0062ef jal x5,8000b100 + 80004914: 80004904 .word 0x80004904 + 80004918: 00000000 .word 0x00000000 + 8000491c: 8001b009 .word 0x8001b009 + 80004920: 00000000 .word 0x00000000 + 80004924: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000000 + 80004928: 00033583 ld x11,0(x6) + 8000492c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x7fffffffffffffff + 80004930: 00033783 ld x15,0(x6) + 80004934: 00830313 addi x6,x6,8 + +0000000080004938 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64esm x29, x11, x15 # perform operation + 80004938: 36f58eb3 aes64esm x29,x11,x15 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 8000493c: 000bb203 ld x4,0(x23) + 80004940: 01d20c63 beq x4,x29,80004958 + 80004944: 7bc062ef jal x5,8000b100 + 80004948: 80004938 .word 0x80004938 + 8000494c: 00000000 .word 0x00000000 + 80004950: 8001b075 .word 0x8001b075 + 80004954: 00000000 .word 0x00000000 + 80004958: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0000000100000000 + 8000495c: 00033383 ld x7,0(x6) + 80004960: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x7ffffffffffffffe + 80004964: 00033803 ld x16,0(x6) + 80004968: 00830313 addi x6,x6,8 + +000000008000496c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64esm x21, x7, x16 # perform operation + 8000496c: 37038ab3 aes64esm x21,x7,x16 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004970: 000bb203 ld x4,0(x23) + 80004974: 01520c63 beq x4,x21,8000498c + 80004978: 788062ef jal x5,8000b100 + 8000497c: 8000496c .word 0x8000496c + 80004980: 00000000 .word 0x00000000 + 80004984: 8001b0e1 .word 0x8001b0e1 + 80004988: 00000000 .word 0x00000000 + 8000498c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000100000000 + 80004990: 00033a83 ld x21,0(x6) + 80004994: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xffffffffffffffff + 80004998: 00033703 ld x14,0(x6) + 8000499c: 00830313 addi x6,x6,8 + +00000000800049a0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64esm x8, x21, x14 # perform operation + 800049a0: 36ea8433 aes64esm x8,x21,x14 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a4: 000bb203 ld x4,0(x23) + 800049a8: 00820c63 beq x4,x8,800049c0 + 800049ac: 754062ef jal x5,8000b100 + 800049b0: 800049a0 .word 0x800049a0 + 800049b4: 00000000 .word 0x00000000 + 800049b8: 8001b14d .word 0x8001b14d + 800049bc: 00000000 .word 0x00000000 + 800049c0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000100000000 + 800049c4: 00033103 ld x2,0(x6) + 800049c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xfffffffffffffffe + 800049cc: 00033783 ld x15,0(x6) + 800049d0: 00830313 addi x6,x6,8 + +00000000800049d4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64esm x10, x2, x15 # perform operation + 800049d4: 36f10533 aes64esm x10,x2,x15 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d8: 000bb203 ld x4,0(x23) + 800049dc: 00a20c63 beq x4,x10,800049f4 + 800049e0: 720062ef jal x5,8000b100 + 800049e4: 800049d4 .word 0x800049d4 + 800049e8: 00000000 .word 0x00000000 + 800049ec: 8001b1b9 .word 0x8001b1b9 + 800049f0: 00000000 .word 0x00000000 + 800049f4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0000000100000000 + 800049f8: 00033883 ld x17,0(x6) + 800049fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80004a00: 00033483 ld x9,0(x6) + 80004a04: 00830313 addi x6,x6,8 + +0000000080004a08 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64esm x2, x17, x9 # perform operation + 80004a08: 36988133 aes64esm x2,x17,x9 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a0c: 000bb203 ld x4,0(x23) + 80004a10: 00220c63 beq x4,x2,80004a28 + 80004a14: 6ec062ef jal x5,8000b100 + 80004a18: 80004a08 .word 0x80004a08 + 80004a1c: 00000000 .word 0x00000000 + 80004a20: 8001b225 .word 0x8001b225 + 80004a24: 00000000 .word 0x00000000 + 80004a28: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000100000000 + 80004a2c: 00033d03 ld x26,0(x6) + 80004a30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80004a34: 00033f83 ld x31,0(x6) + 80004a38: 00830313 addi x6,x6,8 + +0000000080004a3c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x15, x26, x31 # perform operation + 80004a3c: 37fd07b3 aes64esm x15,x26,x31 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a40: 000bb203 ld x4,0(x23) + 80004a44: 00f20c63 beq x4,x15,80004a5c + 80004a48: 6b8062ef jal x5,8000b100 + 80004a4c: 80004a3c .word 0x80004a3c + 80004a50: 00000000 .word 0x00000000 + 80004a54: 8001b291 .word 0x8001b291 + 80004a58: 00000000 .word 0x00000000 + 80004a5c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x0000000100000000 + 80004a60: 00033903 ld x18,0(x6) + 80004a64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x5555555555555555 + 80004a68: 00033883 ld x17,0(x6) + 80004a6c: 00830313 addi x6,x6,8 + +0000000080004a70 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64esm x13, x18, x17 # perform operation + 80004a70: 371906b3 aes64esm x13,x18,x17 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a74: 000bb203 ld x4,0(x23) + 80004a78: 00d20c63 beq x4,x13,80004a90 + 80004a7c: 684062ef jal x5,8000b100 + 80004a80: 80004a70 .word 0x80004a70 + 80004a84: 00000000 .word 0x00000000 + 80004a88: 8001b2fd .word 0x8001b2fd + 80004a8c: 00000000 .word 0x00000000 + 80004a90: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000100000000 + 80004a94: 00033483 ld x9,0(x6) + 80004a98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x00000000ffffffff + 80004a9c: 00033a83 ld x21,0(x6) + 80004aa0: 00830313 addi x6,x6,8 + +0000000080004aa4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64esm x25, x9, x21 # perform operation + 80004aa4: 37548cb3 aes64esm x25,x9,x21 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa8: 000bb203 ld x4,0(x23) + 80004aac: 01920c63 beq x4,x25,80004ac4 + 80004ab0: 650062ef jal x5,8000b100 + 80004ab4: 80004aa4 .word 0x80004aa4 + 80004ab8: 00000000 .word 0x00000000 + 80004abc: 8001b369 .word 0x8001b369 + 80004ac0: 00000000 .word 0x00000000 + 80004ac4: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000100000000 + 80004ac8: 00033a03 ld x20,0(x6) + 80004acc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x00000000fffffffe + 80004ad0: 00033e83 ld x29,0(x6) + 80004ad4: 00830313 addi x6,x6,8 + +0000000080004ad8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64esm x24, x20, x29 # perform operation + 80004ad8: 37da0c33 aes64esm x24,x20,x29 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004adc: 000bb203 ld x4,0(x23) + 80004ae0: 01820c63 beq x4,x24,80004af8 + 80004ae4: 61c062ef jal x5,8000b100 + 80004ae8: 80004ad8 .word 0x80004ad8 + 80004aec: 00000000 .word 0x00000000 + 80004af0: 8001b3cd .word 0x8001b3cd + 80004af4: 00000000 .word 0x00000000 + 80004af8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000100000000 + 80004afc: 00033c83 ld x25,0(x6) + 80004b00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000100000000 + 80004b04: 00033583 ld x11,0(x6) + 80004b08: 00830313 addi x6,x6,8 + +0000000080004b0c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64esm x16, x25, x11 # perform operation + 80004b0c: 36bc8833 aes64esm x16,x25,x11 + # Check if x16 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x16, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b10: 000bb203 ld x4,0(x23) + 80004b14: 01020c63 beq x4,x16,80004b2c + 80004b18: 5e8062ef jal x5,8000b100 + 80004b1c: 80004b0c .word 0x80004b0c + 80004b20: 00000000 .word 0x00000000 + 80004b24: 8001b431 .word 0x8001b431 + 80004b28: 00000000 .word 0x00000000 + 80004b2c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x0000000100000000 + 80004b30: 00033703 ld x14,0(x6) + 80004b34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x0000000100000001 + 80004b38: 00033c03 ld x24,0(x6) + 80004b3c: 00830313 addi x6,x6,8 + +0000000080004b40 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64esm x3, x14, x24 # perform operation + 80004b40: 378701b3 aes64esm x3,x14,x24 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b44: 000bb203 ld x4,0(x23) + 80004b48: 00320c63 beq x4,x3,80004b60 + 80004b4c: 5b4062ef jal x5,8000b100 + 80004b50: 80004b40 .word 0x80004b40 + 80004b54: 00000000 .word 0x00000000 + 80004b58: 8001b496 .word 0x8001b496 + 80004b5c: 00000000 .word 0x00000000 + 80004b60: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0000000100000001 + 80004b64: 00033e03 ld x28,0(x6) + 80004b68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0000000000000000 + 80004b6c: 00033503 ld x10,0(x6) + 80004b70: 00830313 addi x6,x6,8 + +0000000080004b74 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64esm x2, x28, x10 # perform operation + 80004b74: 36ae0133 aes64esm x2,x28,x10 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b78: 000bb203 ld x4,0(x23) + 80004b7c: 00220c63 beq x4,x2,80004b94 + 80004b80: 580062ef jal x5,8000b100 + 80004b84: 80004b74 .word 0x80004b74 + 80004b88: 00000000 .word 0x00000000 + 80004b8c: 8001b4fb .word 0x8001b4fb + 80004b90: 00000000 .word 0x00000000 + 80004b94: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0000000100000001 + 80004b98: 00033d03 ld x26,0(x6) + 80004b9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x0000000000000001 + 80004ba0: 00033483 ld x9,0(x6) + 80004ba4: 00830313 addi x6,x6,8 + +0000000080004ba8 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64esm x24, x26, x9 # perform operation + 80004ba8: 369d0c33 aes64esm x24,x26,x9 + # Check if x24 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x24, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bac: 000bb203 ld x4,0(x23) + 80004bb0: 01820c63 beq x4,x24,80004bc8 + 80004bb4: 54c062ef jal x5,8000b100 + 80004bb8: 80004ba8 .word 0x80004ba8 + 80004bbc: 00000000 .word 0x00000000 + 80004bc0: 8001b558 .word 0x8001b558 + 80004bc4: 00000000 .word 0x00000000 + 80004bc8: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x0000000100000001 + 80004bcc: 00033083 ld x1,0(x6) + 80004bd0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x0000000000000002 + 80004bd4: 00033403 ld x8,0(x6) + 80004bd8: 00830313 addi x6,x6,8 + +0000000080004bdc : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64esm x10, x1, x8 # perform operation + 80004bdc: 36808533 aes64esm x10,x1,x8 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be0: 000bb203 ld x4,0(x23) + 80004be4: 00a20c63 beq x4,x10,80004bfc + 80004be8: 518062ef jal x5,8000b100 + 80004bec: 80004bdc .word 0x80004bdc + 80004bf0: 00000000 .word 0x00000000 + 80004bf4: 8001b5b5 .word 0x8001b5b5 + 80004bf8: 00000000 .word 0x00000000 + 80004bfc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x0000000100000001 + 80004c00: 00033a83 ld x21,0(x6) + 80004c04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x8000000000000000 + 80004c08: 00033983 ld x19,0(x6) + 80004c0c: 00830313 addi x6,x6,8 + +0000000080004c10 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64esm x3, x21, x19 # perform operation + 80004c10: 373a81b3 aes64esm x3,x21,x19 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c14: 000bb203 ld x4,0(x23) + 80004c18: 00320c63 beq x4,x3,80004c30 + 80004c1c: 4e4062ef jal x5,8000b100 + 80004c20: 80004c10 .word 0x80004c10 + 80004c24: 00000000 .word 0x00000000 + 80004c28: 8001b612 .word 0x8001b612 + 80004c2c: 00000000 .word 0x00000000 + 80004c30: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000100000001 + 80004c34: 00033803 ld x16,0(x6) + 80004c38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x8000000000000001 + 80004c3c: 00033183 ld x3,0(x6) + 80004c40: 00830313 addi x6,x6,8 + +0000000080004c44 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64esm x1, x16, x3 # perform operation + 80004c44: 363800b3 aes64esm x1,x16,x3 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c48: 000bb203 ld x4,0(x23) + 80004c4c: 00120c63 beq x4,x1,80004c64 + 80004c50: 4b0062ef jal x5,8000b100 + 80004c54: 80004c44 .word 0x80004c44 + 80004c58: 00000000 .word 0x00000000 + 80004c5c: 8001b67e .word 0x8001b67e + 80004c60: 00000000 .word 0x00000000 + 80004c64: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000100000001 + 80004c68: 00033803 ld x16,0(x6) + 80004c6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x7fffffffffffffff + 80004c70: 00033103 ld x2,0(x6) + 80004c74: 00830313 addi x6,x6,8 + +0000000080004c78 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64esm x25, x16, x2 # perform operation + 80004c78: 36280cb3 aes64esm x25,x16,x2 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c7c: 000bb203 ld x4,0(x23) + 80004c80: 01920c63 beq x4,x25,80004c98 + 80004c84: 47c062ef jal x5,8000b100 + 80004c88: 80004c78 .word 0x80004c78 + 80004c8c: 00000000 .word 0x00000000 + 80004c90: 8001b6ea .word 0x8001b6ea + 80004c94: 00000000 .word 0x00000000 + 80004c98: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000100000001 + 80004c9c: 00033483 ld x9,0(x6) + 80004ca0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x7ffffffffffffffe + 80004ca4: 00033d03 ld x26,0(x6) + 80004ca8: 00830313 addi x6,x6,8 + +0000000080004cac : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64esm x29, x9, x26 # perform operation + 80004cac: 37a48eb3 aes64esm x29,x9,x26 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb0: 000bb203 ld x4,0(x23) + 80004cb4: 01d20c63 beq x4,x29,80004ccc + 80004cb8: 448062ef jal x5,8000b100 + 80004cbc: 80004cac .word 0x80004cac + 80004cc0: 00000000 .word 0x00000000 + 80004cc4: 8001b756 .word 0x8001b756 + 80004cc8: 00000000 .word 0x00000000 + 80004ccc: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000100000001 + 80004cd0: 00033e83 ld x29,0(x6) + 80004cd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xffffffffffffffff + 80004cd8: 00033383 ld x7,0(x6) + 80004cdc: 00830313 addi x6,x6,8 + +0000000080004ce0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64esm x21, x29, x7 # perform operation + 80004ce0: 367e8ab3 aes64esm x21,x29,x7 + # Check if x21 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x21, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce4: 000bb203 ld x4,0(x23) + 80004ce8: 01520c63 beq x4,x21,80004d00 + 80004cec: 414062ef jal x5,8000b100 + 80004cf0: 80004ce0 .word 0x80004ce0 + 80004cf4: 00000000 .word 0x00000000 + 80004cf8: 8001b7c2 .word 0x8001b7c2 + 80004cfc: 00000000 .word 0x00000000 + 80004d00: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0000000100000001 + 80004d04: 00033c03 ld x24,0(x6) + 80004d08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004d0c: 00033583 ld x11,0(x6) + 80004d10: 00830313 addi x6,x6,8 + +0000000080004d14 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64esm x22, x24, x11 # perform operation + 80004d14: 36bc0b33 aes64esm x22,x24,x11 + # Check if x22 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x22, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d18: 000bb203 ld x4,0(x23) + 80004d1c: 01620c63 beq x4,x22,80004d34 + 80004d20: 3e0062ef jal x5,8000b100 + 80004d24: 80004d14 .word 0x80004d14 + 80004d28: 00000000 .word 0x00000000 + 80004d2c: 8001b82e .word 0x8001b82e + 80004d30: 00000000 .word 0x00000000 + 80004d34: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x0000000100000001 + 80004d38: 00033883 ld x17,0(x6) + 80004d3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80004d40: 00033783 ld x15,0(x6) + 80004d44: 00830313 addi x6,x6,8 + +0000000080004d48 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64esm x29, x17, x15 # perform operation + 80004d48: 36f88eb3 aes64esm x29,x17,x15 + # Check if x29 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x29, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d4c: 000bb203 ld x4,0(x23) + 80004d50: 01d20c63 beq x4,x29,80004d68 + 80004d54: 3ac062ef jal x5,8000b100 + 80004d58: 80004d48 .word 0x80004d48 + 80004d5c: 00000000 .word 0x00000000 + 80004d60: 8001b89a .word 0x8001b89a + 80004d64: 00000000 .word 0x00000000 + 80004d68: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x0000000100000001 + 80004d6c: 00033403 ld x8,0(x6) + 80004d70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80004d74: 00033903 ld x18,0(x6) + 80004d78: 00830313 addi x6,x6,8 + +0000000080004d7c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64esm x20, x8, x18 # perform operation + 80004d7c: 37240a33 aes64esm x20,x8,x18 + # Check if x20 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x20, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d80: 000bb203 ld x4,0(x23) + 80004d84: 01420c63 beq x4,x20,80004d9c + 80004d88: 378062ef jal x5,8000b100 + 80004d8c: 80004d7c .word 0x80004d7c + 80004d90: 00000000 .word 0x00000000 + 80004d94: 8001b906 .word 0x8001b906 + 80004d98: 00000000 .word 0x00000000 + 80004d9c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x0000000100000001 + 80004da0: 00033b03 ld x22,0(x6) + 80004da4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x5555555555555555 + 80004da8: 00033583 ld x11,0(x6) + 80004dac: 00830313 addi x6,x6,8 + +0000000080004db0 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64esm x30, x22, x11 # perform operation + 80004db0: 36bb0f33 aes64esm x30,x22,x11 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db4: 000bb203 ld x4,0(x23) + 80004db8: 01e20c63 beq x4,x30,80004dd0 + 80004dbc: 344062ef jal x5,8000b100 + 80004dc0: 80004db0 .word 0x80004db0 + 80004dc4: 00000000 .word 0x00000000 + 80004dc8: 8001b972 .word 0x8001b972 + 80004dcc: 00000000 .word 0x00000000 + 80004dd0: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000100000001 + 80004dd4: 00033c83 ld x25,0(x6) + 80004dd8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x00000000ffffffff + 80004ddc: 00033103 ld x2,0(x6) + 80004de0: 00830313 addi x6,x6,8 + +0000000080004de4 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64esm x3, x25, x2 # perform operation + 80004de4: 362c81b3 aes64esm x3,x25,x2 + # Check if x3 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x3, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de8: 000bb203 ld x4,0(x23) + 80004dec: 00320c63 beq x4,x3,80004e04 + 80004df0: 310062ef jal x5,8000b100 + 80004df4: 80004de4 .word 0x80004de4 + 80004df8: 00000000 .word 0x00000000 + 80004dfc: 8001b9de .word 0x8001b9de + 80004e00: 00000000 .word 0x00000000 + 80004e04: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0000000100000001 + 80004e08: 00033783 ld x15,0(x6) + 80004e0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x00000000fffffffe + 80004e10: 00033383 ld x7,0(x6) + 80004e14: 00830313 addi x6,x6,8 + +0000000080004e18 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64esm x30, x15, x7 # perform operation + 80004e18: 36778f33 aes64esm x30,x15,x7 + # Check if x30 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x30, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e1c: 000bb203 ld x4,0(x23) + 80004e20: 01e20c63 beq x4,x30,80004e38 + 80004e24: 2dc062ef jal x5,8000b100 + 80004e28: 80004e18 .word 0x80004e18 + 80004e2c: 00000000 .word 0x00000000 + 80004e30: 8001ba42 .word 0x8001ba42 + 80004e34: 00000000 .word 0x00000000 + 80004e38: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x0000000100000001 + 80004e3c: 00033a03 ld x20,0(x6) + 80004e40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0000000100000000 + 80004e44: 00033583 ld x11,0(x6) + 80004e48: 00830313 addi x6,x6,8 + +0000000080004e4c : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64esm x28, x20, x11 # perform operation + 80004e4c: 36ba0e33 aes64esm x28,x20,x11 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e50: 000bb203 ld x4,0(x23) + 80004e54: 01c20c63 beq x4,x28,80004e6c + 80004e58: 2a8062ef jal x5,8000b100 + 80004e5c: 80004e4c .word 0x80004e4c + 80004e60: 00000000 .word 0x00000000 + 80004e64: 8001baa6 .word 0x8001baa6 + 80004e68: 00000000 .word 0x00000000 + 80004e6c: 008b8b93 addi x23,x23,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0000000100000001 + 80004e70: 00033583 ld x11,0(x6) + 80004e74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000100000001 + 80004e78: 00033983 ld x19,0(x6) + 80004e7c: 00830313 addi x6,x6,8 + +0000000080004e80 : +Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64esm x31, x11, x19 # perform operation + 80004e80: 37358fb3 aes64esm x31,x11,x19 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zkne_aes64esm_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e84: 000bb203 ld x4,0(x23) + 80004e88: 01f20c63 beq x4,x31,80004ea0 + 80004e8c: 274062ef jal x5,8000b100 + 80004e90: 80004e80 .word 0x80004e80 + 80004e94: 00000000 .word 0x00000000 + 80004e98: 8001bb0b .word 0x8001bb0b + 80004e9c: 00000000 .word 0x00000000 + 80004ea0: 008b8b93 addi x23,x23,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x17faf7b0e5f614ce + 80004ea4: 00033003 ld x0,0(x6) + 80004ea8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x67d45a908834d099 + 80004eac: 00033003 ld x0,0(x6) + 80004eb0: 00830313 addi x6,x6,8 + +0000000080004eb4 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b0: + aes64esm x8, x0, x0 # perform operation + 80004eb4: 36000433 aes64esm x8,x0,x0 + # Check if x8 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x8, Zkne_aes64esm_cg_cmp_rs1_rs2_b0, Zkne_aes64esm_cg_cmp_rs1_rs2_b0_str) + 80004eb8: 000bb203 ld x4,0(x23) + 80004ebc: 00820c63 beq x4,x8,80004ed4 + 80004ec0: 240062ef jal x5,8000b100 + 80004ec4: 80004eb4 .word 0x80004eb4 + 80004ec8: 00000000 .word 0x00000000 + 80004ecc: 8001bb70 .word 0x8001bb70 + 80004ed0: 00000000 .word 0x00000000 + 80004ed4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x980dffb57c4b33a4 + 80004ed8: 00033083 ld x1,0(x6) + 80004edc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x050e286e8cc4a837 + 80004ee0: 00033083 ld x1,0(x6) + 80004ee4: 00830313 addi x6,x6,8 + +0000000080004ee8 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b1: + aes64esm x15, x1, x1 # perform operation + 80004ee8: 361087b3 aes64esm x15,x1,x1 + # Check if x15 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x15, Zkne_aes64esm_cg_cmp_rs1_rs2_b1, Zkne_aes64esm_cg_cmp_rs1_rs2_b1_str) + 80004eec: 000bb203 ld x4,0(x23) + 80004ef0: 00f20c63 beq x4,x15,80004f08 + 80004ef4: 20c062ef jal x5,8000b100 + 80004ef8: 80004ee8 .word 0x80004ee8 + 80004efc: 00000000 .word 0x00000000 + 80004f00: 8001bbac .word 0x8001bbac + 80004f04: 00000000 .word 0x00000000 + 80004f08: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x517fcadf5407d67c + 80004f0c: 00033103 ld x2,0(x6) + 80004f10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x61881aa962169430 + 80004f14: 00033103 ld x2,0(x6) + 80004f18: 00830313 addi x6,x6,8 + +0000000080004f1c : +Zkne_aes64esm_cg_cmp_rs1_rs2_b2: + aes64esm x17, x2, x2 # perform operation + 80004f1c: 362108b3 aes64esm x17,x2,x2 + # Check if x17 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x17, Zkne_aes64esm_cg_cmp_rs1_rs2_b2, Zkne_aes64esm_cg_cmp_rs1_rs2_b2_str) + 80004f20: 000bb203 ld x4,0(x23) + 80004f24: 01120c63 beq x4,x17,80004f3c + 80004f28: 1d8062ef jal x5,8000b100 + 80004f2c: 80004f1c .word 0x80004f1c + 80004f30: 00000000 .word 0x00000000 + 80004f34: 8001bbe8 .word 0x8001bbe8 + 80004f38: 00000000 .word 0x00000000 + 80004f3c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x459579fbcde64239 + 80004f40: 00033183 ld x3,0(x6) + 80004f44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x2269cb33df050391 + 80004f48: 00033183 ld x3,0(x6) + 80004f4c: 00830313 addi x6,x6,8 + +0000000080004f50 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b3: + aes64esm x18, x3, x3 # perform operation + 80004f50: 36318933 aes64esm x18,x3,x3 + # Check if x18 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x18, Zkne_aes64esm_cg_cmp_rs1_rs2_b3, Zkne_aes64esm_cg_cmp_rs1_rs2_b3_str) + 80004f54: 000bb203 ld x4,0(x23) + 80004f58: 01220c63 beq x4,x18,80004f70 + 80004f5c: 1a4062ef jal x5,8000b100 + 80004f60: 80004f50 .word 0x80004f50 + 80004f64: 00000000 .word 0x00000000 + 80004f68: 8001bc24 .word 0x8001bc24 + 80004f6c: 00000000 .word 0x00000000 + 80004f70: 008b8b93 addi x23,x23,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f74: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f78: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xf82e1a8b5ecd647b + 80004f7c: 00033203 ld x4,0(x6) + 80004f80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0xa4776dee608da1b0 + 80004f84: 00033203 ld x4,0(x6) + 80004f88: 00830313 addi x6,x6,8 + +0000000080004f8c : +Zkne_aes64esm_cg_cmp_rs1_rs2_b4: + aes64esm x18, x4, x4 # perform operation + 80004f8c: 36420933 aes64esm x18,x4,x4 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zkne_aes64esm_cg_cmp_rs1_rs2_b4, Zkne_aes64esm_cg_cmp_rs1_rs2_b4_str) + 80004f90: 000bb383 ld x7,0(x23) + 80004f94: 01238c63 beq x7,x18,80004fac + 80004f98: 1800646f jal x8,8000b118 + 80004f9c: 80004f8c .word 0x80004f8c + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 8001bc60 .word 0x8001bc60 + 80004fa8: 00000000 .word 0x00000000 + 80004fac: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xd2d8f025de9840ec + 80004fb0: 00033283 ld x5,0(x6) + 80004fb4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x4823a5a43d99947c + 80004fb8: 00033283 ld x5,0(x6) + 80004fbc: 00830313 addi x6,x6,8 + +0000000080004fc0 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b5: + aes64esm x14, x5, x5 # perform operation + 80004fc0: 36528733 aes64esm x14,x5,x5 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zkne_aes64esm_cg_cmp_rs1_rs2_b5, Zkne_aes64esm_cg_cmp_rs1_rs2_b5_str) + 80004fc4: 000bb383 ld x7,0(x23) + 80004fc8: 00e38c63 beq x7,x14,80004fe0 + 80004fcc: 14c0646f jal x8,8000b118 + 80004fd0: 80004fc0 .word 0x80004fc0 + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 8001bc9c .word 0x8001bc9c + 80004fdc: 00000000 .word 0x00000000 + 80004fe0: 008b8b93 addi x23,x23,8 + + mv x19, x6 # switch data pointer register to avoid conflict with test + 80004fe4: 00030993 addi x19,x6,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs1: x6 = 0xa780acbfcc709080 + 80004fe8: 0009b303 ld x6,0(x19) + 80004fec: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x6) # load rs2: x6 = 0x6d484353a65c5c08 + 80004ff0: 0009b303 ld x6,0(x19) + 80004ff4: 00898993 addi x19,x19,8 + +0000000080004ff8 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b6: + aes64esm x31, x6, x6 # perform operation + 80004ff8: 36630fb3 aes64esm x31,x6,x6 + # Check if x31 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x31, Zkne_aes64esm_cg_cmp_rs1_rs2_b6, Zkne_aes64esm_cg_cmp_rs1_rs2_b6_str) + 80004ffc: 000bb383 ld x7,0(x23) + 80005000: 01f38c63 beq x7,x31,80005018 + 80005004: 1140646f jal x8,8000b118 + 80005008: 80004ff8 .word 0x80004ff8 + 8000500c: 00000000 .word 0x00000000 + 80005010: 8001bcd8 .word 0x8001bcd8 + 80005014: 00000000 .word 0x00000000 + 80005018: 008b8b93 addi x23,x23,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000501c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005020: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs1: x7 = 0x94c155d72b1900d3 + 80005024: 0009b383 ld x7,0(x19) + 80005028: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x7) # load rs2: x7 = 0xbf93c0004e4a9717 + 8000502c: 0009b383 ld x7,0(x19) + 80005030: 00898993 addi x19,x19,8 + +0000000080005034 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b7: + aes64esm x9, x7, x7 # perform operation + 80005034: 367384b3 aes64esm x9,x7,x7 + # Check if x9 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x9, Zkne_aes64esm_cg_cmp_rs1_rs2_b7, Zkne_aes64esm_cg_cmp_rs1_rs2_b7_str) + 80005038: 000bb683 ld x13,0(x23) + 8000503c: 00968c63 beq x13,x9,80005054 + 80005040: 1000676f jal x14,8000b140 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 8001bd14 .word 0x8001bd14 + 80005050: 00000000 .word 0x00000000 + 80005054: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs1: x8 = 0xe1ac248323293589 + 80005058: 0009b403 ld x8,0(x19) + 8000505c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x8) # load rs2: x8 = 0x1755fd44d9e8bd29 + 80005060: 0009b403 ld x8,0(x19) + 80005064: 00898993 addi x19,x19,8 + +0000000080005068 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b8: + aes64esm x10, x8, x8 # perform operation + 80005068: 36840533 aes64esm x10,x8,x8 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zkne_aes64esm_cg_cmp_rs1_rs2_b8, Zkne_aes64esm_cg_cmp_rs1_rs2_b8_str) + 8000506c: 000bb683 ld x13,0(x23) + 80005070: 00a68c63 beq x13,x10,80005088 + 80005074: 0cc0676f jal x14,8000b140 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 8001bd50 .word 0x8001bd50 + 80005084: 00000000 .word 0x00000000 + 80005088: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs1: x9 = 0xedf3cb94445aece6 + 8000508c: 0009b483 ld x9,0(x19) + 80005090: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x9) # load rs2: x9 = 0xd014db6eb6ea9d2e + 80005094: 0009b483 ld x9,0(x19) + 80005098: 00898993 addi x19,x19,8 + +000000008000509c : +Zkne_aes64esm_cg_cmp_rs1_rs2_b9: + aes64esm x24, x9, x9 # perform operation + 8000509c: 36948c33 aes64esm x24,x9,x9 + # Check if x24 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x24, Zkne_aes64esm_cg_cmp_rs1_rs2_b9, Zkne_aes64esm_cg_cmp_rs1_rs2_b9_str) + 800050a0: 000bb683 ld x13,0(x23) + 800050a4: 01868c63 beq x13,x24,800050bc + 800050a8: 0980676f jal x14,8000b140 + 800050ac: 8000509c .word 0x8000509c + 800050b0: 00000000 .word 0x00000000 + 800050b4: 8001bd8c .word 0x8001bd8c + 800050b8: 00000000 .word 0x00000000 + 800050bc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs1: x10 = 0xf169e0fe94186ea4 + 800050c0: 0009b503 ld x10,0(x19) + 800050c4: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x10) # load rs2: x10 = 0xd738b4a5b86d6d04 + 800050c8: 0009b503 ld x10,0(x19) + 800050cc: 00898993 addi x19,x19,8 + +00000000800050d0 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b10: + aes64esm x24, x10, x10 # perform operation + 800050d0: 36a50c33 aes64esm x24,x10,x10 + # Check if x24 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x24, Zkne_aes64esm_cg_cmp_rs1_rs2_b10, Zkne_aes64esm_cg_cmp_rs1_rs2_b10_str) + 800050d4: 000bb683 ld x13,0(x23) + 800050d8: 01868c63 beq x13,x24,800050f0 + 800050dc: 0640676f jal x14,8000b140 + 800050e0: 800050d0 .word 0x800050d0 + 800050e4: 00000000 .word 0x00000000 + 800050e8: 8001bdc8 .word 0x8001bdc8 + 800050ec: 00000000 .word 0x00000000 + 800050f0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs1: x11 = 0xeafc6656d21a84bc + 800050f4: 0009b583 ld x11,0(x19) + 800050f8: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x11) # load rs2: x11 = 0xf46fa65fb1ae3ecd + 800050fc: 0009b583 ld x11,0(x19) + 80005100: 00898993 addi x19,x19,8 + +0000000080005104 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b11: + aes64esm x7, x11, x11 # perform operation + 80005104: 36b583b3 aes64esm x7,x11,x11 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zkne_aes64esm_cg_cmp_rs1_rs2_b11, Zkne_aes64esm_cg_cmp_rs1_rs2_b11_str) + 80005108: 000bb683 ld x13,0(x23) + 8000510c: 00768c63 beq x13,x7,80005124 + 80005110: 0300676f jal x14,8000b140 + 80005114: 80005104 .word 0x80005104 + 80005118: 00000000 .word 0x00000000 + 8000511c: 8001be05 .word 0x8001be05 + 80005120: 00000000 .word 0x00000000 + 80005124: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs1: x12 = 0x5a47a7b6caa915f7 + 80005128: 0009b603 ld x12,0(x19) + 8000512c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x12) # load rs2: x12 = 0xf7a5e29bbec671f1 + 80005130: 0009b603 ld x12,0(x19) + 80005134: 00898993 addi x19,x19,8 + +0000000080005138 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b12: + aes64esm x1, x12, x12 # perform operation + 80005138: 36c600b3 aes64esm x1,x12,x12 + # Check if x1 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x1, Zkne_aes64esm_cg_cmp_rs1_rs2_b12, Zkne_aes64esm_cg_cmp_rs1_rs2_b12_str) + 8000513c: 000bb683 ld x13,0(x23) + 80005140: 00168c63 beq x13,x1,80005158 + 80005144: 7fd0576f jal x14,8000b140 + 80005148: 80005138 .word 0x80005138 + 8000514c: 00000000 .word 0x00000000 + 80005150: 8001be42 .word 0x8001be42 + 80005154: 00000000 .word 0x00000000 + 80005158: 008b8b93 addi x23,x23,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000515c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005160: 00070293 addi x5,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs1: x13 = 0x8ebf1611ddf3b446 + 80005164: 0009b683 ld x13,0(x19) + 80005168: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x13) # load rs2: x13 = 0xc254b5db11386124 + 8000516c: 0009b683 ld x13,0(x19) + 80005170: 00898993 addi x19,x19,8 + +0000000080005174 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b13: + aes64esm x12, x13, x13 # perform operation + 80005174: 36d68633 aes64esm x12,x13,x13 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cmp_rs1_rs2_b13, Zkne_aes64esm_cg_cmp_rs1_rs2_b13_str) + 80005178: 000bb203 ld x4,0(x23) + 8000517c: 00c20c63 beq x4,x12,80005194 + 80005180: 781052ef jal x5,8000b100 + 80005184: 80005174 .word 0x80005174 + 80005188: 00000000 .word 0x00000000 + 8000518c: 8001be7f .word 0x8001be7f + 80005190: 00000000 .word 0x00000000 + 80005194: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs1: x14 = 0xbe1009336f9d9188 + 80005198: 0009b703 ld x14,0(x19) + 8000519c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x14) # load rs2: x14 = 0x1ab262741ec82f95 + 800051a0: 0009b703 ld x14,0(x19) + 800051a4: 00898993 addi x19,x19,8 + +00000000800051a8 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b14: + aes64esm x10, x14, x14 # perform operation + 800051a8: 36e70533 aes64esm x10,x14,x14 + # Check if x10 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x10, Zkne_aes64esm_cg_cmp_rs1_rs2_b14, Zkne_aes64esm_cg_cmp_rs1_rs2_b14_str) + 800051ac: 000bb203 ld x4,0(x23) + 800051b0: 00a20c63 beq x4,x10,800051c8 + 800051b4: 74d052ef jal x5,8000b100 + 800051b8: 800051a8 .word 0x800051a8 + 800051bc: 00000000 .word 0x00000000 + 800051c0: 8001bebc .word 0x8001bebc + 800051c4: 00000000 .word 0x00000000 + 800051c8: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs1: x15 = 0x63d4cd9cf9c8cac5 + 800051cc: 0009b783 ld x15,0(x19) + 800051d0: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x15) # load rs2: x15 = 0xd6a46f9f96eb276f + 800051d4: 0009b783 ld x15,0(x19) + 800051d8: 00898993 addi x19,x19,8 + +00000000800051dc : +Zkne_aes64esm_cg_cmp_rs1_rs2_b15: + aes64esm x26, x15, x15 # perform operation + 800051dc: 36f78d33 aes64esm x26,x15,x15 + # Check if x26 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x26, Zkne_aes64esm_cg_cmp_rs1_rs2_b15, Zkne_aes64esm_cg_cmp_rs1_rs2_b15_str) + 800051e0: 000bb203 ld x4,0(x23) + 800051e4: 01a20c63 beq x4,x26,800051fc + 800051e8: 719052ef jal x5,8000b100 + 800051ec: 800051dc .word 0x800051dc + 800051f0: 00000000 .word 0x00000000 + 800051f4: 8001bef9 .word 0x8001bef9 + 800051f8: 00000000 .word 0x00000000 + 800051fc: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs1: x16 = 0x2db3bb03f685548f + 80005200: 0009b803 ld x16,0(x19) + 80005204: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x16) # load rs2: x16 = 0x061ef53cb751fedb + 80005208: 0009b803 ld x16,0(x19) + 8000520c: 00898993 addi x19,x19,8 + +0000000080005210 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b16: + aes64esm x13, x16, x16 # perform operation + 80005210: 370806b3 aes64esm x13,x16,x16 + # Check if x13 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x13, Zkne_aes64esm_cg_cmp_rs1_rs2_b16, Zkne_aes64esm_cg_cmp_rs1_rs2_b16_str) + 80005214: 000bb203 ld x4,0(x23) + 80005218: 00d20c63 beq x4,x13,80005230 + 8000521c: 6e5052ef jal x5,8000b100 + 80005220: 80005210 .word 0x80005210 + 80005224: 00000000 .word 0x00000000 + 80005228: 8001bf36 .word 0x8001bf36 + 8000522c: 00000000 .word 0x00000000 + 80005230: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs1: x17 = 0x6ee55a11f1e7fc09 + 80005234: 0009b883 ld x17,0(x19) + 80005238: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x17) # load rs2: x17 = 0xf80b2694d70ce001 + 8000523c: 0009b883 ld x17,0(x19) + 80005240: 00898993 addi x19,x19,8 + +0000000080005244 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b17: + aes64esm x11, x17, x17 # perform operation + 80005244: 371885b3 aes64esm x11,x17,x17 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zkne_aes64esm_cg_cmp_rs1_rs2_b17, Zkne_aes64esm_cg_cmp_rs1_rs2_b17_str) + 80005248: 000bb203 ld x4,0(x23) + 8000524c: 00b20c63 beq x4,x11,80005264 + 80005250: 6b1052ef jal x5,8000b100 + 80005254: 80005244 .word 0x80005244 + 80005258: 00000000 .word 0x00000000 + 8000525c: 8001bf73 .word 0x8001bf73 + 80005260: 00000000 .word 0x00000000 + 80005264: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0x52a41f57eda21a79 + 80005268: 0009b903 ld x18,0(x19) + 8000526c: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0x9410ab9592cdc1a7 + 80005270: 0009b903 ld x18,0(x19) + 80005274: 00898993 addi x19,x19,8 + +0000000080005278 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b18: + aes64esm x12, x18, x18 # perform operation + 80005278: 37290633 aes64esm x12,x18,x18 + # Check if x12 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x12, Zkne_aes64esm_cg_cmp_rs1_rs2_b18, Zkne_aes64esm_cg_cmp_rs1_rs2_b18_str) + 8000527c: 000bb203 ld x4,0(x23) + 80005280: 00c20c63 beq x4,x12,80005298 + 80005284: 67d052ef jal x5,8000b100 + 80005288: 80005278 .word 0x80005278 + 8000528c: 00000000 .word 0x00000000 + 80005290: 8001bfb0 .word 0x8001bfb0 + 80005294: 00000000 .word 0x00000000 + 80005298: 008b8b93 addi x23,x23,8 + + mv x15, x19 # switch data pointer register to avoid conflict with test + 8000529c: 00098793 addi x15,x19,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xb9a61b848b0aef88 + 800052a0: 0007b983 ld x19,0(x15) + 800052a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xe1a058046c6c1850 + 800052a8: 0007b983 ld x19,0(x15) + 800052ac: 00878793 addi x15,x15,8 + +00000000800052b0 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b19: + aes64esm x31, x19, x19 # perform operation + 800052b0: 37398fb3 aes64esm x31,x19,x19 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zkne_aes64esm_cg_cmp_rs1_rs2_b19, Zkne_aes64esm_cg_cmp_rs1_rs2_b19_str) + 800052b4: 000bb203 ld x4,0(x23) + 800052b8: 01f20c63 beq x4,x31,800052d0 + 800052bc: 645052ef jal x5,8000b100 + 800052c0: 800052b0 .word 0x800052b0 + 800052c4: 00000000 .word 0x00000000 + 800052c8: 8001bfed .word 0x8001bfed + 800052cc: 00000000 .word 0x00000000 + 800052d0: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x80e2843314dfac3f + 800052d4: 0007ba03 ld x20,0(x15) + 800052d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x180631ecb13ef8c0 + 800052dc: 0007ba03 ld x20,0(x15) + 800052e0: 00878793 addi x15,x15,8 + +00000000800052e4 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b20: + aes64esm x25, x20, x20 # perform operation + 800052e4: 374a0cb3 aes64esm x25,x20,x20 + # Check if x25 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x25, Zkne_aes64esm_cg_cmp_rs1_rs2_b20, Zkne_aes64esm_cg_cmp_rs1_rs2_b20_str) + 800052e8: 000bb203 ld x4,0(x23) + 800052ec: 01920c63 beq x4,x25,80005304 + 800052f0: 611052ef jal x5,8000b100 + 800052f4: 800052e4 .word 0x800052e4 + 800052f8: 00000000 .word 0x00000000 + 800052fc: 8001c02a .word 0x8001c02a + 80005300: 00000000 .word 0x00000000 + 80005304: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x39492f517cff37e3 + 80005308: 0007ba83 ld x21,0(x15) + 8000530c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x57e9ca2711f2ad4e + 80005310: 0007ba83 ld x21,0(x15) + 80005314: 00878793 addi x15,x15,8 + +0000000080005318 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b21: + aes64esm x1, x21, x21 # perform operation + 80005318: 375a80b3 aes64esm x1,x21,x21 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cmp_rs1_rs2_b21, Zkne_aes64esm_cg_cmp_rs1_rs2_b21_str) + 8000531c: 000bb203 ld x4,0(x23) + 80005320: 00120c63 beq x4,x1,80005338 + 80005324: 5dd052ef jal x5,8000b100 + 80005328: 80005318 .word 0x80005318 + 8000532c: 00000000 .word 0x00000000 + 80005330: 8001c067 .word 0x8001c067 + 80005334: 00000000 .word 0x00000000 + 80005338: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x48e9e4b7ca920e59 + 8000533c: 0007bb03 ld x22,0(x15) + 80005340: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x064c764880bfdaf1 + 80005344: 0007bb03 ld x22,0(x15) + 80005348: 00878793 addi x15,x15,8 + +000000008000534c : +Zkne_aes64esm_cg_cmp_rs1_rs2_b22: + aes64esm x1, x22, x22 # perform operation + 8000534c: 376b00b3 aes64esm x1,x22,x22 + # Check if x1 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x1, Zkne_aes64esm_cg_cmp_rs1_rs2_b22, Zkne_aes64esm_cg_cmp_rs1_rs2_b22_str) + 80005350: 000bb203 ld x4,0(x23) + 80005354: 00120c63 beq x4,x1,8000536c + 80005358: 5a9052ef jal x5,8000b100 + 8000535c: 8000534c .word 0x8000534c + 80005360: 00000000 .word 0x00000000 + 80005364: 8001c0a4 .word 0x8001c0a4 + 80005368: 00000000 .word 0x00000000 + 8000536c: 008b8b93 addi x23,x23,8 + + mv x24, x23 # switch signature pointer register to avoid conflict with test + 80005370: 000b8c13 addi x24,x23,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xc5c0fbdd1e4d8435 + 80005374: 0007bb83 ld x23,0(x15) + 80005378: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xfd4d2562e160a246 + 8000537c: 0007bb83 ld x23,0(x15) + 80005380: 00878793 addi x15,x15,8 + +0000000080005384 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b23: + aes64esm x28, x23, x23 # perform operation + 80005384: 377b8e33 aes64esm x28,x23,x23 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zkne_aes64esm_cg_cmp_rs1_rs2_b23, Zkne_aes64esm_cg_cmp_rs1_rs2_b23_str) + 80005388: 000c3203 ld x4,0(x24) + 8000538c: 01c20c63 beq x4,x28,800053a4 + 80005390: 571052ef jal x5,8000b100 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 8001c0e1 .word 0x8001c0e1 + 800053a0: 00000000 .word 0x00000000 + 800053a4: 008c0c13 addi x24,x24,8 + + mv x12, x24 # switch signature pointer register to avoid conflict with test + 800053a8: 000c0613 addi x12,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x9077802912e6fea6 + 800053ac: 0007bc03 ld x24,0(x15) + 800053b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x239f8ae1e860e856 + 800053b4: 0007bc03 ld x24,0(x15) + 800053b8: 00878793 addi x15,x15,8 + +00000000800053bc : +Zkne_aes64esm_cg_cmp_rs1_rs2_b24: + aes64esm x16, x24, x24 # perform operation + 800053bc: 378c0833 aes64esm x16,x24,x24 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64esm_cg_cmp_rs1_rs2_b24, Zkne_aes64esm_cg_cmp_rs1_rs2_b24_str) + 800053c0: 00063203 ld x4,0(x12) + 800053c4: 01020c63 beq x4,x16,800053dc + 800053c8: 539052ef jal x5,8000b100 + 800053cc: 800053bc .word 0x800053bc + 800053d0: 00000000 .word 0x00000000 + 800053d4: 8001c11e .word 0x8001c11e + 800053d8: 00000000 .word 0x00000000 + 800053dc: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x957d36d046305860 + 800053e0: 0007bc83 ld x25,0(x15) + 800053e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x6db1d46d49433f91 + 800053e8: 0007bc83 ld x25,0(x15) + 800053ec: 00878793 addi x15,x15,8 + +00000000800053f0 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b25: + aes64esm x6, x25, x25 # perform operation + 800053f0: 379c8333 aes64esm x6,x25,x25 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64esm_cg_cmp_rs1_rs2_b25, Zkne_aes64esm_cg_cmp_rs1_rs2_b25_str) + 800053f4: 00063203 ld x4,0(x12) + 800053f8: 00620c63 beq x4,x6,80005410 + 800053fc: 505052ef jal x5,8000b100 + 80005400: 800053f0 .word 0x800053f0 + 80005404: 00000000 .word 0x00000000 + 80005408: 8001c15b .word 0x8001c15b + 8000540c: 00000000 .word 0x00000000 + 80005410: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xb5828d73edd0b72c + 80005414: 0007bd03 ld x26,0(x15) + 80005418: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x196f16dca04d1fe6 + 8000541c: 0007bd03 ld x26,0(x15) + 80005420: 00878793 addi x15,x15,8 + +0000000080005424 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b26: + aes64esm x25, x26, x26 # perform operation + 80005424: 37ad0cb3 aes64esm x25,x26,x26 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64esm_cg_cmp_rs1_rs2_b26, Zkne_aes64esm_cg_cmp_rs1_rs2_b26_str) + 80005428: 00063203 ld x4,0(x12) + 8000542c: 01920c63 beq x4,x25,80005444 + 80005430: 4d1052ef jal x5,8000b100 + 80005434: 80005424 .word 0x80005424 + 80005438: 00000000 .word 0x00000000 + 8000543c: 8001c198 .word 0x8001c198 + 80005440: 00000000 .word 0x00000000 + 80005444: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x08ba770795e72e32 + 80005448: 0007bd83 ld x27,0(x15) + 8000544c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x1283093c082a6500 + 80005450: 0007bd83 ld x27,0(x15) + 80005454: 00878793 addi x15,x15,8 + +0000000080005458 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b27: + aes64esm x10, x27, x27 # perform operation + 80005458: 37bd8533 aes64esm x10,x27,x27 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64esm_cg_cmp_rs1_rs2_b27, Zkne_aes64esm_cg_cmp_rs1_rs2_b27_str) + 8000545c: 00063203 ld x4,0(x12) + 80005460: 00a20c63 beq x4,x10,80005478 + 80005464: 49d052ef jal x5,8000b100 + 80005468: 80005458 .word 0x80005458 + 8000546c: 00000000 .word 0x00000000 + 80005470: 8001c1d5 .word 0x8001c1d5 + 80005474: 00000000 .word 0x00000000 + 80005478: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x51b0c5dcf8bae96f + 8000547c: 0007be03 ld x28,0(x15) + 80005480: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x49b6d053318db61f + 80005484: 0007be03 ld x28,0(x15) + 80005488: 00878793 addi x15,x15,8 + +000000008000548c : +Zkne_aes64esm_cg_cmp_rs1_rs2_b28: + aes64esm x17, x28, x28 # perform operation + 8000548c: 37ce08b3 aes64esm x17,x28,x28 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64esm_cg_cmp_rs1_rs2_b28, Zkne_aes64esm_cg_cmp_rs1_rs2_b28_str) + 80005490: 00063203 ld x4,0(x12) + 80005494: 01120c63 beq x4,x17,800054ac + 80005498: 469052ef jal x5,8000b100 + 8000549c: 8000548c .word 0x8000548c + 800054a0: 00000000 .word 0x00000000 + 800054a4: 8001c212 .word 0x8001c212 + 800054a8: 00000000 .word 0x00000000 + 800054ac: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xc59318d7f1a55469 + 800054b0: 0007be83 ld x29,0(x15) + 800054b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8e868de948391761 + 800054b8: 0007be83 ld x29,0(x15) + 800054bc: 00878793 addi x15,x15,8 + +00000000800054c0 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b29: + aes64esm x26, x29, x29 # perform operation + 800054c0: 37de8d33 aes64esm x26,x29,x29 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64esm_cg_cmp_rs1_rs2_b29, Zkne_aes64esm_cg_cmp_rs1_rs2_b29_str) + 800054c4: 00063203 ld x4,0(x12) + 800054c8: 01a20c63 beq x4,x26,800054e0 + 800054cc: 435052ef jal x5,8000b100 + 800054d0: 800054c0 .word 0x800054c0 + 800054d4: 00000000 .word 0x00000000 + 800054d8: 8001c24f .word 0x8001c24f + 800054dc: 00000000 .word 0x00000000 + 800054e0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x7407d8308252c4ca + 800054e4: 0007bf03 ld x30,0(x15) + 800054e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xd3e461f42b722939 + 800054ec: 0007bf03 ld x30,0(x15) + 800054f0: 00878793 addi x15,x15,8 + +00000000800054f4 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b30: + aes64esm x24, x30, x30 # perform operation + 800054f4: 37ef0c33 aes64esm x24,x30,x30 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64esm_cg_cmp_rs1_rs2_b30, Zkne_aes64esm_cg_cmp_rs1_rs2_b30_str) + 800054f8: 00063203 ld x4,0(x12) + 800054fc: 01820c63 beq x4,x24,80005514 + 80005500: 401052ef jal x5,8000b100 + 80005504: 800054f4 .word 0x800054f4 + 80005508: 00000000 .word 0x00000000 + 8000550c: 8001c28c .word 0x8001c28c + 80005510: 00000000 .word 0x00000000 + 80005514: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x11d382654cfc2c77 + 80005518: 0007bf83 ld x31,0(x15) + 8000551c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x08eb5a0bf5f073eb + 80005520: 0007bf83 ld x31,0(x15) + 80005524: 00878793 addi x15,x15,8 + +0000000080005528 : +Zkne_aes64esm_cg_cmp_rs1_rs2_b31: + aes64esm x7, x31, x31 # perform operation + 80005528: 37ff83b3 aes64esm x7,x31,x31 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64esm_cg_cmp_rs1_rs2_b31, Zkne_aes64esm_cg_cmp_rs1_rs2_b31_str) + 8000552c: 00063203 ld x4,0(x12) + 80005530: 00720c63 beq x4,x7,80005548 + 80005534: 3cd052ef jal x5,8000b100 + 80005538: 80005528 .word 0x80005528 + 8000553c: 00000000 .word 0x00000000 + 80005540: 8001c2c9 .word 0x8001c2c9 + 80005544: 00000000 .word 0x00000000 + 80005548: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0xe43180f4ba52dd61 + 8000554c: 0007b003 ld x0,0(x15) + 80005550: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xfac9c3aef08d51e0 + 80005554: 0007b903 ld x18,0(x15) + 80005558: 00878793 addi x15,x15,8 + +000000008000555c : +Zkne_aes64esm_cg_cmp_rd_rs1_b0: + aes64esm x0, x0, x18 # perform operation + 8000555c: 37200033 aes64esm x0,x0,x18 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zkne_aes64esm_cg_cmp_rd_rs1_b0, Zkne_aes64esm_cg_cmp_rd_rs1_b0_str) + 80005560: 00063203 ld x4,0(x12) + 80005564: 00020c63 beq x4,x0,8000557c + 80005568: 399052ef jal x5,8000b100 + 8000556c: 8000555c .word 0x8000555c + 80005570: 00000000 .word 0x00000000 + 80005574: 8001c306 .word 0x8001c306 + 80005578: 00000000 .word 0x00000000 + 8000557c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xaf66d4e7f2c9b9cd + 80005580: 0007b083 ld x1,0(x15) + 80005584: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x7eacd57fdf0aba36 + 80005588: 0007b303 ld x6,0(x15) + 8000558c: 00878793 addi x15,x15,8 + +0000000080005590 : +Zkne_aes64esm_cg_cmp_rd_rs1_b1: + aes64esm x1, x1, x6 # perform operation + 80005590: 366080b3 aes64esm x1,x1,x6 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64esm_cg_cmp_rd_rs1_b1, Zkne_aes64esm_cg_cmp_rd_rs1_b1_str) + 80005594: 00063203 ld x4,0(x12) + 80005598: 00120c63 beq x4,x1,800055b0 + 8000559c: 365052ef jal x5,8000b100 + 800055a0: 80005590 .word 0x80005590 + 800055a4: 00000000 .word 0x00000000 + 800055a8: 8001c341 .word 0x8001c341 + 800055ac: 00000000 .word 0x00000000 + 800055b0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x1da7f9854052969a + 800055b4: 0007b103 ld x2,0(x15) + 800055b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x5c066d0fb58e3c6f + 800055bc: 0007b883 ld x17,0(x15) + 800055c0: 00878793 addi x15,x15,8 + +00000000800055c4 : +Zkne_aes64esm_cg_cmp_rd_rs1_b2: + aes64esm x2, x2, x17 # perform operation + 800055c4: 37110133 aes64esm x2,x2,x17 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64esm_cg_cmp_rd_rs1_b2, Zkne_aes64esm_cg_cmp_rd_rs1_b2_str) + 800055c8: 00063203 ld x4,0(x12) + 800055cc: 00220c63 beq x4,x2,800055e4 + 800055d0: 331052ef jal x5,8000b100 + 800055d4: 800055c4 .word 0x800055c4 + 800055d8: 00000000 .word 0x00000000 + 800055dc: 8001c37c .word 0x8001c37c + 800055e0: 00000000 .word 0x00000000 + 800055e4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7b03c8c96c8dd52f + 800055e8: 0007b183 ld x3,0(x15) + 800055ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x216cc77b034a0b27 + 800055f0: 0007ba83 ld x21,0(x15) + 800055f4: 00878793 addi x15,x15,8 + +00000000800055f8 : +Zkne_aes64esm_cg_cmp_rd_rs1_b3: + aes64esm x3, x3, x21 # perform operation + 800055f8: 375181b3 aes64esm x3,x3,x21 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64esm_cg_cmp_rd_rs1_b3, Zkne_aes64esm_cg_cmp_rd_rs1_b3_str) + 800055fc: 00063203 ld x4,0(x12) + 80005600: 00320c63 beq x4,x3,80005618 + 80005604: 2fd052ef jal x5,8000b100 + 80005608: 800055f8 .word 0x800055f8 + 8000560c: 00000000 .word 0x00000000 + 80005610: 8001c3b7 .word 0x8001c3b7 + 80005614: 00000000 .word 0x00000000 + 80005618: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 8000561c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005620: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xbba3ba3db3a27509 + 80005624: 0007b203 ld x4,0(x15) + 80005628: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x80e42cae4d1f516b + 8000562c: 0007bb03 ld x22,0(x15) + 80005630: 00878793 addi x15,x15,8 + +0000000080005634 : +Zkne_aes64esm_cg_cmp_rd_rs1_b4: + aes64esm x4, x4, x22 # perform operation + 80005634: 37620233 aes64esm x4,x4,x22 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zkne_aes64esm_cg_cmp_rd_rs1_b4, Zkne_aes64esm_cg_cmp_rd_rs1_b4_str) + 80005638: 00063683 ld x13,0(x12) + 8000563c: 00468c63 beq x13,x4,80005654 + 80005640: 3010576f jal x14,8000b140 + 80005644: 80005634 .word 0x80005634 + 80005648: 00000000 .word 0x00000000 + 8000564c: 8001c3f2 .word 0x8001c3f2 + 80005650: 00000000 .word 0x00000000 + 80005654: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x26ee26020a8e9716 + 80005658: 0007b283 ld x5,0(x15) + 8000565c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x46f21fa44293f4ce + 80005660: 0007b103 ld x2,0(x15) + 80005664: 00878793 addi x15,x15,8 + +0000000080005668 : +Zkne_aes64esm_cg_cmp_rd_rs1_b5: + aes64esm x5, x5, x2 # perform operation + 80005668: 362282b3 aes64esm x5,x5,x2 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zkne_aes64esm_cg_cmp_rd_rs1_b5, Zkne_aes64esm_cg_cmp_rd_rs1_b5_str) + 8000566c: 00063683 ld x13,0(x12) + 80005670: 00568c63 beq x13,x5,80005688 + 80005674: 2cd0576f jal x14,8000b140 + 80005678: 80005668 .word 0x80005668 + 8000567c: 00000000 .word 0x00000000 + 80005680: 8001c42d .word 0x8001c42d + 80005684: 00000000 .word 0x00000000 + 80005688: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x635c5dc1ab3f1755 + 8000568c: 0007b303 ld x6,0(x15) + 80005690: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xcb7b5832801d4159 + 80005694: 0007b803 ld x16,0(x15) + 80005698: 00878793 addi x15,x15,8 + +000000008000569c : +Zkne_aes64esm_cg_cmp_rd_rs1_b6: + aes64esm x6, x6, x16 # perform operation + 8000569c: 37030333 aes64esm x6,x6,x16 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zkne_aes64esm_cg_cmp_rd_rs1_b6, Zkne_aes64esm_cg_cmp_rd_rs1_b6_str) + 800056a0: 00063683 ld x13,0(x12) + 800056a4: 00668c63 beq x13,x6,800056bc + 800056a8: 2990576f jal x14,8000b140 + 800056ac: 8000569c .word 0x8000569c + 800056b0: 00000000 .word 0x00000000 + 800056b4: 8001c468 .word 0x8001c468 + 800056b8: 00000000 .word 0x00000000 + 800056bc: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x613c497002b9a7f1 + 800056c0: 0007b383 ld x7,0(x15) + 800056c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xae5985ee5259bd7f + 800056c8: 0007b303 ld x6,0(x15) + 800056cc: 00878793 addi x15,x15,8 + +00000000800056d0 : +Zkne_aes64esm_cg_cmp_rd_rs1_b7: + aes64esm x7, x7, x6 # perform operation + 800056d0: 366383b3 aes64esm x7,x7,x6 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zkne_aes64esm_cg_cmp_rd_rs1_b7, Zkne_aes64esm_cg_cmp_rd_rs1_b7_str) + 800056d4: 00063683 ld x13,0(x12) + 800056d8: 00768c63 beq x13,x7,800056f0 + 800056dc: 2650576f jal x14,8000b140 + 800056e0: 800056d0 .word 0x800056d0 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 8001c4a3 .word 0x8001c4a3 + 800056ec: 00000000 .word 0x00000000 + 800056f0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x4dffbf4b4f3d37e0 + 800056f4: 0007b403 ld x8,0(x15) + 800056f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x7a8eabda10b49e90 + 800056fc: 0007b303 ld x6,0(x15) + 80005700: 00878793 addi x15,x15,8 + +0000000080005704 : +Zkne_aes64esm_cg_cmp_rd_rs1_b8: + aes64esm x8, x8, x6 # perform operation + 80005704: 36640433 aes64esm x8,x8,x6 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zkne_aes64esm_cg_cmp_rd_rs1_b8, Zkne_aes64esm_cg_cmp_rd_rs1_b8_str) + 80005708: 00063683 ld x13,0(x12) + 8000570c: 00868c63 beq x13,x8,80005724 + 80005710: 2310576f jal x14,8000b140 + 80005714: 80005704 .word 0x80005704 + 80005718: 00000000 .word 0x00000000 + 8000571c: 8001c4de .word 0x8001c4de + 80005720: 00000000 .word 0x00000000 + 80005724: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x8f2cd54a3122f910 + 80005728: 0007b483 ld x9,0(x15) + 8000572c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x88e4cb522f42a20d + 80005730: 0007b003 ld x0,0(x15) + 80005734: 00878793 addi x15,x15,8 + +0000000080005738 : +Zkne_aes64esm_cg_cmp_rd_rs1_b9: + aes64esm x9, x9, x0 # perform operation + 80005738: 360484b3 aes64esm x9,x9,x0 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zkne_aes64esm_cg_cmp_rd_rs1_b9, Zkne_aes64esm_cg_cmp_rd_rs1_b9_str) + 8000573c: 00063683 ld x13,0(x12) + 80005740: 00968c63 beq x13,x9,80005758 + 80005744: 1fd0576f jal x14,8000b140 + 80005748: 80005738 .word 0x80005738 + 8000574c: 00000000 .word 0x00000000 + 80005750: 8001c519 .word 0x8001c519 + 80005754: 00000000 .word 0x00000000 + 80005758: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xf679a851f031c253 + 8000575c: 0007b503 ld x10,0(x15) + 80005760: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xebe9b99d481e0894 + 80005764: 0007be03 ld x28,0(x15) + 80005768: 00878793 addi x15,x15,8 + +000000008000576c : +Zkne_aes64esm_cg_cmp_rd_rs1_b10: + aes64esm x10, x10, x28 # perform operation + 8000576c: 37c50533 aes64esm x10,x10,x28 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zkne_aes64esm_cg_cmp_rd_rs1_b10, Zkne_aes64esm_cg_cmp_rd_rs1_b10_str) + 80005770: 00063683 ld x13,0(x12) + 80005774: 00a68c63 beq x13,x10,8000578c + 80005778: 1c90576f jal x14,8000b140 + 8000577c: 8000576c .word 0x8000576c + 80005780: 00000000 .word 0x00000000 + 80005784: 8001c554 .word 0x8001c554 + 80005788: 00000000 .word 0x00000000 + 8000578c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x5d4a370235df1005 + 80005790: 0007b583 ld x11,0(x15) + 80005794: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x76c1cb0af74a69b5 + 80005798: 0007bb83 ld x23,0(x15) + 8000579c: 00878793 addi x15,x15,8 + +00000000800057a0 : +Zkne_aes64esm_cg_cmp_rd_rs1_b11: + aes64esm x11, x11, x23 # perform operation + 800057a0: 377585b3 aes64esm x11,x11,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zkne_aes64esm_cg_cmp_rd_rs1_b11, Zkne_aes64esm_cg_cmp_rd_rs1_b11_str) + 800057a4: 00063683 ld x13,0(x12) + 800057a8: 00b68c63 beq x13,x11,800057c0 + 800057ac: 1950576f jal x14,8000b140 + 800057b0: 800057a0 .word 0x800057a0 + 800057b4: 00000000 .word 0x00000000 + 800057b8: 8001c590 .word 0x8001c590 + 800057bc: 00000000 .word 0x00000000 + 800057c0: 00860613 addi x12,x12,8 + + mv x24, x12 # switch signature pointer register to avoid conflict with test + 800057c4: 00060c13 addi x24,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x13fcb291a292c590 + 800057c8: 0007b603 ld x12,0(x15) + 800057cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xbdd2e3a7eae8e7c4 + 800057d0: 0007be03 ld x28,0(x15) + 800057d4: 00878793 addi x15,x15,8 + +00000000800057d8 : +Zkne_aes64esm_cg_cmp_rd_rs1_b12: + aes64esm x12, x12, x28 # perform operation + 800057d8: 37c60633 aes64esm x12,x12,x28 + # Check if x12 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x12, Zkne_aes64esm_cg_cmp_rd_rs1_b12, Zkne_aes64esm_cg_cmp_rd_rs1_b12_str) + 800057dc: 000c3683 ld x13,0(x24) + 800057e0: 00c68c63 beq x13,x12,800057f8 + 800057e4: 15d0576f jal x14,8000b140 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 8001c5cc .word 0x8001c5cc + 800057f4: 00000000 .word 0x00000000 + 800057f8: 008c0c13 addi x24,x24,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800057fc: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005800: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xd61a67e3e74343c6 + 80005804: 0007b683 ld x13,0(x15) + 80005808: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x56b431ebb19e9c8b + 8000580c: 0007be03 ld x28,0(x15) + 80005810: 00878793 addi x15,x15,8 + +0000000080005814 : +Zkne_aes64esm_cg_cmp_rd_rs1_b13: + aes64esm x13, x13, x28 # perform operation + 80005814: 37c686b3 aes64esm x13,x13,x28 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zkne_aes64esm_cg_cmp_rd_rs1_b13, Zkne_aes64esm_cg_cmp_rd_rs1_b13_str) + 80005818: 000c3203 ld x4,0(x24) + 8000581c: 00d20c63 beq x4,x13,80005834 + 80005820: 0e1052ef jal x5,8000b100 + 80005824: 80005814 .word 0x80005814 + 80005828: 00000000 .word 0x00000000 + 8000582c: 8001c608 .word 0x8001c608 + 80005830: 00000000 .word 0x00000000 + 80005834: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xf0a57e96224372eb + 80005838: 0007b703 ld x14,0(x15) + 8000583c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xef21891898f6ab66 + 80005840: 0007b483 ld x9,0(x15) + 80005844: 00878793 addi x15,x15,8 + +0000000080005848 : +Zkne_aes64esm_cg_cmp_rd_rs1_b14: + aes64esm x14, x14, x9 # perform operation + 80005848: 36970733 aes64esm x14,x14,x9 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zkne_aes64esm_cg_cmp_rd_rs1_b14, Zkne_aes64esm_cg_cmp_rd_rs1_b14_str) + 8000584c: 000c3203 ld x4,0(x24) + 80005850: 00e20c63 beq x4,x14,80005868 + 80005854: 0ad052ef jal x5,8000b100 + 80005858: 80005848 .word 0x80005848 + 8000585c: 00000000 .word 0x00000000 + 80005860: 8001c644 .word 0x8001c644 + 80005864: 00000000 .word 0x00000000 + 80005868: 008c0c13 addi x24,x24,8 + + mv x6, x15 # switch data pointer register to avoid conflict with test + 8000586c: 00078313 addi x6,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0282b9aaefb15eaf + 80005870: 00033783 ld x15,0(x6) + 80005874: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xc287487d053627ba + 80005878: 00033403 ld x8,0(x6) + 8000587c: 00830313 addi x6,x6,8 + +0000000080005880 : +Zkne_aes64esm_cg_cmp_rd_rs1_b15: + aes64esm x15, x15, x8 # perform operation + 80005880: 368787b3 aes64esm x15,x15,x8 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zkne_aes64esm_cg_cmp_rd_rs1_b15, Zkne_aes64esm_cg_cmp_rd_rs1_b15_str) + 80005884: 000c3203 ld x4,0(x24) + 80005888: 00f20c63 beq x4,x15,800058a0 + 8000588c: 075052ef jal x5,8000b100 + 80005890: 80005880 .word 0x80005880 + 80005894: 00000000 .word 0x00000000 + 80005898: 8001c680 .word 0x8001c680 + 8000589c: 00000000 .word 0x00000000 + 800058a0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xcf4aa4f91a709583 + 800058a4: 00033803 ld x16,0(x6) + 800058a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x86123dbe7e33898e + 800058ac: 00033c83 ld x25,0(x6) + 800058b0: 00830313 addi x6,x6,8 + +00000000800058b4 : +Zkne_aes64esm_cg_cmp_rd_rs1_b16: + aes64esm x16, x16, x25 # perform operation + 800058b4: 37980833 aes64esm x16,x16,x25 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zkne_aes64esm_cg_cmp_rd_rs1_b16, Zkne_aes64esm_cg_cmp_rd_rs1_b16_str) + 800058b8: 000c3203 ld x4,0(x24) + 800058bc: 01020c63 beq x4,x16,800058d4 + 800058c0: 041052ef jal x5,8000b100 + 800058c4: 800058b4 .word 0x800058b4 + 800058c8: 00000000 .word 0x00000000 + 800058cc: 8001c6bc .word 0x8001c6bc + 800058d0: 00000000 .word 0x00000000 + 800058d4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xff4e7598dd731b63 + 800058d8: 00033883 ld x17,0(x6) + 800058dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x12127eec40c6a69f + 800058e0: 00033783 ld x15,0(x6) + 800058e4: 00830313 addi x6,x6,8 + +00000000800058e8 : +Zkne_aes64esm_cg_cmp_rd_rs1_b17: + aes64esm x17, x17, x15 # perform operation + 800058e8: 36f888b3 aes64esm x17,x17,x15 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zkne_aes64esm_cg_cmp_rd_rs1_b17, Zkne_aes64esm_cg_cmp_rd_rs1_b17_str) + 800058ec: 000c3203 ld x4,0(x24) + 800058f0: 01120c63 beq x4,x17,80005908 + 800058f4: 00d052ef jal x5,8000b100 + 800058f8: 800058e8 .word 0x800058e8 + 800058fc: 00000000 .word 0x00000000 + 80005900: 8001c6f8 .word 0x8001c6f8 + 80005904: 00000000 .word 0x00000000 + 80005908: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x5110956cf0bf5de3 + 8000590c: 00033903 ld x18,0(x6) + 80005910: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x0323b2969ae4d5eb + 80005914: 00033a03 ld x20,0(x6) + 80005918: 00830313 addi x6,x6,8 + +000000008000591c : +Zkne_aes64esm_cg_cmp_rd_rs1_b18: + aes64esm x18, x18, x20 # perform operation + 8000591c: 37490933 aes64esm x18,x18,x20 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zkne_aes64esm_cg_cmp_rd_rs1_b18, Zkne_aes64esm_cg_cmp_rd_rs1_b18_str) + 80005920: 000c3203 ld x4,0(x24) + 80005924: 01220c63 beq x4,x18,8000593c + 80005928: 7d8052ef jal x5,8000b100 + 8000592c: 8000591c .word 0x8000591c + 80005930: 00000000 .word 0x00000000 + 80005934: 8001c734 .word 0x8001c734 + 80005938: 00000000 .word 0x00000000 + 8000593c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x9fa7af2e7a24dc6d + 80005940: 00033983 ld x19,0(x6) + 80005944: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x31671a5f7c51abfc + 80005948: 00033883 ld x17,0(x6) + 8000594c: 00830313 addi x6,x6,8 + +0000000080005950 : +Zkne_aes64esm_cg_cmp_rd_rs1_b19: + aes64esm x19, x19, x17 # perform operation + 80005950: 371989b3 aes64esm x19,x19,x17 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zkne_aes64esm_cg_cmp_rd_rs1_b19, Zkne_aes64esm_cg_cmp_rd_rs1_b19_str) + 80005954: 000c3203 ld x4,0(x24) + 80005958: 01320c63 beq x4,x19,80005970 + 8000595c: 7a4052ef jal x5,8000b100 + 80005960: 80005950 .word 0x80005950 + 80005964: 00000000 .word 0x00000000 + 80005968: 8001c770 .word 0x8001c770 + 8000596c: 00000000 .word 0x00000000 + 80005970: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xab67ed1bba8c1a6a + 80005974: 00033a03 ld x20,0(x6) + 80005978: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x754abad26065a9ef + 8000597c: 00033f03 ld x30,0(x6) + 80005980: 00830313 addi x6,x6,8 + +0000000080005984 : +Zkne_aes64esm_cg_cmp_rd_rs1_b20: + aes64esm x20, x20, x30 # perform operation + 80005984: 37ea0a33 aes64esm x20,x20,x30 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zkne_aes64esm_cg_cmp_rd_rs1_b20, Zkne_aes64esm_cg_cmp_rd_rs1_b20_str) + 80005988: 000c3203 ld x4,0(x24) + 8000598c: 01420c63 beq x4,x20,800059a4 + 80005990: 770052ef jal x5,8000b100 + 80005994: 80005984 .word 0x80005984 + 80005998: 00000000 .word 0x00000000 + 8000599c: 8001c7ac .word 0x8001c7ac + 800059a0: 00000000 .word 0x00000000 + 800059a4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x890f6fffa4969ed7 + 800059a8: 00033a83 ld x21,0(x6) + 800059ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x6dd0eea3abaf18c1 + 800059b0: 00033c83 ld x25,0(x6) + 800059b4: 00830313 addi x6,x6,8 + +00000000800059b8 : +Zkne_aes64esm_cg_cmp_rd_rs1_b21: + aes64esm x21, x21, x25 # perform operation + 800059b8: 379a8ab3 aes64esm x21,x21,x25 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zkne_aes64esm_cg_cmp_rd_rs1_b21, Zkne_aes64esm_cg_cmp_rd_rs1_b21_str) + 800059bc: 000c3203 ld x4,0(x24) + 800059c0: 01520c63 beq x4,x21,800059d8 + 800059c4: 73c052ef jal x5,8000b100 + 800059c8: 800059b8 .word 0x800059b8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 8001c7e8 .word 0x8001c7e8 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xa6fde91f1be25119 + 800059dc: 00033b03 ld x22,0(x6) + 800059e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x67ab2ffdadc74bf0 + 800059e4: 00033f83 ld x31,0(x6) + 800059e8: 00830313 addi x6,x6,8 + +00000000800059ec : +Zkne_aes64esm_cg_cmp_rd_rs1_b22: + aes64esm x22, x22, x31 # perform operation + 800059ec: 37fb0b33 aes64esm x22,x22,x31 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zkne_aes64esm_cg_cmp_rd_rs1_b22, Zkne_aes64esm_cg_cmp_rd_rs1_b22_str) + 800059f0: 000c3203 ld x4,0(x24) + 800059f4: 01620c63 beq x4,x22,80005a0c + 800059f8: 708052ef jal x5,8000b100 + 800059fc: 800059ec .word 0x800059ec + 80005a00: 00000000 .word 0x00000000 + 80005a04: 8001c824 .word 0x8001c824 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xadbd7ce855e3eacb + 80005a10: 00033b83 ld x23,0(x6) + 80005a14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x71d6ef7edb65f5e5 + 80005a18: 00033183 ld x3,0(x6) + 80005a1c: 00830313 addi x6,x6,8 + +0000000080005a20 : +Zkne_aes64esm_cg_cmp_rd_rs1_b23: + aes64esm x23, x23, x3 # perform operation + 80005a20: 363b8bb3 aes64esm x23,x23,x3 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zkne_aes64esm_cg_cmp_rd_rs1_b23, Zkne_aes64esm_cg_cmp_rd_rs1_b23_str) + 80005a24: 000c3203 ld x4,0(x24) + 80005a28: 01720c63 beq x4,x23,80005a40 + 80005a2c: 6d4052ef jal x5,8000b100 + 80005a30: 80005a20 .word 0x80005a20 + 80005a34: 00000000 .word 0x00000000 + 80005a38: 8001c860 .word 0x8001c860 + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 008c0c13 addi x24,x24,8 + + mv x17, x24 # switch signature pointer register to avoid conflict with test + 80005a44: 000c0893 addi x17,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xc5bdfa379a1edbee + 80005a48: 00033c03 ld x24,0(x6) + 80005a4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x10dfb50ce762c6b9 + 80005a50: 00033703 ld x14,0(x6) + 80005a54: 00830313 addi x6,x6,8 + +0000000080005a58 : +Zkne_aes64esm_cg_cmp_rd_rs1_b24: + aes64esm x24, x24, x14 # perform operation + 80005a58: 36ec0c33 aes64esm x24,x24,x14 + # Check if x24 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x24, Zkne_aes64esm_cg_cmp_rd_rs1_b24, Zkne_aes64esm_cg_cmp_rd_rs1_b24_str) + 80005a5c: 0008b203 ld x4,0(x17) + 80005a60: 01820c63 beq x4,x24,80005a78 + 80005a64: 69c052ef jal x5,8000b100 + 80005a68: 80005a58 .word 0x80005a58 + 80005a6c: 00000000 .word 0x00000000 + 80005a70: 8001c89c .word 0x8001c89c + 80005a74: 00000000 .word 0x00000000 + 80005a78: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x3bea454690e76f77 + 80005a7c: 00033c83 ld x25,0(x6) + 80005a80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x2f0cf059dabc184a + 80005a84: 00033e03 ld x28,0(x6) + 80005a88: 00830313 addi x6,x6,8 + +0000000080005a8c : +Zkne_aes64esm_cg_cmp_rd_rs1_b25: + aes64esm x25, x25, x28 # perform operation + 80005a8c: 37cc8cb3 aes64esm x25,x25,x28 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zkne_aes64esm_cg_cmp_rd_rs1_b25, Zkne_aes64esm_cg_cmp_rd_rs1_b25_str) + 80005a90: 0008b203 ld x4,0(x17) + 80005a94: 01920c63 beq x4,x25,80005aac + 80005a98: 668052ef jal x5,8000b100 + 80005a9c: 80005a8c .word 0x80005a8c + 80005aa0: 00000000 .word 0x00000000 + 80005aa4: 8001c8d8 .word 0x8001c8d8 + 80005aa8: 00000000 .word 0x00000000 + 80005aac: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x659a7fd454d7a39d + 80005ab0: 00033d03 ld x26,0(x6) + 80005ab4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xe329f012c0f93530 + 80005ab8: 00033d83 ld x27,0(x6) + 80005abc: 00830313 addi x6,x6,8 + +0000000080005ac0 : +Zkne_aes64esm_cg_cmp_rd_rs1_b26: + aes64esm x26, x26, x27 # perform operation + 80005ac0: 37bd0d33 aes64esm x26,x26,x27 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zkne_aes64esm_cg_cmp_rd_rs1_b26, Zkne_aes64esm_cg_cmp_rd_rs1_b26_str) + 80005ac4: 0008b203 ld x4,0(x17) + 80005ac8: 01a20c63 beq x4,x26,80005ae0 + 80005acc: 634052ef jal x5,8000b100 + 80005ad0: 80005ac0 .word 0x80005ac0 + 80005ad4: 00000000 .word 0x00000000 + 80005ad8: 8001c914 .word 0x8001c914 + 80005adc: 00000000 .word 0x00000000 + 80005ae0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x1875a3a06cac6cba + 80005ae4: 00033d83 ld x27,0(x6) + 80005ae8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x753ab289d2d85308 + 80005aec: 00033383 ld x7,0(x6) + 80005af0: 00830313 addi x6,x6,8 + +0000000080005af4 : +Zkne_aes64esm_cg_cmp_rd_rs1_b27: + aes64esm x27, x27, x7 # perform operation + 80005af4: 367d8db3 aes64esm x27,x27,x7 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zkne_aes64esm_cg_cmp_rd_rs1_b27, Zkne_aes64esm_cg_cmp_rd_rs1_b27_str) + 80005af8: 0008b203 ld x4,0(x17) + 80005afc: 01b20c63 beq x4,x27,80005b14 + 80005b00: 600052ef jal x5,8000b100 + 80005b04: 80005af4 .word 0x80005af4 + 80005b08: 00000000 .word 0x00000000 + 80005b0c: 8001c950 .word 0x8001c950 + 80005b10: 00000000 .word 0x00000000 + 80005b14: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x3d194a61e15ff7cb + 80005b18: 00033e03 ld x28,0(x6) + 80005b1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x9ae4c4b06179545f + 80005b20: 00033003 ld x0,0(x6) + 80005b24: 00830313 addi x6,x6,8 + +0000000080005b28 : +Zkne_aes64esm_cg_cmp_rd_rs1_b28: + aes64esm x28, x28, x0 # perform operation + 80005b28: 360e0e33 aes64esm x28,x28,x0 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes64esm_cg_cmp_rd_rs1_b28, Zkne_aes64esm_cg_cmp_rd_rs1_b28_str) + 80005b2c: 0008b203 ld x4,0(x17) + 80005b30: 01c20c63 beq x4,x28,80005b48 + 80005b34: 5cc052ef jal x5,8000b100 + 80005b38: 80005b28 .word 0x80005b28 + 80005b3c: 00000000 .word 0x00000000 + 80005b40: 8001c98c .word 0x8001c98c + 80005b44: 00000000 .word 0x00000000 + 80005b48: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x62afb4fdb87395c9 + 80005b4c: 00033e83 ld x29,0(x6) + 80005b50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x130843b61ef1ea19 + 80005b54: 00033083 ld x1,0(x6) + 80005b58: 00830313 addi x6,x6,8 + +0000000080005b5c : +Zkne_aes64esm_cg_cmp_rd_rs1_b29: + aes64esm x29, x29, x1 # perform operation + 80005b5c: 361e8eb3 aes64esm x29,x29,x1 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zkne_aes64esm_cg_cmp_rd_rs1_b29, Zkne_aes64esm_cg_cmp_rd_rs1_b29_str) + 80005b60: 0008b203 ld x4,0(x17) + 80005b64: 01d20c63 beq x4,x29,80005b7c + 80005b68: 598052ef jal x5,8000b100 + 80005b6c: 80005b5c .word 0x80005b5c + 80005b70: 00000000 .word 0x00000000 + 80005b74: 8001c9c8 .word 0x8001c9c8 + 80005b78: 00000000 .word 0x00000000 + 80005b7c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x9e577407b8920417 + 80005b80: 00033f03 ld x30,0(x6) + 80005b84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x6bdaba1a9d5a2a69 + 80005b88: 00033603 ld x12,0(x6) + 80005b8c: 00830313 addi x6,x6,8 + +0000000080005b90 : +Zkne_aes64esm_cg_cmp_rd_rs1_b30: + aes64esm x30, x30, x12 # perform operation + 80005b90: 36cf0f33 aes64esm x30,x30,x12 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zkne_aes64esm_cg_cmp_rd_rs1_b30, Zkne_aes64esm_cg_cmp_rd_rs1_b30_str) + 80005b94: 0008b203 ld x4,0(x17) + 80005b98: 01e20c63 beq x4,x30,80005bb0 + 80005b9c: 564052ef jal x5,8000b100 + 80005ba0: 80005b90 .word 0x80005b90 + 80005ba4: 00000000 .word 0x00000000 + 80005ba8: 8001ca04 .word 0x8001ca04 + 80005bac: 00000000 .word 0x00000000 + 80005bb0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xaa8297a70c5053d0 + 80005bb4: 00033f83 ld x31,0(x6) + 80005bb8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x8588bff3156d1527 + 80005bbc: 00033a03 ld x20,0(x6) + 80005bc0: 00830313 addi x6,x6,8 + +0000000080005bc4 : +Zkne_aes64esm_cg_cmp_rd_rs1_b31: + aes64esm x31, x31, x20 # perform operation + 80005bc4: 374f8fb3 aes64esm x31,x31,x20 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zkne_aes64esm_cg_cmp_rd_rs1_b31, Zkne_aes64esm_cg_cmp_rd_rs1_b31_str) + 80005bc8: 0008b203 ld x4,0(x17) + 80005bcc: 01f20c63 beq x4,x31,80005be4 + 80005bd0: 530052ef jal x5,8000b100 + 80005bd4: 80005bc4 .word 0x80005bc4 + 80005bd8: 00000000 .word 0x00000000 + 80005bdc: 8001ca40 .word 0x8001ca40 + 80005be0: 00000000 .word 0x00000000 + 80005be4: 00888893 addi x17,x17,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x34c0be318a463460 + 80005be8: 00033d83 ld x27,0(x6) + 80005bec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x2f28b9922c6b94bf + 80005bf0: 00033003 ld x0,0(x6) + 80005bf4: 00830313 addi x6,x6,8 + +0000000080005bf8 : +Zkne_aes64esm_cg_cmp_rd_rs2_b0: + aes64esm x0, x27, x0 # perform operation + 80005bf8: 360d8033 aes64esm x0,x27,x0 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zkne_aes64esm_cg_cmp_rd_rs2_b0, Zkne_aes64esm_cg_cmp_rd_rs2_b0_str) + 80005bfc: 0008b203 ld x4,0(x17) + 80005c00: 00020c63 beq x4,x0,80005c18 + 80005c04: 4fc052ef jal x5,8000b100 + 80005c08: 80005bf8 .word 0x80005bf8 + 80005c0c: 00000000 .word 0x00000000 + 80005c10: 8001ca7c .word 0x8001ca7c + 80005c14: 00000000 .word 0x00000000 + 80005c18: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x441e6c7956f6b20e + 80005c1c: 00033403 ld x8,0(x6) + 80005c20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xe4b980261c158167 + 80005c24: 00033083 ld x1,0(x6) + 80005c28: 00830313 addi x6,x6,8 + +0000000080005c2c : +Zkne_aes64esm_cg_cmp_rd_rs2_b1: + aes64esm x1, x8, x1 # perform operation + 80005c2c: 361400b3 aes64esm x1,x8,x1 + # Check if x1 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x1, Zkne_aes64esm_cg_cmp_rd_rs2_b1, Zkne_aes64esm_cg_cmp_rd_rs2_b1_str) + 80005c30: 0008b203 ld x4,0(x17) + 80005c34: 00120c63 beq x4,x1,80005c4c + 80005c38: 4c8052ef jal x5,8000b100 + 80005c3c: 80005c2c .word 0x80005c2c + 80005c40: 00000000 .word 0x00000000 + 80005c44: 8001cab7 .word 0x8001cab7 + 80005c48: 00000000 .word 0x00000000 + 80005c4c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xd017e94c8cd82c66 + 80005c50: 00033403 ld x8,0(x6) + 80005c54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0x195aa9eb6d1248d2 + 80005c58: 00033103 ld x2,0(x6) + 80005c5c: 00830313 addi x6,x6,8 + +0000000080005c60 : +Zkne_aes64esm_cg_cmp_rd_rs2_b2: + aes64esm x2, x8, x2 # perform operation + 80005c60: 36240133 aes64esm x2,x8,x2 + # Check if x2 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x2, Zkne_aes64esm_cg_cmp_rd_rs2_b2, Zkne_aes64esm_cg_cmp_rd_rs2_b2_str) + 80005c64: 0008b203 ld x4,0(x17) + 80005c68: 00220c63 beq x4,x2,80005c80 + 80005c6c: 494052ef jal x5,8000b100 + 80005c70: 80005c60 .word 0x80005c60 + 80005c74: 00000000 .word 0x00000000 + 80005c78: 8001caf2 .word 0x8001caf2 + 80005c7c: 00000000 .word 0x00000000 + 80005c80: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xea1df71af4669c8f + 80005c84: 00033603 ld x12,0(x6) + 80005c88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x4ef36ffa31cf8a7d + 80005c8c: 00033183 ld x3,0(x6) + 80005c90: 00830313 addi x6,x6,8 + +0000000080005c94 : +Zkne_aes64esm_cg_cmp_rd_rs2_b3: + aes64esm x3, x12, x3 # perform operation + 80005c94: 363601b3 aes64esm x3,x12,x3 + # Check if x3 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x3, Zkne_aes64esm_cg_cmp_rd_rs2_b3, Zkne_aes64esm_cg_cmp_rd_rs2_b3_str) + 80005c98: 0008b203 ld x4,0(x17) + 80005c9c: 00320c63 beq x4,x3,80005cb4 + 80005ca0: 460052ef jal x5,8000b100 + 80005ca4: 80005c94 .word 0x80005c94 + 80005ca8: 00000000 .word 0x00000000 + 80005cac: 8001cb2d .word 0x8001cb2d + 80005cb0: 00000000 .word 0x00000000 + 80005cb4: 00888893 addi x17,x17,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005cb8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005cbc: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x27acb8bfbbc07211 + 80005cc0: 00033783 ld x15,0(x6) + 80005cc4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0x65657cba8ad593c2 + 80005cc8: 00033203 ld x4,0(x6) + 80005ccc: 00830313 addi x6,x6,8 + +0000000080005cd0 : +Zkne_aes64esm_cg_cmp_rd_rs2_b4: + aes64esm x4, x15, x4 # perform operation + 80005cd0: 36478233 aes64esm x4,x15,x4 + # Check if x4 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x4, Zkne_aes64esm_cg_cmp_rd_rs2_b4, Zkne_aes64esm_cg_cmp_rd_rs2_b4_str) + 80005cd4: 0008b683 ld x13,0(x17) + 80005cd8: 00468c63 beq x13,x4,80005cf0 + 80005cdc: 4640576f jal x14,8000b140 + 80005ce0: 80005cd0 .word 0x80005cd0 + 80005ce4: 00000000 .word 0x00000000 + 80005ce8: 8001cb68 .word 0x8001cb68 + 80005cec: 00000000 .word 0x00000000 + 80005cf0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x3d3e6daf24248363 + 80005cf4: 00033983 ld x19,0(x6) + 80005cf8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x21c7304766db406f + 80005cfc: 00033283 ld x5,0(x6) + 80005d00: 00830313 addi x6,x6,8 + +0000000080005d04 : +Zkne_aes64esm_cg_cmp_rd_rs2_b5: + aes64esm x5, x19, x5 # perform operation + 80005d04: 365982b3 aes64esm x5,x19,x5 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zkne_aes64esm_cg_cmp_rd_rs2_b5, Zkne_aes64esm_cg_cmp_rd_rs2_b5_str) + 80005d08: 0008b683 ld x13,0(x17) + 80005d0c: 00568c63 beq x13,x5,80005d24 + 80005d10: 4300576f jal x14,8000b140 + 80005d14: 80005d04 .word 0x80005d04 + 80005d18: 00000000 .word 0x00000000 + 80005d1c: 8001cba3 .word 0x8001cba3 + 80005d20: 00000000 .word 0x00000000 + 80005d24: 00888893 addi x17,x17,8 + + mv x21, x6 # switch data pointer register to avoid conflict with test + 80005d28: 00030a93 addi x21,x6,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xbe6d1612ba40c535 + 80005d2c: 000ab283 ld x5,0(x21) + 80005d30: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xee4df9766099a7df + 80005d34: 000ab303 ld x6,0(x21) + 80005d38: 008a8a93 addi x21,x21,8 + +0000000080005d3c : +Zkne_aes64esm_cg_cmp_rd_rs2_b6: + aes64esm x6, x5, x6 # perform operation + 80005d3c: 36628333 aes64esm x6,x5,x6 + # Check if x6 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x6, Zkne_aes64esm_cg_cmp_rd_rs2_b6, Zkne_aes64esm_cg_cmp_rd_rs2_b6_str) + 80005d40: 0008b683 ld x13,0(x17) + 80005d44: 00668c63 beq x13,x6,80005d5c + 80005d48: 3f80576f jal x14,8000b140 + 80005d4c: 80005d3c .word 0x80005d3c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 8001cbde .word 0x8001cbde + 80005d58: 00000000 .word 0x00000000 + 80005d5c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x78faf854ba390523 + 80005d60: 000ab483 ld x9,0(x21) + 80005d64: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x46a4df281db83a5f + 80005d68: 000ab383 ld x7,0(x21) + 80005d6c: 008a8a93 addi x21,x21,8 + +0000000080005d70 : +Zkne_aes64esm_cg_cmp_rd_rs2_b7: + aes64esm x7, x9, x7 # perform operation + 80005d70: 367483b3 aes64esm x7,x9,x7 + # Check if x7 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x7, Zkne_aes64esm_cg_cmp_rd_rs2_b7, Zkne_aes64esm_cg_cmp_rd_rs2_b7_str) + 80005d74: 0008b683 ld x13,0(x17) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 3c40576f jal x14,8000b140 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 8001cc19 .word 0x8001cc19 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x050b6841284b1165 + 80005d94: 000ab903 ld x18,0(x21) + 80005d98: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs2: x8 = 0x24fa0091b071a7df + 80005d9c: 000ab403 ld x8,0(x21) + 80005da0: 008a8a93 addi x21,x21,8 + +0000000080005da4 : +Zkne_aes64esm_cg_cmp_rd_rs2_b8: + aes64esm x8, x18, x8 # perform operation + 80005da4: 36890433 aes64esm x8,x18,x8 + # Check if x8 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x8, Zkne_aes64esm_cg_cmp_rd_rs2_b8, Zkne_aes64esm_cg_cmp_rd_rs2_b8_str) + 80005da8: 0008b683 ld x13,0(x17) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 3900576f jal x14,8000b140 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 8001cc54 .word 0x8001cc54 + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0xf9616274011c10af + 80005dc8: 000ab083 ld x1,0(x21) + 80005dcc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0xfa22d5f8cb89b88d + 80005dd0: 000ab483 ld x9,0(x21) + 80005dd4: 008a8a93 addi x21,x21,8 + +0000000080005dd8 : +Zkne_aes64esm_cg_cmp_rd_rs2_b9: + aes64esm x9, x1, x9 # perform operation + 80005dd8: 369084b3 aes64esm x9,x1,x9 + # Check if x9 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x9, Zkne_aes64esm_cg_cmp_rd_rs2_b9, Zkne_aes64esm_cg_cmp_rd_rs2_b9_str) + 80005ddc: 0008b683 ld x13,0(x17) + 80005de0: 00968c63 beq x13,x9,80005df8 + 80005de4: 35c0576f jal x14,8000b140 + 80005de8: 80005dd8 .word 0x80005dd8 + 80005dec: 00000000 .word 0x00000000 + 80005df0: 8001cc8f .word 0x8001cc8f + 80005df4: 00000000 .word 0x00000000 + 80005df8: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0x2f4f9f07f08b3c0e + 80005dfc: 000ab483 ld x9,0(x21) + 80005e00: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0x71a98f50bfac4db0 + 80005e04: 000ab503 ld x10,0(x21) + 80005e08: 008a8a93 addi x21,x21,8 + +0000000080005e0c : +Zkne_aes64esm_cg_cmp_rd_rs2_b10: + aes64esm x10, x9, x10 # perform operation + 80005e0c: 36a48533 aes64esm x10,x9,x10 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zkne_aes64esm_cg_cmp_rd_rs2_b10, Zkne_aes64esm_cg_cmp_rd_rs2_b10_str) + 80005e10: 0008b683 ld x13,0(x17) + 80005e14: 00a68c63 beq x13,x10,80005e2c + 80005e18: 3280576f jal x14,8000b140 + 80005e1c: 80005e0c .word 0x80005e0c + 80005e20: 00000000 .word 0x00000000 + 80005e24: 8001ccca .word 0x8001ccca + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xa95f19aefb4030a8 + 80005e30: 000abc83 ld x25,0(x21) + 80005e34: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs2: x11 = 0x3399e058b9f05746 + 80005e38: 000ab583 ld x11,0(x21) + 80005e3c: 008a8a93 addi x21,x21,8 + +0000000080005e40 : +Zkne_aes64esm_cg_cmp_rd_rs2_b11: + aes64esm x11, x25, x11 # perform operation + 80005e40: 36bc85b3 aes64esm x11,x25,x11 + # Check if x11 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x11, Zkne_aes64esm_cg_cmp_rd_rs2_b11, Zkne_aes64esm_cg_cmp_rd_rs2_b11_str) + 80005e44: 0008b683 ld x13,0(x17) + 80005e48: 00b68c63 beq x13,x11,80005e60 + 80005e4c: 2f40576f jal x14,8000b140 + 80005e50: 80005e40 .word 0x80005e40 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 8001cd06 .word 0x8001cd06 + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x34dc1e05feb635ea + 80005e64: 000ab783 ld x15,0(x21) + 80005e68: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs2: x12 = 0xc2a3b8f14a637f68 + 80005e6c: 000ab603 ld x12,0(x21) + 80005e70: 008a8a93 addi x21,x21,8 + +0000000080005e74 : +Zkne_aes64esm_cg_cmp_rd_rs2_b12: + aes64esm x12, x15, x12 # perform operation + 80005e74: 36c78633 aes64esm x12,x15,x12 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zkne_aes64esm_cg_cmp_rd_rs2_b12, Zkne_aes64esm_cg_cmp_rd_rs2_b12_str) + 80005e78: 0008b683 ld x13,0(x17) + 80005e7c: 00c68c63 beq x13,x12,80005e94 + 80005e80: 2c00576f jal x14,8000b140 + 80005e84: 80005e74 .word 0x80005e74 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 8001cd42 .word 0x8001cd42 + 80005e90: 00000000 .word 0x00000000 + 80005e94: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e98: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e9c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xb1efb2ec506f9fac + 80005ea0: 000ab303 ld x6,0(x21) + 80005ea4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs2: x13 = 0x8c1e423877fa1ea7 + 80005ea8: 000ab683 ld x13,0(x21) + 80005eac: 008a8a93 addi x21,x21,8 + +0000000080005eb0 : +Zkne_aes64esm_cg_cmp_rd_rs2_b13: + aes64esm x13, x6, x13 # perform operation + 80005eb0: 36d306b3 aes64esm x13,x6,x13 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zkne_aes64esm_cg_cmp_rd_rs2_b13, Zkne_aes64esm_cg_cmp_rd_rs2_b13_str) + 80005eb4: 0008b383 ld x7,0(x17) + 80005eb8: 00d38c63 beq x7,x13,80005ed0 + 80005ebc: 25c0546f jal x8,8000b118 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 8001cd7e .word 0x8001cd7e + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x030c85fe34c5ea10 + 80005ed4: 000ab803 ld x16,0(x21) + 80005ed8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xde0ecb56a01928c7 + 80005edc: 000ab703 ld x14,0(x21) + 80005ee0: 008a8a93 addi x21,x21,8 + +0000000080005ee4 : +Zkne_aes64esm_cg_cmp_rd_rs2_b14: + aes64esm x14, x16, x14 # perform operation + 80005ee4: 36e80733 aes64esm x14,x16,x14 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zkne_aes64esm_cg_cmp_rd_rs2_b14, Zkne_aes64esm_cg_cmp_rd_rs2_b14_str) + 80005ee8: 0008b383 ld x7,0(x17) + 80005eec: 00e38c63 beq x7,x14,80005f04 + 80005ef0: 2280546f jal x8,8000b118 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 8001cdba .word 0x8001cdba + 80005f00: 00000000 .word 0x00000000 + 80005f04: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0x45488fd29e4dda6a + 80005f08: 000ab583 ld x11,0(x21) + 80005f0c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0xc4e6520733df4b22 + 80005f10: 000ab783 ld x15,0(x21) + 80005f14: 008a8a93 addi x21,x21,8 + +0000000080005f18 : +Zkne_aes64esm_cg_cmp_rd_rs2_b15: + aes64esm x15, x11, x15 # perform operation + 80005f18: 36f587b3 aes64esm x15,x11,x15 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zkne_aes64esm_cg_cmp_rd_rs2_b15, Zkne_aes64esm_cg_cmp_rd_rs2_b15_str) + 80005f1c: 0008b383 ld x7,0(x17) + 80005f20: 00f38c63 beq x7,x15,80005f38 + 80005f24: 1f40546f jal x8,8000b118 + 80005f28: 80005f18 .word 0x80005f18 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 8001cdf6 .word 0x8001cdf6 + 80005f34: 00000000 .word 0x00000000 + 80005f38: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x30a62faa633f1445 + 80005f3c: 000abb03 ld x22,0(x21) + 80005f40: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs2: x16 = 0xbd277170f69ee018 + 80005f44: 000ab803 ld x16,0(x21) + 80005f48: 008a8a93 addi x21,x21,8 + +0000000080005f4c : +Zkne_aes64esm_cg_cmp_rd_rs2_b16: + aes64esm x16, x22, x16 # perform operation + 80005f4c: 370b0833 aes64esm x16,x22,x16 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zkne_aes64esm_cg_cmp_rd_rs2_b16, Zkne_aes64esm_cg_cmp_rd_rs2_b16_str) + 80005f50: 0008b383 ld x7,0(x17) + 80005f54: 01038c63 beq x7,x16,80005f6c + 80005f58: 1c00546f jal x8,8000b118 + 80005f5c: 80005f4c .word 0x80005f4c + 80005f60: 00000000 .word 0x00000000 + 80005f64: 8001ce32 .word 0x8001ce32 + 80005f68: 00000000 .word 0x00000000 + 80005f6c: 00888893 addi x17,x17,8 + + mv x3, x17 # switch signature pointer register to avoid conflict with test + 80005f70: 00088193 addi x3,x17,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xc1502847bc7226d5 + 80005f74: 000abc83 ld x25,0(x21) + 80005f78: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs2: x17 = 0x876a9b9764a0c84c + 80005f7c: 000ab883 ld x17,0(x21) + 80005f80: 008a8a93 addi x21,x21,8 + +0000000080005f84 : +Zkne_aes64esm_cg_cmp_rd_rs2_b17: + aes64esm x17, x25, x17 # perform operation + 80005f84: 371c88b3 aes64esm x17,x25,x17 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zkne_aes64esm_cg_cmp_rd_rs2_b17, Zkne_aes64esm_cg_cmp_rd_rs2_b17_str) + 80005f88: 0001b383 ld x7,0(x3) + 80005f8c: 01138c63 beq x7,x17,80005fa4 + 80005f90: 1880546f jal x8,8000b118 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 8001ce6e .word 0x8001ce6e + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0xeb856451820625e8 + 80005fa8: 000ab103 ld x2,0(x21) + 80005fac: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs2: x18 = 0x184c94cb9179a28f + 80005fb0: 000ab903 ld x18,0(x21) + 80005fb4: 008a8a93 addi x21,x21,8 + +0000000080005fb8 : +Zkne_aes64esm_cg_cmp_rd_rs2_b18: + aes64esm x18, x2, x18 # perform operation + 80005fb8: 37210933 aes64esm x18,x2,x18 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zkne_aes64esm_cg_cmp_rd_rs2_b18, Zkne_aes64esm_cg_cmp_rd_rs2_b18_str) + 80005fbc: 0001b383 ld x7,0(x3) + 80005fc0: 01238c63 beq x7,x18,80005fd8 + 80005fc4: 1540546f jal x8,8000b118 + 80005fc8: 80005fb8 .word 0x80005fb8 + 80005fcc: 00000000 .word 0x00000000 + 80005fd0: 8001ceaa .word 0x8001ceaa + 80005fd4: 00000000 .word 0x00000000 + 80005fd8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x236f4b901237fa90 + 80005fdc: 000aba03 ld x20,0(x21) + 80005fe0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs2: x19 = 0x5a0726085f3590c0 + 80005fe4: 000ab983 ld x19,0(x21) + 80005fe8: 008a8a93 addi x21,x21,8 + +0000000080005fec : +Zkne_aes64esm_cg_cmp_rd_rs2_b19: + aes64esm x19, x20, x19 # perform operation + 80005fec: 373a09b3 aes64esm x19,x20,x19 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zkne_aes64esm_cg_cmp_rd_rs2_b19, Zkne_aes64esm_cg_cmp_rd_rs2_b19_str) + 80005ff0: 0001b383 ld x7,0(x3) + 80005ff4: 01338c63 beq x7,x19,8000600c + 80005ff8: 1200546f jal x8,8000b118 + 80005ffc: 80005fec .word 0x80005fec + 80006000: 00000000 .word 0x00000000 + 80006004: 8001cee6 .word 0x8001cee6 + 80006008: 00000000 .word 0x00000000 + 8000600c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x077cb5b33b3113be + 80006010: 000ab203 ld x4,0(x21) + 80006014: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs2: x20 = 0xb093a548ce0420ea + 80006018: 000aba03 ld x20,0(x21) + 8000601c: 008a8a93 addi x21,x21,8 + +0000000080006020 : +Zkne_aes64esm_cg_cmp_rd_rs2_b20: + aes64esm x20, x4, x20 # perform operation + 80006020: 37420a33 aes64esm x20,x4,x20 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zkne_aes64esm_cg_cmp_rd_rs2_b20, Zkne_aes64esm_cg_cmp_rd_rs2_b20_str) + 80006024: 0001b383 ld x7,0(x3) + 80006028: 01438c63 beq x7,x20,80006040 + 8000602c: 0ec0546f jal x8,8000b118 + 80006030: 80006020 .word 0x80006020 + 80006034: 00000000 .word 0x00000000 + 80006038: 8001cf22 .word 0x8001cf22 + 8000603c: 00000000 .word 0x00000000 + 80006040: 00818193 addi x3,x3,8 + + mv x31, x21 # switch data pointer register to avoid conflict with test + 80006044: 000a8f93 addi x31,x21,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0xea177b45a0b6309e + 80006048: 000fb283 ld x5,0(x31) + 8000604c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs2: x21 = 0xa761d539deba5a9f + 80006050: 000fba83 ld x21,0(x31) + 80006054: 008f8f93 addi x31,x31,8 + +0000000080006058 : +Zkne_aes64esm_cg_cmp_rd_rs2_b21: + aes64esm x21, x5, x21 # perform operation + 80006058: 37528ab3 aes64esm x21,x5,x21 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zkne_aes64esm_cg_cmp_rd_rs2_b21, Zkne_aes64esm_cg_cmp_rd_rs2_b21_str) + 8000605c: 0001b383 ld x7,0(x3) + 80006060: 01538c63 beq x7,x21,80006078 + 80006064: 0b40546f jal x8,8000b118 + 80006068: 80006058 .word 0x80006058 + 8000606c: 00000000 .word 0x00000000 + 80006070: 8001cf5e .word 0x8001cf5e + 80006074: 00000000 .word 0x00000000 + 80006078: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x5a1705656eef93c3 + 8000607c: 000fbb83 ld x23,0(x31) + 80006080: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs2: x22 = 0x76a3e9b4e14cb548 + 80006084: 000fbb03 ld x22,0(x31) + 80006088: 008f8f93 addi x31,x31,8 + +000000008000608c : +Zkne_aes64esm_cg_cmp_rd_rs2_b22: + aes64esm x22, x23, x22 # perform operation + 8000608c: 376b8b33 aes64esm x22,x23,x22 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zkne_aes64esm_cg_cmp_rd_rs2_b22, Zkne_aes64esm_cg_cmp_rd_rs2_b22_str) + 80006090: 0001b383 ld x7,0(x3) + 80006094: 01638c63 beq x7,x22,800060ac + 80006098: 0800546f jal x8,8000b118 + 8000609c: 8000608c .word 0x8000608c + 800060a0: 00000000 .word 0x00000000 + 800060a4: 8001cf9a .word 0x8001cf9a + 800060a8: 00000000 .word 0x00000000 + 800060ac: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0xf6ffa8df7dd61df7 + 800060b0: 000fb303 ld x6,0(x31) + 800060b4: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs2: x23 = 0x69ac11a1db12372b + 800060b8: 000fbb83 ld x23,0(x31) + 800060bc: 008f8f93 addi x31,x31,8 + +00000000800060c0 : +Zkne_aes64esm_cg_cmp_rd_rs2_b23: + aes64esm x23, x6, x23 # perform operation + 800060c0: 37730bb3 aes64esm x23,x6,x23 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zkne_aes64esm_cg_cmp_rd_rs2_b23, Zkne_aes64esm_cg_cmp_rd_rs2_b23_str) + 800060c4: 0001b383 ld x7,0(x3) + 800060c8: 01738c63 beq x7,x23,800060e0 + 800060cc: 04c0546f jal x8,8000b118 + 800060d0: 800060c0 .word 0x800060c0 + 800060d4: 00000000 .word 0x00000000 + 800060d8: 8001cfd6 .word 0x8001cfd6 + 800060dc: 00000000 .word 0x00000000 + 800060e0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0x3ae98476be8896cf + 800060e4: 000fb703 ld x14,0(x31) + 800060e8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs2: x24 = 0x168167877e1f0601 + 800060ec: 000fbc03 ld x24,0(x31) + 800060f0: 008f8f93 addi x31,x31,8 + +00000000800060f4 : +Zkne_aes64esm_cg_cmp_rd_rs2_b24: + aes64esm x24, x14, x24 # perform operation + 800060f4: 37870c33 aes64esm x24,x14,x24 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zkne_aes64esm_cg_cmp_rd_rs2_b24, Zkne_aes64esm_cg_cmp_rd_rs2_b24_str) + 800060f8: 0001b383 ld x7,0(x3) + 800060fc: 01838c63 beq x7,x24,80006114 + 80006100: 0180546f jal x8,8000b118 + 80006104: 800060f4 .word 0x800060f4 + 80006108: 00000000 .word 0x00000000 + 8000610c: 8001d012 .word 0x8001d012 + 80006110: 00000000 .word 0x00000000 + 80006114: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0x8c0b08880b4eb5ae + 80006118: 000fb283 ld x5,0(x31) + 8000611c: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs2: x25 = 0x580fd3478723deae + 80006120: 000fbc83 ld x25,0(x31) + 80006124: 008f8f93 addi x31,x31,8 + +0000000080006128 : +Zkne_aes64esm_cg_cmp_rd_rs2_b25: + aes64esm x25, x5, x25 # perform operation + 80006128: 37928cb3 aes64esm x25,x5,x25 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zkne_aes64esm_cg_cmp_rd_rs2_b25, Zkne_aes64esm_cg_cmp_rd_rs2_b25_str) + 8000612c: 0001b383 ld x7,0(x3) + 80006130: 01938c63 beq x7,x25,80006148 + 80006134: 7e50446f jal x8,8000b118 + 80006138: 80006128 .word 0x80006128 + 8000613c: 00000000 .word 0x00000000 + 80006140: 8001d04e .word 0x8001d04e + 80006144: 00000000 .word 0x00000000 + 80006148: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xecc947c0964e823d + 8000614c: 000fbf03 ld x30,0(x31) + 80006150: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs2: x26 = 0x23207acb5e9eca78 + 80006154: 000fbd03 ld x26,0(x31) + 80006158: 008f8f93 addi x31,x31,8 + +000000008000615c : +Zkne_aes64esm_cg_cmp_rd_rs2_b26: + aes64esm x26, x30, x26 # perform operation + 8000615c: 37af0d33 aes64esm x26,x30,x26 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zkne_aes64esm_cg_cmp_rd_rs2_b26, Zkne_aes64esm_cg_cmp_rd_rs2_b26_str) + 80006160: 0001b383 ld x7,0(x3) + 80006164: 01a38c63 beq x7,x26,8000617c + 80006168: 7b10446f jal x8,8000b118 + 8000616c: 8000615c .word 0x8000615c + 80006170: 00000000 .word 0x00000000 + 80006174: 8001d08a .word 0x8001d08a + 80006178: 00000000 .word 0x00000000 + 8000617c: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xb019caf55c921f16 + 80006180: 000fb883 ld x17,0(x31) + 80006184: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs2: x27 = 0xa0f58feff2b93eb1 + 80006188: 000fbd83 ld x27,0(x31) + 8000618c: 008f8f93 addi x31,x31,8 + +0000000080006190 : +Zkne_aes64esm_cg_cmp_rd_rs2_b27: + aes64esm x27, x17, x27 # perform operation + 80006190: 37b88db3 aes64esm x27,x17,x27 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zkne_aes64esm_cg_cmp_rd_rs2_b27, Zkne_aes64esm_cg_cmp_rd_rs2_b27_str) + 80006194: 0001b383 ld x7,0(x3) + 80006198: 01b38c63 beq x7,x27,800061b0 + 8000619c: 77d0446f jal x8,8000b118 + 800061a0: 80006190 .word 0x80006190 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 8001d0c6 .word 0x8001d0c6 + 800061ac: 00000000 .word 0x00000000 + 800061b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x0e43ed20aa103b46 + 800061b4: 000fbc83 ld x25,0(x31) + 800061b8: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs2: x28 = 0x757eb1269afff236 + 800061bc: 000fbe03 ld x28,0(x31) + 800061c0: 008f8f93 addi x31,x31,8 + +00000000800061c4 : +Zkne_aes64esm_cg_cmp_rd_rs2_b28: + aes64esm x28, x25, x28 # perform operation + 800061c4: 37cc8e33 aes64esm x28,x25,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zkne_aes64esm_cg_cmp_rd_rs2_b28, Zkne_aes64esm_cg_cmp_rd_rs2_b28_str) + 800061c8: 0001b383 ld x7,0(x3) + 800061cc: 01c38c63 beq x7,x28,800061e4 + 800061d0: 7490446f jal x8,8000b118 + 800061d4: 800061c4 .word 0x800061c4 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 8001d102 .word 0x8001d102 + 800061e0: 00000000 .word 0x00000000 + 800061e4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xa5ef2547202fa048 + 800061e8: 000fba83 ld x21,0(x31) + 800061ec: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs2: x29 = 0x0090e1814179c871 + 800061f0: 000fbe83 ld x29,0(x31) + 800061f4: 008f8f93 addi x31,x31,8 + +00000000800061f8 : +Zkne_aes64esm_cg_cmp_rd_rs2_b29: + aes64esm x29, x21, x29 # perform operation + 800061f8: 37da8eb3 aes64esm x29,x21,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zkne_aes64esm_cg_cmp_rd_rs2_b29, Zkne_aes64esm_cg_cmp_rd_rs2_b29_str) + 800061fc: 0001b383 ld x7,0(x3) + 80006200: 01d38c63 beq x7,x29,80006218 + 80006204: 7150446f jal x8,8000b118 + 80006208: 800061f8 .word 0x800061f8 + 8000620c: 00000000 .word 0x00000000 + 80006210: 8001d13e .word 0x8001d13e + 80006214: 00000000 .word 0x00000000 + 80006218: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0x4b3181e2955d2109 + 8000621c: 000fb903 ld x18,0(x31) + 80006220: 008f8f93 addi x31,x31,8 + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs2: x30 = 0xcc1800b99a2d2f55 + 80006224: 000fbf03 ld x30,0(x31) + 80006228: 008f8f93 addi x31,x31,8 + +000000008000622c : +Zkne_aes64esm_cg_cmp_rd_rs2_b30: + aes64esm x30, x18, x30 # perform operation + 8000622c: 37e90f33 aes64esm x30,x18,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zkne_aes64esm_cg_cmp_rd_rs2_b30, Zkne_aes64esm_cg_cmp_rd_rs2_b30_str) + 80006230: 0001b383 ld x7,0(x3) + 80006234: 01e38c63 beq x7,x30,8000624c + 80006238: 6e10446f jal x8,8000b118 + 8000623c: 8000622c .word 0x8000622c + 80006240: 00000000 .word 0x00000000 + 80006244: 8001d17a .word 0x8001d17a + 80006248: 00000000 .word 0x00000000 + 8000624c: 00818193 addi x3,x3,8 + + mv x9, x31 # switch data pointer register to avoid conflict with test + 80006250: 000f8493 addi x9,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0a0e712f09a7ebf6 + 80006254: 0004b983 ld x19,0(x9) + 80006258: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x2e2cc3b65bb27bed + 8000625c: 0004bf83 ld x31,0(x9) + 80006260: 00848493 addi x9,x9,8 + +0000000080006264 : +Zkne_aes64esm_cg_cmp_rd_rs2_b31: + aes64esm x31, x19, x31 # perform operation + 80006264: 37f98fb3 aes64esm x31,x19,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zkne_aes64esm_cg_cmp_rd_rs2_b31, Zkne_aes64esm_cg_cmp_rd_rs2_b31_str) + 80006268: 0001b383 ld x7,0(x3) + 8000626c: 01f38c63 beq x7,x31,80006284 + 80006270: 6a90446f jal x8,8000b118 + 80006274: 80006264 .word 0x80006264 + 80006278: 00000000 .word 0x00000000 + 8000627c: 8001d1b6 .word 0x8001d1b6 + 80006280: 00000000 .word 0x00000000 + 80006284: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xec90c7ced575d25d + 80006288: 0004b003 ld x0,0(x9) + 8000628c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xff558cb3d1efb0ea + 80006290: 0004b003 ld x0,0(x9) + 80006294: 00848493 addi x9,x9,8 + +0000000080006298 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b0: + aes64esm x0, x0, x0 # perform operation + 80006298: 36000033 aes64esm x0,x0,x0 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b0, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b0_str) + 8000629c: 0001b383 ld x7,0(x3) + 800062a0: 00038c63 beq x7,x0,800062b8 + 800062a4: 6750446f jal x8,8000b118 + 800062a8: 80006298 .word 0x80006298 + 800062ac: 00000000 .word 0x00000000 + 800062b0: 8001d1f2 .word 0x8001d1f2 + 800062b4: 00000000 .word 0x00000000 + 800062b8: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xb20169e1d7af3da8 + 800062bc: 0004b083 ld x1,0(x9) + 800062c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x6b3d495bcee2a57d + 800062c4: 0004b083 ld x1,0(x9) + 800062c8: 00848493 addi x9,x9,8 + +00000000800062cc : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b1: + aes64esm x1, x1, x1 # perform operation + 800062cc: 361080b3 aes64esm x1,x1,x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b1, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b1_str) + 800062d0: 0001b383 ld x7,0(x3) + 800062d4: 00138c63 beq x7,x1,800062ec + 800062d8: 6410446f jal x8,8000b118 + 800062dc: 800062cc .word 0x800062cc + 800062e0: 00000000 .word 0x00000000 + 800062e4: 8001d231 .word 0x8001d231 + 800062e8: 00000000 .word 0x00000000 + 800062ec: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x7022550e1be5a72f + 800062f0: 0004b103 ld x2,0(x9) + 800062f4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x54573dcd6e2507a4 + 800062f8: 0004b103 ld x2,0(x9) + 800062fc: 00848493 addi x9,x9,8 + +0000000080006300 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b2: + aes64esm x2, x2, x2 # perform operation + 80006300: 36210133 aes64esm x2,x2,x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b2, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b2_str) + 80006304: 0001b383 ld x7,0(x3) + 80006308: 00238c63 beq x7,x2,80006320 + 8000630c: 60d0446f jal x8,8000b118 + 80006310: 80006300 .word 0x80006300 + 80006314: 00000000 .word 0x00000000 + 80006318: 8001d270 .word 0x8001d270 + 8000631c: 00000000 .word 0x00000000 + 80006320: 00818193 addi x3,x3,8 + + mv x2, x3 # switch signature pointer register to avoid conflict with test + 80006324: 00018113 addi x2,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x9b9ca3d9e5614887 + 80006328: 0004b183 ld x3,0(x9) + 8000632c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x2126376e927676ec + 80006330: 0004b183 ld x3,0(x9) + 80006334: 00848493 addi x9,x9,8 + +0000000080006338 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b3: + aes64esm x3, x3, x3 # perform operation + 80006338: 363181b3 aes64esm x3,x3,x3 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b3, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b3_str) + 8000633c: 00013383 ld x7,0(x2) + 80006340: 00338c63 beq x7,x3,80006358 + 80006344: 5d50446f jal x8,8000b118 + 80006348: 80006338 .word 0x80006338 + 8000634c: 00000000 .word 0x00000000 + 80006350: 8001d2af .word 0x8001d2af + 80006354: 00000000 .word 0x00000000 + 80006358: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x9b751ad4a9a90559 + 8000635c: 0004b203 ld x4,0(x9) + 80006360: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0xf5fc270dcc2736a3 + 80006364: 0004b203 ld x4,0(x9) + 80006368: 00848493 addi x9,x9,8 + +000000008000636c : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b4: + aes64esm x4, x4, x4 # perform operation + 8000636c: 36420233 aes64esm x4,x4,x4 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b4, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b4_str) + 80006370: 00013383 ld x7,0(x2) + 80006374: 00438c63 beq x7,x4,8000638c + 80006378: 5a10446f jal x8,8000b118 + 8000637c: 8000636c .word 0x8000636c + 80006380: 00000000 .word 0x00000000 + 80006384: 8001d2ee .word 0x8001d2ee + 80006388: 00000000 .word 0x00000000 + 8000638c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x3a1b0aa168c3c8a1 + 80006390: 0004b283 ld x5,0(x9) + 80006394: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x6cd99615267f5706 + 80006398: 0004b283 ld x5,0(x9) + 8000639c: 00848493 addi x9,x9,8 + +00000000800063a0 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b5: + aes64esm x5, x5, x5 # perform operation + 800063a0: 365282b3 aes64esm x5,x5,x5 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b5, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b5_str) + 800063a4: 00013383 ld x7,0(x2) + 800063a8: 00538c63 beq x7,x5,800063c0 + 800063ac: 56d0446f jal x8,8000b118 + 800063b0: 800063a0 .word 0x800063a0 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 8001d32d .word 0x8001d32d + 800063bc: 00000000 .word 0x00000000 + 800063c0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xb276d2f804bb5f8a + 800063c4: 0004b303 ld x6,0(x9) + 800063c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x5a2b0b9b10aa1768 + 800063cc: 0004b303 ld x6,0(x9) + 800063d0: 00848493 addi x9,x9,8 + +00000000800063d4 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b6: + aes64esm x6, x6, x6 # perform operation + 800063d4: 36630333 aes64esm x6,x6,x6 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b6, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b6_str) + 800063d8: 00013383 ld x7,0(x2) + 800063dc: 00638c63 beq x7,x6,800063f4 + 800063e0: 5390446f jal x8,8000b118 + 800063e4: 800063d4 .word 0x800063d4 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 8001d36c .word 0x8001d36c + 800063f0: 00000000 .word 0x00000000 + 800063f4: 00810113 addi x2,x2,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800063f8: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800063fc: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x10803b16215c6ed7 + 80006400: 0004b383 ld x7,0(x9) + 80006404: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x886e67eb999f55ad + 80006408: 0004b383 ld x7,0(x9) + 8000640c: 00848493 addi x9,x9,8 + +0000000080006410 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b7: + aes64esm x7, x7, x7 # perform operation + 80006410: 367383b3 aes64esm x7,x7,x7 + # Check if x7 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x7, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b7, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b7_str) + 80006414: 00013683 ld x13,0(x2) + 80006418: 00768c63 beq x13,x7,80006430 + 8000641c: 5250476f jal x14,8000b140 + 80006420: 80006410 .word 0x80006410 + 80006424: 00000000 .word 0x00000000 + 80006428: 8001d3ab .word 0x8001d3ab + 8000642c: 00000000 .word 0x00000000 + 80006430: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x16cad24c98bb12ed + 80006434: 0004b403 ld x8,0(x9) + 80006438: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xb7762bea55cceda8 + 8000643c: 0004b403 ld x8,0(x9) + 80006440: 00848493 addi x9,x9,8 + +0000000080006444 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b8: + aes64esm x8, x8, x8 # perform operation + 80006444: 36840433 aes64esm x8,x8,x8 + # Check if x8 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x8, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b8, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b8_str) + 80006448: 00013683 ld x13,0(x2) + 8000644c: 00868c63 beq x13,x8,80006464 + 80006450: 4f10476f jal x14,8000b140 + 80006454: 80006444 .word 0x80006444 + 80006458: 00000000 .word 0x00000000 + 8000645c: 8001d3ea .word 0x8001d3ea + 80006460: 00000000 .word 0x00000000 + 80006464: 00810113 addi x2,x2,8 + + mv x26, x9 # switch data pointer register to avoid conflict with test + 80006468: 00048d13 addi x26,x9,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs1: x9 = 0x5160ccb3d6ec1f7f + 8000646c: 000d3483 ld x9,0(x26) + 80006470: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x9) # load rs2: x9 = 0xdd025ead20cac5f7 + 80006474: 000d3483 ld x9,0(x26) + 80006478: 008d0d13 addi x26,x26,8 + +000000008000647c : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b9: + aes64esm x9, x9, x9 # perform operation + 8000647c: 369484b3 aes64esm x9,x9,x9 + # Check if x9 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x9, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b9, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b9_str) + 80006480: 00013683 ld x13,0(x2) + 80006484: 00968c63 beq x13,x9,8000649c + 80006488: 4b90476f jal x14,8000b140 + 8000648c: 8000647c .word 0x8000647c + 80006490: 00000000 .word 0x00000000 + 80006494: 8001d429 .word 0x8001d429 + 80006498: 00000000 .word 0x00000000 + 8000649c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs1: x10 = 0x50b6ee4605fefb59 + 800064a0: 000d3503 ld x10,0(x26) + 800064a4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x10) # load rs2: x10 = 0x3131a02b6803b0df + 800064a8: 000d3503 ld x10,0(x26) + 800064ac: 008d0d13 addi x26,x26,8 + +00000000800064b0 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b10: + aes64esm x10, x10, x10 # perform operation + 800064b0: 36a50533 aes64esm x10,x10,x10 + # Check if x10 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x10, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b10, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b10_str) + 800064b4: 00013683 ld x13,0(x2) + 800064b8: 00a68c63 beq x13,x10,800064d0 + 800064bc: 4850476f jal x14,8000b140 + 800064c0: 800064b0 .word 0x800064b0 + 800064c4: 00000000 .word 0x00000000 + 800064c8: 8001d468 .word 0x8001d468 + 800064cc: 00000000 .word 0x00000000 + 800064d0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs1: x11 = 0x6e85510d2b7e4803 + 800064d4: 000d3583 ld x11,0(x26) + 800064d8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x11) # load rs2: x11 = 0xb9f706dba7925184 + 800064dc: 000d3583 ld x11,0(x26) + 800064e0: 008d0d13 addi x26,x26,8 + +00000000800064e4 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b11: + aes64esm x11, x11, x11 # perform operation + 800064e4: 36b585b3 aes64esm x11,x11,x11 + # Check if x11 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x11, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b11, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b11_str) + 800064e8: 00013683 ld x13,0(x2) + 800064ec: 00b68c63 beq x13,x11,80006504 + 800064f0: 4510476f jal x14,8000b140 + 800064f4: 800064e4 .word 0x800064e4 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 8001d4a8 .word 0x8001d4a8 + 80006500: 00000000 .word 0x00000000 + 80006504: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs1: x12 = 0x98efd5256a75880c + 80006508: 000d3603 ld x12,0(x26) + 8000650c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x12) # load rs2: x12 = 0xac7b9bb613c0f74d + 80006510: 000d3603 ld x12,0(x26) + 80006514: 008d0d13 addi x26,x26,8 + +0000000080006518 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b12: + aes64esm x12, x12, x12 # perform operation + 80006518: 36c60633 aes64esm x12,x12,x12 + # Check if x12 contains the expected result. x2 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x2, x14, x13, x12, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b12, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b12_str) + 8000651c: 00013683 ld x13,0(x2) + 80006520: 00c68c63 beq x13,x12,80006538 + 80006524: 41d0476f jal x14,8000b140 + 80006528: 80006518 .word 0x80006518 + 8000652c: 00000000 .word 0x00000000 + 80006530: 8001d4e8 .word 0x8001d4e8 + 80006534: 00000000 .word 0x00000000 + 80006538: 00810113 addi x2,x2,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000653c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006540: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs1: x13 = 0xe62b7cc7d1e14a0e + 80006544: 000d3683 ld x13,0(x26) + 80006548: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x13) # load rs2: x13 = 0x08966d291872fbf1 + 8000654c: 000d3683 ld x13,0(x26) + 80006550: 008d0d13 addi x26,x26,8 + +0000000080006554 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b13: + aes64esm x13, x13, x13 # perform operation + 80006554: 36d686b3 aes64esm x13,x13,x13 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b13, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b13_str) + 80006558: 00013383 ld x7,0(x2) + 8000655c: 00d38c63 beq x7,x13,80006574 + 80006560: 3b90446f jal x8,8000b118 + 80006564: 80006554 .word 0x80006554 + 80006568: 00000000 .word 0x00000000 + 8000656c: 8001d528 .word 0x8001d528 + 80006570: 00000000 .word 0x00000000 + 80006574: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs1: x14 = 0x288f4892c3c2877f + 80006578: 000d3703 ld x14,0(x26) + 8000657c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x14) # load rs2: x14 = 0x745149321a44449e + 80006580: 000d3703 ld x14,0(x26) + 80006584: 008d0d13 addi x26,x26,8 + +0000000080006588 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b14: + aes64esm x14, x14, x14 # perform operation + 80006588: 36e70733 aes64esm x14,x14,x14 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b14, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b14_str) + 8000658c: 00013383 ld x7,0(x2) + 80006590: 00e38c63 beq x7,x14,800065a8 + 80006594: 3850446f jal x8,8000b118 + 80006598: 80006588 .word 0x80006588 + 8000659c: 00000000 .word 0x00000000 + 800065a0: 8001d568 .word 0x8001d568 + 800065a4: 00000000 .word 0x00000000 + 800065a8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs1: x15 = 0x9aba54db1f8b7e4c + 800065ac: 000d3783 ld x15,0(x26) + 800065b0: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x15) # load rs2: x15 = 0x66e63838c7ff2ff4 + 800065b4: 000d3783 ld x15,0(x26) + 800065b8: 008d0d13 addi x26,x26,8 + +00000000800065bc : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b15: + aes64esm x15, x15, x15 # perform operation + 800065bc: 36f787b3 aes64esm x15,x15,x15 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b15, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b15_str) + 800065c0: 00013383 ld x7,0(x2) + 800065c4: 00f38c63 beq x7,x15,800065dc + 800065c8: 3510446f jal x8,8000b118 + 800065cc: 800065bc .word 0x800065bc + 800065d0: 00000000 .word 0x00000000 + 800065d4: 8001d5a8 .word 0x8001d5a8 + 800065d8: 00000000 .word 0x00000000 + 800065dc: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs1: x16 = 0x69dafcd6f1678ab1 + 800065e0: 000d3803 ld x16,0(x26) + 800065e4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x16) # load rs2: x16 = 0x456ae8982920e496 + 800065e8: 000d3803 ld x16,0(x26) + 800065ec: 008d0d13 addi x26,x26,8 + +00000000800065f0 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b16: + aes64esm x16, x16, x16 # perform operation + 800065f0: 37080833 aes64esm x16,x16,x16 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b16, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b16_str) + 800065f4: 00013383 ld x7,0(x2) + 800065f8: 01038c63 beq x7,x16,80006610 + 800065fc: 31d0446f jal x8,8000b118 + 80006600: 800065f0 .word 0x800065f0 + 80006604: 00000000 .word 0x00000000 + 80006608: 8001d5e8 .word 0x8001d5e8 + 8000660c: 00000000 .word 0x00000000 + 80006610: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs1: x17 = 0x8a4151f7bf2a52ed + 80006614: 000d3883 ld x17,0(x26) + 80006618: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x17) # load rs2: x17 = 0x6a5ec8cd194dc638 + 8000661c: 000d3883 ld x17,0(x26) + 80006620: 008d0d13 addi x26,x26,8 + +0000000080006624 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b17: + aes64esm x17, x17, x17 # perform operation + 80006624: 371888b3 aes64esm x17,x17,x17 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b17, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b17_str) + 80006628: 00013383 ld x7,0(x2) + 8000662c: 01138c63 beq x7,x17,80006644 + 80006630: 2e90446f jal x8,8000b118 + 80006634: 80006624 .word 0x80006624 + 80006638: 00000000 .word 0x00000000 + 8000663c: 8001d628 .word 0x8001d628 + 80006640: 00000000 .word 0x00000000 + 80006644: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs1: x18 = 0x341662988aae90f8 + 80006648: 000d3903 ld x18,0(x26) + 8000664c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x18) # load rs2: x18 = 0x6d44b100b51bc227 + 80006650: 000d3903 ld x18,0(x26) + 80006654: 008d0d13 addi x26,x26,8 + +0000000080006658 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b18: + aes64esm x18, x18, x18 # perform operation + 80006658: 37290933 aes64esm x18,x18,x18 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b18, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b18_str) + 8000665c: 00013383 ld x7,0(x2) + 80006660: 01238c63 beq x7,x18,80006678 + 80006664: 2b50446f jal x8,8000b118 + 80006668: 80006658 .word 0x80006658 + 8000666c: 00000000 .word 0x00000000 + 80006670: 8001d668 .word 0x8001d668 + 80006674: 00000000 .word 0x00000000 + 80006678: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs1: x19 = 0x7974f2e8253e51a6 + 8000667c: 000d3983 ld x19,0(x26) + 80006680: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x19) # load rs2: x19 = 0x66a6b9b366e132e9 + 80006684: 000d3983 ld x19,0(x26) + 80006688: 008d0d13 addi x26,x26,8 + +000000008000668c : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b19: + aes64esm x19, x19, x19 # perform operation + 8000668c: 373989b3 aes64esm x19,x19,x19 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b19, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b19_str) + 80006690: 00013383 ld x7,0(x2) + 80006694: 01338c63 beq x7,x19,800066ac + 80006698: 2810446f jal x8,8000b118 + 8000669c: 8000668c .word 0x8000668c + 800066a0: 00000000 .word 0x00000000 + 800066a4: 8001d6a8 .word 0x8001d6a8 + 800066a8: 00000000 .word 0x00000000 + 800066ac: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs1: x20 = 0x45aed96fe8a88c06 + 800066b0: 000d3a03 ld x20,0(x26) + 800066b4: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x20) # load rs2: x20 = 0xa03e00b88cbb9862 + 800066b8: 000d3a03 ld x20,0(x26) + 800066bc: 008d0d13 addi x26,x26,8 + +00000000800066c0 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b20: + aes64esm x20, x20, x20 # perform operation + 800066c0: 374a0a33 aes64esm x20,x20,x20 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b20, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b20_str) + 800066c4: 00013383 ld x7,0(x2) + 800066c8: 01438c63 beq x7,x20,800066e0 + 800066cc: 24d0446f jal x8,8000b118 + 800066d0: 800066c0 .word 0x800066c0 + 800066d4: 00000000 .word 0x00000000 + 800066d8: 8001d6e8 .word 0x8001d6e8 + 800066dc: 00000000 .word 0x00000000 + 800066e0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs1: x21 = 0x610e06358d6af98d + 800066e4: 000d3a83 ld x21,0(x26) + 800066e8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x21) # load rs2: x21 = 0x9bd05f706b0af409 + 800066ec: 000d3a83 ld x21,0(x26) + 800066f0: 008d0d13 addi x26,x26,8 + +00000000800066f4 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b21: + aes64esm x21, x21, x21 # perform operation + 800066f4: 375a8ab3 aes64esm x21,x21,x21 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b21, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b21_str) + 800066f8: 00013383 ld x7,0(x2) + 800066fc: 01538c63 beq x7,x21,80006714 + 80006700: 2190446f jal x8,8000b118 + 80006704: 800066f4 .word 0x800066f4 + 80006708: 00000000 .word 0x00000000 + 8000670c: 8001d728 .word 0x8001d728 + 80006710: 00000000 .word 0x00000000 + 80006714: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs1: x22 = 0xb5c05811a23d7f8e + 80006718: 000d3b03 ld x22,0(x26) + 8000671c: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x22) # load rs2: x22 = 0x9df8063a6efcf778 + 80006720: 000d3b03 ld x22,0(x26) + 80006724: 008d0d13 addi x26,x26,8 + +0000000080006728 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b22: + aes64esm x22, x22, x22 # perform operation + 80006728: 376b0b33 aes64esm x22,x22,x22 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b22, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b22_str) + 8000672c: 00013383 ld x7,0(x2) + 80006730: 01638c63 beq x7,x22,80006748 + 80006734: 1e50446f jal x8,8000b118 + 80006738: 80006728 .word 0x80006728 + 8000673c: 00000000 .word 0x00000000 + 80006740: 8001d768 .word 0x8001d768 + 80006744: 00000000 .word 0x00000000 + 80006748: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs1: x23 = 0x41c47b798a800444 + 8000674c: 000d3b83 ld x23,0(x26) + 80006750: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x23) # load rs2: x23 = 0x14777095545e5e25 + 80006754: 000d3b83 ld x23,0(x26) + 80006758: 008d0d13 addi x26,x26,8 + +000000008000675c : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b23: + aes64esm x23, x23, x23 # perform operation + 8000675c: 377b8bb3 aes64esm x23,x23,x23 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b23, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b23_str) + 80006760: 00013383 ld x7,0(x2) + 80006764: 01738c63 beq x7,x23,8000677c + 80006768: 1b10446f jal x8,8000b118 + 8000676c: 8000675c .word 0x8000675c + 80006770: 00000000 .word 0x00000000 + 80006774: 8001d7a8 .word 0x8001d7a8 + 80006778: 00000000 .word 0x00000000 + 8000677c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs1: x24 = 0x550ea72e7239c80a + 80006780: 000d3c03 ld x24,0(x26) + 80006784: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x24) # load rs2: x24 = 0x96cd27483d2fe5d4 + 80006788: 000d3c03 ld x24,0(x26) + 8000678c: 008d0d13 addi x26,x26,8 + +0000000080006790 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b24: + aes64esm x24, x24, x24 # perform operation + 80006790: 378c0c33 aes64esm x24,x24,x24 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b24, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b24_str) + 80006794: 00013383 ld x7,0(x2) + 80006798: 01838c63 beq x7,x24,800067b0 + 8000679c: 17d0446f jal x8,8000b118 + 800067a0: 80006790 .word 0x80006790 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 8001d7e8 .word 0x8001d7e8 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs1: x25 = 0xf8ad594345b4decb + 800067b4: 000d3c83 ld x25,0(x26) + 800067b8: 008d0d13 addi x26,x26,8 + RVTEST_TESTDATA_LOAD_INT(x26, x25) # load rs2: x25 = 0x6ce4cd3cb5d6cae3 + 800067bc: 000d3c83 ld x25,0(x26) + 800067c0: 008d0d13 addi x26,x26,8 + +00000000800067c4 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b25: + aes64esm x25, x25, x25 # perform operation + 800067c4: 379c8cb3 aes64esm x25,x25,x25 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b25, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b25_str) + 800067c8: 00013383 ld x7,0(x2) + 800067cc: 01938c63 beq x7,x25,800067e4 + 800067d0: 1490446f jal x8,8000b118 + 800067d4: 800067c4 .word 0x800067c4 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 8001d828 .word 0x8001d828 + 800067e0: 00000000 .word 0x00000000 + 800067e4: 00810113 addi x2,x2,8 + + mv x12, x26 # switch data pointer register to avoid conflict with test + 800067e8: 000d0613 addi x12,x26,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x45301ccfa5c34acb + 800067ec: 00063d03 ld x26,0(x12) + 800067f0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x1c30d09510ab9349 + 800067f4: 00063d03 ld x26,0(x12) + 800067f8: 00860613 addi x12,x12,8 + +00000000800067fc : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b26: + aes64esm x26, x26, x26 # perform operation + 800067fc: 37ad0d33 aes64esm x26,x26,x26 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b26, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b26_str) + 80006800: 00013383 ld x7,0(x2) + 80006804: 01a38c63 beq x7,x26,8000681c + 80006808: 1110446f jal x8,8000b118 + 8000680c: 800067fc .word 0x800067fc + 80006810: 00000000 .word 0x00000000 + 80006814: 8001d868 .word 0x8001d868 + 80006818: 00000000 .word 0x00000000 + 8000681c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xf3fb7559eaa02edf + 80006820: 00063d83 ld x27,0(x12) + 80006824: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xe4a8126c96d6e89d + 80006828: 00063d83 ld x27,0(x12) + 8000682c: 00860613 addi x12,x12,8 + +0000000080006830 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b27: + aes64esm x27, x27, x27 # perform operation + 80006830: 37bd8db3 aes64esm x27,x27,x27 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b27, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 00013383 ld x7,0(x2) + 80006838: 01b38c63 beq x7,x27,80006850 + 8000683c: 0dd0446f jal x8,8000b118 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 8001d8a8 .word 0x8001d8a8 + 8000684c: 00000000 .word 0x00000000 + 80006850: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xf3c03a45dcaca445 + 80006854: 00063e03 ld x28,0(x12) + 80006858: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xe66b6647fca597ed + 8000685c: 00063e03 ld x28,0(x12) + 80006860: 00860613 addi x12,x12,8 + +0000000080006864 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b28: + aes64esm x28, x28, x28 # perform operation + 80006864: 37ce0e33 aes64esm x28,x28,x28 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b28, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 00013383 ld x7,0(x2) + 8000686c: 01c38c63 beq x7,x28,80006884 + 80006870: 0a90446f jal x8,8000b118 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 8001d8e8 .word 0x8001d8e8 + 80006880: 00000000 .word 0x00000000 + 80006884: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x96213ac026f84d71 + 80006888: 00063e83 ld x29,0(x12) + 8000688c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x1fe9ef79f0b04307 + 80006890: 00063e83 ld x29,0(x12) + 80006894: 00860613 addi x12,x12,8 + +0000000080006898 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b29: + aes64esm x29, x29, x29 # perform operation + 80006898: 37de8eb3 aes64esm x29,x29,x29 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b29, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 00013383 ld x7,0(x2) + 800068a0: 01d38c63 beq x7,x29,800068b8 + 800068a4: 0750446f jal x8,8000b118 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 8001d928 .word 0x8001d928 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xbd6e3b15e3c5a9d6 + 800068bc: 00063f03 ld x30,0(x12) + 800068c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x843e08367b5febfa + 800068c4: 00063f03 ld x30,0(x12) + 800068c8: 00860613 addi x12,x12,8 + +00000000800068cc : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b30: + aes64esm x30, x30, x30 # perform operation + 800068cc: 37ef0f33 aes64esm x30,x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b30, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b30_str) + 800068d0: 00013383 ld x7,0(x2) + 800068d4: 01e38c63 beq x7,x30,800068ec + 800068d8: 0410446f jal x8,8000b118 + 800068dc: 800068cc .word 0x800068cc + 800068e0: 00000000 .word 0x00000000 + 800068e4: 8001d968 .word 0x8001d968 + 800068e8: 00000000 .word 0x00000000 + 800068ec: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xb4d256946e53750c + 800068f0: 00063f83 ld x31,0(x12) + 800068f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x2e93ab13a09f4367 + 800068f8: 00063f83 ld x31,0(x12) + 800068fc: 00860613 addi x12,x12,8 + +0000000080006900 : +Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b31: + aes64esm x31, x31, x31 # perform operation + 80006900: 37ff8fb3 aes64esm x31,x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b31, Zkne_aes64esm_cg_cmp_rd_rs1_rs2_b31_str) + 80006904: 00013383 ld x7,0(x2) + 80006908: 01f38c63 beq x7,x31,80006920 + 8000690c: 00d0446f jal x8,8000b118 + 80006910: 80006900 .word 0x80006900 + 80006914: 00000000 .word 0x00000000 + 80006918: 8001d9a8 .word 0x8001d9a8 + 8000691c: 00000000 .word 0x00000000 + 80006920: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x0000000000000000 + 80006924: 00063183 ld x3,0(x12) + 80006928: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x0000000000000000 + 8000692c: 00063583 ld x11,0(x12) + 80006930: 00860613 addi x12,x12,8 + +0000000080006934 : +Zkne_aes64esm_cg_cp_sbox_b0: + aes64esm x17, x3, x11 # perform operation + 80006934: 36b188b3 aes64esm x17,x3,x11 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b0, Zkne_aes64esm_cg_cp_sbox_b0_str) + 80006938: 00013383 ld x7,0(x2) + 8000693c: 01138c63 beq x7,x17,80006954 + 80006940: 7d80446f jal x8,8000b118 + 80006944: 80006934 .word 0x80006934 + 80006948: 00000000 .word 0x00000000 + 8000694c: 8001d9e8 .word 0x8001d9e8 + 80006950: 00000000 .word 0x00000000 + 80006954: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x0101010101010101 + 80006958: 00063503 ld x10,0(x12) + 8000695c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x0101010101010101 + 80006960: 00063183 ld x3,0(x12) + 80006964: 00860613 addi x12,x12,8 + +0000000080006968 : +Zkne_aes64esm_cg_cp_sbox_b1: + aes64esm x14, x10, x3 # perform operation + 80006968: 36350733 aes64esm x14,x10,x3 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b1, Zkne_aes64esm_cg_cp_sbox_b1_str) + 8000696c: 00013383 ld x7,0(x2) + 80006970: 00e38c63 beq x7,x14,80006988 + 80006974: 7a40446f jal x8,8000b118 + 80006978: 80006968 .word 0x80006968 + 8000697c: 00000000 .word 0x00000000 + 80006980: 8001da20 .word 0x8001da20 + 80006984: 00000000 .word 0x00000000 + 80006988: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x0202020202020202 + 8000698c: 00063983 ld x19,0(x12) + 80006990: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x0202020202020202 + 80006994: 00063583 ld x11,0(x12) + 80006998: 00860613 addi x12,x12,8 + +000000008000699c : +Zkne_aes64esm_cg_cp_sbox_b2: + aes64esm x9, x19, x11 # perform operation + 8000699c: 36b984b3 aes64esm x9,x19,x11 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b2, Zkne_aes64esm_cg_cp_sbox_b2_str) + 800069a0: 00013383 ld x7,0(x2) + 800069a4: 00938c63 beq x7,x9,800069bc + 800069a8: 7700446f jal x8,8000b118 + 800069ac: 8000699c .word 0x8000699c + 800069b0: 00000000 .word 0x00000000 + 800069b4: 8001da58 .word 0x8001da58 + 800069b8: 00000000 .word 0x00000000 + 800069bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x0303030303030303 + 800069c0: 00063083 ld x1,0(x12) + 800069c4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x0303030303030303 + 800069c8: 00063983 ld x19,0(x12) + 800069cc: 00860613 addi x12,x12,8 + +00000000800069d0 : +Zkne_aes64esm_cg_cp_sbox_b3: + aes64esm x21, x1, x19 # perform operation + 800069d0: 37308ab3 aes64esm x21,x1,x19 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b3, Zkne_aes64esm_cg_cp_sbox_b3_str) + 800069d4: 00013383 ld x7,0(x2) + 800069d8: 01538c63 beq x7,x21,800069f0 + 800069dc: 73c0446f jal x8,8000b118 + 800069e0: 800069d0 .word 0x800069d0 + 800069e4: 00000000 .word 0x00000000 + 800069e8: 8001da90 .word 0x8001da90 + 800069ec: 00000000 .word 0x00000000 + 800069f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x0404040404040404 + 800069f4: 00063883 ld x17,0(x12) + 800069f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x0404040404040404 + 800069fc: 00063683 ld x13,0(x12) + 80006a00: 00860613 addi x12,x12,8 + +0000000080006a04 : +Zkne_aes64esm_cg_cp_sbox_b4: + aes64esm x16, x17, x13 # perform operation + 80006a04: 36d88833 aes64esm x16,x17,x13 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b4, Zkne_aes64esm_cg_cp_sbox_b4_str) + 80006a08: 00013383 ld x7,0(x2) + 80006a0c: 01038c63 beq x7,x16,80006a24 + 80006a10: 7080446f jal x8,8000b118 + 80006a14: 80006a04 .word 0x80006a04 + 80006a18: 00000000 .word 0x00000000 + 80006a1c: 8001dac8 .word 0x8001dac8 + 80006a20: 00000000 .word 0x00000000 + 80006a24: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x0505050505050505 + 80006a28: 00063703 ld x14,0(x12) + 80006a2c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x0505050505050505 + 80006a30: 00063483 ld x9,0(x12) + 80006a34: 00860613 addi x12,x12,8 + +0000000080006a38 : +Zkne_aes64esm_cg_cp_sbox_b5: + aes64esm x13, x14, x9 # perform operation + 80006a38: 369706b3 aes64esm x13,x14,x9 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b5, Zkne_aes64esm_cg_cp_sbox_b5_str) + 80006a3c: 00013383 ld x7,0(x2) + 80006a40: 00d38c63 beq x7,x13,80006a58 + 80006a44: 6d40446f jal x8,8000b118 + 80006a48: 80006a38 .word 0x80006a38 + 80006a4c: 00000000 .word 0x00000000 + 80006a50: 8001db00 .word 0x8001db00 + 80006a54: 00000000 .word 0x00000000 + 80006a58: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x0606060606060606 + 80006a5c: 00063e83 ld x29,0(x12) + 80006a60: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x0606060606060606 + 80006a64: 00063983 ld x19,0(x12) + 80006a68: 00860613 addi x12,x12,8 + +0000000080006a6c : +Zkne_aes64esm_cg_cp_sbox_b6: + aes64esm x15, x29, x19 # perform operation + 80006a6c: 373e87b3 aes64esm x15,x29,x19 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b6, Zkne_aes64esm_cg_cp_sbox_b6_str) + 80006a70: 00013383 ld x7,0(x2) + 80006a74: 00f38c63 beq x7,x15,80006a8c + 80006a78: 6a00446f jal x8,8000b118 + 80006a7c: 80006a6c .word 0x80006a6c + 80006a80: 00000000 .word 0x00000000 + 80006a84: 8001db38 .word 0x8001db38 + 80006a88: 00000000 .word 0x00000000 + 80006a8c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x0707070707070707 + 80006a90: 00063483 ld x9,0(x12) + 80006a94: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x0707070707070707 + 80006a98: 00063f83 ld x31,0(x12) + 80006a9c: 00860613 addi x12,x12,8 + +0000000080006aa0 : +Zkne_aes64esm_cg_cp_sbox_b7: + aes64esm x26, x9, x31 # perform operation + 80006aa0: 37f48d33 aes64esm x26,x9,x31 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b7, Zkne_aes64esm_cg_cp_sbox_b7_str) + 80006aa4: 00013383 ld x7,0(x2) + 80006aa8: 01a38c63 beq x7,x26,80006ac0 + 80006aac: 66c0446f jal x8,8000b118 + 80006ab0: 80006aa0 .word 0x80006aa0 + 80006ab4: 00000000 .word 0x00000000 + 80006ab8: 8001db70 .word 0x8001db70 + 80006abc: 00000000 .word 0x00000000 + 80006ac0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x0808080808080808 + 80006ac4: 00063a03 ld x20,0(x12) + 80006ac8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x0808080808080808 + 80006acc: 00063e83 ld x29,0(x12) + 80006ad0: 00860613 addi x12,x12,8 + +0000000080006ad4 : +Zkne_aes64esm_cg_cp_sbox_b8: + aes64esm x24, x20, x29 # perform operation + 80006ad4: 37da0c33 aes64esm x24,x20,x29 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b8, Zkne_aes64esm_cg_cp_sbox_b8_str) + 80006ad8: 00013383 ld x7,0(x2) + 80006adc: 01838c63 beq x7,x24,80006af4 + 80006ae0: 6380446f jal x8,8000b118 + 80006ae4: 80006ad4 .word 0x80006ad4 + 80006ae8: 00000000 .word 0x00000000 + 80006aec: 8001dba8 .word 0x8001dba8 + 80006af0: 00000000 .word 0x00000000 + 80006af4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x0909090909090909 + 80006af8: 00063083 ld x1,0(x12) + 80006afc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x0909090909090909 + 80006b00: 00063e03 ld x28,0(x12) + 80006b04: 00860613 addi x12,x12,8 + +0000000080006b08 : +Zkne_aes64esm_cg_cp_sbox_b9: + aes64esm x6, x1, x28 # perform operation + 80006b08: 37c08333 aes64esm x6,x1,x28 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b9, Zkne_aes64esm_cg_cp_sbox_b9_str) + 80006b0c: 00013383 ld x7,0(x2) + 80006b10: 00638c63 beq x7,x6,80006b28 + 80006b14: 6040446f jal x8,8000b118 + 80006b18: 80006b08 .word 0x80006b08 + 80006b1c: 00000000 .word 0x00000000 + 80006b20: 8001dbe0 .word 0x8001dbe0 + 80006b24: 00000000 .word 0x00000000 + 80006b28: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x0a0a0a0a0a0a0a0a + 80006b2c: 00063e83 ld x29,0(x12) + 80006b30: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x0a0a0a0a0a0a0a0a + 80006b34: 00063903 ld x18,0(x12) + 80006b38: 00860613 addi x12,x12,8 + +0000000080006b3c : +Zkne_aes64esm_cg_cp_sbox_b10: + aes64esm x19, x29, x18 # perform operation + 80006b3c: 372e89b3 aes64esm x19,x29,x18 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b10, Zkne_aes64esm_cg_cp_sbox_b10_str) + 80006b40: 00013383 ld x7,0(x2) + 80006b44: 01338c63 beq x7,x19,80006b5c + 80006b48: 5d00446f jal x8,8000b118 + 80006b4c: 80006b3c .word 0x80006b3c + 80006b50: 00000000 .word 0x00000000 + 80006b54: 8001dc18 .word 0x8001dc18 + 80006b58: 00000000 .word 0x00000000 + 80006b5c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x0b0b0b0b0b0b0b0b + 80006b60: 00063503 ld x10,0(x12) + 80006b64: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x0b0b0b0b0b0b0b0b + 80006b68: 00063183 ld x3,0(x12) + 80006b6c: 00860613 addi x12,x12,8 + +0000000080006b70 : +Zkne_aes64esm_cg_cp_sbox_b11: + aes64esm x20, x10, x3 # perform operation + 80006b70: 36350a33 aes64esm x20,x10,x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b11, Zkne_aes64esm_cg_cp_sbox_b11_str) + 80006b74: 00013383 ld x7,0(x2) + 80006b78: 01438c63 beq x7,x20,80006b90 + 80006b7c: 59c0446f jal x8,8000b118 + 80006b80: 80006b70 .word 0x80006b70 + 80006b84: 00000000 .word 0x00000000 + 80006b88: 8001dc51 .word 0x8001dc51 + 80006b8c: 00000000 .word 0x00000000 + 80006b90: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x0c0c0c0c0c0c0c0c + 80006b94: 00063e83 ld x29,0(x12) + 80006b98: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x0c0c0c0c0c0c0c0c + 80006b9c: 00063783 ld x15,0(x12) + 80006ba0: 00860613 addi x12,x12,8 + +0000000080006ba4 : +Zkne_aes64esm_cg_cp_sbox_b12: + aes64esm x14, x29, x15 # perform operation + 80006ba4: 36fe8733 aes64esm x14,x29,x15 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b12, Zkne_aes64esm_cg_cp_sbox_b12_str) + 80006ba8: 00013383 ld x7,0(x2) + 80006bac: 00e38c63 beq x7,x14,80006bc4 + 80006bb0: 5680446f jal x8,8000b118 + 80006bb4: 80006ba4 .word 0x80006ba4 + 80006bb8: 00000000 .word 0x00000000 + 80006bbc: 8001dc8a .word 0x8001dc8a + 80006bc0: 00000000 .word 0x00000000 + 80006bc4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x0d0d0d0d0d0d0d0d + 80006bc8: 00063d83 ld x27,0(x12) + 80006bcc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x0d0d0d0d0d0d0d0d + 80006bd0: 00063583 ld x11,0(x12) + 80006bd4: 00860613 addi x12,x12,8 + +0000000080006bd8 : +Zkne_aes64esm_cg_cp_sbox_b13: + aes64esm x25, x27, x11 # perform operation + 80006bd8: 36bd8cb3 aes64esm x25,x27,x11 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b13, Zkne_aes64esm_cg_cp_sbox_b13_str) + 80006bdc: 00013383 ld x7,0(x2) + 80006be0: 01938c63 beq x7,x25,80006bf8 + 80006be4: 5340446f jal x8,8000b118 + 80006be8: 80006bd8 .word 0x80006bd8 + 80006bec: 00000000 .word 0x00000000 + 80006bf0: 8001dcc3 .word 0x8001dcc3 + 80006bf4: 00000000 .word 0x00000000 + 80006bf8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x0e0e0e0e0e0e0e0e + 80006bfc: 00063503 ld x10,0(x12) + 80006c00: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x0e0e0e0e0e0e0e0e + 80006c04: 00063903 ld x18,0(x12) + 80006c08: 00860613 addi x12,x12,8 + +0000000080006c0c : +Zkne_aes64esm_cg_cp_sbox_b14: + aes64esm x9, x10, x18 # perform operation + 80006c0c: 372504b3 aes64esm x9,x10,x18 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b14, Zkne_aes64esm_cg_cp_sbox_b14_str) + 80006c10: 00013383 ld x7,0(x2) + 80006c14: 00938c63 beq x7,x9,80006c2c + 80006c18: 5000446f jal x8,8000b118 + 80006c1c: 80006c0c .word 0x80006c0c + 80006c20: 00000000 .word 0x00000000 + 80006c24: 8001dcfc .word 0x8001dcfc + 80006c28: 00000000 .word 0x00000000 + 80006c2c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x0f0f0f0f0f0f0f0f + 80006c30: 00063c83 ld x25,0(x12) + 80006c34: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x0f0f0f0f0f0f0f0f + 80006c38: 00063e83 ld x29,0(x12) + 80006c3c: 00860613 addi x12,x12,8 + +0000000080006c40 : +Zkne_aes64esm_cg_cp_sbox_b15: + aes64esm x1, x25, x29 # perform operation + 80006c40: 37dc80b3 aes64esm x1,x25,x29 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b15, Zkne_aes64esm_cg_cp_sbox_b15_str) + 80006c44: 00013383 ld x7,0(x2) + 80006c48: 00138c63 beq x7,x1,80006c60 + 80006c4c: 4cc0446f jal x8,8000b118 + 80006c50: 80006c40 .word 0x80006c40 + 80006c54: 00000000 .word 0x00000000 + 80006c58: 8001dd35 .word 0x8001dd35 + 80006c5c: 00000000 .word 0x00000000 + 80006c60: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x1010101010101010 + 80006c64: 00063e83 ld x29,0(x12) + 80006c68: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x1010101010101010 + 80006c6c: 00063783 ld x15,0(x12) + 80006c70: 00860613 addi x12,x12,8 + +0000000080006c74 : +Zkne_aes64esm_cg_cp_sbox_b16: + aes64esm x27, x29, x15 # perform operation + 80006c74: 36fe8db3 aes64esm x27,x29,x15 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b16, Zkne_aes64esm_cg_cp_sbox_b16_str) + 80006c78: 00013383 ld x7,0(x2) + 80006c7c: 01b38c63 beq x7,x27,80006c94 + 80006c80: 4980446f jal x8,8000b118 + 80006c84: 80006c74 .word 0x80006c74 + 80006c88: 00000000 .word 0x00000000 + 80006c8c: 8001dd6e .word 0x8001dd6e + 80006c90: 00000000 .word 0x00000000 + 80006c94: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x1111111111111111 + 80006c98: 00063b03 ld x22,0(x12) + 80006c9c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x1111111111111111 + 80006ca0: 00063a83 ld x21,0(x12) + 80006ca4: 00860613 addi x12,x12,8 + +0000000080006ca8 : +Zkne_aes64esm_cg_cp_sbox_b17: + aes64esm x11, x22, x21 # perform operation + 80006ca8: 375b05b3 aes64esm x11,x22,x21 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b17, Zkne_aes64esm_cg_cp_sbox_b17_str) + 80006cac: 00013383 ld x7,0(x2) + 80006cb0: 00b38c63 beq x7,x11,80006cc8 + 80006cb4: 4640446f jal x8,8000b118 + 80006cb8: 80006ca8 .word 0x80006ca8 + 80006cbc: 00000000 .word 0x00000000 + 80006cc0: 8001dda7 .word 0x8001dda7 + 80006cc4: 00000000 .word 0x00000000 + 80006cc8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x1212121212121212 + 80006ccc: 00063f03 ld x30,0(x12) + 80006cd0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x1212121212121212 + 80006cd4: 00063883 ld x17,0(x12) + 80006cd8: 00860613 addi x12,x12,8 + +0000000080006cdc : +Zkne_aes64esm_cg_cp_sbox_b18: + aes64esm x26, x30, x17 # perform operation + 80006cdc: 371f0d33 aes64esm x26,x30,x17 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b18, Zkne_aes64esm_cg_cp_sbox_b18_str) + 80006ce0: 00013383 ld x7,0(x2) + 80006ce4: 01a38c63 beq x7,x26,80006cfc + 80006ce8: 4300446f jal x8,8000b118 + 80006cec: 80006cdc .word 0x80006cdc + 80006cf0: 00000000 .word 0x00000000 + 80006cf4: 8001dde0 .word 0x8001dde0 + 80006cf8: 00000000 .word 0x00000000 + 80006cfc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x1313131313131313 + 80006d00: 00063203 ld x4,0(x12) + 80006d04: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x1313131313131313 + 80006d08: 00063683 ld x13,0(x12) + 80006d0c: 00860613 addi x12,x12,8 + +0000000080006d10 : +Zkne_aes64esm_cg_cp_sbox_b19: + aes64esm x30, x4, x13 # perform operation + 80006d10: 36d20f33 aes64esm x30,x4,x13 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b19, Zkne_aes64esm_cg_cp_sbox_b19_str) + 80006d14: 00013383 ld x7,0(x2) + 80006d18: 01e38c63 beq x7,x30,80006d30 + 80006d1c: 3fc0446f jal x8,8000b118 + 80006d20: 80006d10 .word 0x80006d10 + 80006d24: 00000000 .word 0x00000000 + 80006d28: 8001de19 .word 0x8001de19 + 80006d2c: 00000000 .word 0x00000000 + 80006d30: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x1414141414141414 + 80006d34: 00063a03 ld x20,0(x12) + 80006d38: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x1414141414141414 + 80006d3c: 00063183 ld x3,0(x12) + 80006d40: 00860613 addi x12,x12,8 + +0000000080006d44 : +Zkne_aes64esm_cg_cp_sbox_b20: + aes64esm x5, x20, x3 # perform operation + 80006d44: 363a02b3 aes64esm x5,x20,x3 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b20, Zkne_aes64esm_cg_cp_sbox_b20_str) + 80006d48: 00013383 ld x7,0(x2) + 80006d4c: 00538c63 beq x7,x5,80006d64 + 80006d50: 3c80446f jal x8,8000b118 + 80006d54: 80006d44 .word 0x80006d44 + 80006d58: 00000000 .word 0x00000000 + 80006d5c: 8001de52 .word 0x8001de52 + 80006d60: 00000000 .word 0x00000000 + 80006d64: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x1515151515151515 + 80006d68: 00063203 ld x4,0(x12) + 80006d6c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x1515151515151515 + 80006d70: 00063b83 ld x23,0(x12) + 80006d74: 00860613 addi x12,x12,8 + +0000000080006d78 : +Zkne_aes64esm_cg_cp_sbox_b21: + aes64esm x9, x4, x23 # perform operation + 80006d78: 377204b3 aes64esm x9,x4,x23 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b21, Zkne_aes64esm_cg_cp_sbox_b21_str) + 80006d7c: 00013383 ld x7,0(x2) + 80006d80: 00938c63 beq x7,x9,80006d98 + 80006d84: 3940446f jal x8,8000b118 + 80006d88: 80006d78 .word 0x80006d78 + 80006d8c: 00000000 .word 0x00000000 + 80006d90: 8001de8b .word 0x8001de8b + 80006d94: 00000000 .word 0x00000000 + 80006d98: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x1616161616161616 + 80006d9c: 00063d03 ld x26,0(x12) + 80006da0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x1616161616161616 + 80006da4: 00063e83 ld x29,0(x12) + 80006da8: 00860613 addi x12,x12,8 + +0000000080006dac : +Zkne_aes64esm_cg_cp_sbox_b22: + aes64esm x11, x26, x29 # perform operation + 80006dac: 37dd05b3 aes64esm x11,x26,x29 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b22, Zkne_aes64esm_cg_cp_sbox_b22_str) + 80006db0: 00013383 ld x7,0(x2) + 80006db4: 00b38c63 beq x7,x11,80006dcc + 80006db8: 3600446f jal x8,8000b118 + 80006dbc: 80006dac .word 0x80006dac + 80006dc0: 00000000 .word 0x00000000 + 80006dc4: 8001dec4 .word 0x8001dec4 + 80006dc8: 00000000 .word 0x00000000 + 80006dcc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x1717171717171717 + 80006dd0: 00063883 ld x17,0(x12) + 80006dd4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x1717171717171717 + 80006dd8: 00063183 ld x3,0(x12) + 80006ddc: 00860613 addi x12,x12,8 + +0000000080006de0 : +Zkne_aes64esm_cg_cp_sbox_b23: + aes64esm x30, x17, x3 # perform operation + 80006de0: 36388f33 aes64esm x30,x17,x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b23, Zkne_aes64esm_cg_cp_sbox_b23_str) + 80006de4: 00013383 ld x7,0(x2) + 80006de8: 01e38c63 beq x7,x30,80006e00 + 80006dec: 32c0446f jal x8,8000b118 + 80006df0: 80006de0 .word 0x80006de0 + 80006df4: 00000000 .word 0x00000000 + 80006df8: 8001defd .word 0x8001defd + 80006dfc: 00000000 .word 0x00000000 + 80006e00: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x1818181818181818 + 80006e04: 00063c83 ld x25,0(x12) + 80006e08: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x1818181818181818 + 80006e0c: 00063783 ld x15,0(x12) + 80006e10: 00860613 addi x12,x12,8 + +0000000080006e14 : +Zkne_aes64esm_cg_cp_sbox_b24: + aes64esm x21, x25, x15 # perform operation + 80006e14: 36fc8ab3 aes64esm x21,x25,x15 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b24, Zkne_aes64esm_cg_cp_sbox_b24_str) + 80006e18: 00013383 ld x7,0(x2) + 80006e1c: 01538c63 beq x7,x21,80006e34 + 80006e20: 2f80446f jal x8,8000b118 + 80006e24: 80006e14 .word 0x80006e14 + 80006e28: 00000000 .word 0x00000000 + 80006e2c: 8001df36 .word 0x8001df36 + 80006e30: 00000000 .word 0x00000000 + 80006e34: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x1919191919191919 + 80006e38: 00063983 ld x19,0(x12) + 80006e3c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x1919191919191919 + 80006e40: 00063283 ld x5,0(x12) + 80006e44: 00860613 addi x12,x12,8 + +0000000080006e48 : +Zkne_aes64esm_cg_cp_sbox_b25: + aes64esm x22, x19, x5 # perform operation + 80006e48: 36598b33 aes64esm x22,x19,x5 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b25, Zkne_aes64esm_cg_cp_sbox_b25_str) + 80006e4c: 00013383 ld x7,0(x2) + 80006e50: 01638c63 beq x7,x22,80006e68 + 80006e54: 2c40446f jal x8,8000b118 + 80006e58: 80006e48 .word 0x80006e48 + 80006e5c: 00000000 .word 0x00000000 + 80006e60: 8001df6f .word 0x8001df6f + 80006e64: 00000000 .word 0x00000000 + 80006e68: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x1a1a1a1a1a1a1a1a + 80006e6c: 00063183 ld x3,0(x12) + 80006e70: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x1a1a1a1a1a1a1a1a + 80006e74: 00063583 ld x11,0(x12) + 80006e78: 00860613 addi x12,x12,8 + +0000000080006e7c : +Zkne_aes64esm_cg_cp_sbox_b26: + aes64esm x24, x3, x11 # perform operation + 80006e7c: 36b18c33 aes64esm x24,x3,x11 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b26, Zkne_aes64esm_cg_cp_sbox_b26_str) + 80006e80: 00013383 ld x7,0(x2) + 80006e84: 01838c63 beq x7,x24,80006e9c + 80006e88: 2900446f jal x8,8000b118 + 80006e8c: 80006e7c .word 0x80006e7c + 80006e90: 00000000 .word 0x00000000 + 80006e94: 8001dfa8 .word 0x8001dfa8 + 80006e98: 00000000 .word 0x00000000 + 80006e9c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x1b1b1b1b1b1b1b1b + 80006ea0: 00063183 ld x3,0(x12) + 80006ea4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x1b1b1b1b1b1b1b1b + 80006ea8: 00063303 ld x6,0(x12) + 80006eac: 00860613 addi x12,x12,8 + +0000000080006eb0 : +Zkne_aes64esm_cg_cp_sbox_b27: + aes64esm x18, x3, x6 # perform operation + 80006eb0: 36618933 aes64esm x18,x3,x6 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b27, Zkne_aes64esm_cg_cp_sbox_b27_str) + 80006eb4: 00013383 ld x7,0(x2) + 80006eb8: 01238c63 beq x7,x18,80006ed0 + 80006ebc: 25c0446f jal x8,8000b118 + 80006ec0: 80006eb0 .word 0x80006eb0 + 80006ec4: 00000000 .word 0x00000000 + 80006ec8: 8001dfe1 .word 0x8001dfe1 + 80006ecc: 00000000 .word 0x00000000 + 80006ed0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x1c1c1c1c1c1c1c1c + 80006ed4: 00063583 ld x11,0(x12) + 80006ed8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x1c1c1c1c1c1c1c1c + 80006edc: 00063083 ld x1,0(x12) + 80006ee0: 00860613 addi x12,x12,8 + +0000000080006ee4 : +Zkne_aes64esm_cg_cp_sbox_b28: + aes64esm x4, x11, x1 # perform operation + 80006ee4: 36158233 aes64esm x4,x11,x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b28, Zkne_aes64esm_cg_cp_sbox_b28_str) + 80006ee8: 00013383 ld x7,0(x2) + 80006eec: 00438c63 beq x7,x4,80006f04 + 80006ef0: 2280446f jal x8,8000b118 + 80006ef4: 80006ee4 .word 0x80006ee4 + 80006ef8: 00000000 .word 0x00000000 + 80006efc: 8001e01a .word 0x8001e01a + 80006f00: 00000000 .word 0x00000000 + 80006f04: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x1d1d1d1d1d1d1d1d + 80006f08: 00063f03 ld x30,0(x12) + 80006f0c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x1d1d1d1d1d1d1d1d + 80006f10: 00063083 ld x1,0(x12) + 80006f14: 00860613 addi x12,x12,8 + +0000000080006f18 : +Zkne_aes64esm_cg_cp_sbox_b29: + aes64esm x10, x30, x1 # perform operation + 80006f18: 361f0533 aes64esm x10,x30,x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b29, Zkne_aes64esm_cg_cp_sbox_b29_str) + 80006f1c: 00013383 ld x7,0(x2) + 80006f20: 00a38c63 beq x7,x10,80006f38 + 80006f24: 1f40446f jal x8,8000b118 + 80006f28: 80006f18 .word 0x80006f18 + 80006f2c: 00000000 .word 0x00000000 + 80006f30: 8001e053 .word 0x8001e053 + 80006f34: 00000000 .word 0x00000000 + 80006f38: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x1e1e1e1e1e1e1e1e + 80006f3c: 00063a83 ld x21,0(x12) + 80006f40: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x1e1e1e1e1e1e1e1e + 80006f44: 00063183 ld x3,0(x12) + 80006f48: 00860613 addi x12,x12,8 + +0000000080006f4c : +Zkne_aes64esm_cg_cp_sbox_b30: + aes64esm x19, x21, x3 # perform operation + 80006f4c: 363a89b3 aes64esm x19,x21,x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b30, Zkne_aes64esm_cg_cp_sbox_b30_str) + 80006f50: 00013383 ld x7,0(x2) + 80006f54: 01338c63 beq x7,x19,80006f6c + 80006f58: 1c00446f jal x8,8000b118 + 80006f5c: 80006f4c .word 0x80006f4c + 80006f60: 00000000 .word 0x00000000 + 80006f64: 8001e08c .word 0x8001e08c + 80006f68: 00000000 .word 0x00000000 + 80006f6c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x1f1f1f1f1f1f1f1f + 80006f70: 00063503 ld x10,0(x12) + 80006f74: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x1f1f1f1f1f1f1f1f + 80006f78: 00063483 ld x9,0(x12) + 80006f7c: 00860613 addi x12,x12,8 + +0000000080006f80 : +Zkne_aes64esm_cg_cp_sbox_b31: + aes64esm x25, x10, x9 # perform operation + 80006f80: 36950cb3 aes64esm x25,x10,x9 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b31, Zkne_aes64esm_cg_cp_sbox_b31_str) + 80006f84: 00013383 ld x7,0(x2) + 80006f88: 01938c63 beq x7,x25,80006fa0 + 80006f8c: 18c0446f jal x8,8000b118 + 80006f90: 80006f80 .word 0x80006f80 + 80006f94: 00000000 .word 0x00000000 + 80006f98: 8001e0c5 .word 0x8001e0c5 + 80006f9c: 00000000 .word 0x00000000 + 80006fa0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x2020202020202020 + 80006fa4: 00063783 ld x15,0(x12) + 80006fa8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x2020202020202020 + 80006fac: 00063c83 ld x25,0(x12) + 80006fb0: 00860613 addi x12,x12,8 + +0000000080006fb4 : +Zkne_aes64esm_cg_cp_sbox_b32: + aes64esm x24, x15, x25 # perform operation + 80006fb4: 37978c33 aes64esm x24,x15,x25 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b32, Zkne_aes64esm_cg_cp_sbox_b32_str) + 80006fb8: 00013383 ld x7,0(x2) + 80006fbc: 01838c63 beq x7,x24,80006fd4 + 80006fc0: 1580446f jal x8,8000b118 + 80006fc4: 80006fb4 .word 0x80006fb4 + 80006fc8: 00000000 .word 0x00000000 + 80006fcc: 8001e0fe .word 0x8001e0fe + 80006fd0: 00000000 .word 0x00000000 + 80006fd4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x2121212121212121 + 80006fd8: 00063803 ld x16,0(x12) + 80006fdc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x2121212121212121 + 80006fe0: 00063703 ld x14,0(x12) + 80006fe4: 00860613 addi x12,x12,8 + +0000000080006fe8 : +Zkne_aes64esm_cg_cp_sbox_b33: + aes64esm x19, x16, x14 # perform operation + 80006fe8: 36e809b3 aes64esm x19,x16,x14 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b33, Zkne_aes64esm_cg_cp_sbox_b33_str) + 80006fec: 00013383 ld x7,0(x2) + 80006ff0: 01338c63 beq x7,x19,80007008 + 80006ff4: 1240446f jal x8,8000b118 + 80006ff8: 80006fe8 .word 0x80006fe8 + 80006ffc: 00000000 .word 0x00000000 + 80007000: 8001e137 .word 0x8001e137 + 80007004: 00000000 .word 0x00000000 + 80007008: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x2222222222222222 + 8000700c: 00063203 ld x4,0(x12) + 80007010: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x2222222222222222 + 80007014: 00063e03 ld x28,0(x12) + 80007018: 00860613 addi x12,x12,8 + +000000008000701c : +Zkne_aes64esm_cg_cp_sbox_b34: + aes64esm x9, x4, x28 # perform operation + 8000701c: 37c204b3 aes64esm x9,x4,x28 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b34, Zkne_aes64esm_cg_cp_sbox_b34_str) + 80007020: 00013383 ld x7,0(x2) + 80007024: 00938c63 beq x7,x9,8000703c + 80007028: 0f00446f jal x8,8000b118 + 8000702c: 8000701c .word 0x8000701c + 80007030: 00000000 .word 0x00000000 + 80007034: 8001e170 .word 0x8001e170 + 80007038: 00000000 .word 0x00000000 + 8000703c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x2323232323232323 + 80007040: 00063303 ld x6,0(x12) + 80007044: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x2323232323232323 + 80007048: 00063a83 ld x21,0(x12) + 8000704c: 00860613 addi x12,x12,8 + +0000000080007050 : +Zkne_aes64esm_cg_cp_sbox_b35: + aes64esm x26, x6, x21 # perform operation + 80007050: 37530d33 aes64esm x26,x6,x21 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b35, Zkne_aes64esm_cg_cp_sbox_b35_str) + 80007054: 00013383 ld x7,0(x2) + 80007058: 01a38c63 beq x7,x26,80007070 + 8000705c: 0bc0446f jal x8,8000b118 + 80007060: 80007050 .word 0x80007050 + 80007064: 00000000 .word 0x00000000 + 80007068: 8001e1a9 .word 0x8001e1a9 + 8000706c: 00000000 .word 0x00000000 + 80007070: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x2424242424242424 + 80007074: 00063983 ld x19,0(x12) + 80007078: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x2424242424242424 + 8000707c: 00063703 ld x14,0(x12) + 80007080: 00860613 addi x12,x12,8 + +0000000080007084 : +Zkne_aes64esm_cg_cp_sbox_b36: + aes64esm x28, x19, x14 # perform operation + 80007084: 36e98e33 aes64esm x28,x19,x14 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cp_sbox_b36, Zkne_aes64esm_cg_cp_sbox_b36_str) + 80007088: 00013383 ld x7,0(x2) + 8000708c: 01c38c63 beq x7,x28,800070a4 + 80007090: 0880446f jal x8,8000b118 + 80007094: 80007084 .word 0x80007084 + 80007098: 00000000 .word 0x00000000 + 8000709c: 8001e1e2 .word 0x8001e1e2 + 800070a0: 00000000 .word 0x00000000 + 800070a4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x2525252525252525 + 800070a8: 00063703 ld x14,0(x12) + 800070ac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x2525252525252525 + 800070b0: 00063e83 ld x29,0(x12) + 800070b4: 00860613 addi x12,x12,8 + +00000000800070b8 : +Zkne_aes64esm_cg_cp_sbox_b37: + aes64esm x15, x14, x29 # perform operation + 800070b8: 37d707b3 aes64esm x15,x14,x29 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b37, Zkne_aes64esm_cg_cp_sbox_b37_str) + 800070bc: 00013383 ld x7,0(x2) + 800070c0: 00f38c63 beq x7,x15,800070d8 + 800070c4: 0540446f jal x8,8000b118 + 800070c8: 800070b8 .word 0x800070b8 + 800070cc: 00000000 .word 0x00000000 + 800070d0: 8001e21b .word 0x8001e21b + 800070d4: 00000000 .word 0x00000000 + 800070d8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x2626262626262626 + 800070dc: 00063883 ld x17,0(x12) + 800070e0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x2626262626262626 + 800070e4: 00063703 ld x14,0(x12) + 800070e8: 00860613 addi x12,x12,8 + +00000000800070ec : +Zkne_aes64esm_cg_cp_sbox_b38: + aes64esm x24, x17, x14 # perform operation + 800070ec: 36e88c33 aes64esm x24,x17,x14 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b38, Zkne_aes64esm_cg_cp_sbox_b38_str) + 800070f0: 00013383 ld x7,0(x2) + 800070f4: 01838c63 beq x7,x24,8000710c + 800070f8: 0200446f jal x8,8000b118 + 800070fc: 800070ec .word 0x800070ec + 80007100: 00000000 .word 0x00000000 + 80007104: 8001e254 .word 0x8001e254 + 80007108: 00000000 .word 0x00000000 + 8000710c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x2727272727272727 + 80007110: 00063283 ld x5,0(x12) + 80007114: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x2727272727272727 + 80007118: 00063d03 ld x26,0(x12) + 8000711c: 00860613 addi x12,x12,8 + +0000000080007120 : +Zkne_aes64esm_cg_cp_sbox_b39: + aes64esm x1, x5, x26 # perform operation + 80007120: 37a280b3 aes64esm x1,x5,x26 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b39, Zkne_aes64esm_cg_cp_sbox_b39_str) + 80007124: 00013383 ld x7,0(x2) + 80007128: 00138c63 beq x7,x1,80007140 + 8000712c: 7ed0346f jal x8,8000b118 + 80007130: 80007120 .word 0x80007120 + 80007134: 00000000 .word 0x00000000 + 80007138: 8001e28d .word 0x8001e28d + 8000713c: 00000000 .word 0x00000000 + 80007140: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x2828282828282828 + 80007144: 00063f83 ld x31,0(x12) + 80007148: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x2828282828282828 + 8000714c: 00063703 ld x14,0(x12) + 80007150: 00860613 addi x12,x12,8 + +0000000080007154 : +Zkne_aes64esm_cg_cp_sbox_b40: + aes64esm x1, x31, x14 # perform operation + 80007154: 36ef80b3 aes64esm x1,x31,x14 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b40, Zkne_aes64esm_cg_cp_sbox_b40_str) + 80007158: 00013383 ld x7,0(x2) + 8000715c: 00138c63 beq x7,x1,80007174 + 80007160: 7b90346f jal x8,8000b118 + 80007164: 80007154 .word 0x80007154 + 80007168: 00000000 .word 0x00000000 + 8000716c: 8001e2c6 .word 0x8001e2c6 + 80007170: 00000000 .word 0x00000000 + 80007174: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x2929292929292929 + 80007178: 00063503 ld x10,0(x12) + 8000717c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x2929292929292929 + 80007180: 00063803 ld x16,0(x12) + 80007184: 00860613 addi x12,x12,8 + +0000000080007188 : +Zkne_aes64esm_cg_cp_sbox_b41: + aes64esm x23, x10, x16 # perform operation + 80007188: 37050bb3 aes64esm x23,x10,x16 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b41, Zkne_aes64esm_cg_cp_sbox_b41_str) + 8000718c: 00013383 ld x7,0(x2) + 80007190: 01738c63 beq x7,x23,800071a8 + 80007194: 7850346f jal x8,8000b118 + 80007198: 80007188 .word 0x80007188 + 8000719c: 00000000 .word 0x00000000 + 800071a0: 8001e2ff .word 0x8001e2ff + 800071a4: 00000000 .word 0x00000000 + 800071a8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x2a2a2a2a2a2a2a2a + 800071ac: 00063903 ld x18,0(x12) + 800071b0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x2a2a2a2a2a2a2a2a + 800071b4: 00063803 ld x16,0(x12) + 800071b8: 00860613 addi x12,x12,8 + +00000000800071bc : +Zkne_aes64esm_cg_cp_sbox_b42: + aes64esm x30, x18, x16 # perform operation + 800071bc: 37090f33 aes64esm x30,x18,x16 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b42, Zkne_aes64esm_cg_cp_sbox_b42_str) + 800071c0: 00013383 ld x7,0(x2) + 800071c4: 01e38c63 beq x7,x30,800071dc + 800071c8: 7510346f jal x8,8000b118 + 800071cc: 800071bc .word 0x800071bc + 800071d0: 00000000 .word 0x00000000 + 800071d4: 8001e338 .word 0x8001e338 + 800071d8: 00000000 .word 0x00000000 + 800071dc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x2b2b2b2b2b2b2b2b + 800071e0: 00063b03 ld x22,0(x12) + 800071e4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x2b2b2b2b2b2b2b2b + 800071e8: 00063f03 ld x30,0(x12) + 800071ec: 00860613 addi x12,x12,8 + +00000000800071f0 : +Zkne_aes64esm_cg_cp_sbox_b43: + aes64esm x16, x22, x30 # perform operation + 800071f0: 37eb0833 aes64esm x16,x22,x30 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b43, Zkne_aes64esm_cg_cp_sbox_b43_str) + 800071f4: 00013383 ld x7,0(x2) + 800071f8: 01038c63 beq x7,x16,80007210 + 800071fc: 71d0346f jal x8,8000b118 + 80007200: 800071f0 .word 0x800071f0 + 80007204: 00000000 .word 0x00000000 + 80007208: 8001e371 .word 0x8001e371 + 8000720c: 00000000 .word 0x00000000 + 80007210: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x2c2c2c2c2c2c2c2c + 80007214: 00063883 ld x17,0(x12) + 80007218: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x2c2c2c2c2c2c2c2c + 8000721c: 00063e03 ld x28,0(x12) + 80007220: 00860613 addi x12,x12,8 + +0000000080007224 : +Zkne_aes64esm_cg_cp_sbox_b44: + aes64esm x6, x17, x28 # perform operation + 80007224: 37c88333 aes64esm x6,x17,x28 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b44, Zkne_aes64esm_cg_cp_sbox_b44_str) + 80007228: 00013383 ld x7,0(x2) + 8000722c: 00638c63 beq x7,x6,80007244 + 80007230: 6e90346f jal x8,8000b118 + 80007234: 80007224 .word 0x80007224 + 80007238: 00000000 .word 0x00000000 + 8000723c: 8001e3aa .word 0x8001e3aa + 80007240: 00000000 .word 0x00000000 + 80007244: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x2d2d2d2d2d2d2d2d + 80007248: 00063783 ld x15,0(x12) + 8000724c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x2d2d2d2d2d2d2d2d + 80007250: 00063483 ld x9,0(x12) + 80007254: 00860613 addi x12,x12,8 + +0000000080007258 : +Zkne_aes64esm_cg_cp_sbox_b45: + aes64esm x10, x15, x9 # perform operation + 80007258: 36978533 aes64esm x10,x15,x9 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b45, Zkne_aes64esm_cg_cp_sbox_b45_str) + 8000725c: 00013383 ld x7,0(x2) + 80007260: 00a38c63 beq x7,x10,80007278 + 80007264: 6b50346f jal x8,8000b118 + 80007268: 80007258 .word 0x80007258 + 8000726c: 00000000 .word 0x00000000 + 80007270: 8001e3e3 .word 0x8001e3e3 + 80007274: 00000000 .word 0x00000000 + 80007278: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x2e2e2e2e2e2e2e2e + 8000727c: 00063583 ld x11,0(x12) + 80007280: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x2e2e2e2e2e2e2e2e + 80007284: 00063b03 ld x22,0(x12) + 80007288: 00860613 addi x12,x12,8 + +000000008000728c : +Zkne_aes64esm_cg_cp_sbox_b46: + aes64esm x13, x11, x22 # perform operation + 8000728c: 376586b3 aes64esm x13,x11,x22 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b46, Zkne_aes64esm_cg_cp_sbox_b46_str) + 80007290: 00013383 ld x7,0(x2) + 80007294: 00d38c63 beq x7,x13,800072ac + 80007298: 6810346f jal x8,8000b118 + 8000729c: 8000728c .word 0x8000728c + 800072a0: 00000000 .word 0x00000000 + 800072a4: 8001e41c .word 0x8001e41c + 800072a8: 00000000 .word 0x00000000 + 800072ac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x2f2f2f2f2f2f2f2f + 800072b0: 00063c83 ld x25,0(x12) + 800072b4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x2f2f2f2f2f2f2f2f + 800072b8: 00063b83 ld x23,0(x12) + 800072bc: 00860613 addi x12,x12,8 + +00000000800072c0 : +Zkne_aes64esm_cg_cp_sbox_b47: + aes64esm x28, x25, x23 # perform operation + 800072c0: 377c8e33 aes64esm x28,x25,x23 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cp_sbox_b47, Zkne_aes64esm_cg_cp_sbox_b47_str) + 800072c4: 00013383 ld x7,0(x2) + 800072c8: 01c38c63 beq x7,x28,800072e0 + 800072cc: 64d0346f jal x8,8000b118 + 800072d0: 800072c0 .word 0x800072c0 + 800072d4: 00000000 .word 0x00000000 + 800072d8: 8001e455 .word 0x8001e455 + 800072dc: 00000000 .word 0x00000000 + 800072e0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x3030303030303030 + 800072e4: 00063e03 ld x28,0(x12) + 800072e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x3030303030303030 + 800072ec: 00063203 ld x4,0(x12) + 800072f0: 00860613 addi x12,x12,8 + +00000000800072f4 : +Zkne_aes64esm_cg_cp_sbox_b48: + aes64esm x19, x28, x4 # perform operation + 800072f4: 364e09b3 aes64esm x19,x28,x4 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b48, Zkne_aes64esm_cg_cp_sbox_b48_str) + 800072f8: 00013383 ld x7,0(x2) + 800072fc: 01338c63 beq x7,x19,80007314 + 80007300: 6190346f jal x8,8000b118 + 80007304: 800072f4 .word 0x800072f4 + 80007308: 00000000 .word 0x00000000 + 8000730c: 8001e48e .word 0x8001e48e + 80007310: 00000000 .word 0x00000000 + 80007314: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x3131313131313131 + 80007318: 00063303 ld x6,0(x12) + 8000731c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x3131313131313131 + 80007320: 00063483 ld x9,0(x12) + 80007324: 00860613 addi x12,x12,8 + +0000000080007328 : +Zkne_aes64esm_cg_cp_sbox_b49: + aes64esm x21, x6, x9 # perform operation + 80007328: 36930ab3 aes64esm x21,x6,x9 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b49, Zkne_aes64esm_cg_cp_sbox_b49_str) + 8000732c: 00013383 ld x7,0(x2) + 80007330: 01538c63 beq x7,x21,80007348 + 80007334: 5e50346f jal x8,8000b118 + 80007338: 80007328 .word 0x80007328 + 8000733c: 00000000 .word 0x00000000 + 80007340: 8001e4c7 .word 0x8001e4c7 + 80007344: 00000000 .word 0x00000000 + 80007348: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x3232323232323232 + 8000734c: 00063a03 ld x20,0(x12) + 80007350: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x3232323232323232 + 80007354: 00063703 ld x14,0(x12) + 80007358: 00860613 addi x12,x12,8 + +000000008000735c : +Zkne_aes64esm_cg_cp_sbox_b50: + aes64esm x19, x20, x14 # perform operation + 8000735c: 36ea09b3 aes64esm x19,x20,x14 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b50, Zkne_aes64esm_cg_cp_sbox_b50_str) + 80007360: 00013383 ld x7,0(x2) + 80007364: 01338c63 beq x7,x19,8000737c + 80007368: 5b10346f jal x8,8000b118 + 8000736c: 8000735c .word 0x8000735c + 80007370: 00000000 .word 0x00000000 + 80007374: 8001e500 .word 0x8001e500 + 80007378: 00000000 .word 0x00000000 + 8000737c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x3333333333333333 + 80007380: 00063183 ld x3,0(x12) + 80007384: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x3333333333333333 + 80007388: 00063303 ld x6,0(x12) + 8000738c: 00860613 addi x12,x12,8 + +0000000080007390 : +Zkne_aes64esm_cg_cp_sbox_b51: + aes64esm x9, x3, x6 # perform operation + 80007390: 366184b3 aes64esm x9,x3,x6 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b51, Zkne_aes64esm_cg_cp_sbox_b51_str) + 80007394: 00013383 ld x7,0(x2) + 80007398: 00938c63 beq x7,x9,800073b0 + 8000739c: 57d0346f jal x8,8000b118 + 800073a0: 80007390 .word 0x80007390 + 800073a4: 00000000 .word 0x00000000 + 800073a8: 8001e539 .word 0x8001e539 + 800073ac: 00000000 .word 0x00000000 + 800073b0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x3434343434343434 + 800073b4: 00063803 ld x16,0(x12) + 800073b8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x3434343434343434 + 800073bc: 00063c03 ld x24,0(x12) + 800073c0: 00860613 addi x12,x12,8 + +00000000800073c4 : +Zkne_aes64esm_cg_cp_sbox_b52: + aes64esm x6, x16, x24 # perform operation + 800073c4: 37880333 aes64esm x6,x16,x24 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b52, Zkne_aes64esm_cg_cp_sbox_b52_str) + 800073c8: 00013383 ld x7,0(x2) + 800073cc: 00638c63 beq x7,x6,800073e4 + 800073d0: 5490346f jal x8,8000b118 + 800073d4: 800073c4 .word 0x800073c4 + 800073d8: 00000000 .word 0x00000000 + 800073dc: 8001e572 .word 0x8001e572 + 800073e0: 00000000 .word 0x00000000 + 800073e4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x3535353535353535 + 800073e8: 00063f03 ld x30,0(x12) + 800073ec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x3535353535353535 + 800073f0: 00063783 ld x15,0(x12) + 800073f4: 00860613 addi x12,x12,8 + +00000000800073f8 : +Zkne_aes64esm_cg_cp_sbox_b53: + aes64esm x4, x30, x15 # perform operation + 800073f8: 36ff0233 aes64esm x4,x30,x15 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b53, Zkne_aes64esm_cg_cp_sbox_b53_str) + 800073fc: 00013383 ld x7,0(x2) + 80007400: 00438c63 beq x7,x4,80007418 + 80007404: 5150346f jal x8,8000b118 + 80007408: 800073f8 .word 0x800073f8 + 8000740c: 00000000 .word 0x00000000 + 80007410: 8001e5ab .word 0x8001e5ab + 80007414: 00000000 .word 0x00000000 + 80007418: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x3636363636363636 + 8000741c: 00063983 ld x19,0(x12) + 80007420: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x3636363636363636 + 80007424: 00063483 ld x9,0(x12) + 80007428: 00860613 addi x12,x12,8 + +000000008000742c : +Zkne_aes64esm_cg_cp_sbox_b54: + aes64esm x3, x19, x9 # perform operation + 8000742c: 369981b3 aes64esm x3,x19,x9 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b54, Zkne_aes64esm_cg_cp_sbox_b54_str) + 80007430: 00013383 ld x7,0(x2) + 80007434: 00338c63 beq x7,x3,8000744c + 80007438: 4e10346f jal x8,8000b118 + 8000743c: 8000742c .word 0x8000742c + 80007440: 00000000 .word 0x00000000 + 80007444: 8001e5e4 .word 0x8001e5e4 + 80007448: 00000000 .word 0x00000000 + 8000744c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x3737373737373737 + 80007450: 00063d03 ld x26,0(x12) + 80007454: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x3737373737373737 + 80007458: 00063503 ld x10,0(x12) + 8000745c: 00860613 addi x12,x12,8 + +0000000080007460 : +Zkne_aes64esm_cg_cp_sbox_b55: + aes64esm x31, x26, x10 # perform operation + 80007460: 36ad0fb3 aes64esm x31,x26,x10 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zkne_aes64esm_cg_cp_sbox_b55, Zkne_aes64esm_cg_cp_sbox_b55_str) + 80007464: 00013383 ld x7,0(x2) + 80007468: 01f38c63 beq x7,x31,80007480 + 8000746c: 4ad0346f jal x8,8000b118 + 80007470: 80007460 .word 0x80007460 + 80007474: 00000000 .word 0x00000000 + 80007478: 8001e61d .word 0x8001e61d + 8000747c: 00000000 .word 0x00000000 + 80007480: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x3838383838383838 + 80007484: 00063783 ld x15,0(x12) + 80007488: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x3838383838383838 + 8000748c: 00063c03 ld x24,0(x12) + 80007490: 00860613 addi x12,x12,8 + +0000000080007494 : +Zkne_aes64esm_cg_cp_sbox_b56: + aes64esm x20, x15, x24 # perform operation + 80007494: 37878a33 aes64esm x20,x15,x24 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b56, Zkne_aes64esm_cg_cp_sbox_b56_str) + 80007498: 00013383 ld x7,0(x2) + 8000749c: 01438c63 beq x7,x20,800074b4 + 800074a0: 4790346f jal x8,8000b118 + 800074a4: 80007494 .word 0x80007494 + 800074a8: 00000000 .word 0x00000000 + 800074ac: 8001e656 .word 0x8001e656 + 800074b0: 00000000 .word 0x00000000 + 800074b4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x3939393939393939 + 800074b8: 00063783 ld x15,0(x12) + 800074bc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x3939393939393939 + 800074c0: 00063d03 ld x26,0(x12) + 800074c4: 00860613 addi x12,x12,8 + +00000000800074c8 : +Zkne_aes64esm_cg_cp_sbox_b57: + aes64esm x20, x15, x26 # perform operation + 800074c8: 37a78a33 aes64esm x20,x15,x26 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b57, Zkne_aes64esm_cg_cp_sbox_b57_str) + 800074cc: 00013383 ld x7,0(x2) + 800074d0: 01438c63 beq x7,x20,800074e8 + 800074d4: 4450346f jal x8,8000b118 + 800074d8: 800074c8 .word 0x800074c8 + 800074dc: 00000000 .word 0x00000000 + 800074e0: 8001e68f .word 0x8001e68f + 800074e4: 00000000 .word 0x00000000 + 800074e8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x3a3a3a3a3a3a3a3a + 800074ec: 00063483 ld x9,0(x12) + 800074f0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x3a3a3a3a3a3a3a3a + 800074f4: 00063503 ld x10,0(x12) + 800074f8: 00860613 addi x12,x12,8 + +00000000800074fc : +Zkne_aes64esm_cg_cp_sbox_b58: + aes64esm x17, x9, x10 # perform operation + 800074fc: 36a488b3 aes64esm x17,x9,x10 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b58, Zkne_aes64esm_cg_cp_sbox_b58_str) + 80007500: 00013383 ld x7,0(x2) + 80007504: 01138c63 beq x7,x17,8000751c + 80007508: 4110346f jal x8,8000b118 + 8000750c: 800074fc .word 0x800074fc + 80007510: 00000000 .word 0x00000000 + 80007514: 8001e6c8 .word 0x8001e6c8 + 80007518: 00000000 .word 0x00000000 + 8000751c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x3b3b3b3b3b3b3b3b + 80007520: 00063903 ld x18,0(x12) + 80007524: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x3b3b3b3b3b3b3b3b + 80007528: 00063e83 ld x29,0(x12) + 8000752c: 00860613 addi x12,x12,8 + +0000000080007530 : +Zkne_aes64esm_cg_cp_sbox_b59: + aes64esm x9, x18, x29 # perform operation + 80007530: 37d904b3 aes64esm x9,x18,x29 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b59, Zkne_aes64esm_cg_cp_sbox_b59_str) + 80007534: 00013383 ld x7,0(x2) + 80007538: 00938c63 beq x7,x9,80007550 + 8000753c: 3dd0346f jal x8,8000b118 + 80007540: 80007530 .word 0x80007530 + 80007544: 00000000 .word 0x00000000 + 80007548: 8001e701 .word 0x8001e701 + 8000754c: 00000000 .word 0x00000000 + 80007550: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x3c3c3c3c3c3c3c3c + 80007554: 00063803 ld x16,0(x12) + 80007558: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x3c3c3c3c3c3c3c3c + 8000755c: 00063083 ld x1,0(x12) + 80007560: 00860613 addi x12,x12,8 + +0000000080007564 : +Zkne_aes64esm_cg_cp_sbox_b60: + aes64esm x23, x16, x1 # perform operation + 80007564: 36180bb3 aes64esm x23,x16,x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b60, Zkne_aes64esm_cg_cp_sbox_b60_str) + 80007568: 00013383 ld x7,0(x2) + 8000756c: 01738c63 beq x7,x23,80007584 + 80007570: 3a90346f jal x8,8000b118 + 80007574: 80007564 .word 0x80007564 + 80007578: 00000000 .word 0x00000000 + 8000757c: 8001e73a .word 0x8001e73a + 80007580: 00000000 .word 0x00000000 + 80007584: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x3d3d3d3d3d3d3d3d + 80007588: 00063203 ld x4,0(x12) + 8000758c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x3d3d3d3d3d3d3d3d + 80007590: 00063e83 ld x29,0(x12) + 80007594: 00860613 addi x12,x12,8 + +0000000080007598 : +Zkne_aes64esm_cg_cp_sbox_b61: + aes64esm x10, x4, x29 # perform operation + 80007598: 37d20533 aes64esm x10,x4,x29 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b61, Zkne_aes64esm_cg_cp_sbox_b61_str) + 8000759c: 00013383 ld x7,0(x2) + 800075a0: 00a38c63 beq x7,x10,800075b8 + 800075a4: 3750346f jal x8,8000b118 + 800075a8: 80007598 .word 0x80007598 + 800075ac: 00000000 .word 0x00000000 + 800075b0: 8001e773 .word 0x8001e773 + 800075b4: 00000000 .word 0x00000000 + 800075b8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x3e3e3e3e3e3e3e3e + 800075bc: 00063503 ld x10,0(x12) + 800075c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x3e3e3e3e3e3e3e3e + 800075c4: 00063b03 ld x22,0(x12) + 800075c8: 00860613 addi x12,x12,8 + +00000000800075cc : +Zkne_aes64esm_cg_cp_sbox_b62: + aes64esm x26, x10, x22 # perform operation + 800075cc: 37650d33 aes64esm x26,x10,x22 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b62, Zkne_aes64esm_cg_cp_sbox_b62_str) + 800075d0: 00013383 ld x7,0(x2) + 800075d4: 01a38c63 beq x7,x26,800075ec + 800075d8: 3410346f jal x8,8000b118 + 800075dc: 800075cc .word 0x800075cc + 800075e0: 00000000 .word 0x00000000 + 800075e4: 8001e7ac .word 0x8001e7ac + 800075e8: 00000000 .word 0x00000000 + 800075ec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x3f3f3f3f3f3f3f3f + 800075f0: 00063c03 ld x24,0(x12) + 800075f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x3f3f3f3f3f3f3f3f + 800075f8: 00063483 ld x9,0(x12) + 800075fc: 00860613 addi x12,x12,8 + +0000000080007600 : +Zkne_aes64esm_cg_cp_sbox_b63: + aes64esm x17, x24, x9 # perform operation + 80007600: 369c08b3 aes64esm x17,x24,x9 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b63, Zkne_aes64esm_cg_cp_sbox_b63_str) + 80007604: 00013383 ld x7,0(x2) + 80007608: 01138c63 beq x7,x17,80007620 + 8000760c: 30d0346f jal x8,8000b118 + 80007610: 80007600 .word 0x80007600 + 80007614: 00000000 .word 0x00000000 + 80007618: 8001e7e5 .word 0x8001e7e5 + 8000761c: 00000000 .word 0x00000000 + 80007620: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x4040404040404040 + 80007624: 00063b03 ld x22,0(x12) + 80007628: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x4040404040404040 + 8000762c: 00063803 ld x16,0(x12) + 80007630: 00860613 addi x12,x12,8 + +0000000080007634 : +Zkne_aes64esm_cg_cp_sbox_b64: + aes64esm x1, x22, x16 # perform operation + 80007634: 370b00b3 aes64esm x1,x22,x16 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b64, Zkne_aes64esm_cg_cp_sbox_b64_str) + 80007638: 00013383 ld x7,0(x2) + 8000763c: 00138c63 beq x7,x1,80007654 + 80007640: 2d90346f jal x8,8000b118 + 80007644: 80007634 .word 0x80007634 + 80007648: 00000000 .word 0x00000000 + 8000764c: 8001e81e .word 0x8001e81e + 80007650: 00000000 .word 0x00000000 + 80007654: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x4141414141414141 + 80007658: 00063f03 ld x30,0(x12) + 8000765c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x4141414141414141 + 80007660: 00063083 ld x1,0(x12) + 80007664: 00860613 addi x12,x12,8 + +0000000080007668 : +Zkne_aes64esm_cg_cp_sbox_b65: + aes64esm x23, x30, x1 # perform operation + 80007668: 361f0bb3 aes64esm x23,x30,x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b65, Zkne_aes64esm_cg_cp_sbox_b65_str) + 8000766c: 00013383 ld x7,0(x2) + 80007670: 01738c63 beq x7,x23,80007688 + 80007674: 2a50346f jal x8,8000b118 + 80007678: 80007668 .word 0x80007668 + 8000767c: 00000000 .word 0x00000000 + 80007680: 8001e857 .word 0x8001e857 + 80007684: 00000000 .word 0x00000000 + 80007688: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x4242424242424242 + 8000768c: 00063283 ld x5,0(x12) + 80007690: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x4242424242424242 + 80007694: 00063a03 ld x20,0(x12) + 80007698: 00860613 addi x12,x12,8 + +000000008000769c : +Zkne_aes64esm_cg_cp_sbox_b66: + aes64esm x29, x5, x20 # perform operation + 8000769c: 37428eb3 aes64esm x29,x5,x20 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b66, Zkne_aes64esm_cg_cp_sbox_b66_str) + 800076a0: 00013383 ld x7,0(x2) + 800076a4: 01d38c63 beq x7,x29,800076bc + 800076a8: 2710346f jal x8,8000b118 + 800076ac: 8000769c .word 0x8000769c + 800076b0: 00000000 .word 0x00000000 + 800076b4: 8001e890 .word 0x8001e890 + 800076b8: 00000000 .word 0x00000000 + 800076bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x4343434343434343 + 800076c0: 00063a83 ld x21,0(x12) + 800076c4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x4343434343434343 + 800076c8: 00063e03 ld x28,0(x12) + 800076cc: 00860613 addi x12,x12,8 + +00000000800076d0 : +Zkne_aes64esm_cg_cp_sbox_b67: + aes64esm x26, x21, x28 # perform operation + 800076d0: 37ca8d33 aes64esm x26,x21,x28 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b67, Zkne_aes64esm_cg_cp_sbox_b67_str) + 800076d4: 00013383 ld x7,0(x2) + 800076d8: 01a38c63 beq x7,x26,800076f0 + 800076dc: 23d0346f jal x8,8000b118 + 800076e0: 800076d0 .word 0x800076d0 + 800076e4: 00000000 .word 0x00000000 + 800076e8: 8001e8c9 .word 0x8001e8c9 + 800076ec: 00000000 .word 0x00000000 + 800076f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x4444444444444444 + 800076f4: 00063b03 ld x22,0(x12) + 800076f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x4444444444444444 + 800076fc: 00063a03 ld x20,0(x12) + 80007700: 00860613 addi x12,x12,8 + +0000000080007704 : +Zkne_aes64esm_cg_cp_sbox_b68: + aes64esm x10, x22, x20 # perform operation + 80007704: 374b0533 aes64esm x10,x22,x20 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b68, Zkne_aes64esm_cg_cp_sbox_b68_str) + 80007708: 00013383 ld x7,0(x2) + 8000770c: 00a38c63 beq x7,x10,80007724 + 80007710: 2090346f jal x8,8000b118 + 80007714: 80007704 .word 0x80007704 + 80007718: 00000000 .word 0x00000000 + 8000771c: 8001e902 .word 0x8001e902 + 80007720: 00000000 .word 0x00000000 + 80007724: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x4545454545454545 + 80007728: 00063183 ld x3,0(x12) + 8000772c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x4545454545454545 + 80007730: 00063b03 ld x22,0(x12) + 80007734: 00860613 addi x12,x12,8 + +0000000080007738 : +Zkne_aes64esm_cg_cp_sbox_b69: + aes64esm x25, x3, x22 # perform operation + 80007738: 37618cb3 aes64esm x25,x3,x22 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b69, Zkne_aes64esm_cg_cp_sbox_b69_str) + 8000773c: 00013383 ld x7,0(x2) + 80007740: 01938c63 beq x7,x25,80007758 + 80007744: 1d50346f jal x8,8000b118 + 80007748: 80007738 .word 0x80007738 + 8000774c: 00000000 .word 0x00000000 + 80007750: 8001e93b .word 0x8001e93b + 80007754: 00000000 .word 0x00000000 + 80007758: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x4646464646464646 + 8000775c: 00063583 ld x11,0(x12) + 80007760: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x4646464646464646 + 80007764: 00063e03 ld x28,0(x12) + 80007768: 00860613 addi x12,x12,8 + +000000008000776c : +Zkne_aes64esm_cg_cp_sbox_b70: + aes64esm x5, x11, x28 # perform operation + 8000776c: 37c582b3 aes64esm x5,x11,x28 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b70, Zkne_aes64esm_cg_cp_sbox_b70_str) + 80007770: 00013383 ld x7,0(x2) + 80007774: 00538c63 beq x7,x5,8000778c + 80007778: 1a10346f jal x8,8000b118 + 8000777c: 8000776c .word 0x8000776c + 80007780: 00000000 .word 0x00000000 + 80007784: 8001e974 .word 0x8001e974 + 80007788: 00000000 .word 0x00000000 + 8000778c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x4747474747474747 + 80007790: 00063a83 ld x21,0(x12) + 80007794: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x4747474747474747 + 80007798: 00063f83 ld x31,0(x12) + 8000779c: 00860613 addi x12,x12,8 + +00000000800077a0 : +Zkne_aes64esm_cg_cp_sbox_b71: + aes64esm x28, x21, x31 # perform operation + 800077a0: 37fa8e33 aes64esm x28,x21,x31 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cp_sbox_b71, Zkne_aes64esm_cg_cp_sbox_b71_str) + 800077a4: 00013383 ld x7,0(x2) + 800077a8: 01c38c63 beq x7,x28,800077c0 + 800077ac: 16d0346f jal x8,8000b118 + 800077b0: 800077a0 .word 0x800077a0 + 800077b4: 00000000 .word 0x00000000 + 800077b8: 8001e9ad .word 0x8001e9ad + 800077bc: 00000000 .word 0x00000000 + 800077c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x4848484848484848 + 800077c4: 00063c03 ld x24,0(x12) + 800077c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x4848484848484848 + 800077cc: 00063303 ld x6,0(x12) + 800077d0: 00860613 addi x12,x12,8 + +00000000800077d4 : +Zkne_aes64esm_cg_cp_sbox_b72: + aes64esm x17, x24, x6 # perform operation + 800077d4: 366c08b3 aes64esm x17,x24,x6 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b72, Zkne_aes64esm_cg_cp_sbox_b72_str) + 800077d8: 00013383 ld x7,0(x2) + 800077dc: 01138c63 beq x7,x17,800077f4 + 800077e0: 1390346f jal x8,8000b118 + 800077e4: 800077d4 .word 0x800077d4 + 800077e8: 00000000 .word 0x00000000 + 800077ec: 8001e9e6 .word 0x8001e9e6 + 800077f0: 00000000 .word 0x00000000 + 800077f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x4949494949494949 + 800077f8: 00063d03 ld x26,0(x12) + 800077fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x4949494949494949 + 80007800: 00063083 ld x1,0(x12) + 80007804: 00860613 addi x12,x12,8 + +0000000080007808 : +Zkne_aes64esm_cg_cp_sbox_b73: + aes64esm x31, x26, x1 # perform operation + 80007808: 361d0fb3 aes64esm x31,x26,x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zkne_aes64esm_cg_cp_sbox_b73, Zkne_aes64esm_cg_cp_sbox_b73_str) + 8000780c: 00013383 ld x7,0(x2) + 80007810: 01f38c63 beq x7,x31,80007828 + 80007814: 1050346f jal x8,8000b118 + 80007818: 80007808 .word 0x80007808 + 8000781c: 00000000 .word 0x00000000 + 80007820: 8001ea1f .word 0x8001ea1f + 80007824: 00000000 .word 0x00000000 + 80007828: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x4a4a4a4a4a4a4a4a + 8000782c: 00063c83 ld x25,0(x12) + 80007830: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x4a4a4a4a4a4a4a4a + 80007834: 00063183 ld x3,0(x12) + 80007838: 00860613 addi x12,x12,8 + +000000008000783c : +Zkne_aes64esm_cg_cp_sbox_b74: + aes64esm x22, x25, x3 # perform operation + 8000783c: 363c8b33 aes64esm x22,x25,x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b74, Zkne_aes64esm_cg_cp_sbox_b74_str) + 80007840: 00013383 ld x7,0(x2) + 80007844: 01638c63 beq x7,x22,8000785c + 80007848: 0d10346f jal x8,8000b118 + 8000784c: 8000783c .word 0x8000783c + 80007850: 00000000 .word 0x00000000 + 80007854: 8001ea58 .word 0x8001ea58 + 80007858: 00000000 .word 0x00000000 + 8000785c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x4b4b4b4b4b4b4b4b + 80007860: 00063983 ld x19,0(x12) + 80007864: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x4b4b4b4b4b4b4b4b + 80007868: 00063483 ld x9,0(x12) + 8000786c: 00860613 addi x12,x12,8 + +0000000080007870 : +Zkne_aes64esm_cg_cp_sbox_b75: + aes64esm x18, x19, x9 # perform operation + 80007870: 36998933 aes64esm x18,x19,x9 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b75, Zkne_aes64esm_cg_cp_sbox_b75_str) + 80007874: 00013383 ld x7,0(x2) + 80007878: 01238c63 beq x7,x18,80007890 + 8000787c: 09d0346f jal x8,8000b118 + 80007880: 80007870 .word 0x80007870 + 80007884: 00000000 .word 0x00000000 + 80007888: 8001ea91 .word 0x8001ea91 + 8000788c: 00000000 .word 0x00000000 + 80007890: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x4c4c4c4c4c4c4c4c + 80007894: 00063d83 ld x27,0(x12) + 80007898: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x4c4c4c4c4c4c4c4c + 8000789c: 00063583 ld x11,0(x12) + 800078a0: 00860613 addi x12,x12,8 + +00000000800078a4 : +Zkne_aes64esm_cg_cp_sbox_b76: + aes64esm x16, x27, x11 # perform operation + 800078a4: 36bd8833 aes64esm x16,x27,x11 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b76, Zkne_aes64esm_cg_cp_sbox_b76_str) + 800078a8: 00013383 ld x7,0(x2) + 800078ac: 01038c63 beq x7,x16,800078c4 + 800078b0: 0690346f jal x8,8000b118 + 800078b4: 800078a4 .word 0x800078a4 + 800078b8: 00000000 .word 0x00000000 + 800078bc: 8001eaca .word 0x8001eaca + 800078c0: 00000000 .word 0x00000000 + 800078c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x4d4d4d4d4d4d4d4d + 800078c8: 00063503 ld x10,0(x12) + 800078cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x4d4d4d4d4d4d4d4d + 800078d0: 00063083 ld x1,0(x12) + 800078d4: 00860613 addi x12,x12,8 + +00000000800078d8 : +Zkne_aes64esm_cg_cp_sbox_b77: + aes64esm x23, x10, x1 # perform operation + 800078d8: 36150bb3 aes64esm x23,x10,x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b77, Zkne_aes64esm_cg_cp_sbox_b77_str) + 800078dc: 00013383 ld x7,0(x2) + 800078e0: 01738c63 beq x7,x23,800078f8 + 800078e4: 0350346f jal x8,8000b118 + 800078e8: 800078d8 .word 0x800078d8 + 800078ec: 00000000 .word 0x00000000 + 800078f0: 8001eb03 .word 0x8001eb03 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x4e4e4e4e4e4e4e4e + 800078fc: 00063b83 ld x23,0(x12) + 80007900: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x4e4e4e4e4e4e4e4e + 80007904: 00063703 ld x14,0(x12) + 80007908: 00860613 addi x12,x12,8 + +000000008000790c : +Zkne_aes64esm_cg_cp_sbox_b78: + aes64esm x18, x23, x14 # perform operation + 8000790c: 36eb8933 aes64esm x18,x23,x14 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b78, Zkne_aes64esm_cg_cp_sbox_b78_str) + 80007910: 00013383 ld x7,0(x2) + 80007914: 01238c63 beq x7,x18,8000792c + 80007918: 0010346f jal x8,8000b118 + 8000791c: 8000790c .word 0x8000790c + 80007920: 00000000 .word 0x00000000 + 80007924: 8001eb3c .word 0x8001eb3c + 80007928: 00000000 .word 0x00000000 + 8000792c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x4f4f4f4f4f4f4f4f + 80007930: 00063c83 ld x25,0(x12) + 80007934: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x4f4f4f4f4f4f4f4f + 80007938: 00063483 ld x9,0(x12) + 8000793c: 00860613 addi x12,x12,8 + +0000000080007940 : +Zkne_aes64esm_cg_cp_sbox_b79: + aes64esm x11, x25, x9 # perform operation + 80007940: 369c85b3 aes64esm x11,x25,x9 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b79, Zkne_aes64esm_cg_cp_sbox_b79_str) + 80007944: 00013383 ld x7,0(x2) + 80007948: 00b38c63 beq x7,x11,80007960 + 8000794c: 7cc0346f jal x8,8000b118 + 80007950: 80007940 .word 0x80007940 + 80007954: 00000000 .word 0x00000000 + 80007958: 8001eb75 .word 0x8001eb75 + 8000795c: 00000000 .word 0x00000000 + 80007960: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x5050505050505050 + 80007964: 00063983 ld x19,0(x12) + 80007968: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x5050505050505050 + 8000796c: 00063503 ld x10,0(x12) + 80007970: 00860613 addi x12,x12,8 + +0000000080007974 : +Zkne_aes64esm_cg_cp_sbox_b80: + aes64esm x3, x19, x10 # perform operation + 80007974: 36a981b3 aes64esm x3,x19,x10 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b80, Zkne_aes64esm_cg_cp_sbox_b80_str) + 80007978: 00013383 ld x7,0(x2) + 8000797c: 00338c63 beq x7,x3,80007994 + 80007980: 7980346f jal x8,8000b118 + 80007984: 80007974 .word 0x80007974 + 80007988: 00000000 .word 0x00000000 + 8000798c: 8001ebae .word 0x8001ebae + 80007990: 00000000 .word 0x00000000 + 80007994: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5151515151515151 + 80007998: 00063883 ld x17,0(x12) + 8000799c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x5151515151515151 + 800079a0: 00063d03 ld x26,0(x12) + 800079a4: 00860613 addi x12,x12,8 + +00000000800079a8 : +Zkne_aes64esm_cg_cp_sbox_b81: + aes64esm x22, x17, x26 # perform operation + 800079a8: 37a88b33 aes64esm x22,x17,x26 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b81, Zkne_aes64esm_cg_cp_sbox_b81_str) + 800079ac: 00013383 ld x7,0(x2) + 800079b0: 01638c63 beq x7,x22,800079c8 + 800079b4: 7640346f jal x8,8000b118 + 800079b8: 800079a8 .word 0x800079a8 + 800079bc: 00000000 .word 0x00000000 + 800079c0: 8001ebe7 .word 0x8001ebe7 + 800079c4: 00000000 .word 0x00000000 + 800079c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5252525252525252 + 800079cc: 00063883 ld x17,0(x12) + 800079d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x5252525252525252 + 800079d4: 00063d03 ld x26,0(x12) + 800079d8: 00860613 addi x12,x12,8 + +00000000800079dc : +Zkne_aes64esm_cg_cp_sbox_b82: + aes64esm x11, x17, x26 # perform operation + 800079dc: 37a885b3 aes64esm x11,x17,x26 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b82, Zkne_aes64esm_cg_cp_sbox_b82_str) + 800079e0: 00013383 ld x7,0(x2) + 800079e4: 00b38c63 beq x7,x11,800079fc + 800079e8: 7300346f jal x8,8000b118 + 800079ec: 800079dc .word 0x800079dc + 800079f0: 00000000 .word 0x00000000 + 800079f4: 8001ec20 .word 0x8001ec20 + 800079f8: 00000000 .word 0x00000000 + 800079fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x5353535353535353 + 80007a00: 00063c03 ld x24,0(x12) + 80007a04: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x5353535353535353 + 80007a08: 00063303 ld x6,0(x12) + 80007a0c: 00860613 addi x12,x12,8 + +0000000080007a10 : +Zkne_aes64esm_cg_cp_sbox_b83: + aes64esm x22, x24, x6 # perform operation + 80007a10: 366c0b33 aes64esm x22,x24,x6 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b83, Zkne_aes64esm_cg_cp_sbox_b83_str) + 80007a14: 00013383 ld x7,0(x2) + 80007a18: 01638c63 beq x7,x22,80007a30 + 80007a1c: 6fc0346f jal x8,8000b118 + 80007a20: 80007a10 .word 0x80007a10 + 80007a24: 00000000 .word 0x00000000 + 80007a28: 8001ec59 .word 0x8001ec59 + 80007a2c: 00000000 .word 0x00000000 + 80007a30: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x5454545454545454 + 80007a34: 00063b03 ld x22,0(x12) + 80007a38: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x5454545454545454 + 80007a3c: 00063c03 ld x24,0(x12) + 80007a40: 00860613 addi x12,x12,8 + +0000000080007a44 : +Zkne_aes64esm_cg_cp_sbox_b84: + aes64esm x9, x22, x24 # perform operation + 80007a44: 378b04b3 aes64esm x9,x22,x24 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b84, Zkne_aes64esm_cg_cp_sbox_b84_str) + 80007a48: 00013383 ld x7,0(x2) + 80007a4c: 00938c63 beq x7,x9,80007a64 + 80007a50: 6c80346f jal x8,8000b118 + 80007a54: 80007a44 .word 0x80007a44 + 80007a58: 00000000 .word 0x00000000 + 80007a5c: 8001ec92 .word 0x8001ec92 + 80007a60: 00000000 .word 0x00000000 + 80007a64: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5555555555555555 + 80007a68: 00063e83 ld x29,0(x12) + 80007a6c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x5555555555555555 + 80007a70: 00063983 ld x19,0(x12) + 80007a74: 00860613 addi x12,x12,8 + +0000000080007a78 : +Zkne_aes64esm_cg_cp_sbox_b85: + aes64esm x23, x29, x19 # perform operation + 80007a78: 373e8bb3 aes64esm x23,x29,x19 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b85, Zkne_aes64esm_cg_cp_sbox_b85_str) + 80007a7c: 00013383 ld x7,0(x2) + 80007a80: 01738c63 beq x7,x23,80007a98 + 80007a84: 6940346f jal x8,8000b118 + 80007a88: 80007a78 .word 0x80007a78 + 80007a8c: 00000000 .word 0x00000000 + 80007a90: 8001eccb .word 0x8001eccb + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x5656565656565656 + 80007a9c: 00063503 ld x10,0(x12) + 80007aa0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x5656565656565656 + 80007aa4: 00063a83 ld x21,0(x12) + 80007aa8: 00860613 addi x12,x12,8 + +0000000080007aac : +Zkne_aes64esm_cg_cp_sbox_b86: + aes64esm x11, x10, x21 # perform operation + 80007aac: 375505b3 aes64esm x11,x10,x21 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b86, Zkne_aes64esm_cg_cp_sbox_b86_str) + 80007ab0: 00013383 ld x7,0(x2) + 80007ab4: 00b38c63 beq x7,x11,80007acc + 80007ab8: 6600346f jal x8,8000b118 + 80007abc: 80007aac .word 0x80007aac + 80007ac0: 00000000 .word 0x00000000 + 80007ac4: 8001ed04 .word 0x8001ed04 + 80007ac8: 00000000 .word 0x00000000 + 80007acc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x5757575757575757 + 80007ad0: 00063a83 ld x21,0(x12) + 80007ad4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x5757575757575757 + 80007ad8: 00063903 ld x18,0(x12) + 80007adc: 00860613 addi x12,x12,8 + +0000000080007ae0 : +Zkne_aes64esm_cg_cp_sbox_b87: + aes64esm x19, x21, x18 # perform operation + 80007ae0: 372a89b3 aes64esm x19,x21,x18 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b87, Zkne_aes64esm_cg_cp_sbox_b87_str) + 80007ae4: 00013383 ld x7,0(x2) + 80007ae8: 01338c63 beq x7,x19,80007b00 + 80007aec: 62c0346f jal x8,8000b118 + 80007af0: 80007ae0 .word 0x80007ae0 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 8001ed3d .word 0x8001ed3d + 80007afc: 00000000 .word 0x00000000 + 80007b00: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x5858585858585858 + 80007b04: 00063083 ld x1,0(x12) + 80007b08: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x5858585858585858 + 80007b0c: 00063183 ld x3,0(x12) + 80007b10: 00860613 addi x12,x12,8 + +0000000080007b14 : +Zkne_aes64esm_cg_cp_sbox_b88: + aes64esm x4, x1, x3 # perform operation + 80007b14: 36308233 aes64esm x4,x1,x3 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b88, Zkne_aes64esm_cg_cp_sbox_b88_str) + 80007b18: 00013383 ld x7,0(x2) + 80007b1c: 00438c63 beq x7,x4,80007b34 + 80007b20: 5f80346f jal x8,8000b118 + 80007b24: 80007b14 .word 0x80007b14 + 80007b28: 00000000 .word 0x00000000 + 80007b2c: 8001ed76 .word 0x8001ed76 + 80007b30: 00000000 .word 0x00000000 + 80007b34: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x5959595959595959 + 80007b38: 00063883 ld x17,0(x12) + 80007b3c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x5959595959595959 + 80007b40: 00063b03 ld x22,0(x12) + 80007b44: 00860613 addi x12,x12,8 + +0000000080007b48 : +Zkne_aes64esm_cg_cp_sbox_b89: + aes64esm x9, x17, x22 # perform operation + 80007b48: 376884b3 aes64esm x9,x17,x22 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b89, Zkne_aes64esm_cg_cp_sbox_b89_str) + 80007b4c: 00013383 ld x7,0(x2) + 80007b50: 00938c63 beq x7,x9,80007b68 + 80007b54: 5c40346f jal x8,8000b118 + 80007b58: 80007b48 .word 0x80007b48 + 80007b5c: 00000000 .word 0x00000000 + 80007b60: 8001edaf .word 0x8001edaf + 80007b64: 00000000 .word 0x00000000 + 80007b68: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x5a5a5a5a5a5a5a5a + 80007b6c: 00063083 ld x1,0(x12) + 80007b70: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x5a5a5a5a5a5a5a5a + 80007b74: 00063683 ld x13,0(x12) + 80007b78: 00860613 addi x12,x12,8 + +0000000080007b7c : +Zkne_aes64esm_cg_cp_sbox_b90: + aes64esm x22, x1, x13 # perform operation + 80007b7c: 36d08b33 aes64esm x22,x1,x13 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b90, Zkne_aes64esm_cg_cp_sbox_b90_str) + 80007b80: 00013383 ld x7,0(x2) + 80007b84: 01638c63 beq x7,x22,80007b9c + 80007b88: 5900346f jal x8,8000b118 + 80007b8c: 80007b7c .word 0x80007b7c + 80007b90: 00000000 .word 0x00000000 + 80007b94: 8001ede8 .word 0x8001ede8 + 80007b98: 00000000 .word 0x00000000 + 80007b9c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x5b5b5b5b5b5b5b5b + 80007ba0: 00063a03 ld x20,0(x12) + 80007ba4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0x5b5b5b5b5b5b5b5b + 80007ba8: 00063183 ld x3,0(x12) + 80007bac: 00860613 addi x12,x12,8 + +0000000080007bb0 : +Zkne_aes64esm_cg_cp_sbox_b91: + aes64esm x6, x20, x3 # perform operation + 80007bb0: 363a0333 aes64esm x6,x20,x3 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b91, Zkne_aes64esm_cg_cp_sbox_b91_str) + 80007bb4: 00013383 ld x7,0(x2) + 80007bb8: 00638c63 beq x7,x6,80007bd0 + 80007bbc: 55c0346f jal x8,8000b118 + 80007bc0: 80007bb0 .word 0x80007bb0 + 80007bc4: 00000000 .word 0x00000000 + 80007bc8: 8001ee21 .word 0x8001ee21 + 80007bcc: 00000000 .word 0x00000000 + 80007bd0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x5c5c5c5c5c5c5c5c + 80007bd4: 00063483 ld x9,0(x12) + 80007bd8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x5c5c5c5c5c5c5c5c + 80007bdc: 00063083 ld x1,0(x12) + 80007be0: 00860613 addi x12,x12,8 + +0000000080007be4 : +Zkne_aes64esm_cg_cp_sbox_b92: + aes64esm x26, x9, x1 # perform operation + 80007be4: 36148d33 aes64esm x26,x9,x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b92, Zkne_aes64esm_cg_cp_sbox_b92_str) + 80007be8: 00013383 ld x7,0(x2) + 80007bec: 01a38c63 beq x7,x26,80007c04 + 80007bf0: 5280346f jal x8,8000b118 + 80007bf4: 80007be4 .word 0x80007be4 + 80007bf8: 00000000 .word 0x00000000 + 80007bfc: 8001ee5a .word 0x8001ee5a + 80007c00: 00000000 .word 0x00000000 + 80007c04: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x5d5d5d5d5d5d5d5d + 80007c08: 00063803 ld x16,0(x12) + 80007c0c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x5d5d5d5d5d5d5d5d + 80007c10: 00063483 ld x9,0(x12) + 80007c14: 00860613 addi x12,x12,8 + +0000000080007c18 : +Zkne_aes64esm_cg_cp_sbox_b93: + aes64esm x25, x16, x9 # perform operation + 80007c18: 36980cb3 aes64esm x25,x16,x9 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b93, Zkne_aes64esm_cg_cp_sbox_b93_str) + 80007c1c: 00013383 ld x7,0(x2) + 80007c20: 01938c63 beq x7,x25,80007c38 + 80007c24: 4f40346f jal x8,8000b118 + 80007c28: 80007c18 .word 0x80007c18 + 80007c2c: 00000000 .word 0x00000000 + 80007c30: 8001ee93 .word 0x8001ee93 + 80007c34: 00000000 .word 0x00000000 + 80007c38: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x5e5e5e5e5e5e5e5e + 80007c3c: 00063d83 ld x27,0(x12) + 80007c40: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x5e5e5e5e5e5e5e5e + 80007c44: 00063903 ld x18,0(x12) + 80007c48: 00860613 addi x12,x12,8 + +0000000080007c4c : +Zkne_aes64esm_cg_cp_sbox_b94: + aes64esm x1, x27, x18 # perform operation + 80007c4c: 372d80b3 aes64esm x1,x27,x18 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b94, Zkne_aes64esm_cg_cp_sbox_b94_str) + 80007c50: 00013383 ld x7,0(x2) + 80007c54: 00138c63 beq x7,x1,80007c6c + 80007c58: 4c00346f jal x8,8000b118 + 80007c5c: 80007c4c .word 0x80007c4c + 80007c60: 00000000 .word 0x00000000 + 80007c64: 8001eecc .word 0x8001eecc + 80007c68: 00000000 .word 0x00000000 + 80007c6c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x5f5f5f5f5f5f5f5f + 80007c70: 00063f83 ld x31,0(x12) + 80007c74: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0x5f5f5f5f5f5f5f5f + 80007c78: 00063583 ld x11,0(x12) + 80007c7c: 00860613 addi x12,x12,8 + +0000000080007c80 : +Zkne_aes64esm_cg_cp_sbox_b95: + aes64esm x23, x31, x11 # perform operation + 80007c80: 36bf8bb3 aes64esm x23,x31,x11 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b95, Zkne_aes64esm_cg_cp_sbox_b95_str) + 80007c84: 00013383 ld x7,0(x2) + 80007c88: 01738c63 beq x7,x23,80007ca0 + 80007c8c: 48c0346f jal x8,8000b118 + 80007c90: 80007c80 .word 0x80007c80 + 80007c94: 00000000 .word 0x00000000 + 80007c98: 8001ef05 .word 0x8001ef05 + 80007c9c: 00000000 .word 0x00000000 + 80007ca0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x6060606060606060 + 80007ca4: 00063983 ld x19,0(x12) + 80007ca8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x6060606060606060 + 80007cac: 00063483 ld x9,0(x12) + 80007cb0: 00860613 addi x12,x12,8 + +0000000080007cb4 : +Zkne_aes64esm_cg_cp_sbox_b96: + aes64esm x21, x19, x9 # perform operation + 80007cb4: 36998ab3 aes64esm x21,x19,x9 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b96, Zkne_aes64esm_cg_cp_sbox_b96_str) + 80007cb8: 00013383 ld x7,0(x2) + 80007cbc: 01538c63 beq x7,x21,80007cd4 + 80007cc0: 4580346f jal x8,8000b118 + 80007cc4: 80007cb4 .word 0x80007cb4 + 80007cc8: 00000000 .word 0x00000000 + 80007ccc: 8001ef3e .word 0x8001ef3e + 80007cd0: 00000000 .word 0x00000000 + 80007cd4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x6161616161616161 + 80007cd8: 00063183 ld x3,0(x12) + 80007cdc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x6161616161616161 + 80007ce0: 00063703 ld x14,0(x12) + 80007ce4: 00860613 addi x12,x12,8 + +0000000080007ce8 : +Zkne_aes64esm_cg_cp_sbox_b97: + aes64esm x26, x3, x14 # perform operation + 80007ce8: 36e18d33 aes64esm x26,x3,x14 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b97, Zkne_aes64esm_cg_cp_sbox_b97_str) + 80007cec: 00013383 ld x7,0(x2) + 80007cf0: 01a38c63 beq x7,x26,80007d08 + 80007cf4: 4240346f jal x8,8000b118 + 80007cf8: 80007ce8 .word 0x80007ce8 + 80007cfc: 00000000 .word 0x00000000 + 80007d00: 8001ef77 .word 0x8001ef77 + 80007d04: 00000000 .word 0x00000000 + 80007d08: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x6262626262626262 + 80007d0c: 00063503 ld x10,0(x12) + 80007d10: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x6262626262626262 + 80007d14: 00063283 ld x5,0(x12) + 80007d18: 00860613 addi x12,x12,8 + +0000000080007d1c : +Zkne_aes64esm_cg_cp_sbox_b98: + aes64esm x23, x10, x5 # perform operation + 80007d1c: 36550bb3 aes64esm x23,x10,x5 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b98, Zkne_aes64esm_cg_cp_sbox_b98_str) + 80007d20: 00013383 ld x7,0(x2) + 80007d24: 01738c63 beq x7,x23,80007d3c + 80007d28: 3f00346f jal x8,8000b118 + 80007d2c: 80007d1c .word 0x80007d1c + 80007d30: 00000000 .word 0x00000000 + 80007d34: 8001efb0 .word 0x8001efb0 + 80007d38: 00000000 .word 0x00000000 + 80007d3c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x6363636363636363 + 80007d40: 00063503 ld x10,0(x12) + 80007d44: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x6363636363636363 + 80007d48: 00063c83 ld x25,0(x12) + 80007d4c: 00860613 addi x12,x12,8 + +0000000080007d50 : +Zkne_aes64esm_cg_cp_sbox_b99: + aes64esm x6, x10, x25 # perform operation + 80007d50: 37950333 aes64esm x6,x10,x25 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b99, Zkne_aes64esm_cg_cp_sbox_b99_str) + 80007d54: 00013383 ld x7,0(x2) + 80007d58: 00638c63 beq x7,x6,80007d70 + 80007d5c: 3bc0346f jal x8,8000b118 + 80007d60: 80007d50 .word 0x80007d50 + 80007d64: 00000000 .word 0x00000000 + 80007d68: 8001efe9 .word 0x8001efe9 + 80007d6c: 00000000 .word 0x00000000 + 80007d70: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x6464646464646464 + 80007d74: 00063683 ld x13,0(x12) + 80007d78: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x6464646464646464 + 80007d7c: 00063c03 ld x24,0(x12) + 80007d80: 00860613 addi x12,x12,8 + +0000000080007d84 : +Zkne_aes64esm_cg_cp_sbox_b100: + aes64esm x15, x13, x24 # perform operation + 80007d84: 378687b3 aes64esm x15,x13,x24 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b100, Zkne_aes64esm_cg_cp_sbox_b100_str) + 80007d88: 00013383 ld x7,0(x2) + 80007d8c: 00f38c63 beq x7,x15,80007da4 + 80007d90: 3880346f jal x8,8000b118 + 80007d94: 80007d84 .word 0x80007d84 + 80007d98: 00000000 .word 0x00000000 + 80007d9c: 8001f022 .word 0x8001f022 + 80007da0: 00000000 .word 0x00000000 + 80007da4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x6565656565656565 + 80007da8: 00063783 ld x15,0(x12) + 80007dac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x6565656565656565 + 80007db0: 00063983 ld x19,0(x12) + 80007db4: 00860613 addi x12,x12,8 + +0000000080007db8 : +Zkne_aes64esm_cg_cp_sbox_b101: + aes64esm x25, x15, x19 # perform operation + 80007db8: 37378cb3 aes64esm x25,x15,x19 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b101, Zkne_aes64esm_cg_cp_sbox_b101_str) + 80007dbc: 00013383 ld x7,0(x2) + 80007dc0: 01938c63 beq x7,x25,80007dd8 + 80007dc4: 3540346f jal x8,8000b118 + 80007dc8: 80007db8 .word 0x80007db8 + 80007dcc: 00000000 .word 0x00000000 + 80007dd0: 8001f05c .word 0x8001f05c + 80007dd4: 00000000 .word 0x00000000 + 80007dd8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x6666666666666666 + 80007ddc: 00063e83 ld x29,0(x12) + 80007de0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x6666666666666666 + 80007de4: 00063303 ld x6,0(x12) + 80007de8: 00860613 addi x12,x12,8 + +0000000080007dec : +Zkne_aes64esm_cg_cp_sbox_b102: + aes64esm x27, x29, x6 # perform operation + 80007dec: 366e8db3 aes64esm x27,x29,x6 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b102, Zkne_aes64esm_cg_cp_sbox_b102_str) + 80007df0: 00013383 ld x7,0(x2) + 80007df4: 01b38c63 beq x7,x27,80007e0c + 80007df8: 3200346f jal x8,8000b118 + 80007dfc: 80007dec .word 0x80007dec + 80007e00: 00000000 .word 0x00000000 + 80007e04: 8001f096 .word 0x8001f096 + 80007e08: 00000000 .word 0x00000000 + 80007e0c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x6767676767676767 + 80007e10: 00063203 ld x4,0(x12) + 80007e14: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x6767676767676767 + 80007e18: 00063903 ld x18,0(x12) + 80007e1c: 00860613 addi x12,x12,8 + +0000000080007e20 : +Zkne_aes64esm_cg_cp_sbox_b103: + aes64esm x14, x4, x18 # perform operation + 80007e20: 37220733 aes64esm x14,x4,x18 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b103, Zkne_aes64esm_cg_cp_sbox_b103_str) + 80007e24: 00013383 ld x7,0(x2) + 80007e28: 00e38c63 beq x7,x14,80007e40 + 80007e2c: 2ec0346f jal x8,8000b118 + 80007e30: 80007e20 .word 0x80007e20 + 80007e34: 00000000 .word 0x00000000 + 80007e38: 8001f0d0 .word 0x8001f0d0 + 80007e3c: 00000000 .word 0x00000000 + 80007e40: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x6868686868686868 + 80007e44: 00063083 ld x1,0(x12) + 80007e48: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x6868686868686868 + 80007e4c: 00063703 ld x14,0(x12) + 80007e50: 00860613 addi x12,x12,8 + +0000000080007e54 : +Zkne_aes64esm_cg_cp_sbox_b104: + aes64esm x19, x1, x14 # perform operation + 80007e54: 36e089b3 aes64esm x19,x1,x14 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b104, Zkne_aes64esm_cg_cp_sbox_b104_str) + 80007e58: 00013383 ld x7,0(x2) + 80007e5c: 01338c63 beq x7,x19,80007e74 + 80007e60: 2b80346f jal x8,8000b118 + 80007e64: 80007e54 .word 0x80007e54 + 80007e68: 00000000 .word 0x00000000 + 80007e6c: 8001f10a .word 0x8001f10a + 80007e70: 00000000 .word 0x00000000 + 80007e74: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x6969696969696969 + 80007e78: 00063303 ld x6,0(x12) + 80007e7c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x6969696969696969 + 80007e80: 00063f83 ld x31,0(x12) + 80007e84: 00860613 addi x12,x12,8 + +0000000080007e88 : +Zkne_aes64esm_cg_cp_sbox_b105: + aes64esm x9, x6, x31 # perform operation + 80007e88: 37f304b3 aes64esm x9,x6,x31 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b105, Zkne_aes64esm_cg_cp_sbox_b105_str) + 80007e8c: 00013383 ld x7,0(x2) + 80007e90: 00938c63 beq x7,x9,80007ea8 + 80007e94: 2840346f jal x8,8000b118 + 80007e98: 80007e88 .word 0x80007e88 + 80007e9c: 00000000 .word 0x00000000 + 80007ea0: 8001f144 .word 0x8001f144 + 80007ea4: 00000000 .word 0x00000000 + 80007ea8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x6a6a6a6a6a6a6a6a + 80007eac: 00063083 ld x1,0(x12) + 80007eb0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x6a6a6a6a6a6a6a6a + 80007eb4: 00063283 ld x5,0(x12) + 80007eb8: 00860613 addi x12,x12,8 + +0000000080007ebc : +Zkne_aes64esm_cg_cp_sbox_b106: + aes64esm x24, x1, x5 # perform operation + 80007ebc: 36508c33 aes64esm x24,x1,x5 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b106, Zkne_aes64esm_cg_cp_sbox_b106_str) + 80007ec0: 00013383 ld x7,0(x2) + 80007ec4: 01838c63 beq x7,x24,80007edc + 80007ec8: 2500346f jal x8,8000b118 + 80007ecc: 80007ebc .word 0x80007ebc + 80007ed0: 00000000 .word 0x00000000 + 80007ed4: 8001f17e .word 0x8001f17e + 80007ed8: 00000000 .word 0x00000000 + 80007edc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x6b6b6b6b6b6b6b6b + 80007ee0: 00063d83 ld x27,0(x12) + 80007ee4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x6b6b6b6b6b6b6b6b + 80007ee8: 00063f03 ld x30,0(x12) + 80007eec: 00860613 addi x12,x12,8 + +0000000080007ef0 : +Zkne_aes64esm_cg_cp_sbox_b107: + aes64esm x1, x27, x30 # perform operation + 80007ef0: 37ed80b3 aes64esm x1,x27,x30 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b107, Zkne_aes64esm_cg_cp_sbox_b107_str) + 80007ef4: 00013383 ld x7,0(x2) + 80007ef8: 00138c63 beq x7,x1,80007f10 + 80007efc: 21c0346f jal x8,8000b118 + 80007f00: 80007ef0 .word 0x80007ef0 + 80007f04: 00000000 .word 0x00000000 + 80007f08: 8001f1b8 .word 0x8001f1b8 + 80007f0c: 00000000 .word 0x00000000 + 80007f10: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x6c6c6c6c6c6c6c6c + 80007f14: 00063a03 ld x20,0(x12) + 80007f18: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x6c6c6c6c6c6c6c6c + 80007f1c: 00063b03 ld x22,0(x12) + 80007f20: 00860613 addi x12,x12,8 + +0000000080007f24 : +Zkne_aes64esm_cg_cp_sbox_b108: + aes64esm x17, x20, x22 # perform operation + 80007f24: 376a08b3 aes64esm x17,x20,x22 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b108, Zkne_aes64esm_cg_cp_sbox_b108_str) + 80007f28: 00013383 ld x7,0(x2) + 80007f2c: 01138c63 beq x7,x17,80007f44 + 80007f30: 1e80346f jal x8,8000b118 + 80007f34: 80007f24 .word 0x80007f24 + 80007f38: 00000000 .word 0x00000000 + 80007f3c: 8001f1f2 .word 0x8001f1f2 + 80007f40: 00000000 .word 0x00000000 + 80007f44: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x6d6d6d6d6d6d6d6d + 80007f48: 00063203 ld x4,0(x12) + 80007f4c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x6d6d6d6d6d6d6d6d + 80007f50: 00063a83 ld x21,0(x12) + 80007f54: 00860613 addi x12,x12,8 + +0000000080007f58 : +Zkne_aes64esm_cg_cp_sbox_b109: + aes64esm x9, x4, x21 # perform operation + 80007f58: 375204b3 aes64esm x9,x4,x21 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b109, Zkne_aes64esm_cg_cp_sbox_b109_str) + 80007f5c: 00013383 ld x7,0(x2) + 80007f60: 00938c63 beq x7,x9,80007f78 + 80007f64: 1b40346f jal x8,8000b118 + 80007f68: 80007f58 .word 0x80007f58 + 80007f6c: 00000000 .word 0x00000000 + 80007f70: 8001f22c .word 0x8001f22c + 80007f74: 00000000 .word 0x00000000 + 80007f78: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x6e6e6e6e6e6e6e6e + 80007f7c: 00063783 ld x15,0(x12) + 80007f80: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x6e6e6e6e6e6e6e6e + 80007f84: 00063303 ld x6,0(x12) + 80007f88: 00860613 addi x12,x12,8 + +0000000080007f8c : +Zkne_aes64esm_cg_cp_sbox_b110: + aes64esm x30, x15, x6 # perform operation + 80007f8c: 36678f33 aes64esm x30,x15,x6 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b110, Zkne_aes64esm_cg_cp_sbox_b110_str) + 80007f90: 00013383 ld x7,0(x2) + 80007f94: 01e38c63 beq x7,x30,80007fac + 80007f98: 1800346f jal x8,8000b118 + 80007f9c: 80007f8c .word 0x80007f8c + 80007fa0: 00000000 .word 0x00000000 + 80007fa4: 8001f266 .word 0x8001f266 + 80007fa8: 00000000 .word 0x00000000 + 80007fac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x6f6f6f6f6f6f6f6f + 80007fb0: 00063903 ld x18,0(x12) + 80007fb4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x6f6f6f6f6f6f6f6f + 80007fb8: 00063483 ld x9,0(x12) + 80007fbc: 00860613 addi x12,x12,8 + +0000000080007fc0 : +Zkne_aes64esm_cg_cp_sbox_b111: + aes64esm x30, x18, x9 # perform operation + 80007fc0: 36990f33 aes64esm x30,x18,x9 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b111, Zkne_aes64esm_cg_cp_sbox_b111_str) + 80007fc4: 00013383 ld x7,0(x2) + 80007fc8: 01e38c63 beq x7,x30,80007fe0 + 80007fcc: 14c0346f jal x8,8000b118 + 80007fd0: 80007fc0 .word 0x80007fc0 + 80007fd4: 00000000 .word 0x00000000 + 80007fd8: 8001f2a0 .word 0x8001f2a0 + 80007fdc: 00000000 .word 0x00000000 + 80007fe0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x7070707070707070 + 80007fe4: 00063303 ld x6,0(x12) + 80007fe8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x7070707070707070 + 80007fec: 00063983 ld x19,0(x12) + 80007ff0: 00860613 addi x12,x12,8 + +0000000080007ff4 : +Zkne_aes64esm_cg_cp_sbox_b112: + aes64esm x25, x6, x19 # perform operation + 80007ff4: 37330cb3 aes64esm x25,x6,x19 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b112, Zkne_aes64esm_cg_cp_sbox_b112_str) + 80007ff8: 00013383 ld x7,0(x2) + 80007ffc: 01938c63 beq x7,x25,80008014 + 80008000: 1180346f jal x8,8000b118 + 80008004: 80007ff4 .word 0x80007ff4 + 80008008: 00000000 .word 0x00000000 + 8000800c: 8001f2da .word 0x8001f2da + 80008010: 00000000 .word 0x00000000 + 80008014: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7171717171717171 + 80008018: 00063783 ld x15,0(x12) + 8000801c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x7171717171717171 + 80008020: 00063f83 ld x31,0(x12) + 80008024: 00860613 addi x12,x12,8 + +0000000080008028 : +Zkne_aes64esm_cg_cp_sbox_b113: + aes64esm x14, x15, x31 # perform operation + 80008028: 37f78733 aes64esm x14,x15,x31 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b113, Zkne_aes64esm_cg_cp_sbox_b113_str) + 8000802c: 00013383 ld x7,0(x2) + 80008030: 00e38c63 beq x7,x14,80008048 + 80008034: 0e40346f jal x8,8000b118 + 80008038: 80008028 .word 0x80008028 + 8000803c: 00000000 .word 0x00000000 + 80008040: 8001f314 .word 0x8001f314 + 80008044: 00000000 .word 0x00000000 + 80008048: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7272727272727272 + 8000804c: 00063f03 ld x30,0(x12) + 80008050: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x7272727272727272 + 80008054: 00063e03 ld x28,0(x12) + 80008058: 00860613 addi x12,x12,8 + +000000008000805c : +Zkne_aes64esm_cg_cp_sbox_b114: + aes64esm x21, x30, x28 # perform operation + 8000805c: 37cf0ab3 aes64esm x21,x30,x28 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b114, Zkne_aes64esm_cg_cp_sbox_b114_str) + 80008060: 00013383 ld x7,0(x2) + 80008064: 01538c63 beq x7,x21,8000807c + 80008068: 0b00346f jal x8,8000b118 + 8000806c: 8000805c .word 0x8000805c + 80008070: 00000000 .word 0x00000000 + 80008074: 8001f34e .word 0x8001f34e + 80008078: 00000000 .word 0x00000000 + 8000807c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x7373737373737373 + 80008080: 00063783 ld x15,0(x12) + 80008084: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0x7373737373737373 + 80008088: 00063a03 ld x20,0(x12) + 8000808c: 00860613 addi x12,x12,8 + +0000000080008090 : +Zkne_aes64esm_cg_cp_sbox_b115: + aes64esm x13, x15, x20 # perform operation + 80008090: 374786b3 aes64esm x13,x15,x20 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b115, Zkne_aes64esm_cg_cp_sbox_b115_str) + 80008094: 00013383 ld x7,0(x2) + 80008098: 00d38c63 beq x7,x13,800080b0 + 8000809c: 07c0346f jal x8,8000b118 + 800080a0: 80008090 .word 0x80008090 + 800080a4: 00000000 .word 0x00000000 + 800080a8: 8001f388 .word 0x8001f388 + 800080ac: 00000000 .word 0x00000000 + 800080b0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x7474747474747474 + 800080b4: 00063f83 ld x31,0(x12) + 800080b8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0x7474747474747474 + 800080bc: 00063903 ld x18,0(x12) + 800080c0: 00860613 addi x12,x12,8 + +00000000800080c4 : +Zkne_aes64esm_cg_cp_sbox_b116: + aes64esm x11, x31, x18 # perform operation + 800080c4: 372f85b3 aes64esm x11,x31,x18 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b116, Zkne_aes64esm_cg_cp_sbox_b116_str) + 800080c8: 00013383 ld x7,0(x2) + 800080cc: 00b38c63 beq x7,x11,800080e4 + 800080d0: 0480346f jal x8,8000b118 + 800080d4: 800080c4 .word 0x800080c4 + 800080d8: 00000000 .word 0x00000000 + 800080dc: 8001f3c2 .word 0x8001f3c2 + 800080e0: 00000000 .word 0x00000000 + 800080e4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7575757575757575 + 800080e8: 00063a03 ld x20,0(x12) + 800080ec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x7575757575757575 + 800080f0: 00063683 ld x13,0(x12) + 800080f4: 00860613 addi x12,x12,8 + +00000000800080f8 : +Zkne_aes64esm_cg_cp_sbox_b117: + aes64esm x19, x20, x13 # perform operation + 800080f8: 36da09b3 aes64esm x19,x20,x13 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b117, Zkne_aes64esm_cg_cp_sbox_b117_str) + 800080fc: 00013383 ld x7,0(x2) + 80008100: 01338c63 beq x7,x19,80008118 + 80008104: 0140346f jal x8,8000b118 + 80008108: 800080f8 .word 0x800080f8 + 8000810c: 00000000 .word 0x00000000 + 80008110: 8001f3fc .word 0x8001f3fc + 80008114: 00000000 .word 0x00000000 + 80008118: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7676767676767676 + 8000811c: 00063483 ld x9,0(x12) + 80008120: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x7676767676767676 + 80008124: 00063803 ld x16,0(x12) + 80008128: 00860613 addi x12,x12,8 + +000000008000812c : +Zkne_aes64esm_cg_cp_sbox_b118: + aes64esm x5, x9, x16 # perform operation + 8000812c: 370482b3 aes64esm x5,x9,x16 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b118, Zkne_aes64esm_cg_cp_sbox_b118_str) + 80008130: 00013383 ld x7,0(x2) + 80008134: 00538c63 beq x7,x5,8000814c + 80008138: 7e10246f jal x8,8000b118 + 8000813c: 8000812c .word 0x8000812c + 80008140: 00000000 .word 0x00000000 + 80008144: 8001f436 .word 0x8001f436 + 80008148: 00000000 .word 0x00000000 + 8000814c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x7777777777777777 + 80008150: 00063c83 ld x25,0(x12) + 80008154: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x7777777777777777 + 80008158: 00063a83 ld x21,0(x12) + 8000815c: 00860613 addi x12,x12,8 + +0000000080008160 : +Zkne_aes64esm_cg_cp_sbox_b119: + aes64esm x27, x25, x21 # perform operation + 80008160: 375c8db3 aes64esm x27,x25,x21 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b119, Zkne_aes64esm_cg_cp_sbox_b119_str) + 80008164: 00013383 ld x7,0(x2) + 80008168: 01b38c63 beq x7,x27,80008180 + 8000816c: 7ad0246f jal x8,8000b118 + 80008170: 80008160 .word 0x80008160 + 80008174: 00000000 .word 0x00000000 + 80008178: 8001f470 .word 0x8001f470 + 8000817c: 00000000 .word 0x00000000 + 80008180: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x7878787878787878 + 80008184: 00063803 ld x16,0(x12) + 80008188: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0x7878787878787878 + 8000818c: 00063b83 ld x23,0(x12) + 80008190: 00860613 addi x12,x12,8 + +0000000080008194 : +Zkne_aes64esm_cg_cp_sbox_b120: + aes64esm x18, x16, x23 # perform operation + 80008194: 37780933 aes64esm x18,x16,x23 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b120, Zkne_aes64esm_cg_cp_sbox_b120_str) + 80008198: 00013383 ld x7,0(x2) + 8000819c: 01238c63 beq x7,x18,800081b4 + 800081a0: 7790246f jal x8,8000b118 + 800081a4: 80008194 .word 0x80008194 + 800081a8: 00000000 .word 0x00000000 + 800081ac: 8001f4aa .word 0x8001f4aa + 800081b0: 00000000 .word 0x00000000 + 800081b4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7979797979797979 + 800081b8: 00063483 ld x9,0(x12) + 800081bc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x7979797979797979 + 800081c0: 00063283 ld x5,0(x12) + 800081c4: 00860613 addi x12,x12,8 + +00000000800081c8 : +Zkne_aes64esm_cg_cp_sbox_b121: + aes64esm x24, x9, x5 # perform operation + 800081c8: 36548c33 aes64esm x24,x9,x5 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b121, Zkne_aes64esm_cg_cp_sbox_b121_str) + 800081cc: 00013383 ld x7,0(x2) + 800081d0: 01838c63 beq x7,x24,800081e8 + 800081d4: 7450246f jal x8,8000b118 + 800081d8: 800081c8 .word 0x800081c8 + 800081dc: 00000000 .word 0x00000000 + 800081e0: 8001f4e4 .word 0x8001f4e4 + 800081e4: 00000000 .word 0x00000000 + 800081e8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7a7a7a7a7a7a7a7a + 800081ec: 00063b83 ld x23,0(x12) + 800081f0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs2: x29 = 0x7a7a7a7a7a7a7a7a + 800081f4: 00063e83 ld x29,0(x12) + 800081f8: 00860613 addi x12,x12,8 + +00000000800081fc : +Zkne_aes64esm_cg_cp_sbox_b122: + aes64esm x1, x23, x29 # perform operation + 800081fc: 37db80b3 aes64esm x1,x23,x29 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b122, Zkne_aes64esm_cg_cp_sbox_b122_str) + 80008200: 00013383 ld x7,0(x2) + 80008204: 00138c63 beq x7,x1,8000821c + 80008208: 7110246f jal x8,8000b118 + 8000820c: 800081fc .word 0x800081fc + 80008210: 00000000 .word 0x00000000 + 80008214: 8001f51e .word 0x8001f51e + 80008218: 00000000 .word 0x00000000 + 8000821c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7b7b7b7b7b7b7b7b + 80008220: 00063a03 ld x20,0(x12) + 80008224: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0x7b7b7b7b7b7b7b7b + 80008228: 00063f03 ld x30,0(x12) + 8000822c: 00860613 addi x12,x12,8 + +0000000080008230 : +Zkne_aes64esm_cg_cp_sbox_b123: + aes64esm x27, x20, x30 # perform operation + 80008230: 37ea0db3 aes64esm x27,x20,x30 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b123, Zkne_aes64esm_cg_cp_sbox_b123_str) + 80008234: 00013383 ld x7,0(x2) + 80008238: 01b38c63 beq x7,x27,80008250 + 8000823c: 6dd0246f jal x8,8000b118 + 80008240: 80008230 .word 0x80008230 + 80008244: 00000000 .word 0x00000000 + 80008248: 8001f558 .word 0x8001f558 + 8000824c: 00000000 .word 0x00000000 + 80008250: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x7c7c7c7c7c7c7c7c + 80008254: 00063c83 ld x25,0(x12) + 80008258: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x7c7c7c7c7c7c7c7c + 8000825c: 00063783 ld x15,0(x12) + 80008260: 00860613 addi x12,x12,8 + +0000000080008264 : +Zkne_aes64esm_cg_cp_sbox_b124: + aes64esm x22, x25, x15 # perform operation + 80008264: 36fc8b33 aes64esm x22,x25,x15 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b124, Zkne_aes64esm_cg_cp_sbox_b124_str) + 80008268: 00013383 ld x7,0(x2) + 8000826c: 01638c63 beq x7,x22,80008284 + 80008270: 6a90246f jal x8,8000b118 + 80008274: 80008264 .word 0x80008264 + 80008278: 00000000 .word 0x00000000 + 8000827c: 8001f592 .word 0x8001f592 + 80008280: 00000000 .word 0x00000000 + 80008284: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x7d7d7d7d7d7d7d7d + 80008288: 00063b83 ld x23,0(x12) + 8000828c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x7d7d7d7d7d7d7d7d + 80008290: 00063483 ld x9,0(x12) + 80008294: 00860613 addi x12,x12,8 + +0000000080008298 : +Zkne_aes64esm_cg_cp_sbox_b125: + aes64esm x4, x23, x9 # perform operation + 80008298: 369b8233 aes64esm x4,x23,x9 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b125, Zkne_aes64esm_cg_cp_sbox_b125_str) + 8000829c: 00013383 ld x7,0(x2) + 800082a0: 00438c63 beq x7,x4,800082b8 + 800082a4: 6750246f jal x8,8000b118 + 800082a8: 80008298 .word 0x80008298 + 800082ac: 00000000 .word 0x00000000 + 800082b0: 8001f5cc .word 0x8001f5cc + 800082b4: 00000000 .word 0x00000000 + 800082b8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x7e7e7e7e7e7e7e7e + 800082bc: 00063c83 ld x25,0(x12) + 800082c0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x7e7e7e7e7e7e7e7e + 800082c4: 00063303 ld x6,0(x12) + 800082c8: 00860613 addi x12,x12,8 + +00000000800082cc : +Zkne_aes64esm_cg_cp_sbox_b126: + aes64esm x23, x25, x6 # perform operation + 800082cc: 366c8bb3 aes64esm x23,x25,x6 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b126, Zkne_aes64esm_cg_cp_sbox_b126_str) + 800082d0: 00013383 ld x7,0(x2) + 800082d4: 01738c63 beq x7,x23,800082ec + 800082d8: 6410246f jal x8,8000b118 + 800082dc: 800082cc .word 0x800082cc + 800082e0: 00000000 .word 0x00000000 + 800082e4: 8001f606 .word 0x8001f606 + 800082e8: 00000000 .word 0x00000000 + 800082ec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x7f7f7f7f7f7f7f7f + 800082f0: 00063483 ld x9,0(x12) + 800082f4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x7f7f7f7f7f7f7f7f + 800082f8: 00063803 ld x16,0(x12) + 800082fc: 00860613 addi x12,x12,8 + +0000000080008300 : +Zkne_aes64esm_cg_cp_sbox_b127: + aes64esm x21, x9, x16 # perform operation + 80008300: 37048ab3 aes64esm x21,x9,x16 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b127, Zkne_aes64esm_cg_cp_sbox_b127_str) + 80008304: 00013383 ld x7,0(x2) + 80008308: 01538c63 beq x7,x21,80008320 + 8000830c: 60d0246f jal x8,8000b118 + 80008310: 80008300 .word 0x80008300 + 80008314: 00000000 .word 0x00000000 + 80008318: 8001f640 .word 0x8001f640 + 8000831c: 00000000 .word 0x00000000 + 80008320: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x8080808080808080 + 80008324: 00063883 ld x17,0(x12) + 80008328: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0x8080808080808080 + 8000832c: 00063783 ld x15,0(x12) + 80008330: 00860613 addi x12,x12,8 + +0000000080008334 : +Zkne_aes64esm_cg_cp_sbox_b128: + aes64esm x16, x17, x15 # perform operation + 80008334: 36f88833 aes64esm x16,x17,x15 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b128, Zkne_aes64esm_cg_cp_sbox_b128_str) + 80008338: 00013383 ld x7,0(x2) + 8000833c: 01038c63 beq x7,x16,80008354 + 80008340: 5d90246f jal x8,8000b118 + 80008344: 80008334 .word 0x80008334 + 80008348: 00000000 .word 0x00000000 + 8000834c: 8001f67a .word 0x8001f67a + 80008350: 00000000 .word 0x00000000 + 80008354: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x8181818181818181 + 80008358: 00063a03 ld x20,0(x12) + 8000835c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x8181818181818181 + 80008360: 00063703 ld x14,0(x12) + 80008364: 00860613 addi x12,x12,8 + +0000000080008368 : +Zkne_aes64esm_cg_cp_sbox_b129: + aes64esm x15, x20, x14 # perform operation + 80008368: 36ea07b3 aes64esm x15,x20,x14 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b129, Zkne_aes64esm_cg_cp_sbox_b129_str) + 8000836c: 00013383 ld x7,0(x2) + 80008370: 00f38c63 beq x7,x15,80008388 + 80008374: 5a50246f jal x8,8000b118 + 80008378: 80008368 .word 0x80008368 + 8000837c: 00000000 .word 0x00000000 + 80008380: 8001f6b4 .word 0x8001f6b4 + 80008384: 00000000 .word 0x00000000 + 80008388: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x8282828282828282 + 8000838c: 00063203 ld x4,0(x12) + 80008390: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x8282828282828282 + 80008394: 00063f83 ld x31,0(x12) + 80008398: 00860613 addi x12,x12,8 + +000000008000839c : +Zkne_aes64esm_cg_cp_sbox_b130: + aes64esm x22, x4, x31 # perform operation + 8000839c: 37f20b33 aes64esm x22,x4,x31 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b130, Zkne_aes64esm_cg_cp_sbox_b130_str) + 800083a0: 00013383 ld x7,0(x2) + 800083a4: 01638c63 beq x7,x22,800083bc + 800083a8: 5710246f jal x8,8000b118 + 800083ac: 8000839c .word 0x8000839c + 800083b0: 00000000 .word 0x00000000 + 800083b4: 8001f6ee .word 0x8001f6ee + 800083b8: 00000000 .word 0x00000000 + 800083bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x8383838383838383 + 800083c0: 00063c03 ld x24,0(x12) + 800083c4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x8383838383838383 + 800083c8: 00063b03 ld x22,0(x12) + 800083cc: 00860613 addi x12,x12,8 + +00000000800083d0 : +Zkne_aes64esm_cg_cp_sbox_b131: + aes64esm x10, x24, x22 # perform operation + 800083d0: 376c0533 aes64esm x10,x24,x22 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b131, Zkne_aes64esm_cg_cp_sbox_b131_str) + 800083d4: 00013383 ld x7,0(x2) + 800083d8: 00a38c63 beq x7,x10,800083f0 + 800083dc: 53d0246f jal x8,8000b118 + 800083e0: 800083d0 .word 0x800083d0 + 800083e4: 00000000 .word 0x00000000 + 800083e8: 8001f728 .word 0x8001f728 + 800083ec: 00000000 .word 0x00000000 + 800083f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x8484848484848484 + 800083f4: 00063c83 ld x25,0(x12) + 800083f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x8484848484848484 + 800083fc: 00063283 ld x5,0(x12) + 80008400: 00860613 addi x12,x12,8 + +0000000080008404 : +Zkne_aes64esm_cg_cp_sbox_b132: + aes64esm x10, x25, x5 # perform operation + 80008404: 365c8533 aes64esm x10,x25,x5 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b132, Zkne_aes64esm_cg_cp_sbox_b132_str) + 80008408: 00013383 ld x7,0(x2) + 8000840c: 00a38c63 beq x7,x10,80008424 + 80008410: 5090246f jal x8,8000b118 + 80008414: 80008404 .word 0x80008404 + 80008418: 00000000 .word 0x00000000 + 8000841c: 8001f762 .word 0x8001f762 + 80008420: 00000000 .word 0x00000000 + 80008424: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x8585858585858585 + 80008428: 00063f83 ld x31,0(x12) + 8000842c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0x8585858585858585 + 80008430: 00063483 ld x9,0(x12) + 80008434: 00860613 addi x12,x12,8 + +0000000080008438 : +Zkne_aes64esm_cg_cp_sbox_b133: + aes64esm x21, x31, x9 # perform operation + 80008438: 369f8ab3 aes64esm x21,x31,x9 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b133, Zkne_aes64esm_cg_cp_sbox_b133_str) + 8000843c: 00013383 ld x7,0(x2) + 80008440: 01538c63 beq x7,x21,80008458 + 80008444: 4d50246f jal x8,8000b118 + 80008448: 80008438 .word 0x80008438 + 8000844c: 00000000 .word 0x00000000 + 80008450: 8001f79c .word 0x8001f79c + 80008454: 00000000 .word 0x00000000 + 80008458: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x8686868686868686 + 8000845c: 00063283 ld x5,0(x12) + 80008460: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x8686868686868686 + 80008464: 00063503 ld x10,0(x12) + 80008468: 00860613 addi x12,x12,8 + +000000008000846c : +Zkne_aes64esm_cg_cp_sbox_b134: + aes64esm x15, x5, x10 # perform operation + 8000846c: 36a287b3 aes64esm x15,x5,x10 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b134, Zkne_aes64esm_cg_cp_sbox_b134_str) + 80008470: 00013383 ld x7,0(x2) + 80008474: 00f38c63 beq x7,x15,8000848c + 80008478: 4a10246f jal x8,8000b118 + 8000847c: 8000846c .word 0x8000846c + 80008480: 00000000 .word 0x00000000 + 80008484: 8001f7d6 .word 0x8001f7d6 + 80008488: 00000000 .word 0x00000000 + 8000848c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x8787878787878787 + 80008490: 00063f03 ld x30,0(x12) + 80008494: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x8787878787878787 + 80008498: 00063983 ld x19,0(x12) + 8000849c: 00860613 addi x12,x12,8 + +00000000800084a0 : +Zkne_aes64esm_cg_cp_sbox_b135: + aes64esm x21, x30, x19 # perform operation + 800084a0: 373f0ab3 aes64esm x21,x30,x19 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b135, Zkne_aes64esm_cg_cp_sbox_b135_str) + 800084a4: 00013383 ld x7,0(x2) + 800084a8: 01538c63 beq x7,x21,800084c0 + 800084ac: 46d0246f jal x8,8000b118 + 800084b0: 800084a0 .word 0x800084a0 + 800084b4: 00000000 .word 0x00000000 + 800084b8: 8001f810 .word 0x8001f810 + 800084bc: 00000000 .word 0x00000000 + 800084c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x8888888888888888 + 800084c4: 00063f83 ld x31,0(x12) + 800084c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x8888888888888888 + 800084cc: 00063c83 ld x25,0(x12) + 800084d0: 00860613 addi x12,x12,8 + +00000000800084d4 : +Zkne_aes64esm_cg_cp_sbox_b136: + aes64esm x1, x31, x25 # perform operation + 800084d4: 379f80b3 aes64esm x1,x31,x25 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b136, Zkne_aes64esm_cg_cp_sbox_b136_str) + 800084d8: 00013383 ld x7,0(x2) + 800084dc: 00138c63 beq x7,x1,800084f4 + 800084e0: 4390246f jal x8,8000b118 + 800084e4: 800084d4 .word 0x800084d4 + 800084e8: 00000000 .word 0x00000000 + 800084ec: 8001f84a .word 0x8001f84a + 800084f0: 00000000 .word 0x00000000 + 800084f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x8989898989898989 + 800084f8: 00063203 ld x4,0(x12) + 800084fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0x8989898989898989 + 80008500: 00063083 ld x1,0(x12) + 80008504: 00860613 addi x12,x12,8 + +0000000080008508 : +Zkne_aes64esm_cg_cp_sbox_b137: + aes64esm x15, x4, x1 # perform operation + 80008508: 361207b3 aes64esm x15,x4,x1 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b137, Zkne_aes64esm_cg_cp_sbox_b137_str) + 8000850c: 00013383 ld x7,0(x2) + 80008510: 00f38c63 beq x7,x15,80008528 + 80008514: 4050246f jal x8,8000b118 + 80008518: 80008508 .word 0x80008508 + 8000851c: 00000000 .word 0x00000000 + 80008520: 8001f884 .word 0x8001f884 + 80008524: 00000000 .word 0x00000000 + 80008528: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x8a8a8a8a8a8a8a8a + 8000852c: 00063503 ld x10,0(x12) + 80008530: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0x8a8a8a8a8a8a8a8a + 80008534: 00063303 ld x6,0(x12) + 80008538: 00860613 addi x12,x12,8 + +000000008000853c : +Zkne_aes64esm_cg_cp_sbox_b138: + aes64esm x11, x10, x6 # perform operation + 8000853c: 366505b3 aes64esm x11,x10,x6 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b138, Zkne_aes64esm_cg_cp_sbox_b138_str) + 80008540: 00013383 ld x7,0(x2) + 80008544: 00b38c63 beq x7,x11,8000855c + 80008548: 3d10246f jal x8,8000b118 + 8000854c: 8000853c .word 0x8000853c + 80008550: 00000000 .word 0x00000000 + 80008554: 8001f8be .word 0x8001f8be + 80008558: 00000000 .word 0x00000000 + 8000855c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x8b8b8b8b8b8b8b8b + 80008560: 00063a83 ld x21,0(x12) + 80008564: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0x8b8b8b8b8b8b8b8b + 80008568: 00063883 ld x17,0(x12) + 8000856c: 00860613 addi x12,x12,8 + +0000000080008570 : +Zkne_aes64esm_cg_cp_sbox_b139: + aes64esm x11, x21, x17 # perform operation + 80008570: 371a85b3 aes64esm x11,x21,x17 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b139, Zkne_aes64esm_cg_cp_sbox_b139_str) + 80008574: 00013383 ld x7,0(x2) + 80008578: 00b38c63 beq x7,x11,80008590 + 8000857c: 39d0246f jal x8,8000b118 + 80008580: 80008570 .word 0x80008570 + 80008584: 00000000 .word 0x00000000 + 80008588: 8001f8f8 .word 0x8001f8f8 + 8000858c: 00000000 .word 0x00000000 + 80008590: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x8c8c8c8c8c8c8c8c + 80008594: 00063b83 ld x23,0(x12) + 80008598: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0x8c8c8c8c8c8c8c8c + 8000859c: 00063a83 ld x21,0(x12) + 800085a0: 00860613 addi x12,x12,8 + +00000000800085a4 : +Zkne_aes64esm_cg_cp_sbox_b140: + aes64esm x29, x23, x21 # perform operation + 800085a4: 375b8eb3 aes64esm x29,x23,x21 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b140, Zkne_aes64esm_cg_cp_sbox_b140_str) + 800085a8: 00013383 ld x7,0(x2) + 800085ac: 01d38c63 beq x7,x29,800085c4 + 800085b0: 3690246f jal x8,8000b118 + 800085b4: 800085a4 .word 0x800085a4 + 800085b8: 00000000 .word 0x00000000 + 800085bc: 8001f932 .word 0x8001f932 + 800085c0: 00000000 .word 0x00000000 + 800085c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x8d8d8d8d8d8d8d8d + 800085c8: 00063a03 ld x20,0(x12) + 800085cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x8d8d8d8d8d8d8d8d + 800085d0: 00063c03 ld x24,0(x12) + 800085d4: 00860613 addi x12,x12,8 + +00000000800085d8 : +Zkne_aes64esm_cg_cp_sbox_b141: + aes64esm x3, x20, x24 # perform operation + 800085d8: 378a01b3 aes64esm x3,x20,x24 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b141, Zkne_aes64esm_cg_cp_sbox_b141_str) + 800085dc: 00013383 ld x7,0(x2) + 800085e0: 00338c63 beq x7,x3,800085f8 + 800085e4: 3350246f jal x8,8000b118 + 800085e8: 800085d8 .word 0x800085d8 + 800085ec: 00000000 .word 0x00000000 + 800085f0: 8001f96c .word 0x8001f96c + 800085f4: 00000000 .word 0x00000000 + 800085f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x8e8e8e8e8e8e8e8e + 800085fc: 00063a03 ld x20,0(x12) + 80008600: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0x8e8e8e8e8e8e8e8e + 80008604: 00063703 ld x14,0(x12) + 80008608: 00860613 addi x12,x12,8 + +000000008000860c : +Zkne_aes64esm_cg_cp_sbox_b142: + aes64esm x1, x20, x14 # perform operation + 8000860c: 36ea00b3 aes64esm x1,x20,x14 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b142, Zkne_aes64esm_cg_cp_sbox_b142_str) + 80008610: 00013383 ld x7,0(x2) + 80008614: 00138c63 beq x7,x1,8000862c + 80008618: 3010246f jal x8,8000b118 + 8000861c: 8000860c .word 0x8000860c + 80008620: 00000000 .word 0x00000000 + 80008624: 8001f9a6 .word 0x8001f9a6 + 80008628: 00000000 .word 0x00000000 + 8000862c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x8f8f8f8f8f8f8f8f + 80008630: 00063803 ld x16,0(x12) + 80008634: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0x8f8f8f8f8f8f8f8f + 80008638: 00063d03 ld x26,0(x12) + 8000863c: 00860613 addi x12,x12,8 + +0000000080008640 : +Zkne_aes64esm_cg_cp_sbox_b143: + aes64esm x15, x16, x26 # perform operation + 80008640: 37a807b3 aes64esm x15,x16,x26 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b143, Zkne_aes64esm_cg_cp_sbox_b143_str) + 80008644: 00013383 ld x7,0(x2) + 80008648: 00f38c63 beq x7,x15,80008660 + 8000864c: 2cd0246f jal x8,8000b118 + 80008650: 80008640 .word 0x80008640 + 80008654: 00000000 .word 0x00000000 + 80008658: 8001f9e0 .word 0x8001f9e0 + 8000865c: 00000000 .word 0x00000000 + 80008660: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x9090909090909090 + 80008664: 00063703 ld x14,0(x12) + 80008668: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0x9090909090909090 + 8000866c: 00063683 ld x13,0(x12) + 80008670: 00860613 addi x12,x12,8 + +0000000080008674 : +Zkne_aes64esm_cg_cp_sbox_b144: + aes64esm x9, x14, x13 # perform operation + 80008674: 36d704b3 aes64esm x9,x14,x13 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b144, Zkne_aes64esm_cg_cp_sbox_b144_str) + 80008678: 00013383 ld x7,0(x2) + 8000867c: 00938c63 beq x7,x9,80008694 + 80008680: 2990246f jal x8,8000b118 + 80008684: 80008674 .word 0x80008674 + 80008688: 00000000 .word 0x00000000 + 8000868c: 8001fa1a .word 0x8001fa1a + 80008690: 00000000 .word 0x00000000 + 80008694: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x9191919191919191 + 80008698: 00063083 ld x1,0(x12) + 8000869c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0x9191919191919191 + 800086a0: 00063f83 ld x31,0(x12) + 800086a4: 00860613 addi x12,x12,8 + +00000000800086a8 : +Zkne_aes64esm_cg_cp_sbox_b145: + aes64esm x10, x1, x31 # perform operation + 800086a8: 37f08533 aes64esm x10,x1,x31 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b145, Zkne_aes64esm_cg_cp_sbox_b145_str) + 800086ac: 00013383 ld x7,0(x2) + 800086b0: 00a38c63 beq x7,x10,800086c8 + 800086b4: 2650246f jal x8,8000b118 + 800086b8: 800086a8 .word 0x800086a8 + 800086bc: 00000000 .word 0x00000000 + 800086c0: 8001fa54 .word 0x8001fa54 + 800086c4: 00000000 .word 0x00000000 + 800086c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x9292929292929292 + 800086cc: 00063d03 ld x26,0(x12) + 800086d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0x9292929292929292 + 800086d4: 00063503 ld x10,0(x12) + 800086d8: 00860613 addi x12,x12,8 + +00000000800086dc : +Zkne_aes64esm_cg_cp_sbox_b146: + aes64esm x18, x26, x10 # perform operation + 800086dc: 36ad0933 aes64esm x18,x26,x10 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b146, Zkne_aes64esm_cg_cp_sbox_b146_str) + 800086e0: 00013383 ld x7,0(x2) + 800086e4: 01238c63 beq x7,x18,800086fc + 800086e8: 2310246f jal x8,8000b118 + 800086ec: 800086dc .word 0x800086dc + 800086f0: 00000000 .word 0x00000000 + 800086f4: 8001fa8e .word 0x8001fa8e + 800086f8: 00000000 .word 0x00000000 + 800086fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x9393939393939393 + 80008700: 00063583 ld x11,0(x12) + 80008704: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x9393939393939393 + 80008708: 00063d83 ld x27,0(x12) + 8000870c: 00860613 addi x12,x12,8 + +0000000080008710 : +Zkne_aes64esm_cg_cp_sbox_b147: + aes64esm x9, x11, x27 # perform operation + 80008710: 37b584b3 aes64esm x9,x11,x27 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b147, Zkne_aes64esm_cg_cp_sbox_b147_str) + 80008714: 00013383 ld x7,0(x2) + 80008718: 00938c63 beq x7,x9,80008730 + 8000871c: 1fd0246f jal x8,8000b118 + 80008720: 80008710 .word 0x80008710 + 80008724: 00000000 .word 0x00000000 + 80008728: 8001fac8 .word 0x8001fac8 + 8000872c: 00000000 .word 0x00000000 + 80008730: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x9494949494949494 + 80008734: 00063583 ld x11,0(x12) + 80008738: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x9494949494949494 + 8000873c: 00063c83 ld x25,0(x12) + 80008740: 00860613 addi x12,x12,8 + +0000000080008744 : +Zkne_aes64esm_cg_cp_sbox_b148: + aes64esm x13, x11, x25 # perform operation + 80008744: 379586b3 aes64esm x13,x11,x25 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b148, Zkne_aes64esm_cg_cp_sbox_b148_str) + 80008748: 00013383 ld x7,0(x2) + 8000874c: 00d38c63 beq x7,x13,80008764 + 80008750: 1c90246f jal x8,8000b118 + 80008754: 80008744 .word 0x80008744 + 80008758: 00000000 .word 0x00000000 + 8000875c: 8001fb02 .word 0x8001fb02 + 80008760: 00000000 .word 0x00000000 + 80008764: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x9595959595959595 + 80008768: 00063d03 ld x26,0(x12) + 8000876c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0x9595959595959595 + 80008770: 00063283 ld x5,0(x12) + 80008774: 00860613 addi x12,x12,8 + +0000000080008778 : +Zkne_aes64esm_cg_cp_sbox_b149: + aes64esm x23, x26, x5 # perform operation + 80008778: 365d0bb3 aes64esm x23,x26,x5 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b149, Zkne_aes64esm_cg_cp_sbox_b149_str) + 8000877c: 00013383 ld x7,0(x2) + 80008780: 01738c63 beq x7,x23,80008798 + 80008784: 1950246f jal x8,8000b118 + 80008788: 80008778 .word 0x80008778 + 8000878c: 00000000 .word 0x00000000 + 80008790: 8001fb3c .word 0x8001fb3c + 80008794: 00000000 .word 0x00000000 + 80008798: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x9696969696969696 + 8000879c: 00063c83 ld x25,0(x12) + 800087a0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0x9696969696969696 + 800087a4: 00063c03 ld x24,0(x12) + 800087a8: 00860613 addi x12,x12,8 + +00000000800087ac : +Zkne_aes64esm_cg_cp_sbox_b150: + aes64esm x14, x25, x24 # perform operation + 800087ac: 378c8733 aes64esm x14,x25,x24 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b150, Zkne_aes64esm_cg_cp_sbox_b150_str) + 800087b0: 00013383 ld x7,0(x2) + 800087b4: 00e38c63 beq x7,x14,800087cc + 800087b8: 1610246f jal x8,8000b118 + 800087bc: 800087ac .word 0x800087ac + 800087c0: 00000000 .word 0x00000000 + 800087c4: 8001fb76 .word 0x8001fb76 + 800087c8: 00000000 .word 0x00000000 + 800087cc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x9797979797979797 + 800087d0: 00063783 ld x15,0(x12) + 800087d4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0x9797979797979797 + 800087d8: 00063c83 ld x25,0(x12) + 800087dc: 00860613 addi x12,x12,8 + +00000000800087e0 : +Zkne_aes64esm_cg_cp_sbox_b151: + aes64esm x17, x15, x25 # perform operation + 800087e0: 379788b3 aes64esm x17,x15,x25 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b151, Zkne_aes64esm_cg_cp_sbox_b151_str) + 800087e4: 00013383 ld x7,0(x2) + 800087e8: 01138c63 beq x7,x17,80008800 + 800087ec: 12d0246f jal x8,8000b118 + 800087f0: 800087e0 .word 0x800087e0 + 800087f4: 00000000 .word 0x00000000 + 800087f8: 8001fbb0 .word 0x8001fbb0 + 800087fc: 00000000 .word 0x00000000 + 80008800: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0x9898989898989898 + 80008804: 00063683 ld x13,0(x12) + 80008808: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x9898989898989898 + 8000880c: 00063b03 ld x22,0(x12) + 80008810: 00860613 addi x12,x12,8 + +0000000080008814 : +Zkne_aes64esm_cg_cp_sbox_b152: + aes64esm x21, x13, x22 # perform operation + 80008814: 37668ab3 aes64esm x21,x13,x22 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b152, Zkne_aes64esm_cg_cp_sbox_b152_str) + 80008818: 00013383 ld x7,0(x2) + 8000881c: 01538c63 beq x7,x21,80008834 + 80008820: 0f90246f jal x8,8000b118 + 80008824: 80008814 .word 0x80008814 + 80008828: 00000000 .word 0x00000000 + 8000882c: 8001fbea .word 0x8001fbea + 80008830: 00000000 .word 0x00000000 + 80008834: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x9999999999999999 + 80008838: 00063583 ld x11,0(x12) + 8000883c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0x9999999999999999 + 80008840: 00063e03 ld x28,0(x12) + 80008844: 00860613 addi x12,x12,8 + +0000000080008848 : +Zkne_aes64esm_cg_cp_sbox_b153: + aes64esm x13, x11, x28 # perform operation + 80008848: 37c586b3 aes64esm x13,x11,x28 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b153, Zkne_aes64esm_cg_cp_sbox_b153_str) + 8000884c: 00013383 ld x7,0(x2) + 80008850: 00d38c63 beq x7,x13,80008868 + 80008854: 0c50246f jal x8,8000b118 + 80008858: 80008848 .word 0x80008848 + 8000885c: 00000000 .word 0x00000000 + 80008860: 8001fc24 .word 0x8001fc24 + 80008864: 00000000 .word 0x00000000 + 80008868: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x9a9a9a9a9a9a9a9a + 8000886c: 00063203 ld x4,0(x12) + 80008870: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0x9a9a9a9a9a9a9a9a + 80008874: 00063d83 ld x27,0(x12) + 80008878: 00860613 addi x12,x12,8 + +000000008000887c : +Zkne_aes64esm_cg_cp_sbox_b154: + aes64esm x14, x4, x27 # perform operation + 8000887c: 37b20733 aes64esm x14,x4,x27 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b154, Zkne_aes64esm_cg_cp_sbox_b154_str) + 80008880: 00013383 ld x7,0(x2) + 80008884: 00e38c63 beq x7,x14,8000889c + 80008888: 0910246f jal x8,8000b118 + 8000888c: 8000887c .word 0x8000887c + 80008890: 00000000 .word 0x00000000 + 80008894: 8001fc5e .word 0x8001fc5e + 80008898: 00000000 .word 0x00000000 + 8000889c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x9b9b9b9b9b9b9b9b + 800088a0: 00063a83 ld x21,0(x12) + 800088a4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0x9b9b9b9b9b9b9b9b + 800088a8: 00063203 ld x4,0(x12) + 800088ac: 00860613 addi x12,x12,8 + +00000000800088b0 : +Zkne_aes64esm_cg_cp_sbox_b155: + aes64esm x11, x21, x4 # perform operation + 800088b0: 364a85b3 aes64esm x11,x21,x4 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b155, Zkne_aes64esm_cg_cp_sbox_b155_str) + 800088b4: 00013383 ld x7,0(x2) + 800088b8: 00b38c63 beq x7,x11,800088d0 + 800088bc: 05d0246f jal x8,8000b118 + 800088c0: 800088b0 .word 0x800088b0 + 800088c4: 00000000 .word 0x00000000 + 800088c8: 8001fc98 .word 0x8001fc98 + 800088cc: 00000000 .word 0x00000000 + 800088d0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x9c9c9c9c9c9c9c9c + 800088d4: 00063203 ld x4,0(x12) + 800088d8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0x9c9c9c9c9c9c9c9c + 800088dc: 00063b03 ld x22,0(x12) + 800088e0: 00860613 addi x12,x12,8 + +00000000800088e4 : +Zkne_aes64esm_cg_cp_sbox_b156: + aes64esm x5, x4, x22 # perform operation + 800088e4: 376202b3 aes64esm x5,x4,x22 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b156, Zkne_aes64esm_cg_cp_sbox_b156_str) + 800088e8: 00013383 ld x7,0(x2) + 800088ec: 00538c63 beq x7,x5,80008904 + 800088f0: 0290246f jal x8,8000b118 + 800088f4: 800088e4 .word 0x800088e4 + 800088f8: 00000000 .word 0x00000000 + 800088fc: 8001fcd2 .word 0x8001fcd2 + 80008900: 00000000 .word 0x00000000 + 80008904: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x9d9d9d9d9d9d9d9d + 80008908: 00063f83 ld x31,0(x12) + 8000890c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0x9d9d9d9d9d9d9d9d + 80008910: 00063983 ld x19,0(x12) + 80008914: 00860613 addi x12,x12,8 + +0000000080008918 : +Zkne_aes64esm_cg_cp_sbox_b157: + aes64esm x30, x31, x19 # perform operation + 80008918: 373f8f33 aes64esm x30,x31,x19 + # Check if x30 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x30, Zkne_aes64esm_cg_cp_sbox_b157, Zkne_aes64esm_cg_cp_sbox_b157_str) + 8000891c: 00013383 ld x7,0(x2) + 80008920: 01e38c63 beq x7,x30,80008938 + 80008924: 7f40246f jal x8,8000b118 + 80008928: 80008918 .word 0x80008918 + 8000892c: 00000000 .word 0x00000000 + 80008930: 8001fd0c .word 0x8001fd0c + 80008934: 00000000 .word 0x00000000 + 80008938: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x9e9e9e9e9e9e9e9e + 8000893c: 00063483 ld x9,0(x12) + 80008940: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x9e9e9e9e9e9e9e9e + 80008944: 00063803 ld x16,0(x12) + 80008948: 00860613 addi x12,x12,8 + +000000008000894c : +Zkne_aes64esm_cg_cp_sbox_b158: + aes64esm x3, x9, x16 # perform operation + 8000894c: 370481b3 aes64esm x3,x9,x16 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b158, Zkne_aes64esm_cg_cp_sbox_b158_str) + 80008950: 00013383 ld x7,0(x2) + 80008954: 00338c63 beq x7,x3,8000896c + 80008958: 7c00246f jal x8,8000b118 + 8000895c: 8000894c .word 0x8000894c + 80008960: 00000000 .word 0x00000000 + 80008964: 8001fd46 .word 0x8001fd46 + 80008968: 00000000 .word 0x00000000 + 8000896c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x9f9f9f9f9f9f9f9f + 80008970: 00063b03 ld x22,0(x12) + 80008974: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0x9f9f9f9f9f9f9f9f + 80008978: 00063803 ld x16,0(x12) + 8000897c: 00860613 addi x12,x12,8 + +0000000080008980 : +Zkne_aes64esm_cg_cp_sbox_b159: + aes64esm x9, x22, x16 # perform operation + 80008980: 370b04b3 aes64esm x9,x22,x16 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b159, Zkne_aes64esm_cg_cp_sbox_b159_str) + 80008984: 00013383 ld x7,0(x2) + 80008988: 00938c63 beq x7,x9,800089a0 + 8000898c: 78c0246f jal x8,8000b118 + 80008990: 80008980 .word 0x80008980 + 80008994: 00000000 .word 0x00000000 + 80008998: 8001fd80 .word 0x8001fd80 + 8000899c: 00000000 .word 0x00000000 + 800089a0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xa0a0a0a0a0a0a0a0 + 800089a4: 00063783 ld x15,0(x12) + 800089a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xa0a0a0a0a0a0a0a0 + 800089ac: 00063283 ld x5,0(x12) + 800089b0: 00860613 addi x12,x12,8 + +00000000800089b4 : +Zkne_aes64esm_cg_cp_sbox_b160: + aes64esm x1, x15, x5 # perform operation + 800089b4: 365780b3 aes64esm x1,x15,x5 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b160, Zkne_aes64esm_cg_cp_sbox_b160_str) + 800089b8: 00013383 ld x7,0(x2) + 800089bc: 00138c63 beq x7,x1,800089d4 + 800089c0: 7580246f jal x8,8000b118 + 800089c4: 800089b4 .word 0x800089b4 + 800089c8: 00000000 .word 0x00000000 + 800089cc: 8001fdba .word 0x8001fdba + 800089d0: 00000000 .word 0x00000000 + 800089d4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xa1a1a1a1a1a1a1a1 + 800089d8: 00063b83 ld x23,0(x12) + 800089dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xa1a1a1a1a1a1a1a1 + 800089e0: 00063683 ld x13,0(x12) + 800089e4: 00860613 addi x12,x12,8 + +00000000800089e8 : +Zkne_aes64esm_cg_cp_sbox_b161: + aes64esm x9, x23, x13 # perform operation + 800089e8: 36db84b3 aes64esm x9,x23,x13 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b161, Zkne_aes64esm_cg_cp_sbox_b161_str) + 800089ec: 00013383 ld x7,0(x2) + 800089f0: 00938c63 beq x7,x9,80008a08 + 800089f4: 7240246f jal x8,8000b118 + 800089f8: 800089e8 .word 0x800089e8 + 800089fc: 00000000 .word 0x00000000 + 80008a00: 8001fdf4 .word 0x8001fdf4 + 80008a04: 00000000 .word 0x00000000 + 80008a08: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xa2a2a2a2a2a2a2a2 + 80008a0c: 00063703 ld x14,0(x12) + 80008a10: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xa2a2a2a2a2a2a2a2 + 80008a14: 00063a03 ld x20,0(x12) + 80008a18: 00860613 addi x12,x12,8 + +0000000080008a1c : +Zkne_aes64esm_cg_cp_sbox_b162: + aes64esm x18, x14, x20 # perform operation + 80008a1c: 37470933 aes64esm x18,x14,x20 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b162, Zkne_aes64esm_cg_cp_sbox_b162_str) + 80008a20: 00013383 ld x7,0(x2) + 80008a24: 01238c63 beq x7,x18,80008a3c + 80008a28: 6f00246f jal x8,8000b118 + 80008a2c: 80008a1c .word 0x80008a1c + 80008a30: 00000000 .word 0x00000000 + 80008a34: 8001fe2e .word 0x8001fe2e + 80008a38: 00000000 .word 0x00000000 + 80008a3c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xa3a3a3a3a3a3a3a3 + 80008a40: 00063a03 ld x20,0(x12) + 80008a44: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xa3a3a3a3a3a3a3a3 + 80008a48: 00063f83 ld x31,0(x12) + 80008a4c: 00860613 addi x12,x12,8 + +0000000080008a50 : +Zkne_aes64esm_cg_cp_sbox_b163: + aes64esm x27, x20, x31 # perform operation + 80008a50: 37fa0db3 aes64esm x27,x20,x31 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b163, Zkne_aes64esm_cg_cp_sbox_b163_str) + 80008a54: 00013383 ld x7,0(x2) + 80008a58: 01b38c63 beq x7,x27,80008a70 + 80008a5c: 6bc0246f jal x8,8000b118 + 80008a60: 80008a50 .word 0x80008a50 + 80008a64: 00000000 .word 0x00000000 + 80008a68: 8001fe68 .word 0x8001fe68 + 80008a6c: 00000000 .word 0x00000000 + 80008a70: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xa4a4a4a4a4a4a4a4 + 80008a74: 00063f03 ld x30,0(x12) + 80008a78: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xa4a4a4a4a4a4a4a4 + 80008a7c: 00063083 ld x1,0(x12) + 80008a80: 00860613 addi x12,x12,8 + +0000000080008a84 : +Zkne_aes64esm_cg_cp_sbox_b164: + aes64esm x3, x30, x1 # perform operation + 80008a84: 361f01b3 aes64esm x3,x30,x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b164, Zkne_aes64esm_cg_cp_sbox_b164_str) + 80008a88: 00013383 ld x7,0(x2) + 80008a8c: 00338c63 beq x7,x3,80008aa4 + 80008a90: 6880246f jal x8,8000b118 + 80008a94: 80008a84 .word 0x80008a84 + 80008a98: 00000000 .word 0x00000000 + 80008a9c: 8001fea2 .word 0x8001fea2 + 80008aa0: 00000000 .word 0x00000000 + 80008aa4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xa5a5a5a5a5a5a5a5 + 80008aa8: 00063c83 ld x25,0(x12) + 80008aac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xa5a5a5a5a5a5a5a5 + 80008ab0: 00063903 ld x18,0(x12) + 80008ab4: 00860613 addi x12,x12,8 + +0000000080008ab8 : +Zkne_aes64esm_cg_cp_sbox_b165: + aes64esm x4, x25, x18 # perform operation + 80008ab8: 372c8233 aes64esm x4,x25,x18 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b165, Zkne_aes64esm_cg_cp_sbox_b165_str) + 80008abc: 00013383 ld x7,0(x2) + 80008ac0: 00438c63 beq x7,x4,80008ad8 + 80008ac4: 6540246f jal x8,8000b118 + 80008ac8: 80008ab8 .word 0x80008ab8 + 80008acc: 00000000 .word 0x00000000 + 80008ad0: 8001fedc .word 0x8001fedc + 80008ad4: 00000000 .word 0x00000000 + 80008ad8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xa6a6a6a6a6a6a6a6 + 80008adc: 00063183 ld x3,0(x12) + 80008ae0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xa6a6a6a6a6a6a6a6 + 80008ae4: 00063683 ld x13,0(x12) + 80008ae8: 00860613 addi x12,x12,8 + +0000000080008aec : +Zkne_aes64esm_cg_cp_sbox_b166: + aes64esm x9, x3, x13 # perform operation + 80008aec: 36d184b3 aes64esm x9,x3,x13 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b166, Zkne_aes64esm_cg_cp_sbox_b166_str) + 80008af0: 00013383 ld x7,0(x2) + 80008af4: 00938c63 beq x7,x9,80008b0c + 80008af8: 6200246f jal x8,8000b118 + 80008afc: 80008aec .word 0x80008aec + 80008b00: 00000000 .word 0x00000000 + 80008b04: 8001ff16 .word 0x8001ff16 + 80008b08: 00000000 .word 0x00000000 + 80008b0c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xa7a7a7a7a7a7a7a7 + 80008b10: 00063983 ld x19,0(x12) + 80008b14: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xa7a7a7a7a7a7a7a7 + 80008b18: 00063a83 ld x21,0(x12) + 80008b1c: 00860613 addi x12,x12,8 + +0000000080008b20 : +Zkne_aes64esm_cg_cp_sbox_b167: + aes64esm x3, x19, x21 # perform operation + 80008b20: 375981b3 aes64esm x3,x19,x21 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b167, Zkne_aes64esm_cg_cp_sbox_b167_str) + 80008b24: 00013383 ld x7,0(x2) + 80008b28: 00338c63 beq x7,x3,80008b40 + 80008b2c: 5ec0246f jal x8,8000b118 + 80008b30: 80008b20 .word 0x80008b20 + 80008b34: 00000000 .word 0x00000000 + 80008b38: 8001ff50 .word 0x8001ff50 + 80008b3c: 00000000 .word 0x00000000 + 80008b40: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xa8a8a8a8a8a8a8a8 + 80008b44: 00063983 ld x19,0(x12) + 80008b48: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xa8a8a8a8a8a8a8a8 + 80008b4c: 00063503 ld x10,0(x12) + 80008b50: 00860613 addi x12,x12,8 + +0000000080008b54 : +Zkne_aes64esm_cg_cp_sbox_b168: + aes64esm x16, x19, x10 # perform operation + 80008b54: 36a98833 aes64esm x16,x19,x10 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b168, Zkne_aes64esm_cg_cp_sbox_b168_str) + 80008b58: 00013383 ld x7,0(x2) + 80008b5c: 01038c63 beq x7,x16,80008b74 + 80008b60: 5b80246f jal x8,8000b118 + 80008b64: 80008b54 .word 0x80008b54 + 80008b68: 00000000 .word 0x00000000 + 80008b6c: 8001ff8a .word 0x8001ff8a + 80008b70: 00000000 .word 0x00000000 + 80008b74: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xa9a9a9a9a9a9a9a9 + 80008b78: 00063f83 ld x31,0(x12) + 80008b7c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xa9a9a9a9a9a9a9a9 + 80008b80: 00063e03 ld x28,0(x12) + 80008b84: 00860613 addi x12,x12,8 + +0000000080008b88 : +Zkne_aes64esm_cg_cp_sbox_b169: + aes64esm x25, x31, x28 # perform operation + 80008b88: 37cf8cb3 aes64esm x25,x31,x28 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b169, Zkne_aes64esm_cg_cp_sbox_b169_str) + 80008b8c: 00013383 ld x7,0(x2) + 80008b90: 01938c63 beq x7,x25,80008ba8 + 80008b94: 5840246f jal x8,8000b118 + 80008b98: 80008b88 .word 0x80008b88 + 80008b9c: 00000000 .word 0x00000000 + 80008ba0: 8001ffc4 .word 0x8001ffc4 + 80008ba4: 00000000 .word 0x00000000 + 80008ba8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xaaaaaaaaaaaaaaaa + 80008bac: 00063c03 ld x24,0(x12) + 80008bb0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xaaaaaaaaaaaaaaaa + 80008bb4: 00063f83 ld x31,0(x12) + 80008bb8: 00860613 addi x12,x12,8 + +0000000080008bbc : +Zkne_aes64esm_cg_cp_sbox_b170: + aes64esm x11, x24, x31 # perform operation + 80008bbc: 37fc05b3 aes64esm x11,x24,x31 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b170, Zkne_aes64esm_cg_cp_sbox_b170_str) + 80008bc0: 00013383 ld x7,0(x2) + 80008bc4: 00b38c63 beq x7,x11,80008bdc + 80008bc8: 5500246f jal x8,8000b118 + 80008bcc: 80008bbc .word 0x80008bbc + 80008bd0: 00000000 .word 0x00000000 + 80008bd4: 8001fffe .word 0x8001fffe + 80008bd8: 00000000 .word 0x00000000 + 80008bdc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xabababababababab + 80008be0: 00063903 ld x18,0(x12) + 80008be4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xabababababababab + 80008be8: 00063b03 ld x22,0(x12) + 80008bec: 00860613 addi x12,x12,8 + +0000000080008bf0 : +Zkne_aes64esm_cg_cp_sbox_b171: + aes64esm x25, x18, x22 # perform operation + 80008bf0: 37690cb3 aes64esm x25,x18,x22 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b171, Zkne_aes64esm_cg_cp_sbox_b171_str) + 80008bf4: 00013383 ld x7,0(x2) + 80008bf8: 01938c63 beq x7,x25,80008c10 + 80008bfc: 51c0246f jal x8,8000b118 + 80008c00: 80008bf0 .word 0x80008bf0 + 80008c04: 00000000 .word 0x00000000 + 80008c08: 80020038 .word 0x80020038 + 80008c0c: 00000000 .word 0x00000000 + 80008c10: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xacacacacacacacac + 80008c14: 00063883 ld x17,0(x12) + 80008c18: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xacacacacacacacac + 80008c1c: 00063503 ld x10,0(x12) + 80008c20: 00860613 addi x12,x12,8 + +0000000080008c24 : +Zkne_aes64esm_cg_cp_sbox_b172: + aes64esm x19, x17, x10 # perform operation + 80008c24: 36a889b3 aes64esm x19,x17,x10 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b172, Zkne_aes64esm_cg_cp_sbox_b172_str) + 80008c28: 00013383 ld x7,0(x2) + 80008c2c: 01338c63 beq x7,x19,80008c44 + 80008c30: 4e80246f jal x8,8000b118 + 80008c34: 80008c24 .word 0x80008c24 + 80008c38: 00000000 .word 0x00000000 + 80008c3c: 80020072 .word 0x80020072 + 80008c40: 00000000 .word 0x00000000 + 80008c44: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xadadadadadadadad + 80008c48: 00063803 ld x16,0(x12) + 80008c4c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xadadadadadadadad + 80008c50: 00063b83 ld x23,0(x12) + 80008c54: 00860613 addi x12,x12,8 + +0000000080008c58 : +Zkne_aes64esm_cg_cp_sbox_b173: + aes64esm x29, x16, x23 # perform operation + 80008c58: 37780eb3 aes64esm x29,x16,x23 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b173, Zkne_aes64esm_cg_cp_sbox_b173_str) + 80008c5c: 00013383 ld x7,0(x2) + 80008c60: 01d38c63 beq x7,x29,80008c78 + 80008c64: 4b40246f jal x8,8000b118 + 80008c68: 80008c58 .word 0x80008c58 + 80008c6c: 00000000 .word 0x00000000 + 80008c70: 800200ac .word 0x800200ac + 80008c74: 00000000 .word 0x00000000 + 80008c78: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xaeaeaeaeaeaeaeae + 80008c7c: 00063883 ld x17,0(x12) + 80008c80: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xaeaeaeaeaeaeaeae + 80008c84: 00063e03 ld x28,0(x12) + 80008c88: 00860613 addi x12,x12,8 + +0000000080008c8c : +Zkne_aes64esm_cg_cp_sbox_b174: + aes64esm x26, x17, x28 # perform operation + 80008c8c: 37c88d33 aes64esm x26,x17,x28 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b174, Zkne_aes64esm_cg_cp_sbox_b174_str) + 80008c90: 00013383 ld x7,0(x2) + 80008c94: 01a38c63 beq x7,x26,80008cac + 80008c98: 4800246f jal x8,8000b118 + 80008c9c: 80008c8c .word 0x80008c8c + 80008ca0: 00000000 .word 0x00000000 + 80008ca4: 800200e6 .word 0x800200e6 + 80008ca8: 00000000 .word 0x00000000 + 80008cac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xafafafafafafafaf + 80008cb0: 00063b03 ld x22,0(x12) + 80008cb4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs2: x14 = 0xafafafafafafafaf + 80008cb8: 00063703 ld x14,0(x12) + 80008cbc: 00860613 addi x12,x12,8 + +0000000080008cc0 : +Zkne_aes64esm_cg_cp_sbox_b175: + aes64esm x1, x22, x14 # perform operation + 80008cc0: 36eb00b3 aes64esm x1,x22,x14 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b175, Zkne_aes64esm_cg_cp_sbox_b175_str) + 80008cc4: 00013383 ld x7,0(x2) + 80008cc8: 00138c63 beq x7,x1,80008ce0 + 80008ccc: 44c0246f jal x8,8000b118 + 80008cd0: 80008cc0 .word 0x80008cc0 + 80008cd4: 00000000 .word 0x00000000 + 80008cd8: 80020120 .word 0x80020120 + 80008cdc: 00000000 .word 0x00000000 + 80008ce0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xb0b0b0b0b0b0b0b0 + 80008ce4: 00063e83 ld x29,0(x12) + 80008ce8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xb0b0b0b0b0b0b0b0 + 80008cec: 00063c83 ld x25,0(x12) + 80008cf0: 00860613 addi x12,x12,8 + +0000000080008cf4 : +Zkne_aes64esm_cg_cp_sbox_b176: + aes64esm x13, x29, x25 # perform operation + 80008cf4: 379e86b3 aes64esm x13,x29,x25 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b176, Zkne_aes64esm_cg_cp_sbox_b176_str) + 80008cf8: 00013383 ld x7,0(x2) + 80008cfc: 00d38c63 beq x7,x13,80008d14 + 80008d00: 4180246f jal x8,8000b118 + 80008d04: 80008cf4 .word 0x80008cf4 + 80008d08: 00000000 .word 0x00000000 + 80008d0c: 8002015a .word 0x8002015a + 80008d10: 00000000 .word 0x00000000 + 80008d14: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xb1b1b1b1b1b1b1b1 + 80008d18: 00063703 ld x14,0(x12) + 80008d1c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xb1b1b1b1b1b1b1b1 + 80008d20: 00063883 ld x17,0(x12) + 80008d24: 00860613 addi x12,x12,8 + +0000000080008d28 : +Zkne_aes64esm_cg_cp_sbox_b177: + aes64esm x4, x14, x17 # perform operation + 80008d28: 37170233 aes64esm x4,x14,x17 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b177, Zkne_aes64esm_cg_cp_sbox_b177_str) + 80008d2c: 00013383 ld x7,0(x2) + 80008d30: 00438c63 beq x7,x4,80008d48 + 80008d34: 3e40246f jal x8,8000b118 + 80008d38: 80008d28 .word 0x80008d28 + 80008d3c: 00000000 .word 0x00000000 + 80008d40: 80020194 .word 0x80020194 + 80008d44: 00000000 .word 0x00000000 + 80008d48: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xb2b2b2b2b2b2b2b2 + 80008d4c: 00063583 ld x11,0(x12) + 80008d50: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xb2b2b2b2b2b2b2b2 + 80008d54: 00063b03 ld x22,0(x12) + 80008d58: 00860613 addi x12,x12,8 + +0000000080008d5c : +Zkne_aes64esm_cg_cp_sbox_b178: + aes64esm x17, x11, x22 # perform operation + 80008d5c: 376588b3 aes64esm x17,x11,x22 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b178, Zkne_aes64esm_cg_cp_sbox_b178_str) + 80008d60: 00013383 ld x7,0(x2) + 80008d64: 01138c63 beq x7,x17,80008d7c + 80008d68: 3b00246f jal x8,8000b118 + 80008d6c: 80008d5c .word 0x80008d5c + 80008d70: 00000000 .word 0x00000000 + 80008d74: 800201ce .word 0x800201ce + 80008d78: 00000000 .word 0x00000000 + 80008d7c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xb3b3b3b3b3b3b3b3 + 80008d80: 00063783 ld x15,0(x12) + 80008d84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xb3b3b3b3b3b3b3b3 + 80008d88: 00063483 ld x9,0(x12) + 80008d8c: 00860613 addi x12,x12,8 + +0000000080008d90 : +Zkne_aes64esm_cg_cp_sbox_b179: + aes64esm x24, x15, x9 # perform operation + 80008d90: 36978c33 aes64esm x24,x15,x9 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b179, Zkne_aes64esm_cg_cp_sbox_b179_str) + 80008d94: 00013383 ld x7,0(x2) + 80008d98: 01838c63 beq x7,x24,80008db0 + 80008d9c: 37c0246f jal x8,8000b118 + 80008da0: 80008d90 .word 0x80008d90 + 80008da4: 00000000 .word 0x00000000 + 80008da8: 80020208 .word 0x80020208 + 80008dac: 00000000 .word 0x00000000 + 80008db0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xb4b4b4b4b4b4b4b4 + 80008db4: 00063c03 ld x24,0(x12) + 80008db8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xb4b4b4b4b4b4b4b4 + 80008dbc: 00063583 ld x11,0(x12) + 80008dc0: 00860613 addi x12,x12,8 + +0000000080008dc4 : +Zkne_aes64esm_cg_cp_sbox_b180: + aes64esm x4, x24, x11 # perform operation + 80008dc4: 36bc0233 aes64esm x4,x24,x11 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b180, Zkne_aes64esm_cg_cp_sbox_b180_str) + 80008dc8: 00013383 ld x7,0(x2) + 80008dcc: 00438c63 beq x7,x4,80008de4 + 80008dd0: 3480246f jal x8,8000b118 + 80008dd4: 80008dc4 .word 0x80008dc4 + 80008dd8: 00000000 .word 0x00000000 + 80008ddc: 80020242 .word 0x80020242 + 80008de0: 00000000 .word 0x00000000 + 80008de4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xb5b5b5b5b5b5b5b5 + 80008de8: 00063503 ld x10,0(x12) + 80008dec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xb5b5b5b5b5b5b5b5 + 80008df0: 00063083 ld x1,0(x12) + 80008df4: 00860613 addi x12,x12,8 + +0000000080008df8 : +Zkne_aes64esm_cg_cp_sbox_b181: + aes64esm x3, x10, x1 # perform operation + 80008df8: 361501b3 aes64esm x3,x10,x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b181, Zkne_aes64esm_cg_cp_sbox_b181_str) + 80008dfc: 00013383 ld x7,0(x2) + 80008e00: 00338c63 beq x7,x3,80008e18 + 80008e04: 3140246f jal x8,8000b118 + 80008e08: 80008df8 .word 0x80008df8 + 80008e0c: 00000000 .word 0x00000000 + 80008e10: 8002027c .word 0x8002027c + 80008e14: 00000000 .word 0x00000000 + 80008e18: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xb6b6b6b6b6b6b6b6 + 80008e1c: 00063303 ld x6,0(x12) + 80008e20: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs2: x30 = 0xb6b6b6b6b6b6b6b6 + 80008e24: 00063f03 ld x30,0(x12) + 80008e28: 00860613 addi x12,x12,8 + +0000000080008e2c : +Zkne_aes64esm_cg_cp_sbox_b182: + aes64esm x14, x6, x30 # perform operation + 80008e2c: 37e30733 aes64esm x14,x6,x30 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b182, Zkne_aes64esm_cg_cp_sbox_b182_str) + 80008e30: 00013383 ld x7,0(x2) + 80008e34: 00e38c63 beq x7,x14,80008e4c + 80008e38: 2e00246f jal x8,8000b118 + 80008e3c: 80008e2c .word 0x80008e2c + 80008e40: 00000000 .word 0x00000000 + 80008e44: 800202b6 .word 0x800202b6 + 80008e48: 00000000 .word 0x00000000 + 80008e4c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xb7b7b7b7b7b7b7b7 + 80008e50: 00063b83 ld x23,0(x12) + 80008e54: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xb7b7b7b7b7b7b7b7 + 80008e58: 00063a03 ld x20,0(x12) + 80008e5c: 00860613 addi x12,x12,8 + +0000000080008e60 : +Zkne_aes64esm_cg_cp_sbox_b183: + aes64esm x26, x23, x20 # perform operation + 80008e60: 374b8d33 aes64esm x26,x23,x20 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b183, Zkne_aes64esm_cg_cp_sbox_b183_str) + 80008e64: 00013383 ld x7,0(x2) + 80008e68: 01a38c63 beq x7,x26,80008e80 + 80008e6c: 2ac0246f jal x8,8000b118 + 80008e70: 80008e60 .word 0x80008e60 + 80008e74: 00000000 .word 0x00000000 + 80008e78: 800202f0 .word 0x800202f0 + 80008e7c: 00000000 .word 0x00000000 + 80008e80: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xb8b8b8b8b8b8b8b8 + 80008e84: 00063883 ld x17,0(x12) + 80008e88: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xb8b8b8b8b8b8b8b8 + 80008e8c: 00063183 ld x3,0(x12) + 80008e90: 00860613 addi x12,x12,8 + +0000000080008e94 : +Zkne_aes64esm_cg_cp_sbox_b184: + aes64esm x24, x17, x3 # perform operation + 80008e94: 36388c33 aes64esm x24,x17,x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b184, Zkne_aes64esm_cg_cp_sbox_b184_str) + 80008e98: 00013383 ld x7,0(x2) + 80008e9c: 01838c63 beq x7,x24,80008eb4 + 80008ea0: 2780246f jal x8,8000b118 + 80008ea4: 80008e94 .word 0x80008e94 + 80008ea8: 00000000 .word 0x00000000 + 80008eac: 8002032a .word 0x8002032a + 80008eb0: 00000000 .word 0x00000000 + 80008eb4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xb9b9b9b9b9b9b9b9 + 80008eb8: 00063883 ld x17,0(x12) + 80008ebc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xb9b9b9b9b9b9b9b9 + 80008ec0: 00063d83 ld x27,0(x12) + 80008ec4: 00860613 addi x12,x12,8 + +0000000080008ec8 : +Zkne_aes64esm_cg_cp_sbox_b185: + aes64esm x25, x17, x27 # perform operation + 80008ec8: 37b88cb3 aes64esm x25,x17,x27 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b185, Zkne_aes64esm_cg_cp_sbox_b185_str) + 80008ecc: 00013383 ld x7,0(x2) + 80008ed0: 01938c63 beq x7,x25,80008ee8 + 80008ed4: 2440246f jal x8,8000b118 + 80008ed8: 80008ec8 .word 0x80008ec8 + 80008edc: 00000000 .word 0x00000000 + 80008ee0: 80020364 .word 0x80020364 + 80008ee4: 00000000 .word 0x00000000 + 80008ee8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xbabababababababa + 80008eec: 00063983 ld x19,0(x12) + 80008ef0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs2: x9 = 0xbabababababababa + 80008ef4: 00063483 ld x9,0(x12) + 80008ef8: 00860613 addi x12,x12,8 + +0000000080008efc : +Zkne_aes64esm_cg_cp_sbox_b186: + aes64esm x28, x19, x9 # perform operation + 80008efc: 36998e33 aes64esm x28,x19,x9 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cp_sbox_b186, Zkne_aes64esm_cg_cp_sbox_b186_str) + 80008f00: 00013383 ld x7,0(x2) + 80008f04: 01c38c63 beq x7,x28,80008f1c + 80008f08: 2100246f jal x8,8000b118 + 80008f0c: 80008efc .word 0x80008efc + 80008f10: 00000000 .word 0x00000000 + 80008f14: 8002039e .word 0x8002039e + 80008f18: 00000000 .word 0x00000000 + 80008f1c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xbbbbbbbbbbbbbbbb + 80008f20: 00063d83 ld x27,0(x12) + 80008f24: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xbbbbbbbbbbbbbbbb + 80008f28: 00063083 ld x1,0(x12) + 80008f2c: 00860613 addi x12,x12,8 + +0000000080008f30 : +Zkne_aes64esm_cg_cp_sbox_b187: + aes64esm x23, x27, x1 # perform operation + 80008f30: 361d8bb3 aes64esm x23,x27,x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b187, Zkne_aes64esm_cg_cp_sbox_b187_str) + 80008f34: 00013383 ld x7,0(x2) + 80008f38: 01738c63 beq x7,x23,80008f50 + 80008f3c: 1dc0246f jal x8,8000b118 + 80008f40: 80008f30 .word 0x80008f30 + 80008f44: 00000000 .word 0x00000000 + 80008f48: 800203d8 .word 0x800203d8 + 80008f4c: 00000000 .word 0x00000000 + 80008f50: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xbcbcbcbcbcbcbcbc + 80008f54: 00063903 ld x18,0(x12) + 80008f58: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xbcbcbcbcbcbcbcbc + 80008f5c: 00063f83 ld x31,0(x12) + 80008f60: 00860613 addi x12,x12,8 + +0000000080008f64 : +Zkne_aes64esm_cg_cp_sbox_b188: + aes64esm x10, x18, x31 # perform operation + 80008f64: 37f90533 aes64esm x10,x18,x31 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b188, Zkne_aes64esm_cg_cp_sbox_b188_str) + 80008f68: 00013383 ld x7,0(x2) + 80008f6c: 00a38c63 beq x7,x10,80008f84 + 80008f70: 1a80246f jal x8,8000b118 + 80008f74: 80008f64 .word 0x80008f64 + 80008f78: 00000000 .word 0x00000000 + 80008f7c: 80020412 .word 0x80020412 + 80008f80: 00000000 .word 0x00000000 + 80008f84: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xbdbdbdbdbdbdbdbd + 80008f88: 00063783 ld x15,0(x12) + 80008f8c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xbdbdbdbdbdbdbdbd + 80008f90: 00063a03 ld x20,0(x12) + 80008f94: 00860613 addi x12,x12,8 + +0000000080008f98 : +Zkne_aes64esm_cg_cp_sbox_b189: + aes64esm x25, x15, x20 # perform operation + 80008f98: 37478cb3 aes64esm x25,x15,x20 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b189, Zkne_aes64esm_cg_cp_sbox_b189_str) + 80008f9c: 00013383 ld x7,0(x2) + 80008fa0: 01938c63 beq x7,x25,80008fb8 + 80008fa4: 1740246f jal x8,8000b118 + 80008fa8: 80008f98 .word 0x80008f98 + 80008fac: 00000000 .word 0x00000000 + 80008fb0: 8002044c .word 0x8002044c + 80008fb4: 00000000 .word 0x00000000 + 80008fb8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xbebebebebebebebe + 80008fbc: 00063d83 ld x27,0(x12) + 80008fc0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xbebebebebebebebe + 80008fc4: 00063c83 ld x25,0(x12) + 80008fc8: 00860613 addi x12,x12,8 + +0000000080008fcc : +Zkne_aes64esm_cg_cp_sbox_b190: + aes64esm x29, x27, x25 # perform operation + 80008fcc: 379d8eb3 aes64esm x29,x27,x25 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b190, Zkne_aes64esm_cg_cp_sbox_b190_str) + 80008fd0: 00013383 ld x7,0(x2) + 80008fd4: 01d38c63 beq x7,x29,80008fec + 80008fd8: 1400246f jal x8,8000b118 + 80008fdc: 80008fcc .word 0x80008fcc + 80008fe0: 00000000 .word 0x00000000 + 80008fe4: 80020486 .word 0x80020486 + 80008fe8: 00000000 .word 0x00000000 + 80008fec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xbfbfbfbfbfbfbfbf + 80008ff0: 00063b83 ld x23,0(x12) + 80008ff4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xbfbfbfbfbfbfbfbf + 80008ff8: 00063203 ld x4,0(x12) + 80008ffc: 00860613 addi x12,x12,8 + +0000000080009000 : +Zkne_aes64esm_cg_cp_sbox_b191: + aes64esm x25, x23, x4 # perform operation + 80009000: 364b8cb3 aes64esm x25,x23,x4 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b191, Zkne_aes64esm_cg_cp_sbox_b191_str) + 80009004: 00013383 ld x7,0(x2) + 80009008: 01938c63 beq x7,x25,80009020 + 8000900c: 10c0246f jal x8,8000b118 + 80009010: 80009000 .word 0x80009000 + 80009014: 00000000 .word 0x00000000 + 80009018: 800204c0 .word 0x800204c0 + 8000901c: 00000000 .word 0x00000000 + 80009020: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xc0c0c0c0c0c0c0c0 + 80009024: 00063503 ld x10,0(x12) + 80009028: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs2: x27 = 0xc0c0c0c0c0c0c0c0 + 8000902c: 00063d83 ld x27,0(x12) + 80009030: 00860613 addi x12,x12,8 + +0000000080009034 : +Zkne_aes64esm_cg_cp_sbox_b192: + aes64esm x16, x10, x27 # perform operation + 80009034: 37b50833 aes64esm x16,x10,x27 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b192, Zkne_aes64esm_cg_cp_sbox_b192_str) + 80009038: 00013383 ld x7,0(x2) + 8000903c: 01038c63 beq x7,x16,80009054 + 80009040: 0d80246f jal x8,8000b118 + 80009044: 80009034 .word 0x80009034 + 80009048: 00000000 .word 0x00000000 + 8000904c: 800204fa .word 0x800204fa + 80009050: 00000000 .word 0x00000000 + 80009054: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xc1c1c1c1c1c1c1c1 + 80009058: 00063a83 ld x21,0(x12) + 8000905c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xc1c1c1c1c1c1c1c1 + 80009060: 00063e03 ld x28,0(x12) + 80009064: 00860613 addi x12,x12,8 + +0000000080009068 : +Zkne_aes64esm_cg_cp_sbox_b193: + aes64esm x9, x21, x28 # perform operation + 80009068: 37ca84b3 aes64esm x9,x21,x28 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b193, Zkne_aes64esm_cg_cp_sbox_b193_str) + 8000906c: 00013383 ld x7,0(x2) + 80009070: 00938c63 beq x7,x9,80009088 + 80009074: 0a40246f jal x8,8000b118 + 80009078: 80009068 .word 0x80009068 + 8000907c: 00000000 .word 0x00000000 + 80009080: 80020534 .word 0x80020534 + 80009084: 00000000 .word 0x00000000 + 80009088: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xc2c2c2c2c2c2c2c2 + 8000908c: 00063b83 ld x23,0(x12) + 80009090: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xc2c2c2c2c2c2c2c2 + 80009094: 00063303 ld x6,0(x12) + 80009098: 00860613 addi x12,x12,8 + +000000008000909c : +Zkne_aes64esm_cg_cp_sbox_b194: + aes64esm x10, x23, x6 # perform operation + 8000909c: 366b8533 aes64esm x10,x23,x6 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b194, Zkne_aes64esm_cg_cp_sbox_b194_str) + 800090a0: 00013383 ld x7,0(x2) + 800090a4: 00a38c63 beq x7,x10,800090bc + 800090a8: 0700246f jal x8,8000b118 + 800090ac: 8000909c .word 0x8000909c + 800090b0: 00000000 .word 0x00000000 + 800090b4: 8002056e .word 0x8002056e + 800090b8: 00000000 .word 0x00000000 + 800090bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xc3c3c3c3c3c3c3c3 + 800090c0: 00063683 ld x13,0(x12) + 800090c4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xc3c3c3c3c3c3c3c3 + 800090c8: 00063583 ld x11,0(x12) + 800090cc: 00860613 addi x12,x12,8 + +00000000800090d0 : +Zkne_aes64esm_cg_cp_sbox_b195: + aes64esm x18, x13, x11 # perform operation + 800090d0: 36b68933 aes64esm x18,x13,x11 + # Check if x18 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x18, Zkne_aes64esm_cg_cp_sbox_b195, Zkne_aes64esm_cg_cp_sbox_b195_str) + 800090d4: 00013383 ld x7,0(x2) + 800090d8: 01238c63 beq x7,x18,800090f0 + 800090dc: 03c0246f jal x8,8000b118 + 800090e0: 800090d0 .word 0x800090d0 + 800090e4: 00000000 .word 0x00000000 + 800090e8: 800205a8 .word 0x800205a8 + 800090ec: 00000000 .word 0x00000000 + 800090f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xc4c4c4c4c4c4c4c4 + 800090f4: 00063b03 ld x22,0(x12) + 800090f8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs2: x18 = 0xc4c4c4c4c4c4c4c4 + 800090fc: 00063903 ld x18,0(x12) + 80009100: 00860613 addi x12,x12,8 + +0000000080009104 : +Zkne_aes64esm_cg_cp_sbox_b196: + aes64esm x20, x22, x18 # perform operation + 80009104: 372b0a33 aes64esm x20,x22,x18 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b196, Zkne_aes64esm_cg_cp_sbox_b196_str) + 80009108: 00013383 ld x7,0(x2) + 8000910c: 01438c63 beq x7,x20,80009124 + 80009110: 0080246f jal x8,8000b118 + 80009114: 80009104 .word 0x80009104 + 80009118: 00000000 .word 0x00000000 + 8000911c: 800205e2 .word 0x800205e2 + 80009120: 00000000 .word 0x00000000 + 80009124: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xc5c5c5c5c5c5c5c5 + 80009128: 00063c03 ld x24,0(x12) + 8000912c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0xc5c5c5c5c5c5c5c5 + 80009130: 00063983 ld x19,0(x12) + 80009134: 00860613 addi x12,x12,8 + +0000000080009138 : +Zkne_aes64esm_cg_cp_sbox_b197: + aes64esm x23, x24, x19 # perform operation + 80009138: 373c0bb3 aes64esm x23,x24,x19 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b197, Zkne_aes64esm_cg_cp_sbox_b197_str) + 8000913c: 00013383 ld x7,0(x2) + 80009140: 01738c63 beq x7,x23,80009158 + 80009144: 7d50146f jal x8,8000b118 + 80009148: 80009138 .word 0x80009138 + 8000914c: 00000000 .word 0x00000000 + 80009150: 8002061c .word 0x8002061c + 80009154: 00000000 .word 0x00000000 + 80009158: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xc6c6c6c6c6c6c6c6 + 8000915c: 00063d83 ld x27,0(x12) + 80009160: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xc6c6c6c6c6c6c6c6 + 80009164: 00063683 ld x13,0(x12) + 80009168: 00860613 addi x12,x12,8 + +000000008000916c : +Zkne_aes64esm_cg_cp_sbox_b198: + aes64esm x3, x27, x13 # perform operation + 8000916c: 36dd81b3 aes64esm x3,x27,x13 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b198, Zkne_aes64esm_cg_cp_sbox_b198_str) + 80009170: 00013383 ld x7,0(x2) + 80009174: 00338c63 beq x7,x3,8000918c + 80009178: 7a10146f jal x8,8000b118 + 8000917c: 8000916c .word 0x8000916c + 80009180: 00000000 .word 0x00000000 + 80009184: 80020656 .word 0x80020656 + 80009188: 00000000 .word 0x00000000 + 8000918c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xc7c7c7c7c7c7c7c7 + 80009190: 00063283 ld x5,0(x12) + 80009194: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xc7c7c7c7c7c7c7c7 + 80009198: 00063583 ld x11,0(x12) + 8000919c: 00860613 addi x12,x12,8 + +00000000800091a0 : +Zkne_aes64esm_cg_cp_sbox_b199: + aes64esm x13, x5, x11 # perform operation + 800091a0: 36b286b3 aes64esm x13,x5,x11 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b199, Zkne_aes64esm_cg_cp_sbox_b199_str) + 800091a4: 00013383 ld x7,0(x2) + 800091a8: 00d38c63 beq x7,x13,800091c0 + 800091ac: 76d0146f jal x8,8000b118 + 800091b0: 800091a0 .word 0x800091a0 + 800091b4: 00000000 .word 0x00000000 + 800091b8: 80020690 .word 0x80020690 + 800091bc: 00000000 .word 0x00000000 + 800091c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xc8c8c8c8c8c8c8c8 + 800091c4: 00063c83 ld x25,0(x12) + 800091c8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xc8c8c8c8c8c8c8c8 + 800091cc: 00063803 ld x16,0(x12) + 800091d0: 00860613 addi x12,x12,8 + +00000000800091d4 : +Zkne_aes64esm_cg_cp_sbox_b200: + aes64esm x20, x25, x16 # perform operation + 800091d4: 370c8a33 aes64esm x20,x25,x16 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b200, Zkne_aes64esm_cg_cp_sbox_b200_str) + 800091d8: 00013383 ld x7,0(x2) + 800091dc: 01438c63 beq x7,x20,800091f4 + 800091e0: 7390146f jal x8,8000b118 + 800091e4: 800091d4 .word 0x800091d4 + 800091e8: 00000000 .word 0x00000000 + 800091ec: 800206ca .word 0x800206ca + 800091f0: 00000000 .word 0x00000000 + 800091f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xc9c9c9c9c9c9c9c9 + 800091f8: 00063283 ld x5,0(x12) + 800091fc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xc9c9c9c9c9c9c9c9 + 80009200: 00063803 ld x16,0(x12) + 80009204: 00860613 addi x12,x12,8 + +0000000080009208 : +Zkne_aes64esm_cg_cp_sbox_b201: + aes64esm x15, x5, x16 # perform operation + 80009208: 370287b3 aes64esm x15,x5,x16 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b201, Zkne_aes64esm_cg_cp_sbox_b201_str) + 8000920c: 00013383 ld x7,0(x2) + 80009210: 00f38c63 beq x7,x15,80009228 + 80009214: 7050146f jal x8,8000b118 + 80009218: 80009208 .word 0x80009208 + 8000921c: 00000000 .word 0x00000000 + 80009220: 80020704 .word 0x80020704 + 80009224: 00000000 .word 0x00000000 + 80009228: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xcacacacacacacaca + 8000922c: 00063b83 ld x23,0(x12) + 80009230: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs2: x13 = 0xcacacacacacacaca + 80009234: 00063683 ld x13,0(x12) + 80009238: 00860613 addi x12,x12,8 + +000000008000923c : +Zkne_aes64esm_cg_cp_sbox_b202: + aes64esm x21, x23, x13 # perform operation + 8000923c: 36db8ab3 aes64esm x21,x23,x13 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b202, Zkne_aes64esm_cg_cp_sbox_b202_str) + 80009240: 00013383 ld x7,0(x2) + 80009244: 01538c63 beq x7,x21,8000925c + 80009248: 6d10146f jal x8,8000b118 + 8000924c: 8000923c .word 0x8000923c + 80009250: 00000000 .word 0x00000000 + 80009254: 8002073e .word 0x8002073e + 80009258: 00000000 .word 0x00000000 + 8000925c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xcbcbcbcbcbcbcbcb + 80009260: 00063183 ld x3,0(x12) + 80009264: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xcbcbcbcbcbcbcbcb + 80009268: 00063283 ld x5,0(x12) + 8000926c: 00860613 addi x12,x12,8 + +0000000080009270 : +Zkne_aes64esm_cg_cp_sbox_b203: + aes64esm x21, x3, x5 # perform operation + 80009270: 36518ab3 aes64esm x21,x3,x5 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b203, Zkne_aes64esm_cg_cp_sbox_b203_str) + 80009274: 00013383 ld x7,0(x2) + 80009278: 01538c63 beq x7,x21,80009290 + 8000927c: 69d0146f jal x8,8000b118 + 80009280: 80009270 .word 0x80009270 + 80009284: 00000000 .word 0x00000000 + 80009288: 80020778 .word 0x80020778 + 8000928c: 00000000 .word 0x00000000 + 80009290: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xcccccccccccccccc + 80009294: 00063f83 ld x31,0(x12) + 80009298: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xcccccccccccccccc + 8000929c: 00063503 ld x10,0(x12) + 800092a0: 00860613 addi x12,x12,8 + +00000000800092a4 : +Zkne_aes64esm_cg_cp_sbox_b204: + aes64esm x27, x31, x10 # perform operation + 800092a4: 36af8db3 aes64esm x27,x31,x10 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b204, Zkne_aes64esm_cg_cp_sbox_b204_str) + 800092a8: 00013383 ld x7,0(x2) + 800092ac: 01b38c63 beq x7,x27,800092c4 + 800092b0: 6690146f jal x8,8000b118 + 800092b4: 800092a4 .word 0x800092a4 + 800092b8: 00000000 .word 0x00000000 + 800092bc: 800207b2 .word 0x800207b2 + 800092c0: 00000000 .word 0x00000000 + 800092c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xcdcdcdcdcdcdcdcd + 800092c8: 00063783 ld x15,0(x12) + 800092cc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xcdcdcdcdcdcdcdcd + 800092d0: 00063b83 ld x23,0(x12) + 800092d4: 00860613 addi x12,x12,8 + +00000000800092d8 : +Zkne_aes64esm_cg_cp_sbox_b205: + aes64esm x9, x15, x23 # perform operation + 800092d8: 377784b3 aes64esm x9,x15,x23 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b205, Zkne_aes64esm_cg_cp_sbox_b205_str) + 800092dc: 00013383 ld x7,0(x2) + 800092e0: 00938c63 beq x7,x9,800092f8 + 800092e4: 6350146f jal x8,8000b118 + 800092e8: 800092d8 .word 0x800092d8 + 800092ec: 00000000 .word 0x00000000 + 800092f0: 800207ec .word 0x800207ec + 800092f4: 00000000 .word 0x00000000 + 800092f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xcececececececece + 800092fc: 00063c83 ld x25,0(x12) + 80009300: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xcececececececece + 80009304: 00063083 ld x1,0(x12) + 80009308: 00860613 addi x12,x12,8 + +000000008000930c : +Zkne_aes64esm_cg_cp_sbox_b206: + aes64esm x29, x25, x1 # perform operation + 8000930c: 361c8eb3 aes64esm x29,x25,x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b206, Zkne_aes64esm_cg_cp_sbox_b206_str) + 80009310: 00013383 ld x7,0(x2) + 80009314: 01d38c63 beq x7,x29,8000932c + 80009318: 6010146f jal x8,8000b118 + 8000931c: 8000930c .word 0x8000930c + 80009320: 00000000 .word 0x00000000 + 80009324: 80020826 .word 0x80020826 + 80009328: 00000000 .word 0x00000000 + 8000932c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0xcfcfcfcfcfcfcfcf + 80009330: 00063503 ld x10,0(x12) + 80009334: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xcfcfcfcfcfcfcfcf + 80009338: 00063b03 ld x22,0(x12) + 8000933c: 00860613 addi x12,x12,8 + +0000000080009340 : +Zkne_aes64esm_cg_cp_sbox_b207: + aes64esm x23, x10, x22 # perform operation + 80009340: 37650bb3 aes64esm x23,x10,x22 + # Check if x23 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x23, Zkne_aes64esm_cg_cp_sbox_b207, Zkne_aes64esm_cg_cp_sbox_b207_str) + 80009344: 00013383 ld x7,0(x2) + 80009348: 01738c63 beq x7,x23,80009360 + 8000934c: 5cd0146f jal x8,8000b118 + 80009350: 80009340 .word 0x80009340 + 80009354: 00000000 .word 0x00000000 + 80009358: 80020860 .word 0x80020860 + 8000935c: 00000000 .word 0x00000000 + 80009360: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xd0d0d0d0d0d0d0d0 + 80009364: 00063f03 ld x30,0(x12) + 80009368: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xd0d0d0d0d0d0d0d0 + 8000936c: 00063b03 ld x22,0(x12) + 80009370: 00860613 addi x12,x12,8 + +0000000080009374 : +Zkne_aes64esm_cg_cp_sbox_b208: + aes64esm x5, x30, x22 # perform operation + 80009374: 376f02b3 aes64esm x5,x30,x22 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b208, Zkne_aes64esm_cg_cp_sbox_b208_str) + 80009378: 00013383 ld x7,0(x2) + 8000937c: 00538c63 beq x7,x5,80009394 + 80009380: 5990146f jal x8,8000b118 + 80009384: 80009374 .word 0x80009374 + 80009388: 00000000 .word 0x00000000 + 8000938c: 8002089a .word 0x8002089a + 80009390: 00000000 .word 0x00000000 + 80009394: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xd1d1d1d1d1d1d1d1 + 80009398: 00063f83 ld x31,0(x12) + 8000939c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xd1d1d1d1d1d1d1d1 + 800093a0: 00063503 ld x10,0(x12) + 800093a4: 00860613 addi x12,x12,8 + +00000000800093a8 : +Zkne_aes64esm_cg_cp_sbox_b209: + aes64esm x24, x31, x10 # perform operation + 800093a8: 36af8c33 aes64esm x24,x31,x10 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b209, Zkne_aes64esm_cg_cp_sbox_b209_str) + 800093ac: 00013383 ld x7,0(x2) + 800093b0: 01838c63 beq x7,x24,800093c8 + 800093b4: 5650146f jal x8,8000b118 + 800093b8: 800093a8 .word 0x800093a8 + 800093bc: 00000000 .word 0x00000000 + 800093c0: 800208d4 .word 0x800208d4 + 800093c4: 00000000 .word 0x00000000 + 800093c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xd2d2d2d2d2d2d2d2 + 800093cc: 00063783 ld x15,0(x12) + 800093d0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xd2d2d2d2d2d2d2d2 + 800093d4: 00063303 ld x6,0(x12) + 800093d8: 00860613 addi x12,x12,8 + +00000000800093dc : +Zkne_aes64esm_cg_cp_sbox_b210: + aes64esm x13, x15, x6 # perform operation + 800093dc: 366786b3 aes64esm x13,x15,x6 + # Check if x13 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x13, Zkne_aes64esm_cg_cp_sbox_b210, Zkne_aes64esm_cg_cp_sbox_b210_str) + 800093e0: 00013383 ld x7,0(x2) + 800093e4: 00d38c63 beq x7,x13,800093fc + 800093e8: 5310146f jal x8,8000b118 + 800093ec: 800093dc .word 0x800093dc + 800093f0: 00000000 .word 0x00000000 + 800093f4: 8002090e .word 0x8002090e + 800093f8: 00000000 .word 0x00000000 + 800093fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xd3d3d3d3d3d3d3d3 + 80009400: 00063283 ld x5,0(x12) + 80009404: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs2: x28 = 0xd3d3d3d3d3d3d3d3 + 80009408: 00063e03 ld x28,0(x12) + 8000940c: 00860613 addi x12,x12,8 + +0000000080009410 : +Zkne_aes64esm_cg_cp_sbox_b211: + aes64esm x15, x5, x28 # perform operation + 80009410: 37c287b3 aes64esm x15,x5,x28 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b211, Zkne_aes64esm_cg_cp_sbox_b211_str) + 80009414: 00013383 ld x7,0(x2) + 80009418: 00f38c63 beq x7,x15,80009430 + 8000941c: 4fd0146f jal x8,8000b118 + 80009420: 80009410 .word 0x80009410 + 80009424: 00000000 .word 0x00000000 + 80009428: 80020948 .word 0x80020948 + 8000942c: 00000000 .word 0x00000000 + 80009430: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xd4d4d4d4d4d4d4d4 + 80009434: 00063d03 ld x26,0(x12) + 80009438: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs2: x21 = 0xd4d4d4d4d4d4d4d4 + 8000943c: 00063a83 ld x21,0(x12) + 80009440: 00860613 addi x12,x12,8 + +0000000080009444 : +Zkne_aes64esm_cg_cp_sbox_b212: + aes64esm x11, x26, x21 # perform operation + 80009444: 375d05b3 aes64esm x11,x26,x21 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b212, Zkne_aes64esm_cg_cp_sbox_b212_str) + 80009448: 00013383 ld x7,0(x2) + 8000944c: 00b38c63 beq x7,x11,80009464 + 80009450: 4c90146f jal x8,8000b118 + 80009454: 80009444 .word 0x80009444 + 80009458: 00000000 .word 0x00000000 + 8000945c: 80020982 .word 0x80020982 + 80009460: 00000000 .word 0x00000000 + 80009464: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xd5d5d5d5d5d5d5d5 + 80009468: 00063d03 ld x26,0(x12) + 8000946c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xd5d5d5d5d5d5d5d5 + 80009470: 00063783 ld x15,0(x12) + 80009474: 00860613 addi x12,x12,8 + +0000000080009478 : +Zkne_aes64esm_cg_cp_sbox_b213: + aes64esm x22, x26, x15 # perform operation + 80009478: 36fd0b33 aes64esm x22,x26,x15 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b213, Zkne_aes64esm_cg_cp_sbox_b213_str) + 8000947c: 00013383 ld x7,0(x2) + 80009480: 01638c63 beq x7,x22,80009498 + 80009484: 4950146f jal x8,8000b118 + 80009488: 80009478 .word 0x80009478 + 8000948c: 00000000 .word 0x00000000 + 80009490: 800209bc .word 0x800209bc + 80009494: 00000000 .word 0x00000000 + 80009498: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0xd6d6d6d6d6d6d6d6 + 8000949c: 00063783 ld x15,0(x12) + 800094a0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xd6d6d6d6d6d6d6d6 + 800094a4: 00063a03 ld x20,0(x12) + 800094a8: 00860613 addi x12,x12,8 + +00000000800094ac : +Zkne_aes64esm_cg_cp_sbox_b214: + aes64esm x3, x15, x20 # perform operation + 800094ac: 374781b3 aes64esm x3,x15,x20 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b214, Zkne_aes64esm_cg_cp_sbox_b214_str) + 800094b0: 00013383 ld x7,0(x2) + 800094b4: 00338c63 beq x7,x3,800094cc + 800094b8: 4610146f jal x8,8000b118 + 800094bc: 800094ac .word 0x800094ac + 800094c0: 00000000 .word 0x00000000 + 800094c4: 800209f6 .word 0x800209f6 + 800094c8: 00000000 .word 0x00000000 + 800094cc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xd7d7d7d7d7d7d7d7 + 800094d0: 00063583 ld x11,0(x12) + 800094d4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs2: x19 = 0xd7d7d7d7d7d7d7d7 + 800094d8: 00063983 ld x19,0(x12) + 800094dc: 00860613 addi x12,x12,8 + +00000000800094e0 : +Zkne_aes64esm_cg_cp_sbox_b215: + aes64esm x25, x11, x19 # perform operation + 800094e0: 37358cb3 aes64esm x25,x11,x19 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b215, Zkne_aes64esm_cg_cp_sbox_b215_str) + 800094e4: 00013383 ld x7,0(x2) + 800094e8: 01938c63 beq x7,x25,80009500 + 800094ec: 42d0146f jal x8,8000b118 + 800094f0: 800094e0 .word 0x800094e0 + 800094f4: 00000000 .word 0x00000000 + 800094f8: 80020a30 .word 0x80020a30 + 800094fc: 00000000 .word 0x00000000 + 80009500: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xd8d8d8d8d8d8d8d8 + 80009504: 00063203 ld x4,0(x12) + 80009508: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xd8d8d8d8d8d8d8d8 + 8000950c: 00063183 ld x3,0(x12) + 80009510: 00860613 addi x12,x12,8 + +0000000080009514 : +Zkne_aes64esm_cg_cp_sbox_b216: + aes64esm x15, x4, x3 # perform operation + 80009514: 363207b3 aes64esm x15,x4,x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b216, Zkne_aes64esm_cg_cp_sbox_b216_str) + 80009518: 00013383 ld x7,0(x2) + 8000951c: 00f38c63 beq x7,x15,80009534 + 80009520: 3f90146f jal x8,8000b118 + 80009524: 80009514 .word 0x80009514 + 80009528: 00000000 .word 0x00000000 + 8000952c: 80020a6a .word 0x80020a6a + 80009530: 00000000 .word 0x00000000 + 80009534: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xd9d9d9d9d9d9d9d9 + 80009538: 00063f03 ld x30,0(x12) + 8000953c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xd9d9d9d9d9d9d9d9 + 80009540: 00063b83 ld x23,0(x12) + 80009544: 00860613 addi x12,x12,8 + +0000000080009548 : +Zkne_aes64esm_cg_cp_sbox_b217: + aes64esm x16, x30, x23 # perform operation + 80009548: 377f0833 aes64esm x16,x30,x23 + # Check if x16 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x16, Zkne_aes64esm_cg_cp_sbox_b217, Zkne_aes64esm_cg_cp_sbox_b217_str) + 8000954c: 00013383 ld x7,0(x2) + 80009550: 01038c63 beq x7,x16,80009568 + 80009554: 3c50146f jal x8,8000b118 + 80009558: 80009548 .word 0x80009548 + 8000955c: 00000000 .word 0x00000000 + 80009560: 80020aa4 .word 0x80020aa4 + 80009564: 00000000 .word 0x00000000 + 80009568: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0xdadadadadadadada + 8000956c: 00063583 ld x11,0(x12) + 80009570: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xdadadadadadadada + 80009574: 00063a03 ld x20,0(x12) + 80009578: 00860613 addi x12,x12,8 + +000000008000957c : +Zkne_aes64esm_cg_cp_sbox_b218: + aes64esm x31, x11, x20 # perform operation + 8000957c: 37458fb3 aes64esm x31,x11,x20 + # Check if x31 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x31, Zkne_aes64esm_cg_cp_sbox_b218, Zkne_aes64esm_cg_cp_sbox_b218_str) + 80009580: 00013383 ld x7,0(x2) + 80009584: 01f38c63 beq x7,x31,8000959c + 80009588: 3910146f jal x8,8000b118 + 8000958c: 8000957c .word 0x8000957c + 80009590: 00000000 .word 0x00000000 + 80009594: 80020ade .word 0x80020ade + 80009598: 00000000 .word 0x00000000 + 8000959c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xdbdbdbdbdbdbdbdb + 800095a0: 00063b83 ld x23,0(x12) + 800095a4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xdbdbdbdbdbdbdbdb + 800095a8: 00063a03 ld x20,0(x12) + 800095ac: 00860613 addi x12,x12,8 + +00000000800095b0 : +Zkne_aes64esm_cg_cp_sbox_b219: + aes64esm x5, x23, x20 # perform operation + 800095b0: 374b82b3 aes64esm x5,x23,x20 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b219, Zkne_aes64esm_cg_cp_sbox_b219_str) + 800095b4: 00013383 ld x7,0(x2) + 800095b8: 00538c63 beq x7,x5,800095d0 + 800095bc: 35d0146f jal x8,8000b118 + 800095c0: 800095b0 .word 0x800095b0 + 800095c4: 00000000 .word 0x00000000 + 800095c8: 80020b18 .word 0x80020b18 + 800095cc: 00000000 .word 0x00000000 + 800095d0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0xdcdcdcdcdcdcdcdc + 800095d4: 00063d83 ld x27,0(x12) + 800095d8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xdcdcdcdcdcdcdcdc + 800095dc: 00063d03 ld x26,0(x12) + 800095e0: 00860613 addi x12,x12,8 + +00000000800095e4 : +Zkne_aes64esm_cg_cp_sbox_b220: + aes64esm x19, x27, x26 # perform operation + 800095e4: 37ad89b3 aes64esm x19,x27,x26 + # Check if x19 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x19, Zkne_aes64esm_cg_cp_sbox_b220, Zkne_aes64esm_cg_cp_sbox_b220_str) + 800095e8: 00013383 ld x7,0(x2) + 800095ec: 01338c63 beq x7,x19,80009604 + 800095f0: 3290146f jal x8,8000b118 + 800095f4: 800095e4 .word 0x800095e4 + 800095f8: 00000000 .word 0x00000000 + 800095fc: 80020b52 .word 0x80020b52 + 80009600: 00000000 .word 0x00000000 + 80009604: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xdddddddddddddddd + 80009608: 00063f03 ld x30,0(x12) + 8000960c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xdddddddddddddddd + 80009610: 00063d03 ld x26,0(x12) + 80009614: 00860613 addi x12,x12,8 + +0000000080009618 : +Zkne_aes64esm_cg_cp_sbox_b221: + aes64esm x1, x30, x26 # perform operation + 80009618: 37af00b3 aes64esm x1,x30,x26 + # Check if x1 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x1, Zkne_aes64esm_cg_cp_sbox_b221, Zkne_aes64esm_cg_cp_sbox_b221_str) + 8000961c: 00013383 ld x7,0(x2) + 80009620: 00138c63 beq x7,x1,80009638 + 80009624: 2f50146f jal x8,8000b118 + 80009628: 80009618 .word 0x80009618 + 8000962c: 00000000 .word 0x00000000 + 80009630: 80020b8c .word 0x80020b8c + 80009634: 00000000 .word 0x00000000 + 80009638: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xdededededededede + 8000963c: 00063203 ld x4,0(x12) + 80009640: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xdededededededede + 80009644: 00063503 ld x10,0(x12) + 80009648: 00860613 addi x12,x12,8 + +000000008000964c : +Zkne_aes64esm_cg_cp_sbox_b222: + aes64esm x9, x4, x10 # perform operation + 8000964c: 36a204b3 aes64esm x9,x4,x10 + # Check if x9 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x9, Zkne_aes64esm_cg_cp_sbox_b222, Zkne_aes64esm_cg_cp_sbox_b222_str) + 80009650: 00013383 ld x7,0(x2) + 80009654: 00938c63 beq x7,x9,8000966c + 80009658: 2c10146f jal x8,8000b118 + 8000965c: 8000964c .word 0x8000964c + 80009660: 00000000 .word 0x00000000 + 80009664: 80020bc6 .word 0x80020bc6 + 80009668: 00000000 .word 0x00000000 + 8000966c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xdfdfdfdfdfdfdfdf + 80009670: 00063703 ld x14,0(x12) + 80009674: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xdfdfdfdfdfdfdfdf + 80009678: 00063203 ld x4,0(x12) + 8000967c: 00860613 addi x12,x12,8 + +0000000080009680 : +Zkne_aes64esm_cg_cp_sbox_b223: + aes64esm x5, x14, x4 # perform operation + 80009680: 364702b3 aes64esm x5,x14,x4 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b223, Zkne_aes64esm_cg_cp_sbox_b223_str) + 80009684: 00013383 ld x7,0(x2) + 80009688: 00538c63 beq x7,x5,800096a0 + 8000968c: 28d0146f jal x8,8000b118 + 80009690: 80009680 .word 0x80009680 + 80009694: 00000000 .word 0x00000000 + 80009698: 80020c00 .word 0x80020c00 + 8000969c: 00000000 .word 0x00000000 + 800096a0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xe0e0e0e0e0e0e0e0 + 800096a4: 00063083 ld x1,0(x12) + 800096a8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs2: x31 = 0xe0e0e0e0e0e0e0e0 + 800096ac: 00063f83 ld x31,0(x12) + 800096b0: 00860613 addi x12,x12,8 + +00000000800096b4 : +Zkne_aes64esm_cg_cp_sbox_b224: + aes64esm x20, x1, x31 # perform operation + 800096b4: 37f08a33 aes64esm x20,x1,x31 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b224, Zkne_aes64esm_cg_cp_sbox_b224_str) + 800096b8: 00013383 ld x7,0(x2) + 800096bc: 01438c63 beq x7,x20,800096d4 + 800096c0: 2590146f jal x8,8000b118 + 800096c4: 800096b4 .word 0x800096b4 + 800096c8: 00000000 .word 0x00000000 + 800096cc: 80020c3a .word 0x80020c3a + 800096d0: 00000000 .word 0x00000000 + 800096d4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xe1e1e1e1e1e1e1e1 + 800096d8: 00063f83 ld x31,0(x12) + 800096dc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xe1e1e1e1e1e1e1e1 + 800096e0: 00063203 ld x4,0(x12) + 800096e4: 00860613 addi x12,x12,8 + +00000000800096e8 : +Zkne_aes64esm_cg_cp_sbox_b225: + aes64esm x10, x31, x4 # perform operation + 800096e8: 364f8533 aes64esm x10,x31,x4 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b225, Zkne_aes64esm_cg_cp_sbox_b225_str) + 800096ec: 00013383 ld x7,0(x2) + 800096f0: 00a38c63 beq x7,x10,80009708 + 800096f4: 2250146f jal x8,8000b118 + 800096f8: 800096e8 .word 0x800096e8 + 800096fc: 00000000 .word 0x00000000 + 80009700: 80020c74 .word 0x80020c74 + 80009704: 00000000 .word 0x00000000 + 80009708: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xe2e2e2e2e2e2e2e2 + 8000970c: 00063803 ld x16,0(x12) + 80009710: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xe2e2e2e2e2e2e2e2 + 80009714: 00063b03 ld x22,0(x12) + 80009718: 00860613 addi x12,x12,8 + +000000008000971c : +Zkne_aes64esm_cg_cp_sbox_b226: + aes64esm x14, x16, x22 # perform operation + 8000971c: 37680733 aes64esm x14,x16,x22 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b226, Zkne_aes64esm_cg_cp_sbox_b226_str) + 80009720: 00013383 ld x7,0(x2) + 80009724: 00e38c63 beq x7,x14,8000973c + 80009728: 1f10146f jal x8,8000b118 + 8000972c: 8000971c .word 0x8000971c + 80009730: 00000000 .word 0x00000000 + 80009734: 80020cae .word 0x80020cae + 80009738: 00000000 .word 0x00000000 + 8000973c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0xe3e3e3e3e3e3e3e3 + 80009740: 00063e03 ld x28,0(x12) + 80009744: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xe3e3e3e3e3e3e3e3 + 80009748: 00063083 ld x1,0(x12) + 8000974c: 00860613 addi x12,x12,8 + +0000000080009750 : +Zkne_aes64esm_cg_cp_sbox_b227: + aes64esm x4, x28, x1 # perform operation + 80009750: 361e0233 aes64esm x4,x28,x1 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b227, Zkne_aes64esm_cg_cp_sbox_b227_str) + 80009754: 00013383 ld x7,0(x2) + 80009758: 00438c63 beq x7,x4,80009770 + 8000975c: 1bd0146f jal x8,8000b118 + 80009760: 80009750 .word 0x80009750 + 80009764: 00000000 .word 0x00000000 + 80009768: 80020ce8 .word 0x80020ce8 + 8000976c: 00000000 .word 0x00000000 + 80009770: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xe4e4e4e4e4e4e4e4 + 80009774: 00063903 ld x18,0(x12) + 80009778: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xe4e4e4e4e4e4e4e4 + 8000977c: 00063083 ld x1,0(x12) + 80009780: 00860613 addi x12,x12,8 + +0000000080009784 : +Zkne_aes64esm_cg_cp_sbox_b228: + aes64esm x25, x18, x1 # perform operation + 80009784: 36190cb3 aes64esm x25,x18,x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b228, Zkne_aes64esm_cg_cp_sbox_b228_str) + 80009788: 00013383 ld x7,0(x2) + 8000978c: 01938c63 beq x7,x25,800097a4 + 80009790: 1890146f jal x8,8000b118 + 80009794: 80009784 .word 0x80009784 + 80009798: 00000000 .word 0x00000000 + 8000979c: 80020d22 .word 0x80020d22 + 800097a0: 00000000 .word 0x00000000 + 800097a4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xe5e5e5e5e5e5e5e5 + 800097a8: 00063b83 ld x23,0(x12) + 800097ac: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs2: x3 = 0xe5e5e5e5e5e5e5e5 + 800097b0: 00063183 ld x3,0(x12) + 800097b4: 00860613 addi x12,x12,8 + +00000000800097b8 : +Zkne_aes64esm_cg_cp_sbox_b229: + aes64esm x22, x23, x3 # perform operation + 800097b8: 363b8b33 aes64esm x22,x23,x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x22, Zkne_aes64esm_cg_cp_sbox_b229, Zkne_aes64esm_cg_cp_sbox_b229_str) + 800097bc: 00013383 ld x7,0(x2) + 800097c0: 01638c63 beq x7,x22,800097d8 + 800097c4: 1550146f jal x8,8000b118 + 800097c8: 800097b8 .word 0x800097b8 + 800097cc: 00000000 .word 0x00000000 + 800097d0: 80020d5c .word 0x80020d5c + 800097d4: 00000000 .word 0x00000000 + 800097d8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xe6e6e6e6e6e6e6e6 + 800097dc: 00063e83 ld x29,0(x12) + 800097e0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xe6e6e6e6e6e6e6e6 + 800097e4: 00063c83 ld x25,0(x12) + 800097e8: 00860613 addi x12,x12,8 + +00000000800097ec : +Zkne_aes64esm_cg_cp_sbox_b230: + aes64esm x17, x29, x25 # perform operation + 800097ec: 379e88b3 aes64esm x17,x29,x25 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b230, Zkne_aes64esm_cg_cp_sbox_b230_str) + 800097f0: 00013383 ld x7,0(x2) + 800097f4: 01138c63 beq x7,x17,8000980c + 800097f8: 1210146f jal x8,8000b118 + 800097fc: 800097ec .word 0x800097ec + 80009800: 00000000 .word 0x00000000 + 80009804: 80020d96 .word 0x80020d96 + 80009808: 00000000 .word 0x00000000 + 8000980c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xe7e7e7e7e7e7e7e7 + 80009810: 00063303 ld x6,0(x12) + 80009814: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs2: x4 = 0xe7e7e7e7e7e7e7e7 + 80009818: 00063203 ld x4,0(x12) + 8000981c: 00860613 addi x12,x12,8 + +0000000080009820 : +Zkne_aes64esm_cg_cp_sbox_b231: + aes64esm x27, x6, x4 # perform operation + 80009820: 36430db3 aes64esm x27,x6,x4 + # Check if x27 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x27, Zkne_aes64esm_cg_cp_sbox_b231, Zkne_aes64esm_cg_cp_sbox_b231_str) + 80009824: 00013383 ld x7,0(x2) + 80009828: 01b38c63 beq x7,x27,80009840 + 8000982c: 0ed0146f jal x8,8000b118 + 80009830: 80009820 .word 0x80009820 + 80009834: 00000000 .word 0x00000000 + 80009838: 80020dd0 .word 0x80020dd0 + 8000983c: 00000000 .word 0x00000000 + 80009840: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0xe8e8e8e8e8e8e8e8 + 80009844: 00063983 ld x19,0(x12) + 80009848: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xe8e8e8e8e8e8e8e8 + 8000984c: 00063583 ld x11,0(x12) + 80009850: 00860613 addi x12,x12,8 + +0000000080009854 : +Zkne_aes64esm_cg_cp_sbox_b232: + aes64esm x26, x19, x11 # perform operation + 80009854: 36b98d33 aes64esm x26,x19,x11 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b232, Zkne_aes64esm_cg_cp_sbox_b232_str) + 80009858: 00013383 ld x7,0(x2) + 8000985c: 01a38c63 beq x7,x26,80009874 + 80009860: 0b90146f jal x8,8000b118 + 80009864: 80009854 .word 0x80009854 + 80009868: 00000000 .word 0x00000000 + 8000986c: 80020e0a .word 0x80020e0a + 80009870: 00000000 .word 0x00000000 + 80009874: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xe9e9e9e9e9e9e9e9 + 80009878: 00063483 ld x9,0(x12) + 8000987c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xe9e9e9e9e9e9e9e9 + 80009880: 00063d03 ld x26,0(x12) + 80009884: 00860613 addi x12,x12,8 + +0000000080009888 : +Zkne_aes64esm_cg_cp_sbox_b233: + aes64esm x10, x9, x26 # perform operation + 80009888: 37a48533 aes64esm x10,x9,x26 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b233, Zkne_aes64esm_cg_cp_sbox_b233_str) + 8000988c: 00013383 ld x7,0(x2) + 80009890: 00a38c63 beq x7,x10,800098a8 + 80009894: 0850146f jal x8,8000b118 + 80009898: 80009888 .word 0x80009888 + 8000989c: 00000000 .word 0x00000000 + 800098a0: 80020e44 .word 0x80020e44 + 800098a4: 00000000 .word 0x00000000 + 800098a8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xeaeaeaeaeaeaeaea + 800098ac: 00063703 ld x14,0(x12) + 800098b0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xeaeaeaeaeaeaeaea + 800098b4: 00063a03 ld x20,0(x12) + 800098b8: 00860613 addi x12,x12,8 + +00000000800098bc : +Zkne_aes64esm_cg_cp_sbox_b234: + aes64esm x17, x14, x20 # perform operation + 800098bc: 374708b3 aes64esm x17,x14,x20 + # Check if x17 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x17, Zkne_aes64esm_cg_cp_sbox_b234, Zkne_aes64esm_cg_cp_sbox_b234_str) + 800098c0: 00013383 ld x7,0(x2) + 800098c4: 01138c63 beq x7,x17,800098dc + 800098c8: 0510146f jal x8,8000b118 + 800098cc: 800098bc .word 0x800098bc + 800098d0: 00000000 .word 0x00000000 + 800098d4: 80020e7e .word 0x80020e7e + 800098d8: 00000000 .word 0x00000000 + 800098dc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xebebebebebebebeb + 800098e0: 00063a83 ld x21,0(x12) + 800098e4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xebebebebebebebeb + 800098e8: 00063b03 ld x22,0(x12) + 800098ec: 00860613 addi x12,x12,8 + +00000000800098f0 : +Zkne_aes64esm_cg_cp_sbox_b235: + aes64esm x10, x21, x22 # perform operation + 800098f0: 376a8533 aes64esm x10,x21,x22 + # Check if x10 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x10, Zkne_aes64esm_cg_cp_sbox_b235, Zkne_aes64esm_cg_cp_sbox_b235_str) + 800098f4: 00013383 ld x7,0(x2) + 800098f8: 00a38c63 beq x7,x10,80009910 + 800098fc: 01d0146f jal x8,8000b118 + 80009900: 800098f0 .word 0x800098f0 + 80009904: 00000000 .word 0x00000000 + 80009908: 80020eb8 .word 0x80020eb8 + 8000990c: 00000000 .word 0x00000000 + 80009910: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xecececececececec + 80009914: 00063f83 ld x31,0(x12) + 80009918: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xecececececececec + 8000991c: 00063d03 ld x26,0(x12) + 80009920: 00860613 addi x12,x12,8 + +0000000080009924 : +Zkne_aes64esm_cg_cp_sbox_b236: + aes64esm x11, x31, x26 # perform operation + 80009924: 37af85b3 aes64esm x11,x31,x26 + # Check if x11 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x11, Zkne_aes64esm_cg_cp_sbox_b236, Zkne_aes64esm_cg_cp_sbox_b236_str) + 80009928: 00013383 ld x7,0(x2) + 8000992c: 00b38c63 beq x7,x11,80009944 + 80009930: 7e80146f jal x8,8000b118 + 80009934: 80009924 .word 0x80009924 + 80009938: 00000000 .word 0x00000000 + 8000993c: 80020ef2 .word 0x80020ef2 + 80009940: 00000000 .word 0x00000000 + 80009944: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xedededededededed + 80009948: 00063883 ld x17,0(x12) + 8000994c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs2: x10 = 0xedededededededed + 80009950: 00063503 ld x10,0(x12) + 80009954: 00860613 addi x12,x12,8 + +0000000080009958 : +Zkne_aes64esm_cg_cp_sbox_b237: + aes64esm x6, x17, x10 # perform operation + 80009958: 36a88333 aes64esm x6,x17,x10 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b237, Zkne_aes64esm_cg_cp_sbox_b237_str) + 8000995c: 00013383 ld x7,0(x2) + 80009960: 00638c63 beq x7,x6,80009978 + 80009964: 7b40146f jal x8,8000b118 + 80009968: 80009958 .word 0x80009958 + 8000996c: 00000000 .word 0x00000000 + 80009970: 80020f2c .word 0x80020f2c + 80009974: 00000000 .word 0x00000000 + 80009978: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xeeeeeeeeeeeeeeee + 8000997c: 00063483 ld x9,0(x12) + 80009980: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xeeeeeeeeeeeeeeee + 80009984: 00063803 ld x16,0(x12) + 80009988: 00860613 addi x12,x12,8 + +000000008000998c : +Zkne_aes64esm_cg_cp_sbox_b238: + aes64esm x5, x9, x16 # perform operation + 8000998c: 370482b3 aes64esm x5,x9,x16 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zkne_aes64esm_cg_cp_sbox_b238, Zkne_aes64esm_cg_cp_sbox_b238_str) + 80009990: 00013383 ld x7,0(x2) + 80009994: 00538c63 beq x7,x5,800099ac + 80009998: 7800146f jal x8,8000b118 + 8000999c: 8000998c .word 0x8000998c + 800099a0: 00000000 .word 0x00000000 + 800099a4: 80020f66 .word 0x80020f66 + 800099a8: 00000000 .word 0x00000000 + 800099ac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xefefefefefefefef + 800099b0: 00063183 ld x3,0(x12) + 800099b4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs2: x26 = 0xefefefefefefefef + 800099b8: 00063d03 ld x26,0(x12) + 800099bc: 00860613 addi x12,x12,8 + +00000000800099c0 : +Zkne_aes64esm_cg_cp_sbox_b239: + aes64esm x14, x3, x26 # perform operation + 800099c0: 37a18733 aes64esm x14,x3,x26 + # Check if x14 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x14, Zkne_aes64esm_cg_cp_sbox_b239, Zkne_aes64esm_cg_cp_sbox_b239_str) + 800099c4: 00013383 ld x7,0(x2) + 800099c8: 00e38c63 beq x7,x14,800099e0 + 800099cc: 74c0146f jal x8,8000b118 + 800099d0: 800099c0 .word 0x800099c0 + 800099d4: 00000000 .word 0x00000000 + 800099d8: 80020fa0 .word 0x80020fa0 + 800099dc: 00000000 .word 0x00000000 + 800099e0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xf0f0f0f0f0f0f0f0 + 800099e4: 00063b03 ld x22,0(x12) + 800099e8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xf0f0f0f0f0f0f0f0 + 800099ec: 00063803 ld x16,0(x12) + 800099f0: 00860613 addi x12,x12,8 + +00000000800099f4 : +Zkne_aes64esm_cg_cp_sbox_b240: + aes64esm x21, x22, x16 # perform operation + 800099f4: 370b0ab3 aes64esm x21,x22,x16 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b240, Zkne_aes64esm_cg_cp_sbox_b240_str) + 800099f8: 00013383 ld x7,0(x2) + 800099fc: 01538c63 beq x7,x21,80009a14 + 80009a00: 7180146f jal x8,8000b118 + 80009a04: 800099f4 .word 0x800099f4 + 80009a08: 00000000 .word 0x00000000 + 80009a0c: 80020fda .word 0x80020fda + 80009a10: 00000000 .word 0x00000000 + 80009a14: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xf1f1f1f1f1f1f1f1 + 80009a18: 00063683 ld x13,0(x12) + 80009a1c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xf1f1f1f1f1f1f1f1 + 80009a20: 00063c03 ld x24,0(x12) + 80009a24: 00860613 addi x12,x12,8 + +0000000080009a28 : +Zkne_aes64esm_cg_cp_sbox_b241: + aes64esm x26, x13, x24 # perform operation + 80009a28: 37868d33 aes64esm x26,x13,x24 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b241, Zkne_aes64esm_cg_cp_sbox_b241_str) + 80009a2c: 00013383 ld x7,0(x2) + 80009a30: 01a38c63 beq x7,x26,80009a48 + 80009a34: 6e40146f jal x8,8000b118 + 80009a38: 80009a28 .word 0x80009a28 + 80009a3c: 00000000 .word 0x00000000 + 80009a40: 80021014 .word 0x80021014 + 80009a44: 00000000 .word 0x00000000 + 80009a48: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xf2f2f2f2f2f2f2f2 + 80009a4c: 00063903 ld x18,0(x12) + 80009a50: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs2: x24 = 0xf2f2f2f2f2f2f2f2 + 80009a54: 00063c03 ld x24,0(x12) + 80009a58: 00860613 addi x12,x12,8 + +0000000080009a5c : +Zkne_aes64esm_cg_cp_sbox_b242: + aes64esm x3, x18, x24 # perform operation + 80009a5c: 378901b3 aes64esm x3,x18,x24 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b242, Zkne_aes64esm_cg_cp_sbox_b242_str) + 80009a60: 00013383 ld x7,0(x2) + 80009a64: 00338c63 beq x7,x3,80009a7c + 80009a68: 6b00146f jal x8,8000b118 + 80009a6c: 80009a5c .word 0x80009a5c + 80009a70: 00000000 .word 0x00000000 + 80009a74: 8002104e .word 0x8002104e + 80009a78: 00000000 .word 0x00000000 + 80009a7c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xf3f3f3f3f3f3f3f3 + 80009a80: 00063803 ld x16,0(x12) + 80009a84: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xf3f3f3f3f3f3f3f3 + 80009a88: 00063583 ld x11,0(x12) + 80009a8c: 00860613 addi x12,x12,8 + +0000000080009a90 : +Zkne_aes64esm_cg_cp_sbox_b243: + aes64esm x25, x16, x11 # perform operation + 80009a90: 36b80cb3 aes64esm x25,x16,x11 + # Check if x25 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x25, Zkne_aes64esm_cg_cp_sbox_b243, Zkne_aes64esm_cg_cp_sbox_b243_str) + 80009a94: 00013383 ld x7,0(x2) + 80009a98: 01938c63 beq x7,x25,80009ab0 + 80009a9c: 67c0146f jal x8,8000b118 + 80009aa0: 80009a90 .word 0x80009a90 + 80009aa4: 00000000 .word 0x00000000 + 80009aa8: 80021088 .word 0x80021088 + 80009aac: 00000000 .word 0x00000000 + 80009ab0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0xf4f4f4f4f4f4f4f4 + 80009ab4: 00063f03 ld x30,0(x12) + 80009ab8: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs2: x6 = 0xf4f4f4f4f4f4f4f4 + 80009abc: 00063303 ld x6,0(x12) + 80009ac0: 00860613 addi x12,x12,8 + +0000000080009ac4 : +Zkne_aes64esm_cg_cp_sbox_b244: + aes64esm x4, x30, x6 # perform operation + 80009ac4: 366f0233 aes64esm x4,x30,x6 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zkne_aes64esm_cg_cp_sbox_b244, Zkne_aes64esm_cg_cp_sbox_b244_str) + 80009ac8: 00013383 ld x7,0(x2) + 80009acc: 00438c63 beq x7,x4,80009ae4 + 80009ad0: 6480146f jal x8,8000b118 + 80009ad4: 80009ac4 .word 0x80009ac4 + 80009ad8: 00000000 .word 0x00000000 + 80009adc: 800210c2 .word 0x800210c2 + 80009ae0: 00000000 .word 0x00000000 + 80009ae4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xf5f5f5f5f5f5f5f5 + 80009ae8: 00063a83 ld x21,0(x12) + 80009aec: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xf5f5f5f5f5f5f5f5 + 80009af0: 00063583 ld x11,0(x12) + 80009af4: 00860613 addi x12,x12,8 + +0000000080009af8 : +Zkne_aes64esm_cg_cp_sbox_b245: + aes64esm x20, x21, x11 # perform operation + 80009af8: 36ba8a33 aes64esm x20,x21,x11 + # Check if x20 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x20, Zkne_aes64esm_cg_cp_sbox_b245, Zkne_aes64esm_cg_cp_sbox_b245_str) + 80009afc: 00013383 ld x7,0(x2) + 80009b00: 01438c63 beq x7,x20,80009b18 + 80009b04: 6140146f jal x8,8000b118 + 80009b08: 80009af8 .word 0x80009af8 + 80009b0c: 00000000 .word 0x00000000 + 80009b10: 800210fc .word 0x800210fc + 80009b14: 00000000 .word 0x00000000 + 80009b18: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xf6f6f6f6f6f6f6f6 + 80009b1c: 00063283 ld x5,0(x12) + 80009b20: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs2: x23 = 0xf6f6f6f6f6f6f6f6 + 80009b24: 00063b83 ld x23,0(x12) + 80009b28: 00860613 addi x12,x12,8 + +0000000080009b2c : +Zkne_aes64esm_cg_cp_sbox_b246: + aes64esm x6, x5, x23 # perform operation + 80009b2c: 37728333 aes64esm x6,x5,x23 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zkne_aes64esm_cg_cp_sbox_b246, Zkne_aes64esm_cg_cp_sbox_b246_str) + 80009b30: 00013383 ld x7,0(x2) + 80009b34: 00638c63 beq x7,x6,80009b4c + 80009b38: 5e00146f jal x8,8000b118 + 80009b3c: 80009b2c .word 0x80009b2c + 80009b40: 00000000 .word 0x00000000 + 80009b44: 80021136 .word 0x80021136 + 80009b48: 00000000 .word 0x00000000 + 80009b4c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xf7f7f7f7f7f7f7f7 + 80009b50: 00063f83 ld x31,0(x12) + 80009b54: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs2: x17 = 0xf7f7f7f7f7f7f7f7 + 80009b58: 00063883 ld x17,0(x12) + 80009b5c: 00860613 addi x12,x12,8 + +0000000080009b60 : +Zkne_aes64esm_cg_cp_sbox_b247: + aes64esm x15, x31, x17 # perform operation + 80009b60: 371f87b3 aes64esm x15,x31,x17 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b247, Zkne_aes64esm_cg_cp_sbox_b247_str) + 80009b64: 00013383 ld x7,0(x2) + 80009b68: 00f38c63 beq x7,x15,80009b80 + 80009b6c: 5ac0146f jal x8,8000b118 + 80009b70: 80009b60 .word 0x80009b60 + 80009b74: 00000000 .word 0x00000000 + 80009b78: 80021170 .word 0x80021170 + 80009b7c: 00000000 .word 0x00000000 + 80009b80: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xf8f8f8f8f8f8f8f8 + 80009b84: 00063903 ld x18,0(x12) + 80009b88: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs2: x22 = 0xf8f8f8f8f8f8f8f8 + 80009b8c: 00063b03 ld x22,0(x12) + 80009b90: 00860613 addi x12,x12,8 + +0000000080009b94 : +Zkne_aes64esm_cg_cp_sbox_b248: + aes64esm x15, x18, x22 # perform operation + 80009b94: 376907b3 aes64esm x15,x18,x22 + # Check if x15 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x15, Zkne_aes64esm_cg_cp_sbox_b248, Zkne_aes64esm_cg_cp_sbox_b248_str) + 80009b98: 00013383 ld x7,0(x2) + 80009b9c: 00f38c63 beq x7,x15,80009bb4 + 80009ba0: 5780146f jal x8,8000b118 + 80009ba4: 80009b94 .word 0x80009b94 + 80009ba8: 00000000 .word 0x00000000 + 80009bac: 800211aa .word 0x800211aa + 80009bb0: 00000000 .word 0x00000000 + 80009bb4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xf9f9f9f9f9f9f9f9 + 80009bb8: 00063e83 ld x29,0(x12) + 80009bbc: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs2: x11 = 0xf9f9f9f9f9f9f9f9 + 80009bc0: 00063583 ld x11,0(x12) + 80009bc4: 00860613 addi x12,x12,8 + +0000000080009bc8 : +Zkne_aes64esm_cg_cp_sbox_b249: + aes64esm x26, x29, x11 # perform operation + 80009bc8: 36be8d33 aes64esm x26,x29,x11 + # Check if x26 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x26, Zkne_aes64esm_cg_cp_sbox_b249, Zkne_aes64esm_cg_cp_sbox_b249_str) + 80009bcc: 00013383 ld x7,0(x2) + 80009bd0: 01a38c63 beq x7,x26,80009be8 + 80009bd4: 5440146f jal x8,8000b118 + 80009bd8: 80009bc8 .word 0x80009bc8 + 80009bdc: 00000000 .word 0x00000000 + 80009be0: 800211e4 .word 0x800211e4 + 80009be4: 00000000 .word 0x00000000 + 80009be8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xfafafafafafafafa + 80009bec: 00063083 ld x1,0(x12) + 80009bf0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs2: x20 = 0xfafafafafafafafa + 80009bf4: 00063a03 ld x20,0(x12) + 80009bf8: 00860613 addi x12,x12,8 + +0000000080009bfc : +Zkne_aes64esm_cg_cp_sbox_b250: + aes64esm x24, x1, x20 # perform operation + 80009bfc: 37408c33 aes64esm x24,x1,x20 + # Check if x24 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x24, Zkne_aes64esm_cg_cp_sbox_b250, Zkne_aes64esm_cg_cp_sbox_b250_str) + 80009c00: 00013383 ld x7,0(x2) + 80009c04: 01838c63 beq x7,x24,80009c1c + 80009c08: 5100146f jal x8,8000b118 + 80009c0c: 80009bfc .word 0x80009bfc + 80009c10: 00000000 .word 0x00000000 + 80009c14: 8002121e .word 0x8002121e + 80009c18: 00000000 .word 0x00000000 + 80009c1c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xfbfbfbfbfbfbfbfb + 80009c20: 00063303 ld x6,0(x12) + 80009c24: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs2: x15 = 0xfbfbfbfbfbfbfbfb + 80009c28: 00063783 ld x15,0(x12) + 80009c2c: 00860613 addi x12,x12,8 + +0000000080009c30 : +Zkne_aes64esm_cg_cp_sbox_b251: + aes64esm x29, x6, x15 # perform operation + 80009c30: 36f30eb3 aes64esm x29,x6,x15 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b251, Zkne_aes64esm_cg_cp_sbox_b251_str) + 80009c34: 00013383 ld x7,0(x2) + 80009c38: 01d38c63 beq x7,x29,80009c50 + 80009c3c: 4dc0146f jal x8,8000b118 + 80009c40: 80009c30 .word 0x80009c30 + 80009c44: 00000000 .word 0x00000000 + 80009c48: 80021258 .word 0x80021258 + 80009c4c: 00000000 .word 0x00000000 + 80009c50: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xfcfcfcfcfcfcfcfc + 80009c54: 00063b03 ld x22,0(x12) + 80009c58: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs2: x16 = 0xfcfcfcfcfcfcfcfc + 80009c5c: 00063803 ld x16,0(x12) + 80009c60: 00860613 addi x12,x12,8 + +0000000080009c64 : +Zkne_aes64esm_cg_cp_sbox_b252: + aes64esm x29, x22, x16 # perform operation + 80009c64: 370b0eb3 aes64esm x29,x22,x16 + # Check if x29 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x29, Zkne_aes64esm_cg_cp_sbox_b252, Zkne_aes64esm_cg_cp_sbox_b252_str) + 80009c68: 00013383 ld x7,0(x2) + 80009c6c: 01d38c63 beq x7,x29,80009c84 + 80009c70: 4a80146f jal x8,8000b118 + 80009c74: 80009c64 .word 0x80009c64 + 80009c78: 00000000 .word 0x00000000 + 80009c7c: 80021292 .word 0x80021292 + 80009c80: 00000000 .word 0x00000000 + 80009c84: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xfdfdfdfdfdfdfdfd + 80009c88: 00063f83 ld x31,0(x12) + 80009c8c: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs2: x1 = 0xfdfdfdfdfdfdfdfd + 80009c90: 00063083 ld x1,0(x12) + 80009c94: 00860613 addi x12,x12,8 + +0000000080009c98 : +Zkne_aes64esm_cg_cp_sbox_b253: + aes64esm x21, x31, x1 # perform operation + 80009c98: 361f8ab3 aes64esm x21,x31,x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x21, Zkne_aes64esm_cg_cp_sbox_b253, Zkne_aes64esm_cg_cp_sbox_b253_str) + 80009c9c: 00013383 ld x7,0(x2) + 80009ca0: 01538c63 beq x7,x21,80009cb8 + 80009ca4: 4740146f jal x8,8000b118 + 80009ca8: 80009c98 .word 0x80009c98 + 80009cac: 00000000 .word 0x00000000 + 80009cb0: 800212cc .word 0x800212cc + 80009cb4: 00000000 .word 0x00000000 + 80009cb8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xfefefefefefefefe + 80009cbc: 00063483 ld x9,0(x12) + 80009cc0: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs2: x25 = 0xfefefefefefefefe + 80009cc4: 00063c83 ld x25,0(x12) + 80009cc8: 00860613 addi x12,x12,8 + +0000000080009ccc : +Zkne_aes64esm_cg_cp_sbox_b254: + aes64esm x3, x9, x25 # perform operation + 80009ccc: 379481b3 aes64esm x3,x9,x25 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zkne_aes64esm_cg_cp_sbox_b254, Zkne_aes64esm_cg_cp_sbox_b254_str) + 80009cd0: 00013383 ld x7,0(x2) + 80009cd4: 00338c63 beq x7,x3,80009cec + 80009cd8: 4400146f jal x8,8000b118 + 80009cdc: 80009ccc .word 0x80009ccc + 80009ce0: 00000000 .word 0x00000000 + 80009ce4: 80021306 .word 0x80021306 + 80009ce8: 00000000 .word 0x00000000 + 80009cec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xffffffffffffffff + 80009cf0: 00063c03 ld x24,0(x12) + 80009cf4: 00860613 addi x12,x12,8 + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs2: x5 = 0xffffffffffffffff + 80009cf8: 00063283 ld x5,0(x12) + 80009cfc: 00860613 addi x12,x12,8 + +0000000080009d00 : +Zkne_aes64esm_cg_cp_sbox_b255: + aes64esm x28, x24, x5 # perform operation + 80009d00: 365c0e33 aes64esm x28,x24,x5 + # Check if x28 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x28, Zkne_aes64esm_cg_cp_sbox_b255, Zkne_aes64esm_cg_cp_sbox_b255_str) + 80009d04: 00013383 ld x7,0(x2) + 80009d08: 01c38c63 beq x7,x28,80009d20 + 80009d0c: 40c0146f jal x8,8000b118 + 80009d10: 80009d00 .word 0x80009d00 + 80009d14: 00000000 .word 0x00000000 + 80009d18: 80021340 .word 0x80021340 + 80009d1c: 00000000 .word 0x00000000 + 80009d20: 00810113 addi x2,x2,8 + +0000000080009d24 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009d24: 00000513 addi x10,x0,0 + 80009d28: 00000073 ecall + 80009d2c: fff00513 addi x10,x0,-1 + 80009d30: 25800413 addi x8,x0,600 + +0000000080009d34 : + 80009d34: 34002373 csrrs x6,mscratch,x0 + +0000000080009d38 : + 80009d38: 2b833383 ld x7,696(x6) + +0000000080009d3c : + 80009d3c: 2a033383 ld x7,672(x6) + +0000000080009d40 : + 80009d40: 2d033483 ld x9,720(x6) + 80009d44: 34049073 csrrw x0,mscratch,x9 + +0000000080009d48 : + 80009d48: 2c833483 ld x9,712(x6) + 80009d4c: 305493f3 csrrw x7,mtvec,x9 + 80009d50: ffc4f493 andi x9,x9,-4 + 80009d54: ffc3f393 andi x7,x7,-4 + 80009d58: 00749e63 bne x9,x7,80009d74 + +0000000080009d5c : + 80009d5c: 00030493 addi x9,x6,0 + +0000000080009d60 : + 80009d60: 0004a783 lw x15,0(x9) + 80009d64: 00f3a023 sw x15,0(x7) + 80009d68: 00438393 addi x7,x7,4 + 80009d6c: 00448493 addi x9,x9,4 + 80009d70: fe83c8e3 blt x7,x8,80009d60 + 80009d74: 0000100f fence.i + +0000000080009d78 : + 80009d78: 00000013 addi x0,x0,0 + 80009d7c: 00000013 addi x0,x0,0 + 80009d80: 00000497 auipc x9,0x0 + 80009d84: 2b048493 addi x9,x9,688 # 8000a030 + 80009d88: 00000013 addi x0,x0,0 + 80009d8c: 00000013 addi x0,x0,0 + 80009d90: 00000013 addi x0,x0,0 + 80009d94: 00000013 addi x0,x0,0 + 80009d98: 00000013 addi x0,x0,0 + 80009d9c: 00000013 addi x0,x0,0 + 80009da0: 10e49863 bne x9,x14,80009eb0 + 80009da4: 00000013 addi x0,x0,0 + 80009da8: 00000013 addi x0,x0,0 + 80009dac: 00000013 addi x0,x0,0 + 80009db0: 00000013 addi x0,x0,0 + 80009db4: 00000013 addi x0,x0,0 + 80009db8: 00000013 addi x0,x0,0 + 80009dbc: 00000013 addi x0,x0,0 + 80009dc0: 00018517 auipc x10,0x18 + 80009dc4: ce250513 addi x10,x10,-798 # 80021aa2 + 80009dc8: 00000013 addi x0,x0,0 + 80009dcc: 00000013 addi x0,x0,0 + 80009dd0: 00000013 addi x0,x0,0 + 80009dd4: 00000013 addi x0,x0,0 + 80009dd8: 00000013 addi x0,x0,0 + 80009ddc: 00000013 addi x0,x0,0 + 80009de0: 00039097 auipc x1,0x39 + 80009de4: 7c4080e7 jalr x1,1988(x1) # 800435a4 + 80009de8: 00000013 addi x0,x0,0 + 80009dec: 00000013 addi x0,x0,0 + 80009df0: 00000013 addi x0,x0,0 + 80009df4: 00000013 addi x0,x0,0 + 80009df8: 00000013 addi x0,x0,0 + 80009dfc: 00000013 addi x0,x0,0 + 80009e00: 00018517 auipc x10,0x18 + 80009e04: cdf50513 addi x10,x10,-801 # 80021adf + 80009e08: 00000013 addi x0,x0,0 + 80009e0c: 00000013 addi x0,x0,0 + 80009e10: 00000013 addi x0,x0,0 + 80009e14: 00000013 addi x0,x0,0 + 80009e18: 00000013 addi x0,x0,0 + 80009e1c: 00000013 addi x0,x0,0 + 80009e20: 00039097 auipc x1,0x39 + 80009e24: 784080e7 jalr x1,1924(x1) # 800435a4 + 80009e28: 00000013 addi x0,x0,0 + 80009e2c: 00000013 addi x0,x0,0 + 80009e30: 00000013 addi x0,x0,0 + 80009e34: 00000013 addi x0,x0,0 + 80009e38: 00000013 addi x0,x0,0 + 80009e3c: 00000013 addi x0,x0,0 + 80009e40: 00018517 auipc x10,0x18 + 80009e44: cff50513 addi x10,x10,-769 # 80021b3f + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00039097 auipc x1,0x39 + 80009e64: 744080e7 jalr x1,1860(x1) # 800435a4 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 00019517 auipc x10,0x19 + 80009e84: 86a50513 addi x10,x10,-1942 # 800226ea + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00039097 auipc x1,0x39 + 80009ea4: 704080e7 jalr x1,1796(x1) # 800435a4 + 80009ea8: 00039097 auipc x1,0x39 + 80009eac: 75c080e7 jalr x1,1884(x1) # 80043604 + +0000000080009eb0 : + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00006317 auipc x6,0x6 + 80009ec4: 4e830313 addi x6,x6,1256 # 800103a8 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00033303 ld x6,0(x6) + 80009ee4: 00000013 addi x0,x0,0 + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 0001b397 auipc x7,0x1b + 80009f04: ae038393 addi x7,x7,-1312 # 800249e0 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 40730333 sub x6,x6,x7 + 80009f24: 00000013 addi x0,x0,0 + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 0001b417 auipc x8,0x1b + 80009f44: a9040413 addi x8,x8,-1392 # 800249d0 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00043203 ld x4,0(x8) + 80009f64: 00620c63 beq x4,x6,80009f7c + 80009f68: 200013ef jal x7,8000b168 + 80009f6c: 80009eb0 .word 0x80009eb0 + 80009f70: 00000000 .word 0x00000000 + 80009f74: 80021c93 .word 0x80021c93 + 80009f78: 00000000 .word 0x00000000 + +0000000080009f7c : + 80009f7c: 000004b7 lui x9,0x0 + 80009f80: 00048493 addi x9,x9,0 # 0 + 80009f84: 00b49493 slli x9,x9,0xb + 80009f88: 5d648493 addi x9,x9,1494 + 80009f8c: 00b49493 slli x9,x9,0xb + 80009f90: 43748493 addi x9,x9,1079 + 80009f94: 00a49493 slli x9,x9,0xa + 80009f98: 2ad48493 addi x9,x9,685 + 80009f9c: 00e49e63 bne x9,x14,80009fb8 + 80009fa0: 1c8013ef jal x7,8000b168 + 80009fa4: 8000a064 .word 0x8000a064 + 80009fa8: 00000000 .word 0x00000000 + 80009fac: 80021b01 .word 0x80021b01 + 80009fb0: 00000000 .word 0x00000000 + 80009fb4: 00000341 .word 0x00000341 + +0000000080009fb8 : + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00018517 auipc x10,0x18 + 80009fc4: aa450513 addi x10,x10,-1372 # 80021a64 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 00039097 auipc x1,0x39 + 80009fe4: 5c4080e7 jalr x1,1476(x1) # 800435a4 + 80009fe8: 00039097 auipc x1,0x39 + 80009fec: 5fc080e7 jalr x1,1532(x1) # 800435e4 + +0000000080009ff0 : + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 00018517 auipc x10,0x18 + 8000a004: aa250513 addi x10,x10,-1374 # 80021aa2 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 00039097 auipc x1,0x39 + 8000a024: 584080e7 jalr x1,1412(x1) # 800435a4 + 8000a028: 00039097 auipc x1,0x39 + 8000a02c: 5dc080e7 jalr x1,1500(x1) # 80043604 + +000000008000a030 : + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00000717 auipc x14,0x0 + 8000a044: ff070713 addi x14,x14,-16 # 8000a030 + 8000a048: 00000013 addi x0,x0,0 + 8000a04c: 00000013 addi x0,x0,0 + 8000a050: 00000013 addi x0,x0,0 + 8000a054: 00000013 addi x0,x0,0 + 8000a058: 00000013 addi x0,x0,0 + 8000a05c: 00000013 addi x0,x0,0 + 8000a060: cc5ff06f jal x0,80009d24 + +000000008000a064 : + 8000a064: 00000737 lui x14,0x0 + 8000a068: 00070713 addi x14,x14,0 # 0 + 8000a06c: 00b71713 slli x14,x14,0xb + 8000a070: 5d670713 addi x14,x14,1494 + 8000a074: 00b71713 slli x14,x14,0xb + 8000a078: 43770713 addi x14,x14,1079 + 8000a07c: 00a71713 slli x14,x14,0xa + 8000a080: 2ad70713 addi x14,x14,685 + 8000a084: ca1ff06f jal x0,80009d24 + 8000a088: 00000013 addi x0,x0,0 + 8000a08c: 00000013 addi x0,x0,0 + 8000a090: 00000013 addi x0,x0,0 + 8000a094: 00000013 addi x0,x0,0 + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00000013 addi x0,x0,0 + 8000a0a4: 00000013 addi x0,x0,0 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + +000000008000a0c0 : + 8000a0c0: 1000006f jal x0,8000a1c0 + 8000a0c4: 1080006f jal x0,8000a1cc + 8000a0c8: 1100006f jal x0,8000a1d8 + 8000a0cc: 1180006f jal x0,8000a1e4 + 8000a0d0: 1200006f jal x0,8000a1f0 + 8000a0d4: 1280006f jal x0,8000a1fc + 8000a0d8: 1300006f jal x0,8000a208 + 8000a0dc: 1380006f jal x0,8000a214 + 8000a0e0: 1400006f jal x0,8000a220 + 8000a0e4: 1480006f jal x0,8000a22c + 8000a0e8: 1500006f jal x0,8000a238 + 8000a0ec: 1580006f jal x0,8000a244 + 8000a0f0: 1600006f jal x0,8000a250 + 8000a0f4: 1680006f jal x0,8000a25c + 8000a0f8: 1700006f jal x0,8000a268 + 8000a0fc: 1780006f jal x0,8000a274 + 8000a100: 1800006f jal x0,8000a280 + 8000a104: 1880006f jal x0,8000a28c + 8000a108: 1900006f jal x0,8000a298 + 8000a10c: 1980006f jal x0,8000a2a4 + 8000a110: 1a00006f jal x0,8000a2b0 + 8000a114: 1a80006f jal x0,8000a2bc + 8000a118: 1b00006f jal x0,8000a2c8 + 8000a11c: 1b80006f jal x0,8000a2d4 + 8000a120: 1c00006f jal x0,8000a2e0 + 8000a124: 1bc0006f jal x0,8000a2e0 + 8000a128: 1b80006f jal x0,8000a2e0 + 8000a12c: 1b40006f jal x0,8000a2e0 + 8000a130: 1b00006f jal x0,8000a2e0 + 8000a134: 1ac0006f jal x0,8000a2e0 + 8000a138: 1a80006f jal x0,8000a2e0 + 8000a13c: 1a40006f jal x0,8000a2e0 + 8000a140: 1a00006f jal x0,8000a2e0 + 8000a144: 19c0006f jal x0,8000a2e0 + 8000a148: 1980006f jal x0,8000a2e0 + 8000a14c: 1940006f jal x0,8000a2e0 + 8000a150: 1900006f jal x0,8000a2e0 + 8000a154: 18c0006f jal x0,8000a2e0 + 8000a158: 1880006f jal x0,8000a2e0 + 8000a15c: 1840006f jal x0,8000a2e0 + 8000a160: 1800006f jal x0,8000a2e0 + 8000a164: 17c0006f jal x0,8000a2e0 + 8000a168: 1780006f jal x0,8000a2e0 + 8000a16c: 1740006f jal x0,8000a2e0 + 8000a170: 1700006f jal x0,8000a2e0 + 8000a174: 16c0006f jal x0,8000a2e0 + 8000a178: 1680006f jal x0,8000a2e0 + 8000a17c: 1640006f jal x0,8000a2e0 + 8000a180: 1600006f jal x0,8000a2e0 + 8000a184: 15c0006f jal x0,8000a2e0 + 8000a188: 1580006f jal x0,8000a2e0 + 8000a18c: 1540006f jal x0,8000a2e0 + 8000a190: 1500006f jal x0,8000a2e0 + 8000a194: 14c0006f jal x0,8000a2e0 + 8000a198: 1480006f jal x0,8000a2e0 + 8000a19c: 1440006f jal x0,8000a2e0 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 13c0006f jal x0,8000a2e0 + 8000a1a8: 1380006f jal x0,8000a2e0 + 8000a1ac: 1340006f jal x0,8000a2e0 + 8000a1b0: 1300006f jal x0,8000a2e0 + 8000a1b4: 12c0006f jal x0,8000a2e0 + 8000a1b8: 1280006f jal x0,8000a2e0 + 8000a1bc: 1240006f jal x0,8000a2e0 + +000000008000a1c0 : + 8000a1c0: 34011173 csrrw x2,mscratch,x2 + 8000a1c4: 30f13423 sd x15,776(x2) + 8000a1c8: 13c007ef jal x15,8000a304 + 8000a1cc: 34011173 csrrw x2,mscratch,x2 + 8000a1d0: 30f13423 sd x15,776(x2) + 8000a1d4: 130007ef jal x15,8000a304 + 8000a1d8: 34011173 csrrw x2,mscratch,x2 + 8000a1dc: 30f13423 sd x15,776(x2) + 8000a1e0: 124007ef jal x15,8000a304 + 8000a1e4: 34011173 csrrw x2,mscratch,x2 + 8000a1e8: 30f13423 sd x15,776(x2) + 8000a1ec: 118007ef jal x15,8000a304 + 8000a1f0: 34011173 csrrw x2,mscratch,x2 + 8000a1f4: 30f13423 sd x15,776(x2) + 8000a1f8: 10c007ef jal x15,8000a304 + 8000a1fc: 34011173 csrrw x2,mscratch,x2 + 8000a200: 30f13423 sd x15,776(x2) + 8000a204: 100007ef jal x15,8000a304 + 8000a208: 34011173 csrrw x2,mscratch,x2 + 8000a20c: 30f13423 sd x15,776(x2) + 8000a210: 0f4007ef jal x15,8000a304 + 8000a214: 34011173 csrrw x2,mscratch,x2 + 8000a218: 30f13423 sd x15,776(x2) + 8000a21c: 0e8007ef jal x15,8000a304 + 8000a220: 34011173 csrrw x2,mscratch,x2 + 8000a224: 30f13423 sd x15,776(x2) + 8000a228: 0dc007ef jal x15,8000a304 + 8000a22c: 34011173 csrrw x2,mscratch,x2 + 8000a230: 30f13423 sd x15,776(x2) + 8000a234: 0d0007ef jal x15,8000a304 + 8000a238: 34011173 csrrw x2,mscratch,x2 + 8000a23c: 30f13423 sd x15,776(x2) + 8000a240: 0c4007ef jal x15,8000a304 + 8000a244: 34011173 csrrw x2,mscratch,x2 + 8000a248: 30f13423 sd x15,776(x2) + 8000a24c: 0b8007ef jal x15,8000a304 + 8000a250: 34011173 csrrw x2,mscratch,x2 + 8000a254: 30f13423 sd x15,776(x2) + 8000a258: 0ac007ef jal x15,8000a304 + 8000a25c: 34011173 csrrw x2,mscratch,x2 + 8000a260: 30f13423 sd x15,776(x2) + 8000a264: 0a0007ef jal x15,8000a304 + 8000a268: 34011173 csrrw x2,mscratch,x2 + 8000a26c: 30f13423 sd x15,776(x2) + 8000a270: 094007ef jal x15,8000a304 + 8000a274: 34011173 csrrw x2,mscratch,x2 + 8000a278: 30f13423 sd x15,776(x2) + 8000a27c: 088007ef jal x15,8000a304 + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 07c007ef jal x15,8000a304 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 070007ef jal x15,8000a304 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 064007ef jal x15,8000a304 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 058007ef jal x15,8000a304 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 04c007ef jal x15,8000a304 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 040007ef jal x15,8000a304 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 034007ef jal x15,8000a304 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 028007ef jal x15,8000a304 + +000000008000a2e0 : + 8000a2e0: 00000317 auipc x6,0x0 + 8000a2e4: a9830313 addi x6,x6,-1384 # 80009d78 + 8000a2e8: 00000013 addi x0,x0,0 + 8000a2ec: 00000013 addi x0,x0,0 + 8000a2f0: 00000013 addi x0,x0,0 + 8000a2f4: 00000013 addi x0,x0,0 + 8000a2f8: 00000013 addi x0,x0,0 + 8000a2fc: 00000013 addi x0,x0,0 + 8000a300: 00030067 jalr x0,0(x6) + +000000008000a304 : + 8000a304: 30e13023 sd x14,768(x2) + 8000a308: 34011773 csrrw x14,mscratch,x2 + 8000a30c: 30e13823 sd x14,784(x2) + 8000a310: 2b013703 ld x14,688(x2) + 8000a314: 00070067 jalr x0,0(x14) + +000000008000a318 : + 8000a318: 2e913c23 sd x9,760(x2) + 8000a31c: 2e813823 sd x8,752(x2) + 8000a320: 2e713423 sd x7,744(x2) + 8000a324: 2e613023 sd x6,736(x2) + 8000a328: 00000013 addi x0,x0,0 + 8000a32c: 00000013 addi x0,x0,0 + 8000a330: 00000013 addi x0,x0,0 + 8000a334: 00000013 addi x0,x0,0 + 8000a338: 00000013 addi x0,x0,0 + 8000a33c: 00000013 addi x0,x0,0 + 8000a340: 00006317 auipc x6,0x6 + 8000a344: dc830313 addi x6,x6,-568 # 80010108 + 8000a348: 00000013 addi x0,x0,0 + 8000a34c: 00000013 addi x0,x0,0 + 8000a350: 00000013 addi x0,x0,0 + 8000a354: 00000013 addi x0,x0,0 + 8000a358: 00000013 addi x0,x0,0 + 8000a35c: 00000013 addi x0,x0,0 + 8000a360: 00033383 ld x7,0(x6) + 8000a364: 00138393 addi x7,x7,1 + 8000a368: 00733023 sd x7,0(x6) + 8000a36c: 34202773 csrrs x14,mcause,x0 + +000000008000a370 : + 8000a370: fff00493 addi x9,x0,-1 + 8000a374: 00d4d493 srli x9,x9,0xd + 8000a378: 00c49493 slli x9,x9,0xc + 8000a37c: fff4c493 xori x9,x9,-1 + 8000a380: 00e4f4b3 and x9,x9,x14 + +000000008000a384 : + 8000a384: ffe48413 addi x8,x9,-2 + 8000a388: 00041663 bne x8,x0,8000a394 + +000000008000a38c : + 8000a38c: 500502e3 beq x10,x0,8000b090 + 8000a390: 5b40006f jal x0,8000a944 + +000000008000a394 : + 8000a394: ff848413 addi x8,x9,-8 + 8000a398: 00245413 srli x8,x8,0x2 + 8000a39c: 5a041463 bne x8,x0,8000a944 + +000000008000a3a0 : + 8000a3a0: 4e0508e3 beq x10,x0,8000b090 + +000000008000a3a4 : + 8000a3a4: fff50493 addi x9,x10,-1 + 8000a3a8: 00500393 addi x7,x0,5 + 8000a3ac: 0274e063 bltu x9,x7,8000a3cc + 8000a3b0: 07300393 addi x7,x0,115 + 8000a3b4: 00750463 beq x10,x7,8000a3bc + 8000a3b8: 08c0006f jal x0,8000a444 + +000000008000a3bc : + 8000a3bc: 34102573 csrrs x10,mepc,x0 + 8000a3c0: 00450413 addi x8,x10,4 + 8000a3c4: 34141073 csrrw x0,mepc,x8 + 8000a3c8: 0310006f jal x0,8000abf8 + +000000008000a3cc : + 8000a3cc: 341024f3 csrrs x9,mepc,x0 + 8000a3d0: 00448493 addi x9,x9,4 + 8000a3d4: 34149073 csrrw x0,mepc,x9 + 8000a3d8: 00100393 addi x7,x0,1 + 8000a3dc: 00750e63 beq x10,x7,8000a3f8 + 8000a3e0: 00200393 addi x7,x0,2 + 8000a3e4: 02750463 beq x10,x7,8000a40c + 8000a3e8: 00300393 addi x7,x0,3 + 8000a3ec: 04750063 beq x10,x7,8000a42c + 8000a3f0: fff00513 addi x10,x0,-1 + 8000a3f4: 0050006f jal x0,8000abf8 + +000000008000a3f8 : + 8000a3f8: fff00493 addi x9,x0,-1 + 8000a3fc: 03e4d493 srli x9,x9,0x3e + 8000a400: 00b49493 slli x9,x9,0xb + 8000a404: 3004a073 csrrs x0,mstatus,x9 + 8000a408: 7f00006f jal x0,8000abf8 + +000000008000a40c : + 8000a40c: fff00493 addi x9,x0,-1 + 8000a410: 03e4d493 srli x9,x9,0x3e + 8000a414: 00b49493 slli x9,x9,0xb + 8000a418: 3004b073 csrrc x0,mstatus,x9 + 8000a41c: 00100493 addi x9,x0,1 + 8000a420: 00b49493 slli x9,x9,0xb + 8000a424: 3004a073 csrrs x0,mstatus,x9 + 8000a428: 7d00006f jal x0,8000abf8 + +000000008000a42c : + 8000a42c: fff00493 addi x9,x0,-1 + 8000a430: 03e4d493 srli x9,x9,0x3e + 8000a434: 00b49493 slli x9,x9,0xb + 8000a438: 3004b073 csrrc x0,mstatus,x9 + 8000a43c: 7bc0006f jal x0,8000abf8 + +000000008000a440 : + 8000a440: 00000013 addi x0,x0,0 + +000000008000a444 : + 8000a444: 00000013 addi x0,x0,0 + 8000a448: 00000013 addi x0,x0,0 + 8000a44c: 00000013 addi x0,x0,0 + 8000a450: 00000013 addi x0,x0,0 + 8000a454: 00000013 addi x0,x0,0 + 8000a458: 00000013 addi x0,x0,0 + 8000a45c: 00000013 addi x0,x0,0 + 8000a460: 00000397 auipc x7,0x0 + 8000a464: 17038393 addi x7,x7,368 # 8000a5d0 + 8000a468: 00000013 addi x0,x0,0 + 8000a46c: 00000013 addi x0,x0,0 + 8000a470: 00000013 addi x0,x0,0 + 8000a474: 00000013 addi x0,x0,0 + 8000a478: 00000013 addi x0,x0,0 + 8000a47c: 00000013 addi x0,x0,0 + +000000008000a480 : + 8000a480: 0003e403 lwu x8,0(x7) + 8000a484: 00a40863 beq x8,x10,8000a494 + 8000a488: 04040863 beq x8,x0,8000a4d8 + 8000a48c: 00838393 addi x7,x7,8 + 8000a490: ff1ff06f jal x0,8000a480 + +000000008000a494 : + 8000a494: 00008493 addi x9,x1,0 + 8000a498: 00000013 addi x0,x0,0 + 8000a49c: 00000013 addi x0,x0,0 + 8000a4a0: 00000097 auipc x1,0x0 + 8000a4a4: 02408093 addi x1,x1,36 # 8000a4c4 + 8000a4a8: 00000013 addi x0,x0,0 + 8000a4ac: 00000013 addi x0,x0,0 + 8000a4b0: 00000013 addi x0,x0,0 + 8000a4b4: 00000013 addi x0,x0,0 + 8000a4b8: 00000013 addi x0,x0,0 + 8000a4bc: 00000013 addi x0,x0,0 + 8000a4c0: 00038067 jalr x0,0(x7) + +000000008000a4c4 : + 8000a4c4: 00048093 addi x1,x9,0 + 8000a4c8: 34102473 csrrs x8,mepc,x0 + 8000a4cc: 00440413 addi x8,x8,4 + 8000a4d0: 34141073 csrrw x0,mepc,x8 + 8000a4d4: 7240006f jal x0,8000abf8 + +000000008000a4d8 : + 8000a4d8: 00050493 addi x9,x10,0 + 8000a4dc: 00000013 addi x0,x0,0 + 8000a4e0: 00019517 auipc x10,0x19 + 8000a4e4: c4150513 addi x10,x10,-959 # 80023121 + 8000a4e8: 00000013 addi x0,x0,0 + 8000a4ec: 00000013 addi x0,x0,0 + 8000a4f0: 00000013 addi x0,x0,0 + 8000a4f4: 00000013 addi x0,x0,0 + 8000a4f8: 00000013 addi x0,x0,0 + 8000a4fc: 00000013 addi x0,x0,0 + 8000a500: 00039097 auipc x1,0x39 + 8000a504: 0a4080e7 jalr x1,164(x1) # 800435a4 + 8000a508: 00048513 addi x10,x9,0 + 8000a50c: 02000593 addi x11,x0,32 + 8000a510: 728020ef jal x1,8000cc38 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00017517 auipc x10,0x17 + 8000a524: fc850513 addi x10,x10,-56 # 800214e8 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + 8000a540: 00039097 auipc x1,0x39 + 8000a544: 064080e7 jalr x1,100(x1) # 800435a4 + 8000a548: 00000013 addi x0,x0,0 + 8000a54c: 00000013 addi x0,x0,0 + 8000a550: 00000013 addi x0,x0,0 + 8000a554: 00000013 addi x0,x0,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00017517 auipc x10,0x17 + 8000a564: 64850513 addi x10,x10,1608 # 80021ba8 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00039097 auipc x1,0x39 + 8000a584: 024080e7 jalr x1,36(x1) # 800435a4 + 8000a588: 00000013 addi x0,x0,0 + 8000a58c: 00000013 addi x0,x0,0 + 8000a590: 00000013 addi x0,x0,0 + 8000a594: 00000013 addi x0,x0,0 + 8000a598: 00000013 addi x0,x0,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00017517 auipc x10,0x17 + 8000a5a4: 50250513 addi x10,x10,1282 # 80021aa2 + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00039097 auipc x1,0x39 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800435a4 + 8000a5c8: 00039097 auipc x1,0x39 + 8000a5cc: 03c080e7 jalr x1,60(x1) # 80043604 + +000000008000a5d0 : + 8000a5d0: 30002573 .word 0x30002573 + 8000a5d4: 00008067 jalr x0,0(x1) + 8000a5d8: 30059073 .word 0x30059073 + 8000a5dc: 00008067 jalr x0,0(x1) + 8000a5e0: 3005a073 .word 0x3005a073 + 8000a5e4: 00008067 jalr x0,0(x1) + 8000a5e8: 3005b073 .word 0x3005b073 + 8000a5ec: 00008067 jalr x0,0(x1) + 8000a5f0: 30402573 .word 0x30402573 + 8000a5f4: 00008067 jalr x0,0(x1) + 8000a5f8: 30459073 .word 0x30459073 + 8000a5fc: 00008067 jalr x0,0(x1) + 8000a600: 3045a073 .word 0x3045a073 + 8000a604: 00008067 jalr x0,0(x1) + 8000a608: 3045b073 .word 0x3045b073 + 8000a60c: 00008067 jalr x0,0(x1) + 8000a610: 30602573 .word 0x30602573 + 8000a614: 00008067 jalr x0,0(x1) + 8000a618: 30659073 .word 0x30659073 + 8000a61c: 00008067 jalr x0,0(x1) + 8000a620: 3065a073 .word 0x3065a073 + 8000a624: 00008067 jalr x0,0(x1) + 8000a628: 3065b073 .word 0x3065b073 + 8000a62c: 00008067 jalr x0,0(x1) + 8000a630: 30a02573 .word 0x30a02573 + 8000a634: 00008067 jalr x0,0(x1) + 8000a638: 30a59073 .word 0x30a59073 + 8000a63c: 00008067 jalr x0,0(x1) + 8000a640: 30a5a073 .word 0x30a5a073 + 8000a644: 00008067 jalr x0,0(x1) + 8000a648: 30a5b073 .word 0x30a5b073 + 8000a64c: 00008067 jalr x0,0(x1) + 8000a650: 34402573 .word 0x34402573 + 8000a654: 00008067 jalr x0,0(x1) + 8000a658: 34459073 .word 0x34459073 + 8000a65c: 00008067 jalr x0,0(x1) + 8000a660: 3445a073 .word 0x3445a073 + 8000a664: 00008067 jalr x0,0(x1) + 8000a668: 3445b073 .word 0x3445b073 + 8000a66c: 00008067 jalr x0,0(x1) + 8000a670: 74702573 .word 0x74702573 + 8000a674: 00008067 jalr x0,0(x1) + 8000a678: 74759073 .word 0x74759073 + 8000a67c: 00008067 jalr x0,0(x1) + 8000a680: 7475a073 .word 0x7475a073 + 8000a684: 00008067 jalr x0,0(x1) + 8000a688: 7475b073 .word 0x7475b073 + 8000a68c: 00008067 jalr x0,0(x1) + 8000a690: 32002573 .word 0x32002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 32059073 .word 0x32059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3205a073 .word 0x3205a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3205b073 .word 0x3205b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: b0002573 .word 0xb0002573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: b0059073 .word 0xb0059073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: b005a073 .word 0xb005a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: b005b073 .word 0xb005b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: b0202573 .word 0xb0202573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: b0259073 .word 0xb0259073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: b025a073 .word 0xb025a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: b025b073 .word 0xb025b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 10002573 .word 0x10002573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 10059073 .word 0x10059073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 1005a073 .word 0x1005a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 1005b073 .word 0x1005b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 10402573 .word 0x10402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 10459073 .word 0x10459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 1045a073 .word 0x1045a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 1045b073 .word 0x1045b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 10602573 .word 0x10602573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 10659073 .word 0x10659073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 1065a073 .word 0x1065a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 1065b073 .word 0x1065b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 10a02573 .word 0x10a02573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 10a59073 .word 0x10a59073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 10a5a073 .word 0x10a5a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 10a5b073 .word 0x10a5b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: 14402573 .word 0x14402573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: 14459073 .word 0x14459073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: 1445a073 .word 0x1445a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: 1445b073 .word 0x1445b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: 14d02573 .word 0x14d02573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: 14d59073 .word 0x14d59073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: 14d5a073 .word 0x14d5a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: 14d5b073 .word 0x14d5b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 18002573 .word 0x18002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 18059073 .word 0x18059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1805a073 .word 0x1805a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1805b073 .word 0x1805b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 7a002573 .word 0x7a002573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 7a059073 .word 0x7a059073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 7a05a073 .word 0x7a05a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 7a05b073 .word 0x7a05b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 7a102573 .word 0x7a102573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 7a159073 .word 0x7a159073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 7a15a073 .word 0x7a15a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 7a15b073 .word 0x7a15b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 7a202573 .word 0x7a202573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 7a259073 .word 0x7a259073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 7a25a073 .word 0x7a25a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 7a25b073 .word 0x7a25b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 7a302573 .word 0x7a302573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 7a359073 .word 0x7a359073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 7a35a073 .word 0x7a35a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 7a35b073 .word 0x7a35b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 7a402573 .word 0x7a402573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 7a459073 .word 0x7a459073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 7a45a073 .word 0x7a45a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 7a45b073 .word 0x7a45b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 7a502573 .word 0x7a502573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 7a559073 .word 0x7a559073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 7a55a073 .word 0x7a55a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 7a55b073 .word 0x7a55b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a802573 .word 0x7a802573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a859073 .word 0x7a859073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a85a073 .word 0x7a85a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a85b073 .word 0x7a85b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7aa02573 .word 0x7aa02573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7aa59073 .word 0x7aa59073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7aa5a073 .word 0x7aa5a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7aa5b073 .word 0x7aa5b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 5a802573 .word 0x5a802573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 5a859073 .word 0x5a859073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 5a85a073 .word 0x5a85a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 5a85b073 .word 0x5a85b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 6a802573 .word 0x6a802573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 6a859073 .word 0x6a859073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 6a85a073 .word 0x6a85a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 6a85b073 .word 0x6a85b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 0005a503 lw x10,0(x11) + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 0045a503 lw x10,4(x11) + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 00c5a023 sw x12,0(x11) + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 00c5a223 sw x12,4(x11) + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 0005b503 ld x10,0(x11) + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 00c5b023 sd x12,0(x11) + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 00000000 .word 0x00000000 + +000000008000a944 : + 8000a944: 02000393 addi x7,x0,32 + 8000a948: 00075c63 bge x14,x0,8000a960 + +000000008000a94c : + 8000a94c: 00171413 slli x8,x14,0x1 + 8000a950: ff240413 addi x8,x8,-14 + 8000a954: 00045663 bge x8,x0,8000a960 + 8000a958: 01800393 addi x7,x0,24 + 8000a95c: 0040006f jal x0,8000a960 + +000000008000a960 : + 8000a960: ca810113 addi x2,x2,-856 + 8000a964: 5f013303 ld x6,1520(x2) + 8000a968: 007304b3 add x9,x6,x7 + 8000a96c: 5e913823 sd x9,1520(x2) + 8000a970: 5d013403 ld x8,1488(x2) + 8000a974: 40830333 sub x6,x6,x8 + 8000a978: 35810113 addi x2,x2,856 + 8000a97c: 27813403 ld x8,632(x2) + 8000a980: 00830333 add x6,x6,x8 + 8000a984: 34102473 csrrs x8,mepc,x0 + 8000a988: 00000013 addi x0,x0,0 + 8000a98c: 00000013 addi x0,x0,0 + 8000a990: 00000013 addi x0,x0,0 + 8000a994: 00000013 addi x0,x0,0 + 8000a998: 00000013 addi x0,x0,0 + 8000a99c: 00000013 addi x0,x0,0 + 8000a9a0: 00017497 auipc x9,0x17 + 8000a9a4: b2848493 addi x9,x9,-1240 # 800214c8 + 8000a9a8: 00000013 addi x0,x0,0 + 8000a9ac: 00000013 addi x0,x0,0 + 8000a9b0: 00000013 addi x0,x0,0 + 8000a9b4: 00000013 addi x0,x0,0 + 8000a9b8: 00000013 addi x0,x0,0 + 8000a9bc: 00000013 addi x0,x0,0 + 8000a9c0: 0084b023 sd x8,0(x9) + 8000a9c4: 00e4b423 sd x14,8(x9) + 8000a9c8: 34302473 csrrs x8,mtval,x0 + 8000a9cc: 0084b823 sd x8,16(x9) + 8000a9d0: 30002473 csrrs x8,mstatus,x0 + 8000a9d4: 0084bc23 sd x8,24(x9) + 8000a9d8: 00000013 addi x0,x0,0 + 8000a9dc: 00000013 addi x0,x0,0 + 8000a9e0: 00037417 auipc x8,0x37 + 8000a9e4: 4c840413 addi x8,x8,1224 # 80041ea8 + 8000a9e8: 00000013 addi x0,x0,0 + 8000a9ec: 00000013 addi x0,x0,0 + 8000a9f0: 00000013 addi x0,x0,0 + 8000a9f4: 00000013 addi x0,x0,0 + 8000a9f8: 00000013 addi x0,x0,0 + 8000a9fc: 00000013 addi x0,x0,0 + 8000aa00: 007304b3 add x9,x6,x7 + 8000aa04: e2946663 bltu x8,x9,8000a030 + +000000008000aa08 : + 8000aa08: 2c013403 ld x8,704(x2) + 8000aa0c: 408787b3 sub x15,x15,x8 + 8000aa10: 00179493 slli x9,x15,0x1 + 8000aa14: 009787b3 add x15,x15,x9 + 8000aa18: 0057d793 srli x15,x15,0x5 + 8000aa1c: 00679793 slli x15,x15,0x6 + 8000aa20: 0077e7b3 or x15,x15,x7 + 8000aa24: 00378793 addi x15,x15,3 + 8000aa28: 02075a63 bge x14,x0,8000aa5c + 8000aa2c: 00f00413 addi x8,x0,15 + 8000aa30: 00877433 and x8,x14,x8 + 8000aa34: 304024f3 csrrs x9,mie,x0 + 8000aa38: 0084d4b3 srl x9,x9,x8 + 8000aa3c: 0014f493 andi x9,x9,1 + 8000aa40: 00b49493 slli x9,x9,0xb + 8000aa44: 0097e7b3 or x15,x15,x9 + 8000aa48: 344024f3 csrrs x9,mip,x0 + 8000aa4c: 0084d4b3 srl x9,x9,x8 + 8000aa50: 0014f493 andi x9,x9,1 + 8000aa54: 00c49493 slli x9,x9,0xc + 8000aa58: 0097e7b3 or x15,x15,x9 + 8000aa5c: 300023f3 csrrs x7,mstatus,x0 + 8000aa60: 02f39393 slli x7,x7,0x2f + 8000aa64: 0223d393 srli x7,x7,0x22 + 8000aa68: 00000437 lui x8,0x0 + 8000aa6c: 00040413 addi x8,x8,0 # 0 + 8000aa70: 00b41413 slli x8,x8,0xb + 8000aa74: 00140413 addi x8,x8,1 + 8000aa78: 00b41413 slli x8,x8,0xb + 8000aa7c: 06740413 addi x8,x8,103 + 8000aa80: 00a41413 slli x8,x8,0xa + 8000aa84: 3e540413 addi x8,x8,997 + 8000aa88: fff44413 xori x8,x8,-1 + 8000aa8c: 0083f433 and x8,x7,x8 + 8000aa90: 0087e433 or x8,x15,x8 + 8000aa94: 0204d493 srli x9,x9,0x20 + 8000aa98: 1c04f493 andi x9,x9,448 + 8000aa9c: 00849493 slli x9,x9,0x8 + 8000aaa0: 00946433 or x8,x8,x9 + 8000aaa4: 00033483 ld x9,0(x6) + 8000aaa8: 02848263 beq x9,x8,8000aacc + 8000aaac: 00040313 addi x6,x8,0 + 8000aab0: 00048213 addi x4,x9,0 + 8000aab4: 6b4003ef jal x7,8000b168 + 8000aab8: 8000aa08 .word 0x8000aa08 + 8000aabc: 00000000 .word 0x00000000 + 8000aac0: 80021caa .word 0x80021caa + 8000aac4: 00000000 .word 0x00000000 + 8000aac8: 00000341 .word 0x00000341 + +000000008000aacc : + 8000aacc: 00070413 addi x8,x14,0 + 8000aad0: 00833483 ld x9,8(x6) + 8000aad4: 02848263 beq x9,x8,8000aaf8 + 8000aad8: 00040313 addi x6,x8,0 + 8000aadc: 00048213 addi x4,x9,0 + 8000aae0: 688003ef jal x7,8000b168 + 8000aae4: 8000aacc .word 0x8000aacc + 8000aae8: 00000000 .word 0x00000000 + 8000aaec: 80021dac .word 0x80021dac + 8000aaf0: 00000000 .word 0x00000000 + 8000aaf4: 00000341 .word 0x00000341 + 8000aaf8: 12074063 blt x14,x0,8000ac18 + +000000008000aafc : + 8000aafc: 34102473 csrrs x8,mepc,x0 + 8000ab00: 00010493 addi x9,x2,0 + 8000ab04: 0040006f jal x0,8000ab08 + +000000008000ab08 : + 8000ab08: 08000393 addi x7,x0,128 + 8000ab0c: 04740863 beq x8,x7,8000ab5c + 8000ab10: 00238393 addi x7,x7,2 + 8000ab14: 04740463 beq x8,x7,8000ab5c + 8000ab18: 04040263 beq x8,x0,8000ab5c + 8000ab1c: 2884b383 ld x7,648(x9) + 8000ab20: 2904b783 ld x15,656(x9) + 8000ab24: 007787b3 add x15,x15,x7 + 8000ab28: 00f47463 bgeu x8,x15,8000ab30 + 8000ab2c: 02747663 bgeu x8,x7,8000ab58 + +000000008000ab30 : + 8000ab30: 2584b383 ld x7,600(x9) + 8000ab34: 2604b783 ld x15,608(x9) + 8000ab38: 007787b3 add x15,x15,x7 + 8000ab3c: 00f47463 bgeu x8,x15,8000ab44 + 8000ab40: 00747c63 bgeu x8,x7,8000ab58 + +000000008000ab44 : + 8000ab44: 2684b383 ld x7,616(x9) + 8000ab48: 2704b783 ld x15,624(x9) + 8000ab4c: 007787b3 add x15,x15,x7 + 8000ab50: d0f47a63 bgeu x8,x15,8000a064 + 8000ab54: d0746863 bltu x8,x7,8000a064 + +000000008000ab58 : + 8000ab58: 40740433 sub x8,x8,x7 + +000000008000ab5c : + 8000ab5c: 01033483 ld x9,16(x6) + 8000ab60: 02848263 beq x9,x8,8000ab84 + 8000ab64: 00040313 addi x6,x8,0 + 8000ab68: 00048213 addi x4,x9,0 + 8000ab6c: 5fc003ef jal x7,8000b168 + 8000ab70: 8000ab5c .word 0x8000ab5c + 8000ab74: 00000000 .word 0x00000000 + 8000ab78: 80021ea7 .word 0x80021ea7 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 00000341 .word 0x00000341 + +000000008000ab84 : + 8000ab84: 34102473 csrrs x8,mepc,x0 + 8000ab88: 342023f3 csrrs x7,mcause,x0 + 8000ab8c: 00c00793 addi x15,x0,12 + 8000ab90: 00f38a63 beq x7,x15,8000aba4 + 8000ab94: 00100793 addi x15,x0,1 + 8000ab98: 00f38663 beq x7,x15,8000aba4 + 8000ab9c: 01400793 addi x15,x0,20 + 8000aba0: 00f39663 bne x7,x15,8000abac + 8000aba4: 34109073 csrrw x0,mepc,x1 + 8000aba8: 0100006f jal x0,8000abb8 + +000000008000abac : + 8000abac: 00400393 addi x7,x0,4 + 8000abb0: 00740433 add x8,x8,x7 + 8000abb4: 34141073 csrrw x0,mepc,x8 + +000000008000abb8 : + 8000abb8: 34302473 csrrs x8,mtval,x0 + +000000008000abbc : + 8000abbc: 01833483 ld x9,24(x6) + 8000abc0: 02848263 beq x9,x8,8000abe4 + 8000abc4: 00040313 addi x6,x8,0 + 8000abc8: 00048213 addi x4,x9,0 + 8000abcc: 59c003ef jal x7,8000b168 + 8000abd0: 8000abbc .word 0x8000abbc + 8000abd4: 00000000 .word 0x00000000 + 8000abd8: 80021f9a .word 0x80021f9a + 8000abdc: 00000000 .word 0x00000000 + 8000abe0: 00000341 .word 0x00000341 + +000000008000abe4 : + 8000abe4: 30102473 csrrs x8,misa,x0 + 8000abe8: 03841413 slli x8,x8,0x38 + 8000abec: 00045263 bge x8,x0,8000abf0 + +000000008000abf0 : + 8000abf0: 20000393 addi x7,x0,512 + 8000abf4: 0640006f jal x0,8000ac58 + +000000008000abf8 : + 8000abf8: 2e013303 ld x6,736(x2) + 8000abfc: 2e813383 ld x7,744(x2) + 8000ac00: 2f013403 ld x8,752(x2) + 8000ac04: 2f813483 ld x9,760(x2) + 8000ac08: 30013703 ld x14,768(x2) + 8000ac0c: 30813783 ld x15,776(x2) + 8000ac10: 31013103 ld x2,784(x2) + 8000ac14: 30200073 mret + +000000008000ac18 : + 8000ac18: 00100413 addi x8,x0,1 + 8000ac1c: 01f77393 andi x7,x14,31 + 8000ac20: 00741433 sll x8,x8,x7 + 8000ac24: 304434f3 csrrc x9,mie,x8 + 8000ac28: 34443473 csrrc x8,mip,x8 + +000000008000ac2c : + 8000ac2c: 01033483 ld x9,16(x6) + 8000ac30: 02848263 beq x9,x8,8000ac54 + 8000ac34: 00040313 addi x6,x8,0 + 8000ac38: 00048213 addi x4,x9,0 + 8000ac3c: 52c003ef jal x7,8000b168 + 8000ac40: 8000ac2c .word 0x8000ac2c + 8000ac44: 00000000 .word 0x00000000 + 8000ac48: 8002210d .word 0x8002210d + 8000ac4c: 00000000 .word 0x00000000 + 8000ac50: 00000341 .word 0x00000341 + 8000ac54: 00000393 addi x7,x0,0 + +000000008000ac58 : + 8000ac58: 00000417 auipc x8,0x0 + 8000ac5c: 03c40413 addi x8,x8,60 # 8000ac94 + 8000ac60: 00740433 add x8,x8,x7 + 8000ac64: 00371393 slli x7,x14,0x3 + 8000ac68: 00740433 add x8,x8,x7 + 8000ac6c: ff847413 andi x8,x8,-8 + 8000ac70: 00043403 ld x8,0(x8) + +000000008000ac74 : + 8000ac74: 00040a63 beq x8,x0,8000ac88 + 8000ac78: 03f41393 slli x7,x8,0x3f + 8000ac7c: 0003d863 bge x7,x0,8000ac8c + 8000ac80: 00145413 srli x8,x8,0x1 + 8000ac84: f6870ae3 beq x14,x8,8000abf8 + 8000ac88: bdcff06f jal x0,8000a064 + +000000008000ac8c : + 8000ac8c: 00040067 jalr x0,0(x8) + +000000008000ac90 : + ... + 8000ac98: 00000001 .word 0x00000001 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000001 .word 0x00000001 + 8000aca4: 00000000 .word 0x00000000 + 8000aca8: 80043000 .word 0x80043000 + ... + 8000acb8: 00000001 .word 0x00000001 + 8000acbc: 00000000 .word 0x00000000 + 8000acc0: 00000001 .word 0x00000001 + 8000acc4: 00000000 .word 0x00000000 + 8000acc8: 80043014 .word 0x80043014 + ... + 8000acd8: 00000001 .word 0x00000001 + 8000acdc: 00000000 .word 0x00000000 + 8000ace0: 00000001 .word 0x00000001 + 8000ace4: 00000000 .word 0x00000000 + 8000ace8: 8004302c .word 0x8004302c + 8000acec: 00000000 .word 0x00000000 + 8000acf0: 00000001 .word 0x00000001 + 8000acf4: 00000000 .word 0x00000000 + 8000acf8: 00000001 .word 0x00000001 + 8000acfc: 00000000 .word 0x00000000 + 8000ad00: 00000001 .word 0x00000001 + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 00000001 .word 0x00000001 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000001 .word 0x00000001 + 8000ad14: 00000000 .word 0x00000000 + 8000ad18: 00000001 .word 0x00000001 + 8000ad1c: 00000000 .word 0x00000000 + 8000ad20: 00000001 .word 0x00000001 + 8000ad24: 00000000 .word 0x00000000 + 8000ad28: 00000001 .word 0x00000001 + 8000ad2c: 00000000 .word 0x00000000 + 8000ad30: 00000001 .word 0x00000001 + 8000ad34: 00000000 .word 0x00000000 + 8000ad38: 00000001 .word 0x00000001 + 8000ad3c: 00000000 .word 0x00000000 + 8000ad40: 00000001 .word 0x00000001 + 8000ad44: 00000000 .word 0x00000000 + 8000ad48: 00000001 .word 0x00000001 + ... + +000000008000ae90 : + 8000ae90: 00000001 .word 0x00000001 + 8000ae94: 00000000 .word 0x00000000 + 8000ae98: 00000003 .word 0x00000003 + 8000ae9c: 00000000 .word 0x00000000 + 8000aea0: 00000005 .word 0x00000005 + 8000aea4: 00000000 .word 0x00000000 + 8000aea8: 00000007 .word 0x00000007 + 8000aeac: 00000000 .word 0x00000000 + 8000aeb0: 00000009 .word 0x00000009 + 8000aeb4: 00000000 .word 0x00000000 + 8000aeb8: 0000000b .word 0x0000000b + 8000aebc: 00000000 .word 0x00000000 + 8000aec0: 0000000d .word 0x0000000d + 8000aec4: 00000000 .word 0x00000000 + 8000aec8: 0000000f .word 0x0000000f + 8000aecc: 00000000 .word 0x00000000 + 8000aed0: 00000011 .word 0x00000011 + 8000aed4: 00000000 .word 0x00000000 + 8000aed8: 00000013 .word 0x00000013 + 8000aedc: 00000000 .word 0x00000000 + 8000aee0: 00000015 .word 0x00000015 + 8000aee4: 00000000 .word 0x00000000 + 8000aee8: 00000017 .word 0x00000017 + 8000aeec: 00000000 .word 0x00000000 + 8000aef0: 00000019 .word 0x00000019 + 8000aef4: 00000000 .word 0x00000000 + 8000aef8: 0000001b .word 0x0000001b + 8000aefc: 00000000 .word 0x00000000 + 8000af00: 0000001d .word 0x0000001d + 8000af04: 00000000 .word 0x00000000 + 8000af08: 0000001f .word 0x0000001f + 8000af0c: 00000000 .word 0x00000000 + 8000af10: 00000021 .word 0x00000021 + 8000af14: 00000000 .word 0x00000000 + 8000af18: 00000023 .word 0x00000023 + 8000af1c: 00000000 .word 0x00000000 + 8000af20: 00000025 .word 0x00000025 + 8000af24: 00000000 .word 0x00000000 + 8000af28: 00000027 .word 0x00000027 + 8000af2c: 00000000 .word 0x00000000 + 8000af30: 00000029 .word 0x00000029 + 8000af34: 00000000 .word 0x00000000 + 8000af38: 0000002b .word 0x0000002b + 8000af3c: 00000000 .word 0x00000000 + 8000af40: 0000002d .word 0x0000002d + 8000af44: 00000000 .word 0x00000000 + 8000af48: 0000002f .word 0x0000002f + ... + +000000008000b090 : + 8000b090: 300023f3 csrrs x7,mstatus,x0 + 8000b094: 00b3d493 srli x9,x7,0xb + 8000b098: 0034f493 andi x9,x9,3 + 8000b09c: ffd48413 addi x8,x9,-3 + 8000b0a0: 341023f3 csrrs x7,mepc,x0 + 8000b0a4: 00000493 addi x9,x0,0 + 8000b0a8: 02040c63 beq x8,x0,8000b0e0 + 8000b0ac: 35810113 addi x2,x2,856 + 8000b0b0: 300023f3 csrrs x7,mstatus,x0 + 8000b0b4: 01839393 slli x7,x7,0x18 + 8000b0b8: 0003da63 bge x7,x0,8000b0cc + +000000008000b0bc : + 8000b0bc: 35810113 addi x2,x2,856 + 8000b0c0: 5b013783 ld x15,1456(x2) + 8000b0c4: ca810113 addi x2,x2,-856 + 8000b0c8: 0080006f jal x0,8000b0d0 + +000000008000b0cc : + 8000b0cc: f0013783 ld x15,-256(x2) + 8000b0d0: 341023f3 csrrs x7,mepc,x0 + 8000b0d4: 40f383b3 sub x7,x7,x15 + 8000b0d8: ca810113 addi x2,x2,-856 + 8000b0dc: 25813483 ld x9,600(x2) + +000000008000b0e0 : + 8000b0e0: 007483b3 add x7,x9,x7 + 8000b0e4: 2e013303 ld x6,736(x2) + 8000b0e8: 2f013403 ld x8,752(x2) + 8000b0ec: 2f813483 ld x9,760(x2) + 8000b0f0: 30013703 ld x14,768(x2) + 8000b0f4: 30813783 ld x15,776(x2) + 8000b0f8: 31013103 ld x2,784(x2) + 8000b0fc: 00438067 jalr x0,4(x7) + +000000008000b100 : + 8000b100: 00016217 auipc x4,0x16 + 8000b104: 28020213 addi x4,x4,640 # 80021380 + 8000b108: 02523423 sd x5,40(x4) # 28 + 8000b10c: 00123423 sd x1,8(x4) # 8 + 8000b110: 00023023 sd x0,0(x4) # 0 + 8000b114: 0880006f jal x0,8000b19c + +000000008000b118 : + 8000b118: 00016397 auipc x7,0x16 + 8000b11c: 26838393 addi x7,x7,616 # 80021380 + 8000b120: 0483b023 sd x8,64(x7) + 8000b124: 0243b023 sd x4,32(x7) + 8000b128: 0253b423 sd x5,40(x7) + 8000b12c: 0013b423 sd x1,8(x7) + 8000b130: 0003b023 sd x0,0(x7) + 8000b134: 00038213 addi x4,x7,0 + 8000b138: 00040293 addi x5,x8,0 + 8000b13c: 0600006f jal x0,8000b19c + +000000008000b140 : + 8000b140: 00016697 auipc x13,0x16 + 8000b144: 24068693 addi x13,x13,576 # 80021380 + 8000b148: 06e6b823 sd x14,112(x13) + 8000b14c: 0246b023 sd x4,32(x13) + 8000b150: 0256b423 sd x5,40(x13) + 8000b154: 0016b423 sd x1,8(x13) + 8000b158: 0006b023 sd x0,0(x13) + 8000b15c: 00068213 addi x4,x13,0 + 8000b160: 00070293 addi x5,x14,0 + 8000b164: 0380006f jal x0,8000b19c + +000000008000b168 : + 8000b168: 00016497 auipc x9,0x16 + 8000b16c: 21848493 addi x9,x9,536 # 80021380 + 8000b170: 0674b423 sd x7,104(x9) + 8000b174: 0244b023 sd x4,32(x9) + 8000b178: 0254b423 sd x5,40(x9) + 8000b17c: 0014b423 sd x1,8(x9) + 8000b180: 00300093 addi x1,x0,3 + 8000b184: 0014b023 sd x1,0(x9) + 8000b188: 1064b823 sd x6,272(x9) + 8000b18c: 1044bc23 sd x4,280(x9) + 8000b190: 00048213 addi x4,x9,0 + 8000b194: 00038293 addi x5,x7,0 + 8000b198: 0040006f jal x0,8000b19c + +000000008000b19c : + 8000b19c: 00223823 sd x2,16(x4) # 10 + 8000b1a0: 00323c23 sd x3,24(x4) # 18 + 8000b1a4: 02623823 sd x6,48(x4) # 30 + 8000b1a8: 02723c23 sd x7,56(x4) # 38 + 8000b1ac: 04823023 sd x8,64(x4) # 40 + 8000b1b0: 04923423 sd x9,72(x4) # 48 + 8000b1b4: 04a23823 sd x10,80(x4) # 50 + 8000b1b8: 04b23c23 sd x11,88(x4) # 58 + 8000b1bc: 06c23023 sd x12,96(x4) # 60 + 8000b1c0: 06d23423 sd x13,104(x4) # 68 + 8000b1c4: 06e23823 sd x14,112(x4) # 70 + 8000b1c8: 06f23c23 sd x15,120(x4) # 78 + 8000b1cc: 09023023 sd x16,128(x4) # 80 + 8000b1d0: 09123423 sd x17,136(x4) # 88 + 8000b1d4: 09223823 sd x18,144(x4) # 90 + 8000b1d8: 09323c23 sd x19,152(x4) # 98 + 8000b1dc: 0b423023 sd x20,160(x4) # a0 + 8000b1e0: 0b523423 sd x21,168(x4) # a8 + 8000b1e4: 0b623823 sd x22,176(x4) # b0 + 8000b1e8: 0b723c23 sd x23,184(x4) # b8 + 8000b1ec: 0d823023 sd x24,192(x4) # c0 + 8000b1f0: 0d923423 sd x25,200(x4) # c8 + 8000b1f4: 0da23823 sd x26,208(x4) # d0 + 8000b1f8: 0db23c23 sd x27,216(x4) # d8 + 8000b1fc: 0fc23023 sd x28,224(x4) # e0 + 8000b200: 0fd23423 sd x29,232(x4) # e8 + 8000b204: 0fe23823 sd x30,240(x4) # f0 + 8000b208: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b20c : + 8000b20c: 00016497 auipc x9,0x16 + 8000b210: 1744a483 lw x9,372(x9) # 80021380 + 8000b214: 00300513 addi x10,x0,3 + 8000b218: 18a48a63 beq x9,x10,8000b3ac + +000000008000b21c : + 8000b21c: ffa2d303 lhu x6,-6(x5) + 8000b220: ff82d383 lhu x7,-8(x5) + 8000b224: 01031313 slli x6,x6,0x10 + 8000b228: 00736333 or x6,x6,x7 + 8000b22c: 00f35393 srli x7,x6,0xf + 8000b230: 01f3f393 andi x7,x7,31 + 8000b234: 01435413 srli x8,x6,0x14 + 8000b238: 01f47413 andi x8,x8,31 + 8000b23c: 10822223 sw x8,260(x4) # 104 + 8000b240: 00341313 slli x6,x8,0x3 + 8000b244: 00620333 add x6,x4,x6 + 8000b248: 00033303 ld x6,0(x6) + 8000b24c: 10623823 sd x6,272(x4) # 110 + 8000b250: ff62d303 lhu x6,-10(x5) + 8000b254: ff42d383 lhu x7,-12(x5) + 8000b258: 01031313 slli x6,x6,0x10 + 8000b25c: 00736333 or x6,x6,x7 + 8000b260: 00030513 addi x10,x6,0 + 8000b264: 07f37413 andi x8,x6,127 + 8000b268: 00300493 addi x9,x0,3 + 8000b26c: 0c941463 bne x8,x9,8000b334 + 8000b270: 00c35413 srli x8,x6,0xc + 8000b274: 00747413 andi x8,x8,7 + 8000b278: 00300493 addi x9,x0,3 + 8000b27c: 0a941c63 bne x8,x9,8000b334 + 8000b280: 41435393 srai x7,x6,0x14 + 8000b284: 00f35313 srli x6,x6,0xf + 8000b288: 01f37313 andi x6,x6,31 + 8000b28c: 00331313 slli x6,x6,0x3 + 8000b290: 00620333 add x6,x4,x6 + 8000b294: 00033303 ld x6,0(x6) + 8000b298: 00730333 add x6,x6,x7 + 8000b29c: 00737413 andi x8,x6,7 + 8000b2a0: 0c041663 bne x8,x0,8000b36c + 8000b2a4: 00000013 addi x0,x0,0 + 8000b2a8: 00000013 addi x0,x0,0 + 8000b2ac: 00000013 addi x0,x0,0 + 8000b2b0: 00000013 addi x0,x0,0 + 8000b2b4: 00000013 addi x0,x0,0 + 8000b2b8: 00000013 addi x0,x0,0 + 8000b2bc: 00000013 addi x0,x0,0 + 8000b2c0: 00018417 auipc x8,0x18 + 8000b2c4: eb040413 addi x8,x8,-336 # 80023170 + 8000b2c8: 00000013 addi x0,x0,0 + 8000b2cc: 00000013 addi x0,x0,0 + 8000b2d0: 00000013 addi x0,x0,0 + 8000b2d4: 00000013 addi x0,x0,0 + 8000b2d8: 00000013 addi x0,x0,0 + 8000b2dc: 00000013 addi x0,x0,0 + 8000b2e0: 08836663 bltu x6,x8,8000b36c + 8000b2e4: 00000013 addi x0,x0,0 + 8000b2e8: 00000013 addi x0,x0,0 + 8000b2ec: 00000013 addi x0,x0,0 + 8000b2f0: 00000013 addi x0,x0,0 + 8000b2f4: 00000013 addi x0,x0,0 + 8000b2f8: 00000013 addi x0,x0,0 + 8000b2fc: 00000013 addi x0,x0,0 + 8000b300: 00037417 auipc x8,0x37 + 8000b304: bb040413 addi x8,x8,-1104 # 80041eb0 + 8000b308: 00000013 addi x0,x0,0 + 8000b30c: 00000013 addi x0,x0,0 + 8000b310: 00000013 addi x0,x0,0 + 8000b314: 00000013 addi x0,x0,0 + 8000b318: 00000013 addi x0,x0,0 + 8000b31c: 00000013 addi x0,x0,0 + 8000b320: ff840413 addi x8,x8,-8 + 8000b324: 04646463 bltu x8,x6,8000b36c + 8000b328: 00033303 ld x6,0(x6) + 8000b32c: 10623c23 sd x6,280(x4) # 118 + 8000b330: 3880006f jal x0,8000b6b8 + +000000008000b334 : + 8000b334: 00100413 addi x8,x0,1 + 8000b338: 00000013 addi x0,x0,0 + 8000b33c: 00000013 addi x0,x0,0 + 8000b340: 00016497 auipc x9,0x16 + 8000b344: 16848493 addi x9,x9,360 # 800214a8 + 8000b348: 00000013 addi x0,x0,0 + 8000b34c: 00000013 addi x0,x0,0 + 8000b350: 00000013 addi x0,x0,0 + 8000b354: 00000013 addi x0,x0,0 + 8000b358: 00000013 addi x0,x0,0 + 8000b35c: 00000013 addi x0,x0,0 + 8000b360: 0084a023 sw x8,0(x9) + 8000b364: 10a23c23 sd x10,280(x4) # 118 + 8000b368: 3500006f jal x0,8000b6b8 + +000000008000b36c : + 8000b36c: 00200413 addi x8,x0,2 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00016497 auipc x9,0x16 + 8000b384: 12848493 addi x9,x9,296 # 800214a8 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 0084a023 sw x8,0(x9) + 8000b3a4: 10623c23 sd x6,280(x4) # 118 + 8000b3a8: 3100006f jal x0,8000b6b8 + +000000008000b3ac : + 8000b3ac: 0082e303 lwu x6,8(x5) + 8000b3b0: 00c2a383 lw x7,12(x5) + 8000b3b4: 02039393 slli x7,x7,0x20 + 8000b3b8: 00736333 or x6,x6,x7 + 8000b3bc: 00016817 auipc x16,0x16 + 8000b3c0: 0fc80813 addi x16,x16,252 # 800214b8 + 8000b3c4: 00683023 sd x6,0(x16) + 8000b3c8: 0002e303 lwu x6,0(x5) + 8000b3cc: 0042a383 lw x7,4(x5) + 8000b3d0: 02039393 slli x7,x7,0x20 + 8000b3d4: 00736333 or x6,x6,x7 + 8000b3d8: 10623423 sd x6,264(x4) # 108 + 8000b3dc: 00016817 auipc x16,0x16 + 8000b3e0: 0dc80813 addi x16,x16,220 # 800214b8 + 8000b3e4: 00083303 ld x6,0(x16) + 8000b3e8: 00017397 auipc x7,0x17 + 8000b3ec: 8ab38393 addi x7,x7,-1877 # 80021c93 + 8000b3f0: 28730463 beq x6,x7,8000b678 + 8000b3f4: 00000413 addi x8,x0,0 + 8000b3f8: 00016817 auipc x16,0x16 + 8000b3fc: 0b880813 addi x16,x16,184 # 800214b0 + 8000b400: 00882023 sw x8,0(x16) + 8000b404: 00017397 auipc x7,0x17 + 8000b408: 8a638393 addi x7,x7,-1882 # 80021caa + 8000b40c: 00731863 bne x6,x7,8000b41c + 8000b410: 00100413 addi x8,x0,1 + 8000b414: 00000493 addi x9,x0,0 + 8000b418: 2740006f jal x0,8000b68c + 8000b41c: 00017397 auipc x7,0x17 + 8000b420: 99038393 addi x7,x7,-1648 # 80021dac + 8000b424: 00731863 bne x6,x7,8000b434 + 8000b428: 00200413 addi x8,x0,2 + 8000b42c: 00000493 addi x9,x0,0 + 8000b430: 25c0006f jal x0,8000b68c + 8000b434: 00017397 auipc x7,0x17 + 8000b438: a7338393 addi x7,x7,-1421 # 80021ea7 + 8000b43c: 00731863 bne x6,x7,8000b44c + 8000b440: 00300413 addi x8,x0,3 + 8000b444: 00000493 addi x9,x0,0 + 8000b448: 2440006f jal x0,8000b68c + 8000b44c: 00017397 auipc x7,0x17 + 8000b450: b4e38393 addi x7,x7,-1202 # 80021f9a + 8000b454: 00731863 bne x6,x7,8000b464 + 8000b458: 00400413 addi x8,x0,4 + 8000b45c: 00000493 addi x9,x0,0 + 8000b460: 22c0006f jal x0,8000b68c + 8000b464: 00017397 auipc x7,0x17 + 8000b468: ca938393 addi x7,x7,-855 # 8002210d + 8000b46c: 00731863 bne x6,x7,8000b47c + 8000b470: 00500413 addi x8,x0,5 + 8000b474: 00000493 addi x9,x0,0 + 8000b478: 2140006f jal x0,8000b68c + 8000b47c: 00017397 auipc x7,0x17 + 8000b480: c1538393 addi x7,x7,-1003 # 80022091 + 8000b484: 00731863 bne x6,x7,8000b494 + 8000b488: 00600413 addi x8,x0,6 + 8000b48c: 00000493 addi x9,x0,0 + 8000b490: 1fc0006f jal x0,8000b68c + 8000b494: 00017397 auipc x7,0x17 + 8000b498: c3b38393 addi x7,x7,-965 # 800220cf + 8000b49c: 00731863 bne x6,x7,8000b4ac + 8000b4a0: 00700413 addi x8,x0,7 + 8000b4a4: 00000493 addi x9,x0,0 + 8000b4a8: 1e40006f jal x0,8000b68c + 8000b4ac: 00017397 auipc x7,0x17 + 8000b4b0: 83e38393 addi x7,x7,-1986 # 80021cea + 8000b4b4: 00731863 bne x6,x7,8000b4c4 + 8000b4b8: 00100413 addi x8,x0,1 + 8000b4bc: 00100493 addi x9,x0,1 + 8000b4c0: 1cc0006f jal x0,8000b68c + 8000b4c4: 00017397 auipc x7,0x17 + 8000b4c8: 92638393 addi x7,x7,-1754 # 80021dea + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00200413 addi x8,x0,2 + 8000b4d4: 00100493 addi x9,x0,1 + 8000b4d8: 1b40006f jal x0,8000b68c + 8000b4dc: 00017397 auipc x7,0x17 + 8000b4e0: a0738393 addi x7,x7,-1529 # 80021ee3 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00300413 addi x8,x0,3 + 8000b4ec: 00100493 addi x9,x0,1 + 8000b4f0: 19c0006f jal x0,8000b68c + 8000b4f4: 00017397 auipc x7,0x17 + 8000b4f8: ae338393 addi x7,x7,-1309 # 80021fd7 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00400413 addi x8,x0,4 + 8000b504: 00100493 addi x9,x0,1 + 8000b508: 1840006f jal x0,8000b68c + 8000b50c: 00017397 auipc x7,0x17 + 8000b510: c3c38393 addi x7,x7,-964 # 80022148 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00500413 addi x8,x0,5 + 8000b51c: 00100493 addi x9,x0,1 + 8000b520: 16c0006f jal x0,8000b68c + 8000b524: 00017397 auipc x7,0x17 + 8000b528: 80638393 addi x7,x7,-2042 # 80021d2a + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00100413 addi x8,x0,1 + 8000b534: 00200493 addi x9,x0,2 + 8000b538: 1540006f jal x0,8000b68c + 8000b53c: 00017397 auipc x7,0x17 + 8000b540: 8ec38393 addi x7,x7,-1812 # 80021e28 + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00200413 addi x8,x0,2 + 8000b54c: 00200493 addi x9,x0,2 + 8000b550: 13c0006f jal x0,8000b68c + 8000b554: 00017397 auipc x7,0x17 + 8000b558: 9cb38393 addi x7,x7,-1589 # 80021f1f + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00300413 addi x8,x0,3 + 8000b564: 00200493 addi x9,x0,2 + 8000b568: 1240006f jal x0,8000b68c + 8000b56c: 00017397 auipc x7,0x17 + 8000b570: aa838393 addi x7,x7,-1368 # 80022014 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00400413 addi x8,x0,4 + 8000b57c: 00200493 addi x9,x0,2 + 8000b580: 10c0006f jal x0,8000b68c + 8000b584: 00017397 auipc x7,0x17 + 8000b588: bff38393 addi x7,x7,-1025 # 80022183 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00500413 addi x8,x0,5 + 8000b594: 00200493 addi x9,x0,2 + 8000b598: 0f40006f jal x0,8000b68c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 7cf38393 addi x7,x7,1999 # 80021d6b + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00100413 addi x8,x0,1 + 8000b5ac: 00300493 addi x9,x0,3 + 8000b5b0: 0dc0006f jal x0,8000b68c + 8000b5b4: 00017397 auipc x7,0x17 + 8000b5b8: 8b338393 addi x7,x7,-1869 # 80021e67 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00200413 addi x8,x0,2 + 8000b5c4: 00300493 addi x9,x0,3 + 8000b5c8: 0c40006f jal x0,8000b68c + 8000b5cc: 00017397 auipc x7,0x17 + 8000b5d0: 99038393 addi x7,x7,-1648 # 80021f5c + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00300413 addi x8,x0,3 + 8000b5dc: 00300493 addi x9,x0,3 + 8000b5e0: 0ac0006f jal x0,8000b68c + 8000b5e4: 00017397 auipc x7,0x17 + 8000b5e8: a6e38393 addi x7,x7,-1426 # 80022052 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00400413 addi x8,x0,4 + 8000b5f4: 00300493 addi x9,x0,3 + 8000b5f8: 0940006f jal x0,8000b68c + 8000b5fc: 00017397 auipc x7,0x17 + 8000b600: bc338393 addi x7,x7,-1085 # 800221bf + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00500413 addi x8,x0,5 + 8000b60c: 00300493 addi x9,x0,3 + 8000b610: 07c0006f jal x0,8000b68c + 8000b614: 00017397 auipc x7,0x17 + 8000b618: be838393 addi x7,x7,-1048 # 800221fc + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00800413 addi x8,x0,8 + 8000b624: 00000493 addi x9,x0,0 + 8000b628: 0640006f jal x0,8000b68c + 8000b62c: 00017397 auipc x7,0x17 + 8000b630: c1f38393 addi x7,x7,-993 # 8002224b + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00800413 addi x8,x0,8 + 8000b63c: 00000493 addi x9,x0,0 + 8000b640: 04c0006f jal x0,8000b68c + 8000b644: 00017397 auipc x7,0x17 + 8000b648: d0238393 addi x7,x7,-766 # 80022346 + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00800413 addi x8,x0,8 + 8000b654: 00100493 addi x9,x0,1 + 8000b658: 0340006f jal x0,8000b68c + 8000b65c: 00017397 auipc x7,0x17 + 8000b660: de638393 addi x7,x7,-538 # 80022442 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00800413 addi x8,x0,8 + 8000b66c: 00200493 addi x9,x0,2 + 8000b670: 01c0006f jal x0,8000b68c + 8000b674: 0340006f jal x0,8000b6a8 + +000000008000b678 : + 8000b678: 00900413 addi x8,x0,9 + 8000b67c: 00016817 auipc x16,0x16 + 8000b680: e3480813 addi x16,x16,-460 # 800214b0 + 8000b684: 00882023 sw x8,0(x16) + 8000b688: 0300006f jal x0,8000b6b8 + +000000008000b68c : + 8000b68c: 00016817 auipc x16,0x16 + 8000b690: e2480813 addi x16,x16,-476 # 800214b0 + 8000b694: 00882023 sw x8,0(x16) + 8000b698: 00016817 auipc x16,0x16 + 8000b69c: e1c80813 addi x16,x16,-484 # 800214b4 + 8000b6a0: 00982023 sw x9,0(x16) + 8000b6a4: 0140006f jal x0,8000b6b8 + +000000008000b6a8 : + 8000b6a8: 00016817 auipc x16,0x16 + 8000b6ac: e0880813 addi x16,x16,-504 # 800214b0 + 8000b6b0: 00082023 sw x0,0(x16) + 8000b6b4: 0040006f jal x0,8000b6b8 + +000000008000b6b8 : + 8000b6b8: 0002e303 lwu x6,0(x5) + 8000b6bc: 0042a383 lw x7,4(x5) + 8000b6c0: 02039393 slli x7,x7,0x20 + 8000b6c4: 00736333 or x6,x6,x7 + 8000b6c8: 10623423 sd x6,264(x4) # 108 + 8000b6cc: 00035383 lhu x7,0(x6) + 8000b6d0: 0033f413 andi x8,x7,3 + 8000b6d4: 00300493 addi x9,x0,3 + 8000b6d8: 00941863 bne x8,x9,8000b6e8 + 8000b6dc: 00235403 lhu x8,2(x6) + 8000b6e0: 01041413 slli x8,x8,0x10 + 8000b6e4: 0083e3b3 or x7,x7,x8 + 8000b6e8: 10722023 sw x7,256(x4) # 100 + 8000b6ec: 0082e303 lwu x6,8(x5) + 8000b6f0: 00c2a383 lw x7,12(x5) + 8000b6f4: 02039393 slli x7,x7,0x20 + 8000b6f8: 00736333 or x6,x6,x7 + 8000b6fc: 12623023 sd x6,288(x4) # 120 + +000000008000b700 : + 8000b700: 00016517 auipc x10,0x16 + 8000b704: 3a250513 addi x10,x10,930 # 80021aa2 + 8000b708: 00000013 addi x0,x0,0 + 8000b70c: 00000013 addi x0,x0,0 + 8000b710: 00000013 addi x0,x0,0 + 8000b714: 00000013 addi x0,x0,0 + 8000b718: 00000013 addi x0,x0,0 + 8000b71c: 00000013 addi x0,x0,0 + 8000b720: 00038097 auipc x1,0x38 + 8000b724: e84080e7 jalr x1,-380(x1) # 800435a4 + 8000b728: 00000013 addi x0,x0,0 + 8000b72c: 00000013 addi x0,x0,0 + 8000b730: 00000013 addi x0,x0,0 + 8000b734: 00000013 addi x0,x0,0 + 8000b738: 00000013 addi x0,x0,0 + 8000b73c: 00000013 addi x0,x0,0 + 8000b740: 00016517 auipc x10,0x16 + 8000b744: 39f50513 addi x10,x10,927 # 80021adf + 8000b748: 00000013 addi x0,x0,0 + 8000b74c: 00000013 addi x0,x0,0 + 8000b750: 00000013 addi x0,x0,0 + 8000b754: 00000013 addi x0,x0,0 + 8000b758: 00000013 addi x0,x0,0 + 8000b75c: 00000013 addi x0,x0,0 + 8000b760: 00038097 auipc x1,0x38 + 8000b764: e44080e7 jalr x1,-444(x1) # 800435a4 + +000000008000b768 : + 8000b768: 00000013 addi x0,x0,0 + 8000b76c: 00000013 addi x0,x0,0 + 8000b770: 00000013 addi x0,x0,0 + 8000b774: 00000013 addi x0,x0,0 + 8000b778: 00000013 addi x0,x0,0 + 8000b77c: 00000013 addi x0,x0,0 + 8000b780: 00016517 auipc x10,0x16 + 8000b784: 41650513 addi x10,x10,1046 # 80021b96 + 8000b788: 00000013 addi x0,x0,0 + 8000b78c: 00000013 addi x0,x0,0 + 8000b790: 00000013 addi x0,x0,0 + 8000b794: 00000013 addi x0,x0,0 + 8000b798: 00000013 addi x0,x0,0 + 8000b79c: 00000013 addi x0,x0,0 + 8000b7a0: 00038097 auipc x1,0x38 + 8000b7a4: e04080e7 jalr x1,-508(x1) # 800435a4 + +000000008000b7a8 : + 8000b7a8: 00016517 auipc x10,0x16 + 8000b7ac: cf853503 ld x10,-776(x10) # 800214a0 + 8000b7b0: 00038097 auipc x1,0x38 + 8000b7b4: df4080e7 jalr x1,-524(x1) # 800435a4 + +000000008000b7b8 : + 8000b7b8: 00000013 addi x0,x0,0 + 8000b7bc: 00000013 addi x0,x0,0 + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: 3e850513 addi x10,x10,1000 # 80021ba8 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00038097 auipc x1,0x38 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800435a4 + 8000b7e8: 00016517 auipc x10,0x16 + 8000b7ec: b9852503 lw x10,-1128(x10) # 80021380 + 8000b7f0: 00300593 addi x11,x0,3 + 8000b7f4: 52b50c63 beq x10,x11,8000bd2c + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: 3aa50513 addi x10,x10,938 # 80021baa + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00038097 auipc x1,0x38 + 8000b824: d84080e7 jalr x1,-636(x1) # 800435a4 + 8000b828: 00016517 auipc x10,0x16 + 8000b82c: c5852503 lw x10,-936(x10) # 80021480 + 8000b830: 02000593 addi x11,x0,32 + 8000b834: 00357613 andi x12,x10,3 + 8000b838: 00300693 addi x13,x0,3 + 8000b83c: 00d60463 beq x12,x13,8000b844 + 8000b840: 01000593 addi x11,x0,16 + 8000b844: 3f4010ef jal x1,8000cc38 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00016517 auipc x10,0x16 + 8000b864: c8850513 addi x10,x10,-888 # 800214e8 + 8000b868: 00000013 addi x0,x0,0 + 8000b86c: 00000013 addi x0,x0,0 + 8000b870: 00000013 addi x0,x0,0 + 8000b874: 00000013 addi x0,x0,0 + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00038097 auipc x1,0x38 + 8000b884: d24080e7 jalr x1,-732(x1) # 800435a4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00016517 auipc x10,0x16 + 8000b8a4: 31e50513 addi x10,x10,798 # 80021bbe + 8000b8a8: 00000013 addi x0,x0,0 + 8000b8ac: 00000013 addi x0,x0,0 + 8000b8b0: 00000013 addi x0,x0,0 + 8000b8b4: 00000013 addi x0,x0,0 + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00038097 auipc x1,0x38 + 8000b8c4: ce4080e7 jalr x1,-796(x1) # 800435a4 + 8000b8c8: 00016517 auipc x10,0x16 + 8000b8cc: bc053503 ld x10,-1088(x10) # 80021488 + 8000b8d0: 04000593 addi x11,x0,64 + 8000b8d4: 364010ef jal x1,8000cc38 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00016517 auipc x10,0x16 + 8000b8e4: c0850513 addi x10,x10,-1016 # 800214e8 + 8000b8e8: 00000013 addi x0,x0,0 + 8000b8ec: 00000013 addi x0,x0,0 + 8000b8f0: 00000013 addi x0,x0,0 + 8000b8f4: 00000013 addi x0,x0,0 + 8000b8f8: 00000013 addi x0,x0,0 + 8000b8fc: 00000013 addi x0,x0,0 + 8000b900: 00038097 auipc x1,0x38 + 8000b904: ca4080e7 jalr x1,-860(x1) # 800435a4 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00017517 auipc x10,0x17 + 8000b924: cd550513 addi x10,x10,-811 # 800225f5 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00038097 auipc x1,0x38 + 8000b944: c64080e7 jalr x1,-924(x1) # 800435a4 + 8000b948: 00016517 auipc x10,0x16 + 8000b94c: a3852503 lw x10,-1480(x10) # 80021380 + 8000b950: 00050663 beq x10,x0,8000b95c + 8000b954: 00300593 addi x11,x0,3 + 8000b958: 04b51063 bne x10,x11,8000b998 + 8000b95c: 07800593 addi x11,x0,120 + 8000b960: 00016617 auipc x12,0x16 + 8000b964: b8860613 addi x12,x12,-1144 # 800214e8 + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00b60023 sb x11,0(x12) + 8000b984: 00160613 addi x12,x12,1 + 8000b988: 00016517 auipc x10,0x16 + 8000b98c: afc52503 lw x10,-1284(x10) # 80021484 + 8000b990: 324010ef jal x1,8000ccb4 + 8000b994: 1180006f jal x0,8000baac + +000000008000b998 : + 8000b998: 00100593 addi x11,x0,1 + 8000b99c: 04b50863 beq x10,x11,8000b9ec + 8000b9a0: 00400593 addi x11,x0,4 + 8000b9a4: 08b50a63 beq x10,x11,8000ba38 + 8000b9a8: 00500593 addi x11,x0,5 + 8000b9ac: 0cb50463 beq x10,x11,8000ba74 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00017517 auipc x10,0x17 + 8000b9c4: d4b50513 addi x10,x10,-693 # 8002270b + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00038097 auipc x1,0x38 + 8000b9e4: bc4080e7 jalr x1,-1084(x1) # 800435a4 + 8000b9e8: 1000006f jal x0,8000bae8 + +000000008000b9ec : + 8000b9ec: 06600593 addi x11,x0,102 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00016617 auipc x12,0x16 + 8000ba04: ae860613 addi x12,x12,-1304 # 800214e8 + 8000ba08: 00000013 addi x0,x0,0 + 8000ba0c: 00000013 addi x0,x0,0 + 8000ba10: 00000013 addi x0,x0,0 + 8000ba14: 00000013 addi x0,x0,0 + 8000ba18: 00000013 addi x0,x0,0 + 8000ba1c: 00000013 addi x0,x0,0 + 8000ba20: 00b60023 sb x11,0(x12) + 8000ba24: 00160613 addi x12,x12,1 + 8000ba28: 00016517 auipc x10,0x16 + 8000ba2c: a5c52503 lw x10,-1444(x10) # 80021484 + 8000ba30: 284010ef jal x1,8000ccb4 + 8000ba34: 0780006f jal x0,8000baac + +000000008000ba38 : + 8000ba38: 07600593 addi x11,x0,118 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00016617 auipc x12,0x16 + 8000ba44: aa860613 addi x12,x12,-1368 # 800214e8 + 8000ba48: 00000013 addi x0,x0,0 + 8000ba4c: 00000013 addi x0,x0,0 + 8000ba50: 00000013 addi x0,x0,0 + 8000ba54: 00000013 addi x0,x0,0 + 8000ba58: 00000013 addi x0,x0,0 + 8000ba5c: 00000013 addi x0,x0,0 + 8000ba60: 00b60023 sb x11,0(x12) + 8000ba64: 00160613 addi x12,x12,1 + 8000ba68: 00016517 auipc x10,0x16 + 8000ba6c: a1c52503 lw x10,-1508(x10) # 80021484 + 8000ba70: 244010ef jal x1,8000ccb4 + +000000008000ba74 : + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00017517 auipc x10,0x17 + 8000ba84: b6e50513 addi x10,x10,-1170 # 800225ee + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00038097 auipc x1,0x38 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800435a4 + 8000baa8: 0400006f jal x0,8000bae8 + +000000008000baac : + 8000baac: 00000013 addi x0,x0,0 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00016517 auipc x10,0x16 + 8000bac4: a2850513 addi x10,x10,-1496 # 800214e8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00038097 auipc x1,0x38 + 8000bae4: ac4080e7 jalr x1,-1340(x1) # 800435a4 + +000000008000bae8 : + 8000bae8: 00000013 addi x0,x0,0 + 8000baec: 00000013 addi x0,x0,0 + 8000baf0: 00000013 addi x0,x0,0 + 8000baf4: 00000013 addi x0,x0,0 + 8000baf8: 00000013 addi x0,x0,0 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00017517 auipc x10,0x17 + 8000bb04: b0650513 addi x10,x10,-1274 # 80022606 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00038097 auipc x1,0x38 + 8000bb24: a84080e7 jalr x1,-1404(x1) # 800435a4 + 8000bb28: 00016517 auipc x10,0x16 + 8000bb2c: 85852503 lw x10,-1960(x10) # 80021380 + 8000bb30: 00100593 addi x11,x0,1 + 8000bb34: 00b51c63 bne x10,x11,8000bb4c + 8000bb38: 00016517 auipc x10,0x16 + 8000bb3c: 95853503 ld x10,-1704(x10) # 80021490 + 8000bb40: 04000593 addi x11,x0,64 + 8000bb44: 0f4010ef jal x1,8000cc38 + 8000bb48: 0140006f jal x0,8000bb5c + +000000008000bb4c : + 8000bb4c: 00016517 auipc x10,0x16 + 8000bb50: 94453503 ld x10,-1724(x10) # 80021490 + 8000bb54: 04000593 addi x11,x0,64 + 8000bb58: 0e0010ef jal x1,8000cc38 + +000000008000bb5c : + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00016517 auipc x10,0x16 + 8000bb64: 98850513 addi x10,x10,-1656 # 800214e8 + 8000bb68: 00000013 addi x0,x0,0 + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00038097 auipc x1,0x38 + 8000bb84: a24080e7 jalr x1,-1500(x1) # 800435a4 + 8000bb88: 00016517 auipc x10,0x16 + 8000bb8c: 92052503 lw x10,-1760(x10) # 800214a8 + 8000bb90: 08051e63 bne x10,x0,8000bc2c + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00017517 auipc x10,0x17 + 8000bba4: a7d50513 addi x10,x10,-1411 # 8002261d + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00038097 auipc x1,0x38 + 8000bbc4: 9e4080e7 jalr x1,-1564(x1) # 800435a4 + 8000bbc8: 00015517 auipc x10,0x15 + 8000bbcc: 7b852503 lw x10,1976(x10) # 80021380 + 8000bbd0: 00100593 addi x11,x0,1 + 8000bbd4: 00b51c63 bne x10,x11,8000bbec + 8000bbd8: 00016517 auipc x10,0x16 + 8000bbdc: 8c053503 ld x10,-1856(x10) # 80021498 + 8000bbe0: 04000593 addi x11,x0,64 + 8000bbe4: 054010ef jal x1,8000cc38 + 8000bbe8: 0140006f jal x0,8000bbfc + +000000008000bbec : + 8000bbec: 00016517 auipc x10,0x16 + 8000bbf0: 8ac53503 ld x10,-1876(x10) # 80021498 + 8000bbf4: 04000593 addi x11,x0,64 + 8000bbf8: 040010ef jal x1,8000cc38 + +000000008000bbfc : + 8000bbfc: 00000013 addi x0,x0,0 + 8000bc00: 00016517 auipc x10,0x16 + 8000bc04: 8e850513 addi x10,x10,-1816 # 800214e8 + 8000bc08: 00000013 addi x0,x0,0 + 8000bc0c: 00000013 addi x0,x0,0 + 8000bc10: 00000013 addi x0,x0,0 + 8000bc14: 00000013 addi x0,x0,0 + 8000bc18: 00000013 addi x0,x0,0 + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00038097 auipc x1,0x38 + 8000bc24: 984080e7 jalr x1,-1660(x1) # 800435a4 + 8000bc28: 5bd0006f jal x0,8000c9e4 + +000000008000bc2c : + 8000bc2c: 00100593 addi x11,x0,1 + 8000bc30: 06b51e63 bne x10,x11,8000bcac + +000000008000bc34 : + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00017517 auipc x10,0x17 + 8000bc44: 9f450513 addi x10,x10,-1548 # 80022634 + 8000bc48: 00000013 addi x0,x0,0 + 8000bc4c: 00000013 addi x0,x0,0 + 8000bc50: 00000013 addi x0,x0,0 + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00038097 auipc x1,0x38 + 8000bc64: 944080e7 jalr x1,-1724(x1) # 800435a4 + 8000bc68: 00016517 auipc x10,0x16 + 8000bc6c: 83053503 ld x10,-2000(x10) # 80021498 + 8000bc70: 02000593 addi x11,x0,32 + 8000bc74: 7c5000ef jal x1,8000cc38 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00016517 auipc x10,0x16 + 8000bc84: 86850513 addi x10,x10,-1944 # 800214e8 + 8000bc88: 00000013 addi x0,x0,0 + 8000bc8c: 00000013 addi x0,x0,0 + 8000bc90: 00000013 addi x0,x0,0 + 8000bc94: 00000013 addi x0,x0,0 + 8000bc98: 00000013 addi x0,x0,0 + 8000bc9c: 00000013 addi x0,x0,0 + 8000bca0: 00038097 auipc x1,0x38 + 8000bca4: 904080e7 jalr x1,-1788(x1) # 800435a4 + 8000bca8: 53d0006f jal x0,8000c9e4 + +000000008000bcac : + 8000bcac: 00000013 addi x0,x0,0 + 8000bcb0: 00000013 addi x0,x0,0 + 8000bcb4: 00000013 addi x0,x0,0 + 8000bcb8: 00000013 addi x0,x0,0 + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00017517 auipc x10,0x17 + 8000bcc4: 9d250513 addi x10,x10,-1582 # 80022692 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00038097 auipc x1,0x38 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800435a4 + 8000bce8: 00015517 auipc x10,0x15 + 8000bcec: 7b053503 ld x10,1968(x10) # 80021498 + 8000bcf0: 04000593 addi x11,x0,64 + 8000bcf4: 745000ef jal x1,8000cc38 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00015517 auipc x10,0x15 + 8000bd04: 7e850513 addi x10,x10,2024 # 800214e8 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00038097 auipc x1,0x38 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800435a4 + 8000bd28: 4bd0006f jal x0,8000c9e4 + +000000008000bd2c : + 8000bd2c: 00015417 auipc x8,0x15 + 8000bd30: 78442403 lw x8,1924(x8) # 800214b0 + 8000bd34: 00900493 addi x9,x0,9 + 8000bd38: 0a940c63 beq x8,x9,8000bdf0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00017517 auipc x10,0x17 + 8000bd44: 9f750513 addi x10,x10,-1545 # 80022737 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00038097 auipc x1,0x38 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800435a4 + 8000bd68: 00000013 addi x0,x0,0 + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00017517 auipc x10,0x17 + 8000bd84: 9e350513 addi x10,x10,-1565 # 80022763 + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00038097 auipc x1,0x38 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800435a4 + 8000bda8: 00015817 auipc x16,0x15 + 8000bdac: 71080813 addi x16,x16,1808 # 800214b8 + 8000bdb0: 00083503 ld x10,0(x16) + 8000bdb4: 00037097 auipc x1,0x37 + 8000bdb8: 7f0080e7 jalr x1,2032(x1) # 800435a4 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00016517 auipc x10,0x16 + 8000bdc4: de850513 addi x10,x10,-536 # 80021ba8 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00037097 auipc x1,0x37 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800435a4 + 8000bde8: 280404e3 beq x8,x0,8000c870 + 8000bdec: 3400006f jal x0,8000c12c + +000000008000bdf0 : + 8000bdf0: 00000013 addi x0,x0,0 + 8000bdf4: 00000013 addi x0,x0,0 + 8000bdf8: 00000013 addi x0,x0,0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00017517 auipc x10,0x17 + 8000be04: 97350513 addi x10,x10,-1677 # 80022773 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00037097 auipc x1,0x37 + 8000be24: 784080e7 jalr x1,1924(x1) # 800435a4 + 8000be28: 00015517 auipc x10,0x15 + 8000be2c: 67053503 ld x10,1648(x10) # 80021498 + 8000be30: 04000593 addi x11,x0,64 + 8000be34: 605000ef jal x1,8000cc38 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00015517 auipc x10,0x15 + 8000be44: 6a850513 addi x10,x10,1704 # 800214e8 + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00037097 auipc x1,0x37 + 8000be64: 744080e7 jalr x1,1860(x1) # 800435a4 + 8000be68: 00000013 addi x0,x0,0 + 8000be6c: 00000013 addi x0,x0,0 + 8000be70: 00000013 addi x0,x0,0 + 8000be74: 00000013 addi x0,x0,0 + 8000be78: 00000013 addi x0,x0,0 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00017517 auipc x10,0x17 + 8000be84: 91e50513 addi x10,x10,-1762 # 8002279e + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00037097 auipc x1,0x37 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800435a4 + 8000bea8: 00015517 auipc x10,0x15 + 8000beac: 5e853503 ld x10,1512(x10) # 80021490 + 8000beb0: 04000593 addi x11,x0,64 + 8000beb4: 585000ef jal x1,8000cc38 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00015517 auipc x10,0x15 + 8000bec4: 62850513 addi x10,x10,1576 # 800214e8 + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00037097 auipc x1,0x37 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800435a4 + 8000bee8: 00015317 auipc x6,0x15 + 8000beec: 5a833303 ld x6,1448(x6) # 80021490 + 8000bef0: 00015397 auipc x7,0x15 + 8000bef4: 5a83b383 ld x7,1448(x7) # 80021498 + 8000bef8: 10736a63 bltu x6,x7,8000c00c + +000000008000befc : + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00017517 auipc x10,0x17 + 8000bf04: 8cd50513 addi x10,x10,-1843 # 800227cd + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00037097 auipc x1,0x37 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800435a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00017517 auipc x10,0x17 + 8000bf44: 8f550513 addi x10,x10,-1803 # 80022835 + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00037097 auipc x1,0x37 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800435a4 + 8000bf68: 00015317 auipc x6,0x15 + 8000bf6c: 52833303 ld x6,1320(x6) # 80021490 + 8000bf70: 00015397 auipc x7,0x15 + 8000bf74: 5283b383 ld x7,1320(x7) # 80021498 + 8000bf78: 40730533 sub x10,x6,x7 + 8000bf7c: 04000593 addi x11,x0,64 + 8000bf80: 4b9000ef jal x1,8000cc38 + 8000bf84: 00000013 addi x0,x0,0 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00015517 auipc x10,0x15 + 8000bfa4: 54850513 addi x10,x10,1352 # 800214e8 + 8000bfa8: 00000013 addi x0,x0,0 + 8000bfac: 00000013 addi x0,x0,0 + 8000bfb0: 00000013 addi x0,x0,0 + 8000bfb4: 00000013 addi x0,x0,0 + 8000bfb8: 00000013 addi x0,x0,0 + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00037097 auipc x1,0x37 + 8000bfc4: 5e4080e7 jalr x1,1508(x1) # 800435a4 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00017517 auipc x10,0x17 + 8000bfe4: 87c50513 addi x10,x10,-1924 # 8002285c + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00037097 auipc x1,0x37 + 8000c004: 5a4080e7 jalr x1,1444(x1) # 800435a4 + 8000c008: 1dd0006f jal x0,8000c9e4 + +000000008000c00c : + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00016517 auipc x10,0x16 + 8000c024: 7d950513 addi x10,x10,2009 # 800227f9 + 8000c028: 00000013 addi x0,x0,0 + 8000c02c: 00000013 addi x0,x0,0 + 8000c030: 00000013 addi x0,x0,0 + 8000c034: 00000013 addi x0,x0,0 + 8000c038: 00000013 addi x0,x0,0 + 8000c03c: 00000013 addi x0,x0,0 + 8000c040: 00037097 auipc x1,0x37 + 8000c044: 564080e7 jalr x1,1380(x1) # 800435a4 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00016517 auipc x10,0x16 + 8000c064: 7d550513 addi x10,x10,2005 # 80022835 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00037097 auipc x1,0x37 + 8000c084: 524080e7 jalr x1,1316(x1) # 800435a4 + 8000c088: 00015317 auipc x6,0x15 + 8000c08c: 41033303 ld x6,1040(x6) # 80021498 + 8000c090: 00015397 auipc x7,0x15 + 8000c094: 4003b383 ld x7,1024(x7) # 80021490 + 8000c098: 40730533 sub x10,x6,x7 + 8000c09c: 04000593 addi x11,x0,64 + 8000c0a0: 399000ef jal x1,8000cc38 + 8000c0a4: 00000013 addi x0,x0,0 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00015517 auipc x10,0x15 + 8000c0c4: 42850513 addi x10,x10,1064 # 800214e8 + 8000c0c8: 00000013 addi x0,x0,0 + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00037097 auipc x1,0x37 + 8000c0e4: 4c4080e7 jalr x1,1220(x1) # 800435a4 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00017517 auipc x10,0x17 + 8000c104: 84450513 addi x10,x10,-1980 # 80022944 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00037097 auipc x1,0x37 + 8000c124: 484080e7 jalr x1,1156(x1) # 800435a4 + 8000c128: 0bd0006f jal x0,8000c9e4 + +000000008000c12c : + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00017517 auipc x10,0x17 + 8000c144: 8eb50513 addi x10,x10,-1813 # 80022a2b + 8000c148: 00000013 addi x0,x0,0 + 8000c14c: 00000013 addi x0,x0,0 + 8000c150: 00000013 addi x0,x0,0 + 8000c154: 00000013 addi x0,x0,0 + 8000c158: 00000013 addi x0,x0,0 + 8000c15c: 00000013 addi x0,x0,0 + 8000c160: 00037097 auipc x1,0x37 + 8000c164: 444080e7 jalr x1,1092(x1) # 800435a4 + 8000c168: 00015517 auipc x10,0x15 + 8000c16c: 34c52503 lw x10,844(x10) # 800214b4 + 8000c170: 04050a63 beq x10,x0,8000c1c4 + 8000c174: 00100593 addi x11,x0,1 + 8000c178: 08b50663 beq x10,x11,8000c204 + 8000c17c: 00200593 addi x11,x0,2 + 8000c180: 0cb50263 beq x10,x11,8000c244 + 8000c184: 00300593 addi x11,x0,3 + 8000c188: 0eb50e63 beq x10,x11,8000c284 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00017517 auipc x10,0x17 + 8000c1a4: 8c750513 addi x10,x10,-1849 # 80022a67 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 1000006f jal x0,8000c2c0 + +000000008000c1c4 : + 8000c1c4: 00000013 addi x0,x0,0 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00017517 auipc x10,0x17 + 8000c1e4: 86550513 addi x10,x10,-1947 # 80022a45 + 8000c1e8: 00000013 addi x0,x0,0 + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 0c00006f jal x0,8000c2c0 + +000000008000c204 : + 8000c204: 00000013 addi x0,x0,0 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00017517 auipc x10,0x17 + 8000c224: 82d50513 addi x10,x10,-2003 # 80022a4d + 8000c228: 00000013 addi x0,x0,0 + 8000c22c: 00000013 addi x0,x0,0 + 8000c230: 00000013 addi x0,x0,0 + 8000c234: 00000013 addi x0,x0,0 + 8000c238: 00000013 addi x0,x0,0 + 8000c23c: 00000013 addi x0,x0,0 + 8000c240: 0800006f jal x0,8000c2c0 + +000000008000c244 : + 8000c244: 00000013 addi x0,x0,0 + 8000c248: 00000013 addi x0,x0,0 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 7f550513 addi x10,x10,2037 # 80022a55 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 0400006f jal x0,8000c2c0 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 7be50513 addi x10,x10,1982 # 80022a5e + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + +000000008000c2c0 : + 8000c2c0: 00037097 auipc x1,0x37 + 8000c2c4: 2e4080e7 jalr x1,740(x1) # 800435a4 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 79050513 addi x10,x10,1936 # 80022a70 + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 00037097 auipc x1,0x37 + 8000c304: 2a4080e7 jalr x1,676(x1) # 800435a4 + 8000c308: 00015517 auipc x10,0x15 + 8000c30c: 1a852503 lw x10,424(x10) # 800214b0 + 8000c310: 00100593 addi x11,x0,1 + 8000c314: 06b50863 beq x10,x11,8000c384 + 8000c318: 00200593 addi x11,x0,2 + 8000c31c: 0ab50463 beq x10,x11,8000c3c4 + 8000c320: 00300593 addi x11,x0,3 + 8000c324: 0eb50063 beq x10,x11,8000c404 + 8000c328: 00400593 addi x11,x0,4 + 8000c32c: 10b50c63 beq x10,x11,8000c444 + 8000c330: 00500593 addi x11,x0,5 + 8000c334: 14b50863 beq x10,x11,8000c484 + 8000c338: 00600593 addi x11,x0,6 + 8000c33c: 18b50463 beq x10,x11,8000c4c4 + 8000c340: 00700593 addi x11,x0,7 + 8000c344: 1cb50063 beq x10,x11,8000c504 + 8000c348: 00800593 addi x11,x0,8 + 8000c34c: 1eb50c63 beq x10,x11,8000c544 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00017517 auipc x10,0x17 + 8000c364: 86750513 addi x10,x10,-1945 # 80022bc7 + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + 8000c380: 2000006f jal x0,8000c580 + +000000008000c384 : + 8000c384: 00000013 addi x0,x0,0 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 6ea50513 addi x10,x10,1770 # 80022a8a + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 1c00006f jal x0,8000c580 + +000000008000c3c4 : + 8000c3c4: 00000013 addi x0,x0,0 + 8000c3c8: 00000013 addi x0,x0,0 + 8000c3cc: 00000013 addi x0,x0,0 + 8000c3d0: 00000013 addi x0,x0,0 + 8000c3d4: 00000013 addi x0,x0,0 + 8000c3d8: 00000013 addi x0,x0,0 + 8000c3dc: 00000013 addi x0,x0,0 + 8000c3e0: 00016517 auipc x10,0x16 + 8000c3e4: 6db50513 addi x10,x10,1755 # 80022abb + 8000c3e8: 00000013 addi x0,x0,0 + 8000c3ec: 00000013 addi x0,x0,0 + 8000c3f0: 00000013 addi x0,x0,0 + 8000c3f4: 00000013 addi x0,x0,0 + 8000c3f8: 00000013 addi x0,x0,0 + 8000c3fc: 00000013 addi x0,x0,0 + 8000c400: 1800006f jal x0,8000c580 + +000000008000c404 : + 8000c404: 00000013 addi x0,x0,0 + 8000c408: 00000013 addi x0,x0,0 + 8000c40c: 00000013 addi x0,x0,0 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 6bb50513 addi x10,x10,1723 # 80022adb + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 1400006f jal x0,8000c580 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 69950513 addi x10,x10,1689 # 80022af9 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1000006f jal x0,8000c580 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 67850513 addi x10,x10,1656 # 80022b18 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 0c00006f jal x0,8000c580 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 66050513 addi x10,x10,1632 # 80022b40 + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 0800006f jal x0,8000c580 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 64c50513 addi x10,x10,1612 # 80022b6c + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 0400006f jal x0,8000c580 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 63850513 addi x10,x10,1592 # 80022b98 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + +000000008000c580 : + 8000c580: 00037097 auipc x1,0x37 + 8000c584: 024080e7 jalr x1,36(x1) # 800435a4 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 63650513 addi x10,x10,1590 # 80022bd6 + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 00037097 auipc x1,0x37 + 8000c5c4: fe4080e7 jalr x1,-28(x1) # 800435a4 + 8000c5c8: 00015517 auipc x10,0x15 + 8000c5cc: ed053503 ld x10,-304(x10) # 80021498 + 8000c5d0: 04000593 addi x11,x0,64 + 8000c5d4: 664000ef jal x1,8000cc38 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00015517 auipc x10,0x15 + 8000c5e4: f0850513 addi x10,x10,-248 # 800214e8 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 00037097 auipc x1,0x37 + 8000c604: fa4080e7 jalr x1,-92(x1) # 800435a4 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 5cd50513 addi x10,x10,1485 # 80022bed + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + 8000c640: 00037097 auipc x1,0x37 + 8000c644: f64080e7 jalr x1,-156(x1) # 800435a4 + 8000c648: 00015517 auipc x10,0x15 + 8000c64c: e4853503 ld x10,-440(x10) # 80021490 + 8000c650: 04000593 addi x11,x0,64 + 8000c654: 5e4000ef jal x1,8000cc38 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00015517 auipc x10,0x15 + 8000c664: e8850513 addi x10,x10,-376 # 800214e8 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00037097 auipc x1,0x37 + 8000c684: f24080e7 jalr x1,-220(x1) # 800435a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: e2852503 lw x10,-472(x10) # 800214b0 + 8000c690: 00200593 addi x11,x0,2 + 8000c694: 08b51463 bne x10,x11,8000c71c + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00016517 auipc x10,0x16 + 8000c6a4: 56450513 addi x10,x10,1380 # 80022c04 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00037097 auipc x1,0x37 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800435a4 + 8000c6c8: 00015517 auipc x10,0x15 + 8000c6cc: dd053503 ld x10,-560(x10) # 80021498 + 8000c6d0: 284000ef jal x1,8000c954 + 8000c6d4: 00037097 auipc x1,0x37 + 8000c6d8: ed0080e7 jalr x1,-304(x1) # 800435a4 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 53b50513 addi x10,x10,1339 # 80022c1b + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00037097 auipc x1,0x37 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800435a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: d8853503 ld x10,-632(x10) # 80021490 + 8000c710: 244000ef jal x1,8000c954 + 8000c714: 00037097 auipc x1,0x37 + 8000c718: e90080e7 jalr x1,-368(x1) # 800435a4 + +000000008000c71c : + 8000c71c: 00000097 auipc x1,0x0 + 8000c720: 314080e7 jalr x1,788(x1) # 8000ca30 + 8000c724: 00015517 auipc x10,0x15 + 8000c728: d8c52503 lw x10,-628(x10) # 800214b0 + 8000c72c: 00100593 addi x11,x0,1 + 8000c730: 02b51e63 bne x10,x11,8000c76c + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00016517 auipc x10,0x16 + 8000c744: 55150513 addi x10,x10,1361 # 80022c91 + 8000c748: 00000013 addi x0,x0,0 + 8000c74c: 00000013 addi x0,x0,0 + 8000c750: 00000013 addi x0,x0,0 + 8000c754: 00000013 addi x0,x0,0 + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00037097 auipc x1,0x37 + 8000c764: e44080e7 jalr x1,-444(x1) # 800435a4 + 8000c768: 27c0006f jal x0,8000c9e4 + 8000c76c: 00200593 addi x11,x0,2 + 8000c770: 02b51e63 bne x10,x11,8000c7ac + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00016517 auipc x10,0x16 + 8000c784: 5e750513 addi x10,x10,1511 # 80022d67 + 8000c788: 00000013 addi x0,x0,0 + 8000c78c: 00000013 addi x0,x0,0 + 8000c790: 00000013 addi x0,x0,0 + 8000c794: 00000013 addi x0,x0,0 + 8000c798: 00000013 addi x0,x0,0 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00037097 auipc x1,0x37 + 8000c7a4: e04080e7 jalr x1,-508(x1) # 800435a4 + 8000c7a8: 23c0006f jal x0,8000c9e4 + 8000c7ac: 00300593 addi x11,x0,3 + 8000c7b0: 02b51e63 bne x10,x11,8000c7ec + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00016517 auipc x10,0x16 + 8000c7c4: 69a50513 addi x10,x10,1690 # 80022e5a + 8000c7c8: 00000013 addi x0,x0,0 + 8000c7cc: 00000013 addi x0,x0,0 + 8000c7d0: 00000013 addi x0,x0,0 + 8000c7d4: 00000013 addi x0,x0,0 + 8000c7d8: 00000013 addi x0,x0,0 + 8000c7dc: 00000013 addi x0,x0,0 + 8000c7e0: 00037097 auipc x1,0x37 + 8000c7e4: dc4080e7 jalr x1,-572(x1) # 800435a4 + 8000c7e8: 1fc0006f jal x0,8000c9e4 + 8000c7ec: 00400593 addi x11,x0,4 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: 75550513 addi x10,x10,1877 # 80022f55 + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00037097 auipc x1,0x37 + 8000c824: d84080e7 jalr x1,-636(x1) # 800435a4 + 8000c828: 1bc0006f jal x0,8000c9e4 + 8000c82c: 00500593 addi x11,x0,5 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 7fc50513 addi x10,x10,2044 # 8002303c + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00037097 auipc x1,0x37 + 8000c864: d44080e7 jalr x1,-700(x1) # 800435a4 + 8000c868: 17c0006f jal x0,8000c9e4 + 8000c86c: 1780006f jal x0,8000c9e4 + +000000008000c870 : + 8000c870: 00000013 addi x0,x0,0 + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 3c950513 addi x10,x10,969 # 80022c49 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00037097 auipc x1,0x37 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800435a4 + 8000c8a8: 00015617 auipc x12,0x15 + 8000c8ac: c2063603 ld x12,-992(x12) # 800214c8 + 8000c8b0: 00000013 addi x0,x0,0 + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00015517 auipc x10,0x15 + 8000c8c4: 37250513 addi x10,x10,882 # 80021c32 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00037097 auipc x1,0x37 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800435a4 + 8000c8e8: 00065503 lhu x10,0(x12) + 8000c8ec: 01000593 addi x11,x0,16 + 8000c8f0: 00357413 andi x8,x10,3 + 8000c8f4: 00300493 addi x9,x0,3 + 8000c8f8: 00941a63 bne x8,x9,8000c90c + 8000c8fc: 00265403 lhu x8,2(x12) + 8000c900: 01041413 slli x8,x8,0x10 + 8000c904: 00856533 or x10,x10,x8 + 8000c908: 02000593 addi x11,x0,32 + 8000c90c: 32c000ef jal x1,8000cc38 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00015517 auipc x10,0x15 + 8000c924: bc850513 addi x10,x10,-1080 # 800214e8 + 8000c928: 00000013 addi x0,x0,0 + 8000c92c: 00000013 addi x0,x0,0 + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00037097 auipc x1,0x37 + 8000c944: c64080e7 jalr x1,-924(x1) # 800435a4 + 8000c948: 00000097 auipc x1,0x0 + 8000c94c: 0e8080e7 jalr x1,232(x1) # 8000ca30 + 8000c950: 0940006f jal x0,8000c9e4 + +000000008000c954 : + 8000c954: 02054463 blt x10,x0,8000c97c + +000000008000c958 : + 8000c958: 01800593 addi x11,x0,24 + 8000c95c: 04b55863 bge x10,x11,8000c9ac + 8000c960: 00015597 auipc x11,0x15 + 8000c964: bb058593 addi x11,x11,-1104 # 80021510 + 8000c968: 00251613 slli x12,x10,0x2 + 8000c96c: 00351613 slli x12,x10,0x3 + 8000c970: 00c585b3 add x11,x11,x12 + 8000c974: 0005b503 ld x10,0(x11) + 8000c978: 00008067 jalr x0,0(x1) + +000000008000c97c : + 8000c97c: 00100593 addi x11,x0,1 + 8000c980: 03f59593 slli x11,x11,0x3f + 8000c984: 00b54533 xor x10,x10,x11 + 8000c988: 01000593 addi x11,x0,16 + 8000c98c: 02b55063 bge x10,x11,8000c9ac + 8000c990: 00015597 auipc x11,0x15 + 8000c994: c4058593 addi x11,x11,-960 # 800215d0 + 8000c998: 00251613 slli x12,x10,0x2 + 8000c99c: 00351613 slli x12,x10,0x3 + 8000c9a0: 00c585b3 add x11,x11,x12 + 8000c9a4: 0005b503 ld x10,0(x11) + 8000c9a8: 00008067 jalr x0,0(x1) + +000000008000c9ac : + 8000c9ac: 00000013 addi x0,x0,0 + 8000c9b0: 00000013 addi x0,x0,0 + 8000c9b4: 00000013 addi x0,x0,0 + 8000c9b8: 00000013 addi x0,x0,0 + 8000c9bc: 00000013 addi x0,x0,0 + 8000c9c0: 00015517 auipc x10,0x15 + 8000c9c4: 08e50513 addi x10,x10,142 # 80021a4e + 8000c9c8: 00000013 addi x0,x0,0 + 8000c9cc: 00000013 addi x0,x0,0 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00008067 jalr x0,0(x1) + +000000008000c9e4 : + 8000c9e4: 00000013 addi x0,x0,0 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00016517 auipc x10,0x16 + 8000ca04: cea50513 addi x10,x10,-790 # 800226ea + 8000ca08: 00000013 addi x0,x0,0 + 8000ca0c: 00000013 addi x0,x0,0 + 8000ca10: 00000013 addi x0,x0,0 + 8000ca14: 00000013 addi x0,x0,0 + 8000ca18: 00000013 addi x0,x0,0 + 8000ca1c: 00000013 addi x0,x0,0 + 8000ca20: 00037097 auipc x1,0x37 + 8000ca24: b84080e7 jalr x1,-1148(x1) # 800435a4 + +000000008000ca28 : + 8000ca28: 00037097 auipc x1,0x37 + 8000ca2c: bdc080e7 jalr x1,-1060(x1) # 80043604 + +000000008000ca30 : + 8000ca30: 00015617 auipc x12,0x15 + 8000ca34: a9060613 addi x12,x12,-1392 # 800214c0 + 8000ca38: 00163023 sd x1,0(x12) + 8000ca3c: 00000013 addi x0,x0,0 + 8000ca40: 00015517 auipc x10,0x15 + 8000ca44: 21350513 addi x10,x10,531 # 80021c53 + 8000ca48: 00000013 addi x0,x0,0 + 8000ca4c: 00000013 addi x0,x0,0 + 8000ca50: 00000013 addi x0,x0,0 + 8000ca54: 00000013 addi x0,x0,0 + 8000ca58: 00000013 addi x0,x0,0 + 8000ca5c: 00000013 addi x0,x0,0 + 8000ca60: 00037097 auipc x1,0x37 + 8000ca64: b44080e7 jalr x1,-1212(x1) # 800435a4 + 8000ca68: 00015517 auipc x10,0x15 + 8000ca6c: a6053503 ld x10,-1440(x10) # 800214c8 + 8000ca70: 04000593 addi x11,x0,64 + 8000ca74: 1c4000ef jal x1,8000cc38 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00015517 auipc x10,0x15 + 8000ca84: a6850513 addi x10,x10,-1432 # 800214e8 + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00037097 auipc x1,0x37 + 8000caa4: b04080e7 jalr x1,-1276(x1) # 800435a4 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: 1a350513 addi x10,x10,419 # 80021c63 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00037097 auipc x1,0x37 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800435a4 + 8000cae8: 00015517 auipc x10,0x15 + 8000caec: 9e853503 ld x10,-1560(x10) # 800214d0 + 8000caf0: 04000593 addi x11,x0,64 + 8000caf4: 144000ef jal x1,8000cc38 + 8000caf8: 00000013 addi x0,x0,0 + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00015517 auipc x10,0x15 + 8000cb04: 9e850513 addi x10,x10,-1560 # 800214e8 + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00037097 auipc x1,0x37 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800435a4 + 8000cb28: 00000013 addi x0,x0,0 + 8000cb2c: 00000013 addi x0,x0,0 + 8000cb30: 00000013 addi x0,x0,0 + 8000cb34: 00000013 addi x0,x0,0 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00015517 auipc x10,0x15 + 8000cb44: 13350513 addi x10,x10,307 # 80021c73 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00037097 auipc x1,0x37 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800435a4 + 8000cb68: 00015517 auipc x10,0x15 + 8000cb6c: 97053503 ld x10,-1680(x10) # 800214d8 + 8000cb70: 04000593 addi x11,x0,64 + 8000cb74: 0c4000ef jal x1,8000cc38 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00015517 auipc x10,0x15 + 8000cb84: 96850513 addi x10,x10,-1688 # 800214e8 + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00037097 auipc x1,0x37 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800435a4 + 8000cba8: 00000013 addi x0,x0,0 + 8000cbac: 00000013 addi x0,x0,0 + 8000cbb0: 00000013 addi x0,x0,0 + 8000cbb4: 00000013 addi x0,x0,0 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00015517 auipc x10,0x15 + 8000cbc4: 0c350513 addi x10,x10,195 # 80021c83 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00037097 auipc x1,0x37 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800435a4 + 8000cbe8: 00015517 auipc x10,0x15 + 8000cbec: 8f853503 ld x10,-1800(x10) # 800214e0 + 8000cbf0: 04000593 addi x11,x0,64 + 8000cbf4: 044000ef jal x1,8000cc38 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00015517 auipc x10,0x15 + 8000cc04: 8e850513 addi x10,x10,-1816 # 800214e8 + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00037097 auipc x1,0x37 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800435a4 + 8000cc28: 00015617 auipc x12,0x15 + 8000cc2c: 89860613 addi x12,x12,-1896 # 800214c0 + 8000cc30: 00063083 ld x1,0(x12) + 8000cc34: 00008067 jalr x0,0(x1) + +000000008000cc38 : + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00015617 auipc x12,0x15 + 8000cc44: 8a860613 addi x12,x12,-1880 # 800214e8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 03000693 addi x13,x0,48 + 8000cc64: 00d60023 sb x13,0(x12) + 8000cc68: 07800693 addi x13,x0,120 + 8000cc6c: 00d600a3 sb x13,1(x12) + 8000cc70: 00260613 addi x12,x12,2 + 8000cc74: 00058693 addi x13,x11,0 + +000000008000cc78 : + 8000cc78: ffc68693 addi x13,x13,-4 + 8000cc7c: 00d55733 srl x14,x10,x13 + 8000cc80: 00f77713 andi x14,x14,15 + 8000cc84: 00a00793 addi x15,x0,10 + 8000cc88: 00f74663 blt x14,x15,8000cc94 + 8000cc8c: 05770713 addi x14,x14,87 + 8000cc90: 0080006f jal x0,8000cc98 + +000000008000cc94 : + 8000cc94: 03070713 addi x14,x14,48 + +000000008000cc98 : + 8000cc98: 00e60023 sb x14,0(x12) + 8000cc9c: 00160613 addi x12,x12,1 + 8000cca0: fc069ce3 bne x13,x0,8000cc78 + 8000cca4: 00a00693 addi x13,x0,10 + 8000cca8: 00d60023 sb x13,0(x12) + 8000ccac: 000600a3 sb x0,1(x12) + 8000ccb0: 00008067 jalr x0,0(x1) + +000000008000ccb4 : + 8000ccb4: 00a00693 addi x13,x0,10 + 8000ccb8: 02d54663 blt x10,x13,8000cce4 + 8000ccbc: ff650513 addi x10,x10,-10 + 8000ccc0: 03100713 addi x14,x0,49 + 8000ccc4: 00d54c63 blt x10,x13,8000ccdc + 8000ccc8: ff650513 addi x10,x10,-10 + 8000cccc: 03200713 addi x14,x0,50 + 8000ccd0: 00d54663 blt x10,x13,8000ccdc + 8000ccd4: ff650513 addi x10,x10,-10 + 8000ccd8: 03300713 addi x14,x0,51 + 8000ccdc: 00e60023 sb x14,0(x12) + 8000cce0: 00160613 addi x12,x12,1 + 8000cce4: 03050513 addi x10,x10,48 + 8000cce8: 00a60023 sb x10,0(x12) + 8000ccec: 00a00693 addi x13,x0,10 + 8000ccf0: 00d600a3 sb x13,1(x12) + 8000ccf4: 00060123 sb x0,2(x12) + 8000ccf8: 00008067 jalr x0,0(x1) + 8000ccfc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080043000 : + 80043000: 10010737 lui x14,0x10010 + 80043004: 00072023 sw x0,0(x14) # 10010000 + 80043008: fffc8397 auipc x7,0xfffc8 + 8004300c: bf038393 addi x7,x7,-1040 # 8000abf8 + 80043010: 00038067 jalr x0,0(x7) + +0000000080043014 : + 80043014: fff00713 addi x14,x0,-1 + 80043018: 100143b7 lui x7,0x10014 + 8004301c: 00e3b023 sd x14,0(x7) # 10014000 + 80043020: fffc8397 auipc x7,0xfffc8 + 80043024: bd838393 addi x7,x7,-1064 # 8000abf8 + 80043028: 00038067 jalr x0,0(x7) + +000000008004302c : + 8004302c: 10000737 lui x14,0x10000 + 80043030: 0107071b addiw x14,x14,16 # 10000010 + 80043034: 00070023 sb x0,0(x14) + 80043038: fffc8397 auipc x7,0xfffc8 + 8004303c: bc038393 addi x7,x7,-1088 # 8000abf8 + 80043040: 00038067 jalr x0,0(x7) + +0000000080043044 : + 80043044: 00200393 addi x7,x0,2 + 80043048: 3443b073 csrrc x0,mip,x7 + 8004304c: fffc8397 auipc x7,0xfffc8 + 80043050: bac38393 addi x7,x7,-1108 # 8000abf8 + 80043054: 00038067 jalr x0,0(x7) + +0000000080043058 : + 80043058: fffc8397 auipc x7,0xfffc8 + 8004305c: ba038393 addi x7,x7,-1120 # 8000abf8 + 80043060: 00038067 jalr x0,0(x7) + +0000000080043064 : + 80043064: 20000413 addi x8,x0,512 + 80043068: 34443073 csrrc x0,mip,x8 + 8004306c: 34402473 csrrs x8,mip,x0 + 80043070: 00001337 lui x6,0x1 + 80043074: 8003031b addiw x6,x6,-2048 # 800 + 80043078: 00647433 and x8,x8,x6 + 8004307c: 00830863 beq x6,x8,8004308c + 80043080: 10000737 lui x14,0x10000 + 80043084: 0187071b addiw x14,x14,24 # 10000018 + 80043088: 00070023 sb x0,0(x14) + 8004308c: fffc8397 auipc x7,0xfffc8 + 80043090: b6c38393 addi x7,x7,-1172 # 8000abf8 + 80043094: 00038067 jalr x0,0(x7) + +0000000080043098 : + 80043098: fffc7317 auipc x6,0xfffc7 + 8004309c: c8c30313 addi x6,x6,-884 # 80009d24 + 800430a0: 00030067 jalr x0,0(x6) + 800430a4: fffc8397 auipc x7,0xfffc8 + 800430a8: b5438393 addi x7,x7,-1196 # 8000abf8 + 800430ac: 00038067 jalr x0,0(x7) + +00000000800430b0 : + 800430b0: fffc7317 auipc x6,0xfffc7 + 800430b4: c7430313 addi x6,x6,-908 # 80009d24 + 800430b8: 00030067 jalr x0,0(x6) + 800430bc: fffc8397 auipc x7,0xfffc8 + 800430c0: b3c38393 addi x7,x7,-1220 # 8000abf8 + 800430c4: 00038067 jalr x0,0(x7) + +00000000800430c8 : + 800430c8: fffc7317 auipc x6,0xfffc7 + 800430cc: c5c30313 addi x6,x6,-932 # 80009d24 + 800430d0: 00030067 jalr x0,0(x6) + 800430d4: fffc8397 auipc x7,0xfffc8 + 800430d8: b2438393 addi x7,x7,-1244 # 8000abf8 + 800430dc: 00038067 jalr x0,0(x7) + +00000000800430e0 : + 800430e0: 30401073 csrrw x0,mie,x0 + 800430e4: 34401073 csrrw x0,mip,x0 + 800430e8: 34101073 csrrw x0,mepc,x0 + 800430ec: 34301073 csrrw x0,mtval,x0 + 800430f0: 34201073 csrrw x0,mcause,x0 + 800430f4: 00000013 addi x0,x0,0 + 800430f8: 00000013 addi x0,x0,0 + 800430fc: 00000013 addi x0,x0,0 + 80043100: fffcd317 auipc x6,0xfffcd + 80043104: 01030313 addi x6,x6,16 # 80010110 + 80043108: 00000013 addi x0,x0,0 + 8004310c: 00000013 addi x0,x0,0 + 80043110: 00000013 addi x0,x0,0 + 80043114: 00000013 addi x0,x0,0 + 80043118: 00000013 addi x0,x0,0 + 8004311c: 00000013 addi x0,x0,0 + +0000000080043120 : + 80043120: 34031473 csrrw x8,mscratch,x6 + 80043124: 2c833823 sd x8,720(x6) + +0000000080043128 : + 80043128: fff00393 addi x7,x0,-1 + 8004312c: 000044b7 lui x9,0x4 + 80043130: 00548493 addi x9,x9,5 # 4005 + 80043134: 00e49493 slli x9,x9,0xe + 80043138: 0074b023 sd x7,0(x9) + 8004313c: 00000013 addi x0,x0,0 + +0000000080043140 : + 80043140: 00000393 addi x7,x0,0 + 80043144: 2a733c23 sd x7,696(x6) + +0000000080043148 : + 80043148: 30502473 csrrs x8,mtvec,x0 + 8004314c: 2c833423 sd x8,712(x6) + 80043150: 00347393 andi x7,x8,3 + 80043154: ffc3f393 andi x7,x7,-4 + 80043158: 2b033483 ld x9,688(x6) + 8004315c: da848493 addi x9,x9,-600 + 80043160: 0074e3b3 or x7,x9,x7 + 80043164: 2c733023 sd x7,704(x6) + 80043168: 30539073 csrrw x0,mtvec,x7 + 8004316c: 30502773 csrrs x14,mtvec,x0 + 80043170: 0e770a63 beq x14,x7,80043264 + 80043174: 30541073 csrrw x0,mtvec,x8 + 80043178: 0a040663 beq x8,x0,80043224 + 8004317c: 2c833023 sd x8,704(x6) + +0000000080043180 : + 80043180: ffc47393 andi x7,x8,-4 + 80043184: 25838413 addi x8,x7,600 + 80043188: 00030113 addi x2,x6,0 + 8004318c: 00000013 addi x0,x0,0 + 80043190: 00000013 addi x0,x0,0 + 80043194: 00000013 addi x0,x0,0 + 80043198: 00000013 addi x0,x0,0 + 8004319c: 00000013 addi x0,x0,0 + 800431a0: 00000717 auipc x14,0x0 + 800431a4: 04c70713 addi x14,x14,76 # 800431ec + 800431a8: 00000013 addi x0,x0,0 + 800431ac: 00000013 addi x0,x0,0 + 800431b0: 00000013 addi x0,x0,0 + 800431b4: 00000013 addi x0,x0,0 + 800431b8: 00000013 addi x0,x0,0 + 800431bc: 00000013 addi x0,x0,0 + 800431c0: 00000797 auipc x15,0x0 + 800431c4: 0a478793 addi x15,x15,164 # 80043264 + 800431c8: 00000013 addi x0,x0,0 + 800431cc: 00000013 addi x0,x0,0 + 800431d0: 00000013 addi x0,x0,0 + 800431d4: 00000013 addi x0,x0,0 + 800431d8: 00000013 addi x0,x0,0 + 800431dc: 00000013 addi x0,x0,0 + 800431e0: 00f3f663 bgeu x7,x15,800431ec + 800431e4: 00877463 bgeu x14,x8,800431ec + 800431e8: 03c0006f jal x0,80043224 + +00000000800431ec : + 800431ec: 0003a783 lw x15,0(x7) + 800431f0: 00f32023 sw x15,0(x6) + 800431f4: 0004a703 lw x14,0(x9) + 800431f8: 00e3a023 sw x14,0(x7) + 800431fc: 0003a783 lw x15,0(x7) + 80043200: 00e79a63 bne x15,x14,80043214 + 80043204: 00438393 addi x7,x7,4 + 80043208: 00430313 addi x6,x6,4 + 8004320c: 00448493 addi x9,x9,4 + 80043210: fc741ee3 bne x8,x7,800431ec + +0000000080043214 : + 80043214: 0000100f fence.i + 80043218: 34002373 csrrs x6,mscratch,x0 + 8004321c: 2a933823 sd x9,688(x6) + 80043220: 04740263 beq x8,x7,80043264 + +0000000080043224 : + 80043224: 00038413 addi x8,x7,0 + 80043228: 00000013 addi x0,x0,0 + 8004322c: 00000013 addi x0,x0,0 + 80043230: 00000013 addi x0,x0,0 + 80043234: 00000013 addi x0,x0,0 + 80043238: 00000013 addi x0,x0,0 + 8004323c: 00000013 addi x0,x0,0 + 80043240: fffc7797 auipc x15,0xfffc7 + 80043244: af478793 addi x15,x15,-1292 # 80009d34 + 80043248: 00000013 addi x0,x0,0 + 8004324c: 00000013 addi x0,x0,0 + 80043250: 00000013 addi x0,x0,0 + 80043254: 00000013 addi x0,x0,0 + 80043258: 00000013 addi x0,x0,0 + 8004325c: 00000013 addi x0,x0,0 + 80043260: 00078067 jalr x0,0(x15) + +0000000080043264 : + 80043264: 00000013 addi x0,x0,0 + +0000000080043268 : + 80043268: 005002b7 lui x5,0x500 + 8004326c: 0012829b addiw x5,x5,1 # 500001 + 80043270: 00d29293 slli x5,x5,0xd + 80043274: 80028293 addi x5,x5,-2048 + 80043278: 30029073 csrrw x0,mstatus,x5 + 8004327c: 32001073 csrrw x0,mcountinhibit,x0 + 80043280: 32301073 csrrw x0,mhpmevent3,x0 + 80043284: 32401073 csrrw x0,mhpmevent4,x0 + 80043288: 32501073 csrrw x0,mhpmevent5,x0 + 8004328c: 32601073 csrrw x0,mhpmevent6,x0 + 80043290: 32701073 csrrw x0,mhpmevent7,x0 + 80043294: 32801073 csrrw x0,mhpmevent8,x0 + 80043298: 32901073 csrrw x0,mhpmevent9,x0 + 8004329c: 32a01073 csrrw x0,mhpmevent10,x0 + 800432a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800432a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800432a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800432ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800432b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800432b4: 33001073 csrrw x0,mhpmevent16,x0 + 800432b8: 33101073 csrrw x0,mhpmevent17,x0 + 800432bc: 33201073 csrrw x0,mhpmevent18,x0 + 800432c0: 33301073 csrrw x0,mhpmevent19,x0 + 800432c4: 33401073 csrrw x0,mhpmevent20,x0 + 800432c8: 33501073 csrrw x0,mhpmevent21,x0 + 800432cc: 33601073 csrrw x0,mhpmevent22,x0 + 800432d0: 33701073 csrrw x0,mhpmevent23,x0 + 800432d4: 33801073 csrrw x0,mhpmevent24,x0 + 800432d8: 33901073 csrrw x0,mhpmevent25,x0 + 800432dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800432e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800432e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800432e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800432ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800432f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800432f4: 00000013 addi x0,x0,0 + 800432f8: 00000013 addi x0,x0,0 + 800432fc: 00000013 addi x0,x0,0 + 80043300: fffcd317 auipc x6,0xfffcd + 80043304: e0830313 addi x6,x6,-504 # 80010108 + 80043308: 00000013 addi x0,x0,0 + 8004330c: 00000013 addi x0,x0,0 + 80043310: 00000013 addi x0,x0,0 + 80043314: 00000013 addi x0,x0,0 + 80043318: 00000013 addi x0,x0,0 + 8004331c: 00000013 addi x0,x0,0 + 80043320: 00033023 sd x0,0(x6) + +0000000080043324 : + 80043324: feedc0b7 lui x1,0xfeedc + 80043328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004332c: 00b09093 slli x1,x1,0xb + 80043330: 7f708093 addi x1,x1,2039 + 80043334: 00b09093 slli x1,x1,0xb + 80043338: 36f08093 addi x1,x1,879 + 8004333c: 00a09093 slli x1,x1,0xa + 80043340: 2ad08093 addi x1,x1,685 + 80043344: 03909793 slli x15,x1,0x39 + 80043348: 0070d113 srli x2,x1,0x7 + 8004334c: 00f16133 or x2,x2,x15 + 80043350: 03911793 slli x15,x2,0x39 + 80043354: 00715193 srli x3,x2,0x7 + 80043358: 00f1e1b3 or x3,x3,x15 + 8004335c: 03919793 slli x15,x3,0x39 + 80043360: 0071d213 srli x4,x3,0x7 + 80043364: 00f26233 or x4,x4,x15 + 80043368: 03921793 slli x15,x4,0x39 + 8004336c: 00725293 srli x5,x4,0x7 + 80043370: 00f2e2b3 or x5,x5,x15 + 80043374: 03929793 slli x15,x5,0x39 + 80043378: 0072d313 srli x6,x5,0x7 + 8004337c: 00f36333 or x6,x6,x15 + 80043380: 03931793 slli x15,x6,0x39 + 80043384: 00735393 srli x7,x6,0x7 + 80043388: 00f3e3b3 or x7,x7,x15 + 8004338c: 03939793 slli x15,x7,0x39 + 80043390: 0073d413 srli x8,x7,0x7 + 80043394: 00f46433 or x8,x8,x15 + 80043398: 03941793 slli x15,x8,0x39 + 8004339c: 00745493 srli x9,x8,0x7 + 800433a0: 00f4e4b3 or x9,x9,x15 + 800433a4: 03949793 slli x15,x9,0x39 + 800433a8: 0074d513 srli x10,x9,0x7 + 800433ac: 00f56533 or x10,x10,x15 + 800433b0: 03951793 slli x15,x10,0x39 + 800433b4: 00755593 srli x11,x10,0x7 + 800433b8: 00f5e5b3 or x11,x11,x15 + 800433bc: 03959793 slli x15,x11,0x39 + 800433c0: 0075d613 srli x12,x11,0x7 + 800433c4: 00f66633 or x12,x12,x15 + 800433c8: 03961793 slli x15,x12,0x39 + 800433cc: 00765693 srli x13,x12,0x7 + 800433d0: 00f6e6b3 or x13,x13,x15 + 800433d4: 03969793 slli x15,x13,0x39 + 800433d8: 0076d713 srli x14,x13,0x7 + 800433dc: 00f76733 or x14,x14,x15 + 800433e0: fab807b7 lui x15,0xfab80 + 800433e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800433e8: 00b79793 slli x15,x15,0xb + 800433ec: 7d578793 addi x15,x15,2005 + 800433f0: 00b79793 slli x15,x15,0xb + 800433f4: 5fe78793 addi x15,x15,1534 + 800433f8: 00a79793 slli x15,x15,0xa + 800433fc: 3b678793 addi x15,x15,950 + 80043400: 7d5c0837 lui x16,0x7d5c0 + 80043404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80043408: 00b81813 slli x16,x16,0xb + 8004340c: 3ea80813 addi x16,x16,1002 + 80043410: 00b81813 slli x16,x16,0xb + 80043414: 6ff80813 addi x16,x16,1791 + 80043418: 00a81813 slli x16,x16,0xa + 8004341c: 1db80813 addi x16,x16,475 + 80043420: 03981793 slli x15,x16,0x39 + 80043424: 00785893 srli x17,x16,0x7 + 80043428: 00f8e8b3 or x17,x17,x15 + 8004342c: 03989793 slli x15,x17,0x39 + 80043430: 0078d913 srli x18,x17,0x7 + 80043434: 00f96933 or x18,x18,x15 + 80043438: 03991793 slli x15,x18,0x39 + 8004343c: 00795993 srli x19,x18,0x7 + 80043440: 00f9e9b3 or x19,x19,x15 + 80043444: 03999793 slli x15,x19,0x39 + 80043448: 0079da13 srli x20,x19,0x7 + 8004344c: 00fa6a33 or x20,x20,x15 + 80043450: 039a1793 slli x15,x20,0x39 + 80043454: 007a5a93 srli x21,x20,0x7 + 80043458: 00faeab3 or x21,x21,x15 + 8004345c: 039a9793 slli x15,x21,0x39 + 80043460: 007adb13 srli x22,x21,0x7 + 80043464: 00fb6b33 or x22,x22,x15 + 80043468: 039b1793 slli x15,x22,0x39 + 8004346c: 007b5b93 srli x23,x22,0x7 + 80043470: 00fbebb3 or x23,x23,x15 + 80043474: 039b9793 slli x15,x23,0x39 + 80043478: 007bdc13 srli x24,x23,0x7 + 8004347c: 00fc6c33 or x24,x24,x15 + 80043480: 039c1793 slli x15,x24,0x39 + 80043484: 007c5c93 srli x25,x24,0x7 + 80043488: 00fcecb3 or x25,x25,x15 + 8004348c: 039c9793 slli x15,x25,0x39 + 80043490: 007cdd13 srli x26,x25,0x7 + 80043494: 00fd6d33 or x26,x26,x15 + 80043498: 039d1793 slli x15,x26,0x39 + 8004349c: 007d5d93 srli x27,x26,0x7 + 800434a0: 00fdedb3 or x27,x27,x15 + 800434a4: 039d9793 slli x15,x27,0x39 + 800434a8: 007dde13 srli x28,x27,0x7 + 800434ac: 00fe6e33 or x28,x28,x15 + 800434b0: 039e1793 slli x15,x28,0x39 + 800434b4: 007e5e93 srli x29,x28,0x7 + 800434b8: 00feeeb3 or x29,x29,x15 + 800434bc: 039e9793 slli x15,x29,0x39 + 800434c0: 007edf13 srli x30,x29,0x7 + 800434c4: 00ff6f33 or x30,x30,x15 + 800434c8: 039f1793 slli x15,x30,0x39 + 800434cc: 007f5f93 srli x31,x30,0x7 + 800434d0: 00ffefb3 or x31,x31,x15 + 800434d4: 00000013 addi x0,x0,0 + 800434d8: 00000013 addi x0,x0,0 + 800434dc: 00000013 addi x0,x0,0 + 800434e0: fffe0117 auipc x2,0xfffe0 + 800434e4: c9010113 addi x2,x2,-880 # 80023170 + 800434e8: 00000013 addi x0,x0,0 + 800434ec: 00000013 addi x0,x0,0 + 800434f0: 00000013 addi x0,x0,0 + 800434f4: 00000013 addi x0,x0,0 + 800434f8: 00000013 addi x0,x0,0 + 800434fc: 00000013 addi x0,x0,0 + +0000000080043500 : + 80043500: 6f5ca337 lui x6,0x6f5ca + 80043504: 30930313 addi x6,x6,777 # 6f5ca309 + 80043508: 00b31313 slli x6,x6,0xb + 8004350c: 73e30313 addi x6,x6,1854 + 80043510: 00b31313 slli x6,x6,0xb + 80043514: 52c30313 addi x6,x6,1324 + 80043518: 00a31313 slli x6,x6,0xa + 8004351c: 28130313 addi x6,x6,641 + 80043520: fffc8197 auipc x3,0xfffc8 + 80043524: be018193 addi x3,x3,-1056 # 8000b100 + 80043528: 00000013 addi x0,x0,0 + 8004352c: 00000013 addi x0,x0,0 + 80043530: 00000013 addi x0,x0,0 + 80043534: 00000013 addi x0,x0,0 + 80043538: 00000013 addi x0,x0,0 + 8004353c: 00000013 addi x0,x0,0 + 80043540: 00013203 ld x4,0(x2) + 80043544: 00620c63 beq x4,x6,8004355c + 80043548: 000182e7 jalr x5,0(x3) + 8004354c: 80043500 .word 0x80043500 + 80043550: 00000000 .word 0x00000000 + 80043554: 80022713 .word 0x80022713 + 80043558: 00000000 .word 0x00000000 + 8004355c: 00810113 addi x2,x2,8 + 80043560: fffcd197 auipc x3,0xfffcd + 80043564: f1018193 addi x3,x3,-240 # 80010470 + 80043568: 00000013 addi x0,x0,0 + 8004356c: 00000013 addi x0,x0,0 + 80043570: 00000013 addi x0,x0,0 + 80043574: 00000013 addi x0,x0,0 + 80043578: 00000013 addi x0,x0,0 + 8004357c: 00000013 addi x0,x0,0 + 80043580: fffbd317 auipc x6,0xfffbd + 80043584: ac030313 addi x6,x6,-1344 # 80000040 + 80043588: 00000013 addi x0,x0,0 + 8004358c: 00000013 addi x0,x0,0 + 80043590: 00000013 addi x0,x0,0 + 80043594: 00000013 addi x0,x0,0 + 80043598: 00000013 addi x0,x0,0 + 8004359c: 00000013 addi x0,x0,0 + 800435a0: 00030067 jalr x0,0(x6) + +00000000800435a4 : + 800435a4: 00054303 lbu x6,0(x10) + 800435a8: 00030a63 beq x6,x0,800435bc + 800435ac: 100003b7 lui x7,0x10000 + 800435b0: 00638023 sb x6,0(x7) # 10000000 + 800435b4: 00150513 addi x10,x10,1 + 800435b8: fedff06f jal x0,800435a4 + 800435bc: 00008067 jalr x0,0(x1) + +00000000800435c0 : + 800435c0: ff010113 addi x2,x2,-16 + 800435c4: 00113023 sd x1,0(x2) + 800435c8: 00813423 sd x8,8(x2) + 800435cc: 00000097 auipc x1,0x0 + 800435d0: fd8080e7 jalr x1,-40(x1) # 800435a4 + 800435d4: 00813403 ld x8,8(x2) + 800435d8: 00013083 ld x1,0(x2) + 800435dc: 01010113 addi x2,x2,16 + 800435e0: 00008067 jalr x0,0(x1) + +00000000800435e4 : + 800435e4: 00100093 addi x1,x0,1 + 800435e8: fffff297 auipc x5,0xfffff + 800435ec: 91828293 addi x5,x5,-1768 # 80041f00 + +00000000800435f0 : + 800435f0: 0012a023 sw x1,0(x5) + 800435f4: 0002a223 sw x0,4(x5) + +00000000800435f8 : + 800435f8: 00000013 addi x0,x0,0 + 800435fc: ffdff06f jal x0,800435f8 + 80043600: 0000006f jal x0,80043600 + +0000000080043604 : + 80043604: 00300093 addi x1,x0,3 + 80043608: fffff297 auipc x5,0xfffff + 8004360c: 8f828293 addi x5,x5,-1800 # 80041f00 + +0000000080043610 : + 80043610: 0012a023 sw x1,0(x5) + 80043614: 0002a223 sw x0,4(x5) + +0000000080043618 : + 80043618: 00000013 addi x0,x0,0 + 8004361c: ffdff06f jal x0,80043618 + 80043620: 0000006f jal x0,80043620 + +0000000080043624 : + 80043624: 00100513 addi x10,x0,1 + 80043628: 100105b7 lui x11,0x10010 + 8004362c: 00a5a023 sw x10,0(x11) # 10010000 + 80043630: 00008067 jalr x0,0(x1) + +0000000080043634 : + 80043634: 100105b7 lui x11,0x10010 + 80043638: 0005a023 sw x0,0(x11) # 10010000 + 8004363c: 00008067 jalr x0,0(x1) + +0000000080043640 : + 80043640: 00100513 addi x10,x0,1 + 80043644: 100005b7 lui x11,0x10000 + 80043648: 0105859b addiw x11,x11,16 # 10000010 + 8004364c: 00a58023 sb x10,0(x11) + 80043650: 00008067 jalr x0,0(x1) + +0000000080043654 : + 80043654: 100005b7 lui x11,0x10000 + 80043658: 0105859b addiw x11,x11,16 # 10000010 + 8004365c: 00058023 sb x0,0(x11) + 80043660: 00008067 jalr x0,0(x1) + 80043664: 00000013 addi x0,x0,0 + 80043668: 00000013 addi x0,x0,0 + 8004366c: 00000013 addi x0,x0,0 + 80043670: 00000013 addi x0,x0,0 + 80043674: 00000013 addi x0,x0,0 + 80043678: 00000013 addi x0,x0,0 + 8004367c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zkne-aes64ks1i-00.elf.objdump b/riscv-tests/rv64-Zkne-aes64ks1i-00.elf.objdump new file mode 100644 index 0000000..1729390 --- /dev/null +++ b/riscv-tests/rv64-Zkne-aes64ks1i-00.elf.objdump @@ -0,0 +1,6914 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64ks1i-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64ks1i-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000004580 memsz 0x0000000000004580 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004540 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 00021b90 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029c00 0000000080029c00 00027c00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 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80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x9df395680207646b + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zkne_aes64ks1i_cg_cp_rs1_b0: + aes64ks1i x31, x0, 7 # perform operation + 80000048: 31701f93 aes64ks1i x31,x0,0x7 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zkne_aes64ks1i_cg_cp_rs1_b0, Zkne_aes64ks1i_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01f20c63 beq x4,x31,80000068 + 80000054: 12d022ef jal x5,80002980 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 80008848 .word 0x80008848 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xae82e45eef8e9064 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zkne_aes64ks1i_cg_cp_rs1_b1: + aes64ks1i x31, x1, 10 # perform operation + 80000074: 31a09f93 aes64ks1i x31,x1,0xa + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zkne_aes64ks1i_cg_cp_rs1_b1, Zkne_aes64ks1i_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01f20c63 beq x4,x31,80000094 + 80000080: 101022ef jal x5,80002980 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 8000887e .word 0x8000887e + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x19, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010993 addi x19,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x3633cd6d589c3131 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zkne_aes64ks1i_cg_cp_rs1_b2: + aes64ks1i x18, x2, 10 # perform operation + 800000a4: 31a11913 aes64ks1i x18,x2,0xa + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zkne_aes64ks1i_cg_cp_rs1_b2, Zkne_aes64ks1i_cg_cp_rs1_b2_str) + 800000a8: 0009b203 ld x4,0(x19) + 800000ac: 01220c63 beq x4,x18,800000c4 + 800000b0: 0d1022ef jal x5,80002980 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 800088b4 .word 0x800088b4 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00898993 addi x19,x19,8 + + mv x11, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x81b27b8a0e847728 + 800000cc: 0005b183 ld x3,0(x11) + 800000d0: 00858593 addi x11,x11,8 + +00000000800000d4 : +Zkne_aes64ks1i_cg_cp_rs1_b3: + aes64ks1i x31, x3, 1 # perform operation + 800000d4: 31119f93 aes64ks1i x31,x3,0x1 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zkne_aes64ks1i_cg_cp_rs1_b3, Zkne_aes64ks1i_cg_cp_rs1_b3_str) + 800000d8: 0009b203 ld x4,0(x19) + 800000dc: 01f20c63 beq x4,x31,800000f4 + 800000e0: 0a1022ef jal x5,80002980 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 800088ea .word 0x800088ea + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00898993 addi x19,x19,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0x076243cbc0c1eab4 + 80000100: 0005b203 ld x4,0(x11) + 80000104: 00858593 addi x11,x11,8 + +0000000080000108 : +Zkne_aes64ks1i_cg_cp_rs1_b4: + aes64ks1i x24, x4, 10 # perform operation + 80000108: 31a21c13 aes64ks1i x24,x4,0xa + # Check if x24 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x24, Zkne_aes64ks1i_cg_cp_rs1_b4, Zkne_aes64ks1i_cg_cp_rs1_b4_str) + 8000010c: 0009b383 ld x7,0(x19) + 80000110: 01838c63 beq x7,x24,80000128 + 80000114: 0850246f jal x8,80002998 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 80008920 .word 0x80008920 + 80000124: 00000000 .word 0x00000000 + 80000128: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x328d359ca41ebe3e + 8000012c: 0005b283 ld x5,0(x11) + 80000130: 00858593 addi x11,x11,8 + +0000000080000134 : +Zkne_aes64ks1i_cg_cp_rs1_b5: + aes64ks1i x31, x5, 3 # perform operation + 80000134: 31329f93 aes64ks1i x31,x5,0x3 + # Check if x31 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x31, Zkne_aes64ks1i_cg_cp_rs1_b5, Zkne_aes64ks1i_cg_cp_rs1_b5_str) + 80000138: 0009b383 ld x7,0(x19) + 8000013c: 01f38c63 beq x7,x31,80000154 + 80000140: 0590246f jal x8,80002998 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008956 .word 0x80008956 + 80000150: 00000000 .word 0x00000000 + 80000154: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0x5c2d122b476452b8 + 80000158: 0005b303 ld x6,0(x11) + 8000015c: 00858593 addi x11,x11,8 + +0000000080000160 : +Zkne_aes64ks1i_cg_cp_rs1_b6: + aes64ks1i x25, x6, 4 # perform operation + 80000160: 31431c93 aes64ks1i x25,x6,0x4 + # Check if x25 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x25, Zkne_aes64ks1i_cg_cp_rs1_b6, Zkne_aes64ks1i_cg_cp_rs1_b6_str) + 80000164: 0009b383 ld x7,0(x19) + 80000168: 01938c63 beq x7,x25,80000180 + 8000016c: 02d0246f jal x8,80002998 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000898c .word 0x8000898c + 8000017c: 00000000 .word 0x00000000 + 80000180: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x9f6a6a0963681697 + 8000018c: 0005b383 ld x7,0(x11) + 80000190: 00858593 addi x11,x11,8 + +0000000080000194 : +Zkne_aes64ks1i_cg_cp_rs1_b7: + aes64ks1i x12, x7, 1 # perform operation + 80000194: 31139613 aes64ks1i x12,x7,0x1 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zkne_aes64ks1i_cg_cp_rs1_b7, Zkne_aes64ks1i_cg_cp_rs1_b7_str) + 80000198: 0009b683 ld x13,0(x19) + 8000019c: 00c68c63 beq x13,x12,800001b4 + 800001a0: 0210276f jal x14,800029c0 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 800089c2 .word 0x800089c2 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x1777a164ccf517b4 + 800001b8: 0005b403 ld x8,0(x11) + 800001bc: 00858593 addi x11,x11,8 + +00000000800001c0 : +Zkne_aes64ks1i_cg_cp_rs1_b8: + aes64ks1i x21, x8, 4 # perform operation + 800001c0: 31441a93 aes64ks1i x21,x8,0x4 + # Check if x21 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x21, Zkne_aes64ks1i_cg_cp_rs1_b8, Zkne_aes64ks1i_cg_cp_rs1_b8_str) + 800001c4: 0009b683 ld x13,0(x19) + 800001c8: 01568c63 beq x13,x21,800001e0 + 800001cc: 7f40276f jal x14,800029c0 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 800089f8 .word 0x800089f8 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x39fd0bba2d6074e3 + 800001e4: 0005b483 ld x9,0(x11) + 800001e8: 00858593 addi x11,x11,8 + +00000000800001ec : +Zkne_aes64ks1i_cg_cp_rs1_b9: + aes64ks1i x3, x9, 10 # perform operation + 800001ec: 31a49193 aes64ks1i x3,x9,0xa + # Check if x3 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x3, Zkne_aes64ks1i_cg_cp_rs1_b9, Zkne_aes64ks1i_cg_cp_rs1_b9_str) + 800001f0: 0009b683 ld x13,0(x19) + 800001f4: 00368c63 beq x13,x3,8000020c + 800001f8: 7c80276f jal x14,800029c0 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 80008a2e .word 0x80008a2e + 80000208: 00000000 .word 0x00000000 + 8000020c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0xb67eb7dbc716766f + 80000210: 0005b503 ld x10,0(x11) + 80000214: 00858593 addi x11,x11,8 + +0000000080000218 : +Zkne_aes64ks1i_cg_cp_rs1_b10: + aes64ks1i x25, x10, 4 # perform operation + 80000218: 31451c93 aes64ks1i x25,x10,0x4 + # Check if x25 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x25, Zkne_aes64ks1i_cg_cp_rs1_b10, Zkne_aes64ks1i_cg_cp_rs1_b10_str) + 8000021c: 0009b683 ld x13,0(x19) + 80000220: 01968c63 beq x13,x25,80000238 + 80000224: 79c0276f jal x14,800029c0 + 80000228: 80000218 .word 0x80000218 + 8000022c: 00000000 .word 0x00000000 + 80000230: 80008a65 .word 0x80008a65 + 80000234: 00000000 .word 0x00000000 + 80000238: 00898993 addi x19,x19,8 + + mv x2, x11 # switch data pointer register to avoid conflict with test + 8000023c: 00058113 addi x2,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x0f85bdece65b34c6 + 80000240: 00013583 ld x11,0(x2) + 80000244: 00810113 addi x2,x2,8 + +0000000080000248 : +Zkne_aes64ks1i_cg_cp_rs1_b11: + aes64ks1i x16, x11, 3 # perform operation + 80000248: 31359813 aes64ks1i x16,x11,0x3 + # Check if x16 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x16, Zkne_aes64ks1i_cg_cp_rs1_b11, Zkne_aes64ks1i_cg_cp_rs1_b11_str) + 8000024c: 0009b683 ld x13,0(x19) + 80000250: 01068c63 beq x13,x16,80000268 + 80000254: 76c0276f jal x14,800029c0 + 80000258: 80000248 .word 0x80000248 + 8000025c: 00000000 .word 0x00000000 + 80000260: 80008a9d .word 0x80008a9d + 80000264: 00000000 .word 0x00000000 + 80000268: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0xb3487e9abf045e36 + 8000026c: 00013603 ld x12,0(x2) + 80000270: 00810113 addi x2,x2,8 + +0000000080000274 : +Zkne_aes64ks1i_cg_cp_rs1_b12: + aes64ks1i x9, x12, 6 # perform operation + 80000274: 31661493 aes64ks1i x9,x12,0x6 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zkne_aes64ks1i_cg_cp_rs1_b12, Zkne_aes64ks1i_cg_cp_rs1_b12_str) + 80000278: 0009b683 ld x13,0(x19) + 8000027c: 00968c63 beq x13,x9,80000294 + 80000280: 7400276f jal x14,800029c0 + 80000284: 80000274 .word 0x80000274 + 80000288: 00000000 .word 0x00000000 + 8000028c: 80008ad5 .word 0x80008ad5 + 80000290: 00000000 .word 0x00000000 + 80000294: 00898993 addi x19,x19,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000298: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000029c: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x2052a9896480c1d9 + 800002a0: 00013683 ld x13,0(x2) + 800002a4: 00810113 addi x2,x2,8 + +00000000800002a8 : +Zkne_aes64ks1i_cg_cp_rs1_b13: + aes64ks1i x17, x13, 10 # perform operation + 800002a8: 31a69893 aes64ks1i x17,x13,0xa + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zkne_aes64ks1i_cg_cp_rs1_b13, Zkne_aes64ks1i_cg_cp_rs1_b13_str) + 800002ac: 0009b383 ld x7,0(x19) + 800002b0: 01138c63 beq x7,x17,800002c8 + 800002b4: 6e40246f jal x8,80002998 + 800002b8: 800002a8 .word 0x800002a8 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 80008b0d .word 0x80008b0d + 800002c4: 00000000 .word 0x00000000 + 800002c8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x14) # load rs1: x14 = 0x491ac466b0020c06 + 800002cc: 00013703 ld x14,0(x2) + 800002d0: 00810113 addi x2,x2,8 + +00000000800002d4 : +Zkne_aes64ks1i_cg_cp_rs1_b14: + aes64ks1i x15, x14, 6 # perform operation + 800002d4: 31671793 aes64ks1i x15,x14,0x6 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zkne_aes64ks1i_cg_cp_rs1_b14, Zkne_aes64ks1i_cg_cp_rs1_b14_str) + 800002d8: 0009b383 ld x7,0(x19) + 800002dc: 00f38c63 beq x7,x15,800002f4 + 800002e0: 6b80246f jal x8,80002998 + 800002e4: 800002d4 .word 0x800002d4 + 800002e8: 00000000 .word 0x00000000 + 800002ec: 80008b45 .word 0x80008b45 + 800002f0: 00000000 .word 0x00000000 + 800002f4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x8d4779b66401443f + 800002f8: 00013783 ld x15,0(x2) + 800002fc: 00810113 addi x2,x2,8 + +0000000080000300 : +Zkne_aes64ks1i_cg_cp_rs1_b15: + aes64ks1i x1, x15, 8 # perform operation + 80000300: 31879093 aes64ks1i x1,x15,0x8 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zkne_aes64ks1i_cg_cp_rs1_b15, Zkne_aes64ks1i_cg_cp_rs1_b15_str) + 80000304: 0009b383 ld x7,0(x19) + 80000308: 00138c63 beq x7,x1,80000320 + 8000030c: 68c0246f jal x8,80002998 + 80000310: 80000300 .word 0x80000300 + 80000314: 00000000 .word 0x00000000 + 80000318: 80008b7d .word 0x80008b7d + 8000031c: 00000000 .word 0x00000000 + 80000320: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x16) # load rs1: x16 = 0x74a8a03b2a4aacfb + 80000324: 00013803 ld x16,0(x2) + 80000328: 00810113 addi x2,x2,8 + +000000008000032c : +Zkne_aes64ks1i_cg_cp_rs1_b16: + aes64ks1i x0, x16, 4 # perform operation + 8000032c: 31481013 aes64ks1i x0,x16,0x4 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zkne_aes64ks1i_cg_cp_rs1_b16, Zkne_aes64ks1i_cg_cp_rs1_b16_str) + 80000330: 0009b383 ld x7,0(x19) + 80000334: 00038c63 beq x7,x0,8000034c + 80000338: 6600246f jal x8,80002998 + 8000033c: 8000032c .word 0x8000032c + 80000340: 00000000 .word 0x00000000 + 80000344: 80008bb5 .word 0x80008bb5 + 80000348: 00000000 .word 0x00000000 + 8000034c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0x589a5e628ee04825 + 80000350: 00013883 ld x17,0(x2) + 80000354: 00810113 addi x2,x2,8 + +0000000080000358 : +Zkne_aes64ks1i_cg_cp_rs1_b17: + aes64ks1i x28, x17, 8 # perform operation + 80000358: 31889e13 aes64ks1i x28,x17,0x8 + # Check if x28 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x28, Zkne_aes64ks1i_cg_cp_rs1_b17, Zkne_aes64ks1i_cg_cp_rs1_b17_str) + 8000035c: 0009b383 ld x7,0(x19) + 80000360: 01c38c63 beq x7,x28,80000378 + 80000364: 6340246f jal x8,80002998 + 80000368: 80000358 .word 0x80000358 + 8000036c: 00000000 .word 0x00000000 + 80000370: 80008bed .word 0x80008bed + 80000374: 00000000 .word 0x00000000 + 80000378: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x18) # load rs1: x18 = 0xccc5c249ce075b85 + 8000037c: 00013903 ld x18,0(x2) + 80000380: 00810113 addi x2,x2,8 + +0000000080000384 : +Zkne_aes64ks1i_cg_cp_rs1_b18: + aes64ks1i x22, x18, 7 # perform operation + 80000384: 31791b13 aes64ks1i x22,x18,0x7 + # Check if x22 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x22, Zkne_aes64ks1i_cg_cp_rs1_b18, Zkne_aes64ks1i_cg_cp_rs1_b18_str) + 80000388: 0009b383 ld x7,0(x19) + 8000038c: 01638c63 beq x7,x22,800003a4 + 80000390: 6080246f jal x8,80002998 + 80000394: 80000384 .word 0x80000384 + 80000398: 00000000 .word 0x00000000 + 8000039c: 80008c25 .word 0x80008c25 + 800003a0: 00000000 .word 0x00000000 + 800003a4: 00898993 addi x19,x19,8 + + mv x11, x19 # switch signature pointer register to avoid conflict with test + 800003a8: 00098593 addi x11,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xdd726d21381fe7c2 + 800003ac: 00013983 ld x19,0(x2) + 800003b0: 00810113 addi x2,x2,8 + +00000000800003b4 : +Zkne_aes64ks1i_cg_cp_rs1_b19: + aes64ks1i x12, x19, 10 # perform operation + 800003b4: 31a99613 aes64ks1i x12,x19,0xa + # Check if x12 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x12, Zkne_aes64ks1i_cg_cp_rs1_b19, Zkne_aes64ks1i_cg_cp_rs1_b19_str) + 800003b8: 0005b383 ld x7,0(x11) + 800003bc: 00c38c63 beq x7,x12,800003d4 + 800003c0: 5d80246f jal x8,80002998 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 80008c5d .word 0x80008c5d + 800003d0: 00000000 .word 0x00000000 + 800003d4: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xc1f19b09a03dbeea + 800003d8: 00013a03 ld x20,0(x2) + 800003dc: 00810113 addi x2,x2,8 + +00000000800003e0 : +Zkne_aes64ks1i_cg_cp_rs1_b20: + aes64ks1i x6, x20, 5 # perform operation + 800003e0: 315a1313 aes64ks1i x6,x20,0x5 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zkne_aes64ks1i_cg_cp_rs1_b20, Zkne_aes64ks1i_cg_cp_rs1_b20_str) + 800003e4: 0005b383 ld x7,0(x11) + 800003e8: 00638c63 beq x7,x6,80000400 + 800003ec: 5ac0246f jal x8,80002998 + 800003f0: 800003e0 .word 0x800003e0 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 80008c95 .word 0x80008c95 + 800003fc: 00000000 .word 0x00000000 + 80000400: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x65a490dc76c3fd0d + 80000404: 00013a83 ld x21,0(x2) + 80000408: 00810113 addi x2,x2,8 + +000000008000040c : +Zkne_aes64ks1i_cg_cp_rs1_b21: + aes64ks1i x27, x21, 7 # perform operation + 8000040c: 317a9d93 aes64ks1i x27,x21,0x7 + # Check if x27 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x27, Zkne_aes64ks1i_cg_cp_rs1_b21, Zkne_aes64ks1i_cg_cp_rs1_b21_str) + 80000410: 0005b383 ld x7,0(x11) + 80000414: 01b38c63 beq x7,x27,8000042c + 80000418: 5800246f jal x8,80002998 + 8000041c: 8000040c .word 0x8000040c + 80000420: 00000000 .word 0x00000000 + 80000424: 80008ccd .word 0x80008ccd + 80000428: 00000000 .word 0x00000000 + 8000042c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0affdfbb3e4d294e + 80000430: 00013b03 ld x22,0(x2) + 80000434: 00810113 addi x2,x2,8 + +0000000080000438 : +Zkne_aes64ks1i_cg_cp_rs1_b22: + aes64ks1i x19, x22, 3 # perform operation + 80000438: 313b1993 aes64ks1i x19,x22,0x3 + # Check if x19 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x19, Zkne_aes64ks1i_cg_cp_rs1_b22, Zkne_aes64ks1i_cg_cp_rs1_b22_str) + 8000043c: 0005b383 ld x7,0(x11) + 80000440: 01338c63 beq x7,x19,80000458 + 80000444: 5540246f jal x8,80002998 + 80000448: 80000438 .word 0x80000438 + 8000044c: 00000000 .word 0x00000000 + 80000450: 80008d05 .word 0x80008d05 + 80000454: 00000000 .word 0x00000000 + 80000458: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0x6969c244f760c6dd + 8000045c: 00013b83 ld x23,0(x2) + 80000460: 00810113 addi x2,x2,8 + +0000000080000464 : +Zkne_aes64ks1i_cg_cp_rs1_b23: + aes64ks1i x3, x23, 4 # perform operation + 80000464: 314b9193 aes64ks1i x3,x23,0x4 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zkne_aes64ks1i_cg_cp_rs1_b23, Zkne_aes64ks1i_cg_cp_rs1_b23_str) + 80000468: 0005b383 ld x7,0(x11) + 8000046c: 00338c63 beq x7,x3,80000484 + 80000470: 5280246f jal x8,80002998 + 80000474: 80000464 .word 0x80000464 + 80000478: 00000000 .word 0x00000000 + 8000047c: 80008d3d .word 0x80008d3d + 80000480: 00000000 .word 0x00000000 + 80000484: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x875a267dd9a182f5 + 80000488: 00013c03 ld x24,0(x2) + 8000048c: 00810113 addi x2,x2,8 + +0000000080000490 : +Zkne_aes64ks1i_cg_cp_rs1_b24: + aes64ks1i x4, x24, 9 # perform operation + 80000490: 319c1213 aes64ks1i x4,x24,0x9 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zkne_aes64ks1i_cg_cp_rs1_b24, Zkne_aes64ks1i_cg_cp_rs1_b24_str) + 80000494: 0005b383 ld x7,0(x11) + 80000498: 00438c63 beq x7,x4,800004b0 + 8000049c: 4fc0246f jal x8,80002998 + 800004a0: 80000490 .word 0x80000490 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 80008d75 .word 0x80008d75 + 800004ac: 00000000 .word 0x00000000 + 800004b0: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x8f197f305dbdcc73 + 800004b4: 00013c83 ld x25,0(x2) + 800004b8: 00810113 addi x2,x2,8 + +00000000800004bc : +Zkne_aes64ks1i_cg_cp_rs1_b25: + aes64ks1i x3, x25, 3 # perform operation + 800004bc: 313c9193 aes64ks1i x3,x25,0x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zkne_aes64ks1i_cg_cp_rs1_b25, Zkne_aes64ks1i_cg_cp_rs1_b25_str) + 800004c0: 0005b383 ld x7,0(x11) + 800004c4: 00338c63 beq x7,x3,800004dc + 800004c8: 4d00246f jal x8,80002998 + 800004cc: 800004bc .word 0x800004bc + 800004d0: 00000000 .word 0x00000000 + 800004d4: 80008dad .word 0x80008dad + 800004d8: 00000000 .word 0x00000000 + 800004dc: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x8b8ea52d0a521e00 + 800004e0: 00013d03 ld x26,0(x2) + 800004e4: 00810113 addi x2,x2,8 + +00000000800004e8 : +Zkne_aes64ks1i_cg_cp_rs1_b26: + aes64ks1i x6, x26, 1 # perform operation + 800004e8: 311d1313 aes64ks1i x6,x26,0x1 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zkne_aes64ks1i_cg_cp_rs1_b26, Zkne_aes64ks1i_cg_cp_rs1_b26_str) + 800004ec: 0005b383 ld x7,0(x11) + 800004f0: 00638c63 beq x7,x6,80000508 + 800004f4: 4a40246f jal x8,80002998 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 80008de5 .word 0x80008de5 + 80000504: 00000000 .word 0x00000000 + 80000508: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0x9c953ca2201d5f6e + 8000050c: 00013d83 ld x27,0(x2) + 80000510: 00810113 addi x2,x2,8 + +0000000080000514 : +Zkne_aes64ks1i_cg_cp_rs1_b27: + aes64ks1i x16, x27, 2 # perform operation + 80000514: 312d9813 aes64ks1i x16,x27,0x2 + # Check if x16 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x16, Zkne_aes64ks1i_cg_cp_rs1_b27, Zkne_aes64ks1i_cg_cp_rs1_b27_str) + 80000518: 0005b383 ld x7,0(x11) + 8000051c: 01038c63 beq x7,x16,80000534 + 80000520: 4780246f jal x8,80002998 + 80000524: 80000514 .word 0x80000514 + 80000528: 00000000 .word 0x00000000 + 8000052c: 80008e1d .word 0x80008e1d + 80000530: 00000000 .word 0x00000000 + 80000534: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x76f30a322baeb11e + 80000538: 00013e03 ld x28,0(x2) + 8000053c: 00810113 addi x2,x2,8 + +0000000080000540 : +Zkne_aes64ks1i_cg_cp_rs1_b28: + aes64ks1i x6, x28, 6 # perform operation + 80000540: 316e1313 aes64ks1i x6,x28,0x6 + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zkne_aes64ks1i_cg_cp_rs1_b28, Zkne_aes64ks1i_cg_cp_rs1_b28_str) + 80000544: 0005b383 ld x7,0(x11) + 80000548: 00638c63 beq x7,x6,80000560 + 8000054c: 44c0246f jal x8,80002998 + 80000550: 80000540 .word 0x80000540 + 80000554: 00000000 .word 0x00000000 + 80000558: 80008e55 .word 0x80008e55 + 8000055c: 00000000 .word 0x00000000 + 80000560: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x2ecdc41ffc4b845e + 80000564: 00013e83 ld x29,0(x2) + 80000568: 00810113 addi x2,x2,8 + +000000008000056c : +Zkne_aes64ks1i_cg_cp_rs1_b29: + aes64ks1i x5, x29, 7 # perform operation + 8000056c: 317e9293 aes64ks1i x5,x29,0x7 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zkne_aes64ks1i_cg_cp_rs1_b29, Zkne_aes64ks1i_cg_cp_rs1_b29_str) + 80000570: 0005b383 ld x7,0(x11) + 80000574: 00538c63 beq x7,x5,8000058c + 80000578: 4200246f jal x8,80002998 + 8000057c: 8000056c .word 0x8000056c + 80000580: 00000000 .word 0x00000000 + 80000584: 80008e8d .word 0x80008e8d + 80000588: 00000000 .word 0x00000000 + 8000058c: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x1c4ccada30510243 + 80000590: 00013f03 ld x30,0(x2) + 80000594: 00810113 addi x2,x2,8 + +0000000080000598 : +Zkne_aes64ks1i_cg_cp_rs1_b30: + aes64ks1i x21, x30, 5 # perform operation + 80000598: 315f1a93 aes64ks1i x21,x30,0x5 + # Check if x21 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x21, Zkne_aes64ks1i_cg_cp_rs1_b30, Zkne_aes64ks1i_cg_cp_rs1_b30_str) + 8000059c: 0005b383 ld x7,0(x11) + 800005a0: 01538c63 beq x7,x21,800005b8 + 800005a4: 3f40246f jal x8,80002998 + 800005a8: 80000598 .word 0x80000598 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 80008ec5 .word 0x80008ec5 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 00858593 addi x11,x11,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x599d496f46ef29fe + 800005bc: 00013f83 ld x31,0(x2) + 800005c0: 00810113 addi x2,x2,8 + +00000000800005c4 : +Zkne_aes64ks1i_cg_cp_rs1_b31: + aes64ks1i x26, x31, 10 # perform operation + 800005c4: 31af9d13 aes64ks1i x26,x31,0xa + # Check if x26 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x26, Zkne_aes64ks1i_cg_cp_rs1_b31, Zkne_aes64ks1i_cg_cp_rs1_b31_str) + 800005c8: 0005b383 ld x7,0(x11) + 800005cc: 01a38c63 beq x7,x26,800005e4 + 800005d0: 3c80246f jal x8,80002998 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 80008efd .word 0x80008efd + 800005e0: 00000000 .word 0x00000000 + 800005e4: 00858593 addi x11,x11,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xab271b94f41e5a32 + 800005e8: 00013b03 ld x22,0(x2) + 800005ec: 00810113 addi x2,x2,8 + +00000000800005f0 : +Zkne_aes64ks1i_cg_cp_rd_b0: + aes64ks1i x0, x22, 2 # perform operation + 800005f0: 312b1013 aes64ks1i x0,x22,0x2 + # Check if x0 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x0, Zkne_aes64ks1i_cg_cp_rd_b0, Zkne_aes64ks1i_cg_cp_rd_b0_str) + 800005f4: 0005b383 ld x7,0(x11) + 800005f8: 00038c63 beq x7,x0,80000610 + 800005fc: 39c0246f jal x8,80002998 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80008f35 .word 0x80008f35 + 8000060c: 00000000 .word 0x00000000 + 80000610: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x5) # load rs1: x5 = 0xa88d80da2917f3c9 + 80000614: 00013283 ld x5,0(x2) + 80000618: 00810113 addi x2,x2,8 + +000000008000061c : +Zkne_aes64ks1i_cg_cp_rd_b1: + aes64ks1i x1, x5, 9 # perform operation + 8000061c: 31929093 aes64ks1i x1,x5,0x9 + # Check if x1 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x1, Zkne_aes64ks1i_cg_cp_rd_b1, Zkne_aes64ks1i_cg_cp_rd_b1_str) + 80000620: 0005b383 ld x7,0(x11) + 80000624: 00138c63 beq x7,x1,8000063c + 80000628: 3700246f jal x8,80002998 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008f6b .word 0x80008f6b + 80000638: 00000000 .word 0x00000000 + 8000063c: 00858593 addi x11,x11,8 + + mv x23, x2 # switch data pointer register to avoid conflict with test + 80000640: 00010b93 addi x23,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x0158786dc0142904 + 80000644: 000bbe83 ld x29,0(x23) + 80000648: 008b8b93 addi x23,x23,8 + +000000008000064c : +Zkne_aes64ks1i_cg_cp_rd_b2: + aes64ks1i x2, x29, 6 # perform operation + 8000064c: 316e9113 aes64ks1i x2,x29,0x6 + # Check if x2 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x2, Zkne_aes64ks1i_cg_cp_rd_b2, Zkne_aes64ks1i_cg_cp_rd_b2_str) + 80000650: 0005b383 ld x7,0(x11) + 80000654: 00238c63 beq x7,x2,8000066c + 80000658: 3400246f jal x8,80002998 + 8000065c: 8000064c .word 0x8000064c + 80000660: 00000000 .word 0x00000000 + 80000664: 80008fa1 .word 0x80008fa1 + 80000668: 00000000 .word 0x00000000 + 8000066c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x7a1e70828465d118 + 80000670: 000bbc03 ld x24,0(x23) + 80000674: 008b8b93 addi x23,x23,8 + +0000000080000678 : +Zkne_aes64ks1i_cg_cp_rd_b3: + aes64ks1i x3, x24, 3 # perform operation + 80000678: 313c1193 aes64ks1i x3,x24,0x3 + # Check if x3 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x3, Zkne_aes64ks1i_cg_cp_rd_b3, Zkne_aes64ks1i_cg_cp_rd_b3_str) + 8000067c: 0005b383 ld x7,0(x11) + 80000680: 00338c63 beq x7,x3,80000698 + 80000684: 3140246f jal x8,80002998 + 80000688: 80000678 .word 0x80000678 + 8000068c: 00000000 .word 0x00000000 + 80000690: 80008fd7 .word 0x80008fd7 + 80000694: 00000000 .word 0x00000000 + 80000698: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x44d4a7bcc60bff7b + 8000069c: 000bb903 ld x18,0(x23) + 800006a0: 008b8b93 addi x23,x23,8 + +00000000800006a4 : +Zkne_aes64ks1i_cg_cp_rd_b4: + aes64ks1i x4, x18, 2 # perform operation + 800006a4: 31291213 aes64ks1i x4,x18,0x2 + # Check if x4 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x4, Zkne_aes64ks1i_cg_cp_rd_b4, Zkne_aes64ks1i_cg_cp_rd_b4_str) + 800006a8: 0005b383 ld x7,0(x11) + 800006ac: 00438c63 beq x7,x4,800006c4 + 800006b0: 2e80246f jal x8,80002998 + 800006b4: 800006a4 .word 0x800006a4 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 8000900d .word 0x8000900d + 800006c0: 00000000 .word 0x00000000 + 800006c4: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x54647f5c1e27d5ff + 800006c8: 000bb183 ld x3,0(x23) + 800006cc: 008b8b93 addi x23,x23,8 + +00000000800006d0 : +Zkne_aes64ks1i_cg_cp_rd_b5: + aes64ks1i x5, x3, 4 # perform operation + 800006d0: 31419293 aes64ks1i x5,x3,0x4 + # Check if x5 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x5, Zkne_aes64ks1i_cg_cp_rd_b5, Zkne_aes64ks1i_cg_cp_rd_b5_str) + 800006d4: 0005b383 ld x7,0(x11) + 800006d8: 00538c63 beq x7,x5,800006f0 + 800006dc: 2bc0246f jal x8,80002998 + 800006e0: 800006d0 .word 0x800006d0 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 80009043 .word 0x80009043 + 800006ec: 00000000 .word 0x00000000 + 800006f0: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0xc0d097186aba52d9 + 800006f4: 000bb083 ld x1,0(x23) + 800006f8: 008b8b93 addi x23,x23,8 + +00000000800006fc : +Zkne_aes64ks1i_cg_cp_rd_b6: + aes64ks1i x6, x1, 10 # perform operation + 800006fc: 31a09313 aes64ks1i x6,x1,0xa + # Check if x6 contains the expected result. x11 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x11, x8, x7, x6, Zkne_aes64ks1i_cg_cp_rd_b6, Zkne_aes64ks1i_cg_cp_rd_b6_str) + 80000700: 0005b383 ld x7,0(x11) + 80000704: 00638c63 beq x7,x6,8000071c + 80000708: 2900246f jal x8,80002998 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80009079 .word 0x80009079 + 80000718: 00000000 .word 0x00000000 + 8000071c: 00858593 addi x11,x11,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000724: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xd57f8cd7c659ca32 + 80000728: 000bbe83 ld x29,0(x23) + 8000072c: 008b8b93 addi x23,x23,8 + +0000000080000730 : +Zkne_aes64ks1i_cg_cp_rd_b7: + aes64ks1i x7, x29, 10 # perform operation + 80000730: 31ae9393 aes64ks1i x7,x29,0xa + # Check if x7 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x7, Zkne_aes64ks1i_cg_cp_rd_b7, Zkne_aes64ks1i_cg_cp_rd_b7_str) + 80000734: 0005b203 ld x4,0(x11) + 80000738: 00720c63 beq x4,x7,80000750 + 8000073c: 244022ef jal x5,80002980 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 800090af .word 0x800090af + 8000074c: 00000000 .word 0x00000000 + 80000750: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x0ea7f6cf2b962102 + 80000754: 000bb083 ld x1,0(x23) + 80000758: 008b8b93 addi x23,x23,8 + +000000008000075c : +Zkne_aes64ks1i_cg_cp_rd_b8: + aes64ks1i x8, x1, 10 # perform operation + 8000075c: 31a09413 aes64ks1i x8,x1,0xa + # Check if x8 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x8, Zkne_aes64ks1i_cg_cp_rd_b8, Zkne_aes64ks1i_cg_cp_rd_b8_str) + 80000760: 0005b203 ld x4,0(x11) + 80000764: 00820c63 beq x4,x8,8000077c + 80000768: 218022ef jal x5,80002980 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 800090e5 .word 0x800090e5 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x3674fc571b401626 + 80000780: 000bbd03 ld x26,0(x23) + 80000784: 008b8b93 addi x23,x23,8 + +0000000080000788 : +Zkne_aes64ks1i_cg_cp_rd_b9: + aes64ks1i x9, x26, 4 # perform operation + 80000788: 314d1493 aes64ks1i x9,x26,0x4 + # Check if x9 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x9, Zkne_aes64ks1i_cg_cp_rd_b9, Zkne_aes64ks1i_cg_cp_rd_b9_str) + 8000078c: 0005b203 ld x4,0(x11) + 80000790: 00920c63 beq x4,x9,800007a8 + 80000794: 1ec022ef jal x5,80002980 + 80000798: 80000788 .word 0x80000788 + 8000079c: 00000000 .word 0x00000000 + 800007a0: 8000911b .word 0x8000911b + 800007a4: 00000000 .word 0x00000000 + 800007a8: 00858593 addi x11,x11,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x0bc9ae19084db7ed + 800007ac: 000bbc03 ld x24,0(x23) + 800007b0: 008b8b93 addi x23,x23,8 + +00000000800007b4 : +Zkne_aes64ks1i_cg_cp_rd_b10: + aes64ks1i x10, x24, 6 # perform operation + 800007b4: 316c1513 aes64ks1i x10,x24,0x6 + # Check if x10 contains the expected result. x11 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x11, x5, x4, x10, Zkne_aes64ks1i_cg_cp_rd_b10, Zkne_aes64ks1i_cg_cp_rd_b10_str) + 800007b8: 0005b203 ld x4,0(x11) + 800007bc: 00a20c63 beq x4,x10,800007d4 + 800007c0: 1c0022ef jal x5,80002980 + 800007c4: 800007b4 .word 0x800007b4 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 80009151 .word 0x80009151 + 800007d0: 00000000 .word 0x00000000 + 800007d4: 00858593 addi x11,x11,8 + + mv x24, x11 # switch signature pointer register to avoid conflict with test + 800007d8: 00058c13 addi x24,x11,0 +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x41b05a0fa72a34dd + 800007dc: 000bbf03 ld x30,0(x23) + 800007e0: 008b8b93 addi x23,x23,8 + +00000000800007e4 : +Zkne_aes64ks1i_cg_cp_rd_b11: + aes64ks1i x11, x30, 3 # perform operation + 800007e4: 313f1593 aes64ks1i x11,x30,0x3 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zkne_aes64ks1i_cg_cp_rd_b11, Zkne_aes64ks1i_cg_cp_rd_b11_str) + 800007e8: 000c3203 ld x4,0(x24) + 800007ec: 00b20c63 beq x4,x11,80000804 + 800007f0: 190022ef jal x5,80002980 + 800007f4: 800007e4 .word 0x800007e4 + 800007f8: 00000000 .word 0x00000000 + 800007fc: 80009188 .word 0x80009188 + 80000800: 00000000 .word 0x00000000 + 80000804: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xe17b08091e4c1881 + 80000808: 000bb183 ld x3,0(x23) + 8000080c: 008b8b93 addi x23,x23,8 + +0000000080000810 : +Zkne_aes64ks1i_cg_cp_rd_b12: + aes64ks1i x12, x3, 7 # perform operation + 80000810: 31719613 aes64ks1i x12,x3,0x7 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zkne_aes64ks1i_cg_cp_rd_b12, Zkne_aes64ks1i_cg_cp_rd_b12_str) + 80000814: 000c3203 ld x4,0(x24) + 80000818: 00c20c63 beq x4,x12,80000830 + 8000081c: 164022ef jal x5,80002980 + 80000820: 80000810 .word 0x80000810 + 80000824: 00000000 .word 0x00000000 + 80000828: 800091bf .word 0x800091bf + 8000082c: 00000000 .word 0x00000000 + 80000830: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x30a321309cad0859 + 80000834: 000bbf03 ld x30,0(x23) + 80000838: 008b8b93 addi x23,x23,8 + +000000008000083c : +Zkne_aes64ks1i_cg_cp_rd_b13: + aes64ks1i x13, x30, 1 # perform operation + 8000083c: 311f1693 aes64ks1i x13,x30,0x1 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zkne_aes64ks1i_cg_cp_rd_b13, Zkne_aes64ks1i_cg_cp_rd_b13_str) + 80000840: 000c3203 ld x4,0(x24) + 80000844: 00d20c63 beq x4,x13,8000085c + 80000848: 138022ef jal x5,80002980 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 800091f6 .word 0x800091f6 + 80000858: 00000000 .word 0x00000000 + 8000085c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xa55f8f1318063451 + 80000860: 000bb883 ld x17,0(x23) + 80000864: 008b8b93 addi x23,x23,8 + +0000000080000868 : +Zkne_aes64ks1i_cg_cp_rd_b14: + aes64ks1i x14, x17, 8 # perform operation + 80000868: 31889713 aes64ks1i x14,x17,0x8 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zkne_aes64ks1i_cg_cp_rd_b14, Zkne_aes64ks1i_cg_cp_rd_b14_str) + 8000086c: 000c3203 ld x4,0(x24) + 80000870: 00e20c63 beq x4,x14,80000888 + 80000874: 10c022ef jal x5,80002980 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 8000922d .word 0x8000922d + 80000884: 00000000 .word 0x00000000 + 80000888: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x2f304bbfdf625e84 + 8000088c: 000bb583 ld x11,0(x23) + 80000890: 008b8b93 addi x23,x23,8 + +0000000080000894 : +Zkne_aes64ks1i_cg_cp_rd_b15: + aes64ks1i x15, x11, 2 # perform operation + 80000894: 31259793 aes64ks1i x15,x11,0x2 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zkne_aes64ks1i_cg_cp_rd_b15, Zkne_aes64ks1i_cg_cp_rd_b15_str) + 80000898: 000c3203 ld x4,0(x24) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 0e0022ef jal x5,80002980 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 80009264 .word 0x80009264 + 800008b0: 00000000 .word 0x00000000 + 800008b4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0xe823e64ddbaa3df3 + 800008b8: 000bb683 ld x13,0(x23) + 800008bc: 008b8b93 addi x23,x23,8 + +00000000800008c0 : +Zkne_aes64ks1i_cg_cp_rd_b16: + aes64ks1i x16, x13, 6 # perform operation + 800008c0: 31669813 aes64ks1i x16,x13,0x6 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zkne_aes64ks1i_cg_cp_rd_b16, Zkne_aes64ks1i_cg_cp_rd_b16_str) + 800008c4: 000c3203 ld x4,0(x24) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 0b4022ef jal x5,80002980 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 8000929b .word 0x8000929b + 800008dc: 00000000 .word 0x00000000 + 800008e0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xfe16b606434da797 + 800008e4: 000bbc83 ld x25,0(x23) + 800008e8: 008b8b93 addi x23,x23,8 + +00000000800008ec : +Zkne_aes64ks1i_cg_cp_rd_b17: + aes64ks1i x17, x25, 9 # perform operation + 800008ec: 319c9893 aes64ks1i x17,x25,0x9 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zkne_aes64ks1i_cg_cp_rd_b17, Zkne_aes64ks1i_cg_cp_rd_b17_str) + 800008f0: 000c3203 ld x4,0(x24) + 800008f4: 01120c63 beq x4,x17,8000090c + 800008f8: 088022ef jal x5,80002980 + 800008fc: 800008ec .word 0x800008ec + 80000900: 00000000 .word 0x00000000 + 80000904: 800092d2 .word 0x800092d2 + 80000908: 00000000 .word 0x00000000 + 8000090c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0x080b2ac9fa14b831 + 80000910: 000bb183 ld x3,0(x23) + 80000914: 008b8b93 addi x23,x23,8 + +0000000080000918 : +Zkne_aes64ks1i_cg_cp_rd_b18: + aes64ks1i x18, x3, 3 # perform operation + 80000918: 31319913 aes64ks1i x18,x3,0x3 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zkne_aes64ks1i_cg_cp_rd_b18, Zkne_aes64ks1i_cg_cp_rd_b18_str) + 8000091c: 000c3203 ld x4,0(x24) + 80000920: 01220c63 beq x4,x18,80000938 + 80000924: 05c022ef jal x5,80002980 + 80000928: 80000918 .word 0x80000918 + 8000092c: 00000000 .word 0x00000000 + 80000930: 80009309 .word 0x80009309 + 80000934: 00000000 .word 0x00000000 + 80000938: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0x881a4f3eba024e38 + 8000093c: 000bb083 ld x1,0(x23) + 80000940: 008b8b93 addi x23,x23,8 + +0000000080000944 : +Zkne_aes64ks1i_cg_cp_rd_b19: + aes64ks1i x19, x1, 0 # perform operation + 80000944: 31009993 aes64ks1i x19,x1,0x0 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zkne_aes64ks1i_cg_cp_rd_b19, Zkne_aes64ks1i_cg_cp_rd_b19_str) + 80000948: 000c3203 ld x4,0(x24) + 8000094c: 01320c63 beq x4,x19,80000964 + 80000950: 030022ef jal x5,80002980 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 80009340 .word 0x80009340 + 80000960: 00000000 .word 0x00000000 + 80000964: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xfa4b543d9b917d12 + 80000968: 000bb603 ld x12,0(x23) + 8000096c: 008b8b93 addi x23,x23,8 + +0000000080000970 : +Zkne_aes64ks1i_cg_cp_rd_b20: + aes64ks1i x20, x12, 10 # perform operation + 80000970: 31a61a13 aes64ks1i x20,x12,0xa + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zkne_aes64ks1i_cg_cp_rd_b20, Zkne_aes64ks1i_cg_cp_rd_b20_str) + 80000974: 000c3203 ld x4,0(x24) + 80000978: 01420c63 beq x4,x20,80000990 + 8000097c: 004022ef jal x5,80002980 + 80000980: 80000970 .word 0x80000970 + 80000984: 00000000 .word 0x00000000 + 80000988: 80009377 .word 0x80009377 + 8000098c: 00000000 .word 0x00000000 + 80000990: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x72d2302d7d0c72df + 80000994: 000bb383 ld x7,0(x23) + 80000998: 008b8b93 addi x23,x23,8 + +000000008000099c : +Zkne_aes64ks1i_cg_cp_rd_b21: + aes64ks1i x21, x7, 10 # perform operation + 8000099c: 31a39a93 aes64ks1i x21,x7,0xa + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zkne_aes64ks1i_cg_cp_rd_b21, Zkne_aes64ks1i_cg_cp_rd_b21_str) + 800009a0: 000c3203 ld x4,0(x24) + 800009a4: 01520c63 beq x4,x21,800009bc + 800009a8: 7d9012ef jal x5,80002980 + 800009ac: 8000099c .word 0x8000099c + 800009b0: 00000000 .word 0x00000000 + 800009b4: 800093ae .word 0x800093ae + 800009b8: 00000000 .word 0x00000000 + 800009bc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xa5d43bae2f004249 + 800009c0: 000bb983 ld x19,0(x23) + 800009c4: 008b8b93 addi x23,x23,8 + +00000000800009c8 : +Zkne_aes64ks1i_cg_cp_rd_b22: + aes64ks1i x22, x19, 7 # perform operation + 800009c8: 31799b13 aes64ks1i x22,x19,0x7 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zkne_aes64ks1i_cg_cp_rd_b22, Zkne_aes64ks1i_cg_cp_rd_b22_str) + 800009cc: 000c3203 ld x4,0(x24) + 800009d0: 01620c63 beq x4,x22,800009e8 + 800009d4: 7ad012ef jal x5,80002980 + 800009d8: 800009c8 .word 0x800009c8 + 800009dc: 00000000 .word 0x00000000 + 800009e0: 800093e5 .word 0x800093e5 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 008c0c13 addi x24,x24,8 + + mv x15, x23 # switch data pointer register to avoid conflict with test + 800009ec: 000b8793 addi x15,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xb724e7d6f28adeee + 800009f0: 0007be83 ld x29,0(x15) + 800009f4: 00878793 addi x15,x15,8 + +00000000800009f8 : +Zkne_aes64ks1i_cg_cp_rd_b23: + aes64ks1i x23, x29, 5 # perform operation + 800009f8: 315e9b93 aes64ks1i x23,x29,0x5 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zkne_aes64ks1i_cg_cp_rd_b23, Zkne_aes64ks1i_cg_cp_rd_b23_str) + 800009fc: 000c3203 ld x4,0(x24) + 80000a00: 01720c63 beq x4,x23,80000a18 + 80000a04: 77d012ef jal x5,80002980 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 8000941c .word 0x8000941c + 80000a14: 00000000 .word 0x00000000 + 80000a18: 008c0c13 addi x24,x24,8 + + mv x2, x24 # switch signature pointer register to avoid conflict with test + 80000a1c: 000c0113 addi x2,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x35b30f27f1b493f1 + 80000a20: 0007b383 ld x7,0(x15) + 80000a24: 00878793 addi x15,x15,8 + +0000000080000a28 : +Zkne_aes64ks1i_cg_cp_rd_b24: + aes64ks1i x24, x7, 0 # perform operation + 80000a28: 31039c13 aes64ks1i x24,x7,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zkne_aes64ks1i_cg_cp_rd_b24, Zkne_aes64ks1i_cg_cp_rd_b24_str) + 80000a2c: 00013203 ld x4,0(x2) + 80000a30: 01820c63 beq x4,x24,80000a48 + 80000a34: 74d012ef jal x5,80002980 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009453 .word 0x80009453 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xf7024144deda7ab1 + 80000a4c: 0007b703 ld x14,0(x15) + 80000a50: 00878793 addi x15,x15,8 + +0000000080000a54 : +Zkne_aes64ks1i_cg_cp_rd_b25: + aes64ks1i x25, x14, 7 # perform operation + 80000a54: 31771c93 aes64ks1i x25,x14,0x7 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zkne_aes64ks1i_cg_cp_rd_b25, Zkne_aes64ks1i_cg_cp_rd_b25_str) + 80000a58: 00013203 ld x4,0(x2) + 80000a5c: 01920c63 beq x4,x25,80000a74 + 80000a60: 721012ef jal x5,80002980 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000948a .word 0x8000948a + 80000a70: 00000000 .word 0x00000000 + 80000a74: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xee520cb10fedea6d + 80000a78: 0007b303 ld x6,0(x15) + 80000a7c: 00878793 addi x15,x15,8 + +0000000080000a80 : +Zkne_aes64ks1i_cg_cp_rd_b26: + aes64ks1i x26, x6, 3 # perform operation + 80000a80: 31331d13 aes64ks1i x26,x6,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zkne_aes64ks1i_cg_cp_rd_b26, Zkne_aes64ks1i_cg_cp_rd_b26_str) + 80000a84: 00013203 ld x4,0(x2) + 80000a88: 01a20c63 beq x4,x26,80000aa0 + 80000a8c: 6f5012ef jal x5,80002980 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 800094c1 .word 0x800094c1 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5e33168c50428d1a + 80000aa4: 0007be03 ld x28,0(x15) + 80000aa8: 00878793 addi x15,x15,8 + +0000000080000aac : +Zkne_aes64ks1i_cg_cp_rd_b27: + aes64ks1i x27, x28, 8 # perform operation + 80000aac: 318e1d93 aes64ks1i x27,x28,0x8 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zkne_aes64ks1i_cg_cp_rd_b27, Zkne_aes64ks1i_cg_cp_rd_b27_str) + 80000ab0: 00013203 ld x4,0(x2) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 6c9012ef jal x5,80002980 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094f8 .word 0x800094f8 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xa04c3caede1f47f9 + 80000ad0: 0007b883 ld x17,0(x15) + 80000ad4: 00878793 addi x15,x15,8 + +0000000080000ad8 : +Zkne_aes64ks1i_cg_cp_rd_b28: + aes64ks1i x28, x17, 0 # perform operation + 80000ad8: 31089e13 aes64ks1i x28,x17,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zkne_aes64ks1i_cg_cp_rd_b28, Zkne_aes64ks1i_cg_cp_rd_b28_str) + 80000adc: 00013203 ld x4,0(x2) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 69d012ef jal x5,80002980 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 8000952f .word 0x8000952f + 80000af4: 00000000 .word 0x00000000 + 80000af8: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x30acf9b435183841 + 80000afc: 0007b803 ld x16,0(x15) + 80000b00: 00878793 addi x15,x15,8 + +0000000080000b04 : +Zkne_aes64ks1i_cg_cp_rd_b29: + aes64ks1i x29, x16, 7 # perform operation + 80000b04: 31781e93 aes64ks1i x29,x16,0x7 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zkne_aes64ks1i_cg_cp_rd_b29, Zkne_aes64ks1i_cg_cp_rd_b29_str) + 80000b08: 00013203 ld x4,0(x2) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 671012ef jal x5,80002980 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 80009566 .word 0x80009566 + 80000b20: 00000000 .word 0x00000000 + 80000b24: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xb4865e321267af2c + 80000b28: 0007b583 ld x11,0(x15) + 80000b2c: 00878793 addi x15,x15,8 + +0000000080000b30 : +Zkne_aes64ks1i_cg_cp_rd_b30: + aes64ks1i x30, x11, 2 # perform operation + 80000b30: 31259f13 aes64ks1i x30,x11,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zkne_aes64ks1i_cg_cp_rd_b30, Zkne_aes64ks1i_cg_cp_rd_b30_str) + 80000b34: 00013203 ld x4,0(x2) + 80000b38: 01e20c63 beq x4,x30,80000b50 + 80000b3c: 645012ef jal x5,80002980 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 8000959d .word 0x8000959d + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x86ccd5eaf6844a12 + 80000b54: 0007be83 ld x29,0(x15) + 80000b58: 00878793 addi x15,x15,8 + +0000000080000b5c : +Zkne_aes64ks1i_cg_cp_rd_b31: + aes64ks1i x31, x29, 6 # perform operation + 80000b5c: 316e9f93 aes64ks1i x31,x29,0x6 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zkne_aes64ks1i_cg_cp_rd_b31, Zkne_aes64ks1i_cg_cp_rd_b31_str) + 80000b60: 00013203 ld x4,0(x2) + 80000b64: 01f20c63 beq x4,x31,80000b7c + 80000b68: 619012ef jal x5,80002980 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 800095d4 .word 0x800095d4 + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x0000000000000000 + 80000b80: 0007b183 ld x3,0(x15) + 80000b84: 00878793 addi x15,x15,8 + +0000000080000b88 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x0: + aes64ks1i x27, x3, 0 # perform operation + 80000b88: 31019d93 aes64ks1i x27,x3,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zkne_aes64ks1i_cg_cp_rs1_edges_0x0, Zkne_aes64ks1i_cg_cp_rs1_edges_0x0_str) + 80000b8c: 00013203 ld x4,0(x2) + 80000b90: 01b20c63 beq x4,x27,80000ba8 + 80000b94: 5ed012ef jal x5,80002980 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000960b .word 0x8000960b + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0000000000000001 + 80000bac: 0007b503 ld x10,0(x15) + 80000bb0: 00878793 addi x15,x15,8 + +0000000080000bb4 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x1: + aes64ks1i x26, x10, 0 # perform operation + 80000bb4: 31051d13 aes64ks1i x26,x10,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zkne_aes64ks1i_cg_cp_rs1_edges_0x1, Zkne_aes64ks1i_cg_cp_rs1_edges_0x1_str) + 80000bb8: 00013203 ld x4,0(x2) + 80000bbc: 01a20c63 beq x4,x26,80000bd4 + 80000bc0: 5c1012ef jal x5,80002980 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80009649 .word 0x80009649 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x0000000000000002 + 80000bd8: 0007b083 ld x1,0(x15) + 80000bdc: 00878793 addi x15,x15,8 + +0000000080000be0 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x2: + aes64ks1i x13, x1, 10 # perform operation + 80000be0: 31a09693 aes64ks1i x13,x1,0xa + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zkne_aes64ks1i_cg_cp_rs1_edges_0x2, Zkne_aes64ks1i_cg_cp_rs1_edges_0x2_str) + 80000be4: 00013203 ld x4,0(x2) + 80000be8: 00d20c63 beq x4,x13,80000c00 + 80000bec: 595012ef jal x5,80002980 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 80009687 .word 0x80009687 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8000000000000000 + 80000c04: 0007bb03 ld x22,0(x15) + 80000c08: 00878793 addi x15,x15,8 + +0000000080000c0c : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000: + aes64ks1i x18, x22, 9 # perform operation + 80000c0c: 319b1913 aes64ks1i x18,x22,0x9 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000, Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 00013203 ld x4,0(x2) + 80000c14: 01220c63 beq x4,x18,80000c2c + 80000c18: 569012ef jal x5,80002980 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 800096c5 .word 0x800096c5 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8000000000000001 + 80000c30: 0007bc03 ld x24,0(x15) + 80000c34: 00878793 addi x15,x15,8 + +0000000080000c38 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001: + aes64ks1i x6, x24, 9 # perform operation + 80000c38: 319c1313 aes64ks1i x6,x24,0x9 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001, Zkne_aes64ks1i_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 00013203 ld x4,0(x2) + 80000c40: 00620c63 beq x4,x6,80000c58 + 80000c44: 53d012ef jal x5,80002980 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 80009712 .word 0x80009712 + 80000c54: 00000000 .word 0x00000000 + 80000c58: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x7fffffffffffffff + 80000c5c: 0007bf03 ld x30,0(x15) + 80000c60: 00878793 addi x15,x15,8 + +0000000080000c64 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64ks1i x19, x30, 10 # perform operation + 80000c64: 31af1993 aes64ks1i x19,x30,0xa + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zkne_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff, Zkne_aes64ks1i_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 00013203 ld x4,0(x2) + 80000c6c: 01320c63 beq x4,x19,80000c84 + 80000c70: 511012ef jal x5,80002980 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 8000975f .word 0x8000975f + 80000c80: 00000000 .word 0x00000000 + 80000c84: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80000c88: 0007bd03 ld x26,0(x15) + 80000c8c: 00878793 addi x15,x15,8 + +0000000080000c90 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64ks1i x1, x26, 1 # perform operation + 80000c90: 311d1093 aes64ks1i x1,x26,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zkne_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe, Zkne_aes64ks1i_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 00013203 ld x4,0(x2) + 80000c98: 00120c63 beq x4,x1,80000cb0 + 80000c9c: 4e5012ef jal x5,80002980 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 800097ac .word 0x800097ac + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0xffffffffffffffff + 80000cb4: 0007b403 ld x8,0(x15) + 80000cb8: 00878793 addi x15,x15,8 + +0000000080000cbc : +Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff: + aes64ks1i x16, x8, 8 # perform operation + 80000cbc: 31841813 aes64ks1i x16,x8,0x8 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff, Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 00013203 ld x4,0(x2) + 80000cc4: 01020c63 beq x4,x16,80000cdc + 80000cc8: 4b9012ef jal x5,80002980 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800097f9 .word 0x800097f9 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xfffffffffffffffe + 80000ce0: 0007b183 ld x3,0(x15) + 80000ce4: 00878793 addi x15,x15,8 + +0000000080000ce8 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64ks1i x6, x3, 10 # perform operation + 80000ce8: 31a19313 aes64ks1i x6,x3,0xa + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe, Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 00013203 ld x4,0(x2) + 80000cf0: 00620c63 beq x4,x6,80000d08 + 80000cf4: 48d012ef jal x5,80002980 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009846 .word 0x80009846 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80000d0c: 0007b083 ld x1,0(x15) + 80000d10: 00878793 addi x15,x15,8 + +0000000080000d14 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64ks1i x19, x1, 8 # perform operation + 80000d14: 31809993 aes64ks1i x19,x1,0x8 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zkne_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zkne_aes64ks1i_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 00013203 ld x4,0(x2) + 80000d1c: 01320c63 beq x4,x19,80000d34 + 80000d20: 461012ef jal x5,80002980 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 80009893 .word 0x80009893 + 80000d30: 00000000 .word 0x00000000 + 80000d34: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80000d38: 0007b883 ld x17,0(x15) + 80000d3c: 00878793 addi x15,x15,8 + +0000000080000d40 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64ks1i x7, x17, 4 # perform operation + 80000d40: 31489393 aes64ks1i x7,x17,0x4 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zkne_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks1i_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 00013203 ld x4,0(x2) + 80000d48: 00720c63 beq x4,x7,80000d60 + 80000d4c: 435012ef jal x5,80002980 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 800098e0 .word 0x800098e0 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x5555555555555555 + 80000d64: 0007bb83 ld x23,0(x15) + 80000d68: 00878793 addi x15,x15,8 + +0000000080000d6c : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555: + aes64ks1i x6, x23, 2 # perform operation + 80000d6c: 312b9313 aes64ks1i x6,x23,0x2 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zkne_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555, Zkne_aes64ks1i_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 00013203 ld x4,0(x2) + 80000d74: 00620c63 beq x4,x6,80000d8c + 80000d78: 409012ef jal x5,80002980 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 8000992d .word 0x8000992d + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x00000000ffffffff + 80000d90: 0007b583 ld x11,0(x15) + 80000d94: 00878793 addi x15,x15,8 + +0000000080000d98 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffff: + aes64ks1i x12, x11, 9 # perform operation + 80000d98: 31959613 aes64ks1i x12,x11,0x9 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffff, Zkne_aes64ks1i_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 00013203 ld x4,0(x2) + 80000da0: 00c20c63 beq x4,x12,80000db8 + 80000da4: 3dd012ef jal x5,80002980 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000997a .word 0x8000997a + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x00000000fffffffe + 80000dbc: 0007b383 ld x7,0(x15) + 80000dc0: 00878793 addi x15,x15,8 + +0000000080000dc4 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffe: + aes64ks1i x9, x7, 9 # perform operation + 80000dc4: 31939493 aes64ks1i x9,x7,0x9 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffe, Zkne_aes64ks1i_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 00013203 ld x4,0(x2) + 80000dcc: 00920c63 beq x4,x9,80000de4 + 80000dd0: 3b1012ef jal x5,80002980 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800099bf .word 0x800099bf + 80000de0: 00000000 .word 0x00000000 + 80000de4: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x0000000100000000 + 80000de8: 0007b903 ld x18,0(x15) + 80000dec: 00878793 addi x15,x15,8 + +0000000080000df0 : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000000: + aes64ks1i x22, x18, 4 # perform operation + 80000df0: 31491b13 aes64ks1i x22,x18,0x4 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000000, Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 00013203 ld x4,0(x2) + 80000df8: 01620c63 beq x4,x22,80000e10 + 80000dfc: 385012ef jal x5,80002980 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 80009a04 .word 0x80009a04 + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x0000000100000001 + 80000e14: 0007b383 ld x7,0(x15) + 80000e18: 00878793 addi x15,x15,8 + +0000000080000e1c : +Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000001: + aes64ks1i x23, x7, 1 # perform operation + 80000e1c: 31139b93 aes64ks1i x23,x7,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000001, Zkne_aes64ks1i_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 00013203 ld x4,0(x2) + 80000e24: 01720c63 beq x4,x23,80000e3c + 80000e28: 359012ef jal x5,80002980 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009a4a .word 0x80009a4a + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x5aaea48c12c4bfb2 + 80000e40: 0007b003 ld x0,0(x15) + 80000e44: 00878793 addi x15,x15,8 + +0000000080000e48 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b0: + aes64ks1i x0, x0, 8 # perform operation + 80000e48: 31801013 aes64ks1i x0,x0,0x8 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zkne_aes64ks1i_cg_cmp_rd_rs1_b0, Zkne_aes64ks1i_cg_cmp_rd_rs1_b0_str) + 80000e4c: 00013203 ld x4,0(x2) + 80000e50: 00020c63 beq x4,x0,80000e68 + 80000e54: 32d012ef jal x5,80002980 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 80009a90 .word 0x80009a90 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x4693acc81822b4ff + 80000e6c: 0007b083 ld x1,0(x15) + 80000e70: 00878793 addi x15,x15,8 + +0000000080000e74 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b1: + aes64ks1i x1, x1, 8 # perform operation + 80000e74: 31809093 aes64ks1i x1,x1,0x8 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zkne_aes64ks1i_cg_cmp_rd_rs1_b1, Zkne_aes64ks1i_cg_cmp_rd_rs1_b1_str) + 80000e78: 00013203 ld x4,0(x2) + 80000e7c: 00120c63 beq x4,x1,80000e94 + 80000e80: 301012ef jal x5,80002980 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 80009acb .word 0x80009acb + 80000e90: 00000000 .word 0x00000000 + 80000e94: 00810113 addi x2,x2,8 + + mv x25, x2 # switch signature pointer register to avoid conflict with test + 80000e98: 00010c93 addi x25,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x6bffad22e5b55c19 + 80000e9c: 0007b103 ld x2,0(x15) + 80000ea0: 00878793 addi x15,x15,8 + +0000000080000ea4 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b2: + aes64ks1i x2, x2, 3 # perform operation + 80000ea4: 31311113 aes64ks1i x2,x2,0x3 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zkne_aes64ks1i_cg_cmp_rd_rs1_b2, Zkne_aes64ks1i_cg_cmp_rd_rs1_b2_str) + 80000ea8: 000cb203 ld x4,0(x25) + 80000eac: 00220c63 beq x4,x2,80000ec4 + 80000eb0: 2d1012ef jal x5,80002980 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 80009b06 .word 0x80009b06 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x7dcf49e0f42e5a83 + 80000ec8: 0007b183 ld x3,0(x15) + 80000ecc: 00878793 addi x15,x15,8 + +0000000080000ed0 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b3: + aes64ks1i x3, x3, 6 # perform operation + 80000ed0: 31619193 aes64ks1i x3,x3,0x6 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zkne_aes64ks1i_cg_cmp_rd_rs1_b3, Zkne_aes64ks1i_cg_cmp_rd_rs1_b3_str) + 80000ed4: 000cb203 ld x4,0(x25) + 80000ed8: 00320c63 beq x4,x3,80000ef0 + 80000edc: 2a5012ef jal x5,80002980 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80009b41 .word 0x80009b41 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef4: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000ef8: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x19656790b3f2a90d + 80000efc: 0007b203 ld x4,0(x15) + 80000f00: 00878793 addi x15,x15,8 + +0000000080000f04 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b4: + aes64ks1i x4, x4, 4 # perform operation + 80000f04: 31421213 aes64ks1i x4,x4,0x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zkne_aes64ks1i_cg_cmp_rd_rs1_b4, Zkne_aes64ks1i_cg_cmp_rd_rs1_b4_str) + 80000f08: 000cb383 ld x7,0(x25) + 80000f0c: 00438c63 beq x7,x4,80000f24 + 80000f10: 2890146f jal x8,80002998 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 80009b7c .word 0x80009b7c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xf429f6ca9e0827c3 + 80000f28: 0007b283 ld x5,0(x15) + 80000f2c: 00878793 addi x15,x15,8 + +0000000080000f30 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b5: + aes64ks1i x5, x5, 9 # perform operation + 80000f30: 31929293 aes64ks1i x5,x5,0x9 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zkne_aes64ks1i_cg_cmp_rd_rs1_b5, Zkne_aes64ks1i_cg_cmp_rd_rs1_b5_str) + 80000f34: 000cb383 ld x7,0(x25) + 80000f38: 00538c63 beq x7,x5,80000f50 + 80000f3c: 25d0146f jal x8,80002998 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009bb7 .word 0x80009bb7 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x14e7e1f029f53948 + 80000f54: 0007b303 ld x6,0(x15) + 80000f58: 00878793 addi x15,x15,8 + +0000000080000f5c : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b6: + aes64ks1i x6, x6, 7 # perform operation + 80000f5c: 31731313 aes64ks1i x6,x6,0x7 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64ks1i_cg_cmp_rd_rs1_b6, Zkne_aes64ks1i_cg_cmp_rd_rs1_b6_str) + 80000f60: 000cb383 ld x7,0(x25) + 80000f64: 00638c63 beq x7,x6,80000f7c + 80000f68: 2310146f jal x8,80002998 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bf2 .word 0x80009bf2 + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f80: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f84: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0x11bae9b401365d45 + 80000f88: 0007b383 ld x7,0(x15) + 80000f8c: 00878793 addi x15,x15,8 + +0000000080000f90 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b7: + aes64ks1i x7, x7, 9 # perform operation + 80000f90: 31939393 aes64ks1i x7,x7,0x9 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zkne_aes64ks1i_cg_cmp_rd_rs1_b7, Zkne_aes64ks1i_cg_cmp_rd_rs1_b7_str) + 80000f94: 000cb203 ld x4,0(x25) + 80000f98: 00720c63 beq x4,x7,80000fb0 + 80000f9c: 1e5012ef jal x5,80002980 + 80000fa0: 80000f90 .word 0x80000f90 + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 80009c2d .word 0x80009c2d + 80000fac: 00000000 .word 0x00000000 + 80000fb0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x3b6ab331cc703811 + 80000fb4: 0007b403 ld x8,0(x15) + 80000fb8: 00878793 addi x15,x15,8 + +0000000080000fbc : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b8: + aes64ks1i x8, x8, 1 # perform operation + 80000fbc: 31141413 aes64ks1i x8,x8,0x1 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zkne_aes64ks1i_cg_cmp_rd_rs1_b8, Zkne_aes64ks1i_cg_cmp_rd_rs1_b8_str) + 80000fc0: 000cb203 ld x4,0(x25) + 80000fc4: 00820c63 beq x4,x8,80000fdc + 80000fc8: 1b9012ef jal x5,80002980 + 80000fcc: 80000fbc .word 0x80000fbc + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 80009c68 .word 0x80009c68 + 80000fd8: 00000000 .word 0x00000000 + 80000fdc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xc625bf6720af94a3 + 80000fe0: 0007b483 ld x9,0(x15) + 80000fe4: 00878793 addi x15,x15,8 + +0000000080000fe8 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b9: + aes64ks1i x9, x9, 5 # perform operation + 80000fe8: 31549493 aes64ks1i x9,x9,0x5 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zkne_aes64ks1i_cg_cmp_rd_rs1_b9, Zkne_aes64ks1i_cg_cmp_rd_rs1_b9_str) + 80000fec: 000cb203 ld x4,0(x25) + 80000ff0: 00920c63 beq x4,x9,80001008 + 80000ff4: 18d012ef jal x5,80002980 + 80000ff8: 80000fe8 .word 0x80000fe8 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 80009ca3 .word 0x80009ca3 + 80001004: 00000000 .word 0x00000000 + 80001008: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x62eca1f20053f084 + 8000100c: 0007b503 ld x10,0(x15) + 80001010: 00878793 addi x15,x15,8 + +0000000080001014 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b10: + aes64ks1i x10, x10, 5 # perform operation + 80001014: 31551513 aes64ks1i x10,x10,0x5 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zkne_aes64ks1i_cg_cmp_rd_rs1_b10, Zkne_aes64ks1i_cg_cmp_rd_rs1_b10_str) + 80001018: 000cb203 ld x4,0(x25) + 8000101c: 00a20c63 beq x4,x10,80001034 + 80001020: 161012ef jal x5,80002980 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80009cde .word 0x80009cde + 80001030: 00000000 .word 0x00000000 + 80001034: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xbfe5f5182cb3f0b2 + 80001038: 0007b583 ld x11,0(x15) + 8000103c: 00878793 addi x15,x15,8 + +0000000080001040 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b11: + aes64ks1i x11, x11, 2 # perform operation + 80001040: 31259593 aes64ks1i x11,x11,0x2 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zkne_aes64ks1i_cg_cmp_rd_rs1_b11, Zkne_aes64ks1i_cg_cmp_rd_rs1_b11_str) + 80001044: 000cb203 ld x4,0(x25) + 80001048: 00b20c63 beq x4,x11,80001060 + 8000104c: 135012ef jal x5,80002980 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009d1a .word 0x80009d1a + 8000105c: 00000000 .word 0x00000000 + 80001060: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x882e6537b9306fc4 + 80001064: 0007b603 ld x12,0(x15) + 80001068: 00878793 addi x15,x15,8 + +000000008000106c : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b12: + aes64ks1i x12, x12, 6 # perform operation + 8000106c: 31661613 aes64ks1i x12,x12,0x6 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zkne_aes64ks1i_cg_cmp_rd_rs1_b12, Zkne_aes64ks1i_cg_cmp_rd_rs1_b12_str) + 80001070: 000cb203 ld x4,0(x25) + 80001074: 00c20c63 beq x4,x12,8000108c + 80001078: 109012ef jal x5,80002980 + 8000107c: 8000106c .word 0x8000106c + 80001080: 00000000 .word 0x00000000 + 80001084: 80009d56 .word 0x80009d56 + 80001088: 00000000 .word 0x00000000 + 8000108c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x1df98ded8910fe80 + 80001090: 0007b683 ld x13,0(x15) + 80001094: 00878793 addi x15,x15,8 + +0000000080001098 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b13: + aes64ks1i x13, x13, 10 # perform operation + 80001098: 31a69693 aes64ks1i x13,x13,0xa + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zkne_aes64ks1i_cg_cmp_rd_rs1_b13, Zkne_aes64ks1i_cg_cmp_rd_rs1_b13_str) + 8000109c: 000cb203 ld x4,0(x25) + 800010a0: 00d20c63 beq x4,x13,800010b8 + 800010a4: 0dd012ef jal x5,80002980 + 800010a8: 80001098 .word 0x80001098 + 800010ac: 00000000 .word 0x00000000 + 800010b0: 80009d92 .word 0x80009d92 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xa56a8fde6377c8e2 + 800010bc: 0007b703 ld x14,0(x15) + 800010c0: 00878793 addi x15,x15,8 + +00000000800010c4 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b14: + aes64ks1i x14, x14, 6 # perform operation + 800010c4: 31671713 aes64ks1i x14,x14,0x6 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes64ks1i_cg_cmp_rd_rs1_b14, Zkne_aes64ks1i_cg_cmp_rd_rs1_b14_str) + 800010c8: 000cb203 ld x4,0(x25) + 800010cc: 00e20c63 beq x4,x14,800010e4 + 800010d0: 0b1012ef jal x5,80002980 + 800010d4: 800010c4 .word 0x800010c4 + 800010d8: 00000000 .word 0x00000000 + 800010dc: 80009dce .word 0x80009dce + 800010e0: 00000000 .word 0x00000000 + 800010e4: 008c8c93 addi x25,x25,8 + + mv x21, x15 # switch data pointer register to avoid conflict with test + 800010e8: 00078a93 addi x21,x15,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x02408f8d8a5de6e3 + 800010ec: 000ab783 ld x15,0(x21) + 800010f0: 008a8a93 addi x21,x21,8 + +00000000800010f4 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b15: + aes64ks1i x15, x15, 2 # perform operation + 800010f4: 31279793 aes64ks1i x15,x15,0x2 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zkne_aes64ks1i_cg_cmp_rd_rs1_b15, Zkne_aes64ks1i_cg_cmp_rd_rs1_b15_str) + 800010f8: 000cb203 ld x4,0(x25) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 081012ef jal x5,80002980 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e0a .word 0x80009e0a + 80001110: 00000000 .word 0x00000000 + 80001114: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x1df9fcfd65f384a9 + 80001118: 000ab803 ld x16,0(x21) + 8000111c: 008a8a93 addi x21,x21,8 + +0000000080001120 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b16: + aes64ks1i x16, x16, 0 # perform operation + 80001120: 31081813 aes64ks1i x16,x16,0x0 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zkne_aes64ks1i_cg_cmp_rd_rs1_b16, Zkne_aes64ks1i_cg_cmp_rd_rs1_b16_str) + 80001124: 000cb203 ld x4,0(x25) + 80001128: 01020c63 beq x4,x16,80001140 + 8000112c: 055012ef jal x5,80002980 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 80009e46 .word 0x80009e46 + 8000113c: 00000000 .word 0x00000000 + 80001140: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x284e6e643ca1b6a6 + 80001144: 000ab883 ld x17,0(x21) + 80001148: 008a8a93 addi x21,x21,8 + +000000008000114c : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b17: + aes64ks1i x17, x17, 9 # perform operation + 8000114c: 31989893 aes64ks1i x17,x17,0x9 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes64ks1i_cg_cmp_rd_rs1_b17, Zkne_aes64ks1i_cg_cmp_rd_rs1_b17_str) + 80001150: 000cb203 ld x4,0(x25) + 80001154: 01120c63 beq x4,x17,8000116c + 80001158: 029012ef jal x5,80002980 + 8000115c: 8000114c .word 0x8000114c + 80001160: 00000000 .word 0x00000000 + 80001164: 80009e82 .word 0x80009e82 + 80001168: 00000000 .word 0x00000000 + 8000116c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x947dc29303914db9 + 80001170: 000ab903 ld x18,0(x21) + 80001174: 008a8a93 addi x21,x21,8 + +0000000080001178 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b18: + aes64ks1i x18, x18, 2 # perform operation + 80001178: 31291913 aes64ks1i x18,x18,0x2 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zkne_aes64ks1i_cg_cmp_rd_rs1_b18, Zkne_aes64ks1i_cg_cmp_rd_rs1_b18_str) + 8000117c: 000cb203 ld x4,0(x25) + 80001180: 01220c63 beq x4,x18,80001198 + 80001184: 7fc012ef jal x5,80002980 + 80001188: 80001178 .word 0x80001178 + 8000118c: 00000000 .word 0x00000000 + 80001190: 80009ebe .word 0x80009ebe + 80001194: 00000000 .word 0x00000000 + 80001198: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xc3d97cb5ab270b03 + 8000119c: 000ab983 ld x19,0(x21) + 800011a0: 008a8a93 addi x21,x21,8 + +00000000800011a4 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b19: + aes64ks1i x19, x19, 3 # perform operation + 800011a4: 31399993 aes64ks1i x19,x19,0x3 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes64ks1i_cg_cmp_rd_rs1_b19, Zkne_aes64ks1i_cg_cmp_rd_rs1_b19_str) + 800011a8: 000cb203 ld x4,0(x25) + 800011ac: 01320c63 beq x4,x19,800011c4 + 800011b0: 7d0012ef jal x5,80002980 + 800011b4: 800011a4 .word 0x800011a4 + 800011b8: 00000000 .word 0x00000000 + 800011bc: 80009efa .word 0x80009efa + 800011c0: 00000000 .word 0x00000000 + 800011c4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x3ca62d9b73e9bfe6 + 800011c8: 000aba03 ld x20,0(x21) + 800011cc: 008a8a93 addi x21,x21,8 + +00000000800011d0 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b20: + aes64ks1i x20, x20, 5 # perform operation + 800011d0: 315a1a13 aes64ks1i x20,x20,0x5 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zkne_aes64ks1i_cg_cmp_rd_rs1_b20, Zkne_aes64ks1i_cg_cmp_rd_rs1_b20_str) + 800011d4: 000cb203 ld x4,0(x25) + 800011d8: 01420c63 beq x4,x20,800011f0 + 800011dc: 7a4012ef jal x5,80002980 + 800011e0: 800011d0 .word 0x800011d0 + 800011e4: 00000000 .word 0x00000000 + 800011e8: 80009f37 .word 0x80009f37 + 800011ec: 00000000 .word 0x00000000 + 800011f0: 008c8c93 addi x25,x25,8 + + mv x31, x21 # switch data pointer register to avoid conflict with test + 800011f4: 000a8f93 addi x31,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0xb623909821bf7f76 + 800011f8: 000fba83 ld x21,0(x31) + 800011fc: 008f8f93 addi x31,x31,8 + +0000000080001200 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b21: + aes64ks1i x21, x21, 9 # perform operation + 80001200: 319a9a93 aes64ks1i x21,x21,0x9 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zkne_aes64ks1i_cg_cmp_rd_rs1_b21, Zkne_aes64ks1i_cg_cmp_rd_rs1_b21_str) + 80001204: 000cb203 ld x4,0(x25) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 774012ef jal x5,80002980 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f74 .word 0x80009f74 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0x19fee6670abfcb07 + 80001224: 000fbb03 ld x22,0(x31) + 80001228: 008f8f93 addi x31,x31,8 + +000000008000122c : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b22: + aes64ks1i x22, x22, 2 # perform operation + 8000122c: 312b1b13 aes64ks1i x22,x22,0x2 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes64ks1i_cg_cmp_rd_rs1_b22, Zkne_aes64ks1i_cg_cmp_rd_rs1_b22_str) + 80001230: 000cb203 ld x4,0(x25) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 748012ef jal x5,80002980 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fb1 .word 0x80009fb1 + 80001248: 00000000 .word 0x00000000 + 8000124c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0x529ea7adec3a03a5 + 80001250: 000fbb83 ld x23,0(x31) + 80001254: 008f8f93 addi x31,x31,8 + +0000000080001258 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b23: + aes64ks1i x23, x23, 0 # perform operation + 80001258: 310b9b93 aes64ks1i x23,x23,0x0 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zkne_aes64ks1i_cg_cmp_rd_rs1_b23, Zkne_aes64ks1i_cg_cmp_rd_rs1_b23_str) + 8000125c: 000cb203 ld x4,0(x25) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 71c012ef jal x5,80002980 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009fee .word 0x80009fee + 80001274: 00000000 .word 0x00000000 + 80001278: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x9ab8de4c584ed532 + 8000127c: 000fbc03 ld x24,0(x31) + 80001280: 008f8f93 addi x31,x31,8 + +0000000080001284 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b24: + aes64ks1i x24, x24, 10 # perform operation + 80001284: 31ac1c13 aes64ks1i x24,x24,0xa + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes64ks1i_cg_cmp_rd_rs1_b24, Zkne_aes64ks1i_cg_cmp_rd_rs1_b24_str) + 80001288: 000cb203 ld x4,0(x25) + 8000128c: 01820c63 beq x4,x24,800012a4 + 80001290: 6f0012ef jal x5,80002980 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000a02b .word 0x8000a02b + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008c8c93 addi x25,x25,8 + + mv x16, x25 # switch signature pointer register to avoid conflict with test + 800012a8: 000c8813 addi x16,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0xaaf8b188de588526 + 800012ac: 000fbc83 ld x25,0(x31) + 800012b0: 008f8f93 addi x31,x31,8 + +00000000800012b4 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b25: + aes64ks1i x25, x25, 2 # perform operation + 800012b4: 312c9c93 aes64ks1i x25,x25,0x2 + # Check if x25 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x25, Zkne_aes64ks1i_cg_cmp_rd_rs1_b25, Zkne_aes64ks1i_cg_cmp_rd_rs1_b25_str) + 800012b8: 00083203 ld x4,0(x16) + 800012bc: 01920c63 beq x4,x25,800012d4 + 800012c0: 6c0012ef jal x5,80002980 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 8000a068 .word 0x8000a068 + 800012d0: 00000000 .word 0x00000000 + 800012d4: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x2af5cd725e4c7a56 + 800012d8: 000fbd03 ld x26,0(x31) + 800012dc: 008f8f93 addi x31,x31,8 + +00000000800012e0 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b26: + aes64ks1i x26, x26, 2 # perform operation + 800012e0: 312d1d13 aes64ks1i x26,x26,0x2 + # Check if x26 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x26, Zkne_aes64ks1i_cg_cmp_rd_rs1_b26, Zkne_aes64ks1i_cg_cmp_rd_rs1_b26_str) + 800012e4: 00083203 ld x4,0(x16) + 800012e8: 01a20c63 beq x4,x26,80001300 + 800012ec: 694012ef jal x5,80002980 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0a5 .word 0x8000a0a5 + 800012fc: 00000000 .word 0x00000000 + 80001300: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xef111543fce81865 + 80001304: 000fbd83 ld x27,0(x31) + 80001308: 008f8f93 addi x31,x31,8 + +000000008000130c : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b27: + aes64ks1i x27, x27, 0 # perform operation + 8000130c: 310d9d93 aes64ks1i x27,x27,0x0 + # Check if x27 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x27, Zkne_aes64ks1i_cg_cmp_rd_rs1_b27, Zkne_aes64ks1i_cg_cmp_rd_rs1_b27_str) + 80001310: 00083203 ld x4,0(x16) + 80001314: 01b20c63 beq x4,x27,8000132c + 80001318: 668012ef jal x5,80002980 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0e2 .word 0x8000a0e2 + 80001328: 00000000 .word 0x00000000 + 8000132c: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x742bf4ec0afef81c + 80001330: 000fbe03 ld x28,0(x31) + 80001334: 008f8f93 addi x31,x31,8 + +0000000080001338 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b28: + aes64ks1i x28, x28, 1 # perform operation + 80001338: 311e1e13 aes64ks1i x28,x28,0x1 + # Check if x28 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x28, Zkne_aes64ks1i_cg_cmp_rd_rs1_b28, Zkne_aes64ks1i_cg_cmp_rd_rs1_b28_str) + 8000133c: 00083203 ld x4,0(x16) + 80001340: 01c20c63 beq x4,x28,80001358 + 80001344: 63c012ef jal x5,80002980 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a11f .word 0x8000a11f + 80001354: 00000000 .word 0x00000000 + 80001358: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0x62a8a533f026e74c + 8000135c: 000fbe83 ld x29,0(x31) + 80001360: 008f8f93 addi x31,x31,8 + +0000000080001364 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b29: + aes64ks1i x29, x29, 8 # perform operation + 80001364: 318e9e93 aes64ks1i x29,x29,0x8 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64ks1i_cg_cmp_rd_rs1_b29, Zkne_aes64ks1i_cg_cmp_rd_rs1_b29_str) + 80001368: 00083203 ld x4,0(x16) + 8000136c: 01d20c63 beq x4,x29,80001384 + 80001370: 610012ef jal x5,80002980 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000a15c .word 0x8000a15c + 80001380: 00000000 .word 0x00000000 + 80001384: 00880813 addi x16,x16,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0x2009125954053447 + 80001388: 000fbf03 ld x30,0(x31) + 8000138c: 008f8f93 addi x31,x31,8 + +0000000080001390 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b30: + aes64ks1i x30, x30, 1 # perform operation + 80001390: 311f1f13 aes64ks1i x30,x30,0x1 + # Check if x30 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x30, Zkne_aes64ks1i_cg_cmp_rd_rs1_b30, Zkne_aes64ks1i_cg_cmp_rd_rs1_b30_str) + 80001394: 00083203 ld x4,0(x16) + 80001398: 01e20c63 beq x4,x30,800013b0 + 8000139c: 5e4012ef jal x5,80002980 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000a199 .word 0x8000a199 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00880813 addi x16,x16,8 + + mv x3, x31 # switch data pointer register to avoid conflict with test + 800013b4: 000f8193 addi x3,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x46e8dc908c699c12 + 800013b8: 0001bf83 ld x31,0(x3) + 800013bc: 00818193 addi x3,x3,8 + +00000000800013c0 : +Zkne_aes64ks1i_cg_cmp_rd_rs1_b31: + aes64ks1i x31, x31, 6 # perform operation + 800013c0: 316f9f93 aes64ks1i x31,x31,0x6 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64ks1i_cg_cmp_rd_rs1_b31, Zkne_aes64ks1i_cg_cmp_rd_rs1_b31_str) + 800013c4: 00083203 ld x4,0(x16) + 800013c8: 01f20c63 beq x4,x31,800013e0 + 800013cc: 5b4012ef jal x5,80002980 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000a1d6 .word 0x8000a1d6 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00880813 addi x16,x16,8 +///////////////////////////////// +// cp_rnum +///////////////////////////////// + +# Testcase cp_rnum: rnum=0 + RVTEST_TESTDATA_LOAD_INT(x3, x6) # load rs1: x6 = 0x4bd0c82b37139fa8 + 800013e4: 0001b303 ld x6,0(x3) + 800013e8: 00818193 addi x3,x3,8 + +00000000800013ec : +Zkne_aes64ks1i_cg_cp_rnum_b0: + aes64ks1i x29, x6, 0 # perform operation + 800013ec: 31031e93 aes64ks1i x29,x6,0x0 + # Check if x29 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x29, Zkne_aes64ks1i_cg_cp_rnum_b0, Zkne_aes64ks1i_cg_cp_rnum_b0_str) + 800013f0: 00083203 ld x4,0(x16) + 800013f4: 01d20c63 beq x4,x29,8000140c + 800013f8: 588012ef jal x5,80002980 + 800013fc: 800013ec .word 0x800013ec + 80001400: 00000000 .word 0x00000000 + 80001404: 8000a213 .word 0x8000a213 + 80001408: 00000000 .word 0x00000000 + 8000140c: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=1 + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x790b155b0167264c + 80001410: 0001b083 ld x1,0(x3) + 80001414: 00818193 addi x3,x3,8 + +0000000080001418 : +Zkne_aes64ks1i_cg_cp_rnum_b1: + aes64ks1i x21, x1, 1 # perform operation + 80001418: 31109a93 aes64ks1i x21,x1,0x1 + # Check if x21 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x21, Zkne_aes64ks1i_cg_cp_rnum_b1, Zkne_aes64ks1i_cg_cp_rnum_b1_str) + 8000141c: 00083203 ld x4,0(x16) + 80001420: 01520c63 beq x4,x21,80001438 + 80001424: 55c012ef jal x5,80002980 + 80001428: 80001418 .word 0x80001418 + 8000142c: 00000000 .word 0x00000000 + 80001430: 8000a24c .word 0x8000a24c + 80001434: 00000000 .word 0x00000000 + 80001438: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=2 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xed8c4684e211d2ed + 8000143c: 0001bc83 ld x25,0(x3) + 80001440: 00818193 addi x3,x3,8 + +0000000080001444 : +Zkne_aes64ks1i_cg_cp_rnum_b2: + aes64ks1i x22, x25, 2 # perform operation + 80001444: 312c9b13 aes64ks1i x22,x25,0x2 + # Check if x22 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x22, Zkne_aes64ks1i_cg_cp_rnum_b2, Zkne_aes64ks1i_cg_cp_rnum_b2_str) + 80001448: 00083203 ld x4,0(x16) + 8000144c: 01620c63 beq x4,x22,80001464 + 80001450: 530012ef jal x5,80002980 + 80001454: 80001444 .word 0x80001444 + 80001458: 00000000 .word 0x00000000 + 8000145c: 8000a285 .word 0x8000a285 + 80001460: 00000000 .word 0x00000000 + 80001464: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=3 + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0xaa6982ba4a758dc2 + 80001468: 0001b483 ld x9,0(x3) + 8000146c: 00818193 addi x3,x3,8 + +0000000080001470 : +Zkne_aes64ks1i_cg_cp_rnum_b3: + aes64ks1i x19, x9, 3 # perform operation + 80001470: 31349993 aes64ks1i x19,x9,0x3 + # Check if x19 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x19, Zkne_aes64ks1i_cg_cp_rnum_b3, Zkne_aes64ks1i_cg_cp_rnum_b3_str) + 80001474: 00083203 ld x4,0(x16) + 80001478: 01320c63 beq x4,x19,80001490 + 8000147c: 504012ef jal x5,80002980 + 80001480: 80001470 .word 0x80001470 + 80001484: 00000000 .word 0x00000000 + 80001488: 8000a2be .word 0x8000a2be + 8000148c: 00000000 .word 0x00000000 + 80001490: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=4 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0xe9bfe18a2b30a930 + 80001494: 0001b603 ld x12,0(x3) + 80001498: 00818193 addi x3,x3,8 + +000000008000149c : +Zkne_aes64ks1i_cg_cp_rnum_b4: + aes64ks1i x15, x12, 4 # perform operation + 8000149c: 31461793 aes64ks1i x15,x12,0x4 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zkne_aes64ks1i_cg_cp_rnum_b4, Zkne_aes64ks1i_cg_cp_rnum_b4_str) + 800014a0: 00083203 ld x4,0(x16) + 800014a4: 00f20c63 beq x4,x15,800014bc + 800014a8: 4d8012ef jal x5,80002980 + 800014ac: 8000149c .word 0x8000149c + 800014b0: 00000000 .word 0x00000000 + 800014b4: 8000a2f7 .word 0x8000a2f7 + 800014b8: 00000000 .word 0x00000000 + 800014bc: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=5 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x627a06faa93a2abb + 800014c0: 0001bb03 ld x22,0(x3) + 800014c4: 00818193 addi x3,x3,8 + +00000000800014c8 : +Zkne_aes64ks1i_cg_cp_rnum_b5: + aes64ks1i x31, x22, 5 # perform operation + 800014c8: 315b1f93 aes64ks1i x31,x22,0x5 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zkne_aes64ks1i_cg_cp_rnum_b5, Zkne_aes64ks1i_cg_cp_rnum_b5_str) + 800014cc: 00083203 ld x4,0(x16) + 800014d0: 01f20c63 beq x4,x31,800014e8 + 800014d4: 4ac012ef jal x5,80002980 + 800014d8: 800014c8 .word 0x800014c8 + 800014dc: 00000000 .word 0x00000000 + 800014e0: 8000a330 .word 0x8000a330 + 800014e4: 00000000 .word 0x00000000 + 800014e8: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=6 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x14190e10234b251d + 800014ec: 0001ba83 ld x21,0(x3) + 800014f0: 00818193 addi x3,x3,8 + +00000000800014f4 : +Zkne_aes64ks1i_cg_cp_rnum_b6: + aes64ks1i x12, x21, 6 # perform operation + 800014f4: 316a9613 aes64ks1i x12,x21,0x6 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zkne_aes64ks1i_cg_cp_rnum_b6, Zkne_aes64ks1i_cg_cp_rnum_b6_str) + 800014f8: 00083203 ld x4,0(x16) + 800014fc: 00c20c63 beq x4,x12,80001514 + 80001500: 480012ef jal x5,80002980 + 80001504: 800014f4 .word 0x800014f4 + 80001508: 00000000 .word 0x00000000 + 8000150c: 8000a369 .word 0x8000a369 + 80001510: 00000000 .word 0x00000000 + 80001514: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=7 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0xe7ec2f681c3f19ca + 80001518: 0001ba83 ld x21,0(x3) + 8000151c: 00818193 addi x3,x3,8 + +0000000080001520 : +Zkne_aes64ks1i_cg_cp_rnum_b7: + aes64ks1i x0, x21, 7 # perform operation + 80001520: 317a9013 aes64ks1i x0,x21,0x7 + # Check if x0 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x0, Zkne_aes64ks1i_cg_cp_rnum_b7, Zkne_aes64ks1i_cg_cp_rnum_b7_str) + 80001524: 00083203 ld x4,0(x16) + 80001528: 00020c63 beq x4,x0,80001540 + 8000152c: 454012ef jal x5,80002980 + 80001530: 80001520 .word 0x80001520 + 80001534: 00000000 .word 0x00000000 + 80001538: 8000a3a2 .word 0x8000a3a2 + 8000153c: 00000000 .word 0x00000000 + 80001540: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x688b71252c03b182 + 80001544: 0001bd03 ld x26,0(x3) + 80001548: 00818193 addi x3,x3,8 + +000000008000154c : +Zkne_aes64ks1i_cg_cp_rnum_b8: + aes64ks1i x2, x26, 8 # perform operation + 8000154c: 318d1113 aes64ks1i x2,x26,0x8 + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64ks1i_cg_cp_rnum_b8, Zkne_aes64ks1i_cg_cp_rnum_b8_str) + 80001550: 00083203 ld x4,0(x16) + 80001554: 00220c63 beq x4,x2,8000156c + 80001558: 428012ef jal x5,80002980 + 8000155c: 8000154c .word 0x8000154c + 80001560: 00000000 .word 0x00000000 + 80001564: 8000a3db .word 0x8000a3db + 80001568: 00000000 .word 0x00000000 + 8000156c: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=9 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xf5414f06a265a6b6 + 80001570: 0001ba03 ld x20,0(x3) + 80001574: 00818193 addi x3,x3,8 + +0000000080001578 : +Zkne_aes64ks1i_cg_cp_rnum_b9: + aes64ks1i x18, x20, 9 # perform operation + 80001578: 319a1913 aes64ks1i x18,x20,0x9 + # Check if x18 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x18, Zkne_aes64ks1i_cg_cp_rnum_b9, Zkne_aes64ks1i_cg_cp_rnum_b9_str) + 8000157c: 00083203 ld x4,0(x16) + 80001580: 01220c63 beq x4,x18,80001598 + 80001584: 3fc012ef jal x5,80002980 + 80001588: 80001578 .word 0x80001578 + 8000158c: 00000000 .word 0x00000000 + 80001590: 8000a414 .word 0x8000a414 + 80001594: 00000000 .word 0x00000000 + 80001598: 00880813 addi x16,x16,8 + +# Testcase cp_rnum: rnum=10 + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x6f135407eb2e44e5 + 8000159c: 0001b503 ld x10,0(x3) + 800015a0: 00818193 addi x3,x3,8 + +00000000800015a4 : +Zkne_aes64ks1i_cg_cp_rnum_b10: + aes64ks1i x2, x10, 10 # perform operation + 800015a4: 31a51113 aes64ks1i x2,x10,0xa + # Check if x2 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x2, Zkne_aes64ks1i_cg_cp_rnum_b10, Zkne_aes64ks1i_cg_cp_rnum_b10_str) + 800015a8: 00083203 ld x4,0(x16) + 800015ac: 00220c63 beq x4,x2,800015c4 + 800015b0: 3d0012ef jal x5,80002980 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000a44d .word 0x8000a44d + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00880813 addi x16,x16,8 + + mv x2, x16 # restore signature pointer to default register for teardown + 800015c8: 00080113 addi x2,x16,0 + +00000000800015cc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800015cc: 00000513 addi x10,x0,0 + 800015d0: 00000073 ecall + 800015d4: fff00513 addi x10,x0,-1 + 800015d8: 25800413 addi x8,x0,600 + +00000000800015dc : + 800015dc: 34002373 csrrs x6,mscratch,x0 + +00000000800015e0 : + 800015e0: 2b833383 ld x7,696(x6) + +00000000800015e4 : + 800015e4: 2a033383 ld x7,672(x6) + +00000000800015e8 : + 800015e8: 2d033483 ld x9,720(x6) + 800015ec: 34049073 csrrw x0,mscratch,x9 + +00000000800015f0 : + 800015f0: 2c833483 ld x9,712(x6) + 800015f4: 305493f3 csrrw x7,mtvec,x9 + 800015f8: ffc4f493 andi x9,x9,-4 + 800015fc: ffc3f393 andi x7,x7,-4 + 80001600: 00749e63 bne x9,x7,8000161c + +0000000080001604 : + 80001604: 00030493 addi x9,x6,0 + +0000000080001608 : + 80001608: 0004a783 lw x15,0(x9) + 8000160c: 00f3a023 sw x15,0(x7) + 80001610: 00438393 addi x7,x7,4 + 80001614: 00448493 addi x9,x9,4 + 80001618: fe83c8e3 blt x7,x8,80001608 + 8000161c: 0000100f fence.i + +0000000080001620 : + 80001620: 00000497 auipc x9,0x0 + 80001624: 2b048493 addi x9,x9,688 # 800018d0 + 80001628: 00000013 addi x0,x0,0 + 8000162c: 00000013 addi x0,x0,0 + 80001630: 00000013 addi x0,x0,0 + 80001634: 00000013 addi x0,x0,0 + 80001638: 00000013 addi x0,x0,0 + 8000163c: 00000013 addi x0,x0,0 + 80001640: 10e49863 bne x9,x14,80001750 + 80001644: 00000013 addi x0,x0,0 + 80001648: 00000013 addi x0,x0,0 + 8000164c: 00000013 addi x0,x0,0 + 80001650: 00000013 addi x0,x0,0 + 80001654: 00000013 addi x0,x0,0 + 80001658: 00000013 addi x0,x0,0 + 8000165c: 00000013 addi x0,x0,0 + 80001660: 00009517 auipc x10,0x9 + 80001664: 55350513 addi x10,x10,1363 # 8000abb3 + 80001668: 00000013 addi x0,x0,0 + 8000166c: 00000013 addi x0,x0,0 + 80001670: 00000013 addi x0,x0,0 + 80001674: 00000013 addi x0,x0,0 + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00029097 auipc x1,0x29 + 80001684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00009517 auipc x10,0x9 + 800016a4: 55150513 addi x10,x10,1361 # 8000abf1 + 800016a8: 00000013 addi x0,x0,0 + 800016ac: 00000013 addi x0,x0,0 + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00029097 auipc x1,0x29 + 800016c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00009517 auipc x10,0x9 + 800016e4: 57150513 addi x10,x10,1393 # 8000ac51 + 800016e8: 00000013 addi x0,x0,0 + 800016ec: 00000013 addi x0,x0,0 + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00029097 auipc x1,0x29 + 80001704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: 0000a517 auipc x10,0xa + 80001724: 0dc50513 addi x10,x10,220 # 8000b7fc + 80001728: 00000013 addi x0,x0,0 + 8000172c: 00000013 addi x0,x0,0 + 80001730: 00000013 addi x0,x0,0 + 80001734: 00000013 addi x0,x0,0 + 80001738: 00000013 addi x0,x0,0 + 8000173c: 00000013 addi x0,x0,0 + 80001740: 00029097 auipc x1,0x29 + 80001744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80001748: 00029097 auipc x1,0x29 + 8000174c: ebc080e7 jalr x1,-324(x1) # 8002a604 + +0000000080001750 : + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00007317 auipc x6,0x7 + 80001764: c4830313 addi x6,x6,-952 # 800083a8 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + 80001780: 00033303 ld x6,0(x6) + 80001784: 00000013 addi x0,x0,0 + 80001788: 00000013 addi x0,x0,0 + 8000178c: 00000013 addi x0,x0,0 + 80001790: 00000013 addi x0,x0,0 + 80001794: 00000013 addi x0,x0,0 + 80001798: 00000013 addi x0,x0,0 + 8000179c: 00000013 addi x0,x0,0 + 800017a0: 0000b397 auipc x7,0xb + 800017a4: f2838393 addi x7,x7,-216 # 8000c6c8 + 800017a8: 00000013 addi x0,x0,0 + 800017ac: 00000013 addi x0,x0,0 + 800017b0: 00000013 addi x0,x0,0 + 800017b4: 00000013 addi x0,x0,0 + 800017b8: 00000013 addi x0,x0,0 + 800017bc: 00000013 addi x0,x0,0 + 800017c0: 40730333 sub x6,x6,x7 + 800017c4: 00000013 addi x0,x0,0 + 800017c8: 00000013 addi x0,x0,0 + 800017cc: 00000013 addi x0,x0,0 + 800017d0: 00000013 addi x0,x0,0 + 800017d4: 00000013 addi x0,x0,0 + 800017d8: 00000013 addi x0,x0,0 + 800017dc: 00000013 addi x0,x0,0 + 800017e0: 0000b417 auipc x8,0xb + 800017e4: ed840413 addi x8,x8,-296 # 8000c6b8 + 800017e8: 00000013 addi x0,x0,0 + 800017ec: 00000013 addi x0,x0,0 + 800017f0: 00000013 addi x0,x0,0 + 800017f4: 00000013 addi x0,x0,0 + 800017f8: 00000013 addi x0,x0,0 + 800017fc: 00000013 addi x0,x0,0 + 80001800: 00043203 ld x4,0(x8) + 80001804: 00620c63 beq x4,x6,8000181c + 80001808: 1e0013ef jal x7,800029e8 + 8000180c: 80001750 .word 0x80001750 + 80001810: 00000000 .word 0x00000000 + 80001814: 8000ada5 .word 0x8000ada5 + 80001818: 00000000 .word 0x00000000 + +000000008000181c : + 8000181c: 000004b7 lui x9,0x0 + 80001820: 00048493 addi x9,x9,0 # 0 + 80001824: 00b49493 slli x9,x9,0xb + 80001828: 5d648493 addi x9,x9,1494 + 8000182c: 00b49493 slli x9,x9,0xb + 80001830: 43748493 addi x9,x9,1079 + 80001834: 00a49493 slli x9,x9,0xa + 80001838: 2ad48493 addi x9,x9,685 + 8000183c: 00e49e63 bne x9,x14,80001858 + 80001840: 1a8013ef jal x7,800029e8 + 80001844: 80001904 .word 0x80001904 + 80001848: 00000000 .word 0x00000000 + 8000184c: 8000ac13 .word 0x8000ac13 + 80001850: 00000000 .word 0x00000000 + 80001854: 00000341 .word 0x00000341 + +0000000080001858 : + 80001858: 00000013 addi x0,x0,0 + 8000185c: 00000013 addi x0,x0,0 + 80001860: 00009517 auipc x10,0x9 + 80001864: 31450513 addi x10,x10,788 # 8000ab74 + 80001868: 00000013 addi x0,x0,0 + 8000186c: 00000013 addi x0,x0,0 + 80001870: 00000013 addi x0,x0,0 + 80001874: 00000013 addi x0,x0,0 + 80001878: 00000013 addi x0,x0,0 + 8000187c: 00000013 addi x0,x0,0 + 80001880: 00029097 auipc x1,0x29 + 80001884: d24080e7 jalr x1,-732(x1) # 8002a5a4 + 80001888: 00029097 auipc x1,0x29 + 8000188c: d5c080e7 jalr x1,-676(x1) # 8002a5e4 + +0000000080001890 : + 80001890: 00000013 addi x0,x0,0 + 80001894: 00000013 addi x0,x0,0 + 80001898: 00000013 addi x0,x0,0 + 8000189c: 00000013 addi x0,x0,0 + 800018a0: 00009517 auipc x10,0x9 + 800018a4: 31350513 addi x10,x10,787 # 8000abb3 + 800018a8: 00000013 addi x0,x0,0 + 800018ac: 00000013 addi x0,x0,0 + 800018b0: 00000013 addi x0,x0,0 + 800018b4: 00000013 addi x0,x0,0 + 800018b8: 00000013 addi x0,x0,0 + 800018bc: 00000013 addi x0,x0,0 + 800018c0: 00029097 auipc x1,0x29 + 800018c4: ce4080e7 jalr x1,-796(x1) # 8002a5a4 + 800018c8: 00029097 auipc x1,0x29 + 800018cc: d3c080e7 jalr x1,-708(x1) # 8002a604 + +00000000800018d0 : + 800018d0: 00000013 addi x0,x0,0 + 800018d4: 00000013 addi x0,x0,0 + 800018d8: 00000013 addi x0,x0,0 + 800018dc: 00000013 addi x0,x0,0 + 800018e0: 00000717 auipc x14,0x0 + 800018e4: ff070713 addi x14,x14,-16 # 800018d0 + 800018e8: 00000013 addi x0,x0,0 + 800018ec: 00000013 addi x0,x0,0 + 800018f0: 00000013 addi x0,x0,0 + 800018f4: 00000013 addi x0,x0,0 + 800018f8: 00000013 addi x0,x0,0 + 800018fc: 00000013 addi x0,x0,0 + 80001900: ccdff06f jal x0,800015cc + +0000000080001904 : + 80001904: 00000737 lui x14,0x0 + 80001908: 00070713 addi x14,x14,0 # 0 + 8000190c: 00b71713 slli x14,x14,0xb + 80001910: 5d670713 addi x14,x14,1494 + 80001914: 00b71713 slli x14,x14,0xb + 80001918: 43770713 addi x14,x14,1079 + 8000191c: 00a71713 slli x14,x14,0xa + 80001920: 2ad70713 addi x14,x14,685 + 80001924: ca9ff06f jal x0,800015cc + 80001928: 00000013 addi x0,x0,0 + 8000192c: 00000013 addi x0,x0,0 + 80001930: 00000013 addi x0,x0,0 + 80001934: 00000013 addi x0,x0,0 + 80001938: 00000013 addi x0,x0,0 + 8000193c: 00000013 addi x0,x0,0 + +0000000080001940 : + 80001940: 1000006f jal x0,80001a40 + 80001944: 1080006f jal x0,80001a4c + 80001948: 1100006f jal x0,80001a58 + 8000194c: 1180006f jal x0,80001a64 + 80001950: 1200006f jal x0,80001a70 + 80001954: 1280006f jal x0,80001a7c + 80001958: 1300006f jal x0,80001a88 + 8000195c: 1380006f jal x0,80001a94 + 80001960: 1400006f jal x0,80001aa0 + 80001964: 1480006f jal x0,80001aac + 80001968: 1500006f jal x0,80001ab8 + 8000196c: 1580006f jal x0,80001ac4 + 80001970: 1600006f jal x0,80001ad0 + 80001974: 1680006f jal x0,80001adc + 80001978: 1700006f jal x0,80001ae8 + 8000197c: 1780006f jal x0,80001af4 + 80001980: 1800006f jal x0,80001b00 + 80001984: 1880006f jal x0,80001b0c + 80001988: 1900006f jal x0,80001b18 + 8000198c: 1980006f jal x0,80001b24 + 80001990: 1a00006f jal x0,80001b30 + 80001994: 1a80006f jal x0,80001b3c + 80001998: 1b00006f jal x0,80001b48 + 8000199c: 1b80006f jal x0,80001b54 + 800019a0: 1c00006f jal x0,80001b60 + 800019a4: 1bc0006f jal x0,80001b60 + 800019a8: 1b80006f jal x0,80001b60 + 800019ac: 1b40006f jal x0,80001b60 + 800019b0: 1b00006f jal x0,80001b60 + 800019b4: 1ac0006f jal x0,80001b60 + 800019b8: 1a80006f jal x0,80001b60 + 800019bc: 1a40006f jal x0,80001b60 + 800019c0: 1a00006f jal x0,80001b60 + 800019c4: 19c0006f jal x0,80001b60 + 800019c8: 1980006f jal x0,80001b60 + 800019cc: 1940006f jal x0,80001b60 + 800019d0: 1900006f jal x0,80001b60 + 800019d4: 18c0006f jal x0,80001b60 + 800019d8: 1880006f jal x0,80001b60 + 800019dc: 1840006f jal x0,80001b60 + 800019e0: 1800006f jal x0,80001b60 + 800019e4: 17c0006f jal x0,80001b60 + 800019e8: 1780006f jal x0,80001b60 + 800019ec: 1740006f jal x0,80001b60 + 800019f0: 1700006f jal x0,80001b60 + 800019f4: 16c0006f jal x0,80001b60 + 800019f8: 1680006f jal x0,80001b60 + 800019fc: 1640006f jal x0,80001b60 + 80001a00: 1600006f jal x0,80001b60 + 80001a04: 15c0006f jal x0,80001b60 + 80001a08: 1580006f jal x0,80001b60 + 80001a0c: 1540006f jal x0,80001b60 + 80001a10: 1500006f jal x0,80001b60 + 80001a14: 14c0006f jal x0,80001b60 + 80001a18: 1480006f jal x0,80001b60 + 80001a1c: 1440006f jal x0,80001b60 + 80001a20: 1400006f jal x0,80001b60 + 80001a24: 13c0006f jal x0,80001b60 + 80001a28: 1380006f jal x0,80001b60 + 80001a2c: 1340006f jal x0,80001b60 + 80001a30: 1300006f jal x0,80001b60 + 80001a34: 12c0006f jal x0,80001b60 + 80001a38: 1280006f jal x0,80001b60 + 80001a3c: 1240006f jal x0,80001b60 + +0000000080001a40 : + 80001a40: 34011173 csrrw x2,mscratch,x2 + 80001a44: 30f13423 sd x15,776(x2) + 80001a48: 13c007ef jal x15,80001b84 + 80001a4c: 34011173 csrrw x2,mscratch,x2 + 80001a50: 30f13423 sd x15,776(x2) + 80001a54: 130007ef jal x15,80001b84 + 80001a58: 34011173 csrrw x2,mscratch,x2 + 80001a5c: 30f13423 sd x15,776(x2) + 80001a60: 124007ef jal x15,80001b84 + 80001a64: 34011173 csrrw x2,mscratch,x2 + 80001a68: 30f13423 sd x15,776(x2) + 80001a6c: 118007ef jal x15,80001b84 + 80001a70: 34011173 csrrw x2,mscratch,x2 + 80001a74: 30f13423 sd x15,776(x2) + 80001a78: 10c007ef jal x15,80001b84 + 80001a7c: 34011173 csrrw x2,mscratch,x2 + 80001a80: 30f13423 sd x15,776(x2) + 80001a84: 100007ef jal x15,80001b84 + 80001a88: 34011173 csrrw x2,mscratch,x2 + 80001a8c: 30f13423 sd x15,776(x2) + 80001a90: 0f4007ef jal x15,80001b84 + 80001a94: 34011173 csrrw x2,mscratch,x2 + 80001a98: 30f13423 sd x15,776(x2) + 80001a9c: 0e8007ef jal x15,80001b84 + 80001aa0: 34011173 csrrw x2,mscratch,x2 + 80001aa4: 30f13423 sd x15,776(x2) + 80001aa8: 0dc007ef jal x15,80001b84 + 80001aac: 34011173 csrrw x2,mscratch,x2 + 80001ab0: 30f13423 sd x15,776(x2) + 80001ab4: 0d0007ef jal x15,80001b84 + 80001ab8: 34011173 csrrw x2,mscratch,x2 + 80001abc: 30f13423 sd x15,776(x2) + 80001ac0: 0c4007ef jal x15,80001b84 + 80001ac4: 34011173 csrrw x2,mscratch,x2 + 80001ac8: 30f13423 sd x15,776(x2) + 80001acc: 0b8007ef jal x15,80001b84 + 80001ad0: 34011173 csrrw x2,mscratch,x2 + 80001ad4: 30f13423 sd x15,776(x2) + 80001ad8: 0ac007ef jal x15,80001b84 + 80001adc: 34011173 csrrw x2,mscratch,x2 + 80001ae0: 30f13423 sd x15,776(x2) + 80001ae4: 0a0007ef jal x15,80001b84 + 80001ae8: 34011173 csrrw x2,mscratch,x2 + 80001aec: 30f13423 sd x15,776(x2) + 80001af0: 094007ef jal x15,80001b84 + 80001af4: 34011173 csrrw x2,mscratch,x2 + 80001af8: 30f13423 sd x15,776(x2) + 80001afc: 088007ef jal x15,80001b84 + 80001b00: 34011173 csrrw x2,mscratch,x2 + 80001b04: 30f13423 sd x15,776(x2) + 80001b08: 07c007ef jal x15,80001b84 + 80001b0c: 34011173 csrrw x2,mscratch,x2 + 80001b10: 30f13423 sd x15,776(x2) + 80001b14: 070007ef jal x15,80001b84 + 80001b18: 34011173 csrrw x2,mscratch,x2 + 80001b1c: 30f13423 sd x15,776(x2) + 80001b20: 064007ef jal x15,80001b84 + 80001b24: 34011173 csrrw x2,mscratch,x2 + 80001b28: 30f13423 sd x15,776(x2) + 80001b2c: 058007ef jal x15,80001b84 + 80001b30: 34011173 csrrw x2,mscratch,x2 + 80001b34: 30f13423 sd x15,776(x2) + 80001b38: 04c007ef jal x15,80001b84 + 80001b3c: 34011173 csrrw x2,mscratch,x2 + 80001b40: 30f13423 sd x15,776(x2) + 80001b44: 040007ef jal x15,80001b84 + 80001b48: 34011173 csrrw x2,mscratch,x2 + 80001b4c: 30f13423 sd x15,776(x2) + 80001b50: 034007ef jal x15,80001b84 + 80001b54: 34011173 csrrw x2,mscratch,x2 + 80001b58: 30f13423 sd x15,776(x2) + 80001b5c: 028007ef jal x15,80001b84 + +0000000080001b60 : + 80001b60: 00000317 auipc x6,0x0 + 80001b64: ac030313 addi x6,x6,-1344 # 80001620 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00030067 jalr x0,0(x6) + +0000000080001b84 : + 80001b84: 30e13023 sd x14,768(x2) + 80001b88: 34011773 csrrw x14,mscratch,x2 + 80001b8c: 30e13823 sd x14,784(x2) + 80001b90: 2b013703 ld x14,688(x2) + 80001b94: 00070067 jalr x0,0(x14) + +0000000080001b98 : + 80001b98: 2e913c23 sd x9,760(x2) + 80001b9c: 2e813823 sd x8,752(x2) + 80001ba0: 2e713423 sd x7,744(x2) + 80001ba4: 2e613023 sd x6,736(x2) + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00006317 auipc x6,0x6 + 80001bc4: 54830313 addi x6,x6,1352 # 80008108 + 80001bc8: 00000013 addi x0,x0,0 + 80001bcc: 00000013 addi x0,x0,0 + 80001bd0: 00000013 addi x0,x0,0 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00033383 ld x7,0(x6) + 80001be4: 00138393 addi x7,x7,1 + 80001be8: 00733023 sd x7,0(x6) + 80001bec: 34202773 csrrs x14,mcause,x0 + +0000000080001bf0 : + 80001bf0: fff00493 addi x9,x0,-1 + 80001bf4: 00d4d493 srli x9,x9,0xd + 80001bf8: 00c49493 slli x9,x9,0xc + 80001bfc: fff4c493 xori x9,x9,-1 + 80001c00: 00e4f4b3 and x9,x9,x14 + +0000000080001c04 : + 80001c04: ffe48413 addi x8,x9,-2 + 80001c08: 00041663 bne x8,x0,80001c14 + +0000000080001c0c : + 80001c0c: 500502e3 beq x10,x0,80002910 + 80001c10: 5b40006f jal x0,800021c4 + +0000000080001c14 : + 80001c14: ff848413 addi x8,x9,-8 + 80001c18: 00245413 srli x8,x8,0x2 + 80001c1c: 5a041463 bne x8,x0,800021c4 + +0000000080001c20 : + 80001c20: 4e0508e3 beq x10,x0,80002910 + +0000000080001c24 : + 80001c24: fff50493 addi x9,x10,-1 + 80001c28: 00500393 addi x7,x0,5 + 80001c2c: 0274e063 bltu x9,x7,80001c4c + 80001c30: 07300393 addi x7,x0,115 + 80001c34: 00750463 beq x10,x7,80001c3c + 80001c38: 08c0006f jal x0,80001cc4 + +0000000080001c3c : + 80001c3c: 34102573 csrrs x10,mepc,x0 + 80001c40: 00450413 addi x8,x10,4 + 80001c44: 34141073 csrrw x0,mepc,x8 + 80001c48: 0310006f jal x0,80002478 + +0000000080001c4c : + 80001c4c: 341024f3 csrrs x9,mepc,x0 + 80001c50: 00448493 addi x9,x9,4 + 80001c54: 34149073 csrrw x0,mepc,x9 + 80001c58: 00100393 addi x7,x0,1 + 80001c5c: 00750e63 beq x10,x7,80001c78 + 80001c60: 00200393 addi x7,x0,2 + 80001c64: 02750463 beq x10,x7,80001c8c + 80001c68: 00300393 addi x7,x0,3 + 80001c6c: 04750063 beq x10,x7,80001cac + 80001c70: fff00513 addi x10,x0,-1 + 80001c74: 0050006f jal x0,80002478 + +0000000080001c78 : + 80001c78: fff00493 addi x9,x0,-1 + 80001c7c: 03e4d493 srli x9,x9,0x3e + 80001c80: 00b49493 slli x9,x9,0xb + 80001c84: 3004a073 csrrs x0,mstatus,x9 + 80001c88: 7f00006f jal x0,80002478 + +0000000080001c8c : + 80001c8c: fff00493 addi x9,x0,-1 + 80001c90: 03e4d493 srli x9,x9,0x3e + 80001c94: 00b49493 slli x9,x9,0xb + 80001c98: 3004b073 csrrc x0,mstatus,x9 + 80001c9c: 00100493 addi x9,x0,1 + 80001ca0: 00b49493 slli x9,x9,0xb + 80001ca4: 3004a073 csrrs x0,mstatus,x9 + 80001ca8: 7d00006f jal x0,80002478 + +0000000080001cac : + 80001cac: fff00493 addi x9,x0,-1 + 80001cb0: 03e4d493 srli x9,x9,0x3e + 80001cb4: 00b49493 slli x9,x9,0xb + 80001cb8: 3004b073 csrrc x0,mstatus,x9 + 80001cbc: 7bc0006f jal x0,80002478 + +0000000080001cc0 : + 80001cc0: 00000013 addi x0,x0,0 + +0000000080001cc4 : + 80001cc4: 00000013 addi x0,x0,0 + 80001cc8: 00000013 addi x0,x0,0 + 80001ccc: 00000013 addi x0,x0,0 + 80001cd0: 00000013 addi x0,x0,0 + 80001cd4: 00000013 addi x0,x0,0 + 80001cd8: 00000013 addi x0,x0,0 + 80001cdc: 00000013 addi x0,x0,0 + 80001ce0: 00000397 auipc x7,0x0 + 80001ce4: 17038393 addi x7,x7,368 # 80001e50 + 80001ce8: 00000013 addi x0,x0,0 + 80001cec: 00000013 addi x0,x0,0 + 80001cf0: 00000013 addi x0,x0,0 + 80001cf4: 00000013 addi x0,x0,0 + 80001cf8: 00000013 addi x0,x0,0 + 80001cfc: 00000013 addi x0,x0,0 + +0000000080001d00 : + 80001d00: 0003e403 lwu x8,0(x7) + 80001d04: 00a40863 beq x8,x10,80001d14 + 80001d08: 04040863 beq x8,x0,80001d58 + 80001d0c: 00838393 addi x7,x7,8 + 80001d10: ff1ff06f jal x0,80001d00 + +0000000080001d14 : + 80001d14: 00008493 addi x9,x1,0 + 80001d18: 00000013 addi x0,x0,0 + 80001d1c: 00000013 addi x0,x0,0 + 80001d20: 00000097 auipc x1,0x0 + 80001d24: 02408093 addi x1,x1,36 # 80001d44 + 80001d28: 00000013 addi x0,x0,0 + 80001d2c: 00000013 addi x0,x0,0 + 80001d30: 00000013 addi x0,x0,0 + 80001d34: 00000013 addi x0,x0,0 + 80001d38: 00000013 addi x0,x0,0 + 80001d3c: 00000013 addi x0,x0,0 + 80001d40: 00038067 jalr x0,0(x7) + +0000000080001d44 : + 80001d44: 00048093 addi x1,x9,0 + 80001d48: 34102473 csrrs x8,mepc,x0 + 80001d4c: 00440413 addi x8,x8,4 + 80001d50: 34141073 csrrw x0,mepc,x8 + 80001d54: 7240006f jal x0,80002478 + +0000000080001d58 : + 80001d58: 00050493 addi x9,x10,0 + 80001d5c: 00000013 addi x0,x0,0 + 80001d60: 0000a517 auipc x10,0xa + 80001d64: 4d350513 addi x10,x10,1235 # 8000c233 + 80001d68: 00000013 addi x0,x0,0 + 80001d6c: 00000013 addi x0,x0,0 + 80001d70: 00000013 addi x0,x0,0 + 80001d74: 00000013 addi x0,x0,0 + 80001d78: 00000013 addi x0,x0,0 + 80001d7c: 00000013 addi x0,x0,0 + 80001d80: 00029097 auipc x1,0x29 + 80001d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80001d88: 00048513 addi x10,x9,0 + 80001d8c: 02000593 addi x11,x0,32 + 80001d90: 728020ef jal x1,800044b8 + 80001d94: 00000013 addi x0,x0,0 + 80001d98: 00000013 addi x0,x0,0 + 80001d9c: 00000013 addi x0,x0,0 + 80001da0: 00009517 auipc x10,0x9 + 80001da4: 85850513 addi x10,x10,-1960 # 8000a5f8 + 80001da8: 00000013 addi x0,x0,0 + 80001dac: 00000013 addi x0,x0,0 + 80001db0: 00000013 addi x0,x0,0 + 80001db4: 00000013 addi x0,x0,0 + 80001db8: 00000013 addi x0,x0,0 + 80001dbc: 00000013 addi x0,x0,0 + 80001dc0: 00028097 auipc x1,0x28 + 80001dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80001dc8: 00000013 addi x0,x0,0 + 80001dcc: 00000013 addi x0,x0,0 + 80001dd0: 00000013 addi x0,x0,0 + 80001dd4: 00000013 addi x0,x0,0 + 80001dd8: 00000013 addi x0,x0,0 + 80001ddc: 00000013 addi x0,x0,0 + 80001de0: 00009517 auipc x10,0x9 + 80001de4: eda50513 addi x10,x10,-294 # 8000acba + 80001de8: 00000013 addi x0,x0,0 + 80001dec: 00000013 addi x0,x0,0 + 80001df0: 00000013 addi x0,x0,0 + 80001df4: 00000013 addi x0,x0,0 + 80001df8: 00000013 addi x0,x0,0 + 80001dfc: 00000013 addi x0,x0,0 + 80001e00: 00028097 auipc x1,0x28 + 80001e04: 7a4080e7 jalr x1,1956(x1) # 8002a5a4 + 80001e08: 00000013 addi x0,x0,0 + 80001e0c: 00000013 addi x0,x0,0 + 80001e10: 00000013 addi x0,x0,0 + 80001e14: 00000013 addi x0,x0,0 + 80001e18: 00000013 addi x0,x0,0 + 80001e1c: 00000013 addi x0,x0,0 + 80001e20: 00009517 auipc x10,0x9 + 80001e24: d9350513 addi x10,x10,-621 # 8000abb3 + 80001e28: 00000013 addi x0,x0,0 + 80001e2c: 00000013 addi x0,x0,0 + 80001e30: 00000013 addi x0,x0,0 + 80001e34: 00000013 addi x0,x0,0 + 80001e38: 00000013 addi x0,x0,0 + 80001e3c: 00000013 addi x0,x0,0 + 80001e40: 00028097 auipc x1,0x28 + 80001e44: 764080e7 jalr x1,1892(x1) # 8002a5a4 + 80001e48: 00028097 auipc x1,0x28 + 80001e4c: 7bc080e7 jalr x1,1980(x1) # 8002a604 + +0000000080001e50 : + 80001e50: 30002573 .word 0x30002573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 30059073 .word 0x30059073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 3005a073 .word 0x3005a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 3005b073 .word 0x3005b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 30402573 .word 0x30402573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 30459073 .word 0x30459073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 3045a073 .word 0x3045a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 3045b073 .word 0x3045b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 30602573 .word 0x30602573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 30659073 .word 0x30659073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 3065a073 .word 0x3065a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 3065b073 .word 0x3065b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 30a02573 .word 0x30a02573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 30a59073 .word 0x30a59073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 30a5a073 .word 0x30a5a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 30a5b073 .word 0x30a5b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 34402573 .word 0x34402573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 34459073 .word 0x34459073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 3445a073 .word 0x3445a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 3445b073 .word 0x3445b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 74702573 .word 0x74702573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 74759073 .word 0x74759073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7475a073 .word 0x7475a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7475b073 .word 0x7475b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 32002573 .word 0x32002573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 32059073 .word 0x32059073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 3205a073 .word 0x3205a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 3205b073 .word 0x3205b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: b0002573 .word 0xb0002573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: b0059073 .word 0xb0059073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: b005a073 .word 0xb005a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: b005b073 .word 0xb005b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: b0202573 .word 0xb0202573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: b0259073 .word 0xb0259073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: b025a073 .word 0xb025a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: b025b073 .word 0xb025b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 10002573 .word 0x10002573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 10059073 .word 0x10059073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 1005a073 .word 0x1005a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 1005b073 .word 0x1005b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 10402573 .word 0x10402573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 10459073 .word 0x10459073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 1045a073 .word 0x1045a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 1045b073 .word 0x1045b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 10602573 .word 0x10602573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 10659073 .word 0x10659073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 1065a073 .word 0x1065a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 1065b073 .word 0x1065b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 10a02573 .word 0x10a02573 + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 10a59073 .word 0x10a59073 + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 10a5a073 .word 0x10a5a073 + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 10a5b073 .word 0x10a5b073 + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 14402573 .word 0x14402573 + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 14459073 .word 0x14459073 + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 1445a073 .word 0x1445a073 + 80002004: 00008067 jalr x0,0(x1) + 80002008: 1445b073 .word 0x1445b073 + 8000200c: 00008067 jalr x0,0(x1) + 80002010: 14d02573 .word 0x14d02573 + 80002014: 00008067 jalr x0,0(x1) + 80002018: 14d59073 .word 0x14d59073 + 8000201c: 00008067 jalr x0,0(x1) + 80002020: 14d5a073 .word 0x14d5a073 + 80002024: 00008067 jalr x0,0(x1) + 80002028: 14d5b073 .word 0x14d5b073 + 8000202c: 00008067 jalr x0,0(x1) + 80002030: 18002573 .word 0x18002573 + 80002034: 00008067 jalr x0,0(x1) + 80002038: 18059073 .word 0x18059073 + 8000203c: 00008067 jalr x0,0(x1) + 80002040: 1805a073 .word 0x1805a073 + 80002044: 00008067 jalr x0,0(x1) + 80002048: 1805b073 .word 0x1805b073 + 8000204c: 00008067 jalr x0,0(x1) + 80002050: 7a002573 .word 0x7a002573 + 80002054: 00008067 jalr x0,0(x1) + 80002058: 7a059073 .word 0x7a059073 + 8000205c: 00008067 jalr x0,0(x1) + 80002060: 7a05a073 .word 0x7a05a073 + 80002064: 00008067 jalr x0,0(x1) + 80002068: 7a05b073 .word 0x7a05b073 + 8000206c: 00008067 jalr x0,0(x1) + 80002070: 7a102573 .word 0x7a102573 + 80002074: 00008067 jalr x0,0(x1) + 80002078: 7a159073 .word 0x7a159073 + 8000207c: 00008067 jalr x0,0(x1) + 80002080: 7a15a073 .word 0x7a15a073 + 80002084: 00008067 jalr x0,0(x1) + 80002088: 7a15b073 .word 0x7a15b073 + 8000208c: 00008067 jalr x0,0(x1) + 80002090: 7a202573 .word 0x7a202573 + 80002094: 00008067 jalr x0,0(x1) + 80002098: 7a259073 .word 0x7a259073 + 8000209c: 00008067 jalr x0,0(x1) + 800020a0: 7a25a073 .word 0x7a25a073 + 800020a4: 00008067 jalr x0,0(x1) + 800020a8: 7a25b073 .word 0x7a25b073 + 800020ac: 00008067 jalr x0,0(x1) + 800020b0: 7a302573 .word 0x7a302573 + 800020b4: 00008067 jalr x0,0(x1) + 800020b8: 7a359073 .word 0x7a359073 + 800020bc: 00008067 jalr x0,0(x1) + 800020c0: 7a35a073 .word 0x7a35a073 + 800020c4: 00008067 jalr x0,0(x1) + 800020c8: 7a35b073 .word 0x7a35b073 + 800020cc: 00008067 jalr x0,0(x1) + 800020d0: 7a402573 .word 0x7a402573 + 800020d4: 00008067 jalr x0,0(x1) + 800020d8: 7a459073 .word 0x7a459073 + 800020dc: 00008067 jalr x0,0(x1) + 800020e0: 7a45a073 .word 0x7a45a073 + 800020e4: 00008067 jalr x0,0(x1) + 800020e8: 7a45b073 .word 0x7a45b073 + 800020ec: 00008067 jalr x0,0(x1) + 800020f0: 7a502573 .word 0x7a502573 + 800020f4: 00008067 jalr x0,0(x1) + 800020f8: 7a559073 .word 0x7a559073 + 800020fc: 00008067 jalr x0,0(x1) + 80002100: 7a55a073 .word 0x7a55a073 + 80002104: 00008067 jalr x0,0(x1) + 80002108: 7a55b073 .word 0x7a55b073 + 8000210c: 00008067 jalr x0,0(x1) + 80002110: 7a802573 .word 0x7a802573 + 80002114: 00008067 jalr x0,0(x1) + 80002118: 7a859073 .word 0x7a859073 + 8000211c: 00008067 jalr x0,0(x1) + 80002120: 7a85a073 .word 0x7a85a073 + 80002124: 00008067 jalr x0,0(x1) + 80002128: 7a85b073 .word 0x7a85b073 + 8000212c: 00008067 jalr x0,0(x1) + 80002130: 7aa02573 .word 0x7aa02573 + 80002134: 00008067 jalr x0,0(x1) + 80002138: 7aa59073 .word 0x7aa59073 + 8000213c: 00008067 jalr x0,0(x1) + 80002140: 7aa5a073 .word 0x7aa5a073 + 80002144: 00008067 jalr x0,0(x1) + 80002148: 7aa5b073 .word 0x7aa5b073 + 8000214c: 00008067 jalr x0,0(x1) + 80002150: 5a802573 .word 0x5a802573 + 80002154: 00008067 jalr x0,0(x1) + 80002158: 5a859073 .word 0x5a859073 + 8000215c: 00008067 jalr x0,0(x1) + 80002160: 5a85a073 .word 0x5a85a073 + 80002164: 00008067 jalr x0,0(x1) + 80002168: 5a85b073 .word 0x5a85b073 + 8000216c: 00008067 jalr x0,0(x1) + 80002170: 6a802573 .word 0x6a802573 + 80002174: 00008067 jalr x0,0(x1) + 80002178: 6a859073 .word 0x6a859073 + 8000217c: 00008067 jalr x0,0(x1) + 80002180: 6a85a073 .word 0x6a85a073 + 80002184: 00008067 jalr x0,0(x1) + 80002188: 6a85b073 .word 0x6a85b073 + 8000218c: 00008067 jalr x0,0(x1) + 80002190: 0005a503 lw x10,0(x11) + 80002194: 00008067 jalr x0,0(x1) + 80002198: 0045a503 lw x10,4(x11) + 8000219c: 00008067 jalr x0,0(x1) + 800021a0: 00c5a023 sw x12,0(x11) + 800021a4: 00008067 jalr x0,0(x1) + 800021a8: 00c5a223 sw x12,4(x11) + 800021ac: 00008067 jalr x0,0(x1) + 800021b0: 0005b503 ld x10,0(x11) + 800021b4: 00008067 jalr x0,0(x1) + 800021b8: 00c5b023 sd x12,0(x11) + 800021bc: 00008067 jalr x0,0(x1) + 800021c0: 00000000 .word 0x00000000 + +00000000800021c4 : + 800021c4: 02000393 addi x7,x0,32 + 800021c8: 00075c63 bge x14,x0,800021e0 + +00000000800021cc : + 800021cc: 00171413 slli x8,x14,0x1 + 800021d0: ff240413 addi x8,x8,-14 + 800021d4: 00045663 bge x8,x0,800021e0 + 800021d8: 01800393 addi x7,x0,24 + 800021dc: 0040006f jal x0,800021e0 + +00000000800021e0 : + 800021e0: ca810113 addi x2,x2,-856 + 800021e4: 5f013303 ld x6,1520(x2) + 800021e8: 007304b3 add x9,x6,x7 + 800021ec: 5e913823 sd x9,1520(x2) + 800021f0: 5d013403 ld x8,1488(x2) + 800021f4: 40830333 sub x6,x6,x8 + 800021f8: 35810113 addi x2,x2,856 + 800021fc: 27813403 ld x8,632(x2) + 80002200: 00830333 add x6,x6,x8 + 80002204: 34102473 csrrs x8,mepc,x0 + 80002208: 00000013 addi x0,x0,0 + 8000220c: 00000013 addi x0,x0,0 + 80002210: 00000013 addi x0,x0,0 + 80002214: 00000013 addi x0,x0,0 + 80002218: 00000013 addi x0,x0,0 + 8000221c: 00000013 addi x0,x0,0 + 80002220: 00008497 auipc x9,0x8 + 80002224: 3b848493 addi x9,x9,952 # 8000a5d8 + 80002228: 00000013 addi x0,x0,0 + 8000222c: 00000013 addi x0,x0,0 + 80002230: 00000013 addi x0,x0,0 + 80002234: 00000013 addi x0,x0,0 + 80002238: 00000013 addi x0,x0,0 + 8000223c: 00000013 addi x0,x0,0 + 80002240: 0084b023 sd x8,0(x9) + 80002244: 00e4b423 sd x14,8(x9) + 80002248: 34302473 csrrs x8,mtval,x0 + 8000224c: 0084b823 sd x8,16(x9) + 80002250: 30002473 csrrs x8,mstatus,x0 + 80002254: 0084bc23 sd x8,24(x9) + 80002258: 00000013 addi x0,x0,0 + 8000225c: 00000013 addi x0,x0,0 + 80002260: 00028417 auipc x8,0x28 + 80002264: 92840413 addi x8,x8,-1752 # 80029b88 + 80002268: 00000013 addi x0,x0,0 + 8000226c: 00000013 addi x0,x0,0 + 80002270: 00000013 addi x0,x0,0 + 80002274: 00000013 addi x0,x0,0 + 80002278: 00000013 addi x0,x0,0 + 8000227c: 00000013 addi x0,x0,0 + 80002280: 007304b3 add x9,x6,x7 + 80002284: e4946663 bltu x8,x9,800018d0 + +0000000080002288 : + 80002288: 2c013403 ld x8,704(x2) + 8000228c: 408787b3 sub x15,x15,x8 + 80002290: 00179493 slli x9,x15,0x1 + 80002294: 009787b3 add x15,x15,x9 + 80002298: 0057d793 srli x15,x15,0x5 + 8000229c: 00679793 slli x15,x15,0x6 + 800022a0: 0077e7b3 or x15,x15,x7 + 800022a4: 00378793 addi x15,x15,3 + 800022a8: 02075a63 bge x14,x0,800022dc + 800022ac: 00f00413 addi x8,x0,15 + 800022b0: 00877433 and x8,x14,x8 + 800022b4: 304024f3 csrrs x9,mie,x0 + 800022b8: 0084d4b3 srl x9,x9,x8 + 800022bc: 0014f493 andi x9,x9,1 + 800022c0: 00b49493 slli x9,x9,0xb + 800022c4: 0097e7b3 or x15,x15,x9 + 800022c8: 344024f3 csrrs x9,mip,x0 + 800022cc: 0084d4b3 srl x9,x9,x8 + 800022d0: 0014f493 andi x9,x9,1 + 800022d4: 00c49493 slli x9,x9,0xc + 800022d8: 0097e7b3 or x15,x15,x9 + 800022dc: 300023f3 csrrs x7,mstatus,x0 + 800022e0: 02f39393 slli x7,x7,0x2f + 800022e4: 0223d393 srli x7,x7,0x22 + 800022e8: 00000437 lui x8,0x0 + 800022ec: 00040413 addi x8,x8,0 # 0 + 800022f0: 00b41413 slli x8,x8,0xb + 800022f4: 00140413 addi x8,x8,1 + 800022f8: 00b41413 slli x8,x8,0xb + 800022fc: 06740413 addi x8,x8,103 + 80002300: 00a41413 slli x8,x8,0xa + 80002304: 3e540413 addi x8,x8,997 + 80002308: fff44413 xori x8,x8,-1 + 8000230c: 0083f433 and x8,x7,x8 + 80002310: 0087e433 or x8,x15,x8 + 80002314: 0204d493 srli x9,x9,0x20 + 80002318: 1c04f493 andi x9,x9,448 + 8000231c: 00849493 slli x9,x9,0x8 + 80002320: 00946433 or x8,x8,x9 + 80002324: 00033483 ld x9,0(x6) + 80002328: 02848263 beq x9,x8,8000234c + 8000232c: 00040313 addi x6,x8,0 + 80002330: 00048213 addi x4,x9,0 + 80002334: 6b4003ef jal x7,800029e8 + 80002338: 80002288 .word 0x80002288 + 8000233c: 00000000 .word 0x00000000 + 80002340: 8000adbc .word 0x8000adbc + 80002344: 00000000 .word 0x00000000 + 80002348: 00000341 .word 0x00000341 + +000000008000234c : + 8000234c: 00070413 addi x8,x14,0 + 80002350: 00833483 ld x9,8(x6) + 80002354: 02848263 beq x9,x8,80002378 + 80002358: 00040313 addi x6,x8,0 + 8000235c: 00048213 addi x4,x9,0 + 80002360: 688003ef jal x7,800029e8 + 80002364: 8000234c .word 0x8000234c + 80002368: 00000000 .word 0x00000000 + 8000236c: 8000aebe .word 0x8000aebe + 80002370: 00000000 .word 0x00000000 + 80002374: 00000341 .word 0x00000341 + 80002378: 12074063 blt x14,x0,80002498 + +000000008000237c : + 8000237c: 34102473 csrrs x8,mepc,x0 + 80002380: 00010493 addi x9,x2,0 + 80002384: 0040006f jal x0,80002388 + +0000000080002388 : + 80002388: 08000393 addi x7,x0,128 + 8000238c: 04740863 beq x8,x7,800023dc + 80002390: 00238393 addi x7,x7,2 + 80002394: 04740463 beq x8,x7,800023dc + 80002398: 04040263 beq x8,x0,800023dc + 8000239c: 2884b383 ld x7,648(x9) + 800023a0: 2904b783 ld x15,656(x9) + 800023a4: 007787b3 add x15,x15,x7 + 800023a8: 00f47463 bgeu x8,x15,800023b0 + 800023ac: 02747663 bgeu x8,x7,800023d8 + +00000000800023b0 : + 800023b0: 2584b383 ld x7,600(x9) + 800023b4: 2604b783 ld x15,608(x9) + 800023b8: 007787b3 add x15,x15,x7 + 800023bc: 00f47463 bgeu x8,x15,800023c4 + 800023c0: 00747c63 bgeu x8,x7,800023d8 + +00000000800023c4 : + 800023c4: 2684b383 ld x7,616(x9) + 800023c8: 2704b783 ld x15,624(x9) + 800023cc: 007787b3 add x15,x15,x7 + 800023d0: d2f47a63 bgeu x8,x15,80001904 + 800023d4: d2746863 bltu x8,x7,80001904 + +00000000800023d8 : + 800023d8: 40740433 sub x8,x8,x7 + +00000000800023dc : + 800023dc: 01033483 ld x9,16(x6) + 800023e0: 02848263 beq x9,x8,80002404 + 800023e4: 00040313 addi x6,x8,0 + 800023e8: 00048213 addi x4,x9,0 + 800023ec: 5fc003ef jal x7,800029e8 + 800023f0: 800023dc .word 0x800023dc + 800023f4: 00000000 .word 0x00000000 + 800023f8: 8000afb9 .word 0x8000afb9 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000341 .word 0x00000341 + +0000000080002404 : + 80002404: 34102473 csrrs x8,mepc,x0 + 80002408: 342023f3 csrrs x7,mcause,x0 + 8000240c: 00c00793 addi x15,x0,12 + 80002410: 00f38a63 beq x7,x15,80002424 + 80002414: 00100793 addi x15,x0,1 + 80002418: 00f38663 beq x7,x15,80002424 + 8000241c: 01400793 addi x15,x0,20 + 80002420: 00f39663 bne x7,x15,8000242c + 80002424: 34109073 csrrw x0,mepc,x1 + 80002428: 0100006f jal x0,80002438 + +000000008000242c : + 8000242c: 00400393 addi x7,x0,4 + 80002430: 00740433 add x8,x8,x7 + 80002434: 34141073 csrrw x0,mepc,x8 + +0000000080002438 : + 80002438: 34302473 csrrs x8,mtval,x0 + +000000008000243c : + 8000243c: 01833483 ld x9,24(x6) + 80002440: 02848263 beq x9,x8,80002464 + 80002444: 00040313 addi x6,x8,0 + 80002448: 00048213 addi x4,x9,0 + 8000244c: 59c003ef jal x7,800029e8 + 80002450: 8000243c .word 0x8000243c + 80002454: 00000000 .word 0x00000000 + 80002458: 8000b0ac .word 0x8000b0ac + 8000245c: 00000000 .word 0x00000000 + 80002460: 00000341 .word 0x00000341 + +0000000080002464 : + 80002464: 30102473 csrrs x8,misa,x0 + 80002468: 03841413 slli x8,x8,0x38 + 8000246c: 00045263 bge x8,x0,80002470 + +0000000080002470 : + 80002470: 20000393 addi x7,x0,512 + 80002474: 0640006f jal x0,800024d8 + +0000000080002478 : + 80002478: 2e013303 ld x6,736(x2) + 8000247c: 2e813383 ld x7,744(x2) + 80002480: 2f013403 ld x8,752(x2) + 80002484: 2f813483 ld x9,760(x2) + 80002488: 30013703 ld x14,768(x2) + 8000248c: 30813783 ld x15,776(x2) + 80002490: 31013103 ld x2,784(x2) + 80002494: 30200073 mret + +0000000080002498 : + 80002498: 00100413 addi x8,x0,1 + 8000249c: 01f77393 andi x7,x14,31 + 800024a0: 00741433 sll x8,x8,x7 + 800024a4: 304434f3 csrrc x9,mie,x8 + 800024a8: 34443473 csrrc x8,mip,x8 + +00000000800024ac : + 800024ac: 01033483 ld x9,16(x6) + 800024b0: 02848263 beq x9,x8,800024d4 + 800024b4: 00040313 addi x6,x8,0 + 800024b8: 00048213 addi x4,x9,0 + 800024bc: 52c003ef jal x7,800029e8 + 800024c0: 800024ac .word 0x800024ac + 800024c4: 00000000 .word 0x00000000 + 800024c8: 8000b21f .word 0x8000b21f + 800024cc: 00000000 .word 0x00000000 + 800024d0: 00000341 .word 0x00000341 + 800024d4: 00000393 addi x7,x0,0 + +00000000800024d8 : + 800024d8: 00000417 auipc x8,0x0 + 800024dc: 03c40413 addi x8,x8,60 # 80002514 + 800024e0: 00740433 add x8,x8,x7 + 800024e4: 00371393 slli x7,x14,0x3 + 800024e8: 00740433 add x8,x8,x7 + 800024ec: ff847413 andi x8,x8,-8 + 800024f0: 00043403 ld x8,0(x8) + +00000000800024f4 : + 800024f4: 00040a63 beq x8,x0,80002508 + 800024f8: 03f41393 slli x7,x8,0x3f + 800024fc: 0003d863 bge x7,x0,8000250c + 80002500: 00145413 srli x8,x8,0x1 + 80002504: f6870ae3 beq x14,x8,80002478 + 80002508: bfcff06f jal x0,80001904 + +000000008000250c : + 8000250c: 00040067 jalr x0,0(x8) + +0000000080002510 : + ... + 80002518: 00000001 .word 0x00000001 + 8000251c: 00000000 .word 0x00000000 + 80002520: 00000001 .word 0x00000001 + 80002524: 00000000 .word 0x00000000 + 80002528: 8002a000 .word 0x8002a000 + ... + 80002538: 00000001 .word 0x00000001 + 8000253c: 00000000 .word 0x00000000 + 80002540: 00000001 .word 0x00000001 + 80002544: 00000000 .word 0x00000000 + 80002548: 8002a014 .word 0x8002a014 + ... + 80002558: 00000001 .word 0x00000001 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000001 .word 0x00000001 + 80002564: 00000000 .word 0x00000000 + 80002568: 8002a02c .word 0x8002a02c + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000001 .word 0x00000001 + 80002574: 00000000 .word 0x00000000 + 80002578: 00000001 .word 0x00000001 + 8000257c: 00000000 .word 0x00000000 + 80002580: 00000001 .word 0x00000001 + 80002584: 00000000 .word 0x00000000 + 80002588: 00000001 .word 0x00000001 + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000001 .word 0x00000001 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000001 .word 0x00000001 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000001 .word 0x00000001 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000001 .word 0x00000001 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000001 .word 0x00000001 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 00000001 .word 0x00000001 + 800025bc: 00000000 .word 0x00000000 + 800025c0: 00000001 .word 0x00000001 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 00000001 .word 0x00000001 + ... + +0000000080002710 : + 80002710: 00000001 .word 0x00000001 + 80002714: 00000000 .word 0x00000000 + 80002718: 00000003 .word 0x00000003 + 8000271c: 00000000 .word 0x00000000 + 80002720: 00000005 .word 0x00000005 + 80002724: 00000000 .word 0x00000000 + 80002728: 00000007 .word 0x00000007 + 8000272c: 00000000 .word 0x00000000 + 80002730: 00000009 .word 0x00000009 + 80002734: 00000000 .word 0x00000000 + 80002738: 0000000b .word 0x0000000b + 8000273c: 00000000 .word 0x00000000 + 80002740: 0000000d .word 0x0000000d + 80002744: 00000000 .word 0x00000000 + 80002748: 0000000f .word 0x0000000f + 8000274c: 00000000 .word 0x00000000 + 80002750: 00000011 .word 0x00000011 + 80002754: 00000000 .word 0x00000000 + 80002758: 00000013 .word 0x00000013 + 8000275c: 00000000 .word 0x00000000 + 80002760: 00000015 .word 0x00000015 + 80002764: 00000000 .word 0x00000000 + 80002768: 00000017 .word 0x00000017 + 8000276c: 00000000 .word 0x00000000 + 80002770: 00000019 .word 0x00000019 + 80002774: 00000000 .word 0x00000000 + 80002778: 0000001b .word 0x0000001b + 8000277c: 00000000 .word 0x00000000 + 80002780: 0000001d .word 0x0000001d + 80002784: 00000000 .word 0x00000000 + 80002788: 0000001f .word 0x0000001f + 8000278c: 00000000 .word 0x00000000 + 80002790: 00000021 .word 0x00000021 + 80002794: 00000000 .word 0x00000000 + 80002798: 00000023 .word 0x00000023 + 8000279c: 00000000 .word 0x00000000 + 800027a0: 00000025 .word 0x00000025 + 800027a4: 00000000 .word 0x00000000 + 800027a8: 00000027 .word 0x00000027 + 800027ac: 00000000 .word 0x00000000 + 800027b0: 00000029 .word 0x00000029 + 800027b4: 00000000 .word 0x00000000 + 800027b8: 0000002b .word 0x0000002b + 800027bc: 00000000 .word 0x00000000 + 800027c0: 0000002d .word 0x0000002d + 800027c4: 00000000 .word 0x00000000 + 800027c8: 0000002f .word 0x0000002f + ... + +0000000080002910 : + 80002910: 300023f3 csrrs x7,mstatus,x0 + 80002914: 00b3d493 srli x9,x7,0xb + 80002918: 0034f493 andi x9,x9,3 + 8000291c: ffd48413 addi x8,x9,-3 + 80002920: 341023f3 csrrs x7,mepc,x0 + 80002924: 00000493 addi x9,x0,0 + 80002928: 02040c63 beq x8,x0,80002960 + 8000292c: 35810113 addi x2,x2,856 + 80002930: 300023f3 csrrs x7,mstatus,x0 + 80002934: 01839393 slli x7,x7,0x18 + 80002938: 0003da63 bge x7,x0,8000294c + +000000008000293c : + 8000293c: 35810113 addi x2,x2,856 + 80002940: 5b013783 ld x15,1456(x2) + 80002944: ca810113 addi x2,x2,-856 + 80002948: 0080006f jal x0,80002950 + +000000008000294c : + 8000294c: f0013783 ld x15,-256(x2) + 80002950: 341023f3 csrrs x7,mepc,x0 + 80002954: 40f383b3 sub x7,x7,x15 + 80002958: ca810113 addi x2,x2,-856 + 8000295c: 25813483 ld x9,600(x2) + +0000000080002960 : + 80002960: 007483b3 add x7,x9,x7 + 80002964: 2e013303 ld x6,736(x2) + 80002968: 2f013403 ld x8,752(x2) + 8000296c: 2f813483 ld x9,760(x2) + 80002970: 30013703 ld x14,768(x2) + 80002974: 30813783 ld x15,776(x2) + 80002978: 31013103 ld x2,784(x2) + 8000297c: 00438067 jalr x0,4(x7) + +0000000080002980 : + 80002980: 00008217 auipc x4,0x8 + 80002984: b1020213 addi x4,x4,-1264 # 8000a490 + 80002988: 02523423 sd x5,40(x4) # 28 + 8000298c: 00123423 sd x1,8(x4) # 8 + 80002990: 00023023 sd x0,0(x4) # 0 + 80002994: 0880006f jal x0,80002a1c + +0000000080002998 : + 80002998: 00008397 auipc x7,0x8 + 8000299c: af838393 addi x7,x7,-1288 # 8000a490 + 800029a0: 0483b023 sd x8,64(x7) + 800029a4: 0243b023 sd x4,32(x7) + 800029a8: 0253b423 sd x5,40(x7) + 800029ac: 0013b423 sd x1,8(x7) + 800029b0: 0003b023 sd x0,0(x7) + 800029b4: 00038213 addi x4,x7,0 + 800029b8: 00040293 addi x5,x8,0 + 800029bc: 0600006f jal x0,80002a1c + +00000000800029c0 : + 800029c0: 00008697 auipc x13,0x8 + 800029c4: ad068693 addi x13,x13,-1328 # 8000a490 + 800029c8: 06e6b823 sd x14,112(x13) + 800029cc: 0246b023 sd x4,32(x13) + 800029d0: 0256b423 sd x5,40(x13) + 800029d4: 0016b423 sd x1,8(x13) + 800029d8: 0006b023 sd x0,0(x13) + 800029dc: 00068213 addi x4,x13,0 + 800029e0: 00070293 addi x5,x14,0 + 800029e4: 0380006f jal x0,80002a1c + +00000000800029e8 : + 800029e8: 00008497 auipc x9,0x8 + 800029ec: aa848493 addi x9,x9,-1368 # 8000a490 + 800029f0: 0674b423 sd x7,104(x9) + 800029f4: 0244b023 sd x4,32(x9) + 800029f8: 0254b423 sd x5,40(x9) + 800029fc: 0014b423 sd x1,8(x9) + 80002a00: 00300093 addi x1,x0,3 + 80002a04: 0014b023 sd x1,0(x9) + 80002a08: 1064b823 sd x6,272(x9) + 80002a0c: 1044bc23 sd x4,280(x9) + 80002a10: 00048213 addi x4,x9,0 + 80002a14: 00038293 addi x5,x7,0 + 80002a18: 0040006f jal x0,80002a1c + +0000000080002a1c : + 80002a1c: 00223823 sd x2,16(x4) # 10 + 80002a20: 00323c23 sd x3,24(x4) # 18 + 80002a24: 02623823 sd x6,48(x4) # 30 + 80002a28: 02723c23 sd x7,56(x4) # 38 + 80002a2c: 04823023 sd x8,64(x4) # 40 + 80002a30: 04923423 sd x9,72(x4) # 48 + 80002a34: 04a23823 sd x10,80(x4) # 50 + 80002a38: 04b23c23 sd x11,88(x4) # 58 + 80002a3c: 06c23023 sd x12,96(x4) # 60 + 80002a40: 06d23423 sd x13,104(x4) # 68 + 80002a44: 06e23823 sd x14,112(x4) # 70 + 80002a48: 06f23c23 sd x15,120(x4) # 78 + 80002a4c: 09023023 sd x16,128(x4) # 80 + 80002a50: 09123423 sd x17,136(x4) # 88 + 80002a54: 09223823 sd x18,144(x4) # 90 + 80002a58: 09323c23 sd x19,152(x4) # 98 + 80002a5c: 0b423023 sd x20,160(x4) # a0 + 80002a60: 0b523423 sd x21,168(x4) # a8 + 80002a64: 0b623823 sd x22,176(x4) # b0 + 80002a68: 0b723c23 sd x23,184(x4) # b8 + 80002a6c: 0d823023 sd x24,192(x4) # c0 + 80002a70: 0d923423 sd x25,200(x4) # c8 + 80002a74: 0da23823 sd x26,208(x4) # d0 + 80002a78: 0db23c23 sd x27,216(x4) # d8 + 80002a7c: 0fc23023 sd x28,224(x4) # e0 + 80002a80: 0fd23423 sd x29,232(x4) # e8 + 80002a84: 0fe23823 sd x30,240(x4) # f0 + 80002a88: 0ff23c23 sd x31,248(x4) # f8 + +0000000080002a8c : + 80002a8c: 00008497 auipc x9,0x8 + 80002a90: a044a483 lw x9,-1532(x9) # 8000a490 + 80002a94: 00300513 addi x10,x0,3 + 80002a98: 18a48a63 beq x9,x10,80002c2c + +0000000080002a9c : + 80002a9c: ffa2d303 lhu x6,-6(x5) + 80002aa0: ff82d383 lhu x7,-8(x5) + 80002aa4: 01031313 slli x6,x6,0x10 + 80002aa8: 00736333 or x6,x6,x7 + 80002aac: 00f35393 srli x7,x6,0xf + 80002ab0: 01f3f393 andi x7,x7,31 + 80002ab4: 01435413 srli x8,x6,0x14 + 80002ab8: 01f47413 andi x8,x8,31 + 80002abc: 10822223 sw x8,260(x4) # 104 + 80002ac0: 00341313 slli x6,x8,0x3 + 80002ac4: 00620333 add x6,x4,x6 + 80002ac8: 00033303 ld x6,0(x6) + 80002acc: 10623823 sd x6,272(x4) # 110 + 80002ad0: ff62d303 lhu x6,-10(x5) + 80002ad4: ff42d383 lhu x7,-12(x5) + 80002ad8: 01031313 slli x6,x6,0x10 + 80002adc: 00736333 or x6,x6,x7 + 80002ae0: 00030513 addi x10,x6,0 + 80002ae4: 07f37413 andi x8,x6,127 + 80002ae8: 00300493 addi x9,x0,3 + 80002aec: 0c941463 bne x8,x9,80002bb4 + 80002af0: 00c35413 srli x8,x6,0xc + 80002af4: 00747413 andi x8,x8,7 + 80002af8: 00300493 addi x9,x0,3 + 80002afc: 0a941c63 bne x8,x9,80002bb4 + 80002b00: 41435393 srai x7,x6,0x14 + 80002b04: 00f35313 srli x6,x6,0xf + 80002b08: 01f37313 andi x6,x6,31 + 80002b0c: 00331313 slli x6,x6,0x3 + 80002b10: 00620333 add x6,x4,x6 + 80002b14: 00033303 ld x6,0(x6) + 80002b18: 00730333 add x6,x6,x7 + 80002b1c: 00737413 andi x8,x6,7 + 80002b20: 0c041663 bne x8,x0,80002bec + 80002b24: 00000013 addi x0,x0,0 + 80002b28: 00000013 addi x0,x0,0 + 80002b2c: 00000013 addi x0,x0,0 + 80002b30: 00000013 addi x0,x0,0 + 80002b34: 00000013 addi x0,x0,0 + 80002b38: 00000013 addi x0,x0,0 + 80002b3c: 00000013 addi x0,x0,0 + 80002b40: 00009417 auipc x8,0x9 + 80002b44: 74040413 addi x8,x8,1856 # 8000c280 + 80002b48: 00000013 addi x0,x0,0 + 80002b4c: 00000013 addi x0,x0,0 + 80002b50: 00000013 addi x0,x0,0 + 80002b54: 00000013 addi x0,x0,0 + 80002b58: 00000013 addi x0,x0,0 + 80002b5c: 00000013 addi x0,x0,0 + 80002b60: 08836663 bltu x6,x8,80002bec + 80002b64: 00000013 addi x0,x0,0 + 80002b68: 00000013 addi x0,x0,0 + 80002b6c: 00000013 addi x0,x0,0 + 80002b70: 00000013 addi x0,x0,0 + 80002b74: 00000013 addi x0,x0,0 + 80002b78: 00000013 addi x0,x0,0 + 80002b7c: 00000013 addi x0,x0,0 + 80002b80: 00027417 auipc x8,0x27 + 80002b84: 01040413 addi x8,x8,16 # 80029b90 + 80002b88: 00000013 addi x0,x0,0 + 80002b8c: 00000013 addi x0,x0,0 + 80002b90: 00000013 addi x0,x0,0 + 80002b94: 00000013 addi x0,x0,0 + 80002b98: 00000013 addi x0,x0,0 + 80002b9c: 00000013 addi x0,x0,0 + 80002ba0: ff840413 addi x8,x8,-8 + 80002ba4: 04646463 bltu x8,x6,80002bec + 80002ba8: 00033303 ld x6,0(x6) + 80002bac: 10623c23 sd x6,280(x4) # 118 + 80002bb0: 3880006f jal x0,80002f38 + +0000000080002bb4 : + 80002bb4: 00100413 addi x8,x0,1 + 80002bb8: 00000013 addi x0,x0,0 + 80002bbc: 00000013 addi x0,x0,0 + 80002bc0: 00008497 auipc x9,0x8 + 80002bc4: 9f848493 addi x9,x9,-1544 # 8000a5b8 + 80002bc8: 00000013 addi x0,x0,0 + 80002bcc: 00000013 addi x0,x0,0 + 80002bd0: 00000013 addi x0,x0,0 + 80002bd4: 00000013 addi x0,x0,0 + 80002bd8: 00000013 addi x0,x0,0 + 80002bdc: 00000013 addi x0,x0,0 + 80002be0: 0084a023 sw x8,0(x9) + 80002be4: 10a23c23 sd x10,280(x4) # 118 + 80002be8: 3500006f jal x0,80002f38 + +0000000080002bec : + 80002bec: 00200413 addi x8,x0,2 + 80002bf0: 00000013 addi x0,x0,0 + 80002bf4: 00000013 addi x0,x0,0 + 80002bf8: 00000013 addi x0,x0,0 + 80002bfc: 00000013 addi x0,x0,0 + 80002c00: 00008497 auipc x9,0x8 + 80002c04: 9b848493 addi x9,x9,-1608 # 8000a5b8 + 80002c08: 00000013 addi x0,x0,0 + 80002c0c: 00000013 addi x0,x0,0 + 80002c10: 00000013 addi x0,x0,0 + 80002c14: 00000013 addi x0,x0,0 + 80002c18: 00000013 addi x0,x0,0 + 80002c1c: 00000013 addi x0,x0,0 + 80002c20: 0084a023 sw x8,0(x9) + 80002c24: 10623c23 sd x6,280(x4) # 118 + 80002c28: 3100006f jal x0,80002f38 + +0000000080002c2c : + 80002c2c: 0082e303 lwu x6,8(x5) + 80002c30: 00c2a383 lw x7,12(x5) + 80002c34: 02039393 slli x7,x7,0x20 + 80002c38: 00736333 or x6,x6,x7 + 80002c3c: 00008817 auipc x16,0x8 + 80002c40: 98c80813 addi x16,x16,-1652 # 8000a5c8 + 80002c44: 00683023 sd x6,0(x16) + 80002c48: 0002e303 lwu x6,0(x5) + 80002c4c: 0042a383 lw x7,4(x5) + 80002c50: 02039393 slli x7,x7,0x20 + 80002c54: 00736333 or x6,x6,x7 + 80002c58: 10623423 sd x6,264(x4) # 108 + 80002c5c: 00008817 auipc x16,0x8 + 80002c60: 96c80813 addi x16,x16,-1684 # 8000a5c8 + 80002c64: 00083303 ld x6,0(x16) + 80002c68: 00008397 auipc x7,0x8 + 80002c6c: 13d38393 addi x7,x7,317 # 8000ada5 + 80002c70: 28730463 beq x6,x7,80002ef8 + 80002c74: 00000413 addi x8,x0,0 + 80002c78: 00008817 auipc x16,0x8 + 80002c7c: 94880813 addi x16,x16,-1720 # 8000a5c0 + 80002c80: 00882023 sw x8,0(x16) + 80002c84: 00008397 auipc x7,0x8 + 80002c88: 13838393 addi x7,x7,312 # 8000adbc + 80002c8c: 00731863 bne x6,x7,80002c9c + 80002c90: 00100413 addi x8,x0,1 + 80002c94: 00000493 addi x9,x0,0 + 80002c98: 2740006f jal x0,80002f0c + 80002c9c: 00008397 auipc x7,0x8 + 80002ca0: 22238393 addi x7,x7,546 # 8000aebe + 80002ca4: 00731863 bne x6,x7,80002cb4 + 80002ca8: 00200413 addi x8,x0,2 + 80002cac: 00000493 addi x9,x0,0 + 80002cb0: 25c0006f jal x0,80002f0c + 80002cb4: 00008397 auipc x7,0x8 + 80002cb8: 30538393 addi x7,x7,773 # 8000afb9 + 80002cbc: 00731863 bne x6,x7,80002ccc + 80002cc0: 00300413 addi x8,x0,3 + 80002cc4: 00000493 addi x9,x0,0 + 80002cc8: 2440006f jal x0,80002f0c + 80002ccc: 00008397 auipc x7,0x8 + 80002cd0: 3e038393 addi x7,x7,992 # 8000b0ac + 80002cd4: 00731863 bne x6,x7,80002ce4 + 80002cd8: 00400413 addi x8,x0,4 + 80002cdc: 00000493 addi x9,x0,0 + 80002ce0: 22c0006f jal x0,80002f0c + 80002ce4: 00008397 auipc x7,0x8 + 80002ce8: 53b38393 addi x7,x7,1339 # 8000b21f + 80002cec: 00731863 bne x6,x7,80002cfc + 80002cf0: 00500413 addi x8,x0,5 + 80002cf4: 00000493 addi x9,x0,0 + 80002cf8: 2140006f jal x0,80002f0c + 80002cfc: 00008397 auipc x7,0x8 + 80002d00: 4a738393 addi x7,x7,1191 # 8000b1a3 + 80002d04: 00731863 bne x6,x7,80002d14 + 80002d08: 00600413 addi x8,x0,6 + 80002d0c: 00000493 addi x9,x0,0 + 80002d10: 1fc0006f jal x0,80002f0c + 80002d14: 00008397 auipc x7,0x8 + 80002d18: 4cd38393 addi x7,x7,1229 # 8000b1e1 + 80002d1c: 00731863 bne x6,x7,80002d2c + 80002d20: 00700413 addi x8,x0,7 + 80002d24: 00000493 addi x9,x0,0 + 80002d28: 1e40006f jal x0,80002f0c + 80002d2c: 00008397 auipc x7,0x8 + 80002d30: 0d038393 addi x7,x7,208 # 8000adfc + 80002d34: 00731863 bne x6,x7,80002d44 + 80002d38: 00100413 addi x8,x0,1 + 80002d3c: 00100493 addi x9,x0,1 + 80002d40: 1cc0006f jal x0,80002f0c + 80002d44: 00008397 auipc x7,0x8 + 80002d48: 1b838393 addi x7,x7,440 # 8000aefc + 80002d4c: 00731863 bne x6,x7,80002d5c + 80002d50: 00200413 addi x8,x0,2 + 80002d54: 00100493 addi x9,x0,1 + 80002d58: 1b40006f jal x0,80002f0c + 80002d5c: 00008397 auipc x7,0x8 + 80002d60: 29938393 addi x7,x7,665 # 8000aff5 + 80002d64: 00731863 bne x6,x7,80002d74 + 80002d68: 00300413 addi x8,x0,3 + 80002d6c: 00100493 addi x9,x0,1 + 80002d70: 19c0006f jal x0,80002f0c + 80002d74: 00008397 auipc x7,0x8 + 80002d78: 37538393 addi x7,x7,885 # 8000b0e9 + 80002d7c: 00731863 bne x6,x7,80002d8c + 80002d80: 00400413 addi x8,x0,4 + 80002d84: 00100493 addi x9,x0,1 + 80002d88: 1840006f jal x0,80002f0c + 80002d8c: 00008397 auipc x7,0x8 + 80002d90: 4ce38393 addi x7,x7,1230 # 8000b25a + 80002d94: 00731863 bne x6,x7,80002da4 + 80002d98: 00500413 addi x8,x0,5 + 80002d9c: 00100493 addi x9,x0,1 + 80002da0: 16c0006f jal x0,80002f0c + 80002da4: 00008397 auipc x7,0x8 + 80002da8: 09838393 addi x7,x7,152 # 8000ae3c + 80002dac: 00731863 bne x6,x7,80002dbc + 80002db0: 00100413 addi x8,x0,1 + 80002db4: 00200493 addi x9,x0,2 + 80002db8: 1540006f jal x0,80002f0c + 80002dbc: 00008397 auipc x7,0x8 + 80002dc0: 17e38393 addi x7,x7,382 # 8000af3a + 80002dc4: 00731863 bne x6,x7,80002dd4 + 80002dc8: 00200413 addi x8,x0,2 + 80002dcc: 00200493 addi x9,x0,2 + 80002dd0: 13c0006f jal x0,80002f0c + 80002dd4: 00008397 auipc x7,0x8 + 80002dd8: 25d38393 addi x7,x7,605 # 8000b031 + 80002ddc: 00731863 bne x6,x7,80002dec + 80002de0: 00300413 addi x8,x0,3 + 80002de4: 00200493 addi x9,x0,2 + 80002de8: 1240006f jal x0,80002f0c + 80002dec: 00008397 auipc x7,0x8 + 80002df0: 33a38393 addi x7,x7,826 # 8000b126 + 80002df4: 00731863 bne x6,x7,80002e04 + 80002df8: 00400413 addi x8,x0,4 + 80002dfc: 00200493 addi x9,x0,2 + 80002e00: 10c0006f jal x0,80002f0c + 80002e04: 00008397 auipc x7,0x8 + 80002e08: 49138393 addi x7,x7,1169 # 8000b295 + 80002e0c: 00731863 bne x6,x7,80002e1c + 80002e10: 00500413 addi x8,x0,5 + 80002e14: 00200493 addi x9,x0,2 + 80002e18: 0f40006f jal x0,80002f0c + 80002e1c: 00008397 auipc x7,0x8 + 80002e20: 06138393 addi x7,x7,97 # 8000ae7d + 80002e24: 00731863 bne x6,x7,80002e34 + 80002e28: 00100413 addi x8,x0,1 + 80002e2c: 00300493 addi x9,x0,3 + 80002e30: 0dc0006f jal x0,80002f0c + 80002e34: 00008397 auipc x7,0x8 + 80002e38: 14538393 addi x7,x7,325 # 8000af79 + 80002e3c: 00731863 bne x6,x7,80002e4c + 80002e40: 00200413 addi x8,x0,2 + 80002e44: 00300493 addi x9,x0,3 + 80002e48: 0c40006f jal x0,80002f0c + 80002e4c: 00008397 auipc x7,0x8 + 80002e50: 22238393 addi x7,x7,546 # 8000b06e + 80002e54: 00731863 bne x6,x7,80002e64 + 80002e58: 00300413 addi x8,x0,3 + 80002e5c: 00300493 addi x9,x0,3 + 80002e60: 0ac0006f jal x0,80002f0c + 80002e64: 00008397 auipc x7,0x8 + 80002e68: 30038393 addi x7,x7,768 # 8000b164 + 80002e6c: 00731863 bne x6,x7,80002e7c + 80002e70: 00400413 addi x8,x0,4 + 80002e74: 00300493 addi x9,x0,3 + 80002e78: 0940006f jal x0,80002f0c + 80002e7c: 00008397 auipc x7,0x8 + 80002e80: 45538393 addi x7,x7,1109 # 8000b2d1 + 80002e84: 00731863 bne x6,x7,80002e94 + 80002e88: 00500413 addi x8,x0,5 + 80002e8c: 00300493 addi x9,x0,3 + 80002e90: 07c0006f jal x0,80002f0c + 80002e94: 00008397 auipc x7,0x8 + 80002e98: 47a38393 addi x7,x7,1146 # 8000b30e + 80002e9c: 00731863 bne x6,x7,80002eac + 80002ea0: 00800413 addi x8,x0,8 + 80002ea4: 00000493 addi x9,x0,0 + 80002ea8: 0640006f jal x0,80002f0c + 80002eac: 00008397 auipc x7,0x8 + 80002eb0: 4b138393 addi x7,x7,1201 # 8000b35d + 80002eb4: 00731863 bne x6,x7,80002ec4 + 80002eb8: 00800413 addi x8,x0,8 + 80002ebc: 00000493 addi x9,x0,0 + 80002ec0: 04c0006f jal x0,80002f0c + 80002ec4: 00008397 auipc x7,0x8 + 80002ec8: 59438393 addi x7,x7,1428 # 8000b458 + 80002ecc: 00731863 bne x6,x7,80002edc + 80002ed0: 00800413 addi x8,x0,8 + 80002ed4: 00100493 addi x9,x0,1 + 80002ed8: 0340006f jal x0,80002f0c + 80002edc: 00008397 auipc x7,0x8 + 80002ee0: 67838393 addi x7,x7,1656 # 8000b554 + 80002ee4: 00731863 bne x6,x7,80002ef4 + 80002ee8: 00800413 addi x8,x0,8 + 80002eec: 00200493 addi x9,x0,2 + 80002ef0: 01c0006f jal x0,80002f0c + 80002ef4: 0340006f jal x0,80002f28 + +0000000080002ef8 : + 80002ef8: 00900413 addi x8,x0,9 + 80002efc: 00007817 auipc x16,0x7 + 80002f00: 6c480813 addi x16,x16,1732 # 8000a5c0 + 80002f04: 00882023 sw x8,0(x16) + 80002f08: 0300006f jal x0,80002f38 + +0000000080002f0c : + 80002f0c: 00007817 auipc x16,0x7 + 80002f10: 6b480813 addi x16,x16,1716 # 8000a5c0 + 80002f14: 00882023 sw x8,0(x16) + 80002f18: 00007817 auipc x16,0x7 + 80002f1c: 6ac80813 addi x16,x16,1708 # 8000a5c4 + 80002f20: 00982023 sw x9,0(x16) + 80002f24: 0140006f jal x0,80002f38 + +0000000080002f28 : + 80002f28: 00007817 auipc x16,0x7 + 80002f2c: 69880813 addi x16,x16,1688 # 8000a5c0 + 80002f30: 00082023 sw x0,0(x16) + 80002f34: 0040006f jal x0,80002f38 + +0000000080002f38 : + 80002f38: 0002e303 lwu x6,0(x5) + 80002f3c: 0042a383 lw x7,4(x5) + 80002f40: 02039393 slli x7,x7,0x20 + 80002f44: 00736333 or x6,x6,x7 + 80002f48: 10623423 sd x6,264(x4) # 108 + 80002f4c: 00035383 lhu x7,0(x6) + 80002f50: 0033f413 andi x8,x7,3 + 80002f54: 00300493 addi x9,x0,3 + 80002f58: 00941863 bne x8,x9,80002f68 + 80002f5c: 00235403 lhu x8,2(x6) + 80002f60: 01041413 slli x8,x8,0x10 + 80002f64: 0083e3b3 or x7,x7,x8 + 80002f68: 10722023 sw x7,256(x4) # 100 + 80002f6c: 0082e303 lwu x6,8(x5) + 80002f70: 00c2a383 lw x7,12(x5) + 80002f74: 02039393 slli x7,x7,0x20 + 80002f78: 00736333 or x6,x6,x7 + 80002f7c: 12623023 sd x6,288(x4) # 120 + +0000000080002f80 : + 80002f80: 00008517 auipc x10,0x8 + 80002f84: c3350513 addi x10,x10,-973 # 8000abb3 + 80002f88: 00000013 addi x0,x0,0 + 80002f8c: 00000013 addi x0,x0,0 + 80002f90: 00000013 addi x0,x0,0 + 80002f94: 00000013 addi x0,x0,0 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00027097 auipc x1,0x27 + 80002fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00008517 auipc x10,0x8 + 80002fc4: c3150513 addi x10,x10,-975 # 8000abf1 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00027097 auipc x1,0x27 + 80002fe4: 5c4080e7 jalr x1,1476(x1) # 8002a5a4 + +0000000080002fe8 : + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00008517 auipc x10,0x8 + 80003004: ca850513 addi x10,x10,-856 # 8000aca8 + 80003008: 00000013 addi x0,x0,0 + 8000300c: 00000013 addi x0,x0,0 + 80003010: 00000013 addi x0,x0,0 + 80003014: 00000013 addi x0,x0,0 + 80003018: 00000013 addi x0,x0,0 + 8000301c: 00000013 addi x0,x0,0 + 80003020: 00027097 auipc x1,0x27 + 80003024: 584080e7 jalr x1,1412(x1) # 8002a5a4 + +0000000080003028 : + 80003028: 00007517 auipc x10,0x7 + 8000302c: 58853503 ld x10,1416(x10) # 8000a5b0 + 80003030: 00027097 auipc x1,0x27 + 80003034: 574080e7 jalr x1,1396(x1) # 8002a5a4 + +0000000080003038 : + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00008517 auipc x10,0x8 + 80003044: c7a50513 addi x10,x10,-902 # 8000acba + 80003048: 00000013 addi x0,x0,0 + 8000304c: 00000013 addi x0,x0,0 + 80003050: 00000013 addi x0,x0,0 + 80003054: 00000013 addi x0,x0,0 + 80003058: 00000013 addi x0,x0,0 + 8000305c: 00000013 addi x0,x0,0 + 80003060: 00027097 auipc x1,0x27 + 80003064: 544080e7 jalr x1,1348(x1) # 8002a5a4 + 80003068: 00007517 auipc x10,0x7 + 8000306c: 42852503 lw x10,1064(x10) # 8000a490 + 80003070: 00300593 addi x11,x0,3 + 80003074: 52b50c63 beq x10,x11,800035ac + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: c3c50513 addi x10,x10,-964 # 8000acbc + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 00007517 auipc x10,0x7 + 800030ac: 4e852503 lw x10,1256(x10) # 8000a590 + 800030b0: 02000593 addi x11,x0,32 + 800030b4: 00357613 andi x12,x10,3 + 800030b8: 00300693 addi x13,x0,3 + 800030bc: 00d60463 beq x12,x13,800030c4 + 800030c0: 01000593 addi x11,x0,16 + 800030c4: 3f4010ef jal x1,800044b8 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00007517 auipc x10,0x7 + 800030e4: 51850513 addi x10,x10,1304 # 8000a5f8 + 800030e8: 00000013 addi x0,x0,0 + 800030ec: 00000013 addi x0,x0,0 + 800030f0: 00000013 addi x0,x0,0 + 800030f4: 00000013 addi x0,x0,0 + 800030f8: 00000013 addi x0,x0,0 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00027097 auipc x1,0x27 + 80003104: 4a4080e7 jalr x1,1188(x1) # 8002a5a4 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00008517 auipc x10,0x8 + 80003124: bb050513 addi x10,x10,-1104 # 8000acd0 + 80003128: 00000013 addi x0,x0,0 + 8000312c: 00000013 addi x0,x0,0 + 80003130: 00000013 addi x0,x0,0 + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00027097 auipc x1,0x27 + 80003144: 464080e7 jalr x1,1124(x1) # 8002a5a4 + 80003148: 00007517 auipc x10,0x7 + 8000314c: 45053503 ld x10,1104(x10) # 8000a598 + 80003150: 04000593 addi x11,x0,64 + 80003154: 364010ef jal x1,800044b8 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00007517 auipc x10,0x7 + 80003164: 49850513 addi x10,x10,1176 # 8000a5f8 + 80003168: 00000013 addi x0,x0,0 + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00027097 auipc x1,0x27 + 80003184: 424080e7 jalr x1,1060(x1) # 8002a5a4 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00008517 auipc x10,0x8 + 800031a4: 56750513 addi x10,x10,1383 # 8000b707 + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00027097 auipc x1,0x27 + 800031c4: 3e4080e7 jalr x1,996(x1) # 8002a5a4 + 800031c8: 00007517 auipc x10,0x7 + 800031cc: 2c852503 lw x10,712(x10) # 8000a490 + 800031d0: 00050663 beq x10,x0,800031dc + 800031d4: 00300593 addi x11,x0,3 + 800031d8: 04b51063 bne x10,x11,80003218 + 800031dc: 07800593 addi x11,x0,120 + 800031e0: 00007617 auipc x12,0x7 + 800031e4: 41860613 addi x12,x12,1048 # 8000a5f8 + 800031e8: 00000013 addi x0,x0,0 + 800031ec: 00000013 addi x0,x0,0 + 800031f0: 00000013 addi x0,x0,0 + 800031f4: 00000013 addi x0,x0,0 + 800031f8: 00000013 addi x0,x0,0 + 800031fc: 00000013 addi x0,x0,0 + 80003200: 00b60023 sb x11,0(x12) + 80003204: 00160613 addi x12,x12,1 + 80003208: 00007517 auipc x10,0x7 + 8000320c: 38c52503 lw x10,908(x10) # 8000a594 + 80003210: 324010ef jal x1,80004534 + 80003214: 1180006f jal x0,8000332c + +0000000080003218 : + 80003218: 00100593 addi x11,x0,1 + 8000321c: 04b50863 beq x10,x11,8000326c + 80003220: 00400593 addi x11,x0,4 + 80003224: 08b50a63 beq x10,x11,800032b8 + 80003228: 00500593 addi x11,x0,5 + 8000322c: 0cb50463 beq x10,x11,800032f4 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00008517 auipc x10,0x8 + 80003244: 5dd50513 addi x10,x10,1501 # 8000b81d + 80003248: 00000013 addi x0,x0,0 + 8000324c: 00000013 addi x0,x0,0 + 80003250: 00000013 addi x0,x0,0 + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00027097 auipc x1,0x27 + 80003264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80003268: 1000006f jal x0,80003368 + +000000008000326c : + 8000326c: 06600593 addi x11,x0,102 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00007617 auipc x12,0x7 + 80003284: 37860613 addi x12,x12,888 # 8000a5f8 + 80003288: 00000013 addi x0,x0,0 + 8000328c: 00000013 addi x0,x0,0 + 80003290: 00000013 addi x0,x0,0 + 80003294: 00000013 addi x0,x0,0 + 80003298: 00000013 addi x0,x0,0 + 8000329c: 00000013 addi x0,x0,0 + 800032a0: 00b60023 sb x11,0(x12) + 800032a4: 00160613 addi x12,x12,1 + 800032a8: 00007517 auipc x10,0x7 + 800032ac: 2ec52503 lw x10,748(x10) # 8000a594 + 800032b0: 284010ef jal x1,80004534 + 800032b4: 0780006f jal x0,8000332c + +00000000800032b8 : + 800032b8: 07600593 addi x11,x0,118 + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007617 auipc x12,0x7 + 800032c4: 33860613 addi x12,x12,824 # 8000a5f8 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00b60023 sb x11,0(x12) + 800032e4: 00160613 addi x12,x12,1 + 800032e8: 00007517 auipc x10,0x7 + 800032ec: 2ac52503 lw x10,684(x10) # 8000a594 + 800032f0: 244010ef jal x1,80004534 + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 40050513 addi x10,x10,1024 # 8000b700 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 0400006f jal x0,80003368 + +000000008000332c : + 8000332c: 00000013 addi x0,x0,0 + 80003330: 00000013 addi x0,x0,0 + 80003334: 00000013 addi x0,x0,0 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 2b850513 addi x10,x10,696 # 8000a5f8 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + +0000000080003368 : + 80003368: 00000013 addi x0,x0,0 + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 39850513 addi x10,x10,920 # 8000b718 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: 0e852503 lw x10,232(x10) # 8000a490 + 800033b0: 00100593 addi x11,x0,1 + 800033b4: 00b51c63 bne x10,x11,800033cc + 800033b8: 00007517 auipc x10,0x7 + 800033bc: 1e853503 ld x10,488(x10) # 8000a5a0 + 800033c0: 04000593 addi x11,x0,64 + 800033c4: 0f4010ef jal x1,800044b8 + 800033c8: 0140006f jal x0,800033dc + +00000000800033cc : + 800033cc: 00007517 auipc x10,0x7 + 800033d0: 1d453503 ld x10,468(x10) # 8000a5a0 + 800033d4: 04000593 addi x11,x0,64 + 800033d8: 0e0010ef jal x1,800044b8 + +00000000800033dc : + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00007517 auipc x10,0x7 + 800033e4: 21850513 addi x10,x10,536 # 8000a5f8 + 800033e8: 00000013 addi x0,x0,0 + 800033ec: 00000013 addi x0,x0,0 + 800033f0: 00000013 addi x0,x0,0 + 800033f4: 00000013 addi x0,x0,0 + 800033f8: 00000013 addi x0,x0,0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00027097 auipc x1,0x27 + 80003404: 1a4080e7 jalr x1,420(x1) # 8002a5a4 + 80003408: 00007517 auipc x10,0x7 + 8000340c: 1b052503 lw x10,432(x10) # 8000a5b8 + 80003410: 08051e63 bne x10,x0,800034ac + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00008517 auipc x10,0x8 + 80003424: 30f50513 addi x10,x10,783 # 8000b72f + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00027097 auipc x1,0x27 + 80003444: 164080e7 jalr x1,356(x1) # 8002a5a4 + 80003448: 00007517 auipc x10,0x7 + 8000344c: 04852503 lw x10,72(x10) # 8000a490 + 80003450: 00100593 addi x11,x0,1 + 80003454: 00b51c63 bne x10,x11,8000346c + 80003458: 00007517 auipc x10,0x7 + 8000345c: 15053503 ld x10,336(x10) # 8000a5a8 + 80003460: 04000593 addi x11,x0,64 + 80003464: 054010ef jal x1,800044b8 + 80003468: 0140006f jal x0,8000347c + +000000008000346c : + 8000346c: 00007517 auipc x10,0x7 + 80003470: 13c53503 ld x10,316(x10) # 8000a5a8 + 80003474: 04000593 addi x11,x0,64 + 80003478: 040010ef jal x1,800044b8 + +000000008000347c : + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 17850513 addi x10,x10,376 # 8000a5f8 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 5bd0006f jal x0,80004264 + +00000000800034ac : + 800034ac: 00100593 addi x11,x0,1 + 800034b0: 06b51e63 bne x10,x11,8000352c + +00000000800034b4 : + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 28650513 addi x10,x10,646 # 8000b746 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: 0c053503 ld x10,192(x10) # 8000a5a8 + 800034f0: 02000593 addi x11,x0,32 + 800034f4: 7c5000ef jal x1,800044b8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: 0f850513 addi x10,x10,248 # 8000a5f8 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 53d0006f jal x0,80004264 + +000000008000352c : + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 26450513 addi x10,x10,612 # 8000b7a4 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: 04053503 ld x10,64(x10) # 8000a5a8 + 80003570: 04000593 addi x11,x0,64 + 80003574: 745000ef jal x1,800044b8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: 07850513 addi x10,x10,120 # 8000a5f8 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 4bd0006f jal x0,80004264 + +00000000800035ac : + 800035ac: 00007417 auipc x8,0x7 + 800035b0: 01442403 lw x8,20(x8) # 8000a5c0 + 800035b4: 00900493 addi x9,x0,9 + 800035b8: 0a940c63 beq x8,x9,80003670 + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 28950513 addi x10,x10,649 # 8000b849 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 27550513 addi x10,x10,629 # 8000b875 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007817 auipc x16,0x7 + 8000362c: fa080813 addi x16,x16,-96 # 8000a5c8 + 80003630: 00083503 ld x10,0(x16) + 80003634: 00027097 auipc x1,0x27 + 80003638: f70080e7 jalr x1,-144(x1) # 8002a5a4 + 8000363c: 00000013 addi x0,x0,0 + 80003640: 00007517 auipc x10,0x7 + 80003644: 67a50513 addi x10,x10,1658 # 8000acba + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00027097 auipc x1,0x27 + 80003664: f44080e7 jalr x1,-188(x1) # 8002a5a4 + 80003668: 280404e3 beq x8,x0,800040f0 + 8000366c: 3400006f jal x0,800039ac + +0000000080003670 : + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00008517 auipc x10,0x8 + 80003684: 20550513 addi x10,x10,517 # 8000b885 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00027097 auipc x1,0x27 + 800036a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800036a8: 00007517 auipc x10,0x7 + 800036ac: f0053503 ld x10,-256(x10) # 8000a5a8 + 800036b0: 04000593 addi x11,x0,64 + 800036b4: 605000ef jal x1,800044b8 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00007517 auipc x10,0x7 + 800036c4: f3850513 addi x10,x10,-200 # 8000a5f8 + 800036c8: 00000013 addi x0,x0,0 + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00027097 auipc x1,0x27 + 800036e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00008517 auipc x10,0x8 + 80003704: 1b050513 addi x10,x10,432 # 8000b8b0 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00027097 auipc x1,0x27 + 80003724: e84080e7 jalr x1,-380(x1) # 8002a5a4 + 80003728: 00007517 auipc x10,0x7 + 8000372c: e7853503 ld x10,-392(x10) # 8000a5a0 + 80003730: 04000593 addi x11,x0,64 + 80003734: 585000ef jal x1,800044b8 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00007517 auipc x10,0x7 + 80003744: eb850513 addi x10,x10,-328 # 8000a5f8 + 80003748: 00000013 addi x0,x0,0 + 8000374c: 00000013 addi x0,x0,0 + 80003750: 00000013 addi x0,x0,0 + 80003754: 00000013 addi x0,x0,0 + 80003758: 00000013 addi x0,x0,0 + 8000375c: 00000013 addi x0,x0,0 + 80003760: 00027097 auipc x1,0x27 + 80003764: e44080e7 jalr x1,-444(x1) # 8002a5a4 + 80003768: 00007317 auipc x6,0x7 + 8000376c: e3833303 ld x6,-456(x6) # 8000a5a0 + 80003770: 00007397 auipc x7,0x7 + 80003774: e383b383 ld x7,-456(x7) # 8000a5a8 + 80003778: 10736a63 bltu x6,x7,8000388c + +000000008000377c : + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00008517 auipc x10,0x8 + 80003784: 15f50513 addi x10,x10,351 # 8000b8df + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 18750513 addi x10,x10,391 # 8000b947 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 00007317 auipc x6,0x7 + 800037ec: db833303 ld x6,-584(x6) # 8000a5a0 + 800037f0: 00007397 auipc x7,0x7 + 800037f4: db83b383 ld x7,-584(x7) # 8000a5a8 + 800037f8: 40730533 sub x10,x6,x7 + 800037fc: 04000593 addi x11,x0,64 + 80003800: 4b9000ef jal x1,800044b8 + 80003804: 00000013 addi x0,x0,0 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00007517 auipc x10,0x7 + 80003824: dd850513 addi x10,x10,-552 # 8000a5f8 + 80003828: 00000013 addi x0,x0,0 + 8000382c: 00000013 addi x0,x0,0 + 80003830: 00000013 addi x0,x0,0 + 80003834: 00000013 addi x0,x0,0 + 80003838: 00000013 addi x0,x0,0 + 8000383c: 00000013 addi x0,x0,0 + 80003840: 00027097 auipc x1,0x27 + 80003844: d64080e7 jalr x1,-668(x1) # 8002a5a4 + 80003848: 00000013 addi x0,x0,0 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 10e50513 addi x10,x10,270 # 8000b96e + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 00027097 auipc x1,0x27 + 80003884: d24080e7 jalr x1,-732(x1) # 8002a5a4 + 80003888: 1dd0006f jal x0,80004264 + +000000008000388c : + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 06b50513 addi x10,x10,107 # 8000b90b + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 00027097 auipc x1,0x27 + 800038c4: ce4080e7 jalr x1,-796(x1) # 8002a5a4 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 06750513 addi x10,x10,103 # 8000b947 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 00027097 auipc x1,0x27 + 80003904: ca4080e7 jalr x1,-860(x1) # 8002a5a4 + 80003908: 00007317 auipc x6,0x7 + 8000390c: ca033303 ld x6,-864(x6) # 8000a5a8 + 80003910: 00007397 auipc x7,0x7 + 80003914: c903b383 ld x7,-880(x7) # 8000a5a0 + 80003918: 40730533 sub x10,x6,x7 + 8000391c: 04000593 addi x11,x0,64 + 80003920: 399000ef jal x1,800044b8 + 80003924: 00000013 addi x0,x0,0 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 00007517 auipc x10,0x7 + 80003944: cb850513 addi x10,x10,-840 # 8000a5f8 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00027097 auipc x1,0x27 + 80003964: c44080e7 jalr x1,-956(x1) # 8002a5a4 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + 80003980: 00008517 auipc x10,0x8 + 80003984: 0d650513 addi x10,x10,214 # 8000ba56 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00027097 auipc x1,0x27 + 800039a4: c04080e7 jalr x1,-1020(x1) # 8002a5a4 + 800039a8: 0bd0006f jal x0,80004264 + +00000000800039ac : + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00008517 auipc x10,0x8 + 800039c4: 17d50513 addi x10,x10,381 # 8000bb3d + 800039c8: 00000013 addi x0,x0,0 + 800039cc: 00000013 addi x0,x0,0 + 800039d0: 00000013 addi x0,x0,0 + 800039d4: 00000013 addi x0,x0,0 + 800039d8: 00000013 addi x0,x0,0 + 800039dc: 00000013 addi x0,x0,0 + 800039e0: 00027097 auipc x1,0x27 + 800039e4: bc4080e7 jalr x1,-1084(x1) # 8002a5a4 + 800039e8: 00007517 auipc x10,0x7 + 800039ec: bdc52503 lw x10,-1060(x10) # 8000a5c4 + 800039f0: 04050a63 beq x10,x0,80003a44 + 800039f4: 00100593 addi x11,x0,1 + 800039f8: 08b50663 beq x10,x11,80003a84 + 800039fc: 00200593 addi x11,x0,2 + 80003a00: 0cb50263 beq x10,x11,80003ac4 + 80003a04: 00300593 addi x11,x0,3 + 80003a08: 0eb50e63 beq x10,x11,80003b04 + 80003a0c: 00000013 addi x0,x0,0 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 15950513 addi x10,x10,345 # 8000bb79 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 1000006f jal x0,80003b40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: 0f750513 addi x10,x10,247 # 8000bb57 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 0c00006f jal x0,80003b40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: 0bf50513 addi x10,x10,191 # 8000bb5f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 0800006f jal x0,80003b40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: 08750513 addi x10,x10,135 # 8000bb67 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 0400006f jal x0,80003b40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: 05050513 addi x10,x10,80 # 8000bb70 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + +0000000080003b40 : + 80003b40: 00027097 auipc x1,0x27 + 80003b44: a64080e7 jalr x1,-1436(x1) # 8002a5a4 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: 02250513 addi x10,x10,34 # 8000bb82 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 00027097 auipc x1,0x27 + 80003b84: a24080e7 jalr x1,-1500(x1) # 8002a5a4 + 80003b88: 00007517 auipc x10,0x7 + 80003b8c: a3852503 lw x10,-1480(x10) # 8000a5c0 + 80003b90: 00100593 addi x11,x0,1 + 80003b94: 06b50863 beq x10,x11,80003c04 + 80003b98: 00200593 addi x11,x0,2 + 80003b9c: 0ab50463 beq x10,x11,80003c44 + 80003ba0: 00300593 addi x11,x0,3 + 80003ba4: 0eb50063 beq x10,x11,80003c84 + 80003ba8: 00400593 addi x11,x0,4 + 80003bac: 10b50c63 beq x10,x11,80003cc4 + 80003bb0: 00500593 addi x11,x0,5 + 80003bb4: 14b50863 beq x10,x11,80003d04 + 80003bb8: 00600593 addi x11,x0,6 + 80003bbc: 18b50463 beq x10,x11,80003d44 + 80003bc0: 00700593 addi x11,x0,7 + 80003bc4: 1cb50063 beq x10,x11,80003d84 + 80003bc8: 00800593 addi x11,x0,8 + 80003bcc: 1eb50c63 beq x10,x11,80003dc4 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: 0f950513 addi x10,x10,249 # 8000bcd9 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 2000006f jal x0,80003e00 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: f7c50513 addi x10,x10,-132 # 8000bb9c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + 80003c40: 1c00006f jal x0,80003e00 + +0000000080003c44 : + 80003c44: 00000013 addi x0,x0,0 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: f6d50513 addi x10,x10,-147 # 8000bbcd + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 1800006f jal x0,80003e00 + +0000000080003c84 : + 80003c84: 00000013 addi x0,x0,0 + 80003c88: 00000013 addi x0,x0,0 + 80003c8c: 00000013 addi x0,x0,0 + 80003c90: 00000013 addi x0,x0,0 + 80003c94: 00000013 addi x0,x0,0 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00008517 auipc x10,0x8 + 80003ca4: f4d50513 addi x10,x10,-179 # 8000bbed + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 1400006f jal x0,80003e00 + +0000000080003cc4 : + 80003cc4: 00000013 addi x0,x0,0 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: f2b50513 addi x10,x10,-213 # 8000bc0b + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 1000006f jal x0,80003e00 + +0000000080003d04 : + 80003d04: 00000013 addi x0,x0,0 + 80003d08: 00000013 addi x0,x0,0 + 80003d0c: 00000013 addi x0,x0,0 + 80003d10: 00000013 addi x0,x0,0 + 80003d14: 00000013 addi x0,x0,0 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00008517 auipc x10,0x8 + 80003d24: f0a50513 addi x10,x10,-246 # 8000bc2a + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 0c00006f jal x0,80003e00 + +0000000080003d44 : + 80003d44: 00000013 addi x0,x0,0 + 80003d48: 00000013 addi x0,x0,0 + 80003d4c: 00000013 addi x0,x0,0 + 80003d50: 00000013 addi x0,x0,0 + 80003d54: 00000013 addi x0,x0,0 + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: ef250513 addi x10,x10,-270 # 8000bc52 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 0800006f jal x0,80003e00 + +0000000080003d84 : + 80003d84: 00000013 addi x0,x0,0 + 80003d88: 00000013 addi x0,x0,0 + 80003d8c: 00000013 addi x0,x0,0 + 80003d90: 00000013 addi x0,x0,0 + 80003d94: 00000013 addi x0,x0,0 + 80003d98: 00000013 addi x0,x0,0 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: ede50513 addi x10,x10,-290 # 8000bc7e + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 0400006f jal x0,80003e00 + +0000000080003dc4 : + 80003dc4: 00000013 addi x0,x0,0 + 80003dc8: 00000013 addi x0,x0,0 + 80003dcc: 00000013 addi x0,x0,0 + 80003dd0: 00000013 addi x0,x0,0 + 80003dd4: 00000013 addi x0,x0,0 + 80003dd8: 00000013 addi x0,x0,0 + 80003ddc: 00000013 addi x0,x0,0 + 80003de0: 00008517 auipc x10,0x8 + 80003de4: eca50513 addi x10,x10,-310 # 8000bcaa + 80003de8: 00000013 addi x0,x0,0 + 80003dec: 00000013 addi x0,x0,0 + 80003df0: 00000013 addi x0,x0,0 + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + +0000000080003e00 : + 80003e00: 00026097 auipc x1,0x26 + 80003e04: 7a4080e7 jalr x1,1956(x1) # 8002a5a4 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00008517 auipc x10,0x8 + 80003e24: ec850513 addi x10,x10,-312 # 8000bce8 + 80003e28: 00000013 addi x0,x0,0 + 80003e2c: 00000013 addi x0,x0,0 + 80003e30: 00000013 addi x0,x0,0 + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00026097 auipc x1,0x26 + 80003e44: 764080e7 jalr x1,1892(x1) # 8002a5a4 + 80003e48: 00006517 auipc x10,0x6 + 80003e4c: 76053503 ld x10,1888(x10) # 8000a5a8 + 80003e50: 04000593 addi x11,x0,64 + 80003e54: 664000ef jal x1,800044b8 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00006517 auipc x10,0x6 + 80003e64: 79850513 addi x10,x10,1944 # 8000a5f8 + 80003e68: 00000013 addi x0,x0,0 + 80003e6c: 00000013 addi x0,x0,0 + 80003e70: 00000013 addi x0,x0,0 + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00026097 auipc x1,0x26 + 80003e84: 724080e7 jalr x1,1828(x1) # 8002a5a4 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00008517 auipc x10,0x8 + 80003ea4: e5f50513 addi x10,x10,-417 # 8000bcff + 80003ea8: 00000013 addi x0,x0,0 + 80003eac: 00000013 addi x0,x0,0 + 80003eb0: 00000013 addi x0,x0,0 + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00026097 auipc x1,0x26 + 80003ec4: 6e4080e7 jalr x1,1764(x1) # 8002a5a4 + 80003ec8: 00006517 auipc x10,0x6 + 80003ecc: 6d853503 ld x10,1752(x10) # 8000a5a0 + 80003ed0: 04000593 addi x11,x0,64 + 80003ed4: 5e4000ef jal x1,800044b8 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00006517 auipc x10,0x6 + 80003ee4: 71850513 addi x10,x10,1816 # 8000a5f8 + 80003ee8: 00000013 addi x0,x0,0 + 80003eec: 00000013 addi x0,x0,0 + 80003ef0: 00000013 addi x0,x0,0 + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00026097 auipc x1,0x26 + 80003f04: 6a4080e7 jalr x1,1700(x1) # 8002a5a4 + 80003f08: 00006517 auipc x10,0x6 + 80003f0c: 6b852503 lw x10,1720(x10) # 8000a5c0 + 80003f10: 00200593 addi x11,x0,2 + 80003f14: 08b51463 bne x10,x11,80003f9c + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00008517 auipc x10,0x8 + 80003f24: df650513 addi x10,x10,-522 # 8000bd16 + 80003f28: 00000013 addi x0,x0,0 + 80003f2c: 00000013 addi x0,x0,0 + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00026097 auipc x1,0x26 + 80003f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80003f48: 00006517 auipc x10,0x6 + 80003f4c: 66053503 ld x10,1632(x10) # 8000a5a8 + 80003f50: 284000ef jal x1,800041d4 + 80003f54: 00026097 auipc x1,0x26 + 80003f58: 650080e7 jalr x1,1616(x1) # 8002a5a4 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00008517 auipc x10,0x8 + 80003f64: dcd50513 addi x10,x10,-563 # 8000bd2d + 80003f68: 00000013 addi x0,x0,0 + 80003f6c: 00000013 addi x0,x0,0 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00026097 auipc x1,0x26 + 80003f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80003f88: 00006517 auipc x10,0x6 + 80003f8c: 61853503 ld x10,1560(x10) # 8000a5a0 + 80003f90: 244000ef jal x1,800041d4 + 80003f94: 00026097 auipc x1,0x26 + 80003f98: 610080e7 jalr x1,1552(x1) # 8002a5a4 + +0000000080003f9c : + 80003f9c: 00000097 auipc x1,0x0 + 80003fa0: 314080e7 jalr x1,788(x1) # 800042b0 + 80003fa4: 00006517 auipc x10,0x6 + 80003fa8: 61c52503 lw x10,1564(x10) # 8000a5c0 + 80003fac: 00100593 addi x11,x0,1 + 80003fb0: 02b51e63 bne x10,x11,80003fec + 80003fb4: 00000013 addi x0,x0,0 + 80003fb8: 00000013 addi x0,x0,0 + 80003fbc: 00000013 addi x0,x0,0 + 80003fc0: 00008517 auipc x10,0x8 + 80003fc4: de350513 addi x10,x10,-541 # 8000bda3 + 80003fc8: 00000013 addi x0,x0,0 + 80003fcc: 00000013 addi x0,x0,0 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00026097 auipc x1,0x26 + 80003fe4: 5c4080e7 jalr x1,1476(x1) # 8002a5a4 + 80003fe8: 27c0006f jal x0,80004264 + 80003fec: 00200593 addi x11,x0,2 + 80003ff0: 02b51e63 bne x10,x11,8000402c + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00008517 auipc x10,0x8 + 80004004: e7950513 addi x10,x10,-391 # 8000be79 + 80004008: 00000013 addi x0,x0,0 + 8000400c: 00000013 addi x0,x0,0 + 80004010: 00000013 addi x0,x0,0 + 80004014: 00000013 addi x0,x0,0 + 80004018: 00000013 addi x0,x0,0 + 8000401c: 00000013 addi x0,x0,0 + 80004020: 00026097 auipc x1,0x26 + 80004024: 584080e7 jalr x1,1412(x1) # 8002a5a4 + 80004028: 23c0006f jal x0,80004264 + 8000402c: 00300593 addi x11,x0,3 + 80004030: 02b51e63 bne x10,x11,8000406c + 80004034: 00000013 addi x0,x0,0 + 80004038: 00000013 addi x0,x0,0 + 8000403c: 00000013 addi x0,x0,0 + 80004040: 00008517 auipc x10,0x8 + 80004044: f2c50513 addi x10,x10,-212 # 8000bf6c + 80004048: 00000013 addi x0,x0,0 + 8000404c: 00000013 addi x0,x0,0 + 80004050: 00000013 addi x0,x0,0 + 80004054: 00000013 addi x0,x0,0 + 80004058: 00000013 addi x0,x0,0 + 8000405c: 00000013 addi x0,x0,0 + 80004060: 00026097 auipc x1,0x26 + 80004064: 544080e7 jalr x1,1348(x1) # 8002a5a4 + 80004068: 1fc0006f jal x0,80004264 + 8000406c: 00400593 addi x11,x0,4 + 80004070: 02b51e63 bne x10,x11,800040ac + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00008517 auipc x10,0x8 + 80004084: fe750513 addi x10,x10,-25 # 8000c067 + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00026097 auipc x1,0x26 + 800040a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800040a8: 1bc0006f jal x0,80004264 + 800040ac: 00500593 addi x11,x0,5 + 800040b0: 02b51e63 bne x10,x11,800040ec + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00008517 auipc x10,0x8 + 800040c4: 08e50513 addi x10,x10,142 # 8000c14e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + 800040e8: 17c0006f jal x0,80004264 + 800040ec: 1780006f jal x0,80004264 + +00000000800040f0 : + 800040f0: 00000013 addi x0,x0,0 + 800040f4: 00000013 addi x0,x0,0 + 800040f8: 00000013 addi x0,x0,0 + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00008517 auipc x10,0x8 + 80004104: c5b50513 addi x10,x10,-933 # 8000bd5b + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006617 auipc x12,0x6 + 8000412c: 4b063603 ld x12,1200(x12) # 8000a5d8 + 80004130: 00000013 addi x0,x0,0 + 80004134: 00000013 addi x0,x0,0 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00007517 auipc x10,0x7 + 80004144: c0450513 addi x10,x10,-1020 # 8000ad44 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00065503 lhu x10,0(x12) + 8000416c: 01000593 addi x11,x0,16 + 80004170: 00357413 andi x8,x10,3 + 80004174: 00300493 addi x9,x0,3 + 80004178: 00941a63 bne x8,x9,8000418c + 8000417c: 00265403 lhu x8,2(x12) + 80004180: 01041413 slli x8,x8,0x10 + 80004184: 00856533 or x10,x10,x8 + 80004188: 02000593 addi x11,x0,32 + 8000418c: 32c000ef jal x1,800044b8 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00006517 auipc x10,0x6 + 800041a4: 45850513 addi x10,x10,1112 # 8000a5f8 + 800041a8: 00000013 addi x0,x0,0 + 800041ac: 00000013 addi x0,x0,0 + 800041b0: 00000013 addi x0,x0,0 + 800041b4: 00000013 addi x0,x0,0 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00026097 auipc x1,0x26 + 800041c4: 3e4080e7 jalr x1,996(x1) # 8002a5a4 + 800041c8: 00000097 auipc x1,0x0 + 800041cc: 0e8080e7 jalr x1,232(x1) # 800042b0 + 800041d0: 0940006f jal x0,80004264 + +00000000800041d4 : + 800041d4: 02054463 blt x10,x0,800041fc + +00000000800041d8 : + 800041d8: 01800593 addi x11,x0,24 + 800041dc: 04b55863 bge x10,x11,8000422c + 800041e0: 00006597 auipc x11,0x6 + 800041e4: 44058593 addi x11,x11,1088 # 8000a620 + 800041e8: 00251613 slli x12,x10,0x2 + 800041ec: 00351613 slli x12,x10,0x3 + 800041f0: 00c585b3 add x11,x11,x12 + 800041f4: 0005b503 ld x10,0(x11) + 800041f8: 00008067 jalr x0,0(x1) + +00000000800041fc : + 800041fc: 00100593 addi x11,x0,1 + 80004200: 03f59593 slli x11,x11,0x3f + 80004204: 00b54533 xor x10,x10,x11 + 80004208: 01000593 addi x11,x0,16 + 8000420c: 02b55063 bge x10,x11,8000422c + 80004210: 00006597 auipc x11,0x6 + 80004214: 4d058593 addi x11,x11,1232 # 8000a6e0 + 80004218: 00251613 slli x12,x10,0x2 + 8000421c: 00351613 slli x12,x10,0x3 + 80004220: 00c585b3 add x11,x11,x12 + 80004224: 0005b503 ld x10,0(x11) + 80004228: 00008067 jalr x0,0(x1) + +000000008000422c : + 8000422c: 00000013 addi x0,x0,0 + 80004230: 00000013 addi x0,x0,0 + 80004234: 00000013 addi x0,x0,0 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00007517 auipc x10,0x7 + 80004244: 91e50513 addi x10,x10,-1762 # 8000ab5e + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00008067 jalr x0,0(x1) + +0000000080004264 : + 80004264: 00000013 addi x0,x0,0 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 57c50513 addi x10,x10,1404 # 8000b7fc + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + +00000000800042a8 : + 800042a8: 00026097 auipc x1,0x26 + 800042ac: 35c080e7 jalr x1,860(x1) # 8002a604 + +00000000800042b0 : + 800042b0: 00006617 auipc x12,0x6 + 800042b4: 32060613 addi x12,x12,800 # 8000a5d0 + 800042b8: 00163023 sd x1,0(x12) + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00007517 auipc x10,0x7 + 800042c4: aa550513 addi x10,x10,-1371 # 8000ad65 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006517 auipc x10,0x6 + 800042ec: 2f053503 ld x10,752(x10) # 8000a5d8 + 800042f0: 04000593 addi x11,x0,64 + 800042f4: 1c4000ef jal x1,800044b8 + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006517 auipc x10,0x6 + 80004304: 2f850513 addi x10,x10,760 # 8000a5f8 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 00026097 auipc x1,0x26 + 80004324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80004328: 00000013 addi x0,x0,0 + 8000432c: 00000013 addi x0,x0,0 + 80004330: 00000013 addi x0,x0,0 + 80004334: 00000013 addi x0,x0,0 + 80004338: 00000013 addi x0,x0,0 + 8000433c: 00000013 addi x0,x0,0 + 80004340: 00007517 auipc x10,0x7 + 80004344: a3550513 addi x10,x10,-1483 # 8000ad75 + 80004348: 00000013 addi x0,x0,0 + 8000434c: 00000013 addi x0,x0,0 + 80004350: 00000013 addi x0,x0,0 + 80004354: 00000013 addi x0,x0,0 + 80004358: 00000013 addi x0,x0,0 + 8000435c: 00000013 addi x0,x0,0 + 80004360: 00026097 auipc x1,0x26 + 80004364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80004368: 00006517 auipc x10,0x6 + 8000436c: 27853503 ld x10,632(x10) # 8000a5e0 + 80004370: 04000593 addi x11,x0,64 + 80004374: 144000ef jal x1,800044b8 + 80004378: 00000013 addi x0,x0,0 + 8000437c: 00000013 addi x0,x0,0 + 80004380: 00006517 auipc x10,0x6 + 80004384: 27850513 addi x10,x10,632 # 8000a5f8 + 80004388: 00000013 addi x0,x0,0 + 8000438c: 00000013 addi x0,x0,0 + 80004390: 00000013 addi x0,x0,0 + 80004394: 00000013 addi x0,x0,0 + 80004398: 00000013 addi x0,x0,0 + 8000439c: 00000013 addi x0,x0,0 + 800043a0: 00026097 auipc x1,0x26 + 800043a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800043a8: 00000013 addi x0,x0,0 + 800043ac: 00000013 addi x0,x0,0 + 800043b0: 00000013 addi x0,x0,0 + 800043b4: 00000013 addi x0,x0,0 + 800043b8: 00000013 addi x0,x0,0 + 800043bc: 00000013 addi x0,x0,0 + 800043c0: 00007517 auipc x10,0x7 + 800043c4: 9c550513 addi x10,x10,-1595 # 8000ad85 + 800043c8: 00000013 addi x0,x0,0 + 800043cc: 00000013 addi x0,x0,0 + 800043d0: 00000013 addi x0,x0,0 + 800043d4: 00000013 addi x0,x0,0 + 800043d8: 00000013 addi x0,x0,0 + 800043dc: 00000013 addi x0,x0,0 + 800043e0: 00026097 auipc x1,0x26 + 800043e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800043e8: 00006517 auipc x10,0x6 + 800043ec: 20053503 ld x10,512(x10) # 8000a5e8 + 800043f0: 04000593 addi x11,x0,64 + 800043f4: 0c4000ef jal x1,800044b8 + 800043f8: 00000013 addi x0,x0,0 + 800043fc: 00000013 addi x0,x0,0 + 80004400: 00006517 auipc x10,0x6 + 80004404: 1f850513 addi x10,x10,504 # 8000a5f8 + 80004408: 00000013 addi x0,x0,0 + 8000440c: 00000013 addi x0,x0,0 + 80004410: 00000013 addi x0,x0,0 + 80004414: 00000013 addi x0,x0,0 + 80004418: 00000013 addi x0,x0,0 + 8000441c: 00000013 addi x0,x0,0 + 80004420: 00026097 auipc x1,0x26 + 80004424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80004428: 00000013 addi x0,x0,0 + 8000442c: 00000013 addi x0,x0,0 + 80004430: 00000013 addi x0,x0,0 + 80004434: 00000013 addi x0,x0,0 + 80004438: 00000013 addi x0,x0,0 + 8000443c: 00000013 addi x0,x0,0 + 80004440: 00007517 auipc x10,0x7 + 80004444: 95550513 addi x10,x10,-1707 # 8000ad95 + 80004448: 00000013 addi x0,x0,0 + 8000444c: 00000013 addi x0,x0,0 + 80004450: 00000013 addi x0,x0,0 + 80004454: 00000013 addi x0,x0,0 + 80004458: 00000013 addi x0,x0,0 + 8000445c: 00000013 addi x0,x0,0 + 80004460: 00026097 auipc x1,0x26 + 80004464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80004468: 00006517 auipc x10,0x6 + 8000446c: 18853503 ld x10,392(x10) # 8000a5f0 + 80004470: 04000593 addi x11,x0,64 + 80004474: 044000ef jal x1,800044b8 + 80004478: 00000013 addi x0,x0,0 + 8000447c: 00000013 addi x0,x0,0 + 80004480: 00006517 auipc x10,0x6 + 80004484: 17850513 addi x10,x10,376 # 8000a5f8 + 80004488: 00000013 addi x0,x0,0 + 8000448c: 00000013 addi x0,x0,0 + 80004490: 00000013 addi x0,x0,0 + 80004494: 00000013 addi x0,x0,0 + 80004498: 00000013 addi x0,x0,0 + 8000449c: 00000013 addi x0,x0,0 + 800044a0: 00026097 auipc x1,0x26 + 800044a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800044a8: 00006617 auipc x12,0x6 + 800044ac: 12860613 addi x12,x12,296 # 8000a5d0 + 800044b0: 00063083 ld x1,0(x12) + 800044b4: 00008067 jalr x0,0(x1) + +00000000800044b8 : + 800044b8: 00000013 addi x0,x0,0 + 800044bc: 00000013 addi x0,x0,0 + 800044c0: 00006617 auipc x12,0x6 + 800044c4: 13860613 addi x12,x12,312 # 8000a5f8 + 800044c8: 00000013 addi x0,x0,0 + 800044cc: 00000013 addi x0,x0,0 + 800044d0: 00000013 addi x0,x0,0 + 800044d4: 00000013 addi x0,x0,0 + 800044d8: 00000013 addi x0,x0,0 + 800044dc: 00000013 addi x0,x0,0 + 800044e0: 03000693 addi x13,x0,48 + 800044e4: 00d60023 sb x13,0(x12) + 800044e8: 07800693 addi x13,x0,120 + 800044ec: 00d600a3 sb x13,1(x12) + 800044f0: 00260613 addi x12,x12,2 + 800044f4: 00058693 addi x13,x11,0 + +00000000800044f8 : + 800044f8: ffc68693 addi x13,x13,-4 + 800044fc: 00d55733 srl x14,x10,x13 + 80004500: 00f77713 andi x14,x14,15 + 80004504: 00a00793 addi x15,x0,10 + 80004508: 00f74663 blt x14,x15,80004514 + 8000450c: 05770713 addi x14,x14,87 + 80004510: 0080006f jal x0,80004518 + +0000000080004514 : + 80004514: 03070713 addi x14,x14,48 + +0000000080004518 : + 80004518: 00e60023 sb x14,0(x12) + 8000451c: 00160613 addi x12,x12,1 + 80004520: fc069ce3 bne x13,x0,800044f8 + 80004524: 00a00693 addi x13,x0,10 + 80004528: 00d60023 sb x13,0(x12) + 8000452c: 000600a3 sb x0,1(x12) + 80004530: 00008067 jalr x0,0(x1) + +0000000080004534 : + 80004534: 00a00693 addi x13,x0,10 + 80004538: 02d54663 blt x10,x13,80004564 + 8000453c: ff650513 addi x10,x10,-10 + 80004540: 03100713 addi x14,x0,49 + 80004544: 00d54c63 blt x10,x13,8000455c + 80004548: ff650513 addi x10,x10,-10 + 8000454c: 03200713 addi x14,x0,50 + 80004550: 00d54663 blt x10,x13,8000455c + 80004554: ff650513 addi x10,x10,-10 + 80004558: 03300713 addi x14,x0,51 + 8000455c: 00e60023 sb x14,0(x12) + 80004560: 00160613 addi x12,x12,1 + 80004564: 03050513 addi x10,x10,48 + 80004568: 00a60023 sb x10,0(x12) + 8000456c: 00a00693 addi x13,x0,10 + 80004570: 00d600a3 sb x13,1(x12) + 80004574: 00060123 sb x0,2(x12) + 80004578: 00008067 jalr x0,0(x1) + 8000457c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 47038393 addi x7,x7,1136 # 80002478 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 45838393 addi x7,x7,1112 # 80002478 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 44038393 addi x7,x7,1088 # 80002478 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 42c38393 addi x7,x7,1068 # 80002478 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 42038393 addi x7,x7,1056 # 80002478 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 3ec38393 addi x7,x7,1004 # 80002478 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 53430313 addi x6,x6,1332 # 800015cc + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 3d438393 addi x7,x7,980 # 80002478 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 51c30313 addi x6,x6,1308 # 800015cc + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 3bc38393 addi x7,x7,956 # 80002478 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 50430313 addi x6,x6,1284 # 800015cc + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 3a438393 addi x7,x7,932 # 80002478 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 39c78793 addi x15,x15,924 # 800015dc + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: da010113 addi x2,x2,-608 # 8000c280 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 46018193 addi x3,x3,1120 # 80002980 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b825 .word 0x8000b825 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 61828293 addi x5,x5,1560 # 80029c00 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 5f828293 addi x5,x5,1528 # 80029c00 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zkne-aes64ks2-00.elf.objdump b/riscv-tests/rv64-Zkne-aes64ks2-00.elf.objdump new file mode 100644 index 0000000..cbe4892 --- /dev/null +++ b/riscv-tests/rv64-Zkne-aes64ks2-00.elf.objdump @@ -0,0 +1,17095 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64ks2-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zkne/Zkne-aes64ks2-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000038680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x0000000000009900 memsz 0x0000000000009900 flags r-x + LOAD off 0x000000000000b000 vaddr 0x000000008000c000 paddr 0x000000008000c000 align 2**12 + filesz 0x000000000002d680 memsz 0x000000000002d680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 000098c0 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 0002cd20 000000008000c000 000000008000c000 0000b000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080038e00 0000000080038e00 00037e00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080039000 0000000080039000 00038000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00038680 2**0 + CONTENTS, READONLY + 6 .debug_line 000031be 0000000000000000 0000000000000000 000386bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007e 0000000000000000 0000000000000000 0003b879 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0003b8f7 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0003b91a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 0003b930 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008c 0000000000000000 0000000000000000 0003b970 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0003b9fc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +000000008000c000 l d .data 0000000000000000 .data +0000000080038e00 l d .tohost 0000000000000000 .tohost +0000000080039000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line 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+0000000080013550 l .data 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +0000000080003484 l .text.rvtest 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800135bc l .data 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034b8 l .text.rvtest 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080013628 l .data 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034ec l .text.rvtest 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +000000008001368c l .data 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003520 l .text.rvtest 0000000000000000 Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +00000000800136f0 l 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environment and declare main entry point +RVTEST_BEGIN + 80000000: 00039097 auipc x1,0x39 + 80000004: 0e008093 addi x1,x1,224 # 800390e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xeff4ee8ecf9dd120 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x8) # load rs2: x8 = 0xfef14da62de48e1f + 80000048: 0001b403 ld x8,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zkne_aes64ks2_cg_cp_rs1_b0: + aes64ks2 x16, x0, x8 # perform operation + 80000050: 7e800833 aes64ks2 x16,x0,x8 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zkne_aes64ks2_cg_cp_rs1_b0, Zkne_aes64ks2_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01020c63 beq x4,x16,80000070 + 8000005c: 4a5072ef jal x5,80007d00 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 8000e470 .word 0x8000e470 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6a5f62f531c119e0 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs2: x13 = 0x3645b8bb9a2587e7 + 8000007c: 0001b683 ld x13,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zkne_aes64ks2_cg_cp_rs1_b1: + aes64ks2 x25, x1, x13 # perform operation + 80000084: 7ed08cb3 aes64ks2 x25,x1,x13 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zkne_aes64ks2_cg_cp_rs1_b1, Zkne_aes64ks2_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01920c63 beq x4,x25,800000a4 + 80000090: 471072ef jal x5,80007d00 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 8000e4a5 .word 0x8000e4a5 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x25, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010c93 addi x25,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x36ddf4de4d4f9835 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0x988ea4fa7738b30d + 800000b4: 0001ba03 ld x20,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zkne_aes64ks2_cg_cp_rs1_b2: + aes64ks2 x22, x2, x20 # perform operation + 800000bc: 7f410b33 aes64ks2 x22,x2,x20 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes64ks2_cg_cp_rs1_b2, Zkne_aes64ks2_cg_cp_rs1_b2_str) + 800000c0: 000cb203 ld x4,0(x25) + 800000c4: 01620c63 beq x4,x22,800000dc + 800000c8: 439072ef jal x5,80007d00 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 8000e4da .word 0x8000e4da + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008c8c93 addi x25,x25,8 + + mv x15, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018793 addi x15,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xf081821ac30e1157 + 800000e4: 0007b183 ld x3,0(x15) + 800000e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xa8443ca49c842733 + 800000ec: 0007b483 ld x9,0(x15) + 800000f0: 00878793 addi x15,x15,8 + +00000000800000f4 : +Zkne_aes64ks2_cg_cp_rs1_b3: + aes64ks2 x2, x3, x9 # perform operation + 800000f4: 7e918133 aes64ks2 x2,x3,x9 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zkne_aes64ks2_cg_cp_rs1_b3, Zkne_aes64ks2_cg_cp_rs1_b3_str) + 800000f8: 000cb203 ld x4,0(x25) + 800000fc: 00220c63 beq x4,x2,80000114 + 80000100: 401072ef jal x5,80007d00 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 8000e50f .word 0x8000e50f + 80000110: 00000000 .word 0x00000000 + 80000114: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xd39529b4647941a1 + 80000120: 0007b203 ld x4,0(x15) + 80000124: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x71c263e057598fea + 80000128: 0007bb83 ld x23,0(x15) + 8000012c: 00878793 addi x15,x15,8 + +0000000080000130 : +Zkne_aes64ks2_cg_cp_rs1_b4: + aes64ks2 x3, x4, x23 # perform operation + 80000130: 7f7201b3 aes64ks2 x3,x4,x23 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64ks2_cg_cp_rs1_b4, Zkne_aes64ks2_cg_cp_rs1_b4_str) + 80000134: 000cb383 ld x7,0(x25) + 80000138: 00338c63 beq x7,x3,80000150 + 8000013c: 3dd0746f jal x8,80007d18 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8000e544 .word 0x8000e544 + 8000014c: 00000000 .word 0x00000000 + 80000150: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xc997d345456356c0 + 80000154: 0007b283 ld x5,0(x15) + 80000158: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xbe2b2d4317224257 + 8000015c: 0007be03 ld x28,0(x15) + 80000160: 00878793 addi x15,x15,8 + +0000000080000164 : +Zkne_aes64ks2_cg_cp_rs1_b5: + aes64ks2 x6, x5, x28 # perform operation + 80000164: 7fc28333 aes64ks2 x6,x5,x28 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zkne_aes64ks2_cg_cp_rs1_b5, Zkne_aes64ks2_cg_cp_rs1_b5_str) + 80000168: 000cb383 ld x7,0(x25) + 8000016c: 00638c63 beq x7,x6,80000184 + 80000170: 3a90746f jal x8,80007d18 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 8000e579 .word 0x8000e579 + 80000180: 00000000 .word 0x00000000 + 80000184: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xc66b542e748d4eb4 + 80000188: 0007b303 ld x6,0(x15) + 8000018c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0c06b1ecbfbf3a66 + 80000190: 0007ba83 ld x21,0(x15) + 80000194: 00878793 addi x15,x15,8 + +0000000080000198 : +Zkne_aes64ks2_cg_cp_rs1_b6: + aes64ks2 x2, x6, x21 # perform operation + 80000198: 7f530133 aes64ks2 x2,x6,x21 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64ks2_cg_cp_rs1_b6, Zkne_aes64ks2_cg_cp_rs1_b6_str) + 8000019c: 000cb383 ld x7,0(x25) + 800001a0: 00238c63 beq x7,x2,800001b8 + 800001a4: 3750746f jal x8,80007d18 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 8000e5ae .word 0x8000e5ae + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008c8c93 addi x25,x25,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800001bc: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xc089ca68b61e9ba9 + 800001c4: 0007b383 ld x7,0(x15) + 800001c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0xfeda8d5b8de0a7d8 + 800001cc: 0007bb03 ld x22,0(x15) + 800001d0: 00878793 addi x15,x15,8 + +00000000800001d4 : +Zkne_aes64ks2_cg_cp_rs1_b7: + aes64ks2 x3, x7, x22 # perform operation + 800001d4: 7f6381b3 aes64ks2 x3,x7,x22 + # Check if x3 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x3, Zkne_aes64ks2_cg_cp_rs1_b7, Zkne_aes64ks2_cg_cp_rs1_b7_str) + 800001d8: 000cb683 ld x13,0(x25) + 800001dc: 00368c63 beq x13,x3,800001f4 + 800001e0: 3610776f jal x14,80007d40 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 8000e5e3 .word 0x8000e5e3 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs1: x8 = 0x4e0f6e80e5d595fe + 800001f8: 0007b403 ld x8,0(x15) + 800001fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x946f83ba34582a47 + 80000200: 0007bb83 ld x23,0(x15) + 80000204: 00878793 addi x15,x15,8 + +0000000080000208 : +Zkne_aes64ks2_cg_cp_rs1_b8: + aes64ks2 x11, x8, x23 # perform operation + 80000208: 7f7405b3 aes64ks2 x11,x8,x23 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zkne_aes64ks2_cg_cp_rs1_b8, Zkne_aes64ks2_cg_cp_rs1_b8_str) + 8000020c: 000cb683 ld x13,0(x25) + 80000210: 00b68c63 beq x13,x11,80000228 + 80000214: 32d0776f jal x14,80007d40 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 8000e618 .word 0x8000e618 + 80000224: 00000000 .word 0x00000000 + 80000228: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x6accff43b60b0b98 + 8000022c: 0007b483 ld x9,0(x15) + 80000230: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x8584c36b48f063c3 + 80000234: 0007bb03 ld x22,0(x15) + 80000238: 00878793 addi x15,x15,8 + +000000008000023c : +Zkne_aes64ks2_cg_cp_rs1_b9: + aes64ks2 x23, x9, x22 # perform operation + 8000023c: 7f648bb3 aes64ks2 x23,x9,x22 + # Check if x23 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x23, Zkne_aes64ks2_cg_cp_rs1_b9, Zkne_aes64ks2_cg_cp_rs1_b9_str) + 80000240: 000cb683 ld x13,0(x25) + 80000244: 01768c63 beq x13,x23,8000025c + 80000248: 2f90776f jal x14,80007d40 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8000e64d .word 0x8000e64d + 80000258: 00000000 .word 0x00000000 + 8000025c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x7249fac41074b8b2 + 80000260: 0007b503 ld x10,0(x15) + 80000264: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x4de892c2f3ca28bd + 80000268: 0007bd83 ld x27,0(x15) + 8000026c: 00878793 addi x15,x15,8 + +0000000080000270 : +Zkne_aes64ks2_cg_cp_rs1_b10: + aes64ks2 x16, x10, x27 # perform operation + 80000270: 7fb50833 aes64ks2 x16,x10,x27 + # Check if x16 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x16, Zkne_aes64ks2_cg_cp_rs1_b10, Zkne_aes64ks2_cg_cp_rs1_b10_str) + 80000274: 000cb683 ld x13,0(x25) + 80000278: 01068c63 beq x13,x16,80000290 + 8000027c: 2c50776f jal x14,80007d40 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 8000e683 .word 0x8000e683 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x953445b1a6d591c4 + 80000294: 0007b583 ld x11,0(x15) + 80000298: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x0c451f1a6c84f0fd + 8000029c: 0007b183 ld x3,0(x15) + 800002a0: 00878793 addi x15,x15,8 + +00000000800002a4 : +Zkne_aes64ks2_cg_cp_rs1_b11: + aes64ks2 x22, x11, x3 # perform operation + 800002a4: 7e358b33 aes64ks2 x22,x11,x3 + # Check if x22 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x22, Zkne_aes64ks2_cg_cp_rs1_b11, Zkne_aes64ks2_cg_cp_rs1_b11_str) + 800002a8: 000cb683 ld x13,0(x25) + 800002ac: 01668c63 beq x13,x22,800002c4 + 800002b0: 2910776f jal x14,80007d40 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 8000e6ba .word 0x8000e6ba + 800002c0: 00000000 .word 0x00000000 + 800002c4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x2169a1c30b57f864 + 800002c8: 0007b603 ld x12,0(x15) + 800002cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xea08a974cf9cf37d + 800002d0: 0007b903 ld x18,0(x15) + 800002d4: 00878793 addi x15,x15,8 + +00000000800002d8 : +Zkne_aes64ks2_cg_cp_rs1_b12: + aes64ks2 x28, x12, x18 # perform operation + 800002d8: 7f260e33 aes64ks2 x28,x12,x18 + # Check if x28 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x28, Zkne_aes64ks2_cg_cp_rs1_b12, Zkne_aes64ks2_cg_cp_rs1_b12_str) + 800002dc: 000cb683 ld x13,0(x25) + 800002e0: 01c68c63 beq x13,x28,800002f8 + 800002e4: 25d0776f jal x14,80007d40 + 800002e8: 800002d8 .word 0x800002d8 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 8000e6f1 .word 0x8000e6f1 + 800002f4: 00000000 .word 0x00000000 + 800002f8: 008c8c93 addi x25,x25,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002fc: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000300: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x2860376a9dea2ebf + 80000304: 0007b683 ld x13,0(x15) + 80000308: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x9d86b8f6690c5551 + 8000030c: 0007b883 ld x17,0(x15) + 80000310: 00878793 addi x15,x15,8 + +0000000080000314 : +Zkne_aes64ks2_cg_cp_rs1_b13: + aes64ks2 x16, x13, x17 # perform operation + 80000314: 7f168833 aes64ks2 x16,x13,x17 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64ks2_cg_cp_rs1_b13, Zkne_aes64ks2_cg_cp_rs1_b13_str) + 80000318: 000cb383 ld x7,0(x25) + 8000031c: 01038c63 beq x7,x16,80000334 + 80000320: 1f90746f jal x8,80007d18 + 80000324: 80000314 .word 0x80000314 + 80000328: 00000000 .word 0x00000000 + 8000032c: 8000e728 .word 0x8000e728 + 80000330: 00000000 .word 0x00000000 + 80000334: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xd9b4d647b9838e2a + 80000338: 0007b703 ld x14,0(x15) + 8000033c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x8174cba06cb21583 + 80000340: 0007b283 ld x5,0(x15) + 80000344: 00878793 addi x15,x15,8 + +0000000080000348 : +Zkne_aes64ks2_cg_cp_rs1_b14: + aes64ks2 x29, x14, x5 # perform operation + 80000348: 7e570eb3 aes64ks2 x29,x14,x5 + # Check if x29 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x29, Zkne_aes64ks2_cg_cp_rs1_b14, Zkne_aes64ks2_cg_cp_rs1_b14_str) + 8000034c: 000cb383 ld x7,0(x25) + 80000350: 01d38c63 beq x7,x29,80000368 + 80000354: 1c50746f jal x8,80007d18 + 80000358: 80000348 .word 0x80000348 + 8000035c: 00000000 .word 0x00000000 + 80000360: 8000e75f .word 0x8000e75f + 80000364: 00000000 .word 0x00000000 + 80000368: 008c8c93 addi x25,x25,8 + + mv x24, x15 # switch data pointer register to avoid conflict with test + 8000036c: 00078c13 addi x24,x15,0 +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0x0a379847d206f424 + 80000370: 000c3783 ld x15,0(x24) + 80000374: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x8350f3564b39ce08 + 80000378: 000c3683 ld x13,0(x24) + 8000037c: 008c0c13 addi x24,x24,8 + +0000000080000380 : +Zkne_aes64ks2_cg_cp_rs1_b15: + aes64ks2 x2, x15, x13 # perform operation + 80000380: 7ed78133 aes64ks2 x2,x15,x13 + # Check if x2 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x2, Zkne_aes64ks2_cg_cp_rs1_b15, Zkne_aes64ks2_cg_cp_rs1_b15_str) + 80000384: 000cb383 ld x7,0(x25) + 80000388: 00238c63 beq x7,x2,800003a0 + 8000038c: 18d0746f jal x8,80007d18 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 8000e796 .word 0x8000e796 + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5aa578d713431edd + 800003a4: 000c3803 ld x16,0(x24) + 800003a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0x46cea61dd2c83ae2 + 800003ac: 000c3e03 ld x28,0(x24) + 800003b0: 008c0c13 addi x24,x24,8 + +00000000800003b4 : +Zkne_aes64ks2_cg_cp_rs1_b16: + aes64ks2 x11, x16, x28 # perform operation + 800003b4: 7fc805b3 aes64ks2 x11,x16,x28 + # Check if x11 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x11, Zkne_aes64ks2_cg_cp_rs1_b16, Zkne_aes64ks2_cg_cp_rs1_b16_str) + 800003b8: 000cb383 ld x7,0(x25) + 800003bc: 00b38c63 beq x7,x11,800003d4 + 800003c0: 1590746f jal x8,80007d18 + 800003c4: 800003b4 .word 0x800003b4 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 8000e7cd .word 0x8000e7cd + 800003d0: 00000000 .word 0x00000000 + 800003d4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x690a9997019f81e2 + 800003d8: 000c3883 ld x17,0(x24) + 800003dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xa6fd53bb378dcb70 + 800003e0: 000c3b03 ld x22,0(x24) + 800003e4: 008c0c13 addi x24,x24,8 + +00000000800003e8 : +Zkne_aes64ks2_cg_cp_rs1_b17: + aes64ks2 x31, x17, x22 # perform operation + 800003e8: 7f688fb3 aes64ks2 x31,x17,x22 + # Check if x31 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x31, Zkne_aes64ks2_cg_cp_rs1_b17, Zkne_aes64ks2_cg_cp_rs1_b17_str) + 800003ec: 000cb383 ld x7,0(x25) + 800003f0: 01f38c63 beq x7,x31,80000408 + 800003f4: 1250746f jal x8,80007d18 + 800003f8: 800003e8 .word 0x800003e8 + 800003fc: 00000000 .word 0x00000000 + 80000400: 8000e804 .word 0x8000e804 + 80000404: 00000000 .word 0x00000000 + 80000408: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x45c1759939c88241 + 8000040c: 000c3903 ld x18,0(x24) + 80000410: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs2: x28 = 0xa46759b57a4125b8 + 80000414: 000c3e03 ld x28,0(x24) + 80000418: 008c0c13 addi x24,x24,8 + +000000008000041c : +Zkne_aes64ks2_cg_cp_rs1_b18: + aes64ks2 x19, x18, x28 # perform operation + 8000041c: 7fc909b3 aes64ks2 x19,x18,x28 + # Check if x19 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x19, Zkne_aes64ks2_cg_cp_rs1_b18, Zkne_aes64ks2_cg_cp_rs1_b18_str) + 80000420: 000cb383 ld x7,0(x25) + 80000424: 01338c63 beq x7,x19,8000043c + 80000428: 0f10746f jal x8,80007d18 + 8000042c: 8000041c .word 0x8000041c + 80000430: 00000000 .word 0x00000000 + 80000434: 8000e83b .word 0x8000e83b + 80000438: 00000000 .word 0x00000000 + 8000043c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x206e41c2e57fbc67 + 80000440: 000c3983 ld x19,0(x24) + 80000444: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x0bd3097fb07fff9a + 80000448: 000c3483 ld x9,0(x24) + 8000044c: 008c0c13 addi x24,x24,8 + +0000000080000450 : +Zkne_aes64ks2_cg_cp_rs1_b19: + aes64ks2 x20, x19, x9 # perform operation + 80000450: 7e998a33 aes64ks2 x20,x19,x9 + # Check if x20 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x20, Zkne_aes64ks2_cg_cp_rs1_b19, Zkne_aes64ks2_cg_cp_rs1_b19_str) + 80000454: 000cb383 ld x7,0(x25) + 80000458: 01438c63 beq x7,x20,80000470 + 8000045c: 0bd0746f jal x8,80007d18 + 80000460: 80000450 .word 0x80000450 + 80000464: 00000000 .word 0x00000000 + 80000468: 8000e872 .word 0x8000e872 + 8000046c: 00000000 .word 0x00000000 + 80000470: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xf998bbab18c2aca6 + 80000474: 000c3a03 ld x20,0(x24) + 80000478: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs2: x0 = 0x8c21a973f0af8ec1 + 8000047c: 000c3003 ld x0,0(x24) + 80000480: 008c0c13 addi x24,x24,8 + +0000000080000484 : +Zkne_aes64ks2_cg_cp_rs1_b20: + aes64ks2 x22, x20, x0 # perform operation + 80000484: 7e0a0b33 aes64ks2 x22,x20,x0 + # Check if x22 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x22, Zkne_aes64ks2_cg_cp_rs1_b20, Zkne_aes64ks2_cg_cp_rs1_b20_str) + 80000488: 000cb383 ld x7,0(x25) + 8000048c: 01638c63 beq x7,x22,800004a4 + 80000490: 0890746f jal x8,80007d18 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 8000e8a9 .word 0x8000e8a9 + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x34cb4ba201b5af71 + 800004a8: 000c3a83 ld x21,0(x24) + 800004ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x4) # load rs2: x4 = 0x8c596d4283b50255 + 800004b0: 000c3203 ld x4,0(x24) + 800004b4: 008c0c13 addi x24,x24,8 + +00000000800004b8 : +Zkne_aes64ks2_cg_cp_rs1_b21: + aes64ks2 x3, x21, x4 # perform operation + 800004b8: 7e4a81b3 aes64ks2 x3,x21,x4 + # Check if x3 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x3, Zkne_aes64ks2_cg_cp_rs1_b21, Zkne_aes64ks2_cg_cp_rs1_b21_str) + 800004bc: 000cb383 ld x7,0(x25) + 800004c0: 00338c63 beq x7,x3,800004d8 + 800004c4: 0550746f jal x8,80007d18 + 800004c8: 800004b8 .word 0x800004b8 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 8000e8e0 .word 0x8000e8e0 + 800004d4: 00000000 .word 0x00000000 + 800004d8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x1fe53db1b9e45cb4 + 800004dc: 000c3b03 ld x22,0(x24) + 800004e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xf991b46a7492ada1 + 800004e4: 000c3d83 ld x27,0(x24) + 800004e8: 008c0c13 addi x24,x24,8 + +00000000800004ec : +Zkne_aes64ks2_cg_cp_rs1_b22: + aes64ks2 x12, x22, x27 # perform operation + 800004ec: 7fbb0633 aes64ks2 x12,x22,x27 + # Check if x12 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x12, Zkne_aes64ks2_cg_cp_rs1_b22, Zkne_aes64ks2_cg_cp_rs1_b22_str) + 800004f0: 000cb383 ld x7,0(x25) + 800004f4: 00c38c63 beq x7,x12,8000050c + 800004f8: 0210746f jal x8,80007d18 + 800004fc: 800004ec .word 0x800004ec + 80000500: 00000000 .word 0x00000000 + 80000504: 8000e917 .word 0x8000e917 + 80000508: 00000000 .word 0x00000000 + 8000050c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0x8703a14a70028fc6 + 80000510: 000c3b83 ld x23,0(x24) + 80000514: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs2: x27 = 0xfd3401e3c2128c24 + 80000518: 000c3d83 ld x27,0(x24) + 8000051c: 008c0c13 addi x24,x24,8 + +0000000080000520 : +Zkne_aes64ks2_cg_cp_rs1_b23: + aes64ks2 x16, x23, x27 # perform operation + 80000520: 7fbb8833 aes64ks2 x16,x23,x27 + # Check if x16 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x16, Zkne_aes64ks2_cg_cp_rs1_b23, Zkne_aes64ks2_cg_cp_rs1_b23_str) + 80000524: 000cb383 ld x7,0(x25) + 80000528: 01038c63 beq x7,x16,80000540 + 8000052c: 7ec0746f jal x8,80007d18 + 80000530: 80000520 .word 0x80000520 + 80000534: 00000000 .word 0x00000000 + 80000538: 8000e94e .word 0x8000e94e + 8000053c: 00000000 .word 0x00000000 + 80000540: 008c8c93 addi x25,x25,8 + + mv x23, x24 # switch data pointer register to avoid conflict with test + 80000544: 000c0b93 addi x23,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs1: x24 = 0x5d9f4e1cc1bf1e73 + 80000548: 000bbc03 ld x24,0(x23) + 8000054c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x782ca1b51ab18b48 + 80000550: 000bb303 ld x6,0(x23) + 80000554: 008b8b93 addi x23,x23,8 + +0000000080000558 : +Zkne_aes64ks2_cg_cp_rs1_b24: + aes64ks2 x27, x24, x6 # perform operation + 80000558: 7e6c0db3 aes64ks2 x27,x24,x6 + # Check if x27 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x27, Zkne_aes64ks2_cg_cp_rs1_b24, Zkne_aes64ks2_cg_cp_rs1_b24_str) + 8000055c: 000cb383 ld x7,0(x25) + 80000560: 01b38c63 beq x7,x27,80000578 + 80000564: 7b40746f jal x8,80007d18 + 80000568: 80000558 .word 0x80000558 + 8000056c: 00000000 .word 0x00000000 + 80000570: 8000e985 .word 0x8000e985 + 80000574: 00000000 .word 0x00000000 + 80000578: 008c8c93 addi x25,x25,8 + + mv x3, x25 # switch signature pointer register to avoid conflict with test + 8000057c: 000c8193 addi x3,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xe7b4b4554629d354 + 80000580: 000bbc83 ld x25,0(x23) + 80000584: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x7f73ec0cf7ace60d + 80000588: 000bb283 ld x5,0(x23) + 8000058c: 008b8b93 addi x23,x23,8 + +0000000080000590 : +Zkne_aes64ks2_cg_cp_rs1_b25: + aes64ks2 x27, x25, x5 # perform operation + 80000590: 7e5c8db3 aes64ks2 x27,x25,x5 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zkne_aes64ks2_cg_cp_rs1_b25, Zkne_aes64ks2_cg_cp_rs1_b25_str) + 80000594: 0001b383 ld x7,0(x3) + 80000598: 01b38c63 beq x7,x27,800005b0 + 8000059c: 77c0746f jal x8,80007d18 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 8000e9bc .word 0x8000e9bc + 800005ac: 00000000 .word 0x00000000 + 800005b0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x9b43771827259c6c + 800005b4: 000bbd03 ld x26,0(x23) + 800005b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xa91865c969bdaf99 + 800005bc: 000bbc83 ld x25,0(x23) + 800005c0: 008b8b93 addi x23,x23,8 + +00000000800005c4 : +Zkne_aes64ks2_cg_cp_rs1_b26: + aes64ks2 x29, x26, x25 # perform operation + 800005c4: 7f9d0eb3 aes64ks2 x29,x26,x25 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zkne_aes64ks2_cg_cp_rs1_b26, Zkne_aes64ks2_cg_cp_rs1_b26_str) + 800005c8: 0001b383 ld x7,0(x3) + 800005cc: 01d38c63 beq x7,x29,800005e4 + 800005d0: 7480746f jal x8,80007d18 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 8000e9f3 .word 0x8000e9f3 + 800005e0: 00000000 .word 0x00000000 + 800005e4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x595df21336dbae9d + 800005e8: 000bbd83 ld x27,0(x23) + 800005ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x976cf6e777e93d01 + 800005f0: 000bb083 ld x1,0(x23) + 800005f4: 008b8b93 addi x23,x23,8 + +00000000800005f8 : +Zkne_aes64ks2_cg_cp_rs1_b27: + aes64ks2 x30, x27, x1 # perform operation + 800005f8: 7e1d8f33 aes64ks2 x30,x27,x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zkne_aes64ks2_cg_cp_rs1_b27, Zkne_aes64ks2_cg_cp_rs1_b27_str) + 800005fc: 0001b383 ld x7,0(x3) + 80000600: 01e38c63 beq x7,x30,80000618 + 80000604: 7140746f jal x8,80007d18 + 80000608: 800005f8 .word 0x800005f8 + 8000060c: 00000000 .word 0x00000000 + 80000610: 8000ea2a .word 0x8000ea2a + 80000614: 00000000 .word 0x00000000 + 80000618: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0x273992e2bf74bc0c + 8000061c: 000bbe03 ld x28,0(x23) + 80000620: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x4636b0295934808b + 80000624: 000bbc03 ld x24,0(x23) + 80000628: 008b8b93 addi x23,x23,8 + +000000008000062c : +Zkne_aes64ks2_cg_cp_rs1_b28: + aes64ks2 x25, x28, x24 # perform operation + 8000062c: 7f8e0cb3 aes64ks2 x25,x28,x24 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zkne_aes64ks2_cg_cp_rs1_b28, Zkne_aes64ks2_cg_cp_rs1_b28_str) + 80000630: 0001b383 ld x7,0(x3) + 80000634: 01938c63 beq x7,x25,8000064c + 80000638: 6e00746f jal x8,80007d18 + 8000063c: 8000062c .word 0x8000062c + 80000640: 00000000 .word 0x00000000 + 80000644: 8000ea61 .word 0x8000ea61 + 80000648: 00000000 .word 0x00000000 + 8000064c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x46ff7f1174a178ba + 80000650: 000bbe83 ld x29,0(x23) + 80000654: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x3e26f822d614f692 + 80000658: 000bb103 ld x2,0(x23) + 8000065c: 008b8b93 addi x23,x23,8 + +0000000080000660 : +Zkne_aes64ks2_cg_cp_rs1_b29: + aes64ks2 x12, x29, x2 # perform operation + 80000660: 7e2e8633 aes64ks2 x12,x29,x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zkne_aes64ks2_cg_cp_rs1_b29, Zkne_aes64ks2_cg_cp_rs1_b29_str) + 80000664: 0001b383 ld x7,0(x3) + 80000668: 00c38c63 beq x7,x12,80000680 + 8000066c: 6ac0746f jal x8,80007d18 + 80000670: 80000660 .word 0x80000660 + 80000674: 00000000 .word 0x00000000 + 80000678: 8000ea98 .word 0x8000ea98 + 8000067c: 00000000 .word 0x00000000 + 80000680: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0xdd65082213e9c1ac + 80000684: 000bbf03 ld x30,0(x23) + 80000688: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x7e8fede71d6e82d4 + 8000068c: 000bbb03 ld x22,0(x23) + 80000690: 008b8b93 addi x23,x23,8 + +0000000080000694 : +Zkne_aes64ks2_cg_cp_rs1_b30: + aes64ks2 x21, x30, x22 # perform operation + 80000694: 7f6f0ab3 aes64ks2 x21,x30,x22 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zkne_aes64ks2_cg_cp_rs1_b30, Zkne_aes64ks2_cg_cp_rs1_b30_str) + 80000698: 0001b383 ld x7,0(x3) + 8000069c: 01538c63 beq x7,x21,800006b4 + 800006a0: 6780746f jal x8,80007d18 + 800006a4: 80000694 .word 0x80000694 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 8000eacf .word 0x8000eacf + 800006b0: 00000000 .word 0x00000000 + 800006b4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs1: x31 = 0xacfe767db22ea70d + 800006b8: 000bbf83 ld x31,0(x23) + 800006bc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0xd7dfaee262d00997 + 800006c0: 000bbd03 ld x26,0(x23) + 800006c4: 008b8b93 addi x23,x23,8 + +00000000800006c8 : +Zkne_aes64ks2_cg_cp_rs1_b31: + aes64ks2 x1, x31, x26 # perform operation + 800006c8: 7faf80b3 aes64ks2 x1,x31,x26 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zkne_aes64ks2_cg_cp_rs1_b31, Zkne_aes64ks2_cg_cp_rs1_b31_str) + 800006cc: 0001b383 ld x7,0(x3) + 800006d0: 00138c63 beq x7,x1,800006e8 + 800006d4: 6440746f jal x8,80007d18 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 8000eb06 .word 0x8000eb06 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x6ab45c589345d3e6 + 800006ec: 000bbc83 ld x25,0(x23) + 800006f0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x867c5429d11c938e + 800006f4: 000bb003 ld x0,0(x23) + 800006f8: 008b8b93 addi x23,x23,8 + +00000000800006fc : +Zkne_aes64ks2_cg_cp_rs2_b0: + aes64ks2 x20, x25, x0 # perform operation + 800006fc: 7e0c8a33 aes64ks2 x20,x25,x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zkne_aes64ks2_cg_cp_rs2_b0, Zkne_aes64ks2_cg_cp_rs2_b0_str) + 80000700: 0001b383 ld x7,0(x3) + 80000704: 01438c63 beq x7,x20,8000071c + 80000708: 6100746f jal x8,80007d18 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 8000eb3d .word 0x8000eb3d + 80000718: 00000000 .word 0x00000000 + 8000071c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x0a86c381b3cd150e + 80000720: 000bbc83 ld x25,0(x23) + 80000724: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0x88b50a34590b2eab + 80000728: 000bb083 ld x1,0(x23) + 8000072c: 008b8b93 addi x23,x23,8 + +0000000080000730 : +Zkne_aes64ks2_cg_cp_rs2_b1: + aes64ks2 x27, x25, x1 # perform operation + 80000730: 7e1c8db3 aes64ks2 x27,x25,x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zkne_aes64ks2_cg_cp_rs2_b1, Zkne_aes64ks2_cg_cp_rs2_b1_str) + 80000734: 0001b383 ld x7,0(x3) + 80000738: 01b38c63 beq x7,x27,80000750 + 8000073c: 5dc0746f jal x8,80007d18 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 8000eb73 .word 0x8000eb73 + 8000074c: 00000000 .word 0x00000000 + 80000750: 00818193 addi x3,x3,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xc2a6357688240f18 + 80000754: 000bbd03 ld x26,0(x23) + 80000758: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0xdf857f245d01f5f9 + 8000075c: 000bb103 ld x2,0(x23) + 80000760: 008b8b93 addi x23,x23,8 + +0000000080000764 : +Zkne_aes64ks2_cg_cp_rs2_b2: + aes64ks2 x28, x26, x2 # perform operation + 80000764: 7e2d0e33 aes64ks2 x28,x26,x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zkne_aes64ks2_cg_cp_rs2_b2, Zkne_aes64ks2_cg_cp_rs2_b2_str) + 80000768: 0001b383 ld x7,0(x3) + 8000076c: 01c38c63 beq x7,x28,80000784 + 80000770: 5a80746f jal x8,80007d18 + 80000774: 80000764 .word 0x80000764 + 80000778: 00000000 .word 0x00000000 + 8000077c: 8000eba9 .word 0x8000eba9 + 80000780: 00000000 .word 0x00000000 + 80000784: 00818193 addi x3,x3,8 + + mv x17, x3 # switch signature pointer register to avoid conflict with test + 80000788: 00018893 addi x17,x3,0 +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x3d5b06b7a218f14c + 8000078c: 000bb283 ld x5,0(x23) + 80000790: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x2d446492f779c322 + 80000794: 000bb183 ld x3,0(x23) + 80000798: 008b8b93 addi x23,x23,8 + +000000008000079c : +Zkne_aes64ks2_cg_cp_rs2_b3: + aes64ks2 x1, x5, x3 # perform operation + 8000079c: 7e3280b3 aes64ks2 x1,x5,x3 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zkne_aes64ks2_cg_cp_rs2_b3, Zkne_aes64ks2_cg_cp_rs2_b3_str) + 800007a0: 0008b383 ld x7,0(x17) + 800007a4: 00138c63 beq x7,x1,800007bc + 800007a8: 5700746f jal x8,80007d18 + 800007ac: 8000079c .word 0x8000079c + 800007b0: 00000000 .word 0x00000000 + 800007b4: 8000ebdf .word 0x8000ebdf + 800007b8: 00000000 .word 0x00000000 + 800007bc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x051fcc7d40dbfac8 + 800007c0: 000bba03 ld x20,0(x23) + 800007c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x0a548d57c373d289 + 800007c8: 000bb203 ld x4,0(x23) + 800007cc: 008b8b93 addi x23,x23,8 + +00000000800007d0 : +Zkne_aes64ks2_cg_cp_rs2_b4: + aes64ks2 x9, x20, x4 # perform operation + 800007d0: 7e4a04b3 aes64ks2 x9,x20,x4 + # Check if x9 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x9, Zkne_aes64ks2_cg_cp_rs2_b4, Zkne_aes64ks2_cg_cp_rs2_b4_str) + 800007d4: 0008b383 ld x7,0(x17) + 800007d8: 00938c63 beq x7,x9,800007f0 + 800007dc: 53c0746f jal x8,80007d18 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 8000ec15 .word 0x8000ec15 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xe1514126ee2ff67c + 800007f4: 000bb103 ld x2,0(x23) + 800007f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0xa26ed7351e335d9d + 800007fc: 000bb283 ld x5,0(x23) + 80000800: 008b8b93 addi x23,x23,8 + +0000000080000804 : +Zkne_aes64ks2_cg_cp_rs2_b5: + aes64ks2 x15, x2, x5 # perform operation + 80000804: 7e5107b3 aes64ks2 x15,x2,x5 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zkne_aes64ks2_cg_cp_rs2_b5, Zkne_aes64ks2_cg_cp_rs2_b5_str) + 80000808: 0008b383 ld x7,0(x17) + 8000080c: 00f38c63 beq x7,x15,80000824 + 80000810: 5080746f jal x8,80007d18 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 8000ec4b .word 0x8000ec4b + 80000820: 00000000 .word 0x00000000 + 80000824: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs1: x28 = 0xc260fdf4955a867f + 80000828: 000bbe03 ld x28,0(x23) + 8000082c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xb0f746385fb559ce + 80000830: 000bb303 ld x6,0(x23) + 80000834: 008b8b93 addi x23,x23,8 + +0000000080000838 : +Zkne_aes64ks2_cg_cp_rs2_b6: + aes64ks2 x1, x28, x6 # perform operation + 80000838: 7e6e00b3 aes64ks2 x1,x28,x6 + # Check if x1 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x1, Zkne_aes64ks2_cg_cp_rs2_b6, Zkne_aes64ks2_cg_cp_rs2_b6_str) + 8000083c: 0008b383 ld x7,0(x17) + 80000840: 00138c63 beq x7,x1,80000858 + 80000844: 4d40746f jal x8,80007d18 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 8000ec81 .word 0x8000ec81 + 80000854: 00000000 .word 0x00000000 + 80000858: 00888893 addi x17,x17,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 8000085c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000860: 00040293 addi x5,x8,0 +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x2c941a72e975246f + 80000864: 000bbf03 ld x30,0(x23) + 80000868: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0x954eb292ecadb7c9 + 8000086c: 000bb383 ld x7,0(x23) + 80000870: 008b8b93 addi x23,x23,8 + +0000000080000874 : +Zkne_aes64ks2_cg_cp_rs2_b7: + aes64ks2 x0, x30, x7 # perform operation + 80000874: 7e7f0033 aes64ks2 x0,x30,x7 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zkne_aes64ks2_cg_cp_rs2_b7, Zkne_aes64ks2_cg_cp_rs2_b7_str) + 80000878: 0008b203 ld x4,0(x17) + 8000087c: 00020c63 beq x4,x0,80000894 + 80000880: 480072ef jal x5,80007d00 + 80000884: 80000874 .word 0x80000874 + 80000888: 00000000 .word 0x00000000 + 8000088c: 8000ecb7 .word 0x8000ecb7 + 80000890: 00000000 .word 0x00000000 + 80000894: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x3768f523cdd63a6b + 80000898: 000bb483 ld x9,0(x23) + 8000089c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0xd3af969da4a8a83f + 800008a0: 000bb403 ld x8,0(x23) + 800008a4: 008b8b93 addi x23,x23,8 + +00000000800008a8 : +Zkne_aes64ks2_cg_cp_rs2_b8: + aes64ks2 x26, x9, x8 # perform operation + 800008a8: 7e848d33 aes64ks2 x26,x9,x8 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zkne_aes64ks2_cg_cp_rs2_b8, Zkne_aes64ks2_cg_cp_rs2_b8_str) + 800008ac: 0008b203 ld x4,0(x17) + 800008b0: 01a20c63 beq x4,x26,800008c8 + 800008b4: 44c072ef jal x5,80007d00 + 800008b8: 800008a8 .word 0x800008a8 + 800008bc: 00000000 .word 0x00000000 + 800008c0: 8000eced .word 0x8000eced + 800008c4: 00000000 .word 0x00000000 + 800008c8: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x2619c389def5d6d2 + 800008cc: 000bbf03 ld x30,0(x23) + 800008d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x0b9ec5e59e0c74c6 + 800008d4: 000bb483 ld x9,0(x23) + 800008d8: 008b8b93 addi x23,x23,8 + +00000000800008dc : +Zkne_aes64ks2_cg_cp_rs2_b9: + aes64ks2 x28, x30, x9 # perform operation + 800008dc: 7e9f0e33 aes64ks2 x28,x30,x9 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zkne_aes64ks2_cg_cp_rs2_b9, Zkne_aes64ks2_cg_cp_rs2_b9_str) + 800008e0: 0008b203 ld x4,0(x17) + 800008e4: 01c20c63 beq x4,x28,800008fc + 800008e8: 418072ef jal x5,80007d00 + 800008ec: 800008dc .word 0x800008dc + 800008f0: 00000000 .word 0x00000000 + 800008f4: 8000ed23 .word 0x8000ed23 + 800008f8: 00000000 .word 0x00000000 + 800008fc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0xb23f182b95aeed2a + 80000900: 000bbc83 ld x25,0(x23) + 80000904: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x9629f4fb8e0e7880 + 80000908: 000bb503 ld x10,0(x23) + 8000090c: 008b8b93 addi x23,x23,8 + +0000000080000910 : +Zkne_aes64ks2_cg_cp_rs2_b10: + aes64ks2 x21, x25, x10 # perform operation + 80000910: 7eac8ab3 aes64ks2 x21,x25,x10 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zkne_aes64ks2_cg_cp_rs2_b10, Zkne_aes64ks2_cg_cp_rs2_b10_str) + 80000914: 0008b203 ld x4,0(x17) + 80000918: 01520c63 beq x4,x21,80000930 + 8000091c: 3e4072ef jal x5,80007d00 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 8000ed59 .word 0x8000ed59 + 8000092c: 00000000 .word 0x00000000 + 80000930: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xe7d1c7b2e567879a + 80000934: 000bb483 ld x9,0(x23) + 80000938: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x781fe3494a7ceb85 + 8000093c: 000bb583 ld x11,0(x23) + 80000940: 008b8b93 addi x23,x23,8 + +0000000080000944 : +Zkne_aes64ks2_cg_cp_rs2_b11: + aes64ks2 x19, x9, x11 # perform operation + 80000944: 7eb489b3 aes64ks2 x19,x9,x11 + # Check if x19 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x19, Zkne_aes64ks2_cg_cp_rs2_b11, Zkne_aes64ks2_cg_cp_rs2_b11_str) + 80000948: 0008b203 ld x4,0(x17) + 8000094c: 01320c63 beq x4,x19,80000964 + 80000950: 3b0072ef jal x5,80007d00 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 8000ed90 .word 0x8000ed90 + 80000960: 00000000 .word 0x00000000 + 80000964: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xa06a99cee63a9b33 + 80000968: 000bbe83 ld x29,0(x23) + 8000096c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x706954d1539386be + 80000970: 000bb603 ld x12,0(x23) + 80000974: 008b8b93 addi x23,x23,8 + +0000000080000978 : +Zkne_aes64ks2_cg_cp_rs2_b12: + aes64ks2 x10, x29, x12 # perform operation + 80000978: 7ece8533 aes64ks2 x10,x29,x12 + # Check if x10 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x10, Zkne_aes64ks2_cg_cp_rs2_b12, Zkne_aes64ks2_cg_cp_rs2_b12_str) + 8000097c: 0008b203 ld x4,0(x17) + 80000980: 00a20c63 beq x4,x10,80000998 + 80000984: 37c072ef jal x5,80007d00 + 80000988: 80000978 .word 0x80000978 + 8000098c: 00000000 .word 0x00000000 + 80000990: 8000edc7 .word 0x8000edc7 + 80000994: 00000000 .word 0x00000000 + 80000998: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xe4f4dbf6280322f1 + 8000099c: 000bba03 ld x20,0(x23) + 800009a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0x94bcf5a220d0633c + 800009a4: 000bb683 ld x13,0(x23) + 800009a8: 008b8b93 addi x23,x23,8 + +00000000800009ac : +Zkne_aes64ks2_cg_cp_rs2_b13: + aes64ks2 x0, x20, x13 # perform operation + 800009ac: 7eda0033 aes64ks2 x0,x20,x13 + # Check if x0 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x0, Zkne_aes64ks2_cg_cp_rs2_b13, Zkne_aes64ks2_cg_cp_rs2_b13_str) + 800009b0: 0008b203 ld x4,0(x17) + 800009b4: 00020c63 beq x4,x0,800009cc + 800009b8: 348072ef jal x5,80007d00 + 800009bc: 800009ac .word 0x800009ac + 800009c0: 00000000 .word 0x00000000 + 800009c4: 8000edfe .word 0x8000edfe + 800009c8: 00000000 .word 0x00000000 + 800009cc: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xe8cfdcffc74ba52e + 800009d0: 000bb383 ld x7,0(x23) + 800009d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xd4f7fe5897c88950 + 800009d8: 000bb703 ld x14,0(x23) + 800009dc: 008b8b93 addi x23,x23,8 + +00000000800009e0 : +Zkne_aes64ks2_cg_cp_rs2_b14: + aes64ks2 x13, x7, x14 # perform operation + 800009e0: 7ee386b3 aes64ks2 x13,x7,x14 + # Check if x13 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x13, Zkne_aes64ks2_cg_cp_rs2_b14, Zkne_aes64ks2_cg_cp_rs2_b14_str) + 800009e4: 0008b203 ld x4,0(x17) + 800009e8: 00d20c63 beq x4,x13,80000a00 + 800009ec: 314072ef jal x5,80007d00 + 800009f0: 800009e0 .word 0x800009e0 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 8000ee35 .word 0x8000ee35 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x6c4e7c1f3e6c6a11 + 80000a04: 000bba83 ld x21,0(x23) + 80000a08: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0x294c979f4d4f699a + 80000a0c: 000bb783 ld x15,0(x23) + 80000a10: 008b8b93 addi x23,x23,8 + +0000000080000a14 : +Zkne_aes64ks2_cg_cp_rs2_b15: + aes64ks2 x26, x21, x15 # perform operation + 80000a14: 7efa8d33 aes64ks2 x26,x21,x15 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zkne_aes64ks2_cg_cp_rs2_b15, Zkne_aes64ks2_cg_cp_rs2_b15_str) + 80000a18: 0008b203 ld x4,0(x17) + 80000a1c: 01a20c63 beq x4,x26,80000a34 + 80000a20: 2e0072ef jal x5,80007d00 + 80000a24: 80000a14 .word 0x80000a14 + 80000a28: 00000000 .word 0x00000000 + 80000a2c: 8000ee6c .word 0x8000ee6c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 00888893 addi x17,x17,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x1dac39f921472579 + 80000a38: 000bb503 ld x10,0(x23) + 80000a3c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x6b9ad4f715c4fdf4 + 80000a40: 000bb803 ld x16,0(x23) + 80000a44: 008b8b93 addi x23,x23,8 + +0000000080000a48 : +Zkne_aes64ks2_cg_cp_rs2_b16: + aes64ks2 x7, x10, x16 # perform operation + 80000a48: 7f0503b3 aes64ks2 x7,x10,x16 + # Check if x7 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x7, Zkne_aes64ks2_cg_cp_rs2_b16, Zkne_aes64ks2_cg_cp_rs2_b16_str) + 80000a4c: 0008b203 ld x4,0(x17) + 80000a50: 00720c63 beq x4,x7,80000a68 + 80000a54: 2ac072ef jal x5,80007d00 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 8000eea3 .word 0x8000eea3 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 00888893 addi x17,x17,8 + + mv x21, x17 # switch signature pointer register to avoid conflict with test + 80000a6c: 00088a93 addi x21,x17,0 +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x84779e84dec46e77 + 80000a70: 000bb383 ld x7,0(x23) + 80000a74: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0x458da096aa430d10 + 80000a78: 000bb883 ld x17,0(x23) + 80000a7c: 008b8b93 addi x23,x23,8 + +0000000080000a80 : +Zkne_aes64ks2_cg_cp_rs2_b17: + aes64ks2 x3, x7, x17 # perform operation + 80000a80: 7f1381b3 aes64ks2 x3,x7,x17 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zkne_aes64ks2_cg_cp_rs2_b17, Zkne_aes64ks2_cg_cp_rs2_b17_str) + 80000a84: 000ab203 ld x4,0(x21) + 80000a88: 00320c63 beq x4,x3,80000aa0 + 80000a8c: 274072ef jal x5,80007d00 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 8000eeda .word 0x8000eeda + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x4d686bbd86b65094 + 80000aa4: 000bbd03 ld x26,0(x23) + 80000aa8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0xde738e69a8d7843c + 80000aac: 000bb903 ld x18,0(x23) + 80000ab0: 008b8b93 addi x23,x23,8 + +0000000080000ab4 : +Zkne_aes64ks2_cg_cp_rs2_b18: + aes64ks2 x6, x26, x18 # perform operation + 80000ab4: 7f2d0333 aes64ks2 x6,x26,x18 + # Check if x6 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x6, Zkne_aes64ks2_cg_cp_rs2_b18, Zkne_aes64ks2_cg_cp_rs2_b18_str) + 80000ab8: 000ab203 ld x4,0(x21) + 80000abc: 00620c63 beq x4,x6,80000ad4 + 80000ac0: 240072ef jal x5,80007d00 + 80000ac4: 80000ab4 .word 0x80000ab4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 8000ef11 .word 0x8000ef11 + 80000ad0: 00000000 .word 0x00000000 + 80000ad4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x9eabdea301999f71 + 80000ad8: 000bba03 ld x20,0(x23) + 80000adc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0x86c309f8e8f7d0c5 + 80000ae0: 000bb983 ld x19,0(x23) + 80000ae4: 008b8b93 addi x23,x23,8 + +0000000080000ae8 : +Zkne_aes64ks2_cg_cp_rs2_b19: + aes64ks2 x27, x20, x19 # perform operation + 80000ae8: 7f3a0db3 aes64ks2 x27,x20,x19 + # Check if x27 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x27, Zkne_aes64ks2_cg_cp_rs2_b19, Zkne_aes64ks2_cg_cp_rs2_b19_str) + 80000aec: 000ab203 ld x4,0(x21) + 80000af0: 01b20c63 beq x4,x27,80000b08 + 80000af4: 20c072ef jal x5,80007d00 + 80000af8: 80000ae8 .word 0x80000ae8 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 8000ef48 .word 0x8000ef48 + 80000b04: 00000000 .word 0x00000000 + 80000b08: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0xbcdfb62b658a6538 + 80000b0c: 000bbd83 ld x27,0(x23) + 80000b10: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0x736b8aba135931a4 + 80000b14: 000bba03 ld x20,0(x23) + 80000b18: 008b8b93 addi x23,x23,8 + +0000000080000b1c : +Zkne_aes64ks2_cg_cp_rs2_b20: + aes64ks2 x16, x27, x20 # perform operation + 80000b1c: 7f4d8833 aes64ks2 x16,x27,x20 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zkne_aes64ks2_cg_cp_rs2_b20, Zkne_aes64ks2_cg_cp_rs2_b20_str) + 80000b20: 000ab203 ld x4,0(x21) + 80000b24: 01020c63 beq x4,x16,80000b3c + 80000b28: 1d8072ef jal x5,80007d00 + 80000b2c: 80000b1c .word 0x80000b1c + 80000b30: 00000000 .word 0x00000000 + 80000b34: 8000ef7f .word 0x8000ef7f + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 008a8a93 addi x21,x21,8 + + mv x26, x21 # switch signature pointer register to avoid conflict with test + 80000b40: 000a8d13 addi x26,x21,0 +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xe562a99b950615fd + 80000b44: 000bb883 ld x17,0(x23) + 80000b48: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0xbabc15522c4326ca + 80000b4c: 000bba83 ld x21,0(x23) + 80000b50: 008b8b93 addi x23,x23,8 + +0000000080000b54 : +Zkne_aes64ks2_cg_cp_rs2_b21: + aes64ks2 x0, x17, x21 # perform operation + 80000b54: 7f588033 aes64ks2 x0,x17,x21 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zkne_aes64ks2_cg_cp_rs2_b21, Zkne_aes64ks2_cg_cp_rs2_b21_str) + 80000b58: 000d3203 ld x4,0(x26) + 80000b5c: 00020c63 beq x4,x0,80000b74 + 80000b60: 1a0072ef jal x5,80007d00 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 8000efb6 .word 0x8000efb6 + 80000b70: 00000000 .word 0x00000000 + 80000b74: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x0ba1fd104cbf4f14 + 80000b78: 000bb403 ld x8,0(x23) + 80000b7c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x8d1f7261e7f8c6ff + 80000b80: 000bbb03 ld x22,0(x23) + 80000b84: 008b8b93 addi x23,x23,8 + +0000000080000b88 : +Zkne_aes64ks2_cg_cp_rs2_b22: + aes64ks2 x25, x8, x22 # perform operation + 80000b88: 7f640cb3 aes64ks2 x25,x8,x22 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zkne_aes64ks2_cg_cp_rs2_b22, Zkne_aes64ks2_cg_cp_rs2_b22_str) + 80000b8c: 000d3203 ld x4,0(x26) + 80000b90: 01920c63 beq x4,x25,80000ba8 + 80000b94: 16c072ef jal x5,80007d00 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 8000efed .word 0x8000efed + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 008d0d13 addi x26,x26,8 + + mv x18, x23 # switch data pointer register to avoid conflict with test + 80000bac: 000b8913 addi x18,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x6b4dba5431397a5c + 80000bb0: 00093603 ld x12,0(x18) + 80000bb4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x044cfd96b0fe7457 + 80000bb8: 00093b83 ld x23,0(x18) + 80000bbc: 00890913 addi x18,x18,8 + +0000000080000bc0 : +Zkne_aes64ks2_cg_cp_rs2_b23: + aes64ks2 x10, x12, x23 # perform operation + 80000bc0: 7f760533 aes64ks2 x10,x12,x23 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zkne_aes64ks2_cg_cp_rs2_b23, Zkne_aes64ks2_cg_cp_rs2_b23_str) + 80000bc4: 000d3203 ld x4,0(x26) + 80000bc8: 00a20c63 beq x4,x10,80000be0 + 80000bcc: 134072ef jal x5,80007d00 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 8000f024 .word 0x8000f024 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x9d93f68acc048a53 + 80000be4: 00093d83 ld x27,0(x18) + 80000be8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0x6a72e25156a1c66b + 80000bec: 00093c03 ld x24,0(x18) + 80000bf0: 00890913 addi x18,x18,8 + +0000000080000bf4 : +Zkne_aes64ks2_cg_cp_rs2_b24: + aes64ks2 x17, x27, x24 # perform operation + 80000bf4: 7f8d88b3 aes64ks2 x17,x27,x24 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zkne_aes64ks2_cg_cp_rs2_b24, Zkne_aes64ks2_cg_cp_rs2_b24_str) + 80000bf8: 000d3203 ld x4,0(x26) + 80000bfc: 01120c63 beq x4,x17,80000c14 + 80000c00: 100072ef jal x5,80007d00 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8000f05b .word 0x8000f05b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x378069e4909a0b13 + 80000c18: 00093e83 ld x29,0(x18) + 80000c1c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x16a844fbbd5bf50a + 80000c20: 00093c83 ld x25,0(x18) + 80000c24: 00890913 addi x18,x18,8 + +0000000080000c28 : +Zkne_aes64ks2_cg_cp_rs2_b25: + aes64ks2 x6, x29, x25 # perform operation + 80000c28: 7f9e8333 aes64ks2 x6,x29,x25 + # Check if x6 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x6, Zkne_aes64ks2_cg_cp_rs2_b25, Zkne_aes64ks2_cg_cp_rs2_b25_str) + 80000c2c: 000d3203 ld x4,0(x26) + 80000c30: 00620c63 beq x4,x6,80000c48 + 80000c34: 0cc072ef jal x5,80007d00 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 8000f092 .word 0x8000f092 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 008d0d13 addi x26,x26,8 + + mv x29, x26 # switch signature pointer register to avoid conflict with test + 80000c4c: 000d0e93 addi x29,x26,0 +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x9f5f495438a27d2e + 80000c50: 00093883 ld x17,0(x18) + 80000c54: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0x96f04ae37de88a24 + 80000c58: 00093d03 ld x26,0(x18) + 80000c5c: 00890913 addi x18,x18,8 + +0000000080000c60 : +Zkne_aes64ks2_cg_cp_rs2_b26: + aes64ks2 x27, x17, x26 # perform operation + 80000c60: 7fa88db3 aes64ks2 x27,x17,x26 + # Check if x27 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x27, Zkne_aes64ks2_cg_cp_rs2_b26, Zkne_aes64ks2_cg_cp_rs2_b26_str) + 80000c64: 000eb203 ld x4,0(x29) + 80000c68: 01b20c63 beq x4,x27,80000c80 + 80000c6c: 094072ef jal x5,80007d00 + 80000c70: 80000c60 .word 0x80000c60 + 80000c74: 00000000 .word 0x00000000 + 80000c78: 8000f0c9 .word 0x8000f0c9 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x9aa4f128aad75c94 + 80000c84: 00093383 ld x7,0(x18) + 80000c88: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs2: x27 = 0x14b06b92c69021ef + 80000c8c: 00093d83 ld x27,0(x18) + 80000c90: 00890913 addi x18,x18,8 + +0000000080000c94 : +Zkne_aes64ks2_cg_cp_rs2_b27: + aes64ks2 x26, x7, x27 # perform operation + 80000c94: 7fb38d33 aes64ks2 x26,x7,x27 + # Check if x26 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x26, Zkne_aes64ks2_cg_cp_rs2_b27, Zkne_aes64ks2_cg_cp_rs2_b27_str) + 80000c98: 000eb203 ld x4,0(x29) + 80000c9c: 01a20c63 beq x4,x26,80000cb4 + 80000ca0: 060072ef jal x5,80007d00 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000f100 .word 0x8000f100 + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0x487a83fd9e18e4e3 + 80000cb8: 00093603 ld x12,0(x18) + 80000cbc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x6e217f8190a4e3af + 80000cc0: 00093e03 ld x28,0(x18) + 80000cc4: 00890913 addi x18,x18,8 + +0000000080000cc8 : +Zkne_aes64ks2_cg_cp_rs2_b28: + aes64ks2 x0, x12, x28 # perform operation + 80000cc8: 7fc60033 aes64ks2 x0,x12,x28 + # Check if x0 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x0, Zkne_aes64ks2_cg_cp_rs2_b28, Zkne_aes64ks2_cg_cp_rs2_b28_str) + 80000ccc: 000eb203 ld x4,0(x29) + 80000cd0: 00020c63 beq x4,x0,80000ce8 + 80000cd4: 02c072ef jal x5,80007d00 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 8000f137 .word 0x8000f137 + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 008e8e93 addi x29,x29,8 + + mv x25, x29 # switch signature pointer register to avoid conflict with test + 80000cec: 000e8c93 addi x25,x29,0 +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x858dfa03dc6b03d0 + 80000cf0: 00093683 ld x13,0(x18) + 80000cf4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x4e7b91a65c9955c8 + 80000cf8: 00093e83 ld x29,0(x18) + 80000cfc: 00890913 addi x18,x18,8 + +0000000080000d00 : +Zkne_aes64ks2_cg_cp_rs2_b29: + aes64ks2 x30, x13, x29 # perform operation + 80000d00: 7fd68f33 aes64ks2 x30,x13,x29 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zkne_aes64ks2_cg_cp_rs2_b29, Zkne_aes64ks2_cg_cp_rs2_b29_str) + 80000d04: 000cb203 ld x4,0(x25) + 80000d08: 01e20c63 beq x4,x30,80000d20 + 80000d0c: 7f5062ef jal x5,80007d00 + 80000d10: 80000d00 .word 0x80000d00 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 8000f16e .word 0x8000f16e + 80000d1c: 00000000 .word 0x00000000 + 80000d20: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x201b60bb414a04f7 + 80000d24: 00093e03 ld x28,0(x18) + 80000d28: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0x6e4c61ede09159e7 + 80000d2c: 00093f03 ld x30,0(x18) + 80000d30: 00890913 addi x18,x18,8 + +0000000080000d34 : +Zkne_aes64ks2_cg_cp_rs2_b30: + aes64ks2 x14, x28, x30 # perform operation + 80000d34: 7fee0733 aes64ks2 x14,x28,x30 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes64ks2_cg_cp_rs2_b30, Zkne_aes64ks2_cg_cp_rs2_b30_str) + 80000d38: 000cb203 ld x4,0(x25) + 80000d3c: 00e20c63 beq x4,x14,80000d54 + 80000d40: 7c1062ef jal x5,80007d00 + 80000d44: 80000d34 .word 0x80000d34 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 8000f1a5 .word 0x8000f1a5 + 80000d50: 00000000 .word 0x00000000 + 80000d54: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0xeed9f2d2e4c6aefb + 80000d58: 00093583 ld x11,0(x18) + 80000d5c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs2: x31 = 0xc3341849af10810d + 80000d60: 00093f83 ld x31,0(x18) + 80000d64: 00890913 addi x18,x18,8 + +0000000080000d68 : +Zkne_aes64ks2_cg_cp_rs2_b31: + aes64ks2 x9, x11, x31 # perform operation + 80000d68: 7ff584b3 aes64ks2 x9,x11,x31 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zkne_aes64ks2_cg_cp_rs2_b31, Zkne_aes64ks2_cg_cp_rs2_b31_str) + 80000d6c: 000cb203 ld x4,0(x25) + 80000d70: 00920c63 beq x4,x9,80000d88 + 80000d74: 78d062ef jal x5,80007d00 + 80000d78: 80000d68 .word 0x80000d68 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 8000f1dc .word 0x8000f1dc + 80000d84: 00000000 .word 0x00000000 + 80000d88: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x7ec1d3de1f2b8aec + 80000d8c: 00093503 ld x10,0(x18) + 80000d90: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x6655eba28fa8bfdb + 80000d94: 00093303 ld x6,0(x18) + 80000d98: 00890913 addi x18,x18,8 + +0000000080000d9c : +Zkne_aes64ks2_cg_cp_rd_b0: + aes64ks2 x0, x10, x6 # perform operation + 80000d9c: 7e650033 aes64ks2 x0,x10,x6 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zkne_aes64ks2_cg_cp_rd_b0, Zkne_aes64ks2_cg_cp_rd_b0_str) + 80000da0: 000cb203 ld x4,0(x25) + 80000da4: 00020c63 beq x4,x0,80000dbc + 80000da8: 759062ef jal x5,80007d00 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 8000f213 .word 0x8000f213 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x117b6e51353965ba + 80000dc0: 00093b03 ld x22,0(x18) + 80000dc4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0x31603f4696ede71b + 80000dc8: 00093a83 ld x21,0(x18) + 80000dcc: 00890913 addi x18,x18,8 + +0000000080000dd0 : +Zkne_aes64ks2_cg_cp_rd_b1: + aes64ks2 x1, x22, x21 # perform operation + 80000dd0: 7f5b00b3 aes64ks2 x1,x22,x21 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zkne_aes64ks2_cg_cp_rd_b1, Zkne_aes64ks2_cg_cp_rd_b1_str) + 80000dd4: 000cb203 ld x4,0(x25) + 80000dd8: 00120c63 beq x4,x1,80000df0 + 80000ddc: 725062ef jal x5,80007d00 + 80000de0: 80000dd0 .word 0x80000dd0 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 8000f248 .word 0x8000f248 + 80000dec: 00000000 .word 0x00000000 + 80000df0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0x74ee3ebedb9f7122 + 80000df4: 00093783 ld x15,0(x18) + 80000df8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0xc1268ce0d8e100f3 + 80000dfc: 00093503 ld x10,0(x18) + 80000e00: 00890913 addi x18,x18,8 + +0000000080000e04 : +Zkne_aes64ks2_cg_cp_rd_b2: + aes64ks2 x2, x15, x10 # perform operation + 80000e04: 7ea78133 aes64ks2 x2,x15,x10 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zkne_aes64ks2_cg_cp_rd_b2, Zkne_aes64ks2_cg_cp_rd_b2_str) + 80000e08: 000cb203 ld x4,0(x25) + 80000e0c: 00220c63 beq x4,x2,80000e24 + 80000e10: 6f1062ef jal x5,80007d00 + 80000e14: 80000e04 .word 0x80000e04 + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 8000f27d .word 0x8000f27d + 80000e20: 00000000 .word 0x00000000 + 80000e24: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x42663633f2f1c3dc + 80000e28: 00093383 ld x7,0(x18) + 80000e2c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0x939252a702d99970 + 80000e30: 00093b83 ld x23,0(x18) + 80000e34: 00890913 addi x18,x18,8 + +0000000080000e38 : +Zkne_aes64ks2_cg_cp_rd_b3: + aes64ks2 x3, x7, x23 # perform operation + 80000e38: 7f7381b3 aes64ks2 x3,x7,x23 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zkne_aes64ks2_cg_cp_rd_b3, Zkne_aes64ks2_cg_cp_rd_b3_str) + 80000e3c: 000cb203 ld x4,0(x25) + 80000e40: 00320c63 beq x4,x3,80000e58 + 80000e44: 6bd062ef jal x5,80007d00 + 80000e48: 80000e38 .word 0x80000e38 + 80000e4c: 00000000 .word 0x00000000 + 80000e50: 8000f2b2 .word 0x8000f2b2 + 80000e54: 00000000 .word 0x00000000 + 80000e58: 008c8c93 addi x25,x25,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e5c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e60: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xd69fc34d319a0c9d + 80000e64: 00093d83 ld x27,0(x18) + 80000e68: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x9eafcbbae225ed8a + 80000e6c: 00093583 ld x11,0(x18) + 80000e70: 00890913 addi x18,x18,8 + +0000000080000e74 : +Zkne_aes64ks2_cg_cp_rd_b4: + aes64ks2 x4, x27, x11 # perform operation + 80000e74: 7ebd8233 aes64ks2 x4,x27,x11 + # Check if x4 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x4, Zkne_aes64ks2_cg_cp_rd_b4, Zkne_aes64ks2_cg_cp_rd_b4_str) + 80000e78: 000cb683 ld x13,0(x25) + 80000e7c: 00468c63 beq x13,x4,80000e94 + 80000e80: 6c10676f jal x14,80007d40 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 8000f2e7 .word 0x8000f2e7 + 80000e90: 00000000 .word 0x00000000 + 80000e94: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xb3255f34e82ac659 + 80000e98: 00093103 ld x2,0(x18) + 80000e9c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0xbfd5a1bcbdae4ad0 + 80000ea0: 00093383 ld x7,0(x18) + 80000ea4: 00890913 addi x18,x18,8 + +0000000080000ea8 : +Zkne_aes64ks2_cg_cp_rd_b5: + aes64ks2 x5, x2, x7 # perform operation + 80000ea8: 7e7102b3 aes64ks2 x5,x2,x7 + # Check if x5 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x5, Zkne_aes64ks2_cg_cp_rd_b5, Zkne_aes64ks2_cg_cp_rd_b5_str) + 80000eac: 000cb683 ld x13,0(x25) + 80000eb0: 00568c63 beq x13,x5,80000ec8 + 80000eb4: 68d0676f jal x14,80007d40 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 8000f31c .word 0x8000f31c + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0xda3a2ca811052e11 + 80000ecc: 00093003 ld x0,0(x18) + 80000ed0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs2: x1 = 0x15816ba6022b31e3 + 80000ed4: 00093083 ld x1,0(x18) + 80000ed8: 00890913 addi x18,x18,8 + +0000000080000edc : +Zkne_aes64ks2_cg_cp_rd_b6: + aes64ks2 x6, x0, x1 # perform operation + 80000edc: 7e100333 aes64ks2 x6,x0,x1 + # Check if x6 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x6, Zkne_aes64ks2_cg_cp_rd_b6, Zkne_aes64ks2_cg_cp_rd_b6_str) + 80000ee0: 000cb683 ld x13,0(x25) + 80000ee4: 00668c63 beq x13,x6,80000efc + 80000ee8: 6590676f jal x14,80007d40 + 80000eec: 80000edc .word 0x80000edc + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 8000f351 .word 0x8000f351 + 80000ef8: 00000000 .word 0x00000000 + 80000efc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0xbcddb87651fd437d + 80000f00: 00093c03 ld x24,0(x18) + 80000f04: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xda6a399385d69662 + 80000f08: 00093783 ld x15,0(x18) + 80000f0c: 00890913 addi x18,x18,8 + +0000000080000f10 : +Zkne_aes64ks2_cg_cp_rd_b7: + aes64ks2 x7, x24, x15 # perform operation + 80000f10: 7efc03b3 aes64ks2 x7,x24,x15 + # Check if x7 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x7, Zkne_aes64ks2_cg_cp_rd_b7, Zkne_aes64ks2_cg_cp_rd_b7_str) + 80000f14: 000cb683 ld x13,0(x25) + 80000f18: 00768c63 beq x13,x7,80000f30 + 80000f1c: 6250676f jal x14,80007d40 + 80000f20: 80000f10 .word 0x80000f10 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 8000f386 .word 0x8000f386 + 80000f2c: 00000000 .word 0x00000000 + 80000f30: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x0) # load rs1: x0 = 0x2c6e5687f837fb0b + 80000f34: 00093003 ld x0,0(x18) + 80000f38: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs2: x24 = 0xcc9de1cf18dd552a + 80000f3c: 00093c03 ld x24,0(x18) + 80000f40: 00890913 addi x18,x18,8 + +0000000080000f44 : +Zkne_aes64ks2_cg_cp_rd_b8: + aes64ks2 x8, x0, x24 # perform operation + 80000f44: 7f800433 aes64ks2 x8,x0,x24 + # Check if x8 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x8, Zkne_aes64ks2_cg_cp_rd_b8, Zkne_aes64ks2_cg_cp_rd_b8_str) + 80000f48: 000cb683 ld x13,0(x25) + 80000f4c: 00868c63 beq x13,x8,80000f64 + 80000f50: 5f10676f jal x14,80007d40 + 80000f54: 80000f44 .word 0x80000f44 + 80000f58: 00000000 .word 0x00000000 + 80000f5c: 8000f3bb .word 0x8000f3bb + 80000f60: 00000000 .word 0x00000000 + 80000f64: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x2) # load rs1: x2 = 0xef25ad05982f13ae + 80000f68: 00093103 ld x2,0(x18) + 80000f6c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs2: x30 = 0xb13e9c9bb5512b2a + 80000f70: 00093f03 ld x30,0(x18) + 80000f74: 00890913 addi x18,x18,8 + +0000000080000f78 : +Zkne_aes64ks2_cg_cp_rd_b9: + aes64ks2 x9, x2, x30 # perform operation + 80000f78: 7fe104b3 aes64ks2 x9,x2,x30 + # Check if x9 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x9, Zkne_aes64ks2_cg_cp_rd_b9, Zkne_aes64ks2_cg_cp_rd_b9_str) + 80000f7c: 000cb683 ld x13,0(x25) + 80000f80: 00968c63 beq x13,x9,80000f98 + 80000f84: 5bd0676f jal x14,80007d40 + 80000f88: 80000f78 .word 0x80000f78 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 8000f3f0 .word 0x8000f3f0 + 80000f94: 00000000 .word 0x00000000 + 80000f98: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x71e7a52f2442a49a + 80000f9c: 00093f83 ld x31,0(x18) + 80000fa0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x924c3e5677214113 + 80000fa4: 00093583 ld x11,0(x18) + 80000fa8: 00890913 addi x18,x18,8 + +0000000080000fac : +Zkne_aes64ks2_cg_cp_rd_b10: + aes64ks2 x10, x31, x11 # perform operation + 80000fac: 7ebf8533 aes64ks2 x10,x31,x11 + # Check if x10 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x10, Zkne_aes64ks2_cg_cp_rd_b10, Zkne_aes64ks2_cg_cp_rd_b10_str) + 80000fb0: 000cb683 ld x13,0(x25) + 80000fb4: 00a68c63 beq x13,x10,80000fcc + 80000fb8: 5890676f jal x14,80007d40 + 80000fbc: 80000fac .word 0x80000fac + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 8000f425 .word 0x8000f425 + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x4b5b4b38f5ed516e + 80000fd0: 00093f83 ld x31,0(x18) + 80000fd4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0x8847caddc51a8932 + 80000fd8: 00093e03 ld x28,0(x18) + 80000fdc: 00890913 addi x18,x18,8 + +0000000080000fe0 : +Zkne_aes64ks2_cg_cp_rd_b11: + aes64ks2 x11, x31, x28 # perform operation + 80000fe0: 7fcf85b3 aes64ks2 x11,x31,x28 + # Check if x11 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x11, Zkne_aes64ks2_cg_cp_rd_b11, Zkne_aes64ks2_cg_cp_rd_b11_str) + 80000fe4: 000cb683 ld x13,0(x25) + 80000fe8: 00b68c63 beq x13,x11,80001000 + 80000fec: 5550676f jal x14,80007d40 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 8000f45b .word 0x8000f45b + 80000ffc: 00000000 .word 0x00000000 + 80001000: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0x31e2b632a6307a79 + 80001004: 00093303 ld x6,0(x18) + 80001008: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x21) # load rs2: x21 = 0xc5595c9b78011670 + 8000100c: 00093a83 ld x21,0(x18) + 80001010: 00890913 addi x18,x18,8 + +0000000080001014 : +Zkne_aes64ks2_cg_cp_rd_b12: + aes64ks2 x12, x6, x21 # perform operation + 80001014: 7f530633 aes64ks2 x12,x6,x21 + # Check if x12 contains the expected result. x25 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x25, x14, x13, x12, Zkne_aes64ks2_cg_cp_rd_b12, Zkne_aes64ks2_cg_cp_rd_b12_str) + 80001018: 000cb683 ld x13,0(x25) + 8000101c: 00c68c63 beq x13,x12,80001034 + 80001020: 5210676f jal x14,80007d40 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 8000f491 .word 0x8000f491 + 80001030: 00000000 .word 0x00000000 + 80001034: 008c8c93 addi x25,x25,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001038: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000103c: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0xed537ea17d022f06 + 80001040: 00093383 ld x7,0(x18) + 80001044: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x4a1636643cea1ded + 80001048: 00093983 ld x19,0(x18) + 8000104c: 00890913 addi x18,x18,8 + +0000000080001050 : +Zkne_aes64ks2_cg_cp_rd_b13: + aes64ks2 x13, x7, x19 # perform operation + 80001050: 7f3386b3 aes64ks2 x13,x7,x19 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zkne_aes64ks2_cg_cp_rd_b13, Zkne_aes64ks2_cg_cp_rd_b13_str) + 80001054: 000cb203 ld x4,0(x25) + 80001058: 00d20c63 beq x4,x13,80001070 + 8000105c: 4a5062ef jal x5,80007d00 + 80001060: 80001050 .word 0x80001050 + 80001064: 00000000 .word 0x00000000 + 80001068: 8000f4c7 .word 0x8000f4c7 + 8000106c: 00000000 .word 0x00000000 + 80001070: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs1: x19 = 0x8f427c2d82fad819 + 80001074: 00093983 ld x19,0(x18) + 80001078: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs2: x6 = 0x999b9111ceef9f04 + 8000107c: 00093303 ld x6,0(x18) + 80001080: 00890913 addi x18,x18,8 + +0000000080001084 : +Zkne_aes64ks2_cg_cp_rd_b14: + aes64ks2 x14, x19, x6 # perform operation + 80001084: 7e698733 aes64ks2 x14,x19,x6 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zkne_aes64ks2_cg_cp_rd_b14, Zkne_aes64ks2_cg_cp_rd_b14_str) + 80001088: 000cb203 ld x4,0(x25) + 8000108c: 00e20c63 beq x4,x14,800010a4 + 80001090: 471062ef jal x5,80007d00 + 80001094: 80001084 .word 0x80001084 + 80001098: 00000000 .word 0x00000000 + 8000109c: 8000f4fd .word 0x8000f4fd + 800010a0: 00000000 .word 0x00000000 + 800010a4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x02bddd268c0db471 + 800010a8: 00093f03 ld x30,0(x18) + 800010ac: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xd9db8d563039dd08 + 800010b0: 00093703 ld x14,0(x18) + 800010b4: 00890913 addi x18,x18,8 + +00000000800010b8 : +Zkne_aes64ks2_cg_cp_rd_b15: + aes64ks2 x15, x30, x14 # perform operation + 800010b8: 7eef07b3 aes64ks2 x15,x30,x14 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zkne_aes64ks2_cg_cp_rd_b15, Zkne_aes64ks2_cg_cp_rd_b15_str) + 800010bc: 000cb203 ld x4,0(x25) + 800010c0: 00f20c63 beq x4,x15,800010d8 + 800010c4: 43d062ef jal x5,80007d00 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 8000f533 .word 0x8000f533 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x1) # load rs1: x1 = 0x6324159b9f6a8d92 + 800010dc: 00093083 ld x1,0(x18) + 800010e0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0xa94c9c1dae245ea5 + 800010e4: 00093783 ld x15,0(x18) + 800010e8: 00890913 addi x18,x18,8 + +00000000800010ec : +Zkne_aes64ks2_cg_cp_rd_b16: + aes64ks2 x16, x1, x15 # perform operation + 800010ec: 7ef08833 aes64ks2 x16,x1,x15 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zkne_aes64ks2_cg_cp_rd_b16, Zkne_aes64ks2_cg_cp_rd_b16_str) + 800010f0: 000cb203 ld x4,0(x25) + 800010f4: 01020c63 beq x4,x16,8000110c + 800010f8: 409062ef jal x5,80007d00 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 8000f569 .word 0x8000f569 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x288b5af35eb192ea + 80001110: 00093503 ld x10,0(x18) + 80001114: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0x9fbc0a83ff4b3f36 + 80001118: 00093583 ld x11,0(x18) + 8000111c: 00890913 addi x18,x18,8 + +0000000080001120 : +Zkne_aes64ks2_cg_cp_rd_b17: + aes64ks2 x17, x10, x11 # perform operation + 80001120: 7eb508b3 aes64ks2 x17,x10,x11 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zkne_aes64ks2_cg_cp_rd_b17, Zkne_aes64ks2_cg_cp_rd_b17_str) + 80001124: 000cb203 ld x4,0(x25) + 80001128: 01120c63 beq x4,x17,80001140 + 8000112c: 3d5062ef jal x5,80007d00 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 8000f59f .word 0x8000f59f + 8000113c: 00000000 .word 0x00000000 + 80001140: 008c8c93 addi x25,x25,8 + + mv x9, x18 # switch data pointer register to avoid conflict with test + 80001144: 00090493 addi x9,x18,0 +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xf4b5c66f4143208d + 80001148: 0004b703 ld x14,0(x9) + 8000114c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x24f6c8762bd10a05 + 80001150: 0004bf03 ld x30,0(x9) + 80001154: 00848493 addi x9,x9,8 + +0000000080001158 : +Zkne_aes64ks2_cg_cp_rd_b18: + aes64ks2 x18, x14, x30 # perform operation + 80001158: 7fe70933 aes64ks2 x18,x14,x30 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zkne_aes64ks2_cg_cp_rd_b18, Zkne_aes64ks2_cg_cp_rd_b18_str) + 8000115c: 000cb203 ld x4,0(x25) + 80001160: 01220c63 beq x4,x18,80001178 + 80001164: 39d062ef jal x5,80007d00 + 80001168: 80001158 .word 0x80001158 + 8000116c: 00000000 .word 0x00000000 + 80001170: 8000f5d5 .word 0x8000f5d5 + 80001174: 00000000 .word 0x00000000 + 80001178: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xe320d4845b00b82f + 8000117c: 0004bb83 ld x23,0(x9) + 80001180: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0xf9ca13bdcaf5d8eb + 80001184: 0004b003 ld x0,0(x9) + 80001188: 00848493 addi x9,x9,8 + +000000008000118c : +Zkne_aes64ks2_cg_cp_rd_b19: + aes64ks2 x19, x23, x0 # perform operation + 8000118c: 7e0b89b3 aes64ks2 x19,x23,x0 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes64ks2_cg_cp_rd_b19, Zkne_aes64ks2_cg_cp_rd_b19_str) + 80001190: 000cb203 ld x4,0(x25) + 80001194: 01320c63 beq x4,x19,800011ac + 80001198: 369062ef jal x5,80007d00 + 8000119c: 8000118c .word 0x8000118c + 800011a0: 00000000 .word 0x00000000 + 800011a4: 8000f60b .word 0x8000f60b + 800011a8: 00000000 .word 0x00000000 + 800011ac: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x855d82cd447549fd + 800011b0: 0004bf83 ld x31,0(x9) + 800011b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x2209e79d5ec08e08 + 800011b8: 0004bb83 ld x23,0(x9) + 800011bc: 00848493 addi x9,x9,8 + +00000000800011c0 : +Zkne_aes64ks2_cg_cp_rd_b20: + aes64ks2 x20, x31, x23 # perform operation + 800011c0: 7f7f8a33 aes64ks2 x20,x31,x23 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zkne_aes64ks2_cg_cp_rd_b20, Zkne_aes64ks2_cg_cp_rd_b20_str) + 800011c4: 000cb203 ld x4,0(x25) + 800011c8: 01420c63 beq x4,x20,800011e0 + 800011cc: 335062ef jal x5,80007d00 + 800011d0: 800011c0 .word 0x800011c0 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 8000f641 .word 0x8000f641 + 800011dc: 00000000 .word 0x00000000 + 800011e0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x33d28591cfbf2ff7 + 800011e4: 0004bf03 ld x30,0(x9) + 800011e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xab36df4ad5d130ed + 800011ec: 0004ba03 ld x20,0(x9) + 800011f0: 00848493 addi x9,x9,8 + +00000000800011f4 : +Zkne_aes64ks2_cg_cp_rd_b21: + aes64ks2 x21, x30, x20 # perform operation + 800011f4: 7f4f0ab3 aes64ks2 x21,x30,x20 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zkne_aes64ks2_cg_cp_rd_b21, Zkne_aes64ks2_cg_cp_rd_b21_str) + 800011f8: 000cb203 ld x4,0(x25) + 800011fc: 01520c63 beq x4,x21,80001214 + 80001200: 301062ef jal x5,80007d00 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 8000f677 .word 0x8000f677 + 80001210: 00000000 .word 0x00000000 + 80001214: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x26db17242cdd81ce + 80001218: 0004b703 ld x14,0(x9) + 8000121c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfaf61647d6ddd6ca + 80001220: 0004bc03 ld x24,0(x9) + 80001224: 00848493 addi x9,x9,8 + +0000000080001228 : +Zkne_aes64ks2_cg_cp_rd_b22: + aes64ks2 x22, x14, x24 # perform operation + 80001228: 7f870b33 aes64ks2 x22,x14,x24 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes64ks2_cg_cp_rd_b22, Zkne_aes64ks2_cg_cp_rd_b22_str) + 8000122c: 000cb203 ld x4,0(x25) + 80001230: 01620c63 beq x4,x22,80001248 + 80001234: 2cd062ef jal x5,80007d00 + 80001238: 80001228 .word 0x80001228 + 8000123c: 00000000 .word 0x00000000 + 80001240: 8000f6ad .word 0x8000f6ad + 80001244: 00000000 .word 0x00000000 + 80001248: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x32ed83af8397143d + 8000124c: 0004b003 ld x0,0(x9) + 80001250: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xda17088b74b44ce7 + 80001254: 0004bf83 ld x31,0(x9) + 80001258: 00848493 addi x9,x9,8 + +000000008000125c : +Zkne_aes64ks2_cg_cp_rd_b23: + aes64ks2 x23, x0, x31 # perform operation + 8000125c: 7ff00bb3 aes64ks2 x23,x0,x31 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zkne_aes64ks2_cg_cp_rd_b23, Zkne_aes64ks2_cg_cp_rd_b23_str) + 80001260: 000cb203 ld x4,0(x25) + 80001264: 01720c63 beq x4,x23,8000127c + 80001268: 299062ef jal x5,80007d00 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 8000f6e3 .word 0x8000f6e3 + 80001278: 00000000 .word 0x00000000 + 8000127c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0x2452d5d5bf6cd467 + 80001280: 0004b003 ld x0,0(x9) + 80001284: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xe4eb06b3d1c9ce1c + 80001288: 0004b303 ld x6,0(x9) + 8000128c: 00848493 addi x9,x9,8 + +0000000080001290 : +Zkne_aes64ks2_cg_cp_rd_b24: + aes64ks2 x24, x0, x6 # perform operation + 80001290: 7e600c33 aes64ks2 x24,x0,x6 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes64ks2_cg_cp_rd_b24, Zkne_aes64ks2_cg_cp_rd_b24_str) + 80001294: 000cb203 ld x4,0(x25) + 80001298: 01820c63 beq x4,x24,800012b0 + 8000129c: 265062ef jal x5,80007d00 + 800012a0: 80001290 .word 0x80001290 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 8000f719 .word 0x8000f719 + 800012ac: 00000000 .word 0x00000000 + 800012b0: 008c8c93 addi x25,x25,8 + + mv x31, x25 # switch signature pointer register to avoid conflict with test + 800012b4: 000c8f93 addi x31,x25,0 +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xedaf2885d8e916c0 + 800012b8: 0004bd03 ld x26,0(x9) + 800012bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xd4a52babf622ca19 + 800012c0: 0004b903 ld x18,0(x9) + 800012c4: 00848493 addi x9,x9,8 + +00000000800012c8 : +Zkne_aes64ks2_cg_cp_rd_b25: + aes64ks2 x25, x26, x18 # perform operation + 800012c8: 7f2d0cb3 aes64ks2 x25,x26,x18 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zkne_aes64ks2_cg_cp_rd_b25, Zkne_aes64ks2_cg_cp_rd_b25_str) + 800012cc: 000fb203 ld x4,0(x31) + 800012d0: 01920c63 beq x4,x25,800012e8 + 800012d4: 22d062ef jal x5,80007d00 + 800012d8: 800012c8 .word 0x800012c8 + 800012dc: 00000000 .word 0x00000000 + 800012e0: 8000f74f .word 0x8000f74f + 800012e4: 00000000 .word 0x00000000 + 800012e8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xd0f151b6bd0cbe80 + 800012ec: 0004b003 ld x0,0(x9) + 800012f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xb1820cbc4ccf83a8 + 800012f4: 0004b583 ld x11,0(x9) + 800012f8: 00848493 addi x9,x9,8 + +00000000800012fc : +Zkne_aes64ks2_cg_cp_rd_b26: + aes64ks2 x26, x0, x11 # perform operation + 800012fc: 7eb00d33 aes64ks2 x26,x0,x11 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zkne_aes64ks2_cg_cp_rd_b26, Zkne_aes64ks2_cg_cp_rd_b26_str) + 80001300: 000fb203 ld x4,0(x31) + 80001304: 01a20c63 beq x4,x26,8000131c + 80001308: 1f9062ef jal x5,80007d00 + 8000130c: 800012fc .word 0x800012fc + 80001310: 00000000 .word 0x00000000 + 80001314: 8000f785 .word 0x8000f785 + 80001318: 00000000 .word 0x00000000 + 8000131c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x2a178848088a8a9a + 80001320: 0004bd03 ld x26,0(x9) + 80001324: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x4bf3dac3c94f2e42 + 80001328: 0004b383 ld x7,0(x9) + 8000132c: 00848493 addi x9,x9,8 + +0000000080001330 : +Zkne_aes64ks2_cg_cp_rd_b27: + aes64ks2 x27, x26, x7 # perform operation + 80001330: 7e7d0db3 aes64ks2 x27,x26,x7 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zkne_aes64ks2_cg_cp_rd_b27, Zkne_aes64ks2_cg_cp_rd_b27_str) + 80001334: 000fb203 ld x4,0(x31) + 80001338: 01b20c63 beq x4,x27,80001350 + 8000133c: 1c5062ef jal x5,80007d00 + 80001340: 80001330 .word 0x80001330 + 80001344: 00000000 .word 0x00000000 + 80001348: 8000f7bb .word 0x8000f7bb + 8000134c: 00000000 .word 0x00000000 + 80001350: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x901dadee9ee3b073 + 80001354: 0004bc03 ld x24,0(x9) + 80001358: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x79ec6c4858aae58c + 8000135c: 0004bd83 ld x27,0(x9) + 80001360: 00848493 addi x9,x9,8 + +0000000080001364 : +Zkne_aes64ks2_cg_cp_rd_b28: + aes64ks2 x28, x24, x27 # perform operation + 80001364: 7fbc0e33 aes64ks2 x28,x24,x27 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zkne_aes64ks2_cg_cp_rd_b28, Zkne_aes64ks2_cg_cp_rd_b28_str) + 80001368: 000fb203 ld x4,0(x31) + 8000136c: 01c20c63 beq x4,x28,80001384 + 80001370: 191062ef jal x5,80007d00 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000f7f1 .word 0x8000f7f1 + 80001380: 00000000 .word 0x00000000 + 80001384: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xabbc6ec6415c8a22 + 80001388: 0004b403 ld x8,0(x9) + 8000138c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x79320e291abf9580 + 80001390: 0004bb83 ld x23,0(x9) + 80001394: 00848493 addi x9,x9,8 + +0000000080001398 : +Zkne_aes64ks2_cg_cp_rd_b29: + aes64ks2 x29, x8, x23 # perform operation + 80001398: 7f740eb3 aes64ks2 x29,x8,x23 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zkne_aes64ks2_cg_cp_rd_b29, Zkne_aes64ks2_cg_cp_rd_b29_str) + 8000139c: 000fb203 ld x4,0(x31) + 800013a0: 01d20c63 beq x4,x29,800013b8 + 800013a4: 15d062ef jal x5,80007d00 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 8000f827 .word 0x8000f827 + 800013b4: 00000000 .word 0x00000000 + 800013b8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x3c922ce0f3cbb912 + 800013bc: 0004b183 ld x3,0(x9) + 800013c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xb90b7c818b032701 + 800013c4: 0004b083 ld x1,0(x9) + 800013c8: 00848493 addi x9,x9,8 + +00000000800013cc : +Zkne_aes64ks2_cg_cp_rd_b30: + aes64ks2 x30, x3, x1 # perform operation + 800013cc: 7e118f33 aes64ks2 x30,x3,x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zkne_aes64ks2_cg_cp_rd_b30, Zkne_aes64ks2_cg_cp_rd_b30_str) + 800013d0: 000fb203 ld x4,0(x31) + 800013d4: 01e20c63 beq x4,x30,800013ec + 800013d8: 129062ef jal x5,80007d00 + 800013dc: 800013cc .word 0x800013cc + 800013e0: 00000000 .word 0x00000000 + 800013e4: 8000f85d .word 0x8000f85d + 800013e8: 00000000 .word 0x00000000 + 800013ec: 008f8f93 addi x31,x31,8 + + mv x12, x31 # switch signature pointer register to avoid conflict with test + 800013f0: 000f8613 addi x12,x31,0 +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x70a573d6370f871c + 800013f4: 0004be03 ld x28,0(x9) + 800013f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x4a71f774f8b884b5 + 800013fc: 0004b883 ld x17,0(x9) + 80001400: 00848493 addi x9,x9,8 + +0000000080001404 : +Zkne_aes64ks2_cg_cp_rd_b31: + aes64ks2 x31, x28, x17 # perform operation + 80001404: 7f1e0fb3 aes64ks2 x31,x28,x17 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cp_rd_b31, Zkne_aes64ks2_cg_cp_rd_b31_str) + 80001408: 00063203 ld x4,0(x12) + 8000140c: 01f20c63 beq x4,x31,80001424 + 80001410: 0f1062ef jal x5,80007d00 + 80001414: 80001404 .word 0x80001404 + 80001418: 00000000 .word 0x00000000 + 8000141c: 8000f893 .word 0x8000f893 + 80001420: 00000000 .word 0x00000000 + 80001424: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000000000000 + 80001428: 0004bf03 ld x30,0(x9) + 8000142c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x043ca4f4c9f95d0b + 80001430: 0004b103 ld x2,0(x9) + 80001434: 00848493 addi x9,x9,8 + +0000000080001438 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x0: + aes64ks2 x7, x30, x2 # perform operation + 80001438: 7e2f03b3 aes64ks2 x7,x30,x2 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cp_rs1_edges_0x0, Zkne_aes64ks2_cg_cp_rs1_edges_0x0_str) + 8000143c: 00063203 ld x4,0(x12) + 80001440: 00720c63 beq x4,x7,80001458 + 80001444: 0bd062ef jal x5,80007d00 + 80001448: 80001438 .word 0x80001438 + 8000144c: 00000000 .word 0x00000000 + 80001450: 8000f8c9 .word 0x8000f8c9 + 80001454: 00000000 .word 0x00000000 + 80001458: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000001 + 8000145c: 0004b183 ld x3,0(x9) + 80001460: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0daea60c3e10aeef + 80001464: 0004b783 ld x15,0(x9) + 80001468: 00848493 addi x9,x9,8 + +000000008000146c : +Zkne_aes64ks2_cg_cp_rs1_edges_0x1: + aes64ks2 x29, x3, x15 # perform operation + 8000146c: 7ef18eb3 aes64ks2 x29,x3,x15 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cp_rs1_edges_0x1, Zkne_aes64ks2_cg_cp_rs1_edges_0x1_str) + 80001470: 00063203 ld x4,0(x12) + 80001474: 01d20c63 beq x4,x29,8000148c + 80001478: 089062ef jal x5,80007d00 + 8000147c: 8000146c .word 0x8000146c + 80001480: 00000000 .word 0x00000000 + 80001484: 8000f906 .word 0x8000f906 + 80001488: 00000000 .word 0x00000000 + 8000148c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 80001490: 0004b503 ld x10,0(x9) + 80001494: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xca9c5ce66ab775d7 + 80001498: 0004bf03 ld x30,0(x9) + 8000149c: 00848493 addi x9,x9,8 + +00000000800014a0 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x2: + aes64ks2 x20, x10, x30 # perform operation + 800014a0: 7fe50a33 aes64ks2 x20,x10,x30 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cp_rs1_edges_0x2, Zkne_aes64ks2_cg_cp_rs1_edges_0x2_str) + 800014a4: 00063203 ld x4,0(x12) + 800014a8: 01420c63 beq x4,x20,800014c0 + 800014ac: 055062ef jal x5,80007d00 + 800014b0: 800014a0 .word 0x800014a0 + 800014b4: 00000000 .word 0x00000000 + 800014b8: 8000f943 .word 0x8000f943 + 800014bc: 00000000 .word 0x00000000 + 800014c0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x8000000000000000 + 800014c4: 0004b503 ld x10,0(x9) + 800014c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xb6348d230727e3e3 + 800014cc: 0004be83 ld x29,0(x9) + 800014d0: 00848493 addi x9,x9,8 + +00000000800014d4 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000000: + aes64ks2 x25, x10, x29 # perform operation + 800014d4: 7fd50cb3 aes64ks2 x25,x10,x29 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000000, Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000000_str) + 800014d8: 00063203 ld x4,0(x12) + 800014dc: 01920c63 beq x4,x25,800014f4 + 800014e0: 021062ef jal x5,80007d00 + 800014e4: 800014d4 .word 0x800014d4 + 800014e8: 00000000 .word 0x00000000 + 800014ec: 8000f980 .word 0x8000f980 + 800014f0: 00000000 .word 0x00000000 + 800014f4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000001 + 800014f8: 0004ba83 ld x21,0(x9) + 800014fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xa0bc608796b2286e + 80001500: 0004b403 ld x8,0(x9) + 80001504: 00848493 addi x9,x9,8 + +0000000080001508 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000001: + aes64ks2 x27, x21, x8 # perform operation + 80001508: 7e8a8db3 aes64ks2 x27,x21,x8 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000001, Zkne_aes64ks2_cg_cp_rs1_edges_0x8000000000000001_str) + 8000150c: 00063203 ld x4,0(x12) + 80001510: 01b20c63 beq x4,x27,80001528 + 80001514: 7ec062ef jal x5,80007d00 + 80001518: 80001508 .word 0x80001508 + 8000151c: 00000000 .word 0x00000000 + 80001520: 8000f9cd .word 0x8000f9cd + 80001524: 00000000 .word 0x00000000 + 80001528: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7fffffffffffffff + 8000152c: 0004b503 ld x10,0(x9) + 80001530: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xce66a6b4807cd4eb + 80001534: 0004b103 ld x2,0(x9) + 80001538: 00848493 addi x9,x9,8 + +000000008000153c : +Zkne_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff: + aes64ks2 x31, x10, x2 # perform operation + 8000153c: 7e250fb3 aes64ks2 x31,x10,x2 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff, Zkne_aes64ks2_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001540: 00063203 ld x4,0(x12) + 80001544: 01f20c63 beq x4,x31,8000155c + 80001548: 7b8062ef jal x5,80007d00 + 8000154c: 8000153c .word 0x8000153c + 80001550: 00000000 .word 0x00000000 + 80001554: 8000fa1a .word 0x8000fa1a + 80001558: 00000000 .word 0x00000000 + 8000155c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80001560: 0004be03 ld x28,0(x9) + 80001564: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x032cf5ac018beb68 + 80001568: 0004b383 ld x7,0(x9) + 8000156c: 00848493 addi x9,x9,8 + +0000000080001570 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe: + aes64ks2 x24, x28, x7 # perform operation + 80001570: 7e7e0c33 aes64ks2 x24,x28,x7 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001574: 00063203 ld x4,0(x12) + 80001578: 01820c63 beq x4,x24,80001590 + 8000157c: 784062ef jal x5,80007d00 + 80001580: 80001570 .word 0x80001570 + 80001584: 00000000 .word 0x00000000 + 80001588: 8000fa67 .word 0x8000fa67 + 8000158c: 00000000 .word 0x00000000 + 80001590: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffffffffffff + 80001594: 0004b083 ld x1,0(x9) + 80001598: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fa85ac4b14ce3d4 + 8000159c: 0004b803 ld x16,0(x9) + 800015a0: 00848493 addi x9,x9,8 + +00000000800015a4 : +Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff: + aes64ks2 x29, x1, x16 # perform operation + 800015a4: 7f008eb3 aes64ks2 x29,x1,x16 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff, Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffffffffffff_str) + 800015a8: 00063203 ld x4,0(x12) + 800015ac: 01d20c63 beq x4,x29,800015c4 + 800015b0: 750062ef jal x5,80007d00 + 800015b4: 800015a4 .word 0x800015a4 + 800015b8: 00000000 .word 0x00000000 + 800015bc: 8000fab4 .word 0x8000fab4 + 800015c0: 00000000 .word 0x00000000 + 800015c4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xfffffffffffffffe + 800015c8: 0004bb03 ld x22,0(x9) + 800015cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x209796ce14cdbe4c + 800015d0: 0004b903 ld x18,0(x9) + 800015d4: 00848493 addi x9,x9,8 + +00000000800015d8 : +Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe: + aes64ks2 x8, x22, x18 # perform operation + 800015d8: 7f2b0433 aes64ks2 x8,x22,x18 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe, Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015dc: 00063203 ld x4,0(x12) + 800015e0: 00820c63 beq x4,x8,800015f8 + 800015e4: 71c062ef jal x5,80007d00 + 800015e8: 800015d8 .word 0x800015d8 + 800015ec: 00000000 .word 0x00000000 + 800015f0: 8000fb01 .word 0x8000fb01 + 800015f4: 00000000 .word 0x00000000 + 800015f8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800015fc: 0004be03 ld x28,0(x9) + 80001600: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x24a36bedca9c30bd + 80001604: 0004be83 ld x29,0(x9) + 80001608: 00848493 addi x9,x9,8 + +000000008000160c : +Zkne_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2: + aes64ks2 x27, x28, x29 # perform operation + 8000160c: 7fde0db3 aes64ks2 x27,x28,x29 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001610: 00063203 ld x4,0(x12) + 80001614: 01b20c63 beq x4,x27,8000162c + 80001618: 6e8062ef jal x5,80007d00 + 8000161c: 8000160c .word 0x8000160c + 80001620: 00000000 .word 0x00000000 + 80001624: 8000fb4e .word 0x8000fb4e + 80001628: 00000000 .word 0x00000000 + 8000162c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80001630: 0004bc83 ld x25,0(x9) + 80001634: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x9d8fc35ebfa3f99d + 80001638: 0004b583 ld x11,0(x9) + 8000163c: 00848493 addi x9,x9,8 + +0000000080001640 : +Zkne_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + aes64ks2 x20, x25, x11 # perform operation + 80001640: 7ebc8a33 aes64ks2 x20,x25,x11 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001644: 00063203 ld x4,0(x12) + 80001648: 01420c63 beq x4,x20,80001660 + 8000164c: 6b4062ef jal x5,80007d00 + 80001650: 80001640 .word 0x80001640 + 80001654: 00000000 .word 0x00000000 + 80001658: 8000fb9b .word 0x8000fb9b + 8000165c: 00000000 .word 0x00000000 + 80001660: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5555555555555555 + 80001664: 0004ba83 ld x21,0(x9) + 80001668: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x1661bf18490892c9 + 8000166c: 0004b183 ld x3,0(x9) + 80001670: 00848493 addi x9,x9,8 + +0000000080001674 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x5555555555555555: + aes64ks2 x14, x21, x3 # perform operation + 80001674: 7e3a8733 aes64ks2 x14,x21,x3 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cp_rs1_edges_0x5555555555555555, Zkne_aes64ks2_cg_cp_rs1_edges_0x5555555555555555_str) + 80001678: 00063203 ld x4,0(x12) + 8000167c: 00e20c63 beq x4,x14,80001694 + 80001680: 680062ef jal x5,80007d00 + 80001684: 80001674 .word 0x80001674 + 80001688: 00000000 .word 0x00000000 + 8000168c: 8000fbe8 .word 0x8000fbe8 + 80001690: 00000000 .word 0x00000000 + 80001694: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x00000000ffffffff + 80001698: 0004b983 ld x19,0(x9) + 8000169c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xe5c00f33f6a429b0 + 800016a0: 0004b183 ld x3,0(x9) + 800016a4: 00848493 addi x9,x9,8 + +00000000800016a8 : +Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffff: + aes64ks2 x15, x19, x3 # perform operation + 800016a8: 7e3987b3 aes64ks2 x15,x19,x3 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffff, Zkne_aes64ks2_cg_cp_rs1_edges_0xffffffff_str) + 800016ac: 00063203 ld x4,0(x12) + 800016b0: 00f20c63 beq x4,x15,800016c8 + 800016b4: 64c062ef jal x5,80007d00 + 800016b8: 800016a8 .word 0x800016a8 + 800016bc: 00000000 .word 0x00000000 + 800016c0: 8000fc35 .word 0x8000fc35 + 800016c4: 00000000 .word 0x00000000 + 800016c8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800016cc: 0004b183 ld x3,0(x9) + 800016d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x340b4d3199f9e289 + 800016d4: 0004bd03 ld x26,0(x9) + 800016d8: 00848493 addi x9,x9,8 + +00000000800016dc : +Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffe: + aes64ks2 x25, x3, x26 # perform operation + 800016dc: 7fa18cb3 aes64ks2 x25,x3,x26 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffe, Zkne_aes64ks2_cg_cp_rs1_edges_0xfffffffe_str) + 800016e0: 00063203 ld x4,0(x12) + 800016e4: 01920c63 beq x4,x25,800016fc + 800016e8: 618062ef jal x5,80007d00 + 800016ec: 800016dc .word 0x800016dc + 800016f0: 00000000 .word 0x00000000 + 800016f4: 8000fc7a .word 0x8000fc7a + 800016f8: 00000000 .word 0x00000000 + 800016fc: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000100000000 + 80001700: 0004b183 ld x3,0(x9) + 80001704: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xd7ef47b10cd752ab + 80001708: 0004b903 ld x18,0(x9) + 8000170c: 00848493 addi x9,x9,8 + +0000000080001710 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x100000000: + aes64ks2 x17, x3, x18 # perform operation + 80001710: 7f2188b3 aes64ks2 x17,x3,x18 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cp_rs1_edges_0x100000000, Zkne_aes64ks2_cg_cp_rs1_edges_0x100000000_str) + 80001714: 00063203 ld x4,0(x12) + 80001718: 01120c63 beq x4,x17,80001730 + 8000171c: 5e4062ef jal x5,80007d00 + 80001720: 80001710 .word 0x80001710 + 80001724: 00000000 .word 0x00000000 + 80001728: 8000fcbf .word 0x8000fcbf + 8000172c: 00000000 .word 0x00000000 + 80001730: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0000000100000001 + 80001734: 0004b403 ld x8,0(x9) + 80001738: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x01184f167caf3e46 + 8000173c: 0004bf83 ld x31,0(x9) + 80001740: 00848493 addi x9,x9,8 + +0000000080001744 : +Zkne_aes64ks2_cg_cp_rs1_edges_0x100000001: + aes64ks2 x2, x8, x31 # perform operation + 80001744: 7ff40133 aes64ks2 x2,x8,x31 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cp_rs1_edges_0x100000001, Zkne_aes64ks2_cg_cp_rs1_edges_0x100000001_str) + 80001748: 00063203 ld x4,0(x12) + 8000174c: 00220c63 beq x4,x2,80001764 + 80001750: 5b0062ef jal x5,80007d00 + 80001754: 80001744 .word 0x80001744 + 80001758: 00000000 .word 0x00000000 + 8000175c: 8000fd05 .word 0x8000fd05 + 80001760: 00000000 .word 0x00000000 + 80001764: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xdf3d67bb86016676 + 80001768: 0004b883 ld x17,0(x9) + 8000176c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 80001770: 0004b503 ld x10,0(x9) + 80001774: 00848493 addi x9,x9,8 + +0000000080001778 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x0: + aes64ks2 x7, x17, x10 # perform operation + 80001778: 7ea883b3 aes64ks2 x7,x17,x10 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cp_rs2_edges_0x0, Zkne_aes64ks2_cg_cp_rs2_edges_0x0_str) + 8000177c: 00063203 ld x4,0(x12) + 80001780: 00720c63 beq x4,x7,80001798 + 80001784: 57c062ef jal x5,80007d00 + 80001788: 80001778 .word 0x80001778 + 8000178c: 00000000 .word 0x00000000 + 80001790: 8000fd4b .word 0x8000fd4b + 80001794: 00000000 .word 0x00000000 + 80001798: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x2b44395d613339e7 + 8000179c: 0004b503 ld x10,0(x9) + 800017a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 800017a4: 0004b783 ld x15,0(x9) + 800017a8: 00848493 addi x9,x9,8 + +00000000800017ac : +Zkne_aes64ks2_cg_cp_rs2_edges_0x1: + aes64ks2 x8, x10, x15 # perform operation + 800017ac: 7ef50433 aes64ks2 x8,x10,x15 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cp_rs2_edges_0x1, Zkne_aes64ks2_cg_cp_rs2_edges_0x1_str) + 800017b0: 00063203 ld x4,0(x12) + 800017b4: 00820c63 beq x4,x8,800017cc + 800017b8: 548062ef jal x5,80007d00 + 800017bc: 800017ac .word 0x800017ac + 800017c0: 00000000 .word 0x00000000 + 800017c4: 8000fd89 .word 0x8000fd89 + 800017c8: 00000000 .word 0x00000000 + 800017cc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x2ae1ba9276a9b228 + 800017d0: 0004b383 ld x7,0(x9) + 800017d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000002 + 800017d8: 0004b783 ld x15,0(x9) + 800017dc: 00848493 addi x9,x9,8 + +00000000800017e0 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x2: + aes64ks2 x10, x7, x15 # perform operation + 800017e0: 7ef38533 aes64ks2 x10,x7,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cp_rs2_edges_0x2, Zkne_aes64ks2_cg_cp_rs2_edges_0x2_str) + 800017e4: 00063203 ld x4,0(x12) + 800017e8: 00a20c63 beq x4,x10,80001800 + 800017ec: 514062ef jal x5,80007d00 + 800017f0: 800017e0 .word 0x800017e0 + 800017f4: 00000000 .word 0x00000000 + 800017f8: 8000fdc7 .word 0x8000fdc7 + 800017fc: 00000000 .word 0x00000000 + 80001800: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7e2efceb08036418 + 80001804: 0004ba83 ld x21,0(x9) + 80001808: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000000 + 8000180c: 0004b403 ld x8,0(x9) + 80001810: 00848493 addi x9,x9,8 + +0000000080001814 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000000: + aes64ks2 x13, x21, x8 # perform operation + 80001814: 7e8a86b3 aes64ks2 x13,x21,x8 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000000, Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000000_str) + 80001818: 00063203 ld x4,0(x12) + 8000181c: 00d20c63 beq x4,x13,80001834 + 80001820: 4e0062ef jal x5,80007d00 + 80001824: 80001814 .word 0x80001814 + 80001828: 00000000 .word 0x00000000 + 8000182c: 8000fe05 .word 0x8000fe05 + 80001830: 00000000 .word 0x00000000 + 80001834: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xd46c98b07c7822ce + 80001838: 0004bc03 ld x24,0(x9) + 8000183c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x8000000000000001 + 80001840: 0004bb83 ld x23,0(x9) + 80001844: 00848493 addi x9,x9,8 + +0000000080001848 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000001: + aes64ks2 x20, x24, x23 # perform operation + 80001848: 7f7c0a33 aes64ks2 x20,x24,x23 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000001, Zkne_aes64ks2_cg_cp_rs2_edges_0x8000000000000001_str) + 8000184c: 00063203 ld x4,0(x12) + 80001850: 01420c63 beq x4,x20,80001868 + 80001854: 4ac062ef jal x5,80007d00 + 80001858: 80001848 .word 0x80001848 + 8000185c: 00000000 .word 0x00000000 + 80001860: 8000fe52 .word 0x8000fe52 + 80001864: 00000000 .word 0x00000000 + 80001868: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x2b8507db4451840e + 8000186c: 0004bf83 ld x31,0(x9) + 80001870: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7fffffffffffffff + 80001874: 0004b083 ld x1,0(x9) + 80001878: 00848493 addi x9,x9,8 + +000000008000187c : +Zkne_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff: + aes64ks2 x15, x31, x1 # perform operation + 8000187c: 7e1f87b3 aes64ks2 x15,x31,x1 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff, Zkne_aes64ks2_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001880: 00063203 ld x4,0(x12) + 80001884: 00f20c63 beq x4,x15,8000189c + 80001888: 478062ef jal x5,80007d00 + 8000188c: 8000187c .word 0x8000187c + 80001890: 00000000 .word 0x00000000 + 80001894: 8000fe9f .word 0x8000fe9f + 80001898: 00000000 .word 0x00000000 + 8000189c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x2a6d93d30bd5467d + 800018a0: 0004b183 ld x3,0(x9) + 800018a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffffffffffe + 800018a8: 0004b083 ld x1,0(x9) + 800018ac: 00848493 addi x9,x9,8 + +00000000800018b0 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe: + aes64ks2 x20, x3, x1 # perform operation + 800018b0: 7e118a33 aes64ks2 x20,x3,x1 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018b4: 00063203 ld x4,0(x12) + 800018b8: 01420c63 beq x4,x20,800018d0 + 800018bc: 444062ef jal x5,80007d00 + 800018c0: 800018b0 .word 0x800018b0 + 800018c4: 00000000 .word 0x00000000 + 800018c8: 8000feec .word 0x8000feec + 800018cc: 00000000 .word 0x00000000 + 800018d0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xc213893181816920 + 800018d4: 0004b503 ld x10,0(x9) + 800018d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xffffffffffffffff + 800018dc: 0004b783 ld x15,0(x9) + 800018e0: 00848493 addi x9,x9,8 + +00000000800018e4 : +Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff: + aes64ks2 x8, x10, x15 # perform operation + 800018e4: 7ef50433 aes64ks2 x8,x10,x15 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff, Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018e8: 00063203 ld x4,0(x12) + 800018ec: 00820c63 beq x4,x8,80001904 + 800018f0: 410062ef jal x5,80007d00 + 800018f4: 800018e4 .word 0x800018e4 + 800018f8: 00000000 .word 0x00000000 + 800018fc: 8000ff39 .word 0x8000ff39 + 80001900: 00000000 .word 0x00000000 + 80001904: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x70d446910e77b53e + 80001908: 0004bf03 ld x30,0(x9) + 8000190c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xfffffffffffffffe + 80001910: 0004ba03 ld x20,0(x9) + 80001914: 00848493 addi x9,x9,8 + +0000000080001918 : +Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe: + aes64ks2 x2, x30, x20 # perform operation + 80001918: 7f4f0133 aes64ks2 x2,x30,x20 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe, Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 8000191c: 00063203 ld x4,0(x12) + 80001920: 00220c63 beq x4,x2,80001938 + 80001924: 3dc062ef jal x5,80007d00 + 80001928: 80001918 .word 0x80001918 + 8000192c: 00000000 .word 0x00000000 + 80001930: 8000ff86 .word 0x8000ff86 + 80001934: 00000000 .word 0x00000000 + 80001938: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xc997fc683478498b + 8000193c: 0004b703 ld x14,0(x9) + 80001940: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 80001944: 0004be83 ld x29,0(x9) + 80001948: 00848493 addi x9,x9,8 + +000000008000194c : +Zkne_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2: + aes64ks2 x24, x14, x29 # perform operation + 8000194c: 7fd70c33 aes64ks2 x24,x14,x29 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001950: 00063203 ld x4,0(x12) + 80001954: 01820c63 beq x4,x24,8000196c + 80001958: 3a8062ef jal x5,80007d00 + 8000195c: 8000194c .word 0x8000194c + 80001960: 00000000 .word 0x00000000 + 80001964: 8000ffd3 .word 0x8000ffd3 + 80001968: 00000000 .word 0x00000000 + 8000196c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8ee0b4fb70c93946 + 80001970: 0004ba83 ld x21,0(x9) + 80001974: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 80001978: 0004b183 ld x3,0(x9) + 8000197c: 00848493 addi x9,x9,8 + +0000000080001980 : +Zkne_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + aes64ks2 x16, x21, x3 # perform operation + 80001980: 7e3a8833 aes64ks2 x16,x21,x3 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001984: 00063203 ld x4,0(x12) + 80001988: 01020c63 beq x4,x16,800019a0 + 8000198c: 374062ef jal x5,80007d00 + 80001990: 80001980 .word 0x80001980 + 80001994: 00000000 .word 0x00000000 + 80001998: 80010020 .word 0x80010020 + 8000199c: 00000000 .word 0x00000000 + 800019a0: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x22ded7249052c58f + 800019a4: 0004ba03 ld x20,0(x9) + 800019a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5555555555555555 + 800019ac: 0004b183 ld x3,0(x9) + 800019b0: 00848493 addi x9,x9,8 + +00000000800019b4 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x5555555555555555: + aes64ks2 x13, x20, x3 # perform operation + 800019b4: 7e3a06b3 aes64ks2 x13,x20,x3 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cp_rs2_edges_0x5555555555555555, Zkne_aes64ks2_cg_cp_rs2_edges_0x5555555555555555_str) + 800019b8: 00063203 ld x4,0(x12) + 800019bc: 00d20c63 beq x4,x13,800019d4 + 800019c0: 340062ef jal x5,80007d00 + 800019c4: 800019b4 .word 0x800019b4 + 800019c8: 00000000 .word 0x00000000 + 800019cc: 8001006d .word 0x8001006d + 800019d0: 00000000 .word 0x00000000 + 800019d4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xec8605e832bc9474 + 800019d8: 0004b703 ld x14,0(x9) + 800019dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x00000000ffffffff + 800019e0: 0004b503 ld x10,0(x9) + 800019e4: 00848493 addi x9,x9,8 + +00000000800019e8 : +Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffff: + aes64ks2 x27, x14, x10 # perform operation + 800019e8: 7ea70db3 aes64ks2 x27,x14,x10 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffff, Zkne_aes64ks2_cg_cp_rs2_edges_0xffffffff_str) + 800019ec: 00063203 ld x4,0(x12) + 800019f0: 01b20c63 beq x4,x27,80001a08 + 800019f4: 30c062ef jal x5,80007d00 + 800019f8: 800019e8 .word 0x800019e8 + 800019fc: 00000000 .word 0x00000000 + 80001a00: 800100ba .word 0x800100ba + 80001a04: 00000000 .word 0x00000000 + 80001a08: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x66558e4c8b42d246 + 80001a0c: 0004bf83 ld x31,0(x9) + 80001a10: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000fffffffe + 80001a14: 0004bd83 ld x27,0(x9) + 80001a18: 00848493 addi x9,x9,8 + +0000000080001a1c : +Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffe: + aes64ks2 x16, x31, x27 # perform operation + 80001a1c: 7fbf8833 aes64ks2 x16,x31,x27 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffe, Zkne_aes64ks2_cg_cp_rs2_edges_0xfffffffe_str) + 80001a20: 00063203 ld x4,0(x12) + 80001a24: 01020c63 beq x4,x16,80001a3c + 80001a28: 2d8062ef jal x5,80007d00 + 80001a2c: 80001a1c .word 0x80001a1c + 80001a30: 00000000 .word 0x00000000 + 80001a34: 800100ff .word 0x800100ff + 80001a38: 00000000 .word 0x00000000 + 80001a3c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x8d1d3f57864c6f33 + 80001a40: 0004bf83 ld x31,0(x9) + 80001a44: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000100000000 + 80001a48: 0004bb03 ld x22,0(x9) + 80001a4c: 00848493 addi x9,x9,8 + +0000000080001a50 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x100000000: + aes64ks2 x1, x31, x22 # perform operation + 80001a50: 7f6f80b3 aes64ks2 x1,x31,x22 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cp_rs2_edges_0x100000000, Zkne_aes64ks2_cg_cp_rs2_edges_0x100000000_str) + 80001a54: 00063203 ld x4,0(x12) + 80001a58: 00120c63 beq x4,x1,80001a70 + 80001a5c: 2a4062ef jal x5,80007d00 + 80001a60: 80001a50 .word 0x80001a50 + 80001a64: 00000000 .word 0x00000000 + 80001a68: 80010144 .word 0x80010144 + 80001a6c: 00000000 .word 0x00000000 + 80001a70: 00860613 addi x12,x12,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xe4c34a2dd6916c43 + 80001a74: 0004b183 ld x3,0(x9) + 80001a78: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000100000001 + 80001a7c: 0004b703 ld x14,0(x9) + 80001a80: 00848493 addi x9,x9,8 + +0000000080001a84 : +Zkne_aes64ks2_cg_cp_rs2_edges_0x100000001: + aes64ks2 x22, x3, x14 # perform operation + 80001a84: 7ee18b33 aes64ks2 x22,x3,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cp_rs2_edges_0x100000001, Zkne_aes64ks2_cg_cp_rs2_edges_0x100000001_str) + 80001a88: 00063203 ld x4,0(x12) + 80001a8c: 01620c63 beq x4,x22,80001aa4 + 80001a90: 270062ef jal x5,80007d00 + 80001a94: 80001a84 .word 0x80001a84 + 80001a98: 00000000 .word 0x00000000 + 80001a9c: 8001018a .word 0x8001018a + 80001aa0: 00000000 .word 0x00000000 + 80001aa4: 00860613 addi x12,x12,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000000000000 + 80001aa8: 0004bb83 ld x23,0(x9) + 80001aac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000000 + 80001ab0: 0004bd03 ld x26,0(x9) + 80001ab4: 00848493 addi x9,x9,8 + +0000000080001ab8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + aes64ks2 x15, x23, x26 # perform operation + 80001ab8: 7fab87b3 aes64ks2 x15,x23,x26 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001abc: 00063203 ld x4,0(x12) + 80001ac0: 00f20c63 beq x4,x15,80001ad8 + 80001ac4: 23c062ef jal x5,80007d00 + 80001ac8: 80001ab8 .word 0x80001ab8 + 80001acc: 00000000 .word 0x00000000 + 80001ad0: 800101d0 .word 0x800101d0 + 80001ad4: 00000000 .word 0x00000000 + 80001ad8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000000 + 80001adc: 0004be83 ld x29,0(x9) + 80001ae0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000000000001 + 80001ae4: 0004b083 ld x1,0(x9) + 80001ae8: 00848493 addi x9,x9,8 + +0000000080001aec : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + aes64ks2 x24, x29, x1 # perform operation + 80001aec: 7e1e8c33 aes64ks2 x24,x29,x1 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001af0: 00063203 ld x4,0(x12) + 80001af4: 01820c63 beq x4,x24,80001b0c + 80001af8: 208062ef jal x5,80007d00 + 80001afc: 80001aec .word 0x80001aec + 80001b00: 00000000 .word 0x00000000 + 80001b04: 80010225 .word 0x80010225 + 80001b08: 00000000 .word 0x00000000 + 80001b0c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000000000000 + 80001b10: 0004bc03 ld x24,0(x9) + 80001b14: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000000000002 + 80001b18: 0004b683 ld x13,0(x9) + 80001b1c: 00848493 addi x9,x9,8 + +0000000080001b20 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + aes64ks2 x14, x24, x13 # perform operation + 80001b20: 7edc0733 aes64ks2 x14,x24,x13 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b24: 00063203 ld x4,0(x12) + 80001b28: 00e20c63 beq x4,x14,80001b40 + 80001b2c: 1d4062ef jal x5,80007d00 + 80001b30: 80001b20 .word 0x80001b20 + 80001b34: 00000000 .word 0x00000000 + 80001b38: 8001027a .word 0x8001027a + 80001b3c: 00000000 .word 0x00000000 + 80001b40: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000000 + 80001b44: 0004be03 ld x28,0(x9) + 80001b48: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000000 + 80001b4c: 0004b403 ld x8,0(x9) + 80001b50: 00848493 addi x9,x9,8 + +0000000080001b54 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + aes64ks2 x17, x28, x8 # perform operation + 80001b54: 7e8e08b3 aes64ks2 x17,x28,x8 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b58: 00063203 ld x4,0(x12) + 80001b5c: 01120c63 beq x4,x17,80001b74 + 80001b60: 1a0062ef jal x5,80007d00 + 80001b64: 80001b54 .word 0x80001b54 + 80001b68: 00000000 .word 0x00000000 + 80001b6c: 800102cf .word 0x800102cf + 80001b70: 00000000 .word 0x00000000 + 80001b74: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x0000000000000000 + 80001b78: 0004bb03 ld x22,0(x9) + 80001b7c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x8000000000000001 + 80001b80: 0004b903 ld x18,0(x9) + 80001b84: 00848493 addi x9,x9,8 + +0000000080001b88 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + aes64ks2 x24, x22, x18 # perform operation + 80001b88: 7f2b0c33 aes64ks2 x24,x22,x18 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b8c: 00063203 ld x4,0(x12) + 80001b90: 01820c63 beq x4,x24,80001ba8 + 80001b94: 16c062ef jal x5,80007d00 + 80001b98: 80001b88 .word 0x80001b88 + 80001b9c: 00000000 .word 0x00000000 + 80001ba0: 80010333 .word 0x80010333 + 80001ba4: 00000000 .word 0x00000000 + 80001ba8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000000000000 + 80001bac: 0004bc03 ld x24,0(x9) + 80001bb0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffffffffffff + 80001bb4: 0004b703 ld x14,0(x9) + 80001bb8: 00848493 addi x9,x9,8 + +0000000080001bbc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + aes64ks2 x22, x24, x14 # perform operation + 80001bbc: 7eec0b33 aes64ks2 x22,x24,x14 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bc0: 00063203 ld x4,0(x12) + 80001bc4: 01620c63 beq x4,x22,80001bdc + 80001bc8: 138062ef jal x5,80007d00 + 80001bcc: 80001bbc .word 0x80001bbc + 80001bd0: 00000000 .word 0x00000000 + 80001bd4: 80010397 .word 0x80010397 + 80001bd8: 00000000 .word 0x00000000 + 80001bdc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000000 + 80001be0: 0004ba83 ld x21,0(x9) + 80001be4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x7ffffffffffffffe + 80001be8: 0004b783 ld x15,0(x9) + 80001bec: 00848493 addi x9,x9,8 + +0000000080001bf0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x21, x15 # perform operation + 80001bf0: 7efa8133 aes64ks2 x2,x21,x15 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001bf4: 00063203 ld x4,0(x12) + 80001bf8: 00220c63 beq x4,x2,80001c10 + 80001bfc: 104062ef jal x5,80007d00 + 80001c00: 80001bf0 .word 0x80001bf0 + 80001c04: 00000000 .word 0x00000000 + 80001c08: 800103fb .word 0x800103fb + 80001c0c: 00000000 .word 0x00000000 + 80001c10: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000000 + 80001c14: 0004ba83 ld x21,0(x9) + 80001c18: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffffffffffff + 80001c1c: 0004bd03 ld x26,0(x9) + 80001c20: 00848493 addi x9,x9,8 + +0000000080001c24 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + aes64ks2 x27, x21, x26 # perform operation + 80001c24: 7faa8db3 aes64ks2 x27,x21,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c28: 00063203 ld x4,0(x12) + 80001c2c: 01b20c63 beq x4,x27,80001c44 + 80001c30: 0d0062ef jal x5,80007d00 + 80001c34: 80001c24 .word 0x80001c24 + 80001c38: 00000000 .word 0x00000000 + 80001c3c: 8001045f .word 0x8001045f + 80001c40: 00000000 .word 0x00000000 + 80001c44: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000000 + 80001c48: 0004b503 ld x10,0(x9) + 80001c4c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffffffffffe + 80001c50: 0004be83 ld x29,0(x9) + 80001c54: 00848493 addi x9,x9,8 + +0000000080001c58 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + aes64ks2 x19, x10, x29 # perform operation + 80001c58: 7fd509b3 aes64ks2 x19,x10,x29 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c5c: 00063203 ld x4,0(x12) + 80001c60: 01320c63 beq x4,x19,80001c78 + 80001c64: 09c062ef jal x5,80007d00 + 80001c68: 80001c58 .word 0x80001c58 + 80001c6c: 00000000 .word 0x00000000 + 80001c70: 800104c3 .word 0x800104c3 + 80001c74: 00000000 .word 0x00000000 + 80001c78: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000000 + 80001c7c: 0004b183 ld x3,0(x9) + 80001c80: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80001c84: 0004b703 ld x14,0(x9) + 80001c88: 00848493 addi x9,x9,8 + +0000000080001c8c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + aes64ks2 x27, x3, x14 # perform operation + 80001c8c: 7ee18db3 aes64ks2 x27,x3,x14 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c90: 00063203 ld x4,0(x12) + 80001c94: 01b20c63 beq x4,x27,80001cac + 80001c98: 068062ef jal x5,80007d00 + 80001c9c: 80001c8c .word 0x80001c8c + 80001ca0: 00000000 .word 0x00000000 + 80001ca4: 80010527 .word 0x80010527 + 80001ca8: 00000000 .word 0x00000000 + 80001cac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x0000000000000000 + 80001cb0: 0004b683 ld x13,0(x9) + 80001cb4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0xaaaaaaaaaaaaaaaa + 80001cb8: 0004b783 ld x15,0(x9) + 80001cbc: 00848493 addi x9,x9,8 + +0000000080001cc0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x6, x13, x15 # perform operation + 80001cc0: 7ef68333 aes64ks2 x6,x13,x15 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cc4: 00063203 ld x4,0(x12) + 80001cc8: 00620c63 beq x4,x6,80001ce0 + 80001ccc: 034062ef jal x5,80007d00 + 80001cd0: 80001cc0 .word 0x80001cc0 + 80001cd4: 00000000 .word 0x00000000 + 80001cd8: 8001058b .word 0x8001058b + 80001cdc: 00000000 .word 0x00000000 + 80001ce0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000000 + 80001ce4: 0004b903 ld x18,0(x9) + 80001ce8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x5555555555555555 + 80001cec: 0004b583 ld x11,0(x9) + 80001cf0: 00848493 addi x9,x9,8 + +0000000080001cf4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + aes64ks2 x6, x18, x11 # perform operation + 80001cf4: 7eb90333 aes64ks2 x6,x18,x11 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cf8: 00063203 ld x4,0(x12) + 80001cfc: 00620c63 beq x4,x6,80001d14 + 80001d00: 000062ef jal x5,80007d00 + 80001d04: 80001cf4 .word 0x80001cf4 + 80001d08: 00000000 .word 0x00000000 + 80001d0c: 800105ef .word 0x800105ef + 80001d10: 00000000 .word 0x00000000 + 80001d14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000000 + 80001d18: 0004b983 ld x19,0(x9) + 80001d1c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000ffffffff + 80001d20: 0004ba03 ld x20,0(x9) + 80001d24: 00848493 addi x9,x9,8 + +0000000080001d28 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + aes64ks2 x14, x19, x20 # perform operation + 80001d28: 7f498733 aes64ks2 x14,x19,x20 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d2c: 00063203 ld x4,0(x12) + 80001d30: 00e20c63 beq x4,x14,80001d48 + 80001d34: 7cd052ef jal x5,80007d00 + 80001d38: 80001d28 .word 0x80001d28 + 80001d3c: 00000000 .word 0x00000000 + 80001d40: 80010653 .word 0x80010653 + 80001d44: 00000000 .word 0x00000000 + 80001d48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000000 + 80001d4c: 0004b183 ld x3,0(x9) + 80001d50: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d54: 0004bb03 ld x22,0(x9) + 80001d58: 00848493 addi x9,x9,8 + +0000000080001d5c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + aes64ks2 x10, x3, x22 # perform operation + 80001d5c: 7f618533 aes64ks2 x10,x3,x22 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d60: 00063203 ld x4,0(x12) + 80001d64: 00a20c63 beq x4,x10,80001d7c + 80001d68: 799052ef jal x5,80007d00 + 80001d6c: 80001d5c .word 0x80001d5c + 80001d70: 00000000 .word 0x00000000 + 80001d74: 800106af .word 0x800106af + 80001d78: 00000000 .word 0x00000000 + 80001d7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000000 + 80001d80: 0004bd03 ld x26,0(x9) + 80001d84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x0000000100000000 + 80001d88: 0004b403 ld x8,0(x9) + 80001d8c: 00848493 addi x9,x9,8 + +0000000080001d90 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + aes64ks2 x23, x26, x8 # perform operation + 80001d90: 7e8d0bb3 aes64ks2 x23,x26,x8 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d94: 00063203 ld x4,0(x12) + 80001d98: 01720c63 beq x4,x23,80001db0 + 80001d9c: 765052ef jal x5,80007d00 + 80001da0: 80001d90 .word 0x80001d90 + 80001da4: 00000000 .word 0x00000000 + 80001da8: 8001070b .word 0x8001070b + 80001dac: 00000000 .word 0x00000000 + 80001db0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000000 + 80001db4: 0004b383 ld x7,0(x9) + 80001db8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000001 + 80001dbc: 0004b803 ld x16,0(x9) + 80001dc0: 00848493 addi x9,x9,8 + +0000000080001dc4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + aes64ks2 x10, x7, x16 # perform operation + 80001dc4: 7f038533 aes64ks2 x10,x7,x16 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dc8: 00063203 ld x4,0(x12) + 80001dcc: 00a20c63 beq x4,x10,80001de4 + 80001dd0: 731052ef jal x5,80007d00 + 80001dd4: 80001dc4 .word 0x80001dc4 + 80001dd8: 00000000 .word 0x00000000 + 80001ddc: 80010768 .word 0x80010768 + 80001de0: 00000000 .word 0x00000000 + 80001de4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001de8: 0004bd03 ld x26,0(x9) + 80001dec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x0000000000000000 + 80001df0: 0004b883 ld x17,0(x9) + 80001df4: 00848493 addi x9,x9,8 + +0000000080001df8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + aes64ks2 x21, x26, x17 # perform operation + 80001df8: 7f1d0ab3 aes64ks2 x21,x26,x17 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001dfc: 00063203 ld x4,0(x12) + 80001e00: 01520c63 beq x4,x21,80001e18 + 80001e04: 6fd052ef jal x5,80007d00 + 80001e08: 80001df8 .word 0x80001df8 + 80001e0c: 00000000 .word 0x00000000 + 80001e10: 800107c5 .word 0x800107c5 + 80001e14: 00000000 .word 0x00000000 + 80001e18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000000000001 + 80001e1c: 0004b883 ld x17,0(x9) + 80001e20: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000001 + 80001e24: 0004b983 ld x19,0(x9) + 80001e28: 00848493 addi x9,x9,8 + +0000000080001e2c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + aes64ks2 x3, x17, x19 # perform operation + 80001e2c: 7f3881b3 aes64ks2 x3,x17,x19 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e30: 00063203 ld x4,0(x12) + 80001e34: 00320c63 beq x4,x3,80001e4c + 80001e38: 6c9052ef jal x5,80007d00 + 80001e3c: 80001e2c .word 0x80001e2c + 80001e40: 00000000 .word 0x00000000 + 80001e44: 8001081a .word 0x8001081a + 80001e48: 00000000 .word 0x00000000 + 80001e4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001e50: 0004bd03 ld x26,0(x9) + 80001e54: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000002 + 80001e58: 0004b703 ld x14,0(x9) + 80001e5c: 00848493 addi x9,x9,8 + +0000000080001e60 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + aes64ks2 x21, x26, x14 # perform operation + 80001e60: 7eed0ab3 aes64ks2 x21,x26,x14 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e64: 00063203 ld x4,0(x12) + 80001e68: 01520c63 beq x4,x21,80001e80 + 80001e6c: 695052ef jal x5,80007d00 + 80001e70: 80001e60 .word 0x80001e60 + 80001e74: 00000000 .word 0x00000000 + 80001e78: 8001086f .word 0x8001086f + 80001e7c: 00000000 .word 0x00000000 + 80001e80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000000000001 + 80001e84: 0004bf83 ld x31,0(x9) + 80001e88: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x8000000000000000 + 80001e8c: 0004b683 ld x13,0(x9) + 80001e90: 00848493 addi x9,x9,8 + +0000000080001e94 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + aes64ks2 x8, x31, x13 # perform operation + 80001e94: 7edf8433 aes64ks2 x8,x31,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e98: 00063203 ld x4,0(x12) + 80001e9c: 00820c63 beq x4,x8,80001eb4 + 80001ea0: 661052ef jal x5,80007d00 + 80001ea4: 80001e94 .word 0x80001e94 + 80001ea8: 00000000 .word 0x00000000 + 80001eac: 800108c4 .word 0x800108c4 + 80001eb0: 00000000 .word 0x00000000 + 80001eb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 80001eb8: 0004bd03 ld x26,0(x9) + 80001ebc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000001 + 80001ec0: 0004be03 ld x28,0(x9) + 80001ec4: 00848493 addi x9,x9,8 + +0000000080001ec8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + aes64ks2 x18, x26, x28 # perform operation + 80001ec8: 7fcd0933 aes64ks2 x18,x26,x28 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ecc: 00063203 ld x4,0(x12) + 80001ed0: 01220c63 beq x4,x18,80001ee8 + 80001ed4: 62d052ef jal x5,80007d00 + 80001ed8: 80001ec8 .word 0x80001ec8 + 80001edc: 00000000 .word 0x00000000 + 80001ee0: 80010928 .word 0x80010928 + 80001ee4: 00000000 .word 0x00000000 + 80001ee8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x0000000000000001 + 80001eec: 0004ba03 ld x20,0(x9) + 80001ef0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7fffffffffffffff + 80001ef4: 0004be83 ld x29,0(x9) + 80001ef8: 00848493 addi x9,x9,8 + +0000000080001efc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + aes64ks2 x16, x20, x29 # perform operation + 80001efc: 7fda0833 aes64ks2 x16,x20,x29 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001f00: 00063203 ld x4,0(x12) + 80001f04: 01020c63 beq x4,x16,80001f1c + 80001f08: 5f9052ef jal x5,80007d00 + 80001f0c: 80001efc .word 0x80001efc + 80001f10: 00000000 .word 0x00000000 + 80001f14: 8001098c .word 0x8001098c + 80001f18: 00000000 .word 0x00000000 + 80001f1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000001 + 80001f20: 0004b903 ld x18,0(x9) + 80001f24: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80001f28: 0004b983 ld x19,0(x9) + 80001f2c: 00848493 addi x9,x9,8 + +0000000080001f30 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + aes64ks2 x11, x18, x19 # perform operation + 80001f30: 7f3905b3 aes64ks2 x11,x18,x19 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f34: 00063203 ld x4,0(x12) + 80001f38: 00b20c63 beq x4,x11,80001f50 + 80001f3c: 5c5052ef jal x5,80007d00 + 80001f40: 80001f30 .word 0x80001f30 + 80001f44: 00000000 .word 0x00000000 + 80001f48: 800109f0 .word 0x800109f0 + 80001f4c: 00000000 .word 0x00000000 + 80001f50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x0000000000000001 + 80001f54: 0004ba83 ld x21,0(x9) + 80001f58: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xffffffffffffffff + 80001f5c: 0004bd03 ld x26,0(x9) + 80001f60: 00848493 addi x9,x9,8 + +0000000080001f64 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + aes64ks2 x23, x21, x26 # perform operation + 80001f64: 7faa8bb3 aes64ks2 x23,x21,x26 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f68: 00063203 ld x4,0(x12) + 80001f6c: 01720c63 beq x4,x23,80001f84 + 80001f70: 591052ef jal x5,80007d00 + 80001f74: 80001f64 .word 0x80001f64 + 80001f78: 00000000 .word 0x00000000 + 80001f7c: 80010a54 .word 0x80010a54 + 80001f80: 00000000 .word 0x00000000 + 80001f84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000000000001 + 80001f88: 0004bb83 ld x23,0(x9) + 80001f8c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xfffffffffffffffe + 80001f90: 0004b883 ld x17,0(x9) + 80001f94: 00848493 addi x9,x9,8 + +0000000080001f98 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + aes64ks2 x8, x23, x17 # perform operation + 80001f98: 7f1b8433 aes64ks2 x8,x23,x17 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f9c: 00063203 ld x4,0(x12) + 80001fa0: 00820c63 beq x4,x8,80001fb8 + 80001fa4: 55d052ef jal x5,80007d00 + 80001fa8: 80001f98 .word 0x80001f98 + 80001fac: 00000000 .word 0x00000000 + 80001fb0: 80010ab8 .word 0x80010ab8 + 80001fb4: 00000000 .word 0x00000000 + 80001fb8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000001 + 80001fbc: 0004be03 ld x28,0(x9) + 80001fc0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80001fc4: 0004b883 ld x17,0(x9) + 80001fc8: 00848493 addi x9,x9,8 + +0000000080001fcc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + aes64ks2 x6, x28, x17 # perform operation + 80001fcc: 7f1e0333 aes64ks2 x6,x28,x17 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fd0: 00063203 ld x4,0(x12) + 80001fd4: 00620c63 beq x4,x6,80001fec + 80001fd8: 529052ef jal x5,80007d00 + 80001fdc: 80001fcc .word 0x80001fcc + 80001fe0: 00000000 .word 0x00000000 + 80001fe4: 80010b1c .word 0x80010b1c + 80001fe8: 00000000 .word 0x00000000 + 80001fec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000000000001 + 80001ff0: 0004bf03 ld x30,0(x9) + 80001ff4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 80001ff8: 0004be03 ld x28,0(x9) + 80001ffc: 00848493 addi x9,x9,8 + +0000000080002000 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x8, x30, x28 # perform operation + 80002000: 7fcf0433 aes64ks2 x8,x30,x28 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002004: 00063203 ld x4,0(x12) + 80002008: 00820c63 beq x4,x8,80002020 + 8000200c: 4f5052ef jal x5,80007d00 + 80002010: 80002000 .word 0x80002000 + 80002014: 00000000 .word 0x00000000 + 80002018: 80010b80 .word 0x80010b80 + 8000201c: 00000000 .word 0x00000000 + 80002020: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000000000001 + 80002024: 0004bf83 ld x31,0(x9) + 80002028: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x5555555555555555 + 8000202c: 0004bb03 ld x22,0(x9) + 80002030: 00848493 addi x9,x9,8 + +0000000080002034 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + aes64ks2 x23, x31, x22 # perform operation + 80002034: 7f6f8bb3 aes64ks2 x23,x31,x22 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 80002038: 00063203 ld x4,0(x12) + 8000203c: 01720c63 beq x4,x23,80002054 + 80002040: 4c1052ef jal x5,80007d00 + 80002044: 80002034 .word 0x80002034 + 80002048: 00000000 .word 0x00000000 + 8000204c: 80010be4 .word 0x80010be4 + 80002050: 00000000 .word 0x00000000 + 80002054: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000000000001 + 80002058: 0004b883 ld x17,0(x9) + 8000205c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000000ffffffff + 80002060: 0004b783 ld x15,0(x9) + 80002064: 00848493 addi x9,x9,8 + +0000000080002068 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + aes64ks2 x16, x17, x15 # perform operation + 80002068: 7ef88833 aes64ks2 x16,x17,x15 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 8000206c: 00063203 ld x4,0(x12) + 80002070: 01020c63 beq x4,x16,80002088 + 80002074: 48d052ef jal x5,80007d00 + 80002078: 80002068 .word 0x80002068 + 8000207c: 00000000 .word 0x00000000 + 80002080: 80010c48 .word 0x80010c48 + 80002084: 00000000 .word 0x00000000 + 80002088: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000001 + 8000208c: 0004b903 ld x18,0(x9) + 80002090: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x00000000fffffffe + 80002094: 0004ba03 ld x20,0(x9) + 80002098: 00848493 addi x9,x9,8 + +000000008000209c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + aes64ks2 x6, x18, x20 # perform operation + 8000209c: 7f490333 aes64ks2 x6,x18,x20 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 800020a0: 00063203 ld x4,0(x12) + 800020a4: 00620c63 beq x4,x6,800020bc + 800020a8: 459052ef jal x5,80007d00 + 800020ac: 8000209c .word 0x8000209c + 800020b0: 00000000 .word 0x00000000 + 800020b4: 80010ca4 .word 0x80010ca4 + 800020b8: 00000000 .word 0x00000000 + 800020bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000001 + 800020c0: 0004be83 ld x29,0(x9) + 800020c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000100000000 + 800020c8: 0004b583 ld x11,0(x9) + 800020cc: 00848493 addi x9,x9,8 + +00000000800020d0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + aes64ks2 x24, x29, x11 # perform operation + 800020d0: 7ebe8c33 aes64ks2 x24,x29,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020d4: 00063203 ld x4,0(x12) + 800020d8: 01820c63 beq x4,x24,800020f0 + 800020dc: 425052ef jal x5,80007d00 + 800020e0: 800020d0 .word 0x800020d0 + 800020e4: 00000000 .word 0x00000000 + 800020e8: 80010d00 .word 0x80010d00 + 800020ec: 00000000 .word 0x00000000 + 800020f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x0000000000000001 + 800020f4: 0004bd03 ld x26,0(x9) + 800020f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x0000000100000001 + 800020fc: 0004bd83 ld x27,0(x9) + 80002100: 00848493 addi x9,x9,8 + +0000000080002104 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + aes64ks2 x14, x26, x27 # perform operation + 80002104: 7fbd0733 aes64ks2 x14,x26,x27 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 80002108: 00063203 ld x4,0(x12) + 8000210c: 00e20c63 beq x4,x14,80002124 + 80002110: 3f1052ef jal x5,80007d00 + 80002114: 80002104 .word 0x80002104 + 80002118: 00000000 .word 0x00000000 + 8000211c: 80010d5d .word 0x80010d5d + 80002120: 00000000 .word 0x00000000 + 80002124: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000002 + 80002128: 0004b983 ld x19,0(x9) + 8000212c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000000 + 80002130: 0004b703 ld x14,0(x9) + 80002134: 00848493 addi x9,x9,8 + +0000000080002138 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + aes64ks2 x31, x19, x14 # perform operation + 80002138: 7ee98fb3 aes64ks2 x31,x19,x14 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 8000213c: 00063203 ld x4,0(x12) + 80002140: 01f20c63 beq x4,x31,80002158 + 80002144: 3bd052ef jal x5,80007d00 + 80002148: 80002138 .word 0x80002138 + 8000214c: 00000000 .word 0x00000000 + 80002150: 80010dba .word 0x80010dba + 80002154: 00000000 .word 0x00000000 + 80002158: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000002 + 8000215c: 0004b383 ld x7,0(x9) + 80002160: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 80002164: 0004b783 ld x15,0(x9) + 80002168: 00848493 addi x9,x9,8 + +000000008000216c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + aes64ks2 x20, x7, x15 # perform operation + 8000216c: 7ef38a33 aes64ks2 x20,x7,x15 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002170: 00063203 ld x4,0(x12) + 80002174: 01420c63 beq x4,x20,8000218c + 80002178: 389052ef jal x5,80007d00 + 8000217c: 8000216c .word 0x8000216c + 80002180: 00000000 .word 0x00000000 + 80002184: 80010e0f .word 0x80010e0f + 80002188: 00000000 .word 0x00000000 + 8000218c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x0000000000000002 + 80002190: 0004b383 ld x7,0(x9) + 80002194: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000000000002 + 80002198: 0004bf03 ld x30,0(x9) + 8000219c: 00848493 addi x9,x9,8 + +00000000800021a0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + aes64ks2 x6, x7, x30 # perform operation + 800021a0: 7fe38333 aes64ks2 x6,x7,x30 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 800021a4: 00063203 ld x4,0(x12) + 800021a8: 00620c63 beq x4,x6,800021c0 + 800021ac: 355052ef jal x5,80007d00 + 800021b0: 800021a0 .word 0x800021a0 + 800021b4: 00000000 .word 0x00000000 + 800021b8: 80010e64 .word 0x80010e64 + 800021bc: 00000000 .word 0x00000000 + 800021c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000000000002 + 800021c4: 0004b783 ld x15,0(x9) + 800021c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000000 + 800021cc: 0004be03 ld x28,0(x9) + 800021d0: 00848493 addi x9,x9,8 + +00000000800021d4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + aes64ks2 x23, x15, x28 # perform operation + 800021d4: 7fc78bb3 aes64ks2 x23,x15,x28 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021d8: 00063203 ld x4,0(x12) + 800021dc: 01720c63 beq x4,x23,800021f4 + 800021e0: 321052ef jal x5,80007d00 + 800021e4: 800021d4 .word 0x800021d4 + 800021e8: 00000000 .word 0x00000000 + 800021ec: 80010eb9 .word 0x80010eb9 + 800021f0: 00000000 .word 0x00000000 + 800021f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000000000002 + 800021f8: 0004b903 ld x18,0(x9) + 800021fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x8000000000000001 + 80002200: 0004b803 ld x16,0(x9) + 80002204: 00848493 addi x9,x9,8 + +0000000080002208 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + aes64ks2 x31, x18, x16 # perform operation + 80002208: 7f090fb3 aes64ks2 x31,x18,x16 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 8000220c: 00063203 ld x4,0(x12) + 80002210: 01f20c63 beq x4,x31,80002228 + 80002214: 2ed052ef jal x5,80007d00 + 80002218: 80002208 .word 0x80002208 + 8000221c: 00000000 .word 0x00000000 + 80002220: 80010f1d .word 0x80010f1d + 80002224: 00000000 .word 0x00000000 + 80002228: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 8000222c: 0004b503 ld x10,0(x9) + 80002230: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80002234: 0004b983 ld x19,0(x9) + 80002238: 00848493 addi x9,x9,8 + +000000008000223c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + aes64ks2 x7, x10, x19 # perform operation + 8000223c: 7f3503b3 aes64ks2 x7,x10,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002240: 00063203 ld x4,0(x12) + 80002244: 00720c63 beq x4,x7,8000225c + 80002248: 2b9052ef jal x5,80007d00 + 8000224c: 8000223c .word 0x8000223c + 80002250: 00000000 .word 0x00000000 + 80002254: 80010f81 .word 0x80010f81 + 80002258: 00000000 .word 0x00000000 + 8000225c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x0000000000000002 + 80002260: 0004bd83 ld x27,0(x9) + 80002264: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80002268: 0004bc83 ld x25,0(x9) + 8000226c: 00848493 addi x9,x9,8 + +0000000080002270 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + aes64ks2 x15, x27, x25 # perform operation + 80002270: 7f9d87b3 aes64ks2 x15,x27,x25 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002274: 00063203 ld x4,0(x12) + 80002278: 00f20c63 beq x4,x15,80002290 + 8000227c: 285052ef jal x5,80007d00 + 80002280: 80002270 .word 0x80002270 + 80002284: 00000000 .word 0x00000000 + 80002288: 80010fe5 .word 0x80010fe5 + 8000228c: 00000000 .word 0x00000000 + 80002290: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000002 + 80002294: 0004be83 ld x29,0(x9) + 80002298: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xffffffffffffffff + 8000229c: 0004b103 ld x2,0(x9) + 800022a0: 00848493 addi x9,x9,8 + +00000000800022a4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + aes64ks2 x3, x29, x2 # perform operation + 800022a4: 7e2e81b3 aes64ks2 x3,x29,x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 800022a8: 00063203 ld x4,0(x12) + 800022ac: 00320c63 beq x4,x3,800022c4 + 800022b0: 251052ef jal x5,80007d00 + 800022b4: 800022a4 .word 0x800022a4 + 800022b8: 00000000 .word 0x00000000 + 800022bc: 80011049 .word 0x80011049 + 800022c0: 00000000 .word 0x00000000 + 800022c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000000000002 + 800022c8: 0004be83 ld x29,0(x9) + 800022cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xfffffffffffffffe + 800022d0: 0004bc03 ld x24,0(x9) + 800022d4: 00848493 addi x9,x9,8 + +00000000800022d8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + aes64ks2 x11, x29, x24 # perform operation + 800022d8: 7f8e85b3 aes64ks2 x11,x29,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022dc: 00063203 ld x4,0(x12) + 800022e0: 00b20c63 beq x4,x11,800022f8 + 800022e4: 21d052ef jal x5,80007d00 + 800022e8: 800022d8 .word 0x800022d8 + 800022ec: 00000000 .word 0x00000000 + 800022f0: 800110ad .word 0x800110ad + 800022f4: 00000000 .word 0x00000000 + 800022f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000002 + 800022fc: 0004b183 ld x3,0(x9) + 80002300: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x5bbc887763ae86f2 + 80002304: 0004bc03 ld x24,0(x9) + 80002308: 00848493 addi x9,x9,8 + +000000008000230c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + aes64ks2 x22, x3, x24 # perform operation + 8000230c: 7f818b33 aes64ks2 x22,x3,x24 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002310: 00063203 ld x4,0(x12) + 80002314: 01620c63 beq x4,x22,8000232c + 80002318: 1e9052ef jal x5,80007d00 + 8000231c: 8000230c .word 0x8000230c + 80002320: 00000000 .word 0x00000000 + 80002324: 80011111 .word 0x80011111 + 80002328: 00000000 .word 0x00000000 + 8000232c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0000000000000002 + 80002330: 0004b183 ld x3,0(x9) + 80002334: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0xaaaaaaaaaaaaaaaa + 80002338: 0004b083 ld x1,0(x9) + 8000233c: 00848493 addi x9,x9,8 + +0000000080002340 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x25, x3, x1 # perform operation + 80002340: 7e118cb3 aes64ks2 x25,x3,x1 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002344: 00063203 ld x4,0(x12) + 80002348: 01920c63 beq x4,x25,80002360 + 8000234c: 1b5052ef jal x5,80007d00 + 80002350: 80002340 .word 0x80002340 + 80002354: 00000000 .word 0x00000000 + 80002358: 80011175 .word 0x80011175 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000000000002 + 80002364: 0004b503 ld x10,0(x9) + 80002368: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 8000236c: 0004bb83 ld x23,0(x9) + 80002370: 00848493 addi x9,x9,8 + +0000000080002374 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + aes64ks2 x28, x10, x23 # perform operation + 80002374: 7f750e33 aes64ks2 x28,x10,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 80002378: 00063203 ld x4,0(x12) + 8000237c: 01c20c63 beq x4,x28,80002394 + 80002380: 181052ef jal x5,80007d00 + 80002384: 80002374 .word 0x80002374 + 80002388: 00000000 .word 0x00000000 + 8000238c: 800111d9 .word 0x800111d9 + 80002390: 00000000 .word 0x00000000 + 80002394: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000000000002 + 80002398: 0004b983 ld x19,0(x9) + 8000239c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000ffffffff + 800023a0: 0004ba83 ld x21,0(x9) + 800023a4: 00848493 addi x9,x9,8 + +00000000800023a8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + aes64ks2 x17, x19, x21 # perform operation + 800023a8: 7f5988b3 aes64ks2 x17,x19,x21 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023ac: 00063203 ld x4,0(x12) + 800023b0: 01120c63 beq x4,x17,800023c8 + 800023b4: 14d052ef jal x5,80007d00 + 800023b8: 800023a8 .word 0x800023a8 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 8001123d .word 0x8001123d + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x0000000000000002 + 800023cc: 0004b083 ld x1,0(x9) + 800023d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x00000000fffffffe + 800023d4: 0004bd83 ld x27,0(x9) + 800023d8: 00848493 addi x9,x9,8 + +00000000800023dc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + aes64ks2 x14, x1, x27 # perform operation + 800023dc: 7fb08733 aes64ks2 x14,x1,x27 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023e0: 00063203 ld x4,0(x12) + 800023e4: 00e20c63 beq x4,x14,800023fc + 800023e8: 119052ef jal x5,80007d00 + 800023ec: 800023dc .word 0x800023dc + 800023f0: 00000000 .word 0x00000000 + 800023f4: 80011299 .word 0x80011299 + 800023f8: 00000000 .word 0x00000000 + 800023fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x0000000000000002 + 80002400: 0004bd83 ld x27,0(x9) + 80002404: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000100000000 + 80002408: 0004bf03 ld x30,0(x9) + 8000240c: 00848493 addi x9,x9,8 + +0000000080002410 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + aes64ks2 x31, x27, x30 # perform operation + 80002410: 7fed8fb3 aes64ks2 x31,x27,x30 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002414: 00063203 ld x4,0(x12) + 80002418: 01f20c63 beq x4,x31,80002430 + 8000241c: 0e5052ef jal x5,80007d00 + 80002420: 80002410 .word 0x80002410 + 80002424: 00000000 .word 0x00000000 + 80002428: 800112f5 .word 0x800112f5 + 8000242c: 00000000 .word 0x00000000 + 80002430: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000000000002 + 80002434: 0004be03 ld x28,0(x9) + 80002438: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000001 + 8000243c: 0004bd03 ld x26,0(x9) + 80002440: 00848493 addi x9,x9,8 + +0000000080002444 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + aes64ks2 x31, x28, x26 # perform operation + 80002444: 7fae0fb3 aes64ks2 x31,x28,x26 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 80002448: 00063203 ld x4,0(x12) + 8000244c: 01f20c63 beq x4,x31,80002464 + 80002450: 0b1052ef jal x5,80007d00 + 80002454: 80002444 .word 0x80002444 + 80002458: 00000000 .word 0x00000000 + 8000245c: 80011352 .word 0x80011352 + 80002460: 00000000 .word 0x00000000 + 80002464: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x8000000000000000 + 80002468: 0004bf03 ld x30,0(x9) + 8000246c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000000000000 + 80002470: 0004b383 ld x7,0(x9) + 80002474: 00848493 addi x9,x9,8 + +0000000080002478 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + aes64ks2 x1, x30, x7 # perform operation + 80002478: 7e7f00b3 aes64ks2 x1,x30,x7 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 8000247c: 00063203 ld x4,0(x12) + 80002480: 00120c63 beq x4,x1,80002498 + 80002484: 07d052ef jal x5,80007d00 + 80002488: 80002478 .word 0x80002478 + 8000248c: 00000000 .word 0x00000000 + 80002490: 800113af .word 0x800113af + 80002494: 00000000 .word 0x00000000 + 80002498: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x8000000000000000 + 8000249c: 0004bc03 ld x24,0(x9) + 800024a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000000000001 + 800024a4: 0004bb83 ld x23,0(x9) + 800024a8: 00848493 addi x9,x9,8 + +00000000800024ac : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + aes64ks2 x30, x24, x23 # perform operation + 800024ac: 7f7c0f33 aes64ks2 x30,x24,x23 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024b0: 00063203 ld x4,0(x12) + 800024b4: 01e20c63 beq x4,x30,800024cc + 800024b8: 049052ef jal x5,80007d00 + 800024bc: 800024ac .word 0x800024ac + 800024c0: 00000000 .word 0x00000000 + 800024c4: 80011413 .word 0x80011413 + 800024c8: 00000000 .word 0x00000000 + 800024cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x8000000000000000 + 800024d0: 0004b903 ld x18,0(x9) + 800024d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000000000002 + 800024d8: 0004bf03 ld x30,0(x9) + 800024dc: 00848493 addi x9,x9,8 + +00000000800024e0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + aes64ks2 x7, x18, x30 # perform operation + 800024e0: 7fe903b3 aes64ks2 x7,x18,x30 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024e4: 00063203 ld x4,0(x12) + 800024e8: 00720c63 beq x4,x7,80002500 + 800024ec: 015052ef jal x5,80007d00 + 800024f0: 800024e0 .word 0x800024e0 + 800024f4: 00000000 .word 0x00000000 + 800024f8: 80011477 .word 0x80011477 + 800024fc: 00000000 .word 0x00000000 + 80002500: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x8000000000000000 + 80002504: 0004b903 ld x18,0(x9) + 80002508: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000000 + 8000250c: 0004b783 ld x15,0(x9) + 80002510: 00848493 addi x9,x9,8 + +0000000080002514 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + aes64ks2 x1, x18, x15 # perform operation + 80002514: 7ef900b3 aes64ks2 x1,x18,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 80002518: 00063203 ld x4,0(x12) + 8000251c: 00120c63 beq x4,x1,80002534 + 80002520: 7e0052ef jal x5,80007d00 + 80002524: 80002514 .word 0x80002514 + 80002528: 00000000 .word 0x00000000 + 8000252c: 800114db .word 0x800114db + 80002530: 00000000 .word 0x00000000 + 80002534: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x8000000000000000 + 80002538: 0004bf83 ld x31,0(x9) + 8000253c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x8000000000000001 + 80002540: 0004bb83 ld x23,0(x9) + 80002544: 00848493 addi x9,x9,8 + +0000000080002548 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + aes64ks2 x1, x31, x23 # perform operation + 80002548: 7f7f80b3 aes64ks2 x1,x31,x23 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 8000254c: 00063203 ld x4,0(x12) + 80002550: 00120c63 beq x4,x1,80002568 + 80002554: 7ac052ef jal x5,80007d00 + 80002558: 80002548 .word 0x80002548 + 8000255c: 00000000 .word 0x00000000 + 80002560: 8001154e .word 0x8001154e + 80002564: 00000000 .word 0x00000000 + 80002568: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x8000000000000000 + 8000256c: 0004b303 ld x6,0(x9) + 80002570: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7fffffffffffffff + 80002574: 0004b883 ld x17,0(x9) + 80002578: 00848493 addi x9,x9,8 + +000000008000257c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + aes64ks2 x31, x6, x17 # perform operation + 8000257c: 7f130fb3 aes64ks2 x31,x6,x17 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002580: 00063203 ld x4,0(x12) + 80002584: 01f20c63 beq x4,x31,8000259c + 80002588: 778052ef jal x5,80007d00 + 8000258c: 8000257c .word 0x8000257c + 80002590: 00000000 .word 0x00000000 + 80002594: 800115c1 .word 0x800115c1 + 80002598: 00000000 .word 0x00000000 + 8000259c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x8000000000000000 + 800025a0: 0004b303 ld x6,0(x9) + 800025a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800025a8: 0004b883 ld x17,0(x9) + 800025ac: 00848493 addi x9,x9,8 + +00000000800025b0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x6, x17 # perform operation + 800025b0: 7f130133 aes64ks2 x2,x6,x17 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025b4: 00063203 ld x4,0(x12) + 800025b8: 00220c63 beq x4,x2,800025d0 + 800025bc: 744052ef jal x5,80007d00 + 800025c0: 800025b0 .word 0x800025b0 + 800025c4: 00000000 .word 0x00000000 + 800025c8: 80011634 .word 0x80011634 + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000000 + 800025d4: 0004b103 ld x2,0(x9) + 800025d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xffffffffffffffff + 800025dc: 0004be83 ld x29,0(x9) + 800025e0: 00848493 addi x9,x9,8 + +00000000800025e4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + aes64ks2 x3, x2, x29 # perform operation + 800025e4: 7fd101b3 aes64ks2 x3,x2,x29 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025e8: 00063203 ld x4,0(x12) + 800025ec: 00320c63 beq x4,x3,80002604 + 800025f0: 710052ef jal x5,80007d00 + 800025f4: 800025e4 .word 0x800025e4 + 800025f8: 00000000 .word 0x00000000 + 800025fc: 800116a7 .word 0x800116a7 + 80002600: 00000000 .word 0x00000000 + 80002604: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x8000000000000000 + 80002608: 0004bd83 ld x27,0(x9) + 8000260c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xfffffffffffffffe + 80002610: 0004b303 ld x6,0(x9) + 80002614: 00848493 addi x9,x9,8 + +0000000080002618 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x27, x6 # perform operation + 80002618: 7e6d8d33 aes64ks2 x26,x27,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 8000261c: 00063203 ld x4,0(x12) + 80002620: 01a20c63 beq x4,x26,80002638 + 80002624: 6dc052ef jal x5,80007d00 + 80002628: 80002618 .word 0x80002618 + 8000262c: 00000000 .word 0x00000000 + 80002630: 8001171a .word 0x8001171a + 80002634: 00000000 .word 0x00000000 + 80002638: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000000 + 8000263c: 0004b103 ld x2,0(x9) + 80002640: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 80002644: 0004b883 ld x17,0(x9) + 80002648: 00848493 addi x9,x9,8 + +000000008000264c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + aes64ks2 x29, x2, x17 # perform operation + 8000264c: 7f110eb3 aes64ks2 x29,x2,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002650: 00063203 ld x4,0(x12) + 80002654: 01d20c63 beq x4,x29,8000266c + 80002658: 6a8052ef jal x5,80007d00 + 8000265c: 8000264c .word 0x8000264c + 80002660: 00000000 .word 0x00000000 + 80002664: 8001178d .word 0x8001178d + 80002668: 00000000 .word 0x00000000 + 8000266c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x8000000000000000 + 80002670: 0004b883 ld x17,0(x9) + 80002674: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 80002678: 0004bf03 ld x30,0(x9) + 8000267c: 00848493 addi x9,x9,8 + +0000000080002680 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x6, x17, x30 # perform operation + 80002680: 7fe88333 aes64ks2 x6,x17,x30 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002684: 00063203 ld x4,0(x12) + 80002688: 00620c63 beq x4,x6,800026a0 + 8000268c: 674052ef jal x5,80007d00 + 80002690: 80002680 .word 0x80002680 + 80002694: 00000000 .word 0x00000000 + 80002698: 80011800 .word 0x80011800 + 8000269c: 00000000 .word 0x00000000 + 800026a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000000 + 800026a4: 0004ba83 ld x21,0(x9) + 800026a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5555555555555555 + 800026ac: 0004b683 ld x13,0(x9) + 800026b0: 00848493 addi x9,x9,8 + +00000000800026b4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + aes64ks2 x19, x21, x13 # perform operation + 800026b4: 7eda89b3 aes64ks2 x19,x21,x13 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026b8: 00063203 ld x4,0(x12) + 800026bc: 01320c63 beq x4,x19,800026d4 + 800026c0: 640052ef jal x5,80007d00 + 800026c4: 800026b4 .word 0x800026b4 + 800026c8: 00000000 .word 0x00000000 + 800026cc: 80011873 .word 0x80011873 + 800026d0: 00000000 .word 0x00000000 + 800026d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x8000000000000000 + 800026d8: 0004be03 ld x28,0(x9) + 800026dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x00000000ffffffff + 800026e0: 0004b303 ld x6,0(x9) + 800026e4: 00848493 addi x9,x9,8 + +00000000800026e8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + aes64ks2 x23, x28, x6 # perform operation + 800026e8: 7e6e0bb3 aes64ks2 x23,x28,x6 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026ec: 00063203 ld x4,0(x12) + 800026f0: 01720c63 beq x4,x23,80002708 + 800026f4: 60c052ef jal x5,80007d00 + 800026f8: 800026e8 .word 0x800026e8 + 800026fc: 00000000 .word 0x00000000 + 80002700: 800118e6 .word 0x800118e6 + 80002704: 00000000 .word 0x00000000 + 80002708: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x8000000000000000 + 8000270c: 0004b583 ld x11,0(x9) + 80002710: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000fffffffe + 80002714: 0004ba83 ld x21,0(x9) + 80002718: 00848493 addi x9,x9,8 + +000000008000271c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + aes64ks2 x17, x11, x21 # perform operation + 8000271c: 7f5588b3 aes64ks2 x17,x11,x21 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002720: 00063203 ld x4,0(x12) + 80002724: 01120c63 beq x4,x17,8000273c + 80002728: 5d8052ef jal x5,80007d00 + 8000272c: 8000271c .word 0x8000271c + 80002730: 00000000 .word 0x00000000 + 80002734: 80011951 .word 0x80011951 + 80002738: 00000000 .word 0x00000000 + 8000273c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x8000000000000000 + 80002740: 0004bb03 ld x22,0(x9) + 80002744: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000000 + 80002748: 0004bd03 ld x26,0(x9) + 8000274c: 00848493 addi x9,x9,8 + +0000000080002750 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + aes64ks2 x18, x22, x26 # perform operation + 80002750: 7fab0933 aes64ks2 x18,x22,x26 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002754: 00063203 ld x4,0(x12) + 80002758: 01220c63 beq x4,x18,80002770 + 8000275c: 5a4052ef jal x5,80007d00 + 80002760: 80002750 .word 0x80002750 + 80002764: 00000000 .word 0x00000000 + 80002768: 800119bc .word 0x800119bc + 8000276c: 00000000 .word 0x00000000 + 80002770: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x8000000000000000 + 80002774: 0004be83 ld x29,0(x9) + 80002778: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x0000000100000001 + 8000277c: 0004bf03 ld x30,0(x9) + 80002780: 00848493 addi x9,x9,8 + +0000000080002784 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + aes64ks2 x21, x29, x30 # perform operation + 80002784: 7fee8ab3 aes64ks2 x21,x29,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 80002788: 00063203 ld x4,0(x12) + 8000278c: 01520c63 beq x4,x21,800027a4 + 80002790: 570052ef jal x5,80007d00 + 80002794: 80002784 .word 0x80002784 + 80002798: 00000000 .word 0x00000000 + 8000279c: 80011a28 .word 0x80011a28 + 800027a0: 00000000 .word 0x00000000 + 800027a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x8000000000000001 + 800027a8: 0004be03 ld x28,0(x9) + 800027ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x0000000000000000 + 800027b0: 0004ba83 ld x21,0(x9) + 800027b4: 00848493 addi x9,x9,8 + +00000000800027b8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + aes64ks2 x25, x28, x21 # perform operation + 800027b8: 7f5e0cb3 aes64ks2 x25,x28,x21 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027bc: 00063203 ld x4,0(x12) + 800027c0: 01920c63 beq x4,x25,800027d8 + 800027c4: 53c052ef jal x5,80007d00 + 800027c8: 800027b8 .word 0x800027b8 + 800027cc: 00000000 .word 0x00000000 + 800027d0: 80011a94 .word 0x80011a94 + 800027d4: 00000000 .word 0x00000000 + 800027d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x8000000000000001 + 800027dc: 0004b383 ld x7,0(x9) + 800027e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x0000000000000001 + 800027e4: 0004b183 ld x3,0(x9) + 800027e8: 00848493 addi x9,x9,8 + +00000000800027ec : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + aes64ks2 x8, x7, x3 # perform operation + 800027ec: 7e338433 aes64ks2 x8,x7,x3 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027f0: 00063203 ld x4,0(x12) + 800027f4: 00820c63 beq x4,x8,8000280c + 800027f8: 508052ef jal x5,80007d00 + 800027fc: 800027ec .word 0x800027ec + 80002800: 00000000 .word 0x00000000 + 80002804: 80011af8 .word 0x80011af8 + 80002808: 00000000 .word 0x00000000 + 8000280c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x8000000000000001 + 80002810: 0004bf03 ld x30,0(x9) + 80002814: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000000000002 + 80002818: 0004b083 ld x1,0(x9) + 8000281c: 00848493 addi x9,x9,8 + +0000000080002820 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + aes64ks2 x25, x30, x1 # perform operation + 80002820: 7e1f0cb3 aes64ks2 x25,x30,x1 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002824: 00063203 ld x4,0(x12) + 80002828: 01920c63 beq x4,x25,80002840 + 8000282c: 4d4052ef jal x5,80007d00 + 80002830: 80002820 .word 0x80002820 + 80002834: 00000000 .word 0x00000000 + 80002838: 80011b5c .word 0x80011b5c + 8000283c: 00000000 .word 0x00000000 + 80002840: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x8000000000000001 + 80002844: 0004b403 ld x8,0(x9) + 80002848: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x8000000000000000 + 8000284c: 0004bc83 ld x25,0(x9) + 80002850: 00848493 addi x9,x9,8 + +0000000080002854 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + aes64ks2 x2, x8, x25 # perform operation + 80002854: 7f940133 aes64ks2 x2,x8,x25 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 80002858: 00063203 ld x4,0(x12) + 8000285c: 00220c63 beq x4,x2,80002874 + 80002860: 4a0052ef jal x5,80007d00 + 80002864: 80002854 .word 0x80002854 + 80002868: 00000000 .word 0x00000000 + 8000286c: 80011bc0 .word 0x80011bc0 + 80002870: 00000000 .word 0x00000000 + 80002874: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x8000000000000001 + 80002878: 0004ba83 ld x21,0(x9) + 8000287c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x8000000000000001 + 80002880: 0004b683 ld x13,0(x9) + 80002884: 00848493 addi x9,x9,8 + +0000000080002888 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + aes64ks2 x8, x21, x13 # perform operation + 80002888: 7eda8433 aes64ks2 x8,x21,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 8000288c: 00063203 ld x4,0(x12) + 80002890: 00820c63 beq x4,x8,800028a8 + 80002894: 46c052ef jal x5,80007d00 + 80002898: 80002888 .word 0x80002888 + 8000289c: 00000000 .word 0x00000000 + 800028a0: 80011c33 .word 0x80011c33 + 800028a4: 00000000 .word 0x00000000 + 800028a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000001 + 800028ac: 0004b103 ld x2,0(x9) + 800028b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x7fffffffffffffff + 800028b4: 0004b903 ld x18,0(x9) + 800028b8: 00848493 addi x9,x9,8 + +00000000800028bc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + aes64ks2 x11, x2, x18 # perform operation + 800028bc: 7f2105b3 aes64ks2 x11,x2,x18 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028c0: 00063203 ld x4,0(x12) + 800028c4: 00b20c63 beq x4,x11,800028dc + 800028c8: 438052ef jal x5,80007d00 + 800028cc: 800028bc .word 0x800028bc + 800028d0: 00000000 .word 0x00000000 + 800028d4: 80011ca6 .word 0x80011ca6 + 800028d8: 00000000 .word 0x00000000 + 800028dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x8000000000000001 + 800028e0: 0004b683 ld x13,0(x9) + 800028e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x7ffffffffffffffe + 800028e8: 0004bf83 ld x31,0(x9) + 800028ec: 00848493 addi x9,x9,8 + +00000000800028f0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + aes64ks2 x21, x13, x31 # perform operation + 800028f0: 7ff68ab3 aes64ks2 x21,x13,x31 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028f4: 00063203 ld x4,0(x12) + 800028f8: 01520c63 beq x4,x21,80002910 + 800028fc: 404052ef jal x5,80007d00 + 80002900: 800028f0 .word 0x800028f0 + 80002904: 00000000 .word 0x00000000 + 80002908: 80011d19 .word 0x80011d19 + 8000290c: 00000000 .word 0x00000000 + 80002910: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x8000000000000001 + 80002914: 0004b783 ld x15,0(x9) + 80002918: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xffffffffffffffff + 8000291c: 0004bf83 ld x31,0(x9) + 80002920: 00848493 addi x9,x9,8 + +0000000080002924 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + aes64ks2 x18, x15, x31 # perform operation + 80002924: 7ff78933 aes64ks2 x18,x15,x31 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 80002928: 00063203 ld x4,0(x12) + 8000292c: 01220c63 beq x4,x18,80002944 + 80002930: 3d0052ef jal x5,80007d00 + 80002934: 80002924 .word 0x80002924 + 80002938: 00000000 .word 0x00000000 + 8000293c: 80011d8c .word 0x80011d8c + 80002940: 00000000 .word 0x00000000 + 80002944: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x8000000000000001 + 80002948: 0004b803 ld x16,0(x9) + 8000294c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xfffffffffffffffe + 80002950: 0004be03 ld x28,0(x9) + 80002954: 00848493 addi x9,x9,8 + +0000000080002958 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + aes64ks2 x22, x16, x28 # perform operation + 80002958: 7fc80b33 aes64ks2 x22,x16,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 8000295c: 00063203 ld x4,0(x12) + 80002960: 01620c63 beq x4,x22,80002978 + 80002964: 39c052ef jal x5,80007d00 + 80002968: 80002958 .word 0x80002958 + 8000296c: 00000000 .word 0x00000000 + 80002970: 80011dff .word 0x80011dff + 80002974: 00000000 .word 0x00000000 + 80002978: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x8000000000000001 + 8000297c: 0004bc03 ld x24,0(x9) + 80002980: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002984: 0004b703 ld x14,0(x9) + 80002988: 00848493 addi x9,x9,8 + +000000008000298c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + aes64ks2 x16, x24, x14 # perform operation + 8000298c: 7eec0833 aes64ks2 x16,x24,x14 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002990: 00063203 ld x4,0(x12) + 80002994: 01020c63 beq x4,x16,800029ac + 80002998: 368052ef jal x5,80007d00 + 8000299c: 8000298c .word 0x8000298c + 800029a0: 00000000 .word 0x00000000 + 800029a4: 80011e72 .word 0x80011e72 + 800029a8: 00000000 .word 0x00000000 + 800029ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x8000000000000001 + 800029b0: 0004b103 ld x2,0(x9) + 800029b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0xaaaaaaaaaaaaaaaa + 800029b8: 0004b383 ld x7,0(x9) + 800029bc: 00848493 addi x9,x9,8 + +00000000800029c0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x26, x2, x7 # perform operation + 800029c0: 7e710d33 aes64ks2 x26,x2,x7 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029c4: 00063203 ld x4,0(x12) + 800029c8: 01a20c63 beq x4,x26,800029e0 + 800029cc: 334052ef jal x5,80007d00 + 800029d0: 800029c0 .word 0x800029c0 + 800029d4: 00000000 .word 0x00000000 + 800029d8: 80011ee5 .word 0x80011ee5 + 800029dc: 00000000 .word 0x00000000 + 800029e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x8000000000000001 + 800029e4: 0004b083 ld x1,0(x9) + 800029e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x5555555555555555 + 800029ec: 0004b183 ld x3,0(x9) + 800029f0: 00848493 addi x9,x9,8 + +00000000800029f4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + aes64ks2 x2, x1, x3 # perform operation + 800029f4: 7e308133 aes64ks2 x2,x1,x3 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029f8: 00063203 ld x4,0(x12) + 800029fc: 00220c63 beq x4,x2,80002a14 + 80002a00: 300052ef jal x5,80007d00 + 80002a04: 800029f4 .word 0x800029f4 + 80002a08: 00000000 .word 0x00000000 + 80002a0c: 80011f58 .word 0x80011f58 + 80002a10: 00000000 .word 0x00000000 + 80002a14: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x8000000000000001 + 80002a18: 0004bd03 ld x26,0(x9) + 80002a1c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000ffffffff + 80002a20: 0004be03 ld x28,0(x9) + 80002a24: 00848493 addi x9,x9,8 + +0000000080002a28 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + aes64ks2 x22, x26, x28 # perform operation + 80002a28: 7fcd0b33 aes64ks2 x22,x26,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a2c: 00063203 ld x4,0(x12) + 80002a30: 01620c63 beq x4,x22,80002a48 + 80002a34: 2cc052ef jal x5,80007d00 + 80002a38: 80002a28 .word 0x80002a28 + 80002a3c: 00000000 .word 0x00000000 + 80002a40: 80011fcb .word 0x80011fcb + 80002a44: 00000000 .word 0x00000000 + 80002a48: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x8000000000000001 + 80002a4c: 0004b983 ld x19,0(x9) + 80002a50: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000fffffffe + 80002a54: 0004bc83 ld x25,0(x9) + 80002a58: 00848493 addi x9,x9,8 + +0000000080002a5c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + aes64ks2 x31, x19, x25 # perform operation + 80002a5c: 7f998fb3 aes64ks2 x31,x19,x25 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a60: 00063203 ld x4,0(x12) + 80002a64: 01f20c63 beq x4,x31,80002a7c + 80002a68: 298052ef jal x5,80007d00 + 80002a6c: 80002a5c .word 0x80002a5c + 80002a70: 00000000 .word 0x00000000 + 80002a74: 80012036 .word 0x80012036 + 80002a78: 00000000 .word 0x00000000 + 80002a7c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x8000000000000001 + 80002a80: 0004b983 ld x19,0(x9) + 80002a84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x0000000100000000 + 80002a88: 0004b103 ld x2,0(x9) + 80002a8c: 00848493 addi x9,x9,8 + +0000000080002a90 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + aes64ks2 x29, x19, x2 # perform operation + 80002a90: 7e298eb3 aes64ks2 x29,x19,x2 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a94: 00063203 ld x4,0(x12) + 80002a98: 01d20c63 beq x4,x29,80002ab0 + 80002a9c: 264052ef jal x5,80007d00 + 80002aa0: 80002a90 .word 0x80002a90 + 80002aa4: 00000000 .word 0x00000000 + 80002aa8: 800120a1 .word 0x800120a1 + 80002aac: 00000000 .word 0x00000000 + 80002ab0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x8000000000000001 + 80002ab4: 0004bb83 ld x23,0(x9) + 80002ab8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000100000001 + 80002abc: 0004b683 ld x13,0(x9) + 80002ac0: 00848493 addi x9,x9,8 + +0000000080002ac4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + aes64ks2 x28, x23, x13 # perform operation + 80002ac4: 7edb8e33 aes64ks2 x28,x23,x13 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002ac8: 00063203 ld x4,0(x12) + 80002acc: 01c20c63 beq x4,x28,80002ae4 + 80002ad0: 230052ef jal x5,80007d00 + 80002ad4: 80002ac4 .word 0x80002ac4 + 80002ad8: 00000000 .word 0x00000000 + 80002adc: 8001210d .word 0x8001210d + 80002ae0: 00000000 .word 0x00000000 + 80002ae4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002ae8: 0004bc83 ld x25,0(x9) + 80002aec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000000 + 80002af0: 0004b983 ld x19,0(x9) + 80002af4: 00848493 addi x9,x9,8 + +0000000080002af8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + aes64ks2 x29, x25, x19 # perform operation + 80002af8: 7f3c8eb3 aes64ks2 x29,x25,x19 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002afc: 00063203 ld x4,0(x12) + 80002b00: 01d20c63 beq x4,x29,80002b18 + 80002b04: 1fc052ef jal x5,80007d00 + 80002b08: 80002af8 .word 0x80002af8 + 80002b0c: 00000000 .word 0x00000000 + 80002b10: 80012179 .word 0x80012179 + 80002b14: 00000000 .word 0x00000000 + 80002b18: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x7fffffffffffffff + 80002b1c: 0004bd03 ld x26,0(x9) + 80002b20: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000000000001 + 80002b24: 0004b383 ld x7,0(x9) + 80002b28: 00848493 addi x9,x9,8 + +0000000080002b2c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + aes64ks2 x28, x26, x7 # perform operation + 80002b2c: 7e7d0e33 aes64ks2 x28,x26,x7 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b30: 00063203 ld x4,0(x12) + 80002b34: 01c20c63 beq x4,x28,80002b4c + 80002b38: 1c8052ef jal x5,80007d00 + 80002b3c: 80002b2c .word 0x80002b2c + 80002b40: 00000000 .word 0x00000000 + 80002b44: 800121dd .word 0x800121dd + 80002b48: 00000000 .word 0x00000000 + 80002b4c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7fffffffffffffff + 80002b50: 0004b783 ld x15,0(x9) + 80002b54: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80002b58: 0004b583 ld x11,0(x9) + 80002b5c: 00848493 addi x9,x9,8 + +0000000080002b60 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + aes64ks2 x28, x15, x11 # perform operation + 80002b60: 7eb78e33 aes64ks2 x28,x15,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b64: 00063203 ld x4,0(x12) + 80002b68: 01c20c63 beq x4,x28,80002b80 + 80002b6c: 194052ef jal x5,80007d00 + 80002b70: 80002b60 .word 0x80002b60 + 80002b74: 00000000 .word 0x00000000 + 80002b78: 80012241 .word 0x80012241 + 80002b7c: 00000000 .word 0x00000000 + 80002b80: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7fffffffffffffff + 80002b84: 0004b883 ld x17,0(x9) + 80002b88: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x8000000000000000 + 80002b8c: 0004b803 ld x16,0(x9) + 80002b90: 00848493 addi x9,x9,8 + +0000000080002b94 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + aes64ks2 x23, x17, x16 # perform operation + 80002b94: 7f088bb3 aes64ks2 x23,x17,x16 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b98: 00063203 ld x4,0(x12) + 80002b9c: 01720c63 beq x4,x23,80002bb4 + 80002ba0: 160052ef jal x5,80007d00 + 80002ba4: 80002b94 .word 0x80002b94 + 80002ba8: 00000000 .word 0x00000000 + 80002bac: 800122a5 .word 0x800122a5 + 80002bb0: 00000000 .word 0x00000000 + 80002bb4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002bb8: 0004bf83 ld x31,0(x9) + 80002bbc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x8000000000000001 + 80002bc0: 0004b983 ld x19,0(x9) + 80002bc4: 00848493 addi x9,x9,8 + +0000000080002bc8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + aes64ks2 x7, x31, x19 # perform operation + 80002bc8: 7f3f83b3 aes64ks2 x7,x31,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bcc: 00063203 ld x4,0(x12) + 80002bd0: 00720c63 beq x4,x7,80002be8 + 80002bd4: 12c052ef jal x5,80007d00 + 80002bd8: 80002bc8 .word 0x80002bc8 + 80002bdc: 00000000 .word 0x00000000 + 80002be0: 80012318 .word 0x80012318 + 80002be4: 00000000 .word 0x00000000 + 80002be8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002bec: 0004b803 ld x16,0(x9) + 80002bf0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x7fffffffffffffff + 80002bf4: 0004b583 ld x11,0(x9) + 80002bf8: 00848493 addi x9,x9,8 + +0000000080002bfc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x1, x16, x11 # perform operation + 80002bfc: 7eb800b3 aes64ks2 x1,x16,x11 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002c00: 00063203 ld x4,0(x12) + 80002c04: 00120c63 beq x4,x1,80002c1c + 80002c08: 0f8052ef jal x5,80007d00 + 80002c0c: 80002bfc .word 0x80002bfc + 80002c10: 00000000 .word 0x00000000 + 80002c14: 8001238b .word 0x8001238b + 80002c18: 00000000 .word 0x00000000 + 80002c1c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002c20: 0004ba03 ld x20,0(x9) + 80002c24: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x7ffffffffffffffe + 80002c28: 0004ba83 ld x21,0(x9) + 80002c2c: 00848493 addi x9,x9,8 + +0000000080002c30 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x2, x20, x21 # perform operation + 80002c30: 7f5a0133 aes64ks2 x2,x20,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c34: 00063203 ld x4,0(x12) + 80002c38: 00220c63 beq x4,x2,80002c50 + 80002c3c: 0c4052ef jal x5,80007d00 + 80002c40: 80002c30 .word 0x80002c30 + 80002c44: 00000000 .word 0x00000000 + 80002c48: 800123fe .word 0x800123fe + 80002c4c: 00000000 .word 0x00000000 + 80002c50: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7fffffffffffffff + 80002c54: 0004bb03 ld x22,0(x9) + 80002c58: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0xffffffffffffffff + 80002c5c: 0004b503 ld x10,0(x9) + 80002c60: 00848493 addi x9,x9,8 + +0000000080002c64 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x31, x22, x10 # perform operation + 80002c64: 7eab0fb3 aes64ks2 x31,x22,x10 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c68: 00063203 ld x4,0(x12) + 80002c6c: 01f20c63 beq x4,x31,80002c84 + 80002c70: 090052ef jal x5,80007d00 + 80002c74: 80002c64 .word 0x80002c64 + 80002c78: 00000000 .word 0x00000000 + 80002c7c: 80012471 .word 0x80012471 + 80002c80: 00000000 .word 0x00000000 + 80002c84: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002c88: 0004ba83 ld x21,0(x9) + 80002c8c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0xfffffffffffffffe + 80002c90: 0004bb03 ld x22,0(x9) + 80002c94: 00848493 addi x9,x9,8 + +0000000080002c98 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x21, x22 # perform operation + 80002c98: 7f6a8d33 aes64ks2 x26,x21,x22 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c9c: 00063203 ld x4,0(x12) + 80002ca0: 01a20c63 beq x4,x26,80002cb8 + 80002ca4: 05c052ef jal x5,80007d00 + 80002ca8: 80002c98 .word 0x80002c98 + 80002cac: 00000000 .word 0x00000000 + 80002cb0: 800124e4 .word 0x800124e4 + 80002cb4: 00000000 .word 0x00000000 + 80002cb8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x7fffffffffffffff + 80002cbc: 0004b903 ld x18,0(x9) + 80002cc0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80002cc4: 0004b303 ld x6,0(x9) + 80002cc8: 00848493 addi x9,x9,8 + +0000000080002ccc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x25, x18, x6 # perform operation + 80002ccc: 7e690cb3 aes64ks2 x25,x18,x6 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cd0: 00063203 ld x4,0(x12) + 80002cd4: 01920c63 beq x4,x25,80002cec + 80002cd8: 028052ef jal x5,80007d00 + 80002cdc: 80002ccc .word 0x80002ccc + 80002ce0: 00000000 .word 0x00000000 + 80002ce4: 80012557 .word 0x80012557 + 80002ce8: 00000000 .word 0x00000000 + 80002cec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x7fffffffffffffff + 80002cf0: 0004b303 ld x6,0(x9) + 80002cf4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80002cf8: 0004bc03 ld x24,0(x9) + 80002cfc: 00848493 addi x9,x9,8 + +0000000080002d00 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x10, x6, x24 # perform operation + 80002d00: 7f830533 aes64ks2 x10,x6,x24 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002d04: 00063203 ld x4,0(x12) + 80002d08: 00a20c63 beq x4,x10,80002d20 + 80002d0c: 7f5042ef jal x5,80007d00 + 80002d10: 80002d00 .word 0x80002d00 + 80002d14: 00000000 .word 0x00000000 + 80002d18: 800125ca .word 0x800125ca + 80002d1c: 00000000 .word 0x00000000 + 80002d20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d24: 0004bf83 ld x31,0(x9) + 80002d28: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x5555555555555555 + 80002d2c: 0004b403 ld x8,0(x9) + 80002d30: 00848493 addi x9,x9,8 + +0000000080002d34 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + aes64ks2 x23, x31, x8 # perform operation + 80002d34: 7e8f8bb3 aes64ks2 x23,x31,x8 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d38: 00063203 ld x4,0(x12) + 80002d3c: 01720c63 beq x4,x23,80002d54 + 80002d40: 7c1042ef jal x5,80007d00 + 80002d44: 80002d34 .word 0x80002d34 + 80002d48: 00000000 .word 0x00000000 + 80002d4c: 8001263d .word 0x8001263d + 80002d50: 00000000 .word 0x00000000 + 80002d54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x7fffffffffffffff + 80002d58: 0004be83 ld x29,0(x9) + 80002d5c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000000ffffffff + 80002d60: 0004bf03 ld x30,0(x9) + 80002d64: 00848493 addi x9,x9,8 + +0000000080002d68 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + aes64ks2 x21, x29, x30 # perform operation + 80002d68: 7fee8ab3 aes64ks2 x21,x29,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d6c: 00063203 ld x4,0(x12) + 80002d70: 01520c63 beq x4,x21,80002d88 + 80002d74: 78d042ef jal x5,80007d00 + 80002d78: 80002d68 .word 0x80002d68 + 80002d7c: 00000000 .word 0x00000000 + 80002d80: 800126b0 .word 0x800126b0 + 80002d84: 00000000 .word 0x00000000 + 80002d88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d8c: 0004bf83 ld x31,0(x9) + 80002d90: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x00000000fffffffe + 80002d94: 0004b983 ld x19,0(x9) + 80002d98: 00848493 addi x9,x9,8 + +0000000080002d9c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + aes64ks2 x28, x31, x19 # perform operation + 80002d9c: 7f3f8e33 aes64ks2 x28,x31,x19 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002da0: 00063203 ld x4,0(x12) + 80002da4: 01c20c63 beq x4,x28,80002dbc + 80002da8: 759042ef jal x5,80007d00 + 80002dac: 80002d9c .word 0x80002d9c + 80002db0: 00000000 .word 0x00000000 + 80002db4: 8001271b .word 0x8001271b + 80002db8: 00000000 .word 0x00000000 + 80002dbc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002dc0: 0004bb83 ld x23,0(x9) + 80002dc4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000000 + 80002dc8: 0004b803 ld x16,0(x9) + 80002dcc: 00848493 addi x9,x9,8 + +0000000080002dd0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + aes64ks2 x11, x23, x16 # perform operation + 80002dd0: 7f0b85b3 aes64ks2 x11,x23,x16 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dd4: 00063203 ld x4,0(x12) + 80002dd8: 00b20c63 beq x4,x11,80002df0 + 80002ddc: 725042ef jal x5,80007d00 + 80002de0: 80002dd0 .word 0x80002dd0 + 80002de4: 00000000 .word 0x00000000 + 80002de8: 80012786 .word 0x80012786 + 80002dec: 00000000 .word 0x00000000 + 80002df0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002df4: 0004bf83 ld x31,0(x9) + 80002df8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x0000000100000001 + 80002dfc: 0004b903 ld x18,0(x9) + 80002e00: 00848493 addi x9,x9,8 + +0000000080002e04 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + aes64ks2 x6, x31, x18 # perform operation + 80002e04: 7f2f8333 aes64ks2 x6,x31,x18 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002e08: 00063203 ld x4,0(x12) + 80002e0c: 00620c63 beq x4,x6,80002e24 + 80002e10: 6f1042ef jal x5,80007d00 + 80002e14: 80002e04 .word 0x80002e04 + 80002e18: 00000000 .word 0x00000000 + 80002e1c: 800127f2 .word 0x800127f2 + 80002e20: 00000000 .word 0x00000000 + 80002e24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002e28: 0004be03 ld x28,0(x9) + 80002e2c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000000000000 + 80002e30: 0004bb03 ld x22,0(x9) + 80002e34: 00848493 addi x9,x9,8 + +0000000080002e38 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + aes64ks2 x8, x28, x22 # perform operation + 80002e38: 7f6e0433 aes64ks2 x8,x28,x22 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e3c: 00063203 ld x4,0(x12) + 80002e40: 00820c63 beq x4,x8,80002e58 + 80002e44: 6bd042ef jal x5,80007d00 + 80002e48: 80002e38 .word 0x80002e38 + 80002e4c: 00000000 .word 0x00000000 + 80002e50: 8001285e .word 0x8001285e + 80002e54: 00000000 .word 0x00000000 + 80002e58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80002e5c: 0004bd83 ld x27,0(x9) + 80002e60: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000000000001 + 80002e64: 0004b803 ld x16,0(x9) + 80002e68: 00848493 addi x9,x9,8 + +0000000080002e6c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + aes64ks2 x24, x27, x16 # perform operation + 80002e6c: 7f0d8c33 aes64ks2 x24,x27,x16 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e70: 00063203 ld x4,0(x12) + 80002e74: 01820c63 beq x4,x24,80002e8c + 80002e78: 689042ef jal x5,80007d00 + 80002e7c: 80002e6c .word 0x80002e6c + 80002e80: 00000000 .word 0x00000000 + 80002e84: 800128c2 .word 0x800128c2 + 80002e88: 00000000 .word 0x00000000 + 80002e8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x7ffffffffffffffe + 80002e90: 0004bb03 ld x22,0(x9) + 80002e94: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000002 + 80002e98: 0004bc03 ld x24,0(x9) + 80002e9c: 00848493 addi x9,x9,8 + +0000000080002ea0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + aes64ks2 x13, x22, x24 # perform operation + 80002ea0: 7f8b06b3 aes64ks2 x13,x22,x24 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002ea4: 00063203 ld x4,0(x12) + 80002ea8: 00d20c63 beq x4,x13,80002ec0 + 80002eac: 655042ef jal x5,80007d00 + 80002eb0: 80002ea0 .word 0x80002ea0 + 80002eb4: 00000000 .word 0x00000000 + 80002eb8: 80012926 .word 0x80012926 + 80002ebc: 00000000 .word 0x00000000 + 80002ec0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x7ffffffffffffffe + 80002ec4: 0004b503 ld x10,0(x9) + 80002ec8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x8000000000000000 + 80002ecc: 0004b103 ld x2,0(x9) + 80002ed0: 00848493 addi x9,x9,8 + +0000000080002ed4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + aes64ks2 x30, x10, x2 # perform operation + 80002ed4: 7e250f33 aes64ks2 x30,x10,x2 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ed8: 00063203 ld x4,0(x12) + 80002edc: 01e20c63 beq x4,x30,80002ef4 + 80002ee0: 621042ef jal x5,80007d00 + 80002ee4: 80002ed4 .word 0x80002ed4 + 80002ee8: 00000000 .word 0x00000000 + 80002eec: 8001298a .word 0x8001298a + 80002ef0: 00000000 .word 0x00000000 + 80002ef4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80002ef8: 0004b383 ld x7,0(x9) + 80002efc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x8000000000000001 + 80002f00: 0004bb03 ld x22,0(x9) + 80002f04: 00848493 addi x9,x9,8 + +0000000080002f08 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + aes64ks2 x6, x7, x22 # perform operation + 80002f08: 7f638333 aes64ks2 x6,x7,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f0c: 00063203 ld x4,0(x12) + 80002f10: 00620c63 beq x4,x6,80002f28 + 80002f14: 5ed042ef jal x5,80007d00 + 80002f18: 80002f08 .word 0x80002f08 + 80002f1c: 00000000 .word 0x00000000 + 80002f20: 800129fd .word 0x800129fd + 80002f24: 00000000 .word 0x00000000 + 80002f28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f2c: 0004b983 ld x19,0(x9) + 80002f30: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffffffffffff + 80002f34: 0004b183 ld x3,0(x9) + 80002f38: 00848493 addi x9,x9,8 + +0000000080002f3c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x25, x19, x3 # perform operation + 80002f3c: 7e398cb3 aes64ks2 x25,x19,x3 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f40: 00063203 ld x4,0(x12) + 80002f44: 01920c63 beq x4,x25,80002f5c + 80002f48: 5b9042ef jal x5,80007d00 + 80002f4c: 80002f3c .word 0x80002f3c + 80002f50: 00000000 .word 0x00000000 + 80002f54: 80012a70 .word 0x80012a70 + 80002f58: 00000000 .word 0x00000000 + 80002f5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80002f60: 0004b183 ld x3,0(x9) + 80002f64: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80002f68: 0004b703 ld x14,0(x9) + 80002f6c: 00848493 addi x9,x9,8 + +0000000080002f70 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x7, x3, x14 # perform operation + 80002f70: 7ee183b3 aes64ks2 x7,x3,x14 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f74: 00063203 ld x4,0(x12) + 80002f78: 00720c63 beq x4,x7,80002f90 + 80002f7c: 585042ef jal x5,80007d00 + 80002f80: 80002f70 .word 0x80002f70 + 80002f84: 00000000 .word 0x00000000 + 80002f88: 80012ae3 .word 0x80012ae3 + 80002f8c: 00000000 .word 0x00000000 + 80002f90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002f94: 0004b983 ld x19,0(x9) + 80002f98: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0xffffffffffffffff + 80002f9c: 0004bd83 ld x27,0(x9) + 80002fa0: 00848493 addi x9,x9,8 + +0000000080002fa4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x11, x19, x27 # perform operation + 80002fa4: 7fb985b3 aes64ks2 x11,x19,x27 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002fa8: 00063203 ld x4,0(x12) + 80002fac: 00b20c63 beq x4,x11,80002fc4 + 80002fb0: 551042ef jal x5,80007d00 + 80002fb4: 80002fa4 .word 0x80002fa4 + 80002fb8: 00000000 .word 0x00000000 + 80002fbc: 80012b56 .word 0x80012b56 + 80002fc0: 00000000 .word 0x00000000 + 80002fc4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x7ffffffffffffffe + 80002fc8: 0004b883 ld x17,0(x9) + 80002fcc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xfffffffffffffffe + 80002fd0: 0004bf83 ld x31,0(x9) + 80002fd4: 00848493 addi x9,x9,8 + +0000000080002fd8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x13, x17, x31 # perform operation + 80002fd8: 7ff886b3 aes64ks2 x13,x17,x31 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fdc: 00063203 ld x4,0(x12) + 80002fe0: 00d20c63 beq x4,x13,80002ff8 + 80002fe4: 51d042ef jal x5,80007d00 + 80002fe8: 80002fd8 .word 0x80002fd8 + 80002fec: 00000000 .word 0x00000000 + 80002ff0: 80012bc9 .word 0x80012bc9 + 80002ff4: 00000000 .word 0x00000000 + 80002ff8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002ffc: 0004b703 ld x14,0(x9) + 80003000: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80003004: 0004b583 ld x11,0(x9) + 80003008: 00848493 addi x9,x9,8 + +000000008000300c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x24, x14, x11 # perform operation + 8000300c: 7eb70c33 aes64ks2 x24,x14,x11 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003010: 00063203 ld x4,0(x12) + 80003014: 01820c63 beq x4,x24,8000302c + 80003018: 4e9042ef jal x5,80007d00 + 8000301c: 8000300c .word 0x8000300c + 80003020: 00000000 .word 0x00000000 + 80003024: 80012c3c .word 0x80012c3c + 80003028: 00000000 .word 0x00000000 + 8000302c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80003030: 0004b383 ld x7,0(x9) + 80003034: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80003038: 0004ba03 ld x20,0(x9) + 8000303c: 00848493 addi x9,x9,8 + +0000000080003040 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x29, x7, x20 # perform operation + 80003040: 7f438eb3 aes64ks2 x29,x7,x20 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003044: 00063203 ld x4,0(x12) + 80003048: 01d20c63 beq x4,x29,80003060 + 8000304c: 4b5042ef jal x5,80007d00 + 80003050: 80003040 .word 0x80003040 + 80003054: 00000000 .word 0x00000000 + 80003058: 80012caf .word 0x80012caf + 8000305c: 00000000 .word 0x00000000 + 80003060: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80003064: 0004ba83 ld x21,0(x9) + 80003068: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x5555555555555555 + 8000306c: 0004b503 ld x10,0(x9) + 80003070: 00848493 addi x9,x9,8 + +0000000080003074 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + aes64ks2 x1, x21, x10 # perform operation + 80003074: 7eaa80b3 aes64ks2 x1,x21,x10 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 80003078: 00063203 ld x4,0(x12) + 8000307c: 00120c63 beq x4,x1,80003094 + 80003080: 481042ef jal x5,80007d00 + 80003084: 80003074 .word 0x80003074 + 80003088: 00000000 .word 0x00000000 + 8000308c: 80012d22 .word 0x80012d22 + 80003090: 00000000 .word 0x00000000 + 80003094: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80003098: 0004b783 ld x15,0(x9) + 8000309c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000ffffffff + 800030a0: 0004ba83 ld x21,0(x9) + 800030a4: 00848493 addi x9,x9,8 + +00000000800030a8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + aes64ks2 x24, x15, x21 # perform operation + 800030a8: 7f578c33 aes64ks2 x24,x15,x21 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030ac: 00063203 ld x4,0(x12) + 800030b0: 01820c63 beq x4,x24,800030c8 + 800030b4: 44d042ef jal x5,80007d00 + 800030b8: 800030a8 .word 0x800030a8 + 800030bc: 00000000 .word 0x00000000 + 800030c0: 80012d95 .word 0x80012d95 + 800030c4: 00000000 .word 0x00000000 + 800030c8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x7ffffffffffffffe + 800030cc: 0004b083 ld x1,0(x9) + 800030d0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000fffffffe + 800030d4: 0004be03 ld x28,0(x9) + 800030d8: 00848493 addi x9,x9,8 + +00000000800030dc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + aes64ks2 x22, x1, x28 # perform operation + 800030dc: 7fc08b33 aes64ks2 x22,x1,x28 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030e0: 00063203 ld x4,0(x12) + 800030e4: 01620c63 beq x4,x22,800030fc + 800030e8: 419042ef jal x5,80007d00 + 800030ec: 800030dc .word 0x800030dc + 800030f0: 00000000 .word 0x00000000 + 800030f4: 80012e00 .word 0x80012e00 + 800030f8: 00000000 .word 0x00000000 + 800030fc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80003100: 0004ba03 ld x20,0(x9) + 80003104: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x0000000100000000 + 80003108: 0004b303 ld x6,0(x9) + 8000310c: 00848493 addi x9,x9,8 + +0000000080003110 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + aes64ks2 x28, x20, x6 # perform operation + 80003110: 7e6a0e33 aes64ks2 x28,x20,x6 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003114: 00063203 ld x4,0(x12) + 80003118: 01c20c63 beq x4,x28,80003130 + 8000311c: 3e5042ef jal x5,80007d00 + 80003120: 80003110 .word 0x80003110 + 80003124: 00000000 .word 0x00000000 + 80003128: 80012e6b .word 0x80012e6b + 8000312c: 00000000 .word 0x00000000 + 80003130: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x7ffffffffffffffe + 80003134: 0004b783 ld x15,0(x9) + 80003138: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x0000000100000001 + 8000313c: 0004b403 ld x8,0(x9) + 80003140: 00848493 addi x9,x9,8 + +0000000080003144 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + aes64ks2 x27, x15, x8 # perform operation + 80003144: 7e878db3 aes64ks2 x27,x15,x8 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 80003148: 00063203 ld x4,0(x12) + 8000314c: 01b20c63 beq x4,x27,80003164 + 80003150: 3b1042ef jal x5,80007d00 + 80003154: 80003144 .word 0x80003144 + 80003158: 00000000 .word 0x00000000 + 8000315c: 80012ed7 .word 0x80012ed7 + 80003160: 00000000 .word 0x00000000 + 80003164: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xffffffffffffffff + 80003168: 0004b803 ld x16,0(x9) + 8000316c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000000 + 80003170: 0004bd03 ld x26,0(x9) + 80003174: 00848493 addi x9,x9,8 + +0000000080003178 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + aes64ks2 x28, x16, x26 # perform operation + 80003178: 7fa80e33 aes64ks2 x28,x16,x26 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 8000317c: 00063203 ld x4,0(x12) + 80003180: 01c20c63 beq x4,x28,80003198 + 80003184: 37d042ef jal x5,80007d00 + 80003188: 80003178 .word 0x80003178 + 8000318c: 00000000 .word 0x00000000 + 80003190: 80012f43 .word 0x80012f43 + 80003194: 00000000 .word 0x00000000 + 80003198: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffffffffffff + 8000319c: 0004b103 ld x2,0(x9) + 800031a0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000001 + 800031a4: 0004bc03 ld x24,0(x9) + 800031a8: 00848493 addi x9,x9,8 + +00000000800031ac : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + aes64ks2 x17, x2, x24 # perform operation + 800031ac: 7f8108b3 aes64ks2 x17,x2,x24 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031b0: 00063203 ld x4,0(x12) + 800031b4: 01120c63 beq x4,x17,800031cc + 800031b8: 349042ef jal x5,80007d00 + 800031bc: 800031ac .word 0x800031ac + 800031c0: 00000000 .word 0x00000000 + 800031c4: 80012fa7 .word 0x80012fa7 + 800031c8: 00000000 .word 0x00000000 + 800031cc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xffffffffffffffff + 800031d0: 0004be83 ld x29,0(x9) + 800031d4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000000000002 + 800031d8: 0004bb03 ld x22,0(x9) + 800031dc: 00848493 addi x9,x9,8 + +00000000800031e0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + aes64ks2 x6, x29, x22 # perform operation + 800031e0: 7f6e8333 aes64ks2 x6,x29,x22 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031e4: 00063203 ld x4,0(x12) + 800031e8: 00620c63 beq x4,x6,80003200 + 800031ec: 315042ef jal x5,80007d00 + 800031f0: 800031e0 .word 0x800031e0 + 800031f4: 00000000 .word 0x00000000 + 800031f8: 8001300b .word 0x8001300b + 800031fc: 00000000 .word 0x00000000 + 80003200: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0xffffffffffffffff + 80003204: 0004b503 ld x10,0(x9) + 80003208: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x8000000000000000 + 8000320c: 0004bd83 ld x27,0(x9) + 80003210: 00848493 addi x9,x9,8 + +0000000080003214 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + aes64ks2 x18, x10, x27 # perform operation + 80003214: 7fb50933 aes64ks2 x18,x10,x27 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 80003218: 00063203 ld x4,0(x12) + 8000321c: 01220c63 beq x4,x18,80003234 + 80003220: 2e1042ef jal x5,80007d00 + 80003224: 80003214 .word 0x80003214 + 80003228: 00000000 .word 0x00000000 + 8000322c: 8001306f .word 0x8001306f + 80003230: 00000000 .word 0x00000000 + 80003234: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xffffffffffffffff + 80003238: 0004b083 ld x1,0(x9) + 8000323c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x8000000000000001 + 80003240: 0004bb03 ld x22,0(x9) + 80003244: 00848493 addi x9,x9,8 + +0000000080003248 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + aes64ks2 x15, x1, x22 # perform operation + 80003248: 7f6087b3 aes64ks2 x15,x1,x22 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 8000324c: 00063203 ld x4,0(x12) + 80003250: 00f20c63 beq x4,x15,80003268 + 80003254: 2ad042ef jal x5,80007d00 + 80003258: 80003248 .word 0x80003248 + 8000325c: 00000000 .word 0x00000000 + 80003260: 800130e2 .word 0x800130e2 + 80003264: 00000000 .word 0x00000000 + 80003268: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xffffffffffffffff + 8000326c: 0004be03 ld x28,0(x9) + 80003270: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x7fffffffffffffff + 80003274: 0004b803 ld x16,0(x9) + 80003278: 00848493 addi x9,x9,8 + +000000008000327c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x2, x28, x16 # perform operation + 8000327c: 7f0e0133 aes64ks2 x2,x28,x16 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003280: 00063203 ld x4,0(x12) + 80003284: 00220c63 beq x4,x2,8000329c + 80003288: 279042ef jal x5,80007d00 + 8000328c: 8000327c .word 0x8000327c + 80003290: 00000000 .word 0x00000000 + 80003294: 80013155 .word 0x80013155 + 80003298: 00000000 .word 0x00000000 + 8000329c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xffffffffffffffff + 800032a0: 0004b103 ld x2,0(x9) + 800032a4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 800032a8: 0004b883 ld x17,0(x9) + 800032ac: 00848493 addi x9,x9,8 + +00000000800032b0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x1, x2, x17 # perform operation + 800032b0: 7f1100b3 aes64ks2 x1,x2,x17 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032b4: 00063203 ld x4,0(x12) + 800032b8: 00120c63 beq x4,x1,800032d0 + 800032bc: 245042ef jal x5,80007d00 + 800032c0: 800032b0 .word 0x800032b0 + 800032c4: 00000000 .word 0x00000000 + 800032c8: 800131c8 .word 0x800131c8 + 800032cc: 00000000 .word 0x00000000 + 800032d0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xffffffffffffffff + 800032d4: 0004b783 ld x15,0(x9) + 800032d8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffffffffffff + 800032dc: 0004b303 ld x6,0(x9) + 800032e0: 00848493 addi x9,x9,8 + +00000000800032e4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x26, x15, x6 # perform operation + 800032e4: 7e678d33 aes64ks2 x26,x15,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032e8: 00063203 ld x4,0(x12) + 800032ec: 01a20c63 beq x4,x26,80003304 + 800032f0: 211042ef jal x5,80007d00 + 800032f4: 800032e4 .word 0x800032e4 + 800032f8: 00000000 .word 0x00000000 + 800032fc: 8001323b .word 0x8001323b + 80003300: 00000000 .word 0x00000000 + 80003304: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xffffffffffffffff + 80003308: 0004be03 ld x28,0(x9) + 8000330c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xfffffffffffffffe + 80003310: 0004b103 ld x2,0(x9) + 80003314: 00848493 addi x9,x9,8 + +0000000080003318 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x27, x28, x2 # perform operation + 80003318: 7e2e0db3 aes64ks2 x27,x28,x2 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 8000331c: 00063203 ld x4,0(x12) + 80003320: 01b20c63 beq x4,x27,80003338 + 80003324: 1dd042ef jal x5,80007d00 + 80003328: 80003318 .word 0x80003318 + 8000332c: 00000000 .word 0x00000000 + 80003330: 800132ae .word 0x800132ae + 80003334: 00000000 .word 0x00000000 + 80003338: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xffffffffffffffff + 8000333c: 0004bf83 ld x31,0(x9) + 80003340: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80003344: 0004b983 ld x19,0(x9) + 80003348: 00848493 addi x9,x9,8 + +000000008000334c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x21, x31, x19 # perform operation + 8000334c: 7f3f8ab3 aes64ks2 x21,x31,x19 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003350: 00063203 ld x4,0(x12) + 80003354: 01520c63 beq x4,x21,8000336c + 80003358: 1a9042ef jal x5,80007d00 + 8000335c: 8000334c .word 0x8000334c + 80003360: 00000000 .word 0x00000000 + 80003364: 80013321 .word 0x80013321 + 80003368: 00000000 .word 0x00000000 + 8000336c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xffffffffffffffff + 80003370: 0004b683 ld x13,0(x9) + 80003374: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80003378: 0004ba83 ld x21,0(x9) + 8000337c: 00848493 addi x9,x9,8 + +0000000080003380 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x18, x13, x21 # perform operation + 80003380: 7f568933 aes64ks2 x18,x13,x21 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003384: 00063203 ld x4,0(x12) + 80003388: 01220c63 beq x4,x18,800033a0 + 8000338c: 175042ef jal x5,80007d00 + 80003390: 80003380 .word 0x80003380 + 80003394: 00000000 .word 0x00000000 + 80003398: 80013394 .word 0x80013394 + 8000339c: 00000000 .word 0x00000000 + 800033a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xffffffffffffffff + 800033a4: 0004bf03 ld x30,0(x9) + 800033a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x5555555555555555 + 800033ac: 0004bd83 ld x27,0(x9) + 800033b0: 00848493 addi x9,x9,8 + +00000000800033b4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + aes64ks2 x11, x30, x27 # perform operation + 800033b4: 7fbf05b3 aes64ks2 x11,x30,x27 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033b8: 00063203 ld x4,0(x12) + 800033bc: 00b20c63 beq x4,x11,800033d4 + 800033c0: 141042ef jal x5,80007d00 + 800033c4: 800033b4 .word 0x800033b4 + 800033c8: 00000000 .word 0x00000000 + 800033cc: 80013407 .word 0x80013407 + 800033d0: 00000000 .word 0x00000000 + 800033d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xffffffffffffffff + 800033d8: 0004bd03 ld x26,0(x9) + 800033dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x00000000ffffffff + 800033e0: 0004b583 ld x11,0(x9) + 800033e4: 00848493 addi x9,x9,8 + +00000000800033e8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + aes64ks2 x1, x26, x11 # perform operation + 800033e8: 7ebd00b3 aes64ks2 x1,x26,x11 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033ec: 00063203 ld x4,0(x12) + 800033f0: 00120c63 beq x4,x1,80003408 + 800033f4: 10d042ef jal x5,80007d00 + 800033f8: 800033e8 .word 0x800033e8 + 800033fc: 00000000 .word 0x00000000 + 80003400: 8001347a .word 0x8001347a + 80003404: 00000000 .word 0x00000000 + 80003408: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xffffffffffffffff + 8000340c: 0004be83 ld x29,0(x9) + 80003410: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80003414: 0004bd03 ld x26,0(x9) + 80003418: 00848493 addi x9,x9,8 + +000000008000341c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + aes64ks2 x14, x29, x26 # perform operation + 8000341c: 7fae8733 aes64ks2 x14,x29,x26 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003420: 00063203 ld x4,0(x12) + 80003424: 00e20c63 beq x4,x14,8000343c + 80003428: 0d9042ef jal x5,80007d00 + 8000342c: 8000341c .word 0x8000341c + 80003430: 00000000 .word 0x00000000 + 80003434: 800134e5 .word 0x800134e5 + 80003438: 00000000 .word 0x00000000 + 8000343c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xffffffffffffffff + 80003440: 0004b703 ld x14,0(x9) + 80003444: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000100000000 + 80003448: 0004b083 ld x1,0(x9) + 8000344c: 00848493 addi x9,x9,8 + +0000000080003450 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + aes64ks2 x11, x14, x1 # perform operation + 80003450: 7e1705b3 aes64ks2 x11,x14,x1 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003454: 00063203 ld x4,0(x12) + 80003458: 00b20c63 beq x4,x11,80003470 + 8000345c: 0a5042ef jal x5,80007d00 + 80003460: 80003450 .word 0x80003450 + 80003464: 00000000 .word 0x00000000 + 80003468: 80013550 .word 0x80013550 + 8000346c: 00000000 .word 0x00000000 + 80003470: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xffffffffffffffff + 80003474: 0004ba83 ld x21,0(x9) + 80003478: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000100000001 + 8000347c: 0004be83 ld x29,0(x9) + 80003480: 00848493 addi x9,x9,8 + +0000000080003484 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + aes64ks2 x10, x21, x29 # perform operation + 80003484: 7fda8533 aes64ks2 x10,x21,x29 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 80003488: 00063203 ld x4,0(x12) + 8000348c: 00a20c63 beq x4,x10,800034a4 + 80003490: 071042ef jal x5,80007d00 + 80003494: 80003484 .word 0x80003484 + 80003498: 00000000 .word 0x00000000 + 8000349c: 800135bc .word 0x800135bc + 800034a0: 00000000 .word 0x00000000 + 800034a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0xfffffffffffffffe + 800034a8: 0004bb83 ld x23,0(x9) + 800034ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x0000000000000000 + 800034b0: 0004be03 ld x28,0(x9) + 800034b4: 00848493 addi x9,x9,8 + +00000000800034b8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + aes64ks2 x30, x23, x28 # perform operation + 800034b8: 7fcb8f33 aes64ks2 x30,x23,x28 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034bc: 00063203 ld x4,0(x12) + 800034c0: 01e20c63 beq x4,x30,800034d8 + 800034c4: 03d042ef jal x5,80007d00 + 800034c8: 800034b8 .word 0x800034b8 + 800034cc: 00000000 .word 0x00000000 + 800034d0: 80013628 .word 0x80013628 + 800034d4: 00000000 .word 0x00000000 + 800034d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xfffffffffffffffe + 800034dc: 0004bd03 ld x26,0(x9) + 800034e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000000000001 + 800034e4: 0004bf83 ld x31,0(x9) + 800034e8: 00848493 addi x9,x9,8 + +00000000800034ec : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + aes64ks2 x7, x26, x31 # perform operation + 800034ec: 7ffd03b3 aes64ks2 x7,x26,x31 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034f0: 00063203 ld x4,0(x12) + 800034f4: 00720c63 beq x4,x7,8000350c + 800034f8: 009042ef jal x5,80007d00 + 800034fc: 800034ec .word 0x800034ec + 80003500: 00000000 .word 0x00000000 + 80003504: 8001368c .word 0x8001368c + 80003508: 00000000 .word 0x00000000 + 8000350c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003510: 0004b683 ld x13,0(x9) + 80003514: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80003518: 0004b583 ld x11,0(x9) + 8000351c: 00848493 addi x9,x9,8 + +0000000080003520 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + aes64ks2 x19, x13, x11 # perform operation + 80003520: 7eb689b3 aes64ks2 x19,x13,x11 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003524: 00063203 ld x4,0(x12) + 80003528: 01320c63 beq x4,x19,80003540 + 8000352c: 7d4042ef jal x5,80007d00 + 80003530: 80003520 .word 0x80003520 + 80003534: 00000000 .word 0x00000000 + 80003538: 800136f0 .word 0x800136f0 + 8000353c: 00000000 .word 0x00000000 + 80003540: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xfffffffffffffffe + 80003544: 0004bc03 ld x24,0(x9) + 80003548: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x8000000000000000 + 8000354c: 0004b383 ld x7,0(x9) + 80003550: 00848493 addi x9,x9,8 + +0000000080003554 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + aes64ks2 x14, x24, x7 # perform operation + 80003554: 7e7c0733 aes64ks2 x14,x24,x7 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 80003558: 00063203 ld x4,0(x12) + 8000355c: 00e20c63 beq x4,x14,80003574 + 80003560: 7a0042ef jal x5,80007d00 + 80003564: 80003554 .word 0x80003554 + 80003568: 00000000 .word 0x00000000 + 8000356c: 80013754 .word 0x80013754 + 80003570: 00000000 .word 0x00000000 + 80003574: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfffffffffffffffe + 80003578: 0004b703 ld x14,0(x9) + 8000357c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x8000000000000001 + 80003580: 0004b183 ld x3,0(x9) + 80003584: 00848493 addi x9,x9,8 + +0000000080003588 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + aes64ks2 x6, x14, x3 # perform operation + 80003588: 7e370333 aes64ks2 x6,x14,x3 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 8000358c: 00063203 ld x4,0(x12) + 80003590: 00620c63 beq x4,x6,800035a8 + 80003594: 76c042ef jal x5,80007d00 + 80003598: 80003588 .word 0x80003588 + 8000359c: 00000000 .word 0x00000000 + 800035a0: 800137c7 .word 0x800137c7 + 800035a4: 00000000 .word 0x00000000 + 800035a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xfffffffffffffffe + 800035ac: 0004b703 ld x14,0(x9) + 800035b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x7fffffffffffffff + 800035b4: 0004bf03 ld x30,0(x9) + 800035b8: 00848493 addi x9,x9,8 + +00000000800035bc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x8, x14, x30 # perform operation + 800035bc: 7fe70433 aes64ks2 x8,x14,x30 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035c0: 00063203 ld x4,0(x12) + 800035c4: 00820c63 beq x4,x8,800035dc + 800035c8: 738042ef jal x5,80007d00 + 800035cc: 800035bc .word 0x800035bc + 800035d0: 00000000 .word 0x00000000 + 800035d4: 8001383a .word 0x8001383a + 800035d8: 00000000 .word 0x00000000 + 800035dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xfffffffffffffffe + 800035e0: 0004ba03 ld x20,0(x9) + 800035e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800035e8: 0004bb83 ld x23,0(x9) + 800035ec: 00848493 addi x9,x9,8 + +00000000800035f0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x3, x20, x23 # perform operation + 800035f0: 7f7a01b3 aes64ks2 x3,x20,x23 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035f4: 00063203 ld x4,0(x12) + 800035f8: 00320c63 beq x4,x3,80003610 + 800035fc: 704042ef jal x5,80007d00 + 80003600: 800035f0 .word 0x800035f0 + 80003604: 00000000 .word 0x00000000 + 80003608: 800138ad .word 0x800138ad + 8000360c: 00000000 .word 0x00000000 + 80003610: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xfffffffffffffffe + 80003614: 0004b183 ld x3,0(x9) + 80003618: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 8000361c: 0004bf03 ld x30,0(x9) + 80003620: 00848493 addi x9,x9,8 + +0000000080003624 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x21, x3, x30 # perform operation + 80003624: 7fe18ab3 aes64ks2 x21,x3,x30 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80003628: 00063203 ld x4,0(x12) + 8000362c: 01520c63 beq x4,x21,80003644 + 80003630: 6d0042ef jal x5,80007d00 + 80003634: 80003624 .word 0x80003624 + 80003638: 00000000 .word 0x00000000 + 8000363c: 80013920 .word 0x80013920 + 80003640: 00000000 .word 0x00000000 + 80003644: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xfffffffffffffffe + 80003648: 0004bf03 ld x30,0(x9) + 8000364c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffffffffffe + 80003650: 0004bc83 ld x25,0(x9) + 80003654: 00848493 addi x9,x9,8 + +0000000080003658 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x3, x30, x25 # perform operation + 80003658: 7f9f01b3 aes64ks2 x3,x30,x25 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 8000365c: 00063203 ld x4,0(x12) + 80003660: 00320c63 beq x4,x3,80003678 + 80003664: 69c042ef jal x5,80007d00 + 80003668: 80003658 .word 0x80003658 + 8000366c: 00000000 .word 0x00000000 + 80003670: 80013993 .word 0x80013993 + 80003674: 00000000 .word 0x00000000 + 80003678: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffffffffffe + 8000367c: 0004b903 ld x18,0(x9) + 80003680: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80003684: 0004b103 ld x2,0(x9) + 80003688: 00848493 addi x9,x9,8 + +000000008000368c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x17, x18, x2 # perform operation + 8000368c: 7e2908b3 aes64ks2 x17,x18,x2 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003690: 00063203 ld x4,0(x12) + 80003694: 01120c63 beq x4,x17,800036ac + 80003698: 668042ef jal x5,80007d00 + 8000369c: 8000368c .word 0x8000368c + 800036a0: 00000000 .word 0x00000000 + 800036a4: 80013a06 .word 0x80013a06 + 800036a8: 00000000 .word 0x00000000 + 800036ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xfffffffffffffffe + 800036b0: 0004b083 ld x1,0(x9) + 800036b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 800036b8: 0004ba03 ld x20,0(x9) + 800036bc: 00848493 addi x9,x9,8 + +00000000800036c0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x30, x1, x20 # perform operation + 800036c0: 7f408f33 aes64ks2 x30,x1,x20 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036c4: 00063203 ld x4,0(x12) + 800036c8: 01e20c63 beq x4,x30,800036e0 + 800036cc: 634042ef jal x5,80007d00 + 800036d0: 800036c0 .word 0x800036c0 + 800036d4: 00000000 .word 0x00000000 + 800036d8: 80013a79 .word 0x80013a79 + 800036dc: 00000000 .word 0x00000000 + 800036e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0xfffffffffffffffe + 800036e4: 0004b903 ld x18,0(x9) + 800036e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5555555555555555 + 800036ec: 0004b683 ld x13,0(x9) + 800036f0: 00848493 addi x9,x9,8 + +00000000800036f4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + aes64ks2 x24, x18, x13 # perform operation + 800036f4: 7ed90c33 aes64ks2 x24,x18,x13 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036f8: 00063203 ld x4,0(x12) + 800036fc: 01820c63 beq x4,x24,80003714 + 80003700: 600042ef jal x5,80007d00 + 80003704: 800036f4 .word 0x800036f4 + 80003708: 00000000 .word 0x00000000 + 8000370c: 80013aec .word 0x80013aec + 80003710: 00000000 .word 0x00000000 + 80003714: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xfffffffffffffffe + 80003718: 0004b383 ld x7,0(x9) + 8000371c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x00000000ffffffff + 80003720: 0004bc03 ld x24,0(x9) + 80003724: 00848493 addi x9,x9,8 + +0000000080003728 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + aes64ks2 x1, x7, x24 # perform operation + 80003728: 7f8380b3 aes64ks2 x1,x7,x24 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 8000372c: 00063203 ld x4,0(x12) + 80003730: 00120c63 beq x4,x1,80003748 + 80003734: 5cc042ef jal x5,80007d00 + 80003738: 80003728 .word 0x80003728 + 8000373c: 00000000 .word 0x00000000 + 80003740: 80013b5f .word 0x80013b5f + 80003744: 00000000 .word 0x00000000 + 80003748: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0xfffffffffffffffe + 8000374c: 0004b803 ld x16,0(x9) + 80003750: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x00000000fffffffe + 80003754: 0004be83 ld x29,0(x9) + 80003758: 00848493 addi x9,x9,8 + +000000008000375c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + aes64ks2 x13, x16, x29 # perform operation + 8000375c: 7fd806b3 aes64ks2 x13,x16,x29 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003760: 00063203 ld x4,0(x12) + 80003764: 00d20c63 beq x4,x13,8000377c + 80003768: 598042ef jal x5,80007d00 + 8000376c: 8000375c .word 0x8000375c + 80003770: 00000000 .word 0x00000000 + 80003774: 80013bca .word 0x80013bca + 80003778: 00000000 .word 0x00000000 + 8000377c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xfffffffffffffffe + 80003780: 0004b383 ld x7,0(x9) + 80003784: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x0000000100000000 + 80003788: 0004bb03 ld x22,0(x9) + 8000378c: 00848493 addi x9,x9,8 + +0000000080003790 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + aes64ks2 x21, x7, x22 # perform operation + 80003790: 7f638ab3 aes64ks2 x21,x7,x22 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003794: 00063203 ld x4,0(x12) + 80003798: 01520c63 beq x4,x21,800037b0 + 8000379c: 564042ef jal x5,80007d00 + 800037a0: 80003790 .word 0x80003790 + 800037a4: 00000000 .word 0x00000000 + 800037a8: 80013c35 .word 0x80013c35 + 800037ac: 00000000 .word 0x00000000 + 800037b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xfffffffffffffffe + 800037b4: 0004bc83 ld x25,0(x9) + 800037b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000001 + 800037bc: 0004b803 ld x16,0(x9) + 800037c0: 00848493 addi x9,x9,8 + +00000000800037c4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + aes64ks2 x15, x25, x16 # perform operation + 800037c4: 7f0c87b3 aes64ks2 x15,x25,x16 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037c8: 00063203 ld x4,0(x12) + 800037cc: 00f20c63 beq x4,x15,800037e4 + 800037d0: 530042ef jal x5,80007d00 + 800037d4: 800037c4 .word 0x800037c4 + 800037d8: 00000000 .word 0x00000000 + 800037dc: 80013ca1 .word 0x80013ca1 + 800037e0: 00000000 .word 0x00000000 + 800037e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 800037e8: 0004b883 ld x17,0(x9) + 800037ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x0000000000000000 + 800037f0: 0004b903 ld x18,0(x9) + 800037f4: 00848493 addi x9,x9,8 + +00000000800037f8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + aes64ks2 x16, x17, x18 # perform operation + 800037f8: 7f288833 aes64ks2 x16,x17,x18 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037fc: 00063203 ld x4,0(x12) + 80003800: 01020c63 beq x4,x16,80003818 + 80003804: 4fc042ef jal x5,80007d00 + 80003808: 800037f8 .word 0x800037f8 + 8000380c: 00000000 .word 0x00000000 + 80003810: 80013d0d .word 0x80013d0d + 80003814: 00000000 .word 0x00000000 + 80003818: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5bbc887763ae86f2 + 8000381c: 0004ba83 ld x21,0(x9) + 80003820: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000001 + 80003824: 0004b703 ld x14,0(x9) + 80003828: 00848493 addi x9,x9,8 + +000000008000382c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + aes64ks2 x13, x21, x14 # perform operation + 8000382c: 7eea86b3 aes64ks2 x13,x21,x14 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003830: 00063203 ld x4,0(x12) + 80003834: 00d20c63 beq x4,x13,8000384c + 80003838: 4c8042ef jal x5,80007d00 + 8000383c: 8000382c .word 0x8000382c + 80003840: 00000000 .word 0x00000000 + 80003844: 80013d71 .word 0x80013d71 + 80003848: 00000000 .word 0x00000000 + 8000384c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80003850: 0004b303 ld x6,0(x9) + 80003854: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000002 + 80003858: 0004b783 ld x15,0(x9) + 8000385c: 00848493 addi x9,x9,8 + +0000000080003860 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + aes64ks2 x21, x6, x15 # perform operation + 80003860: 7ef30ab3 aes64ks2 x21,x6,x15 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003864: 00063203 ld x4,0(x12) + 80003868: 01520c63 beq x4,x21,80003880 + 8000386c: 494042ef jal x5,80007d00 + 80003870: 80003860 .word 0x80003860 + 80003874: 00000000 .word 0x00000000 + 80003878: 80013dd5 .word 0x80013dd5 + 8000387c: 00000000 .word 0x00000000 + 80003880: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x5bbc887763ae86f2 + 80003884: 0004b103 ld x2,0(x9) + 80003888: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x8000000000000000 + 8000388c: 0004b503 ld x10,0(x9) + 80003890: 00848493 addi x9,x9,8 + +0000000080003894 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + aes64ks2 x29, x2, x10 # perform operation + 80003894: 7ea10eb3 aes64ks2 x29,x2,x10 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 80003898: 00063203 ld x4,0(x12) + 8000389c: 01d20c63 beq x4,x29,800038b4 + 800038a0: 460042ef jal x5,80007d00 + 800038a4: 80003894 .word 0x80003894 + 800038a8: 00000000 .word 0x00000000 + 800038ac: 80013e39 .word 0x80013e39 + 800038b0: 00000000 .word 0x00000000 + 800038b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038b8: 0004b983 ld x19,0(x9) + 800038bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000001 + 800038c0: 0004b783 ld x15,0(x9) + 800038c4: 00848493 addi x9,x9,8 + +00000000800038c8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + aes64ks2 x10, x19, x15 # perform operation + 800038c8: 7ef98533 aes64ks2 x10,x19,x15 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038cc: 00063203 ld x4,0(x12) + 800038d0: 00a20c63 beq x4,x10,800038e8 + 800038d4: 42c042ef jal x5,80007d00 + 800038d8: 800038c8 .word 0x800038c8 + 800038dc: 00000000 .word 0x00000000 + 800038e0: 80013eac .word 0x80013eac + 800038e4: 00000000 .word 0x00000000 + 800038e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 800038ec: 0004b983 ld x19,0(x9) + 800038f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7fffffffffffffff + 800038f4: 0004ba03 ld x20,0(x9) + 800038f8: 00848493 addi x9,x9,8 + +00000000800038fc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + aes64ks2 x16, x19, x20 # perform operation + 800038fc: 7f498833 aes64ks2 x16,x19,x20 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 80003900: 00063203 ld x4,0(x12) + 80003904: 01020c63 beq x4,x16,8000391c + 80003908: 3f8042ef jal x5,80007d00 + 8000390c: 800038fc .word 0x800038fc + 80003910: 00000000 .word 0x00000000 + 80003914: 80013f1f .word 0x80013f1f + 80003918: 00000000 .word 0x00000000 + 8000391c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003920: 0004bc03 ld x24,0(x9) + 80003924: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x7ffffffffffffffe + 80003928: 0004b503 ld x10,0(x9) + 8000392c: 00848493 addi x9,x9,8 + +0000000080003930 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + aes64ks2 x22, x24, x10 # perform operation + 80003930: 7eac0b33 aes64ks2 x22,x24,x10 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003934: 00063203 ld x4,0(x12) + 80003938: 01620c63 beq x4,x22,80003950 + 8000393c: 3c4042ef jal x5,80007d00 + 80003940: 80003930 .word 0x80003930 + 80003944: 00000000 .word 0x00000000 + 80003948: 80013f92 .word 0x80013f92 + 8000394c: 00000000 .word 0x00000000 + 80003950: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 80003954: 0004b903 ld x18,0(x9) + 80003958: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xffffffffffffffff + 8000395c: 0004bf83 ld x31,0(x9) + 80003960: 00848493 addi x9,x9,8 + +0000000080003964 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + aes64ks2 x1, x18, x31 # perform operation + 80003964: 7ff900b3 aes64ks2 x1,x18,x31 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 80003968: 00063203 ld x4,0(x12) + 8000396c: 00120c63 beq x4,x1,80003984 + 80003970: 390042ef jal x5,80007d00 + 80003974: 80003964 .word 0x80003964 + 80003978: 00000000 .word 0x00000000 + 8000397c: 80014005 .word 0x80014005 + 80003980: 00000000 .word 0x00000000 + 80003984: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 80003988: 0004bd03 ld x26,0(x9) + 8000398c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0xfffffffffffffffe + 80003990: 0004b183 ld x3,0(x9) + 80003994: 00848493 addi x9,x9,8 + +0000000080003998 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + aes64ks2 x19, x26, x3 # perform operation + 80003998: 7e3d09b3 aes64ks2 x19,x26,x3 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 8000399c: 00063203 ld x4,0(x12) + 800039a0: 01320c63 beq x4,x19,800039b8 + 800039a4: 35c042ef jal x5,80007d00 + 800039a8: 80003998 .word 0x80003998 + 800039ac: 00000000 .word 0x00000000 + 800039b0: 80014078 .word 0x80014078 + 800039b4: 00000000 .word 0x00000000 + 800039b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 800039bc: 0004be83 ld x29,0(x9) + 800039c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x5bbc887763ae86f2 + 800039c4: 0004be03 ld x28,0(x9) + 800039c8: 00848493 addi x9,x9,8 + +00000000800039cc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + aes64ks2 x23, x29, x28 # perform operation + 800039cc: 7fce8bb3 aes64ks2 x23,x29,x28 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039d0: 00063203 ld x4,0(x12) + 800039d4: 01720c63 beq x4,x23,800039ec + 800039d8: 328042ef jal x5,80007d00 + 800039dc: 800039cc .word 0x800039cc + 800039e0: 00000000 .word 0x00000000 + 800039e4: 800140eb .word 0x800140eb + 800039e8: 00000000 .word 0x00000000 + 800039ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5bbc887763ae86f2 + 800039f0: 0004b583 ld x11,0(x9) + 800039f4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 800039f8: 0004b903 ld x18,0(x9) + 800039fc: 00848493 addi x9,x9,8 + +0000000080003a00 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x1, x11, x18 # perform operation + 80003a00: 7f2580b3 aes64ks2 x1,x11,x18 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003a04: 00063203 ld x4,0(x12) + 80003a08: 00120c63 beq x4,x1,80003a20 + 80003a0c: 2f4042ef jal x5,80007d00 + 80003a10: 80003a00 .word 0x80003a00 + 80003a14: 00000000 .word 0x00000000 + 80003a18: 8001415e .word 0x8001415e + 80003a1c: 00000000 .word 0x00000000 + 80003a20: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003a24: 0004bb03 ld x22,0(x9) + 80003a28: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 80003a2c: 0004bb83 ld x23,0(x9) + 80003a30: 00848493 addi x9,x9,8 + +0000000080003a34 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + aes64ks2 x28, x22, x23 # perform operation + 80003a34: 7f7b0e33 aes64ks2 x28,x22,x23 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a38: 00063203 ld x4,0(x12) + 80003a3c: 01c20c63 beq x4,x28,80003a54 + 80003a40: 2c0042ef jal x5,80007d00 + 80003a44: 80003a34 .word 0x80003a34 + 80003a48: 00000000 .word 0x00000000 + 80003a4c: 800141d1 .word 0x800141d1 + 80003a50: 00000000 .word 0x00000000 + 80003a54: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003a58: 0004b183 ld x3,0(x9) + 80003a5c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x00000000ffffffff + 80003a60: 0004b103 ld x2,0(x9) + 80003a64: 00848493 addi x9,x9,8 + +0000000080003a68 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + aes64ks2 x20, x3, x2 # perform operation + 80003a68: 7e218a33 aes64ks2 x20,x3,x2 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a6c: 00063203 ld x4,0(x12) + 80003a70: 01420c63 beq x4,x20,80003a88 + 80003a74: 28c042ef jal x5,80007d00 + 80003a78: 80003a68 .word 0x80003a68 + 80003a7c: 00000000 .word 0x00000000 + 80003a80: 80014244 .word 0x80014244 + 80003a84: 00000000 .word 0x00000000 + 80003a88: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003a8c: 0004b883 ld x17,0(x9) + 80003a90: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x00000000fffffffe + 80003a94: 0004b783 ld x15,0(x9) + 80003a98: 00848493 addi x9,x9,8 + +0000000080003a9c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + aes64ks2 x1, x17, x15 # perform operation + 80003a9c: 7ef880b3 aes64ks2 x1,x17,x15 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003aa0: 00063203 ld x4,0(x12) + 80003aa4: 00120c63 beq x4,x1,80003abc + 80003aa8: 258042ef jal x5,80007d00 + 80003aac: 80003a9c .word 0x80003a9c + 80003ab0: 00000000 .word 0x00000000 + 80003ab4: 800142af .word 0x800142af + 80003ab8: 00000000 .word 0x00000000 + 80003abc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5bbc887763ae86f2 + 80003ac0: 0004b983 ld x19,0(x9) + 80003ac4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000100000000 + 80003ac8: 0004bf83 ld x31,0(x9) + 80003acc: 00848493 addi x9,x9,8 + +0000000080003ad0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + aes64ks2 x13, x19, x31 # perform operation + 80003ad0: 7ff986b3 aes64ks2 x13,x19,x31 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ad4: 00063203 ld x4,0(x12) + 80003ad8: 00d20c63 beq x4,x13,80003af0 + 80003adc: 224042ef jal x5,80007d00 + 80003ae0: 80003ad0 .word 0x80003ad0 + 80003ae4: 00000000 .word 0x00000000 + 80003ae8: 8001431a .word 0x8001431a + 80003aec: 00000000 .word 0x00000000 + 80003af0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x5bbc887763ae86f2 + 80003af4: 0004bc03 ld x24,0(x9) + 80003af8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x0000000100000001 + 80003afc: 0004b083 ld x1,0(x9) + 80003b00: 00848493 addi x9,x9,8 + +0000000080003b04 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + aes64ks2 x13, x24, x1 # perform operation + 80003b04: 7e1c06b3 aes64ks2 x13,x24,x1 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003b08: 00063203 ld x4,0(x12) + 80003b0c: 00d20c63 beq x4,x13,80003b24 + 80003b10: 1f0042ef jal x5,80007d00 + 80003b14: 80003b04 .word 0x80003b04 + 80003b18: 00000000 .word 0x00000000 + 80003b1c: 80014386 .word 0x80014386 + 80003b20: 00000000 .word 0x00000000 + 80003b24: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b28: 0004b703 ld x14,0(x9) + 80003b2c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 80003b30: 0004b503 ld x10,0(x9) + 80003b34: 00848493 addi x9,x9,8 + +0000000080003b38 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + aes64ks2 x3, x14, x10 # perform operation + 80003b38: 7ea701b3 aes64ks2 x3,x14,x10 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b3c: 00063203 ld x4,0(x12) + 80003b40: 00320c63 beq x4,x3,80003b58 + 80003b44: 1bc042ef jal x5,80007d00 + 80003b48: 80003b38 .word 0x80003b38 + 80003b4c: 00000000 .word 0x00000000 + 80003b50: 800143f2 .word 0x800143f2 + 80003b54: 00000000 .word 0x00000000 + 80003b58: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80003b5c: 0004b703 ld x14,0(x9) + 80003b60: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x0000000000000001 + 80003b64: 0004b783 ld x15,0(x9) + 80003b68: 00848493 addi x9,x9,8 + +0000000080003b6c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + aes64ks2 x30, x14, x15 # perform operation + 80003b6c: 7ef70f33 aes64ks2 x30,x14,x15 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b70: 00063203 ld x4,0(x12) + 80003b74: 01e20c63 beq x4,x30,80003b8c + 80003b78: 188042ef jal x5,80007d00 + 80003b7c: 80003b6c .word 0x80003b6c + 80003b80: 00000000 .word 0x00000000 + 80003b84: 80014456 .word 0x80014456 + 80003b88: 00000000 .word 0x00000000 + 80003b8c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80003b90: 0004bd03 ld x26,0(x9) + 80003b94: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x0000000000000002 + 80003b98: 0004b103 ld x2,0(x9) + 80003b9c: 00848493 addi x9,x9,8 + +0000000080003ba0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + aes64ks2 x3, x26, x2 # perform operation + 80003ba0: 7e2d01b3 aes64ks2 x3,x26,x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003ba4: 00063203 ld x4,0(x12) + 80003ba8: 00320c63 beq x4,x3,80003bc0 + 80003bac: 154042ef jal x5,80007d00 + 80003bb0: 80003ba0 .word 0x80003ba0 + 80003bb4: 00000000 .word 0x00000000 + 80003bb8: 800144ba .word 0x800144ba + 80003bbc: 00000000 .word 0x00000000 + 80003bc0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0xaaaaaaaaaaaaaaaa + 80003bc4: 0004b303 ld x6,0(x9) + 80003bc8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x8000000000000000 + 80003bcc: 0004b103 ld x2,0(x9) + 80003bd0: 00848493 addi x9,x9,8 + +0000000080003bd4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + aes64ks2 x10, x6, x2 # perform operation + 80003bd4: 7e230533 aes64ks2 x10,x6,x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bd8: 00063203 ld x4,0(x12) + 80003bdc: 00a20c63 beq x4,x10,80003bf4 + 80003be0: 120042ef jal x5,80007d00 + 80003be4: 80003bd4 .word 0x80003bd4 + 80003be8: 00000000 .word 0x00000000 + 80003bec: 8001451e .word 0x8001451e + 80003bf0: 00000000 .word 0x00000000 + 80003bf4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003bf8: 0004b083 ld x1,0(x9) + 80003bfc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000001 + 80003c00: 0004b403 ld x8,0(x9) + 80003c04: 00848493 addi x9,x9,8 + +0000000080003c08 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + aes64ks2 x10, x1, x8 # perform operation + 80003c08: 7e808533 aes64ks2 x10,x1,x8 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c0c: 00063203 ld x4,0(x12) + 80003c10: 00a20c63 beq x4,x10,80003c28 + 80003c14: 0ec042ef jal x5,80007d00 + 80003c18: 80003c08 .word 0x80003c08 + 80003c1c: 00000000 .word 0x00000000 + 80003c20: 80014591 .word 0x80014591 + 80003c24: 00000000 .word 0x00000000 + 80003c28: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80003c2c: 0004b103 ld x2,0(x9) + 80003c30: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x7fffffffffffffff + 80003c34: 0004b303 ld x6,0(x9) + 80003c38: 00848493 addi x9,x9,8 + +0000000080003c3c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + aes64ks2 x20, x2, x6 # perform operation + 80003c3c: 7e610a33 aes64ks2 x20,x2,x6 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c40: 00063203 ld x4,0(x12) + 80003c44: 01420c63 beq x4,x20,80003c5c + 80003c48: 0b8042ef jal x5,80007d00 + 80003c4c: 80003c3c .word 0x80003c3c + 80003c50: 00000000 .word 0x00000000 + 80003c54: 80014604 .word 0x80014604 + 80003c58: 00000000 .word 0x00000000 + 80003c5c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003c60: 0004b783 ld x15,0(x9) + 80003c64: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80003c68: 0004be83 ld x29,0(x9) + 80003c6c: 00848493 addi x9,x9,8 + +0000000080003c70 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + aes64ks2 x21, x15, x29 # perform operation + 80003c70: 7fd78ab3 aes64ks2 x21,x15,x29 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c74: 00063203 ld x4,0(x12) + 80003c78: 01520c63 beq x4,x21,80003c90 + 80003c7c: 084042ef jal x5,80007d00 + 80003c80: 80003c70 .word 0x80003c70 + 80003c84: 00000000 .word 0x00000000 + 80003c88: 80014677 .word 0x80014677 + 80003c8c: 00000000 .word 0x00000000 + 80003c90: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80003c94: 0004b583 ld x11,0(x9) + 80003c98: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 80003c9c: 0004bf03 ld x30,0(x9) + 80003ca0: 00848493 addi x9,x9,8 + +0000000080003ca4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + aes64ks2 x20, x11, x30 # perform operation + 80003ca4: 7fe58a33 aes64ks2 x20,x11,x30 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003ca8: 00063203 ld x4,0(x12) + 80003cac: 01420c63 beq x4,x20,80003cc4 + 80003cb0: 050042ef jal x5,80007d00 + 80003cb4: 80003ca4 .word 0x80003ca4 + 80003cb8: 00000000 .word 0x00000000 + 80003cbc: 800146ea .word 0x800146ea + 80003cc0: 00000000 .word 0x00000000 + 80003cc4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003cc8: 0004bb03 ld x22,0(x9) + 80003ccc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0xfffffffffffffffe + 80003cd0: 0004be03 ld x28,0(x9) + 80003cd4: 00848493 addi x9,x9,8 + +0000000080003cd8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + aes64ks2 x20, x22, x28 # perform operation + 80003cd8: 7fcb0a33 aes64ks2 x20,x22,x28 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cdc: 00063203 ld x4,0(x12) + 80003ce0: 01420c63 beq x4,x20,80003cf8 + 80003ce4: 01c042ef jal x5,80007d00 + 80003ce8: 80003cd8 .word 0x80003cd8 + 80003cec: 00000000 .word 0x00000000 + 80003cf0: 8001475d .word 0x8001475d + 80003cf4: 00000000 .word 0x00000000 + 80003cf8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003cfc: 0004ba83 ld x21,0(x9) + 80003d00: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80003d04: 0004b903 ld x18,0(x9) + 80003d08: 00848493 addi x9,x9,8 + +0000000080003d0c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + aes64ks2 x2, x21, x18 # perform operation + 80003d0c: 7f2a8133 aes64ks2 x2,x21,x18 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d10: 00063203 ld x4,0(x12) + 80003d14: 00220c63 beq x4,x2,80003d2c + 80003d18: 7e9032ef jal x5,80007d00 + 80003d1c: 80003d0c .word 0x80003d0c + 80003d20: 00000000 .word 0x00000000 + 80003d24: 800147d0 .word 0x800147d0 + 80003d28: 00000000 .word 0x00000000 + 80003d2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003d30: 0004ba03 ld x20,0(x9) + 80003d34: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 80003d38: 0004b403 ld x8,0(x9) + 80003d3c: 00848493 addi x9,x9,8 + +0000000080003d40 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x17, x20, x8 # perform operation + 80003d40: 7e8a08b3 aes64ks2 x17,x20,x8 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d44: 00063203 ld x4,0(x12) + 80003d48: 01120c63 beq x4,x17,80003d60 + 80003d4c: 7b5032ef jal x5,80007d00 + 80003d50: 80003d40 .word 0x80003d40 + 80003d54: 00000000 .word 0x00000000 + 80003d58: 80014843 .word 0x80014843 + 80003d5c: 00000000 .word 0x00000000 + 80003d60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003d64: 0004bb03 ld x22,0(x9) + 80003d68: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x5555555555555555 + 80003d6c: 0004b703 ld x14,0(x9) + 80003d70: 00848493 addi x9,x9,8 + +0000000080003d74 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + aes64ks2 x29, x22, x14 # perform operation + 80003d74: 7eeb0eb3 aes64ks2 x29,x22,x14 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d78: 00063203 ld x4,0(x12) + 80003d7c: 01d20c63 beq x4,x29,80003d94 + 80003d80: 781032ef jal x5,80007d00 + 80003d84: 80003d74 .word 0x80003d74 + 80003d88: 00000000 .word 0x00000000 + 80003d8c: 800148b6 .word 0x800148b6 + 80003d90: 00000000 .word 0x00000000 + 80003d94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003d98: 0004bf03 ld x30,0(x9) + 80003d9c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x00000000ffffffff + 80003da0: 0004b183 ld x3,0(x9) + 80003da4: 00848493 addi x9,x9,8 + +0000000080003da8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + aes64ks2 x20, x30, x3 # perform operation + 80003da8: 7e3f0a33 aes64ks2 x20,x30,x3 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003dac: 00063203 ld x4,0(x12) + 80003db0: 01420c63 beq x4,x20,80003dc8 + 80003db4: 74d032ef jal x5,80007d00 + 80003db8: 80003da8 .word 0x80003da8 + 80003dbc: 00000000 .word 0x00000000 + 80003dc0: 80014929 .word 0x80014929 + 80003dc4: 00000000 .word 0x00000000 + 80003dc8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003dcc: 0004bf83 ld x31,0(x9) + 80003dd0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x00000000fffffffe + 80003dd4: 0004bc83 ld x25,0(x9) + 80003dd8: 00848493 addi x9,x9,8 + +0000000080003ddc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + aes64ks2 x24, x31, x25 # perform operation + 80003ddc: 7f9f8c33 aes64ks2 x24,x31,x25 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003de0: 00063203 ld x4,0(x12) + 80003de4: 01820c63 beq x4,x24,80003dfc + 80003de8: 719032ef jal x5,80007d00 + 80003dec: 80003ddc .word 0x80003ddc + 80003df0: 00000000 .word 0x00000000 + 80003df4: 80014994 .word 0x80014994 + 80003df8: 00000000 .word 0x00000000 + 80003dfc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xaaaaaaaaaaaaaaaa + 80003e00: 0004ba83 ld x21,0(x9) + 80003e04: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x0000000100000000 + 80003e08: 0004be03 ld x28,0(x9) + 80003e0c: 00848493 addi x9,x9,8 + +0000000080003e10 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + aes64ks2 x19, x21, x28 # perform operation + 80003e10: 7fca89b3 aes64ks2 x19,x21,x28 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e14: 00063203 ld x4,0(x12) + 80003e18: 01320c63 beq x4,x19,80003e30 + 80003e1c: 6e5032ef jal x5,80007d00 + 80003e20: 80003e10 .word 0x80003e10 + 80003e24: 00000000 .word 0x00000000 + 80003e28: 800149ff .word 0x800149ff + 80003e2c: 00000000 .word 0x00000000 + 80003e30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0xaaaaaaaaaaaaaaaa + 80003e34: 0004b883 ld x17,0(x9) + 80003e38: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000100000001 + 80003e3c: 0004be83 ld x29,0(x9) + 80003e40: 00848493 addi x9,x9,8 + +0000000080003e44 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + aes64ks2 x27, x17, x29 # perform operation + 80003e44: 7fd88db3 aes64ks2 x27,x17,x29 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e48: 00063203 ld x4,0(x12) + 80003e4c: 01b20c63 beq x4,x27,80003e64 + 80003e50: 6b1032ef jal x5,80007d00 + 80003e54: 80003e44 .word 0x80003e44 + 80003e58: 00000000 .word 0x00000000 + 80003e5c: 80014a6b .word 0x80014a6b + 80003e60: 00000000 .word 0x00000000 + 80003e64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x5555555555555555 + 80003e68: 0004bf83 ld x31,0(x9) + 80003e6c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000000000000 + 80003e70: 0004b683 ld x13,0(x9) + 80003e74: 00848493 addi x9,x9,8 + +0000000080003e78 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + aes64ks2 x29, x31, x13 # perform operation + 80003e78: 7edf8eb3 aes64ks2 x29,x31,x13 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e7c: 00063203 ld x4,0(x12) + 80003e80: 01d20c63 beq x4,x29,80003e98 + 80003e84: 67d032ef jal x5,80007d00 + 80003e88: 80003e78 .word 0x80003e78 + 80003e8c: 00000000 .word 0x00000000 + 80003e90: 80014ad7 .word 0x80014ad7 + 80003e94: 00000000 .word 0x00000000 + 80003e98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x5555555555555555 + 80003e9c: 0004ba03 ld x20,0(x9) + 80003ea0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000000000001 + 80003ea4: 0004bc83 ld x25,0(x9) + 80003ea8: 00848493 addi x9,x9,8 + +0000000080003eac : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + aes64ks2 x28, x20, x25 # perform operation + 80003eac: 7f9a0e33 aes64ks2 x28,x20,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003eb0: 00063203 ld x4,0(x12) + 80003eb4: 01c20c63 beq x4,x28,80003ecc + 80003eb8: 649032ef jal x5,80007d00 + 80003ebc: 80003eac .word 0x80003eac + 80003ec0: 00000000 .word 0x00000000 + 80003ec4: 80014b3b .word 0x80014b3b + 80003ec8: 00000000 .word 0x00000000 + 80003ecc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x5555555555555555 + 80003ed0: 0004b403 ld x8,0(x9) + 80003ed4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x0000000000000002 + 80003ed8: 0004be83 ld x29,0(x9) + 80003edc: 00848493 addi x9,x9,8 + +0000000080003ee0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + aes64ks2 x28, x8, x29 # perform operation + 80003ee0: 7fd40e33 aes64ks2 x28,x8,x29 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ee4: 00063203 ld x4,0(x12) + 80003ee8: 01c20c63 beq x4,x28,80003f00 + 80003eec: 615032ef jal x5,80007d00 + 80003ef0: 80003ee0 .word 0x80003ee0 + 80003ef4: 00000000 .word 0x00000000 + 80003ef8: 80014b9f .word 0x80014b9f + 80003efc: 00000000 .word 0x00000000 + 80003f00: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5555555555555555 + 80003f04: 0004bb03 ld x22,0(x9) + 80003f08: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x8000000000000000 + 80003f0c: 0004bf83 ld x31,0(x9) + 80003f10: 00848493 addi x9,x9,8 + +0000000080003f14 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + aes64ks2 x23, x22, x31 # perform operation + 80003f14: 7ffb0bb3 aes64ks2 x23,x22,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f18: 00063203 ld x4,0(x12) + 80003f1c: 01720c63 beq x4,x23,80003f34 + 80003f20: 5e1032ef jal x5,80007d00 + 80003f24: 80003f14 .word 0x80003f14 + 80003f28: 00000000 .word 0x00000000 + 80003f2c: 80014c03 .word 0x80014c03 + 80003f30: 00000000 .word 0x00000000 + 80003f34: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x5555555555555555 + 80003f38: 0004bd83 ld x27,0(x9) + 80003f3c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x8000000000000001 + 80003f40: 0004b403 ld x8,0(x9) + 80003f44: 00848493 addi x9,x9,8 + +0000000080003f48 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + aes64ks2 x20, x27, x8 # perform operation + 80003f48: 7e8d8a33 aes64ks2 x20,x27,x8 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f4c: 00063203 ld x4,0(x12) + 80003f50: 01420c63 beq x4,x20,80003f68 + 80003f54: 5ad032ef jal x5,80007d00 + 80003f58: 80003f48 .word 0x80003f48 + 80003f5c: 00000000 .word 0x00000000 + 80003f60: 80014c76 .word 0x80014c76 + 80003f64: 00000000 .word 0x00000000 + 80003f68: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5555555555555555 + 80003f6c: 0004be03 ld x28,0(x9) + 80003f70: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80003f74: 0004b983 ld x19,0(x9) + 80003f78: 00848493 addi x9,x9,8 + +0000000080003f7c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + aes64ks2 x2, x28, x19 # perform operation + 80003f7c: 7f3e0133 aes64ks2 x2,x28,x19 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f80: 00063203 ld x4,0(x12) + 80003f84: 00220c63 beq x4,x2,80003f9c + 80003f88: 579032ef jal x5,80007d00 + 80003f8c: 80003f7c .word 0x80003f7c + 80003f90: 00000000 .word 0x00000000 + 80003f94: 80014ce9 .word 0x80014ce9 + 80003f98: 00000000 .word 0x00000000 + 80003f9c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x5555555555555555 + 80003fa0: 0004bb03 ld x22,0(x9) + 80003fa4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80003fa8: 0004ba03 ld x20,0(x9) + 80003fac: 00848493 addi x9,x9,8 + +0000000080003fb0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + aes64ks2 x24, x22, x20 # perform operation + 80003fb0: 7f4b0c33 aes64ks2 x24,x22,x20 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fb4: 00063203 ld x4,0(x12) + 80003fb8: 01820c63 beq x4,x24,80003fd0 + 80003fbc: 545032ef jal x5,80007d00 + 80003fc0: 80003fb0 .word 0x80003fb0 + 80003fc4: 00000000 .word 0x00000000 + 80003fc8: 80014d5c .word 0x80014d5c + 80003fcc: 00000000 .word 0x00000000 + 80003fd0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5555555555555555 + 80003fd4: 0004b583 ld x11,0(x9) + 80003fd8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0xffffffffffffffff + 80003fdc: 0004bf03 ld x30,0(x9) + 80003fe0: 00848493 addi x9,x9,8 + +0000000080003fe4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + aes64ks2 x2, x11, x30 # perform operation + 80003fe4: 7fe58133 aes64ks2 x2,x11,x30 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fe8: 00063203 ld x4,0(x12) + 80003fec: 00220c63 beq x4,x2,80004004 + 80003ff0: 511032ef jal x5,80007d00 + 80003ff4: 80003fe4 .word 0x80003fe4 + 80003ff8: 00000000 .word 0x00000000 + 80003ffc: 80014dcf .word 0x80014dcf + 80004000: 00000000 .word 0x00000000 + 80004004: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x5555555555555555 + 80004008: 0004ba83 ld x21,0(x9) + 8000400c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xfffffffffffffffe + 80004010: 0004ba03 ld x20,0(x9) + 80004014: 00848493 addi x9,x9,8 + +0000000080004018 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + aes64ks2 x1, x21, x20 # perform operation + 80004018: 7f4a80b3 aes64ks2 x1,x21,x20 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 8000401c: 00063203 ld x4,0(x12) + 80004020: 00120c63 beq x4,x1,80004038 + 80004024: 4dd032ef jal x5,80007d00 + 80004028: 80004018 .word 0x80004018 + 8000402c: 00000000 .word 0x00000000 + 80004030: 80014e42 .word 0x80014e42 + 80004034: 00000000 .word 0x00000000 + 80004038: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5555555555555555 + 8000403c: 0004b983 ld x19,0(x9) + 80004040: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x5bbc887763ae86f2 + 80004044: 0004b683 ld x13,0(x9) + 80004048: 00848493 addi x9,x9,8 + +000000008000404c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + aes64ks2 x28, x19, x13 # perform operation + 8000404c: 7ed98e33 aes64ks2 x28,x19,x13 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004050: 00063203 ld x4,0(x12) + 80004054: 01c20c63 beq x4,x28,8000406c + 80004058: 4a9032ef jal x5,80007d00 + 8000405c: 8000404c .word 0x8000404c + 80004060: 00000000 .word 0x00000000 + 80004064: 80014eb5 .word 0x80014eb5 + 80004068: 00000000 .word 0x00000000 + 8000406c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x5555555555555555 + 80004070: 0004b383 ld x7,0(x9) + 80004074: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80004078: 0004b983 ld x19,0(x9) + 8000407c: 00848493 addi x9,x9,8 + +0000000080004080 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x31, x7, x19 # perform operation + 80004080: 7f338fb3 aes64ks2 x31,x7,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004084: 00063203 ld x4,0(x12) + 80004088: 01f20c63 beq x4,x31,800040a0 + 8000408c: 475032ef jal x5,80007d00 + 80004090: 80004080 .word 0x80004080 + 80004094: 00000000 .word 0x00000000 + 80004098: 80014f28 .word 0x80014f28 + 8000409c: 00000000 .word 0x00000000 + 800040a0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x5555555555555555 + 800040a4: 0004b983 ld x19,0(x9) + 800040a8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5555555555555555 + 800040ac: 0004bb83 ld x23,0(x9) + 800040b0: 00848493 addi x9,x9,8 + +00000000800040b4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + aes64ks2 x1, x19, x23 # perform operation + 800040b4: 7f7980b3 aes64ks2 x1,x19,x23 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040b8: 00063203 ld x4,0(x12) + 800040bc: 00120c63 beq x4,x1,800040d4 + 800040c0: 441032ef jal x5,80007d00 + 800040c4: 800040b4 .word 0x800040b4 + 800040c8: 00000000 .word 0x00000000 + 800040cc: 80014f9b .word 0x80014f9b + 800040d0: 00000000 .word 0x00000000 + 800040d4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x5555555555555555 + 800040d8: 0004b583 ld x11,0(x9) + 800040dc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x00000000ffffffff + 800040e0: 0004b803 ld x16,0(x9) + 800040e4: 00848493 addi x9,x9,8 + +00000000800040e8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + aes64ks2 x13, x11, x16 # perform operation + 800040e8: 7f0586b3 aes64ks2 x13,x11,x16 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040ec: 00063203 ld x4,0(x12) + 800040f0: 00d20c63 beq x4,x13,80004108 + 800040f4: 40d032ef jal x5,80007d00 + 800040f8: 800040e8 .word 0x800040e8 + 800040fc: 00000000 .word 0x00000000 + 80004100: 8001500e .word 0x8001500e + 80004104: 00000000 .word 0x00000000 + 80004108: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x5555555555555555 + 8000410c: 0004b703 ld x14,0(x9) + 80004110: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x00000000fffffffe + 80004114: 0004ba83 ld x21,0(x9) + 80004118: 00848493 addi x9,x9,8 + +000000008000411c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + aes64ks2 x2, x14, x21 # perform operation + 8000411c: 7f570133 aes64ks2 x2,x14,x21 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004120: 00063203 ld x4,0(x12) + 80004124: 00220c63 beq x4,x2,8000413c + 80004128: 3d9032ef jal x5,80007d00 + 8000412c: 8000411c .word 0x8000411c + 80004130: 00000000 .word 0x00000000 + 80004134: 80015079 .word 0x80015079 + 80004138: 00000000 .word 0x00000000 + 8000413c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs1: x13 = 0x5555555555555555 + 80004140: 0004b683 ld x13,0(x9) + 80004144: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000100000000 + 80004148: 0004b383 ld x7,0(x9) + 8000414c: 00848493 addi x9,x9,8 + +0000000080004150 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + aes64ks2 x2, x13, x7 # perform operation + 80004150: 7e768133 aes64ks2 x2,x13,x7 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004154: 00063203 ld x4,0(x12) + 80004158: 00220c63 beq x4,x2,80004170 + 8000415c: 3a5032ef jal x5,80007d00 + 80004160: 80004150 .word 0x80004150 + 80004164: 00000000 .word 0x00000000 + 80004168: 800150e4 .word 0x800150e4 + 8000416c: 00000000 .word 0x00000000 + 80004170: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x5555555555555555 + 80004174: 0004be03 ld x28,0(x9) + 80004178: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000100000001 + 8000417c: 0004bc83 ld x25,0(x9) + 80004180: 00848493 addi x9,x9,8 + +0000000080004184 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + aes64ks2 x19, x28, x25 # perform operation + 80004184: 7f9e09b3 aes64ks2 x19,x28,x25 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 80004188: 00063203 ld x4,0(x12) + 8000418c: 01320c63 beq x4,x19,800041a4 + 80004190: 371032ef jal x5,80007d00 + 80004194: 80004184 .word 0x80004184 + 80004198: 00000000 .word 0x00000000 + 8000419c: 80015150 .word 0x80015150 + 800041a0: 00000000 .word 0x00000000 + 800041a4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000000ffffffff + 800041a8: 0004b703 ld x14,0(x9) + 800041ac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000000000000 + 800041b0: 0004bf83 ld x31,0(x9) + 800041b4: 00848493 addi x9,x9,8 + +00000000800041b8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + aes64ks2 x30, x14, x31 # perform operation + 800041b8: 7ff70f33 aes64ks2 x30,x14,x31 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041bc: 00063203 ld x4,0(x12) + 800041c0: 01e20c63 beq x4,x30,800041d8 + 800041c4: 33d032ef jal x5,80007d00 + 800041c8: 800041b8 .word 0x800041b8 + 800041cc: 00000000 .word 0x00000000 + 800041d0: 800151bc .word 0x800151bc + 800041d4: 00000000 .word 0x00000000 + 800041d8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 800041dc: 0004b383 ld x7,0(x9) + 800041e0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000001 + 800041e4: 0004b503 ld x10,0(x9) + 800041e8: 00848493 addi x9,x9,8 + +00000000800041ec : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + aes64ks2 x27, x7, x10 # perform operation + 800041ec: 7ea38db3 aes64ks2 x27,x7,x10 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041f0: 00063203 ld x4,0(x12) + 800041f4: 01b20c63 beq x4,x27,8000420c + 800041f8: 309032ef jal x5,80007d00 + 800041fc: 800041ec .word 0x800041ec + 80004200: 00000000 .word 0x00000000 + 80004204: 80015218 .word 0x80015218 + 80004208: 00000000 .word 0x00000000 + 8000420c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x00000000ffffffff + 80004210: 0004b883 ld x17,0(x9) + 80004214: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000002 + 80004218: 0004b703 ld x14,0(x9) + 8000421c: 00848493 addi x9,x9,8 + +0000000080004220 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + aes64ks2 x18, x17, x14 # perform operation + 80004220: 7ee88933 aes64ks2 x18,x17,x14 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004224: 00063203 ld x4,0(x12) + 80004228: 01220c63 beq x4,x18,80004240 + 8000422c: 2d5032ef jal x5,80007d00 + 80004230: 80004220 .word 0x80004220 + 80004234: 00000000 .word 0x00000000 + 80004238: 80015274 .word 0x80015274 + 8000423c: 00000000 .word 0x00000000 + 80004240: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x00000000ffffffff + 80004244: 0004ba03 ld x20,0(x9) + 80004248: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x8000000000000000 + 8000424c: 0004b303 ld x6,0(x9) + 80004250: 00848493 addi x9,x9,8 + +0000000080004254 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + aes64ks2 x26, x20, x6 # perform operation + 80004254: 7e6a0d33 aes64ks2 x26,x20,x6 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 80004258: 00063203 ld x4,0(x12) + 8000425c: 01a20c63 beq x4,x26,80004274 + 80004260: 2a1032ef jal x5,80007d00 + 80004264: 80004254 .word 0x80004254 + 80004268: 00000000 .word 0x00000000 + 8000426c: 800152d0 .word 0x800152d0 + 80004270: 00000000 .word 0x00000000 + 80004274: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x00000000ffffffff + 80004278: 0004b303 ld x6,0(x9) + 8000427c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x8000000000000001 + 80004280: 0004b183 ld x3,0(x9) + 80004284: 00848493 addi x9,x9,8 + +0000000080004288 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + aes64ks2 x22, x6, x3 # perform operation + 80004288: 7e330b33 aes64ks2 x22,x6,x3 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 8000428c: 00063203 ld x4,0(x12) + 80004290: 01620c63 beq x4,x22,800042a8 + 80004294: 26d032ef jal x5,80007d00 + 80004298: 80004288 .word 0x80004288 + 8000429c: 00000000 .word 0x00000000 + 800042a0: 8001533b .word 0x8001533b + 800042a4: 00000000 .word 0x00000000 + 800042a8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x00000000ffffffff + 800042ac: 0004b103 ld x2,0(x9) + 800042b0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x7fffffffffffffff + 800042b4: 0004b183 ld x3,0(x9) + 800042b8: 00848493 addi x9,x9,8 + +00000000800042bc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + aes64ks2 x15, x2, x3 # perform operation + 800042bc: 7e3107b3 aes64ks2 x15,x2,x3 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042c0: 00063203 ld x4,0(x12) + 800042c4: 00f20c63 beq x4,x15,800042dc + 800042c8: 239032ef jal x5,80007d00 + 800042cc: 800042bc .word 0x800042bc + 800042d0: 00000000 .word 0x00000000 + 800042d4: 800153a6 .word 0x800153a6 + 800042d8: 00000000 .word 0x00000000 + 800042dc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x00000000ffffffff + 800042e0: 0004b703 ld x14,0(x9) + 800042e4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x7ffffffffffffffe + 800042e8: 0004bb83 ld x23,0(x9) + 800042ec: 00848493 addi x9,x9,8 + +00000000800042f0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + aes64ks2 x8, x14, x23 # perform operation + 800042f0: 7f770433 aes64ks2 x8,x14,x23 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042f4: 00063203 ld x4,0(x12) + 800042f8: 00820c63 beq x4,x8,80004310 + 800042fc: 205032ef jal x5,80007d00 + 80004300: 800042f0 .word 0x800042f0 + 80004304: 00000000 .word 0x00000000 + 80004308: 80015411 .word 0x80015411 + 8000430c: 00000000 .word 0x00000000 + 80004310: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 80004314: 0004b383 ld x7,0(x9) + 80004318: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xffffffffffffffff + 8000431c: 0004b883 ld x17,0(x9) + 80004320: 00848493 addi x9,x9,8 + +0000000080004324 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + aes64ks2 x10, x7, x17 # perform operation + 80004324: 7f138533 aes64ks2 x10,x7,x17 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 80004328: 00063203 ld x4,0(x12) + 8000432c: 00a20c63 beq x4,x10,80004344 + 80004330: 1d1032ef jal x5,80007d00 + 80004334: 80004324 .word 0x80004324 + 80004338: 00000000 .word 0x00000000 + 8000433c: 8001547c .word 0x8001547c + 80004340: 00000000 .word 0x00000000 + 80004344: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x00000000ffffffff + 80004348: 0004bb83 ld x23,0(x9) + 8000434c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004350: 0004b583 ld x11,0(x9) + 80004354: 00848493 addi x9,x9,8 + +0000000080004358 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + aes64ks2 x15, x23, x11 # perform operation + 80004358: 7ebb87b3 aes64ks2 x15,x23,x11 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 8000435c: 00063203 ld x4,0(x12) + 80004360: 00f20c63 beq x4,x15,80004378 + 80004364: 19d032ef jal x5,80007d00 + 80004368: 80004358 .word 0x80004358 + 8000436c: 00000000 .word 0x00000000 + 80004370: 800154e7 .word 0x800154e7 + 80004374: 00000000 .word 0x00000000 + 80004378: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000ffffffff + 8000437c: 0004bd83 ld x27,0(x9) + 80004380: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80004384: 0004b103 ld x2,0(x9) + 80004388: 00848493 addi x9,x9,8 + +000000008000438c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + aes64ks2 x13, x27, x2 # perform operation + 8000438c: 7e2d86b3 aes64ks2 x13,x27,x2 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004390: 00063203 ld x4,0(x12) + 80004394: 00d20c63 beq x4,x13,800043ac + 80004398: 169032ef jal x5,80007d00 + 8000439c: 8000438c .word 0x8000438c + 800043a0: 00000000 .word 0x00000000 + 800043a4: 80015552 .word 0x80015552 + 800043a8: 00000000 .word 0x00000000 + 800043ac: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x00000000ffffffff + 800043b0: 0004b583 ld x11,0(x9) + 800043b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 800043b8: 0004b303 ld x6,0(x9) + 800043bc: 00848493 addi x9,x9,8 + +00000000800043c0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x22, x11, x6 # perform operation + 800043c0: 7e658b33 aes64ks2 x22,x11,x6 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043c4: 00063203 ld x4,0(x12) + 800043c8: 01620c63 beq x4,x22,800043e0 + 800043cc: 135032ef jal x5,80007d00 + 800043d0: 800043c0 .word 0x800043c0 + 800043d4: 00000000 .word 0x00000000 + 800043d8: 800155bd .word 0x800155bd + 800043dc: 00000000 .word 0x00000000 + 800043e0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000ffffffff + 800043e4: 0004bf83 ld x31,0(x9) + 800043e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x5555555555555555 + 800043ec: 0004b883 ld x17,0(x9) + 800043f0: 00848493 addi x9,x9,8 + +00000000800043f4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + aes64ks2 x26, x31, x17 # perform operation + 800043f4: 7f1f8d33 aes64ks2 x26,x31,x17 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043f8: 00063203 ld x4,0(x12) + 800043fc: 01a20c63 beq x4,x26,80004414 + 80004400: 101032ef jal x5,80007d00 + 80004404: 800043f4 .word 0x800043f4 + 80004408: 00000000 .word 0x00000000 + 8000440c: 80015628 .word 0x80015628 + 80004410: 00000000 .word 0x00000000 + 80004414: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0x00000000ffffffff + 80004418: 0004ba83 ld x21,0(x9) + 8000441c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x00000000ffffffff + 80004420: 0004b383 ld x7,0(x9) + 80004424: 00848493 addi x9,x9,8 + +0000000080004428 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + aes64ks2 x17, x21, x7 # perform operation + 80004428: 7e7a88b3 aes64ks2 x17,x21,x7 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 8000442c: 00063203 ld x4,0(x12) + 80004430: 01120c63 beq x4,x17,80004448 + 80004434: 0cd032ef jal x5,80007d00 + 80004438: 80004428 .word 0x80004428 + 8000443c: 00000000 .word 0x00000000 + 80004440: 80015693 .word 0x80015693 + 80004444: 00000000 .word 0x00000000 + 80004448: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0x00000000ffffffff + 8000444c: 0004b383 ld x7,0(x9) + 80004450: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80004454: 0004bd03 ld x26,0(x9) + 80004458: 00848493 addi x9,x9,8 + +000000008000445c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + aes64ks2 x29, x7, x26 # perform operation + 8000445c: 7fa38eb3 aes64ks2 x29,x7,x26 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004460: 00063203 ld x4,0(x12) + 80004464: 01d20c63 beq x4,x29,8000447c + 80004468: 099032ef jal x5,80007d00 + 8000446c: 8000445c .word 0x8000445c + 80004470: 00000000 .word 0x00000000 + 80004474: 800156f6 .word 0x800156f6 + 80004478: 00000000 .word 0x00000000 + 8000447c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000ffffffff + 80004480: 0004be83 ld x29,0(x9) + 80004484: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0x0000000100000000 + 80004488: 0004b683 ld x13,0(x9) + 8000448c: 00848493 addi x9,x9,8 + +0000000080004490 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + aes64ks2 x6, x29, x13 # perform operation + 80004490: 7ede8333 aes64ks2 x6,x29,x13 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004494: 00063203 ld x4,0(x12) + 80004498: 00620c63 beq x4,x6,800044b0 + 8000449c: 065032ef jal x5,80007d00 + 800044a0: 80004490 .word 0x80004490 + 800044a4: 00000000 .word 0x00000000 + 800044a8: 80015759 .word 0x80015759 + 800044ac: 00000000 .word 0x00000000 + 800044b0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x00000000ffffffff + 800044b4: 0004b083 ld x1,0(x9) + 800044b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000100000001 + 800044bc: 0004b583 ld x11,0(x9) + 800044c0: 00848493 addi x9,x9,8 + +00000000800044c4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + aes64ks2 x23, x1, x11 # perform operation + 800044c4: 7eb08bb3 aes64ks2 x23,x1,x11 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044c8: 00063203 ld x4,0(x12) + 800044cc: 01720c63 beq x4,x23,800044e4 + 800044d0: 031032ef jal x5,80007d00 + 800044d4: 800044c4 .word 0x800044c4 + 800044d8: 00000000 .word 0x00000000 + 800044dc: 800157bd .word 0x800157bd + 800044e0: 00000000 .word 0x00000000 + 800044e4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800044e8: 0004b183 ld x3,0(x9) + 800044ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x0000000000000000 + 800044f0: 0004b503 ld x10,0(x9) + 800044f4: 00848493 addi x9,x9,8 + +00000000800044f8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + aes64ks2 x23, x3, x10 # perform operation + 800044f8: 7ea18bb3 aes64ks2 x23,x3,x10 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044fc: 00063203 ld x4,0(x12) + 80004500: 01720c63 beq x4,x23,80004518 + 80004504: 7fc032ef jal x5,80007d00 + 80004508: 800044f8 .word 0x800044f8 + 8000450c: 00000000 .word 0x00000000 + 80004510: 80015821 .word 0x80015821 + 80004514: 00000000 .word 0x00000000 + 80004518: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x00000000fffffffe + 8000451c: 0004bc03 ld x24,0(x9) + 80004520: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000000000001 + 80004524: 0004bb83 ld x23,0(x9) + 80004528: 00848493 addi x9,x9,8 + +000000008000452c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + aes64ks2 x17, x24, x23 # perform operation + 8000452c: 7f7c08b3 aes64ks2 x17,x24,x23 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004530: 00063203 ld x4,0(x12) + 80004534: 01120c63 beq x4,x17,8000454c + 80004538: 7c8032ef jal x5,80007d00 + 8000453c: 8000452c .word 0x8000452c + 80004540: 00000000 .word 0x00000000 + 80004544: 8001587d .word 0x8001587d + 80004548: 00000000 .word 0x00000000 + 8000454c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 80004550: 0004bd83 ld x27,0(x9) + 80004554: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000000000002 + 80004558: 0004bd03 ld x26,0(x9) + 8000455c: 00848493 addi x9,x9,8 + +0000000080004560 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + aes64ks2 x7, x27, x26 # perform operation + 80004560: 7fad83b3 aes64ks2 x7,x27,x26 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004564: 00063203 ld x4,0(x12) + 80004568: 00720c63 beq x4,x7,80004580 + 8000456c: 794032ef jal x5,80007d00 + 80004570: 80004560 .word 0x80004560 + 80004574: 00000000 .word 0x00000000 + 80004578: 800158d9 .word 0x800158d9 + 8000457c: 00000000 .word 0x00000000 + 80004580: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 80004584: 0004bd83 ld x27,0(x9) + 80004588: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x8000000000000000 + 8000458c: 0004be03 ld x28,0(x9) + 80004590: 00848493 addi x9,x9,8 + +0000000080004594 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + aes64ks2 x8, x27, x28 # perform operation + 80004594: 7fcd8433 aes64ks2 x8,x27,x28 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 80004598: 00063203 ld x4,0(x12) + 8000459c: 00820c63 beq x4,x8,800045b4 + 800045a0: 760032ef jal x5,80007d00 + 800045a4: 80004594 .word 0x80004594 + 800045a8: 00000000 .word 0x00000000 + 800045ac: 80015935 .word 0x80015935 + 800045b0: 00000000 .word 0x00000000 + 800045b4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 800045b8: 0004b183 ld x3,0(x9) + 800045bc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x8000000000000001 + 800045c0: 0004b903 ld x18,0(x9) + 800045c4: 00848493 addi x9,x9,8 + +00000000800045c8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + aes64ks2 x10, x3, x18 # perform operation + 800045c8: 7f218533 aes64ks2 x10,x3,x18 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045cc: 00063203 ld x4,0(x12) + 800045d0: 00a20c63 beq x4,x10,800045e8 + 800045d4: 72c032ef jal x5,80007d00 + 800045d8: 800045c8 .word 0x800045c8 + 800045dc: 00000000 .word 0x00000000 + 800045e0: 800159a0 .word 0x800159a0 + 800045e4: 00000000 .word 0x00000000 + 800045e8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x00000000fffffffe + 800045ec: 0004b403 ld x8,0(x9) + 800045f0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7fffffffffffffff + 800045f4: 0004b083 ld x1,0(x9) + 800045f8: 00848493 addi x9,x9,8 + +00000000800045fc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + aes64ks2 x22, x8, x1 # perform operation + 800045fc: 7e140b33 aes64ks2 x22,x8,x1 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 80004600: 00063203 ld x4,0(x12) + 80004604: 01620c63 beq x4,x22,8000461c + 80004608: 6f8032ef jal x5,80007d00 + 8000460c: 800045fc .word 0x800045fc + 80004610: 00000000 .word 0x00000000 + 80004614: 80015a0b .word 0x80015a0b + 80004618: 00000000 .word 0x00000000 + 8000461c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x00000000fffffffe + 80004620: 0004be83 ld x29,0(x9) + 80004624: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x7ffffffffffffffe + 80004628: 0004b883 ld x17,0(x9) + 8000462c: 00848493 addi x9,x9,8 + +0000000080004630 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + aes64ks2 x11, x29, x17 # perform operation + 80004630: 7f1e85b3 aes64ks2 x11,x29,x17 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004634: 00063203 ld x4,0(x12) + 80004638: 00b20c63 beq x4,x11,80004650 + 8000463c: 6c4032ef jal x5,80007d00 + 80004640: 80004630 .word 0x80004630 + 80004644: 00000000 .word 0x00000000 + 80004648: 80015a76 .word 0x80015a76 + 8000464c: 00000000 .word 0x00000000 + 80004650: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x00000000fffffffe + 80004654: 0004bb03 ld x22,0(x9) + 80004658: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0xffffffffffffffff + 8000465c: 0004b883 ld x17,0(x9) + 80004660: 00848493 addi x9,x9,8 + +0000000080004664 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + aes64ks2 x29, x22, x17 # perform operation + 80004664: 7f1b0eb3 aes64ks2 x29,x22,x17 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 80004668: 00063203 ld x4,0(x12) + 8000466c: 01d20c63 beq x4,x29,80004684 + 80004670: 690032ef jal x5,80007d00 + 80004674: 80004664 .word 0x80004664 + 80004678: 00000000 .word 0x00000000 + 8000467c: 80015ae1 .word 0x80015ae1 + 80004680: 00000000 .word 0x00000000 + 80004684: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x00000000fffffffe + 80004688: 0004b183 ld x3,0(x9) + 8000468c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0xfffffffffffffffe + 80004690: 0004b583 ld x11,0(x9) + 80004694: 00848493 addi x9,x9,8 + +0000000080004698 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + aes64ks2 x26, x3, x11 # perform operation + 80004698: 7eb18d33 aes64ks2 x26,x3,x11 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 8000469c: 00063203 ld x4,0(x12) + 800046a0: 01a20c63 beq x4,x26,800046b8 + 800046a4: 65c032ef jal x5,80007d00 + 800046a8: 80004698 .word 0x80004698 + 800046ac: 00000000 .word 0x00000000 + 800046b0: 80015b4c .word 0x80015b4c + 800046b4: 00000000 .word 0x00000000 + 800046b8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x00000000fffffffe + 800046bc: 0004bd83 ld x27,0(x9) + 800046c0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 800046c4: 0004bb83 ld x23,0(x9) + 800046c8: 00848493 addi x9,x9,8 + +00000000800046cc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + aes64ks2 x11, x27, x23 # perform operation + 800046cc: 7f7d85b3 aes64ks2 x11,x27,x23 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046d0: 00063203 ld x4,0(x12) + 800046d4: 00b20c63 beq x4,x11,800046ec + 800046d8: 628032ef jal x5,80007d00 + 800046dc: 800046cc .word 0x800046cc + 800046e0: 00000000 .word 0x00000000 + 800046e4: 80015bb7 .word 0x80015bb7 + 800046e8: 00000000 .word 0x00000000 + 800046ec: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000fffffffe + 800046f0: 0004b803 ld x16,0(x9) + 800046f4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 800046f8: 0004bc03 ld x24,0(x9) + 800046fc: 00848493 addi x9,x9,8 + +0000000080004700 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x8, x16, x24 # perform operation + 80004700: 7f880433 aes64ks2 x8,x16,x24 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004704: 00063203 ld x4,0(x12) + 80004708: 00820c63 beq x4,x8,80004720 + 8000470c: 5f4032ef jal x5,80007d00 + 80004710: 80004700 .word 0x80004700 + 80004714: 00000000 .word 0x00000000 + 80004718: 80015c22 .word 0x80015c22 + 8000471c: 00000000 .word 0x00000000 + 80004720: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x00000000fffffffe + 80004724: 0004be03 ld x28,0(x9) + 80004728: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs2: x18 = 0x5555555555555555 + 8000472c: 0004b903 ld x18,0(x9) + 80004730: 00848493 addi x9,x9,8 + +0000000080004734 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + aes64ks2 x25, x28, x18 # perform operation + 80004734: 7f2e0cb3 aes64ks2 x25,x28,x18 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 80004738: 00063203 ld x4,0(x12) + 8000473c: 01920c63 beq x4,x25,80004754 + 80004740: 5c0032ef jal x5,80007d00 + 80004744: 80004734 .word 0x80004734 + 80004748: 00000000 .word 0x00000000 + 8000474c: 80015c8d .word 0x80015c8d + 80004750: 00000000 .word 0x00000000 + 80004754: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs1: x16 = 0x00000000fffffffe + 80004758: 0004b803 ld x16,0(x9) + 8000475c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x00000000ffffffff + 80004760: 0004b883 ld x17,0(x9) + 80004764: 00848493 addi x9,x9,8 + +0000000080004768 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + aes64ks2 x28, x16, x17 # perform operation + 80004768: 7f180e33 aes64ks2 x28,x16,x17 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 8000476c: 00063203 ld x4,0(x12) + 80004770: 01c20c63 beq x4,x28,80004788 + 80004774: 58c032ef jal x5,80007d00 + 80004778: 80004768 .word 0x80004768 + 8000477c: 00000000 .word 0x00000000 + 80004780: 80015cf8 .word 0x80015cf8 + 80004784: 00000000 .word 0x00000000 + 80004788: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x00000000fffffffe + 8000478c: 0004b103 ld x2,0(x9) + 80004790: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x00000000fffffffe + 80004794: 0004bf03 ld x30,0(x9) + 80004798: 00848493 addi x9,x9,8 + +000000008000479c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + aes64ks2 x14, x2, x30 # perform operation + 8000479c: 7fe10733 aes64ks2 x14,x2,x30 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 800047a0: 00063203 ld x4,0(x12) + 800047a4: 00e20c63 beq x4,x14,800047bc + 800047a8: 558032ef jal x5,80007d00 + 800047ac: 8000479c .word 0x8000479c + 800047b0: 00000000 .word 0x00000000 + 800047b4: 80015d5b .word 0x80015d5b + 800047b8: 00000000 .word 0x00000000 + 800047bc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x00000000fffffffe + 800047c0: 0004bf83 ld x31,0(x9) + 800047c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x0000000100000000 + 800047c8: 0004b383 ld x7,0(x9) + 800047cc: 00848493 addi x9,x9,8 + +00000000800047d0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + aes64ks2 x28, x31, x7 # perform operation + 800047d0: 7e7f8e33 aes64ks2 x28,x31,x7 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047d4: 00063203 ld x4,0(x12) + 800047d8: 01c20c63 beq x4,x28,800047f0 + 800047dc: 524032ef jal x5,80007d00 + 800047e0: 800047d0 .word 0x800047d0 + 800047e4: 00000000 .word 0x00000000 + 800047e8: 80015dbe .word 0x80015dbe + 800047ec: 00000000 .word 0x00000000 + 800047f0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x00000000fffffffe + 800047f4: 0004b903 ld x18,0(x9) + 800047f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x0000000100000001 + 800047fc: 0004bd03 ld x26,0(x9) + 80004800: 00848493 addi x9,x9,8 + +0000000080004804 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + aes64ks2 x27, x18, x26 # perform operation + 80004804: 7fa90db3 aes64ks2 x27,x18,x26 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 80004808: 00063203 ld x4,0(x12) + 8000480c: 01b20c63 beq x4,x27,80004824 + 80004810: 4f0032ef jal x5,80007d00 + 80004814: 80004804 .word 0x80004804 + 80004818: 00000000 .word 0x00000000 + 8000481c: 80015e22 .word 0x80015e22 + 80004820: 00000000 .word 0x00000000 + 80004824: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000000 + 80004828: 0004bb83 ld x23,0(x9) + 8000482c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0x0000000000000000 + 80004830: 0004ba03 ld x20,0(x9) + 80004834: 00848493 addi x9,x9,8 + +0000000080004838 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + aes64ks2 x24, x23, x20 # perform operation + 80004838: 7f4b8c33 aes64ks2 x24,x23,x20 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 8000483c: 00063203 ld x4,0(x12) + 80004840: 01820c63 beq x4,x24,80004858 + 80004844: 4bc032ef jal x5,80007d00 + 80004848: 80004838 .word 0x80004838 + 8000484c: 00000000 .word 0x00000000 + 80004850: 80015e86 .word 0x80015e86 + 80004854: 00000000 .word 0x00000000 + 80004858: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000000 + 8000485c: 0004b983 ld x19,0(x9) + 80004860: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x0000000000000001 + 80004864: 0004b703 ld x14,0(x9) + 80004868: 00848493 addi x9,x9,8 + +000000008000486c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + aes64ks2 x27, x19, x14 # perform operation + 8000486c: 7ee98db3 aes64ks2 x27,x19,x14 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004870: 00063203 ld x4,0(x12) + 80004874: 01b20c63 beq x4,x27,8000488c + 80004878: 488032ef jal x5,80007d00 + 8000487c: 8000486c .word 0x8000486c + 80004880: 00000000 .word 0x00000000 + 80004884: 80015ee3 .word 0x80015ee3 + 80004888: 00000000 .word 0x00000000 + 8000488c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000100000000 + 80004890: 0004bf03 ld x30,0(x9) + 80004894: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs2: x11 = 0x0000000000000002 + 80004898: 0004b583 ld x11,0(x9) + 8000489c: 00848493 addi x9,x9,8 + +00000000800048a0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + aes64ks2 x18, x30, x11 # perform operation + 800048a0: 7ebf0933 aes64ks2 x18,x30,x11 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 800048a4: 00063203 ld x4,0(x12) + 800048a8: 01220c63 beq x4,x18,800048c0 + 800048ac: 454032ef jal x5,80007d00 + 800048b0: 800048a0 .word 0x800048a0 + 800048b4: 00000000 .word 0x00000000 + 800048b8: 80015f40 .word 0x80015f40 + 800048bc: 00000000 .word 0x00000000 + 800048c0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x0000000100000000 + 800048c4: 0004be03 ld x28,0(x9) + 800048c8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x8000000000000000 + 800048cc: 0004b083 ld x1,0(x9) + 800048d0: 00848493 addi x9,x9,8 + +00000000800048d4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + aes64ks2 x2, x28, x1 # perform operation + 800048d4: 7e1e0133 aes64ks2 x2,x28,x1 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048d8: 00063203 ld x4,0(x12) + 800048dc: 00220c63 beq x4,x2,800048f4 + 800048e0: 420032ef jal x5,80007d00 + 800048e4: 800048d4 .word 0x800048d4 + 800048e8: 00000000 .word 0x00000000 + 800048ec: 80015f9d .word 0x80015f9d + 800048f0: 00000000 .word 0x00000000 + 800048f4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 800048f8: 0004b583 ld x11,0(x9) + 800048fc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x8000000000000001 + 80004900: 0004b783 ld x15,0(x9) + 80004904: 00848493 addi x9,x9,8 + +0000000080004908 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + aes64ks2 x18, x11, x15 # perform operation + 80004908: 7ef58933 aes64ks2 x18,x11,x15 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 8000490c: 00063203 ld x4,0(x12) + 80004910: 01220c63 beq x4,x18,80004928 + 80004914: 3ec032ef jal x5,80007d00 + 80004918: 80004908 .word 0x80004908 + 8000491c: 00000000 .word 0x00000000 + 80004920: 80016009 .word 0x80016009 + 80004924: 00000000 .word 0x00000000 + 80004928: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x0000000100000000 + 8000492c: 0004be83 ld x29,0(x9) + 80004930: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x7fffffffffffffff + 80004934: 0004b983 ld x19,0(x9) + 80004938: 00848493 addi x9,x9,8 + +000000008000493c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + aes64ks2 x31, x29, x19 # perform operation + 8000493c: 7f3e8fb3 aes64ks2 x31,x29,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004940: 00063203 ld x4,0(x12) + 80004944: 01f20c63 beq x4,x31,8000495c + 80004948: 3b8032ef jal x5,80007d00 + 8000494c: 8000493c .word 0x8000493c + 80004950: 00000000 .word 0x00000000 + 80004954: 80016075 .word 0x80016075 + 80004958: 00000000 .word 0x00000000 + 8000495c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0x0000000100000000 + 80004960: 0004bc03 ld x24,0(x9) + 80004964: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80004968: 0004be83 ld x29,0(x9) + 8000496c: 00848493 addi x9,x9,8 + +0000000080004970 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + aes64ks2 x18, x24, x29 # perform operation + 80004970: 7fdc0933 aes64ks2 x18,x24,x29 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004974: 00063203 ld x4,0(x12) + 80004978: 01220c63 beq x4,x18,80004990 + 8000497c: 384032ef jal x5,80007d00 + 80004980: 80004970 .word 0x80004970 + 80004984: 00000000 .word 0x00000000 + 80004988: 800160e1 .word 0x800160e1 + 8000498c: 00000000 .word 0x00000000 + 80004990: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 80004994: 0004b583 ld x11,0(x9) + 80004998: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xffffffffffffffff + 8000499c: 0004b983 ld x19,0(x9) + 800049a0: 00848493 addi x9,x9,8 + +00000000800049a4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + aes64ks2 x7, x11, x19 # perform operation + 800049a4: 7f3583b3 aes64ks2 x7,x11,x19 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 800049a8: 00063203 ld x4,0(x12) + 800049ac: 00720c63 beq x4,x7,800049c4 + 800049b0: 350032ef jal x5,80007d00 + 800049b4: 800049a4 .word 0x800049a4 + 800049b8: 00000000 .word 0x00000000 + 800049bc: 8001614d .word 0x8001614d + 800049c0: 00000000 .word 0x00000000 + 800049c4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000100000000 + 800049c8: 0004b503 ld x10,0(x9) + 800049cc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0xfffffffffffffffe + 800049d0: 0004bc83 ld x25,0(x9) + 800049d4: 00848493 addi x9,x9,8 + +00000000800049d8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + aes64ks2 x6, x10, x25 # perform operation + 800049d8: 7f950333 aes64ks2 x6,x10,x25 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049dc: 00063203 ld x4,0(x12) + 800049e0: 00620c63 beq x4,x6,800049f8 + 800049e4: 31c032ef jal x5,80007d00 + 800049e8: 800049d8 .word 0x800049d8 + 800049ec: 00000000 .word 0x00000000 + 800049f0: 800161b9 .word 0x800161b9 + 800049f4: 00000000 .word 0x00000000 + 800049f8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000000 + 800049fc: 0004b883 ld x17,0(x9) + 80004a00: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80004a04: 0004b783 ld x15,0(x9) + 80004a08: 00848493 addi x9,x9,8 + +0000000080004a0c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + aes64ks2 x7, x17, x15 # perform operation + 80004a0c: 7ef883b3 aes64ks2 x7,x17,x15 + # Check if x7 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x7, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a10: 00063203 ld x4,0(x12) + 80004a14: 00720c63 beq x4,x7,80004a2c + 80004a18: 2e8032ef jal x5,80007d00 + 80004a1c: 80004a0c .word 0x80004a0c + 80004a20: 00000000 .word 0x00000000 + 80004a24: 80016225 .word 0x80016225 + 80004a28: 00000000 .word 0x00000000 + 80004a2c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000000 + 80004a30: 0004b883 ld x17,0(x9) + 80004a34: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 80004a38: 0004b683 ld x13,0(x9) + 80004a3c: 00848493 addi x9,x9,8 + +0000000080004a40 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x11, x17, x13 # perform operation + 80004a40: 7ed885b3 aes64ks2 x11,x17,x13 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a44: 00063203 ld x4,0(x12) + 80004a48: 00b20c63 beq x4,x11,80004a60 + 80004a4c: 2b4032ef jal x5,80007d00 + 80004a50: 80004a40 .word 0x80004a40 + 80004a54: 00000000 .word 0x00000000 + 80004a58: 80016291 .word 0x80016291 + 80004a5c: 00000000 .word 0x00000000 + 80004a60: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000000 + 80004a64: 0004b583 ld x11,0(x9) + 80004a68: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0x5555555555555555 + 80004a6c: 0004b303 ld x6,0(x9) + 80004a70: 00848493 addi x9,x9,8 + +0000000080004a74 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + aes64ks2 x30, x11, x6 # perform operation + 80004a74: 7e658f33 aes64ks2 x30,x11,x6 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a78: 00063203 ld x4,0(x12) + 80004a7c: 01e20c63 beq x4,x30,80004a94 + 80004a80: 280032ef jal x5,80007d00 + 80004a84: 80004a74 .word 0x80004a74 + 80004a88: 00000000 .word 0x00000000 + 80004a8c: 800162fd .word 0x800162fd + 80004a90: 00000000 .word 0x00000000 + 80004a94: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000100000000 + 80004a98: 0004b783 ld x15,0(x9) + 80004a9c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x00000000ffffffff + 80004aa0: 0004b383 ld x7,0(x9) + 80004aa4: 00848493 addi x9,x9,8 + +0000000080004aa8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + aes64ks2 x21, x15, x7 # perform operation + 80004aa8: 7e778ab3 aes64ks2 x21,x15,x7 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aac: 00063203 ld x4,0(x12) + 80004ab0: 01520c63 beq x4,x21,80004ac8 + 80004ab4: 24c032ef jal x5,80007d00 + 80004ab8: 80004aa8 .word 0x80004aa8 + 80004abc: 00000000 .word 0x00000000 + 80004ac0: 80016369 .word 0x80016369 + 80004ac4: 00000000 .word 0x00000000 + 80004ac8: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0x0000000100000000 + 80004acc: 0004bb03 ld x22,0(x9) + 80004ad0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x00000000fffffffe + 80004ad4: 0004be03 ld x28,0(x9) + 80004ad8: 00848493 addi x9,x9,8 + +0000000080004adc : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + aes64ks2 x19, x22, x28 # perform operation + 80004adc: 7fcb09b3 aes64ks2 x19,x22,x28 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ae0: 00063203 ld x4,0(x12) + 80004ae4: 01320c63 beq x4,x19,80004afc + 80004ae8: 218032ef jal x5,80007d00 + 80004aec: 80004adc .word 0x80004adc + 80004af0: 00000000 .word 0x00000000 + 80004af4: 800163cd .word 0x800163cd + 80004af8: 00000000 .word 0x00000000 + 80004afc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x0000000100000000 + 80004b00: 0004bf03 ld x30,0(x9) + 80004b04: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x0000000100000000 + 80004b08: 0004bb83 ld x23,0(x9) + 80004b0c: 00848493 addi x9,x9,8 + +0000000080004b10 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + aes64ks2 x14, x30, x23 # perform operation + 80004b10: 7f7f0733 aes64ks2 x14,x30,x23 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b14: 00063203 ld x4,0(x12) + 80004b18: 00e20c63 beq x4,x14,80004b30 + 80004b1c: 1e4032ef jal x5,80007d00 + 80004b20: 80004b10 .word 0x80004b10 + 80004b24: 00000000 .word 0x00000000 + 80004b28: 80016431 .word 0x80016431 + 80004b2c: 00000000 .word 0x00000000 + 80004b30: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x0000000100000000 + 80004b34: 0004b303 ld x6,0(x9) + 80004b38: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x0000000100000001 + 80004b3c: 0004bf83 ld x31,0(x9) + 80004b40: 00848493 addi x9,x9,8 + +0000000080004b44 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + aes64ks2 x22, x6, x31 # perform operation + 80004b44: 7ff30b33 aes64ks2 x22,x6,x31 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b48: 00063203 ld x4,0(x12) + 80004b4c: 01620c63 beq x4,x22,80004b64 + 80004b50: 1b0032ef jal x5,80007d00 + 80004b54: 80004b44 .word 0x80004b44 + 80004b58: 00000000 .word 0x00000000 + 80004b5c: 80016496 .word 0x80016496 + 80004b60: 00000000 .word 0x00000000 + 80004b64: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000001 + 80004b68: 0004bb83 ld x23,0(x9) + 80004b6c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x0000000000000000 + 80004b70: 0004ba83 ld x21,0(x9) + 80004b74: 00848493 addi x9,x9,8 + +0000000080004b78 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + aes64ks2 x28, x23, x21 # perform operation + 80004b78: 7f5b8e33 aes64ks2 x28,x23,x21 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b7c: 00063203 ld x4,0(x12) + 80004b80: 01c20c63 beq x4,x28,80004b98 + 80004b84: 17c032ef jal x5,80007d00 + 80004b88: 80004b78 .word 0x80004b78 + 80004b8c: 00000000 .word 0x00000000 + 80004b90: 800164fb .word 0x800164fb + 80004b94: 00000000 .word 0x00000000 + 80004b98: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x0000000100000001 + 80004b9c: 0004bb83 ld x23,0(x9) + 80004ba0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0x0000000000000001 + 80004ba4: 0004b983 ld x19,0(x9) + 80004ba8: 00848493 addi x9,x9,8 + +0000000080004bac : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + aes64ks2 x15, x23, x19 # perform operation + 80004bac: 7f3b87b3 aes64ks2 x15,x23,x19 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004bb0: 00063203 ld x4,0(x12) + 80004bb4: 00f20c63 beq x4,x15,80004bcc + 80004bb8: 148032ef jal x5,80007d00 + 80004bbc: 80004bac .word 0x80004bac + 80004bc0: 00000000 .word 0x00000000 + 80004bc4: 80016558 .word 0x80016558 + 80004bc8: 00000000 .word 0x00000000 + 80004bcc: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0x0000000100000001 + 80004bd0: 0004b103 ld x2,0(x9) + 80004bd4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x0000000000000002 + 80004bd8: 0004bc03 ld x24,0(x9) + 80004bdc: 00848493 addi x9,x9,8 + +0000000080004be0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + aes64ks2 x11, x2, x24 # perform operation + 80004be0: 7f8105b3 aes64ks2 x11,x2,x24 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004be4: 00063203 ld x4,0(x12) + 80004be8: 00b20c63 beq x4,x11,80004c00 + 80004bec: 114032ef jal x5,80007d00 + 80004bf0: 80004be0 .word 0x80004be0 + 80004bf4: 00000000 .word 0x00000000 + 80004bf8: 800165b5 .word 0x800165b5 + 80004bfc: 00000000 .word 0x00000000 + 80004c00: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x0000000100000001 + 80004c04: 0004bf83 ld x31,0(x9) + 80004c08: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs2: x17 = 0x8000000000000000 + 80004c0c: 0004b883 ld x17,0(x9) + 80004c10: 00848493 addi x9,x9,8 + +0000000080004c14 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + aes64ks2 x14, x31, x17 # perform operation + 80004c14: 7f1f8733 aes64ks2 x14,x31,x17 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c18: 00063203 ld x4,0(x12) + 80004c1c: 00e20c63 beq x4,x14,80004c34 + 80004c20: 0e0032ef jal x5,80007d00 + 80004c24: 80004c14 .word 0x80004c14 + 80004c28: 00000000 .word 0x00000000 + 80004c2c: 80016612 .word 0x80016612 + 80004c30: 00000000 .word 0x00000000 + 80004c34: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000001 + 80004c38: 0004b883 ld x17,0(x9) + 80004c3c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs2: x10 = 0x8000000000000001 + 80004c40: 0004b503 ld x10,0(x9) + 80004c44: 00848493 addi x9,x9,8 + +0000000080004c48 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + aes64ks2 x16, x17, x10 # perform operation + 80004c48: 7ea88833 aes64ks2 x16,x17,x10 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c4c: 00063203 ld x4,0(x12) + 80004c50: 01020c63 beq x4,x16,80004c68 + 80004c54: 0ac032ef jal x5,80007d00 + 80004c58: 80004c48 .word 0x80004c48 + 80004c5c: 00000000 .word 0x00000000 + 80004c60: 8001667e .word 0x8001667e + 80004c64: 00000000 .word 0x00000000 + 80004c68: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x0000000100000001 + 80004c6c: 0004b403 ld x8,0(x9) + 80004c70: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs2: x14 = 0x7fffffffffffffff + 80004c74: 0004b703 ld x14,0(x9) + 80004c78: 00848493 addi x9,x9,8 + +0000000080004c7c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + aes64ks2 x1, x8, x14 # perform operation + 80004c7c: 7ee400b3 aes64ks2 x1,x8,x14 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c80: 00063203 ld x4,0(x12) + 80004c84: 00120c63 beq x4,x1,80004c9c + 80004c88: 078032ef jal x5,80007d00 + 80004c8c: 80004c7c .word 0x80004c7c + 80004c90: 00000000 .word 0x00000000 + 80004c94: 800166ea .word 0x800166ea + 80004c98: 00000000 .word 0x00000000 + 80004c9c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x15) # load rs1: x15 = 0x0000000100000001 + 80004ca0: 0004b783 ld x15,0(x9) + 80004ca4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80004ca8: 0004b083 ld x1,0(x9) + 80004cac: 00848493 addi x9,x9,8 + +0000000080004cb0 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + aes64ks2 x30, x15, x1 # perform operation + 80004cb0: 7e178f33 aes64ks2 x30,x15,x1 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004cb4: 00063203 ld x4,0(x12) + 80004cb8: 01e20c63 beq x4,x30,80004cd0 + 80004cbc: 044032ef jal x5,80007d00 + 80004cc0: 80004cb0 .word 0x80004cb0 + 80004cc4: 00000000 .word 0x00000000 + 80004cc8: 80016756 .word 0x80016756 + 80004ccc: 00000000 .word 0x00000000 + 80004cd0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000001 + 80004cd4: 0004b583 ld x11,0(x9) + 80004cd8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xffffffffffffffff + 80004cdc: 0004b303 ld x6,0(x9) + 80004ce0: 00848493 addi x9,x9,8 + +0000000080004ce4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + aes64ks2 x14, x11, x6 # perform operation + 80004ce4: 7e658733 aes64ks2 x14,x11,x6 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004ce8: 00063203 ld x4,0(x12) + 80004cec: 00e20c63 beq x4,x14,80004d04 + 80004cf0: 010032ef jal x5,80007d00 + 80004cf4: 80004ce4 .word 0x80004ce4 + 80004cf8: 00000000 .word 0x00000000 + 80004cfc: 800167c2 .word 0x800167c2 + 80004d00: 00000000 .word 0x00000000 + 80004d04: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x18) # load rs1: x18 = 0x0000000100000001 + 80004d08: 0004b903 ld x18,0(x9) + 80004d0c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xfffffffffffffffe + 80004d10: 0004be83 ld x29,0(x9) + 80004d14: 00848493 addi x9,x9,8 + +0000000080004d18 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + aes64ks2 x8, x18, x29 # perform operation + 80004d18: 7fd90433 aes64ks2 x8,x18,x29 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d1c: 00063203 ld x4,0(x12) + 80004d20: 00820c63 beq x4,x8,80004d38 + 80004d24: 7dd022ef jal x5,80007d00 + 80004d28: 80004d18 .word 0x80004d18 + 80004d2c: 00000000 .word 0x00000000 + 80004d30: 8001682e .word 0x8001682e + 80004d34: 00000000 .word 0x00000000 + 80004d38: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x9, x10) # load rs1: x10 = 0x0000000100000001 + 80004d3c: 0004b503 ld x10,0(x9) + 80004d40: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x5bbc887763ae86f2 + 80004d44: 0004b383 ld x7,0(x9) + 80004d48: 00848493 addi x9,x9,8 + +0000000080004d4c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + aes64ks2 x6, x10, x7 # perform operation + 80004d4c: 7e750333 aes64ks2 x6,x10,x7 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d50: 00063203 ld x4,0(x12) + 80004d54: 00620c63 beq x4,x6,80004d6c + 80004d58: 7a9022ef jal x5,80007d00 + 80004d5c: 80004d4c .word 0x80004d4c + 80004d60: 00000000 .word 0x00000000 + 80004d64: 8001689a .word 0x8001689a + 80004d68: 00000000 .word 0x00000000 + 80004d6c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000001 + 80004d70: 0004b983 ld x19,0(x9) + 80004d74: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80004d78: 0004be83 ld x29,0(x9) + 80004d7c: 00848493 addi x9,x9,8 + +0000000080004d80 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + aes64ks2 x14, x19, x29 # perform operation + 80004d80: 7fd98733 aes64ks2 x14,x19,x29 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d84: 00063203 ld x4,0(x12) + 80004d88: 00e20c63 beq x4,x14,80004da0 + 80004d8c: 775022ef jal x5,80007d00 + 80004d90: 80004d80 .word 0x80004d80 + 80004d94: 00000000 .word 0x00000000 + 80004d98: 80016906 .word 0x80016906 + 80004d9c: 00000000 .word 0x00000000 + 80004da0: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x9, x11) # load rs1: x11 = 0x0000000100000001 + 80004da4: 0004b583 ld x11,0(x9) + 80004da8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0x5555555555555555 + 80004dac: 0004bf83 ld x31,0(x9) + 80004db0: 00848493 addi x9,x9,8 + +0000000080004db4 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + aes64ks2 x23, x11, x31 # perform operation + 80004db4: 7ff58bb3 aes64ks2 x23,x11,x31 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004db8: 00063203 ld x4,0(x12) + 80004dbc: 01720c63 beq x4,x23,80004dd4 + 80004dc0: 741022ef jal x5,80007d00 + 80004dc4: 80004db4 .word 0x80004db4 + 80004dc8: 00000000 .word 0x00000000 + 80004dcc: 80016972 .word 0x80016972 + 80004dd0: 00000000 .word 0x00000000 + 80004dd4: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x0000000100000001 + 80004dd8: 0004b303 ld x6,0(x9) + 80004ddc: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x00000000ffffffff + 80004de0: 0004b403 ld x8,0(x9) + 80004de4: 00848493 addi x9,x9,8 + +0000000080004de8 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + aes64ks2 x10, x6, x8 # perform operation + 80004de8: 7e830533 aes64ks2 x10,x6,x8 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004dec: 00063203 ld x4,0(x12) + 80004df0: 00a20c63 beq x4,x10,80004e08 + 80004df4: 70d022ef jal x5,80007d00 + 80004df8: 80004de8 .word 0x80004de8 + 80004dfc: 00000000 .word 0x00000000 + 80004e00: 800169de .word 0x800169de + 80004e04: 00000000 .word 0x00000000 + 80004e08: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x9, x17) # load rs1: x17 = 0x0000000100000001 + 80004e0c: 0004b883 ld x17,0(x9) + 80004e10: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0x00000000fffffffe + 80004e14: 0004bd03 ld x26,0(x9) + 80004e18: 00848493 addi x9,x9,8 + +0000000080004e1c : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + aes64ks2 x21, x17, x26 # perform operation + 80004e1c: 7fa88ab3 aes64ks2 x21,x17,x26 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e20: 00063203 ld x4,0(x12) + 80004e24: 01520c63 beq x4,x21,80004e3c + 80004e28: 6d9022ef jal x5,80007d00 + 80004e2c: 80004e1c .word 0x80004e1c + 80004e30: 00000000 .word 0x00000000 + 80004e34: 80016a42 .word 0x80016a42 + 80004e38: 00000000 .word 0x00000000 + 80004e3c: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x0000000100000001 + 80004e40: 0004b983 ld x19,0(x9) + 80004e44: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x16) # load rs2: x16 = 0x0000000100000000 + 80004e48: 0004b803 ld x16,0(x9) + 80004e4c: 00848493 addi x9,x9,8 + +0000000080004e50 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + aes64ks2 x17, x19, x16 # perform operation + 80004e50: 7f0988b3 aes64ks2 x17,x19,x16 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e54: 00063203 ld x4,0(x12) + 80004e58: 01120c63 beq x4,x17,80004e70 + 80004e5c: 6a5022ef jal x5,80007d00 + 80004e60: 80004e50 .word 0x80004e50 + 80004e64: 00000000 .word 0x00000000 + 80004e68: 80016aa6 .word 0x80016aa6 + 80004e6c: 00000000 .word 0x00000000 + 80004e70: 00860613 addi x12,x12,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x9, x14) # load rs1: x14 = 0x0000000100000001 + 80004e74: 0004b703 ld x14,0(x9) + 80004e78: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x0000000100000001 + 80004e7c: 0004bc83 ld x25,0(x9) + 80004e80: 00848493 addi x9,x9,8 + +0000000080004e84 : +Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + aes64ks2 x10, x14, x25 # perform operation + 80004e84: 7f970533 aes64ks2 x10,x14,x25 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zkne_aes64ks2_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e88: 00063203 ld x4,0(x12) + 80004e8c: 00a20c63 beq x4,x10,80004ea4 + 80004e90: 671022ef jal x5,80007d00 + 80004e94: 80004e84 .word 0x80004e84 + 80004e98: 00000000 .word 0x00000000 + 80004e9c: 80016b0b .word 0x80016b0b + 80004ea0: 00000000 .word 0x00000000 + 80004ea4: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs1: x0 = 0xbcded3641d0c3b8a + 80004ea8: 0004b003 ld x0,0(x9) + 80004eac: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x0) # load rs2: x0 = 0x5480ff2117a2832b + 80004eb0: 0004b003 ld x0,0(x9) + 80004eb4: 00848493 addi x9,x9,8 + +0000000080004eb8 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b0: + aes64ks2 x18, x0, x0 # perform operation + 80004eb8: 7e000933 aes64ks2 x18,x0,x0 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zkne_aes64ks2_cg_cmp_rs1_rs2_b0, Zkne_aes64ks2_cg_cmp_rs1_rs2_b0_str) + 80004ebc: 00063203 ld x4,0(x12) + 80004ec0: 01220c63 beq x4,x18,80004ed8 + 80004ec4: 63d022ef jal x5,80007d00 + 80004ec8: 80004eb8 .word 0x80004eb8 + 80004ecc: 00000000 .word 0x00000000 + 80004ed0: 80016b70 .word 0x80016b70 + 80004ed4: 00000000 .word 0x00000000 + 80004ed8: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs1: x1 = 0x77e5ffe2b0baae74 + 80004edc: 0004b083 ld x1,0(x9) + 80004ee0: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x1) # load rs2: x1 = 0x8167fb0e796fdeb0 + 80004ee4: 0004b083 ld x1,0(x9) + 80004ee8: 00848493 addi x9,x9,8 + +0000000080004eec : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b1: + aes64ks2 x16, x1, x1 # perform operation + 80004eec: 7e108833 aes64ks2 x16,x1,x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zkne_aes64ks2_cg_cmp_rs1_rs2_b1, Zkne_aes64ks2_cg_cmp_rs1_rs2_b1_str) + 80004ef0: 00063203 ld x4,0(x12) + 80004ef4: 01020c63 beq x4,x16,80004f0c + 80004ef8: 609022ef jal x5,80007d00 + 80004efc: 80004eec .word 0x80004eec + 80004f00: 00000000 .word 0x00000000 + 80004f04: 80016bac .word 0x80016bac + 80004f08: 00000000 .word 0x00000000 + 80004f0c: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs1: x2 = 0xdda4bdafb9d56048 + 80004f10: 0004b103 ld x2,0(x9) + 80004f14: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x2) # load rs2: x2 = 0xc442c971ae00c8b8 + 80004f18: 0004b103 ld x2,0(x9) + 80004f1c: 00848493 addi x9,x9,8 + +0000000080004f20 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b2: + aes64ks2 x13, x2, x2 # perform operation + 80004f20: 7e2106b3 aes64ks2 x13,x2,x2 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zkne_aes64ks2_cg_cmp_rs1_rs2_b2, Zkne_aes64ks2_cg_cmp_rs1_rs2_b2_str) + 80004f24: 00063203 ld x4,0(x12) + 80004f28: 00d20c63 beq x4,x13,80004f40 + 80004f2c: 5d5022ef jal x5,80007d00 + 80004f30: 80004f20 .word 0x80004f20 + 80004f34: 00000000 .word 0x00000000 + 80004f38: 80016be8 .word 0x80016be8 + 80004f3c: 00000000 .word 0x00000000 + 80004f40: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0xb6f5f7b3ad5acd30 + 80004f44: 0004b183 ld x3,0(x9) + 80004f48: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs2: x3 = 0x06de1f6643e8898a + 80004f4c: 0004b183 ld x3,0(x9) + 80004f50: 00848493 addi x9,x9,8 + +0000000080004f54 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b3: + aes64ks2 x26, x3, x3 # perform operation + 80004f54: 7e318d33 aes64ks2 x26,x3,x3 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zkne_aes64ks2_cg_cmp_rs1_rs2_b3, Zkne_aes64ks2_cg_cmp_rs1_rs2_b3_str) + 80004f58: 00063203 ld x4,0(x12) + 80004f5c: 01a20c63 beq x4,x26,80004f74 + 80004f60: 5a1022ef jal x5,80007d00 + 80004f64: 80004f54 .word 0x80004f54 + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 80016c24 .word 0x80016c24 + 80004f70: 00000000 .word 0x00000000 + 80004f74: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80004f78: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80004f7c: 00028413 addi x8,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0xeeda3778d435ce8d + 80004f80: 0004b203 ld x4,0(x9) + 80004f84: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs2: x4 = 0x6220b01975b244b6 + 80004f88: 0004b203 ld x4,0(x9) + 80004f8c: 00848493 addi x9,x9,8 + +0000000080004f90 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b4: + aes64ks2 x29, x4, x4 # perform operation + 80004f90: 7e420eb3 aes64ks2 x29,x4,x4 + # Check if x29 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x29, Zkne_aes64ks2_cg_cmp_rs1_rs2_b4, Zkne_aes64ks2_cg_cmp_rs1_rs2_b4_str) + 80004f94: 00063383 ld x7,0(x12) + 80004f98: 01d38c63 beq x7,x29,80004fb0 + 80004f9c: 57d0246f jal x8,80007d18 + 80004fa0: 80004f90 .word 0x80004f90 + 80004fa4: 00000000 .word 0x00000000 + 80004fa8: 80016c60 .word 0x80016c60 + 80004fac: 00000000 .word 0x00000000 + 80004fb0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0xcc2a544a520b67df + 80004fb4: 0004b283 ld x5,0(x9) + 80004fb8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs2: x5 = 0x7450311384de2873 + 80004fbc: 0004b283 ld x5,0(x9) + 80004fc0: 00848493 addi x9,x9,8 + +0000000080004fc4 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b5: + aes64ks2 x30, x5, x5 # perform operation + 80004fc4: 7e528f33 aes64ks2 x30,x5,x5 + # Check if x30 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x30, Zkne_aes64ks2_cg_cmp_rs1_rs2_b5, Zkne_aes64ks2_cg_cmp_rs1_rs2_b5_str) + 80004fc8: 00063383 ld x7,0(x12) + 80004fcc: 01e38c63 beq x7,x30,80004fe4 + 80004fd0: 5490246f jal x8,80007d18 + 80004fd4: 80004fc4 .word 0x80004fc4 + 80004fd8: 00000000 .word 0x00000000 + 80004fdc: 80016c9c .word 0x80016c9c + 80004fe0: 00000000 .word 0x00000000 + 80004fe4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x6ea802ea32d0437c + 80004fe8: 0004b303 ld x6,0(x9) + 80004fec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs2: x6 = 0xc2f35a1a2b9f9162 + 80004ff0: 0004b303 ld x6,0(x9) + 80004ff4: 00848493 addi x9,x9,8 + +0000000080004ff8 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b6: + aes64ks2 x16, x6, x6 # perform operation + 80004ff8: 7e630833 aes64ks2 x16,x6,x6 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zkne_aes64ks2_cg_cmp_rs1_rs2_b6, Zkne_aes64ks2_cg_cmp_rs1_rs2_b6_str) + 80004ffc: 00063383 ld x7,0(x12) + 80005000: 01038c63 beq x7,x16,80005018 + 80005004: 5150246f jal x8,80007d18 + 80005008: 80004ff8 .word 0x80004ff8 + 8000500c: 00000000 .word 0x00000000 + 80005010: 80016cd8 .word 0x80016cd8 + 80005014: 00000000 .word 0x00000000 + 80005018: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000501c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005020: 00040713 addi x14,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xbb906de45d0cd0d9 + 80005024: 0004b383 ld x7,0(x9) + 80005028: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs2: x7 = 0x6d4eb6d23071aea0 + 8000502c: 0004b383 ld x7,0(x9) + 80005030: 00848493 addi x9,x9,8 + +0000000080005034 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b7: + aes64ks2 x8, x7, x7 # perform operation + 80005034: 7e738433 aes64ks2 x8,x7,x7 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zkne_aes64ks2_cg_cmp_rs1_rs2_b7, Zkne_aes64ks2_cg_cmp_rs1_rs2_b7_str) + 80005038: 00063683 ld x13,0(x12) + 8000503c: 00868c63 beq x13,x8,80005054 + 80005040: 5010276f jal x14,80007d40 + 80005044: 80005034 .word 0x80005034 + 80005048: 00000000 .word 0x00000000 + 8000504c: 80016d14 .word 0x80016d14 + 80005050: 00000000 .word 0x00000000 + 80005054: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0xd7b2febaf355bd3f + 80005058: 0004b403 ld x8,0(x9) + 8000505c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs2: x8 = 0x6b9e59f96bed1dc3 + 80005060: 0004b403 ld x8,0(x9) + 80005064: 00848493 addi x9,x9,8 + +0000000080005068 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b8: + aes64ks2 x21, x8, x8 # perform operation + 80005068: 7e840ab3 aes64ks2 x21,x8,x8 + # Check if x21 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x21, Zkne_aes64ks2_cg_cmp_rs1_rs2_b8, Zkne_aes64ks2_cg_cmp_rs1_rs2_b8_str) + 8000506c: 00063683 ld x13,0(x12) + 80005070: 01568c63 beq x13,x21,80005088 + 80005074: 4cd0276f jal x14,80007d40 + 80005078: 80005068 .word 0x80005068 + 8000507c: 00000000 .word 0x00000000 + 80005080: 80016d50 .word 0x80016d50 + 80005084: 00000000 .word 0x00000000 + 80005088: 00860613 addi x12,x12,8 + + mv x24, x9 # switch data pointer register to avoid conflict with test + 8000508c: 00048c13 addi x24,x9,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xa2c400e2dbff950b + 80005090: 000c3483 ld x9,0(x24) + 80005094: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x117e8e2ae3db2965 + 80005098: 000c3483 ld x9,0(x24) + 8000509c: 008c0c13 addi x24,x24,8 + +00000000800050a0 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b9: + aes64ks2 x26, x9, x9 # perform operation + 800050a0: 7e948d33 aes64ks2 x26,x9,x9 + # Check if x26 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x26, Zkne_aes64ks2_cg_cmp_rs1_rs2_b9, Zkne_aes64ks2_cg_cmp_rs1_rs2_b9_str) + 800050a4: 00063683 ld x13,0(x12) + 800050a8: 01a68c63 beq x13,x26,800050c0 + 800050ac: 4950276f jal x14,80007d40 + 800050b0: 800050a0 .word 0x800050a0 + 800050b4: 00000000 .word 0x00000000 + 800050b8: 80016d8c .word 0x80016d8c + 800050bc: 00000000 .word 0x00000000 + 800050c0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs1: x10 = 0x35e42ee0d59b6a8d + 800050c4: 000c3503 ld x10,0(x24) + 800050c8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xfc78511995b652cc + 800050cc: 000c3503 ld x10,0(x24) + 800050d0: 008c0c13 addi x24,x24,8 + +00000000800050d4 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b10: + aes64ks2 x9, x10, x10 # perform operation + 800050d4: 7ea504b3 aes64ks2 x9,x10,x10 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zkne_aes64ks2_cg_cmp_rs1_rs2_b10, Zkne_aes64ks2_cg_cmp_rs1_rs2_b10_str) + 800050d8: 00063683 ld x13,0(x12) + 800050dc: 00968c63 beq x13,x9,800050f4 + 800050e0: 4610276f jal x14,80007d40 + 800050e4: 800050d4 .word 0x800050d4 + 800050e8: 00000000 .word 0x00000000 + 800050ec: 80016dc8 .word 0x80016dc8 + 800050f0: 00000000 .word 0x00000000 + 800050f4: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x70d5703c4fd2deec + 800050f8: 000c3583 ld x11,0(x24) + 800050fc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0x7886097dd1cd24e1 + 80005100: 000c3583 ld x11,0(x24) + 80005104: 008c0c13 addi x24,x24,8 + +0000000080005108 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b11: + aes64ks2 x16, x11, x11 # perform operation + 80005108: 7eb58833 aes64ks2 x16,x11,x11 + # Check if x16 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x16, Zkne_aes64ks2_cg_cmp_rs1_rs2_b11, Zkne_aes64ks2_cg_cmp_rs1_rs2_b11_str) + 8000510c: 00063683 ld x13,0(x12) + 80005110: 01068c63 beq x13,x16,80005128 + 80005114: 42d0276f jal x14,80007d40 + 80005118: 80005108 .word 0x80005108 + 8000511c: 00000000 .word 0x00000000 + 80005120: 80016e05 .word 0x80016e05 + 80005124: 00000000 .word 0x00000000 + 80005128: 00860613 addi x12,x12,8 + + mv x28, x12 # switch signature pointer register to avoid conflict with test + 8000512c: 00060e13 addi x28,x12,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs1: x12 = 0x5fff7608984a090c + 80005130: 000c3603 ld x12,0(x24) + 80005134: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xe43fe1db2fc5c984 + 80005138: 000c3603 ld x12,0(x24) + 8000513c: 008c0c13 addi x24,x24,8 + +0000000080005140 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b12: + aes64ks2 x17, x12, x12 # perform operation + 80005140: 7ec608b3 aes64ks2 x17,x12,x12 + # Check if x17 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x17, Zkne_aes64ks2_cg_cmp_rs1_rs2_b12, Zkne_aes64ks2_cg_cmp_rs1_rs2_b12_str) + 80005144: 000e3683 ld x13,0(x28) + 80005148: 01168c63 beq x13,x17,80005160 + 8000514c: 3f50276f jal x14,80007d40 + 80005150: 80005140 .word 0x80005140 + 80005154: 00000000 .word 0x00000000 + 80005158: 80016e42 .word 0x80016e42 + 8000515c: 00000000 .word 0x00000000 + 80005160: 008e0e13 addi x28,x28,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005164: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005168: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x53f0f65e9095e44c + 8000516c: 000c3683 ld x13,0(x24) + 80005170: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0x83d3a4722d371872 + 80005174: 000c3683 ld x13,0(x24) + 80005178: 008c0c13 addi x24,x24,8 + +000000008000517c : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b13: + aes64ks2 x18, x13, x13 # perform operation + 8000517c: 7ed68933 aes64ks2 x18,x13,x13 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zkne_aes64ks2_cg_cmp_rs1_rs2_b13, Zkne_aes64ks2_cg_cmp_rs1_rs2_b13_str) + 80005180: 000e3383 ld x7,0(x28) + 80005184: 01238c63 beq x7,x18,8000519c + 80005188: 3910246f jal x8,80007d18 + 8000518c: 8000517c .word 0x8000517c + 80005190: 00000000 .word 0x00000000 + 80005194: 80016e7f .word 0x80016e7f + 80005198: 00000000 .word 0x00000000 + 8000519c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0x6b4f5194d0cc012f + 800051a0: 000c3703 ld x14,0(x24) + 800051a4: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0xf64d3f50612863bb + 800051a8: 000c3703 ld x14,0(x24) + 800051ac: 008c0c13 addi x24,x24,8 + +00000000800051b0 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b14: + aes64ks2 x25, x14, x14 # perform operation + 800051b0: 7ee70cb3 aes64ks2 x25,x14,x14 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zkne_aes64ks2_cg_cmp_rs1_rs2_b14, Zkne_aes64ks2_cg_cmp_rs1_rs2_b14_str) + 800051b4: 000e3383 ld x7,0(x28) + 800051b8: 01938c63 beq x7,x25,800051d0 + 800051bc: 35d0246f jal x8,80007d18 + 800051c0: 800051b0 .word 0x800051b0 + 800051c4: 00000000 .word 0x00000000 + 800051c8: 80016ebc .word 0x80016ebc + 800051cc: 00000000 .word 0x00000000 + 800051d0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs1: x15 = 0xbe5daab7b533998f + 800051d4: 000c3783 ld x15,0(x24) + 800051d8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x4c8a1861a3153fac + 800051dc: 000c3783 ld x15,0(x24) + 800051e0: 008c0c13 addi x24,x24,8 + +00000000800051e4 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b15: + aes64ks2 x31, x15, x15 # perform operation + 800051e4: 7ef78fb3 aes64ks2 x31,x15,x15 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zkne_aes64ks2_cg_cmp_rs1_rs2_b15, Zkne_aes64ks2_cg_cmp_rs1_rs2_b15_str) + 800051e8: 000e3383 ld x7,0(x28) + 800051ec: 01f38c63 beq x7,x31,80005204 + 800051f0: 3290246f jal x8,80007d18 + 800051f4: 800051e4 .word 0x800051e4 + 800051f8: 00000000 .word 0x00000000 + 800051fc: 80016ef9 .word 0x80016ef9 + 80005200: 00000000 .word 0x00000000 + 80005204: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs1: x16 = 0x5c5d7b28d8b735d5 + 80005208: 000c3803 ld x16,0(x24) + 8000520c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0x2a216a73561e79e7 + 80005210: 000c3803 ld x16,0(x24) + 80005214: 008c0c13 addi x24,x24,8 + +0000000080005218 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b16: + aes64ks2 x3, x16, x16 # perform operation + 80005218: 7f0801b3 aes64ks2 x3,x16,x16 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zkne_aes64ks2_cg_cmp_rs1_rs2_b16, Zkne_aes64ks2_cg_cmp_rs1_rs2_b16_str) + 8000521c: 000e3383 ld x7,0(x28) + 80005220: 00338c63 beq x7,x3,80005238 + 80005224: 2f50246f jal x8,80007d18 + 80005228: 80005218 .word 0x80005218 + 8000522c: 00000000 .word 0x00000000 + 80005230: 80016f36 .word 0x80016f36 + 80005234: 00000000 .word 0x00000000 + 80005238: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0xbe2d313e20c5d952 + 8000523c: 000c3883 ld x17,0(x24) + 80005240: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xe910ae1527ae4020 + 80005244: 000c3883 ld x17,0(x24) + 80005248: 008c0c13 addi x24,x24,8 + +000000008000524c : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b17: + aes64ks2 x18, x17, x17 # perform operation + 8000524c: 7f188933 aes64ks2 x18,x17,x17 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zkne_aes64ks2_cg_cmp_rs1_rs2_b17, Zkne_aes64ks2_cg_cmp_rs1_rs2_b17_str) + 80005250: 000e3383 ld x7,0(x28) + 80005254: 01238c63 beq x7,x18,8000526c + 80005258: 2c10246f jal x8,80007d18 + 8000525c: 8000524c .word 0x8000524c + 80005260: 00000000 .word 0x00000000 + 80005264: 80016f73 .word 0x80016f73 + 80005268: 00000000 .word 0x00000000 + 8000526c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x0a13eac727eda421 + 80005270: 000c3903 ld x18,0(x24) + 80005274: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x0fe0ceba777b8943 + 80005278: 000c3903 ld x18,0(x24) + 8000527c: 008c0c13 addi x24,x24,8 + +0000000080005280 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b18: + aes64ks2 x20, x18, x18 # perform operation + 80005280: 7f290a33 aes64ks2 x20,x18,x18 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zkne_aes64ks2_cg_cmp_rs1_rs2_b18, Zkne_aes64ks2_cg_cmp_rs1_rs2_b18_str) + 80005284: 000e3383 ld x7,0(x28) + 80005288: 01438c63 beq x7,x20,800052a0 + 8000528c: 28d0246f jal x8,80007d18 + 80005290: 80005280 .word 0x80005280 + 80005294: 00000000 .word 0x00000000 + 80005298: 80016fb0 .word 0x80016fb0 + 8000529c: 00000000 .word 0x00000000 + 800052a0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x53ab9ae42c29a857 + 800052a4: 000c3983 ld x19,0(x24) + 800052a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0x217d715356078963 + 800052ac: 000c3983 ld x19,0(x24) + 800052b0: 008c0c13 addi x24,x24,8 + +00000000800052b4 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b19: + aes64ks2 x22, x19, x19 # perform operation + 800052b4: 7f398b33 aes64ks2 x22,x19,x19 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zkne_aes64ks2_cg_cmp_rs1_rs2_b19, Zkne_aes64ks2_cg_cmp_rs1_rs2_b19_str) + 800052b8: 000e3383 ld x7,0(x28) + 800052bc: 01638c63 beq x7,x22,800052d4 + 800052c0: 2590246f jal x8,80007d18 + 800052c4: 800052b4 .word 0x800052b4 + 800052c8: 00000000 .word 0x00000000 + 800052cc: 80016fed .word 0x80016fed + 800052d0: 00000000 .word 0x00000000 + 800052d4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0xb598113784738028 + 800052d8: 000c3a03 ld x20,0(x24) + 800052dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x3bf61579505211f1 + 800052e0: 000c3a03 ld x20,0(x24) + 800052e4: 008c0c13 addi x24,x24,8 + +00000000800052e8 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b20: + aes64ks2 x3, x20, x20 # perform operation + 800052e8: 7f4a01b3 aes64ks2 x3,x20,x20 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zkne_aes64ks2_cg_cmp_rs1_rs2_b20, Zkne_aes64ks2_cg_cmp_rs1_rs2_b20_str) + 800052ec: 000e3383 ld x7,0(x28) + 800052f0: 00338c63 beq x7,x3,80005308 + 800052f4: 2250246f jal x8,80007d18 + 800052f8: 800052e8 .word 0x800052e8 + 800052fc: 00000000 .word 0x00000000 + 80005300: 8001702a .word 0x8001702a + 80005304: 00000000 .word 0x00000000 + 80005308: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0xb825be55b33a48ac + 8000530c: 000c3a83 ld x21,0(x24) + 80005310: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xa46ce535f4444292 + 80005314: 000c3a83 ld x21,0(x24) + 80005318: 008c0c13 addi x24,x24,8 + +000000008000531c : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b21: + aes64ks2 x11, x21, x21 # perform operation + 8000531c: 7f5a85b3 aes64ks2 x11,x21,x21 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zkne_aes64ks2_cg_cmp_rs1_rs2_b21, Zkne_aes64ks2_cg_cmp_rs1_rs2_b21_str) + 80005320: 000e3383 ld x7,0(x28) + 80005324: 00b38c63 beq x7,x11,8000533c + 80005328: 1f10246f jal x8,80007d18 + 8000532c: 8000531c .word 0x8000531c + 80005330: 00000000 .word 0x00000000 + 80005334: 80017067 .word 0x80017067 + 80005338: 00000000 .word 0x00000000 + 8000533c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0x2a8c482b3182045c + 80005340: 000c3b03 ld x22,0(x24) + 80005344: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xfa5b8d25f0ef1e1d + 80005348: 000c3b03 ld x22,0(x24) + 8000534c: 008c0c13 addi x24,x24,8 + +0000000080005350 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b22: + aes64ks2 x2, x22, x22 # perform operation + 80005350: 7f6b0133 aes64ks2 x2,x22,x22 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zkne_aes64ks2_cg_cmp_rs1_rs2_b22, Zkne_aes64ks2_cg_cmp_rs1_rs2_b22_str) + 80005354: 000e3383 ld x7,0(x28) + 80005358: 00238c63 beq x7,x2,80005370 + 8000535c: 1bd0246f jal x8,80007d18 + 80005360: 80005350 .word 0x80005350 + 80005364: 00000000 .word 0x00000000 + 80005368: 800170a4 .word 0x800170a4 + 8000536c: 00000000 .word 0x00000000 + 80005370: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xc1e1ecd504dcfd20 + 80005374: 000c3b83 ld x23,0(x24) + 80005378: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x0a1ccb2c3b083ecd + 8000537c: 000c3b83 ld x23,0(x24) + 80005380: 008c0c13 addi x24,x24,8 + +0000000080005384 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b23: + aes64ks2 x14, x23, x23 # perform operation + 80005384: 7f7b8733 aes64ks2 x14,x23,x23 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zkne_aes64ks2_cg_cmp_rs1_rs2_b23, Zkne_aes64ks2_cg_cmp_rs1_rs2_b23_str) + 80005388: 000e3383 ld x7,0(x28) + 8000538c: 00e38c63 beq x7,x14,800053a4 + 80005390: 1890246f jal x8,80007d18 + 80005394: 80005384 .word 0x80005384 + 80005398: 00000000 .word 0x00000000 + 8000539c: 800170e1 .word 0x800170e1 + 800053a0: 00000000 .word 0x00000000 + 800053a4: 008e0e13 addi x28,x28,8 + + mv x20, x24 # switch data pointer register to avoid conflict with test + 800053a8: 000c0a13 addi x20,x24,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x9ff6150d897e6cc7 + 800053ac: 000a3c03 ld x24,0(x20) + 800053b0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xba274d1db605d2bd + 800053b4: 000a3c03 ld x24,0(x20) + 800053b8: 008a0a13 addi x20,x20,8 + +00000000800053bc : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b24: + aes64ks2 x18, x24, x24 # perform operation + 800053bc: 7f8c0933 aes64ks2 x18,x24,x24 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zkne_aes64ks2_cg_cmp_rs1_rs2_b24, Zkne_aes64ks2_cg_cmp_rs1_rs2_b24_str) + 800053c0: 000e3383 ld x7,0(x28) + 800053c4: 01238c63 beq x7,x18,800053dc + 800053c8: 1510246f jal x8,80007d18 + 800053cc: 800053bc .word 0x800053bc + 800053d0: 00000000 .word 0x00000000 + 800053d4: 8001711e .word 0x8001711e + 800053d8: 00000000 .word 0x00000000 + 800053dc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xa471ef4537e8a17b + 800053e0: 000a3c83 ld x25,0(x20) + 800053e4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x086d45f489653a0b + 800053e8: 000a3c83 ld x25,0(x20) + 800053ec: 008a0a13 addi x20,x20,8 + +00000000800053f0 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b25: + aes64ks2 x9, x25, x25 # perform operation + 800053f0: 7f9c84b3 aes64ks2 x9,x25,x25 + # Check if x9 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x9, Zkne_aes64ks2_cg_cmp_rs1_rs2_b25, Zkne_aes64ks2_cg_cmp_rs1_rs2_b25_str) + 800053f4: 000e3383 ld x7,0(x28) + 800053f8: 00938c63 beq x7,x9,80005410 + 800053fc: 11d0246f jal x8,80007d18 + 80005400: 800053f0 .word 0x800053f0 + 80005404: 00000000 .word 0x00000000 + 80005408: 8001715b .word 0x8001715b + 8000540c: 00000000 .word 0x00000000 + 80005410: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs1: x26 = 0x26692440861059fb + 80005414: 000a3d03 ld x26,0(x20) + 80005418: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x81935718160ed3e2 + 8000541c: 000a3d03 ld x26,0(x20) + 80005420: 008a0a13 addi x20,x20,8 + +0000000080005424 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b26: + aes64ks2 x19, x26, x26 # perform operation + 80005424: 7fad09b3 aes64ks2 x19,x26,x26 + # Check if x19 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x19, Zkne_aes64ks2_cg_cmp_rs1_rs2_b26, Zkne_aes64ks2_cg_cmp_rs1_rs2_b26_str) + 80005428: 000e3383 ld x7,0(x28) + 8000542c: 01338c63 beq x7,x19,80005444 + 80005430: 0e90246f jal x8,80007d18 + 80005434: 80005424 .word 0x80005424 + 80005438: 00000000 .word 0x00000000 + 8000543c: 80017198 .word 0x80017198 + 80005440: 00000000 .word 0x00000000 + 80005444: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs1: x27 = 0x9d97f7be4389959c + 80005448: 000a3d83 ld x27,0(x20) + 8000544c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x195679fd955b652c + 80005450: 000a3d83 ld x27,0(x20) + 80005454: 008a0a13 addi x20,x20,8 + +0000000080005458 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b27: + aes64ks2 x2, x27, x27 # perform operation + 80005458: 7fbd8133 aes64ks2 x2,x27,x27 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zkne_aes64ks2_cg_cmp_rs1_rs2_b27, Zkne_aes64ks2_cg_cmp_rs1_rs2_b27_str) + 8000545c: 000e3383 ld x7,0(x28) + 80005460: 00238c63 beq x7,x2,80005478 + 80005464: 0b50246f jal x8,80007d18 + 80005468: 80005458 .word 0x80005458 + 8000546c: 00000000 .word 0x00000000 + 80005470: 800171d5 .word 0x800171d5 + 80005474: 00000000 .word 0x00000000 + 80005478: 008e0e13 addi x28,x28,8 + + mv x18, x28 # switch signature pointer register to avoid conflict with test + 8000547c: 000e0913 addi x18,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0xf9326c7aed43066e + 80005480: 000a3e03 ld x28,0(x20) + 80005484: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x8b8fc2cd76bb94d7 + 80005488: 000a3e03 ld x28,0(x20) + 8000548c: 008a0a13 addi x20,x20,8 + +0000000080005490 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b28: + aes64ks2 x6, x28, x28 # perform operation + 80005490: 7fce0333 aes64ks2 x6,x28,x28 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zkne_aes64ks2_cg_cmp_rs1_rs2_b28, Zkne_aes64ks2_cg_cmp_rs1_rs2_b28_str) + 80005494: 00093383 ld x7,0(x18) + 80005498: 00638c63 beq x7,x6,800054b0 + 8000549c: 07d0246f jal x8,80007d18 + 800054a0: 80005490 .word 0x80005490 + 800054a4: 00000000 .word 0x00000000 + 800054a8: 80017212 .word 0x80017212 + 800054ac: 00000000 .word 0x00000000 + 800054b0: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs1: x29 = 0x1280fbb724314ead + 800054b4: 000a3e83 ld x29,0(x20) + 800054b8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x508ca9342c841074 + 800054bc: 000a3e83 ld x29,0(x20) + 800054c0: 008a0a13 addi x20,x20,8 + +00000000800054c4 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b29: + aes64ks2 x21, x29, x29 # perform operation + 800054c4: 7fde8ab3 aes64ks2 x21,x29,x29 + # Check if x21 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x21, Zkne_aes64ks2_cg_cmp_rs1_rs2_b29, Zkne_aes64ks2_cg_cmp_rs1_rs2_b29_str) + 800054c8: 00093383 ld x7,0(x18) + 800054cc: 01538c63 beq x7,x21,800054e4 + 800054d0: 0490246f jal x8,80007d18 + 800054d4: 800054c4 .word 0x800054c4 + 800054d8: 00000000 .word 0x00000000 + 800054dc: 8001724f .word 0x8001724f + 800054e0: 00000000 .word 0x00000000 + 800054e4: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs1: x30 = 0x6c723e7810ad9500 + 800054e8: 000a3f03 ld x30,0(x20) + 800054ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x6d2b74a9568869ee + 800054f0: 000a3f03 ld x30,0(x20) + 800054f4: 008a0a13 addi x20,x20,8 + +00000000800054f8 : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b30: + aes64ks2 x17, x30, x30 # perform operation + 800054f8: 7fef08b3 aes64ks2 x17,x30,x30 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zkne_aes64ks2_cg_cmp_rs1_rs2_b30, Zkne_aes64ks2_cg_cmp_rs1_rs2_b30_str) + 800054fc: 00093383 ld x7,0(x18) + 80005500: 01138c63 beq x7,x17,80005518 + 80005504: 0150246f jal x8,80007d18 + 80005508: 800054f8 .word 0x800054f8 + 8000550c: 00000000 .word 0x00000000 + 80005510: 8001728c .word 0x8001728c + 80005514: 00000000 .word 0x00000000 + 80005518: 00890913 addi x18,x18,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs1: x31 = 0x54c457aa8716ec75 + 8000551c: 000a3f83 ld x31,0(x20) + 80005520: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xeaa7a807be08cd0e + 80005524: 000a3f83 ld x31,0(x20) + 80005528: 008a0a13 addi x20,x20,8 + +000000008000552c : +Zkne_aes64ks2_cg_cmp_rs1_rs2_b31: + aes64ks2 x24, x31, x31 # perform operation + 8000552c: 7fff8c33 aes64ks2 x24,x31,x31 + # Check if x24 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x24, Zkne_aes64ks2_cg_cmp_rs1_rs2_b31, Zkne_aes64ks2_cg_cmp_rs1_rs2_b31_str) + 80005530: 00093383 ld x7,0(x18) + 80005534: 01838c63 beq x7,x24,8000554c + 80005538: 7e00246f jal x8,80007d18 + 8000553c: 8000552c .word 0x8000552c + 80005540: 00000000 .word 0x00000000 + 80005544: 800172c9 .word 0x800172c9 + 80005548: 00000000 .word 0x00000000 + 8000554c: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x6e326e25616cf8d4 + 80005550: 000a3003 ld x0,0(x20) + 80005554: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xa95fe07ed9ca03c5 + 80005558: 000a3b03 ld x22,0(x20) + 8000555c: 008a0a13 addi x20,x20,8 + +0000000080005560 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b0: + aes64ks2 x0, x0, x22 # perform operation + 80005560: 7f600033 aes64ks2 x0,x0,x22 + # Check if x0 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x0, Zkne_aes64ks2_cg_cmp_rd_rs1_b0, Zkne_aes64ks2_cg_cmp_rd_rs1_b0_str) + 80005564: 00093383 ld x7,0(x18) + 80005568: 00038c63 beq x7,x0,80005580 + 8000556c: 7ac0246f jal x8,80007d18 + 80005570: 80005560 .word 0x80005560 + 80005574: 00000000 .word 0x00000000 + 80005578: 80017306 .word 0x80017306 + 8000557c: 00000000 .word 0x00000000 + 80005580: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xd804564c833e06c5 + 80005584: 000a3083 ld x1,0(x20) + 80005588: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x25e6992d2f45769b + 8000558c: 000a3803 ld x16,0(x20) + 80005590: 008a0a13 addi x20,x20,8 + +0000000080005594 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b1: + aes64ks2 x1, x1, x16 # perform operation + 80005594: 7f0080b3 aes64ks2 x1,x1,x16 + # Check if x1 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x1, Zkne_aes64ks2_cg_cmp_rd_rs1_b1, Zkne_aes64ks2_cg_cmp_rd_rs1_b1_str) + 80005598: 00093383 ld x7,0(x18) + 8000559c: 00138c63 beq x7,x1,800055b4 + 800055a0: 7780246f jal x8,80007d18 + 800055a4: 80005594 .word 0x80005594 + 800055a8: 00000000 .word 0x00000000 + 800055ac: 80017341 .word 0x80017341 + 800055b0: 00000000 .word 0x00000000 + 800055b4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs1: x2 = 0x59d718e8da940e59 + 800055b8: 000a3103 ld x2,0(x20) + 800055bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0xd6b6955ae66b590e + 800055c0: 000a3083 ld x1,0(x20) + 800055c4: 008a0a13 addi x20,x20,8 + +00000000800055c8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b2: + aes64ks2 x2, x2, x1 # perform operation + 800055c8: 7e110133 aes64ks2 x2,x2,x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x2, Zkne_aes64ks2_cg_cmp_rd_rs1_b2, Zkne_aes64ks2_cg_cmp_rd_rs1_b2_str) + 800055cc: 00093383 ld x7,0(x18) + 800055d0: 00238c63 beq x7,x2,800055e8 + 800055d4: 7440246f jal x8,80007d18 + 800055d8: 800055c8 .word 0x800055c8 + 800055dc: 00000000 .word 0x00000000 + 800055e0: 8001737c .word 0x8001737c + 800055e4: 00000000 .word 0x00000000 + 800055e8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0xfc80ac31db3156dd + 800055ec: 000a3183 ld x3,0(x20) + 800055f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0x0ab91ab5251b4343 + 800055f4: 000a3003 ld x0,0(x20) + 800055f8: 008a0a13 addi x20,x20,8 + +00000000800055fc : +Zkne_aes64ks2_cg_cmp_rd_rs1_b3: + aes64ks2 x3, x3, x0 # perform operation + 800055fc: 7e0181b3 aes64ks2 x3,x3,x0 + # Check if x3 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x3, Zkne_aes64ks2_cg_cmp_rd_rs1_b3, Zkne_aes64ks2_cg_cmp_rd_rs1_b3_str) + 80005600: 00093383 ld x7,0(x18) + 80005604: 00338c63 beq x7,x3,8000561c + 80005608: 7100246f jal x8,80007d18 + 8000560c: 800055fc .word 0x800055fc + 80005610: 00000000 .word 0x00000000 + 80005614: 800173b7 .word 0x800173b7 + 80005618: 00000000 .word 0x00000000 + 8000561c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0xb872711b1231f688 + 80005620: 000a3203 ld x4,0(x20) + 80005624: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x41e705daf56d6269 + 80005628: 000a3783 ld x15,0(x20) + 8000562c: 008a0a13 addi x20,x20,8 + +0000000080005630 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b4: + aes64ks2 x4, x4, x15 # perform operation + 80005630: 7ef20233 aes64ks2 x4,x4,x15 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zkne_aes64ks2_cg_cmp_rd_rs1_b4, Zkne_aes64ks2_cg_cmp_rd_rs1_b4_str) + 80005634: 00093383 ld x7,0(x18) + 80005638: 00438c63 beq x7,x4,80005650 + 8000563c: 6dc0246f jal x8,80007d18 + 80005640: 80005630 .word 0x80005630 + 80005644: 00000000 .word 0x00000000 + 80005648: 800173f2 .word 0x800173f2 + 8000564c: 00000000 .word 0x00000000 + 80005650: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xcf44f76f45fa5f00 + 80005654: 000a3283 ld x5,0(x20) + 80005658: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0xfb6476b7ee780c35 + 8000565c: 000a3703 ld x14,0(x20) + 80005660: 008a0a13 addi x20,x20,8 + +0000000080005664 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b5: + aes64ks2 x5, x5, x14 # perform operation + 80005664: 7ee282b3 aes64ks2 x5,x5,x14 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zkne_aes64ks2_cg_cmp_rd_rs1_b5, Zkne_aes64ks2_cg_cmp_rd_rs1_b5_str) + 80005668: 00093383 ld x7,0(x18) + 8000566c: 00538c63 beq x7,x5,80005684 + 80005670: 6a80246f jal x8,80007d18 + 80005674: 80005664 .word 0x80005664 + 80005678: 00000000 .word 0x00000000 + 8000567c: 8001742d .word 0x8001742d + 80005680: 00000000 .word 0x00000000 + 80005684: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x5b5ef4c503de6789 + 80005688: 000a3303 ld x6,0(x20) + 8000568c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x5be793962436d5ec + 80005690: 000a3b83 ld x23,0(x20) + 80005694: 008a0a13 addi x20,x20,8 + +0000000080005698 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b6: + aes64ks2 x6, x6, x23 # perform operation + 80005698: 7f730333 aes64ks2 x6,x6,x23 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zkne_aes64ks2_cg_cmp_rd_rs1_b6, Zkne_aes64ks2_cg_cmp_rd_rs1_b6_str) + 8000569c: 00093383 ld x7,0(x18) + 800056a0: 00638c63 beq x7,x6,800056b8 + 800056a4: 6740246f jal x8,80007d18 + 800056a8: 80005698 .word 0x80005698 + 800056ac: 00000000 .word 0x00000000 + 800056b0: 80017468 .word 0x80017468 + 800056b4: 00000000 .word 0x00000000 + 800056b8: 00890913 addi x18,x18,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056c0: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x97e21660213e759a + 800056c4: 000a3383 ld x7,0(x20) + 800056c8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0x402d9ba02a2666c6 + 800056cc: 000a3603 ld x12,0(x20) + 800056d0: 008a0a13 addi x20,x20,8 + +00000000800056d4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b7: + aes64ks2 x7, x7, x12 # perform operation + 800056d4: 7ec383b3 aes64ks2 x7,x7,x12 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zkne_aes64ks2_cg_cmp_rd_rs1_b7, Zkne_aes64ks2_cg_cmp_rd_rs1_b7_str) + 800056d8: 00093203 ld x4,0(x18) + 800056dc: 00720c63 beq x4,x7,800056f4 + 800056e0: 620022ef jal x5,80007d00 + 800056e4: 800056d4 .word 0x800056d4 + 800056e8: 00000000 .word 0x00000000 + 800056ec: 800174a3 .word 0x800174a3 + 800056f0: 00000000 .word 0x00000000 + 800056f4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x4ba3ad60b3ab106f + 800056f8: 000a3403 ld x8,0(x20) + 800056fc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0xa9bee6073f4f30b7 + 80005700: 000a3b03 ld x22,0(x20) + 80005704: 008a0a13 addi x20,x20,8 + +0000000080005708 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b8: + aes64ks2 x8, x8, x22 # perform operation + 80005708: 7f640433 aes64ks2 x8,x8,x22 + # Check if x8 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x8, Zkne_aes64ks2_cg_cmp_rd_rs1_b8, Zkne_aes64ks2_cg_cmp_rd_rs1_b8_str) + 8000570c: 00093203 ld x4,0(x18) + 80005710: 00820c63 beq x4,x8,80005728 + 80005714: 5ec022ef jal x5,80007d00 + 80005718: 80005708 .word 0x80005708 + 8000571c: 00000000 .word 0x00000000 + 80005720: 800174de .word 0x800174de + 80005724: 00000000 .word 0x00000000 + 80005728: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x25f620279058d61b + 8000572c: 000a3483 ld x9,0(x20) + 80005730: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs2: x1 = 0x7c871d5603709932 + 80005734: 000a3083 ld x1,0(x20) + 80005738: 008a0a13 addi x20,x20,8 + +000000008000573c : +Zkne_aes64ks2_cg_cmp_rd_rs1_b9: + aes64ks2 x9, x9, x1 # perform operation + 8000573c: 7e1484b3 aes64ks2 x9,x9,x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zkne_aes64ks2_cg_cmp_rd_rs1_b9, Zkne_aes64ks2_cg_cmp_rd_rs1_b9_str) + 80005740: 00093203 ld x4,0(x18) + 80005744: 00920c63 beq x4,x9,8000575c + 80005748: 5b8022ef jal x5,80007d00 + 8000574c: 8000573c .word 0x8000573c + 80005750: 00000000 .word 0x00000000 + 80005754: 80017519 .word 0x80017519 + 80005758: 00000000 .word 0x00000000 + 8000575c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x996e0f39ee566266 + 80005760: 000a3503 ld x10,0(x20) + 80005764: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0x6254a842ed3a62e3 + 80005768: 000a3583 ld x11,0(x20) + 8000576c: 008a0a13 addi x20,x20,8 + +0000000080005770 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b10: + aes64ks2 x10, x10, x11 # perform operation + 80005770: 7eb50533 aes64ks2 x10,x10,x11 + # Check if x10 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x10, Zkne_aes64ks2_cg_cmp_rd_rs1_b10, Zkne_aes64ks2_cg_cmp_rd_rs1_b10_str) + 80005774: 00093203 ld x4,0(x18) + 80005778: 00a20c63 beq x4,x10,80005790 + 8000577c: 584022ef jal x5,80007d00 + 80005780: 80005770 .word 0x80005770 + 80005784: 00000000 .word 0x00000000 + 80005788: 80017554 .word 0x80017554 + 8000578c: 00000000 .word 0x00000000 + 80005790: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xa4748ec2bc7c1e08 + 80005794: 000a3583 ld x11,0(x20) + 80005798: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0x1a782c960ab9ec24 + 8000579c: 000a3803 ld x16,0(x20) + 800057a0: 008a0a13 addi x20,x20,8 + +00000000800057a4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b11: + aes64ks2 x11, x11, x16 # perform operation + 800057a4: 7f0585b3 aes64ks2 x11,x11,x16 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zkne_aes64ks2_cg_cmp_rd_rs1_b11, Zkne_aes64ks2_cg_cmp_rd_rs1_b11_str) + 800057a8: 00093203 ld x4,0(x18) + 800057ac: 00b20c63 beq x4,x11,800057c4 + 800057b0: 550022ef jal x5,80007d00 + 800057b4: 800057a4 .word 0x800057a4 + 800057b8: 00000000 .word 0x00000000 + 800057bc: 80017590 .word 0x80017590 + 800057c0: 00000000 .word 0x00000000 + 800057c4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x8c2ae5947360bd37 + 800057c8: 000a3603 ld x12,0(x20) + 800057cc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x0c8541d4febab204 + 800057d0: 000a3503 ld x10,0(x20) + 800057d4: 008a0a13 addi x20,x20,8 + +00000000800057d8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b12: + aes64ks2 x12, x12, x10 # perform operation + 800057d8: 7ea60633 aes64ks2 x12,x12,x10 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zkne_aes64ks2_cg_cmp_rd_rs1_b12, Zkne_aes64ks2_cg_cmp_rd_rs1_b12_str) + 800057dc: 00093203 ld x4,0(x18) + 800057e0: 00c20c63 beq x4,x12,800057f8 + 800057e4: 51c022ef jal x5,80007d00 + 800057e8: 800057d8 .word 0x800057d8 + 800057ec: 00000000 .word 0x00000000 + 800057f0: 800175cc .word 0x800175cc + 800057f4: 00000000 .word 0x00000000 + 800057f8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xf3916711710ac9f0 + 800057fc: 000a3683 ld x13,0(x20) + 80005800: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0xd8ed679fcb9b7e44 + 80005804: 000a3d83 ld x27,0(x20) + 80005808: 008a0a13 addi x20,x20,8 + +000000008000580c : +Zkne_aes64ks2_cg_cmp_rd_rs1_b13: + aes64ks2 x13, x13, x27 # perform operation + 8000580c: 7fb686b3 aes64ks2 x13,x13,x27 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zkne_aes64ks2_cg_cmp_rd_rs1_b13, Zkne_aes64ks2_cg_cmp_rd_rs1_b13_str) + 80005810: 00093203 ld x4,0(x18) + 80005814: 00d20c63 beq x4,x13,8000582c + 80005818: 4e8022ef jal x5,80007d00 + 8000581c: 8000580c .word 0x8000580c + 80005820: 00000000 .word 0x00000000 + 80005824: 80017608 .word 0x80017608 + 80005828: 00000000 .word 0x00000000 + 8000582c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x93468895f6a5fcd2 + 80005830: 000a3703 ld x14,0(x20) + 80005834: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xc739e14f97703978 + 80005838: 000a3f83 ld x31,0(x20) + 8000583c: 008a0a13 addi x20,x20,8 + +0000000080005840 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b14: + aes64ks2 x14, x14, x31 # perform operation + 80005840: 7ff70733 aes64ks2 x14,x14,x31 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zkne_aes64ks2_cg_cmp_rd_rs1_b14, Zkne_aes64ks2_cg_cmp_rd_rs1_b14_str) + 80005844: 00093203 ld x4,0(x18) + 80005848: 00e20c63 beq x4,x14,80005860 + 8000584c: 4b4022ef jal x5,80007d00 + 80005850: 80005840 .word 0x80005840 + 80005854: 00000000 .word 0x00000000 + 80005858: 80017644 .word 0x80017644 + 8000585c: 00000000 .word 0x00000000 + 80005860: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x33d51c2b73e567d3 + 80005864: 000a3783 ld x15,0(x20) + 80005868: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0x61dfb9c2a06b8b61 + 8000586c: 000a3e03 ld x28,0(x20) + 80005870: 008a0a13 addi x20,x20,8 + +0000000080005874 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b15: + aes64ks2 x15, x15, x28 # perform operation + 80005874: 7fc787b3 aes64ks2 x15,x15,x28 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zkne_aes64ks2_cg_cmp_rd_rs1_b15, Zkne_aes64ks2_cg_cmp_rd_rs1_b15_str) + 80005878: 00093203 ld x4,0(x18) + 8000587c: 00f20c63 beq x4,x15,80005894 + 80005880: 480022ef jal x5,80007d00 + 80005884: 80005874 .word 0x80005874 + 80005888: 00000000 .word 0x00000000 + 8000588c: 80017680 .word 0x80017680 + 80005890: 00000000 .word 0x00000000 + 80005894: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x4438ca24de46c822 + 80005898: 000a3803 ld x16,0(x20) + 8000589c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x469181c0a1f46351 + 800058a0: 000a3d03 ld x26,0(x20) + 800058a4: 008a0a13 addi x20,x20,8 + +00000000800058a8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b16: + aes64ks2 x16, x16, x26 # perform operation + 800058a8: 7fa80833 aes64ks2 x16,x16,x26 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zkne_aes64ks2_cg_cmp_rd_rs1_b16, Zkne_aes64ks2_cg_cmp_rd_rs1_b16_str) + 800058ac: 00093203 ld x4,0(x18) + 800058b0: 01020c63 beq x4,x16,800058c8 + 800058b4: 44c022ef jal x5,80007d00 + 800058b8: 800058a8 .word 0x800058a8 + 800058bc: 00000000 .word 0x00000000 + 800058c0: 800176bc .word 0x800176bc + 800058c4: 00000000 .word 0x00000000 + 800058c8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xe880ee9902103731 + 800058cc: 000a3883 ld x17,0(x20) + 800058d0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xcfd120bc4e5a2995 + 800058d4: 000a3b83 ld x23,0(x20) + 800058d8: 008a0a13 addi x20,x20,8 + +00000000800058dc : +Zkne_aes64ks2_cg_cmp_rd_rs1_b17: + aes64ks2 x17, x17, x23 # perform operation + 800058dc: 7f7888b3 aes64ks2 x17,x17,x23 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zkne_aes64ks2_cg_cmp_rd_rs1_b17, Zkne_aes64ks2_cg_cmp_rd_rs1_b17_str) + 800058e0: 00093203 ld x4,0(x18) + 800058e4: 01120c63 beq x4,x17,800058fc + 800058e8: 418022ef jal x5,80007d00 + 800058ec: 800058dc .word 0x800058dc + 800058f0: 00000000 .word 0x00000000 + 800058f4: 800176f8 .word 0x800176f8 + 800058f8: 00000000 .word 0x00000000 + 800058fc: 00890913 addi x18,x18,8 + + mv x19, x18 # switch signature pointer register to avoid conflict with test + 80005900: 00090993 addi x19,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x1f5be4a935827301 + 80005904: 000a3903 ld x18,0(x20) + 80005908: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0x0f5a1e6074b2233f + 8000590c: 000a3b83 ld x23,0(x20) + 80005910: 008a0a13 addi x20,x20,8 + +0000000080005914 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b18: + aes64ks2 x18, x18, x23 # perform operation + 80005914: 7f790933 aes64ks2 x18,x18,x23 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zkne_aes64ks2_cg_cmp_rd_rs1_b18, Zkne_aes64ks2_cg_cmp_rd_rs1_b18_str) + 80005918: 0009b203 ld x4,0(x19) + 8000591c: 01220c63 beq x4,x18,80005934 + 80005920: 3e0022ef jal x5,80007d00 + 80005924: 80005914 .word 0x80005914 + 80005928: 00000000 .word 0x00000000 + 8000592c: 80017734 .word 0x80017734 + 80005930: 00000000 .word 0x00000000 + 80005934: 00898993 addi x19,x19,8 + + mv x25, x19 # switch signature pointer register to avoid conflict with test + 80005938: 00098c93 addi x25,x19,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x328e057adca50c2a + 8000593c: 000a3983 ld x19,0(x20) + 80005940: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xb010948c99912204 + 80005944: 000a3f83 ld x31,0(x20) + 80005948: 008a0a13 addi x20,x20,8 + +000000008000594c : +Zkne_aes64ks2_cg_cmp_rd_rs1_b19: + aes64ks2 x19, x19, x31 # perform operation + 8000594c: 7ff989b3 aes64ks2 x19,x19,x31 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zkne_aes64ks2_cg_cmp_rd_rs1_b19, Zkne_aes64ks2_cg_cmp_rd_rs1_b19_str) + 80005950: 000cb203 ld x4,0(x25) + 80005954: 01320c63 beq x4,x19,8000596c + 80005958: 3a8022ef jal x5,80007d00 + 8000595c: 8000594c .word 0x8000594c + 80005960: 00000000 .word 0x00000000 + 80005964: 80017770 .word 0x80017770 + 80005968: 00000000 .word 0x00000000 + 8000596c: 008c8c93 addi x25,x25,8 + + mv x24, x20 # switch data pointer register to avoid conflict with test + 80005970: 000a0c13 addi x24,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x2cd6e2b205e6fda2 + 80005974: 000c3a03 ld x20,0(x24) + 80005978: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs2: x2 = 0x5d6cb7b3217e7427 + 8000597c: 000c3103 ld x2,0(x24) + 80005980: 008c0c13 addi x24,x24,8 + +0000000080005984 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b20: + aes64ks2 x20, x20, x2 # perform operation + 80005984: 7e2a0a33 aes64ks2 x20,x20,x2 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zkne_aes64ks2_cg_cmp_rd_rs1_b20, Zkne_aes64ks2_cg_cmp_rd_rs1_b20_str) + 80005988: 000cb203 ld x4,0(x25) + 8000598c: 01420c63 beq x4,x20,800059a4 + 80005990: 370022ef jal x5,80007d00 + 80005994: 80005984 .word 0x80005984 + 80005998: 00000000 .word 0x00000000 + 8000599c: 800177ac .word 0x800177ac + 800059a0: 00000000 .word 0x00000000 + 800059a4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x970d1af4a02fd434 + 800059a8: 000c3a83 ld x21,0(x24) + 800059ac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xde3861b3da12f4cc + 800059b0: 000c3a03 ld x20,0(x24) + 800059b4: 008c0c13 addi x24,x24,8 + +00000000800059b8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b21: + aes64ks2 x21, x21, x20 # perform operation + 800059b8: 7f4a8ab3 aes64ks2 x21,x21,x20 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zkne_aes64ks2_cg_cmp_rd_rs1_b21, Zkne_aes64ks2_cg_cmp_rd_rs1_b21_str) + 800059bc: 000cb203 ld x4,0(x25) + 800059c0: 01520c63 beq x4,x21,800059d8 + 800059c4: 33c022ef jal x5,80007d00 + 800059c8: 800059b8 .word 0x800059b8 + 800059cc: 00000000 .word 0x00000000 + 800059d0: 800177e8 .word 0x800177e8 + 800059d4: 00000000 .word 0x00000000 + 800059d8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xdbb96117fc936ac4 + 800059dc: 000c3b03 ld x22,0(x24) + 800059e0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0xa3dcbb3a327b4e90 + 800059e4: 000c3503 ld x10,0(x24) + 800059e8: 008c0c13 addi x24,x24,8 + +00000000800059ec : +Zkne_aes64ks2_cg_cmp_rd_rs1_b22: + aes64ks2 x22, x22, x10 # perform operation + 800059ec: 7eab0b33 aes64ks2 x22,x22,x10 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zkne_aes64ks2_cg_cmp_rd_rs1_b22, Zkne_aes64ks2_cg_cmp_rd_rs1_b22_str) + 800059f0: 000cb203 ld x4,0(x25) + 800059f4: 01620c63 beq x4,x22,80005a0c + 800059f8: 308022ef jal x5,80007d00 + 800059fc: 800059ec .word 0x800059ec + 80005a00: 00000000 .word 0x00000000 + 80005a04: 80017824 .word 0x80017824 + 80005a08: 00000000 .word 0x00000000 + 80005a0c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xecd6dff15e132c3f + 80005a10: 000c3b83 ld x23,0(x24) + 80005a14: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs2: x3 = 0xb1ca35787d23f467 + 80005a18: 000c3183 ld x3,0(x24) + 80005a1c: 008c0c13 addi x24,x24,8 + +0000000080005a20 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b23: + aes64ks2 x23, x23, x3 # perform operation + 80005a20: 7e3b8bb3 aes64ks2 x23,x23,x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zkne_aes64ks2_cg_cmp_rd_rs1_b23, Zkne_aes64ks2_cg_cmp_rd_rs1_b23_str) + 80005a24: 000cb203 ld x4,0(x25) + 80005a28: 01720c63 beq x4,x23,80005a40 + 80005a2c: 2d4022ef jal x5,80007d00 + 80005a30: 80005a20 .word 0x80005a20 + 80005a34: 00000000 .word 0x00000000 + 80005a38: 80017860 .word 0x80017860 + 80005a3c: 00000000 .word 0x00000000 + 80005a40: 008c8c93 addi x25,x25,8 + + mv x15, x24 # switch data pointer register to avoid conflict with test + 80005a44: 000c0793 addi x15,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x01c558f04869e259 + 80005a48: 0007bc03 ld x24,0(x15) + 80005a4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs2: x22 = 0x6a07244329d41936 + 80005a50: 0007bb03 ld x22,0(x15) + 80005a54: 00878793 addi x15,x15,8 + +0000000080005a58 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b24: + aes64ks2 x24, x24, x22 # perform operation + 80005a58: 7f6c0c33 aes64ks2 x24,x24,x22 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zkne_aes64ks2_cg_cmp_rd_rs1_b24, Zkne_aes64ks2_cg_cmp_rd_rs1_b24_str) + 80005a5c: 000cb203 ld x4,0(x25) + 80005a60: 01820c63 beq x4,x24,80005a78 + 80005a64: 29c022ef jal x5,80007d00 + 80005a68: 80005a58 .word 0x80005a58 + 80005a6c: 00000000 .word 0x00000000 + 80005a70: 8001789c .word 0x8001789c + 80005a74: 00000000 .word 0x00000000 + 80005a78: 008c8c93 addi x25,x25,8 + + mv x18, x25 # switch signature pointer register to avoid conflict with test + 80005a7c: 000c8913 addi x18,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xa5f1613a628ab2a8 + 80005a80: 0007bc83 ld x25,0(x15) + 80005a84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xd163b197abc82095 + 80005a88: 0007b503 ld x10,0(x15) + 80005a8c: 00878793 addi x15,x15,8 + +0000000080005a90 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b25: + aes64ks2 x25, x25, x10 # perform operation + 80005a90: 7eac8cb3 aes64ks2 x25,x25,x10 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zkne_aes64ks2_cg_cmp_rd_rs1_b25, Zkne_aes64ks2_cg_cmp_rd_rs1_b25_str) + 80005a94: 00093203 ld x4,0(x18) + 80005a98: 01920c63 beq x4,x25,80005ab0 + 80005a9c: 264022ef jal x5,80007d00 + 80005aa0: 80005a90 .word 0x80005a90 + 80005aa4: 00000000 .word 0x00000000 + 80005aa8: 800178d8 .word 0x800178d8 + 80005aac: 00000000 .word 0x00000000 + 80005ab0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x3bcadcaa992d68c3 + 80005ab4: 0007bd03 ld x26,0(x15) + 80005ab8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xe5c5d1e2af4467d7 + 80005abc: 0007b483 ld x9,0(x15) + 80005ac0: 00878793 addi x15,x15,8 + +0000000080005ac4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b26: + aes64ks2 x26, x26, x9 # perform operation + 80005ac4: 7e9d0d33 aes64ks2 x26,x26,x9 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zkne_aes64ks2_cg_cmp_rd_rs1_b26, Zkne_aes64ks2_cg_cmp_rd_rs1_b26_str) + 80005ac8: 00093203 ld x4,0(x18) + 80005acc: 01a20c63 beq x4,x26,80005ae4 + 80005ad0: 230022ef jal x5,80007d00 + 80005ad4: 80005ac4 .word 0x80005ac4 + 80005ad8: 00000000 .word 0x00000000 + 80005adc: 80017914 .word 0x80017914 + 80005ae0: 00000000 .word 0x00000000 + 80005ae4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x2e75265f88c5365e + 80005ae8: 0007bd83 ld x27,0(x15) + 80005aec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x6c48b7e2bf79436d + 80005af0: 0007b083 ld x1,0(x15) + 80005af4: 00878793 addi x15,x15,8 + +0000000080005af8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b27: + aes64ks2 x27, x27, x1 # perform operation + 80005af8: 7e1d8db3 aes64ks2 x27,x27,x1 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zkne_aes64ks2_cg_cmp_rd_rs1_b27, Zkne_aes64ks2_cg_cmp_rd_rs1_b27_str) + 80005afc: 00093203 ld x4,0(x18) + 80005b00: 01b20c63 beq x4,x27,80005b18 + 80005b04: 1fc022ef jal x5,80007d00 + 80005b08: 80005af8 .word 0x80005af8 + 80005b0c: 00000000 .word 0x00000000 + 80005b10: 80017950 .word 0x80017950 + 80005b14: 00000000 .word 0x00000000 + 80005b18: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xe2e9a2d905420a6d + 80005b1c: 0007be03 ld x28,0(x15) + 80005b20: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x626f58c80afecf3a + 80005b24: 0007b503 ld x10,0(x15) + 80005b28: 00878793 addi x15,x15,8 + +0000000080005b2c : +Zkne_aes64ks2_cg_cmp_rd_rs1_b28: + aes64ks2 x28, x28, x10 # perform operation + 80005b2c: 7eae0e33 aes64ks2 x28,x28,x10 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zkne_aes64ks2_cg_cmp_rd_rs1_b28, Zkne_aes64ks2_cg_cmp_rd_rs1_b28_str) + 80005b30: 00093203 ld x4,0(x18) + 80005b34: 01c20c63 beq x4,x28,80005b4c + 80005b38: 1c8022ef jal x5,80007d00 + 80005b3c: 80005b2c .word 0x80005b2c + 80005b40: 00000000 .word 0x00000000 + 80005b44: 8001798c .word 0x8001798c + 80005b48: 00000000 .word 0x00000000 + 80005b4c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xec2ddec47c51ccac + 80005b50: 0007be83 ld x29,0(x15) + 80005b54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xc5f19717f79ea563 + 80005b58: 0007bf83 ld x31,0(x15) + 80005b5c: 00878793 addi x15,x15,8 + +0000000080005b60 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b29: + aes64ks2 x29, x29, x31 # perform operation + 80005b60: 7ffe8eb3 aes64ks2 x29,x29,x31 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zkne_aes64ks2_cg_cmp_rd_rs1_b29, Zkne_aes64ks2_cg_cmp_rd_rs1_b29_str) + 80005b64: 00093203 ld x4,0(x18) + 80005b68: 01d20c63 beq x4,x29,80005b80 + 80005b6c: 194022ef jal x5,80007d00 + 80005b70: 80005b60 .word 0x80005b60 + 80005b74: 00000000 .word 0x00000000 + 80005b78: 800179c8 .word 0x800179c8 + 80005b7c: 00000000 .word 0x00000000 + 80005b80: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x71f3bcf533bfa571 + 80005b84: 0007bf03 ld x30,0(x15) + 80005b88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x893fb02430a4aadd + 80005b8c: 0007bd03 ld x26,0(x15) + 80005b90: 00878793 addi x15,x15,8 + +0000000080005b94 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b30: + aes64ks2 x30, x30, x26 # perform operation + 80005b94: 7faf0f33 aes64ks2 x30,x30,x26 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zkne_aes64ks2_cg_cmp_rd_rs1_b30, Zkne_aes64ks2_cg_cmp_rd_rs1_b30_str) + 80005b98: 00093203 ld x4,0(x18) + 80005b9c: 01e20c63 beq x4,x30,80005bb4 + 80005ba0: 160022ef jal x5,80007d00 + 80005ba4: 80005b94 .word 0x80005b94 + 80005ba8: 00000000 .word 0x00000000 + 80005bac: 80017a04 .word 0x80017a04 + 80005bb0: 00000000 .word 0x00000000 + 80005bb4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x91bccb70a5e2fff7 + 80005bb8: 0007bf83 ld x31,0(x15) + 80005bbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x882fd8580b2cd545 + 80005bc0: 0007bb83 ld x23,0(x15) + 80005bc4: 00878793 addi x15,x15,8 + +0000000080005bc8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_b31: + aes64ks2 x31, x31, x23 # perform operation + 80005bc8: 7f7f8fb3 aes64ks2 x31,x31,x23 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zkne_aes64ks2_cg_cmp_rd_rs1_b31, Zkne_aes64ks2_cg_cmp_rd_rs1_b31_str) + 80005bcc: 00093203 ld x4,0(x18) + 80005bd0: 01f20c63 beq x4,x31,80005be8 + 80005bd4: 12c022ef jal x5,80007d00 + 80005bd8: 80005bc8 .word 0x80005bc8 + 80005bdc: 00000000 .word 0x00000000 + 80005be0: 80017a40 .word 0x80017a40 + 80005be4: 00000000 .word 0x00000000 + 80005be8: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xa9b1493fa2b82394 + 80005bec: 0007bb83 ld x23,0(x15) + 80005bf0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x47e8085960cc20cd + 80005bf4: 0007b003 ld x0,0(x15) + 80005bf8: 00878793 addi x15,x15,8 + +0000000080005bfc : +Zkne_aes64ks2_cg_cmp_rd_rs2_b0: + aes64ks2 x0, x23, x0 # perform operation + 80005bfc: 7e0b8033 aes64ks2 x0,x23,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zkne_aes64ks2_cg_cmp_rd_rs2_b0, Zkne_aes64ks2_cg_cmp_rd_rs2_b0_str) + 80005c00: 00093203 ld x4,0(x18) + 80005c04: 00020c63 beq x4,x0,80005c1c + 80005c08: 0f8022ef jal x5,80007d00 + 80005c0c: 80005bfc .word 0x80005bfc + 80005c10: 00000000 .word 0x00000000 + 80005c14: 80017a7c .word 0x80017a7c + 80005c18: 00000000 .word 0x00000000 + 80005c1c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa8e0d0b837800ac1 + 80005c20: 0007bd03 ld x26,0(x15) + 80005c24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x0be03d2815123761 + 80005c28: 0007b083 ld x1,0(x15) + 80005c2c: 00878793 addi x15,x15,8 + +0000000080005c30 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b1: + aes64ks2 x1, x26, x1 # perform operation + 80005c30: 7e1d00b3 aes64ks2 x1,x26,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zkne_aes64ks2_cg_cmp_rd_rs2_b1, Zkne_aes64ks2_cg_cmp_rd_rs2_b1_str) + 80005c34: 00093203 ld x4,0(x18) + 80005c38: 00120c63 beq x4,x1,80005c50 + 80005c3c: 0c4022ef jal x5,80007d00 + 80005c40: 80005c30 .word 0x80005c30 + 80005c44: 00000000 .word 0x00000000 + 80005c48: 80017ab7 .word 0x80017ab7 + 80005c4c: 00000000 .word 0x00000000 + 80005c50: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xc6aca23c9b4f9102 + 80005c54: 0007be03 ld x28,0(x15) + 80005c58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xd85fb7b51d075914 + 80005c5c: 0007b103 ld x2,0(x15) + 80005c60: 00878793 addi x15,x15,8 + +0000000080005c64 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b2: + aes64ks2 x2, x28, x2 # perform operation + 80005c64: 7e2e0133 aes64ks2 x2,x28,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zkne_aes64ks2_cg_cmp_rd_rs2_b2, Zkne_aes64ks2_cg_cmp_rd_rs2_b2_str) + 80005c68: 00093203 ld x4,0(x18) + 80005c6c: 00220c63 beq x4,x2,80005c84 + 80005c70: 090022ef jal x5,80007d00 + 80005c74: 80005c64 .word 0x80005c64 + 80005c78: 00000000 .word 0x00000000 + 80005c7c: 80017af2 .word 0x80017af2 + 80005c80: 00000000 .word 0x00000000 + 80005c84: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0d6a74f819231c7d + 80005c88: 0007bc03 ld x24,0(x15) + 80005c8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xcd14588452a455e9 + 80005c90: 0007b183 ld x3,0(x15) + 80005c94: 00878793 addi x15,x15,8 + +0000000080005c98 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b3: + aes64ks2 x3, x24, x3 # perform operation + 80005c98: 7e3c01b3 aes64ks2 x3,x24,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zkne_aes64ks2_cg_cmp_rd_rs2_b3, Zkne_aes64ks2_cg_cmp_rd_rs2_b3_str) + 80005c9c: 00093203 ld x4,0(x18) + 80005ca0: 00320c63 beq x4,x3,80005cb8 + 80005ca4: 05c022ef jal x5,80007d00 + 80005ca8: 80005c98 .word 0x80005c98 + 80005cac: 00000000 .word 0x00000000 + 80005cb0: 80017b2d .word 0x80017b2d + 80005cb4: 00000000 .word 0x00000000 + 80005cb8: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80005cbc: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80005cc0: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x458325fcfb2f4dd6 + 80005cc4: 0007b103 ld x2,0(x15) + 80005cc8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x020da20fd7edb6c6 + 80005ccc: 0007b203 ld x4,0(x15) + 80005cd0: 00878793 addi x15,x15,8 + +0000000080005cd4 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b4: + aes64ks2 x4, x2, x4 # perform operation + 80005cd4: 7e410233 aes64ks2 x4,x2,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zkne_aes64ks2_cg_cmp_rd_rs2_b4, Zkne_aes64ks2_cg_cmp_rd_rs2_b4_str) + 80005cd8: 00093683 ld x13,0(x18) + 80005cdc: 00468c63 beq x13,x4,80005cf4 + 80005ce0: 0600276f jal x14,80007d40 + 80005ce4: 80005cd4 .word 0x80005cd4 + 80005ce8: 00000000 .word 0x00000000 + 80005cec: 80017b68 .word 0x80017b68 + 80005cf0: 00000000 .word 0x00000000 + 80005cf4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xe73770a6017c7dc6 + 80005cf8: 0007ba83 ld x21,0(x15) + 80005cfc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x4e0341d7fee54b80 + 80005d00: 0007b283 ld x5,0(x15) + 80005d04: 00878793 addi x15,x15,8 + +0000000080005d08 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b5: + aes64ks2 x5, x21, x5 # perform operation + 80005d08: 7e5a82b3 aes64ks2 x5,x21,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zkne_aes64ks2_cg_cmp_rd_rs2_b5, Zkne_aes64ks2_cg_cmp_rd_rs2_b5_str) + 80005d0c: 00093683 ld x13,0(x18) + 80005d10: 00568c63 beq x13,x5,80005d28 + 80005d14: 02c0276f jal x14,80007d40 + 80005d18: 80005d08 .word 0x80005d08 + 80005d1c: 00000000 .word 0x00000000 + 80005d20: 80017ba3 .word 0x80017ba3 + 80005d24: 00000000 .word 0x00000000 + 80005d28: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x0bf3c3d268116029 + 80005d2c: 0007b003 ld x0,0(x15) + 80005d30: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xb9441b737a32a06d + 80005d34: 0007b303 ld x6,0(x15) + 80005d38: 00878793 addi x15,x15,8 + +0000000080005d3c : +Zkne_aes64ks2_cg_cmp_rd_rs2_b6: + aes64ks2 x6, x0, x6 # perform operation + 80005d3c: 7e600333 aes64ks2 x6,x0,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zkne_aes64ks2_cg_cmp_rd_rs2_b6, Zkne_aes64ks2_cg_cmp_rd_rs2_b6_str) + 80005d40: 00093683 ld x13,0(x18) + 80005d44: 00668c63 beq x13,x6,80005d5c + 80005d48: 7f90176f jal x14,80007d40 + 80005d4c: 80005d3c .word 0x80005d3c + 80005d50: 00000000 .word 0x00000000 + 80005d54: 80017bde .word 0x80017bde + 80005d58: 00000000 .word 0x00000000 + 80005d5c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x43a52b5cee1dab80 + 80005d60: 0007b603 ld x12,0(x15) + 80005d64: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x3d519dff301d508e + 80005d68: 0007b383 ld x7,0(x15) + 80005d6c: 00878793 addi x15,x15,8 + +0000000080005d70 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b7: + aes64ks2 x7, x12, x7 # perform operation + 80005d70: 7e7603b3 aes64ks2 x7,x12,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zkne_aes64ks2_cg_cmp_rd_rs2_b7, Zkne_aes64ks2_cg_cmp_rd_rs2_b7_str) + 80005d74: 00093683 ld x13,0(x18) + 80005d78: 00768c63 beq x13,x7,80005d90 + 80005d7c: 7c50176f jal x14,80007d40 + 80005d80: 80005d70 .word 0x80005d70 + 80005d84: 00000000 .word 0x00000000 + 80005d88: 80017c19 .word 0x80017c19 + 80005d8c: 00000000 .word 0x00000000 + 80005d90: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x72cfab3a6d7d3837 + 80005d94: 0007b003 ld x0,0(x15) + 80005d98: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x10f6fbc9f87a6c18 + 80005d9c: 0007b403 ld x8,0(x15) + 80005da0: 00878793 addi x15,x15,8 + +0000000080005da4 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b8: + aes64ks2 x8, x0, x8 # perform operation + 80005da4: 7e800433 aes64ks2 x8,x0,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zkne_aes64ks2_cg_cmp_rd_rs2_b8, Zkne_aes64ks2_cg_cmp_rd_rs2_b8_str) + 80005da8: 00093683 ld x13,0(x18) + 80005dac: 00868c63 beq x13,x8,80005dc4 + 80005db0: 7910176f jal x14,80007d40 + 80005db4: 80005da4 .word 0x80005da4 + 80005db8: 00000000 .word 0x00000000 + 80005dbc: 80017c54 .word 0x80017c54 + 80005dc0: 00000000 .word 0x00000000 + 80005dc4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xac288838115f226e + 80005dc8: 0007be83 ld x29,0(x15) + 80005dcc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xd36834762890cc45 + 80005dd0: 0007b483 ld x9,0(x15) + 80005dd4: 00878793 addi x15,x15,8 + +0000000080005dd8 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b9: + aes64ks2 x9, x29, x9 # perform operation + 80005dd8: 7e9e84b3 aes64ks2 x9,x29,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zkne_aes64ks2_cg_cmp_rd_rs2_b9, Zkne_aes64ks2_cg_cmp_rd_rs2_b9_str) + 80005ddc: 00093683 ld x13,0(x18) + 80005de0: 00968c63 beq x13,x9,80005df8 + 80005de4: 75d0176f jal x14,80007d40 + 80005de8: 80005dd8 .word 0x80005dd8 + 80005dec: 00000000 .word 0x00000000 + 80005df0: 80017c8f .word 0x80017c8f + 80005df4: 00000000 .word 0x00000000 + 80005df8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x1c4bfc48e4bbf6ec + 80005dfc: 0007be83 ld x29,0(x15) + 80005e00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x6edd7ca4991cd39d + 80005e04: 0007b503 ld x10,0(x15) + 80005e08: 00878793 addi x15,x15,8 + +0000000080005e0c : +Zkne_aes64ks2_cg_cmp_rd_rs2_b10: + aes64ks2 x10, x29, x10 # perform operation + 80005e0c: 7eae8533 aes64ks2 x10,x29,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zkne_aes64ks2_cg_cmp_rd_rs2_b10, Zkne_aes64ks2_cg_cmp_rd_rs2_b10_str) + 80005e10: 00093683 ld x13,0(x18) + 80005e14: 00a68c63 beq x13,x10,80005e2c + 80005e18: 7290176f jal x14,80007d40 + 80005e1c: 80005e0c .word 0x80005e0c + 80005e20: 00000000 .word 0x00000000 + 80005e24: 80017cca .word 0x80017cca + 80005e28: 00000000 .word 0x00000000 + 80005e2c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x5789999edd98012f + 80005e30: 0007b183 ld x3,0(x15) + 80005e34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xfc6c7c6ba824fa35 + 80005e38: 0007b583 ld x11,0(x15) + 80005e3c: 00878793 addi x15,x15,8 + +0000000080005e40 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b11: + aes64ks2 x11, x3, x11 # perform operation + 80005e40: 7eb185b3 aes64ks2 x11,x3,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zkne_aes64ks2_cg_cmp_rd_rs2_b11, Zkne_aes64ks2_cg_cmp_rd_rs2_b11_str) + 80005e44: 00093683 ld x13,0(x18) + 80005e48: 00b68c63 beq x13,x11,80005e60 + 80005e4c: 6f50176f jal x14,80007d40 + 80005e50: 80005e40 .word 0x80005e40 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 80017d06 .word 0x80017d06 + 80005e5c: 00000000 .word 0x00000000 + 80005e60: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xfcd0d93b82c16e5f + 80005e64: 0007bf83 ld x31,0(x15) + 80005e68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x0766ca1dd32bd626 + 80005e6c: 0007b603 ld x12,0(x15) + 80005e70: 00878793 addi x15,x15,8 + +0000000080005e74 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b12: + aes64ks2 x12, x31, x12 # perform operation + 80005e74: 7ecf8633 aes64ks2 x12,x31,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zkne_aes64ks2_cg_cmp_rd_rs2_b12, Zkne_aes64ks2_cg_cmp_rd_rs2_b12_str) + 80005e78: 00093683 ld x13,0(x18) + 80005e7c: 00c68c63 beq x13,x12,80005e94 + 80005e80: 6c10176f jal x14,80007d40 + 80005e84: 80005e74 .word 0x80005e74 + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 80017d42 .word 0x80017d42 + 80005e90: 00000000 .word 0x00000000 + 80005e94: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e98: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e9c: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa9baf926c9537c78 + 80005ea0: 0007bd03 ld x26,0(x15) + 80005ea4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x59d2e06d25d2c72d + 80005ea8: 0007b683 ld x13,0(x15) + 80005eac: 00878793 addi x15,x15,8 + +0000000080005eb0 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b13: + aes64ks2 x13, x26, x13 # perform operation + 80005eb0: 7edd06b3 aes64ks2 x13,x26,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zkne_aes64ks2_cg_cmp_rd_rs2_b13, Zkne_aes64ks2_cg_cmp_rd_rs2_b13_str) + 80005eb4: 00093383 ld x7,0(x18) + 80005eb8: 00d38c63 beq x7,x13,80005ed0 + 80005ebc: 65d0146f jal x8,80007d18 + 80005ec0: 80005eb0 .word 0x80005eb0 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 80017d7e .word 0x80017d7e + 80005ecc: 00000000 .word 0x00000000 + 80005ed0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x530e6a8437dc2197 + 80005ed4: 0007bb83 ld x23,0(x15) + 80005ed8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x8cd3f1ee9f270615 + 80005edc: 0007b703 ld x14,0(x15) + 80005ee0: 00878793 addi x15,x15,8 + +0000000080005ee4 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b14: + aes64ks2 x14, x23, x14 # perform operation + 80005ee4: 7eeb8733 aes64ks2 x14,x23,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zkne_aes64ks2_cg_cmp_rd_rs2_b14, Zkne_aes64ks2_cg_cmp_rd_rs2_b14_str) + 80005ee8: 00093383 ld x7,0(x18) + 80005eec: 00e38c63 beq x7,x14,80005f04 + 80005ef0: 6290146f jal x8,80007d18 + 80005ef4: 80005ee4 .word 0x80005ee4 + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 80017dba .word 0x80017dba + 80005f00: 00000000 .word 0x00000000 + 80005f04: 00890913 addi x18,x18,8 + + mv x10, x15 # switch data pointer register to avoid conflict with test + 80005f08: 00078513 addi x10,x15,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x8de4a66ab3fe52cf + 80005f0c: 00053483 ld x9,0(x10) + 80005f10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x82f2516b02a05c6a + 80005f14: 00053783 ld x15,0(x10) + 80005f18: 00850513 addi x10,x10,8 + +0000000080005f1c : +Zkne_aes64ks2_cg_cmp_rd_rs2_b15: + aes64ks2 x15, x9, x15 # perform operation + 80005f1c: 7ef487b3 aes64ks2 x15,x9,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zkne_aes64ks2_cg_cmp_rd_rs2_b15, Zkne_aes64ks2_cg_cmp_rd_rs2_b15_str) + 80005f20: 00093383 ld x7,0(x18) + 80005f24: 00f38c63 beq x7,x15,80005f3c + 80005f28: 5f10146f jal x8,80007d18 + 80005f2c: 80005f1c .word 0x80005f1c + 80005f30: 00000000 .word 0x00000000 + 80005f34: 80017df6 .word 0x80017df6 + 80005f38: 00000000 .word 0x00000000 + 80005f3c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x9017536816c5c97c + 80005f40: 00053e03 ld x28,0(x10) + 80005f44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x2669c1afe385a5df + 80005f48: 00053803 ld x16,0(x10) + 80005f4c: 00850513 addi x10,x10,8 + +0000000080005f50 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b16: + aes64ks2 x16, x28, x16 # perform operation + 80005f50: 7f0e0833 aes64ks2 x16,x28,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zkne_aes64ks2_cg_cmp_rd_rs2_b16, Zkne_aes64ks2_cg_cmp_rd_rs2_b16_str) + 80005f54: 00093383 ld x7,0(x18) + 80005f58: 01038c63 beq x7,x16,80005f70 + 80005f5c: 5bd0146f jal x8,80007d18 + 80005f60: 80005f50 .word 0x80005f50 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 80017e32 .word 0x80017e32 + 80005f6c: 00000000 .word 0x00000000 + 80005f70: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf77ec8a7d2b25d81 + 80005f74: 00053303 ld x6,0(x10) + 80005f78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7aa36cdc26c3b3cb + 80005f7c: 00053883 ld x17,0(x10) + 80005f80: 00850513 addi x10,x10,8 + +0000000080005f84 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b17: + aes64ks2 x17, x6, x17 # perform operation + 80005f84: 7f1308b3 aes64ks2 x17,x6,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zkne_aes64ks2_cg_cmp_rd_rs2_b17, Zkne_aes64ks2_cg_cmp_rd_rs2_b17_str) + 80005f88: 00093383 ld x7,0(x18) + 80005f8c: 01138c63 beq x7,x17,80005fa4 + 80005f90: 5890146f jal x8,80007d18 + 80005f94: 80005f84 .word 0x80005f84 + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 80017e6e .word 0x80017e6e + 80005fa0: 00000000 .word 0x00000000 + 80005fa4: 00890913 addi x18,x18,8 + + mv x30, x18 # switch signature pointer register to avoid conflict with test + 80005fa8: 00090f13 addi x30,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xce40a9d90c0ffe20 + 80005fac: 00053b83 ld x23,0(x10) + 80005fb0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7489548150151699 + 80005fb4: 00053903 ld x18,0(x10) + 80005fb8: 00850513 addi x10,x10,8 + +0000000080005fbc : +Zkne_aes64ks2_cg_cmp_rd_rs2_b18: + aes64ks2 x18, x23, x18 # perform operation + 80005fbc: 7f2b8933 aes64ks2 x18,x23,x18 + # Check if x18 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x18, Zkne_aes64ks2_cg_cmp_rd_rs2_b18, Zkne_aes64ks2_cg_cmp_rd_rs2_b18_str) + 80005fc0: 000f3383 ld x7,0(x30) + 80005fc4: 01238c63 beq x7,x18,80005fdc + 80005fc8: 5510146f jal x8,80007d18 + 80005fcc: 80005fbc .word 0x80005fbc + 80005fd0: 00000000 .word 0x00000000 + 80005fd4: 80017eaa .word 0x80017eaa + 80005fd8: 00000000 .word 0x00000000 + 80005fdc: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xd966dcdbd773aa3b + 80005fe0: 00053883 ld x17,0(x10) + 80005fe4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x7721c3e790a48f98 + 80005fe8: 00053983 ld x19,0(x10) + 80005fec: 00850513 addi x10,x10,8 + +0000000080005ff0 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b19: + aes64ks2 x19, x17, x19 # perform operation + 80005ff0: 7f3889b3 aes64ks2 x19,x17,x19 + # Check if x19 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x19, Zkne_aes64ks2_cg_cmp_rd_rs2_b19, Zkne_aes64ks2_cg_cmp_rd_rs2_b19_str) + 80005ff4: 000f3383 ld x7,0(x30) + 80005ff8: 01338c63 beq x7,x19,80006010 + 80005ffc: 51d0146f jal x8,80007d18 + 80006000: 80005ff0 .word 0x80005ff0 + 80006004: 00000000 .word 0x00000000 + 80006008: 80017ee6 .word 0x80017ee6 + 8000600c: 00000000 .word 0x00000000 + 80006010: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xff13173168c81411 + 80006014: 00053303 ld x6,0(x10) + 80006018: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6fa464a52f4fdc3d + 8000601c: 00053a03 ld x20,0(x10) + 80006020: 00850513 addi x10,x10,8 + +0000000080006024 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b20: + aes64ks2 x20, x6, x20 # perform operation + 80006024: 7f430a33 aes64ks2 x20,x6,x20 + # Check if x20 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x20, Zkne_aes64ks2_cg_cmp_rd_rs2_b20, Zkne_aes64ks2_cg_cmp_rd_rs2_b20_str) + 80006028: 000f3383 ld x7,0(x30) + 8000602c: 01438c63 beq x7,x20,80006044 + 80006030: 4e90146f jal x8,80007d18 + 80006034: 80006024 .word 0x80006024 + 80006038: 00000000 .word 0x00000000 + 8000603c: 80017f22 .word 0x80017f22 + 80006040: 00000000 .word 0x00000000 + 80006044: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xe6d2921017b63790 + 80006048: 00053d03 ld x26,0(x10) + 8000604c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xfdee3bcd340642d3 + 80006050: 00053a83 ld x21,0(x10) + 80006054: 00850513 addi x10,x10,8 + +0000000080006058 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b21: + aes64ks2 x21, x26, x21 # perform operation + 80006058: 7f5d0ab3 aes64ks2 x21,x26,x21 + # Check if x21 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x21, Zkne_aes64ks2_cg_cmp_rd_rs2_b21, Zkne_aes64ks2_cg_cmp_rd_rs2_b21_str) + 8000605c: 000f3383 ld x7,0(x30) + 80006060: 01538c63 beq x7,x21,80006078 + 80006064: 4b50146f jal x8,80007d18 + 80006068: 80006058 .word 0x80006058 + 8000606c: 00000000 .word 0x00000000 + 80006070: 80017f5e .word 0x80017f5e + 80006074: 00000000 .word 0x00000000 + 80006078: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x711d5c46ccdff270 + 8000607c: 00053d03 ld x26,0(x10) + 80006080: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xbf10eb6483c55009 + 80006084: 00053b03 ld x22,0(x10) + 80006088: 00850513 addi x10,x10,8 + +000000008000608c : +Zkne_aes64ks2_cg_cmp_rd_rs2_b22: + aes64ks2 x22, x26, x22 # perform operation + 8000608c: 7f6d0b33 aes64ks2 x22,x26,x22 + # Check if x22 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x22, Zkne_aes64ks2_cg_cmp_rd_rs2_b22, Zkne_aes64ks2_cg_cmp_rd_rs2_b22_str) + 80006090: 000f3383 ld x7,0(x30) + 80006094: 01638c63 beq x7,x22,800060ac + 80006098: 4810146f jal x8,80007d18 + 8000609c: 8000608c .word 0x8000608c + 800060a0: 00000000 .word 0x00000000 + 800060a4: 80017f9a .word 0x80017f9a + 800060a8: 00000000 .word 0x00000000 + 800060ac: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x430c77abaea01eae + 800060b0: 00053683 ld x13,0(x10) + 800060b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x05ae2568d0feb5af + 800060b8: 00053b83 ld x23,0(x10) + 800060bc: 00850513 addi x10,x10,8 + +00000000800060c0 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b23: + aes64ks2 x23, x13, x23 # perform operation + 800060c0: 7f768bb3 aes64ks2 x23,x13,x23 + # Check if x23 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x23, Zkne_aes64ks2_cg_cmp_rd_rs2_b23, Zkne_aes64ks2_cg_cmp_rd_rs2_b23_str) + 800060c4: 000f3383 ld x7,0(x30) + 800060c8: 01738c63 beq x7,x23,800060e0 + 800060cc: 44d0146f jal x8,80007d18 + 800060d0: 800060c0 .word 0x800060c0 + 800060d4: 00000000 .word 0x00000000 + 800060d8: 80017fd6 .word 0x80017fd6 + 800060dc: 00000000 .word 0x00000000 + 800060e0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x05e3ee2927e83945 + 800060e4: 00053983 ld x19,0(x10) + 800060e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x3eb492b81d80528b + 800060ec: 00053c03 ld x24,0(x10) + 800060f0: 00850513 addi x10,x10,8 + +00000000800060f4 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b24: + aes64ks2 x24, x19, x24 # perform operation + 800060f4: 7f898c33 aes64ks2 x24,x19,x24 + # Check if x24 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x24, Zkne_aes64ks2_cg_cmp_rd_rs2_b24, Zkne_aes64ks2_cg_cmp_rd_rs2_b24_str) + 800060f8: 000f3383 ld x7,0(x30) + 800060fc: 01838c63 beq x7,x24,80006114 + 80006100: 4190146f jal x8,80007d18 + 80006104: 800060f4 .word 0x800060f4 + 80006108: 00000000 .word 0x00000000 + 8000610c: 80018012 .word 0x80018012 + 80006110: 00000000 .word 0x00000000 + 80006114: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x15a3164c0de50271 + 80006118: 00053283 ld x5,0(x10) + 8000611c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xe008135863b97487 + 80006120: 00053c83 ld x25,0(x10) + 80006124: 00850513 addi x10,x10,8 + +0000000080006128 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b25: + aes64ks2 x25, x5, x25 # perform operation + 80006128: 7f928cb3 aes64ks2 x25,x5,x25 + # Check if x25 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x25, Zkne_aes64ks2_cg_cmp_rd_rs2_b25, Zkne_aes64ks2_cg_cmp_rd_rs2_b25_str) + 8000612c: 000f3383 ld x7,0(x30) + 80006130: 01938c63 beq x7,x25,80006148 + 80006134: 3e50146f jal x8,80007d18 + 80006138: 80006128 .word 0x80006128 + 8000613c: 00000000 .word 0x00000000 + 80006140: 8001804e .word 0x8001804e + 80006144: 00000000 .word 0x00000000 + 80006148: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xea7ddf4ac72b5f60 + 8000614c: 00053e83 ld x29,0(x10) + 80006150: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x97794f93a84ff6d7 + 80006154: 00053d03 ld x26,0(x10) + 80006158: 00850513 addi x10,x10,8 + +000000008000615c : +Zkne_aes64ks2_cg_cmp_rd_rs2_b26: + aes64ks2 x26, x29, x26 # perform operation + 8000615c: 7fae8d33 aes64ks2 x26,x29,x26 + # Check if x26 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x26, Zkne_aes64ks2_cg_cmp_rd_rs2_b26, Zkne_aes64ks2_cg_cmp_rd_rs2_b26_str) + 80006160: 000f3383 ld x7,0(x30) + 80006164: 01a38c63 beq x7,x26,8000617c + 80006168: 3b10146f jal x8,80007d18 + 8000616c: 8000615c .word 0x8000615c + 80006170: 00000000 .word 0x00000000 + 80006174: 8001808a .word 0x8001808a + 80006178: 00000000 .word 0x00000000 + 8000617c: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xf179bab945221623 + 80006180: 00053003 ld x0,0(x10) + 80006184: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x3c913a1775cca290 + 80006188: 00053d83 ld x27,0(x10) + 8000618c: 00850513 addi x10,x10,8 + +0000000080006190 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b27: + aes64ks2 x27, x0, x27 # perform operation + 80006190: 7fb00db3 aes64ks2 x27,x0,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x27, Zkne_aes64ks2_cg_cmp_rd_rs2_b27, Zkne_aes64ks2_cg_cmp_rd_rs2_b27_str) + 80006194: 000f3383 ld x7,0(x30) + 80006198: 01b38c63 beq x7,x27,800061b0 + 8000619c: 37d0146f jal x8,80007d18 + 800061a0: 80006190 .word 0x80006190 + 800061a4: 00000000 .word 0x00000000 + 800061a8: 800180c6 .word 0x800180c6 + 800061ac: 00000000 .word 0x00000000 + 800061b0: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x01d5db7260ae7b62 + 800061b4: 00053f83 ld x31,0(x10) + 800061b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x620abd4c8629ab90 + 800061bc: 00053e03 ld x28,0(x10) + 800061c0: 00850513 addi x10,x10,8 + +00000000800061c4 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b28: + aes64ks2 x28, x31, x28 # perform operation + 800061c4: 7fcf8e33 aes64ks2 x28,x31,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x28, Zkne_aes64ks2_cg_cmp_rd_rs2_b28, Zkne_aes64ks2_cg_cmp_rd_rs2_b28_str) + 800061c8: 000f3383 ld x7,0(x30) + 800061cc: 01c38c63 beq x7,x28,800061e4 + 800061d0: 3490146f jal x8,80007d18 + 800061d4: 800061c4 .word 0x800061c4 + 800061d8: 00000000 .word 0x00000000 + 800061dc: 80018102 .word 0x80018102 + 800061e0: 00000000 .word 0x00000000 + 800061e4: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x1bd6635574673ebb + 800061e8: 00053c83 ld x25,0(x10) + 800061ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x937a7d7ecf1cab99 + 800061f0: 00053e83 ld x29,0(x10) + 800061f4: 00850513 addi x10,x10,8 + +00000000800061f8 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b29: + aes64ks2 x29, x25, x29 # perform operation + 800061f8: 7fdc8eb3 aes64ks2 x29,x25,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x29, Zkne_aes64ks2_cg_cmp_rd_rs2_b29, Zkne_aes64ks2_cg_cmp_rd_rs2_b29_str) + 800061fc: 000f3383 ld x7,0(x30) + 80006200: 01d38c63 beq x7,x29,80006218 + 80006204: 3150146f jal x8,80007d18 + 80006208: 800061f8 .word 0x800061f8 + 8000620c: 00000000 .word 0x00000000 + 80006210: 8001813e .word 0x8001813e + 80006214: 00000000 .word 0x00000000 + 80006218: 008f0f13 addi x30,x30,8 + + mv x31, x30 # switch signature pointer register to avoid conflict with test + 8000621c: 000f0f93 addi x31,x30,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xe10977d9d66373d2 + 80006220: 00053003 ld x0,0(x10) + 80006224: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x3dd940f3b1dc8bb7 + 80006228: 00053f03 ld x30,0(x10) + 8000622c: 00850513 addi x10,x10,8 + +0000000080006230 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b30: + aes64ks2 x30, x0, x30 # perform operation + 80006230: 7fe00f33 aes64ks2 x30,x0,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zkne_aes64ks2_cg_cmp_rd_rs2_b30, Zkne_aes64ks2_cg_cmp_rd_rs2_b30_str) + 80006234: 000fb383 ld x7,0(x31) + 80006238: 01e38c63 beq x7,x30,80006250 + 8000623c: 2dd0146f jal x8,80007d18 + 80006240: 80006230 .word 0x80006230 + 80006244: 00000000 .word 0x00000000 + 80006248: 8001817a .word 0x8001817a + 8000624c: 00000000 .word 0x00000000 + 80006250: 008f8f93 addi x31,x31,8 + + mv x27, x31 # switch signature pointer register to avoid conflict with test + 80006254: 000f8d93 addi x27,x31,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xdd62ecf558f6b8ff + 80006258: 00053583 ld x11,0(x10) + 8000625c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x14469cbf22c1fcc7 + 80006260: 00053f83 ld x31,0(x10) + 80006264: 00850513 addi x10,x10,8 + +0000000080006268 : +Zkne_aes64ks2_cg_cmp_rd_rs2_b31: + aes64ks2 x31, x11, x31 # perform operation + 80006268: 7ff58fb3 aes64ks2 x31,x11,x31 + # Check if x31 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x31, Zkne_aes64ks2_cg_cmp_rd_rs2_b31, Zkne_aes64ks2_cg_cmp_rd_rs2_b31_str) + 8000626c: 000db383 ld x7,0(x27) + 80006270: 01f38c63 beq x7,x31,80006288 + 80006274: 2a50146f jal x8,80007d18 + 80006278: 80006268 .word 0x80006268 + 8000627c: 00000000 .word 0x00000000 + 80006280: 800181b6 .word 0x800181b6 + 80006284: 00000000 .word 0x00000000 + 80006288: 008d8d93 addi x27,x27,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xad1e818a8af0fd0f + 8000628c: 00053003 ld x0,0(x10) + 80006290: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0x78908cb17aa81a9d + 80006294: 00053003 ld x0,0(x10) + 80006298: 00850513 addi x10,x10,8 + +000000008000629c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b0: + aes64ks2 x0, x0, x0 # perform operation + 8000629c: 7e000033 aes64ks2 x0,x0,x0 + # Check if x0 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x0, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b0, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b0_str) + 800062a0: 000db383 ld x7,0(x27) + 800062a4: 00038c63 beq x7,x0,800062bc + 800062a8: 2710146f jal x8,80007d18 + 800062ac: 8000629c .word 0x8000629c + 800062b0: 00000000 .word 0x00000000 + 800062b4: 800181f2 .word 0x800181f2 + 800062b8: 00000000 .word 0x00000000 + 800062bc: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x839eb35dc1e30369 + 800062c0: 00053083 ld x1,0(x10) + 800062c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7512175d507d77ff + 800062c8: 00053083 ld x1,0(x10) + 800062cc: 00850513 addi x10,x10,8 + +00000000800062d0 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b1: + aes64ks2 x1, x1, x1 # perform operation + 800062d0: 7e1080b3 aes64ks2 x1,x1,x1 + # Check if x1 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x1, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b1, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b1_str) + 800062d4: 000db383 ld x7,0(x27) + 800062d8: 00138c63 beq x7,x1,800062f0 + 800062dc: 23d0146f jal x8,80007d18 + 800062e0: 800062d0 .word 0x800062d0 + 800062e4: 00000000 .word 0x00000000 + 800062e8: 80018231 .word 0x80018231 + 800062ec: 00000000 .word 0x00000000 + 800062f0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7ee0d82ef4e9eac8 + 800062f4: 00053103 ld x2,0(x10) + 800062f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x12e15582996eade6 + 800062fc: 00053103 ld x2,0(x10) + 80006300: 00850513 addi x10,x10,8 + +0000000080006304 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b2: + aes64ks2 x2, x2, x2 # perform operation + 80006304: 7e210133 aes64ks2 x2,x2,x2 + # Check if x2 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x2, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b2, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b2_str) + 80006308: 000db383 ld x7,0(x27) + 8000630c: 00238c63 beq x7,x2,80006324 + 80006310: 2090146f jal x8,80007d18 + 80006314: 80006304 .word 0x80006304 + 80006318: 00000000 .word 0x00000000 + 8000631c: 80018270 .word 0x80018270 + 80006320: 00000000 .word 0x00000000 + 80006324: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8e13527ec93d7713 + 80006328: 00053183 ld x3,0(x10) + 8000632c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x3a7c3680e0f93bdf + 80006330: 00053183 ld x3,0(x10) + 80006334: 00850513 addi x10,x10,8 + +0000000080006338 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b3: + aes64ks2 x3, x3, x3 # perform operation + 80006338: 7e3181b3 aes64ks2 x3,x3,x3 + # Check if x3 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x3, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b3, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b3_str) + 8000633c: 000db383 ld x7,0(x27) + 80006340: 00338c63 beq x7,x3,80006358 + 80006344: 1d50146f jal x8,80007d18 + 80006348: 80006338 .word 0x80006338 + 8000634c: 00000000 .word 0x00000000 + 80006350: 800182af .word 0x800182af + 80006354: 00000000 .word 0x00000000 + 80006358: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x3a47393c04daeef3 + 8000635c: 00053203 ld x4,0(x10) + 80006360: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x9873a762da72cb70 + 80006364: 00053203 ld x4,0(x10) + 80006368: 00850513 addi x10,x10,8 + +000000008000636c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b4: + aes64ks2 x4, x4, x4 # perform operation + 8000636c: 7e420233 aes64ks2 x4,x4,x4 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b4, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b4_str) + 80006370: 000db383 ld x7,0(x27) + 80006374: 00438c63 beq x7,x4,8000638c + 80006378: 1a10146f jal x8,80007d18 + 8000637c: 8000636c .word 0x8000636c + 80006380: 00000000 .word 0x00000000 + 80006384: 800182ee .word 0x800182ee + 80006388: 00000000 .word 0x00000000 + 8000638c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x28e86560e605e0f0 + 80006390: 00053283 ld x5,0(x10) + 80006394: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7be0ef26b87610b5 + 80006398: 00053283 ld x5,0(x10) + 8000639c: 00850513 addi x10,x10,8 + +00000000800063a0 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b5: + aes64ks2 x5, x5, x5 # perform operation + 800063a0: 7e5282b3 aes64ks2 x5,x5,x5 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b5, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b5_str) + 800063a4: 000db383 ld x7,0(x27) + 800063a8: 00538c63 beq x7,x5,800063c0 + 800063ac: 16d0146f jal x8,80007d18 + 800063b0: 800063a0 .word 0x800063a0 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 8001832d .word 0x8001832d + 800063bc: 00000000 .word 0x00000000 + 800063c0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xd603004e63588637 + 800063c4: 00053303 ld x6,0(x10) + 800063c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x66aee90f5164f855 + 800063cc: 00053303 ld x6,0(x10) + 800063d0: 00850513 addi x10,x10,8 + +00000000800063d4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b6: + aes64ks2 x6, x6, x6 # perform operation + 800063d4: 7e630333 aes64ks2 x6,x6,x6 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b6, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b6_str) + 800063d8: 000db383 ld x7,0(x27) + 800063dc: 00638c63 beq x7,x6,800063f4 + 800063e0: 1390146f jal x8,80007d18 + 800063e4: 800063d4 .word 0x800063d4 + 800063e8: 00000000 .word 0x00000000 + 800063ec: 8001836c .word 0x8001836c + 800063f0: 00000000 .word 0x00000000 + 800063f4: 008d8d93 addi x27,x27,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800063f8: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800063fc: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xe6e3057ffa99d6f9 + 80006400: 00053383 ld x7,0(x10) + 80006404: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7c756e3407fcc050 + 80006408: 00053383 ld x7,0(x10) + 8000640c: 00850513 addi x10,x10,8 + +0000000080006410 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b7: + aes64ks2 x7, x7, x7 # perform operation + 80006410: 7e7383b3 aes64ks2 x7,x7,x7 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b7, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b7_str) + 80006414: 000db203 ld x4,0(x27) + 80006418: 00720c63 beq x4,x7,80006430 + 8000641c: 0e5012ef jal x5,80007d00 + 80006420: 80006410 .word 0x80006410 + 80006424: 00000000 .word 0x00000000 + 80006428: 800183ab .word 0x800183ab + 8000642c: 00000000 .word 0x00000000 + 80006430: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xe3037214a2a6708e + 80006434: 00053403 ld x8,0(x10) + 80006438: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0xefe8ecc84593d42f + 8000643c: 00053403 ld x8,0(x10) + 80006440: 00850513 addi x10,x10,8 + +0000000080006444 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b8: + aes64ks2 x8, x8, x8 # perform operation + 80006444: 7e840433 aes64ks2 x8,x8,x8 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b8, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b8_str) + 80006448: 000db203 ld x4,0(x27) + 8000644c: 00820c63 beq x4,x8,80006464 + 80006450: 0b1012ef jal x5,80007d00 + 80006454: 80006444 .word 0x80006444 + 80006458: 00000000 .word 0x00000000 + 8000645c: 800183ea .word 0x800183ea + 80006460: 00000000 .word 0x00000000 + 80006464: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xa9ddf01199d3477a + 80006468: 00053483 ld x9,0(x10) + 8000646c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x03b3e4b63bbe6f6e + 80006470: 00053483 ld x9,0(x10) + 80006474: 00850513 addi x10,x10,8 + +0000000080006478 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b9: + aes64ks2 x9, x9, x9 # perform operation + 80006478: 7e9484b3 aes64ks2 x9,x9,x9 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b9, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b9_str) + 8000647c: 000db203 ld x4,0(x27) + 80006480: 00920c63 beq x4,x9,80006498 + 80006484: 07d012ef jal x5,80007d00 + 80006488: 80006478 .word 0x80006478 + 8000648c: 00000000 .word 0x00000000 + 80006490: 80018429 .word 0x80018429 + 80006494: 00000000 .word 0x00000000 + 80006498: 008d8d93 addi x27,x27,8 + + mv x18, x10 # switch data pointer register to avoid conflict with test + 8000649c: 00050913 addi x18,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0xa41aa2fa6f5ebdbf + 800064a0: 00093503 ld x10,0(x18) + 800064a4: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x450503a4f23045d9 + 800064a8: 00093503 ld x10,0(x18) + 800064ac: 00890913 addi x18,x18,8 + +00000000800064b0 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b10: + aes64ks2 x10, x10, x10 # perform operation + 800064b0: 7ea50533 aes64ks2 x10,x10,x10 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b10, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b10_str) + 800064b4: 000db203 ld x4,0(x27) + 800064b8: 00a20c63 beq x4,x10,800064d0 + 800064bc: 045012ef jal x5,80007d00 + 800064c0: 800064b0 .word 0x800064b0 + 800064c4: 00000000 .word 0x00000000 + 800064c8: 80018468 .word 0x80018468 + 800064cc: 00000000 .word 0x00000000 + 800064d0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x09539d9f45021cf8 + 800064d4: 00093583 ld x11,0(x18) + 800064d8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs2: x11 = 0xaf5dc43c2eab7436 + 800064dc: 00093583 ld x11,0(x18) + 800064e0: 00890913 addi x18,x18,8 + +00000000800064e4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b11: + aes64ks2 x11, x11, x11 # perform operation + 800064e4: 7eb585b3 aes64ks2 x11,x11,x11 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b11, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b11_str) + 800064e8: 000db203 ld x4,0(x27) + 800064ec: 00b20c63 beq x4,x11,80006504 + 800064f0: 011012ef jal x5,80007d00 + 800064f4: 800064e4 .word 0x800064e4 + 800064f8: 00000000 .word 0x00000000 + 800064fc: 800184a8 .word 0x800184a8 + 80006500: 00000000 .word 0x00000000 + 80006504: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xfe66c4cbdce9609d + 80006508: 00093603 ld x12,0(x18) + 8000650c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs2: x12 = 0x69be5224deb4ac5e + 80006510: 00093603 ld x12,0(x18) + 80006514: 00890913 addi x18,x18,8 + +0000000080006518 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b12: + aes64ks2 x12, x12, x12 # perform operation + 80006518: 7ec60633 aes64ks2 x12,x12,x12 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b12, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b12_str) + 8000651c: 000db203 ld x4,0(x27) + 80006520: 00c20c63 beq x4,x12,80006538 + 80006524: 7dc012ef jal x5,80007d00 + 80006528: 80006518 .word 0x80006518 + 8000652c: 00000000 .word 0x00000000 + 80006530: 800184e8 .word 0x800184e8 + 80006534: 00000000 .word 0x00000000 + 80006538: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0xf49ed7e511427643 + 8000653c: 00093683 ld x13,0(x18) + 80006540: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs2: x13 = 0x50433bd87bf76517 + 80006544: 00093683 ld x13,0(x18) + 80006548: 00890913 addi x18,x18,8 + +000000008000654c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b13: + aes64ks2 x13, x13, x13 # perform operation + 8000654c: 7ed686b3 aes64ks2 x13,x13,x13 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b13, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b13_str) + 80006550: 000db203 ld x4,0(x27) + 80006554: 00d20c63 beq x4,x13,8000656c + 80006558: 7a8012ef jal x5,80007d00 + 8000655c: 8000654c .word 0x8000654c + 80006560: 00000000 .word 0x00000000 + 80006564: 80018528 .word 0x80018528 + 80006568: 00000000 .word 0x00000000 + 8000656c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0xac595944313da443 + 80006570: 00093703 ld x14,0(x18) + 80006574: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs2: x14 = 0xe270d87ada4148e4 + 80006578: 00093703 ld x14,0(x18) + 8000657c: 00890913 addi x18,x18,8 + +0000000080006580 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b14: + aes64ks2 x14, x14, x14 # perform operation + 80006580: 7ee70733 aes64ks2 x14,x14,x14 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b14, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b14_str) + 80006584: 000db203 ld x4,0(x27) + 80006588: 00e20c63 beq x4,x14,800065a0 + 8000658c: 774012ef jal x5,80007d00 + 80006590: 80006580 .word 0x80006580 + 80006594: 00000000 .word 0x00000000 + 80006598: 80018568 .word 0x80018568 + 8000659c: 00000000 .word 0x00000000 + 800065a0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xd6c5c697d27eff53 + 800065a4: 00093783 ld x15,0(x18) + 800065a8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x31c75b708982b8d6 + 800065ac: 00093783 ld x15,0(x18) + 800065b0: 00890913 addi x18,x18,8 + +00000000800065b4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b15: + aes64ks2 x15, x15, x15 # perform operation + 800065b4: 7ef787b3 aes64ks2 x15,x15,x15 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b15, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b15_str) + 800065b8: 000db203 ld x4,0(x27) + 800065bc: 00f20c63 beq x4,x15,800065d4 + 800065c0: 740012ef jal x5,80007d00 + 800065c4: 800065b4 .word 0x800065b4 + 800065c8: 00000000 .word 0x00000000 + 800065cc: 800185a8 .word 0x800185a8 + 800065d0: 00000000 .word 0x00000000 + 800065d4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x460911c2024a4fd5 + 800065d8: 00093803 ld x16,0(x18) + 800065dc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs2: x16 = 0x08802569da7644ef + 800065e0: 00093803 ld x16,0(x18) + 800065e4: 00890913 addi x18,x18,8 + +00000000800065e8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b16: + aes64ks2 x16, x16, x16 # perform operation + 800065e8: 7f080833 aes64ks2 x16,x16,x16 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b16, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b16_str) + 800065ec: 000db203 ld x4,0(x27) + 800065f0: 01020c63 beq x4,x16,80006608 + 800065f4: 70c012ef jal x5,80007d00 + 800065f8: 800065e8 .word 0x800065e8 + 800065fc: 00000000 .word 0x00000000 + 80006600: 800185e8 .word 0x800185e8 + 80006604: 00000000 .word 0x00000000 + 80006608: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0xc8ca97f74386ba5c + 8000660c: 00093883 ld x17,0(x18) + 80006610: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs2: x17 = 0xebe0717f4fc07f61 + 80006614: 00093883 ld x17,0(x18) + 80006618: 00890913 addi x18,x18,8 + +000000008000661c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b17: + aes64ks2 x17, x17, x17 # perform operation + 8000661c: 7f1888b3 aes64ks2 x17,x17,x17 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b17, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b17_str) + 80006620: 000db203 ld x4,0(x27) + 80006624: 01120c63 beq x4,x17,8000663c + 80006628: 6d8012ef jal x5,80007d00 + 8000662c: 8000661c .word 0x8000661c + 80006630: 00000000 .word 0x00000000 + 80006634: 80018628 .word 0x80018628 + 80006638: 00000000 .word 0x00000000 + 8000663c: 008d8d93 addi x27,x27,8 + + mv x19, x18 # switch data pointer register to avoid conflict with test + 80006640: 00090993 addi x19,x18,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs1: x18 = 0xfeabbbedd4bff24f + 80006644: 0009b903 ld x18,0(x19) + 80006648: 00898993 addi x19,x19,8 + RVTEST_TESTDATA_LOAD_INT(x19, x18) # load rs2: x18 = 0xe4e42dce99ec5604 + 8000664c: 0009b903 ld x18,0(x19) + 80006650: 00898993 addi x19,x19,8 + +0000000080006654 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b18: + aes64ks2 x18, x18, x18 # perform operation + 80006654: 7f290933 aes64ks2 x18,x18,x18 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b18, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 000db203 ld x4,0(x27) + 8000665c: 01220c63 beq x4,x18,80006674 + 80006660: 6a0012ef jal x5,80007d00 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 80018668 .word 0x80018668 + 80006670: 00000000 .word 0x00000000 + 80006674: 008d8d93 addi x27,x27,8 + + mv x9, x19 # switch data pointer register to avoid conflict with test + 80006678: 00098493 addi x9,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs1: x19 = 0x38ff2edebb56ca0f + 8000667c: 0004b983 ld x19,0(x9) + 80006680: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x19) # load rs2: x19 = 0xa73722dfd10528f1 + 80006684: 0004b983 ld x19,0(x9) + 80006688: 00848493 addi x9,x9,8 + +000000008000668c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b19: + aes64ks2 x19, x19, x19 # perform operation + 8000668c: 7f3989b3 aes64ks2 x19,x19,x19 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b19, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b19_str) + 80006690: 000db203 ld x4,0(x27) + 80006694: 01320c63 beq x4,x19,800066ac + 80006698: 668012ef jal x5,80007d00 + 8000669c: 8000668c .word 0x8000668c + 800066a0: 00000000 .word 0x00000000 + 800066a4: 800186a8 .word 0x800186a8 + 800066a8: 00000000 .word 0x00000000 + 800066ac: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs1: x20 = 0x3ffda12a73c27ee5 + 800066b0: 0004ba03 ld x20,0(x9) + 800066b4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x20) # load rs2: x20 = 0xce64697375960822 + 800066b8: 0004ba03 ld x20,0(x9) + 800066bc: 00848493 addi x9,x9,8 + +00000000800066c0 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b20: + aes64ks2 x20, x20, x20 # perform operation + 800066c0: 7f4a0a33 aes64ks2 x20,x20,x20 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b20, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b20_str) + 800066c4: 000db203 ld x4,0(x27) + 800066c8: 01420c63 beq x4,x20,800066e0 + 800066cc: 634012ef jal x5,80007d00 + 800066d0: 800066c0 .word 0x800066c0 + 800066d4: 00000000 .word 0x00000000 + 800066d8: 800186e8 .word 0x800186e8 + 800066dc: 00000000 .word 0x00000000 + 800066e0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs1: x21 = 0xd1f7a6be6ce86257 + 800066e4: 0004ba83 ld x21,0(x9) + 800066e8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x21) # load rs2: x21 = 0x9a685d14bf5dc04f + 800066ec: 0004ba83 ld x21,0(x9) + 800066f0: 00848493 addi x9,x9,8 + +00000000800066f4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b21: + aes64ks2 x21, x21, x21 # perform operation + 800066f4: 7f5a8ab3 aes64ks2 x21,x21,x21 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b21, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b21_str) + 800066f8: 000db203 ld x4,0(x27) + 800066fc: 01520c63 beq x4,x21,80006714 + 80006700: 600012ef jal x5,80007d00 + 80006704: 800066f4 .word 0x800066f4 + 80006708: 00000000 .word 0x00000000 + 8000670c: 80018728 .word 0x80018728 + 80006710: 00000000 .word 0x00000000 + 80006714: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs1: x22 = 0xafff095726f906b6 + 80006718: 0004bb03 ld x22,0(x9) + 8000671c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x22) # load rs2: x22 = 0x84800ac905aa7801 + 80006720: 0004bb03 ld x22,0(x9) + 80006724: 00848493 addi x9,x9,8 + +0000000080006728 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b22: + aes64ks2 x22, x22, x22 # perform operation + 80006728: 7f6b0b33 aes64ks2 x22,x22,x22 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b22, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b22_str) + 8000672c: 000db203 ld x4,0(x27) + 80006730: 01620c63 beq x4,x22,80006748 + 80006734: 5cc012ef jal x5,80007d00 + 80006738: 80006728 .word 0x80006728 + 8000673c: 00000000 .word 0x00000000 + 80006740: 80018768 .word 0x80018768 + 80006744: 00000000 .word 0x00000000 + 80006748: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs1: x23 = 0x037c6a12bb397b5b + 8000674c: 0004bb83 ld x23,0(x9) + 80006750: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x23) # load rs2: x23 = 0x3e2825e323acfc4c + 80006754: 0004bb83 ld x23,0(x9) + 80006758: 00848493 addi x9,x9,8 + +000000008000675c : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b23: + aes64ks2 x23, x23, x23 # perform operation + 8000675c: 7f7b8bb3 aes64ks2 x23,x23,x23 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b23, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b23_str) + 80006760: 000db203 ld x4,0(x27) + 80006764: 01720c63 beq x4,x23,8000677c + 80006768: 598012ef jal x5,80007d00 + 8000676c: 8000675c .word 0x8000675c + 80006770: 00000000 .word 0x00000000 + 80006774: 800187a8 .word 0x800187a8 + 80006778: 00000000 .word 0x00000000 + 8000677c: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs1: x24 = 0xedbb45ad21693312 + 80006780: 0004bc03 ld x24,0(x9) + 80006784: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x24) # load rs2: x24 = 0x036df10b138ae27d + 80006788: 0004bc03 ld x24,0(x9) + 8000678c: 00848493 addi x9,x9,8 + +0000000080006790 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b24: + aes64ks2 x24, x24, x24 # perform operation + 80006790: 7f8c0c33 aes64ks2 x24,x24,x24 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b24, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b24_str) + 80006794: 000db203 ld x4,0(x27) + 80006798: 01820c63 beq x4,x24,800067b0 + 8000679c: 564012ef jal x5,80007d00 + 800067a0: 80006790 .word 0x80006790 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 800187e8 .word 0x800187e8 + 800067ac: 00000000 .word 0x00000000 + 800067b0: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs1: x25 = 0xf71cb59cabcd6445 + 800067b4: 0004bc83 ld x25,0(x9) + 800067b8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x25) # load rs2: x25 = 0x87cf1ce033376bf7 + 800067bc: 0004bc83 ld x25,0(x9) + 800067c0: 00848493 addi x9,x9,8 + +00000000800067c4 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b25: + aes64ks2 x25, x25, x25 # perform operation + 800067c4: 7f9c8cb3 aes64ks2 x25,x25,x25 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b25, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b25_str) + 800067c8: 000db203 ld x4,0(x27) + 800067cc: 01920c63 beq x4,x25,800067e4 + 800067d0: 530012ef jal x5,80007d00 + 800067d4: 800067c4 .word 0x800067c4 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 80018828 .word 0x80018828 + 800067e0: 00000000 .word 0x00000000 + 800067e4: 008d8d93 addi x27,x27,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs1: x26 = 0x14eca2f772dc7261 + 800067e8: 0004bd03 ld x26,0(x9) + 800067ec: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x26) # load rs2: x26 = 0xb018b28bf92db852 + 800067f0: 0004bd03 ld x26,0(x9) + 800067f4: 00848493 addi x9,x9,8 + +00000000800067f8 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b26: + aes64ks2 x26, x26, x26 # perform operation + 800067f8: 7fad0d33 aes64ks2 x26,x26,x26 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b26, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b26_str) + 800067fc: 000db203 ld x4,0(x27) + 80006800: 01a20c63 beq x4,x26,80006818 + 80006804: 4fc012ef jal x5,80007d00 + 80006808: 800067f8 .word 0x800067f8 + 8000680c: 00000000 .word 0x00000000 + 80006810: 80018868 .word 0x80018868 + 80006814: 00000000 .word 0x00000000 + 80006818: 008d8d93 addi x27,x27,8 + + mv x30, x27 # switch signature pointer register to avoid conflict with test + 8000681c: 000d8f13 addi x30,x27,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs1: x27 = 0x9ef8454d7c00c157 + 80006820: 0004bd83 ld x27,0(x9) + 80006824: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x27) # load rs2: x27 = 0x13628cb09c9f1d86 + 80006828: 0004bd83 ld x27,0(x9) + 8000682c: 00848493 addi x9,x9,8 + +0000000080006830 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b27: + aes64ks2 x27, x27, x27 # perform operation + 80006830: 7fbd8db3 aes64ks2 x27,x27,x27 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b27, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 000f3203 ld x4,0(x30) + 80006838: 01b20c63 beq x4,x27,80006850 + 8000683c: 4c4012ef jal x5,80007d00 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 800188a8 .word 0x800188a8 + 8000684c: 00000000 .word 0x00000000 + 80006850: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0x05f7c404a12f0325 + 80006854: 0004be03 ld x28,0(x9) + 80006858: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs2: x28 = 0x66df69aabee886f8 + 8000685c: 0004be03 ld x28,0(x9) + 80006860: 00848493 addi x9,x9,8 + +0000000080006864 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b28: + aes64ks2 x28, x28, x28 # perform operation + 80006864: 7fce0e33 aes64ks2 x28,x28,x28 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b28, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 000f3203 ld x4,0(x30) + 8000686c: 01c20c63 beq x4,x28,80006884 + 80006870: 490012ef jal x5,80007d00 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 800188e8 .word 0x800188e8 + 80006880: 00000000 .word 0x00000000 + 80006884: 008f0f13 addi x30,x30,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0x068f818a982f97e1 + 80006888: 0004be83 ld x29,0(x9) + 8000688c: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs2: x29 = 0x29e1c96733441e00 + 80006890: 0004be83 ld x29,0(x9) + 80006894: 00848493 addi x9,x9,8 + +0000000080006898 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b29: + aes64ks2 x29, x29, x29 # perform operation + 80006898: 7fde8eb3 aes64ks2 x29,x29,x29 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b29, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 000f3203 ld x4,0(x30) + 800068a0: 01d20c63 beq x4,x29,800068b8 + 800068a4: 45c012ef jal x5,80007d00 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 80018928 .word 0x80018928 + 800068b4: 00000000 .word 0x00000000 + 800068b8: 008f0f13 addi x30,x30,8 + + mv x2, x30 # switch signature pointer register to avoid conflict with test + 800068bc: 000f0113 addi x2,x30,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x213612cc7e76d54c + 800068c0: 0004bf03 ld x30,0(x9) + 800068c4: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs2: x30 = 0x889bdaa1aa30c12a + 800068c8: 0004bf03 ld x30,0(x9) + 800068cc: 00848493 addi x9,x9,8 + +00000000800068d0 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b30: + aes64ks2 x30, x30, x30 # perform operation + 800068d0: 7fef0f33 aes64ks2 x30,x30,x30 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b30, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b30_str) + 800068d4: 00013203 ld x4,0(x2) + 800068d8: 01e20c63 beq x4,x30,800068f0 + 800068dc: 424012ef jal x5,80007d00 + 800068e0: 800068d0 .word 0x800068d0 + 800068e4: 00000000 .word 0x00000000 + 800068e8: 80018968 .word 0x80018968 + 800068ec: 00000000 .word 0x00000000 + 800068f0: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x7d498f42748b3cd6 + 800068f4: 0004bf83 ld x31,0(x9) + 800068f8: 00848493 addi x9,x9,8 + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs2: x31 = 0xbc9c43b1863a2794 + 800068fc: 0004bf83 ld x31,0(x9) + 80006900: 00848493 addi x9,x9,8 + +0000000080006904 : +Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b31: + aes64ks2 x31, x31, x31 # perform operation + 80006904: 7fff8fb3 aes64ks2 x31,x31,x31 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b31, Zkne_aes64ks2_cg_cmp_rd_rs1_rs2_b31_str) + 80006908: 00013203 ld x4,0(x2) + 8000690c: 01f20c63 beq x4,x31,80006924 + 80006910: 3f0012ef jal x5,80007d00 + 80006914: 80006904 .word 0x80006904 + 80006918: 00000000 .word 0x00000000 + 8000691c: 800189a8 .word 0x800189a8 + 80006920: 00000000 .word 0x00000000 + 80006924: 00810113 addi x2,x2,8 + +0000000080006928 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80006928: 00000513 addi x10,x0,0 + 8000692c: 00000073 ecall + 80006930: fff00513 addi x10,x0,-1 + 80006934: 25800413 addi x8,x0,600 + +0000000080006938 : + 80006938: 34002373 csrrs x6,mscratch,x0 + +000000008000693c : + 8000693c: 2b833383 ld x7,696(x6) + +0000000080006940 : + 80006940: 2a033383 ld x7,672(x6) + +0000000080006944 : + 80006944: 2d033483 ld x9,720(x6) + 80006948: 34049073 csrrw x0,mscratch,x9 + +000000008000694c : + 8000694c: 2c833483 ld x9,712(x6) + 80006950: 305493f3 csrrw x7,mtvec,x9 + 80006954: ffc4f493 andi x9,x9,-4 + 80006958: ffc3f393 andi x7,x7,-4 + 8000695c: 00749e63 bne x9,x7,80006978 + +0000000080006960 : + 80006960: 00030493 addi x9,x6,0 + +0000000080006964 : + 80006964: 0004a783 lw x15,0(x9) + 80006968: 00f3a023 sw x15,0(x7) + 8000696c: 00438393 addi x7,x7,4 + 80006970: 00448493 addi x9,x9,4 + 80006974: fe83c8e3 blt x7,x8,80006964 + 80006978: 0000100f fence.i + +000000008000697c : + 8000697c: 00000013 addi x0,x0,0 + 80006980: 00000497 auipc x9,0x0 + 80006984: 2b048493 addi x9,x9,688 # 80006c30 + 80006988: 00000013 addi x0,x0,0 + 8000698c: 00000013 addi x0,x0,0 + 80006990: 00000013 addi x0,x0,0 + 80006994: 00000013 addi x0,x0,0 + 80006998: 00000013 addi x0,x0,0 + 8000699c: 00000013 addi x0,x0,0 + 800069a0: 10e49863 bne x9,x14,80006ab0 + 800069a4: 00000013 addi x0,x0,0 + 800069a8: 00000013 addi x0,x0,0 + 800069ac: 00000013 addi x0,x0,0 + 800069b0: 00000013 addi x0,x0,0 + 800069b4: 00000013 addi x0,x0,0 + 800069b8: 00000013 addi x0,x0,0 + 800069bc: 00000013 addi x0,x0,0 + 800069c0: 00012517 auipc x10,0x12 + 800069c4: 75250513 addi x10,x10,1874 # 80019112 + 800069c8: 00000013 addi x0,x0,0 + 800069cc: 00000013 addi x0,x0,0 + 800069d0: 00000013 addi x0,x0,0 + 800069d4: 00000013 addi x0,x0,0 + 800069d8: 00000013 addi x0,x0,0 + 800069dc: 00000013 addi x0,x0,0 + 800069e0: 00033097 auipc x1,0x33 + 800069e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800069e8: 00000013 addi x0,x0,0 + 800069ec: 00000013 addi x0,x0,0 + 800069f0: 00000013 addi x0,x0,0 + 800069f4: 00000013 addi x0,x0,0 + 800069f8: 00000013 addi x0,x0,0 + 800069fc: 00000013 addi x0,x0,0 + 80006a00: 00012517 auipc x10,0x12 + 80006a04: 74f50513 addi x10,x10,1871 # 8001914f + 80006a08: 00000013 addi x0,x0,0 + 80006a0c: 00000013 addi x0,x0,0 + 80006a10: 00000013 addi x0,x0,0 + 80006a14: 00000013 addi x0,x0,0 + 80006a18: 00000013 addi x0,x0,0 + 80006a1c: 00000013 addi x0,x0,0 + 80006a20: 00033097 auipc x1,0x33 + 80006a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80006a28: 00000013 addi x0,x0,0 + 80006a2c: 00000013 addi x0,x0,0 + 80006a30: 00000013 addi x0,x0,0 + 80006a34: 00000013 addi x0,x0,0 + 80006a38: 00000013 addi x0,x0,0 + 80006a3c: 00000013 addi x0,x0,0 + 80006a40: 00012517 auipc x10,0x12 + 80006a44: 76f50513 addi x10,x10,1903 # 800191af + 80006a48: 00000013 addi x0,x0,0 + 80006a4c: 00000013 addi x0,x0,0 + 80006a50: 00000013 addi x0,x0,0 + 80006a54: 00000013 addi x0,x0,0 + 80006a58: 00000013 addi x0,x0,0 + 80006a5c: 00000013 addi x0,x0,0 + 80006a60: 00033097 auipc x1,0x33 + 80006a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80006a68: 00000013 addi x0,x0,0 + 80006a6c: 00000013 addi x0,x0,0 + 80006a70: 00000013 addi x0,x0,0 + 80006a74: 00000013 addi x0,x0,0 + 80006a78: 00000013 addi x0,x0,0 + 80006a7c: 00000013 addi x0,x0,0 + 80006a80: 00013517 auipc x10,0x13 + 80006a84: 2da50513 addi x10,x10,730 # 80019d5a + 80006a88: 00000013 addi x0,x0,0 + 80006a8c: 00000013 addi x0,x0,0 + 80006a90: 00000013 addi x0,x0,0 + 80006a94: 00000013 addi x0,x0,0 + 80006a98: 00000013 addi x0,x0,0 + 80006a9c: 00000013 addi x0,x0,0 + 80006aa0: 00033097 auipc x1,0x33 + 80006aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80006aa8: 00033097 auipc x1,0x33 + 80006aac: b5c080e7 jalr x1,-1188(x1) # 80039604 + +0000000080006ab0 : + 80006ab0: 00000013 addi x0,x0,0 + 80006ab4: 00000013 addi x0,x0,0 + 80006ab8: 00000013 addi x0,x0,0 + 80006abc: 00000013 addi x0,x0,0 + 80006ac0: 00006317 auipc x6,0x6 + 80006ac4: 8e830313 addi x6,x6,-1816 # 8000c3a8 + 80006ac8: 00000013 addi x0,x0,0 + 80006acc: 00000013 addi x0,x0,0 + 80006ad0: 00000013 addi x0,x0,0 + 80006ad4: 00000013 addi x0,x0,0 + 80006ad8: 00000013 addi x0,x0,0 + 80006adc: 00000013 addi x0,x0,0 + 80006ae0: 00033303 ld x6,0(x6) + 80006ae4: 00000013 addi x0,x0,0 + 80006ae8: 00000013 addi x0,x0,0 + 80006aec: 00000013 addi x0,x0,0 + 80006af0: 00000013 addi x0,x0,0 + 80006af4: 00000013 addi x0,x0,0 + 80006af8: 00000013 addi x0,x0,0 + 80006afc: 00000013 addi x0,x0,0 + 80006b00: 00015397 auipc x7,0x15 + 80006b04: d5038393 addi x7,x7,-688 # 8001b850 + 80006b08: 00000013 addi x0,x0,0 + 80006b0c: 00000013 addi x0,x0,0 + 80006b10: 00000013 addi x0,x0,0 + 80006b14: 00000013 addi x0,x0,0 + 80006b18: 00000013 addi x0,x0,0 + 80006b1c: 00000013 addi x0,x0,0 + 80006b20: 40730333 sub x6,x6,x7 + 80006b24: 00000013 addi x0,x0,0 + 80006b28: 00000013 addi x0,x0,0 + 80006b2c: 00000013 addi x0,x0,0 + 80006b30: 00000013 addi x0,x0,0 + 80006b34: 00000013 addi x0,x0,0 + 80006b38: 00000013 addi x0,x0,0 + 80006b3c: 00000013 addi x0,x0,0 + 80006b40: 00015417 auipc x8,0x15 + 80006b44: d0040413 addi x8,x8,-768 # 8001b840 + 80006b48: 00000013 addi x0,x0,0 + 80006b4c: 00000013 addi x0,x0,0 + 80006b50: 00000013 addi x0,x0,0 + 80006b54: 00000013 addi x0,x0,0 + 80006b58: 00000013 addi x0,x0,0 + 80006b5c: 00000013 addi x0,x0,0 + 80006b60: 00043203 ld x4,0(x8) + 80006b64: 00620c63 beq x4,x6,80006b7c + 80006b68: 200013ef jal x7,80007d68 + 80006b6c: 80006ab0 .word 0x80006ab0 + 80006b70: 00000000 .word 0x00000000 + 80006b74: 80019303 .word 0x80019303 + 80006b78: 00000000 .word 0x00000000 + +0000000080006b7c : + 80006b7c: 000004b7 lui x9,0x0 + 80006b80: 00048493 addi x9,x9,0 # 0 + 80006b84: 00b49493 slli x9,x9,0xb + 80006b88: 5d648493 addi x9,x9,1494 + 80006b8c: 00b49493 slli x9,x9,0xb + 80006b90: 43748493 addi x9,x9,1079 + 80006b94: 00a49493 slli x9,x9,0xa + 80006b98: 2ad48493 addi x9,x9,685 + 80006b9c: 00e49e63 bne x9,x14,80006bb8 + 80006ba0: 1c8013ef jal x7,80007d68 + 80006ba4: 80006c64 .word 0x80006c64 + 80006ba8: 00000000 .word 0x00000000 + 80006bac: 80019171 .word 0x80019171 + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 00000341 .word 0x00000341 + +0000000080006bb8 : + 80006bb8: 00000013 addi x0,x0,0 + 80006bbc: 00000013 addi x0,x0,0 + 80006bc0: 00012517 auipc x10,0x12 + 80006bc4: 51450513 addi x10,x10,1300 # 800190d4 + 80006bc8: 00000013 addi x0,x0,0 + 80006bcc: 00000013 addi x0,x0,0 + 80006bd0: 00000013 addi x0,x0,0 + 80006bd4: 00000013 addi x0,x0,0 + 80006bd8: 00000013 addi x0,x0,0 + 80006bdc: 00000013 addi x0,x0,0 + 80006be0: 00033097 auipc x1,0x33 + 80006be4: 9c4080e7 jalr x1,-1596(x1) # 800395a4 + 80006be8: 00033097 auipc x1,0x33 + 80006bec: 9fc080e7 jalr x1,-1540(x1) # 800395e4 + +0000000080006bf0 : + 80006bf0: 00000013 addi x0,x0,0 + 80006bf4: 00000013 addi x0,x0,0 + 80006bf8: 00000013 addi x0,x0,0 + 80006bfc: 00000013 addi x0,x0,0 + 80006c00: 00012517 auipc x10,0x12 + 80006c04: 51250513 addi x10,x10,1298 # 80019112 + 80006c08: 00000013 addi x0,x0,0 + 80006c0c: 00000013 addi x0,x0,0 + 80006c10: 00000013 addi x0,x0,0 + 80006c14: 00000013 addi x0,x0,0 + 80006c18: 00000013 addi x0,x0,0 + 80006c1c: 00000013 addi x0,x0,0 + 80006c20: 00033097 auipc x1,0x33 + 80006c24: 984080e7 jalr x1,-1660(x1) # 800395a4 + 80006c28: 00033097 auipc x1,0x33 + 80006c2c: 9dc080e7 jalr x1,-1572(x1) # 80039604 + +0000000080006c30 : + 80006c30: 00000013 addi x0,x0,0 + 80006c34: 00000013 addi x0,x0,0 + 80006c38: 00000013 addi x0,x0,0 + 80006c3c: 00000013 addi x0,x0,0 + 80006c40: 00000717 auipc x14,0x0 + 80006c44: ff070713 addi x14,x14,-16 # 80006c30 + 80006c48: 00000013 addi x0,x0,0 + 80006c4c: 00000013 addi x0,x0,0 + 80006c50: 00000013 addi x0,x0,0 + 80006c54: 00000013 addi x0,x0,0 + 80006c58: 00000013 addi x0,x0,0 + 80006c5c: 00000013 addi x0,x0,0 + 80006c60: cc9ff06f jal x0,80006928 + +0000000080006c64 : + 80006c64: 00000737 lui x14,0x0 + 80006c68: 00070713 addi x14,x14,0 # 0 + 80006c6c: 00b71713 slli x14,x14,0xb + 80006c70: 5d670713 addi x14,x14,1494 + 80006c74: 00b71713 slli x14,x14,0xb + 80006c78: 43770713 addi x14,x14,1079 + 80006c7c: 00a71713 slli x14,x14,0xa + 80006c80: 2ad70713 addi x14,x14,685 + 80006c84: ca5ff06f jal x0,80006928 + 80006c88: 00000013 addi x0,x0,0 + 80006c8c: 00000013 addi x0,x0,0 + 80006c90: 00000013 addi x0,x0,0 + 80006c94: 00000013 addi x0,x0,0 + 80006c98: 00000013 addi x0,x0,0 + 80006c9c: 00000013 addi x0,x0,0 + 80006ca0: 00000013 addi x0,x0,0 + 80006ca4: 00000013 addi x0,x0,0 + 80006ca8: 00000013 addi x0,x0,0 + 80006cac: 00000013 addi x0,x0,0 + 80006cb0: 00000013 addi x0,x0,0 + 80006cb4: 00000013 addi x0,x0,0 + 80006cb8: 00000013 addi x0,x0,0 + 80006cbc: 00000013 addi x0,x0,0 + +0000000080006cc0 : + 80006cc0: 1000006f jal x0,80006dc0 + 80006cc4: 1080006f jal x0,80006dcc + 80006cc8: 1100006f jal x0,80006dd8 + 80006ccc: 1180006f jal x0,80006de4 + 80006cd0: 1200006f jal x0,80006df0 + 80006cd4: 1280006f jal x0,80006dfc + 80006cd8: 1300006f jal x0,80006e08 + 80006cdc: 1380006f jal x0,80006e14 + 80006ce0: 1400006f jal x0,80006e20 + 80006ce4: 1480006f jal x0,80006e2c + 80006ce8: 1500006f jal x0,80006e38 + 80006cec: 1580006f jal x0,80006e44 + 80006cf0: 1600006f jal x0,80006e50 + 80006cf4: 1680006f jal x0,80006e5c + 80006cf8: 1700006f jal x0,80006e68 + 80006cfc: 1780006f jal x0,80006e74 + 80006d00: 1800006f jal x0,80006e80 + 80006d04: 1880006f jal x0,80006e8c + 80006d08: 1900006f jal x0,80006e98 + 80006d0c: 1980006f jal x0,80006ea4 + 80006d10: 1a00006f jal x0,80006eb0 + 80006d14: 1a80006f jal x0,80006ebc + 80006d18: 1b00006f jal x0,80006ec8 + 80006d1c: 1b80006f jal x0,80006ed4 + 80006d20: 1c00006f jal x0,80006ee0 + 80006d24: 1bc0006f jal x0,80006ee0 + 80006d28: 1b80006f jal x0,80006ee0 + 80006d2c: 1b40006f jal x0,80006ee0 + 80006d30: 1b00006f jal x0,80006ee0 + 80006d34: 1ac0006f jal x0,80006ee0 + 80006d38: 1a80006f jal x0,80006ee0 + 80006d3c: 1a40006f jal x0,80006ee0 + 80006d40: 1a00006f jal x0,80006ee0 + 80006d44: 19c0006f jal x0,80006ee0 + 80006d48: 1980006f jal x0,80006ee0 + 80006d4c: 1940006f jal x0,80006ee0 + 80006d50: 1900006f jal x0,80006ee0 + 80006d54: 18c0006f jal x0,80006ee0 + 80006d58: 1880006f jal x0,80006ee0 + 80006d5c: 1840006f jal x0,80006ee0 + 80006d60: 1800006f jal x0,80006ee0 + 80006d64: 17c0006f jal x0,80006ee0 + 80006d68: 1780006f jal x0,80006ee0 + 80006d6c: 1740006f jal x0,80006ee0 + 80006d70: 1700006f jal x0,80006ee0 + 80006d74: 16c0006f jal x0,80006ee0 + 80006d78: 1680006f jal x0,80006ee0 + 80006d7c: 1640006f jal x0,80006ee0 + 80006d80: 1600006f jal x0,80006ee0 + 80006d84: 15c0006f jal x0,80006ee0 + 80006d88: 1580006f jal x0,80006ee0 + 80006d8c: 1540006f jal x0,80006ee0 + 80006d90: 1500006f jal x0,80006ee0 + 80006d94: 14c0006f jal x0,80006ee0 + 80006d98: 1480006f jal x0,80006ee0 + 80006d9c: 1440006f jal x0,80006ee0 + 80006da0: 1400006f jal x0,80006ee0 + 80006da4: 13c0006f jal x0,80006ee0 + 80006da8: 1380006f jal x0,80006ee0 + 80006dac: 1340006f jal x0,80006ee0 + 80006db0: 1300006f jal x0,80006ee0 + 80006db4: 12c0006f jal x0,80006ee0 + 80006db8: 1280006f jal x0,80006ee0 + 80006dbc: 1240006f jal x0,80006ee0 + +0000000080006dc0 : + 80006dc0: 34011173 csrrw x2,mscratch,x2 + 80006dc4: 30f13423 sd x15,776(x2) + 80006dc8: 13c007ef jal x15,80006f04 + 80006dcc: 34011173 csrrw x2,mscratch,x2 + 80006dd0: 30f13423 sd x15,776(x2) + 80006dd4: 130007ef jal x15,80006f04 + 80006dd8: 34011173 csrrw x2,mscratch,x2 + 80006ddc: 30f13423 sd x15,776(x2) + 80006de0: 124007ef jal x15,80006f04 + 80006de4: 34011173 csrrw x2,mscratch,x2 + 80006de8: 30f13423 sd x15,776(x2) + 80006dec: 118007ef jal x15,80006f04 + 80006df0: 34011173 csrrw x2,mscratch,x2 + 80006df4: 30f13423 sd x15,776(x2) + 80006df8: 10c007ef jal x15,80006f04 + 80006dfc: 34011173 csrrw x2,mscratch,x2 + 80006e00: 30f13423 sd x15,776(x2) + 80006e04: 100007ef jal x15,80006f04 + 80006e08: 34011173 csrrw x2,mscratch,x2 + 80006e0c: 30f13423 sd x15,776(x2) + 80006e10: 0f4007ef jal x15,80006f04 + 80006e14: 34011173 csrrw x2,mscratch,x2 + 80006e18: 30f13423 sd x15,776(x2) + 80006e1c: 0e8007ef jal x15,80006f04 + 80006e20: 34011173 csrrw x2,mscratch,x2 + 80006e24: 30f13423 sd x15,776(x2) + 80006e28: 0dc007ef jal x15,80006f04 + 80006e2c: 34011173 csrrw x2,mscratch,x2 + 80006e30: 30f13423 sd x15,776(x2) + 80006e34: 0d0007ef jal x15,80006f04 + 80006e38: 34011173 csrrw x2,mscratch,x2 + 80006e3c: 30f13423 sd x15,776(x2) + 80006e40: 0c4007ef jal x15,80006f04 + 80006e44: 34011173 csrrw x2,mscratch,x2 + 80006e48: 30f13423 sd x15,776(x2) + 80006e4c: 0b8007ef jal x15,80006f04 + 80006e50: 34011173 csrrw x2,mscratch,x2 + 80006e54: 30f13423 sd x15,776(x2) + 80006e58: 0ac007ef jal x15,80006f04 + 80006e5c: 34011173 csrrw x2,mscratch,x2 + 80006e60: 30f13423 sd x15,776(x2) + 80006e64: 0a0007ef jal x15,80006f04 + 80006e68: 34011173 csrrw x2,mscratch,x2 + 80006e6c: 30f13423 sd x15,776(x2) + 80006e70: 094007ef jal x15,80006f04 + 80006e74: 34011173 csrrw x2,mscratch,x2 + 80006e78: 30f13423 sd x15,776(x2) + 80006e7c: 088007ef jal x15,80006f04 + 80006e80: 34011173 csrrw x2,mscratch,x2 + 80006e84: 30f13423 sd x15,776(x2) + 80006e88: 07c007ef jal x15,80006f04 + 80006e8c: 34011173 csrrw x2,mscratch,x2 + 80006e90: 30f13423 sd x15,776(x2) + 80006e94: 070007ef jal x15,80006f04 + 80006e98: 34011173 csrrw x2,mscratch,x2 + 80006e9c: 30f13423 sd x15,776(x2) + 80006ea0: 064007ef jal x15,80006f04 + 80006ea4: 34011173 csrrw x2,mscratch,x2 + 80006ea8: 30f13423 sd x15,776(x2) + 80006eac: 058007ef jal x15,80006f04 + 80006eb0: 34011173 csrrw x2,mscratch,x2 + 80006eb4: 30f13423 sd x15,776(x2) + 80006eb8: 04c007ef jal x15,80006f04 + 80006ebc: 34011173 csrrw x2,mscratch,x2 + 80006ec0: 30f13423 sd x15,776(x2) + 80006ec4: 040007ef jal x15,80006f04 + 80006ec8: 34011173 csrrw x2,mscratch,x2 + 80006ecc: 30f13423 sd x15,776(x2) + 80006ed0: 034007ef jal x15,80006f04 + 80006ed4: 34011173 csrrw x2,mscratch,x2 + 80006ed8: 30f13423 sd x15,776(x2) + 80006edc: 028007ef jal x15,80006f04 + +0000000080006ee0 : + 80006ee0: 00000317 auipc x6,0x0 + 80006ee4: a9c30313 addi x6,x6,-1380 # 8000697c + 80006ee8: 00000013 addi x0,x0,0 + 80006eec: 00000013 addi x0,x0,0 + 80006ef0: 00000013 addi x0,x0,0 + 80006ef4: 00000013 addi x0,x0,0 + 80006ef8: 00000013 addi x0,x0,0 + 80006efc: 00000013 addi x0,x0,0 + 80006f00: 00030067 jalr x0,0(x6) + +0000000080006f04 : + 80006f04: 30e13023 sd x14,768(x2) + 80006f08: 34011773 csrrw x14,mscratch,x2 + 80006f0c: 30e13823 sd x14,784(x2) + 80006f10: 2b013703 ld x14,688(x2) + 80006f14: 00070067 jalr x0,0(x14) + +0000000080006f18 : + 80006f18: 2e913c23 sd x9,760(x2) + 80006f1c: 2e813823 sd x8,752(x2) + 80006f20: 2e713423 sd x7,744(x2) + 80006f24: 2e613023 sd x6,736(x2) + 80006f28: 00000013 addi x0,x0,0 + 80006f2c: 00000013 addi x0,x0,0 + 80006f30: 00000013 addi x0,x0,0 + 80006f34: 00000013 addi x0,x0,0 + 80006f38: 00000013 addi x0,x0,0 + 80006f3c: 00000013 addi x0,x0,0 + 80006f40: 00005317 auipc x6,0x5 + 80006f44: 1c830313 addi x6,x6,456 # 8000c108 + 80006f48: 00000013 addi x0,x0,0 + 80006f4c: 00000013 addi x0,x0,0 + 80006f50: 00000013 addi x0,x0,0 + 80006f54: 00000013 addi x0,x0,0 + 80006f58: 00000013 addi x0,x0,0 + 80006f5c: 00000013 addi x0,x0,0 + 80006f60: 00033383 ld x7,0(x6) + 80006f64: 00138393 addi x7,x7,1 + 80006f68: 00733023 sd x7,0(x6) + 80006f6c: 34202773 csrrs x14,mcause,x0 + +0000000080006f70 : + 80006f70: fff00493 addi x9,x0,-1 + 80006f74: 00d4d493 srli x9,x9,0xd + 80006f78: 00c49493 slli x9,x9,0xc + 80006f7c: fff4c493 xori x9,x9,-1 + 80006f80: 00e4f4b3 and x9,x9,x14 + +0000000080006f84 : + 80006f84: ffe48413 addi x8,x9,-2 + 80006f88: 00041663 bne x8,x0,80006f94 + +0000000080006f8c : + 80006f8c: 500502e3 beq x10,x0,80007c90 + 80006f90: 5b40006f jal x0,80007544 + +0000000080006f94 : + 80006f94: ff848413 addi x8,x9,-8 + 80006f98: 00245413 srli x8,x8,0x2 + 80006f9c: 5a041463 bne x8,x0,80007544 + +0000000080006fa0 : + 80006fa0: 4e0508e3 beq x10,x0,80007c90 + +0000000080006fa4 : + 80006fa4: fff50493 addi x9,x10,-1 + 80006fa8: 00500393 addi x7,x0,5 + 80006fac: 0274e063 bltu x9,x7,80006fcc + 80006fb0: 07300393 addi x7,x0,115 + 80006fb4: 00750463 beq x10,x7,80006fbc + 80006fb8: 08c0006f jal x0,80007044 + +0000000080006fbc : + 80006fbc: 34102573 csrrs x10,mepc,x0 + 80006fc0: 00450413 addi x8,x10,4 + 80006fc4: 34141073 csrrw x0,mepc,x8 + 80006fc8: 0310006f jal x0,800077f8 + +0000000080006fcc : + 80006fcc: 341024f3 csrrs x9,mepc,x0 + 80006fd0: 00448493 addi x9,x9,4 + 80006fd4: 34149073 csrrw x0,mepc,x9 + 80006fd8: 00100393 addi x7,x0,1 + 80006fdc: 00750e63 beq x10,x7,80006ff8 + 80006fe0: 00200393 addi x7,x0,2 + 80006fe4: 02750463 beq x10,x7,8000700c + 80006fe8: 00300393 addi x7,x0,3 + 80006fec: 04750063 beq x10,x7,8000702c + 80006ff0: fff00513 addi x10,x0,-1 + 80006ff4: 0050006f jal x0,800077f8 + +0000000080006ff8 : + 80006ff8: fff00493 addi x9,x0,-1 + 80006ffc: 03e4d493 srli x9,x9,0x3e + 80007000: 00b49493 slli x9,x9,0xb + 80007004: 3004a073 csrrs x0,mstatus,x9 + 80007008: 7f00006f jal x0,800077f8 + +000000008000700c : + 8000700c: fff00493 addi x9,x0,-1 + 80007010: 03e4d493 srli x9,x9,0x3e + 80007014: 00b49493 slli x9,x9,0xb + 80007018: 3004b073 csrrc x0,mstatus,x9 + 8000701c: 00100493 addi x9,x0,1 + 80007020: 00b49493 slli x9,x9,0xb + 80007024: 3004a073 csrrs x0,mstatus,x9 + 80007028: 7d00006f jal x0,800077f8 + +000000008000702c : + 8000702c: fff00493 addi x9,x0,-1 + 80007030: 03e4d493 srli x9,x9,0x3e + 80007034: 00b49493 slli x9,x9,0xb + 80007038: 3004b073 csrrc x0,mstatus,x9 + 8000703c: 7bc0006f jal x0,800077f8 + +0000000080007040 : + 80007040: 00000013 addi x0,x0,0 + +0000000080007044 : + 80007044: 00000013 addi x0,x0,0 + 80007048: 00000013 addi x0,x0,0 + 8000704c: 00000013 addi x0,x0,0 + 80007050: 00000013 addi x0,x0,0 + 80007054: 00000013 addi x0,x0,0 + 80007058: 00000013 addi x0,x0,0 + 8000705c: 00000013 addi x0,x0,0 + 80007060: 00000397 auipc x7,0x0 + 80007064: 17038393 addi x7,x7,368 # 800071d0 + 80007068: 00000013 addi x0,x0,0 + 8000706c: 00000013 addi x0,x0,0 + 80007070: 00000013 addi x0,x0,0 + 80007074: 00000013 addi x0,x0,0 + 80007078: 00000013 addi x0,x0,0 + 8000707c: 00000013 addi x0,x0,0 + +0000000080007080 : + 80007080: 0003e403 lwu x8,0(x7) + 80007084: 00a40863 beq x8,x10,80007094 + 80007088: 04040863 beq x8,x0,800070d8 + 8000708c: 00838393 addi x7,x7,8 + 80007090: ff1ff06f jal x0,80007080 + +0000000080007094 : + 80007094: 00008493 addi x9,x1,0 + 80007098: 00000013 addi x0,x0,0 + 8000709c: 00000013 addi x0,x0,0 + 800070a0: 00000097 auipc x1,0x0 + 800070a4: 02408093 addi x1,x1,36 # 800070c4 + 800070a8: 00000013 addi x0,x0,0 + 800070ac: 00000013 addi x0,x0,0 + 800070b0: 00000013 addi x0,x0,0 + 800070b4: 00000013 addi x0,x0,0 + 800070b8: 00000013 addi x0,x0,0 + 800070bc: 00000013 addi x0,x0,0 + 800070c0: 00038067 jalr x0,0(x7) + +00000000800070c4 : + 800070c4: 00048093 addi x1,x9,0 + 800070c8: 34102473 csrrs x8,mepc,x0 + 800070cc: 00440413 addi x8,x8,4 + 800070d0: 34141073 csrrw x0,mepc,x8 + 800070d4: 7240006f jal x0,800077f8 + +00000000800070d8 : + 800070d8: 00050493 addi x9,x10,0 + 800070dc: 00000013 addi x0,x0,0 + 800070e0: 00013517 auipc x10,0x13 + 800070e4: 6b150513 addi x10,x10,1713 # 8001a791 + 800070e8: 00000013 addi x0,x0,0 + 800070ec: 00000013 addi x0,x0,0 + 800070f0: 00000013 addi x0,x0,0 + 800070f4: 00000013 addi x0,x0,0 + 800070f8: 00000013 addi x0,x0,0 + 800070fc: 00000013 addi x0,x0,0 + 80007100: 00032097 auipc x1,0x32 + 80007104: 4a4080e7 jalr x1,1188(x1) # 800395a4 + 80007108: 00048513 addi x10,x9,0 + 8000710c: 02000593 addi x11,x0,32 + 80007110: 728020ef jal x1,80009838 + 80007114: 00000013 addi x0,x0,0 + 80007118: 00000013 addi x0,x0,0 + 8000711c: 00000013 addi x0,x0,0 + 80007120: 00012517 auipc x10,0x12 + 80007124: a3850513 addi x10,x10,-1480 # 80018b58 + 80007128: 00000013 addi x0,x0,0 + 8000712c: 00000013 addi x0,x0,0 + 80007130: 00000013 addi x0,x0,0 + 80007134: 00000013 addi x0,x0,0 + 80007138: 00000013 addi x0,x0,0 + 8000713c: 00000013 addi x0,x0,0 + 80007140: 00032097 auipc x1,0x32 + 80007144: 464080e7 jalr x1,1124(x1) # 800395a4 + 80007148: 00000013 addi x0,x0,0 + 8000714c: 00000013 addi x0,x0,0 + 80007150: 00000013 addi x0,x0,0 + 80007154: 00000013 addi x0,x0,0 + 80007158: 00000013 addi x0,x0,0 + 8000715c: 00000013 addi x0,x0,0 + 80007160: 00012517 auipc x10,0x12 + 80007164: 0b850513 addi x10,x10,184 # 80019218 + 80007168: 00000013 addi x0,x0,0 + 8000716c: 00000013 addi x0,x0,0 + 80007170: 00000013 addi x0,x0,0 + 80007174: 00000013 addi x0,x0,0 + 80007178: 00000013 addi x0,x0,0 + 8000717c: 00000013 addi x0,x0,0 + 80007180: 00032097 auipc x1,0x32 + 80007184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80007188: 00000013 addi x0,x0,0 + 8000718c: 00000013 addi x0,x0,0 + 80007190: 00000013 addi x0,x0,0 + 80007194: 00000013 addi x0,x0,0 + 80007198: 00000013 addi x0,x0,0 + 8000719c: 00000013 addi x0,x0,0 + 800071a0: 00012517 auipc x10,0x12 + 800071a4: f7250513 addi x10,x10,-142 # 80019112 + 800071a8: 00000013 addi x0,x0,0 + 800071ac: 00000013 addi x0,x0,0 + 800071b0: 00000013 addi x0,x0,0 + 800071b4: 00000013 addi x0,x0,0 + 800071b8: 00000013 addi x0,x0,0 + 800071bc: 00000013 addi x0,x0,0 + 800071c0: 00032097 auipc x1,0x32 + 800071c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800071c8: 00032097 auipc x1,0x32 + 800071cc: 43c080e7 jalr x1,1084(x1) # 80039604 + +00000000800071d0 : + 800071d0: 30002573 .word 0x30002573 + 800071d4: 00008067 jalr x0,0(x1) + 800071d8: 30059073 .word 0x30059073 + 800071dc: 00008067 jalr x0,0(x1) + 800071e0: 3005a073 .word 0x3005a073 + 800071e4: 00008067 jalr x0,0(x1) + 800071e8: 3005b073 .word 0x3005b073 + 800071ec: 00008067 jalr x0,0(x1) + 800071f0: 30402573 .word 0x30402573 + 800071f4: 00008067 jalr x0,0(x1) + 800071f8: 30459073 .word 0x30459073 + 800071fc: 00008067 jalr x0,0(x1) + 80007200: 3045a073 .word 0x3045a073 + 80007204: 00008067 jalr x0,0(x1) + 80007208: 3045b073 .word 0x3045b073 + 8000720c: 00008067 jalr x0,0(x1) + 80007210: 30602573 .word 0x30602573 + 80007214: 00008067 jalr x0,0(x1) + 80007218: 30659073 .word 0x30659073 + 8000721c: 00008067 jalr x0,0(x1) + 80007220: 3065a073 .word 0x3065a073 + 80007224: 00008067 jalr x0,0(x1) + 80007228: 3065b073 .word 0x3065b073 + 8000722c: 00008067 jalr x0,0(x1) + 80007230: 30a02573 .word 0x30a02573 + 80007234: 00008067 jalr x0,0(x1) + 80007238: 30a59073 .word 0x30a59073 + 8000723c: 00008067 jalr x0,0(x1) + 80007240: 30a5a073 .word 0x30a5a073 + 80007244: 00008067 jalr x0,0(x1) + 80007248: 30a5b073 .word 0x30a5b073 + 8000724c: 00008067 jalr x0,0(x1) + 80007250: 34402573 .word 0x34402573 + 80007254: 00008067 jalr x0,0(x1) + 80007258: 34459073 .word 0x34459073 + 8000725c: 00008067 jalr x0,0(x1) + 80007260: 3445a073 .word 0x3445a073 + 80007264: 00008067 jalr x0,0(x1) + 80007268: 3445b073 .word 0x3445b073 + 8000726c: 00008067 jalr x0,0(x1) + 80007270: 74702573 .word 0x74702573 + 80007274: 00008067 jalr x0,0(x1) + 80007278: 74759073 .word 0x74759073 + 8000727c: 00008067 jalr x0,0(x1) + 80007280: 7475a073 .word 0x7475a073 + 80007284: 00008067 jalr x0,0(x1) + 80007288: 7475b073 .word 0x7475b073 + 8000728c: 00008067 jalr x0,0(x1) + 80007290: 32002573 .word 0x32002573 + 80007294: 00008067 jalr x0,0(x1) + 80007298: 32059073 .word 0x32059073 + 8000729c: 00008067 jalr x0,0(x1) + 800072a0: 3205a073 .word 0x3205a073 + 800072a4: 00008067 jalr x0,0(x1) + 800072a8: 3205b073 .word 0x3205b073 + 800072ac: 00008067 jalr x0,0(x1) + 800072b0: b0002573 .word 0xb0002573 + 800072b4: 00008067 jalr x0,0(x1) + 800072b8: b0059073 .word 0xb0059073 + 800072bc: 00008067 jalr x0,0(x1) + 800072c0: b005a073 .word 0xb005a073 + 800072c4: 00008067 jalr x0,0(x1) + 800072c8: b005b073 .word 0xb005b073 + 800072cc: 00008067 jalr x0,0(x1) + 800072d0: b0202573 .word 0xb0202573 + 800072d4: 00008067 jalr x0,0(x1) + 800072d8: b0259073 .word 0xb0259073 + 800072dc: 00008067 jalr x0,0(x1) + 800072e0: b025a073 .word 0xb025a073 + 800072e4: 00008067 jalr x0,0(x1) + 800072e8: b025b073 .word 0xb025b073 + 800072ec: 00008067 jalr x0,0(x1) + 800072f0: 10002573 .word 0x10002573 + 800072f4: 00008067 jalr x0,0(x1) + 800072f8: 10059073 .word 0x10059073 + 800072fc: 00008067 jalr x0,0(x1) + 80007300: 1005a073 .word 0x1005a073 + 80007304: 00008067 jalr x0,0(x1) + 80007308: 1005b073 .word 0x1005b073 + 8000730c: 00008067 jalr x0,0(x1) + 80007310: 10402573 .word 0x10402573 + 80007314: 00008067 jalr x0,0(x1) + 80007318: 10459073 .word 0x10459073 + 8000731c: 00008067 jalr x0,0(x1) + 80007320: 1045a073 .word 0x1045a073 + 80007324: 00008067 jalr x0,0(x1) + 80007328: 1045b073 .word 0x1045b073 + 8000732c: 00008067 jalr x0,0(x1) + 80007330: 10602573 .word 0x10602573 + 80007334: 00008067 jalr x0,0(x1) + 80007338: 10659073 .word 0x10659073 + 8000733c: 00008067 jalr x0,0(x1) + 80007340: 1065a073 .word 0x1065a073 + 80007344: 00008067 jalr x0,0(x1) + 80007348: 1065b073 .word 0x1065b073 + 8000734c: 00008067 jalr x0,0(x1) + 80007350: 10a02573 .word 0x10a02573 + 80007354: 00008067 jalr x0,0(x1) + 80007358: 10a59073 .word 0x10a59073 + 8000735c: 00008067 jalr x0,0(x1) + 80007360: 10a5a073 .word 0x10a5a073 + 80007364: 00008067 jalr x0,0(x1) + 80007368: 10a5b073 .word 0x10a5b073 + 8000736c: 00008067 jalr x0,0(x1) + 80007370: 14402573 .word 0x14402573 + 80007374: 00008067 jalr x0,0(x1) + 80007378: 14459073 .word 0x14459073 + 8000737c: 00008067 jalr x0,0(x1) + 80007380: 1445a073 .word 0x1445a073 + 80007384: 00008067 jalr x0,0(x1) + 80007388: 1445b073 .word 0x1445b073 + 8000738c: 00008067 jalr x0,0(x1) + 80007390: 14d02573 .word 0x14d02573 + 80007394: 00008067 jalr x0,0(x1) + 80007398: 14d59073 .word 0x14d59073 + 8000739c: 00008067 jalr x0,0(x1) + 800073a0: 14d5a073 .word 0x14d5a073 + 800073a4: 00008067 jalr x0,0(x1) + 800073a8: 14d5b073 .word 0x14d5b073 + 800073ac: 00008067 jalr x0,0(x1) + 800073b0: 18002573 .word 0x18002573 + 800073b4: 00008067 jalr x0,0(x1) + 800073b8: 18059073 .word 0x18059073 + 800073bc: 00008067 jalr x0,0(x1) + 800073c0: 1805a073 .word 0x1805a073 + 800073c4: 00008067 jalr x0,0(x1) + 800073c8: 1805b073 .word 0x1805b073 + 800073cc: 00008067 jalr x0,0(x1) + 800073d0: 7a002573 .word 0x7a002573 + 800073d4: 00008067 jalr x0,0(x1) + 800073d8: 7a059073 .word 0x7a059073 + 800073dc: 00008067 jalr x0,0(x1) + 800073e0: 7a05a073 .word 0x7a05a073 + 800073e4: 00008067 jalr x0,0(x1) + 800073e8: 7a05b073 .word 0x7a05b073 + 800073ec: 00008067 jalr x0,0(x1) + 800073f0: 7a102573 .word 0x7a102573 + 800073f4: 00008067 jalr x0,0(x1) + 800073f8: 7a159073 .word 0x7a159073 + 800073fc: 00008067 jalr x0,0(x1) + 80007400: 7a15a073 .word 0x7a15a073 + 80007404: 00008067 jalr x0,0(x1) + 80007408: 7a15b073 .word 0x7a15b073 + 8000740c: 00008067 jalr x0,0(x1) + 80007410: 7a202573 .word 0x7a202573 + 80007414: 00008067 jalr x0,0(x1) + 80007418: 7a259073 .word 0x7a259073 + 8000741c: 00008067 jalr x0,0(x1) + 80007420: 7a25a073 .word 0x7a25a073 + 80007424: 00008067 jalr x0,0(x1) + 80007428: 7a25b073 .word 0x7a25b073 + 8000742c: 00008067 jalr x0,0(x1) + 80007430: 7a302573 .word 0x7a302573 + 80007434: 00008067 jalr x0,0(x1) + 80007438: 7a359073 .word 0x7a359073 + 8000743c: 00008067 jalr x0,0(x1) + 80007440: 7a35a073 .word 0x7a35a073 + 80007444: 00008067 jalr x0,0(x1) + 80007448: 7a35b073 .word 0x7a35b073 + 8000744c: 00008067 jalr x0,0(x1) + 80007450: 7a402573 .word 0x7a402573 + 80007454: 00008067 jalr x0,0(x1) + 80007458: 7a459073 .word 0x7a459073 + 8000745c: 00008067 jalr x0,0(x1) + 80007460: 7a45a073 .word 0x7a45a073 + 80007464: 00008067 jalr x0,0(x1) + 80007468: 7a45b073 .word 0x7a45b073 + 8000746c: 00008067 jalr x0,0(x1) + 80007470: 7a502573 .word 0x7a502573 + 80007474: 00008067 jalr x0,0(x1) + 80007478: 7a559073 .word 0x7a559073 + 8000747c: 00008067 jalr x0,0(x1) + 80007480: 7a55a073 .word 0x7a55a073 + 80007484: 00008067 jalr x0,0(x1) + 80007488: 7a55b073 .word 0x7a55b073 + 8000748c: 00008067 jalr x0,0(x1) + 80007490: 7a802573 .word 0x7a802573 + 80007494: 00008067 jalr x0,0(x1) + 80007498: 7a859073 .word 0x7a859073 + 8000749c: 00008067 jalr x0,0(x1) + 800074a0: 7a85a073 .word 0x7a85a073 + 800074a4: 00008067 jalr x0,0(x1) + 800074a8: 7a85b073 .word 0x7a85b073 + 800074ac: 00008067 jalr x0,0(x1) + 800074b0: 7aa02573 .word 0x7aa02573 + 800074b4: 00008067 jalr x0,0(x1) + 800074b8: 7aa59073 .word 0x7aa59073 + 800074bc: 00008067 jalr x0,0(x1) + 800074c0: 7aa5a073 .word 0x7aa5a073 + 800074c4: 00008067 jalr x0,0(x1) + 800074c8: 7aa5b073 .word 0x7aa5b073 + 800074cc: 00008067 jalr x0,0(x1) + 800074d0: 5a802573 .word 0x5a802573 + 800074d4: 00008067 jalr x0,0(x1) + 800074d8: 5a859073 .word 0x5a859073 + 800074dc: 00008067 jalr x0,0(x1) + 800074e0: 5a85a073 .word 0x5a85a073 + 800074e4: 00008067 jalr x0,0(x1) + 800074e8: 5a85b073 .word 0x5a85b073 + 800074ec: 00008067 jalr x0,0(x1) + 800074f0: 6a802573 .word 0x6a802573 + 800074f4: 00008067 jalr x0,0(x1) + 800074f8: 6a859073 .word 0x6a859073 + 800074fc: 00008067 jalr x0,0(x1) + 80007500: 6a85a073 .word 0x6a85a073 + 80007504: 00008067 jalr x0,0(x1) + 80007508: 6a85b073 .word 0x6a85b073 + 8000750c: 00008067 jalr x0,0(x1) + 80007510: 0005a503 lw x10,0(x11) + 80007514: 00008067 jalr x0,0(x1) + 80007518: 0045a503 lw x10,4(x11) + 8000751c: 00008067 jalr x0,0(x1) + 80007520: 00c5a023 sw x12,0(x11) + 80007524: 00008067 jalr x0,0(x1) + 80007528: 00c5a223 sw x12,4(x11) + 8000752c: 00008067 jalr x0,0(x1) + 80007530: 0005b503 ld x10,0(x11) + 80007534: 00008067 jalr x0,0(x1) + 80007538: 00c5b023 sd x12,0(x11) + 8000753c: 00008067 jalr x0,0(x1) + 80007540: 00000000 .word 0x00000000 + +0000000080007544 : + 80007544: 02000393 addi x7,x0,32 + 80007548: 00075c63 bge x14,x0,80007560 + +000000008000754c : + 8000754c: 00171413 slli x8,x14,0x1 + 80007550: ff240413 addi x8,x8,-14 + 80007554: 00045663 bge x8,x0,80007560 + 80007558: 01800393 addi x7,x0,24 + 8000755c: 0040006f jal x0,80007560 + +0000000080007560 : + 80007560: ca810113 addi x2,x2,-856 + 80007564: 5f013303 ld x6,1520(x2) + 80007568: 007304b3 add x9,x6,x7 + 8000756c: 5e913823 sd x9,1520(x2) + 80007570: 5d013403 ld x8,1488(x2) + 80007574: 40830333 sub x6,x6,x8 + 80007578: 35810113 addi x2,x2,856 + 8000757c: 27813403 ld x8,632(x2) + 80007580: 00830333 add x6,x6,x8 + 80007584: 34102473 csrrs x8,mepc,x0 + 80007588: 00000013 addi x0,x0,0 + 8000758c: 00000013 addi x0,x0,0 + 80007590: 00000013 addi x0,x0,0 + 80007594: 00000013 addi x0,x0,0 + 80007598: 00000013 addi x0,x0,0 + 8000759c: 00000013 addi x0,x0,0 + 800075a0: 00011497 auipc x9,0x11 + 800075a4: 59848493 addi x9,x9,1432 # 80018b38 + 800075a8: 00000013 addi x0,x0,0 + 800075ac: 00000013 addi x0,x0,0 + 800075b0: 00000013 addi x0,x0,0 + 800075b4: 00000013 addi x0,x0,0 + 800075b8: 00000013 addi x0,x0,0 + 800075bc: 00000013 addi x0,x0,0 + 800075c0: 0084b023 sd x8,0(x9) + 800075c4: 00e4b423 sd x14,8(x9) + 800075c8: 34302473 csrrs x8,mtval,x0 + 800075cc: 0084b823 sd x8,16(x9) + 800075d0: 30002473 csrrs x8,mstatus,x0 + 800075d4: 0084bc23 sd x8,24(x9) + 800075d8: 00000013 addi x0,x0,0 + 800075dc: 00000013 addi x0,x0,0 + 800075e0: 00031417 auipc x8,0x31 + 800075e4: 73840413 addi x8,x8,1848 # 80038d18 + 800075e8: 00000013 addi x0,x0,0 + 800075ec: 00000013 addi x0,x0,0 + 800075f0: 00000013 addi x0,x0,0 + 800075f4: 00000013 addi x0,x0,0 + 800075f8: 00000013 addi x0,x0,0 + 800075fc: 00000013 addi x0,x0,0 + 80007600: 007304b3 add x9,x6,x7 + 80007604: e2946663 bltu x8,x9,80006c30 + +0000000080007608 : + 80007608: 2c013403 ld x8,704(x2) + 8000760c: 408787b3 sub x15,x15,x8 + 80007610: 00179493 slli x9,x15,0x1 + 80007614: 009787b3 add x15,x15,x9 + 80007618: 0057d793 srli x15,x15,0x5 + 8000761c: 00679793 slli x15,x15,0x6 + 80007620: 0077e7b3 or x15,x15,x7 + 80007624: 00378793 addi x15,x15,3 + 80007628: 02075a63 bge x14,x0,8000765c + 8000762c: 00f00413 addi x8,x0,15 + 80007630: 00877433 and x8,x14,x8 + 80007634: 304024f3 csrrs x9,mie,x0 + 80007638: 0084d4b3 srl x9,x9,x8 + 8000763c: 0014f493 andi x9,x9,1 + 80007640: 00b49493 slli x9,x9,0xb + 80007644: 0097e7b3 or x15,x15,x9 + 80007648: 344024f3 csrrs x9,mip,x0 + 8000764c: 0084d4b3 srl x9,x9,x8 + 80007650: 0014f493 andi x9,x9,1 + 80007654: 00c49493 slli x9,x9,0xc + 80007658: 0097e7b3 or x15,x15,x9 + 8000765c: 300023f3 csrrs x7,mstatus,x0 + 80007660: 02f39393 slli x7,x7,0x2f + 80007664: 0223d393 srli x7,x7,0x22 + 80007668: 00000437 lui x8,0x0 + 8000766c: 00040413 addi x8,x8,0 # 0 + 80007670: 00b41413 slli x8,x8,0xb + 80007674: 00140413 addi x8,x8,1 + 80007678: 00b41413 slli x8,x8,0xb + 8000767c: 06740413 addi x8,x8,103 + 80007680: 00a41413 slli x8,x8,0xa + 80007684: 3e540413 addi x8,x8,997 + 80007688: fff44413 xori x8,x8,-1 + 8000768c: 0083f433 and x8,x7,x8 + 80007690: 0087e433 or x8,x15,x8 + 80007694: 0204d493 srli x9,x9,0x20 + 80007698: 1c04f493 andi x9,x9,448 + 8000769c: 00849493 slli x9,x9,0x8 + 800076a0: 00946433 or x8,x8,x9 + 800076a4: 00033483 ld x9,0(x6) + 800076a8: 02848263 beq x9,x8,800076cc + 800076ac: 00040313 addi x6,x8,0 + 800076b0: 00048213 addi x4,x9,0 + 800076b4: 6b4003ef jal x7,80007d68 + 800076b8: 80007608 .word 0x80007608 + 800076bc: 00000000 .word 0x00000000 + 800076c0: 8001931a .word 0x8001931a + 800076c4: 00000000 .word 0x00000000 + 800076c8: 00000341 .word 0x00000341 + +00000000800076cc : + 800076cc: 00070413 addi x8,x14,0 + 800076d0: 00833483 ld x9,8(x6) + 800076d4: 02848263 beq x9,x8,800076f8 + 800076d8: 00040313 addi x6,x8,0 + 800076dc: 00048213 addi x4,x9,0 + 800076e0: 688003ef jal x7,80007d68 + 800076e4: 800076cc .word 0x800076cc + 800076e8: 00000000 .word 0x00000000 + 800076ec: 8001941c .word 0x8001941c + 800076f0: 00000000 .word 0x00000000 + 800076f4: 00000341 .word 0x00000341 + 800076f8: 12074063 blt x14,x0,80007818 + +00000000800076fc : + 800076fc: 34102473 csrrs x8,mepc,x0 + 80007700: 00010493 addi x9,x2,0 + 80007704: 0040006f jal x0,80007708 + +0000000080007708 : + 80007708: 08000393 addi x7,x0,128 + 8000770c: 04740863 beq x8,x7,8000775c + 80007710: 00238393 addi x7,x7,2 + 80007714: 04740463 beq x8,x7,8000775c + 80007718: 04040263 beq x8,x0,8000775c + 8000771c: 2884b383 ld x7,648(x9) + 80007720: 2904b783 ld x15,656(x9) + 80007724: 007787b3 add x15,x15,x7 + 80007728: 00f47463 bgeu x8,x15,80007730 + 8000772c: 02747663 bgeu x8,x7,80007758 + +0000000080007730 : + 80007730: 2584b383 ld x7,600(x9) + 80007734: 2604b783 ld x15,608(x9) + 80007738: 007787b3 add x15,x15,x7 + 8000773c: 00f47463 bgeu x8,x15,80007744 + 80007740: 00747c63 bgeu x8,x7,80007758 + +0000000080007744 : + 80007744: 2684b383 ld x7,616(x9) + 80007748: 2704b783 ld x15,624(x9) + 8000774c: 007787b3 add x15,x15,x7 + 80007750: d0f47a63 bgeu x8,x15,80006c64 + 80007754: d0746863 bltu x8,x7,80006c64 + +0000000080007758 : + 80007758: 40740433 sub x8,x8,x7 + +000000008000775c : + 8000775c: 01033483 ld x9,16(x6) + 80007760: 02848263 beq x9,x8,80007784 + 80007764: 00040313 addi x6,x8,0 + 80007768: 00048213 addi x4,x9,0 + 8000776c: 5fc003ef jal x7,80007d68 + 80007770: 8000775c .word 0x8000775c + 80007774: 00000000 .word 0x00000000 + 80007778: 80019517 .word 0x80019517 + 8000777c: 00000000 .word 0x00000000 + 80007780: 00000341 .word 0x00000341 + +0000000080007784 : + 80007784: 34102473 csrrs x8,mepc,x0 + 80007788: 342023f3 csrrs x7,mcause,x0 + 8000778c: 00c00793 addi x15,x0,12 + 80007790: 00f38a63 beq x7,x15,800077a4 + 80007794: 00100793 addi x15,x0,1 + 80007798: 00f38663 beq x7,x15,800077a4 + 8000779c: 01400793 addi x15,x0,20 + 800077a0: 00f39663 bne x7,x15,800077ac + 800077a4: 34109073 csrrw x0,mepc,x1 + 800077a8: 0100006f jal x0,800077b8 + +00000000800077ac : + 800077ac: 00400393 addi x7,x0,4 + 800077b0: 00740433 add x8,x8,x7 + 800077b4: 34141073 csrrw x0,mepc,x8 + +00000000800077b8 : + 800077b8: 34302473 csrrs x8,mtval,x0 + +00000000800077bc : + 800077bc: 01833483 ld x9,24(x6) + 800077c0: 02848263 beq x9,x8,800077e4 + 800077c4: 00040313 addi x6,x8,0 + 800077c8: 00048213 addi x4,x9,0 + 800077cc: 59c003ef jal x7,80007d68 + 800077d0: 800077bc .word 0x800077bc + 800077d4: 00000000 .word 0x00000000 + 800077d8: 8001960a .word 0x8001960a + 800077dc: 00000000 .word 0x00000000 + 800077e0: 00000341 .word 0x00000341 + +00000000800077e4 : + 800077e4: 30102473 csrrs x8,misa,x0 + 800077e8: 03841413 slli x8,x8,0x38 + 800077ec: 00045263 bge x8,x0,800077f0 + +00000000800077f0 : + 800077f0: 20000393 addi x7,x0,512 + 800077f4: 0640006f jal x0,80007858 + +00000000800077f8 : + 800077f8: 2e013303 ld x6,736(x2) + 800077fc: 2e813383 ld x7,744(x2) + 80007800: 2f013403 ld x8,752(x2) + 80007804: 2f813483 ld x9,760(x2) + 80007808: 30013703 ld x14,768(x2) + 8000780c: 30813783 ld x15,776(x2) + 80007810: 31013103 ld x2,784(x2) + 80007814: 30200073 mret + +0000000080007818 : + 80007818: 00100413 addi x8,x0,1 + 8000781c: 01f77393 andi x7,x14,31 + 80007820: 00741433 sll x8,x8,x7 + 80007824: 304434f3 csrrc x9,mie,x8 + 80007828: 34443473 csrrc x8,mip,x8 + +000000008000782c : + 8000782c: 01033483 ld x9,16(x6) + 80007830: 02848263 beq x9,x8,80007854 + 80007834: 00040313 addi x6,x8,0 + 80007838: 00048213 addi x4,x9,0 + 8000783c: 52c003ef jal x7,80007d68 + 80007840: 8000782c .word 0x8000782c + 80007844: 00000000 .word 0x00000000 + 80007848: 8001977d .word 0x8001977d + 8000784c: 00000000 .word 0x00000000 + 80007850: 00000341 .word 0x00000341 + 80007854: 00000393 addi x7,x0,0 + +0000000080007858 : + 80007858: 00000417 auipc x8,0x0 + 8000785c: 03c40413 addi x8,x8,60 # 80007894 + 80007860: 00740433 add x8,x8,x7 + 80007864: 00371393 slli x7,x14,0x3 + 80007868: 00740433 add x8,x8,x7 + 8000786c: ff847413 andi x8,x8,-8 + 80007870: 00043403 ld x8,0(x8) + +0000000080007874 : + 80007874: 00040a63 beq x8,x0,80007888 + 80007878: 03f41393 slli x7,x8,0x3f + 8000787c: 0003d863 bge x7,x0,8000788c + 80007880: 00145413 srli x8,x8,0x1 + 80007884: f6870ae3 beq x14,x8,800077f8 + 80007888: bdcff06f jal x0,80006c64 + +000000008000788c : + 8000788c: 00040067 jalr x0,0(x8) + +0000000080007890 : + ... + 80007898: 00000001 .word 0x00000001 + 8000789c: 00000000 .word 0x00000000 + 800078a0: 00000001 .word 0x00000001 + 800078a4: 00000000 .word 0x00000000 + 800078a8: 80039000 .word 0x80039000 + ... + 800078b8: 00000001 .word 0x00000001 + 800078bc: 00000000 .word 0x00000000 + 800078c0: 00000001 .word 0x00000001 + 800078c4: 00000000 .word 0x00000000 + 800078c8: 80039014 .word 0x80039014 + ... + 800078d8: 00000001 .word 0x00000001 + 800078dc: 00000000 .word 0x00000000 + 800078e0: 00000001 .word 0x00000001 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8003902c .word 0x8003902c + 800078ec: 00000000 .word 0x00000000 + 800078f0: 00000001 .word 0x00000001 + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00000001 .word 0x00000001 + 800078fc: 00000000 .word 0x00000000 + 80007900: 00000001 .word 0x00000001 + 80007904: 00000000 .word 0x00000000 + 80007908: 00000001 .word 0x00000001 + 8000790c: 00000000 .word 0x00000000 + 80007910: 00000001 .word 0x00000001 + 80007914: 00000000 .word 0x00000000 + 80007918: 00000001 .word 0x00000001 + 8000791c: 00000000 .word 0x00000000 + 80007920: 00000001 .word 0x00000001 + 80007924: 00000000 .word 0x00000000 + 80007928: 00000001 .word 0x00000001 + 8000792c: 00000000 .word 0x00000000 + 80007930: 00000001 .word 0x00000001 + 80007934: 00000000 .word 0x00000000 + 80007938: 00000001 .word 0x00000001 + 8000793c: 00000000 .word 0x00000000 + 80007940: 00000001 .word 0x00000001 + 80007944: 00000000 .word 0x00000000 + 80007948: 00000001 .word 0x00000001 + ... + +0000000080007a90 : + 80007a90: 00000001 .word 0x00000001 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00000003 .word 0x00000003 + 80007a9c: 00000000 .word 0x00000000 + 80007aa0: 00000005 .word 0x00000005 + 80007aa4: 00000000 .word 0x00000000 + 80007aa8: 00000007 .word 0x00000007 + 80007aac: 00000000 .word 0x00000000 + 80007ab0: 00000009 .word 0x00000009 + 80007ab4: 00000000 .word 0x00000000 + 80007ab8: 0000000b .word 0x0000000b + 80007abc: 00000000 .word 0x00000000 + 80007ac0: 0000000d .word 0x0000000d + 80007ac4: 00000000 .word 0x00000000 + 80007ac8: 0000000f .word 0x0000000f + 80007acc: 00000000 .word 0x00000000 + 80007ad0: 00000011 .word 0x00000011 + 80007ad4: 00000000 .word 0x00000000 + 80007ad8: 00000013 .word 0x00000013 + 80007adc: 00000000 .word 0x00000000 + 80007ae0: 00000015 .word 0x00000015 + 80007ae4: 00000000 .word 0x00000000 + 80007ae8: 00000017 .word 0x00000017 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 00000019 .word 0x00000019 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 0000001b .word 0x0000001b + 80007afc: 00000000 .word 0x00000000 + 80007b00: 0000001d .word 0x0000001d + 80007b04: 00000000 .word 0x00000000 + 80007b08: 0000001f .word 0x0000001f + 80007b0c: 00000000 .word 0x00000000 + 80007b10: 00000021 .word 0x00000021 + 80007b14: 00000000 .word 0x00000000 + 80007b18: 00000023 .word 0x00000023 + 80007b1c: 00000000 .word 0x00000000 + 80007b20: 00000025 .word 0x00000025 + 80007b24: 00000000 .word 0x00000000 + 80007b28: 00000027 .word 0x00000027 + 80007b2c: 00000000 .word 0x00000000 + 80007b30: 00000029 .word 0x00000029 + 80007b34: 00000000 .word 0x00000000 + 80007b38: 0000002b .word 0x0000002b + 80007b3c: 00000000 .word 0x00000000 + 80007b40: 0000002d .word 0x0000002d + 80007b44: 00000000 .word 0x00000000 + 80007b48: 0000002f .word 0x0000002f + ... + +0000000080007c90 : + 80007c90: 300023f3 csrrs x7,mstatus,x0 + 80007c94: 00b3d493 srli x9,x7,0xb + 80007c98: 0034f493 andi x9,x9,3 + 80007c9c: ffd48413 addi x8,x9,-3 + 80007ca0: 341023f3 csrrs x7,mepc,x0 + 80007ca4: 00000493 addi x9,x0,0 + 80007ca8: 02040c63 beq x8,x0,80007ce0 + 80007cac: 35810113 addi x2,x2,856 + 80007cb0: 300023f3 csrrs x7,mstatus,x0 + 80007cb4: 01839393 slli x7,x7,0x18 + 80007cb8: 0003da63 bge x7,x0,80007ccc + +0000000080007cbc : + 80007cbc: 35810113 addi x2,x2,856 + 80007cc0: 5b013783 ld x15,1456(x2) + 80007cc4: ca810113 addi x2,x2,-856 + 80007cc8: 0080006f jal x0,80007cd0 + +0000000080007ccc : + 80007ccc: f0013783 ld x15,-256(x2) + 80007cd0: 341023f3 csrrs x7,mepc,x0 + 80007cd4: 40f383b3 sub x7,x7,x15 + 80007cd8: ca810113 addi x2,x2,-856 + 80007cdc: 25813483 ld x9,600(x2) + +0000000080007ce0 : + 80007ce0: 007483b3 add x7,x9,x7 + 80007ce4: 2e013303 ld x6,736(x2) + 80007ce8: 2f013403 ld x8,752(x2) + 80007cec: 2f813483 ld x9,760(x2) + 80007cf0: 30013703 ld x14,768(x2) + 80007cf4: 30813783 ld x15,776(x2) + 80007cf8: 31013103 ld x2,784(x2) + 80007cfc: 00438067 jalr x0,4(x7) + +0000000080007d00 : + 80007d00: 00011217 auipc x4,0x11 + 80007d04: cf020213 addi x4,x4,-784 # 800189f0 + 80007d08: 02523423 sd x5,40(x4) # 28 + 80007d0c: 00123423 sd x1,8(x4) # 8 + 80007d10: 00023023 sd x0,0(x4) # 0 + 80007d14: 0880006f jal x0,80007d9c + +0000000080007d18 : + 80007d18: 00011397 auipc x7,0x11 + 80007d1c: cd838393 addi x7,x7,-808 # 800189f0 + 80007d20: 0483b023 sd x8,64(x7) + 80007d24: 0243b023 sd x4,32(x7) + 80007d28: 0253b423 sd x5,40(x7) + 80007d2c: 0013b423 sd x1,8(x7) + 80007d30: 0003b023 sd x0,0(x7) + 80007d34: 00038213 addi x4,x7,0 + 80007d38: 00040293 addi x5,x8,0 + 80007d3c: 0600006f jal x0,80007d9c + +0000000080007d40 : + 80007d40: 00011697 auipc x13,0x11 + 80007d44: cb068693 addi x13,x13,-848 # 800189f0 + 80007d48: 06e6b823 sd x14,112(x13) + 80007d4c: 0246b023 sd x4,32(x13) + 80007d50: 0256b423 sd x5,40(x13) + 80007d54: 0016b423 sd x1,8(x13) + 80007d58: 0006b023 sd x0,0(x13) + 80007d5c: 00068213 addi x4,x13,0 + 80007d60: 00070293 addi x5,x14,0 + 80007d64: 0380006f jal x0,80007d9c + +0000000080007d68 : + 80007d68: 00011497 auipc x9,0x11 + 80007d6c: c8848493 addi x9,x9,-888 # 800189f0 + 80007d70: 0674b423 sd x7,104(x9) + 80007d74: 0244b023 sd x4,32(x9) + 80007d78: 0254b423 sd x5,40(x9) + 80007d7c: 0014b423 sd x1,8(x9) + 80007d80: 00300093 addi x1,x0,3 + 80007d84: 0014b023 sd x1,0(x9) + 80007d88: 1064b823 sd x6,272(x9) + 80007d8c: 1044bc23 sd x4,280(x9) + 80007d90: 00048213 addi x4,x9,0 + 80007d94: 00038293 addi x5,x7,0 + 80007d98: 0040006f jal x0,80007d9c + +0000000080007d9c : + 80007d9c: 00223823 sd x2,16(x4) # 10 + 80007da0: 00323c23 sd x3,24(x4) # 18 + 80007da4: 02623823 sd x6,48(x4) # 30 + 80007da8: 02723c23 sd x7,56(x4) # 38 + 80007dac: 04823023 sd x8,64(x4) # 40 + 80007db0: 04923423 sd x9,72(x4) # 48 + 80007db4: 04a23823 sd x10,80(x4) # 50 + 80007db8: 04b23c23 sd x11,88(x4) # 58 + 80007dbc: 06c23023 sd x12,96(x4) # 60 + 80007dc0: 06d23423 sd x13,104(x4) # 68 + 80007dc4: 06e23823 sd x14,112(x4) # 70 + 80007dc8: 06f23c23 sd x15,120(x4) # 78 + 80007dcc: 09023023 sd x16,128(x4) # 80 + 80007dd0: 09123423 sd x17,136(x4) # 88 + 80007dd4: 09223823 sd x18,144(x4) # 90 + 80007dd8: 09323c23 sd x19,152(x4) # 98 + 80007ddc: 0b423023 sd x20,160(x4) # a0 + 80007de0: 0b523423 sd x21,168(x4) # a8 + 80007de4: 0b623823 sd x22,176(x4) # b0 + 80007de8: 0b723c23 sd x23,184(x4) # b8 + 80007dec: 0d823023 sd x24,192(x4) # c0 + 80007df0: 0d923423 sd x25,200(x4) # c8 + 80007df4: 0da23823 sd x26,208(x4) # d0 + 80007df8: 0db23c23 sd x27,216(x4) # d8 + 80007dfc: 0fc23023 sd x28,224(x4) # e0 + 80007e00: 0fd23423 sd x29,232(x4) # e8 + 80007e04: 0fe23823 sd x30,240(x4) # f0 + 80007e08: 0ff23c23 sd x31,248(x4) # f8 + +0000000080007e0c : + 80007e0c: 00011497 auipc x9,0x11 + 80007e10: be44a483 lw x9,-1052(x9) # 800189f0 + 80007e14: 00300513 addi x10,x0,3 + 80007e18: 18a48a63 beq x9,x10,80007fac + +0000000080007e1c : + 80007e1c: ffa2d303 lhu x6,-6(x5) + 80007e20: ff82d383 lhu x7,-8(x5) + 80007e24: 01031313 slli x6,x6,0x10 + 80007e28: 00736333 or x6,x6,x7 + 80007e2c: 00f35393 srli x7,x6,0xf + 80007e30: 01f3f393 andi x7,x7,31 + 80007e34: 01435413 srli x8,x6,0x14 + 80007e38: 01f47413 andi x8,x8,31 + 80007e3c: 10822223 sw x8,260(x4) # 104 + 80007e40: 00341313 slli x6,x8,0x3 + 80007e44: 00620333 add x6,x4,x6 + 80007e48: 00033303 ld x6,0(x6) + 80007e4c: 10623823 sd x6,272(x4) # 110 + 80007e50: ff62d303 lhu x6,-10(x5) + 80007e54: ff42d383 lhu x7,-12(x5) + 80007e58: 01031313 slli x6,x6,0x10 + 80007e5c: 00736333 or x6,x6,x7 + 80007e60: 00030513 addi x10,x6,0 + 80007e64: 07f37413 andi x8,x6,127 + 80007e68: 00300493 addi x9,x0,3 + 80007e6c: 0c941463 bne x8,x9,80007f34 + 80007e70: 00c35413 srli x8,x6,0xc + 80007e74: 00747413 andi x8,x8,7 + 80007e78: 00300493 addi x9,x0,3 + 80007e7c: 0a941c63 bne x8,x9,80007f34 + 80007e80: 41435393 srai x7,x6,0x14 + 80007e84: 00f35313 srli x6,x6,0xf + 80007e88: 01f37313 andi x6,x6,31 + 80007e8c: 00331313 slli x6,x6,0x3 + 80007e90: 00620333 add x6,x4,x6 + 80007e94: 00033303 ld x6,0(x6) + 80007e98: 00730333 add x6,x6,x7 + 80007e9c: 00737413 andi x8,x6,7 + 80007ea0: 0c041663 bne x8,x0,80007f6c + 80007ea4: 00000013 addi x0,x0,0 + 80007ea8: 00000013 addi x0,x0,0 + 80007eac: 00000013 addi x0,x0,0 + 80007eb0: 00000013 addi x0,x0,0 + 80007eb4: 00000013 addi x0,x0,0 + 80007eb8: 00000013 addi x0,x0,0 + 80007ebc: 00000013 addi x0,x0,0 + 80007ec0: 00013417 auipc x8,0x13 + 80007ec4: 92040413 addi x8,x8,-1760 # 8001a7e0 + 80007ec8: 00000013 addi x0,x0,0 + 80007ecc: 00000013 addi x0,x0,0 + 80007ed0: 00000013 addi x0,x0,0 + 80007ed4: 00000013 addi x0,x0,0 + 80007ed8: 00000013 addi x0,x0,0 + 80007edc: 00000013 addi x0,x0,0 + 80007ee0: 08836663 bltu x6,x8,80007f6c + 80007ee4: 00000013 addi x0,x0,0 + 80007ee8: 00000013 addi x0,x0,0 + 80007eec: 00000013 addi x0,x0,0 + 80007ef0: 00000013 addi x0,x0,0 + 80007ef4: 00000013 addi x0,x0,0 + 80007ef8: 00000013 addi x0,x0,0 + 80007efc: 00000013 addi x0,x0,0 + 80007f00: 00031417 auipc x8,0x31 + 80007f04: e2040413 addi x8,x8,-480 # 80038d20 + 80007f08: 00000013 addi x0,x0,0 + 80007f0c: 00000013 addi x0,x0,0 + 80007f10: 00000013 addi x0,x0,0 + 80007f14: 00000013 addi x0,x0,0 + 80007f18: 00000013 addi x0,x0,0 + 80007f1c: 00000013 addi x0,x0,0 + 80007f20: ff840413 addi x8,x8,-8 + 80007f24: 04646463 bltu x8,x6,80007f6c + 80007f28: 00033303 ld x6,0(x6) + 80007f2c: 10623c23 sd x6,280(x4) # 118 + 80007f30: 3880006f jal x0,800082b8 + +0000000080007f34 : + 80007f34: 00100413 addi x8,x0,1 + 80007f38: 00000013 addi x0,x0,0 + 80007f3c: 00000013 addi x0,x0,0 + 80007f40: 00011497 auipc x9,0x11 + 80007f44: bd848493 addi x9,x9,-1064 # 80018b18 + 80007f48: 00000013 addi x0,x0,0 + 80007f4c: 00000013 addi x0,x0,0 + 80007f50: 00000013 addi x0,x0,0 + 80007f54: 00000013 addi x0,x0,0 + 80007f58: 00000013 addi x0,x0,0 + 80007f5c: 00000013 addi x0,x0,0 + 80007f60: 0084a023 sw x8,0(x9) + 80007f64: 10a23c23 sd x10,280(x4) # 118 + 80007f68: 3500006f jal x0,800082b8 + +0000000080007f6c : + 80007f6c: 00200413 addi x8,x0,2 + 80007f70: 00000013 addi x0,x0,0 + 80007f74: 00000013 addi x0,x0,0 + 80007f78: 00000013 addi x0,x0,0 + 80007f7c: 00000013 addi x0,x0,0 + 80007f80: 00011497 auipc x9,0x11 + 80007f84: b9848493 addi x9,x9,-1128 # 80018b18 + 80007f88: 00000013 addi x0,x0,0 + 80007f8c: 00000013 addi x0,x0,0 + 80007f90: 00000013 addi x0,x0,0 + 80007f94: 00000013 addi x0,x0,0 + 80007f98: 00000013 addi x0,x0,0 + 80007f9c: 00000013 addi x0,x0,0 + 80007fa0: 0084a023 sw x8,0(x9) + 80007fa4: 10623c23 sd x6,280(x4) # 118 + 80007fa8: 3100006f jal x0,800082b8 + +0000000080007fac : + 80007fac: 0082e303 lwu x6,8(x5) + 80007fb0: 00c2a383 lw x7,12(x5) + 80007fb4: 02039393 slli x7,x7,0x20 + 80007fb8: 00736333 or x6,x6,x7 + 80007fbc: 00011817 auipc x16,0x11 + 80007fc0: b6c80813 addi x16,x16,-1172 # 80018b28 + 80007fc4: 00683023 sd x6,0(x16) + 80007fc8: 0002e303 lwu x6,0(x5) + 80007fcc: 0042a383 lw x7,4(x5) + 80007fd0: 02039393 slli x7,x7,0x20 + 80007fd4: 00736333 or x6,x6,x7 + 80007fd8: 10623423 sd x6,264(x4) # 108 + 80007fdc: 00011817 auipc x16,0x11 + 80007fe0: b4c80813 addi x16,x16,-1204 # 80018b28 + 80007fe4: 00083303 ld x6,0(x16) + 80007fe8: 00011397 auipc x7,0x11 + 80007fec: 31b38393 addi x7,x7,795 # 80019303 + 80007ff0: 28730463 beq x6,x7,80008278 + 80007ff4: 00000413 addi x8,x0,0 + 80007ff8: 00011817 auipc x16,0x11 + 80007ffc: b2880813 addi x16,x16,-1240 # 80018b20 + 80008000: 00882023 sw x8,0(x16) + 80008004: 00011397 auipc x7,0x11 + 80008008: 31638393 addi x7,x7,790 # 8001931a + 8000800c: 00731863 bne x6,x7,8000801c + 80008010: 00100413 addi x8,x0,1 + 80008014: 00000493 addi x9,x0,0 + 80008018: 2740006f jal x0,8000828c + 8000801c: 00011397 auipc x7,0x11 + 80008020: 40038393 addi x7,x7,1024 # 8001941c + 80008024: 00731863 bne x6,x7,80008034 + 80008028: 00200413 addi x8,x0,2 + 8000802c: 00000493 addi x9,x0,0 + 80008030: 25c0006f jal x0,8000828c + 80008034: 00011397 auipc x7,0x11 + 80008038: 4e338393 addi x7,x7,1251 # 80019517 + 8000803c: 00731863 bne x6,x7,8000804c + 80008040: 00300413 addi x8,x0,3 + 80008044: 00000493 addi x9,x0,0 + 80008048: 2440006f jal x0,8000828c + 8000804c: 00011397 auipc x7,0x11 + 80008050: 5be38393 addi x7,x7,1470 # 8001960a + 80008054: 00731863 bne x6,x7,80008064 + 80008058: 00400413 addi x8,x0,4 + 8000805c: 00000493 addi x9,x0,0 + 80008060: 22c0006f jal x0,8000828c + 80008064: 00011397 auipc x7,0x11 + 80008068: 71938393 addi x7,x7,1817 # 8001977d + 8000806c: 00731863 bne x6,x7,8000807c + 80008070: 00500413 addi x8,x0,5 + 80008074: 00000493 addi x9,x0,0 + 80008078: 2140006f jal x0,8000828c + 8000807c: 00011397 auipc x7,0x11 + 80008080: 68538393 addi x7,x7,1669 # 80019701 + 80008084: 00731863 bne x6,x7,80008094 + 80008088: 00600413 addi x8,x0,6 + 8000808c: 00000493 addi x9,x0,0 + 80008090: 1fc0006f jal x0,8000828c + 80008094: 00011397 auipc x7,0x11 + 80008098: 6ab38393 addi x7,x7,1707 # 8001973f + 8000809c: 00731863 bne x6,x7,800080ac + 800080a0: 00700413 addi x8,x0,7 + 800080a4: 00000493 addi x9,x0,0 + 800080a8: 1e40006f jal x0,8000828c + 800080ac: 00011397 auipc x7,0x11 + 800080b0: 2ae38393 addi x7,x7,686 # 8001935a + 800080b4: 00731863 bne x6,x7,800080c4 + 800080b8: 00100413 addi x8,x0,1 + 800080bc: 00100493 addi x9,x0,1 + 800080c0: 1cc0006f jal x0,8000828c + 800080c4: 00011397 auipc x7,0x11 + 800080c8: 39638393 addi x7,x7,918 # 8001945a + 800080cc: 00731863 bne x6,x7,800080dc + 800080d0: 00200413 addi x8,x0,2 + 800080d4: 00100493 addi x9,x0,1 + 800080d8: 1b40006f jal x0,8000828c + 800080dc: 00011397 auipc x7,0x11 + 800080e0: 47738393 addi x7,x7,1143 # 80019553 + 800080e4: 00731863 bne x6,x7,800080f4 + 800080e8: 00300413 addi x8,x0,3 + 800080ec: 00100493 addi x9,x0,1 + 800080f0: 19c0006f jal x0,8000828c + 800080f4: 00011397 auipc x7,0x11 + 800080f8: 55338393 addi x7,x7,1363 # 80019647 + 800080fc: 00731863 bne x6,x7,8000810c + 80008100: 00400413 addi x8,x0,4 + 80008104: 00100493 addi x9,x0,1 + 80008108: 1840006f jal x0,8000828c + 8000810c: 00011397 auipc x7,0x11 + 80008110: 6ac38393 addi x7,x7,1708 # 800197b8 + 80008114: 00731863 bne x6,x7,80008124 + 80008118: 00500413 addi x8,x0,5 + 8000811c: 00100493 addi x9,x0,1 + 80008120: 16c0006f jal x0,8000828c + 80008124: 00011397 auipc x7,0x11 + 80008128: 27638393 addi x7,x7,630 # 8001939a + 8000812c: 00731863 bne x6,x7,8000813c + 80008130: 00100413 addi x8,x0,1 + 80008134: 00200493 addi x9,x0,2 + 80008138: 1540006f jal x0,8000828c + 8000813c: 00011397 auipc x7,0x11 + 80008140: 35c38393 addi x7,x7,860 # 80019498 + 80008144: 00731863 bne x6,x7,80008154 + 80008148: 00200413 addi x8,x0,2 + 8000814c: 00200493 addi x9,x0,2 + 80008150: 13c0006f jal x0,8000828c + 80008154: 00011397 auipc x7,0x11 + 80008158: 43b38393 addi x7,x7,1083 # 8001958f + 8000815c: 00731863 bne x6,x7,8000816c + 80008160: 00300413 addi x8,x0,3 + 80008164: 00200493 addi x9,x0,2 + 80008168: 1240006f jal x0,8000828c + 8000816c: 00011397 auipc x7,0x11 + 80008170: 51838393 addi x7,x7,1304 # 80019684 + 80008174: 00731863 bne x6,x7,80008184 + 80008178: 00400413 addi x8,x0,4 + 8000817c: 00200493 addi x9,x0,2 + 80008180: 10c0006f jal x0,8000828c + 80008184: 00011397 auipc x7,0x11 + 80008188: 66f38393 addi x7,x7,1647 # 800197f3 + 8000818c: 00731863 bne x6,x7,8000819c + 80008190: 00500413 addi x8,x0,5 + 80008194: 00200493 addi x9,x0,2 + 80008198: 0f40006f jal x0,8000828c + 8000819c: 00011397 auipc x7,0x11 + 800081a0: 23f38393 addi x7,x7,575 # 800193db + 800081a4: 00731863 bne x6,x7,800081b4 + 800081a8: 00100413 addi x8,x0,1 + 800081ac: 00300493 addi x9,x0,3 + 800081b0: 0dc0006f jal x0,8000828c + 800081b4: 00011397 auipc x7,0x11 + 800081b8: 32338393 addi x7,x7,803 # 800194d7 + 800081bc: 00731863 bne x6,x7,800081cc + 800081c0: 00200413 addi x8,x0,2 + 800081c4: 00300493 addi x9,x0,3 + 800081c8: 0c40006f jal x0,8000828c + 800081cc: 00011397 auipc x7,0x11 + 800081d0: 40038393 addi x7,x7,1024 # 800195cc + 800081d4: 00731863 bne x6,x7,800081e4 + 800081d8: 00300413 addi x8,x0,3 + 800081dc: 00300493 addi x9,x0,3 + 800081e0: 0ac0006f jal x0,8000828c + 800081e4: 00011397 auipc x7,0x11 + 800081e8: 4de38393 addi x7,x7,1246 # 800196c2 + 800081ec: 00731863 bne x6,x7,800081fc + 800081f0: 00400413 addi x8,x0,4 + 800081f4: 00300493 addi x9,x0,3 + 800081f8: 0940006f jal x0,8000828c + 800081fc: 00011397 auipc x7,0x11 + 80008200: 63338393 addi x7,x7,1587 # 8001982f + 80008204: 00731863 bne x6,x7,80008214 + 80008208: 00500413 addi x8,x0,5 + 8000820c: 00300493 addi x9,x0,3 + 80008210: 07c0006f jal x0,8000828c + 80008214: 00011397 auipc x7,0x11 + 80008218: 65838393 addi x7,x7,1624 # 8001986c + 8000821c: 00731863 bne x6,x7,8000822c + 80008220: 00800413 addi x8,x0,8 + 80008224: 00000493 addi x9,x0,0 + 80008228: 0640006f jal x0,8000828c + 8000822c: 00011397 auipc x7,0x11 + 80008230: 68f38393 addi x7,x7,1679 # 800198bb + 80008234: 00731863 bne x6,x7,80008244 + 80008238: 00800413 addi x8,x0,8 + 8000823c: 00000493 addi x9,x0,0 + 80008240: 04c0006f jal x0,8000828c + 80008244: 00011397 auipc x7,0x11 + 80008248: 77238393 addi x7,x7,1906 # 800199b6 + 8000824c: 00731863 bne x6,x7,8000825c + 80008250: 00800413 addi x8,x0,8 + 80008254: 00100493 addi x9,x0,1 + 80008258: 0340006f jal x0,8000828c + 8000825c: 00012397 auipc x7,0x12 + 80008260: 85638393 addi x7,x7,-1962 # 80019ab2 + 80008264: 00731863 bne x6,x7,80008274 + 80008268: 00800413 addi x8,x0,8 + 8000826c: 00200493 addi x9,x0,2 + 80008270: 01c0006f jal x0,8000828c + 80008274: 0340006f jal x0,800082a8 + +0000000080008278 : + 80008278: 00900413 addi x8,x0,9 + 8000827c: 00011817 auipc x16,0x11 + 80008280: 8a480813 addi x16,x16,-1884 # 80018b20 + 80008284: 00882023 sw x8,0(x16) + 80008288: 0300006f jal x0,800082b8 + +000000008000828c : + 8000828c: 00011817 auipc x16,0x11 + 80008290: 89480813 addi x16,x16,-1900 # 80018b20 + 80008294: 00882023 sw x8,0(x16) + 80008298: 00011817 auipc x16,0x11 + 8000829c: 88c80813 addi x16,x16,-1908 # 80018b24 + 800082a0: 00982023 sw x9,0(x16) + 800082a4: 0140006f jal x0,800082b8 + +00000000800082a8 : + 800082a8: 00011817 auipc x16,0x11 + 800082ac: 87880813 addi x16,x16,-1928 # 80018b20 + 800082b0: 00082023 sw x0,0(x16) + 800082b4: 0040006f jal x0,800082b8 + +00000000800082b8 : + 800082b8: 0002e303 lwu x6,0(x5) + 800082bc: 0042a383 lw x7,4(x5) + 800082c0: 02039393 slli x7,x7,0x20 + 800082c4: 00736333 or x6,x6,x7 + 800082c8: 10623423 sd x6,264(x4) # 108 + 800082cc: 00035383 lhu x7,0(x6) + 800082d0: 0033f413 andi x8,x7,3 + 800082d4: 00300493 addi x9,x0,3 + 800082d8: 00941863 bne x8,x9,800082e8 + 800082dc: 00235403 lhu x8,2(x6) + 800082e0: 01041413 slli x8,x8,0x10 + 800082e4: 0083e3b3 or x7,x7,x8 + 800082e8: 10722023 sw x7,256(x4) # 100 + 800082ec: 0082e303 lwu x6,8(x5) + 800082f0: 00c2a383 lw x7,12(x5) + 800082f4: 02039393 slli x7,x7,0x20 + 800082f8: 00736333 or x6,x6,x7 + 800082fc: 12623023 sd x6,288(x4) # 120 + +0000000080008300 : + 80008300: 00011517 auipc x10,0x11 + 80008304: e1250513 addi x10,x10,-494 # 80019112 + 80008308: 00000013 addi x0,x0,0 + 8000830c: 00000013 addi x0,x0,0 + 80008310: 00000013 addi x0,x0,0 + 80008314: 00000013 addi x0,x0,0 + 80008318: 00000013 addi x0,x0,0 + 8000831c: 00000013 addi x0,x0,0 + 80008320: 00031097 auipc x1,0x31 + 80008324: 284080e7 jalr x1,644(x1) # 800395a4 + 80008328: 00000013 addi x0,x0,0 + 8000832c: 00000013 addi x0,x0,0 + 80008330: 00000013 addi x0,x0,0 + 80008334: 00000013 addi x0,x0,0 + 80008338: 00000013 addi x0,x0,0 + 8000833c: 00000013 addi x0,x0,0 + 80008340: 00011517 auipc x10,0x11 + 80008344: e0f50513 addi x10,x10,-497 # 8001914f + 80008348: 00000013 addi x0,x0,0 + 8000834c: 00000013 addi x0,x0,0 + 80008350: 00000013 addi x0,x0,0 + 80008354: 00000013 addi x0,x0,0 + 80008358: 00000013 addi x0,x0,0 + 8000835c: 00000013 addi x0,x0,0 + 80008360: 00031097 auipc x1,0x31 + 80008364: 244080e7 jalr x1,580(x1) # 800395a4 + +0000000080008368 : + 80008368: 00000013 addi x0,x0,0 + 8000836c: 00000013 addi x0,x0,0 + 80008370: 00000013 addi x0,x0,0 + 80008374: 00000013 addi x0,x0,0 + 80008378: 00000013 addi x0,x0,0 + 8000837c: 00000013 addi x0,x0,0 + 80008380: 00011517 auipc x10,0x11 + 80008384: e8650513 addi x10,x10,-378 # 80019206 + 80008388: 00000013 addi x0,x0,0 + 8000838c: 00000013 addi x0,x0,0 + 80008390: 00000013 addi x0,x0,0 + 80008394: 00000013 addi x0,x0,0 + 80008398: 00000013 addi x0,x0,0 + 8000839c: 00000013 addi x0,x0,0 + 800083a0: 00031097 auipc x1,0x31 + 800083a4: 204080e7 jalr x1,516(x1) # 800395a4 + +00000000800083a8 : + 800083a8: 00010517 auipc x10,0x10 + 800083ac: 76853503 ld x10,1896(x10) # 80018b10 + 800083b0: 00031097 auipc x1,0x31 + 800083b4: 1f4080e7 jalr x1,500(x1) # 800395a4 + +00000000800083b8 : + 800083b8: 00000013 addi x0,x0,0 + 800083bc: 00000013 addi x0,x0,0 + 800083c0: 00011517 auipc x10,0x11 + 800083c4: e5850513 addi x10,x10,-424 # 80019218 + 800083c8: 00000013 addi x0,x0,0 + 800083cc: 00000013 addi x0,x0,0 + 800083d0: 00000013 addi x0,x0,0 + 800083d4: 00000013 addi x0,x0,0 + 800083d8: 00000013 addi x0,x0,0 + 800083dc: 00000013 addi x0,x0,0 + 800083e0: 00031097 auipc x1,0x31 + 800083e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800083e8: 00010517 auipc x10,0x10 + 800083ec: 60852503 lw x10,1544(x10) # 800189f0 + 800083f0: 00300593 addi x11,x0,3 + 800083f4: 52b50c63 beq x10,x11,8000892c + 800083f8: 00000013 addi x0,x0,0 + 800083fc: 00000013 addi x0,x0,0 + 80008400: 00011517 auipc x10,0x11 + 80008404: e1a50513 addi x10,x10,-486 # 8001921a + 80008408: 00000013 addi x0,x0,0 + 8000840c: 00000013 addi x0,x0,0 + 80008410: 00000013 addi x0,x0,0 + 80008414: 00000013 addi x0,x0,0 + 80008418: 00000013 addi x0,x0,0 + 8000841c: 00000013 addi x0,x0,0 + 80008420: 00031097 auipc x1,0x31 + 80008424: 184080e7 jalr x1,388(x1) # 800395a4 + 80008428: 00010517 auipc x10,0x10 + 8000842c: 6c852503 lw x10,1736(x10) # 80018af0 + 80008430: 02000593 addi x11,x0,32 + 80008434: 00357613 andi x12,x10,3 + 80008438: 00300693 addi x13,x0,3 + 8000843c: 00d60463 beq x12,x13,80008444 + 80008440: 01000593 addi x11,x0,16 + 80008444: 3f4010ef jal x1,80009838 + 80008448: 00000013 addi x0,x0,0 + 8000844c: 00000013 addi x0,x0,0 + 80008450: 00000013 addi x0,x0,0 + 80008454: 00000013 addi x0,x0,0 + 80008458: 00000013 addi x0,x0,0 + 8000845c: 00000013 addi x0,x0,0 + 80008460: 00010517 auipc x10,0x10 + 80008464: 6f850513 addi x10,x10,1784 # 80018b58 + 80008468: 00000013 addi x0,x0,0 + 8000846c: 00000013 addi x0,x0,0 + 80008470: 00000013 addi x0,x0,0 + 80008474: 00000013 addi x0,x0,0 + 80008478: 00000013 addi x0,x0,0 + 8000847c: 00000013 addi x0,x0,0 + 80008480: 00031097 auipc x1,0x31 + 80008484: 124080e7 jalr x1,292(x1) # 800395a4 + 80008488: 00000013 addi x0,x0,0 + 8000848c: 00000013 addi x0,x0,0 + 80008490: 00000013 addi x0,x0,0 + 80008494: 00000013 addi x0,x0,0 + 80008498: 00000013 addi x0,x0,0 + 8000849c: 00000013 addi x0,x0,0 + 800084a0: 00011517 auipc x10,0x11 + 800084a4: d8e50513 addi x10,x10,-626 # 8001922e + 800084a8: 00000013 addi x0,x0,0 + 800084ac: 00000013 addi x0,x0,0 + 800084b0: 00000013 addi x0,x0,0 + 800084b4: 00000013 addi x0,x0,0 + 800084b8: 00000013 addi x0,x0,0 + 800084bc: 00000013 addi x0,x0,0 + 800084c0: 00031097 auipc x1,0x31 + 800084c4: 0e4080e7 jalr x1,228(x1) # 800395a4 + 800084c8: 00010517 auipc x10,0x10 + 800084cc: 63053503 ld x10,1584(x10) # 80018af8 + 800084d0: 04000593 addi x11,x0,64 + 800084d4: 364010ef jal x1,80009838 + 800084d8: 00000013 addi x0,x0,0 + 800084dc: 00000013 addi x0,x0,0 + 800084e0: 00010517 auipc x10,0x10 + 800084e4: 67850513 addi x10,x10,1656 # 80018b58 + 800084e8: 00000013 addi x0,x0,0 + 800084ec: 00000013 addi x0,x0,0 + 800084f0: 00000013 addi x0,x0,0 + 800084f4: 00000013 addi x0,x0,0 + 800084f8: 00000013 addi x0,x0,0 + 800084fc: 00000013 addi x0,x0,0 + 80008500: 00031097 auipc x1,0x31 + 80008504: 0a4080e7 jalr x1,164(x1) # 800395a4 + 80008508: 00000013 addi x0,x0,0 + 8000850c: 00000013 addi x0,x0,0 + 80008510: 00000013 addi x0,x0,0 + 80008514: 00000013 addi x0,x0,0 + 80008518: 00000013 addi x0,x0,0 + 8000851c: 00000013 addi x0,x0,0 + 80008520: 00011517 auipc x10,0x11 + 80008524: 74550513 addi x10,x10,1861 # 80019c65 + 80008528: 00000013 addi x0,x0,0 + 8000852c: 00000013 addi x0,x0,0 + 80008530: 00000013 addi x0,x0,0 + 80008534: 00000013 addi x0,x0,0 + 80008538: 00000013 addi x0,x0,0 + 8000853c: 00000013 addi x0,x0,0 + 80008540: 00031097 auipc x1,0x31 + 80008544: 064080e7 jalr x1,100(x1) # 800395a4 + 80008548: 00010517 auipc x10,0x10 + 8000854c: 4a852503 lw x10,1192(x10) # 800189f0 + 80008550: 00050663 beq x10,x0,8000855c + 80008554: 00300593 addi x11,x0,3 + 80008558: 04b51063 bne x10,x11,80008598 + 8000855c: 07800593 addi x11,x0,120 + 80008560: 00010617 auipc x12,0x10 + 80008564: 5f860613 addi x12,x12,1528 # 80018b58 + 80008568: 00000013 addi x0,x0,0 + 8000856c: 00000013 addi x0,x0,0 + 80008570: 00000013 addi x0,x0,0 + 80008574: 00000013 addi x0,x0,0 + 80008578: 00000013 addi x0,x0,0 + 8000857c: 00000013 addi x0,x0,0 + 80008580: 00b60023 sb x11,0(x12) + 80008584: 00160613 addi x12,x12,1 + 80008588: 00010517 auipc x10,0x10 + 8000858c: 56c52503 lw x10,1388(x10) # 80018af4 + 80008590: 324010ef jal x1,800098b4 + 80008594: 1180006f jal x0,800086ac + +0000000080008598 : + 80008598: 00100593 addi x11,x0,1 + 8000859c: 04b50863 beq x10,x11,800085ec + 800085a0: 00400593 addi x11,x0,4 + 800085a4: 08b50a63 beq x10,x11,80008638 + 800085a8: 00500593 addi x11,x0,5 + 800085ac: 0cb50463 beq x10,x11,80008674 + 800085b0: 00000013 addi x0,x0,0 + 800085b4: 00000013 addi x0,x0,0 + 800085b8: 00000013 addi x0,x0,0 + 800085bc: 00000013 addi x0,x0,0 + 800085c0: 00011517 auipc x10,0x11 + 800085c4: 7bb50513 addi x10,x10,1979 # 80019d7b + 800085c8: 00000013 addi x0,x0,0 + 800085cc: 00000013 addi x0,x0,0 + 800085d0: 00000013 addi x0,x0,0 + 800085d4: 00000013 addi x0,x0,0 + 800085d8: 00000013 addi x0,x0,0 + 800085dc: 00000013 addi x0,x0,0 + 800085e0: 00031097 auipc x1,0x31 + 800085e4: fc4080e7 jalr x1,-60(x1) # 800395a4 + 800085e8: 1000006f jal x0,800086e8 + +00000000800085ec : + 800085ec: 06600593 addi x11,x0,102 + 800085f0: 00000013 addi x0,x0,0 + 800085f4: 00000013 addi x0,x0,0 + 800085f8: 00000013 addi x0,x0,0 + 800085fc: 00000013 addi x0,x0,0 + 80008600: 00010617 auipc x12,0x10 + 80008604: 55860613 addi x12,x12,1368 # 80018b58 + 80008608: 00000013 addi x0,x0,0 + 8000860c: 00000013 addi x0,x0,0 + 80008610: 00000013 addi x0,x0,0 + 80008614: 00000013 addi x0,x0,0 + 80008618: 00000013 addi x0,x0,0 + 8000861c: 00000013 addi x0,x0,0 + 80008620: 00b60023 sb x11,0(x12) + 80008624: 00160613 addi x12,x12,1 + 80008628: 00010517 auipc x10,0x10 + 8000862c: 4cc52503 lw x10,1228(x10) # 80018af4 + 80008630: 284010ef jal x1,800098b4 + 80008634: 0780006f jal x0,800086ac + +0000000080008638 : + 80008638: 07600593 addi x11,x0,118 + 8000863c: 00000013 addi x0,x0,0 + 80008640: 00010617 auipc x12,0x10 + 80008644: 51860613 addi x12,x12,1304 # 80018b58 + 80008648: 00000013 addi x0,x0,0 + 8000864c: 00000013 addi x0,x0,0 + 80008650: 00000013 addi x0,x0,0 + 80008654: 00000013 addi x0,x0,0 + 80008658: 00000013 addi x0,x0,0 + 8000865c: 00000013 addi x0,x0,0 + 80008660: 00b60023 sb x11,0(x12) + 80008664: 00160613 addi x12,x12,1 + 80008668: 00010517 auipc x10,0x10 + 8000866c: 48c52503 lw x10,1164(x10) # 80018af4 + 80008670: 244010ef jal x1,800098b4 + +0000000080008674 : + 80008674: 00000013 addi x0,x0,0 + 80008678: 00000013 addi x0,x0,0 + 8000867c: 00000013 addi x0,x0,0 + 80008680: 00011517 auipc x10,0x11 + 80008684: 5de50513 addi x10,x10,1502 # 80019c5e + 80008688: 00000013 addi x0,x0,0 + 8000868c: 00000013 addi x0,x0,0 + 80008690: 00000013 addi x0,x0,0 + 80008694: 00000013 addi x0,x0,0 + 80008698: 00000013 addi x0,x0,0 + 8000869c: 00000013 addi x0,x0,0 + 800086a0: 00031097 auipc x1,0x31 + 800086a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800086a8: 0400006f jal x0,800086e8 + +00000000800086ac : + 800086ac: 00000013 addi x0,x0,0 + 800086b0: 00000013 addi x0,x0,0 + 800086b4: 00000013 addi x0,x0,0 + 800086b8: 00000013 addi x0,x0,0 + 800086bc: 00000013 addi x0,x0,0 + 800086c0: 00010517 auipc x10,0x10 + 800086c4: 49850513 addi x10,x10,1176 # 80018b58 + 800086c8: 00000013 addi x0,x0,0 + 800086cc: 00000013 addi x0,x0,0 + 800086d0: 00000013 addi x0,x0,0 + 800086d4: 00000013 addi x0,x0,0 + 800086d8: 00000013 addi x0,x0,0 + 800086dc: 00000013 addi x0,x0,0 + 800086e0: 00031097 auipc x1,0x31 + 800086e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + +00000000800086e8 : + 800086e8: 00000013 addi x0,x0,0 + 800086ec: 00000013 addi x0,x0,0 + 800086f0: 00000013 addi x0,x0,0 + 800086f4: 00000013 addi x0,x0,0 + 800086f8: 00000013 addi x0,x0,0 + 800086fc: 00000013 addi x0,x0,0 + 80008700: 00011517 auipc x10,0x11 + 80008704: 57650513 addi x10,x10,1398 # 80019c76 + 80008708: 00000013 addi x0,x0,0 + 8000870c: 00000013 addi x0,x0,0 + 80008710: 00000013 addi x0,x0,0 + 80008714: 00000013 addi x0,x0,0 + 80008718: 00000013 addi x0,x0,0 + 8000871c: 00000013 addi x0,x0,0 + 80008720: 00031097 auipc x1,0x31 + 80008724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80008728: 00010517 auipc x10,0x10 + 8000872c: 2c852503 lw x10,712(x10) # 800189f0 + 80008730: 00100593 addi x11,x0,1 + 80008734: 00b51c63 bne x10,x11,8000874c + 80008738: 00010517 auipc x10,0x10 + 8000873c: 3c853503 ld x10,968(x10) # 80018b00 + 80008740: 04000593 addi x11,x0,64 + 80008744: 0f4010ef jal x1,80009838 + 80008748: 0140006f jal x0,8000875c + +000000008000874c : + 8000874c: 00010517 auipc x10,0x10 + 80008750: 3b453503 ld x10,948(x10) # 80018b00 + 80008754: 04000593 addi x11,x0,64 + 80008758: 0e0010ef jal x1,80009838 + +000000008000875c : + 8000875c: 00000013 addi x0,x0,0 + 80008760: 00010517 auipc x10,0x10 + 80008764: 3f850513 addi x10,x10,1016 # 80018b58 + 80008768: 00000013 addi x0,x0,0 + 8000876c: 00000013 addi x0,x0,0 + 80008770: 00000013 addi x0,x0,0 + 80008774: 00000013 addi x0,x0,0 + 80008778: 00000013 addi x0,x0,0 + 8000877c: 00000013 addi x0,x0,0 + 80008780: 00031097 auipc x1,0x31 + 80008784: e24080e7 jalr x1,-476(x1) # 800395a4 + 80008788: 00010517 auipc x10,0x10 + 8000878c: 39052503 lw x10,912(x10) # 80018b18 + 80008790: 08051e63 bne x10,x0,8000882c + 80008794: 00000013 addi x0,x0,0 + 80008798: 00000013 addi x0,x0,0 + 8000879c: 00000013 addi x0,x0,0 + 800087a0: 00011517 auipc x10,0x11 + 800087a4: 4ed50513 addi x10,x10,1261 # 80019c8d + 800087a8: 00000013 addi x0,x0,0 + 800087ac: 00000013 addi x0,x0,0 + 800087b0: 00000013 addi x0,x0,0 + 800087b4: 00000013 addi x0,x0,0 + 800087b8: 00000013 addi x0,x0,0 + 800087bc: 00000013 addi x0,x0,0 + 800087c0: 00031097 auipc x1,0x31 + 800087c4: de4080e7 jalr x1,-540(x1) # 800395a4 + 800087c8: 00010517 auipc x10,0x10 + 800087cc: 22852503 lw x10,552(x10) # 800189f0 + 800087d0: 00100593 addi x11,x0,1 + 800087d4: 00b51c63 bne x10,x11,800087ec + 800087d8: 00010517 auipc x10,0x10 + 800087dc: 33053503 ld x10,816(x10) # 80018b08 + 800087e0: 04000593 addi x11,x0,64 + 800087e4: 054010ef jal x1,80009838 + 800087e8: 0140006f jal x0,800087fc + +00000000800087ec : + 800087ec: 00010517 auipc x10,0x10 + 800087f0: 31c53503 ld x10,796(x10) # 80018b08 + 800087f4: 04000593 addi x11,x0,64 + 800087f8: 040010ef jal x1,80009838 + +00000000800087fc : + 800087fc: 00000013 addi x0,x0,0 + 80008800: 00010517 auipc x10,0x10 + 80008804: 35850513 addi x10,x10,856 # 80018b58 + 80008808: 00000013 addi x0,x0,0 + 8000880c: 00000013 addi x0,x0,0 + 80008810: 00000013 addi x0,x0,0 + 80008814: 00000013 addi x0,x0,0 + 80008818: 00000013 addi x0,x0,0 + 8000881c: 00000013 addi x0,x0,0 + 80008820: 00031097 auipc x1,0x31 + 80008824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80008828: 5bd0006f jal x0,800095e4 + +000000008000882c : + 8000882c: 00100593 addi x11,x0,1 + 80008830: 06b51e63 bne x10,x11,800088ac + +0000000080008834 : + 80008834: 00000013 addi x0,x0,0 + 80008838: 00000013 addi x0,x0,0 + 8000883c: 00000013 addi x0,x0,0 + 80008840: 00011517 auipc x10,0x11 + 80008844: 46450513 addi x10,x10,1124 # 80019ca4 + 80008848: 00000013 addi x0,x0,0 + 8000884c: 00000013 addi x0,x0,0 + 80008850: 00000013 addi x0,x0,0 + 80008854: 00000013 addi x0,x0,0 + 80008858: 00000013 addi x0,x0,0 + 8000885c: 00000013 addi x0,x0,0 + 80008860: 00031097 auipc x1,0x31 + 80008864: d44080e7 jalr x1,-700(x1) # 800395a4 + 80008868: 00010517 auipc x10,0x10 + 8000886c: 2a053503 ld x10,672(x10) # 80018b08 + 80008870: 02000593 addi x11,x0,32 + 80008874: 7c5000ef jal x1,80009838 + 80008878: 00000013 addi x0,x0,0 + 8000887c: 00000013 addi x0,x0,0 + 80008880: 00010517 auipc x10,0x10 + 80008884: 2d850513 addi x10,x10,728 # 80018b58 + 80008888: 00000013 addi x0,x0,0 + 8000888c: 00000013 addi x0,x0,0 + 80008890: 00000013 addi x0,x0,0 + 80008894: 00000013 addi x0,x0,0 + 80008898: 00000013 addi x0,x0,0 + 8000889c: 00000013 addi x0,x0,0 + 800088a0: 00031097 auipc x1,0x31 + 800088a4: d04080e7 jalr x1,-764(x1) # 800395a4 + 800088a8: 53d0006f jal x0,800095e4 + +00000000800088ac : + 800088ac: 00000013 addi x0,x0,0 + 800088b0: 00000013 addi x0,x0,0 + 800088b4: 00000013 addi x0,x0,0 + 800088b8: 00000013 addi x0,x0,0 + 800088bc: 00000013 addi x0,x0,0 + 800088c0: 00011517 auipc x10,0x11 + 800088c4: 44250513 addi x10,x10,1090 # 80019d02 + 800088c8: 00000013 addi x0,x0,0 + 800088cc: 00000013 addi x0,x0,0 + 800088d0: 00000013 addi x0,x0,0 + 800088d4: 00000013 addi x0,x0,0 + 800088d8: 00000013 addi x0,x0,0 + 800088dc: 00000013 addi x0,x0,0 + 800088e0: 00031097 auipc x1,0x31 + 800088e4: cc4080e7 jalr x1,-828(x1) # 800395a4 + 800088e8: 00010517 auipc x10,0x10 + 800088ec: 22053503 ld x10,544(x10) # 80018b08 + 800088f0: 04000593 addi x11,x0,64 + 800088f4: 745000ef jal x1,80009838 + 800088f8: 00000013 addi x0,x0,0 + 800088fc: 00000013 addi x0,x0,0 + 80008900: 00010517 auipc x10,0x10 + 80008904: 25850513 addi x10,x10,600 # 80018b58 + 80008908: 00000013 addi x0,x0,0 + 8000890c: 00000013 addi x0,x0,0 + 80008910: 00000013 addi x0,x0,0 + 80008914: 00000013 addi x0,x0,0 + 80008918: 00000013 addi x0,x0,0 + 8000891c: 00000013 addi x0,x0,0 + 80008920: 00031097 auipc x1,0x31 + 80008924: c84080e7 jalr x1,-892(x1) # 800395a4 + 80008928: 4bd0006f jal x0,800095e4 + +000000008000892c : + 8000892c: 00010417 auipc x8,0x10 + 80008930: 1f442403 lw x8,500(x8) # 80018b20 + 80008934: 00900493 addi x9,x0,9 + 80008938: 0a940c63 beq x8,x9,800089f0 + 8000893c: 00000013 addi x0,x0,0 + 80008940: 00011517 auipc x10,0x11 + 80008944: 46750513 addi x10,x10,1127 # 80019da7 + 80008948: 00000013 addi x0,x0,0 + 8000894c: 00000013 addi x0,x0,0 + 80008950: 00000013 addi x0,x0,0 + 80008954: 00000013 addi x0,x0,0 + 80008958: 00000013 addi x0,x0,0 + 8000895c: 00000013 addi x0,x0,0 + 80008960: 00031097 auipc x1,0x31 + 80008964: c44080e7 jalr x1,-956(x1) # 800395a4 + 80008968: 00000013 addi x0,x0,0 + 8000896c: 00000013 addi x0,x0,0 + 80008970: 00000013 addi x0,x0,0 + 80008974: 00000013 addi x0,x0,0 + 80008978: 00000013 addi x0,x0,0 + 8000897c: 00000013 addi x0,x0,0 + 80008980: 00011517 auipc x10,0x11 + 80008984: 45350513 addi x10,x10,1107 # 80019dd3 + 80008988: 00000013 addi x0,x0,0 + 8000898c: 00000013 addi x0,x0,0 + 80008990: 00000013 addi x0,x0,0 + 80008994: 00000013 addi x0,x0,0 + 80008998: 00000013 addi x0,x0,0 + 8000899c: 00000013 addi x0,x0,0 + 800089a0: 00031097 auipc x1,0x31 + 800089a4: c04080e7 jalr x1,-1020(x1) # 800395a4 + 800089a8: 00010817 auipc x16,0x10 + 800089ac: 18080813 addi x16,x16,384 # 80018b28 + 800089b0: 00083503 ld x10,0(x16) + 800089b4: 00031097 auipc x1,0x31 + 800089b8: bf0080e7 jalr x1,-1040(x1) # 800395a4 + 800089bc: 00000013 addi x0,x0,0 + 800089c0: 00011517 auipc x10,0x11 + 800089c4: 85850513 addi x10,x10,-1960 # 80019218 + 800089c8: 00000013 addi x0,x0,0 + 800089cc: 00000013 addi x0,x0,0 + 800089d0: 00000013 addi x0,x0,0 + 800089d4: 00000013 addi x0,x0,0 + 800089d8: 00000013 addi x0,x0,0 + 800089dc: 00000013 addi x0,x0,0 + 800089e0: 00031097 auipc x1,0x31 + 800089e4: bc4080e7 jalr x1,-1084(x1) # 800395a4 + 800089e8: 280404e3 beq x8,x0,80009470 + 800089ec: 3400006f jal x0,80008d2c + +00000000800089f0 : + 800089f0: 00000013 addi x0,x0,0 + 800089f4: 00000013 addi x0,x0,0 + 800089f8: 00000013 addi x0,x0,0 + 800089fc: 00000013 addi x0,x0,0 + 80008a00: 00011517 auipc x10,0x11 + 80008a04: 3e350513 addi x10,x10,995 # 80019de3 + 80008a08: 00000013 addi x0,x0,0 + 80008a0c: 00000013 addi x0,x0,0 + 80008a10: 00000013 addi x0,x0,0 + 80008a14: 00000013 addi x0,x0,0 + 80008a18: 00000013 addi x0,x0,0 + 80008a1c: 00000013 addi x0,x0,0 + 80008a20: 00031097 auipc x1,0x31 + 80008a24: b84080e7 jalr x1,-1148(x1) # 800395a4 + 80008a28: 00010517 auipc x10,0x10 + 80008a2c: 0e053503 ld x10,224(x10) # 80018b08 + 80008a30: 04000593 addi x11,x0,64 + 80008a34: 605000ef jal x1,80009838 + 80008a38: 00000013 addi x0,x0,0 + 80008a3c: 00000013 addi x0,x0,0 + 80008a40: 00010517 auipc x10,0x10 + 80008a44: 11850513 addi x10,x10,280 # 80018b58 + 80008a48: 00000013 addi x0,x0,0 + 80008a4c: 00000013 addi x0,x0,0 + 80008a50: 00000013 addi x0,x0,0 + 80008a54: 00000013 addi x0,x0,0 + 80008a58: 00000013 addi x0,x0,0 + 80008a5c: 00000013 addi x0,x0,0 + 80008a60: 00031097 auipc x1,0x31 + 80008a64: b44080e7 jalr x1,-1212(x1) # 800395a4 + 80008a68: 00000013 addi x0,x0,0 + 80008a6c: 00000013 addi x0,x0,0 + 80008a70: 00000013 addi x0,x0,0 + 80008a74: 00000013 addi x0,x0,0 + 80008a78: 00000013 addi x0,x0,0 + 80008a7c: 00000013 addi x0,x0,0 + 80008a80: 00011517 auipc x10,0x11 + 80008a84: 38e50513 addi x10,x10,910 # 80019e0e + 80008a88: 00000013 addi x0,x0,0 + 80008a8c: 00000013 addi x0,x0,0 + 80008a90: 00000013 addi x0,x0,0 + 80008a94: 00000013 addi x0,x0,0 + 80008a98: 00000013 addi x0,x0,0 + 80008a9c: 00000013 addi x0,x0,0 + 80008aa0: 00031097 auipc x1,0x31 + 80008aa4: b04080e7 jalr x1,-1276(x1) # 800395a4 + 80008aa8: 00010517 auipc x10,0x10 + 80008aac: 05853503 ld x10,88(x10) # 80018b00 + 80008ab0: 04000593 addi x11,x0,64 + 80008ab4: 585000ef jal x1,80009838 + 80008ab8: 00000013 addi x0,x0,0 + 80008abc: 00000013 addi x0,x0,0 + 80008ac0: 00010517 auipc x10,0x10 + 80008ac4: 09850513 addi x10,x10,152 # 80018b58 + 80008ac8: 00000013 addi x0,x0,0 + 80008acc: 00000013 addi x0,x0,0 + 80008ad0: 00000013 addi x0,x0,0 + 80008ad4: 00000013 addi x0,x0,0 + 80008ad8: 00000013 addi x0,x0,0 + 80008adc: 00000013 addi x0,x0,0 + 80008ae0: 00031097 auipc x1,0x31 + 80008ae4: ac4080e7 jalr x1,-1340(x1) # 800395a4 + 80008ae8: 00010317 auipc x6,0x10 + 80008aec: 01833303 ld x6,24(x6) # 80018b00 + 80008af0: 00010397 auipc x7,0x10 + 80008af4: 0183b383 ld x7,24(x7) # 80018b08 + 80008af8: 10736a63 bltu x6,x7,80008c0c + +0000000080008afc : + 80008afc: 00000013 addi x0,x0,0 + 80008b00: 00011517 auipc x10,0x11 + 80008b04: 33d50513 addi x10,x10,829 # 80019e3d + 80008b08: 00000013 addi x0,x0,0 + 80008b0c: 00000013 addi x0,x0,0 + 80008b10: 00000013 addi x0,x0,0 + 80008b14: 00000013 addi x0,x0,0 + 80008b18: 00000013 addi x0,x0,0 + 80008b1c: 00000013 addi x0,x0,0 + 80008b20: 00031097 auipc x1,0x31 + 80008b24: a84080e7 jalr x1,-1404(x1) # 800395a4 + 80008b28: 00000013 addi x0,x0,0 + 80008b2c: 00000013 addi x0,x0,0 + 80008b30: 00000013 addi x0,x0,0 + 80008b34: 00000013 addi x0,x0,0 + 80008b38: 00000013 addi x0,x0,0 + 80008b3c: 00000013 addi x0,x0,0 + 80008b40: 00011517 auipc x10,0x11 + 80008b44: 36550513 addi x10,x10,869 # 80019ea5 + 80008b48: 00000013 addi x0,x0,0 + 80008b4c: 00000013 addi x0,x0,0 + 80008b50: 00000013 addi x0,x0,0 + 80008b54: 00000013 addi x0,x0,0 + 80008b58: 00000013 addi x0,x0,0 + 80008b5c: 00000013 addi x0,x0,0 + 80008b60: 00031097 auipc x1,0x31 + 80008b64: a44080e7 jalr x1,-1468(x1) # 800395a4 + 80008b68: 00010317 auipc x6,0x10 + 80008b6c: f9833303 ld x6,-104(x6) # 80018b00 + 80008b70: 00010397 auipc x7,0x10 + 80008b74: f983b383 ld x7,-104(x7) # 80018b08 + 80008b78: 40730533 sub x10,x6,x7 + 80008b7c: 04000593 addi x11,x0,64 + 80008b80: 4b9000ef jal x1,80009838 + 80008b84: 00000013 addi x0,x0,0 + 80008b88: 00000013 addi x0,x0,0 + 80008b8c: 00000013 addi x0,x0,0 + 80008b90: 00000013 addi x0,x0,0 + 80008b94: 00000013 addi x0,x0,0 + 80008b98: 00000013 addi x0,x0,0 + 80008b9c: 00000013 addi x0,x0,0 + 80008ba0: 00010517 auipc x10,0x10 + 80008ba4: fb850513 addi x10,x10,-72 # 80018b58 + 80008ba8: 00000013 addi x0,x0,0 + 80008bac: 00000013 addi x0,x0,0 + 80008bb0: 00000013 addi x0,x0,0 + 80008bb4: 00000013 addi x0,x0,0 + 80008bb8: 00000013 addi x0,x0,0 + 80008bbc: 00000013 addi x0,x0,0 + 80008bc0: 00031097 auipc x1,0x31 + 80008bc4: 9e4080e7 jalr x1,-1564(x1) # 800395a4 + 80008bc8: 00000013 addi x0,x0,0 + 80008bcc: 00000013 addi x0,x0,0 + 80008bd0: 00000013 addi x0,x0,0 + 80008bd4: 00000013 addi x0,x0,0 + 80008bd8: 00000013 addi x0,x0,0 + 80008bdc: 00000013 addi x0,x0,0 + 80008be0: 00011517 auipc x10,0x11 + 80008be4: 2ec50513 addi x10,x10,748 # 80019ecc + 80008be8: 00000013 addi x0,x0,0 + 80008bec: 00000013 addi x0,x0,0 + 80008bf0: 00000013 addi x0,x0,0 + 80008bf4: 00000013 addi x0,x0,0 + 80008bf8: 00000013 addi x0,x0,0 + 80008bfc: 00000013 addi x0,x0,0 + 80008c00: 00031097 auipc x1,0x31 + 80008c04: 9a4080e7 jalr x1,-1628(x1) # 800395a4 + 80008c08: 1dd0006f jal x0,800095e4 + +0000000080008c0c : + 80008c0c: 00000013 addi x0,x0,0 + 80008c10: 00000013 addi x0,x0,0 + 80008c14: 00000013 addi x0,x0,0 + 80008c18: 00000013 addi x0,x0,0 + 80008c1c: 00000013 addi x0,x0,0 + 80008c20: 00011517 auipc x10,0x11 + 80008c24: 24950513 addi x10,x10,585 # 80019e69 + 80008c28: 00000013 addi x0,x0,0 + 80008c2c: 00000013 addi x0,x0,0 + 80008c30: 00000013 addi x0,x0,0 + 80008c34: 00000013 addi x0,x0,0 + 80008c38: 00000013 addi x0,x0,0 + 80008c3c: 00000013 addi x0,x0,0 + 80008c40: 00031097 auipc x1,0x31 + 80008c44: 964080e7 jalr x1,-1692(x1) # 800395a4 + 80008c48: 00000013 addi x0,x0,0 + 80008c4c: 00000013 addi x0,x0,0 + 80008c50: 00000013 addi x0,x0,0 + 80008c54: 00000013 addi x0,x0,0 + 80008c58: 00000013 addi x0,x0,0 + 80008c5c: 00000013 addi x0,x0,0 + 80008c60: 00011517 auipc x10,0x11 + 80008c64: 24550513 addi x10,x10,581 # 80019ea5 + 80008c68: 00000013 addi x0,x0,0 + 80008c6c: 00000013 addi x0,x0,0 + 80008c70: 00000013 addi x0,x0,0 + 80008c74: 00000013 addi x0,x0,0 + 80008c78: 00000013 addi x0,x0,0 + 80008c7c: 00000013 addi x0,x0,0 + 80008c80: 00031097 auipc x1,0x31 + 80008c84: 924080e7 jalr x1,-1756(x1) # 800395a4 + 80008c88: 00010317 auipc x6,0x10 + 80008c8c: e8033303 ld x6,-384(x6) # 80018b08 + 80008c90: 00010397 auipc x7,0x10 + 80008c94: e703b383 ld x7,-400(x7) # 80018b00 + 80008c98: 40730533 sub x10,x6,x7 + 80008c9c: 04000593 addi x11,x0,64 + 80008ca0: 399000ef jal x1,80009838 + 80008ca4: 00000013 addi x0,x0,0 + 80008ca8: 00000013 addi x0,x0,0 + 80008cac: 00000013 addi x0,x0,0 + 80008cb0: 00000013 addi x0,x0,0 + 80008cb4: 00000013 addi x0,x0,0 + 80008cb8: 00000013 addi x0,x0,0 + 80008cbc: 00000013 addi x0,x0,0 + 80008cc0: 00010517 auipc x10,0x10 + 80008cc4: e9850513 addi x10,x10,-360 # 80018b58 + 80008cc8: 00000013 addi x0,x0,0 + 80008ccc: 00000013 addi x0,x0,0 + 80008cd0: 00000013 addi x0,x0,0 + 80008cd4: 00000013 addi x0,x0,0 + 80008cd8: 00000013 addi x0,x0,0 + 80008cdc: 00000013 addi x0,x0,0 + 80008ce0: 00031097 auipc x1,0x31 + 80008ce4: 8c4080e7 jalr x1,-1852(x1) # 800395a4 + 80008ce8: 00000013 addi x0,x0,0 + 80008cec: 00000013 addi x0,x0,0 + 80008cf0: 00000013 addi x0,x0,0 + 80008cf4: 00000013 addi x0,x0,0 + 80008cf8: 00000013 addi x0,x0,0 + 80008cfc: 00000013 addi x0,x0,0 + 80008d00: 00011517 auipc x10,0x11 + 80008d04: 2b450513 addi x10,x10,692 # 80019fb4 + 80008d08: 00000013 addi x0,x0,0 + 80008d0c: 00000013 addi x0,x0,0 + 80008d10: 00000013 addi x0,x0,0 + 80008d14: 00000013 addi x0,x0,0 + 80008d18: 00000013 addi x0,x0,0 + 80008d1c: 00000013 addi x0,x0,0 + 80008d20: 00031097 auipc x1,0x31 + 80008d24: 884080e7 jalr x1,-1916(x1) # 800395a4 + 80008d28: 0bd0006f jal x0,800095e4 + +0000000080008d2c : + 80008d2c: 00000013 addi x0,x0,0 + 80008d30: 00000013 addi x0,x0,0 + 80008d34: 00000013 addi x0,x0,0 + 80008d38: 00000013 addi x0,x0,0 + 80008d3c: 00000013 addi x0,x0,0 + 80008d40: 00011517 auipc x10,0x11 + 80008d44: 35b50513 addi x10,x10,859 # 8001a09b + 80008d48: 00000013 addi x0,x0,0 + 80008d4c: 00000013 addi x0,x0,0 + 80008d50: 00000013 addi x0,x0,0 + 80008d54: 00000013 addi x0,x0,0 + 80008d58: 00000013 addi x0,x0,0 + 80008d5c: 00000013 addi x0,x0,0 + 80008d60: 00031097 auipc x1,0x31 + 80008d64: 844080e7 jalr x1,-1980(x1) # 800395a4 + 80008d68: 00010517 auipc x10,0x10 + 80008d6c: dbc52503 lw x10,-580(x10) # 80018b24 + 80008d70: 04050a63 beq x10,x0,80008dc4 + 80008d74: 00100593 addi x11,x0,1 + 80008d78: 08b50663 beq x10,x11,80008e04 + 80008d7c: 00200593 addi x11,x0,2 + 80008d80: 0cb50263 beq x10,x11,80008e44 + 80008d84: 00300593 addi x11,x0,3 + 80008d88: 0eb50e63 beq x10,x11,80008e84 + 80008d8c: 00000013 addi x0,x0,0 + 80008d90: 00000013 addi x0,x0,0 + 80008d94: 00000013 addi x0,x0,0 + 80008d98: 00000013 addi x0,x0,0 + 80008d9c: 00000013 addi x0,x0,0 + 80008da0: 00011517 auipc x10,0x11 + 80008da4: 33750513 addi x10,x10,823 # 8001a0d7 + 80008da8: 00000013 addi x0,x0,0 + 80008dac: 00000013 addi x0,x0,0 + 80008db0: 00000013 addi x0,x0,0 + 80008db4: 00000013 addi x0,x0,0 + 80008db8: 00000013 addi x0,x0,0 + 80008dbc: 00000013 addi x0,x0,0 + 80008dc0: 1000006f jal x0,80008ec0 + +0000000080008dc4 : + 80008dc4: 00000013 addi x0,x0,0 + 80008dc8: 00000013 addi x0,x0,0 + 80008dcc: 00000013 addi x0,x0,0 + 80008dd0: 00000013 addi x0,x0,0 + 80008dd4: 00000013 addi x0,x0,0 + 80008dd8: 00000013 addi x0,x0,0 + 80008ddc: 00000013 addi x0,x0,0 + 80008de0: 00011517 auipc x10,0x11 + 80008de4: 2d550513 addi x10,x10,725 # 8001a0b5 + 80008de8: 00000013 addi x0,x0,0 + 80008dec: 00000013 addi x0,x0,0 + 80008df0: 00000013 addi x0,x0,0 + 80008df4: 00000013 addi x0,x0,0 + 80008df8: 00000013 addi x0,x0,0 + 80008dfc: 00000013 addi x0,x0,0 + 80008e00: 0c00006f jal x0,80008ec0 + +0000000080008e04 : + 80008e04: 00000013 addi x0,x0,0 + 80008e08: 00000013 addi x0,x0,0 + 80008e0c: 00000013 addi x0,x0,0 + 80008e10: 00000013 addi x0,x0,0 + 80008e14: 00000013 addi x0,x0,0 + 80008e18: 00000013 addi x0,x0,0 + 80008e1c: 00000013 addi x0,x0,0 + 80008e20: 00011517 auipc x10,0x11 + 80008e24: 29d50513 addi x10,x10,669 # 8001a0bd + 80008e28: 00000013 addi x0,x0,0 + 80008e2c: 00000013 addi x0,x0,0 + 80008e30: 00000013 addi x0,x0,0 + 80008e34: 00000013 addi x0,x0,0 + 80008e38: 00000013 addi x0,x0,0 + 80008e3c: 00000013 addi x0,x0,0 + 80008e40: 0800006f jal x0,80008ec0 + +0000000080008e44 : + 80008e44: 00000013 addi x0,x0,0 + 80008e48: 00000013 addi x0,x0,0 + 80008e4c: 00000013 addi x0,x0,0 + 80008e50: 00000013 addi x0,x0,0 + 80008e54: 00000013 addi x0,x0,0 + 80008e58: 00000013 addi x0,x0,0 + 80008e5c: 00000013 addi x0,x0,0 + 80008e60: 00011517 auipc x10,0x11 + 80008e64: 26550513 addi x10,x10,613 # 8001a0c5 + 80008e68: 00000013 addi x0,x0,0 + 80008e6c: 00000013 addi x0,x0,0 + 80008e70: 00000013 addi x0,x0,0 + 80008e74: 00000013 addi x0,x0,0 + 80008e78: 00000013 addi x0,x0,0 + 80008e7c: 00000013 addi x0,x0,0 + 80008e80: 0400006f jal x0,80008ec0 + +0000000080008e84 : + 80008e84: 00000013 addi x0,x0,0 + 80008e88: 00000013 addi x0,x0,0 + 80008e8c: 00000013 addi x0,x0,0 + 80008e90: 00000013 addi x0,x0,0 + 80008e94: 00000013 addi x0,x0,0 + 80008e98: 00000013 addi x0,x0,0 + 80008e9c: 00000013 addi x0,x0,0 + 80008ea0: 00011517 auipc x10,0x11 + 80008ea4: 22e50513 addi x10,x10,558 # 8001a0ce + 80008ea8: 00000013 addi x0,x0,0 + 80008eac: 00000013 addi x0,x0,0 + 80008eb0: 00000013 addi x0,x0,0 + 80008eb4: 00000013 addi x0,x0,0 + 80008eb8: 00000013 addi x0,x0,0 + 80008ebc: 00000013 addi x0,x0,0 + +0000000080008ec0 : + 80008ec0: 00030097 auipc x1,0x30 + 80008ec4: 6e4080e7 jalr x1,1764(x1) # 800395a4 + 80008ec8: 00000013 addi x0,x0,0 + 80008ecc: 00000013 addi x0,x0,0 + 80008ed0: 00000013 addi x0,x0,0 + 80008ed4: 00000013 addi x0,x0,0 + 80008ed8: 00000013 addi x0,x0,0 + 80008edc: 00000013 addi x0,x0,0 + 80008ee0: 00011517 auipc x10,0x11 + 80008ee4: 20050513 addi x10,x10,512 # 8001a0e0 + 80008ee8: 00000013 addi x0,x0,0 + 80008eec: 00000013 addi x0,x0,0 + 80008ef0: 00000013 addi x0,x0,0 + 80008ef4: 00000013 addi x0,x0,0 + 80008ef8: 00000013 addi x0,x0,0 + 80008efc: 00000013 addi x0,x0,0 + 80008f00: 00030097 auipc x1,0x30 + 80008f04: 6a4080e7 jalr x1,1700(x1) # 800395a4 + 80008f08: 00010517 auipc x10,0x10 + 80008f0c: c1852503 lw x10,-1000(x10) # 80018b20 + 80008f10: 00100593 addi x11,x0,1 + 80008f14: 06b50863 beq x10,x11,80008f84 + 80008f18: 00200593 addi x11,x0,2 + 80008f1c: 0ab50463 beq x10,x11,80008fc4 + 80008f20: 00300593 addi x11,x0,3 + 80008f24: 0eb50063 beq x10,x11,80009004 + 80008f28: 00400593 addi x11,x0,4 + 80008f2c: 10b50c63 beq x10,x11,80009044 + 80008f30: 00500593 addi x11,x0,5 + 80008f34: 14b50863 beq x10,x11,80009084 + 80008f38: 00600593 addi x11,x0,6 + 80008f3c: 18b50463 beq x10,x11,800090c4 + 80008f40: 00700593 addi x11,x0,7 + 80008f44: 1cb50063 beq x10,x11,80009104 + 80008f48: 00800593 addi x11,x0,8 + 80008f4c: 1eb50c63 beq x10,x11,80009144 + 80008f50: 00000013 addi x0,x0,0 + 80008f54: 00000013 addi x0,x0,0 + 80008f58: 00000013 addi x0,x0,0 + 80008f5c: 00000013 addi x0,x0,0 + 80008f60: 00011517 auipc x10,0x11 + 80008f64: 2d750513 addi x10,x10,727 # 8001a237 + 80008f68: 00000013 addi x0,x0,0 + 80008f6c: 00000013 addi x0,x0,0 + 80008f70: 00000013 addi x0,x0,0 + 80008f74: 00000013 addi x0,x0,0 + 80008f78: 00000013 addi x0,x0,0 + 80008f7c: 00000013 addi x0,x0,0 + 80008f80: 2000006f jal x0,80009180 + +0000000080008f84 : + 80008f84: 00000013 addi x0,x0,0 + 80008f88: 00000013 addi x0,x0,0 + 80008f8c: 00000013 addi x0,x0,0 + 80008f90: 00000013 addi x0,x0,0 + 80008f94: 00000013 addi x0,x0,0 + 80008f98: 00000013 addi x0,x0,0 + 80008f9c: 00000013 addi x0,x0,0 + 80008fa0: 00011517 auipc x10,0x11 + 80008fa4: 15a50513 addi x10,x10,346 # 8001a0fa + 80008fa8: 00000013 addi x0,x0,0 + 80008fac: 00000013 addi x0,x0,0 + 80008fb0: 00000013 addi x0,x0,0 + 80008fb4: 00000013 addi x0,x0,0 + 80008fb8: 00000013 addi x0,x0,0 + 80008fbc: 00000013 addi x0,x0,0 + 80008fc0: 1c00006f jal x0,80009180 + +0000000080008fc4 : + 80008fc4: 00000013 addi x0,x0,0 + 80008fc8: 00000013 addi x0,x0,0 + 80008fcc: 00000013 addi x0,x0,0 + 80008fd0: 00000013 addi x0,x0,0 + 80008fd4: 00000013 addi x0,x0,0 + 80008fd8: 00000013 addi x0,x0,0 + 80008fdc: 00000013 addi x0,x0,0 + 80008fe0: 00011517 auipc x10,0x11 + 80008fe4: 14b50513 addi x10,x10,331 # 8001a12b + 80008fe8: 00000013 addi x0,x0,0 + 80008fec: 00000013 addi x0,x0,0 + 80008ff0: 00000013 addi x0,x0,0 + 80008ff4: 00000013 addi x0,x0,0 + 80008ff8: 00000013 addi x0,x0,0 + 80008ffc: 00000013 addi x0,x0,0 + 80009000: 1800006f jal x0,80009180 + +0000000080009004 : + 80009004: 00000013 addi x0,x0,0 + 80009008: 00000013 addi x0,x0,0 + 8000900c: 00000013 addi x0,x0,0 + 80009010: 00000013 addi x0,x0,0 + 80009014: 00000013 addi x0,x0,0 + 80009018: 00000013 addi x0,x0,0 + 8000901c: 00000013 addi x0,x0,0 + 80009020: 00011517 auipc x10,0x11 + 80009024: 12b50513 addi x10,x10,299 # 8001a14b + 80009028: 00000013 addi x0,x0,0 + 8000902c: 00000013 addi x0,x0,0 + 80009030: 00000013 addi x0,x0,0 + 80009034: 00000013 addi x0,x0,0 + 80009038: 00000013 addi x0,x0,0 + 8000903c: 00000013 addi x0,x0,0 + 80009040: 1400006f jal x0,80009180 + +0000000080009044 : + 80009044: 00000013 addi x0,x0,0 + 80009048: 00000013 addi x0,x0,0 + 8000904c: 00000013 addi x0,x0,0 + 80009050: 00000013 addi x0,x0,0 + 80009054: 00000013 addi x0,x0,0 + 80009058: 00000013 addi x0,x0,0 + 8000905c: 00000013 addi x0,x0,0 + 80009060: 00011517 auipc x10,0x11 + 80009064: 10950513 addi x10,x10,265 # 8001a169 + 80009068: 00000013 addi x0,x0,0 + 8000906c: 00000013 addi x0,x0,0 + 80009070: 00000013 addi x0,x0,0 + 80009074: 00000013 addi x0,x0,0 + 80009078: 00000013 addi x0,x0,0 + 8000907c: 00000013 addi x0,x0,0 + 80009080: 1000006f jal x0,80009180 + +0000000080009084 : + 80009084: 00000013 addi x0,x0,0 + 80009088: 00000013 addi x0,x0,0 + 8000908c: 00000013 addi x0,x0,0 + 80009090: 00000013 addi x0,x0,0 + 80009094: 00000013 addi x0,x0,0 + 80009098: 00000013 addi x0,x0,0 + 8000909c: 00000013 addi x0,x0,0 + 800090a0: 00011517 auipc x10,0x11 + 800090a4: 0e850513 addi x10,x10,232 # 8001a188 + 800090a8: 00000013 addi x0,x0,0 + 800090ac: 00000013 addi x0,x0,0 + 800090b0: 00000013 addi x0,x0,0 + 800090b4: 00000013 addi x0,x0,0 + 800090b8: 00000013 addi x0,x0,0 + 800090bc: 00000013 addi x0,x0,0 + 800090c0: 0c00006f jal x0,80009180 + +00000000800090c4 : + 800090c4: 00000013 addi x0,x0,0 + 800090c8: 00000013 addi x0,x0,0 + 800090cc: 00000013 addi x0,x0,0 + 800090d0: 00000013 addi x0,x0,0 + 800090d4: 00000013 addi x0,x0,0 + 800090d8: 00000013 addi x0,x0,0 + 800090dc: 00000013 addi x0,x0,0 + 800090e0: 00011517 auipc x10,0x11 + 800090e4: 0d050513 addi x10,x10,208 # 8001a1b0 + 800090e8: 00000013 addi x0,x0,0 + 800090ec: 00000013 addi x0,x0,0 + 800090f0: 00000013 addi x0,x0,0 + 800090f4: 00000013 addi x0,x0,0 + 800090f8: 00000013 addi x0,x0,0 + 800090fc: 00000013 addi x0,x0,0 + 80009100: 0800006f jal x0,80009180 + +0000000080009104 : + 80009104: 00000013 addi x0,x0,0 + 80009108: 00000013 addi x0,x0,0 + 8000910c: 00000013 addi x0,x0,0 + 80009110: 00000013 addi x0,x0,0 + 80009114: 00000013 addi x0,x0,0 + 80009118: 00000013 addi x0,x0,0 + 8000911c: 00000013 addi x0,x0,0 + 80009120: 00011517 auipc x10,0x11 + 80009124: 0bc50513 addi x10,x10,188 # 8001a1dc + 80009128: 00000013 addi x0,x0,0 + 8000912c: 00000013 addi x0,x0,0 + 80009130: 00000013 addi x0,x0,0 + 80009134: 00000013 addi x0,x0,0 + 80009138: 00000013 addi x0,x0,0 + 8000913c: 00000013 addi x0,x0,0 + 80009140: 0400006f jal x0,80009180 + +0000000080009144 : + 80009144: 00000013 addi x0,x0,0 + 80009148: 00000013 addi x0,x0,0 + 8000914c: 00000013 addi x0,x0,0 + 80009150: 00000013 addi x0,x0,0 + 80009154: 00000013 addi x0,x0,0 + 80009158: 00000013 addi x0,x0,0 + 8000915c: 00000013 addi x0,x0,0 + 80009160: 00011517 auipc x10,0x11 + 80009164: 0a850513 addi x10,x10,168 # 8001a208 + 80009168: 00000013 addi x0,x0,0 + 8000916c: 00000013 addi x0,x0,0 + 80009170: 00000013 addi x0,x0,0 + 80009174: 00000013 addi x0,x0,0 + 80009178: 00000013 addi x0,x0,0 + 8000917c: 00000013 addi x0,x0,0 + +0000000080009180 : + 80009180: 00030097 auipc x1,0x30 + 80009184: 424080e7 jalr x1,1060(x1) # 800395a4 + 80009188: 00000013 addi x0,x0,0 + 8000918c: 00000013 addi x0,x0,0 + 80009190: 00000013 addi x0,x0,0 + 80009194: 00000013 addi x0,x0,0 + 80009198: 00000013 addi x0,x0,0 + 8000919c: 00000013 addi x0,x0,0 + 800091a0: 00011517 auipc x10,0x11 + 800091a4: 0a650513 addi x10,x10,166 # 8001a246 + 800091a8: 00000013 addi x0,x0,0 + 800091ac: 00000013 addi x0,x0,0 + 800091b0: 00000013 addi x0,x0,0 + 800091b4: 00000013 addi x0,x0,0 + 800091b8: 00000013 addi x0,x0,0 + 800091bc: 00000013 addi x0,x0,0 + 800091c0: 00030097 auipc x1,0x30 + 800091c4: 3e4080e7 jalr x1,996(x1) # 800395a4 + 800091c8: 00010517 auipc x10,0x10 + 800091cc: 94053503 ld x10,-1728(x10) # 80018b08 + 800091d0: 04000593 addi x11,x0,64 + 800091d4: 664000ef jal x1,80009838 + 800091d8: 00000013 addi x0,x0,0 + 800091dc: 00000013 addi x0,x0,0 + 800091e0: 00010517 auipc x10,0x10 + 800091e4: 97850513 addi x10,x10,-1672 # 80018b58 + 800091e8: 00000013 addi x0,x0,0 + 800091ec: 00000013 addi x0,x0,0 + 800091f0: 00000013 addi x0,x0,0 + 800091f4: 00000013 addi x0,x0,0 + 800091f8: 00000013 addi x0,x0,0 + 800091fc: 00000013 addi x0,x0,0 + 80009200: 00030097 auipc x1,0x30 + 80009204: 3a4080e7 jalr x1,932(x1) # 800395a4 + 80009208: 00000013 addi x0,x0,0 + 8000920c: 00000013 addi x0,x0,0 + 80009210: 00000013 addi x0,x0,0 + 80009214: 00000013 addi x0,x0,0 + 80009218: 00000013 addi x0,x0,0 + 8000921c: 00000013 addi x0,x0,0 + 80009220: 00011517 auipc x10,0x11 + 80009224: 03d50513 addi x10,x10,61 # 8001a25d + 80009228: 00000013 addi x0,x0,0 + 8000922c: 00000013 addi x0,x0,0 + 80009230: 00000013 addi x0,x0,0 + 80009234: 00000013 addi x0,x0,0 + 80009238: 00000013 addi x0,x0,0 + 8000923c: 00000013 addi x0,x0,0 + 80009240: 00030097 auipc x1,0x30 + 80009244: 364080e7 jalr x1,868(x1) # 800395a4 + 80009248: 00010517 auipc x10,0x10 + 8000924c: 8b853503 ld x10,-1864(x10) # 80018b00 + 80009250: 04000593 addi x11,x0,64 + 80009254: 5e4000ef jal x1,80009838 + 80009258: 00000013 addi x0,x0,0 + 8000925c: 00000013 addi x0,x0,0 + 80009260: 00010517 auipc x10,0x10 + 80009264: 8f850513 addi x10,x10,-1800 # 80018b58 + 80009268: 00000013 addi x0,x0,0 + 8000926c: 00000013 addi x0,x0,0 + 80009270: 00000013 addi x0,x0,0 + 80009274: 00000013 addi x0,x0,0 + 80009278: 00000013 addi x0,x0,0 + 8000927c: 00000013 addi x0,x0,0 + 80009280: 00030097 auipc x1,0x30 + 80009284: 324080e7 jalr x1,804(x1) # 800395a4 + 80009288: 00010517 auipc x10,0x10 + 8000928c: 89852503 lw x10,-1896(x10) # 80018b20 + 80009290: 00200593 addi x11,x0,2 + 80009294: 08b51463 bne x10,x11,8000931c + 80009298: 00000013 addi x0,x0,0 + 8000929c: 00000013 addi x0,x0,0 + 800092a0: 00011517 auipc x10,0x11 + 800092a4: fd450513 addi x10,x10,-44 # 8001a274 + 800092a8: 00000013 addi x0,x0,0 + 800092ac: 00000013 addi x0,x0,0 + 800092b0: 00000013 addi x0,x0,0 + 800092b4: 00000013 addi x0,x0,0 + 800092b8: 00000013 addi x0,x0,0 + 800092bc: 00000013 addi x0,x0,0 + 800092c0: 00030097 auipc x1,0x30 + 800092c4: 2e4080e7 jalr x1,740(x1) # 800395a4 + 800092c8: 00010517 auipc x10,0x10 + 800092cc: 84053503 ld x10,-1984(x10) # 80018b08 + 800092d0: 284000ef jal x1,80009554 + 800092d4: 00030097 auipc x1,0x30 + 800092d8: 2d0080e7 jalr x1,720(x1) # 800395a4 + 800092dc: 00000013 addi x0,x0,0 + 800092e0: 00011517 auipc x10,0x11 + 800092e4: fab50513 addi x10,x10,-85 # 8001a28b + 800092e8: 00000013 addi x0,x0,0 + 800092ec: 00000013 addi x0,x0,0 + 800092f0: 00000013 addi x0,x0,0 + 800092f4: 00000013 addi x0,x0,0 + 800092f8: 00000013 addi x0,x0,0 + 800092fc: 00000013 addi x0,x0,0 + 80009300: 00030097 auipc x1,0x30 + 80009304: 2a4080e7 jalr x1,676(x1) # 800395a4 + 80009308: 0000f517 auipc x10,0xf + 8000930c: 7f853503 ld x10,2040(x10) # 80018b00 + 80009310: 244000ef jal x1,80009554 + 80009314: 00030097 auipc x1,0x30 + 80009318: 290080e7 jalr x1,656(x1) # 800395a4 + +000000008000931c : + 8000931c: 00000097 auipc x1,0x0 + 80009320: 314080e7 jalr x1,788(x1) # 80009630 + 80009324: 0000f517 auipc x10,0xf + 80009328: 7fc52503 lw x10,2044(x10) # 80018b20 + 8000932c: 00100593 addi x11,x0,1 + 80009330: 02b51e63 bne x10,x11,8000936c + 80009334: 00000013 addi x0,x0,0 + 80009338: 00000013 addi x0,x0,0 + 8000933c: 00000013 addi x0,x0,0 + 80009340: 00011517 auipc x10,0x11 + 80009344: fc150513 addi x10,x10,-63 # 8001a301 + 80009348: 00000013 addi x0,x0,0 + 8000934c: 00000013 addi x0,x0,0 + 80009350: 00000013 addi x0,x0,0 + 80009354: 00000013 addi x0,x0,0 + 80009358: 00000013 addi x0,x0,0 + 8000935c: 00000013 addi x0,x0,0 + 80009360: 00030097 auipc x1,0x30 + 80009364: 244080e7 jalr x1,580(x1) # 800395a4 + 80009368: 27c0006f jal x0,800095e4 + 8000936c: 00200593 addi x11,x0,2 + 80009370: 02b51e63 bne x10,x11,800093ac + 80009374: 00000013 addi x0,x0,0 + 80009378: 00000013 addi x0,x0,0 + 8000937c: 00000013 addi x0,x0,0 + 80009380: 00011517 auipc x10,0x11 + 80009384: 05750513 addi x10,x10,87 # 8001a3d7 + 80009388: 00000013 addi x0,x0,0 + 8000938c: 00000013 addi x0,x0,0 + 80009390: 00000013 addi x0,x0,0 + 80009394: 00000013 addi x0,x0,0 + 80009398: 00000013 addi x0,x0,0 + 8000939c: 00000013 addi x0,x0,0 + 800093a0: 00030097 auipc x1,0x30 + 800093a4: 204080e7 jalr x1,516(x1) # 800395a4 + 800093a8: 23c0006f jal x0,800095e4 + 800093ac: 00300593 addi x11,x0,3 + 800093b0: 02b51e63 bne x10,x11,800093ec + 800093b4: 00000013 addi x0,x0,0 + 800093b8: 00000013 addi x0,x0,0 + 800093bc: 00000013 addi x0,x0,0 + 800093c0: 00011517 auipc x10,0x11 + 800093c4: 10a50513 addi x10,x10,266 # 8001a4ca + 800093c8: 00000013 addi x0,x0,0 + 800093cc: 00000013 addi x0,x0,0 + 800093d0: 00000013 addi x0,x0,0 + 800093d4: 00000013 addi x0,x0,0 + 800093d8: 00000013 addi x0,x0,0 + 800093dc: 00000013 addi x0,x0,0 + 800093e0: 00030097 auipc x1,0x30 + 800093e4: 1c4080e7 jalr x1,452(x1) # 800395a4 + 800093e8: 1fc0006f jal x0,800095e4 + 800093ec: 00400593 addi x11,x0,4 + 800093f0: 02b51e63 bne x10,x11,8000942c + 800093f4: 00000013 addi x0,x0,0 + 800093f8: 00000013 addi x0,x0,0 + 800093fc: 00000013 addi x0,x0,0 + 80009400: 00011517 auipc x10,0x11 + 80009404: 1c550513 addi x10,x10,453 # 8001a5c5 + 80009408: 00000013 addi x0,x0,0 + 8000940c: 00000013 addi x0,x0,0 + 80009410: 00000013 addi x0,x0,0 + 80009414: 00000013 addi x0,x0,0 + 80009418: 00000013 addi x0,x0,0 + 8000941c: 00000013 addi x0,x0,0 + 80009420: 00030097 auipc x1,0x30 + 80009424: 184080e7 jalr x1,388(x1) # 800395a4 + 80009428: 1bc0006f jal x0,800095e4 + 8000942c: 00500593 addi x11,x0,5 + 80009430: 02b51e63 bne x10,x11,8000946c + 80009434: 00000013 addi x0,x0,0 + 80009438: 00000013 addi x0,x0,0 + 8000943c: 00000013 addi x0,x0,0 + 80009440: 00011517 auipc x10,0x11 + 80009444: 26c50513 addi x10,x10,620 # 8001a6ac + 80009448: 00000013 addi x0,x0,0 + 8000944c: 00000013 addi x0,x0,0 + 80009450: 00000013 addi x0,x0,0 + 80009454: 00000013 addi x0,x0,0 + 80009458: 00000013 addi x0,x0,0 + 8000945c: 00000013 addi x0,x0,0 + 80009460: 00030097 auipc x1,0x30 + 80009464: 144080e7 jalr x1,324(x1) # 800395a4 + 80009468: 17c0006f jal x0,800095e4 + 8000946c: 1780006f jal x0,800095e4 + +0000000080009470 : + 80009470: 00000013 addi x0,x0,0 + 80009474: 00000013 addi x0,x0,0 + 80009478: 00000013 addi x0,x0,0 + 8000947c: 00000013 addi x0,x0,0 + 80009480: 00011517 auipc x10,0x11 + 80009484: e3950513 addi x10,x10,-455 # 8001a2b9 + 80009488: 00000013 addi x0,x0,0 + 8000948c: 00000013 addi x0,x0,0 + 80009490: 00000013 addi x0,x0,0 + 80009494: 00000013 addi x0,x0,0 + 80009498: 00000013 addi x0,x0,0 + 8000949c: 00000013 addi x0,x0,0 + 800094a0: 00030097 auipc x1,0x30 + 800094a4: 104080e7 jalr x1,260(x1) # 800395a4 + 800094a8: 0000f617 auipc x12,0xf + 800094ac: 69063603 ld x12,1680(x12) # 80018b38 + 800094b0: 00000013 addi x0,x0,0 + 800094b4: 00000013 addi x0,x0,0 + 800094b8: 00000013 addi x0,x0,0 + 800094bc: 00000013 addi x0,x0,0 + 800094c0: 00010517 auipc x10,0x10 + 800094c4: de250513 addi x10,x10,-542 # 800192a2 + 800094c8: 00000013 addi x0,x0,0 + 800094cc: 00000013 addi x0,x0,0 + 800094d0: 00000013 addi x0,x0,0 + 800094d4: 00000013 addi x0,x0,0 + 800094d8: 00000013 addi x0,x0,0 + 800094dc: 00000013 addi x0,x0,0 + 800094e0: 00030097 auipc x1,0x30 + 800094e4: 0c4080e7 jalr x1,196(x1) # 800395a4 + 800094e8: 00065503 lhu x10,0(x12) + 800094ec: 01000593 addi x11,x0,16 + 800094f0: 00357413 andi x8,x10,3 + 800094f4: 00300493 addi x9,x0,3 + 800094f8: 00941a63 bne x8,x9,8000950c + 800094fc: 00265403 lhu x8,2(x12) + 80009500: 01041413 slli x8,x8,0x10 + 80009504: 00856533 or x10,x10,x8 + 80009508: 02000593 addi x11,x0,32 + 8000950c: 32c000ef jal x1,80009838 + 80009510: 00000013 addi x0,x0,0 + 80009514: 00000013 addi x0,x0,0 + 80009518: 00000013 addi x0,x0,0 + 8000951c: 00000013 addi x0,x0,0 + 80009520: 0000f517 auipc x10,0xf + 80009524: 63850513 addi x10,x10,1592 # 80018b58 + 80009528: 00000013 addi x0,x0,0 + 8000952c: 00000013 addi x0,x0,0 + 80009530: 00000013 addi x0,x0,0 + 80009534: 00000013 addi x0,x0,0 + 80009538: 00000013 addi x0,x0,0 + 8000953c: 00000013 addi x0,x0,0 + 80009540: 00030097 auipc x1,0x30 + 80009544: 064080e7 jalr x1,100(x1) # 800395a4 + 80009548: 00000097 auipc x1,0x0 + 8000954c: 0e8080e7 jalr x1,232(x1) # 80009630 + 80009550: 0940006f jal x0,800095e4 + +0000000080009554 : + 80009554: 02054463 blt x10,x0,8000957c + +0000000080009558 : + 80009558: 01800593 addi x11,x0,24 + 8000955c: 04b55863 bge x10,x11,800095ac + 80009560: 0000f597 auipc x11,0xf + 80009564: 62058593 addi x11,x11,1568 # 80018b80 + 80009568: 00251613 slli x12,x10,0x2 + 8000956c: 00351613 slli x12,x10,0x3 + 80009570: 00c585b3 add x11,x11,x12 + 80009574: 0005b503 ld x10,0(x11) + 80009578: 00008067 jalr x0,0(x1) + +000000008000957c : + 8000957c: 00100593 addi x11,x0,1 + 80009580: 03f59593 slli x11,x11,0x3f + 80009584: 00b54533 xor x10,x10,x11 + 80009588: 01000593 addi x11,x0,16 + 8000958c: 02b55063 bge x10,x11,800095ac + 80009590: 0000f597 auipc x11,0xf + 80009594: 6b058593 addi x11,x11,1712 # 80018c40 + 80009598: 00251613 slli x12,x10,0x2 + 8000959c: 00351613 slli x12,x10,0x3 + 800095a0: 00c585b3 add x11,x11,x12 + 800095a4: 0005b503 ld x10,0(x11) + 800095a8: 00008067 jalr x0,0(x1) + +00000000800095ac : + 800095ac: 00000013 addi x0,x0,0 + 800095b0: 00000013 addi x0,x0,0 + 800095b4: 00000013 addi x0,x0,0 + 800095b8: 00000013 addi x0,x0,0 + 800095bc: 00000013 addi x0,x0,0 + 800095c0: 00010517 auipc x10,0x10 + 800095c4: afe50513 addi x10,x10,-1282 # 800190be + 800095c8: 00000013 addi x0,x0,0 + 800095cc: 00000013 addi x0,x0,0 + 800095d0: 00000013 addi x0,x0,0 + 800095d4: 00000013 addi x0,x0,0 + 800095d8: 00000013 addi x0,x0,0 + 800095dc: 00000013 addi x0,x0,0 + 800095e0: 00008067 jalr x0,0(x1) + +00000000800095e4 : + 800095e4: 00000013 addi x0,x0,0 + 800095e8: 00000013 addi x0,x0,0 + 800095ec: 00000013 addi x0,x0,0 + 800095f0: 00000013 addi x0,x0,0 + 800095f4: 00000013 addi x0,x0,0 + 800095f8: 00000013 addi x0,x0,0 + 800095fc: 00000013 addi x0,x0,0 + 80009600: 00010517 auipc x10,0x10 + 80009604: 75a50513 addi x10,x10,1882 # 80019d5a + 80009608: 00000013 addi x0,x0,0 + 8000960c: 00000013 addi x0,x0,0 + 80009610: 00000013 addi x0,x0,0 + 80009614: 00000013 addi x0,x0,0 + 80009618: 00000013 addi x0,x0,0 + 8000961c: 00000013 addi x0,x0,0 + 80009620: 00030097 auipc x1,0x30 + 80009624: f84080e7 jalr x1,-124(x1) # 800395a4 + +0000000080009628 : + 80009628: 00030097 auipc x1,0x30 + 8000962c: fdc080e7 jalr x1,-36(x1) # 80039604 + +0000000080009630 : + 80009630: 0000f617 auipc x12,0xf + 80009634: 50060613 addi x12,x12,1280 # 80018b30 + 80009638: 00163023 sd x1,0(x12) + 8000963c: 00000013 addi x0,x0,0 + 80009640: 00010517 auipc x10,0x10 + 80009644: c8350513 addi x10,x10,-893 # 800192c3 + 80009648: 00000013 addi x0,x0,0 + 8000964c: 00000013 addi x0,x0,0 + 80009650: 00000013 addi x0,x0,0 + 80009654: 00000013 addi x0,x0,0 + 80009658: 00000013 addi x0,x0,0 + 8000965c: 00000013 addi x0,x0,0 + 80009660: 00030097 auipc x1,0x30 + 80009664: f44080e7 jalr x1,-188(x1) # 800395a4 + 80009668: 0000f517 auipc x10,0xf + 8000966c: 4d053503 ld x10,1232(x10) # 80018b38 + 80009670: 04000593 addi x11,x0,64 + 80009674: 1c4000ef jal x1,80009838 + 80009678: 00000013 addi x0,x0,0 + 8000967c: 00000013 addi x0,x0,0 + 80009680: 0000f517 auipc x10,0xf + 80009684: 4d850513 addi x10,x10,1240 # 80018b58 + 80009688: 00000013 addi x0,x0,0 + 8000968c: 00000013 addi x0,x0,0 + 80009690: 00000013 addi x0,x0,0 + 80009694: 00000013 addi x0,x0,0 + 80009698: 00000013 addi x0,x0,0 + 8000969c: 00000013 addi x0,x0,0 + 800096a0: 00030097 auipc x1,0x30 + 800096a4: f04080e7 jalr x1,-252(x1) # 800395a4 + 800096a8: 00000013 addi x0,x0,0 + 800096ac: 00000013 addi x0,x0,0 + 800096b0: 00000013 addi x0,x0,0 + 800096b4: 00000013 addi x0,x0,0 + 800096b8: 00000013 addi x0,x0,0 + 800096bc: 00000013 addi x0,x0,0 + 800096c0: 00010517 auipc x10,0x10 + 800096c4: c1350513 addi x10,x10,-1005 # 800192d3 + 800096c8: 00000013 addi x0,x0,0 + 800096cc: 00000013 addi x0,x0,0 + 800096d0: 00000013 addi x0,x0,0 + 800096d4: 00000013 addi x0,x0,0 + 800096d8: 00000013 addi x0,x0,0 + 800096dc: 00000013 addi x0,x0,0 + 800096e0: 00030097 auipc x1,0x30 + 800096e4: ec4080e7 jalr x1,-316(x1) # 800395a4 + 800096e8: 0000f517 auipc x10,0xf + 800096ec: 45853503 ld x10,1112(x10) # 80018b40 + 800096f0: 04000593 addi x11,x0,64 + 800096f4: 144000ef jal x1,80009838 + 800096f8: 00000013 addi x0,x0,0 + 800096fc: 00000013 addi x0,x0,0 + 80009700: 0000f517 auipc x10,0xf + 80009704: 45850513 addi x10,x10,1112 # 80018b58 + 80009708: 00000013 addi x0,x0,0 + 8000970c: 00000013 addi x0,x0,0 + 80009710: 00000013 addi x0,x0,0 + 80009714: 00000013 addi x0,x0,0 + 80009718: 00000013 addi x0,x0,0 + 8000971c: 00000013 addi x0,x0,0 + 80009720: 00030097 auipc x1,0x30 + 80009724: e84080e7 jalr x1,-380(x1) # 800395a4 + 80009728: 00000013 addi x0,x0,0 + 8000972c: 00000013 addi x0,x0,0 + 80009730: 00000013 addi x0,x0,0 + 80009734: 00000013 addi x0,x0,0 + 80009738: 00000013 addi x0,x0,0 + 8000973c: 00000013 addi x0,x0,0 + 80009740: 00010517 auipc x10,0x10 + 80009744: ba350513 addi x10,x10,-1117 # 800192e3 + 80009748: 00000013 addi x0,x0,0 + 8000974c: 00000013 addi x0,x0,0 + 80009750: 00000013 addi x0,x0,0 + 80009754: 00000013 addi x0,x0,0 + 80009758: 00000013 addi x0,x0,0 + 8000975c: 00000013 addi x0,x0,0 + 80009760: 00030097 auipc x1,0x30 + 80009764: e44080e7 jalr x1,-444(x1) # 800395a4 + 80009768: 0000f517 auipc x10,0xf + 8000976c: 3e053503 ld x10,992(x10) # 80018b48 + 80009770: 04000593 addi x11,x0,64 + 80009774: 0c4000ef jal x1,80009838 + 80009778: 00000013 addi x0,x0,0 + 8000977c: 00000013 addi x0,x0,0 + 80009780: 0000f517 auipc x10,0xf + 80009784: 3d850513 addi x10,x10,984 # 80018b58 + 80009788: 00000013 addi x0,x0,0 + 8000978c: 00000013 addi x0,x0,0 + 80009790: 00000013 addi x0,x0,0 + 80009794: 00000013 addi x0,x0,0 + 80009798: 00000013 addi x0,x0,0 + 8000979c: 00000013 addi x0,x0,0 + 800097a0: 00030097 auipc x1,0x30 + 800097a4: e04080e7 jalr x1,-508(x1) # 800395a4 + 800097a8: 00000013 addi x0,x0,0 + 800097ac: 00000013 addi x0,x0,0 + 800097b0: 00000013 addi x0,x0,0 + 800097b4: 00000013 addi x0,x0,0 + 800097b8: 00000013 addi x0,x0,0 + 800097bc: 00000013 addi x0,x0,0 + 800097c0: 00010517 auipc x10,0x10 + 800097c4: b3350513 addi x10,x10,-1229 # 800192f3 + 800097c8: 00000013 addi x0,x0,0 + 800097cc: 00000013 addi x0,x0,0 + 800097d0: 00000013 addi x0,x0,0 + 800097d4: 00000013 addi x0,x0,0 + 800097d8: 00000013 addi x0,x0,0 + 800097dc: 00000013 addi x0,x0,0 + 800097e0: 00030097 auipc x1,0x30 + 800097e4: dc4080e7 jalr x1,-572(x1) # 800395a4 + 800097e8: 0000f517 auipc x10,0xf + 800097ec: 36853503 ld x10,872(x10) # 80018b50 + 800097f0: 04000593 addi x11,x0,64 + 800097f4: 044000ef jal x1,80009838 + 800097f8: 00000013 addi x0,x0,0 + 800097fc: 00000013 addi x0,x0,0 + 80009800: 0000f517 auipc x10,0xf + 80009804: 35850513 addi x10,x10,856 # 80018b58 + 80009808: 00000013 addi x0,x0,0 + 8000980c: 00000013 addi x0,x0,0 + 80009810: 00000013 addi x0,x0,0 + 80009814: 00000013 addi x0,x0,0 + 80009818: 00000013 addi x0,x0,0 + 8000981c: 00000013 addi x0,x0,0 + 80009820: 00030097 auipc x1,0x30 + 80009824: d84080e7 jalr x1,-636(x1) # 800395a4 + 80009828: 0000f617 auipc x12,0xf + 8000982c: 30860613 addi x12,x12,776 # 80018b30 + 80009830: 00063083 ld x1,0(x12) + 80009834: 00008067 jalr x0,0(x1) + +0000000080009838 : + 80009838: 00000013 addi x0,x0,0 + 8000983c: 00000013 addi x0,x0,0 + 80009840: 0000f617 auipc x12,0xf + 80009844: 31860613 addi x12,x12,792 # 80018b58 + 80009848: 00000013 addi x0,x0,0 + 8000984c: 00000013 addi x0,x0,0 + 80009850: 00000013 addi x0,x0,0 + 80009854: 00000013 addi x0,x0,0 + 80009858: 00000013 addi x0,x0,0 + 8000985c: 00000013 addi x0,x0,0 + 80009860: 03000693 addi x13,x0,48 + 80009864: 00d60023 sb x13,0(x12) + 80009868: 07800693 addi x13,x0,120 + 8000986c: 00d600a3 sb x13,1(x12) + 80009870: 00260613 addi x12,x12,2 + 80009874: 00058693 addi x13,x11,0 + +0000000080009878 : + 80009878: ffc68693 addi x13,x13,-4 + 8000987c: 00d55733 srl x14,x10,x13 + 80009880: 00f77713 andi x14,x14,15 + 80009884: 00a00793 addi x15,x0,10 + 80009888: 00f74663 blt x14,x15,80009894 + 8000988c: 05770713 addi x14,x14,87 + 80009890: 0080006f jal x0,80009898 + +0000000080009894 : + 80009894: 03070713 addi x14,x14,48 + +0000000080009898 : + 80009898: 00e60023 sb x14,0(x12) + 8000989c: 00160613 addi x12,x12,1 + 800098a0: fc069ce3 bne x13,x0,80009878 + 800098a4: 00a00693 addi x13,x0,10 + 800098a8: 00d60023 sb x13,0(x12) + 800098ac: 000600a3 sb x0,1(x12) + 800098b0: 00008067 jalr x0,0(x1) + +00000000800098b4 : + 800098b4: 00a00693 addi x13,x0,10 + 800098b8: 02d54663 blt x10,x13,800098e4 + 800098bc: ff650513 addi x10,x10,-10 + 800098c0: 03100713 addi x14,x0,49 + 800098c4: 00d54c63 blt x10,x13,800098dc + 800098c8: ff650513 addi x10,x10,-10 + 800098cc: 03200713 addi x14,x0,50 + 800098d0: 00d54663 blt x10,x13,800098dc + 800098d4: ff650513 addi x10,x10,-10 + 800098d8: 03300713 addi x14,x0,51 + 800098dc: 00e60023 sb x14,0(x12) + 800098e0: 00160613 addi x12,x12,1 + 800098e4: 03050513 addi x10,x10,48 + 800098e8: 00a60023 sb x10,0(x12) + 800098ec: 00a00693 addi x13,x0,10 + 800098f0: 00d600a3 sb x13,1(x12) + 800098f4: 00060123 sb x0,2(x12) + 800098f8: 00008067 jalr x0,0(x1) + 800098fc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080039000 : + 80039000: 10010737 lui x14,0x10010 + 80039004: 00072023 sw x0,0(x14) # 10010000 + 80039008: fffce397 auipc x7,0xfffce + 8003900c: 7f038393 addi x7,x7,2032 # 800077f8 + 80039010: 00038067 jalr x0,0(x7) + +0000000080039014 : + 80039014: fff00713 addi x14,x0,-1 + 80039018: 100143b7 lui x7,0x10014 + 8003901c: 00e3b023 sd x14,0(x7) # 10014000 + 80039020: fffce397 auipc x7,0xfffce + 80039024: 7d838393 addi x7,x7,2008 # 800077f8 + 80039028: 00038067 jalr x0,0(x7) + +000000008003902c : + 8003902c: 10000737 lui x14,0x10000 + 80039030: 0107071b addiw x14,x14,16 # 10000010 + 80039034: 00070023 sb x0,0(x14) + 80039038: fffce397 auipc x7,0xfffce + 8003903c: 7c038393 addi x7,x7,1984 # 800077f8 + 80039040: 00038067 jalr x0,0(x7) + +0000000080039044 : + 80039044: 00200393 addi x7,x0,2 + 80039048: 3443b073 csrrc x0,mip,x7 + 8003904c: fffce397 auipc x7,0xfffce + 80039050: 7ac38393 addi x7,x7,1964 # 800077f8 + 80039054: 00038067 jalr x0,0(x7) + +0000000080039058 : + 80039058: fffce397 auipc x7,0xfffce + 8003905c: 7a038393 addi x7,x7,1952 # 800077f8 + 80039060: 00038067 jalr x0,0(x7) + +0000000080039064 : + 80039064: 20000413 addi x8,x0,512 + 80039068: 34443073 csrrc x0,mip,x8 + 8003906c: 34402473 csrrs x8,mip,x0 + 80039070: 00001337 lui x6,0x1 + 80039074: 8003031b addiw x6,x6,-2048 # 800 + 80039078: 00647433 and x8,x8,x6 + 8003907c: 00830863 beq x6,x8,8003908c + 80039080: 10000737 lui x14,0x10000 + 80039084: 0187071b addiw x14,x14,24 # 10000018 + 80039088: 00070023 sb x0,0(x14) + 8003908c: fffce397 auipc x7,0xfffce + 80039090: 76c38393 addi x7,x7,1900 # 800077f8 + 80039094: 00038067 jalr x0,0(x7) + +0000000080039098 : + 80039098: fffce317 auipc x6,0xfffce + 8003909c: 89030313 addi x6,x6,-1904 # 80006928 + 800390a0: 00030067 jalr x0,0(x6) + 800390a4: fffce397 auipc x7,0xfffce + 800390a8: 75438393 addi x7,x7,1876 # 800077f8 + 800390ac: 00038067 jalr x0,0(x7) + +00000000800390b0 : + 800390b0: fffce317 auipc x6,0xfffce + 800390b4: 87830313 addi x6,x6,-1928 # 80006928 + 800390b8: 00030067 jalr x0,0(x6) + 800390bc: fffce397 auipc x7,0xfffce + 800390c0: 73c38393 addi x7,x7,1852 # 800077f8 + 800390c4: 00038067 jalr x0,0(x7) + +00000000800390c8 : + 800390c8: fffce317 auipc x6,0xfffce + 800390cc: 86030313 addi x6,x6,-1952 # 80006928 + 800390d0: 00030067 jalr x0,0(x6) + 800390d4: fffce397 auipc x7,0xfffce + 800390d8: 72438393 addi x7,x7,1828 # 800077f8 + 800390dc: 00038067 jalr x0,0(x7) + +00000000800390e0 : + 800390e0: 30401073 csrrw x0,mie,x0 + 800390e4: 34401073 csrrw x0,mip,x0 + 800390e8: 34101073 csrrw x0,mepc,x0 + 800390ec: 34301073 csrrw x0,mtval,x0 + 800390f0: 34201073 csrrw x0,mcause,x0 + 800390f4: 00000013 addi x0,x0,0 + 800390f8: 00000013 addi x0,x0,0 + 800390fc: 00000013 addi x0,x0,0 + 80039100: fffd3317 auipc x6,0xfffd3 + 80039104: 01030313 addi x6,x6,16 # 8000c110 + 80039108: 00000013 addi x0,x0,0 + 8003910c: 00000013 addi x0,x0,0 + 80039110: 00000013 addi x0,x0,0 + 80039114: 00000013 addi x0,x0,0 + 80039118: 00000013 addi x0,x0,0 + 8003911c: 00000013 addi x0,x0,0 + +0000000080039120 : + 80039120: 34031473 csrrw x8,mscratch,x6 + 80039124: 2c833823 sd x8,720(x6) + +0000000080039128 : + 80039128: fff00393 addi x7,x0,-1 + 8003912c: 000044b7 lui x9,0x4 + 80039130: 00548493 addi x9,x9,5 # 4005 + 80039134: 00e49493 slli x9,x9,0xe + 80039138: 0074b023 sd x7,0(x9) + 8003913c: 00000013 addi x0,x0,0 + +0000000080039140 : + 80039140: 00000393 addi x7,x0,0 + 80039144: 2a733c23 sd x7,696(x6) + +0000000080039148 : + 80039148: 30502473 csrrs x8,mtvec,x0 + 8003914c: 2c833423 sd x8,712(x6) + 80039150: 00347393 andi x7,x8,3 + 80039154: ffc3f393 andi x7,x7,-4 + 80039158: 2b033483 ld x9,688(x6) + 8003915c: da848493 addi x9,x9,-600 + 80039160: 0074e3b3 or x7,x9,x7 + 80039164: 2c733023 sd x7,704(x6) + 80039168: 30539073 csrrw x0,mtvec,x7 + 8003916c: 30502773 csrrs x14,mtvec,x0 + 80039170: 0e770a63 beq x14,x7,80039264 + 80039174: 30541073 csrrw x0,mtvec,x8 + 80039178: 0a040663 beq x8,x0,80039224 + 8003917c: 2c833023 sd x8,704(x6) + +0000000080039180 : + 80039180: ffc47393 andi x7,x8,-4 + 80039184: 25838413 addi x8,x7,600 + 80039188: 00030113 addi x2,x6,0 + 8003918c: 00000013 addi x0,x0,0 + 80039190: 00000013 addi x0,x0,0 + 80039194: 00000013 addi x0,x0,0 + 80039198: 00000013 addi x0,x0,0 + 8003919c: 00000013 addi x0,x0,0 + 800391a0: 00000717 auipc x14,0x0 + 800391a4: 04c70713 addi x14,x14,76 # 800391ec + 800391a8: 00000013 addi x0,x0,0 + 800391ac: 00000013 addi x0,x0,0 + 800391b0: 00000013 addi x0,x0,0 + 800391b4: 00000013 addi x0,x0,0 + 800391b8: 00000013 addi x0,x0,0 + 800391bc: 00000013 addi x0,x0,0 + 800391c0: 00000797 auipc x15,0x0 + 800391c4: 0a478793 addi x15,x15,164 # 80039264 + 800391c8: 00000013 addi x0,x0,0 + 800391cc: 00000013 addi x0,x0,0 + 800391d0: 00000013 addi x0,x0,0 + 800391d4: 00000013 addi x0,x0,0 + 800391d8: 00000013 addi x0,x0,0 + 800391dc: 00000013 addi x0,x0,0 + 800391e0: 00f3f663 bgeu x7,x15,800391ec + 800391e4: 00877463 bgeu x14,x8,800391ec + 800391e8: 03c0006f jal x0,80039224 + +00000000800391ec : + 800391ec: 0003a783 lw x15,0(x7) + 800391f0: 00f32023 sw x15,0(x6) + 800391f4: 0004a703 lw x14,0(x9) + 800391f8: 00e3a023 sw x14,0(x7) + 800391fc: 0003a783 lw x15,0(x7) + 80039200: 00e79a63 bne x15,x14,80039214 + 80039204: 00438393 addi x7,x7,4 + 80039208: 00430313 addi x6,x6,4 + 8003920c: 00448493 addi x9,x9,4 + 80039210: fc741ee3 bne x8,x7,800391ec + +0000000080039214 : + 80039214: 0000100f fence.i + 80039218: 34002373 csrrs x6,mscratch,x0 + 8003921c: 2a933823 sd x9,688(x6) + 80039220: 04740263 beq x8,x7,80039264 + +0000000080039224 : + 80039224: 00038413 addi x8,x7,0 + 80039228: 00000013 addi x0,x0,0 + 8003922c: 00000013 addi x0,x0,0 + 80039230: 00000013 addi x0,x0,0 + 80039234: 00000013 addi x0,x0,0 + 80039238: 00000013 addi x0,x0,0 + 8003923c: 00000013 addi x0,x0,0 + 80039240: fffcd797 auipc x15,0xfffcd + 80039244: 6f878793 addi x15,x15,1784 # 80006938 + 80039248: 00000013 addi x0,x0,0 + 8003924c: 00000013 addi x0,x0,0 + 80039250: 00000013 addi x0,x0,0 + 80039254: 00000013 addi x0,x0,0 + 80039258: 00000013 addi x0,x0,0 + 8003925c: 00000013 addi x0,x0,0 + 80039260: 00078067 jalr x0,0(x15) + +0000000080039264 : + 80039264: 00000013 addi x0,x0,0 + +0000000080039268 : + 80039268: 005002b7 lui x5,0x500 + 8003926c: 0012829b addiw x5,x5,1 # 500001 + 80039270: 00d29293 slli x5,x5,0xd + 80039274: 80028293 addi x5,x5,-2048 + 80039278: 30029073 csrrw x0,mstatus,x5 + 8003927c: 32001073 csrrw x0,mcountinhibit,x0 + 80039280: 32301073 csrrw x0,mhpmevent3,x0 + 80039284: 32401073 csrrw x0,mhpmevent4,x0 + 80039288: 32501073 csrrw x0,mhpmevent5,x0 + 8003928c: 32601073 csrrw x0,mhpmevent6,x0 + 80039290: 32701073 csrrw x0,mhpmevent7,x0 + 80039294: 32801073 csrrw x0,mhpmevent8,x0 + 80039298: 32901073 csrrw x0,mhpmevent9,x0 + 8003929c: 32a01073 csrrw x0,mhpmevent10,x0 + 800392a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800392a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800392a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800392ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800392b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800392b4: 33001073 csrrw x0,mhpmevent16,x0 + 800392b8: 33101073 csrrw x0,mhpmevent17,x0 + 800392bc: 33201073 csrrw x0,mhpmevent18,x0 + 800392c0: 33301073 csrrw x0,mhpmevent19,x0 + 800392c4: 33401073 csrrw x0,mhpmevent20,x0 + 800392c8: 33501073 csrrw x0,mhpmevent21,x0 + 800392cc: 33601073 csrrw x0,mhpmevent22,x0 + 800392d0: 33701073 csrrw x0,mhpmevent23,x0 + 800392d4: 33801073 csrrw x0,mhpmevent24,x0 + 800392d8: 33901073 csrrw x0,mhpmevent25,x0 + 800392dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800392e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800392e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800392e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800392ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800392f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800392f4: 00000013 addi x0,x0,0 + 800392f8: 00000013 addi x0,x0,0 + 800392fc: 00000013 addi x0,x0,0 + 80039300: fffd3317 auipc x6,0xfffd3 + 80039304: e0830313 addi x6,x6,-504 # 8000c108 + 80039308: 00000013 addi x0,x0,0 + 8003930c: 00000013 addi x0,x0,0 + 80039310: 00000013 addi x0,x0,0 + 80039314: 00000013 addi x0,x0,0 + 80039318: 00000013 addi x0,x0,0 + 8003931c: 00000013 addi x0,x0,0 + 80039320: 00033023 sd x0,0(x6) + +0000000080039324 : + 80039324: feedc0b7 lui x1,0xfeedc + 80039328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8003932c: 00b09093 slli x1,x1,0xb + 80039330: 7f708093 addi x1,x1,2039 + 80039334: 00b09093 slli x1,x1,0xb + 80039338: 36f08093 addi x1,x1,879 + 8003933c: 00a09093 slli x1,x1,0xa + 80039340: 2ad08093 addi x1,x1,685 + 80039344: 03909793 slli x15,x1,0x39 + 80039348: 0070d113 srli x2,x1,0x7 + 8003934c: 00f16133 or x2,x2,x15 + 80039350: 03911793 slli x15,x2,0x39 + 80039354: 00715193 srli x3,x2,0x7 + 80039358: 00f1e1b3 or x3,x3,x15 + 8003935c: 03919793 slli x15,x3,0x39 + 80039360: 0071d213 srli x4,x3,0x7 + 80039364: 00f26233 or x4,x4,x15 + 80039368: 03921793 slli x15,x4,0x39 + 8003936c: 00725293 srli x5,x4,0x7 + 80039370: 00f2e2b3 or x5,x5,x15 + 80039374: 03929793 slli x15,x5,0x39 + 80039378: 0072d313 srli x6,x5,0x7 + 8003937c: 00f36333 or x6,x6,x15 + 80039380: 03931793 slli x15,x6,0x39 + 80039384: 00735393 srli x7,x6,0x7 + 80039388: 00f3e3b3 or x7,x7,x15 + 8003938c: 03939793 slli x15,x7,0x39 + 80039390: 0073d413 srli x8,x7,0x7 + 80039394: 00f46433 or x8,x8,x15 + 80039398: 03941793 slli x15,x8,0x39 + 8003939c: 00745493 srli x9,x8,0x7 + 800393a0: 00f4e4b3 or x9,x9,x15 + 800393a4: 03949793 slli x15,x9,0x39 + 800393a8: 0074d513 srli x10,x9,0x7 + 800393ac: 00f56533 or x10,x10,x15 + 800393b0: 03951793 slli x15,x10,0x39 + 800393b4: 00755593 srli x11,x10,0x7 + 800393b8: 00f5e5b3 or x11,x11,x15 + 800393bc: 03959793 slli x15,x11,0x39 + 800393c0: 0075d613 srli x12,x11,0x7 + 800393c4: 00f66633 or x12,x12,x15 + 800393c8: 03961793 slli x15,x12,0x39 + 800393cc: 00765693 srli x13,x12,0x7 + 800393d0: 00f6e6b3 or x13,x13,x15 + 800393d4: 03969793 slli x15,x13,0x39 + 800393d8: 0076d713 srli x14,x13,0x7 + 800393dc: 00f76733 or x14,x14,x15 + 800393e0: fab807b7 lui x15,0xfab80 + 800393e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800393e8: 00b79793 slli x15,x15,0xb + 800393ec: 7d578793 addi x15,x15,2005 + 800393f0: 00b79793 slli x15,x15,0xb + 800393f4: 5fe78793 addi x15,x15,1534 + 800393f8: 00a79793 slli x15,x15,0xa + 800393fc: 3b678793 addi x15,x15,950 + 80039400: 7d5c0837 lui x16,0x7d5c0 + 80039404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80039408: 00b81813 slli x16,x16,0xb + 8003940c: 3ea80813 addi x16,x16,1002 + 80039410: 00b81813 slli x16,x16,0xb + 80039414: 6ff80813 addi x16,x16,1791 + 80039418: 00a81813 slli x16,x16,0xa + 8003941c: 1db80813 addi x16,x16,475 + 80039420: 03981793 slli x15,x16,0x39 + 80039424: 00785893 srli x17,x16,0x7 + 80039428: 00f8e8b3 or x17,x17,x15 + 8003942c: 03989793 slli x15,x17,0x39 + 80039430: 0078d913 srli x18,x17,0x7 + 80039434: 00f96933 or x18,x18,x15 + 80039438: 03991793 slli x15,x18,0x39 + 8003943c: 00795993 srli x19,x18,0x7 + 80039440: 00f9e9b3 or x19,x19,x15 + 80039444: 03999793 slli x15,x19,0x39 + 80039448: 0079da13 srli x20,x19,0x7 + 8003944c: 00fa6a33 or x20,x20,x15 + 80039450: 039a1793 slli x15,x20,0x39 + 80039454: 007a5a93 srli x21,x20,0x7 + 80039458: 00faeab3 or x21,x21,x15 + 8003945c: 039a9793 slli x15,x21,0x39 + 80039460: 007adb13 srli x22,x21,0x7 + 80039464: 00fb6b33 or x22,x22,x15 + 80039468: 039b1793 slli x15,x22,0x39 + 8003946c: 007b5b93 srli x23,x22,0x7 + 80039470: 00fbebb3 or x23,x23,x15 + 80039474: 039b9793 slli x15,x23,0x39 + 80039478: 007bdc13 srli x24,x23,0x7 + 8003947c: 00fc6c33 or x24,x24,x15 + 80039480: 039c1793 slli x15,x24,0x39 + 80039484: 007c5c93 srli x25,x24,0x7 + 80039488: 00fcecb3 or x25,x25,x15 + 8003948c: 039c9793 slli x15,x25,0x39 + 80039490: 007cdd13 srli x26,x25,0x7 + 80039494: 00fd6d33 or x26,x26,x15 + 80039498: 039d1793 slli x15,x26,0x39 + 8003949c: 007d5d93 srli x27,x26,0x7 + 800394a0: 00fdedb3 or x27,x27,x15 + 800394a4: 039d9793 slli x15,x27,0x39 + 800394a8: 007dde13 srli x28,x27,0x7 + 800394ac: 00fe6e33 or x28,x28,x15 + 800394b0: 039e1793 slli x15,x28,0x39 + 800394b4: 007e5e93 srli x29,x28,0x7 + 800394b8: 00feeeb3 or x29,x29,x15 + 800394bc: 039e9793 slli x15,x29,0x39 + 800394c0: 007edf13 srli x30,x29,0x7 + 800394c4: 00ff6f33 or x30,x30,x15 + 800394c8: 039f1793 slli x15,x30,0x39 + 800394cc: 007f5f93 srli x31,x30,0x7 + 800394d0: 00ffefb3 or x31,x31,x15 + 800394d4: 00000013 addi x0,x0,0 + 800394d8: 00000013 addi x0,x0,0 + 800394dc: 00000013 addi x0,x0,0 + 800394e0: fffe1117 auipc x2,0xfffe1 + 800394e4: 30010113 addi x2,x2,768 # 8001a7e0 + 800394e8: 00000013 addi x0,x0,0 + 800394ec: 00000013 addi x0,x0,0 + 800394f0: 00000013 addi x0,x0,0 + 800394f4: 00000013 addi x0,x0,0 + 800394f8: 00000013 addi x0,x0,0 + 800394fc: 00000013 addi x0,x0,0 + +0000000080039500 : + 80039500: 6f5ca337 lui x6,0x6f5ca + 80039504: 30930313 addi x6,x6,777 # 6f5ca309 + 80039508: 00b31313 slli x6,x6,0xb + 8003950c: 73e30313 addi x6,x6,1854 + 80039510: 00b31313 slli x6,x6,0xb + 80039514: 52c30313 addi x6,x6,1324 + 80039518: 00a31313 slli x6,x6,0xa + 8003951c: 28130313 addi x6,x6,641 + 80039520: fffce197 auipc x3,0xfffce + 80039524: 7e018193 addi x3,x3,2016 # 80007d00 + 80039528: 00000013 addi x0,x0,0 + 8003952c: 00000013 addi x0,x0,0 + 80039530: 00000013 addi x0,x0,0 + 80039534: 00000013 addi x0,x0,0 + 80039538: 00000013 addi x0,x0,0 + 8003953c: 00000013 addi x0,x0,0 + 80039540: 00013203 ld x4,0(x2) + 80039544: 00620c63 beq x4,x6,8003955c + 80039548: 000182e7 jalr x5,0(x3) + 8003954c: 80039500 .word 0x80039500 + 80039550: 00000000 .word 0x00000000 + 80039554: 80019d83 .word 0x80019d83 + 80039558: 00000000 .word 0x00000000 + 8003955c: 00810113 addi x2,x2,8 + 80039560: fffd3197 auipc x3,0xfffd3 + 80039564: f1018193 addi x3,x3,-240 # 8000c470 + 80039568: 00000013 addi x0,x0,0 + 8003956c: 00000013 addi x0,x0,0 + 80039570: 00000013 addi x0,x0,0 + 80039574: 00000013 addi x0,x0,0 + 80039578: 00000013 addi x0,x0,0 + 8003957c: 00000013 addi x0,x0,0 + 80039580: fffc7317 auipc x6,0xfffc7 + 80039584: ac030313 addi x6,x6,-1344 # 80000040 + 80039588: 00000013 addi x0,x0,0 + 8003958c: 00000013 addi x0,x0,0 + 80039590: 00000013 addi x0,x0,0 + 80039594: 00000013 addi x0,x0,0 + 80039598: 00000013 addi x0,x0,0 + 8003959c: 00000013 addi x0,x0,0 + 800395a0: 00030067 jalr x0,0(x6) + +00000000800395a4 : + 800395a4: 00054303 lbu x6,0(x10) + 800395a8: 00030a63 beq x6,x0,800395bc + 800395ac: 100003b7 lui x7,0x10000 + 800395b0: 00638023 sb x6,0(x7) # 10000000 + 800395b4: 00150513 addi x10,x10,1 + 800395b8: fedff06f jal x0,800395a4 + 800395bc: 00008067 jalr x0,0(x1) + +00000000800395c0 : + 800395c0: ff010113 addi x2,x2,-16 + 800395c4: 00113023 sd x1,0(x2) + 800395c8: 00813423 sd x8,8(x2) + 800395cc: 00000097 auipc x1,0x0 + 800395d0: fd8080e7 jalr x1,-40(x1) # 800395a4 + 800395d4: 00813403 ld x8,8(x2) + 800395d8: 00013083 ld x1,0(x2) + 800395dc: 01010113 addi x2,x2,16 + 800395e0: 00008067 jalr x0,0(x1) + +00000000800395e4 : + 800395e4: 00100093 addi x1,x0,1 + 800395e8: 00000297 auipc x5,0x0 + 800395ec: 81828293 addi x5,x5,-2024 # 80038e00 + +00000000800395f0 : + 800395f0: 0012a023 sw x1,0(x5) + 800395f4: 0002a223 sw x0,4(x5) + +00000000800395f8 : + 800395f8: 00000013 addi x0,x0,0 + 800395fc: ffdff06f jal x0,800395f8 + 80039600: 0000006f jal x0,80039600 + +0000000080039604 : + 80039604: 00300093 addi x1,x0,3 + 80039608: fffff297 auipc x5,0xfffff + 8003960c: 7f828293 addi x5,x5,2040 # 80038e00 + +0000000080039610 : + 80039610: 0012a023 sw x1,0(x5) + 80039614: 0002a223 sw x0,4(x5) + +0000000080039618 : + 80039618: 00000013 addi x0,x0,0 + 8003961c: ffdff06f jal x0,80039618 + 80039620: 0000006f jal x0,80039620 + +0000000080039624 : + 80039624: 00100513 addi x10,x0,1 + 80039628: 100105b7 lui x11,0x10010 + 8003962c: 00a5a023 sw x10,0(x11) # 10010000 + 80039630: 00008067 jalr x0,0(x1) + +0000000080039634 : + 80039634: 100105b7 lui x11,0x10010 + 80039638: 0005a023 sw x0,0(x11) # 10010000 + 8003963c: 00008067 jalr x0,0(x1) + +0000000080039640 : + 80039640: 00100513 addi x10,x0,1 + 80039644: 100005b7 lui x11,0x10000 + 80039648: 0105859b addiw x11,x11,16 # 10000010 + 8003964c: 00a58023 sb x10,0(x11) + 80039650: 00008067 jalr x0,0(x1) + +0000000080039654 : + 80039654: 100005b7 lui x11,0x10000 + 80039658: 0105859b addiw x11,x11,16 # 10000010 + 8003965c: 00058023 sb x0,0(x11) + 80039660: 00008067 jalr x0,0(x1) + 80039664: 00000013 addi x0,x0,0 + 80039668: 00000013 addi x0,x0,0 + 8003966c: 00000013 addi x0,x0,0 + 80039670: 00000013 addi x0,x0,0 + 80039674: 00000013 addi x0,x0,0 + 80039678: 00000013 addi x0,x0,0 + 8003967c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha256sig0-00.elf.objdump b/riscv-tests/rv64-Zknh-sha256sig0-00.elf.objdump new file mode 100644 index 0000000..2d652e7 --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha256sig0-00.elf.objdump @@ -0,0 +1,6679 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sig0-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sig0-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 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.data 0000000000000000 Mtramptbl_sv +000000008000c019 g .data 0000000000000000 rvtest_data_end +00000000800013ec g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029a00 g .tohost 0000000000000000 fromhost +0000000080029900 g .tohost 0000000000000000 tohost +00000000800016b0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x87775b64a3e54192 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha256sig0_cg_cp_rs1_b0: + sha256sig0 x20, x0 # perform operation + 80000048: 10201a13 sha256sig0 x20,x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zknh_sha256sig0_cg_cp_rs1_b0, Zknh_sha256sig0_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01420c63 beq x4,x20,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xcf68fa770a57fec9 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha256sig0_cg_cp_rs1_b1: + sha256sig0 x16, x1 # perform operation + 80000074: 10209813 sha256sig0 x16,x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknh_sha256sig0_cg_cp_rs1_b1, Zknh_sha256sig0_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01020c63 beq x4,x16,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x12, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010613 addi x12,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xefa51f01b03104a8 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha256sig0_cg_cp_rs1_b2: + sha256sig0 x11, x2 # perform operation + 800000a4: 10211593 sha256sig0 x11,x2 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zknh_sha256sig0_cg_cp_rs1_b2, Zknh_sha256sig0_cg_cp_rs1_b2_str) + 800000a8: 00063203 ld x4,0(x12) + 800000ac: 00b20c63 beq x4,x11,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00860613 addi x12,x12,8 + + mv x9, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018493 addi x9,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x9, x3) # load rs1: x3 = 0x0c5477a3bb9b5fcf + 800000cc: 0004b183 ld x3,0(x9) + 800000d0: 00848493 addi x9,x9,8 + +00000000800000d4 : +Zknh_sha256sig0_cg_cp_rs1_b3: + sha256sig0 x6, x3 # perform operation + 800000d4: 10219313 sha256sig0 x6,x3 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknh_sha256sig0_cg_cp_rs1_b3, Zknh_sha256sig0_cg_cp_rs1_b3_str) + 800000d8: 00063203 ld x4,0(x12) + 800000dc: 00620c63 beq x4,x6,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00860613 addi x12,x12,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x9, x4) # load rs1: x4 = 0x58c4603a794bb1fa + 80000100: 0004b203 ld x4,0(x9) + 80000104: 00848493 addi x9,x9,8 + +0000000080000108 : +Zknh_sha256sig0_cg_cp_rs1_b4: + sha256sig0 x18, x4 # perform operation + 80000108: 10221913 sha256sig0 x18,x4 + # Check if x18 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x18, Zknh_sha256sig0_cg_cp_rs1_b4, Zknh_sha256sig0_cg_cp_rs1_b4_str) + 8000010c: 00063383 ld x7,0(x12) + 80000110: 01238c63 beq x7,x18,80000128 + 80000114: 6c40246f jal x8,800027d8 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x9, x5) # load rs1: x5 = 0x96e3d8859e7bf035 + 8000012c: 0004b283 ld x5,0(x9) + 80000130: 00848493 addi x9,x9,8 + +0000000080000134 : +Zknh_sha256sig0_cg_cp_rs1_b5: + sha256sig0 x13, x5 # perform operation + 80000134: 10229693 sha256sig0 x13,x5 + # Check if x13 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x13, Zknh_sha256sig0_cg_cp_rs1_b5, Zknh_sha256sig0_cg_cp_rs1_b5_str) + 80000138: 00063383 ld x7,0(x12) + 8000013c: 00d38c63 beq x7,x13,80000154 + 80000140: 6980246f jal x8,800027d8 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x298f09f6f150c3ca + 80000158: 0004b303 ld x6,0(x9) + 8000015c: 00848493 addi x9,x9,8 + +0000000080000160 : +Zknh_sha256sig0_cg_cp_rs1_b6: + sha256sig0 x16, x6 # perform operation + 80000160: 10231813 sha256sig0 x16,x6 + # Check if x16 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x16, Zknh_sha256sig0_cg_cp_rs1_b6, Zknh_sha256sig0_cg_cp_rs1_b6_str) + 80000164: 00063383 ld x7,0(x12) + 80000168: 01038c63 beq x7,x16,80000180 + 8000016c: 66c0246f jal x8,800027d8 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000184: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040713 addi x14,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xebd7e3e11f73b1bb + 8000018c: 0004b383 ld x7,0(x9) + 80000190: 00848493 addi x9,x9,8 + +0000000080000194 : +Zknh_sha256sig0_cg_cp_rs1_b7: + sha256sig0 x15, x7 # perform operation + 80000194: 10239793 sha256sig0 x15,x7 + # Check if x15 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x15, Zknh_sha256sig0_cg_cp_rs1_b7, Zknh_sha256sig0_cg_cp_rs1_b7_str) + 80000198: 00063683 ld x13,0(x12) + 8000019c: 00f68c63 beq x13,x15,800001b4 + 800001a0: 6600276f jal x14,80002800 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 80008971 .word 0x80008971 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x08d786546f57ad5d + 800001b8: 0004b403 ld x8,0(x9) + 800001bc: 00848493 addi x9,x9,8 + +00000000800001c0 : +Zknh_sha256sig0_cg_cp_rs1_b8: + sha256sig0 x30, x8 # perform operation + 800001c0: 10241f13 sha256sig0 x30,x8 + # Check if x30 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x30, Zknh_sha256sig0_cg_cp_rs1_b8, Zknh_sha256sig0_cg_cp_rs1_b8_str) + 800001c4: 00063683 ld x13,0(x12) + 800001c8: 01e68c63 beq x13,x30,800001e0 + 800001cc: 6340276f jal x14,80002800 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 800089a8 .word 0x800089a8 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 00860613 addi x12,x12,8 + + mv x10, x9 # switch data pointer register to avoid conflict with test + 800001e4: 00048513 addi x10,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x67c72c127f562c4a + 800001e8: 00053483 ld x9,0(x10) + 800001ec: 00850513 addi x10,x10,8 + +00000000800001f0 : +Zknh_sha256sig0_cg_cp_rs1_b9: + sha256sig0 x31, x9 # perform operation + 800001f0: 10249f93 sha256sig0 x31,x9 + # Check if x31 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x31, Zknh_sha256sig0_cg_cp_rs1_b9, Zknh_sha256sig0_cg_cp_rs1_b9_str) + 800001f4: 00063683 ld x13,0(x12) + 800001f8: 01f68c63 beq x13,x31,80000210 + 800001fc: 6040276f jal x14,80002800 + 80000200: 800001f0 .word 0x800001f0 + 80000204: 00000000 .word 0x00000000 + 80000208: 800089df .word 0x800089df + 8000020c: 00000000 .word 0x00000000 + 80000210: 00860613 addi x12,x12,8 + + mv x25, x10 # switch data pointer register to avoid conflict with test + 80000214: 00050c93 addi x25,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x25, x10) # load rs1: x10 = 0x3537a09ffae7acf1 + 80000218: 000cb503 ld x10,0(x25) + 8000021c: 008c8c93 addi x25,x25,8 + +0000000080000220 : +Zknh_sha256sig0_cg_cp_rs1_b10: + sha256sig0 x20, x10 # perform operation + 80000220: 10251a13 sha256sig0 x20,x10 + # Check if x20 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x20, Zknh_sha256sig0_cg_cp_rs1_b10, Zknh_sha256sig0_cg_cp_rs1_b10_str) + 80000224: 00063683 ld x13,0(x12) + 80000228: 01468c63 beq x13,x20,80000240 + 8000022c: 5d40276f jal x14,80002800 + 80000230: 80000220 .word 0x80000220 + 80000234: 00000000 .word 0x00000000 + 80000238: 80008a17 .word 0x80008a17 + 8000023c: 00000000 .word 0x00000000 + 80000240: 00860613 addi x12,x12,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x25, x11) # load rs1: x11 = 0x4244b2ef8e830f3c + 80000244: 000cb583 ld x11,0(x25) + 80000248: 008c8c93 addi x25,x25,8 + +000000008000024c : +Zknh_sha256sig0_cg_cp_rs1_b11: + sha256sig0 x22, x11 # perform operation + 8000024c: 10259b13 sha256sig0 x22,x11 + # Check if x22 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x22, Zknh_sha256sig0_cg_cp_rs1_b11, Zknh_sha256sig0_cg_cp_rs1_b11_str) + 80000250: 00063683 ld x13,0(x12) + 80000254: 01668c63 beq x13,x22,8000026c + 80000258: 5a80276f jal x14,80002800 + 8000025c: 8000024c .word 0x8000024c + 80000260: 00000000 .word 0x00000000 + 80000264: 80008a50 .word 0x80008a50 + 80000268: 00000000 .word 0x00000000 + 8000026c: 00860613 addi x12,x12,8 + + mv x3, x12 # switch signature pointer register to avoid conflict with test + 80000270: 00060193 addi x3,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x3748647cc3da750f + 80000274: 000cb603 ld x12,0(x25) + 80000278: 008c8c93 addi x25,x25,8 + +000000008000027c : +Zknh_sha256sig0_cg_cp_rs1_b12: + sha256sig0 x16, x12 # perform operation + 8000027c: 10261813 sha256sig0 x16,x12 + # Check if x16 contains the expected result. x3 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x3, x14, x13, x16, Zknh_sha256sig0_cg_cp_rs1_b12, Zknh_sha256sig0_cg_cp_rs1_b12_str) + 80000280: 0001b683 ld x13,0(x3) + 80000284: 01068c63 beq x13,x16,8000029c + 80000288: 5780276f jal x14,80002800 + 8000028c: 8000027c .word 0x8000027c + 80000290: 00000000 .word 0x00000000 + 80000294: 80008a89 .word 0x80008a89 + 80000298: 00000000 .word 0x00000000 + 8000029c: 00818193 addi x3,x3,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800002a0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800002a4: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x64c4ac589fde55ec + 800002a8: 000cb683 ld x13,0(x25) + 800002ac: 008c8c93 addi x25,x25,8 + +00000000800002b0 : +Zknh_sha256sig0_cg_cp_rs1_b13: + sha256sig0 x9, x13 # perform operation + 800002b0: 10269493 sha256sig0 x9,x13 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zknh_sha256sig0_cg_cp_rs1_b13, Zknh_sha256sig0_cg_cp_rs1_b13_str) + 800002b4: 0001b383 ld x7,0(x3) + 800002b8: 00938c63 beq x7,x9,800002d0 + 800002bc: 51c0246f jal x8,800027d8 + 800002c0: 800002b0 .word 0x800002b0 + 800002c4: 00000000 .word 0x00000000 + 800002c8: 80008ac2 .word 0x80008ac2 + 800002cc: 00000000 .word 0x00000000 + 800002d0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xc9ee05e2ef69fc31 + 800002d4: 000cb703 ld x14,0(x25) + 800002d8: 008c8c93 addi x25,x25,8 + +00000000800002dc : +Zknh_sha256sig0_cg_cp_rs1_b14: + sha256sig0 x6, x14 # perform operation + 800002dc: 10271313 sha256sig0 x6,x14 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha256sig0_cg_cp_rs1_b14, Zknh_sha256sig0_cg_cp_rs1_b14_str) + 800002e0: 0001b383 ld x7,0(x3) + 800002e4: 00638c63 beq x7,x6,800002fc + 800002e8: 4f00246f jal x8,800027d8 + 800002ec: 800002dc .word 0x800002dc + 800002f0: 00000000 .word 0x00000000 + 800002f4: 80008afb .word 0x80008afb + 800002f8: 00000000 .word 0x00000000 + 800002fc: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0xea43605e255fdcc7 + 80000300: 000cb783 ld x15,0(x25) + 80000304: 008c8c93 addi x25,x25,8 + +0000000080000308 : +Zknh_sha256sig0_cg_cp_rs1_b15: + sha256sig0 x30, x15 # perform operation + 80000308: 10279f13 sha256sig0 x30,x15 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha256sig0_cg_cp_rs1_b15, Zknh_sha256sig0_cg_cp_rs1_b15_str) + 8000030c: 0001b383 ld x7,0(x3) + 80000310: 01e38c63 beq x7,x30,80000328 + 80000314: 4c40246f jal x8,800027d8 + 80000318: 80000308 .word 0x80000308 + 8000031c: 00000000 .word 0x00000000 + 80000320: 80008b34 .word 0x80008b34 + 80000324: 00000000 .word 0x00000000 + 80000328: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0xc22a0a0c78461b4c + 8000032c: 000cb803 ld x16,0(x25) + 80000330: 008c8c93 addi x25,x25,8 + +0000000080000334 : +Zknh_sha256sig0_cg_cp_rs1_b16: + sha256sig0 x17, x16 # perform operation + 80000334: 10281893 sha256sig0 x17,x16 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zknh_sha256sig0_cg_cp_rs1_b16, Zknh_sha256sig0_cg_cp_rs1_b16_str) + 80000338: 0001b383 ld x7,0(x3) + 8000033c: 01138c63 beq x7,x17,80000354 + 80000340: 4980246f jal x8,800027d8 + 80000344: 80000334 .word 0x80000334 + 80000348: 00000000 .word 0x00000000 + 8000034c: 80008b6d .word 0x80008b6d + 80000350: 00000000 .word 0x00000000 + 80000354: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x8dcc040481372777 + 80000358: 000cb883 ld x17,0(x25) + 8000035c: 008c8c93 addi x25,x25,8 + +0000000080000360 : +Zknh_sha256sig0_cg_cp_rs1_b17: + sha256sig0 x24, x17 # perform operation + 80000360: 10289c13 sha256sig0 x24,x17 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zknh_sha256sig0_cg_cp_rs1_b17, Zknh_sha256sig0_cg_cp_rs1_b17_str) + 80000364: 0001b383 ld x7,0(x3) + 80000368: 01838c63 beq x7,x24,80000380 + 8000036c: 46c0246f jal x8,800027d8 + 80000370: 80000360 .word 0x80000360 + 80000374: 00000000 .word 0x00000000 + 80000378: 80008ba6 .word 0x80008ba6 + 8000037c: 00000000 .word 0x00000000 + 80000380: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x4aec56076906adc7 + 80000384: 000cb903 ld x18,0(x25) + 80000388: 008c8c93 addi x25,x25,8 + +000000008000038c : +Zknh_sha256sig0_cg_cp_rs1_b18: + sha256sig0 x9, x18 # perform operation + 8000038c: 10291493 sha256sig0 x9,x18 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zknh_sha256sig0_cg_cp_rs1_b18, Zknh_sha256sig0_cg_cp_rs1_b18_str) + 80000390: 0001b383 ld x7,0(x3) + 80000394: 00938c63 beq x7,x9,800003ac + 80000398: 4400246f jal x8,800027d8 + 8000039c: 8000038c .word 0x8000038c + 800003a0: 00000000 .word 0x00000000 + 800003a4: 80008bdf .word 0x80008bdf + 800003a8: 00000000 .word 0x00000000 + 800003ac: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xff6585ee55286582 + 800003b0: 000cb983 ld x19,0(x25) + 800003b4: 008c8c93 addi x25,x25,8 + +00000000800003b8 : +Zknh_sha256sig0_cg_cp_rs1_b19: + sha256sig0 x11, x19 # perform operation + 800003b8: 10299593 sha256sig0 x11,x19 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zknh_sha256sig0_cg_cp_rs1_b19, Zknh_sha256sig0_cg_cp_rs1_b19_str) + 800003bc: 0001b383 ld x7,0(x3) + 800003c0: 00b38c63 beq x7,x11,800003d8 + 800003c4: 4140246f jal x8,800027d8 + 800003c8: 800003b8 .word 0x800003b8 + 800003cc: 00000000 .word 0x00000000 + 800003d0: 80008c18 .word 0x80008c18 + 800003d4: 00000000 .word 0x00000000 + 800003d8: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x5920928141a1e3f5 + 800003dc: 000cba03 ld x20,0(x25) + 800003e0: 008c8c93 addi x25,x25,8 + +00000000800003e4 : +Zknh_sha256sig0_cg_cp_rs1_b20: + sha256sig0 x22, x20 # perform operation + 800003e4: 102a1b13 sha256sig0 x22,x20 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha256sig0_cg_cp_rs1_b20, Zknh_sha256sig0_cg_cp_rs1_b20_str) + 800003e8: 0001b383 ld x7,0(x3) + 800003ec: 01638c63 beq x7,x22,80000404 + 800003f0: 3e80246f jal x8,800027d8 + 800003f4: 800003e4 .word 0x800003e4 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 80008c51 .word 0x80008c51 + 80000400: 00000000 .word 0x00000000 + 80000404: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xce763041c1ad591d + 80000408: 000cba83 ld x21,0(x25) + 8000040c: 008c8c93 addi x25,x25,8 + +0000000080000410 : +Zknh_sha256sig0_cg_cp_rs1_b21: + sha256sig0 x13, x21 # perform operation + 80000410: 102a9693 sha256sig0 x13,x21 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha256sig0_cg_cp_rs1_b21, Zknh_sha256sig0_cg_cp_rs1_b21_str) + 80000414: 0001b383 ld x7,0(x3) + 80000418: 00d38c63 beq x7,x13,80000430 + 8000041c: 3bc0246f jal x8,800027d8 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 80008c8a .word 0x80008c8a + 8000042c: 00000000 .word 0x00000000 + 80000430: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xf79e02b790c3b722 + 80000434: 000cbb03 ld x22,0(x25) + 80000438: 008c8c93 addi x25,x25,8 + +000000008000043c : +Zknh_sha256sig0_cg_cp_rs1_b22: + sha256sig0 x19, x22 # perform operation + 8000043c: 102b1993 sha256sig0 x19,x22 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zknh_sha256sig0_cg_cp_rs1_b22, Zknh_sha256sig0_cg_cp_rs1_b22_str) + 80000440: 0001b383 ld x7,0(x3) + 80000444: 01338c63 beq x7,x19,8000045c + 80000448: 3900246f jal x8,800027d8 + 8000044c: 8000043c .word 0x8000043c + 80000450: 00000000 .word 0x00000000 + 80000454: 80008cc3 .word 0x80008cc3 + 80000458: 00000000 .word 0x00000000 + 8000045c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x98522d17a7aefed6 + 80000460: 000cbb83 ld x23,0(x25) + 80000464: 008c8c93 addi x25,x25,8 + +0000000080000468 : +Zknh_sha256sig0_cg_cp_rs1_b23: + sha256sig0 x18, x23 # perform operation + 80000468: 102b9913 sha256sig0 x18,x23 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zknh_sha256sig0_cg_cp_rs1_b23, Zknh_sha256sig0_cg_cp_rs1_b23_str) + 8000046c: 0001b383 ld x7,0(x3) + 80000470: 01238c63 beq x7,x18,80000488 + 80000474: 3640246f jal x8,800027d8 + 80000478: 80000468 .word 0x80000468 + 8000047c: 00000000 .word 0x00000000 + 80000480: 80008cfc .word 0x80008cfc + 80000484: 00000000 .word 0x00000000 + 80000488: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x93522b0bb2c92670 + 8000048c: 000cbc03 ld x24,0(x25) + 80000490: 008c8c93 addi x25,x25,8 + +0000000080000494 : +Zknh_sha256sig0_cg_cp_rs1_b24: + sha256sig0 x30, x24 # perform operation + 80000494: 102c1f13 sha256sig0 x30,x24 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zknh_sha256sig0_cg_cp_rs1_b24, Zknh_sha256sig0_cg_cp_rs1_b24_str) + 80000498: 0001b383 ld x7,0(x3) + 8000049c: 01e38c63 beq x7,x30,800004b4 + 800004a0: 3380246f jal x8,800027d8 + 800004a4: 80000494 .word 0x80000494 + 800004a8: 00000000 .word 0x00000000 + 800004ac: 80008d35 .word 0x80008d35 + 800004b0: 00000000 .word 0x00000000 + 800004b4: 00818193 addi x3,x3,8 + + mv x21, x25 # switch data pointer register to avoid conflict with test + 800004b8: 000c8a93 addi x21,x25,0 +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x7e775920855c901c + 800004bc: 000abc83 ld x25,0(x21) + 800004c0: 008a8a93 addi x21,x21,8 + +00000000800004c4 : +Zknh_sha256sig0_cg_cp_rs1_b25: + sha256sig0 x6, x25 # perform operation + 800004c4: 102c9313 sha256sig0 x6,x25 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zknh_sha256sig0_cg_cp_rs1_b25, Zknh_sha256sig0_cg_cp_rs1_b25_str) + 800004c8: 0001b383 ld x7,0(x3) + 800004cc: 00638c63 beq x7,x6,800004e4 + 800004d0: 3080246f jal x8,800027d8 + 800004d4: 800004c4 .word 0x800004c4 + 800004d8: 00000000 .word 0x00000000 + 800004dc: 80008d6e .word 0x80008d6e + 800004e0: 00000000 .word 0x00000000 + 800004e4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x21, x26) # load rs1: x26 = 0x569b6a7a91ab4954 + 800004e8: 000abd03 ld x26,0(x21) + 800004ec: 008a8a93 addi x21,x21,8 + +00000000800004f0 : +Zknh_sha256sig0_cg_cp_rs1_b26: + sha256sig0 x28, x26 # perform operation + 800004f0: 102d1e13 sha256sig0 x28,x26 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zknh_sha256sig0_cg_cp_rs1_b26, Zknh_sha256sig0_cg_cp_rs1_b26_str) + 800004f4: 0001b383 ld x7,0(x3) + 800004f8: 01c38c63 beq x7,x28,80000510 + 800004fc: 2dc0246f jal x8,800027d8 + 80000500: 800004f0 .word 0x800004f0 + 80000504: 00000000 .word 0x00000000 + 80000508: 80008da7 .word 0x80008da7 + 8000050c: 00000000 .word 0x00000000 + 80000510: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs1: x27 = 0xdee402e70df0d519 + 80000514: 000abd83 ld x27,0(x21) + 80000518: 008a8a93 addi x21,x21,8 + +000000008000051c : +Zknh_sha256sig0_cg_cp_rs1_b27: + sha256sig0 x25, x27 # perform operation + 8000051c: 102d9c93 sha256sig0 x25,x27 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zknh_sha256sig0_cg_cp_rs1_b27, Zknh_sha256sig0_cg_cp_rs1_b27_str) + 80000520: 0001b383 ld x7,0(x3) + 80000524: 01938c63 beq x7,x25,8000053c + 80000528: 2b00246f jal x8,800027d8 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 80008de0 .word 0x80008de0 + 80000538: 00000000 .word 0x00000000 + 8000053c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x7fadbc19f331b43e + 80000540: 000abe03 ld x28,0(x21) + 80000544: 008a8a93 addi x21,x21,8 + +0000000080000548 : +Zknh_sha256sig0_cg_cp_rs1_b28: + sha256sig0 x31, x28 # perform operation + 80000548: 102e1f93 sha256sig0 x31,x28 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zknh_sha256sig0_cg_cp_rs1_b28, Zknh_sha256sig0_cg_cp_rs1_b28_str) + 8000054c: 0001b383 ld x7,0(x3) + 80000550: 01f38c63 beq x7,x31,80000568 + 80000554: 2840246f jal x8,800027d8 + 80000558: 80000548 .word 0x80000548 + 8000055c: 00000000 .word 0x00000000 + 80000560: 80008e19 .word 0x80008e19 + 80000564: 00000000 .word 0x00000000 + 80000568: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xfaa23ad2b06d6f64 + 8000056c: 000abe83 ld x29,0(x21) + 80000570: 008a8a93 addi x21,x21,8 + +0000000080000574 : +Zknh_sha256sig0_cg_cp_rs1_b29: + sha256sig0 x22, x29 # perform operation + 80000574: 102e9b13 sha256sig0 x22,x29 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zknh_sha256sig0_cg_cp_rs1_b29, Zknh_sha256sig0_cg_cp_rs1_b29_str) + 80000578: 0001b383 ld x7,0(x3) + 8000057c: 01638c63 beq x7,x22,80000594 + 80000580: 2580246f jal x8,800027d8 + 80000584: 80000574 .word 0x80000574 + 80000588: 00000000 .word 0x00000000 + 8000058c: 80008e52 .word 0x80008e52 + 80000590: 00000000 .word 0x00000000 + 80000594: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x46a86f6b6b3035f9 + 80000598: 000abf03 ld x30,0(x21) + 8000059c: 008a8a93 addi x21,x21,8 + +00000000800005a0 : +Zknh_sha256sig0_cg_cp_rs1_b30: + sha256sig0 x0, x30 # perform operation + 800005a0: 102f1013 sha256sig0 x0,x30 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zknh_sha256sig0_cg_cp_rs1_b30, Zknh_sha256sig0_cg_cp_rs1_b30_str) + 800005a4: 0001b383 ld x7,0(x3) + 800005a8: 00038c63 beq x7,x0,800005c0 + 800005ac: 22c0246f jal x8,800027d8 + 800005b0: 800005a0 .word 0x800005a0 + 800005b4: 00000000 .word 0x00000000 + 800005b8: 80008e8b .word 0x80008e8b + 800005bc: 00000000 .word 0x00000000 + 800005c0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xde172c589199a2a4 + 800005c4: 000abf83 ld x31,0(x21) + 800005c8: 008a8a93 addi x21,x21,8 + +00000000800005cc : +Zknh_sha256sig0_cg_cp_rs1_b31: + sha256sig0 x13, x31 # perform operation + 800005cc: 102f9693 sha256sig0 x13,x31 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zknh_sha256sig0_cg_cp_rs1_b31, Zknh_sha256sig0_cg_cp_rs1_b31_str) + 800005d0: 0001b383 ld x7,0(x3) + 800005d4: 00d38c63 beq x7,x13,800005ec + 800005d8: 2000246f jal x8,800027d8 + 800005dc: 800005cc .word 0x800005cc + 800005e0: 00000000 .word 0x00000000 + 800005e4: 80008ec4 .word 0x80008ec4 + 800005e8: 00000000 .word 0x00000000 + 800005ec: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x3f521fad25b8d2f5 + 800005f0: 000ab203 ld x4,0(x21) + 800005f4: 008a8a93 addi x21,x21,8 + +00000000800005f8 : +Zknh_sha256sig0_cg_cp_rd_b0: + sha256sig0 x0, x4 # perform operation + 800005f8: 10221013 sha256sig0 x0,x4 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zknh_sha256sig0_cg_cp_rd_b0, Zknh_sha256sig0_cg_cp_rd_b0_str) + 800005fc: 0001b383 ld x7,0(x3) + 80000600: 00038c63 beq x7,x0,80000618 + 80000604: 1d40246f jal x8,800027d8 + 80000608: 800005f8 .word 0x800005f8 + 8000060c: 00000000 .word 0x00000000 + 80000610: 80008efd .word 0x80008efd + 80000614: 00000000 .word 0x00000000 + 80000618: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x4d31d7e7ade9c583 + 8000061c: 000aba03 ld x20,0(x21) + 80000620: 008a8a93 addi x21,x21,8 + +0000000080000624 : +Zknh_sha256sig0_cg_cp_rd_b1: + sha256sig0 x1, x20 # perform operation + 80000624: 102a1093 sha256sig0 x1,x20 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zknh_sha256sig0_cg_cp_rd_b1, Zknh_sha256sig0_cg_cp_rd_b1_str) + 80000628: 0001b383 ld x7,0(x3) + 8000062c: 00138c63 beq x7,x1,80000644 + 80000630: 1a80246f jal x8,800027d8 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 80008f34 .word 0x80008f34 + 80000640: 00000000 .word 0x00000000 + 80000644: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x009c9f28515f7d35 + 80000648: 000ab603 ld x12,0(x21) + 8000064c: 008a8a93 addi x21,x21,8 + +0000000080000650 : +Zknh_sha256sig0_cg_cp_rd_b2: + sha256sig0 x2, x12 # perform operation + 80000650: 10261113 sha256sig0 x2,x12 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zknh_sha256sig0_cg_cp_rd_b2, Zknh_sha256sig0_cg_cp_rd_b2_str) + 80000654: 0001b383 ld x7,0(x3) + 80000658: 00238c63 beq x7,x2,80000670 + 8000065c: 17c0246f jal x8,800027d8 + 80000660: 80000650 .word 0x80000650 + 80000664: 00000000 .word 0x00000000 + 80000668: 80008f6b .word 0x80008f6b + 8000066c: 00000000 .word 0x00000000 + 80000670: 00818193 addi x3,x3,8 + + mv x2, x3 # switch signature pointer register to avoid conflict with test + 80000674: 00018113 addi x2,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xa46125568cdd34c5 + 80000678: 000ab803 ld x16,0(x21) + 8000067c: 008a8a93 addi x21,x21,8 + +0000000080000680 : +Zknh_sha256sig0_cg_cp_rd_b3: + sha256sig0 x3, x16 # perform operation + 80000680: 10281193 sha256sig0 x3,x16 + # Check if x3 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x3, Zknh_sha256sig0_cg_cp_rd_b3, Zknh_sha256sig0_cg_cp_rd_b3_str) + 80000684: 00013383 ld x7,0(x2) + 80000688: 00338c63 beq x7,x3,800006a0 + 8000068c: 14c0246f jal x8,800027d8 + 80000690: 80000680 .word 0x80000680 + 80000694: 00000000 .word 0x00000000 + 80000698: 80008fa2 .word 0x80008fa2 + 8000069c: 00000000 .word 0x00000000 + 800006a0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x542360c0d8104f15 + 800006a4: 000ab703 ld x14,0(x21) + 800006a8: 008a8a93 addi x21,x21,8 + +00000000800006ac : +Zknh_sha256sig0_cg_cp_rd_b4: + sha256sig0 x4, x14 # perform operation + 800006ac: 10271213 sha256sig0 x4,x14 + # Check if x4 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x4, Zknh_sha256sig0_cg_cp_rd_b4, Zknh_sha256sig0_cg_cp_rd_b4_str) + 800006b0: 00013383 ld x7,0(x2) + 800006b4: 00438c63 beq x7,x4,800006cc + 800006b8: 1200246f jal x8,800027d8 + 800006bc: 800006ac .word 0x800006ac + 800006c0: 00000000 .word 0x00000000 + 800006c4: 80008fd9 .word 0x80008fd9 + 800006c8: 00000000 .word 0x00000000 + 800006cc: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x93e35a61be24f660 + 800006d0: 000ab803 ld x16,0(x21) + 800006d4: 008a8a93 addi x21,x21,8 + +00000000800006d8 : +Zknh_sha256sig0_cg_cp_rd_b5: + sha256sig0 x5, x16 # perform operation + 800006d8: 10281293 sha256sig0 x5,x16 + # Check if x5 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x5, Zknh_sha256sig0_cg_cp_rd_b5, Zknh_sha256sig0_cg_cp_rd_b5_str) + 800006dc: 00013383 ld x7,0(x2) + 800006e0: 00538c63 beq x7,x5,800006f8 + 800006e4: 0f40246f jal x8,800027d8 + 800006e8: 800006d8 .word 0x800006d8 + 800006ec: 00000000 .word 0x00000000 + 800006f0: 80009010 .word 0x80009010 + 800006f4: 00000000 .word 0x00000000 + 800006f8: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0xeef672a59829f719 + 800006fc: 000ab203 ld x4,0(x21) + 80000700: 008a8a93 addi x21,x21,8 + +0000000080000704 : +Zknh_sha256sig0_cg_cp_rd_b6: + sha256sig0 x6, x4 # perform operation + 80000704: 10221313 sha256sig0 x6,x4 + # Check if x6 contains the expected result. x2 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x2, x8, x7, x6, Zknh_sha256sig0_cg_cp_rd_b6, Zknh_sha256sig0_cg_cp_rd_b6_str) + 80000708: 00013383 ld x7,0(x2) + 8000070c: 00638c63 beq x7,x6,80000724 + 80000710: 0c80246f jal x8,800027d8 + 80000714: 80000704 .word 0x80000704 + 80000718: 00000000 .word 0x00000000 + 8000071c: 80009047 .word 0x80009047 + 80000720: 00000000 .word 0x00000000 + 80000724: 00810113 addi x2,x2,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000728: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 8000072c: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs1: x23 = 0x0239e639c9038f90 + 80000730: 000abb83 ld x23,0(x21) + 80000734: 008a8a93 addi x21,x21,8 + +0000000080000738 : +Zknh_sha256sig0_cg_cp_rd_b7: + sha256sig0 x7, x23 # perform operation + 80000738: 102b9393 sha256sig0 x7,x23 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zknh_sha256sig0_cg_cp_rd_b7, Zknh_sha256sig0_cg_cp_rd_b7_str) + 8000073c: 00013203 ld x4,0(x2) + 80000740: 00720c63 beq x4,x7,80000758 + 80000744: 07c022ef jal x5,800027c0 + 80000748: 80000738 .word 0x80000738 + 8000074c: 00000000 .word 0x00000000 + 80000750: 8000907e .word 0x8000907e + 80000754: 00000000 .word 0x00000000 + 80000758: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x8c37bb963b18697f + 8000075c: 000ab503 ld x10,0(x21) + 80000760: 008a8a93 addi x21,x21,8 + +0000000080000764 : +Zknh_sha256sig0_cg_cp_rd_b8: + sha256sig0 x8, x10 # perform operation + 80000764: 10251413 sha256sig0 x8,x10 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zknh_sha256sig0_cg_cp_rd_b8, Zknh_sha256sig0_cg_cp_rd_b8_str) + 80000768: 00013203 ld x4,0(x2) + 8000076c: 00820c63 beq x4,x8,80000784 + 80000770: 050022ef jal x5,800027c0 + 80000774: 80000764 .word 0x80000764 + 80000778: 00000000 .word 0x00000000 + 8000077c: 800090b5 .word 0x800090b5 + 80000780: 00000000 .word 0x00000000 + 80000784: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x24) # load rs1: x24 = 0x2872cf0afa40eb1b + 80000788: 000abc03 ld x24,0(x21) + 8000078c: 008a8a93 addi x21,x21,8 + +0000000080000790 : +Zknh_sha256sig0_cg_cp_rd_b9: + sha256sig0 x9, x24 # perform operation + 80000790: 102c1493 sha256sig0 x9,x24 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknh_sha256sig0_cg_cp_rd_b9, Zknh_sha256sig0_cg_cp_rd_b9_str) + 80000794: 00013203 ld x4,0(x2) + 80000798: 00920c63 beq x4,x9,800007b0 + 8000079c: 024022ef jal x5,800027c0 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 800090ec .word 0x800090ec + 800007ac: 00000000 .word 0x00000000 + 800007b0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0xba2523aca136ed7c + 800007b4: 000ab003 ld x0,0(x21) + 800007b8: 008a8a93 addi x21,x21,8 + +00000000800007bc : +Zknh_sha256sig0_cg_cp_rd_b10: + sha256sig0 x10, x0 # perform operation + 800007bc: 10201513 sha256sig0 x10,x0 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zknh_sha256sig0_cg_cp_rd_b10, Zknh_sha256sig0_cg_cp_rd_b10_str) + 800007c0: 00013203 ld x4,0(x2) + 800007c4: 00a20c63 beq x4,x10,800007dc + 800007c8: 7f9012ef jal x5,800027c0 + 800007cc: 800007bc .word 0x800007bc + 800007d0: 00000000 .word 0x00000000 + 800007d4: 80009123 .word 0x80009123 + 800007d8: 00000000 .word 0x00000000 + 800007dc: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xb907946aa57559b7 + 800007e0: 000abf03 ld x30,0(x21) + 800007e4: 008a8a93 addi x21,x21,8 + +00000000800007e8 : +Zknh_sha256sig0_cg_cp_rd_b11: + sha256sig0 x11, x30 # perform operation + 800007e8: 102f1593 sha256sig0 x11,x30 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zknh_sha256sig0_cg_cp_rd_b11, Zknh_sha256sig0_cg_cp_rd_b11_str) + 800007ec: 00013203 ld x4,0(x2) + 800007f0: 00b20c63 beq x4,x11,80000808 + 800007f4: 7cd012ef jal x5,800027c0 + 800007f8: 800007e8 .word 0x800007e8 + 800007fc: 00000000 .word 0x00000000 + 80000800: 8000915b .word 0x8000915b + 80000804: 00000000 .word 0x00000000 + 80000808: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x35d5f491fc085c49 + 8000080c: 000ab403 ld x8,0(x21) + 80000810: 008a8a93 addi x21,x21,8 + +0000000080000814 : +Zknh_sha256sig0_cg_cp_rd_b12: + sha256sig0 x12, x8 # perform operation + 80000814: 10241613 sha256sig0 x12,x8 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknh_sha256sig0_cg_cp_rd_b12, Zknh_sha256sig0_cg_cp_rd_b12_str) + 80000818: 00013203 ld x4,0(x2) + 8000081c: 00c20c63 beq x4,x12,80000834 + 80000820: 7a1012ef jal x5,800027c0 + 80000824: 80000814 .word 0x80000814 + 80000828: 00000000 .word 0x00000000 + 8000082c: 80009193 .word 0x80009193 + 80000830: 00000000 .word 0x00000000 + 80000834: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x0e121c351113816d + 80000838: 000ab903 ld x18,0(x21) + 8000083c: 008a8a93 addi x21,x21,8 + +0000000080000840 : +Zknh_sha256sig0_cg_cp_rd_b13: + sha256sig0 x13, x18 # perform operation + 80000840: 10291693 sha256sig0 x13,x18 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha256sig0_cg_cp_rd_b13, Zknh_sha256sig0_cg_cp_rd_b13_str) + 80000844: 00013203 ld x4,0(x2) + 80000848: 00d20c63 beq x4,x13,80000860 + 8000084c: 775012ef jal x5,800027c0 + 80000850: 80000840 .word 0x80000840 + 80000854: 00000000 .word 0x00000000 + 80000858: 800091cb .word 0x800091cb + 8000085c: 00000000 .word 0x00000000 + 80000860: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0xaa8cd7b6bb34d17f + 80000864: 000aba03 ld x20,0(x21) + 80000868: 008a8a93 addi x21,x21,8 + +000000008000086c : +Zknh_sha256sig0_cg_cp_rd_b14: + sha256sig0 x14, x20 # perform operation + 8000086c: 102a1713 sha256sig0 x14,x20 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zknh_sha256sig0_cg_cp_rd_b14, Zknh_sha256sig0_cg_cp_rd_b14_str) + 80000870: 00013203 ld x4,0(x2) + 80000874: 00e20c63 beq x4,x14,8000088c + 80000878: 749012ef jal x5,800027c0 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 80009203 .word 0x80009203 + 80000888: 00000000 .word 0x00000000 + 8000088c: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x758ccb17518f5761 + 80000890: 000abf03 ld x30,0(x21) + 80000894: 008a8a93 addi x21,x21,8 + +0000000080000898 : +Zknh_sha256sig0_cg_cp_rd_b15: + sha256sig0 x15, x30 # perform operation + 80000898: 102f1793 sha256sig0 x15,x30 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zknh_sha256sig0_cg_cp_rd_b15, Zknh_sha256sig0_cg_cp_rd_b15_str) + 8000089c: 00013203 ld x4,0(x2) + 800008a0: 00f20c63 beq x4,x15,800008b8 + 800008a4: 71d012ef jal x5,800027c0 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 8000923b .word 0x8000923b + 800008b4: 00000000 .word 0x00000000 + 800008b8: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0xf6b4f7b48e9bbda5 + 800008bc: 000ab383 ld x7,0(x21) + 800008c0: 008a8a93 addi x21,x21,8 + +00000000800008c4 : +Zknh_sha256sig0_cg_cp_rd_b16: + sha256sig0 x16, x7 # perform operation + 800008c4: 10239813 sha256sig0 x16,x7 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknh_sha256sig0_cg_cp_rd_b16, Zknh_sha256sig0_cg_cp_rd_b16_str) + 800008c8: 00013203 ld x4,0(x2) + 800008cc: 01020c63 beq x4,x16,800008e4 + 800008d0: 6f1012ef jal x5,800027c0 + 800008d4: 800008c4 .word 0x800008c4 + 800008d8: 00000000 .word 0x00000000 + 800008dc: 80009273 .word 0x80009273 + 800008e0: 00000000 .word 0x00000000 + 800008e4: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xb68ec9069785fc83 + 800008e8: 000ab303 ld x6,0(x21) + 800008ec: 008a8a93 addi x21,x21,8 + +00000000800008f0 : +Zknh_sha256sig0_cg_cp_rd_b17: + sha256sig0 x17, x6 # perform operation + 800008f0: 10231893 sha256sig0 x17,x6 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zknh_sha256sig0_cg_cp_rd_b17, Zknh_sha256sig0_cg_cp_rd_b17_str) + 800008f4: 00013203 ld x4,0(x2) + 800008f8: 01120c63 beq x4,x17,80000910 + 800008fc: 6c5012ef jal x5,800027c0 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800092ab .word 0x800092ab + 8000090c: 00000000 .word 0x00000000 + 80000910: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x6d148835ff29b9da + 80000914: 000abb03 ld x22,0(x21) + 80000918: 008a8a93 addi x21,x21,8 + +000000008000091c : +Zknh_sha256sig0_cg_cp_rd_b18: + sha256sig0 x18, x22 # perform operation + 8000091c: 102b1913 sha256sig0 x18,x22 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknh_sha256sig0_cg_cp_rd_b18, Zknh_sha256sig0_cg_cp_rd_b18_str) + 80000920: 00013203 ld x4,0(x2) + 80000924: 01220c63 beq x4,x18,8000093c + 80000928: 699012ef jal x5,800027c0 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800092e3 .word 0x800092e3 + 80000938: 00000000 .word 0x00000000 + 8000093c: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs1: x22 = 0x7e835923fdfe7b12 + 80000940: 000abb03 ld x22,0(x21) + 80000944: 008a8a93 addi x21,x21,8 + +0000000080000948 : +Zknh_sha256sig0_cg_cp_rd_b19: + sha256sig0 x19, x22 # perform operation + 80000948: 102b1993 sha256sig0 x19,x22 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknh_sha256sig0_cg_cp_rd_b19, Zknh_sha256sig0_cg_cp_rd_b19_str) + 8000094c: 00013203 ld x4,0(x2) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000931b .word 0x8000931b + 80000964: 00000000 .word 0x00000000 + 80000968: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0xb65ccf67dd464454 + 8000096c: 000abc83 ld x25,0(x21) + 80000970: 008a8a93 addi x21,x21,8 + +0000000080000974 : +Zknh_sha256sig0_cg_cp_rd_b20: + sha256sig0 x20, x25 # perform operation + 80000974: 102c9a13 sha256sig0 x20,x25 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zknh_sha256sig0_cg_cp_rd_b20, Zknh_sha256sig0_cg_cp_rd_b20_str) + 80000978: 00013203 ld x4,0(x2) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 00810113 addi x2,x2,8 + + mv x28, x21 # switch data pointer register to avoid conflict with test + 80000998: 000a8e13 addi x28,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x10) # load rs1: x10 = 0xc31bae8644ea2dfb + 8000099c: 000e3503 ld x10,0(x28) + 800009a0: 008e0e13 addi x28,x28,8 + +00000000800009a4 : +Zknh_sha256sig0_cg_cp_rd_b21: + sha256sig0 x21, x10 # perform operation + 800009a4: 10251a93 sha256sig0 x21,x10 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zknh_sha256sig0_cg_cp_rd_b21, Zknh_sha256sig0_cg_cp_rd_b21_str) + 800009a8: 00013203 ld x4,0(x2) + 800009ac: 01520c63 beq x4,x21,800009c4 + 800009b0: 611012ef jal x5,800027c0 + 800009b4: 800009a4 .word 0x800009a4 + 800009b8: 00000000 .word 0x00000000 + 800009bc: 8000938b .word 0x8000938b + 800009c0: 00000000 .word 0x00000000 + 800009c4: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x1cf0fae1b7e8bf17 + 800009c8: 000e3703 ld x14,0(x28) + 800009cc: 008e0e13 addi x28,x28,8 + +00000000800009d0 : +Zknh_sha256sig0_cg_cp_rd_b22: + sha256sig0 x22, x14 # perform operation + 800009d0: 10271b13 sha256sig0 x22,x14 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknh_sha256sig0_cg_cp_rd_b22, Zknh_sha256sig0_cg_cp_rd_b22_str) + 800009d4: 00013203 ld x4,0(x2) + 800009d8: 01620c63 beq x4,x22,800009f0 + 800009dc: 5e5012ef jal x5,800027c0 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 800093c3 .word 0x800093c3 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x11) # load rs1: x11 = 0xd0c991d714e08abe + 800009f4: 000e3583 ld x11,0(x28) + 800009f8: 008e0e13 addi x28,x28,8 + +00000000800009fc : +Zknh_sha256sig0_cg_cp_rd_b23: + sha256sig0 x23, x11 # perform operation + 800009fc: 10259b93 sha256sig0 x23,x11 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zknh_sha256sig0_cg_cp_rd_b23, Zknh_sha256sig0_cg_cp_rd_b23_str) + 80000a00: 00013203 ld x4,0(x2) + 80000a04: 01720c63 beq x4,x23,80000a1c + 80000a08: 5b9012ef jal x5,800027c0 + 80000a0c: 800009fc .word 0x800009fc + 80000a10: 00000000 .word 0x00000000 + 80000a14: 800093fb .word 0x800093fb + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x14) # load rs1: x14 = 0x5607dcaa4f49353a + 80000a20: 000e3703 ld x14,0(x28) + 80000a24: 008e0e13 addi x28,x28,8 + +0000000080000a28 : +Zknh_sha256sig0_cg_cp_rd_b24: + sha256sig0 x24, x14 # perform operation + 80000a28: 10271c13 sha256sig0 x24,x14 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknh_sha256sig0_cg_cp_rd_b24, Zknh_sha256sig0_cg_cp_rd_b24_str) + 80000a2c: 00013203 ld x4,0(x2) + 80000a30: 01820c63 beq x4,x24,80000a48 + 80000a34: 58d012ef jal x5,800027c0 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009433 .word 0x80009433 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0xf045a30603874a87 + 80000a4c: 000e3b83 ld x23,0(x28) + 80000a50: 008e0e13 addi x28,x28,8 + +0000000080000a54 : +Zknh_sha256sig0_cg_cp_rd_b25: + sha256sig0 x25, x23 # perform operation + 80000a54: 102b9c93 sha256sig0 x25,x23 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zknh_sha256sig0_cg_cp_rd_b25, Zknh_sha256sig0_cg_cp_rd_b25_str) + 80000a58: 00013203 ld x4,0(x2) + 80000a5c: 01920c63 beq x4,x25,80000a74 + 80000a60: 561012ef jal x5,800027c0 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000946b .word 0x8000946b + 80000a70: 00000000 .word 0x00000000 + 80000a74: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x0) # load rs1: x0 = 0xd8638e81dd32832c + 80000a78: 000e3003 ld x0,0(x28) + 80000a7c: 008e0e13 addi x28,x28,8 + +0000000080000a80 : +Zknh_sha256sig0_cg_cp_rd_b26: + sha256sig0 x26, x0 # perform operation + 80000a80: 10201d13 sha256sig0 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zknh_sha256sig0_cg_cp_rd_b26, Zknh_sha256sig0_cg_cp_rd_b26_str) + 80000a84: 00013203 ld x4,0(x2) + 80000a88: 01a20c63 beq x4,x26,80000aa0 + 80000a8c: 535012ef jal x5,800027c0 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 800094a3 .word 0x800094a3 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0xca653f2dd1ca843b + 80000aa4: 000e3883 ld x17,0(x28) + 80000aa8: 008e0e13 addi x28,x28,8 + +0000000080000aac : +Zknh_sha256sig0_cg_cp_rd_b27: + sha256sig0 x27, x17 # perform operation + 80000aac: 10289d93 sha256sig0 x27,x17 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknh_sha256sig0_cg_cp_rd_b27, Zknh_sha256sig0_cg_cp_rd_b27_str) + 80000ab0: 00013203 ld x4,0(x2) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 509012ef jal x5,800027c0 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094db .word 0x800094db + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00810113 addi x2,x2,8 + + mv x16, x28 # switch data pointer register to avoid conflict with test + 80000ad0: 000e0813 addi x16,x28,0 +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x16, x24) # load rs1: x24 = 0x422b56ad1cc37c5f + 80000ad4: 00083c03 ld x24,0(x16) + 80000ad8: 00880813 addi x16,x16,8 + +0000000080000adc : +Zknh_sha256sig0_cg_cp_rd_b28: + sha256sig0 x28, x24 # perform operation + 80000adc: 102c1e13 sha256sig0 x28,x24 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha256sig0_cg_cp_rd_b28, Zknh_sha256sig0_cg_cp_rd_b28_str) + 80000ae0: 00013203 ld x4,0(x2) + 80000ae4: 01c20c63 beq x4,x28,80000afc + 80000ae8: 4d9012ef jal x5,800027c0 + 80000aec: 80000adc .word 0x80000adc + 80000af0: 00000000 .word 0x00000000 + 80000af4: 80009513 .word 0x80009513 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xc1b43ed20e94dbd7 + 80000b00: 00083503 ld x10,0(x16) + 80000b04: 00880813 addi x16,x16,8 + +0000000080000b08 : +Zknh_sha256sig0_cg_cp_rd_b29: + sha256sig0 x29, x10 # perform operation + 80000b08: 10251e93 sha256sig0 x29,x10 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zknh_sha256sig0_cg_cp_rd_b29, Zknh_sha256sig0_cg_cp_rd_b29_str) + 80000b0c: 00013203 ld x4,0(x2) + 80000b10: 01d20c63 beq x4,x29,80000b28 + 80000b14: 4ad012ef jal x5,800027c0 + 80000b18: 80000b08 .word 0x80000b08 + 80000b1c: 00000000 .word 0x00000000 + 80000b20: 8000954b .word 0x8000954b + 80000b24: 00000000 .word 0x00000000 + 80000b28: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x477e82714cd1c6f4 + 80000b2c: 00083f83 ld x31,0(x16) + 80000b30: 00880813 addi x16,x16,8 + +0000000080000b34 : +Zknh_sha256sig0_cg_cp_rd_b30: + sha256sig0 x30, x31 # perform operation + 80000b34: 102f9f13 sha256sig0 x30,x31 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha256sig0_cg_cp_rd_b30, Zknh_sha256sig0_cg_cp_rd_b30_str) + 80000b38: 00013203 ld x4,0(x2) + 80000b3c: 01e20c63 beq x4,x30,80000b54 + 80000b40: 481012ef jal x5,800027c0 + 80000b44: 80000b34 .word 0x80000b34 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 80009583 .word 0x80009583 + 80000b50: 00000000 .word 0x00000000 + 80000b54: 00810113 addi x2,x2,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xcdf0115dc72ac880 + 80000b58: 00083e83 ld x29,0(x16) + 80000b5c: 00880813 addi x16,x16,8 + +0000000080000b60 : +Zknh_sha256sig0_cg_cp_rd_b31: + sha256sig0 x31, x29 # perform operation + 80000b60: 102e9f93 sha256sig0 x31,x29 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha256sig0_cg_cp_rd_b31, Zknh_sha256sig0_cg_cp_rd_b31_str) + 80000b64: 00013203 ld x4,0(x2) + 80000b68: 01f20c63 beq x4,x31,80000b80 + 80000b6c: 455012ef jal x5,800027c0 + 80000b70: 80000b60 .word 0x80000b60 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 800095bb .word 0x800095bb + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0000000000000000 + 80000b84: 00083a83 ld x21,0(x16) + 80000b88: 00880813 addi x16,x16,8 + +0000000080000b8c : +Zknh_sha256sig0_cg_cp_rs1_edges_0x0: + sha256sig0 x13, x21 # perform operation + 80000b8c: 102a9693 sha256sig0 x13,x21 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha256sig0_cg_cp_rs1_edges_0x0, Zknh_sha256sig0_cg_cp_rs1_edges_0x0_str) + 80000b90: 00013203 ld x4,0(x2) + 80000b94: 00d20c63 beq x4,x13,80000bac + 80000b98: 429012ef jal x5,800027c0 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 800095f3 .word 0x800095f3 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x26) # load rs1: x26 = 0x0000000000000001 + 80000bb0: 00083d03 ld x26,0(x16) + 80000bb4: 00880813 addi x16,x16,8 + +0000000080000bb8 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x1: + sha256sig0 x31, x26 # perform operation + 80000bb8: 102d1f93 sha256sig0 x31,x26 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha256sig0_cg_cp_rs1_edges_0x1, Zknh_sha256sig0_cg_cp_rs1_edges_0x1_str) + 80000bbc: 00013203 ld x4,0(x2) + 80000bc0: 01f20c63 beq x4,x31,80000bd8 + 80000bc4: 3fd012ef jal x5,800027c0 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 80009632 .word 0x80009632 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x16, x30) # load rs1: x30 = 0x0000000000000002 + 80000bdc: 00083f03 ld x30,0(x16) + 80000be0: 00880813 addi x16,x16,8 + +0000000080000be4 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x2: + sha256sig0 x9, x30 # perform operation + 80000be4: 102f1493 sha256sig0 x9,x30 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknh_sha256sig0_cg_cp_rs1_edges_0x2, Zknh_sha256sig0_cg_cp_rs1_edges_0x2_str) + 80000be8: 00013203 ld x4,0(x2) + 80000bec: 00920c63 beq x4,x9,80000c04 + 80000bf0: 3d1012ef jal x5,800027c0 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80009671 .word 0x80009671 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x8000000000000000 + 80000c08: 00083c83 ld x25,0(x16) + 80000c0c: 00880813 addi x16,x16,8 + +0000000080000c10 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000000: + sha256sig0 x9, x25 # perform operation + 80000c10: 102c9493 sha256sig0 x9,x25 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c14: 00013203 ld x4,0(x2) + 80000c18: 00920c63 beq x4,x9,80000c30 + 80000c1c: 3a5012ef jal x5,800027c0 + 80000c20: 80000c10 .word 0x80000c10 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 800096b0 .word 0x800096b0 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x8000000000000001 + 80000c34: 00083f83 ld x31,0(x16) + 80000c38: 00880813 addi x16,x16,8 + +0000000080000c3c : +Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000001: + sha256sig0 x6, x31 # perform operation + 80000c3c: 102f9313 sha256sig0 x6,x31 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha256sig0_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c40: 00013203 ld x4,0(x2) + 80000c44: 00620c63 beq x4,x6,80000c5c + 80000c48: 379012ef jal x5,800027c0 + 80000c4c: 80000c3c .word 0x80000c3c + 80000c50: 00000000 .word 0x00000000 + 80000c54: 800096fe .word 0x800096fe + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x7fffffffffffffff + 80000c60: 00083b83 ld x23,0(x16) + 80000c64: 00880813 addi x16,x16,8 + +0000000080000c68 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffffffffffff: + sha256sig0 x22, x23 # perform operation + 80000c68: 102b9b13 sha256sig0 x22,x23 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha256sig0_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c6c: 00013203 ld x4,0(x2) + 80000c70: 01620c63 beq x4,x22,80000c88 + 80000c74: 34d012ef jal x5,800027c0 + 80000c78: 80000c68 .word 0x80000c68 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 8000974c .word 0x8000974c + 80000c84: 00000000 .word 0x00000000 + 80000c88: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80000c8c: 00083a03 ld x20,0(x16) + 80000c90: 00880813 addi x16,x16,8 + +0000000080000c94 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha256sig0 x28, x20 # perform operation + 80000c94: 102a1e13 sha256sig0 x28,x20 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha256sig0_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c98: 00013203 ld x4,0(x2) + 80000c9c: 01c20c63 beq x4,x28,80000cb4 + 80000ca0: 321012ef jal x5,800027c0 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000979a .word 0x8000979a + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x29) # load rs1: x29 = 0xffffffffffffffff + 80000cb8: 00083e83 ld x29,0(x16) + 80000cbc: 00880813 addi x16,x16,8 + +0000000080000cc0 : +Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffffffffffff: + sha256sig0 x31, x29 # perform operation + 80000cc0: 102e9f93 sha256sig0 x31,x29 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc4: 00013203 ld x4,0(x2) + 80000cc8: 01f20c63 beq x4,x31,80000ce0 + 80000ccc: 2f5012ef jal x5,800027c0 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 800097e8 .word 0x800097e8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x22) # load rs1: x22 = 0xfffffffffffffffe + 80000ce4: 00083b03 ld x22,0(x16) + 80000ce8: 00880813 addi x16,x16,8 + +0000000080000cec : +Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffffffffffe: + sha256sig0 x12, x22 # perform operation + 80000cec: 102b1613 sha256sig0 x12,x22 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf0: 00013203 ld x4,0(x2) + 80000cf4: 00c20c63 beq x4,x12,80000d0c + 80000cf8: 2c9012ef jal x5,800027c0 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 80009836 .word 0x80009836 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 80000d10: 00083503 ld x10,0(x16) + 80000d14: 00880813 addi x16,x16,8 + +0000000080000d18 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha256sig0 x6, x10 # perform operation + 80000d18: 10251313 sha256sig0 x6,x10 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha256sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d1c: 00013203 ld x4,0(x2) + 80000d20: 00620c63 beq x4,x6,80000d38 + 80000d24: 29d012ef jal x5,800027c0 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 80009884 .word 0x80009884 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80000d3c: 00083383 ld x7,0(x16) + 80000d40: 00880813 addi x16,x16,8 + +0000000080000d44 : +Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha256sig0 x24, x7 # perform operation + 80000d44: 10239c13 sha256sig0 x24,x7 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha256sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d48: 00013203 ld x4,0(x2) + 80000d4c: 01820c63 beq x4,x24,80000d64 + 80000d50: 271012ef jal x5,800027c0 + 80000d54: 80000d44 .word 0x80000d44 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 800098d2 .word 0x800098d2 + 80000d60: 00000000 .word 0x00000000 + 80000d64: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x16, x25) # load rs1: x25 = 0x5555555555555555 + 80000d68: 00083c83 ld x25,0(x16) + 80000d6c: 00880813 addi x16,x16,8 + +0000000080000d70 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x5555555555555555: + sha256sig0 x8, x25 # perform operation + 80000d70: 102c9413 sha256sig0 x8,x25 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zknh_sha256sig0_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha256sig0_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d74: 00013203 ld x4,0(x2) + 80000d78: 00820c63 beq x4,x8,80000d90 + 80000d7c: 245012ef jal x5,800027c0 + 80000d80: 80000d70 .word 0x80000d70 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 80009920 .word 0x80009920 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x16, x28) # load rs1: x28 = 0x00000000ffffffff + 80000d94: 00083e03 ld x28,0(x16) + 80000d98: 00880813 addi x16,x16,8 + +0000000080000d9c : +Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff: + sha256sig0 x14, x28 # perform operation + 80000d9c: 102e1713 sha256sig0 x14,x28 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sig0_cg_cp_rs1_edges_0xffffffff_str) + 80000da0: 00013203 ld x4,0(x2) + 80000da4: 00e20c63 beq x4,x14,80000dbc + 80000da8: 219012ef jal x5,800027c0 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 8000996e .word 0x8000996e + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x00000000fffffffe + 80000dc0: 00083183 ld x3,0(x16) + 80000dc4: 00880813 addi x16,x16,8 + +0000000080000dc8 : +Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe: + sha256sig0 x27, x3 # perform operation + 80000dc8: 10219d93 sha256sig0 x27,x3 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sig0_cg_cp_rs1_edges_0xfffffffe_str) + 80000dcc: 00013203 ld x4,0(x2) + 80000dd0: 01b20c63 beq x4,x27,80000de8 + 80000dd4: 1ed012ef jal x5,800027c0 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 800099b4 .word 0x800099b4 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x0000000100000000 + 80000dec: 00083483 ld x9,0(x16) + 80000df0: 00880813 addi x16,x16,8 + +0000000080000df4 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x100000000: + sha256sig0 x18, x9 # perform operation + 80000df4: 10249913 sha256sig0 x18,x9 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zknh_sha256sig0_cg_cp_rs1_edges_0x100000000, Zknh_sha256sig0_cg_cp_rs1_edges_0x100000000_str) + 80000df8: 00013203 ld x4,0(x2) + 80000dfc: 01220c63 beq x4,x18,80000e14 + 80000e00: 1c1012ef jal x5,800027c0 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 800099fa .word 0x800099fa + 80000e10: 00000000 .word 0x00000000 + 80000e14: 00810113 addi x2,x2,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x16, x21) # load rs1: x21 = 0x0000000100000001 + 80000e18: 00083a83 ld x21,0(x16) + 80000e1c: 00880813 addi x16,x16,8 + +0000000080000e20 : +Zknh_sha256sig0_cg_cp_rs1_edges_0x100000001: + sha256sig0 x17, x21 # perform operation + 80000e20: 102a9893 sha256sig0 x17,x21 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zknh_sha256sig0_cg_cp_rs1_edges_0x100000001, Zknh_sha256sig0_cg_cp_rs1_edges_0x100000001_str) + 80000e24: 00013203 ld x4,0(x2) + 80000e28: 01120c63 beq x4,x17,80000e40 + 80000e2c: 195012ef jal x5,800027c0 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 80009a41 .word 0x80009a41 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 00810113 addi x2,x2,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x16, x0) # load rs1: x0 = 0x38184ca743cdc6f6 + 80000e44: 00083003 ld x0,0(x16) + 80000e48: 00880813 addi x16,x16,8 + +0000000080000e4c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b0: + sha256sig0 x0, x0 # perform operation + 80000e4c: 10201013 sha256sig0 x0,x0 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknh_sha256sig0_cg_cmp_rd_rs1_b0, Zknh_sha256sig0_cg_cmp_rd_rs1_b0_str) + 80000e50: 00013203 ld x4,0(x2) + 80000e54: 00020c63 beq x4,x0,80000e6c + 80000e58: 169012ef jal x5,800027c0 + 80000e5c: 80000e4c .word 0x80000e4c + 80000e60: 00000000 .word 0x00000000 + 80000e64: 80009a88 .word 0x80009a88 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xdee54b14c2b107b3 + 80000e70: 00083083 ld x1,0(x16) + 80000e74: 00880813 addi x16,x16,8 + +0000000080000e78 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b1: + sha256sig0 x1, x1 # perform operation + 80000e78: 10209093 sha256sig0 x1,x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zknh_sha256sig0_cg_cmp_rd_rs1_b1, Zknh_sha256sig0_cg_cmp_rd_rs1_b1_str) + 80000e7c: 00013203 ld x4,0(x2) + 80000e80: 00120c63 beq x4,x1,80000e98 + 80000e84: 13d012ef jal x5,800027c0 + 80000e88: 80000e78 .word 0x80000e78 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 80009ac4 .word 0x80009ac4 + 80000e94: 00000000 .word 0x00000000 + 80000e98: 00810113 addi x2,x2,8 + + mv x26, x2 # switch signature pointer register to avoid conflict with test + 80000e9c: 00010d13 addi x26,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0xeabcbb883f09264c + 80000ea0: 00083103 ld x2,0(x16) + 80000ea4: 00880813 addi x16,x16,8 + +0000000080000ea8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b2: + sha256sig0 x2, x2 # perform operation + 80000ea8: 10211113 sha256sig0 x2,x2 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zknh_sha256sig0_cg_cmp_rd_rs1_b2, Zknh_sha256sig0_cg_cmp_rd_rs1_b2_str) + 80000eac: 000d3203 ld x4,0(x26) + 80000eb0: 00220c63 beq x4,x2,80000ec8 + 80000eb4: 10d012ef jal x5,800027c0 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 80009b00 .word 0x80009b00 + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x4e8b7e45702d4c69 + 80000ecc: 00083183 ld x3,0(x16) + 80000ed0: 00880813 addi x16,x16,8 + +0000000080000ed4 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b3: + sha256sig0 x3, x3 # perform operation + 80000ed4: 10219193 sha256sig0 x3,x3 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zknh_sha256sig0_cg_cmp_rd_rs1_b3, Zknh_sha256sig0_cg_cmp_rd_rs1_b3_str) + 80000ed8: 000d3203 ld x4,0(x26) + 80000edc: 00320c63 beq x4,x3,80000ef4 + 80000ee0: 0e1012ef jal x5,800027c0 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 80009b3c .word 0x80009b3c + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 008d0d13 addi x26,x26,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000efc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x132071fd4b67c7eb + 80000f00: 00083203 ld x4,0(x16) + 80000f04: 00880813 addi x16,x16,8 + +0000000080000f08 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b4: + sha256sig0 x4, x4 # perform operation + 80000f08: 10221213 sha256sig0 x4,x4 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zknh_sha256sig0_cg_cmp_rd_rs1_b4, Zknh_sha256sig0_cg_cmp_rd_rs1_b4_str) + 80000f0c: 000d3383 ld x7,0(x26) + 80000f10: 00438c63 beq x7,x4,80000f28 + 80000f14: 0c50146f jal x8,800027d8 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 80009b78 .word 0x80009b78 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x26da0f7cf16dc925 + 80000f2c: 00083283 ld x5,0(x16) + 80000f30: 00880813 addi x16,x16,8 + +0000000080000f34 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b5: + sha256sig0 x5, x5 # perform operation + 80000f34: 10229293 sha256sig0 x5,x5 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zknh_sha256sig0_cg_cmp_rd_rs1_b5, Zknh_sha256sig0_cg_cmp_rd_rs1_b5_str) + 80000f38: 000d3383 ld x7,0(x26) + 80000f3c: 00538c63 beq x7,x5,80000f54 + 80000f40: 0990146f jal x8,800027d8 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 80009bb4 .word 0x80009bb4 + 80000f50: 00000000 .word 0x00000000 + 80000f54: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xea5c0544ce15777a + 80000f58: 00083303 ld x6,0(x16) + 80000f5c: 00880813 addi x16,x16,8 + +0000000080000f60 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b6: + sha256sig0 x6, x6 # perform operation + 80000f60: 10231313 sha256sig0 x6,x6 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zknh_sha256sig0_cg_cmp_rd_rs1_b6, Zknh_sha256sig0_cg_cmp_rd_rs1_b6_str) + 80000f64: 000d3383 ld x7,0(x26) + 80000f68: 00638c63 beq x7,x6,80000f80 + 80000f6c: 06d0146f jal x8,800027d8 + 80000f70: 80000f60 .word 0x80000f60 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 80009bf0 .word 0x80009bf0 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 008d0d13 addi x26,x26,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f84: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f88: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x3c1144d4e090daec + 80000f8c: 00083383 ld x7,0(x16) + 80000f90: 00880813 addi x16,x16,8 + +0000000080000f94 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b7: + sha256sig0 x7, x7 # perform operation + 80000f94: 10239393 sha256sig0 x7,x7 + # Check if x7 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x7, Zknh_sha256sig0_cg_cmp_rd_rs1_b7, Zknh_sha256sig0_cg_cmp_rd_rs1_b7_str) + 80000f98: 000d3203 ld x4,0(x26) + 80000f9c: 00720c63 beq x4,x7,80000fb4 + 80000fa0: 021012ef jal x5,800027c0 + 80000fa4: 80000f94 .word 0x80000f94 + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 80009c2c .word 0x80009c2c + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xc0d25cbba2816b86 + 80000fb8: 00083403 ld x8,0(x16) + 80000fbc: 00880813 addi x16,x16,8 + +0000000080000fc0 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b8: + sha256sig0 x8, x8 # perform operation + 80000fc0: 10241413 sha256sig0 x8,x8 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zknh_sha256sig0_cg_cmp_rd_rs1_b8, Zknh_sha256sig0_cg_cmp_rd_rs1_b8_str) + 80000fc4: 000d3203 ld x4,0(x26) + 80000fc8: 00820c63 beq x4,x8,80000fe0 + 80000fcc: 7f4012ef jal x5,800027c0 + 80000fd0: 80000fc0 .word 0x80000fc0 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 80009c68 .word 0x80009c68 + 80000fdc: 00000000 .word 0x00000000 + 80000fe0: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x564df66e1f2017d4 + 80000fe4: 00083483 ld x9,0(x16) + 80000fe8: 00880813 addi x16,x16,8 + +0000000080000fec : +Zknh_sha256sig0_cg_cmp_rd_rs1_b9: + sha256sig0 x9, x9 # perform operation + 80000fec: 10249493 sha256sig0 x9,x9 + # Check if x9 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x9, Zknh_sha256sig0_cg_cmp_rd_rs1_b9, Zknh_sha256sig0_cg_cmp_rd_rs1_b9_str) + 80000ff0: 000d3203 ld x4,0(x26) + 80000ff4: 00920c63 beq x4,x9,8000100c + 80000ff8: 7c8012ef jal x5,800027c0 + 80000ffc: 80000fec .word 0x80000fec + 80001000: 00000000 .word 0x00000000 + 80001004: 80009ca4 .word 0x80009ca4 + 80001008: 00000000 .word 0x00000000 + 8000100c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0xdbd476ce2efc331c + 80001010: 00083503 ld x10,0(x16) + 80001014: 00880813 addi x16,x16,8 + +0000000080001018 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b10: + sha256sig0 x10, x10 # perform operation + 80001018: 10251513 sha256sig0 x10,x10 + # Check if x10 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x10, Zknh_sha256sig0_cg_cmp_rd_rs1_b10, Zknh_sha256sig0_cg_cmp_rd_rs1_b10_str) + 8000101c: 000d3203 ld x4,0(x26) + 80001020: 00a20c63 beq x4,x10,80001038 + 80001024: 79c012ef jal x5,800027c0 + 80001028: 80001018 .word 0x80001018 + 8000102c: 00000000 .word 0x00000000 + 80001030: 80009ce0 .word 0x80009ce0 + 80001034: 00000000 .word 0x00000000 + 80001038: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0xc37b9cba1a1f73cd + 8000103c: 00083583 ld x11,0(x16) + 80001040: 00880813 addi x16,x16,8 + +0000000080001044 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b11: + sha256sig0 x11, x11 # perform operation + 80001044: 10259593 sha256sig0 x11,x11 + # Check if x11 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x11, Zknh_sha256sig0_cg_cmp_rd_rs1_b11, Zknh_sha256sig0_cg_cmp_rd_rs1_b11_str) + 80001048: 000d3203 ld x4,0(x26) + 8000104c: 00b20c63 beq x4,x11,80001064 + 80001050: 770012ef jal x5,800027c0 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 80009d1d .word 0x80009d1d + 80001060: 00000000 .word 0x00000000 + 80001064: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x6b87ac03016e3ffc + 80001068: 00083603 ld x12,0(x16) + 8000106c: 00880813 addi x16,x16,8 + +0000000080001070 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b12: + sha256sig0 x12, x12 # perform operation + 80001070: 10261613 sha256sig0 x12,x12 + # Check if x12 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x12, Zknh_sha256sig0_cg_cmp_rd_rs1_b12, Zknh_sha256sig0_cg_cmp_rd_rs1_b12_str) + 80001074: 000d3203 ld x4,0(x26) + 80001078: 00c20c63 beq x4,x12,80001090 + 8000107c: 744012ef jal x5,800027c0 + 80001080: 80001070 .word 0x80001070 + 80001084: 00000000 .word 0x00000000 + 80001088: 80009d5a .word 0x80009d5a + 8000108c: 00000000 .word 0x00000000 + 80001090: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xf9021468386bfd90 + 80001094: 00083683 ld x13,0(x16) + 80001098: 00880813 addi x16,x16,8 + +000000008000109c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b13: + sha256sig0 x13, x13 # perform operation + 8000109c: 10269693 sha256sig0 x13,x13 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zknh_sha256sig0_cg_cmp_rd_rs1_b13, Zknh_sha256sig0_cg_cmp_rd_rs1_b13_str) + 800010a0: 000d3203 ld x4,0(x26) + 800010a4: 00d20c63 beq x4,x13,800010bc + 800010a8: 718012ef jal x5,800027c0 + 800010ac: 8000109c .word 0x8000109c + 800010b0: 00000000 .word 0x00000000 + 800010b4: 80009d97 .word 0x80009d97 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xba96d22aa2ea46a7 + 800010c0: 00083703 ld x14,0(x16) + 800010c4: 00880813 addi x16,x16,8 + +00000000800010c8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b14: + sha256sig0 x14, x14 # perform operation + 800010c8: 10271713 sha256sig0 x14,x14 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zknh_sha256sig0_cg_cmp_rd_rs1_b14, Zknh_sha256sig0_cg_cmp_rd_rs1_b14_str) + 800010cc: 000d3203 ld x4,0(x26) + 800010d0: 00e20c63 beq x4,x14,800010e8 + 800010d4: 6ec012ef jal x5,800027c0 + 800010d8: 800010c8 .word 0x800010c8 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 80009dd4 .word 0x80009dd4 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x0dd1dabeaaa02c9a + 800010ec: 00083783 ld x15,0(x16) + 800010f0: 00880813 addi x16,x16,8 + +00000000800010f4 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b15: + sha256sig0 x15, x15 # perform operation + 800010f4: 10279793 sha256sig0 x15,x15 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zknh_sha256sig0_cg_cmp_rd_rs1_b15, Zknh_sha256sig0_cg_cmp_rd_rs1_b15_str) + 800010f8: 000d3203 ld x4,0(x26) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 6c0012ef jal x5,800027c0 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e11 .word 0x80009e11 + 80001110: 00000000 .word 0x00000000 + 80001114: 008d0d13 addi x26,x26,8 + + mv x29, x16 # switch data pointer register to avoid conflict with test + 80001118: 00080e93 addi x29,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x7bf616bf9cf77918 + 8000111c: 000eb803 ld x16,0(x29) + 80001120: 008e8e93 addi x29,x29,8 + +0000000080001124 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b16: + sha256sig0 x16, x16 # perform operation + 80001124: 10281813 sha256sig0 x16,x16 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zknh_sha256sig0_cg_cmp_rd_rs1_b16, Zknh_sha256sig0_cg_cmp_rd_rs1_b16_str) + 80001128: 000d3203 ld x4,0(x26) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 690012ef jal x5,800027c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009e4e .word 0x80009e4e + 80001140: 00000000 .word 0x00000000 + 80001144: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xd77b1356a2994155 + 80001148: 000eb883 ld x17,0(x29) + 8000114c: 008e8e93 addi x29,x29,8 + +0000000080001150 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b17: + sha256sig0 x17, x17 # perform operation + 80001150: 10289893 sha256sig0 x17,x17 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zknh_sha256sig0_cg_cmp_rd_rs1_b17, Zknh_sha256sig0_cg_cmp_rd_rs1_b17_str) + 80001154: 000d3203 ld x4,0(x26) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009e8b .word 0x80009e8b + 8000116c: 00000000 .word 0x00000000 + 80001170: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0xb22681dae235be29 + 80001174: 000eb903 ld x18,0(x29) + 80001178: 008e8e93 addi x29,x29,8 + +000000008000117c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b18: + sha256sig0 x18, x18 # perform operation + 8000117c: 10291913 sha256sig0 x18,x18 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zknh_sha256sig0_cg_cmp_rd_rs1_b18, Zknh_sha256sig0_cg_cmp_rd_rs1_b18_str) + 80001180: 000d3203 ld x4,0(x26) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009ec8 .word 0x80009ec8 + 80001198: 00000000 .word 0x00000000 + 8000119c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x643a97de385cea62 + 800011a0: 000eb983 ld x19,0(x29) + 800011a4: 008e8e93 addi x29,x29,8 + +00000000800011a8 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b19: + sha256sig0 x19, x19 # perform operation + 800011a8: 10299993 sha256sig0 x19,x19 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zknh_sha256sig0_cg_cmp_rd_rs1_b19, Zknh_sha256sig0_cg_cmp_rd_rs1_b19_str) + 800011ac: 000d3203 ld x4,0(x26) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009f05 .word 0x80009f05 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x9fc39ec93e732f44 + 800011cc: 000eba03 ld x20,0(x29) + 800011d0: 008e8e93 addi x29,x29,8 + +00000000800011d4 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b20: + sha256sig0 x20, x20 # perform operation + 800011d4: 102a1a13 sha256sig0 x20,x20 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zknh_sha256sig0_cg_cmp_rd_rs1_b20, Zknh_sha256sig0_cg_cmp_rd_rs1_b20_str) + 800011d8: 000d3203 ld x4,0(x26) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009f43 .word 0x80009f43 + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xc6f2cc4d7622d50e + 800011f8: 000eba83 ld x21,0(x29) + 800011fc: 008e8e93 addi x29,x29,8 + +0000000080001200 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b21: + sha256sig0 x21, x21 # perform operation + 80001200: 102a9a93 sha256sig0 x21,x21 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zknh_sha256sig0_cg_cmp_rd_rs1_b21, Zknh_sha256sig0_cg_cmp_rd_rs1_b21_str) + 80001204: 000d3203 ld x4,0(x26) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 5b4012ef jal x5,800027c0 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f81 .word 0x80009f81 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0xdc612ca85b1f265d + 80001224: 000ebb03 ld x22,0(x29) + 80001228: 008e8e93 addi x29,x29,8 + +000000008000122c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b22: + sha256sig0 x22, x22 # perform operation + 8000122c: 102b1b13 sha256sig0 x22,x22 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zknh_sha256sig0_cg_cmp_rd_rs1_b22, Zknh_sha256sig0_cg_cmp_rd_rs1_b22_str) + 80001230: 000d3203 ld x4,0(x26) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 588012ef jal x5,800027c0 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fbf .word 0x80009fbf + 80001248: 00000000 .word 0x00000000 + 8000124c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xd86867deb3ca857b + 80001250: 000ebb83 ld x23,0(x29) + 80001254: 008e8e93 addi x29,x29,8 + +0000000080001258 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b23: + sha256sig0 x23, x23 # perform operation + 80001258: 102b9b93 sha256sig0 x23,x23 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zknh_sha256sig0_cg_cmp_rd_rs1_b23, Zknh_sha256sig0_cg_cmp_rd_rs1_b23_str) + 8000125c: 000d3203 ld x4,0(x26) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 55c012ef jal x5,800027c0 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009ffd .word 0x80009ffd + 80001274: 00000000 .word 0x00000000 + 80001278: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xa0ce52a2457c39c4 + 8000127c: 000ebc03 ld x24,0(x29) + 80001280: 008e8e93 addi x29,x29,8 + +0000000080001284 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b24: + sha256sig0 x24, x24 # perform operation + 80001284: 102c1c13 sha256sig0 x24,x24 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zknh_sha256sig0_cg_cmp_rd_rs1_b24, Zknh_sha256sig0_cg_cmp_rd_rs1_b24_str) + 80001288: 000d3203 ld x4,0(x26) + 8000128c: 01820c63 beq x4,x24,800012a4 + 80001290: 530012ef jal x5,800027c0 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000a03b .word 0x8000a03b + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x1dabe1a7e327fc4c + 800012a8: 000ebc83 ld x25,0(x29) + 800012ac: 008e8e93 addi x29,x29,8 + +00000000800012b0 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b25: + sha256sig0 x25, x25 # perform operation + 800012b0: 102c9c93 sha256sig0 x25,x25 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknh_sha256sig0_cg_cmp_rd_rs1_b25, Zknh_sha256sig0_cg_cmp_rd_rs1_b25_str) + 800012b4: 000d3203 ld x4,0(x26) + 800012b8: 01920c63 beq x4,x25,800012d0 + 800012bc: 504012ef jal x5,800027c0 + 800012c0: 800012b0 .word 0x800012b0 + 800012c4: 00000000 .word 0x00000000 + 800012c8: 8000a079 .word 0x8000a079 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 008d0d13 addi x26,x26,8 + + mv x31, x26 # switch signature pointer register to avoid conflict with test + 800012d4: 000d0f93 addi x31,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x76532c48d8cbc348 + 800012d8: 000ebd03 ld x26,0(x29) + 800012dc: 008e8e93 addi x29,x29,8 + +00000000800012e0 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b26: + sha256sig0 x26, x26 # perform operation + 800012e0: 102d1d13 sha256sig0 x26,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zknh_sha256sig0_cg_cmp_rd_rs1_b26, Zknh_sha256sig0_cg_cmp_rd_rs1_b26_str) + 800012e4: 000fb203 ld x4,0(x31) + 800012e8: 01a20c63 beq x4,x26,80001300 + 800012ec: 4d4012ef jal x5,800027c0 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0b7 .word 0x8000a0b7 + 800012fc: 00000000 .word 0x00000000 + 80001300: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0xd338d28ca94685f8 + 80001304: 000ebd83 ld x27,0(x29) + 80001308: 008e8e93 addi x29,x29,8 + +000000008000130c : +Zknh_sha256sig0_cg_cmp_rd_rs1_b27: + sha256sig0 x27, x27 # perform operation + 8000130c: 102d9d93 sha256sig0 x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zknh_sha256sig0_cg_cmp_rd_rs1_b27, Zknh_sha256sig0_cg_cmp_rd_rs1_b27_str) + 80001310: 000fb203 ld x4,0(x31) + 80001314: 01b20c63 beq x4,x27,8000132c + 80001318: 4a8012ef jal x5,800027c0 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0f5 .word 0x8000a0f5 + 80001328: 00000000 .word 0x00000000 + 8000132c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0xcc4da09c679c409b + 80001330: 000ebe03 ld x28,0(x29) + 80001334: 008e8e93 addi x29,x29,8 + +0000000080001338 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b28: + sha256sig0 x28, x28 # perform operation + 80001338: 102e1e13 sha256sig0 x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknh_sha256sig0_cg_cmp_rd_rs1_b28, Zknh_sha256sig0_cg_cmp_rd_rs1_b28_str) + 8000133c: 000fb203 ld x4,0(x31) + 80001340: 01c20c63 beq x4,x28,80001358 + 80001344: 47c012ef jal x5,800027c0 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a133 .word 0x8000a133 + 80001354: 00000000 .word 0x00000000 + 80001358: 008f8f93 addi x31,x31,8 + + mv x15, x29 # switch data pointer register to avoid conflict with test + 8000135c: 000e8793 addi x15,x29,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x3713a140f4d9c19d + 80001360: 0007be83 ld x29,0(x15) + 80001364: 00878793 addi x15,x15,8 + +0000000080001368 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b29: + sha256sig0 x29, x29 # perform operation + 80001368: 102e9e93 sha256sig0 x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha256sig0_cg_cmp_rd_rs1_b29, Zknh_sha256sig0_cg_cmp_rd_rs1_b29_str) + 8000136c: 000fb203 ld x4,0(x31) + 80001370: 01d20c63 beq x4,x29,80001388 + 80001374: 44c012ef jal x5,800027c0 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 8000a171 .word 0x8000a171 + 80001384: 00000000 .word 0x00000000 + 80001388: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xa3dfeeca44c3ce88 + 8000138c: 0007bf03 ld x30,0(x15) + 80001390: 00878793 addi x15,x15,8 + +0000000080001394 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b30: + sha256sig0 x30, x30 # perform operation + 80001394: 102f1f13 sha256sig0 x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha256sig0_cg_cmp_rd_rs1_b30, Zknh_sha256sig0_cg_cmp_rd_rs1_b30_str) + 80001398: 000fb203 ld x4,0(x31) + 8000139c: 01e20c63 beq x4,x30,800013b4 + 800013a0: 420012ef jal x5,800027c0 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 8000a1af .word 0x8000a1af + 800013b0: 00000000 .word 0x00000000 + 800013b4: 008f8f93 addi x31,x31,8 + + mv x16, x31 # switch signature pointer register to avoid conflict with test + 800013b8: 000f8813 addi x16,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xbd0ab250d7190ac2 + 800013bc: 0007bf83 ld x31,0(x15) + 800013c0: 00878793 addi x15,x15,8 + +00000000800013c4 : +Zknh_sha256sig0_cg_cmp_rd_rs1_b31: + sha256sig0 x31, x31 # perform operation + 800013c4: 102f9f93 sha256sig0 x31,x31 + # Check if x31 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x31, Zknh_sha256sig0_cg_cmp_rd_rs1_b31, Zknh_sha256sig0_cg_cmp_rd_rs1_b31_str) + 800013c8: 00083203 ld x4,0(x16) + 800013cc: 01f20c63 beq x4,x31,800013e4 + 800013d0: 3f0012ef jal x5,800027c0 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 8000a1ed .word 0x8000a1ed + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00880813 addi x16,x16,8 + + mv x2, x16 # restore signature pointer to default register for teardown + 800013e8: 00080113 addi x2,x16,0 + +00000000800013ec : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013ec: 00000513 addi x10,x0,0 + 800013f0: 00000073 ecall + 800013f4: fff00513 addi x10,x0,-1 + 800013f8: 25800413 addi x8,x0,600 + +00000000800013fc : + 800013fc: 34002373 csrrs x6,mscratch,x0 + +0000000080001400 : + 80001400: 2b833383 ld x7,696(x6) + +0000000080001404 : + 80001404: 2a033383 ld x7,672(x6) + +0000000080001408 : + 80001408: 2d033483 ld x9,720(x6) + 8000140c: 34049073 csrrw x0,mscratch,x9 + +0000000080001410 : + 80001410: 2c833483 ld x9,712(x6) + 80001414: 305493f3 csrrw x7,mtvec,x9 + 80001418: ffc4f493 andi x9,x9,-4 + 8000141c: ffc3f393 andi x7,x7,-4 + 80001420: 00749e63 bne x9,x7,8000143c + +0000000080001424 : + 80001424: 00030493 addi x9,x6,0 + +0000000080001428 : + 80001428: 0004a783 lw x15,0(x9) + 8000142c: 00f3a023 sw x15,0(x7) + 80001430: 00438393 addi x7,x7,4 + 80001434: 00448493 addi x9,x9,4 + 80001438: fe83c8e3 blt x7,x8,80001428 + 8000143c: 0000100f fence.i + +0000000080001440 : + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: ccdff06f jal x0,800013ec + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca9ff06f jal x0,800013ec + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: aa030313 addi x6,x6,-1376 # 80001440 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35430313 addi x6,x6,852 # 800013ec + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33c30313 addi x6,x6,828 # 800013ec + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32430313 addi x6,x6,804 # 800013ec + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1bc78793 addi x15,x15,444 # 800013fc + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha256sig1-00.elf.objdump b/riscv-tests/rv64-Zknh-sha256sig1-00.elf.objdump new file mode 100644 index 0000000..7213d3d --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha256sig1-00.elf.objdump @@ -0,0 +1,6677 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sig1-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sig1-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008d8 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f93 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029013 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029036 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002911e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d 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0000000000000000 Vclr_Mext_int_str +000000008000b3f4 l .data 0000000000000000 Vclr_Sext_int_str +000000008000b447 l .data 0000000000000000 Vclr_Vext_int_str +000000008000bae6 l .data 0000000000000000 trap_diag_curr_xepc_str +00000000800298e0 g .data 0000000000000000 end_signature +000000008002a5c0 g .text.rvmodel 0000000000000000 rvmodel_io_write_str_c +00000000800298e0 g .data 0000000000000000 rvtest_sig_end +00000000800019d8 g .text.rvtest 0000000000000000 common_Mentry +0000000080001438 g .text.rvtest 0000000000000000 rvtest_Mend +0000000080000000 g .text.init 0000000000000000 rvtest_entry_point +000000008000c020 g .data 0000000000000000 begin_signature +0000000080008108 g .data 0000000000000000 rvtest_trap_count +00000000800013e4 g .text.rvtest 0000000000000000 rvtest_code_end +0000000080000040 g .text.rvtest 0000000000000000 rvtest_code_begin +000000008000c020 g .data 0000000000000000 rvtest_sig_begin +0000000080008470 g .data 0000000000000000 rvtest_data_begin +0000000080008110 g .data 0000000000000000 Mtramptbl_sv +000000008000c019 g .data 0000000000000000 rvtest_data_end +00000000800013e4 g .text.rvtest 0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029a00 g .tohost 0000000000000000 fromhost +0000000080029900 g .tohost 0000000000000000 tohost +00000000800016b0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xf1874a3e17ba9d06 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha256sig1_cg_cp_rs1_b0: + sha256sig1 x6, x0 # perform operation + 80000048: 10301313 sha256sig1 x6,x0 + # Check if x6 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x6, Zknh_sha256sig1_cg_cp_rs1_b0, Zknh_sha256sig1_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 00620c63 beq x4,x6,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x88cd910529e44728 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha256sig1_cg_cp_rs1_b1: + sha256sig1 x0, x1 # perform operation + 80000074: 10309013 sha256sig1 x0,x1 + # Check if x0 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x0, Zknh_sha256sig1_cg_cp_rs1_b1, Zknh_sha256sig1_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00020c63 beq x4,x0,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x9, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010493 addi x9,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xafa3e90064656d57 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha256sig1_cg_cp_rs1_b2: + sha256sig1 x1, x2 # perform operation + 800000a4: 10311093 sha256sig1 x1,x2 + # Check if x1 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x1, Zknh_sha256sig1_cg_cp_rs1_b2, Zknh_sha256sig1_cg_cp_rs1_b2_str) + 800000a8: 0004b203 ld x4,0(x9) + 800000ac: 00120c63 beq x4,x1,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00848493 addi x9,x9,8 + + mv x29, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018e93 addi x29,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0xda28cd5f76540c52 + 800000cc: 000eb183 ld x3,0(x29) + 800000d0: 008e8e93 addi x29,x29,8 + +00000000800000d4 : +Zknh_sha256sig1_cg_cp_rs1_b3: + sha256sig1 x0, x3 # perform operation + 800000d4: 10319013 sha256sig1 x0,x3 + # Check if x0 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x0, Zknh_sha256sig1_cg_cp_rs1_b3, Zknh_sha256sig1_cg_cp_rs1_b3_str) + 800000d8: 0004b203 ld x4,0(x9) + 800000dc: 00020c63 beq x4,x0,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00848493 addi x9,x9,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0xb87d21e49d867750 + 80000100: 000eb203 ld x4,0(x29) + 80000104: 008e8e93 addi x29,x29,8 + +0000000080000108 : +Zknh_sha256sig1_cg_cp_rs1_b4: + sha256sig1 x12, x4 # perform operation + 80000108: 10321613 sha256sig1 x12,x4 + # Check if x12 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x12, Zknh_sha256sig1_cg_cp_rs1_b4, Zknh_sha256sig1_cg_cp_rs1_b4_str) + 8000010c: 0004b683 ld x13,0(x9) + 80000110: 00c68c63 beq x13,x12,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0x19ad7fbf441b9de0 + 8000012c: 000eb283 ld x5,0(x29) + 80000130: 008e8e93 addi x29,x29,8 + +0000000080000134 : +Zknh_sha256sig1_cg_cp_rs1_b5: + sha256sig1 x31, x5 # perform operation + 80000134: 10329f93 sha256sig1 x31,x5 + # Check if x31 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x31, Zknh_sha256sig1_cg_cp_rs1_b5, Zknh_sha256sig1_cg_cp_rs1_b5_str) + 80000138: 0004b683 ld x13,0(x9) + 8000013c: 01f68c63 beq x13,x31,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x3017cf845595e470 + 80000158: 000eb303 ld x6,0(x29) + 8000015c: 008e8e93 addi x29,x29,8 + +0000000080000160 : +Zknh_sha256sig1_cg_cp_rs1_b6: + sha256sig1 x10, x6 # perform operation + 80000160: 10331513 sha256sig1 x10,x6 + # Check if x10 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x10, Zknh_sha256sig1_cg_cp_rs1_b6, Zknh_sha256sig1_cg_cp_rs1_b6_str) + 80000164: 0004b683 ld x13,0(x9) + 80000168: 00a68c63 beq x13,x10,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0x1c780d614f57254e + 80000184: 000eb383 ld x7,0(x29) + 80000188: 008e8e93 addi x29,x29,8 + +000000008000018c : +Zknh_sha256sig1_cg_cp_rs1_b7: + sha256sig1 x28, x7 # perform operation + 8000018c: 10339e13 sha256sig1 x28,x7 + # Check if x28 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x28, Zknh_sha256sig1_cg_cp_rs1_b7, Zknh_sha256sig1_cg_cp_rs1_b7_str) + 80000190: 0004b683 ld x13,0(x9) + 80000194: 01c68c63 beq x13,x28,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 00848493 addi x9,x9,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0x8de6c96bd50786ac + 800001b0: 000eb403 ld x8,0(x29) + 800001b4: 008e8e93 addi x29,x29,8 + +00000000800001b8 : +Zknh_sha256sig1_cg_cp_rs1_b8: + sha256sig1 x25, x8 # perform operation + 800001b8: 10341c93 sha256sig1 x25,x8 + # Check if x25 contains the expected result. x9 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x9, x14, x13, x25, Zknh_sha256sig1_cg_cp_rs1_b8, Zknh_sha256sig1_cg_cp_rs1_b8_str) + 800001bc: 0004b683 ld x13,0(x9) + 800001c0: 01968c63 beq x13,x25,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 00848493 addi x9,x9,8 + + mv x6, x9 # switch signature pointer register to avoid conflict with test + 800001dc: 00048313 addi x6,x9,0 +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x18409c0df7776f2a + 800001e0: 000eb483 ld x9,0(x29) + 800001e4: 008e8e93 addi x29,x29,8 + +00000000800001e8 : +Zknh_sha256sig1_cg_cp_rs1_b9: + sha256sig1 x19, x9 # perform operation + 800001e8: 10349993 sha256sig1 x19,x9 + # Check if x19 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x19, Zknh_sha256sig1_cg_cp_rs1_b9, Zknh_sha256sig1_cg_cp_rs1_b9_str) + 800001ec: 00033683 ld x13,0(x6) + 800001f0: 01368c63 beq x13,x19,80000208 + 800001f4: 60c0276f jal x14,80002800 + 800001f8: 800001e8 .word 0x800001e8 + 800001fc: 00000000 .word 0x00000000 + 80000200: 800089df .word 0x800089df + 80000204: 00000000 .word 0x00000000 + 80000208: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0xe3d6e2615741009c + 8000020c: 000eb503 ld x10,0(x29) + 80000210: 008e8e93 addi x29,x29,8 + +0000000080000214 : +Zknh_sha256sig1_cg_cp_rs1_b10: + sha256sig1 x9, x10 # perform operation + 80000214: 10351493 sha256sig1 x9,x10 + # Check if x9 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x9, Zknh_sha256sig1_cg_cp_rs1_b10, Zknh_sha256sig1_cg_cp_rs1_b10_str) + 80000218: 00033683 ld x13,0(x6) + 8000021c: 00968c63 beq x13,x9,80000234 + 80000220: 5e00276f jal x14,80002800 + 80000224: 80000214 .word 0x80000214 + 80000228: 00000000 .word 0x00000000 + 8000022c: 80008a17 .word 0x80008a17 + 80000230: 00000000 .word 0x00000000 + 80000234: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0x9f9ca472408728c2 + 80000238: 000eb583 ld x11,0(x29) + 8000023c: 008e8e93 addi x29,x29,8 + +0000000080000240 : +Zknh_sha256sig1_cg_cp_rs1_b11: + sha256sig1 x3, x11 # perform operation + 80000240: 10359193 sha256sig1 x3,x11 + # Check if x3 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x3, Zknh_sha256sig1_cg_cp_rs1_b11, Zknh_sha256sig1_cg_cp_rs1_b11_str) + 80000244: 00033683 ld x13,0(x6) + 80000248: 00368c63 beq x13,x3,80000260 + 8000024c: 5b40276f jal x14,80002800 + 80000250: 80000240 .word 0x80000240 + 80000254: 00000000 .word 0x00000000 + 80000258: 80008a50 .word 0x80008a50 + 8000025c: 00000000 .word 0x00000000 + 80000260: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x3792d07ba65750ef + 80000264: 000eb603 ld x12,0(x29) + 80000268: 008e8e93 addi x29,x29,8 + +000000008000026c : +Zknh_sha256sig1_cg_cp_rs1_b12: + sha256sig1 x21, x12 # perform operation + 8000026c: 10361a93 sha256sig1 x21,x12 + # Check if x21 contains the expected result. x6 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x6, x14, x13, x21, Zknh_sha256sig1_cg_cp_rs1_b12, Zknh_sha256sig1_cg_cp_rs1_b12_str) + 80000270: 00033683 ld x13,0(x6) + 80000274: 01568c63 beq x13,x21,8000028c + 80000278: 5880276f jal x14,80002800 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 80008a89 .word 0x80008a89 + 80000288: 00000000 .word 0x00000000 + 8000028c: 00830313 addi x6,x6,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000290: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000294: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x3db51655a09c4981 + 80000298: 000eb683 ld x13,0(x29) + 8000029c: 008e8e93 addi x29,x29,8 + +00000000800002a0 : +Zknh_sha256sig1_cg_cp_rs1_b13: + sha256sig1 x24, x13 # perform operation + 800002a0: 10369c13 sha256sig1 x24,x13 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zknh_sha256sig1_cg_cp_rs1_b13, Zknh_sha256sig1_cg_cp_rs1_b13_str) + 800002a4: 00033203 ld x4,0(x6) + 800002a8: 01820c63 beq x4,x24,800002c0 + 800002ac: 514022ef jal x5,800027c0 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 80008ac2 .word 0x80008ac2 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x65b57ee688ab4b45 + 800002c4: 000eb703 ld x14,0(x29) + 800002c8: 008e8e93 addi x29,x29,8 + +00000000800002cc : +Zknh_sha256sig1_cg_cp_rs1_b14: + sha256sig1 x3, x14 # perform operation + 800002cc: 10371193 sha256sig1 x3,x14 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknh_sha256sig1_cg_cp_rs1_b14, Zknh_sha256sig1_cg_cp_rs1_b14_str) + 800002d0: 00033203 ld x4,0(x6) + 800002d4: 00320c63 beq x4,x3,800002ec + 800002d8: 4e8022ef jal x5,800027c0 + 800002dc: 800002cc .word 0x800002cc + 800002e0: 00000000 .word 0x00000000 + 800002e4: 80008afb .word 0x80008afb + 800002e8: 00000000 .word 0x00000000 + 800002ec: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x074a41b4510fbaae + 800002f0: 000eb783 ld x15,0(x29) + 800002f4: 008e8e93 addi x29,x29,8 + +00000000800002f8 : +Zknh_sha256sig1_cg_cp_rs1_b15: + sha256sig1 x17, x15 # perform operation + 800002f8: 10379893 sha256sig1 x17,x15 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zknh_sha256sig1_cg_cp_rs1_b15, Zknh_sha256sig1_cg_cp_rs1_b15_str) + 800002fc: 00033203 ld x4,0(x6) + 80000300: 01120c63 beq x4,x17,80000318 + 80000304: 4bc022ef jal x5,800027c0 + 80000308: 800002f8 .word 0x800002f8 + 8000030c: 00000000 .word 0x00000000 + 80000310: 80008b34 .word 0x80008b34 + 80000314: 00000000 .word 0x00000000 + 80000318: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x7857fec9a37e91c7 + 8000031c: 000eb803 ld x16,0(x29) + 80000320: 008e8e93 addi x29,x29,8 + +0000000080000324 : +Zknh_sha256sig1_cg_cp_rs1_b16: + sha256sig1 x14, x16 # perform operation + 80000324: 10381713 sha256sig1 x14,x16 + # Check if x14 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x14, Zknh_sha256sig1_cg_cp_rs1_b16, Zknh_sha256sig1_cg_cp_rs1_b16_str) + 80000328: 00033203 ld x4,0(x6) + 8000032c: 00e20c63 beq x4,x14,80000344 + 80000330: 490022ef jal x5,800027c0 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b6d .word 0x80008b6d + 80000340: 00000000 .word 0x00000000 + 80000344: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0xdc9baf36d9a57275 + 80000348: 000eb883 ld x17,0(x29) + 8000034c: 008e8e93 addi x29,x29,8 + +0000000080000350 : +Zknh_sha256sig1_cg_cp_rs1_b17: + sha256sig1 x30, x17 # perform operation + 80000350: 10389f13 sha256sig1 x30,x17 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_b17, Zknh_sha256sig1_cg_cp_rs1_b17_str) + 80000354: 00033203 ld x4,0(x6) + 80000358: 01e20c63 beq x4,x30,80000370 + 8000035c: 464022ef jal x5,800027c0 + 80000360: 80000350 .word 0x80000350 + 80000364: 00000000 .word 0x00000000 + 80000368: 80008ba6 .word 0x80008ba6 + 8000036c: 00000000 .word 0x00000000 + 80000370: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0xcda884972fd1d9ef + 80000374: 000eb903 ld x18,0(x29) + 80000378: 008e8e93 addi x29,x29,8 + +000000008000037c : +Zknh_sha256sig1_cg_cp_rs1_b18: + sha256sig1 x15, x18 # perform operation + 8000037c: 10391793 sha256sig1 x15,x18 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zknh_sha256sig1_cg_cp_rs1_b18, Zknh_sha256sig1_cg_cp_rs1_b18_str) + 80000380: 00033203 ld x4,0(x6) + 80000384: 00f20c63 beq x4,x15,8000039c + 80000388: 438022ef jal x5,800027c0 + 8000038c: 8000037c .word 0x8000037c + 80000390: 00000000 .word 0x00000000 + 80000394: 80008bdf .word 0x80008bdf + 80000398: 00000000 .word 0x00000000 + 8000039c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x6111358fa781f32b + 800003a0: 000eb983 ld x19,0(x29) + 800003a4: 008e8e93 addi x29,x29,8 + +00000000800003a8 : +Zknh_sha256sig1_cg_cp_rs1_b19: + sha256sig1 x0, x19 # perform operation + 800003a8: 10399013 sha256sig1 x0,x19 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zknh_sha256sig1_cg_cp_rs1_b19, Zknh_sha256sig1_cg_cp_rs1_b19_str) + 800003ac: 00033203 ld x4,0(x6) + 800003b0: 00020c63 beq x4,x0,800003c8 + 800003b4: 40c022ef jal x5,800027c0 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 80008c18 .word 0x80008c18 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0xcc7b4e5fba2bd762 + 800003cc: 000eba03 ld x20,0(x29) + 800003d0: 008e8e93 addi x29,x29,8 + +00000000800003d4 : +Zknh_sha256sig1_cg_cp_rs1_b20: + sha256sig1 x18, x20 # perform operation + 800003d4: 103a1913 sha256sig1 x18,x20 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zknh_sha256sig1_cg_cp_rs1_b20, Zknh_sha256sig1_cg_cp_rs1_b20_str) + 800003d8: 00033203 ld x4,0(x6) + 800003dc: 01220c63 beq x4,x18,800003f4 + 800003e0: 3e0022ef jal x5,800027c0 + 800003e4: 800003d4 .word 0x800003d4 + 800003e8: 00000000 .word 0x00000000 + 800003ec: 80008c51 .word 0x80008c51 + 800003f0: 00000000 .word 0x00000000 + 800003f4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0x7932baa5a68b88df + 800003f8: 000eba83 ld x21,0(x29) + 800003fc: 008e8e93 addi x29,x29,8 + +0000000080000400 : +Zknh_sha256sig1_cg_cp_rs1_b21: + sha256sig1 x17, x21 # perform operation + 80000400: 103a9893 sha256sig1 x17,x21 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zknh_sha256sig1_cg_cp_rs1_b21, Zknh_sha256sig1_cg_cp_rs1_b21_str) + 80000404: 00033203 ld x4,0(x6) + 80000408: 01120c63 beq x4,x17,80000420 + 8000040c: 3b4022ef jal x5,800027c0 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c8a .word 0x80008c8a + 8000041c: 00000000 .word 0x00000000 + 80000420: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0x2a68b125003ea6c9 + 80000424: 000ebb03 ld x22,0(x29) + 80000428: 008e8e93 addi x29,x29,8 + +000000008000042c : +Zknh_sha256sig1_cg_cp_rs1_b22: + sha256sig1 x12, x22 # perform operation + 8000042c: 103b1613 sha256sig1 x12,x22 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zknh_sha256sig1_cg_cp_rs1_b22, Zknh_sha256sig1_cg_cp_rs1_b22_str) + 80000430: 00033203 ld x4,0(x6) + 80000434: 00c20c63 beq x4,x12,8000044c + 80000438: 388022ef jal x5,800027c0 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008cc3 .word 0x80008cc3 + 80000448: 00000000 .word 0x00000000 + 8000044c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0xe59f061a1f1f27df + 80000450: 000ebb83 ld x23,0(x29) + 80000454: 008e8e93 addi x29,x29,8 + +0000000080000458 : +Zknh_sha256sig1_cg_cp_rs1_b23: + sha256sig1 x0, x23 # perform operation + 80000458: 103b9013 sha256sig1 x0,x23 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zknh_sha256sig1_cg_cp_rs1_b23, Zknh_sha256sig1_cg_cp_rs1_b23_str) + 8000045c: 00033203 ld x4,0(x6) + 80000460: 00020c63 beq x4,x0,80000478 + 80000464: 35c022ef jal x5,800027c0 + 80000468: 80000458 .word 0x80000458 + 8000046c: 00000000 .word 0x00000000 + 80000470: 80008cfc .word 0x80008cfc + 80000474: 00000000 .word 0x00000000 + 80000478: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xcf84fd6005e6dec9 + 8000047c: 000ebc03 ld x24,0(x29) + 80000480: 008e8e93 addi x29,x29,8 + +0000000080000484 : +Zknh_sha256sig1_cg_cp_rs1_b24: + sha256sig1 x23, x24 # perform operation + 80000484: 103c1b93 sha256sig1 x23,x24 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_b24, Zknh_sha256sig1_cg_cp_rs1_b24_str) + 80000488: 00033203 ld x4,0(x6) + 8000048c: 01720c63 beq x4,x23,800004a4 + 80000490: 330022ef jal x5,800027c0 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 80008d35 .word 0x80008d35 + 800004a0: 00000000 .word 0x00000000 + 800004a4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x5b862d975ba71cc2 + 800004a8: 000ebc83 ld x25,0(x29) + 800004ac: 008e8e93 addi x29,x29,8 + +00000000800004b0 : +Zknh_sha256sig1_cg_cp_rs1_b25: + sha256sig1 x23, x25 # perform operation + 800004b0: 103c9b93 sha256sig1 x23,x25 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_b25, Zknh_sha256sig1_cg_cp_rs1_b25_str) + 800004b4: 00033203 ld x4,0(x6) + 800004b8: 01720c63 beq x4,x23,800004d0 + 800004bc: 304022ef jal x5,800027c0 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 80008d6e .word 0x80008d6e + 800004cc: 00000000 .word 0x00000000 + 800004d0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0xd934c9c09d1784e9 + 800004d4: 000ebd03 ld x26,0(x29) + 800004d8: 008e8e93 addi x29,x29,8 + +00000000800004dc : +Zknh_sha256sig1_cg_cp_rs1_b26: + sha256sig1 x12, x26 # perform operation + 800004dc: 103d1613 sha256sig1 x12,x26 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zknh_sha256sig1_cg_cp_rs1_b26, Zknh_sha256sig1_cg_cp_rs1_b26_str) + 800004e0: 00033203 ld x4,0(x6) + 800004e4: 00c20c63 beq x4,x12,800004fc + 800004e8: 2d8022ef jal x5,800027c0 + 800004ec: 800004dc .word 0x800004dc + 800004f0: 00000000 .word 0x00000000 + 800004f4: 80008da7 .word 0x80008da7 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x137b24f18cd8ef50 + 80000500: 000ebd83 ld x27,0(x29) + 80000504: 008e8e93 addi x29,x29,8 + +0000000080000508 : +Zknh_sha256sig1_cg_cp_rs1_b27: + sha256sig1 x13, x27 # perform operation + 80000508: 103d9693 sha256sig1 x13,x27 + # Check if x13 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x13, Zknh_sha256sig1_cg_cp_rs1_b27, Zknh_sha256sig1_cg_cp_rs1_b27_str) + 8000050c: 00033203 ld x4,0(x6) + 80000510: 00d20c63 beq x4,x13,80000528 + 80000514: 2ac022ef jal x5,800027c0 + 80000518: 80000508 .word 0x80000508 + 8000051c: 00000000 .word 0x00000000 + 80000520: 80008de0 .word 0x80008de0 + 80000524: 00000000 .word 0x00000000 + 80000528: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x276c0ec106ca84d4 + 8000052c: 000ebe03 ld x28,0(x29) + 80000530: 008e8e93 addi x29,x29,8 + +0000000080000534 : +Zknh_sha256sig1_cg_cp_rs1_b28: + sha256sig1 x21, x28 # perform operation + 80000534: 103e1a93 sha256sig1 x21,x28 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zknh_sha256sig1_cg_cp_rs1_b28, Zknh_sha256sig1_cg_cp_rs1_b28_str) + 80000538: 00033203 ld x4,0(x6) + 8000053c: 01520c63 beq x4,x21,80000554 + 80000540: 280022ef jal x5,800027c0 + 80000544: 80000534 .word 0x80000534 + 80000548: 00000000 .word 0x00000000 + 8000054c: 80008e19 .word 0x80008e19 + 80000550: 00000000 .word 0x00000000 + 80000554: 00830313 addi x6,x6,8 + + mv x17, x29 # switch data pointer register to avoid conflict with test + 80000558: 000e8893 addi x17,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x55140e4f9d3eb17f + 8000055c: 0008be83 ld x29,0(x17) + 80000560: 00888893 addi x17,x17,8 + +0000000080000564 : +Zknh_sha256sig1_cg_cp_rs1_b29: + sha256sig1 x9, x29 # perform operation + 80000564: 103e9493 sha256sig1 x9,x29 + # Check if x9 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x9, Zknh_sha256sig1_cg_cp_rs1_b29, Zknh_sha256sig1_cg_cp_rs1_b29_str) + 80000568: 00033203 ld x4,0(x6) + 8000056c: 00920c63 beq x4,x9,80000584 + 80000570: 250022ef jal x5,800027c0 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008e52 .word 0x80008e52 + 80000580: 00000000 .word 0x00000000 + 80000584: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x2c0963daed2789c6 + 80000588: 0008bf03 ld x30,0(x17) + 8000058c: 00888893 addi x17,x17,8 + +0000000080000590 : +Zknh_sha256sig1_cg_cp_rs1_b30: + sha256sig1 x12, x30 # perform operation + 80000590: 103f1613 sha256sig1 x12,x30 + # Check if x12 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x12, Zknh_sha256sig1_cg_cp_rs1_b30, Zknh_sha256sig1_cg_cp_rs1_b30_str) + 80000594: 00033203 ld x4,0(x6) + 80000598: 00c20c63 beq x4,x12,800005b0 + 8000059c: 224022ef jal x5,800027c0 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008e8b .word 0x80008e8b + 800005ac: 00000000 .word 0x00000000 + 800005b0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x30cb9ecde989ce1f + 800005b4: 0008bf83 ld x31,0(x17) + 800005b8: 00888893 addi x17,x17,8 + +00000000800005bc : +Zknh_sha256sig1_cg_cp_rs1_b31: + sha256sig1 x15, x31 # perform operation + 800005bc: 103f9793 sha256sig1 x15,x31 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zknh_sha256sig1_cg_cp_rs1_b31, Zknh_sha256sig1_cg_cp_rs1_b31_str) + 800005c0: 00033203 ld x4,0(x6) + 800005c4: 00f20c63 beq x4,x15,800005dc + 800005c8: 1f8022ef jal x5,800027c0 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 80008ec4 .word 0x80008ec4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x22f5d0bb654fd7b0 + 800005e0: 0008be83 ld x29,0(x17) + 800005e4: 00888893 addi x17,x17,8 + +00000000800005e8 : +Zknh_sha256sig1_cg_cp_rd_b0: + sha256sig1 x0, x29 # perform operation + 800005e8: 103e9013 sha256sig1 x0,x29 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zknh_sha256sig1_cg_cp_rd_b0, Zknh_sha256sig1_cg_cp_rd_b0_str) + 800005ec: 00033203 ld x4,0(x6) + 800005f0: 00020c63 beq x4,x0,80000608 + 800005f4: 1cc022ef jal x5,800027c0 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 80008efd .word 0x80008efd + 80000604: 00000000 .word 0x00000000 + 80000608: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0xe445d8ce0bf1fa12 + 8000060c: 0008bc03 ld x24,0(x17) + 80000610: 00888893 addi x17,x17,8 + +0000000080000614 : +Zknh_sha256sig1_cg_cp_rd_b1: + sha256sig1 x1, x24 # perform operation + 80000614: 103c1093 sha256sig1 x1,x24 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zknh_sha256sig1_cg_cp_rd_b1, Zknh_sha256sig1_cg_cp_rd_b1_str) + 80000618: 00033203 ld x4,0(x6) + 8000061c: 00120c63 beq x4,x1,80000634 + 80000620: 1a0022ef jal x5,800027c0 + 80000624: 80000614 .word 0x80000614 + 80000628: 00000000 .word 0x00000000 + 8000062c: 80008f34 .word 0x80008f34 + 80000630: 00000000 .word 0x00000000 + 80000634: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xcd7b846c0f71184d + 80000638: 0008b703 ld x14,0(x17) + 8000063c: 00888893 addi x17,x17,8 + +0000000080000640 : +Zknh_sha256sig1_cg_cp_rd_b2: + sha256sig1 x2, x14 # perform operation + 80000640: 10371113 sha256sig1 x2,x14 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zknh_sha256sig1_cg_cp_rd_b2, Zknh_sha256sig1_cg_cp_rd_b2_str) + 80000644: 00033203 ld x4,0(x6) + 80000648: 00220c63 beq x4,x2,80000660 + 8000064c: 174022ef jal x5,800027c0 + 80000650: 80000640 .word 0x80000640 + 80000654: 00000000 .word 0x00000000 + 80000658: 80008f6b .word 0x80008f6b + 8000065c: 00000000 .word 0x00000000 + 80000660: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x278b7ad1dd72dc3d + 80000664: 0008bc83 ld x25,0(x17) + 80000668: 00888893 addi x17,x17,8 + +000000008000066c : +Zknh_sha256sig1_cg_cp_rd_b3: + sha256sig1 x3, x25 # perform operation + 8000066c: 103c9193 sha256sig1 x3,x25 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknh_sha256sig1_cg_cp_rd_b3, Zknh_sha256sig1_cg_cp_rd_b3_str) + 80000670: 00033203 ld x4,0(x6) + 80000674: 00320c63 beq x4,x3,8000068c + 80000678: 148022ef jal x5,800027c0 + 8000067c: 8000066c .word 0x8000066c + 80000680: 00000000 .word 0x00000000 + 80000684: 80008fa2 .word 0x80008fa2 + 80000688: 00000000 .word 0x00000000 + 8000068c: 00830313 addi x6,x6,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000690: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000694: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x8e5bc678694241d0 + 80000698: 0008bb83 ld x23,0(x17) + 8000069c: 00888893 addi x17,x17,8 + +00000000800006a0 : +Zknh_sha256sig1_cg_cp_rd_b4: + sha256sig1 x4, x23 # perform operation + 800006a0: 103b9213 sha256sig1 x4,x23 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zknh_sha256sig1_cg_cp_rd_b4, Zknh_sha256sig1_cg_cp_rd_b4_str) + 800006a4: 00033383 ld x7,0(x6) + 800006a8: 00438c63 beq x7,x4,800006c0 + 800006ac: 12c0246f jal x8,800027d8 + 800006b0: 800006a0 .word 0x800006a0 + 800006b4: 00000000 .word 0x00000000 + 800006b8: 80008fd9 .word 0x80008fd9 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x9527911d010e3e7d + 800006c4: 0008bd03 ld x26,0(x17) + 800006c8: 00888893 addi x17,x17,8 + +00000000800006cc : +Zknh_sha256sig1_cg_cp_rd_b5: + sha256sig1 x5, x26 # perform operation + 800006cc: 103d1293 sha256sig1 x5,x26 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zknh_sha256sig1_cg_cp_rd_b5, Zknh_sha256sig1_cg_cp_rd_b5_str) + 800006d0: 00033383 ld x7,0(x6) + 800006d4: 00538c63 beq x7,x5,800006ec + 800006d8: 1000246f jal x8,800027d8 + 800006dc: 800006cc .word 0x800006cc + 800006e0: 00000000 .word 0x00000000 + 800006e4: 80009010 .word 0x80009010 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 00830313 addi x6,x6,8 + + mv x15, x6 # switch signature pointer register to avoid conflict with test + 800006f0: 00030793 addi x15,x6,0 +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xf2a7e9aaacf3cc9b + 800006f4: 0008b483 ld x9,0(x17) + 800006f8: 00888893 addi x17,x17,8 + +00000000800006fc : +Zknh_sha256sig1_cg_cp_rd_b6: + sha256sig1 x6, x9 # perform operation + 800006fc: 10349313 sha256sig1 x6,x9 + # Check if x6 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x6, Zknh_sha256sig1_cg_cp_rd_b6, Zknh_sha256sig1_cg_cp_rd_b6_str) + 80000700: 0007b383 ld x7,0(x15) + 80000704: 00638c63 beq x7,x6,8000071c + 80000708: 0d00246f jal x8,800027d8 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80009047 .word 0x80009047 + 80000718: 00000000 .word 0x00000000 + 8000071c: 00878793 addi x15,x15,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000724: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xced46b6833b5eb44 + 80000728: 0008bb03 ld x22,0(x17) + 8000072c: 00888893 addi x17,x17,8 + +0000000080000730 : +Zknh_sha256sig1_cg_cp_rd_b7: + sha256sig1 x7, x22 # perform operation + 80000730: 103b1393 sha256sig1 x7,x22 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zknh_sha256sig1_cg_cp_rd_b7, Zknh_sha256sig1_cg_cp_rd_b7_str) + 80000734: 0007b203 ld x4,0(x15) + 80000738: 00720c63 beq x4,x7,80000750 + 8000073c: 084022ef jal x5,800027c0 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 8000907e .word 0x8000907e + 8000074c: 00000000 .word 0x00000000 + 80000750: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xbecbd070ba9ef6a4 + 80000754: 0008b683 ld x13,0(x17) + 80000758: 00888893 addi x17,x17,8 + +000000008000075c : +Zknh_sha256sig1_cg_cp_rd_b8: + sha256sig1 x8, x13 # perform operation + 8000075c: 10369413 sha256sig1 x8,x13 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zknh_sha256sig1_cg_cp_rd_b8, Zknh_sha256sig1_cg_cp_rd_b8_str) + 80000760: 0007b203 ld x4,0(x15) + 80000764: 00820c63 beq x4,x8,8000077c + 80000768: 058022ef jal x5,800027c0 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 800090b5 .word 0x800090b5 + 80000778: 00000000 .word 0x00000000 + 8000077c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x92106a0a6fa2e794 + 80000780: 0008b403 ld x8,0(x17) + 80000784: 00888893 addi x17,x17,8 + +0000000080000788 : +Zknh_sha256sig1_cg_cp_rd_b9: + sha256sig1 x9, x8 # perform operation + 80000788: 10341493 sha256sig1 x9,x8 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zknh_sha256sig1_cg_cp_rd_b9, Zknh_sha256sig1_cg_cp_rd_b9_str) + 8000078c: 0007b203 ld x4,0(x15) + 80000790: 00920c63 beq x4,x9,800007a8 + 80000794: 02c022ef jal x5,800027c0 + 80000798: 80000788 .word 0x80000788 + 8000079c: 00000000 .word 0x00000000 + 800007a0: 800090ec .word 0x800090ec + 800007a4: 00000000 .word 0x00000000 + 800007a8: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7bab3123303d3229 + 800007ac: 0008b583 ld x11,0(x17) + 800007b0: 00888893 addi x17,x17,8 + +00000000800007b4 : +Zknh_sha256sig1_cg_cp_rd_b10: + sha256sig1 x10, x11 # perform operation + 800007b4: 10359513 sha256sig1 x10,x11 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zknh_sha256sig1_cg_cp_rd_b10, Zknh_sha256sig1_cg_cp_rd_b10_str) + 800007b8: 0007b203 ld x4,0(x15) + 800007bc: 00a20c63 beq x4,x10,800007d4 + 800007c0: 000022ef jal x5,800027c0 + 800007c4: 800007b4 .word 0x800007b4 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 80009123 .word 0x80009123 + 800007d0: 00000000 .word 0x00000000 + 800007d4: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x29e2247f6a071d84 + 800007d8: 0008b503 ld x10,0(x17) + 800007dc: 00888893 addi x17,x17,8 + +00000000800007e0 : +Zknh_sha256sig1_cg_cp_rd_b11: + sha256sig1 x11, x10 # perform operation + 800007e0: 10351593 sha256sig1 x11,x10 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zknh_sha256sig1_cg_cp_rd_b11, Zknh_sha256sig1_cg_cp_rd_b11_str) + 800007e4: 0007b203 ld x4,0(x15) + 800007e8: 00b20c63 beq x4,x11,80000800 + 800007ec: 7d5012ef jal x5,800027c0 + 800007f0: 800007e0 .word 0x800007e0 + 800007f4: 00000000 .word 0x00000000 + 800007f8: 8000915b .word 0x8000915b + 800007fc: 00000000 .word 0x00000000 + 80000800: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x3f442dd7038f6d56 + 80000804: 0008ba03 ld x20,0(x17) + 80000808: 00888893 addi x17,x17,8 + +000000008000080c : +Zknh_sha256sig1_cg_cp_rd_b12: + sha256sig1 x12, x20 # perform operation + 8000080c: 103a1613 sha256sig1 x12,x20 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zknh_sha256sig1_cg_cp_rd_b12, Zknh_sha256sig1_cg_cp_rd_b12_str) + 80000810: 0007b203 ld x4,0(x15) + 80000814: 00c20c63 beq x4,x12,8000082c + 80000818: 7a9012ef jal x5,800027c0 + 8000081c: 8000080c .word 0x8000080c + 80000820: 00000000 .word 0x00000000 + 80000824: 80009193 .word 0x80009193 + 80000828: 00000000 .word 0x00000000 + 8000082c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xc1abb1c69033dbbd + 80000830: 0008b403 ld x8,0(x17) + 80000834: 00888893 addi x17,x17,8 + +0000000080000838 : +Zknh_sha256sig1_cg_cp_rd_b13: + sha256sig1 x13, x8 # perform operation + 80000838: 10341693 sha256sig1 x13,x8 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zknh_sha256sig1_cg_cp_rd_b13, Zknh_sha256sig1_cg_cp_rd_b13_str) + 8000083c: 0007b203 ld x4,0(x15) + 80000840: 00d20c63 beq x4,x13,80000858 + 80000844: 77d012ef jal x5,800027c0 + 80000848: 80000838 .word 0x80000838 + 8000084c: 00000000 .word 0x00000000 + 80000850: 800091cb .word 0x800091cb + 80000854: 00000000 .word 0x00000000 + 80000858: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0xedfb30da1523563d + 8000085c: 0008ba83 ld x21,0(x17) + 80000860: 00888893 addi x17,x17,8 + +0000000080000864 : +Zknh_sha256sig1_cg_cp_rd_b14: + sha256sig1 x14, x21 # perform operation + 80000864: 103a9713 sha256sig1 x14,x21 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zknh_sha256sig1_cg_cp_rd_b14, Zknh_sha256sig1_cg_cp_rd_b14_str) + 80000868: 0007b203 ld x4,0(x15) + 8000086c: 00e20c63 beq x4,x14,80000884 + 80000870: 751012ef jal x5,800027c0 + 80000874: 80000864 .word 0x80000864 + 80000878: 00000000 .word 0x00000000 + 8000087c: 80009203 .word 0x80009203 + 80000880: 00000000 .word 0x00000000 + 80000884: 00878793 addi x15,x15,8 + + mv x12, x15 # switch signature pointer register to avoid conflict with test + 80000888: 00078613 addi x12,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xeb86612f2a8a5bcd + 8000088c: 0008bb83 ld x23,0(x17) + 80000890: 00888893 addi x17,x17,8 + +0000000080000894 : +Zknh_sha256sig1_cg_cp_rd_b15: + sha256sig1 x15, x23 # perform operation + 80000894: 103b9793 sha256sig1 x15,x23 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zknh_sha256sig1_cg_cp_rd_b15, Zknh_sha256sig1_cg_cp_rd_b15_str) + 80000898: 00063203 ld x4,0(x12) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 721012ef jal x5,800027c0 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 8000923b .word 0x8000923b + 800008b0: 00000000 .word 0x00000000 + 800008b4: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x990b06e5c79d0d65 + 800008b8: 0008bb83 ld x23,0(x17) + 800008bc: 00888893 addi x17,x17,8 + +00000000800008c0 : +Zknh_sha256sig1_cg_cp_rd_b16: + sha256sig1 x16, x23 # perform operation + 800008c0: 103b9813 sha256sig1 x16,x23 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zknh_sha256sig1_cg_cp_rd_b16, Zknh_sha256sig1_cg_cp_rd_b16_str) + 800008c4: 00063203 ld x4,0(x12) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 6f5012ef jal x5,800027c0 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 80009273 .word 0x80009273 + 800008dc: 00000000 .word 0x00000000 + 800008e0: 00860613 addi x12,x12,8 + + mv x27, x17 # switch data pointer register to avoid conflict with test + 800008e4: 00088d93 addi x27,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0xd28976f12b933748 + 800008e8: 000db403 ld x8,0(x27) + 800008ec: 008d8d93 addi x27,x27,8 + +00000000800008f0 : +Zknh_sha256sig1_cg_cp_rd_b17: + sha256sig1 x17, x8 # perform operation + 800008f0: 10341893 sha256sig1 x17,x8 + # Check if x17 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x17, Zknh_sha256sig1_cg_cp_rd_b17, Zknh_sha256sig1_cg_cp_rd_b17_str) + 800008f4: 00063203 ld x4,0(x12) + 800008f8: 01120c63 beq x4,x17,80000910 + 800008fc: 6c5012ef jal x5,800027c0 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800092ab .word 0x800092ab + 8000090c: 00000000 .word 0x00000000 + 80000910: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xcc8c3cc6ec4607f4 + 80000914: 000dbd03 ld x26,0(x27) + 80000918: 008d8d93 addi x27,x27,8 + +000000008000091c : +Zknh_sha256sig1_cg_cp_rd_b18: + sha256sig1 x18, x26 # perform operation + 8000091c: 103d1913 sha256sig1 x18,x26 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknh_sha256sig1_cg_cp_rd_b18, Zknh_sha256sig1_cg_cp_rd_b18_str) + 80000920: 00063203 ld x4,0(x12) + 80000924: 01220c63 beq x4,x18,8000093c + 80000928: 699012ef jal x5,800027c0 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800092e3 .word 0x800092e3 + 80000938: 00000000 .word 0x00000000 + 8000093c: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xdb0ac8ec6c8816d3 + 80000940: 000dba03 ld x20,0(x27) + 80000944: 008d8d93 addi x27,x27,8 + +0000000080000948 : +Zknh_sha256sig1_cg_cp_rd_b19: + sha256sig1 x19, x20 # perform operation + 80000948: 103a1993 sha256sig1 x19,x20 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknh_sha256sig1_cg_cp_rd_b19, Zknh_sha256sig1_cg_cp_rd_b19_str) + 8000094c: 00063203 ld x4,0(x12) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000931b .word 0x8000931b + 80000964: 00000000 .word 0x00000000 + 80000968: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x3c99c3c04d7576ce + 8000096c: 000dba83 ld x21,0(x27) + 80000970: 008d8d93 addi x27,x27,8 + +0000000080000974 : +Zknh_sha256sig1_cg_cp_rd_b20: + sha256sig1 x20, x21 # perform operation + 80000974: 103a9a13 sha256sig1 x20,x21 + # Check if x20 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x20, Zknh_sha256sig1_cg_cp_rd_b20, Zknh_sha256sig1_cg_cp_rd_b20_str) + 80000978: 00063203 ld x4,0(x12) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x17baa0a6121feb2e + 80000998: 000db683 ld x13,0(x27) + 8000099c: 008d8d93 addi x27,x27,8 + +00000000800009a0 : +Zknh_sha256sig1_cg_cp_rd_b21: + sha256sig1 x21, x13 # perform operation + 800009a0: 10369a93 sha256sig1 x21,x13 + # Check if x21 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x21, Zknh_sha256sig1_cg_cp_rd_b21, Zknh_sha256sig1_cg_cp_rd_b21_str) + 800009a4: 00063203 ld x4,0(x12) + 800009a8: 01520c63 beq x4,x21,800009c0 + 800009ac: 615012ef jal x5,800027c0 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000938b .word 0x8000938b + 800009bc: 00000000 .word 0x00000000 + 800009c0: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x843c985d723f9df0 + 800009c4: 000dbf03 ld x30,0(x27) + 800009c8: 008d8d93 addi x27,x27,8 + +00000000800009cc : +Zknh_sha256sig1_cg_cp_rd_b22: + sha256sig1 x22, x30 # perform operation + 800009cc: 103f1b13 sha256sig1 x22,x30 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknh_sha256sig1_cg_cp_rd_b22, Zknh_sha256sig1_cg_cp_rd_b22_str) + 800009d0: 00063203 ld x4,0(x12) + 800009d4: 01620c63 beq x4,x22,800009ec + 800009d8: 5e9012ef jal x5,800027c0 + 800009dc: 800009cc .word 0x800009cc + 800009e0: 00000000 .word 0x00000000 + 800009e4: 800093c3 .word 0x800093c3 + 800009e8: 00000000 .word 0x00000000 + 800009ec: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0xa71a255206f85dd6 + 800009f0: 000db903 ld x18,0(x27) + 800009f4: 008d8d93 addi x27,x27,8 + +00000000800009f8 : +Zknh_sha256sig1_cg_cp_rd_b23: + sha256sig1 x23, x18 # perform operation + 800009f8: 10391b93 sha256sig1 x23,x18 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknh_sha256sig1_cg_cp_rd_b23, Zknh_sha256sig1_cg_cp_rd_b23_str) + 800009fc: 00063203 ld x4,0(x12) + 80000a00: 01720c63 beq x4,x23,80000a18 + 80000a04: 5bd012ef jal x5,800027c0 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 800093fb .word 0x800093fb + 80000a14: 00000000 .word 0x00000000 + 80000a18: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0xa9f55b6cda556531 + 80000a1c: 000db303 ld x6,0(x27) + 80000a20: 008d8d93 addi x27,x27,8 + +0000000080000a24 : +Zknh_sha256sig1_cg_cp_rd_b24: + sha256sig1 x24, x6 # perform operation + 80000a24: 10331c13 sha256sig1 x24,x6 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknh_sha256sig1_cg_cp_rd_b24, Zknh_sha256sig1_cg_cp_rd_b24_str) + 80000a28: 00063203 ld x4,0(x12) + 80000a2c: 01820c63 beq x4,x24,80000a44 + 80000a30: 591012ef jal x5,800027c0 + 80000a34: 80000a24 .word 0x80000a24 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 80009433 .word 0x80009433 + 80000a40: 00000000 .word 0x00000000 + 80000a44: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xe6754950332bc035 + 80000a48: 000dbc03 ld x24,0(x27) + 80000a4c: 008d8d93 addi x27,x27,8 + +0000000080000a50 : +Zknh_sha256sig1_cg_cp_rd_b25: + sha256sig1 x25, x24 # perform operation + 80000a50: 103c1c93 sha256sig1 x25,x24 + # Check if x25 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x25, Zknh_sha256sig1_cg_cp_rd_b25, Zknh_sha256sig1_cg_cp_rd_b25_str) + 80000a54: 00063203 ld x4,0(x12) + 80000a58: 01920c63 beq x4,x25,80000a70 + 80000a5c: 565012ef jal x5,800027c0 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000946b .word 0x8000946b + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x4b5162859b57ad05 + 80000a74: 000db903 ld x18,0(x27) + 80000a78: 008d8d93 addi x27,x27,8 + +0000000080000a7c : +Zknh_sha256sig1_cg_cp_rd_b26: + sha256sig1 x26, x18 # perform operation + 80000a7c: 10391d13 sha256sig1 x26,x18 + # Check if x26 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x26, Zknh_sha256sig1_cg_cp_rd_b26, Zknh_sha256sig1_cg_cp_rd_b26_str) + 80000a80: 00063203 ld x4,0(x12) + 80000a84: 01a20c63 beq x4,x26,80000a9c + 80000a88: 539012ef jal x5,800027c0 + 80000a8c: 80000a7c .word 0x80000a7c + 80000a90: 00000000 .word 0x00000000 + 80000a94: 800094a3 .word 0x800094a3 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 00860613 addi x12,x12,8 + + mv x1, x27 # switch data pointer register to avoid conflict with test + 80000aa0: 000d8093 addi x1,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x171440ee3c782e37 + 80000aa4: 0000b803 ld x16,0(x1) + 80000aa8: 00808093 addi x1,x1,8 + +0000000080000aac : +Zknh_sha256sig1_cg_cp_rd_b27: + sha256sig1 x27, x16 # perform operation + 80000aac: 10381d93 sha256sig1 x27,x16 + # Check if x27 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x27, Zknh_sha256sig1_cg_cp_rd_b27, Zknh_sha256sig1_cg_cp_rd_b27_str) + 80000ab0: 00063203 ld x4,0(x12) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 509012ef jal x5,800027c0 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094db .word 0x800094db + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x94159dd4e1066f1f + 80000ad0: 0000b583 ld x11,0(x1) + 80000ad4: 00808093 addi x1,x1,8 + +0000000080000ad8 : +Zknh_sha256sig1_cg_cp_rd_b28: + sha256sig1 x28, x11 # perform operation + 80000ad8: 10359e13 sha256sig1 x28,x11 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknh_sha256sig1_cg_cp_rd_b28, Zknh_sha256sig1_cg_cp_rd_b28_str) + 80000adc: 00063203 ld x4,0(x12) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 4dd012ef jal x5,800027c0 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 80009513 .word 0x80009513 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x347357c30c1f4d33 + 80000afc: 0000bb83 ld x23,0(x1) + 80000b00: 00808093 addi x1,x1,8 + +0000000080000b04 : +Zknh_sha256sig1_cg_cp_rd_b29: + sha256sig1 x29, x23 # perform operation + 80000b04: 103b9e93 sha256sig1 x29,x23 + # Check if x29 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x29, Zknh_sha256sig1_cg_cp_rd_b29, Zknh_sha256sig1_cg_cp_rd_b29_str) + 80000b08: 00063203 ld x4,0(x12) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 4b1012ef jal x5,800027c0 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 8000954b .word 0x8000954b + 80000b20: 00000000 .word 0x00000000 + 80000b24: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x48f86caad0e62650 + 80000b28: 0000b403 ld x8,0(x1) + 80000b2c: 00808093 addi x1,x1,8 + +0000000080000b30 : +Zknh_sha256sig1_cg_cp_rd_b30: + sha256sig1 x30, x8 # perform operation + 80000b30: 10341f13 sha256sig1 x30,x8 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknh_sha256sig1_cg_cp_rd_b30, Zknh_sha256sig1_cg_cp_rd_b30_str) + 80000b34: 00063203 ld x4,0(x12) + 80000b38: 01e20c63 beq x4,x30,80000b50 + 80000b3c: 485012ef jal x5,800027c0 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 80009583 .word 0x80009583 + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x8240b0d9bf67c359 + 80000b54: 0000b983 ld x19,0(x1) + 80000b58: 00808093 addi x1,x1,8 + +0000000080000b5c : +Zknh_sha256sig1_cg_cp_rd_b31: + sha256sig1 x31, x19 # perform operation + 80000b5c: 10399f93 sha256sig1 x31,x19 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zknh_sha256sig1_cg_cp_rd_b31, Zknh_sha256sig1_cg_cp_rd_b31_str) + 80000b60: 00063203 ld x4,0(x12) + 80000b64: 01f20c63 beq x4,x31,80000b7c + 80000b68: 459012ef jal x5,800027c0 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 800095bb .word 0x800095bb + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000000000000 + 80000b80: 0000b983 ld x19,0(x1) + 80000b84: 00808093 addi x1,x1,8 + +0000000080000b88 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x0: + sha256sig1 x23, x19 # perform operation + 80000b88: 10399b93 sha256sig1 x23,x19 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_edges_0x0, Zknh_sha256sig1_cg_cp_rs1_edges_0x0_str) + 80000b8c: 00063203 ld x4,0(x12) + 80000b90: 01720c63 beq x4,x23,80000ba8 + 80000b94: 42d012ef jal x5,800027c0 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 800095f3 .word 0x800095f3 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000000000001 + 80000bac: 0000b903 ld x18,0(x1) + 80000bb0: 00808093 addi x1,x1,8 + +0000000080000bb4 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x1: + sha256sig1 x23, x18 # perform operation + 80000bb4: 10391b93 sha256sig1 x23,x18 + # Check if x23 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x23, Zknh_sha256sig1_cg_cp_rs1_edges_0x1, Zknh_sha256sig1_cg_cp_rs1_edges_0x1_str) + 80000bb8: 00063203 ld x4,0(x12) + 80000bbc: 01720c63 beq x4,x23,80000bd4 + 80000bc0: 401012ef jal x5,800027c0 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80009632 .word 0x80009632 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000000000002 + 80000bd8: 0000b183 ld x3,0(x1) + 80000bdc: 00808093 addi x1,x1,8 + +0000000080000be0 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x2: + sha256sig1 x22, x3 # perform operation + 80000be0: 10319b13 sha256sig1 x22,x3 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknh_sha256sig1_cg_cp_rs1_edges_0x2, Zknh_sha256sig1_cg_cp_rs1_edges_0x2_str) + 80000be4: 00063203 ld x4,0(x12) + 80000be8: 01620c63 beq x4,x22,80000c00 + 80000bec: 3d5012ef jal x5,800027c0 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 80009671 .word 0x80009671 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x8000000000000000 + 80000c04: 0000ba03 ld x20,0(x1) + 80000c08: 00808093 addi x1,x1,8 + +0000000080000c0c : +Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000000: + sha256sig1 x30, x20 # perform operation + 80000c0c: 103a1f13 sha256sig1 x30,x20 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 00063203 ld x4,0(x12) + 80000c14: 01e20c63 beq x4,x30,80000c2c + 80000c18: 3a9012ef jal x5,800027c0 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 800096b0 .word 0x800096b0 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x8000000000000001 + 80000c30: 0000ba83 ld x21,0(x1) + 80000c34: 00808093 addi x1,x1,8 + +0000000080000c38 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000001: + sha256sig1 x30, x21 # perform operation + 80000c38: 103a9f13 sha256sig1 x30,x21 + # Check if x30 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x30, Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha256sig1_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 00063203 ld x4,0(x12) + 80000c40: 01e20c63 beq x4,x30,80000c58 + 80000c44: 37d012ef jal x5,800027c0 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 800096fe .word 0x800096fe + 80000c54: 00000000 .word 0x00000000 + 80000c58: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x7fffffffffffffff + 80000c5c: 0000ba83 ld x21,0(x1) + 80000c60: 00808093 addi x1,x1,8 + +0000000080000c64 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffffffffffff: + sha256sig1 x18, x21 # perform operation + 80000c64: 103a9913 sha256sig1 x18,x21 + # Check if x18 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x18, Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha256sig1_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 00063203 ld x4,0(x12) + 80000c6c: 01220c63 beq x4,x18,80000c84 + 80000c70: 351012ef jal x5,800027c0 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 8000974c .word 0x8000974c + 80000c80: 00000000 .word 0x00000000 + 80000c84: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80000c88: 0000ba03 ld x20,0(x1) + 80000c8c: 00808093 addi x1,x1,8 + +0000000080000c90 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha256sig1 x3, x20 # perform operation + 80000c90: 103a1193 sha256sig1 x3,x20 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha256sig1_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 00063203 ld x4,0(x12) + 80000c98: 00320c63 beq x4,x3,80000cb0 + 80000c9c: 325012ef jal x5,800027c0 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000979a .word 0x8000979a + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xffffffffffffffff + 80000cb4: 0000b383 ld x7,0(x1) + 80000cb8: 00808093 addi x1,x1,8 + +0000000080000cbc : +Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffffffffffff: + sha256sig1 x19, x7 # perform operation + 80000cbc: 10339993 sha256sig1 x19,x7 + # Check if x19 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x19, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 00063203 ld x4,0(x12) + 80000cc4: 01320c63 beq x4,x19,80000cdc + 80000cc8: 2f9012ef jal x5,800027c0 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800097e8 .word 0x800097e8 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xfffffffffffffffe + 80000ce0: 0000bc03 ld x24,0(x1) + 80000ce4: 00808093 addi x1,x1,8 + +0000000080000ce8 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffffffffffe: + sha256sig1 x28, x24 # perform operation + 80000ce8: 103c1e13 sha256sig1 x28,x24 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 00063203 ld x4,0(x12) + 80000cf0: 01c20c63 beq x4,x28,80000d08 + 80000cf4: 2cd012ef jal x5,800027c0 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009836 .word 0x80009836 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80000d0c: 0000b883 ld x17,0(x1) + 80000d10: 00808093 addi x1,x1,8 + +0000000080000d14 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha256sig1 x13, x17 # perform operation + 80000d14: 10389693 sha256sig1 x13,x17 + # Check if x13 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x13, Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha256sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 00063203 ld x4,0(x12) + 80000d1c: 00d20c63 beq x4,x13,80000d34 + 80000d20: 2a1012ef jal x5,800027c0 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 80009884 .word 0x80009884 + 80000d30: 00000000 .word 0x00000000 + 80000d34: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80000d38: 0000b103 ld x2,0(x1) + 80000d3c: 00808093 addi x1,x1,8 + +0000000080000d40 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha256sig1 x24, x2 # perform operation + 80000d40: 10311c13 sha256sig1 x24,x2 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha256sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 00063203 ld x4,0(x12) + 80000d48: 01820c63 beq x4,x24,80000d60 + 80000d4c: 275012ef jal x5,800027c0 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 800098d2 .word 0x800098d2 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x5555555555555555 + 80000d64: 0000ba03 ld x20,0(x1) + 80000d68: 00808093 addi x1,x1,8 + +0000000080000d6c : +Zknh_sha256sig1_cg_cp_rs1_edges_0x5555555555555555: + sha256sig1 x6, x20 # perform operation + 80000d6c: 103a1313 sha256sig1 x6,x20 + # Check if x6 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x6, Zknh_sha256sig1_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha256sig1_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 00063203 ld x4,0(x12) + 80000d74: 00620c63 beq x4,x6,80000d8c + 80000d78: 249012ef jal x5,800027c0 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 80009920 .word 0x80009920 + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x00000000ffffffff + 80000d90: 0000b683 ld x13,0(x1) + 80000d94: 00808093 addi x1,x1,8 + +0000000080000d98 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff: + sha256sig1 x8, x13 # perform operation + 80000d98: 10369413 sha256sig1 x8,x13 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sig1_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 00063203 ld x4,0(x12) + 80000da0: 00820c63 beq x4,x8,80000db8 + 80000da4: 21d012ef jal x5,800027c0 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000996e .word 0x8000996e + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x00000000fffffffe + 80000dbc: 0000bc83 ld x25,0(x1) + 80000dc0: 00808093 addi x1,x1,8 + +0000000080000dc4 : +Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe: + sha256sig1 x28, x25 # perform operation + 80000dc4: 103c9e13 sha256sig1 x28,x25 + # Check if x28 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x28, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sig1_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 00063203 ld x4,0(x12) + 80000dcc: 01c20c63 beq x4,x28,80000de4 + 80000dd0: 1f1012ef jal x5,800027c0 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800099b4 .word 0x800099b4 + 80000de0: 00000000 .word 0x00000000 + 80000de4: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000000 + 80000de8: 0000b983 ld x19,0(x1) + 80000dec: 00808093 addi x1,x1,8 + +0000000080000df0 : +Zknh_sha256sig1_cg_cp_rs1_edges_0x100000000: + sha256sig1 x22, x19 # perform operation + 80000df0: 10399b13 sha256sig1 x22,x19 + # Check if x22 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x22, Zknh_sha256sig1_cg_cp_rs1_edges_0x100000000, Zknh_sha256sig1_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 00063203 ld x4,0(x12) + 80000df8: 01620c63 beq x4,x22,80000e10 + 80000dfc: 1c5012ef jal x5,800027c0 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 800099fa .word 0x800099fa + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 00860613 addi x12,x12,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x0000000100000001 + 80000e14: 0000ba83 ld x21,0(x1) + 80000e18: 00808093 addi x1,x1,8 + +0000000080000e1c : +Zknh_sha256sig1_cg_cp_rs1_edges_0x100000001: + sha256sig1 x10, x21 # perform operation + 80000e1c: 103a9513 sha256sig1 x10,x21 + # Check if x10 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x10, Zknh_sha256sig1_cg_cp_rs1_edges_0x100000001, Zknh_sha256sig1_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 00063203 ld x4,0(x12) + 80000e24: 00a20c63 beq x4,x10,80000e3c + 80000e28: 199012ef jal x5,800027c0 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009a41 .word 0x80009a41 + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0xfd64197ef7e9c24a + 80000e40: 0000b003 ld x0,0(x1) + 80000e44: 00808093 addi x1,x1,8 + +0000000080000e48 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b0: + sha256sig1 x0, x0 # perform operation + 80000e48: 10301013 sha256sig1 x0,x0 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zknh_sha256sig1_cg_cmp_rd_rs1_b0, Zknh_sha256sig1_cg_cmp_rd_rs1_b0_str) + 80000e4c: 00063203 ld x4,0(x12) + 80000e50: 00020c63 beq x4,x0,80000e68 + 80000e54: 16d012ef jal x5,800027c0 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 80009a88 .word 0x80009a88 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 00860613 addi x12,x12,8 + + mv x16, x1 # switch data pointer register to avoid conflict with test + 80000e6c: 00008813 addi x16,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0x1b4195c1e9082631 + 80000e70: 00083083 ld x1,0(x16) + 80000e74: 00880813 addi x16,x16,8 + +0000000080000e78 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b1: + sha256sig1 x1, x1 # perform operation + 80000e78: 10309093 sha256sig1 x1,x1 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zknh_sha256sig1_cg_cmp_rd_rs1_b1, Zknh_sha256sig1_cg_cmp_rd_rs1_b1_str) + 80000e7c: 00063203 ld x4,0(x12) + 80000e80: 00120c63 beq x4,x1,80000e98 + 80000e84: 13d012ef jal x5,800027c0 + 80000e88: 80000e78 .word 0x80000e78 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 80009ac4 .word 0x80009ac4 + 80000e94: 00000000 .word 0x00000000 + 80000e98: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x589b790be0e55639 + 80000e9c: 00083103 ld x2,0(x16) + 80000ea0: 00880813 addi x16,x16,8 + +0000000080000ea4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b2: + sha256sig1 x2, x2 # perform operation + 80000ea4: 10311113 sha256sig1 x2,x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zknh_sha256sig1_cg_cmp_rd_rs1_b2, Zknh_sha256sig1_cg_cmp_rd_rs1_b2_str) + 80000ea8: 00063203 ld x4,0(x12) + 80000eac: 00220c63 beq x4,x2,80000ec4 + 80000eb0: 111012ef jal x5,800027c0 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 80009b00 .word 0x80009b00 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0x50b99d46aa577c7c + 80000ec8: 00083183 ld x3,0(x16) + 80000ecc: 00880813 addi x16,x16,8 + +0000000080000ed0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b3: + sha256sig1 x3, x3 # perform operation + 80000ed0: 10319193 sha256sig1 x3,x3 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zknh_sha256sig1_cg_cmp_rd_rs1_b3, Zknh_sha256sig1_cg_cmp_rd_rs1_b3_str) + 80000ed4: 00063203 ld x4,0(x12) + 80000ed8: 00320c63 beq x4,x3,80000ef0 + 80000edc: 0e5012ef jal x5,800027c0 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80009b3c .word 0x80009b3c + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000ef4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000ef8: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x4a30d2cb9e0b639e + 80000efc: 00083203 ld x4,0(x16) + 80000f00: 00880813 addi x16,x16,8 + +0000000080000f04 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b4: + sha256sig1 x4, x4 # perform operation + 80000f04: 10321213 sha256sig1 x4,x4 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zknh_sha256sig1_cg_cmp_rd_rs1_b4, Zknh_sha256sig1_cg_cmp_rd_rs1_b4_str) + 80000f08: 00063683 ld x13,0(x12) + 80000f0c: 00468c63 beq x13,x4,80000f24 + 80000f10: 0f10176f jal x14,80002800 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 80009b78 .word 0x80009b78 + 80000f20: 00000000 .word 0x00000000 + 80000f24: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x7e9a9a461f39bead + 80000f28: 00083283 ld x5,0(x16) + 80000f2c: 00880813 addi x16,x16,8 + +0000000080000f30 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b5: + sha256sig1 x5, x5 # perform operation + 80000f30: 10329293 sha256sig1 x5,x5 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zknh_sha256sig1_cg_cmp_rd_rs1_b5, Zknh_sha256sig1_cg_cmp_rd_rs1_b5_str) + 80000f34: 00063683 ld x13,0(x12) + 80000f38: 00568c63 beq x13,x5,80000f50 + 80000f3c: 0c50176f jal x14,80002800 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009bb4 .word 0x80009bb4 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0x3e4d541842f8ee9c + 80000f54: 00083303 ld x6,0(x16) + 80000f58: 00880813 addi x16,x16,8 + +0000000080000f5c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b6: + sha256sig1 x6, x6 # perform operation + 80000f5c: 10331313 sha256sig1 x6,x6 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zknh_sha256sig1_cg_cmp_rd_rs1_b6, Zknh_sha256sig1_cg_cmp_rd_rs1_b6_str) + 80000f60: 00063683 ld x13,0(x12) + 80000f64: 00668c63 beq x13,x6,80000f7c + 80000f68: 0990176f jal x14,80002800 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bf0 .word 0x80009bf0 + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0xbde03f81a403127a + 80000f80: 00083383 ld x7,0(x16) + 80000f84: 00880813 addi x16,x16,8 + +0000000080000f88 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b7: + sha256sig1 x7, x7 # perform operation + 80000f88: 10339393 sha256sig1 x7,x7 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zknh_sha256sig1_cg_cmp_rd_rs1_b7, Zknh_sha256sig1_cg_cmp_rd_rs1_b7_str) + 80000f8c: 00063683 ld x13,0(x12) + 80000f90: 00768c63 beq x13,x7,80000fa8 + 80000f94: 06d0176f jal x14,80002800 + 80000f98: 80000f88 .word 0x80000f88 + 80000f9c: 00000000 .word 0x00000000 + 80000fa0: 80009c2c .word 0x80009c2c + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0xf89857b83b120d21 + 80000fac: 00083403 ld x8,0(x16) + 80000fb0: 00880813 addi x16,x16,8 + +0000000080000fb4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b8: + sha256sig1 x8, x8 # perform operation + 80000fb4: 10341413 sha256sig1 x8,x8 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zknh_sha256sig1_cg_cmp_rd_rs1_b8, Zknh_sha256sig1_cg_cmp_rd_rs1_b8_str) + 80000fb8: 00063683 ld x13,0(x12) + 80000fbc: 00868c63 beq x13,x8,80000fd4 + 80000fc0: 0410176f jal x14,80002800 + 80000fc4: 80000fb4 .word 0x80000fb4 + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 80009c68 .word 0x80009c68 + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xd474ee9a0047bffe + 80000fd8: 00083483 ld x9,0(x16) + 80000fdc: 00880813 addi x16,x16,8 + +0000000080000fe0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b9: + sha256sig1 x9, x9 # perform operation + 80000fe0: 10349493 sha256sig1 x9,x9 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zknh_sha256sig1_cg_cmp_rd_rs1_b9, Zknh_sha256sig1_cg_cmp_rd_rs1_b9_str) + 80000fe4: 00063683 ld x13,0(x12) + 80000fe8: 00968c63 beq x13,x9,80001000 + 80000fec: 0150176f jal x14,80002800 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 80009ca4 .word 0x80009ca4 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x5734f4d709dee365 + 80001004: 00083503 ld x10,0(x16) + 80001008: 00880813 addi x16,x16,8 + +000000008000100c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b10: + sha256sig1 x10, x10 # perform operation + 8000100c: 10351513 sha256sig1 x10,x10 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zknh_sha256sig1_cg_cmp_rd_rs1_b10, Zknh_sha256sig1_cg_cmp_rd_rs1_b10_str) + 80001010: 00063683 ld x13,0(x12) + 80001014: 00a68c63 beq x13,x10,8000102c + 80001018: 7e80176f jal x14,80002800 + 8000101c: 8000100c .word 0x8000100c + 80001020: 00000000 .word 0x00000000 + 80001024: 80009ce0 .word 0x80009ce0 + 80001028: 00000000 .word 0x00000000 + 8000102c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x2acd1afc2a0b3c0a + 80001030: 00083583 ld x11,0(x16) + 80001034: 00880813 addi x16,x16,8 + +0000000080001038 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b11: + sha256sig1 x11, x11 # perform operation + 80001038: 10359593 sha256sig1 x11,x11 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zknh_sha256sig1_cg_cmp_rd_rs1_b11, Zknh_sha256sig1_cg_cmp_rd_rs1_b11_str) + 8000103c: 00063683 ld x13,0(x12) + 80001040: 00b68c63 beq x13,x11,80001058 + 80001044: 7bc0176f jal x14,80002800 + 80001048: 80001038 .word 0x80001038 + 8000104c: 00000000 .word 0x00000000 + 80001050: 80009d1d .word 0x80009d1d + 80001054: 00000000 .word 0x00000000 + 80001058: 00860613 addi x12,x12,8 + + mv x28, x12 # switch signature pointer register to avoid conflict with test + 8000105c: 00060e13 addi x28,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x3bac7b8f6b5aabe0 + 80001060: 00083603 ld x12,0(x16) + 80001064: 00880813 addi x16,x16,8 + +0000000080001068 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b12: + sha256sig1 x12, x12 # perform operation + 80001068: 10361613 sha256sig1 x12,x12 + # Check if x12 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x12, Zknh_sha256sig1_cg_cmp_rd_rs1_b12, Zknh_sha256sig1_cg_cmp_rd_rs1_b12_str) + 8000106c: 000e3683 ld x13,0(x28) + 80001070: 00c68c63 beq x13,x12,80001088 + 80001074: 78c0176f jal x14,80002800 + 80001078: 80001068 .word 0x80001068 + 8000107c: 00000000 .word 0x00000000 + 80001080: 80009d5a .word 0x80009d5a + 80001084: 00000000 .word 0x00000000 + 80001088: 008e0e13 addi x28,x28,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000108c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001090: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0x8dea4a343f75fba4 + 80001094: 00083683 ld x13,0(x16) + 80001098: 00880813 addi x16,x16,8 + +000000008000109c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b13: + sha256sig1 x13, x13 # perform operation + 8000109c: 10369693 sha256sig1 x13,x13 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zknh_sha256sig1_cg_cmp_rd_rs1_b13, Zknh_sha256sig1_cg_cmp_rd_rs1_b13_str) + 800010a0: 000e3203 ld x4,0(x28) + 800010a4: 00d20c63 beq x4,x13,800010bc + 800010a8: 718012ef jal x5,800027c0 + 800010ac: 8000109c .word 0x8000109c + 800010b0: 00000000 .word 0x00000000 + 800010b4: 80009d97 .word 0x80009d97 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xfaee53cee323342b + 800010c0: 00083703 ld x14,0(x16) + 800010c4: 00880813 addi x16,x16,8 + +00000000800010c8 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b14: + sha256sig1 x14, x14 # perform operation + 800010c8: 10371713 sha256sig1 x14,x14 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zknh_sha256sig1_cg_cmp_rd_rs1_b14, Zknh_sha256sig1_cg_cmp_rd_rs1_b14_str) + 800010cc: 000e3203 ld x4,0(x28) + 800010d0: 00e20c63 beq x4,x14,800010e8 + 800010d4: 6ec012ef jal x5,800027c0 + 800010d8: 800010c8 .word 0x800010c8 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 80009dd4 .word 0x80009dd4 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0x40a14e834aa0245b + 800010ec: 00083783 ld x15,0(x16) + 800010f0: 00880813 addi x16,x16,8 + +00000000800010f4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b15: + sha256sig1 x15, x15 # perform operation + 800010f4: 10379793 sha256sig1 x15,x15 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zknh_sha256sig1_cg_cmp_rd_rs1_b15, Zknh_sha256sig1_cg_cmp_rd_rs1_b15_str) + 800010f8: 000e3203 ld x4,0(x28) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 6c0012ef jal x5,800027c0 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e11 .word 0x80009e11 + 80001110: 00000000 .word 0x00000000 + 80001114: 008e0e13 addi x28,x28,8 + + mv x10, x16 # switch data pointer register to avoid conflict with test + 80001118: 00080513 addi x10,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x4f5aba094aa54635 + 8000111c: 00053803 ld x16,0(x10) + 80001120: 00850513 addi x10,x10,8 + +0000000080001124 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b16: + sha256sig1 x16, x16 # perform operation + 80001124: 10381813 sha256sig1 x16,x16 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zknh_sha256sig1_cg_cmp_rd_rs1_b16, Zknh_sha256sig1_cg_cmp_rd_rs1_b16_str) + 80001128: 000e3203 ld x4,0(x28) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 690012ef jal x5,800027c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009e4e .word 0x80009e4e + 80001140: 00000000 .word 0x00000000 + 80001144: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x11428f14290c4f43 + 80001148: 00053883 ld x17,0(x10) + 8000114c: 00850513 addi x10,x10,8 + +0000000080001150 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b17: + sha256sig1 x17, x17 # perform operation + 80001150: 10389893 sha256sig1 x17,x17 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zknh_sha256sig1_cg_cmp_rd_rs1_b17, Zknh_sha256sig1_cg_cmp_rd_rs1_b17_str) + 80001154: 000e3203 ld x4,0(x28) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009e8b .word 0x80009e8b + 8000116c: 00000000 .word 0x00000000 + 80001170: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x3fdc5d1388fada66 + 80001174: 00053903 ld x18,0(x10) + 80001178: 00850513 addi x10,x10,8 + +000000008000117c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b18: + sha256sig1 x18, x18 # perform operation + 8000117c: 10391913 sha256sig1 x18,x18 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zknh_sha256sig1_cg_cmp_rd_rs1_b18, Zknh_sha256sig1_cg_cmp_rd_rs1_b18_str) + 80001180: 000e3203 ld x4,0(x28) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009ec8 .word 0x80009ec8 + 80001198: 00000000 .word 0x00000000 + 8000119c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x885bcf0f47258aba + 800011a0: 00053983 ld x19,0(x10) + 800011a4: 00850513 addi x10,x10,8 + +00000000800011a8 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b19: + sha256sig1 x19, x19 # perform operation + 800011a8: 10399993 sha256sig1 x19,x19 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zknh_sha256sig1_cg_cmp_rd_rs1_b19, Zknh_sha256sig1_cg_cmp_rd_rs1_b19_str) + 800011ac: 000e3203 ld x4,0(x28) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009f05 .word 0x80009f05 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x2f5d82fe7b876b03 + 800011cc: 00053a03 ld x20,0(x10) + 800011d0: 00850513 addi x10,x10,8 + +00000000800011d4 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b20: + sha256sig1 x20, x20 # perform operation + 800011d4: 103a1a13 sha256sig1 x20,x20 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknh_sha256sig1_cg_cmp_rd_rs1_b20, Zknh_sha256sig1_cg_cmp_rd_rs1_b20_str) + 800011d8: 000e3203 ld x4,0(x28) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009f43 .word 0x80009f43 + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x697ba5fb5de2ff53 + 800011f8: 00053a83 ld x21,0(x10) + 800011fc: 00850513 addi x10,x10,8 + +0000000080001200 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b21: + sha256sig1 x21, x21 # perform operation + 80001200: 103a9a93 sha256sig1 x21,x21 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zknh_sha256sig1_cg_cmp_rd_rs1_b21, Zknh_sha256sig1_cg_cmp_rd_rs1_b21_str) + 80001204: 000e3203 ld x4,0(x28) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 5b4012ef jal x5,800027c0 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f81 .word 0x80009f81 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x59f513d9da179ecd + 80001224: 00053b03 ld x22,0(x10) + 80001228: 00850513 addi x10,x10,8 + +000000008000122c : +Zknh_sha256sig1_cg_cmp_rd_rs1_b22: + sha256sig1 x22, x22 # perform operation + 8000122c: 103b1b13 sha256sig1 x22,x22 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zknh_sha256sig1_cg_cmp_rd_rs1_b22, Zknh_sha256sig1_cg_cmp_rd_rs1_b22_str) + 80001230: 000e3203 ld x4,0(x28) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 588012ef jal x5,800027c0 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fbf .word 0x80009fbf + 80001248: 00000000 .word 0x00000000 + 8000124c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xd147cf1bae81d861 + 80001250: 00053b83 ld x23,0(x10) + 80001254: 00850513 addi x10,x10,8 + +0000000080001258 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b23: + sha256sig1 x23, x23 # perform operation + 80001258: 103b9b93 sha256sig1 x23,x23 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zknh_sha256sig1_cg_cmp_rd_rs1_b23, Zknh_sha256sig1_cg_cmp_rd_rs1_b23_str) + 8000125c: 000e3203 ld x4,0(x28) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 55c012ef jal x5,800027c0 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009ffd .word 0x80009ffd + 80001274: 00000000 .word 0x00000000 + 80001278: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xeeea2d0625e37c86 + 8000127c: 00053c03 ld x24,0(x10) + 80001280: 00850513 addi x10,x10,8 + +0000000080001284 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b24: + sha256sig1 x24, x24 # perform operation + 80001284: 103c1c13 sha256sig1 x24,x24 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zknh_sha256sig1_cg_cmp_rd_rs1_b24, Zknh_sha256sig1_cg_cmp_rd_rs1_b24_str) + 80001288: 000e3203 ld x4,0(x28) + 8000128c: 01820c63 beq x4,x24,800012a4 + 80001290: 530012ef jal x5,800027c0 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000a03b .word 0x8000a03b + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xc8fafdaed65dad5c + 800012a8: 00053c83 ld x25,0(x10) + 800012ac: 00850513 addi x10,x10,8 + +00000000800012b0 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b25: + sha256sig1 x25, x25 # perform operation + 800012b0: 103c9c93 sha256sig1 x25,x25 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zknh_sha256sig1_cg_cmp_rd_rs1_b25, Zknh_sha256sig1_cg_cmp_rd_rs1_b25_str) + 800012b4: 000e3203 ld x4,0(x28) + 800012b8: 01920c63 beq x4,x25,800012d0 + 800012bc: 504012ef jal x5,800027c0 + 800012c0: 800012b0 .word 0x800012b0 + 800012c4: 00000000 .word 0x00000000 + 800012c8: 8000a079 .word 0x8000a079 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xe2877c51b6c9497f + 800012d4: 00053d03 ld x26,0(x10) + 800012d8: 00850513 addi x10,x10,8 + +00000000800012dc : +Zknh_sha256sig1_cg_cmp_rd_rs1_b26: + sha256sig1 x26, x26 # perform operation + 800012dc: 103d1d13 sha256sig1 x26,x26 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zknh_sha256sig1_cg_cmp_rd_rs1_b26, Zknh_sha256sig1_cg_cmp_rd_rs1_b26_str) + 800012e0: 000e3203 ld x4,0(x28) + 800012e4: 01a20c63 beq x4,x26,800012fc + 800012e8: 4d8012ef jal x5,800027c0 + 800012ec: 800012dc .word 0x800012dc + 800012f0: 00000000 .word 0x00000000 + 800012f4: 8000a0b7 .word 0x8000a0b7 + 800012f8: 00000000 .word 0x00000000 + 800012fc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xb0a015b01eb2970e + 80001300: 00053d83 ld x27,0(x10) + 80001304: 00850513 addi x10,x10,8 + +0000000080001308 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b27: + sha256sig1 x27, x27 # perform operation + 80001308: 103d9d93 sha256sig1 x27,x27 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zknh_sha256sig1_cg_cmp_rd_rs1_b27, Zknh_sha256sig1_cg_cmp_rd_rs1_b27_str) + 8000130c: 000e3203 ld x4,0(x28) + 80001310: 01b20c63 beq x4,x27,80001328 + 80001314: 4ac012ef jal x5,800027c0 + 80001318: 80001308 .word 0x80001308 + 8000131c: 00000000 .word 0x00000000 + 80001320: 8000a0f5 .word 0x8000a0f5 + 80001324: 00000000 .word 0x00000000 + 80001328: 008e0e13 addi x28,x28,8 + + mv x3, x28 # switch signature pointer register to avoid conflict with test + 8000132c: 000e0193 addi x3,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x343f85eb5622eefb + 80001330: 00053e03 ld x28,0(x10) + 80001334: 00850513 addi x10,x10,8 + +0000000080001338 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b28: + sha256sig1 x28, x28 # perform operation + 80001338: 103e1e13 sha256sig1 x28,x28 + # Check if x28 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x28, Zknh_sha256sig1_cg_cmp_rd_rs1_b28, Zknh_sha256sig1_cg_cmp_rd_rs1_b28_str) + 8000133c: 0001b203 ld x4,0(x3) + 80001340: 01c20c63 beq x4,x28,80001358 + 80001344: 47c012ef jal x5,800027c0 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a133 .word 0x8000a133 + 80001354: 00000000 .word 0x00000000 + 80001358: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfde8d1db7c4dc471 + 8000135c: 00053e83 ld x29,0(x10) + 80001360: 00850513 addi x10,x10,8 + +0000000080001364 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b29: + sha256sig1 x29, x29 # perform operation + 80001364: 103e9e93 sha256sig1 x29,x29 + # Check if x29 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x29, Zknh_sha256sig1_cg_cmp_rd_rs1_b29, Zknh_sha256sig1_cg_cmp_rd_rs1_b29_str) + 80001368: 0001b203 ld x4,0(x3) + 8000136c: 01d20c63 beq x4,x29,80001384 + 80001370: 450012ef jal x5,800027c0 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000a171 .word 0x8000a171 + 80001380: 00000000 .word 0x00000000 + 80001384: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xd529f6373fe58245 + 80001388: 00053f03 ld x30,0(x10) + 8000138c: 00850513 addi x10,x10,8 + +0000000080001390 : +Zknh_sha256sig1_cg_cmp_rd_rs1_b30: + sha256sig1 x30, x30 # perform operation + 80001390: 103f1f13 sha256sig1 x30,x30 + # Check if x30 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x30, Zknh_sha256sig1_cg_cmp_rd_rs1_b30, Zknh_sha256sig1_cg_cmp_rd_rs1_b30_str) + 80001394: 0001b203 ld x4,0(x3) + 80001398: 01e20c63 beq x4,x30,800013b0 + 8000139c: 424012ef jal x5,800027c0 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000a1af .word 0x8000a1af + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x5b5f4673ca0bf905 + 800013b4: 00053f83 ld x31,0(x10) + 800013b8: 00850513 addi x10,x10,8 + +00000000800013bc : +Zknh_sha256sig1_cg_cmp_rd_rs1_b31: + sha256sig1 x31, x31 # perform operation + 800013bc: 103f9f93 sha256sig1 x31,x31 + # Check if x31 contains the expected result. x3 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x3, x5, x4, x31, Zknh_sha256sig1_cg_cmp_rd_rs1_b31, Zknh_sha256sig1_cg_cmp_rd_rs1_b31_str) + 800013c0: 0001b203 ld x4,0(x3) + 800013c4: 01f20c63 beq x4,x31,800013dc + 800013c8: 3f8012ef jal x5,800027c0 + 800013cc: 800013bc .word 0x800013bc + 800013d0: 00000000 .word 0x00000000 + 800013d4: 8000a1ed .word 0x8000a1ed + 800013d8: 00000000 .word 0x00000000 + 800013dc: 00818193 addi x3,x3,8 + + mv x2, x3 # restore signature pointer to default register for teardown + 800013e0: 00018113 addi x2,x3,0 + +00000000800013e4 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e4: 00000513 addi x10,x0,0 + 800013e8: 00000073 ecall + 800013ec: fff00513 addi x10,x0,-1 + 800013f0: 25800413 addi x8,x0,600 + +00000000800013f4 : + 800013f4: 34002373 csrrs x6,mscratch,x0 + +00000000800013f8 : + 800013f8: 2b833383 ld x7,696(x6) + +00000000800013fc : + 800013fc: 2a033383 ld x7,672(x6) + +0000000080001400 : + 80001400: 2d033483 ld x9,720(x6) + 80001404: 34049073 csrrw x0,mscratch,x9 + +0000000080001408 : + 80001408: 2c833483 ld x9,712(x6) + 8000140c: 305493f3 csrrw x7,mtvec,x9 + 80001410: ffc4f493 andi x9,x9,-4 + 80001414: ffc3f393 andi x7,x7,-4 + 80001418: 00749e63 bne x9,x7,80001434 + +000000008000141c : + 8000141c: 00030493 addi x9,x6,0 + +0000000080001420 : + 80001420: 0004a783 lw x15,0(x9) + 80001424: 00f3a023 sw x15,0(x7) + 80001428: 00438393 addi x7,x7,4 + 8000142c: 00448493 addi x9,x9,4 + 80001430: fe83c8e3 blt x7,x8,80001420 + 80001434: 0000100f fence.i + +0000000080001438 : + 80001438: 00000013 addi x0,x0,0 + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc5ff06f jal x0,800013e4 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca1ff06f jal x0,800013e4 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9830313 addi x6,x6,-1384 # 80001438 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 34c30313 addi x6,x6,844 # 800013e4 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33430313 addi x6,x6,820 # 800013e4 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 31c30313 addi x6,x6,796 # 800013e4 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b478793 addi x15,x15,436 # 800013f4 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha256sum0-00.elf.objdump b/riscv-tests/rv64-Zknh-sha256sum0-00.elf.objdump new file mode 100644 index 0000000..1c22c63 --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha256sum0-00.elf.objdump @@ -0,0 +1,6679 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sum0-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sum0-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008e4 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f9f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0002901f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029042 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029060 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 000290a0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 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0000000000000000 cleanup_epilogs +000000008002b000 g .text.rvmodel 0000000000000000 _end +0000000080029a00 g .tohost 0000000000000000 fromhost +0000000080029900 g .tohost 0000000000000000 tohost +00000000800016b0 g .text.rvtest 0000000000000000 rvtest_fail_summary +0000000080001780 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xf0ae56593839f05a + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha256sum0_cg_cp_rs1_b0: + sha256sum0 x30, x0 # perform operation + 80000048: 10001f13 sha256sum0 x30,x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zknh_sha256sum0_cg_cp_rs1_b0, Zknh_sha256sum0_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01e20c63 beq x4,x30,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x13b1ecc0b30b4f71 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha256sum0_cg_cp_rs1_b1: + sha256sum0 x21, x1 # perform operation + 80000074: 10009a93 sha256sum0 x21,x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zknh_sha256sum0_cg_cp_rs1_b1, Zknh_sha256sum0_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01520c63 beq x4,x21,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x31, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010f93 addi x31,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xa187690a75f94470 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha256sum0_cg_cp_rs1_b2: + sha256sum0 x21, x2 # perform operation + 800000a4: 10011a93 sha256sum0 x21,x2 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zknh_sha256sum0_cg_cp_rs1_b2, Zknh_sha256sum0_cg_cp_rs1_b2_str) + 800000a8: 000fb203 ld x4,0(x31) + 800000ac: 01520c63 beq x4,x21,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008f8f93 addi x31,x31,8 + + mv x27, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018d93 addi x27,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0x9f613815180cebf0 + 800000cc: 000db183 ld x3,0(x27) + 800000d0: 008d8d93 addi x27,x27,8 + +00000000800000d4 : +Zknh_sha256sum0_cg_cp_rs1_b3: + sha256sum0 x8, x3 # perform operation + 800000d4: 10019413 sha256sum0 x8,x3 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zknh_sha256sum0_cg_cp_rs1_b3, Zknh_sha256sum0_cg_cp_rs1_b3_str) + 800000d8: 000fb203 ld x4,0(x31) + 800000dc: 00820c63 beq x4,x8,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008f8f93 addi x31,x31,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 800000f8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs1: x4 = 0x364e8936ae58b53c + 80000100: 000db203 ld x4,0(x27) + 80000104: 008d8d93 addi x27,x27,8 + +0000000080000108 : +Zknh_sha256sum0_cg_cp_rs1_b4: + sha256sum0 x25, x4 # perform operation + 80000108: 10021c93 sha256sum0 x25,x4 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zknh_sha256sum0_cg_cp_rs1_b4, Zknh_sha256sum0_cg_cp_rs1_b4_str) + 8000010c: 000fb383 ld x7,0(x31) + 80000110: 01938c63 beq x7,x25,80000128 + 80000114: 6c40246f jal x8,800027d8 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs1: x5 = 0x7d104de9f8fc08dc + 8000012c: 000db283 ld x5,0(x27) + 80000130: 008d8d93 addi x27,x27,8 + +0000000080000134 : +Zknh_sha256sum0_cg_cp_rs1_b5: + sha256sum0 x20, x5 # perform operation + 80000134: 10029a13 sha256sum0 x20,x5 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zknh_sha256sum0_cg_cp_rs1_b5, Zknh_sha256sum0_cg_cp_rs1_b5_str) + 80000138: 000fb383 ld x7,0(x31) + 8000013c: 01438c63 beq x7,x20,80000154 + 80000140: 6980246f jal x8,800027d8 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0x669a97806e966e25 + 80000158: 000db303 ld x6,0(x27) + 8000015c: 008d8d93 addi x27,x27,8 + +0000000080000160 : +Zknh_sha256sum0_cg_cp_rs1_b6: + sha256sum0 x23, x6 # perform operation + 80000160: 10031b93 sha256sum0 x23,x6 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zknh_sha256sum0_cg_cp_rs1_b6, Zknh_sha256sum0_cg_cp_rs1_b6_str) + 80000164: 000fb383 ld x7,0(x31) + 80000168: 01738c63 beq x7,x23,80000180 + 8000016c: 66c0246f jal x8,800027d8 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 008f8f93 addi x31,x31,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000184: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000188: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0xe0ab0f0b88d63b28 + 8000018c: 000db383 ld x7,0(x27) + 80000190: 008d8d93 addi x27,x27,8 + +0000000080000194 : +Zknh_sha256sum0_cg_cp_rs1_b7: + sha256sum0 x8, x7 # perform operation + 80000194: 10039413 sha256sum0 x8,x7 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zknh_sha256sum0_cg_cp_rs1_b7, Zknh_sha256sum0_cg_cp_rs1_b7_str) + 80000198: 000fb203 ld x4,0(x31) + 8000019c: 00820c63 beq x4,x8,800001b4 + 800001a0: 620022ef jal x5,800027c0 + 800001a4: 80000194 .word 0x80000194 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 80008971 .word 0x80008971 + 800001b0: 00000000 .word 0x00000000 + 800001b4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0xa1eebdab41c4ff9d + 800001b8: 000db403 ld x8,0(x27) + 800001bc: 008d8d93 addi x27,x27,8 + +00000000800001c0 : +Zknh_sha256sum0_cg_cp_rs1_b8: + sha256sum0 x16, x8 # perform operation + 800001c0: 10041813 sha256sum0 x16,x8 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zknh_sha256sum0_cg_cp_rs1_b8, Zknh_sha256sum0_cg_cp_rs1_b8_str) + 800001c4: 000fb203 ld x4,0(x31) + 800001c8: 01020c63 beq x4,x16,800001e0 + 800001cc: 5f4022ef jal x5,800027c0 + 800001d0: 800001c0 .word 0x800001c0 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 800089a8 .word 0x800089a8 + 800001dc: 00000000 .word 0x00000000 + 800001e0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs1: x9 = 0x1611c197ee0c4b30 + 800001e4: 000db483 ld x9,0(x27) + 800001e8: 008d8d93 addi x27,x27,8 + +00000000800001ec : +Zknh_sha256sum0_cg_cp_rs1_b9: + sha256sum0 x19, x9 # perform operation + 800001ec: 10049993 sha256sum0 x19,x9 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zknh_sha256sum0_cg_cp_rs1_b9, Zknh_sha256sum0_cg_cp_rs1_b9_str) + 800001f0: 000fb203 ld x4,0(x31) + 800001f4: 01320c63 beq x4,x19,8000020c + 800001f8: 5c8022ef jal x5,800027c0 + 800001fc: 800001ec .word 0x800001ec + 80000200: 00000000 .word 0x00000000 + 80000204: 800089df .word 0x800089df + 80000208: 00000000 .word 0x00000000 + 8000020c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0xe997e2ea5c4f3adc + 80000210: 000db503 ld x10,0(x27) + 80000214: 008d8d93 addi x27,x27,8 + +0000000080000218 : +Zknh_sha256sum0_cg_cp_rs1_b10: + sha256sum0 x22, x10 # perform operation + 80000218: 10051b13 sha256sum0 x22,x10 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zknh_sha256sum0_cg_cp_rs1_b10, Zknh_sha256sum0_cg_cp_rs1_b10_str) + 8000021c: 000fb203 ld x4,0(x31) + 80000220: 01620c63 beq x4,x22,80000238 + 80000224: 59c022ef jal x5,800027c0 + 80000228: 80000218 .word 0x80000218 + 8000022c: 00000000 .word 0x00000000 + 80000230: 80008a17 .word 0x80008a17 + 80000234: 00000000 .word 0x00000000 + 80000238: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0xf6b835f0ab355949 + 8000023c: 000db583 ld x11,0(x27) + 80000240: 008d8d93 addi x27,x27,8 + +0000000080000244 : +Zknh_sha256sum0_cg_cp_rs1_b11: + sha256sum0 x28, x11 # perform operation + 80000244: 10059e13 sha256sum0 x28,x11 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknh_sha256sum0_cg_cp_rs1_b11, Zknh_sha256sum0_cg_cp_rs1_b11_str) + 80000248: 000fb203 ld x4,0(x31) + 8000024c: 01c20c63 beq x4,x28,80000264 + 80000250: 570022ef jal x5,800027c0 + 80000254: 80000244 .word 0x80000244 + 80000258: 00000000 .word 0x00000000 + 8000025c: 80008a50 .word 0x80008a50 + 80000260: 00000000 .word 0x00000000 + 80000264: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x7eb860dcf7ce6041 + 80000268: 000db603 ld x12,0(x27) + 8000026c: 008d8d93 addi x27,x27,8 + +0000000080000270 : +Zknh_sha256sum0_cg_cp_rs1_b12: + sha256sum0 x23, x12 # perform operation + 80000270: 10061b93 sha256sum0 x23,x12 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zknh_sha256sum0_cg_cp_rs1_b12, Zknh_sha256sum0_cg_cp_rs1_b12_str) + 80000274: 000fb203 ld x4,0(x31) + 80000278: 01720c63 beq x4,x23,80000290 + 8000027c: 544022ef jal x5,800027c0 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 80008a89 .word 0x80008a89 + 8000028c: 00000000 .word 0x00000000 + 80000290: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x0191c33a4ee50226 + 80000294: 000db683 ld x13,0(x27) + 80000298: 008d8d93 addi x27,x27,8 + +000000008000029c : +Zknh_sha256sum0_cg_cp_rs1_b13: + sha256sum0 x7, x13 # perform operation + 8000029c: 10069393 sha256sum0 x7,x13 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zknh_sha256sum0_cg_cp_rs1_b13, Zknh_sha256sum0_cg_cp_rs1_b13_str) + 800002a0: 000fb203 ld x4,0(x31) + 800002a4: 00720c63 beq x4,x7,800002bc + 800002a8: 518022ef jal x5,800027c0 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 80008ac2 .word 0x80008ac2 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0xeb1e02c8c8995ac0 + 800002c0: 000db703 ld x14,0(x27) + 800002c4: 008d8d93 addi x27,x27,8 + +00000000800002c8 : +Zknh_sha256sum0_cg_cp_rs1_b14: + sha256sum0 x29, x14 # perform operation + 800002c8: 10071e93 sha256sum0 x29,x14 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha256sum0_cg_cp_rs1_b14, Zknh_sha256sum0_cg_cp_rs1_b14_str) + 800002cc: 000fb203 ld x4,0(x31) + 800002d0: 01d20c63 beq x4,x29,800002e8 + 800002d4: 4ec022ef jal x5,800027c0 + 800002d8: 800002c8 .word 0x800002c8 + 800002dc: 00000000 .word 0x00000000 + 800002e0: 80008afb .word 0x80008afb + 800002e4: 00000000 .word 0x00000000 + 800002e8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs1: x15 = 0x420dca40bfe7d68c + 800002ec: 000db783 ld x15,0(x27) + 800002f0: 008d8d93 addi x27,x27,8 + +00000000800002f4 : +Zknh_sha256sum0_cg_cp_rs1_b15: + sha256sum0 x8, x15 # perform operation + 800002f4: 10079413 sha256sum0 x8,x15 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zknh_sha256sum0_cg_cp_rs1_b15, Zknh_sha256sum0_cg_cp_rs1_b15_str) + 800002f8: 000fb203 ld x4,0(x31) + 800002fc: 00820c63 beq x4,x8,80000314 + 80000300: 4c0022ef jal x5,800027c0 + 80000304: 800002f4 .word 0x800002f4 + 80000308: 00000000 .word 0x00000000 + 8000030c: 80008b34 .word 0x80008b34 + 80000310: 00000000 .word 0x00000000 + 80000314: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x1be003d2ca027e77 + 80000318: 000db803 ld x16,0(x27) + 8000031c: 008d8d93 addi x27,x27,8 + +0000000080000320 : +Zknh_sha256sum0_cg_cp_rs1_b16: + sha256sum0 x23, x16 # perform operation + 80000320: 10081b93 sha256sum0 x23,x16 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zknh_sha256sum0_cg_cp_rs1_b16, Zknh_sha256sum0_cg_cp_rs1_b16_str) + 80000324: 000fb203 ld x4,0(x31) + 80000328: 01720c63 beq x4,x23,80000340 + 8000032c: 494022ef jal x5,800027c0 + 80000330: 80000320 .word 0x80000320 + 80000334: 00000000 .word 0x00000000 + 80000338: 80008b6d .word 0x80008b6d + 8000033c: 00000000 .word 0x00000000 + 80000340: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0x126ed15763d00fb1 + 80000344: 000db883 ld x17,0(x27) + 80000348: 008d8d93 addi x27,x27,8 + +000000008000034c : +Zknh_sha256sum0_cg_cp_rs1_b17: + sha256sum0 x16, x17 # perform operation + 8000034c: 10089813 sha256sum0 x16,x17 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zknh_sha256sum0_cg_cp_rs1_b17, Zknh_sha256sum0_cg_cp_rs1_b17_str) + 80000350: 000fb203 ld x4,0(x31) + 80000354: 01020c63 beq x4,x16,8000036c + 80000358: 468022ef jal x5,800027c0 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 80008ba6 .word 0x80008ba6 + 80000368: 00000000 .word 0x00000000 + 8000036c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x58e49abeff4c0205 + 80000370: 000db903 ld x18,0(x27) + 80000374: 008d8d93 addi x27,x27,8 + +0000000080000378 : +Zknh_sha256sum0_cg_cp_rs1_b18: + sha256sum0 x7, x18 # perform operation + 80000378: 10091393 sha256sum0 x7,x18 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zknh_sha256sum0_cg_cp_rs1_b18, Zknh_sha256sum0_cg_cp_rs1_b18_str) + 8000037c: 000fb203 ld x4,0(x31) + 80000380: 00720c63 beq x4,x7,80000398 + 80000384: 43c022ef jal x5,800027c0 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 80008bdf .word 0x80008bdf + 80000394: 00000000 .word 0x00000000 + 80000398: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs1: x19 = 0x52ddd9040dea947a + 8000039c: 000db983 ld x19,0(x27) + 800003a0: 008d8d93 addi x27,x27,8 + +00000000800003a4 : +Zknh_sha256sum0_cg_cp_rs1_b19: + sha256sum0 x25, x19 # perform operation + 800003a4: 10099c93 sha256sum0 x25,x19 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknh_sha256sum0_cg_cp_rs1_b19, Zknh_sha256sum0_cg_cp_rs1_b19_str) + 800003a8: 000fb203 ld x4,0(x31) + 800003ac: 01920c63 beq x4,x25,800003c4 + 800003b0: 410022ef jal x5,800027c0 + 800003b4: 800003a4 .word 0x800003a4 + 800003b8: 00000000 .word 0x00000000 + 800003bc: 80008c18 .word 0x80008c18 + 800003c0: 00000000 .word 0x00000000 + 800003c4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs1: x20 = 0xc89fc586813ef790 + 800003c8: 000dba03 ld x20,0(x27) + 800003cc: 008d8d93 addi x27,x27,8 + +00000000800003d0 : +Zknh_sha256sum0_cg_cp_rs1_b20: + sha256sum0 x18, x20 # perform operation + 800003d0: 100a1913 sha256sum0 x18,x20 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zknh_sha256sum0_cg_cp_rs1_b20, Zknh_sha256sum0_cg_cp_rs1_b20_str) + 800003d4: 000fb203 ld x4,0(x31) + 800003d8: 01220c63 beq x4,x18,800003f0 + 800003dc: 3e4022ef jal x5,800027c0 + 800003e0: 800003d0 .word 0x800003d0 + 800003e4: 00000000 .word 0x00000000 + 800003e8: 80008c51 .word 0x80008c51 + 800003ec: 00000000 .word 0x00000000 + 800003f0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x45dab08a6c80056e + 800003f4: 000dba83 ld x21,0(x27) + 800003f8: 008d8d93 addi x27,x27,8 + +00000000800003fc : +Zknh_sha256sum0_cg_cp_rs1_b21: + sha256sum0 x30, x21 # perform operation + 800003fc: 100a9f13 sha256sum0 x30,x21 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha256sum0_cg_cp_rs1_b21, Zknh_sha256sum0_cg_cp_rs1_b21_str) + 80000400: 000fb203 ld x4,0(x31) + 80000404: 01e20c63 beq x4,x30,8000041c + 80000408: 3b8022ef jal x5,800027c0 + 8000040c: 800003fc .word 0x800003fc + 80000410: 00000000 .word 0x00000000 + 80000414: 80008c8a .word 0x80008c8a + 80000418: 00000000 .word 0x00000000 + 8000041c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x7737e84b4fe1b3b1 + 80000420: 000dbb03 ld x22,0(x27) + 80000424: 008d8d93 addi x27,x27,8 + +0000000080000428 : +Zknh_sha256sum0_cg_cp_rs1_b22: + sha256sum0 x25, x22 # perform operation + 80000428: 100b1c93 sha256sum0 x25,x22 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknh_sha256sum0_cg_cp_rs1_b22, Zknh_sha256sum0_cg_cp_rs1_b22_str) + 8000042c: 000fb203 ld x4,0(x31) + 80000430: 01920c63 beq x4,x25,80000448 + 80000434: 38c022ef jal x5,800027c0 + 80000438: 80000428 .word 0x80000428 + 8000043c: 00000000 .word 0x00000000 + 80000440: 80008cc3 .word 0x80008cc3 + 80000444: 00000000 .word 0x00000000 + 80000448: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs1: x23 = 0xf2e7c345ef7568f9 + 8000044c: 000dbb83 ld x23,0(x27) + 80000450: 008d8d93 addi x27,x27,8 + +0000000080000454 : +Zknh_sha256sum0_cg_cp_rs1_b23: + sha256sum0 x19, x23 # perform operation + 80000454: 100b9993 sha256sum0 x19,x23 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zknh_sha256sum0_cg_cp_rs1_b23, Zknh_sha256sum0_cg_cp_rs1_b23_str) + 80000458: 000fb203 ld x4,0(x31) + 8000045c: 01320c63 beq x4,x19,80000474 + 80000460: 360022ef jal x5,800027c0 + 80000464: 80000454 .word 0x80000454 + 80000468: 00000000 .word 0x00000000 + 8000046c: 80008cfc .word 0x80008cfc + 80000470: 00000000 .word 0x00000000 + 80000474: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xf2bc39bf439ad02b + 80000478: 000dbc03 ld x24,0(x27) + 8000047c: 008d8d93 addi x27,x27,8 + +0000000080000480 : +Zknh_sha256sum0_cg_cp_rs1_b24: + sha256sum0 x11, x24 # perform operation + 80000480: 100c1593 sha256sum0 x11,x24 + # Check if x11 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x11, Zknh_sha256sum0_cg_cp_rs1_b24, Zknh_sha256sum0_cg_cp_rs1_b24_str) + 80000484: 000fb203 ld x4,0(x31) + 80000488: 00b20c63 beq x4,x11,800004a0 + 8000048c: 334022ef jal x5,800027c0 + 80000490: 80000480 .word 0x80000480 + 80000494: 00000000 .word 0x00000000 + 80000498: 80008d35 .word 0x80008d35 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x1c35b095983bcd96 + 800004a4: 000dbc83 ld x25,0(x27) + 800004a8: 008d8d93 addi x27,x27,8 + +00000000800004ac : +Zknh_sha256sum0_cg_cp_rs1_b25: + sha256sum0 x21, x25 # perform operation + 800004ac: 100c9a93 sha256sum0 x21,x25 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zknh_sha256sum0_cg_cp_rs1_b25, Zknh_sha256sum0_cg_cp_rs1_b25_str) + 800004b0: 000fb203 ld x4,0(x31) + 800004b4: 01520c63 beq x4,x21,800004cc + 800004b8: 308022ef jal x5,800027c0 + 800004bc: 800004ac .word 0x800004ac + 800004c0: 00000000 .word 0x00000000 + 800004c4: 80008d6e .word 0x80008d6e + 800004c8: 00000000 .word 0x00000000 + 800004cc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0xf708a8030595d2b6 + 800004d0: 000dbd03 ld x26,0(x27) + 800004d4: 008d8d93 addi x27,x27,8 + +00000000800004d8 : +Zknh_sha256sum0_cg_cp_rs1_b26: + sha256sum0 x0, x26 # perform operation + 800004d8: 100d1013 sha256sum0 x0,x26 + # Check if x0 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x0, Zknh_sha256sum0_cg_cp_rs1_b26, Zknh_sha256sum0_cg_cp_rs1_b26_str) + 800004dc: 000fb203 ld x4,0(x31) + 800004e0: 00020c63 beq x4,x0,800004f8 + 800004e4: 2dc022ef jal x5,800027c0 + 800004e8: 800004d8 .word 0x800004d8 + 800004ec: 00000000 .word 0x00000000 + 800004f0: 80008da7 .word 0x80008da7 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 008f8f93 addi x31,x31,8 + + mv x22, x27 # switch data pointer register to avoid conflict with test + 800004fc: 000d8b13 addi x22,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x22, x27) # load rs1: x27 = 0x552a9d8415259669 + 80000500: 000b3d83 ld x27,0(x22) + 80000504: 008b0b13 addi x22,x22,8 + +0000000080000508 : +Zknh_sha256sum0_cg_cp_rs1_b27: + sha256sum0 x14, x27 # perform operation + 80000508: 100d9713 sha256sum0 x14,x27 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknh_sha256sum0_cg_cp_rs1_b27, Zknh_sha256sum0_cg_cp_rs1_b27_str) + 8000050c: 000fb203 ld x4,0(x31) + 80000510: 00e20c63 beq x4,x14,80000528 + 80000514: 2ac022ef jal x5,800027c0 + 80000518: 80000508 .word 0x80000508 + 8000051c: 00000000 .word 0x00000000 + 80000520: 80008de0 .word 0x80008de0 + 80000524: 00000000 .word 0x00000000 + 80000528: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x8ba599bb35926ae2 + 8000052c: 000b3e03 ld x28,0(x22) + 80000530: 008b0b13 addi x22,x22,8 + +0000000080000534 : +Zknh_sha256sum0_cg_cp_rs1_b28: + sha256sum0 x17, x28 # perform operation + 80000534: 100e1893 sha256sum0 x17,x28 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zknh_sha256sum0_cg_cp_rs1_b28, Zknh_sha256sum0_cg_cp_rs1_b28_str) + 80000538: 000fb203 ld x4,0(x31) + 8000053c: 01120c63 beq x4,x17,80000554 + 80000540: 280022ef jal x5,800027c0 + 80000544: 80000534 .word 0x80000534 + 80000548: 00000000 .word 0x00000000 + 8000054c: 80008e19 .word 0x80008e19 + 80000550: 00000000 .word 0x00000000 + 80000554: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0xcae5e139d44be76a + 80000558: 000b3e83 ld x29,0(x22) + 8000055c: 008b0b13 addi x22,x22,8 + +0000000080000560 : +Zknh_sha256sum0_cg_cp_rs1_b29: + sha256sum0 x20, x29 # perform operation + 80000560: 100e9a13 sha256sum0 x20,x29 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zknh_sha256sum0_cg_cp_rs1_b29, Zknh_sha256sum0_cg_cp_rs1_b29_str) + 80000564: 000fb203 ld x4,0(x31) + 80000568: 01420c63 beq x4,x20,80000580 + 8000056c: 254022ef jal x5,800027c0 + 80000570: 80000560 .word 0x80000560 + 80000574: 00000000 .word 0x00000000 + 80000578: 80008e52 .word 0x80008e52 + 8000057c: 00000000 .word 0x00000000 + 80000580: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x22, x30) # load rs1: x30 = 0x0ad03f140ca46603 + 80000584: 000b3f03 ld x30,0(x22) + 80000588: 008b0b13 addi x22,x22,8 + +000000008000058c : +Zknh_sha256sum0_cg_cp_rs1_b30: + sha256sum0 x24, x30 # perform operation + 8000058c: 100f1c13 sha256sum0 x24,x30 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zknh_sha256sum0_cg_cp_rs1_b30, Zknh_sha256sum0_cg_cp_rs1_b30_str) + 80000590: 000fb203 ld x4,0(x31) + 80000594: 01820c63 beq x4,x24,800005ac + 80000598: 228022ef jal x5,800027c0 + 8000059c: 8000058c .word 0x8000058c + 800005a0: 00000000 .word 0x00000000 + 800005a4: 80008e8b .word 0x80008e8b + 800005a8: 00000000 .word 0x00000000 + 800005ac: 008f8f93 addi x31,x31,8 + + mv x20, x31 # switch signature pointer register to avoid conflict with test + 800005b0: 000f8a13 addi x20,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x22, x31) # load rs1: x31 = 0xc48902c7408feadb + 800005b4: 000b3f83 ld x31,0(x22) + 800005b8: 008b0b13 addi x22,x22,8 + +00000000800005bc : +Zknh_sha256sum0_cg_cp_rs1_b31: + sha256sum0 x7, x31 # perform operation + 800005bc: 100f9393 sha256sum0 x7,x31 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zknh_sha256sum0_cg_cp_rs1_b31, Zknh_sha256sum0_cg_cp_rs1_b31_str) + 800005c0: 000a3203 ld x4,0(x20) + 800005c4: 00720c63 beq x4,x7,800005dc + 800005c8: 1f8022ef jal x5,800027c0 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 80008ec4 .word 0x80008ec4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x22, x29) # load rs1: x29 = 0x46d479d9f708db11 + 800005e0: 000b3e83 ld x29,0(x22) + 800005e4: 008b0b13 addi x22,x22,8 + +00000000800005e8 : +Zknh_sha256sum0_cg_cp_rd_b0: + sha256sum0 x0, x29 # perform operation + 800005e8: 100e9013 sha256sum0 x0,x29 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zknh_sha256sum0_cg_cp_rd_b0, Zknh_sha256sum0_cg_cp_rd_b0_str) + 800005ec: 000a3203 ld x4,0(x20) + 800005f0: 00020c63 beq x4,x0,80000608 + 800005f4: 1cc022ef jal x5,800027c0 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 80008efd .word 0x80008efd + 80000604: 00000000 .word 0x00000000 + 80000608: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x5b91866a129cca0a + 8000060c: 000b3003 ld x0,0(x22) + 80000610: 008b0b13 addi x22,x22,8 + +0000000080000614 : +Zknh_sha256sum0_cg_cp_rd_b1: + sha256sum0 x1, x0 # perform operation + 80000614: 10001093 sha256sum0 x1,x0 + # Check if x1 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x1, Zknh_sha256sum0_cg_cp_rd_b1, Zknh_sha256sum0_cg_cp_rd_b1_str) + 80000618: 000a3203 ld x4,0(x20) + 8000061c: 00120c63 beq x4,x1,80000634 + 80000620: 1a0022ef jal x5,800027c0 + 80000624: 80000614 .word 0x80000614 + 80000628: 00000000 .word 0x00000000 + 8000062c: 80008f34 .word 0x80008f34 + 80000630: 00000000 .word 0x00000000 + 80000634: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x0317799f2a951b6d + 80000638: 000b3903 ld x18,0(x22) + 8000063c: 008b0b13 addi x22,x22,8 + +0000000080000640 : +Zknh_sha256sum0_cg_cp_rd_b2: + sha256sum0 x2, x18 # perform operation + 80000640: 10091113 sha256sum0 x2,x18 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zknh_sha256sum0_cg_cp_rd_b2, Zknh_sha256sum0_cg_cp_rd_b2_str) + 80000644: 000a3203 ld x4,0(x20) + 80000648: 00220c63 beq x4,x2,80000660 + 8000064c: 174022ef jal x5,800027c0 + 80000650: 80000640 .word 0x80000640 + 80000654: 00000000 .word 0x00000000 + 80000658: 80008f6b .word 0x80008f6b + 8000065c: 00000000 .word 0x00000000 + 80000660: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x23) # load rs1: x23 = 0x58cebb4df5b6c8c2 + 80000664: 000b3b83 ld x23,0(x22) + 80000668: 008b0b13 addi x22,x22,8 + +000000008000066c : +Zknh_sha256sum0_cg_cp_rd_b3: + sha256sum0 x3, x23 # perform operation + 8000066c: 100b9193 sha256sum0 x3,x23 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zknh_sha256sum0_cg_cp_rd_b3, Zknh_sha256sum0_cg_cp_rd_b3_str) + 80000670: 000a3203 ld x4,0(x20) + 80000674: 00320c63 beq x4,x3,8000068c + 80000678: 148022ef jal x5,800027c0 + 8000067c: 8000066c .word 0x8000066c + 80000680: 00000000 .word 0x00000000 + 80000684: 80008fa2 .word 0x80008fa2 + 80000688: 00000000 .word 0x00000000 + 8000068c: 008a0a13 addi x20,x20,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000690: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000694: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0x2e7f637415d64771 + 80000698: 000b3d03 ld x26,0(x22) + 8000069c: 008b0b13 addi x22,x22,8 + +00000000800006a0 : +Zknh_sha256sum0_cg_cp_rd_b4: + sha256sum0 x4, x26 # perform operation + 800006a0: 100d1213 sha256sum0 x4,x26 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha256sum0_cg_cp_rd_b4, Zknh_sha256sum0_cg_cp_rd_b4_str) + 800006a4: 000a3383 ld x7,0(x20) + 800006a8: 00438c63 beq x7,x4,800006c0 + 800006ac: 12c0246f jal x8,800027d8 + 800006b0: 800006a0 .word 0x800006a0 + 800006b4: 00000000 .word 0x00000000 + 800006b8: 80008fd9 .word 0x80008fd9 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x76cbdb478f0dbf77 + 800006c4: 000b3903 ld x18,0(x22) + 800006c8: 008b0b13 addi x22,x22,8 + +00000000800006cc : +Zknh_sha256sum0_cg_cp_rd_b5: + sha256sum0 x5, x18 # perform operation + 800006cc: 10091293 sha256sum0 x5,x18 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zknh_sha256sum0_cg_cp_rd_b5, Zknh_sha256sum0_cg_cp_rd_b5_str) + 800006d0: 000a3383 ld x7,0(x20) + 800006d4: 00538c63 beq x7,x5,800006ec + 800006d8: 1000246f jal x8,800027d8 + 800006dc: 800006cc .word 0x800006cc + 800006e0: 00000000 .word 0x00000000 + 800006e4: 80009010 .word 0x80009010 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xa5f4e54ed858e028 + 800006f0: 000b3903 ld x18,0(x22) + 800006f4: 008b0b13 addi x22,x22,8 + +00000000800006f8 : +Zknh_sha256sum0_cg_cp_rd_b6: + sha256sum0 x6, x18 # perform operation + 800006f8: 10091313 sha256sum0 x6,x18 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zknh_sha256sum0_cg_cp_rd_b6, Zknh_sha256sum0_cg_cp_rd_b6_str) + 800006fc: 000a3383 ld x7,0(x20) + 80000700: 00638c63 beq x7,x6,80000718 + 80000704: 0d40246f jal x8,800027d8 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 80009047 .word 0x80009047 + 80000714: 00000000 .word 0x00000000 + 80000718: 008a0a13 addi x20,x20,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000071c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000720: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0xcca26bbd4505215e + 80000724: 000b3783 ld x15,0(x22) + 80000728: 008b0b13 addi x22,x22,8 + +000000008000072c : +Zknh_sha256sum0_cg_cp_rd_b7: + sha256sum0 x7, x15 # perform operation + 8000072c: 10079393 sha256sum0 x7,x15 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zknh_sha256sum0_cg_cp_rd_b7, Zknh_sha256sum0_cg_cp_rd_b7_str) + 80000730: 000a3683 ld x13,0(x20) + 80000734: 00768c63 beq x13,x7,8000074c + 80000738: 0c80276f jal x14,80002800 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000907e .word 0x8000907e + 80000748: 00000000 .word 0x00000000 + 8000074c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x0) # load rs1: x0 = 0x6f7cd01f49f16ba9 + 80000750: 000b3003 ld x0,0(x22) + 80000754: 008b0b13 addi x22,x22,8 + +0000000080000758 : +Zknh_sha256sum0_cg_cp_rd_b8: + sha256sum0 x8, x0 # perform operation + 80000758: 10001413 sha256sum0 x8,x0 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zknh_sha256sum0_cg_cp_rd_b8, Zknh_sha256sum0_cg_cp_rd_b8_str) + 8000075c: 000a3683 ld x13,0(x20) + 80000760: 00868c63 beq x13,x8,80000778 + 80000764: 09c0276f jal x14,80002800 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 800090b5 .word 0x800090b5 + 80000774: 00000000 .word 0x00000000 + 80000778: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x0714963a3ee82c8a + 8000077c: 000b3503 ld x10,0(x22) + 80000780: 008b0b13 addi x22,x22,8 + +0000000080000784 : +Zknh_sha256sum0_cg_cp_rd_b9: + sha256sum0 x9, x10 # perform operation + 80000784: 10051493 sha256sum0 x9,x10 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zknh_sha256sum0_cg_cp_rd_b9, Zknh_sha256sum0_cg_cp_rd_b9_str) + 80000788: 000a3683 ld x13,0(x20) + 8000078c: 00968c63 beq x13,x9,800007a4 + 80000790: 0700276f jal x14,80002800 + 80000794: 80000784 .word 0x80000784 + 80000798: 00000000 .word 0x00000000 + 8000079c: 800090ec .word 0x800090ec + 800007a0: 00000000 .word 0x00000000 + 800007a4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x510ee05c72015745 + 800007a8: 000b3c03 ld x24,0(x22) + 800007ac: 008b0b13 addi x22,x22,8 + +00000000800007b0 : +Zknh_sha256sum0_cg_cp_rd_b10: + sha256sum0 x10, x24 # perform operation + 800007b0: 100c1513 sha256sum0 x10,x24 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zknh_sha256sum0_cg_cp_rd_b10, Zknh_sha256sum0_cg_cp_rd_b10_str) + 800007b4: 000a3683 ld x13,0(x20) + 800007b8: 00a68c63 beq x13,x10,800007d0 + 800007bc: 0440276f jal x14,80002800 + 800007c0: 800007b0 .word 0x800007b0 + 800007c4: 00000000 .word 0x00000000 + 800007c8: 80009123 .word 0x80009123 + 800007cc: 00000000 .word 0x00000000 + 800007d0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x1) # load rs1: x1 = 0xcca869cad03652bb + 800007d4: 000b3083 ld x1,0(x22) + 800007d8: 008b0b13 addi x22,x22,8 + +00000000800007dc : +Zknh_sha256sum0_cg_cp_rd_b11: + sha256sum0 x11, x1 # perform operation + 800007dc: 10009593 sha256sum0 x11,x1 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zknh_sha256sum0_cg_cp_rd_b11, Zknh_sha256sum0_cg_cp_rd_b11_str) + 800007e0: 000a3683 ld x13,0(x20) + 800007e4: 00b68c63 beq x13,x11,800007fc + 800007e8: 0180276f jal x14,80002800 + 800007ec: 800007dc .word 0x800007dc + 800007f0: 00000000 .word 0x00000000 + 800007f4: 8000915b .word 0x8000915b + 800007f8: 00000000 .word 0x00000000 + 800007fc: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0xc3140740c955676e + 80000800: 000b3283 ld x5,0(x22) + 80000804: 008b0b13 addi x22,x22,8 + +0000000080000808 : +Zknh_sha256sum0_cg_cp_rd_b12: + sha256sum0 x12, x5 # perform operation + 80000808: 10029613 sha256sum0 x12,x5 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zknh_sha256sum0_cg_cp_rd_b12, Zknh_sha256sum0_cg_cp_rd_b12_str) + 8000080c: 000a3683 ld x13,0(x20) + 80000810: 00c68c63 beq x13,x12,80000828 + 80000814: 7ed0176f jal x14,80002800 + 80000818: 80000808 .word 0x80000808 + 8000081c: 00000000 .word 0x00000000 + 80000820: 80009193 .word 0x80009193 + 80000824: 00000000 .word 0x00000000 + 80000828: 008a0a13 addi x20,x20,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000082c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000830: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x366c8b4dc9c83517 + 80000834: 000b3e03 ld x28,0(x22) + 80000838: 008b0b13 addi x22,x22,8 + +000000008000083c : +Zknh_sha256sum0_cg_cp_rd_b13: + sha256sum0 x13, x28 # perform operation + 8000083c: 100e1693 sha256sum0 x13,x28 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zknh_sha256sum0_cg_cp_rd_b13, Zknh_sha256sum0_cg_cp_rd_b13_str) + 80000840: 000a3203 ld x4,0(x20) + 80000844: 00d20c63 beq x4,x13,8000085c + 80000848: 779012ef jal x5,800027c0 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 800091cb .word 0x800091cb + 80000858: 00000000 .word 0x00000000 + 8000085c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0x899eabbce5a7e2ab + 80000860: 000b3603 ld x12,0(x22) + 80000864: 008b0b13 addi x22,x22,8 + +0000000080000868 : +Zknh_sha256sum0_cg_cp_rd_b14: + sha256sum0 x14, x12 # perform operation + 80000868: 10061713 sha256sum0 x14,x12 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zknh_sha256sum0_cg_cp_rd_b14, Zknh_sha256sum0_cg_cp_rd_b14_str) + 8000086c: 000a3203 ld x4,0(x20) + 80000870: 00e20c63 beq x4,x14,80000888 + 80000874: 74d012ef jal x5,800027c0 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 80009203 .word 0x80009203 + 80000884: 00000000 .word 0x00000000 + 80000888: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0x142fcb5ed43924b2 + 8000088c: 000b3503 ld x10,0(x22) + 80000890: 008b0b13 addi x22,x22,8 + +0000000080000894 : +Zknh_sha256sum0_cg_cp_rd_b15: + sha256sum0 x15, x10 # perform operation + 80000894: 10051793 sha256sum0 x15,x10 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zknh_sha256sum0_cg_cp_rd_b15, Zknh_sha256sum0_cg_cp_rd_b15_str) + 80000898: 000a3203 ld x4,0(x20) + 8000089c: 00f20c63 beq x4,x15,800008b4 + 800008a0: 721012ef jal x5,800027c0 + 800008a4: 80000894 .word 0x80000894 + 800008a8: 00000000 .word 0x00000000 + 800008ac: 8000923b .word 0x8000923b + 800008b0: 00000000 .word 0x00000000 + 800008b4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x24) # load rs1: x24 = 0x84f183b8835e63ba + 800008b8: 000b3c03 ld x24,0(x22) + 800008bc: 008b0b13 addi x22,x22,8 + +00000000800008c0 : +Zknh_sha256sum0_cg_cp_rd_b16: + sha256sum0 x16, x24 # perform operation + 800008c0: 100c1813 sha256sum0 x16,x24 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zknh_sha256sum0_cg_cp_rd_b16, Zknh_sha256sum0_cg_cp_rd_b16_str) + 800008c4: 000a3203 ld x4,0(x20) + 800008c8: 01020c63 beq x4,x16,800008e0 + 800008cc: 6f5012ef jal x5,800027c0 + 800008d0: 800008c0 .word 0x800008c0 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 80009273 .word 0x80009273 + 800008dc: 00000000 .word 0x00000000 + 800008e0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x91cfc03f280fe21f + 800008e4: 000b3483 ld x9,0(x22) + 800008e8: 008b0b13 addi x22,x22,8 + +00000000800008ec : +Zknh_sha256sum0_cg_cp_rd_b17: + sha256sum0 x17, x9 # perform operation + 800008ec: 10049893 sha256sum0 x17,x9 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zknh_sha256sum0_cg_cp_rd_b17, Zknh_sha256sum0_cg_cp_rd_b17_str) + 800008f0: 000a3203 ld x4,0(x20) + 800008f4: 01120c63 beq x4,x17,8000090c + 800008f8: 6c9012ef jal x5,800027c0 + 800008fc: 800008ec .word 0x800008ec + 80000900: 00000000 .word 0x00000000 + 80000904: 800092ab .word 0x800092ab + 80000908: 00000000 .word 0x00000000 + 8000090c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x26) # load rs1: x26 = 0xa48785361946b269 + 80000910: 000b3d03 ld x26,0(x22) + 80000914: 008b0b13 addi x22,x22,8 + +0000000080000918 : +Zknh_sha256sum0_cg_cp_rd_b18: + sha256sum0 x18, x26 # perform operation + 80000918: 100d1913 sha256sum0 x18,x26 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zknh_sha256sum0_cg_cp_rd_b18, Zknh_sha256sum0_cg_cp_rd_b18_str) + 8000091c: 000a3203 ld x4,0(x20) + 80000920: 01220c63 beq x4,x18,80000938 + 80000924: 69d012ef jal x5,800027c0 + 80000928: 80000918 .word 0x80000918 + 8000092c: 00000000 .word 0x00000000 + 80000930: 800092e3 .word 0x800092e3 + 80000934: 00000000 .word 0x00000000 + 80000938: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0xb6c0f9b71af45901 + 8000093c: 000b3903 ld x18,0(x22) + 80000940: 008b0b13 addi x22,x22,8 + +0000000080000944 : +Zknh_sha256sum0_cg_cp_rd_b19: + sha256sum0 x19, x18 # perform operation + 80000944: 10091993 sha256sum0 x19,x18 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zknh_sha256sum0_cg_cp_rd_b19, Zknh_sha256sum0_cg_cp_rd_b19_str) + 80000948: 000a3203 ld x4,0(x20) + 8000094c: 01320c63 beq x4,x19,80000964 + 80000950: 671012ef jal x5,800027c0 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 8000931b .word 0x8000931b + 80000960: 00000000 .word 0x00000000 + 80000964: 008a0a13 addi x20,x20,8 + + mv x6, x20 # switch signature pointer register to avoid conflict with test + 80000968: 000a0313 addi x6,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0xbb2a20cd0994fc0d + 8000096c: 000b3683 ld x13,0(x22) + 80000970: 008b0b13 addi x22,x22,8 + +0000000080000974 : +Zknh_sha256sum0_cg_cp_rd_b20: + sha256sum0 x20, x13 # perform operation + 80000974: 10069a13 sha256sum0 x20,x13 + # Check if x20 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x20, Zknh_sha256sum0_cg_cp_rd_b20, Zknh_sha256sum0_cg_cp_rd_b20_str) + 80000978: 00033203 ld x4,0(x6) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xc4a6189544ac73ff + 80000998: 000b3103 ld x2,0(x22) + 8000099c: 008b0b13 addi x22,x22,8 + +00000000800009a0 : +Zknh_sha256sum0_cg_cp_rd_b21: + sha256sum0 x21, x2 # perform operation + 800009a0: 10011a93 sha256sum0 x21,x2 + # Check if x21 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x21, Zknh_sha256sum0_cg_cp_rd_b21, Zknh_sha256sum0_cg_cp_rd_b21_str) + 800009a4: 00033203 ld x4,0(x6) + 800009a8: 01520c63 beq x4,x21,800009c0 + 800009ac: 615012ef jal x5,800027c0 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000938b .word 0x8000938b + 800009bc: 00000000 .word 0x00000000 + 800009c0: 00830313 addi x6,x6,8 + + mv x12, x22 # switch data pointer register to avoid conflict with test + 800009c4: 000b0613 addi x12,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xfbaae18adb577cbd + 800009c8: 00063183 ld x3,0(x12) + 800009cc: 00860613 addi x12,x12,8 + +00000000800009d0 : +Zknh_sha256sum0_cg_cp_rd_b22: + sha256sum0 x22, x3 # perform operation + 800009d0: 10019b13 sha256sum0 x22,x3 + # Check if x22 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x22, Zknh_sha256sum0_cg_cp_rd_b22, Zknh_sha256sum0_cg_cp_rd_b22_str) + 800009d4: 00033203 ld x4,0(x6) + 800009d8: 01620c63 beq x4,x22,800009f0 + 800009dc: 5e5012ef jal x5,800027c0 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 800093c3 .word 0x800093c3 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0xcbe95e35c88df2ef + 800009f4: 00063883 ld x17,0(x12) + 800009f8: 00860613 addi x12,x12,8 + +00000000800009fc : +Zknh_sha256sum0_cg_cp_rd_b23: + sha256sum0 x23, x17 # perform operation + 800009fc: 10089b93 sha256sum0 x23,x17 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknh_sha256sum0_cg_cp_rd_b23, Zknh_sha256sum0_cg_cp_rd_b23_str) + 80000a00: 00033203 ld x4,0(x6) + 80000a04: 01720c63 beq x4,x23,80000a1c + 80000a08: 5b9012ef jal x5,800027c0 + 80000a0c: 800009fc .word 0x800009fc + 80000a10: 00000000 .word 0x00000000 + 80000a14: 800093fb .word 0x800093fb + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xd8cbcd1e9f72389b + 80000a20: 00063c83 ld x25,0(x12) + 80000a24: 00860613 addi x12,x12,8 + +0000000080000a28 : +Zknh_sha256sum0_cg_cp_rd_b24: + sha256sum0 x24, x25 # perform operation + 80000a28: 100c9c13 sha256sum0 x24,x25 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zknh_sha256sum0_cg_cp_rd_b24, Zknh_sha256sum0_cg_cp_rd_b24_str) + 80000a2c: 00033203 ld x4,0(x6) + 80000a30: 01820c63 beq x4,x24,80000a48 + 80000a34: 58d012ef jal x5,800027c0 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009433 .word 0x80009433 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xd5088baddcd13c93 + 80000a4c: 00063d03 ld x26,0(x12) + 80000a50: 00860613 addi x12,x12,8 + +0000000080000a54 : +Zknh_sha256sum0_cg_cp_rd_b25: + sha256sum0 x25, x26 # perform operation + 80000a54: 100d1c93 sha256sum0 x25,x26 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zknh_sha256sum0_cg_cp_rd_b25, Zknh_sha256sum0_cg_cp_rd_b25_str) + 80000a58: 00033203 ld x4,0(x6) + 80000a5c: 01920c63 beq x4,x25,80000a74 + 80000a60: 561012ef jal x5,800027c0 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000946b .word 0x8000946b + 80000a70: 00000000 .word 0x00000000 + 80000a74: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x8ef993a6ea399cd4 + 80000a78: 00063103 ld x2,0(x12) + 80000a7c: 00860613 addi x12,x12,8 + +0000000080000a80 : +Zknh_sha256sum0_cg_cp_rd_b26: + sha256sum0 x26, x2 # perform operation + 80000a80: 10011d13 sha256sum0 x26,x2 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zknh_sha256sum0_cg_cp_rd_b26, Zknh_sha256sum0_cg_cp_rd_b26_str) + 80000a84: 00033203 ld x4,0(x6) + 80000a88: 01a20c63 beq x4,x26,80000aa0 + 80000a8c: 535012ef jal x5,800027c0 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 800094a3 .word 0x800094a3 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0xfe72136b6a683310 + 80000aa4: 00063a83 ld x21,0(x12) + 80000aa8: 00860613 addi x12,x12,8 + +0000000080000aac : +Zknh_sha256sum0_cg_cp_rd_b27: + sha256sum0 x27, x21 # perform operation + 80000aac: 100a9d93 sha256sum0 x27,x21 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zknh_sha256sum0_cg_cp_rd_b27, Zknh_sha256sum0_cg_cp_rd_b27_str) + 80000ab0: 00033203 ld x4,0(x6) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 509012ef jal x5,800027c0 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094db .word 0x800094db + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x2b1da6e7118ea042 + 80000ad0: 00063b03 ld x22,0(x12) + 80000ad4: 00860613 addi x12,x12,8 + +0000000080000ad8 : +Zknh_sha256sum0_cg_cp_rd_b28: + sha256sum0 x28, x22 # perform operation + 80000ad8: 100b1e13 sha256sum0 x28,x22 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zknh_sha256sum0_cg_cp_rd_b28, Zknh_sha256sum0_cg_cp_rd_b28_str) + 80000adc: 00033203 ld x4,0(x6) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 4dd012ef jal x5,800027c0 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 80009513 .word 0x80009513 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xe6dc984e3e8313b4 + 80000afc: 00063c83 ld x25,0(x12) + 80000b00: 00860613 addi x12,x12,8 + +0000000080000b04 : +Zknh_sha256sum0_cg_cp_rd_b29: + sha256sum0 x29, x25 # perform operation + 80000b04: 100c9e93 sha256sum0 x29,x25 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zknh_sha256sum0_cg_cp_rd_b29, Zknh_sha256sum0_cg_cp_rd_b29_str) + 80000b08: 00033203 ld x4,0(x6) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 4b1012ef jal x5,800027c0 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 8000954b .word 0x8000954b + 80000b20: 00000000 .word 0x00000000 + 80000b24: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xc0cb2ecc43a358e2 + 80000b28: 00063c03 ld x24,0(x12) + 80000b2c: 00860613 addi x12,x12,8 + +0000000080000b30 : +Zknh_sha256sum0_cg_cp_rd_b30: + sha256sum0 x30, x24 # perform operation + 80000b30: 100c1f13 sha256sum0 x30,x24 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zknh_sha256sum0_cg_cp_rd_b30, Zknh_sha256sum0_cg_cp_rd_b30_str) + 80000b34: 00033203 ld x4,0(x6) + 80000b38: 01e20c63 beq x4,x30,80000b50 + 80000b3c: 485012ef jal x5,800027c0 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 80009583 .word 0x80009583 + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 00830313 addi x6,x6,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0x5a519e187e72a344 + 80000b54: 00063c83 ld x25,0(x12) + 80000b58: 00860613 addi x12,x12,8 + +0000000080000b5c : +Zknh_sha256sum0_cg_cp_rd_b31: + sha256sum0 x31, x25 # perform operation + 80000b5c: 100c9f93 sha256sum0 x31,x25 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zknh_sha256sum0_cg_cp_rd_b31, Zknh_sha256sum0_cg_cp_rd_b31_str) + 80000b60: 00033203 ld x4,0(x6) + 80000b64: 01f20c63 beq x4,x31,80000b7c + 80000b68: 459012ef jal x5,800027c0 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 800095bb .word 0x800095bb + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x0000000000000000 + 80000b80: 00063783 ld x15,0(x12) + 80000b84: 00860613 addi x12,x12,8 + +0000000080000b88 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x0: + sha256sum0 x18, x15 # perform operation + 80000b88: 10079913 sha256sum0 x18,x15 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zknh_sha256sum0_cg_cp_rs1_edges_0x0, Zknh_sha256sum0_cg_cp_rs1_edges_0x0_str) + 80000b8c: 00033203 ld x4,0(x6) + 80000b90: 01220c63 beq x4,x18,80000ba8 + 80000b94: 42d012ef jal x5,800027c0 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 800095f3 .word 0x800095f3 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x0000000000000001 + 80000bac: 00063183 ld x3,0(x12) + 80000bb0: 00860613 addi x12,x12,8 + +0000000080000bb4 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x1: + sha256sum0 x15, x3 # perform operation + 80000bb4: 10019793 sha256sum0 x15,x3 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zknh_sha256sum0_cg_cp_rs1_edges_0x1, Zknh_sha256sum0_cg_cp_rs1_edges_0x1_str) + 80000bb8: 00033203 ld x4,0(x6) + 80000bbc: 00f20c63 beq x4,x15,80000bd4 + 80000bc0: 401012ef jal x5,800027c0 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80009632 .word 0x80009632 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x0000000000000002 + 80000bd8: 00063983 ld x19,0(x12) + 80000bdc: 00860613 addi x12,x12,8 + +0000000080000be0 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x2: + sha256sum0 x17, x19 # perform operation + 80000be0: 10099893 sha256sum0 x17,x19 + # Check if x17 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x17, Zknh_sha256sum0_cg_cp_rs1_edges_0x2, Zknh_sha256sum0_cg_cp_rs1_edges_0x2_str) + 80000be4: 00033203 ld x4,0(x6) + 80000be8: 01120c63 beq x4,x17,80000c00 + 80000bec: 3d5012ef jal x5,800027c0 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 80009671 .word 0x80009671 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x8000000000000000 + 80000c04: 00063e83 ld x29,0(x12) + 80000c08: 00860613 addi x12,x12,8 + +0000000080000c0c : +Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000000: + sha256sum0 x27, x29 # perform operation + 80000c0c: 100e9d93 sha256sum0 x27,x29 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 00033203 ld x4,0(x6) + 80000c14: 01b20c63 beq x4,x27,80000c2c + 80000c18: 3a9012ef jal x5,800027c0 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 800096b0 .word 0x800096b0 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x8000000000000001 + 80000c30: 00063a03 ld x20,0(x12) + 80000c34: 00860613 addi x12,x12,8 + +0000000080000c38 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000001: + sha256sum0 x3, x20 # perform operation + 80000c38: 100a1193 sha256sum0 x3,x20 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha256sum0_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 00033203 ld x4,0(x6) + 80000c40: 00320c63 beq x4,x3,80000c58 + 80000c44: 37d012ef jal x5,800027c0 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 800096fe .word 0x800096fe + 80000c54: 00000000 .word 0x00000000 + 80000c58: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x7fffffffffffffff + 80000c5c: 00063f03 ld x30,0(x12) + 80000c60: 00860613 addi x12,x12,8 + +0000000080000c64 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffffffffffff: + sha256sum0 x2, x30 # perform operation + 80000c64: 100f1113 sha256sum0 x2,x30 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha256sum0_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 00033203 ld x4,0(x6) + 80000c6c: 00220c63 beq x4,x2,80000c84 + 80000c70: 351012ef jal x5,800027c0 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 8000974c .word 0x8000974c + 80000c80: 00000000 .word 0x00000000 + 80000c84: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7ffffffffffffffe + 80000c88: 00063e83 ld x29,0(x12) + 80000c8c: 00860613 addi x12,x12,8 + +0000000080000c90 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha256sum0 x25, x29 # perform operation + 80000c90: 100e9c93 sha256sum0 x25,x29 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha256sum0_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 00033203 ld x4,0(x6) + 80000c98: 01920c63 beq x4,x25,80000cb0 + 80000c9c: 325012ef jal x5,800027c0 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000979a .word 0x8000979a + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xffffffffffffffff + 80000cb4: 00063683 ld x13,0(x12) + 80000cb8: 00860613 addi x12,x12,8 + +0000000080000cbc : +Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffffffffffff: + sha256sum0 x15, x13 # perform operation + 80000cbc: 10069793 sha256sum0 x15,x13 + # Check if x15 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x15, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 00033203 ld x4,0(x6) + 80000cc4: 00f20c63 beq x4,x15,80000cdc + 80000cc8: 2f9012ef jal x5,800027c0 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800097e8 .word 0x800097e8 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0xfffffffffffffffe + 80000ce0: 00063d03 ld x26,0(x12) + 80000ce4: 00860613 addi x12,x12,8 + +0000000080000ce8 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffffffffffe: + sha256sum0 x7, x26 # perform operation + 80000ce8: 100d1393 sha256sum0 x7,x26 + # Check if x7 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x7, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 00033203 ld x4,0(x6) + 80000cf0: 00720c63 beq x4,x7,80000d08 + 80000cf4: 2cd012ef jal x5,800027c0 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009836 .word 0x80009836 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x5bbc887763ae86f2 + 80000d0c: 00063e83 ld x29,0(x12) + 80000d10: 00860613 addi x12,x12,8 + +0000000080000d14 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha256sum0 x3, x29 # perform operation + 80000d14: 100e9193 sha256sum0 x3,x29 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha256sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 00033203 ld x4,0(x6) + 80000d1c: 00320c63 beq x4,x3,80000d34 + 80000d20: 2a1012ef jal x5,800027c0 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 80009884 .word 0x80009884 + 80000d30: 00000000 .word 0x00000000 + 80000d34: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80000d38: 00063703 ld x14,0(x12) + 80000d3c: 00860613 addi x12,x12,8 + +0000000080000d40 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha256sum0 x18, x14 # perform operation + 80000d40: 10071913 sha256sum0 x18,x14 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha256sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 00033203 ld x4,0(x6) + 80000d48: 01220c63 beq x4,x18,80000d60 + 80000d4c: 275012ef jal x5,800027c0 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 800098d2 .word 0x800098d2 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x5555555555555555 + 80000d64: 00063a03 ld x20,0(x12) + 80000d68: 00860613 addi x12,x12,8 + +0000000080000d6c : +Zknh_sha256sum0_cg_cp_rs1_edges_0x5555555555555555: + sha256sum0 x23, x20 # perform operation + 80000d6c: 100a1b93 sha256sum0 x23,x20 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknh_sha256sum0_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha256sum0_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 00033203 ld x4,0(x6) + 80000d74: 01720c63 beq x4,x23,80000d8c + 80000d78: 249012ef jal x5,800027c0 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 80009920 .word 0x80009920 + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x00000000ffffffff + 80000d90: 00063383 ld x7,0(x12) + 80000d94: 00860613 addi x12,x12,8 + +0000000080000d98 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff: + sha256sum0 x1, x7 # perform operation + 80000d98: 10039093 sha256sum0 x1,x7 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sum0_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 00033203 ld x4,0(x6) + 80000da0: 00120c63 beq x4,x1,80000db8 + 80000da4: 21d012ef jal x5,800027c0 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000996e .word 0x8000996e + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x00000000fffffffe + 80000dbc: 00063883 ld x17,0(x12) + 80000dc0: 00860613 addi x12,x12,8 + +0000000080000dc4 : +Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe: + sha256sum0 x19, x17 # perform operation + 80000dc4: 10089993 sha256sum0 x19,x17 + # Check if x19 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x19, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sum0_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 00033203 ld x4,0(x6) + 80000dcc: 01320c63 beq x4,x19,80000de4 + 80000dd0: 1f1012ef jal x5,800027c0 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800099b4 .word 0x800099b4 + 80000de0: 00000000 .word 0x00000000 + 80000de4: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x0000000100000000 + 80000de8: 00063583 ld x11,0(x12) + 80000dec: 00860613 addi x12,x12,8 + +0000000080000df0 : +Zknh_sha256sum0_cg_cp_rs1_edges_0x100000000: + sha256sum0 x23, x11 # perform operation + 80000df0: 10059b93 sha256sum0 x23,x11 + # Check if x23 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x23, Zknh_sha256sum0_cg_cp_rs1_edges_0x100000000, Zknh_sha256sum0_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 00033203 ld x4,0(x6) + 80000df8: 01720c63 beq x4,x23,80000e10 + 80000dfc: 1c5012ef jal x5,800027c0 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 800099fa .word 0x800099fa + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 00830313 addi x6,x6,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0x0000000100000001 + 80000e14: 00063803 ld x16,0(x12) + 80000e18: 00860613 addi x12,x12,8 + +0000000080000e1c : +Zknh_sha256sum0_cg_cp_rs1_edges_0x100000001: + sha256sum0 x18, x16 # perform operation + 80000e1c: 10081913 sha256sum0 x18,x16 + # Check if x18 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x18, Zknh_sha256sum0_cg_cp_rs1_edges_0x100000001, Zknh_sha256sum0_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 00033203 ld x4,0(x6) + 80000e24: 01220c63 beq x4,x18,80000e3c + 80000e28: 199012ef jal x5,800027c0 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009a41 .word 0x80009a41 + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 00830313 addi x6,x6,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0xfec452059fe6bc51 + 80000e40: 00063003 ld x0,0(x12) + 80000e44: 00860613 addi x12,x12,8 + +0000000080000e48 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b0: + sha256sum0 x0, x0 # perform operation + 80000e48: 10001013 sha256sum0 x0,x0 + # Check if x0 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x0, Zknh_sha256sum0_cg_cmp_rd_rs1_b0, Zknh_sha256sum0_cg_cmp_rd_rs1_b0_str) + 80000e4c: 00033203 ld x4,0(x6) + 80000e50: 00020c63 beq x4,x0,80000e68 + 80000e54: 16d012ef jal x5,800027c0 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 80009a88 .word 0x80009a88 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xdbdfbbfe7ca7c258 + 80000e6c: 00063083 ld x1,0(x12) + 80000e70: 00860613 addi x12,x12,8 + +0000000080000e74 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b1: + sha256sum0 x1, x1 # perform operation + 80000e74: 10009093 sha256sum0 x1,x1 + # Check if x1 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x1, Zknh_sha256sum0_cg_cmp_rd_rs1_b1, Zknh_sha256sum0_cg_cmp_rd_rs1_b1_str) + 80000e78: 00033203 ld x4,0(x6) + 80000e7c: 00120c63 beq x4,x1,80000e94 + 80000e80: 141012ef jal x5,800027c0 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 80009ac4 .word 0x80009ac4 + 80000e90: 00000000 .word 0x00000000 + 80000e94: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0xc3b2884030c74a37 + 80000e98: 00063103 ld x2,0(x12) + 80000e9c: 00860613 addi x12,x12,8 + +0000000080000ea0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b2: + sha256sum0 x2, x2 # perform operation + 80000ea0: 10011113 sha256sum0 x2,x2 + # Check if x2 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x2, Zknh_sha256sum0_cg_cmp_rd_rs1_b2, Zknh_sha256sum0_cg_cmp_rd_rs1_b2_str) + 80000ea4: 00033203 ld x4,0(x6) + 80000ea8: 00220c63 beq x4,x2,80000ec0 + 80000eac: 115012ef jal x5,800027c0 + 80000eb0: 80000ea0 .word 0x80000ea0 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 80009b00 .word 0x80009b00 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x5293d8e05bbd85dc + 80000ec4: 00063183 ld x3,0(x12) + 80000ec8: 00860613 addi x12,x12,8 + +0000000080000ecc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b3: + sha256sum0 x3, x3 # perform operation + 80000ecc: 10019193 sha256sum0 x3,x3 + # Check if x3 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x3, Zknh_sha256sum0_cg_cmp_rd_rs1_b3, Zknh_sha256sum0_cg_cmp_rd_rs1_b3_str) + 80000ed0: 00033203 ld x4,0(x6) + 80000ed4: 00320c63 beq x4,x3,80000eec + 80000ed8: 0e9012ef jal x5,800027c0 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 80009b3c .word 0x80009b3c + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00830313 addi x6,x6,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000ef4: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x87c49f4a404c6d28 + 80000ef8: 00063203 ld x4,0(x12) + 80000efc: 00860613 addi x12,x12,8 + +0000000080000f00 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b4: + sha256sum0 x4, x4 # perform operation + 80000f00: 10021213 sha256sum0 x4,x4 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zknh_sha256sum0_cg_cmp_rd_rs1_b4, Zknh_sha256sum0_cg_cmp_rd_rs1_b4_str) + 80000f04: 00033383 ld x7,0(x6) + 80000f08: 00438c63 beq x7,x4,80000f20 + 80000f0c: 0cd0146f jal x8,800027d8 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 80009b78 .word 0x80009b78 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x00ee114302b14bc5 + 80000f24: 00063283 ld x5,0(x12) + 80000f28: 00860613 addi x12,x12,8 + +0000000080000f2c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b5: + sha256sum0 x5, x5 # perform operation + 80000f2c: 10029293 sha256sum0 x5,x5 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zknh_sha256sum0_cg_cmp_rd_rs1_b5, Zknh_sha256sum0_cg_cmp_rd_rs1_b5_str) + 80000f30: 00033383 ld x7,0(x6) + 80000f34: 00538c63 beq x7,x5,80000f4c + 80000f38: 0a10146f jal x8,800027d8 + 80000f3c: 80000f2c .word 0x80000f2c + 80000f40: 00000000 .word 0x00000000 + 80000f44: 80009bb4 .word 0x80009bb4 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 00830313 addi x6,x6,8 + + mv x9, x6 # switch signature pointer register to avoid conflict with test + 80000f50: 00030493 addi x9,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x60232280a8e6426a + 80000f54: 00063303 ld x6,0(x12) + 80000f58: 00860613 addi x12,x12,8 + +0000000080000f5c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b6: + sha256sum0 x6, x6 # perform operation + 80000f5c: 10031313 sha256sum0 x6,x6 + # Check if x6 contains the expected result. x9 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x9, x8, x7, x6, Zknh_sha256sum0_cg_cmp_rd_rs1_b6, Zknh_sha256sum0_cg_cmp_rd_rs1_b6_str) + 80000f60: 0004b383 ld x7,0(x9) + 80000f64: 00638c63 beq x7,x6,80000f7c + 80000f68: 0710146f jal x8,800027d8 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bf0 .word 0x80009bf0 + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 00848493 addi x9,x9,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f80: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f84: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x68aa98ffe1fc5b34 + 80000f88: 00063383 ld x7,0(x12) + 80000f8c: 00860613 addi x12,x12,8 + +0000000080000f90 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b7: + sha256sum0 x7, x7 # perform operation + 80000f90: 10039393 sha256sum0 x7,x7 + # Check if x7 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x7, Zknh_sha256sum0_cg_cmp_rd_rs1_b7, Zknh_sha256sum0_cg_cmp_rd_rs1_b7_str) + 80000f94: 0004b203 ld x4,0(x9) + 80000f98: 00720c63 beq x4,x7,80000fb0 + 80000f9c: 025012ef jal x5,800027c0 + 80000fa0: 80000f90 .word 0x80000f90 + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 80009c2c .word 0x80009c2c + 80000fac: 00000000 .word 0x00000000 + 80000fb0: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0x52630d26effefcd4 + 80000fb4: 00063403 ld x8,0(x12) + 80000fb8: 00860613 addi x12,x12,8 + +0000000080000fbc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b8: + sha256sum0 x8, x8 # perform operation + 80000fbc: 10041413 sha256sum0 x8,x8 + # Check if x8 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x8, Zknh_sha256sum0_cg_cmp_rd_rs1_b8, Zknh_sha256sum0_cg_cmp_rd_rs1_b8_str) + 80000fc0: 0004b203 ld x4,0(x9) + 80000fc4: 00820c63 beq x4,x8,80000fdc + 80000fc8: 7f8012ef jal x5,800027c0 + 80000fcc: 80000fbc .word 0x80000fbc + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 80009c68 .word 0x80009c68 + 80000fd8: 00000000 .word 0x00000000 + 80000fdc: 00848493 addi x9,x9,8 + + mv x21, x9 # switch signature pointer register to avoid conflict with test + 80000fe0: 00048a93 addi x21,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x8597d2020add35de + 80000fe4: 00063483 ld x9,0(x12) + 80000fe8: 00860613 addi x12,x12,8 + +0000000080000fec : +Zknh_sha256sum0_cg_cmp_rd_rs1_b9: + sha256sum0 x9, x9 # perform operation + 80000fec: 10049493 sha256sum0 x9,x9 + # Check if x9 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x9, Zknh_sha256sum0_cg_cmp_rd_rs1_b9, Zknh_sha256sum0_cg_cmp_rd_rs1_b9_str) + 80000ff0: 000ab203 ld x4,0(x21) + 80000ff4: 00920c63 beq x4,x9,8000100c + 80000ff8: 7c8012ef jal x5,800027c0 + 80000ffc: 80000fec .word 0x80000fec + 80001000: 00000000 .word 0x00000000 + 80001004: 80009ca4 .word 0x80009ca4 + 80001008: 00000000 .word 0x00000000 + 8000100c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x58a780b1fce9dbcb + 80001010: 00063503 ld x10,0(x12) + 80001014: 00860613 addi x12,x12,8 + +0000000080001018 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b10: + sha256sum0 x10, x10 # perform operation + 80001018: 10051513 sha256sum0 x10,x10 + # Check if x10 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x10, Zknh_sha256sum0_cg_cmp_rd_rs1_b10, Zknh_sha256sum0_cg_cmp_rd_rs1_b10_str) + 8000101c: 000ab203 ld x4,0(x21) + 80001020: 00a20c63 beq x4,x10,80001038 + 80001024: 79c012ef jal x5,800027c0 + 80001028: 80001018 .word 0x80001018 + 8000102c: 00000000 .word 0x00000000 + 80001030: 80009ce0 .word 0x80009ce0 + 80001034: 00000000 .word 0x00000000 + 80001038: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x572091232275a690 + 8000103c: 00063583 ld x11,0(x12) + 80001040: 00860613 addi x12,x12,8 + +0000000080001044 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b11: + sha256sum0 x11, x11 # perform operation + 80001044: 10059593 sha256sum0 x11,x11 + # Check if x11 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x11, Zknh_sha256sum0_cg_cmp_rd_rs1_b11, Zknh_sha256sum0_cg_cmp_rd_rs1_b11_str) + 80001048: 000ab203 ld x4,0(x21) + 8000104c: 00b20c63 beq x4,x11,80001064 + 80001050: 770012ef jal x5,800027c0 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 80009d1d .word 0x80009d1d + 80001060: 00000000 .word 0x00000000 + 80001064: 008a8a93 addi x21,x21,8 + + mv x25, x12 # switch data pointer register to avoid conflict with test + 80001068: 00060c93 addi x25,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x25, x12) # load rs1: x12 = 0x8200e7b1bc7cd7e2 + 8000106c: 000cb603 ld x12,0(x25) + 80001070: 008c8c93 addi x25,x25,8 + +0000000080001074 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b12: + sha256sum0 x12, x12 # perform operation + 80001074: 10061613 sha256sum0 x12,x12 + # Check if x12 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x12, Zknh_sha256sum0_cg_cmp_rd_rs1_b12, Zknh_sha256sum0_cg_cmp_rd_rs1_b12_str) + 80001078: 000ab203 ld x4,0(x21) + 8000107c: 00c20c63 beq x4,x12,80001094 + 80001080: 740012ef jal x5,800027c0 + 80001084: 80001074 .word 0x80001074 + 80001088: 00000000 .word 0x00000000 + 8000108c: 80009d5a .word 0x80009d5a + 80001090: 00000000 .word 0x00000000 + 80001094: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x25, x13) # load rs1: x13 = 0x6813e95a637d5c4c + 80001098: 000cb683 ld x13,0(x25) + 8000109c: 008c8c93 addi x25,x25,8 + +00000000800010a0 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b13: + sha256sum0 x13, x13 # perform operation + 800010a0: 10069693 sha256sum0 x13,x13 + # Check if x13 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x13, Zknh_sha256sum0_cg_cmp_rd_rs1_b13, Zknh_sha256sum0_cg_cmp_rd_rs1_b13_str) + 800010a4: 000ab203 ld x4,0(x21) + 800010a8: 00d20c63 beq x4,x13,800010c0 + 800010ac: 714012ef jal x5,800027c0 + 800010b0: 800010a0 .word 0x800010a0 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 80009d97 .word 0x80009d97 + 800010bc: 00000000 .word 0x00000000 + 800010c0: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x25, x14) # load rs1: x14 = 0xd5b188b12ab07193 + 800010c4: 000cb703 ld x14,0(x25) + 800010c8: 008c8c93 addi x25,x25,8 + +00000000800010cc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b14: + sha256sum0 x14, x14 # perform operation + 800010cc: 10071713 sha256sum0 x14,x14 + # Check if x14 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x14, Zknh_sha256sum0_cg_cmp_rd_rs1_b14, Zknh_sha256sum0_cg_cmp_rd_rs1_b14_str) + 800010d0: 000ab203 ld x4,0(x21) + 800010d4: 00e20c63 beq x4,x14,800010ec + 800010d8: 6e8012ef jal x5,800027c0 + 800010dc: 800010cc .word 0x800010cc + 800010e0: 00000000 .word 0x00000000 + 800010e4: 80009dd4 .word 0x80009dd4 + 800010e8: 00000000 .word 0x00000000 + 800010ec: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x25, x15) # load rs1: x15 = 0x7d4c9a4592bdd29b + 800010f0: 000cb783 ld x15,0(x25) + 800010f4: 008c8c93 addi x25,x25,8 + +00000000800010f8 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b15: + sha256sum0 x15, x15 # perform operation + 800010f8: 10079793 sha256sum0 x15,x15 + # Check if x15 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x15, Zknh_sha256sum0_cg_cmp_rd_rs1_b15, Zknh_sha256sum0_cg_cmp_rd_rs1_b15_str) + 800010fc: 000ab203 ld x4,0(x21) + 80001100: 00f20c63 beq x4,x15,80001118 + 80001104: 6bc012ef jal x5,800027c0 + 80001108: 800010f8 .word 0x800010f8 + 8000110c: 00000000 .word 0x00000000 + 80001110: 80009e11 .word 0x80009e11 + 80001114: 00000000 .word 0x00000000 + 80001118: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x25, x16) # load rs1: x16 = 0xd4e7be3a1004575b + 8000111c: 000cb803 ld x16,0(x25) + 80001120: 008c8c93 addi x25,x25,8 + +0000000080001124 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b16: + sha256sum0 x16, x16 # perform operation + 80001124: 10081813 sha256sum0 x16,x16 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha256sum0_cg_cmp_rd_rs1_b16, Zknh_sha256sum0_cg_cmp_rd_rs1_b16_str) + 80001128: 000ab203 ld x4,0(x21) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 690012ef jal x5,800027c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009e4e .word 0x80009e4e + 80001140: 00000000 .word 0x00000000 + 80001144: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x25, x17) # load rs1: x17 = 0x2312cc411b669518 + 80001148: 000cb883 ld x17,0(x25) + 8000114c: 008c8c93 addi x25,x25,8 + +0000000080001150 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b17: + sha256sum0 x17, x17 # perform operation + 80001150: 10089893 sha256sum0 x17,x17 + # Check if x17 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x17, Zknh_sha256sum0_cg_cmp_rd_rs1_b17, Zknh_sha256sum0_cg_cmp_rd_rs1_b17_str) + 80001154: 000ab203 ld x4,0(x21) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009e8b .word 0x80009e8b + 8000116c: 00000000 .word 0x00000000 + 80001170: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x25, x18) # load rs1: x18 = 0x07d5e6f0db601915 + 80001174: 000cb903 ld x18,0(x25) + 80001178: 008c8c93 addi x25,x25,8 + +000000008000117c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b18: + sha256sum0 x18, x18 # perform operation + 8000117c: 10091913 sha256sum0 x18,x18 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha256sum0_cg_cmp_rd_rs1_b18, Zknh_sha256sum0_cg_cmp_rd_rs1_b18_str) + 80001180: 000ab203 ld x4,0(x21) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009ec8 .word 0x80009ec8 + 80001198: 00000000 .word 0x00000000 + 8000119c: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x25, x19) # load rs1: x19 = 0xff8746f5790f023c + 800011a0: 000cb983 ld x19,0(x25) + 800011a4: 008c8c93 addi x25,x25,8 + +00000000800011a8 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b19: + sha256sum0 x19, x19 # perform operation + 800011a8: 10099993 sha256sum0 x19,x19 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha256sum0_cg_cmp_rd_rs1_b19, Zknh_sha256sum0_cg_cmp_rd_rs1_b19_str) + 800011ac: 000ab203 ld x4,0(x21) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009f05 .word 0x80009f05 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008a8a93 addi x21,x21,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0xa74390a9df18a0cf + 800011cc: 000cba03 ld x20,0(x25) + 800011d0: 008c8c93 addi x25,x25,8 + +00000000800011d4 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b20: + sha256sum0 x20, x20 # perform operation + 800011d4: 100a1a13 sha256sum0 x20,x20 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha256sum0_cg_cmp_rd_rs1_b20, Zknh_sha256sum0_cg_cmp_rd_rs1_b20_str) + 800011d8: 000ab203 ld x4,0(x21) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009f43 .word 0x80009f43 + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008a8a93 addi x21,x21,8 + + mv x24, x21 # switch signature pointer register to avoid conflict with test + 800011f8: 000a8c13 addi x24,x21,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0xda6709fb008640e0 + 800011fc: 000cba83 ld x21,0(x25) + 80001200: 008c8c93 addi x25,x25,8 + +0000000080001204 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b21: + sha256sum0 x21, x21 # perform operation + 80001204: 100a9a93 sha256sum0 x21,x21 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknh_sha256sum0_cg_cmp_rd_rs1_b21, Zknh_sha256sum0_cg_cmp_rd_rs1_b21_str) + 80001208: 000c3203 ld x4,0(x24) + 8000120c: 01520c63 beq x4,x21,80001224 + 80001210: 5b0012ef jal x5,800027c0 + 80001214: 80001204 .word 0x80001204 + 80001218: 00000000 .word 0x00000000 + 8000121c: 80009f81 .word 0x80009f81 + 80001220: 00000000 .word 0x00000000 + 80001224: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0xf0cb94a7d7a255ac + 80001228: 000cbb03 ld x22,0(x25) + 8000122c: 008c8c93 addi x25,x25,8 + +0000000080001230 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b22: + sha256sum0 x22, x22 # perform operation + 80001230: 100b1b13 sha256sum0 x22,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zknh_sha256sum0_cg_cmp_rd_rs1_b22, Zknh_sha256sum0_cg_cmp_rd_rs1_b22_str) + 80001234: 000c3203 ld x4,0(x24) + 80001238: 01620c63 beq x4,x22,80001250 + 8000123c: 584012ef jal x5,800027c0 + 80001240: 80001230 .word 0x80001230 + 80001244: 00000000 .word 0x00000000 + 80001248: 80009fbf .word 0x80009fbf + 8000124c: 00000000 .word 0x00000000 + 80001250: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x2f268a085f710e8f + 80001254: 000cbb83 ld x23,0(x25) + 80001258: 008c8c93 addi x25,x25,8 + +000000008000125c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b23: + sha256sum0 x23, x23 # perform operation + 8000125c: 100b9b93 sha256sum0 x23,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zknh_sha256sum0_cg_cmp_rd_rs1_b23, Zknh_sha256sum0_cg_cmp_rd_rs1_b23_str) + 80001260: 000c3203 ld x4,0(x24) + 80001264: 01720c63 beq x4,x23,8000127c + 80001268: 558012ef jal x5,800027c0 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 80009ffd .word 0x80009ffd + 80001278: 00000000 .word 0x00000000 + 8000127c: 008c0c13 addi x24,x24,8 + + mv x6, x24 # switch signature pointer register to avoid conflict with test + 80001280: 000c0313 addi x6,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0xec5619a43e0f5642 + 80001284: 000cbc03 ld x24,0(x25) + 80001288: 008c8c93 addi x25,x25,8 + +000000008000128c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b24: + sha256sum0 x24, x24 # perform operation + 8000128c: 100c1c13 sha256sum0 x24,x24 + # Check if x24 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x24, Zknh_sha256sum0_cg_cmp_rd_rs1_b24, Zknh_sha256sum0_cg_cmp_rd_rs1_b24_str) + 80001290: 00033203 ld x4,0(x6) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 528012ef jal x5,800027c0 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000a03b .word 0x8000a03b + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00830313 addi x6,x6,8 + + mv x15, x25 # switch data pointer register to avoid conflict with test + 800012b0: 000c8793 addi x15,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x2a7fff770c23a1ee + 800012b4: 0007bc83 ld x25,0(x15) + 800012b8: 00878793 addi x15,x15,8 + +00000000800012bc : +Zknh_sha256sum0_cg_cmp_rd_rs1_b25: + sha256sum0 x25, x25 # perform operation + 800012bc: 100c9c93 sha256sum0 x25,x25 + # Check if x25 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x25, Zknh_sha256sum0_cg_cmp_rd_rs1_b25, Zknh_sha256sum0_cg_cmp_rd_rs1_b25_str) + 800012c0: 00033203 ld x4,0(x6) + 800012c4: 01920c63 beq x4,x25,800012dc + 800012c8: 4f8012ef jal x5,800027c0 + 800012cc: 800012bc .word 0x800012bc + 800012d0: 00000000 .word 0x00000000 + 800012d4: 8000a079 .word 0x8000a079 + 800012d8: 00000000 .word 0x00000000 + 800012dc: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x8115a78f3ab43b1f + 800012e0: 0007bd03 ld x26,0(x15) + 800012e4: 00878793 addi x15,x15,8 + +00000000800012e8 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b26: + sha256sum0 x26, x26 # perform operation + 800012e8: 100d1d13 sha256sum0 x26,x26 + # Check if x26 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x26, Zknh_sha256sum0_cg_cmp_rd_rs1_b26, Zknh_sha256sum0_cg_cmp_rd_rs1_b26_str) + 800012ec: 00033203 ld x4,0(x6) + 800012f0: 01a20c63 beq x4,x26,80001308 + 800012f4: 4cc012ef jal x5,800027c0 + 800012f8: 800012e8 .word 0x800012e8 + 800012fc: 00000000 .word 0x00000000 + 80001300: 8000a0b7 .word 0x8000a0b7 + 80001304: 00000000 .word 0x00000000 + 80001308: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xea6485b356ef6cc8 + 8000130c: 0007bd83 ld x27,0(x15) + 80001310: 00878793 addi x15,x15,8 + +0000000080001314 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b27: + sha256sum0 x27, x27 # perform operation + 80001314: 100d9d93 sha256sum0 x27,x27 + # Check if x27 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x27, Zknh_sha256sum0_cg_cmp_rd_rs1_b27, Zknh_sha256sum0_cg_cmp_rd_rs1_b27_str) + 80001318: 00033203 ld x4,0(x6) + 8000131c: 01b20c63 beq x4,x27,80001334 + 80001320: 4a0012ef jal x5,800027c0 + 80001324: 80001314 .word 0x80001314 + 80001328: 00000000 .word 0x00000000 + 8000132c: 8000a0f5 .word 0x8000a0f5 + 80001330: 00000000 .word 0x00000000 + 80001334: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x6211d681e642fb7e + 80001338: 0007be03 ld x28,0(x15) + 8000133c: 00878793 addi x15,x15,8 + +0000000080001340 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b28: + sha256sum0 x28, x28 # perform operation + 80001340: 100e1e13 sha256sum0 x28,x28 + # Check if x28 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x28, Zknh_sha256sum0_cg_cmp_rd_rs1_b28, Zknh_sha256sum0_cg_cmp_rd_rs1_b28_str) + 80001344: 00033203 ld x4,0(x6) + 80001348: 01c20c63 beq x4,x28,80001360 + 8000134c: 474012ef jal x5,800027c0 + 80001350: 80001340 .word 0x80001340 + 80001354: 00000000 .word 0x00000000 + 80001358: 8000a133 .word 0x8000a133 + 8000135c: 00000000 .word 0x00000000 + 80001360: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x237b78a0bf450617 + 80001364: 0007be83 ld x29,0(x15) + 80001368: 00878793 addi x15,x15,8 + +000000008000136c : +Zknh_sha256sum0_cg_cmp_rd_rs1_b29: + sha256sum0 x29, x29 # perform operation + 8000136c: 100e9e93 sha256sum0 x29,x29 + # Check if x29 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x29, Zknh_sha256sum0_cg_cmp_rd_rs1_b29, Zknh_sha256sum0_cg_cmp_rd_rs1_b29_str) + 80001370: 00033203 ld x4,0(x6) + 80001374: 01d20c63 beq x4,x29,8000138c + 80001378: 448012ef jal x5,800027c0 + 8000137c: 8000136c .word 0x8000136c + 80001380: 00000000 .word 0x00000000 + 80001384: 8000a171 .word 0x8000a171 + 80001388: 00000000 .word 0x00000000 + 8000138c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xac5c80d4eff2fad4 + 80001390: 0007bf03 ld x30,0(x15) + 80001394: 00878793 addi x15,x15,8 + +0000000080001398 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b30: + sha256sum0 x30, x30 # perform operation + 80001398: 100f1f13 sha256sum0 x30,x30 + # Check if x30 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x30, Zknh_sha256sum0_cg_cmp_rd_rs1_b30, Zknh_sha256sum0_cg_cmp_rd_rs1_b30_str) + 8000139c: 00033203 ld x4,0(x6) + 800013a0: 01e20c63 beq x4,x30,800013b8 + 800013a4: 41c012ef jal x5,800027c0 + 800013a8: 80001398 .word 0x80001398 + 800013ac: 00000000 .word 0x00000000 + 800013b0: 8000a1af .word 0x8000a1af + 800013b4: 00000000 .word 0x00000000 + 800013b8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xb59c530f5b97f14a + 800013bc: 0007bf83 ld x31,0(x15) + 800013c0: 00878793 addi x15,x15,8 + +00000000800013c4 : +Zknh_sha256sum0_cg_cmp_rd_rs1_b31: + sha256sum0 x31, x31 # perform operation + 800013c4: 100f9f93 sha256sum0 x31,x31 + # Check if x31 contains the expected result. x6 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x6, x5, x4, x31, Zknh_sha256sum0_cg_cmp_rd_rs1_b31, Zknh_sha256sum0_cg_cmp_rd_rs1_b31_str) + 800013c8: 00033203 ld x4,0(x6) + 800013cc: 01f20c63 beq x4,x31,800013e4 + 800013d0: 3f0012ef jal x5,800027c0 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 8000a1ed .word 0x8000a1ed + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00830313 addi x6,x6,8 + + mv x2, x6 # restore signature pointer to default register for teardown + 800013e8: 00030113 addi x2,x6,0 + +00000000800013ec : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013ec: 00000513 addi x10,x0,0 + 800013f0: 00000073 ecall + 800013f4: fff00513 addi x10,x0,-1 + 800013f8: 25800413 addi x8,x0,600 + +00000000800013fc : + 800013fc: 34002373 csrrs x6,mscratch,x0 + +0000000080001400 : + 80001400: 2b833383 ld x7,696(x6) + +0000000080001404 : + 80001404: 2a033383 ld x7,672(x6) + +0000000080001408 : + 80001408: 2d033483 ld x9,720(x6) + 8000140c: 34049073 csrrw x0,mscratch,x9 + +0000000080001410 : + 80001410: 2c833483 ld x9,712(x6) + 80001414: 305493f3 csrrw x7,mtvec,x9 + 80001418: ffc4f493 andi x9,x9,-4 + 8000141c: ffc3f393 andi x7,x7,-4 + 80001420: 00749e63 bne x9,x7,8000143c + +0000000080001424 : + 80001424: 00030493 addi x9,x6,0 + +0000000080001428 : + 80001428: 0004a783 lw x15,0(x9) + 8000142c: 00f3a023 sw x15,0(x7) + 80001430: 00438393 addi x7,x7,4 + 80001434: 00448493 addi x9,x9,4 + 80001438: fe83c8e3 blt x7,x8,80001428 + 8000143c: 0000100f fence.i + +0000000080001440 : + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: ccdff06f jal x0,800013ec + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca9ff06f jal x0,800013ec + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: aa030313 addi x6,x6,-1376 # 80001440 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35430313 addi x6,x6,852 # 800013ec + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33c30313 addi x6,x6,828 # 800013ec + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32430313 addi x6,x6,804 # 800013ec + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1bc78793 addi x15,x15,444 # 800013fc + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha256sum1-00.elf.objdump b/riscv-tests/rv64-Zknh-sha256sum1-00.elf.objdump new file mode 100644 index 0000000..bee4574 --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha256sum1-00.elf.objdump @@ -0,0 +1,6675 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sum1-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha256sum1-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008cc 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f87 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029007 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002902a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029040 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029080 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002910e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccdil8Hx.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b1 +0000000080008827 l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b2 +000000008000885e l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b3 +0000000080008895 l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088cc l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b5 +0000000080008903 l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b6 +000000008000893a l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b7 +0000000080008971 l .data 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zknh_sha256sum1_cg_cp_rs1_b8 +00000000800089a8 l .data 0000000000000000 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x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xeb38fc01aefbcc24 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha256sum1_cg_cp_rs1_b0: + sha256sum1 x13, x0 # perform operation + 80000048: 10101693 sha256sum1 x13,x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha256sum1_cg_cp_rs1_b0, Zknh_sha256sum1_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 00d20c63 beq x4,x13,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xf083df27aa0be06f + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha256sum1_cg_cp_rs1_b1: + sha256sum1 x19, x1 # perform operation + 80000074: 10109993 sha256sum1 x19,x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zknh_sha256sum1_cg_cp_rs1_b1, Zknh_sha256sum1_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01320c63 beq x4,x19,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x28, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010e13 addi x28,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xb1f082c62b953c72 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha256sum1_cg_cp_rs1_b2: + sha256sum1 x29, x2 # perform operation + 800000a4: 10111e93 sha256sum1 x29,x2 + # Check if x29 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x29, Zknh_sha256sum1_cg_cp_rs1_b2, Zknh_sha256sum1_cg_cp_rs1_b2_str) + 800000a8: 000e3203 ld x4,0(x28) + 800000ac: 01d20c63 beq x4,x29,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008e0e13 addi x28,x28,8 + + mv x11, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018593 addi x11,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0x116f510f296be409 + 800000cc: 0005b183 ld x3,0(x11) + 800000d0: 00858593 addi x11,x11,8 + +00000000800000d4 : +Zknh_sha256sum1_cg_cp_rs1_b3: + sha256sum1 x20, x3 # perform operation + 800000d4: 10119a13 sha256sum1 x20,x3 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zknh_sha256sum1_cg_cp_rs1_b3, Zknh_sha256sum1_cg_cp_rs1_b3_str) + 800000d8: 000e3203 ld x4,0(x28) + 800000dc: 01420c63 beq x4,x20,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008e0e13 addi x28,x28,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs1: x4 = 0xae97847cb58582cd + 80000100: 0005b203 ld x4,0(x11) + 80000104: 00858593 addi x11,x11,8 + +0000000080000108 : +Zknh_sha256sum1_cg_cp_rs1_b4: + sha256sum1 x2, x4 # perform operation + 80000108: 10121113 sha256sum1 x2,x4 + # Check if x2 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x2, Zknh_sha256sum1_cg_cp_rs1_b4, Zknh_sha256sum1_cg_cp_rs1_b4_str) + 8000010c: 000e3683 ld x13,0(x28) + 80000110: 00268c63 beq x13,x2,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs1: x5 = 0x451e2c5b0dd9f5ef + 8000012c: 0005b283 ld x5,0(x11) + 80000130: 00858593 addi x11,x11,8 + +0000000080000134 : +Zknh_sha256sum1_cg_cp_rs1_b5: + sha256sum1 x17, x5 # perform operation + 80000134: 10129893 sha256sum1 x17,x5 + # Check if x17 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x17, Zknh_sha256sum1_cg_cp_rs1_b5, Zknh_sha256sum1_cg_cp_rs1_b5_str) + 80000138: 000e3683 ld x13,0(x28) + 8000013c: 01168c63 beq x13,x17,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xa9fe06657b4c3347 + 80000158: 0005b303 ld x6,0(x11) + 8000015c: 00858593 addi x11,x11,8 + +0000000080000160 : +Zknh_sha256sum1_cg_cp_rs1_b6: + sha256sum1 x5, x6 # perform operation + 80000160: 10131293 sha256sum1 x5,x6 + # Check if x5 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x5, Zknh_sha256sum1_cg_cp_rs1_b6, Zknh_sha256sum1_cg_cp_rs1_b6_str) + 80000164: 000e3683 ld x13,0(x28) + 80000168: 00568c63 beq x13,x5,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs1: x7 = 0x8f942bcdbaf9c8cb + 80000184: 0005b383 ld x7,0(x11) + 80000188: 00858593 addi x11,x11,8 + +000000008000018c : +Zknh_sha256sum1_cg_cp_rs1_b7: + sha256sum1 x29, x7 # perform operation + 8000018c: 10139e93 sha256sum1 x29,x7 + # Check if x29 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x29, Zknh_sha256sum1_cg_cp_rs1_b7, Zknh_sha256sum1_cg_cp_rs1_b7_str) + 80000190: 000e3683 ld x13,0(x28) + 80000194: 01d68c63 beq x13,x29,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs1: x8 = 0x5ccadde833efbb7d + 800001b0: 0005b403 ld x8,0(x11) + 800001b4: 00858593 addi x11,x11,8 + +00000000800001b8 : +Zknh_sha256sum1_cg_cp_rs1_b8: + sha256sum1 x29, x8 # perform operation + 800001b8: 10141e93 sha256sum1 x29,x8 + # Check if x29 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x29, Zknh_sha256sum1_cg_cp_rs1_b8, Zknh_sha256sum1_cg_cp_rs1_b8_str) + 800001bc: 000e3683 ld x13,0(x28) + 800001c0: 01d68c63 beq x13,x29,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x2fae3a9fd5164483 + 800001dc: 0005b483 ld x9,0(x11) + 800001e0: 00858593 addi x11,x11,8 + +00000000800001e4 : +Zknh_sha256sum1_cg_cp_rs1_b9: + sha256sum1 x23, x9 # perform operation + 800001e4: 10149b93 sha256sum1 x23,x9 + # Check if x23 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x23, Zknh_sha256sum1_cg_cp_rs1_b9, Zknh_sha256sum1_cg_cp_rs1_b9_str) + 800001e8: 000e3683 ld x13,0(x28) + 800001ec: 01768c63 beq x13,x23,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089df .word 0x800089df + 80000200: 00000000 .word 0x00000000 + 80000204: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs1: x10 = 0x7fd4d071b9cbfca1 + 80000208: 0005b503 ld x10,0(x11) + 8000020c: 00858593 addi x11,x11,8 + +0000000080000210 : +Zknh_sha256sum1_cg_cp_rs1_b10: + sha256sum1 x21, x10 # perform operation + 80000210: 10151a93 sha256sum1 x21,x10 + # Check if x21 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x21, Zknh_sha256sum1_cg_cp_rs1_b10, Zknh_sha256sum1_cg_cp_rs1_b10_str) + 80000214: 000e3683 ld x13,0(x28) + 80000218: 01568c63 beq x13,x21,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 80008a17 .word 0x80008a17 + 8000022c: 00000000 .word 0x00000000 + 80000230: 008e0e13 addi x28,x28,8 + + mv x17, x11 # switch data pointer register to avoid conflict with test + 80000234: 00058893 addi x17,x11,0 +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xe63f0a2af609a69e + 80000238: 0008b583 ld x11,0(x17) + 8000023c: 00888893 addi x17,x17,8 + +0000000080000240 : +Zknh_sha256sum1_cg_cp_rs1_b11: + sha256sum1 x3, x11 # perform operation + 80000240: 10159193 sha256sum1 x3,x11 + # Check if x3 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x3, Zknh_sha256sum1_cg_cp_rs1_b11, Zknh_sha256sum1_cg_cp_rs1_b11_str) + 80000244: 000e3683 ld x13,0(x28) + 80000248: 00368c63 beq x13,x3,80000260 + 8000024c: 5b40276f jal x14,80002800 + 80000250: 80000240 .word 0x80000240 + 80000254: 00000000 .word 0x00000000 + 80000258: 80008a50 .word 0x80008a50 + 8000025c: 00000000 .word 0x00000000 + 80000260: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x6adf0542a0c664ed + 80000264: 0008b603 ld x12,0(x17) + 80000268: 00888893 addi x17,x17,8 + +000000008000026c : +Zknh_sha256sum1_cg_cp_rs1_b12: + sha256sum1 x6, x12 # perform operation + 8000026c: 10161313 sha256sum1 x6,x12 + # Check if x6 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x6, Zknh_sha256sum1_cg_cp_rs1_b12, Zknh_sha256sum1_cg_cp_rs1_b12_str) + 80000270: 000e3683 ld x13,0(x28) + 80000274: 00668c63 beq x13,x6,8000028c + 80000278: 5880276f jal x14,80002800 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 80008a89 .word 0x80008a89 + 80000288: 00000000 .word 0x00000000 + 8000028c: 008e0e13 addi x28,x28,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000290: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000294: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xc35faae08a26e7cc + 80000298: 0008b683 ld x13,0(x17) + 8000029c: 00888893 addi x17,x17,8 + +00000000800002a0 : +Zknh_sha256sum1_cg_cp_rs1_b13: + sha256sum1 x15, x13 # perform operation + 800002a0: 10169793 sha256sum1 x15,x13 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zknh_sha256sum1_cg_cp_rs1_b13, Zknh_sha256sum1_cg_cp_rs1_b13_str) + 800002a4: 000e3383 ld x7,0(x28) + 800002a8: 00f38c63 beq x7,x15,800002c0 + 800002ac: 52c0246f jal x8,800027d8 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 80008ac2 .word 0x80008ac2 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xc9e424adada31087 + 800002c4: 0008b703 ld x14,0(x17) + 800002c8: 00888893 addi x17,x17,8 + +00000000800002cc : +Zknh_sha256sum1_cg_cp_rs1_b14: + sha256sum1 x29, x14 # perform operation + 800002cc: 10171e93 sha256sum1 x29,x14 + # Check if x29 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x29, Zknh_sha256sum1_cg_cp_rs1_b14, Zknh_sha256sum1_cg_cp_rs1_b14_str) + 800002d0: 000e3383 ld x7,0(x28) + 800002d4: 01d38c63 beq x7,x29,800002ec + 800002d8: 5000246f jal x8,800027d8 + 800002dc: 800002cc .word 0x800002cc + 800002e0: 00000000 .word 0x00000000 + 800002e4: 80008afb .word 0x80008afb + 800002e8: 00000000 .word 0x00000000 + 800002ec: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x1762ddd0f3987d05 + 800002f0: 0008b783 ld x15,0(x17) + 800002f4: 00888893 addi x17,x17,8 + +00000000800002f8 : +Zknh_sha256sum1_cg_cp_rs1_b15: + sha256sum1 x27, x15 # perform operation + 800002f8: 10179d93 sha256sum1 x27,x15 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zknh_sha256sum1_cg_cp_rs1_b15, Zknh_sha256sum1_cg_cp_rs1_b15_str) + 800002fc: 000e3383 ld x7,0(x28) + 80000300: 01b38c63 beq x7,x27,80000318 + 80000304: 4d40246f jal x8,800027d8 + 80000308: 800002f8 .word 0x800002f8 + 8000030c: 00000000 .word 0x00000000 + 80000310: 80008b34 .word 0x80008b34 + 80000314: 00000000 .word 0x00000000 + 80000318: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xdca7ba5db7dada0b + 8000031c: 0008b803 ld x16,0(x17) + 80000320: 00888893 addi x17,x17,8 + +0000000080000324 : +Zknh_sha256sum1_cg_cp_rs1_b16: + sha256sum1 x31, x16 # perform operation + 80000324: 10181f93 sha256sum1 x31,x16 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_b16, Zknh_sha256sum1_cg_cp_rs1_b16_str) + 80000328: 000e3383 ld x7,0(x28) + 8000032c: 01f38c63 beq x7,x31,80000344 + 80000330: 4a80246f jal x8,800027d8 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b6d .word 0x80008b6d + 80000340: 00000000 .word 0x00000000 + 80000344: 008e0e13 addi x28,x28,8 + + mv x10, x17 # switch data pointer register to avoid conflict with test + 80000348: 00088513 addi x10,x17,0 +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x8951af1d32a2fcb9 + 8000034c: 00053883 ld x17,0(x10) + 80000350: 00850513 addi x10,x10,8 + +0000000080000354 : +Zknh_sha256sum1_cg_cp_rs1_b17: + sha256sum1 x24, x17 # perform operation + 80000354: 10189c13 sha256sum1 x24,x17 + # Check if x24 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x24, Zknh_sha256sum1_cg_cp_rs1_b17, Zknh_sha256sum1_cg_cp_rs1_b17_str) + 80000358: 000e3383 ld x7,0(x28) + 8000035c: 01838c63 beq x7,x24,80000374 + 80000360: 4780246f jal x8,800027d8 + 80000364: 80000354 .word 0x80000354 + 80000368: 00000000 .word 0x00000000 + 8000036c: 80008ba6 .word 0x80008ba6 + 80000370: 00000000 .word 0x00000000 + 80000374: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xa8a776aef822624a + 80000378: 00053903 ld x18,0(x10) + 8000037c: 00850513 addi x10,x10,8 + +0000000080000380 : +Zknh_sha256sum1_cg_cp_rs1_b18: + sha256sum1 x3, x18 # perform operation + 80000380: 10191193 sha256sum1 x3,x18 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zknh_sha256sum1_cg_cp_rs1_b18, Zknh_sha256sum1_cg_cp_rs1_b18_str) + 80000384: 000e3383 ld x7,0(x28) + 80000388: 00338c63 beq x7,x3,800003a0 + 8000038c: 44c0246f jal x8,800027d8 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 80008bdf .word 0x80008bdf + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x58b7d1c2313f6f77 + 800003a4: 00053983 ld x19,0(x10) + 800003a8: 00850513 addi x10,x10,8 + +00000000800003ac : +Zknh_sha256sum1_cg_cp_rs1_b19: + sha256sum1 x25, x19 # perform operation + 800003ac: 10199c93 sha256sum1 x25,x19 + # Check if x25 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x25, Zknh_sha256sum1_cg_cp_rs1_b19, Zknh_sha256sum1_cg_cp_rs1_b19_str) + 800003b0: 000e3383 ld x7,0(x28) + 800003b4: 01938c63 beq x7,x25,800003cc + 800003b8: 4200246f jal x8,800027d8 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 80008c18 .word 0x80008c18 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x352ed2eda4f61bcb + 800003d0: 00053a03 ld x20,0(x10) + 800003d4: 00850513 addi x10,x10,8 + +00000000800003d8 : +Zknh_sha256sum1_cg_cp_rs1_b20: + sha256sum1 x4, x20 # perform operation + 800003d8: 101a1213 sha256sum1 x4,x20 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zknh_sha256sum1_cg_cp_rs1_b20, Zknh_sha256sum1_cg_cp_rs1_b20_str) + 800003dc: 000e3383 ld x7,0(x28) + 800003e0: 00438c63 beq x7,x4,800003f8 + 800003e4: 3f40246f jal x8,800027d8 + 800003e8: 800003d8 .word 0x800003d8 + 800003ec: 00000000 .word 0x00000000 + 800003f0: 80008c51 .word 0x80008c51 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xd0eec7fcd5086358 + 800003fc: 00053a83 ld x21,0(x10) + 80000400: 00850513 addi x10,x10,8 + +0000000080000404 : +Zknh_sha256sum1_cg_cp_rs1_b21: + sha256sum1 x31, x21 # perform operation + 80000404: 101a9f93 sha256sum1 x31,x21 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_b21, Zknh_sha256sum1_cg_cp_rs1_b21_str) + 80000408: 000e3383 ld x7,0(x28) + 8000040c: 01f38c63 beq x7,x31,80000424 + 80000410: 3c80246f jal x8,800027d8 + 80000414: 80000404 .word 0x80000404 + 80000418: 00000000 .word 0x00000000 + 8000041c: 80008c8a .word 0x80008c8a + 80000420: 00000000 .word 0x00000000 + 80000424: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x769baf3807049158 + 80000428: 00053b03 ld x22,0(x10) + 8000042c: 00850513 addi x10,x10,8 + +0000000080000430 : +Zknh_sha256sum1_cg_cp_rs1_b22: + sha256sum1 x5, x22 # perform operation + 80000430: 101b1293 sha256sum1 x5,x22 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zknh_sha256sum1_cg_cp_rs1_b22, Zknh_sha256sum1_cg_cp_rs1_b22_str) + 80000434: 000e3383 ld x7,0(x28) + 80000438: 00538c63 beq x7,x5,80000450 + 8000043c: 39c0246f jal x8,800027d8 + 80000440: 80000430 .word 0x80000430 + 80000444: 00000000 .word 0x00000000 + 80000448: 80008cc3 .word 0x80008cc3 + 8000044c: 00000000 .word 0x00000000 + 80000450: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x9fb5c4001f110d2b + 80000454: 00053b83 ld x23,0(x10) + 80000458: 00850513 addi x10,x10,8 + +000000008000045c : +Zknh_sha256sum1_cg_cp_rs1_b23: + sha256sum1 x26, x23 # perform operation + 8000045c: 101b9d13 sha256sum1 x26,x23 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zknh_sha256sum1_cg_cp_rs1_b23, Zknh_sha256sum1_cg_cp_rs1_b23_str) + 80000460: 000e3383 ld x7,0(x28) + 80000464: 01a38c63 beq x7,x26,8000047c + 80000468: 3700246f jal x8,800027d8 + 8000046c: 8000045c .word 0x8000045c + 80000470: 00000000 .word 0x00000000 + 80000474: 80008cfc .word 0x80008cfc + 80000478: 00000000 .word 0x00000000 + 8000047c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xb2ac745c1116a9a0 + 80000480: 00053c03 ld x24,0(x10) + 80000484: 00850513 addi x10,x10,8 + +0000000080000488 : +Zknh_sha256sum1_cg_cp_rs1_b24: + sha256sum1 x31, x24 # perform operation + 80000488: 101c1f93 sha256sum1 x31,x24 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_b24, Zknh_sha256sum1_cg_cp_rs1_b24_str) + 8000048c: 000e3383 ld x7,0(x28) + 80000490: 01f38c63 beq x7,x31,800004a8 + 80000494: 3440246f jal x8,800027d8 + 80000498: 80000488 .word 0x80000488 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 80008d35 .word 0x80008d35 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x94d1dc6e80d1ef03 + 800004ac: 00053c83 ld x25,0(x10) + 800004b0: 00850513 addi x10,x10,8 + +00000000800004b4 : +Zknh_sha256sum1_cg_cp_rs1_b25: + sha256sum1 x31, x25 # perform operation + 800004b4: 101c9f93 sha256sum1 x31,x25 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_b25, Zknh_sha256sum1_cg_cp_rs1_b25_str) + 800004b8: 000e3383 ld x7,0(x28) + 800004bc: 01f38c63 beq x7,x31,800004d4 + 800004c0: 3180246f jal x8,800027d8 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 80008d6e .word 0x80008d6e + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x3bcc6d0c43216df1 + 800004d8: 00053d03 ld x26,0(x10) + 800004dc: 00850513 addi x10,x10,8 + +00000000800004e0 : +Zknh_sha256sum1_cg_cp_rs1_b26: + sha256sum1 x18, x26 # perform operation + 800004e0: 101d1913 sha256sum1 x18,x26 + # Check if x18 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x18, Zknh_sha256sum1_cg_cp_rs1_b26, Zknh_sha256sum1_cg_cp_rs1_b26_str) + 800004e4: 000e3383 ld x7,0(x28) + 800004e8: 01238c63 beq x7,x18,80000500 + 800004ec: 2ec0246f jal x8,800027d8 + 800004f0: 800004e0 .word 0x800004e0 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 80008da7 .word 0x80008da7 + 800004fc: 00000000 .word 0x00000000 + 80000500: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xad8b1573efc6fb31 + 80000504: 00053d83 ld x27,0(x10) + 80000508: 00850513 addi x10,x10,8 + +000000008000050c : +Zknh_sha256sum1_cg_cp_rs1_b27: + sha256sum1 x5, x27 # perform operation + 8000050c: 101d9293 sha256sum1 x5,x27 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zknh_sha256sum1_cg_cp_rs1_b27, Zknh_sha256sum1_cg_cp_rs1_b27_str) + 80000510: 000e3383 ld x7,0(x28) + 80000514: 00538c63 beq x7,x5,8000052c + 80000518: 2c00246f jal x8,800027d8 + 8000051c: 8000050c .word 0x8000050c + 80000520: 00000000 .word 0x00000000 + 80000524: 80008de0 .word 0x80008de0 + 80000528: 00000000 .word 0x00000000 + 8000052c: 008e0e13 addi x28,x28,8 + + mv x30, x28 # switch signature pointer register to avoid conflict with test + 80000530: 000e0f13 addi x30,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x9b7ba815107f926b + 80000534: 00053e03 ld x28,0(x10) + 80000538: 00850513 addi x10,x10,8 + +000000008000053c : +Zknh_sha256sum1_cg_cp_rs1_b28: + sha256sum1 x12, x28 # perform operation + 8000053c: 101e1613 sha256sum1 x12,x28 + # Check if x12 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x12, Zknh_sha256sum1_cg_cp_rs1_b28, Zknh_sha256sum1_cg_cp_rs1_b28_str) + 80000540: 000f3383 ld x7,0(x30) + 80000544: 00c38c63 beq x7,x12,8000055c + 80000548: 2900246f jal x8,800027d8 + 8000054c: 8000053c .word 0x8000053c + 80000550: 00000000 .word 0x00000000 + 80000554: 80008e19 .word 0x80008e19 + 80000558: 00000000 .word 0x00000000 + 8000055c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x1138f018adb80fe2 + 80000560: 00053e83 ld x29,0(x10) + 80000564: 00850513 addi x10,x10,8 + +0000000080000568 : +Zknh_sha256sum1_cg_cp_rs1_b29: + sha256sum1 x13, x29 # perform operation + 80000568: 101e9693 sha256sum1 x13,x29 + # Check if x13 contains the expected result. x30 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x30, x8, x7, x13, Zknh_sha256sum1_cg_cp_rs1_b29, Zknh_sha256sum1_cg_cp_rs1_b29_str) + 8000056c: 000f3383 ld x7,0(x30) + 80000570: 00d38c63 beq x7,x13,80000588 + 80000574: 2640246f jal x8,800027d8 + 80000578: 80000568 .word 0x80000568 + 8000057c: 00000000 .word 0x00000000 + 80000580: 80008e52 .word 0x80008e52 + 80000584: 00000000 .word 0x00000000 + 80000588: 008f0f13 addi x30,x30,8 + + mv x26, x30 # switch signature pointer register to avoid conflict with test + 8000058c: 000f0d13 addi x26,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xd8e3875e523d1995 + 80000590: 00053f03 ld x30,0(x10) + 80000594: 00850513 addi x10,x10,8 + +0000000080000598 : +Zknh_sha256sum1_cg_cp_rs1_b30: + sha256sum1 x31, x30 # perform operation + 80000598: 101f1f93 sha256sum1 x31,x30 + # Check if x31 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_b30, Zknh_sha256sum1_cg_cp_rs1_b30_str) + 8000059c: 000d3383 ld x7,0(x26) + 800005a0: 01f38c63 beq x7,x31,800005b8 + 800005a4: 2340246f jal x8,800027d8 + 800005a8: 80000598 .word 0x80000598 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 80008e8b .word 0x80008e8b + 800005b4: 00000000 .word 0x00000000 + 800005b8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xedc62f3221d13368 + 800005bc: 00053f83 ld x31,0(x10) + 800005c0: 00850513 addi x10,x10,8 + +00000000800005c4 : +Zknh_sha256sum1_cg_cp_rs1_b31: + sha256sum1 x18, x31 # perform operation + 800005c4: 101f9913 sha256sum1 x18,x31 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zknh_sha256sum1_cg_cp_rs1_b31, Zknh_sha256sum1_cg_cp_rs1_b31_str) + 800005c8: 000d3383 ld x7,0(x26) + 800005cc: 01238c63 beq x7,x18,800005e4 + 800005d0: 2080246f jal x8,800027d8 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 80008ec4 .word 0x80008ec4 + 800005e0: 00000000 .word 0x00000000 + 800005e4: 008d0d13 addi x26,x26,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x04e09974e64a09f4 + 800005e8: 00053783 ld x15,0(x10) + 800005ec: 00850513 addi x10,x10,8 + +00000000800005f0 : +Zknh_sha256sum1_cg_cp_rd_b0: + sha256sum1 x0, x15 # perform operation + 800005f0: 10179013 sha256sum1 x0,x15 + # Check if x0 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x0, Zknh_sha256sum1_cg_cp_rd_b0, Zknh_sha256sum1_cg_cp_rd_b0_str) + 800005f4: 000d3383 ld x7,0(x26) + 800005f8: 00038c63 beq x7,x0,80000610 + 800005fc: 1dc0246f jal x8,800027d8 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80008efd .word 0x80008efd + 8000060c: 00000000 .word 0x00000000 + 80000610: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xf4684b6afef577c5 + 80000614: 00053d83 ld x27,0(x10) + 80000618: 00850513 addi x10,x10,8 + +000000008000061c : +Zknh_sha256sum1_cg_cp_rd_b1: + sha256sum1 x1, x27 # perform operation + 8000061c: 101d9093 sha256sum1 x1,x27 + # Check if x1 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x1, Zknh_sha256sum1_cg_cp_rd_b1, Zknh_sha256sum1_cg_cp_rd_b1_str) + 80000620: 000d3383 ld x7,0(x26) + 80000624: 00138c63 beq x7,x1,8000063c + 80000628: 1b00246f jal x8,800027d8 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008f34 .word 0x80008f34 + 80000638: 00000000 .word 0x00000000 + 8000063c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xbe50fb7a52f80fb2 + 80000640: 00053483 ld x9,0(x10) + 80000644: 00850513 addi x10,x10,8 + +0000000080000648 : +Zknh_sha256sum1_cg_cp_rd_b2: + sha256sum1 x2, x9 # perform operation + 80000648: 10149113 sha256sum1 x2,x9 + # Check if x2 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x2, Zknh_sha256sum1_cg_cp_rd_b2, Zknh_sha256sum1_cg_cp_rd_b2_str) + 8000064c: 000d3383 ld x7,0(x26) + 80000650: 00238c63 beq x7,x2,80000668 + 80000654: 1840246f jal x8,800027d8 + 80000658: 80000648 .word 0x80000648 + 8000065c: 00000000 .word 0x00000000 + 80000660: 80008f6b .word 0x80008f6b + 80000664: 00000000 .word 0x00000000 + 80000668: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8f898bfb7b731b6c + 8000066c: 00053703 ld x14,0(x10) + 80000670: 00850513 addi x10,x10,8 + +0000000080000674 : +Zknh_sha256sum1_cg_cp_rd_b3: + sha256sum1 x3, x14 # perform operation + 80000674: 10171193 sha256sum1 x3,x14 + # Check if x3 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x3, Zknh_sha256sum1_cg_cp_rd_b3, Zknh_sha256sum1_cg_cp_rd_b3_str) + 80000678: 000d3383 ld x7,0(x26) + 8000067c: 00338c63 beq x7,x3,80000694 + 80000680: 1580246f jal x8,800027d8 + 80000684: 80000674 .word 0x80000674 + 80000688: 00000000 .word 0x00000000 + 8000068c: 80008fa2 .word 0x80008fa2 + 80000690: 00000000 .word 0x00000000 + 80000694: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xce6074f76bdfc4e7 + 80000698: 00053983 ld x19,0(x10) + 8000069c: 00850513 addi x10,x10,8 + +00000000800006a0 : +Zknh_sha256sum1_cg_cp_rd_b4: + sha256sum1 x4, x19 # perform operation + 800006a0: 10199213 sha256sum1 x4,x19 + # Check if x4 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x4, Zknh_sha256sum1_cg_cp_rd_b4, Zknh_sha256sum1_cg_cp_rd_b4_str) + 800006a4: 000d3383 ld x7,0(x26) + 800006a8: 00438c63 beq x7,x4,800006c0 + 800006ac: 12c0246f jal x8,800027d8 + 800006b0: 800006a0 .word 0x800006a0 + 800006b4: 00000000 .word 0x00000000 + 800006b8: 80008fd9 .word 0x80008fd9 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xea962a52270b7628 + 800006c4: 00053983 ld x19,0(x10) + 800006c8: 00850513 addi x10,x10,8 + +00000000800006cc : +Zknh_sha256sum1_cg_cp_rd_b5: + sha256sum1 x5, x19 # perform operation + 800006cc: 10199293 sha256sum1 x5,x19 + # Check if x5 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x5, Zknh_sha256sum1_cg_cp_rd_b5, Zknh_sha256sum1_cg_cp_rd_b5_str) + 800006d0: 000d3383 ld x7,0(x26) + 800006d4: 00538c63 beq x7,x5,800006ec + 800006d8: 1000246f jal x8,800027d8 + 800006dc: 800006cc .word 0x800006cc + 800006e0: 00000000 .word 0x00000000 + 800006e4: 80009010 .word 0x80009010 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xe475446d8bc1b6b3 + 800006f0: 00053603 ld x12,0(x10) + 800006f4: 00850513 addi x10,x10,8 + +00000000800006f8 : +Zknh_sha256sum1_cg_cp_rd_b6: + sha256sum1 x6, x12 # perform operation + 800006f8: 10161313 sha256sum1 x6,x12 + # Check if x6 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x6, Zknh_sha256sum1_cg_cp_rd_b6, Zknh_sha256sum1_cg_cp_rd_b6_str) + 800006fc: 000d3383 ld x7,0(x26) + 80000700: 00638c63 beq x7,x6,80000718 + 80000704: 0d40246f jal x8,800027d8 + 80000708: 800006f8 .word 0x800006f8 + 8000070c: 00000000 .word 0x00000000 + 80000710: 80009047 .word 0x80009047 + 80000714: 00000000 .word 0x00000000 + 80000718: 008d0d13 addi x26,x26,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 8000071c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000720: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x218eed2b27d488de + 80000724: 00053203 ld x4,0(x10) + 80000728: 00850513 addi x10,x10,8 + +000000008000072c : +Zknh_sha256sum1_cg_cp_rd_b7: + sha256sum1 x7, x4 # perform operation + 8000072c: 10121393 sha256sum1 x7,x4 + # Check if x7 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x7, Zknh_sha256sum1_cg_cp_rd_b7, Zknh_sha256sum1_cg_cp_rd_b7_str) + 80000730: 000d3683 ld x13,0(x26) + 80000734: 00768c63 beq x13,x7,8000074c + 80000738: 0c80276f jal x14,80002800 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000907e .word 0x8000907e + 80000748: 00000000 .word 0x00000000 + 8000074c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x54cb5c34fe29f27d + 80000750: 00053903 ld x18,0(x10) + 80000754: 00850513 addi x10,x10,8 + +0000000080000758 : +Zknh_sha256sum1_cg_cp_rd_b8: + sha256sum1 x8, x18 # perform operation + 80000758: 10191413 sha256sum1 x8,x18 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zknh_sha256sum1_cg_cp_rd_b8, Zknh_sha256sum1_cg_cp_rd_b8_str) + 8000075c: 000d3683 ld x13,0(x26) + 80000760: 00868c63 beq x13,x8,80000778 + 80000764: 09c0276f jal x14,80002800 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 800090b5 .word 0x800090b5 + 80000774: 00000000 .word 0x00000000 + 80000778: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xc09266375e465bff + 8000077c: 00053983 ld x19,0(x10) + 80000780: 00850513 addi x10,x10,8 + +0000000080000784 : +Zknh_sha256sum1_cg_cp_rd_b9: + sha256sum1 x9, x19 # perform operation + 80000784: 10199493 sha256sum1 x9,x19 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zknh_sha256sum1_cg_cp_rd_b9, Zknh_sha256sum1_cg_cp_rd_b9_str) + 80000788: 000d3683 ld x13,0(x26) + 8000078c: 00968c63 beq x13,x9,800007a4 + 80000790: 0700276f jal x14,80002800 + 80000794: 80000784 .word 0x80000784 + 80000798: 00000000 .word 0x00000000 + 8000079c: 800090ec .word 0x800090ec + 800007a0: 00000000 .word 0x00000000 + 800007a4: 008d0d13 addi x26,x26,8 + + mv x2, x10 # switch data pointer register to avoid conflict with test + 800007a8: 00050113 addi x2,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x9e7c3dc617deb23d + 800007ac: 00013583 ld x11,0(x2) + 800007b0: 00810113 addi x2,x2,8 + +00000000800007b4 : +Zknh_sha256sum1_cg_cp_rd_b10: + sha256sum1 x10, x11 # perform operation + 800007b4: 10159513 sha256sum1 x10,x11 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zknh_sha256sum1_cg_cp_rd_b10, Zknh_sha256sum1_cg_cp_rd_b10_str) + 800007b8: 000d3683 ld x13,0(x26) + 800007bc: 00a68c63 beq x13,x10,800007d4 + 800007c0: 0400276f jal x14,80002800 + 800007c4: 800007b4 .word 0x800007b4 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 80009123 .word 0x80009123 + 800007d0: 00000000 .word 0x00000000 + 800007d4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x2, x7) # load rs1: x7 = 0x246844b402efd65a + 800007d8: 00013383 ld x7,0(x2) + 800007dc: 00810113 addi x2,x2,8 + +00000000800007e0 : +Zknh_sha256sum1_cg_cp_rd_b11: + sha256sum1 x11, x7 # perform operation + 800007e0: 10139593 sha256sum1 x11,x7 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zknh_sha256sum1_cg_cp_rd_b11, Zknh_sha256sum1_cg_cp_rd_b11_str) + 800007e4: 000d3683 ld x13,0(x26) + 800007e8: 00b68c63 beq x13,x11,80000800 + 800007ec: 0140276f jal x14,80002800 + 800007f0: 800007e0 .word 0x800007e0 + 800007f4: 00000000 .word 0x00000000 + 800007f8: 8000915b .word 0x8000915b + 800007fc: 00000000 .word 0x00000000 + 80000800: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x4ef5cf8659e541c7 + 80000804: 00013c03 ld x24,0(x2) + 80000808: 00810113 addi x2,x2,8 + +000000008000080c : +Zknh_sha256sum1_cg_cp_rd_b12: + sha256sum1 x12, x24 # perform operation + 8000080c: 101c1613 sha256sum1 x12,x24 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zknh_sha256sum1_cg_cp_rd_b12, Zknh_sha256sum1_cg_cp_rd_b12_str) + 80000810: 000d3683 ld x13,0(x26) + 80000814: 00c68c63 beq x13,x12,8000082c + 80000818: 7e90176f jal x14,80002800 + 8000081c: 8000080c .word 0x8000080c + 80000820: 00000000 .word 0x00000000 + 80000824: 80009193 .word 0x80009193 + 80000828: 00000000 .word 0x00000000 + 8000082c: 008d0d13 addi x26,x26,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000830: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000834: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0xf3278cede8e9c588 + 80000838: 00013b03 ld x22,0(x2) + 8000083c: 00810113 addi x2,x2,8 + +0000000080000840 : +Zknh_sha256sum1_cg_cp_rd_b13: + sha256sum1 x13, x22 # perform operation + 80000840: 101b1693 sha256sum1 x13,x22 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zknh_sha256sum1_cg_cp_rd_b13, Zknh_sha256sum1_cg_cp_rd_b13_str) + 80000844: 000d3383 ld x7,0(x26) + 80000848: 00d38c63 beq x7,x13,80000860 + 8000084c: 78d0146f jal x8,800027d8 + 80000850: 80000840 .word 0x80000840 + 80000854: 00000000 .word 0x00000000 + 80000858: 800091cb .word 0x800091cb + 8000085c: 00000000 .word 0x00000000 + 80000860: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x471124977953fc7f + 80000864: 00013e83 ld x29,0(x2) + 80000868: 00810113 addi x2,x2,8 + +000000008000086c : +Zknh_sha256sum1_cg_cp_rd_b14: + sha256sum1 x14, x29 # perform operation + 8000086c: 101e9713 sha256sum1 x14,x29 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zknh_sha256sum1_cg_cp_rd_b14, Zknh_sha256sum1_cg_cp_rd_b14_str) + 80000870: 000d3383 ld x7,0(x26) + 80000874: 00e38c63 beq x7,x14,8000088c + 80000878: 7610146f jal x8,800027d8 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 80009203 .word 0x80009203 + 80000888: 00000000 .word 0x00000000 + 8000088c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0x920cd611fce668c9 + 80000890: 00013483 ld x9,0(x2) + 80000894: 00810113 addi x2,x2,8 + +0000000080000898 : +Zknh_sha256sum1_cg_cp_rd_b15: + sha256sum1 x15, x9 # perform operation + 80000898: 10149793 sha256sum1 x15,x9 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zknh_sha256sum1_cg_cp_rd_b15, Zknh_sha256sum1_cg_cp_rd_b15_str) + 8000089c: 000d3383 ld x7,0(x26) + 800008a0: 00f38c63 beq x7,x15,800008b8 + 800008a4: 7350146f jal x8,800027d8 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 8000923b .word 0x8000923b + 800008b4: 00000000 .word 0x00000000 + 800008b8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x8e9ce929defc3ce3 + 800008bc: 00013c03 ld x24,0(x2) + 800008c0: 00810113 addi x2,x2,8 + +00000000800008c4 : +Zknh_sha256sum1_cg_cp_rd_b16: + sha256sum1 x16, x24 # perform operation + 800008c4: 101c1813 sha256sum1 x16,x24 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zknh_sha256sum1_cg_cp_rd_b16, Zknh_sha256sum1_cg_cp_rd_b16_str) + 800008c8: 000d3383 ld x7,0(x26) + 800008cc: 01038c63 beq x7,x16,800008e4 + 800008d0: 7090146f jal x8,800027d8 + 800008d4: 800008c4 .word 0x800008c4 + 800008d8: 00000000 .word 0x00000000 + 800008dc: 80009273 .word 0x80009273 + 800008e0: 00000000 .word 0x00000000 + 800008e4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x2b638a7699988272 + 800008e8: 00013583 ld x11,0(x2) + 800008ec: 00810113 addi x2,x2,8 + +00000000800008f0 : +Zknh_sha256sum1_cg_cp_rd_b17: + sha256sum1 x17, x11 # perform operation + 800008f0: 10159893 sha256sum1 x17,x11 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zknh_sha256sum1_cg_cp_rd_b17, Zknh_sha256sum1_cg_cp_rd_b17_str) + 800008f4: 000d3383 ld x7,0(x26) + 800008f8: 01138c63 beq x7,x17,80000910 + 800008fc: 6dd0146f jal x8,800027d8 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800092ab .word 0x800092ab + 8000090c: 00000000 .word 0x00000000 + 80000910: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x6e41512d3e75fe5f + 80000914: 00013c83 ld x25,0(x2) + 80000918: 00810113 addi x2,x2,8 + +000000008000091c : +Zknh_sha256sum1_cg_cp_rd_b18: + sha256sum1 x18, x25 # perform operation + 8000091c: 101c9913 sha256sum1 x18,x25 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zknh_sha256sum1_cg_cp_rd_b18, Zknh_sha256sum1_cg_cp_rd_b18_str) + 80000920: 000d3383 ld x7,0(x26) + 80000924: 01238c63 beq x7,x18,8000093c + 80000928: 6b10146f jal x8,800027d8 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800092e3 .word 0x800092e3 + 80000938: 00000000 .word 0x00000000 + 8000093c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x75e6f4831d334a8c + 80000940: 00013003 ld x0,0(x2) + 80000944: 00810113 addi x2,x2,8 + +0000000080000948 : +Zknh_sha256sum1_cg_cp_rd_b19: + sha256sum1 x19, x0 # perform operation + 80000948: 10101993 sha256sum1 x19,x0 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zknh_sha256sum1_cg_cp_rd_b19, Zknh_sha256sum1_cg_cp_rd_b19_str) + 8000094c: 000d3383 ld x7,0(x26) + 80000950: 01338c63 beq x7,x19,80000968 + 80000954: 6850146f jal x8,800027d8 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000931b .word 0x8000931b + 80000964: 00000000 .word 0x00000000 + 80000968: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0x6ded50a30b94a1e6 + 8000096c: 00013083 ld x1,0(x2) + 80000970: 00810113 addi x2,x2,8 + +0000000080000974 : +Zknh_sha256sum1_cg_cp_rd_b20: + sha256sum1 x20, x1 # perform operation + 80000974: 10109a13 sha256sum1 x20,x1 + # Check if x20 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x20, Zknh_sha256sum1_cg_cp_rd_b20, Zknh_sha256sum1_cg_cp_rd_b20_str) + 80000978: 000d3383 ld x7,0(x26) + 8000097c: 01438c63 beq x7,x20,80000994 + 80000980: 6590146f jal x8,800027d8 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x048430dcb737931c + 80000998: 00013683 ld x13,0(x2) + 8000099c: 00810113 addi x2,x2,8 + +00000000800009a0 : +Zknh_sha256sum1_cg_cp_rd_b21: + sha256sum1 x21, x13 # perform operation + 800009a0: 10169a93 sha256sum1 x21,x13 + # Check if x21 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x21, Zknh_sha256sum1_cg_cp_rd_b21, Zknh_sha256sum1_cg_cp_rd_b21_str) + 800009a4: 000d3383 ld x7,0(x26) + 800009a8: 01538c63 beq x7,x21,800009c0 + 800009ac: 62d0146f jal x8,800027d8 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000938b .word 0x8000938b + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0xb2b6cfec1feb40e8 + 800009c4: 00013983 ld x19,0(x2) + 800009c8: 00810113 addi x2,x2,8 + +00000000800009cc : +Zknh_sha256sum1_cg_cp_rd_b22: + sha256sum1 x22, x19 # perform operation + 800009cc: 10199b13 sha256sum1 x22,x19 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zknh_sha256sum1_cg_cp_rd_b22, Zknh_sha256sum1_cg_cp_rd_b22_str) + 800009d0: 000d3383 ld x7,0(x26) + 800009d4: 01638c63 beq x7,x22,800009ec + 800009d8: 6010146f jal x8,800027d8 + 800009dc: 800009cc .word 0x800009cc + 800009e0: 00000000 .word 0x00000000 + 800009e4: 800093c3 .word 0x800093c3 + 800009e8: 00000000 .word 0x00000000 + 800009ec: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x3) # load rs1: x3 = 0xd92c27828ebb3447 + 800009f0: 00013183 ld x3,0(x2) + 800009f4: 00810113 addi x2,x2,8 + +00000000800009f8 : +Zknh_sha256sum1_cg_cp_rd_b23: + sha256sum1 x23, x3 # perform operation + 800009f8: 10119b93 sha256sum1 x23,x3 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zknh_sha256sum1_cg_cp_rd_b23, Zknh_sha256sum1_cg_cp_rd_b23_str) + 800009fc: 000d3383 ld x7,0(x26) + 80000a00: 01738c63 beq x7,x23,80000a18 + 80000a04: 5d50146f jal x8,800027d8 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 800093fb .word 0x800093fb + 80000a14: 00000000 .word 0x00000000 + 80000a18: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x3fdc448a7038f9f4 + 80000a1c: 00013f83 ld x31,0(x2) + 80000a20: 00810113 addi x2,x2,8 + +0000000080000a24 : +Zknh_sha256sum1_cg_cp_rd_b24: + sha256sum1 x24, x31 # perform operation + 80000a24: 101f9c13 sha256sum1 x24,x31 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zknh_sha256sum1_cg_cp_rd_b24, Zknh_sha256sum1_cg_cp_rd_b24_str) + 80000a28: 000d3383 ld x7,0(x26) + 80000a2c: 01838c63 beq x7,x24,80000a44 + 80000a30: 5a90146f jal x8,800027d8 + 80000a34: 80000a24 .word 0x80000a24 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 80009433 .word 0x80009433 + 80000a40: 00000000 .word 0x00000000 + 80000a44: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x13) # load rs1: x13 = 0x40e16f05e77a5780 + 80000a48: 00013683 ld x13,0(x2) + 80000a4c: 00810113 addi x2,x2,8 + +0000000080000a50 : +Zknh_sha256sum1_cg_cp_rd_b25: + sha256sum1 x25, x13 # perform operation + 80000a50: 10169c93 sha256sum1 x25,x13 + # Check if x25 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x25, Zknh_sha256sum1_cg_cp_rd_b25, Zknh_sha256sum1_cg_cp_rd_b25_str) + 80000a54: 000d3383 ld x7,0(x26) + 80000a58: 01938c63 beq x7,x25,80000a70 + 80000a5c: 57d0146f jal x8,800027d8 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000946b .word 0x8000946b + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 008d0d13 addi x26,x26,8 + + mv x10, x26 # switch signature pointer register to avoid conflict with test + 80000a74: 000d0513 addi x10,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x85b1bf08b4d538e0 + 80000a78: 00013783 ld x15,0(x2) + 80000a7c: 00810113 addi x2,x2,8 + +0000000080000a80 : +Zknh_sha256sum1_cg_cp_rd_b26: + sha256sum1 x26, x15 # perform operation + 80000a80: 10179d13 sha256sum1 x26,x15 + # Check if x26 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x26, Zknh_sha256sum1_cg_cp_rd_b26, Zknh_sha256sum1_cg_cp_rd_b26_str) + 80000a84: 00053383 ld x7,0(x10) + 80000a88: 01a38c63 beq x7,x26,80000aa0 + 80000a8c: 54d0146f jal x8,800027d8 + 80000a90: 80000a80 .word 0x80000a80 + 80000a94: 00000000 .word 0x00000000 + 80000a98: 800094a3 .word 0x800094a3 + 80000a9c: 00000000 .word 0x00000000 + 80000aa0: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x4396af3c7420a880 + 80000aa4: 00013c83 ld x25,0(x2) + 80000aa8: 00810113 addi x2,x2,8 + +0000000080000aac : +Zknh_sha256sum1_cg_cp_rd_b27: + sha256sum1 x27, x25 # perform operation + 80000aac: 101c9d93 sha256sum1 x27,x25 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknh_sha256sum1_cg_cp_rd_b27, Zknh_sha256sum1_cg_cp_rd_b27_str) + 80000ab0: 00053383 ld x7,0(x10) + 80000ab4: 01b38c63 beq x7,x27,80000acc + 80000ab8: 5210146f jal x8,800027d8 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800094db .word 0x800094db + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x819b66546a4b4c5d + 80000ad0: 00013d03 ld x26,0(x2) + 80000ad4: 00810113 addi x2,x2,8 + +0000000080000ad8 : +Zknh_sha256sum1_cg_cp_rd_b28: + sha256sum1 x28, x26 # perform operation + 80000ad8: 101d1e13 sha256sum1 x28,x26 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknh_sha256sum1_cg_cp_rd_b28, Zknh_sha256sum1_cg_cp_rd_b28_str) + 80000adc: 00053383 ld x7,0(x10) + 80000ae0: 01c38c63 beq x7,x28,80000af8 + 80000ae4: 4f50146f jal x8,800027d8 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 80009513 .word 0x80009513 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0xc4c254186501d73d + 80000afc: 00013a83 ld x21,0(x2) + 80000b00: 00810113 addi x2,x2,8 + +0000000080000b04 : +Zknh_sha256sum1_cg_cp_rd_b29: + sha256sum1 x29, x21 # perform operation + 80000b04: 101a9e93 sha256sum1 x29,x21 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknh_sha256sum1_cg_cp_rd_b29, Zknh_sha256sum1_cg_cp_rd_b29_str) + 80000b08: 00053383 ld x7,0(x10) + 80000b0c: 01d38c63 beq x7,x29,80000b24 + 80000b10: 4c90146f jal x8,800027d8 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 8000954b .word 0x8000954b + 80000b20: 00000000 .word 0x00000000 + 80000b24: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x17) # load rs1: x17 = 0xb11a2081f8f9aa6e + 80000b28: 00013883 ld x17,0(x2) + 80000b2c: 00810113 addi x2,x2,8 + +0000000080000b30 : +Zknh_sha256sum1_cg_cp_rd_b30: + sha256sum1 x30, x17 # perform operation + 80000b30: 10189f13 sha256sum1 x30,x17 + # Check if x30 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x30, Zknh_sha256sum1_cg_cp_rd_b30, Zknh_sha256sum1_cg_cp_rd_b30_str) + 80000b34: 00053383 ld x7,0(x10) + 80000b38: 01e38c63 beq x7,x30,80000b50 + 80000b3c: 49d0146f jal x8,800027d8 + 80000b40: 80000b30 .word 0x80000b30 + 80000b44: 00000000 .word 0x00000000 + 80000b48: 80009583 .word 0x80009583 + 80000b4c: 00000000 .word 0x00000000 + 80000b50: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x12) # load rs1: x12 = 0x14613285ef9c5cd9 + 80000b54: 00013603 ld x12,0(x2) + 80000b58: 00810113 addi x2,x2,8 + +0000000080000b5c : +Zknh_sha256sum1_cg_cp_rd_b31: + sha256sum1 x31, x12 # perform operation + 80000b5c: 10161f93 sha256sum1 x31,x12 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rd_b31, Zknh_sha256sum1_cg_cp_rd_b31_str) + 80000b60: 00053383 ld x7,0(x10) + 80000b64: 01f38c63 beq x7,x31,80000b7c + 80000b68: 4710146f jal x8,800027d8 + 80000b6c: 80000b5c .word 0x80000b5c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 800095bb .word 0x800095bb + 80000b78: 00000000 .word 0x00000000 + 80000b7c: 00850513 addi x10,x10,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0000000000000000 + 80000b80: 00013783 ld x15,0(x2) + 80000b84: 00810113 addi x2,x2,8 + +0000000080000b88 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x0: + sha256sum1 x20, x15 # perform operation + 80000b88: 10179a13 sha256sum1 x20,x15 + # Check if x20 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x20, Zknh_sha256sum1_cg_cp_rs1_edges_0x0, Zknh_sha256sum1_cg_cp_rs1_edges_0x0_str) + 80000b8c: 00053383 ld x7,0(x10) + 80000b90: 01438c63 beq x7,x20,80000ba8 + 80000b94: 4450146f jal x8,800027d8 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 800095f3 .word 0x800095f3 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x0000000000000001 + 80000bac: 00013b03 ld x22,0(x2) + 80000bb0: 00810113 addi x2,x2,8 + +0000000080000bb4 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x1: + sha256sum1 x28, x22 # perform operation + 80000bb4: 101b1e13 sha256sum1 x28,x22 + # Check if x28 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x28, Zknh_sha256sum1_cg_cp_rs1_edges_0x1, Zknh_sha256sum1_cg_cp_rs1_edges_0x1_str) + 80000bb8: 00053383 ld x7,0(x10) + 80000bbc: 01c38c63 beq x7,x28,80000bd4 + 80000bc0: 4190146f jal x8,800027d8 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80009632 .word 0x80009632 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0000000000000002 + 80000bd8: 00013783 ld x15,0(x2) + 80000bdc: 00810113 addi x2,x2,8 + +0000000080000be0 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x2: + sha256sum1 x12, x15 # perform operation + 80000be0: 10179613 sha256sum1 x12,x15 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknh_sha256sum1_cg_cp_rs1_edges_0x2, Zknh_sha256sum1_cg_cp_rs1_edges_0x2_str) + 80000be4: 00053383 ld x7,0(x10) + 80000be8: 00c38c63 beq x7,x12,80000c00 + 80000bec: 3ed0146f jal x8,800027d8 + 80000bf0: 80000be0 .word 0x80000be0 + 80000bf4: 00000000 .word 0x00000000 + 80000bf8: 80009671 .word 0x80009671 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x8000000000000000 + 80000c04: 00013583 ld x11,0(x2) + 80000c08: 00810113 addi x2,x2,8 + +0000000080000c0c : +Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000000: + sha256sum1 x23, x11 # perform operation + 80000c0c: 10159b93 sha256sum1 x23,x11 + # Check if x23 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x23, Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c10: 00053383 ld x7,0(x10) + 80000c14: 01738c63 beq x7,x23,80000c2c + 80000c18: 3c10146f jal x8,800027d8 + 80000c1c: 80000c0c .word 0x80000c0c + 80000c20: 00000000 .word 0x00000000 + 80000c24: 800096b0 .word 0x800096b0 + 80000c28: 00000000 .word 0x00000000 + 80000c2c: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x2, x4) # load rs1: x4 = 0x8000000000000001 + 80000c30: 00013203 ld x4,0(x2) + 80000c34: 00810113 addi x2,x2,8 + +0000000080000c38 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000001: + sha256sum1 x14, x4 # perform operation + 80000c38: 10121713 sha256sum1 x14,x4 + # Check if x14 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x14, Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha256sum1_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c3c: 00053383 ld x7,0(x10) + 80000c40: 00e38c63 beq x7,x14,80000c58 + 80000c44: 3950146f jal x8,800027d8 + 80000c48: 80000c38 .word 0x80000c38 + 80000c4c: 00000000 .word 0x00000000 + 80000c50: 800096fe .word 0x800096fe + 80000c54: 00000000 .word 0x00000000 + 80000c58: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x11) # load rs1: x11 = 0x7fffffffffffffff + 80000c5c: 00013583 ld x11,0(x2) + 80000c60: 00810113 addi x2,x2,8 + +0000000080000c64 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffffffffffff: + sha256sum1 x31, x11 # perform operation + 80000c64: 10159f93 sha256sum1 x31,x11 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha256sum1_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c68: 00053383 ld x7,0(x10) + 80000c6c: 01f38c63 beq x7,x31,80000c84 + 80000c70: 3690146f jal x8,800027d8 + 80000c74: 80000c64 .word 0x80000c64 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 8000974c .word 0x8000974c + 80000c80: 00000000 .word 0x00000000 + 80000c84: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x7ffffffffffffffe + 80000c88: 00013f03 ld x30,0(x2) + 80000c8c: 00810113 addi x2,x2,8 + +0000000080000c90 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha256sum1 x31, x30 # perform operation + 80000c90: 101f1f93 sha256sum1 x31,x30 + # Check if x31 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x31, Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha256sum1_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c94: 00053383 ld x7,0(x10) + 80000c98: 01f38c63 beq x7,x31,80000cb0 + 80000c9c: 33d0146f jal x8,800027d8 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 8000979a .word 0x8000979a + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x9) # load rs1: x9 = 0xffffffffffffffff + 80000cb4: 00013483 ld x9,0(x2) + 80000cb8: 00810113 addi x2,x2,8 + +0000000080000cbc : +Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffffffffffff: + sha256sum1 x22, x9 # perform operation + 80000cbc: 10149b13 sha256sum1 x22,x9 + # Check if x22 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x22, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc0: 00053383 ld x7,0(x10) + 80000cc4: 01638c63 beq x7,x22,80000cdc + 80000cc8: 3110146f jal x8,800027d8 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800097e8 .word 0x800097e8 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x20) # load rs1: x20 = 0xfffffffffffffffe + 80000ce0: 00013a03 ld x20,0(x2) + 80000ce4: 00810113 addi x2,x2,8 + +0000000080000ce8 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffffffffffe: + sha256sum1 x19, x20 # perform operation + 80000ce8: 101a1993 sha256sum1 x19,x20 + # Check if x19 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x19, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cec: 00053383 ld x7,0(x10) + 80000cf0: 01338c63 beq x7,x19,80000d08 + 80000cf4: 2e50146f jal x8,800027d8 + 80000cf8: 80000ce8 .word 0x80000ce8 + 80000cfc: 00000000 .word 0x00000000 + 80000d00: 80009836 .word 0x80009836 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x2, x6) # load rs1: x6 = 0x5bbc887763ae86f2 + 80000d0c: 00013303 ld x6,0(x2) + 80000d10: 00810113 addi x2,x2,8 + +0000000080000d14 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha256sum1 x21, x6 # perform operation + 80000d14: 10131a93 sha256sum1 x21,x6 + # Check if x21 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x21, Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha256sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d18: 00053383 ld x7,0(x10) + 80000d1c: 01538c63 beq x7,x21,80000d34 + 80000d20: 2b90146f jal x8,800027d8 + 80000d24: 80000d14 .word 0x80000d14 + 80000d28: 00000000 .word 0x00000000 + 80000d2c: 80009884 .word 0x80009884 + 80000d30: 00000000 .word 0x00000000 + 80000d34: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0xaaaaaaaaaaaaaaaa + 80000d38: 00013d03 ld x26,0(x2) + 80000d3c: 00810113 addi x2,x2,8 + +0000000080000d40 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha256sum1 x13, x26 # perform operation + 80000d40: 101d1693 sha256sum1 x13,x26 + # Check if x13 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x13, Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha256sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d44: 00053383 ld x7,0(x10) + 80000d48: 00d38c63 beq x7,x13,80000d60 + 80000d4c: 28d0146f jal x8,800027d8 + 80000d50: 80000d40 .word 0x80000d40 + 80000d54: 00000000 .word 0x00000000 + 80000d58: 800098d2 .word 0x800098d2 + 80000d5c: 00000000 .word 0x00000000 + 80000d60: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x5555555555555555 + 80000d64: 00013f03 ld x30,0(x2) + 80000d68: 00810113 addi x2,x2,8 + +0000000080000d6c : +Zknh_sha256sum1_cg_cp_rs1_edges_0x5555555555555555: + sha256sum1 x29, x30 # perform operation + 80000d6c: 101f1e93 sha256sum1 x29,x30 + # Check if x29 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x29, Zknh_sha256sum1_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha256sum1_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d70: 00053383 ld x7,0(x10) + 80000d74: 01d38c63 beq x7,x29,80000d8c + 80000d78: 2610146f jal x8,800027d8 + 80000d7c: 80000d6c .word 0x80000d6c + 80000d80: 00000000 .word 0x00000000 + 80000d84: 80009920 .word 0x80009920 + 80000d88: 00000000 .word 0x00000000 + 80000d8c: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x00000000ffffffff + 80000d90: 00013e03 ld x28,0(x2) + 80000d94: 00810113 addi x2,x2,8 + +0000000080000d98 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff: + sha256sum1 x27, x28 # perform operation + 80000d98: 101e1d93 sha256sum1 x27,x28 + # Check if x27 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x27, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff, Zknh_sha256sum1_cg_cp_rs1_edges_0xffffffff_str) + 80000d9c: 00053383 ld x7,0(x10) + 80000da0: 01b38c63 beq x7,x27,80000db8 + 80000da4: 2350146f jal x8,800027d8 + 80000da8: 80000d98 .word 0x80000d98 + 80000dac: 00000000 .word 0x00000000 + 80000db0: 8000996e .word 0x8000996e + 80000db4: 00000000 .word 0x00000000 + 80000db8: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x00000000fffffffe + 80000dbc: 00013e83 ld x29,0(x2) + 80000dc0: 00810113 addi x2,x2,8 + +0000000080000dc4 : +Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe: + sha256sum1 x3, x29 # perform operation + 80000dc4: 101e9193 sha256sum1 x3,x29 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha256sum1_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc8: 00053383 ld x7,0(x10) + 80000dcc: 00338c63 beq x7,x3,80000de4 + 80000dd0: 2090146f jal x8,800027d8 + 80000dd4: 80000dc4 .word 0x80000dc4 + 80000dd8: 00000000 .word 0x00000000 + 80000ddc: 800099b4 .word 0x800099b4 + 80000de0: 00000000 .word 0x00000000 + 80000de4: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x2, x19) # load rs1: x19 = 0x0000000100000000 + 80000de8: 00013983 ld x19,0(x2) + 80000dec: 00810113 addi x2,x2,8 + +0000000080000df0 : +Zknh_sha256sum1_cg_cp_rs1_edges_0x100000000: + sha256sum1 x12, x19 # perform operation + 80000df0: 10199613 sha256sum1 x12,x19 + # Check if x12 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x12, Zknh_sha256sum1_cg_cp_rs1_edges_0x100000000, Zknh_sha256sum1_cg_cp_rs1_edges_0x100000000_str) + 80000df4: 00053383 ld x7,0(x10) + 80000df8: 00c38c63 beq x7,x12,80000e10 + 80000dfc: 1dd0146f jal x8,800027d8 + 80000e00: 80000df0 .word 0x80000df0 + 80000e04: 00000000 .word 0x00000000 + 80000e08: 800099fa .word 0x800099fa + 80000e0c: 00000000 .word 0x00000000 + 80000e10: 00850513 addi x10,x10,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x2, x15) # load rs1: x15 = 0x0000000100000001 + 80000e14: 00013783 ld x15,0(x2) + 80000e18: 00810113 addi x2,x2,8 + +0000000080000e1c : +Zknh_sha256sum1_cg_cp_rs1_edges_0x100000001: + sha256sum1 x9, x15 # perform operation + 80000e1c: 10179493 sha256sum1 x9,x15 + # Check if x9 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x9, Zknh_sha256sum1_cg_cp_rs1_edges_0x100000001, Zknh_sha256sum1_cg_cp_rs1_edges_0x100000001_str) + 80000e20: 00053383 ld x7,0(x10) + 80000e24: 00938c63 beq x7,x9,80000e3c + 80000e28: 1b10146f jal x8,800027d8 + 80000e2c: 80000e1c .word 0x80000e1c + 80000e30: 00000000 .word 0x00000000 + 80000e34: 80009a41 .word 0x80009a41 + 80000e38: 00000000 .word 0x00000000 + 80000e3c: 00850513 addi x10,x10,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x0) # load rs1: x0 = 0x48c1ca84cc141e9d + 80000e40: 00013003 ld x0,0(x2) + 80000e44: 00810113 addi x2,x2,8 + +0000000080000e48 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b0: + sha256sum1 x0, x0 # perform operation + 80000e48: 10101013 sha256sum1 x0,x0 + # Check if x0 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x0, Zknh_sha256sum1_cg_cmp_rd_rs1_b0, Zknh_sha256sum1_cg_cmp_rd_rs1_b0_str) + 80000e4c: 00053383 ld x7,0(x10) + 80000e50: 00038c63 beq x7,x0,80000e68 + 80000e54: 1850146f jal x8,800027d8 + 80000e58: 80000e48 .word 0x80000e48 + 80000e5c: 00000000 .word 0x00000000 + 80000e60: 80009a88 .word 0x80009a88 + 80000e64: 00000000 .word 0x00000000 + 80000e68: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x1) # load rs1: x1 = 0xd4092730ad627fba + 80000e6c: 00013083 ld x1,0(x2) + 80000e70: 00810113 addi x2,x2,8 + +0000000080000e74 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b1: + sha256sum1 x1, x1 # perform operation + 80000e74: 10109093 sha256sum1 x1,x1 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zknh_sha256sum1_cg_cmp_rd_rs1_b1, Zknh_sha256sum1_cg_cmp_rd_rs1_b1_str) + 80000e78: 00053383 ld x7,0(x10) + 80000e7c: 00138c63 beq x7,x1,80000e94 + 80000e80: 1590146f jal x8,800027d8 + 80000e84: 80000e74 .word 0x80000e74 + 80000e88: 00000000 .word 0x00000000 + 80000e8c: 80009ac4 .word 0x80009ac4 + 80000e90: 00000000 .word 0x00000000 + 80000e94: 00850513 addi x10,x10,8 + + mv x22, x2 # switch data pointer register to avoid conflict with test + 80000e98: 00010b13 addi x22,x2,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x22, x2) # load rs1: x2 = 0xd55c3dcc738fb54f + 80000e9c: 000b3103 ld x2,0(x22) + 80000ea0: 008b0b13 addi x22,x22,8 + +0000000080000ea4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b2: + sha256sum1 x2, x2 # perform operation + 80000ea4: 10111113 sha256sum1 x2,x2 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zknh_sha256sum1_cg_cmp_rd_rs1_b2, Zknh_sha256sum1_cg_cmp_rd_rs1_b2_str) + 80000ea8: 00053383 ld x7,0(x10) + 80000eac: 00238c63 beq x7,x2,80000ec4 + 80000eb0: 1290146f jal x8,800027d8 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 80009b00 .word 0x80009b00 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x22, x3) # load rs1: x3 = 0x8d9bf20daca4bdef + 80000ec8: 000b3183 ld x3,0(x22) + 80000ecc: 008b0b13 addi x22,x22,8 + +0000000080000ed0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b3: + sha256sum1 x3, x3 # perform operation + 80000ed0: 10119193 sha256sum1 x3,x3 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zknh_sha256sum1_cg_cmp_rd_rs1_b3, Zknh_sha256sum1_cg_cmp_rd_rs1_b3_str) + 80000ed4: 00053383 ld x7,0(x10) + 80000ed8: 00338c63 beq x7,x3,80000ef0 + 80000edc: 0fd0146f jal x8,800027d8 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80009b3c .word 0x80009b3c + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x22, x4) # load rs1: x4 = 0xef307d91f6c28431 + 80000ef4: 000b3203 ld x4,0(x22) + 80000ef8: 008b0b13 addi x22,x22,8 + +0000000080000efc : +Zknh_sha256sum1_cg_cmp_rd_rs1_b4: + sha256sum1 x4, x4 # perform operation + 80000efc: 10121213 sha256sum1 x4,x4 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zknh_sha256sum1_cg_cmp_rd_rs1_b4, Zknh_sha256sum1_cg_cmp_rd_rs1_b4_str) + 80000f00: 00053383 ld x7,0(x10) + 80000f04: 00438c63 beq x7,x4,80000f1c + 80000f08: 0d10146f jal x8,800027d8 + 80000f0c: 80000efc .word 0x80000efc + 80000f10: 00000000 .word 0x00000000 + 80000f14: 80009b78 .word 0x80009b78 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x22, x5) # load rs1: x5 = 0x14c69b93ba96137f + 80000f20: 000b3283 ld x5,0(x22) + 80000f24: 008b0b13 addi x22,x22,8 + +0000000080000f28 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b5: + sha256sum1 x5, x5 # perform operation + 80000f28: 10129293 sha256sum1 x5,x5 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zknh_sha256sum1_cg_cmp_rd_rs1_b5, Zknh_sha256sum1_cg_cmp_rd_rs1_b5_str) + 80000f2c: 00053383 ld x7,0(x10) + 80000f30: 00538c63 beq x7,x5,80000f48 + 80000f34: 0a50146f jal x8,800027d8 + 80000f38: 80000f28 .word 0x80000f28 + 80000f3c: 00000000 .word 0x00000000 + 80000f40: 80009bb4 .word 0x80009bb4 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x22, x6) # load rs1: x6 = 0xe77a112eb8fd4a9f + 80000f4c: 000b3303 ld x6,0(x22) + 80000f50: 008b0b13 addi x22,x22,8 + +0000000080000f54 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b6: + sha256sum1 x6, x6 # perform operation + 80000f54: 10131313 sha256sum1 x6,x6 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zknh_sha256sum1_cg_cmp_rd_rs1_b6, Zknh_sha256sum1_cg_cmp_rd_rs1_b6_str) + 80000f58: 00053383 ld x7,0(x10) + 80000f5c: 00638c63 beq x7,x6,80000f74 + 80000f60: 0790146f jal x8,800027d8 + 80000f64: 80000f54 .word 0x80000f54 + 80000f68: 00000000 .word 0x00000000 + 80000f6c: 80009bf0 .word 0x80009bf0 + 80000f70: 00000000 .word 0x00000000 + 80000f74: 00850513 addi x10,x10,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f78: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f7c: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x22, x7) # load rs1: x7 = 0x1af90f09f74d5945 + 80000f80: 000b3383 ld x7,0(x22) + 80000f84: 008b0b13 addi x22,x22,8 + +0000000080000f88 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b7: + sha256sum1 x7, x7 # perform operation + 80000f88: 10139393 sha256sum1 x7,x7 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zknh_sha256sum1_cg_cmp_rd_rs1_b7, Zknh_sha256sum1_cg_cmp_rd_rs1_b7_str) + 80000f8c: 00053203 ld x4,0(x10) + 80000f90: 00720c63 beq x4,x7,80000fa8 + 80000f94: 02d012ef jal x5,800027c0 + 80000f98: 80000f88 .word 0x80000f88 + 80000f9c: 00000000 .word 0x00000000 + 80000fa0: 80009c2c .word 0x80009c2c + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x22, x8) # load rs1: x8 = 0xe049fdb6a4569e15 + 80000fac: 000b3403 ld x8,0(x22) + 80000fb0: 008b0b13 addi x22,x22,8 + +0000000080000fb4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b8: + sha256sum1 x8, x8 # perform operation + 80000fb4: 10141413 sha256sum1 x8,x8 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zknh_sha256sum1_cg_cmp_rd_rs1_b8, Zknh_sha256sum1_cg_cmp_rd_rs1_b8_str) + 80000fb8: 00053203 ld x4,0(x10) + 80000fbc: 00820c63 beq x4,x8,80000fd4 + 80000fc0: 001012ef jal x5,800027c0 + 80000fc4: 80000fb4 .word 0x80000fb4 + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 80009c68 .word 0x80009c68 + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 00850513 addi x10,x10,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x22, x9) # load rs1: x9 = 0x41e3016b5860e224 + 80000fd8: 000b3483 ld x9,0(x22) + 80000fdc: 008b0b13 addi x22,x22,8 + +0000000080000fe0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b9: + sha256sum1 x9, x9 # perform operation + 80000fe0: 10149493 sha256sum1 x9,x9 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zknh_sha256sum1_cg_cmp_rd_rs1_b9, Zknh_sha256sum1_cg_cmp_rd_rs1_b9_str) + 80000fe4: 00053203 ld x4,0(x10) + 80000fe8: 00920c63 beq x4,x9,80001000 + 80000fec: 7d4012ef jal x5,800027c0 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 80009ca4 .word 0x80009ca4 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00850513 addi x10,x10,8 + + mv x31, x10 # switch signature pointer register to avoid conflict with test + 80001004: 00050f93 addi x31,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x22, x10) # load rs1: x10 = 0xc7131842379e1f6e + 80001008: 000b3503 ld x10,0(x22) + 8000100c: 008b0b13 addi x22,x22,8 + +0000000080001010 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b10: + sha256sum1 x10, x10 # perform operation + 80001010: 10151513 sha256sum1 x10,x10 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zknh_sha256sum1_cg_cmp_rd_rs1_b10, Zknh_sha256sum1_cg_cmp_rd_rs1_b10_str) + 80001014: 000fb203 ld x4,0(x31) + 80001018: 00a20c63 beq x4,x10,80001030 + 8000101c: 7a4012ef jal x5,800027c0 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80009ce0 .word 0x80009ce0 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0xbd4f470724a35ace + 80001034: 000b3583 ld x11,0(x22) + 80001038: 008b0b13 addi x22,x22,8 + +000000008000103c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b11: + sha256sum1 x11, x11 # perform operation + 8000103c: 10159593 sha256sum1 x11,x11 + # Check if x11 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x11, Zknh_sha256sum1_cg_cmp_rd_rs1_b11, Zknh_sha256sum1_cg_cmp_rd_rs1_b11_str) + 80001040: 000fb203 ld x4,0(x31) + 80001044: 00b20c63 beq x4,x11,8000105c + 80001048: 778012ef jal x5,800027c0 + 8000104c: 8000103c .word 0x8000103c + 80001050: 00000000 .word 0x00000000 + 80001054: 80009d1d .word 0x80009d1d + 80001058: 00000000 .word 0x00000000 + 8000105c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x22, x12) # load rs1: x12 = 0xf02fdef6b04a1fde + 80001060: 000b3603 ld x12,0(x22) + 80001064: 008b0b13 addi x22,x22,8 + +0000000080001068 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b12: + sha256sum1 x12, x12 # perform operation + 80001068: 10161613 sha256sum1 x12,x12 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zknh_sha256sum1_cg_cmp_rd_rs1_b12, Zknh_sha256sum1_cg_cmp_rd_rs1_b12_str) + 8000106c: 000fb203 ld x4,0(x31) + 80001070: 00c20c63 beq x4,x12,80001088 + 80001074: 74c012ef jal x5,800027c0 + 80001078: 80001068 .word 0x80001068 + 8000107c: 00000000 .word 0x00000000 + 80001080: 80009d5a .word 0x80009d5a + 80001084: 00000000 .word 0x00000000 + 80001088: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x22, x13) # load rs1: x13 = 0x4a22488236285c68 + 8000108c: 000b3683 ld x13,0(x22) + 80001090: 008b0b13 addi x22,x22,8 + +0000000080001094 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b13: + sha256sum1 x13, x13 # perform operation + 80001094: 10169693 sha256sum1 x13,x13 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zknh_sha256sum1_cg_cmp_rd_rs1_b13, Zknh_sha256sum1_cg_cmp_rd_rs1_b13_str) + 80001098: 000fb203 ld x4,0(x31) + 8000109c: 00d20c63 beq x4,x13,800010b4 + 800010a0: 720012ef jal x5,800027c0 + 800010a4: 80001094 .word 0x80001094 + 800010a8: 00000000 .word 0x00000000 + 800010ac: 80009d97 .word 0x80009d97 + 800010b0: 00000000 .word 0x00000000 + 800010b4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x22, x14) # load rs1: x14 = 0x6e232c4973d100e5 + 800010b8: 000b3703 ld x14,0(x22) + 800010bc: 008b0b13 addi x22,x22,8 + +00000000800010c0 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b14: + sha256sum1 x14, x14 # perform operation + 800010c0: 10171713 sha256sum1 x14,x14 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknh_sha256sum1_cg_cmp_rd_rs1_b14, Zknh_sha256sum1_cg_cmp_rd_rs1_b14_str) + 800010c4: 000fb203 ld x4,0(x31) + 800010c8: 00e20c63 beq x4,x14,800010e0 + 800010cc: 6f4012ef jal x5,800027c0 + 800010d0: 800010c0 .word 0x800010c0 + 800010d4: 00000000 .word 0x00000000 + 800010d8: 80009dd4 .word 0x80009dd4 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x15) # load rs1: x15 = 0x0926ed3ca367b7df + 800010e4: 000b3783 ld x15,0(x22) + 800010e8: 008b0b13 addi x22,x22,8 + +00000000800010ec : +Zknh_sha256sum1_cg_cmp_rd_rs1_b15: + sha256sum1 x15, x15 # perform operation + 800010ec: 10179793 sha256sum1 x15,x15 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zknh_sha256sum1_cg_cmp_rd_rs1_b15, Zknh_sha256sum1_cg_cmp_rd_rs1_b15_str) + 800010f0: 000fb203 ld x4,0(x31) + 800010f4: 00f20c63 beq x4,x15,8000110c + 800010f8: 6c8012ef jal x5,800027c0 + 800010fc: 800010ec .word 0x800010ec + 80001100: 00000000 .word 0x00000000 + 80001104: 80009e11 .word 0x80009e11 + 80001108: 00000000 .word 0x00000000 + 8000110c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x48925b3dfec97c5a + 80001110: 000b3803 ld x16,0(x22) + 80001114: 008b0b13 addi x22,x22,8 + +0000000080001118 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b16: + sha256sum1 x16, x16 # perform operation + 80001118: 10181813 sha256sum1 x16,x16 + # Check if x16 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x16, Zknh_sha256sum1_cg_cmp_rd_rs1_b16, Zknh_sha256sum1_cg_cmp_rd_rs1_b16_str) + 8000111c: 000fb203 ld x4,0(x31) + 80001120: 01020c63 beq x4,x16,80001138 + 80001124: 69c012ef jal x5,800027c0 + 80001128: 80001118 .word 0x80001118 + 8000112c: 00000000 .word 0x00000000 + 80001130: 80009e4e .word 0x80009e4e + 80001134: 00000000 .word 0x00000000 + 80001138: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x17) # load rs1: x17 = 0x420b0c4594b4845d + 8000113c: 000b3883 ld x17,0(x22) + 80001140: 008b0b13 addi x22,x22,8 + +0000000080001144 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b17: + sha256sum1 x17, x17 # perform operation + 80001144: 10189893 sha256sum1 x17,x17 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zknh_sha256sum1_cg_cmp_rd_rs1_b17, Zknh_sha256sum1_cg_cmp_rd_rs1_b17_str) + 80001148: 000fb203 ld x4,0(x31) + 8000114c: 01120c63 beq x4,x17,80001164 + 80001150: 670012ef jal x5,800027c0 + 80001154: 80001144 .word 0x80001144 + 80001158: 00000000 .word 0x00000000 + 8000115c: 80009e8b .word 0x80009e8b + 80001160: 00000000 .word 0x00000000 + 80001164: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x8a170cd4244faf55 + 80001168: 000b3903 ld x18,0(x22) + 8000116c: 008b0b13 addi x22,x22,8 + +0000000080001170 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b18: + sha256sum1 x18, x18 # perform operation + 80001170: 10191913 sha256sum1 x18,x18 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zknh_sha256sum1_cg_cmp_rd_rs1_b18, Zknh_sha256sum1_cg_cmp_rd_rs1_b18_str) + 80001174: 000fb203 ld x4,0(x31) + 80001178: 01220c63 beq x4,x18,80001190 + 8000117c: 644012ef jal x5,800027c0 + 80001180: 80001170 .word 0x80001170 + 80001184: 00000000 .word 0x00000000 + 80001188: 80009ec8 .word 0x80009ec8 + 8000118c: 00000000 .word 0x00000000 + 80001190: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x19) # load rs1: x19 = 0x14db9148c654e0e7 + 80001194: 000b3983 ld x19,0(x22) + 80001198: 008b0b13 addi x22,x22,8 + +000000008000119c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b19: + sha256sum1 x19, x19 # perform operation + 8000119c: 10199993 sha256sum1 x19,x19 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zknh_sha256sum1_cg_cmp_rd_rs1_b19, Zknh_sha256sum1_cg_cmp_rd_rs1_b19_str) + 800011a0: 000fb203 ld x4,0(x31) + 800011a4: 01320c63 beq x4,x19,800011bc + 800011a8: 618012ef jal x5,800027c0 + 800011ac: 8000119c .word 0x8000119c + 800011b0: 00000000 .word 0x00000000 + 800011b4: 80009f05 .word 0x80009f05 + 800011b8: 00000000 .word 0x00000000 + 800011bc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x08c8eed29164efd4 + 800011c0: 000b3a03 ld x20,0(x22) + 800011c4: 008b0b13 addi x22,x22,8 + +00000000800011c8 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b20: + sha256sum1 x20, x20 # perform operation + 800011c8: 101a1a13 sha256sum1 x20,x20 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zknh_sha256sum1_cg_cmp_rd_rs1_b20, Zknh_sha256sum1_cg_cmp_rd_rs1_b20_str) + 800011cc: 000fb203 ld x4,0(x31) + 800011d0: 01420c63 beq x4,x20,800011e8 + 800011d4: 5ec012ef jal x5,800027c0 + 800011d8: 800011c8 .word 0x800011c8 + 800011dc: 00000000 .word 0x00000000 + 800011e0: 80009f43 .word 0x80009f43 + 800011e4: 00000000 .word 0x00000000 + 800011e8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0x7794d56ed4bcc7c5 + 800011ec: 000b3a83 ld x21,0(x22) + 800011f0: 008b0b13 addi x22,x22,8 + +00000000800011f4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b21: + sha256sum1 x21, x21 # perform operation + 800011f4: 101a9a93 sha256sum1 x21,x21 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zknh_sha256sum1_cg_cmp_rd_rs1_b21, Zknh_sha256sum1_cg_cmp_rd_rs1_b21_str) + 800011f8: 000fb203 ld x4,0(x31) + 800011fc: 01520c63 beq x4,x21,80001214 + 80001200: 5c0012ef jal x5,800027c0 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 80009f81 .word 0x80009f81 + 80001210: 00000000 .word 0x00000000 + 80001214: 008f8f93 addi x31,x31,8 + + mv x18, x22 # switch data pointer register to avoid conflict with test + 80001218: 000b0913 addi x18,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs1: x22 = 0x554da41044ce98e0 + 8000121c: 00093b03 ld x22,0(x18) + 80001220: 00890913 addi x18,x18,8 + +0000000080001224 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b22: + sha256sum1 x22, x22 # perform operation + 80001224: 101b1b13 sha256sum1 x22,x22 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zknh_sha256sum1_cg_cmp_rd_rs1_b22, Zknh_sha256sum1_cg_cmp_rd_rs1_b22_str) + 80001228: 000fb203 ld x4,0(x31) + 8000122c: 01620c63 beq x4,x22,80001244 + 80001230: 590012ef jal x5,800027c0 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 80009fbf .word 0x80009fbf + 80001240: 00000000 .word 0x00000000 + 80001244: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs1: x23 = 0x87c08093ae1d41d0 + 80001248: 00093b83 ld x23,0(x18) + 8000124c: 00890913 addi x18,x18,8 + +0000000080001250 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b23: + sha256sum1 x23, x23 # perform operation + 80001250: 101b9b93 sha256sum1 x23,x23 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zknh_sha256sum1_cg_cmp_rd_rs1_b23, Zknh_sha256sum1_cg_cmp_rd_rs1_b23_str) + 80001254: 000fb203 ld x4,0(x31) + 80001258: 01720c63 beq x4,x23,80001270 + 8000125c: 564012ef jal x5,800027c0 + 80001260: 80001250 .word 0x80001250 + 80001264: 00000000 .word 0x00000000 + 80001268: 80009ffd .word 0x80009ffd + 8000126c: 00000000 .word 0x00000000 + 80001270: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x18, x24) # load rs1: x24 = 0x2471b5326fa1768d + 80001274: 00093c03 ld x24,0(x18) + 80001278: 00890913 addi x18,x18,8 + +000000008000127c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b24: + sha256sum1 x24, x24 # perform operation + 8000127c: 101c1c13 sha256sum1 x24,x24 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zknh_sha256sum1_cg_cmp_rd_rs1_b24, Zknh_sha256sum1_cg_cmp_rd_rs1_b24_str) + 80001280: 000fb203 ld x4,0(x31) + 80001284: 01820c63 beq x4,x24,8000129c + 80001288: 538012ef jal x5,800027c0 + 8000128c: 8000127c .word 0x8000127c + 80001290: 00000000 .word 0x00000000 + 80001294: 8000a03b .word 0x8000a03b + 80001298: 00000000 .word 0x00000000 + 8000129c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0x19827908967db7d5 + 800012a0: 00093c83 ld x25,0(x18) + 800012a4: 00890913 addi x18,x18,8 + +00000000800012a8 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b25: + sha256sum1 x25, x25 # perform operation + 800012a8: 101c9c93 sha256sum1 x25,x25 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknh_sha256sum1_cg_cmp_rd_rs1_b25, Zknh_sha256sum1_cg_cmp_rd_rs1_b25_str) + 800012ac: 000fb203 ld x4,0(x31) + 800012b0: 01920c63 beq x4,x25,800012c8 + 800012b4: 50c012ef jal x5,800027c0 + 800012b8: 800012a8 .word 0x800012a8 + 800012bc: 00000000 .word 0x00000000 + 800012c0: 8000a079 .word 0x8000a079 + 800012c4: 00000000 .word 0x00000000 + 800012c8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0x363011158f1a3f0f + 800012cc: 00093d03 ld x26,0(x18) + 800012d0: 00890913 addi x18,x18,8 + +00000000800012d4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b26: + sha256sum1 x26, x26 # perform operation + 800012d4: 101d1d13 sha256sum1 x26,x26 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zknh_sha256sum1_cg_cmp_rd_rs1_b26, Zknh_sha256sum1_cg_cmp_rd_rs1_b26_str) + 800012d8: 000fb203 ld x4,0(x31) + 800012dc: 01a20c63 beq x4,x26,800012f4 + 800012e0: 4e0012ef jal x5,800027c0 + 800012e4: 800012d4 .word 0x800012d4 + 800012e8: 00000000 .word 0x00000000 + 800012ec: 8000a0b7 .word 0x8000a0b7 + 800012f0: 00000000 .word 0x00000000 + 800012f4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0xceacab79c2ff6756 + 800012f8: 00093d83 ld x27,0(x18) + 800012fc: 00890913 addi x18,x18,8 + +0000000080001300 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b27: + sha256sum1 x27, x27 # perform operation + 80001300: 101d9d93 sha256sum1 x27,x27 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zknh_sha256sum1_cg_cmp_rd_rs1_b27, Zknh_sha256sum1_cg_cmp_rd_rs1_b27_str) + 80001304: 000fb203 ld x4,0(x31) + 80001308: 01b20c63 beq x4,x27,80001320 + 8000130c: 4b4012ef jal x5,800027c0 + 80001310: 80001300 .word 0x80001300 + 80001314: 00000000 .word 0x00000000 + 80001318: 8000a0f5 .word 0x8000a0f5 + 8000131c: 00000000 .word 0x00000000 + 80001320: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0x2937806402aedde6 + 80001324: 00093e03 ld x28,0(x18) + 80001328: 00890913 addi x18,x18,8 + +000000008000132c : +Zknh_sha256sum1_cg_cmp_rd_rs1_b28: + sha256sum1 x28, x28 # perform operation + 8000132c: 101e1e13 sha256sum1 x28,x28 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zknh_sha256sum1_cg_cmp_rd_rs1_b28, Zknh_sha256sum1_cg_cmp_rd_rs1_b28_str) + 80001330: 000fb203 ld x4,0(x31) + 80001334: 01c20c63 beq x4,x28,8000134c + 80001338: 488012ef jal x5,800027c0 + 8000133c: 8000132c .word 0x8000132c + 80001340: 00000000 .word 0x00000000 + 80001344: 8000a133 .word 0x8000a133 + 80001348: 00000000 .word 0x00000000 + 8000134c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0x540d4d38c2815529 + 80001350: 00093e83 ld x29,0(x18) + 80001354: 00890913 addi x18,x18,8 + +0000000080001358 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b29: + sha256sum1 x29, x29 # perform operation + 80001358: 101e9e93 sha256sum1 x29,x29 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha256sum1_cg_cmp_rd_rs1_b29, Zknh_sha256sum1_cg_cmp_rd_rs1_b29_str) + 8000135c: 000fb203 ld x4,0(x31) + 80001360: 01d20c63 beq x4,x29,80001378 + 80001364: 45c012ef jal x5,800027c0 + 80001368: 80001358 .word 0x80001358 + 8000136c: 00000000 .word 0x00000000 + 80001370: 8000a171 .word 0x8000a171 + 80001374: 00000000 .word 0x00000000 + 80001378: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x156a05fcc7a8b9d5 + 8000137c: 00093f03 ld x30,0(x18) + 80001380: 00890913 addi x18,x18,8 + +0000000080001384 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b30: + sha256sum1 x30, x30 # perform operation + 80001384: 101f1f13 sha256sum1 x30,x30 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha256sum1_cg_cmp_rd_rs1_b30, Zknh_sha256sum1_cg_cmp_rd_rs1_b30_str) + 80001388: 000fb203 ld x4,0(x31) + 8000138c: 01e20c63 beq x4,x30,800013a4 + 80001390: 430012ef jal x5,800027c0 + 80001394: 80001384 .word 0x80001384 + 80001398: 00000000 .word 0x00000000 + 8000139c: 8000a1af .word 0x8000a1af + 800013a0: 00000000 .word 0x00000000 + 800013a4: 008f8f93 addi x31,x31,8 + + mv x20, x31 # switch signature pointer register to avoid conflict with test + 800013a8: 000f8a13 addi x20,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x9a0bc1ec4fa22a55 + 800013ac: 00093f83 ld x31,0(x18) + 800013b0: 00890913 addi x18,x18,8 + +00000000800013b4 : +Zknh_sha256sum1_cg_cmp_rd_rs1_b31: + sha256sum1 x31, x31 # perform operation + 800013b4: 101f9f93 sha256sum1 x31,x31 + # Check if x31 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x31, Zknh_sha256sum1_cg_cmp_rd_rs1_b31, Zknh_sha256sum1_cg_cmp_rd_rs1_b31_str) + 800013b8: 000a3203 ld x4,0(x20) + 800013bc: 01f20c63 beq x4,x31,800013d4 + 800013c0: 400012ef jal x5,800027c0 + 800013c4: 800013b4 .word 0x800013b4 + 800013c8: 00000000 .word 0x00000000 + 800013cc: 8000a1ed .word 0x8000a1ed + 800013d0: 00000000 .word 0x00000000 + 800013d4: 008a0a13 addi x20,x20,8 + + mv x2, x20 # restore signature pointer to default register for teardown + 800013d8: 000a0113 addi x2,x20,0 + +00000000800013dc : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013dc: 00000513 addi x10,x0,0 + 800013e0: 00000073 ecall + 800013e4: fff00513 addi x10,x0,-1 + 800013e8: 25800413 addi x8,x0,600 + +00000000800013ec : + 800013ec: 34002373 csrrs x6,mscratch,x0 + +00000000800013f0 : + 800013f0: 2b833383 ld x7,696(x6) + +00000000800013f4 : + 800013f4: 2a033383 ld x7,672(x6) + +00000000800013f8 : + 800013f8: 2d033483 ld x9,720(x6) + 800013fc: 34049073 csrrw x0,mscratch,x9 + +0000000080001400 : + 80001400: 2c833483 ld x9,712(x6) + 80001404: 305493f3 csrrw x7,mtvec,x9 + 80001408: ffc4f493 andi x9,x9,-4 + 8000140c: ffc3f393 andi x7,x7,-4 + 80001410: 00749e63 bne x9,x7,8000142c + +0000000080001414 : + 80001414: 00030493 addi x9,x6,0 + +0000000080001418 : + 80001418: 0004a783 lw x15,0(x9) + 8000141c: 00f3a023 sw x15,0(x7) + 80001420: 00438393 addi x7,x7,4 + 80001424: 00448493 addi x9,x9,4 + 80001428: fe83c8e3 blt x7,x8,80001418 + 8000142c: 0000100f fence.i + +0000000080001430 : + 80001430: 00000013 addi x0,x0,0 + 80001434: 00000013 addi x0,x0,0 + 80001438: 00000013 addi x0,x0,0 + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cbdff06f jal x0,800013dc + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: c99ff06f jal x0,800013dc + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9030313 addi x6,x6,-1392 # 80001430 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 34430313 addi x6,x6,836 # 800013dc + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 32c30313 addi x6,x6,812 # 800013dc + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 31430313 addi x6,x6,788 # 800013dc + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1ac78793 addi x15,x15,428 # 800013ec + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha512sig0-00.elf.objdump b/riscv-tests/rv64-Zknh-sha512sig0-00.elf.objdump new file mode 100644 index 0000000..733c8d5 --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha512sig0-00.elf.objdump @@ -0,0 +1,6678 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sig0-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sig0-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008de 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f99 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029019 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002903c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002911e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cckC3GkZ.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b1 +0000000080008827 l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b2 +000000008000885e l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b3 +0000000080008895 l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088cc l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b5 +0000000080008903 l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b6 +000000008000893a l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b7 +0000000080008971 l .data 0000000000000000 Zknh_sha512sig0_cg_cp_rs1_b7_str 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00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd3d615381ed04454 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha512sig0_cg_cp_rs1_b0: + sha512sig0 x13, x0 # perform operation + 80000048: 10601693 sha512sig0 x13,x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zknh_sha512sig0_cg_cp_rs1_b0, Zknh_sha512sig0_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 00d20c63 beq x4,x13,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xe89bf3239d8f37c7 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha512sig0_cg_cp_rs1_b1: + sha512sig0 x11, x1 # perform operation + 80000074: 10609593 sha512sig0 x11,x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zknh_sha512sig0_cg_cp_rs1_b1, Zknh_sha512sig0_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00b20c63 beq x4,x11,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x23, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010b93 addi x23,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xc961fb9ba503fd81 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha512sig0_cg_cp_rs1_b2: + sha512sig0 x19, x2 # perform operation + 800000a4: 10611993 sha512sig0 x19,x2 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknh_sha512sig0_cg_cp_rs1_b2, Zknh_sha512sig0_cg_cp_rs1_b2_str) + 800000a8: 000bb203 ld x4,0(x23) + 800000ac: 01320c63 beq x4,x19,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008b8b93 addi x23,x23,8 + + mv x10, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018513 addi x10,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x3a16cd99cd6697f4 + 800000cc: 00053183 ld x3,0(x10) + 800000d0: 00850513 addi x10,x10,8 + +00000000800000d4 : +Zknh_sha512sig0_cg_cp_rs1_b3: + sha512sig0 x19, x3 # perform operation + 800000d4: 10619993 sha512sig0 x19,x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x19, Zknh_sha512sig0_cg_cp_rs1_b3, Zknh_sha512sig0_cg_cp_rs1_b3_str) + 800000d8: 000bb203 ld x4,0(x23) + 800000dc: 01320c63 beq x4,x19,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008b8b93 addi x23,x23,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xa067a3d6cf175e2f + 80000100: 00053203 ld x4,0(x10) + 80000104: 00850513 addi x10,x10,8 + +0000000080000108 : +Zknh_sha512sig0_cg_cp_rs1_b4: + sha512sig0 x20, x4 # perform operation + 80000108: 10621a13 sha512sig0 x20,x4 + # Check if x20 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x20, Zknh_sha512sig0_cg_cp_rs1_b4, Zknh_sha512sig0_cg_cp_rs1_b4_str) + 8000010c: 000bb683 ld x13,0(x23) + 80000110: 01468c63 beq x13,x20,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x4ecec8a3dacacef7 + 8000012c: 00053283 ld x5,0(x10) + 80000130: 00850513 addi x10,x10,8 + +0000000080000134 : +Zknh_sha512sig0_cg_cp_rs1_b5: + sha512sig0 x22, x5 # perform operation + 80000134: 10629b13 sha512sig0 x22,x5 + # Check if x22 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x22, Zknh_sha512sig0_cg_cp_rs1_b5, Zknh_sha512sig0_cg_cp_rs1_b5_str) + 80000138: 000bb683 ld x13,0(x23) + 8000013c: 01668c63 beq x13,x22,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xf8bd709b69ce17b5 + 80000158: 00053303 ld x6,0(x10) + 8000015c: 00850513 addi x10,x10,8 + +0000000080000160 : +Zknh_sha512sig0_cg_cp_rs1_b6: + sha512sig0 x1, x6 # perform operation + 80000160: 10631093 sha512sig0 x1,x6 + # Check if x1 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x1, Zknh_sha512sig0_cg_cp_rs1_b6, Zknh_sha512sig0_cg_cp_rs1_b6_str) + 80000164: 000bb683 ld x13,0(x23) + 80000168: 00168c63 beq x13,x1,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x44f7a8303beff3c9 + 80000184: 00053383 ld x7,0(x10) + 80000188: 00850513 addi x10,x10,8 + +000000008000018c : +Zknh_sha512sig0_cg_cp_rs1_b7: + sha512sig0 x18, x7 # perform operation + 8000018c: 10639913 sha512sig0 x18,x7 + # Check if x18 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x18, Zknh_sha512sig0_cg_cp_rs1_b7, Zknh_sha512sig0_cg_cp_rs1_b7_str) + 80000190: 000bb683 ld x13,0(x23) + 80000194: 01268c63 beq x13,x18,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x99b2d58b44f2c50a + 800001b0: 00053403 ld x8,0(x10) + 800001b4: 00850513 addi x10,x10,8 + +00000000800001b8 : +Zknh_sha512sig0_cg_cp_rs1_b8: + sha512sig0 x7, x8 # perform operation + 800001b8: 10641393 sha512sig0 x7,x8 + # Check if x7 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x7, Zknh_sha512sig0_cg_cp_rs1_b8, Zknh_sha512sig0_cg_cp_rs1_b8_str) + 800001bc: 000bb683 ld x13,0(x23) + 800001c0: 00768c63 beq x13,x7,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xc35a3cc43ae38c27 + 800001dc: 00053483 ld x9,0(x10) + 800001e0: 00850513 addi x10,x10,8 + +00000000800001e4 : +Zknh_sha512sig0_cg_cp_rs1_b9: + sha512sig0 x3, x9 # perform operation + 800001e4: 10649193 sha512sig0 x3,x9 + # Check if x3 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x3, Zknh_sha512sig0_cg_cp_rs1_b9, Zknh_sha512sig0_cg_cp_rs1_b9_str) + 800001e8: 000bb683 ld x13,0(x23) + 800001ec: 00368c63 beq x13,x3,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089df .word 0x800089df + 80000200: 00000000 .word 0x00000000 + 80000204: 008b8b93 addi x23,x23,8 + + mv x3, x10 # switch data pointer register to avoid conflict with test + 80000208: 00050193 addi x3,x10,0 +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0xfb028b660c49f729 + 8000020c: 0001b503 ld x10,0(x3) + 80000210: 00818193 addi x3,x3,8 + +0000000080000214 : +Zknh_sha512sig0_cg_cp_rs1_b10: + sha512sig0 x29, x10 # perform operation + 80000214: 10651e93 sha512sig0 x29,x10 + # Check if x29 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x29, Zknh_sha512sig0_cg_cp_rs1_b10, Zknh_sha512sig0_cg_cp_rs1_b10_str) + 80000218: 000bb683 ld x13,0(x23) + 8000021c: 01d68c63 beq x13,x29,80000234 + 80000220: 5e00276f jal x14,80002800 + 80000224: 80000214 .word 0x80000214 + 80000228: 00000000 .word 0x00000000 + 8000022c: 80008a17 .word 0x80008a17 + 80000230: 00000000 .word 0x00000000 + 80000234: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x3, x11) # load rs1: x11 = 0x390b7afd21daedcb + 80000238: 0001b583 ld x11,0(x3) + 8000023c: 00818193 addi x3,x3,8 + +0000000080000240 : +Zknh_sha512sig0_cg_cp_rs1_b11: + sha512sig0 x10, x11 # perform operation + 80000240: 10659513 sha512sig0 x10,x11 + # Check if x10 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x10, Zknh_sha512sig0_cg_cp_rs1_b11, Zknh_sha512sig0_cg_cp_rs1_b11_str) + 80000244: 000bb683 ld x13,0(x23) + 80000248: 00a68c63 beq x13,x10,80000260 + 8000024c: 5b40276f jal x14,80002800 + 80000250: 80000240 .word 0x80000240 + 80000254: 00000000 .word 0x00000000 + 80000258: 80008a50 .word 0x80008a50 + 8000025c: 00000000 .word 0x00000000 + 80000260: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x6343b7f895d39a14 + 80000264: 0001b603 ld x12,0(x3) + 80000268: 00818193 addi x3,x3,8 + +000000008000026c : +Zknh_sha512sig0_cg_cp_rs1_b12: + sha512sig0 x1, x12 # perform operation + 8000026c: 10661093 sha512sig0 x1,x12 + # Check if x1 contains the expected result. x23 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x23, x14, x13, x1, Zknh_sha512sig0_cg_cp_rs1_b12, Zknh_sha512sig0_cg_cp_rs1_b12_str) + 80000270: 000bb683 ld x13,0(x23) + 80000274: 00168c63 beq x13,x1,8000028c + 80000278: 5880276f jal x14,80002800 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 80008a89 .word 0x80008a89 + 80000288: 00000000 .word 0x00000000 + 8000028c: 008b8b93 addi x23,x23,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000290: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000294: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x3, x13) # load rs1: x13 = 0x01dd29fb692c4755 + 80000298: 0001b683 ld x13,0(x3) + 8000029c: 00818193 addi x3,x3,8 + +00000000800002a0 : +Zknh_sha512sig0_cg_cp_rs1_b13: + sha512sig0 x14, x13 # perform operation + 800002a0: 10669713 sha512sig0 x14,x13 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zknh_sha512sig0_cg_cp_rs1_b13, Zknh_sha512sig0_cg_cp_rs1_b13_str) + 800002a4: 000bb383 ld x7,0(x23) + 800002a8: 00e38c63 beq x7,x14,800002c0 + 800002ac: 52c0246f jal x8,800027d8 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 80008ac2 .word 0x80008ac2 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0x196023843f617239 + 800002c4: 0001b703 ld x14,0(x3) + 800002c8: 00818193 addi x3,x3,8 + +00000000800002cc : +Zknh_sha512sig0_cg_cp_rs1_b14: + sha512sig0 x15, x14 # perform operation + 800002cc: 10671793 sha512sig0 x15,x14 + # Check if x15 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x15, Zknh_sha512sig0_cg_cp_rs1_b14, Zknh_sha512sig0_cg_cp_rs1_b14_str) + 800002d0: 000bb383 ld x7,0(x23) + 800002d4: 00f38c63 beq x7,x15,800002ec + 800002d8: 5000246f jal x8,800027d8 + 800002dc: 800002cc .word 0x800002cc + 800002e0: 00000000 .word 0x00000000 + 800002e4: 80008afb .word 0x80008afb + 800002e8: 00000000 .word 0x00000000 + 800002ec: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x3, x15) # load rs1: x15 = 0xe9086f4071910b98 + 800002f0: 0001b783 ld x15,0(x3) + 800002f4: 00818193 addi x3,x3,8 + +00000000800002f8 : +Zknh_sha512sig0_cg_cp_rs1_b15: + sha512sig0 x5, x15 # perform operation + 800002f8: 10679293 sha512sig0 x5,x15 + # Check if x5 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x5, Zknh_sha512sig0_cg_cp_rs1_b15, Zknh_sha512sig0_cg_cp_rs1_b15_str) + 800002fc: 000bb383 ld x7,0(x23) + 80000300: 00538c63 beq x7,x5,80000318 + 80000304: 4d40246f jal x8,800027d8 + 80000308: 800002f8 .word 0x800002f8 + 8000030c: 00000000 .word 0x00000000 + 80000310: 80008b34 .word 0x80008b34 + 80000314: 00000000 .word 0x00000000 + 80000318: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x195e5148a562d0a5 + 8000031c: 0001b803 ld x16,0(x3) + 80000320: 00818193 addi x3,x3,8 + +0000000080000324 : +Zknh_sha512sig0_cg_cp_rs1_b16: + sha512sig0 x10, x16 # perform operation + 80000324: 10681513 sha512sig0 x10,x16 + # Check if x10 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x10, Zknh_sha512sig0_cg_cp_rs1_b16, Zknh_sha512sig0_cg_cp_rs1_b16_str) + 80000328: 000bb383 ld x7,0(x23) + 8000032c: 00a38c63 beq x7,x10,80000344 + 80000330: 4a80246f jal x8,800027d8 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b6d .word 0x80008b6d + 80000340: 00000000 .word 0x00000000 + 80000344: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0xe69ba55521de3995 + 80000348: 0001b883 ld x17,0(x3) + 8000034c: 00818193 addi x3,x3,8 + +0000000080000350 : +Zknh_sha512sig0_cg_cp_rs1_b17: + sha512sig0 x6, x17 # perform operation + 80000350: 10689313 sha512sig0 x6,x17 + # Check if x6 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x6, Zknh_sha512sig0_cg_cp_rs1_b17, Zknh_sha512sig0_cg_cp_rs1_b17_str) + 80000354: 000bb383 ld x7,0(x23) + 80000358: 00638c63 beq x7,x6,80000370 + 8000035c: 47c0246f jal x8,800027d8 + 80000360: 80000350 .word 0x80000350 + 80000364: 00000000 .word 0x00000000 + 80000368: 80008ba6 .word 0x80008ba6 + 8000036c: 00000000 .word 0x00000000 + 80000370: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0x10dbe519ed442f63 + 80000374: 0001b903 ld x18,0(x3) + 80000378: 00818193 addi x3,x3,8 + +000000008000037c : +Zknh_sha512sig0_cg_cp_rs1_b18: + sha512sig0 x24, x18 # perform operation + 8000037c: 10691c13 sha512sig0 x24,x18 + # Check if x24 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x24, Zknh_sha512sig0_cg_cp_rs1_b18, Zknh_sha512sig0_cg_cp_rs1_b18_str) + 80000380: 000bb383 ld x7,0(x23) + 80000384: 01838c63 beq x7,x24,8000039c + 80000388: 4500246f jal x8,800027d8 + 8000038c: 8000037c .word 0x8000037c + 80000390: 00000000 .word 0x00000000 + 80000394: 80008bdf .word 0x80008bdf + 80000398: 00000000 .word 0x00000000 + 8000039c: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0xeeb7ace35e54a718 + 800003a0: 0001b983 ld x19,0(x3) + 800003a4: 00818193 addi x3,x3,8 + +00000000800003a8 : +Zknh_sha512sig0_cg_cp_rs1_b19: + sha512sig0 x1, x19 # perform operation + 800003a8: 10699093 sha512sig0 x1,x19 + # Check if x1 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x1, Zknh_sha512sig0_cg_cp_rs1_b19, Zknh_sha512sig0_cg_cp_rs1_b19_str) + 800003ac: 000bb383 ld x7,0(x23) + 800003b0: 00138c63 beq x7,x1,800003c8 + 800003b4: 4240246f jal x8,800027d8 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 80008c18 .word 0x80008c18 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x2c1f6d9f18bf660d + 800003cc: 0001ba03 ld x20,0(x3) + 800003d0: 00818193 addi x3,x3,8 + +00000000800003d4 : +Zknh_sha512sig0_cg_cp_rs1_b20: + sha512sig0 x14, x20 # perform operation + 800003d4: 106a1713 sha512sig0 x14,x20 + # Check if x14 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x14, Zknh_sha512sig0_cg_cp_rs1_b20, Zknh_sha512sig0_cg_cp_rs1_b20_str) + 800003d8: 000bb383 ld x7,0(x23) + 800003dc: 00e38c63 beq x7,x14,800003f4 + 800003e0: 3f80246f jal x8,800027d8 + 800003e4: 800003d4 .word 0x800003d4 + 800003e8: 00000000 .word 0x00000000 + 800003ec: 80008c51 .word 0x80008c51 + 800003f0: 00000000 .word 0x00000000 + 800003f4: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x4e3a8d582ac1264c + 800003f8: 0001ba83 ld x21,0(x3) + 800003fc: 00818193 addi x3,x3,8 + +0000000080000400 : +Zknh_sha512sig0_cg_cp_rs1_b21: + sha512sig0 x9, x21 # perform operation + 80000400: 106a9493 sha512sig0 x9,x21 + # Check if x9 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x9, Zknh_sha512sig0_cg_cp_rs1_b21, Zknh_sha512sig0_cg_cp_rs1_b21_str) + 80000404: 000bb383 ld x7,0(x23) + 80000408: 00938c63 beq x7,x9,80000420 + 8000040c: 3cc0246f jal x8,800027d8 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c8a .word 0x80008c8a + 8000041c: 00000000 .word 0x00000000 + 80000420: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x2d8a8f6d0250773c + 80000424: 0001bb03 ld x22,0(x3) + 80000428: 00818193 addi x3,x3,8 + +000000008000042c : +Zknh_sha512sig0_cg_cp_rs1_b22: + sha512sig0 x18, x22 # perform operation + 8000042c: 106b1913 sha512sig0 x18,x22 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zknh_sha512sig0_cg_cp_rs1_b22, Zknh_sha512sig0_cg_cp_rs1_b22_str) + 80000430: 000bb383 ld x7,0(x23) + 80000434: 01238c63 beq x7,x18,8000044c + 80000438: 3a00246f jal x8,800027d8 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008cc3 .word 0x80008cc3 + 80000448: 00000000 .word 0x00000000 + 8000044c: 008b8b93 addi x23,x23,8 + + mv x19, x23 # switch signature pointer register to avoid conflict with test + 80000450: 000b8993 addi x19,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0xcebe1442eb1c4492 + 80000454: 0001bb83 ld x23,0(x3) + 80000458: 00818193 addi x3,x3,8 + +000000008000045c : +Zknh_sha512sig0_cg_cp_rs1_b23: + sha512sig0 x15, x23 # perform operation + 8000045c: 106b9793 sha512sig0 x15,x23 + # Check if x15 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x15, Zknh_sha512sig0_cg_cp_rs1_b23, Zknh_sha512sig0_cg_cp_rs1_b23_str) + 80000460: 0009b383 ld x7,0(x19) + 80000464: 00f38c63 beq x7,x15,8000047c + 80000468: 3700246f jal x8,800027d8 + 8000046c: 8000045c .word 0x8000045c + 80000470: 00000000 .word 0x00000000 + 80000474: 80008cfc .word 0x80008cfc + 80000478: 00000000 .word 0x00000000 + 8000047c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0xb65092e7eb367928 + 80000480: 0001bc03 ld x24,0(x3) + 80000484: 00818193 addi x3,x3,8 + +0000000080000488 : +Zknh_sha512sig0_cg_cp_rs1_b24: + sha512sig0 x27, x24 # perform operation + 80000488: 106c1d93 sha512sig0 x27,x24 + # Check if x27 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x27, Zknh_sha512sig0_cg_cp_rs1_b24, Zknh_sha512sig0_cg_cp_rs1_b24_str) + 8000048c: 0009b383 ld x7,0(x19) + 80000490: 01b38c63 beq x7,x27,800004a8 + 80000494: 3440246f jal x8,800027d8 + 80000498: 80000488 .word 0x80000488 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 80008d35 .word 0x80008d35 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x88cfb0577152aa25 + 800004ac: 0001bc83 ld x25,0(x3) + 800004b0: 00818193 addi x3,x3,8 + +00000000800004b4 : +Zknh_sha512sig0_cg_cp_rs1_b25: + sha512sig0 x13, x25 # perform operation + 800004b4: 106c9693 sha512sig0 x13,x25 + # Check if x13 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x13, Zknh_sha512sig0_cg_cp_rs1_b25, Zknh_sha512sig0_cg_cp_rs1_b25_str) + 800004b8: 0009b383 ld x7,0(x19) + 800004bc: 00d38c63 beq x7,x13,800004d4 + 800004c0: 3180246f jal x8,800027d8 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 80008d6e .word 0x80008d6e + 800004d0: 00000000 .word 0x00000000 + 800004d4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x5565178a45171248 + 800004d8: 0001bd03 ld x26,0(x3) + 800004dc: 00818193 addi x3,x3,8 + +00000000800004e0 : +Zknh_sha512sig0_cg_cp_rs1_b26: + sha512sig0 x12, x26 # perform operation + 800004e0: 106d1613 sha512sig0 x12,x26 + # Check if x12 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x12, Zknh_sha512sig0_cg_cp_rs1_b26, Zknh_sha512sig0_cg_cp_rs1_b26_str) + 800004e4: 0009b383 ld x7,0(x19) + 800004e8: 00c38c63 beq x7,x12,80000500 + 800004ec: 2ec0246f jal x8,800027d8 + 800004f0: 800004e0 .word 0x800004e0 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 80008da7 .word 0x80008da7 + 800004fc: 00000000 .word 0x00000000 + 80000500: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0xeda333d022f9741d + 80000504: 0001bd83 ld x27,0(x3) + 80000508: 00818193 addi x3,x3,8 + +000000008000050c : +Zknh_sha512sig0_cg_cp_rs1_b27: + sha512sig0 x0, x27 # perform operation + 8000050c: 106d9013 sha512sig0 x0,x27 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zknh_sha512sig0_cg_cp_rs1_b27, Zknh_sha512sig0_cg_cp_rs1_b27_str) + 80000510: 0009b383 ld x7,0(x19) + 80000514: 00038c63 beq x7,x0,8000052c + 80000518: 2c00246f jal x8,800027d8 + 8000051c: 8000050c .word 0x8000050c + 80000520: 00000000 .word 0x00000000 + 80000524: 80008de0 .word 0x80008de0 + 80000528: 00000000 .word 0x00000000 + 8000052c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0xce2f54b387fadfb3 + 80000530: 0001be03 ld x28,0(x3) + 80000534: 00818193 addi x3,x3,8 + +0000000080000538 : +Zknh_sha512sig0_cg_cp_rs1_b28: + sha512sig0 x11, x28 # perform operation + 80000538: 106e1593 sha512sig0 x11,x28 + # Check if x11 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x11, Zknh_sha512sig0_cg_cp_rs1_b28, Zknh_sha512sig0_cg_cp_rs1_b28_str) + 8000053c: 0009b383 ld x7,0(x19) + 80000540: 00b38c63 beq x7,x11,80000558 + 80000544: 2940246f jal x8,800027d8 + 80000548: 80000538 .word 0x80000538 + 8000054c: 00000000 .word 0x00000000 + 80000550: 80008e19 .word 0x80008e19 + 80000554: 00000000 .word 0x00000000 + 80000558: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0xa2ab4e16e70de035 + 8000055c: 0001be83 ld x29,0(x3) + 80000560: 00818193 addi x3,x3,8 + +0000000080000564 : +Zknh_sha512sig0_cg_cp_rs1_b29: + sha512sig0 x14, x29 # perform operation + 80000564: 106e9713 sha512sig0 x14,x29 + # Check if x14 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x14, Zknh_sha512sig0_cg_cp_rs1_b29, Zknh_sha512sig0_cg_cp_rs1_b29_str) + 80000568: 0009b383 ld x7,0(x19) + 8000056c: 00e38c63 beq x7,x14,80000584 + 80000570: 2680246f jal x8,800027d8 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008e52 .word 0x80008e52 + 80000580: 00000000 .word 0x00000000 + 80000584: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x57f0a80577af87e3 + 80000588: 0001bf03 ld x30,0(x3) + 8000058c: 00818193 addi x3,x3,8 + +0000000080000590 : +Zknh_sha512sig0_cg_cp_rs1_b30: + sha512sig0 x10, x30 # perform operation + 80000590: 106f1513 sha512sig0 x10,x30 + # Check if x10 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x10, Zknh_sha512sig0_cg_cp_rs1_b30, Zknh_sha512sig0_cg_cp_rs1_b30_str) + 80000594: 0009b383 ld x7,0(x19) + 80000598: 00a38c63 beq x7,x10,800005b0 + 8000059c: 23c0246f jal x8,800027d8 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008e8b .word 0x80008e8b + 800005ac: 00000000 .word 0x00000000 + 800005b0: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x20818763a17da28d + 800005b4: 0001bf83 ld x31,0(x3) + 800005b8: 00818193 addi x3,x3,8 + +00000000800005bc : +Zknh_sha512sig0_cg_cp_rs1_b31: + sha512sig0 x17, x31 # perform operation + 800005bc: 106f9893 sha512sig0 x17,x31 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zknh_sha512sig0_cg_cp_rs1_b31, Zknh_sha512sig0_cg_cp_rs1_b31_str) + 800005c0: 0009b383 ld x7,0(x19) + 800005c4: 01138c63 beq x7,x17,800005dc + 800005c8: 2100246f jal x8,800027d8 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 80008ec4 .word 0x80008ec4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 00898993 addi x19,x19,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x21d448acca6aa81e + 800005e0: 0001b803 ld x16,0(x3) + 800005e4: 00818193 addi x3,x3,8 + +00000000800005e8 : +Zknh_sha512sig0_cg_cp_rd_b0: + sha512sig0 x0, x16 # perform operation + 800005e8: 10681013 sha512sig0 x0,x16 + # Check if x0 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x0, Zknh_sha512sig0_cg_cp_rd_b0, Zknh_sha512sig0_cg_cp_rd_b0_str) + 800005ec: 0009b383 ld x7,0(x19) + 800005f0: 00038c63 beq x7,x0,80000608 + 800005f4: 1e40246f jal x8,800027d8 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 80008efd .word 0x80008efd + 80000604: 00000000 .word 0x00000000 + 80000608: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x948eb94c95ea5ea8 + 8000060c: 0001bc83 ld x25,0(x3) + 80000610: 00818193 addi x3,x3,8 + +0000000080000614 : +Zknh_sha512sig0_cg_cp_rd_b1: + sha512sig0 x1, x25 # perform operation + 80000614: 106c9093 sha512sig0 x1,x25 + # Check if x1 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x1, Zknh_sha512sig0_cg_cp_rd_b1, Zknh_sha512sig0_cg_cp_rd_b1_str) + 80000618: 0009b383 ld x7,0(x19) + 8000061c: 00138c63 beq x7,x1,80000634 + 80000620: 1b80246f jal x8,800027d8 + 80000624: 80000614 .word 0x80000614 + 80000628: 00000000 .word 0x00000000 + 8000062c: 80008f34 .word 0x80008f34 + 80000630: 00000000 .word 0x00000000 + 80000634: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x4f37747bcf230e45 + 80000638: 0001b083 ld x1,0(x3) + 8000063c: 00818193 addi x3,x3,8 + +0000000080000640 : +Zknh_sha512sig0_cg_cp_rd_b2: + sha512sig0 x2, x1 # perform operation + 80000640: 10609113 sha512sig0 x2,x1 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zknh_sha512sig0_cg_cp_rd_b2, Zknh_sha512sig0_cg_cp_rd_b2_str) + 80000644: 0009b383 ld x7,0(x19) + 80000648: 00238c63 beq x7,x2,80000660 + 8000064c: 18c0246f jal x8,800027d8 + 80000650: 80000640 .word 0x80000640 + 80000654: 00000000 .word 0x00000000 + 80000658: 80008f6b .word 0x80008f6b + 8000065c: 00000000 .word 0x00000000 + 80000660: 00898993 addi x19,x19,8 + + mv x12, x3 # switch data pointer register to avoid conflict with test + 80000664: 00018613 addi x12,x3,0 +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x88030bd867c44ed6 + 80000668: 00063e03 ld x28,0(x12) + 8000066c: 00860613 addi x12,x12,8 + +0000000080000670 : +Zknh_sha512sig0_cg_cp_rd_b3: + sha512sig0 x3, x28 # perform operation + 80000670: 106e1193 sha512sig0 x3,x28 + # Check if x3 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x3, Zknh_sha512sig0_cg_cp_rd_b3, Zknh_sha512sig0_cg_cp_rd_b3_str) + 80000674: 0009b383 ld x7,0(x19) + 80000678: 00338c63 beq x7,x3,80000690 + 8000067c: 15c0246f jal x8,800027d8 + 80000680: 80000670 .word 0x80000670 + 80000684: 00000000 .word 0x00000000 + 80000688: 80008fa2 .word 0x80008fa2 + 8000068c: 00000000 .word 0x00000000 + 80000690: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x162b6b9cdf70a588 + 80000694: 00063783 ld x15,0(x12) + 80000698: 00860613 addi x12,x12,8 + +000000008000069c : +Zknh_sha512sig0_cg_cp_rd_b4: + sha512sig0 x4, x15 # perform operation + 8000069c: 10679213 sha512sig0 x4,x15 + # Check if x4 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x4, Zknh_sha512sig0_cg_cp_rd_b4, Zknh_sha512sig0_cg_cp_rd_b4_str) + 800006a0: 0009b383 ld x7,0(x19) + 800006a4: 00438c63 beq x7,x4,800006bc + 800006a8: 1300246f jal x8,800027d8 + 800006ac: 8000069c .word 0x8000069c + 800006b0: 00000000 .word 0x00000000 + 800006b4: 80008fd9 .word 0x80008fd9 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x4f22ffb0eb970bd2 + 800006c0: 00063c03 ld x24,0(x12) + 800006c4: 00860613 addi x12,x12,8 + +00000000800006c8 : +Zknh_sha512sig0_cg_cp_rd_b5: + sha512sig0 x5, x24 # perform operation + 800006c8: 106c1293 sha512sig0 x5,x24 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zknh_sha512sig0_cg_cp_rd_b5, Zknh_sha512sig0_cg_cp_rd_b5_str) + 800006cc: 0009b383 ld x7,0(x19) + 800006d0: 00538c63 beq x7,x5,800006e8 + 800006d4: 1040246f jal x8,800027d8 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 80009010 .word 0x80009010 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0xc14224c36280dbfa + 800006ec: 00063083 ld x1,0(x12) + 800006f0: 00860613 addi x12,x12,8 + +00000000800006f4 : +Zknh_sha512sig0_cg_cp_rd_b6: + sha512sig0 x6, x1 # perform operation + 800006f4: 10609313 sha512sig0 x6,x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zknh_sha512sig0_cg_cp_rd_b6, Zknh_sha512sig0_cg_cp_rd_b6_str) + 800006f8: 0009b383 ld x7,0(x19) + 800006fc: 00638c63 beq x7,x6,80000714 + 80000700: 0d80246f jal x8,800027d8 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80009047 .word 0x80009047 + 80000710: 00000000 .word 0x00000000 + 80000714: 00898993 addi x19,x19,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000718: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 8000071c: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0xd69201a13d1ad9db + 80000720: 00063183 ld x3,0(x12) + 80000724: 00860613 addi x12,x12,8 + +0000000080000728 : +Zknh_sha512sig0_cg_cp_rd_b7: + sha512sig0 x7, x3 # perform operation + 80000728: 10619393 sha512sig0 x7,x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zknh_sha512sig0_cg_cp_rd_b7, Zknh_sha512sig0_cg_cp_rd_b7_str) + 8000072c: 0009b203 ld x4,0(x19) + 80000730: 00720c63 beq x4,x7,80000748 + 80000734: 08c022ef jal x5,800027c0 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 8000907e .word 0x8000907e + 80000744: 00000000 .word 0x00000000 + 80000748: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x4e11d3d56f678524 + 8000074c: 00063e83 ld x29,0(x12) + 80000750: 00860613 addi x12,x12,8 + +0000000080000754 : +Zknh_sha512sig0_cg_cp_rd_b8: + sha512sig0 x8, x29 # perform operation + 80000754: 106e9413 sha512sig0 x8,x29 + # Check if x8 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x8, Zknh_sha512sig0_cg_cp_rd_b8, Zknh_sha512sig0_cg_cp_rd_b8_str) + 80000758: 0009b203 ld x4,0(x19) + 8000075c: 00820c63 beq x4,x8,80000774 + 80000760: 060022ef jal x5,800027c0 + 80000764: 80000754 .word 0x80000754 + 80000768: 00000000 .word 0x00000000 + 8000076c: 800090b5 .word 0x800090b5 + 80000770: 00000000 .word 0x00000000 + 80000774: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0xe8ccf122482d15c8 + 80000778: 00063a03 ld x20,0(x12) + 8000077c: 00860613 addi x12,x12,8 + +0000000080000780 : +Zknh_sha512sig0_cg_cp_rd_b9: + sha512sig0 x9, x20 # perform operation + 80000780: 106a1493 sha512sig0 x9,x20 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zknh_sha512sig0_cg_cp_rd_b9, Zknh_sha512sig0_cg_cp_rd_b9_str) + 80000784: 0009b203 ld x4,0(x19) + 80000788: 00920c63 beq x4,x9,800007a0 + 8000078c: 034022ef jal x5,800027c0 + 80000790: 80000780 .word 0x80000780 + 80000794: 00000000 .word 0x00000000 + 80000798: 800090ec .word 0x800090ec + 8000079c: 00000000 .word 0x00000000 + 800007a0: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0xef4f632d4a565623 + 800007a4: 00063483 ld x9,0(x12) + 800007a8: 00860613 addi x12,x12,8 + +00000000800007ac : +Zknh_sha512sig0_cg_cp_rd_b10: + sha512sig0 x10, x9 # perform operation + 800007ac: 10649513 sha512sig0 x10,x9 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zknh_sha512sig0_cg_cp_rd_b10, Zknh_sha512sig0_cg_cp_rd_b10_str) + 800007b0: 0009b203 ld x4,0(x19) + 800007b4: 00a20c63 beq x4,x10,800007cc + 800007b8: 008022ef jal x5,800027c0 + 800007bc: 800007ac .word 0x800007ac + 800007c0: 00000000 .word 0x00000000 + 800007c4: 80009123 .word 0x80009123 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7091d9c9343d44c7 + 800007d0: 00063e83 ld x29,0(x12) + 800007d4: 00860613 addi x12,x12,8 + +00000000800007d8 : +Zknh_sha512sig0_cg_cp_rd_b11: + sha512sig0 x11, x29 # perform operation + 800007d8: 106e9593 sha512sig0 x11,x29 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zknh_sha512sig0_cg_cp_rd_b11, Zknh_sha512sig0_cg_cp_rd_b11_str) + 800007dc: 0009b203 ld x4,0(x19) + 800007e0: 00b20c63 beq x4,x11,800007f8 + 800007e4: 7dd012ef jal x5,800027c0 + 800007e8: 800007d8 .word 0x800007d8 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 8000915b .word 0x8000915b + 800007f4: 00000000 .word 0x00000000 + 800007f8: 00898993 addi x19,x19,8 + + mv x27, x12 # switch data pointer register to avoid conflict with test + 800007fc: 00060d93 addi x27,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0xd9c50736dc83c6d8 + 80000800: 000dbc03 ld x24,0(x27) + 80000804: 008d8d93 addi x27,x27,8 + +0000000080000808 : +Zknh_sha512sig0_cg_cp_rd_b12: + sha512sig0 x12, x24 # perform operation + 80000808: 106c1613 sha512sig0 x12,x24 + # Check if x12 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x12, Zknh_sha512sig0_cg_cp_rd_b12, Zknh_sha512sig0_cg_cp_rd_b12_str) + 8000080c: 0009b203 ld x4,0(x19) + 80000810: 00c20c63 beq x4,x12,80000828 + 80000814: 7ad012ef jal x5,800027c0 + 80000818: 80000808 .word 0x80000808 + 8000081c: 00000000 .word 0x00000000 + 80000820: 80009193 .word 0x80009193 + 80000824: 00000000 .word 0x00000000 + 80000828: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x899873512febcb3f + 8000082c: 000dba83 ld x21,0(x27) + 80000830: 008d8d93 addi x27,x27,8 + +0000000080000834 : +Zknh_sha512sig0_cg_cp_rd_b13: + sha512sig0 x13, x21 # perform operation + 80000834: 106a9693 sha512sig0 x13,x21 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zknh_sha512sig0_cg_cp_rd_b13, Zknh_sha512sig0_cg_cp_rd_b13_str) + 80000838: 0009b203 ld x4,0(x19) + 8000083c: 00d20c63 beq x4,x13,80000854 + 80000840: 781012ef jal x5,800027c0 + 80000844: 80000834 .word 0x80000834 + 80000848: 00000000 .word 0x00000000 + 8000084c: 800091cb .word 0x800091cb + 80000850: 00000000 .word 0x00000000 + 80000854: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs1: x24 = 0x4f0292935ced31b1 + 80000858: 000dbc03 ld x24,0(x27) + 8000085c: 008d8d93 addi x27,x27,8 + +0000000080000860 : +Zknh_sha512sig0_cg_cp_rd_b14: + sha512sig0 x14, x24 # perform operation + 80000860: 106c1713 sha512sig0 x14,x24 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zknh_sha512sig0_cg_cp_rd_b14, Zknh_sha512sig0_cg_cp_rd_b14_str) + 80000864: 0009b203 ld x4,0(x19) + 80000868: 00e20c63 beq x4,x14,80000880 + 8000086c: 755012ef jal x5,800027c0 + 80000870: 80000860 .word 0x80000860 + 80000874: 00000000 .word 0x00000000 + 80000878: 80009203 .word 0x80009203 + 8000087c: 00000000 .word 0x00000000 + 80000880: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs1: x26 = 0x35997c78a5369c83 + 80000884: 000dbd03 ld x26,0(x27) + 80000888: 008d8d93 addi x27,x27,8 + +000000008000088c : +Zknh_sha512sig0_cg_cp_rd_b15: + sha512sig0 x15, x26 # perform operation + 8000088c: 106d1793 sha512sig0 x15,x26 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zknh_sha512sig0_cg_cp_rd_b15, Zknh_sha512sig0_cg_cp_rd_b15_str) + 80000890: 0009b203 ld x4,0(x19) + 80000894: 00f20c63 beq x4,x15,800008ac + 80000898: 729012ef jal x5,800027c0 + 8000089c: 8000088c .word 0x8000088c + 800008a0: 00000000 .word 0x00000000 + 800008a4: 8000923b .word 0x8000923b + 800008a8: 00000000 .word 0x00000000 + 800008ac: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x8a204f2d6302b0ac + 800008b0: 000db103 ld x2,0(x27) + 800008b4: 008d8d93 addi x27,x27,8 + +00000000800008b8 : +Zknh_sha512sig0_cg_cp_rd_b16: + sha512sig0 x16, x2 # perform operation + 800008b8: 10611813 sha512sig0 x16,x2 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zknh_sha512sig0_cg_cp_rd_b16, Zknh_sha512sig0_cg_cp_rd_b16_str) + 800008bc: 0009b203 ld x4,0(x19) + 800008c0: 01020c63 beq x4,x16,800008d8 + 800008c4: 6fd012ef jal x5,800027c0 + 800008c8: 800008b8 .word 0x800008b8 + 800008cc: 00000000 .word 0x00000000 + 800008d0: 80009273 .word 0x80009273 + 800008d4: 00000000 .word 0x00000000 + 800008d8: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x81b532288c830c22 + 800008dc: 000db803 ld x16,0(x27) + 800008e0: 008d8d93 addi x27,x27,8 + +00000000800008e4 : +Zknh_sha512sig0_cg_cp_rd_b17: + sha512sig0 x17, x16 # perform operation + 800008e4: 10681893 sha512sig0 x17,x16 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zknh_sha512sig0_cg_cp_rd_b17, Zknh_sha512sig0_cg_cp_rd_b17_str) + 800008e8: 0009b203 ld x4,0(x19) + 800008ec: 01120c63 beq x4,x17,80000904 + 800008f0: 6d1012ef jal x5,800027c0 + 800008f4: 800008e4 .word 0x800008e4 + 800008f8: 00000000 .word 0x00000000 + 800008fc: 800092ab .word 0x800092ab + 80000900: 00000000 .word 0x00000000 + 80000904: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x998a03465a6e7323 + 80000908: 000db703 ld x14,0(x27) + 8000090c: 008d8d93 addi x27,x27,8 + +0000000080000910 : +Zknh_sha512sig0_cg_cp_rd_b18: + sha512sig0 x18, x14 # perform operation + 80000910: 10671913 sha512sig0 x18,x14 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zknh_sha512sig0_cg_cp_rd_b18, Zknh_sha512sig0_cg_cp_rd_b18_str) + 80000914: 0009b203 ld x4,0(x19) + 80000918: 01220c63 beq x4,x18,80000930 + 8000091c: 6a5012ef jal x5,800027c0 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 800092e3 .word 0x800092e3 + 8000092c: 00000000 .word 0x00000000 + 80000930: 00898993 addi x19,x19,8 + + mv x30, x19 # switch signature pointer register to avoid conflict with test + 80000934: 00098f13 addi x30,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x1d8afcfdd6934b3f + 80000938: 000db583 ld x11,0(x27) + 8000093c: 008d8d93 addi x27,x27,8 + +0000000080000940 : +Zknh_sha512sig0_cg_cp_rd_b19: + sha512sig0 x19, x11 # perform operation + 80000940: 10659993 sha512sig0 x19,x11 + # Check if x19 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x19, Zknh_sha512sig0_cg_cp_rd_b19, Zknh_sha512sig0_cg_cp_rd_b19_str) + 80000944: 000f3203 ld x4,0(x30) + 80000948: 01320c63 beq x4,x19,80000960 + 8000094c: 675012ef jal x5,800027c0 + 80000950: 80000940 .word 0x80000940 + 80000954: 00000000 .word 0x00000000 + 80000958: 8000931b .word 0x8000931b + 8000095c: 00000000 .word 0x00000000 + 80000960: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0x55f6a957ed0b041c + 80000964: 000dbe03 ld x28,0(x27) + 80000968: 008d8d93 addi x27,x27,8 + +000000008000096c : +Zknh_sha512sig0_cg_cp_rd_b20: + sha512sig0 x20, x28 # perform operation + 8000096c: 106e1a13 sha512sig0 x20,x28 + # Check if x20 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x20, Zknh_sha512sig0_cg_cp_rd_b20, Zknh_sha512sig0_cg_cp_rd_b20_str) + 80000970: 000f3203 ld x4,0(x30) + 80000974: 01420c63 beq x4,x20,8000098c + 80000978: 649012ef jal x5,800027c0 + 8000097c: 8000096c .word 0x8000096c + 80000980: 00000000 .word 0x00000000 + 80000984: 80009353 .word 0x80009353 + 80000988: 00000000 .word 0x00000000 + 8000098c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x455cfc336ec67814 + 80000990: 000db903 ld x18,0(x27) + 80000994: 008d8d93 addi x27,x27,8 + +0000000080000998 : +Zknh_sha512sig0_cg_cp_rd_b21: + sha512sig0 x21, x18 # perform operation + 80000998: 10691a93 sha512sig0 x21,x18 + # Check if x21 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x21, Zknh_sha512sig0_cg_cp_rd_b21, Zknh_sha512sig0_cg_cp_rd_b21_str) + 8000099c: 000f3203 ld x4,0(x30) + 800009a0: 01520c63 beq x4,x21,800009b8 + 800009a4: 61d012ef jal x5,800027c0 + 800009a8: 80000998 .word 0x80000998 + 800009ac: 00000000 .word 0x00000000 + 800009b0: 8000938b .word 0x8000938b + 800009b4: 00000000 .word 0x00000000 + 800009b8: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x851b266945f2b0f9 + 800009bc: 000db503 ld x10,0(x27) + 800009c0: 008d8d93 addi x27,x27,8 + +00000000800009c4 : +Zknh_sha512sig0_cg_cp_rd_b22: + sha512sig0 x22, x10 # perform operation + 800009c4: 10651b13 sha512sig0 x22,x10 + # Check if x22 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x22, Zknh_sha512sig0_cg_cp_rd_b22, Zknh_sha512sig0_cg_cp_rd_b22_str) + 800009c8: 000f3203 ld x4,0(x30) + 800009cc: 01620c63 beq x4,x22,800009e4 + 800009d0: 5f1012ef jal x5,800027c0 + 800009d4: 800009c4 .word 0x800009c4 + 800009d8: 00000000 .word 0x00000000 + 800009dc: 800093c3 .word 0x800093c3 + 800009e0: 00000000 .word 0x00000000 + 800009e4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x0770fbe863613f59 + 800009e8: 000dba83 ld x21,0(x27) + 800009ec: 008d8d93 addi x27,x27,8 + +00000000800009f0 : +Zknh_sha512sig0_cg_cp_rd_b23: + sha512sig0 x23, x21 # perform operation + 800009f0: 106a9b93 sha512sig0 x23,x21 + # Check if x23 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x23, Zknh_sha512sig0_cg_cp_rd_b23, Zknh_sha512sig0_cg_cp_rd_b23_str) + 800009f4: 000f3203 ld x4,0(x30) + 800009f8: 01720c63 beq x4,x23,80000a10 + 800009fc: 5c5012ef jal x5,800027c0 + 80000a00: 800009f0 .word 0x800009f0 + 80000a04: 00000000 .word 0x00000000 + 80000a08: 800093fb .word 0x800093fb + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x4361182a64be8f84 + 80000a14: 000dba83 ld x21,0(x27) + 80000a18: 008d8d93 addi x27,x27,8 + +0000000080000a1c : +Zknh_sha512sig0_cg_cp_rd_b24: + sha512sig0 x24, x21 # perform operation + 80000a1c: 106a9c13 sha512sig0 x24,x21 + # Check if x24 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x24, Zknh_sha512sig0_cg_cp_rd_b24, Zknh_sha512sig0_cg_cp_rd_b24_str) + 80000a20: 000f3203 ld x4,0(x30) + 80000a24: 01820c63 beq x4,x24,80000a3c + 80000a28: 599012ef jal x5,800027c0 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 80009433 .word 0x80009433 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs1: x12 = 0x7277b3ebec48b4ba + 80000a40: 000db603 ld x12,0(x27) + 80000a44: 008d8d93 addi x27,x27,8 + +0000000080000a48 : +Zknh_sha512sig0_cg_cp_rd_b25: + sha512sig0 x25, x12 # perform operation + 80000a48: 10661c93 sha512sig0 x25,x12 + # Check if x25 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x25, Zknh_sha512sig0_cg_cp_rd_b25, Zknh_sha512sig0_cg_cp_rd_b25_str) + 80000a4c: 000f3203 ld x4,0(x30) + 80000a50: 01920c63 beq x4,x25,80000a68 + 80000a54: 56d012ef jal x5,800027c0 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 8000946b .word 0x8000946b + 80000a64: 00000000 .word 0x00000000 + 80000a68: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs1: x7 = 0xa486550dea4c53eb + 80000a6c: 000db383 ld x7,0(x27) + 80000a70: 008d8d93 addi x27,x27,8 + +0000000080000a74 : +Zknh_sha512sig0_cg_cp_rd_b26: + sha512sig0 x26, x7 # perform operation + 80000a74: 10639d13 sha512sig0 x26,x7 + # Check if x26 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x26, Zknh_sha512sig0_cg_cp_rd_b26, Zknh_sha512sig0_cg_cp_rd_b26_str) + 80000a78: 000f3203 ld x4,0(x30) + 80000a7c: 01a20c63 beq x4,x26,80000a94 + 80000a80: 541012ef jal x5,800027c0 + 80000a84: 80000a74 .word 0x80000a74 + 80000a88: 00000000 .word 0x00000000 + 80000a8c: 800094a3 .word 0x800094a3 + 80000a90: 00000000 .word 0x00000000 + 80000a94: 008f0f13 addi x30,x30,8 + + mv x3, x27 # switch data pointer register to avoid conflict with test + 80000a98: 000d8193 addi x3,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x4f563ccc8a56b36c + 80000a9c: 0001b103 ld x2,0(x3) + 80000aa0: 00818193 addi x3,x3,8 + +0000000080000aa4 : +Zknh_sha512sig0_cg_cp_rd_b27: + sha512sig0 x27, x2 # perform operation + 80000aa4: 10611d93 sha512sig0 x27,x2 + # Check if x27 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x27, Zknh_sha512sig0_cg_cp_rd_b27, Zknh_sha512sig0_cg_cp_rd_b27_str) + 80000aa8: 000f3203 ld x4,0(x30) + 80000aac: 01b20c63 beq x4,x27,80000ac4 + 80000ab0: 511012ef jal x5,800027c0 + 80000ab4: 80000aa4 .word 0x80000aa4 + 80000ab8: 00000000 .word 0x00000000 + 80000abc: 800094db .word 0x800094db + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x18f7bb6c6a4d044f + 80000ac8: 0001b603 ld x12,0(x3) + 80000acc: 00818193 addi x3,x3,8 + +0000000080000ad0 : +Zknh_sha512sig0_cg_cp_rd_b28: + sha512sig0 x28, x12 # perform operation + 80000ad0: 10661e13 sha512sig0 x28,x12 + # Check if x28 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x28, Zknh_sha512sig0_cg_cp_rd_b28, Zknh_sha512sig0_cg_cp_rd_b28_str) + 80000ad4: 000f3203 ld x4,0(x30) + 80000ad8: 01c20c63 beq x4,x28,80000af0 + 80000adc: 4e5012ef jal x5,800027c0 + 80000ae0: 80000ad0 .word 0x80000ad0 + 80000ae4: 00000000 .word 0x00000000 + 80000ae8: 80009513 .word 0x80009513 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 008f0f13 addi x30,x30,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x21608a593e82e955 + 80000af4: 0001b103 ld x2,0(x3) + 80000af8: 00818193 addi x3,x3,8 + +0000000080000afc : +Zknh_sha512sig0_cg_cp_rd_b29: + sha512sig0 x29, x2 # perform operation + 80000afc: 10611e93 sha512sig0 x29,x2 + # Check if x29 contains the expected result. x30 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x30, x5, x4, x29, Zknh_sha512sig0_cg_cp_rd_b29, Zknh_sha512sig0_cg_cp_rd_b29_str) + 80000b00: 000f3203 ld x4,0(x30) + 80000b04: 01d20c63 beq x4,x29,80000b1c + 80000b08: 4b9012ef jal x5,800027c0 + 80000b0c: 80000afc .word 0x80000afc + 80000b10: 00000000 .word 0x00000000 + 80000b14: 8000954b .word 0x8000954b + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 008f0f13 addi x30,x30,8 + + mv x22, x30 # switch signature pointer register to avoid conflict with test + 80000b20: 000f0b13 addi x22,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x9c5188f966a598d3 + 80000b24: 0001b503 ld x10,0(x3) + 80000b28: 00818193 addi x3,x3,8 + +0000000080000b2c : +Zknh_sha512sig0_cg_cp_rd_b30: + sha512sig0 x30, x10 # perform operation + 80000b2c: 10651f13 sha512sig0 x30,x10 + # Check if x30 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x30, Zknh_sha512sig0_cg_cp_rd_b30, Zknh_sha512sig0_cg_cp_rd_b30_str) + 80000b30: 000b3203 ld x4,0(x22) + 80000b34: 01e20c63 beq x4,x30,80000b4c + 80000b38: 489012ef jal x5,800027c0 + 80000b3c: 80000b2c .word 0x80000b2c + 80000b40: 00000000 .word 0x00000000 + 80000b44: 80009583 .word 0x80009583 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x011ee9a166e16e14 + 80000b50: 0001b503 ld x10,0(x3) + 80000b54: 00818193 addi x3,x3,8 + +0000000080000b58 : +Zknh_sha512sig0_cg_cp_rd_b31: + sha512sig0 x31, x10 # perform operation + 80000b58: 10651f93 sha512sig0 x31,x10 + # Check if x31 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x31, Zknh_sha512sig0_cg_cp_rd_b31, Zknh_sha512sig0_cg_cp_rd_b31_str) + 80000b5c: 000b3203 ld x4,0(x22) + 80000b60: 01f20c63 beq x4,x31,80000b78 + 80000b64: 45d012ef jal x5,800027c0 + 80000b68: 80000b58 .word 0x80000b58 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 800095bb .word 0x800095bb + 80000b74: 00000000 .word 0x00000000 + 80000b78: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs1: x16 = 0x0000000000000000 + 80000b7c: 0001b803 ld x16,0(x3) + 80000b80: 00818193 addi x3,x3,8 + +0000000080000b84 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x0: + sha512sig0 x11, x16 # perform operation + 80000b84: 10681593 sha512sig0 x11,x16 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zknh_sha512sig0_cg_cp_rs1_edges_0x0, Zknh_sha512sig0_cg_cp_rs1_edges_0x0_str) + 80000b88: 000b3203 ld x4,0(x22) + 80000b8c: 00b20c63 beq x4,x11,80000ba4 + 80000b90: 431012ef jal x5,800027c0 + 80000b94: 80000b84 .word 0x80000b84 + 80000b98: 00000000 .word 0x00000000 + 80000b9c: 800095f3 .word 0x800095f3 + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x0000000000000001 + 80000ba8: 0001b603 ld x12,0(x3) + 80000bac: 00818193 addi x3,x3,8 + +0000000080000bb0 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x1: + sha512sig0 x1, x12 # perform operation + 80000bb0: 10661093 sha512sig0 x1,x12 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig0_cg_cp_rs1_edges_0x1, Zknh_sha512sig0_cg_cp_rs1_edges_0x1_str) + 80000bb4: 000b3203 ld x4,0(x22) + 80000bb8: 00120c63 beq x4,x1,80000bd0 + 80000bbc: 405012ef jal x5,800027c0 + 80000bc0: 80000bb0 .word 0x80000bb0 + 80000bc4: 00000000 .word 0x00000000 + 80000bc8: 80009632 .word 0x80009632 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x0000000000000002 + 80000bd4: 0001b383 ld x7,0(x3) + 80000bd8: 00818193 addi x3,x3,8 + +0000000080000bdc : +Zknh_sha512sig0_cg_cp_rs1_edges_0x2: + sha512sig0 x13, x7 # perform operation + 80000bdc: 10639693 sha512sig0 x13,x7 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknh_sha512sig0_cg_cp_rs1_edges_0x2, Zknh_sha512sig0_cg_cp_rs1_edges_0x2_str) + 80000be0: 000b3203 ld x4,0(x22) + 80000be4: 00d20c63 beq x4,x13,80000bfc + 80000be8: 3d9012ef jal x5,800027c0 + 80000bec: 80000bdc .word 0x80000bdc + 80000bf0: 00000000 .word 0x00000000 + 80000bf4: 80009671 .word 0x80009671 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x8000000000000000 + 80000c00: 0001bd03 ld x26,0(x3) + 80000c04: 00818193 addi x3,x3,8 + +0000000080000c08 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000000: + sha512sig0 x7, x26 # perform operation + 80000c08: 106d1393 sha512sig0 x7,x26 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c0c: 000b3203 ld x4,0(x22) + 80000c10: 00720c63 beq x4,x7,80000c28 + 80000c14: 3ad012ef jal x5,800027c0 + 80000c18: 80000c08 .word 0x80000c08 + 80000c1c: 00000000 .word 0x00000000 + 80000c20: 800096b0 .word 0x800096b0 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x8000000000000001 + 80000c2c: 0001b603 ld x12,0(x3) + 80000c30: 00818193 addi x3,x3,8 + +0000000080000c34 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000001: + sha512sig0 x26, x12 # perform operation + 80000c34: 10661d13 sha512sig0 x26,x12 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha512sig0_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c38: 000b3203 ld x4,0(x22) + 80000c3c: 01a20c63 beq x4,x26,80000c54 + 80000c40: 381012ef jal x5,800027c0 + 80000c44: 80000c34 .word 0x80000c34 + 80000c48: 00000000 .word 0x00000000 + 80000c4c: 800096fe .word 0x800096fe + 80000c50: 00000000 .word 0x00000000 + 80000c54: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7fffffffffffffff + 80000c58: 0001bd03 ld x26,0(x3) + 80000c5c: 00818193 addi x3,x3,8 + +0000000080000c60 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x7fffffffffffffff: + sha512sig0 x27, x26 # perform operation + 80000c60: 106d1d93 sha512sig0 x27,x26 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zknh_sha512sig0_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha512sig0_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c64: 000b3203 ld x4,0(x22) + 80000c68: 01b20c63 beq x4,x27,80000c80 + 80000c6c: 355012ef jal x5,800027c0 + 80000c70: 80000c60 .word 0x80000c60 + 80000c74: 00000000 .word 0x00000000 + 80000c78: 8000974c .word 0x8000974c + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80000c84: 0001bd03 ld x26,0(x3) + 80000c88: 00818193 addi x3,x3,8 + +0000000080000c8c : +Zknh_sha512sig0_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha512sig0 x8, x26 # perform operation + 80000c8c: 106d1413 sha512sig0 x8,x26 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zknh_sha512sig0_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha512sig0_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c90: 000b3203 ld x4,0(x22) + 80000c94: 00820c63 beq x4,x8,80000cac + 80000c98: 329012ef jal x5,800027c0 + 80000c9c: 80000c8c .word 0x80000c8c + 80000ca0: 00000000 .word 0x00000000 + 80000ca4: 8000979a .word 0x8000979a + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xffffffffffffffff + 80000cb0: 0001bd03 ld x26,0(x3) + 80000cb4: 00818193 addi x3,x3,8 + +0000000080000cb8 : +Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffffffffffff: + sha512sig0 x2, x26 # perform operation + 80000cb8: 106d1113 sha512sig0 x2,x26 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cbc: 000b3203 ld x4,0(x22) + 80000cc0: 00220c63 beq x4,x2,80000cd8 + 80000cc4: 2fd012ef jal x5,800027c0 + 80000cc8: 80000cb8 .word 0x80000cb8 + 80000ccc: 00000000 .word 0x00000000 + 80000cd0: 800097e8 .word 0x800097e8 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x14) # load rs1: x14 = 0xfffffffffffffffe + 80000cdc: 0001b703 ld x14,0(x3) + 80000ce0: 00818193 addi x3,x3,8 + +0000000080000ce4 : +Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffffffffffe: + sha512sig0 x31, x14 # perform operation + 80000ce4: 10671f93 sha512sig0 x31,x14 + # Check if x31 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x31, Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000ce8: 000b3203 ld x4,0(x22) + 80000cec: 01f20c63 beq x4,x31,80000d04 + 80000cf0: 2d1012ef jal x5,800027c0 + 80000cf4: 80000ce4 .word 0x80000ce4 + 80000cf8: 00000000 .word 0x00000000 + 80000cfc: 80009836 .word 0x80009836 + 80000d00: 00000000 .word 0x00000000 + 80000d04: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 80000d08: 0001b603 ld x12,0(x3) + 80000d0c: 00818193 addi x3,x3,8 + +0000000080000d10 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha512sig0 x23, x12 # perform operation + 80000d10: 10661b93 sha512sig0 x23,x12 + # Check if x23 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x23, Zknh_sha512sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha512sig0_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d14: 000b3203 ld x4,0(x22) + 80000d18: 01720c63 beq x4,x23,80000d30 + 80000d1c: 2a5012ef jal x5,800027c0 + 80000d20: 80000d10 .word 0x80000d10 + 80000d24: 00000000 .word 0x00000000 + 80000d28: 80009884 .word 0x80009884 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaaaaaaaaaaaaaaaa + 80000d34: 0001b103 ld x2,0(x3) + 80000d38: 00818193 addi x3,x3,8 + +0000000080000d3c : +Zknh_sha512sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha512sig0 x26, x2 # perform operation + 80000d3c: 10611d13 sha512sig0 x26,x2 + # Check if x26 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x26, Zknh_sha512sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha512sig0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d40: 000b3203 ld x4,0(x22) + 80000d44: 01a20c63 beq x4,x26,80000d5c + 80000d48: 279012ef jal x5,800027c0 + 80000d4c: 80000d3c .word 0x80000d3c + 80000d50: 00000000 .word 0x00000000 + 80000d54: 800098d2 .word 0x800098d2 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x3, x10) # load rs1: x10 = 0x5555555555555555 + 80000d60: 0001b503 ld x10,0(x3) + 80000d64: 00818193 addi x3,x3,8 + +0000000080000d68 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x5555555555555555: + sha512sig0 x14, x10 # perform operation + 80000d68: 10651713 sha512sig0 x14,x10 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknh_sha512sig0_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha512sig0_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d6c: 000b3203 ld x4,0(x22) + 80000d70: 00e20c63 beq x4,x14,80000d88 + 80000d74: 24d012ef jal x5,800027c0 + 80000d78: 80000d68 .word 0x80000d68 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 80009920 .word 0x80009920 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x3, x7) # load rs1: x7 = 0x00000000ffffffff + 80000d8c: 0001b383 ld x7,0(x3) + 80000d90: 00818193 addi x3,x3,8 + +0000000080000d94 : +Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffff: + sha512sig0 x29, x7 # perform operation + 80000d94: 10639e93 sha512sig0 x29,x7 + # Check if x29 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x29, Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig0_cg_cp_rs1_edges_0xffffffff_str) + 80000d98: 000b3203 ld x4,0(x22) + 80000d9c: 01d20c63 beq x4,x29,80000db4 + 80000da0: 221012ef jal x5,800027c0 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 8000996e .word 0x8000996e + 80000db0: 00000000 .word 0x00000000 + 80000db4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x3, x9) # load rs1: x9 = 0x00000000fffffffe + 80000db8: 0001b483 ld x9,0(x3) + 80000dbc: 00818193 addi x3,x3,8 + +0000000080000dc0 : +Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffe: + sha512sig0 x25, x9 # perform operation + 80000dc0: 10649c93 sha512sig0 x25,x9 + # Check if x25 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x25, Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig0_cg_cp_rs1_edges_0xfffffffe_str) + 80000dc4: 000b3203 ld x4,0(x22) + 80000dc8: 01920c63 beq x4,x25,80000de0 + 80000dcc: 1f5012ef jal x5,800027c0 + 80000dd0: 80000dc0 .word 0x80000dc0 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 800099b4 .word 0x800099b4 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0x0000000100000000 + 80000de4: 0001bc83 ld x25,0(x3) + 80000de8: 00818193 addi x3,x3,8 + +0000000080000dec : +Zknh_sha512sig0_cg_cp_rs1_edges_0x100000000: + sha512sig0 x27, x25 # perform operation + 80000dec: 106c9d93 sha512sig0 x27,x25 + # Check if x27 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x27, Zknh_sha512sig0_cg_cp_rs1_edges_0x100000000, Zknh_sha512sig0_cg_cp_rs1_edges_0x100000000_str) + 80000df0: 000b3203 ld x4,0(x22) + 80000df4: 01b20c63 beq x4,x27,80000e0c + 80000df8: 1c9012ef jal x5,800027c0 + 80000dfc: 80000dec .word 0x80000dec + 80000e00: 00000000 .word 0x00000000 + 80000e04: 800099fa .word 0x800099fa + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0x0000000100000001 + 80000e10: 0001ba03 ld x20,0(x3) + 80000e14: 00818193 addi x3,x3,8 + +0000000080000e18 : +Zknh_sha512sig0_cg_cp_rs1_edges_0x100000001: + sha512sig0 x8, x20 # perform operation + 80000e18: 106a1413 sha512sig0 x8,x20 + # Check if x8 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x8, Zknh_sha512sig0_cg_cp_rs1_edges_0x100000001, Zknh_sha512sig0_cg_cp_rs1_edges_0x100000001_str) + 80000e1c: 000b3203 ld x4,0(x22) + 80000e20: 00820c63 beq x4,x8,80000e38 + 80000e24: 19d012ef jal x5,800027c0 + 80000e28: 80000e18 .word 0x80000e18 + 80000e2c: 00000000 .word 0x00000000 + 80000e30: 80009a41 .word 0x80009a41 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x989d3a54a4e5096c + 80000e3c: 0001b003 ld x0,0(x3) + 80000e40: 00818193 addi x3,x3,8 + +0000000080000e44 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b0: + sha512sig0 x0, x0 # perform operation + 80000e44: 10601013 sha512sig0 x0,x0 + # Check if x0 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x0, Zknh_sha512sig0_cg_cmp_rd_rs1_b0, Zknh_sha512sig0_cg_cmp_rd_rs1_b0_str) + 80000e48: 000b3203 ld x4,0(x22) + 80000e4c: 00020c63 beq x4,x0,80000e64 + 80000e50: 171012ef jal x5,800027c0 + 80000e54: 80000e44 .word 0x80000e44 + 80000e58: 00000000 .word 0x00000000 + 80000e5c: 80009a88 .word 0x80009a88 + 80000e60: 00000000 .word 0x00000000 + 80000e64: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xd5f3fcf18e226e76 + 80000e68: 0001b083 ld x1,0(x3) + 80000e6c: 00818193 addi x3,x3,8 + +0000000080000e70 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b1: + sha512sig0 x1, x1 # perform operation + 80000e70: 10609093 sha512sig0 x1,x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sig0_cg_cmp_rd_rs1_b1, Zknh_sha512sig0_cg_cmp_rd_rs1_b1_str) + 80000e74: 000b3203 ld x4,0(x22) + 80000e78: 00120c63 beq x4,x1,80000e90 + 80000e7c: 145012ef jal x5,800027c0 + 80000e80: 80000e70 .word 0x80000e70 + 80000e84: 00000000 .word 0x00000000 + 80000e88: 80009ac4 .word 0x80009ac4 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xaf43cc63ee2b944c + 80000e94: 0001b103 ld x2,0(x3) + 80000e98: 00818193 addi x3,x3,8 + +0000000080000e9c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b2: + sha512sig0 x2, x2 # perform operation + 80000e9c: 10611113 sha512sig0 x2,x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sig0_cg_cmp_rd_rs1_b2, Zknh_sha512sig0_cg_cmp_rd_rs1_b2_str) + 80000ea0: 000b3203 ld x4,0(x22) + 80000ea4: 00220c63 beq x4,x2,80000ebc + 80000ea8: 119012ef jal x5,800027c0 + 80000eac: 80000e9c .word 0x80000e9c + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 80009b00 .word 0x80009b00 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 008b0b13 addi x22,x22,8 + + mv x31, x3 # switch data pointer register to avoid conflict with test + 80000ec0: 00018f93 addi x31,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x31, x3) # load rs1: x3 = 0x399a1682c924b4ec + 80000ec4: 000fb183 ld x3,0(x31) + 80000ec8: 008f8f93 addi x31,x31,8 + +0000000080000ecc : +Zknh_sha512sig0_cg_cmp_rd_rs1_b3: + sha512sig0 x3, x3 # perform operation + 80000ecc: 10619193 sha512sig0 x3,x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sig0_cg_cmp_rd_rs1_b3, Zknh_sha512sig0_cg_cmp_rd_rs1_b3_str) + 80000ed0: 000b3203 ld x4,0(x22) + 80000ed4: 00320c63 beq x4,x3,80000eec + 80000ed8: 0e9012ef jal x5,800027c0 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 80009b3c .word 0x80009b3c + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 008b0b13 addi x22,x22,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef0: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000ef4: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x31, x4) # load rs1: x4 = 0x6c010042c1d70db0 + 80000ef8: 000fb203 ld x4,0(x31) + 80000efc: 008f8f93 addi x31,x31,8 + +0000000080000f00 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b4: + sha512sig0 x4, x4 # perform operation + 80000f00: 10621213 sha512sig0 x4,x4 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zknh_sha512sig0_cg_cmp_rd_rs1_b4, Zknh_sha512sig0_cg_cmp_rd_rs1_b4_str) + 80000f04: 000b3383 ld x7,0(x22) + 80000f08: 00438c63 beq x7,x4,80000f20 + 80000f0c: 0cd0146f jal x8,800027d8 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 80009b78 .word 0x80009b78 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x31, x5) # load rs1: x5 = 0xf6574653ee44064a + 80000f24: 000fb283 ld x5,0(x31) + 80000f28: 008f8f93 addi x31,x31,8 + +0000000080000f2c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b5: + sha512sig0 x5, x5 # perform operation + 80000f2c: 10629293 sha512sig0 x5,x5 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zknh_sha512sig0_cg_cmp_rd_rs1_b5, Zknh_sha512sig0_cg_cmp_rd_rs1_b5_str) + 80000f30: 000b3383 ld x7,0(x22) + 80000f34: 00538c63 beq x7,x5,80000f4c + 80000f38: 0a10146f jal x8,800027d8 + 80000f3c: 80000f2c .word 0x80000f2c + 80000f40: 00000000 .word 0x00000000 + 80000f44: 80009bb4 .word 0x80009bb4 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x31, x6) # load rs1: x6 = 0x69b75bb0842be56d + 80000f50: 000fb303 ld x6,0(x31) + 80000f54: 008f8f93 addi x31,x31,8 + +0000000080000f58 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b6: + sha512sig0 x6, x6 # perform operation + 80000f58: 10631313 sha512sig0 x6,x6 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zknh_sha512sig0_cg_cmp_rd_rs1_b6, Zknh_sha512sig0_cg_cmp_rd_rs1_b6_str) + 80000f5c: 000b3383 ld x7,0(x22) + 80000f60: 00638c63 beq x7,x6,80000f78 + 80000f64: 0750146f jal x8,800027d8 + 80000f68: 80000f58 .word 0x80000f58 + 80000f6c: 00000000 .word 0x00000000 + 80000f70: 80009bf0 .word 0x80009bf0 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 008b0b13 addi x22,x22,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000f7c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000f80: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x31, x7) # load rs1: x7 = 0xa0bd2a0d3e7412cd + 80000f84: 000fb383 ld x7,0(x31) + 80000f88: 008f8f93 addi x31,x31,8 + +0000000080000f8c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b7: + sha512sig0 x7, x7 # perform operation + 80000f8c: 10639393 sha512sig0 x7,x7 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sig0_cg_cmp_rd_rs1_b7, Zknh_sha512sig0_cg_cmp_rd_rs1_b7_str) + 80000f90: 000b3683 ld x13,0(x22) + 80000f94: 00768c63 beq x13,x7,80000fac + 80000f98: 0690176f jal x14,80002800 + 80000f9c: 80000f8c .word 0x80000f8c + 80000fa0: 00000000 .word 0x00000000 + 80000fa4: 80009c2c .word 0x80009c2c + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x31, x8) # load rs1: x8 = 0x4668efc969227fdc + 80000fb0: 000fb403 ld x8,0(x31) + 80000fb4: 008f8f93 addi x31,x31,8 + +0000000080000fb8 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b8: + sha512sig0 x8, x8 # perform operation + 80000fb8: 10641413 sha512sig0 x8,x8 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig0_cg_cmp_rd_rs1_b8, Zknh_sha512sig0_cg_cmp_rd_rs1_b8_str) + 80000fbc: 000b3683 ld x13,0(x22) + 80000fc0: 00868c63 beq x13,x8,80000fd8 + 80000fc4: 03d0176f jal x14,80002800 + 80000fc8: 80000fb8 .word 0x80000fb8 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 80009c68 .word 0x80009c68 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x31, x9) # load rs1: x9 = 0x68dfa9fc0a238a1c + 80000fdc: 000fb483 ld x9,0(x31) + 80000fe0: 008f8f93 addi x31,x31,8 + +0000000080000fe4 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b9: + sha512sig0 x9, x9 # perform operation + 80000fe4: 10649493 sha512sig0 x9,x9 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sig0_cg_cmp_rd_rs1_b9, Zknh_sha512sig0_cg_cmp_rd_rs1_b9_str) + 80000fe8: 000b3683 ld x13,0(x22) + 80000fec: 00968c63 beq x13,x9,80001004 + 80000ff0: 0110176f jal x14,80002800 + 80000ff4: 80000fe4 .word 0x80000fe4 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 80009ca4 .word 0x80009ca4 + 80001000: 00000000 .word 0x00000000 + 80001004: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x31, x10) # load rs1: x10 = 0xf9664ba1bf3cd3a5 + 80001008: 000fb503 ld x10,0(x31) + 8000100c: 008f8f93 addi x31,x31,8 + +0000000080001010 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b10: + sha512sig0 x10, x10 # perform operation + 80001010: 10651513 sha512sig0 x10,x10 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sig0_cg_cmp_rd_rs1_b10, Zknh_sha512sig0_cg_cmp_rd_rs1_b10_str) + 80001014: 000b3683 ld x13,0(x22) + 80001018: 00a68c63 beq x13,x10,80001030 + 8000101c: 7e40176f jal x14,80002800 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80009ce0 .word 0x80009ce0 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x31, x11) # load rs1: x11 = 0x4c0f9b517850ac01 + 80001034: 000fb583 ld x11,0(x31) + 80001038: 008f8f93 addi x31,x31,8 + +000000008000103c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b11: + sha512sig0 x11, x11 # perform operation + 8000103c: 10659593 sha512sig0 x11,x11 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sig0_cg_cmp_rd_rs1_b11, Zknh_sha512sig0_cg_cmp_rd_rs1_b11_str) + 80001040: 000b3683 ld x13,0(x22) + 80001044: 00b68c63 beq x13,x11,8000105c + 80001048: 7b80176f jal x14,80002800 + 8000104c: 8000103c .word 0x8000103c + 80001050: 00000000 .word 0x00000000 + 80001054: 80009d1d .word 0x80009d1d + 80001058: 00000000 .word 0x00000000 + 8000105c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x31, x12) # load rs1: x12 = 0x58b66ae8e15d35dc + 80001060: 000fb603 ld x12,0(x31) + 80001064: 008f8f93 addi x31,x31,8 + +0000000080001068 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b12: + sha512sig0 x12, x12 # perform operation + 80001068: 10661613 sha512sig0 x12,x12 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sig0_cg_cmp_rd_rs1_b12, Zknh_sha512sig0_cg_cmp_rd_rs1_b12_str) + 8000106c: 000b3683 ld x13,0(x22) + 80001070: 00c68c63 beq x13,x12,80001088 + 80001074: 78c0176f jal x14,80002800 + 80001078: 80001068 .word 0x80001068 + 8000107c: 00000000 .word 0x00000000 + 80001080: 80009d5a .word 0x80009d5a + 80001084: 00000000 .word 0x00000000 + 80001088: 008b0b13 addi x22,x22,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000108c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001090: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x31, x13) # load rs1: x13 = 0x88d3632a192e2e8f + 80001094: 000fb683 ld x13,0(x31) + 80001098: 008f8f93 addi x31,x31,8 + +000000008000109c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b13: + sha512sig0 x13, x13 # perform operation + 8000109c: 10669693 sha512sig0 x13,x13 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zknh_sha512sig0_cg_cmp_rd_rs1_b13, Zknh_sha512sig0_cg_cmp_rd_rs1_b13_str) + 800010a0: 000b3383 ld x7,0(x22) + 800010a4: 00d38c63 beq x7,x13,800010bc + 800010a8: 7300146f jal x8,800027d8 + 800010ac: 8000109c .word 0x8000109c + 800010b0: 00000000 .word 0x00000000 + 800010b4: 80009d97 .word 0x80009d97 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x31, x14) # load rs1: x14 = 0xc45ec13cb6cfd289 + 800010c0: 000fb703 ld x14,0(x31) + 800010c4: 008f8f93 addi x31,x31,8 + +00000000800010c8 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b14: + sha512sig0 x14, x14 # perform operation + 800010c8: 10671713 sha512sig0 x14,x14 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zknh_sha512sig0_cg_cmp_rd_rs1_b14, Zknh_sha512sig0_cg_cmp_rd_rs1_b14_str) + 800010cc: 000b3383 ld x7,0(x22) + 800010d0: 00e38c63 beq x7,x14,800010e8 + 800010d4: 7040146f jal x8,800027d8 + 800010d8: 800010c8 .word 0x800010c8 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 80009dd4 .word 0x80009dd4 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x31, x15) # load rs1: x15 = 0xa926ba145362c883 + 800010ec: 000fb783 ld x15,0(x31) + 800010f0: 008f8f93 addi x31,x31,8 + +00000000800010f4 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b15: + sha512sig0 x15, x15 # perform operation + 800010f4: 10679793 sha512sig0 x15,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x15, Zknh_sha512sig0_cg_cmp_rd_rs1_b15, Zknh_sha512sig0_cg_cmp_rd_rs1_b15_str) + 800010f8: 000b3383 ld x7,0(x22) + 800010fc: 00f38c63 beq x7,x15,80001114 + 80001100: 6d80146f jal x8,800027d8 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e11 .word 0x80009e11 + 80001110: 00000000 .word 0x00000000 + 80001114: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x31, x16) # load rs1: x16 = 0x21be57b0e7063e06 + 80001118: 000fb803 ld x16,0(x31) + 8000111c: 008f8f93 addi x31,x31,8 + +0000000080001120 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b16: + sha512sig0 x16, x16 # perform operation + 80001120: 10681813 sha512sig0 x16,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zknh_sha512sig0_cg_cmp_rd_rs1_b16, Zknh_sha512sig0_cg_cmp_rd_rs1_b16_str) + 80001124: 000b3383 ld x7,0(x22) + 80001128: 01038c63 beq x7,x16,80001140 + 8000112c: 6ac0146f jal x8,800027d8 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 80009e4e .word 0x80009e4e + 8000113c: 00000000 .word 0x00000000 + 80001140: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x31, x17) # load rs1: x17 = 0xa8af6d4a4abb5197 + 80001144: 000fb883 ld x17,0(x31) + 80001148: 008f8f93 addi x31,x31,8 + +000000008000114c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b17: + sha512sig0 x17, x17 # perform operation + 8000114c: 10689893 sha512sig0 x17,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknh_sha512sig0_cg_cmp_rd_rs1_b17, Zknh_sha512sig0_cg_cmp_rd_rs1_b17_str) + 80001150: 000b3383 ld x7,0(x22) + 80001154: 01138c63 beq x7,x17,8000116c + 80001158: 6800146f jal x8,800027d8 + 8000115c: 8000114c .word 0x8000114c + 80001160: 00000000 .word 0x00000000 + 80001164: 80009e8b .word 0x80009e8b + 80001168: 00000000 .word 0x00000000 + 8000116c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x31, x18) # load rs1: x18 = 0xbbbd82fe0cdd2fdc + 80001170: 000fb903 ld x18,0(x31) + 80001174: 008f8f93 addi x31,x31,8 + +0000000080001178 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b18: + sha512sig0 x18, x18 # perform operation + 80001178: 10691913 sha512sig0 x18,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig0_cg_cmp_rd_rs1_b18, Zknh_sha512sig0_cg_cmp_rd_rs1_b18_str) + 8000117c: 000b3383 ld x7,0(x22) + 80001180: 01238c63 beq x7,x18,80001198 + 80001184: 6540146f jal x8,800027d8 + 80001188: 80001178 .word 0x80001178 + 8000118c: 00000000 .word 0x00000000 + 80001190: 80009ec8 .word 0x80009ec8 + 80001194: 00000000 .word 0x00000000 + 80001198: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x31, x19) # load rs1: x19 = 0x71bc960e3f844818 + 8000119c: 000fb983 ld x19,0(x31) + 800011a0: 008f8f93 addi x31,x31,8 + +00000000800011a4 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b19: + sha512sig0 x19, x19 # perform operation + 800011a4: 10699993 sha512sig0 x19,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zknh_sha512sig0_cg_cmp_rd_rs1_b19, Zknh_sha512sig0_cg_cmp_rd_rs1_b19_str) + 800011a8: 000b3383 ld x7,0(x22) + 800011ac: 01338c63 beq x7,x19,800011c4 + 800011b0: 6280146f jal x8,800027d8 + 800011b4: 800011a4 .word 0x800011a4 + 800011b8: 00000000 .word 0x00000000 + 800011bc: 80009f05 .word 0x80009f05 + 800011c0: 00000000 .word 0x00000000 + 800011c4: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x31, x20) # load rs1: x20 = 0x46589dc057be82d7 + 800011c8: 000fba03 ld x20,0(x31) + 800011cc: 008f8f93 addi x31,x31,8 + +00000000800011d0 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b20: + sha512sig0 x20, x20 # perform operation + 800011d0: 106a1a13 sha512sig0 x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zknh_sha512sig0_cg_cmp_rd_rs1_b20, Zknh_sha512sig0_cg_cmp_rd_rs1_b20_str) + 800011d4: 000b3383 ld x7,0(x22) + 800011d8: 01438c63 beq x7,x20,800011f0 + 800011dc: 5fc0146f jal x8,800027d8 + 800011e0: 800011d0 .word 0x800011d0 + 800011e4: 00000000 .word 0x00000000 + 800011e8: 80009f43 .word 0x80009f43 + 800011ec: 00000000 .word 0x00000000 + 800011f0: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x31, x21) # load rs1: x21 = 0x920816949fb35b0e + 800011f4: 000fba83 ld x21,0(x31) + 800011f8: 008f8f93 addi x31,x31,8 + +00000000800011fc : +Zknh_sha512sig0_cg_cmp_rd_rs1_b21: + sha512sig0 x21, x21 # perform operation + 800011fc: 106a9a93 sha512sig0 x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zknh_sha512sig0_cg_cmp_rd_rs1_b21, Zknh_sha512sig0_cg_cmp_rd_rs1_b21_str) + 80001200: 000b3383 ld x7,0(x22) + 80001204: 01538c63 beq x7,x21,8000121c + 80001208: 5d00146f jal x8,800027d8 + 8000120c: 800011fc .word 0x800011fc + 80001210: 00000000 .word 0x00000000 + 80001214: 80009f81 .word 0x80009f81 + 80001218: 00000000 .word 0x00000000 + 8000121c: 008b0b13 addi x22,x22,8 + + mv x24, x22 # switch signature pointer register to avoid conflict with test + 80001220: 000b0c13 addi x24,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x31, x22) # load rs1: x22 = 0xb362d9fac2559ee6 + 80001224: 000fbb03 ld x22,0(x31) + 80001228: 008f8f93 addi x31,x31,8 + +000000008000122c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b22: + sha512sig0 x22, x22 # perform operation + 8000122c: 106b1b13 sha512sig0 x22,x22 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zknh_sha512sig0_cg_cmp_rd_rs1_b22, Zknh_sha512sig0_cg_cmp_rd_rs1_b22_str) + 80001230: 000c3383 ld x7,0(x24) + 80001234: 01638c63 beq x7,x22,8000124c + 80001238: 5a00146f jal x8,800027d8 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fbf .word 0x80009fbf + 80001248: 00000000 .word 0x00000000 + 8000124c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x31, x23) # load rs1: x23 = 0xaf2b3e48ebdb8bab + 80001250: 000fbb83 ld x23,0(x31) + 80001254: 008f8f93 addi x31,x31,8 + +0000000080001258 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b23: + sha512sig0 x23, x23 # perform operation + 80001258: 106b9b93 sha512sig0 x23,x23 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zknh_sha512sig0_cg_cmp_rd_rs1_b23, Zknh_sha512sig0_cg_cmp_rd_rs1_b23_str) + 8000125c: 000c3383 ld x7,0(x24) + 80001260: 01738c63 beq x7,x23,80001278 + 80001264: 5740146f jal x8,800027d8 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009ffd .word 0x80009ffd + 80001274: 00000000 .word 0x00000000 + 80001278: 008c0c13 addi x24,x24,8 + + mv x6, x24 # switch signature pointer register to avoid conflict with test + 8000127c: 000c0313 addi x6,x24,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x31, x24) # load rs1: x24 = 0x0048153e7582c90e + 80001280: 000fbc03 ld x24,0(x31) + 80001284: 008f8f93 addi x31,x31,8 + +0000000080001288 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b24: + sha512sig0 x24, x24 # perform operation + 80001288: 106c1c13 sha512sig0 x24,x24 + # Check if x24 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x24, Zknh_sha512sig0_cg_cmp_rd_rs1_b24, Zknh_sha512sig0_cg_cmp_rd_rs1_b24_str) + 8000128c: 00033383 ld x7,0(x6) + 80001290: 01838c63 beq x7,x24,800012a8 + 80001294: 5440146f jal x8,800027d8 + 80001298: 80001288 .word 0x80001288 + 8000129c: 00000000 .word 0x00000000 + 800012a0: 8000a03b .word 0x8000a03b + 800012a4: 00000000 .word 0x00000000 + 800012a8: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x31, x25) # load rs1: x25 = 0x8b24c6e295e0882a + 800012ac: 000fbc83 ld x25,0(x31) + 800012b0: 008f8f93 addi x31,x31,8 + +00000000800012b4 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b25: + sha512sig0 x25, x25 # perform operation + 800012b4: 106c9c93 sha512sig0 x25,x25 + # Check if x25 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x25, Zknh_sha512sig0_cg_cmp_rd_rs1_b25, Zknh_sha512sig0_cg_cmp_rd_rs1_b25_str) + 800012b8: 00033383 ld x7,0(x6) + 800012bc: 01938c63 beq x7,x25,800012d4 + 800012c0: 5180146f jal x8,800027d8 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 8000a079 .word 0x8000a079 + 800012d0: 00000000 .word 0x00000000 + 800012d4: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x31, x26) # load rs1: x26 = 0x096787de974319fe + 800012d8: 000fbd03 ld x26,0(x31) + 800012dc: 008f8f93 addi x31,x31,8 + +00000000800012e0 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b26: + sha512sig0 x26, x26 # perform operation + 800012e0: 106d1d13 sha512sig0 x26,x26 + # Check if x26 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x26, Zknh_sha512sig0_cg_cmp_rd_rs1_b26, Zknh_sha512sig0_cg_cmp_rd_rs1_b26_str) + 800012e4: 00033383 ld x7,0(x6) + 800012e8: 01a38c63 beq x7,x26,80001300 + 800012ec: 4ec0146f jal x8,800027d8 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0b7 .word 0x8000a0b7 + 800012fc: 00000000 .word 0x00000000 + 80001300: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x31, x27) # load rs1: x27 = 0xb521e1c3366b50fc + 80001304: 000fbd83 ld x27,0(x31) + 80001308: 008f8f93 addi x31,x31,8 + +000000008000130c : +Zknh_sha512sig0_cg_cmp_rd_rs1_b27: + sha512sig0 x27, x27 # perform operation + 8000130c: 106d9d93 sha512sig0 x27,x27 + # Check if x27 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x27, Zknh_sha512sig0_cg_cmp_rd_rs1_b27, Zknh_sha512sig0_cg_cmp_rd_rs1_b27_str) + 80001310: 00033383 ld x7,0(x6) + 80001314: 01b38c63 beq x7,x27,8000132c + 80001318: 4c00146f jal x8,800027d8 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0f5 .word 0x8000a0f5 + 80001328: 00000000 .word 0x00000000 + 8000132c: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x31, x28) # load rs1: x28 = 0x5360ac534f77f822 + 80001330: 000fbe03 ld x28,0(x31) + 80001334: 008f8f93 addi x31,x31,8 + +0000000080001338 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b28: + sha512sig0 x28, x28 # perform operation + 80001338: 106e1e13 sha512sig0 x28,x28 + # Check if x28 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x28, Zknh_sha512sig0_cg_cmp_rd_rs1_b28, Zknh_sha512sig0_cg_cmp_rd_rs1_b28_str) + 8000133c: 00033383 ld x7,0(x6) + 80001340: 01c38c63 beq x7,x28,80001358 + 80001344: 4940146f jal x8,800027d8 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a133 .word 0x8000a133 + 80001354: 00000000 .word 0x00000000 + 80001358: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x31, x29) # load rs1: x29 = 0xd3f432ae7b8bdcf4 + 8000135c: 000fbe83 ld x29,0(x31) + 80001360: 008f8f93 addi x31,x31,8 + +0000000080001364 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b29: + sha512sig0 x29, x29 # perform operation + 80001364: 106e9e93 sha512sig0 x29,x29 + # Check if x29 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x29, Zknh_sha512sig0_cg_cmp_rd_rs1_b29, Zknh_sha512sig0_cg_cmp_rd_rs1_b29_str) + 80001368: 00033383 ld x7,0(x6) + 8000136c: 01d38c63 beq x7,x29,80001384 + 80001370: 4680146f jal x8,800027d8 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000a171 .word 0x8000a171 + 80001380: 00000000 .word 0x00000000 + 80001384: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x31, x30) # load rs1: x30 = 0xa14199c2521a6cc0 + 80001388: 000fbf03 ld x30,0(x31) + 8000138c: 008f8f93 addi x31,x31,8 + +0000000080001390 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b30: + sha512sig0 x30, x30 # perform operation + 80001390: 106f1f13 sha512sig0 x30,x30 + # Check if x30 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x30, Zknh_sha512sig0_cg_cmp_rd_rs1_b30, Zknh_sha512sig0_cg_cmp_rd_rs1_b30_str) + 80001394: 00033383 ld x7,0(x6) + 80001398: 01e38c63 beq x7,x30,800013b0 + 8000139c: 43c0146f jal x8,800027d8 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000a1af .word 0x8000a1af + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00830313 addi x6,x6,8 + + mv x26, x31 # switch data pointer register to avoid conflict with test + 800013b4: 000f8d13 addi x26,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x26, x31) # load rs1: x31 = 0x41e6f1b583a2f338 + 800013b8: 000d3f83 ld x31,0(x26) + 800013bc: 008d0d13 addi x26,x26,8 + +00000000800013c0 : +Zknh_sha512sig0_cg_cmp_rd_rs1_b31: + sha512sig0 x31, x31 # perform operation + 800013c0: 106f9f93 sha512sig0 x31,x31 + # Check if x31 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x31, Zknh_sha512sig0_cg_cmp_rd_rs1_b31, Zknh_sha512sig0_cg_cmp_rd_rs1_b31_str) + 800013c4: 00033383 ld x7,0(x6) + 800013c8: 01f38c63 beq x7,x31,800013e0 + 800013cc: 40c0146f jal x8,800027d8 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000a1ed .word 0x8000a1ed + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00830313 addi x6,x6,8 + + mv x2, x6 # restore signature pointer to default register for teardown + 800013e4: 00030113 addi x2,x6,0 + +00000000800013e8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e8: 00000513 addi x10,x0,0 + 800013ec: 00000073 ecall + 800013f0: fff00513 addi x10,x0,-1 + 800013f4: 25800413 addi x8,x0,600 + +00000000800013f8 : + 800013f8: 34002373 csrrs x6,mscratch,x0 + +00000000800013fc : + 800013fc: 2b833383 ld x7,696(x6) + +0000000080001400 : + 80001400: 2a033383 ld x7,672(x6) + +0000000080001404 : + 80001404: 2d033483 ld x9,720(x6) + 80001408: 34049073 csrrw x0,mscratch,x9 + +000000008000140c : + 8000140c: 2c833483 ld x9,712(x6) + 80001410: 305493f3 csrrw x7,mtvec,x9 + 80001414: ffc4f493 andi x9,x9,-4 + 80001418: ffc3f393 andi x7,x7,-4 + 8000141c: 00749e63 bne x9,x7,80001438 + +0000000080001420 : + 80001420: 00030493 addi x9,x6,0 + +0000000080001424 : + 80001424: 0004a783 lw x15,0(x9) + 80001428: 00f3a023 sw x15,0(x7) + 8000142c: 00438393 addi x7,x7,4 + 80001430: 00448493 addi x9,x9,4 + 80001434: fe83c8e3 blt x7,x8,80001424 + 80001438: 0000100f fence.i + +000000008000143c : + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc9ff06f jal x0,800013e8 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca5ff06f jal x0,800013e8 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9c30313 addi x6,x6,-1380 # 8000143c + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35030313 addi x6,x6,848 # 800013e8 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33830313 addi x6,x6,824 # 800013e8 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32030313 addi x6,x6,800 # 800013e8 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b878793 addi x15,x15,440 # 800013f8 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha512sig1-00.elf.objdump b/riscv-tests/rv64-Zknh-sha512sig1-00.elf.objdump new file mode 100644 index 0000000..ef7fdcb --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha512sig1-00.elf.objdump @@ -0,0 +1,6677 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sig1-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sig1-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008d8 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f93 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029013 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029036 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002911e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccsgqVxi.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b1 +0000000080008827 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b2 +000000008000885e l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b3 +0000000080008895 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088cc l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b5 +0000000080008903 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b6 +000000008000893a l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b7 +0000000080008971 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b8 +00000000800089a8 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b8_str +00000000800001e4 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b9 +00000000800089df l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b9_str +0000000080000210 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b10 +0000000080008a17 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b10_str +000000008000023c l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b11 +0000000080008a50 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b11_str +000000008000026c l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b12 +0000000080008a89 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b12_str +00000000800002a0 l .text.rvtest 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b13 +0000000080008ac2 l .data 0000000000000000 Zknh_sha512sig1_cg_cp_rs1_b13_str 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00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x84c0de1e06cadf63 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha512sig1_cg_cp_rs1_b0: + sha512sig1 x24, x0 # perform operation + 80000048: 10701c13 sha512sig1 x24,x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zknh_sha512sig1_cg_cp_rs1_b0, Zknh_sha512sig1_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01820c63 beq x4,x24,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x2861957ba0cd6b70 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha512sig1_cg_cp_rs1_b1: + sha512sig1 x10, x1 # perform operation + 80000074: 10709513 sha512sig1 x10,x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zknh_sha512sig1_cg_cp_rs1_b1, Zknh_sha512sig1_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00a20c63 beq x4,x10,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x31, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010f93 addi x31,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x36b7edd9d2090df7 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha512sig1_cg_cp_rs1_b2: + sha512sig1 x18, x2 # perform operation + 800000a4: 10711913 sha512sig1 x18,x2 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zknh_sha512sig1_cg_cp_rs1_b2, Zknh_sha512sig1_cg_cp_rs1_b2_str) + 800000a8: 000fb203 ld x4,0(x31) + 800000ac: 01220c63 beq x4,x18,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008f8f93 addi x31,x31,8 + + mv x12, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018613 addi x12,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x9f8b5072ab3f3342 + 800000cc: 00063183 ld x3,0(x12) + 800000d0: 00860613 addi x12,x12,8 + +00000000800000d4 : +Zknh_sha512sig1_cg_cp_rs1_b3: + sha512sig1 x2, x3 # perform operation + 800000d4: 10719113 sha512sig1 x2,x3 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zknh_sha512sig1_cg_cp_rs1_b3, Zknh_sha512sig1_cg_cp_rs1_b3_str) + 800000d8: 000fb203 ld x4,0(x31) + 800000dc: 00220c63 beq x4,x2,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008f8f93 addi x31,x31,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xd3a23135493af19d + 80000100: 00063203 ld x4,0(x12) + 80000104: 00860613 addi x12,x12,8 + +0000000080000108 : +Zknh_sha512sig1_cg_cp_rs1_b4: + sha512sig1 x29, x4 # perform operation + 80000108: 10721e93 sha512sig1 x29,x4 + # Check if x29 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x29, Zknh_sha512sig1_cg_cp_rs1_b4, Zknh_sha512sig1_cg_cp_rs1_b4_str) + 8000010c: 000fb683 ld x13,0(x31) + 80000110: 01d68c63 beq x13,x29,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xcfba734499d200a5 + 8000012c: 00063283 ld x5,0(x12) + 80000130: 00860613 addi x12,x12,8 + +0000000080000134 : +Zknh_sha512sig1_cg_cp_rs1_b5: + sha512sig1 x18, x5 # perform operation + 80000134: 10729913 sha512sig1 x18,x5 + # Check if x18 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x18, Zknh_sha512sig1_cg_cp_rs1_b5, Zknh_sha512sig1_cg_cp_rs1_b5_str) + 80000138: 000fb683 ld x13,0(x31) + 8000013c: 01268c63 beq x13,x18,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xd4305dfe0cb1b404 + 80000158: 00063303 ld x6,0(x12) + 8000015c: 00860613 addi x12,x12,8 + +0000000080000160 : +Zknh_sha512sig1_cg_cp_rs1_b6: + sha512sig1 x0, x6 # perform operation + 80000160: 10731013 sha512sig1 x0,x6 + # Check if x0 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x0, Zknh_sha512sig1_cg_cp_rs1_b6, Zknh_sha512sig1_cg_cp_rs1_b6_str) + 80000164: 000fb683 ld x13,0(x31) + 80000168: 00068c63 beq x13,x0,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x6d03060382355a27 + 80000184: 00063383 ld x7,0(x12) + 80000188: 00860613 addi x12,x12,8 + +000000008000018c : +Zknh_sha512sig1_cg_cp_rs1_b7: + sha512sig1 x22, x7 # perform operation + 8000018c: 10739b13 sha512sig1 x22,x7 + # Check if x22 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x22, Zknh_sha512sig1_cg_cp_rs1_b7, Zknh_sha512sig1_cg_cp_rs1_b7_str) + 80000190: 000fb683 ld x13,0(x31) + 80000194: 01668c63 beq x13,x22,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xdaa01f3d53321b9b + 800001b0: 00063403 ld x8,0(x12) + 800001b4: 00860613 addi x12,x12,8 + +00000000800001b8 : +Zknh_sha512sig1_cg_cp_rs1_b8: + sha512sig1 x6, x8 # perform operation + 800001b8: 10741313 sha512sig1 x6,x8 + # Check if x6 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x6, Zknh_sha512sig1_cg_cp_rs1_b8, Zknh_sha512sig1_cg_cp_rs1_b8_str) + 800001bc: 000fb683 ld x13,0(x31) + 800001c0: 00668c63 beq x13,x6,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x92b27b7132038dd5 + 800001dc: 00063483 ld x9,0(x12) + 800001e0: 00860613 addi x12,x12,8 + +00000000800001e4 : +Zknh_sha512sig1_cg_cp_rs1_b9: + sha512sig1 x15, x9 # perform operation + 800001e4: 10749793 sha512sig1 x15,x9 + # Check if x15 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x15, Zknh_sha512sig1_cg_cp_rs1_b9, Zknh_sha512sig1_cg_cp_rs1_b9_str) + 800001e8: 000fb683 ld x13,0(x31) + 800001ec: 00f68c63 beq x13,x15,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089df .word 0x800089df + 80000200: 00000000 .word 0x00000000 + 80000204: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x74849dfff1e13d77 + 80000208: 00063503 ld x10,0(x12) + 8000020c: 00860613 addi x12,x12,8 + +0000000080000210 : +Zknh_sha512sig1_cg_cp_rs1_b10: + sha512sig1 x26, x10 # perform operation + 80000210: 10751d13 sha512sig1 x26,x10 + # Check if x26 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x26, Zknh_sha512sig1_cg_cp_rs1_b10, Zknh_sha512sig1_cg_cp_rs1_b10_str) + 80000214: 000fb683 ld x13,0(x31) + 80000218: 01a68c63 beq x13,x26,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 80008a17 .word 0x80008a17 + 8000022c: 00000000 .word 0x00000000 + 80000230: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x4e06581df702cbe2 + 80000234: 00063583 ld x11,0(x12) + 80000238: 00860613 addi x12,x12,8 + +000000008000023c : +Zknh_sha512sig1_cg_cp_rs1_b11: + sha512sig1 x10, x11 # perform operation + 8000023c: 10759513 sha512sig1 x10,x11 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zknh_sha512sig1_cg_cp_rs1_b11, Zknh_sha512sig1_cg_cp_rs1_b11_str) + 80000240: 000fb683 ld x13,0(x31) + 80000244: 00a68c63 beq x13,x10,8000025c + 80000248: 5b80276f jal x14,80002800 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80008a50 .word 0x80008a50 + 80000258: 00000000 .word 0x00000000 + 8000025c: 008f8f93 addi x31,x31,8 + + mv x21, x12 # switch data pointer register to avoid conflict with test + 80000260: 00060a93 addi x21,x12,0 +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0xe4455529fb554b87 + 80000264: 000ab603 ld x12,0(x21) + 80000268: 008a8a93 addi x21,x21,8 + +000000008000026c : +Zknh_sha512sig1_cg_cp_rs1_b12: + sha512sig1 x22, x12 # perform operation + 8000026c: 10761b13 sha512sig1 x22,x12 + # Check if x22 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x22, Zknh_sha512sig1_cg_cp_rs1_b12, Zknh_sha512sig1_cg_cp_rs1_b12_str) + 80000270: 000fb683 ld x13,0(x31) + 80000274: 01668c63 beq x13,x22,8000028c + 80000278: 5880276f jal x14,80002800 + 8000027c: 8000026c .word 0x8000026c + 80000280: 00000000 .word 0x00000000 + 80000284: 80008a89 .word 0x80008a89 + 80000288: 00000000 .word 0x00000000 + 8000028c: 008f8f93 addi x31,x31,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000290: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000294: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x73fcefc194347a59 + 80000298: 000ab683 ld x13,0(x21) + 8000029c: 008a8a93 addi x21,x21,8 + +00000000800002a0 : +Zknh_sha512sig1_cg_cp_rs1_b13: + sha512sig1 x7, x13 # perform operation + 800002a0: 10769393 sha512sig1 x7,x13 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zknh_sha512sig1_cg_cp_rs1_b13, Zknh_sha512sig1_cg_cp_rs1_b13_str) + 800002a4: 000fb203 ld x4,0(x31) + 800002a8: 00720c63 beq x4,x7,800002c0 + 800002ac: 514022ef jal x5,800027c0 + 800002b0: 800002a0 .word 0x800002a0 + 800002b4: 00000000 .word 0x00000000 + 800002b8: 80008ac2 .word 0x80008ac2 + 800002bc: 00000000 .word 0x00000000 + 800002c0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x04d703714a0bfc4e + 800002c4: 000ab703 ld x14,0(x21) + 800002c8: 008a8a93 addi x21,x21,8 + +00000000800002cc : +Zknh_sha512sig1_cg_cp_rs1_b14: + sha512sig1 x11, x14 # perform operation + 800002cc: 10771593 sha512sig1 x11,x14 + # Check if x11 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x11, Zknh_sha512sig1_cg_cp_rs1_b14, Zknh_sha512sig1_cg_cp_rs1_b14_str) + 800002d0: 000fb203 ld x4,0(x31) + 800002d4: 00b20c63 beq x4,x11,800002ec + 800002d8: 4e8022ef jal x5,800027c0 + 800002dc: 800002cc .word 0x800002cc + 800002e0: 00000000 .word 0x00000000 + 800002e4: 80008afb .word 0x80008afb + 800002e8: 00000000 .word 0x00000000 + 800002ec: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x56945fcef4b8bac4 + 800002f0: 000ab783 ld x15,0(x21) + 800002f4: 008a8a93 addi x21,x21,8 + +00000000800002f8 : +Zknh_sha512sig1_cg_cp_rs1_b15: + sha512sig1 x14, x15 # perform operation + 800002f8: 10779713 sha512sig1 x14,x15 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknh_sha512sig1_cg_cp_rs1_b15, Zknh_sha512sig1_cg_cp_rs1_b15_str) + 800002fc: 000fb203 ld x4,0(x31) + 80000300: 00e20c63 beq x4,x14,80000318 + 80000304: 4bc022ef jal x5,800027c0 + 80000308: 800002f8 .word 0x800002f8 + 8000030c: 00000000 .word 0x00000000 + 80000310: 80008b34 .word 0x80008b34 + 80000314: 00000000 .word 0x00000000 + 80000318: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x17fe0c1e8a0b4ae2 + 8000031c: 000ab803 ld x16,0(x21) + 80000320: 008a8a93 addi x21,x21,8 + +0000000080000324 : +Zknh_sha512sig1_cg_cp_rs1_b16: + sha512sig1 x19, x16 # perform operation + 80000324: 10781993 sha512sig1 x19,x16 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zknh_sha512sig1_cg_cp_rs1_b16, Zknh_sha512sig1_cg_cp_rs1_b16_str) + 80000328: 000fb203 ld x4,0(x31) + 8000032c: 01320c63 beq x4,x19,80000344 + 80000330: 490022ef jal x5,800027c0 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b6d .word 0x80008b6d + 80000340: 00000000 .word 0x00000000 + 80000344: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x955e918ae95578ec + 80000348: 000ab883 ld x17,0(x21) + 8000034c: 008a8a93 addi x21,x21,8 + +0000000080000350 : +Zknh_sha512sig1_cg_cp_rs1_b17: + sha512sig1 x9, x17 # perform operation + 80000350: 10789493 sha512sig1 x9,x17 + # Check if x9 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x9, Zknh_sha512sig1_cg_cp_rs1_b17, Zknh_sha512sig1_cg_cp_rs1_b17_str) + 80000354: 000fb203 ld x4,0(x31) + 80000358: 00920c63 beq x4,x9,80000370 + 8000035c: 464022ef jal x5,800027c0 + 80000360: 80000350 .word 0x80000350 + 80000364: 00000000 .word 0x00000000 + 80000368: 80008ba6 .word 0x80008ba6 + 8000036c: 00000000 .word 0x00000000 + 80000370: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xc6f9547485cd33d7 + 80000374: 000ab903 ld x18,0(x21) + 80000378: 008a8a93 addi x21,x21,8 + +000000008000037c : +Zknh_sha512sig1_cg_cp_rs1_b18: + sha512sig1 x29, x18 # perform operation + 8000037c: 10791e93 sha512sig1 x29,x18 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha512sig1_cg_cp_rs1_b18, Zknh_sha512sig1_cg_cp_rs1_b18_str) + 80000380: 000fb203 ld x4,0(x31) + 80000384: 01d20c63 beq x4,x29,8000039c + 80000388: 438022ef jal x5,800027c0 + 8000038c: 8000037c .word 0x8000037c + 80000390: 00000000 .word 0x00000000 + 80000394: 80008bdf .word 0x80008bdf + 80000398: 00000000 .word 0x00000000 + 8000039c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0xe6a7e3a2b5511c8c + 800003a0: 000ab983 ld x19,0(x21) + 800003a4: 008a8a93 addi x21,x21,8 + +00000000800003a8 : +Zknh_sha512sig1_cg_cp_rs1_b19: + sha512sig1 x6, x19 # perform operation + 800003a8: 10799313 sha512sig1 x6,x19 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zknh_sha512sig1_cg_cp_rs1_b19, Zknh_sha512sig1_cg_cp_rs1_b19_str) + 800003ac: 000fb203 ld x4,0(x31) + 800003b0: 00620c63 beq x4,x6,800003c8 + 800003b4: 40c022ef jal x5,800027c0 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 80008c18 .word 0x80008c18 + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x05eaac977456d978 + 800003cc: 000aba03 ld x20,0(x21) + 800003d0: 008a8a93 addi x21,x21,8 + +00000000800003d4 : +Zknh_sha512sig1_cg_cp_rs1_b20: + sha512sig1 x18, x20 # perform operation + 800003d4: 107a1913 sha512sig1 x18,x20 + # Check if x18 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x18, Zknh_sha512sig1_cg_cp_rs1_b20, Zknh_sha512sig1_cg_cp_rs1_b20_str) + 800003d8: 000fb203 ld x4,0(x31) + 800003dc: 01220c63 beq x4,x18,800003f4 + 800003e0: 3e0022ef jal x5,800027c0 + 800003e4: 800003d4 .word 0x800003d4 + 800003e8: 00000000 .word 0x00000000 + 800003ec: 80008c51 .word 0x80008c51 + 800003f0: 00000000 .word 0x00000000 + 800003f4: 008f8f93 addi x31,x31,8 + + mv x2, x21 # switch data pointer register to avoid conflict with test + 800003f8: 000a8113 addi x2,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x2, x21) # load rs1: x21 = 0x01846830cb5310dc + 800003fc: 00013a83 ld x21,0(x2) + 80000400: 00810113 addi x2,x2,8 + +0000000080000404 : +Zknh_sha512sig1_cg_cp_rs1_b21: + sha512sig1 x14, x21 # perform operation + 80000404: 107a9713 sha512sig1 x14,x21 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknh_sha512sig1_cg_cp_rs1_b21, Zknh_sha512sig1_cg_cp_rs1_b21_str) + 80000408: 000fb203 ld x4,0(x31) + 8000040c: 00e20c63 beq x4,x14,80000424 + 80000410: 3b0022ef jal x5,800027c0 + 80000414: 80000404 .word 0x80000404 + 80000418: 00000000 .word 0x00000000 + 8000041c: 80008c8a .word 0x80008c8a + 80000420: 00000000 .word 0x00000000 + 80000424: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x2, x22) # load rs1: x22 = 0x17b7581320f26378 + 80000428: 00013b03 ld x22,0(x2) + 8000042c: 00810113 addi x2,x2,8 + +0000000080000430 : +Zknh_sha512sig1_cg_cp_rs1_b22: + sha512sig1 x12, x22 # perform operation + 80000430: 107b1613 sha512sig1 x12,x22 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zknh_sha512sig1_cg_cp_rs1_b22, Zknh_sha512sig1_cg_cp_rs1_b22_str) + 80000434: 000fb203 ld x4,0(x31) + 80000438: 00c20c63 beq x4,x12,80000450 + 8000043c: 384022ef jal x5,800027c0 + 80000440: 80000430 .word 0x80000430 + 80000444: 00000000 .word 0x00000000 + 80000448: 80008cc3 .word 0x80008cc3 + 8000044c: 00000000 .word 0x00000000 + 80000450: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x2, x23) # load rs1: x23 = 0xb19f2997ffea5414 + 80000454: 00013b83 ld x23,0(x2) + 80000458: 00810113 addi x2,x2,8 + +000000008000045c : +Zknh_sha512sig1_cg_cp_rs1_b23: + sha512sig1 x29, x23 # perform operation + 8000045c: 107b9e93 sha512sig1 x29,x23 + # Check if x29 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x29, Zknh_sha512sig1_cg_cp_rs1_b23, Zknh_sha512sig1_cg_cp_rs1_b23_str) + 80000460: 000fb203 ld x4,0(x31) + 80000464: 01d20c63 beq x4,x29,8000047c + 80000468: 358022ef jal x5,800027c0 + 8000046c: 8000045c .word 0x8000045c + 80000470: 00000000 .word 0x00000000 + 80000474: 80008cfc .word 0x80008cfc + 80000478: 00000000 .word 0x00000000 + 8000047c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x603ee79703b301a7 + 80000480: 00013c03 ld x24,0(x2) + 80000484: 00810113 addi x2,x2,8 + +0000000080000488 : +Zknh_sha512sig1_cg_cp_rs1_b24: + sha512sig1 x1, x24 # perform operation + 80000488: 107c1093 sha512sig1 x1,x24 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zknh_sha512sig1_cg_cp_rs1_b24, Zknh_sha512sig1_cg_cp_rs1_b24_str) + 8000048c: 000fb203 ld x4,0(x31) + 80000490: 00120c63 beq x4,x1,800004a8 + 80000494: 32c022ef jal x5,800027c0 + 80000498: 80000488 .word 0x80000488 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 80008d35 .word 0x80008d35 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0x68f1bc596d65611d + 800004ac: 00013c83 ld x25,0(x2) + 800004b0: 00810113 addi x2,x2,8 + +00000000800004b4 : +Zknh_sha512sig1_cg_cp_rs1_b25: + sha512sig1 x21, x25 # perform operation + 800004b4: 107c9a93 sha512sig1 x21,x25 + # Check if x21 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x21, Zknh_sha512sig1_cg_cp_rs1_b25, Zknh_sha512sig1_cg_cp_rs1_b25_str) + 800004b8: 000fb203 ld x4,0(x31) + 800004bc: 01520c63 beq x4,x21,800004d4 + 800004c0: 300022ef jal x5,800027c0 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 80008d6e .word 0x80008d6e + 800004d0: 00000000 .word 0x00000000 + 800004d4: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x2, x26) # load rs1: x26 = 0x3de78fcfe55d5cc0 + 800004d8: 00013d03 ld x26,0(x2) + 800004dc: 00810113 addi x2,x2,8 + +00000000800004e0 : +Zknh_sha512sig1_cg_cp_rs1_b26: + sha512sig1 x9, x26 # perform operation + 800004e0: 107d1493 sha512sig1 x9,x26 + # Check if x9 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x9, Zknh_sha512sig1_cg_cp_rs1_b26, Zknh_sha512sig1_cg_cp_rs1_b26_str) + 800004e4: 000fb203 ld x4,0(x31) + 800004e8: 00920c63 beq x4,x9,80000500 + 800004ec: 2d4022ef jal x5,800027c0 + 800004f0: 800004e0 .word 0x800004e0 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 80008da7 .word 0x80008da7 + 800004fc: 00000000 .word 0x00000000 + 80000500: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x2, x27) # load rs1: x27 = 0xe51ca7dc89229629 + 80000504: 00013d83 ld x27,0(x2) + 80000508: 00810113 addi x2,x2,8 + +000000008000050c : +Zknh_sha512sig1_cg_cp_rs1_b27: + sha512sig1 x30, x27 # perform operation + 8000050c: 107d9f13 sha512sig1 x30,x27 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha512sig1_cg_cp_rs1_b27, Zknh_sha512sig1_cg_cp_rs1_b27_str) + 80000510: 000fb203 ld x4,0(x31) + 80000514: 01e20c63 beq x4,x30,8000052c + 80000518: 2a8022ef jal x5,800027c0 + 8000051c: 8000050c .word 0x8000050c + 80000520: 00000000 .word 0x00000000 + 80000524: 80008de0 .word 0x80008de0 + 80000528: 00000000 .word 0x00000000 + 8000052c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x2, x28) # load rs1: x28 = 0x113c0acf8b42feb6 + 80000530: 00013e03 ld x28,0(x2) + 80000534: 00810113 addi x2,x2,8 + +0000000080000538 : +Zknh_sha512sig1_cg_cp_rs1_b28: + sha512sig1 x30, x28 # perform operation + 80000538: 107e1f13 sha512sig1 x30,x28 + # Check if x30 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x30, Zknh_sha512sig1_cg_cp_rs1_b28, Zknh_sha512sig1_cg_cp_rs1_b28_str) + 8000053c: 000fb203 ld x4,0(x31) + 80000540: 01e20c63 beq x4,x30,80000558 + 80000544: 27c022ef jal x5,800027c0 + 80000548: 80000538 .word 0x80000538 + 8000054c: 00000000 .word 0x00000000 + 80000550: 80008e19 .word 0x80008e19 + 80000554: 00000000 .word 0x00000000 + 80000558: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x2, x29) # load rs1: x29 = 0x96942aa28f53aa0f + 8000055c: 00013e83 ld x29,0(x2) + 80000560: 00810113 addi x2,x2,8 + +0000000080000564 : +Zknh_sha512sig1_cg_cp_rs1_b29: + sha512sig1 x14, x29 # perform operation + 80000564: 107e9713 sha512sig1 x14,x29 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zknh_sha512sig1_cg_cp_rs1_b29, Zknh_sha512sig1_cg_cp_rs1_b29_str) + 80000568: 000fb203 ld x4,0(x31) + 8000056c: 00e20c63 beq x4,x14,80000584 + 80000570: 250022ef jal x5,800027c0 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008e52 .word 0x80008e52 + 80000580: 00000000 .word 0x00000000 + 80000584: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x2, x30) # load rs1: x30 = 0x039a8ed81b84f63b + 80000588: 00013f03 ld x30,0(x2) + 8000058c: 00810113 addi x2,x2,8 + +0000000080000590 : +Zknh_sha512sig1_cg_cp_rs1_b30: + sha512sig1 x25, x30 # perform operation + 80000590: 107f1c93 sha512sig1 x25,x30 + # Check if x25 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x25, Zknh_sha512sig1_cg_cp_rs1_b30, Zknh_sha512sig1_cg_cp_rs1_b30_str) + 80000594: 000fb203 ld x4,0(x31) + 80000598: 01920c63 beq x4,x25,800005b0 + 8000059c: 224022ef jal x5,800027c0 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008e8b .word 0x80008e8b + 800005ac: 00000000 .word 0x00000000 + 800005b0: 008f8f93 addi x31,x31,8 + + mv x26, x31 # switch signature pointer register to avoid conflict with test + 800005b4: 000f8d13 addi x26,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x2, x31) # load rs1: x31 = 0x3c608546fac0fbd0 + 800005b8: 00013f83 ld x31,0(x2) + 800005bc: 00810113 addi x2,x2,8 + +00000000800005c0 : +Zknh_sha512sig1_cg_cp_rs1_b31: + sha512sig1 x12, x31 # perform operation + 800005c0: 107f9613 sha512sig1 x12,x31 + # Check if x12 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x12, Zknh_sha512sig1_cg_cp_rs1_b31, Zknh_sha512sig1_cg_cp_rs1_b31_str) + 800005c4: 000d3203 ld x4,0(x26) + 800005c8: 00c20c63 beq x4,x12,800005e0 + 800005cc: 1f4022ef jal x5,800027c0 + 800005d0: 800005c0 .word 0x800005c0 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 80008ec4 .word 0x80008ec4 + 800005dc: 00000000 .word 0x00000000 + 800005e0: 008d0d13 addi x26,x26,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x2, x25) # load rs1: x25 = 0xa584583fd3115135 + 800005e4: 00013c83 ld x25,0(x2) + 800005e8: 00810113 addi x2,x2,8 + +00000000800005ec : +Zknh_sha512sig1_cg_cp_rd_b0: + sha512sig1 x0, x25 # perform operation + 800005ec: 107c9013 sha512sig1 x0,x25 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zknh_sha512sig1_cg_cp_rd_b0, Zknh_sha512sig1_cg_cp_rd_b0_str) + 800005f0: 000d3203 ld x4,0(x26) + 800005f4: 00020c63 beq x4,x0,8000060c + 800005f8: 1c8022ef jal x5,800027c0 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80008efd .word 0x80008efd + 80000608: 00000000 .word 0x00000000 + 8000060c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x2, x24) # load rs1: x24 = 0x8861e1b2e3bdad46 + 80000610: 00013c03 ld x24,0(x2) + 80000614: 00810113 addi x2,x2,8 + +0000000080000618 : +Zknh_sha512sig1_cg_cp_rd_b1: + sha512sig1 x1, x24 # perform operation + 80000618: 107c1093 sha512sig1 x1,x24 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zknh_sha512sig1_cg_cp_rd_b1, Zknh_sha512sig1_cg_cp_rd_b1_str) + 8000061c: 000d3203 ld x4,0(x26) + 80000620: 00120c63 beq x4,x1,80000638 + 80000624: 19c022ef jal x5,800027c0 + 80000628: 80000618 .word 0x80000618 + 8000062c: 00000000 .word 0x00000000 + 80000630: 80008f34 .word 0x80008f34 + 80000634: 00000000 .word 0x00000000 + 80000638: 008d0d13 addi x26,x26,8 + + mv x15, x2 # switch data pointer register to avoid conflict with test + 8000063c: 00010793 addi x15,x2,0 +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x63a5c66290d4965d + 80000640: 0007ba83 ld x21,0(x15) + 80000644: 00878793 addi x15,x15,8 + +0000000080000648 : +Zknh_sha512sig1_cg_cp_rd_b2: + sha512sig1 x2, x21 # perform operation + 80000648: 107a9113 sha512sig1 x2,x21 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zknh_sha512sig1_cg_cp_rd_b2, Zknh_sha512sig1_cg_cp_rd_b2_str) + 8000064c: 000d3203 ld x4,0(x26) + 80000650: 00220c63 beq x4,x2,80000668 + 80000654: 16c022ef jal x5,800027c0 + 80000658: 80000648 .word 0x80000648 + 8000065c: 00000000 .word 0x00000000 + 80000660: 80008f6b .word 0x80008f6b + 80000664: 00000000 .word 0x00000000 + 80000668: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x11042077d7a623be + 8000066c: 0007b903 ld x18,0(x15) + 80000670: 00878793 addi x15,x15,8 + +0000000080000674 : +Zknh_sha512sig1_cg_cp_rd_b3: + sha512sig1 x3, x18 # perform operation + 80000674: 10791193 sha512sig1 x3,x18 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zknh_sha512sig1_cg_cp_rd_b3, Zknh_sha512sig1_cg_cp_rd_b3_str) + 80000678: 000d3203 ld x4,0(x26) + 8000067c: 00320c63 beq x4,x3,80000694 + 80000680: 140022ef jal x5,800027c0 + 80000684: 80000674 .word 0x80000674 + 80000688: 00000000 .word 0x00000000 + 8000068c: 80008fa2 .word 0x80008fa2 + 80000690: 00000000 .word 0x00000000 + 80000694: 008d0d13 addi x26,x26,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000698: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000069c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x898de5c24b43abaf + 800006a0: 0007b483 ld x9,0(x15) + 800006a4: 00878793 addi x15,x15,8 + +00000000800006a8 : +Zknh_sha512sig1_cg_cp_rd_b4: + sha512sig1 x4, x9 # perform operation + 800006a8: 10749213 sha512sig1 x4,x9 + # Check if x4 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x4, Zknh_sha512sig1_cg_cp_rd_b4, Zknh_sha512sig1_cg_cp_rd_b4_str) + 800006ac: 000d3683 ld x13,0(x26) + 800006b0: 00468c63 beq x13,x4,800006c8 + 800006b4: 14c0276f jal x14,80002800 + 800006b8: 800006a8 .word 0x800006a8 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 80008fd9 .word 0x80008fd9 + 800006c4: 00000000 .word 0x00000000 + 800006c8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x67e5807a82366cb7 + 800006cc: 0007be03 ld x28,0(x15) + 800006d0: 00878793 addi x15,x15,8 + +00000000800006d4 : +Zknh_sha512sig1_cg_cp_rd_b5: + sha512sig1 x5, x28 # perform operation + 800006d4: 107e1293 sha512sig1 x5,x28 + # Check if x5 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x5, Zknh_sha512sig1_cg_cp_rd_b5, Zknh_sha512sig1_cg_cp_rd_b5_str) + 800006d8: 000d3683 ld x13,0(x26) + 800006dc: 00568c63 beq x13,x5,800006f4 + 800006e0: 1200276f jal x14,80002800 + 800006e4: 800006d4 .word 0x800006d4 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 80009010 .word 0x80009010 + 800006f0: 00000000 .word 0x00000000 + 800006f4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x8919ac3a8d237f71 + 800006f8: 0007b003 ld x0,0(x15) + 800006fc: 00878793 addi x15,x15,8 + +0000000080000700 : +Zknh_sha512sig1_cg_cp_rd_b6: + sha512sig1 x6, x0 # perform operation + 80000700: 10701313 sha512sig1 x6,x0 + # Check if x6 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x6, Zknh_sha512sig1_cg_cp_rd_b6, Zknh_sha512sig1_cg_cp_rd_b6_str) + 80000704: 000d3683 ld x13,0(x26) + 80000708: 00668c63 beq x13,x6,80000720 + 8000070c: 0f40276f jal x14,80002800 + 80000710: 80000700 .word 0x80000700 + 80000714: 00000000 .word 0x00000000 + 80000718: 80009047 .word 0x80009047 + 8000071c: 00000000 .word 0x00000000 + 80000720: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x755358606b684377 + 80000724: 0007bd83 ld x27,0(x15) + 80000728: 00878793 addi x15,x15,8 + +000000008000072c : +Zknh_sha512sig1_cg_cp_rd_b7: + sha512sig1 x7, x27 # perform operation + 8000072c: 107d9393 sha512sig1 x7,x27 + # Check if x7 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x7, Zknh_sha512sig1_cg_cp_rd_b7, Zknh_sha512sig1_cg_cp_rd_b7_str) + 80000730: 000d3683 ld x13,0(x26) + 80000734: 00768c63 beq x13,x7,8000074c + 80000738: 0c80276f jal x14,80002800 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000907e .word 0x8000907e + 80000748: 00000000 .word 0x00000000 + 8000074c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xf163d11c8fb27b0b + 80000750: 0007b083 ld x1,0(x15) + 80000754: 00878793 addi x15,x15,8 + +0000000080000758 : +Zknh_sha512sig1_cg_cp_rd_b8: + sha512sig1 x8, x1 # perform operation + 80000758: 10709413 sha512sig1 x8,x1 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zknh_sha512sig1_cg_cp_rd_b8, Zknh_sha512sig1_cg_cp_rd_b8_str) + 8000075c: 000d3683 ld x13,0(x26) + 80000760: 00868c63 beq x13,x8,80000778 + 80000764: 09c0276f jal x14,80002800 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 800090b5 .word 0x800090b5 + 80000774: 00000000 .word 0x00000000 + 80000778: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0794624228e757dd + 8000077c: 0007bb83 ld x23,0(x15) + 80000780: 00878793 addi x15,x15,8 + +0000000080000784 : +Zknh_sha512sig1_cg_cp_rd_b9: + sha512sig1 x9, x23 # perform operation + 80000784: 107b9493 sha512sig1 x9,x23 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zknh_sha512sig1_cg_cp_rd_b9, Zknh_sha512sig1_cg_cp_rd_b9_str) + 80000788: 000d3683 ld x13,0(x26) + 8000078c: 00968c63 beq x13,x9,800007a4 + 80000790: 0700276f jal x14,80002800 + 80000794: 80000784 .word 0x80000784 + 80000798: 00000000 .word 0x00000000 + 8000079c: 800090ec .word 0x800090ec + 800007a0: 00000000 .word 0x00000000 + 800007a4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x007082d4efba43f3 + 800007a8: 0007bb83 ld x23,0(x15) + 800007ac: 00878793 addi x15,x15,8 + +00000000800007b0 : +Zknh_sha512sig1_cg_cp_rd_b10: + sha512sig1 x10, x23 # perform operation + 800007b0: 107b9513 sha512sig1 x10,x23 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zknh_sha512sig1_cg_cp_rd_b10, Zknh_sha512sig1_cg_cp_rd_b10_str) + 800007b4: 000d3683 ld x13,0(x26) + 800007b8: 00a68c63 beq x13,x10,800007d0 + 800007bc: 0440276f jal x14,80002800 + 800007c0: 800007b0 .word 0x800007b0 + 800007c4: 00000000 .word 0x00000000 + 800007c8: 80009123 .word 0x80009123 + 800007cc: 00000000 .word 0x00000000 + 800007d0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x55e3fc067e7c8208 + 800007d4: 0007b903 ld x18,0(x15) + 800007d8: 00878793 addi x15,x15,8 + +00000000800007dc : +Zknh_sha512sig1_cg_cp_rd_b11: + sha512sig1 x11, x18 # perform operation + 800007dc: 10791593 sha512sig1 x11,x18 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zknh_sha512sig1_cg_cp_rd_b11, Zknh_sha512sig1_cg_cp_rd_b11_str) + 800007e0: 000d3683 ld x13,0(x26) + 800007e4: 00b68c63 beq x13,x11,800007fc + 800007e8: 0180276f jal x14,80002800 + 800007ec: 800007dc .word 0x800007dc + 800007f0: 00000000 .word 0x00000000 + 800007f4: 8000915b .word 0x8000915b + 800007f8: 00000000 .word 0x00000000 + 800007fc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xb73690c1bb2266c9 + 80000800: 0007b903 ld x18,0(x15) + 80000804: 00878793 addi x15,x15,8 + +0000000080000808 : +Zknh_sha512sig1_cg_cp_rd_b12: + sha512sig1 x12, x18 # perform operation + 80000808: 10791613 sha512sig1 x12,x18 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zknh_sha512sig1_cg_cp_rd_b12, Zknh_sha512sig1_cg_cp_rd_b12_str) + 8000080c: 000d3683 ld x13,0(x26) + 80000810: 00c68c63 beq x13,x12,80000828 + 80000814: 7ed0176f jal x14,80002800 + 80000818: 80000808 .word 0x80000808 + 8000081c: 00000000 .word 0x00000000 + 80000820: 80009193 .word 0x80009193 + 80000824: 00000000 .word 0x00000000 + 80000828: 008d0d13 addi x26,x26,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000082c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000830: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x2f003e05ef9e03d1 + 80000834: 0007be83 ld x29,0(x15) + 80000838: 00878793 addi x15,x15,8 + +000000008000083c : +Zknh_sha512sig1_cg_cp_rd_b13: + sha512sig1 x13, x29 # perform operation + 8000083c: 107e9693 sha512sig1 x13,x29 + # Check if x13 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x13, Zknh_sha512sig1_cg_cp_rd_b13, Zknh_sha512sig1_cg_cp_rd_b13_str) + 80000840: 000d3383 ld x7,0(x26) + 80000844: 00d38c63 beq x7,x13,8000085c + 80000848: 7910146f jal x8,800027d8 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 800091cb .word 0x800091cb + 80000858: 00000000 .word 0x00000000 + 8000085c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xf5ea1306f4dcfd51 + 80000860: 0007bb83 ld x23,0(x15) + 80000864: 00878793 addi x15,x15,8 + +0000000080000868 : +Zknh_sha512sig1_cg_cp_rd_b14: + sha512sig1 x14, x23 # perform operation + 80000868: 107b9713 sha512sig1 x14,x23 + # Check if x14 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x14, Zknh_sha512sig1_cg_cp_rd_b14, Zknh_sha512sig1_cg_cp_rd_b14_str) + 8000086c: 000d3383 ld x7,0(x26) + 80000870: 00e38c63 beq x7,x14,80000888 + 80000874: 7650146f jal x8,800027d8 + 80000878: 80000868 .word 0x80000868 + 8000087c: 00000000 .word 0x00000000 + 80000880: 80009203 .word 0x80009203 + 80000884: 00000000 .word 0x00000000 + 80000888: 008d0d13 addi x26,x26,8 + + mv x22, x15 # switch data pointer register to avoid conflict with test + 8000088c: 00078b13 addi x22,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x22, x18) # load rs1: x18 = 0x025cb622d0cc0f29 + 80000890: 000b3903 ld x18,0(x22) + 80000894: 008b0b13 addi x22,x22,8 + +0000000080000898 : +Zknh_sha512sig1_cg_cp_rd_b15: + sha512sig1 x15, x18 # perform operation + 80000898: 10791793 sha512sig1 x15,x18 + # Check if x15 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x15, Zknh_sha512sig1_cg_cp_rd_b15, Zknh_sha512sig1_cg_cp_rd_b15_str) + 8000089c: 000d3383 ld x7,0(x26) + 800008a0: 00f38c63 beq x7,x15,800008b8 + 800008a4: 7350146f jal x8,800027d8 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 8000923b .word 0x8000923b + 800008b4: 00000000 .word 0x00000000 + 800008b8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x22, x20) # load rs1: x20 = 0x7f7c81610a0945fa + 800008bc: 000b3a03 ld x20,0(x22) + 800008c0: 008b0b13 addi x22,x22,8 + +00000000800008c4 : +Zknh_sha512sig1_cg_cp_rd_b16: + sha512sig1 x16, x20 # perform operation + 800008c4: 107a1813 sha512sig1 x16,x20 + # Check if x16 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x16, Zknh_sha512sig1_cg_cp_rd_b16, Zknh_sha512sig1_cg_cp_rd_b16_str) + 800008c8: 000d3383 ld x7,0(x26) + 800008cc: 01038c63 beq x7,x16,800008e4 + 800008d0: 7090146f jal x8,800027d8 + 800008d4: 800008c4 .word 0x800008c4 + 800008d8: 00000000 .word 0x00000000 + 800008dc: 80009273 .word 0x80009273 + 800008e0: 00000000 .word 0x00000000 + 800008e4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x22, x21) # load rs1: x21 = 0xa2e80362df160ded + 800008e8: 000b3a83 ld x21,0(x22) + 800008ec: 008b0b13 addi x22,x22,8 + +00000000800008f0 : +Zknh_sha512sig1_cg_cp_rd_b17: + sha512sig1 x17, x21 # perform operation + 800008f0: 107a9893 sha512sig1 x17,x21 + # Check if x17 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x17, Zknh_sha512sig1_cg_cp_rd_b17, Zknh_sha512sig1_cg_cp_rd_b17_str) + 800008f4: 000d3383 ld x7,0(x26) + 800008f8: 01138c63 beq x7,x17,80000910 + 800008fc: 6dd0146f jal x8,800027d8 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800092ab .word 0x800092ab + 8000090c: 00000000 .word 0x00000000 + 80000910: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x22, x16) # load rs1: x16 = 0x41223752f30b69b3 + 80000914: 000b3803 ld x16,0(x22) + 80000918: 008b0b13 addi x22,x22,8 + +000000008000091c : +Zknh_sha512sig1_cg_cp_rd_b18: + sha512sig1 x18, x16 # perform operation + 8000091c: 10781913 sha512sig1 x18,x16 + # Check if x18 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x18, Zknh_sha512sig1_cg_cp_rd_b18, Zknh_sha512sig1_cg_cp_rd_b18_str) + 80000920: 000d3383 ld x7,0(x26) + 80000924: 01238c63 beq x7,x18,8000093c + 80000928: 6b10146f jal x8,800027d8 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800092e3 .word 0x800092e3 + 80000938: 00000000 .word 0x00000000 + 8000093c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x12b28964cc848b6e + 80000940: 000b3e03 ld x28,0(x22) + 80000944: 008b0b13 addi x22,x22,8 + +0000000080000948 : +Zknh_sha512sig1_cg_cp_rd_b19: + sha512sig1 x19, x28 # perform operation + 80000948: 107e1993 sha512sig1 x19,x28 + # Check if x19 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x19, Zknh_sha512sig1_cg_cp_rd_b19, Zknh_sha512sig1_cg_cp_rd_b19_str) + 8000094c: 000d3383 ld x7,0(x26) + 80000950: 01338c63 beq x7,x19,80000968 + 80000954: 6850146f jal x8,800027d8 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000931b .word 0x8000931b + 80000964: 00000000 .word 0x00000000 + 80000968: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x22, x28) # load rs1: x28 = 0x42c295ba41dd12a4 + 8000096c: 000b3e03 ld x28,0(x22) + 80000970: 008b0b13 addi x22,x22,8 + +0000000080000974 : +Zknh_sha512sig1_cg_cp_rd_b20: + sha512sig1 x20, x28 # perform operation + 80000974: 107e1a13 sha512sig1 x20,x28 + # Check if x20 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x20, Zknh_sha512sig1_cg_cp_rd_b20, Zknh_sha512sig1_cg_cp_rd_b20_str) + 80000978: 000d3383 ld x7,0(x26) + 8000097c: 01438c63 beq x7,x20,80000994 + 80000980: 6590146f jal x8,800027d8 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x22, x11) # load rs1: x11 = 0x402fb037d0fef46e + 80000998: 000b3583 ld x11,0(x22) + 8000099c: 008b0b13 addi x22,x22,8 + +00000000800009a0 : +Zknh_sha512sig1_cg_cp_rd_b21: + sha512sig1 x21, x11 # perform operation + 800009a0: 10759a93 sha512sig1 x21,x11 + # Check if x21 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x21, Zknh_sha512sig1_cg_cp_rd_b21, Zknh_sha512sig1_cg_cp_rd_b21_str) + 800009a4: 000d3383 ld x7,0(x26) + 800009a8: 01538c63 beq x7,x21,800009c0 + 800009ac: 62d0146f jal x8,800027d8 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000938b .word 0x8000938b + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008d0d13 addi x26,x26,8 + + mv x1, x22 # switch data pointer register to avoid conflict with test + 800009c4: 000b0093 addi x1,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0xddb8ed29d05bed83 + 800009c8: 0000bb83 ld x23,0(x1) + 800009cc: 00808093 addi x1,x1,8 + +00000000800009d0 : +Zknh_sha512sig1_cg_cp_rd_b22: + sha512sig1 x22, x23 # perform operation + 800009d0: 107b9b13 sha512sig1 x22,x23 + # Check if x22 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x22, Zknh_sha512sig1_cg_cp_rd_b22, Zknh_sha512sig1_cg_cp_rd_b22_str) + 800009d4: 000d3383 ld x7,0(x26) + 800009d8: 01638c63 beq x7,x22,800009f0 + 800009dc: 5fd0146f jal x8,800027d8 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 800093c3 .word 0x800093c3 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x91d42a5221cf1a16 + 800009f4: 0000b683 ld x13,0(x1) + 800009f8: 00808093 addi x1,x1,8 + +00000000800009fc : +Zknh_sha512sig1_cg_cp_rd_b23: + sha512sig1 x23, x13 # perform operation + 800009fc: 10769b93 sha512sig1 x23,x13 + # Check if x23 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x23, Zknh_sha512sig1_cg_cp_rd_b23, Zknh_sha512sig1_cg_cp_rd_b23_str) + 80000a00: 000d3383 ld x7,0(x26) + 80000a04: 01738c63 beq x7,x23,80000a1c + 80000a08: 5d10146f jal x8,800027d8 + 80000a0c: 800009fc .word 0x800009fc + 80000a10: 00000000 .word 0x00000000 + 80000a14: 800093fb .word 0x800093fb + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x7b3d3623525d7686 + 80000a20: 0000b803 ld x16,0(x1) + 80000a24: 00808093 addi x1,x1,8 + +0000000080000a28 : +Zknh_sha512sig1_cg_cp_rd_b24: + sha512sig1 x24, x16 # perform operation + 80000a28: 10781c13 sha512sig1 x24,x16 + # Check if x24 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x24, Zknh_sha512sig1_cg_cp_rd_b24, Zknh_sha512sig1_cg_cp_rd_b24_str) + 80000a2c: 000d3383 ld x7,0(x26) + 80000a30: 01838c63 beq x7,x24,80000a48 + 80000a34: 5a50146f jal x8,800027d8 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009433 .word 0x80009433 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x1a242f2ed1342a57 + 80000a4c: 0000bf03 ld x30,0(x1) + 80000a50: 00808093 addi x1,x1,8 + +0000000080000a54 : +Zknh_sha512sig1_cg_cp_rd_b25: + sha512sig1 x25, x30 # perform operation + 80000a54: 107f1c93 sha512sig1 x25,x30 + # Check if x25 contains the expected result. x26 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x26, x8, x7, x25, Zknh_sha512sig1_cg_cp_rd_b25, Zknh_sha512sig1_cg_cp_rd_b25_str) + 80000a58: 000d3383 ld x7,0(x26) + 80000a5c: 01938c63 beq x7,x25,80000a74 + 80000a60: 5790146f jal x8,800027d8 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000946b .word 0x8000946b + 80000a70: 00000000 .word 0x00000000 + 80000a74: 008d0d13 addi x26,x26,8 + + mv x22, x26 # switch signature pointer register to avoid conflict with test + 80000a78: 000d0b13 addi x22,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xf6955601cf7dc7a8 + 80000a7c: 0000bc83 ld x25,0(x1) + 80000a80: 00808093 addi x1,x1,8 + +0000000080000a84 : +Zknh_sha512sig1_cg_cp_rd_b26: + sha512sig1 x26, x25 # perform operation + 80000a84: 107c9d13 sha512sig1 x26,x25 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zknh_sha512sig1_cg_cp_rd_b26, Zknh_sha512sig1_cg_cp_rd_b26_str) + 80000a88: 000b3383 ld x7,0(x22) + 80000a8c: 01a38c63 beq x7,x26,80000aa4 + 80000a90: 5490146f jal x8,800027d8 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 800094a3 .word 0x800094a3 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0xd906946881cdeaff + 80000aa8: 0000b483 ld x9,0(x1) + 80000aac: 00808093 addi x1,x1,8 + +0000000080000ab0 : +Zknh_sha512sig1_cg_cp_rd_b27: + sha512sig1 x27, x9 # perform operation + 80000ab0: 10749d93 sha512sig1 x27,x9 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zknh_sha512sig1_cg_cp_rd_b27, Zknh_sha512sig1_cg_cp_rd_b27_str) + 80000ab4: 000b3383 ld x7,0(x22) + 80000ab8: 01b38c63 beq x7,x27,80000ad0 + 80000abc: 51d0146f jal x8,800027d8 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 800094db .word 0x800094db + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x9c4e620ca4301a82 + 80000ad4: 0000b703 ld x14,0(x1) + 80000ad8: 00808093 addi x1,x1,8 + +0000000080000adc : +Zknh_sha512sig1_cg_cp_rd_b28: + sha512sig1 x28, x14 # perform operation + 80000adc: 10771e13 sha512sig1 x28,x14 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zknh_sha512sig1_cg_cp_rd_b28, Zknh_sha512sig1_cg_cp_rd_b28_str) + 80000ae0: 000b3383 ld x7,0(x22) + 80000ae4: 01c38c63 beq x7,x28,80000afc + 80000ae8: 4f10146f jal x8,800027d8 + 80000aec: 80000adc .word 0x80000adc + 80000af0: 00000000 .word 0x00000000 + 80000af4: 80009513 .word 0x80009513 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x26d5819f69ab7d6a + 80000b00: 0000bd03 ld x26,0(x1) + 80000b04: 00808093 addi x1,x1,8 + +0000000080000b08 : +Zknh_sha512sig1_cg_cp_rd_b29: + sha512sig1 x29, x26 # perform operation + 80000b08: 107d1e93 sha512sig1 x29,x26 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zknh_sha512sig1_cg_cp_rd_b29, Zknh_sha512sig1_cg_cp_rd_b29_str) + 80000b0c: 000b3383 ld x7,0(x22) + 80000b10: 01d38c63 beq x7,x29,80000b28 + 80000b14: 4c50146f jal x8,800027d8 + 80000b18: 80000b08 .word 0x80000b08 + 80000b1c: 00000000 .word 0x00000000 + 80000b20: 8000954b .word 0x8000954b + 80000b24: 00000000 .word 0x00000000 + 80000b28: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x0b03b15d7433534b + 80000b2c: 0000b603 ld x12,0(x1) + 80000b30: 00808093 addi x1,x1,8 + +0000000080000b34 : +Zknh_sha512sig1_cg_cp_rd_b30: + sha512sig1 x30, x12 # perform operation + 80000b34: 10761f13 sha512sig1 x30,x12 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zknh_sha512sig1_cg_cp_rd_b30, Zknh_sha512sig1_cg_cp_rd_b30_str) + 80000b38: 000b3383 ld x7,0(x22) + 80000b3c: 01e38c63 beq x7,x30,80000b54 + 80000b40: 4990146f jal x8,800027d8 + 80000b44: 80000b34 .word 0x80000b34 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 80009583 .word 0x80009583 + 80000b50: 00000000 .word 0x00000000 + 80000b54: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xdc42b9ed375e4b23 + 80000b58: 0000b983 ld x19,0(x1) + 80000b5c: 00808093 addi x1,x1,8 + +0000000080000b60 : +Zknh_sha512sig1_cg_cp_rd_b31: + sha512sig1 x31, x19 # perform operation + 80000b60: 10799f93 sha512sig1 x31,x19 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zknh_sha512sig1_cg_cp_rd_b31, Zknh_sha512sig1_cg_cp_rd_b31_str) + 80000b64: 000b3383 ld x7,0(x22) + 80000b68: 01f38c63 beq x7,x31,80000b80 + 80000b6c: 46d0146f jal x8,800027d8 + 80000b70: 80000b60 .word 0x80000b60 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 800095bb .word 0x800095bb + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x0000000000000000 + 80000b84: 0000bd83 ld x27,0(x1) + 80000b88: 00808093 addi x1,x1,8 + +0000000080000b8c : +Zknh_sha512sig1_cg_cp_rs1_edges_0x0: + sha512sig1 x18, x27 # perform operation + 80000b8c: 107d9913 sha512sig1 x18,x27 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1_cg_cp_rs1_edges_0x0, Zknh_sha512sig1_cg_cp_rs1_edges_0x0_str) + 80000b90: 000b3383 ld x7,0(x22) + 80000b94: 01238c63 beq x7,x18,80000bac + 80000b98: 4410146f jal x8,800027d8 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 800095f3 .word 0x800095f3 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x0000000000000001 + 80000bb0: 0000b703 ld x14,0(x1) + 80000bb4: 00808093 addi x1,x1,8 + +0000000080000bb8 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x1: + sha512sig1 x18, x14 # perform operation + 80000bb8: 10771913 sha512sig1 x18,x14 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1_cg_cp_rs1_edges_0x1, Zknh_sha512sig1_cg_cp_rs1_edges_0x1_str) + 80000bbc: 000b3383 ld x7,0(x22) + 80000bc0: 01238c63 beq x7,x18,80000bd8 + 80000bc4: 4150146f jal x8,800027d8 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 80009632 .word 0x80009632 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0x0000000000000002 + 80000bdc: 0000b283 ld x5,0(x1) + 80000be0: 00808093 addi x1,x1,8 + +0000000080000be4 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x2: + sha512sig1 x2, x5 # perform operation + 80000be4: 10729113 sha512sig1 x2,x5 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zknh_sha512sig1_cg_cp_rs1_edges_0x2, Zknh_sha512sig1_cg_cp_rs1_edges_0x2_str) + 80000be8: 000b3383 ld x7,0(x22) + 80000bec: 00238c63 beq x7,x2,80000c04 + 80000bf0: 3e90146f jal x8,800027d8 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80009671 .word 0x80009671 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x8000000000000000 + 80000c08: 0000b783 ld x15,0(x1) + 80000c0c: 00808093 addi x1,x1,8 + +0000000080000c10 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000000: + sha512sig1 x13, x15 # perform operation + 80000c10: 10779693 sha512sig1 x13,x15 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c14: 000b3383 ld x7,0(x22) + 80000c18: 00d38c63 beq x7,x13,80000c30 + 80000c1c: 3bd0146f jal x8,800027d8 + 80000c20: 80000c10 .word 0x80000c10 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 800096b0 .word 0x800096b0 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x8000000000000001 + 80000c34: 0000b683 ld x13,0(x1) + 80000c38: 00808093 addi x1,x1,8 + +0000000080000c3c : +Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000001: + sha512sig1 x17, x13 # perform operation + 80000c3c: 10769893 sha512sig1 x17,x13 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha512sig1_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c40: 000b3383 ld x7,0(x22) + 80000c44: 01138c63 beq x7,x17,80000c5c + 80000c48: 3910146f jal x8,800027d8 + 80000c4c: 80000c3c .word 0x80000c3c + 80000c50: 00000000 .word 0x00000000 + 80000c54: 800096fe .word 0x800096fe + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x7fffffffffffffff + 80000c60: 0000b583 ld x11,0(x1) + 80000c64: 00808093 addi x1,x1,8 + +0000000080000c68 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x7fffffffffffffff: + sha512sig1 x18, x11 # perform operation + 80000c68: 10759913 sha512sig1 x18,x11 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha512sig1_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c6c: 000b3383 ld x7,0(x22) + 80000c70: 01238c63 beq x7,x18,80000c88 + 80000c74: 3650146f jal x8,800027d8 + 80000c78: 80000c68 .word 0x80000c68 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 8000974c .word 0x8000974c + 80000c84: 00000000 .word 0x00000000 + 80000c88: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80000c8c: 0000b103 ld x2,0(x1) + 80000c90: 00808093 addi x1,x1,8 + +0000000080000c94 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha512sig1 x18, x2 # perform operation + 80000c94: 10711913 sha512sig1 x18,x2 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zknh_sha512sig1_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha512sig1_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c98: 000b3383 ld x7,0(x22) + 80000c9c: 01238c63 beq x7,x18,80000cb4 + 80000ca0: 3390146f jal x8,800027d8 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000979a .word 0x8000979a + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xffffffffffffffff + 80000cb8: 0000b283 ld x5,0(x1) + 80000cbc: 00808093 addi x1,x1,8 + +0000000080000cc0 : +Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffffffffffff: + sha512sig1 x2, x5 # perform operation + 80000cc0: 10729113 sha512sig1 x2,x5 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc4: 000b3383 ld x7,0(x22) + 80000cc8: 00238c63 beq x7,x2,80000ce0 + 80000ccc: 30d0146f jal x8,800027d8 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 800097e8 .word 0x800097e8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xfffffffffffffffe + 80000ce4: 0000b503 ld x10,0(x1) + 80000ce8: 00808093 addi x1,x1,8 + +0000000080000cec : +Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffffffffffe: + sha512sig1 x25, x10 # perform operation + 80000cec: 10751c93 sha512sig1 x25,x10 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf0: 000b3383 ld x7,0(x22) + 80000cf4: 01938c63 beq x7,x25,80000d0c + 80000cf8: 2e10146f jal x8,800027d8 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 80009836 .word 0x80009836 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 80000d10: 0000b703 ld x14,0(x1) + 80000d14: 00808093 addi x1,x1,8 + +0000000080000d18 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha512sig1 x9, x14 # perform operation + 80000d18: 10771493 sha512sig1 x9,x14 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zknh_sha512sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha512sig1_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d1c: 000b3383 ld x7,0(x22) + 80000d20: 00938c63 beq x7,x9,80000d38 + 80000d24: 2b50146f jal x8,800027d8 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 80009884 .word 0x80009884 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80000d3c: 0000b683 ld x13,0(x1) + 80000d40: 00808093 addi x1,x1,8 + +0000000080000d44 : +Zknh_sha512sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha512sig1 x27, x13 # perform operation + 80000d44: 10769d93 sha512sig1 x27,x13 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zknh_sha512sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha512sig1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d48: 000b3383 ld x7,0(x22) + 80000d4c: 01b38c63 beq x7,x27,80000d64 + 80000d50: 2890146f jal x8,800027d8 + 80000d54: 80000d44 .word 0x80000d44 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 800098d2 .word 0x800098d2 + 80000d60: 00000000 .word 0x00000000 + 80000d64: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x5555555555555555 + 80000d68: 0000be83 ld x29,0(x1) + 80000d6c: 00808093 addi x1,x1,8 + +0000000080000d70 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x5555555555555555: + sha512sig1 x4, x29 # perform operation + 80000d70: 107e9213 sha512sig1 x4,x29 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zknh_sha512sig1_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha512sig1_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d74: 000b3383 ld x7,0(x22) + 80000d78: 00438c63 beq x7,x4,80000d90 + 80000d7c: 25d0146f jal x8,800027d8 + 80000d80: 80000d70 .word 0x80000d70 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 80009920 .word 0x80009920 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x00000000ffffffff + 80000d94: 0000bd83 ld x27,0(x1) + 80000d98: 00808093 addi x1,x1,8 + +0000000080000d9c : +Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffff: + sha512sig1 x11, x27 # perform operation + 80000d9c: 107d9593 sha512sig1 x11,x27 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sig1_cg_cp_rs1_edges_0xffffffff_str) + 80000da0: 000b3383 ld x7,0(x22) + 80000da4: 00b38c63 beq x7,x11,80000dbc + 80000da8: 2310146f jal x8,800027d8 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 8000996e .word 0x8000996e + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x00000000fffffffe + 80000dc0: 0000b483 ld x9,0(x1) + 80000dc4: 00808093 addi x1,x1,8 + +0000000080000dc8 : +Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffe: + sha512sig1 x27, x9 # perform operation + 80000dc8: 10749d93 sha512sig1 x27,x9 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sig1_cg_cp_rs1_edges_0xfffffffe_str) + 80000dcc: 000b3383 ld x7,0(x22) + 80000dd0: 01b38c63 beq x7,x27,80000de8 + 80000dd4: 2050146f jal x8,800027d8 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 800099b4 .word 0x800099b4 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x0000000100000000 + 80000dec: 0000bd83 ld x27,0(x1) + 80000df0: 00808093 addi x1,x1,8 + +0000000080000df4 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x100000000: + sha512sig1 x23, x27 # perform operation + 80000df4: 107d9b93 sha512sig1 x23,x27 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zknh_sha512sig1_cg_cp_rs1_edges_0x100000000, Zknh_sha512sig1_cg_cp_rs1_edges_0x100000000_str) + 80000df8: 000b3383 ld x7,0(x22) + 80000dfc: 01738c63 beq x7,x23,80000e14 + 80000e00: 1d90146f jal x8,800027d8 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 800099fa .word 0x800099fa + 80000e10: 00000000 .word 0x00000000 + 80000e14: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x0000000100000001 + 80000e18: 0000b183 ld x3,0(x1) + 80000e1c: 00808093 addi x1,x1,8 + +0000000080000e20 : +Zknh_sha512sig1_cg_cp_rs1_edges_0x100000001: + sha512sig1 x25, x3 # perform operation + 80000e20: 10719c93 sha512sig1 x25,x3 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zknh_sha512sig1_cg_cp_rs1_edges_0x100000001, Zknh_sha512sig1_cg_cp_rs1_edges_0x100000001_str) + 80000e24: 000b3383 ld x7,0(x22) + 80000e28: 01938c63 beq x7,x25,80000e40 + 80000e2c: 1ad0146f jal x8,800027d8 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 80009a41 .word 0x80009a41 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x37f47773158aeda9 + 80000e44: 0000b003 ld x0,0(x1) + 80000e48: 00808093 addi x1,x1,8 + +0000000080000e4c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b0: + sha512sig1 x0, x0 # perform operation + 80000e4c: 10701013 sha512sig1 x0,x0 + # Check if x0 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x0, Zknh_sha512sig1_cg_cmp_rd_rs1_b0, Zknh_sha512sig1_cg_cmp_rd_rs1_b0_str) + 80000e50: 000b3383 ld x7,0(x22) + 80000e54: 00038c63 beq x7,x0,80000e6c + 80000e58: 1810146f jal x8,800027d8 + 80000e5c: 80000e4c .word 0x80000e4c + 80000e60: 00000000 .word 0x00000000 + 80000e64: 80009a88 .word 0x80009a88 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 008b0b13 addi x22,x22,8 + + mv x16, x1 # switch data pointer register to avoid conflict with test + 80000e70: 00008813 addi x16,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x16, x1) # load rs1: x1 = 0xbc6021a596b562b8 + 80000e74: 00083083 ld x1,0(x16) + 80000e78: 00880813 addi x16,x16,8 + +0000000080000e7c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b1: + sha512sig1 x1, x1 # perform operation + 80000e7c: 10709093 sha512sig1 x1,x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zknh_sha512sig1_cg_cmp_rd_rs1_b1, Zknh_sha512sig1_cg_cmp_rd_rs1_b1_str) + 80000e80: 000b3383 ld x7,0(x22) + 80000e84: 00138c63 beq x7,x1,80000e9c + 80000e88: 1510146f jal x8,800027d8 + 80000e8c: 80000e7c .word 0x80000e7c + 80000e90: 00000000 .word 0x00000000 + 80000e94: 80009ac4 .word 0x80009ac4 + 80000e98: 00000000 .word 0x00000000 + 80000e9c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x16, x2) # load rs1: x2 = 0x09c10450c5dc0cc3 + 80000ea0: 00083103 ld x2,0(x16) + 80000ea4: 00880813 addi x16,x16,8 + +0000000080000ea8 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b2: + sha512sig1 x2, x2 # perform operation + 80000ea8: 10711113 sha512sig1 x2,x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zknh_sha512sig1_cg_cmp_rd_rs1_b2, Zknh_sha512sig1_cg_cmp_rd_rs1_b2_str) + 80000eac: 000b3383 ld x7,0(x22) + 80000eb0: 00238c63 beq x7,x2,80000ec8 + 80000eb4: 1250146f jal x8,800027d8 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 80009b00 .word 0x80009b00 + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xe37f95f22109e467 + 80000ecc: 00083183 ld x3,0(x16) + 80000ed0: 00880813 addi x16,x16,8 + +0000000080000ed4 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b3: + sha512sig1 x3, x3 # perform operation + 80000ed4: 10719193 sha512sig1 x3,x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zknh_sha512sig1_cg_cmp_rd_rs1_b3, Zknh_sha512sig1_cg_cmp_rd_rs1_b3_str) + 80000ed8: 000b3383 ld x7,0(x22) + 80000edc: 00338c63 beq x7,x3,80000ef4 + 80000ee0: 0f90146f jal x8,800027d8 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 80009b3c .word 0x80009b3c + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0xef00031cdadcd20c + 80000ef8: 00083203 ld x4,0(x16) + 80000efc: 00880813 addi x16,x16,8 + +0000000080000f00 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b4: + sha512sig1 x4, x4 # perform operation + 80000f00: 10721213 sha512sig1 x4,x4 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zknh_sha512sig1_cg_cmp_rd_rs1_b4, Zknh_sha512sig1_cg_cmp_rd_rs1_b4_str) + 80000f04: 000b3383 ld x7,0(x22) + 80000f08: 00438c63 beq x7,x4,80000f20 + 80000f0c: 0cd0146f jal x8,800027d8 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 80009b78 .word 0x80009b78 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x8ab20a0eeccb30f9 + 80000f24: 00083283 ld x5,0(x16) + 80000f28: 00880813 addi x16,x16,8 + +0000000080000f2c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b5: + sha512sig1 x5, x5 # perform operation + 80000f2c: 10729293 sha512sig1 x5,x5 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zknh_sha512sig1_cg_cmp_rd_rs1_b5, Zknh_sha512sig1_cg_cmp_rd_rs1_b5_str) + 80000f30: 000b3383 ld x7,0(x22) + 80000f34: 00538c63 beq x7,x5,80000f4c + 80000f38: 0a10146f jal x8,800027d8 + 80000f3c: 80000f2c .word 0x80000f2c + 80000f40: 00000000 .word 0x00000000 + 80000f44: 80009bb4 .word 0x80009bb4 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xe01d3eb72ec73ff1 + 80000f50: 00083303 ld x6,0(x16) + 80000f54: 00880813 addi x16,x16,8 + +0000000080000f58 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b6: + sha512sig1 x6, x6 # perform operation + 80000f58: 10731313 sha512sig1 x6,x6 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zknh_sha512sig1_cg_cmp_rd_rs1_b6, Zknh_sha512sig1_cg_cmp_rd_rs1_b6_str) + 80000f5c: 000b3383 ld x7,0(x22) + 80000f60: 00638c63 beq x7,x6,80000f78 + 80000f64: 0750146f jal x8,800027d8 + 80000f68: 80000f58 .word 0x80000f58 + 80000f6c: 00000000 .word 0x00000000 + 80000f70: 80009bf0 .word 0x80009bf0 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 008b0b13 addi x22,x22,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000f7c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000f80: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x414e4e51b60adf9f + 80000f84: 00083383 ld x7,0(x16) + 80000f88: 00880813 addi x16,x16,8 + +0000000080000f8c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b7: + sha512sig1 x7, x7 # perform operation + 80000f8c: 10739393 sha512sig1 x7,x7 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sig1_cg_cmp_rd_rs1_b7, Zknh_sha512sig1_cg_cmp_rd_rs1_b7_str) + 80000f90: 000b3683 ld x13,0(x22) + 80000f94: 00768c63 beq x13,x7,80000fac + 80000f98: 0690176f jal x14,80002800 + 80000f9c: 80000f8c .word 0x80000f8c + 80000fa0: 00000000 .word 0x00000000 + 80000fa4: 80009c2c .word 0x80009c2c + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x0ef817fa86faebf3 + 80000fb0: 00083403 ld x8,0(x16) + 80000fb4: 00880813 addi x16,x16,8 + +0000000080000fb8 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b8: + sha512sig1 x8, x8 # perform operation + 80000fb8: 10741413 sha512sig1 x8,x8 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sig1_cg_cmp_rd_rs1_b8, Zknh_sha512sig1_cg_cmp_rd_rs1_b8_str) + 80000fbc: 000b3683 ld x13,0(x22) + 80000fc0: 00868c63 beq x13,x8,80000fd8 + 80000fc4: 03d0176f jal x14,80002800 + 80000fc8: 80000fb8 .word 0x80000fb8 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 80009c68 .word 0x80009c68 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0x8d7ee3ea3574a2c5 + 80000fdc: 00083483 ld x9,0(x16) + 80000fe0: 00880813 addi x16,x16,8 + +0000000080000fe4 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b9: + sha512sig1 x9, x9 # perform operation + 80000fe4: 10749493 sha512sig1 x9,x9 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sig1_cg_cmp_rd_rs1_b9, Zknh_sha512sig1_cg_cmp_rd_rs1_b9_str) + 80000fe8: 000b3683 ld x13,0(x22) + 80000fec: 00968c63 beq x13,x9,80001004 + 80000ff0: 0110176f jal x14,80002800 + 80000ff4: 80000fe4 .word 0x80000fe4 + 80000ff8: 00000000 .word 0x00000000 + 80000ffc: 80009ca4 .word 0x80009ca4 + 80001000: 00000000 .word 0x00000000 + 80001004: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x8dd57a9c8938a2b4 + 80001008: 00083503 ld x10,0(x16) + 8000100c: 00880813 addi x16,x16,8 + +0000000080001010 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b10: + sha512sig1 x10, x10 # perform operation + 80001010: 10751513 sha512sig1 x10,x10 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sig1_cg_cmp_rd_rs1_b10, Zknh_sha512sig1_cg_cmp_rd_rs1_b10_str) + 80001014: 000b3683 ld x13,0(x22) + 80001018: 00a68c63 beq x13,x10,80001030 + 8000101c: 7e40176f jal x14,80002800 + 80001020: 80001010 .word 0x80001010 + 80001024: 00000000 .word 0x00000000 + 80001028: 80009ce0 .word 0x80009ce0 + 8000102c: 00000000 .word 0x00000000 + 80001030: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x162f87d56432fd6a + 80001034: 00083583 ld x11,0(x16) + 80001038: 00880813 addi x16,x16,8 + +000000008000103c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b11: + sha512sig1 x11, x11 # perform operation + 8000103c: 10759593 sha512sig1 x11,x11 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sig1_cg_cmp_rd_rs1_b11, Zknh_sha512sig1_cg_cmp_rd_rs1_b11_str) + 80001040: 000b3683 ld x13,0(x22) + 80001044: 00b68c63 beq x13,x11,8000105c + 80001048: 7b80176f jal x14,80002800 + 8000104c: 8000103c .word 0x8000103c + 80001050: 00000000 .word 0x00000000 + 80001054: 80009d1d .word 0x80009d1d + 80001058: 00000000 .word 0x00000000 + 8000105c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0x6f218cbf527ed108 + 80001060: 00083603 ld x12,0(x16) + 80001064: 00880813 addi x16,x16,8 + +0000000080001068 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b12: + sha512sig1 x12, x12 # perform operation + 80001068: 10761613 sha512sig1 x12,x12 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sig1_cg_cmp_rd_rs1_b12, Zknh_sha512sig1_cg_cmp_rd_rs1_b12_str) + 8000106c: 000b3683 ld x13,0(x22) + 80001070: 00c68c63 beq x13,x12,80001088 + 80001074: 78c0176f jal x14,80002800 + 80001078: 80001068 .word 0x80001068 + 8000107c: 00000000 .word 0x00000000 + 80001080: 80009d5a .word 0x80009d5a + 80001084: 00000000 .word 0x00000000 + 80001088: 008b0b13 addi x22,x22,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000108c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001090: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xbff1564ef5a64400 + 80001094: 00083683 ld x13,0(x16) + 80001098: 00880813 addi x16,x16,8 + +000000008000109c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b13: + sha512sig1 x13, x13 # perform operation + 8000109c: 10769693 sha512sig1 x13,x13 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknh_sha512sig1_cg_cmp_rd_rs1_b13, Zknh_sha512sig1_cg_cmp_rd_rs1_b13_str) + 800010a0: 000b3203 ld x4,0(x22) + 800010a4: 00d20c63 beq x4,x13,800010bc + 800010a8: 718012ef jal x5,800027c0 + 800010ac: 8000109c .word 0x8000109c + 800010b0: 00000000 .word 0x00000000 + 800010b4: 80009d97 .word 0x80009d97 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0x4e7a890f6dc60963 + 800010c0: 00083703 ld x14,0(x16) + 800010c4: 00880813 addi x16,x16,8 + +00000000800010c8 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b14: + sha512sig1 x14, x14 # perform operation + 800010c8: 10771713 sha512sig1 x14,x14 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknh_sha512sig1_cg_cmp_rd_rs1_b14, Zknh_sha512sig1_cg_cmp_rd_rs1_b14_str) + 800010cc: 000b3203 ld x4,0(x22) + 800010d0: 00e20c63 beq x4,x14,800010e8 + 800010d4: 6ec012ef jal x5,800027c0 + 800010d8: 800010c8 .word 0x800010c8 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 80009dd4 .word 0x80009dd4 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xec9c7985068a56d4 + 800010ec: 00083783 ld x15,0(x16) + 800010f0: 00880813 addi x16,x16,8 + +00000000800010f4 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b15: + sha512sig1 x15, x15 # perform operation + 800010f4: 10779793 sha512sig1 x15,x15 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zknh_sha512sig1_cg_cmp_rd_rs1_b15, Zknh_sha512sig1_cg_cmp_rd_rs1_b15_str) + 800010f8: 000b3203 ld x4,0(x22) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 6c0012ef jal x5,800027c0 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e11 .word 0x80009e11 + 80001110: 00000000 .word 0x00000000 + 80001114: 008b0b13 addi x22,x22,8 + + mv x12, x16 # switch data pointer register to avoid conflict with test + 80001118: 00080613 addi x12,x16,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x12, x16) # load rs1: x16 = 0xd8f885b5bc81124a + 8000111c: 00063803 ld x16,0(x12) + 80001120: 00860613 addi x12,x12,8 + +0000000080001124 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b16: + sha512sig1 x16, x16 # perform operation + 80001124: 10781813 sha512sig1 x16,x16 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zknh_sha512sig1_cg_cmp_rd_rs1_b16, Zknh_sha512sig1_cg_cmp_rd_rs1_b16_str) + 80001128: 000b3203 ld x4,0(x22) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 690012ef jal x5,800027c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009e4e .word 0x80009e4e + 80001140: 00000000 .word 0x00000000 + 80001144: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x17) # load rs1: x17 = 0x1e33f2c518fa370e + 80001148: 00063883 ld x17,0(x12) + 8000114c: 00860613 addi x12,x12,8 + +0000000080001150 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b17: + sha512sig1 x17, x17 # perform operation + 80001150: 10789893 sha512sig1 x17,x17 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zknh_sha512sig1_cg_cmp_rd_rs1_b17, Zknh_sha512sig1_cg_cmp_rd_rs1_b17_str) + 80001154: 000b3203 ld x4,0(x22) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009e8b .word 0x80009e8b + 8000116c: 00000000 .word 0x00000000 + 80001170: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0x39508769e725841a + 80001174: 00063903 ld x18,0(x12) + 80001178: 00860613 addi x12,x12,8 + +000000008000117c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b18: + sha512sig1 x18, x18 # perform operation + 8000117c: 10791913 sha512sig1 x18,x18 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zknh_sha512sig1_cg_cmp_rd_rs1_b18, Zknh_sha512sig1_cg_cmp_rd_rs1_b18_str) + 80001180: 000b3203 ld x4,0(x22) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009ec8 .word 0x80009ec8 + 80001198: 00000000 .word 0x00000000 + 8000119c: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x19) # load rs1: x19 = 0x7d13909f7b7fe451 + 800011a0: 00063983 ld x19,0(x12) + 800011a4: 00860613 addi x12,x12,8 + +00000000800011a8 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b19: + sha512sig1 x19, x19 # perform operation + 800011a8: 10799993 sha512sig1 x19,x19 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sig1_cg_cmp_rd_rs1_b19, Zknh_sha512sig1_cg_cmp_rd_rs1_b19_str) + 800011ac: 000b3203 ld x4,0(x22) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009f05 .word 0x80009f05 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x20) # load rs1: x20 = 0x7eea39d62379ae2e + 800011cc: 00063a03 ld x20,0(x12) + 800011d0: 00860613 addi x12,x12,8 + +00000000800011d4 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b20: + sha512sig1 x20, x20 # perform operation + 800011d4: 107a1a13 sha512sig1 x20,x20 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zknh_sha512sig1_cg_cmp_rd_rs1_b20, Zknh_sha512sig1_cg_cmp_rd_rs1_b20_str) + 800011d8: 000b3203 ld x4,0(x22) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009f43 .word 0x80009f43 + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008b0b13 addi x22,x22,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x6997dda2acfaa4c5 + 800011f8: 00063a83 ld x21,0(x12) + 800011fc: 00860613 addi x12,x12,8 + +0000000080001200 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b21: + sha512sig1 x21, x21 # perform operation + 80001200: 107a9a93 sha512sig1 x21,x21 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zknh_sha512sig1_cg_cmp_rd_rs1_b21, Zknh_sha512sig1_cg_cmp_rd_rs1_b21_str) + 80001204: 000b3203 ld x4,0(x22) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 5b4012ef jal x5,800027c0 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f81 .word 0x80009f81 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008b0b13 addi x22,x22,8 + + mv x1, x22 # switch signature pointer register to avoid conflict with test + 80001224: 000b0093 addi x1,x22,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0xd98df6c8d10cdc6b + 80001228: 00063b03 ld x22,0(x12) + 8000122c: 00860613 addi x12,x12,8 + +0000000080001230 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b22: + sha512sig1 x22, x22 # perform operation + 80001230: 107b1b13 sha512sig1 x22,x22 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknh_sha512sig1_cg_cmp_rd_rs1_b22, Zknh_sha512sig1_cg_cmp_rd_rs1_b22_str) + 80001234: 0000b203 ld x4,0(x1) + 80001238: 01620c63 beq x4,x22,80001250 + 8000123c: 584012ef jal x5,800027c0 + 80001240: 80001230 .word 0x80001230 + 80001244: 00000000 .word 0x00000000 + 80001248: 80009fbf .word 0x80009fbf + 8000124c: 00000000 .word 0x00000000 + 80001250: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x2a7e5ee6c1292368 + 80001254: 00063b83 ld x23,0(x12) + 80001258: 00860613 addi x12,x12,8 + +000000008000125c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b23: + sha512sig1 x23, x23 # perform operation + 8000125c: 107b9b93 sha512sig1 x23,x23 + # Check if x23 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x23, Zknh_sha512sig1_cg_cmp_rd_rs1_b23, Zknh_sha512sig1_cg_cmp_rd_rs1_b23_str) + 80001260: 0000b203 ld x4,0(x1) + 80001264: 01720c63 beq x4,x23,8000127c + 80001268: 558012ef jal x5,800027c0 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 80009ffd .word 0x80009ffd + 80001278: 00000000 .word 0x00000000 + 8000127c: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x4c0a7513e5dbde02 + 80001280: 00063c03 ld x24,0(x12) + 80001284: 00860613 addi x12,x12,8 + +0000000080001288 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b24: + sha512sig1 x24, x24 # perform operation + 80001288: 107c1c13 sha512sig1 x24,x24 + # Check if x24 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x24, Zknh_sha512sig1_cg_cmp_rd_rs1_b24, Zknh_sha512sig1_cg_cmp_rd_rs1_b24_str) + 8000128c: 0000b203 ld x4,0(x1) + 80001290: 01820c63 beq x4,x24,800012a8 + 80001294: 52c012ef jal x5,800027c0 + 80001298: 80001288 .word 0x80001288 + 8000129c: 00000000 .word 0x00000000 + 800012a0: 8000a03b .word 0x8000a03b + 800012a4: 00000000 .word 0x00000000 + 800012a8: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xcac7d4929b4c9f01 + 800012ac: 00063c83 ld x25,0(x12) + 800012b0: 00860613 addi x12,x12,8 + +00000000800012b4 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b25: + sha512sig1 x25, x25 # perform operation + 800012b4: 107c9c93 sha512sig1 x25,x25 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknh_sha512sig1_cg_cmp_rd_rs1_b25, Zknh_sha512sig1_cg_cmp_rd_rs1_b25_str) + 800012b8: 0000b203 ld x4,0(x1) + 800012bc: 01920c63 beq x4,x25,800012d4 + 800012c0: 500012ef jal x5,800027c0 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 8000a079 .word 0x8000a079 + 800012d0: 00000000 .word 0x00000000 + 800012d4: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x89c3fb0990a8d5f5 + 800012d8: 00063d03 ld x26,0(x12) + 800012dc: 00860613 addi x12,x12,8 + +00000000800012e0 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b26: + sha512sig1 x26, x26 # perform operation + 800012e0: 107d1d13 sha512sig1 x26,x26 + # Check if x26 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x26, Zknh_sha512sig1_cg_cmp_rd_rs1_b26, Zknh_sha512sig1_cg_cmp_rd_rs1_b26_str) + 800012e4: 0000b203 ld x4,0(x1) + 800012e8: 01a20c63 beq x4,x26,80001300 + 800012ec: 4d4012ef jal x5,800027c0 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0b7 .word 0x8000a0b7 + 800012fc: 00000000 .word 0x00000000 + 80001300: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x8730750b1991551e + 80001304: 00063d83 ld x27,0(x12) + 80001308: 00860613 addi x12,x12,8 + +000000008000130c : +Zknh_sha512sig1_cg_cmp_rd_rs1_b27: + sha512sig1 x27, x27 # perform operation + 8000130c: 107d9d93 sha512sig1 x27,x27 + # Check if x27 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x27, Zknh_sha512sig1_cg_cmp_rd_rs1_b27, Zknh_sha512sig1_cg_cmp_rd_rs1_b27_str) + 80001310: 0000b203 ld x4,0(x1) + 80001314: 01b20c63 beq x4,x27,8000132c + 80001318: 4a8012ef jal x5,800027c0 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0f5 .word 0x8000a0f5 + 80001328: 00000000 .word 0x00000000 + 8000132c: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x13d608413a41bded + 80001330: 00063e03 ld x28,0(x12) + 80001334: 00860613 addi x12,x12,8 + +0000000080001338 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b28: + sha512sig1 x28, x28 # perform operation + 80001338: 107e1e13 sha512sig1 x28,x28 + # Check if x28 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x28, Zknh_sha512sig1_cg_cmp_rd_rs1_b28, Zknh_sha512sig1_cg_cmp_rd_rs1_b28_str) + 8000133c: 0000b203 ld x4,0(x1) + 80001340: 01c20c63 beq x4,x28,80001358 + 80001344: 47c012ef jal x5,800027c0 + 80001348: 80001338 .word 0x80001338 + 8000134c: 00000000 .word 0x00000000 + 80001350: 8000a133 .word 0x8000a133 + 80001354: 00000000 .word 0x00000000 + 80001358: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x7cb4ad20c124e4f3 + 8000135c: 00063e83 ld x29,0(x12) + 80001360: 00860613 addi x12,x12,8 + +0000000080001364 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b29: + sha512sig1 x29, x29 # perform operation + 80001364: 107e9e93 sha512sig1 x29,x29 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknh_sha512sig1_cg_cmp_rd_rs1_b29, Zknh_sha512sig1_cg_cmp_rd_rs1_b29_str) + 80001368: 0000b203 ld x4,0(x1) + 8000136c: 01d20c63 beq x4,x29,80001384 + 80001370: 450012ef jal x5,800027c0 + 80001374: 80001364 .word 0x80001364 + 80001378: 00000000 .word 0x00000000 + 8000137c: 8000a171 .word 0x8000a171 + 80001380: 00000000 .word 0x00000000 + 80001384: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x2702b32f92779fab + 80001388: 00063f03 ld x30,0(x12) + 8000138c: 00860613 addi x12,x12,8 + +0000000080001390 : +Zknh_sha512sig1_cg_cmp_rd_rs1_b30: + sha512sig1 x30, x30 # perform operation + 80001390: 107f1f13 sha512sig1 x30,x30 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha512sig1_cg_cmp_rd_rs1_b30, Zknh_sha512sig1_cg_cmp_rd_rs1_b30_str) + 80001394: 0000b203 ld x4,0(x1) + 80001398: 01e20c63 beq x4,x30,800013b0 + 8000139c: 424012ef jal x5,800027c0 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 8000a1af .word 0x8000a1af + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x89d3e3bebfca90fc + 800013b4: 00063f83 ld x31,0(x12) + 800013b8: 00860613 addi x12,x12,8 + +00000000800013bc : +Zknh_sha512sig1_cg_cmp_rd_rs1_b31: + sha512sig1 x31, x31 # perform operation + 800013bc: 107f9f93 sha512sig1 x31,x31 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zknh_sha512sig1_cg_cmp_rd_rs1_b31, Zknh_sha512sig1_cg_cmp_rd_rs1_b31_str) + 800013c0: 0000b203 ld x4,0(x1) + 800013c4: 01f20c63 beq x4,x31,800013dc + 800013c8: 3f8012ef jal x5,800027c0 + 800013cc: 800013bc .word 0x800013bc + 800013d0: 00000000 .word 0x00000000 + 800013d4: 8000a1ed .word 0x8000a1ed + 800013d8: 00000000 .word 0x00000000 + 800013dc: 00808093 addi x1,x1,8 + + mv x2, x1 # restore signature pointer to default register for teardown + 800013e0: 00008113 addi x2,x1,0 + +00000000800013e4 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e4: 00000513 addi x10,x0,0 + 800013e8: 00000073 ecall + 800013ec: fff00513 addi x10,x0,-1 + 800013f0: 25800413 addi x8,x0,600 + +00000000800013f4 : + 800013f4: 34002373 csrrs x6,mscratch,x0 + +00000000800013f8 : + 800013f8: 2b833383 ld x7,696(x6) + +00000000800013fc : + 800013fc: 2a033383 ld x7,672(x6) + +0000000080001400 : + 80001400: 2d033483 ld x9,720(x6) + 80001404: 34049073 csrrw x0,mscratch,x9 + +0000000080001408 : + 80001408: 2c833483 ld x9,712(x6) + 8000140c: 305493f3 csrrw x7,mtvec,x9 + 80001410: ffc4f493 andi x9,x9,-4 + 80001414: ffc3f393 andi x7,x7,-4 + 80001418: 00749e63 bne x9,x7,80001434 + +000000008000141c : + 8000141c: 00030493 addi x9,x6,0 + +0000000080001420 : + 80001420: 0004a783 lw x15,0(x9) + 80001424: 00f3a023 sw x15,0(x7) + 80001428: 00438393 addi x7,x7,4 + 8000142c: 00448493 addi x9,x9,4 + 80001430: fe83c8e3 blt x7,x8,80001420 + 80001434: 0000100f fence.i + +0000000080001438 : + 80001438: 00000013 addi x0,x0,0 + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc5ff06f jal x0,800013e4 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca1ff06f jal x0,800013e4 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9830313 addi x6,x6,-1384 # 80001438 + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 34c30313 addi x6,x6,844 # 800013e4 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33430313 addi x6,x6,820 # 800013e4 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 31c30313 addi x6,x6,796 # 800013e4 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b478793 addi x15,x15,436 # 800013f4 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha512sum0-00.elf.objdump b/riscv-tests/rv64-Zknh-sha512sum0-00.elf.objdump new file mode 100644 index 0000000..528eace --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha512sum0-00.elf.objdump @@ -0,0 +1,6678 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sum0-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sum0-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008de 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f99 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029019 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002903c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002911e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 cciiSVgC.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b1 +0000000080008827 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b2 +000000008000885e l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b3 +0000000080008895 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088cc l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b5 +0000000080008903 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b6 +000000008000893a l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b7 +0000000080008971 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b8 +00000000800089a8 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b8_str +00000000800001e4 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b9 +00000000800089df l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b9_str +0000000080000210 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b10 +0000000080008a17 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b10_str +000000008000023c l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b11 +0000000080008a50 l .data 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b11_str +0000000080000268 l .text.rvtest 0000000000000000 Zknh_sha512sum0_cg_cp_rs1_b12 +0000000080008a89 l .data 0000000000000000 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environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x9fd587e8fc05bac2 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha512sum0_cg_cp_rs1_b0: + sha512sum0 x26, x0 # perform operation + 80000048: 10401d13 sha512sum0 x26,x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zknh_sha512sum0_cg_cp_rs1_b0, Zknh_sha512sum0_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01a20c63 beq x4,x26,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x24d43d035575ca1d + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha512sum0_cg_cp_rs1_b1: + sha512sum0 x7, x1 # perform operation + 80000074: 10409393 sha512sum0 x7,x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zknh_sha512sum0_cg_cp_rs1_b1, Zknh_sha512sum0_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 00720c63 beq x4,x7,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x17, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010893 addi x17,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x9af2641526478553 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha512sum0_cg_cp_rs1_b2: + sha512sum0 x21, x2 # perform operation + 800000a4: 10411a93 sha512sum0 x21,x2 + # Check if x21 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x21, Zknh_sha512sum0_cg_cp_rs1_b2, Zknh_sha512sum0_cg_cp_rs1_b2_str) + 800000a8: 0008b203 ld x4,0(x17) + 800000ac: 01520c63 beq x4,x21,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00888893 addi x17,x17,8 + + mv x16, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018813 addi x16,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x16, x3) # load rs1: x3 = 0xdd1201c900ef4920 + 800000cc: 00083183 ld x3,0(x16) + 800000d0: 00880813 addi x16,x16,8 + +00000000800000d4 : +Zknh_sha512sum0_cg_cp_rs1_b3: + sha512sum0 x25, x3 # perform operation + 800000d4: 10419c93 sha512sum0 x25,x3 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknh_sha512sum0_cg_cp_rs1_b3, Zknh_sha512sum0_cg_cp_rs1_b3_str) + 800000d8: 0008b203 ld x4,0(x17) + 800000dc: 01920c63 beq x4,x25,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00888893 addi x17,x17,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x16, x4) # load rs1: x4 = 0x104fdebf85609263 + 80000100: 00083203 ld x4,0(x16) + 80000104: 00880813 addi x16,x16,8 + +0000000080000108 : +Zknh_sha512sum0_cg_cp_rs1_b4: + sha512sum0 x5, x4 # perform operation + 80000108: 10421293 sha512sum0 x5,x4 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zknh_sha512sum0_cg_cp_rs1_b4, Zknh_sha512sum0_cg_cp_rs1_b4_str) + 8000010c: 0008b683 ld x13,0(x17) + 80000110: 00568c63 beq x13,x5,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x6428befd055c41fa + 8000012c: 00083283 ld x5,0(x16) + 80000130: 00880813 addi x16,x16,8 + +0000000080000134 : +Zknh_sha512sum0_cg_cp_rs1_b5: + sha512sum0 x10, x5 # perform operation + 80000134: 10429513 sha512sum0 x10,x5 + # Check if x10 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x10, Zknh_sha512sum0_cg_cp_rs1_b5, Zknh_sha512sum0_cg_cp_rs1_b5_str) + 80000138: 0008b683 ld x13,0(x17) + 8000013c: 00a68c63 beq x13,x10,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x16, x6) # load rs1: x6 = 0xffd6bff017b3d4a4 + 80000158: 00083303 ld x6,0(x16) + 8000015c: 00880813 addi x16,x16,8 + +0000000080000160 : +Zknh_sha512sum0_cg_cp_rs1_b6: + sha512sum0 x3, x6 # perform operation + 80000160: 10431193 sha512sum0 x3,x6 + # Check if x3 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x3, Zknh_sha512sum0_cg_cp_rs1_b6, Zknh_sha512sum0_cg_cp_rs1_b6_str) + 80000164: 0008b683 ld x13,0(x17) + 80000168: 00368c63 beq x13,x3,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x16, x7) # load rs1: x7 = 0x097bd97eae6ed707 + 80000184: 00083383 ld x7,0(x16) + 80000188: 00880813 addi x16,x16,8 + +000000008000018c : +Zknh_sha512sum0_cg_cp_rs1_b7: + sha512sum0 x5, x7 # perform operation + 8000018c: 10439293 sha512sum0 x5,x7 + # Check if x5 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x5, Zknh_sha512sum0_cg_cp_rs1_b7, Zknh_sha512sum0_cg_cp_rs1_b7_str) + 80000190: 0008b683 ld x13,0(x17) + 80000194: 00568c63 beq x13,x5,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x16, x8) # load rs1: x8 = 0x1d0baea50ba498b9 + 800001b0: 00083403 ld x8,0(x16) + 800001b4: 00880813 addi x16,x16,8 + +00000000800001b8 : +Zknh_sha512sum0_cg_cp_rs1_b8: + sha512sum0 x19, x8 # perform operation + 800001b8: 10441993 sha512sum0 x19,x8 + # Check if x19 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x19, Zknh_sha512sum0_cg_cp_rs1_b8, Zknh_sha512sum0_cg_cp_rs1_b8_str) + 800001bc: 0008b683 ld x13,0(x17) + 800001c0: 01368c63 beq x13,x19,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x16, x9) # load rs1: x9 = 0xf71a9e718555c46d + 800001dc: 00083483 ld x9,0(x16) + 800001e0: 00880813 addi x16,x16,8 + +00000000800001e4 : +Zknh_sha512sum0_cg_cp_rs1_b9: + sha512sum0 x31, x9 # perform operation + 800001e4: 10449f93 sha512sum0 x31,x9 + # Check if x31 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x31, Zknh_sha512sum0_cg_cp_rs1_b9, Zknh_sha512sum0_cg_cp_rs1_b9_str) + 800001e8: 0008b683 ld x13,0(x17) + 800001ec: 01f68c63 beq x13,x31,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089df .word 0x800089df + 80000200: 00000000 .word 0x00000000 + 80000204: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x16, x10) # load rs1: x10 = 0x3ae114e8fc46f534 + 80000208: 00083503 ld x10,0(x16) + 8000020c: 00880813 addi x16,x16,8 + +0000000080000210 : +Zknh_sha512sum0_cg_cp_rs1_b10: + sha512sum0 x26, x10 # perform operation + 80000210: 10451d13 sha512sum0 x26,x10 + # Check if x26 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x26, Zknh_sha512sum0_cg_cp_rs1_b10, Zknh_sha512sum0_cg_cp_rs1_b10_str) + 80000214: 0008b683 ld x13,0(x17) + 80000218: 01a68c63 beq x13,x26,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 80008a17 .word 0x80008a17 + 8000022c: 00000000 .word 0x00000000 + 80000230: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs1: x11 = 0x3906ce11efc89b30 + 80000234: 00083583 ld x11,0(x16) + 80000238: 00880813 addi x16,x16,8 + +000000008000023c : +Zknh_sha512sum0_cg_cp_rs1_b11: + sha512sum0 x0, x11 # perform operation + 8000023c: 10459013 sha512sum0 x0,x11 + # Check if x0 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x0, Zknh_sha512sum0_cg_cp_rs1_b11, Zknh_sha512sum0_cg_cp_rs1_b11_str) + 80000240: 0008b683 ld x13,0(x17) + 80000244: 00068c63 beq x13,x0,8000025c + 80000248: 5b80276f jal x14,80002800 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80008a50 .word 0x80008a50 + 80000258: 00000000 .word 0x00000000 + 8000025c: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs1: x12 = 0xc6dd97c2243e5a0d + 80000260: 00083603 ld x12,0(x16) + 80000264: 00880813 addi x16,x16,8 + +0000000080000268 : +Zknh_sha512sum0_cg_cp_rs1_b12: + sha512sum0 x15, x12 # perform operation + 80000268: 10461793 sha512sum0 x15,x12 + # Check if x15 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x15, Zknh_sha512sum0_cg_cp_rs1_b12, Zknh_sha512sum0_cg_cp_rs1_b12_str) + 8000026c: 0008b683 ld x13,0(x17) + 80000270: 00f68c63 beq x13,x15,80000288 + 80000274: 58c0276f jal x14,80002800 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 80008a89 .word 0x80008a89 + 80000284: 00000000 .word 0x00000000 + 80000288: 00888893 addi x17,x17,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000028c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000290: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs1: x13 = 0xadc5de7b174aeb38 + 80000294: 00083683 ld x13,0(x16) + 80000298: 00880813 addi x16,x16,8 + +000000008000029c : +Zknh_sha512sum0_cg_cp_rs1_b13: + sha512sum0 x20, x13 # perform operation + 8000029c: 10469a13 sha512sum0 x20,x13 + # Check if x20 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x20, Zknh_sha512sum0_cg_cp_rs1_b13, Zknh_sha512sum0_cg_cp_rs1_b13_str) + 800002a0: 0008b203 ld x4,0(x17) + 800002a4: 01420c63 beq x4,x20,800002bc + 800002a8: 518022ef jal x5,800027c0 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 80008ac2 .word 0x80008ac2 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs1: x14 = 0xdd69f0b4005c58c9 + 800002c0: 00083703 ld x14,0(x16) + 800002c4: 00880813 addi x16,x16,8 + +00000000800002c8 : +Zknh_sha512sum0_cg_cp_rs1_b14: + sha512sum0 x11, x14 # perform operation + 800002c8: 10471593 sha512sum0 x11,x14 + # Check if x11 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x11, Zknh_sha512sum0_cg_cp_rs1_b14, Zknh_sha512sum0_cg_cp_rs1_b14_str) + 800002cc: 0008b203 ld x4,0(x17) + 800002d0: 00b20c63 beq x4,x11,800002e8 + 800002d4: 4ec022ef jal x5,800027c0 + 800002d8: 800002c8 .word 0x800002c8 + 800002dc: 00000000 .word 0x00000000 + 800002e0: 80008afb .word 0x80008afb + 800002e4: 00000000 .word 0x00000000 + 800002e8: 00888893 addi x17,x17,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs1: x15 = 0xd6c369ea0ebdaf09 + 800002ec: 00083783 ld x15,0(x16) + 800002f0: 00880813 addi x16,x16,8 + +00000000800002f4 : +Zknh_sha512sum0_cg_cp_rs1_b15: + sha512sum0 x29, x15 # perform operation + 800002f4: 10479e93 sha512sum0 x29,x15 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknh_sha512sum0_cg_cp_rs1_b15, Zknh_sha512sum0_cg_cp_rs1_b15_str) + 800002f8: 0008b203 ld x4,0(x17) + 800002fc: 01d20c63 beq x4,x29,80000314 + 80000300: 4c0022ef jal x5,800027c0 + 80000304: 800002f4 .word 0x800002f4 + 80000308: 00000000 .word 0x00000000 + 8000030c: 80008b34 .word 0x80008b34 + 80000310: 00000000 .word 0x00000000 + 80000314: 00888893 addi x17,x17,8 + + mv x6, x16 # switch data pointer register to avoid conflict with test + 80000318: 00080313 addi x6,x16,0 +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x1d6384297289be20 + 8000031c: 00033803 ld x16,0(x6) + 80000320: 00830313 addi x6,x6,8 + +0000000080000324 : +Zknh_sha512sum0_cg_cp_rs1_b16: + sha512sum0 x25, x16 # perform operation + 80000324: 10481c93 sha512sum0 x25,x16 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknh_sha512sum0_cg_cp_rs1_b16, Zknh_sha512sum0_cg_cp_rs1_b16_str) + 80000328: 0008b203 ld x4,0(x17) + 8000032c: 01920c63 beq x4,x25,80000344 + 80000330: 490022ef jal x5,800027c0 + 80000334: 80000324 .word 0x80000324 + 80000338: 00000000 .word 0x00000000 + 8000033c: 80008b6d .word 0x80008b6d + 80000340: 00000000 .word 0x00000000 + 80000344: 00888893 addi x17,x17,8 + + mv x22, x17 # switch signature pointer register to avoid conflict with test + 80000348: 00088b13 addi x22,x17,0 +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x2d38a432e8db98d8 + 8000034c: 00033883 ld x17,0(x6) + 80000350: 00830313 addi x6,x6,8 + +0000000080000354 : +Zknh_sha512sum0_cg_cp_rs1_b17: + sha512sum0 x11, x17 # perform operation + 80000354: 10489593 sha512sum0 x11,x17 + # Check if x11 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x11, Zknh_sha512sum0_cg_cp_rs1_b17, Zknh_sha512sum0_cg_cp_rs1_b17_str) + 80000358: 000b3203 ld x4,0(x22) + 8000035c: 00b20c63 beq x4,x11,80000374 + 80000360: 460022ef jal x5,800027c0 + 80000364: 80000354 .word 0x80000354 + 80000368: 00000000 .word 0x00000000 + 8000036c: 80008ba6 .word 0x80008ba6 + 80000370: 00000000 .word 0x00000000 + 80000374: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x9d27cef3429470c6 + 80000378: 00033903 ld x18,0(x6) + 8000037c: 00830313 addi x6,x6,8 + +0000000080000380 : +Zknh_sha512sum0_cg_cp_rs1_b18: + sha512sum0 x7, x18 # perform operation + 80000380: 10491393 sha512sum0 x7,x18 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zknh_sha512sum0_cg_cp_rs1_b18, Zknh_sha512sum0_cg_cp_rs1_b18_str) + 80000384: 000b3203 ld x4,0(x22) + 80000388: 00720c63 beq x4,x7,800003a0 + 8000038c: 434022ef jal x5,800027c0 + 80000390: 80000380 .word 0x80000380 + 80000394: 00000000 .word 0x00000000 + 80000398: 80008bdf .word 0x80008bdf + 8000039c: 00000000 .word 0x00000000 + 800003a0: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x4f42e2d9d0bf1ae7 + 800003a4: 00033983 ld x19,0(x6) + 800003a8: 00830313 addi x6,x6,8 + +00000000800003ac : +Zknh_sha512sum0_cg_cp_rs1_b19: + sha512sum0 x14, x19 # perform operation + 800003ac: 10499713 sha512sum0 x14,x19 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknh_sha512sum0_cg_cp_rs1_b19, Zknh_sha512sum0_cg_cp_rs1_b19_str) + 800003b0: 000b3203 ld x4,0(x22) + 800003b4: 00e20c63 beq x4,x14,800003cc + 800003b8: 408022ef jal x5,800027c0 + 800003bc: 800003ac .word 0x800003ac + 800003c0: 00000000 .word 0x00000000 + 800003c4: 80008c18 .word 0x80008c18 + 800003c8: 00000000 .word 0x00000000 + 800003cc: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xe53e968fa173bd25 + 800003d0: 00033a03 ld x20,0(x6) + 800003d4: 00830313 addi x6,x6,8 + +00000000800003d8 : +Zknh_sha512sum0_cg_cp_rs1_b20: + sha512sum0 x7, x20 # perform operation + 800003d8: 104a1393 sha512sum0 x7,x20 + # Check if x7 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x7, Zknh_sha512sum0_cg_cp_rs1_b20, Zknh_sha512sum0_cg_cp_rs1_b20_str) + 800003dc: 000b3203 ld x4,0(x22) + 800003e0: 00720c63 beq x4,x7,800003f8 + 800003e4: 3dc022ef jal x5,800027c0 + 800003e8: 800003d8 .word 0x800003d8 + 800003ec: 00000000 .word 0x00000000 + 800003f0: 80008c51 .word 0x80008c51 + 800003f4: 00000000 .word 0x00000000 + 800003f8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x2fa74ec4364d9d3a + 800003fc: 00033a83 ld x21,0(x6) + 80000400: 00830313 addi x6,x6,8 + +0000000080000404 : +Zknh_sha512sum0_cg_cp_rs1_b21: + sha512sum0 x19, x21 # perform operation + 80000404: 104a9993 sha512sum0 x19,x21 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sum0_cg_cp_rs1_b21, Zknh_sha512sum0_cg_cp_rs1_b21_str) + 80000408: 000b3203 ld x4,0(x22) + 8000040c: 01320c63 beq x4,x19,80000424 + 80000410: 3b0022ef jal x5,800027c0 + 80000414: 80000404 .word 0x80000404 + 80000418: 00000000 .word 0x00000000 + 8000041c: 80008c8a .word 0x80008c8a + 80000420: 00000000 .word 0x00000000 + 80000424: 008b0b13 addi x22,x22,8 + + mv x24, x22 # switch signature pointer register to avoid conflict with test + 80000428: 000b0c13 addi x24,x22,0 +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x4294a3e133e778c3 + 8000042c: 00033b03 ld x22,0(x6) + 80000430: 00830313 addi x6,x6,8 + +0000000080000434 : +Zknh_sha512sum0_cg_cp_rs1_b22: + sha512sum0 x21, x22 # perform operation + 80000434: 104b1a93 sha512sum0 x21,x22 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zknh_sha512sum0_cg_cp_rs1_b22, Zknh_sha512sum0_cg_cp_rs1_b22_str) + 80000438: 000c3203 ld x4,0(x24) + 8000043c: 01520c63 beq x4,x21,80000454 + 80000440: 380022ef jal x5,800027c0 + 80000444: 80000434 .word 0x80000434 + 80000448: 00000000 .word 0x00000000 + 8000044c: 80008cc3 .word 0x80008cc3 + 80000450: 00000000 .word 0x00000000 + 80000454: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xcb7ffbcd03cece1f + 80000458: 00033b83 ld x23,0(x6) + 8000045c: 00830313 addi x6,x6,8 + +0000000080000460 : +Zknh_sha512sum0_cg_cp_rs1_b23: + sha512sum0 x17, x23 # perform operation + 80000460: 104b9893 sha512sum0 x17,x23 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zknh_sha512sum0_cg_cp_rs1_b23, Zknh_sha512sum0_cg_cp_rs1_b23_str) + 80000464: 000c3203 ld x4,0(x24) + 80000468: 01120c63 beq x4,x17,80000480 + 8000046c: 354022ef jal x5,800027c0 + 80000470: 80000460 .word 0x80000460 + 80000474: 00000000 .word 0x00000000 + 80000478: 80008cfc .word 0x80008cfc + 8000047c: 00000000 .word 0x00000000 + 80000480: 008c0c13 addi x24,x24,8 + + mv x21, x24 # switch signature pointer register to avoid conflict with test + 80000484: 000c0a93 addi x21,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x6a402e29f49c646c + 80000488: 00033c03 ld x24,0(x6) + 8000048c: 00830313 addi x6,x6,8 + +0000000080000490 : +Zknh_sha512sum0_cg_cp_rs1_b24: + sha512sum0 x20, x24 # perform operation + 80000490: 104c1a13 sha512sum0 x20,x24 + # Check if x20 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x20, Zknh_sha512sum0_cg_cp_rs1_b24, Zknh_sha512sum0_cg_cp_rs1_b24_str) + 80000494: 000ab203 ld x4,0(x21) + 80000498: 01420c63 beq x4,x20,800004b0 + 8000049c: 324022ef jal x5,800027c0 + 800004a0: 80000490 .word 0x80000490 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 80008d35 .word 0x80008d35 + 800004ac: 00000000 .word 0x00000000 + 800004b0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x294db4a6dc266777 + 800004b4: 00033c83 ld x25,0(x6) + 800004b8: 00830313 addi x6,x6,8 + +00000000800004bc : +Zknh_sha512sum0_cg_cp_rs1_b25: + sha512sum0 x18, x25 # perform operation + 800004bc: 104c9913 sha512sum0 x18,x25 + # Check if x18 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x18, Zknh_sha512sum0_cg_cp_rs1_b25, Zknh_sha512sum0_cg_cp_rs1_b25_str) + 800004c0: 000ab203 ld x4,0(x21) + 800004c4: 01220c63 beq x4,x18,800004dc + 800004c8: 2f8022ef jal x5,800027c0 + 800004cc: 800004bc .word 0x800004bc + 800004d0: 00000000 .word 0x00000000 + 800004d4: 80008d6e .word 0x80008d6e + 800004d8: 00000000 .word 0x00000000 + 800004dc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x24cfdb392e2cdafe + 800004e0: 00033d03 ld x26,0(x6) + 800004e4: 00830313 addi x6,x6,8 + +00000000800004e8 : +Zknh_sha512sum0_cg_cp_rs1_b26: + sha512sum0 x8, x26 # perform operation + 800004e8: 104d1413 sha512sum0 x8,x26 + # Check if x8 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x8, Zknh_sha512sum0_cg_cp_rs1_b26, Zknh_sha512sum0_cg_cp_rs1_b26_str) + 800004ec: 000ab203 ld x4,0(x21) + 800004f0: 00820c63 beq x4,x8,80000508 + 800004f4: 2cc022ef jal x5,800027c0 + 800004f8: 800004e8 .word 0x800004e8 + 800004fc: 00000000 .word 0x00000000 + 80000500: 80008da7 .word 0x80008da7 + 80000504: 00000000 .word 0x00000000 + 80000508: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x71d14793188d8f6d + 8000050c: 00033d83 ld x27,0(x6) + 80000510: 00830313 addi x6,x6,8 + +0000000080000514 : +Zknh_sha512sum0_cg_cp_rs1_b27: + sha512sum0 x19, x27 # perform operation + 80000514: 104d9993 sha512sum0 x19,x27 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sum0_cg_cp_rs1_b27, Zknh_sha512sum0_cg_cp_rs1_b27_str) + 80000518: 000ab203 ld x4,0(x21) + 8000051c: 01320c63 beq x4,x19,80000534 + 80000520: 2a0022ef jal x5,800027c0 + 80000524: 80000514 .word 0x80000514 + 80000528: 00000000 .word 0x00000000 + 8000052c: 80008de0 .word 0x80008de0 + 80000530: 00000000 .word 0x00000000 + 80000534: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x06ed1ce9484a5d01 + 80000538: 00033e03 ld x28,0(x6) + 8000053c: 00830313 addi x6,x6,8 + +0000000080000540 : +Zknh_sha512sum0_cg_cp_rs1_b28: + sha512sum0 x22, x28 # perform operation + 80000540: 104e1b13 sha512sum0 x22,x28 + # Check if x22 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x22, Zknh_sha512sum0_cg_cp_rs1_b28, Zknh_sha512sum0_cg_cp_rs1_b28_str) + 80000544: 000ab203 ld x4,0(x21) + 80000548: 01620c63 beq x4,x22,80000560 + 8000054c: 274022ef jal x5,800027c0 + 80000550: 80000540 .word 0x80000540 + 80000554: 00000000 .word 0x00000000 + 80000558: 80008e19 .word 0x80008e19 + 8000055c: 00000000 .word 0x00000000 + 80000560: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xe3c559174e42aa5c + 80000564: 00033e83 ld x29,0(x6) + 80000568: 00830313 addi x6,x6,8 + +000000008000056c : +Zknh_sha512sum0_cg_cp_rs1_b29: + sha512sum0 x19, x29 # perform operation + 8000056c: 104e9993 sha512sum0 x19,x29 + # Check if x19 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x19, Zknh_sha512sum0_cg_cp_rs1_b29, Zknh_sha512sum0_cg_cp_rs1_b29_str) + 80000570: 000ab203 ld x4,0(x21) + 80000574: 01320c63 beq x4,x19,8000058c + 80000578: 248022ef jal x5,800027c0 + 8000057c: 8000056c .word 0x8000056c + 80000580: 00000000 .word 0x00000000 + 80000584: 80008e52 .word 0x80008e52 + 80000588: 00000000 .word 0x00000000 + 8000058c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x4a918d5baf149921 + 80000590: 00033f03 ld x30,0(x6) + 80000594: 00830313 addi x6,x6,8 + +0000000080000598 : +Zknh_sha512sum0_cg_cp_rs1_b30: + sha512sum0 x16, x30 # perform operation + 80000598: 104f1813 sha512sum0 x16,x30 + # Check if x16 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x16, Zknh_sha512sum0_cg_cp_rs1_b30, Zknh_sha512sum0_cg_cp_rs1_b30_str) + 8000059c: 000ab203 ld x4,0(x21) + 800005a0: 01020c63 beq x4,x16,800005b8 + 800005a4: 21c022ef jal x5,800027c0 + 800005a8: 80000598 .word 0x80000598 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 80008e8b .word 0x80008e8b + 800005b4: 00000000 .word 0x00000000 + 800005b8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8d8a24dddc167bd0 + 800005bc: 00033f83 ld x31,0(x6) + 800005c0: 00830313 addi x6,x6,8 + +00000000800005c4 : +Zknh_sha512sum0_cg_cp_rs1_b31: + sha512sum0 x30, x31 # perform operation + 800005c4: 104f9f13 sha512sum0 x30,x31 + # Check if x30 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x30, Zknh_sha512sum0_cg_cp_rs1_b31, Zknh_sha512sum0_cg_cp_rs1_b31_str) + 800005c8: 000ab203 ld x4,0(x21) + 800005cc: 01e20c63 beq x4,x30,800005e4 + 800005d0: 1f0022ef jal x5,800027c0 + 800005d4: 800005c4 .word 0x800005c4 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 80008ec4 .word 0x80008ec4 + 800005e0: 00000000 .word 0x00000000 + 800005e4: 008a8a93 addi x21,x21,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x46250b1632293532 + 800005e8: 00033e83 ld x29,0(x6) + 800005ec: 00830313 addi x6,x6,8 + +00000000800005f0 : +Zknh_sha512sum0_cg_cp_rd_b0: + sha512sum0 x0, x29 # perform operation + 800005f0: 104e9013 sha512sum0 x0,x29 + # Check if x0 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x0, Zknh_sha512sum0_cg_cp_rd_b0, Zknh_sha512sum0_cg_cp_rd_b0_str) + 800005f4: 000ab203 ld x4,0(x21) + 800005f8: 00020c63 beq x4,x0,80000610 + 800005fc: 1c4022ef jal x5,800027c0 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80008efd .word 0x80008efd + 8000060c: 00000000 .word 0x00000000 + 80000610: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xe66c26602b322923 + 80000614: 00033183 ld x3,0(x6) + 80000618: 00830313 addi x6,x6,8 + +000000008000061c : +Zknh_sha512sum0_cg_cp_rd_b1: + sha512sum0 x1, x3 # perform operation + 8000061c: 10419093 sha512sum0 x1,x3 + # Check if x1 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x1, Zknh_sha512sum0_cg_cp_rd_b1, Zknh_sha512sum0_cg_cp_rd_b1_str) + 80000620: 000ab203 ld x4,0(x21) + 80000624: 00120c63 beq x4,x1,8000063c + 80000628: 198022ef jal x5,800027c0 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008f34 .word 0x80008f34 + 80000638: 00000000 .word 0x00000000 + 8000063c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xeb368f2302c01ade + 80000640: 00033983 ld x19,0(x6) + 80000644: 00830313 addi x6,x6,8 + +0000000080000648 : +Zknh_sha512sum0_cg_cp_rd_b2: + sha512sum0 x2, x19 # perform operation + 80000648: 10499113 sha512sum0 x2,x19 + # Check if x2 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x2, Zknh_sha512sum0_cg_cp_rd_b2, Zknh_sha512sum0_cg_cp_rd_b2_str) + 8000064c: 000ab203 ld x4,0(x21) + 80000650: 00220c63 beq x4,x2,80000668 + 80000654: 16c022ef jal x5,800027c0 + 80000658: 80000648 .word 0x80000648 + 8000065c: 00000000 .word 0x00000000 + 80000660: 80008f6b .word 0x80008f6b + 80000664: 00000000 .word 0x00000000 + 80000668: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x383dac1313ed644c + 8000066c: 00033783 ld x15,0(x6) + 80000670: 00830313 addi x6,x6,8 + +0000000080000674 : +Zknh_sha512sum0_cg_cp_rd_b3: + sha512sum0 x3, x15 # perform operation + 80000674: 10479193 sha512sum0 x3,x15 + # Check if x3 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x3, Zknh_sha512sum0_cg_cp_rd_b3, Zknh_sha512sum0_cg_cp_rd_b3_str) + 80000678: 000ab203 ld x4,0(x21) + 8000067c: 00320c63 beq x4,x3,80000694 + 80000680: 140022ef jal x5,800027c0 + 80000684: 80000674 .word 0x80000674 + 80000688: 00000000 .word 0x00000000 + 8000068c: 80008fa2 .word 0x80008fa2 + 80000690: 00000000 .word 0x00000000 + 80000694: 008a8a93 addi x21,x21,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000698: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000069c: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x4306a5e2b87f7acc + 800006a0: 00033483 ld x9,0(x6) + 800006a4: 00830313 addi x6,x6,8 + +00000000800006a8 : +Zknh_sha512sum0_cg_cp_rd_b4: + sha512sum0 x4, x9 # perform operation + 800006a8: 10449213 sha512sum0 x4,x9 + # Check if x4 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x4, Zknh_sha512sum0_cg_cp_rd_b4, Zknh_sha512sum0_cg_cp_rd_b4_str) + 800006ac: 000ab383 ld x7,0(x21) + 800006b0: 00438c63 beq x7,x4,800006c8 + 800006b4: 1240246f jal x8,800027d8 + 800006b8: 800006a8 .word 0x800006a8 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 80008fd9 .word 0x80008fd9 + 800006c4: 00000000 .word 0x00000000 + 800006c8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xfba7f084cbcf3e69 + 800006cc: 00033803 ld x16,0(x6) + 800006d0: 00830313 addi x6,x6,8 + +00000000800006d4 : +Zknh_sha512sum0_cg_cp_rd_b5: + sha512sum0 x5, x16 # perform operation + 800006d4: 10481293 sha512sum0 x5,x16 + # Check if x5 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x5, Zknh_sha512sum0_cg_cp_rd_b5, Zknh_sha512sum0_cg_cp_rd_b5_str) + 800006d8: 000ab383 ld x7,0(x21) + 800006dc: 00538c63 beq x7,x5,800006f4 + 800006e0: 0f80246f jal x8,800027d8 + 800006e4: 800006d4 .word 0x800006d4 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 80009010 .word 0x80009010 + 800006f0: 00000000 .word 0x00000000 + 800006f4: 008a8a93 addi x21,x21,8 + + mv x15, x6 # switch data pointer register to avoid conflict with test + 800006f8: 00030793 addi x15,x6,0 +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x6900f93a6d5055ae + 800006fc: 0007b203 ld x4,0(x15) + 80000700: 00878793 addi x15,x15,8 + +0000000080000704 : +Zknh_sha512sum0_cg_cp_rd_b6: + sha512sum0 x6, x4 # perform operation + 80000704: 10421313 sha512sum0 x6,x4 + # Check if x6 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x6, Zknh_sha512sum0_cg_cp_rd_b6, Zknh_sha512sum0_cg_cp_rd_b6_str) + 80000708: 000ab383 ld x7,0(x21) + 8000070c: 00638c63 beq x7,x6,80000724 + 80000710: 0c80246f jal x8,800027d8 + 80000714: 80000704 .word 0x80000704 + 80000718: 00000000 .word 0x00000000 + 8000071c: 80009047 .word 0x80009047 + 80000720: 00000000 .word 0x00000000 + 80000724: 008a8a93 addi x21,x21,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000728: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 8000072c: 00040713 addi x14,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x62e7cce56151f363 + 80000730: 0007bd83 ld x27,0(x15) + 80000734: 00878793 addi x15,x15,8 + +0000000080000738 : +Zknh_sha512sum0_cg_cp_rd_b7: + sha512sum0 x7, x27 # perform operation + 80000738: 104d9393 sha512sum0 x7,x27 + # Check if x7 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x7, Zknh_sha512sum0_cg_cp_rd_b7, Zknh_sha512sum0_cg_cp_rd_b7_str) + 8000073c: 000ab683 ld x13,0(x21) + 80000740: 00768c63 beq x13,x7,80000758 + 80000744: 0bc0276f jal x14,80002800 + 80000748: 80000738 .word 0x80000738 + 8000074c: 00000000 .word 0x00000000 + 80000750: 8000907e .word 0x8000907e + 80000754: 00000000 .word 0x00000000 + 80000758: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xccc086aa805ee562 + 8000075c: 0007b383 ld x7,0(x15) + 80000760: 00878793 addi x15,x15,8 + +0000000080000764 : +Zknh_sha512sum0_cg_cp_rd_b8: + sha512sum0 x8, x7 # perform operation + 80000764: 10439413 sha512sum0 x8,x7 + # Check if x8 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x8, Zknh_sha512sum0_cg_cp_rd_b8, Zknh_sha512sum0_cg_cp_rd_b8_str) + 80000768: 000ab683 ld x13,0(x21) + 8000076c: 00868c63 beq x13,x8,80000784 + 80000770: 0900276f jal x14,80002800 + 80000774: 80000764 .word 0x80000764 + 80000778: 00000000 .word 0x00000000 + 8000077c: 800090b5 .word 0x800090b5 + 80000780: 00000000 .word 0x00000000 + 80000784: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xe2278e04712dacc6 + 80000788: 0007b603 ld x12,0(x15) + 8000078c: 00878793 addi x15,x15,8 + +0000000080000790 : +Zknh_sha512sum0_cg_cp_rd_b9: + sha512sum0 x9, x12 # perform operation + 80000790: 10461493 sha512sum0 x9,x12 + # Check if x9 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x9, Zknh_sha512sum0_cg_cp_rd_b9, Zknh_sha512sum0_cg_cp_rd_b9_str) + 80000794: 000ab683 ld x13,0(x21) + 80000798: 00968c63 beq x13,x9,800007b0 + 8000079c: 0640276f jal x14,80002800 + 800007a0: 80000790 .word 0x80000790 + 800007a4: 00000000 .word 0x00000000 + 800007a8: 800090ec .word 0x800090ec + 800007ac: 00000000 .word 0x00000000 + 800007b0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x167d6b27a6c52ff6 + 800007b4: 0007b103 ld x2,0(x15) + 800007b8: 00878793 addi x15,x15,8 + +00000000800007bc : +Zknh_sha512sum0_cg_cp_rd_b10: + sha512sum0 x10, x2 # perform operation + 800007bc: 10411513 sha512sum0 x10,x2 + # Check if x10 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x10, Zknh_sha512sum0_cg_cp_rd_b10, Zknh_sha512sum0_cg_cp_rd_b10_str) + 800007c0: 000ab683 ld x13,0(x21) + 800007c4: 00a68c63 beq x13,x10,800007dc + 800007c8: 0380276f jal x14,80002800 + 800007cc: 800007bc .word 0x800007bc + 800007d0: 00000000 .word 0x00000000 + 800007d4: 80009123 .word 0x80009123 + 800007d8: 00000000 .word 0x00000000 + 800007dc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x01bf56ca53b40d99 + 800007e0: 0007be03 ld x28,0(x15) + 800007e4: 00878793 addi x15,x15,8 + +00000000800007e8 : +Zknh_sha512sum0_cg_cp_rd_b11: + sha512sum0 x11, x28 # perform operation + 800007e8: 104e1593 sha512sum0 x11,x28 + # Check if x11 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x11, Zknh_sha512sum0_cg_cp_rd_b11, Zknh_sha512sum0_cg_cp_rd_b11_str) + 800007ec: 000ab683 ld x13,0(x21) + 800007f0: 00b68c63 beq x13,x11,80000808 + 800007f4: 00c0276f jal x14,80002800 + 800007f8: 800007e8 .word 0x800007e8 + 800007fc: 00000000 .word 0x00000000 + 80000800: 8000915b .word 0x8000915b + 80000804: 00000000 .word 0x00000000 + 80000808: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xb09f6b30b18c0934 + 8000080c: 0007b283 ld x5,0(x15) + 80000810: 00878793 addi x15,x15,8 + +0000000080000814 : +Zknh_sha512sum0_cg_cp_rd_b12: + sha512sum0 x12, x5 # perform operation + 80000814: 10429613 sha512sum0 x12,x5 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zknh_sha512sum0_cg_cp_rd_b12, Zknh_sha512sum0_cg_cp_rd_b12_str) + 80000818: 000ab683 ld x13,0(x21) + 8000081c: 00c68c63 beq x13,x12,80000834 + 80000820: 7e10176f jal x14,80002800 + 80000824: 80000814 .word 0x80000814 + 80000828: 00000000 .word 0x00000000 + 8000082c: 80009193 .word 0x80009193 + 80000830: 00000000 .word 0x00000000 + 80000834: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80000838: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000083c: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xbce0d5c1e1313135 + 80000840: 0007b083 ld x1,0(x15) + 80000844: 00878793 addi x15,x15,8 + +0000000080000848 : +Zknh_sha512sum0_cg_cp_rd_b13: + sha512sum0 x13, x1 # perform operation + 80000848: 10409693 sha512sum0 x13,x1 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zknh_sha512sum0_cg_cp_rd_b13, Zknh_sha512sum0_cg_cp_rd_b13_str) + 8000084c: 000ab383 ld x7,0(x21) + 80000850: 00d38c63 beq x7,x13,80000868 + 80000854: 7850146f jal x8,800027d8 + 80000858: 80000848 .word 0x80000848 + 8000085c: 00000000 .word 0x00000000 + 80000860: 800091cb .word 0x800091cb + 80000864: 00000000 .word 0x00000000 + 80000868: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xe9a843c20ac43f22 + 8000086c: 0007ba03 ld x20,0(x15) + 80000870: 00878793 addi x15,x15,8 + +0000000080000874 : +Zknh_sha512sum0_cg_cp_rd_b14: + sha512sum0 x14, x20 # perform operation + 80000874: 104a1713 sha512sum0 x14,x20 + # Check if x14 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x14, Zknh_sha512sum0_cg_cp_rd_b14, Zknh_sha512sum0_cg_cp_rd_b14_str) + 80000878: 000ab383 ld x7,0(x21) + 8000087c: 00e38c63 beq x7,x14,80000894 + 80000880: 7590146f jal x8,800027d8 + 80000884: 80000874 .word 0x80000874 + 80000888: 00000000 .word 0x00000000 + 8000088c: 80009203 .word 0x80009203 + 80000890: 00000000 .word 0x00000000 + 80000894: 008a8a93 addi x21,x21,8 + + mv x12, x15 # switch data pointer register to avoid conflict with test + 80000898: 00078613 addi x12,x15,0 +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x4b9b14018482e223 + 8000089c: 00063503 ld x10,0(x12) + 800008a0: 00860613 addi x12,x12,8 + +00000000800008a4 : +Zknh_sha512sum0_cg_cp_rd_b15: + sha512sum0 x15, x10 # perform operation + 800008a4: 10451793 sha512sum0 x15,x10 + # Check if x15 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x15, Zknh_sha512sum0_cg_cp_rd_b15, Zknh_sha512sum0_cg_cp_rd_b15_str) + 800008a8: 000ab383 ld x7,0(x21) + 800008ac: 00f38c63 beq x7,x15,800008c4 + 800008b0: 7290146f jal x8,800027d8 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 8000923b .word 0x8000923b + 800008c0: 00000000 .word 0x00000000 + 800008c4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0x8cd07c989fe6eff5 + 800008c8: 00063c03 ld x24,0(x12) + 800008cc: 00860613 addi x12,x12,8 + +00000000800008d0 : +Zknh_sha512sum0_cg_cp_rd_b16: + sha512sum0 x16, x24 # perform operation + 800008d0: 104c1813 sha512sum0 x16,x24 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zknh_sha512sum0_cg_cp_rd_b16, Zknh_sha512sum0_cg_cp_rd_b16_str) + 800008d4: 000ab383 ld x7,0(x21) + 800008d8: 01038c63 beq x7,x16,800008f0 + 800008dc: 6fd0146f jal x8,800027d8 + 800008e0: 800008d0 .word 0x800008d0 + 800008e4: 00000000 .word 0x00000000 + 800008e8: 80009273 .word 0x80009273 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x12, x15) # load rs1: x15 = 0x91639d041eca4587 + 800008f4: 00063783 ld x15,0(x12) + 800008f8: 00860613 addi x12,x12,8 + +00000000800008fc : +Zknh_sha512sum0_cg_cp_rd_b17: + sha512sum0 x17, x15 # perform operation + 800008fc: 10479893 sha512sum0 x17,x15 + # Check if x17 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x17, Zknh_sha512sum0_cg_cp_rd_b17, Zknh_sha512sum0_cg_cp_rd_b17_str) + 80000900: 000ab383 ld x7,0(x21) + 80000904: 01138c63 beq x7,x17,8000091c + 80000908: 6d10146f jal x8,800027d8 + 8000090c: 800008fc .word 0x800008fc + 80000910: 00000000 .word 0x00000000 + 80000914: 800092ab .word 0x800092ab + 80000918: 00000000 .word 0x00000000 + 8000091c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x9a00e642b2edbb3a + 80000920: 00063003 ld x0,0(x12) + 80000924: 00860613 addi x12,x12,8 + +0000000080000928 : +Zknh_sha512sum0_cg_cp_rd_b18: + sha512sum0 x18, x0 # perform operation + 80000928: 10401913 sha512sum0 x18,x0 + # Check if x18 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x18, Zknh_sha512sum0_cg_cp_rd_b18, Zknh_sha512sum0_cg_cp_rd_b18_str) + 8000092c: 000ab383 ld x7,0(x21) + 80000930: 01238c63 beq x7,x18,80000948 + 80000934: 6a50146f jal x8,800027d8 + 80000938: 80000928 .word 0x80000928 + 8000093c: 00000000 .word 0x00000000 + 80000940: 800092e3 .word 0x800092e3 + 80000944: 00000000 .word 0x00000000 + 80000948: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x21dd26d127b2245f + 8000094c: 00063203 ld x4,0(x12) + 80000950: 00860613 addi x12,x12,8 + +0000000080000954 : +Zknh_sha512sum0_cg_cp_rd_b19: + sha512sum0 x19, x4 # perform operation + 80000954: 10421993 sha512sum0 x19,x4 + # Check if x19 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x19, Zknh_sha512sum0_cg_cp_rd_b19, Zknh_sha512sum0_cg_cp_rd_b19_str) + 80000958: 000ab383 ld x7,0(x21) + 8000095c: 01338c63 beq x7,x19,80000974 + 80000960: 6790146f jal x8,800027d8 + 80000964: 80000954 .word 0x80000954 + 80000968: 00000000 .word 0x00000000 + 8000096c: 8000931b .word 0x8000931b + 80000970: 00000000 .word 0x00000000 + 80000974: 008a8a93 addi x21,x21,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x517aa2c73c4d961c + 80000978: 00063203 ld x4,0(x12) + 8000097c: 00860613 addi x12,x12,8 + +0000000080000980 : +Zknh_sha512sum0_cg_cp_rd_b20: + sha512sum0 x20, x4 # perform operation + 80000980: 10421a13 sha512sum0 x20,x4 + # Check if x20 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x20, Zknh_sha512sum0_cg_cp_rd_b20, Zknh_sha512sum0_cg_cp_rd_b20_str) + 80000984: 000ab383 ld x7,0(x21) + 80000988: 01438c63 beq x7,x20,800009a0 + 8000098c: 64d0146f jal x8,800027d8 + 80000990: 80000980 .word 0x80000980 + 80000994: 00000000 .word 0x00000000 + 80000998: 80009353 .word 0x80009353 + 8000099c: 00000000 .word 0x00000000 + 800009a0: 008a8a93 addi x21,x21,8 + + mv x20, x21 # switch signature pointer register to avoid conflict with test + 800009a4: 000a8a13 addi x20,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x12, x18) # load rs1: x18 = 0xf7b7baad55bbef21 + 800009a8: 00063903 ld x18,0(x12) + 800009ac: 00860613 addi x12,x12,8 + +00000000800009b0 : +Zknh_sha512sum0_cg_cp_rd_b21: + sha512sum0 x21, x18 # perform operation + 800009b0: 10491a93 sha512sum0 x21,x18 + # Check if x21 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x21, Zknh_sha512sum0_cg_cp_rd_b21, Zknh_sha512sum0_cg_cp_rd_b21_str) + 800009b4: 000a3383 ld x7,0(x20) + 800009b8: 01538c63 beq x7,x21,800009d0 + 800009bc: 61d0146f jal x8,800027d8 + 800009c0: 800009b0 .word 0x800009b0 + 800009c4: 00000000 .word 0x00000000 + 800009c8: 8000938b .word 0x8000938b + 800009cc: 00000000 .word 0x00000000 + 800009d0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x9a1080022e811398 + 800009d4: 00063503 ld x10,0(x12) + 800009d8: 00860613 addi x12,x12,8 + +00000000800009dc : +Zknh_sha512sum0_cg_cp_rd_b22: + sha512sum0 x22, x10 # perform operation + 800009dc: 10451b13 sha512sum0 x22,x10 + # Check if x22 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x22, Zknh_sha512sum0_cg_cp_rd_b22, Zknh_sha512sum0_cg_cp_rd_b22_str) + 800009e0: 000a3383 ld x7,0(x20) + 800009e4: 01638c63 beq x7,x22,800009fc + 800009e8: 5f10146f jal x8,800027d8 + 800009ec: 800009dc .word 0x800009dc + 800009f0: 00000000 .word 0x00000000 + 800009f4: 800093c3 .word 0x800093c3 + 800009f8: 00000000 .word 0x00000000 + 800009fc: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x2ffb4b6033fb6117 + 80000a00: 00063203 ld x4,0(x12) + 80000a04: 00860613 addi x12,x12,8 + +0000000080000a08 : +Zknh_sha512sum0_cg_cp_rd_b23: + sha512sum0 x23, x4 # perform operation + 80000a08: 10421b93 sha512sum0 x23,x4 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zknh_sha512sum0_cg_cp_rd_b23, Zknh_sha512sum0_cg_cp_rd_b23_str) + 80000a0c: 000a3383 ld x7,0(x20) + 80000a10: 01738c63 beq x7,x23,80000a28 + 80000a14: 5c50146f jal x8,800027d8 + 80000a18: 80000a08 .word 0x80000a08 + 80000a1c: 00000000 .word 0x00000000 + 80000a20: 800093fb .word 0x800093fb + 80000a24: 00000000 .word 0x00000000 + 80000a28: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x4f2309e20e0a63e9 + 80000a2c: 00063d83 ld x27,0(x12) + 80000a30: 00860613 addi x12,x12,8 + +0000000080000a34 : +Zknh_sha512sum0_cg_cp_rd_b24: + sha512sum0 x24, x27 # perform operation + 80000a34: 104d9c13 sha512sum0 x24,x27 + # Check if x24 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x24, Zknh_sha512sum0_cg_cp_rd_b24, Zknh_sha512sum0_cg_cp_rd_b24_str) + 80000a38: 000a3383 ld x7,0(x20) + 80000a3c: 01838c63 beq x7,x24,80000a54 + 80000a40: 5990146f jal x8,800027d8 + 80000a44: 80000a34 .word 0x80000a34 + 80000a48: 00000000 .word 0x00000000 + 80000a4c: 80009433 .word 0x80009433 + 80000a50: 00000000 .word 0x00000000 + 80000a54: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0x1d743b8ee72a66c9 + 80000a58: 00063303 ld x6,0(x12) + 80000a5c: 00860613 addi x12,x12,8 + +0000000080000a60 : +Zknh_sha512sum0_cg_cp_rd_b25: + sha512sum0 x25, x6 # perform operation + 80000a60: 10431c93 sha512sum0 x25,x6 + # Check if x25 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x25, Zknh_sha512sum0_cg_cp_rd_b25, Zknh_sha512sum0_cg_cp_rd_b25_str) + 80000a64: 000a3383 ld x7,0(x20) + 80000a68: 01938c63 beq x7,x25,80000a80 + 80000a6c: 56d0146f jal x8,800027d8 + 80000a70: 80000a60 .word 0x80000a60 + 80000a74: 00000000 .word 0x00000000 + 80000a78: 8000946b .word 0x8000946b + 80000a7c: 00000000 .word 0x00000000 + 80000a80: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xeb51e4b6be0889de + 80000a84: 00063b83 ld x23,0(x12) + 80000a88: 00860613 addi x12,x12,8 + +0000000080000a8c : +Zknh_sha512sum0_cg_cp_rd_b26: + sha512sum0 x26, x23 # perform operation + 80000a8c: 104b9d13 sha512sum0 x26,x23 + # Check if x26 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x26, Zknh_sha512sum0_cg_cp_rd_b26, Zknh_sha512sum0_cg_cp_rd_b26_str) + 80000a90: 000a3383 ld x7,0(x20) + 80000a94: 01a38c63 beq x7,x26,80000aac + 80000a98: 5410146f jal x8,800027d8 + 80000a9c: 80000a8c .word 0x80000a8c + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 800094a3 .word 0x800094a3 + 80000aa8: 00000000 .word 0x00000000 + 80000aac: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x69de9bd119ba3da5 + 80000ab0: 00063b83 ld x23,0(x12) + 80000ab4: 00860613 addi x12,x12,8 + +0000000080000ab8 : +Zknh_sha512sum0_cg_cp_rd_b27: + sha512sum0 x27, x23 # perform operation + 80000ab8: 104b9d93 sha512sum0 x27,x23 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zknh_sha512sum0_cg_cp_rd_b27, Zknh_sha512sum0_cg_cp_rd_b27_str) + 80000abc: 000a3383 ld x7,0(x20) + 80000ac0: 01b38c63 beq x7,x27,80000ad8 + 80000ac4: 5150146f jal x8,800027d8 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 800094db .word 0x800094db + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x31265cc92fc61df2 + 80000adc: 00063703 ld x14,0(x12) + 80000ae0: 00860613 addi x12,x12,8 + +0000000080000ae4 : +Zknh_sha512sum0_cg_cp_rd_b28: + sha512sum0 x28, x14 # perform operation + 80000ae4: 10471e13 sha512sum0 x28,x14 + # Check if x28 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x28, Zknh_sha512sum0_cg_cp_rd_b28, Zknh_sha512sum0_cg_cp_rd_b28_str) + 80000ae8: 000a3383 ld x7,0(x20) + 80000aec: 01c38c63 beq x7,x28,80000b04 + 80000af0: 4e90146f jal x8,800027d8 + 80000af4: 80000ae4 .word 0x80000ae4 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 80009513 .word 0x80009513 + 80000b00: 00000000 .word 0x00000000 + 80000b04: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0x2be421338421a895 + 80000b08: 00063703 ld x14,0(x12) + 80000b0c: 00860613 addi x12,x12,8 + +0000000080000b10 : +Zknh_sha512sum0_cg_cp_rd_b29: + sha512sum0 x29, x14 # perform operation + 80000b10: 10471e93 sha512sum0 x29,x14 + # Check if x29 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x29, Zknh_sha512sum0_cg_cp_rd_b29, Zknh_sha512sum0_cg_cp_rd_b29_str) + 80000b14: 000a3383 ld x7,0(x20) + 80000b18: 01d38c63 beq x7,x29,80000b30 + 80000b1c: 4bd0146f jal x8,800027d8 + 80000b20: 80000b10 .word 0x80000b10 + 80000b24: 00000000 .word 0x00000000 + 80000b28: 8000954b .word 0x8000954b + 80000b2c: 00000000 .word 0x00000000 + 80000b30: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x13) # load rs1: x13 = 0xd4a0172f7f201242 + 80000b34: 00063683 ld x13,0(x12) + 80000b38: 00860613 addi x12,x12,8 + +0000000080000b3c : +Zknh_sha512sum0_cg_cp_rd_b30: + sha512sum0 x30, x13 # perform operation + 80000b3c: 10469f13 sha512sum0 x30,x13 + # Check if x30 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x30, Zknh_sha512sum0_cg_cp_rd_b30, Zknh_sha512sum0_cg_cp_rd_b30_str) + 80000b40: 000a3383 ld x7,0(x20) + 80000b44: 01e38c63 beq x7,x30,80000b5c + 80000b48: 4910146f jal x8,800027d8 + 80000b4c: 80000b3c .word 0x80000b3c + 80000b50: 00000000 .word 0x00000000 + 80000b54: 80009583 .word 0x80009583 + 80000b58: 00000000 .word 0x00000000 + 80000b5c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0xa88fede87d3959ef + 80000b60: 00063283 ld x5,0(x12) + 80000b64: 00860613 addi x12,x12,8 + +0000000080000b68 : +Zknh_sha512sum0_cg_cp_rd_b31: + sha512sum0 x31, x5 # perform operation + 80000b68: 10429f93 sha512sum0 x31,x5 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zknh_sha512sum0_cg_cp_rd_b31, Zknh_sha512sum0_cg_cp_rd_b31_str) + 80000b6c: 000a3383 ld x7,0(x20) + 80000b70: 01f38c63 beq x7,x31,80000b88 + 80000b74: 4650146f jal x8,800027d8 + 80000b78: 80000b68 .word 0x80000b68 + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 800095bb .word 0x800095bb + 80000b84: 00000000 .word 0x00000000 + 80000b88: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x0000000000000000 + 80000b8c: 00063d03 ld x26,0(x12) + 80000b90: 00860613 addi x12,x12,8 + +0000000080000b94 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x0: + sha512sum0 x23, x26 # perform operation + 80000b94: 104d1b93 sha512sum0 x23,x26 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zknh_sha512sum0_cg_cp_rs1_edges_0x0, Zknh_sha512sum0_cg_cp_rs1_edges_0x0_str) + 80000b98: 000a3383 ld x7,0(x20) + 80000b9c: 01738c63 beq x7,x23,80000bb4 + 80000ba0: 4390146f jal x8,800027d8 + 80000ba4: 80000b94 .word 0x80000b94 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 800095f3 .word 0x800095f3 + 80000bb0: 00000000 .word 0x00000000 + 80000bb4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x12, x22) # load rs1: x22 = 0x0000000000000001 + 80000bb8: 00063b03 ld x22,0(x12) + 80000bbc: 00860613 addi x12,x12,8 + +0000000080000bc0 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x1: + sha512sum0 x31, x22 # perform operation + 80000bc0: 104b1f93 sha512sum0 x31,x22 + # Check if x31 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x31, Zknh_sha512sum0_cg_cp_rs1_edges_0x1, Zknh_sha512sum0_cg_cp_rs1_edges_0x1_str) + 80000bc4: 000a3383 ld x7,0(x20) + 80000bc8: 01f38c63 beq x7,x31,80000be0 + 80000bcc: 40d0146f jal x8,800027d8 + 80000bd0: 80000bc0 .word 0x80000bc0 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 80009632 .word 0x80009632 + 80000bdc: 00000000 .word 0x00000000 + 80000be0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0x0000000000000002 + 80000be4: 00063e83 ld x29,0(x12) + 80000be8: 00860613 addi x12,x12,8 + +0000000080000bec : +Zknh_sha512sum0_cg_cp_rs1_edges_0x2: + sha512sum0 x27, x29 # perform operation + 80000bec: 104e9d93 sha512sum0 x27,x29 + # Check if x27 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x27, Zknh_sha512sum0_cg_cp_rs1_edges_0x2, Zknh_sha512sum0_cg_cp_rs1_edges_0x2_str) + 80000bf0: 000a3383 ld x7,0(x20) + 80000bf4: 01b38c63 beq x7,x27,80000c0c + 80000bf8: 3e10146f jal x8,800027d8 + 80000bfc: 80000bec .word 0x80000bec + 80000c00: 00000000 .word 0x00000000 + 80000c04: 80009671 .word 0x80009671 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x8000000000000000 + 80000c10: 00063183 ld x3,0(x12) + 80000c14: 00860613 addi x12,x12,8 + +0000000080000c18 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000000: + sha512sum0 x10, x3 # perform operation + 80000c18: 10419513 sha512sum0 x10,x3 + # Check if x10 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x10, Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c1c: 000a3383 ld x7,0(x20) + 80000c20: 00a38c63 beq x7,x10,80000c38 + 80000c24: 3b50146f jal x8,800027d8 + 80000c28: 80000c18 .word 0x80000c18 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 800096b0 .word 0x800096b0 + 80000c34: 00000000 .word 0x00000000 + 80000c38: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x8000000000000001 + 80000c3c: 00063a83 ld x21,0(x12) + 80000c40: 00860613 addi x12,x12,8 + +0000000080000c44 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000001: + sha512sum0 x4, x21 # perform operation + 80000c44: 104a9213 sha512sum0 x4,x21 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha512sum0_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c48: 000a3383 ld x7,0(x20) + 80000c4c: 00438c63 beq x7,x4,80000c64 + 80000c50: 3890146f jal x8,800027d8 + 80000c54: 80000c44 .word 0x80000c44 + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 800096fe .word 0x800096fe + 80000c60: 00000000 .word 0x00000000 + 80000c64: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x21) # load rs1: x21 = 0x7fffffffffffffff + 80000c68: 00063a83 ld x21,0(x12) + 80000c6c: 00860613 addi x12,x12,8 + +0000000080000c70 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x7fffffffffffffff: + sha512sum0 x30, x21 # perform operation + 80000c70: 104a9f13 sha512sum0 x30,x21 + # Check if x30 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x30, Zknh_sha512sum0_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha512sum0_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c74: 000a3383 ld x7,0(x20) + 80000c78: 01e38c63 beq x7,x30,80000c90 + 80000c7c: 35d0146f jal x8,800027d8 + 80000c80: 80000c70 .word 0x80000c70 + 80000c84: 00000000 .word 0x00000000 + 80000c88: 8000974c .word 0x8000974c + 80000c8c: 00000000 .word 0x00000000 + 80000c90: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80000c94: 00063d83 ld x27,0(x12) + 80000c98: 00860613 addi x12,x12,8 + +0000000080000c9c : +Zknh_sha512sum0_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha512sum0 x14, x27 # perform operation + 80000c9c: 104d9713 sha512sum0 x14,x27 + # Check if x14 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x14, Zknh_sha512sum0_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha512sum0_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000ca0: 000a3383 ld x7,0(x20) + 80000ca4: 00e38c63 beq x7,x14,80000cbc + 80000ca8: 3310146f jal x8,800027d8 + 80000cac: 80000c9c .word 0x80000c9c + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 8000979a .word 0x8000979a + 80000cb8: 00000000 .word 0x00000000 + 80000cbc: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0xffffffffffffffff + 80000cc0: 00063203 ld x4,0(x12) + 80000cc4: 00860613 addi x12,x12,8 + +0000000080000cc8 : +Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffffffffffff: + sha512sum0 x15, x4 # perform operation + 80000cc8: 10421793 sha512sum0 x15,x4 + # Check if x15 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x15, Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000ccc: 000a3383 ld x7,0(x20) + 80000cd0: 00f38c63 beq x7,x15,80000ce8 + 80000cd4: 3050146f jal x8,800027d8 + 80000cd8: 80000cc8 .word 0x80000cc8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 800097e8 .word 0x800097e8 + 80000ce4: 00000000 .word 0x00000000 + 80000ce8: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xfffffffffffffffe + 80000cec: 00063b83 ld x23,0(x12) + 80000cf0: 00860613 addi x12,x12,8 + +0000000080000cf4 : +Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffffffffffe: + sha512sum0 x9, x23 # perform operation + 80000cf4: 104b9493 sha512sum0 x9,x23 + # Check if x9 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x9, Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf8: 000a3383 ld x7,0(x20) + 80000cfc: 00938c63 beq x7,x9,80000d14 + 80000d00: 2d90146f jal x8,800027d8 + 80000d04: 80000cf4 .word 0x80000cf4 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 80009836 .word 0x80009836 + 80000d10: 00000000 .word 0x00000000 + 80000d14: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80000d18: 00063b83 ld x23,0(x12) + 80000d1c: 00860613 addi x12,x12,8 + +0000000080000d20 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha512sum0 x25, x23 # perform operation + 80000d20: 104b9c93 sha512sum0 x25,x23 + # Check if x25 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x25, Zknh_sha512sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha512sum0_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d24: 000a3383 ld x7,0(x20) + 80000d28: 01938c63 beq x7,x25,80000d40 + 80000d2c: 2ad0146f jal x8,800027d8 + 80000d30: 80000d20 .word 0x80000d20 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 80009884 .word 0x80009884 + 80000d3c: 00000000 .word 0x00000000 + 80000d40: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80000d44: 00063f83 ld x31,0(x12) + 80000d48: 00860613 addi x12,x12,8 + +0000000080000d4c : +Zknh_sha512sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha512sum0 x23, x31 # perform operation + 80000d4c: 104f9b93 sha512sum0 x23,x31 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zknh_sha512sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha512sum0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d50: 000a3383 ld x7,0(x20) + 80000d54: 01738c63 beq x7,x23,80000d6c + 80000d58: 2810146f jal x8,800027d8 + 80000d5c: 80000d4c .word 0x80000d4c + 80000d60: 00000000 .word 0x00000000 + 80000d64: 800098d2 .word 0x800098d2 + 80000d68: 00000000 .word 0x00000000 + 80000d6c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x5555555555555555 + 80000d70: 00063483 ld x9,0(x12) + 80000d74: 00860613 addi x12,x12,8 + +0000000080000d78 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x5555555555555555: + sha512sum0 x6, x9 # perform operation + 80000d78: 10449313 sha512sum0 x6,x9 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zknh_sha512sum0_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha512sum0_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d7c: 000a3383 ld x7,0(x20) + 80000d80: 00638c63 beq x7,x6,80000d98 + 80000d84: 2550146f jal x8,800027d8 + 80000d88: 80000d78 .word 0x80000d78 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 80009920 .word 0x80009920 + 80000d94: 00000000 .word 0x00000000 + 80000d98: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x00000000ffffffff + 80000d9c: 00063103 ld x2,0(x12) + 80000da0: 00860613 addi x12,x12,8 + +0000000080000da4 : +Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffff: + sha512sum0 x4, x2 # perform operation + 80000da4: 10411213 sha512sum0 x4,x2 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sum0_cg_cp_rs1_edges_0xffffffff_str) + 80000da8: 000a3383 ld x7,0(x20) + 80000dac: 00438c63 beq x7,x4,80000dc4 + 80000db0: 2290146f jal x8,800027d8 + 80000db4: 80000da4 .word 0x80000da4 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 8000996e .word 0x8000996e + 80000dc0: 00000000 .word 0x00000000 + 80000dc4: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x00000000fffffffe + 80000dc8: 00063183 ld x3,0(x12) + 80000dcc: 00860613 addi x12,x12,8 + +0000000080000dd0 : +Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffe: + sha512sum0 x1, x3 # perform operation + 80000dd0: 10419093 sha512sum0 x1,x3 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sum0_cg_cp_rs1_edges_0xfffffffe_str) + 80000dd4: 000a3383 ld x7,0(x20) + 80000dd8: 00138c63 beq x7,x1,80000df0 + 80000ddc: 1fd0146f jal x8,800027d8 + 80000de0: 80000dd0 .word 0x80000dd0 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 800099b4 .word 0x800099b4 + 80000dec: 00000000 .word 0x00000000 + 80000df0: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x0000000100000000 + 80000df4: 00063183 ld x3,0(x12) + 80000df8: 00860613 addi x12,x12,8 + +0000000080000dfc : +Zknh_sha512sum0_cg_cp_rs1_edges_0x100000000: + sha512sum0 x23, x3 # perform operation + 80000dfc: 10419b93 sha512sum0 x23,x3 + # Check if x23 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x23, Zknh_sha512sum0_cg_cp_rs1_edges_0x100000000, Zknh_sha512sum0_cg_cp_rs1_edges_0x100000000_str) + 80000e00: 000a3383 ld x7,0(x20) + 80000e04: 01738c63 beq x7,x23,80000e1c + 80000e08: 1d10146f jal x8,800027d8 + 80000e0c: 80000dfc .word 0x80000dfc + 80000e10: 00000000 .word 0x00000000 + 80000e14: 800099fa .word 0x800099fa + 80000e18: 00000000 .word 0x00000000 + 80000e1c: 008a0a13 addi x20,x20,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x0000000100000001 + 80000e20: 00063d83 ld x27,0(x12) + 80000e24: 00860613 addi x12,x12,8 + +0000000080000e28 : +Zknh_sha512sum0_cg_cp_rs1_edges_0x100000001: + sha512sum0 x4, x27 # perform operation + 80000e28: 104d9213 sha512sum0 x4,x27 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha512sum0_cg_cp_rs1_edges_0x100000001, Zknh_sha512sum0_cg_cp_rs1_edges_0x100000001_str) + 80000e2c: 000a3383 ld x7,0(x20) + 80000e30: 00438c63 beq x7,x4,80000e48 + 80000e34: 1a50146f jal x8,800027d8 + 80000e38: 80000e28 .word 0x80000e28 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 80009a41 .word 0x80009a41 + 80000e44: 00000000 .word 0x00000000 + 80000e48: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x12, x0) # load rs1: x0 = 0x41b490c212ec6644 + 80000e4c: 00063003 ld x0,0(x12) + 80000e50: 00860613 addi x12,x12,8 + +0000000080000e54 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b0: + sha512sum0 x0, x0 # perform operation + 80000e54: 10401013 sha512sum0 x0,x0 + # Check if x0 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x0, Zknh_sha512sum0_cg_cmp_rd_rs1_b0, Zknh_sha512sum0_cg_cmp_rd_rs1_b0_str) + 80000e58: 000a3383 ld x7,0(x20) + 80000e5c: 00038c63 beq x7,x0,80000e74 + 80000e60: 1790146f jal x8,800027d8 + 80000e64: 80000e54 .word 0x80000e54 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 80009a88 .word 0x80009a88 + 80000e70: 00000000 .word 0x00000000 + 80000e74: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x12, x1) # load rs1: x1 = 0x05b00b7caf8766b7 + 80000e78: 00063083 ld x1,0(x12) + 80000e7c: 00860613 addi x12,x12,8 + +0000000080000e80 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b1: + sha512sum0 x1, x1 # perform operation + 80000e80: 10409093 sha512sum0 x1,x1 + # Check if x1 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x1, Zknh_sha512sum0_cg_cmp_rd_rs1_b1, Zknh_sha512sum0_cg_cmp_rd_rs1_b1_str) + 80000e84: 000a3383 ld x7,0(x20) + 80000e88: 00138c63 beq x7,x1,80000ea0 + 80000e8c: 14d0146f jal x8,800027d8 + 80000e90: 80000e80 .word 0x80000e80 + 80000e94: 00000000 .word 0x00000000 + 80000e98: 80009ac4 .word 0x80009ac4 + 80000e9c: 00000000 .word 0x00000000 + 80000ea0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x12, x2) # load rs1: x2 = 0x5542bdb0420e4e60 + 80000ea4: 00063103 ld x2,0(x12) + 80000ea8: 00860613 addi x12,x12,8 + +0000000080000eac : +Zknh_sha512sum0_cg_cmp_rd_rs1_b2: + sha512sum0 x2, x2 # perform operation + 80000eac: 10411113 sha512sum0 x2,x2 + # Check if x2 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x2, Zknh_sha512sum0_cg_cmp_rd_rs1_b2, Zknh_sha512sum0_cg_cmp_rd_rs1_b2_str) + 80000eb0: 000a3383 ld x7,0(x20) + 80000eb4: 00238c63 beq x7,x2,80000ecc + 80000eb8: 1210146f jal x8,800027d8 + 80000ebc: 80000eac .word 0x80000eac + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 80009b00 .word 0x80009b00 + 80000ec8: 00000000 .word 0x00000000 + 80000ecc: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x12, x3) # load rs1: x3 = 0x12e8e4c70a288196 + 80000ed0: 00063183 ld x3,0(x12) + 80000ed4: 00860613 addi x12,x12,8 + +0000000080000ed8 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b3: + sha512sum0 x3, x3 # perform operation + 80000ed8: 10419193 sha512sum0 x3,x3 + # Check if x3 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x3, Zknh_sha512sum0_cg_cmp_rd_rs1_b3, Zknh_sha512sum0_cg_cmp_rd_rs1_b3_str) + 80000edc: 000a3383 ld x7,0(x20) + 80000ee0: 00338c63 beq x7,x3,80000ef8 + 80000ee4: 0f50146f jal x8,800027d8 + 80000ee8: 80000ed8 .word 0x80000ed8 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 80009b3c .word 0x80009b3c + 80000ef4: 00000000 .word 0x00000000 + 80000ef8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x12, x4) # load rs1: x4 = 0x567d98998260d1c6 + 80000efc: 00063203 ld x4,0(x12) + 80000f00: 00860613 addi x12,x12,8 + +0000000080000f04 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b4: + sha512sum0 x4, x4 # perform operation + 80000f04: 10421213 sha512sum0 x4,x4 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zknh_sha512sum0_cg_cmp_rd_rs1_b4, Zknh_sha512sum0_cg_cmp_rd_rs1_b4_str) + 80000f08: 000a3383 ld x7,0(x20) + 80000f0c: 00438c63 beq x7,x4,80000f24 + 80000f10: 0c90146f jal x8,800027d8 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 80009b78 .word 0x80009b78 + 80000f20: 00000000 .word 0x00000000 + 80000f24: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x12, x5) # load rs1: x5 = 0x7979ddace363289e + 80000f28: 00063283 ld x5,0(x12) + 80000f2c: 00860613 addi x12,x12,8 + +0000000080000f30 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b5: + sha512sum0 x5, x5 # perform operation + 80000f30: 10429293 sha512sum0 x5,x5 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zknh_sha512sum0_cg_cmp_rd_rs1_b5, Zknh_sha512sum0_cg_cmp_rd_rs1_b5_str) + 80000f34: 000a3383 ld x7,0(x20) + 80000f38: 00538c63 beq x7,x5,80000f50 + 80000f3c: 09d0146f jal x8,800027d8 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009bb4 .word 0x80009bb4 + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xca49f2d376d07048 + 80000f54: 00063303 ld x6,0(x12) + 80000f58: 00860613 addi x12,x12,8 + +0000000080000f5c : +Zknh_sha512sum0_cg_cmp_rd_rs1_b6: + sha512sum0 x6, x6 # perform operation + 80000f5c: 10431313 sha512sum0 x6,x6 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zknh_sha512sum0_cg_cmp_rd_rs1_b6, Zknh_sha512sum0_cg_cmp_rd_rs1_b6_str) + 80000f60: 000a3383 ld x7,0(x20) + 80000f64: 00638c63 beq x7,x6,80000f7c + 80000f68: 0710146f jal x8,800027d8 + 80000f6c: 80000f5c .word 0x80000f5c + 80000f70: 00000000 .word 0x00000000 + 80000f74: 80009bf0 .word 0x80009bf0 + 80000f78: 00000000 .word 0x00000000 + 80000f7c: 008a0a13 addi x20,x20,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80000f80: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80000f84: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x12, x7) # load rs1: x7 = 0x47a9c3d389624205 + 80000f88: 00063383 ld x7,0(x12) + 80000f8c: 00860613 addi x12,x12,8 + +0000000080000f90 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b7: + sha512sum0 x7, x7 # perform operation + 80000f90: 10439393 sha512sum0 x7,x7 + # Check if x7 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x7, Zknh_sha512sum0_cg_cmp_rd_rs1_b7, Zknh_sha512sum0_cg_cmp_rd_rs1_b7_str) + 80000f94: 000a3683 ld x13,0(x20) + 80000f98: 00768c63 beq x13,x7,80000fb0 + 80000f9c: 0650176f jal x14,80002800 + 80000fa0: 80000f90 .word 0x80000f90 + 80000fa4: 00000000 .word 0x00000000 + 80000fa8: 80009c2c .word 0x80009c2c + 80000fac: 00000000 .word 0x00000000 + 80000fb0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x12, x8) # load rs1: x8 = 0xa4235cefcbd5e25e + 80000fb4: 00063403 ld x8,0(x12) + 80000fb8: 00860613 addi x12,x12,8 + +0000000080000fbc : +Zknh_sha512sum0_cg_cmp_rd_rs1_b8: + sha512sum0 x8, x8 # perform operation + 80000fbc: 10441413 sha512sum0 x8,x8 + # Check if x8 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x8, Zknh_sha512sum0_cg_cmp_rd_rs1_b8, Zknh_sha512sum0_cg_cmp_rd_rs1_b8_str) + 80000fc0: 000a3683 ld x13,0(x20) + 80000fc4: 00868c63 beq x13,x8,80000fdc + 80000fc8: 0390176f jal x14,80002800 + 80000fcc: 80000fbc .word 0x80000fbc + 80000fd0: 00000000 .word 0x00000000 + 80000fd4: 80009c68 .word 0x80009c68 + 80000fd8: 00000000 .word 0x00000000 + 80000fdc: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x12, x9) # load rs1: x9 = 0x964b5035fcc2fade + 80000fe0: 00063483 ld x9,0(x12) + 80000fe4: 00860613 addi x12,x12,8 + +0000000080000fe8 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b9: + sha512sum0 x9, x9 # perform operation + 80000fe8: 10449493 sha512sum0 x9,x9 + # Check if x9 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x9, Zknh_sha512sum0_cg_cmp_rd_rs1_b9, Zknh_sha512sum0_cg_cmp_rd_rs1_b9_str) + 80000fec: 000a3683 ld x13,0(x20) + 80000ff0: 00968c63 beq x13,x9,80001008 + 80000ff4: 00d0176f jal x14,80002800 + 80000ff8: 80000fe8 .word 0x80000fe8 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 80009ca4 .word 0x80009ca4 + 80001004: 00000000 .word 0x00000000 + 80001008: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x10) # load rs1: x10 = 0x50ab1905ae40679c + 8000100c: 00063503 ld x10,0(x12) + 80001010: 00860613 addi x12,x12,8 + +0000000080001014 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b10: + sha512sum0 x10, x10 # perform operation + 80001014: 10451513 sha512sum0 x10,x10 + # Check if x10 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x10, Zknh_sha512sum0_cg_cmp_rd_rs1_b10, Zknh_sha512sum0_cg_cmp_rd_rs1_b10_str) + 80001018: 000a3683 ld x13,0(x20) + 8000101c: 00a68c63 beq x13,x10,80001034 + 80001020: 7e00176f jal x14,80002800 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80009ce0 .word 0x80009ce0 + 80001030: 00000000 .word 0x00000000 + 80001034: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x11) # load rs1: x11 = 0x33709057cdb1d51d + 80001038: 00063583 ld x11,0(x12) + 8000103c: 00860613 addi x12,x12,8 + +0000000080001040 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b11: + sha512sum0 x11, x11 # perform operation + 80001040: 10459593 sha512sum0 x11,x11 + # Check if x11 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x11, Zknh_sha512sum0_cg_cmp_rd_rs1_b11, Zknh_sha512sum0_cg_cmp_rd_rs1_b11_str) + 80001044: 000a3683 ld x13,0(x20) + 80001048: 00b68c63 beq x13,x11,80001060 + 8000104c: 7b40176f jal x14,80002800 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009d1d .word 0x80009d1d + 8000105c: 00000000 .word 0x00000000 + 80001060: 008a0a13 addi x20,x20,8 + + mv x6, x12 # switch data pointer register to avoid conflict with test + 80001064: 00060313 addi x6,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x35c53111a6a3d349 + 80001068: 00033603 ld x12,0(x6) + 8000106c: 00830313 addi x6,x6,8 + +0000000080001070 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b12: + sha512sum0 x12, x12 # perform operation + 80001070: 10461613 sha512sum0 x12,x12 + # Check if x12 contains the expected result. x20 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x20, x14, x13, x12, Zknh_sha512sum0_cg_cmp_rd_rs1_b12, Zknh_sha512sum0_cg_cmp_rd_rs1_b12_str) + 80001074: 000a3683 ld x13,0(x20) + 80001078: 00c68c63 beq x13,x12,80001090 + 8000107c: 7840176f jal x14,80002800 + 80001080: 80001070 .word 0x80001070 + 80001084: 00000000 .word 0x00000000 + 80001088: 80009d5a .word 0x80009d5a + 8000108c: 00000000 .word 0x00000000 + 80001090: 008a0a13 addi x20,x20,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001094: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001098: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x63f5e3f19356c952 + 8000109c: 00033683 ld x13,0(x6) + 800010a0: 00830313 addi x6,x6,8 + +00000000800010a4 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b13: + sha512sum0 x13, x13 # perform operation + 800010a4: 10469693 sha512sum0 x13,x13 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zknh_sha512sum0_cg_cmp_rd_rs1_b13, Zknh_sha512sum0_cg_cmp_rd_rs1_b13_str) + 800010a8: 000a3203 ld x4,0(x20) + 800010ac: 00d20c63 beq x4,x13,800010c4 + 800010b0: 710012ef jal x5,800027c0 + 800010b4: 800010a4 .word 0x800010a4 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 80009d97 .word 0x80009d97 + 800010c0: 00000000 .word 0x00000000 + 800010c4: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xedef59bc58f0a2f0 + 800010c8: 00033703 ld x14,0(x6) + 800010cc: 00830313 addi x6,x6,8 + +00000000800010d0 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b14: + sha512sum0 x14, x14 # perform operation + 800010d0: 10471713 sha512sum0 x14,x14 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zknh_sha512sum0_cg_cmp_rd_rs1_b14, Zknh_sha512sum0_cg_cmp_rd_rs1_b14_str) + 800010d4: 000a3203 ld x4,0(x20) + 800010d8: 00e20c63 beq x4,x14,800010f0 + 800010dc: 6e4012ef jal x5,800027c0 + 800010e0: 800010d0 .word 0x800010d0 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 80009dd4 .word 0x80009dd4 + 800010ec: 00000000 .word 0x00000000 + 800010f0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x88d927ae92e6cbae + 800010f4: 00033783 ld x15,0(x6) + 800010f8: 00830313 addi x6,x6,8 + +00000000800010fc : +Zknh_sha512sum0_cg_cmp_rd_rs1_b15: + sha512sum0 x15, x15 # perform operation + 800010fc: 10479793 sha512sum0 x15,x15 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zknh_sha512sum0_cg_cmp_rd_rs1_b15, Zknh_sha512sum0_cg_cmp_rd_rs1_b15_str) + 80001100: 000a3203 ld x4,0(x20) + 80001104: 00f20c63 beq x4,x15,8000111c + 80001108: 6b8012ef jal x5,800027c0 + 8000110c: 800010fc .word 0x800010fc + 80001110: 00000000 .word 0x00000000 + 80001114: 80009e11 .word 0x80009e11 + 80001118: 00000000 .word 0x00000000 + 8000111c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x9191a8d83f184a87 + 80001120: 00033803 ld x16,0(x6) + 80001124: 00830313 addi x6,x6,8 + +0000000080001128 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b16: + sha512sum0 x16, x16 # perform operation + 80001128: 10481813 sha512sum0 x16,x16 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zknh_sha512sum0_cg_cmp_rd_rs1_b16, Zknh_sha512sum0_cg_cmp_rd_rs1_b16_str) + 8000112c: 000a3203 ld x4,0(x20) + 80001130: 01020c63 beq x4,x16,80001148 + 80001134: 68c012ef jal x5,800027c0 + 80001138: 80001128 .word 0x80001128 + 8000113c: 00000000 .word 0x00000000 + 80001140: 80009e4e .word 0x80009e4e + 80001144: 00000000 .word 0x00000000 + 80001148: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xcfdcd98482afe653 + 8000114c: 00033883 ld x17,0(x6) + 80001150: 00830313 addi x6,x6,8 + +0000000080001154 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b17: + sha512sum0 x17, x17 # perform operation + 80001154: 10489893 sha512sum0 x17,x17 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zknh_sha512sum0_cg_cmp_rd_rs1_b17, Zknh_sha512sum0_cg_cmp_rd_rs1_b17_str) + 80001158: 000a3203 ld x4,0(x20) + 8000115c: 01120c63 beq x4,x17,80001174 + 80001160: 660012ef jal x5,800027c0 + 80001164: 80001154 .word 0x80001154 + 80001168: 00000000 .word 0x00000000 + 8000116c: 80009e8b .word 0x80009e8b + 80001170: 00000000 .word 0x00000000 + 80001174: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x83496d649fdcc6fa + 80001178: 00033903 ld x18,0(x6) + 8000117c: 00830313 addi x6,x6,8 + +0000000080001180 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b18: + sha512sum0 x18, x18 # perform operation + 80001180: 10491913 sha512sum0 x18,x18 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zknh_sha512sum0_cg_cmp_rd_rs1_b18, Zknh_sha512sum0_cg_cmp_rd_rs1_b18_str) + 80001184: 000a3203 ld x4,0(x20) + 80001188: 01220c63 beq x4,x18,800011a0 + 8000118c: 634012ef jal x5,800027c0 + 80001190: 80001180 .word 0x80001180 + 80001194: 00000000 .word 0x00000000 + 80001198: 80009ec8 .word 0x80009ec8 + 8000119c: 00000000 .word 0x00000000 + 800011a0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x3d11017c876d6b32 + 800011a4: 00033983 ld x19,0(x6) + 800011a8: 00830313 addi x6,x6,8 + +00000000800011ac : +Zknh_sha512sum0_cg_cmp_rd_rs1_b19: + sha512sum0 x19, x19 # perform operation + 800011ac: 10499993 sha512sum0 x19,x19 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zknh_sha512sum0_cg_cmp_rd_rs1_b19, Zknh_sha512sum0_cg_cmp_rd_rs1_b19_str) + 800011b0: 000a3203 ld x4,0(x20) + 800011b4: 01320c63 beq x4,x19,800011cc + 800011b8: 608012ef jal x5,800027c0 + 800011bc: 800011ac .word 0x800011ac + 800011c0: 00000000 .word 0x00000000 + 800011c4: 80009f05 .word 0x80009f05 + 800011c8: 00000000 .word 0x00000000 + 800011cc: 008a0a13 addi x20,x20,8 + + mv x9, x20 # switch signature pointer register to avoid conflict with test + 800011d0: 000a0493 addi x9,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xc839350b6b33f25d + 800011d4: 00033a03 ld x20,0(x6) + 800011d8: 00830313 addi x6,x6,8 + +00000000800011dc : +Zknh_sha512sum0_cg_cmp_rd_rs1_b20: + sha512sum0 x20, x20 # perform operation + 800011dc: 104a1a13 sha512sum0 x20,x20 + # Check if x20 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x20, Zknh_sha512sum0_cg_cmp_rd_rs1_b20, Zknh_sha512sum0_cg_cmp_rd_rs1_b20_str) + 800011e0: 0004b203 ld x4,0(x9) + 800011e4: 01420c63 beq x4,x20,800011fc + 800011e8: 5d8012ef jal x5,800027c0 + 800011ec: 800011dc .word 0x800011dc + 800011f0: 00000000 .word 0x00000000 + 800011f4: 80009f43 .word 0x80009f43 + 800011f8: 00000000 .word 0x00000000 + 800011fc: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x6b67e69fa1596686 + 80001200: 00033a83 ld x21,0(x6) + 80001204: 00830313 addi x6,x6,8 + +0000000080001208 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b21: + sha512sum0 x21, x21 # perform operation + 80001208: 104a9a93 sha512sum0 x21,x21 + # Check if x21 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x21, Zknh_sha512sum0_cg_cmp_rd_rs1_b21, Zknh_sha512sum0_cg_cmp_rd_rs1_b21_str) + 8000120c: 0004b203 ld x4,0(x9) + 80001210: 01520c63 beq x4,x21,80001228 + 80001214: 5ac012ef jal x5,800027c0 + 80001218: 80001208 .word 0x80001208 + 8000121c: 00000000 .word 0x00000000 + 80001220: 80009f81 .word 0x80009f81 + 80001224: 00000000 .word 0x00000000 + 80001228: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x5a4f18952583ae98 + 8000122c: 00033b03 ld x22,0(x6) + 80001230: 00830313 addi x6,x6,8 + +0000000080001234 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b22: + sha512sum0 x22, x22 # perform operation + 80001234: 104b1b13 sha512sum0 x22,x22 + # Check if x22 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x22, Zknh_sha512sum0_cg_cmp_rd_rs1_b22, Zknh_sha512sum0_cg_cmp_rd_rs1_b22_str) + 80001238: 0004b203 ld x4,0(x9) + 8000123c: 01620c63 beq x4,x22,80001254 + 80001240: 580012ef jal x5,800027c0 + 80001244: 80001234 .word 0x80001234 + 80001248: 00000000 .word 0x00000000 + 8000124c: 80009fbf .word 0x80009fbf + 80001250: 00000000 .word 0x00000000 + 80001254: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xec1ea5ddda0177db + 80001258: 00033b83 ld x23,0(x6) + 8000125c: 00830313 addi x6,x6,8 + +0000000080001260 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b23: + sha512sum0 x23, x23 # perform operation + 80001260: 104b9b93 sha512sum0 x23,x23 + # Check if x23 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x23, Zknh_sha512sum0_cg_cmp_rd_rs1_b23, Zknh_sha512sum0_cg_cmp_rd_rs1_b23_str) + 80001264: 0004b203 ld x4,0(x9) + 80001268: 01720c63 beq x4,x23,80001280 + 8000126c: 554012ef jal x5,800027c0 + 80001270: 80001260 .word 0x80001260 + 80001274: 00000000 .word 0x00000000 + 80001278: 80009ffd .word 0x80009ffd + 8000127c: 00000000 .word 0x00000000 + 80001280: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7bad1774e708002a + 80001284: 00033c03 ld x24,0(x6) + 80001288: 00830313 addi x6,x6,8 + +000000008000128c : +Zknh_sha512sum0_cg_cmp_rd_rs1_b24: + sha512sum0 x24, x24 # perform operation + 8000128c: 104c1c13 sha512sum0 x24,x24 + # Check if x24 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x24, Zknh_sha512sum0_cg_cmp_rd_rs1_b24, Zknh_sha512sum0_cg_cmp_rd_rs1_b24_str) + 80001290: 0004b203 ld x4,0(x9) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 528012ef jal x5,800027c0 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 8000a03b .word 0x8000a03b + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x513b8ba5d7d9442d + 800012b0: 00033c83 ld x25,0(x6) + 800012b4: 00830313 addi x6,x6,8 + +00000000800012b8 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b25: + sha512sum0 x25, x25 # perform operation + 800012b8: 104c9c93 sha512sum0 x25,x25 + # Check if x25 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x25, Zknh_sha512sum0_cg_cmp_rd_rs1_b25, Zknh_sha512sum0_cg_cmp_rd_rs1_b25_str) + 800012bc: 0004b203 ld x4,0(x9) + 800012c0: 01920c63 beq x4,x25,800012d8 + 800012c4: 4fc012ef jal x5,800027c0 + 800012c8: 800012b8 .word 0x800012b8 + 800012cc: 00000000 .word 0x00000000 + 800012d0: 8000a079 .word 0x8000a079 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x9aa4a85c84b658aa + 800012dc: 00033d03 ld x26,0(x6) + 800012e0: 00830313 addi x6,x6,8 + +00000000800012e4 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b26: + sha512sum0 x26, x26 # perform operation + 800012e4: 104d1d13 sha512sum0 x26,x26 + # Check if x26 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x26, Zknh_sha512sum0_cg_cmp_rd_rs1_b26, Zknh_sha512sum0_cg_cmp_rd_rs1_b26_str) + 800012e8: 0004b203 ld x4,0(x9) + 800012ec: 01a20c63 beq x4,x26,80001304 + 800012f0: 4d0012ef jal x5,800027c0 + 800012f4: 800012e4 .word 0x800012e4 + 800012f8: 00000000 .word 0x00000000 + 800012fc: 8000a0b7 .word 0x8000a0b7 + 80001300: 00000000 .word 0x00000000 + 80001304: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xc3de1dc1768513a1 + 80001308: 00033d83 ld x27,0(x6) + 8000130c: 00830313 addi x6,x6,8 + +0000000080001310 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b27: + sha512sum0 x27, x27 # perform operation + 80001310: 104d9d93 sha512sum0 x27,x27 + # Check if x27 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x27, Zknh_sha512sum0_cg_cmp_rd_rs1_b27, Zknh_sha512sum0_cg_cmp_rd_rs1_b27_str) + 80001314: 0004b203 ld x4,0(x9) + 80001318: 01b20c63 beq x4,x27,80001330 + 8000131c: 4a4012ef jal x5,800027c0 + 80001320: 80001310 .word 0x80001310 + 80001324: 00000000 .word 0x00000000 + 80001328: 8000a0f5 .word 0x8000a0f5 + 8000132c: 00000000 .word 0x00000000 + 80001330: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x06de2df17172ba15 + 80001334: 00033e03 ld x28,0(x6) + 80001338: 00830313 addi x6,x6,8 + +000000008000133c : +Zknh_sha512sum0_cg_cmp_rd_rs1_b28: + sha512sum0 x28, x28 # perform operation + 8000133c: 104e1e13 sha512sum0 x28,x28 + # Check if x28 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x28, Zknh_sha512sum0_cg_cmp_rd_rs1_b28, Zknh_sha512sum0_cg_cmp_rd_rs1_b28_str) + 80001340: 0004b203 ld x4,0(x9) + 80001344: 01c20c63 beq x4,x28,8000135c + 80001348: 478012ef jal x5,800027c0 + 8000134c: 8000133c .word 0x8000133c + 80001350: 00000000 .word 0x00000000 + 80001354: 8000a133 .word 0x8000a133 + 80001358: 00000000 .word 0x00000000 + 8000135c: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1076db10b04aa452 + 80001360: 00033e83 ld x29,0(x6) + 80001364: 00830313 addi x6,x6,8 + +0000000080001368 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b29: + sha512sum0 x29, x29 # perform operation + 80001368: 104e9e93 sha512sum0 x29,x29 + # Check if x29 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x29, Zknh_sha512sum0_cg_cmp_rd_rs1_b29, Zknh_sha512sum0_cg_cmp_rd_rs1_b29_str) + 8000136c: 0004b203 ld x4,0(x9) + 80001370: 01d20c63 beq x4,x29,80001388 + 80001374: 44c012ef jal x5,800027c0 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 8000a171 .word 0x8000a171 + 80001384: 00000000 .word 0x00000000 + 80001388: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x144a7331369e55a8 + 8000138c: 00033f03 ld x30,0(x6) + 80001390: 00830313 addi x6,x6,8 + +0000000080001394 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b30: + sha512sum0 x30, x30 # perform operation + 80001394: 104f1f13 sha512sum0 x30,x30 + # Check if x30 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x30, Zknh_sha512sum0_cg_cmp_rd_rs1_b30, Zknh_sha512sum0_cg_cmp_rd_rs1_b30_str) + 80001398: 0004b203 ld x4,0(x9) + 8000139c: 01e20c63 beq x4,x30,800013b4 + 800013a0: 420012ef jal x5,800027c0 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 8000a1af .word 0x8000a1af + 800013b0: 00000000 .word 0x00000000 + 800013b4: 00848493 addi x9,x9,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x3ce31b120a80805c + 800013b8: 00033f83 ld x31,0(x6) + 800013bc: 00830313 addi x6,x6,8 + +00000000800013c0 : +Zknh_sha512sum0_cg_cmp_rd_rs1_b31: + sha512sum0 x31, x31 # perform operation + 800013c0: 104f9f93 sha512sum0 x31,x31 + # Check if x31 contains the expected result. x9 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x9, x5, x4, x31, Zknh_sha512sum0_cg_cmp_rd_rs1_b31, Zknh_sha512sum0_cg_cmp_rd_rs1_b31_str) + 800013c4: 0004b203 ld x4,0(x9) + 800013c8: 01f20c63 beq x4,x31,800013e0 + 800013cc: 3f4012ef jal x5,800027c0 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000a1ed .word 0x8000a1ed + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00848493 addi x9,x9,8 + + mv x2, x9 # restore signature pointer to default register for teardown + 800013e4: 00048113 addi x2,x9,0 + +00000000800013e8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e8: 00000513 addi x10,x0,0 + 800013ec: 00000073 ecall + 800013f0: fff00513 addi x10,x0,-1 + 800013f4: 25800413 addi x8,x0,600 + +00000000800013f8 : + 800013f8: 34002373 csrrs x6,mscratch,x0 + +00000000800013fc : + 800013fc: 2b833383 ld x7,696(x6) + +0000000080001400 : + 80001400: 2a033383 ld x7,672(x6) + +0000000080001404 : + 80001404: 2d033483 ld x9,720(x6) + 80001408: 34049073 csrrw x0,mscratch,x9 + +000000008000140c : + 8000140c: 2c833483 ld x9,712(x6) + 80001410: 305493f3 csrrw x7,mtvec,x9 + 80001414: ffc4f493 andi x9,x9,-4 + 80001418: ffc3f393 andi x7,x7,-4 + 8000141c: 00749e63 bne x9,x7,80001438 + +0000000080001420 : + 80001420: 00030493 addi x9,x6,0 + +0000000080001424 : + 80001424: 0004a783 lw x15,0(x9) + 80001428: 00f3a023 sw x15,0(x7) + 8000142c: 00438393 addi x7,x7,4 + 80001430: 00448493 addi x9,x9,4 + 80001434: fe83c8e3 blt x7,x8,80001424 + 80001438: 0000100f fence.i + +000000008000143c : + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc9ff06f jal x0,800013e8 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca5ff06f jal x0,800013e8 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9c30313 addi x6,x6,-1380 # 8000143c + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35030313 addi x6,x6,848 # 800013e8 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33830313 addi x6,x6,824 # 800013e8 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32030313 addi x6,x6,800 # 800013e8 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b878793 addi x15,x15,440 # 800013f8 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zknh-sha512sum1-00.elf.objdump b/riscv-tests/rv64-Zknh-sha512sum1-00.elf.objdump new file mode 100644 index 0000000..f7e9ea6 --- /dev/null +++ b/riscv-tests/rv64-Zknh-sha512sum1-00.elf.objdump @@ -0,0 +1,6678 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sum1-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zknh/Zknh-sha512sum1-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000218e0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029900 0000000080029900 00027900 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008de 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 00000080 0000000000000000 0000000000000000 00028f99 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029019 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002903c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008e 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0002911e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029900 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccpqimte.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b1 +0000000080008827 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b2 +000000008000885e l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b3 +0000000080008895 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088cc l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b5 +0000000080008903 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b6 +000000008000893a l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b7 +0000000080008971 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b8 +00000000800089a8 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b8_str +00000000800001e4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b9 +00000000800089df l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b9_str +0000000080000210 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b10 +0000000080008a17 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b10_str +000000008000023c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b11 +0000000080008a50 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b11_str +0000000080000268 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b12 +0000000080008a89 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b12_str +000000008000029c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b13 +0000000080008ac2 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b13_str +00000000800002c8 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b14 +0000000080008afb l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b14_str +00000000800002f4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b15 +0000000080008b34 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b15_str +0000000080000320 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b16 +0000000080008b6d l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b16_str +000000008000034c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b17 +0000000080008ba6 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b17_str +0000000080000378 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b18 +0000000080008bdf l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b18_str +00000000800003a4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b19 +0000000080008c18 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b19_str +00000000800003d4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b20 +0000000080008c51 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b20_str +0000000080000400 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b21 +0000000080008c8a l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b21_str +000000008000042c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b22 +0000000080008cc3 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b22_str +0000000080000458 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b23 +0000000080008cfc l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b23_str +0000000080000488 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b24 +0000000080008d35 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b24_str +00000000800004b4 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b25 +0000000080008d6e l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b25_str +00000000800004e0 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b26 +0000000080008da7 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b26_str +000000008000050c l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b27 +0000000080008de0 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b27_str +0000000080000538 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b28 +0000000080008e19 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b28_str +0000000080000564 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b29 +0000000080008e52 l .data 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b29_str +0000000080000594 l .text.rvtest 0000000000000000 Zknh_sha512sum1_cg_cp_rs1_b30 +0000000080008e8b l .data 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.text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 0002a097 auipc x1,0x2a + 80000004: 0e008093 addi x1,x1,224 # 8002a0e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x754638a301521166 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zknh_sha512sum1_cg_cp_rs1_b0: + sha512sum1 x16, x0 # perform operation + 80000048: 10501813 sha512sum1 x16,x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zknh_sha512sum1_cg_cp_rs1_b0, Zknh_sha512sum1_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01020c63 beq x4,x16,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x06c05eed0284f84c + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zknh_sha512sum1_cg_cp_rs1_b1: + sha512sum1 x23, x1 # perform operation + 80000074: 10509b93 sha512sum1 x23,x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zknh_sha512sum1_cg_cp_rs1_b1, Zknh_sha512sum1_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01720c63 beq x4,x23,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008827 .word 0x80008827 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x1, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010093 addi x1,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x244920d11dd5f0e3 + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zknh_sha512sum1_cg_cp_rs1_b2: + sha512sum1 x19, x2 # perform operation + 800000a4: 10511993 sha512sum1 x19,x2 + # Check if x19 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x19, Zknh_sha512sum1_cg_cp_rs1_b2, Zknh_sha512sum1_cg_cp_rs1_b2_str) + 800000a8: 0000b203 ld x4,0(x1) + 800000ac: 01320c63 beq x4,x19,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 8000885e .word 0x8000885e + 800000c0: 00000000 .word 0x00000000 + 800000c4: 00808093 addi x1,x1,8 + + mv x20, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018a13 addi x20,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x3) # load rs1: x3 = 0x6106df3471fde7b1 + 800000cc: 000a3183 ld x3,0(x20) + 800000d0: 008a0a13 addi x20,x20,8 + +00000000800000d4 : +Zknh_sha512sum1_cg_cp_rs1_b3: + sha512sum1 x12, x3 # perform operation + 800000d4: 10519613 sha512sum1 x12,x3 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sum1_cg_cp_rs1_b3, Zknh_sha512sum1_cg_cp_rs1_b3_str) + 800000d8: 0000b203 ld x4,0(x1) + 800000dc: 00c20c63 beq x4,x12,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008895 .word 0x80008895 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 00808093 addi x1,x1,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs1: x4 = 0x379299757a7590b7 + 80000100: 000a3203 ld x4,0(x20) + 80000104: 008a0a13 addi x20,x20,8 + +0000000080000108 : +Zknh_sha512sum1_cg_cp_rs1_b4: + sha512sum1 x11, x4 # perform operation + 80000108: 10521593 sha512sum1 x11,x4 + # Check if x11 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x11, Zknh_sha512sum1_cg_cp_rs1_b4, Zknh_sha512sum1_cg_cp_rs1_b4_str) + 8000010c: 0000b683 ld x13,0(x1) + 80000110: 00b68c63 beq x13,x11,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088cc .word 0x800088cc + 80000124: 00000000 .word 0x00000000 + 80000128: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x5) # load rs1: x5 = 0xb1a554e81e0280e7 + 8000012c: 000a3283 ld x5,0(x20) + 80000130: 008a0a13 addi x20,x20,8 + +0000000080000134 : +Zknh_sha512sum1_cg_cp_rs1_b5: + sha512sum1 x11, x5 # perform operation + 80000134: 10529593 sha512sum1 x11,x5 + # Check if x11 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x11, Zknh_sha512sum1_cg_cp_rs1_b5, Zknh_sha512sum1_cg_cp_rs1_b5_str) + 80000138: 0000b683 ld x13,0(x1) + 8000013c: 00b68c63 beq x13,x11,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 80008903 .word 0x80008903 + 80000150: 00000000 .word 0x00000000 + 80000154: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0xe94bcace6fdbc349 + 80000158: 000a3303 ld x6,0(x20) + 8000015c: 008a0a13 addi x20,x20,8 + +0000000080000160 : +Zknh_sha512sum1_cg_cp_rs1_b6: + sha512sum1 x18, x6 # perform operation + 80000160: 10531913 sha512sum1 x18,x6 + # Check if x18 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x18, Zknh_sha512sum1_cg_cp_rs1_b6, Zknh_sha512sum1_cg_cp_rs1_b6_str) + 80000164: 0000b683 ld x13,0(x1) + 80000168: 01268c63 beq x13,x18,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000893a .word 0x8000893a + 8000017c: 00000000 .word 0x00000000 + 80000180: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x7) # load rs1: x7 = 0x56e22490506d4441 + 80000184: 000a3383 ld x7,0(x20) + 80000188: 008a0a13 addi x20,x20,8 + +000000008000018c : +Zknh_sha512sum1_cg_cp_rs1_b7: + sha512sum1 x23, x7 # perform operation + 8000018c: 10539b93 sha512sum1 x23,x7 + # Check if x23 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x23, Zknh_sha512sum1_cg_cp_rs1_b7, Zknh_sha512sum1_cg_cp_rs1_b7_str) + 80000190: 0000b683 ld x13,0(x1) + 80000194: 01768c63 beq x13,x23,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 80008971 .word 0x80008971 + 800001a8: 00000000 .word 0x00000000 + 800001ac: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x8) # load rs1: x8 = 0x7b6ffb06a3bff5ec + 800001b0: 000a3403 ld x8,0(x20) + 800001b4: 008a0a13 addi x20,x20,8 + +00000000800001b8 : +Zknh_sha512sum1_cg_cp_rs1_b8: + sha512sum1 x25, x8 # perform operation + 800001b8: 10541c93 sha512sum1 x25,x8 + # Check if x25 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x25, Zknh_sha512sum1_cg_cp_rs1_b8, Zknh_sha512sum1_cg_cp_rs1_b8_str) + 800001bc: 0000b683 ld x13,0(x1) + 800001c0: 01968c63 beq x13,x25,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 800089a8 .word 0x800089a8 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0x9237f412b77f9b27 + 800001dc: 000a3483 ld x9,0(x20) + 800001e0: 008a0a13 addi x20,x20,8 + +00000000800001e4 : +Zknh_sha512sum1_cg_cp_rs1_b9: + sha512sum1 x7, x9 # perform operation + 800001e4: 10549393 sha512sum1 x7,x9 + # Check if x7 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x7, Zknh_sha512sum1_cg_cp_rs1_b9, Zknh_sha512sum1_cg_cp_rs1_b9_str) + 800001e8: 0000b683 ld x13,0(x1) + 800001ec: 00768c63 beq x13,x7,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089df .word 0x800089df + 80000200: 00000000 .word 0x00000000 + 80000204: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xd5430554637b7968 + 80000208: 000a3503 ld x10,0(x20) + 8000020c: 008a0a13 addi x20,x20,8 + +0000000080000210 : +Zknh_sha512sum1_cg_cp_rs1_b10: + sha512sum1 x2, x10 # perform operation + 80000210: 10551113 sha512sum1 x2,x10 + # Check if x2 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x2, Zknh_sha512sum1_cg_cp_rs1_b10, Zknh_sha512sum1_cg_cp_rs1_b10_str) + 80000214: 0000b683 ld x13,0(x1) + 80000218: 00268c63 beq x13,x2,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 80008a17 .word 0x80008a17 + 8000022c: 00000000 .word 0x00000000 + 80000230: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xc2957a464b4d2778 + 80000234: 000a3583 ld x11,0(x20) + 80000238: 008a0a13 addi x20,x20,8 + +000000008000023c : +Zknh_sha512sum1_cg_cp_rs1_b11: + sha512sum1 x27, x11 # perform operation + 8000023c: 10559d93 sha512sum1 x27,x11 + # Check if x27 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x27, Zknh_sha512sum1_cg_cp_rs1_b11, Zknh_sha512sum1_cg_cp_rs1_b11_str) + 80000240: 0000b683 ld x13,0(x1) + 80000244: 01b68c63 beq x13,x27,8000025c + 80000248: 5b80276f jal x14,80002800 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80008a50 .word 0x80008a50 + 80000258: 00000000 .word 0x00000000 + 8000025c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x41f2919e90aa0830 + 80000260: 000a3603 ld x12,0(x20) + 80000264: 008a0a13 addi x20,x20,8 + +0000000080000268 : +Zknh_sha512sum1_cg_cp_rs1_b12: + sha512sum1 x27, x12 # perform operation + 80000268: 10561d93 sha512sum1 x27,x12 + # Check if x27 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x27, Zknh_sha512sum1_cg_cp_rs1_b12, Zknh_sha512sum1_cg_cp_rs1_b12_str) + 8000026c: 0000b683 ld x13,0(x1) + 80000270: 01b68c63 beq x13,x27,80000288 + 80000274: 58c0276f jal x14,80002800 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 80008a89 .word 0x80008a89 + 80000284: 00000000 .word 0x00000000 + 80000288: 00808093 addi x1,x1,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000028c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000290: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0x682d89793265ba58 + 80000294: 000a3683 ld x13,0(x20) + 80000298: 008a0a13 addi x20,x20,8 + +000000008000029c : +Zknh_sha512sum1_cg_cp_rs1_b13: + sha512sum1 x22, x13 # perform operation + 8000029c: 10569b13 sha512sum1 x22,x13 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknh_sha512sum1_cg_cp_rs1_b13, Zknh_sha512sum1_cg_cp_rs1_b13_str) + 800002a0: 0000b203 ld x4,0(x1) + 800002a4: 01620c63 beq x4,x22,800002bc + 800002a8: 518022ef jal x5,800027c0 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 80008ac2 .word 0x80008ac2 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xf8a54a6e2066bc68 + 800002c0: 000a3703 ld x14,0(x20) + 800002c4: 008a0a13 addi x20,x20,8 + +00000000800002c8 : +Zknh_sha512sum1_cg_cp_rs1_b14: + sha512sum1 x9, x14 # perform operation + 800002c8: 10571493 sha512sum1 x9,x14 + # Check if x9 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x9, Zknh_sha512sum1_cg_cp_rs1_b14, Zknh_sha512sum1_cg_cp_rs1_b14_str) + 800002cc: 0000b203 ld x4,0(x1) + 800002d0: 00920c63 beq x4,x9,800002e8 + 800002d4: 4ec022ef jal x5,800027c0 + 800002d8: 800002c8 .word 0x800002c8 + 800002dc: 00000000 .word 0x00000000 + 800002e0: 80008afb .word 0x80008afb + 800002e4: 00000000 .word 0x00000000 + 800002e8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0xfce03618ffe6e744 + 800002ec: 000a3783 ld x15,0(x20) + 800002f0: 008a0a13 addi x20,x20,8 + +00000000800002f4 : +Zknh_sha512sum1_cg_cp_rs1_b15: + sha512sum1 x30, x15 # perform operation + 800002f4: 10579f13 sha512sum1 x30,x15 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha512sum1_cg_cp_rs1_b15, Zknh_sha512sum1_cg_cp_rs1_b15_str) + 800002f8: 0000b203 ld x4,0(x1) + 800002fc: 01e20c63 beq x4,x30,80000314 + 80000300: 4c0022ef jal x5,800027c0 + 80000304: 800002f4 .word 0x800002f4 + 80000308: 00000000 .word 0x00000000 + 8000030c: 80008b34 .word 0x80008b34 + 80000310: 00000000 .word 0x00000000 + 80000314: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0xa42ec86308afae2a + 80000318: 000a3803 ld x16,0(x20) + 8000031c: 008a0a13 addi x20,x20,8 + +0000000080000320 : +Zknh_sha512sum1_cg_cp_rs1_b16: + sha512sum1 x2, x16 # perform operation + 80000320: 10581113 sha512sum1 x2,x16 + # Check if x2 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x2, Zknh_sha512sum1_cg_cp_rs1_b16, Zknh_sha512sum1_cg_cp_rs1_b16_str) + 80000324: 0000b203 ld x4,0(x1) + 80000328: 00220c63 beq x4,x2,80000340 + 8000032c: 494022ef jal x5,800027c0 + 80000330: 80000320 .word 0x80000320 + 80000334: 00000000 .word 0x00000000 + 80000338: 80008b6d .word 0x80008b6d + 8000033c: 00000000 .word 0x00000000 + 80000340: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xdf1305f2af03f2c3 + 80000344: 000a3883 ld x17,0(x20) + 80000348: 008a0a13 addi x20,x20,8 + +000000008000034c : +Zknh_sha512sum1_cg_cp_rs1_b17: + sha512sum1 x11, x17 # perform operation + 8000034c: 10589593 sha512sum1 x11,x17 + # Check if x11 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x11, Zknh_sha512sum1_cg_cp_rs1_b17, Zknh_sha512sum1_cg_cp_rs1_b17_str) + 80000350: 0000b203 ld x4,0(x1) + 80000354: 00b20c63 beq x4,x11,8000036c + 80000358: 468022ef jal x5,800027c0 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 80008ba6 .word 0x80008ba6 + 80000368: 00000000 .word 0x00000000 + 8000036c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0x92e8b2080600d814 + 80000370: 000a3903 ld x18,0(x20) + 80000374: 008a0a13 addi x20,x20,8 + +0000000080000378 : +Zknh_sha512sum1_cg_cp_rs1_b18: + sha512sum1 x22, x18 # perform operation + 80000378: 10591b13 sha512sum1 x22,x18 + # Check if x22 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x22, Zknh_sha512sum1_cg_cp_rs1_b18, Zknh_sha512sum1_cg_cp_rs1_b18_str) + 8000037c: 0000b203 ld x4,0(x1) + 80000380: 01620c63 beq x4,x22,80000398 + 80000384: 43c022ef jal x5,800027c0 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 80008bdf .word 0x80008bdf + 80000394: 00000000 .word 0x00000000 + 80000398: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0x8311c85509ec100f + 8000039c: 000a3983 ld x19,0(x20) + 800003a0: 008a0a13 addi x20,x20,8 + +00000000800003a4 : +Zknh_sha512sum1_cg_cp_rs1_b19: + sha512sum1 x18, x19 # perform operation + 800003a4: 10599913 sha512sum1 x18,x19 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknh_sha512sum1_cg_cp_rs1_b19, Zknh_sha512sum1_cg_cp_rs1_b19_str) + 800003a8: 0000b203 ld x4,0(x1) + 800003ac: 01220c63 beq x4,x18,800003c4 + 800003b0: 410022ef jal x5,800027c0 + 800003b4: 800003a4 .word 0x800003a4 + 800003b8: 00000000 .word 0x00000000 + 800003bc: 80008c18 .word 0x80008c18 + 800003c0: 00000000 .word 0x00000000 + 800003c4: 00808093 addi x1,x1,8 + + mv x24, x20 # switch data pointer register to avoid conflict with test + 800003c8: 000a0c13 addi x24,x20,0 +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x61f19a997739e067 + 800003cc: 000c3a03 ld x20,0(x24) + 800003d0: 008c0c13 addi x24,x24,8 + +00000000800003d4 : +Zknh_sha512sum1_cg_cp_rs1_b20: + sha512sum1 x30, x20 # perform operation + 800003d4: 105a1f13 sha512sum1 x30,x20 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zknh_sha512sum1_cg_cp_rs1_b20, Zknh_sha512sum1_cg_cp_rs1_b20_str) + 800003d8: 0000b203 ld x4,0(x1) + 800003dc: 01e20c63 beq x4,x30,800003f4 + 800003e0: 3e0022ef jal x5,800027c0 + 800003e4: 800003d4 .word 0x800003d4 + 800003e8: 00000000 .word 0x00000000 + 800003ec: 80008c51 .word 0x80008c51 + 800003f0: 00000000 .word 0x00000000 + 800003f4: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs1: x21 = 0x81343bc60d02e33a + 800003f8: 000c3a83 ld x21,0(x24) + 800003fc: 008c0c13 addi x24,x24,8 + +0000000080000400 : +Zknh_sha512sum1_cg_cp_rs1_b21: + sha512sum1 x20, x21 # perform operation + 80000400: 105a9a13 sha512sum1 x20,x21 + # Check if x20 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x20, Zknh_sha512sum1_cg_cp_rs1_b21, Zknh_sha512sum1_cg_cp_rs1_b21_str) + 80000404: 0000b203 ld x4,0(x1) + 80000408: 01420c63 beq x4,x20,80000420 + 8000040c: 3b4022ef jal x5,800027c0 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c8a .word 0x80008c8a + 8000041c: 00000000 .word 0x00000000 + 80000420: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs1: x22 = 0xecc73ee0500963bb + 80000424: 000c3b03 ld x22,0(x24) + 80000428: 008c0c13 addi x24,x24,8 + +000000008000042c : +Zknh_sha512sum1_cg_cp_rs1_b22: + sha512sum1 x16, x22 # perform operation + 8000042c: 105b1813 sha512sum1 x16,x22 + # Check if x16 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x16, Zknh_sha512sum1_cg_cp_rs1_b22, Zknh_sha512sum1_cg_cp_rs1_b22_str) + 80000430: 0000b203 ld x4,0(x1) + 80000434: 01020c63 beq x4,x16,8000044c + 80000438: 388022ef jal x5,800027c0 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008cc3 .word 0x80008cc3 + 80000448: 00000000 .word 0x00000000 + 8000044c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs1: x23 = 0xad9b1a5652fe5b42 + 80000450: 000c3b83 ld x23,0(x24) + 80000454: 008c0c13 addi x24,x24,8 + +0000000080000458 : +Zknh_sha512sum1_cg_cp_rs1_b23: + sha512sum1 x18, x23 # perform operation + 80000458: 105b9913 sha512sum1 x18,x23 + # Check if x18 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x18, Zknh_sha512sum1_cg_cp_rs1_b23, Zknh_sha512sum1_cg_cp_rs1_b23_str) + 8000045c: 0000b203 ld x4,0(x1) + 80000460: 01220c63 beq x4,x18,80000478 + 80000464: 35c022ef jal x5,800027c0 + 80000468: 80000458 .word 0x80000458 + 8000046c: 00000000 .word 0x00000000 + 80000470: 80008cfc .word 0x80008cfc + 80000474: 00000000 .word 0x00000000 + 80000478: 00808093 addi x1,x1,8 + + mv x30, x24 # switch data pointer register to avoid conflict with test + 8000047c: 000c0f13 addi x30,x24,0 +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x745f1660618ec63d + 80000480: 000f3c03 ld x24,0(x30) + 80000484: 008f0f13 addi x30,x30,8 + +0000000080000488 : +Zknh_sha512sum1_cg_cp_rs1_b24: + sha512sum1 x21, x24 # perform operation + 80000488: 105c1a93 sha512sum1 x21,x24 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknh_sha512sum1_cg_cp_rs1_b24, Zknh_sha512sum1_cg_cp_rs1_b24_str) + 8000048c: 0000b203 ld x4,0(x1) + 80000490: 01520c63 beq x4,x21,800004a8 + 80000494: 32c022ef jal x5,800027c0 + 80000498: 80000488 .word 0x80000488 + 8000049c: 00000000 .word 0x00000000 + 800004a0: 80008d35 .word 0x80008d35 + 800004a4: 00000000 .word 0x00000000 + 800004a8: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x6392051e3bc5e84d + 800004ac: 000f3c83 ld x25,0(x30) + 800004b0: 008f0f13 addi x30,x30,8 + +00000000800004b4 : +Zknh_sha512sum1_cg_cp_rs1_b25: + sha512sum1 x7, x25 # perform operation + 800004b4: 105c9393 sha512sum1 x7,x25 + # Check if x7 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x7, Zknh_sha512sum1_cg_cp_rs1_b25, Zknh_sha512sum1_cg_cp_rs1_b25_str) + 800004b8: 0000b203 ld x4,0(x1) + 800004bc: 00720c63 beq x4,x7,800004d4 + 800004c0: 300022ef jal x5,800027c0 + 800004c4: 800004b4 .word 0x800004b4 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 80008d6e .word 0x80008d6e + 800004d0: 00000000 .word 0x00000000 + 800004d4: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x26) # load rs1: x26 = 0x4dc2bec435150b96 + 800004d8: 000f3d03 ld x26,0(x30) + 800004dc: 008f0f13 addi x30,x30,8 + +00000000800004e0 : +Zknh_sha512sum1_cg_cp_rs1_b26: + sha512sum1 x3, x26 # perform operation + 800004e0: 105d1193 sha512sum1 x3,x26 + # Check if x3 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x3, Zknh_sha512sum1_cg_cp_rs1_b26, Zknh_sha512sum1_cg_cp_rs1_b26_str) + 800004e4: 0000b203 ld x4,0(x1) + 800004e8: 00320c63 beq x4,x3,80000500 + 800004ec: 2d4022ef jal x5,800027c0 + 800004f0: 800004e0 .word 0x800004e0 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 80008da7 .word 0x80008da7 + 800004fc: 00000000 .word 0x00000000 + 80000500: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x27) # load rs1: x27 = 0x7f446adc276e33f4 + 80000504: 000f3d83 ld x27,0(x30) + 80000508: 008f0f13 addi x30,x30,8 + +000000008000050c : +Zknh_sha512sum1_cg_cp_rs1_b27: + sha512sum1 x29, x27 # perform operation + 8000050c: 105d9e93 sha512sum1 x29,x27 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknh_sha512sum1_cg_cp_rs1_b27, Zknh_sha512sum1_cg_cp_rs1_b27_str) + 80000510: 0000b203 ld x4,0(x1) + 80000514: 01d20c63 beq x4,x29,8000052c + 80000518: 2a8022ef jal x5,800027c0 + 8000051c: 8000050c .word 0x8000050c + 80000520: 00000000 .word 0x00000000 + 80000524: 80008de0 .word 0x80008de0 + 80000528: 00000000 .word 0x00000000 + 8000052c: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x28) # load rs1: x28 = 0xe97fc9bf1f13ced8 + 80000530: 000f3e03 ld x28,0(x30) + 80000534: 008f0f13 addi x30,x30,8 + +0000000080000538 : +Zknh_sha512sum1_cg_cp_rs1_b28: + sha512sum1 x12, x28 # perform operation + 80000538: 105e1613 sha512sum1 x12,x28 + # Check if x12 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x12, Zknh_sha512sum1_cg_cp_rs1_b28, Zknh_sha512sum1_cg_cp_rs1_b28_str) + 8000053c: 0000b203 ld x4,0(x1) + 80000540: 00c20c63 beq x4,x12,80000558 + 80000544: 27c022ef jal x5,800027c0 + 80000548: 80000538 .word 0x80000538 + 8000054c: 00000000 .word 0x00000000 + 80000550: 80008e19 .word 0x80008e19 + 80000554: 00000000 .word 0x00000000 + 80000558: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x516d04d5e55a97ce + 8000055c: 000f3e83 ld x29,0(x30) + 80000560: 008f0f13 addi x30,x30,8 + +0000000080000564 : +Zknh_sha512sum1_cg_cp_rs1_b29: + sha512sum1 x25, x29 # perform operation + 80000564: 105e9c93 sha512sum1 x25,x29 + # Check if x25 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x25, Zknh_sha512sum1_cg_cp_rs1_b29, Zknh_sha512sum1_cg_cp_rs1_b29_str) + 80000568: 0000b203 ld x4,0(x1) + 8000056c: 01920c63 beq x4,x25,80000584 + 80000570: 250022ef jal x5,800027c0 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008e52 .word 0x80008e52 + 80000580: 00000000 .word 0x00000000 + 80000584: 00808093 addi x1,x1,8 + + mv x10, x30 # switch data pointer register to avoid conflict with test + 80000588: 000f0513 addi x10,x30,0 +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xaae80e33d509652e + 8000058c: 00053f03 ld x30,0(x10) + 80000590: 00850513 addi x10,x10,8 + +0000000080000594 : +Zknh_sha512sum1_cg_cp_rs1_b30: + sha512sum1 x21, x30 # perform operation + 80000594: 105f1a93 sha512sum1 x21,x30 + # Check if x21 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x21, Zknh_sha512sum1_cg_cp_rs1_b30, Zknh_sha512sum1_cg_cp_rs1_b30_str) + 80000598: 0000b203 ld x4,0(x1) + 8000059c: 01520c63 beq x4,x21,800005b4 + 800005a0: 220022ef jal x5,800027c0 + 800005a4: 80000594 .word 0x80000594 + 800005a8: 00000000 .word 0x00000000 + 800005ac: 80008e8b .word 0x80008e8b + 800005b0: 00000000 .word 0x00000000 + 800005b4: 00808093 addi x1,x1,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x04a8ae33d7a5ef3b + 800005b8: 00053f83 ld x31,0(x10) + 800005bc: 00850513 addi x10,x10,8 + +00000000800005c0 : +Zknh_sha512sum1_cg_cp_rs1_b31: + sha512sum1 x29, x31 # perform operation + 800005c0: 105f9e93 sha512sum1 x29,x31 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zknh_sha512sum1_cg_cp_rs1_b31, Zknh_sha512sum1_cg_cp_rs1_b31_str) + 800005c4: 0000b203 ld x4,0(x1) + 800005c8: 01d20c63 beq x4,x29,800005e0 + 800005cc: 1f4022ef jal x5,800027c0 + 800005d0: 800005c0 .word 0x800005c0 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 80008ec4 .word 0x80008ec4 + 800005dc: 00000000 .word 0x00000000 + 800005e0: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xc095a8b05a4bf1bf + 800005e4: 00053f03 ld x30,0(x10) + 800005e8: 00850513 addi x10,x10,8 + +00000000800005ec : +Zknh_sha512sum1_cg_cp_rd_b0: + sha512sum1 x0, x30 # perform operation + 800005ec: 105f1013 sha512sum1 x0,x30 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zknh_sha512sum1_cg_cp_rd_b0, Zknh_sha512sum1_cg_cp_rd_b0_str) + 800005f0: 0000b203 ld x4,0(x1) + 800005f4: 00020c63 beq x4,x0,8000060c + 800005f8: 1c8022ef jal x5,800027c0 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80008efd .word 0x80008efd + 80000608: 00000000 .word 0x00000000 + 8000060c: 00808093 addi x1,x1,8 + + mv x22, x1 # switch signature pointer register to avoid conflict with test + 80000610: 00008b13 addi x22,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x07aa0d1fb19f4a9f + 80000614: 00053a83 ld x21,0(x10) + 80000618: 00850513 addi x10,x10,8 + +000000008000061c : +Zknh_sha512sum1_cg_cp_rd_b1: + sha512sum1 x1, x21 # perform operation + 8000061c: 105a9093 sha512sum1 x1,x21 + # Check if x1 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x1, Zknh_sha512sum1_cg_cp_rd_b1, Zknh_sha512sum1_cg_cp_rd_b1_str) + 80000620: 000b3203 ld x4,0(x22) + 80000624: 00120c63 beq x4,x1,8000063c + 80000628: 198022ef jal x5,800027c0 + 8000062c: 8000061c .word 0x8000061c + 80000630: 00000000 .word 0x00000000 + 80000634: 80008f34 .word 0x80008f34 + 80000638: 00000000 .word 0x00000000 + 8000063c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x598929a95f87ed98 + 80000640: 00053a83 ld x21,0(x10) + 80000644: 00850513 addi x10,x10,8 + +0000000080000648 : +Zknh_sha512sum1_cg_cp_rd_b2: + sha512sum1 x2, x21 # perform operation + 80000648: 105a9113 sha512sum1 x2,x21 + # Check if x2 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x2, Zknh_sha512sum1_cg_cp_rd_b2, Zknh_sha512sum1_cg_cp_rd_b2_str) + 8000064c: 000b3203 ld x4,0(x22) + 80000650: 00220c63 beq x4,x2,80000668 + 80000654: 16c022ef jal x5,800027c0 + 80000658: 80000648 .word 0x80000648 + 8000065c: 00000000 .word 0x00000000 + 80000660: 80008f6b .word 0x80008f6b + 80000664: 00000000 .word 0x00000000 + 80000668: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x868a17d8139b36d6 + 8000066c: 00053c03 ld x24,0(x10) + 80000670: 00850513 addi x10,x10,8 + +0000000080000674 : +Zknh_sha512sum1_cg_cp_rd_b3: + sha512sum1 x3, x24 # perform operation + 80000674: 105c1193 sha512sum1 x3,x24 + # Check if x3 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x3, Zknh_sha512sum1_cg_cp_rd_b3, Zknh_sha512sum1_cg_cp_rd_b3_str) + 80000678: 000b3203 ld x4,0(x22) + 8000067c: 00320c63 beq x4,x3,80000694 + 80000680: 140022ef jal x5,800027c0 + 80000684: 80000674 .word 0x80000674 + 80000688: 00000000 .word 0x00000000 + 8000068c: 80008fa2 .word 0x80008fa2 + 80000690: 00000000 .word 0x00000000 + 80000694: 008b0b13 addi x22,x22,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000698: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000069c: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xed8f59a5143d33b5 + 800006a0: 00053183 ld x3,0(x10) + 800006a4: 00850513 addi x10,x10,8 + +00000000800006a8 : +Zknh_sha512sum1_cg_cp_rd_b4: + sha512sum1 x4, x3 # perform operation + 800006a8: 10519213 sha512sum1 x4,x3 + # Check if x4 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x4, Zknh_sha512sum1_cg_cp_rd_b4, Zknh_sha512sum1_cg_cp_rd_b4_str) + 800006ac: 000b3683 ld x13,0(x22) + 800006b0: 00468c63 beq x13,x4,800006c8 + 800006b4: 14c0276f jal x14,80002800 + 800006b8: 800006a8 .word 0x800006a8 + 800006bc: 00000000 .word 0x00000000 + 800006c0: 80008fd9 .word 0x80008fd9 + 800006c4: 00000000 .word 0x00000000 + 800006c8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xac8c7c59a1edd839 + 800006cc: 00053603 ld x12,0(x10) + 800006d0: 00850513 addi x10,x10,8 + +00000000800006d4 : +Zknh_sha512sum1_cg_cp_rd_b5: + sha512sum1 x5, x12 # perform operation + 800006d4: 10561293 sha512sum1 x5,x12 + # Check if x5 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x5, Zknh_sha512sum1_cg_cp_rd_b5, Zknh_sha512sum1_cg_cp_rd_b5_str) + 800006d8: 000b3683 ld x13,0(x22) + 800006dc: 00568c63 beq x13,x5,800006f4 + 800006e0: 1200276f jal x14,80002800 + 800006e4: 800006d4 .word 0x800006d4 + 800006e8: 00000000 .word 0x00000000 + 800006ec: 80009010 .word 0x80009010 + 800006f0: 00000000 .word 0x00000000 + 800006f4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x3d48c9acb12a2c6b + 800006f8: 00053c03 ld x24,0(x10) + 800006fc: 00850513 addi x10,x10,8 + +0000000080000700 : +Zknh_sha512sum1_cg_cp_rd_b6: + sha512sum1 x6, x24 # perform operation + 80000700: 105c1313 sha512sum1 x6,x24 + # Check if x6 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x6, Zknh_sha512sum1_cg_cp_rd_b6, Zknh_sha512sum1_cg_cp_rd_b6_str) + 80000704: 000b3683 ld x13,0(x22) + 80000708: 00668c63 beq x13,x6,80000720 + 8000070c: 0f40276f jal x14,80002800 + 80000710: 80000700 .word 0x80000700 + 80000714: 00000000 .word 0x00000000 + 80000718: 80009047 .word 0x80009047 + 8000071c: 00000000 .word 0x00000000 + 80000720: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x562f1d0aeacaf506 + 80000724: 00053083 ld x1,0(x10) + 80000728: 00850513 addi x10,x10,8 + +000000008000072c : +Zknh_sha512sum1_cg_cp_rd_b7: + sha512sum1 x7, x1 # perform operation + 8000072c: 10509393 sha512sum1 x7,x1 + # Check if x7 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x7, Zknh_sha512sum1_cg_cp_rd_b7, Zknh_sha512sum1_cg_cp_rd_b7_str) + 80000730: 000b3683 ld x13,0(x22) + 80000734: 00768c63 beq x13,x7,8000074c + 80000738: 0c80276f jal x14,80002800 + 8000073c: 8000072c .word 0x8000072c + 80000740: 00000000 .word 0x00000000 + 80000744: 8000907e .word 0x8000907e + 80000748: 00000000 .word 0x00000000 + 8000074c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xfc1882a9eacd2736 + 80000750: 00053183 ld x3,0(x10) + 80000754: 00850513 addi x10,x10,8 + +0000000080000758 : +Zknh_sha512sum1_cg_cp_rd_b8: + sha512sum1 x8, x3 # perform operation + 80000758: 10519413 sha512sum1 x8,x3 + # Check if x8 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x8, Zknh_sha512sum1_cg_cp_rd_b8, Zknh_sha512sum1_cg_cp_rd_b8_str) + 8000075c: 000b3683 ld x13,0(x22) + 80000760: 00868c63 beq x13,x8,80000778 + 80000764: 09c0276f jal x14,80002800 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 800090b5 .word 0x800090b5 + 80000774: 00000000 .word 0x00000000 + 80000778: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x621a896deb14c2ee + 8000077c: 00053103 ld x2,0(x10) + 80000780: 00850513 addi x10,x10,8 + +0000000080000784 : +Zknh_sha512sum1_cg_cp_rd_b9: + sha512sum1 x9, x2 # perform operation + 80000784: 10511493 sha512sum1 x9,x2 + # Check if x9 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x9, Zknh_sha512sum1_cg_cp_rd_b9, Zknh_sha512sum1_cg_cp_rd_b9_str) + 80000788: 000b3683 ld x13,0(x22) + 8000078c: 00968c63 beq x13,x9,800007a4 + 80000790: 0700276f jal x14,80002800 + 80000794: 80000784 .word 0x80000784 + 80000798: 00000000 .word 0x00000000 + 8000079c: 800090ec .word 0x800090ec + 800007a0: 00000000 .word 0x00000000 + 800007a4: 008b0b13 addi x22,x22,8 + + mv x1, x10 # switch data pointer register to avoid conflict with test + 800007a8: 00050093 addi x1,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xbead730e93a76b29 + 800007ac: 0000be03 ld x28,0(x1) + 800007b0: 00808093 addi x1,x1,8 + +00000000800007b4 : +Zknh_sha512sum1_cg_cp_rd_b10: + sha512sum1 x10, x28 # perform operation + 800007b4: 105e1513 sha512sum1 x10,x28 + # Check if x10 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x10, Zknh_sha512sum1_cg_cp_rd_b10, Zknh_sha512sum1_cg_cp_rd_b10_str) + 800007b8: 000b3683 ld x13,0(x22) + 800007bc: 00a68c63 beq x13,x10,800007d4 + 800007c0: 0400276f jal x14,80002800 + 800007c4: 800007b4 .word 0x800007b4 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 80009123 .word 0x80009123 + 800007d0: 00000000 .word 0x00000000 + 800007d4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0xddf410281672d76f + 800007d8: 0000ba03 ld x20,0(x1) + 800007dc: 00808093 addi x1,x1,8 + +00000000800007e0 : +Zknh_sha512sum1_cg_cp_rd_b11: + sha512sum1 x11, x20 # perform operation + 800007e0: 105a1593 sha512sum1 x11,x20 + # Check if x11 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x11, Zknh_sha512sum1_cg_cp_rd_b11, Zknh_sha512sum1_cg_cp_rd_b11_str) + 800007e4: 000b3683 ld x13,0(x22) + 800007e8: 00b68c63 beq x13,x11,80000800 + 800007ec: 0140276f jal x14,80002800 + 800007f0: 800007e0 .word 0x800007e0 + 800007f4: 00000000 .word 0x00000000 + 800007f8: 8000915b .word 0x8000915b + 800007fc: 00000000 .word 0x00000000 + 80000800: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x2) # load rs1: x2 = 0x18b863936c48fe6d + 80000804: 0000b103 ld x2,0(x1) + 80000808: 00808093 addi x1,x1,8 + +000000008000080c : +Zknh_sha512sum1_cg_cp_rd_b12: + sha512sum1 x12, x2 # perform operation + 8000080c: 10511613 sha512sum1 x12,x2 + # Check if x12 contains the expected result. x22 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x22, x14, x13, x12, Zknh_sha512sum1_cg_cp_rd_b12, Zknh_sha512sum1_cg_cp_rd_b12_str) + 80000810: 000b3683 ld x13,0(x22) + 80000814: 00c68c63 beq x13,x12,8000082c + 80000818: 7e90176f jal x14,80002800 + 8000081c: 8000080c .word 0x8000080c + 80000820: 00000000 .word 0x00000000 + 80000824: 80009193 .word 0x80009193 + 80000828: 00000000 .word 0x00000000 + 8000082c: 008b0b13 addi x22,x22,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80000830: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000834: 00070293 addi x5,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0c06999b914cfb90 + 80000838: 0000be83 ld x29,0(x1) + 8000083c: 00808093 addi x1,x1,8 + +0000000080000840 : +Zknh_sha512sum1_cg_cp_rd_b13: + sha512sum1 x13, x29 # perform operation + 80000840: 105e9693 sha512sum1 x13,x29 + # Check if x13 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x13, Zknh_sha512sum1_cg_cp_rd_b13, Zknh_sha512sum1_cg_cp_rd_b13_str) + 80000844: 000b3203 ld x4,0(x22) + 80000848: 00d20c63 beq x4,x13,80000860 + 8000084c: 775012ef jal x5,800027c0 + 80000850: 80000840 .word 0x80000840 + 80000854: 00000000 .word 0x00000000 + 80000858: 800091cb .word 0x800091cb + 8000085c: 00000000 .word 0x00000000 + 80000860: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x4d053ad798e9ac3d + 80000864: 0000b503 ld x10,0(x1) + 80000868: 00808093 addi x1,x1,8 + +000000008000086c : +Zknh_sha512sum1_cg_cp_rd_b14: + sha512sum1 x14, x10 # perform operation + 8000086c: 10551713 sha512sum1 x14,x10 + # Check if x14 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x14, Zknh_sha512sum1_cg_cp_rd_b14, Zknh_sha512sum1_cg_cp_rd_b14_str) + 80000870: 000b3203 ld x4,0(x22) + 80000874: 00e20c63 beq x4,x14,8000088c + 80000878: 749012ef jal x5,800027c0 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 80009203 .word 0x80009203 + 80000888: 00000000 .word 0x00000000 + 8000088c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0x57ce40e6bcede243 + 80000890: 0000bc83 ld x25,0(x1) + 80000894: 00808093 addi x1,x1,8 + +0000000080000898 : +Zknh_sha512sum1_cg_cp_rd_b15: + sha512sum1 x15, x25 # perform operation + 80000898: 105c9793 sha512sum1 x15,x25 + # Check if x15 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x15, Zknh_sha512sum1_cg_cp_rd_b15, Zknh_sha512sum1_cg_cp_rd_b15_str) + 8000089c: 000b3203 ld x4,0(x22) + 800008a0: 00f20c63 beq x4,x15,800008b8 + 800008a4: 71d012ef jal x5,800027c0 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 8000923b .word 0x8000923b + 800008b4: 00000000 .word 0x00000000 + 800008b8: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xdb35afc434cd5c99 + 800008bc: 0000b703 ld x14,0(x1) + 800008c0: 00808093 addi x1,x1,8 + +00000000800008c4 : +Zknh_sha512sum1_cg_cp_rd_b16: + sha512sum1 x16, x14 # perform operation + 800008c4: 10571813 sha512sum1 x16,x14 + # Check if x16 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x16, Zknh_sha512sum1_cg_cp_rd_b16, Zknh_sha512sum1_cg_cp_rd_b16_str) + 800008c8: 000b3203 ld x4,0(x22) + 800008cc: 01020c63 beq x4,x16,800008e4 + 800008d0: 6f1012ef jal x5,800027c0 + 800008d4: 800008c4 .word 0x800008c4 + 800008d8: 00000000 .word 0x00000000 + 800008dc: 80009273 .word 0x80009273 + 800008e0: 00000000 .word 0x00000000 + 800008e4: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x9b3426ad581622dc + 800008e8: 0000bb83 ld x23,0(x1) + 800008ec: 00808093 addi x1,x1,8 + +00000000800008f0 : +Zknh_sha512sum1_cg_cp_rd_b17: + sha512sum1 x17, x23 # perform operation + 800008f0: 105b9893 sha512sum1 x17,x23 + # Check if x17 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x17, Zknh_sha512sum1_cg_cp_rd_b17, Zknh_sha512sum1_cg_cp_rd_b17_str) + 800008f4: 000b3203 ld x4,0(x22) + 800008f8: 01120c63 beq x4,x17,80000910 + 800008fc: 6c5012ef jal x5,800027c0 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800092ab .word 0x800092ab + 8000090c: 00000000 .word 0x00000000 + 80000910: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x851557748ee3b147 + 80000914: 0000b603 ld x12,0(x1) + 80000918: 00808093 addi x1,x1,8 + +000000008000091c : +Zknh_sha512sum1_cg_cp_rd_b18: + sha512sum1 x18, x12 # perform operation + 8000091c: 10561913 sha512sum1 x18,x12 + # Check if x18 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x18, Zknh_sha512sum1_cg_cp_rd_b18, Zknh_sha512sum1_cg_cp_rd_b18_str) + 80000920: 000b3203 ld x4,0(x22) + 80000924: 01220c63 beq x4,x18,8000093c + 80000928: 699012ef jal x5,800027c0 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800092e3 .word 0x800092e3 + 80000938: 00000000 .word 0x00000000 + 8000093c: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x70c80bc240e6e5bb + 80000940: 0000bb83 ld x23,0(x1) + 80000944: 00808093 addi x1,x1,8 + +0000000080000948 : +Zknh_sha512sum1_cg_cp_rd_b19: + sha512sum1 x19, x23 # perform operation + 80000948: 105b9993 sha512sum1 x19,x23 + # Check if x19 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x19, Zknh_sha512sum1_cg_cp_rd_b19, Zknh_sha512sum1_cg_cp_rd_b19_str) + 8000094c: 000b3203 ld x4,0(x22) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000931b .word 0x8000931b + 80000964: 00000000 .word 0x00000000 + 80000968: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0xa853292751796dec + 8000096c: 0000be83 ld x29,0(x1) + 80000970: 00808093 addi x1,x1,8 + +0000000080000974 : +Zknh_sha512sum1_cg_cp_rd_b20: + sha512sum1 x20, x29 # perform operation + 80000974: 105e9a13 sha512sum1 x20,x29 + # Check if x20 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x20, Zknh_sha512sum1_cg_cp_rd_b20, Zknh_sha512sum1_cg_cp_rd_b20_str) + 80000978: 000b3203 ld x4,0(x22) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 80009353 .word 0x80009353 + 80000990: 00000000 .word 0x00000000 + 80000994: 008b0b13 addi x22,x22,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x13266f41c591de52 + 80000998: 0000b983 ld x19,0(x1) + 8000099c: 00808093 addi x1,x1,8 + +00000000800009a0 : +Zknh_sha512sum1_cg_cp_rd_b21: + sha512sum1 x21, x19 # perform operation + 800009a0: 10599a93 sha512sum1 x21,x19 + # Check if x21 contains the expected result. x22 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x22, x5, x4, x21, Zknh_sha512sum1_cg_cp_rd_b21, Zknh_sha512sum1_cg_cp_rd_b21_str) + 800009a4: 000b3203 ld x4,0(x22) + 800009a8: 01520c63 beq x4,x21,800009c0 + 800009ac: 615012ef jal x5,800027c0 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 8000938b .word 0x8000938b + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008b0b13 addi x22,x22,8 + + mv x26, x22 # switch signature pointer register to avoid conflict with test + 800009c4: 000b0d13 addi x26,x22,0 +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xc678d44ed39d575d + 800009c8: 0000bd83 ld x27,0(x1) + 800009cc: 00808093 addi x1,x1,8 + +00000000800009d0 : +Zknh_sha512sum1_cg_cp_rd_b22: + sha512sum1 x22, x27 # perform operation + 800009d0: 105d9b13 sha512sum1 x22,x27 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zknh_sha512sum1_cg_cp_rd_b22, Zknh_sha512sum1_cg_cp_rd_b22_str) + 800009d4: 000d3203 ld x4,0(x26) + 800009d8: 01620c63 beq x4,x22,800009f0 + 800009dc: 5e5012ef jal x5,800027c0 + 800009e0: 800009d0 .word 0x800009d0 + 800009e4: 00000000 .word 0x00000000 + 800009e8: 800093c3 .word 0x800093c3 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x4121f921e457f2bb + 800009f4: 0000ba03 ld x20,0(x1) + 800009f8: 00808093 addi x1,x1,8 + +00000000800009fc : +Zknh_sha512sum1_cg_cp_rd_b23: + sha512sum1 x23, x20 # perform operation + 800009fc: 105a1b93 sha512sum1 x23,x20 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zknh_sha512sum1_cg_cp_rd_b23, Zknh_sha512sum1_cg_cp_rd_b23_str) + 80000a00: 000d3203 ld x4,0(x26) + 80000a04: 01720c63 beq x4,x23,80000a1c + 80000a08: 5b9012ef jal x5,800027c0 + 80000a0c: 800009fc .word 0x800009fc + 80000a10: 00000000 .word 0x00000000 + 80000a14: 800093fb .word 0x800093fb + 80000a18: 00000000 .word 0x00000000 + 80000a1c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0xddcff5e36b1b77a6 + 80000a20: 0000b803 ld x16,0(x1) + 80000a24: 00808093 addi x1,x1,8 + +0000000080000a28 : +Zknh_sha512sum1_cg_cp_rd_b24: + sha512sum1 x24, x16 # perform operation + 80000a28: 10581c13 sha512sum1 x24,x16 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zknh_sha512sum1_cg_cp_rd_b24, Zknh_sha512sum1_cg_cp_rd_b24_str) + 80000a2c: 000d3203 ld x4,0(x26) + 80000a30: 01820c63 beq x4,x24,80000a48 + 80000a34: 58d012ef jal x5,800027c0 + 80000a38: 80000a28 .word 0x80000a28 + 80000a3c: 00000000 .word 0x00000000 + 80000a40: 80009433 .word 0x80009433 + 80000a44: 00000000 .word 0x00000000 + 80000a48: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xb80bcbd94523786a + 80000a4c: 0000b583 ld x11,0(x1) + 80000a50: 00808093 addi x1,x1,8 + +0000000080000a54 : +Zknh_sha512sum1_cg_cp_rd_b25: + sha512sum1 x25, x11 # perform operation + 80000a54: 10559c93 sha512sum1 x25,x11 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zknh_sha512sum1_cg_cp_rd_b25, Zknh_sha512sum1_cg_cp_rd_b25_str) + 80000a58: 000d3203 ld x4,0(x26) + 80000a5c: 01920c63 beq x4,x25,80000a74 + 80000a60: 561012ef jal x5,800027c0 + 80000a64: 80000a54 .word 0x80000a54 + 80000a68: 00000000 .word 0x00000000 + 80000a6c: 8000946b .word 0x8000946b + 80000a70: 00000000 .word 0x00000000 + 80000a74: 008d0d13 addi x26,x26,8 + + mv x25, x26 # switch signature pointer register to avoid conflict with test + 80000a78: 000d0c93 addi x25,x26,0 +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x84e353a56b62a335 + 80000a7c: 0000ba83 ld x21,0(x1) + 80000a80: 00808093 addi x1,x1,8 + +0000000080000a84 : +Zknh_sha512sum1_cg_cp_rd_b26: + sha512sum1 x26, x21 # perform operation + 80000a84: 105a9d13 sha512sum1 x26,x21 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zknh_sha512sum1_cg_cp_rd_b26, Zknh_sha512sum1_cg_cp_rd_b26_str) + 80000a88: 000cb203 ld x4,0(x25) + 80000a8c: 01a20c63 beq x4,x26,80000aa4 + 80000a90: 531012ef jal x5,800027c0 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 800094a3 .word 0x800094a3 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0x3c7536e507e8a745 + 80000aa8: 0000bd03 ld x26,0(x1) + 80000aac: 00808093 addi x1,x1,8 + +0000000080000ab0 : +Zknh_sha512sum1_cg_cp_rd_b27: + sha512sum1 x27, x26 # perform operation + 80000ab0: 105d1d93 sha512sum1 x27,x26 + # Check if x27 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x27, Zknh_sha512sum1_cg_cp_rd_b27, Zknh_sha512sum1_cg_cp_rd_b27_str) + 80000ab4: 000cb203 ld x4,0(x25) + 80000ab8: 01b20c63 beq x4,x27,80000ad0 + 80000abc: 505012ef jal x5,800027c0 + 80000ac0: 80000ab0 .word 0x80000ab0 + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 800094db .word 0x800094db + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x932b123def79a80e + 80000ad4: 0000b183 ld x3,0(x1) + 80000ad8: 00808093 addi x1,x1,8 + +0000000080000adc : +Zknh_sha512sum1_cg_cp_rd_b28: + sha512sum1 x28, x3 # perform operation + 80000adc: 10519e13 sha512sum1 x28,x3 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zknh_sha512sum1_cg_cp_rd_b28, Zknh_sha512sum1_cg_cp_rd_b28_str) + 80000ae0: 000cb203 ld x4,0(x25) + 80000ae4: 01c20c63 beq x4,x28,80000afc + 80000ae8: 4d9012ef jal x5,800027c0 + 80000aec: 80000adc .word 0x80000adc + 80000af0: 00000000 .word 0x00000000 + 80000af4: 80009513 .word 0x80009513 + 80000af8: 00000000 .word 0x00000000 + 80000afc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x8841bc8e15bc30a0 + 80000b00: 0000b503 ld x10,0(x1) + 80000b04: 00808093 addi x1,x1,8 + +0000000080000b08 : +Zknh_sha512sum1_cg_cp_rd_b29: + sha512sum1 x29, x10 # perform operation + 80000b08: 10551e93 sha512sum1 x29,x10 + # Check if x29 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x29, Zknh_sha512sum1_cg_cp_rd_b29, Zknh_sha512sum1_cg_cp_rd_b29_str) + 80000b0c: 000cb203 ld x4,0(x25) + 80000b10: 01d20c63 beq x4,x29,80000b28 + 80000b14: 4ad012ef jal x5,800027c0 + 80000b18: 80000b08 .word 0x80000b08 + 80000b1c: 00000000 .word 0x00000000 + 80000b20: 8000954b .word 0x8000954b + 80000b24: 00000000 .word 0x00000000 + 80000b28: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xaba0a6857af42b37 + 80000b2c: 0000bd83 ld x27,0(x1) + 80000b30: 00808093 addi x1,x1,8 + +0000000080000b34 : +Zknh_sha512sum1_cg_cp_rd_b30: + sha512sum1 x30, x27 # perform operation + 80000b34: 105d9f13 sha512sum1 x30,x27 + # Check if x30 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x30, Zknh_sha512sum1_cg_cp_rd_b30, Zknh_sha512sum1_cg_cp_rd_b30_str) + 80000b38: 000cb203 ld x4,0(x25) + 80000b3c: 01e20c63 beq x4,x30,80000b54 + 80000b40: 481012ef jal x5,800027c0 + 80000b44: 80000b34 .word 0x80000b34 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 80009583 .word 0x80009583 + 80000b50: 00000000 .word 0x00000000 + 80000b54: 008c8c93 addi x25,x25,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0x70cebb15457d2008 + 80000b58: 0000b583 ld x11,0(x1) + 80000b5c: 00808093 addi x1,x1,8 + +0000000080000b60 : +Zknh_sha512sum1_cg_cp_rd_b31: + sha512sum1 x31, x11 # perform operation + 80000b60: 10559f93 sha512sum1 x31,x11 + # Check if x31 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x31, Zknh_sha512sum1_cg_cp_rd_b31, Zknh_sha512sum1_cg_cp_rd_b31_str) + 80000b64: 000cb203 ld x4,0(x25) + 80000b68: 01f20c63 beq x4,x31,80000b80 + 80000b6c: 455012ef jal x5,800027c0 + 80000b70: 80000b60 .word 0x80000b60 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 800095bb .word 0x800095bb + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x0000000000000000 + 80000b84: 0000b403 ld x8,0(x1) + 80000b88: 00808093 addi x1,x1,8 + +0000000080000b8c : +Zknh_sha512sum1_cg_cp_rs1_edges_0x0: + sha512sum1 x9, x8 # perform operation + 80000b8c: 10541493 sha512sum1 x9,x8 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha512sum1_cg_cp_rs1_edges_0x0, Zknh_sha512sum1_cg_cp_rs1_edges_0x0_str) + 80000b90: 000cb203 ld x4,0(x25) + 80000b94: 00920c63 beq x4,x9,80000bac + 80000b98: 429012ef jal x5,800027c0 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 800095f3 .word 0x800095f3 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0x0000000000000001 + 80000bb0: 0000b903 ld x18,0(x1) + 80000bb4: 00808093 addi x1,x1,8 + +0000000080000bb8 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x1: + sha512sum1 x26, x18 # perform operation + 80000bb8: 10591d13 sha512sum1 x26,x18 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zknh_sha512sum1_cg_cp_rs1_edges_0x1, Zknh_sha512sum1_cg_cp_rs1_edges_0x1_str) + 80000bbc: 000cb203 ld x4,0(x25) + 80000bc0: 01a20c63 beq x4,x26,80000bd8 + 80000bc4: 3fd012ef jal x5,800027c0 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 80009632 .word 0x80009632 + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x0000000000000002 + 80000bdc: 0000be83 ld x29,0(x1) + 80000be0: 00808093 addi x1,x1,8 + +0000000080000be4 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x2: + sha512sum1 x11, x29 # perform operation + 80000be4: 105e9593 sha512sum1 x11,x29 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zknh_sha512sum1_cg_cp_rs1_edges_0x2, Zknh_sha512sum1_cg_cp_rs1_edges_0x2_str) + 80000be8: 000cb203 ld x4,0(x25) + 80000bec: 00b20c63 beq x4,x11,80000c04 + 80000bf0: 3d1012ef jal x5,800027c0 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80009671 .word 0x80009671 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x8000000000000000 + 80000c08: 0000b603 ld x12,0(x1) + 80000c0c: 00808093 addi x1,x1,8 + +0000000080000c10 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000000: + sha512sum1 x9, x12 # perform operation + 80000c10: 10561493 sha512sum1 x9,x12 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000000, Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c14: 000cb203 ld x4,0(x25) + 80000c18: 00920c63 beq x4,x9,80000c30 + 80000c1c: 3a5012ef jal x5,800027c0 + 80000c20: 80000c10 .word 0x80000c10 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 800096b0 .word 0x800096b0 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x8000000000000001 + 80000c34: 0000bf83 ld x31,0(x1) + 80000c38: 00808093 addi x1,x1,8 + +0000000080000c3c : +Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000001: + sha512sum1 x12, x31 # perform operation + 80000c3c: 105f9613 sha512sum1 x12,x31 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000001, Zknh_sha512sum1_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c40: 000cb203 ld x4,0(x25) + 80000c44: 00c20c63 beq x4,x12,80000c5c + 80000c48: 379012ef jal x5,800027c0 + 80000c4c: 80000c3c .word 0x80000c3c + 80000c50: 00000000 .word 0x00000000 + 80000c54: 800096fe .word 0x800096fe + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x7fffffffffffffff + 80000c60: 0000b403 ld x8,0(x1) + 80000c64: 00808093 addi x1,x1,8 + +0000000080000c68 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x7fffffffffffffff: + sha512sum1 x15, x8 # perform operation + 80000c68: 10541793 sha512sum1 x15,x8 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknh_sha512sum1_cg_cp_rs1_edges_0x7fffffffffffffff, Zknh_sha512sum1_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c6c: 000cb203 ld x4,0(x25) + 80000c70: 00f20c63 beq x4,x15,80000c88 + 80000c74: 34d012ef jal x5,800027c0 + 80000c78: 80000c68 .word 0x80000c68 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 8000974c .word 0x8000974c + 80000c84: 00000000 .word 0x00000000 + 80000c88: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80000c8c: 0000ba03 ld x20,0(x1) + 80000c90: 00808093 addi x1,x1,8 + +0000000080000c94 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x7ffffffffffffffe: + sha512sum1 x28, x20 # perform operation + 80000c94: 105a1e13 sha512sum1 x28,x20 + # Check if x28 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x28, Zknh_sha512sum1_cg_cp_rs1_edges_0x7ffffffffffffffe, Zknh_sha512sum1_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c98: 000cb203 ld x4,0(x25) + 80000c9c: 01c20c63 beq x4,x28,80000cb4 + 80000ca0: 321012ef jal x5,800027c0 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000979a .word 0x8000979a + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0xffffffffffffffff + 80000cb8: 0000bf83 ld x31,0(x1) + 80000cbc: 00808093 addi x1,x1,8 + +0000000080000cc0 : +Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffffffffffff: + sha512sum1 x19, x31 # perform operation + 80000cc0: 105f9993 sha512sum1 x19,x31 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffffffffffff, Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc4: 000cb203 ld x4,0(x25) + 80000cc8: 01320c63 beq x4,x19,80000ce0 + 80000ccc: 2f5012ef jal x5,800027c0 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 800097e8 .word 0x800097e8 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0xfffffffffffffffe + 80000ce4: 0000b503 ld x10,0(x1) + 80000ce8: 00808093 addi x1,x1,8 + +0000000080000cec : +Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffffffffffe: + sha512sum1 x6, x10 # perform operation + 80000cec: 10551313 sha512sum1 x6,x10 + # Check if x6 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x6, Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffffffffffe, Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf0: 000cb203 ld x4,0(x25) + 80000cf4: 00620c63 beq x4,x6,80000d0c + 80000cf8: 2c9012ef jal x5,800027c0 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 80009836 .word 0x80009836 + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x5bbc887763ae86f2 + 80000d10: 0000ba03 ld x20,0(x1) + 80000d14: 00808093 addi x1,x1,8 + +0000000080000d18 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sha512sum1 x3, x20 # perform operation + 80000d18: 105a1193 sha512sum1 x3,x20 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknh_sha512sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zknh_sha512sum1_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d1c: 000cb203 ld x4,0(x25) + 80000d20: 00320c63 beq x4,x3,80000d38 + 80000d24: 29d012ef jal x5,800027c0 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 80009884 .word 0x80009884 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80000d3c: 0000b683 ld x13,0(x1) + 80000d40: 00808093 addi x1,x1,8 + +0000000080000d44 : +Zknh_sha512sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sha512sum1 x2, x13 # perform operation + 80000d44: 10569113 sha512sum1 x2,x13 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknh_sha512sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zknh_sha512sum1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d48: 000cb203 ld x4,0(x25) + 80000d4c: 00220c63 beq x4,x2,80000d64 + 80000d50: 271012ef jal x5,800027c0 + 80000d54: 80000d44 .word 0x80000d44 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 800098d2 .word 0x800098d2 + 80000d60: 00000000 .word 0x00000000 + 80000d64: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x5555555555555555 + 80000d68: 0000b683 ld x13,0(x1) + 80000d6c: 00808093 addi x1,x1,8 + +0000000080000d70 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x5555555555555555: + sha512sum1 x26, x13 # perform operation + 80000d70: 10569d13 sha512sum1 x26,x13 + # Check if x26 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x26, Zknh_sha512sum1_cg_cp_rs1_edges_0x5555555555555555, Zknh_sha512sum1_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d74: 000cb203 ld x4,0(x25) + 80000d78: 01a20c63 beq x4,x26,80000d90 + 80000d7c: 245012ef jal x5,800027c0 + 80000d80: 80000d70 .word 0x80000d70 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 80009920 .word 0x80009920 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x00000000ffffffff + 80000d94: 0000b303 ld x6,0(x1) + 80000d98: 00808093 addi x1,x1,8 + +0000000080000d9c : +Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffff: + sha512sum1 x20, x6 # perform operation + 80000d9c: 10531a13 sha512sum1 x20,x6 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffff, Zknh_sha512sum1_cg_cp_rs1_edges_0xffffffff_str) + 80000da0: 000cb203 ld x4,0(x25) + 80000da4: 01420c63 beq x4,x20,80000dbc + 80000da8: 219012ef jal x5,800027c0 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 8000996e .word 0x8000996e + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0x00000000fffffffe + 80000dc0: 0000bb03 ld x22,0(x1) + 80000dc4: 00808093 addi x1,x1,8 + +0000000080000dc8 : +Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffe: + sha512sum1 x3, x22 # perform operation + 80000dc8: 105b1193 sha512sum1 x3,x22 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffe, Zknh_sha512sum1_cg_cp_rs1_edges_0xfffffffe_str) + 80000dcc: 000cb203 ld x4,0(x25) + 80000dd0: 00320c63 beq x4,x3,80000de8 + 80000dd4: 1ed012ef jal x5,800027c0 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 800099b4 .word 0x800099b4 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0x0000000100000000 + 80000dec: 0000b983 ld x19,0(x1) + 80000df0: 00808093 addi x1,x1,8 + +0000000080000df4 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x100000000: + sha512sum1 x22, x19 # perform operation + 80000df4: 10599b13 sha512sum1 x22,x19 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknh_sha512sum1_cg_cp_rs1_edges_0x100000000, Zknh_sha512sum1_cg_cp_rs1_edges_0x100000000_str) + 80000df8: 000cb203 ld x4,0(x25) + 80000dfc: 01620c63 beq x4,x22,80000e14 + 80000e00: 1c1012ef jal x5,800027c0 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 800099fa .word 0x800099fa + 80000e10: 00000000 .word 0x00000000 + 80000e14: 008c8c93 addi x25,x25,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0x0000000100000001 + 80000e18: 0000b303 ld x6,0(x1) + 80000e1c: 00808093 addi x1,x1,8 + +0000000080000e20 : +Zknh_sha512sum1_cg_cp_rs1_edges_0x100000001: + sha512sum1 x18, x6 # perform operation + 80000e20: 10531913 sha512sum1 x18,x6 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknh_sha512sum1_cg_cp_rs1_edges_0x100000001, Zknh_sha512sum1_cg_cp_rs1_edges_0x100000001_str) + 80000e24: 000cb203 ld x4,0(x25) + 80000e28: 01220c63 beq x4,x18,80000e40 + 80000e2c: 195012ef jal x5,800027c0 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 80009a41 .word 0x80009a41 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 008c8c93 addi x25,x25,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x0) # load rs1: x0 = 0x627ae81f516f25d3 + 80000e44: 0000b003 ld x0,0(x1) + 80000e48: 00808093 addi x1,x1,8 + +0000000080000e4c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b0: + sha512sum1 x0, x0 # perform operation + 80000e4c: 10501013 sha512sum1 x0,x0 + # Check if x0 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x0, Zknh_sha512sum1_cg_cmp_rd_rs1_b0, Zknh_sha512sum1_cg_cmp_rd_rs1_b0_str) + 80000e50: 000cb203 ld x4,0(x25) + 80000e54: 00020c63 beq x4,x0,80000e6c + 80000e58: 169012ef jal x5,800027c0 + 80000e5c: 80000e4c .word 0x80000e4c + 80000e60: 00000000 .word 0x00000000 + 80000e64: 80009a88 .word 0x80009a88 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 008c8c93 addi x25,x25,8 + + mv x17, x1 # switch data pointer register to avoid conflict with test + 80000e70: 00008893 addi x17,x1,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x4718279ae1d5236f + 80000e74: 0008b083 ld x1,0(x17) + 80000e78: 00888893 addi x17,x17,8 + +0000000080000e7c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b1: + sha512sum1 x1, x1 # perform operation + 80000e7c: 10509093 sha512sum1 x1,x1 + # Check if x1 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x1, Zknh_sha512sum1_cg_cmp_rd_rs1_b1, Zknh_sha512sum1_cg_cmp_rd_rs1_b1_str) + 80000e80: 000cb203 ld x4,0(x25) + 80000e84: 00120c63 beq x4,x1,80000e9c + 80000e88: 139012ef jal x5,800027c0 + 80000e8c: 80000e7c .word 0x80000e7c + 80000e90: 00000000 .word 0x00000000 + 80000e94: 80009ac4 .word 0x80009ac4 + 80000e98: 00000000 .word 0x00000000 + 80000e9c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xb75e072b8dd4ca6e + 80000ea0: 0008b103 ld x2,0(x17) + 80000ea4: 00888893 addi x17,x17,8 + +0000000080000ea8 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b2: + sha512sum1 x2, x2 # perform operation + 80000ea8: 10511113 sha512sum1 x2,x2 + # Check if x2 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x2, Zknh_sha512sum1_cg_cmp_rd_rs1_b2, Zknh_sha512sum1_cg_cmp_rd_rs1_b2_str) + 80000eac: 000cb203 ld x4,0(x25) + 80000eb0: 00220c63 beq x4,x2,80000ec8 + 80000eb4: 10d012ef jal x5,800027c0 + 80000eb8: 80000ea8 .word 0x80000ea8 + 80000ebc: 00000000 .word 0x00000000 + 80000ec0: 80009b00 .word 0x80009b00 + 80000ec4: 00000000 .word 0x00000000 + 80000ec8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7bfd862c432db072 + 80000ecc: 0008b183 ld x3,0(x17) + 80000ed0: 00888893 addi x17,x17,8 + +0000000080000ed4 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b3: + sha512sum1 x3, x3 # perform operation + 80000ed4: 10519193 sha512sum1 x3,x3 + # Check if x3 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x3, Zknh_sha512sum1_cg_cmp_rd_rs1_b3, Zknh_sha512sum1_cg_cmp_rd_rs1_b3_str) + 80000ed8: 000cb203 ld x4,0(x25) + 80000edc: 00320c63 beq x4,x3,80000ef4 + 80000ee0: 0e1012ef jal x5,800027c0 + 80000ee4: 80000ed4 .word 0x80000ed4 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 80009b3c .word 0x80009b3c + 80000ef0: 00000000 .word 0x00000000 + 80000ef4: 008c8c93 addi x25,x25,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000ef8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000efc: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0x92c16b63a08bd8b5 + 80000f00: 0008b203 ld x4,0(x17) + 80000f04: 00888893 addi x17,x17,8 + +0000000080000f08 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b4: + sha512sum1 x4, x4 # perform operation + 80000f08: 10521213 sha512sum1 x4,x4 + # Check if x4 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x4, Zknh_sha512sum1_cg_cmp_rd_rs1_b4, Zknh_sha512sum1_cg_cmp_rd_rs1_b4_str) + 80000f0c: 000cb383 ld x7,0(x25) + 80000f10: 00438c63 beq x7,x4,80000f28 + 80000f14: 0c50146f jal x8,800027d8 + 80000f18: 80000f08 .word 0x80000f08 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 80009b78 .word 0x80009b78 + 80000f24: 00000000 .word 0x00000000 + 80000f28: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0xea5660a7a3e1e714 + 80000f2c: 0008b283 ld x5,0(x17) + 80000f30: 00888893 addi x17,x17,8 + +0000000080000f34 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b5: + sha512sum1 x5, x5 # perform operation + 80000f34: 10529293 sha512sum1 x5,x5 + # Check if x5 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x5, Zknh_sha512sum1_cg_cmp_rd_rs1_b5, Zknh_sha512sum1_cg_cmp_rd_rs1_b5_str) + 80000f38: 000cb383 ld x7,0(x25) + 80000f3c: 00538c63 beq x7,x5,80000f54 + 80000f40: 0990146f jal x8,800027d8 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 80009bb4 .word 0x80009bb4 + 80000f50: 00000000 .word 0x00000000 + 80000f54: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x20dfa328046ee9ec + 80000f58: 0008b303 ld x6,0(x17) + 80000f5c: 00888893 addi x17,x17,8 + +0000000080000f60 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b6: + sha512sum1 x6, x6 # perform operation + 80000f60: 10531313 sha512sum1 x6,x6 + # Check if x6 contains the expected result. x25 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x25, x8, x7, x6, Zknh_sha512sum1_cg_cmp_rd_rs1_b6, Zknh_sha512sum1_cg_cmp_rd_rs1_b6_str) + 80000f64: 000cb383 ld x7,0(x25) + 80000f68: 00638c63 beq x7,x6,80000f80 + 80000f6c: 06d0146f jal x8,800027d8 + 80000f70: 80000f60 .word 0x80000f60 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 80009bf0 .word 0x80009bf0 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 008c8c93 addi x25,x25,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000f84: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000f88: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x7bf20f65d2a14e51 + 80000f8c: 0008b383 ld x7,0(x17) + 80000f90: 00888893 addi x17,x17,8 + +0000000080000f94 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b7: + sha512sum1 x7, x7 # perform operation + 80000f94: 10539393 sha512sum1 x7,x7 + # Check if x7 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x7, Zknh_sha512sum1_cg_cmp_rd_rs1_b7, Zknh_sha512sum1_cg_cmp_rd_rs1_b7_str) + 80000f98: 000cb203 ld x4,0(x25) + 80000f9c: 00720c63 beq x4,x7,80000fb4 + 80000fa0: 021012ef jal x5,800027c0 + 80000fa4: 80000f94 .word 0x80000f94 + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 80009c2c .word 0x80009c2c + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x3586e65bee99b3bd + 80000fb8: 0008b403 ld x8,0(x17) + 80000fbc: 00888893 addi x17,x17,8 + +0000000080000fc0 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b8: + sha512sum1 x8, x8 # perform operation + 80000fc0: 10541413 sha512sum1 x8,x8 + # Check if x8 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x8, Zknh_sha512sum1_cg_cmp_rd_rs1_b8, Zknh_sha512sum1_cg_cmp_rd_rs1_b8_str) + 80000fc4: 000cb203 ld x4,0(x25) + 80000fc8: 00820c63 beq x4,x8,80000fe0 + 80000fcc: 7f4012ef jal x5,800027c0 + 80000fd0: 80000fc0 .word 0x80000fc0 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 80009c68 .word 0x80009c68 + 80000fdc: 00000000 .word 0x00000000 + 80000fe0: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x2c845868c8a9dd64 + 80000fe4: 0008b483 ld x9,0(x17) + 80000fe8: 00888893 addi x17,x17,8 + +0000000080000fec : +Zknh_sha512sum1_cg_cmp_rd_rs1_b9: + sha512sum1 x9, x9 # perform operation + 80000fec: 10549493 sha512sum1 x9,x9 + # Check if x9 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x9, Zknh_sha512sum1_cg_cmp_rd_rs1_b9, Zknh_sha512sum1_cg_cmp_rd_rs1_b9_str) + 80000ff0: 000cb203 ld x4,0(x25) + 80000ff4: 00920c63 beq x4,x9,8000100c + 80000ff8: 7c8012ef jal x5,800027c0 + 80000ffc: 80000fec .word 0x80000fec + 80001000: 00000000 .word 0x00000000 + 80001004: 80009ca4 .word 0x80009ca4 + 80001008: 00000000 .word 0x00000000 + 8000100c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x6cad5dcdd6d030ac + 80001010: 0008b503 ld x10,0(x17) + 80001014: 00888893 addi x17,x17,8 + +0000000080001018 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b10: + sha512sum1 x10, x10 # perform operation + 80001018: 10551513 sha512sum1 x10,x10 + # Check if x10 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x10, Zknh_sha512sum1_cg_cmp_rd_rs1_b10, Zknh_sha512sum1_cg_cmp_rd_rs1_b10_str) + 8000101c: 000cb203 ld x4,0(x25) + 80001020: 00a20c63 beq x4,x10,80001038 + 80001024: 79c012ef jal x5,800027c0 + 80001028: 80001018 .word 0x80001018 + 8000102c: 00000000 .word 0x00000000 + 80001030: 80009ce0 .word 0x80009ce0 + 80001034: 00000000 .word 0x00000000 + 80001038: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xb7cd683a0aa5eca9 + 8000103c: 0008b583 ld x11,0(x17) + 80001040: 00888893 addi x17,x17,8 + +0000000080001044 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b11: + sha512sum1 x11, x11 # perform operation + 80001044: 10559593 sha512sum1 x11,x11 + # Check if x11 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x11, Zknh_sha512sum1_cg_cmp_rd_rs1_b11, Zknh_sha512sum1_cg_cmp_rd_rs1_b11_str) + 80001048: 000cb203 ld x4,0(x25) + 8000104c: 00b20c63 beq x4,x11,80001064 + 80001050: 770012ef jal x5,800027c0 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 80009d1d .word 0x80009d1d + 80001060: 00000000 .word 0x00000000 + 80001064: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xe1101670d546165e + 80001068: 0008b603 ld x12,0(x17) + 8000106c: 00888893 addi x17,x17,8 + +0000000080001070 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b12: + sha512sum1 x12, x12 # perform operation + 80001070: 10561613 sha512sum1 x12,x12 + # Check if x12 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x12, Zknh_sha512sum1_cg_cmp_rd_rs1_b12, Zknh_sha512sum1_cg_cmp_rd_rs1_b12_str) + 80001074: 000cb203 ld x4,0(x25) + 80001078: 00c20c63 beq x4,x12,80001090 + 8000107c: 744012ef jal x5,800027c0 + 80001080: 80001070 .word 0x80001070 + 80001084: 00000000 .word 0x00000000 + 80001088: 80009d5a .word 0x80009d5a + 8000108c: 00000000 .word 0x00000000 + 80001090: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x3b8cd1181fa88cae + 80001094: 0008b683 ld x13,0(x17) + 80001098: 00888893 addi x17,x17,8 + +000000008000109c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b13: + sha512sum1 x13, x13 # perform operation + 8000109c: 10569693 sha512sum1 x13,x13 + # Check if x13 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x13, Zknh_sha512sum1_cg_cmp_rd_rs1_b13, Zknh_sha512sum1_cg_cmp_rd_rs1_b13_str) + 800010a0: 000cb203 ld x4,0(x25) + 800010a4: 00d20c63 beq x4,x13,800010bc + 800010a8: 718012ef jal x5,800027c0 + 800010ac: 8000109c .word 0x8000109c + 800010b0: 00000000 .word 0x00000000 + 800010b4: 80009d97 .word 0x80009d97 + 800010b8: 00000000 .word 0x00000000 + 800010bc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xcce6da4419b21c7a + 800010c0: 0008b703 ld x14,0(x17) + 800010c4: 00888893 addi x17,x17,8 + +00000000800010c8 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b14: + sha512sum1 x14, x14 # perform operation + 800010c8: 10571713 sha512sum1 x14,x14 + # Check if x14 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x14, Zknh_sha512sum1_cg_cmp_rd_rs1_b14, Zknh_sha512sum1_cg_cmp_rd_rs1_b14_str) + 800010cc: 000cb203 ld x4,0(x25) + 800010d0: 00e20c63 beq x4,x14,800010e8 + 800010d4: 6ec012ef jal x5,800027c0 + 800010d8: 800010c8 .word 0x800010c8 + 800010dc: 00000000 .word 0x00000000 + 800010e0: 80009dd4 .word 0x80009dd4 + 800010e4: 00000000 .word 0x00000000 + 800010e8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x3e83831cd0fa41bf + 800010ec: 0008b783 ld x15,0(x17) + 800010f0: 00888893 addi x17,x17,8 + +00000000800010f4 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b15: + sha512sum1 x15, x15 # perform operation + 800010f4: 10579793 sha512sum1 x15,x15 + # Check if x15 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x15, Zknh_sha512sum1_cg_cmp_rd_rs1_b15, Zknh_sha512sum1_cg_cmp_rd_rs1_b15_str) + 800010f8: 000cb203 ld x4,0(x25) + 800010fc: 00f20c63 beq x4,x15,80001114 + 80001100: 6c0012ef jal x5,800027c0 + 80001104: 800010f4 .word 0x800010f4 + 80001108: 00000000 .word 0x00000000 + 8000110c: 80009e11 .word 0x80009e11 + 80001110: 00000000 .word 0x00000000 + 80001114: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xbf6532effa974406 + 80001118: 0008b803 ld x16,0(x17) + 8000111c: 00888893 addi x17,x17,8 + +0000000080001120 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b16: + sha512sum1 x16, x16 # perform operation + 80001120: 10581813 sha512sum1 x16,x16 + # Check if x16 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x16, Zknh_sha512sum1_cg_cmp_rd_rs1_b16, Zknh_sha512sum1_cg_cmp_rd_rs1_b16_str) + 80001124: 000cb203 ld x4,0(x25) + 80001128: 01020c63 beq x4,x16,80001140 + 8000112c: 694012ef jal x5,800027c0 + 80001130: 80001120 .word 0x80001120 + 80001134: 00000000 .word 0x00000000 + 80001138: 80009e4e .word 0x80009e4e + 8000113c: 00000000 .word 0x00000000 + 80001140: 008c8c93 addi x25,x25,8 + + mv x28, x17 # switch data pointer register to avoid conflict with test + 80001144: 00088e13 addi x28,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x28, x17) # load rs1: x17 = 0x9536421061be98bb + 80001148: 000e3883 ld x17,0(x28) + 8000114c: 008e0e13 addi x28,x28,8 + +0000000080001150 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b17: + sha512sum1 x17, x17 # perform operation + 80001150: 10589893 sha512sum1 x17,x17 + # Check if x17 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x17, Zknh_sha512sum1_cg_cmp_rd_rs1_b17, Zknh_sha512sum1_cg_cmp_rd_rs1_b17_str) + 80001154: 000cb203 ld x4,0(x25) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009e8b .word 0x80009e8b + 8000116c: 00000000 .word 0x00000000 + 80001170: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x28, x18) # load rs1: x18 = 0x009b989194ff27a0 + 80001174: 000e3903 ld x18,0(x28) + 80001178: 008e0e13 addi x28,x28,8 + +000000008000117c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b18: + sha512sum1 x18, x18 # perform operation + 8000117c: 10591913 sha512sum1 x18,x18 + # Check if x18 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x18, Zknh_sha512sum1_cg_cmp_rd_rs1_b18, Zknh_sha512sum1_cg_cmp_rd_rs1_b18_str) + 80001180: 000cb203 ld x4,0(x25) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009ec8 .word 0x80009ec8 + 80001198: 00000000 .word 0x00000000 + 8000119c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x28, x19) # load rs1: x19 = 0x8a8904a8e4a5b619 + 800011a0: 000e3983 ld x19,0(x28) + 800011a4: 008e0e13 addi x28,x28,8 + +00000000800011a8 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b19: + sha512sum1 x19, x19 # perform operation + 800011a8: 10599993 sha512sum1 x19,x19 + # Check if x19 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x19, Zknh_sha512sum1_cg_cmp_rd_rs1_b19, Zknh_sha512sum1_cg_cmp_rd_rs1_b19_str) + 800011ac: 000cb203 ld x4,0(x25) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009f05 .word 0x80009f05 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xadd9d2db1d258253 + 800011cc: 000e3a03 ld x20,0(x28) + 800011d0: 008e0e13 addi x28,x28,8 + +00000000800011d4 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b20: + sha512sum1 x20, x20 # perform operation + 800011d4: 105a1a13 sha512sum1 x20,x20 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zknh_sha512sum1_cg_cmp_rd_rs1_b20, Zknh_sha512sum1_cg_cmp_rd_rs1_b20_str) + 800011d8: 000cb203 ld x4,0(x25) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009f43 .word 0x80009f43 + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0xbc118a614c2a0969 + 800011f8: 000e3a83 ld x21,0(x28) + 800011fc: 008e0e13 addi x28,x28,8 + +0000000080001200 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b21: + sha512sum1 x21, x21 # perform operation + 80001200: 105a9a93 sha512sum1 x21,x21 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zknh_sha512sum1_cg_cmp_rd_rs1_b21, Zknh_sha512sum1_cg_cmp_rd_rs1_b21_str) + 80001204: 000cb203 ld x4,0(x25) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 5b4012ef jal x5,800027c0 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009f81 .word 0x80009f81 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0xa526598fa4c66660 + 80001224: 000e3b03 ld x22,0(x28) + 80001228: 008e0e13 addi x28,x28,8 + +000000008000122c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b22: + sha512sum1 x22, x22 # perform operation + 8000122c: 105b1b13 sha512sum1 x22,x22 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zknh_sha512sum1_cg_cmp_rd_rs1_b22, Zknh_sha512sum1_cg_cmp_rd_rs1_b22_str) + 80001230: 000cb203 ld x4,0(x25) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 588012ef jal x5,800027c0 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009fbf .word 0x80009fbf + 80001248: 00000000 .word 0x00000000 + 8000124c: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x36679ba53a810703 + 80001250: 000e3b83 ld x23,0(x28) + 80001254: 008e0e13 addi x28,x28,8 + +0000000080001258 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b23: + sha512sum1 x23, x23 # perform operation + 80001258: 105b9b93 sha512sum1 x23,x23 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zknh_sha512sum1_cg_cmp_rd_rs1_b23, Zknh_sha512sum1_cg_cmp_rd_rs1_b23_str) + 8000125c: 000cb203 ld x4,0(x25) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 55c012ef jal x5,800027c0 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80009ffd .word 0x80009ffd + 80001274: 00000000 .word 0x00000000 + 80001278: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xcc17ac043e6a6102 + 8000127c: 000e3c03 ld x24,0(x28) + 80001280: 008e0e13 addi x28,x28,8 + +0000000080001284 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b24: + sha512sum1 x24, x24 # perform operation + 80001284: 105c1c13 sha512sum1 x24,x24 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zknh_sha512sum1_cg_cmp_rd_rs1_b24, Zknh_sha512sum1_cg_cmp_rd_rs1_b24_str) + 80001288: 000cb203 ld x4,0(x25) + 8000128c: 01820c63 beq x4,x24,800012a4 + 80001290: 530012ef jal x5,800027c0 + 80001294: 80001284 .word 0x80001284 + 80001298: 00000000 .word 0x00000000 + 8000129c: 8000a03b .word 0x8000a03b + 800012a0: 00000000 .word 0x00000000 + 800012a4: 008c8c93 addi x25,x25,8 + + mv x17, x25 # switch signature pointer register to avoid conflict with test + 800012a8: 000c8893 addi x17,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x2627683324373137 + 800012ac: 000e3c83 ld x25,0(x28) + 800012b0: 008e0e13 addi x28,x28,8 + +00000000800012b4 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b25: + sha512sum1 x25, x25 # perform operation + 800012b4: 105c9c93 sha512sum1 x25,x25 + # Check if x25 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x25, Zknh_sha512sum1_cg_cmp_rd_rs1_b25, Zknh_sha512sum1_cg_cmp_rd_rs1_b25_str) + 800012b8: 0008b203 ld x4,0(x17) + 800012bc: 01920c63 beq x4,x25,800012d4 + 800012c0: 500012ef jal x5,800027c0 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 8000a079 .word 0x8000a079 + 800012d0: 00000000 .word 0x00000000 + 800012d4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0x04841311ce16c079 + 800012d8: 000e3d03 ld x26,0(x28) + 800012dc: 008e0e13 addi x28,x28,8 + +00000000800012e0 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b26: + sha512sum1 x26, x26 # perform operation + 800012e0: 105d1d13 sha512sum1 x26,x26 + # Check if x26 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x26, Zknh_sha512sum1_cg_cmp_rd_rs1_b26, Zknh_sha512sum1_cg_cmp_rd_rs1_b26_str) + 800012e4: 0008b203 ld x4,0(x17) + 800012e8: 01a20c63 beq x4,x26,80001300 + 800012ec: 4d4012ef jal x5,800027c0 + 800012f0: 800012e0 .word 0x800012e0 + 800012f4: 00000000 .word 0x00000000 + 800012f8: 8000a0b7 .word 0x8000a0b7 + 800012fc: 00000000 .word 0x00000000 + 80001300: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x4a53b7811be23d70 + 80001304: 000e3d83 ld x27,0(x28) + 80001308: 008e0e13 addi x28,x28,8 + +000000008000130c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b27: + sha512sum1 x27, x27 # perform operation + 8000130c: 105d9d93 sha512sum1 x27,x27 + # Check if x27 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x27, Zknh_sha512sum1_cg_cmp_rd_rs1_b27, Zknh_sha512sum1_cg_cmp_rd_rs1_b27_str) + 80001310: 0008b203 ld x4,0(x17) + 80001314: 01b20c63 beq x4,x27,8000132c + 80001318: 4a8012ef jal x5,800027c0 + 8000131c: 8000130c .word 0x8000130c + 80001320: 00000000 .word 0x00000000 + 80001324: 8000a0f5 .word 0x8000a0f5 + 80001328: 00000000 .word 0x00000000 + 8000132c: 00888893 addi x17,x17,8 + + mv x9, x28 # switch data pointer register to avoid conflict with test + 80001330: 000e0493 addi x9,x28,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x9, x28) # load rs1: x28 = 0xce611cea89235631 + 80001334: 0004be03 ld x28,0(x9) + 80001338: 00848493 addi x9,x9,8 + +000000008000133c : +Zknh_sha512sum1_cg_cmp_rd_rs1_b28: + sha512sum1 x28, x28 # perform operation + 8000133c: 105e1e13 sha512sum1 x28,x28 + # Check if x28 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x28, Zknh_sha512sum1_cg_cmp_rd_rs1_b28, Zknh_sha512sum1_cg_cmp_rd_rs1_b28_str) + 80001340: 0008b203 ld x4,0(x17) + 80001344: 01c20c63 beq x4,x28,8000135c + 80001348: 478012ef jal x5,800027c0 + 8000134c: 8000133c .word 0x8000133c + 80001350: 00000000 .word 0x00000000 + 80001354: 8000a133 .word 0x8000a133 + 80001358: 00000000 .word 0x00000000 + 8000135c: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x9, x29) # load rs1: x29 = 0xe82b1028f67d28c5 + 80001360: 0004be83 ld x29,0(x9) + 80001364: 00848493 addi x9,x9,8 + +0000000080001368 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b29: + sha512sum1 x29, x29 # perform operation + 80001368: 105e9e93 sha512sum1 x29,x29 + # Check if x29 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x29, Zknh_sha512sum1_cg_cmp_rd_rs1_b29, Zknh_sha512sum1_cg_cmp_rd_rs1_b29_str) + 8000136c: 0008b203 ld x4,0(x17) + 80001370: 01d20c63 beq x4,x29,80001388 + 80001374: 44c012ef jal x5,800027c0 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 8000a171 .word 0x8000a171 + 80001384: 00000000 .word 0x00000000 + 80001388: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x9, x30) # load rs1: x30 = 0x7a938e679c6bbb5d + 8000138c: 0004bf03 ld x30,0(x9) + 80001390: 00848493 addi x9,x9,8 + +0000000080001394 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b30: + sha512sum1 x30, x30 # perform operation + 80001394: 105f1f13 sha512sum1 x30,x30 + # Check if x30 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x30, Zknh_sha512sum1_cg_cmp_rd_rs1_b30, Zknh_sha512sum1_cg_cmp_rd_rs1_b30_str) + 80001398: 0008b203 ld x4,0(x17) + 8000139c: 01e20c63 beq x4,x30,800013b4 + 800013a0: 420012ef jal x5,800027c0 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 8000a1af .word 0x8000a1af + 800013b0: 00000000 .word 0x00000000 + 800013b4: 00888893 addi x17,x17,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x9, x31) # load rs1: x31 = 0x36abc52206fae9f7 + 800013b8: 0004bf83 ld x31,0(x9) + 800013bc: 00848493 addi x9,x9,8 + +00000000800013c0 : +Zknh_sha512sum1_cg_cmp_rd_rs1_b31: + sha512sum1 x31, x31 # perform operation + 800013c0: 105f9f93 sha512sum1 x31,x31 + # Check if x31 contains the expected result. x17 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x17, x5, x4, x31, Zknh_sha512sum1_cg_cmp_rd_rs1_b31, Zknh_sha512sum1_cg_cmp_rd_rs1_b31_str) + 800013c4: 0008b203 ld x4,0(x17) + 800013c8: 01f20c63 beq x4,x31,800013e0 + 800013cc: 3f4012ef jal x5,800027c0 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 8000a1ed .word 0x8000a1ed + 800013dc: 00000000 .word 0x00000000 + 800013e0: 00888893 addi x17,x17,8 + + mv x2, x17 # restore signature pointer to default register for teardown + 800013e4: 00088113 addi x2,x17,0 + +00000000800013e8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e8: 00000513 addi x10,x0,0 + 800013ec: 00000073 ecall + 800013f0: fff00513 addi x10,x0,-1 + 800013f4: 25800413 addi x8,x0,600 + +00000000800013f8 : + 800013f8: 34002373 csrrs x6,mscratch,x0 + +00000000800013fc : + 800013fc: 2b833383 ld x7,696(x6) + +0000000080001400 : + 80001400: 2a033383 ld x7,672(x6) + +0000000080001404 : + 80001404: 2d033483 ld x9,720(x6) + 80001408: 34049073 csrrw x0,mscratch,x9 + +000000008000140c : + 8000140c: 2c833483 ld x9,712(x6) + 80001410: 305493f3 csrrw x7,mtvec,x9 + 80001414: ffc4f493 andi x9,x9,-4 + 80001418: ffc3f393 andi x7,x7,-4 + 8000141c: 00749e63 bne x9,x7,80001438 + +0000000080001420 : + 80001420: 00030493 addi x9,x6,0 + +0000000080001424 : + 80001424: 0004a783 lw x15,0(x9) + 80001428: 00f3a023 sw x15,0(x7) + 8000142c: 00438393 addi x7,x7,4 + 80001430: 00448493 addi x9,x9,4 + 80001434: fe83c8e3 blt x7,x8,80001424 + 80001438: 0000100f fence.i + +000000008000143c : + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 4d450513 addi x10,x10,1236 # 8000a954 + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 4d350513 addi x10,x10,1235 # 8000a993 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 4f350513 addi x10,x10,1267 # 8000a9f3 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: 05e50513 addi x10,x10,94 # 8000b59e + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: e5038393 addi x7,x7,-432 # 8000c410 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: e0040413 addi x8,x8,-512 # 8000c400 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000ab47 .word 0x8000ab47 + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a9b5 .word 0x8000a9b5 + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 29450513 addi x10,x10,660 # 8000a914 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 29450513 addi x10,x10,660 # 8000a954 + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc9ff06f jal x0,800013e8 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca5ff06f jal x0,800013e8 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9c30313 addi x6,x6,-1380 # 8000143c + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 43550513 addi x10,x10,1077 # 8000bfd5 + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 7b850513 addi x10,x10,1976 # 8000a398 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: e3c50513 addi x10,x10,-452 # 8000aa5c + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: cf450513 addi x10,x10,-780 # 8000a954 + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 31848493 addi x9,x9,792 # 8000a378 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00028417 auipc x8,0x28 + 800020a4: 83840413 addi x8,x8,-1992 # 800298d8 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000ab5e .word 0x8000ab5e + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000ac60 .word 0x8000ac60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ad5b .word 0x8000ad5b + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ae4e .word 0x8000ae4e + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000afc1 .word 0x8000afc1 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: a7020213 addi x4,x4,-1424 # 8000a230 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: a5838393 addi x7,x7,-1448 # 8000a230 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: a3068693 addi x13,x13,-1488 # 8000a230 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00008497 auipc x9,0x8 + 8000282c: a0848493 addi x9,x9,-1528 # 8000a230 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00008497 auipc x9,0x8 + 800028d0: 9644a483 lw x9,-1692(x9) # 8000a230 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 6a040413 addi x8,x8,1696 # 8000c020 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: f2040413 addi x8,x8,-224 # 800298e0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00008497 auipc x9,0x8 + 80002a04: 95848493 addi x9,x9,-1704 # 8000a358 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00008497 auipc x9,0x8 + 80002a44: 91848493 addi x9,x9,-1768 # 8000a358 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00008817 auipc x16,0x8 + 80002a80: 8ec80813 addi x16,x16,-1812 # 8000a368 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00008817 auipc x16,0x8 + 80002aa0: 8cc80813 addi x16,x16,-1844 # 8000a368 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: 09f38393 addi x7,x7,159 # 8000ab47 + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00008817 auipc x16,0x8 + 80002abc: 8a880813 addi x16,x16,-1880 # 8000a360 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: 09a38393 addi x7,x7,154 # 8000ab5e + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: 18438393 addi x7,x7,388 # 8000ac60 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 26738393 addi x7,x7,615 # 8000ad5b + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 34238393 addi x7,x7,834 # 8000ae4e + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 49d38393 addi x7,x7,1181 # 8000afc1 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 40938393 addi x7,x7,1033 # 8000af45 + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 42f38393 addi x7,x7,1071 # 8000af83 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: 03238393 addi x7,x7,50 # 8000ab9e + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: 11a38393 addi x7,x7,282 # 8000ac9e + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: 1fb38393 addi x7,x7,507 # 8000ad97 + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 2d738393 addi x7,x7,727 # 8000ae8b + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 43038393 addi x7,x7,1072 # 8000affc + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: ffa38393 addi x7,x7,-6 # 8000abde + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: 0e038393 addi x7,x7,224 # 8000acdc + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: 1bf38393 addi x7,x7,447 # 8000add3 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 29c38393 addi x7,x7,668 # 8000aec8 + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 3f338393 addi x7,x7,1011 # 8000b037 + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: fc338393 addi x7,x7,-61 # 8000ac1f + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: 0a738393 addi x7,x7,167 # 8000ad1b + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: 18438393 addi x7,x7,388 # 8000ae10 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 26238393 addi x7,x7,610 # 8000af06 + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 3b738393 addi x7,x7,951 # 8000b073 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 3dc38393 addi x7,x7,988 # 8000b0b0 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 41338393 addi x7,x7,1043 # 8000b0ff + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 4f638393 addi x7,x7,1270 # 8000b1fa + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 5da38393 addi x7,x7,1498 # 8000b2f6 + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 62480813 addi x16,x16,1572 # 8000a360 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 61480813 addi x16,x16,1556 # 8000a360 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 60c80813 addi x16,x16,1548 # 8000a364 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 5f880813 addi x16,x16,1528 # 8000a360 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: b9450513 addi x10,x10,-1132 # 8000a954 + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: b9350513 addi x10,x10,-1133 # 8000a993 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: c0a50513 addi x10,x10,-1014 # 8000aa4a + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 4e853503 ld x10,1256(x10) # 8000a350 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: bdc50513 addi x10,x10,-1060 # 8000aa5c + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 38852503 lw x10,904(x10) # 8000a230 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: b9e50513 addi x10,x10,-1122 # 8000aa5e + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 44852503 lw x10,1096(x10) # 8000a330 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 47850513 addi x10,x10,1144 # 8000a398 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: b1250513 addi x10,x10,-1262 # 8000aa72 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 3b053503 ld x10,944(x10) # 8000a338 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 3f850513 addi x10,x10,1016 # 8000a398 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 4c950513 addi x10,x10,1225 # 8000b4a9 + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: 22852503 lw x10,552(x10) # 8000a230 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 37860613 addi x12,x12,888 # 8000a398 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 2ec52503 lw x10,748(x10) # 8000a334 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 53f50513 addi x10,x10,1343 # 8000b5bf + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 2d860613 addi x12,x12,728 # 8000a398 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 24c52503 lw x10,588(x10) # 8000a334 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 29860613 addi x12,x12,664 # 8000a398 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: 20c52503 lw x10,524(x10) # 8000a334 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 36250513 addi x10,x10,866 # 8000b4a2 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: 21850513 addi x10,x10,536 # 8000a398 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 2fa50513 addi x10,x10,762 # 8000b4ba + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: 04852503 lw x10,72(x10) # 8000a230 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: 14853503 ld x10,328(x10) # 8000a340 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: 13453503 ld x10,308(x10) # 8000a340 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: 17850513 addi x10,x10,376 # 8000a398 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: 11052503 lw x10,272(x10) # 8000a358 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 27150513 addi x10,x10,625 # 8000b4d1 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: fa852503 lw x10,-88(x10) # 8000a230 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: 0b053503 ld x10,176(x10) # 8000a348 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: 09c53503 ld x10,156(x10) # 8000a348 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: 0d850513 addi x10,x10,216 # 8000a398 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: 1e850513 addi x10,x10,488 # 8000b4e8 + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: 02053503 ld x10,32(x10) # 8000a348 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: 05850513 addi x10,x10,88 # 8000a398 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: 1c650513 addi x10,x10,454 # 8000b546 + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: fa053503 ld x10,-96(x10) # 8000a348 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: fd850513 addi x10,x10,-40 # 8000a398 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: f7442403 lw x8,-140(x8) # 8000a360 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: 1eb50513 addi x10,x10,491 # 8000b5eb + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: 1d750513 addi x10,x10,471 # 8000b617 + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: f0080813 addi x16,x16,-256 # 8000a368 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 5dc50513 addi x10,x10,1500 # 8000aa5c + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: 16750513 addi x10,x10,359 # 8000b627 + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: e6053503 ld x10,-416(x10) # 8000a348 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: e9850513 addi x10,x10,-360 # 8000a398 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: 11250513 addi x10,x10,274 # 8000b652 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: dd853503 ld x10,-552(x10) # 8000a340 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: e1850513 addi x10,x10,-488 # 8000a398 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: d9833303 ld x6,-616(x6) # 8000a340 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: d983b383 ld x7,-616(x7) # 8000a348 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: 0c150513 addi x10,x10,193 # 8000b681 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: 0e950513 addi x10,x10,233 # 8000b6e9 + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: d1833303 ld x6,-744(x6) # 8000a340 + 80003630: 00007397 auipc x7,0x7 + 80003634: d183b383 ld x7,-744(x7) # 8000a348 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: d3850513 addi x10,x10,-712 # 8000a398 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: 07050513 addi x10,x10,112 # 8000b710 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: fcd50513 addi x10,x10,-51 # 8000b6ad + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: fc950513 addi x10,x10,-55 # 8000b6e9 + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: c0033303 ld x6,-1024(x6) # 8000a348 + 80003750: 00007397 auipc x7,0x7 + 80003754: bf03b383 ld x7,-1040(x7) # 8000a340 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: c1850513 addi x10,x10,-1000 # 8000a398 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: 03850513 addi x10,x10,56 # 8000b7f8 + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: 0df50513 addi x10,x10,223 # 8000b8df + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: b3c52503 lw x10,-1220(x10) # 8000a364 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: 0bb50513 addi x10,x10,187 # 8000b91b + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: 05950513 addi x10,x10,89 # 8000b8f9 + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: 02150513 addi x10,x10,33 # 8000b901 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: fe950513 addi x10,x10,-23 # 8000b909 + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: fb250513 addi x10,x10,-78 # 8000b912 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: f8450513 addi x10,x10,-124 # 8000b924 + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00007517 auipc x10,0x7 + 800039cc: 99852503 lw x10,-1640(x10) # 8000a360 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: 05b50513 addi x10,x10,91 # 8000ba7b + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ede50513 addi x10,x10,-290 # 8000b93e + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: ecf50513 addi x10,x10,-305 # 8000b96f + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: eaf50513 addi x10,x10,-337 # 8000b98f + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: e8d50513 addi x10,x10,-371 # 8000b9ad + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: e6c50513 addi x10,x10,-404 # 8000b9cc + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: e5450513 addi x10,x10,-428 # 8000b9f4 + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: e4050513 addi x10,x10,-448 # 8000ba20 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: e2c50513 addi x10,x10,-468 # 8000ba4c + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: e2a50513 addi x10,x10,-470 # 8000ba8a + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 6c053503 ld x10,1728(x10) # 8000a348 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 6f850513 addi x10,x10,1784 # 8000a398 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: dc150513 addi x10,x10,-575 # 8000baa1 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 63853503 ld x10,1592(x10) # 8000a340 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 67850513 addi x10,x10,1656 # 8000a398 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 61852503 lw x10,1560(x10) # 8000a360 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: d5850513 addi x10,x10,-680 # 8000bab8 + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 5c053503 ld x10,1472(x10) # 8000a348 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: d2f50513 addi x10,x10,-721 # 8000bacf + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 57853503 ld x10,1400(x10) # 8000a340 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 57c52503 lw x10,1404(x10) # 8000a360 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: d4550513 addi x10,x10,-699 # 8000bb45 + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ddb50513 addi x10,x10,-549 # 8000bc1b + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: e8e50513 addi x10,x10,-370 # 8000bd0e + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: f4950513 addi x10,x10,-183 # 8000be09 + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: ff050513 addi x10,x10,-16 # 8000bef0 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: bbd50513 addi x10,x10,-1091 # 8000bafd + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 41063603 ld x12,1040(x12) # 8000a378 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: b6650513 addi x10,x10,-1178 # 8000aae6 + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 3b850513 addi x10,x10,952 # 8000a398 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 3a058593 addi x11,x11,928 # 8000a3c0 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 43058593 addi x11,x11,1072 # 8000a480 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00007517 auipc x10,0x7 + 80004084: 87e50513 addi x10,x10,-1922 # 8000a8fe + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 4de50513 addi x10,x10,1246 # 8000b59e + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 28060613 addi x12,x12,640 # 8000a370 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00007517 auipc x10,0x7 + 80004104: a0750513 addi x10,x10,-1529 # 8000ab07 + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 25053503 ld x10,592(x10) # 8000a378 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 25850513 addi x10,x10,600 # 8000a398 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00007517 auipc x10,0x7 + 80004184: 99750513 addi x10,x10,-1641 # 8000ab17 + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: 1d853503 ld x10,472(x10) # 8000a380 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: 1d850513 addi x10,x10,472 # 8000a398 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00007517 auipc x10,0x7 + 80004204: 92750513 addi x10,x10,-1753 # 8000ab27 + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: 16053503 ld x10,352(x10) # 8000a388 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: 15850513 addi x10,x10,344 # 8000a398 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00007517 auipc x10,0x7 + 80004284: 8b750513 addi x10,x10,-1865 # 8000ab37 + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: 0e853503 ld x10,232(x10) # 8000a390 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: 0d850513 addi x10,x10,216 # 8000a398 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: 08860613 addi x12,x12,136 # 8000a370 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: 09860613 addi x12,x12,152 # 8000a398 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35030313 addi x6,x6,848 # 800013e8 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33830313 addi x6,x6,824 # 800013e8 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32030313 addi x6,x6,800 # 800013e8 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b878793 addi x15,x15,440 # 800013f8 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: b4010113 addi x2,x2,-1216 # 8000c020 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b5c7 .word 0x8000b5c7 + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 31828293 addi x5,x5,792 # 80029900 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 2f828293 addi x5,x5,760 # 80029900 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zksed-sm4ed-00.elf.objdump b/riscv-tests/rv64-Zksed-sm4ed-00.elf.objdump new file mode 100644 index 0000000..ee5dd98 --- /dev/null +++ b/riscv-tests/rv64-Zksed-sm4ed-00.elf.objdump @@ -0,0 +1,23596 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksed/Zksed-sm4ed-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksed/Zksed-sm4ed-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000040680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003c memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cdc0 memsz 0x000000000000cdc0 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000032680 memsz 0x0000000000032680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000cd80 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000319e0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041a00 0000000080041a00 0003fa00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080042000 0000000080042000 00040000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003c 0000000000000000 0000000000000000 00040680 2**0 + CONTENTS, READONLY + 6 .debug_line 00004a12 0000000000000000 0000000000000000 000406bc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 0000000000000000 0000000000000000 000450ce 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 0004514b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0004516e 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00045180 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 0000000000000000 0000000000000000 000451c0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0004524b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080010000 l d .data 0000000000000000 .data +0000000080041a00 l d .tohost 0000000000000000 .tohost +0000000080042000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccIki6F5.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800420e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b0 +000000008000b1c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800134b0 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b1 +00000000800134e3 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b2 +0000000080013516 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b3 +0000000080013549 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b4 +000000008000b1d8 l .text.rvtest 0000000000000000 failedtest_x8_x7 +000000008001357c l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b5 +00000000800135af l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b6 +00000000800135e2 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b6_str +00000000800001d4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b7 +0000000080013615 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b7_str +0000000080000208 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b8 +0000000080013648 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b8_str +000000008000023c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b9 +000000008001367b l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b9_str +0000000080000270 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b10 +00000000800136af l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b10_str +00000000800002a4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b11 +00000000800136e4 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b11_str +00000000800002d8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b12 +0000000080013719 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b13 +000000008001374e l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b14 +0000000080013783 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b14_str +0000000080000374 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b15 +00000000800137b8 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b15_str +00000000800003a8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b16 +00000000800137ed l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b16_str +00000000800003dc l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b17 +0000000080013822 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b17_str +0000000080000410 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b18 +0000000080013857 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b18_str +0000000080000448 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b19 +000000008001388c l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b19_str +000000008000047c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b20 +00000000800138c1 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b20_str +00000000800004b0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b21 +00000000800138f6 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b21_str +00000000800004e4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b22 +000000008001392b l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b22_str +000000008000051c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b23 +0000000080013960 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b23_str +0000000080000550 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b24 +0000000080013995 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b24_str +0000000080000584 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b25 +00000000800139ca l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b25_str +00000000800005b8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b26 +00000000800139ff l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b26_str +00000000800005f0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b27 +0000000080013a34 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b27_str +0000000080000624 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b28 +0000000080013a69 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b28_str +0000000080000658 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b29 +0000000080013a9e l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b29_str +000000008000068c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b30 +0000000080013ad3 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b30_str +00000000800006c0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b31 +0000000080013b08 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs1_b31_str +00000000800006f4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b0 +0000000080013b3d l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b0_str +0000000080000728 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b1 +0000000080013b71 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b1_str +0000000080000760 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b2 +0000000080013ba5 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b2_str +0000000080000794 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b3 +0000000080013bd9 l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b3_str +00000000800007d0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b4 +000000008000b200 l .text.rvtest 0000000000000000 failedtest_x14_x13 +0000000080013c0d l .data 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b4_str +0000000080000804 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cp_rs2_b5 +0000000080013c41 l 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+00000000800175a1 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str +0000000080002dc4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000 +000000008001760a l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str +0000000080002df8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001 +0000000080017674 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str +0000000080002e2c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0 +00000000800176de l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e60 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +0000000080017740 l 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+00000000800178e6 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str +0000000080002f64 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe +0000000080017957 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080002f98 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff +00000000800179c8 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080002fcc l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080017a39 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003000 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080017aaa l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080003034 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080017b1b l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003068 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555 +0000000080017b8c l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str +000000008000309c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff +0000000080017bfd l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str +00000000800030d0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe +0000000080017c66 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str +0000000080003104 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000 +0000000080017ccf l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str +0000000080003138 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001 +0000000080017d39 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str +000000008000316c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0 +0000000080017da3 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str +00000000800031a0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1 +0000000080017e05 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str +00000000800031d4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2 +0000000080017e67 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str +0000000080003208 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000 +0000000080017ec9 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str +000000008000323c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080017f3a l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +0000000080003270 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080017fab l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032a4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +000000008001801c l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032d8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +000000008001808d l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +000000008000330c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +00000000800180fe l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003340 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001816f l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003374 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800181e0 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033a8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080018251 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033dc l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +00000000800182c2 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003410 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +000000008001832b l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003444 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +0000000080018394 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +0000000080003478 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800183fe l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034ac l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080018468 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034e0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +00000000800184ca l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003514 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +000000008001852c l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +0000000080003548 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +000000008001858e l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +000000008000357c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800185ff l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035b0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080018670 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035e4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +00000000800186e1 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080003618 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +0000000080018752 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +000000008000364c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +00000000800187c3 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003680 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080018834 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036b4 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +00000000800188a5 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036e8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +0000000080018916 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +000000008000371c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +0000000080018987 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +0000000080003750 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +00000000800189f0 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003784 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000 +0000000080018a59 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str +00000000800037b8 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001 +0000000080018ac3 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str +00000000800037ec l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0 +0000000080018b2d l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str +0000000080003820 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1 +0000000080018b8f l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str +0000000080003854 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +0000000080018bf1 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003888 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +0000000080018c53 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038bc l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080018cc4 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038f0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +0000000080018d35 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str +0000000080003924 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe +0000000080018da6 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str +0000000080003958 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff +0000000080018e17 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str +000000008000398c l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe +0000000080018e88 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str +00000000800039c0 l .text.rvtest 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2 +0000000080018ef9 l .data 0000000000000000 Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str +00000000800039f4 l .text.rvtest 0000000000000000 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.text.rvmodel 0000000000000000 _end +0000000080041b00 g .tohost 0000000000000000 fromhost +0000000080041a00 g .tohost 0000000000000000 tohost +000000008000a0d0 g .text.rvtest 0000000000000000 rvtest_fail_summary +000000008000a180 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00042097 auipc x1,0x42 + 80000004: 0e008093 addi x1,x1,224 # 800420e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xb26d170af2de9ff2 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xb3ad53ef54765e66 + 80000048: 0001ba03 ld x20,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zksed_sm4ed_cg_cp_rs1_b0: + sm4ed x25, x0, x20, 1 # perform operation + 80000050: 71400cb3 sm4ed x25,x0,x20,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_b0, Zksed_sm4ed_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 01920c63 beq x4,x25,80000070 + 8000005c: 1640b2ef jal x5,8000b1c0 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 800134b0 .word 0x800134b0 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x30f7e7bceb722441 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0x636af023372a3318 + 8000007c: 0001bf03 ld x30,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zksed_sm4ed_cg_cp_rs1_b1: + sm4ed x25, x1, x30, 2 # perform operation + 80000084: b1e08cb3 sm4ed x25,x1,x30,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_b1, Zksed_sm4ed_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 01920c63 beq x4,x25,800000a4 + 80000090: 1300b2ef jal x5,8000b1c0 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134e3 .word 0x800134e3 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x19, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010993 addi x19,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x04dd35853e039fa6 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x12) # load rs2: x12 = 0xb5de34603e0d1f20 + 800000b4: 0001b603 ld x12,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zksed_sm4ed_cg_cp_rs1_b2: + sm4ed x30, x2, x12, 3 # perform operation + 800000bc: f0c10f33 sm4ed x30,x2,x12,0x3 + # Check if x30 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x30, Zksed_sm4ed_cg_cp_rs1_b2, Zksed_sm4ed_cg_cp_rs1_b2_str) + 800000c0: 0009b203 ld x4,0(x19) + 800000c4: 01e20c63 beq x4,x30,800000dc + 800000c8: 0f80b2ef jal x5,8000b1c0 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 80013516 .word 0x80013516 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 00898993 addi x19,x19,8 + + mv x23, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018b93 addi x23,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xb9a3c1701185928f + 800000e4: 000bb183 ld x3,0(x23) + 800000e8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x3aff5856d590ff41 + 800000ec: 000bbf83 ld x31,0(x23) + 800000f0: 008b8b93 addi x23,x23,8 + +00000000800000f4 : +Zksed_sm4ed_cg_cp_rs1_b3: + sm4ed x15, x3, x31, 3 # perform operation + 800000f4: f1f187b3 sm4ed x15,x3,x31,0x3 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ed_cg_cp_rs1_b3, Zksed_sm4ed_cg_cp_rs1_b3_str) + 800000f8: 0009b203 ld x4,0(x19) + 800000fc: 00f20c63 beq x4,x15,80000114 + 80000100: 0c00b2ef jal x5,8000b1c0 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 80013549 .word 0x80013549 + 80000110: 00000000 .word 0x00000000 + 80000114: 00898993 addi x19,x19,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000118: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028413 addi x8,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0x60663846c56f674a + 80000120: 000bb203 ld x4,0(x23) + 80000124: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0x4cd68e00ff2e48d2 + 80000128: 000bbd83 ld x27,0(x23) + 8000012c: 008b8b93 addi x23,x23,8 + +0000000080000130 : +Zksed_sm4ed_cg_cp_rs1_b4: + sm4ed x2, x4, x27, 2 # perform operation + 80000130: b1b20133 sm4ed x2,x4,x27,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x2, Zksed_sm4ed_cg_cp_rs1_b4, Zksed_sm4ed_cg_cp_rs1_b4_str) + 80000134: 0009b383 ld x7,0(x19) + 80000138: 00238c63 beq x7,x2,80000150 + 8000013c: 09c0b46f jal x8,8000b1d8 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8001357c .word 0x8001357c + 8000014c: 00000000 .word 0x00000000 + 80000150: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0xeabbd16fe4b05ba7 + 80000154: 000bb283 ld x5,0(x23) + 80000158: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x1fac20521bcbdbd5 + 8000015c: 000bb303 ld x6,0(x23) + 80000160: 008b8b93 addi x23,x23,8 + +0000000080000164 : +Zksed_sm4ed_cg_cp_rs1_b5: + sm4ed x20, x5, x6, 0 # perform operation + 80000164: 30628a33 sm4ed x20,x5,x6,0x0 + # Check if x20 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x20, Zksed_sm4ed_cg_cp_rs1_b5, Zksed_sm4ed_cg_cp_rs1_b5_str) + 80000168: 0009b383 ld x7,0(x19) + 8000016c: 01438c63 beq x7,x20,80000184 + 80000170: 0680b46f jal x8,8000b1d8 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 800135af .word 0x800135af + 80000180: 00000000 .word 0x00000000 + 80000184: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0xdf5b5192036b9b25 + 80000188: 000bb303 ld x6,0(x23) + 8000018c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xf53b08caab4fa33b + 80000190: 000bb083 ld x1,0(x23) + 80000194: 008b8b93 addi x23,x23,8 + +0000000080000198 : +Zksed_sm4ed_cg_cp_rs1_b6: + sm4ed x5, x6, x1, 3 # perform operation + 80000198: f01302b3 sm4ed x5,x6,x1,0x3 + # Check if x5 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x5, Zksed_sm4ed_cg_cp_rs1_b6, Zksed_sm4ed_cg_cp_rs1_b6_str) + 8000019c: 0009b383 ld x7,0(x19) + 800001a0: 00538c63 beq x7,x5,800001b8 + 800001a4: 0340b46f jal x8,8000b1d8 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135e2 .word 0x800135e2 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 00898993 addi x19,x19,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800001bc: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800001c0: 00040293 addi x5,x8,0 +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x72e475ba4b19c938 + 800001c4: 000bb383 ld x7,0(x23) + 800001c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x18e1d1665d46ba89 + 800001cc: 000bb803 ld x16,0(x23) + 800001d0: 008b8b93 addi x23,x23,8 + +00000000800001d4 : +Zksed_sm4ed_cg_cp_rs1_b7: + sm4ed x11, x7, x16, 2 # perform operation + 800001d4: b10385b3 sm4ed x11,x7,x16,0x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x11, Zksed_sm4ed_cg_cp_rs1_b7, Zksed_sm4ed_cg_cp_rs1_b7_str) + 800001d8: 0009b203 ld x4,0(x19) + 800001dc: 00b20c63 beq x4,x11,800001f4 + 800001e0: 7e10a2ef jal x5,8000b1c0 + 800001e4: 800001d4 .word 0x800001d4 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 80013615 .word 0x80013615 + 800001f0: 00000000 .word 0x00000000 + 800001f4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0xad70d35925edd7d0 + 800001f8: 000bb403 ld x8,0(x23) + 800001fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x13c05cb7390e9c44 + 80000200: 000bb003 ld x0,0(x23) + 80000204: 008b8b93 addi x23,x23,8 + +0000000080000208 : +Zksed_sm4ed_cg_cp_rs1_b8: + sm4ed x7, x8, x0, 3 # perform operation + 80000208: f00403b3 sm4ed x7,x8,x0,0x3 + # Check if x7 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x7, Zksed_sm4ed_cg_cp_rs1_b8, Zksed_sm4ed_cg_cp_rs1_b8_str) + 8000020c: 0009b203 ld x4,0(x19) + 80000210: 00720c63 beq x4,x7,80000228 + 80000214: 7ad0a2ef jal x5,8000b1c0 + 80000218: 80000208 .word 0x80000208 + 8000021c: 00000000 .word 0x00000000 + 80000220: 80013648 .word 0x80013648 + 80000224: 00000000 .word 0x00000000 + 80000228: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0x3270f6452739d8e0 + 8000022c: 000bb483 ld x9,0(x23) + 80000230: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0xf45d48264fbfcbfc + 80000234: 000bbe83 ld x29,0(x23) + 80000238: 008b8b93 addi x23,x23,8 + +000000008000023c : +Zksed_sm4ed_cg_cp_rs1_b9: + sm4ed x14, x9, x29, 3 # perform operation + 8000023c: f1d48733 sm4ed x14,x9,x29,0x3 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ed_cg_cp_rs1_b9, Zksed_sm4ed_cg_cp_rs1_b9_str) + 80000240: 0009b203 ld x4,0(x19) + 80000244: 00e20c63 beq x4,x14,8000025c + 80000248: 7790a2ef jal x5,8000b1c0 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 8001367b .word 0x8001367b + 80000258: 00000000 .word 0x00000000 + 8000025c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x024fceb4f9ac2731 + 80000260: 000bb503 ld x10,0(x23) + 80000264: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x06e106e87e90c729 + 80000268: 000bbb03 ld x22,0(x23) + 8000026c: 008b8b93 addi x23,x23,8 + +0000000080000270 : +Zksed_sm4ed_cg_cp_rs1_b10: + sm4ed x0, x10, x22, 1 # perform operation + 80000270: 71650033 sm4ed x0,x10,x22,0x1 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zksed_sm4ed_cg_cp_rs1_b10, Zksed_sm4ed_cg_cp_rs1_b10_str) + 80000274: 0009b203 ld x4,0(x19) + 80000278: 00020c63 beq x4,x0,80000290 + 8000027c: 7450a2ef jal x5,8000b1c0 + 80000280: 80000270 .word 0x80000270 + 80000284: 00000000 .word 0x00000000 + 80000288: 800136af .word 0x800136af + 8000028c: 00000000 .word 0x00000000 + 80000290: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xced4a48bdc1fe5b8 + 80000294: 000bb583 ld x11,0(x23) + 80000298: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x8789bf3baab7d239 + 8000029c: 000bb403 ld x8,0(x23) + 800002a0: 008b8b93 addi x23,x23,8 + +00000000800002a4 : +Zksed_sm4ed_cg_cp_rs1_b11: + sm4ed x21, x11, x8, 0 # perform operation + 800002a4: 30858ab3 sm4ed x21,x11,x8,0x0 + # Check if x21 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x21, Zksed_sm4ed_cg_cp_rs1_b11, Zksed_sm4ed_cg_cp_rs1_b11_str) + 800002a8: 0009b203 ld x4,0(x19) + 800002ac: 01520c63 beq x4,x21,800002c4 + 800002b0: 7110a2ef jal x5,8000b1c0 + 800002b4: 800002a4 .word 0x800002a4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 800136e4 .word 0x800136e4 + 800002c0: 00000000 .word 0x00000000 + 800002c4: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0xe449733ea1e32634 + 800002c8: 000bb603 ld x12,0(x23) + 800002cc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xb7c3b1819023fe6e + 800002d0: 000bb183 ld x3,0(x23) + 800002d4: 008b8b93 addi x23,x23,8 + +00000000800002d8 : +Zksed_sm4ed_cg_cp_rs1_b12: + sm4ed x31, x12, x3, 3 # perform operation + 800002d8: f0360fb3 sm4ed x31,x12,x3,0x3 + # Check if x31 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x31, Zksed_sm4ed_cg_cp_rs1_b12, Zksed_sm4ed_cg_cp_rs1_b12_str) + 800002dc: 0009b203 ld x4,0(x19) + 800002e0: 01f20c63 beq x4,x31,800002f8 + 800002e4: 6dd0a2ef jal x5,8000b1c0 + 800002e8: 800002d8 .word 0x800002d8 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 80013719 .word 0x80013719 + 800002f4: 00000000 .word 0x00000000 + 800002f8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x73a7c55fe382dfe8 + 800002fc: 000bb683 ld x13,0(x23) + 80000300: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x2da270188cdae925 + 80000304: 000bbd03 ld x26,0(x23) + 80000308: 008b8b93 addi x23,x23,8 + +000000008000030c : +Zksed_sm4ed_cg_cp_rs1_b13: + sm4ed x10, x13, x26, 1 # perform operation + 8000030c: 71a68533 sm4ed x10,x13,x26,0x1 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ed_cg_cp_rs1_b13, Zksed_sm4ed_cg_cp_rs1_b13_str) + 80000310: 0009b203 ld x4,0(x19) + 80000314: 00a20c63 beq x4,x10,8000032c + 80000318: 6a90a2ef jal x5,8000b1c0 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8001374e .word 0x8001374e + 80000328: 00000000 .word 0x00000000 + 8000032c: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xd8936204ba24e65a + 80000330: 000bb703 ld x14,0(x23) + 80000334: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x2c75f34ade9cd359 + 80000338: 000bb903 ld x18,0(x23) + 8000033c: 008b8b93 addi x23,x23,8 + +0000000080000340 : +Zksed_sm4ed_cg_cp_rs1_b14: + sm4ed x3, x14, x18, 3 # perform operation + 80000340: f12701b3 sm4ed x3,x14,x18,0x3 + # Check if x3 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x3, Zksed_sm4ed_cg_cp_rs1_b14, Zksed_sm4ed_cg_cp_rs1_b14_str) + 80000344: 0009b203 ld x4,0(x19) + 80000348: 00320c63 beq x4,x3,80000360 + 8000034c: 6750a2ef jal x5,8000b1c0 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 80013783 .word 0x80013783 + 8000035c: 00000000 .word 0x00000000 + 80000360: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xb4cdc1acefb6e744 + 80000364: 000bb783 ld x15,0(x23) + 80000368: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xd8c9256f50c6c2fd + 8000036c: 000bb383 ld x7,0(x23) + 80000370: 008b8b93 addi x23,x23,8 + +0000000080000374 : +Zksed_sm4ed_cg_cp_rs1_b15: + sm4ed x22, x15, x7, 1 # perform operation + 80000374: 70778b33 sm4ed x22,x15,x7,0x1 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ed_cg_cp_rs1_b15, Zksed_sm4ed_cg_cp_rs1_b15_str) + 80000378: 0009b203 ld x4,0(x19) + 8000037c: 01620c63 beq x4,x22,80000394 + 80000380: 6410a2ef jal x5,8000b1c0 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 800137b8 .word 0x800137b8 + 80000390: 00000000 .word 0x00000000 + 80000394: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x4146c9c5fdfc69bf + 80000398: 000bb803 ld x16,0(x23) + 8000039c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x2cc9ab0c8ede5d50 + 800003a0: 000bbd03 ld x26,0(x23) + 800003a4: 008b8b93 addi x23,x23,8 + +00000000800003a8 : +Zksed_sm4ed_cg_cp_rs1_b16: + sm4ed x25, x16, x26, 2 # perform operation + 800003a8: b1a80cb3 sm4ed x25,x16,x26,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_b16, Zksed_sm4ed_cg_cp_rs1_b16_str) + 800003ac: 0009b203 ld x4,0(x19) + 800003b0: 01920c63 beq x4,x25,800003c8 + 800003b4: 60d0a2ef jal x5,8000b1c0 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 800137ed .word 0x800137ed + 800003c4: 00000000 .word 0x00000000 + 800003c8: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xf6e90c98ac673d51 + 800003cc: 000bb883 ld x17,0(x23) + 800003d0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0xcd984a3566c4a692 + 800003d4: 000bb303 ld x6,0(x23) + 800003d8: 008b8b93 addi x23,x23,8 + +00000000800003dc : +Zksed_sm4ed_cg_cp_rs1_b17: + sm4ed x10, x17, x6, 3 # perform operation + 800003dc: f0688533 sm4ed x10,x17,x6,0x3 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ed_cg_cp_rs1_b17, Zksed_sm4ed_cg_cp_rs1_b17_str) + 800003e0: 0009b203 ld x4,0(x19) + 800003e4: 00a20c63 beq x4,x10,800003fc + 800003e8: 5d90a2ef jal x5,8000b1c0 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 80013822 .word 0x80013822 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 00898993 addi x19,x19,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xec6ef38f5f0658c7 + 80000400: 000bb903 ld x18,0(x23) + 80000404: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x436a8d01f36ee73c + 80000408: 000bb103 ld x2,0(x23) + 8000040c: 008b8b93 addi x23,x23,8 + +0000000080000410 : +Zksed_sm4ed_cg_cp_rs1_b18: + sm4ed x22, x18, x2, 0 # perform operation + 80000410: 30290b33 sm4ed x22,x18,x2,0x0 + # Check if x22 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x22, Zksed_sm4ed_cg_cp_rs1_b18, Zksed_sm4ed_cg_cp_rs1_b18_str) + 80000414: 0009b203 ld x4,0(x19) + 80000418: 01620c63 beq x4,x22,80000430 + 8000041c: 5a50a2ef jal x5,8000b1c0 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 80013857 .word 0x80013857 + 8000042c: 00000000 .word 0x00000000 + 80000430: 00898993 addi x19,x19,8 + + mv x27, x19 # switch signature pointer register to avoid conflict with test + 80000434: 00098d93 addi x27,x19,0 +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0x015dd80568d0d398 + 80000438: 000bb983 ld x19,0(x23) + 8000043c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0x72d3bd33367ee7e8 + 80000440: 000bb183 ld x3,0(x23) + 80000444: 008b8b93 addi x23,x23,8 + +0000000080000448 : +Zksed_sm4ed_cg_cp_rs1_b19: + sm4ed x10, x19, x3, 2 # perform operation + 80000448: b0398533 sm4ed x10,x19,x3,0x2 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zksed_sm4ed_cg_cp_rs1_b19, Zksed_sm4ed_cg_cp_rs1_b19_str) + 8000044c: 000db203 ld x4,0(x27) + 80000450: 00a20c63 beq x4,x10,80000468 + 80000454: 56d0a2ef jal x5,8000b1c0 + 80000458: 80000448 .word 0x80000448 + 8000045c: 00000000 .word 0x00000000 + 80000460: 8001388c .word 0x8001388c + 80000464: 00000000 .word 0x00000000 + 80000468: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x20b7fbdfe25d2b4f + 8000046c: 000bba03 ld x20,0(x23) + 80000470: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0xade10d16ad6aa0ee + 80000474: 000bbc83 ld x25,0(x23) + 80000478: 008b8b93 addi x23,x23,8 + +000000008000047c : +Zksed_sm4ed_cg_cp_rs1_b20: + sm4ed x26, x20, x25, 3 # perform operation + 8000047c: f19a0d33 sm4ed x26,x20,x25,0x3 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zksed_sm4ed_cg_cp_rs1_b20, Zksed_sm4ed_cg_cp_rs1_b20_str) + 80000480: 000db203 ld x4,0(x27) + 80000484: 01a20c63 beq x4,x26,8000049c + 80000488: 5390a2ef jal x5,8000b1c0 + 8000048c: 8000047c .word 0x8000047c + 80000490: 00000000 .word 0x00000000 + 80000494: 800138c1 .word 0x800138c1 + 80000498: 00000000 .word 0x00000000 + 8000049c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x54cb32f65fae09f7 + 800004a0: 000bba83 ld x21,0(x23) + 800004a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0x13e6630f7b0b3527 + 800004a8: 000bb703 ld x14,0(x23) + 800004ac: 008b8b93 addi x23,x23,8 + +00000000800004b0 : +Zksed_sm4ed_cg_cp_rs1_b21: + sm4ed x30, x21, x14, 2 # perform operation + 800004b0: b0ea8f33 sm4ed x30,x21,x14,0x2 + # Check if x30 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x30, Zksed_sm4ed_cg_cp_rs1_b21, Zksed_sm4ed_cg_cp_rs1_b21_str) + 800004b4: 000db203 ld x4,0(x27) + 800004b8: 01e20c63 beq x4,x30,800004d0 + 800004bc: 5050a2ef jal x5,8000b1c0 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 800138f6 .word 0x800138f6 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x9835ed5fb4149a2a + 800004d4: 000bbb03 ld x22,0(x23) + 800004d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x16681073bb538f6c + 800004dc: 000bb603 ld x12,0(x23) + 800004e0: 008b8b93 addi x23,x23,8 + +00000000800004e4 : +Zksed_sm4ed_cg_cp_rs1_b22: + sm4ed x29, x22, x12, 1 # perform operation + 800004e4: 70cb0eb3 sm4ed x29,x22,x12,0x1 + # Check if x29 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x29, Zksed_sm4ed_cg_cp_rs1_b22, Zksed_sm4ed_cg_cp_rs1_b22_str) + 800004e8: 000db203 ld x4,0(x27) + 800004ec: 01d20c63 beq x4,x29,80000504 + 800004f0: 4d10a2ef jal x5,8000b1c0 + 800004f4: 800004e4 .word 0x800004e4 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 8001392b .word 0x8001392b + 80000500: 00000000 .word 0x00000000 + 80000504: 008d8d93 addi x27,x27,8 + + mv x6, x23 # switch data pointer register to avoid conflict with test + 80000508: 000b8313 addi x6,x23,0 +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0xf2ea640248d786f3 + 8000050c: 00033b83 ld x23,0(x6) + 80000510: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x79236453dc738e86 + 80000514: 00033983 ld x19,0(x6) + 80000518: 00830313 addi x6,x6,8 + +000000008000051c : +Zksed_sm4ed_cg_cp_rs1_b23: + sm4ed x28, x23, x19, 0 # perform operation + 8000051c: 313b8e33 sm4ed x28,x23,x19,0x0 + # Check if x28 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x28, Zksed_sm4ed_cg_cp_rs1_b23, Zksed_sm4ed_cg_cp_rs1_b23_str) + 80000520: 000db203 ld x4,0(x27) + 80000524: 01c20c63 beq x4,x28,8000053c + 80000528: 4990a2ef jal x5,8000b1c0 + 8000052c: 8000051c .word 0x8000051c + 80000530: 00000000 .word 0x00000000 + 80000534: 80013960 .word 0x80013960 + 80000538: 00000000 .word 0x00000000 + 8000053c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x0d831ad6bcf41f42 + 80000540: 00033c03 ld x24,0(x6) + 80000544: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xdfa140ad1b0e926c + 80000548: 00033883 ld x17,0(x6) + 8000054c: 00830313 addi x6,x6,8 + +0000000080000550 : +Zksed_sm4ed_cg_cp_rs1_b24: + sm4ed x20, x24, x17, 3 # perform operation + 80000550: f11c0a33 sm4ed x20,x24,x17,0x3 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zksed_sm4ed_cg_cp_rs1_b24, Zksed_sm4ed_cg_cp_rs1_b24_str) + 80000554: 000db203 ld x4,0(x27) + 80000558: 01420c63 beq x4,x20,80000570 + 8000055c: 4650a2ef jal x5,8000b1c0 + 80000560: 80000550 .word 0x80000550 + 80000564: 00000000 .word 0x00000000 + 80000568: 80013995 .word 0x80013995 + 8000056c: 00000000 .word 0x00000000 + 80000570: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xf749381d6555690b + 80000574: 00033c83 ld x25,0(x6) + 80000578: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xc25426ffb0a1f08c + 8000057c: 00033c03 ld x24,0(x6) + 80000580: 00830313 addi x6,x6,8 + +0000000080000584 : +Zksed_sm4ed_cg_cp_rs1_b25: + sm4ed x9, x25, x24, 0 # perform operation + 80000584: 318c84b3 sm4ed x9,x25,x24,0x0 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zksed_sm4ed_cg_cp_rs1_b25, Zksed_sm4ed_cg_cp_rs1_b25_str) + 80000588: 000db203 ld x4,0(x27) + 8000058c: 00920c63 beq x4,x9,800005a4 + 80000590: 4310a2ef jal x5,8000b1c0 + 80000594: 80000584 .word 0x80000584 + 80000598: 00000000 .word 0x00000000 + 8000059c: 800139ca .word 0x800139ca + 800005a0: 00000000 .word 0x00000000 + 800005a4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x78d1c76075c42e22 + 800005a8: 00033d03 ld x26,0(x6) + 800005ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x8f26557ec2ba3379 + 800005b0: 00033a03 ld x20,0(x6) + 800005b4: 00830313 addi x6,x6,8 + +00000000800005b8 : +Zksed_sm4ed_cg_cp_rs1_b26: + sm4ed x17, x26, x20, 2 # perform operation + 800005b8: b14d08b3 sm4ed x17,x26,x20,0x2 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zksed_sm4ed_cg_cp_rs1_b26, Zksed_sm4ed_cg_cp_rs1_b26_str) + 800005bc: 000db203 ld x4,0(x27) + 800005c0: 01120c63 beq x4,x17,800005d8 + 800005c4: 3fd0a2ef jal x5,8000b1c0 + 800005c8: 800005b8 .word 0x800005b8 + 800005cc: 00000000 .word 0x00000000 + 800005d0: 800139ff .word 0x800139ff + 800005d4: 00000000 .word 0x00000000 + 800005d8: 008d8d93 addi x27,x27,8 + + mv x2, x27 # switch signature pointer register to avoid conflict with test + 800005dc: 000d8113 addi x2,x27,0 +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x53fc7181025ec9c7 + 800005e0: 00033d83 ld x27,0(x6) + 800005e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x8a0d130276c7b210 + 800005e8: 00033383 ld x7,0(x6) + 800005ec: 00830313 addi x6,x6,8 + +00000000800005f0 : +Zksed_sm4ed_cg_cp_rs1_b27: + sm4ed x10, x27, x7, 2 # perform operation + 800005f0: b07d8533 sm4ed x10,x27,x7,0x2 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ed_cg_cp_rs1_b27, Zksed_sm4ed_cg_cp_rs1_b27_str) + 800005f4: 00013203 ld x4,0(x2) + 800005f8: 00a20c63 beq x4,x10,80000610 + 800005fc: 3c50a2ef jal x5,8000b1c0 + 80000600: 800005f0 .word 0x800005f0 + 80000604: 00000000 .word 0x00000000 + 80000608: 80013a34 .word 0x80013a34 + 8000060c: 00000000 .word 0x00000000 + 80000610: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6e3d272104922a16 + 80000614: 00033e03 ld x28,0(x6) + 80000618: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x1de966f7263b2ef7 + 8000061c: 00033903 ld x18,0(x6) + 80000620: 00830313 addi x6,x6,8 + +0000000080000624 : +Zksed_sm4ed_cg_cp_rs1_b28: + sm4ed x24, x28, x18, 2 # perform operation + 80000624: b12e0c33 sm4ed x24,x28,x18,0x2 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ed_cg_cp_rs1_b28, Zksed_sm4ed_cg_cp_rs1_b28_str) + 80000628: 00013203 ld x4,0(x2) + 8000062c: 01820c63 beq x4,x24,80000644 + 80000630: 3910a2ef jal x5,8000b1c0 + 80000634: 80000624 .word 0x80000624 + 80000638: 00000000 .word 0x00000000 + 8000063c: 80013a69 .word 0x80013a69 + 80000640: 00000000 .word 0x00000000 + 80000644: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xba349e97f6097513 + 80000648: 00033e83 ld x29,0(x6) + 8000064c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x8f4dbe581d525113 + 80000650: 00033703 ld x14,0(x6) + 80000654: 00830313 addi x6,x6,8 + +0000000080000658 : +Zksed_sm4ed_cg_cp_rs1_b29: + sm4ed x12, x29, x14, 0 # perform operation + 80000658: 30ee8633 sm4ed x12,x29,x14,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ed_cg_cp_rs1_b29, Zksed_sm4ed_cg_cp_rs1_b29_str) + 8000065c: 00013203 ld x4,0(x2) + 80000660: 00c20c63 beq x4,x12,80000678 + 80000664: 35d0a2ef jal x5,8000b1c0 + 80000668: 80000658 .word 0x80000658 + 8000066c: 00000000 .word 0x00000000 + 80000670: 80013a9e .word 0x80013a9e + 80000674: 00000000 .word 0x00000000 + 80000678: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xfeda1e9c060e3cd4 + 8000067c: 00033f03 ld x30,0(x6) + 80000680: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xa827ff2ed0c8f50f + 80000684: 00033a83 ld x21,0(x6) + 80000688: 00830313 addi x6,x6,8 + +000000008000068c : +Zksed_sm4ed_cg_cp_rs1_b30: + sm4ed x12, x30, x21, 1 # perform operation + 8000068c: 715f0633 sm4ed x12,x30,x21,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ed_cg_cp_rs1_b30, Zksed_sm4ed_cg_cp_rs1_b30_str) + 80000690: 00013203 ld x4,0(x2) + 80000694: 00c20c63 beq x4,x12,800006ac + 80000698: 3290a2ef jal x5,8000b1c0 + 8000069c: 8000068c .word 0x8000068c + 800006a0: 00000000 .word 0x00000000 + 800006a4: 80013ad3 .word 0x80013ad3 + 800006a8: 00000000 .word 0x00000000 + 800006ac: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xe97d23124e7a1427 + 800006b0: 00033f83 ld x31,0(x6) + 800006b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xe6f910e749749847 + 800006b8: 00033d03 ld x26,0(x6) + 800006bc: 00830313 addi x6,x6,8 + +00000000800006c0 : +Zksed_sm4ed_cg_cp_rs1_b31: + sm4ed x13, x31, x26, 1 # perform operation + 800006c0: 71af86b3 sm4ed x13,x31,x26,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ed_cg_cp_rs1_b31, Zksed_sm4ed_cg_cp_rs1_b31_str) + 800006c4: 00013203 ld x4,0(x2) + 800006c8: 00d20c63 beq x4,x13,800006e0 + 800006cc: 2f50a2ef jal x5,8000b1c0 + 800006d0: 800006c0 .word 0x800006c0 + 800006d4: 00000000 .word 0x00000000 + 800006d8: 80013b08 .word 0x80013b08 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x22283687e4752ba0 + 800006e4: 00033183 ld x3,0(x6) + 800006e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x4bc48c88ee725af3 + 800006ec: 00033003 ld x0,0(x6) + 800006f0: 00830313 addi x6,x6,8 + +00000000800006f4 : +Zksed_sm4ed_cg_cp_rs2_b0: + sm4ed x7, x3, x0, 1 # perform operation + 800006f4: 700183b3 sm4ed x7,x3,x0,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ed_cg_cp_rs2_b0, Zksed_sm4ed_cg_cp_rs2_b0_str) + 800006f8: 00013203 ld x4,0(x2) + 800006fc: 00720c63 beq x4,x7,80000714 + 80000700: 2c10a2ef jal x5,8000b1c0 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80013b3d .word 0x80013b3d + 80000710: 00000000 .word 0x00000000 + 80000714: 00810113 addi x2,x2,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x10c2b5fc8f0f6418 + 80000718: 00033383 ld x7,0(x6) + 8000071c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x4e46f9330850a59f + 80000720: 00033083 ld x1,0(x6) + 80000724: 00830313 addi x6,x6,8 + +0000000080000728 : +Zksed_sm4ed_cg_cp_rs2_b1: + sm4ed x26, x7, x1, 3 # perform operation + 80000728: f0138d33 sm4ed x26,x7,x1,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ed_cg_cp_rs2_b1, Zksed_sm4ed_cg_cp_rs2_b1_str) + 8000072c: 00013203 ld x4,0(x2) + 80000730: 01a20c63 beq x4,x26,80000748 + 80000734: 28d0a2ef jal x5,8000b1c0 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80013b71 .word 0x80013b71 + 80000744: 00000000 .word 0x00000000 + 80000748: 00810113 addi x2,x2,8 + + mv x10, x2 # switch signature pointer register to avoid conflict with test + 8000074c: 00010513 addi x10,x2,0 +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x8dfe3749d6cc06c6 + 80000750: 00033703 ld x14,0(x6) + 80000754: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs2: x2 = 0xd2ba0ae2a6ff488f + 80000758: 00033103 ld x2,0(x6) + 8000075c: 00830313 addi x6,x6,8 + +0000000080000760 : +Zksed_sm4ed_cg_cp_rs2_b2: + sm4ed x9, x14, x2, 2 # perform operation + 80000760: b02704b3 sm4ed x9,x14,x2,0x2 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zksed_sm4ed_cg_cp_rs2_b2, Zksed_sm4ed_cg_cp_rs2_b2_str) + 80000764: 00053203 ld x4,0(x10) + 80000768: 00920c63 beq x4,x9,80000780 + 8000076c: 2550a2ef jal x5,8000b1c0 + 80000770: 80000760 .word 0x80000760 + 80000774: 00000000 .word 0x00000000 + 80000778: 80013ba5 .word 0x80013ba5 + 8000077c: 00000000 .word 0x00000000 + 80000780: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x70b7bfa518445808 + 80000784: 00033e83 ld x29,0(x6) + 80000788: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xe627c894d3c698b6 + 8000078c: 00033183 ld x3,0(x6) + 80000790: 00830313 addi x6,x6,8 + +0000000080000794 : +Zksed_sm4ed_cg_cp_rs2_b3: + sm4ed x22, x29, x3, 3 # perform operation + 80000794: f03e8b33 sm4ed x22,x29,x3,0x3 + # Check if x22 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x22, Zksed_sm4ed_cg_cp_rs2_b3, Zksed_sm4ed_cg_cp_rs2_b3_str) + 80000798: 00053203 ld x4,0(x10) + 8000079c: 01620c63 beq x4,x22,800007b4 + 800007a0: 2210a2ef jal x5,8000b1c0 + 800007a4: 80000794 .word 0x80000794 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 80013bd9 .word 0x80013bd9 + 800007b0: 00000000 .word 0x00000000 + 800007b4: 00850513 addi x10,x10,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007bc: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x669c6b6d83f51bd7 + 800007c0: 00033003 ld x0,0(x6) + 800007c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs2: x4 = 0xf4653ed22276ae5d + 800007c8: 00033203 ld x4,0(x6) + 800007cc: 00830313 addi x6,x6,8 + +00000000800007d0 : +Zksed_sm4ed_cg_cp_rs2_b4: + sm4ed x16, x0, x4, 3 # perform operation + 800007d0: f0400833 sm4ed x16,x0,x4,0x3 + # Check if x16 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x16, Zksed_sm4ed_cg_cp_rs2_b4, Zksed_sm4ed_cg_cp_rs2_b4_str) + 800007d4: 00053683 ld x13,0(x10) + 800007d8: 01068c63 beq x13,x16,800007f0 + 800007dc: 2250a76f jal x14,8000b200 + 800007e0: 800007d0 .word 0x800007d0 + 800007e4: 00000000 .word 0x00000000 + 800007e8: 80013c0d .word 0x80013c0d + 800007ec: 00000000 .word 0x00000000 + 800007f0: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x86a01a938994f0d0 + 800007f4: 00033603 ld x12,0(x6) + 800007f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs2: x5 = 0x8425b02071dbfffb + 800007fc: 00033283 ld x5,0(x6) + 80000800: 00830313 addi x6,x6,8 + +0000000080000804 : +Zksed_sm4ed_cg_cp_rs2_b5: + sm4ed x9, x12, x5, 1 # perform operation + 80000804: 705604b3 sm4ed x9,x12,x5,0x1 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zksed_sm4ed_cg_cp_rs2_b5, Zksed_sm4ed_cg_cp_rs2_b5_str) + 80000808: 00053683 ld x13,0(x10) + 8000080c: 00968c63 beq x13,x9,80000824 + 80000810: 1f10a76f jal x14,8000b200 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 80013c41 .word 0x80013c41 + 80000820: 00000000 .word 0x00000000 + 80000824: 00850513 addi x10,x10,8 + + mv x24, x6 # switch data pointer register to avoid conflict with test + 80000828: 00030c13 addi x24,x6,0 +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x24, x1) # load rs1: x1 = 0x6d843a66c23fbb95 + 8000082c: 000c3083 ld x1,0(x24) + 80000830: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs2: x6 = 0xec303bfd8062a143 + 80000834: 000c3303 ld x6,0(x24) + 80000838: 008c0c13 addi x24,x24,8 + +000000008000083c : +Zksed_sm4ed_cg_cp_rs2_b6: + sm4ed x9, x1, x6, 3 # perform operation + 8000083c: f06084b3 sm4ed x9,x1,x6,0x3 + # Check if x9 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x9, Zksed_sm4ed_cg_cp_rs2_b6, Zksed_sm4ed_cg_cp_rs2_b6_str) + 80000840: 00053683 ld x13,0(x10) + 80000844: 00968c63 beq x13,x9,8000085c + 80000848: 1b90a76f jal x14,8000b200 + 8000084c: 8000083c .word 0x8000083c + 80000850: 00000000 .word 0x00000000 + 80000854: 80013c75 .word 0x80013c75 + 80000858: 00000000 .word 0x00000000 + 8000085c: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x67257065eb7f02c2 + 80000860: 000c3c83 ld x25,0(x24) + 80000864: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x7) # load rs2: x7 = 0x83a1544fec5956cc + 80000868: 000c3383 ld x7,0(x24) + 8000086c: 008c0c13 addi x24,x24,8 + +0000000080000870 : +Zksed_sm4ed_cg_cp_rs2_b7: + sm4ed x30, x25, x7, 3 # perform operation + 80000870: f07c8f33 sm4ed x30,x25,x7,0x3 + # Check if x30 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x30, Zksed_sm4ed_cg_cp_rs2_b7, Zksed_sm4ed_cg_cp_rs2_b7_str) + 80000874: 00053683 ld x13,0(x10) + 80000878: 01e68c63 beq x13,x30,80000890 + 8000087c: 1850a76f jal x14,8000b200 + 80000880: 80000870 .word 0x80000870 + 80000884: 00000000 .word 0x00000000 + 80000888: 80013ca9 .word 0x80013ca9 + 8000088c: 00000000 .word 0x00000000 + 80000890: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xac1e945c61afe062 + 80000894: 000c3483 ld x9,0(x24) + 80000898: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x8) # load rs2: x8 = 0xd2027a64dfa54d36 + 8000089c: 000c3403 ld x8,0(x24) + 800008a0: 008c0c13 addi x24,x24,8 + +00000000800008a4 : +Zksed_sm4ed_cg_cp_rs2_b8: + sm4ed x26, x9, x8, 3 # perform operation + 800008a4: f0848d33 sm4ed x26,x9,x8,0x3 + # Check if x26 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x26, Zksed_sm4ed_cg_cp_rs2_b8, Zksed_sm4ed_cg_cp_rs2_b8_str) + 800008a8: 00053683 ld x13,0(x10) + 800008ac: 01a68c63 beq x13,x26,800008c4 + 800008b0: 1510a76f jal x14,8000b200 + 800008b4: 800008a4 .word 0x800008a4 + 800008b8: 00000000 .word 0x00000000 + 800008bc: 80013cdd .word 0x80013cdd + 800008c0: 00000000 .word 0x00000000 + 800008c4: 00850513 addi x10,x10,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xb9aed8cf6d128094 + 800008c8: 000c3d83 ld x27,0(x24) + 800008cc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs2: x9 = 0x81936eb2503be378 + 800008d0: 000c3483 ld x9,0(x24) + 800008d4: 008c0c13 addi x24,x24,8 + +00000000800008d8 : +Zksed_sm4ed_cg_cp_rs2_b9: + sm4ed x25, x27, x9, 2 # perform operation + 800008d8: b09d8cb3 sm4ed x25,x27,x9,0x2 + # Check if x25 contains the expected result. x10 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x10, x14, x13, x25, Zksed_sm4ed_cg_cp_rs2_b9, Zksed_sm4ed_cg_cp_rs2_b9_str) + 800008dc: 00053683 ld x13,0(x10) + 800008e0: 01968c63 beq x13,x25,800008f8 + 800008e4: 11d0a76f jal x14,8000b200 + 800008e8: 800008d8 .word 0x800008d8 + 800008ec: 00000000 .word 0x00000000 + 800008f0: 80013d11 .word 0x80013d11 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 00850513 addi x10,x10,8 + + mv x1, x10 # switch signature pointer register to avoid conflict with test + 800008fc: 00050093 addi x1,x10,0 +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0x700c581eb0ebcb46 + 80000900: 000c3183 ld x3,0(x24) + 80000904: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x10) # load rs2: x10 = 0x22369dda2f6b051f + 80000908: 000c3503 ld x10,0(x24) + 8000090c: 008c0c13 addi x24,x24,8 + +0000000080000910 : +Zksed_sm4ed_cg_cp_rs2_b10: + sm4ed x6, x3, x10, 3 # perform operation + 80000910: f0a18333 sm4ed x6,x3,x10,0x3 + # Check if x6 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x6, Zksed_sm4ed_cg_cp_rs2_b10, Zksed_sm4ed_cg_cp_rs2_b10_str) + 80000914: 0000b683 ld x13,0(x1) + 80000918: 00668c63 beq x13,x6,80000930 + 8000091c: 0e50a76f jal x14,8000b200 + 80000920: 80000910 .word 0x80000910 + 80000924: 00000000 .word 0x00000000 + 80000928: 80013d45 .word 0x80013d45 + 8000092c: 00000000 .word 0x00000000 + 80000930: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x24, x25) # load rs1: x25 = 0x22e5e78449d22ec3 + 80000934: 000c3c83 ld x25,0(x24) + 80000938: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs2: x11 = 0xa30e7f84b22902c6 + 8000093c: 000c3583 ld x11,0(x24) + 80000940: 008c0c13 addi x24,x24,8 + +0000000080000944 : +Zksed_sm4ed_cg_cp_rs2_b11: + sm4ed x19, x25, x11, 3 # perform operation + 80000944: f0bc89b3 sm4ed x19,x25,x11,0x3 + # Check if x19 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x19, Zksed_sm4ed_cg_cp_rs2_b11, Zksed_sm4ed_cg_cp_rs2_b11_str) + 80000948: 0000b683 ld x13,0(x1) + 8000094c: 01368c63 beq x13,x19,80000964 + 80000950: 0b10a76f jal x14,8000b200 + 80000954: 80000944 .word 0x80000944 + 80000958: 00000000 .word 0x00000000 + 8000095c: 80013d7a .word 0x80013d7a + 80000960: 00000000 .word 0x00000000 + 80000964: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x24, x5) # load rs1: x5 = 0x8081fa6bc3a23a9b + 80000968: 000c3283 ld x5,0(x24) + 8000096c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x12) # load rs2: x12 = 0xf5abe454da5ed4b6 + 80000970: 000c3603 ld x12,0(x24) + 80000974: 008c0c13 addi x24,x24,8 + +0000000080000978 : +Zksed_sm4ed_cg_cp_rs2_b12: + sm4ed x8, x5, x12, 3 # perform operation + 80000978: f0c28433 sm4ed x8,x5,x12,0x3 + # Check if x8 contains the expected result. x1 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x1, x14, x13, x8, Zksed_sm4ed_cg_cp_rs2_b12, Zksed_sm4ed_cg_cp_rs2_b12_str) + 8000097c: 0000b683 ld x13,0(x1) + 80000980: 00868c63 beq x13,x8,80000998 + 80000984: 07d0a76f jal x14,8000b200 + 80000988: 80000978 .word 0x80000978 + 8000098c: 00000000 .word 0x00000000 + 80000990: 80013daf .word 0x80013daf + 80000994: 00000000 .word 0x00000000 + 80000998: 00808093 addi x1,x1,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000099c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800009a0: 00070413 addi x8,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x24, x31) # load rs1: x31 = 0xb385c1ba28ad9560 + 800009a4: 000c3f83 ld x31,0(x24) + 800009a8: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs2: x13 = 0xe53e0017ef8e4684 + 800009ac: 000c3683 ld x13,0(x24) + 800009b0: 008c0c13 addi x24,x24,8 + +00000000800009b4 : +Zksed_sm4ed_cg_cp_rs2_b13: + sm4ed x5, x31, x13, 0 # perform operation + 800009b4: 30df82b3 sm4ed x5,x31,x13,0x0 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b13, Zksed_sm4ed_cg_cp_rs2_b13_str) + 800009b8: 0000b383 ld x7,0(x1) + 800009bc: 00538c63 beq x7,x5,800009d4 + 800009c0: 0190a46f jal x8,8000b1d8 + 800009c4: 800009b4 .word 0x800009b4 + 800009c8: 00000000 .word 0x00000000 + 800009cc: 80013de4 .word 0x80013de4 + 800009d0: 00000000 .word 0x00000000 + 800009d4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x24, x11) # load rs1: x11 = 0x032a7afe7c9a9bcd + 800009d8: 000c3583 ld x11,0(x24) + 800009dc: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs2: x14 = 0x74986e3790a16dc2 + 800009e0: 000c3703 ld x14,0(x24) + 800009e4: 008c0c13 addi x24,x24,8 + +00000000800009e8 : +Zksed_sm4ed_cg_cp_rs2_b14: + sm4ed x16, x11, x14, 0 # perform operation + 800009e8: 30e58833 sm4ed x16,x11,x14,0x0 + # Check if x16 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x16, Zksed_sm4ed_cg_cp_rs2_b14, Zksed_sm4ed_cg_cp_rs2_b14_str) + 800009ec: 0000b383 ld x7,0(x1) + 800009f0: 01038c63 beq x7,x16,80000a08 + 800009f4: 7e40a46f jal x8,8000b1d8 + 800009f8: 800009e8 .word 0x800009e8 + 800009fc: 00000000 .word 0x00000000 + 80000a00: 80013e19 .word 0x80013e19 + 80000a04: 00000000 .word 0x00000000 + 80000a08: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs1: x18 = 0x7579e73fad9ec6e4 + 80000a0c: 000c3903 ld x18,0(x24) + 80000a10: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0xa19d931567b73ebd + 80000a14: 000c3783 ld x15,0(x24) + 80000a18: 008c0c13 addi x24,x24,8 + +0000000080000a1c : +Zksed_sm4ed_cg_cp_rs2_b15: + sm4ed x21, x18, x15, 0 # perform operation + 80000a1c: 30f90ab3 sm4ed x21,x18,x15,0x0 + # Check if x21 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x21, Zksed_sm4ed_cg_cp_rs2_b15, Zksed_sm4ed_cg_cp_rs2_b15_str) + 80000a20: 0000b383 ld x7,0(x1) + 80000a24: 01538c63 beq x7,x21,80000a3c + 80000a28: 7b00a46f jal x8,8000b1d8 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 80013e4e .word 0x80013e4e + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x2) # load rs1: x2 = 0x11eae181139460e8 + 80000a40: 000c3103 ld x2,0(x24) + 80000a44: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xe2d24eaa478a942b + 80000a48: 000c3803 ld x16,0(x24) + 80000a4c: 008c0c13 addi x24,x24,8 + +0000000080000a50 : +Zksed_sm4ed_cg_cp_rs2_b16: + sm4ed x4, x2, x16, 3 # perform operation + 80000a50: f1010233 sm4ed x4,x2,x16,0x3 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zksed_sm4ed_cg_cp_rs2_b16, Zksed_sm4ed_cg_cp_rs2_b16_str) + 80000a54: 0000b383 ld x7,0(x1) + 80000a58: 00438c63 beq x7,x4,80000a70 + 80000a5c: 77c0a46f jal x8,8000b1d8 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 80013e83 .word 0x80013e83 + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x3d16679a6a60c8c3 + 80000a74: 000c3a03 ld x20,0(x24) + 80000a78: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xece5cf7d5c4c4d37 + 80000a7c: 000c3883 ld x17,0(x24) + 80000a80: 008c0c13 addi x24,x24,8 + +0000000080000a84 : +Zksed_sm4ed_cg_cp_rs2_b17: + sm4ed x22, x20, x17, 1 # perform operation + 80000a84: 711a0b33 sm4ed x22,x20,x17,0x1 + # Check if x22 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x22, Zksed_sm4ed_cg_cp_rs2_b17, Zksed_sm4ed_cg_cp_rs2_b17_str) + 80000a88: 0000b383 ld x7,0(x1) + 80000a8c: 01638c63 beq x7,x22,80000aa4 + 80000a90: 7480a46f jal x8,8000b1d8 + 80000a94: 80000a84 .word 0x80000a84 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 80013eb8 .word 0x80013eb8 + 80000aa0: 00000000 .word 0x00000000 + 80000aa4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x9) # load rs1: x9 = 0xd4692c50b80114a6 + 80000aa8: 000c3483 ld x9,0(x24) + 80000aac: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0xcf67397d442a23e8 + 80000ab0: 000c3903 ld x18,0(x24) + 80000ab4: 008c0c13 addi x24,x24,8 + +0000000080000ab8 : +Zksed_sm4ed_cg_cp_rs2_b18: + sm4ed x30, x9, x18, 3 # perform operation + 80000ab8: f1248f33 sm4ed x30,x9,x18,0x3 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zksed_sm4ed_cg_cp_rs2_b18, Zksed_sm4ed_cg_cp_rs2_b18_str) + 80000abc: 0000b383 ld x7,0(x1) + 80000ac0: 01e38c63 beq x7,x30,80000ad8 + 80000ac4: 7140a46f jal x8,8000b1d8 + 80000ac8: 80000ab8 .word 0x80000ab8 + 80000acc: 00000000 .word 0x00000000 + 80000ad0: 80013eed .word 0x80013eed + 80000ad4: 00000000 .word 0x00000000 + 80000ad8: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x27) # load rs1: x27 = 0xf37ed847651a4d65 + 80000adc: 000c3d83 ld x27,0(x24) + 80000ae0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xc5a578179d528a27 + 80000ae4: 000c3983 ld x19,0(x24) + 80000ae8: 008c0c13 addi x24,x24,8 + +0000000080000aec : +Zksed_sm4ed_cg_cp_rs2_b19: + sm4ed x31, x27, x19, 1 # perform operation + 80000aec: 713d8fb3 sm4ed x31,x27,x19,0x1 + # Check if x31 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x31, Zksed_sm4ed_cg_cp_rs2_b19, Zksed_sm4ed_cg_cp_rs2_b19_str) + 80000af0: 0000b383 ld x7,0(x1) + 80000af4: 01f38c63 beq x7,x31,80000b0c + 80000af8: 6e00a46f jal x8,8000b1d8 + 80000afc: 80000aec .word 0x80000aec + 80000b00: 00000000 .word 0x00000000 + 80000b04: 80013f22 .word 0x80013f22 + 80000b08: 00000000 .word 0x00000000 + 80000b0c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x03154887e505dacc + 80000b10: 000c3683 ld x13,0(x24) + 80000b14: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0xd5e28145bda0aac7 + 80000b18: 000c3a03 ld x20,0(x24) + 80000b1c: 008c0c13 addi x24,x24,8 + +0000000080000b20 : +Zksed_sm4ed_cg_cp_rs2_b20: + sm4ed x23, x13, x20, 1 # perform operation + 80000b20: 71468bb3 sm4ed x23,x13,x20,0x1 + # Check if x23 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x23, Zksed_sm4ed_cg_cp_rs2_b20, Zksed_sm4ed_cg_cp_rs2_b20_str) + 80000b24: 0000b383 ld x7,0(x1) + 80000b28: 01738c63 beq x7,x23,80000b40 + 80000b2c: 6ac0a46f jal x8,8000b1d8 + 80000b30: 80000b20 .word 0x80000b20 + 80000b34: 00000000 .word 0x00000000 + 80000b38: 80013f57 .word 0x80013f57 + 80000b3c: 00000000 .word 0x00000000 + 80000b40: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs1: x20 = 0x7c8e8947e0a11ade + 80000b44: 000c3a03 ld x20,0(x24) + 80000b48: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0x7a904034cac3add7 + 80000b4c: 000c3a83 ld x21,0(x24) + 80000b50: 008c0c13 addi x24,x24,8 + +0000000080000b54 : +Zksed_sm4ed_cg_cp_rs2_b21: + sm4ed x5, x20, x21, 2 # perform operation + 80000b54: b15a02b3 sm4ed x5,x20,x21,0x2 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b21, Zksed_sm4ed_cg_cp_rs2_b21_str) + 80000b58: 0000b383 ld x7,0(x1) + 80000b5c: 00538c63 beq x7,x5,80000b74 + 80000b60: 6780a46f jal x8,8000b1d8 + 80000b64: 80000b54 .word 0x80000b54 + 80000b68: 00000000 .word 0x00000000 + 80000b6c: 80013f8c .word 0x80013f8c + 80000b70: 00000000 .word 0x00000000 + 80000b74: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x1b88477a48e99dd3 + 80000b78: 000c3e03 ld x28,0(x24) + 80000b7c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xf8cc56ddacfc437d + 80000b80: 000c3b03 ld x22,0(x24) + 80000b84: 008c0c13 addi x24,x24,8 + +0000000080000b88 : +Zksed_sm4ed_cg_cp_rs2_b22: + sm4ed x30, x28, x22, 0 # perform operation + 80000b88: 316e0f33 sm4ed x30,x28,x22,0x0 + # Check if x30 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x30, Zksed_sm4ed_cg_cp_rs2_b22, Zksed_sm4ed_cg_cp_rs2_b22_str) + 80000b8c: 0000b383 ld x7,0(x1) + 80000b90: 01e38c63 beq x7,x30,80000ba8 + 80000b94: 6440a46f jal x8,8000b1d8 + 80000b98: 80000b88 .word 0x80000b88 + 80000b9c: 00000000 .word 0x00000000 + 80000ba0: 80013fc1 .word 0x80013fc1 + 80000ba4: 00000000 .word 0x00000000 + 80000ba8: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x28) # load rs1: x28 = 0x3f78752b5a649489 + 80000bac: 000c3e03 ld x28,0(x24) + 80000bb0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0xe716f045f63c7975 + 80000bb4: 000c3b83 ld x23,0(x24) + 80000bb8: 008c0c13 addi x24,x24,8 + +0000000080000bbc : +Zksed_sm4ed_cg_cp_rs2_b23: + sm4ed x3, x28, x23, 1 # perform operation + 80000bbc: 717e01b3 sm4ed x3,x28,x23,0x1 + # Check if x3 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x3, Zksed_sm4ed_cg_cp_rs2_b23, Zksed_sm4ed_cg_cp_rs2_b23_str) + 80000bc0: 0000b383 ld x7,0(x1) + 80000bc4: 00338c63 beq x7,x3,80000bdc + 80000bc8: 6100a46f jal x8,8000b1d8 + 80000bcc: 80000bbc .word 0x80000bbc + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 80013ff6 .word 0x80013ff6 + 80000bd8: 00000000 .word 0x00000000 + 80000bdc: 00808093 addi x1,x1,8 + + mv x20, x24 # switch data pointer register to avoid conflict with test + 80000be0: 000c0a13 addi x20,x24,0 +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x32e883a80d6a562a + 80000be4: 000a3003 ld x0,0(x20) + 80000be8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xebbddb3d9913d951 + 80000bec: 000a3c03 ld x24,0(x20) + 80000bf0: 008a0a13 addi x20,x20,8 + +0000000080000bf4 : +Zksed_sm4ed_cg_cp_rs2_b24: + sm4ed x27, x0, x24, 3 # perform operation + 80000bf4: f1800db3 sm4ed x27,x0,x24,0x3 + # Check if x27 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x27, Zksed_sm4ed_cg_cp_rs2_b24, Zksed_sm4ed_cg_cp_rs2_b24_str) + 80000bf8: 0000b383 ld x7,0(x1) + 80000bfc: 01b38c63 beq x7,x27,80000c14 + 80000c00: 5d80a46f jal x8,8000b1d8 + 80000c04: 80000bf4 .word 0x80000bf4 + 80000c08: 00000000 .word 0x00000000 + 80000c0c: 8001402b .word 0x8001402b + 80000c10: 00000000 .word 0x00000000 + 80000c14: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs1: x22 = 0x6e2ab99d5c9b6171 + 80000c18: 000a3b03 ld x22,0(x20) + 80000c1c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs2: x25 = 0x700ad15bed362434 + 80000c20: 000a3c83 ld x25,0(x20) + 80000c24: 008a0a13 addi x20,x20,8 + +0000000080000c28 : +Zksed_sm4ed_cg_cp_rs2_b25: + sm4ed x3, x22, x25, 1 # perform operation + 80000c28: 719b01b3 sm4ed x3,x22,x25,0x1 + # Check if x3 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x3, Zksed_sm4ed_cg_cp_rs2_b25, Zksed_sm4ed_cg_cp_rs2_b25_str) + 80000c2c: 0000b383 ld x7,0(x1) + 80000c30: 00338c63 beq x7,x3,80000c48 + 80000c34: 5a40a46f jal x8,8000b1d8 + 80000c38: 80000c28 .word 0x80000c28 + 80000c3c: 00000000 .word 0x00000000 + 80000c40: 80014060 .word 0x80014060 + 80000c44: 00000000 .word 0x00000000 + 80000c48: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x08b33a1afee56446 + 80000c4c: 000a3583 ld x11,0(x20) + 80000c50: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xed9823addf01f334 + 80000c54: 000a3d03 ld x26,0(x20) + 80000c58: 008a0a13 addi x20,x20,8 + +0000000080000c5c : +Zksed_sm4ed_cg_cp_rs2_b26: + sm4ed x19, x11, x26, 0 # perform operation + 80000c5c: 31a589b3 sm4ed x19,x11,x26,0x0 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zksed_sm4ed_cg_cp_rs2_b26, Zksed_sm4ed_cg_cp_rs2_b26_str) + 80000c60: 0000b383 ld x7,0(x1) + 80000c64: 01338c63 beq x7,x19,80000c7c + 80000c68: 5700a46f jal x8,8000b1d8 + 80000c6c: 80000c5c .word 0x80000c5c + 80000c70: 00000000 .word 0x00000000 + 80000c74: 80014095 .word 0x80014095 + 80000c78: 00000000 .word 0x00000000 + 80000c7c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x1a56e98bbc8e94b0 + 80000c80: 000a3603 ld x12,0(x20) + 80000c84: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x23bff50226c5dd55 + 80000c88: 000a3d83 ld x27,0(x20) + 80000c8c: 008a0a13 addi x20,x20,8 + +0000000080000c90 : +Zksed_sm4ed_cg_cp_rs2_b27: + sm4ed x19, x12, x27, 0 # perform operation + 80000c90: 31b609b3 sm4ed x19,x12,x27,0x0 + # Check if x19 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x19, Zksed_sm4ed_cg_cp_rs2_b27, Zksed_sm4ed_cg_cp_rs2_b27_str) + 80000c94: 0000b383 ld x7,0(x1) + 80000c98: 01338c63 beq x7,x19,80000cb0 + 80000c9c: 53c0a46f jal x8,8000b1d8 + 80000ca0: 80000c90 .word 0x80000c90 + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 800140ca .word 0x800140ca + 80000cac: 00000000 .word 0x00000000 + 80000cb0: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0xf0d2cb396c22a6fb + 80000cb4: 000a3583 ld x11,0(x20) + 80000cb8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs2: x28 = 0xc3af71d151d5f63a + 80000cbc: 000a3e03 ld x28,0(x20) + 80000cc0: 008a0a13 addi x20,x20,8 + +0000000080000cc4 : +Zksed_sm4ed_cg_cp_rs2_b28: + sm4ed x4, x11, x28, 3 # perform operation + 80000cc4: f1c58233 sm4ed x4,x11,x28,0x3 + # Check if x4 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x4, Zksed_sm4ed_cg_cp_rs2_b28, Zksed_sm4ed_cg_cp_rs2_b28_str) + 80000cc8: 0000b383 ld x7,0(x1) + 80000ccc: 00438c63 beq x7,x4,80000ce4 + 80000cd0: 5080a46f jal x8,8000b1d8 + 80000cd4: 80000cc4 .word 0x80000cc4 + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 800140ff .word 0x800140ff + 80000ce0: 00000000 .word 0x00000000 + 80000ce4: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xee66da8193659e17 + 80000ce8: 000a3683 ld x13,0(x20) + 80000cec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x30b8d9270eb79e37 + 80000cf0: 000a3e83 ld x29,0(x20) + 80000cf4: 008a0a13 addi x20,x20,8 + +0000000080000cf8 : +Zksed_sm4ed_cg_cp_rs2_b29: + sm4ed x28, x13, x29, 3 # perform operation + 80000cf8: f1d68e33 sm4ed x28,x13,x29,0x3 + # Check if x28 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x28, Zksed_sm4ed_cg_cp_rs2_b29, Zksed_sm4ed_cg_cp_rs2_b29_str) + 80000cfc: 0000b383 ld x7,0(x1) + 80000d00: 01c38c63 beq x7,x28,80000d18 + 80000d04: 4d40a46f jal x8,8000b1d8 + 80000d08: 80000cf8 .word 0x80000cf8 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 80014134 .word 0x80014134 + 80000d14: 00000000 .word 0x00000000 + 80000d18: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x26e8498b7038dda4 + 80000d1c: 000a3583 ld x11,0(x20) + 80000d20: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x30) # load rs2: x30 = 0x0816b599e287dc41 + 80000d24: 000a3f03 ld x30,0(x20) + 80000d28: 008a0a13 addi x20,x20,8 + +0000000080000d2c : +Zksed_sm4ed_cg_cp_rs2_b30: + sm4ed x5, x11, x30, 3 # perform operation + 80000d2c: f1e582b3 sm4ed x5,x11,x30,0x3 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b30, Zksed_sm4ed_cg_cp_rs2_b30_str) + 80000d30: 0000b383 ld x7,0(x1) + 80000d34: 00538c63 beq x7,x5,80000d4c + 80000d38: 4a00a46f jal x8,8000b1d8 + 80000d3c: 80000d2c .word 0x80000d2c + 80000d40: 00000000 .word 0x00000000 + 80000d44: 80014169 .word 0x80014169 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 00808093 addi x1,x1,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0xb424ad3ce36aa2ae + 80000d50: 000a3503 ld x10,0(x20) + 80000d54: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0xd487f34f29914226 + 80000d58: 000a3f83 ld x31,0(x20) + 80000d5c: 008a0a13 addi x20,x20,8 + +0000000080000d60 : +Zksed_sm4ed_cg_cp_rs2_b31: + sm4ed x5, x10, x31, 0 # perform operation + 80000d60: 31f502b3 sm4ed x5,x10,x31,0x0 + # Check if x5 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x5, Zksed_sm4ed_cg_cp_rs2_b31, Zksed_sm4ed_cg_cp_rs2_b31_str) + 80000d64: 0000b383 ld x7,0(x1) + 80000d68: 00538c63 beq x7,x5,80000d80 + 80000d6c: 46c0a46f jal x8,8000b1d8 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 8001419e .word 0x8001419e + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00808093 addi x1,x1,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xd8ef2e7425ee301b + 80000d84: 000a3703 ld x14,0(x20) + 80000d88: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x31) # load rs2: x31 = 0x464e03ced291787b + 80000d8c: 000a3f83 ld x31,0(x20) + 80000d90: 008a0a13 addi x20,x20,8 + +0000000080000d94 : +Zksed_sm4ed_cg_cp_rd_b0: + sm4ed x0, x14, x31, 0 # perform operation + 80000d94: 31f70033 sm4ed x0,x14,x31,0x0 + # Check if x0 contains the expected result. x1 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x1, x8, x7, x0, Zksed_sm4ed_cg_cp_rd_b0, Zksed_sm4ed_cg_cp_rd_b0_str) + 80000d98: 0000b383 ld x7,0(x1) + 80000d9c: 00038c63 beq x7,x0,80000db4 + 80000da0: 4380a46f jal x8,8000b1d8 + 80000da4: 80000d94 .word 0x80000d94 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 800141d3 .word 0x800141d3 + 80000db0: 00000000 .word 0x00000000 + 80000db4: 00808093 addi x1,x1,8 + + mv x10, x1 # switch signature pointer register to avoid conflict with test + 80000db8: 00008513 addi x10,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs1: x0 = 0x8564d8889b5174ca + 80000dbc: 000a3003 ld x0,0(x20) + 80000dc0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xd9b89354d9657eaa + 80000dc4: 000a3e83 ld x29,0(x20) + 80000dc8: 008a0a13 addi x20,x20,8 + +0000000080000dcc : +Zksed_sm4ed_cg_cp_rd_b1: + sm4ed x1, x0, x29, 2 # perform operation + 80000dcc: b1d000b3 sm4ed x1,x0,x29,0x2 + # Check if x1 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x1, Zksed_sm4ed_cg_cp_rd_b1, Zksed_sm4ed_cg_cp_rd_b1_str) + 80000dd0: 00053383 ld x7,0(x10) + 80000dd4: 00138c63 beq x7,x1,80000dec + 80000dd8: 4000a46f jal x8,8000b1d8 + 80000ddc: 80000dcc .word 0x80000dcc + 80000de0: 00000000 .word 0x00000000 + 80000de4: 80014206 .word 0x80014206 + 80000de8: 00000000 .word 0x00000000 + 80000dec: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x20, x28) # load rs1: x28 = 0x4c3675853b57c0e2 + 80000df0: 000a3e03 ld x28,0(x20) + 80000df4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x12176eb8865ba3a0 + 80000df8: 000a3b03 ld x22,0(x20) + 80000dfc: 008a0a13 addi x20,x20,8 + +0000000080000e00 : +Zksed_sm4ed_cg_cp_rd_b2: + sm4ed x2, x28, x22, 0 # perform operation + 80000e00: 316e0133 sm4ed x2,x28,x22,0x0 + # Check if x2 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x2, Zksed_sm4ed_cg_cp_rd_b2, Zksed_sm4ed_cg_cp_rd_b2_str) + 80000e04: 00053383 ld x7,0(x10) + 80000e08: 00238c63 beq x7,x2,80000e20 + 80000e0c: 3cc0a46f jal x8,8000b1d8 + 80000e10: 80000e00 .word 0x80000e00 + 80000e14: 00000000 .word 0x00000000 + 80000e18: 80014239 .word 0x80014239 + 80000e1c: 00000000 .word 0x00000000 + 80000e20: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x6c867cbac422f814 + 80000e24: 000a3783 ld x15,0(x20) + 80000e28: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xbfe0fd9f48a39622 + 80000e2c: 000a3003 ld x0,0(x20) + 80000e30: 008a0a13 addi x20,x20,8 + +0000000080000e34 : +Zksed_sm4ed_cg_cp_rd_b3: + sm4ed x3, x15, x0, 1 # perform operation + 80000e34: 700781b3 sm4ed x3,x15,x0,0x1 + # Check if x3 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x3, Zksed_sm4ed_cg_cp_rd_b3, Zksed_sm4ed_cg_cp_rd_b3_str) + 80000e38: 00053383 ld x7,0(x10) + 80000e3c: 00338c63 beq x7,x3,80000e54 + 80000e40: 3980a46f jal x8,8000b1d8 + 80000e44: 80000e34 .word 0x80000e34 + 80000e48: 00000000 .word 0x00000000 + 80000e4c: 8001426c .word 0x8001426c + 80000e50: 00000000 .word 0x00000000 + 80000e54: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x8194bfb740a43898 + 80000e58: 000a3803 ld x16,0(x20) + 80000e5c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x2158d23cbec90be9 + 80000e60: 000a3683 ld x13,0(x20) + 80000e64: 008a0a13 addi x20,x20,8 + +0000000080000e68 : +Zksed_sm4ed_cg_cp_rd_b4: + sm4ed x4, x16, x13, 3 # perform operation + 80000e68: f0d80233 sm4ed x4,x16,x13,0x3 + # Check if x4 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x4, Zksed_sm4ed_cg_cp_rd_b4, Zksed_sm4ed_cg_cp_rd_b4_str) + 80000e6c: 00053383 ld x7,0(x10) + 80000e70: 00438c63 beq x7,x4,80000e88 + 80000e74: 3640a46f jal x8,8000b1d8 + 80000e78: 80000e68 .word 0x80000e68 + 80000e7c: 00000000 .word 0x00000000 + 80000e80: 8001429f .word 0x8001429f + 80000e84: 00000000 .word 0x00000000 + 80000e88: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs1: x24 = 0x3f45a9700ae736ae + 80000e8c: 000a3c03 ld x24,0(x20) + 80000e90: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x3fdb74694c0cb881 + 80000e94: 000a3783 ld x15,0(x20) + 80000e98: 008a0a13 addi x20,x20,8 + +0000000080000e9c : +Zksed_sm4ed_cg_cp_rd_b5: + sm4ed x5, x24, x15, 2 # perform operation + 80000e9c: b0fc02b3 sm4ed x5,x24,x15,0x2 + # Check if x5 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x5, Zksed_sm4ed_cg_cp_rd_b5, Zksed_sm4ed_cg_cp_rd_b5_str) + 80000ea0: 00053383 ld x7,0(x10) + 80000ea4: 00538c63 beq x7,x5,80000ebc + 80000ea8: 3300a46f jal x8,8000b1d8 + 80000eac: 80000e9c .word 0x80000e9c + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 800142d2 .word 0x800142d2 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xa0343c2a2e8d563a + 80000ec0: 000a3083 ld x1,0(x20) + 80000ec4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x4) # load rs2: x4 = 0x520fbd45c2faf51f + 80000ec8: 000a3203 ld x4,0(x20) + 80000ecc: 008a0a13 addi x20,x20,8 + +0000000080000ed0 : +Zksed_sm4ed_cg_cp_rd_b6: + sm4ed x6, x1, x4, 2 # perform operation + 80000ed0: b0408333 sm4ed x6,x1,x4,0x2 + # Check if x6 contains the expected result. x10 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x10, x8, x7, x6, Zksed_sm4ed_cg_cp_rd_b6, Zksed_sm4ed_cg_cp_rd_b6_str) + 80000ed4: 00053383 ld x7,0(x10) + 80000ed8: 00638c63 beq x7,x6,80000ef0 + 80000edc: 2fc0a46f jal x8,8000b1d8 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 80014305 .word 0x80014305 + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 00850513 addi x10,x10,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000ef4: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000ef8: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0x9ea5c0618b00413b + 80000efc: 000a3c83 ld x25,0(x20) + 80000f00: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x22) # load rs2: x22 = 0x2c7113cf99f2f766 + 80000f04: 000a3b03 ld x22,0(x20) + 80000f08: 008a0a13 addi x20,x20,8 + +0000000080000f0c : +Zksed_sm4ed_cg_cp_rd_b7: + sm4ed x7, x25, x22, 1 # perform operation + 80000f0c: 716c83b3 sm4ed x7,x25,x22,0x1 + # Check if x7 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x7, Zksed_sm4ed_cg_cp_rd_b7, Zksed_sm4ed_cg_cp_rd_b7_str) + 80000f10: 00053203 ld x4,0(x10) + 80000f14: 00720c63 beq x4,x7,80000f2c + 80000f18: 2a80a2ef jal x5,8000b1c0 + 80000f1c: 80000f0c .word 0x80000f0c + 80000f20: 00000000 .word 0x00000000 + 80000f24: 80014338 .word 0x80014338 + 80000f28: 00000000 .word 0x00000000 + 80000f2c: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x149b2d759106a05c + 80000f30: 000a3803 ld x16,0(x20) + 80000f34: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xd0bd49bb7639914a + 80000f38: 000a3903 ld x18,0(x20) + 80000f3c: 008a0a13 addi x20,x20,8 + +0000000080000f40 : +Zksed_sm4ed_cg_cp_rd_b8: + sm4ed x8, x16, x18, 1 # perform operation + 80000f40: 71280433 sm4ed x8,x16,x18,0x1 + # Check if x8 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x8, Zksed_sm4ed_cg_cp_rd_b8, Zksed_sm4ed_cg_cp_rd_b8_str) + 80000f44: 00053203 ld x4,0(x10) + 80000f48: 00820c63 beq x4,x8,80000f60 + 80000f4c: 2740a2ef jal x5,8000b1c0 + 80000f50: 80000f40 .word 0x80000f40 + 80000f54: 00000000 .word 0x00000000 + 80000f58: 8001436b .word 0x8001436b + 80000f5c: 00000000 .word 0x00000000 + 80000f60: 00850513 addi x10,x10,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0xae1e0c073429890b + 80000f64: 000a3603 ld x12,0(x20) + 80000f68: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x0) # load rs2: x0 = 0xf5a3ff85088d3eab + 80000f6c: 000a3003 ld x0,0(x20) + 80000f70: 008a0a13 addi x20,x20,8 + +0000000080000f74 : +Zksed_sm4ed_cg_cp_rd_b9: + sm4ed x9, x12, x0, 1 # perform operation + 80000f74: 700604b3 sm4ed x9,x12,x0,0x1 + # Check if x9 contains the expected result. x10 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x10, x5, x4, x9, Zksed_sm4ed_cg_cp_rd_b9, Zksed_sm4ed_cg_cp_rd_b9_str) + 80000f78: 00053203 ld x4,0(x10) + 80000f7c: 00920c63 beq x4,x9,80000f94 + 80000f80: 2400a2ef jal x5,8000b1c0 + 80000f84: 80000f74 .word 0x80000f74 + 80000f88: 00000000 .word 0x00000000 + 80000f8c: 8001439e .word 0x8001439e + 80000f90: 00000000 .word 0x00000000 + 80000f94: 00850513 addi x10,x10,8 + + mv x16, x10 # switch signature pointer register to avoid conflict with test + 80000f98: 00050813 addi x16,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x8adc9cd70ac3c2f1 + 80000f9c: 000a3603 ld x12,0(x20) + 80000fa0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x24) # load rs2: x24 = 0xab5b891fc14aea9d + 80000fa4: 000a3c03 ld x24,0(x20) + 80000fa8: 008a0a13 addi x20,x20,8 + +0000000080000fac : +Zksed_sm4ed_cg_cp_rd_b10: + sm4ed x10, x12, x24, 2 # perform operation + 80000fac: b1860533 sm4ed x10,x12,x24,0x2 + # Check if x10 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x10, Zksed_sm4ed_cg_cp_rd_b10, Zksed_sm4ed_cg_cp_rd_b10_str) + 80000fb0: 00083203 ld x4,0(x16) + 80000fb4: 00a20c63 beq x4,x10,80000fcc + 80000fb8: 2080a2ef jal x5,8000b1c0 + 80000fbc: 80000fac .word 0x80000fac + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 800143d1 .word 0x800143d1 + 80000fc8: 00000000 .word 0x00000000 + 80000fcc: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x1) # load rs1: x1 = 0xc7cc0f38fe8b8ed8 + 80000fd0: 000a3083 ld x1,0(x20) + 80000fd4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0x3d57a70ad9c686e0 + 80000fd8: 000a3e83 ld x29,0(x20) + 80000fdc: 008a0a13 addi x20,x20,8 + +0000000080000fe0 : +Zksed_sm4ed_cg_cp_rd_b11: + sm4ed x11, x1, x29, 3 # perform operation + 80000fe0: f1d085b3 sm4ed x11,x1,x29,0x3 + # Check if x11 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x11, Zksed_sm4ed_cg_cp_rd_b11, Zksed_sm4ed_cg_cp_rd_b11_str) + 80000fe4: 00083203 ld x4,0(x16) + 80000fe8: 00b20c63 beq x4,x11,80001000 + 80000fec: 1d40a2ef jal x5,8000b1c0 + 80000ff0: 80000fe0 .word 0x80000fe0 + 80000ff4: 00000000 .word 0x00000000 + 80000ff8: 80014405 .word 0x80014405 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x25) # load rs1: x25 = 0xbeaadfd8c97bb9aa + 80001004: 000a3c83 ld x25,0(x20) + 80001008: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x29) # load rs2: x29 = 0xd6ec094a273b7219 + 8000100c: 000a3e83 ld x29,0(x20) + 80001010: 008a0a13 addi x20,x20,8 + +0000000080001014 : +Zksed_sm4ed_cg_cp_rd_b12: + sm4ed x12, x25, x29, 1 # perform operation + 80001014: 71dc8633 sm4ed x12,x25,x29,0x1 + # Check if x12 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x12, Zksed_sm4ed_cg_cp_rd_b12, Zksed_sm4ed_cg_cp_rd_b12_str) + 80001018: 00083203 ld x4,0(x16) + 8000101c: 00c20c63 beq x4,x12,80001034 + 80001020: 1a00a2ef jal x5,8000b1c0 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80014439 .word 0x80014439 + 80001030: 00000000 .word 0x00000000 + 80001034: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs1: x6 = 0x8e653952faf4997c + 80001038: 000a3303 ld x6,0(x20) + 8000103c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xdea2088308e02b0a + 80001040: 000a3903 ld x18,0(x20) + 80001044: 008a0a13 addi x20,x20,8 + +0000000080001048 : +Zksed_sm4ed_cg_cp_rd_b13: + sm4ed x13, x6, x18, 3 # perform operation + 80001048: f12306b3 sm4ed x13,x6,x18,0x3 + # Check if x13 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x13, Zksed_sm4ed_cg_cp_rd_b13, Zksed_sm4ed_cg_cp_rd_b13_str) + 8000104c: 00083203 ld x4,0(x16) + 80001050: 00d20c63 beq x4,x13,80001068 + 80001054: 16c0a2ef jal x5,8000b1c0 + 80001058: 80001048 .word 0x80001048 + 8000105c: 00000000 .word 0x00000000 + 80001060: 8001446d .word 0x8001446d + 80001064: 00000000 .word 0x00000000 + 80001068: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x9) # load rs1: x9 = 0xe80d57f2d5e1b6b0 + 8000106c: 000a3483 ld x9,0(x20) + 80001070: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0x268887e697907a38 + 80001074: 000a3d03 ld x26,0(x20) + 80001078: 008a0a13 addi x20,x20,8 + +000000008000107c : +Zksed_sm4ed_cg_cp_rd_b14: + sm4ed x14, x9, x26, 3 # perform operation + 8000107c: f1a48733 sm4ed x14,x9,x26,0x3 + # Check if x14 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x14, Zksed_sm4ed_cg_cp_rd_b14, Zksed_sm4ed_cg_cp_rd_b14_str) + 80001080: 00083203 ld x4,0(x16) + 80001084: 00e20c63 beq x4,x14,8000109c + 80001088: 1380a2ef jal x5,8000b1c0 + 8000108c: 8000107c .word 0x8000107c + 80001090: 00000000 .word 0x00000000 + 80001094: 800144a1 .word 0x800144a1 + 80001098: 00000000 .word 0x00000000 + 8000109c: 00880813 addi x16,x16,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xc50fe4c79505376b + 800010a0: 000a3883 ld x17,0(x20) + 800010a4: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x27) # load rs2: x27 = 0x46af41c710c3828e + 800010a8: 000a3d83 ld x27,0(x20) + 800010ac: 008a0a13 addi x20,x20,8 + +00000000800010b0 : +Zksed_sm4ed_cg_cp_rd_b15: + sm4ed x15, x17, x27, 2 # perform operation + 800010b0: b1b887b3 sm4ed x15,x17,x27,0x2 + # Check if x15 contains the expected result. x16 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x16, x5, x4, x15, Zksed_sm4ed_cg_cp_rd_b15, Zksed_sm4ed_cg_cp_rd_b15_str) + 800010b4: 00083203 ld x4,0(x16) + 800010b8: 00f20c63 beq x4,x15,800010d0 + 800010bc: 1040a2ef jal x5,8000b1c0 + 800010c0: 800010b0 .word 0x800010b0 + 800010c4: 00000000 .word 0x00000000 + 800010c8: 800144d5 .word 0x800144d5 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 00880813 addi x16,x16,8 + + mv x15, x16 # switch signature pointer register to avoid conflict with test + 800010d4: 00080793 addi x15,x16,0 +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xe392d0684eee2f13 + 800010d8: 000a3683 ld x13,0(x20) + 800010dc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x23) # load rs2: x23 = 0xd81c0df8d2b4bba4 + 800010e0: 000a3b83 ld x23,0(x20) + 800010e4: 008a0a13 addi x20,x20,8 + +00000000800010e8 : +Zksed_sm4ed_cg_cp_rd_b16: + sm4ed x16, x13, x23, 3 # perform operation + 800010e8: f1768833 sm4ed x16,x13,x23,0x3 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cp_rd_b16, Zksed_sm4ed_cg_cp_rd_b16_str) + 800010ec: 0007b203 ld x4,0(x15) + 800010f0: 01020c63 beq x4,x16,80001108 + 800010f4: 0cc0a2ef jal x5,8000b1c0 + 800010f8: 800010e8 .word 0x800010e8 + 800010fc: 00000000 .word 0x00000000 + 80001100: 80014509 .word 0x80014509 + 80001104: 00000000 .word 0x00000000 + 80001108: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x7a02360c4678c4c8 + 8000110c: 000a3803 ld x16,0(x20) + 80001110: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x2) # load rs2: x2 = 0x85cdb34ecddaec5b + 80001114: 000a3103 ld x2,0(x20) + 80001118: 008a0a13 addi x20,x20,8 + +000000008000111c : +Zksed_sm4ed_cg_cp_rd_b17: + sm4ed x17, x16, x2, 3 # perform operation + 8000111c: f02808b3 sm4ed x17,x16,x2,0x3 + # Check if x17 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x17, Zksed_sm4ed_cg_cp_rd_b17, Zksed_sm4ed_cg_cp_rd_b17_str) + 80001120: 0007b203 ld x4,0(x15) + 80001124: 01120c63 beq x4,x17,8000113c + 80001128: 0980a2ef jal x5,8000b1c0 + 8000112c: 8000111c .word 0x8000111c + 80001130: 00000000 .word 0x00000000 + 80001134: 8001453d .word 0x8001453d + 80001138: 00000000 .word 0x00000000 + 8000113c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x00d79cdf54773fb0 + 80001140: 000a3603 ld x12,0(x20) + 80001144: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x6) # load rs2: x6 = 0x219e0ef1c20092f7 + 80001148: 000a3303 ld x6,0(x20) + 8000114c: 008a0a13 addi x20,x20,8 + +0000000080001150 : +Zksed_sm4ed_cg_cp_rd_b18: + sm4ed x18, x12, x6, 1 # perform operation + 80001150: 70660933 sm4ed x18,x12,x6,0x1 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cp_rd_b18, Zksed_sm4ed_cg_cp_rd_b18_str) + 80001154: 0007b203 ld x4,0(x15) + 80001158: 01220c63 beq x4,x18,80001170 + 8000115c: 0640a2ef jal x5,8000b1c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80014571 .word 0x80014571 + 8000116c: 00000000 .word 0x00000000 + 80001170: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x32cfba3068f0cc8b + 80001174: 000a3503 ld x10,0(x20) + 80001178: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x26) # load rs2: x26 = 0xd540ab64b7f43623 + 8000117c: 000a3d03 ld x26,0(x20) + 80001180: 008a0a13 addi x20,x20,8 + +0000000080001184 : +Zksed_sm4ed_cg_cp_rd_b19: + sm4ed x19, x10, x26, 1 # perform operation + 80001184: 71a509b3 sm4ed x19,x10,x26,0x1 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cp_rd_b19, Zksed_sm4ed_cg_cp_rd_b19_str) + 80001188: 0007b203 ld x4,0(x15) + 8000118c: 01320c63 beq x4,x19,800011a4 + 80001190: 0300a2ef jal x5,8000b1c0 + 80001194: 80001184 .word 0x80001184 + 80001198: 00000000 .word 0x00000000 + 8000119c: 800145a5 .word 0x800145a5 + 800011a0: 00000000 .word 0x00000000 + 800011a4: 00878793 addi x15,x15,8 + + mv x17, x20 # switch data pointer register to avoid conflict with test + 800011a8: 000a0893 addi x17,x20,0 +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x69d2797cc5ce3e4e + 800011ac: 0008bb03 ld x22,0(x17) + 800011b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x5ccf15154c867b6e + 800011b4: 0008be83 ld x29,0(x17) + 800011b8: 00888893 addi x17,x17,8 + +00000000800011bc : +Zksed_sm4ed_cg_cp_rd_b20: + sm4ed x20, x22, x29, 0 # perform operation + 800011bc: 31db0a33 sm4ed x20,x22,x29,0x0 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cp_rd_b20, Zksed_sm4ed_cg_cp_rd_b20_str) + 800011c0: 0007b203 ld x4,0(x15) + 800011c4: 01420c63 beq x4,x20,800011dc + 800011c8: 7f9092ef jal x5,8000b1c0 + 800011cc: 800011bc .word 0x800011bc + 800011d0: 00000000 .word 0x00000000 + 800011d4: 800145d9 .word 0x800145d9 + 800011d8: 00000000 .word 0x00000000 + 800011dc: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x57bf6286d90adc0c + 800011e0: 0008b303 ld x6,0(x17) + 800011e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xe1087f36092992b5 + 800011e8: 0008b083 ld x1,0(x17) + 800011ec: 00888893 addi x17,x17,8 + +00000000800011f0 : +Zksed_sm4ed_cg_cp_rd_b21: + sm4ed x21, x6, x1, 3 # perform operation + 800011f0: f0130ab3 sm4ed x21,x6,x1,0x3 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cp_rd_b21, Zksed_sm4ed_cg_cp_rd_b21_str) + 800011f4: 0007b203 ld x4,0(x15) + 800011f8: 01520c63 beq x4,x21,80001210 + 800011fc: 7c5092ef jal x5,8000b1c0 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8001460d .word 0x8001460d + 8000120c: 00000000 .word 0x00000000 + 80001210: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x569b94a5e33a71b7 + 80001214: 0008b983 ld x19,0(x17) + 80001218: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x1aa7159e2c2b3ef4 + 8000121c: 0008bc83 ld x25,0(x17) + 80001220: 00888893 addi x17,x17,8 + +0000000080001224 : +Zksed_sm4ed_cg_cp_rd_b22: + sm4ed x22, x19, x25, 1 # perform operation + 80001224: 71998b33 sm4ed x22,x19,x25,0x1 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cp_rd_b22, Zksed_sm4ed_cg_cp_rd_b22_str) + 80001228: 0007b203 ld x4,0(x15) + 8000122c: 01620c63 beq x4,x22,80001244 + 80001230: 791092ef jal x5,8000b1c0 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 80014641 .word 0x80014641 + 80001240: 00000000 .word 0x00000000 + 80001244: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x7c930e4fb4b0a4a8 + 80001248: 0008b703 ld x14,0(x17) + 8000124c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x79dbabc1c5d4dbb7 + 80001250: 0008b303 ld x6,0(x17) + 80001254: 00888893 addi x17,x17,8 + +0000000080001258 : +Zksed_sm4ed_cg_cp_rd_b23: + sm4ed x23, x14, x6, 3 # perform operation + 80001258: f0670bb3 sm4ed x23,x14,x6,0x3 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cp_rd_b23, Zksed_sm4ed_cg_cp_rd_b23_str) + 8000125c: 0007b203 ld x4,0(x15) + 80001260: 01720c63 beq x4,x23,80001278 + 80001264: 75d092ef jal x5,8000b1c0 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80014675 .word 0x80014675 + 80001274: 00000000 .word 0x00000000 + 80001278: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x5bdee464dd086624 + 8000127c: 0008bc83 ld x25,0(x17) + 80001280: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0xb7d66377b970c22a + 80001284: 0008be83 ld x29,0(x17) + 80001288: 00888893 addi x17,x17,8 + +000000008000128c : +Zksed_sm4ed_cg_cp_rd_b24: + sm4ed x24, x25, x29, 1 # perform operation + 8000128c: 71dc8c33 sm4ed x24,x25,x29,0x1 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cp_rd_b24, Zksed_sm4ed_cg_cp_rd_b24_str) + 80001290: 0007b203 ld x4,0(x15) + 80001294: 01820c63 beq x4,x24,800012ac + 80001298: 729092ef jal x5,8000b1c0 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 800146a9 .word 0x800146a9 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xfad8502f90e3810a + 800012b0: 0008b803 ld x16,0(x17) + 800012b4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x23f23931effe5b61 + 800012b8: 0008bd03 ld x26,0(x17) + 800012bc: 00888893 addi x17,x17,8 + +00000000800012c0 : +Zksed_sm4ed_cg_cp_rd_b25: + sm4ed x25, x16, x26, 2 # perform operation + 800012c0: b1a80cb3 sm4ed x25,x16,x26,0x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cp_rd_b25, Zksed_sm4ed_cg_cp_rd_b25_str) + 800012c4: 0007b203 ld x4,0(x15) + 800012c8: 01920c63 beq x4,x25,800012e0 + 800012cc: 6f5092ef jal x5,8000b1c0 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 800146dd .word 0x800146dd + 800012dc: 00000000 .word 0x00000000 + 800012e0: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x5e8a63b8bdbe8772 + 800012e4: 0008be03 ld x28,0(x17) + 800012e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x50018b8d6bf52c3e + 800012ec: 0008ba03 ld x20,0(x17) + 800012f0: 00888893 addi x17,x17,8 + +00000000800012f4 : +Zksed_sm4ed_cg_cp_rd_b26: + sm4ed x26, x28, x20, 1 # perform operation + 800012f4: 714e0d33 sm4ed x26,x28,x20,0x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cp_rd_b26, Zksed_sm4ed_cg_cp_rd_b26_str) + 800012f8: 0007b203 ld x4,0(x15) + 800012fc: 01a20c63 beq x4,x26,80001314 + 80001300: 6c1092ef jal x5,8000b1c0 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 80014711 .word 0x80014711 + 80001310: 00000000 .word 0x00000000 + 80001314: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x13f4360fb24ba6b6 + 80001318: 0008bc03 ld x24,0(x17) + 8000131c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x67dbd3f20a8690e5 + 80001320: 0008b403 ld x8,0(x17) + 80001324: 00888893 addi x17,x17,8 + +0000000080001328 : +Zksed_sm4ed_cg_cp_rd_b27: + sm4ed x27, x24, x8, 3 # perform operation + 80001328: f08c0db3 sm4ed x27,x24,x8,0x3 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cp_rd_b27, Zksed_sm4ed_cg_cp_rd_b27_str) + 8000132c: 0007b203 ld x4,0(x15) + 80001330: 01b20c63 beq x4,x27,80001348 + 80001334: 68d092ef jal x5,8000b1c0 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 80014745 .word 0x80014745 + 80001344: 00000000 .word 0x00000000 + 80001348: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x8b68c6d49521c978 + 8000134c: 0008b103 ld x2,0(x17) + 80001350: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x10ca9fb4399c36a0 + 80001354: 0008b083 ld x1,0(x17) + 80001358: 00888893 addi x17,x17,8 + +000000008000135c : +Zksed_sm4ed_cg_cp_rd_b28: + sm4ed x28, x2, x1, 1 # perform operation + 8000135c: 70110e33 sm4ed x28,x2,x1,0x1 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cp_rd_b28, Zksed_sm4ed_cg_cp_rd_b28_str) + 80001360: 0007b203 ld x4,0(x15) + 80001364: 01c20c63 beq x4,x28,8000137c + 80001368: 659092ef jal x5,8000b1c0 + 8000136c: 8000135c .word 0x8000135c + 80001370: 00000000 .word 0x00000000 + 80001374: 80014779 .word 0x80014779 + 80001378: 00000000 .word 0x00000000 + 8000137c: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xaf09c4f8f8ed7aa1 + 80001380: 0008b803 ld x16,0(x17) + 80001384: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xab950297f44ecf22 + 80001388: 0008b703 ld x14,0(x17) + 8000138c: 00888893 addi x17,x17,8 + +0000000080001390 : +Zksed_sm4ed_cg_cp_rd_b29: + sm4ed x29, x16, x14, 1 # perform operation + 80001390: 70e80eb3 sm4ed x29,x16,x14,0x1 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cp_rd_b29, Zksed_sm4ed_cg_cp_rd_b29_str) + 80001394: 0007b203 ld x4,0(x15) + 80001398: 01d20c63 beq x4,x29,800013b0 + 8000139c: 625092ef jal x5,8000b1c0 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 800147ad .word 0x800147ad + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x06bfed8a23df81ee + 800013b4: 0008b403 ld x8,0(x17) + 800013b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xeeeb5bcbd40d9320 + 800013bc: 0008bc03 ld x24,0(x17) + 800013c0: 00888893 addi x17,x17,8 + +00000000800013c4 : +Zksed_sm4ed_cg_cp_rd_b30: + sm4ed x30, x8, x24, 1 # perform operation + 800013c4: 71840f33 sm4ed x30,x8,x24,0x1 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cp_rd_b30, Zksed_sm4ed_cg_cp_rd_b30_str) + 800013c8: 0007b203 ld x4,0(x15) + 800013cc: 01e20c63 beq x4,x30,800013e4 + 800013d0: 5f1092ef jal x5,8000b1c0 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 800147e1 .word 0x800147e1 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00878793 addi x15,x15,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x43c83234f017d9d3 + 800013e8: 0008b983 ld x19,0(x17) + 800013ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xa6a7d3a384cd9267 + 800013f0: 0008b183 ld x3,0(x17) + 800013f4: 00888893 addi x17,x17,8 + +00000000800013f8 : +Zksed_sm4ed_cg_cp_rd_b31: + sm4ed x31, x19, x3, 0 # perform operation + 800013f8: 30398fb3 sm4ed x31,x19,x3,0x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cp_rd_b31, Zksed_sm4ed_cg_cp_rd_b31_str) + 800013fc: 0007b203 ld x4,0(x15) + 80001400: 01f20c63 beq x4,x31,80001418 + 80001404: 5bd092ef jal x5,8000b1c0 + 80001408: 800013f8 .word 0x800013f8 + 8000140c: 00000000 .word 0x00000000 + 80001410: 80014815 .word 0x80014815 + 80001414: 00000000 .word 0x00000000 + 80001418: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000000 + 8000141c: 0008b503 ld x10,0(x17) + 80001420: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x1259d59cfb20e609 + 80001424: 0008bc03 ld x24,0(x17) + 80001428: 00888893 addi x17,x17,8 + +000000008000142c : +Zksed_sm4ed_cg_cp_rs1_edges_0x0: + sm4ed x18, x10, x24, 0 # perform operation + 8000142c: 31850933 sm4ed x18,x10,x24,0x0 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cp_rs1_edges_0x0, Zksed_sm4ed_cg_cp_rs1_edges_0x0_str) + 80001430: 0007b203 ld x4,0(x15) + 80001434: 01220c63 beq x4,x18,8000144c + 80001438: 589092ef jal x5,8000b1c0 + 8000143c: 8000142c .word 0x8000142c + 80001440: 00000000 .word 0x00000000 + 80001444: 80014849 .word 0x80014849 + 80001448: 00000000 .word 0x00000000 + 8000144c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0000000000000001 + 80001450: 0008bb83 ld x23,0(x17) + 80001454: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xc8fc27ce0784d8ec + 80001458: 0008bc83 ld x25,0(x17) + 8000145c: 00888893 addi x17,x17,8 + +0000000080001460 : +Zksed_sm4ed_cg_cp_rs1_edges_0x1: + sm4ed x6, x23, x25, 3 # perform operation + 80001460: f19b8333 sm4ed x6,x23,x25,0x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cp_rs1_edges_0x1, Zksed_sm4ed_cg_cp_rs1_edges_0x1_str) + 80001464: 0007b203 ld x4,0(x15) + 80001468: 00620c63 beq x4,x6,80001480 + 8000146c: 555092ef jal x5,8000b1c0 + 80001470: 80001460 .word 0x80001460 + 80001474: 00000000 .word 0x00000000 + 80001478: 80014884 .word 0x80014884 + 8000147c: 00000000 .word 0x00000000 + 80001480: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000002 + 80001484: 0008b603 ld x12,0(x17) + 80001488: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x9721b2e85e9bd851 + 8000148c: 0008bd83 ld x27,0(x17) + 80001490: 00888893 addi x17,x17,8 + +0000000080001494 : +Zksed_sm4ed_cg_cp_rs1_edges_0x2: + sm4ed x26, x12, x27, 2 # perform operation + 80001494: b1b60d33 sm4ed x26,x12,x27,0x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cp_rs1_edges_0x2, Zksed_sm4ed_cg_cp_rs1_edges_0x2_str) + 80001498: 0007b203 ld x4,0(x15) + 8000149c: 01a20c63 beq x4,x26,800014b4 + 800014a0: 521092ef jal x5,8000b1c0 + 800014a4: 80001494 .word 0x80001494 + 800014a8: 00000000 .word 0x00000000 + 800014ac: 800148bf .word 0x800148bf + 800014b0: 00000000 .word 0x00000000 + 800014b4: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x8000000000000000 + 800014b8: 0008b083 ld x1,0(x17) + 800014bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x8d39b49452f1ada0 + 800014c0: 0008bd83 ld x27,0(x17) + 800014c4: 00888893 addi x17,x17,8 + +00000000800014c8 : +Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000000: + sm4ed x8, x1, x27, 2 # perform operation + 800014c8: b1b08433 sm4ed x8,x1,x27,0x2 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000000, Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000000_str) + 800014cc: 0007b203 ld x4,0(x15) + 800014d0: 00820c63 beq x4,x8,800014e8 + 800014d4: 4ed092ef jal x5,8000b1c0 + 800014d8: 800014c8 .word 0x800014c8 + 800014dc: 00000000 .word 0x00000000 + 800014e0: 800148fa .word 0x800148fa + 800014e4: 00000000 .word 0x00000000 + 800014e8: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x8000000000000001 + 800014ec: 0008bc03 ld x24,0(x17) + 800014f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x71d85f5a20b1a4eb + 800014f4: 0008bf83 ld x31,0(x17) + 800014f8: 00888893 addi x17,x17,8 + +00000000800014fc : +Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000001: + sm4ed x25, x24, x31, 2 # perform operation + 800014fc: b1fc0cb3 sm4ed x25,x24,x31,0x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000001, Zksed_sm4ed_cg_cp_rs1_edges_0x8000000000000001_str) + 80001500: 0007b203 ld x4,0(x15) + 80001504: 01920c63 beq x4,x25,8000151c + 80001508: 4b9092ef jal x5,8000b1c0 + 8000150c: 800014fc .word 0x800014fc + 80001510: 00000000 .word 0x00000000 + 80001514: 80014945 .word 0x80014945 + 80001518: 00000000 .word 0x00000000 + 8000151c: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7fffffffffffffff + 80001520: 0008b983 ld x19,0(x17) + 80001524: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x46dfc119bb1e5deb + 80001528: 0008b183 ld x3,0(x17) + 8000152c: 00888893 addi x17,x17,8 + +0000000080001530 : +Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffffffffffff: + sm4ed x1, x19, x3, 1 # perform operation + 80001530: 703980b3 sm4ed x1,x19,x3,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffffffffffff, Zksed_sm4ed_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001534: 0007b203 ld x4,0(x15) + 80001538: 00120c63 beq x4,x1,80001550 + 8000153c: 485092ef jal x5,8000b1c0 + 80001540: 80001530 .word 0x80001530 + 80001544: 00000000 .word 0x00000000 + 80001548: 80014990 .word 0x80014990 + 8000154c: 00000000 .word 0x00000000 + 80001550: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80001554: 0008b683 ld x13,0(x17) + 80001558: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xddc0ca9b496feece + 8000155c: 0008bc83 ld x25,0(x17) + 80001560: 00888893 addi x17,x17,8 + +0000000080001564 : +Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffffffffffe: + sm4ed x24, x13, x25, 0 # perform operation + 80001564: 31968c33 sm4ed x24,x13,x25,0x0 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffffffffffe, Zksed_sm4ed_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001568: 0007b203 ld x4,0(x15) + 8000156c: 01820c63 beq x4,x24,80001584 + 80001570: 451092ef jal x5,8000b1c0 + 80001574: 80001564 .word 0x80001564 + 80001578: 00000000 .word 0x00000000 + 8000157c: 800149db .word 0x800149db + 80001580: 00000000 .word 0x00000000 + 80001584: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xffffffffffffffff + 80001588: 0008bd83 ld x27,0(x17) + 8000158c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x03b11483d50e3f4c + 80001590: 0008bf83 ld x31,0(x17) + 80001594: 00888893 addi x17,x17,8 + +0000000080001598 : +Zksed_sm4ed_cg_cp_rs1_edges_0xffffffffffffffff: + sm4ed x18, x27, x31, 2 # perform operation + 80001598: b1fd8933 sm4ed x18,x27,x31,0x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffffffffffff, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffffffffffff_str) + 8000159c: 0007b203 ld x4,0(x15) + 800015a0: 01220c63 beq x4,x18,800015b8 + 800015a4: 41d092ef jal x5,8000b1c0 + 800015a8: 80001598 .word 0x80001598 + 800015ac: 00000000 .word 0x00000000 + 800015b0: 80014a26 .word 0x80014a26 + 800015b4: 00000000 .word 0x00000000 + 800015b8: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0xfffffffffffffffe + 800015bc: 0008b183 ld x3,0(x17) + 800015c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xf23dcd861148a9c3 + 800015c4: 0008b803 ld x16,0(x17) + 800015c8: 00888893 addi x17,x17,8 + +00000000800015cc : +Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffffffffffe: + sm4ed x29, x3, x16, 3 # perform operation + 800015cc: f1018eb3 sm4ed x29,x3,x16,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffffffffffe, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d0: 0007b203 ld x4,0(x15) + 800015d4: 01d20c63 beq x4,x29,800015ec + 800015d8: 3e9092ef jal x5,8000b1c0 + 800015dc: 800015cc .word 0x800015cc + 800015e0: 00000000 .word 0x00000000 + 800015e4: 80014a71 .word 0x80014a71 + 800015e8: 00000000 .word 0x00000000 + 800015ec: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 800015f0: 0008b803 ld x16,0(x17) + 800015f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xe0eea7516787b2ae + 800015f8: 0008bd83 ld x27,0(x17) + 800015fc: 00888893 addi x17,x17,8 + +0000000080001600 : +Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sm4ed x30, x16, x27, 0 # perform operation + 80001600: 31b80f33 sm4ed x30,x16,x27,0x0 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001604: 0007b203 ld x4,0(x15) + 80001608: 01e20c63 beq x4,x30,80001620 + 8000160c: 3b5092ef jal x5,8000b1c0 + 80001610: 80001600 .word 0x80001600 + 80001614: 00000000 .word 0x00000000 + 80001618: 80014abc .word 0x80014abc + 8000161c: 00000000 .word 0x00000000 + 80001620: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xaaaaaaaaaaaaaaaa + 80001624: 0008b483 ld x9,0(x17) + 80001628: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x752f31a08168bc80 + 8000162c: 0008bd03 ld x26,0(x17) + 80001630: 00888893 addi x17,x17,8 + +0000000080001634 : +Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sm4ed x10, x9, x26, 1 # perform operation + 80001634: 71a48533 sm4ed x10,x9,x26,0x1 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001638: 0007b203 ld x4,0(x15) + 8000163c: 00a20c63 beq x4,x10,80001654 + 80001640: 381092ef jal x5,8000b1c0 + 80001644: 80001634 .word 0x80001634 + 80001648: 00000000 .word 0x00000000 + 8000164c: 80014b07 .word 0x80014b07 + 80001650: 00000000 .word 0x00000000 + 80001654: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x5555555555555555 + 80001658: 0008bb03 ld x22,0(x17) + 8000165c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x8b0a03dcf58a4fd6 + 80001660: 0008b703 ld x14,0(x17) + 80001664: 00888893 addi x17,x17,8 + +0000000080001668 : +Zksed_sm4ed_cg_cp_rs1_edges_0x5555555555555555: + sm4ed x21, x22, x14, 3 # perform operation + 80001668: f0eb0ab3 sm4ed x21,x22,x14,0x3 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cp_rs1_edges_0x5555555555555555, Zksed_sm4ed_cg_cp_rs1_edges_0x5555555555555555_str) + 8000166c: 0007b203 ld x4,0(x15) + 80001670: 01520c63 beq x4,x21,80001688 + 80001674: 34d092ef jal x5,8000b1c0 + 80001678: 80001668 .word 0x80001668 + 8000167c: 00000000 .word 0x00000000 + 80001680: 80014b52 .word 0x80014b52 + 80001684: 00000000 .word 0x00000000 + 80001688: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x00000000ffffffff + 8000168c: 0008b583 ld x11,0(x17) + 80001690: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x002e7487ac6bff86 + 80001694: 0008bc83 ld x25,0(x17) + 80001698: 00888893 addi x17,x17,8 + +000000008000169c : +Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff: + sm4ed x8, x11, x25, 0 # perform operation + 8000169c: 31958433 sm4ed x8,x11,x25,0x0 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff, Zksed_sm4ed_cg_cp_rs1_edges_0xffffffff_str) + 800016a0: 0007b203 ld x4,0(x15) + 800016a4: 00820c63 beq x4,x8,800016bc + 800016a8: 319092ef jal x5,8000b1c0 + 800016ac: 8000169c .word 0x8000169c + 800016b0: 00000000 .word 0x00000000 + 800016b4: 80014b9d .word 0x80014b9d + 800016b8: 00000000 .word 0x00000000 + 800016bc: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x00000000fffffffe + 800016c0: 0008bb03 ld x22,0(x17) + 800016c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xc4d564c5d0f3559b + 800016c8: 0008bd83 ld x27,0(x17) + 800016cc: 00888893 addi x17,x17,8 + +00000000800016d0 : +Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe: + sm4ed x19, x22, x27, 2 # perform operation + 800016d0: b1bb09b3 sm4ed x19,x22,x27,0x2 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe, Zksed_sm4ed_cg_cp_rs1_edges_0xfffffffe_str) + 800016d4: 0007b203 ld x4,0(x15) + 800016d8: 01320c63 beq x4,x19,800016f0 + 800016dc: 2e5092ef jal x5,8000b1c0 + 800016e0: 800016d0 .word 0x800016d0 + 800016e4: 00000000 .word 0x00000000 + 800016e8: 80014be0 .word 0x80014be0 + 800016ec: 00000000 .word 0x00000000 + 800016f0: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000100000000 + 800016f4: 0008ba83 ld x21,0(x17) + 800016f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x5b3df541c144a164 + 800016fc: 0008b303 ld x6,0(x17) + 80001700: 00888893 addi x17,x17,8 + +0000000080001704 : +Zksed_sm4ed_cg_cp_rs1_edges_0x100000000: + sm4ed x11, x21, x6, 3 # perform operation + 80001704: f06a85b3 sm4ed x11,x21,x6,0x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cp_rs1_edges_0x100000000, Zksed_sm4ed_cg_cp_rs1_edges_0x100000000_str) + 80001708: 0007b203 ld x4,0(x15) + 8000170c: 00b20c63 beq x4,x11,80001724 + 80001710: 2b1092ef jal x5,8000b1c0 + 80001714: 80001704 .word 0x80001704 + 80001718: 00000000 .word 0x00000000 + 8000171c: 80014c23 .word 0x80014c23 + 80001720: 00000000 .word 0x00000000 + 80001724: 00878793 addi x15,x15,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000100000001 + 80001728: 0008b183 ld x3,0(x17) + 8000172c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xd01c68c674e1ff70 + 80001730: 0008b683 ld x13,0(x17) + 80001734: 00888893 addi x17,x17,8 + +0000000080001738 : +Zksed_sm4ed_cg_cp_rs1_edges_0x100000001: + sm4ed x20, x3, x13, 0 # perform operation + 80001738: 30d18a33 sm4ed x20,x3,x13,0x0 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cp_rs1_edges_0x100000001, Zksed_sm4ed_cg_cp_rs1_edges_0x100000001_str) + 8000173c: 0007b203 ld x4,0(x15) + 80001740: 01420c63 beq x4,x20,80001758 + 80001744: 27d092ef jal x5,8000b1c0 + 80001748: 80001738 .word 0x80001738 + 8000174c: 00000000 .word 0x00000000 + 80001750: 80014c67 .word 0x80014c67 + 80001754: 00000000 .word 0x00000000 + 80001758: 00878793 addi x15,x15,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0xe76f489f5e12ba57 + 8000175c: 0008bc03 ld x24,0(x17) + 80001760: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000000000000 + 80001764: 0008bf83 ld x31,0(x17) + 80001768: 00888893 addi x17,x17,8 + +000000008000176c : +Zksed_sm4ed_cg_cp_rs2_edges_0x0: + sm4ed x20, x24, x31, 3 # perform operation + 8000176c: f1fc0a33 sm4ed x20,x24,x31,0x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cp_rs2_edges_0x0, Zksed_sm4ed_cg_cp_rs2_edges_0x0_str) + 80001770: 0007b203 ld x4,0(x15) + 80001774: 01420c63 beq x4,x20,8000178c + 80001778: 249092ef jal x5,8000b1c0 + 8000177c: 8000176c .word 0x8000176c + 80001780: 00000000 .word 0x00000000 + 80001784: 80014cab .word 0x80014cab + 80001788: 00000000 .word 0x00000000 + 8000178c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x652b4680517d16c8 + 80001790: 0008b503 ld x10,0(x17) + 80001794: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000000000001 + 80001798: 0008bd03 ld x26,0(x17) + 8000179c: 00888893 addi x17,x17,8 + +00000000800017a0 : +Zksed_sm4ed_cg_cp_rs2_edges_0x1: + sm4ed x3, x10, x26, 3 # perform operation + 800017a0: f1a501b3 sm4ed x3,x10,x26,0x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cp_rs2_edges_0x1, Zksed_sm4ed_cg_cp_rs2_edges_0x1_str) + 800017a4: 0007b203 ld x4,0(x15) + 800017a8: 00320c63 beq x4,x3,800017c0 + 800017ac: 215092ef jal x5,8000b1c0 + 800017b0: 800017a0 .word 0x800017a0 + 800017b4: 00000000 .word 0x00000000 + 800017b8: 80014ce7 .word 0x80014ce7 + 800017bc: 00000000 .word 0x00000000 + 800017c0: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xc313be76a52e9dd8 + 800017c4: 0008be03 ld x28,0(x17) + 800017c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000000000002 + 800017cc: 0008b903 ld x18,0(x17) + 800017d0: 00888893 addi x17,x17,8 + +00000000800017d4 : +Zksed_sm4ed_cg_cp_rs2_edges_0x2: + sm4ed x27, x28, x18, 3 # perform operation + 800017d4: f12e0db3 sm4ed x27,x28,x18,0x3 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cp_rs2_edges_0x2, Zksed_sm4ed_cg_cp_rs2_edges_0x2_str) + 800017d8: 0007b203 ld x4,0(x15) + 800017dc: 01b20c63 beq x4,x27,800017f4 + 800017e0: 1e1092ef jal x5,8000b1c0 + 800017e4: 800017d4 .word 0x800017d4 + 800017e8: 00000000 .word 0x00000000 + 800017ec: 80014d23 .word 0x80014d23 + 800017f0: 00000000 .word 0x00000000 + 800017f4: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x5cced86b6aa0a14d + 800017f8: 0008ba83 ld x21,0(x17) + 800017fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x8000000000000000 + 80001800: 0008b583 ld x11,0(x17) + 80001804: 00888893 addi x17,x17,8 + +0000000080001808 : +Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000000: + sm4ed x19, x21, x11, 0 # perform operation + 80001808: 30ba89b3 sm4ed x19,x21,x11,0x0 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000000, Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000000_str) + 8000180c: 0007b203 ld x4,0(x15) + 80001810: 01320c63 beq x4,x19,80001828 + 80001814: 1ad092ef jal x5,8000b1c0 + 80001818: 80001808 .word 0x80001808 + 8000181c: 00000000 .word 0x00000000 + 80001820: 80014d5f .word 0x80014d5f + 80001824: 00000000 .word 0x00000000 + 80001828: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x07929c749832775b + 8000182c: 0008b483 ld x9,0(x17) + 80001830: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x8000000000000001 + 80001834: 0008bf83 ld x31,0(x17) + 80001838: 00888893 addi x17,x17,8 + +000000008000183c : +Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000001: + sm4ed x28, x9, x31, 1 # perform operation + 8000183c: 71f48e33 sm4ed x28,x9,x31,0x1 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000001, Zksed_sm4ed_cg_cp_rs2_edges_0x8000000000000001_str) + 80001840: 0007b203 ld x4,0(x15) + 80001844: 01c20c63 beq x4,x28,8000185c + 80001848: 179092ef jal x5,8000b1c0 + 8000184c: 8000183c .word 0x8000183c + 80001850: 00000000 .word 0x00000000 + 80001854: 80014daa .word 0x80014daa + 80001858: 00000000 .word 0x00000000 + 8000185c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x62a140f142e171d4 + 80001860: 0008bf03 ld x30,0(x17) + 80001864: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x7fffffffffffffff + 80001868: 0008b183 ld x3,0(x17) + 8000186c: 00888893 addi x17,x17,8 + +0000000080001870 : +Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffffffffffff: + sm4ed x6, x30, x3, 0 # perform operation + 80001870: 303f0333 sm4ed x6,x30,x3,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffffffffffff, Zksed_sm4ed_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001874: 0007b203 ld x4,0(x15) + 80001878: 00620c63 beq x4,x6,80001890 + 8000187c: 145092ef jal x5,8000b1c0 + 80001880: 80001870 .word 0x80001870 + 80001884: 00000000 .word 0x00000000 + 80001888: 80014df5 .word 0x80014df5 + 8000188c: 00000000 .word 0x00000000 + 80001890: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xa603bfd255dc0d01 + 80001894: 0008b583 ld x11,0(x17) + 80001898: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x7ffffffffffffffe + 8000189c: 0008ba03 ld x20,0(x17) + 800018a0: 00888893 addi x17,x17,8 + +00000000800018a4 : +Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffffffffffe: + sm4ed x1, x11, x20, 2 # perform operation + 800018a4: b14580b3 sm4ed x1,x11,x20,0x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffffffffffe, Zksed_sm4ed_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018a8: 0007b203 ld x4,0(x15) + 800018ac: 00120c63 beq x4,x1,800018c4 + 800018b0: 111092ef jal x5,8000b1c0 + 800018b4: 800018a4 .word 0x800018a4 + 800018b8: 00000000 .word 0x00000000 + 800018bc: 80014e40 .word 0x80014e40 + 800018c0: 00000000 .word 0x00000000 + 800018c4: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x1e5e2ae104e43d95 + 800018c8: 0008b483 ld x9,0(x17) + 800018cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xffffffffffffffff + 800018d0: 0008b683 ld x13,0(x17) + 800018d4: 00888893 addi x17,x17,8 + +00000000800018d8 : +Zksed_sm4ed_cg_cp_rs2_edges_0xffffffffffffffff: + sm4ed x27, x9, x13, 3 # perform operation + 800018d8: f0d48db3 sm4ed x27,x9,x13,0x3 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffffffffffff, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018dc: 0007b203 ld x4,0(x15) + 800018e0: 01b20c63 beq x4,x27,800018f8 + 800018e4: 0dd092ef jal x5,8000b1c0 + 800018e8: 800018d8 .word 0x800018d8 + 800018ec: 00000000 .word 0x00000000 + 800018f0: 80014e8b .word 0x80014e8b + 800018f4: 00000000 .word 0x00000000 + 800018f8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x9b69c10591b18ed6 + 800018fc: 0008bd83 ld x27,0(x17) + 80001900: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xfffffffffffffffe + 80001904: 0008b803 ld x16,0(x17) + 80001908: 00888893 addi x17,x17,8 + +000000008000190c : +Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffffffffffe: + sm4ed x31, x27, x16, 0 # perform operation + 8000190c: 310d8fb3 sm4ed x31,x27,x16,0x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffffffffffe, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001910: 0007b203 ld x4,0(x15) + 80001914: 01f20c63 beq x4,x31,8000192c + 80001918: 0a9092ef jal x5,8000b1c0 + 8000191c: 8000190c .word 0x8000190c + 80001920: 00000000 .word 0x00000000 + 80001924: 80014ed6 .word 0x80014ed6 + 80001928: 00000000 .word 0x00000000 + 8000192c: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x954f06e8b594d2c3 + 80001930: 0008b503 ld x10,0(x17) + 80001934: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80001938: 0008ba83 ld x21,0(x17) + 8000193c: 00888893 addi x17,x17,8 + +0000000080001940 : +Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc887763ae86f2: + sm4ed x12, x10, x21, 3 # perform operation + 80001940: f1550633 sm4ed x12,x10,x21,0x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001944: 0007b203 ld x4,0(x15) + 80001948: 00c20c63 beq x4,x12,80001960 + 8000194c: 075092ef jal x5,8000b1c0 + 80001950: 80001940 .word 0x80001940 + 80001954: 00000000 .word 0x00000000 + 80001958: 80014f21 .word 0x80014f21 + 8000195c: 00000000 .word 0x00000000 + 80001960: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x852c5de9ceca80a4 + 80001964: 0008b603 ld x12,0(x17) + 80001968: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xaaaaaaaaaaaaaaaa + 8000196c: 0008b403 ld x8,0(x17) + 80001970: 00888893 addi x17,x17,8 + +0000000080001974 : +Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + sm4ed x28, x12, x8, 1 # perform operation + 80001974: 70860e33 sm4ed x28,x12,x8,0x1 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001978: 0007b203 ld x4,0(x15) + 8000197c: 01c20c63 beq x4,x28,80001994 + 80001980: 041092ef jal x5,8000b1c0 + 80001984: 80001974 .word 0x80001974 + 80001988: 00000000 .word 0x00000000 + 8000198c: 80014f6c .word 0x80014f6c + 80001990: 00000000 .word 0x00000000 + 80001994: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xd024f6986a3c84bf + 80001998: 0008bb03 ld x22,0(x17) + 8000199c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5555555555555555 + 800019a0: 0008ba83 ld x21,0(x17) + 800019a4: 00888893 addi x17,x17,8 + +00000000800019a8 : +Zksed_sm4ed_cg_cp_rs2_edges_0x5555555555555555: + sm4ed x29, x22, x21, 3 # perform operation + 800019a8: f15b0eb3 sm4ed x29,x22,x21,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cp_rs2_edges_0x5555555555555555, Zksed_sm4ed_cg_cp_rs2_edges_0x5555555555555555_str) + 800019ac: 0007b203 ld x4,0(x15) + 800019b0: 01d20c63 beq x4,x29,800019c8 + 800019b4: 00d092ef jal x5,8000b1c0 + 800019b8: 800019a8 .word 0x800019a8 + 800019bc: 00000000 .word 0x00000000 + 800019c0: 80014fb7 .word 0x80014fb7 + 800019c4: 00000000 .word 0x00000000 + 800019c8: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0xfe48bc42eb60299b + 800019cc: 0008be03 ld x28,0(x17) + 800019d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x00000000ffffffff + 800019d4: 0008b803 ld x16,0(x17) + 800019d8: 00888893 addi x17,x17,8 + +00000000800019dc : +Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff: + sm4ed x10, x28, x16, 0 # perform operation + 800019dc: 310e0533 sm4ed x10,x28,x16,0x0 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff, Zksed_sm4ed_cg_cp_rs2_edges_0xffffffff_str) + 800019e0: 0007b203 ld x4,0(x15) + 800019e4: 00a20c63 beq x4,x10,800019fc + 800019e8: 7d8092ef jal x5,8000b1c0 + 800019ec: 800019dc .word 0x800019dc + 800019f0: 00000000 .word 0x00000000 + 800019f4: 80015002 .word 0x80015002 + 800019f8: 00000000 .word 0x00000000 + 800019fc: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x5d05fc55775ecb1b + 80001a00: 0008be83 ld x29,0(x17) + 80001a04: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x00000000fffffffe + 80001a08: 0008b683 ld x13,0(x17) + 80001a0c: 00888893 addi x17,x17,8 + +0000000080001a10 : +Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe: + sm4ed x20, x29, x13, 1 # perform operation + 80001a10: 70de8a33 sm4ed x20,x29,x13,0x1 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe, Zksed_sm4ed_cg_cp_rs2_edges_0xfffffffe_str) + 80001a14: 0007b203 ld x4,0(x15) + 80001a18: 01420c63 beq x4,x20,80001a30 + 80001a1c: 7a4092ef jal x5,8000b1c0 + 80001a20: 80001a10 .word 0x80001a10 + 80001a24: 00000000 .word 0x00000000 + 80001a28: 80015045 .word 0x80015045 + 80001a2c: 00000000 .word 0x00000000 + 80001a30: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x0a7712e811ab4037 + 80001a34: 0008ba03 ld x20,0(x17) + 80001a38: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000100000000 + 80001a3c: 0008bd83 ld x27,0(x17) + 80001a40: 00888893 addi x17,x17,8 + +0000000080001a44 : +Zksed_sm4ed_cg_cp_rs2_edges_0x100000000: + sm4ed x24, x20, x27, 0 # perform operation + 80001a44: 31ba0c33 sm4ed x24,x20,x27,0x0 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cp_rs2_edges_0x100000000, Zksed_sm4ed_cg_cp_rs2_edges_0x100000000_str) + 80001a48: 0007b203 ld x4,0(x15) + 80001a4c: 01820c63 beq x4,x24,80001a64 + 80001a50: 770092ef jal x5,8000b1c0 + 80001a54: 80001a44 .word 0x80001a44 + 80001a58: 00000000 .word 0x00000000 + 80001a5c: 80015088 .word 0x80015088 + 80001a60: 00000000 .word 0x00000000 + 80001a64: 00878793 addi x15,x15,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x0f169c559243e4fa + 80001a68: 0008b683 ld x13,0(x17) + 80001a6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x0000000100000001 + 80001a70: 0008b103 ld x2,0(x17) + 80001a74: 00888893 addi x17,x17,8 + +0000000080001a78 : +Zksed_sm4ed_cg_cp_rs2_edges_0x100000001: + sm4ed x11, x13, x2, 2 # perform operation + 80001a78: b02685b3 sm4ed x11,x13,x2,0x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cp_rs2_edges_0x100000001, Zksed_sm4ed_cg_cp_rs2_edges_0x100000001_str) + 80001a7c: 0007b203 ld x4,0(x15) + 80001a80: 00b20c63 beq x4,x11,80001a98 + 80001a84: 73c092ef jal x5,8000b1c0 + 80001a88: 80001a78 .word 0x80001a78 + 80001a8c: 00000000 .word 0x00000000 + 80001a90: 800150cc .word 0x800150cc + 80001a94: 00000000 .word 0x00000000 + 80001a98: 00878793 addi x15,x15,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x0000000000000000 + 80001a9c: 0008bd03 ld x26,0(x17) + 80001aa0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000000000000 + 80001aa4: 0008b083 ld x1,0(x17) + 80001aa8: 00888893 addi x17,x17,8 + +0000000080001aac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sm4ed x10, x26, x1, 3 # perform operation + 80001aac: f01d0533 sm4ed x10,x26,x1,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab0: 0007b203 ld x4,0(x15) + 80001ab4: 00a20c63 beq x4,x10,80001acc + 80001ab8: 708092ef jal x5,8000b1c0 + 80001abc: 80001aac .word 0x80001aac + 80001ac0: 00000000 .word 0x00000000 + 80001ac4: 80015110 .word 0x80015110 + 80001ac8: 00000000 .word 0x00000000 + 80001acc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001ad0: 0008be03 ld x28,0(x17) + 80001ad4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000000000001 + 80001ad8: 0008b983 ld x19,0(x17) + 80001adc: 00888893 addi x17,x17,8 + +0000000080001ae0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sm4ed x16, x28, x19, 1 # perform operation + 80001ae0: 713e0833 sm4ed x16,x28,x19,0x1 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae4: 0007b203 ld x4,0(x15) + 80001ae8: 01020c63 beq x4,x16,80001b00 + 80001aec: 6d4092ef jal x5,8000b1c0 + 80001af0: 80001ae0 .word 0x80001ae0 + 80001af4: 00000000 .word 0x00000000 + 80001af8: 80015163 .word 0x80015163 + 80001afc: 00000000 .word 0x00000000 + 80001b00: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x0000000000000000 + 80001b04: 0008b303 ld x6,0(x17) + 80001b08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x0000000000000002 + 80001b0c: 0008b383 ld x7,0(x17) + 80001b10: 00888893 addi x17,x17,8 + +0000000080001b14 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sm4ed x18, x6, x7, 2 # perform operation + 80001b14: b0730933 sm4ed x18,x6,x7,0x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b18: 0007b203 ld x4,0(x15) + 80001b1c: 01220c63 beq x4,x18,80001b34 + 80001b20: 6a0092ef jal x5,8000b1c0 + 80001b24: 80001b14 .word 0x80001b14 + 80001b28: 00000000 .word 0x00000000 + 80001b2c: 800151b6 .word 0x800151b6 + 80001b30: 00000000 .word 0x00000000 + 80001b34: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000000000000 + 80001b38: 0008b183 ld x3,0(x17) + 80001b3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000000 + 80001b40: 0008b483 ld x9,0(x17) + 80001b44: 00888893 addi x17,x17,8 + +0000000080001b48 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + sm4ed x31, x3, x9, 0 # perform operation + 80001b48: 30918fb3 sm4ed x31,x3,x9,0x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b4c: 0007b203 ld x4,0(x15) + 80001b50: 01f20c63 beq x4,x31,80001b68 + 80001b54: 66c092ef jal x5,8000b1c0 + 80001b58: 80001b48 .word 0x80001b48 + 80001b5c: 00000000 .word 0x00000000 + 80001b60: 80015209 .word 0x80015209 + 80001b64: 00000000 .word 0x00000000 + 80001b68: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x0000000000000000 + 80001b6c: 0008b383 ld x7,0(x17) + 80001b70: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x8000000000000001 + 80001b74: 0008b403 ld x8,0(x17) + 80001b78: 00888893 addi x17,x17,8 + +0000000080001b7c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + sm4ed x1, x7, x8, 1 # perform operation + 80001b7c: 708380b3 sm4ed x1,x7,x8,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b80: 0007b203 ld x4,0(x15) + 80001b84: 00120c63 beq x4,x1,80001b9c + 80001b88: 638092ef jal x5,8000b1c0 + 80001b8c: 80001b7c .word 0x80001b7c + 80001b90: 00000000 .word 0x00000000 + 80001b94: 8001526b .word 0x8001526b + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000000000000 + 80001ba0: 0008be83 ld x29,0(x17) + 80001ba4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x7fffffffffffffff + 80001ba8: 0008b303 ld x6,0(x17) + 80001bac: 00888893 addi x17,x17,8 + +0000000080001bb0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + sm4ed x22, x29, x6, 2 # perform operation + 80001bb0: b06e8b33 sm4ed x22,x29,x6,0x2 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb4: 0007b203 ld x4,0(x15) + 80001bb8: 01620c63 beq x4,x22,80001bd0 + 80001bbc: 604092ef jal x5,8000b1c0 + 80001bc0: 80001bb0 .word 0x80001bb0 + 80001bc4: 00000000 .word 0x00000000 + 80001bc8: 800152cd .word 0x800152cd + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000000000000 + 80001bd4: 0008bc03 ld x24,0(x17) + 80001bd8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80001bdc: 0008b903 ld x18,0(x17) + 80001be0: 00888893 addi x17,x17,8 + +0000000080001be4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + sm4ed x29, x24, x18, 2 # perform operation + 80001be4: b12c0eb3 sm4ed x29,x24,x18,0x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001be8: 0007b203 ld x4,0(x15) + 80001bec: 01d20c63 beq x4,x29,80001c04 + 80001bf0: 5d0092ef jal x5,8000b1c0 + 80001bf4: 80001be4 .word 0x80001be4 + 80001bf8: 00000000 .word 0x00000000 + 80001bfc: 8001532f .word 0x8001532f + 80001c00: 00000000 .word 0x00000000 + 80001c04: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000000 + 80001c08: 0008b503 ld x10,0(x17) + 80001c0c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xffffffffffffffff + 80001c10: 0008bb83 ld x23,0(x17) + 80001c14: 00888893 addi x17,x17,8 + +0000000080001c18 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + sm4ed x25, x10, x23, 0 # perform operation + 80001c18: 31750cb3 sm4ed x25,x10,x23,0x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c1c: 0007b203 ld x4,0(x15) + 80001c20: 01920c63 beq x4,x25,80001c38 + 80001c24: 59c092ef jal x5,8000b1c0 + 80001c28: 80001c18 .word 0x80001c18 + 80001c2c: 00000000 .word 0x00000000 + 80001c30: 80015391 .word 0x80015391 + 80001c34: 00000000 .word 0x00000000 + 80001c38: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x0000000000000000 + 80001c3c: 0008b403 ld x8,0(x17) + 80001c40: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xfffffffffffffffe + 80001c44: 0008bc03 ld x24,0(x17) + 80001c48: 00888893 addi x17,x17,8 + +0000000080001c4c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + sm4ed x26, x8, x24, 0 # perform operation + 80001c4c: 31840d33 sm4ed x26,x8,x24,0x0 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c50: 0007b203 ld x4,0(x15) + 80001c54: 01a20c63 beq x4,x26,80001c6c + 80001c58: 568092ef jal x5,8000b1c0 + 80001c5c: 80001c4c .word 0x80001c4c + 80001c60: 00000000 .word 0x00000000 + 80001c64: 800153f3 .word 0x800153f3 + 80001c68: 00000000 .word 0x00000000 + 80001c6c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001c70: 0008be03 ld x28,0(x17) + 80001c74: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80001c78: 0008b583 ld x11,0(x17) + 80001c7c: 00888893 addi x17,x17,8 + +0000000080001c80 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + sm4ed x3, x28, x11, 2 # perform operation + 80001c80: b0be01b3 sm4ed x3,x28,x11,0x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c84: 0007b203 ld x4,0(x15) + 80001c88: 00320c63 beq x4,x3,80001ca0 + 80001c8c: 534092ef jal x5,8000b1c0 + 80001c90: 80001c80 .word 0x80001c80 + 80001c94: 00000000 .word 0x00000000 + 80001c98: 80015455 .word 0x80015455 + 80001c9c: 00000000 .word 0x00000000 + 80001ca0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000000000000 + 80001ca4: 0008be83 ld x29,0(x17) + 80001ca8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 80001cac: 0008b803 ld x16,0(x17) + 80001cb0: 00888893 addi x17,x17,8 + +0000000080001cb4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x6, x29, x16, 2 # perform operation + 80001cb4: b10e8333 sm4ed x6,x29,x16,0x2 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cb8: 0007b203 ld x4,0(x15) + 80001cbc: 00620c63 beq x4,x6,80001cd4 + 80001cc0: 500092ef jal x5,8000b1c0 + 80001cc4: 80001cb4 .word 0x80001cb4 + 80001cc8: 00000000 .word 0x00000000 + 80001ccc: 800154b7 .word 0x800154b7 + 80001cd0: 00000000 .word 0x00000000 + 80001cd4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000000000000 + 80001cd8: 0008bd83 ld x27,0(x17) + 80001cdc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x5555555555555555 + 80001ce0: 0008b083 ld x1,0(x17) + 80001ce4: 00888893 addi x17,x17,8 + +0000000080001ce8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + sm4ed x19, x27, x1, 2 # perform operation + 80001ce8: b01d89b3 sm4ed x19,x27,x1,0x2 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cec: 0007b203 ld x4,0(x15) + 80001cf0: 01320c63 beq x4,x19,80001d08 + 80001cf4: 4cc092ef jal x5,8000b1c0 + 80001cf8: 80001ce8 .word 0x80001ce8 + 80001cfc: 00000000 .word 0x00000000 + 80001d00: 80015519 .word 0x80015519 + 80001d04: 00000000 .word 0x00000000 + 80001d08: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001d0c: 0008be03 ld x28,0(x17) + 80001d10: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x00000000ffffffff + 80001d14: 0008b903 ld x18,0(x17) + 80001d18: 00888893 addi x17,x17,8 + +0000000080001d1c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sm4ed x6, x28, x18, 3 # perform operation + 80001d1c: f12e0333 sm4ed x6,x28,x18,0x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d20: 0007b203 ld x4,0(x15) + 80001d24: 00620c63 beq x4,x6,80001d3c + 80001d28: 498092ef jal x5,8000b1c0 + 80001d2c: 80001d1c .word 0x80001d1c + 80001d30: 00000000 .word 0x00000000 + 80001d34: 8001557b .word 0x8001557b + 80001d38: 00000000 .word 0x00000000 + 80001d3c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0000000000000000 + 80001d40: 0008bb83 ld x23,0(x17) + 80001d44: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x00000000fffffffe + 80001d48: 0008bb03 ld x22,0(x17) + 80001d4c: 00888893 addi x17,x17,8 + +0000000080001d50 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sm4ed x14, x23, x22, 2 # perform operation + 80001d50: b16b8733 sm4ed x14,x23,x22,0x2 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d54: 0007b203 ld x4,0(x15) + 80001d58: 00e20c63 beq x4,x14,80001d70 + 80001d5c: 464092ef jal x5,8000b1c0 + 80001d60: 80001d50 .word 0x80001d50 + 80001d64: 00000000 .word 0x00000000 + 80001d68: 800155d5 .word 0x800155d5 + 80001d6c: 00000000 .word 0x00000000 + 80001d70: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000000 + 80001d74: 0008b603 ld x12,0(x17) + 80001d78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000100000000 + 80001d7c: 0008bd83 ld x27,0(x17) + 80001d80: 00888893 addi x17,x17,8 + +0000000080001d84 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + sm4ed x28, x12, x27, 2 # perform operation + 80001d84: b1b60e33 sm4ed x28,x12,x27,0x2 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d88: 0007b203 ld x4,0(x15) + 80001d8c: 01c20c63 beq x4,x28,80001da4 + 80001d90: 430092ef jal x5,8000b1c0 + 80001d94: 80001d84 .word 0x80001d84 + 80001d98: 00000000 .word 0x00000000 + 80001d9c: 8001562f .word 0x8001562f + 80001da0: 00000000 .word 0x00000000 + 80001da4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000000 + 80001da8: 0008be03 ld x28,0(x17) + 80001dac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x0000000100000001 + 80001db0: 0008ba83 ld x21,0(x17) + 80001db4: 00888893 addi x17,x17,8 + +0000000080001db8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + sm4ed x22, x28, x21, 1 # perform operation + 80001db8: 715e0b33 sm4ed x22,x28,x21,0x1 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dbc: 0007b203 ld x4,0(x15) + 80001dc0: 01620c63 beq x4,x22,80001dd8 + 80001dc4: 3fc092ef jal x5,8000b1c0 + 80001dc8: 80001db8 .word 0x80001db8 + 80001dcc: 00000000 .word 0x00000000 + 80001dd0: 8001568a .word 0x8001568a + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0000000000000001 + 80001ddc: 0008bb83 ld x23,0(x17) + 80001de0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0000000000000000 + 80001de4: 0008b483 ld x9,0(x17) + 80001de8: 00888893 addi x17,x17,8 + +0000000080001dec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sm4ed x1, x23, x9, 1 # perform operation + 80001dec: 709b80b3 sm4ed x1,x23,x9,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df0: 0007b203 ld x4,0(x15) + 80001df4: 00120c63 beq x4,x1,80001e0c + 80001df8: 3c8092ef jal x5,8000b1c0 + 80001dfc: 80001dec .word 0x80001dec + 80001e00: 00000000 .word 0x00000000 + 80001e04: 800156e5 .word 0x800156e5 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000000000001 + 80001e10: 0008bc03 ld x24,0(x17) + 80001e14: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x0000000000000001 + 80001e18: 0008b403 ld x8,0(x17) + 80001e1c: 00888893 addi x17,x17,8 + +0000000080001e20 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sm4ed x6, x24, x8, 3 # perform operation + 80001e20: f08c0333 sm4ed x6,x24,x8,0x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e24: 0007b203 ld x4,0(x15) + 80001e28: 00620c63 beq x4,x6,80001e40 + 80001e2c: 394092ef jal x5,8000b1c0 + 80001e30: 80001e20 .word 0x80001e20 + 80001e34: 00000000 .word 0x00000000 + 80001e38: 80015738 .word 0x80015738 + 80001e3c: 00000000 .word 0x00000000 + 80001e40: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000000000001 + 80001e44: 0008b703 ld x14,0(x17) + 80001e48: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000000000002 + 80001e4c: 0008b183 ld x3,0(x17) + 80001e50: 00888893 addi x17,x17,8 + +0000000080001e54 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sm4ed x9, x14, x3, 2 # perform operation + 80001e54: b03704b3 sm4ed x9,x14,x3,0x2 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e58: 0007b203 ld x4,0(x15) + 80001e5c: 00920c63 beq x4,x9,80001e74 + 80001e60: 360092ef jal x5,8000b1c0 + 80001e64: 80001e54 .word 0x80001e54 + 80001e68: 00000000 .word 0x00000000 + 80001e6c: 8001578b .word 0x8001578b + 80001e70: 00000000 .word 0x00000000 + 80001e74: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000000000001 + 80001e78: 0008bc83 ld x25,0(x17) + 80001e7c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000000 + 80001e80: 0008b483 ld x9,0(x17) + 80001e84: 00888893 addi x17,x17,8 + +0000000080001e88 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + sm4ed x18, x25, x9, 0 # perform operation + 80001e88: 309c8933 sm4ed x18,x25,x9,0x0 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e8c: 0007b203 ld x4,0(x15) + 80001e90: 01220c63 beq x4,x18,80001ea8 + 80001e94: 32c092ef jal x5,8000b1c0 + 80001e98: 80001e88 .word 0x80001e88 + 80001e9c: 00000000 .word 0x00000000 + 80001ea0: 800157de .word 0x800157de + 80001ea4: 00000000 .word 0x00000000 + 80001ea8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000000000001 + 80001eac: 0008b983 ld x19,0(x17) + 80001eb0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x8000000000000001 + 80001eb4: 0008be03 ld x28,0(x17) + 80001eb8: 00888893 addi x17,x17,8 + +0000000080001ebc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + sm4ed x9, x19, x28, 3 # perform operation + 80001ebc: f1c984b3 sm4ed x9,x19,x28,0x3 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec0: 0007b203 ld x4,0(x15) + 80001ec4: 00920c63 beq x4,x9,80001edc + 80001ec8: 2f8092ef jal x5,8000b1c0 + 80001ecc: 80001ebc .word 0x80001ebc + 80001ed0: 00000000 .word 0x00000000 + 80001ed4: 80015840 .word 0x80015840 + 80001ed8: 00000000 .word 0x00000000 + 80001edc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000001 + 80001ee0: 0008b503 ld x10,0(x17) + 80001ee4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x7fffffffffffffff + 80001ee8: 0008bf03 ld x30,0(x17) + 80001eec: 00888893 addi x17,x17,8 + +0000000080001ef0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + sm4ed x20, x10, x30, 3 # perform operation + 80001ef0: f1e50a33 sm4ed x20,x10,x30,0x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef4: 0007b203 ld x4,0(x15) + 80001ef8: 01420c63 beq x4,x20,80001f10 + 80001efc: 2c4092ef jal x5,8000b1c0 + 80001f00: 80001ef0 .word 0x80001ef0 + 80001f04: 00000000 .word 0x00000000 + 80001f08: 800158a2 .word 0x800158a2 + 80001f0c: 00000000 .word 0x00000000 + 80001f10: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000000000001 + 80001f14: 0008bb03 ld x22,0(x17) + 80001f18: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x7ffffffffffffffe + 80001f1c: 0008b983 ld x19,0(x17) + 80001f20: 00888893 addi x17,x17,8 + +0000000080001f24 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + sm4ed x1, x22, x19, 1 # perform operation + 80001f24: 713b00b3 sm4ed x1,x22,x19,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f28: 0007b203 ld x4,0(x15) + 80001f2c: 00120c63 beq x4,x1,80001f44 + 80001f30: 290092ef jal x5,8000b1c0 + 80001f34: 80001f24 .word 0x80001f24 + 80001f38: 00000000 .word 0x00000000 + 80001f3c: 80015904 .word 0x80015904 + 80001f40: 00000000 .word 0x00000000 + 80001f44: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000001 + 80001f48: 0008b603 ld x12,0(x17) + 80001f4c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xffffffffffffffff + 80001f50: 0008bb03 ld x22,0(x17) + 80001f54: 00888893 addi x17,x17,8 + +0000000080001f58 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + sm4ed x1, x12, x22, 1 # perform operation + 80001f58: 716600b3 sm4ed x1,x12,x22,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f5c: 0007b203 ld x4,0(x15) + 80001f60: 00120c63 beq x4,x1,80001f78 + 80001f64: 25c092ef jal x5,8000b1c0 + 80001f68: 80001f58 .word 0x80001f58 + 80001f6c: 00000000 .word 0x00000000 + 80001f70: 80015966 .word 0x80015966 + 80001f74: 00000000 .word 0x00000000 + 80001f78: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x0000000000000001 + 80001f7c: 0008bd03 ld x26,0(x17) + 80001f80: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xfffffffffffffffe + 80001f84: 0008b583 ld x11,0(x17) + 80001f88: 00888893 addi x17,x17,8 + +0000000080001f8c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + sm4ed x16, x26, x11, 2 # perform operation + 80001f8c: b0bd0833 sm4ed x16,x26,x11,0x2 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f90: 0007b203 ld x4,0(x15) + 80001f94: 01020c63 beq x4,x16,80001fac + 80001f98: 228092ef jal x5,8000b1c0 + 80001f9c: 80001f8c .word 0x80001f8c + 80001fa0: 00000000 .word 0x00000000 + 80001fa4: 800159c8 .word 0x800159c8 + 80001fa8: 00000000 .word 0x00000000 + 80001fac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000000000001 + 80001fb0: 0008b983 ld x19,0(x17) + 80001fb4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 80001fb8: 0008ba83 ld x21,0(x17) + 80001fbc: 00888893 addi x17,x17,8 + +0000000080001fc0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + sm4ed x10, x19, x21, 3 # perform operation + 80001fc0: f1598533 sm4ed x10,x19,x21,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc4: 0007b203 ld x4,0(x15) + 80001fc8: 00a20c63 beq x4,x10,80001fe0 + 80001fcc: 1f4092ef jal x5,8000b1c0 + 80001fd0: 80001fc0 .word 0x80001fc0 + 80001fd4: 00000000 .word 0x00000000 + 80001fd8: 80015a2a .word 0x80015a2a + 80001fdc: 00000000 .word 0x00000000 + 80001fe0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000001 + 80001fe4: 0008b503 ld x10,0(x17) + 80001fe8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80001fec: 0008b903 ld x18,0(x17) + 80001ff0: 00888893 addi x17,x17,8 + +0000000080001ff4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x8, x10, x18, 0 # perform operation + 80001ff4: 31250433 sm4ed x8,x10,x18,0x0 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ff8: 0007b203 ld x4,0(x15) + 80001ffc: 00820c63 beq x4,x8,80002014 + 80002000: 1c0092ef jal x5,8000b1c0 + 80002004: 80001ff4 .word 0x80001ff4 + 80002008: 00000000 .word 0x00000000 + 8000200c: 80015a8c .word 0x80015a8c + 80002010: 00000000 .word 0x00000000 + 80002014: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000001 + 80002018: 0008b603 ld x12,0(x17) + 8000201c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x5555555555555555 + 80002020: 0008bf03 ld x30,0(x17) + 80002024: 00888893 addi x17,x17,8 + +0000000080002028 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + sm4ed x29, x12, x30, 3 # perform operation + 80002028: f1e60eb3 sm4ed x29,x12,x30,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 8000202c: 0007b203 ld x4,0(x15) + 80002030: 01d20c63 beq x4,x29,80002048 + 80002034: 18c092ef jal x5,8000b1c0 + 80002038: 80002028 .word 0x80002028 + 8000203c: 00000000 .word 0x00000000 + 80002040: 80015aee .word 0x80015aee + 80002044: 00000000 .word 0x00000000 + 80002048: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x0000000000000001 + 8000204c: 0008b403 ld x8,0(x17) + 80002050: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x00000000ffffffff + 80002054: 0008b083 ld x1,0(x17) + 80002058: 00888893 addi x17,x17,8 + +000000008000205c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sm4ed x10, x8, x1, 2 # perform operation + 8000205c: b0140533 sm4ed x10,x8,x1,0x2 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002060: 0007b203 ld x4,0(x15) + 80002064: 00a20c63 beq x4,x10,8000207c + 80002068: 158092ef jal x5,8000b1c0 + 8000206c: 8000205c .word 0x8000205c + 80002070: 00000000 .word 0x00000000 + 80002074: 80015b50 .word 0x80015b50 + 80002078: 00000000 .word 0x00000000 + 8000207c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000000000001 + 80002080: 0008b503 ld x10,0(x17) + 80002084: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x00000000fffffffe + 80002088: 0008b183 ld x3,0(x17) + 8000208c: 00888893 addi x17,x17,8 + +0000000080002090 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sm4ed x16, x10, x3, 3 # perform operation + 80002090: f0350833 sm4ed x16,x10,x3,0x3 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002094: 0007b203 ld x4,0(x15) + 80002098: 01020c63 beq x4,x16,800020b0 + 8000209c: 124092ef jal x5,8000b1c0 + 800020a0: 80002090 .word 0x80002090 + 800020a4: 00000000 .word 0x00000000 + 800020a8: 80015baa .word 0x80015baa + 800020ac: 00000000 .word 0x00000000 + 800020b0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x0000000000000001 + 800020b4: 0008bc03 ld x24,0(x17) + 800020b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000100000000 + 800020bc: 0008bf03 ld x30,0(x17) + 800020c0: 00888893 addi x17,x17,8 + +00000000800020c4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + sm4ed x11, x24, x30, 1 # perform operation + 800020c4: 71ec05b3 sm4ed x11,x24,x30,0x1 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020c8: 0007b203 ld x4,0(x15) + 800020cc: 00b20c63 beq x4,x11,800020e4 + 800020d0: 0f0092ef jal x5,8000b1c0 + 800020d4: 800020c4 .word 0x800020c4 + 800020d8: 00000000 .word 0x00000000 + 800020dc: 80015c04 .word 0x80015c04 + 800020e0: 00000000 .word 0x00000000 + 800020e4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x0000000000000001 + 800020e8: 0008b803 ld x16,0(x17) + 800020ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000100000001 + 800020f0: 0008be83 ld x29,0(x17) + 800020f4: 00888893 addi x17,x17,8 + +00000000800020f8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + sm4ed x30, x16, x29, 1 # perform operation + 800020f8: 71d80f33 sm4ed x30,x16,x29,0x1 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020fc: 0007b203 ld x4,0(x15) + 80002100: 01e20c63 beq x4,x30,80002118 + 80002104: 0bc092ef jal x5,8000b1c0 + 80002108: 800020f8 .word 0x800020f8 + 8000210c: 00000000 .word 0x00000000 + 80002110: 80015c5f .word 0x80015c5f + 80002114: 00000000 .word 0x00000000 + 80002118: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x0000000000000002 + 8000211c: 0008b303 ld x6,0(x17) + 80002120: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000000000000 + 80002124: 0008b903 ld x18,0(x17) + 80002128: 00888893 addi x17,x17,8 + +000000008000212c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sm4ed x13, x6, x18, 3 # perform operation + 8000212c: f12306b3 sm4ed x13,x6,x18,0x3 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002130: 0007b203 ld x4,0(x15) + 80002134: 00d20c63 beq x4,x13,8000214c + 80002138: 088092ef jal x5,8000b1c0 + 8000213c: 8000212c .word 0x8000212c + 80002140: 00000000 .word 0x00000000 + 80002144: 80015cba .word 0x80015cba + 80002148: 00000000 .word 0x00000000 + 8000214c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000000000002 + 80002150: 0008b983 ld x19,0(x17) + 80002154: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000000000001 + 80002158: 0008bf03 ld x30,0(x17) + 8000215c: 00888893 addi x17,x17,8 + +0000000080002160 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sm4ed x29, x19, x30, 3 # perform operation + 80002160: f1e98eb3 sm4ed x29,x19,x30,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002164: 0007b203 ld x4,0(x15) + 80002168: 01d20c63 beq x4,x29,80002180 + 8000216c: 054092ef jal x5,8000b1c0 + 80002170: 80002160 .word 0x80002160 + 80002174: 00000000 .word 0x00000000 + 80002178: 80015d0d .word 0x80015d0d + 8000217c: 00000000 .word 0x00000000 + 80002180: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x0000000000000002 + 80002184: 0008bf83 ld x31,0(x17) + 80002188: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000002 + 8000218c: 0008ba03 ld x20,0(x17) + 80002190: 00888893 addi x17,x17,8 + +0000000080002194 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sm4ed x24, x31, x20, 0 # perform operation + 80002194: 314f8c33 sm4ed x24,x31,x20,0x0 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002198: 0007b203 ld x4,0(x15) + 8000219c: 01820c63 beq x4,x24,800021b4 + 800021a0: 020092ef jal x5,8000b1c0 + 800021a4: 80002194 .word 0x80002194 + 800021a8: 00000000 .word 0x00000000 + 800021ac: 80015d60 .word 0x80015d60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000000000002 + 800021b8: 0008b483 ld x9,0(x17) + 800021bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x8000000000000000 + 800021c0: 0008b183 ld x3,0(x17) + 800021c4: 00888893 addi x17,x17,8 + +00000000800021c8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + sm4ed x7, x9, x3, 2 # perform operation + 800021c8: b03483b3 sm4ed x7,x9,x3,0x2 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021cc: 0007b203 ld x4,0(x15) + 800021d0: 00720c63 beq x4,x7,800021e8 + 800021d4: 7ed082ef jal x5,8000b1c0 + 800021d8: 800021c8 .word 0x800021c8 + 800021dc: 00000000 .word 0x00000000 + 800021e0: 80015db3 .word 0x80015db3 + 800021e4: 00000000 .word 0x00000000 + 800021e8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000000000002 + 800021ec: 0008be83 ld x29,0(x17) + 800021f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x8000000000000001 + 800021f4: 0008b603 ld x12,0(x17) + 800021f8: 00888893 addi x17,x17,8 + +00000000800021fc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + sm4ed x9, x29, x12, 0 # perform operation + 800021fc: 30ce84b3 sm4ed x9,x29,x12,0x0 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002200: 0007b203 ld x4,0(x15) + 80002204: 00920c63 beq x4,x9,8000221c + 80002208: 7b9082ef jal x5,8000b1c0 + 8000220c: 800021fc .word 0x800021fc + 80002210: 00000000 .word 0x00000000 + 80002214: 80015e15 .word 0x80015e15 + 80002218: 00000000 .word 0x00000000 + 8000221c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x0000000000000002 + 80002220: 0008bd03 ld x26,0(x17) + 80002224: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7fffffffffffffff + 80002228: 0008be03 ld x28,0(x17) + 8000222c: 00888893 addi x17,x17,8 + +0000000080002230 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + sm4ed x12, x26, x28, 0 # perform operation + 80002230: 31cd0633 sm4ed x12,x26,x28,0x0 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002234: 0007b203 ld x4,0(x15) + 80002238: 00c20c63 beq x4,x12,80002250 + 8000223c: 785082ef jal x5,8000b1c0 + 80002240: 80002230 .word 0x80002230 + 80002244: 00000000 .word 0x00000000 + 80002248: 80015e77 .word 0x80015e77 + 8000224c: 00000000 .word 0x00000000 + 80002250: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000000000002 + 80002254: 0008b603 ld x12,0(x17) + 80002258: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x7ffffffffffffffe + 8000225c: 0008bc03 ld x24,0(x17) + 80002260: 00888893 addi x17,x17,8 + +0000000080002264 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + sm4ed x13, x12, x24, 3 # perform operation + 80002264: f18606b3 sm4ed x13,x12,x24,0x3 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002268: 0007b203 ld x4,0(x15) + 8000226c: 00d20c63 beq x4,x13,80002284 + 80002270: 751082ef jal x5,8000b1c0 + 80002274: 80002264 .word 0x80002264 + 80002278: 00000000 .word 0x00000000 + 8000227c: 80015ed9 .word 0x80015ed9 + 80002280: 00000000 .word 0x00000000 + 80002284: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000000000002 + 80002288: 0008b983 ld x19,0(x17) + 8000228c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xffffffffffffffff + 80002290: 0008b103 ld x2,0(x17) + 80002294: 00888893 addi x17,x17,8 + +0000000080002298 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + sm4ed x27, x19, x2, 0 # perform operation + 80002298: 30298db3 sm4ed x27,x19,x2,0x0 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 8000229c: 0007b203 ld x4,0(x15) + 800022a0: 01b20c63 beq x4,x27,800022b8 + 800022a4: 71d082ef jal x5,8000b1c0 + 800022a8: 80002298 .word 0x80002298 + 800022ac: 00000000 .word 0x00000000 + 800022b0: 80015f3b .word 0x80015f3b + 800022b4: 00000000 .word 0x00000000 + 800022b8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000000000002 + 800022bc: 0008bd83 ld x27,0(x17) + 800022c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xfffffffffffffffe + 800022c4: 0008b683 ld x13,0(x17) + 800022c8: 00888893 addi x17,x17,8 + +00000000800022cc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + sm4ed x25, x27, x13, 0 # perform operation + 800022cc: 30dd8cb3 sm4ed x25,x27,x13,0x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d0: 0007b203 ld x4,0(x15) + 800022d4: 01920c63 beq x4,x25,800022ec + 800022d8: 6e9082ef jal x5,8000b1c0 + 800022dc: 800022cc .word 0x800022cc + 800022e0: 00000000 .word 0x00000000 + 800022e4: 80015f9d .word 0x80015f9d + 800022e8: 00000000 .word 0x00000000 + 800022ec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000000000002 + 800022f0: 0008b483 ld x9,0(x17) + 800022f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 800022f8: 0008ba03 ld x20,0(x17) + 800022fc: 00888893 addi x17,x17,8 + +0000000080002300 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + sm4ed x16, x9, x20, 1 # perform operation + 80002300: 71448833 sm4ed x16,x9,x20,0x1 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002304: 0007b203 ld x4,0(x15) + 80002308: 01020c63 beq x4,x16,80002320 + 8000230c: 6b5082ef jal x5,8000b1c0 + 80002310: 80002300 .word 0x80002300 + 80002314: 00000000 .word 0x00000000 + 80002318: 80015fff .word 0x80015fff + 8000231c: 00000000 .word 0x00000000 + 80002320: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x0000000000000002 + 80002324: 0008bc83 ld x25,0(x17) + 80002328: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 8000232c: 0008ba83 ld x21,0(x17) + 80002330: 00888893 addi x17,x17,8 + +0000000080002334 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x27, x25, x21, 2 # perform operation + 80002334: b15c8db3 sm4ed x27,x25,x21,0x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002338: 0007b203 ld x4,0(x15) + 8000233c: 01b20c63 beq x4,x27,80002354 + 80002340: 681082ef jal x5,8000b1c0 + 80002344: 80002334 .word 0x80002334 + 80002348: 00000000 .word 0x00000000 + 8000234c: 80016061 .word 0x80016061 + 80002350: 00000000 .word 0x00000000 + 80002354: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000002 + 80002358: 0008be03 ld x28,0(x17) + 8000235c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x5555555555555555 + 80002360: 0008b483 ld x9,0(x17) + 80002364: 00888893 addi x17,x17,8 + +0000000080002368 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + sm4ed x2, x28, x9, 1 # perform operation + 80002368: 709e0133 sm4ed x2,x28,x9,0x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 8000236c: 0007b203 ld x4,0(x15) + 80002370: 00220c63 beq x4,x2,80002388 + 80002374: 64d082ef jal x5,8000b1c0 + 80002378: 80002368 .word 0x80002368 + 8000237c: 00000000 .word 0x00000000 + 80002380: 800160c3 .word 0x800160c3 + 80002384: 00000000 .word 0x00000000 + 80002388: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x0000000000000002 + 8000238c: 0008b983 ld x19,0(x17) + 80002390: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x00000000ffffffff + 80002394: 0008b383 ld x7,0(x17) + 80002398: 00888893 addi x17,x17,8 + +000000008000239c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sm4ed x9, x19, x7, 3 # perform operation + 8000239c: f07984b3 sm4ed x9,x19,x7,0x3 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a0: 0007b203 ld x4,0(x15) + 800023a4: 00920c63 beq x4,x9,800023bc + 800023a8: 619082ef jal x5,8000b1c0 + 800023ac: 8000239c .word 0x8000239c + 800023b0: 00000000 .word 0x00000000 + 800023b4: 80016125 .word 0x80016125 + 800023b8: 00000000 .word 0x00000000 + 800023bc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x0000000000000002 + 800023c0: 0008bb83 ld x23,0(x17) + 800023c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x00000000fffffffe + 800023c8: 0008b303 ld x6,0(x17) + 800023cc: 00888893 addi x17,x17,8 + +00000000800023d0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sm4ed x11, x23, x6, 0 # perform operation + 800023d0: 306b85b3 sm4ed x11,x23,x6,0x0 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d4: 0007b203 ld x4,0(x15) + 800023d8: 00b20c63 beq x4,x11,800023f0 + 800023dc: 5e5082ef jal x5,8000b1c0 + 800023e0: 800023d0 .word 0x800023d0 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 8001617f .word 0x8001617f + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000000000002 + 800023f4: 0008be03 ld x28,0(x17) + 800023f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x0000000100000000 + 800023fc: 0008b403 ld x8,0(x17) + 80002400: 00888893 addi x17,x17,8 + +0000000080002404 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + sm4ed x3, x28, x8, 3 # perform operation + 80002404: f08e01b3 sm4ed x3,x28,x8,0x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002408: 0007b203 ld x4,0(x15) + 8000240c: 00320c63 beq x4,x3,80002424 + 80002410: 5b1082ef jal x5,8000b1c0 + 80002414: 80002404 .word 0x80002404 + 80002418: 00000000 .word 0x00000000 + 8000241c: 800161d9 .word 0x800161d9 + 80002420: 00000000 .word 0x00000000 + 80002424: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000000000002 + 80002428: 0008bb03 ld x22,0(x17) + 8000242c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000001 + 80002430: 0008bf83 ld x31,0(x17) + 80002434: 00888893 addi x17,x17,8 + +0000000080002438 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + sm4ed x2, x22, x31, 1 # perform operation + 80002438: 71fb0133 sm4ed x2,x22,x31,0x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 8000243c: 0007b203 ld x4,0(x15) + 80002440: 00220c63 beq x4,x2,80002458 + 80002444: 57d082ef jal x5,8000b1c0 + 80002448: 80002438 .word 0x80002438 + 8000244c: 00000000 .word 0x00000000 + 80002450: 80016234 .word 0x80016234 + 80002454: 00000000 .word 0x00000000 + 80002458: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8000000000000000 + 8000245c: 0008be03 ld x28,0(x17) + 80002460: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000000 + 80002464: 0008bd83 ld x27,0(x17) + 80002468: 00888893 addi x17,x17,8 + +000000008000246c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + sm4ed x14, x28, x27, 2 # perform operation + 8000246c: b1be0733 sm4ed x14,x28,x27,0x2 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002470: 0007b203 ld x4,0(x15) + 80002474: 00e20c63 beq x4,x14,8000248c + 80002478: 549082ef jal x5,8000b1c0 + 8000247c: 8000246c .word 0x8000246c + 80002480: 00000000 .word 0x00000000 + 80002484: 8001628f .word 0x8001628f + 80002488: 00000000 .word 0x00000000 + 8000248c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x8000000000000000 + 80002490: 0008b583 ld x11,0(x17) + 80002494: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000000000001 + 80002498: 0008b183 ld x3,0(x17) + 8000249c: 00888893 addi x17,x17,8 + +00000000800024a0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + sm4ed x14, x11, x3, 2 # perform operation + 800024a0: b0358733 sm4ed x14,x11,x3,0x2 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a4: 0007b203 ld x4,0(x15) + 800024a8: 00e20c63 beq x4,x14,800024c0 + 800024ac: 515082ef jal x5,8000b1c0 + 800024b0: 800024a0 .word 0x800024a0 + 800024b4: 00000000 .word 0x00000000 + 800024b8: 800162f1 .word 0x800162f1 + 800024bc: 00000000 .word 0x00000000 + 800024c0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x8000000000000000 + 800024c4: 0008b403 ld x8,0(x17) + 800024c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000002 + 800024cc: 0008bd83 ld x27,0(x17) + 800024d0: 00888893 addi x17,x17,8 + +00000000800024d4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + sm4ed x29, x8, x27, 2 # perform operation + 800024d4: b1b40eb3 sm4ed x29,x8,x27,0x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024d8: 0007b203 ld x4,0(x15) + 800024dc: 01d20c63 beq x4,x29,800024f4 + 800024e0: 4e1082ef jal x5,8000b1c0 + 800024e4: 800024d4 .word 0x800024d4 + 800024e8: 00000000 .word 0x00000000 + 800024ec: 80016353 .word 0x80016353 + 800024f0: 00000000 .word 0x00000000 + 800024f4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000000 + 800024f8: 0008bc83 ld x25,0(x17) + 800024fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x8000000000000000 + 80002500: 0008be03 ld x28,0(x17) + 80002504: 00888893 addi x17,x17,8 + +0000000080002508 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + sm4ed x14, x25, x28, 3 # perform operation + 80002508: f1cc8733 sm4ed x14,x25,x28,0x3 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 8000250c: 0007b203 ld x4,0(x15) + 80002510: 00e20c63 beq x4,x14,80002528 + 80002514: 4ad082ef jal x5,8000b1c0 + 80002518: 80002508 .word 0x80002508 + 8000251c: 00000000 .word 0x00000000 + 80002520: 800163b5 .word 0x800163b5 + 80002524: 00000000 .word 0x00000000 + 80002528: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x8000000000000000 + 8000252c: 0008bb03 ld x22,0(x17) + 80002530: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x8000000000000001 + 80002534: 0008b803 ld x16,0(x17) + 80002538: 00888893 addi x17,x17,8 + +000000008000253c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + sm4ed x7, x22, x16, 1 # perform operation + 8000253c: 710b03b3 sm4ed x7,x22,x16,0x1 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002540: 0007b203 ld x4,0(x15) + 80002544: 00720c63 beq x4,x7,8000255c + 80002548: 479082ef jal x5,8000b1c0 + 8000254c: 8000253c .word 0x8000253c + 80002550: 00000000 .word 0x00000000 + 80002554: 80016426 .word 0x80016426 + 80002558: 00000000 .word 0x00000000 + 8000255c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x8000000000000000 + 80002560: 0008bb03 ld x22,0(x17) + 80002564: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7fffffffffffffff + 80002568: 0008be03 ld x28,0(x17) + 8000256c: 00888893 addi x17,x17,8 + +0000000080002570 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + sm4ed x21, x22, x28, 1 # perform operation + 80002570: 71cb0ab3 sm4ed x21,x22,x28,0x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002574: 0007b203 ld x4,0(x15) + 80002578: 01520c63 beq x4,x21,80002590 + 8000257c: 445082ef jal x5,8000b1c0 + 80002580: 80002570 .word 0x80002570 + 80002584: 00000000 .word 0x00000000 + 80002588: 80016497 .word 0x80016497 + 8000258c: 00000000 .word 0x00000000 + 80002590: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x8000000000000000 + 80002594: 0008b083 ld x1,0(x17) + 80002598: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x7ffffffffffffffe + 8000259c: 0008bf03 ld x30,0(x17) + 800025a0: 00888893 addi x17,x17,8 + +00000000800025a4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + sm4ed x23, x1, x30, 0 # perform operation + 800025a4: 31e08bb3 sm4ed x23,x1,x30,0x0 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025a8: 0007b203 ld x4,0(x15) + 800025ac: 01720c63 beq x4,x23,800025c4 + 800025b0: 411082ef jal x5,8000b1c0 + 800025b4: 800025a4 .word 0x800025a4 + 800025b8: 00000000 .word 0x00000000 + 800025bc: 80016508 .word 0x80016508 + 800025c0: 00000000 .word 0x00000000 + 800025c4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x8000000000000000 + 800025c8: 0008be03 ld x28,0(x17) + 800025cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xffffffffffffffff + 800025d0: 0008b303 ld x6,0(x17) + 800025d4: 00888893 addi x17,x17,8 + +00000000800025d8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + sm4ed x23, x28, x6, 0 # perform operation + 800025d8: 306e0bb3 sm4ed x23,x28,x6,0x0 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025dc: 0007b203 ld x4,0(x15) + 800025e0: 01720c63 beq x4,x23,800025f8 + 800025e4: 3dd082ef jal x5,8000b1c0 + 800025e8: 800025d8 .word 0x800025d8 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 80016579 .word 0x80016579 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000000 + 800025fc: 0008be83 ld x29,0(x17) + 80002600: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xfffffffffffffffe + 80002604: 0008bc03 ld x24,0(x17) + 80002608: 00888893 addi x17,x17,8 + +000000008000260c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + sm4ed x31, x29, x24, 3 # perform operation + 8000260c: f18e8fb3 sm4ed x31,x29,x24,0x3 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002610: 0007b203 ld x4,0(x15) + 80002614: 01f20c63 beq x4,x31,8000262c + 80002618: 3a9082ef jal x5,8000b1c0 + 8000261c: 8000260c .word 0x8000260c + 80002620: 00000000 .word 0x00000000 + 80002624: 800165ea .word 0x800165ea + 80002628: 00000000 .word 0x00000000 + 8000262c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x8000000000000000 + 80002630: 0008bf83 ld x31,0(x17) + 80002634: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 80002638: 0008bd03 ld x26,0(x17) + 8000263c: 00888893 addi x17,x17,8 + +0000000080002640 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + sm4ed x20, x31, x26, 1 # perform operation + 80002640: 71af8a33 sm4ed x20,x31,x26,0x1 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002644: 0007b203 ld x4,0(x15) + 80002648: 01420c63 beq x4,x20,80002660 + 8000264c: 375082ef jal x5,8000b1c0 + 80002650: 80002640 .word 0x80002640 + 80002654: 00000000 .word 0x00000000 + 80002658: 8001665b .word 0x8001665b + 8000265c: 00000000 .word 0x00000000 + 80002660: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x8000000000000000 + 80002664: 0008be83 ld x29,0(x17) + 80002668: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0xaaaaaaaaaaaaaaaa + 8000266c: 0008be03 ld x28,0(x17) + 80002670: 00888893 addi x17,x17,8 + +0000000080002674 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x6, x29, x28, 0 # perform operation + 80002674: 31ce8333 sm4ed x6,x29,x28,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002678: 0007b203 ld x4,0(x15) + 8000267c: 00620c63 beq x4,x6,80002694 + 80002680: 341082ef jal x5,8000b1c0 + 80002684: 80002674 .word 0x80002674 + 80002688: 00000000 .word 0x00000000 + 8000268c: 800166cc .word 0x800166cc + 80002690: 00000000 .word 0x00000000 + 80002694: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x8000000000000000 + 80002698: 0008bc03 ld x24,0(x17) + 8000269c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x5555555555555555 + 800026a0: 0008b103 ld x2,0(x17) + 800026a4: 00888893 addi x17,x17,8 + +00000000800026a8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + sm4ed x3, x24, x2, 1 # perform operation + 800026a8: 702c01b3 sm4ed x3,x24,x2,0x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026ac: 0007b203 ld x4,0(x15) + 800026b0: 00320c63 beq x4,x3,800026c8 + 800026b4: 30d082ef jal x5,8000b1c0 + 800026b8: 800026a8 .word 0x800026a8 + 800026bc: 00000000 .word 0x00000000 + 800026c0: 8001673d .word 0x8001673d + 800026c4: 00000000 .word 0x00000000 + 800026c8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x8000000000000000 + 800026cc: 0008bd03 ld x26,0(x17) + 800026d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x00000000ffffffff + 800026d4: 0008bf83 ld x31,0(x17) + 800026d8: 00888893 addi x17,x17,8 + +00000000800026dc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + sm4ed x11, x26, x31, 1 # perform operation + 800026dc: 71fd05b3 sm4ed x11,x26,x31,0x1 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e0: 0007b203 ld x4,0(x15) + 800026e4: 00b20c63 beq x4,x11,800026fc + 800026e8: 2d9082ef jal x5,8000b1c0 + 800026ec: 800026dc .word 0x800026dc + 800026f0: 00000000 .word 0x00000000 + 800026f4: 800167ae .word 0x800167ae + 800026f8: 00000000 .word 0x00000000 + 800026fc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x8000000000000000 + 80002700: 0008b383 ld x7,0(x17) + 80002704: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x00000000fffffffe + 80002708: 0008b803 ld x16,0(x17) + 8000270c: 00888893 addi x17,x17,8 + +0000000080002710 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + sm4ed x29, x7, x16, 0 # perform operation + 80002710: 31038eb3 sm4ed x29,x7,x16,0x0 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002714: 0007b203 ld x4,0(x15) + 80002718: 01d20c63 beq x4,x29,80002730 + 8000271c: 2a5082ef jal x5,8000b1c0 + 80002720: 80002710 .word 0x80002710 + 80002724: 00000000 .word 0x00000000 + 80002728: 80016817 .word 0x80016817 + 8000272c: 00000000 .word 0x00000000 + 80002730: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x8000000000000000 + 80002734: 0008b583 ld x11,0(x17) + 80002738: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000100000000 + 8000273c: 0008bd83 ld x27,0(x17) + 80002740: 00888893 addi x17,x17,8 + +0000000080002744 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + sm4ed x3, x11, x27, 2 # perform operation + 80002744: b1b581b3 sm4ed x3,x11,x27,0x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002748: 0007b203 ld x4,0(x15) + 8000274c: 00320c63 beq x4,x3,80002764 + 80002750: 271082ef jal x5,8000b1c0 + 80002754: 80002744 .word 0x80002744 + 80002758: 00000000 .word 0x00000000 + 8000275c: 80016880 .word 0x80016880 + 80002760: 00000000 .word 0x00000000 + 80002764: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x8000000000000000 + 80002768: 0008bc03 ld x24,0(x17) + 8000276c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x0000000100000001 + 80002770: 0008ba83 ld x21,0(x17) + 80002774: 00888893 addi x17,x17,8 + +0000000080002778 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + sm4ed x8, x24, x21, 2 # perform operation + 80002778: b15c0433 sm4ed x8,x24,x21,0x2 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 8000277c: 0007b203 ld x4,0(x15) + 80002780: 00820c63 beq x4,x8,80002798 + 80002784: 23d082ef jal x5,8000b1c0 + 80002788: 80002778 .word 0x80002778 + 8000278c: 00000000 .word 0x00000000 + 80002790: 800168ea .word 0x800168ea + 80002794: 00000000 .word 0x00000000 + 80002798: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x8000000000000001 + 8000279c: 0008b403 ld x8,0(x17) + 800027a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000000000000 + 800027a4: 0008b983 ld x19,0(x17) + 800027a8: 00888893 addi x17,x17,8 + +00000000800027ac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + sm4ed x20, x8, x19, 0 # perform operation + 800027ac: 31340a33 sm4ed x20,x8,x19,0x0 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b0: 0007b203 ld x4,0(x15) + 800027b4: 01420c63 beq x4,x20,800027cc + 800027b8: 209082ef jal x5,8000b1c0 + 800027bc: 800027ac .word 0x800027ac + 800027c0: 00000000 .word 0x00000000 + 800027c4: 80016954 .word 0x80016954 + 800027c8: 00000000 .word 0x00000000 + 800027cc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x8000000000000001 + 800027d0: 0008ba83 ld x21,0(x17) + 800027d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000000000001 + 800027d8: 0008b583 ld x11,0(x17) + 800027dc: 00888893 addi x17,x17,8 + +00000000800027e0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + sm4ed x29, x21, x11, 0 # perform operation + 800027e0: 30ba8eb3 sm4ed x29,x21,x11,0x0 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e4: 0007b203 ld x4,0(x15) + 800027e8: 01d20c63 beq x4,x29,80002800 + 800027ec: 1d5082ef jal x5,8000b1c0 + 800027f0: 800027e0 .word 0x800027e0 + 800027f4: 00000000 .word 0x00000000 + 800027f8: 800169b6 .word 0x800169b6 + 800027fc: 00000000 .word 0x00000000 + 80002800: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x8000000000000001 + 80002804: 0008b103 ld x2,0(x17) + 80002808: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000000000002 + 8000280c: 0008bd83 ld x27,0(x17) + 80002810: 00888893 addi x17,x17,8 + +0000000080002814 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + sm4ed x22, x2, x27, 3 # perform operation + 80002814: f1b10b33 sm4ed x22,x2,x27,0x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002818: 0007b203 ld x4,0(x15) + 8000281c: 01620c63 beq x4,x22,80002834 + 80002820: 1a1082ef jal x5,8000b1c0 + 80002824: 80002814 .word 0x80002814 + 80002828: 00000000 .word 0x00000000 + 8000282c: 80016a18 .word 0x80016a18 + 80002830: 00000000 .word 0x00000000 + 80002834: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x8000000000000001 + 80002838: 0008bb03 ld x22,0(x17) + 8000283c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000000 + 80002840: 0008b483 ld x9,0(x17) + 80002844: 00888893 addi x17,x17,8 + +0000000080002848 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + sm4ed x18, x22, x9, 3 # perform operation + 80002848: f09b0933 sm4ed x18,x22,x9,0x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 8000284c: 0007b203 ld x4,0(x15) + 80002850: 01220c63 beq x4,x18,80002868 + 80002854: 16d082ef jal x5,8000b1c0 + 80002858: 80002848 .word 0x80002848 + 8000285c: 00000000 .word 0x00000000 + 80002860: 80016a7a .word 0x80016a7a + 80002864: 00000000 .word 0x00000000 + 80002868: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x8000000000000001 + 8000286c: 0008b603 ld x12,0(x17) + 80002870: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000001 + 80002874: 0008b483 ld x9,0(x17) + 80002878: 00888893 addi x17,x17,8 + +000000008000287c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + sm4ed x1, x12, x9, 3 # perform operation + 8000287c: f09600b3 sm4ed x1,x12,x9,0x3 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002880: 0007b203 ld x4,0(x15) + 80002884: 00120c63 beq x4,x1,8000289c + 80002888: 139082ef jal x5,8000b1c0 + 8000288c: 8000287c .word 0x8000287c + 80002890: 00000000 .word 0x00000000 + 80002894: 80016aeb .word 0x80016aeb + 80002898: 00000000 .word 0x00000000 + 8000289c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x8000000000000001 + 800028a0: 0008b583 ld x11,0(x17) + 800028a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x7fffffffffffffff + 800028a8: 0008bc83 ld x25,0(x17) + 800028ac: 00888893 addi x17,x17,8 + +00000000800028b0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + sm4ed x26, x11, x25, 2 # perform operation + 800028b0: b1958d33 sm4ed x26,x11,x25,0x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b4: 0007b203 ld x4,0(x15) + 800028b8: 01a20c63 beq x4,x26,800028d0 + 800028bc: 105082ef jal x5,8000b1c0 + 800028c0: 800028b0 .word 0x800028b0 + 800028c4: 00000000 .word 0x00000000 + 800028c8: 80016b5c .word 0x80016b5c + 800028cc: 00000000 .word 0x00000000 + 800028d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x8000000000000001 + 800028d4: 0008bd03 ld x26,0(x17) + 800028d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x7ffffffffffffffe + 800028dc: 0008b403 ld x8,0(x17) + 800028e0: 00888893 addi x17,x17,8 + +00000000800028e4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + sm4ed x29, x26, x8, 2 # perform operation + 800028e4: b08d0eb3 sm4ed x29,x26,x8,0x2 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028e8: 0007b203 ld x4,0(x15) + 800028ec: 01d20c63 beq x4,x29,80002904 + 800028f0: 0d1082ef jal x5,8000b1c0 + 800028f4: 800028e4 .word 0x800028e4 + 800028f8: 00000000 .word 0x00000000 + 800028fc: 80016bcd .word 0x80016bcd + 80002900: 00000000 .word 0x00000000 + 80002904: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x8000000000000001 + 80002908: 0008b803 ld x16,0(x17) + 8000290c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xffffffffffffffff + 80002910: 0008bb03 ld x22,0(x17) + 80002914: 00888893 addi x17,x17,8 + +0000000080002918 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + sm4ed x14, x16, x22, 3 # perform operation + 80002918: f1680733 sm4ed x14,x16,x22,0x3 + # Check if x14 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x14, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 8000291c: 0007b203 ld x4,0(x15) + 80002920: 00e20c63 beq x4,x14,80002938 + 80002924: 09d082ef jal x5,8000b1c0 + 80002928: 80002918 .word 0x80002918 + 8000292c: 00000000 .word 0x00000000 + 80002930: 80016c3e .word 0x80016c3e + 80002934: 00000000 .word 0x00000000 + 80002938: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x8000000000000001 + 8000293c: 0008bb83 ld x23,0(x17) + 80002940: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xfffffffffffffffe + 80002944: 0008b103 ld x2,0(x17) + 80002948: 00888893 addi x17,x17,8 + +000000008000294c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + sm4ed x25, x23, x2, 3 # perform operation + 8000294c: f02b8cb3 sm4ed x25,x23,x2,0x3 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002950: 0007b203 ld x4,0(x15) + 80002954: 01920c63 beq x4,x25,8000296c + 80002958: 069082ef jal x5,8000b1c0 + 8000295c: 8000294c .word 0x8000294c + 80002960: 00000000 .word 0x00000000 + 80002964: 80016caf .word 0x80016caf + 80002968: 00000000 .word 0x00000000 + 8000296c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x8000000000000001 + 80002970: 0008b903 ld x18,0(x17) + 80002974: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 80002978: 0008b403 ld x8,0(x17) + 8000297c: 00888893 addi x17,x17,8 + +0000000080002980 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + sm4ed x24, x18, x8, 3 # perform operation + 80002980: f0890c33 sm4ed x24,x18,x8,0x3 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002984: 0007b203 ld x4,0(x15) + 80002988: 01820c63 beq x4,x24,800029a0 + 8000298c: 035082ef jal x5,8000b1c0 + 80002990: 80002980 .word 0x80002980 + 80002994: 00000000 .word 0x00000000 + 80002998: 80016d20 .word 0x80016d20 + 8000299c: 00000000 .word 0x00000000 + 800029a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x8000000000000001 + 800029a4: 0008b083 ld x1,0(x17) + 800029a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 800029ac: 0008bd83 ld x27,0(x17) + 800029b0: 00888893 addi x17,x17,8 + +00000000800029b4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x28, x1, x27, 0 # perform operation + 800029b4: 31b08e33 sm4ed x28,x1,x27,0x0 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029b8: 0007b203 ld x4,0(x15) + 800029bc: 01c20c63 beq x4,x28,800029d4 + 800029c0: 001082ef jal x5,8000b1c0 + 800029c4: 800029b4 .word 0x800029b4 + 800029c8: 00000000 .word 0x00000000 + 800029cc: 80016d91 .word 0x80016d91 + 800029d0: 00000000 .word 0x00000000 + 800029d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x8000000000000001 + 800029d8: 0008bc83 ld x25,0(x17) + 800029dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x5555555555555555 + 800029e0: 0008b403 ld x8,0(x17) + 800029e4: 00888893 addi x17,x17,8 + +00000000800029e8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + sm4ed x12, x25, x8, 3 # perform operation + 800029e8: f08c8633 sm4ed x12,x25,x8,0x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029ec: 0007b203 ld x4,0(x15) + 800029f0: 00c20c63 beq x4,x12,80002a08 + 800029f4: 7cc082ef jal x5,8000b1c0 + 800029f8: 800029e8 .word 0x800029e8 + 800029fc: 00000000 .word 0x00000000 + 80002a00: 80016e02 .word 0x80016e02 + 80002a04: 00000000 .word 0x00000000 + 80002a08: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x8000000000000001 + 80002a0c: 0008b103 ld x2,0(x17) + 80002a10: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x00000000ffffffff + 80002a14: 0008b803 ld x16,0(x17) + 80002a18: 00888893 addi x17,x17,8 + +0000000080002a1c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + sm4ed x7, x2, x16, 3 # perform operation + 80002a1c: f10103b3 sm4ed x7,x2,x16,0x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a20: 0007b203 ld x4,0(x15) + 80002a24: 00720c63 beq x4,x7,80002a3c + 80002a28: 798082ef jal x5,8000b1c0 + 80002a2c: 80002a1c .word 0x80002a1c + 80002a30: 00000000 .word 0x00000000 + 80002a34: 80016e73 .word 0x80016e73 + 80002a38: 00000000 .word 0x00000000 + 80002a3c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x8000000000000001 + 80002a40: 0008bf03 ld x30,0(x17) + 80002a44: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x00000000fffffffe + 80002a48: 0008b403 ld x8,0(x17) + 80002a4c: 00888893 addi x17,x17,8 + +0000000080002a50 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + sm4ed x12, x30, x8, 1 # perform operation + 80002a50: 708f0633 sm4ed x12,x30,x8,0x1 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a54: 0007b203 ld x4,0(x15) + 80002a58: 00c20c63 beq x4,x12,80002a70 + 80002a5c: 764082ef jal x5,8000b1c0 + 80002a60: 80002a50 .word 0x80002a50 + 80002a64: 00000000 .word 0x00000000 + 80002a68: 80016edc .word 0x80016edc + 80002a6c: 00000000 .word 0x00000000 + 80002a70: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x8000000000000001 + 80002a74: 0008b503 ld x10,0(x17) + 80002a78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x0000000100000000 + 80002a7c: 0008bb03 ld x22,0(x17) + 80002a80: 00888893 addi x17,x17,8 + +0000000080002a84 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + sm4ed x18, x10, x22, 3 # perform operation + 80002a84: f1650933 sm4ed x18,x10,x22,0x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a88: 0007b203 ld x4,0(x15) + 80002a8c: 01220c63 beq x4,x18,80002aa4 + 80002a90: 730082ef jal x5,8000b1c0 + 80002a94: 80002a84 .word 0x80002a84 + 80002a98: 00000000 .word 0x00000000 + 80002a9c: 80016f45 .word 0x80016f45 + 80002aa0: 00000000 .word 0x00000000 + 80002aa4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x8000000000000001 + 80002aa8: 0008bb03 ld x22,0(x17) + 80002aac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000001 + 80002ab0: 0008bf83 ld x31,0(x17) + 80002ab4: 00888893 addi x17,x17,8 + +0000000080002ab8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + sm4ed x24, x22, x31, 1 # perform operation + 80002ab8: 71fb0c33 sm4ed x24,x22,x31,0x1 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002abc: 0007b203 ld x4,0(x15) + 80002ac0: 01820c63 beq x4,x24,80002ad8 + 80002ac4: 6fc082ef jal x5,8000b1c0 + 80002ac8: 80002ab8 .word 0x80002ab8 + 80002acc: 00000000 .word 0x00000000 + 80002ad0: 80016faf .word 0x80016faf + 80002ad4: 00000000 .word 0x00000000 + 80002ad8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002adc: 0008b103 ld x2,0(x17) + 80002ae0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000000 + 80002ae4: 0008be03 ld x28,0(x17) + 80002ae8: 00888893 addi x17,x17,8 + +0000000080002aec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + sm4ed x10, x2, x28, 3 # perform operation + 80002aec: f1c10533 sm4ed x10,x2,x28,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af0: 0007b203 ld x4,0(x15) + 80002af4: 00a20c63 beq x4,x10,80002b0c + 80002af8: 6c8082ef jal x5,8000b1c0 + 80002afc: 80002aec .word 0x80002aec + 80002b00: 00000000 .word 0x00000000 + 80002b04: 80017019 .word 0x80017019 + 80002b08: 00000000 .word 0x00000000 + 80002b0c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002b10: 0008ba03 ld x20,0(x17) + 80002b14: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000000000001 + 80002b18: 0008b583 ld x11,0(x17) + 80002b1c: 00888893 addi x17,x17,8 + +0000000080002b20 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + sm4ed x27, x20, x11, 2 # perform operation + 80002b20: b0ba0db3 sm4ed x27,x20,x11,0x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b24: 0007b203 ld x4,0(x15) + 80002b28: 01b20c63 beq x4,x27,80002b40 + 80002b2c: 694082ef jal x5,8000b1c0 + 80002b30: 80002b20 .word 0x80002b20 + 80002b34: 00000000 .word 0x00000000 + 80002b38: 8001707b .word 0x8001707b + 80002b3c: 00000000 .word 0x00000000 + 80002b40: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002b44: 0008bf03 ld x30,0(x17) + 80002b48: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000000000002 + 80002b4c: 0008bf83 ld x31,0(x17) + 80002b50: 00888893 addi x17,x17,8 + +0000000080002b54 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + sm4ed x22, x30, x31, 0 # perform operation + 80002b54: 31ff0b33 sm4ed x22,x30,x31,0x0 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b58: 0007b203 ld x4,0(x15) + 80002b5c: 01620c63 beq x4,x22,80002b74 + 80002b60: 660082ef jal x5,8000b1c0 + 80002b64: 80002b54 .word 0x80002b54 + 80002b68: 00000000 .word 0x00000000 + 80002b6c: 800170dd .word 0x800170dd + 80002b70: 00000000 .word 0x00000000 + 80002b74: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x7fffffffffffffff + 80002b78: 0008b683 ld x13,0(x17) + 80002b7c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x8000000000000000 + 80002b80: 0008b083 ld x1,0(x17) + 80002b84: 00888893 addi x17,x17,8 + +0000000080002b88 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + sm4ed x24, x13, x1, 0 # perform operation + 80002b88: 30168c33 sm4ed x24,x13,x1,0x0 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b8c: 0007b203 ld x4,0(x15) + 80002b90: 01820c63 beq x4,x24,80002ba8 + 80002b94: 62c082ef jal x5,8000b1c0 + 80002b98: 80002b88 .word 0x80002b88 + 80002b9c: 00000000 .word 0x00000000 + 80002ba0: 8001713f .word 0x8001713f + 80002ba4: 00000000 .word 0x00000000 + 80002ba8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002bac: 0008bc03 ld x24,0(x17) + 80002bb0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x8000000000000001 + 80002bb4: 0008b303 ld x6,0(x17) + 80002bb8: 00888893 addi x17,x17,8 + +0000000080002bbc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + sm4ed x3, x24, x6, 2 # perform operation + 80002bbc: b06c01b3 sm4ed x3,x24,x6,0x2 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc0: 0007b203 ld x4,0(x15) + 80002bc4: 00320c63 beq x4,x3,80002bdc + 80002bc8: 5f8082ef jal x5,8000b1c0 + 80002bcc: 80002bbc .word 0x80002bbc + 80002bd0: 00000000 .word 0x00000000 + 80002bd4: 800171b0 .word 0x800171b0 + 80002bd8: 00000000 .word 0x00000000 + 80002bdc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002be0: 0008b383 ld x7,0(x17) + 80002be4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x7fffffffffffffff + 80002be8: 0008b603 ld x12,0(x17) + 80002bec: 00888893 addi x17,x17,8 + +0000000080002bf0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + sm4ed x29, x7, x12, 0 # perform operation + 80002bf0: 30c38eb3 sm4ed x29,x7,x12,0x0 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf4: 0007b203 ld x4,0(x15) + 80002bf8: 01d20c63 beq x4,x29,80002c10 + 80002bfc: 5c4082ef jal x5,8000b1c0 + 80002c00: 80002bf0 .word 0x80002bf0 + 80002c04: 00000000 .word 0x00000000 + 80002c08: 80017221 .word 0x80017221 + 80002c0c: 00000000 .word 0x00000000 + 80002c10: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002c14: 0008bf83 ld x31,0(x17) + 80002c18: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x7ffffffffffffffe + 80002c1c: 0008ba03 ld x20,0(x17) + 80002c20: 00888893 addi x17,x17,8 + +0000000080002c24 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + sm4ed x22, x31, x20, 3 # perform operation + 80002c24: f14f8b33 sm4ed x22,x31,x20,0x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c28: 0007b203 ld x4,0(x15) + 80002c2c: 01620c63 beq x4,x22,80002c44 + 80002c30: 590082ef jal x5,8000b1c0 + 80002c34: 80002c24 .word 0x80002c24 + 80002c38: 00000000 .word 0x00000000 + 80002c3c: 80017292 .word 0x80017292 + 80002c40: 00000000 .word 0x00000000 + 80002c44: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002c48: 0008b983 ld x19,0(x17) + 80002c4c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0xffffffffffffffff + 80002c50: 0008b103 ld x2,0(x17) + 80002c54: 00888893 addi x17,x17,8 + +0000000080002c58 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + sm4ed x20, x19, x2, 0 # perform operation + 80002c58: 30298a33 sm4ed x20,x19,x2,0x0 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c5c: 0007b203 ld x4,0(x15) + 80002c60: 01420c63 beq x4,x20,80002c78 + 80002c64: 55c082ef jal x5,8000b1c0 + 80002c68: 80002c58 .word 0x80002c58 + 80002c6c: 00000000 .word 0x00000000 + 80002c70: 80017303 .word 0x80017303 + 80002c74: 00000000 .word 0x00000000 + 80002c78: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x7fffffffffffffff + 80002c7c: 0008b383 ld x7,0(x17) + 80002c80: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xfffffffffffffffe + 80002c84: 0008b683 ld x13,0(x17) + 80002c88: 00888893 addi x17,x17,8 + +0000000080002c8c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + sm4ed x2, x7, x13, 1 # perform operation + 80002c8c: 70d38133 sm4ed x2,x7,x13,0x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c90: 0007b203 ld x4,0(x15) + 80002c94: 00220c63 beq x4,x2,80002cac + 80002c98: 528082ef jal x5,8000b1c0 + 80002c9c: 80002c8c .word 0x80002c8c + 80002ca0: 00000000 .word 0x00000000 + 80002ca4: 80017374 .word 0x80017374 + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002cb0: 0008b483 ld x9,0(x17) + 80002cb4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80002cb8: 0008b703 ld x14,0(x17) + 80002cbc: 00888893 addi x17,x17,8 + +0000000080002cc0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + sm4ed x13, x9, x14, 2 # perform operation + 80002cc0: b0e486b3 sm4ed x13,x9,x14,0x2 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc4: 0007b203 ld x4,0(x15) + 80002cc8: 00d20c63 beq x4,x13,80002ce0 + 80002ccc: 4f4082ef jal x5,8000b1c0 + 80002cd0: 80002cc0 .word 0x80002cc0 + 80002cd4: 00000000 .word 0x00000000 + 80002cd8: 800173e5 .word 0x800173e5 + 80002cdc: 00000000 .word 0x00000000 + 80002ce0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7fffffffffffffff + 80002ce4: 0008b583 ld x11,0(x17) + 80002ce8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 80002cec: 0008bd83 ld x27,0(x17) + 80002cf0: 00888893 addi x17,x17,8 + +0000000080002cf4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x20, x11, x27, 2 # perform operation + 80002cf4: b1b58a33 sm4ed x20,x11,x27,0x2 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cf8: 0007b203 ld x4,0(x15) + 80002cfc: 01420c63 beq x4,x20,80002d14 + 80002d00: 4c0082ef jal x5,8000b1c0 + 80002d04: 80002cf4 .word 0x80002cf4 + 80002d08: 00000000 .word 0x00000000 + 80002d0c: 80017456 .word 0x80017456 + 80002d10: 00000000 .word 0x00000000 + 80002d14: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002d18: 0008b803 ld x16,0(x17) + 80002d1c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x5555555555555555 + 80002d20: 0008bb83 ld x23,0(x17) + 80002d24: 00888893 addi x17,x17,8 + +0000000080002d28 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + sm4ed x31, x16, x23, 0 # perform operation + 80002d28: 31780fb3 sm4ed x31,x16,x23,0x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d2c: 0007b203 ld x4,0(x15) + 80002d30: 01f20c63 beq x4,x31,80002d48 + 80002d34: 48c082ef jal x5,8000b1c0 + 80002d38: 80002d28 .word 0x80002d28 + 80002d3c: 00000000 .word 0x00000000 + 80002d40: 800174c7 .word 0x800174c7 + 80002d44: 00000000 .word 0x00000000 + 80002d48: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002d4c: 0008b703 ld x14,0(x17) + 80002d50: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x00000000ffffffff + 80002d54: 0008bc83 ld x25,0(x17) + 80002d58: 00888893 addi x17,x17,8 + +0000000080002d5c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + sm4ed x24, x14, x25, 2 # perform operation + 80002d5c: b1970c33 sm4ed x24,x14,x25,0x2 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d60: 0007b203 ld x4,0(x15) + 80002d64: 01820c63 beq x4,x24,80002d7c + 80002d68: 458082ef jal x5,8000b1c0 + 80002d6c: 80002d5c .word 0x80002d5c + 80002d70: 00000000 .word 0x00000000 + 80002d74: 80017538 .word 0x80017538 + 80002d78: 00000000 .word 0x00000000 + 80002d7c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7fffffffffffffff + 80002d80: 0008b983 ld x19,0(x17) + 80002d84: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x00000000fffffffe + 80002d88: 0008be83 ld x29,0(x17) + 80002d8c: 00888893 addi x17,x17,8 + +0000000080002d90 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + sm4ed x21, x19, x29, 0 # perform operation + 80002d90: 31d98ab3 sm4ed x21,x19,x29,0x0 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d94: 0007b203 ld x4,0(x15) + 80002d98: 01520c63 beq x4,x21,80002db0 + 80002d9c: 424082ef jal x5,8000b1c0 + 80002da0: 80002d90 .word 0x80002d90 + 80002da4: 00000000 .word 0x00000000 + 80002da8: 800175a1 .word 0x800175a1 + 80002dac: 00000000 .word 0x00000000 + 80002db0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002db4: 0008b083 ld x1,0(x17) + 80002db8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x0000000100000000 + 80002dbc: 0008b403 ld x8,0(x17) + 80002dc0: 00888893 addi x17,x17,8 + +0000000080002dc4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + sm4ed x31, x1, x8, 1 # perform operation + 80002dc4: 70808fb3 sm4ed x31,x1,x8,0x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dc8: 0007b203 ld x4,0(x15) + 80002dcc: 01f20c63 beq x4,x31,80002de4 + 80002dd0: 3f0082ef jal x5,8000b1c0 + 80002dd4: 80002dc4 .word 0x80002dc4 + 80002dd8: 00000000 .word 0x00000000 + 80002ddc: 8001760a .word 0x8001760a + 80002de0: 00000000 .word 0x00000000 + 80002de4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002de8: 0008bc03 ld x24,0(x17) + 80002dec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000100000001 + 80002df0: 0008b983 ld x19,0(x17) + 80002df4: 00888893 addi x17,x17,8 + +0000000080002df8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + sm4ed x11, x24, x19, 2 # perform operation + 80002df8: b13c05b3 sm4ed x11,x24,x19,0x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002dfc: 0007b203 ld x4,0(x15) + 80002e00: 00b20c63 beq x4,x11,80002e18 + 80002e04: 3bc082ef jal x5,8000b1c0 + 80002e08: 80002df8 .word 0x80002df8 + 80002e0c: 00000000 .word 0x00000000 + 80002e10: 80017674 .word 0x80017674 + 80002e14: 00000000 .word 0x00000000 + 80002e18: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x7ffffffffffffffe + 80002e1c: 0008ba03 ld x20,0(x17) + 80002e20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000000000000 + 80002e24: 0008b803 ld x16,0(x17) + 80002e28: 00888893 addi x17,x17,8 + +0000000080002e2c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + sm4ed x25, x20, x16, 1 # perform operation + 80002e2c: 710a0cb3 sm4ed x25,x20,x16,0x1 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e30: 0007b203 ld x4,0(x15) + 80002e34: 01920c63 beq x4,x25,80002e4c + 80002e38: 388082ef jal x5,8000b1c0 + 80002e3c: 80002e2c .word 0x80002e2c + 80002e40: 00000000 .word 0x00000000 + 80002e44: 800176de .word 0x800176de + 80002e48: 00000000 .word 0x00000000 + 80002e4c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x7ffffffffffffffe + 80002e50: 0008bc83 ld x25,0(x17) + 80002e54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x0000000000000001 + 80002e58: 0008b983 ld x19,0(x17) + 80002e5c: 00888893 addi x17,x17,8 + +0000000080002e60 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + sm4ed x20, x25, x19, 3 # perform operation + 80002e60: f13c8a33 sm4ed x20,x25,x19,0x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e64: 0007b203 ld x4,0(x15) + 80002e68: 01420c63 beq x4,x20,80002e80 + 80002e6c: 354082ef jal x5,8000b1c0 + 80002e70: 80002e60 .word 0x80002e60 + 80002e74: 00000000 .word 0x00000000 + 80002e78: 80017740 .word 0x80017740 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x7ffffffffffffffe + 80002e84: 0008b983 ld x19,0(x17) + 80002e88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000002 + 80002e8c: 0008be83 ld x29,0(x17) + 80002e90: 00888893 addi x17,x17,8 + +0000000080002e94 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + sm4ed x2, x19, x29, 2 # perform operation + 80002e94: b1d98133 sm4ed x2,x19,x29,0x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e98: 0007b203 ld x4,0(x15) + 80002e9c: 00220c63 beq x4,x2,80002eb4 + 80002ea0: 320082ef jal x5,8000b1c0 + 80002ea4: 80002e94 .word 0x80002e94 + 80002ea8: 00000000 .word 0x00000000 + 80002eac: 800177a2 .word 0x800177a2 + 80002eb0: 00000000 .word 0x00000000 + 80002eb4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80002eb8: 0008b183 ld x3,0(x17) + 80002ebc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000000 + 80002ec0: 0008b483 ld x9,0(x17) + 80002ec4: 00888893 addi x17,x17,8 + +0000000080002ec8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + sm4ed x21, x3, x9, 2 # perform operation + 80002ec8: b0918ab3 sm4ed x21,x3,x9,0x2 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ecc: 0007b203 ld x4,0(x15) + 80002ed0: 01520c63 beq x4,x21,80002ee8 + 80002ed4: 2ec082ef jal x5,8000b1c0 + 80002ed8: 80002ec8 .word 0x80002ec8 + 80002edc: 00000000 .word 0x00000000 + 80002ee0: 80017804 .word 0x80017804 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002eec: 0008b103 ld x2,0(x17) + 80002ef0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x8000000000000001 + 80002ef4: 0008b383 ld x7,0(x17) + 80002ef8: 00888893 addi x17,x17,8 + +0000000080002efc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + sm4ed x26, x2, x7, 0 # perform operation + 80002efc: 30710d33 sm4ed x26,x2,x7,0x0 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f00: 0007b203 ld x4,0(x15) + 80002f04: 01a20c63 beq x4,x26,80002f1c + 80002f08: 2b8082ef jal x5,8000b1c0 + 80002f0c: 80002efc .word 0x80002efc + 80002f10: 00000000 .word 0x00000000 + 80002f14: 80017875 .word 0x80017875 + 80002f18: 00000000 .word 0x00000000 + 80002f1c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80002f20: 0008b603 ld x12,0(x17) + 80002f24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002f28: 0008b903 ld x18,0(x17) + 80002f2c: 00888893 addi x17,x17,8 + +0000000080002f30 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + sm4ed x10, x12, x18, 3 # perform operation + 80002f30: f1260533 sm4ed x10,x12,x18,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f34: 0007b203 ld x4,0(x15) + 80002f38: 00a20c63 beq x4,x10,80002f50 + 80002f3c: 284082ef jal x5,8000b1c0 + 80002f40: 80002f30 .word 0x80002f30 + 80002f44: 00000000 .word 0x00000000 + 80002f48: 800178e6 .word 0x800178e6 + 80002f4c: 00000000 .word 0x00000000 + 80002f50: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002f54: 0008bf83 ld x31,0(x17) + 80002f58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x7ffffffffffffffe + 80002f5c: 0008b703 ld x14,0(x17) + 80002f60: 00888893 addi x17,x17,8 + +0000000080002f64 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + sm4ed x20, x31, x14, 3 # perform operation + 80002f64: f0ef8a33 sm4ed x20,x31,x14,0x3 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f68: 0007b203 ld x4,0(x15) + 80002f6c: 01420c63 beq x4,x20,80002f84 + 80002f70: 250082ef jal x5,8000b1c0 + 80002f74: 80002f64 .word 0x80002f64 + 80002f78: 00000000 .word 0x00000000 + 80002f7c: 80017957 .word 0x80017957 + 80002f80: 00000000 .word 0x00000000 + 80002f84: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x7ffffffffffffffe + 80002f88: 0008ba83 ld x21,0(x17) + 80002f8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xffffffffffffffff + 80002f90: 0008b703 ld x14,0(x17) + 80002f94: 00888893 addi x17,x17,8 + +0000000080002f98 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + sm4ed x10, x21, x14, 3 # perform operation + 80002f98: f0ea8533 sm4ed x10,x21,x14,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f9c: 0007b203 ld x4,0(x15) + 80002fa0: 00a20c63 beq x4,x10,80002fb8 + 80002fa4: 21c082ef jal x5,8000b1c0 + 80002fa8: 80002f98 .word 0x80002f98 + 80002fac: 00000000 .word 0x00000000 + 80002fb0: 800179c8 .word 0x800179c8 + 80002fb4: 00000000 .word 0x00000000 + 80002fb8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002fbc: 0008be03 ld x28,0(x17) + 80002fc0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0xfffffffffffffffe + 80002fc4: 0008ba83 ld x21,0(x17) + 80002fc8: 00888893 addi x17,x17,8 + +0000000080002fcc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + sm4ed x7, x28, x21, 0 # perform operation + 80002fcc: 315e03b3 sm4ed x7,x28,x21,0x0 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd0: 0007b203 ld x4,0(x15) + 80002fd4: 00720c63 beq x4,x7,80002fec + 80002fd8: 1e8082ef jal x5,8000b1c0 + 80002fdc: 80002fcc .word 0x80002fcc + 80002fe0: 00000000 .word 0x00000000 + 80002fe4: 80017a39 .word 0x80017a39 + 80002fe8: 00000000 .word 0x00000000 + 80002fec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x7ffffffffffffffe + 80002ff0: 0008b903 ld x18,0(x17) + 80002ff4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80002ff8: 0008b583 ld x11,0(x17) + 80002ffc: 00888893 addi x17,x17,8 + +0000000080003000 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + sm4ed x31, x18, x11, 0 # perform operation + 80003000: 30b90fb3 sm4ed x31,x18,x11,0x0 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003004: 0007b203 ld x4,0(x15) + 80003008: 01f20c63 beq x4,x31,80003020 + 8000300c: 1b4082ef jal x5,8000b1c0 + 80003010: 80003000 .word 0x80003000 + 80003014: 00000000 .word 0x00000000 + 80003018: 80017aaa .word 0x80017aaa + 8000301c: 00000000 .word 0x00000000 + 80003020: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7ffffffffffffffe + 80003024: 0008b183 ld x3,0(x17) + 80003028: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 8000302c: 0008bc03 ld x24,0(x17) + 80003030: 00888893 addi x17,x17,8 + +0000000080003034 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x25, x3, x24, 2 # perform operation + 80003034: b1818cb3 sm4ed x25,x3,x24,0x2 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003038: 0007b203 ld x4,0(x15) + 8000303c: 01920c63 beq x4,x25,80003054 + 80003040: 180082ef jal x5,8000b1c0 + 80003044: 80003034 .word 0x80003034 + 80003048: 00000000 .word 0x00000000 + 8000304c: 80017b1b .word 0x80017b1b + 80003050: 00000000 .word 0x00000000 + 80003054: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80003058: 0008bb83 ld x23,0(x17) + 8000305c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x5555555555555555 + 80003060: 0008bf03 ld x30,0(x17) + 80003064: 00888893 addi x17,x17,8 + +0000000080003068 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + sm4ed x9, x23, x30, 0 # perform operation + 80003068: 31eb84b3 sm4ed x9,x23,x30,0x0 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 8000306c: 0007b203 ld x4,0(x15) + 80003070: 00920c63 beq x4,x9,80003088 + 80003074: 14c082ef jal x5,8000b1c0 + 80003078: 80003068 .word 0x80003068 + 8000307c: 00000000 .word 0x00000000 + 80003080: 80017b8c .word 0x80017b8c + 80003084: 00000000 .word 0x00000000 + 80003088: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x7ffffffffffffffe + 8000308c: 0008b183 ld x3,0(x17) + 80003090: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x00000000ffffffff + 80003094: 0008bf83 ld x31,0(x17) + 80003098: 00888893 addi x17,x17,8 + +000000008000309c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + sm4ed x10, x3, x31, 3 # perform operation + 8000309c: f1f18533 sm4ed x10,x3,x31,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a0: 0007b203 ld x4,0(x15) + 800030a4: 00a20c63 beq x4,x10,800030bc + 800030a8: 118082ef jal x5,8000b1c0 + 800030ac: 8000309c .word 0x8000309c + 800030b0: 00000000 .word 0x00000000 + 800030b4: 80017bfd .word 0x80017bfd + 800030b8: 00000000 .word 0x00000000 + 800030bc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x7ffffffffffffffe + 800030c0: 0008b583 ld x11,0(x17) + 800030c4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x00000000fffffffe + 800030c8: 0008b983 ld x19,0(x17) + 800030cc: 00888893 addi x17,x17,8 + +00000000800030d0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + sm4ed x25, x11, x19, 1 # perform operation + 800030d0: 71358cb3 sm4ed x25,x11,x19,0x1 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d4: 0007b203 ld x4,0(x15) + 800030d8: 01920c63 beq x4,x25,800030f0 + 800030dc: 0e4082ef jal x5,8000b1c0 + 800030e0: 800030d0 .word 0x800030d0 + 800030e4: 00000000 .word 0x00000000 + 800030e8: 80017c66 .word 0x80017c66 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x7ffffffffffffffe + 800030f4: 0008bf83 ld x31,0(x17) + 800030f8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0000000100000000 + 800030fc: 0008b483 ld x9,0(x17) + 80003100: 00888893 addi x17,x17,8 + +0000000080003104 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + sm4ed x3, x31, x9, 1 # perform operation + 80003104: 709f81b3 sm4ed x3,x31,x9,0x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003108: 0007b203 ld x4,0(x15) + 8000310c: 00320c63 beq x4,x3,80003124 + 80003110: 0b0082ef jal x5,8000b1c0 + 80003114: 80003104 .word 0x80003104 + 80003118: 00000000 .word 0x00000000 + 8000311c: 80017ccf .word 0x80017ccf + 80003120: 00000000 .word 0x00000000 + 80003124: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x7ffffffffffffffe + 80003128: 0008b383 ld x7,0(x17) + 8000312c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000100000001 + 80003130: 0008b903 ld x18,0(x17) + 80003134: 00888893 addi x17,x17,8 + +0000000080003138 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + sm4ed x25, x7, x18, 3 # perform operation + 80003138: f1238cb3 sm4ed x25,x7,x18,0x3 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 8000313c: 0007b203 ld x4,0(x15) + 80003140: 01920c63 beq x4,x25,80003158 + 80003144: 07c082ef jal x5,8000b1c0 + 80003148: 80003138 .word 0x80003138 + 8000314c: 00000000 .word 0x00000000 + 80003150: 80017d39 .word 0x80017d39 + 80003154: 00000000 .word 0x00000000 + 80003158: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xffffffffffffffff + 8000315c: 0008b703 ld x14,0(x17) + 80003160: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x0000000000000000 + 80003164: 0008bc83 ld x25,0(x17) + 80003168: 00888893 addi x17,x17,8 + +000000008000316c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + sm4ed x28, x14, x25, 2 # perform operation + 8000316c: b1970e33 sm4ed x28,x14,x25,0x2 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003170: 0007b203 ld x4,0(x15) + 80003174: 01c20c63 beq x4,x28,8000318c + 80003178: 048082ef jal x5,8000b1c0 + 8000317c: 8000316c .word 0x8000316c + 80003180: 00000000 .word 0x00000000 + 80003184: 80017da3 .word 0x80017da3 + 80003188: 00000000 .word 0x00000000 + 8000318c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0xffffffffffffffff + 80003190: 0008b103 ld x2,0(x17) + 80003194: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000000000001 + 80003198: 0008b183 ld x3,0(x17) + 8000319c: 00888893 addi x17,x17,8 + +00000000800031a0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + sm4ed x24, x2, x3, 1 # perform operation + 800031a0: 70310c33 sm4ed x24,x2,x3,0x1 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a4: 0007b203 ld x4,0(x15) + 800031a8: 01820c63 beq x4,x24,800031c0 + 800031ac: 014082ef jal x5,8000b1c0 + 800031b0: 800031a0 .word 0x800031a0 + 800031b4: 00000000 .word 0x00000000 + 800031b8: 80017e05 .word 0x80017e05 + 800031bc: 00000000 .word 0x00000000 + 800031c0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0xffffffffffffffff + 800031c4: 0008b483 ld x9,0(x17) + 800031c8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000000000002 + 800031cc: 0008b583 ld x11,0(x17) + 800031d0: 00888893 addi x17,x17,8 + +00000000800031d4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + sm4ed x30, x9, x11, 2 # perform operation + 800031d4: b0b48f33 sm4ed x30,x9,x11,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031d8: 0007b203 ld x4,0(x15) + 800031dc: 01e20c63 beq x4,x30,800031f4 + 800031e0: 7e1072ef jal x5,8000b1c0 + 800031e4: 800031d4 .word 0x800031d4 + 800031e8: 00000000 .word 0x00000000 + 800031ec: 80017e67 .word 0x80017e67 + 800031f0: 00000000 .word 0x00000000 + 800031f4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xffffffffffffffff + 800031f8: 0008be83 ld x29,0(x17) + 800031fc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x8000000000000000 + 80003200: 0008b383 ld x7,0(x17) + 80003204: 00888893 addi x17,x17,8 + +0000000080003208 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + sm4ed x21, x29, x7, 1 # perform operation + 80003208: 707e8ab3 sm4ed x21,x29,x7,0x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 8000320c: 0007b203 ld x4,0(x15) + 80003210: 01520c63 beq x4,x21,80003228 + 80003214: 7ad072ef jal x5,8000b1c0 + 80003218: 80003208 .word 0x80003208 + 8000321c: 00000000 .word 0x00000000 + 80003220: 80017ec9 .word 0x80017ec9 + 80003224: 00000000 .word 0x00000000 + 80003228: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xffffffffffffffff + 8000322c: 0008bd03 ld x26,0(x17) + 80003230: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x8000000000000001 + 80003234: 0008b703 ld x14,0(x17) + 80003238: 00888893 addi x17,x17,8 + +000000008000323c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + sm4ed x18, x26, x14, 3 # perform operation + 8000323c: f0ed0933 sm4ed x18,x26,x14,0x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003240: 0007b203 ld x4,0(x15) + 80003244: 01220c63 beq x4,x18,8000325c + 80003248: 779072ef jal x5,8000b1c0 + 8000324c: 8000323c .word 0x8000323c + 80003250: 00000000 .word 0x00000000 + 80003254: 80017f3a .word 0x80017f3a + 80003258: 00000000 .word 0x00000000 + 8000325c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xffffffffffffffff + 80003260: 0008b703 ld x14,0(x17) + 80003264: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x7fffffffffffffff + 80003268: 0008ba83 ld x21,0(x17) + 8000326c: 00888893 addi x17,x17,8 + +0000000080003270 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + sm4ed x26, x14, x21, 2 # perform operation + 80003270: b1570d33 sm4ed x26,x14,x21,0x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003274: 0007b203 ld x4,0(x15) + 80003278: 01a20c63 beq x4,x26,80003290 + 8000327c: 745072ef jal x5,8000b1c0 + 80003280: 80003270 .word 0x80003270 + 80003284: 00000000 .word 0x00000000 + 80003288: 80017fab .word 0x80017fab + 8000328c: 00000000 .word 0x00000000 + 80003290: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xffffffffffffffff + 80003294: 0008bd83 ld x27,0(x17) + 80003298: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x7ffffffffffffffe + 8000329c: 0008ba03 ld x20,0(x17) + 800032a0: 00888893 addi x17,x17,8 + +00000000800032a4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + sm4ed x22, x27, x20, 0 # perform operation + 800032a4: 314d8b33 sm4ed x22,x27,x20,0x0 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032a8: 0007b203 ld x4,0(x15) + 800032ac: 01620c63 beq x4,x22,800032c4 + 800032b0: 711072ef jal x5,8000b1c0 + 800032b4: 800032a4 .word 0x800032a4 + 800032b8: 00000000 .word 0x00000000 + 800032bc: 8001801c .word 0x8001801c + 800032c0: 00000000 .word 0x00000000 + 800032c4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xffffffffffffffff + 800032c8: 0008be83 ld x29,0(x17) + 800032cc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0xffffffffffffffff + 800032d0: 0008bf03 ld x30,0(x17) + 800032d4: 00888893 addi x17,x17,8 + +00000000800032d8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + sm4ed x3, x29, x30, 0 # perform operation + 800032d8: 31ee81b3 sm4ed x3,x29,x30,0x0 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032dc: 0007b203 ld x4,0(x15) + 800032e0: 00320c63 beq x4,x3,800032f8 + 800032e4: 6dd072ef jal x5,8000b1c0 + 800032e8: 800032d8 .word 0x800032d8 + 800032ec: 00000000 .word 0x00000000 + 800032f0: 8001808d .word 0x8001808d + 800032f4: 00000000 .word 0x00000000 + 800032f8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0xffffffffffffffff + 800032fc: 0008bf03 ld x30,0(x17) + 80003300: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xfffffffffffffffe + 80003304: 0008b503 ld x10,0(x17) + 80003308: 00888893 addi x17,x17,8 + +000000008000330c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + sm4ed x16, x30, x10, 3 # perform operation + 8000330c: f0af0833 sm4ed x16,x30,x10,0x3 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003310: 0007b203 ld x4,0(x15) + 80003314: 01020c63 beq x4,x16,8000332c + 80003318: 6a9072ef jal x5,8000b1c0 + 8000331c: 8000330c .word 0x8000330c + 80003320: 00000000 .word 0x00000000 + 80003324: 800180fe .word 0x800180fe + 80003328: 00000000 .word 0x00000000 + 8000332c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xffffffffffffffff + 80003330: 0008bb03 ld x22,0(x17) + 80003334: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80003338: 0008b983 ld x19,0(x17) + 8000333c: 00888893 addi x17,x17,8 + +0000000080003340 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + sm4ed x10, x22, x19, 0 # perform operation + 80003340: 313b0533 sm4ed x10,x22,x19,0x0 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003344: 0007b203 ld x4,0(x15) + 80003348: 00a20c63 beq x4,x10,80003360 + 8000334c: 675072ef jal x5,8000b1c0 + 80003350: 80003340 .word 0x80003340 + 80003354: 00000000 .word 0x00000000 + 80003358: 8001816f .word 0x8001816f + 8000335c: 00000000 .word 0x00000000 + 80003360: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xffffffffffffffff + 80003364: 0008b303 ld x6,0(x17) + 80003368: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 8000336c: 0008bb03 ld x22,0(x17) + 80003370: 00888893 addi x17,x17,8 + +0000000080003374 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x11, x6, x22, 3 # perform operation + 80003374: f16305b3 sm4ed x11,x6,x22,0x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003378: 0007b203 ld x4,0(x15) + 8000337c: 00b20c63 beq x4,x11,80003394 + 80003380: 641072ef jal x5,8000b1c0 + 80003384: 80003374 .word 0x80003374 + 80003388: 00000000 .word 0x00000000 + 8000338c: 800181e0 .word 0x800181e0 + 80003390: 00000000 .word 0x00000000 + 80003394: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xffffffffffffffff + 80003398: 0008b683 ld x13,0(x17) + 8000339c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x5555555555555555 + 800033a0: 0008b803 ld x16,0(x17) + 800033a4: 00888893 addi x17,x17,8 + +00000000800033a8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + sm4ed x27, x13, x16, 0 # perform operation + 800033a8: 31068db3 sm4ed x27,x13,x16,0x0 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033ac: 0007b203 ld x4,0(x15) + 800033b0: 01b20c63 beq x4,x27,800033c8 + 800033b4: 60d072ef jal x5,8000b1c0 + 800033b8: 800033a8 .word 0x800033a8 + 800033bc: 00000000 .word 0x00000000 + 800033c0: 80018251 .word 0x80018251 + 800033c4: 00000000 .word 0x00000000 + 800033c8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0xffffffffffffffff + 800033cc: 0008bd83 ld x27,0(x17) + 800033d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x00000000ffffffff + 800033d4: 0008bd03 ld x26,0(x17) + 800033d8: 00888893 addi x17,x17,8 + +00000000800033dc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + sm4ed x10, x27, x26, 3 # perform operation + 800033dc: f1ad8533 sm4ed x10,x27,x26,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e0: 0007b203 ld x4,0(x15) + 800033e4: 00a20c63 beq x4,x10,800033fc + 800033e8: 5d9072ef jal x5,8000b1c0 + 800033ec: 800033dc .word 0x800033dc + 800033f0: 00000000 .word 0x00000000 + 800033f4: 800182c2 .word 0x800182c2 + 800033f8: 00000000 .word 0x00000000 + 800033fc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xffffffffffffffff + 80003400: 0008bb03 ld x22,0(x17) + 80003404: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x00000000fffffffe + 80003408: 0008b603 ld x12,0(x17) + 8000340c: 00888893 addi x17,x17,8 + +0000000080003410 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + sm4ed x16, x22, x12, 3 # perform operation + 80003410: f0cb0833 sm4ed x16,x22,x12,0x3 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003414: 0007b203 ld x4,0(x15) + 80003418: 01020c63 beq x4,x16,80003430 + 8000341c: 5a5072ef jal x5,8000b1c0 + 80003420: 80003410 .word 0x80003410 + 80003424: 00000000 .word 0x00000000 + 80003428: 8001832b .word 0x8001832b + 8000342c: 00000000 .word 0x00000000 + 80003430: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xffffffffffffffff + 80003434: 0008ba03 ld x20,0(x17) + 80003438: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x0000000100000000 + 8000343c: 0008bf83 ld x31,0(x17) + 80003440: 00888893 addi x17,x17,8 + +0000000080003444 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + sm4ed x7, x20, x31, 1 # perform operation + 80003444: 71fa03b3 sm4ed x7,x20,x31,0x1 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003448: 0007b203 ld x4,0(x15) + 8000344c: 00720c63 beq x4,x7,80003464 + 80003450: 571072ef jal x5,8000b1c0 + 80003454: 80003444 .word 0x80003444 + 80003458: 00000000 .word 0x00000000 + 8000345c: 80018394 .word 0x80018394 + 80003460: 00000000 .word 0x00000000 + 80003464: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xffffffffffffffff + 80003468: 0008be83 ld x29,0(x17) + 8000346c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x0000000100000001 + 80003470: 0008bc03 ld x24,0(x17) + 80003474: 00888893 addi x17,x17,8 + +0000000080003478 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + sm4ed x3, x29, x24, 1 # perform operation + 80003478: 718e81b3 sm4ed x3,x29,x24,0x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 8000347c: 0007b203 ld x4,0(x15) + 80003480: 00320c63 beq x4,x3,80003498 + 80003484: 53d072ef jal x5,8000b1c0 + 80003488: 80003478 .word 0x80003478 + 8000348c: 00000000 .word 0x00000000 + 80003490: 800183fe .word 0x800183fe + 80003494: 00000000 .word 0x00000000 + 80003498: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xfffffffffffffffe + 8000349c: 0008b503 ld x10,0(x17) + 800034a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000000 + 800034a4: 0008ba03 ld x20,0(x17) + 800034a8: 00888893 addi x17,x17,8 + +00000000800034ac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + sm4ed x6, x10, x20, 0 # perform operation + 800034ac: 31450333 sm4ed x6,x10,x20,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b0: 0007b203 ld x4,0(x15) + 800034b4: 00620c63 beq x4,x6,800034cc + 800034b8: 509072ef jal x5,8000b1c0 + 800034bc: 800034ac .word 0x800034ac + 800034c0: 00000000 .word 0x00000000 + 800034c4: 80018468 .word 0x80018468 + 800034c8: 00000000 .word 0x00000000 + 800034cc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xfffffffffffffffe + 800034d0: 0008bf83 ld x31,0(x17) + 800034d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x0000000000000001 + 800034d8: 0008b503 ld x10,0(x17) + 800034dc: 00888893 addi x17,x17,8 + +00000000800034e0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + sm4ed x3, x31, x10, 1 # perform operation + 800034e0: 70af81b3 sm4ed x3,x31,x10,0x1 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e4: 0007b203 ld x4,0(x15) + 800034e8: 00320c63 beq x4,x3,80003500 + 800034ec: 4d5072ef jal x5,8000b1c0 + 800034f0: 800034e0 .word 0x800034e0 + 800034f4: 00000000 .word 0x00000000 + 800034f8: 800184ca .word 0x800184ca + 800034fc: 00000000 .word 0x00000000 + 80003500: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0xfffffffffffffffe + 80003504: 0008bd03 ld x26,0(x17) + 80003508: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x0000000000000002 + 8000350c: 0008ba83 ld x21,0(x17) + 80003510: 00888893 addi x17,x17,8 + +0000000080003514 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + sm4ed x22, x26, x21, 3 # perform operation + 80003514: f15d0b33 sm4ed x22,x26,x21,0x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003518: 0007b203 ld x4,0(x15) + 8000351c: 01620c63 beq x4,x22,80003534 + 80003520: 4a1072ef jal x5,8000b1c0 + 80003524: 80003514 .word 0x80003514 + 80003528: 00000000 .word 0x00000000 + 8000352c: 8001852c .word 0x8001852c + 80003530: 00000000 .word 0x00000000 + 80003534: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xfffffffffffffffe + 80003538: 0008b383 ld x7,0(x17) + 8000353c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x8000000000000000 + 80003540: 0008bc03 ld x24,0(x17) + 80003544: 00888893 addi x17,x17,8 + +0000000080003548 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + sm4ed x30, x7, x24, 2 # perform operation + 80003548: b1838f33 sm4ed x30,x7,x24,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 8000354c: 0007b203 ld x4,0(x15) + 80003550: 01e20c63 beq x4,x30,80003568 + 80003554: 46d072ef jal x5,8000b1c0 + 80003558: 80003548 .word 0x80003548 + 8000355c: 00000000 .word 0x00000000 + 80003560: 8001858e .word 0x8001858e + 80003564: 00000000 .word 0x00000000 + 80003568: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0xfffffffffffffffe + 8000356c: 0008bc83 ld x25,0(x17) + 80003570: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x8000000000000001 + 80003574: 0008b683 ld x13,0(x17) + 80003578: 00888893 addi x17,x17,8 + +000000008000357c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + sm4ed x12, x25, x13, 1 # perform operation + 8000357c: 70dc8633 sm4ed x12,x25,x13,0x1 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003580: 0007b203 ld x4,0(x15) + 80003584: 00c20c63 beq x4,x12,8000359c + 80003588: 439072ef jal x5,8000b1c0 + 8000358c: 8000357c .word 0x8000357c + 80003590: 00000000 .word 0x00000000 + 80003594: 800185ff .word 0x800185ff + 80003598: 00000000 .word 0x00000000 + 8000359c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xfffffffffffffffe + 800035a0: 0008bf83 ld x31,0(x17) + 800035a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7fffffffffffffff + 800035a8: 0008bd83 ld x27,0(x17) + 800035ac: 00888893 addi x17,x17,8 + +00000000800035b0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + sm4ed x6, x31, x27, 0 # perform operation + 800035b0: 31bf8333 sm4ed x6,x31,x27,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b4: 0007b203 ld x4,0(x15) + 800035b8: 00620c63 beq x4,x6,800035d0 + 800035bc: 405072ef jal x5,8000b1c0 + 800035c0: 800035b0 .word 0x800035b0 + 800035c4: 00000000 .word 0x00000000 + 800035c8: 80018670 .word 0x80018670 + 800035cc: 00000000 .word 0x00000000 + 800035d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xfffffffffffffffe + 800035d4: 0008b683 ld x13,0(x17) + 800035d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7ffffffffffffffe + 800035dc: 0008b903 ld x18,0(x17) + 800035e0: 00888893 addi x17,x17,8 + +00000000800035e4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + sm4ed x30, x13, x18, 2 # perform operation + 800035e4: b1268f33 sm4ed x30,x13,x18,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035e8: 0007b203 ld x4,0(x15) + 800035ec: 01e20c63 beq x4,x30,80003604 + 800035f0: 3d1072ef jal x5,8000b1c0 + 800035f4: 800035e4 .word 0x800035e4 + 800035f8: 00000000 .word 0x00000000 + 800035fc: 800186e1 .word 0x800186e1 + 80003600: 00000000 .word 0x00000000 + 80003604: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xfffffffffffffffe + 80003608: 0008be83 ld x29,0(x17) + 8000360c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xffffffffffffffff + 80003610: 0008b083 ld x1,0(x17) + 80003614: 00888893 addi x17,x17,8 + +0000000080003618 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + sm4ed x12, x29, x1, 2 # perform operation + 80003618: b01e8633 sm4ed x12,x29,x1,0x2 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 8000361c: 0007b203 ld x4,0(x15) + 80003620: 00c20c63 beq x4,x12,80003638 + 80003624: 39d072ef jal x5,8000b1c0 + 80003628: 80003618 .word 0x80003618 + 8000362c: 00000000 .word 0x00000000 + 80003630: 80018752 .word 0x80018752 + 80003634: 00000000 .word 0x00000000 + 80003638: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xfffffffffffffffe + 8000363c: 0008bb83 ld x23,0(x17) + 80003640: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xfffffffffffffffe + 80003644: 0008b703 ld x14,0(x17) + 80003648: 00888893 addi x17,x17,8 + +000000008000364c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + sm4ed x6, x23, x14, 2 # perform operation + 8000364c: b0eb8333 sm4ed x6,x23,x14,0x2 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003650: 0007b203 ld x4,0(x15) + 80003654: 00620c63 beq x4,x6,8000366c + 80003658: 369072ef jal x5,8000b1c0 + 8000365c: 8000364c .word 0x8000364c + 80003660: 00000000 .word 0x00000000 + 80003664: 800187c3 .word 0x800187c3 + 80003668: 00000000 .word 0x00000000 + 8000366c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xfffffffffffffffe + 80003670: 0008bb83 ld x23,0(x17) + 80003674: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x5bbc887763ae86f2 + 80003678: 0008bc83 ld x25,0(x17) + 8000367c: 00888893 addi x17,x17,8 + +0000000080003680 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + sm4ed x12, x23, x25, 3 # perform operation + 80003680: f19b8633 sm4ed x12,x23,x25,0x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003684: 0007b203 ld x4,0(x15) + 80003688: 00c20c63 beq x4,x12,800036a0 + 8000368c: 335072ef jal x5,8000b1c0 + 80003690: 80003680 .word 0x80003680 + 80003694: 00000000 .word 0x00000000 + 80003698: 80018834 .word 0x80018834 + 8000369c: 00000000 .word 0x00000000 + 800036a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0xfffffffffffffffe + 800036a4: 0008b703 ld x14,0(x17) + 800036a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800036ac: 0008b803 ld x16,0(x17) + 800036b0: 00888893 addi x17,x17,8 + +00000000800036b4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x11, x14, x16, 3 # perform operation + 800036b4: f10705b3 sm4ed x11,x14,x16,0x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036b8: 0007b203 ld x4,0(x15) + 800036bc: 00b20c63 beq x4,x11,800036d4 + 800036c0: 301072ef jal x5,8000b1c0 + 800036c4: 800036b4 .word 0x800036b4 + 800036c8: 00000000 .word 0x00000000 + 800036cc: 800188a5 .word 0x800188a5 + 800036d0: 00000000 .word 0x00000000 + 800036d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xfffffffffffffffe + 800036d8: 0008b803 ld x16,0(x17) + 800036dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x5555555555555555 + 800036e0: 0008b483 ld x9,0(x17) + 800036e4: 00888893 addi x17,x17,8 + +00000000800036e8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + sm4ed x23, x16, x9, 1 # perform operation + 800036e8: 70980bb3 sm4ed x23,x16,x9,0x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036ec: 0007b203 ld x4,0(x15) + 800036f0: 01720c63 beq x4,x23,80003708 + 800036f4: 2cd072ef jal x5,8000b1c0 + 800036f8: 800036e8 .word 0x800036e8 + 800036fc: 00000000 .word 0x00000000 + 80003700: 80018916 .word 0x80018916 + 80003704: 00000000 .word 0x00000000 + 80003708: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xfffffffffffffffe + 8000370c: 0008b503 ld x10,0(x17) + 80003710: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x00000000ffffffff + 80003714: 0008bc03 ld x24,0(x17) + 80003718: 00888893 addi x17,x17,8 + +000000008000371c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + sm4ed x22, x10, x24, 0 # perform operation + 8000371c: 31850b33 sm4ed x22,x10,x24,0x0 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003720: 0007b203 ld x4,0(x15) + 80003724: 01620c63 beq x4,x22,8000373c + 80003728: 299072ef jal x5,8000b1c0 + 8000372c: 8000371c .word 0x8000371c + 80003730: 00000000 .word 0x00000000 + 80003734: 80018987 .word 0x80018987 + 80003738: 00000000 .word 0x00000000 + 8000373c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xfffffffffffffffe + 80003740: 0008b083 ld x1,0(x17) + 80003744: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x00000000fffffffe + 80003748: 0008b383 ld x7,0(x17) + 8000374c: 00888893 addi x17,x17,8 + +0000000080003750 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + sm4ed x27, x1, x7, 1 # perform operation + 80003750: 70708db3 sm4ed x27,x1,x7,0x1 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003754: 0007b203 ld x4,0(x15) + 80003758: 01b20c63 beq x4,x27,80003770 + 8000375c: 265072ef jal x5,8000b1c0 + 80003760: 80003750 .word 0x80003750 + 80003764: 00000000 .word 0x00000000 + 80003768: 800189f0 .word 0x800189f0 + 8000376c: 00000000 .word 0x00000000 + 80003770: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xfffffffffffffffe + 80003774: 0008b603 ld x12,0(x17) + 80003778: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x0000000100000000 + 8000377c: 0008bf03 ld x30,0(x17) + 80003780: 00888893 addi x17,x17,8 + +0000000080003784 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + sm4ed x27, x12, x30, 2 # perform operation + 80003784: b1e60db3 sm4ed x27,x12,x30,0x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003788: 0007b203 ld x4,0(x15) + 8000378c: 01b20c63 beq x4,x27,800037a4 + 80003790: 231072ef jal x5,8000b1c0 + 80003794: 80003784 .word 0x80003784 + 80003798: 00000000 .word 0x00000000 + 8000379c: 80018a59 .word 0x80018a59 + 800037a0: 00000000 .word 0x00000000 + 800037a4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xfffffffffffffffe + 800037a8: 0008b983 ld x19,0(x17) + 800037ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000100000001 + 800037b0: 0008bd03 ld x26,0(x17) + 800037b4: 00888893 addi x17,x17,8 + +00000000800037b8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + sm4ed x22, x19, x26, 1 # perform operation + 800037b8: 71a98b33 sm4ed x22,x19,x26,0x1 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037bc: 0007b203 ld x4,0(x15) + 800037c0: 01620c63 beq x4,x22,800037d8 + 800037c4: 1fd072ef jal x5,8000b1c0 + 800037c8: 800037b8 .word 0x800037b8 + 800037cc: 00000000 .word 0x00000000 + 800037d0: 80018ac3 .word 0x80018ac3 + 800037d4: 00000000 .word 0x00000000 + 800037d8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 800037dc: 0008b703 ld x14,0(x17) + 800037e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000000000000 + 800037e4: 0008b803 ld x16,0(x17) + 800037e8: 00888893 addi x17,x17,8 + +00000000800037ec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + sm4ed x30, x14, x16, 3 # perform operation + 800037ec: f1070f33 sm4ed x30,x14,x16,0x3 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f0: 0007b203 ld x4,0(x15) + 800037f4: 01e20c63 beq x4,x30,8000380c + 800037f8: 1c9072ef jal x5,8000b1c0 + 800037fc: 800037ec .word 0x800037ec + 80003800: 00000000 .word 0x00000000 + 80003804: 80018b2d .word 0x80018b2d + 80003808: 00000000 .word 0x00000000 + 8000380c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x5bbc887763ae86f2 + 80003810: 0008b183 ld x3,0(x17) + 80003814: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000000000001 + 80003818: 0008b083 ld x1,0(x17) + 8000381c: 00888893 addi x17,x17,8 + +0000000080003820 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + sm4ed x7, x3, x1, 1 # perform operation + 80003820: 701183b3 sm4ed x7,x3,x1,0x1 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003824: 0007b203 ld x4,0(x15) + 80003828: 00720c63 beq x4,x7,80003840 + 8000382c: 195072ef jal x5,8000b1c0 + 80003830: 80003820 .word 0x80003820 + 80003834: 00000000 .word 0x00000000 + 80003838: 80018b8f .word 0x80018b8f + 8000383c: 00000000 .word 0x00000000 + 80003840: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003844: 0008bb03 ld x22,0(x17) + 80003848: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x0000000000000002 + 8000384c: 0008b703 ld x14,0(x17) + 80003850: 00888893 addi x17,x17,8 + +0000000080003854 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + sm4ed x23, x22, x14, 1 # perform operation + 80003854: 70eb0bb3 sm4ed x23,x22,x14,0x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003858: 0007b203 ld x4,0(x15) + 8000385c: 01720c63 beq x4,x23,80003874 + 80003860: 161072ef jal x5,8000b1c0 + 80003864: 80003854 .word 0x80003854 + 80003868: 00000000 .word 0x00000000 + 8000386c: 80018bf1 .word 0x80018bf1 + 80003870: 00000000 .word 0x00000000 + 80003874: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80003878: 0008b483 ld x9,0(x17) + 8000387c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x8000000000000000 + 80003880: 0008b983 ld x19,0(x17) + 80003884: 00888893 addi x17,x17,8 + +0000000080003888 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + sm4ed x1, x9, x19, 0 # perform operation + 80003888: 313480b3 sm4ed x1,x9,x19,0x0 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 8000388c: 0007b203 ld x4,0(x15) + 80003890: 00120c63 beq x4,x1,800038a8 + 80003894: 12d072ef jal x5,8000b1c0 + 80003898: 80003888 .word 0x80003888 + 8000389c: 00000000 .word 0x00000000 + 800038a0: 80018c53 .word 0x80018c53 + 800038a4: 00000000 .word 0x00000000 + 800038a8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x5bbc887763ae86f2 + 800038ac: 0008b703 ld x14,0(x17) + 800038b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x8000000000000001 + 800038b4: 0008bb03 ld x22,0(x17) + 800038b8: 00888893 addi x17,x17,8 + +00000000800038bc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + sm4ed x28, x14, x22, 3 # perform operation + 800038bc: f1670e33 sm4ed x28,x14,x22,0x3 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c0: 0007b203 ld x4,0(x15) + 800038c4: 01c20c63 beq x4,x28,800038dc + 800038c8: 0f9072ef jal x5,8000b1c0 + 800038cc: 800038bc .word 0x800038bc + 800038d0: 00000000 .word 0x00000000 + 800038d4: 80018cc4 .word 0x80018cc4 + 800038d8: 00000000 .word 0x00000000 + 800038dc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 800038e0: 0008bb83 ld x23,0(x17) + 800038e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x7fffffffffffffff + 800038e8: 0008ba03 ld x20,0(x17) + 800038ec: 00888893 addi x17,x17,8 + +00000000800038f0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + sm4ed x12, x23, x20, 3 # perform operation + 800038f0: f14b8633 sm4ed x12,x23,x20,0x3 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f4: 0007b203 ld x4,0(x15) + 800038f8: 00c20c63 beq x4,x12,80003910 + 800038fc: 0c5072ef jal x5,8000b1c0 + 80003900: 800038f0 .word 0x800038f0 + 80003904: 00000000 .word 0x00000000 + 80003908: 80018d35 .word 0x80018d35 + 8000390c: 00000000 .word 0x00000000 + 80003910: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003914: 0008bf83 ld x31,0(x17) + 80003918: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x7ffffffffffffffe + 8000391c: 0008b483 ld x9,0(x17) + 80003920: 00888893 addi x17,x17,8 + +0000000080003924 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + sm4ed x2, x31, x9, 2 # perform operation + 80003924: b09f8133 sm4ed x2,x31,x9,0x2 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003928: 0007b203 ld x4,0(x15) + 8000392c: 00220c63 beq x4,x2,80003944 + 80003930: 091072ef jal x5,8000b1c0 + 80003934: 80003924 .word 0x80003924 + 80003938: 00000000 .word 0x00000000 + 8000393c: 80018da6 .word 0x80018da6 + 80003940: 00000000 .word 0x00000000 + 80003944: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 80003948: 0008b403 ld x8,0(x17) + 8000394c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xffffffffffffffff + 80003950: 0008b483 ld x9,0(x17) + 80003954: 00888893 addi x17,x17,8 + +0000000080003958 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + sm4ed x25, x8, x9, 0 # perform operation + 80003958: 30940cb3 sm4ed x25,x8,x9,0x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 8000395c: 0007b203 ld x4,0(x15) + 80003960: 01920c63 beq x4,x25,80003978 + 80003964: 05d072ef jal x5,8000b1c0 + 80003968: 80003958 .word 0x80003958 + 8000396c: 00000000 .word 0x00000000 + 80003970: 80018e17 .word 0x80018e17 + 80003974: 00000000 .word 0x00000000 + 80003978: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 8000397c: 0008b403 ld x8,0(x17) + 80003980: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0xfffffffffffffffe + 80003984: 0008bb83 ld x23,0(x17) + 80003988: 00888893 addi x17,x17,8 + +000000008000398c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + sm4ed x19, x8, x23, 0 # perform operation + 8000398c: 317409b3 sm4ed x19,x8,x23,0x0 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003990: 0007b203 ld x4,0(x15) + 80003994: 01320c63 beq x4,x19,800039ac + 80003998: 029072ef jal x5,8000b1c0 + 8000399c: 8000398c .word 0x8000398c + 800039a0: 00000000 .word 0x00000000 + 800039a4: 80018e88 .word 0x80018e88 + 800039a8: 00000000 .word 0x00000000 + 800039ac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 800039b0: 0008b603 ld x12,0(x17) + 800039b4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 800039b8: 0008be83 ld x29,0(x17) + 800039bc: 00888893 addi x17,x17,8 + +00000000800039c0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + sm4ed x9, x12, x29, 1 # perform operation + 800039c0: 71d604b3 sm4ed x9,x12,x29,0x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c4: 0007b203 ld x4,0(x15) + 800039c8: 00920c63 beq x4,x9,800039e0 + 800039cc: 7f4072ef jal x5,8000b1c0 + 800039d0: 800039c0 .word 0x800039c0 + 800039d4: 00000000 .word 0x00000000 + 800039d8: 80018ef9 .word 0x80018ef9 + 800039dc: 00000000 .word 0x00000000 + 800039e0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x5bbc887763ae86f2 + 800039e4: 0008b503 ld x10,0(x17) + 800039e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 800039ec: 0008b583 ld x11,0(x17) + 800039f0: 00888893 addi x17,x17,8 + +00000000800039f4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x12, x10, x11, 2 # perform operation + 800039f4: b0b50633 sm4ed x12,x10,x11,0x2 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039f8: 0007b203 ld x4,0(x15) + 800039fc: 00c20c63 beq x4,x12,80003a14 + 80003a00: 7c0072ef jal x5,8000b1c0 + 80003a04: 800039f4 .word 0x800039f4 + 80003a08: 00000000 .word 0x00000000 + 80003a0c: 80018f6a .word 0x80018f6a + 80003a10: 00000000 .word 0x00000000 + 80003a14: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5bbc887763ae86f2 + 80003a18: 0008b803 ld x16,0(x17) + 80003a1c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x5555555555555555 + 80003a20: 0008bc03 ld x24,0(x17) + 80003a24: 00888893 addi x17,x17,8 + +0000000080003a28 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + sm4ed x31, x16, x24, 1 # perform operation + 80003a28: 71880fb3 sm4ed x31,x16,x24,0x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a2c: 0007b203 ld x4,0(x15) + 80003a30: 01f20c63 beq x4,x31,80003a48 + 80003a34: 78c072ef jal x5,8000b1c0 + 80003a38: 80003a28 .word 0x80003a28 + 80003a3c: 00000000 .word 0x00000000 + 80003a40: 80018fdb .word 0x80018fdb + 80003a44: 00000000 .word 0x00000000 + 80003a48: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80003a4c: 0008b483 ld x9,0(x17) + 80003a50: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x00000000ffffffff + 80003a54: 0008b183 ld x3,0(x17) + 80003a58: 00888893 addi x17,x17,8 + +0000000080003a5c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + sm4ed x18, x9, x3, 3 # perform operation + 80003a5c: f0348933 sm4ed x18,x9,x3,0x3 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a60: 0007b203 ld x4,0(x15) + 80003a64: 01220c63 beq x4,x18,80003a7c + 80003a68: 758072ef jal x5,8000b1c0 + 80003a6c: 80003a5c .word 0x80003a5c + 80003a70: 00000000 .word 0x00000000 + 80003a74: 8001904c .word 0x8001904c + 80003a78: 00000000 .word 0x00000000 + 80003a7c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x5bbc887763ae86f2 + 80003a80: 0008b403 ld x8,0(x17) + 80003a84: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x00000000fffffffe + 80003a88: 0008b483 ld x9,0(x17) + 80003a8c: 00888893 addi x17,x17,8 + +0000000080003a90 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + sm4ed x11, x8, x9, 3 # perform operation + 80003a90: f09405b3 sm4ed x11,x8,x9,0x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a94: 0007b203 ld x4,0(x15) + 80003a98: 00b20c63 beq x4,x11,80003ab0 + 80003a9c: 724072ef jal x5,8000b1c0 + 80003aa0: 80003a90 .word 0x80003a90 + 80003aa4: 00000000 .word 0x00000000 + 80003aa8: 800190b5 .word 0x800190b5 + 80003aac: 00000000 .word 0x00000000 + 80003ab0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003ab4: 0008bf83 ld x31,0(x17) + 80003ab8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000100000000 + 80003abc: 0008b183 ld x3,0(x17) + 80003ac0: 00888893 addi x17,x17,8 + +0000000080003ac4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + sm4ed x29, x31, x3, 3 # perform operation + 80003ac4: f03f8eb3 sm4ed x29,x31,x3,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ac8: 0007b203 ld x4,0(x15) + 80003acc: 01d20c63 beq x4,x29,80003ae4 + 80003ad0: 6f0072ef jal x5,8000b1c0 + 80003ad4: 80003ac4 .word 0x80003ac4 + 80003ad8: 00000000 .word 0x00000000 + 80003adc: 8001911e .word 0x8001911e + 80003ae0: 00000000 .word 0x00000000 + 80003ae4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5bbc887763ae86f2 + 80003ae8: 0008bf03 ld x30,0(x17) + 80003aec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0000000100000001 + 80003af0: 0008bb83 ld x23,0(x17) + 80003af4: 00888893 addi x17,x17,8 + +0000000080003af8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + sm4ed x16, x30, x23, 0 # perform operation + 80003af8: 317f0833 sm4ed x16,x30,x23,0x0 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003afc: 0007b203 ld x4,0(x15) + 80003b00: 01020c63 beq x4,x16,80003b18 + 80003b04: 6bc072ef jal x5,8000b1c0 + 80003b08: 80003af8 .word 0x80003af8 + 80003b0c: 00000000 .word 0x00000000 + 80003b10: 80019188 .word 0x80019188 + 80003b14: 00000000 .word 0x00000000 + 80003b18: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003b1c: 0008b503 ld x10,0(x17) + 80003b20: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x0000000000000000 + 80003b24: 0008b483 ld x9,0(x17) + 80003b28: 00888893 addi x17,x17,8 + +0000000080003b2c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + sm4ed x27, x10, x9, 1 # perform operation + 80003b2c: 70950db3 sm4ed x27,x10,x9,0x1 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b30: 0007b203 ld x4,0(x15) + 80003b34: 01b20c63 beq x4,x27,80003b4c + 80003b38: 688072ef jal x5,8000b1c0 + 80003b3c: 80003b2c .word 0x80003b2c + 80003b40: 00000000 .word 0x00000000 + 80003b44: 800191f2 .word 0x800191f2 + 80003b48: 00000000 .word 0x00000000 + 80003b4c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0xaaaaaaaaaaaaaaaa + 80003b50: 0008b803 ld x16,0(x17) + 80003b54: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x0000000000000001 + 80003b58: 0008b383 ld x7,0(x17) + 80003b5c: 00888893 addi x17,x17,8 + +0000000080003b60 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + sm4ed x23, x16, x7, 1 # perform operation + 80003b60: 70780bb3 sm4ed x23,x16,x7,0x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b64: 0007b203 ld x4,0(x15) + 80003b68: 01720c63 beq x4,x23,80003b80 + 80003b6c: 654072ef jal x5,8000b1c0 + 80003b70: 80003b60 .word 0x80003b60 + 80003b74: 00000000 .word 0x00000000 + 80003b78: 80019254 .word 0x80019254 + 80003b7c: 00000000 .word 0x00000000 + 80003b80: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003b84: 0008ba03 ld x20,0(x17) + 80003b88: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x0000000000000002 + 80003b8c: 0008b903 ld x18,0(x17) + 80003b90: 00888893 addi x17,x17,8 + +0000000080003b94 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + sm4ed x30, x20, x18, 0 # perform operation + 80003b94: 312a0f33 sm4ed x30,x20,x18,0x0 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b98: 0007b203 ld x4,0(x15) + 80003b9c: 01e20c63 beq x4,x30,80003bb4 + 80003ba0: 620072ef jal x5,8000b1c0 + 80003ba4: 80003b94 .word 0x80003b94 + 80003ba8: 00000000 .word 0x00000000 + 80003bac: 800192b6 .word 0x800192b6 + 80003bb0: 00000000 .word 0x00000000 + 80003bb4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003bb8: 0008bb03 ld x22,0(x17) + 80003bbc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x8000000000000000 + 80003bc0: 0008be03 ld x28,0(x17) + 80003bc4: 00888893 addi x17,x17,8 + +0000000080003bc8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + sm4ed x6, x22, x28, 1 # perform operation + 80003bc8: 71cb0333 sm4ed x6,x22,x28,0x1 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bcc: 0007b203 ld x4,0(x15) + 80003bd0: 00620c63 beq x4,x6,80003be8 + 80003bd4: 5ec072ef jal x5,8000b1c0 + 80003bd8: 80003bc8 .word 0x80003bc8 + 80003bdc: 00000000 .word 0x00000000 + 80003be0: 80019318 .word 0x80019318 + 80003be4: 00000000 .word 0x00000000 + 80003be8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0xaaaaaaaaaaaaaaaa + 80003bec: 0008bb03 ld x22,0(x17) + 80003bf0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x8000000000000001 + 80003bf4: 0008b603 ld x12,0(x17) + 80003bf8: 00888893 addi x17,x17,8 + +0000000080003bfc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + sm4ed x8, x22, x12, 3 # perform operation + 80003bfc: f0cb0433 sm4ed x8,x22,x12,0x3 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c00: 0007b203 ld x4,0(x15) + 80003c04: 00820c63 beq x4,x8,80003c1c + 80003c08: 5b8072ef jal x5,8000b1c0 + 80003c0c: 80003bfc .word 0x80003bfc + 80003c10: 00000000 .word 0x00000000 + 80003c14: 80019389 .word 0x80019389 + 80003c18: 00000000 .word 0x00000000 + 80003c1c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80003c20: 0008b383 ld x7,0(x17) + 80003c24: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x7fffffffffffffff + 80003c28: 0008bc03 ld x24,0(x17) + 80003c2c: 00888893 addi x17,x17,8 + +0000000080003c30 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + sm4ed x27, x7, x24, 1 # perform operation + 80003c30: 71838db3 sm4ed x27,x7,x24,0x1 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c34: 0007b203 ld x4,0(x15) + 80003c38: 01b20c63 beq x4,x27,80003c50 + 80003c3c: 584072ef jal x5,8000b1c0 + 80003c40: 80003c30 .word 0x80003c30 + 80003c44: 00000000 .word 0x00000000 + 80003c48: 800193fa .word 0x800193fa + 80003c4c: 00000000 .word 0x00000000 + 80003c50: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0xaaaaaaaaaaaaaaaa + 80003c54: 0008b983 ld x19,0(x17) + 80003c58: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80003c5c: 0008b903 ld x18,0(x17) + 80003c60: 00888893 addi x17,x17,8 + +0000000080003c64 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + sm4ed x31, x19, x18, 3 # perform operation + 80003c64: f1298fb3 sm4ed x31,x19,x18,0x3 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c68: 0007b203 ld x4,0(x15) + 80003c6c: 01f20c63 beq x4,x31,80003c84 + 80003c70: 550072ef jal x5,8000b1c0 + 80003c74: 80003c64 .word 0x80003c64 + 80003c78: 00000000 .word 0x00000000 + 80003c7c: 8001946b .word 0x8001946b + 80003c80: 00000000 .word 0x00000000 + 80003c84: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003c88: 0008be83 ld x29,0(x17) + 80003c8c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0xffffffffffffffff + 80003c90: 0008ba03 ld x20,0(x17) + 80003c94: 00888893 addi x17,x17,8 + +0000000080003c98 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + sm4ed x23, x29, x20, 1 # perform operation + 80003c98: 714e8bb3 sm4ed x23,x29,x20,0x1 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c9c: 0007b203 ld x4,0(x15) + 80003ca0: 01720c63 beq x4,x23,80003cb8 + 80003ca4: 51c072ef jal x5,8000b1c0 + 80003ca8: 80003c98 .word 0x80003c98 + 80003cac: 00000000 .word 0x00000000 + 80003cb0: 800194dc .word 0x800194dc + 80003cb4: 00000000 .word 0x00000000 + 80003cb8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0xaaaaaaaaaaaaaaaa + 80003cbc: 0008b383 ld x7,0(x17) + 80003cc0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xfffffffffffffffe + 80003cc4: 0008b983 ld x19,0(x17) + 80003cc8: 00888893 addi x17,x17,8 + +0000000080003ccc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + sm4ed x28, x7, x19, 2 # perform operation + 80003ccc: b1338e33 sm4ed x28,x7,x19,0x2 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd0: 0007b203 ld x4,0(x15) + 80003cd4: 01c20c63 beq x4,x28,80003cec + 80003cd8: 4e8072ef jal x5,8000b1c0 + 80003cdc: 80003ccc .word 0x80003ccc + 80003ce0: 00000000 .word 0x00000000 + 80003ce4: 8001954d .word 0x8001954d + 80003ce8: 00000000 .word 0x00000000 + 80003cec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003cf0: 0008be83 ld x29,0(x17) + 80003cf4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x5bbc887763ae86f2 + 80003cf8: 0008b403 ld x8,0(x17) + 80003cfc: 00888893 addi x17,x17,8 + +0000000080003d00 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + sm4ed x19, x29, x8, 1 # perform operation + 80003d00: 708e89b3 sm4ed x19,x29,x8,0x1 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d04: 0007b203 ld x4,0(x15) + 80003d08: 01320c63 beq x4,x19,80003d20 + 80003d0c: 4b4072ef jal x5,8000b1c0 + 80003d10: 80003d00 .word 0x80003d00 + 80003d14: 00000000 .word 0x00000000 + 80003d18: 800195be .word 0x800195be + 80003d1c: 00000000 .word 0x00000000 + 80003d20: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0xaaaaaaaaaaaaaaaa + 80003d24: 0008be83 ld x29,0(x17) + 80003d28: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0xaaaaaaaaaaaaaaaa + 80003d2c: 0008b983 ld x19,0(x17) + 80003d30: 00888893 addi x17,x17,8 + +0000000080003d34 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x6, x29, x19, 1 # perform operation + 80003d34: 713e8333 sm4ed x6,x29,x19,0x1 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d38: 0007b203 ld x4,0(x15) + 80003d3c: 00620c63 beq x4,x6,80003d54 + 80003d40: 480072ef jal x5,8000b1c0 + 80003d44: 80003d34 .word 0x80003d34 + 80003d48: 00000000 .word 0x00000000 + 80003d4c: 8001962f .word 0x8001962f + 80003d50: 00000000 .word 0x00000000 + 80003d54: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xaaaaaaaaaaaaaaaa + 80003d58: 0008b083 ld x1,0(x17) + 80003d5c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x5555555555555555 + 80003d60: 0008b683 ld x13,0(x17) + 80003d64: 00888893 addi x17,x17,8 + +0000000080003d68 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + sm4ed x9, x1, x13, 1 # perform operation + 80003d68: 70d084b3 sm4ed x9,x1,x13,0x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d6c: 0007b203 ld x4,0(x15) + 80003d70: 00920c63 beq x4,x9,80003d88 + 80003d74: 44c072ef jal x5,8000b1c0 + 80003d78: 80003d68 .word 0x80003d68 + 80003d7c: 00000000 .word 0x00000000 + 80003d80: 800196a0 .word 0x800196a0 + 80003d84: 00000000 .word 0x00000000 + 80003d88: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xaaaaaaaaaaaaaaaa + 80003d8c: 0008b503 ld x10,0(x17) + 80003d90: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x00000000ffffffff + 80003d94: 0008be03 ld x28,0(x17) + 80003d98: 00888893 addi x17,x17,8 + +0000000080003d9c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + sm4ed x24, x10, x28, 2 # perform operation + 80003d9c: b1c50c33 sm4ed x24,x10,x28,0x2 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da0: 0007b203 ld x4,0(x15) + 80003da4: 01820c63 beq x4,x24,80003dbc + 80003da8: 418072ef jal x5,8000b1c0 + 80003dac: 80003d9c .word 0x80003d9c + 80003db0: 00000000 .word 0x00000000 + 80003db4: 80019711 .word 0x80019711 + 80003db8: 00000000 .word 0x00000000 + 80003dbc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0xaaaaaaaaaaaaaaaa + 80003dc0: 0008ba03 ld x20,0(x17) + 80003dc4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0x00000000fffffffe + 80003dc8: 0008b903 ld x18,0(x17) + 80003dcc: 00888893 addi x17,x17,8 + +0000000080003dd0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + sm4ed x3, x20, x18, 3 # perform operation + 80003dd0: f12a01b3 sm4ed x3,x20,x18,0x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd4: 0007b203 ld x4,0(x15) + 80003dd8: 00320c63 beq x4,x3,80003df0 + 80003ddc: 3e4072ef jal x5,8000b1c0 + 80003de0: 80003dd0 .word 0x80003dd0 + 80003de4: 00000000 .word 0x00000000 + 80003de8: 8001977a .word 0x8001977a + 80003dec: 00000000 .word 0x00000000 + 80003df0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003df4: 0008bf83 ld x31,0(x17) + 80003df8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000100000000 + 80003dfc: 0008ba03 ld x20,0(x17) + 80003e00: 00888893 addi x17,x17,8 + +0000000080003e04 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + sm4ed x16, x31, x20, 2 # perform operation + 80003e04: b14f8833 sm4ed x16,x31,x20,0x2 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e08: 0007b203 ld x4,0(x15) + 80003e0c: 01020c63 beq x4,x16,80003e24 + 80003e10: 3b0072ef jal x5,8000b1c0 + 80003e14: 80003e04 .word 0x80003e04 + 80003e18: 00000000 .word 0x00000000 + 80003e1c: 800197e3 .word 0x800197e3 + 80003e20: 00000000 .word 0x00000000 + 80003e24: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0xaaaaaaaaaaaaaaaa + 80003e28: 0008bb83 ld x23,0(x17) + 80003e2c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x0000000100000001 + 80003e30: 0008bc03 ld x24,0(x17) + 80003e34: 00888893 addi x17,x17,8 + +0000000080003e38 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + sm4ed x6, x23, x24, 0 # perform operation + 80003e38: 318b8333 sm4ed x6,x23,x24,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e3c: 0007b203 ld x4,0(x15) + 80003e40: 00620c63 beq x4,x6,80003e58 + 80003e44: 37c072ef jal x5,8000b1c0 + 80003e48: 80003e38 .word 0x80003e38 + 80003e4c: 00000000 .word 0x00000000 + 80003e50: 8001984d .word 0x8001984d + 80003e54: 00000000 .word 0x00000000 + 80003e58: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x5555555555555555 + 80003e5c: 0008bf03 ld x30,0(x17) + 80003e60: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000000 + 80003e64: 0008ba03 ld x20,0(x17) + 80003e68: 00888893 addi x17,x17,8 + +0000000080003e6c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + sm4ed x19, x30, x20, 3 # perform operation + 80003e6c: f14f09b3 sm4ed x19,x30,x20,0x3 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e70: 0007b203 ld x4,0(x15) + 80003e74: 01320c63 beq x4,x19,80003e8c + 80003e78: 348072ef jal x5,8000b1c0 + 80003e7c: 80003e6c .word 0x80003e6c + 80003e80: 00000000 .word 0x00000000 + 80003e84: 800198b7 .word 0x800198b7 + 80003e88: 00000000 .word 0x00000000 + 80003e8c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x5555555555555555 + 80003e90: 0008bd83 ld x27,0(x17) + 80003e94: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000001 + 80003e98: 0008ba03 ld x20,0(x17) + 80003e9c: 00888893 addi x17,x17,8 + +0000000080003ea0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + sm4ed x28, x27, x20, 2 # perform operation + 80003ea0: b14d8e33 sm4ed x28,x27,x20,0x2 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea4: 0007b203 ld x4,0(x15) + 80003ea8: 01c20c63 beq x4,x28,80003ec0 + 80003eac: 314072ef jal x5,8000b1c0 + 80003eb0: 80003ea0 .word 0x80003ea0 + 80003eb4: 00000000 .word 0x00000000 + 80003eb8: 80019919 .word 0x80019919 + 80003ebc: 00000000 .word 0x00000000 + 80003ec0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80003ec4: 0008b803 ld x16,0(x17) + 80003ec8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x0000000000000002 + 80003ecc: 0008b383 ld x7,0(x17) + 80003ed0: 00888893 addi x17,x17,8 + +0000000080003ed4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + sm4ed x8, x16, x7, 1 # perform operation + 80003ed4: 70780433 sm4ed x8,x16,x7,0x1 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ed8: 0007b203 ld x4,0(x15) + 80003edc: 00820c63 beq x4,x8,80003ef4 + 80003ee0: 2e0072ef jal x5,8000b1c0 + 80003ee4: 80003ed4 .word 0x80003ed4 + 80003ee8: 00000000 .word 0x00000000 + 80003eec: 8001997b .word 0x8001997b + 80003ef0: 00000000 .word 0x00000000 + 80003ef4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80003ef8: 0008b803 ld x16,0(x17) + 80003efc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x8000000000000000 + 80003f00: 0008be03 ld x28,0(x17) + 80003f04: 00888893 addi x17,x17,8 + +0000000080003f08 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + sm4ed x21, x16, x28, 3 # perform operation + 80003f08: f1c80ab3 sm4ed x21,x16,x28,0x3 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f0c: 0007b203 ld x4,0(x15) + 80003f10: 01520c63 beq x4,x21,80003f28 + 80003f14: 2ac072ef jal x5,8000b1c0 + 80003f18: 80003f08 .word 0x80003f08 + 80003f1c: 00000000 .word 0x00000000 + 80003f20: 800199dd .word 0x800199dd + 80003f24: 00000000 .word 0x00000000 + 80003f28: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x5555555555555555 + 80003f2c: 0008ba03 ld x20,0(x17) + 80003f30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x8000000000000001 + 80003f34: 0008bf03 ld x30,0(x17) + 80003f38: 00888893 addi x17,x17,8 + +0000000080003f3c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + sm4ed x27, x20, x30, 2 # perform operation + 80003f3c: b1ea0db3 sm4ed x27,x20,x30,0x2 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f40: 0007b203 ld x4,0(x15) + 80003f44: 01b20c63 beq x4,x27,80003f5c + 80003f48: 278072ef jal x5,8000b1c0 + 80003f4c: 80003f3c .word 0x80003f3c + 80003f50: 00000000 .word 0x00000000 + 80003f54: 80019a4e .word 0x80019a4e + 80003f58: 00000000 .word 0x00000000 + 80003f5c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x5555555555555555 + 80003f60: 0008b803 ld x16,0(x17) + 80003f64: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x7fffffffffffffff + 80003f68: 0008bf83 ld x31,0(x17) + 80003f6c: 00888893 addi x17,x17,8 + +0000000080003f70 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + sm4ed x27, x16, x31, 3 # perform operation + 80003f70: f1f80db3 sm4ed x27,x16,x31,0x3 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f74: 0007b203 ld x4,0(x15) + 80003f78: 01b20c63 beq x4,x27,80003f90 + 80003f7c: 244072ef jal x5,8000b1c0 + 80003f80: 80003f70 .word 0x80003f70 + 80003f84: 00000000 .word 0x00000000 + 80003f88: 80019abf .word 0x80019abf + 80003f8c: 00000000 .word 0x00000000 + 80003f90: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x5555555555555555 + 80003f94: 0008b083 ld x1,0(x17) + 80003f98: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x7ffffffffffffffe + 80003f9c: 0008b303 ld x6,0(x17) + 80003fa0: 00888893 addi x17,x17,8 + +0000000080003fa4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + sm4ed x29, x1, x6, 1 # perform operation + 80003fa4: 70608eb3 sm4ed x29,x1,x6,0x1 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fa8: 0007b203 ld x4,0(x15) + 80003fac: 01d20c63 beq x4,x29,80003fc4 + 80003fb0: 210072ef jal x5,8000b1c0 + 80003fb4: 80003fa4 .word 0x80003fa4 + 80003fb8: 00000000 .word 0x00000000 + 80003fbc: 80019b30 .word 0x80019b30 + 80003fc0: 00000000 .word 0x00000000 + 80003fc4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x5555555555555555 + 80003fc8: 0008b903 ld x18,0(x17) + 80003fcc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xffffffffffffffff + 80003fd0: 0008b503 ld x10,0(x17) + 80003fd4: 00888893 addi x17,x17,8 + +0000000080003fd8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + sm4ed x8, x18, x10, 3 # perform operation + 80003fd8: f0a90433 sm4ed x8,x18,x10,0x3 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fdc: 0007b203 ld x4,0(x15) + 80003fe0: 00820c63 beq x4,x8,80003ff8 + 80003fe4: 1dc072ef jal x5,8000b1c0 + 80003fe8: 80003fd8 .word 0x80003fd8 + 80003fec: 00000000 .word 0x00000000 + 80003ff0: 80019ba1 .word 0x80019ba1 + 80003ff4: 00000000 .word 0x00000000 + 80003ff8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x5555555555555555 + 80003ffc: 0008be83 ld x29,0(x17) + 80004000: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0xfffffffffffffffe + 80004004: 0008bf83 ld x31,0(x17) + 80004008: 00888893 addi x17,x17,8 + +000000008000400c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + sm4ed x6, x29, x31, 3 # perform operation + 8000400c: f1fe8333 sm4ed x6,x29,x31,0x3 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004010: 0007b203 ld x4,0(x15) + 80004014: 00620c63 beq x4,x6,8000402c + 80004018: 1a8072ef jal x5,8000b1c0 + 8000401c: 8000400c .word 0x8000400c + 80004020: 00000000 .word 0x00000000 + 80004024: 80019c12 .word 0x80019c12 + 80004028: 00000000 .word 0x00000000 + 8000402c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x5555555555555555 + 80004030: 0008bb03 ld x22,0(x17) + 80004034: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x5bbc887763ae86f2 + 80004038: 0008b483 ld x9,0(x17) + 8000403c: 00888893 addi x17,x17,8 + +0000000080004040 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + sm4ed x26, x22, x9, 3 # perform operation + 80004040: f09b0d33 sm4ed x26,x22,x9,0x3 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004044: 0007b203 ld x4,0(x15) + 80004048: 01a20c63 beq x4,x26,80004060 + 8000404c: 174072ef jal x5,8000b1c0 + 80004050: 80004040 .word 0x80004040 + 80004054: 00000000 .word 0x00000000 + 80004058: 80019c83 .word 0x80019c83 + 8000405c: 00000000 .word 0x00000000 + 80004060: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x5555555555555555 + 80004064: 0008b683 ld x13,0(x17) + 80004068: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xaaaaaaaaaaaaaaaa + 8000406c: 0008b183 ld x3,0(x17) + 80004070: 00888893 addi x17,x17,8 + +0000000080004074 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x11, x13, x3, 1 # perform operation + 80004074: 703685b3 sm4ed x11,x13,x3,0x1 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004078: 0007b203 ld x4,0(x15) + 8000407c: 00b20c63 beq x4,x11,80004094 + 80004080: 140072ef jal x5,8000b1c0 + 80004084: 80004074 .word 0x80004074 + 80004088: 00000000 .word 0x00000000 + 8000408c: 80019cf4 .word 0x80019cf4 + 80004090: 00000000 .word 0x00000000 + 80004094: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x5555555555555555 + 80004098: 0008bd83 ld x27,0(x17) + 8000409c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x5555555555555555 + 800040a0: 0008b403 ld x8,0(x17) + 800040a4: 00888893 addi x17,x17,8 + +00000000800040a8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + sm4ed x1, x27, x8, 3 # perform operation + 800040a8: f08d80b3 sm4ed x1,x27,x8,0x3 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040ac: 0007b203 ld x4,0(x15) + 800040b0: 00120c63 beq x4,x1,800040c8 + 800040b4: 10c072ef jal x5,8000b1c0 + 800040b8: 800040a8 .word 0x800040a8 + 800040bc: 00000000 .word 0x00000000 + 800040c0: 80019d65 .word 0x80019d65 + 800040c4: 00000000 .word 0x00000000 + 800040c8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs1: x23 = 0x5555555555555555 + 800040cc: 0008bb83 ld x23,0(x17) + 800040d0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x00000000ffffffff + 800040d4: 0008b083 ld x1,0(x17) + 800040d8: 00888893 addi x17,x17,8 + +00000000800040dc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + sm4ed x8, x23, x1, 3 # perform operation + 800040dc: f01b8433 sm4ed x8,x23,x1,0x3 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e0: 0007b203 ld x4,0(x15) + 800040e4: 00820c63 beq x4,x8,800040fc + 800040e8: 0d8072ef jal x5,8000b1c0 + 800040ec: 800040dc .word 0x800040dc + 800040f0: 00000000 .word 0x00000000 + 800040f4: 80019dd6 .word 0x80019dd6 + 800040f8: 00000000 .word 0x00000000 + 800040fc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x5555555555555555 + 80004100: 0008b383 ld x7,0(x17) + 80004104: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x00000000fffffffe + 80004108: 0008b483 ld x9,0(x17) + 8000410c: 00888893 addi x17,x17,8 + +0000000080004110 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + sm4ed x19, x7, x9, 1 # perform operation + 80004110: 709389b3 sm4ed x19,x7,x9,0x1 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004114: 0007b203 ld x4,0(x15) + 80004118: 01320c63 beq x4,x19,80004130 + 8000411c: 0a4072ef jal x5,8000b1c0 + 80004120: 80004110 .word 0x80004110 + 80004124: 00000000 .word 0x00000000 + 80004128: 80019e3f .word 0x80019e3f + 8000412c: 00000000 .word 0x00000000 + 80004130: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x5555555555555555 + 80004134: 0008ba83 ld x21,0(x17) + 80004138: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000100000000 + 8000413c: 0008be83 ld x29,0(x17) + 80004140: 00888893 addi x17,x17,8 + +0000000080004144 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + sm4ed x28, x21, x29, 1 # perform operation + 80004144: 71da8e33 sm4ed x28,x21,x29,0x1 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004148: 0007b203 ld x4,0(x15) + 8000414c: 01c20c63 beq x4,x28,80004164 + 80004150: 070072ef jal x5,8000b1c0 + 80004154: 80004144 .word 0x80004144 + 80004158: 00000000 .word 0x00000000 + 8000415c: 80019ea8 .word 0x80019ea8 + 80004160: 00000000 .word 0x00000000 + 80004164: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs1: x24 = 0x5555555555555555 + 80004168: 0008bc03 ld x24,0(x17) + 8000416c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0000000100000001 + 80004170: 0008b603 ld x12,0(x17) + 80004174: 00888893 addi x17,x17,8 + +0000000080004178 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + sm4ed x27, x24, x12, 0 # perform operation + 80004178: 30cc0db3 sm4ed x27,x24,x12,0x0 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 8000417c: 0007b203 ld x4,0(x15) + 80004180: 01b20c63 beq x4,x27,80004198 + 80004184: 03c072ef jal x5,8000b1c0 + 80004188: 80004178 .word 0x80004178 + 8000418c: 00000000 .word 0x00000000 + 80004190: 80019f12 .word 0x80019f12 + 80004194: 00000000 .word 0x00000000 + 80004198: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x00000000ffffffff + 8000419c: 0008b403 ld x8,0(x17) + 800041a0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x0000000000000000 + 800041a4: 0008ba83 ld x21,0(x17) + 800041a8: 00888893 addi x17,x17,8 + +00000000800041ac : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sm4ed x10, x8, x21, 0 # perform operation + 800041ac: 31540533 sm4ed x10,x8,x21,0x0 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b0: 0007b203 ld x4,0(x15) + 800041b4: 00a20c63 beq x4,x10,800041cc + 800041b8: 008072ef jal x5,8000b1c0 + 800041bc: 800041ac .word 0x800041ac + 800041c0: 00000000 .word 0x00000000 + 800041c4: 80019f7c .word 0x80019f7c + 800041c8: 00000000 .word 0x00000000 + 800041cc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x00000000ffffffff + 800041d0: 0008bf83 ld x31,0(x17) + 800041d4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs2: x20 = 0x0000000000000001 + 800041d8: 0008ba03 ld x20,0(x17) + 800041dc: 00888893 addi x17,x17,8 + +00000000800041e0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sm4ed x1, x31, x20, 2 # perform operation + 800041e0: b14f80b3 sm4ed x1,x31,x20,0x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e4: 0007b203 ld x4,0(x15) + 800041e8: 00120c63 beq x4,x1,80004200 + 800041ec: 7d5062ef jal x5,8000b1c0 + 800041f0: 800041e0 .word 0x800041e0 + 800041f4: 00000000 .word 0x00000000 + 800041f8: 80019fd6 .word 0x80019fd6 + 800041fc: 00000000 .word 0x00000000 + 80004200: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x00000000ffffffff + 80004204: 0008b503 ld x10,0(x17) + 80004208: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000000000002 + 8000420c: 0008bd03 ld x26,0(x17) + 80004210: 00888893 addi x17,x17,8 + +0000000080004214 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sm4ed x20, x10, x26, 2 # perform operation + 80004214: b1a50a33 sm4ed x20,x10,x26,0x2 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004218: 0007b203 ld x4,0(x15) + 8000421c: 01420c63 beq x4,x20,80004234 + 80004220: 7a1062ef jal x5,8000b1c0 + 80004224: 80004214 .word 0x80004214 + 80004228: 00000000 .word 0x00000000 + 8000422c: 8001a030 .word 0x8001a030 + 80004230: 00000000 .word 0x00000000 + 80004234: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x00000000ffffffff + 80004238: 0008b803 ld x16,0(x17) + 8000423c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x8000000000000000 + 80004240: 0008b383 ld x7,0(x17) + 80004244: 00888893 addi x17,x17,8 + +0000000080004248 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + sm4ed x8, x16, x7, 3 # perform operation + 80004248: f0780433 sm4ed x8,x16,x7,0x3 + # Check if x8 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x8, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 8000424c: 0007b203 ld x4,0(x15) + 80004250: 00820c63 beq x4,x8,80004268 + 80004254: 76d062ef jal x5,8000b1c0 + 80004258: 80004248 .word 0x80004248 + 8000425c: 00000000 .word 0x00000000 + 80004260: 8001a08a .word 0x8001a08a + 80004264: 00000000 .word 0x00000000 + 80004268: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x00000000ffffffff + 8000426c: 0008b103 ld x2,0(x17) + 80004270: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x8000000000000001 + 80004274: 0008b703 ld x14,0(x17) + 80004278: 00888893 addi x17,x17,8 + +000000008000427c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + sm4ed x25, x2, x14, 0 # perform operation + 8000427c: 30e10cb3 sm4ed x25,x2,x14,0x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004280: 0007b203 ld x4,0(x15) + 80004284: 01920c63 beq x4,x25,8000429c + 80004288: 739062ef jal x5,8000b1c0 + 8000428c: 8000427c .word 0x8000427c + 80004290: 00000000 .word 0x00000000 + 80004294: 8001a0f3 .word 0x8001a0f3 + 80004298: 00000000 .word 0x00000000 + 8000429c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x00000000ffffffff + 800042a0: 0008b183 ld x3,0(x17) + 800042a4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x7fffffffffffffff + 800042a8: 0008bd83 ld x27,0(x17) + 800042ac: 00888893 addi x17,x17,8 + +00000000800042b0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + sm4ed x11, x3, x27, 3 # perform operation + 800042b0: f1b185b3 sm4ed x11,x3,x27,0x3 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b4: 0007b203 ld x4,0(x15) + 800042b8: 00b20c63 beq x4,x11,800042d0 + 800042bc: 705062ef jal x5,8000b1c0 + 800042c0: 800042b0 .word 0x800042b0 + 800042c4: 00000000 .word 0x00000000 + 800042c8: 8001a15c .word 0x8001a15c + 800042cc: 00000000 .word 0x00000000 + 800042d0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x00000000ffffffff + 800042d4: 0008b503 ld x10,0(x17) + 800042d8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800042dc: 0008b683 ld x13,0(x17) + 800042e0: 00888893 addi x17,x17,8 + +00000000800042e4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + sm4ed x1, x10, x13, 0 # perform operation + 800042e4: 30d500b3 sm4ed x1,x10,x13,0x0 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042e8: 0007b203 ld x4,0(x15) + 800042ec: 00120c63 beq x4,x1,80004304 + 800042f0: 6d1062ef jal x5,8000b1c0 + 800042f4: 800042e4 .word 0x800042e4 + 800042f8: 00000000 .word 0x00000000 + 800042fc: 8001a1c5 .word 0x8001a1c5 + 80004300: 00000000 .word 0x00000000 + 80004304: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x00000000ffffffff + 80004308: 0008b403 ld x8,0(x17) + 8000430c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0xffffffffffffffff + 80004310: 0008bd03 ld x26,0(x17) + 80004314: 00888893 addi x17,x17,8 + +0000000080004318 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + sm4ed x30, x8, x26, 2 # perform operation + 80004318: b1a40f33 sm4ed x30,x8,x26,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 8000431c: 0007b203 ld x4,0(x15) + 80004320: 01e20c63 beq x4,x30,80004338 + 80004324: 69d062ef jal x5,8000b1c0 + 80004328: 80004318 .word 0x80004318 + 8000432c: 00000000 .word 0x00000000 + 80004330: 8001a22e .word 0x8001a22e + 80004334: 00000000 .word 0x00000000 + 80004338: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x00000000ffffffff + 8000433c: 0008b803 ld x16,0(x17) + 80004340: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xfffffffffffffffe + 80004344: 0008b383 ld x7,0(x17) + 80004348: 00888893 addi x17,x17,8 + +000000008000434c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + sm4ed x26, x16, x7, 2 # perform operation + 8000434c: b0780d33 sm4ed x26,x16,x7,0x2 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004350: 0007b203 ld x4,0(x15) + 80004354: 01a20c63 beq x4,x26,8000436c + 80004358: 669062ef jal x5,8000b1c0 + 8000435c: 8000434c .word 0x8000434c + 80004360: 00000000 .word 0x00000000 + 80004364: 8001a297 .word 0x8001a297 + 80004368: 00000000 .word 0x00000000 + 8000436c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000ffffffff + 80004370: 0008b703 ld x14,0(x17) + 80004374: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80004378: 0008b983 ld x19,0(x17) + 8000437c: 00888893 addi x17,x17,8 + +0000000080004380 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + sm4ed x26, x14, x19, 1 # perform operation + 80004380: 71370d33 sm4ed x26,x14,x19,0x1 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004384: 0007b203 ld x4,0(x15) + 80004388: 01a20c63 beq x4,x26,800043a0 + 8000438c: 635062ef jal x5,8000b1c0 + 80004390: 80004380 .word 0x80004380 + 80004394: 00000000 .word 0x00000000 + 80004398: 8001a300 .word 0x8001a300 + 8000439c: 00000000 .word 0x00000000 + 800043a0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x00000000ffffffff + 800043a4: 0008b983 ld x19,0(x17) + 800043a8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 800043ac: 0008bd83 ld x27,0(x17) + 800043b0: 00888893 addi x17,x17,8 + +00000000800043b4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x13, x19, x27, 3 # perform operation + 800043b4: f1b986b3 sm4ed x13,x19,x27,0x3 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043b8: 0007b203 ld x4,0(x15) + 800043bc: 00d20c63 beq x4,x13,800043d4 + 800043c0: 601062ef jal x5,8000b1c0 + 800043c4: 800043b4 .word 0x800043b4 + 800043c8: 00000000 .word 0x00000000 + 800043cc: 8001a369 .word 0x8001a369 + 800043d0: 00000000 .word 0x00000000 + 800043d4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x00000000ffffffff + 800043d8: 0008be83 ld x29,0(x17) + 800043dc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs2: x31 = 0x5555555555555555 + 800043e0: 0008bf83 ld x31,0(x17) + 800043e4: 00888893 addi x17,x17,8 + +00000000800043e8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + sm4ed x19, x29, x31, 1 # perform operation + 800043e8: 71fe89b3 sm4ed x19,x29,x31,0x1 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043ec: 0007b203 ld x4,0(x15) + 800043f0: 01320c63 beq x4,x19,80004408 + 800043f4: 5cd062ef jal x5,8000b1c0 + 800043f8: 800043e8 .word 0x800043e8 + 800043fc: 00000000 .word 0x00000000 + 80004400: 8001a3d2 .word 0x8001a3d2 + 80004404: 00000000 .word 0x00000000 + 80004408: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x00000000ffffffff + 8000440c: 0008bd83 ld x27,0(x17) + 80004410: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x00000000ffffffff + 80004414: 0008ba83 ld x21,0(x17) + 80004418: 00888893 addi x17,x17,8 + +000000008000441c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sm4ed x25, x27, x21, 0 # perform operation + 8000441c: 315d8cb3 sm4ed x25,x27,x21,0x0 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004420: 0007b203 ld x4,0(x15) + 80004424: 01920c63 beq x4,x25,8000443c + 80004428: 599062ef jal x5,8000b1c0 + 8000442c: 8000441c .word 0x8000441c + 80004430: 00000000 .word 0x00000000 + 80004434: 8001a43b .word 0x8001a43b + 80004438: 00000000 .word 0x00000000 + 8000443c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x00000000ffffffff + 80004440: 0008b403 ld x8,0(x17) + 80004444: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x00000000fffffffe + 80004448: 0008b683 ld x13,0(x17) + 8000444c: 00888893 addi x17,x17,8 + +0000000080004450 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sm4ed x9, x8, x13, 1 # perform operation + 80004450: 70d404b3 sm4ed x9,x8,x13,0x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004454: 0007b203 ld x4,0(x15) + 80004458: 00920c63 beq x4,x9,80004470 + 8000445c: 565062ef jal x5,8000b1c0 + 80004460: 80004450 .word 0x80004450 + 80004464: 00000000 .word 0x00000000 + 80004468: 8001a49c .word 0x8001a49c + 8000446c: 00000000 .word 0x00000000 + 80004470: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x20) # load rs1: x20 = 0x00000000ffffffff + 80004474: 0008ba03 ld x20,0(x17) + 80004478: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000100000000 + 8000447c: 0008b183 ld x3,0(x17) + 80004480: 00888893 addi x17,x17,8 + +0000000080004484 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + sm4ed x7, x20, x3, 2 # perform operation + 80004484: b03a03b3 sm4ed x7,x20,x3,0x2 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004488: 0007b203 ld x4,0(x15) + 8000448c: 00720c63 beq x4,x7,800044a4 + 80004490: 531062ef jal x5,8000b1c0 + 80004494: 80004484 .word 0x80004484 + 80004498: 00000000 .word 0x00000000 + 8000449c: 8001a4fd .word 0x8001a4fd + 800044a0: 00000000 .word 0x00000000 + 800044a4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x00000000ffffffff + 800044a8: 0008b403 ld x8,0(x17) + 800044ac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000100000001 + 800044b0: 0008b083 ld x1,0(x17) + 800044b4: 00888893 addi x17,x17,8 + +00000000800044b8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + sm4ed x7, x8, x1, 0 # perform operation + 800044b8: 301403b3 sm4ed x7,x8,x1,0x0 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044bc: 0007b203 ld x4,0(x15) + 800044c0: 00720c63 beq x4,x7,800044d8 + 800044c4: 4fd062ef jal x5,8000b1c0 + 800044c8: 800044b8 .word 0x800044b8 + 800044cc: 00000000 .word 0x00000000 + 800044d0: 8001a55f .word 0x8001a55f + 800044d4: 00000000 .word 0x00000000 + 800044d8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x00000000fffffffe + 800044dc: 0008be03 ld x28,0(x17) + 800044e0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x0000000000000000 + 800044e4: 0008b183 ld x3,0(x17) + 800044e8: 00888893 addi x17,x17,8 + +00000000800044ec : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sm4ed x16, x28, x3, 3 # perform operation + 800044ec: f03e0833 sm4ed x16,x28,x3,0x3 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f0: 0007b203 ld x4,0(x15) + 800044f4: 01020c63 beq x4,x16,8000450c + 800044f8: 4c9062ef jal x5,8000b1c0 + 800044fc: 800044ec .word 0x800044ec + 80004500: 00000000 .word 0x00000000 + 80004504: 8001a5c1 .word 0x8001a5c1 + 80004508: 00000000 .word 0x00000000 + 8000450c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x00000000fffffffe + 80004510: 0008ba83 ld x21,0(x17) + 80004514: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x0000000000000001 + 80004518: 0008be83 ld x29,0(x17) + 8000451c: 00888893 addi x17,x17,8 + +0000000080004520 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sm4ed x1, x21, x29, 0 # perform operation + 80004520: 31da80b3 sm4ed x1,x21,x29,0x0 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004524: 0007b203 ld x4,0(x15) + 80004528: 00120c63 beq x4,x1,80004540 + 8000452c: 495062ef jal x5,8000b1c0 + 80004530: 80004520 .word 0x80004520 + 80004534: 00000000 .word 0x00000000 + 80004538: 8001a61b .word 0x8001a61b + 8000453c: 00000000 .word 0x00000000 + 80004540: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x00000000fffffffe + 80004544: 0008b383 ld x7,0(x17) + 80004548: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000000000002 + 8000454c: 0008b803 ld x16,0(x17) + 80004550: 00888893 addi x17,x17,8 + +0000000080004554 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sm4ed x2, x7, x16, 1 # perform operation + 80004554: 71038133 sm4ed x2,x7,x16,0x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004558: 0007b203 ld x4,0(x15) + 8000455c: 00220c63 beq x4,x2,80004574 + 80004560: 461062ef jal x5,8000b1c0 + 80004564: 80004554 .word 0x80004554 + 80004568: 00000000 .word 0x00000000 + 8000456c: 8001a675 .word 0x8001a675 + 80004570: 00000000 .word 0x00000000 + 80004574: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x00000000fffffffe + 80004578: 0008b083 ld x1,0(x17) + 8000457c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x8000000000000000 + 80004580: 0008bf03 ld x30,0(x17) + 80004584: 00888893 addi x17,x17,8 + +0000000080004588 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + sm4ed x16, x1, x30, 2 # perform operation + 80004588: b1e08833 sm4ed x16,x1,x30,0x2 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 8000458c: 0007b203 ld x4,0(x15) + 80004590: 01020c63 beq x4,x16,800045a8 + 80004594: 42d062ef jal x5,8000b1c0 + 80004598: 80004588 .word 0x80004588 + 8000459c: 00000000 .word 0x00000000 + 800045a0: 8001a6cf .word 0x8001a6cf + 800045a4: 00000000 .word 0x00000000 + 800045a8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x31) # load rs1: x31 = 0x00000000fffffffe + 800045ac: 0008bf83 ld x31,0(x17) + 800045b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0x8000000000000001 + 800045b4: 0008b183 ld x3,0(x17) + 800045b8: 00888893 addi x17,x17,8 + +00000000800045bc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + sm4ed x6, x31, x3, 0 # perform operation + 800045bc: 303f8333 sm4ed x6,x31,x3,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c0: 0007b203 ld x4,0(x15) + 800045c4: 00620c63 beq x4,x6,800045dc + 800045c8: 3f9062ef jal x5,8000b1c0 + 800045cc: 800045bc .word 0x800045bc + 800045d0: 00000000 .word 0x00000000 + 800045d4: 8001a738 .word 0x8001a738 + 800045d8: 00000000 .word 0x00000000 + 800045dc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x00000000fffffffe + 800045e0: 0008b603 ld x12,0(x17) + 800045e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x7fffffffffffffff + 800045e8: 0008b403 ld x8,0(x17) + 800045ec: 00888893 addi x17,x17,8 + +00000000800045f0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + sm4ed x11, x12, x8, 2 # perform operation + 800045f0: b08605b3 sm4ed x11,x12,x8,0x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f4: 0007b203 ld x4,0(x15) + 800045f8: 00b20c63 beq x4,x11,80004610 + 800045fc: 3c5062ef jal x5,8000b1c0 + 80004600: 800045f0 .word 0x800045f0 + 80004604: 00000000 .word 0x00000000 + 80004608: 8001a7a1 .word 0x8001a7a1 + 8000460c: 00000000 .word 0x00000000 + 80004610: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x00000000fffffffe + 80004614: 0008bf03 ld x30,0(x17) + 80004618: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs2: x22 = 0x7ffffffffffffffe + 8000461c: 0008bb03 ld x22,0(x17) + 80004620: 00888893 addi x17,x17,8 + +0000000080004624 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + sm4ed x11, x30, x22, 1 # perform operation + 80004624: 716f05b3 sm4ed x11,x30,x22,0x1 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004628: 0007b203 ld x4,0(x15) + 8000462c: 00b20c63 beq x4,x11,80004644 + 80004630: 391062ef jal x5,8000b1c0 + 80004634: 80004624 .word 0x80004624 + 80004638: 00000000 .word 0x00000000 + 8000463c: 8001a80a .word 0x8001a80a + 80004640: 00000000 .word 0x00000000 + 80004644: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x00000000fffffffe + 80004648: 0008bc83 ld x25,0(x17) + 8000464c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0xffffffffffffffff + 80004650: 0008b483 ld x9,0(x17) + 80004654: 00888893 addi x17,x17,8 + +0000000080004658 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + sm4ed x6, x25, x9, 0 # perform operation + 80004658: 309c8333 sm4ed x6,x25,x9,0x0 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 8000465c: 0007b203 ld x4,0(x15) + 80004660: 00620c63 beq x4,x6,80004678 + 80004664: 35d062ef jal x5,8000b1c0 + 80004668: 80004658 .word 0x80004658 + 8000466c: 00000000 .word 0x00000000 + 80004670: 8001a873 .word 0x8001a873 + 80004674: 00000000 .word 0x00000000 + 80004678: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x00000000fffffffe + 8000467c: 0008bd03 ld x26,0(x17) + 80004680: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0xfffffffffffffffe + 80004684: 0008bc83 ld x25,0(x17) + 80004688: 00888893 addi x17,x17,8 + +000000008000468c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + sm4ed x30, x26, x25, 1 # perform operation + 8000468c: 719d0f33 sm4ed x30,x26,x25,0x1 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004690: 0007b203 ld x4,0(x15) + 80004694: 01e20c63 beq x4,x30,800046ac + 80004698: 329062ef jal x5,8000b1c0 + 8000469c: 8000468c .word 0x8000468c + 800046a0: 00000000 .word 0x00000000 + 800046a4: 8001a8dc .word 0x8001a8dc + 800046a8: 00000000 .word 0x00000000 + 800046ac: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x00000000fffffffe + 800046b0: 0008b183 ld x3,0(x17) + 800046b4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 800046b8: 0008bd03 ld x26,0(x17) + 800046bc: 00888893 addi x17,x17,8 + +00000000800046c0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + sm4ed x7, x3, x26, 2 # perform operation + 800046c0: b1a183b3 sm4ed x7,x3,x26,0x2 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c4: 0007b203 ld x4,0(x15) + 800046c8: 00720c63 beq x4,x7,800046e0 + 800046cc: 2f5062ef jal x5,8000b1c0 + 800046d0: 800046c0 .word 0x800046c0 + 800046d4: 00000000 .word 0x00000000 + 800046d8: 8001a945 .word 0x8001a945 + 800046dc: 00000000 .word 0x00000000 + 800046e0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x19) # load rs1: x19 = 0x00000000fffffffe + 800046e4: 0008b983 ld x19,0(x17) + 800046e8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0xaaaaaaaaaaaaaaaa + 800046ec: 0008bd83 ld x27,0(x17) + 800046f0: 00888893 addi x17,x17,8 + +00000000800046f4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x10, x19, x27, 3 # perform operation + 800046f4: f1b98533 sm4ed x10,x19,x27,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046f8: 0007b203 ld x4,0(x15) + 800046fc: 00a20c63 beq x4,x10,80004714 + 80004700: 2c1062ef jal x5,8000b1c0 + 80004704: 800046f4 .word 0x800046f4 + 80004708: 00000000 .word 0x00000000 + 8000470c: 8001a9ae .word 0x8001a9ae + 80004710: 00000000 .word 0x00000000 + 80004714: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x00000000fffffffe + 80004718: 0008b103 ld x2,0(x17) + 8000471c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x5555555555555555 + 80004720: 0008ba83 ld x21,0(x17) + 80004724: 00888893 addi x17,x17,8 + +0000000080004728 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + sm4ed x23, x2, x21, 0 # perform operation + 80004728: 31510bb3 sm4ed x23,x2,x21,0x0 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 8000472c: 0007b203 ld x4,0(x15) + 80004730: 01720c63 beq x4,x23,80004748 + 80004734: 28d062ef jal x5,8000b1c0 + 80004738: 80004728 .word 0x80004728 + 8000473c: 00000000 .word 0x00000000 + 80004740: 8001aa17 .word 0x8001aa17 + 80004744: 00000000 .word 0x00000000 + 80004748: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x00000000fffffffe + 8000474c: 0008b703 ld x14,0(x17) + 80004750: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs2: x21 = 0x00000000ffffffff + 80004754: 0008ba83 ld x21,0(x17) + 80004758: 00888893 addi x17,x17,8 + +000000008000475c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sm4ed x1, x14, x21, 2 # perform operation + 8000475c: b15700b3 sm4ed x1,x14,x21,0x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004760: 0007b203 ld x4,0(x15) + 80004764: 00120c63 beq x4,x1,8000477c + 80004768: 259062ef jal x5,8000b1c0 + 8000476c: 8000475c .word 0x8000475c + 80004770: 00000000 .word 0x00000000 + 80004774: 8001aa80 .word 0x8001aa80 + 80004778: 00000000 .word 0x00000000 + 8000477c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs1: x25 = 0x00000000fffffffe + 80004780: 0008bc83 ld x25,0(x17) + 80004784: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x00000000fffffffe + 80004788: 0008b103 ld x2,0(x17) + 8000478c: 00888893 addi x17,x17,8 + +0000000080004790 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sm4ed x11, x25, x2, 2 # perform operation + 80004790: b02c85b3 sm4ed x11,x25,x2,0x2 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004794: 0007b203 ld x4,0(x15) + 80004798: 00b20c63 beq x4,x11,800047b0 + 8000479c: 225062ef jal x5,8000b1c0 + 800047a0: 80004790 .word 0x80004790 + 800047a4: 00000000 .word 0x00000000 + 800047a8: 8001aae1 .word 0x8001aae1 + 800047ac: 00000000 .word 0x00000000 + 800047b0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs1: x26 = 0x00000000fffffffe + 800047b4: 0008bd03 ld x26,0(x17) + 800047b8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000100000000 + 800047bc: 0008b803 ld x16,0(x17) + 800047c0: 00888893 addi x17,x17,8 + +00000000800047c4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + sm4ed x7, x26, x16, 3 # perform operation + 800047c4: f10d03b3 sm4ed x7,x26,x16,0x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047c8: 0007b203 ld x4,0(x15) + 800047cc: 00720c63 beq x4,x7,800047e4 + 800047d0: 1f1062ef jal x5,8000b1c0 + 800047d4: 800047c4 .word 0x800047c4 + 800047d8: 00000000 .word 0x00000000 + 800047dc: 8001ab42 .word 0x8001ab42 + 800047e0: 00000000 .word 0x00000000 + 800047e4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x00000000fffffffe + 800047e8: 0008b383 ld x7,0(x17) + 800047ec: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000100000001 + 800047f0: 0008b583 ld x11,0(x17) + 800047f4: 00888893 addi x17,x17,8 + +00000000800047f8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + sm4ed x1, x7, x11, 1 # perform operation + 800047f8: 70b380b3 sm4ed x1,x7,x11,0x1 + # Check if x1 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047fc: 0007b203 ld x4,0(x15) + 80004800: 00120c63 beq x4,x1,80004818 + 80004804: 1bd062ef jal x5,8000b1c0 + 80004808: 800047f8 .word 0x800047f8 + 8000480c: 00000000 .word 0x00000000 + 80004810: 8001aba4 .word 0x8001aba4 + 80004814: 00000000 .word 0x00000000 + 80004818: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000000 + 8000481c: 0008b583 ld x11,0(x17) + 80004820: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0x0000000000000000 + 80004824: 0008b383 ld x7,0(x17) + 80004828: 00888893 addi x17,x17,8 + +000000008000482c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + sm4ed x12, x11, x7, 0 # perform operation + 8000482c: 30758633 sm4ed x12,x11,x7,0x0 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004830: 0007b203 ld x4,0(x15) + 80004834: 00c20c63 beq x4,x12,8000484c + 80004838: 189062ef jal x5,8000b1c0 + 8000483c: 8000482c .word 0x8000482c + 80004840: 00000000 .word 0x00000000 + 80004844: 8001ac06 .word 0x8001ac06 + 80004848: 00000000 .word 0x00000000 + 8000484c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x0000000100000000 + 80004850: 0008b303 ld x6,0(x17) + 80004854: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x0000000000000001 + 80004858: 0008be03 ld x28,0(x17) + 8000485c: 00888893 addi x17,x17,8 + +0000000080004860 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + sm4ed x10, x6, x28, 3 # perform operation + 80004860: f1c30533 sm4ed x10,x6,x28,0x3 + # Check if x10 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x10, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004864: 0007b203 ld x4,0(x15) + 80004868: 00a20c63 beq x4,x10,80004880 + 8000486c: 155062ef jal x5,8000b1c0 + 80004870: 80004860 .word 0x80004860 + 80004874: 00000000 .word 0x00000000 + 80004878: 8001ac61 .word 0x8001ac61 + 8000487c: 00000000 .word 0x00000000 + 80004880: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000100000000 + 80004884: 0008b483 ld x9,0(x17) + 80004888: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x0000000000000002 + 8000488c: 0008b583 ld x11,0(x17) + 80004890: 00888893 addi x17,x17,8 + +0000000080004894 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + sm4ed x21, x9, x11, 3 # perform operation + 80004894: f0b48ab3 sm4ed x21,x9,x11,0x3 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004898: 0007b203 ld x4,0(x15) + 8000489c: 01520c63 beq x4,x21,800048b4 + 800048a0: 121062ef jal x5,8000b1c0 + 800048a4: 80004894 .word 0x80004894 + 800048a8: 00000000 .word 0x00000000 + 800048ac: 8001acbc .word 0x8001acbc + 800048b0: 00000000 .word 0x00000000 + 800048b4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000100000000 + 800048b8: 0008ba83 ld x21,0(x17) + 800048bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x8000000000000000 + 800048c0: 0008b303 ld x6,0(x17) + 800048c4: 00888893 addi x17,x17,8 + +00000000800048c8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + sm4ed x9, x21, x6, 3 # perform operation + 800048c8: f06a84b3 sm4ed x9,x21,x6,0x3 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048cc: 0007b203 ld x4,0(x15) + 800048d0: 00920c63 beq x4,x9,800048e8 + 800048d4: 0ed062ef jal x5,8000b1c0 + 800048d8: 800048c8 .word 0x800048c8 + 800048dc: 00000000 .word 0x00000000 + 800048e0: 8001ad17 .word 0x8001ad17 + 800048e4: 00000000 .word 0x00000000 + 800048e8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000100000000 + 800048ec: 0008b703 ld x14,0(x17) + 800048f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8000000000000001 + 800048f4: 0008b483 ld x9,0(x17) + 800048f8: 00888893 addi x17,x17,8 + +00000000800048fc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + sm4ed x11, x14, x9, 0 # perform operation + 800048fc: 309705b3 sm4ed x11,x14,x9,0x0 + # Check if x11 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x11, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004900: 0007b203 ld x4,0(x15) + 80004904: 00b20c63 beq x4,x11,8000491c + 80004908: 0b9062ef jal x5,8000b1c0 + 8000490c: 800048fc .word 0x800048fc + 80004910: 00000000 .word 0x00000000 + 80004914: 8001ad81 .word 0x8001ad81 + 80004918: 00000000 .word 0x00000000 + 8000491c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000100000000 + 80004920: 0008ba83 ld x21,0(x17) + 80004924: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x7fffffffffffffff + 80004928: 0008b483 ld x9,0(x17) + 8000492c: 00888893 addi x17,x17,8 + +0000000080004930 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + sm4ed x7, x21, x9, 1 # perform operation + 80004930: 709a83b3 sm4ed x7,x21,x9,0x1 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004934: 0007b203 ld x4,0(x15) + 80004938: 00720c63 beq x4,x7,80004950 + 8000493c: 085062ef jal x5,8000b1c0 + 80004940: 80004930 .word 0x80004930 + 80004944: 00000000 .word 0x00000000 + 80004948: 8001adeb .word 0x8001adeb + 8000494c: 00000000 .word 0x00000000 + 80004950: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0x0000000100000000 + 80004954: 0008b083 ld x1,0(x17) + 80004958: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x7ffffffffffffffe + 8000495c: 0008b103 ld x2,0(x17) + 80004960: 00888893 addi x17,x17,8 + +0000000080004964 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + sm4ed x23, x1, x2, 0 # perform operation + 80004964: 30208bb3 sm4ed x23,x1,x2,0x0 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004968: 0007b203 ld x4,0(x15) + 8000496c: 01720c63 beq x4,x23,80004984 + 80004970: 051062ef jal x5,8000b1c0 + 80004974: 80004964 .word 0x80004964 + 80004978: 00000000 .word 0x00000000 + 8000497c: 8001ae55 .word 0x8001ae55 + 80004980: 00000000 .word 0x00000000 + 80004984: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs1: x27 = 0x0000000100000000 + 80004988: 0008bd83 ld x27,0(x17) + 8000498c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xffffffffffffffff + 80004990: 0008b403 ld x8,0(x17) + 80004994: 00888893 addi x17,x17,8 + +0000000080004998 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + sm4ed x7, x27, x8, 3 # perform operation + 80004998: f08d83b3 sm4ed x7,x27,x8,0x3 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 8000499c: 0007b203 ld x4,0(x15) + 800049a0: 00720c63 beq x4,x7,800049b8 + 800049a4: 01d062ef jal x5,8000b1c0 + 800049a8: 80004998 .word 0x80004998 + 800049ac: 00000000 .word 0x00000000 + 800049b0: 8001aebf .word 0x8001aebf + 800049b4: 00000000 .word 0x00000000 + 800049b8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x0000000100000000 + 800049bc: 0008b703 ld x14,0(x17) + 800049c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xfffffffffffffffe + 800049c4: 0008b183 ld x3,0(x17) + 800049c8: 00888893 addi x17,x17,8 + +00000000800049cc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + sm4ed x9, x14, x3, 1 # perform operation + 800049cc: 703704b3 sm4ed x9,x14,x3,0x1 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d0: 0007b203 ld x4,0(x15) + 800049d4: 00920c63 beq x4,x9,800049ec + 800049d8: 7e8062ef jal x5,8000b1c0 + 800049dc: 800049cc .word 0x800049cc + 800049e0: 00000000 .word 0x00000000 + 800049e4: 8001af29 .word 0x8001af29 + 800049e8: 00000000 .word 0x00000000 + 800049ec: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x0000000100000000 + 800049f0: 0008b383 ld x7,0(x17) + 800049f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0x5bbc887763ae86f2 + 800049f8: 0008b503 ld x10,0(x17) + 800049fc: 00888893 addi x17,x17,8 + +0000000080004a00 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + sm4ed x18, x7, x10, 2 # perform operation + 80004a00: b0a38933 sm4ed x18,x7,x10,0x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a04: 0007b203 ld x4,0(x15) + 80004a08: 01220c63 beq x4,x18,80004a20 + 80004a0c: 7b4062ef jal x5,8000b1c0 + 80004a10: 80004a00 .word 0x80004a00 + 80004a14: 00000000 .word 0x00000000 + 80004a18: 8001af93 .word 0x8001af93 + 80004a1c: 00000000 .word 0x00000000 + 80004a20: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x0000000100000000 + 80004a24: 0008b103 ld x2,0(x17) + 80004a28: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 80004a2c: 0008b903 ld x18,0(x17) + 80004a30: 00888893 addi x17,x17,8 + +0000000080004a34 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x13, x2, x18, 2 # perform operation + 80004a34: b12106b3 sm4ed x13,x2,x18,0x2 + # Check if x13 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x13, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a38: 0007b203 ld x4,0(x15) + 80004a3c: 00d20c63 beq x4,x13,80004a54 + 80004a40: 780062ef jal x5,8000b1c0 + 80004a44: 80004a34 .word 0x80004a34 + 80004a48: 00000000 .word 0x00000000 + 80004a4c: 8001affd .word 0x8001affd + 80004a50: 00000000 .word 0x00000000 + 80004a54: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x0000000100000000 + 80004a58: 0008b483 ld x9,0(x17) + 80004a5c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x5555555555555555 + 80004a60: 0008bb83 ld x23,0(x17) + 80004a64: 00888893 addi x17,x17,8 + +0000000080004a68 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + sm4ed x30, x9, x23, 0 # perform operation + 80004a68: 31748f33 sm4ed x30,x9,x23,0x0 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a6c: 0007b203 ld x4,0(x15) + 80004a70: 01e20c63 beq x4,x30,80004a88 + 80004a74: 74c062ef jal x5,8000b1c0 + 80004a78: 80004a68 .word 0x80004a68 + 80004a7c: 00000000 .word 0x00000000 + 80004a80: 8001b067 .word 0x8001b067 + 80004a84: 00000000 .word 0x00000000 + 80004a88: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000100000000 + 80004a8c: 0008ba83 ld x21,0(x17) + 80004a90: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x00000000ffffffff + 80004a94: 0008bb83 ld x23,0(x17) + 80004a98: 00888893 addi x17,x17,8 + +0000000080004a9c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + sm4ed x22, x21, x23, 3 # perform operation + 80004a9c: f17a8b33 sm4ed x22,x21,x23,0x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa0: 0007b203 ld x4,0(x15) + 80004aa4: 01620c63 beq x4,x22,80004abc + 80004aa8: 718062ef jal x5,8000b1c0 + 80004aac: 80004a9c .word 0x80004a9c + 80004ab0: 00000000 .word 0x00000000 + 80004ab4: 8001b0d1 .word 0x8001b0d1 + 80004ab8: 00000000 .word 0x00000000 + 80004abc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000100000000 + 80004ac0: 0008b603 ld x12,0(x17) + 80004ac4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs2: x30 = 0x00000000fffffffe + 80004ac8: 0008bf03 ld x30,0(x17) + 80004acc: 00888893 addi x17,x17,8 + +0000000080004ad0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + sm4ed x18, x12, x30, 2 # perform operation + 80004ad0: b1e60933 sm4ed x18,x12,x30,0x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad4: 0007b203 ld x4,0(x15) + 80004ad8: 01220c63 beq x4,x18,80004af0 + 80004adc: 6e4062ef jal x5,8000b1c0 + 80004ae0: 80004ad0 .word 0x80004ad0 + 80004ae4: 00000000 .word 0x00000000 + 80004ae8: 8001b133 .word 0x8001b133 + 80004aec: 00000000 .word 0x00000000 + 80004af0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x0000000100000000 + 80004af4: 0008b383 ld x7,0(x17) + 80004af8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x27) # load rs2: x27 = 0x0000000100000000 + 80004afc: 0008bd83 ld x27,0(x17) + 80004b00: 00888893 addi x17,x17,8 + +0000000080004b04 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + sm4ed x22, x7, x27, 3 # perform operation + 80004b04: f1b38b33 sm4ed x22,x7,x27,0x3 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b08: 0007b203 ld x4,0(x15) + 80004b0c: 01620c63 beq x4,x22,80004b24 + 80004b10: 6b0062ef jal x5,8000b1c0 + 80004b14: 80004b04 .word 0x80004b04 + 80004b18: 00000000 .word 0x00000000 + 80004b1c: 8001b195 .word 0x8001b195 + 80004b20: 00000000 .word 0x00000000 + 80004b24: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x30) # load rs1: x30 = 0x0000000100000000 + 80004b28: 0008bf03 ld x30,0(x17) + 80004b2c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0x0000000100000001 + 80004b30: 0008b083 ld x1,0(x17) + 80004b34: 00888893 addi x17,x17,8 + +0000000080004b38 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + sm4ed x9, x30, x1, 3 # perform operation + 80004b38: f01f04b3 sm4ed x9,x30,x1,0x3 + # Check if x9 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x9, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b3c: 0007b203 ld x4,0(x15) + 80004b40: 00920c63 beq x4,x9,80004b58 + 80004b44: 67c062ef jal x5,8000b1c0 + 80004b48: 80004b38 .word 0x80004b38 + 80004b4c: 00000000 .word 0x00000000 + 80004b50: 8001b1f8 .word 0x8001b1f8 + 80004b54: 00000000 .word 0x00000000 + 80004b58: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004b5c: 0008b583 ld x11,0(x17) + 80004b60: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x0000000000000000 + 80004b64: 0008b703 ld x14,0(x17) + 80004b68: 00888893 addi x17,x17,8 + +0000000080004b6c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + sm4ed x12, x11, x14, 0 # perform operation + 80004b6c: 30e58633 sm4ed x12,x11,x14,0x0 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b70: 0007b203 ld x4,0(x15) + 80004b74: 00c20c63 beq x4,x12,80004b8c + 80004b78: 648062ef jal x5,8000b1c0 + 80004b7c: 80004b6c .word 0x80004b6c + 80004b80: 00000000 .word 0x00000000 + 80004b84: 8001b25b .word 0x8001b25b + 80004b88: 00000000 .word 0x00000000 + 80004b8c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004b90: 0008b583 ld x11,0(x17) + 80004b94: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x0000000000000001 + 80004b98: 0008b803 ld x16,0(x17) + 80004b9c: 00888893 addi x17,x17,8 + +0000000080004ba0 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + sm4ed x6, x11, x16, 1 # perform operation + 80004ba0: 71058333 sm4ed x6,x11,x16,0x1 + # Check if x6 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x6, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba4: 0007b203 ld x4,0(x15) + 80004ba8: 00620c63 beq x4,x6,80004bc0 + 80004bac: 614062ef jal x5,8000b1c0 + 80004bb0: 80004ba0 .word 0x80004ba0 + 80004bb4: 00000000 .word 0x00000000 + 80004bb8: 8001b2b6 .word 0x8001b2b6 + 80004bbc: 00000000 .word 0x00000000 + 80004bc0: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x0000000100000001 + 80004bc4: 0008b503 ld x10,0(x17) + 80004bc8: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x0000000000000002 + 80004bcc: 0008b403 ld x8,0(x17) + 80004bd0: 00888893 addi x17,x17,8 + +0000000080004bd4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + sm4ed x2, x10, x8, 1 # perform operation + 80004bd4: 70850133 sm4ed x2,x10,x8,0x1 + # Check if x2 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bd8: 0007b203 ld x4,0(x15) + 80004bdc: 00220c63 beq x4,x2,80004bf4 + 80004be0: 5e0062ef jal x5,8000b1c0 + 80004be4: 80004bd4 .word 0x80004bd4 + 80004be8: 00000000 .word 0x00000000 + 80004bec: 8001b311 .word 0x8001b311 + 80004bf0: 00000000 .word 0x00000000 + 80004bf4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x0000000100000001 + 80004bf8: 0008b603 ld x12,0(x17) + 80004bfc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x8000000000000000 + 80004c00: 0008bc83 ld x25,0(x17) + 80004c04: 00888893 addi x17,x17,8 + +0000000080004c08 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + sm4ed x31, x12, x25, 1 # perform operation + 80004c08: 71960fb3 sm4ed x31,x12,x25,0x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c0c: 0007b203 ld x4,0(x15) + 80004c10: 01f20c63 beq x4,x31,80004c28 + 80004c14: 5ac062ef jal x5,8000b1c0 + 80004c18: 80004c08 .word 0x80004c08 + 80004c1c: 00000000 .word 0x00000000 + 80004c20: 8001b36c .word 0x8001b36c + 80004c24: 00000000 .word 0x00000000 + 80004c28: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004c2c: 0008b583 ld x11,0(x17) + 80004c30: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x8000000000000001 + 80004c34: 0008bc03 ld x24,0(x17) + 80004c38: 00888893 addi x17,x17,8 + +0000000080004c3c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + sm4ed x21, x11, x24, 1 # perform operation + 80004c3c: 71858ab3 sm4ed x21,x11,x24,0x1 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c40: 0007b203 ld x4,0(x15) + 80004c44: 01520c63 beq x4,x21,80004c5c + 80004c48: 578062ef jal x5,8000b1c0 + 80004c4c: 80004c3c .word 0x80004c3c + 80004c50: 00000000 .word 0x00000000 + 80004c54: 8001b3d6 .word 0x8001b3d6 + 80004c58: 00000000 .word 0x00000000 + 80004c5c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000100000001 + 80004c60: 0008be03 ld x28,0(x17) + 80004c64: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x7fffffffffffffff + 80004c68: 0008b303 ld x6,0(x17) + 80004c6c: 00888893 addi x17,x17,8 + +0000000080004c70 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + sm4ed x30, x28, x6, 2 # perform operation + 80004c70: b06e0f33 sm4ed x30,x28,x6,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c74: 0007b203 ld x4,0(x15) + 80004c78: 01e20c63 beq x4,x30,80004c90 + 80004c7c: 544062ef jal x5,8000b1c0 + 80004c80: 80004c70 .word 0x80004c70 + 80004c84: 00000000 .word 0x00000000 + 80004c88: 8001b440 .word 0x8001b440 + 80004c8c: 00000000 .word 0x00000000 + 80004c90: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x22) # load rs1: x22 = 0x0000000100000001 + 80004c94: 0008bb03 ld x22,0(x17) + 80004c98: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs2: x29 = 0x7ffffffffffffffe + 80004c9c: 0008be83 ld x29,0(x17) + 80004ca0: 00888893 addi x17,x17,8 + +0000000080004ca4 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + sm4ed x30, x22, x29, 3 # perform operation + 80004ca4: f1db0f33 sm4ed x30,x22,x29,0x3 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004ca8: 0007b203 ld x4,0(x15) + 80004cac: 01e20c63 beq x4,x30,80004cc4 + 80004cb0: 510062ef jal x5,8000b1c0 + 80004cb4: 80004ca4 .word 0x80004ca4 + 80004cb8: 00000000 .word 0x00000000 + 80004cbc: 8001b4aa .word 0x8001b4aa + 80004cc0: 00000000 .word 0x00000000 + 80004cc4: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x0000000100000001 + 80004cc8: 0008b103 ld x2,0(x17) + 80004ccc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xffffffffffffffff + 80004cd0: 0008b803 ld x16,0(x17) + 80004cd4: 00888893 addi x17,x17,8 + +0000000080004cd8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + sm4ed x18, x2, x16, 2 # perform operation + 80004cd8: b1010933 sm4ed x18,x2,x16,0x2 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cdc: 0007b203 ld x4,0(x15) + 80004ce0: 01220c63 beq x4,x18,80004cf8 + 80004ce4: 4dc062ef jal x5,8000b1c0 + 80004ce8: 80004cd8 .word 0x80004cd8 + 80004cec: 00000000 .word 0x00000000 + 80004cf0: 8001b514 .word 0x8001b514 + 80004cf4: 00000000 .word 0x00000000 + 80004cf8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004cfc: 0008b583 ld x11,0(x17) + 80004d00: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xfffffffffffffffe + 80004d04: 0008b303 ld x6,0(x17) + 80004d08: 00888893 addi x17,x17,8 + +0000000080004d0c : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + sm4ed x23, x11, x6, 0 # perform operation + 80004d0c: 30658bb3 sm4ed x23,x11,x6,0x0 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d10: 0007b203 ld x4,0(x15) + 80004d14: 01720c63 beq x4,x23,80004d2c + 80004d18: 4a8062ef jal x5,8000b1c0 + 80004d1c: 80004d0c .word 0x80004d0c + 80004d20: 00000000 .word 0x00000000 + 80004d24: 8001b57e .word 0x8001b57e + 80004d28: 00000000 .word 0x00000000 + 80004d2c: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs1: x28 = 0x0000000100000001 + 80004d30: 0008be03 ld x28,0(x17) + 80004d34: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80004d38: 0008b303 ld x6,0(x17) + 80004d3c: 00888893 addi x17,x17,8 + +0000000080004d40 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + sm4ed x29, x28, x6, 0 # perform operation + 80004d40: 306e0eb3 sm4ed x29,x28,x6,0x0 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d44: 0007b203 ld x4,0(x15) + 80004d48: 01d20c63 beq x4,x29,80004d60 + 80004d4c: 474062ef jal x5,8000b1c0 + 80004d50: 80004d40 .word 0x80004d40 + 80004d54: 00000000 .word 0x00000000 + 80004d58: 8001b5e8 .word 0x8001b5e8 + 80004d5c: 00000000 .word 0x00000000 + 80004d60: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x17, x21) # load rs1: x21 = 0x0000000100000001 + 80004d64: 0008ba83 ld x21,0(x17) + 80004d68: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xaaaaaaaaaaaaaaaa + 80004d6c: 0008b583 ld x11,0(x17) + 80004d70: 00888893 addi x17,x17,8 + +0000000080004d74 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ed x28, x21, x11, 3 # perform operation + 80004d74: f0ba8e33 sm4ed x28,x21,x11,0x3 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d78: 0007b203 ld x4,0(x15) + 80004d7c: 01c20c63 beq x4,x28,80004d94 + 80004d80: 440062ef jal x5,8000b1c0 + 80004d84: 80004d74 .word 0x80004d74 + 80004d88: 00000000 .word 0x00000000 + 80004d8c: 8001b652 .word 0x8001b652 + 80004d90: 00000000 .word 0x00000000 + 80004d94: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x0000000100000001 + 80004d98: 0008b103 ld x2,0(x17) + 80004d9c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0x5555555555555555 + 80004da0: 0008b683 ld x13,0(x17) + 80004da4: 00888893 addi x17,x17,8 + +0000000080004da8 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + sm4ed x30, x2, x13, 0 # perform operation + 80004da8: 30d10f33 sm4ed x30,x2,x13,0x0 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004dac: 0007b203 ld x4,0(x15) + 80004db0: 01e20c63 beq x4,x30,80004dc8 + 80004db4: 40c062ef jal x5,8000b1c0 + 80004db8: 80004da8 .word 0x80004da8 + 80004dbc: 00000000 .word 0x00000000 + 80004dc0: 8001b6bc .word 0x8001b6bc + 80004dc4: 00000000 .word 0x00000000 + 80004dc8: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x0000000100000001 + 80004dcc: 0008b183 ld x3,0(x17) + 80004dd0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0x00000000ffffffff + 80004dd4: 0008b403 ld x8,0(x17) + 80004dd8: 00888893 addi x17,x17,8 + +0000000080004ddc : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + sm4ed x7, x3, x8, 2 # perform operation + 80004ddc: b08183b3 sm4ed x7,x3,x8,0x2 + # Check if x7 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x7, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de0: 0007b203 ld x4,0(x15) + 80004de4: 00720c63 beq x4,x7,80004dfc + 80004de8: 3d8062ef jal x5,8000b1c0 + 80004dec: 80004ddc .word 0x80004ddc + 80004df0: 00000000 .word 0x00000000 + 80004df4: 8001b726 .word 0x8001b726 + 80004df8: 00000000 .word 0x00000000 + 80004dfc: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x17, x18) # load rs1: x18 = 0x0000000100000001 + 80004e00: 0008b903 ld x18,0(x17) + 80004e04: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x00000000fffffffe + 80004e08: 0008b483 ld x9,0(x17) + 80004e0c: 00888893 addi x17,x17,8 + +0000000080004e10 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + sm4ed x19, x18, x9, 3 # perform operation + 80004e10: f09909b3 sm4ed x19,x18,x9,0x3 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e14: 0007b203 ld x4,0(x15) + 80004e18: 01320c63 beq x4,x19,80004e30 + 80004e1c: 3a4062ef jal x5,8000b1c0 + 80004e20: 80004e10 .word 0x80004e10 + 80004e24: 00000000 .word 0x00000000 + 80004e28: 8001b788 .word 0x8001b788 + 80004e2c: 00000000 .word 0x00000000 + 80004e30: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0x0000000100000001 + 80004e34: 0008b583 ld x11,0(x17) + 80004e38: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0000000100000000 + 80004e3c: 0008b603 ld x12,0(x17) + 80004e40: 00888893 addi x17,x17,8 + +0000000080004e44 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + sm4ed x3, x11, x12, 0 # perform operation + 80004e44: 30c581b3 sm4ed x3,x11,x12,0x0 + # Check if x3 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x3, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e48: 0007b203 ld x4,0(x15) + 80004e4c: 00320c63 beq x4,x3,80004e64 + 80004e50: 370062ef jal x5,8000b1c0 + 80004e54: 80004e44 .word 0x80004e44 + 80004e58: 00000000 .word 0x00000000 + 80004e5c: 8001b7ea .word 0x8001b7ea + 80004e60: 00000000 .word 0x00000000 + 80004e64: 00878793 addi x15,x15,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x17, x29) # load rs1: x29 = 0x0000000100000001 + 80004e68: 0008be83 ld x29,0(x17) + 80004e6c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x26) # load rs2: x26 = 0x0000000100000001 + 80004e70: 0008bd03 ld x26,0(x17) + 80004e74: 00888893 addi x17,x17,8 + +0000000080004e78 : +Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + sm4ed x16, x29, x26, 2 # perform operation + 80004e78: b1ae8833 sm4ed x16,x29,x26,0x2 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zksed_sm4ed_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e7c: 0007b203 ld x4,0(x15) + 80004e80: 01020c63 beq x4,x16,80004e98 + 80004e84: 33c062ef jal x5,8000b1c0 + 80004e88: 80004e78 .word 0x80004e78 + 80004e8c: 00000000 .word 0x00000000 + 80004e90: 8001b84d .word 0x8001b84d + 80004e94: 00000000 .word 0x00000000 + 80004e98: 00878793 addi x15,x15,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs1: x0 = 0x1cc6de60274046c1 + 80004e9c: 0008b003 ld x0,0(x17) + 80004ea0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x0) # load rs2: x0 = 0x0ff1ee579a8303a2 + 80004ea4: 0008b003 ld x0,0(x17) + 80004ea8: 00888893 addi x17,x17,8 + +0000000080004eac : +Zksed_sm4ed_cg_cmp_rs1_rs2_b0: + sm4ed x27, x0, x0, 0 # perform operation + 80004eac: 30000db3 sm4ed x27,x0,x0,0x0 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b0, Zksed_sm4ed_cg_cmp_rs1_rs2_b0_str) + 80004eb0: 0007b203 ld x4,0(x15) + 80004eb4: 01b20c63 beq x4,x27,80004ecc + 80004eb8: 308062ef jal x5,8000b1c0 + 80004ebc: 80004eac .word 0x80004eac + 80004ec0: 00000000 .word 0x00000000 + 80004ec4: 8001b8b0 .word 0x8001b8b0 + 80004ec8: 00000000 .word 0x00000000 + 80004ecc: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs1: x1 = 0xa71283ba5392fc99 + 80004ed0: 0008b083 ld x1,0(x17) + 80004ed4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x1) # load rs2: x1 = 0xd00074a7cbcc5ba2 + 80004ed8: 0008b083 ld x1,0(x17) + 80004edc: 00888893 addi x17,x17,8 + +0000000080004ee0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b1: + sm4ed x12, x1, x1, 2 # perform operation + 80004ee0: b0108633 sm4ed x12,x1,x1,0x2 + # Check if x12 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x12, Zksed_sm4ed_cg_cmp_rs1_rs2_b1, Zksed_sm4ed_cg_cmp_rs1_rs2_b1_str) + 80004ee4: 0007b203 ld x4,0(x15) + 80004ee8: 00c20c63 beq x4,x12,80004f00 + 80004eec: 2d4062ef jal x5,8000b1c0 + 80004ef0: 80004ee0 .word 0x80004ee0 + 80004ef4: 00000000 .word 0x00000000 + 80004ef8: 8001b8ea .word 0x8001b8ea + 80004efc: 00000000 .word 0x00000000 + 80004f00: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs1: x2 = 0x9b8c48b2bc2d92fb + 80004f04: 0008b103 ld x2,0(x17) + 80004f08: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x2) # load rs2: x2 = 0x4733a82908523253 + 80004f0c: 0008b103 ld x2,0(x17) + 80004f10: 00888893 addi x17,x17,8 + +0000000080004f14 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b2: + sm4ed x16, x2, x2, 0 # perform operation + 80004f14: 30210833 sm4ed x16,x2,x2,0x0 + # Check if x16 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x16, Zksed_sm4ed_cg_cmp_rs1_rs2_b2, Zksed_sm4ed_cg_cmp_rs1_rs2_b2_str) + 80004f18: 0007b203 ld x4,0(x15) + 80004f1c: 01020c63 beq x4,x16,80004f34 + 80004f20: 2a0062ef jal x5,8000b1c0 + 80004f24: 80004f14 .word 0x80004f14 + 80004f28: 00000000 .word 0x00000000 + 80004f2c: 8001b924 .word 0x8001b924 + 80004f30: 00000000 .word 0x00000000 + 80004f34: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs1: x3 = 0x9fc1ff6cd010b146 + 80004f38: 0008b183 ld x3,0(x17) + 80004f3c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x3) # load rs2: x3 = 0xed13c0f38f96c2ed + 80004f40: 0008b183 ld x3,0(x17) + 80004f44: 00888893 addi x17,x17,8 + +0000000080004f48 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b3: + sm4ed x30, x3, x3, 2 # perform operation + 80004f48: b0318f33 sm4ed x30,x3,x3,0x2 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksed_sm4ed_cg_cmp_rs1_rs2_b3, Zksed_sm4ed_cg_cmp_rs1_rs2_b3_str) + 80004f4c: 0007b203 ld x4,0(x15) + 80004f50: 01e20c63 beq x4,x30,80004f68 + 80004f54: 26c062ef jal x5,8000b1c0 + 80004f58: 80004f48 .word 0x80004f48 + 80004f5c: 00000000 .word 0x00000000 + 80004f60: 8001b95e .word 0x8001b95e + 80004f64: 00000000 .word 0x00000000 + 80004f68: 00878793 addi x15,x15,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80004f6c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80004f70: 00028713 addi x14,x5,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs1: x4 = 0xcb95bd68270aee74 + 80004f74: 0008b203 ld x4,0(x17) + 80004f78: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x4) # load rs2: x4 = 0x0940d313d8a354de + 80004f7c: 0008b203 ld x4,0(x17) + 80004f80: 00888893 addi x17,x17,8 + +0000000080004f84 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b4: + sm4ed x30, x4, x4, 3 # perform operation + 80004f84: f0420f33 sm4ed x30,x4,x4,0x3 + # Check if x30 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x30, Zksed_sm4ed_cg_cmp_rs1_rs2_b4, Zksed_sm4ed_cg_cmp_rs1_rs2_b4_str) + 80004f88: 0007b683 ld x13,0(x15) + 80004f8c: 01e68c63 beq x13,x30,80004fa4 + 80004f90: 2700676f jal x14,8000b200 + 80004f94: 80004f84 .word 0x80004f84 + 80004f98: 00000000 .word 0x00000000 + 80004f9c: 8001b998 .word 0x8001b998 + 80004fa0: 00000000 .word 0x00000000 + 80004fa4: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs1: x5 = 0x39f3fb81a52a6864 + 80004fa8: 0008b283 ld x5,0(x17) + 80004fac: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x5) # load rs2: x5 = 0x8cf22eb21124e95b + 80004fb0: 0008b283 ld x5,0(x17) + 80004fb4: 00888893 addi x17,x17,8 + +0000000080004fb8 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b5: + sm4ed x19, x5, x5, 3 # perform operation + 80004fb8: f05289b3 sm4ed x19,x5,x5,0x3 + # Check if x19 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x19, Zksed_sm4ed_cg_cmp_rs1_rs2_b5, Zksed_sm4ed_cg_cmp_rs1_rs2_b5_str) + 80004fbc: 0007b683 ld x13,0(x15) + 80004fc0: 01368c63 beq x13,x19,80004fd8 + 80004fc4: 23c0676f jal x14,8000b200 + 80004fc8: 80004fb8 .word 0x80004fb8 + 80004fcc: 00000000 .word 0x00000000 + 80004fd0: 8001b9d2 .word 0x8001b9d2 + 80004fd4: 00000000 .word 0x00000000 + 80004fd8: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0xec0513d5361eaf8a + 80004fdc: 0008b303 ld x6,0(x17) + 80004fe0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0x151f24a5a2134e97 + 80004fe4: 0008b303 ld x6,0(x17) + 80004fe8: 00888893 addi x17,x17,8 + +0000000080004fec : +Zksed_sm4ed_cg_cmp_rs1_rs2_b6: + sm4ed x3, x6, x6, 3 # perform operation + 80004fec: f06301b3 sm4ed x3,x6,x6,0x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x3, Zksed_sm4ed_cg_cmp_rs1_rs2_b6, Zksed_sm4ed_cg_cmp_rs1_rs2_b6_str) + 80004ff0: 0007b683 ld x13,0(x15) + 80004ff4: 00368c63 beq x13,x3,8000500c + 80004ff8: 2080676f jal x14,8000b200 + 80004ffc: 80004fec .word 0x80004fec + 80005000: 00000000 .word 0x00000000 + 80005004: 8001ba0c .word 0x8001ba0c + 80005008: 00000000 .word 0x00000000 + 8000500c: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x72653b98b31ee342 + 80005010: 0008b383 ld x7,0(x17) + 80005014: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xd5f0c92bab8ef9f7 + 80005018: 0008b383 ld x7,0(x17) + 8000501c: 00888893 addi x17,x17,8 + +0000000080005020 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b7: + sm4ed x1, x7, x7, 2 # perform operation + 80005020: b07380b3 sm4ed x1,x7,x7,0x2 + # Check if x1 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x1, Zksed_sm4ed_cg_cmp_rs1_rs2_b7, Zksed_sm4ed_cg_cmp_rs1_rs2_b7_str) + 80005024: 0007b683 ld x13,0(x15) + 80005028: 00168c63 beq x13,x1,80005040 + 8000502c: 1d40676f jal x14,8000b200 + 80005030: 80005020 .word 0x80005020 + 80005034: 00000000 .word 0x00000000 + 80005038: 8001ba46 .word 0x8001ba46 + 8000503c: 00000000 .word 0x00000000 + 80005040: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0xa76f89bf57f43253 + 80005044: 0008b403 ld x8,0(x17) + 80005048: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs2: x8 = 0xda7080b0ccf85f5f + 8000504c: 0008b403 ld x8,0(x17) + 80005050: 00888893 addi x17,x17,8 + +0000000080005054 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b8: + sm4ed x3, x8, x8, 3 # perform operation + 80005054: f08401b3 sm4ed x3,x8,x8,0x3 + # Check if x3 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x3, Zksed_sm4ed_cg_cmp_rs1_rs2_b8, Zksed_sm4ed_cg_cmp_rs1_rs2_b8_str) + 80005058: 0007b683 ld x13,0(x15) + 8000505c: 00368c63 beq x13,x3,80005074 + 80005060: 1a00676f jal x14,8000b200 + 80005064: 80005054 .word 0x80005054 + 80005068: 00000000 .word 0x00000000 + 8000506c: 8001ba80 .word 0x8001ba80 + 80005070: 00000000 .word 0x00000000 + 80005074: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x9803e80d6329d414 + 80005078: 0008b483 ld x9,0(x17) + 8000507c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs2: x9 = 0x8bc40d177e86889d + 80005080: 0008b483 ld x9,0(x17) + 80005084: 00888893 addi x17,x17,8 + +0000000080005088 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b9: + sm4ed x29, x9, x9, 3 # perform operation + 80005088: f0948eb3 sm4ed x29,x9,x9,0x3 + # Check if x29 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x29, Zksed_sm4ed_cg_cmp_rs1_rs2_b9, Zksed_sm4ed_cg_cmp_rs1_rs2_b9_str) + 8000508c: 0007b683 ld x13,0(x15) + 80005090: 01d68c63 beq x13,x29,800050a8 + 80005094: 16c0676f jal x14,8000b200 + 80005098: 80005088 .word 0x80005088 + 8000509c: 00000000 .word 0x00000000 + 800050a0: 8001baba .word 0x8001baba + 800050a4: 00000000 .word 0x00000000 + 800050a8: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0xdaa44124c1556678 + 800050ac: 0008b503 ld x10,0(x17) + 800050b0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs2: x10 = 0xf7c7782b49f035fc + 800050b4: 0008b503 ld x10,0(x17) + 800050b8: 00888893 addi x17,x17,8 + +00000000800050bc : +Zksed_sm4ed_cg_cmp_rs1_rs2_b10: + sm4ed x12, x10, x10, 1 # perform operation + 800050bc: 70a50633 sm4ed x12,x10,x10,0x1 + # Check if x12 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x12, Zksed_sm4ed_cg_cmp_rs1_rs2_b10, Zksed_sm4ed_cg_cmp_rs1_rs2_b10_str) + 800050c0: 0007b683 ld x13,0(x15) + 800050c4: 00c68c63 beq x13,x12,800050dc + 800050c8: 1380676f jal x14,8000b200 + 800050cc: 800050bc .word 0x800050bc + 800050d0: 00000000 .word 0x00000000 + 800050d4: 8001baf4 .word 0x8001baf4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xc69a9027d38bf8bb + 800050e0: 0008b583 ld x11,0(x17) + 800050e4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0xa6aa61ca77798a01 + 800050e8: 0008b583 ld x11,0(x17) + 800050ec: 00888893 addi x17,x17,8 + +00000000800050f0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b11: + sm4ed x16, x11, x11, 2 # perform operation + 800050f0: b0b58833 sm4ed x16,x11,x11,0x2 + # Check if x16 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x16, Zksed_sm4ed_cg_cmp_rs1_rs2_b11, Zksed_sm4ed_cg_cmp_rs1_rs2_b11_str) + 800050f4: 0007b683 ld x13,0(x15) + 800050f8: 01068c63 beq x13,x16,80005110 + 800050fc: 1040676f jal x14,8000b200 + 80005100: 800050f0 .word 0x800050f0 + 80005104: 00000000 .word 0x00000000 + 80005108: 8001bb2f .word 0x8001bb2f + 8000510c: 00000000 .word 0x00000000 + 80005110: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0x793b91d3e0c1e723 + 80005114: 0008b603 ld x12,0(x17) + 80005118: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x0aea753cfe39e427 + 8000511c: 0008b603 ld x12,0(x17) + 80005120: 00888893 addi x17,x17,8 + +0000000080005124 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b12: + sm4ed x21, x12, x12, 2 # perform operation + 80005124: b0c60ab3 sm4ed x21,x12,x12,0x2 + # Check if x21 contains the expected result. x15 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x15, x14, x13, x21, Zksed_sm4ed_cg_cmp_rs1_rs2_b12, Zksed_sm4ed_cg_cmp_rs1_rs2_b12_str) + 80005128: 0007b683 ld x13,0(x15) + 8000512c: 01568c63 beq x13,x21,80005144 + 80005130: 0d00676f jal x14,8000b200 + 80005134: 80005124 .word 0x80005124 + 80005138: 00000000 .word 0x00000000 + 8000513c: 8001bb6a .word 0x8001bb6a + 80005140: 00000000 .word 0x00000000 + 80005144: 00878793 addi x15,x15,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005148: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 8000514c: 00070413 addi x8,x14,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0xe274e4af56da8d21 + 80005150: 0008b683 ld x13,0(x17) + 80005154: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs2: x13 = 0xc96bb7d2911d68b0 + 80005158: 0008b683 ld x13,0(x17) + 8000515c: 00888893 addi x17,x17,8 + +0000000080005160 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b13: + sm4ed x24, x13, x13, 1 # perform operation + 80005160: 70d68c33 sm4ed x24,x13,x13,0x1 + # Check if x24 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x24, Zksed_sm4ed_cg_cmp_rs1_rs2_b13, Zksed_sm4ed_cg_cmp_rs1_rs2_b13_str) + 80005164: 0007b383 ld x7,0(x15) + 80005168: 01838c63 beq x7,x24,80005180 + 8000516c: 06c0646f jal x8,8000b1d8 + 80005170: 80005160 .word 0x80005160 + 80005174: 00000000 .word 0x00000000 + 80005178: 8001bba5 .word 0x8001bba5 + 8000517c: 00000000 .word 0x00000000 + 80005180: 00878793 addi x15,x15,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x7efcae14c1e33454 + 80005184: 0008b703 ld x14,0(x17) + 80005188: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0x83e9a13d1254ffe5 + 8000518c: 0008b703 ld x14,0(x17) + 80005190: 00888893 addi x17,x17,8 + +0000000080005194 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b14: + sm4ed x31, x14, x14, 1 # perform operation + 80005194: 70e70fb3 sm4ed x31,x14,x14,0x1 + # Check if x31 contains the expected result. x15 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x15, x8, x7, x31, Zksed_sm4ed_cg_cmp_rs1_rs2_b14, Zksed_sm4ed_cg_cmp_rs1_rs2_b14_str) + 80005198: 0007b383 ld x7,0(x15) + 8000519c: 01f38c63 beq x7,x31,800051b4 + 800051a0: 0380646f jal x8,8000b1d8 + 800051a4: 80005194 .word 0x80005194 + 800051a8: 00000000 .word 0x00000000 + 800051ac: 8001bbe0 .word 0x8001bbe0 + 800051b0: 00000000 .word 0x00000000 + 800051b4: 00878793 addi x15,x15,8 + + mv x28, x15 # switch signature pointer register to avoid conflict with test + 800051b8: 00078e13 addi x28,x15,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0x62a64cb8751f6235 + 800051bc: 0008b783 ld x15,0(x17) + 800051c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0x0ce87b3d2295271e + 800051c4: 0008b783 ld x15,0(x17) + 800051c8: 00888893 addi x17,x17,8 + +00000000800051cc : +Zksed_sm4ed_cg_cmp_rs1_rs2_b15: + sm4ed x29, x15, x15, 2 # perform operation + 800051cc: b0f78eb3 sm4ed x29,x15,x15,0x2 + # Check if x29 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x29, Zksed_sm4ed_cg_cmp_rs1_rs2_b15, Zksed_sm4ed_cg_cmp_rs1_rs2_b15_str) + 800051d0: 000e3383 ld x7,0(x28) + 800051d4: 01d38c63 beq x7,x29,800051ec + 800051d8: 0000646f jal x8,8000b1d8 + 800051dc: 800051cc .word 0x800051cc + 800051e0: 00000000 .word 0x00000000 + 800051e4: 8001bc1b .word 0x8001bc1b + 800051e8: 00000000 .word 0x00000000 + 800051ec: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x99c129f93d15a32c + 800051f0: 0008b803 ld x16,0(x17) + 800051f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0xb2e69a084255fc51 + 800051f8: 0008b803 ld x16,0(x17) + 800051fc: 00888893 addi x17,x17,8 + +0000000080005200 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b16: + sm4ed x2, x16, x16, 0 # perform operation + 80005200: 31080133 sm4ed x2,x16,x16,0x0 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zksed_sm4ed_cg_cmp_rs1_rs2_b16, Zksed_sm4ed_cg_cmp_rs1_rs2_b16_str) + 80005204: 000e3383 ld x7,0(x28) + 80005208: 00238c63 beq x7,x2,80005220 + 8000520c: 7cd0546f jal x8,8000b1d8 + 80005210: 80005200 .word 0x80005200 + 80005214: 00000000 .word 0x00000000 + 80005218: 8001bc56 .word 0x8001bc56 + 8000521c: 00000000 .word 0x00000000 + 80005220: 008e0e13 addi x28,x28,8 + + mv x3, x17 # switch data pointer register to avoid conflict with test + 80005224: 00088193 addi x3,x17,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs1: x17 = 0x675b0d630525ea90 + 80005228: 0001b883 ld x17,0(x3) + 8000522c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0x96939a2c90197523 + 80005230: 0001b883 ld x17,0(x3) + 80005234: 00818193 addi x3,x3,8 + +0000000080005238 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b17: + sm4ed x4, x17, x17, 1 # perform operation + 80005238: 71188233 sm4ed x4,x17,x17,0x1 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zksed_sm4ed_cg_cmp_rs1_rs2_b17, Zksed_sm4ed_cg_cmp_rs1_rs2_b17_str) + 8000523c: 000e3383 ld x7,0(x28) + 80005240: 00438c63 beq x7,x4,80005258 + 80005244: 7950546f jal x8,8000b1d8 + 80005248: 80005238 .word 0x80005238 + 8000524c: 00000000 .word 0x00000000 + 80005250: 8001bc91 .word 0x8001bc91 + 80005254: 00000000 .word 0x00000000 + 80005258: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs1: x18 = 0xc66827d9f531bdea + 8000525c: 0001b903 ld x18,0(x3) + 80005260: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x18) # load rs2: x18 = 0x0b9eb3672c2930f4 + 80005264: 0001b903 ld x18,0(x3) + 80005268: 00818193 addi x3,x3,8 + +000000008000526c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b18: + sm4ed x6, x18, x18, 2 # perform operation + 8000526c: b1290333 sm4ed x6,x18,x18,0x2 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zksed_sm4ed_cg_cmp_rs1_rs2_b18, Zksed_sm4ed_cg_cmp_rs1_rs2_b18_str) + 80005270: 000e3383 ld x7,0(x28) + 80005274: 00638c63 beq x7,x6,8000528c + 80005278: 7610546f jal x8,8000b1d8 + 8000527c: 8000526c .word 0x8000526c + 80005280: 00000000 .word 0x00000000 + 80005284: 8001bccc .word 0x8001bccc + 80005288: 00000000 .word 0x00000000 + 8000528c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs1: x19 = 0x1dd3ef26f31da673 + 80005290: 0001b983 ld x19,0(x3) + 80005294: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x19) # load rs2: x19 = 0x9feafd473c5eca0b + 80005298: 0001b983 ld x19,0(x3) + 8000529c: 00818193 addi x3,x3,8 + +00000000800052a0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b19: + sm4ed x26, x19, x19, 1 # perform operation + 800052a0: 71398d33 sm4ed x26,x19,x19,0x1 + # Check if x26 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x26, Zksed_sm4ed_cg_cmp_rs1_rs2_b19, Zksed_sm4ed_cg_cmp_rs1_rs2_b19_str) + 800052a4: 000e3383 ld x7,0(x28) + 800052a8: 01a38c63 beq x7,x26,800052c0 + 800052ac: 72d0546f jal x8,8000b1d8 + 800052b0: 800052a0 .word 0x800052a0 + 800052b4: 00000000 .word 0x00000000 + 800052b8: 8001bd07 .word 0x8001bd07 + 800052bc: 00000000 .word 0x00000000 + 800052c0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs1: x20 = 0xb41280e0b56ef2e8 + 800052c4: 0001ba03 ld x20,0(x3) + 800052c8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xe29763a4fe078001 + 800052cc: 0001ba03 ld x20,0(x3) + 800052d0: 00818193 addi x3,x3,8 + +00000000800052d4 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b20: + sm4ed x14, x20, x20, 0 # perform operation + 800052d4: 314a0733 sm4ed x14,x20,x20,0x0 + # Check if x14 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x14, Zksed_sm4ed_cg_cmp_rs1_rs2_b20, Zksed_sm4ed_cg_cmp_rs1_rs2_b20_str) + 800052d8: 000e3383 ld x7,0(x28) + 800052dc: 00e38c63 beq x7,x14,800052f4 + 800052e0: 6f90546f jal x8,8000b1d8 + 800052e4: 800052d4 .word 0x800052d4 + 800052e8: 00000000 .word 0x00000000 + 800052ec: 8001bd42 .word 0x8001bd42 + 800052f0: 00000000 .word 0x00000000 + 800052f4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs1: x21 = 0x319bc62af7a66030 + 800052f8: 0001ba83 ld x21,0(x3) + 800052fc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0xbc2a3746408a8fa6 + 80005300: 0001ba83 ld x21,0(x3) + 80005304: 00818193 addi x3,x3,8 + +0000000080005308 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b21: + sm4ed x22, x21, x21, 1 # perform operation + 80005308: 715a8b33 sm4ed x22,x21,x21,0x1 + # Check if x22 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x22, Zksed_sm4ed_cg_cmp_rs1_rs2_b21, Zksed_sm4ed_cg_cmp_rs1_rs2_b21_str) + 8000530c: 000e3383 ld x7,0(x28) + 80005310: 01638c63 beq x7,x22,80005328 + 80005314: 6c50546f jal x8,8000b1d8 + 80005318: 80005308 .word 0x80005308 + 8000531c: 00000000 .word 0x00000000 + 80005320: 8001bd7d .word 0x8001bd7d + 80005324: 00000000 .word 0x00000000 + 80005328: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs1: x22 = 0x9b9b880398a6b809 + 8000532c: 0001bb03 ld x22,0(x3) + 80005330: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xc43cd86ac29d42ac + 80005334: 0001bb03 ld x22,0(x3) + 80005338: 00818193 addi x3,x3,8 + +000000008000533c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b22: + sm4ed x15, x22, x22, 3 # perform operation + 8000533c: f16b07b3 sm4ed x15,x22,x22,0x3 + # Check if x15 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x15, Zksed_sm4ed_cg_cmp_rs1_rs2_b22, Zksed_sm4ed_cg_cmp_rs1_rs2_b22_str) + 80005340: 000e3383 ld x7,0(x28) + 80005344: 00f38c63 beq x7,x15,8000535c + 80005348: 6910546f jal x8,8000b1d8 + 8000534c: 8000533c .word 0x8000533c + 80005350: 00000000 .word 0x00000000 + 80005354: 8001bdb8 .word 0x8001bdb8 + 80005358: 00000000 .word 0x00000000 + 8000535c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs1: x23 = 0x43b80d6a77098ab0 + 80005360: 0001bb83 ld x23,0(x3) + 80005364: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x23) # load rs2: x23 = 0xc416359d69caac27 + 80005368: 0001bb83 ld x23,0(x3) + 8000536c: 00818193 addi x3,x3,8 + +0000000080005370 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b23: + sm4ed x27, x23, x23, 0 # perform operation + 80005370: 317b8db3 sm4ed x27,x23,x23,0x0 + # Check if x27 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b23, Zksed_sm4ed_cg_cmp_rs1_rs2_b23_str) + 80005374: 000e3383 ld x7,0(x28) + 80005378: 01b38c63 beq x7,x27,80005390 + 8000537c: 65d0546f jal x8,8000b1d8 + 80005380: 80005370 .word 0x80005370 + 80005384: 00000000 .word 0x00000000 + 80005388: 8001bdf3 .word 0x8001bdf3 + 8000538c: 00000000 .word 0x00000000 + 80005390: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs1: x24 = 0x9d1b45873cba5a2e + 80005394: 0001bc03 ld x24,0(x3) + 80005398: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x24) # load rs2: x24 = 0x90b649ea28f4fd9d + 8000539c: 0001bc03 ld x24,0(x3) + 800053a0: 00818193 addi x3,x3,8 + +00000000800053a4 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b24: + sm4ed x11, x24, x24, 3 # perform operation + 800053a4: f18c05b3 sm4ed x11,x24,x24,0x3 + # Check if x11 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x11, Zksed_sm4ed_cg_cmp_rs1_rs2_b24, Zksed_sm4ed_cg_cmp_rs1_rs2_b24_str) + 800053a8: 000e3383 ld x7,0(x28) + 800053ac: 00b38c63 beq x7,x11,800053c4 + 800053b0: 6290546f jal x8,8000b1d8 + 800053b4: 800053a4 .word 0x800053a4 + 800053b8: 00000000 .word 0x00000000 + 800053bc: 8001be2e .word 0x8001be2e + 800053c0: 00000000 .word 0x00000000 + 800053c4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs1: x25 = 0xb7f808237eaf7456 + 800053c8: 0001bc83 ld x25,0(x3) + 800053cc: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x25) # load rs2: x25 = 0x103395aa72ca3701 + 800053d0: 0001bc83 ld x25,0(x3) + 800053d4: 00818193 addi x3,x3,8 + +00000000800053d8 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b25: + sm4ed x0, x25, x25, 3 # perform operation + 800053d8: f19c8033 sm4ed x0,x25,x25,0x3 + # Check if x0 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x0, Zksed_sm4ed_cg_cmp_rs1_rs2_b25, Zksed_sm4ed_cg_cmp_rs1_rs2_b25_str) + 800053dc: 000e3383 ld x7,0(x28) + 800053e0: 00038c63 beq x7,x0,800053f8 + 800053e4: 5f50546f jal x8,8000b1d8 + 800053e8: 800053d8 .word 0x800053d8 + 800053ec: 00000000 .word 0x00000000 + 800053f0: 8001be69 .word 0x8001be69 + 800053f4: 00000000 .word 0x00000000 + 800053f8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs1: x26 = 0xf361edbbadd4e5f2 + 800053fc: 0001bd03 ld x26,0(x3) + 80005400: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x26) # load rs2: x26 = 0xfd9e5ec8dfa2ba56 + 80005404: 0001bd03 ld x26,0(x3) + 80005408: 00818193 addi x3,x3,8 + +000000008000540c : +Zksed_sm4ed_cg_cmp_rs1_rs2_b26: + sm4ed x21, x26, x26, 1 # perform operation + 8000540c: 71ad0ab3 sm4ed x21,x26,x26,0x1 + # Check if x21 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x21, Zksed_sm4ed_cg_cmp_rs1_rs2_b26, Zksed_sm4ed_cg_cmp_rs1_rs2_b26_str) + 80005410: 000e3383 ld x7,0(x28) + 80005414: 01538c63 beq x7,x21,8000542c + 80005418: 5c10546f jal x8,8000b1d8 + 8000541c: 8000540c .word 0x8000540c + 80005420: 00000000 .word 0x00000000 + 80005424: 8001bea4 .word 0x8001bea4 + 80005428: 00000000 .word 0x00000000 + 8000542c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs1: x27 = 0x76eeeafbe8b057aa + 80005430: 0001bd83 ld x27,0(x3) + 80005434: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x27) # load rs2: x27 = 0x7cec29c90583e369 + 80005438: 0001bd83 ld x27,0(x3) + 8000543c: 00818193 addi x3,x3,8 + +0000000080005440 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b27: + sm4ed x20, x27, x27, 0 # perform operation + 80005440: 31bd8a33 sm4ed x20,x27,x27,0x0 + # Check if x20 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x20, Zksed_sm4ed_cg_cmp_rs1_rs2_b27, Zksed_sm4ed_cg_cmp_rs1_rs2_b27_str) + 80005444: 000e3383 ld x7,0(x28) + 80005448: 01438c63 beq x7,x20,80005460 + 8000544c: 58d0546f jal x8,8000b1d8 + 80005450: 80005440 .word 0x80005440 + 80005454: 00000000 .word 0x00000000 + 80005458: 8001bedf .word 0x8001bedf + 8000545c: 00000000 .word 0x00000000 + 80005460: 008e0e13 addi x28,x28,8 + + mv x29, x28 # switch signature pointer register to avoid conflict with test + 80005464: 000e0e93 addi x29,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs1: x28 = 0x54ab1ccf7be68edd + 80005468: 0001be03 ld x28,0(x3) + 8000546c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x28) # load rs2: x28 = 0x617f89a39fa75590 + 80005470: 0001be03 ld x28,0(x3) + 80005474: 00818193 addi x3,x3,8 + +0000000080005478 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b28: + sm4ed x2, x28, x28, 1 # perform operation + 80005478: 71ce0133 sm4ed x2,x28,x28,0x1 + # Check if x2 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x2, Zksed_sm4ed_cg_cmp_rs1_rs2_b28, Zksed_sm4ed_cg_cmp_rs1_rs2_b28_str) + 8000547c: 000eb383 ld x7,0(x29) + 80005480: 00238c63 beq x7,x2,80005498 + 80005484: 5550546f jal x8,8000b1d8 + 80005488: 80005478 .word 0x80005478 + 8000548c: 00000000 .word 0x00000000 + 80005490: 8001bf1a .word 0x8001bf1a + 80005494: 00000000 .word 0x00000000 + 80005498: 008e8e93 addi x29,x29,8 + + mv x12, x29 # switch signature pointer register to avoid conflict with test + 8000549c: 000e8613 addi x12,x29,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs1: x29 = 0x0c69c2e2e0f9b852 + 800054a0: 0001be83 ld x29,0(x3) + 800054a4: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xa5a3df148605970c + 800054a8: 0001be83 ld x29,0(x3) + 800054ac: 00818193 addi x3,x3,8 + +00000000800054b0 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b29: + sm4ed x2, x29, x29, 0 # perform operation + 800054b0: 31de8133 sm4ed x2,x29,x29,0x0 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zksed_sm4ed_cg_cmp_rs1_rs2_b29, Zksed_sm4ed_cg_cmp_rs1_rs2_b29_str) + 800054b4: 00063383 ld x7,0(x12) + 800054b8: 00238c63 beq x7,x2,800054d0 + 800054bc: 51d0546f jal x8,8000b1d8 + 800054c0: 800054b0 .word 0x800054b0 + 800054c4: 00000000 .word 0x00000000 + 800054c8: 8001bf55 .word 0x8001bf55 + 800054cc: 00000000 .word 0x00000000 + 800054d0: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs1: x30 = 0x62c025f265816d55 + 800054d4: 0001bf03 ld x30,0(x3) + 800054d8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x30) # load rs2: x30 = 0xf36503d07447fd3f + 800054dc: 0001bf03 ld x30,0(x3) + 800054e0: 00818193 addi x3,x3,8 + +00000000800054e4 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b30: + sm4ed x27, x30, x30, 2 # perform operation + 800054e4: b1ef0db3 sm4ed x27,x30,x30,0x2 + # Check if x27 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x27, Zksed_sm4ed_cg_cmp_rs1_rs2_b30, Zksed_sm4ed_cg_cmp_rs1_rs2_b30_str) + 800054e8: 00063383 ld x7,0(x12) + 800054ec: 01b38c63 beq x7,x27,80005504 + 800054f0: 4e90546f jal x8,8000b1d8 + 800054f4: 800054e4 .word 0x800054e4 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 8001bf90 .word 0x8001bf90 + 80005500: 00000000 .word 0x00000000 + 80005504: 00860613 addi x12,x12,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs1: x31 = 0x05f6475d5541bd1f + 80005508: 0001bf83 ld x31,0(x3) + 8000550c: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x31) # load rs2: x31 = 0x4f18f1953cf92add + 80005510: 0001bf83 ld x31,0(x3) + 80005514: 00818193 addi x3,x3,8 + +0000000080005518 : +Zksed_sm4ed_cg_cmp_rs1_rs2_b31: + sm4ed x20, x31, x31, 2 # perform operation + 80005518: b1ff8a33 sm4ed x20,x31,x31,0x2 + # Check if x20 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x20, Zksed_sm4ed_cg_cmp_rs1_rs2_b31, Zksed_sm4ed_cg_cmp_rs1_rs2_b31_str) + 8000551c: 00063383 ld x7,0(x12) + 80005520: 01438c63 beq x7,x20,80005538 + 80005524: 4b50546f jal x8,8000b1d8 + 80005528: 80005518 .word 0x80005518 + 8000552c: 00000000 .word 0x00000000 + 80005530: 8001bfcb .word 0x8001bfcb + 80005534: 00000000 .word 0x00000000 + 80005538: 00860613 addi x12,x12,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x8fe9ba4f27c6c457 + 8000553c: 0001b003 ld x0,0(x3) + 80005540: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x17) # load rs2: x17 = 0xaa931b7b8cea4255 + 80005544: 0001b883 ld x17,0(x3) + 80005548: 00818193 addi x3,x3,8 + +000000008000554c : +Zksed_sm4ed_cg_cmp_rd_rs1_b0: + sm4ed x0, x0, x17, 2 # perform operation + 8000554c: b1100033 sm4ed x0,x0,x17,0x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x0, Zksed_sm4ed_cg_cmp_rd_rs1_b0, Zksed_sm4ed_cg_cmp_rd_rs1_b0_str) + 80005550: 00063383 ld x7,0(x12) + 80005554: 00038c63 beq x7,x0,8000556c + 80005558: 4810546f jal x8,8000b1d8 + 8000555c: 8000554c .word 0x8000554c + 80005560: 00000000 .word 0x00000000 + 80005564: 8001c006 .word 0x8001c006 + 80005568: 00000000 .word 0x00000000 + 8000556c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x058caf13092ab5aa + 80005570: 0001b083 ld x1,0(x3) + 80005574: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x16) # load rs2: x16 = 0x6210c121f8be22f7 + 80005578: 0001b803 ld x16,0(x3) + 8000557c: 00818193 addi x3,x3,8 + +0000000080005580 : +Zksed_sm4ed_cg_cmp_rd_rs1_b1: + sm4ed x1, x1, x16, 3 # perform operation + 80005580: f10080b3 sm4ed x1,x1,x16,0x3 + # Check if x1 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x1, Zksed_sm4ed_cg_cmp_rd_rs1_b1, Zksed_sm4ed_cg_cmp_rd_rs1_b1_str) + 80005584: 00063383 ld x7,0(x12) + 80005588: 00138c63 beq x7,x1,800055a0 + 8000558c: 44d0546f jal x8,8000b1d8 + 80005590: 80005580 .word 0x80005580 + 80005594: 00000000 .word 0x00000000 + 80005598: 8001c03f .word 0x8001c03f + 8000559c: 00000000 .word 0x00000000 + 800055a0: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xbef3bf7f2f2acdba + 800055a4: 0001b103 ld x2,0(x3) + 800055a8: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x22) # load rs2: x22 = 0xdcf40655541b8f78 + 800055ac: 0001bb03 ld x22,0(x3) + 800055b0: 00818193 addi x3,x3,8 + +00000000800055b4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b2: + sm4ed x2, x2, x22, 3 # perform operation + 800055b4: f1610133 sm4ed x2,x2,x22,0x3 + # Check if x2 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x2, Zksed_sm4ed_cg_cmp_rd_rs1_b2, Zksed_sm4ed_cg_cmp_rd_rs1_b2_str) + 800055b8: 00063383 ld x7,0(x12) + 800055bc: 00238c63 beq x7,x2,800055d4 + 800055c0: 4190546f jal x8,8000b1d8 + 800055c4: 800055b4 .word 0x800055b4 + 800055c8: 00000000 .word 0x00000000 + 800055cc: 8001c078 .word 0x8001c078 + 800055d0: 00000000 .word 0x00000000 + 800055d4: 00860613 addi x12,x12,8 + + mv x18, x3 # switch data pointer register to avoid conflict with test + 800055d8: 00018913 addi x18,x3,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs1: x3 = 0xd4608abfb7715525 + 800055dc: 00093183 ld x3,0(x18) + 800055e0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0x561587632b1f47bc + 800055e4: 00093983 ld x19,0(x18) + 800055e8: 00890913 addi x18,x18,8 + +00000000800055ec : +Zksed_sm4ed_cg_cmp_rd_rs1_b3: + sm4ed x3, x3, x19, 1 # perform operation + 800055ec: 713181b3 sm4ed x3,x3,x19,0x1 + # Check if x3 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x3, Zksed_sm4ed_cg_cmp_rd_rs1_b3, Zksed_sm4ed_cg_cmp_rd_rs1_b3_str) + 800055f0: 00063383 ld x7,0(x12) + 800055f4: 00338c63 beq x7,x3,8000560c + 800055f8: 3e10546f jal x8,8000b1d8 + 800055fc: 800055ec .word 0x800055ec + 80005600: 00000000 .word 0x00000000 + 80005604: 8001c0b1 .word 0x8001c0b1 + 80005608: 00000000 .word 0x00000000 + 8000560c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs1: x4 = 0xbbb1d8fa3184b76e + 80005610: 00093203 ld x4,0(x18) + 80005614: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x20) # load rs2: x20 = 0x4db0bc29440757bb + 80005618: 00093a03 ld x20,0(x18) + 8000561c: 00890913 addi x18,x18,8 + +0000000080005620 : +Zksed_sm4ed_cg_cmp_rd_rs1_b4: + sm4ed x4, x4, x20, 3 # perform operation + 80005620: f1420233 sm4ed x4,x4,x20,0x3 + # Check if x4 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x4, Zksed_sm4ed_cg_cmp_rd_rs1_b4, Zksed_sm4ed_cg_cmp_rd_rs1_b4_str) + 80005624: 00063383 ld x7,0(x12) + 80005628: 00438c63 beq x7,x4,80005640 + 8000562c: 3ad0546f jal x8,8000b1d8 + 80005630: 80005620 .word 0x80005620 + 80005634: 00000000 .word 0x00000000 + 80005638: 8001c0ea .word 0x8001c0ea + 8000563c: 00000000 .word 0x00000000 + 80005640: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x18, x5) # load rs1: x5 = 0xde94b7a0f50647cb + 80005644: 00093283 ld x5,0(x18) + 80005648: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x22) # load rs2: x22 = 0x8684104ef40c27c9 + 8000564c: 00093b03 ld x22,0(x18) + 80005650: 00890913 addi x18,x18,8 + +0000000080005654 : +Zksed_sm4ed_cg_cmp_rd_rs1_b5: + sm4ed x5, x5, x22, 0 # perform operation + 80005654: 316282b3 sm4ed x5,x5,x22,0x0 + # Check if x5 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x5, Zksed_sm4ed_cg_cmp_rd_rs1_b5, Zksed_sm4ed_cg_cmp_rd_rs1_b5_str) + 80005658: 00063383 ld x7,0(x12) + 8000565c: 00538c63 beq x7,x5,80005674 + 80005660: 3790546f jal x8,8000b1d8 + 80005664: 80005654 .word 0x80005654 + 80005668: 00000000 .word 0x00000000 + 8000566c: 8001c123 .word 0x8001c123 + 80005670: 00000000 .word 0x00000000 + 80005674: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x18, x6) # load rs1: x6 = 0xd062e6a06acf8a6b + 80005678: 00093303 ld x6,0(x18) + 8000567c: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x23) # load rs2: x23 = 0xaf46543781445a1c + 80005680: 00093b83 ld x23,0(x18) + 80005684: 00890913 addi x18,x18,8 + +0000000080005688 : +Zksed_sm4ed_cg_cmp_rd_rs1_b6: + sm4ed x6, x6, x23, 0 # perform operation + 80005688: 31730333 sm4ed x6,x6,x23,0x0 + # Check if x6 contains the expected result. x12 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x12, x8, x7, x6, Zksed_sm4ed_cg_cmp_rd_rs1_b6, Zksed_sm4ed_cg_cmp_rd_rs1_b6_str) + 8000568c: 00063383 ld x7,0(x12) + 80005690: 00638c63 beq x7,x6,800056a8 + 80005694: 3450546f jal x8,8000b1d8 + 80005698: 80005688 .word 0x80005688 + 8000569c: 00000000 .word 0x00000000 + 800056a0: 8001c15c .word 0x8001c15c + 800056a4: 00000000 .word 0x00000000 + 800056a8: 00860613 addi x12,x12,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800056ac: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800056b0: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs1: x7 = 0x81b6be3b4b96098e + 800056b4: 00093383 ld x7,0(x18) + 800056b8: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x3) # load rs2: x3 = 0xdcc9e169622420b4 + 800056bc: 00093183 ld x3,0(x18) + 800056c0: 00890913 addi x18,x18,8 + +00000000800056c4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b7: + sm4ed x7, x7, x3, 3 # perform operation + 800056c4: f03383b3 sm4ed x7,x7,x3,0x3 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zksed_sm4ed_cg_cmp_rd_rs1_b7, Zksed_sm4ed_cg_cmp_rd_rs1_b7_str) + 800056c8: 00063683 ld x13,0(x12) + 800056cc: 00768c63 beq x13,x7,800056e4 + 800056d0: 3310576f jal x14,8000b200 + 800056d4: 800056c4 .word 0x800056c4 + 800056d8: 00000000 .word 0x00000000 + 800056dc: 8001c195 .word 0x8001c195 + 800056e0: 00000000 .word 0x00000000 + 800056e4: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x18, x8) # load rs1: x8 = 0xabfc05873a91d9f7 + 800056e8: 00093403 ld x8,0(x18) + 800056ec: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x7) # load rs2: x7 = 0x43f890eae14d5dd2 + 800056f0: 00093383 ld x7,0(x18) + 800056f4: 00890913 addi x18,x18,8 + +00000000800056f8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b8: + sm4ed x8, x8, x7, 0 # perform operation + 800056f8: 30740433 sm4ed x8,x8,x7,0x0 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zksed_sm4ed_cg_cmp_rd_rs1_b8, Zksed_sm4ed_cg_cmp_rd_rs1_b8_str) + 800056fc: 00063683 ld x13,0(x12) + 80005700: 00868c63 beq x13,x8,80005718 + 80005704: 2fd0576f jal x14,8000b200 + 80005708: 800056f8 .word 0x800056f8 + 8000570c: 00000000 .word 0x00000000 + 80005710: 8001c1ce .word 0x8001c1ce + 80005714: 00000000 .word 0x00000000 + 80005718: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x18, x9) # load rs1: x9 = 0x82406d3a583f4583 + 8000571c: 00093483 ld x9,0(x18) + 80005720: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs2: x28 = 0xf9b5fed70b5c9e52 + 80005724: 00093e03 ld x28,0(x18) + 80005728: 00890913 addi x18,x18,8 + +000000008000572c : +Zksed_sm4ed_cg_cmp_rd_rs1_b9: + sm4ed x9, x9, x28, 2 # perform operation + 8000572c: b1c484b3 sm4ed x9,x9,x28,0x2 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zksed_sm4ed_cg_cmp_rd_rs1_b9, Zksed_sm4ed_cg_cmp_rd_rs1_b9_str) + 80005730: 00063683 ld x13,0(x12) + 80005734: 00968c63 beq x13,x9,8000574c + 80005738: 2c90576f jal x14,8000b200 + 8000573c: 8000572c .word 0x8000572c + 80005740: 00000000 .word 0x00000000 + 80005744: 8001c207 .word 0x8001c207 + 80005748: 00000000 .word 0x00000000 + 8000574c: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs1: x10 = 0x127e09ed06e263e8 + 80005750: 00093503 ld x10,0(x18) + 80005754: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs2: x29 = 0x5e91a92f2e8febfa + 80005758: 00093e83 ld x29,0(x18) + 8000575c: 00890913 addi x18,x18,8 + +0000000080005760 : +Zksed_sm4ed_cg_cmp_rd_rs1_b10: + sm4ed x10, x10, x29, 2 # perform operation + 80005760: b1d50533 sm4ed x10,x10,x29,0x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zksed_sm4ed_cg_cmp_rd_rs1_b10, Zksed_sm4ed_cg_cmp_rd_rs1_b10_str) + 80005764: 00063683 ld x13,0(x12) + 80005768: 00a68c63 beq x13,x10,80005780 + 8000576c: 2950576f jal x14,8000b200 + 80005770: 80005760 .word 0x80005760 + 80005774: 00000000 .word 0x00000000 + 80005778: 8001c240 .word 0x8001c240 + 8000577c: 00000000 .word 0x00000000 + 80005780: 00860613 addi x12,x12,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x18, x11) # load rs1: x11 = 0x6ddd3f47c7028527 + 80005784: 00093583 ld x11,0(x18) + 80005788: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs2: x15 = 0x26a45dc2b5ddf0d5 + 8000578c: 00093783 ld x15,0(x18) + 80005790: 00890913 addi x18,x18,8 + +0000000080005794 : +Zksed_sm4ed_cg_cmp_rd_rs1_b11: + sm4ed x11, x11, x15, 0 # perform operation + 80005794: 30f585b3 sm4ed x11,x11,x15,0x0 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zksed_sm4ed_cg_cmp_rd_rs1_b11, Zksed_sm4ed_cg_cmp_rd_rs1_b11_str) + 80005798: 00063683 ld x13,0(x12) + 8000579c: 00b68c63 beq x13,x11,800057b4 + 800057a0: 2610576f jal x14,8000b200 + 800057a4: 80005794 .word 0x80005794 + 800057a8: 00000000 .word 0x00000000 + 800057ac: 8001c27a .word 0x8001c27a + 800057b0: 00000000 .word 0x00000000 + 800057b4: 00860613 addi x12,x12,8 + + mv x31, x12 # switch signature pointer register to avoid conflict with test + 800057b8: 00060f93 addi x31,x12,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x18, x12) # load rs1: x12 = 0xd1baa92afab466cc + 800057bc: 00093603 ld x12,0(x18) + 800057c0: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x19) # load rs2: x19 = 0xeb304f59c24cb0bf + 800057c4: 00093983 ld x19,0(x18) + 800057c8: 00890913 addi x18,x18,8 + +00000000800057cc : +Zksed_sm4ed_cg_cmp_rd_rs1_b12: + sm4ed x12, x12, x19, 2 # perform operation + 800057cc: b1360633 sm4ed x12,x12,x19,0x2 + # Check if x12 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x12, Zksed_sm4ed_cg_cmp_rd_rs1_b12, Zksed_sm4ed_cg_cmp_rd_rs1_b12_str) + 800057d0: 000fb683 ld x13,0(x31) + 800057d4: 00c68c63 beq x13,x12,800057ec + 800057d8: 2290576f jal x14,8000b200 + 800057dc: 800057cc .word 0x800057cc + 800057e0: 00000000 .word 0x00000000 + 800057e4: 8001c2b4 .word 0x8001c2b4 + 800057e8: 00000000 .word 0x00000000 + 800057ec: 008f8f93 addi x31,x31,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 800057f0: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 800057f4: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x18, x13) # load rs1: x13 = 0x91fafa772b7c714b + 800057f8: 00093683 ld x13,0(x18) + 800057fc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs2: x26 = 0xd64176ce078ab2c5 + 80005800: 00093d03 ld x26,0(x18) + 80005804: 00890913 addi x18,x18,8 + +0000000080005808 : +Zksed_sm4ed_cg_cmp_rd_rs1_b13: + sm4ed x13, x13, x26, 1 # perform operation + 80005808: 71a686b3 sm4ed x13,x13,x26,0x1 + # Check if x13 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x13, Zksed_sm4ed_cg_cmp_rd_rs1_b13, Zksed_sm4ed_cg_cmp_rd_rs1_b13_str) + 8000580c: 000fb383 ld x7,0(x31) + 80005810: 00d38c63 beq x7,x13,80005828 + 80005814: 1c50546f jal x8,8000b1d8 + 80005818: 80005808 .word 0x80005808 + 8000581c: 00000000 .word 0x00000000 + 80005820: 8001c2ee .word 0x8001c2ee + 80005824: 00000000 .word 0x00000000 + 80005828: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x18, x14) # load rs1: x14 = 0x3bdb85051c6e1008 + 8000582c: 00093703 ld x14,0(x18) + 80005830: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs2: x25 = 0x181554229afee0e2 + 80005834: 00093c83 ld x25,0(x18) + 80005838: 00890913 addi x18,x18,8 + +000000008000583c : +Zksed_sm4ed_cg_cmp_rd_rs1_b14: + sm4ed x14, x14, x25, 3 # perform operation + 8000583c: f1970733 sm4ed x14,x14,x25,0x3 + # Check if x14 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x14, Zksed_sm4ed_cg_cmp_rd_rs1_b14, Zksed_sm4ed_cg_cmp_rd_rs1_b14_str) + 80005840: 000fb383 ld x7,0(x31) + 80005844: 00e38c63 beq x7,x14,8000585c + 80005848: 1910546f jal x8,8000b1d8 + 8000584c: 8000583c .word 0x8000583c + 80005850: 00000000 .word 0x00000000 + 80005854: 8001c328 .word 0x8001c328 + 80005858: 00000000 .word 0x00000000 + 8000585c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x18, x15) # load rs1: x15 = 0xfe6cb51720ff3d66 + 80005860: 00093783 ld x15,0(x18) + 80005864: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x54fa3a03722c1ca1 + 80005868: 00093503 ld x10,0(x18) + 8000586c: 00890913 addi x18,x18,8 + +0000000080005870 : +Zksed_sm4ed_cg_cmp_rd_rs1_b15: + sm4ed x15, x15, x10, 1 # perform operation + 80005870: 70a787b3 sm4ed x15,x15,x10,0x1 + # Check if x15 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x15, Zksed_sm4ed_cg_cmp_rd_rs1_b15, Zksed_sm4ed_cg_cmp_rd_rs1_b15_str) + 80005874: 000fb383 ld x7,0(x31) + 80005878: 00f38c63 beq x7,x15,80005890 + 8000587c: 15d0546f jal x8,8000b1d8 + 80005880: 80005870 .word 0x80005870 + 80005884: 00000000 .word 0x00000000 + 80005888: 8001c362 .word 0x8001c362 + 8000588c: 00000000 .word 0x00000000 + 80005890: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x18, x16) # load rs1: x16 = 0x1dd995e2b0197929 + 80005894: 00093803 ld x16,0(x18) + 80005898: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x10) # load rs2: x10 = 0x87f7356888ac3b15 + 8000589c: 00093503 ld x10,0(x18) + 800058a0: 00890913 addi x18,x18,8 + +00000000800058a4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b16: + sm4ed x16, x16, x10, 2 # perform operation + 800058a4: b0a80833 sm4ed x16,x16,x10,0x2 + # Check if x16 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x16, Zksed_sm4ed_cg_cmp_rd_rs1_b16, Zksed_sm4ed_cg_cmp_rd_rs1_b16_str) + 800058a8: 000fb383 ld x7,0(x31) + 800058ac: 01038c63 beq x7,x16,800058c4 + 800058b0: 1290546f jal x8,8000b1d8 + 800058b4: 800058a4 .word 0x800058a4 + 800058b8: 00000000 .word 0x00000000 + 800058bc: 8001c39c .word 0x8001c39c + 800058c0: 00000000 .word 0x00000000 + 800058c4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x18, x17) # load rs1: x17 = 0x9f48beac4b1a8e28 + 800058c8: 00093883 ld x17,0(x18) + 800058cc: 00890913 addi x18,x18,8 + RVTEST_TESTDATA_LOAD_INT(x18, x4) # load rs2: x4 = 0xf01eebbb6ca3696a + 800058d0: 00093203 ld x4,0(x18) + 800058d4: 00890913 addi x18,x18,8 + +00000000800058d8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b17: + sm4ed x17, x17, x4, 0 # perform operation + 800058d8: 304888b3 sm4ed x17,x17,x4,0x0 + # Check if x17 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x17, Zksed_sm4ed_cg_cmp_rd_rs1_b17, Zksed_sm4ed_cg_cmp_rd_rs1_b17_str) + 800058dc: 000fb383 ld x7,0(x31) + 800058e0: 01138c63 beq x7,x17,800058f8 + 800058e4: 0f50546f jal x8,8000b1d8 + 800058e8: 800058d8 .word 0x800058d8 + 800058ec: 00000000 .word 0x00000000 + 800058f0: 8001c3d6 .word 0x8001c3d6 + 800058f4: 00000000 .word 0x00000000 + 800058f8: 008f8f93 addi x31,x31,8 + + mv x15, x18 # switch data pointer register to avoid conflict with test + 800058fc: 00090793 addi x15,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x560b401aab2bd5e5 + 80005900: 0007b903 ld x18,0(x15) + 80005904: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xbe2c03981a6aaaf0 + 80005908: 0007b803 ld x16,0(x15) + 8000590c: 00878793 addi x15,x15,8 + +0000000080005910 : +Zksed_sm4ed_cg_cmp_rd_rs1_b18: + sm4ed x18, x18, x16, 0 # perform operation + 80005910: 31090933 sm4ed x18,x18,x16,0x0 + # Check if x18 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x18, Zksed_sm4ed_cg_cmp_rd_rs1_b18, Zksed_sm4ed_cg_cmp_rd_rs1_b18_str) + 80005914: 000fb383 ld x7,0(x31) + 80005918: 01238c63 beq x7,x18,80005930 + 8000591c: 0bd0546f jal x8,8000b1d8 + 80005920: 80005910 .word 0x80005910 + 80005924: 00000000 .word 0x00000000 + 80005928: 8001c410 .word 0x8001c410 + 8000592c: 00000000 .word 0x00000000 + 80005930: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x6143edbb1c548c8f + 80005934: 0007b983 ld x19,0(x15) + 80005938: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x17b21348441035b3 + 8000593c: 0007bc03 ld x24,0(x15) + 80005940: 00878793 addi x15,x15,8 + +0000000080005944 : +Zksed_sm4ed_cg_cmp_rd_rs1_b19: + sm4ed x19, x19, x24, 0 # perform operation + 80005944: 318989b3 sm4ed x19,x19,x24,0x0 + # Check if x19 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x19, Zksed_sm4ed_cg_cmp_rd_rs1_b19, Zksed_sm4ed_cg_cmp_rd_rs1_b19_str) + 80005948: 000fb383 ld x7,0(x31) + 8000594c: 01338c63 beq x7,x19,80005964 + 80005950: 0890546f jal x8,8000b1d8 + 80005954: 80005944 .word 0x80005944 + 80005958: 00000000 .word 0x00000000 + 8000595c: 8001c44a .word 0x8001c44a + 80005960: 00000000 .word 0x00000000 + 80005964: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xac4fa12ad34b5bea + 80005968: 0007ba03 ld x20,0(x15) + 8000596c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xd455114e91cbff80 + 80005970: 0007b583 ld x11,0(x15) + 80005974: 00878793 addi x15,x15,8 + +0000000080005978 : +Zksed_sm4ed_cg_cmp_rd_rs1_b20: + sm4ed x20, x20, x11, 1 # perform operation + 80005978: 70ba0a33 sm4ed x20,x20,x11,0x1 + # Check if x20 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x20, Zksed_sm4ed_cg_cmp_rd_rs1_b20, Zksed_sm4ed_cg_cmp_rd_rs1_b20_str) + 8000597c: 000fb383 ld x7,0(x31) + 80005980: 01438c63 beq x7,x20,80005998 + 80005984: 0550546f jal x8,8000b1d8 + 80005988: 80005978 .word 0x80005978 + 8000598c: 00000000 .word 0x00000000 + 80005990: 8001c484 .word 0x8001c484 + 80005994: 00000000 .word 0x00000000 + 80005998: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x848a2d1a0b426f2d + 8000599c: 0007ba83 ld x21,0(x15) + 800059a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x63986652838ac407 + 800059a4: 0007b203 ld x4,0(x15) + 800059a8: 00878793 addi x15,x15,8 + +00000000800059ac : +Zksed_sm4ed_cg_cmp_rd_rs1_b21: + sm4ed x21, x21, x4, 3 # perform operation + 800059ac: f04a8ab3 sm4ed x21,x21,x4,0x3 + # Check if x21 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x21, Zksed_sm4ed_cg_cmp_rd_rs1_b21, Zksed_sm4ed_cg_cmp_rd_rs1_b21_str) + 800059b0: 000fb383 ld x7,0(x31) + 800059b4: 01538c63 beq x7,x21,800059cc + 800059b8: 0210546f jal x8,8000b1d8 + 800059bc: 800059ac .word 0x800059ac + 800059c0: 00000000 .word 0x00000000 + 800059c4: 8001c4be .word 0x8001c4be + 800059c8: 00000000 .word 0x00000000 + 800059cc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x8d38fcadf2ef4c96 + 800059d0: 0007bb03 ld x22,0(x15) + 800059d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xac8eae2f6c1dedb3 + 800059d8: 0007bb83 ld x23,0(x15) + 800059dc: 00878793 addi x15,x15,8 + +00000000800059e0 : +Zksed_sm4ed_cg_cmp_rd_rs1_b22: + sm4ed x22, x22, x23, 0 # perform operation + 800059e0: 317b0b33 sm4ed x22,x22,x23,0x0 + # Check if x22 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x22, Zksed_sm4ed_cg_cmp_rd_rs1_b22, Zksed_sm4ed_cg_cmp_rd_rs1_b22_str) + 800059e4: 000fb383 ld x7,0(x31) + 800059e8: 01638c63 beq x7,x22,80005a00 + 800059ec: 7ec0546f jal x8,8000b1d8 + 800059f0: 800059e0 .word 0x800059e0 + 800059f4: 00000000 .word 0x00000000 + 800059f8: 8001c4f8 .word 0x8001c4f8 + 800059fc: 00000000 .word 0x00000000 + 80005a00: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x049c403b06212b88 + 80005a04: 0007bb83 ld x23,0(x15) + 80005a08: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xa9a2adf5f2790b8d + 80005a0c: 0007bc03 ld x24,0(x15) + 80005a10: 00878793 addi x15,x15,8 + +0000000080005a14 : +Zksed_sm4ed_cg_cmp_rd_rs1_b23: + sm4ed x23, x23, x24, 1 # perform operation + 80005a14: 718b8bb3 sm4ed x23,x23,x24,0x1 + # Check if x23 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x23, Zksed_sm4ed_cg_cmp_rd_rs1_b23, Zksed_sm4ed_cg_cmp_rd_rs1_b23_str) + 80005a18: 000fb383 ld x7,0(x31) + 80005a1c: 01738c63 beq x7,x23,80005a34 + 80005a20: 7b80546f jal x8,8000b1d8 + 80005a24: 80005a14 .word 0x80005a14 + 80005a28: 00000000 .word 0x00000000 + 80005a2c: 8001c532 .word 0x8001c532 + 80005a30: 00000000 .word 0x00000000 + 80005a34: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x82bcdd38e7f53a2f + 80005a38: 0007bc03 ld x24,0(x15) + 80005a3c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xa66b875f93d55a38 + 80005a40: 0007b603 ld x12,0(x15) + 80005a44: 00878793 addi x15,x15,8 + +0000000080005a48 : +Zksed_sm4ed_cg_cmp_rd_rs1_b24: + sm4ed x24, x24, x12, 3 # perform operation + 80005a48: f0cc0c33 sm4ed x24,x24,x12,0x3 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zksed_sm4ed_cg_cmp_rd_rs1_b24, Zksed_sm4ed_cg_cmp_rd_rs1_b24_str) + 80005a4c: 000fb383 ld x7,0(x31) + 80005a50: 01838c63 beq x7,x24,80005a68 + 80005a54: 7840546f jal x8,8000b1d8 + 80005a58: 80005a48 .word 0x80005a48 + 80005a5c: 00000000 .word 0x00000000 + 80005a60: 8001c56c .word 0x8001c56c + 80005a64: 00000000 .word 0x00000000 + 80005a68: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x703b066ebd09e65c + 80005a6c: 0007bc83 ld x25,0(x15) + 80005a70: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xa205c4813544fb99 + 80005a74: 0007be83 ld x29,0(x15) + 80005a78: 00878793 addi x15,x15,8 + +0000000080005a7c : +Zksed_sm4ed_cg_cmp_rd_rs1_b25: + sm4ed x25, x25, x29, 1 # perform operation + 80005a7c: 71dc8cb3 sm4ed x25,x25,x29,0x1 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zksed_sm4ed_cg_cmp_rd_rs1_b25, Zksed_sm4ed_cg_cmp_rd_rs1_b25_str) + 80005a80: 000fb383 ld x7,0(x31) + 80005a84: 01938c63 beq x7,x25,80005a9c + 80005a88: 7500546f jal x8,8000b1d8 + 80005a8c: 80005a7c .word 0x80005a7c + 80005a90: 00000000 .word 0x00000000 + 80005a94: 8001c5a6 .word 0x8001c5a6 + 80005a98: 00000000 .word 0x00000000 + 80005a9c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xb0e53e4cabe10aa7 + 80005aa0: 0007bd03 ld x26,0(x15) + 80005aa4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xe940ea551f96d4ce + 80005aa8: 0007b483 ld x9,0(x15) + 80005aac: 00878793 addi x15,x15,8 + +0000000080005ab0 : +Zksed_sm4ed_cg_cmp_rd_rs1_b26: + sm4ed x26, x26, x9, 3 # perform operation + 80005ab0: f09d0d33 sm4ed x26,x26,x9,0x3 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zksed_sm4ed_cg_cmp_rd_rs1_b26, Zksed_sm4ed_cg_cmp_rd_rs1_b26_str) + 80005ab4: 000fb383 ld x7,0(x31) + 80005ab8: 01a38c63 beq x7,x26,80005ad0 + 80005abc: 71c0546f jal x8,8000b1d8 + 80005ac0: 80005ab0 .word 0x80005ab0 + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 8001c5e0 .word 0x8001c5e0 + 80005acc: 00000000 .word 0x00000000 + 80005ad0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xda85196e1e274f89 + 80005ad4: 0007bd83 ld x27,0(x15) + 80005ad8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xe8c9a9bd7d2a1457 + 80005adc: 0007be83 ld x29,0(x15) + 80005ae0: 00878793 addi x15,x15,8 + +0000000080005ae4 : +Zksed_sm4ed_cg_cmp_rd_rs1_b27: + sm4ed x27, x27, x29, 0 # perform operation + 80005ae4: 31dd8db3 sm4ed x27,x27,x29,0x0 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zksed_sm4ed_cg_cmp_rd_rs1_b27, Zksed_sm4ed_cg_cmp_rd_rs1_b27_str) + 80005ae8: 000fb383 ld x7,0(x31) + 80005aec: 01b38c63 beq x7,x27,80005b04 + 80005af0: 6e80546f jal x8,8000b1d8 + 80005af4: 80005ae4 .word 0x80005ae4 + 80005af8: 00000000 .word 0x00000000 + 80005afc: 8001c61a .word 0x8001c61a + 80005b00: 00000000 .word 0x00000000 + 80005b04: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xac8daef4ecd59194 + 80005b08: 0007be03 ld x28,0(x15) + 80005b0c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x565bff23c8c4431e + 80005b10: 0007bb83 ld x23,0(x15) + 80005b14: 00878793 addi x15,x15,8 + +0000000080005b18 : +Zksed_sm4ed_cg_cmp_rd_rs1_b28: + sm4ed x28, x28, x23, 2 # perform operation + 80005b18: b17e0e33 sm4ed x28,x28,x23,0x2 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zksed_sm4ed_cg_cmp_rd_rs1_b28, Zksed_sm4ed_cg_cmp_rd_rs1_b28_str) + 80005b1c: 000fb383 ld x7,0(x31) + 80005b20: 01c38c63 beq x7,x28,80005b38 + 80005b24: 6b40546f jal x8,8000b1d8 + 80005b28: 80005b18 .word 0x80005b18 + 80005b2c: 00000000 .word 0x00000000 + 80005b30: 8001c654 .word 0x8001c654 + 80005b34: 00000000 .word 0x00000000 + 80005b38: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x5e0a07e2e4cb790d + 80005b3c: 0007be83 ld x29,0(x15) + 80005b40: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x187eb52b3fea5638 + 80005b44: 0007bb83 ld x23,0(x15) + 80005b48: 00878793 addi x15,x15,8 + +0000000080005b4c : +Zksed_sm4ed_cg_cmp_rd_rs1_b29: + sm4ed x29, x29, x23, 0 # perform operation + 80005b4c: 317e8eb3 sm4ed x29,x29,x23,0x0 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zksed_sm4ed_cg_cmp_rd_rs1_b29, Zksed_sm4ed_cg_cmp_rd_rs1_b29_str) + 80005b50: 000fb383 ld x7,0(x31) + 80005b54: 01d38c63 beq x7,x29,80005b6c + 80005b58: 6800546f jal x8,8000b1d8 + 80005b5c: 80005b4c .word 0x80005b4c + 80005b60: 00000000 .word 0x00000000 + 80005b64: 8001c68e .word 0x8001c68e + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xbd723c4bfd93bc00 + 80005b70: 0007bf03 ld x30,0(x15) + 80005b74: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x71c82da50bfe1862 + 80005b78: 0007ba03 ld x20,0(x15) + 80005b7c: 00878793 addi x15,x15,8 + +0000000080005b80 : +Zksed_sm4ed_cg_cmp_rd_rs1_b30: + sm4ed x30, x30, x20, 0 # perform operation + 80005b80: 314f0f33 sm4ed x30,x30,x20,0x0 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zksed_sm4ed_cg_cmp_rd_rs1_b30, Zksed_sm4ed_cg_cmp_rd_rs1_b30_str) + 80005b84: 000fb383 ld x7,0(x31) + 80005b88: 01e38c63 beq x7,x30,80005ba0 + 80005b8c: 64c0546f jal x8,8000b1d8 + 80005b90: 80005b80 .word 0x80005b80 + 80005b94: 00000000 .word 0x00000000 + 80005b98: 8001c6c8 .word 0x8001c6c8 + 80005b9c: 00000000 .word 0x00000000 + 80005ba0: 008f8f93 addi x31,x31,8 + + mv x28, x31 # switch signature pointer register to avoid conflict with test + 80005ba4: 000f8e13 addi x28,x31,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xc51421cad380ff48 + 80005ba8: 0007bf83 ld x31,0(x15) + 80005bac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xf136b4bbfe2c5d24 + 80005bb0: 0007b903 ld x18,0(x15) + 80005bb4: 00878793 addi x15,x15,8 + +0000000080005bb8 : +Zksed_sm4ed_cg_cmp_rd_rs1_b31: + sm4ed x31, x31, x18, 0 # perform operation + 80005bb8: 312f8fb3 sm4ed x31,x31,x18,0x0 + # Check if x31 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x31, Zksed_sm4ed_cg_cmp_rd_rs1_b31, Zksed_sm4ed_cg_cmp_rd_rs1_b31_str) + 80005bbc: 000e3383 ld x7,0(x28) + 80005bc0: 01f38c63 beq x7,x31,80005bd8 + 80005bc4: 6140546f jal x8,8000b1d8 + 80005bc8: 80005bb8 .word 0x80005bb8 + 80005bcc: 00000000 .word 0x00000000 + 80005bd0: 8001c702 .word 0x8001c702 + 80005bd4: 00000000 .word 0x00000000 + 80005bd8: 008e0e13 addi x28,x28,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xe83fda47e4b450f2 + 80005bdc: 0007bd83 ld x27,0(x15) + 80005be0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs2: x0 = 0x6e499daca7751ebd + 80005be4: 0007b003 ld x0,0(x15) + 80005be8: 00878793 addi x15,x15,8 + +0000000080005bec : +Zksed_sm4ed_cg_cmp_rd_rs2_b0: + sm4ed x0, x27, x0, 1 # perform operation + 80005bec: 700d8033 sm4ed x0,x27,x0,0x1 + # Check if x0 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x0, Zksed_sm4ed_cg_cmp_rd_rs2_b0, Zksed_sm4ed_cg_cmp_rd_rs2_b0_str) + 80005bf0: 000e3383 ld x7,0(x28) + 80005bf4: 00038c63 beq x7,x0,80005c0c + 80005bf8: 5e00546f jal x8,8000b1d8 + 80005bfc: 80005bec .word 0x80005bec + 80005c00: 00000000 .word 0x00000000 + 80005c04: 8001c73c .word 0x8001c73c + 80005c08: 00000000 .word 0x00000000 + 80005c0c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x2ed188bb9a6bde3f + 80005c10: 0007b983 ld x19,0(x15) + 80005c14: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x48b4397b955c1d03 + 80005c18: 0007b083 ld x1,0(x15) + 80005c1c: 00878793 addi x15,x15,8 + +0000000080005c20 : +Zksed_sm4ed_cg_cmp_rd_rs2_b1: + sm4ed x1, x19, x1, 0 # perform operation + 80005c20: 301980b3 sm4ed x1,x19,x1,0x0 + # Check if x1 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x1, Zksed_sm4ed_cg_cmp_rd_rs2_b1, Zksed_sm4ed_cg_cmp_rd_rs2_b1_str) + 80005c24: 000e3383 ld x7,0(x28) + 80005c28: 00138c63 beq x7,x1,80005c40 + 80005c2c: 5ac0546f jal x8,8000b1d8 + 80005c30: 80005c20 .word 0x80005c20 + 80005c34: 00000000 .word 0x00000000 + 80005c38: 8001c775 .word 0x8001c775 + 80005c3c: 00000000 .word 0x00000000 + 80005c40: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x9e87fc11e408ec52 + 80005c44: 0007b203 ld x4,0(x15) + 80005c48: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xc1978720875c4dfa + 80005c4c: 0007b103 ld x2,0(x15) + 80005c50: 00878793 addi x15,x15,8 + +0000000080005c54 : +Zksed_sm4ed_cg_cmp_rd_rs2_b2: + sm4ed x2, x4, x2, 0 # perform operation + 80005c54: 30220133 sm4ed x2,x4,x2,0x0 + # Check if x2 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x2, Zksed_sm4ed_cg_cmp_rd_rs2_b2, Zksed_sm4ed_cg_cmp_rd_rs2_b2_str) + 80005c58: 000e3383 ld x7,0(x28) + 80005c5c: 00238c63 beq x7,x2,80005c74 + 80005c60: 5780546f jal x8,8000b1d8 + 80005c64: 80005c54 .word 0x80005c54 + 80005c68: 00000000 .word 0x00000000 + 80005c6c: 8001c7ae .word 0x8001c7ae + 80005c70: 00000000 .word 0x00000000 + 80005c74: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xfccc23dc95160422 + 80005c78: 0007be83 ld x29,0(x15) + 80005c7c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x0e9579222b7cc131 + 80005c80: 0007b183 ld x3,0(x15) + 80005c84: 00878793 addi x15,x15,8 + +0000000080005c88 : +Zksed_sm4ed_cg_cmp_rd_rs2_b3: + sm4ed x3, x29, x3, 2 # perform operation + 80005c88: b03e81b3 sm4ed x3,x29,x3,0x2 + # Check if x3 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x3, Zksed_sm4ed_cg_cmp_rd_rs2_b3, Zksed_sm4ed_cg_cmp_rd_rs2_b3_str) + 80005c8c: 000e3383 ld x7,0(x28) + 80005c90: 00338c63 beq x7,x3,80005ca8 + 80005c94: 5440546f jal x8,8000b1d8 + 80005c98: 80005c88 .word 0x80005c88 + 80005c9c: 00000000 .word 0x00000000 + 80005ca0: 8001c7e7 .word 0x8001c7e7 + 80005ca4: 00000000 .word 0x00000000 + 80005ca8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x102c7acb6216c767 + 80005cac: 0007b983 ld x19,0(x15) + 80005cb0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x888f66c42a3a8b52 + 80005cb4: 0007b203 ld x4,0(x15) + 80005cb8: 00878793 addi x15,x15,8 + +0000000080005cbc : +Zksed_sm4ed_cg_cmp_rd_rs2_b4: + sm4ed x4, x19, x4, 3 # perform operation + 80005cbc: f0498233 sm4ed x4,x19,x4,0x3 + # Check if x4 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x4, Zksed_sm4ed_cg_cmp_rd_rs2_b4, Zksed_sm4ed_cg_cmp_rd_rs2_b4_str) + 80005cc0: 000e3383 ld x7,0(x28) + 80005cc4: 00438c63 beq x7,x4,80005cdc + 80005cc8: 5100546f jal x8,8000b1d8 + 80005ccc: 80005cbc .word 0x80005cbc + 80005cd0: 00000000 .word 0x00000000 + 80005cd4: 8001c820 .word 0x8001c820 + 80005cd8: 00000000 .word 0x00000000 + 80005cdc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x8978d4551ba10f5c + 80005ce0: 0007ba03 ld x20,0(x15) + 80005ce4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x39c7175cb3abfd6d + 80005ce8: 0007b283 ld x5,0(x15) + 80005cec: 00878793 addi x15,x15,8 + +0000000080005cf0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b5: + sm4ed x5, x20, x5, 0 # perform operation + 80005cf0: 305a02b3 sm4ed x5,x20,x5,0x0 + # Check if x5 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x5, Zksed_sm4ed_cg_cmp_rd_rs2_b5, Zksed_sm4ed_cg_cmp_rd_rs2_b5_str) + 80005cf4: 000e3383 ld x7,0(x28) + 80005cf8: 00538c63 beq x7,x5,80005d10 + 80005cfc: 4dc0546f jal x8,8000b1d8 + 80005d00: 80005cf0 .word 0x80005cf0 + 80005d04: 00000000 .word 0x00000000 + 80005d08: 8001c859 .word 0x8001c859 + 80005d0c: 00000000 .word 0x00000000 + 80005d10: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5603b02477329b01 + 80005d14: 0007b703 ld x14,0(x15) + 80005d18: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x4adcdfe29d0df17e + 80005d1c: 0007b303 ld x6,0(x15) + 80005d20: 00878793 addi x15,x15,8 + +0000000080005d24 : +Zksed_sm4ed_cg_cmp_rd_rs2_b6: + sm4ed x6, x14, x6, 2 # perform operation + 80005d24: b0670333 sm4ed x6,x14,x6,0x2 + # Check if x6 contains the expected result. x28 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x28, x8, x7, x6, Zksed_sm4ed_cg_cmp_rd_rs2_b6, Zksed_sm4ed_cg_cmp_rd_rs2_b6_str) + 80005d28: 000e3383 ld x7,0(x28) + 80005d2c: 00638c63 beq x7,x6,80005d44 + 80005d30: 4a80546f jal x8,8000b1d8 + 80005d34: 80005d24 .word 0x80005d24 + 80005d38: 00000000 .word 0x00000000 + 80005d3c: 8001c892 .word 0x8001c892 + 80005d40: 00000000 .word 0x00000000 + 80005d44: 008e0e13 addi x28,x28,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d48: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d4c: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xa85c2635092966d1 + 80005d50: 0007b803 ld x16,0(x15) + 80005d54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs2: x7 = 0x145fc69859f41cc6 + 80005d58: 0007b383 ld x7,0(x15) + 80005d5c: 00878793 addi x15,x15,8 + +0000000080005d60 : +Zksed_sm4ed_cg_cmp_rd_rs2_b7: + sm4ed x7, x16, x7, 0 # perform operation + 80005d60: 307803b3 sm4ed x7,x16,x7,0x0 + # Check if x7 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x7, Zksed_sm4ed_cg_cmp_rd_rs2_b7, Zksed_sm4ed_cg_cmp_rd_rs2_b7_str) + 80005d64: 000e3683 ld x13,0(x28) + 80005d68: 00768c63 beq x13,x7,80005d80 + 80005d6c: 4940576f jal x14,8000b200 + 80005d70: 80005d60 .word 0x80005d60 + 80005d74: 00000000 .word 0x00000000 + 80005d78: 8001c8cb .word 0x8001c8cb + 80005d7c: 00000000 .word 0x00000000 + 80005d80: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xdbd919331555d8ae + 80005d84: 0007bb83 ld x23,0(x15) + 80005d88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x8) # load rs2: x8 = 0x18c06b298442882a + 80005d8c: 0007b403 ld x8,0(x15) + 80005d90: 00878793 addi x15,x15,8 + +0000000080005d94 : +Zksed_sm4ed_cg_cmp_rd_rs2_b8: + sm4ed x8, x23, x8, 2 # perform operation + 80005d94: b08b8433 sm4ed x8,x23,x8,0x2 + # Check if x8 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x8, Zksed_sm4ed_cg_cmp_rd_rs2_b8, Zksed_sm4ed_cg_cmp_rd_rs2_b8_str) + 80005d98: 000e3683 ld x13,0(x28) + 80005d9c: 00868c63 beq x13,x8,80005db4 + 80005da0: 4600576f jal x14,8000b200 + 80005da4: 80005d94 .word 0x80005d94 + 80005da8: 00000000 .word 0x00000000 + 80005dac: 8001c904 .word 0x8001c904 + 80005db0: 00000000 .word 0x00000000 + 80005db4: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x806f8c7e24f79e37 + 80005db8: 0007bb03 ld x22,0(x15) + 80005dbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x2cc306741741a505 + 80005dc0: 0007b483 ld x9,0(x15) + 80005dc4: 00878793 addi x15,x15,8 + +0000000080005dc8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b9: + sm4ed x9, x22, x9, 2 # perform operation + 80005dc8: b09b04b3 sm4ed x9,x22,x9,0x2 + # Check if x9 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x9, Zksed_sm4ed_cg_cmp_rd_rs2_b9, Zksed_sm4ed_cg_cmp_rd_rs2_b9_str) + 80005dcc: 000e3683 ld x13,0(x28) + 80005dd0: 00968c63 beq x13,x9,80005de8 + 80005dd4: 42c0576f jal x14,8000b200 + 80005dd8: 80005dc8 .word 0x80005dc8 + 80005ddc: 00000000 .word 0x00000000 + 80005de0: 8001c93d .word 0x8001c93d + 80005de4: 00000000 .word 0x00000000 + 80005de8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xaf03661335ed8465 + 80005dec: 0007b603 ld x12,0(x15) + 80005df0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x8d60306aa18b8edf + 80005df4: 0007b503 ld x10,0(x15) + 80005df8: 00878793 addi x15,x15,8 + +0000000080005dfc : +Zksed_sm4ed_cg_cmp_rd_rs2_b10: + sm4ed x10, x12, x10, 0 # perform operation + 80005dfc: 30a60533 sm4ed x10,x12,x10,0x0 + # Check if x10 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x10, Zksed_sm4ed_cg_cmp_rd_rs2_b10, Zksed_sm4ed_cg_cmp_rd_rs2_b10_str) + 80005e00: 000e3683 ld x13,0(x28) + 80005e04: 00a68c63 beq x13,x10,80005e1c + 80005e08: 3f80576f jal x14,8000b200 + 80005e0c: 80005dfc .word 0x80005dfc + 80005e10: 00000000 .word 0x00000000 + 80005e14: 8001c976 .word 0x8001c976 + 80005e18: 00000000 .word 0x00000000 + 80005e1c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x15, x7) # load rs1: x7 = 0xc4633012a89a94f8 + 80005e20: 0007b383 ld x7,0(x15) + 80005e24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x825676999449f0ed + 80005e28: 0007b583 ld x11,0(x15) + 80005e2c: 00878793 addi x15,x15,8 + +0000000080005e30 : +Zksed_sm4ed_cg_cmp_rd_rs2_b11: + sm4ed x11, x7, x11, 0 # perform operation + 80005e30: 30b385b3 sm4ed x11,x7,x11,0x0 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zksed_sm4ed_cg_cmp_rd_rs2_b11, Zksed_sm4ed_cg_cmp_rd_rs2_b11_str) + 80005e34: 000e3683 ld x13,0(x28) + 80005e38: 00b68c63 beq x13,x11,80005e50 + 80005e3c: 3c40576f jal x14,8000b200 + 80005e40: 80005e30 .word 0x80005e30 + 80005e44: 00000000 .word 0x00000000 + 80005e48: 8001c9b0 .word 0x8001c9b0 + 80005e4c: 00000000 .word 0x00000000 + 80005e50: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xdef5d7e44864b611 + 80005e54: 0007b303 ld x6,0(x15) + 80005e58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xf5ce20da24d104d9 + 80005e5c: 0007b603 ld x12,0(x15) + 80005e60: 00878793 addi x15,x15,8 + +0000000080005e64 : +Zksed_sm4ed_cg_cmp_rd_rs2_b12: + sm4ed x12, x6, x12, 0 # perform operation + 80005e64: 30c30633 sm4ed x12,x6,x12,0x0 + # Check if x12 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x12, Zksed_sm4ed_cg_cmp_rd_rs2_b12, Zksed_sm4ed_cg_cmp_rd_rs2_b12_str) + 80005e68: 000e3683 ld x13,0(x28) + 80005e6c: 00c68c63 beq x13,x12,80005e84 + 80005e70: 3900576f jal x14,8000b200 + 80005e74: 80005e64 .word 0x80005e64 + 80005e78: 00000000 .word 0x00000000 + 80005e7c: 8001c9ea .word 0x8001c9ea + 80005e80: 00000000 .word 0x00000000 + 80005e84: 008e0e13 addi x28,x28,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80005e88: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80005e8c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x1ccf8c21cd3c4abb + 80005e90: 0007bc83 ld x25,0(x15) + 80005e94: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xdf2d8eb6b6ca9f31 + 80005e98: 0007b683 ld x13,0(x15) + 80005e9c: 00878793 addi x15,x15,8 + +0000000080005ea0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b13: + sm4ed x13, x25, x13, 0 # perform operation + 80005ea0: 30dc86b3 sm4ed x13,x25,x13,0x0 + # Check if x13 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x13, Zksed_sm4ed_cg_cmp_rd_rs2_b13, Zksed_sm4ed_cg_cmp_rd_rs2_b13_str) + 80005ea4: 000e3203 ld x4,0(x28) + 80005ea8: 00d20c63 beq x4,x13,80005ec0 + 80005eac: 314052ef jal x5,8000b1c0 + 80005eb0: 80005ea0 .word 0x80005ea0 + 80005eb4: 00000000 .word 0x00000000 + 80005eb8: 8001ca24 .word 0x8001ca24 + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x15, x22) # load rs1: x22 = 0x239855fb208420ad + 80005ec4: 0007bb03 ld x22,0(x15) + 80005ec8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xffef362c30b8e1a4 + 80005ecc: 0007b703 ld x14,0(x15) + 80005ed0: 00878793 addi x15,x15,8 + +0000000080005ed4 : +Zksed_sm4ed_cg_cmp_rd_rs2_b14: + sm4ed x14, x22, x14, 0 # perform operation + 80005ed4: 30eb0733 sm4ed x14,x22,x14,0x0 + # Check if x14 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x14, Zksed_sm4ed_cg_cmp_rd_rs2_b14, Zksed_sm4ed_cg_cmp_rd_rs2_b14_str) + 80005ed8: 000e3203 ld x4,0(x28) + 80005edc: 00e20c63 beq x4,x14,80005ef4 + 80005ee0: 2e0052ef jal x5,8000b1c0 + 80005ee4: 80005ed4 .word 0x80005ed4 + 80005ee8: 00000000 .word 0x00000000 + 80005eec: 8001ca5e .word 0x8001ca5e + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 008e0e13 addi x28,x28,8 + + mv x24, x15 # switch data pointer register to avoid conflict with test + 80005ef8: 00078c13 addi x24,x15,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x24, x29) # load rs1: x29 = 0x492cef55afa42a72 + 80005efc: 000c3e83 ld x29,0(x24) + 80005f00: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x15) # load rs2: x15 = 0x28657798d233368a + 80005f04: 000c3783 ld x15,0(x24) + 80005f08: 008c0c13 addi x24,x24,8 + +0000000080005f0c : +Zksed_sm4ed_cg_cmp_rd_rs2_b15: + sm4ed x15, x29, x15, 0 # perform operation + 80005f0c: 30fe87b3 sm4ed x15,x29,x15,0x0 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zksed_sm4ed_cg_cmp_rd_rs2_b15, Zksed_sm4ed_cg_cmp_rd_rs2_b15_str) + 80005f10: 000e3203 ld x4,0(x28) + 80005f14: 00f20c63 beq x4,x15,80005f2c + 80005f18: 2a8052ef jal x5,8000b1c0 + 80005f1c: 80005f0c .word 0x80005f0c + 80005f20: 00000000 .word 0x00000000 + 80005f24: 8001ca98 .word 0x8001ca98 + 80005f28: 00000000 .word 0x00000000 + 80005f2c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x24, x13) # load rs1: x13 = 0x89a66aa9138dcb24 + 80005f30: 000c3683 ld x13,0(x24) + 80005f34: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x16) # load rs2: x16 = 0xb91fecb54039c86a + 80005f38: 000c3803 ld x16,0(x24) + 80005f3c: 008c0c13 addi x24,x24,8 + +0000000080005f40 : +Zksed_sm4ed_cg_cmp_rd_rs2_b16: + sm4ed x16, x13, x16, 3 # perform operation + 80005f40: f1068833 sm4ed x16,x13,x16,0x3 + # Check if x16 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x16, Zksed_sm4ed_cg_cmp_rd_rs2_b16, Zksed_sm4ed_cg_cmp_rd_rs2_b16_str) + 80005f44: 000e3203 ld x4,0(x28) + 80005f48: 01020c63 beq x4,x16,80005f60 + 80005f4c: 274052ef jal x5,8000b1c0 + 80005f50: 80005f40 .word 0x80005f40 + 80005f54: 00000000 .word 0x00000000 + 80005f58: 8001cad2 .word 0x8001cad2 + 80005f5c: 00000000 .word 0x00000000 + 80005f60: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x24, x14) # load rs1: x14 = 0xbb5d487979a75b67 + 80005f64: 000c3703 ld x14,0(x24) + 80005f68: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs2: x17 = 0xf9f6aaa7f52bffd9 + 80005f6c: 000c3883 ld x17,0(x24) + 80005f70: 008c0c13 addi x24,x24,8 + +0000000080005f74 : +Zksed_sm4ed_cg_cmp_rd_rs2_b17: + sm4ed x17, x14, x17, 2 # perform operation + 80005f74: b11708b3 sm4ed x17,x14,x17,0x2 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zksed_sm4ed_cg_cmp_rd_rs2_b17, Zksed_sm4ed_cg_cmp_rd_rs2_b17_str) + 80005f78: 000e3203 ld x4,0(x28) + 80005f7c: 01120c63 beq x4,x17,80005f94 + 80005f80: 240052ef jal x5,8000b1c0 + 80005f84: 80005f74 .word 0x80005f74 + 80005f88: 00000000 .word 0x00000000 + 80005f8c: 8001cb0c .word 0x8001cb0c + 80005f90: 00000000 .word 0x00000000 + 80005f94: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x24, x6) # load rs1: x6 = 0xdade42d72a154ffd + 80005f98: 000c3303 ld x6,0(x24) + 80005f9c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x18) # load rs2: x18 = 0x34ed235c46319c40 + 80005fa0: 000c3903 ld x18,0(x24) + 80005fa4: 008c0c13 addi x24,x24,8 + +0000000080005fa8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b18: + sm4ed x18, x6, x18, 2 # perform operation + 80005fa8: b1230933 sm4ed x18,x6,x18,0x2 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zksed_sm4ed_cg_cmp_rd_rs2_b18, Zksed_sm4ed_cg_cmp_rd_rs2_b18_str) + 80005fac: 000e3203 ld x4,0(x28) + 80005fb0: 01220c63 beq x4,x18,80005fc8 + 80005fb4: 20c052ef jal x5,8000b1c0 + 80005fb8: 80005fa8 .word 0x80005fa8 + 80005fbc: 00000000 .word 0x00000000 + 80005fc0: 8001cb46 .word 0x8001cb46 + 80005fc4: 00000000 .word 0x00000000 + 80005fc8: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x24, x3) # load rs1: x3 = 0xa58a159e82acc91a + 80005fcc: 000c3183 ld x3,0(x24) + 80005fd0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs2: x19 = 0xb32096a2249b83c1 + 80005fd4: 000c3983 ld x19,0(x24) + 80005fd8: 008c0c13 addi x24,x24,8 + +0000000080005fdc : +Zksed_sm4ed_cg_cmp_rd_rs2_b19: + sm4ed x19, x3, x19, 3 # perform operation + 80005fdc: f13189b3 sm4ed x19,x3,x19,0x3 + # Check if x19 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x19, Zksed_sm4ed_cg_cmp_rd_rs2_b19, Zksed_sm4ed_cg_cmp_rd_rs2_b19_str) + 80005fe0: 000e3203 ld x4,0(x28) + 80005fe4: 01320c63 beq x4,x19,80005ffc + 80005fe8: 1d8052ef jal x5,8000b1c0 + 80005fec: 80005fdc .word 0x80005fdc + 80005ff0: 00000000 .word 0x00000000 + 80005ff4: 8001cb80 .word 0x8001cb80 + 80005ff8: 00000000 .word 0x00000000 + 80005ffc: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x24, x19) # load rs1: x19 = 0x726fae78ab9eb1c5 + 80006000: 000c3983 ld x19,0(x24) + 80006004: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x20) # load rs2: x20 = 0x082122cfd9f60aae + 80006008: 000c3a03 ld x20,0(x24) + 8000600c: 008c0c13 addi x24,x24,8 + +0000000080006010 : +Zksed_sm4ed_cg_cmp_rd_rs2_b20: + sm4ed x20, x19, x20, 3 # perform operation + 80006010: f1498a33 sm4ed x20,x19,x20,0x3 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zksed_sm4ed_cg_cmp_rd_rs2_b20, Zksed_sm4ed_cg_cmp_rd_rs2_b20_str) + 80006014: 000e3203 ld x4,0(x28) + 80006018: 01420c63 beq x4,x20,80006030 + 8000601c: 1a4052ef jal x5,8000b1c0 + 80006020: 80006010 .word 0x80006010 + 80006024: 00000000 .word 0x00000000 + 80006028: 8001cbba .word 0x8001cbba + 8000602c: 00000000 .word 0x00000000 + 80006030: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x24, x17) # load rs1: x17 = 0x8150f0cd0353acf2 + 80006034: 000c3883 ld x17,0(x24) + 80006038: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x21) # load rs2: x21 = 0xa4b1a0cc4d6b7658 + 8000603c: 000c3a83 ld x21,0(x24) + 80006040: 008c0c13 addi x24,x24,8 + +0000000080006044 : +Zksed_sm4ed_cg_cmp_rd_rs2_b21: + sm4ed x21, x17, x21, 0 # perform operation + 80006044: 31588ab3 sm4ed x21,x17,x21,0x0 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zksed_sm4ed_cg_cmp_rd_rs2_b21, Zksed_sm4ed_cg_cmp_rd_rs2_b21_str) + 80006048: 000e3203 ld x4,0(x28) + 8000604c: 01520c63 beq x4,x21,80006064 + 80006050: 170052ef jal x5,8000b1c0 + 80006054: 80006044 .word 0x80006044 + 80006058: 00000000 .word 0x00000000 + 8000605c: 8001cbf4 .word 0x8001cbf4 + 80006060: 00000000 .word 0x00000000 + 80006064: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x24, x30) # load rs1: x30 = 0xdbcddfd7628583c5 + 80006068: 000c3f03 ld x30,0(x24) + 8000606c: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x22) # load rs2: x22 = 0xb09719960ece146c + 80006070: 000c3b03 ld x22,0(x24) + 80006074: 008c0c13 addi x24,x24,8 + +0000000080006078 : +Zksed_sm4ed_cg_cmp_rd_rs2_b22: + sm4ed x22, x30, x22, 3 # perform operation + 80006078: f16f0b33 sm4ed x22,x30,x22,0x3 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zksed_sm4ed_cg_cmp_rd_rs2_b22, Zksed_sm4ed_cg_cmp_rd_rs2_b22_str) + 8000607c: 000e3203 ld x4,0(x28) + 80006080: 01620c63 beq x4,x22,80006098 + 80006084: 13c052ef jal x5,8000b1c0 + 80006088: 80006078 .word 0x80006078 + 8000608c: 00000000 .word 0x00000000 + 80006090: 8001cc2e .word 0x8001cc2e + 80006094: 00000000 .word 0x00000000 + 80006098: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x24, x0) # load rs1: x0 = 0x0889598af01423eb + 8000609c: 000c3003 ld x0,0(x24) + 800060a0: 008c0c13 addi x24,x24,8 + RVTEST_TESTDATA_LOAD_INT(x24, x23) # load rs2: x23 = 0x60f130f80bede73d + 800060a4: 000c3b83 ld x23,0(x24) + 800060a8: 008c0c13 addi x24,x24,8 + +00000000800060ac : +Zksed_sm4ed_cg_cmp_rd_rs2_b23: + sm4ed x23, x0, x23, 0 # perform operation + 800060ac: 31700bb3 sm4ed x23,x0,x23,0x0 + # Check if x23 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x23, Zksed_sm4ed_cg_cmp_rd_rs2_b23, Zksed_sm4ed_cg_cmp_rd_rs2_b23_str) + 800060b0: 000e3203 ld x4,0(x28) + 800060b4: 01720c63 beq x4,x23,800060cc + 800060b8: 108052ef jal x5,8000b1c0 + 800060bc: 800060ac .word 0x800060ac + 800060c0: 00000000 .word 0x00000000 + 800060c4: 8001cc68 .word 0x8001cc68 + 800060c8: 00000000 .word 0x00000000 + 800060cc: 008e0e13 addi x28,x28,8 + + mv x23, x24 # switch data pointer register to avoid conflict with test + 800060d0: 000c0b93 addi x23,x24,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xcc44335a3adcedae + 800060d4: 000bba83 ld x21,0(x23) + 800060d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x24) # load rs2: x24 = 0x06e3edbba32e40b9 + 800060dc: 000bbc03 ld x24,0(x23) + 800060e0: 008b8b93 addi x23,x23,8 + +00000000800060e4 : +Zksed_sm4ed_cg_cmp_rd_rs2_b24: + sm4ed x24, x21, x24, 1 # perform operation + 800060e4: 718a8c33 sm4ed x24,x21,x24,0x1 + # Check if x24 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x24, Zksed_sm4ed_cg_cmp_rd_rs2_b24, Zksed_sm4ed_cg_cmp_rd_rs2_b24_str) + 800060e8: 000e3203 ld x4,0(x28) + 800060ec: 01820c63 beq x4,x24,80006104 + 800060f0: 0d0052ef jal x5,8000b1c0 + 800060f4: 800060e4 .word 0x800060e4 + 800060f8: 00000000 .word 0x00000000 + 800060fc: 8001cca2 .word 0x8001cca2 + 80006100: 00000000 .word 0x00000000 + 80006104: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0x7aba8d675ae8401f + 80006108: 000bb103 ld x2,0(x23) + 8000610c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs2: x25 = 0x5afd70f707ef89ec + 80006110: 000bbc83 ld x25,0(x23) + 80006114: 008b8b93 addi x23,x23,8 + +0000000080006118 : +Zksed_sm4ed_cg_cmp_rd_rs2_b25: + sm4ed x25, x2, x25, 2 # perform operation + 80006118: b1910cb3 sm4ed x25,x2,x25,0x2 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zksed_sm4ed_cg_cmp_rd_rs2_b25, Zksed_sm4ed_cg_cmp_rd_rs2_b25_str) + 8000611c: 000e3203 ld x4,0(x28) + 80006120: 01920c63 beq x4,x25,80006138 + 80006124: 09c052ef jal x5,8000b1c0 + 80006128: 80006118 .word 0x80006118 + 8000612c: 00000000 .word 0x00000000 + 80006130: 8001ccdc .word 0x8001ccdc + 80006134: 00000000 .word 0x00000000 + 80006138: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x98c1e5366bf4f211 + 8000613c: 000bb403 ld x8,0(x23) + 80006140: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs2: x26 = 0x646bd6b46dc76b80 + 80006144: 000bbd03 ld x26,0(x23) + 80006148: 008b8b93 addi x23,x23,8 + +000000008000614c : +Zksed_sm4ed_cg_cmp_rd_rs2_b26: + sm4ed x26, x8, x26, 1 # perform operation + 8000614c: 71a40d33 sm4ed x26,x8,x26,0x1 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zksed_sm4ed_cg_cmp_rd_rs2_b26, Zksed_sm4ed_cg_cmp_rd_rs2_b26_str) + 80006150: 000e3203 ld x4,0(x28) + 80006154: 01a20c63 beq x4,x26,8000616c + 80006158: 068052ef jal x5,8000b1c0 + 8000615c: 8000614c .word 0x8000614c + 80006160: 00000000 .word 0x00000000 + 80006164: 8001cd16 .word 0x8001cd16 + 80006168: 00000000 .word 0x00000000 + 8000616c: 008e0e13 addi x28,x28,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x02281a29fbfabdfe + 80006170: 000bbf03 ld x30,0(x23) + 80006174: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs2: x27 = 0xf919df392c8f938b + 80006178: 000bbd83 ld x27,0(x23) + 8000617c: 008b8b93 addi x23,x23,8 + +0000000080006180 : +Zksed_sm4ed_cg_cmp_rd_rs2_b27: + sm4ed x27, x30, x27, 0 # perform operation + 80006180: 31bf0db3 sm4ed x27,x30,x27,0x0 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zksed_sm4ed_cg_cmp_rd_rs2_b27, Zksed_sm4ed_cg_cmp_rd_rs2_b27_str) + 80006184: 000e3203 ld x4,0(x28) + 80006188: 01b20c63 beq x4,x27,800061a0 + 8000618c: 034052ef jal x5,8000b1c0 + 80006190: 80006180 .word 0x80006180 + 80006194: 00000000 .word 0x00000000 + 80006198: 8001cd50 .word 0x8001cd50 + 8000619c: 00000000 .word 0x00000000 + 800061a0: 008e0e13 addi x28,x28,8 + + mv x29, x28 # switch signature pointer register to avoid conflict with test + 800061a4: 000e0e93 addi x29,x28,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x84cc5c5bc18f17e4 + 800061a8: 000bb903 ld x18,0(x23) + 800061ac: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x28) # load rs2: x28 = 0x3db5eb26b74b3db8 + 800061b0: 000bbe03 ld x28,0(x23) + 800061b4: 008b8b93 addi x23,x23,8 + +00000000800061b8 : +Zksed_sm4ed_cg_cmp_rd_rs2_b28: + sm4ed x28, x18, x28, 0 # perform operation + 800061b8: 31c90e33 sm4ed x28,x18,x28,0x0 + # Check if x28 contains the expected result. x29 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x29, x5, x4, x28, Zksed_sm4ed_cg_cmp_rd_rs2_b28, Zksed_sm4ed_cg_cmp_rd_rs2_b28_str) + 800061bc: 000eb203 ld x4,0(x29) + 800061c0: 01c20c63 beq x4,x28,800061d8 + 800061c4: 7fd042ef jal x5,8000b1c0 + 800061c8: 800061b8 .word 0x800061b8 + 800061cc: 00000000 .word 0x00000000 + 800061d0: 8001cd8a .word 0x8001cd8a + 800061d4: 00000000 .word 0x00000000 + 800061d8: 008e8e93 addi x29,x29,8 + + mv x1, x29 # switch signature pointer register to avoid conflict with test + 800061dc: 000e8093 addi x1,x29,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x55726f3ec20887bd + 800061e0: 000bb803 ld x16,0(x23) + 800061e4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs2: x29 = 0x0af35bf93cea876d + 800061e8: 000bbe83 ld x29,0(x23) + 800061ec: 008b8b93 addi x23,x23,8 + +00000000800061f0 : +Zksed_sm4ed_cg_cmp_rd_rs2_b29: + sm4ed x29, x16, x29, 3 # perform operation + 800061f0: f1d80eb3 sm4ed x29,x16,x29,0x3 + # Check if x29 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x29, Zksed_sm4ed_cg_cmp_rd_rs2_b29, Zksed_sm4ed_cg_cmp_rd_rs2_b29_str) + 800061f4: 0000b203 ld x4,0(x1) + 800061f8: 01d20c63 beq x4,x29,80006210 + 800061fc: 7c5042ef jal x5,8000b1c0 + 80006200: 800061f0 .word 0x800061f0 + 80006204: 00000000 .word 0x00000000 + 80006208: 8001cdc4 .word 0x8001cdc4 + 8000620c: 00000000 .word 0x00000000 + 80006210: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0x971f00a8b1f2fc6f + 80006214: 000bb383 ld x7,0(x23) + 80006218: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs2: x30 = 0x0a489d68d774a5ad + 8000621c: 000bbf03 ld x30,0(x23) + 80006220: 008b8b93 addi x23,x23,8 + +0000000080006224 : +Zksed_sm4ed_cg_cmp_rd_rs2_b30: + sm4ed x30, x7, x30, 2 # perform operation + 80006224: b1e38f33 sm4ed x30,x7,x30,0x2 + # Check if x30 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x30, Zksed_sm4ed_cg_cmp_rd_rs2_b30, Zksed_sm4ed_cg_cmp_rd_rs2_b30_str) + 80006228: 0000b203 ld x4,0(x1) + 8000622c: 01e20c63 beq x4,x30,80006244 + 80006230: 791042ef jal x5,8000b1c0 + 80006234: 80006224 .word 0x80006224 + 80006238: 00000000 .word 0x00000000 + 8000623c: 8001cdfe .word 0x8001cdfe + 80006240: 00000000 .word 0x00000000 + 80006244: 00808093 addi x1,x1,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x23, x27) # load rs1: x27 = 0x23b75e09e2e073d5 + 80006248: 000bbd83 ld x27,0(x23) + 8000624c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x31) # load rs2: x31 = 0x811543fb9c4433ae + 80006250: 000bbf83 ld x31,0(x23) + 80006254: 008b8b93 addi x23,x23,8 + +0000000080006258 : +Zksed_sm4ed_cg_cmp_rd_rs2_b31: + sm4ed x31, x27, x31, 3 # perform operation + 80006258: f1fd8fb3 sm4ed x31,x27,x31,0x3 + # Check if x31 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x31, Zksed_sm4ed_cg_cmp_rd_rs2_b31, Zksed_sm4ed_cg_cmp_rd_rs2_b31_str) + 8000625c: 0000b203 ld x4,0(x1) + 80006260: 01f20c63 beq x4,x31,80006278 + 80006264: 75d042ef jal x5,8000b1c0 + 80006268: 80006258 .word 0x80006258 + 8000626c: 00000000 .word 0x00000000 + 80006270: 8001ce38 .word 0x8001ce38 + 80006274: 00000000 .word 0x00000000 + 80006278: 00808093 addi x1,x1,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs1: x0 = 0x6403e6e9d6c3bd09 + 8000627c: 000bb003 ld x0,0(x23) + 80006280: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x0) # load rs2: x0 = 0x67dcbdbf5c9360ae + 80006284: 000bb003 ld x0,0(x23) + 80006288: 008b8b93 addi x23,x23,8 + +000000008000628c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0: + sm4ed x0, x0, x0, 2 # perform operation + 8000628c: b0000033 sm4ed x0,x0,x0,0x2 + # Check if x0 contains the expected result. x1 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x1, x5, x4, x0, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b0_str) + 80006290: 0000b203 ld x4,0(x1) + 80006294: 00020c63 beq x4,x0,800062ac + 80006298: 729042ef jal x5,8000b1c0 + 8000629c: 8000628c .word 0x8000628c + 800062a0: 00000000 .word 0x00000000 + 800062a4: 8001ce72 .word 0x8001ce72 + 800062a8: 00000000 .word 0x00000000 + 800062ac: 00808093 addi x1,x1,8 + + mv x24, x1 # switch signature pointer register to avoid conflict with test + 800062b0: 00008c13 addi x24,x1,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs1: x1 = 0xcea3e592f034f6d1 + 800062b4: 000bb083 ld x1,0(x23) + 800062b8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x1) # load rs2: x1 = 0xc3697a08f939096b + 800062bc: 000bb083 ld x1,0(x23) + 800062c0: 008b8b93 addi x23,x23,8 + +00000000800062c4 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1: + sm4ed x1, x1, x1, 0 # perform operation + 800062c4: 301080b3 sm4ed x1,x1,x1,0x0 + # Check if x1 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x1, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b1_str) + 800062c8: 000c3203 ld x4,0(x24) + 800062cc: 00120c63 beq x4,x1,800062e4 + 800062d0: 6f1042ef jal x5,8000b1c0 + 800062d4: 800062c4 .word 0x800062c4 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 8001ceaf .word 0x8001ceaf + 800062e0: 00000000 .word 0x00000000 + 800062e4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs1: x2 = 0xb62ceb4c977ec1fa + 800062e8: 000bb103 ld x2,0(x23) + 800062ec: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x2) # load rs2: x2 = 0x753d9e23901f60c7 + 800062f0: 000bb103 ld x2,0(x23) + 800062f4: 008b8b93 addi x23,x23,8 + +00000000800062f8 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2: + sm4ed x2, x2, x2, 3 # perform operation + 800062f8: f0210133 sm4ed x2,x2,x2,0x3 + # Check if x2 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x2, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b2_str) + 800062fc: 000c3203 ld x4,0(x24) + 80006300: 00220c63 beq x4,x2,80006318 + 80006304: 6bd042ef jal x5,8000b1c0 + 80006308: 800062f8 .word 0x800062f8 + 8000630c: 00000000 .word 0x00000000 + 80006310: 8001ceec .word 0x8001ceec + 80006314: 00000000 .word 0x00000000 + 80006318: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs1: x3 = 0xdd2b3331029b51ad + 8000631c: 000bb183 ld x3,0(x23) + 80006320: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x3) # load rs2: x3 = 0xce9cdc169f662229 + 80006324: 000bb183 ld x3,0(x23) + 80006328: 008b8b93 addi x23,x23,8 + +000000008000632c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3: + sm4ed x3, x3, x3, 1 # perform operation + 8000632c: 703181b3 sm4ed x3,x3,x3,0x1 + # Check if x3 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x3, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b3_str) + 80006330: 000c3203 ld x4,0(x24) + 80006334: 00320c63 beq x4,x3,8000634c + 80006338: 689042ef jal x5,8000b1c0 + 8000633c: 8000632c .word 0x8000632c + 80006340: 00000000 .word 0x00000000 + 80006344: 8001cf29 .word 0x8001cf29 + 80006348: 00000000 .word 0x00000000 + 8000634c: 008c0c13 addi x24,x24,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80006350: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80006354: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs1: x4 = 0xe62460ad46170919 + 80006358: 000bb203 ld x4,0(x23) + 8000635c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x4) # load rs2: x4 = 0x10f235f6b4dcfe96 + 80006360: 000bb203 ld x4,0(x23) + 80006364: 008b8b93 addi x23,x23,8 + +0000000080006368 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4: + sm4ed x4, x4, x4, 3 # perform operation + 80006368: f0420233 sm4ed x4,x4,x4,0x3 + # Check if x4 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x4, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b4_str) + 8000636c: 000c3683 ld x13,0(x24) + 80006370: 00468c63 beq x13,x4,80006388 + 80006374: 68d0476f jal x14,8000b200 + 80006378: 80006368 .word 0x80006368 + 8000637c: 00000000 .word 0x00000000 + 80006380: 8001cf66 .word 0x8001cf66 + 80006384: 00000000 .word 0x00000000 + 80006388: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs1: x5 = 0x0eb1843cbd1f4530 + 8000638c: 000bb283 ld x5,0(x23) + 80006390: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x5) # load rs2: x5 = 0x579ff31588256d17 + 80006394: 000bb283 ld x5,0(x23) + 80006398: 008b8b93 addi x23,x23,8 + +000000008000639c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5: + sm4ed x5, x5, x5, 3 # perform operation + 8000639c: f05282b3 sm4ed x5,x5,x5,0x3 + # Check if x5 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x5, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b5_str) + 800063a0: 000c3683 ld x13,0(x24) + 800063a4: 00568c63 beq x13,x5,800063bc + 800063a8: 6590476f jal x14,8000b200 + 800063ac: 8000639c .word 0x8000639c + 800063b0: 00000000 .word 0x00000000 + 800063b4: 8001cfa3 .word 0x8001cfa3 + 800063b8: 00000000 .word 0x00000000 + 800063bc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x4367afd1ea663b16 + 800063c0: 000bb303 ld x6,0(x23) + 800063c4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs2: x6 = 0x61104546e17108c2 + 800063c8: 000bb303 ld x6,0(x23) + 800063cc: 008b8b93 addi x23,x23,8 + +00000000800063d0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6: + sm4ed x6, x6, x6, 3 # perform operation + 800063d0: f0630333 sm4ed x6,x6,x6,0x3 + # Check if x6 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x6, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b6_str) + 800063d4: 000c3683 ld x13,0(x24) + 800063d8: 00668c63 beq x13,x6,800063f0 + 800063dc: 6250476f jal x14,8000b200 + 800063e0: 800063d0 .word 0x800063d0 + 800063e4: 00000000 .word 0x00000000 + 800063e8: 8001cfe0 .word 0x8001cfe0 + 800063ec: 00000000 .word 0x00000000 + 800063f0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs1: x7 = 0xdd829f3f3fa5e2ea + 800063f4: 000bb383 ld x7,0(x23) + 800063f8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x7) # load rs2: x7 = 0xb444a8916c4a1cd4 + 800063fc: 000bb383 ld x7,0(x23) + 80006400: 008b8b93 addi x23,x23,8 + +0000000080006404 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7: + sm4ed x7, x7, x7, 2 # perform operation + 80006404: b07383b3 sm4ed x7,x7,x7,0x2 + # Check if x7 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x7, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b7_str) + 80006408: 000c3683 ld x13,0(x24) + 8000640c: 00768c63 beq x13,x7,80006424 + 80006410: 5f10476f jal x14,8000b200 + 80006414: 80006404 .word 0x80006404 + 80006418: 00000000 .word 0x00000000 + 8000641c: 8001d01d .word 0x8001d01d + 80006420: 00000000 .word 0x00000000 + 80006424: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x219aa1ece114f92a + 80006428: 000bb403 ld x8,0(x23) + 8000642c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs2: x8 = 0x3349ab5259ae503b + 80006430: 000bb403 ld x8,0(x23) + 80006434: 008b8b93 addi x23,x23,8 + +0000000080006438 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8: + sm4ed x8, x8, x8, 2 # perform operation + 80006438: b0840433 sm4ed x8,x8,x8,0x2 + # Check if x8 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x8, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b8_str) + 8000643c: 000c3683 ld x13,0(x24) + 80006440: 00868c63 beq x13,x8,80006458 + 80006444: 5bd0476f jal x14,8000b200 + 80006448: 80006438 .word 0x80006438 + 8000644c: 00000000 .word 0x00000000 + 80006450: 8001d05a .word 0x8001d05a + 80006454: 00000000 .word 0x00000000 + 80006458: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xeb35357f93663766 + 8000645c: 000bb483 ld x9,0(x23) + 80006460: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs2: x9 = 0x3d40c837793b5038 + 80006464: 000bb483 ld x9,0(x23) + 80006468: 008b8b93 addi x23,x23,8 + +000000008000646c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9: + sm4ed x9, x9, x9, 1 # perform operation + 8000646c: 709484b3 sm4ed x9,x9,x9,0x1 + # Check if x9 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x9, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b9_str) + 80006470: 000c3683 ld x13,0(x24) + 80006474: 00968c63 beq x13,x9,8000648c + 80006478: 5890476f jal x14,8000b200 + 8000647c: 8000646c .word 0x8000646c + 80006480: 00000000 .word 0x00000000 + 80006484: 8001d097 .word 0x8001d097 + 80006488: 00000000 .word 0x00000000 + 8000648c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x980f554dbc23e5ca + 80006490: 000bb503 ld x10,0(x23) + 80006494: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs2: x10 = 0x739a6c42063d250c + 80006498: 000bb503 ld x10,0(x23) + 8000649c: 008b8b93 addi x23,x23,8 + +00000000800064a0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10: + sm4ed x10, x10, x10, 3 # perform operation + 800064a0: f0a50533 sm4ed x10,x10,x10,0x3 + # Check if x10 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x10, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b10_str) + 800064a4: 000c3683 ld x13,0(x24) + 800064a8: 00a68c63 beq x13,x10,800064c0 + 800064ac: 5550476f jal x14,8000b200 + 800064b0: 800064a0 .word 0x800064a0 + 800064b4: 00000000 .word 0x00000000 + 800064b8: 8001d0d4 .word 0x8001d0d4 + 800064bc: 00000000 .word 0x00000000 + 800064c0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xeb849cd02dbf3968 + 800064c4: 000bb583 ld x11,0(x23) + 800064c8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs2: x11 = 0x0215d03d583685ab + 800064cc: 000bb583 ld x11,0(x23) + 800064d0: 008b8b93 addi x23,x23,8 + +00000000800064d4 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11: + sm4ed x11, x11, x11, 2 # perform operation + 800064d4: b0b585b3 sm4ed x11,x11,x11,0x2 + # Check if x11 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x11, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b11_str) + 800064d8: 000c3683 ld x13,0(x24) + 800064dc: 00b68c63 beq x13,x11,800064f4 + 800064e0: 5210476f jal x14,8000b200 + 800064e4: 800064d4 .word 0x800064d4 + 800064e8: 00000000 .word 0x00000000 + 800064ec: 8001d112 .word 0x8001d112 + 800064f0: 00000000 .word 0x00000000 + 800064f4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x63da83b0fc95649a + 800064f8: 000bb603 ld x12,0(x23) + 800064fc: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs2: x12 = 0x5e334b0cad9f6635 + 80006500: 000bb603 ld x12,0(x23) + 80006504: 008b8b93 addi x23,x23,8 + +0000000080006508 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12: + sm4ed x12, x12, x12, 3 # perform operation + 80006508: f0c60633 sm4ed x12,x12,x12,0x3 + # Check if x12 contains the expected result. x24 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x24, x14, x13, x12, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b12_str) + 8000650c: 000c3683 ld x13,0(x24) + 80006510: 00c68c63 beq x13,x12,80006528 + 80006514: 4ed0476f jal x14,8000b200 + 80006518: 80006508 .word 0x80006508 + 8000651c: 00000000 .word 0x00000000 + 80006520: 8001d150 .word 0x8001d150 + 80006524: 00000000 .word 0x00000000 + 80006528: 008c0c13 addi x24,x24,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000652c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80006530: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x9ca6aec152dcb5ab + 80006534: 000bb683 ld x13,0(x23) + 80006538: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs2: x13 = 0xf2bd455e9eec8b36 + 8000653c: 000bb683 ld x13,0(x23) + 80006540: 008b8b93 addi x23,x23,8 + +0000000080006544 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13: + sm4ed x13, x13, x13, 1 # perform operation + 80006544: 70d686b3 sm4ed x13,x13,x13,0x1 + # Check if x13 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x13, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b13_str) + 80006548: 000c3383 ld x7,0(x24) + 8000654c: 00d38c63 beq x7,x13,80006564 + 80006550: 4890446f jal x8,8000b1d8 + 80006554: 80006544 .word 0x80006544 + 80006558: 00000000 .word 0x00000000 + 8000655c: 8001d18e .word 0x8001d18e + 80006560: 00000000 .word 0x00000000 + 80006564: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xee83b9cc70b90868 + 80006568: 000bb703 ld x14,0(x23) + 8000656c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs2: x14 = 0xa4b9251829f1b2be + 80006570: 000bb703 ld x14,0(x23) + 80006574: 008b8b93 addi x23,x23,8 + +0000000080006578 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14: + sm4ed x14, x14, x14, 3 # perform operation + 80006578: f0e70733 sm4ed x14,x14,x14,0x3 + # Check if x14 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x14, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b14_str) + 8000657c: 000c3383 ld x7,0(x24) + 80006580: 00e38c63 beq x7,x14,80006598 + 80006584: 4550446f jal x8,8000b1d8 + 80006588: 80006578 .word 0x80006578 + 8000658c: 00000000 .word 0x00000000 + 80006590: 8001d1cc .word 0x8001d1cc + 80006594: 00000000 .word 0x00000000 + 80006598: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xbf759442fa799e31 + 8000659c: 000bb783 ld x15,0(x23) + 800065a0: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs2: x15 = 0xf4008a60740d443e + 800065a4: 000bb783 ld x15,0(x23) + 800065a8: 008b8b93 addi x23,x23,8 + +00000000800065ac : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15: + sm4ed x15, x15, x15, 3 # perform operation + 800065ac: f0f787b3 sm4ed x15,x15,x15,0x3 + # Check if x15 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x15, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b15_str) + 800065b0: 000c3383 ld x7,0(x24) + 800065b4: 00f38c63 beq x7,x15,800065cc + 800065b8: 4210446f jal x8,8000b1d8 + 800065bc: 800065ac .word 0x800065ac + 800065c0: 00000000 .word 0x00000000 + 800065c4: 8001d20a .word 0x8001d20a + 800065c8: 00000000 .word 0x00000000 + 800065cc: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xc7ac7f247b6cee12 + 800065d0: 000bb803 ld x16,0(x23) + 800065d4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs2: x16 = 0x330cc0932c1a9237 + 800065d8: 000bb803 ld x16,0(x23) + 800065dc: 008b8b93 addi x23,x23,8 + +00000000800065e0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16: + sm4ed x16, x16, x16, 1 # perform operation + 800065e0: 71080833 sm4ed x16,x16,x16,0x1 + # Check if x16 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x16, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b16_str) + 800065e4: 000c3383 ld x7,0(x24) + 800065e8: 01038c63 beq x7,x16,80006600 + 800065ec: 3ed0446f jal x8,8000b1d8 + 800065f0: 800065e0 .word 0x800065e0 + 800065f4: 00000000 .word 0x00000000 + 800065f8: 8001d248 .word 0x8001d248 + 800065fc: 00000000 .word 0x00000000 + 80006600: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0xfc8da572729dc9e7 + 80006604: 000bb883 ld x17,0(x23) + 80006608: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs2: x17 = 0xbd708176018320c8 + 8000660c: 000bb883 ld x17,0(x23) + 80006610: 008b8b93 addi x23,x23,8 + +0000000080006614 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17: + sm4ed x17, x17, x17, 1 # perform operation + 80006614: 711888b3 sm4ed x17,x17,x17,0x1 + # Check if x17 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x17, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b17_str) + 80006618: 000c3383 ld x7,0(x24) + 8000661c: 01138c63 beq x7,x17,80006634 + 80006620: 3b90446f jal x8,8000b1d8 + 80006624: 80006614 .word 0x80006614 + 80006628: 00000000 .word 0x00000000 + 8000662c: 8001d286 .word 0x8001d286 + 80006630: 00000000 .word 0x00000000 + 80006634: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x799a79bee60ae4ca + 80006638: 000bb903 ld x18,0(x23) + 8000663c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs2: x18 = 0x485cfc055d7b581e + 80006640: 000bb903 ld x18,0(x23) + 80006644: 008b8b93 addi x23,x23,8 + +0000000080006648 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18: + sm4ed x18, x18, x18, 0 # perform operation + 80006648: 31290933 sm4ed x18,x18,x18,0x0 + # Check if x18 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x18, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b18_str) + 8000664c: 000c3383 ld x7,0(x24) + 80006650: 01238c63 beq x7,x18,80006668 + 80006654: 3850446f jal x8,8000b1d8 + 80006658: 80006648 .word 0x80006648 + 8000665c: 00000000 .word 0x00000000 + 80006660: 8001d2c4 .word 0x8001d2c4 + 80006664: 00000000 .word 0x00000000 + 80006668: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xf4ae69cbeec1c07a + 8000666c: 000bb983 ld x19,0(x23) + 80006670: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs2: x19 = 0xf2417c01b8f9a267 + 80006674: 000bb983 ld x19,0(x23) + 80006678: 008b8b93 addi x23,x23,8 + +000000008000667c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19: + sm4ed x19, x19, x19, 2 # perform operation + 8000667c: b13989b3 sm4ed x19,x19,x19,0x2 + # Check if x19 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x19, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b19_str) + 80006680: 000c3383 ld x7,0(x24) + 80006684: 01338c63 beq x7,x19,8000669c + 80006688: 3510446f jal x8,8000b1d8 + 8000668c: 8000667c .word 0x8000667c + 80006690: 00000000 .word 0x00000000 + 80006694: 8001d302 .word 0x8001d302 + 80006698: 00000000 .word 0x00000000 + 8000669c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x3c3e20c058dc0a43 + 800066a0: 000bba03 ld x20,0(x23) + 800066a4: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs2: x20 = 0xabe1fa54c3759270 + 800066a8: 000bba03 ld x20,0(x23) + 800066ac: 008b8b93 addi x23,x23,8 + +00000000800066b0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20: + sm4ed x20, x20, x20, 1 # perform operation + 800066b0: 714a0a33 sm4ed x20,x20,x20,0x1 + # Check if x20 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x20, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b20_str) + 800066b4: 000c3383 ld x7,0(x24) + 800066b8: 01438c63 beq x7,x20,800066d0 + 800066bc: 31d0446f jal x8,8000b1d8 + 800066c0: 800066b0 .word 0x800066b0 + 800066c4: 00000000 .word 0x00000000 + 800066c8: 8001d340 .word 0x8001d340 + 800066cc: 00000000 .word 0x00000000 + 800066d0: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x8d8e29d333dbd15c + 800066d4: 000bba83 ld x21,0(x23) + 800066d8: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs2: x21 = 0x89d2d1a5ef54252b + 800066dc: 000bba83 ld x21,0(x23) + 800066e0: 008b8b93 addi x23,x23,8 + +00000000800066e4 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21: + sm4ed x21, x21, x21, 3 # perform operation + 800066e4: f15a8ab3 sm4ed x21,x21,x21,0x3 + # Check if x21 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x21, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b21_str) + 800066e8: 000c3383 ld x7,0(x24) + 800066ec: 01538c63 beq x7,x21,80006704 + 800066f0: 2e90446f jal x8,8000b1d8 + 800066f4: 800066e4 .word 0x800066e4 + 800066f8: 00000000 .word 0x00000000 + 800066fc: 8001d37e .word 0x8001d37e + 80006700: 00000000 .word 0x00000000 + 80006704: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0xe7f6c55f2fc4cd17 + 80006708: 000bbb03 ld x22,0(x23) + 8000670c: 008b8b93 addi x23,x23,8 + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs2: x22 = 0x53e2561edc6a1e83 + 80006710: 000bbb03 ld x22,0(x23) + 80006714: 008b8b93 addi x23,x23,8 + +0000000080006718 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22: + sm4ed x22, x22, x22, 1 # perform operation + 80006718: 716b0b33 sm4ed x22,x22,x22,0x1 + # Check if x22 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x22, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b22_str) + 8000671c: 000c3383 ld x7,0(x24) + 80006720: 01638c63 beq x7,x22,80006738 + 80006724: 2b50446f jal x8,8000b1d8 + 80006728: 80006718 .word 0x80006718 + 8000672c: 00000000 .word 0x00000000 + 80006730: 8001d3bc .word 0x8001d3bc + 80006734: 00000000 .word 0x00000000 + 80006738: 008c0c13 addi x24,x24,8 + + mv x15, x23 # switch data pointer register to avoid conflict with test + 8000673c: 000b8793 addi x15,x23,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x9346341206af824f + 80006740: 0007bb83 ld x23,0(x15) + 80006744: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xa484dc67017994e4 + 80006748: 0007bb83 ld x23,0(x15) + 8000674c: 00878793 addi x15,x15,8 + +0000000080006750 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23: + sm4ed x23, x23, x23, 0 # perform operation + 80006750: 317b8bb3 sm4ed x23,x23,x23,0x0 + # Check if x23 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x23, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b23_str) + 80006754: 000c3383 ld x7,0(x24) + 80006758: 01738c63 beq x7,x23,80006770 + 8000675c: 27d0446f jal x8,8000b1d8 + 80006760: 80006750 .word 0x80006750 + 80006764: 00000000 .word 0x00000000 + 80006768: 8001d3fa .word 0x8001d3fa + 8000676c: 00000000 .word 0x00000000 + 80006770: 008c0c13 addi x24,x24,8 + + mv x31, x24 # switch signature pointer register to avoid conflict with test + 80006774: 000c0f93 addi x31,x24,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x2ddedd05da1c0bcd + 80006778: 0007bc03 ld x24,0(x15) + 8000677c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xeb22c4f6506797a3 + 80006780: 0007bc03 ld x24,0(x15) + 80006784: 00878793 addi x15,x15,8 + +0000000080006788 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24: + sm4ed x24, x24, x24, 1 # perform operation + 80006788: 718c0c33 sm4ed x24,x24,x24,0x1 + # Check if x24 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x24, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b24_str) + 8000678c: 000fb383 ld x7,0(x31) + 80006790: 01838c63 beq x7,x24,800067a8 + 80006794: 2450446f jal x8,8000b1d8 + 80006798: 80006788 .word 0x80006788 + 8000679c: 00000000 .word 0x00000000 + 800067a0: 8001d438 .word 0x8001d438 + 800067a4: 00000000 .word 0x00000000 + 800067a8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xdfac16ac3a265052 + 800067ac: 0007bc83 ld x25,0(x15) + 800067b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x0486729990cec5b1 + 800067b4: 0007bc83 ld x25,0(x15) + 800067b8: 00878793 addi x15,x15,8 + +00000000800067bc : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25: + sm4ed x25, x25, x25, 0 # perform operation + 800067bc: 319c8cb3 sm4ed x25,x25,x25,0x0 + # Check if x25 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x25, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b25_str) + 800067c0: 000fb383 ld x7,0(x31) + 800067c4: 01938c63 beq x7,x25,800067dc + 800067c8: 2110446f jal x8,8000b1d8 + 800067cc: 800067bc .word 0x800067bc + 800067d0: 00000000 .word 0x00000000 + 800067d4: 8001d476 .word 0x8001d476 + 800067d8: 00000000 .word 0x00000000 + 800067dc: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xa69db5a936ac31bf + 800067e0: 0007bd03 ld x26,0(x15) + 800067e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x7ea399d7ed68d745 + 800067e8: 0007bd03 ld x26,0(x15) + 800067ec: 00878793 addi x15,x15,8 + +00000000800067f0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26: + sm4ed x26, x26, x26, 1 # perform operation + 800067f0: 71ad0d33 sm4ed x26,x26,x26,0x1 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b26_str) + 800067f4: 000fb383 ld x7,0(x31) + 800067f8: 01a38c63 beq x7,x26,80006810 + 800067fc: 1dd0446f jal x8,8000b1d8 + 80006800: 800067f0 .word 0x800067f0 + 80006804: 00000000 .word 0x00000000 + 80006808: 8001d4b4 .word 0x8001d4b4 + 8000680c: 00000000 .word 0x00000000 + 80006810: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x9410899be5fc0998 + 80006814: 0007bd83 ld x27,0(x15) + 80006818: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x1e563dad983543e4 + 8000681c: 0007bd83 ld x27,0(x15) + 80006820: 00878793 addi x15,x15,8 + +0000000080006824 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27: + sm4ed x27, x27, x27, 1 # perform operation + 80006824: 71bd8db3 sm4ed x27,x27,x27,0x1 + # Check if x27 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x27, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b27_str) + 80006828: 000fb383 ld x7,0(x31) + 8000682c: 01b38c63 beq x7,x27,80006844 + 80006830: 1a90446f jal x8,8000b1d8 + 80006834: 80006824 .word 0x80006824 + 80006838: 00000000 .word 0x00000000 + 8000683c: 8001d4f2 .word 0x8001d4f2 + 80006840: 00000000 .word 0x00000000 + 80006844: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x2ef8588d3458259c + 80006848: 0007be03 ld x28,0(x15) + 8000684c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x03e69a4aada9dc27 + 80006850: 0007be03 ld x28,0(x15) + 80006854: 00878793 addi x15,x15,8 + +0000000080006858 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28: + sm4ed x28, x28, x28, 3 # perform operation + 80006858: f1ce0e33 sm4ed x28,x28,x28,0x3 + # Check if x28 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x28, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b28_str) + 8000685c: 000fb383 ld x7,0(x31) + 80006860: 01c38c63 beq x7,x28,80006878 + 80006864: 1750446f jal x8,8000b1d8 + 80006868: 80006858 .word 0x80006858 + 8000686c: 00000000 .word 0x00000000 + 80006870: 8001d530 .word 0x8001d530 + 80006874: 00000000 .word 0x00000000 + 80006878: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x6f149c5b88c3d328 + 8000687c: 0007be83 ld x29,0(x15) + 80006880: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xa6f8c30a9913ac80 + 80006884: 0007be83 ld x29,0(x15) + 80006888: 00878793 addi x15,x15,8 + +000000008000688c : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29: + sm4ed x29, x29, x29, 0 # perform operation + 8000688c: 31de8eb3 sm4ed x29,x29,x29,0x0 + # Check if x29 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x29, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b29_str) + 80006890: 000fb383 ld x7,0(x31) + 80006894: 01d38c63 beq x7,x29,800068ac + 80006898: 1410446f jal x8,8000b1d8 + 8000689c: 8000688c .word 0x8000688c + 800068a0: 00000000 .word 0x00000000 + 800068a4: 8001d56e .word 0x8001d56e + 800068a8: 00000000 .word 0x00000000 + 800068ac: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x024239596d6be1ad + 800068b0: 0007bf03 ld x30,0(x15) + 800068b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x2a3c5793a9061eb6 + 800068b8: 0007bf03 ld x30,0(x15) + 800068bc: 00878793 addi x15,x15,8 + +00000000800068c0 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30: + sm4ed x30, x30, x30, 1 # perform operation + 800068c0: 71ef0f33 sm4ed x30,x30,x30,0x1 + # Check if x30 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x30, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b30_str) + 800068c4: 000fb383 ld x7,0(x31) + 800068c8: 01e38c63 beq x7,x30,800068e0 + 800068cc: 10d0446f jal x8,8000b1d8 + 800068d0: 800068c0 .word 0x800068c0 + 800068d4: 00000000 .word 0x00000000 + 800068d8: 8001d5ac .word 0x8001d5ac + 800068dc: 00000000 .word 0x00000000 + 800068e0: 008f8f93 addi x31,x31,8 + + mv x22, x31 # switch signature pointer register to avoid conflict with test + 800068e4: 000f8b13 addi x22,x31,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x8455aad62182f1e8 + 800068e8: 0007bf83 ld x31,0(x15) + 800068ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x053dcb8cfe4c2f70 + 800068f0: 0007bf83 ld x31,0(x15) + 800068f4: 00878793 addi x15,x15,8 + +00000000800068f8 : +Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31: + sm4ed x31, x31, x31, 2 # perform operation + 800068f8: b1ff8fb3 sm4ed x31,x31,x31,0x2 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31, Zksed_sm4ed_cg_cmp_rd_rs1_rs2_b31_str) + 800068fc: 000b3383 ld x7,0(x22) + 80006900: 01f38c63 beq x7,x31,80006918 + 80006904: 0d50446f jal x8,8000b1d8 + 80006908: 800068f8 .word 0x800068f8 + 8000690c: 00000000 .word 0x00000000 + 80006910: 8001d5ea .word 0x8001d5ea + 80006914: 00000000 .word 0x00000000 + 80006918: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x7b3ef6364c21516e + 8000691c: 0007b283 ld x5,0(x15) + 80006920: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xb4cc266387b731ac + 80006924: 0007ba83 ld x21,0(x15) + 80006928: 00878793 addi x15,x15,8 + +000000008000692c : +Zksed_sm4ed_cg_cp_bs_b0: + sm4ed x6, x5, x21, 0 # perform operation + 8000692c: 31528333 sm4ed x6,x5,x21,0x0 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_bs_b0, Zksed_sm4ed_cg_cp_bs_b0_str) + 80006930: 000b3383 ld x7,0(x22) + 80006934: 00638c63 beq x7,x6,8000694c + 80006938: 0a10446f jal x8,8000b1d8 + 8000693c: 8000692c .word 0x8000692c + 80006940: 00000000 .word 0x00000000 + 80006944: 8001d628 .word 0x8001d628 + 80006948: 00000000 .word 0x00000000 + 8000694c: 008b0b13 addi x22,x22,8 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x15, x0) # load rs1: x0 = 0x0d0a97ff02085c12 + 80006950: 0007b003 ld x0,0(x15) + 80006954: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x885c9f5ece79ae45 + 80006958: 0007ba83 ld x21,0(x15) + 8000695c: 00878793 addi x15,x15,8 + +0000000080006960 : +Zksed_sm4ed_cg_cp_bs_b1: + sm4ed x30, x0, x21, 1 # perform operation + 80006960: 71500f33 sm4ed x30,x0,x21,0x1 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_bs_b1, Zksed_sm4ed_cg_cp_bs_b1_str) + 80006964: 000b3383 ld x7,0(x22) + 80006968: 01e38c63 beq x7,x30,80006980 + 8000696c: 06d0446f jal x8,8000b1d8 + 80006970: 80006960 .word 0x80006960 + 80006974: 00000000 .word 0x00000000 + 80006978: 8001d65c .word 0x8001d65c + 8000697c: 00000000 .word 0x00000000 + 80006980: 008b0b13 addi x22,x22,8 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x4c261978e600b421 + 80006984: 0007be83 ld x29,0(x15) + 80006988: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x171f08fa1018e27b + 8000698c: 0007b883 ld x17,0(x15) + 80006990: 00878793 addi x15,x15,8 + +0000000080006994 : +Zksed_sm4ed_cg_cp_bs_b2: + sm4ed x11, x29, x17, 2 # perform operation + 80006994: b11e85b3 sm4ed x11,x29,x17,0x2 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_bs_b2, Zksed_sm4ed_cg_cp_bs_b2_str) + 80006998: 000b3383 ld x7,0(x22) + 8000699c: 00b38c63 beq x7,x11,800069b4 + 800069a0: 0390446f jal x8,8000b1d8 + 800069a4: 80006994 .word 0x80006994 + 800069a8: 00000000 .word 0x00000000 + 800069ac: 8001d690 .word 0x8001d690 + 800069b0: 00000000 .word 0x00000000 + 800069b4: 008b0b13 addi x22,x22,8 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x3e2bd21d70f5aa18 + 800069b8: 0007be83 ld x29,0(x15) + 800069bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x6d4af4420b9b9d55 + 800069c0: 0007b703 ld x14,0(x15) + 800069c4: 00878793 addi x15,x15,8 + +00000000800069c8 : +Zksed_sm4ed_cg_cp_bs_b3: + sm4ed x0, x29, x14, 3 # perform operation + 800069c8: f0ee8033 sm4ed x0,x29,x14,0x3 + # Check if x0 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x0, Zksed_sm4ed_cg_cp_bs_b3, Zksed_sm4ed_cg_cp_bs_b3_str) + 800069cc: 000b3383 ld x7,0(x22) + 800069d0: 00038c63 beq x7,x0,800069e8 + 800069d4: 0050446f jal x8,8000b1d8 + 800069d8: 800069c8 .word 0x800069c8 + 800069dc: 00000000 .word 0x00000000 + 800069e0: 8001d6c4 .word 0x8001d6c4 + 800069e4: 00000000 .word 0x00000000 + 800069e8: 008b0b13 addi x22,x22,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x0000000000000000 + 800069ec: 0007b583 ld x11,0(x15) + 800069f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x0000000000000000 + 800069f4: 0007be03 ld x28,0(x15) + 800069f8: 00878793 addi x15,x15,8 + +00000000800069fc : +Zksed_sm4ed_cg_cp_sbox_b0: + sm4ed x30, x11, x28, 3 # perform operation + 800069fc: f1c58f33 sm4ed x30,x11,x28,0x3 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b0, Zksed_sm4ed_cg_cp_sbox_b0_str) + 80006a00: 000b3383 ld x7,0(x22) + 80006a04: 01e38c63 beq x7,x30,80006a1c + 80006a08: 7d00446f jal x8,8000b1d8 + 80006a0c: 800069fc .word 0x800069fc + 80006a10: 00000000 .word 0x00000000 + 80006a14: 8001d6f8 .word 0x8001d6f8 + 80006a18: 00000000 .word 0x00000000 + 80006a1c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x0101010101010101 + 80006a20: 0007bd83 ld x27,0(x15) + 80006a24: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x0101010101010101 + 80006a28: 0007be03 ld x28,0(x15) + 80006a2c: 00878793 addi x15,x15,8 + +0000000080006a30 : +Zksed_sm4ed_cg_cp_sbox_b1: + sm4ed x6, x27, x28, 2 # perform operation + 80006a30: b1cd8333 sm4ed x6,x27,x28,0x2 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b1, Zksed_sm4ed_cg_cp_sbox_b1_str) + 80006a34: 000b3383 ld x7,0(x22) + 80006a38: 00638c63 beq x7,x6,80006a50 + 80006a3c: 79c0446f jal x8,8000b1d8 + 80006a40: 80006a30 .word 0x80006a30 + 80006a44: 00000000 .word 0x00000000 + 80006a48: 8001d72e .word 0x8001d72e + 80006a4c: 00000000 .word 0x00000000 + 80006a50: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x0202020202020202 + 80006a54: 0007ba83 ld x21,0(x15) + 80006a58: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x0202020202020202 + 80006a5c: 0007b103 ld x2,0(x15) + 80006a60: 00878793 addi x15,x15,8 + +0000000080006a64 : +Zksed_sm4ed_cg_cp_sbox_b2: + sm4ed x28, x21, x2, 1 # perform operation + 80006a64: 702a8e33 sm4ed x28,x21,x2,0x1 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b2, Zksed_sm4ed_cg_cp_sbox_b2_str) + 80006a68: 000b3383 ld x7,0(x22) + 80006a6c: 01c38c63 beq x7,x28,80006a84 + 80006a70: 7680446f jal x8,8000b1d8 + 80006a74: 80006a64 .word 0x80006a64 + 80006a78: 00000000 .word 0x00000000 + 80006a7c: 8001d764 .word 0x8001d764 + 80006a80: 00000000 .word 0x00000000 + 80006a84: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0303030303030303 + 80006a88: 0007b983 ld x19,0(x15) + 80006a8c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x0303030303030303 + 80006a90: 0007b083 ld x1,0(x15) + 80006a94: 00878793 addi x15,x15,8 + +0000000080006a98 : +Zksed_sm4ed_cg_cp_sbox_b3: + sm4ed x16, x19, x1, 3 # perform operation + 80006a98: f0198833 sm4ed x16,x19,x1,0x3 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b3, Zksed_sm4ed_cg_cp_sbox_b3_str) + 80006a9c: 000b3383 ld x7,0(x22) + 80006aa0: 01038c63 beq x7,x16,80006ab8 + 80006aa4: 7340446f jal x8,8000b1d8 + 80006aa8: 80006a98 .word 0x80006a98 + 80006aac: 00000000 .word 0x00000000 + 80006ab0: 8001d79a .word 0x8001d79a + 80006ab4: 00000000 .word 0x00000000 + 80006ab8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x0404040404040404 + 80006abc: 0007b883 ld x17,0(x15) + 80006ac0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0404040404040404 + 80006ac4: 0007b283 ld x5,0(x15) + 80006ac8: 00878793 addi x15,x15,8 + +0000000080006acc : +Zksed_sm4ed_cg_cp_sbox_b4: + sm4ed x18, x17, x5, 3 # perform operation + 80006acc: f0588933 sm4ed x18,x17,x5,0x3 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b4, Zksed_sm4ed_cg_cp_sbox_b4_str) + 80006ad0: 000b3383 ld x7,0(x22) + 80006ad4: 01238c63 beq x7,x18,80006aec + 80006ad8: 7000446f jal x8,8000b1d8 + 80006adc: 80006acc .word 0x80006acc + 80006ae0: 00000000 .word 0x00000000 + 80006ae4: 8001d7d0 .word 0x8001d7d0 + 80006ae8: 00000000 .word 0x00000000 + 80006aec: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x0505050505050505 + 80006af0: 0007bf83 ld x31,0(x15) + 80006af4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x0505050505050505 + 80006af8: 0007b683 ld x13,0(x15) + 80006afc: 00878793 addi x15,x15,8 + +0000000080006b00 : +Zksed_sm4ed_cg_cp_sbox_b5: + sm4ed x30, x31, x13, 3 # perform operation + 80006b00: f0df8f33 sm4ed x30,x31,x13,0x3 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b5, Zksed_sm4ed_cg_cp_sbox_b5_str) + 80006b04: 000b3383 ld x7,0(x22) + 80006b08: 01e38c63 beq x7,x30,80006b20 + 80006b0c: 6cc0446f jal x8,8000b1d8 + 80006b10: 80006b00 .word 0x80006b00 + 80006b14: 00000000 .word 0x00000000 + 80006b18: 8001d806 .word 0x8001d806 + 80006b1c: 00000000 .word 0x00000000 + 80006b20: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x0606060606060606 + 80006b24: 0007b803 ld x16,0(x15) + 80006b28: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x0606060606060606 + 80006b2c: 0007be03 ld x28,0(x15) + 80006b30: 00878793 addi x15,x15,8 + +0000000080006b34 : +Zksed_sm4ed_cg_cp_sbox_b6: + sm4ed x1, x16, x28, 0 # perform operation + 80006b34: 31c800b3 sm4ed x1,x16,x28,0x0 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b6, Zksed_sm4ed_cg_cp_sbox_b6_str) + 80006b38: 000b3383 ld x7,0(x22) + 80006b3c: 00138c63 beq x7,x1,80006b54 + 80006b40: 6980446f jal x8,8000b1d8 + 80006b44: 80006b34 .word 0x80006b34 + 80006b48: 00000000 .word 0x00000000 + 80006b4c: 8001d83c .word 0x8001d83c + 80006b50: 00000000 .word 0x00000000 + 80006b54: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0707070707070707 + 80006b58: 0007bb83 ld x23,0(x15) + 80006b5c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x0707070707070707 + 80006b60: 0007b203 ld x4,0(x15) + 80006b64: 00878793 addi x15,x15,8 + +0000000080006b68 : +Zksed_sm4ed_cg_cp_sbox_b7: + sm4ed x9, x23, x4, 3 # perform operation + 80006b68: f04b84b3 sm4ed x9,x23,x4,0x3 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b7, Zksed_sm4ed_cg_cp_sbox_b7_str) + 80006b6c: 000b3383 ld x7,0(x22) + 80006b70: 00938c63 beq x7,x9,80006b88 + 80006b74: 6640446f jal x8,8000b1d8 + 80006b78: 80006b68 .word 0x80006b68 + 80006b7c: 00000000 .word 0x00000000 + 80006b80: 8001d872 .word 0x8001d872 + 80006b84: 00000000 .word 0x00000000 + 80006b88: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x0808080808080808 + 80006b8c: 0007bc03 ld x24,0(x15) + 80006b90: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x0808080808080808 + 80006b94: 0007b203 ld x4,0(x15) + 80006b98: 00878793 addi x15,x15,8 + +0000000080006b9c : +Zksed_sm4ed_cg_cp_sbox_b8: + sm4ed x30, x24, x4, 2 # perform operation + 80006b9c: b04c0f33 sm4ed x30,x24,x4,0x2 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b8, Zksed_sm4ed_cg_cp_sbox_b8_str) + 80006ba0: 000b3383 ld x7,0(x22) + 80006ba4: 01e38c63 beq x7,x30,80006bbc + 80006ba8: 6300446f jal x8,8000b1d8 + 80006bac: 80006b9c .word 0x80006b9c + 80006bb0: 00000000 .word 0x00000000 + 80006bb4: 8001d8a8 .word 0x8001d8a8 + 80006bb8: 00000000 .word 0x00000000 + 80006bbc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x0909090909090909 + 80006bc0: 0007b683 ld x13,0(x15) + 80006bc4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x0909090909090909 + 80006bc8: 0007ba83 ld x21,0(x15) + 80006bcc: 00878793 addi x15,x15,8 + +0000000080006bd0 : +Zksed_sm4ed_cg_cp_sbox_b9: + sm4ed x29, x13, x21, 1 # perform operation + 80006bd0: 71568eb3 sm4ed x29,x13,x21,0x1 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b9, Zksed_sm4ed_cg_cp_sbox_b9_str) + 80006bd4: 000b3383 ld x7,0(x22) + 80006bd8: 01d38c63 beq x7,x29,80006bf0 + 80006bdc: 5fc0446f jal x8,8000b1d8 + 80006be0: 80006bd0 .word 0x80006bd0 + 80006be4: 00000000 .word 0x00000000 + 80006be8: 8001d8de .word 0x8001d8de + 80006bec: 00000000 .word 0x00000000 + 80006bf0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x0a0a0a0a0a0a0a0a + 80006bf4: 0007bb83 ld x23,0(x15) + 80006bf8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x0a0a0a0a0a0a0a0a + 80006bfc: 0007be83 ld x29,0(x15) + 80006c00: 00878793 addi x15,x15,8 + +0000000080006c04 : +Zksed_sm4ed_cg_cp_sbox_b10: + sm4ed x5, x23, x29, 2 # perform operation + 80006c04: b1db82b3 sm4ed x5,x23,x29,0x2 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b10, Zksed_sm4ed_cg_cp_sbox_b10_str) + 80006c08: 000b3383 ld x7,0(x22) + 80006c0c: 00538c63 beq x7,x5,80006c24 + 80006c10: 5c80446f jal x8,8000b1d8 + 80006c14: 80006c04 .word 0x80006c04 + 80006c18: 00000000 .word 0x00000000 + 80006c1c: 8001d914 .word 0x8001d914 + 80006c20: 00000000 .word 0x00000000 + 80006c24: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x0b0b0b0b0b0b0b0b + 80006c28: 0007b983 ld x19,0(x15) + 80006c2c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x0b0b0b0b0b0b0b0b + 80006c30: 0007b303 ld x6,0(x15) + 80006c34: 00878793 addi x15,x15,8 + +0000000080006c38 : +Zksed_sm4ed_cg_cp_sbox_b11: + sm4ed x2, x19, x6, 0 # perform operation + 80006c38: 30698133 sm4ed x2,x19,x6,0x0 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b11, Zksed_sm4ed_cg_cp_sbox_b11_str) + 80006c3c: 000b3383 ld x7,0(x22) + 80006c40: 00238c63 beq x7,x2,80006c58 + 80006c44: 5940446f jal x8,8000b1d8 + 80006c48: 80006c38 .word 0x80006c38 + 80006c4c: 00000000 .word 0x00000000 + 80006c50: 8001d94b .word 0x8001d94b + 80006c54: 00000000 .word 0x00000000 + 80006c58: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x0c0c0c0c0c0c0c0c + 80006c5c: 0007bd03 ld x26,0(x15) + 80006c60: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x0c0c0c0c0c0c0c0c + 80006c64: 0007b583 ld x11,0(x15) + 80006c68: 00878793 addi x15,x15,8 + +0000000080006c6c : +Zksed_sm4ed_cg_cp_sbox_b12: + sm4ed x9, x26, x11, 1 # perform operation + 80006c6c: 70bd04b3 sm4ed x9,x26,x11,0x1 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b12, Zksed_sm4ed_cg_cp_sbox_b12_str) + 80006c70: 000b3383 ld x7,0(x22) + 80006c74: 00938c63 beq x7,x9,80006c8c + 80006c78: 5600446f jal x8,8000b1d8 + 80006c7c: 80006c6c .word 0x80006c6c + 80006c80: 00000000 .word 0x00000000 + 80006c84: 8001d982 .word 0x8001d982 + 80006c88: 00000000 .word 0x00000000 + 80006c8c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x0d0d0d0d0d0d0d0d + 80006c90: 0007b503 ld x10,0(x15) + 80006c94: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x0d0d0d0d0d0d0d0d + 80006c98: 0007b803 ld x16,0(x15) + 80006c9c: 00878793 addi x15,x15,8 + +0000000080006ca0 : +Zksed_sm4ed_cg_cp_sbox_b13: + sm4ed x5, x10, x16, 3 # perform operation + 80006ca0: f10502b3 sm4ed x5,x10,x16,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b13, Zksed_sm4ed_cg_cp_sbox_b13_str) + 80006ca4: 000b3383 ld x7,0(x22) + 80006ca8: 00538c63 beq x7,x5,80006cc0 + 80006cac: 52c0446f jal x8,8000b1d8 + 80006cb0: 80006ca0 .word 0x80006ca0 + 80006cb4: 00000000 .word 0x00000000 + 80006cb8: 8001d9b9 .word 0x8001d9b9 + 80006cbc: 00000000 .word 0x00000000 + 80006cc0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x0e0e0e0e0e0e0e0e + 80006cc4: 0007b903 ld x18,0(x15) + 80006cc8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x0e0e0e0e0e0e0e0e + 80006ccc: 0007b283 ld x5,0(x15) + 80006cd0: 00878793 addi x15,x15,8 + +0000000080006cd4 : +Zksed_sm4ed_cg_cp_sbox_b14: + sm4ed x19, x18, x5, 0 # perform operation + 80006cd4: 305909b3 sm4ed x19,x18,x5,0x0 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b14, Zksed_sm4ed_cg_cp_sbox_b14_str) + 80006cd8: 000b3383 ld x7,0(x22) + 80006cdc: 01338c63 beq x7,x19,80006cf4 + 80006ce0: 4f80446f jal x8,8000b1d8 + 80006ce4: 80006cd4 .word 0x80006cd4 + 80006ce8: 00000000 .word 0x00000000 + 80006cec: 8001d9f0 .word 0x8001d9f0 + 80006cf0: 00000000 .word 0x00000000 + 80006cf4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x0f0f0f0f0f0f0f0f + 80006cf8: 0007b283 ld x5,0(x15) + 80006cfc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x0f0f0f0f0f0f0f0f + 80006d00: 0007b983 ld x19,0(x15) + 80006d04: 00878793 addi x15,x15,8 + +0000000080006d08 : +Zksed_sm4ed_cg_cp_sbox_b15: + sm4ed x17, x5, x19, 3 # perform operation + 80006d08: f13288b3 sm4ed x17,x5,x19,0x3 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b15, Zksed_sm4ed_cg_cp_sbox_b15_str) + 80006d0c: 000b3383 ld x7,0(x22) + 80006d10: 01138c63 beq x7,x17,80006d28 + 80006d14: 4c40446f jal x8,8000b1d8 + 80006d18: 80006d08 .word 0x80006d08 + 80006d1c: 00000000 .word 0x00000000 + 80006d20: 8001da27 .word 0x8001da27 + 80006d24: 00000000 .word 0x00000000 + 80006d28: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x1010101010101010 + 80006d2c: 0007b483 ld x9,0(x15) + 80006d30: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x1010101010101010 + 80006d34: 0007b883 ld x17,0(x15) + 80006d38: 00878793 addi x15,x15,8 + +0000000080006d3c : +Zksed_sm4ed_cg_cp_sbox_b16: + sm4ed x4, x9, x17, 0 # perform operation + 80006d3c: 31148233 sm4ed x4,x9,x17,0x0 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b16, Zksed_sm4ed_cg_cp_sbox_b16_str) + 80006d40: 000b3383 ld x7,0(x22) + 80006d44: 00438c63 beq x7,x4,80006d5c + 80006d48: 4900446f jal x8,8000b1d8 + 80006d4c: 80006d3c .word 0x80006d3c + 80006d50: 00000000 .word 0x00000000 + 80006d54: 8001da5e .word 0x8001da5e + 80006d58: 00000000 .word 0x00000000 + 80006d5c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x1111111111111111 + 80006d60: 0007ba03 ld x20,0(x15) + 80006d64: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x1111111111111111 + 80006d68: 0007b603 ld x12,0(x15) + 80006d6c: 00878793 addi x15,x15,8 + +0000000080006d70 : +Zksed_sm4ed_cg_cp_sbox_b17: + sm4ed x9, x20, x12, 3 # perform operation + 80006d70: f0ca04b3 sm4ed x9,x20,x12,0x3 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b17, Zksed_sm4ed_cg_cp_sbox_b17_str) + 80006d74: 000b3383 ld x7,0(x22) + 80006d78: 00938c63 beq x7,x9,80006d90 + 80006d7c: 45c0446f jal x8,8000b1d8 + 80006d80: 80006d70 .word 0x80006d70 + 80006d84: 00000000 .word 0x00000000 + 80006d88: 8001da95 .word 0x8001da95 + 80006d8c: 00000000 .word 0x00000000 + 80006d90: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x1212121212121212 + 80006d94: 0007ba03 ld x20,0(x15) + 80006d98: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x1212121212121212 + 80006d9c: 0007bd03 ld x26,0(x15) + 80006da0: 00878793 addi x15,x15,8 + +0000000080006da4 : +Zksed_sm4ed_cg_cp_sbox_b18: + sm4ed x16, x20, x26, 3 # perform operation + 80006da4: f1aa0833 sm4ed x16,x20,x26,0x3 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b18, Zksed_sm4ed_cg_cp_sbox_b18_str) + 80006da8: 000b3383 ld x7,0(x22) + 80006dac: 01038c63 beq x7,x16,80006dc4 + 80006db0: 4280446f jal x8,8000b1d8 + 80006db4: 80006da4 .word 0x80006da4 + 80006db8: 00000000 .word 0x00000000 + 80006dbc: 8001dacc .word 0x8001dacc + 80006dc0: 00000000 .word 0x00000000 + 80006dc4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x1313131313131313 + 80006dc8: 0007b083 ld x1,0(x15) + 80006dcc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x1313131313131313 + 80006dd0: 0007bd03 ld x26,0(x15) + 80006dd4: 00878793 addi x15,x15,8 + +0000000080006dd8 : +Zksed_sm4ed_cg_cp_sbox_b19: + sm4ed x14, x1, x26, 0 # perform operation + 80006dd8: 31a08733 sm4ed x14,x1,x26,0x0 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b19, Zksed_sm4ed_cg_cp_sbox_b19_str) + 80006ddc: 000b3383 ld x7,0(x22) + 80006de0: 00e38c63 beq x7,x14,80006df8 + 80006de4: 3f40446f jal x8,8000b1d8 + 80006de8: 80006dd8 .word 0x80006dd8 + 80006dec: 00000000 .word 0x00000000 + 80006df0: 8001db03 .word 0x8001db03 + 80006df4: 00000000 .word 0x00000000 + 80006df8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x1414141414141414 + 80006dfc: 0007b803 ld x16,0(x15) + 80006e00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x1414141414141414 + 80006e04: 0007b903 ld x18,0(x15) + 80006e08: 00878793 addi x15,x15,8 + +0000000080006e0c : +Zksed_sm4ed_cg_cp_sbox_b20: + sm4ed x29, x16, x18, 3 # perform operation + 80006e0c: f1280eb3 sm4ed x29,x16,x18,0x3 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b20, Zksed_sm4ed_cg_cp_sbox_b20_str) + 80006e10: 000b3383 ld x7,0(x22) + 80006e14: 01d38c63 beq x7,x29,80006e2c + 80006e18: 3c00446f jal x8,8000b1d8 + 80006e1c: 80006e0c .word 0x80006e0c + 80006e20: 00000000 .word 0x00000000 + 80006e24: 8001db3a .word 0x8001db3a + 80006e28: 00000000 .word 0x00000000 + 80006e2c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x1515151515151515 + 80006e30: 0007ba83 ld x21,0(x15) + 80006e34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x1515151515151515 + 80006e38: 0007bd03 ld x26,0(x15) + 80006e3c: 00878793 addi x15,x15,8 + +0000000080006e40 : +Zksed_sm4ed_cg_cp_sbox_b21: + sm4ed x1, x21, x26, 3 # perform operation + 80006e40: f1aa80b3 sm4ed x1,x21,x26,0x3 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b21, Zksed_sm4ed_cg_cp_sbox_b21_str) + 80006e44: 000b3383 ld x7,0(x22) + 80006e48: 00138c63 beq x7,x1,80006e60 + 80006e4c: 38c0446f jal x8,8000b1d8 + 80006e50: 80006e40 .word 0x80006e40 + 80006e54: 00000000 .word 0x00000000 + 80006e58: 8001db71 .word 0x8001db71 + 80006e5c: 00000000 .word 0x00000000 + 80006e60: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x1616161616161616 + 80006e64: 0007bf03 ld x30,0(x15) + 80006e68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x1616161616161616 + 80006e6c: 0007bd83 ld x27,0(x15) + 80006e70: 00878793 addi x15,x15,8 + +0000000080006e74 : +Zksed_sm4ed_cg_cp_sbox_b22: + sm4ed x3, x30, x27, 2 # perform operation + 80006e74: b1bf01b3 sm4ed x3,x30,x27,0x2 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b22, Zksed_sm4ed_cg_cp_sbox_b22_str) + 80006e78: 000b3383 ld x7,0(x22) + 80006e7c: 00338c63 beq x7,x3,80006e94 + 80006e80: 3580446f jal x8,8000b1d8 + 80006e84: 80006e74 .word 0x80006e74 + 80006e88: 00000000 .word 0x00000000 + 80006e8c: 8001dba8 .word 0x8001dba8 + 80006e90: 00000000 .word 0x00000000 + 80006e94: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x1717171717171717 + 80006e98: 0007b483 ld x9,0(x15) + 80006e9c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x1717171717171717 + 80006ea0: 0007bd83 ld x27,0(x15) + 80006ea4: 00878793 addi x15,x15,8 + +0000000080006ea8 : +Zksed_sm4ed_cg_cp_sbox_b23: + sm4ed x21, x9, x27, 3 # perform operation + 80006ea8: f1b48ab3 sm4ed x21,x9,x27,0x3 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b23, Zksed_sm4ed_cg_cp_sbox_b23_str) + 80006eac: 000b3383 ld x7,0(x22) + 80006eb0: 01538c63 beq x7,x21,80006ec8 + 80006eb4: 3240446f jal x8,8000b1d8 + 80006eb8: 80006ea8 .word 0x80006ea8 + 80006ebc: 00000000 .word 0x00000000 + 80006ec0: 8001dbdf .word 0x8001dbdf + 80006ec4: 00000000 .word 0x00000000 + 80006ec8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x1818181818181818 + 80006ecc: 0007b503 ld x10,0(x15) + 80006ed0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x1818181818181818 + 80006ed4: 0007bf03 ld x30,0(x15) + 80006ed8: 00878793 addi x15,x15,8 + +0000000080006edc : +Zksed_sm4ed_cg_cp_sbox_b24: + sm4ed x31, x10, x30, 0 # perform operation + 80006edc: 31e50fb3 sm4ed x31,x10,x30,0x0 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b24, Zksed_sm4ed_cg_cp_sbox_b24_str) + 80006ee0: 000b3383 ld x7,0(x22) + 80006ee4: 01f38c63 beq x7,x31,80006efc + 80006ee8: 2f00446f jal x8,8000b1d8 + 80006eec: 80006edc .word 0x80006edc + 80006ef0: 00000000 .word 0x00000000 + 80006ef4: 8001dc16 .word 0x8001dc16 + 80006ef8: 00000000 .word 0x00000000 + 80006efc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x1919191919191919 + 80006f00: 0007b283 ld x5,0(x15) + 80006f04: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x1919191919191919 + 80006f08: 0007ba03 ld x20,0(x15) + 80006f0c: 00878793 addi x15,x15,8 + +0000000080006f10 : +Zksed_sm4ed_cg_cp_sbox_b25: + sm4ed x10, x5, x20, 1 # perform operation + 80006f10: 71428533 sm4ed x10,x5,x20,0x1 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b25, Zksed_sm4ed_cg_cp_sbox_b25_str) + 80006f14: 000b3383 ld x7,0(x22) + 80006f18: 00a38c63 beq x7,x10,80006f30 + 80006f1c: 2bc0446f jal x8,8000b1d8 + 80006f20: 80006f10 .word 0x80006f10 + 80006f24: 00000000 .word 0x00000000 + 80006f28: 8001dc4d .word 0x8001dc4d + 80006f2c: 00000000 .word 0x00000000 + 80006f30: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x1a1a1a1a1a1a1a1a + 80006f34: 0007b283 ld x5,0(x15) + 80006f38: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x1a1a1a1a1a1a1a1a + 80006f3c: 0007ba83 ld x21,0(x15) + 80006f40: 00878793 addi x15,x15,8 + +0000000080006f44 : +Zksed_sm4ed_cg_cp_sbox_b26: + sm4ed x31, x5, x21, 3 # perform operation + 80006f44: f1528fb3 sm4ed x31,x5,x21,0x3 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b26, Zksed_sm4ed_cg_cp_sbox_b26_str) + 80006f48: 000b3383 ld x7,0(x22) + 80006f4c: 01f38c63 beq x7,x31,80006f64 + 80006f50: 2880446f jal x8,8000b1d8 + 80006f54: 80006f44 .word 0x80006f44 + 80006f58: 00000000 .word 0x00000000 + 80006f5c: 8001dc84 .word 0x8001dc84 + 80006f60: 00000000 .word 0x00000000 + 80006f64: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x1b1b1b1b1b1b1b1b + 80006f68: 0007b683 ld x13,0(x15) + 80006f6c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x1b1b1b1b1b1b1b1b + 80006f70: 0007bb83 ld x23,0(x15) + 80006f74: 00878793 addi x15,x15,8 + +0000000080006f78 : +Zksed_sm4ed_cg_cp_sbox_b27: + sm4ed x17, x13, x23, 2 # perform operation + 80006f78: b17688b3 sm4ed x17,x13,x23,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b27, Zksed_sm4ed_cg_cp_sbox_b27_str) + 80006f7c: 000b3383 ld x7,0(x22) + 80006f80: 01138c63 beq x7,x17,80006f98 + 80006f84: 2540446f jal x8,8000b1d8 + 80006f88: 80006f78 .word 0x80006f78 + 80006f8c: 00000000 .word 0x00000000 + 80006f90: 8001dcbb .word 0x8001dcbb + 80006f94: 00000000 .word 0x00000000 + 80006f98: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x1c1c1c1c1c1c1c1c + 80006f9c: 0007b503 ld x10,0(x15) + 80006fa0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x1c1c1c1c1c1c1c1c + 80006fa4: 0007ba83 ld x21,0(x15) + 80006fa8: 00878793 addi x15,x15,8 + +0000000080006fac : +Zksed_sm4ed_cg_cp_sbox_b28: + sm4ed x13, x10, x21, 3 # perform operation + 80006fac: f15506b3 sm4ed x13,x10,x21,0x3 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b28, Zksed_sm4ed_cg_cp_sbox_b28_str) + 80006fb0: 000b3383 ld x7,0(x22) + 80006fb4: 00d38c63 beq x7,x13,80006fcc + 80006fb8: 2200446f jal x8,8000b1d8 + 80006fbc: 80006fac .word 0x80006fac + 80006fc0: 00000000 .word 0x00000000 + 80006fc4: 8001dcf2 .word 0x8001dcf2 + 80006fc8: 00000000 .word 0x00000000 + 80006fcc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x1d1d1d1d1d1d1d1d + 80006fd0: 0007bb83 ld x23,0(x15) + 80006fd4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x1d1d1d1d1d1d1d1d + 80006fd8: 0007b903 ld x18,0(x15) + 80006fdc: 00878793 addi x15,x15,8 + +0000000080006fe0 : +Zksed_sm4ed_cg_cp_sbox_b29: + sm4ed x26, x23, x18, 0 # perform operation + 80006fe0: 312b8d33 sm4ed x26,x23,x18,0x0 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zksed_sm4ed_cg_cp_sbox_b29, Zksed_sm4ed_cg_cp_sbox_b29_str) + 80006fe4: 000b3383 ld x7,0(x22) + 80006fe8: 01a38c63 beq x7,x26,80007000 + 80006fec: 1ec0446f jal x8,8000b1d8 + 80006ff0: 80006fe0 .word 0x80006fe0 + 80006ff4: 00000000 .word 0x00000000 + 80006ff8: 8001dd29 .word 0x8001dd29 + 80006ffc: 00000000 .word 0x00000000 + 80007000: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x1e1e1e1e1e1e1e1e + 80007004: 0007be83 ld x29,0(x15) + 80007008: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x1e1e1e1e1e1e1e1e + 8000700c: 0007bc03 ld x24,0(x15) + 80007010: 00878793 addi x15,x15,8 + +0000000080007014 : +Zksed_sm4ed_cg_cp_sbox_b30: + sm4ed x26, x29, x24, 2 # perform operation + 80007014: b18e8d33 sm4ed x26,x29,x24,0x2 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zksed_sm4ed_cg_cp_sbox_b30, Zksed_sm4ed_cg_cp_sbox_b30_str) + 80007018: 000b3383 ld x7,0(x22) + 8000701c: 01a38c63 beq x7,x26,80007034 + 80007020: 1b80446f jal x8,8000b1d8 + 80007024: 80007014 .word 0x80007014 + 80007028: 00000000 .word 0x00000000 + 8000702c: 8001dd60 .word 0x8001dd60 + 80007030: 00000000 .word 0x00000000 + 80007034: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x1f1f1f1f1f1f1f1f + 80007038: 0007b603 ld x12,0(x15) + 8000703c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x1f1f1f1f1f1f1f1f + 80007040: 0007b803 ld x16,0(x15) + 80007044: 00878793 addi x15,x15,8 + +0000000080007048 : +Zksed_sm4ed_cg_cp_sbox_b31: + sm4ed x2, x12, x16, 2 # perform operation + 80007048: b1060133 sm4ed x2,x12,x16,0x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b31, Zksed_sm4ed_cg_cp_sbox_b31_str) + 8000704c: 000b3383 ld x7,0(x22) + 80007050: 00238c63 beq x7,x2,80007068 + 80007054: 1840446f jal x8,8000b1d8 + 80007058: 80007048 .word 0x80007048 + 8000705c: 00000000 .word 0x00000000 + 80007060: 8001dd97 .word 0x8001dd97 + 80007064: 00000000 .word 0x00000000 + 80007068: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x2020202020202020 + 8000706c: 0007b283 ld x5,0(x15) + 80007070: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x2020202020202020 + 80007074: 0007bb83 ld x23,0(x15) + 80007078: 00878793 addi x15,x15,8 + +000000008000707c : +Zksed_sm4ed_cg_cp_sbox_b32: + sm4ed x20, x5, x23, 0 # perform operation + 8000707c: 31728a33 sm4ed x20,x5,x23,0x0 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b32, Zksed_sm4ed_cg_cp_sbox_b32_str) + 80007080: 000b3383 ld x7,0(x22) + 80007084: 01438c63 beq x7,x20,8000709c + 80007088: 1500446f jal x8,8000b1d8 + 8000708c: 8000707c .word 0x8000707c + 80007090: 00000000 .word 0x00000000 + 80007094: 8001ddce .word 0x8001ddce + 80007098: 00000000 .word 0x00000000 + 8000709c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x2121212121212121 + 800070a0: 0007b083 ld x1,0(x15) + 800070a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x2121212121212121 + 800070a8: 0007be83 ld x29,0(x15) + 800070ac: 00878793 addi x15,x15,8 + +00000000800070b0 : +Zksed_sm4ed_cg_cp_sbox_b33: + sm4ed x5, x1, x29, 3 # perform operation + 800070b0: f1d082b3 sm4ed x5,x1,x29,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b33, Zksed_sm4ed_cg_cp_sbox_b33_str) + 800070b4: 000b3383 ld x7,0(x22) + 800070b8: 00538c63 beq x7,x5,800070d0 + 800070bc: 11c0446f jal x8,8000b1d8 + 800070c0: 800070b0 .word 0x800070b0 + 800070c4: 00000000 .word 0x00000000 + 800070c8: 8001de05 .word 0x8001de05 + 800070cc: 00000000 .word 0x00000000 + 800070d0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x2222222222222222 + 800070d4: 0007be03 ld x28,0(x15) + 800070d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x2222222222222222 + 800070dc: 0007b603 ld x12,0(x15) + 800070e0: 00878793 addi x15,x15,8 + +00000000800070e4 : +Zksed_sm4ed_cg_cp_sbox_b34: + sm4ed x11, x28, x12, 2 # perform operation + 800070e4: b0ce05b3 sm4ed x11,x28,x12,0x2 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b34, Zksed_sm4ed_cg_cp_sbox_b34_str) + 800070e8: 000b3383 ld x7,0(x22) + 800070ec: 00b38c63 beq x7,x11,80007104 + 800070f0: 0e80446f jal x8,8000b1d8 + 800070f4: 800070e4 .word 0x800070e4 + 800070f8: 00000000 .word 0x00000000 + 800070fc: 8001de3c .word 0x8001de3c + 80007100: 00000000 .word 0x00000000 + 80007104: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x2323232323232323 + 80007108: 0007bb83 ld x23,0(x15) + 8000710c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x2323232323232323 + 80007110: 0007ba03 ld x20,0(x15) + 80007114: 00878793 addi x15,x15,8 + +0000000080007118 : +Zksed_sm4ed_cg_cp_sbox_b35: + sm4ed x29, x23, x20, 2 # perform operation + 80007118: b14b8eb3 sm4ed x29,x23,x20,0x2 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b35, Zksed_sm4ed_cg_cp_sbox_b35_str) + 8000711c: 000b3383 ld x7,0(x22) + 80007120: 01d38c63 beq x7,x29,80007138 + 80007124: 0b40446f jal x8,8000b1d8 + 80007128: 80007118 .word 0x80007118 + 8000712c: 00000000 .word 0x00000000 + 80007130: 8001de73 .word 0x8001de73 + 80007134: 00000000 .word 0x00000000 + 80007138: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x2424242424242424 + 8000713c: 0007bd03 ld x26,0(x15) + 80007140: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x2424242424242424 + 80007144: 0007b083 ld x1,0(x15) + 80007148: 00878793 addi x15,x15,8 + +000000008000714c : +Zksed_sm4ed_cg_cp_sbox_b36: + sm4ed x23, x26, x1, 2 # perform operation + 8000714c: b01d0bb3 sm4ed x23,x26,x1,0x2 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zksed_sm4ed_cg_cp_sbox_b36, Zksed_sm4ed_cg_cp_sbox_b36_str) + 80007150: 000b3383 ld x7,0(x22) + 80007154: 01738c63 beq x7,x23,8000716c + 80007158: 0800446f jal x8,8000b1d8 + 8000715c: 8000714c .word 0x8000714c + 80007160: 00000000 .word 0x00000000 + 80007164: 8001deaa .word 0x8001deaa + 80007168: 00000000 .word 0x00000000 + 8000716c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x2525252525252525 + 80007170: 0007bd03 ld x26,0(x15) + 80007174: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0x2525252525252525 + 80007178: 0007b083 ld x1,0(x15) + 8000717c: 00878793 addi x15,x15,8 + +0000000080007180 : +Zksed_sm4ed_cg_cp_sbox_b37: + sm4ed x13, x26, x1, 2 # perform operation + 80007180: b01d06b3 sm4ed x13,x26,x1,0x2 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b37, Zksed_sm4ed_cg_cp_sbox_b37_str) + 80007184: 000b3383 ld x7,0(x22) + 80007188: 00d38c63 beq x7,x13,800071a0 + 8000718c: 04c0446f jal x8,8000b1d8 + 80007190: 80007180 .word 0x80007180 + 80007194: 00000000 .word 0x00000000 + 80007198: 8001dee1 .word 0x8001dee1 + 8000719c: 00000000 .word 0x00000000 + 800071a0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x2626262626262626 + 800071a4: 0007ba03 ld x20,0(x15) + 800071a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x2626262626262626 + 800071ac: 0007b303 ld x6,0(x15) + 800071b0: 00878793 addi x15,x15,8 + +00000000800071b4 : +Zksed_sm4ed_cg_cp_sbox_b38: + sm4ed x28, x20, x6, 1 # perform operation + 800071b4: 706a0e33 sm4ed x28,x20,x6,0x1 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b38, Zksed_sm4ed_cg_cp_sbox_b38_str) + 800071b8: 000b3383 ld x7,0(x22) + 800071bc: 01c38c63 beq x7,x28,800071d4 + 800071c0: 0180446f jal x8,8000b1d8 + 800071c4: 800071b4 .word 0x800071b4 + 800071c8: 00000000 .word 0x00000000 + 800071cc: 8001df18 .word 0x8001df18 + 800071d0: 00000000 .word 0x00000000 + 800071d4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x2727272727272727 + 800071d8: 0007bc03 ld x24,0(x15) + 800071dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x2727272727272727 + 800071e0: 0007bd83 ld x27,0(x15) + 800071e4: 00878793 addi x15,x15,8 + +00000000800071e8 : +Zksed_sm4ed_cg_cp_sbox_b39: + sm4ed x1, x24, x27, 1 # perform operation + 800071e8: 71bc00b3 sm4ed x1,x24,x27,0x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b39, Zksed_sm4ed_cg_cp_sbox_b39_str) + 800071ec: 000b3383 ld x7,0(x22) + 800071f0: 00138c63 beq x7,x1,80007208 + 800071f4: 7e50346f jal x8,8000b1d8 + 800071f8: 800071e8 .word 0x800071e8 + 800071fc: 00000000 .word 0x00000000 + 80007200: 8001df4f .word 0x8001df4f + 80007204: 00000000 .word 0x00000000 + 80007208: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x2828282828282828 + 8000720c: 0007b603 ld x12,0(x15) + 80007210: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x2828282828282828 + 80007214: 0007b183 ld x3,0(x15) + 80007218: 00878793 addi x15,x15,8 + +000000008000721c : +Zksed_sm4ed_cg_cp_sbox_b40: + sm4ed x21, x12, x3, 0 # perform operation + 8000721c: 30360ab3 sm4ed x21,x12,x3,0x0 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b40, Zksed_sm4ed_cg_cp_sbox_b40_str) + 80007220: 000b3383 ld x7,0(x22) + 80007224: 01538c63 beq x7,x21,8000723c + 80007228: 7b10346f jal x8,8000b1d8 + 8000722c: 8000721c .word 0x8000721c + 80007230: 00000000 .word 0x00000000 + 80007234: 8001df86 .word 0x8001df86 + 80007238: 00000000 .word 0x00000000 + 8000723c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x2929292929292929 + 80007240: 0007be03 ld x28,0(x15) + 80007244: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x2929292929292929 + 80007248: 0007b303 ld x6,0(x15) + 8000724c: 00878793 addi x15,x15,8 + +0000000080007250 : +Zksed_sm4ed_cg_cp_sbox_b41: + sm4ed x29, x28, x6, 3 # perform operation + 80007250: f06e0eb3 sm4ed x29,x28,x6,0x3 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b41, Zksed_sm4ed_cg_cp_sbox_b41_str) + 80007254: 000b3383 ld x7,0(x22) + 80007258: 01d38c63 beq x7,x29,80007270 + 8000725c: 77d0346f jal x8,8000b1d8 + 80007260: 80007250 .word 0x80007250 + 80007264: 00000000 .word 0x00000000 + 80007268: 8001dfbd .word 0x8001dfbd + 8000726c: 00000000 .word 0x00000000 + 80007270: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x2a2a2a2a2a2a2a2a + 80007274: 0007bf83 ld x31,0(x15) + 80007278: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x2a2a2a2a2a2a2a2a + 8000727c: 0007be83 ld x29,0(x15) + 80007280: 00878793 addi x15,x15,8 + +0000000080007284 : +Zksed_sm4ed_cg_cp_sbox_b42: + sm4ed x27, x31, x29, 1 # perform operation + 80007284: 71df8db3 sm4ed x27,x31,x29,0x1 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b42, Zksed_sm4ed_cg_cp_sbox_b42_str) + 80007288: 000b3383 ld x7,0(x22) + 8000728c: 01b38c63 beq x7,x27,800072a4 + 80007290: 7490346f jal x8,8000b1d8 + 80007294: 80007284 .word 0x80007284 + 80007298: 00000000 .word 0x00000000 + 8000729c: 8001dff4 .word 0x8001dff4 + 800072a0: 00000000 .word 0x00000000 + 800072a4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x2b2b2b2b2b2b2b2b + 800072a8: 0007b203 ld x4,0(x15) + 800072ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x2b2b2b2b2b2b2b2b + 800072b0: 0007bc83 ld x25,0(x15) + 800072b4: 00878793 addi x15,x15,8 + +00000000800072b8 : +Zksed_sm4ed_cg_cp_sbox_b43: + sm4ed x19, x4, x25, 1 # perform operation + 800072b8: 719209b3 sm4ed x19,x4,x25,0x1 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b43, Zksed_sm4ed_cg_cp_sbox_b43_str) + 800072bc: 000b3383 ld x7,0(x22) + 800072c0: 01338c63 beq x7,x19,800072d8 + 800072c4: 7150346f jal x8,8000b1d8 + 800072c8: 800072b8 .word 0x800072b8 + 800072cc: 00000000 .word 0x00000000 + 800072d0: 8001e02b .word 0x8001e02b + 800072d4: 00000000 .word 0x00000000 + 800072d8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x2c2c2c2c2c2c2c2c + 800072dc: 0007b883 ld x17,0(x15) + 800072e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x2c2c2c2c2c2c2c2c + 800072e4: 0007b203 ld x4,0(x15) + 800072e8: 00878793 addi x15,x15,8 + +00000000800072ec : +Zksed_sm4ed_cg_cp_sbox_b44: + sm4ed x26, x17, x4, 0 # perform operation + 800072ec: 30488d33 sm4ed x26,x17,x4,0x0 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zksed_sm4ed_cg_cp_sbox_b44, Zksed_sm4ed_cg_cp_sbox_b44_str) + 800072f0: 000b3383 ld x7,0(x22) + 800072f4: 01a38c63 beq x7,x26,8000730c + 800072f8: 6e10346f jal x8,8000b1d8 + 800072fc: 800072ec .word 0x800072ec + 80007300: 00000000 .word 0x00000000 + 80007304: 8001e062 .word 0x8001e062 + 80007308: 00000000 .word 0x00000000 + 8000730c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x2d2d2d2d2d2d2d2d + 80007310: 0007bb83 ld x23,0(x15) + 80007314: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x2d2d2d2d2d2d2d2d + 80007318: 0007be03 ld x28,0(x15) + 8000731c: 00878793 addi x15,x15,8 + +0000000080007320 : +Zksed_sm4ed_cg_cp_sbox_b45: + sm4ed x31, x23, x28, 2 # perform operation + 80007320: b1cb8fb3 sm4ed x31,x23,x28,0x2 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b45, Zksed_sm4ed_cg_cp_sbox_b45_str) + 80007324: 000b3383 ld x7,0(x22) + 80007328: 01f38c63 beq x7,x31,80007340 + 8000732c: 6ad0346f jal x8,8000b1d8 + 80007330: 80007320 .word 0x80007320 + 80007334: 00000000 .word 0x00000000 + 80007338: 8001e099 .word 0x8001e099 + 8000733c: 00000000 .word 0x00000000 + 80007340: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x2e2e2e2e2e2e2e2e + 80007344: 0007ba03 ld x20,0(x15) + 80007348: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x2e2e2e2e2e2e2e2e + 8000734c: 0007bc03 ld x24,0(x15) + 80007350: 00878793 addi x15,x15,8 + +0000000080007354 : +Zksed_sm4ed_cg_cp_sbox_b46: + sm4ed x4, x20, x24, 3 # perform operation + 80007354: f18a0233 sm4ed x4,x20,x24,0x3 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b46, Zksed_sm4ed_cg_cp_sbox_b46_str) + 80007358: 000b3383 ld x7,0(x22) + 8000735c: 00438c63 beq x7,x4,80007374 + 80007360: 6790346f jal x8,8000b1d8 + 80007364: 80007354 .word 0x80007354 + 80007368: 00000000 .word 0x00000000 + 8000736c: 8001e0d0 .word 0x8001e0d0 + 80007370: 00000000 .word 0x00000000 + 80007374: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x2f2f2f2f2f2f2f2f + 80007378: 0007bb83 ld x23,0(x15) + 8000737c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x2f2f2f2f2f2f2f2f + 80007380: 0007bc83 ld x25,0(x15) + 80007384: 00878793 addi x15,x15,8 + +0000000080007388 : +Zksed_sm4ed_cg_cp_sbox_b47: + sm4ed x13, x23, x25, 1 # perform operation + 80007388: 719b86b3 sm4ed x13,x23,x25,0x1 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b47, Zksed_sm4ed_cg_cp_sbox_b47_str) + 8000738c: 000b3383 ld x7,0(x22) + 80007390: 00d38c63 beq x7,x13,800073a8 + 80007394: 6450346f jal x8,8000b1d8 + 80007398: 80007388 .word 0x80007388 + 8000739c: 00000000 .word 0x00000000 + 800073a0: 8001e107 .word 0x8001e107 + 800073a4: 00000000 .word 0x00000000 + 800073a8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0x3030303030303030 + 800073ac: 0007b683 ld x13,0(x15) + 800073b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x3030303030303030 + 800073b4: 0007b103 ld x2,0(x15) + 800073b8: 00878793 addi x15,x15,8 + +00000000800073bc : +Zksed_sm4ed_cg_cp_sbox_b48: + sm4ed x6, x13, x2, 2 # perform operation + 800073bc: b0268333 sm4ed x6,x13,x2,0x2 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b48, Zksed_sm4ed_cg_cp_sbox_b48_str) + 800073c0: 000b3383 ld x7,0(x22) + 800073c4: 00638c63 beq x7,x6,800073dc + 800073c8: 6110346f jal x8,8000b1d8 + 800073cc: 800073bc .word 0x800073bc + 800073d0: 00000000 .word 0x00000000 + 800073d4: 8001e13e .word 0x8001e13e + 800073d8: 00000000 .word 0x00000000 + 800073dc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x3131313131313131 + 800073e0: 0007b583 ld x11,0(x15) + 800073e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x3131313131313131 + 800073e8: 0007b503 ld x10,0(x15) + 800073ec: 00878793 addi x15,x15,8 + +00000000800073f0 : +Zksed_sm4ed_cg_cp_sbox_b49: + sm4ed x13, x11, x10, 1 # perform operation + 800073f0: 70a586b3 sm4ed x13,x11,x10,0x1 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b49, Zksed_sm4ed_cg_cp_sbox_b49_str) + 800073f4: 000b3383 ld x7,0(x22) + 800073f8: 00d38c63 beq x7,x13,80007410 + 800073fc: 5dd0346f jal x8,8000b1d8 + 80007400: 800073f0 .word 0x800073f0 + 80007404: 00000000 .word 0x00000000 + 80007408: 8001e175 .word 0x8001e175 + 8000740c: 00000000 .word 0x00000000 + 80007410: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x3232323232323232 + 80007414: 0007bf03 ld x30,0(x15) + 80007418: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x3232323232323232 + 8000741c: 0007b603 ld x12,0(x15) + 80007420: 00878793 addi x15,x15,8 + +0000000080007424 : +Zksed_sm4ed_cg_cp_sbox_b50: + sm4ed x24, x30, x12, 2 # perform operation + 80007424: b0cf0c33 sm4ed x24,x30,x12,0x2 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b50, Zksed_sm4ed_cg_cp_sbox_b50_str) + 80007428: 000b3383 ld x7,0(x22) + 8000742c: 01838c63 beq x7,x24,80007444 + 80007430: 5a90346f jal x8,8000b1d8 + 80007434: 80007424 .word 0x80007424 + 80007438: 00000000 .word 0x00000000 + 8000743c: 8001e1ac .word 0x8001e1ac + 80007440: 00000000 .word 0x00000000 + 80007444: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x3333333333333333 + 80007448: 0007b603 ld x12,0(x15) + 8000744c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x3333333333333333 + 80007450: 0007b303 ld x6,0(x15) + 80007454: 00878793 addi x15,x15,8 + +0000000080007458 : +Zksed_sm4ed_cg_cp_sbox_b51: + sm4ed x31, x12, x6, 3 # perform operation + 80007458: f0660fb3 sm4ed x31,x12,x6,0x3 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b51, Zksed_sm4ed_cg_cp_sbox_b51_str) + 8000745c: 000b3383 ld x7,0(x22) + 80007460: 01f38c63 beq x7,x31,80007478 + 80007464: 5750346f jal x8,8000b1d8 + 80007468: 80007458 .word 0x80007458 + 8000746c: 00000000 .word 0x00000000 + 80007470: 8001e1e3 .word 0x8001e1e3 + 80007474: 00000000 .word 0x00000000 + 80007478: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x3434343434343434 + 8000747c: 0007bd83 ld x27,0(x15) + 80007480: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x3434343434343434 + 80007484: 0007bb83 ld x23,0(x15) + 80007488: 00878793 addi x15,x15,8 + +000000008000748c : +Zksed_sm4ed_cg_cp_sbox_b52: + sm4ed x13, x27, x23, 3 # perform operation + 8000748c: f17d86b3 sm4ed x13,x27,x23,0x3 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b52, Zksed_sm4ed_cg_cp_sbox_b52_str) + 80007490: 000b3383 ld x7,0(x22) + 80007494: 00d38c63 beq x7,x13,800074ac + 80007498: 5410346f jal x8,8000b1d8 + 8000749c: 8000748c .word 0x8000748c + 800074a0: 00000000 .word 0x00000000 + 800074a4: 8001e21a .word 0x8001e21a + 800074a8: 00000000 .word 0x00000000 + 800074ac: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x3535353535353535 + 800074b0: 0007be03 ld x28,0(x15) + 800074b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x3535353535353535 + 800074b8: 0007b903 ld x18,0(x15) + 800074bc: 00878793 addi x15,x15,8 + +00000000800074c0 : +Zksed_sm4ed_cg_cp_sbox_b53: + sm4ed x29, x28, x18, 2 # perform operation + 800074c0: b12e0eb3 sm4ed x29,x28,x18,0x2 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b53, Zksed_sm4ed_cg_cp_sbox_b53_str) + 800074c4: 000b3383 ld x7,0(x22) + 800074c8: 01d38c63 beq x7,x29,800074e0 + 800074cc: 50d0346f jal x8,8000b1d8 + 800074d0: 800074c0 .word 0x800074c0 + 800074d4: 00000000 .word 0x00000000 + 800074d8: 8001e251 .word 0x8001e251 + 800074dc: 00000000 .word 0x00000000 + 800074e0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x3636363636363636 + 800074e4: 0007bd83 ld x27,0(x15) + 800074e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x3636363636363636 + 800074ec: 0007b683 ld x13,0(x15) + 800074f0: 00878793 addi x15,x15,8 + +00000000800074f4 : +Zksed_sm4ed_cg_cp_sbox_b54: + sm4ed x19, x27, x13, 1 # perform operation + 800074f4: 70dd89b3 sm4ed x19,x27,x13,0x1 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b54, Zksed_sm4ed_cg_cp_sbox_b54_str) + 800074f8: 000b3383 ld x7,0(x22) + 800074fc: 01338c63 beq x7,x19,80007514 + 80007500: 4d90346f jal x8,8000b1d8 + 80007504: 800074f4 .word 0x800074f4 + 80007508: 00000000 .word 0x00000000 + 8000750c: 8001e288 .word 0x8001e288 + 80007510: 00000000 .word 0x00000000 + 80007514: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x3737373737373737 + 80007518: 0007b903 ld x18,0(x15) + 8000751c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x3737373737373737 + 80007520: 0007b483 ld x9,0(x15) + 80007524: 00878793 addi x15,x15,8 + +0000000080007528 : +Zksed_sm4ed_cg_cp_sbox_b55: + sm4ed x19, x18, x9, 0 # perform operation + 80007528: 309909b3 sm4ed x19,x18,x9,0x0 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b55, Zksed_sm4ed_cg_cp_sbox_b55_str) + 8000752c: 000b3383 ld x7,0(x22) + 80007530: 01338c63 beq x7,x19,80007548 + 80007534: 4a50346f jal x8,8000b1d8 + 80007538: 80007528 .word 0x80007528 + 8000753c: 00000000 .word 0x00000000 + 80007540: 8001e2bf .word 0x8001e2bf + 80007544: 00000000 .word 0x00000000 + 80007548: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x3838383838383838 + 8000754c: 0007b083 ld x1,0(x15) + 80007550: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x3838383838383838 + 80007554: 0007bf83 ld x31,0(x15) + 80007558: 00878793 addi x15,x15,8 + +000000008000755c : +Zksed_sm4ed_cg_cp_sbox_b56: + sm4ed x13, x1, x31, 1 # perform operation + 8000755c: 71f086b3 sm4ed x13,x1,x31,0x1 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b56, Zksed_sm4ed_cg_cp_sbox_b56_str) + 80007560: 000b3383 ld x7,0(x22) + 80007564: 00d38c63 beq x7,x13,8000757c + 80007568: 4710346f jal x8,8000b1d8 + 8000756c: 8000755c .word 0x8000755c + 80007570: 00000000 .word 0x00000000 + 80007574: 8001e2f6 .word 0x8001e2f6 + 80007578: 00000000 .word 0x00000000 + 8000757c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x3939393939393939 + 80007580: 0007b083 ld x1,0(x15) + 80007584: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x3939393939393939 + 80007588: 0007bd03 ld x26,0(x15) + 8000758c: 00878793 addi x15,x15,8 + +0000000080007590 : +Zksed_sm4ed_cg_cp_sbox_b57: + sm4ed x5, x1, x26, 2 # perform operation + 80007590: b1a082b3 sm4ed x5,x1,x26,0x2 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b57, Zksed_sm4ed_cg_cp_sbox_b57_str) + 80007594: 000b3383 ld x7,0(x22) + 80007598: 00538c63 beq x7,x5,800075b0 + 8000759c: 43d0346f jal x8,8000b1d8 + 800075a0: 80007590 .word 0x80007590 + 800075a4: 00000000 .word 0x00000000 + 800075a8: 8001e32d .word 0x8001e32d + 800075ac: 00000000 .word 0x00000000 + 800075b0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x3a3a3a3a3a3a3a3a + 800075b4: 0007b303 ld x6,0(x15) + 800075b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x3a3a3a3a3a3a3a3a + 800075bc: 0007b683 ld x13,0(x15) + 800075c0: 00878793 addi x15,x15,8 + +00000000800075c4 : +Zksed_sm4ed_cg_cp_sbox_b58: + sm4ed x29, x6, x13, 0 # perform operation + 800075c4: 30d30eb3 sm4ed x29,x6,x13,0x0 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b58, Zksed_sm4ed_cg_cp_sbox_b58_str) + 800075c8: 000b3383 ld x7,0(x22) + 800075cc: 01d38c63 beq x7,x29,800075e4 + 800075d0: 4090346f jal x8,8000b1d8 + 800075d4: 800075c4 .word 0x800075c4 + 800075d8: 00000000 .word 0x00000000 + 800075dc: 8001e364 .word 0x8001e364 + 800075e0: 00000000 .word 0x00000000 + 800075e4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x3b3b3b3b3b3b3b3b + 800075e8: 0007b803 ld x16,0(x15) + 800075ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x3b3b3b3b3b3b3b3b + 800075f0: 0007bf83 ld x31,0(x15) + 800075f4: 00878793 addi x15,x15,8 + +00000000800075f8 : +Zksed_sm4ed_cg_cp_sbox_b59: + sm4ed x13, x16, x31, 3 # perform operation + 800075f8: f1f806b3 sm4ed x13,x16,x31,0x3 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b59, Zksed_sm4ed_cg_cp_sbox_b59_str) + 800075fc: 000b3383 ld x7,0(x22) + 80007600: 00d38c63 beq x7,x13,80007618 + 80007604: 3d50346f jal x8,8000b1d8 + 80007608: 800075f8 .word 0x800075f8 + 8000760c: 00000000 .word 0x00000000 + 80007610: 8001e39b .word 0x8001e39b + 80007614: 00000000 .word 0x00000000 + 80007618: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x3c3c3c3c3c3c3c3c + 8000761c: 0007bc03 ld x24,0(x15) + 80007620: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x3c3c3c3c3c3c3c3c + 80007624: 0007b683 ld x13,0(x15) + 80007628: 00878793 addi x15,x15,8 + +000000008000762c : +Zksed_sm4ed_cg_cp_sbox_b60: + sm4ed x3, x24, x13, 1 # perform operation + 8000762c: 70dc01b3 sm4ed x3,x24,x13,0x1 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b60, Zksed_sm4ed_cg_cp_sbox_b60_str) + 80007630: 000b3383 ld x7,0(x22) + 80007634: 00338c63 beq x7,x3,8000764c + 80007638: 3a10346f jal x8,8000b1d8 + 8000763c: 8000762c .word 0x8000762c + 80007640: 00000000 .word 0x00000000 + 80007644: 8001e3d2 .word 0x8001e3d2 + 80007648: 00000000 .word 0x00000000 + 8000764c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x3d3d3d3d3d3d3d3d + 80007650: 0007b103 ld x2,0(x15) + 80007654: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x3d3d3d3d3d3d3d3d + 80007658: 0007b803 ld x16,0(x15) + 8000765c: 00878793 addi x15,x15,8 + +0000000080007660 : +Zksed_sm4ed_cg_cp_sbox_b61: + sm4ed x20, x2, x16, 3 # perform operation + 80007660: f1010a33 sm4ed x20,x2,x16,0x3 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b61, Zksed_sm4ed_cg_cp_sbox_b61_str) + 80007664: 000b3383 ld x7,0(x22) + 80007668: 01438c63 beq x7,x20,80007680 + 8000766c: 36d0346f jal x8,8000b1d8 + 80007670: 80007660 .word 0x80007660 + 80007674: 00000000 .word 0x00000000 + 80007678: 8001e409 .word 0x8001e409 + 8000767c: 00000000 .word 0x00000000 + 80007680: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x3e3e3e3e3e3e3e3e + 80007684: 0007b183 ld x3,0(x15) + 80007688: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x3e3e3e3e3e3e3e3e + 8000768c: 0007be83 ld x29,0(x15) + 80007690: 00878793 addi x15,x15,8 + +0000000080007694 : +Zksed_sm4ed_cg_cp_sbox_b62: + sm4ed x16, x3, x29, 3 # perform operation + 80007694: f1d18833 sm4ed x16,x3,x29,0x3 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b62, Zksed_sm4ed_cg_cp_sbox_b62_str) + 80007698: 000b3383 ld x7,0(x22) + 8000769c: 01038c63 beq x7,x16,800076b4 + 800076a0: 3390346f jal x8,8000b1d8 + 800076a4: 80007694 .word 0x80007694 + 800076a8: 00000000 .word 0x00000000 + 800076ac: 8001e440 .word 0x8001e440 + 800076b0: 00000000 .word 0x00000000 + 800076b4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x3f3f3f3f3f3f3f3f + 800076b8: 0007b703 ld x14,0(x15) + 800076bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x3f3f3f3f3f3f3f3f + 800076c0: 0007bf83 ld x31,0(x15) + 800076c4: 00878793 addi x15,x15,8 + +00000000800076c8 : +Zksed_sm4ed_cg_cp_sbox_b63: + sm4ed x26, x14, x31, 3 # perform operation + 800076c8: f1f70d33 sm4ed x26,x14,x31,0x3 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zksed_sm4ed_cg_cp_sbox_b63, Zksed_sm4ed_cg_cp_sbox_b63_str) + 800076cc: 000b3383 ld x7,0(x22) + 800076d0: 01a38c63 beq x7,x26,800076e8 + 800076d4: 3050346f jal x8,8000b1d8 + 800076d8: 800076c8 .word 0x800076c8 + 800076dc: 00000000 .word 0x00000000 + 800076e0: 8001e477 .word 0x8001e477 + 800076e4: 00000000 .word 0x00000000 + 800076e8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x4040404040404040 + 800076ec: 0007b883 ld x17,0(x15) + 800076f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x4040404040404040 + 800076f4: 0007bf83 ld x31,0(x15) + 800076f8: 00878793 addi x15,x15,8 + +00000000800076fc : +Zksed_sm4ed_cg_cp_sbox_b64: + sm4ed x14, x17, x31, 1 # perform operation + 800076fc: 71f88733 sm4ed x14,x17,x31,0x1 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b64, Zksed_sm4ed_cg_cp_sbox_b64_str) + 80007700: 000b3383 ld x7,0(x22) + 80007704: 00e38c63 beq x7,x14,8000771c + 80007708: 2d10346f jal x8,8000b1d8 + 8000770c: 800076fc .word 0x800076fc + 80007710: 00000000 .word 0x00000000 + 80007714: 8001e4ae .word 0x8001e4ae + 80007718: 00000000 .word 0x00000000 + 8000771c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x4141414141414141 + 80007720: 0007b483 ld x9,0(x15) + 80007724: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0x4141414141414141 + 80007728: 0007b103 ld x2,0(x15) + 8000772c: 00878793 addi x15,x15,8 + +0000000080007730 : +Zksed_sm4ed_cg_cp_sbox_b65: + sm4ed x14, x9, x2, 0 # perform operation + 80007730: 30248733 sm4ed x14,x9,x2,0x0 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b65, Zksed_sm4ed_cg_cp_sbox_b65_str) + 80007734: 000b3383 ld x7,0(x22) + 80007738: 00e38c63 beq x7,x14,80007750 + 8000773c: 29d0346f jal x8,8000b1d8 + 80007740: 80007730 .word 0x80007730 + 80007744: 00000000 .word 0x00000000 + 80007748: 8001e4e5 .word 0x8001e4e5 + 8000774c: 00000000 .word 0x00000000 + 80007750: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x4242424242424242 + 80007754: 0007bf03 ld x30,0(x15) + 80007758: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x4242424242424242 + 8000775c: 0007be83 ld x29,0(x15) + 80007760: 00878793 addi x15,x15,8 + +0000000080007764 : +Zksed_sm4ed_cg_cp_sbox_b66: + sm4ed x25, x30, x29, 3 # perform operation + 80007764: f1df0cb3 sm4ed x25,x30,x29,0x3 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b66, Zksed_sm4ed_cg_cp_sbox_b66_str) + 80007768: 000b3383 ld x7,0(x22) + 8000776c: 01938c63 beq x7,x25,80007784 + 80007770: 2690346f jal x8,8000b1d8 + 80007774: 80007764 .word 0x80007764 + 80007778: 00000000 .word 0x00000000 + 8000777c: 8001e51c .word 0x8001e51c + 80007780: 00000000 .word 0x00000000 + 80007784: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x4343434343434343 + 80007788: 0007bb83 ld x23,0(x15) + 8000778c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x4343434343434343 + 80007790: 0007ba83 ld x21,0(x15) + 80007794: 00878793 addi x15,x15,8 + +0000000080007798 : +Zksed_sm4ed_cg_cp_sbox_b67: + sm4ed x27, x23, x21, 0 # perform operation + 80007798: 315b8db3 sm4ed x27,x23,x21,0x0 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b67, Zksed_sm4ed_cg_cp_sbox_b67_str) + 8000779c: 000b3383 ld x7,0(x22) + 800077a0: 01b38c63 beq x7,x27,800077b8 + 800077a4: 2350346f jal x8,8000b1d8 + 800077a8: 80007798 .word 0x80007798 + 800077ac: 00000000 .word 0x00000000 + 800077b0: 8001e553 .word 0x8001e553 + 800077b4: 00000000 .word 0x00000000 + 800077b8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x4444444444444444 + 800077bc: 0007bd83 ld x27,0(x15) + 800077c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x4444444444444444 + 800077c4: 0007ba03 ld x20,0(x15) + 800077c8: 00878793 addi x15,x15,8 + +00000000800077cc : +Zksed_sm4ed_cg_cp_sbox_b68: + sm4ed x24, x27, x20, 0 # perform operation + 800077cc: 314d8c33 sm4ed x24,x27,x20,0x0 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b68, Zksed_sm4ed_cg_cp_sbox_b68_str) + 800077d0: 000b3383 ld x7,0(x22) + 800077d4: 01838c63 beq x7,x24,800077ec + 800077d8: 2010346f jal x8,8000b1d8 + 800077dc: 800077cc .word 0x800077cc + 800077e0: 00000000 .word 0x00000000 + 800077e4: 8001e58a .word 0x8001e58a + 800077e8: 00000000 .word 0x00000000 + 800077ec: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x4545454545454545 + 800077f0: 0007ba83 ld x21,0(x15) + 800077f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x4545454545454545 + 800077f8: 0007b983 ld x19,0(x15) + 800077fc: 00878793 addi x15,x15,8 + +0000000080007800 : +Zksed_sm4ed_cg_cp_sbox_b69: + sm4ed x16, x21, x19, 2 # perform operation + 80007800: b13a8833 sm4ed x16,x21,x19,0x2 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b69, Zksed_sm4ed_cg_cp_sbox_b69_str) + 80007804: 000b3383 ld x7,0(x22) + 80007808: 01038c63 beq x7,x16,80007820 + 8000780c: 1cd0346f jal x8,8000b1d8 + 80007810: 80007800 .word 0x80007800 + 80007814: 00000000 .word 0x00000000 + 80007818: 8001e5c1 .word 0x8001e5c1 + 8000781c: 00000000 .word 0x00000000 + 80007820: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x4646464646464646 + 80007824: 0007ba83 ld x21,0(x15) + 80007828: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x4646464646464646 + 8000782c: 0007bc03 ld x24,0(x15) + 80007830: 00878793 addi x15,x15,8 + +0000000080007834 : +Zksed_sm4ed_cg_cp_sbox_b70: + sm4ed x14, x21, x24, 1 # perform operation + 80007834: 718a8733 sm4ed x14,x21,x24,0x1 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b70, Zksed_sm4ed_cg_cp_sbox_b70_str) + 80007838: 000b3383 ld x7,0(x22) + 8000783c: 00e38c63 beq x7,x14,80007854 + 80007840: 1990346f jal x8,8000b1d8 + 80007844: 80007834 .word 0x80007834 + 80007848: 00000000 .word 0x00000000 + 8000784c: 8001e5f8 .word 0x8001e5f8 + 80007850: 00000000 .word 0x00000000 + 80007854: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x4747474747474747 + 80007858: 0007bd83 ld x27,0(x15) + 8000785c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x4747474747474747 + 80007860: 0007b903 ld x18,0(x15) + 80007864: 00878793 addi x15,x15,8 + +0000000080007868 : +Zksed_sm4ed_cg_cp_sbox_b71: + sm4ed x23, x27, x18, 1 # perform operation + 80007868: 712d8bb3 sm4ed x23,x27,x18,0x1 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zksed_sm4ed_cg_cp_sbox_b71, Zksed_sm4ed_cg_cp_sbox_b71_str) + 8000786c: 000b3383 ld x7,0(x22) + 80007870: 01738c63 beq x7,x23,80007888 + 80007874: 1650346f jal x8,8000b1d8 + 80007878: 80007868 .word 0x80007868 + 8000787c: 00000000 .word 0x00000000 + 80007880: 8001e62f .word 0x8001e62f + 80007884: 00000000 .word 0x00000000 + 80007888: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x4848484848484848 + 8000788c: 0007b303 ld x6,0(x15) + 80007890: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x4848484848484848 + 80007894: 0007b683 ld x13,0(x15) + 80007898: 00878793 addi x15,x15,8 + +000000008000789c : +Zksed_sm4ed_cg_cp_sbox_b72: + sm4ed x4, x6, x13, 2 # perform operation + 8000789c: b0d30233 sm4ed x4,x6,x13,0x2 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b72, Zksed_sm4ed_cg_cp_sbox_b72_str) + 800078a0: 000b3383 ld x7,0(x22) + 800078a4: 00438c63 beq x7,x4,800078bc + 800078a8: 1310346f jal x8,8000b1d8 + 800078ac: 8000789c .word 0x8000789c + 800078b0: 00000000 .word 0x00000000 + 800078b4: 8001e666 .word 0x8001e666 + 800078b8: 00000000 .word 0x00000000 + 800078bc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x4949494949494949 + 800078c0: 0007bd83 ld x27,0(x15) + 800078c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x4949494949494949 + 800078c8: 0007b303 ld x6,0(x15) + 800078cc: 00878793 addi x15,x15,8 + +00000000800078d0 : +Zksed_sm4ed_cg_cp_sbox_b73: + sm4ed x17, x27, x6, 3 # perform operation + 800078d0: f06d88b3 sm4ed x17,x27,x6,0x3 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b73, Zksed_sm4ed_cg_cp_sbox_b73_str) + 800078d4: 000b3383 ld x7,0(x22) + 800078d8: 01138c63 beq x7,x17,800078f0 + 800078dc: 0fd0346f jal x8,8000b1d8 + 800078e0: 800078d0 .word 0x800078d0 + 800078e4: 00000000 .word 0x00000000 + 800078e8: 8001e69d .word 0x8001e69d + 800078ec: 00000000 .word 0x00000000 + 800078f0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x4a4a4a4a4a4a4a4a + 800078f4: 0007b903 ld x18,0(x15) + 800078f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x4a4a4a4a4a4a4a4a + 800078fc: 0007b983 ld x19,0(x15) + 80007900: 00878793 addi x15,x15,8 + +0000000080007904 : +Zksed_sm4ed_cg_cp_sbox_b74: + sm4ed x31, x18, x19, 1 # perform operation + 80007904: 71390fb3 sm4ed x31,x18,x19,0x1 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b74, Zksed_sm4ed_cg_cp_sbox_b74_str) + 80007908: 000b3383 ld x7,0(x22) + 8000790c: 01f38c63 beq x7,x31,80007924 + 80007910: 0c90346f jal x8,8000b1d8 + 80007914: 80007904 .word 0x80007904 + 80007918: 00000000 .word 0x00000000 + 8000791c: 8001e6d4 .word 0x8001e6d4 + 80007920: 00000000 .word 0x00000000 + 80007924: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0x4b4b4b4b4b4b4b4b + 80007928: 0007b983 ld x19,0(x15) + 8000792c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x4b4b4b4b4b4b4b4b + 80007930: 0007b603 ld x12,0(x15) + 80007934: 00878793 addi x15,x15,8 + +0000000080007938 : +Zksed_sm4ed_cg_cp_sbox_b75: + sm4ed x4, x19, x12, 3 # perform operation + 80007938: f0c98233 sm4ed x4,x19,x12,0x3 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b75, Zksed_sm4ed_cg_cp_sbox_b75_str) + 8000793c: 000b3383 ld x7,0(x22) + 80007940: 00438c63 beq x7,x4,80007958 + 80007944: 0950346f jal x8,8000b1d8 + 80007948: 80007938 .word 0x80007938 + 8000794c: 00000000 .word 0x00000000 + 80007950: 8001e70b .word 0x8001e70b + 80007954: 00000000 .word 0x00000000 + 80007958: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x4c4c4c4c4c4c4c4c + 8000795c: 0007be83 ld x29,0(x15) + 80007960: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x4c4c4c4c4c4c4c4c + 80007964: 0007b703 ld x14,0(x15) + 80007968: 00878793 addi x15,x15,8 + +000000008000796c : +Zksed_sm4ed_cg_cp_sbox_b76: + sm4ed x20, x29, x14, 1 # perform operation + 8000796c: 70ee8a33 sm4ed x20,x29,x14,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b76, Zksed_sm4ed_cg_cp_sbox_b76_str) + 80007970: 000b3383 ld x7,0(x22) + 80007974: 01438c63 beq x7,x20,8000798c + 80007978: 0610346f jal x8,8000b1d8 + 8000797c: 8000796c .word 0x8000796c + 80007980: 00000000 .word 0x00000000 + 80007984: 8001e742 .word 0x8001e742 + 80007988: 00000000 .word 0x00000000 + 8000798c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x4d4d4d4d4d4d4d4d + 80007990: 0007ba83 ld x21,0(x15) + 80007994: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x4d4d4d4d4d4d4d4d + 80007998: 0007b183 ld x3,0(x15) + 8000799c: 00878793 addi x15,x15,8 + +00000000800079a0 : +Zksed_sm4ed_cg_cp_sbox_b77: + sm4ed x31, x21, x3, 1 # perform operation + 800079a0: 703a8fb3 sm4ed x31,x21,x3,0x1 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b77, Zksed_sm4ed_cg_cp_sbox_b77_str) + 800079a4: 000b3383 ld x7,0(x22) + 800079a8: 01f38c63 beq x7,x31,800079c0 + 800079ac: 02d0346f jal x8,8000b1d8 + 800079b0: 800079a0 .word 0x800079a0 + 800079b4: 00000000 .word 0x00000000 + 800079b8: 8001e779 .word 0x8001e779 + 800079bc: 00000000 .word 0x00000000 + 800079c0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x4e4e4e4e4e4e4e4e + 800079c4: 0007b903 ld x18,0(x15) + 800079c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x4e4e4e4e4e4e4e4e + 800079cc: 0007b983 ld x19,0(x15) + 800079d0: 00878793 addi x15,x15,8 + +00000000800079d4 : +Zksed_sm4ed_cg_cp_sbox_b78: + sm4ed x16, x18, x19, 1 # perform operation + 800079d4: 71390833 sm4ed x16,x18,x19,0x1 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b78, Zksed_sm4ed_cg_cp_sbox_b78_str) + 800079d8: 000b3383 ld x7,0(x22) + 800079dc: 01038c63 beq x7,x16,800079f4 + 800079e0: 7f80346f jal x8,8000b1d8 + 800079e4: 800079d4 .word 0x800079d4 + 800079e8: 00000000 .word 0x00000000 + 800079ec: 8001e7b0 .word 0x8001e7b0 + 800079f0: 00000000 .word 0x00000000 + 800079f4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x4f4f4f4f4f4f4f4f + 800079f8: 0007bc03 ld x24,0(x15) + 800079fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x4f4f4f4f4f4f4f4f + 80007a00: 0007bc83 ld x25,0(x15) + 80007a04: 00878793 addi x15,x15,8 + +0000000080007a08 : +Zksed_sm4ed_cg_cp_sbox_b79: + sm4ed x6, x24, x25, 2 # perform operation + 80007a08: b19c0333 sm4ed x6,x24,x25,0x2 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b79, Zksed_sm4ed_cg_cp_sbox_b79_str) + 80007a0c: 000b3383 ld x7,0(x22) + 80007a10: 00638c63 beq x7,x6,80007a28 + 80007a14: 7c40346f jal x8,8000b1d8 + 80007a18: 80007a08 .word 0x80007a08 + 80007a1c: 00000000 .word 0x00000000 + 80007a20: 8001e7e7 .word 0x8001e7e7 + 80007a24: 00000000 .word 0x00000000 + 80007a28: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x5050505050505050 + 80007a2c: 0007ba83 ld x21,0(x15) + 80007a30: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x5050505050505050 + 80007a34: 0007bb83 ld x23,0(x15) + 80007a38: 00878793 addi x15,x15,8 + +0000000080007a3c : +Zksed_sm4ed_cg_cp_sbox_b80: + sm4ed x19, x21, x23, 3 # perform operation + 80007a3c: f17a89b3 sm4ed x19,x21,x23,0x3 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b80, Zksed_sm4ed_cg_cp_sbox_b80_str) + 80007a40: 000b3383 ld x7,0(x22) + 80007a44: 01338c63 beq x7,x19,80007a5c + 80007a48: 7900346f jal x8,8000b1d8 + 80007a4c: 80007a3c .word 0x80007a3c + 80007a50: 00000000 .word 0x00000000 + 80007a54: 8001e81e .word 0x8001e81e + 80007a58: 00000000 .word 0x00000000 + 80007a5c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x5151515151515151 + 80007a60: 0007b583 ld x11,0(x15) + 80007a64: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x5151515151515151 + 80007a68: 0007b503 ld x10,0(x15) + 80007a6c: 00878793 addi x15,x15,8 + +0000000080007a70 : +Zksed_sm4ed_cg_cp_sbox_b81: + sm4ed x2, x11, x10, 2 # perform operation + 80007a70: b0a58133 sm4ed x2,x11,x10,0x2 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b81, Zksed_sm4ed_cg_cp_sbox_b81_str) + 80007a74: 000b3383 ld x7,0(x22) + 80007a78: 00238c63 beq x7,x2,80007a90 + 80007a7c: 75c0346f jal x8,8000b1d8 + 80007a80: 80007a70 .word 0x80007a70 + 80007a84: 00000000 .word 0x00000000 + 80007a88: 8001e855 .word 0x8001e855 + 80007a8c: 00000000 .word 0x00000000 + 80007a90: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x5252525252525252 + 80007a94: 0007bf83 ld x31,0(x15) + 80007a98: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x5252525252525252 + 80007a9c: 0007b703 ld x14,0(x15) + 80007aa0: 00878793 addi x15,x15,8 + +0000000080007aa4 : +Zksed_sm4ed_cg_cp_sbox_b82: + sm4ed x11, x31, x14, 2 # perform operation + 80007aa4: b0ef85b3 sm4ed x11,x31,x14,0x2 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b82, Zksed_sm4ed_cg_cp_sbox_b82_str) + 80007aa8: 000b3383 ld x7,0(x22) + 80007aac: 00b38c63 beq x7,x11,80007ac4 + 80007ab0: 7280346f jal x8,8000b1d8 + 80007ab4: 80007aa4 .word 0x80007aa4 + 80007ab8: 00000000 .word 0x00000000 + 80007abc: 8001e88c .word 0x8001e88c + 80007ac0: 00000000 .word 0x00000000 + 80007ac4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x5353535353535353 + 80007ac8: 0007be03 ld x28,0(x15) + 80007acc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x5353535353535353 + 80007ad0: 0007b583 ld x11,0(x15) + 80007ad4: 00878793 addi x15,x15,8 + +0000000080007ad8 : +Zksed_sm4ed_cg_cp_sbox_b83: + sm4ed x30, x28, x11, 0 # perform operation + 80007ad8: 30be0f33 sm4ed x30,x28,x11,0x0 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b83, Zksed_sm4ed_cg_cp_sbox_b83_str) + 80007adc: 000b3383 ld x7,0(x22) + 80007ae0: 01e38c63 beq x7,x30,80007af8 + 80007ae4: 6f40346f jal x8,8000b1d8 + 80007ae8: 80007ad8 .word 0x80007ad8 + 80007aec: 00000000 .word 0x00000000 + 80007af0: 8001e8c3 .word 0x8001e8c3 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x5454545454545454 + 80007afc: 0007b283 ld x5,0(x15) + 80007b00: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x5454545454545454 + 80007b04: 0007bd03 ld x26,0(x15) + 80007b08: 00878793 addi x15,x15,8 + +0000000080007b0c : +Zksed_sm4ed_cg_cp_sbox_b84: + sm4ed x25, x5, x26, 3 # perform operation + 80007b0c: f1a28cb3 sm4ed x25,x5,x26,0x3 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b84, Zksed_sm4ed_cg_cp_sbox_b84_str) + 80007b10: 000b3383 ld x7,0(x22) + 80007b14: 01938c63 beq x7,x25,80007b2c + 80007b18: 6c00346f jal x8,8000b1d8 + 80007b1c: 80007b0c .word 0x80007b0c + 80007b20: 00000000 .word 0x00000000 + 80007b24: 8001e8fa .word 0x8001e8fa + 80007b28: 00000000 .word 0x00000000 + 80007b2c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x5555555555555555 + 80007b30: 0007b703 ld x14,0(x15) + 80007b34: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5555555555555555 + 80007b38: 0007bf03 ld x30,0(x15) + 80007b3c: 00878793 addi x15,x15,8 + +0000000080007b40 : +Zksed_sm4ed_cg_cp_sbox_b85: + sm4ed x31, x14, x30, 0 # perform operation + 80007b40: 31e70fb3 sm4ed x31,x14,x30,0x0 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b85, Zksed_sm4ed_cg_cp_sbox_b85_str) + 80007b44: 000b3383 ld x7,0(x22) + 80007b48: 01f38c63 beq x7,x31,80007b60 + 80007b4c: 68c0346f jal x8,8000b1d8 + 80007b50: 80007b40 .word 0x80007b40 + 80007b54: 00000000 .word 0x00000000 + 80007b58: 8001e931 .word 0x8001e931 + 80007b5c: 00000000 .word 0x00000000 + 80007b60: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x5656565656565656 + 80007b64: 0007ba03 ld x20,0(x15) + 80007b68: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x5656565656565656 + 80007b6c: 0007bf03 ld x30,0(x15) + 80007b70: 00878793 addi x15,x15,8 + +0000000080007b74 : +Zksed_sm4ed_cg_cp_sbox_b86: + sm4ed x3, x20, x30, 3 # perform operation + 80007b74: f1ea01b3 sm4ed x3,x20,x30,0x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b86, Zksed_sm4ed_cg_cp_sbox_b86_str) + 80007b78: 000b3383 ld x7,0(x22) + 80007b7c: 00338c63 beq x7,x3,80007b94 + 80007b80: 6580346f jal x8,8000b1d8 + 80007b84: 80007b74 .word 0x80007b74 + 80007b88: 00000000 .word 0x00000000 + 80007b8c: 8001e968 .word 0x8001e968 + 80007b90: 00000000 .word 0x00000000 + 80007b94: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x5757575757575757 + 80007b98: 0007b303 ld x6,0(x15) + 80007b9c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x5757575757575757 + 80007ba0: 0007b703 ld x14,0(x15) + 80007ba4: 00878793 addi x15,x15,8 + +0000000080007ba8 : +Zksed_sm4ed_cg_cp_sbox_b87: + sm4ed x2, x6, x14, 1 # perform operation + 80007ba8: 70e30133 sm4ed x2,x6,x14,0x1 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b87, Zksed_sm4ed_cg_cp_sbox_b87_str) + 80007bac: 000b3383 ld x7,0(x22) + 80007bb0: 00238c63 beq x7,x2,80007bc8 + 80007bb4: 6240346f jal x8,8000b1d8 + 80007bb8: 80007ba8 .word 0x80007ba8 + 80007bbc: 00000000 .word 0x00000000 + 80007bc0: 8001e99f .word 0x8001e99f + 80007bc4: 00000000 .word 0x00000000 + 80007bc8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x5858585858585858 + 80007bcc: 0007b803 ld x16,0(x15) + 80007bd0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x5858585858585858 + 80007bd4: 0007b183 ld x3,0(x15) + 80007bd8: 00878793 addi x15,x15,8 + +0000000080007bdc : +Zksed_sm4ed_cg_cp_sbox_b88: + sm4ed x10, x16, x3, 0 # perform operation + 80007bdc: 30380533 sm4ed x10,x16,x3,0x0 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b88, Zksed_sm4ed_cg_cp_sbox_b88_str) + 80007be0: 000b3383 ld x7,0(x22) + 80007be4: 00a38c63 beq x7,x10,80007bfc + 80007be8: 5f00346f jal x8,8000b1d8 + 80007bec: 80007bdc .word 0x80007bdc + 80007bf0: 00000000 .word 0x00000000 + 80007bf4: 8001e9d6 .word 0x8001e9d6 + 80007bf8: 00000000 .word 0x00000000 + 80007bfc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x5959595959595959 + 80007c00: 0007bc03 ld x24,0(x15) + 80007c04: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x5959595959595959 + 80007c08: 0007bd83 ld x27,0(x15) + 80007c0c: 00878793 addi x15,x15,8 + +0000000080007c10 : +Zksed_sm4ed_cg_cp_sbox_b89: + sm4ed x31, x24, x27, 3 # perform operation + 80007c10: f1bc0fb3 sm4ed x31,x24,x27,0x3 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b89, Zksed_sm4ed_cg_cp_sbox_b89_str) + 80007c14: 000b3383 ld x7,0(x22) + 80007c18: 01f38c63 beq x7,x31,80007c30 + 80007c1c: 5bc0346f jal x8,8000b1d8 + 80007c20: 80007c10 .word 0x80007c10 + 80007c24: 00000000 .word 0x00000000 + 80007c28: 8001ea0d .word 0x8001ea0d + 80007c2c: 00000000 .word 0x00000000 + 80007c30: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x5a5a5a5a5a5a5a5a + 80007c34: 0007b583 ld x11,0(x15) + 80007c38: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x5a5a5a5a5a5a5a5a + 80007c3c: 0007ba03 ld x20,0(x15) + 80007c40: 00878793 addi x15,x15,8 + +0000000080007c44 : +Zksed_sm4ed_cg_cp_sbox_b90: + sm4ed x25, x11, x20, 0 # perform operation + 80007c44: 31458cb3 sm4ed x25,x11,x20,0x0 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b90, Zksed_sm4ed_cg_cp_sbox_b90_str) + 80007c48: 000b3383 ld x7,0(x22) + 80007c4c: 01938c63 beq x7,x25,80007c64 + 80007c50: 5880346f jal x8,8000b1d8 + 80007c54: 80007c44 .word 0x80007c44 + 80007c58: 00000000 .word 0x00000000 + 80007c5c: 8001ea44 .word 0x8001ea44 + 80007c60: 00000000 .word 0x00000000 + 80007c64: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x5b5b5b5b5b5b5b5b + 80007c68: 0007bd83 ld x27,0(x15) + 80007c6c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x5b5b5b5b5b5b5b5b + 80007c70: 0007ba83 ld x21,0(x15) + 80007c74: 00878793 addi x15,x15,8 + +0000000080007c78 : +Zksed_sm4ed_cg_cp_sbox_b91: + sm4ed x9, x27, x21, 0 # perform operation + 80007c78: 315d84b3 sm4ed x9,x27,x21,0x0 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b91, Zksed_sm4ed_cg_cp_sbox_b91_str) + 80007c7c: 000b3383 ld x7,0(x22) + 80007c80: 00938c63 beq x7,x9,80007c98 + 80007c84: 5540346f jal x8,8000b1d8 + 80007c88: 80007c78 .word 0x80007c78 + 80007c8c: 00000000 .word 0x00000000 + 80007c90: 8001ea7b .word 0x8001ea7b + 80007c94: 00000000 .word 0x00000000 + 80007c98: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x5c5c5c5c5c5c5c5c + 80007c9c: 0007bc03 ld x24,0(x15) + 80007ca0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x5c5c5c5c5c5c5c5c + 80007ca4: 0007bd03 ld x26,0(x15) + 80007ca8: 00878793 addi x15,x15,8 + +0000000080007cac : +Zksed_sm4ed_cg_cp_sbox_b92: + sm4ed x9, x24, x26, 2 # perform operation + 80007cac: b1ac04b3 sm4ed x9,x24,x26,0x2 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b92, Zksed_sm4ed_cg_cp_sbox_b92_str) + 80007cb0: 000b3383 ld x7,0(x22) + 80007cb4: 00938c63 beq x7,x9,80007ccc + 80007cb8: 5200346f jal x8,8000b1d8 + 80007cbc: 80007cac .word 0x80007cac + 80007cc0: 00000000 .word 0x00000000 + 80007cc4: 8001eab2 .word 0x8001eab2 + 80007cc8: 00000000 .word 0x00000000 + 80007ccc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x5d5d5d5d5d5d5d5d + 80007cd0: 0007b303 ld x6,0(x15) + 80007cd4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x5d5d5d5d5d5d5d5d + 80007cd8: 0007b603 ld x12,0(x15) + 80007cdc: 00878793 addi x15,x15,8 + +0000000080007ce0 : +Zksed_sm4ed_cg_cp_sbox_b93: + sm4ed x29, x6, x12, 0 # perform operation + 80007ce0: 30c30eb3 sm4ed x29,x6,x12,0x0 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b93, Zksed_sm4ed_cg_cp_sbox_b93_str) + 80007ce4: 000b3383 ld x7,0(x22) + 80007ce8: 01d38c63 beq x7,x29,80007d00 + 80007cec: 4ec0346f jal x8,8000b1d8 + 80007cf0: 80007ce0 .word 0x80007ce0 + 80007cf4: 00000000 .word 0x00000000 + 80007cf8: 8001eae9 .word 0x8001eae9 + 80007cfc: 00000000 .word 0x00000000 + 80007d00: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x5e5e5e5e5e5e5e5e + 80007d04: 0007b583 ld x11,0(x15) + 80007d08: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x5e5e5e5e5e5e5e5e + 80007d0c: 0007b603 ld x12,0(x15) + 80007d10: 00878793 addi x15,x15,8 + +0000000080007d14 : +Zksed_sm4ed_cg_cp_sbox_b94: + sm4ed x21, x11, x12, 2 # perform operation + 80007d14: b0c58ab3 sm4ed x21,x11,x12,0x2 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b94, Zksed_sm4ed_cg_cp_sbox_b94_str) + 80007d18: 000b3383 ld x7,0(x22) + 80007d1c: 01538c63 beq x7,x21,80007d34 + 80007d20: 4b80346f jal x8,8000b1d8 + 80007d24: 80007d14 .word 0x80007d14 + 80007d28: 00000000 .word 0x00000000 + 80007d2c: 8001eb20 .word 0x8001eb20 + 80007d30: 00000000 .word 0x00000000 + 80007d34: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x5f5f5f5f5f5f5f5f + 80007d38: 0007b203 ld x4,0(x15) + 80007d3c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x5f5f5f5f5f5f5f5f + 80007d40: 0007b683 ld x13,0(x15) + 80007d44: 00878793 addi x15,x15,8 + +0000000080007d48 : +Zksed_sm4ed_cg_cp_sbox_b95: + sm4ed x5, x4, x13, 3 # perform operation + 80007d48: f0d202b3 sm4ed x5,x4,x13,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b95, Zksed_sm4ed_cg_cp_sbox_b95_str) + 80007d4c: 000b3383 ld x7,0(x22) + 80007d50: 00538c63 beq x7,x5,80007d68 + 80007d54: 4840346f jal x8,8000b1d8 + 80007d58: 80007d48 .word 0x80007d48 + 80007d5c: 00000000 .word 0x00000000 + 80007d60: 8001eb57 .word 0x8001eb57 + 80007d64: 00000000 .word 0x00000000 + 80007d68: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x6060606060606060 + 80007d6c: 0007b283 ld x5,0(x15) + 80007d70: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x6060606060606060 + 80007d74: 0007b603 ld x12,0(x15) + 80007d78: 00878793 addi x15,x15,8 + +0000000080007d7c : +Zksed_sm4ed_cg_cp_sbox_b96: + sm4ed x13, x5, x12, 2 # perform operation + 80007d7c: b0c286b3 sm4ed x13,x5,x12,0x2 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b96, Zksed_sm4ed_cg_cp_sbox_b96_str) + 80007d80: 000b3383 ld x7,0(x22) + 80007d84: 00d38c63 beq x7,x13,80007d9c + 80007d88: 4500346f jal x8,8000b1d8 + 80007d8c: 80007d7c .word 0x80007d7c + 80007d90: 00000000 .word 0x00000000 + 80007d94: 8001eb8e .word 0x8001eb8e + 80007d98: 00000000 .word 0x00000000 + 80007d9c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x6161616161616161 + 80007da0: 0007b483 ld x9,0(x15) + 80007da4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x6161616161616161 + 80007da8: 0007ba83 ld x21,0(x15) + 80007dac: 00878793 addi x15,x15,8 + +0000000080007db0 : +Zksed_sm4ed_cg_cp_sbox_b97: + sm4ed x19, x9, x21, 3 # perform operation + 80007db0: f15489b3 sm4ed x19,x9,x21,0x3 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b97, Zksed_sm4ed_cg_cp_sbox_b97_str) + 80007db4: 000b3383 ld x7,0(x22) + 80007db8: 01338c63 beq x7,x19,80007dd0 + 80007dbc: 41c0346f jal x8,8000b1d8 + 80007dc0: 80007db0 .word 0x80007db0 + 80007dc4: 00000000 .word 0x00000000 + 80007dc8: 8001ebc5 .word 0x8001ebc5 + 80007dcc: 00000000 .word 0x00000000 + 80007dd0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x6262626262626262 + 80007dd4: 0007bf03 ld x30,0(x15) + 80007dd8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0x6262626262626262 + 80007ddc: 0007b803 ld x16,0(x15) + 80007de0: 00878793 addi x15,x15,8 + +0000000080007de4 : +Zksed_sm4ed_cg_cp_sbox_b98: + sm4ed x20, x30, x16, 2 # perform operation + 80007de4: b10f0a33 sm4ed x20,x30,x16,0x2 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b98, Zksed_sm4ed_cg_cp_sbox_b98_str) + 80007de8: 000b3383 ld x7,0(x22) + 80007dec: 01438c63 beq x7,x20,80007e04 + 80007df0: 3e80346f jal x8,8000b1d8 + 80007df4: 80007de4 .word 0x80007de4 + 80007df8: 00000000 .word 0x00000000 + 80007dfc: 8001ebfc .word 0x8001ebfc + 80007e00: 00000000 .word 0x00000000 + 80007e04: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x6363636363636363 + 80007e08: 0007b083 ld x1,0(x15) + 80007e0c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0x6363636363636363 + 80007e10: 0007b683 ld x13,0(x15) + 80007e14: 00878793 addi x15,x15,8 + +0000000080007e18 : +Zksed_sm4ed_cg_cp_sbox_b99: + sm4ed x17, x1, x13, 2 # perform operation + 80007e18: b0d088b3 sm4ed x17,x1,x13,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b99, Zksed_sm4ed_cg_cp_sbox_b99_str) + 80007e1c: 000b3383 ld x7,0(x22) + 80007e20: 01138c63 beq x7,x17,80007e38 + 80007e24: 3b40346f jal x8,8000b1d8 + 80007e28: 80007e18 .word 0x80007e18 + 80007e2c: 00000000 .word 0x00000000 + 80007e30: 8001ec33 .word 0x8001ec33 + 80007e34: 00000000 .word 0x00000000 + 80007e38: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x6464646464646464 + 80007e3c: 0007b883 ld x17,0(x15) + 80007e40: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x6464646464646464 + 80007e44: 0007b903 ld x18,0(x15) + 80007e48: 00878793 addi x15,x15,8 + +0000000080007e4c : +Zksed_sm4ed_cg_cp_sbox_b100: + sm4ed x26, x17, x18, 0 # perform operation + 80007e4c: 31288d33 sm4ed x26,x17,x18,0x0 + # Check if x26 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x26, Zksed_sm4ed_cg_cp_sbox_b100, Zksed_sm4ed_cg_cp_sbox_b100_str) + 80007e50: 000b3383 ld x7,0(x22) + 80007e54: 01a38c63 beq x7,x26,80007e6c + 80007e58: 3800346f jal x8,8000b1d8 + 80007e5c: 80007e4c .word 0x80007e4c + 80007e60: 00000000 .word 0x00000000 + 80007e64: 8001ec6a .word 0x8001ec6a + 80007e68: 00000000 .word 0x00000000 + 80007e6c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x6565656565656565 + 80007e70: 0007b283 ld x5,0(x15) + 80007e74: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x6565656565656565 + 80007e78: 0007ba83 ld x21,0(x15) + 80007e7c: 00878793 addi x15,x15,8 + +0000000080007e80 : +Zksed_sm4ed_cg_cp_sbox_b101: + sm4ed x1, x5, x21, 1 # perform operation + 80007e80: 715280b3 sm4ed x1,x5,x21,0x1 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b101, Zksed_sm4ed_cg_cp_sbox_b101_str) + 80007e84: 000b3383 ld x7,0(x22) + 80007e88: 00138c63 beq x7,x1,80007ea0 + 80007e8c: 34c0346f jal x8,8000b1d8 + 80007e90: 80007e80 .word 0x80007e80 + 80007e94: 00000000 .word 0x00000000 + 80007e98: 8001eca2 .word 0x8001eca2 + 80007e9c: 00000000 .word 0x00000000 + 80007ea0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x6666666666666666 + 80007ea4: 0007b283 ld x5,0(x15) + 80007ea8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x6666666666666666 + 80007eac: 0007bf83 ld x31,0(x15) + 80007eb0: 00878793 addi x15,x15,8 + +0000000080007eb4 : +Zksed_sm4ed_cg_cp_sbox_b102: + sm4ed x16, x5, x31, 2 # perform operation + 80007eb4: b1f28833 sm4ed x16,x5,x31,0x2 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b102, Zksed_sm4ed_cg_cp_sbox_b102_str) + 80007eb8: 000b3383 ld x7,0(x22) + 80007ebc: 01038c63 beq x7,x16,80007ed4 + 80007ec0: 3180346f jal x8,8000b1d8 + 80007ec4: 80007eb4 .word 0x80007eb4 + 80007ec8: 00000000 .word 0x00000000 + 80007ecc: 8001ecda .word 0x8001ecda + 80007ed0: 00000000 .word 0x00000000 + 80007ed4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x6767676767676767 + 80007ed8: 0007bc83 ld x25,0(x15) + 80007edc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x6767676767676767 + 80007ee0: 0007bd83 ld x27,0(x15) + 80007ee4: 00878793 addi x15,x15,8 + +0000000080007ee8 : +Zksed_sm4ed_cg_cp_sbox_b103: + sm4ed x20, x25, x27, 0 # perform operation + 80007ee8: 31bc8a33 sm4ed x20,x25,x27,0x0 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b103, Zksed_sm4ed_cg_cp_sbox_b103_str) + 80007eec: 000b3383 ld x7,0(x22) + 80007ef0: 01438c63 beq x7,x20,80007f08 + 80007ef4: 2e40346f jal x8,8000b1d8 + 80007ef8: 80007ee8 .word 0x80007ee8 + 80007efc: 00000000 .word 0x00000000 + 80007f00: 8001ed12 .word 0x8001ed12 + 80007f04: 00000000 .word 0x00000000 + 80007f08: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x6868686868686868 + 80007f0c: 0007b303 ld x6,0(x15) + 80007f10: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x6868686868686868 + 80007f14: 0007b283 ld x5,0(x15) + 80007f18: 00878793 addi x15,x15,8 + +0000000080007f1c : +Zksed_sm4ed_cg_cp_sbox_b104: + sm4ed x19, x6, x5, 3 # perform operation + 80007f1c: f05309b3 sm4ed x19,x6,x5,0x3 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b104, Zksed_sm4ed_cg_cp_sbox_b104_str) + 80007f20: 000b3383 ld x7,0(x22) + 80007f24: 01338c63 beq x7,x19,80007f3c + 80007f28: 2b00346f jal x8,8000b1d8 + 80007f2c: 80007f1c .word 0x80007f1c + 80007f30: 00000000 .word 0x00000000 + 80007f34: 8001ed4a .word 0x8001ed4a + 80007f38: 00000000 .word 0x00000000 + 80007f3c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0x6969696969696969 + 80007f40: 0007b803 ld x16,0(x15) + 80007f44: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x6969696969696969 + 80007f48: 0007ba83 ld x21,0(x15) + 80007f4c: 00878793 addi x15,x15,8 + +0000000080007f50 : +Zksed_sm4ed_cg_cp_sbox_b105: + sm4ed x28, x16, x21, 2 # perform operation + 80007f50: b1580e33 sm4ed x28,x16,x21,0x2 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b105, Zksed_sm4ed_cg_cp_sbox_b105_str) + 80007f54: 000b3383 ld x7,0(x22) + 80007f58: 01c38c63 beq x7,x28,80007f70 + 80007f5c: 27c0346f jal x8,8000b1d8 + 80007f60: 80007f50 .word 0x80007f50 + 80007f64: 00000000 .word 0x00000000 + 80007f68: 8001ed82 .word 0x8001ed82 + 80007f6c: 00000000 .word 0x00000000 + 80007f70: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x6a6a6a6a6a6a6a6a + 80007f74: 0007b203 ld x4,0(x15) + 80007f78: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x6a6a6a6a6a6a6a6a + 80007f7c: 0007bd83 ld x27,0(x15) + 80007f80: 00878793 addi x15,x15,8 + +0000000080007f84 : +Zksed_sm4ed_cg_cp_sbox_b106: + sm4ed x12, x4, x27, 3 # perform operation + 80007f84: f1b20633 sm4ed x12,x4,x27,0x3 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b106, Zksed_sm4ed_cg_cp_sbox_b106_str) + 80007f88: 000b3383 ld x7,0(x22) + 80007f8c: 00c38c63 beq x7,x12,80007fa4 + 80007f90: 2480346f jal x8,8000b1d8 + 80007f94: 80007f84 .word 0x80007f84 + 80007f98: 00000000 .word 0x00000000 + 80007f9c: 8001edba .word 0x8001edba + 80007fa0: 00000000 .word 0x00000000 + 80007fa4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x6b6b6b6b6b6b6b6b + 80007fa8: 0007bd03 ld x26,0(x15) + 80007fac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x6b6b6b6b6b6b6b6b + 80007fb0: 0007bc03 ld x24,0(x15) + 80007fb4: 00878793 addi x15,x15,8 + +0000000080007fb8 : +Zksed_sm4ed_cg_cp_sbox_b107: + sm4ed x5, x26, x24, 0 # perform operation + 80007fb8: 318d02b3 sm4ed x5,x26,x24,0x0 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b107, Zksed_sm4ed_cg_cp_sbox_b107_str) + 80007fbc: 000b3383 ld x7,0(x22) + 80007fc0: 00538c63 beq x7,x5,80007fd8 + 80007fc4: 2140346f jal x8,8000b1d8 + 80007fc8: 80007fb8 .word 0x80007fb8 + 80007fcc: 00000000 .word 0x00000000 + 80007fd0: 8001edf2 .word 0x8001edf2 + 80007fd4: 00000000 .word 0x00000000 + 80007fd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x6c6c6c6c6c6c6c6c + 80007fdc: 0007b903 ld x18,0(x15) + 80007fe0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x6c6c6c6c6c6c6c6c + 80007fe4: 0007bd03 ld x26,0(x15) + 80007fe8: 00878793 addi x15,x15,8 + +0000000080007fec : +Zksed_sm4ed_cg_cp_sbox_b108: + sm4ed x14, x18, x26, 1 # perform operation + 80007fec: 71a90733 sm4ed x14,x18,x26,0x1 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b108, Zksed_sm4ed_cg_cp_sbox_b108_str) + 80007ff0: 000b3383 ld x7,0(x22) + 80007ff4: 00e38c63 beq x7,x14,8000800c + 80007ff8: 1e00346f jal x8,8000b1d8 + 80007ffc: 80007fec .word 0x80007fec + 80008000: 00000000 .word 0x00000000 + 80008004: 8001ee2a .word 0x8001ee2a + 80008008: 00000000 .word 0x00000000 + 8000800c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0x6d6d6d6d6d6d6d6d + 80008010: 0007b303 ld x6,0(x15) + 80008014: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x6d6d6d6d6d6d6d6d + 80008018: 0007b503 ld x10,0(x15) + 8000801c: 00878793 addi x15,x15,8 + +0000000080008020 : +Zksed_sm4ed_cg_cp_sbox_b109: + sm4ed x24, x6, x10, 1 # perform operation + 80008020: 70a30c33 sm4ed x24,x6,x10,0x1 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b109, Zksed_sm4ed_cg_cp_sbox_b109_str) + 80008024: 000b3383 ld x7,0(x22) + 80008028: 01838c63 beq x7,x24,80008040 + 8000802c: 1ac0346f jal x8,8000b1d8 + 80008030: 80008020 .word 0x80008020 + 80008034: 00000000 .word 0x00000000 + 80008038: 8001ee62 .word 0x8001ee62 + 8000803c: 00000000 .word 0x00000000 + 80008040: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x6e6e6e6e6e6e6e6e + 80008044: 0007bd83 ld x27,0(x15) + 80008048: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x6e6e6e6e6e6e6e6e + 8000804c: 0007b183 ld x3,0(x15) + 80008050: 00878793 addi x15,x15,8 + +0000000080008054 : +Zksed_sm4ed_cg_cp_sbox_b110: + sm4ed x2, x27, x3, 3 # perform operation + 80008054: f03d8133 sm4ed x2,x27,x3,0x3 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b110, Zksed_sm4ed_cg_cp_sbox_b110_str) + 80008058: 000b3383 ld x7,0(x22) + 8000805c: 00238c63 beq x7,x2,80008074 + 80008060: 1780346f jal x8,8000b1d8 + 80008064: 80008054 .word 0x80008054 + 80008068: 00000000 .word 0x00000000 + 8000806c: 8001ee9a .word 0x8001ee9a + 80008070: 00000000 .word 0x00000000 + 80008074: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0x6f6f6f6f6f6f6f6f + 80008078: 0007be03 ld x28,0(x15) + 8000807c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x6f6f6f6f6f6f6f6f + 80008080: 0007be83 ld x29,0(x15) + 80008084: 00878793 addi x15,x15,8 + +0000000080008088 : +Zksed_sm4ed_cg_cp_sbox_b111: + sm4ed x17, x28, x29, 2 # perform operation + 80008088: b1de08b3 sm4ed x17,x28,x29,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b111, Zksed_sm4ed_cg_cp_sbox_b111_str) + 8000808c: 000b3383 ld x7,0(x22) + 80008090: 01138c63 beq x7,x17,800080a8 + 80008094: 1440346f jal x8,8000b1d8 + 80008098: 80008088 .word 0x80008088 + 8000809c: 00000000 .word 0x00000000 + 800080a0: 8001eed2 .word 0x8001eed2 + 800080a4: 00000000 .word 0x00000000 + 800080a8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7070707070707070 + 800080ac: 0007ba83 ld x21,0(x15) + 800080b0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x7070707070707070 + 800080b4: 0007bb83 ld x23,0(x15) + 800080b8: 00878793 addi x15,x15,8 + +00000000800080bc : +Zksed_sm4ed_cg_cp_sbox_b112: + sm4ed x10, x21, x23, 2 # perform operation + 800080bc: b17a8533 sm4ed x10,x21,x23,0x2 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b112, Zksed_sm4ed_cg_cp_sbox_b112_str) + 800080c0: 000b3383 ld x7,0(x22) + 800080c4: 00a38c63 beq x7,x10,800080dc + 800080c8: 1100346f jal x8,8000b1d8 + 800080cc: 800080bc .word 0x800080bc + 800080d0: 00000000 .word 0x00000000 + 800080d4: 8001ef0a .word 0x8001ef0a + 800080d8: 00000000 .word 0x00000000 + 800080dc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x7171717171717171 + 800080e0: 0007bc03 ld x24,0(x15) + 800080e4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x7171717171717171 + 800080e8: 0007ba83 ld x21,0(x15) + 800080ec: 00878793 addi x15,x15,8 + +00000000800080f0 : +Zksed_sm4ed_cg_cp_sbox_b113: + sm4ed x20, x24, x21, 1 # perform operation + 800080f0: 715c0a33 sm4ed x20,x24,x21,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b113, Zksed_sm4ed_cg_cp_sbox_b113_str) + 800080f4: 000b3383 ld x7,0(x22) + 800080f8: 01438c63 beq x7,x20,80008110 + 800080fc: 0dc0346f jal x8,8000b1d8 + 80008100: 800080f0 .word 0x800080f0 + 80008104: 00000000 .word 0x00000000 + 80008108: 8001ef42 .word 0x8001ef42 + 8000810c: 00000000 .word 0x00000000 + 80008110: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7272727272727272 + 80008114: 0007b883 ld x17,0(x15) + 80008118: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x7272727272727272 + 8000811c: 0007bc83 ld x25,0(x15) + 80008120: 00878793 addi x15,x15,8 + +0000000080008124 : +Zksed_sm4ed_cg_cp_sbox_b114: + sm4ed x12, x17, x25, 1 # perform operation + 80008124: 71988633 sm4ed x12,x17,x25,0x1 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b114, Zksed_sm4ed_cg_cp_sbox_b114_str) + 80008128: 000b3383 ld x7,0(x22) + 8000812c: 00c38c63 beq x7,x12,80008144 + 80008130: 0a80346f jal x8,8000b1d8 + 80008134: 80008124 .word 0x80008124 + 80008138: 00000000 .word 0x00000000 + 8000813c: 8001ef7a .word 0x8001ef7a + 80008140: 00000000 .word 0x00000000 + 80008144: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0x7373737373737373 + 80008148: 0007ba03 ld x20,0(x15) + 8000814c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7373737373737373 + 80008150: 0007bf83 ld x31,0(x15) + 80008154: 00878793 addi x15,x15,8 + +0000000080008158 : +Zksed_sm4ed_cg_cp_sbox_b115: + sm4ed x24, x20, x31, 0 # perform operation + 80008158: 31fa0c33 sm4ed x24,x20,x31,0x0 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b115, Zksed_sm4ed_cg_cp_sbox_b115_str) + 8000815c: 000b3383 ld x7,0(x22) + 80008160: 01838c63 beq x7,x24,80008178 + 80008164: 0740346f jal x8,8000b1d8 + 80008168: 80008158 .word 0x80008158 + 8000816c: 00000000 .word 0x00000000 + 80008170: 8001efb2 .word 0x8001efb2 + 80008174: 00000000 .word 0x00000000 + 80008178: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0x7474747474747474 + 8000817c: 0007b483 ld x9,0(x15) + 80008180: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7474747474747474 + 80008184: 0007bf83 ld x31,0(x15) + 80008188: 00878793 addi x15,x15,8 + +000000008000818c : +Zksed_sm4ed_cg_cp_sbox_b116: + sm4ed x20, x9, x31, 1 # perform operation + 8000818c: 71f48a33 sm4ed x20,x9,x31,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b116, Zksed_sm4ed_cg_cp_sbox_b116_str) + 80008190: 000b3383 ld x7,0(x22) + 80008194: 01438c63 beq x7,x20,800081ac + 80008198: 0400346f jal x8,8000b1d8 + 8000819c: 8000818c .word 0x8000818c + 800081a0: 00000000 .word 0x00000000 + 800081a4: 8001efea .word 0x8001efea + 800081a8: 00000000 .word 0x00000000 + 800081ac: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x7575757575757575 + 800081b0: 0007be83 ld x29,0(x15) + 800081b4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0x7575757575757575 + 800081b8: 0007bb83 ld x23,0(x15) + 800081bc: 00878793 addi x15,x15,8 + +00000000800081c0 : +Zksed_sm4ed_cg_cp_sbox_b117: + sm4ed x18, x29, x23, 2 # perform operation + 800081c0: b17e8933 sm4ed x18,x29,x23,0x2 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b117, Zksed_sm4ed_cg_cp_sbox_b117_str) + 800081c4: 000b3383 ld x7,0(x22) + 800081c8: 01238c63 beq x7,x18,800081e0 + 800081cc: 00c0346f jal x8,8000b1d8 + 800081d0: 800081c0 .word 0x800081c0 + 800081d4: 00000000 .word 0x00000000 + 800081d8: 8001f022 .word 0x8001f022 + 800081dc: 00000000 .word 0x00000000 + 800081e0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x7676767676767676 + 800081e4: 0007b083 ld x1,0(x15) + 800081e8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0x7676767676767676 + 800081ec: 0007b883 ld x17,0(x15) + 800081f0: 00878793 addi x15,x15,8 + +00000000800081f4 : +Zksed_sm4ed_cg_cp_sbox_b118: + sm4ed x25, x1, x17, 1 # perform operation + 800081f4: 71108cb3 sm4ed x25,x1,x17,0x1 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b118, Zksed_sm4ed_cg_cp_sbox_b118_str) + 800081f8: 000b3383 ld x7,0(x22) + 800081fc: 01938c63 beq x7,x25,80008214 + 80008200: 7d90246f jal x8,8000b1d8 + 80008204: 800081f4 .word 0x800081f4 + 80008208: 00000000 .word 0x00000000 + 8000820c: 8001f05a .word 0x8001f05a + 80008210: 00000000 .word 0x00000000 + 80008214: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7777777777777777 + 80008218: 0007b883 ld x17,0(x15) + 8000821c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x7777777777777777 + 80008220: 0007ba03 ld x20,0(x15) + 80008224: 00878793 addi x15,x15,8 + +0000000080008228 : +Zksed_sm4ed_cg_cp_sbox_b119: + sm4ed x1, x17, x20, 2 # perform operation + 80008228: b14880b3 sm4ed x1,x17,x20,0x2 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b119, Zksed_sm4ed_cg_cp_sbox_b119_str) + 8000822c: 000b3383 ld x7,0(x22) + 80008230: 00138c63 beq x7,x1,80008248 + 80008234: 7a50246f jal x8,8000b1d8 + 80008238: 80008228 .word 0x80008228 + 8000823c: 00000000 .word 0x00000000 + 80008240: 8001f092 .word 0x8001f092 + 80008244: 00000000 .word 0x00000000 + 80008248: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x7878787878787878 + 8000824c: 0007b283 ld x5,0(x15) + 80008250: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x7878787878787878 + 80008254: 0007b303 ld x6,0(x15) + 80008258: 00878793 addi x15,x15,8 + +000000008000825c : +Zksed_sm4ed_cg_cp_sbox_b120: + sm4ed x2, x5, x6, 0 # perform operation + 8000825c: 30628133 sm4ed x2,x5,x6,0x0 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b120, Zksed_sm4ed_cg_cp_sbox_b120_str) + 80008260: 000b3383 ld x7,0(x22) + 80008264: 00238c63 beq x7,x2,8000827c + 80008268: 7710246f jal x8,8000b1d8 + 8000826c: 8000825c .word 0x8000825c + 80008270: 00000000 .word 0x00000000 + 80008274: 8001f0ca .word 0x8001f0ca + 80008278: 00000000 .word 0x00000000 + 8000827c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x7979797979797979 + 80008280: 0007bb83 ld x23,0(x15) + 80008284: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0x7979797979797979 + 80008288: 0007b503 ld x10,0(x15) + 8000828c: 00878793 addi x15,x15,8 + +0000000080008290 : +Zksed_sm4ed_cg_cp_sbox_b121: + sm4ed x5, x23, x10, 3 # perform operation + 80008290: f0ab82b3 sm4ed x5,x23,x10,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b121, Zksed_sm4ed_cg_cp_sbox_b121_str) + 80008294: 000b3383 ld x7,0(x22) + 80008298: 00538c63 beq x7,x5,800082b0 + 8000829c: 73d0246f jal x8,8000b1d8 + 800082a0: 80008290 .word 0x80008290 + 800082a4: 00000000 .word 0x00000000 + 800082a8: 8001f102 .word 0x8001f102 + 800082ac: 00000000 .word 0x00000000 + 800082b0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x7a7a7a7a7a7a7a7a + 800082b4: 0007b903 ld x18,0(x15) + 800082b8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7a7a7a7a7a7a7a7a + 800082bc: 0007bf83 ld x31,0(x15) + 800082c0: 00878793 addi x15,x15,8 + +00000000800082c4 : +Zksed_sm4ed_cg_cp_sbox_b122: + sm4ed x9, x18, x31, 0 # perform operation + 800082c4: 31f904b3 sm4ed x9,x18,x31,0x0 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b122, Zksed_sm4ed_cg_cp_sbox_b122_str) + 800082c8: 000b3383 ld x7,0(x22) + 800082cc: 00938c63 beq x7,x9,800082e4 + 800082d0: 7090246f jal x8,8000b1d8 + 800082d4: 800082c4 .word 0x800082c4 + 800082d8: 00000000 .word 0x00000000 + 800082dc: 8001f13a .word 0x8001f13a + 800082e0: 00000000 .word 0x00000000 + 800082e4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0x7b7b7b7b7b7b7b7b + 800082e8: 0007b883 ld x17,0(x15) + 800082ec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x7b7b7b7b7b7b7b7b + 800082f0: 0007b483 ld x9,0(x15) + 800082f4: 00878793 addi x15,x15,8 + +00000000800082f8 : +Zksed_sm4ed_cg_cp_sbox_b123: + sm4ed x16, x17, x9, 2 # perform operation + 800082f8: b0988833 sm4ed x16,x17,x9,0x2 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b123, Zksed_sm4ed_cg_cp_sbox_b123_str) + 800082fc: 000b3383 ld x7,0(x22) + 80008300: 01038c63 beq x7,x16,80008318 + 80008304: 6d50246f jal x8,8000b1d8 + 80008308: 800082f8 .word 0x800082f8 + 8000830c: 00000000 .word 0x00000000 + 80008310: 8001f172 .word 0x8001f172 + 80008314: 00000000 .word 0x00000000 + 80008318: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x7c7c7c7c7c7c7c7c + 8000831c: 0007bc03 ld x24,0(x15) + 80008320: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x7c7c7c7c7c7c7c7c + 80008324: 0007be83 ld x29,0(x15) + 80008328: 00878793 addi x15,x15,8 + +000000008000832c : +Zksed_sm4ed_cg_cp_sbox_b124: + sm4ed x19, x24, x29, 2 # perform operation + 8000832c: b1dc09b3 sm4ed x19,x24,x29,0x2 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b124, Zksed_sm4ed_cg_cp_sbox_b124_str) + 80008330: 000b3383 ld x7,0(x22) + 80008334: 01338c63 beq x7,x19,8000834c + 80008338: 6a10246f jal x8,8000b1d8 + 8000833c: 8000832c .word 0x8000832c + 80008340: 00000000 .word 0x00000000 + 80008344: 8001f1aa .word 0x8001f1aa + 80008348: 00000000 .word 0x00000000 + 8000834c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x7d7d7d7d7d7d7d7d + 80008350: 0007bb83 ld x23,0(x15) + 80008354: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7d7d7d7d7d7d7d7d + 80008358: 0007bf83 ld x31,0(x15) + 8000835c: 00878793 addi x15,x15,8 + +0000000080008360 : +Zksed_sm4ed_cg_cp_sbox_b125: + sm4ed x9, x23, x31, 0 # perform operation + 80008360: 31fb84b3 sm4ed x9,x23,x31,0x0 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b125, Zksed_sm4ed_cg_cp_sbox_b125_str) + 80008364: 000b3383 ld x7,0(x22) + 80008368: 00938c63 beq x7,x9,80008380 + 8000836c: 66d0246f jal x8,8000b1d8 + 80008370: 80008360 .word 0x80008360 + 80008374: 00000000 .word 0x00000000 + 80008378: 8001f1e2 .word 0x8001f1e2 + 8000837c: 00000000 .word 0x00000000 + 80008380: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0x7e7e7e7e7e7e7e7e + 80008384: 0007bb83 ld x23,0(x15) + 80008388: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0x7e7e7e7e7e7e7e7e + 8000838c: 0007ba03 ld x20,0(x15) + 80008390: 00878793 addi x15,x15,8 + +0000000080008394 : +Zksed_sm4ed_cg_cp_sbox_b126: + sm4ed x11, x23, x20, 2 # perform operation + 80008394: b14b85b3 sm4ed x11,x23,x20,0x2 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b126, Zksed_sm4ed_cg_cp_sbox_b126_str) + 80008398: 000b3383 ld x7,0(x22) + 8000839c: 00b38c63 beq x7,x11,800083b4 + 800083a0: 6390246f jal x8,8000b1d8 + 800083a4: 80008394 .word 0x80008394 + 800083a8: 00000000 .word 0x00000000 + 800083ac: 8001f21a .word 0x8001f21a + 800083b0: 00000000 .word 0x00000000 + 800083b4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x7f7f7f7f7f7f7f7f + 800083b8: 0007ba83 ld x21,0(x15) + 800083bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x7f7f7f7f7f7f7f7f + 800083c0: 0007bf83 ld x31,0(x15) + 800083c4: 00878793 addi x15,x15,8 + +00000000800083c8 : +Zksed_sm4ed_cg_cp_sbox_b127: + sm4ed x13, x21, x31, 0 # perform operation + 800083c8: 31fa86b3 sm4ed x13,x21,x31,0x0 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b127, Zksed_sm4ed_cg_cp_sbox_b127_str) + 800083cc: 000b3383 ld x7,0(x22) + 800083d0: 00d38c63 beq x7,x13,800083e8 + 800083d4: 6050246f jal x8,8000b1d8 + 800083d8: 800083c8 .word 0x800083c8 + 800083dc: 00000000 .word 0x00000000 + 800083e0: 8001f252 .word 0x8001f252 + 800083e4: 00000000 .word 0x00000000 + 800083e8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x8080808080808080 + 800083ec: 0007b283 ld x5,0(x15) + 800083f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x8080808080808080 + 800083f4: 0007b203 ld x4,0(x15) + 800083f8: 00878793 addi x15,x15,8 + +00000000800083fc : +Zksed_sm4ed_cg_cp_sbox_b128: + sm4ed x12, x5, x4, 1 # perform operation + 800083fc: 70428633 sm4ed x12,x5,x4,0x1 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b128, Zksed_sm4ed_cg_cp_sbox_b128_str) + 80008400: 000b3383 ld x7,0(x22) + 80008404: 00c38c63 beq x7,x12,8000841c + 80008408: 5d10246f jal x8,8000b1d8 + 8000840c: 800083fc .word 0x800083fc + 80008410: 00000000 .word 0x00000000 + 80008414: 8001f28a .word 0x8001f28a + 80008418: 00000000 .word 0x00000000 + 8000841c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8181818181818181 + 80008420: 0007bc83 ld x25,0(x15) + 80008424: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0x8181818181818181 + 80008428: 0007b583 ld x11,0(x15) + 8000842c: 00878793 addi x15,x15,8 + +0000000080008430 : +Zksed_sm4ed_cg_cp_sbox_b129: + sm4ed x10, x25, x11, 1 # perform operation + 80008430: 70bc8533 sm4ed x10,x25,x11,0x1 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b129, Zksed_sm4ed_cg_cp_sbox_b129_str) + 80008434: 000b3383 ld x7,0(x22) + 80008438: 00a38c63 beq x7,x10,80008450 + 8000843c: 59d0246f jal x8,8000b1d8 + 80008440: 80008430 .word 0x80008430 + 80008444: 00000000 .word 0x00000000 + 80008448: 8001f2c2 .word 0x8001f2c2 + 8000844c: 00000000 .word 0x00000000 + 80008450: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0x8282828282828282 + 80008454: 0007b283 ld x5,0(x15) + 80008458: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8282828282828282 + 8000845c: 0007be83 ld x29,0(x15) + 80008460: 00878793 addi x15,x15,8 + +0000000080008464 : +Zksed_sm4ed_cg_cp_sbox_b130: + sm4ed x11, x5, x29, 0 # perform operation + 80008464: 31d285b3 sm4ed x11,x5,x29,0x0 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b130, Zksed_sm4ed_cg_cp_sbox_b130_str) + 80008468: 000b3383 ld x7,0(x22) + 8000846c: 00b38c63 beq x7,x11,80008484 + 80008470: 5690246f jal x8,8000b1d8 + 80008474: 80008464 .word 0x80008464 + 80008478: 00000000 .word 0x00000000 + 8000847c: 8001f2fa .word 0x8001f2fa + 80008480: 00000000 .word 0x00000000 + 80008484: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8383838383838383 + 80008488: 0007b603 ld x12,0(x15) + 8000848c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0x8383838383838383 + 80008490: 0007bd03 ld x26,0(x15) + 80008494: 00878793 addi x15,x15,8 + +0000000080008498 : +Zksed_sm4ed_cg_cp_sbox_b131: + sm4ed x21, x12, x26, 1 # perform operation + 80008498: 71a60ab3 sm4ed x21,x12,x26,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b131, Zksed_sm4ed_cg_cp_sbox_b131_str) + 8000849c: 000b3383 ld x7,0(x22) + 800084a0: 01538c63 beq x7,x21,800084b8 + 800084a4: 5350246f jal x8,8000b1d8 + 800084a8: 80008498 .word 0x80008498 + 800084ac: 00000000 .word 0x00000000 + 800084b0: 8001f332 .word 0x8001f332 + 800084b4: 00000000 .word 0x00000000 + 800084b8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x8484848484848484 + 800084bc: 0007bc03 ld x24,0(x15) + 800084c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x8484848484848484 + 800084c4: 0007bf03 ld x30,0(x15) + 800084c8: 00878793 addi x15,x15,8 + +00000000800084cc : +Zksed_sm4ed_cg_cp_sbox_b132: + sm4ed x28, x24, x30, 2 # perform operation + 800084cc: b1ec0e33 sm4ed x28,x24,x30,0x2 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b132, Zksed_sm4ed_cg_cp_sbox_b132_str) + 800084d0: 000b3383 ld x7,0(x22) + 800084d4: 01c38c63 beq x7,x28,800084ec + 800084d8: 5010246f jal x8,8000b1d8 + 800084dc: 800084cc .word 0x800084cc + 800084e0: 00000000 .word 0x00000000 + 800084e4: 8001f36a .word 0x8001f36a + 800084e8: 00000000 .word 0x00000000 + 800084ec: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8585858585858585 + 800084f0: 0007b603 ld x12,0(x15) + 800084f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0x8585858585858585 + 800084f8: 0007b983 ld x19,0(x15) + 800084fc: 00878793 addi x15,x15,8 + +0000000080008500 : +Zksed_sm4ed_cg_cp_sbox_b133: + sm4ed x18, x12, x19, 1 # perform operation + 80008500: 71360933 sm4ed x18,x12,x19,0x1 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b133, Zksed_sm4ed_cg_cp_sbox_b133_str) + 80008504: 000b3383 ld x7,0(x22) + 80008508: 01238c63 beq x7,x18,80008520 + 8000850c: 4cd0246f jal x8,8000b1d8 + 80008510: 80008500 .word 0x80008500 + 80008514: 00000000 .word 0x00000000 + 80008518: 8001f3a2 .word 0x8001f3a2 + 8000851c: 00000000 .word 0x00000000 + 80008520: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8686868686868686 + 80008524: 0007bc83 ld x25,0(x15) + 80008528: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x8686868686868686 + 8000852c: 0007bc03 ld x24,0(x15) + 80008530: 00878793 addi x15,x15,8 + +0000000080008534 : +Zksed_sm4ed_cg_cp_sbox_b134: + sm4ed x11, x25, x24, 0 # perform operation + 80008534: 318c85b3 sm4ed x11,x25,x24,0x0 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b134, Zksed_sm4ed_cg_cp_sbox_b134_str) + 80008538: 000b3383 ld x7,0(x22) + 8000853c: 00b38c63 beq x7,x11,80008554 + 80008540: 4990246f jal x8,8000b1d8 + 80008544: 80008534 .word 0x80008534 + 80008548: 00000000 .word 0x00000000 + 8000854c: 8001f3da .word 0x8001f3da + 80008550: 00000000 .word 0x00000000 + 80008554: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0x8787878787878787 + 80008558: 0007b183 ld x3,0(x15) + 8000855c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x8787878787878787 + 80008560: 0007ba83 ld x21,0(x15) + 80008564: 00878793 addi x15,x15,8 + +0000000080008568 : +Zksed_sm4ed_cg_cp_sbox_b135: + sm4ed x13, x3, x21, 2 # perform operation + 80008568: b15186b3 sm4ed x13,x3,x21,0x2 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b135, Zksed_sm4ed_cg_cp_sbox_b135_str) + 8000856c: 000b3383 ld x7,0(x22) + 80008570: 00d38c63 beq x7,x13,80008588 + 80008574: 4650246f jal x8,8000b1d8 + 80008578: 80008568 .word 0x80008568 + 8000857c: 00000000 .word 0x00000000 + 80008580: 8001f412 .word 0x8001f412 + 80008584: 00000000 .word 0x00000000 + 80008588: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x8888888888888888 + 8000858c: 0007b703 ld x14,0(x15) + 80008590: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0x8888888888888888 + 80008594: 0007ba83 ld x21,0(x15) + 80008598: 00878793 addi x15,x15,8 + +000000008000859c : +Zksed_sm4ed_cg_cp_sbox_b136: + sm4ed x6, x14, x21, 2 # perform operation + 8000859c: b1570333 sm4ed x6,x14,x21,0x2 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b136, Zksed_sm4ed_cg_cp_sbox_b136_str) + 800085a0: 000b3383 ld x7,0(x22) + 800085a4: 00638c63 beq x7,x6,800085bc + 800085a8: 4310246f jal x8,8000b1d8 + 800085ac: 8000859c .word 0x8000859c + 800085b0: 00000000 .word 0x00000000 + 800085b4: 8001f44a .word 0x8001f44a + 800085b8: 00000000 .word 0x00000000 + 800085bc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x8989898989898989 + 800085c0: 0007bc83 ld x25,0(x15) + 800085c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0x8989898989898989 + 800085c8: 0007b603 ld x12,0(x15) + 800085cc: 00878793 addi x15,x15,8 + +00000000800085d0 : +Zksed_sm4ed_cg_cp_sbox_b137: + sm4ed x23, x25, x12, 1 # perform operation + 800085d0: 70cc8bb3 sm4ed x23,x25,x12,0x1 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zksed_sm4ed_cg_cp_sbox_b137, Zksed_sm4ed_cg_cp_sbox_b137_str) + 800085d4: 000b3383 ld x7,0(x22) + 800085d8: 01738c63 beq x7,x23,800085f0 + 800085dc: 3fd0246f jal x8,8000b1d8 + 800085e0: 800085d0 .word 0x800085d0 + 800085e4: 00000000 .word 0x00000000 + 800085e8: 8001f482 .word 0x8001f482 + 800085ec: 00000000 .word 0x00000000 + 800085f0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x8a8a8a8a8a8a8a8a + 800085f4: 0007ba83 ld x21,0(x15) + 800085f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x8a8a8a8a8a8a8a8a + 800085fc: 0007bf03 ld x30,0(x15) + 80008600: 00878793 addi x15,x15,8 + +0000000080008604 : +Zksed_sm4ed_cg_cp_sbox_b138: + sm4ed x25, x21, x30, 2 # perform operation + 80008604: b1ea8cb3 sm4ed x25,x21,x30,0x2 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b138, Zksed_sm4ed_cg_cp_sbox_b138_str) + 80008608: 000b3383 ld x7,0(x22) + 8000860c: 01938c63 beq x7,x25,80008624 + 80008610: 3c90246f jal x8,8000b1d8 + 80008614: 80008604 .word 0x80008604 + 80008618: 00000000 .word 0x00000000 + 8000861c: 8001f4ba .word 0x8001f4ba + 80008620: 00000000 .word 0x00000000 + 80008624: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8b8b8b8b8b8b8b8b + 80008628: 0007b603 ld x12,0(x15) + 8000862c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x8b8b8b8b8b8b8b8b + 80008630: 0007bf83 ld x31,0(x15) + 80008634: 00878793 addi x15,x15,8 + +0000000080008638 : +Zksed_sm4ed_cg_cp_sbox_b139: + sm4ed x10, x12, x31, 3 # perform operation + 80008638: f1f60533 sm4ed x10,x12,x31,0x3 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b139, Zksed_sm4ed_cg_cp_sbox_b139_str) + 8000863c: 000b3383 ld x7,0(x22) + 80008640: 00a38c63 beq x7,x10,80008658 + 80008644: 3950246f jal x8,8000b1d8 + 80008648: 80008638 .word 0x80008638 + 8000864c: 00000000 .word 0x00000000 + 80008650: 8001f4f2 .word 0x8001f4f2 + 80008654: 00000000 .word 0x00000000 + 80008658: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0x8c8c8c8c8c8c8c8c + 8000865c: 0007b503 ld x10,0(x15) + 80008660: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0x8c8c8c8c8c8c8c8c + 80008664: 0007b483 ld x9,0(x15) + 80008668: 00878793 addi x15,x15,8 + +000000008000866c : +Zksed_sm4ed_cg_cp_sbox_b140: + sm4ed x16, x10, x9, 2 # perform operation + 8000866c: b0950833 sm4ed x16,x10,x9,0x2 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b140, Zksed_sm4ed_cg_cp_sbox_b140_str) + 80008670: 000b3383 ld x7,0(x22) + 80008674: 01038c63 beq x7,x16,8000868c + 80008678: 3610246f jal x8,8000b1d8 + 8000867c: 8000866c .word 0x8000866c + 80008680: 00000000 .word 0x00000000 + 80008684: 8001f52a .word 0x8001f52a + 80008688: 00000000 .word 0x00000000 + 8000868c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0x8d8d8d8d8d8d8d8d + 80008690: 0007be83 ld x29,0(x15) + 80008694: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0x8d8d8d8d8d8d8d8d + 80008698: 0007b903 ld x18,0(x15) + 8000869c: 00878793 addi x15,x15,8 + +00000000800086a0 : +Zksed_sm4ed_cg_cp_sbox_b141: + sm4ed x14, x29, x18, 1 # perform operation + 800086a0: 712e8733 sm4ed x14,x29,x18,0x1 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b141, Zksed_sm4ed_cg_cp_sbox_b141_str) + 800086a4: 000b3383 ld x7,0(x22) + 800086a8: 00e38c63 beq x7,x14,800086c0 + 800086ac: 32d0246f jal x8,8000b1d8 + 800086b0: 800086a0 .word 0x800086a0 + 800086b4: 00000000 .word 0x00000000 + 800086b8: 8001f562 .word 0x8001f562 + 800086bc: 00000000 .word 0x00000000 + 800086c0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0x8e8e8e8e8e8e8e8e + 800086c4: 0007b203 ld x4,0(x15) + 800086c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x8e8e8e8e8e8e8e8e + 800086cc: 0007bf83 ld x31,0(x15) + 800086d0: 00878793 addi x15,x15,8 + +00000000800086d4 : +Zksed_sm4ed_cg_cp_sbox_b142: + sm4ed x11, x4, x31, 3 # perform operation + 800086d4: f1f205b3 sm4ed x11,x4,x31,0x3 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b142, Zksed_sm4ed_cg_cp_sbox_b142_str) + 800086d8: 000b3383 ld x7,0(x22) + 800086dc: 00b38c63 beq x7,x11,800086f4 + 800086e0: 2f90246f jal x8,8000b1d8 + 800086e4: 800086d4 .word 0x800086d4 + 800086e8: 00000000 .word 0x00000000 + 800086ec: 8001f59a .word 0x8001f59a + 800086f0: 00000000 .word 0x00000000 + 800086f4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0x8f8f8f8f8f8f8f8f + 800086f8: 0007b603 ld x12,0(x15) + 800086fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x8f8f8f8f8f8f8f8f + 80008700: 0007be83 ld x29,0(x15) + 80008704: 00878793 addi x15,x15,8 + +0000000080008708 : +Zksed_sm4ed_cg_cp_sbox_b143: + sm4ed x3, x12, x29, 3 # perform operation + 80008708: f1d601b3 sm4ed x3,x12,x29,0x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b143, Zksed_sm4ed_cg_cp_sbox_b143_str) + 8000870c: 000b3383 ld x7,0(x22) + 80008710: 00338c63 beq x7,x3,80008728 + 80008714: 2c50246f jal x8,8000b1d8 + 80008718: 80008708 .word 0x80008708 + 8000871c: 00000000 .word 0x00000000 + 80008720: 8001f5d2 .word 0x8001f5d2 + 80008724: 00000000 .word 0x00000000 + 80008728: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0x9090909090909090 + 8000872c: 0007b083 ld x1,0(x15) + 80008730: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x9090909090909090 + 80008734: 0007bc83 ld x25,0(x15) + 80008738: 00878793 addi x15,x15,8 + +000000008000873c : +Zksed_sm4ed_cg_cp_sbox_b144: + sm4ed x31, x1, x25, 0 # perform operation + 8000873c: 31908fb3 sm4ed x31,x1,x25,0x0 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b144, Zksed_sm4ed_cg_cp_sbox_b144_str) + 80008740: 000b3383 ld x7,0(x22) + 80008744: 01f38c63 beq x7,x31,8000875c + 80008748: 2910246f jal x8,8000b1d8 + 8000874c: 8000873c .word 0x8000873c + 80008750: 00000000 .word 0x00000000 + 80008754: 8001f60a .word 0x8001f60a + 80008758: 00000000 .word 0x00000000 + 8000875c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x9191919191919191 + 80008760: 0007b703 ld x14,0(x15) + 80008764: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0x9191919191919191 + 80008768: 0007b303 ld x6,0(x15) + 8000876c: 00878793 addi x15,x15,8 + +0000000080008770 : +Zksed_sm4ed_cg_cp_sbox_b145: + sm4ed x31, x14, x6, 2 # perform operation + 80008770: b0670fb3 sm4ed x31,x14,x6,0x2 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b145, Zksed_sm4ed_cg_cp_sbox_b145_str) + 80008774: 000b3383 ld x7,0(x22) + 80008778: 01f38c63 beq x7,x31,80008790 + 8000877c: 25d0246f jal x8,8000b1d8 + 80008780: 80008770 .word 0x80008770 + 80008784: 00000000 .word 0x00000000 + 80008788: 8001f642 .word 0x8001f642 + 8000878c: 00000000 .word 0x00000000 + 80008790: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0x9292929292929292 + 80008794: 0007b703 ld x14,0(x15) + 80008798: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0x9292929292929292 + 8000879c: 0007b283 ld x5,0(x15) + 800087a0: 00878793 addi x15,x15,8 + +00000000800087a4 : +Zksed_sm4ed_cg_cp_sbox_b146: + sm4ed x2, x14, x5, 1 # perform operation + 800087a4: 70570133 sm4ed x2,x14,x5,0x1 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b146, Zksed_sm4ed_cg_cp_sbox_b146_str) + 800087a8: 000b3383 ld x7,0(x22) + 800087ac: 00238c63 beq x7,x2,800087c4 + 800087b0: 2290246f jal x8,8000b1d8 + 800087b4: 800087a4 .word 0x800087a4 + 800087b8: 00000000 .word 0x00000000 + 800087bc: 8001f67a .word 0x8001f67a + 800087c0: 00000000 .word 0x00000000 + 800087c4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0x9393939393939393 + 800087c8: 0007b903 ld x18,0(x15) + 800087cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0x9393939393939393 + 800087d0: 0007bf83 ld x31,0(x15) + 800087d4: 00878793 addi x15,x15,8 + +00000000800087d8 : +Zksed_sm4ed_cg_cp_sbox_b147: + sm4ed x28, x18, x31, 3 # perform operation + 800087d8: f1f90e33 sm4ed x28,x18,x31,0x3 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b147, Zksed_sm4ed_cg_cp_sbox_b147_str) + 800087dc: 000b3383 ld x7,0(x22) + 800087e0: 01c38c63 beq x7,x28,800087f8 + 800087e4: 1f50246f jal x8,8000b1d8 + 800087e8: 800087d8 .word 0x800087d8 + 800087ec: 00000000 .word 0x00000000 + 800087f0: 8001f6b2 .word 0x8001f6b2 + 800087f4: 00000000 .word 0x00000000 + 800087f8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0x9494949494949494 + 800087fc: 0007bc83 ld x25,0(x15) + 80008800: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x9494949494949494 + 80008804: 0007b703 ld x14,0(x15) + 80008808: 00878793 addi x15,x15,8 + +000000008000880c : +Zksed_sm4ed_cg_cp_sbox_b148: + sm4ed x16, x25, x14, 3 # perform operation + 8000880c: f0ec8833 sm4ed x16,x25,x14,0x3 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b148, Zksed_sm4ed_cg_cp_sbox_b148_str) + 80008810: 000b3383 ld x7,0(x22) + 80008814: 01038c63 beq x7,x16,8000882c + 80008818: 1c10246f jal x8,8000b1d8 + 8000881c: 8000880c .word 0x8000880c + 80008820: 00000000 .word 0x00000000 + 80008824: 8001f6ea .word 0x8001f6ea + 80008828: 00000000 .word 0x00000000 + 8000882c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0x9595959595959595 + 80008830: 0007bf83 ld x31,0(x15) + 80008834: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0x9595959595959595 + 80008838: 0007bc83 ld x25,0(x15) + 8000883c: 00878793 addi x15,x15,8 + +0000000080008840 : +Zksed_sm4ed_cg_cp_sbox_b149: + sm4ed x20, x31, x25, 3 # perform operation + 80008840: f19f8a33 sm4ed x20,x31,x25,0x3 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b149, Zksed_sm4ed_cg_cp_sbox_b149_str) + 80008844: 000b3383 ld x7,0(x22) + 80008848: 01438c63 beq x7,x20,80008860 + 8000884c: 18d0246f jal x8,8000b1d8 + 80008850: 80008840 .word 0x80008840 + 80008854: 00000000 .word 0x00000000 + 80008858: 8001f722 .word 0x8001f722 + 8000885c: 00000000 .word 0x00000000 + 80008860: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0x9696969696969696 + 80008864: 0007bf03 ld x30,0(x15) + 80008868: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x9696969696969696 + 8000886c: 0007b183 ld x3,0(x15) + 80008870: 00878793 addi x15,x15,8 + +0000000080008874 : +Zksed_sm4ed_cg_cp_sbox_b150: + sm4ed x28, x30, x3, 2 # perform operation + 80008874: b03f0e33 sm4ed x28,x30,x3,0x2 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b150, Zksed_sm4ed_cg_cp_sbox_b150_str) + 80008878: 000b3383 ld x7,0(x22) + 8000887c: 01c38c63 beq x7,x28,80008894 + 80008880: 1590246f jal x8,8000b1d8 + 80008884: 80008874 .word 0x80008874 + 80008888: 00000000 .word 0x00000000 + 8000888c: 8001f75a .word 0x8001f75a + 80008890: 00000000 .word 0x00000000 + 80008894: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0x9797979797979797 + 80008898: 0007b583 ld x11,0(x15) + 8000889c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0x9797979797979797 + 800088a0: 0007bd83 ld x27,0(x15) + 800088a4: 00878793 addi x15,x15,8 + +00000000800088a8 : +Zksed_sm4ed_cg_cp_sbox_b151: + sm4ed x17, x11, x27, 2 # perform operation + 800088a8: b1b588b3 sm4ed x17,x11,x27,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b151, Zksed_sm4ed_cg_cp_sbox_b151_str) + 800088ac: 000b3383 ld x7,0(x22) + 800088b0: 01138c63 beq x7,x17,800088c8 + 800088b4: 1250246f jal x8,8000b1d8 + 800088b8: 800088a8 .word 0x800088a8 + 800088bc: 00000000 .word 0x00000000 + 800088c0: 8001f792 .word 0x8001f792 + 800088c4: 00000000 .word 0x00000000 + 800088c8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x9898989898989898 + 800088cc: 0007bd83 ld x27,0(x15) + 800088d0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x9898989898989898 + 800088d4: 0007b203 ld x4,0(x15) + 800088d8: 00878793 addi x15,x15,8 + +00000000800088dc : +Zksed_sm4ed_cg_cp_sbox_b152: + sm4ed x1, x27, x4, 3 # perform operation + 800088dc: f04d80b3 sm4ed x1,x27,x4,0x3 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b152, Zksed_sm4ed_cg_cp_sbox_b152_str) + 800088e0: 000b3383 ld x7,0(x22) + 800088e4: 00138c63 beq x7,x1,800088fc + 800088e8: 0f10246f jal x8,8000b1d8 + 800088ec: 800088dc .word 0x800088dc + 800088f0: 00000000 .word 0x00000000 + 800088f4: 8001f7ca .word 0x8001f7ca + 800088f8: 00000000 .word 0x00000000 + 800088fc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0x9999999999999999 + 80008900: 0007ba83 ld x21,0(x15) + 80008904: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0x9999999999999999 + 80008908: 0007bf03 ld x30,0(x15) + 8000890c: 00878793 addi x15,x15,8 + +0000000080008910 : +Zksed_sm4ed_cg_cp_sbox_b153: + sm4ed x25, x21, x30, 1 # perform operation + 80008910: 71ea8cb3 sm4ed x25,x21,x30,0x1 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b153, Zksed_sm4ed_cg_cp_sbox_b153_str) + 80008914: 000b3383 ld x7,0(x22) + 80008918: 01938c63 beq x7,x25,80008930 + 8000891c: 0bd0246f jal x8,8000b1d8 + 80008920: 80008910 .word 0x80008910 + 80008924: 00000000 .word 0x00000000 + 80008928: 8001f802 .word 0x8001f802 + 8000892c: 00000000 .word 0x00000000 + 80008930: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0x9a9a9a9a9a9a9a9a + 80008934: 0007bc03 ld x24,0(x15) + 80008938: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0x9a9a9a9a9a9a9a9a + 8000893c: 0007be03 ld x28,0(x15) + 80008940: 00878793 addi x15,x15,8 + +0000000080008944 : +Zksed_sm4ed_cg_cp_sbox_b154: + sm4ed x18, x24, x28, 0 # perform operation + 80008944: 31cc0933 sm4ed x18,x24,x28,0x0 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b154, Zksed_sm4ed_cg_cp_sbox_b154_str) + 80008948: 000b3383 ld x7,0(x22) + 8000894c: 01238c63 beq x7,x18,80008964 + 80008950: 0890246f jal x8,8000b1d8 + 80008954: 80008944 .word 0x80008944 + 80008958: 00000000 .word 0x00000000 + 8000895c: 8001f83a .word 0x8001f83a + 80008960: 00000000 .word 0x00000000 + 80008964: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x9b9b9b9b9b9b9b9b + 80008968: 0007b103 ld x2,0(x15) + 8000896c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0x9b9b9b9b9b9b9b9b + 80008970: 0007bc03 ld x24,0(x15) + 80008974: 00878793 addi x15,x15,8 + +0000000080008978 : +Zksed_sm4ed_cg_cp_sbox_b155: + sm4ed x18, x2, x24, 0 # perform operation + 80008978: 31810933 sm4ed x18,x2,x24,0x0 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b155, Zksed_sm4ed_cg_cp_sbox_b155_str) + 8000897c: 000b3383 ld x7,0(x22) + 80008980: 01238c63 beq x7,x18,80008998 + 80008984: 0550246f jal x8,8000b1d8 + 80008988: 80008978 .word 0x80008978 + 8000898c: 00000000 .word 0x00000000 + 80008990: 8001f872 .word 0x8001f872 + 80008994: 00000000 .word 0x00000000 + 80008998: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x9c9c9c9c9c9c9c9c + 8000899c: 0007b103 ld x2,0(x15) + 800089a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0x9c9c9c9c9c9c9c9c + 800089a4: 0007b183 ld x3,0(x15) + 800089a8: 00878793 addi x15,x15,8 + +00000000800089ac : +Zksed_sm4ed_cg_cp_sbox_b156: + sm4ed x27, x2, x3, 2 # perform operation + 800089ac: b0310db3 sm4ed x27,x2,x3,0x2 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b156, Zksed_sm4ed_cg_cp_sbox_b156_str) + 800089b0: 000b3383 ld x7,0(x22) + 800089b4: 01b38c63 beq x7,x27,800089cc + 800089b8: 0210246f jal x8,8000b1d8 + 800089bc: 800089ac .word 0x800089ac + 800089c0: 00000000 .word 0x00000000 + 800089c4: 8001f8aa .word 0x8001f8aa + 800089c8: 00000000 .word 0x00000000 + 800089cc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0x9d9d9d9d9d9d9d9d + 800089d0: 0007bd03 ld x26,0(x15) + 800089d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0x9d9d9d9d9d9d9d9d + 800089d8: 0007b703 ld x14,0(x15) + 800089dc: 00878793 addi x15,x15,8 + +00000000800089e0 : +Zksed_sm4ed_cg_cp_sbox_b157: + sm4ed x9, x26, x14, 2 # perform operation + 800089e0: b0ed04b3 sm4ed x9,x26,x14,0x2 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b157, Zksed_sm4ed_cg_cp_sbox_b157_str) + 800089e4: 000b3383 ld x7,0(x22) + 800089e8: 00938c63 beq x7,x9,80008a00 + 800089ec: 7ec0246f jal x8,8000b1d8 + 800089f0: 800089e0 .word 0x800089e0 + 800089f4: 00000000 .word 0x00000000 + 800089f8: 8001f8e2 .word 0x8001f8e2 + 800089fc: 00000000 .word 0x00000000 + 80008a00: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0x9e9e9e9e9e9e9e9e + 80008a04: 0007bd83 ld x27,0(x15) + 80008a08: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0x9e9e9e9e9e9e9e9e + 80008a0c: 0007b203 ld x4,0(x15) + 80008a10: 00878793 addi x15,x15,8 + +0000000080008a14 : +Zksed_sm4ed_cg_cp_sbox_b158: + sm4ed x6, x27, x4, 3 # perform operation + 80008a14: f04d8333 sm4ed x6,x27,x4,0x3 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b158, Zksed_sm4ed_cg_cp_sbox_b158_str) + 80008a18: 000b3383 ld x7,0(x22) + 80008a1c: 00638c63 beq x7,x6,80008a34 + 80008a20: 7b80246f jal x8,8000b1d8 + 80008a24: 80008a14 .word 0x80008a14 + 80008a28: 00000000 .word 0x00000000 + 80008a2c: 8001f91a .word 0x8001f91a + 80008a30: 00000000 .word 0x00000000 + 80008a34: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0x9f9f9f9f9f9f9f9f + 80008a38: 0007b103 ld x2,0(x15) + 80008a3c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0x9f9f9f9f9f9f9f9f + 80008a40: 0007be83 ld x29,0(x15) + 80008a44: 00878793 addi x15,x15,8 + +0000000080008a48 : +Zksed_sm4ed_cg_cp_sbox_b159: + sm4ed x16, x2, x29, 1 # perform operation + 80008a48: 71d10833 sm4ed x16,x2,x29,0x1 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b159, Zksed_sm4ed_cg_cp_sbox_b159_str) + 80008a4c: 000b3383 ld x7,0(x22) + 80008a50: 01038c63 beq x7,x16,80008a68 + 80008a54: 7840246f jal x8,8000b1d8 + 80008a58: 80008a48 .word 0x80008a48 + 80008a5c: 00000000 .word 0x00000000 + 80008a60: 8001f952 .word 0x8001f952 + 80008a64: 00000000 .word 0x00000000 + 80008a68: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xa0a0a0a0a0a0a0a0 + 80008a6c: 0007be83 ld x29,0(x15) + 80008a70: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xa0a0a0a0a0a0a0a0 + 80008a74: 0007b903 ld x18,0(x15) + 80008a78: 00878793 addi x15,x15,8 + +0000000080008a7c : +Zksed_sm4ed_cg_cp_sbox_b160: + sm4ed x27, x29, x18, 2 # perform operation + 80008a7c: b12e8db3 sm4ed x27,x29,x18,0x2 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b160, Zksed_sm4ed_cg_cp_sbox_b160_str) + 80008a80: 000b3383 ld x7,0(x22) + 80008a84: 01b38c63 beq x7,x27,80008a9c + 80008a88: 7500246f jal x8,8000b1d8 + 80008a8c: 80008a7c .word 0x80008a7c + 80008a90: 00000000 .word 0x00000000 + 80008a94: 8001f98a .word 0x8001f98a + 80008a98: 00000000 .word 0x00000000 + 80008a9c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xa1a1a1a1a1a1a1a1 + 80008aa0: 0007bf83 ld x31,0(x15) + 80008aa4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xa1a1a1a1a1a1a1a1 + 80008aa8: 0007b903 ld x18,0(x15) + 80008aac: 00878793 addi x15,x15,8 + +0000000080008ab0 : +Zksed_sm4ed_cg_cp_sbox_b161: + sm4ed x25, x31, x18, 1 # perform operation + 80008ab0: 712f8cb3 sm4ed x25,x31,x18,0x1 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b161, Zksed_sm4ed_cg_cp_sbox_b161_str) + 80008ab4: 000b3383 ld x7,0(x22) + 80008ab8: 01938c63 beq x7,x25,80008ad0 + 80008abc: 71c0246f jal x8,8000b1d8 + 80008ac0: 80008ab0 .word 0x80008ab0 + 80008ac4: 00000000 .word 0x00000000 + 80008ac8: 8001f9c2 .word 0x8001f9c2 + 80008acc: 00000000 .word 0x00000000 + 80008ad0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xa2a2a2a2a2a2a2a2 + 80008ad4: 0007b903 ld x18,0(x15) + 80008ad8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xa2a2a2a2a2a2a2a2 + 80008adc: 0007b483 ld x9,0(x15) + 80008ae0: 00878793 addi x15,x15,8 + +0000000080008ae4 : +Zksed_sm4ed_cg_cp_sbox_b162: + sm4ed x19, x18, x9, 1 # perform operation + 80008ae4: 709909b3 sm4ed x19,x18,x9,0x1 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b162, Zksed_sm4ed_cg_cp_sbox_b162_str) + 80008ae8: 000b3383 ld x7,0(x22) + 80008aec: 01338c63 beq x7,x19,80008b04 + 80008af0: 6e80246f jal x8,8000b1d8 + 80008af4: 80008ae4 .word 0x80008ae4 + 80008af8: 00000000 .word 0x00000000 + 80008afc: 8001f9fa .word 0x8001f9fa + 80008b00: 00000000 .word 0x00000000 + 80008b04: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xa3a3a3a3a3a3a3a3 + 80008b08: 0007b203 ld x4,0(x15) + 80008b0c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xa3a3a3a3a3a3a3a3 + 80008b10: 0007bb83 ld x23,0(x15) + 80008b14: 00878793 addi x15,x15,8 + +0000000080008b18 : +Zksed_sm4ed_cg_cp_sbox_b163: + sm4ed x21, x4, x23, 1 # perform operation + 80008b18: 71720ab3 sm4ed x21,x4,x23,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b163, Zksed_sm4ed_cg_cp_sbox_b163_str) + 80008b1c: 000b3383 ld x7,0(x22) + 80008b20: 01538c63 beq x7,x21,80008b38 + 80008b24: 6b40246f jal x8,8000b1d8 + 80008b28: 80008b18 .word 0x80008b18 + 80008b2c: 00000000 .word 0x00000000 + 80008b30: 8001fa32 .word 0x8001fa32 + 80008b34: 00000000 .word 0x00000000 + 80008b38: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xa4a4a4a4a4a4a4a4 + 80008b3c: 0007b803 ld x16,0(x15) + 80008b40: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xa4a4a4a4a4a4a4a4 + 80008b44: 0007b103 ld x2,0(x15) + 80008b48: 00878793 addi x15,x15,8 + +0000000080008b4c : +Zksed_sm4ed_cg_cp_sbox_b164: + sm4ed x20, x16, x2, 1 # perform operation + 80008b4c: 70280a33 sm4ed x20,x16,x2,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b164, Zksed_sm4ed_cg_cp_sbox_b164_str) + 80008b50: 000b3383 ld x7,0(x22) + 80008b54: 01438c63 beq x7,x20,80008b6c + 80008b58: 6800246f jal x8,8000b1d8 + 80008b5c: 80008b4c .word 0x80008b4c + 80008b60: 00000000 .word 0x00000000 + 80008b64: 8001fa6a .word 0x8001fa6a + 80008b68: 00000000 .word 0x00000000 + 80008b6c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xa5a5a5a5a5a5a5a5 + 80008b70: 0007b083 ld x1,0(x15) + 80008b74: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xa5a5a5a5a5a5a5a5 + 80008b78: 0007b583 ld x11,0(x15) + 80008b7c: 00878793 addi x15,x15,8 + +0000000080008b80 : +Zksed_sm4ed_cg_cp_sbox_b165: + sm4ed x27, x1, x11, 3 # perform operation + 80008b80: f0b08db3 sm4ed x27,x1,x11,0x3 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b165, Zksed_sm4ed_cg_cp_sbox_b165_str) + 80008b84: 000b3383 ld x7,0(x22) + 80008b88: 01b38c63 beq x7,x27,80008ba0 + 80008b8c: 64c0246f jal x8,8000b1d8 + 80008b90: 80008b80 .word 0x80008b80 + 80008b94: 00000000 .word 0x00000000 + 80008b98: 8001faa2 .word 0x8001faa2 + 80008b9c: 00000000 .word 0x00000000 + 80008ba0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xa6a6a6a6a6a6a6a6 + 80008ba4: 0007bd83 ld x27,0(x15) + 80008ba8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xa6a6a6a6a6a6a6a6 + 80008bac: 0007bf03 ld x30,0(x15) + 80008bb0: 00878793 addi x15,x15,8 + +0000000080008bb4 : +Zksed_sm4ed_cg_cp_sbox_b166: + sm4ed x6, x27, x30, 1 # perform operation + 80008bb4: 71ed8333 sm4ed x6,x27,x30,0x1 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b166, Zksed_sm4ed_cg_cp_sbox_b166_str) + 80008bb8: 000b3383 ld x7,0(x22) + 80008bbc: 00638c63 beq x7,x6,80008bd4 + 80008bc0: 6180246f jal x8,8000b1d8 + 80008bc4: 80008bb4 .word 0x80008bb4 + 80008bc8: 00000000 .word 0x00000000 + 80008bcc: 8001fada .word 0x8001fada + 80008bd0: 00000000 .word 0x00000000 + 80008bd4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xa7a7a7a7a7a7a7a7 + 80008bd8: 0007b583 ld x11,0(x15) + 80008bdc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xa7a7a7a7a7a7a7a7 + 80008be0: 0007b883 ld x17,0(x15) + 80008be4: 00878793 addi x15,x15,8 + +0000000080008be8 : +Zksed_sm4ed_cg_cp_sbox_b167: + sm4ed x3, x11, x17, 3 # perform operation + 80008be8: f11581b3 sm4ed x3,x11,x17,0x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b167, Zksed_sm4ed_cg_cp_sbox_b167_str) + 80008bec: 000b3383 ld x7,0(x22) + 80008bf0: 00338c63 beq x7,x3,80008c08 + 80008bf4: 5e40246f jal x8,8000b1d8 + 80008bf8: 80008be8 .word 0x80008be8 + 80008bfc: 00000000 .word 0x00000000 + 80008c00: 8001fb12 .word 0x8001fb12 + 80008c04: 00000000 .word 0x00000000 + 80008c08: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xa8a8a8a8a8a8a8a8 + 80008c0c: 0007ba03 ld x20,0(x15) + 80008c10: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xa8a8a8a8a8a8a8a8 + 80008c14: 0007bb83 ld x23,0(x15) + 80008c18: 00878793 addi x15,x15,8 + +0000000080008c1c : +Zksed_sm4ed_cg_cp_sbox_b168: + sm4ed x21, x20, x23, 3 # perform operation + 80008c1c: f17a0ab3 sm4ed x21,x20,x23,0x3 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b168, Zksed_sm4ed_cg_cp_sbox_b168_str) + 80008c20: 000b3383 ld x7,0(x22) + 80008c24: 01538c63 beq x7,x21,80008c3c + 80008c28: 5b00246f jal x8,8000b1d8 + 80008c2c: 80008c1c .word 0x80008c1c + 80008c30: 00000000 .word 0x00000000 + 80008c34: 8001fb4a .word 0x8001fb4a + 80008c38: 00000000 .word 0x00000000 + 80008c3c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xa9a9a9a9a9a9a9a9 + 80008c40: 0007b883 ld x17,0(x15) + 80008c44: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xa9a9a9a9a9a9a9a9 + 80008c48: 0007bd03 ld x26,0(x15) + 80008c4c: 00878793 addi x15,x15,8 + +0000000080008c50 : +Zksed_sm4ed_cg_cp_sbox_b169: + sm4ed x1, x17, x26, 3 # perform operation + 80008c50: f1a880b3 sm4ed x1,x17,x26,0x3 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b169, Zksed_sm4ed_cg_cp_sbox_b169_str) + 80008c54: 000b3383 ld x7,0(x22) + 80008c58: 00138c63 beq x7,x1,80008c70 + 80008c5c: 57c0246f jal x8,8000b1d8 + 80008c60: 80008c50 .word 0x80008c50 + 80008c64: 00000000 .word 0x00000000 + 80008c68: 8001fb82 .word 0x8001fb82 + 80008c6c: 00000000 .word 0x00000000 + 80008c70: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80008c74: 0007bf83 ld x31,0(x15) + 80008c78: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 80008c7c: 0007ba03 ld x20,0(x15) + 80008c80: 00878793 addi x15,x15,8 + +0000000080008c84 : +Zksed_sm4ed_cg_cp_sbox_b170: + sm4ed x19, x31, x20, 0 # perform operation + 80008c84: 314f89b3 sm4ed x19,x31,x20,0x0 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b170, Zksed_sm4ed_cg_cp_sbox_b170_str) + 80008c88: 000b3383 ld x7,0(x22) + 80008c8c: 01338c63 beq x7,x19,80008ca4 + 80008c90: 5480246f jal x8,8000b1d8 + 80008c94: 80008c84 .word 0x80008c84 + 80008c98: 00000000 .word 0x00000000 + 80008c9c: 8001fbba .word 0x8001fbba + 80008ca0: 00000000 .word 0x00000000 + 80008ca4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xabababababababab + 80008ca8: 0007b183 ld x3,0(x15) + 80008cac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xabababababababab + 80008cb0: 0007ba03 ld x20,0(x15) + 80008cb4: 00878793 addi x15,x15,8 + +0000000080008cb8 : +Zksed_sm4ed_cg_cp_sbox_b171: + sm4ed x6, x3, x20, 3 # perform operation + 80008cb8: f1418333 sm4ed x6,x3,x20,0x3 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b171, Zksed_sm4ed_cg_cp_sbox_b171_str) + 80008cbc: 000b3383 ld x7,0(x22) + 80008cc0: 00638c63 beq x7,x6,80008cd8 + 80008cc4: 5140246f jal x8,8000b1d8 + 80008cc8: 80008cb8 .word 0x80008cb8 + 80008ccc: 00000000 .word 0x00000000 + 80008cd0: 8001fbf2 .word 0x8001fbf2 + 80008cd4: 00000000 .word 0x00000000 + 80008cd8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xacacacacacacacac + 80008cdc: 0007ba83 ld x21,0(x15) + 80008ce0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xacacacacacacacac + 80008ce4: 0007b603 ld x12,0(x15) + 80008ce8: 00878793 addi x15,x15,8 + +0000000080008cec : +Zksed_sm4ed_cg_cp_sbox_b172: + sm4ed x23, x21, x12, 1 # perform operation + 80008cec: 70ca8bb3 sm4ed x23,x21,x12,0x1 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zksed_sm4ed_cg_cp_sbox_b172, Zksed_sm4ed_cg_cp_sbox_b172_str) + 80008cf0: 000b3383 ld x7,0(x22) + 80008cf4: 01738c63 beq x7,x23,80008d0c + 80008cf8: 4e00246f jal x8,8000b1d8 + 80008cfc: 80008cec .word 0x80008cec + 80008d00: 00000000 .word 0x00000000 + 80008d04: 8001fc2a .word 0x8001fc2a + 80008d08: 00000000 .word 0x00000000 + 80008d0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xadadadadadadadad + 80008d10: 0007be03 ld x28,0(x15) + 80008d14: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xadadadadadadadad + 80008d18: 0007b903 ld x18,0(x15) + 80008d1c: 00878793 addi x15,x15,8 + +0000000080008d20 : +Zksed_sm4ed_cg_cp_sbox_b173: + sm4ed x10, x28, x18, 1 # perform operation + 80008d20: 712e0533 sm4ed x10,x28,x18,0x1 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b173, Zksed_sm4ed_cg_cp_sbox_b173_str) + 80008d24: 000b3383 ld x7,0(x22) + 80008d28: 00a38c63 beq x7,x10,80008d40 + 80008d2c: 4ac0246f jal x8,8000b1d8 + 80008d30: 80008d20 .word 0x80008d20 + 80008d34: 00000000 .word 0x00000000 + 80008d38: 8001fc62 .word 0x8001fc62 + 80008d3c: 00000000 .word 0x00000000 + 80008d40: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xaeaeaeaeaeaeaeae + 80008d44: 0007bd83 ld x27,0(x15) + 80008d48: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xaeaeaeaeaeaeaeae + 80008d4c: 0007b903 ld x18,0(x15) + 80008d50: 00878793 addi x15,x15,8 + +0000000080008d54 : +Zksed_sm4ed_cg_cp_sbox_b174: + sm4ed x12, x27, x18, 0 # perform operation + 80008d54: 312d8633 sm4ed x12,x27,x18,0x0 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b174, Zksed_sm4ed_cg_cp_sbox_b174_str) + 80008d58: 000b3383 ld x7,0(x22) + 80008d5c: 00c38c63 beq x7,x12,80008d74 + 80008d60: 4780246f jal x8,8000b1d8 + 80008d64: 80008d54 .word 0x80008d54 + 80008d68: 00000000 .word 0x00000000 + 80008d6c: 8001fc9a .word 0x8001fc9a + 80008d70: 00000000 .word 0x00000000 + 80008d74: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xafafafafafafafaf + 80008d78: 0007b803 ld x16,0(x15) + 80008d7c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xafafafafafafafaf + 80008d80: 0007b583 ld x11,0(x15) + 80008d84: 00878793 addi x15,x15,8 + +0000000080008d88 : +Zksed_sm4ed_cg_cp_sbox_b175: + sm4ed x17, x16, x11, 2 # perform operation + 80008d88: b0b808b3 sm4ed x17,x16,x11,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b175, Zksed_sm4ed_cg_cp_sbox_b175_str) + 80008d8c: 000b3383 ld x7,0(x22) + 80008d90: 01138c63 beq x7,x17,80008da8 + 80008d94: 4440246f jal x8,8000b1d8 + 80008d98: 80008d88 .word 0x80008d88 + 80008d9c: 00000000 .word 0x00000000 + 80008da0: 8001fcd2 .word 0x8001fcd2 + 80008da4: 00000000 .word 0x00000000 + 80008da8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xb0b0b0b0b0b0b0b0 + 80008dac: 0007b603 ld x12,0(x15) + 80008db0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xb0b0b0b0b0b0b0b0 + 80008db4: 0007b103 ld x2,0(x15) + 80008db8: 00878793 addi x15,x15,8 + +0000000080008dbc : +Zksed_sm4ed_cg_cp_sbox_b176: + sm4ed x14, x12, x2, 2 # perform operation + 80008dbc: b0260733 sm4ed x14,x12,x2,0x2 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b176, Zksed_sm4ed_cg_cp_sbox_b176_str) + 80008dc0: 000b3383 ld x7,0(x22) + 80008dc4: 00e38c63 beq x7,x14,80008ddc + 80008dc8: 4100246f jal x8,8000b1d8 + 80008dcc: 80008dbc .word 0x80008dbc + 80008dd0: 00000000 .word 0x00000000 + 80008dd4: 8001fd0a .word 0x8001fd0a + 80008dd8: 00000000 .word 0x00000000 + 80008ddc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xb1b1b1b1b1b1b1b1 + 80008de0: 0007b703 ld x14,0(x15) + 80008de4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xb1b1b1b1b1b1b1b1 + 80008de8: 0007bb83 ld x23,0(x15) + 80008dec: 00878793 addi x15,x15,8 + +0000000080008df0 : +Zksed_sm4ed_cg_cp_sbox_b177: + sm4ed x21, x14, x23, 1 # perform operation + 80008df0: 71770ab3 sm4ed x21,x14,x23,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b177, Zksed_sm4ed_cg_cp_sbox_b177_str) + 80008df4: 000b3383 ld x7,0(x22) + 80008df8: 01538c63 beq x7,x21,80008e10 + 80008dfc: 3dc0246f jal x8,8000b1d8 + 80008e00: 80008df0 .word 0x80008df0 + 80008e04: 00000000 .word 0x00000000 + 80008e08: 8001fd42 .word 0x8001fd42 + 80008e0c: 00000000 .word 0x00000000 + 80008e10: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xb2b2b2b2b2b2b2b2 + 80008e14: 0007bd03 ld x26,0(x15) + 80008e18: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xb2b2b2b2b2b2b2b2 + 80008e1c: 0007b483 ld x9,0(x15) + 80008e20: 00878793 addi x15,x15,8 + +0000000080008e24 : +Zksed_sm4ed_cg_cp_sbox_b178: + sm4ed x11, x26, x9, 0 # perform operation + 80008e24: 309d05b3 sm4ed x11,x26,x9,0x0 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b178, Zksed_sm4ed_cg_cp_sbox_b178_str) + 80008e28: 000b3383 ld x7,0(x22) + 80008e2c: 00b38c63 beq x7,x11,80008e44 + 80008e30: 3a80246f jal x8,8000b1d8 + 80008e34: 80008e24 .word 0x80008e24 + 80008e38: 00000000 .word 0x00000000 + 80008e3c: 8001fd7a .word 0x8001fd7a + 80008e40: 00000000 .word 0x00000000 + 80008e44: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xb3b3b3b3b3b3b3b3 + 80008e48: 0007b683 ld x13,0(x15) + 80008e4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs2: x20 = 0xb3b3b3b3b3b3b3b3 + 80008e50: 0007ba03 ld x20,0(x15) + 80008e54: 00878793 addi x15,x15,8 + +0000000080008e58 : +Zksed_sm4ed_cg_cp_sbox_b179: + sm4ed x14, x13, x20, 3 # perform operation + 80008e58: f1468733 sm4ed x14,x13,x20,0x3 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b179, Zksed_sm4ed_cg_cp_sbox_b179_str) + 80008e5c: 000b3383 ld x7,0(x22) + 80008e60: 00e38c63 beq x7,x14,80008e78 + 80008e64: 3740246f jal x8,8000b1d8 + 80008e68: 80008e58 .word 0x80008e58 + 80008e6c: 00000000 .word 0x00000000 + 80008e70: 8001fdb2 .word 0x8001fdb2 + 80008e74: 00000000 .word 0x00000000 + 80008e78: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xb4b4b4b4b4b4b4b4 + 80008e7c: 0007b203 ld x4,0(x15) + 80008e80: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xb4b4b4b4b4b4b4b4 + 80008e84: 0007be83 ld x29,0(x15) + 80008e88: 00878793 addi x15,x15,8 + +0000000080008e8c : +Zksed_sm4ed_cg_cp_sbox_b180: + sm4ed x11, x4, x29, 3 # perform operation + 80008e8c: f1d205b3 sm4ed x11,x4,x29,0x3 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b180, Zksed_sm4ed_cg_cp_sbox_b180_str) + 80008e90: 000b3383 ld x7,0(x22) + 80008e94: 00b38c63 beq x7,x11,80008eac + 80008e98: 3400246f jal x8,8000b1d8 + 80008e9c: 80008e8c .word 0x80008e8c + 80008ea0: 00000000 .word 0x00000000 + 80008ea4: 8001fdea .word 0x8001fdea + 80008ea8: 00000000 .word 0x00000000 + 80008eac: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xb5b5b5b5b5b5b5b5 + 80008eb0: 0007b083 ld x1,0(x15) + 80008eb4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xb5b5b5b5b5b5b5b5 + 80008eb8: 0007b603 ld x12,0(x15) + 80008ebc: 00878793 addi x15,x15,8 + +0000000080008ec0 : +Zksed_sm4ed_cg_cp_sbox_b181: + sm4ed x30, x1, x12, 2 # perform operation + 80008ec0: b0c08f33 sm4ed x30,x1,x12,0x2 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b181, Zksed_sm4ed_cg_cp_sbox_b181_str) + 80008ec4: 000b3383 ld x7,0(x22) + 80008ec8: 01e38c63 beq x7,x30,80008ee0 + 80008ecc: 30c0246f jal x8,8000b1d8 + 80008ed0: 80008ec0 .word 0x80008ec0 + 80008ed4: 00000000 .word 0x00000000 + 80008ed8: 8001fe22 .word 0x8001fe22 + 80008edc: 00000000 .word 0x00000000 + 80008ee0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xb6b6b6b6b6b6b6b6 + 80008ee4: 0007b903 ld x18,0(x15) + 80008ee8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xb6b6b6b6b6b6b6b6 + 80008eec: 0007b603 ld x12,0(x15) + 80008ef0: 00878793 addi x15,x15,8 + +0000000080008ef4 : +Zksed_sm4ed_cg_cp_sbox_b182: + sm4ed x24, x18, x12, 1 # perform operation + 80008ef4: 70c90c33 sm4ed x24,x18,x12,0x1 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b182, Zksed_sm4ed_cg_cp_sbox_b182_str) + 80008ef8: 000b3383 ld x7,0(x22) + 80008efc: 01838c63 beq x7,x24,80008f14 + 80008f00: 2d80246f jal x8,8000b1d8 + 80008f04: 80008ef4 .word 0x80008ef4 + 80008f08: 00000000 .word 0x00000000 + 80008f0c: 8001fe5a .word 0x8001fe5a + 80008f10: 00000000 .word 0x00000000 + 80008f14: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xb7b7b7b7b7b7b7b7 + 80008f18: 0007be03 ld x28,0(x15) + 80008f1c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xb7b7b7b7b7b7b7b7 + 80008f20: 0007b983 ld x19,0(x15) + 80008f24: 00878793 addi x15,x15,8 + +0000000080008f28 : +Zksed_sm4ed_cg_cp_sbox_b183: + sm4ed x29, x28, x19, 1 # perform operation + 80008f28: 713e0eb3 sm4ed x29,x28,x19,0x1 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b183, Zksed_sm4ed_cg_cp_sbox_b183_str) + 80008f2c: 000b3383 ld x7,0(x22) + 80008f30: 01d38c63 beq x7,x29,80008f48 + 80008f34: 2a40246f jal x8,8000b1d8 + 80008f38: 80008f28 .word 0x80008f28 + 80008f3c: 00000000 .word 0x00000000 + 80008f40: 8001fe92 .word 0x8001fe92 + 80008f44: 00000000 .word 0x00000000 + 80008f48: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xb8b8b8b8b8b8b8b8 + 80008f4c: 0007b903 ld x18,0(x15) + 80008f50: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xb8b8b8b8b8b8b8b8 + 80008f54: 0007bf03 ld x30,0(x15) + 80008f58: 00878793 addi x15,x15,8 + +0000000080008f5c : +Zksed_sm4ed_cg_cp_sbox_b184: + sm4ed x29, x18, x30, 1 # perform operation + 80008f5c: 71e90eb3 sm4ed x29,x18,x30,0x1 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b184, Zksed_sm4ed_cg_cp_sbox_b184_str) + 80008f60: 000b3383 ld x7,0(x22) + 80008f64: 01d38c63 beq x7,x29,80008f7c + 80008f68: 2700246f jal x8,8000b1d8 + 80008f6c: 80008f5c .word 0x80008f5c + 80008f70: 00000000 .word 0x00000000 + 80008f74: 8001feca .word 0x8001feca + 80008f78: 00000000 .word 0x00000000 + 80008f7c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xb9b9b9b9b9b9b9b9 + 80008f80: 0007bd03 ld x26,0(x15) + 80008f84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xb9b9b9b9b9b9b9b9 + 80008f88: 0007b283 ld x5,0(x15) + 80008f8c: 00878793 addi x15,x15,8 + +0000000080008f90 : +Zksed_sm4ed_cg_cp_sbox_b185: + sm4ed x3, x26, x5, 1 # perform operation + 80008f90: 705d01b3 sm4ed x3,x26,x5,0x1 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b185, Zksed_sm4ed_cg_cp_sbox_b185_str) + 80008f94: 000b3383 ld x7,0(x22) + 80008f98: 00338c63 beq x7,x3,80008fb0 + 80008f9c: 23c0246f jal x8,8000b1d8 + 80008fa0: 80008f90 .word 0x80008f90 + 80008fa4: 00000000 .word 0x00000000 + 80008fa8: 8001ff02 .word 0x8001ff02 + 80008fac: 00000000 .word 0x00000000 + 80008fb0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xbabababababababa + 80008fb4: 0007b903 ld x18,0(x15) + 80008fb8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xbabababababababa + 80008fbc: 0007b603 ld x12,0(x15) + 80008fc0: 00878793 addi x15,x15,8 + +0000000080008fc4 : +Zksed_sm4ed_cg_cp_sbox_b186: + sm4ed x27, x18, x12, 3 # perform operation + 80008fc4: f0c90db3 sm4ed x27,x18,x12,0x3 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b186, Zksed_sm4ed_cg_cp_sbox_b186_str) + 80008fc8: 000b3383 ld x7,0(x22) + 80008fcc: 01b38c63 beq x7,x27,80008fe4 + 80008fd0: 2080246f jal x8,8000b1d8 + 80008fd4: 80008fc4 .word 0x80008fc4 + 80008fd8: 00000000 .word 0x00000000 + 80008fdc: 8001ff3a .word 0x8001ff3a + 80008fe0: 00000000 .word 0x00000000 + 80008fe4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs1: x1 = 0xbbbbbbbbbbbbbbbb + 80008fe8: 0007b083 ld x1,0(x15) + 80008fec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xbbbbbbbbbbbbbbbb + 80008ff0: 0007bc83 ld x25,0(x15) + 80008ff4: 00878793 addi x15,x15,8 + +0000000080008ff8 : +Zksed_sm4ed_cg_cp_sbox_b187: + sm4ed x3, x1, x25, 3 # perform operation + 80008ff8: f19081b3 sm4ed x3,x1,x25,0x3 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b187, Zksed_sm4ed_cg_cp_sbox_b187_str) + 80008ffc: 000b3383 ld x7,0(x22) + 80009000: 00338c63 beq x7,x3,80009018 + 80009004: 1d40246f jal x8,8000b1d8 + 80009008: 80008ff8 .word 0x80008ff8 + 8000900c: 00000000 .word 0x00000000 + 80009010: 8001ff72 .word 0x8001ff72 + 80009014: 00000000 .word 0x00000000 + 80009018: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xbcbcbcbcbcbcbcbc + 8000901c: 0007b683 ld x13,0(x15) + 80009020: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xbcbcbcbcbcbcbcbc + 80009024: 0007b883 ld x17,0(x15) + 80009028: 00878793 addi x15,x15,8 + +000000008000902c : +Zksed_sm4ed_cg_cp_sbox_b188: + sm4ed x27, x13, x17, 3 # perform operation + 8000902c: f1168db3 sm4ed x27,x13,x17,0x3 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b188, Zksed_sm4ed_cg_cp_sbox_b188_str) + 80009030: 000b3383 ld x7,0(x22) + 80009034: 01b38c63 beq x7,x27,8000904c + 80009038: 1a00246f jal x8,8000b1d8 + 8000903c: 8000902c .word 0x8000902c + 80009040: 00000000 .word 0x00000000 + 80009044: 8001ffaa .word 0x8001ffaa + 80009048: 00000000 .word 0x00000000 + 8000904c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xbdbdbdbdbdbdbdbd + 80009050: 0007bf03 ld x30,0(x15) + 80009054: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xbdbdbdbdbdbdbdbd + 80009058: 0007b083 ld x1,0(x15) + 8000905c: 00878793 addi x15,x15,8 + +0000000080009060 : +Zksed_sm4ed_cg_cp_sbox_b189: + sm4ed x18, x30, x1, 3 # perform operation + 80009060: f01f0933 sm4ed x18,x30,x1,0x3 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b189, Zksed_sm4ed_cg_cp_sbox_b189_str) + 80009064: 000b3383 ld x7,0(x22) + 80009068: 01238c63 beq x7,x18,80009080 + 8000906c: 16c0246f jal x8,8000b1d8 + 80009070: 80009060 .word 0x80009060 + 80009074: 00000000 .word 0x00000000 + 80009078: 8001ffe2 .word 0x8001ffe2 + 8000907c: 00000000 .word 0x00000000 + 80009080: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xbebebebebebebebe + 80009084: 0007b583 ld x11,0(x15) + 80009088: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xbebebebebebebebe + 8000908c: 0007bf83 ld x31,0(x15) + 80009090: 00878793 addi x15,x15,8 + +0000000080009094 : +Zksed_sm4ed_cg_cp_sbox_b190: + sm4ed x21, x11, x31, 1 # perform operation + 80009094: 71f58ab3 sm4ed x21,x11,x31,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b190, Zksed_sm4ed_cg_cp_sbox_b190_str) + 80009098: 000b3383 ld x7,0(x22) + 8000909c: 01538c63 beq x7,x21,800090b4 + 800090a0: 1380246f jal x8,8000b1d8 + 800090a4: 80009094 .word 0x80009094 + 800090a8: 00000000 .word 0x00000000 + 800090ac: 8002001a .word 0x8002001a + 800090b0: 00000000 .word 0x00000000 + 800090b4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xbfbfbfbfbfbfbfbf + 800090b8: 0007b483 ld x9,0(x15) + 800090bc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs2: x11 = 0xbfbfbfbfbfbfbfbf + 800090c0: 0007b583 ld x11,0(x15) + 800090c4: 00878793 addi x15,x15,8 + +00000000800090c8 : +Zksed_sm4ed_cg_cp_sbox_b191: + sm4ed x12, x9, x11, 0 # perform operation + 800090c8: 30b48633 sm4ed x12,x9,x11,0x0 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b191, Zksed_sm4ed_cg_cp_sbox_b191_str) + 800090cc: 000b3383 ld x7,0(x22) + 800090d0: 00c38c63 beq x7,x12,800090e8 + 800090d4: 1040246f jal x8,8000b1d8 + 800090d8: 800090c8 .word 0x800090c8 + 800090dc: 00000000 .word 0x00000000 + 800090e0: 80020052 .word 0x80020052 + 800090e4: 00000000 .word 0x00000000 + 800090e8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xc0c0c0c0c0c0c0c0 + 800090ec: 0007b803 ld x16,0(x15) + 800090f0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xc0c0c0c0c0c0c0c0 + 800090f4: 0007b903 ld x18,0(x15) + 800090f8: 00878793 addi x15,x15,8 + +00000000800090fc : +Zksed_sm4ed_cg_cp_sbox_b192: + sm4ed x19, x16, x18, 2 # perform operation + 800090fc: b12809b3 sm4ed x19,x16,x18,0x2 + # Check if x19 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x19, Zksed_sm4ed_cg_cp_sbox_b192, Zksed_sm4ed_cg_cp_sbox_b192_str) + 80009100: 000b3383 ld x7,0(x22) + 80009104: 01338c63 beq x7,x19,8000911c + 80009108: 0d00246f jal x8,8000b1d8 + 8000910c: 800090fc .word 0x800090fc + 80009110: 00000000 .word 0x00000000 + 80009114: 8002008a .word 0x8002008a + 80009118: 00000000 .word 0x00000000 + 8000911c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs1: x25 = 0xc1c1c1c1c1c1c1c1 + 80009120: 0007bc83 ld x25,0(x15) + 80009124: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xc1c1c1c1c1c1c1c1 + 80009128: 0007b603 ld x12,0(x15) + 8000912c: 00878793 addi x15,x15,8 + +0000000080009130 : +Zksed_sm4ed_cg_cp_sbox_b193: + sm4ed x24, x25, x12, 1 # perform operation + 80009130: 70cc8c33 sm4ed x24,x25,x12,0x1 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b193, Zksed_sm4ed_cg_cp_sbox_b193_str) + 80009134: 000b3383 ld x7,0(x22) + 80009138: 01838c63 beq x7,x24,80009150 + 8000913c: 09c0246f jal x8,8000b1d8 + 80009140: 80009130 .word 0x80009130 + 80009144: 00000000 .word 0x00000000 + 80009148: 800200c2 .word 0x800200c2 + 8000914c: 00000000 .word 0x00000000 + 80009150: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xc2c2c2c2c2c2c2c2 + 80009154: 0007b503 ld x10,0(x15) + 80009158: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xc2c2c2c2c2c2c2c2 + 8000915c: 0007bc83 ld x25,0(x15) + 80009160: 00878793 addi x15,x15,8 + +0000000080009164 : +Zksed_sm4ed_cg_cp_sbox_b194: + sm4ed x11, x10, x25, 2 # perform operation + 80009164: b19505b3 sm4ed x11,x10,x25,0x2 + # Check if x11 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x11, Zksed_sm4ed_cg_cp_sbox_b194, Zksed_sm4ed_cg_cp_sbox_b194_str) + 80009168: 000b3383 ld x7,0(x22) + 8000916c: 00b38c63 beq x7,x11,80009184 + 80009170: 0680246f jal x8,8000b1d8 + 80009174: 80009164 .word 0x80009164 + 80009178: 00000000 .word 0x00000000 + 8000917c: 800200fa .word 0x800200fa + 80009180: 00000000 .word 0x00000000 + 80009184: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xc3c3c3c3c3c3c3c3 + 80009188: 0007bc03 ld x24,0(x15) + 8000918c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xc3c3c3c3c3c3c3c3 + 80009190: 0007b983 ld x19,0(x15) + 80009194: 00878793 addi x15,x15,8 + +0000000080009198 : +Zksed_sm4ed_cg_cp_sbox_b195: + sm4ed x2, x24, x19, 0 # perform operation + 80009198: 313c0133 sm4ed x2,x24,x19,0x0 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b195, Zksed_sm4ed_cg_cp_sbox_b195_str) + 8000919c: 000b3383 ld x7,0(x22) + 800091a0: 00238c63 beq x7,x2,800091b8 + 800091a4: 0340246f jal x8,8000b1d8 + 800091a8: 80009198 .word 0x80009198 + 800091ac: 00000000 .word 0x00000000 + 800091b0: 80020132 .word 0x80020132 + 800091b4: 00000000 .word 0x00000000 + 800091b8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xc4c4c4c4c4c4c4c4 + 800091bc: 0007b203 ld x4,0(x15) + 800091c0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xc4c4c4c4c4c4c4c4 + 800091c4: 0007bc83 ld x25,0(x15) + 800091c8: 00878793 addi x15,x15,8 + +00000000800091cc : +Zksed_sm4ed_cg_cp_sbox_b196: + sm4ed x30, x4, x25, 0 # perform operation + 800091cc: 31920f33 sm4ed x30,x4,x25,0x0 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b196, Zksed_sm4ed_cg_cp_sbox_b196_str) + 800091d0: 000b3383 ld x7,0(x22) + 800091d4: 01e38c63 beq x7,x30,800091ec + 800091d8: 0000246f jal x8,8000b1d8 + 800091dc: 800091cc .word 0x800091cc + 800091e0: 00000000 .word 0x00000000 + 800091e4: 8002016a .word 0x8002016a + 800091e8: 00000000 .word 0x00000000 + 800091ec: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xc5c5c5c5c5c5c5c5 + 800091f0: 0007b803 ld x16,0(x15) + 800091f4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xc5c5c5c5c5c5c5c5 + 800091f8: 0007b103 ld x2,0(x15) + 800091fc: 00878793 addi x15,x15,8 + +0000000080009200 : +Zksed_sm4ed_cg_cp_sbox_b197: + sm4ed x10, x16, x2, 1 # perform operation + 80009200: 70280533 sm4ed x10,x16,x2,0x1 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b197, Zksed_sm4ed_cg_cp_sbox_b197_str) + 80009204: 000b3383 ld x7,0(x22) + 80009208: 00a38c63 beq x7,x10,80009220 + 8000920c: 7cd0146f jal x8,8000b1d8 + 80009210: 80009200 .word 0x80009200 + 80009214: 00000000 .word 0x00000000 + 80009218: 800201a2 .word 0x800201a2 + 8000921c: 00000000 .word 0x00000000 + 80009220: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xc6c6c6c6c6c6c6c6 + 80009224: 0007b803 ld x16,0(x15) + 80009228: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xc6c6c6c6c6c6c6c6 + 8000922c: 0007b983 ld x19,0(x15) + 80009230: 00878793 addi x15,x15,8 + +0000000080009234 : +Zksed_sm4ed_cg_cp_sbox_b198: + sm4ed x21, x16, x19, 1 # perform operation + 80009234: 71380ab3 sm4ed x21,x16,x19,0x1 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b198, Zksed_sm4ed_cg_cp_sbox_b198_str) + 80009238: 000b3383 ld x7,0(x22) + 8000923c: 01538c63 beq x7,x21,80009254 + 80009240: 7990146f jal x8,8000b1d8 + 80009244: 80009234 .word 0x80009234 + 80009248: 00000000 .word 0x00000000 + 8000924c: 800201da .word 0x800201da + 80009250: 00000000 .word 0x00000000 + 80009254: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs1: x5 = 0xc7c7c7c7c7c7c7c7 + 80009258: 0007b283 ld x5,0(x15) + 8000925c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xc7c7c7c7c7c7c7c7 + 80009260: 0007be83 ld x29,0(x15) + 80009264: 00878793 addi x15,x15,8 + +0000000080009268 : +Zksed_sm4ed_cg_cp_sbox_b199: + sm4ed x13, x5, x29, 3 # perform operation + 80009268: f1d286b3 sm4ed x13,x5,x29,0x3 + # Check if x13 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x13, Zksed_sm4ed_cg_cp_sbox_b199, Zksed_sm4ed_cg_cp_sbox_b199_str) + 8000926c: 000b3383 ld x7,0(x22) + 80009270: 00d38c63 beq x7,x13,80009288 + 80009274: 7650146f jal x8,8000b1d8 + 80009278: 80009268 .word 0x80009268 + 8000927c: 00000000 .word 0x00000000 + 80009280: 80020212 .word 0x80020212 + 80009284: 00000000 .word 0x00000000 + 80009288: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xc8c8c8c8c8c8c8c8 + 8000928c: 0007bd83 ld x27,0(x15) + 80009290: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xc8c8c8c8c8c8c8c8 + 80009294: 0007bf83 ld x31,0(x15) + 80009298: 00878793 addi x15,x15,8 + +000000008000929c : +Zksed_sm4ed_cg_cp_sbox_b200: + sm4ed x5, x27, x31, 0 # perform operation + 8000929c: 31fd82b3 sm4ed x5,x27,x31,0x0 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b200, Zksed_sm4ed_cg_cp_sbox_b200_str) + 800092a0: 000b3383 ld x7,0(x22) + 800092a4: 00538c63 beq x7,x5,800092bc + 800092a8: 7310146f jal x8,8000b1d8 + 800092ac: 8000929c .word 0x8000929c + 800092b0: 00000000 .word 0x00000000 + 800092b4: 8002024a .word 0x8002024a + 800092b8: 00000000 .word 0x00000000 + 800092bc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xc9c9c9c9c9c9c9c9 + 800092c0: 0007b183 ld x3,0(x15) + 800092c4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xc9c9c9c9c9c9c9c9 + 800092c8: 0007b503 ld x10,0(x15) + 800092cc: 00878793 addi x15,x15,8 + +00000000800092d0 : +Zksed_sm4ed_cg_cp_sbox_b201: + sm4ed x20, x3, x10, 1 # perform operation + 800092d0: 70a18a33 sm4ed x20,x3,x10,0x1 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b201, Zksed_sm4ed_cg_cp_sbox_b201_str) + 800092d4: 000b3383 ld x7,0(x22) + 800092d8: 01438c63 beq x7,x20,800092f0 + 800092dc: 6fd0146f jal x8,8000b1d8 + 800092e0: 800092d0 .word 0x800092d0 + 800092e4: 00000000 .word 0x00000000 + 800092e8: 80020282 .word 0x80020282 + 800092ec: 00000000 .word 0x00000000 + 800092f0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xcacacacacacacaca + 800092f4: 0007b183 ld x3,0(x15) + 800092f8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xcacacacacacacaca + 800092fc: 0007bc03 ld x24,0(x15) + 80009300: 00878793 addi x15,x15,8 + +0000000080009304 : +Zksed_sm4ed_cg_cp_sbox_b202: + sm4ed x31, x3, x24, 1 # perform operation + 80009304: 71818fb3 sm4ed x31,x3,x24,0x1 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b202, Zksed_sm4ed_cg_cp_sbox_b202_str) + 80009308: 000b3383 ld x7,0(x22) + 8000930c: 01f38c63 beq x7,x31,80009324 + 80009310: 6c90146f jal x8,8000b1d8 + 80009314: 80009304 .word 0x80009304 + 80009318: 00000000 .word 0x00000000 + 8000931c: 800202ba .word 0x800202ba + 80009320: 00000000 .word 0x00000000 + 80009324: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xcbcbcbcbcbcbcbcb + 80009328: 0007b683 ld x13,0(x15) + 8000932c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs2: x23 = 0xcbcbcbcbcbcbcbcb + 80009330: 0007bb83 ld x23,0(x15) + 80009334: 00878793 addi x15,x15,8 + +0000000080009338 : +Zksed_sm4ed_cg_cp_sbox_b203: + sm4ed x12, x13, x23, 2 # perform operation + 80009338: b1768633 sm4ed x12,x13,x23,0x2 + # Check if x12 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x12, Zksed_sm4ed_cg_cp_sbox_b203, Zksed_sm4ed_cg_cp_sbox_b203_str) + 8000933c: 000b3383 ld x7,0(x22) + 80009340: 00c38c63 beq x7,x12,80009358 + 80009344: 6950146f jal x8,8000b1d8 + 80009348: 80009338 .word 0x80009338 + 8000934c: 00000000 .word 0x00000000 + 80009350: 800202f2 .word 0x800202f2 + 80009354: 00000000 .word 0x00000000 + 80009358: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xcccccccccccccccc + 8000935c: 0007bf03 ld x30,0(x15) + 80009360: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xcccccccccccccccc + 80009364: 0007b503 ld x10,0(x15) + 80009368: 00878793 addi x15,x15,8 + +000000008000936c : +Zksed_sm4ed_cg_cp_sbox_b204: + sm4ed x21, x30, x10, 3 # perform operation + 8000936c: f0af0ab3 sm4ed x21,x30,x10,0x3 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b204, Zksed_sm4ed_cg_cp_sbox_b204_str) + 80009370: 000b3383 ld x7,0(x22) + 80009374: 01538c63 beq x7,x21,8000938c + 80009378: 6610146f jal x8,8000b1d8 + 8000937c: 8000936c .word 0x8000936c + 80009380: 00000000 .word 0x00000000 + 80009384: 8002032a .word 0x8002032a + 80009388: 00000000 .word 0x00000000 + 8000938c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xcdcdcdcdcdcdcdcd + 80009390: 0007bd83 ld x27,0(x15) + 80009394: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xcdcdcdcdcdcdcdcd + 80009398: 0007b083 ld x1,0(x15) + 8000939c: 00878793 addi x15,x15,8 + +00000000800093a0 : +Zksed_sm4ed_cg_cp_sbox_b205: + sm4ed x5, x27, x1, 1 # perform operation + 800093a0: 701d82b3 sm4ed x5,x27,x1,0x1 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b205, Zksed_sm4ed_cg_cp_sbox_b205_str) + 800093a4: 000b3383 ld x7,0(x22) + 800093a8: 00538c63 beq x7,x5,800093c0 + 800093ac: 62d0146f jal x8,8000b1d8 + 800093b0: 800093a0 .word 0x800093a0 + 800093b4: 00000000 .word 0x00000000 + 800093b8: 80020362 .word 0x80020362 + 800093bc: 00000000 .word 0x00000000 + 800093c0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xcececececececece + 800093c4: 0007b603 ld x12,0(x15) + 800093c8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xcececececececece + 800093cc: 0007bf83 ld x31,0(x15) + 800093d0: 00878793 addi x15,x15,8 + +00000000800093d4 : +Zksed_sm4ed_cg_cp_sbox_b206: + sm4ed x5, x12, x31, 0 # perform operation + 800093d4: 31f602b3 sm4ed x5,x12,x31,0x0 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b206, Zksed_sm4ed_cg_cp_sbox_b206_str) + 800093d8: 000b3383 ld x7,0(x22) + 800093dc: 00538c63 beq x7,x5,800093f4 + 800093e0: 5f90146f jal x8,8000b1d8 + 800093e4: 800093d4 .word 0x800093d4 + 800093e8: 00000000 .word 0x00000000 + 800093ec: 8002039a .word 0x8002039a + 800093f0: 00000000 .word 0x00000000 + 800093f4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xcfcfcfcfcfcfcfcf + 800093f8: 0007ba03 ld x20,0(x15) + 800093fc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xcfcfcfcfcfcfcfcf + 80009400: 0007bc83 ld x25,0(x15) + 80009404: 00878793 addi x15,x15,8 + +0000000080009408 : +Zksed_sm4ed_cg_cp_sbox_b207: + sm4ed x18, x20, x25, 2 # perform operation + 80009408: b19a0933 sm4ed x18,x20,x25,0x2 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b207, Zksed_sm4ed_cg_cp_sbox_b207_str) + 8000940c: 000b3383 ld x7,0(x22) + 80009410: 01238c63 beq x7,x18,80009428 + 80009414: 5c50146f jal x8,8000b1d8 + 80009418: 80009408 .word 0x80009408 + 8000941c: 00000000 .word 0x00000000 + 80009420: 800203d2 .word 0x800203d2 + 80009424: 00000000 .word 0x00000000 + 80009428: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xd0d0d0d0d0d0d0d0 + 8000942c: 0007b583 ld x11,0(x15) + 80009430: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x5) # load rs2: x5 = 0xd0d0d0d0d0d0d0d0 + 80009434: 0007b283 ld x5,0(x15) + 80009438: 00878793 addi x15,x15,8 + +000000008000943c : +Zksed_sm4ed_cg_cp_sbox_b208: + sm4ed x25, x11, x5, 2 # perform operation + 8000943c: b0558cb3 sm4ed x25,x11,x5,0x2 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b208, Zksed_sm4ed_cg_cp_sbox_b208_str) + 80009440: 000b3383 ld x7,0(x22) + 80009444: 01938c63 beq x7,x25,8000945c + 80009448: 5910146f jal x8,8000b1d8 + 8000944c: 8000943c .word 0x8000943c + 80009450: 00000000 .word 0x00000000 + 80009454: 8002040a .word 0x8002040a + 80009458: 00000000 .word 0x00000000 + 8000945c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xd1d1d1d1d1d1d1d1 + 80009460: 0007bf03 ld x30,0(x15) + 80009464: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xd1d1d1d1d1d1d1d1 + 80009468: 0007b603 ld x12,0(x15) + 8000946c: 00878793 addi x15,x15,8 + +0000000080009470 : +Zksed_sm4ed_cg_cp_sbox_b209: + sm4ed x9, x30, x12, 1 # perform operation + 80009470: 70cf04b3 sm4ed x9,x30,x12,0x1 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b209, Zksed_sm4ed_cg_cp_sbox_b209_str) + 80009474: 000b3383 ld x7,0(x22) + 80009478: 00938c63 beq x7,x9,80009490 + 8000947c: 55d0146f jal x8,8000b1d8 + 80009480: 80009470 .word 0x80009470 + 80009484: 00000000 .word 0x00000000 + 80009488: 80020442 .word 0x80020442 + 8000948c: 00000000 .word 0x00000000 + 80009490: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xd2d2d2d2d2d2d2d2 + 80009494: 0007bb83 ld x23,0(x15) + 80009498: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xd2d2d2d2d2d2d2d2 + 8000949c: 0007b703 ld x14,0(x15) + 800094a0: 00878793 addi x15,x15,8 + +00000000800094a4 : +Zksed_sm4ed_cg_cp_sbox_b210: + sm4ed x4, x23, x14, 0 # perform operation + 800094a4: 30eb8233 sm4ed x4,x23,x14,0x0 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b210, Zksed_sm4ed_cg_cp_sbox_b210_str) + 800094a8: 000b3383 ld x7,0(x22) + 800094ac: 00438c63 beq x7,x4,800094c4 + 800094b0: 5290146f jal x8,8000b1d8 + 800094b4: 800094a4 .word 0x800094a4 + 800094b8: 00000000 .word 0x00000000 + 800094bc: 8002047a .word 0x8002047a + 800094c0: 00000000 .word 0x00000000 + 800094c4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xd3d3d3d3d3d3d3d3 + 800094c8: 0007b483 ld x9,0(x15) + 800094cc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs2: x3 = 0xd3d3d3d3d3d3d3d3 + 800094d0: 0007b183 ld x3,0(x15) + 800094d4: 00878793 addi x15,x15,8 + +00000000800094d8 : +Zksed_sm4ed_cg_cp_sbox_b211: + sm4ed x16, x9, x3, 0 # perform operation + 800094d8: 30348833 sm4ed x16,x9,x3,0x0 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b211, Zksed_sm4ed_cg_cp_sbox_b211_str) + 800094dc: 000b3383 ld x7,0(x22) + 800094e0: 01038c63 beq x7,x16,800094f8 + 800094e4: 4f50146f jal x8,8000b1d8 + 800094e8: 800094d8 .word 0x800094d8 + 800094ec: 00000000 .word 0x00000000 + 800094f0: 800204b2 .word 0x800204b2 + 800094f4: 00000000 .word 0x00000000 + 800094f8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xd4d4d4d4d4d4d4d4 + 800094fc: 0007be83 ld x29,0(x15) + 80009500: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs2: x10 = 0xd4d4d4d4d4d4d4d4 + 80009504: 0007b503 ld x10,0(x15) + 80009508: 00878793 addi x15,x15,8 + +000000008000950c : +Zksed_sm4ed_cg_cp_sbox_b212: + sm4ed x20, x29, x10, 3 # perform operation + 8000950c: f0ae8a33 sm4ed x20,x29,x10,0x3 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b212, Zksed_sm4ed_cg_cp_sbox_b212_str) + 80009510: 000b3383 ld x7,0(x22) + 80009514: 01438c63 beq x7,x20,8000952c + 80009518: 4c10146f jal x8,8000b1d8 + 8000951c: 8000950c .word 0x8000950c + 80009520: 00000000 .word 0x00000000 + 80009524: 800204ea .word 0x800204ea + 80009528: 00000000 .word 0x00000000 + 8000952c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs1: x6 = 0xd5d5d5d5d5d5d5d5 + 80009530: 0007b303 ld x6,0(x15) + 80009534: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xd5d5d5d5d5d5d5d5 + 80009538: 0007bc03 ld x24,0(x15) + 8000953c: 00878793 addi x15,x15,8 + +0000000080009540 : +Zksed_sm4ed_cg_cp_sbox_b213: + sm4ed x23, x6, x24, 3 # perform operation + 80009540: f1830bb3 sm4ed x23,x6,x24,0x3 + # Check if x23 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x23, Zksed_sm4ed_cg_cp_sbox_b213, Zksed_sm4ed_cg_cp_sbox_b213_str) + 80009544: 000b3383 ld x7,0(x22) + 80009548: 01738c63 beq x7,x23,80009560 + 8000954c: 48d0146f jal x8,8000b1d8 + 80009550: 80009540 .word 0x80009540 + 80009554: 00000000 .word 0x00000000 + 80009558: 80020522 .word 0x80020522 + 8000955c: 00000000 .word 0x00000000 + 80009560: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs1: x21 = 0xd6d6d6d6d6d6d6d6 + 80009564: 0007ba83 ld x21,0(x15) + 80009568: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xd6d6d6d6d6d6d6d6 + 8000956c: 0007b903 ld x18,0(x15) + 80009570: 00878793 addi x15,x15,8 + +0000000080009574 : +Zksed_sm4ed_cg_cp_sbox_b214: + sm4ed x9, x21, x18, 0 # perform operation + 80009574: 312a84b3 sm4ed x9,x21,x18,0x0 + # Check if x9 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x9, Zksed_sm4ed_cg_cp_sbox_b214, Zksed_sm4ed_cg_cp_sbox_b214_str) + 80009578: 000b3383 ld x7,0(x22) + 8000957c: 00938c63 beq x7,x9,80009594 + 80009580: 4590146f jal x8,8000b1d8 + 80009584: 80009574 .word 0x80009574 + 80009588: 00000000 .word 0x00000000 + 8000958c: 8002055a .word 0x8002055a + 80009590: 00000000 .word 0x00000000 + 80009594: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xd7d7d7d7d7d7d7d7 + 80009598: 0007bd83 ld x27,0(x15) + 8000959c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xd7d7d7d7d7d7d7d7 + 800095a0: 0007bc83 ld x25,0(x15) + 800095a4: 00878793 addi x15,x15,8 + +00000000800095a8 : +Zksed_sm4ed_cg_cp_sbox_b215: + sm4ed x28, x27, x25, 2 # perform operation + 800095a8: b19d8e33 sm4ed x28,x27,x25,0x2 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b215, Zksed_sm4ed_cg_cp_sbox_b215_str) + 800095ac: 000b3383 ld x7,0(x22) + 800095b0: 01c38c63 beq x7,x28,800095c8 + 800095b4: 4250146f jal x8,8000b1d8 + 800095b8: 800095a8 .word 0x800095a8 + 800095bc: 00000000 .word 0x00000000 + 800095c0: 80020592 .word 0x80020592 + 800095c4: 00000000 .word 0x00000000 + 800095c8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xd8d8d8d8d8d8d8d8 + 800095cc: 0007bf83 ld x31,0(x15) + 800095d0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xd8d8d8d8d8d8d8d8 + 800095d4: 0007b983 ld x19,0(x15) + 800095d8: 00878793 addi x15,x15,8 + +00000000800095dc : +Zksed_sm4ed_cg_cp_sbox_b216: + sm4ed x29, x31, x19, 3 # perform operation + 800095dc: f13f8eb3 sm4ed x29,x31,x19,0x3 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b216, Zksed_sm4ed_cg_cp_sbox_b216_str) + 800095e0: 000b3383 ld x7,0(x22) + 800095e4: 01d38c63 beq x7,x29,800095fc + 800095e8: 3f10146f jal x8,8000b1d8 + 800095ec: 800095dc .word 0x800095dc + 800095f0: 00000000 .word 0x00000000 + 800095f4: 800205ca .word 0x800205ca + 800095f8: 00000000 .word 0x00000000 + 800095fc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xd9d9d9d9d9d9d9d9 + 80009600: 0007b983 ld x19,0(x15) + 80009604: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xd9d9d9d9d9d9d9d9 + 80009608: 0007b883 ld x17,0(x15) + 8000960c: 00878793 addi x15,x15,8 + +0000000080009610 : +Zksed_sm4ed_cg_cp_sbox_b217: + sm4ed x21, x19, x17, 0 # perform operation + 80009610: 31198ab3 sm4ed x21,x19,x17,0x0 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b217, Zksed_sm4ed_cg_cp_sbox_b217_str) + 80009614: 000b3383 ld x7,0(x22) + 80009618: 01538c63 beq x7,x21,80009630 + 8000961c: 3bd0146f jal x8,8000b1d8 + 80009620: 80009610 .word 0x80009610 + 80009624: 00000000 .word 0x00000000 + 80009628: 80020602 .word 0x80020602 + 8000962c: 00000000 .word 0x00000000 + 80009630: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xdadadadadadadada + 80009634: 0007b203 ld x4,0(x15) + 80009638: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xdadadadadadadada + 8000963c: 0007b303 ld x6,0(x15) + 80009640: 00878793 addi x15,x15,8 + +0000000080009644 : +Zksed_sm4ed_cg_cp_sbox_b218: + sm4ed x28, x4, x6, 3 # perform operation + 80009644: f0620e33 sm4ed x28,x4,x6,0x3 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b218, Zksed_sm4ed_cg_cp_sbox_b218_str) + 80009648: 000b3383 ld x7,0(x22) + 8000964c: 01c38c63 beq x7,x28,80009664 + 80009650: 3890146f jal x8,8000b1d8 + 80009654: 80009644 .word 0x80009644 + 80009658: 00000000 .word 0x00000000 + 8000965c: 8002063a .word 0x8002063a + 80009660: 00000000 .word 0x00000000 + 80009664: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xdbdbdbdbdbdbdbdb + 80009668: 0007b583 ld x11,0(x15) + 8000966c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xdbdbdbdbdbdbdbdb + 80009670: 0007be03 ld x28,0(x15) + 80009674: 00878793 addi x15,x15,8 + +0000000080009678 : +Zksed_sm4ed_cg_cp_sbox_b219: + sm4ed x24, x11, x28, 2 # perform operation + 80009678: b1c58c33 sm4ed x24,x11,x28,0x2 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b219, Zksed_sm4ed_cg_cp_sbox_b219_str) + 8000967c: 000b3383 ld x7,0(x22) + 80009680: 01838c63 beq x7,x24,80009698 + 80009684: 3550146f jal x8,8000b1d8 + 80009688: 80009678 .word 0x80009678 + 8000968c: 00000000 .word 0x00000000 + 80009690: 80020672 .word 0x80020672 + 80009694: 00000000 .word 0x00000000 + 80009698: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xdcdcdcdcdcdcdcdc + 8000969c: 0007b903 ld x18,0(x15) + 800096a0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xdcdcdcdcdcdcdcdc + 800096a4: 0007b203 ld x4,0(x15) + 800096a8: 00878793 addi x15,x15,8 + +00000000800096ac : +Zksed_sm4ed_cg_cp_sbox_b220: + sm4ed x20, x18, x4, 3 # perform operation + 800096ac: f0490a33 sm4ed x20,x18,x4,0x3 + # Check if x20 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x20, Zksed_sm4ed_cg_cp_sbox_b220, Zksed_sm4ed_cg_cp_sbox_b220_str) + 800096b0: 000b3383 ld x7,0(x22) + 800096b4: 01438c63 beq x7,x20,800096cc + 800096b8: 3210146f jal x8,8000b1d8 + 800096bc: 800096ac .word 0x800096ac + 800096c0: 00000000 .word 0x00000000 + 800096c4: 800206aa .word 0x800206aa + 800096c8: 00000000 .word 0x00000000 + 800096cc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xdddddddddddddddd + 800096d0: 0007b203 ld x4,0(x15) + 800096d4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xdddddddddddddddd + 800096d8: 0007b103 ld x2,0(x15) + 800096dc: 00878793 addi x15,x15,8 + +00000000800096e0 : +Zksed_sm4ed_cg_cp_sbox_b221: + sm4ed x3, x4, x2, 1 # perform operation + 800096e0: 702201b3 sm4ed x3,x4,x2,0x1 + # Check if x3 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x3, Zksed_sm4ed_cg_cp_sbox_b221, Zksed_sm4ed_cg_cp_sbox_b221_str) + 800096e4: 000b3383 ld x7,0(x22) + 800096e8: 00338c63 beq x7,x3,80009700 + 800096ec: 2ed0146f jal x8,8000b1d8 + 800096f0: 800096e0 .word 0x800096e0 + 800096f4: 00000000 .word 0x00000000 + 800096f8: 800206e2 .word 0x800206e2 + 800096fc: 00000000 .word 0x00000000 + 80009700: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xdededededededede + 80009704: 0007b683 ld x13,0(x15) + 80009708: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xdededededededede + 8000970c: 0007bc83 ld x25,0(x15) + 80009710: 00878793 addi x15,x15,8 + +0000000080009714 : +Zksed_sm4ed_cg_cp_sbox_b222: + sm4ed x4, x13, x25, 1 # perform operation + 80009714: 71968233 sm4ed x4,x13,x25,0x1 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b222, Zksed_sm4ed_cg_cp_sbox_b222_str) + 80009718: 000b3383 ld x7,0(x22) + 8000971c: 00438c63 beq x7,x4,80009734 + 80009720: 2b90146f jal x8,8000b1d8 + 80009724: 80009714 .word 0x80009714 + 80009728: 00000000 .word 0x00000000 + 8000972c: 8002071a .word 0x8002071a + 80009730: 00000000 .word 0x00000000 + 80009734: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs1: x19 = 0xdfdfdfdfdfdfdfdf + 80009738: 0007b983 ld x19,0(x15) + 8000973c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs2: x12 = 0xdfdfdfdfdfdfdfdf + 80009740: 0007b603 ld x12,0(x15) + 80009744: 00878793 addi x15,x15,8 + +0000000080009748 : +Zksed_sm4ed_cg_cp_sbox_b223: + sm4ed x10, x19, x12, 0 # perform operation + 80009748: 30c98533 sm4ed x10,x19,x12,0x0 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b223, Zksed_sm4ed_cg_cp_sbox_b223_str) + 8000974c: 000b3383 ld x7,0(x22) + 80009750: 00a38c63 beq x7,x10,80009768 + 80009754: 2850146f jal x8,8000b1d8 + 80009758: 80009748 .word 0x80009748 + 8000975c: 00000000 .word 0x00000000 + 80009760: 80020752 .word 0x80020752 + 80009764: 00000000 .word 0x00000000 + 80009768: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xe0e0e0e0e0e0e0e0 + 8000976c: 0007bf83 ld x31,0(x15) + 80009770: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xe0e0e0e0e0e0e0e0 + 80009774: 0007b803 ld x16,0(x15) + 80009778: 00878793 addi x15,x15,8 + +000000008000977c : +Zksed_sm4ed_cg_cp_sbox_b224: + sm4ed x10, x31, x16, 0 # perform operation + 8000977c: 310f8533 sm4ed x10,x31,x16,0x0 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b224, Zksed_sm4ed_cg_cp_sbox_b224_str) + 80009780: 000b3383 ld x7,0(x22) + 80009784: 00a38c63 beq x7,x10,8000979c + 80009788: 2510146f jal x8,8000b1d8 + 8000978c: 8000977c .word 0x8000977c + 80009790: 00000000 .word 0x00000000 + 80009794: 8002078a .word 0x8002078a + 80009798: 00000000 .word 0x00000000 + 8000979c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xe1e1e1e1e1e1e1e1 + 800097a0: 0007b183 ld x3,0(x15) + 800097a4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs2: x4 = 0xe1e1e1e1e1e1e1e1 + 800097a8: 0007b203 ld x4,0(x15) + 800097ac: 00878793 addi x15,x15,8 + +00000000800097b0 : +Zksed_sm4ed_cg_cp_sbox_b225: + sm4ed x2, x3, x4, 0 # perform operation + 800097b0: 30418133 sm4ed x2,x3,x4,0x0 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b225, Zksed_sm4ed_cg_cp_sbox_b225_str) + 800097b4: 000b3383 ld x7,0(x22) + 800097b8: 00238c63 beq x7,x2,800097d0 + 800097bc: 21d0146f jal x8,8000b1d8 + 800097c0: 800097b0 .word 0x800097b0 + 800097c4: 00000000 .word 0x00000000 + 800097c8: 800207c2 .word 0x800207c2 + 800097cc: 00000000 .word 0x00000000 + 800097d0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs1: x30 = 0xe2e2e2e2e2e2e2e2 + 800097d4: 0007bf03 ld x30,0(x15) + 800097d8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x1) # load rs2: x1 = 0xe2e2e2e2e2e2e2e2 + 800097dc: 0007b083 ld x1,0(x15) + 800097e0: 00878793 addi x15,x15,8 + +00000000800097e4 : +Zksed_sm4ed_cg_cp_sbox_b226: + sm4ed x27, x30, x1, 2 # perform operation + 800097e4: b01f0db3 sm4ed x27,x30,x1,0x2 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b226, Zksed_sm4ed_cg_cp_sbox_b226_str) + 800097e8: 000b3383 ld x7,0(x22) + 800097ec: 01b38c63 beq x7,x27,80009804 + 800097f0: 1e90146f jal x8,8000b1d8 + 800097f4: 800097e4 .word 0x800097e4 + 800097f8: 00000000 .word 0x00000000 + 800097fc: 800207fa .word 0x800207fa + 80009800: 00000000 .word 0x00000000 + 80009804: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xe3e3e3e3e3e3e3e3 + 80009808: 0007b803 ld x16,0(x15) + 8000980c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs2: x28 = 0xe3e3e3e3e3e3e3e3 + 80009810: 0007be03 ld x28,0(x15) + 80009814: 00878793 addi x15,x15,8 + +0000000080009818 : +Zksed_sm4ed_cg_cp_sbox_b227: + sm4ed x18, x16, x28, 3 # perform operation + 80009818: f1c80933 sm4ed x18,x16,x28,0x3 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b227, Zksed_sm4ed_cg_cp_sbox_b227_str) + 8000981c: 000b3383 ld x7,0(x22) + 80009820: 01238c63 beq x7,x18,80009838 + 80009824: 1b50146f jal x8,8000b1d8 + 80009828: 80009818 .word 0x80009818 + 8000982c: 00000000 .word 0x00000000 + 80009830: 80020832 .word 0x80020832 + 80009834: 00000000 .word 0x00000000 + 80009838: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs1: x24 = 0xe4e4e4e4e4e4e4e4 + 8000983c: 0007bc03 ld x24,0(x15) + 80009840: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xe4e4e4e4e4e4e4e4 + 80009844: 0007b483 ld x9,0(x15) + 80009848: 00878793 addi x15,x15,8 + +000000008000984c : +Zksed_sm4ed_cg_cp_sbox_b228: + sm4ed x29, x24, x9, 3 # perform operation + 8000984c: f09c0eb3 sm4ed x29,x24,x9,0x3 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b228, Zksed_sm4ed_cg_cp_sbox_b228_str) + 80009850: 000b3383 ld x7,0(x22) + 80009854: 01d38c63 beq x7,x29,8000986c + 80009858: 1810146f jal x8,8000b1d8 + 8000985c: 8000984c .word 0x8000984c + 80009860: 00000000 .word 0x00000000 + 80009864: 8002086a .word 0x8002086a + 80009868: 00000000 .word 0x00000000 + 8000986c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xe5e5e5e5e5e5e5e5 + 80009870: 0007bd03 ld x26,0(x15) + 80009874: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x30) # load rs2: x30 = 0xe5e5e5e5e5e5e5e5 + 80009878: 0007bf03 ld x30,0(x15) + 8000987c: 00878793 addi x15,x15,8 + +0000000080009880 : +Zksed_sm4ed_cg_cp_sbox_b229: + sm4ed x17, x26, x30, 2 # perform operation + 80009880: b1ed08b3 sm4ed x17,x26,x30,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b229, Zksed_sm4ed_cg_cp_sbox_b229_str) + 80009884: 000b3383 ld x7,0(x22) + 80009888: 01138c63 beq x7,x17,800098a0 + 8000988c: 14d0146f jal x8,8000b1d8 + 80009890: 80009880 .word 0x80009880 + 80009894: 00000000 .word 0x00000000 + 80009898: 800208a2 .word 0x800208a2 + 8000989c: 00000000 .word 0x00000000 + 800098a0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x15, x11) # load rs1: x11 = 0xe6e6e6e6e6e6e6e6 + 800098a4: 0007b583 ld x11,0(x15) + 800098a8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xe6e6e6e6e6e6e6e6 + 800098ac: 0007bc03 ld x24,0(x15) + 800098b0: 00878793 addi x15,x15,8 + +00000000800098b4 : +Zksed_sm4ed_cg_cp_sbox_b230: + sm4ed x2, x11, x24, 3 # perform operation + 800098b4: f1858133 sm4ed x2,x11,x24,0x3 + # Check if x2 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x2, Zksed_sm4ed_cg_cp_sbox_b230, Zksed_sm4ed_cg_cp_sbox_b230_str) + 800098b8: 000b3383 ld x7,0(x22) + 800098bc: 00238c63 beq x7,x2,800098d4 + 800098c0: 1190146f jal x8,8000b1d8 + 800098c4: 800098b4 .word 0x800098b4 + 800098c8: 00000000 .word 0x00000000 + 800098cc: 800208da .word 0x800208da + 800098d0: 00000000 .word 0x00000000 + 800098d4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xe7e7e7e7e7e7e7e7 + 800098d8: 0007b683 ld x13,0(x15) + 800098dc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x21) # load rs2: x21 = 0xe7e7e7e7e7e7e7e7 + 800098e0: 0007ba83 ld x21,0(x15) + 800098e4: 00878793 addi x15,x15,8 + +00000000800098e8 : +Zksed_sm4ed_cg_cp_sbox_b231: + sm4ed x31, x13, x21, 0 # perform operation + 800098e8: 31568fb3 sm4ed x31,x13,x21,0x0 + # Check if x31 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x31, Zksed_sm4ed_cg_cp_sbox_b231, Zksed_sm4ed_cg_cp_sbox_b231_str) + 800098ec: 000b3383 ld x7,0(x22) + 800098f0: 01f38c63 beq x7,x31,80009908 + 800098f4: 0e50146f jal x8,8000b1d8 + 800098f8: 800098e8 .word 0x800098e8 + 800098fc: 00000000 .word 0x00000000 + 80009900: 80020912 .word 0x80020912 + 80009904: 00000000 .word 0x00000000 + 80009908: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs1: x17 = 0xe8e8e8e8e8e8e8e8 + 8000990c: 0007b883 ld x17,0(x15) + 80009910: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs2: x31 = 0xe8e8e8e8e8e8e8e8 + 80009914: 0007bf83 ld x31,0(x15) + 80009918: 00878793 addi x15,x15,8 + +000000008000991c : +Zksed_sm4ed_cg_cp_sbox_b232: + sm4ed x28, x17, x31, 3 # perform operation + 8000991c: f1f88e33 sm4ed x28,x17,x31,0x3 + # Check if x28 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x28, Zksed_sm4ed_cg_cp_sbox_b232, Zksed_sm4ed_cg_cp_sbox_b232_str) + 80009920: 000b3383 ld x7,0(x22) + 80009924: 01c38c63 beq x7,x28,8000993c + 80009928: 0b10146f jal x8,8000b1d8 + 8000992c: 8000991c .word 0x8000991c + 80009930: 00000000 .word 0x00000000 + 80009934: 8002094a .word 0x8002094a + 80009938: 00000000 .word 0x00000000 + 8000993c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xe9e9e9e9e9e9e9e9 + 80009940: 0007b103 ld x2,0(x15) + 80009944: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xe9e9e9e9e9e9e9e9 + 80009948: 0007b903 ld x18,0(x15) + 8000994c: 00878793 addi x15,x15,8 + +0000000080009950 : +Zksed_sm4ed_cg_cp_sbox_b233: + sm4ed x4, x2, x18, 1 # perform operation + 80009950: 71210233 sm4ed x4,x2,x18,0x1 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b233, Zksed_sm4ed_cg_cp_sbox_b233_str) + 80009954: 000b3383 ld x7,0(x22) + 80009958: 00438c63 beq x7,x4,80009970 + 8000995c: 07d0146f jal x8,8000b1d8 + 80009960: 80009950 .word 0x80009950 + 80009964: 00000000 .word 0x00000000 + 80009968: 80020982 .word 0x80020982 + 8000996c: 00000000 .word 0x00000000 + 80009970: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs1: x9 = 0xeaeaeaeaeaeaeaea + 80009974: 0007b483 ld x9,0(x15) + 80009978: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xeaeaeaeaeaeaeaea + 8000997c: 0007b903 ld x18,0(x15) + 80009980: 00878793 addi x15,x15,8 + +0000000080009984 : +Zksed_sm4ed_cg_cp_sbox_b234: + sm4ed x29, x9, x18, 1 # perform operation + 80009984: 71248eb3 sm4ed x29,x9,x18,0x1 + # Check if x29 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x29, Zksed_sm4ed_cg_cp_sbox_b234, Zksed_sm4ed_cg_cp_sbox_b234_str) + 80009988: 000b3383 ld x7,0(x22) + 8000998c: 01d38c63 beq x7,x29,800099a4 + 80009990: 0490146f jal x8,8000b1d8 + 80009994: 80009984 .word 0x80009984 + 80009998: 00000000 .word 0x00000000 + 8000999c: 800209ba .word 0x800209ba + 800099a0: 00000000 .word 0x00000000 + 800099a4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs1: x18 = 0xebebebebebebebeb + 800099a8: 0007b903 ld x18,0(x15) + 800099ac: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs2: x14 = 0xebebebebebebebeb + 800099b0: 0007b703 ld x14,0(x15) + 800099b4: 00878793 addi x15,x15,8 + +00000000800099b8 : +Zksed_sm4ed_cg_cp_sbox_b235: + sm4ed x25, x18, x14, 0 # perform operation + 800099b8: 30e90cb3 sm4ed x25,x18,x14,0x0 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b235, Zksed_sm4ed_cg_cp_sbox_b235_str) + 800099bc: 000b3383 ld x7,0(x22) + 800099c0: 01938c63 beq x7,x25,800099d8 + 800099c4: 0150146f jal x8,8000b1d8 + 800099c8: 800099b8 .word 0x800099b8 + 800099cc: 00000000 .word 0x00000000 + 800099d0: 800209f2 .word 0x800209f2 + 800099d4: 00000000 .word 0x00000000 + 800099d8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xecececececececec + 800099dc: 0007b683 ld x13,0(x15) + 800099e0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs2: x27 = 0xecececececececec + 800099e4: 0007bd83 ld x27,0(x15) + 800099e8: 00878793 addi x15,x15,8 + +00000000800099ec : +Zksed_sm4ed_cg_cp_sbox_b236: + sm4ed x30, x13, x27, 2 # perform operation + 800099ec: b1b68f33 sm4ed x30,x13,x27,0x2 + # Check if x30 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x30, Zksed_sm4ed_cg_cp_sbox_b236, Zksed_sm4ed_cg_cp_sbox_b236_str) + 800099f0: 000b3383 ld x7,0(x22) + 800099f4: 01e38c63 beq x7,x30,80009a0c + 800099f8: 7e00146f jal x8,8000b1d8 + 800099fc: 800099ec .word 0x800099ec + 80009a00: 00000000 .word 0x00000000 + 80009a04: 80020a2a .word 0x80020a2a + 80009a08: 00000000 .word 0x00000000 + 80009a0c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x15, x12) # load rs1: x12 = 0xedededededededed + 80009a10: 0007b603 ld x12,0(x15) + 80009a14: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x18) # load rs2: x18 = 0xedededededededed + 80009a18: 0007b903 ld x18,0(x15) + 80009a1c: 00878793 addi x15,x15,8 + +0000000080009a20 : +Zksed_sm4ed_cg_cp_sbox_b237: + sm4ed x14, x12, x18, 0 # perform operation + 80009a20: 31260733 sm4ed x14,x12,x18,0x0 + # Check if x14 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x14, Zksed_sm4ed_cg_cp_sbox_b237, Zksed_sm4ed_cg_cp_sbox_b237_str) + 80009a24: 000b3383 ld x7,0(x22) + 80009a28: 00e38c63 beq x7,x14,80009a40 + 80009a2c: 7ac0146f jal x8,8000b1d8 + 80009a30: 80009a20 .word 0x80009a20 + 80009a34: 00000000 .word 0x00000000 + 80009a38: 80020a62 .word 0x80020a62 + 80009a3c: 00000000 .word 0x00000000 + 80009a40: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x15, x23) # load rs1: x23 = 0xeeeeeeeeeeeeeeee + 80009a44: 0007bb83 ld x23,0(x15) + 80009a48: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xeeeeeeeeeeeeeeee + 80009a4c: 0007b983 ld x19,0(x15) + 80009a50: 00878793 addi x15,x15,8 + +0000000080009a54 : +Zksed_sm4ed_cg_cp_sbox_b238: + sm4ed x27, x23, x19, 0 # perform operation + 80009a54: 313b8db3 sm4ed x27,x23,x19,0x0 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b238, Zksed_sm4ed_cg_cp_sbox_b238_str) + 80009a58: 000b3383 ld x7,0(x22) + 80009a5c: 01b38c63 beq x7,x27,80009a74 + 80009a60: 7780146f jal x8,8000b1d8 + 80009a64: 80009a54 .word 0x80009a54 + 80009a68: 00000000 .word 0x00000000 + 80009a6c: 80020a9a .word 0x80020a9a + 80009a70: 00000000 .word 0x00000000 + 80009a74: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs1: x29 = 0xefefefefefefefef + 80009a78: 0007be83 ld x29,0(x15) + 80009a7c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xefefefefefefefef + 80009a80: 0007bc03 ld x24,0(x15) + 80009a84: 00878793 addi x15,x15,8 + +0000000080009a88 : +Zksed_sm4ed_cg_cp_sbox_b239: + sm4ed x4, x29, x24, 0 # perform operation + 80009a88: 318e8233 sm4ed x4,x29,x24,0x0 + # Check if x4 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x4, Zksed_sm4ed_cg_cp_sbox_b239, Zksed_sm4ed_cg_cp_sbox_b239_str) + 80009a8c: 000b3383 ld x7,0(x22) + 80009a90: 00438c63 beq x7,x4,80009aa8 + 80009a94: 7440146f jal x8,8000b1d8 + 80009a98: 80009a88 .word 0x80009a88 + 80009a9c: 00000000 .word 0x00000000 + 80009aa0: 80020ad2 .word 0x80020ad2 + 80009aa4: 00000000 .word 0x00000000 + 80009aa8: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs1: x26 = 0xf0f0f0f0f0f0f0f0 + 80009aac: 0007bd03 ld x26,0(x15) + 80009ab0: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xf0f0f0f0f0f0f0f0 + 80009ab4: 0007b303 ld x6,0(x15) + 80009ab8: 00878793 addi x15,x15,8 + +0000000080009abc : +Zksed_sm4ed_cg_cp_sbox_b240: + sm4ed x16, x26, x6, 1 # perform operation + 80009abc: 706d0833 sm4ed x16,x26,x6,0x1 + # Check if x16 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x16, Zksed_sm4ed_cg_cp_sbox_b240, Zksed_sm4ed_cg_cp_sbox_b240_str) + 80009ac0: 000b3383 ld x7,0(x22) + 80009ac4: 01038c63 beq x7,x16,80009adc + 80009ac8: 7100146f jal x8,8000b1d8 + 80009acc: 80009abc .word 0x80009abc + 80009ad0: 00000000 .word 0x00000000 + 80009ad4: 80020b0a .word 0x80020b0a + 80009ad8: 00000000 .word 0x00000000 + 80009adc: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x15, x20) # load rs1: x20 = 0xf1f1f1f1f1f1f1f1 + 80009ae0: 0007ba03 ld x20,0(x15) + 80009ae4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xf1f1f1f1f1f1f1f1 + 80009ae8: 0007b803 ld x16,0(x15) + 80009aec: 00878793 addi x15,x15,8 + +0000000080009af0 : +Zksed_sm4ed_cg_cp_sbox_b241: + sm4ed x18, x20, x16, 0 # perform operation + 80009af0: 310a0933 sm4ed x18,x20,x16,0x0 + # Check if x18 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x18, Zksed_sm4ed_cg_cp_sbox_b241, Zksed_sm4ed_cg_cp_sbox_b241_str) + 80009af4: 000b3383 ld x7,0(x22) + 80009af8: 01238c63 beq x7,x18,80009b10 + 80009afc: 6dc0146f jal x8,8000b1d8 + 80009b00: 80009af0 .word 0x80009af0 + 80009b04: 00000000 .word 0x00000000 + 80009b08: 80020b42 .word 0x80020b42 + 80009b0c: 00000000 .word 0x00000000 + 80009b10: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x15, x10) # load rs1: x10 = 0xf2f2f2f2f2f2f2f2 + 80009b14: 0007b503 ld x10,0(x15) + 80009b18: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x26) # load rs2: x26 = 0xf2f2f2f2f2f2f2f2 + 80009b1c: 0007bd03 ld x26,0(x15) + 80009b20: 00878793 addi x15,x15,8 + +0000000080009b24 : +Zksed_sm4ed_cg_cp_sbox_b242: + sm4ed x5, x10, x26, 1 # perform operation + 80009b24: 71a502b3 sm4ed x5,x10,x26,0x1 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b242, Zksed_sm4ed_cg_cp_sbox_b242_str) + 80009b28: 000b3383 ld x7,0(x22) + 80009b2c: 00538c63 beq x7,x5,80009b44 + 80009b30: 6a80146f jal x8,8000b1d8 + 80009b34: 80009b24 .word 0x80009b24 + 80009b38: 00000000 .word 0x00000000 + 80009b3c: 80020b7a .word 0x80020b7a + 80009b40: 00000000 .word 0x00000000 + 80009b44: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xf3f3f3f3f3f3f3f3 + 80009b48: 0007bf83 ld x31,0(x15) + 80009b4c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xf3f3f3f3f3f3f3f3 + 80009b50: 0007b803 ld x16,0(x15) + 80009b54: 00878793 addi x15,x15,8 + +0000000080009b58 : +Zksed_sm4ed_cg_cp_sbox_b243: + sm4ed x27, x31, x16, 2 # perform operation + 80009b58: b10f8db3 sm4ed x27,x31,x16,0x2 + # Check if x27 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x27, Zksed_sm4ed_cg_cp_sbox_b243, Zksed_sm4ed_cg_cp_sbox_b243_str) + 80009b5c: 000b3383 ld x7,0(x22) + 80009b60: 01b38c63 beq x7,x27,80009b78 + 80009b64: 6740146f jal x8,8000b1d8 + 80009b68: 80009b58 .word 0x80009b58 + 80009b6c: 00000000 .word 0x00000000 + 80009b70: 80020bb2 .word 0x80020bb2 + 80009b74: 00000000 .word 0x00000000 + 80009b78: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x15, x28) # load rs1: x28 = 0xf4f4f4f4f4f4f4f4 + 80009b7c: 0007be03 ld x28,0(x15) + 80009b80: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xf4f4f4f4f4f4f4f4 + 80009b84: 0007bc03 ld x24,0(x15) + 80009b88: 00878793 addi x15,x15,8 + +0000000080009b8c : +Zksed_sm4ed_cg_cp_sbox_b244: + sm4ed x6, x28, x24, 1 # perform operation + 80009b8c: 718e0333 sm4ed x6,x28,x24,0x1 + # Check if x6 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x6, Zksed_sm4ed_cg_cp_sbox_b244, Zksed_sm4ed_cg_cp_sbox_b244_str) + 80009b90: 000b3383 ld x7,0(x22) + 80009b94: 00638c63 beq x7,x6,80009bac + 80009b98: 6400146f jal x8,8000b1d8 + 80009b9c: 80009b8c .word 0x80009b8c + 80009ba0: 00000000 .word 0x00000000 + 80009ba4: 80020bea .word 0x80020bea + 80009ba8: 00000000 .word 0x00000000 + 80009bac: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs1: x2 = 0xf5f5f5f5f5f5f5f5 + 80009bb0: 0007b103 ld x2,0(x15) + 80009bb4: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xf5f5f5f5f5f5f5f5 + 80009bb8: 0007b303 ld x6,0(x15) + 80009bbc: 00878793 addi x15,x15,8 + +0000000080009bc0 : +Zksed_sm4ed_cg_cp_sbox_b245: + sm4ed x25, x2, x6, 3 # perform operation + 80009bc0: f0610cb3 sm4ed x25,x2,x6,0x3 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b245, Zksed_sm4ed_cg_cp_sbox_b245_str) + 80009bc4: 000b3383 ld x7,0(x22) + 80009bc8: 01938c63 beq x7,x25,80009be0 + 80009bcc: 60c0146f jal x8,8000b1d8 + 80009bd0: 80009bc0 .word 0x80009bc0 + 80009bd4: 00000000 .word 0x00000000 + 80009bd8: 80020c22 .word 0x80020c22 + 80009bdc: 00000000 .word 0x00000000 + 80009be0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs1: x13 = 0xf6f6f6f6f6f6f6f6 + 80009be4: 0007b683 ld x13,0(x15) + 80009be8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x29) # load rs2: x29 = 0xf6f6f6f6f6f6f6f6 + 80009bec: 0007be83 ld x29,0(x15) + 80009bf0: 00878793 addi x15,x15,8 + +0000000080009bf4 : +Zksed_sm4ed_cg_cp_sbox_b246: + sm4ed x17, x13, x29, 2 # perform operation + 80009bf4: b1d688b3 sm4ed x17,x13,x29,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b246, Zksed_sm4ed_cg_cp_sbox_b246_str) + 80009bf8: 000b3383 ld x7,0(x22) + 80009bfc: 01138c63 beq x7,x17,80009c14 + 80009c00: 5d80146f jal x8,8000b1d8 + 80009c04: 80009bf4 .word 0x80009bf4 + 80009c08: 00000000 .word 0x00000000 + 80009c0c: 80020c5a .word 0x80020c5a + 80009c10: 00000000 .word 0x00000000 + 80009c14: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xf7f7f7f7f7f7f7f7 + 80009c18: 0007b703 ld x14,0(x15) + 80009c1c: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x17) # load rs2: x17 = 0xf7f7f7f7f7f7f7f7 + 80009c20: 0007b883 ld x17,0(x15) + 80009c24: 00878793 addi x15,x15,8 + +0000000080009c28 : +Zksed_sm4ed_cg_cp_sbox_b247: + sm4ed x5, x14, x17, 3 # perform operation + 80009c28: f11702b3 sm4ed x5,x14,x17,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b247, Zksed_sm4ed_cg_cp_sbox_b247_str) + 80009c2c: 000b3383 ld x7,0(x22) + 80009c30: 00538c63 beq x7,x5,80009c48 + 80009c34: 5a40146f jal x8,8000b1d8 + 80009c38: 80009c28 .word 0x80009c28 + 80009c3c: 00000000 .word 0x00000000 + 80009c40: 80020c92 .word 0x80020c92 + 80009c44: 00000000 .word 0x00000000 + 80009c48: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xf8f8f8f8f8f8f8f8 + 80009c4c: 0007b203 ld x4,0(x15) + 80009c50: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x2) # load rs2: x2 = 0xf8f8f8f8f8f8f8f8 + 80009c54: 0007b103 ld x2,0(x15) + 80009c58: 00878793 addi x15,x15,8 + +0000000080009c5c : +Zksed_sm4ed_cg_cp_sbox_b248: + sm4ed x25, x4, x2, 0 # perform operation + 80009c5c: 30220cb3 sm4ed x25,x4,x2,0x0 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b248, Zksed_sm4ed_cg_cp_sbox_b248_str) + 80009c60: 000b3383 ld x7,0(x22) + 80009c64: 01938c63 beq x7,x25,80009c7c + 80009c68: 5700146f jal x8,8000b1d8 + 80009c6c: 80009c5c .word 0x80009c5c + 80009c70: 00000000 .word 0x00000000 + 80009c74: 80020cca .word 0x80020cca + 80009c78: 00000000 .word 0x00000000 + 80009c7c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xf9f9f9f9f9f9f9f9 + 80009c80: 0007bf83 ld x31,0(x15) + 80009c84: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x25) # load rs2: x25 = 0xf9f9f9f9f9f9f9f9 + 80009c88: 0007bc83 ld x25,0(x15) + 80009c8c: 00878793 addi x15,x15,8 + +0000000080009c90 : +Zksed_sm4ed_cg_cp_sbox_b249: + sm4ed x10, x31, x25, 3 # perform operation + 80009c90: f19f8533 sm4ed x10,x31,x25,0x3 + # Check if x10 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x10, Zksed_sm4ed_cg_cp_sbox_b249, Zksed_sm4ed_cg_cp_sbox_b249_str) + 80009c94: 000b3383 ld x7,0(x22) + 80009c98: 00a38c63 beq x7,x10,80009cb0 + 80009c9c: 53c0146f jal x8,8000b1d8 + 80009ca0: 80009c90 .word 0x80009c90 + 80009ca4: 00000000 .word 0x00000000 + 80009ca8: 80020d02 .word 0x80020d02 + 80009cac: 00000000 .word 0x00000000 + 80009cb0: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x15, x3) # load rs1: x3 = 0xfafafafafafafafa + 80009cb4: 0007b183 ld x3,0(x15) + 80009cb8: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x24) # load rs2: x24 = 0xfafafafafafafafa + 80009cbc: 0007bc03 ld x24,0(x15) + 80009cc0: 00878793 addi x15,x15,8 + +0000000080009cc4 : +Zksed_sm4ed_cg_cp_sbox_b250: + sm4ed x25, x3, x24, 0 # perform operation + 80009cc4: 31818cb3 sm4ed x25,x3,x24,0x0 + # Check if x25 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x25, Zksed_sm4ed_cg_cp_sbox_b250, Zksed_sm4ed_cg_cp_sbox_b250_str) + 80009cc8: 000b3383 ld x7,0(x22) + 80009ccc: 01938c63 beq x7,x25,80009ce4 + 80009cd0: 5080146f jal x8,8000b1d8 + 80009cd4: 80009cc4 .word 0x80009cc4 + 80009cd8: 00000000 .word 0x00000000 + 80009cdc: 80020d3a .word 0x80020d3a + 80009ce0: 00000000 .word 0x00000000 + 80009ce4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x15, x31) # load rs1: x31 = 0xfbfbfbfbfbfbfbfb + 80009ce8: 0007bf83 ld x31,0(x15) + 80009cec: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs2: x16 = 0xfbfbfbfbfbfbfbfb + 80009cf0: 0007b803 ld x16,0(x15) + 80009cf4: 00878793 addi x15,x15,8 + +0000000080009cf8 : +Zksed_sm4ed_cg_cp_sbox_b251: + sm4ed x24, x31, x16, 0 # perform operation + 80009cf8: 310f8c33 sm4ed x24,x31,x16,0x0 + # Check if x24 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x24, Zksed_sm4ed_cg_cp_sbox_b251, Zksed_sm4ed_cg_cp_sbox_b251_str) + 80009cfc: 000b3383 ld x7,0(x22) + 80009d00: 01838c63 beq x7,x24,80009d18 + 80009d04: 4d40146f jal x8,8000b1d8 + 80009d08: 80009cf8 .word 0x80009cf8 + 80009d0c: 00000000 .word 0x00000000 + 80009d10: 80020d72 .word 0x80020d72 + 80009d14: 00000000 .word 0x00000000 + 80009d18: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x15, x4) # load rs1: x4 = 0xfcfcfcfcfcfcfcfc + 80009d1c: 0007b203 ld x4,0(x15) + 80009d20: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x19) # load rs2: x19 = 0xfcfcfcfcfcfcfcfc + 80009d24: 0007b983 ld x19,0(x15) + 80009d28: 00878793 addi x15,x15,8 + +0000000080009d2c : +Zksed_sm4ed_cg_cp_sbox_b252: + sm4ed x21, x4, x19, 2 # perform operation + 80009d2c: b1320ab3 sm4ed x21,x4,x19,0x2 + # Check if x21 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x21, Zksed_sm4ed_cg_cp_sbox_b252, Zksed_sm4ed_cg_cp_sbox_b252_str) + 80009d30: 000b3383 ld x7,0(x22) + 80009d34: 01538c63 beq x7,x21,80009d4c + 80009d38: 4a00146f jal x8,8000b1d8 + 80009d3c: 80009d2c .word 0x80009d2c + 80009d40: 00000000 .word 0x00000000 + 80009d44: 80020daa .word 0x80020daa + 80009d48: 00000000 .word 0x00000000 + 80009d4c: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x15, x16) # load rs1: x16 = 0xfdfdfdfdfdfdfdfd + 80009d50: 0007b803 ld x16,0(x15) + 80009d54: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x6) # load rs2: x6 = 0xfdfdfdfdfdfdfdfd + 80009d58: 0007b303 ld x6,0(x15) + 80009d5c: 00878793 addi x15,x15,8 + +0000000080009d60 : +Zksed_sm4ed_cg_cp_sbox_b253: + sm4ed x17, x16, x6, 2 # perform operation + 80009d60: b06808b3 sm4ed x17,x16,x6,0x2 + # Check if x17 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x17, Zksed_sm4ed_cg_cp_sbox_b253, Zksed_sm4ed_cg_cp_sbox_b253_str) + 80009d64: 000b3383 ld x7,0(x22) + 80009d68: 01138c63 beq x7,x17,80009d80 + 80009d6c: 46c0146f jal x8,8000b1d8 + 80009d70: 80009d60 .word 0x80009d60 + 80009d74: 00000000 .word 0x00000000 + 80009d78: 80020de2 .word 0x80020de2 + 80009d7c: 00000000 .word 0x00000000 + 80009d80: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x15, x14) # load rs1: x14 = 0xfefefefefefefefe + 80009d84: 0007b703 ld x14,0(x15) + 80009d88: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x9) # load rs2: x9 = 0xfefefefefefefefe + 80009d8c: 0007b483 ld x9,0(x15) + 80009d90: 00878793 addi x15,x15,8 + +0000000080009d94 : +Zksed_sm4ed_cg_cp_sbox_b254: + sm4ed x5, x14, x9, 3 # perform operation + 80009d94: f09702b3 sm4ed x5,x14,x9,0x3 + # Check if x5 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x5, Zksed_sm4ed_cg_cp_sbox_b254, Zksed_sm4ed_cg_cp_sbox_b254_str) + 80009d98: 000b3383 ld x7,0(x22) + 80009d9c: 00538c63 beq x7,x5,80009db4 + 80009da0: 4380146f jal x8,8000b1d8 + 80009da4: 80009d94 .word 0x80009d94 + 80009da8: 00000000 .word 0x00000000 + 80009dac: 80020e1a .word 0x80020e1a + 80009db0: 00000000 .word 0x00000000 + 80009db4: 008b0b13 addi x22,x22,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x15, x27) # load rs1: x27 = 0xffffffffffffffff + 80009db8: 0007bd83 ld x27,0(x15) + 80009dbc: 00878793 addi x15,x15,8 + RVTEST_TESTDATA_LOAD_INT(x15, x13) # load rs2: x13 = 0xffffffffffffffff + 80009dc0: 0007b683 ld x13,0(x15) + 80009dc4: 00878793 addi x15,x15,8 + +0000000080009dc8 : +Zksed_sm4ed_cg_cp_sbox_b255: + sm4ed x1, x27, x13, 2 # perform operation + 80009dc8: b0dd80b3 sm4ed x1,x27,x13,0x2 + # Check if x1 contains the expected result. x22 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x22, x8, x7, x1, Zksed_sm4ed_cg_cp_sbox_b255, Zksed_sm4ed_cg_cp_sbox_b255_str) + 80009dcc: 000b3383 ld x7,0(x22) + 80009dd0: 00138c63 beq x7,x1,80009de8 + 80009dd4: 4040146f jal x8,8000b1d8 + 80009dd8: 80009dc8 .word 0x80009dc8 + 80009ddc: 00000000 .word 0x00000000 + 80009de0: 80020e52 .word 0x80020e52 + 80009de4: 00000000 .word 0x00000000 + 80009de8: 008b0b13 addi x22,x22,8 + + mv x2, x22 # restore signature pointer to default register for teardown + 80009dec: 000b0113 addi x2,x22,0 + +0000000080009df0 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009df0: 00000513 addi x10,x0,0 + 80009df4: 00000073 ecall + 80009df8: fff00513 addi x10,x0,-1 + 80009dfc: 25800413 addi x8,x0,600 + +0000000080009e00 : + 80009e00: 34002373 csrrs x6,mscratch,x0 + +0000000080009e04 : + 80009e04: 2b833383 ld x7,696(x6) + +0000000080009e08 : + 80009e08: 2a033383 ld x7,672(x6) + +0000000080009e0c : + 80009e0c: 2d033483 ld x9,720(x6) + 80009e10: 34049073 csrrw x0,mscratch,x9 + +0000000080009e14 : + 80009e14: 2c833483 ld x9,712(x6) + 80009e18: 305493f3 csrrw x7,mtvec,x9 + 80009e1c: ffc4f493 andi x9,x9,-4 + 80009e20: ffc3f393 andi x7,x7,-4 + 80009e24: 00749e63 bne x9,x7,80009e40 + +0000000080009e28 : + 80009e28: 00030493 addi x9,x6,0 + +0000000080009e2c : + 80009e2c: 0004a783 lw x15,0(x9) + 80009e30: 00f3a023 sw x15,0(x7) + 80009e34: 00438393 addi x7,x7,4 + 80009e38: 00448493 addi x9,x9,4 + 80009e3c: fe83c8e3 blt x7,x8,80009e2c + 80009e40: 0000100f fence.i + +0000000080009e44 : + 80009e44: 00000013 addi x0,x0,0 + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00000497 auipc x9,0x0 + 80009e64: 2b048493 addi x9,x9,688 # 8000a110 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 10e49863 bne x9,x14,80009f90 + 80009e84: 00000013 addi x0,x0,0 + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00017517 auipc x10,0x17 + 80009ea4: 71050513 addi x10,x10,1808 # 800215b0 + 80009ea8: 00000013 addi x0,x0,0 + 80009eac: 00000013 addi x0,x0,0 + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00038097 auipc x1,0x38 + 80009ec4: 6e4080e7 jalr x1,1764(x1) # 800425a4 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00017517 auipc x10,0x17 + 80009ee4: 70b50513 addi x10,x10,1803 # 800215eb + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 00038097 auipc x1,0x38 + 80009f04: 6a4080e7 jalr x1,1700(x1) # 800425a4 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 00017517 auipc x10,0x17 + 80009f24: 72b50513 addi x10,x10,1835 # 8002164b + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 00038097 auipc x1,0x38 + 80009f44: 664080e7 jalr x1,1636(x1) # 800425a4 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00018517 auipc x10,0x18 + 80009f64: 29650513 addi x10,x10,662 # 800221f6 + 80009f68: 00000013 addi x0,x0,0 + 80009f6c: 00000013 addi x0,x0,0 + 80009f70: 00000013 addi x0,x0,0 + 80009f74: 00000013 addi x0,x0,0 + 80009f78: 00000013 addi x0,x0,0 + 80009f7c: 00000013 addi x0,x0,0 + 80009f80: 00038097 auipc x1,0x38 + 80009f84: 624080e7 jalr x1,1572(x1) # 800425a4 + 80009f88: 00038097 auipc x1,0x38 + 80009f8c: 67c080e7 jalr x1,1660(x1) # 80042604 + +0000000080009f90 : + 80009f90: 00000013 addi x0,x0,0 + 80009f94: 00000013 addi x0,x0,0 + 80009f98: 00000013 addi x0,x0,0 + 80009f9c: 00000013 addi x0,x0,0 + 80009fa0: 00006317 auipc x6,0x6 + 80009fa4: 40830313 addi x6,x6,1032 # 800103a8 + 80009fa8: 00000013 addi x0,x0,0 + 80009fac: 00000013 addi x0,x0,0 + 80009fb0: 00000013 addi x0,x0,0 + 80009fb4: 00000013 addi x0,x0,0 + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00033303 ld x6,0(x6) + 80009fc4: 00000013 addi x0,x0,0 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 0001a397 auipc x7,0x1a + 80009fe4: 53038393 addi x7,x7,1328 # 80024510 + 80009fe8: 00000013 addi x0,x0,0 + 80009fec: 00000013 addi x0,x0,0 + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 40730333 sub x6,x6,x7 + 8000a004: 00000013 addi x0,x0,0 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 0001a417 auipc x8,0x1a + 8000a024: 4e040413 addi x8,x8,1248 # 80024500 + 8000a028: 00000013 addi x0,x0,0 + 8000a02c: 00000013 addi x0,x0,0 + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00043203 ld x4,0(x8) + 8000a044: 00620c63 beq x4,x6,8000a05c + 8000a048: 1e0013ef jal x7,8000b228 + 8000a04c: 80009f90 .word 0x80009f90 + 8000a050: 00000000 .word 0x00000000 + 8000a054: 8002179f .word 0x8002179f + 8000a058: 00000000 .word 0x00000000 + +000000008000a05c : + 8000a05c: 000004b7 lui x9,0x0 + 8000a060: 00048493 addi x9,x9,0 # 0 + 8000a064: 00b49493 slli x9,x9,0xb + 8000a068: 5d648493 addi x9,x9,1494 + 8000a06c: 00b49493 slli x9,x9,0xb + 8000a070: 43748493 addi x9,x9,1079 + 8000a074: 00a49493 slli x9,x9,0xa + 8000a078: 2ad48493 addi x9,x9,685 + 8000a07c: 00e49e63 bne x9,x14,8000a098 + 8000a080: 1a8013ef jal x7,8000b228 + 8000a084: 8000a144 .word 0x8000a144 + 8000a088: 00000000 .word 0x00000000 + 8000a08c: 8002160d .word 0x8002160d + 8000a090: 00000000 .word 0x00000000 + 8000a094: 00000341 .word 0x00000341 + +000000008000a098 : + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00017517 auipc x10,0x17 + 8000a0a4: 4d450513 addi x10,x10,1236 # 80021574 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + 8000a0c0: 00038097 auipc x1,0x38 + 8000a0c4: 4e4080e7 jalr x1,1252(x1) # 800425a4 + 8000a0c8: 00038097 auipc x1,0x38 + 8000a0cc: 51c080e7 jalr x1,1308(x1) # 800425e4 + +000000008000a0d0 : + 8000a0d0: 00000013 addi x0,x0,0 + 8000a0d4: 00000013 addi x0,x0,0 + 8000a0d8: 00000013 addi x0,x0,0 + 8000a0dc: 00000013 addi x0,x0,0 + 8000a0e0: 00017517 auipc x10,0x17 + 8000a0e4: 4d050513 addi x10,x10,1232 # 800215b0 + 8000a0e8: 00000013 addi x0,x0,0 + 8000a0ec: 00000013 addi x0,x0,0 + 8000a0f0: 00000013 addi x0,x0,0 + 8000a0f4: 00000013 addi x0,x0,0 + 8000a0f8: 00000013 addi x0,x0,0 + 8000a0fc: 00000013 addi x0,x0,0 + 8000a100: 00038097 auipc x1,0x38 + 8000a104: 4a4080e7 jalr x1,1188(x1) # 800425a4 + 8000a108: 00038097 auipc x1,0x38 + 8000a10c: 4fc080e7 jalr x1,1276(x1) # 80042604 + +000000008000a110 : + 8000a110: 00000013 addi x0,x0,0 + 8000a114: 00000013 addi x0,x0,0 + 8000a118: 00000013 addi x0,x0,0 + 8000a11c: 00000013 addi x0,x0,0 + 8000a120: 00000717 auipc x14,0x0 + 8000a124: ff070713 addi x14,x14,-16 # 8000a110 + 8000a128: 00000013 addi x0,x0,0 + 8000a12c: 00000013 addi x0,x0,0 + 8000a130: 00000013 addi x0,x0,0 + 8000a134: 00000013 addi x0,x0,0 + 8000a138: 00000013 addi x0,x0,0 + 8000a13c: 00000013 addi x0,x0,0 + 8000a140: cb1ff06f jal x0,80009df0 + +000000008000a144 : + 8000a144: 00000737 lui x14,0x0 + 8000a148: 00070713 addi x14,x14,0 # 0 + 8000a14c: 00b71713 slli x14,x14,0xb + 8000a150: 5d670713 addi x14,x14,1494 + 8000a154: 00b71713 slli x14,x14,0xb + 8000a158: 43770713 addi x14,x14,1079 + 8000a15c: 00a71713 slli x14,x14,0xa + 8000a160: 2ad70713 addi x14,x14,685 + 8000a164: c8dff06f jal x0,80009df0 + 8000a168: 00000013 addi x0,x0,0 + 8000a16c: 00000013 addi x0,x0,0 + 8000a170: 00000013 addi x0,x0,0 + 8000a174: 00000013 addi x0,x0,0 + 8000a178: 00000013 addi x0,x0,0 + 8000a17c: 00000013 addi x0,x0,0 + +000000008000a180 : + 8000a180: 1000006f jal x0,8000a280 + 8000a184: 1080006f jal x0,8000a28c + 8000a188: 1100006f jal x0,8000a298 + 8000a18c: 1180006f jal x0,8000a2a4 + 8000a190: 1200006f jal x0,8000a2b0 + 8000a194: 1280006f jal x0,8000a2bc + 8000a198: 1300006f jal x0,8000a2c8 + 8000a19c: 1380006f jal x0,8000a2d4 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 1480006f jal x0,8000a2ec + 8000a1a8: 1500006f jal x0,8000a2f8 + 8000a1ac: 1580006f jal x0,8000a304 + 8000a1b0: 1600006f jal x0,8000a310 + 8000a1b4: 1680006f jal x0,8000a31c + 8000a1b8: 1700006f jal x0,8000a328 + 8000a1bc: 1780006f jal x0,8000a334 + 8000a1c0: 1800006f jal x0,8000a340 + 8000a1c4: 1880006f jal x0,8000a34c + 8000a1c8: 1900006f jal x0,8000a358 + 8000a1cc: 1980006f jal x0,8000a364 + 8000a1d0: 1a00006f jal x0,8000a370 + 8000a1d4: 1a80006f jal x0,8000a37c + 8000a1d8: 1b00006f jal x0,8000a388 + 8000a1dc: 1b80006f jal x0,8000a394 + 8000a1e0: 1c00006f jal x0,8000a3a0 + 8000a1e4: 1bc0006f jal x0,8000a3a0 + 8000a1e8: 1b80006f jal x0,8000a3a0 + 8000a1ec: 1b40006f jal x0,8000a3a0 + 8000a1f0: 1b00006f jal x0,8000a3a0 + 8000a1f4: 1ac0006f jal x0,8000a3a0 + 8000a1f8: 1a80006f jal x0,8000a3a0 + 8000a1fc: 1a40006f jal x0,8000a3a0 + 8000a200: 1a00006f jal x0,8000a3a0 + 8000a204: 19c0006f jal x0,8000a3a0 + 8000a208: 1980006f jal x0,8000a3a0 + 8000a20c: 1940006f jal x0,8000a3a0 + 8000a210: 1900006f jal x0,8000a3a0 + 8000a214: 18c0006f jal x0,8000a3a0 + 8000a218: 1880006f jal x0,8000a3a0 + 8000a21c: 1840006f jal x0,8000a3a0 + 8000a220: 1800006f jal x0,8000a3a0 + 8000a224: 17c0006f jal x0,8000a3a0 + 8000a228: 1780006f jal x0,8000a3a0 + 8000a22c: 1740006f jal x0,8000a3a0 + 8000a230: 1700006f jal x0,8000a3a0 + 8000a234: 16c0006f jal x0,8000a3a0 + 8000a238: 1680006f jal x0,8000a3a0 + 8000a23c: 1640006f jal x0,8000a3a0 + 8000a240: 1600006f jal x0,8000a3a0 + 8000a244: 15c0006f jal x0,8000a3a0 + 8000a248: 1580006f jal x0,8000a3a0 + 8000a24c: 1540006f jal x0,8000a3a0 + 8000a250: 1500006f jal x0,8000a3a0 + 8000a254: 14c0006f jal x0,8000a3a0 + 8000a258: 1480006f jal x0,8000a3a0 + 8000a25c: 1440006f jal x0,8000a3a0 + 8000a260: 1400006f jal x0,8000a3a0 + 8000a264: 13c0006f jal x0,8000a3a0 + 8000a268: 1380006f jal x0,8000a3a0 + 8000a26c: 1340006f jal x0,8000a3a0 + 8000a270: 1300006f jal x0,8000a3a0 + 8000a274: 12c0006f jal x0,8000a3a0 + 8000a278: 1280006f jal x0,8000a3a0 + 8000a27c: 1240006f jal x0,8000a3a0 + +000000008000a280 : + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 13c007ef jal x15,8000a3c4 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 130007ef jal x15,8000a3c4 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 124007ef jal x15,8000a3c4 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 118007ef jal x15,8000a3c4 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 10c007ef jal x15,8000a3c4 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 100007ef jal x15,8000a3c4 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 0f4007ef jal x15,8000a3c4 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 0e8007ef jal x15,8000a3c4 + 8000a2e0: 34011173 csrrw x2,mscratch,x2 + 8000a2e4: 30f13423 sd x15,776(x2) + 8000a2e8: 0dc007ef jal x15,8000a3c4 + 8000a2ec: 34011173 csrrw x2,mscratch,x2 + 8000a2f0: 30f13423 sd x15,776(x2) + 8000a2f4: 0d0007ef jal x15,8000a3c4 + 8000a2f8: 34011173 csrrw x2,mscratch,x2 + 8000a2fc: 30f13423 sd x15,776(x2) + 8000a300: 0c4007ef jal x15,8000a3c4 + 8000a304: 34011173 csrrw x2,mscratch,x2 + 8000a308: 30f13423 sd x15,776(x2) + 8000a30c: 0b8007ef jal x15,8000a3c4 + 8000a310: 34011173 csrrw x2,mscratch,x2 + 8000a314: 30f13423 sd x15,776(x2) + 8000a318: 0ac007ef jal x15,8000a3c4 + 8000a31c: 34011173 csrrw x2,mscratch,x2 + 8000a320: 30f13423 sd x15,776(x2) + 8000a324: 0a0007ef jal x15,8000a3c4 + 8000a328: 34011173 csrrw x2,mscratch,x2 + 8000a32c: 30f13423 sd x15,776(x2) + 8000a330: 094007ef jal x15,8000a3c4 + 8000a334: 34011173 csrrw x2,mscratch,x2 + 8000a338: 30f13423 sd x15,776(x2) + 8000a33c: 088007ef jal x15,8000a3c4 + 8000a340: 34011173 csrrw x2,mscratch,x2 + 8000a344: 30f13423 sd x15,776(x2) + 8000a348: 07c007ef jal x15,8000a3c4 + 8000a34c: 34011173 csrrw x2,mscratch,x2 + 8000a350: 30f13423 sd x15,776(x2) + 8000a354: 070007ef jal x15,8000a3c4 + 8000a358: 34011173 csrrw x2,mscratch,x2 + 8000a35c: 30f13423 sd x15,776(x2) + 8000a360: 064007ef jal x15,8000a3c4 + 8000a364: 34011173 csrrw x2,mscratch,x2 + 8000a368: 30f13423 sd x15,776(x2) + 8000a36c: 058007ef jal x15,8000a3c4 + 8000a370: 34011173 csrrw x2,mscratch,x2 + 8000a374: 30f13423 sd x15,776(x2) + 8000a378: 04c007ef jal x15,8000a3c4 + 8000a37c: 34011173 csrrw x2,mscratch,x2 + 8000a380: 30f13423 sd x15,776(x2) + 8000a384: 040007ef jal x15,8000a3c4 + 8000a388: 34011173 csrrw x2,mscratch,x2 + 8000a38c: 30f13423 sd x15,776(x2) + 8000a390: 034007ef jal x15,8000a3c4 + 8000a394: 34011173 csrrw x2,mscratch,x2 + 8000a398: 30f13423 sd x15,776(x2) + 8000a39c: 028007ef jal x15,8000a3c4 + +000000008000a3a0 : + 8000a3a0: 00000317 auipc x6,0x0 + 8000a3a4: aa430313 addi x6,x6,-1372 # 80009e44 + 8000a3a8: 00000013 addi x0,x0,0 + 8000a3ac: 00000013 addi x0,x0,0 + 8000a3b0: 00000013 addi x0,x0,0 + 8000a3b4: 00000013 addi x0,x0,0 + 8000a3b8: 00000013 addi x0,x0,0 + 8000a3bc: 00000013 addi x0,x0,0 + 8000a3c0: 00030067 jalr x0,0(x6) + +000000008000a3c4 : + 8000a3c4: 30e13023 sd x14,768(x2) + 8000a3c8: 34011773 csrrw x14,mscratch,x2 + 8000a3cc: 30e13823 sd x14,784(x2) + 8000a3d0: 2b013703 ld x14,688(x2) + 8000a3d4: 00070067 jalr x0,0(x14) + +000000008000a3d8 : + 8000a3d8: 2e913c23 sd x9,760(x2) + 8000a3dc: 2e813823 sd x8,752(x2) + 8000a3e0: 2e713423 sd x7,744(x2) + 8000a3e4: 2e613023 sd x6,736(x2) + 8000a3e8: 00000013 addi x0,x0,0 + 8000a3ec: 00000013 addi x0,x0,0 + 8000a3f0: 00000013 addi x0,x0,0 + 8000a3f4: 00000013 addi x0,x0,0 + 8000a3f8: 00000013 addi x0,x0,0 + 8000a3fc: 00000013 addi x0,x0,0 + 8000a400: 00006317 auipc x6,0x6 + 8000a404: d0830313 addi x6,x6,-760 # 80010108 + 8000a408: 00000013 addi x0,x0,0 + 8000a40c: 00000013 addi x0,x0,0 + 8000a410: 00000013 addi x0,x0,0 + 8000a414: 00000013 addi x0,x0,0 + 8000a418: 00000013 addi x0,x0,0 + 8000a41c: 00000013 addi x0,x0,0 + 8000a420: 00033383 ld x7,0(x6) + 8000a424: 00138393 addi x7,x7,1 + 8000a428: 00733023 sd x7,0(x6) + 8000a42c: 34202773 csrrs x14,mcause,x0 + +000000008000a430 : + 8000a430: fff00493 addi x9,x0,-1 + 8000a434: 00d4d493 srli x9,x9,0xd + 8000a438: 00c49493 slli x9,x9,0xc + 8000a43c: fff4c493 xori x9,x9,-1 + 8000a440: 00e4f4b3 and x9,x9,x14 + +000000008000a444 : + 8000a444: ffe48413 addi x8,x9,-2 + 8000a448: 00041663 bne x8,x0,8000a454 + +000000008000a44c : + 8000a44c: 500502e3 beq x10,x0,8000b150 + 8000a450: 5b40006f jal x0,8000aa04 + +000000008000a454 : + 8000a454: ff848413 addi x8,x9,-8 + 8000a458: 00245413 srli x8,x8,0x2 + 8000a45c: 5a041463 bne x8,x0,8000aa04 + +000000008000a460 : + 8000a460: 4e0508e3 beq x10,x0,8000b150 + +000000008000a464 : + 8000a464: fff50493 addi x9,x10,-1 + 8000a468: 00500393 addi x7,x0,5 + 8000a46c: 0274e063 bltu x9,x7,8000a48c + 8000a470: 07300393 addi x7,x0,115 + 8000a474: 00750463 beq x10,x7,8000a47c + 8000a478: 08c0006f jal x0,8000a504 + +000000008000a47c : + 8000a47c: 34102573 csrrs x10,mepc,x0 + 8000a480: 00450413 addi x8,x10,4 + 8000a484: 34141073 csrrw x0,mepc,x8 + 8000a488: 0310006f jal x0,8000acb8 + +000000008000a48c : + 8000a48c: 341024f3 csrrs x9,mepc,x0 + 8000a490: 00448493 addi x9,x9,4 + 8000a494: 34149073 csrrw x0,mepc,x9 + 8000a498: 00100393 addi x7,x0,1 + 8000a49c: 00750e63 beq x10,x7,8000a4b8 + 8000a4a0: 00200393 addi x7,x0,2 + 8000a4a4: 02750463 beq x10,x7,8000a4cc + 8000a4a8: 00300393 addi x7,x0,3 + 8000a4ac: 04750063 beq x10,x7,8000a4ec + 8000a4b0: fff00513 addi x10,x0,-1 + 8000a4b4: 0050006f jal x0,8000acb8 + +000000008000a4b8 : + 8000a4b8: fff00493 addi x9,x0,-1 + 8000a4bc: 03e4d493 srli x9,x9,0x3e + 8000a4c0: 00b49493 slli x9,x9,0xb + 8000a4c4: 3004a073 csrrs x0,mstatus,x9 + 8000a4c8: 7f00006f jal x0,8000acb8 + +000000008000a4cc : + 8000a4cc: fff00493 addi x9,x0,-1 + 8000a4d0: 03e4d493 srli x9,x9,0x3e + 8000a4d4: 00b49493 slli x9,x9,0xb + 8000a4d8: 3004b073 csrrc x0,mstatus,x9 + 8000a4dc: 00100493 addi x9,x0,1 + 8000a4e0: 00b49493 slli x9,x9,0xb + 8000a4e4: 3004a073 csrrs x0,mstatus,x9 + 8000a4e8: 7d00006f jal x0,8000acb8 + +000000008000a4ec : + 8000a4ec: fff00493 addi x9,x0,-1 + 8000a4f0: 03e4d493 srli x9,x9,0x3e + 8000a4f4: 00b49493 slli x9,x9,0xb + 8000a4f8: 3004b073 csrrc x0,mstatus,x9 + 8000a4fc: 7bc0006f jal x0,8000acb8 + +000000008000a500 : + 8000a500: 00000013 addi x0,x0,0 + +000000008000a504 : + 8000a504: 00000013 addi x0,x0,0 + 8000a508: 00000013 addi x0,x0,0 + 8000a50c: 00000013 addi x0,x0,0 + 8000a510: 00000013 addi x0,x0,0 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00000397 auipc x7,0x0 + 8000a524: 17038393 addi x7,x7,368 # 8000a690 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + +000000008000a540 : + 8000a540: 0003e403 lwu x8,0(x7) + 8000a544: 00a40863 beq x8,x10,8000a554 + 8000a548: 04040863 beq x8,x0,8000a598 + 8000a54c: 00838393 addi x7,x7,8 + 8000a550: ff1ff06f jal x0,8000a540 + +000000008000a554 : + 8000a554: 00008493 addi x9,x1,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00000097 auipc x1,0x0 + 8000a564: 02408093 addi x1,x1,36 # 8000a584 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00038067 jalr x0,0(x7) + +000000008000a584 : + 8000a584: 00048093 addi x1,x9,0 + 8000a588: 34102473 csrrs x8,mepc,x0 + 8000a58c: 00440413 addi x8,x8,4 + 8000a590: 34141073 csrrw x0,mepc,x8 + 8000a594: 7240006f jal x0,8000acb8 + +000000008000a598 : + 8000a598: 00050493 addi x9,x10,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00018517 auipc x10,0x18 + 8000a5a4: 68d50513 addi x10,x10,1677 # 80022c2d + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00038097 auipc x1,0x38 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000a5c8: 00048513 addi x10,x9,0 + 8000a5cc: 02000593 addi x11,x0,32 + 8000a5d0: 728020ef jal x1,8000ccf8 + 8000a5d4: 00000013 addi x0,x0,0 + 8000a5d8: 00000013 addi x0,x0,0 + 8000a5dc: 00000013 addi x0,x0,0 + 8000a5e0: 00017517 auipc x10,0x17 + 8000a5e4: a1850513 addi x10,x10,-1512 # 80020ff8 + 8000a5e8: 00000013 addi x0,x0,0 + 8000a5ec: 00000013 addi x0,x0,0 + 8000a5f0: 00000013 addi x0,x0,0 + 8000a5f4: 00000013 addi x0,x0,0 + 8000a5f8: 00000013 addi x0,x0,0 + 8000a5fc: 00000013 addi x0,x0,0 + 8000a600: 00038097 auipc x1,0x38 + 8000a604: fa4080e7 jalr x1,-92(x1) # 800425a4 + 8000a608: 00000013 addi x0,x0,0 + 8000a60c: 00000013 addi x0,x0,0 + 8000a610: 00000013 addi x0,x0,0 + 8000a614: 00000013 addi x0,x0,0 + 8000a618: 00000013 addi x0,x0,0 + 8000a61c: 00000013 addi x0,x0,0 + 8000a620: 00017517 auipc x10,0x17 + 8000a624: 09450513 addi x10,x10,148 # 800216b4 + 8000a628: 00000013 addi x0,x0,0 + 8000a62c: 00000013 addi x0,x0,0 + 8000a630: 00000013 addi x0,x0,0 + 8000a634: 00000013 addi x0,x0,0 + 8000a638: 00000013 addi x0,x0,0 + 8000a63c: 00000013 addi x0,x0,0 + 8000a640: 00038097 auipc x1,0x38 + 8000a644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000a648: 00000013 addi x0,x0,0 + 8000a64c: 00000013 addi x0,x0,0 + 8000a650: 00000013 addi x0,x0,0 + 8000a654: 00000013 addi x0,x0,0 + 8000a658: 00000013 addi x0,x0,0 + 8000a65c: 00000013 addi x0,x0,0 + 8000a660: 00017517 auipc x10,0x17 + 8000a664: f5050513 addi x10,x10,-176 # 800215b0 + 8000a668: 00000013 addi x0,x0,0 + 8000a66c: 00000013 addi x0,x0,0 + 8000a670: 00000013 addi x0,x0,0 + 8000a674: 00000013 addi x0,x0,0 + 8000a678: 00000013 addi x0,x0,0 + 8000a67c: 00000013 addi x0,x0,0 + 8000a680: 00038097 auipc x1,0x38 + 8000a684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000a688: 00038097 auipc x1,0x38 + 8000a68c: f7c080e7 jalr x1,-132(x1) # 80042604 + +000000008000a690 : + 8000a690: 30002573 .word 0x30002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 30059073 .word 0x30059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3005a073 .word 0x3005a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3005b073 .word 0x3005b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: 30402573 .word 0x30402573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: 30459073 .word 0x30459073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: 3045a073 .word 0x3045a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: 3045b073 .word 0x3045b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: 30602573 .word 0x30602573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: 30659073 .word 0x30659073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: 3065a073 .word 0x3065a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: 3065b073 .word 0x3065b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 30a02573 .word 0x30a02573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 30a59073 .word 0x30a59073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 30a5a073 .word 0x30a5a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 30a5b073 .word 0x30a5b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 34402573 .word 0x34402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 34459073 .word 0x34459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 3445a073 .word 0x3445a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 3445b073 .word 0x3445b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 74702573 .word 0x74702573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 74759073 .word 0x74759073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 7475a073 .word 0x7475a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 7475b073 .word 0x7475b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 32002573 .word 0x32002573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 32059073 .word 0x32059073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 3205a073 .word 0x3205a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 3205b073 .word 0x3205b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: b0002573 .word 0xb0002573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: b0059073 .word 0xb0059073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: b005a073 .word 0xb005a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: b005b073 .word 0xb005b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: b0202573 .word 0xb0202573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: b0259073 .word 0xb0259073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: b025a073 .word 0xb025a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: b025b073 .word 0xb025b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 10002573 .word 0x10002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 10059073 .word 0x10059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1005a073 .word 0x1005a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1005b073 .word 0x1005b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 10402573 .word 0x10402573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 10459073 .word 0x10459073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 1045a073 .word 0x1045a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 1045b073 .word 0x1045b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 10602573 .word 0x10602573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 10659073 .word 0x10659073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 1065a073 .word 0x1065a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 1065b073 .word 0x1065b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 10a02573 .word 0x10a02573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 10a59073 .word 0x10a59073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 10a5a073 .word 0x10a5a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 10a5b073 .word 0x10a5b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 14402573 .word 0x14402573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 14459073 .word 0x14459073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 1445a073 .word 0x1445a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 1445b073 .word 0x1445b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 14d02573 .word 0x14d02573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 14d59073 .word 0x14d59073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 14d5a073 .word 0x14d5a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 14d5b073 .word 0x14d5b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 18002573 .word 0x18002573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 18059073 .word 0x18059073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 1805a073 .word 0x1805a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 1805b073 .word 0x1805b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a002573 .word 0x7a002573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a059073 .word 0x7a059073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a05a073 .word 0x7a05a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a05b073 .word 0x7a05b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7a102573 .word 0x7a102573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7a159073 .word 0x7a159073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7a15a073 .word 0x7a15a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7a15b073 .word 0x7a15b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 7a202573 .word 0x7a202573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 7a259073 .word 0x7a259073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 7a25a073 .word 0x7a25a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 7a25b073 .word 0x7a25b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 7a302573 .word 0x7a302573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 7a359073 .word 0x7a359073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 7a35a073 .word 0x7a35a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 7a35b073 .word 0x7a35b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 7a402573 .word 0x7a402573 + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 7a459073 .word 0x7a459073 + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 7a45a073 .word 0x7a45a073 + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 7a45b073 .word 0x7a45b073 + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 7a502573 .word 0x7a502573 + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 7a559073 .word 0x7a559073 + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 7a55a073 .word 0x7a55a073 + 8000a944: 00008067 jalr x0,0(x1) + 8000a948: 7a55b073 .word 0x7a55b073 + 8000a94c: 00008067 jalr x0,0(x1) + 8000a950: 7a802573 .word 0x7a802573 + 8000a954: 00008067 jalr x0,0(x1) + 8000a958: 7a859073 .word 0x7a859073 + 8000a95c: 00008067 jalr x0,0(x1) + 8000a960: 7a85a073 .word 0x7a85a073 + 8000a964: 00008067 jalr x0,0(x1) + 8000a968: 7a85b073 .word 0x7a85b073 + 8000a96c: 00008067 jalr x0,0(x1) + 8000a970: 7aa02573 .word 0x7aa02573 + 8000a974: 00008067 jalr x0,0(x1) + 8000a978: 7aa59073 .word 0x7aa59073 + 8000a97c: 00008067 jalr x0,0(x1) + 8000a980: 7aa5a073 .word 0x7aa5a073 + 8000a984: 00008067 jalr x0,0(x1) + 8000a988: 7aa5b073 .word 0x7aa5b073 + 8000a98c: 00008067 jalr x0,0(x1) + 8000a990: 5a802573 .word 0x5a802573 + 8000a994: 00008067 jalr x0,0(x1) + 8000a998: 5a859073 .word 0x5a859073 + 8000a99c: 00008067 jalr x0,0(x1) + 8000a9a0: 5a85a073 .word 0x5a85a073 + 8000a9a4: 00008067 jalr x0,0(x1) + 8000a9a8: 5a85b073 .word 0x5a85b073 + 8000a9ac: 00008067 jalr x0,0(x1) + 8000a9b0: 6a802573 .word 0x6a802573 + 8000a9b4: 00008067 jalr x0,0(x1) + 8000a9b8: 6a859073 .word 0x6a859073 + 8000a9bc: 00008067 jalr x0,0(x1) + 8000a9c0: 6a85a073 .word 0x6a85a073 + 8000a9c4: 00008067 jalr x0,0(x1) + 8000a9c8: 6a85b073 .word 0x6a85b073 + 8000a9cc: 00008067 jalr x0,0(x1) + 8000a9d0: 0005a503 lw x10,0(x11) + 8000a9d4: 00008067 jalr x0,0(x1) + 8000a9d8: 0045a503 lw x10,4(x11) + 8000a9dc: 00008067 jalr x0,0(x1) + 8000a9e0: 00c5a023 sw x12,0(x11) + 8000a9e4: 00008067 jalr x0,0(x1) + 8000a9e8: 00c5a223 sw x12,4(x11) + 8000a9ec: 00008067 jalr x0,0(x1) + 8000a9f0: 0005b503 ld x10,0(x11) + 8000a9f4: 00008067 jalr x0,0(x1) + 8000a9f8: 00c5b023 sd x12,0(x11) + 8000a9fc: 00008067 jalr x0,0(x1) + 8000aa00: 00000000 .word 0x00000000 + +000000008000aa04 : + 8000aa04: 02000393 addi x7,x0,32 + 8000aa08: 00075c63 bge x14,x0,8000aa20 + +000000008000aa0c : + 8000aa0c: 00171413 slli x8,x14,0x1 + 8000aa10: ff240413 addi x8,x8,-14 + 8000aa14: 00045663 bge x8,x0,8000aa20 + 8000aa18: 01800393 addi x7,x0,24 + 8000aa1c: 0040006f jal x0,8000aa20 + +000000008000aa20 : + 8000aa20: ca810113 addi x2,x2,-856 + 8000aa24: 5f013303 ld x6,1520(x2) + 8000aa28: 007304b3 add x9,x6,x7 + 8000aa2c: 5e913823 sd x9,1520(x2) + 8000aa30: 5d013403 ld x8,1488(x2) + 8000aa34: 40830333 sub x6,x6,x8 + 8000aa38: 35810113 addi x2,x2,856 + 8000aa3c: 27813403 ld x8,632(x2) + 8000aa40: 00830333 add x6,x6,x8 + 8000aa44: 34102473 csrrs x8,mepc,x0 + 8000aa48: 00000013 addi x0,x0,0 + 8000aa4c: 00000013 addi x0,x0,0 + 8000aa50: 00000013 addi x0,x0,0 + 8000aa54: 00000013 addi x0,x0,0 + 8000aa58: 00000013 addi x0,x0,0 + 8000aa5c: 00000013 addi x0,x0,0 + 8000aa60: 00016497 auipc x9,0x16 + 8000aa64: 57848493 addi x9,x9,1400 # 80020fd8 + 8000aa68: 00000013 addi x0,x0,0 + 8000aa6c: 00000013 addi x0,x0,0 + 8000aa70: 00000013 addi x0,x0,0 + 8000aa74: 00000013 addi x0,x0,0 + 8000aa78: 00000013 addi x0,x0,0 + 8000aa7c: 00000013 addi x0,x0,0 + 8000aa80: 0084b023 sd x8,0(x9) + 8000aa84: 00e4b423 sd x14,8(x9) + 8000aa88: 34302473 csrrs x8,mtval,x0 + 8000aa8c: 0084b823 sd x8,16(x9) + 8000aa90: 30002473 csrrs x8,mstatus,x0 + 8000aa94: 0084bc23 sd x8,24(x9) + 8000aa98: 00000013 addi x0,x0,0 + 8000aa9c: 00000013 addi x0,x0,0 + 8000aaa0: 00037417 auipc x8,0x37 + 8000aaa4: f3840413 addi x8,x8,-200 # 800419d8 + 8000aaa8: 00000013 addi x0,x0,0 + 8000aaac: 00000013 addi x0,x0,0 + 8000aab0: 00000013 addi x0,x0,0 + 8000aab4: 00000013 addi x0,x0,0 + 8000aab8: 00000013 addi x0,x0,0 + 8000aabc: 00000013 addi x0,x0,0 + 8000aac0: 007304b3 add x9,x6,x7 + 8000aac4: e4946663 bltu x8,x9,8000a110 + +000000008000aac8 : + 8000aac8: 2c013403 ld x8,704(x2) + 8000aacc: 408787b3 sub x15,x15,x8 + 8000aad0: 00179493 slli x9,x15,0x1 + 8000aad4: 009787b3 add x15,x15,x9 + 8000aad8: 0057d793 srli x15,x15,0x5 + 8000aadc: 00679793 slli x15,x15,0x6 + 8000aae0: 0077e7b3 or x15,x15,x7 + 8000aae4: 00378793 addi x15,x15,3 + 8000aae8: 02075a63 bge x14,x0,8000ab1c + 8000aaec: 00f00413 addi x8,x0,15 + 8000aaf0: 00877433 and x8,x14,x8 + 8000aaf4: 304024f3 csrrs x9,mie,x0 + 8000aaf8: 0084d4b3 srl x9,x9,x8 + 8000aafc: 0014f493 andi x9,x9,1 + 8000ab00: 00b49493 slli x9,x9,0xb + 8000ab04: 0097e7b3 or x15,x15,x9 + 8000ab08: 344024f3 csrrs x9,mip,x0 + 8000ab0c: 0084d4b3 srl x9,x9,x8 + 8000ab10: 0014f493 andi x9,x9,1 + 8000ab14: 00c49493 slli x9,x9,0xc + 8000ab18: 0097e7b3 or x15,x15,x9 + 8000ab1c: 300023f3 csrrs x7,mstatus,x0 + 8000ab20: 02f39393 slli x7,x7,0x2f + 8000ab24: 0223d393 srli x7,x7,0x22 + 8000ab28: 00000437 lui x8,0x0 + 8000ab2c: 00040413 addi x8,x8,0 # 0 + 8000ab30: 00b41413 slli x8,x8,0xb + 8000ab34: 00140413 addi x8,x8,1 + 8000ab38: 00b41413 slli x8,x8,0xb + 8000ab3c: 06740413 addi x8,x8,103 + 8000ab40: 00a41413 slli x8,x8,0xa + 8000ab44: 3e540413 addi x8,x8,997 + 8000ab48: fff44413 xori x8,x8,-1 + 8000ab4c: 0083f433 and x8,x7,x8 + 8000ab50: 0087e433 or x8,x15,x8 + 8000ab54: 0204d493 srli x9,x9,0x20 + 8000ab58: 1c04f493 andi x9,x9,448 + 8000ab5c: 00849493 slli x9,x9,0x8 + 8000ab60: 00946433 or x8,x8,x9 + 8000ab64: 00033483 ld x9,0(x6) + 8000ab68: 02848263 beq x9,x8,8000ab8c + 8000ab6c: 00040313 addi x6,x8,0 + 8000ab70: 00048213 addi x4,x9,0 + 8000ab74: 6b4003ef jal x7,8000b228 + 8000ab78: 8000aac8 .word 0x8000aac8 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 800217b6 .word 0x800217b6 + 8000ab84: 00000000 .word 0x00000000 + 8000ab88: 00000341 .word 0x00000341 + +000000008000ab8c : + 8000ab8c: 00070413 addi x8,x14,0 + 8000ab90: 00833483 ld x9,8(x6) + 8000ab94: 02848263 beq x9,x8,8000abb8 + 8000ab98: 00040313 addi x6,x8,0 + 8000ab9c: 00048213 addi x4,x9,0 + 8000aba0: 688003ef jal x7,8000b228 + 8000aba4: 8000ab8c .word 0x8000ab8c + 8000aba8: 00000000 .word 0x00000000 + 8000abac: 800218b8 .word 0x800218b8 + 8000abb0: 00000000 .word 0x00000000 + 8000abb4: 00000341 .word 0x00000341 + 8000abb8: 12074063 blt x14,x0,8000acd8 + +000000008000abbc : + 8000abbc: 34102473 csrrs x8,mepc,x0 + 8000abc0: 00010493 addi x9,x2,0 + 8000abc4: 0040006f jal x0,8000abc8 + +000000008000abc8 : + 8000abc8: 08000393 addi x7,x0,128 + 8000abcc: 04740863 beq x8,x7,8000ac1c + 8000abd0: 00238393 addi x7,x7,2 + 8000abd4: 04740463 beq x8,x7,8000ac1c + 8000abd8: 04040263 beq x8,x0,8000ac1c + 8000abdc: 2884b383 ld x7,648(x9) + 8000abe0: 2904b783 ld x15,656(x9) + 8000abe4: 007787b3 add x15,x15,x7 + 8000abe8: 00f47463 bgeu x8,x15,8000abf0 + 8000abec: 02747663 bgeu x8,x7,8000ac18 + +000000008000abf0 : + 8000abf0: 2584b383 ld x7,600(x9) + 8000abf4: 2604b783 ld x15,608(x9) + 8000abf8: 007787b3 add x15,x15,x7 + 8000abfc: 00f47463 bgeu x8,x15,8000ac04 + 8000ac00: 00747c63 bgeu x8,x7,8000ac18 + +000000008000ac04 : + 8000ac04: 2684b383 ld x7,616(x9) + 8000ac08: 2704b783 ld x15,624(x9) + 8000ac0c: 007787b3 add x15,x15,x7 + 8000ac10: d2f47a63 bgeu x8,x15,8000a144 + 8000ac14: d2746863 bltu x8,x7,8000a144 + +000000008000ac18 : + 8000ac18: 40740433 sub x8,x8,x7 + +000000008000ac1c : + 8000ac1c: 01033483 ld x9,16(x6) + 8000ac20: 02848263 beq x9,x8,8000ac44 + 8000ac24: 00040313 addi x6,x8,0 + 8000ac28: 00048213 addi x4,x9,0 + 8000ac2c: 5fc003ef jal x7,8000b228 + 8000ac30: 8000ac1c .word 0x8000ac1c + 8000ac34: 00000000 .word 0x00000000 + 8000ac38: 800219b3 .word 0x800219b3 + 8000ac3c: 00000000 .word 0x00000000 + 8000ac40: 00000341 .word 0x00000341 + +000000008000ac44 : + 8000ac44: 34102473 csrrs x8,mepc,x0 + 8000ac48: 342023f3 csrrs x7,mcause,x0 + 8000ac4c: 00c00793 addi x15,x0,12 + 8000ac50: 00f38a63 beq x7,x15,8000ac64 + 8000ac54: 00100793 addi x15,x0,1 + 8000ac58: 00f38663 beq x7,x15,8000ac64 + 8000ac5c: 01400793 addi x15,x0,20 + 8000ac60: 00f39663 bne x7,x15,8000ac6c + 8000ac64: 34109073 csrrw x0,mepc,x1 + 8000ac68: 0100006f jal x0,8000ac78 + +000000008000ac6c : + 8000ac6c: 00400393 addi x7,x0,4 + 8000ac70: 00740433 add x8,x8,x7 + 8000ac74: 34141073 csrrw x0,mepc,x8 + +000000008000ac78 : + 8000ac78: 34302473 csrrs x8,mtval,x0 + +000000008000ac7c : + 8000ac7c: 01833483 ld x9,24(x6) + 8000ac80: 02848263 beq x9,x8,8000aca4 + 8000ac84: 00040313 addi x6,x8,0 + 8000ac88: 00048213 addi x4,x9,0 + 8000ac8c: 59c003ef jal x7,8000b228 + 8000ac90: 8000ac7c .word 0x8000ac7c + 8000ac94: 00000000 .word 0x00000000 + 8000ac98: 80021aa6 .word 0x80021aa6 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000341 .word 0x00000341 + +000000008000aca4 : + 8000aca4: 30102473 csrrs x8,misa,x0 + 8000aca8: 03841413 slli x8,x8,0x38 + 8000acac: 00045263 bge x8,x0,8000acb0 + +000000008000acb0 : + 8000acb0: 20000393 addi x7,x0,512 + 8000acb4: 0640006f jal x0,8000ad18 + +000000008000acb8 : + 8000acb8: 2e013303 ld x6,736(x2) + 8000acbc: 2e813383 ld x7,744(x2) + 8000acc0: 2f013403 ld x8,752(x2) + 8000acc4: 2f813483 ld x9,760(x2) + 8000acc8: 30013703 ld x14,768(x2) + 8000accc: 30813783 ld x15,776(x2) + 8000acd0: 31013103 ld x2,784(x2) + 8000acd4: 30200073 mret + +000000008000acd8 : + 8000acd8: 00100413 addi x8,x0,1 + 8000acdc: 01f77393 andi x7,x14,31 + 8000ace0: 00741433 sll x8,x8,x7 + 8000ace4: 304434f3 csrrc x9,mie,x8 + 8000ace8: 34443473 csrrc x8,mip,x8 + +000000008000acec : + 8000acec: 01033483 ld x9,16(x6) + 8000acf0: 02848263 beq x9,x8,8000ad14 + 8000acf4: 00040313 addi x6,x8,0 + 8000acf8: 00048213 addi x4,x9,0 + 8000acfc: 52c003ef jal x7,8000b228 + 8000ad00: 8000acec .word 0x8000acec + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 80021c19 .word 0x80021c19 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000341 .word 0x00000341 + 8000ad14: 00000393 addi x7,x0,0 + +000000008000ad18 : + 8000ad18: 00000417 auipc x8,0x0 + 8000ad1c: 03c40413 addi x8,x8,60 # 8000ad54 + 8000ad20: 00740433 add x8,x8,x7 + 8000ad24: 00371393 slli x7,x14,0x3 + 8000ad28: 00740433 add x8,x8,x7 + 8000ad2c: ff847413 andi x8,x8,-8 + 8000ad30: 00043403 ld x8,0(x8) + +000000008000ad34 : + 8000ad34: 00040a63 beq x8,x0,8000ad48 + 8000ad38: 03f41393 slli x7,x8,0x3f + 8000ad3c: 0003d863 bge x7,x0,8000ad4c + 8000ad40: 00145413 srli x8,x8,0x1 + 8000ad44: f6870ae3 beq x14,x8,8000acb8 + 8000ad48: bfcff06f jal x0,8000a144 + +000000008000ad4c : + 8000ad4c: 00040067 jalr x0,0(x8) + +000000008000ad50 : + ... + 8000ad58: 00000001 .word 0x00000001 + 8000ad5c: 00000000 .word 0x00000000 + 8000ad60: 00000001 .word 0x00000001 + 8000ad64: 00000000 .word 0x00000000 + 8000ad68: 80042000 .word 0x80042000 + ... + 8000ad78: 00000001 .word 0x00000001 + 8000ad7c: 00000000 .word 0x00000000 + 8000ad80: 00000001 .word 0x00000001 + 8000ad84: 00000000 .word 0x00000000 + 8000ad88: 80042014 .word 0x80042014 + ... + 8000ad98: 00000001 .word 0x00000001 + 8000ad9c: 00000000 .word 0x00000000 + 8000ada0: 00000001 .word 0x00000001 + 8000ada4: 00000000 .word 0x00000000 + 8000ada8: 8004202c .word 0x8004202c + 8000adac: 00000000 .word 0x00000000 + 8000adb0: 00000001 .word 0x00000001 + 8000adb4: 00000000 .word 0x00000000 + 8000adb8: 00000001 .word 0x00000001 + 8000adbc: 00000000 .word 0x00000000 + 8000adc0: 00000001 .word 0x00000001 + 8000adc4: 00000000 .word 0x00000000 + 8000adc8: 00000001 .word 0x00000001 + 8000adcc: 00000000 .word 0x00000000 + 8000add0: 00000001 .word 0x00000001 + 8000add4: 00000000 .word 0x00000000 + 8000add8: 00000001 .word 0x00000001 + 8000addc: 00000000 .word 0x00000000 + 8000ade0: 00000001 .word 0x00000001 + 8000ade4: 00000000 .word 0x00000000 + 8000ade8: 00000001 .word 0x00000001 + 8000adec: 00000000 .word 0x00000000 + 8000adf0: 00000001 .word 0x00000001 + 8000adf4: 00000000 .word 0x00000000 + 8000adf8: 00000001 .word 0x00000001 + 8000adfc: 00000000 .word 0x00000000 + 8000ae00: 00000001 .word 0x00000001 + 8000ae04: 00000000 .word 0x00000000 + 8000ae08: 00000001 .word 0x00000001 + ... + +000000008000af50 : + 8000af50: 00000001 .word 0x00000001 + 8000af54: 00000000 .word 0x00000000 + 8000af58: 00000003 .word 0x00000003 + 8000af5c: 00000000 .word 0x00000000 + 8000af60: 00000005 .word 0x00000005 + 8000af64: 00000000 .word 0x00000000 + 8000af68: 00000007 .word 0x00000007 + 8000af6c: 00000000 .word 0x00000000 + 8000af70: 00000009 .word 0x00000009 + 8000af74: 00000000 .word 0x00000000 + 8000af78: 0000000b .word 0x0000000b + 8000af7c: 00000000 .word 0x00000000 + 8000af80: 0000000d .word 0x0000000d + 8000af84: 00000000 .word 0x00000000 + 8000af88: 0000000f .word 0x0000000f + 8000af8c: 00000000 .word 0x00000000 + 8000af90: 00000011 .word 0x00000011 + 8000af94: 00000000 .word 0x00000000 + 8000af98: 00000013 .word 0x00000013 + 8000af9c: 00000000 .word 0x00000000 + 8000afa0: 00000015 .word 0x00000015 + 8000afa4: 00000000 .word 0x00000000 + 8000afa8: 00000017 .word 0x00000017 + 8000afac: 00000000 .word 0x00000000 + 8000afb0: 00000019 .word 0x00000019 + 8000afb4: 00000000 .word 0x00000000 + 8000afb8: 0000001b .word 0x0000001b + 8000afbc: 00000000 .word 0x00000000 + 8000afc0: 0000001d .word 0x0000001d + 8000afc4: 00000000 .word 0x00000000 + 8000afc8: 0000001f .word 0x0000001f + 8000afcc: 00000000 .word 0x00000000 + 8000afd0: 00000021 .word 0x00000021 + 8000afd4: 00000000 .word 0x00000000 + 8000afd8: 00000023 .word 0x00000023 + 8000afdc: 00000000 .word 0x00000000 + 8000afe0: 00000025 .word 0x00000025 + 8000afe4: 00000000 .word 0x00000000 + 8000afe8: 00000027 .word 0x00000027 + 8000afec: 00000000 .word 0x00000000 + 8000aff0: 00000029 .word 0x00000029 + 8000aff4: 00000000 .word 0x00000000 + 8000aff8: 0000002b .word 0x0000002b + 8000affc: 00000000 .word 0x00000000 + 8000b000: 0000002d .word 0x0000002d + 8000b004: 00000000 .word 0x00000000 + 8000b008: 0000002f .word 0x0000002f + ... + +000000008000b150 : + 8000b150: 300023f3 csrrs x7,mstatus,x0 + 8000b154: 00b3d493 srli x9,x7,0xb + 8000b158: 0034f493 andi x9,x9,3 + 8000b15c: ffd48413 addi x8,x9,-3 + 8000b160: 341023f3 csrrs x7,mepc,x0 + 8000b164: 00000493 addi x9,x0,0 + 8000b168: 02040c63 beq x8,x0,8000b1a0 + 8000b16c: 35810113 addi x2,x2,856 + 8000b170: 300023f3 csrrs x7,mstatus,x0 + 8000b174: 01839393 slli x7,x7,0x18 + 8000b178: 0003da63 bge x7,x0,8000b18c + +000000008000b17c : + 8000b17c: 35810113 addi x2,x2,856 + 8000b180: 5b013783 ld x15,1456(x2) + 8000b184: ca810113 addi x2,x2,-856 + 8000b188: 0080006f jal x0,8000b190 + +000000008000b18c : + 8000b18c: f0013783 ld x15,-256(x2) + 8000b190: 341023f3 csrrs x7,mepc,x0 + 8000b194: 40f383b3 sub x7,x7,x15 + 8000b198: ca810113 addi x2,x2,-856 + 8000b19c: 25813483 ld x9,600(x2) + +000000008000b1a0 : + 8000b1a0: 007483b3 add x7,x9,x7 + 8000b1a4: 2e013303 ld x6,736(x2) + 8000b1a8: 2f013403 ld x8,752(x2) + 8000b1ac: 2f813483 ld x9,760(x2) + 8000b1b0: 30013703 ld x14,768(x2) + 8000b1b4: 30813783 ld x15,776(x2) + 8000b1b8: 31013103 ld x2,784(x2) + 8000b1bc: 00438067 jalr x0,4(x7) + +000000008000b1c0 : + 8000b1c0: 00016217 auipc x4,0x16 + 8000b1c4: cd020213 addi x4,x4,-816 # 80020e90 + 8000b1c8: 02523423 sd x5,40(x4) # 28 + 8000b1cc: 00123423 sd x1,8(x4) # 8 + 8000b1d0: 00023023 sd x0,0(x4) # 0 + 8000b1d4: 0880006f jal x0,8000b25c + +000000008000b1d8 : + 8000b1d8: 00016397 auipc x7,0x16 + 8000b1dc: cb838393 addi x7,x7,-840 # 80020e90 + 8000b1e0: 0483b023 sd x8,64(x7) + 8000b1e4: 0243b023 sd x4,32(x7) + 8000b1e8: 0253b423 sd x5,40(x7) + 8000b1ec: 0013b423 sd x1,8(x7) + 8000b1f0: 0003b023 sd x0,0(x7) + 8000b1f4: 00038213 addi x4,x7,0 + 8000b1f8: 00040293 addi x5,x8,0 + 8000b1fc: 0600006f jal x0,8000b25c + +000000008000b200 : + 8000b200: 00016697 auipc x13,0x16 + 8000b204: c9068693 addi x13,x13,-880 # 80020e90 + 8000b208: 06e6b823 sd x14,112(x13) + 8000b20c: 0246b023 sd x4,32(x13) + 8000b210: 0256b423 sd x5,40(x13) + 8000b214: 0016b423 sd x1,8(x13) + 8000b218: 0006b023 sd x0,0(x13) + 8000b21c: 00068213 addi x4,x13,0 + 8000b220: 00070293 addi x5,x14,0 + 8000b224: 0380006f jal x0,8000b25c + +000000008000b228 : + 8000b228: 00016497 auipc x9,0x16 + 8000b22c: c6848493 addi x9,x9,-920 # 80020e90 + 8000b230: 0674b423 sd x7,104(x9) + 8000b234: 0244b023 sd x4,32(x9) + 8000b238: 0254b423 sd x5,40(x9) + 8000b23c: 0014b423 sd x1,8(x9) + 8000b240: 00300093 addi x1,x0,3 + 8000b244: 0014b023 sd x1,0(x9) + 8000b248: 1064b823 sd x6,272(x9) + 8000b24c: 1044bc23 sd x4,280(x9) + 8000b250: 00048213 addi x4,x9,0 + 8000b254: 00038293 addi x5,x7,0 + 8000b258: 0040006f jal x0,8000b25c + +000000008000b25c : + 8000b25c: 00223823 sd x2,16(x4) # 10 + 8000b260: 00323c23 sd x3,24(x4) # 18 + 8000b264: 02623823 sd x6,48(x4) # 30 + 8000b268: 02723c23 sd x7,56(x4) # 38 + 8000b26c: 04823023 sd x8,64(x4) # 40 + 8000b270: 04923423 sd x9,72(x4) # 48 + 8000b274: 04a23823 sd x10,80(x4) # 50 + 8000b278: 04b23c23 sd x11,88(x4) # 58 + 8000b27c: 06c23023 sd x12,96(x4) # 60 + 8000b280: 06d23423 sd x13,104(x4) # 68 + 8000b284: 06e23823 sd x14,112(x4) # 70 + 8000b288: 06f23c23 sd x15,120(x4) # 78 + 8000b28c: 09023023 sd x16,128(x4) # 80 + 8000b290: 09123423 sd x17,136(x4) # 88 + 8000b294: 09223823 sd x18,144(x4) # 90 + 8000b298: 09323c23 sd x19,152(x4) # 98 + 8000b29c: 0b423023 sd x20,160(x4) # a0 + 8000b2a0: 0b523423 sd x21,168(x4) # a8 + 8000b2a4: 0b623823 sd x22,176(x4) # b0 + 8000b2a8: 0b723c23 sd x23,184(x4) # b8 + 8000b2ac: 0d823023 sd x24,192(x4) # c0 + 8000b2b0: 0d923423 sd x25,200(x4) # c8 + 8000b2b4: 0da23823 sd x26,208(x4) # d0 + 8000b2b8: 0db23c23 sd x27,216(x4) # d8 + 8000b2bc: 0fc23023 sd x28,224(x4) # e0 + 8000b2c0: 0fd23423 sd x29,232(x4) # e8 + 8000b2c4: 0fe23823 sd x30,240(x4) # f0 + 8000b2c8: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b2cc : + 8000b2cc: 00016497 auipc x9,0x16 + 8000b2d0: bc44a483 lw x9,-1084(x9) # 80020e90 + 8000b2d4: 00300513 addi x10,x0,3 + 8000b2d8: 18a48a63 beq x9,x10,8000b46c + +000000008000b2dc : + 8000b2dc: ffa2d303 lhu x6,-6(x5) + 8000b2e0: ff82d383 lhu x7,-8(x5) + 8000b2e4: 01031313 slli x6,x6,0x10 + 8000b2e8: 00736333 or x6,x6,x7 + 8000b2ec: 00f35393 srli x7,x6,0xf + 8000b2f0: 01f3f393 andi x7,x7,31 + 8000b2f4: 01435413 srli x8,x6,0x14 + 8000b2f8: 01f47413 andi x8,x8,31 + 8000b2fc: 10822223 sw x8,260(x4) # 104 + 8000b300: 00341313 slli x6,x8,0x3 + 8000b304: 00620333 add x6,x4,x6 + 8000b308: 00033303 ld x6,0(x6) + 8000b30c: 10623823 sd x6,272(x4) # 110 + 8000b310: ff62d303 lhu x6,-10(x5) + 8000b314: ff42d383 lhu x7,-12(x5) + 8000b318: 01031313 slli x6,x6,0x10 + 8000b31c: 00736333 or x6,x6,x7 + 8000b320: 00030513 addi x10,x6,0 + 8000b324: 07f37413 andi x8,x6,127 + 8000b328: 00300493 addi x9,x0,3 + 8000b32c: 0c941463 bne x8,x9,8000b3f4 + 8000b330: 00c35413 srli x8,x6,0xc + 8000b334: 00747413 andi x8,x8,7 + 8000b338: 00300493 addi x9,x0,3 + 8000b33c: 0a941c63 bne x8,x9,8000b3f4 + 8000b340: 41435393 srai x7,x6,0x14 + 8000b344: 00f35313 srli x6,x6,0xf + 8000b348: 01f37313 andi x6,x6,31 + 8000b34c: 00331313 slli x6,x6,0x3 + 8000b350: 00620333 add x6,x4,x6 + 8000b354: 00033303 ld x6,0(x6) + 8000b358: 00730333 add x6,x6,x7 + 8000b35c: 00737413 andi x8,x6,7 + 8000b360: 0c041663 bne x8,x0,8000b42c + 8000b364: 00000013 addi x0,x0,0 + 8000b368: 00000013 addi x0,x0,0 + 8000b36c: 00000013 addi x0,x0,0 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00018417 auipc x8,0x18 + 8000b384: 90040413 addi x8,x8,-1792 # 80022c80 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 08836663 bltu x6,x8,8000b42c + 8000b3a4: 00000013 addi x0,x0,0 + 8000b3a8: 00000013 addi x0,x0,0 + 8000b3ac: 00000013 addi x0,x0,0 + 8000b3b0: 00000013 addi x0,x0,0 + 8000b3b4: 00000013 addi x0,x0,0 + 8000b3b8: 00000013 addi x0,x0,0 + 8000b3bc: 00000013 addi x0,x0,0 + 8000b3c0: 00036417 auipc x8,0x36 + 8000b3c4: 62040413 addi x8,x8,1568 # 800419e0 + 8000b3c8: 00000013 addi x0,x0,0 + 8000b3cc: 00000013 addi x0,x0,0 + 8000b3d0: 00000013 addi x0,x0,0 + 8000b3d4: 00000013 addi x0,x0,0 + 8000b3d8: 00000013 addi x0,x0,0 + 8000b3dc: 00000013 addi x0,x0,0 + 8000b3e0: ff840413 addi x8,x8,-8 + 8000b3e4: 04646463 bltu x8,x6,8000b42c + 8000b3e8: 00033303 ld x6,0(x6) + 8000b3ec: 10623c23 sd x6,280(x4) # 118 + 8000b3f0: 3880006f jal x0,8000b778 + +000000008000b3f4 : + 8000b3f4: 00100413 addi x8,x0,1 + 8000b3f8: 00000013 addi x0,x0,0 + 8000b3fc: 00000013 addi x0,x0,0 + 8000b400: 00016497 auipc x9,0x16 + 8000b404: bb848493 addi x9,x9,-1096 # 80020fb8 + 8000b408: 00000013 addi x0,x0,0 + 8000b40c: 00000013 addi x0,x0,0 + 8000b410: 00000013 addi x0,x0,0 + 8000b414: 00000013 addi x0,x0,0 + 8000b418: 00000013 addi x0,x0,0 + 8000b41c: 00000013 addi x0,x0,0 + 8000b420: 0084a023 sw x8,0(x9) + 8000b424: 10a23c23 sd x10,280(x4) # 118 + 8000b428: 3500006f jal x0,8000b778 + +000000008000b42c : + 8000b42c: 00200413 addi x8,x0,2 + 8000b430: 00000013 addi x0,x0,0 + 8000b434: 00000013 addi x0,x0,0 + 8000b438: 00000013 addi x0,x0,0 + 8000b43c: 00000013 addi x0,x0,0 + 8000b440: 00016497 auipc x9,0x16 + 8000b444: b7848493 addi x9,x9,-1160 # 80020fb8 + 8000b448: 00000013 addi x0,x0,0 + 8000b44c: 00000013 addi x0,x0,0 + 8000b450: 00000013 addi x0,x0,0 + 8000b454: 00000013 addi x0,x0,0 + 8000b458: 00000013 addi x0,x0,0 + 8000b45c: 00000013 addi x0,x0,0 + 8000b460: 0084a023 sw x8,0(x9) + 8000b464: 10623c23 sd x6,280(x4) # 118 + 8000b468: 3100006f jal x0,8000b778 + +000000008000b46c : + 8000b46c: 0082e303 lwu x6,8(x5) + 8000b470: 00c2a383 lw x7,12(x5) + 8000b474: 02039393 slli x7,x7,0x20 + 8000b478: 00736333 or x6,x6,x7 + 8000b47c: 00016817 auipc x16,0x16 + 8000b480: b4c80813 addi x16,x16,-1204 # 80020fc8 + 8000b484: 00683023 sd x6,0(x16) + 8000b488: 0002e303 lwu x6,0(x5) + 8000b48c: 0042a383 lw x7,4(x5) + 8000b490: 02039393 slli x7,x7,0x20 + 8000b494: 00736333 or x6,x6,x7 + 8000b498: 10623423 sd x6,264(x4) # 108 + 8000b49c: 00016817 auipc x16,0x16 + 8000b4a0: b2c80813 addi x16,x16,-1236 # 80020fc8 + 8000b4a4: 00083303 ld x6,0(x16) + 8000b4a8: 00016397 auipc x7,0x16 + 8000b4ac: 2f738393 addi x7,x7,759 # 8002179f + 8000b4b0: 28730463 beq x6,x7,8000b738 + 8000b4b4: 00000413 addi x8,x0,0 + 8000b4b8: 00016817 auipc x16,0x16 + 8000b4bc: b0880813 addi x16,x16,-1272 # 80020fc0 + 8000b4c0: 00882023 sw x8,0(x16) + 8000b4c4: 00016397 auipc x7,0x16 + 8000b4c8: 2f238393 addi x7,x7,754 # 800217b6 + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00100413 addi x8,x0,1 + 8000b4d4: 00000493 addi x9,x0,0 + 8000b4d8: 2740006f jal x0,8000b74c + 8000b4dc: 00016397 auipc x7,0x16 + 8000b4e0: 3dc38393 addi x7,x7,988 # 800218b8 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00200413 addi x8,x0,2 + 8000b4ec: 00000493 addi x9,x0,0 + 8000b4f0: 25c0006f jal x0,8000b74c + 8000b4f4: 00016397 auipc x7,0x16 + 8000b4f8: 4bf38393 addi x7,x7,1215 # 800219b3 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00300413 addi x8,x0,3 + 8000b504: 00000493 addi x9,x0,0 + 8000b508: 2440006f jal x0,8000b74c + 8000b50c: 00016397 auipc x7,0x16 + 8000b510: 59a38393 addi x7,x7,1434 # 80021aa6 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00400413 addi x8,x0,4 + 8000b51c: 00000493 addi x9,x0,0 + 8000b520: 22c0006f jal x0,8000b74c + 8000b524: 00016397 auipc x7,0x16 + 8000b528: 6f538393 addi x7,x7,1781 # 80021c19 + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00500413 addi x8,x0,5 + 8000b534: 00000493 addi x9,x0,0 + 8000b538: 2140006f jal x0,8000b74c + 8000b53c: 00016397 auipc x7,0x16 + 8000b540: 66138393 addi x7,x7,1633 # 80021b9d + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00600413 addi x8,x0,6 + 8000b54c: 00000493 addi x9,x0,0 + 8000b550: 1fc0006f jal x0,8000b74c + 8000b554: 00016397 auipc x7,0x16 + 8000b558: 68738393 addi x7,x7,1671 # 80021bdb + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00700413 addi x8,x0,7 + 8000b564: 00000493 addi x9,x0,0 + 8000b568: 1e40006f jal x0,8000b74c + 8000b56c: 00016397 auipc x7,0x16 + 8000b570: 28a38393 addi x7,x7,650 # 800217f6 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00100413 addi x8,x0,1 + 8000b57c: 00100493 addi x9,x0,1 + 8000b580: 1cc0006f jal x0,8000b74c + 8000b584: 00016397 auipc x7,0x16 + 8000b588: 37238393 addi x7,x7,882 # 800218f6 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00200413 addi x8,x0,2 + 8000b594: 00100493 addi x9,x0,1 + 8000b598: 1b40006f jal x0,8000b74c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 45338393 addi x7,x7,1107 # 800219ef + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00300413 addi x8,x0,3 + 8000b5ac: 00100493 addi x9,x0,1 + 8000b5b0: 19c0006f jal x0,8000b74c + 8000b5b4: 00016397 auipc x7,0x16 + 8000b5b8: 52f38393 addi x7,x7,1327 # 80021ae3 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00400413 addi x8,x0,4 + 8000b5c4: 00100493 addi x9,x0,1 + 8000b5c8: 1840006f jal x0,8000b74c + 8000b5cc: 00016397 auipc x7,0x16 + 8000b5d0: 68838393 addi x7,x7,1672 # 80021c54 + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00500413 addi x8,x0,5 + 8000b5dc: 00100493 addi x9,x0,1 + 8000b5e0: 16c0006f jal x0,8000b74c + 8000b5e4: 00016397 auipc x7,0x16 + 8000b5e8: 25238393 addi x7,x7,594 # 80021836 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00100413 addi x8,x0,1 + 8000b5f4: 00200493 addi x9,x0,2 + 8000b5f8: 1540006f jal x0,8000b74c + 8000b5fc: 00016397 auipc x7,0x16 + 8000b600: 33838393 addi x7,x7,824 # 80021934 + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00200413 addi x8,x0,2 + 8000b60c: 00200493 addi x9,x0,2 + 8000b610: 13c0006f jal x0,8000b74c + 8000b614: 00016397 auipc x7,0x16 + 8000b618: 41738393 addi x7,x7,1047 # 80021a2b + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00300413 addi x8,x0,3 + 8000b624: 00200493 addi x9,x0,2 + 8000b628: 1240006f jal x0,8000b74c + 8000b62c: 00016397 auipc x7,0x16 + 8000b630: 4f438393 addi x7,x7,1268 # 80021b20 + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00400413 addi x8,x0,4 + 8000b63c: 00200493 addi x9,x0,2 + 8000b640: 10c0006f jal x0,8000b74c + 8000b644: 00016397 auipc x7,0x16 + 8000b648: 64b38393 addi x7,x7,1611 # 80021c8f + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00500413 addi x8,x0,5 + 8000b654: 00200493 addi x9,x0,2 + 8000b658: 0f40006f jal x0,8000b74c + 8000b65c: 00016397 auipc x7,0x16 + 8000b660: 21b38393 addi x7,x7,539 # 80021877 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00100413 addi x8,x0,1 + 8000b66c: 00300493 addi x9,x0,3 + 8000b670: 0dc0006f jal x0,8000b74c + 8000b674: 00016397 auipc x7,0x16 + 8000b678: 2ff38393 addi x7,x7,767 # 80021973 + 8000b67c: 00731863 bne x6,x7,8000b68c + 8000b680: 00200413 addi x8,x0,2 + 8000b684: 00300493 addi x9,x0,3 + 8000b688: 0c40006f jal x0,8000b74c + 8000b68c: 00016397 auipc x7,0x16 + 8000b690: 3dc38393 addi x7,x7,988 # 80021a68 + 8000b694: 00731863 bne x6,x7,8000b6a4 + 8000b698: 00300413 addi x8,x0,3 + 8000b69c: 00300493 addi x9,x0,3 + 8000b6a0: 0ac0006f jal x0,8000b74c + 8000b6a4: 00016397 auipc x7,0x16 + 8000b6a8: 4ba38393 addi x7,x7,1210 # 80021b5e + 8000b6ac: 00731863 bne x6,x7,8000b6bc + 8000b6b0: 00400413 addi x8,x0,4 + 8000b6b4: 00300493 addi x9,x0,3 + 8000b6b8: 0940006f jal x0,8000b74c + 8000b6bc: 00016397 auipc x7,0x16 + 8000b6c0: 60f38393 addi x7,x7,1551 # 80021ccb + 8000b6c4: 00731863 bne x6,x7,8000b6d4 + 8000b6c8: 00500413 addi x8,x0,5 + 8000b6cc: 00300493 addi x9,x0,3 + 8000b6d0: 07c0006f jal x0,8000b74c + 8000b6d4: 00016397 auipc x7,0x16 + 8000b6d8: 63438393 addi x7,x7,1588 # 80021d08 + 8000b6dc: 00731863 bne x6,x7,8000b6ec + 8000b6e0: 00800413 addi x8,x0,8 + 8000b6e4: 00000493 addi x9,x0,0 + 8000b6e8: 0640006f jal x0,8000b74c + 8000b6ec: 00016397 auipc x7,0x16 + 8000b6f0: 66b38393 addi x7,x7,1643 # 80021d57 + 8000b6f4: 00731863 bne x6,x7,8000b704 + 8000b6f8: 00800413 addi x8,x0,8 + 8000b6fc: 00000493 addi x9,x0,0 + 8000b700: 04c0006f jal x0,8000b74c + 8000b704: 00016397 auipc x7,0x16 + 8000b708: 74e38393 addi x7,x7,1870 # 80021e52 + 8000b70c: 00731863 bne x6,x7,8000b71c + 8000b710: 00800413 addi x8,x0,8 + 8000b714: 00100493 addi x9,x0,1 + 8000b718: 0340006f jal x0,8000b74c + 8000b71c: 00017397 auipc x7,0x17 + 8000b720: 83238393 addi x7,x7,-1998 # 80021f4e + 8000b724: 00731863 bne x6,x7,8000b734 + 8000b728: 00800413 addi x8,x0,8 + 8000b72c: 00200493 addi x9,x0,2 + 8000b730: 01c0006f jal x0,8000b74c + 8000b734: 0340006f jal x0,8000b768 + +000000008000b738 : + 8000b738: 00900413 addi x8,x0,9 + 8000b73c: 00016817 auipc x16,0x16 + 8000b740: 88480813 addi x16,x16,-1916 # 80020fc0 + 8000b744: 00882023 sw x8,0(x16) + 8000b748: 0300006f jal x0,8000b778 + +000000008000b74c : + 8000b74c: 00016817 auipc x16,0x16 + 8000b750: 87480813 addi x16,x16,-1932 # 80020fc0 + 8000b754: 00882023 sw x8,0(x16) + 8000b758: 00016817 auipc x16,0x16 + 8000b75c: 86c80813 addi x16,x16,-1940 # 80020fc4 + 8000b760: 00982023 sw x9,0(x16) + 8000b764: 0140006f jal x0,8000b778 + +000000008000b768 : + 8000b768: 00016817 auipc x16,0x16 + 8000b76c: 85880813 addi x16,x16,-1960 # 80020fc0 + 8000b770: 00082023 sw x0,0(x16) + 8000b774: 0040006f jal x0,8000b778 + +000000008000b778 : + 8000b778: 0002e303 lwu x6,0(x5) + 8000b77c: 0042a383 lw x7,4(x5) + 8000b780: 02039393 slli x7,x7,0x20 + 8000b784: 00736333 or x6,x6,x7 + 8000b788: 10623423 sd x6,264(x4) # 108 + 8000b78c: 00035383 lhu x7,0(x6) + 8000b790: 0033f413 andi x8,x7,3 + 8000b794: 00300493 addi x9,x0,3 + 8000b798: 00941863 bne x8,x9,8000b7a8 + 8000b79c: 00235403 lhu x8,2(x6) + 8000b7a0: 01041413 slli x8,x8,0x10 + 8000b7a4: 0083e3b3 or x7,x7,x8 + 8000b7a8: 10722023 sw x7,256(x4) # 100 + 8000b7ac: 0082e303 lwu x6,8(x5) + 8000b7b0: 00c2a383 lw x7,12(x5) + 8000b7b4: 02039393 slli x7,x7,0x20 + 8000b7b8: 00736333 or x6,x6,x7 + 8000b7bc: 12623023 sd x6,288(x4) # 120 + +000000008000b7c0 : + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: df050513 addi x10,x10,-528 # 800215b0 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00037097 auipc x1,0x37 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000b7e8: 00000013 addi x0,x0,0 + 8000b7ec: 00000013 addi x0,x0,0 + 8000b7f0: 00000013 addi x0,x0,0 + 8000b7f4: 00000013 addi x0,x0,0 + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: deb50513 addi x10,x10,-533 # 800215eb + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00037097 auipc x1,0x37 + 8000b824: d84080e7 jalr x1,-636(x1) # 800425a4 + +000000008000b828 : + 8000b828: 00000013 addi x0,x0,0 + 8000b82c: 00000013 addi x0,x0,0 + 8000b830: 00000013 addi x0,x0,0 + 8000b834: 00000013 addi x0,x0,0 + 8000b838: 00000013 addi x0,x0,0 + 8000b83c: 00000013 addi x0,x0,0 + 8000b840: 00016517 auipc x10,0x16 + 8000b844: e6250513 addi x10,x10,-414 # 800216a2 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00037097 auipc x1,0x37 + 8000b864: d44080e7 jalr x1,-700(x1) # 800425a4 + +000000008000b868 : + 8000b868: 00015517 auipc x10,0x15 + 8000b86c: 74853503 ld x10,1864(x10) # 80020fb0 + 8000b870: 00037097 auipc x1,0x37 + 8000b874: d34080e7 jalr x1,-716(x1) # 800425a4 + +000000008000b878 : + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00016517 auipc x10,0x16 + 8000b884: e3450513 addi x10,x10,-460 # 800216b4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00037097 auipc x1,0x37 + 8000b8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000b8a8: 00015517 auipc x10,0x15 + 8000b8ac: 5e852503 lw x10,1512(x10) # 80020e90 + 8000b8b0: 00300593 addi x11,x0,3 + 8000b8b4: 52b50c63 beq x10,x11,8000bdec + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00016517 auipc x10,0x16 + 8000b8c4: df650513 addi x10,x10,-522 # 800216b6 + 8000b8c8: 00000013 addi x0,x0,0 + 8000b8cc: 00000013 addi x0,x0,0 + 8000b8d0: 00000013 addi x0,x0,0 + 8000b8d4: 00000013 addi x0,x0,0 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00037097 auipc x1,0x37 + 8000b8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000b8e8: 00015517 auipc x10,0x15 + 8000b8ec: 6a852503 lw x10,1704(x10) # 80020f90 + 8000b8f0: 02000593 addi x11,x0,32 + 8000b8f4: 00357613 andi x12,x10,3 + 8000b8f8: 00300693 addi x13,x0,3 + 8000b8fc: 00d60463 beq x12,x13,8000b904 + 8000b900: 01000593 addi x11,x0,16 + 8000b904: 3f4010ef jal x1,8000ccf8 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00015517 auipc x10,0x15 + 8000b924: 6d850513 addi x10,x10,1752 # 80020ff8 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00037097 auipc x1,0x37 + 8000b944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000b948: 00000013 addi x0,x0,0 + 8000b94c: 00000013 addi x0,x0,0 + 8000b950: 00000013 addi x0,x0,0 + 8000b954: 00000013 addi x0,x0,0 + 8000b958: 00000013 addi x0,x0,0 + 8000b95c: 00000013 addi x0,x0,0 + 8000b960: 00016517 auipc x10,0x16 + 8000b964: d6a50513 addi x10,x10,-662 # 800216ca + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00037097 auipc x1,0x37 + 8000b984: c24080e7 jalr x1,-988(x1) # 800425a4 + 8000b988: 00015517 auipc x10,0x15 + 8000b98c: 61053503 ld x10,1552(x10) # 80020f98 + 8000b990: 04000593 addi x11,x0,64 + 8000b994: 364010ef jal x1,8000ccf8 + 8000b998: 00000013 addi x0,x0,0 + 8000b99c: 00000013 addi x0,x0,0 + 8000b9a0: 00015517 auipc x10,0x15 + 8000b9a4: 65850513 addi x10,x10,1624 # 80020ff8 + 8000b9a8: 00000013 addi x0,x0,0 + 8000b9ac: 00000013 addi x0,x0,0 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00037097 auipc x1,0x37 + 8000b9c4: be4080e7 jalr x1,-1052(x1) # 800425a4 + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00016517 auipc x10,0x16 + 8000b9e4: 72150513 addi x10,x10,1825 # 80022101 + 8000b9e8: 00000013 addi x0,x0,0 + 8000b9ec: 00000013 addi x0,x0,0 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00037097 auipc x1,0x37 + 8000ba04: ba4080e7 jalr x1,-1116(x1) # 800425a4 + 8000ba08: 00015517 auipc x10,0x15 + 8000ba0c: 48852503 lw x10,1160(x10) # 80020e90 + 8000ba10: 00050663 beq x10,x0,8000ba1c + 8000ba14: 00300593 addi x11,x0,3 + 8000ba18: 04b51063 bne x10,x11,8000ba58 + 8000ba1c: 07800593 addi x11,x0,120 + 8000ba20: 00015617 auipc x12,0x15 + 8000ba24: 5d860613 addi x12,x12,1496 # 80020ff8 + 8000ba28: 00000013 addi x0,x0,0 + 8000ba2c: 00000013 addi x0,x0,0 + 8000ba30: 00000013 addi x0,x0,0 + 8000ba34: 00000013 addi x0,x0,0 + 8000ba38: 00000013 addi x0,x0,0 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00b60023 sb x11,0(x12) + 8000ba44: 00160613 addi x12,x12,1 + 8000ba48: 00015517 auipc x10,0x15 + 8000ba4c: 54c52503 lw x10,1356(x10) # 80020f94 + 8000ba50: 324010ef jal x1,8000cd74 + 8000ba54: 1180006f jal x0,8000bb6c + +000000008000ba58 : + 8000ba58: 00100593 addi x11,x0,1 + 8000ba5c: 04b50863 beq x10,x11,8000baac + 8000ba60: 00400593 addi x11,x0,4 + 8000ba64: 08b50a63 beq x10,x11,8000baf8 + 8000ba68: 00500593 addi x11,x0,5 + 8000ba6c: 0cb50463 beq x10,x11,8000bb34 + 8000ba70: 00000013 addi x0,x0,0 + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00016517 auipc x10,0x16 + 8000ba84: 79750513 addi x10,x10,1943 # 80022217 + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00037097 auipc x1,0x37 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000baa8: 1000006f jal x0,8000bba8 + +000000008000baac : + 8000baac: 06600593 addi x11,x0,102 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00015617 auipc x12,0x15 + 8000bac4: 53860613 addi x12,x12,1336 # 80020ff8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00b60023 sb x11,0(x12) + 8000bae4: 00160613 addi x12,x12,1 + 8000bae8: 00015517 auipc x10,0x15 + 8000baec: 4ac52503 lw x10,1196(x10) # 80020f94 + 8000baf0: 284010ef jal x1,8000cd74 + 8000baf4: 0780006f jal x0,8000bb6c + +000000008000baf8 : + 8000baf8: 07600593 addi x11,x0,118 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00015617 auipc x12,0x15 + 8000bb04: 4f860613 addi x12,x12,1272 # 80020ff8 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00b60023 sb x11,0(x12) + 8000bb24: 00160613 addi x12,x12,1 + 8000bb28: 00015517 auipc x10,0x15 + 8000bb2c: 46c52503 lw x10,1132(x10) # 80020f94 + 8000bb30: 244010ef jal x1,8000cd74 + +000000008000bb34 : + 8000bb34: 00000013 addi x0,x0,0 + 8000bb38: 00000013 addi x0,x0,0 + 8000bb3c: 00000013 addi x0,x0,0 + 8000bb40: 00016517 auipc x10,0x16 + 8000bb44: 5ba50513 addi x10,x10,1466 # 800220fa + 8000bb48: 00000013 addi x0,x0,0 + 8000bb4c: 00000013 addi x0,x0,0 + 8000bb50: 00000013 addi x0,x0,0 + 8000bb54: 00000013 addi x0,x0,0 + 8000bb58: 00000013 addi x0,x0,0 + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00037097 auipc x1,0x37 + 8000bb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000bb68: 0400006f jal x0,8000bba8 + +000000008000bb6c : + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00015517 auipc x10,0x15 + 8000bb84: 47850513 addi x10,x10,1144 # 80020ff8 + 8000bb88: 00000013 addi x0,x0,0 + 8000bb8c: 00000013 addi x0,x0,0 + 8000bb90: 00000013 addi x0,x0,0 + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00037097 auipc x1,0x37 + 8000bba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + +000000008000bba8 : + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00016517 auipc x10,0x16 + 8000bbc4: 55250513 addi x10,x10,1362 # 80022112 + 8000bbc8: 00000013 addi x0,x0,0 + 8000bbcc: 00000013 addi x0,x0,0 + 8000bbd0: 00000013 addi x0,x0,0 + 8000bbd4: 00000013 addi x0,x0,0 + 8000bbd8: 00000013 addi x0,x0,0 + 8000bbdc: 00000013 addi x0,x0,0 + 8000bbe0: 00037097 auipc x1,0x37 + 8000bbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000bbe8: 00015517 auipc x10,0x15 + 8000bbec: 2a852503 lw x10,680(x10) # 80020e90 + 8000bbf0: 00100593 addi x11,x0,1 + 8000bbf4: 00b51c63 bne x10,x11,8000bc0c + 8000bbf8: 00015517 auipc x10,0x15 + 8000bbfc: 3a853503 ld x10,936(x10) # 80020fa0 + 8000bc00: 04000593 addi x11,x0,64 + 8000bc04: 0f4010ef jal x1,8000ccf8 + 8000bc08: 0140006f jal x0,8000bc1c + +000000008000bc0c : + 8000bc0c: 00015517 auipc x10,0x15 + 8000bc10: 39453503 ld x10,916(x10) # 80020fa0 + 8000bc14: 04000593 addi x11,x0,64 + 8000bc18: 0e0010ef jal x1,8000ccf8 + +000000008000bc1c : + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00015517 auipc x10,0x15 + 8000bc24: 3d850513 addi x10,x10,984 # 80020ff8 + 8000bc28: 00000013 addi x0,x0,0 + 8000bc2c: 00000013 addi x0,x0,0 + 8000bc30: 00000013 addi x0,x0,0 + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00037097 auipc x1,0x37 + 8000bc44: 964080e7 jalr x1,-1692(x1) # 800425a4 + 8000bc48: 00015517 auipc x10,0x15 + 8000bc4c: 37052503 lw x10,880(x10) # 80020fb8 + 8000bc50: 08051e63 bne x10,x0,8000bcec + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00016517 auipc x10,0x16 + 8000bc64: 4c950513 addi x10,x10,1225 # 80022129 + 8000bc68: 00000013 addi x0,x0,0 + 8000bc6c: 00000013 addi x0,x0,0 + 8000bc70: 00000013 addi x0,x0,0 + 8000bc74: 00000013 addi x0,x0,0 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00037097 auipc x1,0x37 + 8000bc84: 924080e7 jalr x1,-1756(x1) # 800425a4 + 8000bc88: 00015517 auipc x10,0x15 + 8000bc8c: 20852503 lw x10,520(x10) # 80020e90 + 8000bc90: 00100593 addi x11,x0,1 + 8000bc94: 00b51c63 bne x10,x11,8000bcac + 8000bc98: 00015517 auipc x10,0x15 + 8000bc9c: 31053503 ld x10,784(x10) # 80020fa8 + 8000bca0: 04000593 addi x11,x0,64 + 8000bca4: 054010ef jal x1,8000ccf8 + 8000bca8: 0140006f jal x0,8000bcbc + +000000008000bcac : + 8000bcac: 00015517 auipc x10,0x15 + 8000bcb0: 2fc53503 ld x10,764(x10) # 80020fa8 + 8000bcb4: 04000593 addi x11,x0,64 + 8000bcb8: 040010ef jal x1,8000ccf8 + +000000008000bcbc : + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00015517 auipc x10,0x15 + 8000bcc4: 33850513 addi x10,x10,824 # 80020ff8 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00037097 auipc x1,0x37 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000bce8: 5bd0006f jal x0,8000caa4 + +000000008000bcec : + 8000bcec: 00100593 addi x11,x0,1 + 8000bcf0: 06b51e63 bne x10,x11,8000bd6c + +000000008000bcf4 : + 8000bcf4: 00000013 addi x0,x0,0 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00016517 auipc x10,0x16 + 8000bd04: 44050513 addi x10,x10,1088 # 80022140 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00037097 auipc x1,0x37 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800425a4 + 8000bd28: 00015517 auipc x10,0x15 + 8000bd2c: 28053503 ld x10,640(x10) # 80020fa8 + 8000bd30: 02000593 addi x11,x0,32 + 8000bd34: 7c5000ef jal x1,8000ccf8 + 8000bd38: 00000013 addi x0,x0,0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00015517 auipc x10,0x15 + 8000bd44: 2b850513 addi x10,x10,696 # 80020ff8 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00037097 auipc x1,0x37 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800425a4 + 8000bd68: 53d0006f jal x0,8000caa4 + +000000008000bd6c : + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00016517 auipc x10,0x16 + 8000bd84: 41e50513 addi x10,x10,1054 # 8002219e + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00037097 auipc x1,0x37 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800425a4 + 8000bda8: 00015517 auipc x10,0x15 + 8000bdac: 20053503 ld x10,512(x10) # 80020fa8 + 8000bdb0: 04000593 addi x11,x0,64 + 8000bdb4: 745000ef jal x1,8000ccf8 + 8000bdb8: 00000013 addi x0,x0,0 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00015517 auipc x10,0x15 + 8000bdc4: 23850513 addi x10,x10,568 # 80020ff8 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00036097 auipc x1,0x36 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 8000bde8: 4bd0006f jal x0,8000caa4 + +000000008000bdec : + 8000bdec: 00015417 auipc x8,0x15 + 8000bdf0: 1d442403 lw x8,468(x8) # 80020fc0 + 8000bdf4: 00900493 addi x9,x0,9 + 8000bdf8: 0a940c63 beq x8,x9,8000beb0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00016517 auipc x10,0x16 + 8000be04: 44350513 addi x10,x10,1091 # 80022243 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00036097 auipc x1,0x36 + 8000be24: 784080e7 jalr x1,1924(x1) # 800425a4 + 8000be28: 00000013 addi x0,x0,0 + 8000be2c: 00000013 addi x0,x0,0 + 8000be30: 00000013 addi x0,x0,0 + 8000be34: 00000013 addi x0,x0,0 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00016517 auipc x10,0x16 + 8000be44: 42f50513 addi x10,x10,1071 # 8002226f + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00036097 auipc x1,0x36 + 8000be64: 744080e7 jalr x1,1860(x1) # 800425a4 + 8000be68: 00015817 auipc x16,0x15 + 8000be6c: 16080813 addi x16,x16,352 # 80020fc8 + 8000be70: 00083503 ld x10,0(x16) + 8000be74: 00036097 auipc x1,0x36 + 8000be78: 730080e7 jalr x1,1840(x1) # 800425a4 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00016517 auipc x10,0x16 + 8000be84: 83450513 addi x10,x10,-1996 # 800216b4 + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00036097 auipc x1,0x36 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 8000bea8: 280404e3 beq x8,x0,8000c930 + 8000beac: 3400006f jal x0,8000c1ec + +000000008000beb0 : + 8000beb0: 00000013 addi x0,x0,0 + 8000beb4: 00000013 addi x0,x0,0 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00016517 auipc x10,0x16 + 8000bec4: 3bf50513 addi x10,x10,959 # 8002227f + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00036097 auipc x1,0x36 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800425a4 + 8000bee8: 00015517 auipc x10,0x15 + 8000beec: 0c053503 ld x10,192(x10) # 80020fa8 + 8000bef0: 04000593 addi x11,x0,64 + 8000bef4: 605000ef jal x1,8000ccf8 + 8000bef8: 00000013 addi x0,x0,0 + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00015517 auipc x10,0x15 + 8000bf04: 0f850513 addi x10,x10,248 # 80020ff8 + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00036097 auipc x1,0x36 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800425a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00016517 auipc x10,0x16 + 8000bf44: 36a50513 addi x10,x10,874 # 800222aa + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00036097 auipc x1,0x36 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800425a4 + 8000bf68: 00015517 auipc x10,0x15 + 8000bf6c: 03853503 ld x10,56(x10) # 80020fa0 + 8000bf70: 04000593 addi x11,x0,64 + 8000bf74: 585000ef jal x1,8000ccf8 + 8000bf78: 00000013 addi x0,x0,0 + 8000bf7c: 00000013 addi x0,x0,0 + 8000bf80: 00015517 auipc x10,0x15 + 8000bf84: 07850513 addi x10,x10,120 # 80020ff8 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00036097 auipc x1,0x36 + 8000bfa4: 604080e7 jalr x1,1540(x1) # 800425a4 + 8000bfa8: 00015317 auipc x6,0x15 + 8000bfac: ff833303 ld x6,-8(x6) # 80020fa0 + 8000bfb0: 00015397 auipc x7,0x15 + 8000bfb4: ff83b383 ld x7,-8(x7) # 80020fa8 + 8000bfb8: 10736a63 bltu x6,x7,8000c0cc + +000000008000bfbc : + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00016517 auipc x10,0x16 + 8000bfc4: 31950513 addi x10,x10,793 # 800222d9 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00036097 auipc x1,0x36 + 8000bfe4: 5c4080e7 jalr x1,1476(x1) # 800425a4 + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00016517 auipc x10,0x16 + 8000c004: 34150513 addi x10,x10,833 # 80022341 + 8000c008: 00000013 addi x0,x0,0 + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00036097 auipc x1,0x36 + 8000c024: 584080e7 jalr x1,1412(x1) # 800425a4 + 8000c028: 00015317 auipc x6,0x15 + 8000c02c: f7833303 ld x6,-136(x6) # 80020fa0 + 8000c030: 00015397 auipc x7,0x15 + 8000c034: f783b383 ld x7,-136(x7) # 80020fa8 + 8000c038: 40730533 sub x10,x6,x7 + 8000c03c: 04000593 addi x11,x0,64 + 8000c040: 4b9000ef jal x1,8000ccf8 + 8000c044: 00000013 addi x0,x0,0 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00015517 auipc x10,0x15 + 8000c064: f9850513 addi x10,x10,-104 # 80020ff8 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00036097 auipc x1,0x36 + 8000c084: 524080e7 jalr x1,1316(x1) # 800425a4 + 8000c088: 00000013 addi x0,x0,0 + 8000c08c: 00000013 addi x0,x0,0 + 8000c090: 00000013 addi x0,x0,0 + 8000c094: 00000013 addi x0,x0,0 + 8000c098: 00000013 addi x0,x0,0 + 8000c09c: 00000013 addi x0,x0,0 + 8000c0a0: 00016517 auipc x10,0x16 + 8000c0a4: 2c850513 addi x10,x10,712 # 80022368 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00036097 auipc x1,0x36 + 8000c0c4: 4e4080e7 jalr x1,1252(x1) # 800425a4 + 8000c0c8: 1dd0006f jal x0,8000caa4 + +000000008000c0cc : + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00016517 auipc x10,0x16 + 8000c0e4: 22550513 addi x10,x10,549 # 80022305 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00036097 auipc x1,0x36 + 8000c104: 4a4080e7 jalr x1,1188(x1) # 800425a4 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00016517 auipc x10,0x16 + 8000c124: 22150513 addi x10,x10,545 # 80022341 + 8000c128: 00000013 addi x0,x0,0 + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00036097 auipc x1,0x36 + 8000c144: 464080e7 jalr x1,1124(x1) # 800425a4 + 8000c148: 00015317 auipc x6,0x15 + 8000c14c: e6033303 ld x6,-416(x6) # 80020fa8 + 8000c150: 00015397 auipc x7,0x15 + 8000c154: e503b383 ld x7,-432(x7) # 80020fa0 + 8000c158: 40730533 sub x10,x6,x7 + 8000c15c: 04000593 addi x11,x0,64 + 8000c160: 399000ef jal x1,8000ccf8 + 8000c164: 00000013 addi x0,x0,0 + 8000c168: 00000013 addi x0,x0,0 + 8000c16c: 00000013 addi x0,x0,0 + 8000c170: 00000013 addi x0,x0,0 + 8000c174: 00000013 addi x0,x0,0 + 8000c178: 00000013 addi x0,x0,0 + 8000c17c: 00000013 addi x0,x0,0 + 8000c180: 00015517 auipc x10,0x15 + 8000c184: e7850513 addi x10,x10,-392 # 80020ff8 + 8000c188: 00000013 addi x0,x0,0 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00036097 auipc x1,0x36 + 8000c1a4: 404080e7 jalr x1,1028(x1) # 800425a4 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 00016517 auipc x10,0x16 + 8000c1c4: 29050513 addi x10,x10,656 # 80022450 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00036097 auipc x1,0x36 + 8000c1e4: 3c4080e7 jalr x1,964(x1) # 800425a4 + 8000c1e8: 0bd0006f jal x0,8000caa4 + +000000008000c1ec : + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 00016517 auipc x10,0x16 + 8000c204: 33750513 addi x10,x10,823 # 80022537 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00036097 auipc x1,0x36 + 8000c224: 384080e7 jalr x1,900(x1) # 800425a4 + 8000c228: 00015517 auipc x10,0x15 + 8000c22c: d9c52503 lw x10,-612(x10) # 80020fc4 + 8000c230: 04050a63 beq x10,x0,8000c284 + 8000c234: 00100593 addi x11,x0,1 + 8000c238: 08b50663 beq x10,x11,8000c2c4 + 8000c23c: 00200593 addi x11,x0,2 + 8000c240: 0cb50263 beq x10,x11,8000c304 + 8000c244: 00300593 addi x11,x0,3 + 8000c248: 0eb50e63 beq x10,x11,8000c344 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 31350513 addi x10,x10,787 # 80022573 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 1000006f jal x0,8000c380 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 2b150513 addi x10,x10,689 # 80022551 + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + 8000c2c0: 0c00006f jal x0,8000c380 + +000000008000c2c4 : + 8000c2c4: 00000013 addi x0,x0,0 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 27950513 addi x10,x10,633 # 80022559 + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 0800006f jal x0,8000c380 + +000000008000c304 : + 8000c304: 00000013 addi x0,x0,0 + 8000c308: 00000013 addi x0,x0,0 + 8000c30c: 00000013 addi x0,x0,0 + 8000c310: 00000013 addi x0,x0,0 + 8000c314: 00000013 addi x0,x0,0 + 8000c318: 00000013 addi x0,x0,0 + 8000c31c: 00000013 addi x0,x0,0 + 8000c320: 00016517 auipc x10,0x16 + 8000c324: 24150513 addi x10,x10,577 # 80022561 + 8000c328: 00000013 addi x0,x0,0 + 8000c32c: 00000013 addi x0,x0,0 + 8000c330: 00000013 addi x0,x0,0 + 8000c334: 00000013 addi x0,x0,0 + 8000c338: 00000013 addi x0,x0,0 + 8000c33c: 00000013 addi x0,x0,0 + 8000c340: 0400006f jal x0,8000c380 + +000000008000c344 : + 8000c344: 00000013 addi x0,x0,0 + 8000c348: 00000013 addi x0,x0,0 + 8000c34c: 00000013 addi x0,x0,0 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00016517 auipc x10,0x16 + 8000c364: 20a50513 addi x10,x10,522 # 8002256a + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + +000000008000c380 : + 8000c380: 00036097 auipc x1,0x36 + 8000c384: 224080e7 jalr x1,548(x1) # 800425a4 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 1dc50513 addi x10,x10,476 # 8002257c + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 00036097 auipc x1,0x36 + 8000c3c4: 1e4080e7 jalr x1,484(x1) # 800425a4 + 8000c3c8: 00015517 auipc x10,0x15 + 8000c3cc: bf852503 lw x10,-1032(x10) # 80020fc0 + 8000c3d0: 00100593 addi x11,x0,1 + 8000c3d4: 06b50863 beq x10,x11,8000c444 + 8000c3d8: 00200593 addi x11,x0,2 + 8000c3dc: 0ab50463 beq x10,x11,8000c484 + 8000c3e0: 00300593 addi x11,x0,3 + 8000c3e4: 0eb50063 beq x10,x11,8000c4c4 + 8000c3e8: 00400593 addi x11,x0,4 + 8000c3ec: 10b50c63 beq x10,x11,8000c504 + 8000c3f0: 00500593 addi x11,x0,5 + 8000c3f4: 14b50863 beq x10,x11,8000c544 + 8000c3f8: 00600593 addi x11,x0,6 + 8000c3fc: 18b50463 beq x10,x11,8000c584 + 8000c400: 00700593 addi x11,x0,7 + 8000c404: 1cb50063 beq x10,x11,8000c5c4 + 8000c408: 00800593 addi x11,x0,8 + 8000c40c: 1eb50c63 beq x10,x11,8000c604 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 2b350513 addi x10,x10,691 # 800226d3 + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 2000006f jal x0,8000c640 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 13650513 addi x10,x10,310 # 80022596 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1c00006f jal x0,8000c640 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 12750513 addi x10,x10,295 # 800225c7 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 1800006f jal x0,8000c640 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 10750513 addi x10,x10,263 # 800225e7 + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 1400006f jal x0,8000c640 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 0e550513 addi x10,x10,229 # 80022605 + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 1000006f jal x0,8000c640 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 0c450513 addi x10,x10,196 # 80022624 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + 8000c580: 0c00006f jal x0,8000c640 + +000000008000c584 : + 8000c584: 00000013 addi x0,x0,0 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 0ac50513 addi x10,x10,172 # 8002264c + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 0800006f jal x0,8000c640 + +000000008000c5c4 : + 8000c5c4: 00000013 addi x0,x0,0 + 8000c5c8: 00000013 addi x0,x0,0 + 8000c5cc: 00000013 addi x0,x0,0 + 8000c5d0: 00000013 addi x0,x0,0 + 8000c5d4: 00000013 addi x0,x0,0 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00016517 auipc x10,0x16 + 8000c5e4: 09850513 addi x10,x10,152 # 80022678 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 0400006f jal x0,8000c640 + +000000008000c604 : + 8000c604: 00000013 addi x0,x0,0 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 08450513 addi x10,x10,132 # 800226a4 + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + +000000008000c640 : + 8000c640: 00036097 auipc x1,0x36 + 8000c644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000c648: 00000013 addi x0,x0,0 + 8000c64c: 00000013 addi x0,x0,0 + 8000c650: 00000013 addi x0,x0,0 + 8000c654: 00000013 addi x0,x0,0 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00016517 auipc x10,0x16 + 8000c664: 08250513 addi x10,x10,130 # 800226e2 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00036097 auipc x1,0x36 + 8000c684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: 92053503 ld x10,-1760(x10) # 80020fa8 + 8000c690: 04000593 addi x11,x0,64 + 8000c694: 664000ef jal x1,8000ccf8 + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00015517 auipc x10,0x15 + 8000c6a4: 95850513 addi x10,x10,-1704 # 80020ff8 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00036097 auipc x1,0x36 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800425a4 + 8000c6c8: 00000013 addi x0,x0,0 + 8000c6cc: 00000013 addi x0,x0,0 + 8000c6d0: 00000013 addi x0,x0,0 + 8000c6d4: 00000013 addi x0,x0,0 + 8000c6d8: 00000013 addi x0,x0,0 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 01950513 addi x10,x10,25 # 800226f9 + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00036097 auipc x1,0x36 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800425a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: 89853503 ld x10,-1896(x10) # 80020fa0 + 8000c710: 04000593 addi x11,x0,64 + 8000c714: 5e4000ef jal x1,8000ccf8 + 8000c718: 00000013 addi x0,x0,0 + 8000c71c: 00000013 addi x0,x0,0 + 8000c720: 00015517 auipc x10,0x15 + 8000c724: 8d850513 addi x10,x10,-1832 # 80020ff8 + 8000c728: 00000013 addi x0,x0,0 + 8000c72c: 00000013 addi x0,x0,0 + 8000c730: 00000013 addi x0,x0,0 + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00036097 auipc x1,0x36 + 8000c744: e64080e7 jalr x1,-412(x1) # 800425a4 + 8000c748: 00015517 auipc x10,0x15 + 8000c74c: 87852503 lw x10,-1928(x10) # 80020fc0 + 8000c750: 00200593 addi x11,x0,2 + 8000c754: 08b51463 bne x10,x11,8000c7dc + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00016517 auipc x10,0x16 + 8000c764: fb050513 addi x10,x10,-80 # 80022710 + 8000c768: 00000013 addi x0,x0,0 + 8000c76c: 00000013 addi x0,x0,0 + 8000c770: 00000013 addi x0,x0,0 + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00036097 auipc x1,0x36 + 8000c784: e24080e7 jalr x1,-476(x1) # 800425a4 + 8000c788: 00015517 auipc x10,0x15 + 8000c78c: 82053503 ld x10,-2016(x10) # 80020fa8 + 8000c790: 284000ef jal x1,8000ca14 + 8000c794: 00036097 auipc x1,0x36 + 8000c798: e10080e7 jalr x1,-496(x1) # 800425a4 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00016517 auipc x10,0x16 + 8000c7a4: f8750513 addi x10,x10,-121 # 80022727 + 8000c7a8: 00000013 addi x0,x0,0 + 8000c7ac: 00000013 addi x0,x0,0 + 8000c7b0: 00000013 addi x0,x0,0 + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00036097 auipc x1,0x36 + 8000c7c4: de4080e7 jalr x1,-540(x1) # 800425a4 + 8000c7c8: 00014517 auipc x10,0x14 + 8000c7cc: 7d853503 ld x10,2008(x10) # 80020fa0 + 8000c7d0: 244000ef jal x1,8000ca14 + 8000c7d4: 00036097 auipc x1,0x36 + 8000c7d8: dd0080e7 jalr x1,-560(x1) # 800425a4 + +000000008000c7dc : + 8000c7dc: 00000097 auipc x1,0x0 + 8000c7e0: 314080e7 jalr x1,788(x1) # 8000caf0 + 8000c7e4: 00014517 auipc x10,0x14 + 8000c7e8: 7dc52503 lw x10,2012(x10) # 80020fc0 + 8000c7ec: 00100593 addi x11,x0,1 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: f9d50513 addi x10,x10,-99 # 8002279d + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00036097 auipc x1,0x36 + 8000c824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000c828: 27c0006f jal x0,8000caa4 + 8000c82c: 00200593 addi x11,x0,2 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 03350513 addi x10,x10,51 # 80022873 + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00036097 auipc x1,0x36 + 8000c864: d44080e7 jalr x1,-700(x1) # 800425a4 + 8000c868: 23c0006f jal x0,8000caa4 + 8000c86c: 00300593 addi x11,x0,3 + 8000c870: 02b51e63 bne x10,x11,8000c8ac + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 0e650513 addi x10,x10,230 # 80022966 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00036097 auipc x1,0x36 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000c8a8: 1fc0006f jal x0,8000caa4 + 8000c8ac: 00400593 addi x11,x0,4 + 8000c8b0: 02b51e63 bne x10,x11,8000c8ec + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00016517 auipc x10,0x16 + 8000c8c4: 1a150513 addi x10,x10,417 # 80022a61 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00036097 auipc x1,0x36 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000c8e8: 1bc0006f jal x0,8000caa4 + 8000c8ec: 00500593 addi x11,x0,5 + 8000c8f0: 02b51e63 bne x10,x11,8000c92c + 8000c8f4: 00000013 addi x0,x0,0 + 8000c8f8: 00000013 addi x0,x0,0 + 8000c8fc: 00000013 addi x0,x0,0 + 8000c900: 00016517 auipc x10,0x16 + 8000c904: 24850513 addi x10,x10,584 # 80022b48 + 8000c908: 00000013 addi x0,x0,0 + 8000c90c: 00000013 addi x0,x0,0 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00036097 auipc x1,0x36 + 8000c924: c84080e7 jalr x1,-892(x1) # 800425a4 + 8000c928: 17c0006f jal x0,8000caa4 + 8000c92c: 1780006f jal x0,8000caa4 + +000000008000c930 : + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00016517 auipc x10,0x16 + 8000c944: e1550513 addi x10,x10,-491 # 80022755 + 8000c948: 00000013 addi x0,x0,0 + 8000c94c: 00000013 addi x0,x0,0 + 8000c950: 00000013 addi x0,x0,0 + 8000c954: 00000013 addi x0,x0,0 + 8000c958: 00000013 addi x0,x0,0 + 8000c95c: 00000013 addi x0,x0,0 + 8000c960: 00036097 auipc x1,0x36 + 8000c964: c44080e7 jalr x1,-956(x1) # 800425a4 + 8000c968: 00014617 auipc x12,0x14 + 8000c96c: 67063603 ld x12,1648(x12) # 80020fd8 + 8000c970: 00000013 addi x0,x0,0 + 8000c974: 00000013 addi x0,x0,0 + 8000c978: 00000013 addi x0,x0,0 + 8000c97c: 00000013 addi x0,x0,0 + 8000c980: 00015517 auipc x10,0x15 + 8000c984: dbe50513 addi x10,x10,-578 # 8002173e + 8000c988: 00000013 addi x0,x0,0 + 8000c98c: 00000013 addi x0,x0,0 + 8000c990: 00000013 addi x0,x0,0 + 8000c994: 00000013 addi x0,x0,0 + 8000c998: 00000013 addi x0,x0,0 + 8000c99c: 00000013 addi x0,x0,0 + 8000c9a0: 00036097 auipc x1,0x36 + 8000c9a4: c04080e7 jalr x1,-1020(x1) # 800425a4 + 8000c9a8: 00065503 lhu x10,0(x12) + 8000c9ac: 01000593 addi x11,x0,16 + 8000c9b0: 00357413 andi x8,x10,3 + 8000c9b4: 00300493 addi x9,x0,3 + 8000c9b8: 00941a63 bne x8,x9,8000c9cc + 8000c9bc: 00265403 lhu x8,2(x12) + 8000c9c0: 01041413 slli x8,x8,0x10 + 8000c9c4: 00856533 or x10,x10,x8 + 8000c9c8: 02000593 addi x11,x0,32 + 8000c9cc: 32c000ef jal x1,8000ccf8 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00014517 auipc x10,0x14 + 8000c9e4: 61850513 addi x10,x10,1560 # 80020ff8 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00036097 auipc x1,0x36 + 8000ca04: ba4080e7 jalr x1,-1116(x1) # 800425a4 + 8000ca08: 00000097 auipc x1,0x0 + 8000ca0c: 0e8080e7 jalr x1,232(x1) # 8000caf0 + 8000ca10: 0940006f jal x0,8000caa4 + +000000008000ca14 : + 8000ca14: 02054463 blt x10,x0,8000ca3c + +000000008000ca18 : + 8000ca18: 01800593 addi x11,x0,24 + 8000ca1c: 04b55863 bge x10,x11,8000ca6c + 8000ca20: 00014597 auipc x11,0x14 + 8000ca24: 60058593 addi x11,x11,1536 # 80021020 + 8000ca28: 00251613 slli x12,x10,0x2 + 8000ca2c: 00351613 slli x12,x10,0x3 + 8000ca30: 00c585b3 add x11,x11,x12 + 8000ca34: 0005b503 ld x10,0(x11) + 8000ca38: 00008067 jalr x0,0(x1) + +000000008000ca3c : + 8000ca3c: 00100593 addi x11,x0,1 + 8000ca40: 03f59593 slli x11,x11,0x3f + 8000ca44: 00b54533 xor x10,x10,x11 + 8000ca48: 01000593 addi x11,x0,16 + 8000ca4c: 02b55063 bge x10,x11,8000ca6c + 8000ca50: 00014597 auipc x11,0x14 + 8000ca54: 69058593 addi x11,x11,1680 # 800210e0 + 8000ca58: 00251613 slli x12,x10,0x2 + 8000ca5c: 00351613 slli x12,x10,0x3 + 8000ca60: 00c585b3 add x11,x11,x12 + 8000ca64: 0005b503 ld x10,0(x11) + 8000ca68: 00008067 jalr x0,0(x1) + +000000008000ca6c : + 8000ca6c: 00000013 addi x0,x0,0 + 8000ca70: 00000013 addi x0,x0,0 + 8000ca74: 00000013 addi x0,x0,0 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00015517 auipc x10,0x15 + 8000ca84: ade50513 addi x10,x10,-1314 # 8002155e + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00008067 jalr x0,0(x1) + +000000008000caa4 : + 8000caa4: 00000013 addi x0,x0,0 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: 73650513 addi x10,x10,1846 # 800221f6 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00036097 auipc x1,0x36 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + +000000008000cae8 : + 8000cae8: 00036097 auipc x1,0x36 + 8000caec: b1c080e7 jalr x1,-1252(x1) # 80042604 + +000000008000caf0 : + 8000caf0: 00014617 auipc x12,0x14 + 8000caf4: 4e060613 addi x12,x12,1248 # 80020fd0 + 8000caf8: 00163023 sd x1,0(x12) + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00015517 auipc x10,0x15 + 8000cb04: c5f50513 addi x10,x10,-929 # 8002175f + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00036097 auipc x1,0x36 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000cb28: 00014517 auipc x10,0x14 + 8000cb2c: 4b053503 ld x10,1200(x10) # 80020fd8 + 8000cb30: 04000593 addi x11,x0,64 + 8000cb34: 1c4000ef jal x1,8000ccf8 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00014517 auipc x10,0x14 + 8000cb44: 4b850513 addi x10,x10,1208 # 80020ff8 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00036097 auipc x1,0x36 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000cb68: 00000013 addi x0,x0,0 + 8000cb6c: 00000013 addi x0,x0,0 + 8000cb70: 00000013 addi x0,x0,0 + 8000cb74: 00000013 addi x0,x0,0 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00015517 auipc x10,0x15 + 8000cb84: bef50513 addi x10,x10,-1041 # 8002176f + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00036097 auipc x1,0x36 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + 8000cba8: 00014517 auipc x10,0x14 + 8000cbac: 43853503 ld x10,1080(x10) # 80020fe0 + 8000cbb0: 04000593 addi x11,x0,64 + 8000cbb4: 144000ef jal x1,8000ccf8 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00014517 auipc x10,0x14 + 8000cbc4: 43850513 addi x10,x10,1080 # 80020ff8 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00036097 auipc x1,0x36 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000cbe8: 00000013 addi x0,x0,0 + 8000cbec: 00000013 addi x0,x0,0 + 8000cbf0: 00000013 addi x0,x0,0 + 8000cbf4: 00000013 addi x0,x0,0 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00015517 auipc x10,0x15 + 8000cc04: b7f50513 addi x10,x10,-1153 # 8002177f + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00036097 auipc x1,0x36 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000cc28: 00014517 auipc x10,0x14 + 8000cc2c: 3c053503 ld x10,960(x10) # 80020fe8 + 8000cc30: 04000593 addi x11,x0,64 + 8000cc34: 0c4000ef jal x1,8000ccf8 + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00014517 auipc x10,0x14 + 8000cc44: 3b850513 addi x10,x10,952 # 80020ff8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 00036097 auipc x1,0x36 + 8000cc64: 944080e7 jalr x1,-1724(x1) # 800425a4 + 8000cc68: 00000013 addi x0,x0,0 + 8000cc6c: 00000013 addi x0,x0,0 + 8000cc70: 00000013 addi x0,x0,0 + 8000cc74: 00000013 addi x0,x0,0 + 8000cc78: 00000013 addi x0,x0,0 + 8000cc7c: 00000013 addi x0,x0,0 + 8000cc80: 00015517 auipc x10,0x15 + 8000cc84: b0f50513 addi x10,x10,-1265 # 8002178f + 8000cc88: 00000013 addi x0,x0,0 + 8000cc8c: 00000013 addi x0,x0,0 + 8000cc90: 00000013 addi x0,x0,0 + 8000cc94: 00000013 addi x0,x0,0 + 8000cc98: 00000013 addi x0,x0,0 + 8000cc9c: 00000013 addi x0,x0,0 + 8000cca0: 00036097 auipc x1,0x36 + 8000cca4: 904080e7 jalr x1,-1788(x1) # 800425a4 + 8000cca8: 00014517 auipc x10,0x14 + 8000ccac: 34853503 ld x10,840(x10) # 80020ff0 + 8000ccb0: 04000593 addi x11,x0,64 + 8000ccb4: 044000ef jal x1,8000ccf8 + 8000ccb8: 00000013 addi x0,x0,0 + 8000ccbc: 00000013 addi x0,x0,0 + 8000ccc0: 00014517 auipc x10,0x14 + 8000ccc4: 33850513 addi x10,x10,824 # 80020ff8 + 8000ccc8: 00000013 addi x0,x0,0 + 8000cccc: 00000013 addi x0,x0,0 + 8000ccd0: 00000013 addi x0,x0,0 + 8000ccd4: 00000013 addi x0,x0,0 + 8000ccd8: 00000013 addi x0,x0,0 + 8000ccdc: 00000013 addi x0,x0,0 + 8000cce0: 00036097 auipc x1,0x36 + 8000cce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000cce8: 00014617 auipc x12,0x14 + 8000ccec: 2e860613 addi x12,x12,744 # 80020fd0 + 8000ccf0: 00063083 ld x1,0(x12) + 8000ccf4: 00008067 jalr x0,0(x1) + +000000008000ccf8 : + 8000ccf8: 00000013 addi x0,x0,0 + 8000ccfc: 00000013 addi x0,x0,0 + 8000cd00: 00014617 auipc x12,0x14 + 8000cd04: 2f860613 addi x12,x12,760 # 80020ff8 + 8000cd08: 00000013 addi x0,x0,0 + 8000cd0c: 00000013 addi x0,x0,0 + 8000cd10: 00000013 addi x0,x0,0 + 8000cd14: 00000013 addi x0,x0,0 + 8000cd18: 00000013 addi x0,x0,0 + 8000cd1c: 00000013 addi x0,x0,0 + 8000cd20: 03000693 addi x13,x0,48 + 8000cd24: 00d60023 sb x13,0(x12) + 8000cd28: 07800693 addi x13,x0,120 + 8000cd2c: 00d600a3 sb x13,1(x12) + 8000cd30: 00260613 addi x12,x12,2 + 8000cd34: 00058693 addi x13,x11,0 + +000000008000cd38 : + 8000cd38: ffc68693 addi x13,x13,-4 + 8000cd3c: 00d55733 srl x14,x10,x13 + 8000cd40: 00f77713 andi x14,x14,15 + 8000cd44: 00a00793 addi x15,x0,10 + 8000cd48: 00f74663 blt x14,x15,8000cd54 + 8000cd4c: 05770713 addi x14,x14,87 + 8000cd50: 0080006f jal x0,8000cd58 + +000000008000cd54 : + 8000cd54: 03070713 addi x14,x14,48 + +000000008000cd58 : + 8000cd58: 00e60023 sb x14,0(x12) + 8000cd5c: 00160613 addi x12,x12,1 + 8000cd60: fc069ce3 bne x13,x0,8000cd38 + 8000cd64: 00a00693 addi x13,x0,10 + 8000cd68: 00d60023 sb x13,0(x12) + 8000cd6c: 000600a3 sb x0,1(x12) + 8000cd70: 00008067 jalr x0,0(x1) + +000000008000cd74 : + 8000cd74: 00a00693 addi x13,x0,10 + 8000cd78: 02d54663 blt x10,x13,8000cda4 + 8000cd7c: ff650513 addi x10,x10,-10 + 8000cd80: 03100713 addi x14,x0,49 + 8000cd84: 00d54c63 blt x10,x13,8000cd9c + 8000cd88: ff650513 addi x10,x10,-10 + 8000cd8c: 03200713 addi x14,x0,50 + 8000cd90: 00d54663 blt x10,x13,8000cd9c + 8000cd94: ff650513 addi x10,x10,-10 + 8000cd98: 03300713 addi x14,x0,51 + 8000cd9c: 00e60023 sb x14,0(x12) + 8000cda0: 00160613 addi x12,x12,1 + 8000cda4: 03050513 addi x10,x10,48 + 8000cda8: 00a60023 sb x10,0(x12) + 8000cdac: 00a00693 addi x13,x0,10 + 8000cdb0: 00d600a3 sb x13,1(x12) + 8000cdb4: 00060123 sb x0,2(x12) + 8000cdb8: 00008067 jalr x0,0(x1) + 8000cdbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080042000 : + 80042000: 10010737 lui x14,0x10010 + 80042004: 00072023 sw x0,0(x14) # 10010000 + 80042008: fffc9397 auipc x7,0xfffc9 + 8004200c: cb038393 addi x7,x7,-848 # 8000acb8 + 80042010: 00038067 jalr x0,0(x7) + +0000000080042014 : + 80042014: fff00713 addi x14,x0,-1 + 80042018: 100143b7 lui x7,0x10014 + 8004201c: 00e3b023 sd x14,0(x7) # 10014000 + 80042020: fffc9397 auipc x7,0xfffc9 + 80042024: c9838393 addi x7,x7,-872 # 8000acb8 + 80042028: 00038067 jalr x0,0(x7) + +000000008004202c : + 8004202c: 10000737 lui x14,0x10000 + 80042030: 0107071b addiw x14,x14,16 # 10000010 + 80042034: 00070023 sb x0,0(x14) + 80042038: fffc9397 auipc x7,0xfffc9 + 8004203c: c8038393 addi x7,x7,-896 # 8000acb8 + 80042040: 00038067 jalr x0,0(x7) + +0000000080042044 : + 80042044: 00200393 addi x7,x0,2 + 80042048: 3443b073 csrrc x0,mip,x7 + 8004204c: fffc9397 auipc x7,0xfffc9 + 80042050: c6c38393 addi x7,x7,-916 # 8000acb8 + 80042054: 00038067 jalr x0,0(x7) + +0000000080042058 : + 80042058: fffc9397 auipc x7,0xfffc9 + 8004205c: c6038393 addi x7,x7,-928 # 8000acb8 + 80042060: 00038067 jalr x0,0(x7) + +0000000080042064 : + 80042064: 20000413 addi x8,x0,512 + 80042068: 34443073 csrrc x0,mip,x8 + 8004206c: 34402473 csrrs x8,mip,x0 + 80042070: 00001337 lui x6,0x1 + 80042074: 8003031b addiw x6,x6,-2048 # 800 + 80042078: 00647433 and x8,x8,x6 + 8004207c: 00830863 beq x6,x8,8004208c + 80042080: 10000737 lui x14,0x10000 + 80042084: 0187071b addiw x14,x14,24 # 10000018 + 80042088: 00070023 sb x0,0(x14) + 8004208c: fffc9397 auipc x7,0xfffc9 + 80042090: c2c38393 addi x7,x7,-980 # 8000acb8 + 80042094: 00038067 jalr x0,0(x7) + +0000000080042098 : + 80042098: fffc8317 auipc x6,0xfffc8 + 8004209c: d5830313 addi x6,x6,-680 # 80009df0 + 800420a0: 00030067 jalr x0,0(x6) + 800420a4: fffc9397 auipc x7,0xfffc9 + 800420a8: c1438393 addi x7,x7,-1004 # 8000acb8 + 800420ac: 00038067 jalr x0,0(x7) + +00000000800420b0 : + 800420b0: fffc8317 auipc x6,0xfffc8 + 800420b4: d4030313 addi x6,x6,-704 # 80009df0 + 800420b8: 00030067 jalr x0,0(x6) + 800420bc: fffc9397 auipc x7,0xfffc9 + 800420c0: bfc38393 addi x7,x7,-1028 # 8000acb8 + 800420c4: 00038067 jalr x0,0(x7) + +00000000800420c8 : + 800420c8: fffc8317 auipc x6,0xfffc8 + 800420cc: d2830313 addi x6,x6,-728 # 80009df0 + 800420d0: 00030067 jalr x0,0(x6) + 800420d4: fffc9397 auipc x7,0xfffc9 + 800420d8: be438393 addi x7,x7,-1052 # 8000acb8 + 800420dc: 00038067 jalr x0,0(x7) + +00000000800420e0 : + 800420e0: 30401073 csrrw x0,mie,x0 + 800420e4: 34401073 csrrw x0,mip,x0 + 800420e8: 34101073 csrrw x0,mepc,x0 + 800420ec: 34301073 csrrw x0,mtval,x0 + 800420f0: 34201073 csrrw x0,mcause,x0 + 800420f4: 00000013 addi x0,x0,0 + 800420f8: 00000013 addi x0,x0,0 + 800420fc: 00000013 addi x0,x0,0 + 80042100: fffce317 auipc x6,0xfffce + 80042104: 01030313 addi x6,x6,16 # 80010110 + 80042108: 00000013 addi x0,x0,0 + 8004210c: 00000013 addi x0,x0,0 + 80042110: 00000013 addi x0,x0,0 + 80042114: 00000013 addi x0,x0,0 + 80042118: 00000013 addi x0,x0,0 + 8004211c: 00000013 addi x0,x0,0 + +0000000080042120 : + 80042120: 34031473 csrrw x8,mscratch,x6 + 80042124: 2c833823 sd x8,720(x6) + +0000000080042128 : + 80042128: fff00393 addi x7,x0,-1 + 8004212c: 000044b7 lui x9,0x4 + 80042130: 00548493 addi x9,x9,5 # 4005 + 80042134: 00e49493 slli x9,x9,0xe + 80042138: 0074b023 sd x7,0(x9) + 8004213c: 00000013 addi x0,x0,0 + +0000000080042140 : + 80042140: 00000393 addi x7,x0,0 + 80042144: 2a733c23 sd x7,696(x6) + +0000000080042148 : + 80042148: 30502473 csrrs x8,mtvec,x0 + 8004214c: 2c833423 sd x8,712(x6) + 80042150: 00347393 andi x7,x8,3 + 80042154: ffc3f393 andi x7,x7,-4 + 80042158: 2b033483 ld x9,688(x6) + 8004215c: da848493 addi x9,x9,-600 + 80042160: 0074e3b3 or x7,x9,x7 + 80042164: 2c733023 sd x7,704(x6) + 80042168: 30539073 csrrw x0,mtvec,x7 + 8004216c: 30502773 csrrs x14,mtvec,x0 + 80042170: 0e770a63 beq x14,x7,80042264 + 80042174: 30541073 csrrw x0,mtvec,x8 + 80042178: 0a040663 beq x8,x0,80042224 + 8004217c: 2c833023 sd x8,704(x6) + +0000000080042180 : + 80042180: ffc47393 andi x7,x8,-4 + 80042184: 25838413 addi x8,x7,600 + 80042188: 00030113 addi x2,x6,0 + 8004218c: 00000013 addi x0,x0,0 + 80042190: 00000013 addi x0,x0,0 + 80042194: 00000013 addi x0,x0,0 + 80042198: 00000013 addi x0,x0,0 + 8004219c: 00000013 addi x0,x0,0 + 800421a0: 00000717 auipc x14,0x0 + 800421a4: 04c70713 addi x14,x14,76 # 800421ec + 800421a8: 00000013 addi x0,x0,0 + 800421ac: 00000013 addi x0,x0,0 + 800421b0: 00000013 addi x0,x0,0 + 800421b4: 00000013 addi x0,x0,0 + 800421b8: 00000013 addi x0,x0,0 + 800421bc: 00000013 addi x0,x0,0 + 800421c0: 00000797 auipc x15,0x0 + 800421c4: 0a478793 addi x15,x15,164 # 80042264 + 800421c8: 00000013 addi x0,x0,0 + 800421cc: 00000013 addi x0,x0,0 + 800421d0: 00000013 addi x0,x0,0 + 800421d4: 00000013 addi x0,x0,0 + 800421d8: 00000013 addi x0,x0,0 + 800421dc: 00000013 addi x0,x0,0 + 800421e0: 00f3f663 bgeu x7,x15,800421ec + 800421e4: 00877463 bgeu x14,x8,800421ec + 800421e8: 03c0006f jal x0,80042224 + +00000000800421ec : + 800421ec: 0003a783 lw x15,0(x7) + 800421f0: 00f32023 sw x15,0(x6) + 800421f4: 0004a703 lw x14,0(x9) + 800421f8: 00e3a023 sw x14,0(x7) + 800421fc: 0003a783 lw x15,0(x7) + 80042200: 00e79a63 bne x15,x14,80042214 + 80042204: 00438393 addi x7,x7,4 + 80042208: 00430313 addi x6,x6,4 + 8004220c: 00448493 addi x9,x9,4 + 80042210: fc741ee3 bne x8,x7,800421ec + +0000000080042214 : + 80042214: 0000100f fence.i + 80042218: 34002373 csrrs x6,mscratch,x0 + 8004221c: 2a933823 sd x9,688(x6) + 80042220: 04740263 beq x8,x7,80042264 + +0000000080042224 : + 80042224: 00038413 addi x8,x7,0 + 80042228: 00000013 addi x0,x0,0 + 8004222c: 00000013 addi x0,x0,0 + 80042230: 00000013 addi x0,x0,0 + 80042234: 00000013 addi x0,x0,0 + 80042238: 00000013 addi x0,x0,0 + 8004223c: 00000013 addi x0,x0,0 + 80042240: fffc8797 auipc x15,0xfffc8 + 80042244: bc078793 addi x15,x15,-1088 # 80009e00 + 80042248: 00000013 addi x0,x0,0 + 8004224c: 00000013 addi x0,x0,0 + 80042250: 00000013 addi x0,x0,0 + 80042254: 00000013 addi x0,x0,0 + 80042258: 00000013 addi x0,x0,0 + 8004225c: 00000013 addi x0,x0,0 + 80042260: 00078067 jalr x0,0(x15) + +0000000080042264 : + 80042264: 00000013 addi x0,x0,0 + +0000000080042268 : + 80042268: 005002b7 lui x5,0x500 + 8004226c: 0012829b addiw x5,x5,1 # 500001 + 80042270: 00d29293 slli x5,x5,0xd + 80042274: 80028293 addi x5,x5,-2048 + 80042278: 30029073 csrrw x0,mstatus,x5 + 8004227c: 32001073 csrrw x0,mcountinhibit,x0 + 80042280: 32301073 csrrw x0,mhpmevent3,x0 + 80042284: 32401073 csrrw x0,mhpmevent4,x0 + 80042288: 32501073 csrrw x0,mhpmevent5,x0 + 8004228c: 32601073 csrrw x0,mhpmevent6,x0 + 80042290: 32701073 csrrw x0,mhpmevent7,x0 + 80042294: 32801073 csrrw x0,mhpmevent8,x0 + 80042298: 32901073 csrrw x0,mhpmevent9,x0 + 8004229c: 32a01073 csrrw x0,mhpmevent10,x0 + 800422a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800422a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800422a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800422ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800422b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800422b4: 33001073 csrrw x0,mhpmevent16,x0 + 800422b8: 33101073 csrrw x0,mhpmevent17,x0 + 800422bc: 33201073 csrrw x0,mhpmevent18,x0 + 800422c0: 33301073 csrrw x0,mhpmevent19,x0 + 800422c4: 33401073 csrrw x0,mhpmevent20,x0 + 800422c8: 33501073 csrrw x0,mhpmevent21,x0 + 800422cc: 33601073 csrrw x0,mhpmevent22,x0 + 800422d0: 33701073 csrrw x0,mhpmevent23,x0 + 800422d4: 33801073 csrrw x0,mhpmevent24,x0 + 800422d8: 33901073 csrrw x0,mhpmevent25,x0 + 800422dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800422e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800422e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800422e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800422ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800422f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800422f4: 00000013 addi x0,x0,0 + 800422f8: 00000013 addi x0,x0,0 + 800422fc: 00000013 addi x0,x0,0 + 80042300: fffce317 auipc x6,0xfffce + 80042304: e0830313 addi x6,x6,-504 # 80010108 + 80042308: 00000013 addi x0,x0,0 + 8004230c: 00000013 addi x0,x0,0 + 80042310: 00000013 addi x0,x0,0 + 80042314: 00000013 addi x0,x0,0 + 80042318: 00000013 addi x0,x0,0 + 8004231c: 00000013 addi x0,x0,0 + 80042320: 00033023 sd x0,0(x6) + +0000000080042324 : + 80042324: feedc0b7 lui x1,0xfeedc + 80042328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004232c: 00b09093 slli x1,x1,0xb + 80042330: 7f708093 addi x1,x1,2039 + 80042334: 00b09093 slli x1,x1,0xb + 80042338: 36f08093 addi x1,x1,879 + 8004233c: 00a09093 slli x1,x1,0xa + 80042340: 2ad08093 addi x1,x1,685 + 80042344: 03909793 slli x15,x1,0x39 + 80042348: 0070d113 srli x2,x1,0x7 + 8004234c: 00f16133 or x2,x2,x15 + 80042350: 03911793 slli x15,x2,0x39 + 80042354: 00715193 srli x3,x2,0x7 + 80042358: 00f1e1b3 or x3,x3,x15 + 8004235c: 03919793 slli x15,x3,0x39 + 80042360: 0071d213 srli x4,x3,0x7 + 80042364: 00f26233 or x4,x4,x15 + 80042368: 03921793 slli x15,x4,0x39 + 8004236c: 00725293 srli x5,x4,0x7 + 80042370: 00f2e2b3 or x5,x5,x15 + 80042374: 03929793 slli x15,x5,0x39 + 80042378: 0072d313 srli x6,x5,0x7 + 8004237c: 00f36333 or x6,x6,x15 + 80042380: 03931793 slli x15,x6,0x39 + 80042384: 00735393 srli x7,x6,0x7 + 80042388: 00f3e3b3 or x7,x7,x15 + 8004238c: 03939793 slli x15,x7,0x39 + 80042390: 0073d413 srli x8,x7,0x7 + 80042394: 00f46433 or x8,x8,x15 + 80042398: 03941793 slli x15,x8,0x39 + 8004239c: 00745493 srli x9,x8,0x7 + 800423a0: 00f4e4b3 or x9,x9,x15 + 800423a4: 03949793 slli x15,x9,0x39 + 800423a8: 0074d513 srli x10,x9,0x7 + 800423ac: 00f56533 or x10,x10,x15 + 800423b0: 03951793 slli x15,x10,0x39 + 800423b4: 00755593 srli x11,x10,0x7 + 800423b8: 00f5e5b3 or x11,x11,x15 + 800423bc: 03959793 slli x15,x11,0x39 + 800423c0: 0075d613 srli x12,x11,0x7 + 800423c4: 00f66633 or x12,x12,x15 + 800423c8: 03961793 slli x15,x12,0x39 + 800423cc: 00765693 srli x13,x12,0x7 + 800423d0: 00f6e6b3 or x13,x13,x15 + 800423d4: 03969793 slli x15,x13,0x39 + 800423d8: 0076d713 srli x14,x13,0x7 + 800423dc: 00f76733 or x14,x14,x15 + 800423e0: fab807b7 lui x15,0xfab80 + 800423e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800423e8: 00b79793 slli x15,x15,0xb + 800423ec: 7d578793 addi x15,x15,2005 + 800423f0: 00b79793 slli x15,x15,0xb + 800423f4: 5fe78793 addi x15,x15,1534 + 800423f8: 00a79793 slli x15,x15,0xa + 800423fc: 3b678793 addi x15,x15,950 + 80042400: 7d5c0837 lui x16,0x7d5c0 + 80042404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80042408: 00b81813 slli x16,x16,0xb + 8004240c: 3ea80813 addi x16,x16,1002 + 80042410: 00b81813 slli x16,x16,0xb + 80042414: 6ff80813 addi x16,x16,1791 + 80042418: 00a81813 slli x16,x16,0xa + 8004241c: 1db80813 addi x16,x16,475 + 80042420: 03981793 slli x15,x16,0x39 + 80042424: 00785893 srli x17,x16,0x7 + 80042428: 00f8e8b3 or x17,x17,x15 + 8004242c: 03989793 slli x15,x17,0x39 + 80042430: 0078d913 srli x18,x17,0x7 + 80042434: 00f96933 or x18,x18,x15 + 80042438: 03991793 slli x15,x18,0x39 + 8004243c: 00795993 srli x19,x18,0x7 + 80042440: 00f9e9b3 or x19,x19,x15 + 80042444: 03999793 slli x15,x19,0x39 + 80042448: 0079da13 srli x20,x19,0x7 + 8004244c: 00fa6a33 or x20,x20,x15 + 80042450: 039a1793 slli x15,x20,0x39 + 80042454: 007a5a93 srli x21,x20,0x7 + 80042458: 00faeab3 or x21,x21,x15 + 8004245c: 039a9793 slli x15,x21,0x39 + 80042460: 007adb13 srli x22,x21,0x7 + 80042464: 00fb6b33 or x22,x22,x15 + 80042468: 039b1793 slli x15,x22,0x39 + 8004246c: 007b5b93 srli x23,x22,0x7 + 80042470: 00fbebb3 or x23,x23,x15 + 80042474: 039b9793 slli x15,x23,0x39 + 80042478: 007bdc13 srli x24,x23,0x7 + 8004247c: 00fc6c33 or x24,x24,x15 + 80042480: 039c1793 slli x15,x24,0x39 + 80042484: 007c5c93 srli x25,x24,0x7 + 80042488: 00fcecb3 or x25,x25,x15 + 8004248c: 039c9793 slli x15,x25,0x39 + 80042490: 007cdd13 srli x26,x25,0x7 + 80042494: 00fd6d33 or x26,x26,x15 + 80042498: 039d1793 slli x15,x26,0x39 + 8004249c: 007d5d93 srli x27,x26,0x7 + 800424a0: 00fdedb3 or x27,x27,x15 + 800424a4: 039d9793 slli x15,x27,0x39 + 800424a8: 007dde13 srli x28,x27,0x7 + 800424ac: 00fe6e33 or x28,x28,x15 + 800424b0: 039e1793 slli x15,x28,0x39 + 800424b4: 007e5e93 srli x29,x28,0x7 + 800424b8: 00feeeb3 or x29,x29,x15 + 800424bc: 039e9793 slli x15,x29,0x39 + 800424c0: 007edf13 srli x30,x29,0x7 + 800424c4: 00ff6f33 or x30,x30,x15 + 800424c8: 039f1793 slli x15,x30,0x39 + 800424cc: 007f5f93 srli x31,x30,0x7 + 800424d0: 00ffefb3 or x31,x31,x15 + 800424d4: 00000013 addi x0,x0,0 + 800424d8: 00000013 addi x0,x0,0 + 800424dc: 00000013 addi x0,x0,0 + 800424e0: fffe0117 auipc x2,0xfffe0 + 800424e4: 7a010113 addi x2,x2,1952 # 80022c80 + 800424e8: 00000013 addi x0,x0,0 + 800424ec: 00000013 addi x0,x0,0 + 800424f0: 00000013 addi x0,x0,0 + 800424f4: 00000013 addi x0,x0,0 + 800424f8: 00000013 addi x0,x0,0 + 800424fc: 00000013 addi x0,x0,0 + +0000000080042500 : + 80042500: 6f5ca337 lui x6,0x6f5ca + 80042504: 30930313 addi x6,x6,777 # 6f5ca309 + 80042508: 00b31313 slli x6,x6,0xb + 8004250c: 73e30313 addi x6,x6,1854 + 80042510: 00b31313 slli x6,x6,0xb + 80042514: 52c30313 addi x6,x6,1324 + 80042518: 00a31313 slli x6,x6,0xa + 8004251c: 28130313 addi x6,x6,641 + 80042520: fffc9197 auipc x3,0xfffc9 + 80042524: ca018193 addi x3,x3,-864 # 8000b1c0 + 80042528: 00000013 addi x0,x0,0 + 8004252c: 00000013 addi x0,x0,0 + 80042530: 00000013 addi x0,x0,0 + 80042534: 00000013 addi x0,x0,0 + 80042538: 00000013 addi x0,x0,0 + 8004253c: 00000013 addi x0,x0,0 + 80042540: 00013203 ld x4,0(x2) + 80042544: 00620c63 beq x4,x6,8004255c + 80042548: 000182e7 jalr x5,0(x3) + 8004254c: 80042500 .word 0x80042500 + 80042550: 00000000 .word 0x00000000 + 80042554: 8002221f .word 0x8002221f + 80042558: 00000000 .word 0x00000000 + 8004255c: 00810113 addi x2,x2,8 + 80042560: fffce197 auipc x3,0xfffce + 80042564: f1018193 addi x3,x3,-240 # 80010470 + 80042568: 00000013 addi x0,x0,0 + 8004256c: 00000013 addi x0,x0,0 + 80042570: 00000013 addi x0,x0,0 + 80042574: 00000013 addi x0,x0,0 + 80042578: 00000013 addi x0,x0,0 + 8004257c: 00000013 addi x0,x0,0 + 80042580: fffbe317 auipc x6,0xfffbe + 80042584: ac030313 addi x6,x6,-1344 # 80000040 + 80042588: 00000013 addi x0,x0,0 + 8004258c: 00000013 addi x0,x0,0 + 80042590: 00000013 addi x0,x0,0 + 80042594: 00000013 addi x0,x0,0 + 80042598: 00000013 addi x0,x0,0 + 8004259c: 00000013 addi x0,x0,0 + 800425a0: 00030067 jalr x0,0(x6) + +00000000800425a4 : + 800425a4: 00054303 lbu x6,0(x10) + 800425a8: 00030a63 beq x6,x0,800425bc + 800425ac: 100003b7 lui x7,0x10000 + 800425b0: 00638023 sb x6,0(x7) # 10000000 + 800425b4: 00150513 addi x10,x10,1 + 800425b8: fedff06f jal x0,800425a4 + 800425bc: 00008067 jalr x0,0(x1) + +00000000800425c0 : + 800425c0: ff010113 addi x2,x2,-16 + 800425c4: 00113023 sd x1,0(x2) + 800425c8: 00813423 sd x8,8(x2) + 800425cc: 00000097 auipc x1,0x0 + 800425d0: fd8080e7 jalr x1,-40(x1) # 800425a4 + 800425d4: 00813403 ld x8,8(x2) + 800425d8: 00013083 ld x1,0(x2) + 800425dc: 01010113 addi x2,x2,16 + 800425e0: 00008067 jalr x0,0(x1) + +00000000800425e4 : + 800425e4: 00100093 addi x1,x0,1 + 800425e8: fffff297 auipc x5,0xfffff + 800425ec: 41828293 addi x5,x5,1048 # 80041a00 + +00000000800425f0 : + 800425f0: 0012a023 sw x1,0(x5) + 800425f4: 0002a223 sw x0,4(x5) + +00000000800425f8 : + 800425f8: 00000013 addi x0,x0,0 + 800425fc: ffdff06f jal x0,800425f8 + 80042600: 0000006f jal x0,80042600 + +0000000080042604 : + 80042604: 00300093 addi x1,x0,3 + 80042608: fffff297 auipc x5,0xfffff + 8004260c: 3f828293 addi x5,x5,1016 # 80041a00 + +0000000080042610 : + 80042610: 0012a023 sw x1,0(x5) + 80042614: 0002a223 sw x0,4(x5) + +0000000080042618 : + 80042618: 00000013 addi x0,x0,0 + 8004261c: ffdff06f jal x0,80042618 + 80042620: 0000006f jal x0,80042620 + +0000000080042624 : + 80042624: 00100513 addi x10,x0,1 + 80042628: 100105b7 lui x11,0x10010 + 8004262c: 00a5a023 sw x10,0(x11) # 10010000 + 80042630: 00008067 jalr x0,0(x1) + +0000000080042634 : + 80042634: 100105b7 lui x11,0x10010 + 80042638: 0005a023 sw x0,0(x11) # 10010000 + 8004263c: 00008067 jalr x0,0(x1) + +0000000080042640 : + 80042640: 00100513 addi x10,x0,1 + 80042644: 100005b7 lui x11,0x10000 + 80042648: 0105859b addiw x11,x11,16 # 10000010 + 8004264c: 00a58023 sb x10,0(x11) + 80042650: 00008067 jalr x0,0(x1) + +0000000080042654 : + 80042654: 100005b7 lui x11,0x10000 + 80042658: 0105859b addiw x11,x11,16 # 10000010 + 8004265c: 00058023 sb x0,0(x11) + 80042660: 00008067 jalr x0,0(x1) + 80042664: 00000013 addi x0,x0,0 + 80042668: 00000013 addi x0,x0,0 + 8004266c: 00000013 addi x0,x0,0 + 80042670: 00000013 addi x0,x0,0 + 80042674: 00000013 addi x0,x0,0 + 80042678: 00000013 addi x0,x0,0 + 8004267c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zksed-sm4ks-00.elf.objdump b/riscv-tests/rv64-Zksed-sm4ks-00.elf.objdump new file mode 100644 index 0000000..08424a5 --- /dev/null +++ b/riscv-tests/rv64-Zksed-sm4ks-00.elf.objdump @@ -0,0 +1,23596 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksed/Zksed-sm4ks-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksed/Zksed-sm4ks-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000040680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003c memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x000000000000cdc0 memsz 0x000000000000cdc0 flags r-x + LOAD off 0x000000000000e000 vaddr 0x0000000080010000 paddr 0x0000000080010000 align 2**12 + filesz 0x0000000000032680 memsz 0x0000000000032680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 0000cd80 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000319e0 0000000080010000 0000000080010000 0000e000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080041a00 0000000080041a00 0003fa00 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 0000000080042000 0000000080042000 00040000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003c 0000000000000000 0000000000000000 00040680 2**0 + CONTENTS, READONLY + 6 .debug_line 00004a18 0000000000000000 0000000000000000 000406bc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007d 0000000000000000 0000000000000000 000450d4 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00045151 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00045174 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00045190 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 0000008b 0000000000000000 0000000000000000 000451d0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 0004525b 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080010000 l d .data 0000000000000000 .data +0000000080041a00 l d .tohost 0000000000000000 .tohost +0000000080042000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccKpI2zI.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +00000000800420e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000050 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b0 +000000008000b1c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800134b0 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b0_str +0000000080000084 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b1 +00000000800134e3 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b1_str +00000000800000bc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b2 +0000000080013516 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b2_str +00000000800000f4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b3 +0000000080013549 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b3_str +0000000080000130 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b4 +000000008000b200 l .text.rvtest 0000000000000000 failedtest_x14_x13 +000000008001357c l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b4_str +0000000080000164 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b5 +00000000800135af l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b5_str +0000000080000198 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b6 +00000000800135e2 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b6_str +00000000800001cc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b7 +0000000080013615 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b7_str +0000000080000200 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b8 +0000000080013648 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b8_str +0000000080000234 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b9 +000000008001367b l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b9_str +0000000080000268 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b10 +00000000800136af l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b10_str +000000008000029c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b11 +00000000800136e4 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b11_str +00000000800002d0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b12 +0000000080013719 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b12_str +000000008000030c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b13 +000000008001374e l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b13_str +0000000080000340 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b14 +0000000080013783 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b14_str +0000000080000374 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b15 +00000000800137b8 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b15_str +00000000800003a8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b16 +00000000800137ed l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b16_str +00000000800003dc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b17 +0000000080013822 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b17_str +0000000080000410 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b18 +0000000080013857 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b18_str +0000000080000444 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b19 +000000008001388c l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b19_str +0000000080000478 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b20 +00000000800138c1 l .data 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b20_str +00000000800004ac l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cp_rs1_b21 +00000000800138f6 l .data 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+0000000080017221 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str +0000000080002c24 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe +0000000080017292 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str +0000000080002c58 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff +0000000080017303 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str +0000000080002c8c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe +0000000080017374 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080002cc0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2 +00000000800173e5 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080002cf4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +0000000080017456 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080002d28 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555 +00000000800174c7 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str +0000000080002d5c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff +0000000080017538 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str +0000000080002d90 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe +00000000800175a1 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str +0000000080002dc4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000 +000000008001760a l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str +0000000080002df8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001 +0000000080017674 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str +0000000080002e2c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0 +00000000800176de l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str +0000000080002e60 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1 +0000000080017740 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str +0000000080002e94 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2 +00000000800177a2 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str +0000000080002ec8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000 +0000000080017804 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str +0000000080002efc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001 +0000000080017875 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str +0000000080002f30 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff +00000000800178e6 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str +0000000080002f64 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe +0000000080017957 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080002f98 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff +00000000800179c8 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str +0000000080002fcc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe +0000000080017a39 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003000 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080017aaa l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +0000000080003034 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +0000000080017b1b l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +0000000080003068 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555 +0000000080017b8c l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str +000000008000309c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff +0000000080017bfd l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str +00000000800030d0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe +0000000080017c66 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str +0000000080003104 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000 +0000000080017ccf l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str +0000000080003138 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001 +0000000080017d39 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str +000000008000316c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0 +0000000080017da3 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str +00000000800031a0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1 +0000000080017e05 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str +00000000800031d4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2 +0000000080017e67 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str +0000000080003208 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000 +0000000080017ec9 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str +000000008000323c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001 +0000000080017f3a l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str +0000000080003270 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff +0000000080017fab l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str +00000000800032a4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe +000000008001801c l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str +00000000800032d8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff +000000008001808d l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str +000000008000330c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe +00000000800180fe l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str +0000000080003340 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2 +000000008001816f l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str +0000000080003374 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa +00000000800181e0 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800033a8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555 +0000000080018251 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str +00000000800033dc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff +00000000800182c2 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str +0000000080003410 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe +000000008001832b l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str +0000000080003444 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000 +0000000080018394 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str +0000000080003478 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001 +00000000800183fe l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str +00000000800034ac l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0 +0000000080018468 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str +00000000800034e0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1 +00000000800184ca l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str +0000000080003514 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2 +000000008001852c l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str +0000000080003548 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000 +000000008001858e l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str +000000008000357c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001 +00000000800185ff l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str +00000000800035b0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff +0000000080018670 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str +00000000800035e4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe +00000000800186e1 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str +0000000080003618 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff +0000000080018752 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str +000000008000364c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe +00000000800187c3 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str +0000000080003680 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2 +0000000080018834 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str +00000000800036b4 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa +00000000800188a5 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str +00000000800036e8 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555 +0000000080018916 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str +000000008000371c l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff +0000000080018987 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str +0000000080003750 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe +00000000800189f0 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str +0000000080003784 l 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0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2 +0000000080018bf1 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str +0000000080003888 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000 +0000000080018c53 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str +00000000800038bc l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001 +0000000080018cc4 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str +00000000800038f0 l .text.rvtest 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff +0000000080018d35 l .data 0000000000000000 Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str 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0000000000000000 Vclr_Mext_int_str +000000008002204c l .data 0000000000000000 Vclr_Sext_int_str +000000008002209f l .data 0000000000000000 Vclr_Vext_int_str +000000008002273e l .data 0000000000000000 trap_diag_curr_xepc_str +00000000800419e0 g .data 0000000000000000 end_signature +00000000800425c0 g .text.rvmodel 0000000000000000 rvmodel_io_write_str_c +00000000800419e0 g .data 0000000000000000 rvtest_sig_end +000000008000a3d8 g .text.rvtest 0000000000000000 common_Mentry +0000000080009e48 g .text.rvtest 0000000000000000 rvtest_Mend +0000000080000000 g .text.init 0000000000000000 rvtest_entry_point +0000000080022c80 g .data 0000000000000000 begin_signature +0000000080010108 g .data 0000000000000000 rvtest_trap_count +0000000080009df4 g .text.rvtest 0000000000000000 rvtest_code_end +0000000080000040 g .text.rvtest 0000000000000000 rvtest_code_begin +0000000080022c80 g .data 0000000000000000 rvtest_sig_begin +0000000080010470 g .data 0000000000000000 rvtest_data_begin +0000000080010110 g .data 0000000000000000 Mtramptbl_sv +0000000080022c71 g .data 0000000000000000 rvtest_data_end +0000000080009df4 g .text.rvtest 0000000000000000 cleanup_epilogs +0000000080043000 g .text.rvmodel 0000000000000000 _end +0000000080041b00 g .tohost 0000000000000000 fromhost +0000000080041a00 g .tohost 0000000000000000 tohost +000000008000a0d0 g .text.rvtest 0000000000000000 rvtest_fail_summary +000000008000a180 g .text.rvtest 0000000000000000 Mtrampoline + + + +Disassembly of section .text.init: + +0000000080000000 : + +// Include framework macros +#include "riscv_arch_test.h" + +// Set up test environment and declare main entry point +RVTEST_BEGIN + 80000000: 00042097 auipc x1,0x42 + 80000004: 0e008093 addi x1,x1,224 # 800420e0 + 80000008: 00000013 addi x0,x0,0 + 8000000c: 00000013 addi x0,x0,0 + 80000010: 00000013 addi x0,x0,0 + 80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xd7ae8a846398c323 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x20) # load rs2: x20 = 0xff9a6a3d90cc2632 + 80000048: 0001ba03 ld x20,0(x3) + 8000004c: 00818193 addi x3,x3,8 + +0000000080000050 : +Zksed_sm4ks_cg_cp_rs1_b0: + sm4ks x15, x0, x20, 0 # perform operation + 80000050: 354007b3 sm4ks x15,x0,x20,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_rs1_b0, Zksed_sm4ks_cg_cp_rs1_b0_str) + 80000054: 00013203 ld x4,0(x2) + 80000058: 00f20c63 beq x4,x15,80000070 + 8000005c: 1640b2ef jal x5,8000b1c0 + 80000060: 80000050 .word 0x80000050 + 80000064: 00000000 .word 0x00000000 + 80000068: 800134b0 .word 0x800134b0 + 8000006c: 00000000 .word 0x00000000 + 80000070: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xeb567f35b6fe00c9 + 80000074: 0001b083 ld x1,0(x3) + 80000078: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x29) # load rs2: x29 = 0xefb0367702a10bc4 + 8000007c: 0001be83 ld x29,0(x3) + 80000080: 00818193 addi x3,x3,8 + +0000000080000084 : +Zksed_sm4ks_cg_cp_rs1_b1: + sm4ks x8, x1, x29, 2 # perform operation + 80000084: b5d08433 sm4ks x8,x1,x29,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_rs1_b1, Zksed_sm4ks_cg_cp_rs1_b1_str) + 80000088: 00013203 ld x4,0(x2) + 8000008c: 00820c63 beq x4,x8,800000a4 + 80000090: 1300b2ef jal x5,8000b1c0 + 80000094: 80000084 .word 0x80000084 + 80000098: 00000000 .word 0x00000000 + 8000009c: 800134e3 .word 0x800134e3 + 800000a0: 00000000 .word 0x00000000 + 800000a4: 00810113 addi x2,x2,8 + + mv x31, x2 # switch signature pointer register to avoid conflict with test + 800000a8: 00010f93 addi x31,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x39c670c86ee45006 + 800000ac: 0001b103 ld x2,0(x3) + 800000b0: 00818193 addi x3,x3,8 + RVTEST_TESTDATA_LOAD_INT(x3, x21) # load rs2: x21 = 0x83a866c762641773 + 800000b4: 0001ba83 ld x21,0(x3) + 800000b8: 00818193 addi x3,x3,8 + +00000000800000bc : +Zksed_sm4ks_cg_cp_rs1_b2: + sm4ks x15, x2, x21, 0 # perform operation + 800000bc: 355107b3 sm4ks x15,x2,x21,0x0 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zksed_sm4ks_cg_cp_rs1_b2, Zksed_sm4ks_cg_cp_rs1_b2_str) + 800000c0: 000fb203 ld x4,0(x31) + 800000c4: 00f20c63 beq x4,x15,800000dc + 800000c8: 0f80b2ef jal x5,8000b1c0 + 800000cc: 800000bc .word 0x800000bc + 800000d0: 00000000 .word 0x00000000 + 800000d4: 80013516 .word 0x80013516 + 800000d8: 00000000 .word 0x00000000 + 800000dc: 008f8f93 addi x31,x31,8 + + mv x29, x3 # switch data pointer register to avoid conflict with test + 800000e0: 00018e93 addi x29,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x29, x3) # load rs1: x3 = 0x2ba64370220802f6 + 800000e4: 000eb183 ld x3,0(x29) + 800000e8: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs2: x9 = 0x3879bfe4c0419a62 + 800000ec: 000eb483 ld x9,0(x29) + 800000f0: 008e8e93 addi x29,x29,8 + +00000000800000f4 : +Zksed_sm4ks_cg_cp_rs1_b3: + sm4ks x7, x3, x9, 2 # perform operation + 800000f4: b49183b3 sm4ks x7,x3,x9,0x2 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cp_rs1_b3, Zksed_sm4ks_cg_cp_rs1_b3_str) + 800000f8: 000fb203 ld x4,0(x31) + 800000fc: 00720c63 beq x4,x7,80000114 + 80000100: 0c00b2ef jal x5,8000b1c0 + 80000104: 800000f4 .word 0x800000f4 + 80000108: 00000000 .word 0x00000000 + 8000010c: 80013549 .word 0x80013549 + 80000110: 00000000 .word 0x00000000 + 80000114: 008f8f93 addi x31,x31,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000118: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 8000011c: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x29, x4) # load rs1: x4 = 0x8681ee3352d894e4 + 80000120: 000eb203 ld x4,0(x29) + 80000124: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs2: x17 = 0xc90f41c8909a27a1 + 80000128: 000eb883 ld x17,0(x29) + 8000012c: 008e8e93 addi x29,x29,8 + +0000000080000130 : +Zksed_sm4ks_cg_cp_rs1_b4: + sm4ks x10, x4, x17, 2 # perform operation + 80000130: b5120533 sm4ks x10,x4,x17,0x2 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zksed_sm4ks_cg_cp_rs1_b4, Zksed_sm4ks_cg_cp_rs1_b4_str) + 80000134: 000fb683 ld x13,0(x31) + 80000138: 00a68c63 beq x13,x10,80000150 + 8000013c: 0c40b76f jal x14,8000b200 + 80000140: 80000130 .word 0x80000130 + 80000144: 00000000 .word 0x00000000 + 80000148: 8001357c .word 0x8001357c + 8000014c: 00000000 .word 0x00000000 + 80000150: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x29, x5) # load rs1: x5 = 0xaaa42f44f3414545 + 80000154: 000eb283 ld x5,0(x29) + 80000158: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs2: x26 = 0xf0ad30130511f20e + 8000015c: 000ebd03 ld x26,0(x29) + 80000160: 008e8e93 addi x29,x29,8 + +0000000080000164 : +Zksed_sm4ks_cg_cp_rs1_b5: + sm4ks x30, x5, x26, 2 # perform operation + 80000164: b5a28f33 sm4ks x30,x5,x26,0x2 + # Check if x30 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x30, Zksed_sm4ks_cg_cp_rs1_b5, Zksed_sm4ks_cg_cp_rs1_b5_str) + 80000168: 000fb683 ld x13,0(x31) + 8000016c: 01e68c63 beq x13,x30,80000184 + 80000170: 0900b76f jal x14,8000b200 + 80000174: 80000164 .word 0x80000164 + 80000178: 00000000 .word 0x00000000 + 8000017c: 800135af .word 0x800135af + 80000180: 00000000 .word 0x00000000 + 80000184: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs1: x6 = 0x1f44be49289dd261 + 80000188: 000eb303 ld x6,0(x29) + 8000018c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xab4812d295081ace + 80000190: 000eb583 ld x11,0(x29) + 80000194: 008e8e93 addi x29,x29,8 + +0000000080000198 : +Zksed_sm4ks_cg_cp_rs1_b6: + sm4ks x9, x6, x11, 2 # perform operation + 80000198: b4b304b3 sm4ks x9,x6,x11,0x2 + # Check if x9 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x9, Zksed_sm4ks_cg_cp_rs1_b6, Zksed_sm4ks_cg_cp_rs1_b6_str) + 8000019c: 000fb683 ld x13,0(x31) + 800001a0: 00968c63 beq x13,x9,800001b8 + 800001a4: 05c0b76f jal x14,8000b200 + 800001a8: 80000198 .word 0x80000198 + 800001ac: 00000000 .word 0x00000000 + 800001b0: 800135e2 .word 0x800135e2 + 800001b4: 00000000 .word 0x00000000 + 800001b8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x29, x7) # load rs1: x7 = 0x8af57cbcf4058f97 + 800001bc: 000eb383 ld x7,0(x29) + 800001c0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xc88e45a699823993 + 800001c4: 000eb783 ld x15,0(x29) + 800001c8: 008e8e93 addi x29,x29,8 + +00000000800001cc : +Zksed_sm4ks_cg_cp_rs1_b7: + sm4ks x6, x7, x15, 0 # perform operation + 800001cc: 34f38333 sm4ks x6,x7,x15,0x0 + # Check if x6 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x6, Zksed_sm4ks_cg_cp_rs1_b7, Zksed_sm4ks_cg_cp_rs1_b7_str) + 800001d0: 000fb683 ld x13,0(x31) + 800001d4: 00668c63 beq x13,x6,800001ec + 800001d8: 0280b76f jal x14,8000b200 + 800001dc: 800001cc .word 0x800001cc + 800001e0: 00000000 .word 0x00000000 + 800001e4: 80013615 .word 0x80013615 + 800001e8: 00000000 .word 0x00000000 + 800001ec: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x29, x8) # load rs1: x8 = 0xce50cec7d4f7c425 + 800001f0: 000eb403 ld x8,0(x29) + 800001f4: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0xed111600a143ce4b + 800001f8: 000ebf03 ld x30,0(x29) + 800001fc: 008e8e93 addi x29,x29,8 + +0000000080000200 : +Zksed_sm4ks_cg_cp_rs1_b8: + sm4ks x22, x8, x30, 2 # perform operation + 80000200: b5e40b33 sm4ks x22,x8,x30,0x2 + # Check if x22 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x22, Zksed_sm4ks_cg_cp_rs1_b8, Zksed_sm4ks_cg_cp_rs1_b8_str) + 80000204: 000fb683 ld x13,0(x31) + 80000208: 01668c63 beq x13,x22,80000220 + 8000020c: 7f50a76f jal x14,8000b200 + 80000210: 80000200 .word 0x80000200 + 80000214: 00000000 .word 0x00000000 + 80000218: 80013648 .word 0x80013648 + 8000021c: 00000000 .word 0x00000000 + 80000220: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x29, x9) # load rs1: x9 = 0x533b5a6193ca9237 + 80000224: 000eb483 ld x9,0(x29) + 80000228: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs2: x11 = 0xbf906d8df98dc7af + 8000022c: 000eb583 ld x11,0(x29) + 80000230: 008e8e93 addi x29,x29,8 + +0000000080000234 : +Zksed_sm4ks_cg_cp_rs1_b9: + sm4ks x4, x9, x11, 0 # perform operation + 80000234: 34b48233 sm4ks x4,x9,x11,0x0 + # Check if x4 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x4, Zksed_sm4ks_cg_cp_rs1_b9, Zksed_sm4ks_cg_cp_rs1_b9_str) + 80000238: 000fb683 ld x13,0(x31) + 8000023c: 00468c63 beq x13,x4,80000254 + 80000240: 7c10a76f jal x14,8000b200 + 80000244: 80000234 .word 0x80000234 + 80000248: 00000000 .word 0x00000000 + 8000024c: 8001367b .word 0x8001367b + 80000250: 00000000 .word 0x00000000 + 80000254: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs1: x10 = 0x2dfac32548575561 + 80000258: 000eb503 ld x10,0(x29) + 8000025c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x6452ea4f9c5d9720 + 80000260: 000eb003 ld x0,0(x29) + 80000264: 008e8e93 addi x29,x29,8 + +0000000080000268 : +Zksed_sm4ks_cg_cp_rs1_b10: + sm4ks x19, x10, x0, 3 # perform operation + 80000268: f40509b3 sm4ks x19,x10,x0,0x3 + # Check if x19 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x19, Zksed_sm4ks_cg_cp_rs1_b10, Zksed_sm4ks_cg_cp_rs1_b10_str) + 8000026c: 000fb683 ld x13,0(x31) + 80000270: 01368c63 beq x13,x19,80000288 + 80000274: 78d0a76f jal x14,8000b200 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 800136af .word 0x800136af + 80000284: 00000000 .word 0x00000000 + 80000288: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x29, x11) # load rs1: x11 = 0xb8079a84df89ce27 + 8000028c: 000eb583 ld x11,0(x29) + 80000290: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0x814a548f5340b627 + 80000294: 000ebc83 ld x25,0(x29) + 80000298: 008e8e93 addi x29,x29,8 + +000000008000029c : +Zksed_sm4ks_cg_cp_rs1_b11: + sm4ks x0, x11, x25, 0 # perform operation + 8000029c: 35958033 sm4ks x0,x11,x25,0x0 + # Check if x0 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x0, Zksed_sm4ks_cg_cp_rs1_b11, Zksed_sm4ks_cg_cp_rs1_b11_str) + 800002a0: 000fb683 ld x13,0(x31) + 800002a4: 00068c63 beq x13,x0,800002bc + 800002a8: 7590a76f jal x14,8000b200 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 800136e4 .word 0x800136e4 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs1: x12 = 0x2ac095b0adf241b3 + 800002c0: 000eb603 ld x12,0(x29) + 800002c4: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x2) # load rs2: x2 = 0x69b167894531870b + 800002c8: 000eb103 ld x2,0(x29) + 800002cc: 008e8e93 addi x29,x29,8 + +00000000800002d0 : +Zksed_sm4ks_cg_cp_rs1_b12: + sm4ks x10, x12, x2, 0 # perform operation + 800002d0: 34260533 sm4ks x10,x12,x2,0x0 + # Check if x10 contains the expected result. x31 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x31, x14, x13, x10, Zksed_sm4ks_cg_cp_rs1_b12, Zksed_sm4ks_cg_cp_rs1_b12_str) + 800002d4: 000fb683 ld x13,0(x31) + 800002d8: 00a68c63 beq x13,x10,800002f0 + 800002dc: 7250a76f jal x14,8000b200 + 800002e0: 800002d0 .word 0x800002d0 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 80013719 .word 0x80013719 + 800002ec: 00000000 .word 0x00000000 + 800002f0: 008f8f93 addi x31,x31,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 800002f4: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 800002f8: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x29, x13) # load rs1: x13 = 0x84d91e3af7457ed9 + 800002fc: 000eb683 ld x13,0(x29) + 80000300: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0x1adaad743cdf86b0 + 80000304: 000eb003 ld x0,0(x29) + 80000308: 008e8e93 addi x29,x29,8 + +000000008000030c : +Zksed_sm4ks_cg_cp_rs1_b13: + sm4ks x11, x13, x0, 0 # perform operation + 8000030c: 340685b3 sm4ks x11,x13,x0,0x0 + # Check if x11 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x11, Zksed_sm4ks_cg_cp_rs1_b13, Zksed_sm4ks_cg_cp_rs1_b13_str) + 80000310: 000fb203 ld x4,0(x31) + 80000314: 00b20c63 beq x4,x11,8000032c + 80000318: 6a90a2ef jal x5,8000b1c0 + 8000031c: 8000030c .word 0x8000030c + 80000320: 00000000 .word 0x00000000 + 80000324: 8001374e .word 0x8001374e + 80000328: 00000000 .word 0x00000000 + 8000032c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs1: x14 = 0x68da43009a1b9033 + 80000330: 000eb703 ld x14,0(x29) + 80000334: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x30) # load rs2: x30 = 0x3c7e241c9229afb6 + 80000338: 000ebf03 ld x30,0(x29) + 8000033c: 008e8e93 addi x29,x29,8 + +0000000080000340 : +Zksed_sm4ks_cg_cp_rs1_b14: + sm4ks x20, x14, x30, 0 # perform operation + 80000340: 35e70a33 sm4ks x20,x14,x30,0x0 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zksed_sm4ks_cg_cp_rs1_b14, Zksed_sm4ks_cg_cp_rs1_b14_str) + 80000344: 000fb203 ld x4,0(x31) + 80000348: 01420c63 beq x4,x20,80000360 + 8000034c: 6750a2ef jal x5,8000b1c0 + 80000350: 80000340 .word 0x80000340 + 80000354: 00000000 .word 0x00000000 + 80000358: 80013783 .word 0x80013783 + 8000035c: 00000000 .word 0x00000000 + 80000360: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs1: x15 = 0x9acb2414c5084c77 + 80000364: 000eb783 ld x15,0(x29) + 80000368: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x0) # load rs2: x0 = 0xe9d1ac1e810adae3 + 8000036c: 000eb003 ld x0,0(x29) + 80000370: 008e8e93 addi x29,x29,8 + +0000000080000374 : +Zksed_sm4ks_cg_cp_rs1_b15: + sm4ks x19, x15, x0, 1 # perform operation + 80000374: 740789b3 sm4ks x19,x15,x0,0x1 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksed_sm4ks_cg_cp_rs1_b15, Zksed_sm4ks_cg_cp_rs1_b15_str) + 80000378: 000fb203 ld x4,0(x31) + 8000037c: 01320c63 beq x4,x19,80000394 + 80000380: 6410a2ef jal x5,8000b1c0 + 80000384: 80000374 .word 0x80000374 + 80000388: 00000000 .word 0x00000000 + 8000038c: 800137b8 .word 0x800137b8 + 80000390: 00000000 .word 0x00000000 + 80000394: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x29, x16) # load rs1: x16 = 0x120bce246f2bcd92 + 80000398: 000eb803 ld x16,0(x29) + 8000039c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x4d0502d566880172 + 800003a0: 000eb703 ld x14,0(x29) + 800003a4: 008e8e93 addi x29,x29,8 + +00000000800003a8 : +Zksed_sm4ks_cg_cp_rs1_b16: + sm4ks x6, x16, x14, 0 # perform operation + 800003a8: 34e80333 sm4ks x6,x16,x14,0x0 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zksed_sm4ks_cg_cp_rs1_b16, Zksed_sm4ks_cg_cp_rs1_b16_str) + 800003ac: 000fb203 ld x4,0(x31) + 800003b0: 00620c63 beq x4,x6,800003c8 + 800003b4: 60d0a2ef jal x5,8000b1c0 + 800003b8: 800003a8 .word 0x800003a8 + 800003bc: 00000000 .word 0x00000000 + 800003c0: 800137ed .word 0x800137ed + 800003c4: 00000000 .word 0x00000000 + 800003c8: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x29, x17) # load rs1: x17 = 0x5bb557d0803c8b25 + 800003cc: 000eb883 ld x17,0(x29) + 800003d0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs2: x23 = 0x6ddbf9214c076f3c + 800003d4: 000ebb83 ld x23,0(x29) + 800003d8: 008e8e93 addi x29,x29,8 + +00000000800003dc : +Zksed_sm4ks_cg_cp_rs1_b17: + sm4ks x10, x17, x23, 1 # perform operation + 800003dc: 75788533 sm4ks x10,x17,x23,0x1 + # Check if x10 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x10, Zksed_sm4ks_cg_cp_rs1_b17, Zksed_sm4ks_cg_cp_rs1_b17_str) + 800003e0: 000fb203 ld x4,0(x31) + 800003e4: 00a20c63 beq x4,x10,800003fc + 800003e8: 5d90a2ef jal x5,8000b1c0 + 800003ec: 800003dc .word 0x800003dc + 800003f0: 00000000 .word 0x00000000 + 800003f4: 80013822 .word 0x80013822 + 800003f8: 00000000 .word 0x00000000 + 800003fc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs1: x18 = 0x2095cbeffcb3abc1 + 80000400: 000eb903 ld x18,0(x29) + 80000404: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0x4c1b1d071c537468 + 80000408: 000eb503 ld x10,0(x29) + 8000040c: 008e8e93 addi x29,x29,8 + +0000000080000410 : +Zksed_sm4ks_cg_cp_rs1_b18: + sm4ks x12, x18, x10, 2 # perform operation + 80000410: b4a90633 sm4ks x12,x18,x10,0x2 + # Check if x12 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x12, Zksed_sm4ks_cg_cp_rs1_b18, Zksed_sm4ks_cg_cp_rs1_b18_str) + 80000414: 000fb203 ld x4,0(x31) + 80000418: 00c20c63 beq x4,x12,80000430 + 8000041c: 5a50a2ef jal x5,8000b1c0 + 80000420: 80000410 .word 0x80000410 + 80000424: 00000000 .word 0x00000000 + 80000428: 80013857 .word 0x80013857 + 8000042c: 00000000 .word 0x00000000 + 80000430: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x29, x19) # load rs1: x19 = 0x6b6de184dbd1e4a1 + 80000434: 000eb983 ld x19,0(x29) + 80000438: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs2: x28 = 0xd13e446c7e402c0a + 8000043c: 000ebe03 ld x28,0(x29) + 80000440: 008e8e93 addi x29,x29,8 + +0000000080000444 : +Zksed_sm4ks_cg_cp_rs1_b19: + sm4ks x6, x19, x28, 2 # perform operation + 80000444: b5c98333 sm4ks x6,x19,x28,0x2 + # Check if x6 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x6, Zksed_sm4ks_cg_cp_rs1_b19, Zksed_sm4ks_cg_cp_rs1_b19_str) + 80000448: 000fb203 ld x4,0(x31) + 8000044c: 00620c63 beq x4,x6,80000464 + 80000450: 5710a2ef jal x5,8000b1c0 + 80000454: 80000444 .word 0x80000444 + 80000458: 00000000 .word 0x00000000 + 8000045c: 8001388c .word 0x8001388c + 80000460: 00000000 .word 0x00000000 + 80000464: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x29, x20) # load rs1: x20 = 0x81089c36f1171a49 + 80000468: 000eba03 ld x20,0(x29) + 8000046c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x10) # load rs2: x10 = 0xd99bd44dfeed37ec + 80000470: 000eb503 ld x10,0(x29) + 80000474: 008e8e93 addi x29,x29,8 + +0000000080000478 : +Zksed_sm4ks_cg_cp_rs1_b20: + sm4ks x24, x20, x10, 0 # perform operation + 80000478: 34aa0c33 sm4ks x24,x20,x10,0x0 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zksed_sm4ks_cg_cp_rs1_b20, Zksed_sm4ks_cg_cp_rs1_b20_str) + 8000047c: 000fb203 ld x4,0(x31) + 80000480: 01820c63 beq x4,x24,80000498 + 80000484: 53d0a2ef jal x5,8000b1c0 + 80000488: 80000478 .word 0x80000478 + 8000048c: 00000000 .word 0x00000000 + 80000490: 800138c1 .word 0x800138c1 + 80000494: 00000000 .word 0x00000000 + 80000498: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x29, x21) # load rs1: x21 = 0xab3e8b679023d2af + 8000049c: 000eba83 ld x21,0(x29) + 800004a0: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x14) # load rs2: x14 = 0x39178b38ef10ea2a + 800004a4: 000eb703 ld x14,0(x29) + 800004a8: 008e8e93 addi x29,x29,8 + +00000000800004ac : +Zksed_sm4ks_cg_cp_rs1_b21: + sm4ks x1, x21, x14, 3 # perform operation + 800004ac: f4ea80b3 sm4ks x1,x21,x14,0x3 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zksed_sm4ks_cg_cp_rs1_b21, Zksed_sm4ks_cg_cp_rs1_b21_str) + 800004b0: 000fb203 ld x4,0(x31) + 800004b4: 00120c63 beq x4,x1,800004cc + 800004b8: 5090a2ef jal x5,8000b1c0 + 800004bc: 800004ac .word 0x800004ac + 800004c0: 00000000 .word 0x00000000 + 800004c4: 800138f6 .word 0x800138f6 + 800004c8: 00000000 .word 0x00000000 + 800004cc: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs1: x22 = 0xdef4e092ea63263d + 800004d0: 000ebb03 ld x22,0(x29) + 800004d4: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x12) # load rs2: x12 = 0xf8bf89b3893e529e + 800004d8: 000eb603 ld x12,0(x29) + 800004dc: 008e8e93 addi x29,x29,8 + +00000000800004e0 : +Zksed_sm4ks_cg_cp_rs1_b22: + sm4ks x15, x22, x12, 2 # perform operation + 800004e0: b4cb07b3 sm4ks x15,x22,x12,0x2 + # Check if x15 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x15, Zksed_sm4ks_cg_cp_rs1_b22, Zksed_sm4ks_cg_cp_rs1_b22_str) + 800004e4: 000fb203 ld x4,0(x31) + 800004e8: 00f20c63 beq x4,x15,80000500 + 800004ec: 4d50a2ef jal x5,8000b1c0 + 800004f0: 800004e0 .word 0x800004e0 + 800004f4: 00000000 .word 0x00000000 + 800004f8: 8001392b .word 0x8001392b + 800004fc: 00000000 .word 0x00000000 + 80000500: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x29, x23) # load rs1: x23 = 0x27913cefd2dab6ab + 80000504: 000ebb83 ld x23,0(x29) + 80000508: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0xa21673b88b781159 + 8000050c: 000eb903 ld x18,0(x29) + 80000510: 008e8e93 addi x29,x29,8 + +0000000080000514 : +Zksed_sm4ks_cg_cp_rs1_b23: + sm4ks x7, x23, x18, 2 # perform operation + 80000514: b52b83b3 sm4ks x7,x23,x18,0x2 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cp_rs1_b23, Zksed_sm4ks_cg_cp_rs1_b23_str) + 80000518: 000fb203 ld x4,0(x31) + 8000051c: 00720c63 beq x4,x7,80000534 + 80000520: 4a10a2ef jal x5,8000b1c0 + 80000524: 80000514 .word 0x80000514 + 80000528: 00000000 .word 0x00000000 + 8000052c: 80013960 .word 0x80013960 + 80000530: 00000000 .word 0x00000000 + 80000534: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x29, x24) # load rs1: x24 = 0xacbe3efc1706e902 + 80000538: 000ebc03 ld x24,0(x29) + 8000053c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x6) # load rs2: x6 = 0x431d9ac4f80e71ac + 80000540: 000eb303 ld x6,0(x29) + 80000544: 008e8e93 addi x29,x29,8 + +0000000080000548 : +Zksed_sm4ks_cg_cp_rs1_b24: + sm4ks x19, x24, x6, 1 # perform operation + 80000548: 746c09b3 sm4ks x19,x24,x6,0x1 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksed_sm4ks_cg_cp_rs1_b24, Zksed_sm4ks_cg_cp_rs1_b24_str) + 8000054c: 000fb203 ld x4,0(x31) + 80000550: 01320c63 beq x4,x19,80000568 + 80000554: 46d0a2ef jal x5,8000b1c0 + 80000558: 80000548 .word 0x80000548 + 8000055c: 00000000 .word 0x00000000 + 80000560: 80013995 .word 0x80013995 + 80000564: 00000000 .word 0x00000000 + 80000568: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs1: x25 = 0x62348f61fb2ef4bb + 8000056c: 000ebc83 ld x25,0(x29) + 80000570: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x15) # load rs2: x15 = 0xcf042b2cc67be737 + 80000574: 000eb783 ld x15,0(x29) + 80000578: 008e8e93 addi x29,x29,8 + +000000008000057c : +Zksed_sm4ks_cg_cp_rs1_b25: + sm4ks x20, x25, x15, 1 # perform operation + 8000057c: 74fc8a33 sm4ks x20,x25,x15,0x1 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zksed_sm4ks_cg_cp_rs1_b25, Zksed_sm4ks_cg_cp_rs1_b25_str) + 80000580: 000fb203 ld x4,0(x31) + 80000584: 01420c63 beq x4,x20,8000059c + 80000588: 4390a2ef jal x5,8000b1c0 + 8000058c: 8000057c .word 0x8000057c + 80000590: 00000000 .word 0x00000000 + 80000594: 800139ca .word 0x800139ca + 80000598: 00000000 .word 0x00000000 + 8000059c: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x29, x26) # load rs1: x26 = 0x803d3575d7407325 + 800005a0: 000ebd03 ld x26,0(x29) + 800005a4: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x25) # load rs2: x25 = 0xd0d74d3e364bbe4e + 800005a8: 000ebc83 ld x25,0(x29) + 800005ac: 008e8e93 addi x29,x29,8 + +00000000800005b0 : +Zksed_sm4ks_cg_cp_rs1_b26: + sm4ks x23, x26, x25, 2 # perform operation + 800005b0: b59d0bb3 sm4ks x23,x26,x25,0x2 + # Check if x23 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x23, Zksed_sm4ks_cg_cp_rs1_b26, Zksed_sm4ks_cg_cp_rs1_b26_str) + 800005b4: 000fb203 ld x4,0(x31) + 800005b8: 01720c63 beq x4,x23,800005d0 + 800005bc: 4050a2ef jal x5,8000b1c0 + 800005c0: 800005b0 .word 0x800005b0 + 800005c4: 00000000 .word 0x00000000 + 800005c8: 800139ff .word 0x800139ff + 800005cc: 00000000 .word 0x00000000 + 800005d0: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x29, x27) # load rs1: x27 = 0x002aa01ae9812ebe + 800005d4: 000ebd83 ld x27,0(x29) + 800005d8: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x18) # load rs2: x18 = 0x3fe8602ba63b608a + 800005dc: 000eb903 ld x18,0(x29) + 800005e0: 008e8e93 addi x29,x29,8 + +00000000800005e4 : +Zksed_sm4ks_cg_cp_rs1_b27: + sm4ks x13, x27, x18, 3 # perform operation + 800005e4: f52d86b3 sm4ks x13,x27,x18,0x3 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zksed_sm4ks_cg_cp_rs1_b27, Zksed_sm4ks_cg_cp_rs1_b27_str) + 800005e8: 000fb203 ld x4,0(x31) + 800005ec: 00d20c63 beq x4,x13,80000604 + 800005f0: 3d10a2ef jal x5,8000b1c0 + 800005f4: 800005e4 .word 0x800005e4 + 800005f8: 00000000 .word 0x00000000 + 800005fc: 80013a34 .word 0x80013a34 + 80000600: 00000000 .word 0x00000000 + 80000604: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x29, x28) # load rs1: x28 = 0x5481dc6c876dbb77 + 80000608: 000ebe03 ld x28,0(x29) + 8000060c: 008e8e93 addi x29,x29,8 + RVTEST_TESTDATA_LOAD_INT(x29, x22) # load rs2: x22 = 0xd6d320a21cc22bcf + 80000610: 000ebb03 ld x22,0(x29) + 80000614: 008e8e93 addi x29,x29,8 + +0000000080000618 : +Zksed_sm4ks_cg_cp_rs1_b28: + sm4ks x1, x28, x22, 0 # perform operation + 80000618: 356e00b3 sm4ks x1,x28,x22,0x0 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zksed_sm4ks_cg_cp_rs1_b28, Zksed_sm4ks_cg_cp_rs1_b28_str) + 8000061c: 000fb203 ld x4,0(x31) + 80000620: 00120c63 beq x4,x1,80000638 + 80000624: 39d0a2ef jal x5,8000b1c0 + 80000628: 80000618 .word 0x80000618 + 8000062c: 00000000 .word 0x00000000 + 80000630: 80013a69 .word 0x80013a69 + 80000634: 00000000 .word 0x00000000 + 80000638: 008f8f93 addi x31,x31,8 + + mv x27, x29 # switch data pointer register to avoid conflict with test + 8000063c: 000e8d93 addi x27,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0x3cb7af03d52de2c0 + 80000640: 000dbe83 ld x29,0(x27) + 80000644: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x30ed0f3ebc13f379 + 80000648: 000dbb83 ld x23,0(x27) + 8000064c: 008d8d93 addi x27,x27,8 + +0000000080000650 : +Zksed_sm4ks_cg_cp_rs1_b29: + sm4ks x3, x29, x23, 1 # perform operation + 80000650: 757e81b3 sm4ks x3,x29,x23,0x1 + # Check if x3 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x3, Zksed_sm4ks_cg_cp_rs1_b29, Zksed_sm4ks_cg_cp_rs1_b29_str) + 80000654: 000fb203 ld x4,0(x31) + 80000658: 00320c63 beq x4,x3,80000670 + 8000065c: 3650a2ef jal x5,8000b1c0 + 80000660: 80000650 .word 0x80000650 + 80000664: 00000000 .word 0x00000000 + 80000668: 80013a9e .word 0x80013a9e + 8000066c: 00000000 .word 0x00000000 + 80000670: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0x22ef083fcafb58a7 + 80000674: 000dbf03 ld x30,0(x27) + 80000678: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0xa55b6d08c3df2c7c + 8000067c: 000db183 ld x3,0(x27) + 80000680: 008d8d93 addi x27,x27,8 + +0000000080000684 : +Zksed_sm4ks_cg_cp_rs1_b30: + sm4ks x17, x30, x3, 2 # perform operation + 80000684: b43f08b3 sm4ks x17,x30,x3,0x2 + # Check if x17 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x17, Zksed_sm4ks_cg_cp_rs1_b30, Zksed_sm4ks_cg_cp_rs1_b30_str) + 80000688: 000fb203 ld x4,0(x31) + 8000068c: 01120c63 beq x4,x17,800006a4 + 80000690: 3310a2ef jal x5,8000b1c0 + 80000694: 80000684 .word 0x80000684 + 80000698: 00000000 .word 0x00000000 + 8000069c: 80013ad3 .word 0x80013ad3 + 800006a0: 00000000 .word 0x00000000 + 800006a4: 008f8f93 addi x31,x31,8 + + mv x19, x31 # switch signature pointer register to avoid conflict with test + 800006a8: 000f8993 addi x19,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0x3ed845c3654407be + 800006ac: 000dbf83 ld x31,0(x27) + 800006b0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x5f25338d0c8645c3 + 800006b4: 000db883 ld x17,0(x27) + 800006b8: 008d8d93 addi x27,x27,8 + +00000000800006bc : +Zksed_sm4ks_cg_cp_rs1_b31: + sm4ks x14, x31, x17, 3 # perform operation + 800006bc: f51f8733 sm4ks x14,x31,x17,0x3 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cp_rs1_b31, Zksed_sm4ks_cg_cp_rs1_b31_str) + 800006c0: 0009b203 ld x4,0(x19) + 800006c4: 00e20c63 beq x4,x14,800006dc + 800006c8: 2f90a2ef jal x5,8000b1c0 + 800006cc: 800006bc .word 0x800006bc + 800006d0: 00000000 .word 0x00000000 + 800006d4: 80013b08 .word 0x80013b08 + 800006d8: 00000000 .word 0x00000000 + 800006dc: 00898993 addi x19,x19,8 +///////////////////////////////// +// cp_rs2 +///////////////////////////////// + +# Testcase cp_rs2 (Test source rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x491413b469035680 + 800006e0: 000db683 ld x13,0(x27) + 800006e4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x0) # load rs2: x0 = 0x90bb6f295c4c1cad + 800006e8: 000db003 ld x0,0(x27) + 800006ec: 008d8d93 addi x27,x27,8 + +00000000800006f0 : +Zksed_sm4ks_cg_cp_rs2_b0: + sm4ks x2, x13, x0, 2 # perform operation + 800006f0: b4068133 sm4ks x2,x13,x0,0x2 + # Check if x2 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x2, Zksed_sm4ks_cg_cp_rs2_b0, Zksed_sm4ks_cg_cp_rs2_b0_str) + 800006f4: 0009b203 ld x4,0(x19) + 800006f8: 00220c63 beq x4,x2,80000710 + 800006fc: 2c50a2ef jal x5,8000b1c0 + 80000700: 800006f0 .word 0x800006f0 + 80000704: 00000000 .word 0x00000000 + 80000708: 80013b3d .word 0x80013b3d + 8000070c: 00000000 .word 0x00000000 + 80000710: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs1: x11 = 0x90ccb71d2aa5dc97 + 80000714: 000db583 ld x11,0(x27) + 80000718: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x1) # load rs2: x1 = 0x968bc81080930d6e + 8000071c: 000db083 ld x1,0(x27) + 80000720: 008d8d93 addi x27,x27,8 + +0000000080000724 : +Zksed_sm4ks_cg_cp_rs2_b1: + sm4ks x0, x11, x1, 0 # perform operation + 80000724: 34158033 sm4ks x0,x11,x1,0x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zksed_sm4ks_cg_cp_rs2_b1, Zksed_sm4ks_cg_cp_rs2_b1_str) + 80000728: 0009b203 ld x4,0(x19) + 8000072c: 00020c63 beq x4,x0,80000744 + 80000730: 2910a2ef jal x5,8000b1c0 + 80000734: 80000724 .word 0x80000724 + 80000738: 00000000 .word 0x00000000 + 8000073c: 80013b71 .word 0x80013b71 + 80000740: 00000000 .word 0x00000000 + 80000744: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs1: x6 = 0xfccb2d3071d78597 + 80000748: 000db303 ld x6,0(x27) + 8000074c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs2: x2 = 0x0501c8384131cfa9 + 80000750: 000db103 ld x2,0(x27) + 80000754: 008d8d93 addi x27,x27,8 + +0000000080000758 : +Zksed_sm4ks_cg_cp_rs2_b2: + sm4ks x25, x6, x2, 3 # perform operation + 80000758: f4230cb3 sm4ks x25,x6,x2,0x3 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_rs2_b2, Zksed_sm4ks_cg_cp_rs2_b2_str) + 8000075c: 0009b203 ld x4,0(x19) + 80000760: 01920c63 beq x4,x25,80000778 + 80000764: 25d0a2ef jal x5,8000b1c0 + 80000768: 80000758 .word 0x80000758 + 8000076c: 00000000 .word 0x00000000 + 80000770: 80013ba5 .word 0x80013ba5 + 80000774: 00000000 .word 0x00000000 + 80000778: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x858235933f595520 + 8000077c: 000db103 ld x2,0(x27) + 80000780: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs2: x3 = 0xc8d659b9f3733584 + 80000784: 000db183 ld x3,0(x27) + 80000788: 008d8d93 addi x27,x27,8 + +000000008000078c : +Zksed_sm4ks_cg_cp_rs2_b3: + sm4ks x20, x2, x3, 0 # perform operation + 8000078c: 34310a33 sm4ks x20,x2,x3,0x0 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_rs2_b3, Zksed_sm4ks_cg_cp_rs2_b3_str) + 80000790: 0009b203 ld x4,0(x19) + 80000794: 01420c63 beq x4,x20,800007ac + 80000798: 2290a2ef jal x5,8000b1c0 + 8000079c: 8000078c .word 0x8000078c + 800007a0: 00000000 .word 0x00000000 + 800007a4: 80013bd9 .word 0x80013bd9 + 800007a8: 00000000 .word 0x00000000 + 800007ac: 00898993 addi x19,x19,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800007b0: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800007b4: 00028713 addi x14,x5,0 +# Testcase cp_rs2 (Test source rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs1: x18 = 0x4529b65e240b2eab + 800007b8: 000db903 ld x18,0(x27) + 800007bc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x4) # load rs2: x4 = 0x01baee5b821a431a + 800007c0: 000db203 ld x4,0(x27) + 800007c4: 008d8d93 addi x27,x27,8 + +00000000800007c8 : +Zksed_sm4ks_cg_cp_rs2_b4: + sm4ks x6, x18, x4, 2 # perform operation + 800007c8: b4490333 sm4ks x6,x18,x4,0x2 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zksed_sm4ks_cg_cp_rs2_b4, Zksed_sm4ks_cg_cp_rs2_b4_str) + 800007cc: 0009b683 ld x13,0(x19) + 800007d0: 00668c63 beq x13,x6,800007e8 + 800007d4: 22d0a76f jal x14,8000b200 + 800007d8: 800007c8 .word 0x800007c8 + 800007dc: 00000000 .word 0x00000000 + 800007e0: 80013c0d .word 0x80013c0d + 800007e4: 00000000 .word 0x00000000 + 800007e8: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0xd58dd931b53d76bf + 800007ec: 000dba83 ld x21,0(x27) + 800007f0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x5) # load rs2: x5 = 0xd32c1a8d0c52da73 + 800007f4: 000db283 ld x5,0(x27) + 800007f8: 008d8d93 addi x27,x27,8 + +00000000800007fc : +Zksed_sm4ks_cg_cp_rs2_b5: + sm4ks x10, x21, x5, 3 # perform operation + 800007fc: f45a8533 sm4ks x10,x21,x5,0x3 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zksed_sm4ks_cg_cp_rs2_b5, Zksed_sm4ks_cg_cp_rs2_b5_str) + 80000800: 0009b683 ld x13,0(x19) + 80000804: 00a68c63 beq x13,x10,8000081c + 80000808: 1f90a76f jal x14,8000b200 + 8000080c: 800007fc .word 0x800007fc + 80000810: 00000000 .word 0x00000000 + 80000814: 80013c41 .word 0x80013c41 + 80000818: 00000000 .word 0x00000000 + 8000081c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x27, x30) # load rs1: x30 = 0xd74736e05dcaf395 + 80000820: 000dbf03 ld x30,0(x27) + 80000824: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x6) # load rs2: x6 = 0xa1931a57d735aa0b + 80000828: 000db303 ld x6,0(x27) + 8000082c: 008d8d93 addi x27,x27,8 + +0000000080000830 : +Zksed_sm4ks_cg_cp_rs2_b6: + sm4ks x10, x30, x6, 1 # perform operation + 80000830: 746f0533 sm4ks x10,x30,x6,0x1 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zksed_sm4ks_cg_cp_rs2_b6, Zksed_sm4ks_cg_cp_rs2_b6_str) + 80000834: 0009b683 ld x13,0(x19) + 80000838: 00a68c63 beq x13,x10,80000850 + 8000083c: 1c50a76f jal x14,8000b200 + 80000840: 80000830 .word 0x80000830 + 80000844: 00000000 .word 0x00000000 + 80000848: 80013c75 .word 0x80013c75 + 8000084c: 00000000 .word 0x00000000 + 80000850: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0x970a87e0ddb2a3c8 + 80000854: 000dbf83 ld x31,0(x27) + 80000858: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x7) # load rs2: x7 = 0xad316c043584f02c + 8000085c: 000db383 ld x7,0(x27) + 80000860: 008d8d93 addi x27,x27,8 + +0000000080000864 : +Zksed_sm4ks_cg_cp_rs2_b7: + sm4ks x22, x31, x7, 2 # perform operation + 80000864: b47f8b33 sm4ks x22,x31,x7,0x2 + # Check if x22 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x22, Zksed_sm4ks_cg_cp_rs2_b7, Zksed_sm4ks_cg_cp_rs2_b7_str) + 80000868: 0009b683 ld x13,0(x19) + 8000086c: 01668c63 beq x13,x22,80000884 + 80000870: 1910a76f jal x14,8000b200 + 80000874: 80000864 .word 0x80000864 + 80000878: 00000000 .word 0x00000000 + 8000087c: 80013ca9 .word 0x80013ca9 + 80000880: 00000000 .word 0x00000000 + 80000884: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x27, x31) # load rs1: x31 = 0xf9dcedcdfe6451e4 + 80000888: 000dbf83 ld x31,0(x27) + 8000088c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs2: x8 = 0x3faafbaa6de23886 + 80000890: 000db403 ld x8,0(x27) + 80000894: 008d8d93 addi x27,x27,8 + +0000000080000898 : +Zksed_sm4ks_cg_cp_rs2_b8: + sm4ks x26, x31, x8, 3 # perform operation + 80000898: f48f8d33 sm4ks x26,x31,x8,0x3 + # Check if x26 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x26, Zksed_sm4ks_cg_cp_rs2_b8, Zksed_sm4ks_cg_cp_rs2_b8_str) + 8000089c: 0009b683 ld x13,0(x19) + 800008a0: 01a68c63 beq x13,x26,800008b8 + 800008a4: 15d0a76f jal x14,8000b200 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 80013cdd .word 0x80013cdd + 800008b4: 00000000 .word 0x00000000 + 800008b8: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs1: x16 = 0x8546c791566af08e + 800008bc: 000db803 ld x16,0(x27) + 800008c0: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x9) # load rs2: x9 = 0xb23338ebd8faac9d + 800008c4: 000db483 ld x9,0(x27) + 800008c8: 008d8d93 addi x27,x27,8 + +00000000800008cc : +Zksed_sm4ks_cg_cp_rs2_b9: + sm4ks x21, x16, x9, 2 # perform operation + 800008cc: b4980ab3 sm4ks x21,x16,x9,0x2 + # Check if x21 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x21, Zksed_sm4ks_cg_cp_rs2_b9, Zksed_sm4ks_cg_cp_rs2_b9_str) + 800008d0: 0009b683 ld x13,0(x19) + 800008d4: 01568c63 beq x13,x21,800008ec + 800008d8: 1290a76f jal x14,8000b200 + 800008dc: 800008cc .word 0x800008cc + 800008e0: 00000000 .word 0x00000000 + 800008e4: 80013d11 .word 0x80013d11 + 800008e8: 00000000 .word 0x00000000 + 800008ec: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs1: x17 = 0xcc009548b8cdfdbd + 800008f0: 000db883 ld x17,0(x27) + 800008f4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs2: x10 = 0x6ede7186c6621e67 + 800008f8: 000db503 ld x10,0(x27) + 800008fc: 008d8d93 addi x27,x27,8 + +0000000080000900 : +Zksed_sm4ks_cg_cp_rs2_b10: + sm4ks x21, x17, x10, 3 # perform operation + 80000900: f4a88ab3 sm4ks x21,x17,x10,0x3 + # Check if x21 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x21, Zksed_sm4ks_cg_cp_rs2_b10, Zksed_sm4ks_cg_cp_rs2_b10_str) + 80000904: 0009b683 ld x13,0(x19) + 80000908: 01568c63 beq x13,x21,80000920 + 8000090c: 0f50a76f jal x14,8000b200 + 80000910: 80000900 .word 0x80000900 + 80000914: 00000000 .word 0x00000000 + 80000918: 80013d45 .word 0x80013d45 + 8000091c: 00000000 .word 0x00000000 + 80000920: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x945e16c122da31ad + 80000924: 000db103 ld x2,0(x27) + 80000928: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x11) # load rs2: x11 = 0x159f16bf04aa223a + 8000092c: 000db583 ld x11,0(x27) + 80000930: 008d8d93 addi x27,x27,8 + +0000000080000934 : +Zksed_sm4ks_cg_cp_rs2_b11: + sm4ks x25, x2, x11, 2 # perform operation + 80000934: b4b10cb3 sm4ks x25,x2,x11,0x2 + # Check if x25 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x25, Zksed_sm4ks_cg_cp_rs2_b11, Zksed_sm4ks_cg_cp_rs2_b11_str) + 80000938: 0009b683 ld x13,0(x19) + 8000093c: 01968c63 beq x13,x25,80000954 + 80000940: 0c10a76f jal x14,8000b200 + 80000944: 80000934 .word 0x80000934 + 80000948: 00000000 .word 0x00000000 + 8000094c: 80013d7a .word 0x80013d7a + 80000950: 00000000 .word 0x00000000 + 80000954: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x27, x29) # load rs1: x29 = 0xe7ac2474785c51e4 + 80000958: 000dbe83 ld x29,0(x27) + 8000095c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x12) # load rs2: x12 = 0xe13c4fa7a5512c3d + 80000960: 000db603 ld x12,0(x27) + 80000964: 008d8d93 addi x27,x27,8 + +0000000080000968 : +Zksed_sm4ks_cg_cp_rs2_b12: + sm4ks x6, x29, x12, 3 # perform operation + 80000968: f4ce8333 sm4ks x6,x29,x12,0x3 + # Check if x6 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x6, Zksed_sm4ks_cg_cp_rs2_b12, Zksed_sm4ks_cg_cp_rs2_b12_str) + 8000096c: 0009b683 ld x13,0(x19) + 80000970: 00668c63 beq x13,x6,80000988 + 80000974: 08d0a76f jal x14,8000b200 + 80000978: 80000968 .word 0x80000968 + 8000097c: 00000000 .word 0x00000000 + 80000980: 80013daf .word 0x80013daf + 80000984: 00000000 .word 0x00000000 + 80000988: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000098c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000990: 00070293 addi x5,x14,0 +# Testcase cp_rs2 (Test source rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0x9466ed8c590ba9df + 80000994: 000db103 ld x2,0(x27) + 80000998: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs2: x13 = 0xf0a981522f69051e + 8000099c: 000db683 ld x13,0(x27) + 800009a0: 008d8d93 addi x27,x27,8 + +00000000800009a4 : +Zksed_sm4ks_cg_cp_rs2_b13: + sm4ks x0, x2, x13, 0 # perform operation + 800009a4: 34d10033 sm4ks x0,x2,x13,0x0 + # Check if x0 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x0, Zksed_sm4ks_cg_cp_rs2_b13, Zksed_sm4ks_cg_cp_rs2_b13_str) + 800009a8: 0009b203 ld x4,0(x19) + 800009ac: 00020c63 beq x4,x0,800009c4 + 800009b0: 0110a2ef jal x5,8000b1c0 + 800009b4: 800009a4 .word 0x800009a4 + 800009b8: 00000000 .word 0x00000000 + 800009bc: 80013de4 .word 0x80013de4 + 800009c0: 00000000 .word 0x00000000 + 800009c4: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x99121eca0f6e6e9c + 800009c8: 000dbc83 ld x25,0(x27) + 800009cc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs2: x14 = 0x83ba72a6e5aceef2 + 800009d0: 000db703 ld x14,0(x27) + 800009d4: 008d8d93 addi x27,x27,8 + +00000000800009d8 : +Zksed_sm4ks_cg_cp_rs2_b14: + sm4ks x9, x25, x14, 1 # perform operation + 800009d8: 74ec84b3 sm4ks x9,x25,x14,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_rs2_b14, Zksed_sm4ks_cg_cp_rs2_b14_str) + 800009dc: 0009b203 ld x4,0(x19) + 800009e0: 00920c63 beq x4,x9,800009f8 + 800009e4: 7dc0a2ef jal x5,8000b1c0 + 800009e8: 800009d8 .word 0x800009d8 + 800009ec: 00000000 .word 0x00000000 + 800009f0: 80013e19 .word 0x80013e19 + 800009f4: 00000000 .word 0x00000000 + 800009f8: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x9e32c69f4ce3b307 + 800009fc: 000db503 ld x10,0(x27) + 80000a00: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x15) # load rs2: x15 = 0x0ad8bb3b39a3cb5e + 80000a04: 000db783 ld x15,0(x27) + 80000a08: 008d8d93 addi x27,x27,8 + +0000000080000a0c : +Zksed_sm4ks_cg_cp_rs2_b15: + sm4ks x25, x10, x15, 1 # perform operation + 80000a0c: 74f50cb3 sm4ks x25,x10,x15,0x1 + # Check if x25 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x25, Zksed_sm4ks_cg_cp_rs2_b15, Zksed_sm4ks_cg_cp_rs2_b15_str) + 80000a10: 0009b203 ld x4,0(x19) + 80000a14: 01920c63 beq x4,x25,80000a2c + 80000a18: 7a80a2ef jal x5,8000b1c0 + 80000a1c: 80000a0c .word 0x80000a0c + 80000a20: 00000000 .word 0x00000000 + 80000a24: 80013e4e .word 0x80013e4e + 80000a28: 00000000 .word 0x00000000 + 80000a2c: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs1: x22 = 0x519f4f9c2490e3e1 + 80000a30: 000dbb03 ld x22,0(x27) + 80000a34: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x16) # load rs2: x16 = 0xb8164f0d4dde285c + 80000a38: 000db803 ld x16,0(x27) + 80000a3c: 008d8d93 addi x27,x27,8 + +0000000080000a40 : +Zksed_sm4ks_cg_cp_rs2_b16: + sm4ks x10, x22, x16, 0 # perform operation + 80000a40: 350b0533 sm4ks x10,x22,x16,0x0 + # Check if x10 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x10, Zksed_sm4ks_cg_cp_rs2_b16, Zksed_sm4ks_cg_cp_rs2_b16_str) + 80000a44: 0009b203 ld x4,0(x19) + 80000a48: 00a20c63 beq x4,x10,80000a60 + 80000a4c: 7740a2ef jal x5,8000b1c0 + 80000a50: 80000a40 .word 0x80000a40 + 80000a54: 00000000 .word 0x00000000 + 80000a58: 80013e83 .word 0x80013e83 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x27, x8) # load rs1: x8 = 0x65078c630372d224 + 80000a64: 000db403 ld x8,0(x27) + 80000a68: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x17) # load rs2: x17 = 0x0325aff60ce14643 + 80000a6c: 000db883 ld x17,0(x27) + 80000a70: 008d8d93 addi x27,x27,8 + +0000000080000a74 : +Zksed_sm4ks_cg_cp_rs2_b17: + sm4ks x9, x8, x17, 1 # perform operation + 80000a74: 751404b3 sm4ks x9,x8,x17,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x9, Zksed_sm4ks_cg_cp_rs2_b17, Zksed_sm4ks_cg_cp_rs2_b17_str) + 80000a78: 0009b203 ld x4,0(x19) + 80000a7c: 00920c63 beq x4,x9,80000a94 + 80000a80: 7400a2ef jal x5,8000b1c0 + 80000a84: 80000a74 .word 0x80000a74 + 80000a88: 00000000 .word 0x00000000 + 80000a8c: 80013eb8 .word 0x80013eb8 + 80000a90: 00000000 .word 0x00000000 + 80000a94: 00898993 addi x19,x19,8 + +# Testcase cp_rs2 (Test source rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0xcaa47ec5e34f4319 + 80000a98: 000db503 ld x10,0(x27) + 80000a9c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x18) # load rs2: x18 = 0x76d5d98fe36e1372 + 80000aa0: 000db903 ld x18,0(x27) + 80000aa4: 008d8d93 addi x27,x27,8 + +0000000080000aa8 : +Zksed_sm4ks_cg_cp_rs2_b18: + sm4ks x20, x10, x18, 3 # perform operation + 80000aa8: f5250a33 sm4ks x20,x10,x18,0x3 + # Check if x20 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x20, Zksed_sm4ks_cg_cp_rs2_b18, Zksed_sm4ks_cg_cp_rs2_b18_str) + 80000aac: 0009b203 ld x4,0(x19) + 80000ab0: 01420c63 beq x4,x20,80000ac8 + 80000ab4: 70c0a2ef jal x5,8000b1c0 + 80000ab8: 80000aa8 .word 0x80000aa8 + 80000abc: 00000000 .word 0x00000000 + 80000ac0: 80013eed .word 0x80013eed + 80000ac4: 00000000 .word 0x00000000 + 80000ac8: 00898993 addi x19,x19,8 + + mv x23, x19 # switch signature pointer register to avoid conflict with test + 80000acc: 00098b93 addi x23,x19,0 +# Testcase cp_rs2 (Test source rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs1: x21 = 0x380d9a21fdd907c7 + 80000ad0: 000dba83 ld x21,0(x27) + 80000ad4: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x19) # load rs2: x19 = 0x5040948c34e9f076 + 80000ad8: 000db983 ld x19,0(x27) + 80000adc: 008d8d93 addi x27,x27,8 + +0000000080000ae0 : +Zksed_sm4ks_cg_cp_rs2_b19: + sm4ks x11, x21, x19, 1 # perform operation + 80000ae0: 753a85b3 sm4ks x11,x21,x19,0x1 + # Check if x11 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x11, Zksed_sm4ks_cg_cp_rs2_b19, Zksed_sm4ks_cg_cp_rs2_b19_str) + 80000ae4: 000bb203 ld x4,0(x23) + 80000ae8: 00b20c63 beq x4,x11,80000b00 + 80000aec: 6d40a2ef jal x5,8000b1c0 + 80000af0: 80000ae0 .word 0x80000ae0 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 80013f22 .word 0x80013f22 + 80000afc: 00000000 .word 0x00000000 + 80000b00: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2 (Test source rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs1: x25 = 0x48229d752d556860 + 80000b04: 000dbc83 ld x25,0(x27) + 80000b08: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x20) # load rs2: x20 = 0x69e9598422ce2dcb + 80000b0c: 000dba03 ld x20,0(x27) + 80000b10: 008d8d93 addi x27,x27,8 + +0000000080000b14 : +Zksed_sm4ks_cg_cp_rs2_b20: + sm4ks x31, x25, x20, 1 # perform operation + 80000b14: 754c8fb3 sm4ks x31,x25,x20,0x1 + # Check if x31 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x31, Zksed_sm4ks_cg_cp_rs2_b20, Zksed_sm4ks_cg_cp_rs2_b20_str) + 80000b18: 000bb203 ld x4,0(x23) + 80000b1c: 01f20c63 beq x4,x31,80000b34 + 80000b20: 6a00a2ef jal x5,8000b1c0 + 80000b24: 80000b14 .word 0x80000b14 + 80000b28: 00000000 .word 0x00000000 + 80000b2c: 80013f57 .word 0x80013f57 + 80000b30: 00000000 .word 0x00000000 + 80000b34: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2 (Test source rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x27, x10) # load rs1: x10 = 0x0a6b409bd5fd0928 + 80000b38: 000db503 ld x10,0(x27) + 80000b3c: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x21) # load rs2: x21 = 0xae7a3e2a86f69c45 + 80000b40: 000dba83 ld x21,0(x27) + 80000b44: 008d8d93 addi x27,x27,8 + +0000000080000b48 : +Zksed_sm4ks_cg_cp_rs2_b21: + sm4ks x2, x10, x21, 3 # perform operation + 80000b48: f5550133 sm4ks x2,x10,x21,0x3 + # Check if x2 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x2, Zksed_sm4ks_cg_cp_rs2_b21, Zksed_sm4ks_cg_cp_rs2_b21_str) + 80000b4c: 000bb203 ld x4,0(x23) + 80000b50: 00220c63 beq x4,x2,80000b68 + 80000b54: 66c0a2ef jal x5,8000b1c0 + 80000b58: 80000b48 .word 0x80000b48 + 80000b5c: 00000000 .word 0x00000000 + 80000b60: 80013f8c .word 0x80013f8c + 80000b64: 00000000 .word 0x00000000 + 80000b68: 008b8b93 addi x23,x23,8 + +# Testcase cp_rs2 (Test source rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x27, x14) # load rs1: x14 = 0x216e68df874ce43a + 80000b6c: 000db703 ld x14,0(x27) + 80000b70: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x22) # load rs2: x22 = 0x604c6d47db79dc81 + 80000b74: 000dbb03 ld x22,0(x27) + 80000b78: 008d8d93 addi x27,x27,8 + +0000000080000b7c : +Zksed_sm4ks_cg_cp_rs2_b22: + sm4ks x28, x14, x22, 0 # perform operation + 80000b7c: 35670e33 sm4ks x28,x14,x22,0x0 + # Check if x28 contains the expected result. x23 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x23, x5, x4, x28, Zksed_sm4ks_cg_cp_rs2_b22, Zksed_sm4ks_cg_cp_rs2_b22_str) + 80000b80: 000bb203 ld x4,0(x23) + 80000b84: 01c20c63 beq x4,x28,80000b9c + 80000b88: 6380a2ef jal x5,8000b1c0 + 80000b8c: 80000b7c .word 0x80000b7c + 80000b90: 00000000 .word 0x00000000 + 80000b94: 80013fc1 .word 0x80013fc1 + 80000b98: 00000000 .word 0x00000000 + 80000b9c: 008b8b93 addi x23,x23,8 + + mv x12, x23 # switch signature pointer register to avoid conflict with test + 80000ba0: 000b8613 addi x12,x23,0 +# Testcase cp_rs2 (Test source rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x27, x3) # load rs1: x3 = 0xb8076b2f02e70ed3 + 80000ba4: 000db183 ld x3,0(x27) + 80000ba8: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x23) # load rs2: x23 = 0x56021844264db711 + 80000bac: 000dbb83 ld x23,0(x27) + 80000bb0: 008d8d93 addi x27,x27,8 + +0000000080000bb4 : +Zksed_sm4ks_cg_cp_rs2_b23: + sm4ks x24, x3, x23, 3 # perform operation + 80000bb4: f5718c33 sm4ks x24,x3,x23,0x3 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zksed_sm4ks_cg_cp_rs2_b23, Zksed_sm4ks_cg_cp_rs2_b23_str) + 80000bb8: 00063203 ld x4,0(x12) + 80000bbc: 01820c63 beq x4,x24,80000bd4 + 80000bc0: 6000a2ef jal x5,8000b1c0 + 80000bc4: 80000bb4 .word 0x80000bb4 + 80000bc8: 00000000 .word 0x00000000 + 80000bcc: 80013ff6 .word 0x80013ff6 + 80000bd0: 00000000 .word 0x00000000 + 80000bd4: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x27, x28) # load rs1: x28 = 0xda02e87495b5a1fa + 80000bd8: 000dbe03 ld x28,0(x27) + 80000bdc: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x24) # load rs2: x24 = 0x801b0d1a84cc9c64 + 80000be0: 000dbc03 ld x24,0(x27) + 80000be4: 008d8d93 addi x27,x27,8 + +0000000080000be8 : +Zksed_sm4ks_cg_cp_rs2_b24: + sm4ks x8, x28, x24, 1 # perform operation + 80000be8: 758e0433 sm4ks x8,x28,x24,0x1 + # Check if x8 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x8, Zksed_sm4ks_cg_cp_rs2_b24, Zksed_sm4ks_cg_cp_rs2_b24_str) + 80000bec: 00063203 ld x4,0(x12) + 80000bf0: 00820c63 beq x4,x8,80000c08 + 80000bf4: 5cc0a2ef jal x5,8000b1c0 + 80000bf8: 80000be8 .word 0x80000be8 + 80000bfc: 00000000 .word 0x00000000 + 80000c00: 8001402b .word 0x8001402b + 80000c04: 00000000 .word 0x00000000 + 80000c08: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x27, x2) # load rs1: x2 = 0xc3eb9b59b6b60152 + 80000c0c: 000db103 ld x2,0(x27) + 80000c10: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x25) # load rs2: x25 = 0x36d91c566a7e0ec4 + 80000c14: 000dbc83 ld x25,0(x27) + 80000c18: 008d8d93 addi x27,x27,8 + +0000000080000c1c : +Zksed_sm4ks_cg_cp_rs2_b25: + sm4ks x15, x2, x25, 1 # perform operation + 80000c1c: 759107b3 sm4ks x15,x2,x25,0x1 + # Check if x15 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x15, Zksed_sm4ks_cg_cp_rs2_b25, Zksed_sm4ks_cg_cp_rs2_b25_str) + 80000c20: 00063203 ld x4,0(x12) + 80000c24: 00f20c63 beq x4,x15,80000c3c + 80000c28: 5980a2ef jal x5,8000b1c0 + 80000c2c: 80000c1c .word 0x80000c1c + 80000c30: 00000000 .word 0x00000000 + 80000c34: 80014060 .word 0x80014060 + 80000c38: 00000000 .word 0x00000000 + 80000c3c: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x27, x13) # load rs1: x13 = 0x677f7ffe128db2f6 + 80000c40: 000db683 ld x13,0(x27) + 80000c44: 008d8d93 addi x27,x27,8 + RVTEST_TESTDATA_LOAD_INT(x27, x26) # load rs2: x26 = 0x47703c3c9d9ee3cf + 80000c48: 000dbd03 ld x26,0(x27) + 80000c4c: 008d8d93 addi x27,x27,8 + +0000000080000c50 : +Zksed_sm4ks_cg_cp_rs2_b26: + sm4ks x31, x13, x26, 2 # perform operation + 80000c50: b5a68fb3 sm4ks x31,x13,x26,0x2 + # Check if x31 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x31, Zksed_sm4ks_cg_cp_rs2_b26, Zksed_sm4ks_cg_cp_rs2_b26_str) + 80000c54: 00063203 ld x4,0(x12) + 80000c58: 01f20c63 beq x4,x31,80000c70 + 80000c5c: 5640a2ef jal x5,8000b1c0 + 80000c60: 80000c50 .word 0x80000c50 + 80000c64: 00000000 .word 0x00000000 + 80000c68: 80014095 .word 0x80014095 + 80000c6c: 00000000 .word 0x00000000 + 80000c70: 00860613 addi x12,x12,8 + + mv x21, x27 # switch data pointer register to avoid conflict with test + 80000c74: 000d8a93 addi x21,x27,0 +# Testcase cp_rs2 (Test source rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0xd160070d2d4348ae + 80000c78: 000ab403 ld x8,0(x21) + 80000c7c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x01baa6d2ec1b3cbc + 80000c80: 000abd83 ld x27,0(x21) + 80000c84: 008a8a93 addi x21,x21,8 + +0000000080000c88 : +Zksed_sm4ks_cg_cp_rs2_b27: + sm4ks x11, x8, x27, 2 # perform operation + 80000c88: b5b405b3 sm4ks x11,x8,x27,0x2 + # Check if x11 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x11, Zksed_sm4ks_cg_cp_rs2_b27, Zksed_sm4ks_cg_cp_rs2_b27_str) + 80000c8c: 00063203 ld x4,0(x12) + 80000c90: 00b20c63 beq x4,x11,80000ca8 + 80000c94: 52c0a2ef jal x5,8000b1c0 + 80000c98: 80000c88 .word 0x80000c88 + 80000c9c: 00000000 .word 0x00000000 + 80000ca0: 800140ca .word 0x800140ca + 80000ca4: 00000000 .word 0x00000000 + 80000ca8: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x05aebfc62bdf0fe9 + 80000cac: 000ab783 ld x15,0(x21) + 80000cb0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs2: x28 = 0xee8b903dcd88a318 + 80000cb4: 000abe03 ld x28,0(x21) + 80000cb8: 008a8a93 addi x21,x21,8 + +0000000080000cbc : +Zksed_sm4ks_cg_cp_rs2_b28: + sm4ks x2, x15, x28, 2 # perform operation + 80000cbc: b5c78133 sm4ks x2,x15,x28,0x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zksed_sm4ks_cg_cp_rs2_b28, Zksed_sm4ks_cg_cp_rs2_b28_str) + 80000cc0: 00063203 ld x4,0(x12) + 80000cc4: 00220c63 beq x4,x2,80000cdc + 80000cc8: 4f80a2ef jal x5,8000b1c0 + 80000ccc: 80000cbc .word 0x80000cbc + 80000cd0: 00000000 .word 0x00000000 + 80000cd4: 800140ff .word 0x800140ff + 80000cd8: 00000000 .word 0x00000000 + 80000cdc: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x21, x28) # load rs1: x28 = 0x6c2186cd808da490 + 80000ce0: 000abe03 ld x28,0(x21) + 80000ce4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs2: x29 = 0x2e8deb4b2d396ef4 + 80000ce8: 000abe83 ld x29,0(x21) + 80000cec: 008a8a93 addi x21,x21,8 + +0000000080000cf0 : +Zksed_sm4ks_cg_cp_rs2_b29: + sm4ks x16, x28, x29, 1 # perform operation + 80000cf0: 75de0833 sm4ks x16,x28,x29,0x1 + # Check if x16 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x16, Zksed_sm4ks_cg_cp_rs2_b29, Zksed_sm4ks_cg_cp_rs2_b29_str) + 80000cf4: 00063203 ld x4,0(x12) + 80000cf8: 01020c63 beq x4,x16,80000d10 + 80000cfc: 4c40a2ef jal x5,8000b1c0 + 80000d00: 80000cf0 .word 0x80000cf0 + 80000d04: 00000000 .word 0x00000000 + 80000d08: 80014134 .word 0x80014134 + 80000d0c: 00000000 .word 0x00000000 + 80000d10: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x8321366fd745817c + 80000d14: 000aba03 ld x20,0(x21) + 80000d18: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs2: x30 = 0x1efc0184dfd1bf12 + 80000d1c: 000abf03 ld x30,0(x21) + 80000d20: 008a8a93 addi x21,x21,8 + +0000000080000d24 : +Zksed_sm4ks_cg_cp_rs2_b30: + sm4ks x14, x20, x30, 0 # perform operation + 80000d24: 35ea0733 sm4ks x14,x20,x30,0x0 + # Check if x14 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x14, Zksed_sm4ks_cg_cp_rs2_b30, Zksed_sm4ks_cg_cp_rs2_b30_str) + 80000d28: 00063203 ld x4,0(x12) + 80000d2c: 00e20c63 beq x4,x14,80000d44 + 80000d30: 4900a2ef jal x5,8000b1c0 + 80000d34: 80000d24 .word 0x80000d24 + 80000d38: 00000000 .word 0x00000000 + 80000d3c: 80014169 .word 0x80014169 + 80000d40: 00000000 .word 0x00000000 + 80000d44: 00860613 addi x12,x12,8 + +# Testcase cp_rs2 (Test source rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xcde4f275bf4ef20d + 80000d48: 000ab303 ld x6,0(x21) + 80000d4c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs2: x31 = 0xe9caddf3e89b3289 + 80000d50: 000abf83 ld x31,0(x21) + 80000d54: 008a8a93 addi x21,x21,8 + +0000000080000d58 : +Zksed_sm4ks_cg_cp_rs2_b31: + sm4ks x24, x6, x31, 0 # perform operation + 80000d58: 35f30c33 sm4ks x24,x6,x31,0x0 + # Check if x24 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x24, Zksed_sm4ks_cg_cp_rs2_b31, Zksed_sm4ks_cg_cp_rs2_b31_str) + 80000d5c: 00063203 ld x4,0(x12) + 80000d60: 01820c63 beq x4,x24,80000d78 + 80000d64: 45c0a2ef jal x5,8000b1c0 + 80000d68: 80000d58 .word 0x80000d58 + 80000d6c: 00000000 .word 0x00000000 + 80000d70: 8001419e .word 0x8001419e + 80000d74: 00000000 .word 0x00000000 + 80000d78: 00860613 addi x12,x12,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x1e6e3d20b587c9f3 + 80000d7c: 000ab683 ld x13,0(x21) + 80000d80: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xe3d292b5e5f43b79 + 80000d84: 000ab503 ld x10,0(x21) + 80000d88: 008a8a93 addi x21,x21,8 + +0000000080000d8c : +Zksed_sm4ks_cg_cp_rd_b0: + sm4ks x0, x13, x10, 2 # perform operation + 80000d8c: b4a68033 sm4ks x0,x13,x10,0x2 + # Check if x0 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x0, Zksed_sm4ks_cg_cp_rd_b0, Zksed_sm4ks_cg_cp_rd_b0_str) + 80000d90: 00063203 ld x4,0(x12) + 80000d94: 00020c63 beq x4,x0,80000dac + 80000d98: 4280a2ef jal x5,8000b1c0 + 80000d9c: 80000d8c .word 0x80000d8c + 80000da0: 00000000 .word 0x00000000 + 80000da4: 800141d3 .word 0x800141d3 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0x859dd2a38843c946 + 80000db0: 000abf03 ld x30,0(x21) + 80000db4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0xb355ecffd7b94c31 + 80000db8: 000ab003 ld x0,0(x21) + 80000dbc: 008a8a93 addi x21,x21,8 + +0000000080000dc0 : +Zksed_sm4ks_cg_cp_rd_b1: + sm4ks x1, x30, x0, 2 # perform operation + 80000dc0: b40f00b3 sm4ks x1,x30,x0,0x2 + # Check if x1 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x1, Zksed_sm4ks_cg_cp_rd_b1, Zksed_sm4ks_cg_cp_rd_b1_str) + 80000dc4: 00063203 ld x4,0(x12) + 80000dc8: 00120c63 beq x4,x1,80000de0 + 80000dcc: 3f40a2ef jal x5,8000b1c0 + 80000dd0: 80000dc0 .word 0x80000dc0 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 80014206 .word 0x80014206 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0xe09a51c70bb08a69 + 80000de4: 000ab503 ld x10,0(x21) + 80000de8: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xbf8afde288baa104 + 80000dec: 000ab083 ld x1,0(x21) + 80000df0: 008a8a93 addi x21,x21,8 + +0000000080000df4 : +Zksed_sm4ks_cg_cp_rd_b2: + sm4ks x2, x10, x1, 2 # perform operation + 80000df4: b4150133 sm4ks x2,x10,x1,0x2 + # Check if x2 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x2, Zksed_sm4ks_cg_cp_rd_b2, Zksed_sm4ks_cg_cp_rd_b2_str) + 80000df8: 00063203 ld x4,0(x12) + 80000dfc: 00220c63 beq x4,x2,80000e14 + 80000e00: 3c00a2ef jal x5,8000b1c0 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 80014239 .word 0x80014239 + 80000e10: 00000000 .word 0x00000000 + 80000e14: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x31) # load rs1: x31 = 0xde88452cfb0c94c8 + 80000e18: 000abf83 ld x31,0(x21) + 80000e1c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0x7d82f670e97092b8 + 80000e20: 000ab083 ld x1,0(x21) + 80000e24: 008a8a93 addi x21,x21,8 + +0000000080000e28 : +Zksed_sm4ks_cg_cp_rd_b3: + sm4ks x3, x31, x1, 2 # perform operation + 80000e28: b41f81b3 sm4ks x3,x31,x1,0x2 + # Check if x3 contains the expected result. x12 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x12, x5, x4, x3, Zksed_sm4ks_cg_cp_rd_b3, Zksed_sm4ks_cg_cp_rd_b3_str) + 80000e2c: 00063203 ld x4,0(x12) + 80000e30: 00320c63 beq x4,x3,80000e48 + 80000e34: 38c0a2ef jal x5,8000b1c0 + 80000e38: 80000e28 .word 0x80000e28 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 8001426c .word 0x8001426c + 80000e44: 00000000 .word 0x00000000 + 80000e48: 00860613 addi x12,x12,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000e4c: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000e50: 00028713 addi x14,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x098df5cf239aac58 + 80000e54: 000abc83 ld x25,0(x21) + 80000e58: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0xbd20663053dc3993 + 80000e5c: 000ab383 ld x7,0(x21) + 80000e60: 008a8a93 addi x21,x21,8 + +0000000080000e64 : +Zksed_sm4ks_cg_cp_rd_b4: + sm4ks x4, x25, x7, 1 # perform operation + 80000e64: 747c8233 sm4ks x4,x25,x7,0x1 + # Check if x4 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x4, Zksed_sm4ks_cg_cp_rd_b4, Zksed_sm4ks_cg_cp_rd_b4_str) + 80000e68: 00063683 ld x13,0(x12) + 80000e6c: 00468c63 beq x13,x4,80000e84 + 80000e70: 3900a76f jal x14,8000b200 + 80000e74: 80000e64 .word 0x80000e64 + 80000e78: 00000000 .word 0x00000000 + 80000e7c: 8001429f .word 0x8001429f + 80000e80: 00000000 .word 0x00000000 + 80000e84: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0x35ec32051eb0cb87 + 80000e88: 000ab903 ld x18,0(x21) + 80000e8c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0xe9ff5bb6eddf0cab + 80000e90: 000abb83 ld x23,0(x21) + 80000e94: 008a8a93 addi x21,x21,8 + +0000000080000e98 : +Zksed_sm4ks_cg_cp_rd_b5: + sm4ks x5, x18, x23, 3 # perform operation + 80000e98: f57902b3 sm4ks x5,x18,x23,0x3 + # Check if x5 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x5, Zksed_sm4ks_cg_cp_rd_b5, Zksed_sm4ks_cg_cp_rd_b5_str) + 80000e9c: 00063683 ld x13,0(x12) + 80000ea0: 00568c63 beq x13,x5,80000eb8 + 80000ea4: 35c0a76f jal x14,8000b200 + 80000ea8: 80000e98 .word 0x80000e98 + 80000eac: 00000000 .word 0x00000000 + 80000eb0: 800142d2 .word 0x800142d2 + 80000eb4: 00000000 .word 0x00000000 + 80000eb8: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x3c3a7b856702979b + 80000ebc: 000ab983 ld x19,0(x21) + 80000ec0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs2: x7 = 0x094c531ee3dcb7bb + 80000ec4: 000ab383 ld x7,0(x21) + 80000ec8: 008a8a93 addi x21,x21,8 + +0000000080000ecc : +Zksed_sm4ks_cg_cp_rd_b6: + sm4ks x6, x19, x7, 2 # perform operation + 80000ecc: b4798333 sm4ks x6,x19,x7,0x2 + # Check if x6 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x6, Zksed_sm4ks_cg_cp_rd_b6, Zksed_sm4ks_cg_cp_rd_b6_str) + 80000ed0: 00063683 ld x13,0(x12) + 80000ed4: 00668c63 beq x13,x6,80000eec + 80000ed8: 3280a76f jal x14,8000b200 + 80000edc: 80000ecc .word 0x80000ecc + 80000ee0: 00000000 .word 0x00000000 + 80000ee4: 80014305 .word 0x80014305 + 80000ee8: 00000000 .word 0x00000000 + 80000eec: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs1: x0 = 0x2b9fb892eb6b814b + 80000ef0: 000ab003 ld x0,0(x21) + 80000ef4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs2: x9 = 0x7aa90a9846838c2d + 80000ef8: 000ab483 ld x9,0(x21) + 80000efc: 008a8a93 addi x21,x21,8 + +0000000080000f00 : +Zksed_sm4ks_cg_cp_rd_b7: + sm4ks x7, x0, x9, 2 # perform operation + 80000f00: b49003b3 sm4ks x7,x0,x9,0x2 + # Check if x7 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x7, Zksed_sm4ks_cg_cp_rd_b7, Zksed_sm4ks_cg_cp_rd_b7_str) + 80000f04: 00063683 ld x13,0(x12) + 80000f08: 00768c63 beq x13,x7,80000f20 + 80000f0c: 2f40a76f jal x14,8000b200 + 80000f10: 80000f00 .word 0x80000f00 + 80000f14: 00000000 .word 0x00000000 + 80000f18: 80014338 .word 0x80014338 + 80000f1c: 00000000 .word 0x00000000 + 80000f20: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x551d73230fe9b442 + 80000f24: 000aba03 ld x20,0(x21) + 80000f28: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0xb3303938ba81e98b + 80000f2c: 000abd83 ld x27,0(x21) + 80000f30: 008a8a93 addi x21,x21,8 + +0000000080000f34 : +Zksed_sm4ks_cg_cp_rd_b8: + sm4ks x8, x20, x27, 1 # perform operation + 80000f34: 75ba0433 sm4ks x8,x20,x27,0x1 + # Check if x8 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x8, Zksed_sm4ks_cg_cp_rd_b8, Zksed_sm4ks_cg_cp_rd_b8_str) + 80000f38: 00063683 ld x13,0(x12) + 80000f3c: 00868c63 beq x13,x8,80000f54 + 80000f40: 2c00a76f jal x14,8000b200 + 80000f44: 80000f34 .word 0x80000f34 + 80000f48: 00000000 .word 0x00000000 + 80000f4c: 8001436b .word 0x8001436b + 80000f50: 00000000 .word 0x00000000 + 80000f54: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x30) # load rs1: x30 = 0xcf4d24349e6fc616 + 80000f58: 000abf03 ld x30,0(x21) + 80000f5c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x23) # load rs2: x23 = 0x80b1ba4da4852a05 + 80000f60: 000abb83 ld x23,0(x21) + 80000f64: 008a8a93 addi x21,x21,8 + +0000000080000f68 : +Zksed_sm4ks_cg_cp_rd_b9: + sm4ks x9, x30, x23, 1 # perform operation + 80000f68: 757f04b3 sm4ks x9,x30,x23,0x1 + # Check if x9 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x9, Zksed_sm4ks_cg_cp_rd_b9, Zksed_sm4ks_cg_cp_rd_b9_str) + 80000f6c: 00063683 ld x13,0(x12) + 80000f70: 00968c63 beq x13,x9,80000f88 + 80000f74: 28c0a76f jal x14,8000b200 + 80000f78: 80000f68 .word 0x80000f68 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 8001439e .word 0x8001439e + 80000f84: 00000000 .word 0x00000000 + 80000f88: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs1: x2 = 0x27fafd1f73e4f91c + 80000f8c: 000ab103 ld x2,0(x21) + 80000f90: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs2: x6 = 0xcefc2c609b171e19 + 80000f94: 000ab303 ld x6,0(x21) + 80000f98: 008a8a93 addi x21,x21,8 + +0000000080000f9c : +Zksed_sm4ks_cg_cp_rd_b10: + sm4ks x10, x2, x6, 2 # perform operation + 80000f9c: b4610533 sm4ks x10,x2,x6,0x2 + # Check if x10 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x10, Zksed_sm4ks_cg_cp_rd_b10, Zksed_sm4ks_cg_cp_rd_b10_str) + 80000fa0: 00063683 ld x13,0(x12) + 80000fa4: 00a68c63 beq x13,x10,80000fbc + 80000fa8: 2580a76f jal x14,8000b200 + 80000fac: 80000f9c .word 0x80000f9c + 80000fb0: 00000000 .word 0x00000000 + 80000fb4: 800143d1 .word 0x800143d1 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 00860613 addi x12,x12,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x961ec6ff33b103f2 + 80000fc0: 000ab883 ld x17,0(x21) + 80000fc4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x0) # load rs2: x0 = 0x0feefa12979c6fb9 + 80000fc8: 000ab003 ld x0,0(x21) + 80000fcc: 008a8a93 addi x21,x21,8 + +0000000080000fd0 : +Zksed_sm4ks_cg_cp_rd_b11: + sm4ks x11, x17, x0, 3 # perform operation + 80000fd0: f40885b3 sm4ks x11,x17,x0,0x3 + # Check if x11 contains the expected result. x12 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x12, x14, x13, x11, Zksed_sm4ks_cg_cp_rd_b11, Zksed_sm4ks_cg_cp_rd_b11_str) + 80000fd4: 00063683 ld x13,0(x12) + 80000fd8: 00b68c63 beq x13,x11,80000ff0 + 80000fdc: 2240a76f jal x14,8000b200 + 80000fe0: 80000fd0 .word 0x80000fd0 + 80000fe4: 00000000 .word 0x00000000 + 80000fe8: 80014405 .word 0x80014405 + 80000fec: 00000000 .word 0x00000000 + 80000ff0: 00860613 addi x12,x12,8 + + mv x17, x12 # switch signature pointer register to avoid conflict with test + 80000ff4: 00060893 addi x17,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs1: x1 = 0x39cf7323b97afb46 + 80000ff8: 000ab083 ld x1,0(x21) + 80000ffc: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs2: x10 = 0xe275a005cb9e895d + 80001000: 000ab503 ld x10,0(x21) + 80001004: 008a8a93 addi x21,x21,8 + +0000000080001008 : +Zksed_sm4ks_cg_cp_rd_b12: + sm4ks x12, x1, x10, 0 # perform operation + 80001008: 34a08633 sm4ks x12,x1,x10,0x0 + # Check if x12 contains the expected result. x17 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x17, x14, x13, x12, Zksed_sm4ks_cg_cp_rd_b12, Zksed_sm4ks_cg_cp_rd_b12_str) + 8000100c: 0008b683 ld x13,0(x17) + 80001010: 00c68c63 beq x13,x12,80001028 + 80001014: 1ec0a76f jal x14,8000b200 + 80001018: 80001008 .word 0x80001008 + 8000101c: 00000000 .word 0x00000000 + 80001020: 80014439 .word 0x80014439 + 80001024: 00000000 .word 0x00000000 + 80001028: 00888893 addi x17,x17,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000102c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80001030: 00070413 addi x8,x14,0 +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0x1b9dd154c9e86ace + 80001034: 000ab703 ld x14,0(x21) + 80001038: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs2: x4 = 0x84cd9e7e3eec2acc + 8000103c: 000ab203 ld x4,0(x21) + 80001040: 008a8a93 addi x21,x21,8 + +0000000080001044 : +Zksed_sm4ks_cg_cp_rd_b13: + sm4ks x13, x14, x4, 1 # perform operation + 80001044: 744706b3 sm4ks x13,x14,x4,0x1 + # Check if x13 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x13, Zksed_sm4ks_cg_cp_rd_b13, Zksed_sm4ks_cg_cp_rd_b13_str) + 80001048: 0008b383 ld x7,0(x17) + 8000104c: 00d38c63 beq x7,x13,80001064 + 80001050: 1880a46f jal x8,8000b1d8 + 80001054: 80001044 .word 0x80001044 + 80001058: 00000000 .word 0x00000000 + 8000105c: 8001446d .word 0x8001446d + 80001060: 00000000 .word 0x00000000 + 80001064: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x29) # load rs1: x29 = 0xf6dc8fd0915f2102 + 80001068: 000abe83 ld x29,0(x21) + 8000106c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x27) # load rs2: x27 = 0x8403846d0fbc3428 + 80001070: 000abd83 ld x27,0(x21) + 80001074: 008a8a93 addi x21,x21,8 + +0000000080001078 : +Zksed_sm4ks_cg_cp_rd_b14: + sm4ks x14, x29, x27, 2 # perform operation + 80001078: b5be8733 sm4ks x14,x29,x27,0x2 + # Check if x14 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x14, Zksed_sm4ks_cg_cp_rd_b14, Zksed_sm4ks_cg_cp_rd_b14_str) + 8000107c: 0008b383 ld x7,0(x17) + 80001080: 00e38c63 beq x7,x14,80001098 + 80001084: 1540a46f jal x8,8000b1d8 + 80001088: 80001078 .word 0x80001078 + 8000108c: 00000000 .word 0x00000000 + 80001090: 800144a1 .word 0x800144a1 + 80001094: 00000000 .word 0x00000000 + 80001098: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x25) # load rs1: x25 = 0x51e0e2f85baba747 + 8000109c: 000abc83 ld x25,0(x21) + 800010a0: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs2: x14 = 0xf827310330191b08 + 800010a4: 000ab703 ld x14,0(x21) + 800010a8: 008a8a93 addi x21,x21,8 + +00000000800010ac : +Zksed_sm4ks_cg_cp_rd_b15: + sm4ks x15, x25, x14, 3 # perform operation + 800010ac: f4ec87b3 sm4ks x15,x25,x14,0x3 + # Check if x15 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x15, Zksed_sm4ks_cg_cp_rd_b15, Zksed_sm4ks_cg_cp_rd_b15_str) + 800010b0: 0008b383 ld x7,0(x17) + 800010b4: 00f38c63 beq x7,x15,800010cc + 800010b8: 1200a46f jal x8,8000b1d8 + 800010bc: 800010ac .word 0x800010ac + 800010c0: 00000000 .word 0x00000000 + 800010c4: 800144d5 .word 0x800144d5 + 800010c8: 00000000 .word 0x00000000 + 800010cc: 00888893 addi x17,x17,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x2a0a6cf08debffde + 800010d0: 000ab183 ld x3,0(x21) + 800010d4: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xa7329065128a5e88 + 800010d8: 000ab083 ld x1,0(x21) + 800010dc: 008a8a93 addi x21,x21,8 + +00000000800010e0 : +Zksed_sm4ks_cg_cp_rd_b16: + sm4ks x16, x3, x1, 3 # perform operation + 800010e0: f4118833 sm4ks x16,x3,x1,0x3 + # Check if x16 contains the expected result. x17 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x17, x8, x7, x16, Zksed_sm4ks_cg_cp_rd_b16, Zksed_sm4ks_cg_cp_rd_b16_str) + 800010e4: 0008b383 ld x7,0(x17) + 800010e8: 01038c63 beq x7,x16,80001100 + 800010ec: 0ec0a46f jal x8,8000b1d8 + 800010f0: 800010e0 .word 0x800010e0 + 800010f4: 00000000 .word 0x00000000 + 800010f8: 80014509 .word 0x80014509 + 800010fc: 00000000 .word 0x00000000 + 80001100: 00888893 addi x17,x17,8 + + mv x19, x17 # switch signature pointer register to avoid conflict with test + 80001104: 00088993 addi x19,x17,0 +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xea3800e4557de652 + 80001108: 000ab583 ld x11,0(x21) + 8000110c: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs2: x15 = 0x290c3aeea662b696 + 80001110: 000ab783 ld x15,0(x21) + 80001114: 008a8a93 addi x21,x21,8 + +0000000080001118 : +Zksed_sm4ks_cg_cp_rd_b17: + sm4ks x17, x11, x15, 3 # perform operation + 80001118: f4f588b3 sm4ks x17,x11,x15,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x17, Zksed_sm4ks_cg_cp_rd_b17, Zksed_sm4ks_cg_cp_rd_b17_str) + 8000111c: 0009b383 ld x7,0(x19) + 80001120: 01138c63 beq x7,x17,80001138 + 80001124: 0b40a46f jal x8,8000b1d8 + 80001128: 80001118 .word 0x80001118 + 8000112c: 00000000 .word 0x00000000 + 80001130: 8001453d .word 0x8001453d + 80001134: 00000000 .word 0x00000000 + 80001138: 00898993 addi x19,x19,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0x8f7067d0af289ba0 + 8000113c: 000ab803 ld x16,0(x21) + 80001140: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x22) # load rs2: x22 = 0xa865c249ff817c9f + 80001144: 000abb03 ld x22,0(x21) + 80001148: 008a8a93 addi x21,x21,8 + +000000008000114c : +Zksed_sm4ks_cg_cp_rd_b18: + sm4ks x18, x16, x22, 3 # perform operation + 8000114c: f5680933 sm4ks x18,x16,x22,0x3 + # Check if x18 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x18, Zksed_sm4ks_cg_cp_rd_b18, Zksed_sm4ks_cg_cp_rd_b18_str) + 80001150: 0009b383 ld x7,0(x19) + 80001154: 01238c63 beq x7,x18,8000116c + 80001158: 0800a46f jal x8,8000b1d8 + 8000115c: 8000114c .word 0x8000114c + 80001160: 00000000 .word 0x00000000 + 80001164: 80014571 .word 0x80014571 + 80001168: 00000000 .word 0x00000000 + 8000116c: 00898993 addi x19,x19,8 + + mv x3, x19 # switch signature pointer register to avoid conflict with test + 80001170: 00098193 addi x3,x19,0 +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0x5918966dc79c40e7 + 80001174: 000ab283 ld x5,0(x21) + 80001178: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x1) # load rs2: x1 = 0xc293c3e179552db2 + 8000117c: 000ab083 ld x1,0(x21) + 80001180: 008a8a93 addi x21,x21,8 + +0000000080001184 : +Zksed_sm4ks_cg_cp_rd_b19: + sm4ks x19, x5, x1, 2 # perform operation + 80001184: b41289b3 sm4ks x19,x5,x1,0x2 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cp_rd_b19, Zksed_sm4ks_cg_cp_rd_b19_str) + 80001188: 0001b383 ld x7,0(x3) + 8000118c: 01338c63 beq x7,x19,800011a4 + 80001190: 0480a46f jal x8,8000b1d8 + 80001194: 80001184 .word 0x80001184 + 80001198: 00000000 .word 0x00000000 + 8000119c: 800145a5 .word 0x800145a5 + 800011a0: 00000000 .word 0x00000000 + 800011a4: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xb128f2c5ad59a62f + 800011a8: 000ab583 ld x11,0(x21) + 800011ac: 008a8a93 addi x21,x21,8 + RVTEST_TESTDATA_LOAD_INT(x21, x2) # load rs2: x2 = 0xcf8cc74b146545d1 + 800011b0: 000ab103 ld x2,0(x21) + 800011b4: 008a8a93 addi x21,x21,8 + +00000000800011b8 : +Zksed_sm4ks_cg_cp_rd_b20: + sm4ks x20, x11, x2, 1 # perform operation + 800011b8: 74258a33 sm4ks x20,x11,x2,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cp_rd_b20, Zksed_sm4ks_cg_cp_rd_b20_str) + 800011bc: 0001b383 ld x7,0(x3) + 800011c0: 01438c63 beq x7,x20,800011d8 + 800011c4: 0140a46f jal x8,8000b1d8 + 800011c8: 800011b8 .word 0x800011b8 + 800011cc: 00000000 .word 0x00000000 + 800011d0: 800145d9 .word 0x800145d9 + 800011d4: 00000000 .word 0x00000000 + 800011d8: 00818193 addi x3,x3,8 + + mv x10, x21 # switch data pointer register to avoid conflict with test + 800011dc: 000a8513 addi x10,x21,0 +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x9bbc8410fb2277c7 + 800011e0: 00053203 ld x4,0(x10) + 800011e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xa84d36bbba886ae9 + 800011e8: 00053f83 ld x31,0(x10) + 800011ec: 00850513 addi x10,x10,8 + +00000000800011f0 : +Zksed_sm4ks_cg_cp_rd_b21: + sm4ks x21, x4, x31, 0 # perform operation + 800011f0: 35f20ab3 sm4ks x21,x4,x31,0x0 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cp_rd_b21, Zksed_sm4ks_cg_cp_rd_b21_str) + 800011f4: 0001b383 ld x7,0(x3) + 800011f8: 01538c63 beq x7,x21,80001210 + 800011fc: 7dd0946f jal x8,8000b1d8 + 80001200: 800011f0 .word 0x800011f0 + 80001204: 00000000 .word 0x00000000 + 80001208: 8001460d .word 0x8001460d + 8000120c: 00000000 .word 0x00000000 + 80001210: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x7687c6b20dc61b47 + 80001214: 00053a03 ld x20,0(x10) + 80001218: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x77cf5db00baa5622 + 8000121c: 00053f03 ld x30,0(x10) + 80001220: 00850513 addi x10,x10,8 + +0000000080001224 : +Zksed_sm4ks_cg_cp_rd_b22: + sm4ks x22, x20, x30, 0 # perform operation + 80001224: 35ea0b33 sm4ks x22,x20,x30,0x0 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cp_rd_b22, Zksed_sm4ks_cg_cp_rd_b22_str) + 80001228: 0001b383 ld x7,0(x3) + 8000122c: 01638c63 beq x7,x22,80001244 + 80001230: 7a90946f jal x8,8000b1d8 + 80001234: 80001224 .word 0x80001224 + 80001238: 00000000 .word 0x00000000 + 8000123c: 80014641 .word 0x80014641 + 80001240: 00000000 .word 0x00000000 + 80001244: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x166ab5898c371312 + 80001248: 00053b03 ld x22,0(x10) + 8000124c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xd173938f165cb5b7 + 80001250: 00053603 ld x12,0(x10) + 80001254: 00850513 addi x10,x10,8 + +0000000080001258 : +Zksed_sm4ks_cg_cp_rd_b23: + sm4ks x23, x22, x12, 2 # perform operation + 80001258: b4cb0bb3 sm4ks x23,x22,x12,0x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cp_rd_b23, Zksed_sm4ks_cg_cp_rd_b23_str) + 8000125c: 0001b383 ld x7,0(x3) + 80001260: 01738c63 beq x7,x23,80001278 + 80001264: 7750946f jal x8,8000b1d8 + 80001268: 80001258 .word 0x80001258 + 8000126c: 00000000 .word 0x00000000 + 80001270: 80014675 .word 0x80014675 + 80001274: 00000000 .word 0x00000000 + 80001278: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x1ac89b15fd369b31 + 8000127c: 00053083 ld x1,0(x10) + 80001280: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7354ad79f2f70e07 + 80001284: 00053f83 ld x31,0(x10) + 80001288: 00850513 addi x10,x10,8 + +000000008000128c : +Zksed_sm4ks_cg_cp_rd_b24: + sm4ks x24, x1, x31, 2 # perform operation + 8000128c: b5f08c33 sm4ks x24,x1,x31,0x2 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cp_rd_b24, Zksed_sm4ks_cg_cp_rd_b24_str) + 80001290: 0001b383 ld x7,0(x3) + 80001294: 01838c63 beq x7,x24,800012ac + 80001298: 7410946f jal x8,8000b1d8 + 8000129c: 8000128c .word 0x8000128c + 800012a0: 00000000 .word 0x00000000 + 800012a4: 800146a9 .word 0x800146a9 + 800012a8: 00000000 .word 0x00000000 + 800012ac: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x932f09f32aa7fd91 + 800012b0: 00053e83 ld x29,0(x10) + 800012b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xcbf9df59aa6d57be + 800012b8: 00053483 ld x9,0(x10) + 800012bc: 00850513 addi x10,x10,8 + +00000000800012c0 : +Zksed_sm4ks_cg_cp_rd_b25: + sm4ks x25, x29, x9, 0 # perform operation + 800012c0: 349e8cb3 sm4ks x25,x29,x9,0x0 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zksed_sm4ks_cg_cp_rd_b25, Zksed_sm4ks_cg_cp_rd_b25_str) + 800012c4: 0001b383 ld x7,0(x3) + 800012c8: 01938c63 beq x7,x25,800012e0 + 800012cc: 70d0946f jal x8,8000b1d8 + 800012d0: 800012c0 .word 0x800012c0 + 800012d4: 00000000 .word 0x00000000 + 800012d8: 800146dd .word 0x800146dd + 800012dc: 00000000 .word 0x00000000 + 800012e0: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xa365de32aa694e01 + 800012e4: 00053903 ld x18,0(x10) + 800012e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x64339ac4931a9c67 + 800012ec: 00053a83 ld x21,0(x10) + 800012f0: 00850513 addi x10,x10,8 + +00000000800012f4 : +Zksed_sm4ks_cg_cp_rd_b26: + sm4ks x26, x18, x21, 2 # perform operation + 800012f4: b5590d33 sm4ks x26,x18,x21,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cp_rd_b26, Zksed_sm4ks_cg_cp_rd_b26_str) + 800012f8: 0001b383 ld x7,0(x3) + 800012fc: 01a38c63 beq x7,x26,80001314 + 80001300: 6d90946f jal x8,8000b1d8 + 80001304: 800012f4 .word 0x800012f4 + 80001308: 00000000 .word 0x00000000 + 8000130c: 80014711 .word 0x80014711 + 80001310: 00000000 .word 0x00000000 + 80001314: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x964cd126b02da327 + 80001318: 00053e83 ld x29,0(x10) + 8000131c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x1c48cbe6d12c7748 + 80001320: 00053283 ld x5,0(x10) + 80001324: 00850513 addi x10,x10,8 + +0000000080001328 : +Zksed_sm4ks_cg_cp_rd_b27: + sm4ks x27, x29, x5, 1 # perform operation + 80001328: 745e8db3 sm4ks x27,x29,x5,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cp_rd_b27, Zksed_sm4ks_cg_cp_rd_b27_str) + 8000132c: 0001b383 ld x7,0(x3) + 80001330: 01b38c63 beq x7,x27,80001348 + 80001334: 6a50946f jal x8,8000b1d8 + 80001338: 80001328 .word 0x80001328 + 8000133c: 00000000 .word 0x00000000 + 80001340: 80014745 .word 0x80014745 + 80001344: 00000000 .word 0x00000000 + 80001348: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0e6440ce9e123961 + 8000134c: 00053e83 ld x29,0(x10) + 80001350: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x36772e319e1473ff + 80001354: 00053b83 ld x23,0(x10) + 80001358: 00850513 addi x10,x10,8 + +000000008000135c : +Zksed_sm4ks_cg_cp_rd_b28: + sm4ks x28, x29, x23, 0 # perform operation + 8000135c: 357e8e33 sm4ks x28,x29,x23,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cp_rd_b28, Zksed_sm4ks_cg_cp_rd_b28_str) + 80001360: 0001b383 ld x7,0(x3) + 80001364: 01c38c63 beq x7,x28,8000137c + 80001368: 6710946f jal x8,8000b1d8 + 8000136c: 8000135c .word 0x8000135c + 80001370: 00000000 .word 0x00000000 + 80001374: 80014779 .word 0x80014779 + 80001378: 00000000 .word 0x00000000 + 8000137c: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xb30b4652f9bfbfa6 + 80001380: 00053903 ld x18,0(x10) + 80001384: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8530527f821619ca + 80001388: 00053303 ld x6,0(x10) + 8000138c: 00850513 addi x10,x10,8 + +0000000080001390 : +Zksed_sm4ks_cg_cp_rd_b29: + sm4ks x29, x18, x6, 2 # perform operation + 80001390: b4690eb3 sm4ks x29,x18,x6,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cp_rd_b29, Zksed_sm4ks_cg_cp_rd_b29_str) + 80001394: 0001b383 ld x7,0(x3) + 80001398: 01d38c63 beq x7,x29,800013b0 + 8000139c: 63d0946f jal x8,8000b1d8 + 800013a0: 80001390 .word 0x80001390 + 800013a4: 00000000 .word 0x00000000 + 800013a8: 800147ad .word 0x800147ad + 800013ac: 00000000 .word 0x00000000 + 800013b0: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x9f9b11373875a148 + 800013b4: 00053003 ld x0,0(x10) + 800013b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x2e861eec325f2ac8 + 800013bc: 00053983 ld x19,0(x10) + 800013c0: 00850513 addi x10,x10,8 + +00000000800013c4 : +Zksed_sm4ks_cg_cp_rd_b30: + sm4ks x30, x0, x19, 3 # perform operation + 800013c4: f5300f33 sm4ks x30,x0,x19,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cp_rd_b30, Zksed_sm4ks_cg_cp_rd_b30_str) + 800013c8: 0001b383 ld x7,0(x3) + 800013cc: 01e38c63 beq x7,x30,800013e4 + 800013d0: 6090946f jal x8,8000b1d8 + 800013d4: 800013c4 .word 0x800013c4 + 800013d8: 00000000 .word 0x00000000 + 800013dc: 800147e1 .word 0x800147e1 + 800013e0: 00000000 .word 0x00000000 + 800013e4: 00818193 addi x3,x3,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xc5451f18ce7434ff + 800013e8: 00053803 ld x16,0(x10) + 800013ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x973f086d927e5928 + 800013f0: 00053e83 ld x29,0(x10) + 800013f4: 00850513 addi x10,x10,8 + +00000000800013f8 : +Zksed_sm4ks_cg_cp_rd_b31: + sm4ks x31, x16, x29, 3 # perform operation + 800013f8: f5d80fb3 sm4ks x31,x16,x29,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cp_rd_b31, Zksed_sm4ks_cg_cp_rd_b31_str) + 800013fc: 0001b383 ld x7,0(x3) + 80001400: 01f38c63 beq x7,x31,80001418 + 80001404: 5d50946f jal x8,8000b1d8 + 80001408: 800013f8 .word 0x800013f8 + 8000140c: 00000000 .word 0x00000000 + 80001410: 80014815 .word 0x80014815 + 80001414: 00000000 .word 0x00000000 + 80001418: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 8000141c: 00053f03 ld x30,0(x10) + 80001420: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x216edd2f278509d4 + 80001424: 00053b83 ld x23,0(x10) + 80001428: 00850513 addi x10,x10,8 + +000000008000142c : +Zksed_sm4ks_cg_cp_rs1_edges_0x0: + sm4ks x24, x30, x23, 3 # perform operation + 8000142c: f57f0c33 sm4ks x24,x30,x23,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cp_rs1_edges_0x0, Zksed_sm4ks_cg_cp_rs1_edges_0x0_str) + 80001430: 0001b383 ld x7,0(x3) + 80001434: 01838c63 beq x7,x24,8000144c + 80001438: 5a10946f jal x8,8000b1d8 + 8000143c: 8000142c .word 0x8000142c + 80001440: 00000000 .word 0x00000000 + 80001444: 80014849 .word 0x80014849 + 80001448: 00000000 .word 0x00000000 + 8000144c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001450: 00053a83 ld x21,0(x10) + 80001454: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x644f4e2360322a36 + 80001458: 00053d83 ld x27,0(x10) + 8000145c: 00850513 addi x10,x10,8 + +0000000080001460 : +Zksed_sm4ks_cg_cp_rs1_edges_0x1: + sm4ks x9, x21, x27, 3 # perform operation + 80001460: f5ba84b3 sm4ks x9,x21,x27,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cp_rs1_edges_0x1, Zksed_sm4ks_cg_cp_rs1_edges_0x1_str) + 80001464: 0001b383 ld x7,0(x3) + 80001468: 00938c63 beq x7,x9,80001480 + 8000146c: 56d0946f jal x8,8000b1d8 + 80001470: 80001460 .word 0x80001460 + 80001474: 00000000 .word 0x00000000 + 80001478: 80014884 .word 0x80014884 + 8000147c: 00000000 .word 0x00000000 + 80001480: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000002 + 80001484: 00053f83 ld x31,0(x10) + 80001488: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xc9a1b6e940269927 + 8000148c: 00053c83 ld x25,0(x10) + 80001490: 00850513 addi x10,x10,8 + +0000000080001494 : +Zksed_sm4ks_cg_cp_rs1_edges_0x2: + sm4ks x21, x31, x25, 1 # perform operation + 80001494: 759f8ab3 sm4ks x21,x31,x25,0x1 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cp_rs1_edges_0x2, Zksed_sm4ks_cg_cp_rs1_edges_0x2_str) + 80001498: 0001b383 ld x7,0(x3) + 8000149c: 01538c63 beq x7,x21,800014b4 + 800014a0: 5390946f jal x8,8000b1d8 + 800014a4: 80001494 .word 0x80001494 + 800014a8: 00000000 .word 0x00000000 + 800014ac: 800148bf .word 0x800148bf + 800014b0: 00000000 .word 0x00000000 + 800014b4: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000000 + 800014b8: 00053603 ld x12,0(x10) + 800014bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xa423fde89bf2d54f + 800014c0: 00053483 ld x9,0(x10) + 800014c4: 00850513 addi x10,x10,8 + +00000000800014c8 : +Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000000: + sm4ks x15, x12, x9, 1 # perform operation + 800014c8: 749607b3 sm4ks x15,x12,x9,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000000, Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000000_str) + 800014cc: 0001b383 ld x7,0(x3) + 800014d0: 00f38c63 beq x7,x15,800014e8 + 800014d4: 5050946f jal x8,8000b1d8 + 800014d8: 800014c8 .word 0x800014c8 + 800014dc: 00000000 .word 0x00000000 + 800014e0: 800148fa .word 0x800148fa + 800014e4: 00000000 .word 0x00000000 + 800014e8: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 800014ec: 00053083 ld x1,0(x10) + 800014f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0851b93030200b18 + 800014f4: 00053a03 ld x20,0(x10) + 800014f8: 00850513 addi x10,x10,8 + +00000000800014fc : +Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000001: + sm4ks x27, x1, x20, 1 # perform operation + 800014fc: 75408db3 sm4ks x27,x1,x20,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000001, Zksed_sm4ks_cg_cp_rs1_edges_0x8000000000000001_str) + 80001500: 0001b383 ld x7,0(x3) + 80001504: 01b38c63 beq x7,x27,8000151c + 80001508: 4d10946f jal x8,8000b1d8 + 8000150c: 800014fc .word 0x800014fc + 80001510: 00000000 .word 0x00000000 + 80001514: 80014945 .word 0x80014945 + 80001518: 00000000 .word 0x00000000 + 8000151c: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x7fffffffffffffff + 80001520: 00053783 ld x15,0(x10) + 80001524: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x66ddc01b5e20fe57 + 80001528: 00053f03 ld x30,0(x10) + 8000152c: 00850513 addi x10,x10,8 + +0000000080001530 : +Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffffffffffff: + sm4ks x4, x15, x30, 2 # perform operation + 80001530: b5e78233 sm4ks x4,x15,x30,0x2 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffffffffffff, Zksed_sm4ks_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80001534: 0001b383 ld x7,0(x3) + 80001538: 00438c63 beq x7,x4,80001550 + 8000153c: 49d0946f jal x8,8000b1d8 + 80001540: 80001530 .word 0x80001530 + 80001544: 00000000 .word 0x00000000 + 80001548: 80014990 .word 0x80014990 + 8000154c: 00000000 .word 0x00000000 + 80001550: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80001554: 00053f83 ld x31,0(x10) + 80001558: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xd61e4ef130329189 + 8000155c: 00053603 ld x12,0(x10) + 80001560: 00850513 addi x10,x10,8 + +0000000080001564 : +Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffffffffffe: + sm4ks x24, x31, x12, 0 # perform operation + 80001564: 34cf8c33 sm4ks x24,x31,x12,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffffffffffe, Zksed_sm4ks_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80001568: 0001b383 ld x7,0(x3) + 8000156c: 01838c63 beq x7,x24,80001584 + 80001570: 4690946f jal x8,8000b1d8 + 80001574: 80001564 .word 0x80001564 + 80001578: 00000000 .word 0x00000000 + 8000157c: 800149db .word 0x800149db + 80001580: 00000000 .word 0x00000000 + 80001584: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0xffffffffffffffff + 80001588: 00053883 ld x17,0(x10) + 8000158c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x6ca3ca95826fe386 + 80001590: 00053283 ld x5,0(x10) + 80001594: 00850513 addi x10,x10,8 + +0000000080001598 : +Zksed_sm4ks_cg_cp_rs1_edges_0xffffffffffffffff: + sm4ks x1, x17, x5, 2 # perform operation + 80001598: b45880b3 sm4ks x1,x17,x5,0x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffffffffffff, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffffffffffff_str) + 8000159c: 0001b383 ld x7,0(x3) + 800015a0: 00138c63 beq x7,x1,800015b8 + 800015a4: 4350946f jal x8,8000b1d8 + 800015a8: 80001598 .word 0x80001598 + 800015ac: 00000000 .word 0x00000000 + 800015b0: 80014a26 .word 0x80014a26 + 800015b4: 00000000 .word 0x00000000 + 800015b8: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffffffffffe + 800015bc: 00053483 ld x9,0(x10) + 800015c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x94b1b0fbace6db0f + 800015c4: 00053a83 ld x21,0(x10) + 800015c8: 00850513 addi x10,x10,8 + +00000000800015cc : +Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffffffffffe: + sm4ks x1, x9, x21, 0 # perform operation + 800015cc: 355480b3 sm4ks x1,x9,x21,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffffffffffe, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 800015d0: 0001b383 ld x7,0(x3) + 800015d4: 00138c63 beq x7,x1,800015ec + 800015d8: 4010946f jal x8,8000b1d8 + 800015dc: 800015cc .word 0x800015cc + 800015e0: 00000000 .word 0x00000000 + 800015e4: 80014a71 .word 0x80014a71 + 800015e8: 00000000 .word 0x00000000 + 800015ec: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x5bbc887763ae86f2 + 800015f0: 00053283 ld x5,0(x10) + 800015f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x227f6cfd07e2b349 + 800015f8: 00053c03 ld x24,0(x10) + 800015fc: 00850513 addi x10,x10,8 + +0000000080001600 : +Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sm4ks x30, x5, x24, 1 # perform operation + 80001600: 75828f33 sm4ks x30,x5,x24,0x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80001604: 0001b383 ld x7,0(x3) + 80001608: 01e38c63 beq x7,x30,80001620 + 8000160c: 3cd0946f jal x8,8000b1d8 + 80001610: 80001600 .word 0x80001600 + 80001614: 00000000 .word 0x00000000 + 80001618: 80014abc .word 0x80014abc + 8000161c: 00000000 .word 0x00000000 + 80001620: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xaaaaaaaaaaaaaaaa + 80001624: 00053703 ld x14,0(x10) + 80001628: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xbc64de4e18049096 + 8000162c: 00053f03 ld x30,0(x10) + 80001630: 00850513 addi x10,x10,8 + +0000000080001634 : +Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sm4ks x29, x14, x30, 2 # perform operation + 80001634: b5e70eb3 sm4ks x29,x14,x30,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80001638: 0001b383 ld x7,0(x3) + 8000163c: 01d38c63 beq x7,x29,80001654 + 80001640: 3990946f jal x8,8000b1d8 + 80001644: 80001634 .word 0x80001634 + 80001648: 00000000 .word 0x00000000 + 8000164c: 80014b07 .word 0x80014b07 + 80001650: 00000000 .word 0x00000000 + 80001654: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x5555555555555555 + 80001658: 00053983 ld x19,0(x10) + 8000165c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0xcfa6e540fecf4605 + 80001660: 00053d03 ld x26,0(x10) + 80001664: 00850513 addi x10,x10,8 + +0000000080001668 : +Zksed_sm4ks_cg_cp_rs1_edges_0x5555555555555555: + sm4ks x27, x19, x26, 3 # perform operation + 80001668: f5a98db3 sm4ks x27,x19,x26,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cp_rs1_edges_0x5555555555555555, Zksed_sm4ks_cg_cp_rs1_edges_0x5555555555555555_str) + 8000166c: 0001b383 ld x7,0(x3) + 80001670: 01b38c63 beq x7,x27,80001688 + 80001674: 3650946f jal x8,8000b1d8 + 80001678: 80001668 .word 0x80001668 + 8000167c: 00000000 .word 0x00000000 + 80001680: 80014b52 .word 0x80014b52 + 80001684: 00000000 .word 0x00000000 + 80001688: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000ffffffff + 8000168c: 00053f83 ld x31,0(x10) + 80001690: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6cdf9b59cf088384 + 80001694: 00053a03 ld x20,0(x10) + 80001698: 00850513 addi x10,x10,8 + +000000008000169c : +Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff: + sm4ks x21, x31, x20, 2 # perform operation + 8000169c: b54f8ab3 sm4ks x21,x31,x20,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff, Zksed_sm4ks_cg_cp_rs1_edges_0xffffffff_str) + 800016a0: 0001b383 ld x7,0(x3) + 800016a4: 01538c63 beq x7,x21,800016bc + 800016a8: 3310946f jal x8,8000b1d8 + 800016ac: 8000169c .word 0x8000169c + 800016b0: 00000000 .word 0x00000000 + 800016b4: 80014b9d .word 0x80014b9d + 800016b8: 00000000 .word 0x00000000 + 800016bc: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x00000000fffffffe + 800016c0: 00053703 ld x14,0(x10) + 800016c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x593b9f0f1bf7070d + 800016c8: 00053283 ld x5,0(x10) + 800016cc: 00850513 addi x10,x10,8 + +00000000800016d0 : +Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe: + sm4ks x27, x14, x5, 0 # perform operation + 800016d0: 34570db3 sm4ks x27,x14,x5,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe, Zksed_sm4ks_cg_cp_rs1_edges_0xfffffffe_str) + 800016d4: 0001b383 ld x7,0(x3) + 800016d8: 01b38c63 beq x7,x27,800016f0 + 800016dc: 2fd0946f jal x8,8000b1d8 + 800016e0: 800016d0 .word 0x800016d0 + 800016e4: 00000000 .word 0x00000000 + 800016e8: 80014be0 .word 0x80014be0 + 800016ec: 00000000 .word 0x00000000 + 800016f0: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000100000000 + 800016f4: 00053783 ld x15,0(x10) + 800016f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x2be74332168cca57 + 800016fc: 00053283 ld x5,0(x10) + 80001700: 00850513 addi x10,x10,8 + +0000000080001704 : +Zksed_sm4ks_cg_cp_rs1_edges_0x100000000: + sm4ks x21, x15, x5, 2 # perform operation + 80001704: b4578ab3 sm4ks x21,x15,x5,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cp_rs1_edges_0x100000000, Zksed_sm4ks_cg_cp_rs1_edges_0x100000000_str) + 80001708: 0001b383 ld x7,0(x3) + 8000170c: 01538c63 beq x7,x21,80001724 + 80001710: 2c90946f jal x8,8000b1d8 + 80001714: 80001704 .word 0x80001704 + 80001718: 00000000 .word 0x00000000 + 8000171c: 80014c23 .word 0x80014c23 + 80001720: 00000000 .word 0x00000000 + 80001724: 00818193 addi x3,x3,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000001 + 80001728: 00053603 ld x12,0(x10) + 8000172c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x6273121a61f2aa03 + 80001730: 00053a03 ld x20,0(x10) + 80001734: 00850513 addi x10,x10,8 + +0000000080001738 : +Zksed_sm4ks_cg_cp_rs1_edges_0x100000001: + sm4ks x22, x12, x20, 1 # perform operation + 80001738: 75460b33 sm4ks x22,x12,x20,0x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cp_rs1_edges_0x100000001, Zksed_sm4ks_cg_cp_rs1_edges_0x100000001_str) + 8000173c: 0001b383 ld x7,0(x3) + 80001740: 01638c63 beq x7,x22,80001758 + 80001744: 2950946f jal x8,8000b1d8 + 80001748: 80001738 .word 0x80001738 + 8000174c: 00000000 .word 0x00000000 + 80001750: 80014c67 .word 0x80014c67 + 80001754: 00000000 .word 0x00000000 + 80001758: 00818193 addi x3,x3,8 +///////////////////////////////// +// cp_rs2_edges +///////////////////////////////// + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x894c1ef7c8a74151 + 8000175c: 00053b83 ld x23,0(x10) + 80001760: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000000 + 80001764: 00053c03 ld x24,0(x10) + 80001768: 00850513 addi x10,x10,8 + +000000008000176c : +Zksed_sm4ks_cg_cp_rs2_edges_0x0: + sm4ks x30, x23, x24, 2 # perform operation + 8000176c: b58b8f33 sm4ks x30,x23,x24,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cp_rs2_edges_0x0, Zksed_sm4ks_cg_cp_rs2_edges_0x0_str) + 80001770: 0001b383 ld x7,0(x3) + 80001774: 01e38c63 beq x7,x30,8000178c + 80001778: 2610946f jal x8,8000b1d8 + 8000177c: 8000176c .word 0x8000176c + 80001780: 00000000 .word 0x00000000 + 80001784: 80014cab .word 0x80014cab + 80001788: 00000000 .word 0x00000000 + 8000178c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x6585ff5ed91ae810 + 80001790: 00053883 ld x17,0(x10) + 80001794: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000000000001 + 80001798: 00053c83 ld x25,0(x10) + 8000179c: 00850513 addi x10,x10,8 + +00000000800017a0 : +Zksed_sm4ks_cg_cp_rs2_edges_0x1: + sm4ks x11, x17, x25, 3 # perform operation + 800017a0: f59885b3 sm4ks x11,x17,x25,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cp_rs2_edges_0x1, Zksed_sm4ks_cg_cp_rs2_edges_0x1_str) + 800017a4: 0001b383 ld x7,0(x3) + 800017a8: 00b38c63 beq x7,x11,800017c0 + 800017ac: 22d0946f jal x8,8000b1d8 + 800017b0: 800017a0 .word 0x800017a0 + 800017b4: 00000000 .word 0x00000000 + 800017b8: 80014ce7 .word 0x80014ce7 + 800017bc: 00000000 .word 0x00000000 + 800017c0: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00408086640ab025 + 800017c4: 00053f83 ld x31,0(x10) + 800017c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000000000002 + 800017cc: 00053583 ld x11,0(x10) + 800017d0: 00850513 addi x10,x10,8 + +00000000800017d4 : +Zksed_sm4ks_cg_cp_rs2_edges_0x2: + sm4ks x30, x31, x11, 1 # perform operation + 800017d4: 74bf8f33 sm4ks x30,x31,x11,0x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cp_rs2_edges_0x2, Zksed_sm4ks_cg_cp_rs2_edges_0x2_str) + 800017d8: 0001b383 ld x7,0(x3) + 800017dc: 01e38c63 beq x7,x30,800017f4 + 800017e0: 1f90946f jal x8,8000b1d8 + 800017e4: 800017d4 .word 0x800017d4 + 800017e8: 00000000 .word 0x00000000 + 800017ec: 80014d23 .word 0x80014d23 + 800017f0: 00000000 .word 0x00000000 + 800017f4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xed5a4982e3606e6b + 800017f8: 00053603 ld x12,0(x10) + 800017fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x8000000000000000 + 80001800: 00053783 ld x15,0(x10) + 80001804: 00850513 addi x10,x10,8 + +0000000080001808 : +Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000000: + sm4ks x4, x12, x15, 0 # perform operation + 80001808: 34f60233 sm4ks x4,x12,x15,0x0 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000000, Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000000_str) + 8000180c: 0001b383 ld x7,0(x3) + 80001810: 00438c63 beq x7,x4,80001828 + 80001814: 1c50946f jal x8,8000b1d8 + 80001818: 80001808 .word 0x80001808 + 8000181c: 00000000 .word 0x00000000 + 80001820: 80014d5f .word 0x80014d5f + 80001824: 00000000 .word 0x00000000 + 80001828: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0d099369ae01de3e + 8000182c: 00053583 ld x11,0(x10) + 80001830: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x8000000000000001 + 80001834: 00053903 ld x18,0(x10) + 80001838: 00850513 addi x10,x10,8 + +000000008000183c : +Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000001: + sm4ks x14, x11, x18, 0 # perform operation + 8000183c: 35258733 sm4ks x14,x11,x18,0x0 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000001, Zksed_sm4ks_cg_cp_rs2_edges_0x8000000000000001_str) + 80001840: 0001b383 ld x7,0(x3) + 80001844: 00e38c63 beq x7,x14,8000185c + 80001848: 1910946f jal x8,8000b1d8 + 8000184c: 8000183c .word 0x8000183c + 80001850: 00000000 .word 0x00000000 + 80001854: 80014daa .word 0x80014daa + 80001858: 00000000 .word 0x00000000 + 8000185c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x7c327dd2c3f3aca4 + 80001860: 00053303 ld x6,0(x10) + 80001864: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7fffffffffffffff + 80001868: 00053483 ld x9,0(x10) + 8000186c: 00850513 addi x10,x10,8 + +0000000080001870 : +Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffffffffffff: + sm4ks x20, x6, x9, 0 # perform operation + 80001870: 34930a33 sm4ks x20,x6,x9,0x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffffffffffff, Zksed_sm4ks_cg_cp_rs2_edges_0x7fffffffffffffff_str) + 80001874: 0001b383 ld x7,0(x3) + 80001878: 01438c63 beq x7,x20,80001890 + 8000187c: 15d0946f jal x8,8000b1d8 + 80001880: 80001870 .word 0x80001870 + 80001884: 00000000 .word 0x00000000 + 80001888: 80014df5 .word 0x80014df5 + 8000188c: 00000000 .word 0x00000000 + 80001890: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x39aa6c2bccdd14c9 + 80001894: 00053f83 ld x31,0(x10) + 80001898: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x7ffffffffffffffe + 8000189c: 00053a03 ld x20,0(x10) + 800018a0: 00850513 addi x10,x10,8 + +00000000800018a4 : +Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffffffffffe: + sm4ks x2, x31, x20, 0 # perform operation + 800018a4: 354f8133 sm4ks x2,x31,x20,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffffffffffe, Zksed_sm4ks_cg_cp_rs2_edges_0x7ffffffffffffffe_str) + 800018a8: 0001b383 ld x7,0(x3) + 800018ac: 00238c63 beq x7,x2,800018c4 + 800018b0: 1290946f jal x8,8000b1d8 + 800018b4: 800018a4 .word 0x800018a4 + 800018b8: 00000000 .word 0x00000000 + 800018bc: 80014e40 .word 0x80014e40 + 800018c0: 00000000 .word 0x00000000 + 800018c4: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x629a4499569af46f + 800018c8: 00053283 ld x5,0(x10) + 800018cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0xffffffffffffffff + 800018d0: 00053783 ld x15,0(x10) + 800018d4: 00850513 addi x10,x10,8 + +00000000800018d8 : +Zksed_sm4ks_cg_cp_rs2_edges_0xffffffffffffffff: + sm4ks x29, x5, x15, 3 # perform operation + 800018d8: f4f28eb3 sm4ks x29,x5,x15,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffffffffffff, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffffffffffff_str) + 800018dc: 0001b383 ld x7,0(x3) + 800018e0: 01d38c63 beq x7,x29,800018f8 + 800018e4: 0f50946f jal x8,8000b1d8 + 800018e8: 800018d8 .word 0x800018d8 + 800018ec: 00000000 .word 0x00000000 + 800018f0: 80014e8b .word 0x80014e8b + 800018f4: 00000000 .word 0x00000000 + 800018f8: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xa333b83440b8d6d5 + 800018fc: 00053c03 ld x24,0(x10) + 80001900: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffffffffffe + 80001904: 00053683 ld x13,0(x10) + 80001908: 00850513 addi x10,x10,8 + +000000008000190c : +Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffffffffffe: + sm4ks x9, x24, x13, 3 # perform operation + 8000190c: f4dc04b3 sm4ks x9,x24,x13,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffffffffffe, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffffffffffe_str) + 80001910: 0001b383 ld x7,0(x3) + 80001914: 00938c63 beq x7,x9,8000192c + 80001918: 0c10946f jal x8,8000b1d8 + 8000191c: 8000190c .word 0x8000190c + 80001920: 00000000 .word 0x00000000 + 80001924: 80014ed6 .word 0x80014ed6 + 80001928: 00000000 .word 0x00000000 + 8000192c: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x9871ca9619a827c1 + 80001930: 00053c83 ld x25,0(x10) + 80001934: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5bbc887763ae86f2 + 80001938: 00053783 ld x15,0(x10) + 8000193c: 00850513 addi x10,x10,8 + +0000000080001940 : +Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc887763ae86f2: + sm4ks x28, x25, x15, 1 # perform operation + 80001940: 74fc8e33 sm4ks x28,x25,x15,0x1 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cp_rs2_edges_0x5bbc887763ae86f2_str) + 80001944: 0001b383 ld x7,0(x3) + 80001948: 01c38c63 beq x7,x28,80001960 + 8000194c: 08d0946f jal x8,8000b1d8 + 80001950: 80001940 .word 0x80001940 + 80001954: 00000000 .word 0x00000000 + 80001958: 80014f21 .word 0x80014f21 + 8000195c: 00000000 .word 0x00000000 + 80001960: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xd0b35339a49338ff + 80001964: 00053483 ld x9,0(x10) + 80001968: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 8000196c: 00053903 ld x18,0(x10) + 80001970: 00850513 addi x10,x10,8 + +0000000080001974 : +Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa: + sm4ks x31, x9, x18, 3 # perform operation + 80001974: f5248fb3 sm4ks x31,x9,x18,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cp_rs2_edges_0xaaaaaaaaaaaaaaaa_str) + 80001978: 0001b383 ld x7,0(x3) + 8000197c: 01f38c63 beq x7,x31,80001994 + 80001980: 0590946f jal x8,8000b1d8 + 80001984: 80001974 .word 0x80001974 + 80001988: 00000000 .word 0x00000000 + 8000198c: 80014f6c .word 0x80014f6c + 80001990: 00000000 .word 0x00000000 + 80001994: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xce965259af2fc9ee + 80001998: 00053983 ld x19,0(x10) + 8000199c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5555555555555555 + 800019a0: 00053d83 ld x27,0(x10) + 800019a4: 00850513 addi x10,x10,8 + +00000000800019a8 : +Zksed_sm4ks_cg_cp_rs2_edges_0x5555555555555555: + sm4ks x21, x19, x27, 2 # perform operation + 800019a8: b5b98ab3 sm4ks x21,x19,x27,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cp_rs2_edges_0x5555555555555555, Zksed_sm4ks_cg_cp_rs2_edges_0x5555555555555555_str) + 800019ac: 0001b383 ld x7,0(x3) + 800019b0: 01538c63 beq x7,x21,800019c8 + 800019b4: 0250946f jal x8,8000b1d8 + 800019b8: 800019a8 .word 0x800019a8 + 800019bc: 00000000 .word 0x00000000 + 800019c0: 80014fb7 .word 0x80014fb7 + 800019c4: 00000000 .word 0x00000000 + 800019c8: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xf9a28132d314a109 + 800019cc: 00053203 ld x4,0(x10) + 800019d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x00000000ffffffff + 800019d4: 00053a83 ld x21,0(x10) + 800019d8: 00850513 addi x10,x10,8 + +00000000800019dc : +Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff: + sm4ks x1, x4, x21, 3 # perform operation + 800019dc: f55200b3 sm4ks x1,x4,x21,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff, Zksed_sm4ks_cg_cp_rs2_edges_0xffffffff_str) + 800019e0: 0001b383 ld x7,0(x3) + 800019e4: 00138c63 beq x7,x1,800019fc + 800019e8: 7f00946f jal x8,8000b1d8 + 800019ec: 800019dc .word 0x800019dc + 800019f0: 00000000 .word 0x00000000 + 800019f4: 80015002 .word 0x80015002 + 800019f8: 00000000 .word 0x00000000 + 800019fc: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0b90cb5456bd0382 + 80001a00: 00053583 ld x11,0(x10) + 80001a04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000fffffffe + 80001a08: 00053e03 ld x28,0(x10) + 80001a0c: 00850513 addi x10,x10,8 + +0000000080001a10 : +Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe: + sm4ks x9, x11, x28, 0 # perform operation + 80001a10: 35c584b3 sm4ks x9,x11,x28,0x0 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe, Zksed_sm4ks_cg_cp_rs2_edges_0xfffffffe_str) + 80001a14: 0001b383 ld x7,0(x3) + 80001a18: 00938c63 beq x7,x9,80001a30 + 80001a1c: 7bc0946f jal x8,8000b1d8 + 80001a20: 80001a10 .word 0x80001a10 + 80001a24: 00000000 .word 0x00000000 + 80001a28: 80015045 .word 0x80015045 + 80001a2c: 00000000 .word 0x00000000 + 80001a30: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x4fcd36d353309a18 + 80001a34: 00053883 ld x17,0(x10) + 80001a38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 80001a3c: 00053483 ld x9,0(x10) + 80001a40: 00850513 addi x10,x10,8 + +0000000080001a44 : +Zksed_sm4ks_cg_cp_rs2_edges_0x100000000: + sm4ks x18, x17, x9, 1 # perform operation + 80001a44: 74988933 sm4ks x18,x17,x9,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cp_rs2_edges_0x100000000, Zksed_sm4ks_cg_cp_rs2_edges_0x100000000_str) + 80001a48: 0001b383 ld x7,0(x3) + 80001a4c: 01238c63 beq x7,x18,80001a64 + 80001a50: 7880946f jal x8,8000b1d8 + 80001a54: 80001a44 .word 0x80001a44 + 80001a58: 00000000 .word 0x00000000 + 80001a5c: 80015088 .word 0x80015088 + 80001a60: 00000000 .word 0x00000000 + 80001a64: 00818193 addi x3,x3,8 + +# Testcase cp_rs2_edges (Test source rs2 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x56307cafe121edf7 + 80001a68: 00053103 ld x2,0(x10) + 80001a6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000100000001 + 80001a70: 00053f03 ld x30,0(x10) + 80001a74: 00850513 addi x10,x10,8 + +0000000080001a78 : +Zksed_sm4ks_cg_cp_rs2_edges_0x100000001: + sm4ks x12, x2, x30, 2 # perform operation + 80001a78: b5e10633 sm4ks x12,x2,x30,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cp_rs2_edges_0x100000001, Zksed_sm4ks_cg_cp_rs2_edges_0x100000001_str) + 80001a7c: 0001b383 ld x7,0(x3) + 80001a80: 00c38c63 beq x7,x12,80001a98 + 80001a84: 7540946f jal x8,8000b1d8 + 80001a88: 80001a78 .word 0x80001a78 + 80001a8c: 00000000 .word 0x00000000 + 80001a90: 800150cc .word 0x800150cc + 80001a94: 00000000 .word 0x00000000 + 80001a98: 00818193 addi x3,x3,8 +///////////////////////////////// +// cr_rs1_rs2_edges +///////////////////////////////// + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 80001a9c: 00053f03 ld x30,0(x10) + 80001aa0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000000 + 80001aa4: 00053d03 ld x26,0(x10) + 80001aa8: 00850513 addi x10,x10,8 + +0000000080001aac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0: + sm4ks x16, x30, x26, 3 # perform operation + 80001aac: f5af0833 sm4ks x16,x30,x26,0x3 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x0_str) + 80001ab0: 0001b383 ld x7,0(x3) + 80001ab4: 01038c63 beq x7,x16,80001acc + 80001ab8: 7200946f jal x8,8000b1d8 + 80001abc: 80001aac .word 0x80001aac + 80001ac0: 00000000 .word 0x00000000 + 80001ac4: 80015110 .word 0x80015110 + 80001ac8: 00000000 .word 0x00000000 + 80001acc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000000 + 80001ad0: 00053b03 ld x22,0(x10) + 80001ad4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000001 + 80001ad8: 00053203 ld x4,0(x10) + 80001adc: 00850513 addi x10,x10,8 + +0000000080001ae0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1: + sm4ks x29, x22, x4, 3 # perform operation + 80001ae0: f44b0eb3 sm4ks x29,x22,x4,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x1_str) + 80001ae4: 0001b383 ld x7,0(x3) + 80001ae8: 01d38c63 beq x7,x29,80001b00 + 80001aec: 6ec0946f jal x8,8000b1d8 + 80001af0: 80001ae0 .word 0x80001ae0 + 80001af4: 00000000 .word 0x00000000 + 80001af8: 80015163 .word 0x80015163 + 80001afc: 00000000 .word 0x00000000 + 80001b00: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0000000000000000 + 80001b04: 00053203 ld x4,0(x10) + 80001b08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000002 + 80001b0c: 00053c03 ld x24,0(x10) + 80001b10: 00850513 addi x10,x10,8 + +0000000080001b14 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2: + sm4ks x9, x4, x24, 3 # perform operation + 80001b14: f58204b3 sm4ks x9,x4,x24,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x2_str) + 80001b18: 0001b383 ld x7,0(x3) + 80001b1c: 00938c63 beq x7,x9,80001b34 + 80001b20: 6b80946f jal x8,8000b1d8 + 80001b24: 80001b14 .word 0x80001b14 + 80001b28: 00000000 .word 0x00000000 + 80001b2c: 800151b6 .word 0x800151b6 + 80001b30: 00000000 .word 0x00000000 + 80001b34: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000000 + 80001b38: 00053883 ld x17,0(x10) + 80001b3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000000 + 80001b40: 00053b03 ld x22,0(x10) + 80001b44: 00850513 addi x10,x10,8 + +0000000080001b48 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000: + sm4ks x20, x17, x22, 2 # perform operation + 80001b48: b5688a33 sm4ks x20,x17,x22,0x2 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000000_str) + 80001b4c: 0001b383 ld x7,0(x3) + 80001b50: 01438c63 beq x7,x20,80001b68 + 80001b54: 6840946f jal x8,8000b1d8 + 80001b58: 80001b48 .word 0x80001b48 + 80001b5c: 00000000 .word 0x00000000 + 80001b60: 80015209 .word 0x80015209 + 80001b64: 00000000 .word 0x00000000 + 80001b68: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000000 + 80001b6c: 00053703 ld x14,0(x10) + 80001b70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000001 + 80001b74: 00053d83 ld x27,0(x10) + 80001b78: 00850513 addi x10,x10,8 + +0000000080001b7c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001: + sm4ks x6, x14, x27, 1 # perform operation + 80001b7c: 75b70333 sm4ks x6,x14,x27,0x1 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x8000000000000001_str) + 80001b80: 0001b383 ld x7,0(x3) + 80001b84: 00638c63 beq x7,x6,80001b9c + 80001b88: 6500946f jal x8,8000b1d8 + 80001b8c: 80001b7c .word 0x80001b7c + 80001b90: 00000000 .word 0x00000000 + 80001b94: 8001526b .word 0x8001526b + 80001b98: 00000000 .word 0x00000000 + 80001b9c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0000000000000000 + 80001ba0: 00053d03 ld x26,0(x10) + 80001ba4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7fffffffffffffff + 80001ba8: 00053803 ld x16,0(x10) + 80001bac: 00850513 addi x10,x10,8 + +0000000080001bb0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff: + sm4ks x4, x26, x16, 0 # perform operation + 80001bb0: 350d0233 sm4ks x4,x26,x16,0x0 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7fffffffffffffff_str) + 80001bb4: 0001b383 ld x7,0(x3) + 80001bb8: 00438c63 beq x7,x4,80001bd0 + 80001bbc: 61c0946f jal x8,8000b1d8 + 80001bc0: 80001bb0 .word 0x80001bb0 + 80001bc4: 00000000 .word 0x00000000 + 80001bc8: 800152cd .word 0x800152cd + 80001bcc: 00000000 .word 0x00000000 + 80001bd0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000000 + 80001bd4: 00053583 ld x11,0(x10) + 80001bd8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x7ffffffffffffffe + 80001bdc: 00053c83 ld x25,0(x10) + 80001be0: 00850513 addi x10,x10,8 + +0000000080001be4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe: + sm4ks x24, x11, x25, 0 # perform operation + 80001be4: 35958c33 sm4ks x24,x11,x25,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x7ffffffffffffffe_str) + 80001be8: 0001b383 ld x7,0(x3) + 80001bec: 01838c63 beq x7,x24,80001c04 + 80001bf0: 5e80946f jal x8,8000b1d8 + 80001bf4: 80001be4 .word 0x80001be4 + 80001bf8: 00000000 .word 0x00000000 + 80001bfc: 8001532f .word 0x8001532f + 80001c00: 00000000 .word 0x00000000 + 80001c04: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000000 + 80001c08: 00053a03 ld x20,0(x10) + 80001c0c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xffffffffffffffff + 80001c10: 00053b83 ld x23,0(x10) + 80001c14: 00850513 addi x10,x10,8 + +0000000080001c18 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff: + sm4ks x18, x20, x23, 3 # perform operation + 80001c18: f57a0933 sm4ks x18,x20,x23,0x3 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffffffffffff_str) + 80001c1c: 0001b383 ld x7,0(x3) + 80001c20: 01238c63 beq x7,x18,80001c38 + 80001c24: 5b40946f jal x8,8000b1d8 + 80001c28: 80001c18 .word 0x80001c18 + 80001c2c: 00000000 .word 0x00000000 + 80001c30: 80015391 .word 0x80015391 + 80001c34: 00000000 .word 0x00000000 + 80001c38: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000000 + 80001c3c: 00053f83 ld x31,0(x10) + 80001c40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xfffffffffffffffe + 80001c44: 00053b83 ld x23,0(x10) + 80001c48: 00850513 addi x10,x10,8 + +0000000080001c4c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe: + sm4ks x22, x31, x23, 3 # perform operation + 80001c4c: f57f8b33 sm4ks x22,x31,x23,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffffffffffe_str) + 80001c50: 0001b383 ld x7,0(x3) + 80001c54: 01638c63 beq x7,x22,80001c6c + 80001c58: 5800946f jal x8,8000b1d8 + 80001c5c: 80001c4c .word 0x80001c4c + 80001c60: 00000000 .word 0x00000000 + 80001c64: 800153f3 .word 0x800153f3 + 80001c68: 00000000 .word 0x00000000 + 80001c6c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000000 + 80001c70: 00053f03 ld x30,0(x10) + 80001c74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x5bbc887763ae86f2 + 80001c78: 00053983 ld x19,0(x10) + 80001c7c: 00850513 addi x10,x10,8 + +0000000080001c80 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2: + sm4ks x27, x30, x19, 0 # perform operation + 80001c80: 353f0db3 sm4ks x27,x30,x19,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5bbc887763ae86f2_str) + 80001c84: 0001b383 ld x7,0(x3) + 80001c88: 01b38c63 beq x7,x27,80001ca0 + 80001c8c: 54c0946f jal x8,8000b1d8 + 80001c90: 80001c80 .word 0x80001c80 + 80001c94: 00000000 .word 0x00000000 + 80001c98: 80015455 .word 0x80015455 + 80001c9c: 00000000 .word 0x00000000 + 80001ca0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000000000000 + 80001ca4: 00053283 ld x5,0(x10) + 80001ca8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0xaaaaaaaaaaaaaaaa + 80001cac: 00053a83 ld x21,0(x10) + 80001cb0: 00850513 addi x10,x10,8 + +0000000080001cb4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x27, x5, x21, 1 # perform operation + 80001cb4: 75528db3 sm4ks x27,x5,x21,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001cb8: 0001b383 ld x7,0(x3) + 80001cbc: 01b38c63 beq x7,x27,80001cd4 + 80001cc0: 5180946f jal x8,8000b1d8 + 80001cc4: 80001cb4 .word 0x80001cb4 + 80001cc8: 00000000 .word 0x00000000 + 80001ccc: 800154b7 .word 0x800154b7 + 80001cd0: 00000000 .word 0x00000000 + 80001cd4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000000 + 80001cd8: 00053f83 ld x31,0(x10) + 80001cdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x5555555555555555 + 80001ce0: 00053083 ld x1,0(x10) + 80001ce4: 00850513 addi x10,x10,8 + +0000000080001ce8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555: + sm4ks x2, x31, x1, 1 # perform operation + 80001ce8: 741f8133 sm4ks x2,x31,x1,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x5555555555555555_str) + 80001cec: 0001b383 ld x7,0(x3) + 80001cf0: 00238c63 beq x7,x2,80001d08 + 80001cf4: 4e40946f jal x8,8000b1d8 + 80001cf8: 80001ce8 .word 0x80001ce8 + 80001cfc: 00000000 .word 0x00000000 + 80001d00: 80015519 .word 0x80015519 + 80001d04: 00000000 .word 0x00000000 + 80001d08: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000000000000 + 80001d0c: 00053c83 ld x25,0(x10) + 80001d10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000ffffffff + 80001d14: 00053483 ld x9,0(x10) + 80001d18: 00850513 addi x10,x10,8 + +0000000080001d1c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff: + sm4ks x26, x25, x9, 2 # perform operation + 80001d1c: b49c8d33 sm4ks x26,x25,x9,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xffffffff_str) + 80001d20: 0001b383 ld x7,0(x3) + 80001d24: 01a38c63 beq x7,x26,80001d3c + 80001d28: 4b00946f jal x8,8000b1d8 + 80001d2c: 80001d1c .word 0x80001d1c + 80001d30: 00000000 .word 0x00000000 + 80001d34: 8001557b .word 0x8001557b + 80001d38: 00000000 .word 0x00000000 + 80001d3c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000000 + 80001d40: 00053883 ld x17,0(x10) + 80001d44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000fffffffe + 80001d48: 00053d83 ld x27,0(x10) + 80001d4c: 00850513 addi x10,x10,8 + +0000000080001d50 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe: + sm4ks x26, x17, x27, 3 # perform operation + 80001d50: f5b88d33 sm4ks x26,x17,x27,0x3 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0xfffffffe_str) + 80001d54: 0001b383 ld x7,0(x3) + 80001d58: 01a38c63 beq x7,x26,80001d70 + 80001d5c: 47c0946f jal x8,8000b1d8 + 80001d60: 80001d50 .word 0x80001d50 + 80001d64: 00000000 .word 0x00000000 + 80001d68: 800155d5 .word 0x800155d5 + 80001d6c: 00000000 .word 0x00000000 + 80001d70: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000000 + 80001d74: 00053703 ld x14,0(x10) + 80001d78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000100000000 + 80001d7c: 00053883 ld x17,0(x10) + 80001d80: 00850513 addi x10,x10,8 + +0000000080001d84 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000: + sm4ks x29, x14, x17, 1 # perform operation + 80001d84: 75170eb3 sm4ks x29,x14,x17,0x1 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000000_str) + 80001d88: 0001b383 ld x7,0(x3) + 80001d8c: 01d38c63 beq x7,x29,80001da4 + 80001d90: 4480946f jal x8,8000b1d8 + 80001d94: 80001d84 .word 0x80001d84 + 80001d98: 00000000 .word 0x00000000 + 80001d9c: 8001562f .word 0x8001562f + 80001da0: 00000000 .word 0x00000000 + 80001da4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000000 + 80001da8: 00053a83 ld x21,0(x10) + 80001dac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000100000001 + 80001db0: 00053203 ld x4,0(x10) + 80001db4: 00850513 addi x10,x10,8 + +0000000080001db8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001: + sm4ks x26, x21, x4, 1 # perform operation + 80001db8: 744a8d33 sm4ks x26,x21,x4,0x1 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x0_rs2val_0x100000001_str) + 80001dbc: 0001b383 ld x7,0(x3) + 80001dc0: 01a38c63 beq x7,x26,80001dd8 + 80001dc4: 4140946f jal x8,8000b1d8 + 80001dc8: 80001db8 .word 0x80001db8 + 80001dcc: 00000000 .word 0x00000000 + 80001dd0: 8001568a .word 0x8001568a + 80001dd4: 00000000 .word 0x00000000 + 80001dd8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000000000001 + 80001ddc: 00053483 ld x9,0(x10) + 80001de0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000000 + 80001de4: 00053203 ld x4,0(x10) + 80001de8: 00850513 addi x10,x10,8 + +0000000080001dec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0: + sm4ks x11, x9, x4, 3 # perform operation + 80001dec: f44485b3 sm4ks x11,x9,x4,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x0_str) + 80001df0: 0001b383 ld x7,0(x3) + 80001df4: 00b38c63 beq x7,x11,80001e0c + 80001df8: 3e00946f jal x8,8000b1d8 + 80001dfc: 80001dec .word 0x80001dec + 80001e00: 00000000 .word 0x00000000 + 80001e04: 800156e5 .word 0x800156e5 + 80001e08: 00000000 .word 0x00000000 + 80001e0c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000001 + 80001e10: 00053f03 ld x30,0(x10) + 80001e14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000001 + 80001e18: 00053e03 ld x28,0(x10) + 80001e1c: 00850513 addi x10,x10,8 + +0000000080001e20 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1: + sm4ks x31, x30, x28, 3 # perform operation + 80001e20: f5cf0fb3 sm4ks x31,x30,x28,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x1_str) + 80001e24: 0001b383 ld x7,0(x3) + 80001e28: 01f38c63 beq x7,x31,80001e40 + 80001e2c: 3ac0946f jal x8,8000b1d8 + 80001e30: 80001e20 .word 0x80001e20 + 80001e34: 00000000 .word 0x00000000 + 80001e38: 80015738 .word 0x80015738 + 80001e3c: 00000000 .word 0x00000000 + 80001e40: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x0000000000000001 + 80001e44: 00053083 ld x1,0(x10) + 80001e48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x0000000000000002 + 80001e4c: 00053d83 ld x27,0(x10) + 80001e50: 00850513 addi x10,x10,8 + +0000000080001e54 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2: + sm4ks x18, x1, x27, 0 # perform operation + 80001e54: 35b08933 sm4ks x18,x1,x27,0x0 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x2_str) + 80001e58: 0001b383 ld x7,0(x3) + 80001e5c: 01238c63 beq x7,x18,80001e74 + 80001e60: 3780946f jal x8,8000b1d8 + 80001e64: 80001e54 .word 0x80001e54 + 80001e68: 00000000 .word 0x00000000 + 80001e6c: 8001578b .word 0x8001578b + 80001e70: 00000000 .word 0x00000000 + 80001e74: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000001 + 80001e78: 00053683 ld x13,0(x10) + 80001e7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x8000000000000000 + 80001e80: 00053283 ld x5,0(x10) + 80001e84: 00850513 addi x10,x10,8 + +0000000080001e88 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000: + sm4ks x12, x13, x5, 3 # perform operation + 80001e88: f4568633 sm4ks x12,x13,x5,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000000_str) + 80001e8c: 0001b383 ld x7,0(x3) + 80001e90: 00c38c63 beq x7,x12,80001ea8 + 80001e94: 3440946f jal x8,8000b1d8 + 80001e98: 80001e88 .word 0x80001e88 + 80001e9c: 00000000 .word 0x00000000 + 80001ea0: 800157de .word 0x800157de + 80001ea4: 00000000 .word 0x00000000 + 80001ea8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000001 + 80001eac: 00053a83 ld x21,0(x10) + 80001eb0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x8000000000000001 + 80001eb4: 00053083 ld x1,0(x10) + 80001eb8: 00850513 addi x10,x10,8 + +0000000080001ebc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001: + sm4ks x4, x21, x1, 1 # perform operation + 80001ebc: 741a8233 sm4ks x4,x21,x1,0x1 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x8000000000000001_str) + 80001ec0: 0001b383 ld x7,0(x3) + 80001ec4: 00438c63 beq x7,x4,80001edc + 80001ec8: 3100946f jal x8,8000b1d8 + 80001ecc: 80001ebc .word 0x80001ebc + 80001ed0: 00000000 .word 0x00000000 + 80001ed4: 80015840 .word 0x80015840 + 80001ed8: 00000000 .word 0x00000000 + 80001edc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000001 + 80001ee0: 00053783 ld x15,0(x10) + 80001ee4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x7fffffffffffffff + 80001ee8: 00053f03 ld x30,0(x10) + 80001eec: 00850513 addi x10,x10,8 + +0000000080001ef0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff: + sm4ks x21, x15, x30, 1 # perform operation + 80001ef0: 75e78ab3 sm4ks x21,x15,x30,0x1 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7fffffffffffffff_str) + 80001ef4: 0001b383 ld x7,0(x3) + 80001ef8: 01538c63 beq x7,x21,80001f10 + 80001efc: 2dc0946f jal x8,8000b1d8 + 80001f00: 80001ef0 .word 0x80001ef0 + 80001f04: 00000000 .word 0x00000000 + 80001f08: 800158a2 .word 0x800158a2 + 80001f0c: 00000000 .word 0x00000000 + 80001f10: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000001 + 80001f14: 00053783 ld x15,0(x10) + 80001f18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7ffffffffffffffe + 80001f1c: 00053903 ld x18,0(x10) + 80001f20: 00850513 addi x10,x10,8 + +0000000080001f24 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe: + sm4ks x19, x15, x18, 2 # perform operation + 80001f24: b52789b3 sm4ks x19,x15,x18,0x2 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x7ffffffffffffffe_str) + 80001f28: 0001b383 ld x7,0(x3) + 80001f2c: 01338c63 beq x7,x19,80001f44 + 80001f30: 2a80946f jal x8,8000b1d8 + 80001f34: 80001f24 .word 0x80001f24 + 80001f38: 00000000 .word 0x00000000 + 80001f3c: 80015904 .word 0x80015904 + 80001f40: 00000000 .word 0x00000000 + 80001f44: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 80001f48: 00053a03 ld x20,0(x10) + 80001f4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80001f50: 00053c03 ld x24,0(x10) + 80001f54: 00850513 addi x10,x10,8 + +0000000080001f58 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff: + sm4ks x14, x20, x24, 1 # perform operation + 80001f58: 758a0733 sm4ks x14,x20,x24,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffffffffffff_str) + 80001f5c: 0001b383 ld x7,0(x3) + 80001f60: 00e38c63 beq x7,x14,80001f78 + 80001f64: 2740946f jal x8,8000b1d8 + 80001f68: 80001f58 .word 0x80001f58 + 80001f6c: 00000000 .word 0x00000000 + 80001f70: 80015966 .word 0x80015966 + 80001f74: 00000000 .word 0x00000000 + 80001f78: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000001 + 80001f7c: 00053d83 ld x27,0(x10) + 80001f80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xfffffffffffffffe + 80001f84: 00053703 ld x14,0(x10) + 80001f88: 00850513 addi x10,x10,8 + +0000000080001f8c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe: + sm4ks x28, x27, x14, 1 # perform operation + 80001f8c: 74ed8e33 sm4ks x28,x27,x14,0x1 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffffffffffe_str) + 80001f90: 0001b383 ld x7,0(x3) + 80001f94: 01c38c63 beq x7,x28,80001fac + 80001f98: 2400946f jal x8,8000b1d8 + 80001f9c: 80001f8c .word 0x80001f8c + 80001fa0: 00000000 .word 0x00000000 + 80001fa4: 800159c8 .word 0x800159c8 + 80001fa8: 00000000 .word 0x00000000 + 80001fac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000001 + 80001fb0: 00053583 ld x11,0(x10) + 80001fb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x5bbc887763ae86f2 + 80001fb8: 00053203 ld x4,0(x10) + 80001fbc: 00850513 addi x10,x10,8 + +0000000080001fc0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2: + sm4ks x9, x11, x4, 1 # perform operation + 80001fc0: 744584b3 sm4ks x9,x11,x4,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5bbc887763ae86f2_str) + 80001fc4: 0001b383 ld x7,0(x3) + 80001fc8: 00938c63 beq x7,x9,80001fe0 + 80001fcc: 20c0946f jal x8,8000b1d8 + 80001fd0: 80001fc0 .word 0x80001fc0 + 80001fd4: 00000000 .word 0x00000000 + 80001fd8: 80015a2a .word 0x80015a2a + 80001fdc: 00000000 .word 0x00000000 + 80001fe0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000001 + 80001fe4: 00053c03 ld x24,0(x10) + 80001fe8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80001fec: 00053e83 ld x29,0(x10) + 80001ff0: 00850513 addi x10,x10,8 + +0000000080001ff4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x25, x24, x29, 2 # perform operation + 80001ff4: b5dc0cb3 sm4ks x25,x24,x29,0x2 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80001ff8: 0001b383 ld x7,0(x3) + 80001ffc: 01938c63 beq x7,x25,80002014 + 80002000: 1d80946f jal x8,8000b1d8 + 80002004: 80001ff4 .word 0x80001ff4 + 80002008: 00000000 .word 0x00000000 + 8000200c: 80015a8c .word 0x80015a8c + 80002010: 00000000 .word 0x00000000 + 80002014: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000000000001 + 80002018: 00053603 ld x12,0(x10) + 8000201c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x5555555555555555 + 80002020: 00053783 ld x15,0(x10) + 80002024: 00850513 addi x10,x10,8 + +0000000080002028 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555: + sm4ks x28, x12, x15, 0 # perform operation + 80002028: 34f60e33 sm4ks x28,x12,x15,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x5555555555555555_str) + 8000202c: 0001b383 ld x7,0(x3) + 80002030: 01c38c63 beq x7,x28,80002048 + 80002034: 1a40946f jal x8,8000b1d8 + 80002038: 80002028 .word 0x80002028 + 8000203c: 00000000 .word 0x00000000 + 80002040: 80015aee .word 0x80015aee + 80002044: 00000000 .word 0x00000000 + 80002048: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000001 + 8000204c: 00053c03 ld x24,0(x10) + 80002050: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000000ffffffff + 80002054: 00053803 ld x16,0(x10) + 80002058: 00850513 addi x10,x10,8 + +000000008000205c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff: + sm4ks x4, x24, x16, 1 # perform operation + 8000205c: 750c0233 sm4ks x4,x24,x16,0x1 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xffffffff_str) + 80002060: 0001b383 ld x7,0(x3) + 80002064: 00438c63 beq x7,x4,8000207c + 80002068: 1700946f jal x8,8000b1d8 + 8000206c: 8000205c .word 0x8000205c + 80002070: 00000000 .word 0x00000000 + 80002074: 80015b50 .word 0x80015b50 + 80002078: 00000000 .word 0x00000000 + 8000207c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000001 + 80002080: 00053883 ld x17,0(x10) + 80002084: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x00000000fffffffe + 80002088: 00053c03 ld x24,0(x10) + 8000208c: 00850513 addi x10,x10,8 + +0000000080002090 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe: + sm4ks x23, x17, x24, 0 # perform operation + 80002090: 35888bb3 sm4ks x23,x17,x24,0x0 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0xfffffffe_str) + 80002094: 0001b383 ld x7,0(x3) + 80002098: 01738c63 beq x7,x23,800020b0 + 8000209c: 13c0946f jal x8,8000b1d8 + 800020a0: 80002090 .word 0x80002090 + 800020a4: 00000000 .word 0x00000000 + 800020a8: 80015baa .word 0x80015baa + 800020ac: 00000000 .word 0x00000000 + 800020b0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000000000001 + 800020b4: 00053a03 ld x20,0(x10) + 800020b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x0000000100000000 + 800020bc: 00053583 ld x11,0(x10) + 800020c0: 00850513 addi x10,x10,8 + +00000000800020c4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000: + sm4ks x24, x20, x11, 1 # perform operation + 800020c4: 74ba0c33 sm4ks x24,x20,x11,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000000_str) + 800020c8: 0001b383 ld x7,0(x3) + 800020cc: 01838c63 beq x7,x24,800020e4 + 800020d0: 1080946f jal x8,8000b1d8 + 800020d4: 800020c4 .word 0x800020c4 + 800020d8: 00000000 .word 0x00000000 + 800020dc: 80015c04 .word 0x80015c04 + 800020e0: 00000000 .word 0x00000000 + 800020e4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x0000000000000001 + 800020e8: 00053883 ld x17,0(x10) + 800020ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000100000001 + 800020f0: 00053683 ld x13,0(x10) + 800020f4: 00850513 addi x10,x10,8 + +00000000800020f8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001: + sm4ks x18, x17, x13, 0 # perform operation + 800020f8: 34d88933 sm4ks x18,x17,x13,0x0 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x1_rs2val_0x100000001_str) + 800020fc: 0001b383 ld x7,0(x3) + 80002100: 01238c63 beq x7,x18,80002118 + 80002104: 0d40946f jal x8,8000b1d8 + 80002108: 800020f8 .word 0x800020f8 + 8000210c: 00000000 .word 0x00000000 + 80002110: 80015c5f .word 0x80015c5f + 80002114: 00000000 .word 0x00000000 + 80002118: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000002 + 8000211c: 00053983 ld x19,0(x10) + 80002120: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000000 + 80002124: 00053e03 ld x28,0(x10) + 80002128: 00850513 addi x10,x10,8 + +000000008000212c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0: + sm4ks x5, x19, x28, 2 # perform operation + 8000212c: b5c982b3 sm4ks x5,x19,x28,0x2 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x0_str) + 80002130: 0001b383 ld x7,0(x3) + 80002134: 00538c63 beq x7,x5,8000214c + 80002138: 0a00946f jal x8,8000b1d8 + 8000213c: 8000212c .word 0x8000212c + 80002140: 00000000 .word 0x00000000 + 80002144: 80015cba .word 0x80015cba + 80002148: 00000000 .word 0x00000000 + 8000214c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 80002150: 00053803 ld x16,0(x10) + 80002154: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000000000001 + 80002158: 00053883 ld x17,0(x10) + 8000215c: 00850513 addi x10,x10,8 + +0000000080002160 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1: + sm4ks x1, x16, x17, 2 # perform operation + 80002160: b51800b3 sm4ks x1,x16,x17,0x2 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x1_str) + 80002164: 0001b383 ld x7,0(x3) + 80002168: 00138c63 beq x7,x1,80002180 + 8000216c: 06c0946f jal x8,8000b1d8 + 80002170: 80002160 .word 0x80002160 + 80002174: 00000000 .word 0x00000000 + 80002178: 80015d0d .word 0x80015d0d + 8000217c: 00000000 .word 0x00000000 + 80002180: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x0000000000000002 + 80002184: 00053783 ld x15,0(x10) + 80002188: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000002 + 8000218c: 00053703 ld x14,0(x10) + 80002190: 00850513 addi x10,x10,8 + +0000000080002194 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2: + sm4ks x9, x15, x14, 1 # perform operation + 80002194: 74e784b3 sm4ks x9,x15,x14,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x2_str) + 80002198: 0001b383 ld x7,0(x3) + 8000219c: 00938c63 beq x7,x9,800021b4 + 800021a0: 0380946f jal x8,8000b1d8 + 800021a4: 80002194 .word 0x80002194 + 800021a8: 00000000 .word 0x00000000 + 800021ac: 80015d60 .word 0x80015d60 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 800021b8: 00053803 ld x16,0(x10) + 800021bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x8000000000000000 + 800021c0: 00053483 ld x9,0(x10) + 800021c4: 00850513 addi x10,x10,8 + +00000000800021c8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000: + sm4ks x28, x16, x9, 3 # perform operation + 800021c8: f4980e33 sm4ks x28,x16,x9,0x3 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000000_str) + 800021cc: 0001b383 ld x7,0(x3) + 800021d0: 01c38c63 beq x7,x28,800021e8 + 800021d4: 0040946f jal x8,8000b1d8 + 800021d8: 800021c8 .word 0x800021c8 + 800021dc: 00000000 .word 0x00000000 + 800021e0: 80015db3 .word 0x80015db3 + 800021e4: 00000000 .word 0x00000000 + 800021e8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000002 + 800021ec: 00053703 ld x14,0(x10) + 800021f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000001 + 800021f4: 00053803 ld x16,0(x10) + 800021f8: 00850513 addi x10,x10,8 + +00000000800021fc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001: + sm4ks x22, x14, x16, 0 # perform operation + 800021fc: 35070b33 sm4ks x22,x14,x16,0x0 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x8000000000000001_str) + 80002200: 0001b383 ld x7,0(x3) + 80002204: 01638c63 beq x7,x22,8000221c + 80002208: 7d10846f jal x8,8000b1d8 + 8000220c: 800021fc .word 0x800021fc + 80002210: 00000000 .word 0x00000000 + 80002214: 80015e15 .word 0x80015e15 + 80002218: 00000000 .word 0x00000000 + 8000221c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x0000000000000002 + 80002220: 00053703 ld x14,0(x10) + 80002224: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x7fffffffffffffff + 80002228: 00053203 ld x4,0(x10) + 8000222c: 00850513 addi x10,x10,8 + +0000000080002230 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff: + sm4ks x11, x14, x4, 0 # perform operation + 80002230: 344705b3 sm4ks x11,x14,x4,0x0 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7fffffffffffffff_str) + 80002234: 0001b383 ld x7,0(x3) + 80002238: 00b38c63 beq x7,x11,80002250 + 8000223c: 79d0846f jal x8,8000b1d8 + 80002240: 80002230 .word 0x80002230 + 80002244: 00000000 .word 0x00000000 + 80002248: 80015e77 .word 0x80015e77 + 8000224c: 00000000 .word 0x00000000 + 80002250: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0000000000000002 + 80002254: 00053683 ld x13,0(x10) + 80002258: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7ffffffffffffffe + 8000225c: 00053f83 ld x31,0(x10) + 80002260: 00850513 addi x10,x10,8 + +0000000080002264 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe: + sm4ks x1, x13, x31, 3 # perform operation + 80002264: f5f680b3 sm4ks x1,x13,x31,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x7ffffffffffffffe_str) + 80002268: 0001b383 ld x7,0(x3) + 8000226c: 00138c63 beq x7,x1,80002284 + 80002270: 7690846f jal x8,8000b1d8 + 80002274: 80002264 .word 0x80002264 + 80002278: 00000000 .word 0x00000000 + 8000227c: 80015ed9 .word 0x80015ed9 + 80002280: 00000000 .word 0x00000000 + 80002284: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x0000000000000002 + 80002288: 00053d83 ld x27,0(x10) + 8000228c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xffffffffffffffff + 80002290: 00053203 ld x4,0(x10) + 80002294: 00850513 addi x10,x10,8 + +0000000080002298 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff: + sm4ks x13, x27, x4, 0 # perform operation + 80002298: 344d86b3 sm4ks x13,x27,x4,0x0 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffffffffffff_str) + 8000229c: 0001b383 ld x7,0(x3) + 800022a0: 00d38c63 beq x7,x13,800022b8 + 800022a4: 7350846f jal x8,8000b1d8 + 800022a8: 80002298 .word 0x80002298 + 800022ac: 00000000 .word 0x00000000 + 800022b0: 80015f3b .word 0x80015f3b + 800022b4: 00000000 .word 0x00000000 + 800022b8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x0000000000000002 + 800022bc: 00053f03 ld x30,0(x10) + 800022c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xfffffffffffffffe + 800022c4: 00053b83 ld x23,0(x10) + 800022c8: 00850513 addi x10,x10,8 + +00000000800022cc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe: + sm4ks x19, x30, x23, 3 # perform operation + 800022cc: f57f09b3 sm4ks x19,x30,x23,0x3 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffffffffffe_str) + 800022d0: 0001b383 ld x7,0(x3) + 800022d4: 01338c63 beq x7,x19,800022ec + 800022d8: 7010846f jal x8,8000b1d8 + 800022dc: 800022cc .word 0x800022cc + 800022e0: 00000000 .word 0x00000000 + 800022e4: 80015f9d .word 0x80015f9d + 800022e8: 00000000 .word 0x00000000 + 800022ec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000000000002 + 800022f0: 00053c03 ld x24,0(x10) + 800022f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x5bbc887763ae86f2 + 800022f8: 00053e83 ld x29,0(x10) + 800022fc: 00850513 addi x10,x10,8 + +0000000080002300 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2: + sm4ks x9, x24, x29, 1 # perform operation + 80002300: 75dc04b3 sm4ks x9,x24,x29,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5bbc887763ae86f2_str) + 80002304: 0001b383 ld x7,0(x3) + 80002308: 00938c63 beq x7,x9,80002320 + 8000230c: 6cd0846f jal x8,8000b1d8 + 80002310: 80002300 .word 0x80002300 + 80002314: 00000000 .word 0x00000000 + 80002318: 80015fff .word 0x80015fff + 8000231c: 00000000 .word 0x00000000 + 80002320: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x0000000000000002 + 80002324: 00053583 ld x11,0(x10) + 80002328: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0xaaaaaaaaaaaaaaaa + 8000232c: 00053903 ld x18,0(x10) + 80002330: 00850513 addi x10,x10,8 + +0000000080002334 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x27, x11, x18, 3 # perform operation + 80002334: f5258db3 sm4ks x27,x11,x18,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002338: 0001b383 ld x7,0(x3) + 8000233c: 01b38c63 beq x7,x27,80002354 + 80002340: 6990846f jal x8,8000b1d8 + 80002344: 80002334 .word 0x80002334 + 80002348: 00000000 .word 0x00000000 + 8000234c: 80016061 .word 0x80016061 + 80002350: 00000000 .word 0x00000000 + 80002354: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000000000002 + 80002358: 00053903 ld x18,0(x10) + 8000235c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5555555555555555 + 80002360: 00053f83 ld x31,0(x10) + 80002364: 00850513 addi x10,x10,8 + +0000000080002368 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555: + sm4ks x1, x18, x31, 3 # perform operation + 80002368: f5f900b3 sm4ks x1,x18,x31,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x5555555555555555_str) + 8000236c: 0001b383 ld x7,0(x3) + 80002370: 00138c63 beq x7,x1,80002388 + 80002374: 6650846f jal x8,8000b1d8 + 80002378: 80002368 .word 0x80002368 + 8000237c: 00000000 .word 0x00000000 + 80002380: 800160c3 .word 0x800160c3 + 80002384: 00000000 .word 0x00000000 + 80002388: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000000000002 + 8000238c: 00053f83 ld x31,0(x10) + 80002390: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x00000000ffffffff + 80002394: 00053203 ld x4,0(x10) + 80002398: 00850513 addi x10,x10,8 + +000000008000239c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff: + sm4ks x20, x31, x4, 2 # perform operation + 8000239c: b44f8a33 sm4ks x20,x31,x4,0x2 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xffffffff_str) + 800023a0: 0001b383 ld x7,0(x3) + 800023a4: 01438c63 beq x7,x20,800023bc + 800023a8: 6310846f jal x8,8000b1d8 + 800023ac: 8000239c .word 0x8000239c + 800023b0: 00000000 .word 0x00000000 + 800023b4: 80016125 .word 0x80016125 + 800023b8: 00000000 .word 0x00000000 + 800023bc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x0000000000000002 + 800023c0: 00053a83 ld x21,0(x10) + 800023c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000fffffffe + 800023c8: 00053b83 ld x23,0(x10) + 800023cc: 00850513 addi x10,x10,8 + +00000000800023d0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe: + sm4ks x2, x21, x23, 1 # perform operation + 800023d0: 757a8133 sm4ks x2,x21,x23,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0xfffffffe_str) + 800023d4: 0001b383 ld x7,0(x3) + 800023d8: 00238c63 beq x7,x2,800023f0 + 800023dc: 5fd0846f jal x8,8000b1d8 + 800023e0: 800023d0 .word 0x800023d0 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 8001617f .word 0x8001617f + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 800023f4: 00053803 ld x16,0(x10) + 800023f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000100000000 + 800023fc: 00053f83 ld x31,0(x10) + 80002400: 00850513 addi x10,x10,8 + +0000000080002404 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000: + sm4ks x29, x16, x31, 0 # perform operation + 80002404: 35f80eb3 sm4ks x29,x16,x31,0x0 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000000_str) + 80002408: 0001b383 ld x7,0(x3) + 8000240c: 01d38c63 beq x7,x29,80002424 + 80002410: 5c90846f jal x8,8000b1d8 + 80002414: 80002404 .word 0x80002404 + 80002418: 00000000 .word 0x00000000 + 8000241c: 800161d9 .word 0x800161d9 + 80002420: 00000000 .word 0x00000000 + 80002424: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000000000002 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x0000000000000002 + 80002428: 00053b03 ld x22,0(x10) + 8000242c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000100000001 + 80002430: 00053783 ld x15,0(x10) + 80002434: 00850513 addi x10,x10,8 + +0000000080002438 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001: + sm4ks x12, x22, x15, 0 # perform operation + 80002438: 34fb0633 sm4ks x12,x22,x15,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x2_rs2val_0x100000001_str) + 8000243c: 0001b383 ld x7,0(x3) + 80002440: 00c38c63 beq x7,x12,80002458 + 80002444: 5950846f jal x8,8000b1d8 + 80002448: 80002438 .word 0x80002438 + 8000244c: 00000000 .word 0x00000000 + 80002450: 80016234 .word 0x80016234 + 80002454: 00000000 .word 0x00000000 + 80002458: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000000 + 8000245c: 00053f03 ld x30,0(x10) + 80002460: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000000 + 80002464: 00053703 ld x14,0(x10) + 80002468: 00850513 addi x10,x10,8 + +000000008000246c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0: + sm4ks x6, x30, x14, 1 # perform operation + 8000246c: 74ef0333 sm4ks x6,x30,x14,0x1 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x0_str) + 80002470: 0001b383 ld x7,0(x3) + 80002474: 00638c63 beq x7,x6,8000248c + 80002478: 5610846f jal x8,8000b1d8 + 8000247c: 8000246c .word 0x8000246c + 80002480: 00000000 .word 0x00000000 + 80002484: 8001628f .word 0x8001628f + 80002488: 00000000 .word 0x00000000 + 8000248c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x8000000000000000 + 80002490: 00053983 ld x19,0(x10) + 80002494: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000001 + 80002498: 00053b83 ld x23,0(x10) + 8000249c: 00850513 addi x10,x10,8 + +00000000800024a0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1: + sm4ks x15, x19, x23, 1 # perform operation + 800024a0: 757987b3 sm4ks x15,x19,x23,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x1_str) + 800024a4: 0001b383 ld x7,0(x3) + 800024a8: 00f38c63 beq x7,x15,800024c0 + 800024ac: 52d0846f jal x8,8000b1d8 + 800024b0: 800024a0 .word 0x800024a0 + 800024b4: 00000000 .word 0x00000000 + 800024b8: 800162f1 .word 0x800162f1 + 800024bc: 00000000 .word 0x00000000 + 800024c0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x8000000000000000 + 800024c4: 00053683 ld x13,0(x10) + 800024c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000002 + 800024cc: 00053a03 ld x20,0(x10) + 800024d0: 00850513 addi x10,x10,8 + +00000000800024d4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2: + sm4ks x28, x13, x20, 3 # perform operation + 800024d4: f5468e33 sm4ks x28,x13,x20,0x3 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x2_str) + 800024d8: 0001b383 ld x7,0(x3) + 800024dc: 01c38c63 beq x7,x28,800024f4 + 800024e0: 4f90846f jal x8,8000b1d8 + 800024e4: 800024d4 .word 0x800024d4 + 800024e8: 00000000 .word 0x00000000 + 800024ec: 80016353 .word 0x80016353 + 800024f0: 00000000 .word 0x00000000 + 800024f4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x8000000000000000 + 800024f8: 00053e03 ld x28,0(x10) + 800024fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x8000000000000000 + 80002500: 00053583 ld x11,0(x10) + 80002504: 00850513 addi x10,x10,8 + +0000000080002508 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000: + sm4ks x18, x28, x11, 1 # perform operation + 80002508: 74be0933 sm4ks x18,x28,x11,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000000_str) + 8000250c: 0001b383 ld x7,0(x3) + 80002510: 01238c63 beq x7,x18,80002528 + 80002514: 4c50846f jal x8,8000b1d8 + 80002518: 80002508 .word 0x80002508 + 8000251c: 00000000 .word 0x00000000 + 80002520: 800163b5 .word 0x800163b5 + 80002524: 00000000 .word 0x00000000 + 80002528: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x8000000000000000 + 8000252c: 00053703 ld x14,0(x10) + 80002530: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x8000000000000001 + 80002534: 00053483 ld x9,0(x10) + 80002538: 00850513 addi x10,x10,8 + +000000008000253c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001: + sm4ks x4, x14, x9, 0 # perform operation + 8000253c: 34970233 sm4ks x4,x14,x9,0x0 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x8000000000000001_str) + 80002540: 0001b383 ld x7,0(x3) + 80002544: 00438c63 beq x7,x4,8000255c + 80002548: 4910846f jal x8,8000b1d8 + 8000254c: 8000253c .word 0x8000253c + 80002550: 00000000 .word 0x00000000 + 80002554: 80016426 .word 0x80016426 + 80002558: 00000000 .word 0x00000000 + 8000255c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000000 + 80002560: 00053a83 ld x21,0(x10) + 80002564: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7fffffffffffffff + 80002568: 00053f83 ld x31,0(x10) + 8000256c: 00850513 addi x10,x10,8 + +0000000080002570 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff: + sm4ks x5, x21, x31, 2 # perform operation + 80002570: b5fa82b3 sm4ks x5,x21,x31,0x2 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7fffffffffffffff_str) + 80002574: 0001b383 ld x7,0(x3) + 80002578: 00538c63 beq x7,x5,80002590 + 8000257c: 45d0846f jal x8,8000b1d8 + 80002580: 80002570 .word 0x80002570 + 80002584: 00000000 .word 0x00000000 + 80002588: 80016497 .word 0x80016497 + 8000258c: 00000000 .word 0x00000000 + 80002590: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000000 + 80002594: 00053f83 ld x31,0(x10) + 80002598: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7ffffffffffffffe + 8000259c: 00053903 ld x18,0(x10) + 800025a0: 00850513 addi x10,x10,8 + +00000000800025a4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe: + sm4ks x13, x31, x18, 3 # perform operation + 800025a4: f52f86b3 sm4ks x13,x31,x18,0x3 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x7ffffffffffffffe_str) + 800025a8: 0001b383 ld x7,0(x3) + 800025ac: 00d38c63 beq x7,x13,800025c4 + 800025b0: 4290846f jal x8,8000b1d8 + 800025b4: 800025a4 .word 0x800025a4 + 800025b8: 00000000 .word 0x00000000 + 800025bc: 80016508 .word 0x80016508 + 800025c0: 00000000 .word 0x00000000 + 800025c4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000000 + 800025c8: 00053d03 ld x26,0(x10) + 800025cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 800025d0: 00053e03 ld x28,0(x10) + 800025d4: 00850513 addi x10,x10,8 + +00000000800025d8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff: + sm4ks x11, x26, x28, 0 # perform operation + 800025d8: 35cd05b3 sm4ks x11,x26,x28,0x0 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffffffffffff_str) + 800025dc: 0001b383 ld x7,0(x3) + 800025e0: 00b38c63 beq x7,x11,800025f8 + 800025e4: 3f50846f jal x8,8000b1d8 + 800025e8: 800025d8 .word 0x800025d8 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 80016579 .word 0x80016579 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x8000000000000000 + 800025fc: 00053e83 ld x29,0(x10) + 80002600: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffffffffffe + 80002604: 00053683 ld x13,0(x10) + 80002608: 00850513 addi x10,x10,8 + +000000008000260c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe: + sm4ks x1, x29, x13, 0 # perform operation + 8000260c: 34de80b3 sm4ks x1,x29,x13,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffffffffffe_str) + 80002610: 0001b383 ld x7,0(x3) + 80002614: 00138c63 beq x7,x1,8000262c + 80002618: 3c10846f jal x8,8000b1d8 + 8000261c: 8000260c .word 0x8000260c + 80002620: 00000000 .word 0x00000000 + 80002624: 800165ea .word 0x800165ea + 80002628: 00000000 .word 0x00000000 + 8000262c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000000 + 80002630: 00053603 ld x12,0(x10) + 80002634: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x5bbc887763ae86f2 + 80002638: 00053b83 ld x23,0(x10) + 8000263c: 00850513 addi x10,x10,8 + +0000000080002640 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2: + sm4ks x16, x12, x23, 0 # perform operation + 80002640: 35760833 sm4ks x16,x12,x23,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5bbc887763ae86f2_str) + 80002644: 0001b383 ld x7,0(x3) + 80002648: 01038c63 beq x7,x16,80002660 + 8000264c: 38d0846f jal x8,8000b1d8 + 80002650: 80002640 .word 0x80002640 + 80002654: 00000000 .word 0x00000000 + 80002658: 8001665b .word 0x8001665b + 8000265c: 00000000 .word 0x00000000 + 80002660: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000000 + 80002664: 00053603 ld x12,0(x10) + 80002668: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 8000266c: 00053c83 ld x25,0(x10) + 80002670: 00850513 addi x10,x10,8 + +0000000080002674 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x4, x12, x25, 2 # perform operation + 80002674: b5960233 sm4ks x4,x12,x25,0x2 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002678: 0001b383 ld x7,0(x3) + 8000267c: 00438c63 beq x7,x4,80002694 + 80002680: 3590846f jal x8,8000b1d8 + 80002684: 80002674 .word 0x80002674 + 80002688: 00000000 .word 0x00000000 + 8000268c: 800166cc .word 0x800166cc + 80002690: 00000000 .word 0x00000000 + 80002694: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000000 + 80002698: 00053a03 ld x20,0(x10) + 8000269c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x5555555555555555 + 800026a0: 00053603 ld x12,0(x10) + 800026a4: 00850513 addi x10,x10,8 + +00000000800026a8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555: + sm4ks x31, x20, x12, 3 # perform operation + 800026a8: f4ca0fb3 sm4ks x31,x20,x12,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x5555555555555555_str) + 800026ac: 0001b383 ld x7,0(x3) + 800026b0: 01f38c63 beq x7,x31,800026c8 + 800026b4: 3250846f jal x8,8000b1d8 + 800026b8: 800026a8 .word 0x800026a8 + 800026bc: 00000000 .word 0x00000000 + 800026c0: 8001673d .word 0x8001673d + 800026c4: 00000000 .word 0x00000000 + 800026c8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x8000000000000000 + 800026cc: 00053b83 ld x23,0(x10) + 800026d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000ffffffff + 800026d4: 00053983 ld x19,0(x10) + 800026d8: 00850513 addi x10,x10,8 + +00000000800026dc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff: + sm4ks x6, x23, x19, 0 # perform operation + 800026dc: 353b8333 sm4ks x6,x23,x19,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xffffffff_str) + 800026e0: 0001b383 ld x7,0(x3) + 800026e4: 00638c63 beq x7,x6,800026fc + 800026e8: 2f10846f jal x8,8000b1d8 + 800026ec: 800026dc .word 0x800026dc + 800026f0: 00000000 .word 0x00000000 + 800026f4: 800167ae .word 0x800167ae + 800026f8: 00000000 .word 0x00000000 + 800026fc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x8000000000000000 + 80002700: 00053603 ld x12,0(x10) + 80002704: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000000fffffffe + 80002708: 00053803 ld x16,0(x10) + 8000270c: 00850513 addi x10,x10,8 + +0000000080002710 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe: + sm4ks x30, x12, x16, 3 # perform operation + 80002710: f5060f33 sm4ks x30,x12,x16,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0xfffffffe_str) + 80002714: 0001b383 ld x7,0(x3) + 80002718: 01e38c63 beq x7,x30,80002730 + 8000271c: 2bd0846f jal x8,8000b1d8 + 80002720: 80002710 .word 0x80002710 + 80002724: 00000000 .word 0x00000000 + 80002728: 80016817 .word 0x80016817 + 8000272c: 00000000 .word 0x00000000 + 80002730: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x8000000000000000 + 80002734: 00053103 ld x2,0(x10) + 80002738: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000100000000 + 8000273c: 00053a03 ld x20,0(x10) + 80002740: 00850513 addi x10,x10,8 + +0000000080002744 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000: + sm4ks x17, x2, x20, 3 # perform operation + 80002744: f54108b3 sm4ks x17,x2,x20,0x3 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000000_str) + 80002748: 0001b383 ld x7,0(x3) + 8000274c: 01138c63 beq x7,x17,80002764 + 80002750: 2890846f jal x8,8000b1d8 + 80002754: 80002744 .word 0x80002744 + 80002758: 00000000 .word 0x00000000 + 8000275c: 80016880 .word 0x80016880 + 80002760: 00000000 .word 0x00000000 + 80002764: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x8000000000000000 + 80002768: 00053e03 ld x28,0(x10) + 8000276c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x0000000100000001 + 80002770: 00053603 ld x12,0(x10) + 80002774: 00850513 addi x10,x10,8 + +0000000080002778 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001: + sm4ks x9, x28, x12, 2 # perform operation + 80002778: b4ce04b3 sm4ks x9,x28,x12,0x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000000_rs2val_0x100000001_str) + 8000277c: 0001b383 ld x7,0(x3) + 80002780: 00938c63 beq x7,x9,80002798 + 80002784: 2550846f jal x8,8000b1d8 + 80002788: 80002778 .word 0x80002778 + 8000278c: 00000000 .word 0x00000000 + 80002790: 800168ea .word 0x800168ea + 80002794: 00000000 .word 0x00000000 + 80002798: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000001 + 8000279c: 00053f03 ld x30,0(x10) + 800027a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000000 + 800027a4: 00053f83 ld x31,0(x10) + 800027a8: 00850513 addi x10,x10,8 + +00000000800027ac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0: + sm4ks x18, x30, x31, 3 # perform operation + 800027ac: f5ff0933 sm4ks x18,x30,x31,0x3 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x0_str) + 800027b0: 0001b383 ld x7,0(x3) + 800027b4: 01238c63 beq x7,x18,800027cc + 800027b8: 2210846f jal x8,8000b1d8 + 800027bc: 800027ac .word 0x800027ac + 800027c0: 00000000 .word 0x00000000 + 800027c4: 80016954 .word 0x80016954 + 800027c8: 00000000 .word 0x00000000 + 800027cc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8000000000000001 + 800027d0: 00053783 ld x15,0(x10) + 800027d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000000000001 + 800027d8: 00053e83 ld x29,0(x10) + 800027dc: 00850513 addi x10,x10,8 + +00000000800027e0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1: + sm4ks x21, x15, x29, 2 # perform operation + 800027e0: b5d78ab3 sm4ks x21,x15,x29,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x1_str) + 800027e4: 0001b383 ld x7,0(x3) + 800027e8: 01538c63 beq x7,x21,80002800 + 800027ec: 1ed0846f jal x8,8000b1d8 + 800027f0: 800027e0 .word 0x800027e0 + 800027f4: 00000000 .word 0x00000000 + 800027f8: 800169b6 .word 0x800169b6 + 800027fc: 00000000 .word 0x00000000 + 80002800: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x8000000000000001 + 80002804: 00053d03 ld x26,0(x10) + 80002808: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000002 + 8000280c: 00053c03 ld x24,0(x10) + 80002810: 00850513 addi x10,x10,8 + +0000000080002814 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2: + sm4ks x31, x26, x24, 1 # perform operation + 80002814: 758d0fb3 sm4ks x31,x26,x24,0x1 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x2_str) + 80002818: 0001b383 ld x7,0(x3) + 8000281c: 01f38c63 beq x7,x31,80002834 + 80002820: 1b90846f jal x8,8000b1d8 + 80002824: 80002814 .word 0x80002814 + 80002828: 00000000 .word 0x00000000 + 8000282c: 80016a18 .word 0x80016a18 + 80002830: 00000000 .word 0x00000000 + 80002834: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000001 + 80002838: 00053f03 ld x30,0(x10) + 8000283c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000000 + 80002840: 00053d03 ld x26,0(x10) + 80002844: 00850513 addi x10,x10,8 + +0000000080002848 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000: + sm4ks x18, x30, x26, 0 # perform operation + 80002848: 35af0933 sm4ks x18,x30,x26,0x0 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000000_str) + 8000284c: 0001b383 ld x7,0(x3) + 80002850: 01238c63 beq x7,x18,80002868 + 80002854: 1850846f jal x8,8000b1d8 + 80002858: 80002848 .word 0x80002848 + 8000285c: 00000000 .word 0x00000000 + 80002860: 80016a7a .word 0x80016a7a + 80002864: 00000000 .word 0x00000000 + 80002868: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000001 + 8000286c: 00053a83 ld x21,0(x10) + 80002870: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x8000000000000001 + 80002874: 00053703 ld x14,0(x10) + 80002878: 00850513 addi x10,x10,8 + +000000008000287c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001: + sm4ks x20, x21, x14, 0 # perform operation + 8000287c: 34ea8a33 sm4ks x20,x21,x14,0x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x8000000000000001_str) + 80002880: 0001b383 ld x7,0(x3) + 80002884: 01438c63 beq x7,x20,8000289c + 80002888: 1510846f jal x8,8000b1d8 + 8000288c: 8000287c .word 0x8000287c + 80002890: 00000000 .word 0x00000000 + 80002894: 80016aeb .word 0x80016aeb + 80002898: 00000000 .word 0x00000000 + 8000289c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x8000000000000001 + 800028a0: 00053583 ld x11,0(x10) + 800028a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffffffffffff + 800028a8: 00053d83 ld x27,0(x10) + 800028ac: 00850513 addi x10,x10,8 + +00000000800028b0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff: + sm4ks x21, x11, x27, 2 # perform operation + 800028b0: b5b58ab3 sm4ks x21,x11,x27,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7fffffffffffffff_str) + 800028b4: 0001b383 ld x7,0(x3) + 800028b8: 01538c63 beq x7,x21,800028d0 + 800028bc: 11d0846f jal x8,8000b1d8 + 800028c0: 800028b0 .word 0x800028b0 + 800028c4: 00000000 .word 0x00000000 + 800028c8: 80016b5c .word 0x80016b5c + 800028cc: 00000000 .word 0x00000000 + 800028d0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x8000000000000001 + 800028d4: 00053d83 ld x27,0(x10) + 800028d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x7ffffffffffffffe + 800028dc: 00053683 ld x13,0(x10) + 800028e0: 00850513 addi x10,x10,8 + +00000000800028e4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe: + sm4ks x23, x27, x13, 2 # perform operation + 800028e4: b4dd8bb3 sm4ks x23,x27,x13,0x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x7ffffffffffffffe_str) + 800028e8: 0001b383 ld x7,0(x3) + 800028ec: 01738c63 beq x7,x23,80002904 + 800028f0: 0e90846f jal x8,8000b1d8 + 800028f4: 800028e4 .word 0x800028e4 + 800028f8: 00000000 .word 0x00000000 + 800028fc: 80016bcd .word 0x80016bcd + 80002900: 00000000 .word 0x00000000 + 80002904: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x8000000000000001 + 80002908: 00053f03 ld x30,0(x10) + 8000290c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xffffffffffffffff + 80002910: 00053e03 ld x28,0(x10) + 80002914: 00850513 addi x10,x10,8 + +0000000080002918 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff: + sm4ks x2, x30, x28, 2 # perform operation + 80002918: b5cf0133 sm4ks x2,x30,x28,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffffffffffff_str) + 8000291c: 0001b383 ld x7,0(x3) + 80002920: 00238c63 beq x7,x2,80002938 + 80002924: 0b50846f jal x8,8000b1d8 + 80002928: 80002918 .word 0x80002918 + 8000292c: 00000000 .word 0x00000000 + 80002930: 80016c3e .word 0x80016c3e + 80002934: 00000000 .word 0x00000000 + 80002938: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x8000000000000001 + 8000293c: 00053c03 ld x24,0(x10) + 80002940: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0xfffffffffffffffe + 80002944: 00053983 ld x19,0(x10) + 80002948: 00850513 addi x10,x10,8 + +000000008000294c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe: + sm4ks x31, x24, x19, 1 # perform operation + 8000294c: 753c0fb3 sm4ks x31,x24,x19,0x1 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffffffffffe_str) + 80002950: 0001b383 ld x7,0(x3) + 80002954: 01f38c63 beq x7,x31,8000296c + 80002958: 0810846f jal x8,8000b1d8 + 8000295c: 8000294c .word 0x8000294c + 80002960: 00000000 .word 0x00000000 + 80002964: 80016caf .word 0x80016caf + 80002968: 00000000 .word 0x00000000 + 8000296c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x8000000000000001 + 80002970: 00053783 ld x15,0(x10) + 80002974: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 80002978: 00053903 ld x18,0(x10) + 8000297c: 00850513 addi x10,x10,8 + +0000000080002980 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2: + sm4ks x16, x15, x18, 0 # perform operation + 80002980: 35278833 sm4ks x16,x15,x18,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5bbc887763ae86f2_str) + 80002984: 0001b383 ld x7,0(x3) + 80002988: 01038c63 beq x7,x16,800029a0 + 8000298c: 04d0846f jal x8,8000b1d8 + 80002990: 80002980 .word 0x80002980 + 80002994: 00000000 .word 0x00000000 + 80002998: 80016d20 .word 0x80016d20 + 8000299c: 00000000 .word 0x00000000 + 800029a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x8000000000000001 + 800029a4: 00053903 ld x18,0(x10) + 800029a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0xaaaaaaaaaaaaaaaa + 800029ac: 00053803 ld x16,0(x10) + 800029b0: 00850513 addi x10,x10,8 + +00000000800029b4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x13, x18, x16, 2 # perform operation + 800029b4: b50906b3 sm4ks x13,x18,x16,0x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800029b8: 0001b383 ld x7,0(x3) + 800029bc: 00d38c63 beq x7,x13,800029d4 + 800029c0: 0190846f jal x8,8000b1d8 + 800029c4: 800029b4 .word 0x800029b4 + 800029c8: 00000000 .word 0x00000000 + 800029cc: 80016d91 .word 0x80016d91 + 800029d0: 00000000 .word 0x00000000 + 800029d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x8000000000000001 + 800029d8: 00053f83 ld x31,0(x10) + 800029dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x5555555555555555 + 800029e0: 00053f03 ld x30,0(x10) + 800029e4: 00850513 addi x10,x10,8 + +00000000800029e8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555: + sm4ks x1, x31, x30, 0 # perform operation + 800029e8: 35ef80b3 sm4ks x1,x31,x30,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x5555555555555555_str) + 800029ec: 0001b383 ld x7,0(x3) + 800029f0: 00138c63 beq x7,x1,80002a08 + 800029f4: 7e40846f jal x8,8000b1d8 + 800029f8: 800029e8 .word 0x800029e8 + 800029fc: 00000000 .word 0x00000000 + 80002a00: 80016e02 .word 0x80016e02 + 80002a04: 00000000 .word 0x00000000 + 80002a08: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000001 + 80002a0c: 00053a83 ld x21,0(x10) + 80002a10: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x00000000ffffffff + 80002a14: 00053e03 ld x28,0(x10) + 80002a18: 00850513 addi x10,x10,8 + +0000000080002a1c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff: + sm4ks x6, x21, x28, 2 # perform operation + 80002a1c: b5ca8333 sm4ks x6,x21,x28,0x2 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xffffffff_str) + 80002a20: 0001b383 ld x7,0(x3) + 80002a24: 00638c63 beq x7,x6,80002a3c + 80002a28: 7b00846f jal x8,8000b1d8 + 80002a2c: 80002a1c .word 0x80002a1c + 80002a30: 00000000 .word 0x00000000 + 80002a34: 80016e73 .word 0x80016e73 + 80002a38: 00000000 .word 0x00000000 + 80002a3c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x8000000000000001 + 80002a40: 00053c83 ld x25,0(x10) + 80002a44: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000000fffffffe + 80002a48: 00053b03 ld x22,0(x10) + 80002a4c: 00850513 addi x10,x10,8 + +0000000080002a50 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe: + sm4ks x27, x25, x22, 1 # perform operation + 80002a50: 756c8db3 sm4ks x27,x25,x22,0x1 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0xfffffffe_str) + 80002a54: 0001b383 ld x7,0(x3) + 80002a58: 01b38c63 beq x7,x27,80002a70 + 80002a5c: 77c0846f jal x8,8000b1d8 + 80002a60: 80002a50 .word 0x80002a50 + 80002a64: 00000000 .word 0x00000000 + 80002a68: 80016edc .word 0x80016edc + 80002a6c: 00000000 .word 0x00000000 + 80002a70: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x8000000000000001 + 80002a74: 00053a83 ld x21,0(x10) + 80002a78: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000100000000 + 80002a7c: 00053983 ld x19,0(x10) + 80002a80: 00850513 addi x10,x10,8 + +0000000080002a84 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000: + sm4ks x2, x21, x19, 1 # perform operation + 80002a84: 753a8133 sm4ks x2,x21,x19,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000000_str) + 80002a88: 0001b383 ld x7,0(x3) + 80002a8c: 00238c63 beq x7,x2,80002aa4 + 80002a90: 7480846f jal x8,8000b1d8 + 80002a94: 80002a84 .word 0x80002a84 + 80002a98: 00000000 .word 0x00000000 + 80002a9c: 80016f45 .word 0x80016f45 + 80002aa0: 00000000 .word 0x00000000 + 80002aa4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x8000000000000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x8000000000000001 + 80002aa8: 00053a03 ld x20,0(x10) + 80002aac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000100000001 + 80002ab0: 00053803 ld x16,0(x10) + 80002ab4: 00850513 addi x10,x10,8 + +0000000080002ab8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001: + sm4ks x30, x20, x16, 2 # perform operation + 80002ab8: b50a0f33 sm4ks x30,x20,x16,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x8000000000000001_rs2val_0x100000001_str) + 80002abc: 0001b383 ld x7,0(x3) + 80002ac0: 01e38c63 beq x7,x30,80002ad8 + 80002ac4: 7140846f jal x8,8000b1d8 + 80002ac8: 80002ab8 .word 0x80002ab8 + 80002acc: 00000000 .word 0x00000000 + 80002ad0: 80016faf .word 0x80016faf + 80002ad4: 00000000 .word 0x00000000 + 80002ad8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x7fffffffffffffff + 80002adc: 00053a03 ld x20,0(x10) + 80002ae0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs2: x15 = 0x0000000000000000 + 80002ae4: 00053783 ld x15,0(x10) + 80002ae8: 00850513 addi x10,x10,8 + +0000000080002aec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0: + sm4ks x9, x20, x15, 3 # perform operation + 80002aec: f4fa04b3 sm4ks x9,x20,x15,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x0_str) + 80002af0: 0001b383 ld x7,0(x3) + 80002af4: 00938c63 beq x7,x9,80002b0c + 80002af8: 6e00846f jal x8,8000b1d8 + 80002afc: 80002aec .word 0x80002aec + 80002b00: 00000000 .word 0x00000000 + 80002b04: 80017019 .word 0x80017019 + 80002b08: 00000000 .word 0x00000000 + 80002b0c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7fffffffffffffff + 80002b10: 00053b83 ld x23,0(x10) + 80002b14: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x0000000000000001 + 80002b18: 00053283 ld x5,0(x10) + 80002b1c: 00850513 addi x10,x10,8 + +0000000080002b20 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1: + sm4ks x18, x23, x5, 1 # perform operation + 80002b20: 745b8933 sm4ks x18,x23,x5,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x1_str) + 80002b24: 0001b383 ld x7,0(x3) + 80002b28: 01238c63 beq x7,x18,80002b40 + 80002b2c: 6ac0846f jal x8,8000b1d8 + 80002b30: 80002b20 .word 0x80002b20 + 80002b34: 00000000 .word 0x00000000 + 80002b38: 8001707b .word 0x8001707b + 80002b3c: 00000000 .word 0x00000000 + 80002b40: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002b44: 00053a83 ld x21,0(x10) + 80002b48: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000000000002 + 80002b4c: 00053203 ld x4,0(x10) + 80002b50: 00850513 addi x10,x10,8 + +0000000080002b54 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2: + sm4ks x6, x21, x4, 3 # perform operation + 80002b54: f44a8333 sm4ks x6,x21,x4,0x3 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x2_str) + 80002b58: 0001b383 ld x7,0(x3) + 80002b5c: 00638c63 beq x7,x6,80002b74 + 80002b60: 6780846f jal x8,8000b1d8 + 80002b64: 80002b54 .word 0x80002b54 + 80002b68: 00000000 .word 0x00000000 + 80002b6c: 800170dd .word 0x800170dd + 80002b70: 00000000 .word 0x00000000 + 80002b74: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7fffffffffffffff + 80002b78: 00053c03 ld x24,0(x10) + 80002b7c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000000 + 80002b80: 00053883 ld x17,0(x10) + 80002b84: 00850513 addi x10,x10,8 + +0000000080002b88 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000: + sm4ks x1, x24, x17, 1 # perform operation + 80002b88: 751c00b3 sm4ks x1,x24,x17,0x1 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000000_str) + 80002b8c: 0001b383 ld x7,0(x3) + 80002b90: 00138c63 beq x7,x1,80002ba8 + 80002b94: 6440846f jal x8,8000b1d8 + 80002b98: 80002b88 .word 0x80002b88 + 80002b9c: 00000000 .word 0x00000000 + 80002ba0: 8001713f .word 0x8001713f + 80002ba4: 00000000 .word 0x00000000 + 80002ba8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002bac: 00053a83 ld x21,0(x10) + 80002bb0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80002bb4: 00053303 ld x6,0(x10) + 80002bb8: 00850513 addi x10,x10,8 + +0000000080002bbc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001: + sm4ks x24, x21, x6, 0 # perform operation + 80002bbc: 346a8c33 sm4ks x24,x21,x6,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x8000000000000001_str) + 80002bc0: 0001b383 ld x7,0(x3) + 80002bc4: 01838c63 beq x7,x24,80002bdc + 80002bc8: 6100846f jal x8,8000b1d8 + 80002bcc: 80002bbc .word 0x80002bbc + 80002bd0: 00000000 .word 0x00000000 + 80002bd4: 800171b0 .word 0x800171b0 + 80002bd8: 00000000 .word 0x00000000 + 80002bdc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002be0: 00053f03 ld x30,0(x10) + 80002be4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7fffffffffffffff + 80002be8: 00053903 ld x18,0(x10) + 80002bec: 00850513 addi x10,x10,8 + +0000000080002bf0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff: + sm4ks x13, x30, x18, 3 # perform operation + 80002bf0: f52f06b3 sm4ks x13,x30,x18,0x3 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80002bf4: 0001b383 ld x7,0(x3) + 80002bf8: 00d38c63 beq x7,x13,80002c10 + 80002bfc: 5dc0846f jal x8,8000b1d8 + 80002c00: 80002bf0 .word 0x80002bf0 + 80002c04: 00000000 .word 0x00000000 + 80002c08: 80017221 .word 0x80017221 + 80002c0c: 00000000 .word 0x00000000 + 80002c10: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x7fffffffffffffff + 80002c14: 00053803 ld x16,0(x10) + 80002c18: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80002c1c: 00053083 ld x1,0(x10) + 80002c20: 00850513 addi x10,x10,8 + +0000000080002c24 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe: + sm4ks x29, x16, x1, 3 # perform operation + 80002c24: f4180eb3 sm4ks x29,x16,x1,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 80002c28: 0001b383 ld x7,0(x3) + 80002c2c: 01d38c63 beq x7,x29,80002c44 + 80002c30: 5a80846f jal x8,8000b1d8 + 80002c34: 80002c24 .word 0x80002c24 + 80002c38: 00000000 .word 0x00000000 + 80002c3c: 80017292 .word 0x80017292 + 80002c40: 00000000 .word 0x00000000 + 80002c44: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7fffffffffffffff + 80002c48: 00053c83 ld x25,0(x10) + 80002c4c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 80002c50: 00053b03 ld x22,0(x10) + 80002c54: 00850513 addi x10,x10,8 + +0000000080002c58 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff: + sm4ks x18, x25, x22, 2 # perform operation + 80002c58: b56c8933 sm4ks x18,x25,x22,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffffffffffff_str) + 80002c5c: 0001b383 ld x7,0(x3) + 80002c60: 01238c63 beq x7,x18,80002c78 + 80002c64: 5740846f jal x8,8000b1d8 + 80002c68: 80002c58 .word 0x80002c58 + 80002c6c: 00000000 .word 0x00000000 + 80002c70: 80017303 .word 0x80017303 + 80002c74: 00000000 .word 0x00000000 + 80002c78: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7fffffffffffffff + 80002c7c: 00053703 ld x14,0(x10) + 80002c80: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0xfffffffffffffffe + 80002c84: 00053603 ld x12,0(x10) + 80002c88: 00850513 addi x10,x10,8 + +0000000080002c8c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe: + sm4ks x29, x14, x12, 0 # perform operation + 80002c8c: 34c70eb3 sm4ks x29,x14,x12,0x0 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80002c90: 0001b383 ld x7,0(x3) + 80002c94: 01d38c63 beq x7,x29,80002cac + 80002c98: 5400846f jal x8,8000b1d8 + 80002c9c: 80002c8c .word 0x80002c8c + 80002ca0: 00000000 .word 0x00000000 + 80002ca4: 80017374 .word 0x80017374 + 80002ca8: 00000000 .word 0x00000000 + 80002cac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x7fffffffffffffff + 80002cb0: 00053483 ld x9,0(x10) + 80002cb4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5bbc887763ae86f2 + 80002cb8: 00053303 ld x6,0(x10) + 80002cbc: 00850513 addi x10,x10,8 + +0000000080002cc0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2: + sm4ks x11, x9, x6, 3 # perform operation + 80002cc0: f46485b3 sm4ks x11,x9,x6,0x3 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80002cc4: 0001b383 ld x7,0(x3) + 80002cc8: 00b38c63 beq x7,x11,80002ce0 + 80002ccc: 50c0846f jal x8,8000b1d8 + 80002cd0: 80002cc0 .word 0x80002cc0 + 80002cd4: 00000000 .word 0x00000000 + 80002cd8: 800173e5 .word 0x800173e5 + 80002cdc: 00000000 .word 0x00000000 + 80002ce0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7fffffffffffffff + 80002ce4: 00053103 ld x2,0(x10) + 80002ce8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 80002cec: 00053c03 ld x24,0(x10) + 80002cf0: 00850513 addi x10,x10,8 + +0000000080002cf4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x30, x2, x24, 1 # perform operation + 80002cf4: 75810f33 sm4ks x30,x2,x24,0x1 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80002cf8: 0001b383 ld x7,0(x3) + 80002cfc: 01e38c63 beq x7,x30,80002d14 + 80002d00: 4d80846f jal x8,8000b1d8 + 80002d04: 80002cf4 .word 0x80002cf4 + 80002d08: 00000000 .word 0x00000000 + 80002d0c: 80017456 .word 0x80017456 + 80002d10: 00000000 .word 0x00000000 + 80002d14: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002d18: 00053a83 ld x21,0(x10) + 80002d1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x5555555555555555 + 80002d20: 00053283 ld x5,0(x10) + 80002d24: 00850513 addi x10,x10,8 + +0000000080002d28 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555: + sm4ks x9, x21, x5, 2 # perform operation + 80002d28: b45a84b3 sm4ks x9,x21,x5,0x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x5555555555555555_str) + 80002d2c: 0001b383 ld x7,0(x3) + 80002d30: 00938c63 beq x7,x9,80002d48 + 80002d34: 4a40846f jal x8,8000b1d8 + 80002d38: 80002d28 .word 0x80002d28 + 80002d3c: 00000000 .word 0x00000000 + 80002d40: 800174c7 .word 0x800174c7 + 80002d44: 00000000 .word 0x00000000 + 80002d48: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7fffffffffffffff + 80002d4c: 00053f83 ld x31,0(x10) + 80002d50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000000ffffffff + 80002d54: 00053a03 ld x20,0(x10) + 80002d58: 00850513 addi x10,x10,8 + +0000000080002d5c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff: + sm4ks x9, x31, x20, 1 # perform operation + 80002d5c: 754f84b3 sm4ks x9,x31,x20,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xffffffff_str) + 80002d60: 0001b383 ld x7,0(x3) + 80002d64: 00938c63 beq x7,x9,80002d7c + 80002d68: 4700846f jal x8,8000b1d8 + 80002d6c: 80002d5c .word 0x80002d5c + 80002d70: 00000000 .word 0x00000000 + 80002d74: 80017538 .word 0x80017538 + 80002d78: 00000000 .word 0x00000000 + 80002d7c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x7fffffffffffffff + 80002d80: 00053f03 ld x30,0(x10) + 80002d84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x00000000fffffffe + 80002d88: 00053803 ld x16,0(x10) + 80002d8c: 00850513 addi x10,x10,8 + +0000000080002d90 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe: + sm4ks x1, x30, x16, 0 # perform operation + 80002d90: 350f00b3 sm4ks x1,x30,x16,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0xfffffffe_str) + 80002d94: 0001b383 ld x7,0(x3) + 80002d98: 00138c63 beq x7,x1,80002db0 + 80002d9c: 43c0846f jal x8,8000b1d8 + 80002da0: 80002d90 .word 0x80002d90 + 80002da4: 00000000 .word 0x00000000 + 80002da8: 800175a1 .word 0x800175a1 + 80002dac: 00000000 .word 0x00000000 + 80002db0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x7fffffffffffffff + 80002db4: 00053a83 ld x21,0(x10) + 80002db8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x0000000100000000 + 80002dbc: 00053f03 ld x30,0(x10) + 80002dc0: 00850513 addi x10,x10,8 + +0000000080002dc4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000: + sm4ks x23, x21, x30, 3 # perform operation + 80002dc4: f5ea8bb3 sm4ks x23,x21,x30,0x3 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000000_str) + 80002dc8: 0001b383 ld x7,0(x3) + 80002dcc: 01738c63 beq x7,x23,80002de4 + 80002dd0: 4080846f jal x8,8000b1d8 + 80002dd4: 80002dc4 .word 0x80002dc4 + 80002dd8: 00000000 .word 0x00000000 + 80002ddc: 8001760a .word 0x8001760a + 80002de0: 00000000 .word 0x00000000 + 80002de4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7fffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x7fffffffffffffff + 80002de8: 00053083 ld x1,0(x10) + 80002dec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000100000001 + 80002df0: 00053983 ld x19,0(x10) + 80002df4: 00850513 addi x10,x10,8 + +0000000080002df8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001: + sm4ks x27, x1, x19, 3 # perform operation + 80002df8: f5308db3 sm4ks x27,x1,x19,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7fffffffffffffff_rs2val_0x100000001_str) + 80002dfc: 0001b383 ld x7,0(x3) + 80002e00: 01b38c63 beq x7,x27,80002e18 + 80002e04: 3d40846f jal x8,8000b1d8 + 80002e08: 80002df8 .word 0x80002df8 + 80002e0c: 00000000 .word 0x00000000 + 80002e10: 80017674 .word 0x80017674 + 80002e14: 00000000 .word 0x00000000 + 80002e18: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002e1c: 00053f83 ld x31,0(x10) + 80002e20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000000 + 80002e24: 00053103 ld x2,0(x10) + 80002e28: 00850513 addi x10,x10,8 + +0000000080002e2c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0: + sm4ks x6, x31, x2, 0 # perform operation + 80002e2c: 342f8333 sm4ks x6,x31,x2,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x0_str) + 80002e30: 0001b383 ld x7,0(x3) + 80002e34: 00638c63 beq x7,x6,80002e4c + 80002e38: 3a00846f jal x8,8000b1d8 + 80002e3c: 80002e2c .word 0x80002e2c + 80002e40: 00000000 .word 0x00000000 + 80002e44: 800176de .word 0x800176de + 80002e48: 00000000 .word 0x00000000 + 80002e4c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 80002e50: 00053703 ld x14,0(x10) + 80002e54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000001 + 80002e58: 00053a03 ld x20,0(x10) + 80002e5c: 00850513 addi x10,x10,8 + +0000000080002e60 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1: + sm4ks x30, x14, x20, 2 # perform operation + 80002e60: b5470f33 sm4ks x30,x14,x20,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x1_str) + 80002e64: 0001b383 ld x7,0(x3) + 80002e68: 01e38c63 beq x7,x30,80002e80 + 80002e6c: 36c0846f jal x8,8000b1d8 + 80002e70: 80002e60 .word 0x80002e60 + 80002e74: 00000000 .word 0x00000000 + 80002e78: 80017740 .word 0x80017740 + 80002e7c: 00000000 .word 0x00000000 + 80002e80: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002e84: 00053f83 ld x31,0(x10) + 80002e88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 80002e8c: 00053903 ld x18,0(x10) + 80002e90: 00850513 addi x10,x10,8 + +0000000080002e94 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2: + sm4ks x11, x31, x18, 2 # perform operation + 80002e94: b52f85b3 sm4ks x11,x31,x18,0x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x2_str) + 80002e98: 0001b383 ld x7,0(x3) + 80002e9c: 00b38c63 beq x7,x11,80002eb4 + 80002ea0: 3380846f jal x8,8000b1d8 + 80002ea4: 80002e94 .word 0x80002e94 + 80002ea8: 00000000 .word 0x00000000 + 80002eac: 800177a2 .word 0x800177a2 + 80002eb0: 00000000 .word 0x00000000 + 80002eb4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80002eb8: 00053f83 ld x31,0(x10) + 80002ebc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x8000000000000000 + 80002ec0: 00053983 ld x19,0(x10) + 80002ec4: 00850513 addi x10,x10,8 + +0000000080002ec8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000: + sm4ks x1, x31, x19, 3 # perform operation + 80002ec8: f53f80b3 sm4ks x1,x31,x19,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000000_str) + 80002ecc: 0001b383 ld x7,0(x3) + 80002ed0: 00138c63 beq x7,x1,80002ee8 + 80002ed4: 3040846f jal x8,8000b1d8 + 80002ed8: 80002ec8 .word 0x80002ec8 + 80002edc: 00000000 .word 0x00000000 + 80002ee0: 80017804 .word 0x80017804 + 80002ee4: 00000000 .word 0x00000000 + 80002ee8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x7ffffffffffffffe + 80002eec: 00053583 ld x11,0(x10) + 80002ef0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x8000000000000001 + 80002ef4: 00053d03 ld x26,0(x10) + 80002ef8: 00850513 addi x10,x10,8 + +0000000080002efc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001: + sm4ks x12, x11, x26, 2 # perform operation + 80002efc: b5a58633 sm4ks x12,x11,x26,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x8000000000000001_str) + 80002f00: 0001b383 ld x7,0(x3) + 80002f04: 00c38c63 beq x7,x12,80002f1c + 80002f08: 2d00846f jal x8,8000b1d8 + 80002f0c: 80002efc .word 0x80002efc + 80002f10: 00000000 .word 0x00000000 + 80002f14: 80017875 .word 0x80017875 + 80002f18: 00000000 .word 0x00000000 + 80002f1c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80002f20: 00053d03 ld x26,0(x10) + 80002f24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7fffffffffffffff + 80002f28: 00053083 ld x1,0(x10) + 80002f2c: 00850513 addi x10,x10,8 + +0000000080002f30 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff: + sm4ks x22, x26, x1, 1 # perform operation + 80002f30: 741d0b33 sm4ks x22,x26,x1,0x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 80002f34: 0001b383 ld x7,0(x3) + 80002f38: 01638c63 beq x7,x22,80002f50 + 80002f3c: 29c0846f jal x8,8000b1d8 + 80002f40: 80002f30 .word 0x80002f30 + 80002f44: 00000000 .word 0x00000000 + 80002f48: 800178e6 .word 0x800178e6 + 80002f4c: 00000000 .word 0x00000000 + 80002f50: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x7ffffffffffffffe + 80002f54: 00053e03 ld x28,0(x10) + 80002f58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7ffffffffffffffe + 80002f5c: 00053083 ld x1,0(x10) + 80002f60: 00850513 addi x10,x10,8 + +0000000080002f64 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe: + sm4ks x23, x28, x1, 3 # perform operation + 80002f64: f41e0bb3 sm4ks x23,x28,x1,0x3 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 80002f68: 0001b383 ld x7,0(x3) + 80002f6c: 01738c63 beq x7,x23,80002f84 + 80002f70: 2680846f jal x8,8000b1d8 + 80002f74: 80002f64 .word 0x80002f64 + 80002f78: 00000000 .word 0x00000000 + 80002f7c: 80017957 .word 0x80017957 + 80002f80: 00000000 .word 0x00000000 + 80002f84: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x7ffffffffffffffe + 80002f88: 00053103 ld x2,0(x10) + 80002f8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xffffffffffffffff + 80002f90: 00053283 ld x5,0(x10) + 80002f94: 00850513 addi x10,x10,8 + +0000000080002f98 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff: + sm4ks x14, x2, x5, 1 # perform operation + 80002f98: 74510733 sm4ks x14,x2,x5,0x1 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffffffffffff_str) + 80002f9c: 0001b383 ld x7,0(x3) + 80002fa0: 00e38c63 beq x7,x14,80002fb8 + 80002fa4: 2340846f jal x8,8000b1d8 + 80002fa8: 80002f98 .word 0x80002f98 + 80002fac: 00000000 .word 0x00000000 + 80002fb0: 800179c8 .word 0x800179c8 + 80002fb4: 00000000 .word 0x00000000 + 80002fb8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x7ffffffffffffffe + 80002fbc: 00053c03 ld x24,0(x10) + 80002fc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xfffffffffffffffe + 80002fc4: 00053e83 ld x29,0(x10) + 80002fc8: 00850513 addi x10,x10,8 + +0000000080002fcc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe: + sm4ks x4, x24, x29, 0 # perform operation + 80002fcc: 35dc0233 sm4ks x4,x24,x29,0x0 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80002fd0: 0001b383 ld x7,0(x3) + 80002fd4: 00438c63 beq x7,x4,80002fec + 80002fd8: 2000846f jal x8,8000b1d8 + 80002fdc: 80002fcc .word 0x80002fcc + 80002fe0: 00000000 .word 0x00000000 + 80002fe4: 80017a39 .word 0x80017a39 + 80002fe8: 00000000 .word 0x00000000 + 80002fec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 80002ff0: 00053683 ld x13,0(x10) + 80002ff4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x5bbc887763ae86f2 + 80002ff8: 00053a03 ld x20,0(x10) + 80002ffc: 00850513 addi x10,x10,8 + +0000000080003000 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2: + sm4ks x30, x13, x20, 3 # perform operation + 80003000: f5468f33 sm4ks x30,x13,x20,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003004: 0001b383 ld x7,0(x3) + 80003008: 01e38c63 beq x7,x30,80003020 + 8000300c: 1cc0846f jal x8,8000b1d8 + 80003010: 80003000 .word 0x80003000 + 80003014: 00000000 .word 0x00000000 + 80003018: 80017aaa .word 0x80017aaa + 8000301c: 00000000 .word 0x00000000 + 80003020: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x7ffffffffffffffe + 80003024: 00053b83 ld x23,0(x10) + 80003028: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xaaaaaaaaaaaaaaaa + 8000302c: 00053c03 ld x24,0(x10) + 80003030: 00850513 addi x10,x10,8 + +0000000080003034 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x6, x23, x24, 0 # perform operation + 80003034: 358b8333 sm4ks x6,x23,x24,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003038: 0001b383 ld x7,0(x3) + 8000303c: 00638c63 beq x7,x6,80003054 + 80003040: 1980846f jal x8,8000b1d8 + 80003044: 80003034 .word 0x80003034 + 80003048: 00000000 .word 0x00000000 + 8000304c: 80017b1b .word 0x80017b1b + 80003050: 00000000 .word 0x00000000 + 80003054: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7ffffffffffffffe + 80003058: 00053603 ld x12,0(x10) + 8000305c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5555555555555555 + 80003060: 00053683 ld x13,0(x10) + 80003064: 00850513 addi x10,x10,8 + +0000000080003068 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555: + sm4ks x1, x12, x13, 0 # perform operation + 80003068: 34d600b3 sm4ks x1,x12,x13,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x5555555555555555_str) + 8000306c: 0001b383 ld x7,0(x3) + 80003070: 00138c63 beq x7,x1,80003088 + 80003074: 1640846f jal x8,8000b1d8 + 80003078: 80003068 .word 0x80003068 + 8000307c: 00000000 .word 0x00000000 + 80003080: 80017b8c .word 0x80017b8c + 80003084: 00000000 .word 0x00000000 + 80003088: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x7ffffffffffffffe + 8000308c: 00053703 ld x14,0(x10) + 80003090: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x00000000ffffffff + 80003094: 00053103 ld x2,0(x10) + 80003098: 00850513 addi x10,x10,8 + +000000008000309c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff: + sm4ks x12, x14, x2, 3 # perform operation + 8000309c: f4270633 sm4ks x12,x14,x2,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xffffffff_str) + 800030a0: 0001b383 ld x7,0(x3) + 800030a4: 00c38c63 beq x7,x12,800030bc + 800030a8: 1300846f jal x8,8000b1d8 + 800030ac: 8000309c .word 0x8000309c + 800030b0: 00000000 .word 0x00000000 + 800030b4: 80017bfd .word 0x80017bfd + 800030b8: 00000000 .word 0x00000000 + 800030bc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x7ffffffffffffffe + 800030c0: 00053683 ld x13,0(x10) + 800030c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000fffffffe + 800030c8: 00053f83 ld x31,0(x10) + 800030cc: 00850513 addi x10,x10,8 + +00000000800030d0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe: + sm4ks x22, x13, x31, 1 # perform operation + 800030d0: 75f68b33 sm4ks x22,x13,x31,0x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0xfffffffe_str) + 800030d4: 0001b383 ld x7,0(x3) + 800030d8: 01638c63 beq x7,x22,800030f0 + 800030dc: 0fc0846f jal x8,8000b1d8 + 800030e0: 800030d0 .word 0x800030d0 + 800030e4: 00000000 .word 0x00000000 + 800030e8: 80017c66 .word 0x80017c66 + 800030ec: 00000000 .word 0x00000000 + 800030f0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7ffffffffffffffe + 800030f4: 00053c83 ld x25,0(x10) + 800030f8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000100000000 + 800030fc: 00053a03 ld x20,0(x10) + 80003100: 00850513 addi x10,x10,8 + +0000000080003104 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000: + sm4ks x15, x25, x20, 0 # perform operation + 80003104: 354c87b3 sm4ks x15,x25,x20,0x0 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000000_str) + 80003108: 0001b383 ld x7,0(x3) + 8000310c: 00f38c63 beq x7,x15,80003124 + 80003110: 0c80846f jal x8,8000b1d8 + 80003114: 80003104 .word 0x80003104 + 80003118: 00000000 .word 0x00000000 + 8000311c: 80017ccf .word 0x80017ccf + 80003120: 00000000 .word 0x00000000 + 80003124: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x7ffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x7ffffffffffffffe + 80003128: 00053d83 ld x27,0(x10) + 8000312c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000100000001 + 80003130: 00053c83 ld x25,0(x10) + 80003134: 00850513 addi x10,x10,8 + +0000000080003138 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001: + sm4ks x22, x27, x25, 3 # perform operation + 80003138: f59d8b33 sm4ks x22,x27,x25,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x7ffffffffffffffe_rs2val_0x100000001_str) + 8000313c: 0001b383 ld x7,0(x3) + 80003140: 01638c63 beq x7,x22,80003158 + 80003144: 0940846f jal x8,8000b1d8 + 80003148: 80003138 .word 0x80003138 + 8000314c: 00000000 .word 0x00000000 + 80003150: 80017d39 .word 0x80017d39 + 80003154: 00000000 .word 0x00000000 + 80003158: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0xffffffffffffffff + 8000315c: 00053703 ld x14,0(x10) + 80003160: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000000 + 80003164: 00053b03 ld x22,0(x10) + 80003168: 00850513 addi x10,x10,8 + +000000008000316c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0: + sm4ks x17, x14, x22, 3 # perform operation + 8000316c: f56708b3 sm4ks x17,x14,x22,0x3 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x0_str) + 80003170: 0001b383 ld x7,0(x3) + 80003174: 01138c63 beq x7,x17,8000318c + 80003178: 0600846f jal x8,8000b1d8 + 8000317c: 8000316c .word 0x8000316c + 80003180: 00000000 .word 0x00000000 + 80003184: 80017da3 .word 0x80017da3 + 80003188: 00000000 .word 0x00000000 + 8000318c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xffffffffffffffff + 80003190: 00053203 ld x4,0(x10) + 80003194: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000001 + 80003198: 00053983 ld x19,0(x10) + 8000319c: 00850513 addi x10,x10,8 + +00000000800031a0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1: + sm4ks x6, x4, x19, 2 # perform operation + 800031a0: b5320333 sm4ks x6,x4,x19,0x2 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x1_str) + 800031a4: 0001b383 ld x7,0(x3) + 800031a8: 00638c63 beq x7,x6,800031c0 + 800031ac: 02c0846f jal x8,8000b1d8 + 800031b0: 800031a0 .word 0x800031a0 + 800031b4: 00000000 .word 0x00000000 + 800031b8: 80017e05 .word 0x80017e05 + 800031bc: 00000000 .word 0x00000000 + 800031c0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xffffffffffffffff + 800031c4: 00053a03 ld x20,0(x10) + 800031c8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000002 + 800031cc: 00053b83 ld x23,0(x10) + 800031d0: 00850513 addi x10,x10,8 + +00000000800031d4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2: + sm4ks x19, x20, x23, 0 # perform operation + 800031d4: 357a09b3 sm4ks x19,x20,x23,0x0 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x2_str) + 800031d8: 0001b383 ld x7,0(x3) + 800031dc: 01338c63 beq x7,x19,800031f4 + 800031e0: 7f90746f jal x8,8000b1d8 + 800031e4: 800031d4 .word 0x800031d4 + 800031e8: 00000000 .word 0x00000000 + 800031ec: 80017e67 .word 0x80017e67 + 800031f0: 00000000 .word 0x00000000 + 800031f4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0xffffffffffffffff + 800031f8: 00053a03 ld x20,0(x10) + 800031fc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000000 + 80003200: 00053d83 ld x27,0(x10) + 80003204: 00850513 addi x10,x10,8 + +0000000080003208 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000: + sm4ks x26, x20, x27, 2 # perform operation + 80003208: b5ba0d33 sm4ks x26,x20,x27,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000000_str) + 8000320c: 0001b383 ld x7,0(x3) + 80003210: 01a38c63 beq x7,x26,80003228 + 80003214: 7c50746f jal x8,8000b1d8 + 80003218: 80003208 .word 0x80003208 + 8000321c: 00000000 .word 0x00000000 + 80003220: 80017ec9 .word 0x80017ec9 + 80003224: 00000000 .word 0x00000000 + 80003228: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xffffffffffffffff + 8000322c: 00053a83 ld x21,0(x10) + 80003230: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x8000000000000001 + 80003234: 00053d83 ld x27,0(x10) + 80003238: 00850513 addi x10,x10,8 + +000000008000323c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001: + sm4ks x30, x21, x27, 2 # perform operation + 8000323c: b5ba8f33 sm4ks x30,x21,x27,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x8000000000000001_str) + 80003240: 0001b383 ld x7,0(x3) + 80003244: 01e38c63 beq x7,x30,8000325c + 80003248: 7910746f jal x8,8000b1d8 + 8000324c: 8000323c .word 0x8000323c + 80003250: 00000000 .word 0x00000000 + 80003254: 80017f3a .word 0x80017f3a + 80003258: 00000000 .word 0x00000000 + 8000325c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0xffffffffffffffff + 80003260: 00053583 ld x11,0(x10) + 80003264: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x7fffffffffffffff + 80003268: 00053483 ld x9,0(x10) + 8000326c: 00850513 addi x10,x10,8 + +0000000080003270 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff: + sm4ks x30, x11, x9, 3 # perform operation + 80003270: f4958f33 sm4ks x30,x11,x9,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7fffffffffffffff_str) + 80003274: 0001b383 ld x7,0(x3) + 80003278: 01e38c63 beq x7,x30,80003290 + 8000327c: 75d0746f jal x8,8000b1d8 + 80003280: 80003270 .word 0x80003270 + 80003284: 00000000 .word 0x00000000 + 80003288: 80017fab .word 0x80017fab + 8000328c: 00000000 .word 0x00000000 + 80003290: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xffffffffffffffff + 80003294: 00053c03 ld x24,0(x10) + 80003298: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x7ffffffffffffffe + 8000329c: 00053d03 ld x26,0(x10) + 800032a0: 00850513 addi x10,x10,8 + +00000000800032a4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe: + sm4ks x28, x24, x26, 1 # perform operation + 800032a4: 75ac0e33 sm4ks x28,x24,x26,0x1 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x7ffffffffffffffe_str) + 800032a8: 0001b383 ld x7,0(x3) + 800032ac: 01c38c63 beq x7,x28,800032c4 + 800032b0: 7290746f jal x8,8000b1d8 + 800032b4: 800032a4 .word 0x800032a4 + 800032b8: 00000000 .word 0x00000000 + 800032bc: 8001801c .word 0x8001801c + 800032c0: 00000000 .word 0x00000000 + 800032c4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xffffffffffffffff + 800032c8: 00053903 ld x18,0(x10) + 800032cc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 800032d0: 00053c03 ld x24,0(x10) + 800032d4: 00850513 addi x10,x10,8 + +00000000800032d8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff: + sm4ks x23, x18, x24, 1 # perform operation + 800032d8: 75890bb3 sm4ks x23,x18,x24,0x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffffffffffff_str) + 800032dc: 0001b383 ld x7,0(x3) + 800032e0: 01738c63 beq x7,x23,800032f8 + 800032e4: 6f50746f jal x8,8000b1d8 + 800032e8: 800032d8 .word 0x800032d8 + 800032ec: 00000000 .word 0x00000000 + 800032f0: 8001808d .word 0x8001808d + 800032f4: 00000000 .word 0x00000000 + 800032f8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xffffffffffffffff + 800032fc: 00053083 ld x1,0(x10) + 80003300: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xfffffffffffffffe + 80003304: 00053e83 ld x29,0(x10) + 80003308: 00850513 addi x10,x10,8 + +000000008000330c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe: + sm4ks x17, x1, x29, 0 # perform operation + 8000330c: 35d088b3 sm4ks x17,x1,x29,0x0 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffffffffffe_str) + 80003310: 0001b383 ld x7,0(x3) + 80003314: 01138c63 beq x7,x17,8000332c + 80003318: 6c10746f jal x8,8000b1d8 + 8000331c: 8000330c .word 0x8000330c + 80003320: 00000000 .word 0x00000000 + 80003324: 800180fe .word 0x800180fe + 80003328: 00000000 .word 0x00000000 + 8000332c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0xffffffffffffffff + 80003330: 00053803 ld x16,0(x10) + 80003334: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x5bbc887763ae86f2 + 80003338: 00053703 ld x14,0(x10) + 8000333c: 00850513 addi x10,x10,8 + +0000000080003340 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2: + sm4ks x2, x16, x14, 2 # perform operation + 80003340: b4e80133 sm4ks x2,x16,x14,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5bbc887763ae86f2_str) + 80003344: 0001b383 ld x7,0(x3) + 80003348: 00238c63 beq x7,x2,80003360 + 8000334c: 68d0746f jal x8,8000b1d8 + 80003350: 80003340 .word 0x80003340 + 80003354: 00000000 .word 0x00000000 + 80003358: 8001816f .word 0x8001816f + 8000335c: 00000000 .word 0x00000000 + 80003360: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xffffffffffffffff + 80003364: 00053903 ld x18,0(x10) + 80003368: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xaaaaaaaaaaaaaaaa + 8000336c: 00053683 ld x13,0(x10) + 80003370: 00850513 addi x10,x10,8 + +0000000080003374 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x9, x18, x13, 1 # perform operation + 80003374: 74d904b3 sm4ks x9,x18,x13,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003378: 0001b383 ld x7,0(x3) + 8000337c: 00938c63 beq x7,x9,80003394 + 80003380: 6590746f jal x8,8000b1d8 + 80003384: 80003374 .word 0x80003374 + 80003388: 00000000 .word 0x00000000 + 8000338c: 800181e0 .word 0x800181e0 + 80003390: 00000000 .word 0x00000000 + 80003394: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xffffffffffffffff + 80003398: 00053283 ld x5,0(x10) + 8000339c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5555555555555555 + 800033a0: 00053d03 ld x26,0(x10) + 800033a4: 00850513 addi x10,x10,8 + +00000000800033a8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555: + sm4ks x1, x5, x26, 3 # perform operation + 800033a8: f5a280b3 sm4ks x1,x5,x26,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x5555555555555555_str) + 800033ac: 0001b383 ld x7,0(x3) + 800033b0: 00138c63 beq x7,x1,800033c8 + 800033b4: 6250746f jal x8,8000b1d8 + 800033b8: 800033a8 .word 0x800033a8 + 800033bc: 00000000 .word 0x00000000 + 800033c0: 80018251 .word 0x80018251 + 800033c4: 00000000 .word 0x00000000 + 800033c8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xffffffffffffffff + 800033cc: 00053783 ld x15,0(x10) + 800033d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000ffffffff + 800033d4: 00053d83 ld x27,0(x10) + 800033d8: 00850513 addi x10,x10,8 + +00000000800033dc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff: + sm4ks x28, x15, x27, 0 # perform operation + 800033dc: 35b78e33 sm4ks x28,x15,x27,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xffffffff_str) + 800033e0: 0001b383 ld x7,0(x3) + 800033e4: 01c38c63 beq x7,x28,800033fc + 800033e8: 5f10746f jal x8,8000b1d8 + 800033ec: 800033dc .word 0x800033dc + 800033f0: 00000000 .word 0x00000000 + 800033f4: 800182c2 .word 0x800182c2 + 800033f8: 00000000 .word 0x00000000 + 800033fc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xffffffffffffffff + 80003400: 00053b03 ld x22,0(x10) + 80003404: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000fffffffe + 80003408: 00053983 ld x19,0(x10) + 8000340c: 00850513 addi x10,x10,8 + +0000000080003410 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe: + sm4ks x12, x22, x19, 1 # perform operation + 80003410: 753b0633 sm4ks x12,x22,x19,0x1 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0xfffffffe_str) + 80003414: 0001b383 ld x7,0(x3) + 80003418: 00c38c63 beq x7,x12,80003430 + 8000341c: 5bd0746f jal x8,8000b1d8 + 80003420: 80003410 .word 0x80003410 + 80003424: 00000000 .word 0x00000000 + 80003428: 8001832b .word 0x8001832b + 8000342c: 00000000 .word 0x00000000 + 80003430: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0xffffffffffffffff + 80003434: 00053d03 ld x26,0(x10) + 80003438: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 8000343c: 00053483 ld x9,0(x10) + 80003440: 00850513 addi x10,x10,8 + +0000000080003444 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000: + sm4ks x29, x26, x9, 2 # perform operation + 80003444: b49d0eb3 sm4ks x29,x26,x9,0x2 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000000_str) + 80003448: 0001b383 ld x7,0(x3) + 8000344c: 01d38c63 beq x7,x29,80003464 + 80003450: 5890746f jal x8,8000b1d8 + 80003454: 80003444 .word 0x80003444 + 80003458: 00000000 .word 0x00000000 + 8000345c: 80018394 .word 0x80018394 + 80003460: 00000000 .word 0x00000000 + 80003464: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xffffffffffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xffffffffffffffff + 80003468: 00053483 ld x9,0(x10) + 8000346c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000100000001 + 80003470: 00053683 ld x13,0(x10) + 80003474: 00850513 addi x10,x10,8 + +0000000080003478 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001: + sm4ks x4, x9, x13, 3 # perform operation + 80003478: f4d48233 sm4ks x4,x9,x13,0x3 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffffffffffff_rs2val_0x100000001_str) + 8000347c: 0001b383 ld x7,0(x3) + 80003480: 00438c63 beq x7,x4,80003498 + 80003484: 5550746f jal x8,8000b1d8 + 80003488: 80003478 .word 0x80003478 + 8000348c: 00000000 .word 0x00000000 + 80003490: 800183fe .word 0x800183fe + 80003494: 00000000 .word 0x00000000 + 80003498: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xfffffffffffffffe + 8000349c: 00053603 ld x12,0(x10) + 800034a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000000 + 800034a4: 00053b83 ld x23,0(x10) + 800034a8: 00850513 addi x10,x10,8 + +00000000800034ac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0: + sm4ks x15, x12, x23, 1 # perform operation + 800034ac: 757607b3 sm4ks x15,x12,x23,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x0_str) + 800034b0: 0001b383 ld x7,0(x3) + 800034b4: 00f38c63 beq x7,x15,800034cc + 800034b8: 5210746f jal x8,8000b1d8 + 800034bc: 800034ac .word 0x800034ac + 800034c0: 00000000 .word 0x00000000 + 800034c4: 80018468 .word 0x80018468 + 800034c8: 00000000 .word 0x00000000 + 800034cc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xfffffffffffffffe + 800034d0: 00053a83 ld x21,0(x10) + 800034d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x0000000000000001 + 800034d8: 00053c83 ld x25,0(x10) + 800034dc: 00850513 addi x10,x10,8 + +00000000800034e0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1: + sm4ks x1, x21, x25, 0 # perform operation + 800034e0: 359a80b3 sm4ks x1,x21,x25,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x1_str) + 800034e4: 0001b383 ld x7,0(x3) + 800034e8: 00138c63 beq x7,x1,80003500 + 800034ec: 4ed0746f jal x8,8000b1d8 + 800034f0: 800034e0 .word 0x800034e0 + 800034f4: 00000000 .word 0x00000000 + 800034f8: 800184ca .word 0x800184ca + 800034fc: 00000000 .word 0x00000000 + 80003500: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0xfffffffffffffffe + 80003504: 00053b03 ld x22,0(x10) + 80003508: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000002 + 8000350c: 00053c03 ld x24,0(x10) + 80003510: 00850513 addi x10,x10,8 + +0000000080003514 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2: + sm4ks x17, x22, x24, 0 # perform operation + 80003514: 358b08b3 sm4ks x17,x22,x24,0x0 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x2_str) + 80003518: 0001b383 ld x7,0(x3) + 8000351c: 01138c63 beq x7,x17,80003534 + 80003520: 4b90746f jal x8,8000b1d8 + 80003524: 80003514 .word 0x80003514 + 80003528: 00000000 .word 0x00000000 + 8000352c: 8001852c .word 0x8001852c + 80003530: 00000000 .word 0x00000000 + 80003534: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfffffffffffffffe + 80003538: 00053103 ld x2,0(x10) + 8000353c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x8000000000000000 + 80003540: 00053583 ld x11,0(x10) + 80003544: 00850513 addi x10,x10,8 + +0000000080003548 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000: + sm4ks x18, x2, x11, 1 # perform operation + 80003548: 74b10933 sm4ks x18,x2,x11,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000000_str) + 8000354c: 0001b383 ld x7,0(x3) + 80003550: 01238c63 beq x7,x18,80003568 + 80003554: 4850746f jal x8,8000b1d8 + 80003558: 80003548 .word 0x80003548 + 8000355c: 00000000 .word 0x00000000 + 80003560: 8001858e .word 0x8001858e + 80003564: 00000000 .word 0x00000000 + 80003568: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0xfffffffffffffffe + 8000356c: 00053983 ld x19,0(x10) + 80003570: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000001 + 80003574: 00053103 ld x2,0(x10) + 80003578: 00850513 addi x10,x10,8 + +000000008000357c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001: + sm4ks x18, x19, x2, 0 # perform operation + 8000357c: 34298933 sm4ks x18,x19,x2,0x0 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x8000000000000001_str) + 80003580: 0001b383 ld x7,0(x3) + 80003584: 01238c63 beq x7,x18,8000359c + 80003588: 4510746f jal x8,8000b1d8 + 8000358c: 8000357c .word 0x8000357c + 80003590: 00000000 .word 0x00000000 + 80003594: 800185ff .word 0x800185ff + 80003598: 00000000 .word 0x00000000 + 8000359c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfffffffffffffffe + 800035a0: 00053e83 ld x29,0(x10) + 800035a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x7fffffffffffffff + 800035a8: 00053703 ld x14,0(x10) + 800035ac: 00850513 addi x10,x10,8 + +00000000800035b0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff: + sm4ks x16, x29, x14, 2 # perform operation + 800035b0: b4ee8833 sm4ks x16,x29,x14,0x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7fffffffffffffff_str) + 800035b4: 0001b383 ld x7,0(x3) + 800035b8: 01038c63 beq x7,x16,800035d0 + 800035bc: 41d0746f jal x8,8000b1d8 + 800035c0: 800035b0 .word 0x800035b0 + 800035c4: 00000000 .word 0x00000000 + 800035c8: 80018670 .word 0x80018670 + 800035cc: 00000000 .word 0x00000000 + 800035d0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0xfffffffffffffffe + 800035d4: 00053283 ld x5,0(x10) + 800035d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffffffffffe + 800035dc: 00053103 ld x2,0(x10) + 800035e0: 00850513 addi x10,x10,8 + +00000000800035e4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe: + sm4ks x28, x5, x2, 2 # perform operation + 800035e4: b4228e33 sm4ks x28,x5,x2,0x2 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x7ffffffffffffffe_str) + 800035e8: 0001b383 ld x7,0(x3) + 800035ec: 01c38c63 beq x7,x28,80003604 + 800035f0: 3e90746f jal x8,8000b1d8 + 800035f4: 800035e4 .word 0x800035e4 + 800035f8: 00000000 .word 0x00000000 + 800035fc: 800186e1 .word 0x800186e1 + 80003600: 00000000 .word 0x00000000 + 80003604: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xfffffffffffffffe + 80003608: 00053483 ld x9,0(x10) + 8000360c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xffffffffffffffff + 80003610: 00053f03 ld x30,0(x10) + 80003614: 00850513 addi x10,x10,8 + +0000000080003618 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff: + sm4ks x11, x9, x30, 1 # perform operation + 80003618: 75e485b3 sm4ks x11,x9,x30,0x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffffffffffff_str) + 8000361c: 0001b383 ld x7,0(x3) + 80003620: 00b38c63 beq x7,x11,80003638 + 80003624: 3b50746f jal x8,8000b1d8 + 80003628: 80003618 .word 0x80003618 + 8000362c: 00000000 .word 0x00000000 + 80003630: 80018752 .word 0x80018752 + 80003634: 00000000 .word 0x00000000 + 80003638: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xfffffffffffffffe + 8000363c: 00053083 ld x1,0(x10) + 80003640: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0xfffffffffffffffe + 80003644: 00053b83 ld x23,0(x10) + 80003648: 00850513 addi x10,x10,8 + +000000008000364c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe: + sm4ks x6, x1, x23, 2 # perform operation + 8000364c: b5708333 sm4ks x6,x1,x23,0x2 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffffffffffe_str) + 80003650: 0001b383 ld x7,0(x3) + 80003654: 00638c63 beq x7,x6,8000366c + 80003658: 3810746f jal x8,8000b1d8 + 8000365c: 8000364c .word 0x8000364c + 80003660: 00000000 .word 0x00000000 + 80003664: 800187c3 .word 0x800187c3 + 80003668: 00000000 .word 0x00000000 + 8000366c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 80003670: 00053c03 ld x24,0(x10) + 80003674: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x5bbc887763ae86f2 + 80003678: 00053583 ld x11,0(x10) + 8000367c: 00850513 addi x10,x10,8 + +0000000080003680 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2: + sm4ks x22, x24, x11, 1 # perform operation + 80003680: 74bc0b33 sm4ks x22,x24,x11,0x1 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5bbc887763ae86f2_str) + 80003684: 0001b383 ld x7,0(x3) + 80003688: 01638c63 beq x7,x22,800036a0 + 8000368c: 34d0746f jal x8,8000b1d8 + 80003690: 80003680 .word 0x80003680 + 80003694: 00000000 .word 0x00000000 + 80003698: 80018834 .word 0x80018834 + 8000369c: 00000000 .word 0x00000000 + 800036a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xfffffffffffffffe + 800036a4: 00053e03 ld x28,0(x10) + 800036a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xaaaaaaaaaaaaaaaa + 800036ac: 00053f03 ld x30,0(x10) + 800036b0: 00850513 addi x10,x10,8 + +00000000800036b4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x13, x28, x30, 2 # perform operation + 800036b4: b5ee06b3 sm4ks x13,x28,x30,0x2 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800036b8: 0001b383 ld x7,0(x3) + 800036bc: 00d38c63 beq x7,x13,800036d4 + 800036c0: 3190746f jal x8,8000b1d8 + 800036c4: 800036b4 .word 0x800036b4 + 800036c8: 00000000 .word 0x00000000 + 800036cc: 800188a5 .word 0x800188a5 + 800036d0: 00000000 .word 0x00000000 + 800036d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0xfffffffffffffffe + 800036d8: 00053603 ld x12,0(x10) + 800036dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x5555555555555555 + 800036e0: 00053a03 ld x20,0(x10) + 800036e4: 00850513 addi x10,x10,8 + +00000000800036e8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555: + sm4ks x9, x12, x20, 2 # perform operation + 800036e8: b54604b3 sm4ks x9,x12,x20,0x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x5555555555555555_str) + 800036ec: 0001b383 ld x7,0(x3) + 800036f0: 00938c63 beq x7,x9,80003708 + 800036f4: 2e50746f jal x8,8000b1d8 + 800036f8: 800036e8 .word 0x800036e8 + 800036fc: 00000000 .word 0x00000000 + 80003700: 80018916 .word 0x80018916 + 80003704: 00000000 .word 0x00000000 + 80003708: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xfffffffffffffffe + 8000370c: 00053203 ld x4,0(x10) + 80003710: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x00000000ffffffff + 80003714: 00053b83 ld x23,0(x10) + 80003718: 00850513 addi x10,x10,8 + +000000008000371c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff: + sm4ks x11, x4, x23, 1 # perform operation + 8000371c: 757205b3 sm4ks x11,x4,x23,0x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xffffffff_str) + 80003720: 0001b383 ld x7,0(x3) + 80003724: 00b38c63 beq x7,x11,8000373c + 80003728: 2b10746f jal x8,8000b1d8 + 8000372c: 8000371c .word 0x8000371c + 80003730: 00000000 .word 0x00000000 + 80003734: 80018987 .word 0x80018987 + 80003738: 00000000 .word 0x00000000 + 8000373c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xfffffffffffffffe + 80003740: 00053683 ld x13,0(x10) + 80003744: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x00000000fffffffe + 80003748: 00053483 ld x9,0(x10) + 8000374c: 00850513 addi x10,x10,8 + +0000000080003750 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe: + sm4ks x22, x13, x9, 3 # perform operation + 80003750: f4968b33 sm4ks x22,x13,x9,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0xfffffffe_str) + 80003754: 0001b383 ld x7,0(x3) + 80003758: 01638c63 beq x7,x22,80003770 + 8000375c: 27d0746f jal x8,8000b1d8 + 80003760: 80003750 .word 0x80003750 + 80003764: 00000000 .word 0x00000000 + 80003768: 800189f0 .word 0x800189f0 + 8000376c: 00000000 .word 0x00000000 + 80003770: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xfffffffffffffffe + 80003774: 00053203 ld x4,0(x10) + 80003778: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 8000377c: 00053483 ld x9,0(x10) + 80003780: 00850513 addi x10,x10,8 + +0000000080003784 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000: + sm4ks x18, x4, x9, 1 # perform operation + 80003784: 74920933 sm4ks x18,x4,x9,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000000_str) + 80003788: 0001b383 ld x7,0(x3) + 8000378c: 01238c63 beq x7,x18,800037a4 + 80003790: 2490746f jal x8,8000b1d8 + 80003794: 80003784 .word 0x80003784 + 80003798: 00000000 .word 0x00000000 + 8000379c: 80018a59 .word 0x80018a59 + 800037a0: 00000000 .word 0x00000000 + 800037a4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xfffffffffffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xfffffffffffffffe + 800037a8: 00053c03 ld x24,0(x10) + 800037ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000001 + 800037b0: 00053b03 ld x22,0(x10) + 800037b4: 00850513 addi x10,x10,8 + +00000000800037b8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001: + sm4ks x13, x24, x22, 3 # perform operation + 800037b8: f56c06b3 sm4ks x13,x24,x22,0x3 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffffffffffe_rs2val_0x100000001_str) + 800037bc: 0001b383 ld x7,0(x3) + 800037c0: 00d38c63 beq x7,x13,800037d8 + 800037c4: 2150746f jal x8,8000b1d8 + 800037c8: 800037b8 .word 0x800037b8 + 800037cc: 00000000 .word 0x00000000 + 800037d0: 80018ac3 .word 0x80018ac3 + 800037d4: 00000000 .word 0x00000000 + 800037d8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 800037dc: 00053d03 ld x26,0(x10) + 800037e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000000000000 + 800037e4: 00053803 ld x16,0(x10) + 800037e8: 00850513 addi x10,x10,8 + +00000000800037ec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0: + sm4ks x30, x26, x16, 3 # perform operation + 800037ec: f50d0f33 sm4ks x30,x26,x16,0x3 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x0_str) + 800037f0: 0001b383 ld x7,0(x3) + 800037f4: 01e38c63 beq x7,x30,8000380c + 800037f8: 1e10746f jal x8,8000b1d8 + 800037fc: 800037ec .word 0x800037ec + 80003800: 00000000 .word 0x00000000 + 80003804: 80018b2d .word 0x80018b2d + 80003808: 00000000 .word 0x00000000 + 8000380c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x5bbc887763ae86f2 + 80003810: 00053f83 ld x31,0(x10) + 80003814: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x0000000000000001 + 80003818: 00053983 ld x19,0(x10) + 8000381c: 00850513 addi x10,x10,8 + +0000000080003820 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1: + sm4ks x16, x31, x19, 0 # perform operation + 80003820: 353f8833 sm4ks x16,x31,x19,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x1_str) + 80003824: 0001b383 ld x7,0(x3) + 80003828: 01038c63 beq x7,x16,80003840 + 8000382c: 1ad0746f jal x8,8000b1d8 + 80003830: 80003820 .word 0x80003820 + 80003834: 00000000 .word 0x00000000 + 80003838: 80018b8f .word 0x80018b8f + 8000383c: 00000000 .word 0x00000000 + 80003840: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x5bbc887763ae86f2 + 80003844: 00053883 ld x17,0(x10) + 80003848: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000002 + 8000384c: 00053683 ld x13,0(x10) + 80003850: 00850513 addi x10,x10,8 + +0000000080003854 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2: + sm4ks x30, x17, x13, 0 # perform operation + 80003854: 34d88f33 sm4ks x30,x17,x13,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x2_str) + 80003858: 0001b383 ld x7,0(x3) + 8000385c: 01e38c63 beq x7,x30,80003874 + 80003860: 1790746f jal x8,8000b1d8 + 80003864: 80003854 .word 0x80003854 + 80003868: 00000000 .word 0x00000000 + 8000386c: 80018bf1 .word 0x80018bf1 + 80003870: 00000000 .word 0x00000000 + 80003874: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5bbc887763ae86f2 + 80003878: 00053b03 ld x22,0(x10) + 8000387c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x8000000000000000 + 80003880: 00053f03 ld x30,0(x10) + 80003884: 00850513 addi x10,x10,8 + +0000000080003888 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000: + sm4ks x4, x22, x30, 2 # perform operation + 80003888: b5eb0233 sm4ks x4,x22,x30,0x2 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000000_str) + 8000388c: 0001b383 ld x7,0(x3) + 80003890: 00438c63 beq x7,x4,800038a8 + 80003894: 1450746f jal x8,8000b1d8 + 80003898: 80003888 .word 0x80003888 + 8000389c: 00000000 .word 0x00000000 + 800038a0: 80018c53 .word 0x80018c53 + 800038a4: 00000000 .word 0x00000000 + 800038a8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 800038ac: 00053483 ld x9,0(x10) + 800038b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x8000000000000001 + 800038b4: 00053883 ld x17,0(x10) + 800038b8: 00850513 addi x10,x10,8 + +00000000800038bc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001: + sm4ks x2, x9, x17, 3 # perform operation + 800038bc: f5148133 sm4ks x2,x9,x17,0x3 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x8000000000000001_str) + 800038c0: 0001b383 ld x7,0(x3) + 800038c4: 00238c63 beq x7,x2,800038dc + 800038c8: 1110746f jal x8,8000b1d8 + 800038cc: 800038bc .word 0x800038bc + 800038d0: 00000000 .word 0x00000000 + 800038d4: 80018cc4 .word 0x80018cc4 + 800038d8: 00000000 .word 0x00000000 + 800038dc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 800038e0: 00053203 ld x4,0(x10) + 800038e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x7fffffffffffffff + 800038e8: 00053903 ld x18,0(x10) + 800038ec: 00850513 addi x10,x10,8 + +00000000800038f0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff: + sm4ks x27, x4, x18, 2 # perform operation + 800038f0: b5220db3 sm4ks x27,x4,x18,0x2 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7fffffffffffffff_str) + 800038f4: 0001b383 ld x7,0(x3) + 800038f8: 01b38c63 beq x7,x27,80003910 + 800038fc: 0dd0746f jal x8,8000b1d8 + 80003900: 800038f0 .word 0x800038f0 + 80003904: 00000000 .word 0x00000000 + 80003908: 80018d35 .word 0x80018d35 + 8000390c: 00000000 .word 0x00000000 + 80003910: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x5bbc887763ae86f2 + 80003914: 00053603 ld x12,0(x10) + 80003918: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x7ffffffffffffffe + 8000391c: 00053083 ld x1,0(x10) + 80003920: 00850513 addi x10,x10,8 + +0000000080003924 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe: + sm4ks x27, x12, x1, 3 # perform operation + 80003924: f4160db3 sm4ks x27,x12,x1,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x7ffffffffffffffe_str) + 80003928: 0001b383 ld x7,0(x3) + 8000392c: 01b38c63 beq x7,x27,80003944 + 80003930: 0a90746f jal x8,8000b1d8 + 80003934: 80003924 .word 0x80003924 + 80003938: 00000000 .word 0x00000000 + 8000393c: 80018da6 .word 0x80018da6 + 80003940: 00000000 .word 0x00000000 + 80003944: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80003948: 00053083 ld x1,0(x10) + 8000394c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80003950: 00053c03 ld x24,0(x10) + 80003954: 00850513 addi x10,x10,8 + +0000000080003958 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff: + sm4ks x21, x1, x24, 0 # perform operation + 80003958: 35808ab3 sm4ks x21,x1,x24,0x0 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffffffffffff_str) + 8000395c: 0001b383 ld x7,0(x3) + 80003960: 01538c63 beq x7,x21,80003978 + 80003964: 0750746f jal x8,8000b1d8 + 80003968: 80003958 .word 0x80003958 + 8000396c: 00000000 .word 0x00000000 + 80003970: 80018e17 .word 0x80018e17 + 80003974: 00000000 .word 0x00000000 + 80003978: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x5bbc887763ae86f2 + 8000397c: 00053d03 ld x26,0(x10) + 80003980: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0xfffffffffffffffe + 80003984: 00053703 ld x14,0(x10) + 80003988: 00850513 addi x10,x10,8 + +000000008000398c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe: + sm4ks x18, x26, x14, 1 # perform operation + 8000398c: 74ed0933 sm4ks x18,x26,x14,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffffffffffe_str) + 80003990: 0001b383 ld x7,0(x3) + 80003994: 01238c63 beq x7,x18,800039ac + 80003998: 0410746f jal x8,8000b1d8 + 8000399c: 8000398c .word 0x8000398c + 800039a0: 00000000 .word 0x00000000 + 800039a4: 80018e88 .word 0x80018e88 + 800039a8: 00000000 .word 0x00000000 + 800039ac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 800039b0: 00053203 ld x4,0(x10) + 800039b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x5bbc887763ae86f2 + 800039b8: 00053a83 ld x21,0(x10) + 800039bc: 00850513 addi x10,x10,8 + +00000000800039c0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2: + sm4ks x24, x4, x21, 0 # perform operation + 800039c0: 35520c33 sm4ks x24,x4,x21,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5bbc887763ae86f2_str) + 800039c4: 0001b383 ld x7,0(x3) + 800039c8: 01838c63 beq x7,x24,800039e0 + 800039cc: 00d0746f jal x8,8000b1d8 + 800039d0: 800039c0 .word 0x800039c0 + 800039d4: 00000000 .word 0x00000000 + 800039d8: 80018ef9 .word 0x80018ef9 + 800039dc: 00000000 .word 0x00000000 + 800039e0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x5bbc887763ae86f2 + 800039e4: 00053e03 ld x28,0(x10) + 800039e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xaaaaaaaaaaaaaaaa + 800039ec: 00053283 ld x5,0(x10) + 800039f0: 00850513 addi x10,x10,8 + +00000000800039f4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x11, x28, x5, 1 # perform operation + 800039f4: 745e05b3 sm4ks x11,x28,x5,0x1 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800039f8: 0001b383 ld x7,0(x3) + 800039fc: 00b38c63 beq x7,x11,80003a14 + 80003a00: 7d80746f jal x8,8000b1d8 + 80003a04: 800039f4 .word 0x800039f4 + 80003a08: 00000000 .word 0x00000000 + 80003a0c: 80018f6a .word 0x80018f6a + 80003a10: 00000000 .word 0x00000000 + 80003a14: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80003a18: 00053083 ld x1,0(x10) + 80003a1c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x5555555555555555 + 80003a20: 00053c03 ld x24,0(x10) + 80003a24: 00850513 addi x10,x10,8 + +0000000080003a28 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555: + sm4ks x2, x1, x24, 0 # perform operation + 80003a28: 35808133 sm4ks x2,x1,x24,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x5555555555555555_str) + 80003a2c: 0001b383 ld x7,0(x3) + 80003a30: 00238c63 beq x7,x2,80003a48 + 80003a34: 7a40746f jal x8,8000b1d8 + 80003a38: 80003a28 .word 0x80003a28 + 80003a3c: 00000000 .word 0x00000000 + 80003a40: 80018fdb .word 0x80018fdb + 80003a44: 00000000 .word 0x00000000 + 80003a48: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5bbc887763ae86f2 + 80003a4c: 00053483 ld x9,0(x10) + 80003a50: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x00000000ffffffff + 80003a54: 00053883 ld x17,0(x10) + 80003a58: 00850513 addi x10,x10,8 + +0000000080003a5c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff: + sm4ks x21, x9, x17, 2 # perform operation + 80003a5c: b5148ab3 sm4ks x21,x9,x17,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xffffffff_str) + 80003a60: 0001b383 ld x7,0(x3) + 80003a64: 01538c63 beq x7,x21,80003a7c + 80003a68: 7700746f jal x8,8000b1d8 + 80003a6c: 80003a5c .word 0x80003a5c + 80003a70: 00000000 .word 0x00000000 + 80003a74: 8001904c .word 0x8001904c + 80003a78: 00000000 .word 0x00000000 + 80003a7c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x5bbc887763ae86f2 + 80003a80: 00053b83 ld x23,0(x10) + 80003a84: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x00000000fffffffe + 80003a88: 00053c83 ld x25,0(x10) + 80003a8c: 00850513 addi x10,x10,8 + +0000000080003a90 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe: + sm4ks x9, x23, x25, 1 # perform operation + 80003a90: 759b84b3 sm4ks x9,x23,x25,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0xfffffffe_str) + 80003a94: 0001b383 ld x7,0(x3) + 80003a98: 00938c63 beq x7,x9,80003ab0 + 80003a9c: 73c0746f jal x8,8000b1d8 + 80003aa0: 80003a90 .word 0x80003a90 + 80003aa4: 00000000 .word 0x00000000 + 80003aa8: 800190b5 .word 0x800190b5 + 80003aac: 00000000 .word 0x00000000 + 80003ab0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x5bbc887763ae86f2 + 80003ab4: 00053203 ld x4,0(x10) + 80003ab8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000100000000 + 80003abc: 00053703 ld x14,0(x10) + 80003ac0: 00850513 addi x10,x10,8 + +0000000080003ac4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000: + sm4ks x18, x4, x14, 2 # perform operation + 80003ac4: b4e20933 sm4ks x18,x4,x14,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000000_str) + 80003ac8: 0001b383 ld x7,0(x3) + 80003acc: 01238c63 beq x7,x18,80003ae4 + 80003ad0: 7080746f jal x8,8000b1d8 + 80003ad4: 80003ac4 .word 0x80003ac4 + 80003ad8: 00000000 .word 0x00000000 + 80003adc: 8001911e .word 0x8001911e + 80003ae0: 00000000 .word 0x00000000 + 80003ae4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5bbc887763ae86f2 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x5bbc887763ae86f2 + 80003ae8: 00053783 ld x15,0(x10) + 80003aec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000100000001 + 80003af0: 00053303 ld x6,0(x10) + 80003af4: 00850513 addi x10,x10,8 + +0000000080003af8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001: + sm4ks x17, x15, x6, 2 # perform operation + 80003af8: b46788b3 sm4ks x17,x15,x6,0x2 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5bbc887763ae86f2_rs2val_0x100000001_str) + 80003afc: 0001b383 ld x7,0(x3) + 80003b00: 01138c63 beq x7,x17,80003b18 + 80003b04: 6d40746f jal x8,8000b1d8 + 80003b08: 80003af8 .word 0x80003af8 + 80003b0c: 00000000 .word 0x00000000 + 80003b10: 80019188 .word 0x80019188 + 80003b14: 00000000 .word 0x00000000 + 80003b18: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003b1c: 00053683 ld x13,0(x10) + 80003b20: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000000 + 80003b24: 00053903 ld x18,0(x10) + 80003b28: 00850513 addi x10,x10,8 + +0000000080003b2c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0: + sm4ks x2, x13, x18, 3 # perform operation + 80003b2c: f5268133 sm4ks x2,x13,x18,0x3 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x0_str) + 80003b30: 0001b383 ld x7,0(x3) + 80003b34: 00238c63 beq x7,x2,80003b4c + 80003b38: 6a00746f jal x8,8000b1d8 + 80003b3c: 80003b2c .word 0x80003b2c + 80003b40: 00000000 .word 0x00000000 + 80003b44: 800191f2 .word 0x800191f2 + 80003b48: 00000000 .word 0x00000000 + 80003b4c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003b50: 00053783 ld x15,0(x10) + 80003b54: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000001 + 80003b58: 00053f83 ld x31,0(x10) + 80003b5c: 00850513 addi x10,x10,8 + +0000000080003b60 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1: + sm4ks x17, x15, x31, 3 # perform operation + 80003b60: f5f788b3 sm4ks x17,x15,x31,0x3 + # Check if x17 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x17, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x1_str) + 80003b64: 0001b383 ld x7,0(x3) + 80003b68: 01138c63 beq x7,x17,80003b80 + 80003b6c: 66c0746f jal x8,8000b1d8 + 80003b70: 80003b60 .word 0x80003b60 + 80003b74: 00000000 .word 0x00000000 + 80003b78: 80019254 .word 0x80019254 + 80003b7c: 00000000 .word 0x00000000 + 80003b80: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0xaaaaaaaaaaaaaaaa + 80003b84: 00053203 ld x4,0(x10) + 80003b88: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x0000000000000002 + 80003b8c: 00053a03 ld x20,0(x10) + 80003b90: 00850513 addi x10,x10,8 + +0000000080003b94 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2: + sm4ks x24, x4, x20, 1 # perform operation + 80003b94: 75420c33 sm4ks x24,x4,x20,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x2_str) + 80003b98: 0001b383 ld x7,0(x3) + 80003b9c: 01838c63 beq x7,x24,80003bb4 + 80003ba0: 6380746f jal x8,8000b1d8 + 80003ba4: 80003b94 .word 0x80003b94 + 80003ba8: 00000000 .word 0x00000000 + 80003bac: 800192b6 .word 0x800192b6 + 80003bb0: 00000000 .word 0x00000000 + 80003bb4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xaaaaaaaaaaaaaaaa + 80003bb8: 00053f03 ld x30,0(x10) + 80003bbc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x8000000000000000 + 80003bc0: 00053083 ld x1,0(x10) + 80003bc4: 00850513 addi x10,x10,8 + +0000000080003bc8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000: + sm4ks x12, x30, x1, 0 # perform operation + 80003bc8: 341f0633 sm4ks x12,x30,x1,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000000_str) + 80003bcc: 0001b383 ld x7,0(x3) + 80003bd0: 00c38c63 beq x7,x12,80003be8 + 80003bd4: 6040746f jal x8,8000b1d8 + 80003bd8: 80003bc8 .word 0x80003bc8 + 80003bdc: 00000000 .word 0x00000000 + 80003be0: 80019318 .word 0x80019318 + 80003be4: 00000000 .word 0x00000000 + 80003be8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003bec: 00053683 ld x13,0(x10) + 80003bf0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8000000000000001 + 80003bf4: 00053a03 ld x20,0(x10) + 80003bf8: 00850513 addi x10,x10,8 + +0000000080003bfc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001: + sm4ks x12, x13, x20, 3 # perform operation + 80003bfc: f5468633 sm4ks x12,x13,x20,0x3 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x8000000000000001_str) + 80003c00: 0001b383 ld x7,0(x3) + 80003c04: 00c38c63 beq x7,x12,80003c1c + 80003c08: 5d00746f jal x8,8000b1d8 + 80003c0c: 80003bfc .word 0x80003bfc + 80003c10: 00000000 .word 0x00000000 + 80003c14: 80019389 .word 0x80019389 + 80003c18: 00000000 .word 0x00000000 + 80003c1c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003c20: 00053903 ld x18,0(x10) + 80003c24: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x7fffffffffffffff + 80003c28: 00053d83 ld x27,0(x10) + 80003c2c: 00850513 addi x10,x10,8 + +0000000080003c30 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff: + sm4ks x26, x18, x27, 0 # perform operation + 80003c30: 35b90d33 sm4ks x26,x18,x27,0x0 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7fffffffffffffff_str) + 80003c34: 0001b383 ld x7,0(x3) + 80003c38: 01a38c63 beq x7,x26,80003c50 + 80003c3c: 59c0746f jal x8,8000b1d8 + 80003c40: 80003c30 .word 0x80003c30 + 80003c44: 00000000 .word 0x00000000 + 80003c48: 800193fa .word 0x800193fa + 80003c4c: 00000000 .word 0x00000000 + 80003c50: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003c54: 00053f83 ld x31,0(x10) + 80003c58: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x7ffffffffffffffe + 80003c5c: 00053803 ld x16,0(x10) + 80003c60: 00850513 addi x10,x10,8 + +0000000080003c64 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe: + sm4ks x22, x31, x16, 3 # perform operation + 80003c64: f50f8b33 sm4ks x22,x31,x16,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x7ffffffffffffffe_str) + 80003c68: 0001b383 ld x7,0(x3) + 80003c6c: 01638c63 beq x7,x22,80003c84 + 80003c70: 5680746f jal x8,8000b1d8 + 80003c74: 80003c64 .word 0x80003c64 + 80003c78: 00000000 .word 0x00000000 + 80003c7c: 8001946b .word 0x8001946b + 80003c80: 00000000 .word 0x00000000 + 80003c84: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0xaaaaaaaaaaaaaaaa + 80003c88: 00053903 ld x18,0(x10) + 80003c8c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80003c90: 00053c03 ld x24,0(x10) + 80003c94: 00850513 addi x10,x10,8 + +0000000080003c98 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff: + sm4ks x16, x18, x24, 0 # perform operation + 80003c98: 35890833 sm4ks x16,x18,x24,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffffffffffff_str) + 80003c9c: 0001b383 ld x7,0(x3) + 80003ca0: 01038c63 beq x7,x16,80003cb8 + 80003ca4: 5340746f jal x8,8000b1d8 + 80003ca8: 80003c98 .word 0x80003c98 + 80003cac: 00000000 .word 0x00000000 + 80003cb0: 800194dc .word 0x800194dc + 80003cb4: 00000000 .word 0x00000000 + 80003cb8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80003cbc: 00053683 ld x13,0(x10) + 80003cc0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xfffffffffffffffe + 80003cc4: 00053c03 ld x24,0(x10) + 80003cc8: 00850513 addi x10,x10,8 + +0000000080003ccc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe: + sm4ks x4, x13, x24, 3 # perform operation + 80003ccc: f5868233 sm4ks x4,x13,x24,0x3 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffffffffffe_str) + 80003cd0: 0001b383 ld x7,0(x3) + 80003cd4: 00438c63 beq x7,x4,80003cec + 80003cd8: 5000746f jal x8,8000b1d8 + 80003cdc: 80003ccc .word 0x80003ccc + 80003ce0: 00000000 .word 0x00000000 + 80003ce4: 8001954d .word 0x8001954d + 80003ce8: 00000000 .word 0x00000000 + 80003cec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0xaaaaaaaaaaaaaaaa + 80003cf0: 00053e03 ld x28,0(x10) + 80003cf4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5bbc887763ae86f2 + 80003cf8: 00053803 ld x16,0(x10) + 80003cfc: 00850513 addi x10,x10,8 + +0000000080003d00 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2: + sm4ks x15, x28, x16, 2 # perform operation + 80003d00: b50e07b3 sm4ks x15,x28,x16,0x2 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5bbc887763ae86f2_str) + 80003d04: 0001b383 ld x7,0(x3) + 80003d08: 00f38c63 beq x7,x15,80003d20 + 80003d0c: 4cc0746f jal x8,8000b1d8 + 80003d10: 80003d00 .word 0x80003d00 + 80003d14: 00000000 .word 0x00000000 + 80003d18: 800195be .word 0x800195be + 80003d1c: 00000000 .word 0x00000000 + 80003d20: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003d24: 00053783 ld x15,0(x10) + 80003d28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0xaaaaaaaaaaaaaaaa + 80003d2c: 00053303 ld x6,0(x10) + 80003d30: 00850513 addi x10,x10,8 + +0000000080003d34 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x2, x15, x6, 3 # perform operation + 80003d34: f4678133 sm4ks x2,x15,x6,0x3 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80003d38: 0001b383 ld x7,0(x3) + 80003d3c: 00238c63 beq x7,x2,80003d54 + 80003d40: 4980746f jal x8,8000b1d8 + 80003d44: 80003d34 .word 0x80003d34 + 80003d48: 00000000 .word 0x00000000 + 80003d4c: 8001962f .word 0x8001962f + 80003d50: 00000000 .word 0x00000000 + 80003d54: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003d58: 00053783 ld x15,0(x10) + 80003d5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x5555555555555555 + 80003d60: 00053303 ld x6,0(x10) + 80003d64: 00850513 addi x10,x10,8 + +0000000080003d68 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555: + sm4ks x16, x15, x6, 0 # perform operation + 80003d68: 34678833 sm4ks x16,x15,x6,0x0 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x5555555555555555_str) + 80003d6c: 0001b383 ld x7,0(x3) + 80003d70: 01038c63 beq x7,x16,80003d88 + 80003d74: 4640746f jal x8,8000b1d8 + 80003d78: 80003d68 .word 0x80003d68 + 80003d7c: 00000000 .word 0x00000000 + 80003d80: 800196a0 .word 0x800196a0 + 80003d84: 00000000 .word 0x00000000 + 80003d88: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xaaaaaaaaaaaaaaaa + 80003d8c: 00053f83 ld x31,0(x10) + 80003d90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs2: x12 = 0x00000000ffffffff + 80003d94: 00053603 ld x12,0(x10) + 80003d98: 00850513 addi x10,x10,8 + +0000000080003d9c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff: + sm4ks x28, x31, x12, 3 # perform operation + 80003d9c: f4cf8e33 sm4ks x28,x31,x12,0x3 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xffffffff_str) + 80003da0: 0001b383 ld x7,0(x3) + 80003da4: 01c38c63 beq x7,x28,80003dbc + 80003da8: 4300746f jal x8,8000b1d8 + 80003dac: 80003d9c .word 0x80003d9c + 80003db0: 00000000 .word 0x00000000 + 80003db4: 80019711 .word 0x80019711 + 80003db8: 00000000 .word 0x00000000 + 80003dbc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xaaaaaaaaaaaaaaaa + 80003dc0: 00053d83 ld x27,0(x10) + 80003dc4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x00000000fffffffe + 80003dc8: 00053f83 ld x31,0(x10) + 80003dcc: 00850513 addi x10,x10,8 + +0000000080003dd0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe: + sm4ks x21, x27, x31, 3 # perform operation + 80003dd0: f5fd8ab3 sm4ks x21,x27,x31,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0xfffffffe_str) + 80003dd4: 0001b383 ld x7,0(x3) + 80003dd8: 01538c63 beq x7,x21,80003df0 + 80003ddc: 3fc0746f jal x8,8000b1d8 + 80003de0: 80003dd0 .word 0x80003dd0 + 80003de4: 00000000 .word 0x00000000 + 80003de8: 8001977a .word 0x8001977a + 80003dec: 00000000 .word 0x00000000 + 80003df0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0xaaaaaaaaaaaaaaaa + 80003df4: 00053c83 ld x25,0(x10) + 80003df8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000000 + 80003dfc: 00053483 ld x9,0(x10) + 80003e00: 00850513 addi x10,x10,8 + +0000000080003e04 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000: + sm4ks x16, x25, x9, 2 # perform operation + 80003e04: b49c8833 sm4ks x16,x25,x9,0x2 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000000_str) + 80003e08: 0001b383 ld x7,0(x3) + 80003e0c: 01038c63 beq x7,x16,80003e24 + 80003e10: 3c80746f jal x8,8000b1d8 + 80003e14: 80003e04 .word 0x80003e04 + 80003e18: 00000000 .word 0x00000000 + 80003e1c: 800197e3 .word 0x800197e3 + 80003e20: 00000000 .word 0x00000000 + 80003e24: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0xaaaaaaaaaaaaaaaa rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xaaaaaaaaaaaaaaaa + 80003e28: 00053783 ld x15,0(x10) + 80003e2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000001 + 80003e30: 00053b83 ld x23,0(x10) + 80003e34: 00850513 addi x10,x10,8 + +0000000080003e38 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001: + sm4ks x19, x15, x23, 0 # perform operation + 80003e38: 357789b3 sm4ks x19,x15,x23,0x0 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xaaaaaaaaaaaaaaaa_rs2val_0x100000001_str) + 80003e3c: 0001b383 ld x7,0(x3) + 80003e40: 01338c63 beq x7,x19,80003e58 + 80003e44: 3940746f jal x8,8000b1d8 + 80003e48: 80003e38 .word 0x80003e38 + 80003e4c: 00000000 .word 0x00000000 + 80003e50: 8001984d .word 0x8001984d + 80003e54: 00000000 .word 0x00000000 + 80003e58: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x5555555555555555 + 80003e5c: 00053303 ld x6,0(x10) + 80003e60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x0000000000000000 + 80003e64: 00053803 ld x16,0(x10) + 80003e68: 00850513 addi x10,x10,8 + +0000000080003e6c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0: + sm4ks x5, x6, x16, 3 # perform operation + 80003e6c: f50302b3 sm4ks x5,x6,x16,0x3 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x0_str) + 80003e70: 0001b383 ld x7,0(x3) + 80003e74: 00538c63 beq x7,x5,80003e8c + 80003e78: 3600746f jal x8,8000b1d8 + 80003e7c: 80003e6c .word 0x80003e6c + 80003e80: 00000000 .word 0x00000000 + 80003e84: 800198b7 .word 0x800198b7 + 80003e88: 00000000 .word 0x00000000 + 80003e8c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80003e90: 00053b03 ld x22,0(x10) + 80003e94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x0000000000000001 + 80003e98: 00053283 ld x5,0(x10) + 80003e9c: 00850513 addi x10,x10,8 + +0000000080003ea0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1: + sm4ks x18, x22, x5, 2 # perform operation + 80003ea0: b45b0933 sm4ks x18,x22,x5,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x1_str) + 80003ea4: 0001b383 ld x7,0(x3) + 80003ea8: 01238c63 beq x7,x18,80003ec0 + 80003eac: 32c0746f jal x8,8000b1d8 + 80003eb0: 80003ea0 .word 0x80003ea0 + 80003eb4: 00000000 .word 0x00000000 + 80003eb8: 80019919 .word 0x80019919 + 80003ebc: 00000000 .word 0x00000000 + 80003ec0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x5555555555555555 + 80003ec4: 00053703 ld x14,0(x10) + 80003ec8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x0000000000000002 + 80003ecc: 00053903 ld x18,0(x10) + 80003ed0: 00850513 addi x10,x10,8 + +0000000080003ed4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2: + sm4ks x9, x14, x18, 2 # perform operation + 80003ed4: b52704b3 sm4ks x9,x14,x18,0x2 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x2_str) + 80003ed8: 0001b383 ld x7,0(x3) + 80003edc: 00938c63 beq x7,x9,80003ef4 + 80003ee0: 2f80746f jal x8,8000b1d8 + 80003ee4: 80003ed4 .word 0x80003ed4 + 80003ee8: 00000000 .word 0x00000000 + 80003eec: 8001997b .word 0x8001997b + 80003ef0: 00000000 .word 0x00000000 + 80003ef4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5555555555555555 + 80003ef8: 00053f03 ld x30,0(x10) + 80003efc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x8000000000000000 + 80003f00: 00053b83 ld x23,0(x10) + 80003f04: 00850513 addi x10,x10,8 + +0000000080003f08 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000: + sm4ks x19, x30, x23, 3 # perform operation + 80003f08: f57f09b3 sm4ks x19,x30,x23,0x3 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000000_str) + 80003f0c: 0001b383 ld x7,0(x3) + 80003f10: 01338c63 beq x7,x19,80003f28 + 80003f14: 2c40746f jal x8,8000b1d8 + 80003f18: 80003f08 .word 0x80003f08 + 80003f1c: 00000000 .word 0x00000000 + 80003f20: 800199dd .word 0x800199dd + 80003f24: 00000000 .word 0x00000000 + 80003f28: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5555555555555555 + 80003f2c: 00053083 ld x1,0(x10) + 80003f30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x8000000000000001 + 80003f34: 00053303 ld x6,0(x10) + 80003f38: 00850513 addi x10,x10,8 + +0000000080003f3c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001: + sm4ks x21, x1, x6, 3 # perform operation + 80003f3c: f4608ab3 sm4ks x21,x1,x6,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x8000000000000001_str) + 80003f40: 0001b383 ld x7,0(x3) + 80003f44: 01538c63 beq x7,x21,80003f5c + 80003f48: 2900746f jal x8,8000b1d8 + 80003f4c: 80003f3c .word 0x80003f3c + 80003f50: 00000000 .word 0x00000000 + 80003f54: 80019a4e .word 0x80019a4e + 80003f58: 00000000 .word 0x00000000 + 80003f5c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x5555555555555555 + 80003f60: 00053e83 ld x29,0(x10) + 80003f64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x7fffffffffffffff + 80003f68: 00053f03 ld x30,0(x10) + 80003f6c: 00850513 addi x10,x10,8 + +0000000080003f70 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff: + sm4ks x22, x29, x30, 3 # perform operation + 80003f70: f5ee8b33 sm4ks x22,x29,x30,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7fffffffffffffff_str) + 80003f74: 0001b383 ld x7,0(x3) + 80003f78: 01638c63 beq x7,x22,80003f90 + 80003f7c: 25c0746f jal x8,8000b1d8 + 80003f80: 80003f70 .word 0x80003f70 + 80003f84: 00000000 .word 0x00000000 + 80003f88: 80019abf .word 0x80019abf + 80003f8c: 00000000 .word 0x00000000 + 80003f90: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5555555555555555 + 80003f94: 00053683 ld x13,0(x10) + 80003f98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7ffffffffffffffe + 80003f9c: 00053103 ld x2,0(x10) + 80003fa0: 00850513 addi x10,x10,8 + +0000000080003fa4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe: + sm4ks x22, x13, x2, 2 # perform operation + 80003fa4: b4268b33 sm4ks x22,x13,x2,0x2 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x7ffffffffffffffe_str) + 80003fa8: 0001b383 ld x7,0(x3) + 80003fac: 01638c63 beq x7,x22,80003fc4 + 80003fb0: 2280746f jal x8,8000b1d8 + 80003fb4: 80003fa4 .word 0x80003fa4 + 80003fb8: 00000000 .word 0x00000000 + 80003fbc: 80019b30 .word 0x80019b30 + 80003fc0: 00000000 .word 0x00000000 + 80003fc4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80003fc8: 00053b03 ld x22,0(x10) + 80003fcc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80003fd0: 00053c03 ld x24,0(x10) + 80003fd4: 00850513 addi x10,x10,8 + +0000000080003fd8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff: + sm4ks x13, x22, x24, 1 # perform operation + 80003fd8: 758b06b3 sm4ks x13,x22,x24,0x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffffffffffff_str) + 80003fdc: 0001b383 ld x7,0(x3) + 80003fe0: 00d38c63 beq x7,x13,80003ff8 + 80003fe4: 1f40746f jal x8,8000b1d8 + 80003fe8: 80003fd8 .word 0x80003fd8 + 80003fec: 00000000 .word 0x00000000 + 80003ff0: 80019ba1 .word 0x80019ba1 + 80003ff4: 00000000 .word 0x00000000 + 80003ff8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5555555555555555 + 80003ffc: 00053c83 ld x25,0(x10) + 80004000: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0xfffffffffffffffe + 80004004: 00053883 ld x17,0(x10) + 80004008: 00850513 addi x10,x10,8 + +000000008000400c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe: + sm4ks x1, x25, x17, 3 # perform operation + 8000400c: f51c80b3 sm4ks x1,x25,x17,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffffffffffe_str) + 80004010: 0001b383 ld x7,0(x3) + 80004014: 00138c63 beq x7,x1,8000402c + 80004018: 1c00746f jal x8,8000b1d8 + 8000401c: 8000400c .word 0x8000400c + 80004020: 00000000 .word 0x00000000 + 80004024: 80019c12 .word 0x80019c12 + 80004028: 00000000 .word 0x00000000 + 8000402c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x5555555555555555 + 80004030: 00053d83 ld x27,0(x10) + 80004034: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x5bbc887763ae86f2 + 80004038: 00053103 ld x2,0(x10) + 8000403c: 00850513 addi x10,x10,8 + +0000000080004040 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2: + sm4ks x4, x27, x2, 2 # perform operation + 80004040: b42d8233 sm4ks x4,x27,x2,0x2 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5bbc887763ae86f2_str) + 80004044: 0001b383 ld x7,0(x3) + 80004048: 00438c63 beq x7,x4,80004060 + 8000404c: 18c0746f jal x8,8000b1d8 + 80004050: 80004040 .word 0x80004040 + 80004054: 00000000 .word 0x00000000 + 80004058: 80019c83 .word 0x80019c83 + 8000405c: 00000000 .word 0x00000000 + 80004060: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x5555555555555555 + 80004064: 00053f83 ld x31,0(x10) + 80004068: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0xaaaaaaaaaaaaaaaa + 8000406c: 00053a03 ld x20,0(x10) + 80004070: 00850513 addi x10,x10,8 + +0000000080004074 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x5, x31, x20, 2 # perform operation + 80004074: b54f82b3 sm4ks x5,x31,x20,0x2 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004078: 0001b383 ld x7,0(x3) + 8000407c: 00538c63 beq x7,x5,80004094 + 80004080: 1580746f jal x8,8000b1d8 + 80004084: 80004074 .word 0x80004074 + 80004088: 00000000 .word 0x00000000 + 8000408c: 80019cf4 .word 0x80019cf4 + 80004090: 00000000 .word 0x00000000 + 80004094: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x5555555555555555 + 80004098: 00053f03 ld x30,0(x10) + 8000409c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5555555555555555 + 800040a0: 00053b03 ld x22,0(x10) + 800040a4: 00850513 addi x10,x10,8 + +00000000800040a8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555: + sm4ks x31, x30, x22, 1 # perform operation + 800040a8: 756f0fb3 sm4ks x31,x30,x22,0x1 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x5555555555555555_str) + 800040ac: 0001b383 ld x7,0(x3) + 800040b0: 01f38c63 beq x7,x31,800040c8 + 800040b4: 1240746f jal x8,8000b1d8 + 800040b8: 800040a8 .word 0x800040a8 + 800040bc: 00000000 .word 0x00000000 + 800040c0: 80019d65 .word 0x80019d65 + 800040c4: 00000000 .word 0x00000000 + 800040c8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 800040cc: 00053b03 ld x22,0(x10) + 800040d0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x00000000ffffffff + 800040d4: 00053a03 ld x20,0(x10) + 800040d8: 00850513 addi x10,x10,8 + +00000000800040dc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff: + sm4ks x24, x22, x20, 3 # perform operation + 800040dc: f54b0c33 sm4ks x24,x22,x20,0x3 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xffffffff_str) + 800040e0: 0001b383 ld x7,0(x3) + 800040e4: 01838c63 beq x7,x24,800040fc + 800040e8: 0f00746f jal x8,8000b1d8 + 800040ec: 800040dc .word 0x800040dc + 800040f0: 00000000 .word 0x00000000 + 800040f4: 80019dd6 .word 0x80019dd6 + 800040f8: 00000000 .word 0x00000000 + 800040fc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x5555555555555555 + 80004100: 00053483 ld x9,0(x10) + 80004104: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x00000000fffffffe + 80004108: 00053d03 ld x26,0(x10) + 8000410c: 00850513 addi x10,x10,8 + +0000000080004110 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe: + sm4ks x1, x9, x26, 3 # perform operation + 80004110: f5a480b3 sm4ks x1,x9,x26,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0xfffffffe_str) + 80004114: 0001b383 ld x7,0(x3) + 80004118: 00138c63 beq x7,x1,80004130 + 8000411c: 0bc0746f jal x8,8000b1d8 + 80004120: 80004110 .word 0x80004110 + 80004124: 00000000 .word 0x00000000 + 80004128: 80019e3f .word 0x80019e3f + 8000412c: 00000000 .word 0x00000000 + 80004130: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x5555555555555555 + 80004134: 00053683 ld x13,0(x10) + 80004138: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x0000000100000000 + 8000413c: 00053e83 ld x29,0(x10) + 80004140: 00850513 addi x10,x10,8 + +0000000080004144 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000: + sm4ks x27, x13, x29, 2 # perform operation + 80004144: b5d68db3 sm4ks x27,x13,x29,0x2 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000000_str) + 80004148: 0001b383 ld x7,0(x3) + 8000414c: 01b38c63 beq x7,x27,80004164 + 80004150: 0880746f jal x8,8000b1d8 + 80004154: 80004144 .word 0x80004144 + 80004158: 00000000 .word 0x00000000 + 8000415c: 80019ea8 .word 0x80019ea8 + 80004160: 00000000 .word 0x00000000 + 80004164: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x5555555555555555 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x5555555555555555 + 80004168: 00053b03 ld x22,0(x10) + 8000416c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000100000001 + 80004170: 00053083 ld x1,0(x10) + 80004174: 00850513 addi x10,x10,8 + +0000000080004178 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001: + sm4ks x9, x22, x1, 3 # perform operation + 80004178: f41b04b3 sm4ks x9,x22,x1,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x5555555555555555_rs2val_0x100000001_str) + 8000417c: 0001b383 ld x7,0(x3) + 80004180: 00938c63 beq x7,x9,80004198 + 80004184: 0540746f jal x8,8000b1d8 + 80004188: 80004178 .word 0x80004178 + 8000418c: 00000000 .word 0x00000000 + 80004190: 80019f12 .word 0x80019f12 + 80004194: 00000000 .word 0x00000000 + 80004198: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000ffffffff + 8000419c: 00053e83 ld x29,0(x10) + 800041a0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000000000000 + 800041a4: 00053b83 ld x23,0(x10) + 800041a8: 00850513 addi x10,x10,8 + +00000000800041ac : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0: + sm4ks x9, x29, x23, 3 # perform operation + 800041ac: f57e84b3 sm4ks x9,x29,x23,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x0_str) + 800041b0: 0001b383 ld x7,0(x3) + 800041b4: 00938c63 beq x7,x9,800041cc + 800041b8: 0200746f jal x8,8000b1d8 + 800041bc: 800041ac .word 0x800041ac + 800041c0: 00000000 .word 0x00000000 + 800041c4: 80019f7c .word 0x80019f7c + 800041c8: 00000000 .word 0x00000000 + 800041cc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x00000000ffffffff + 800041d0: 00053b03 ld x22,0(x10) + 800041d4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs2: x14 = 0x0000000000000001 + 800041d8: 00053703 ld x14,0(x10) + 800041dc: 00850513 addi x10,x10,8 + +00000000800041e0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1: + sm4ks x5, x22, x14, 0 # perform operation + 800041e0: 34eb02b3 sm4ks x5,x22,x14,0x0 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x1_str) + 800041e4: 0001b383 ld x7,0(x3) + 800041e8: 00538c63 beq x7,x5,80004200 + 800041ec: 7ed0646f jal x8,8000b1d8 + 800041f0: 800041e0 .word 0x800041e0 + 800041f4: 00000000 .word 0x00000000 + 800041f8: 80019fd6 .word 0x80019fd6 + 800041fc: 00000000 .word 0x00000000 + 80004200: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x00000000ffffffff + 80004204: 00053203 ld x4,0(x10) + 80004208: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000000000002 + 8000420c: 00053c03 ld x24,0(x10) + 80004210: 00850513 addi x10,x10,8 + +0000000080004214 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2: + sm4ks x21, x4, x24, 1 # perform operation + 80004214: 75820ab3 sm4ks x21,x4,x24,0x1 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x2_str) + 80004218: 0001b383 ld x7,0(x3) + 8000421c: 01538c63 beq x7,x21,80004234 + 80004220: 7b90646f jal x8,8000b1d8 + 80004224: 80004214 .word 0x80004214 + 80004228: 00000000 .word 0x00000000 + 8000422c: 8001a030 .word 0x8001a030 + 80004230: 00000000 .word 0x00000000 + 80004234: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x00000000ffffffff + 80004238: 00053783 ld x15,0(x10) + 8000423c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x8000000000000000 + 80004240: 00053a03 ld x20,0(x10) + 80004244: 00850513 addi x10,x10,8 + +0000000080004248 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000: + sm4ks x23, x15, x20, 1 # perform operation + 80004248: 75478bb3 sm4ks x23,x15,x20,0x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000000_str) + 8000424c: 0001b383 ld x7,0(x3) + 80004250: 01738c63 beq x7,x23,80004268 + 80004254: 7850646f jal x8,8000b1d8 + 80004258: 80004248 .word 0x80004248 + 8000425c: 00000000 .word 0x00000000 + 80004260: 8001a08a .word 0x8001a08a + 80004264: 00000000 .word 0x00000000 + 80004268: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000ffffffff + 8000426c: 00053f83 ld x31,0(x10) + 80004270: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x8000000000000001 + 80004274: 00053283 ld x5,0(x10) + 80004278: 00850513 addi x10,x10,8 + +000000008000427c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001: + sm4ks x12, x31, x5, 0 # perform operation + 8000427c: 345f8633 sm4ks x12,x31,x5,0x0 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x8000000000000001_str) + 80004280: 0001b383 ld x7,0(x3) + 80004284: 00c38c63 beq x7,x12,8000429c + 80004288: 7510646f jal x8,8000b1d8 + 8000428c: 8000427c .word 0x8000427c + 80004290: 00000000 .word 0x00000000 + 80004294: 8001a0f3 .word 0x8001a0f3 + 80004298: 00000000 .word 0x00000000 + 8000429c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000ffffffff + 800042a0: 00053d83 ld x27,0(x10) + 800042a4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x7fffffffffffffff + 800042a8: 00053103 ld x2,0(x10) + 800042ac: 00850513 addi x10,x10,8 + +00000000800042b0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff: + sm4ks x23, x27, x2, 1 # perform operation + 800042b0: 742d8bb3 sm4ks x23,x27,x2,0x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7fffffffffffffff_str) + 800042b4: 0001b383 ld x7,0(x3) + 800042b8: 01738c63 beq x7,x23,800042d0 + 800042bc: 71d0646f jal x8,8000b1d8 + 800042c0: 800042b0 .word 0x800042b0 + 800042c4: 00000000 .word 0x00000000 + 800042c8: 8001a15c .word 0x8001a15c + 800042cc: 00000000 .word 0x00000000 + 800042d0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x00000000ffffffff + 800042d4: 00053083 ld x1,0(x10) + 800042d8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7ffffffffffffffe + 800042dc: 00053303 ld x6,0(x10) + 800042e0: 00850513 addi x10,x10,8 + +00000000800042e4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe: + sm4ks x15, x1, x6, 1 # perform operation + 800042e4: 746087b3 sm4ks x15,x1,x6,0x1 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x7ffffffffffffffe_str) + 800042e8: 0001b383 ld x7,0(x3) + 800042ec: 00f38c63 beq x7,x15,80004304 + 800042f0: 6e90646f jal x8,8000b1d8 + 800042f4: 800042e4 .word 0x800042e4 + 800042f8: 00000000 .word 0x00000000 + 800042fc: 8001a1c5 .word 0x8001a1c5 + 80004300: 00000000 .word 0x00000000 + 80004304: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x00000000ffffffff + 80004308: 00053683 ld x13,0(x10) + 8000430c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xffffffffffffffff + 80004310: 00053e83 ld x29,0(x10) + 80004314: 00850513 addi x10,x10,8 + +0000000080004318 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff: + sm4ks x23, x13, x29, 2 # perform operation + 80004318: b5d68bb3 sm4ks x23,x13,x29,0x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffffffffffff_str) + 8000431c: 0001b383 ld x7,0(x3) + 80004320: 01738c63 beq x7,x23,80004338 + 80004324: 6b50646f jal x8,8000b1d8 + 80004328: 80004318 .word 0x80004318 + 8000432c: 00000000 .word 0x00000000 + 80004330: 8001a22e .word 0x8001a22e + 80004334: 00000000 .word 0x00000000 + 80004338: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x00000000ffffffff + 8000433c: 00053483 ld x9,0(x10) + 80004340: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xfffffffffffffffe + 80004344: 00053c03 ld x24,0(x10) + 80004348: 00850513 addi x10,x10,8 + +000000008000434c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe: + sm4ks x2, x9, x24, 2 # perform operation + 8000434c: b5848133 sm4ks x2,x9,x24,0x2 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffffffffffe_str) + 80004350: 0001b383 ld x7,0(x3) + 80004354: 00238c63 beq x7,x2,8000436c + 80004358: 6810646f jal x8,8000b1d8 + 8000435c: 8000434c .word 0x8000434c + 80004360: 00000000 .word 0x00000000 + 80004364: 8001a297 .word 0x8001a297 + 80004368: 00000000 .word 0x00000000 + 8000436c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000ffffffff + 80004370: 00053a83 ld x21,0(x10) + 80004374: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x5bbc887763ae86f2 + 80004378: 00053d03 ld x26,0(x10) + 8000437c: 00850513 addi x10,x10,8 + +0000000080004380 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2: + sm4ks x30, x21, x26, 0 # perform operation + 80004380: 35aa8f33 sm4ks x30,x21,x26,0x0 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5bbc887763ae86f2_str) + 80004384: 0001b383 ld x7,0(x3) + 80004388: 01e38c63 beq x7,x30,800043a0 + 8000438c: 64d0646f jal x8,8000b1d8 + 80004390: 80004380 .word 0x80004380 + 80004394: 00000000 .word 0x00000000 + 80004398: 8001a300 .word 0x8001a300 + 8000439c: 00000000 .word 0x00000000 + 800043a0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x00000000ffffffff + 800043a4: 00053883 ld x17,0(x10) + 800043a8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0xaaaaaaaaaaaaaaaa + 800043ac: 00053c83 ld x25,0(x10) + 800043b0: 00850513 addi x10,x10,8 + +00000000800043b4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x20, x17, x25, 0 # perform operation + 800043b4: 35988a33 sm4ks x20,x17,x25,0x0 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800043b8: 0001b383 ld x7,0(x3) + 800043bc: 01438c63 beq x7,x20,800043d4 + 800043c0: 6190646f jal x8,8000b1d8 + 800043c4: 800043b4 .word 0x800043b4 + 800043c8: 00000000 .word 0x00000000 + 800043cc: 8001a369 .word 0x8001a369 + 800043d0: 00000000 .word 0x00000000 + 800043d4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000000ffffffff + 800043d8: 00053103 ld x2,0(x10) + 800043dc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x5555555555555555 + 800043e0: 00053683 ld x13,0(x10) + 800043e4: 00850513 addi x10,x10,8 + +00000000800043e8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555: + sm4ks x14, x2, x13, 3 # perform operation + 800043e8: f4d10733 sm4ks x14,x2,x13,0x3 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x5555555555555555_str) + 800043ec: 0001b383 ld x7,0(x3) + 800043f0: 00e38c63 beq x7,x14,80004408 + 800043f4: 5e50646f jal x8,8000b1d8 + 800043f8: 800043e8 .word 0x800043e8 + 800043fc: 00000000 .word 0x00000000 + 80004400: 8001a3d2 .word 0x8001a3d2 + 80004404: 00000000 .word 0x00000000 + 80004408: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x00000000ffffffff + 8000440c: 00053103 ld x2,0(x10) + 80004410: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x00000000ffffffff + 80004414: 00053203 ld x4,0(x10) + 80004418: 00850513 addi x10,x10,8 + +000000008000441c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff: + sm4ks x22, x2, x4, 3 # perform operation + 8000441c: f4410b33 sm4ks x22,x2,x4,0x3 + # Check if x22 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x22, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xffffffff_str) + 80004420: 0001b383 ld x7,0(x3) + 80004424: 01638c63 beq x7,x22,8000443c + 80004428: 5b10646f jal x8,8000b1d8 + 8000442c: 8000441c .word 0x8000441c + 80004430: 00000000 .word 0x00000000 + 80004434: 8001a43b .word 0x8001a43b + 80004438: 00000000 .word 0x00000000 + 8000443c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x00000000ffffffff + 80004440: 00053c83 ld x25,0(x10) + 80004444: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x00000000fffffffe + 80004448: 00053f03 ld x30,0(x10) + 8000444c: 00850513 addi x10,x10,8 + +0000000080004450 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe: + sm4ks x9, x25, x30, 1 # perform operation + 80004450: 75ec84b3 sm4ks x9,x25,x30,0x1 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0xfffffffe_str) + 80004454: 0001b383 ld x7,0(x3) + 80004458: 00938c63 beq x7,x9,80004470 + 8000445c: 57d0646f jal x8,8000b1d8 + 80004460: 80004450 .word 0x80004450 + 80004464: 00000000 .word 0x00000000 + 80004468: 8001a49c .word 0x8001a49c + 8000446c: 00000000 .word 0x00000000 + 80004470: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x00000000ffffffff + 80004474: 00053203 ld x4,0(x10) + 80004478: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000100000000 + 8000447c: 00053f83 ld x31,0(x10) + 80004480: 00850513 addi x10,x10,8 + +0000000080004484 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000: + sm4ks x18, x4, x31, 1 # perform operation + 80004484: 75f20933 sm4ks x18,x4,x31,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000000_str) + 80004488: 0001b383 ld x7,0(x3) + 8000448c: 01238c63 beq x7,x18,800044a4 + 80004490: 5490646f jal x8,8000b1d8 + 80004494: 80004484 .word 0x80004484 + 80004498: 00000000 .word 0x00000000 + 8000449c: 8001a4fd .word 0x8001a4fd + 800044a0: 00000000 .word 0x00000000 + 800044a4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000ffffffff rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000ffffffff + 800044a8: 00053303 ld x6,0(x10) + 800044ac: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000001 + 800044b0: 00053483 ld x9,0(x10) + 800044b4: 00850513 addi x10,x10,8 + +00000000800044b8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001: + sm4ks x31, x6, x9, 0 # perform operation + 800044b8: 34930fb3 sm4ks x31,x6,x9,0x0 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xffffffff_rs2val_0x100000001_str) + 800044bc: 0001b383 ld x7,0(x3) + 800044c0: 01f38c63 beq x7,x31,800044d8 + 800044c4: 5150646f jal x8,8000b1d8 + 800044c8: 800044b8 .word 0x800044b8 + 800044cc: 00000000 .word 0x00000000 + 800044d0: 8001a55f .word 0x8001a55f + 800044d4: 00000000 .word 0x00000000 + 800044d8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000fffffffe + 800044dc: 00053f03 ld x30,0(x10) + 800044e0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x0000000000000000 + 800044e4: 00053d03 ld x26,0(x10) + 800044e8: 00850513 addi x10,x10,8 + +00000000800044ec : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0: + sm4ks x25, x30, x26, 1 # perform operation + 800044ec: 75af0cb3 sm4ks x25,x30,x26,0x1 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x0_str) + 800044f0: 0001b383 ld x7,0(x3) + 800044f4: 01938c63 beq x7,x25,8000450c + 800044f8: 4e10646f jal x8,8000b1d8 + 800044fc: 800044ec .word 0x800044ec + 80004500: 00000000 .word 0x00000000 + 80004504: 8001a5c1 .word 0x8001a5c1 + 80004508: 00000000 .word 0x00000000 + 8000450c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000fffffffe + 80004510: 00053e83 ld x29,0(x10) + 80004514: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x0000000000000001 + 80004518: 00053e03 ld x28,0(x10) + 8000451c: 00850513 addi x10,x10,8 + +0000000080004520 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1: + sm4ks x6, x29, x28, 0 # perform operation + 80004520: 35ce8333 sm4ks x6,x29,x28,0x0 + # Check if x6 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x6, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x1_str) + 80004524: 0001b383 ld x7,0(x3) + 80004528: 00638c63 beq x7,x6,80004540 + 8000452c: 4ad0646f jal x8,8000b1d8 + 80004530: 80004520 .word 0x80004520 + 80004534: 00000000 .word 0x00000000 + 80004538: 8001a61b .word 0x8001a61b + 8000453c: 00000000 .word 0x00000000 + 80004540: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x00000000fffffffe + 80004544: 00053e83 ld x29,0(x10) + 80004548: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000000000002 + 8000454c: 00053483 ld x9,0(x10) + 80004550: 00850513 addi x10,x10,8 + +0000000080004554 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2: + sm4ks x23, x29, x9, 2 # perform operation + 80004554: b49e8bb3 sm4ks x23,x29,x9,0x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x2_str) + 80004558: 0001b383 ld x7,0(x3) + 8000455c: 01738c63 beq x7,x23,80004574 + 80004560: 4790646f jal x8,8000b1d8 + 80004564: 80004554 .word 0x80004554 + 80004568: 00000000 .word 0x00000000 + 8000456c: 8001a675 .word 0x8001a675 + 80004570: 00000000 .word 0x00000000 + 80004574: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x00000000fffffffe + 80004578: 00053a03 ld x20,0(x10) + 8000457c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x8000000000000000 + 80004580: 00053583 ld x11,0(x10) + 80004584: 00850513 addi x10,x10,8 + +0000000080004588 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000: + sm4ks x4, x20, x11, 3 # perform operation + 80004588: f4ba0233 sm4ks x4,x20,x11,0x3 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000000_str) + 8000458c: 0001b383 ld x7,0(x3) + 80004590: 00438c63 beq x7,x4,800045a8 + 80004594: 4450646f jal x8,8000b1d8 + 80004598: 80004588 .word 0x80004588 + 8000459c: 00000000 .word 0x00000000 + 800045a0: 8001a6cf .word 0x8001a6cf + 800045a4: 00000000 .word 0x00000000 + 800045a8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0x00000000fffffffe + 800045ac: 00053a83 ld x21,0(x10) + 800045b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x8000000000000001 + 800045b4: 00053b03 ld x22,0(x10) + 800045b8: 00850513 addi x10,x10,8 + +00000000800045bc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001: + sm4ks x20, x21, x22, 1 # perform operation + 800045bc: 756a8a33 sm4ks x20,x21,x22,0x1 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x8000000000000001_str) + 800045c0: 0001b383 ld x7,0(x3) + 800045c4: 01438c63 beq x7,x20,800045dc + 800045c8: 4110646f jal x8,8000b1d8 + 800045cc: 800045bc .word 0x800045bc + 800045d0: 00000000 .word 0x00000000 + 800045d4: 8001a738 .word 0x8001a738 + 800045d8: 00000000 .word 0x00000000 + 800045dc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000fffffffe + 800045e0: 00053c03 ld x24,0(x10) + 800045e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x7fffffffffffffff + 800045e8: 00053b83 ld x23,0(x10) + 800045ec: 00850513 addi x10,x10,8 + +00000000800045f0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff: + sm4ks x27, x24, x23, 3 # perform operation + 800045f0: f57c0db3 sm4ks x27,x24,x23,0x3 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7fffffffffffffff_str) + 800045f4: 0001b383 ld x7,0(x3) + 800045f8: 01b38c63 beq x7,x27,80004610 + 800045fc: 3dd0646f jal x8,8000b1d8 + 80004600: 800045f0 .word 0x800045f0 + 80004604: 00000000 .word 0x00000000 + 80004608: 8001a7a1 .word 0x8001a7a1 + 8000460c: 00000000 .word 0x00000000 + 80004610: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x00000000fffffffe + 80004614: 00053c03 ld x24,0(x10) + 80004618: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0x7ffffffffffffffe + 8000461c: 00053e03 ld x28,0(x10) + 80004620: 00850513 addi x10,x10,8 + +0000000080004624 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe: + sm4ks x27, x24, x28, 2 # perform operation + 80004624: b5cc0db3 sm4ks x27,x24,x28,0x2 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x7ffffffffffffffe_str) + 80004628: 0001b383 ld x7,0(x3) + 8000462c: 01b38c63 beq x7,x27,80004644 + 80004630: 3a90646f jal x8,8000b1d8 + 80004634: 80004624 .word 0x80004624 + 80004638: 00000000 .word 0x00000000 + 8000463c: 8001a80a .word 0x8001a80a + 80004640: 00000000 .word 0x00000000 + 80004644: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 80004648: 00053303 ld x6,0(x10) + 8000464c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0xffffffffffffffff + 80004650: 00053283 ld x5,0(x10) + 80004654: 00850513 addi x10,x10,8 + +0000000080004658 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff: + sm4ks x26, x6, x5, 3 # perform operation + 80004658: f4530d33 sm4ks x26,x6,x5,0x3 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffffffffffff_str) + 8000465c: 0001b383 ld x7,0(x3) + 80004660: 01a38c63 beq x7,x26,80004678 + 80004664: 3750646f jal x8,8000b1d8 + 80004668: 80004658 .word 0x80004658 + 8000466c: 00000000 .word 0x00000000 + 80004670: 8001a873 .word 0x8001a873 + 80004674: 00000000 .word 0x00000000 + 80004678: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 8000467c: 00053d83 ld x27,0(x10) + 80004680: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xfffffffffffffffe + 80004684: 00053f03 ld x30,0(x10) + 80004688: 00850513 addi x10,x10,8 + +000000008000468c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe: + sm4ks x23, x27, x30, 2 # perform operation + 8000468c: b5ed8bb3 sm4ks x23,x27,x30,0x2 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffffffffffe_str) + 80004690: 0001b383 ld x7,0(x3) + 80004694: 01738c63 beq x7,x23,800046ac + 80004698: 3410646f jal x8,8000b1d8 + 8000469c: 8000468c .word 0x8000468c + 800046a0: 00000000 .word 0x00000000 + 800046a4: 8001a8dc .word 0x8001a8dc + 800046a8: 00000000 .word 0x00000000 + 800046ac: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x00000000fffffffe + 800046b0: 00053303 ld x6,0(x10) + 800046b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x5bbc887763ae86f2 + 800046b8: 00053883 ld x17,0(x10) + 800046bc: 00850513 addi x10,x10,8 + +00000000800046c0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2: + sm4ks x29, x6, x17, 0 # perform operation + 800046c0: 35130eb3 sm4ks x29,x6,x17,0x0 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5bbc887763ae86f2_str) + 800046c4: 0001b383 ld x7,0(x3) + 800046c8: 01d38c63 beq x7,x29,800046e0 + 800046cc: 30d0646f jal x8,8000b1d8 + 800046d0: 800046c0 .word 0x800046c0 + 800046d4: 00000000 .word 0x00000000 + 800046d8: 8001a945 .word 0x8001a945 + 800046dc: 00000000 .word 0x00000000 + 800046e0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x00000000fffffffe + 800046e4: 00053f03 ld x30,0(x10) + 800046e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xaaaaaaaaaaaaaaaa + 800046ec: 00053b03 ld x22,0(x10) + 800046f0: 00850513 addi x10,x10,8 + +00000000800046f4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x5, x30, x22, 1 # perform operation + 800046f4: 756f02b3 sm4ks x5,x30,x22,0x1 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xaaaaaaaaaaaaaaaa_str) + 800046f8: 0001b383 ld x7,0(x3) + 800046fc: 00538c63 beq x7,x5,80004714 + 80004700: 2d90646f jal x8,8000b1d8 + 80004704: 800046f4 .word 0x800046f4 + 80004708: 00000000 .word 0x00000000 + 8000470c: 8001a9ae .word 0x8001a9ae + 80004710: 00000000 .word 0x00000000 + 80004714: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x00000000fffffffe + 80004718: 00053583 ld x11,0(x10) + 8000471c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x5555555555555555 + 80004720: 00053f83 ld x31,0(x10) + 80004724: 00850513 addi x10,x10,8 + +0000000080004728 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555: + sm4ks x15, x11, x31, 3 # perform operation + 80004728: f5f587b3 sm4ks x15,x11,x31,0x3 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x5555555555555555_str) + 8000472c: 0001b383 ld x7,0(x3) + 80004730: 00f38c63 beq x7,x15,80004748 + 80004734: 2a50646f jal x8,8000b1d8 + 80004738: 80004728 .word 0x80004728 + 8000473c: 00000000 .word 0x00000000 + 80004740: 8001aa17 .word 0x8001aa17 + 80004744: 00000000 .word 0x00000000 + 80004748: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x00000000fffffffe + 8000474c: 00053b83 ld x23,0(x10) + 80004750: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x00000000ffffffff + 80004754: 00053d03 ld x26,0(x10) + 80004758: 00850513 addi x10,x10,8 + +000000008000475c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff: + sm4ks x18, x23, x26, 1 # perform operation + 8000475c: 75ab8933 sm4ks x18,x23,x26,0x1 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xffffffff_str) + 80004760: 0001b383 ld x7,0(x3) + 80004764: 01238c63 beq x7,x18,8000477c + 80004768: 2710646f jal x8,8000b1d8 + 8000476c: 8000475c .word 0x8000475c + 80004770: 00000000 .word 0x00000000 + 80004774: 8001aa80 .word 0x8001aa80 + 80004778: 00000000 .word 0x00000000 + 8000477c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x00000000fffffffe + 80004780: 00053203 ld x4,0(x10) + 80004784: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x00000000fffffffe + 80004788: 00053d83 ld x27,0(x10) + 8000478c: 00850513 addi x10,x10,8 + +0000000080004790 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe: + sm4ks x24, x4, x27, 2 # perform operation + 80004790: b5b20c33 sm4ks x24,x4,x27,0x2 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0xfffffffe_str) + 80004794: 0001b383 ld x7,0(x3) + 80004798: 01838c63 beq x7,x24,800047b0 + 8000479c: 23d0646f jal x8,8000b1d8 + 800047a0: 80004790 .word 0x80004790 + 800047a4: 00000000 .word 0x00000000 + 800047a8: 8001aae1 .word 0x8001aae1 + 800047ac: 00000000 .word 0x00000000 + 800047b0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x00000000fffffffe + 800047b4: 00053f83 ld x31,0(x10) + 800047b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x0000000100000000 + 800047bc: 00053203 ld x4,0(x10) + 800047c0: 00850513 addi x10,x10,8 + +00000000800047c4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000: + sm4ks x12, x31, x4, 2 # perform operation + 800047c4: b44f8633 sm4ks x12,x31,x4,0x2 + # Check if x12 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x12, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000000_str) + 800047c8: 0001b383 ld x7,0(x3) + 800047cc: 00c38c63 beq x7,x12,800047e4 + 800047d0: 2090646f jal x8,8000b1d8 + 800047d4: 800047c4 .word 0x800047c4 + 800047d8: 00000000 .word 0x00000000 + 800047dc: 8001ab42 .word 0x8001ab42 + 800047e0: 00000000 .word 0x00000000 + 800047e4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x00000000fffffffe rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x00000000fffffffe + 800047e8: 00053b03 ld x22,0(x10) + 800047ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0000000100000001 + 800047f0: 00053483 ld x9,0(x10) + 800047f4: 00850513 addi x10,x10,8 + +00000000800047f8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001: + sm4ks x23, x22, x9, 0 # perform operation + 800047f8: 349b0bb3 sm4ks x23,x22,x9,0x0 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0xfffffffe_rs2val_0x100000001_str) + 800047fc: 0001b383 ld x7,0(x3) + 80004800: 01738c63 beq x7,x23,80004818 + 80004804: 1d50646f jal x8,8000b1d8 + 80004808: 800047f8 .word 0x800047f8 + 8000480c: 00000000 .word 0x00000000 + 80004810: 8001aba4 .word 0x8001aba4 + 80004814: 00000000 .word 0x00000000 + 80004818: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000100000000 + 8000481c: 00053e83 ld x29,0(x10) + 80004820: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x0000000000000000 + 80004824: 00053f83 ld x31,0(x10) + 80004828: 00850513 addi x10,x10,8 + +000000008000482c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0: + sm4ks x21, x29, x31, 3 # perform operation + 8000482c: f5fe8ab3 sm4ks x21,x29,x31,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x0_str) + 80004830: 0001b383 ld x7,0(x3) + 80004834: 01538c63 beq x7,x21,8000484c + 80004838: 1a10646f jal x8,8000b1d8 + 8000483c: 8000482c .word 0x8000482c + 80004840: 00000000 .word 0x00000000 + 80004844: 8001ac06 .word 0x8001ac06 + 80004848: 00000000 .word 0x00000000 + 8000484c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000100000000 + 80004850: 00053f83 ld x31,0(x10) + 80004854: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0x0000000000000001 + 80004858: 00053683 ld x13,0(x10) + 8000485c: 00850513 addi x10,x10,8 + +0000000080004860 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1: + sm4ks x21, x31, x13, 2 # perform operation + 80004860: b4df8ab3 sm4ks x21,x31,x13,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x1_str) + 80004864: 0001b383 ld x7,0(x3) + 80004868: 01538c63 beq x7,x21,80004880 + 8000486c: 16d0646f jal x8,8000b1d8 + 80004870: 80004860 .word 0x80004860 + 80004874: 00000000 .word 0x00000000 + 80004878: 8001ac61 .word 0x8001ac61 + 8000487c: 00000000 .word 0x00000000 + 80004880: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000000 + 80004884: 00053e03 ld x28,0(x10) + 80004888: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x0000000000000002 + 8000488c: 00053103 ld x2,0(x10) + 80004890: 00850513 addi x10,x10,8 + +0000000080004894 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2: + sm4ks x1, x28, x2, 3 # perform operation + 80004894: f42e00b3 sm4ks x1,x28,x2,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x2_str) + 80004898: 0001b383 ld x7,0(x3) + 8000489c: 00138c63 beq x7,x1,800048b4 + 800048a0: 1390646f jal x8,8000b1d8 + 800048a4: 80004894 .word 0x80004894 + 800048a8: 00000000 .word 0x00000000 + 800048ac: 8001acbc .word 0x8001acbc + 800048b0: 00000000 .word 0x00000000 + 800048b4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000000 + 800048b8: 00053c03 ld x24,0(x10) + 800048bc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x8000000000000000 + 800048c0: 00053f83 ld x31,0(x10) + 800048c4: 00850513 addi x10,x10,8 + +00000000800048c8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000: + sm4ks x20, x24, x31, 3 # perform operation + 800048c8: f5fc0a33 sm4ks x20,x24,x31,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000000_str) + 800048cc: 0001b383 ld x7,0(x3) + 800048d0: 01438c63 beq x7,x20,800048e8 + 800048d4: 1050646f jal x8,8000b1d8 + 800048d8: 800048c8 .word 0x800048c8 + 800048dc: 00000000 .word 0x00000000 + 800048e0: 8001ad17 .word 0x8001ad17 + 800048e4: 00000000 .word 0x00000000 + 800048e8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000100000000 + 800048ec: 00053b83 ld x23,0(x10) + 800048f0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x8000000000000001 + 800048f4: 00053803 ld x16,0(x10) + 800048f8: 00850513 addi x10,x10,8 + +00000000800048fc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001: + sm4ks x29, x23, x16, 3 # perform operation + 800048fc: f50b8eb3 sm4ks x29,x23,x16,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x8000000000000001_str) + 80004900: 0001b383 ld x7,0(x3) + 80004904: 01d38c63 beq x7,x29,8000491c + 80004908: 0d10646f jal x8,8000b1d8 + 8000490c: 800048fc .word 0x800048fc + 80004910: 00000000 .word 0x00000000 + 80004914: 8001ad81 .word 0x8001ad81 + 80004918: 00000000 .word 0x00000000 + 8000491c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004920: 00053303 ld x6,0(x10) + 80004924: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x7fffffffffffffff + 80004928: 00053f83 ld x31,0(x10) + 8000492c: 00850513 addi x10,x10,8 + +0000000080004930 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff: + sm4ks x9, x6, x31, 0 # perform operation + 80004930: 35f304b3 sm4ks x9,x6,x31,0x0 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7fffffffffffffff_str) + 80004934: 0001b383 ld x7,0(x3) + 80004938: 00938c63 beq x7,x9,80004950 + 8000493c: 09d0646f jal x8,8000b1d8 + 80004940: 80004930 .word 0x80004930 + 80004944: 00000000 .word 0x00000000 + 80004948: 8001adeb .word 0x8001adeb + 8000494c: 00000000 .word 0x00000000 + 80004950: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x0000000100000000 + 80004954: 00053483 ld x9,0(x10) + 80004958: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x7ffffffffffffffe + 8000495c: 00053883 ld x17,0(x10) + 80004960: 00850513 addi x10,x10,8 + +0000000080004964 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe: + sm4ks x18, x9, x17, 2 # perform operation + 80004964: b5148933 sm4ks x18,x9,x17,0x2 + # Check if x18 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x18, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x7ffffffffffffffe_str) + 80004968: 0001b383 ld x7,0(x3) + 8000496c: 01238c63 beq x7,x18,80004984 + 80004970: 0690646f jal x8,8000b1d8 + 80004974: 80004964 .word 0x80004964 + 80004978: 00000000 .word 0x00000000 + 8000497c: 8001ae55 .word 0x8001ae55 + 80004980: 00000000 .word 0x00000000 + 80004984: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000000 + 80004988: 00053103 ld x2,0(x10) + 8000498c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0xffffffffffffffff + 80004990: 00053b03 ld x22,0(x10) + 80004994: 00850513 addi x10,x10,8 + +0000000080004998 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff: + sm4ks x21, x2, x22, 1 # perform operation + 80004998: 75610ab3 sm4ks x21,x2,x22,0x1 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffffffffffff_str) + 8000499c: 0001b383 ld x7,0(x3) + 800049a0: 01538c63 beq x7,x21,800049b8 + 800049a4: 0350646f jal x8,8000b1d8 + 800049a8: 80004998 .word 0x80004998 + 800049ac: 00000000 .word 0x00000000 + 800049b0: 8001aebf .word 0x8001aebf + 800049b4: 00000000 .word 0x00000000 + 800049b8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000100000000 + 800049bc: 00053103 ld x2,0(x10) + 800049c0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs2: x13 = 0xfffffffffffffffe + 800049c4: 00053683 ld x13,0(x10) + 800049c8: 00850513 addi x10,x10,8 + +00000000800049cc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe: + sm4ks x23, x2, x13, 3 # perform operation + 800049cc: f4d10bb3 sm4ks x23,x2,x13,0x3 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffffffffffe_str) + 800049d0: 0001b383 ld x7,0(x3) + 800049d4: 01738c63 beq x7,x23,800049ec + 800049d8: 0010646f jal x8,8000b1d8 + 800049dc: 800049cc .word 0x800049cc + 800049e0: 00000000 .word 0x00000000 + 800049e4: 8001af29 .word 0x8001af29 + 800049e8: 00000000 .word 0x00000000 + 800049ec: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000100000000 + 800049f0: 00053e83 ld x29,0(x10) + 800049f4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x5bbc887763ae86f2 + 800049f8: 00053903 ld x18,0(x10) + 800049fc: 00850513 addi x10,x10,8 + +0000000080004a00 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2: + sm4ks x11, x29, x18, 2 # perform operation + 80004a00: b52e85b3 sm4ks x11,x29,x18,0x2 + # Check if x11 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x11, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5bbc887763ae86f2_str) + 80004a04: 0001b383 ld x7,0(x3) + 80004a08: 00b38c63 beq x7,x11,80004a20 + 80004a0c: 7cc0646f jal x8,8000b1d8 + 80004a10: 80004a00 .word 0x80004a00 + 80004a14: 00000000 .word 0x00000000 + 80004a18: 8001af93 .word 0x8001af93 + 80004a1c: 00000000 .word 0x00000000 + 80004a20: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0000000100000000 + 80004a24: 00053d03 ld x26,0(x10) + 80004a28: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0xaaaaaaaaaaaaaaaa + 80004a2c: 00053483 ld x9,0(x10) + 80004a30: 00850513 addi x10,x10,8 + +0000000080004a34 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x25, x26, x9, 1 # perform operation + 80004a34: 749d0cb3 sm4ks x25,x26,x9,0x1 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004a38: 0001b383 ld x7,0(x3) + 80004a3c: 01938c63 beq x7,x25,80004a54 + 80004a40: 7980646f jal x8,8000b1d8 + 80004a44: 80004a34 .word 0x80004a34 + 80004a48: 00000000 .word 0x00000000 + 80004a4c: 8001affd .word 0x8001affd + 80004a50: 00000000 .word 0x00000000 + 80004a54: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004a58: 00053303 ld x6,0(x10) + 80004a5c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x5555555555555555 + 80004a60: 00053c83 ld x25,0(x10) + 80004a64: 00850513 addi x10,x10,8 + +0000000080004a68 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555: + sm4ks x16, x6, x25, 1 # perform operation + 80004a68: 75930833 sm4ks x16,x6,x25,0x1 + # Check if x16 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x16, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x5555555555555555_str) + 80004a6c: 0001b383 ld x7,0(x3) + 80004a70: 01038c63 beq x7,x16,80004a88 + 80004a74: 7640646f jal x8,8000b1d8 + 80004a78: 80004a68 .word 0x80004a68 + 80004a7c: 00000000 .word 0x00000000 + 80004a80: 8001b067 .word 0x8001b067 + 80004a84: 00000000 .word 0x00000000 + 80004a88: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000100000000 + 80004a8c: 00053f83 ld x31,0(x10) + 80004a90: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x00000000ffffffff + 80004a94: 00053b03 ld x22,0(x10) + 80004a98: 00850513 addi x10,x10,8 + +0000000080004a9c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff: + sm4ks x5, x31, x22, 1 # perform operation + 80004a9c: 756f82b3 sm4ks x5,x31,x22,0x1 + # Check if x5 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x5, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xffffffff_str) + 80004aa0: 0001b383 ld x7,0(x3) + 80004aa4: 00538c63 beq x7,x5,80004abc + 80004aa8: 7300646f jal x8,8000b1d8 + 80004aac: 80004a9c .word 0x80004a9c + 80004ab0: 00000000 .word 0x00000000 + 80004ab4: 8001b0d1 .word 0x8001b0d1 + 80004ab8: 00000000 .word 0x00000000 + 80004abc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000100000000 + 80004ac0: 00053b83 ld x23,0(x10) + 80004ac4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x00000000fffffffe + 80004ac8: 00053203 ld x4,0(x10) + 80004acc: 00850513 addi x10,x10,8 + +0000000080004ad0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe: + sm4ks x9, x23, x4, 0 # perform operation + 80004ad0: 344b84b3 sm4ks x9,x23,x4,0x0 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0xfffffffe_str) + 80004ad4: 0001b383 ld x7,0(x3) + 80004ad8: 00938c63 beq x7,x9,80004af0 + 80004adc: 6fc0646f jal x8,8000b1d8 + 80004ae0: 80004ad0 .word 0x80004ad0 + 80004ae4: 00000000 .word 0x00000000 + 80004ae8: 8001b133 .word 0x8001b133 + 80004aec: 00000000 .word 0x00000000 + 80004af0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000000 + 80004af4: 00053303 ld x6,0(x10) + 80004af8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0x0000000100000000 + 80004afc: 00053c03 ld x24,0(x10) + 80004b00: 00850513 addi x10,x10,8 + +0000000080004b04 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000: + sm4ks x13, x6, x24, 0 # perform operation + 80004b04: 358306b3 sm4ks x13,x6,x24,0x0 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000000_str) + 80004b08: 0001b383 ld x7,0(x3) + 80004b0c: 00d38c63 beq x7,x13,80004b24 + 80004b10: 6c80646f jal x8,8000b1d8 + 80004b14: 80004b04 .word 0x80004b04 + 80004b18: 00000000 .word 0x00000000 + 80004b1c: 8001b195 .word 0x8001b195 + 80004b20: 00000000 .word 0x00000000 + 80004b24: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000000 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000000 + 80004b28: 00053603 ld x12,0(x10) + 80004b2c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x0000000100000001 + 80004b30: 00053883 ld x17,0(x10) + 80004b34: 00850513 addi x10,x10,8 + +0000000080004b38 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001: + sm4ks x31, x12, x17, 3 # perform operation + 80004b38: f5160fb3 sm4ks x31,x12,x17,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000000_rs2val_0x100000001_str) + 80004b3c: 0001b383 ld x7,0(x3) + 80004b40: 01f38c63 beq x7,x31,80004b58 + 80004b44: 6940646f jal x8,8000b1d8 + 80004b48: 80004b38 .word 0x80004b38 + 80004b4c: 00000000 .word 0x00000000 + 80004b50: 8001b1f8 .word 0x8001b1f8 + 80004b54: 00000000 .word 0x00000000 + 80004b58: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000100000001 + 80004b5c: 00053903 ld x18,0(x10) + 80004b60: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x0000000000000000 + 80004b64: 00053303 ld x6,0(x10) + 80004b68: 00850513 addi x10,x10,8 + +0000000080004b6c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0: + sm4ks x2, x18, x6, 0 # perform operation + 80004b6c: 34690133 sm4ks x2,x18,x6,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x0_str) + 80004b70: 0001b383 ld x7,0(x3) + 80004b74: 00238c63 beq x7,x2,80004b8c + 80004b78: 6600646f jal x8,8000b1d8 + 80004b7c: 80004b6c .word 0x80004b6c + 80004b80: 00000000 .word 0x00000000 + 80004b84: 8001b25b .word 0x8001b25b + 80004b88: 00000000 .word 0x00000000 + 80004b8c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0x0000000100000001 + 80004b90: 00053e83 ld x29,0(x10) + 80004b94: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000000000001 + 80004b98: 00053b03 ld x22,0(x10) + 80004b9c: 00850513 addi x10,x10,8 + +0000000080004ba0 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1: + sm4ks x27, x29, x22, 0 # perform operation + 80004ba0: 356e8db3 sm4ks x27,x29,x22,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x1_str) + 80004ba4: 0001b383 ld x7,0(x3) + 80004ba8: 01b38c63 beq x7,x27,80004bc0 + 80004bac: 62c0646f jal x8,8000b1d8 + 80004bb0: 80004ba0 .word 0x80004ba0 + 80004bb4: 00000000 .word 0x00000000 + 80004bb8: 8001b2b6 .word 0x8001b2b6 + 80004bbc: 00000000 .word 0x00000000 + 80004bc0: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x0000000100000001 + 80004bc4: 00053603 ld x12,0(x10) + 80004bc8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0000000000000002 + 80004bcc: 00053083 ld x1,0(x10) + 80004bd0: 00850513 addi x10,x10,8 + +0000000080004bd4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2: + sm4ks x2, x12, x1, 3 # perform operation + 80004bd4: f4160133 sm4ks x2,x12,x1,0x3 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x2_str) + 80004bd8: 0001b383 ld x7,0(x3) + 80004bdc: 00238c63 beq x7,x2,80004bf4 + 80004be0: 5f80646f jal x8,8000b1d8 + 80004be4: 80004bd4 .word 0x80004bd4 + 80004be8: 00000000 .word 0x00000000 + 80004bec: 8001b311 .word 0x8001b311 + 80004bf0: 00000000 .word 0x00000000 + 80004bf4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x0000000100000001 + 80004bf8: 00053e03 ld x28,0(x10) + 80004bfc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x8000000000000000 + 80004c00: 00053f03 ld x30,0(x10) + 80004c04: 00850513 addi x10,x10,8 + +0000000080004c08 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000: + sm4ks x20, x28, x30, 3 # perform operation + 80004c08: f5ee0a33 sm4ks x20,x28,x30,0x3 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000000_str) + 80004c0c: 0001b383 ld x7,0(x3) + 80004c10: 01438c63 beq x7,x20,80004c28 + 80004c14: 5c40646f jal x8,8000b1d8 + 80004c18: 80004c08 .word 0x80004c08 + 80004c1c: 00000000 .word 0x00000000 + 80004c20: 8001b36c .word 0x8001b36c + 80004c24: 00000000 .word 0x00000000 + 80004c28: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000001 + 80004c2c: 00053c03 ld x24,0(x10) + 80004c30: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x8000000000000001 + 80004c34: 00053103 ld x2,0(x10) + 80004c38: 00850513 addi x10,x10,8 + +0000000080004c3c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001: + sm4ks x14, x24, x2, 3 # perform operation + 80004c3c: f42c0733 sm4ks x14,x24,x2,0x3 + # Check if x14 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x14, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x8000000000000001_str) + 80004c40: 0001b383 ld x7,0(x3) + 80004c44: 00e38c63 beq x7,x14,80004c5c + 80004c48: 5900646f jal x8,8000b1d8 + 80004c4c: 80004c3c .word 0x80004c3c + 80004c50: 00000000 .word 0x00000000 + 80004c54: 8001b3d6 .word 0x8001b3d6 + 80004c58: 00000000 .word 0x00000000 + 80004c5c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x0000000100000001 + 80004c60: 00053b83 ld x23,0(x10) + 80004c64: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x7fffffffffffffff + 80004c68: 00053283 ld x5,0(x10) + 80004c6c: 00850513 addi x10,x10,8 + +0000000080004c70 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff: + sm4ks x24, x23, x5, 0 # perform operation + 80004c70: 345b8c33 sm4ks x24,x23,x5,0x0 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7fffffffffffffff_str) + 80004c74: 0001b383 ld x7,0(x3) + 80004c78: 01838c63 beq x7,x24,80004c90 + 80004c7c: 55c0646f jal x8,8000b1d8 + 80004c80: 80004c70 .word 0x80004c70 + 80004c84: 00000000 .word 0x00000000 + 80004c88: 8001b440 .word 0x8001b440 + 80004c8c: 00000000 .word 0x00000000 + 80004c90: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80004c94: 00053303 ld x6,0(x10) + 80004c98: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs2: x11 = 0x7ffffffffffffffe + 80004c9c: 00053583 ld x11,0(x10) + 80004ca0: 00850513 addi x10,x10,8 + +0000000080004ca4 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe: + sm4ks x23, x6, x11, 1 # perform operation + 80004ca4: 74b30bb3 sm4ks x23,x6,x11,0x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x7ffffffffffffffe_str) + 80004ca8: 0001b383 ld x7,0(x3) + 80004cac: 01738c63 beq x7,x23,80004cc4 + 80004cb0: 5280646f jal x8,8000b1d8 + 80004cb4: 80004ca4 .word 0x80004ca4 + 80004cb8: 00000000 .word 0x00000000 + 80004cbc: 8001b4aa .word 0x8001b4aa + 80004cc0: 00000000 .word 0x00000000 + 80004cc4: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000100000001 + 80004cc8: 00053983 ld x19,0(x10) + 80004ccc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xffffffffffffffff + 80004cd0: 00053c03 ld x24,0(x10) + 80004cd4: 00850513 addi x10,x10,8 + +0000000080004cd8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff: + sm4ks x2, x19, x24, 0 # perform operation + 80004cd8: 35898133 sm4ks x2,x19,x24,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffffffffffff_str) + 80004cdc: 0001b383 ld x7,0(x3) + 80004ce0: 00238c63 beq x7,x2,80004cf8 + 80004ce4: 4f40646f jal x8,8000b1d8 + 80004ce8: 80004cd8 .word 0x80004cd8 + 80004cec: 00000000 .word 0x00000000 + 80004cf0: 8001b514 .word 0x8001b514 + 80004cf4: 00000000 .word 0x00000000 + 80004cf8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0x0000000100000001 + 80004cfc: 00053c03 ld x24,0(x10) + 80004d00: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0xfffffffffffffffe + 80004d04: 00053f83 ld x31,0(x10) + 80004d08: 00850513 addi x10,x10,8 + +0000000080004d0c : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe: + sm4ks x13, x24, x31, 1 # perform operation + 80004d0c: 75fc06b3 sm4ks x13,x24,x31,0x1 + # Check if x13 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x13, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffffffffffe_str) + 80004d10: 0001b383 ld x7,0(x3) + 80004d14: 00d38c63 beq x7,x13,80004d2c + 80004d18: 4c00646f jal x8,8000b1d8 + 80004d1c: 80004d0c .word 0x80004d0c + 80004d20: 00000000 .word 0x00000000 + 80004d24: 8001b57e .word 0x8001b57e + 80004d28: 00000000 .word 0x00000000 + 80004d2c: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80004d30: 00053303 ld x6,0(x10) + 80004d34: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0x5bbc887763ae86f2 + 80004d38: 00053f03 ld x30,0(x10) + 80004d3c: 00850513 addi x10,x10,8 + +0000000080004d40 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2: + sm4ks x4, x6, x30, 3 # perform operation + 80004d40: f5e30233 sm4ks x4,x6,x30,0x3 + # Check if x4 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x4, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5bbc887763ae86f2_str) + 80004d44: 0001b383 ld x7,0(x3) + 80004d48: 00438c63 beq x7,x4,80004d60 + 80004d4c: 48c0646f jal x8,8000b1d8 + 80004d50: 80004d40 .word 0x80004d40 + 80004d54: 00000000 .word 0x00000000 + 80004d58: 8001b5e8 .word 0x8001b5e8 + 80004d5c: 00000000 .word 0x00000000 + 80004d60: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80004d64: 00053303 ld x6,0(x10) + 80004d68: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0xaaaaaaaaaaaaaaaa + 80004d6c: 00053e83 ld x29,0(x10) + 80004d70: 00850513 addi x10,x10,8 + +0000000080004d74 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa: + sm4ks x15, x6, x29, 3 # perform operation + 80004d74: f5d307b3 sm4ks x15,x6,x29,0x3 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xaaaaaaaaaaaaaaaa_str) + 80004d78: 0001b383 ld x7,0(x3) + 80004d7c: 00f38c63 beq x7,x15,80004d94 + 80004d80: 4580646f jal x8,8000b1d8 + 80004d84: 80004d74 .word 0x80004d74 + 80004d88: 00000000 .word 0x00000000 + 80004d8c: 8001b652 .word 0x8001b652 + 80004d90: 00000000 .word 0x00000000 + 80004d94: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x0000000100000001 + 80004d98: 00053303 ld x6,0(x10) + 80004d9c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x5555555555555555 + 80004da0: 00053803 ld x16,0(x10) + 80004da4: 00850513 addi x10,x10,8 + +0000000080004da8 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555: + sm4ks x15, x6, x16, 3 # perform operation + 80004da8: f50307b3 sm4ks x15,x6,x16,0x3 + # Check if x15 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x15, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x5555555555555555_str) + 80004dac: 0001b383 ld x7,0(x3) + 80004db0: 00f38c63 beq x7,x15,80004dc8 + 80004db4: 4240646f jal x8,8000b1d8 + 80004db8: 80004da8 .word 0x80004da8 + 80004dbc: 00000000 .word 0x00000000 + 80004dc0: 8001b6bc .word 0x8001b6bc + 80004dc4: 00000000 .word 0x00000000 + 80004dc8: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x0000000100000001 + 80004dcc: 00053d03 ld x26,0(x10) + 80004dd0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x00000000ffffffff + 80004dd4: 00053983 ld x19,0(x10) + 80004dd8: 00850513 addi x10,x10,8 + +0000000080004ddc : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff: + sm4ks x1, x26, x19, 3 # perform operation + 80004ddc: f53d00b3 sm4ks x1,x26,x19,0x3 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xffffffff_str) + 80004de0: 0001b383 ld x7,0(x3) + 80004de4: 00138c63 beq x7,x1,80004dfc + 80004de8: 3f00646f jal x8,8000b1d8 + 80004dec: 80004ddc .word 0x80004ddc + 80004df0: 00000000 .word 0x00000000 + 80004df4: 8001b726 .word 0x8001b726 + 80004df8: 00000000 .word 0x00000000 + 80004dfc: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x0000000100000001 + 80004e00: 00053283 ld x5,0(x10) + 80004e04: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x00000000fffffffe + 80004e08: 00053303 ld x6,0(x10) + 80004e0c: 00850513 addi x10,x10,8 + +0000000080004e10 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe: + sm4ks x2, x5, x6, 1 # perform operation + 80004e10: 74628133 sm4ks x2,x5,x6,0x1 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0xfffffffe_str) + 80004e14: 0001b383 ld x7,0(x3) + 80004e18: 00238c63 beq x7,x2,80004e30 + 80004e1c: 3bc0646f jal x8,8000b1d8 + 80004e20: 80004e10 .word 0x80004e10 + 80004e24: 00000000 .word 0x00000000 + 80004e28: 8001b788 .word 0x8001b788 + 80004e2c: 00000000 .word 0x00000000 + 80004e30: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs1: x18 = 0x0000000100000001 + 80004e34: 00053903 ld x18,0(x10) + 80004e38: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x0000000100000000 + 80004e3c: 00053b83 ld x23,0(x10) + 80004e40: 00850513 addi x10,x10,8 + +0000000080004e44 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000: + sm4ks x21, x18, x23, 2 # perform operation + 80004e44: b5790ab3 sm4ks x21,x18,x23,0x2 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000000_str) + 80004e48: 0001b383 ld x7,0(x3) + 80004e4c: 01538c63 beq x7,x21,80004e64 + 80004e50: 3880646f jal x8,8000b1d8 + 80004e54: 80004e44 .word 0x80004e44 + 80004e58: 00000000 .word 0x00000000 + 80004e5c: 8001b7ea .word 0x8001b7ea + 80004e60: 00000000 .word 0x00000000 + 80004e64: 00818193 addi x3,x3,8 + +# Testcase cr_rs1_rs2_edges (Test source rs1 = 0x0000000100000001 rs2 = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x0000000100000001 + 80004e68: 00053f83 ld x31,0(x10) + 80004e6c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x0000000100000001 + 80004e70: 00053b03 ld x22,0(x10) + 80004e74: 00850513 addi x10,x10,8 + +0000000080004e78 : +Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001: + sm4ks x20, x31, x22, 2 # perform operation + 80004e78: b56f8a33 sm4ks x20,x31,x22,0x2 + # Check if x20 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x20, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001, Zksed_sm4ks_cg_cr_rs1_rs2_edges_rs1val_0x100000001_rs2val_0x100000001_str) + 80004e7c: 0001b383 ld x7,0(x3) + 80004e80: 01438c63 beq x7,x20,80004e98 + 80004e84: 3540646f jal x8,8000b1d8 + 80004e88: 80004e78 .word 0x80004e78 + 80004e8c: 00000000 .word 0x00000000 + 80004e90: 8001b84d .word 0x8001b84d + 80004e94: 00000000 .word 0x00000000 + 80004e98: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x43c99f80bd5c8440 + 80004e9c: 00053003 ld x0,0(x10) + 80004ea0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xa5cd1f91a796441d + 80004ea4: 00053003 ld x0,0(x10) + 80004ea8: 00850513 addi x10,x10,8 + +0000000080004eac : +Zksed_sm4ks_cg_cmp_rs1_rs2_b0: + sm4ks x9, x0, x0, 3 # perform operation + 80004eac: f40004b3 sm4ks x9,x0,x0,0x3 + # Check if x9 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x9, Zksed_sm4ks_cg_cmp_rs1_rs2_b0, Zksed_sm4ks_cg_cmp_rs1_rs2_b0_str) + 80004eb0: 0001b383 ld x7,0(x3) + 80004eb4: 00938c63 beq x7,x9,80004ecc + 80004eb8: 3200646f jal x8,8000b1d8 + 80004ebc: 80004eac .word 0x80004eac + 80004ec0: 00000000 .word 0x00000000 + 80004ec4: 8001b8b0 .word 0x8001b8b0 + 80004ec8: 00000000 .word 0x00000000 + 80004ecc: 00818193 addi x3,x3,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x13a2865d16595925 + 80004ed0: 00053083 ld x1,0(x10) + 80004ed4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0xa38105b50c5e273b + 80004ed8: 00053083 ld x1,0(x10) + 80004edc: 00850513 addi x10,x10,8 + +0000000080004ee0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b1: + sm4ks x21, x1, x1, 3 # perform operation + 80004ee0: f4108ab3 sm4ks x21,x1,x1,0x3 + # Check if x21 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x21, Zksed_sm4ks_cg_cmp_rs1_rs2_b1, Zksed_sm4ks_cg_cmp_rs1_rs2_b1_str) + 80004ee4: 0001b383 ld x7,0(x3) + 80004ee8: 01538c63 beq x7,x21,80004f00 + 80004eec: 2ec0646f jal x8,8000b1d8 + 80004ef0: 80004ee0 .word 0x80004ee0 + 80004ef4: 00000000 .word 0x00000000 + 80004ef8: 8001b8ea .word 0x8001b8ea + 80004efc: 00000000 .word 0x00000000 + 80004f00: 00818193 addi x3,x3,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x1e337fe2aa33e0fa + 80004f04: 00053103 ld x2,0(x10) + 80004f08: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x038f961ef4f62ecd + 80004f0c: 00053103 ld x2,0(x10) + 80004f10: 00850513 addi x10,x10,8 + +0000000080004f14 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b2: + sm4ks x19, x2, x2, 0 # perform operation + 80004f14: 342109b3 sm4ks x19,x2,x2,0x0 + # Check if x19 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x19, Zksed_sm4ks_cg_cmp_rs1_rs2_b2, Zksed_sm4ks_cg_cmp_rs1_rs2_b2_str) + 80004f18: 0001b383 ld x7,0(x3) + 80004f1c: 01338c63 beq x7,x19,80004f34 + 80004f20: 2b80646f jal x8,8000b1d8 + 80004f24: 80004f14 .word 0x80004f14 + 80004f28: 00000000 .word 0x00000000 + 80004f2c: 8001b924 .word 0x8001b924 + 80004f30: 00000000 .word 0x00000000 + 80004f34: 00818193 addi x3,x3,8 + + mv x31, x3 # switch signature pointer register to avoid conflict with test + 80004f38: 00018f93 addi x31,x3,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5f7c142c65c73482 + 80004f3c: 00053183 ld x3,0(x10) + 80004f40: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0xbab768984ce789c6 + 80004f44: 00053183 ld x3,0(x10) + 80004f48: 00850513 addi x10,x10,8 + +0000000080004f4c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b3: + sm4ks x26, x3, x3, 0 # perform operation + 80004f4c: 34318d33 sm4ks x26,x3,x3,0x0 + # Check if x26 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x26, Zksed_sm4ks_cg_cmp_rs1_rs2_b3, Zksed_sm4ks_cg_cmp_rs1_rs2_b3_str) + 80004f50: 000fb383 ld x7,0(x31) + 80004f54: 01a38c63 beq x7,x26,80004f6c + 80004f58: 2800646f jal x8,8000b1d8 + 80004f5c: 80004f4c .word 0x80004f4c + 80004f60: 00000000 .word 0x00000000 + 80004f64: 8001b95e .word 0x8001b95e + 80004f68: 00000000 .word 0x00000000 + 80004f6c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x81e4f7343e91c721 + 80004f70: 00053203 ld x4,0(x10) + 80004f74: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0x786372f1cc3c4bf5 + 80004f78: 00053203 ld x4,0(x10) + 80004f7c: 00850513 addi x10,x10,8 + +0000000080004f80 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b4: + sm4ks x5, x4, x4, 0 # perform operation + 80004f80: 344202b3 sm4ks x5,x4,x4,0x0 + # Check if x5 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x5, Zksed_sm4ks_cg_cmp_rs1_rs2_b4, Zksed_sm4ks_cg_cmp_rs1_rs2_b4_str) + 80004f84: 000fb383 ld x7,0(x31) + 80004f88: 00538c63 beq x7,x5,80004fa0 + 80004f8c: 24c0646f jal x8,8000b1d8 + 80004f90: 80004f80 .word 0x80004f80 + 80004f94: 00000000 .word 0x00000000 + 80004f98: 8001b998 .word 0x8001b998 + 80004f9c: 00000000 .word 0x00000000 + 80004fa0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x8e316eed0f6be5df + 80004fa4: 00053283 ld x5,0(x10) + 80004fa8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x3314ddd106181db9 + 80004fac: 00053283 ld x5,0(x10) + 80004fb0: 00850513 addi x10,x10,8 + +0000000080004fb4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b5: + sm4ks x9, x5, x5, 2 # perform operation + 80004fb4: b45284b3 sm4ks x9,x5,x5,0x2 + # Check if x9 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x9, Zksed_sm4ks_cg_cmp_rs1_rs2_b5, Zksed_sm4ks_cg_cmp_rs1_rs2_b5_str) + 80004fb8: 000fb383 ld x7,0(x31) + 80004fbc: 00938c63 beq x7,x9,80004fd4 + 80004fc0: 2180646f jal x8,8000b1d8 + 80004fc4: 80004fb4 .word 0x80004fb4 + 80004fc8: 00000000 .word 0x00000000 + 80004fcc: 8001b9d2 .word 0x8001b9d2 + 80004fd0: 00000000 .word 0x00000000 + 80004fd4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x2d47fa728d7bfa0b + 80004fd8: 00053303 ld x6,0(x10) + 80004fdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x7c457b810a39d66e + 80004fe0: 00053303 ld x6,0(x10) + 80004fe4: 00850513 addi x10,x10,8 + +0000000080004fe8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b6: + sm4ks x3, x6, x6, 0 # perform operation + 80004fe8: 346301b3 sm4ks x3,x6,x6,0x0 + # Check if x3 contains the expected result. x31 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x31, x8, x7, x3, Zksed_sm4ks_cg_cmp_rs1_rs2_b6, Zksed_sm4ks_cg_cmp_rs1_rs2_b6_str) + 80004fec: 000fb383 ld x7,0(x31) + 80004ff0: 00338c63 beq x7,x3,80005008 + 80004ff4: 1e40646f jal x8,8000b1d8 + 80004ff8: 80004fe8 .word 0x80004fe8 + 80004ffc: 00000000 .word 0x00000000 + 80005000: 8001ba0c .word 0x8001ba0c + 80005004: 00000000 .word 0x00000000 + 80005008: 008f8f93 addi x31,x31,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 8000500c: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80005010: 00040293 addi x5,x8,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xaa783177a6e1fe3b + 80005014: 00053383 ld x7,0(x10) + 80005018: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x77471c463fcd5775 + 8000501c: 00053383 ld x7,0(x10) + 80005020: 00850513 addi x10,x10,8 + +0000000080005024 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b7: + sm4ks x28, x7, x7, 3 # perform operation + 80005024: f4738e33 sm4ks x28,x7,x7,0x3 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zksed_sm4ks_cg_cmp_rs1_rs2_b7, Zksed_sm4ks_cg_cmp_rs1_rs2_b7_str) + 80005028: 000fb203 ld x4,0(x31) + 8000502c: 01c20c63 beq x4,x28,80005044 + 80005030: 190062ef jal x5,8000b1c0 + 80005034: 80005024 .word 0x80005024 + 80005038: 00000000 .word 0x00000000 + 8000503c: 8001ba46 .word 0x8001ba46 + 80005040: 00000000 .word 0x00000000 + 80005044: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x6f20d1cbc5359b7a + 80005048: 00053403 ld x8,0(x10) + 8000504c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x8692e77fdc05faf3 + 80005050: 00053403 ld x8,0(x10) + 80005054: 00850513 addi x10,x10,8 + +0000000080005058 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b8: + sm4ks x24, x8, x8, 3 # perform operation + 80005058: f4840c33 sm4ks x24,x8,x8,0x3 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zksed_sm4ks_cg_cmp_rs1_rs2_b8, Zksed_sm4ks_cg_cmp_rs1_rs2_b8_str) + 8000505c: 000fb203 ld x4,0(x31) + 80005060: 01820c63 beq x4,x24,80005078 + 80005064: 15c062ef jal x5,8000b1c0 + 80005068: 80005058 .word 0x80005058 + 8000506c: 00000000 .word 0x00000000 + 80005070: 8001ba80 .word 0x8001ba80 + 80005074: 00000000 .word 0x00000000 + 80005078: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x920cbe03d813e65a + 8000507c: 00053483 ld x9,0(x10) + 80005080: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x0ea2e0464dbe4571 + 80005084: 00053483 ld x9,0(x10) + 80005088: 00850513 addi x10,x10,8 + +000000008000508c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b9: + sm4ks x28, x9, x9, 1 # perform operation + 8000508c: 74948e33 sm4ks x28,x9,x9,0x1 + # Check if x28 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x28, Zksed_sm4ks_cg_cmp_rs1_rs2_b9, Zksed_sm4ks_cg_cmp_rs1_rs2_b9_str) + 80005090: 000fb203 ld x4,0(x31) + 80005094: 01c20c63 beq x4,x28,800050ac + 80005098: 128062ef jal x5,8000b1c0 + 8000509c: 8000508c .word 0x8000508c + 800050a0: 00000000 .word 0x00000000 + 800050a4: 8001baba .word 0x8001baba + 800050a8: 00000000 .word 0x00000000 + 800050ac: 008f8f93 addi x31,x31,8 + + mv x20, x10 # switch data pointer register to avoid conflict with test + 800050b0: 00050a13 addi x20,x10,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x90cfe332e7f0c612 + 800050b4: 000a3503 ld x10,0(x20) + 800050b8: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs2: x10 = 0x95261549e00b375d + 800050bc: 000a3503 ld x10,0(x20) + 800050c0: 008a0a13 addi x20,x20,8 + +00000000800050c4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b10: + sm4ks x26, x10, x10, 1 # perform operation + 800050c4: 74a50d33 sm4ks x26,x10,x10,0x1 + # Check if x26 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x26, Zksed_sm4ks_cg_cmp_rs1_rs2_b10, Zksed_sm4ks_cg_cmp_rs1_rs2_b10_str) + 800050c8: 000fb203 ld x4,0(x31) + 800050cc: 01a20c63 beq x4,x26,800050e4 + 800050d0: 0f0062ef jal x5,8000b1c0 + 800050d4: 800050c4 .word 0x800050c4 + 800050d8: 00000000 .word 0x00000000 + 800050dc: 8001baf4 .word 0x8001baf4 + 800050e0: 00000000 .word 0x00000000 + 800050e4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x314e941e6ae69c7b + 800050e8: 000a3583 ld x11,0(x20) + 800050ec: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs2: x11 = 0xc0d7460df65b9b9f + 800050f0: 000a3583 ld x11,0(x20) + 800050f4: 008a0a13 addi x20,x20,8 + +00000000800050f8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b11: + sm4ks x27, x11, x11, 3 # perform operation + 800050f8: f4b58db3 sm4ks x27,x11,x11,0x3 + # Check if x27 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x27, Zksed_sm4ks_cg_cmp_rs1_rs2_b11, Zksed_sm4ks_cg_cmp_rs1_rs2_b11_str) + 800050fc: 000fb203 ld x4,0(x31) + 80005100: 01b20c63 beq x4,x27,80005118 + 80005104: 0bc062ef jal x5,8000b1c0 + 80005108: 800050f8 .word 0x800050f8 + 8000510c: 00000000 .word 0x00000000 + 80005110: 8001bb2f .word 0x8001bb2f + 80005114: 00000000 .word 0x00000000 + 80005118: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x92dc4c12a6f8e9a9 + 8000511c: 000a3603 ld x12,0(x20) + 80005120: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs2: x12 = 0xd474a0c56cf6233e + 80005124: 000a3603 ld x12,0(x20) + 80005128: 008a0a13 addi x20,x20,8 + +000000008000512c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b12: + sm4ks x2, x12, x12, 2 # perform operation + 8000512c: b4c60133 sm4ks x2,x12,x12,0x2 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b12, Zksed_sm4ks_cg_cmp_rs1_rs2_b12_str) + 80005130: 000fb203 ld x4,0(x31) + 80005134: 00220c63 beq x4,x2,8000514c + 80005138: 088062ef jal x5,8000b1c0 + 8000513c: 8000512c .word 0x8000512c + 80005140: 00000000 .word 0x00000000 + 80005144: 8001bb6a .word 0x8001bb6a + 80005148: 00000000 .word 0x00000000 + 8000514c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xe6f0bf7de42e9bbd + 80005150: 000a3683 ld x13,0(x20) + 80005154: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs2: x13 = 0x6b51907d36e4ff25 + 80005158: 000a3683 ld x13,0(x20) + 8000515c: 008a0a13 addi x20,x20,8 + +0000000080005160 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b13: + sm4ks x7, x13, x13, 3 # perform operation + 80005160: f4d683b3 sm4ks x7,x13,x13,0x3 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cmp_rs1_rs2_b13, Zksed_sm4ks_cg_cmp_rs1_rs2_b13_str) + 80005164: 000fb203 ld x4,0(x31) + 80005168: 00720c63 beq x4,x7,80005180 + 8000516c: 054062ef jal x5,8000b1c0 + 80005170: 80005160 .word 0x80005160 + 80005174: 00000000 .word 0x00000000 + 80005178: 8001bba5 .word 0x8001bba5 + 8000517c: 00000000 .word 0x00000000 + 80005180: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0xd251d203161d4b47 + 80005184: 000a3703 ld x14,0(x20) + 80005188: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs2: x14 = 0x16f96988b76ced40 + 8000518c: 000a3703 ld x14,0(x20) + 80005190: 008a0a13 addi x20,x20,8 + +0000000080005194 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b14: + sm4ks x1, x14, x14, 2 # perform operation + 80005194: b4e700b3 sm4ks x1,x14,x14,0x2 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zksed_sm4ks_cg_cmp_rs1_rs2_b14, Zksed_sm4ks_cg_cmp_rs1_rs2_b14_str) + 80005198: 000fb203 ld x4,0(x31) + 8000519c: 00120c63 beq x4,x1,800051b4 + 800051a0: 020062ef jal x5,8000b1c0 + 800051a4: 80005194 .word 0x80005194 + 800051a8: 00000000 .word 0x00000000 + 800051ac: 8001bbe0 .word 0x8001bbe0 + 800051b0: 00000000 .word 0x00000000 + 800051b4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x093f9aefa6b842ee + 800051b8: 000a3783 ld x15,0(x20) + 800051bc: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs2: x15 = 0x9b1b820d5a812ee8 + 800051c0: 000a3783 ld x15,0(x20) + 800051c4: 008a0a13 addi x20,x20,8 + +00000000800051c8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b15: + sm4ks x19, x15, x15, 2 # perform operation + 800051c8: b4f789b3 sm4ks x19,x15,x15,0x2 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksed_sm4ks_cg_cmp_rs1_rs2_b15, Zksed_sm4ks_cg_cmp_rs1_rs2_b15_str) + 800051cc: 000fb203 ld x4,0(x31) + 800051d0: 01320c63 beq x4,x19,800051e8 + 800051d4: 7ed052ef jal x5,8000b1c0 + 800051d8: 800051c8 .word 0x800051c8 + 800051dc: 00000000 .word 0x00000000 + 800051e0: 8001bc1b .word 0x8001bc1b + 800051e4: 00000000 .word 0x00000000 + 800051e8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x452e39fbaa4d18af + 800051ec: 000a3803 ld x16,0(x20) + 800051f0: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs2: x16 = 0xe14936508daa5a1a + 800051f4: 000a3803 ld x16,0(x20) + 800051f8: 008a0a13 addi x20,x20,8 + +00000000800051fc : +Zksed_sm4ks_cg_cmp_rs1_rs2_b16: + sm4ks x14, x16, x16, 1 # perform operation + 800051fc: 75080733 sm4ks x14,x16,x16,0x1 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zksed_sm4ks_cg_cmp_rs1_rs2_b16, Zksed_sm4ks_cg_cmp_rs1_rs2_b16_str) + 80005200: 000fb203 ld x4,0(x31) + 80005204: 00e20c63 beq x4,x14,8000521c + 80005208: 7b9052ef jal x5,8000b1c0 + 8000520c: 800051fc .word 0x800051fc + 80005210: 00000000 .word 0x00000000 + 80005214: 8001bc56 .word 0x8001bc56 + 80005218: 00000000 .word 0x00000000 + 8000521c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0xba2ddc777eb55731 + 80005220: 000a3883 ld x17,0(x20) + 80005224: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs2: x17 = 0xe8db8cd3cce8d2ed + 80005228: 000a3883 ld x17,0(x20) + 8000522c: 008a0a13 addi x20,x20,8 + +0000000080005230 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b17: + sm4ks x7, x17, x17, 3 # perform operation + 80005230: f51883b3 sm4ks x7,x17,x17,0x3 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cmp_rs1_rs2_b17, Zksed_sm4ks_cg_cmp_rs1_rs2_b17_str) + 80005234: 000fb203 ld x4,0(x31) + 80005238: 00720c63 beq x4,x7,80005250 + 8000523c: 785052ef jal x5,8000b1c0 + 80005240: 80005230 .word 0x80005230 + 80005244: 00000000 .word 0x00000000 + 80005248: 8001bc91 .word 0x8001bc91 + 8000524c: 00000000 .word 0x00000000 + 80005250: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xf9b1e22e608a30b7 + 80005254: 000a3903 ld x18,0(x20) + 80005258: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs2: x18 = 0xdbd2f83cf6d1cd63 + 8000525c: 000a3903 ld x18,0(x20) + 80005260: 008a0a13 addi x20,x20,8 + +0000000080005264 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b18: + sm4ks x1, x18, x18, 3 # perform operation + 80005264: f52900b3 sm4ks x1,x18,x18,0x3 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zksed_sm4ks_cg_cmp_rs1_rs2_b18, Zksed_sm4ks_cg_cmp_rs1_rs2_b18_str) + 80005268: 000fb203 ld x4,0(x31) + 8000526c: 00120c63 beq x4,x1,80005284 + 80005270: 751052ef jal x5,8000b1c0 + 80005274: 80005264 .word 0x80005264 + 80005278: 00000000 .word 0x00000000 + 8000527c: 8001bccc .word 0x8001bccc + 80005280: 00000000 .word 0x00000000 + 80005284: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xb66050abb20b5610 + 80005288: 000a3983 ld x19,0(x20) + 8000528c: 008a0a13 addi x20,x20,8 + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs2: x19 = 0xaeb5f3bbb5ba7a59 + 80005290: 000a3983 ld x19,0(x20) + 80005294: 008a0a13 addi x20,x20,8 + +0000000080005298 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b19: + sm4ks x13, x19, x19, 2 # perform operation + 80005298: b53986b3 sm4ks x13,x19,x19,0x2 + # Check if x13 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x13, Zksed_sm4ks_cg_cmp_rs1_rs2_b19, Zksed_sm4ks_cg_cmp_rs1_rs2_b19_str) + 8000529c: 000fb203 ld x4,0(x31) + 800052a0: 00d20c63 beq x4,x13,800052b8 + 800052a4: 71d052ef jal x5,8000b1c0 + 800052a8: 80005298 .word 0x80005298 + 800052ac: 00000000 .word 0x00000000 + 800052b0: 8001bd07 .word 0x8001bd07 + 800052b4: 00000000 .word 0x00000000 + 800052b8: 008f8f93 addi x31,x31,8 + + mv x28, x20 # switch data pointer register to avoid conflict with test + 800052bc: 000a0e13 addi x28,x20,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs1: x20 = 0xfa0e72283ddd1ee9 + 800052c0: 000e3a03 ld x20,0(x28) + 800052c4: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x20) # load rs2: x20 = 0x368382dfa2050605 + 800052c8: 000e3a03 ld x20,0(x28) + 800052cc: 008e0e13 addi x28,x28,8 + +00000000800052d0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b20: + sm4ks x7, x20, x20, 0 # perform operation + 800052d0: 354a03b3 sm4ks x7,x20,x20,0x0 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cmp_rs1_rs2_b20, Zksed_sm4ks_cg_cmp_rs1_rs2_b20_str) + 800052d4: 000fb203 ld x4,0(x31) + 800052d8: 00720c63 beq x4,x7,800052f0 + 800052dc: 6e5052ef jal x5,8000b1c0 + 800052e0: 800052d0 .word 0x800052d0 + 800052e4: 00000000 .word 0x00000000 + 800052e8: 8001bd42 .word 0x8001bd42 + 800052ec: 00000000 .word 0x00000000 + 800052f0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs1: x21 = 0x68594c6b33d2ef1a + 800052f4: 000e3a83 ld x21,0(x28) + 800052f8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x21) # load rs2: x21 = 0xfb242fcce5fab75e + 800052fc: 000e3a83 ld x21,0(x28) + 80005300: 008e0e13 addi x28,x28,8 + +0000000080005304 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b21: + sm4ks x8, x21, x21, 0 # perform operation + 80005304: 355a8433 sm4ks x8,x21,x21,0x0 + # Check if x8 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x8, Zksed_sm4ks_cg_cmp_rs1_rs2_b21, Zksed_sm4ks_cg_cmp_rs1_rs2_b21_str) + 80005308: 000fb203 ld x4,0(x31) + 8000530c: 00820c63 beq x4,x8,80005324 + 80005310: 6b1052ef jal x5,8000b1c0 + 80005314: 80005304 .word 0x80005304 + 80005318: 00000000 .word 0x00000000 + 8000531c: 8001bd7d .word 0x8001bd7d + 80005320: 00000000 .word 0x00000000 + 80005324: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs1: x22 = 0x5a8ee813ddd800a7 + 80005328: 000e3b03 ld x22,0(x28) + 8000532c: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x22) # load rs2: x22 = 0x7c6145cc5803eb0f + 80005330: 000e3b03 ld x22,0(x28) + 80005334: 008e0e13 addi x28,x28,8 + +0000000080005338 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b22: + sm4ks x2, x22, x22, 1 # perform operation + 80005338: 756b0133 sm4ks x2,x22,x22,0x1 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b22, Zksed_sm4ks_cg_cmp_rs1_rs2_b22_str) + 8000533c: 000fb203 ld x4,0(x31) + 80005340: 00220c63 beq x4,x2,80005358 + 80005344: 67d052ef jal x5,8000b1c0 + 80005348: 80005338 .word 0x80005338 + 8000534c: 00000000 .word 0x00000000 + 80005350: 8001bdb8 .word 0x8001bdb8 + 80005354: 00000000 .word 0x00000000 + 80005358: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs1: x23 = 0x2fe5895a5e37320b + 8000535c: 000e3b83 ld x23,0(x28) + 80005360: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x23) # load rs2: x23 = 0x9a75326c8d5fed54 + 80005364: 000e3b83 ld x23,0(x28) + 80005368: 008e0e13 addi x28,x28,8 + +000000008000536c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b23: + sm4ks x20, x23, x23, 2 # perform operation + 8000536c: b57b8a33 sm4ks x20,x23,x23,0x2 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zksed_sm4ks_cg_cmp_rs1_rs2_b23, Zksed_sm4ks_cg_cmp_rs1_rs2_b23_str) + 80005370: 000fb203 ld x4,0(x31) + 80005374: 01420c63 beq x4,x20,8000538c + 80005378: 649052ef jal x5,8000b1c0 + 8000537c: 8000536c .word 0x8000536c + 80005380: 00000000 .word 0x00000000 + 80005384: 8001bdf3 .word 0x8001bdf3 + 80005388: 00000000 .word 0x00000000 + 8000538c: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs1: x24 = 0xce3f58646868f28a + 80005390: 000e3c03 ld x24,0(x28) + 80005394: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x24) # load rs2: x24 = 0xa78c5afb3b28361d + 80005398: 000e3c03 ld x24,0(x28) + 8000539c: 008e0e13 addi x28,x28,8 + +00000000800053a0 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b24: + sm4ks x7, x24, x24, 3 # perform operation + 800053a0: f58c03b3 sm4ks x7,x24,x24,0x3 + # Check if x7 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x7, Zksed_sm4ks_cg_cmp_rs1_rs2_b24, Zksed_sm4ks_cg_cmp_rs1_rs2_b24_str) + 800053a4: 000fb203 ld x4,0(x31) + 800053a8: 00720c63 beq x4,x7,800053c0 + 800053ac: 615052ef jal x5,8000b1c0 + 800053b0: 800053a0 .word 0x800053a0 + 800053b4: 00000000 .word 0x00000000 + 800053b8: 8001be2e .word 0x8001be2e + 800053bc: 00000000 .word 0x00000000 + 800053c0: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs1: x25 = 0x9d4a9774a34ac44e + 800053c4: 000e3c83 ld x25,0(x28) + 800053c8: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x25) # load rs2: x25 = 0x24ec2a65cb9a599b + 800053cc: 000e3c83 ld x25,0(x28) + 800053d0: 008e0e13 addi x28,x28,8 + +00000000800053d4 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b25: + sm4ks x19, x25, x25, 1 # perform operation + 800053d4: 759c89b3 sm4ks x19,x25,x25,0x1 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksed_sm4ks_cg_cmp_rs1_rs2_b25, Zksed_sm4ks_cg_cmp_rs1_rs2_b25_str) + 800053d8: 000fb203 ld x4,0(x31) + 800053dc: 01320c63 beq x4,x19,800053f4 + 800053e0: 5e1052ef jal x5,8000b1c0 + 800053e4: 800053d4 .word 0x800053d4 + 800053e8: 00000000 .word 0x00000000 + 800053ec: 8001be69 .word 0x8001be69 + 800053f0: 00000000 .word 0x00000000 + 800053f4: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs1: x26 = 0xc1b74fc1b75d765e + 800053f8: 000e3d03 ld x26,0(x28) + 800053fc: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x26) # load rs2: x26 = 0x195935e04690a2fc + 80005400: 000e3d03 ld x26,0(x28) + 80005404: 008e0e13 addi x28,x28,8 + +0000000080005408 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b26: + sm4ks x20, x26, x26, 2 # perform operation + 80005408: b5ad0a33 sm4ks x20,x26,x26,0x2 + # Check if x20 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x20, Zksed_sm4ks_cg_cmp_rs1_rs2_b26, Zksed_sm4ks_cg_cmp_rs1_rs2_b26_str) + 8000540c: 000fb203 ld x4,0(x31) + 80005410: 01420c63 beq x4,x20,80005428 + 80005414: 5ad052ef jal x5,8000b1c0 + 80005418: 80005408 .word 0x80005408 + 8000541c: 00000000 .word 0x00000000 + 80005420: 8001bea4 .word 0x8001bea4 + 80005424: 00000000 .word 0x00000000 + 80005428: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs1: x27 = 0x74783ec777e14228 + 8000542c: 000e3d83 ld x27,0(x28) + 80005430: 008e0e13 addi x28,x28,8 + RVTEST_TESTDATA_LOAD_INT(x28, x27) # load rs2: x27 = 0xbd9dfa8995cad9d9 + 80005434: 000e3d83 ld x27,0(x28) + 80005438: 008e0e13 addi x28,x28,8 + +000000008000543c : +Zksed_sm4ks_cg_cmp_rs1_rs2_b27: + sm4ks x24, x27, x27, 0 # perform operation + 8000543c: 35bd8c33 sm4ks x24,x27,x27,0x0 + # Check if x24 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x24, Zksed_sm4ks_cg_cmp_rs1_rs2_b27, Zksed_sm4ks_cg_cmp_rs1_rs2_b27_str) + 80005440: 000fb203 ld x4,0(x31) + 80005444: 01820c63 beq x4,x24,8000545c + 80005448: 579052ef jal x5,8000b1c0 + 8000544c: 8000543c .word 0x8000543c + 80005450: 00000000 .word 0x00000000 + 80005454: 8001bedf .word 0x8001bedf + 80005458: 00000000 .word 0x00000000 + 8000545c: 008f8f93 addi x31,x31,8 + + mv x6, x28 # switch data pointer register to avoid conflict with test + 80005460: 000e0313 addi x6,x28,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x70fbcbd847e67456 + 80005464: 00033e03 ld x28,0(x6) + 80005468: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xffd8410c0d0ccec8 + 8000546c: 00033e03 ld x28,0(x6) + 80005470: 00830313 addi x6,x6,8 + +0000000080005474 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b28: + sm4ks x2, x28, x28, 0 # perform operation + 80005474: 35ce0133 sm4ks x2,x28,x28,0x0 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b28, Zksed_sm4ks_cg_cmp_rs1_rs2_b28_str) + 80005478: 000fb203 ld x4,0(x31) + 8000547c: 00220c63 beq x4,x2,80005494 + 80005480: 541052ef jal x5,8000b1c0 + 80005484: 80005474 .word 0x80005474 + 80005488: 00000000 .word 0x00000000 + 8000548c: 8001bf1a .word 0x8001bf1a + 80005490: 00000000 .word 0x00000000 + 80005494: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x950e6d0d02a05ecb + 80005498: 00033e83 ld x29,0(x6) + 8000549c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x7d1b205379d3afd5 + 800054a0: 00033e83 ld x29,0(x6) + 800054a4: 00830313 addi x6,x6,8 + +00000000800054a8 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b29: + sm4ks x1, x29, x29, 3 # perform operation + 800054a8: f5de80b3 sm4ks x1,x29,x29,0x3 + # Check if x1 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x1, Zksed_sm4ks_cg_cmp_rs1_rs2_b29, Zksed_sm4ks_cg_cmp_rs1_rs2_b29_str) + 800054ac: 000fb203 ld x4,0(x31) + 800054b0: 00120c63 beq x4,x1,800054c8 + 800054b4: 50d052ef jal x5,8000b1c0 + 800054b8: 800054a8 .word 0x800054a8 + 800054bc: 00000000 .word 0x00000000 + 800054c0: 8001bf55 .word 0x8001bf55 + 800054c4: 00000000 .word 0x00000000 + 800054c8: 008f8f93 addi x31,x31,8 + +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x53771de77f4d95c7 + 800054cc: 00033f03 ld x30,0(x6) + 800054d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x4cad881be7b14021 + 800054d4: 00033f03 ld x30,0(x6) + 800054d8: 00830313 addi x6,x6,8 + +00000000800054dc : +Zksed_sm4ks_cg_cmp_rs1_rs2_b30: + sm4ks x2, x30, x30, 3 # perform operation + 800054dc: f5ef0133 sm4ks x2,x30,x30,0x3 + # Check if x2 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x2, Zksed_sm4ks_cg_cmp_rs1_rs2_b30, Zksed_sm4ks_cg_cmp_rs1_rs2_b30_str) + 800054e0: 000fb203 ld x4,0(x31) + 800054e4: 00220c63 beq x4,x2,800054fc + 800054e8: 4d9052ef jal x5,8000b1c0 + 800054ec: 800054dc .word 0x800054dc + 800054f0: 00000000 .word 0x00000000 + 800054f4: 8001bf90 .word 0x8001bf90 + 800054f8: 00000000 .word 0x00000000 + 800054fc: 008f8f93 addi x31,x31,8 + + mv x20, x31 # switch signature pointer register to avoid conflict with test + 80005500: 000f8a13 addi x20,x31,0 +# Testcase cmp_rs1_rs2 (Test rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xaa0602918c803fb1 + 80005504: 00033f83 ld x31,0(x6) + 80005508: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x4fecf49c7795f5b7 + 8000550c: 00033f83 ld x31,0(x6) + 80005510: 00830313 addi x6,x6,8 + +0000000080005514 : +Zksed_sm4ks_cg_cmp_rs1_rs2_b31: + sm4ks x7, x31, x31, 2 # perform operation + 80005514: b5ff83b3 sm4ks x7,x31,x31,0x2 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zksed_sm4ks_cg_cmp_rs1_rs2_b31, Zksed_sm4ks_cg_cmp_rs1_rs2_b31_str) + 80005518: 000a3203 ld x4,0(x20) + 8000551c: 00720c63 beq x4,x7,80005534 + 80005520: 4a1052ef jal x5,8000b1c0 + 80005524: 80005514 .word 0x80005514 + 80005528: 00000000 .word 0x00000000 + 8000552c: 8001bfcb .word 0x8001bfcb + 80005530: 00000000 .word 0x00000000 + 80005534: 008a0a13 addi x20,x20,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0x9c50d917d2eb15fb + 80005538: 00033003 ld x0,0(x6) + 8000553c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0xc22af968a82bea52 + 80005540: 00033d83 ld x27,0(x6) + 80005544: 00830313 addi x6,x6,8 + +0000000080005548 : +Zksed_sm4ks_cg_cmp_rd_rs1_b0: + sm4ks x0, x0, x27, 3 # perform operation + 80005548: f5b00033 sm4ks x0,x0,x27,0x3 + # Check if x0 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x0, Zksed_sm4ks_cg_cmp_rd_rs1_b0, Zksed_sm4ks_cg_cmp_rd_rs1_b0_str) + 8000554c: 000a3203 ld x4,0(x20) + 80005550: 00020c63 beq x4,x0,80005568 + 80005554: 46d052ef jal x5,8000b1c0 + 80005558: 80005548 .word 0x80005548 + 8000555c: 00000000 .word 0x00000000 + 80005560: 8001c006 .word 0x8001c006 + 80005564: 00000000 .word 0x00000000 + 80005568: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xb9ebc3cf471e778b + 8000556c: 00033083 ld x1,0(x6) + 80005570: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x88cfb744b43cabe4 + 80005574: 00033703 ld x14,0(x6) + 80005578: 00830313 addi x6,x6,8 + +000000008000557c : +Zksed_sm4ks_cg_cmp_rd_rs1_b1: + sm4ks x1, x1, x14, 0 # perform operation + 8000557c: 34e080b3 sm4ks x1,x1,x14,0x0 + # Check if x1 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x1, Zksed_sm4ks_cg_cmp_rd_rs1_b1, Zksed_sm4ks_cg_cmp_rd_rs1_b1_str) + 80005580: 000a3203 ld x4,0(x20) + 80005584: 00120c63 beq x4,x1,8000559c + 80005588: 439052ef jal x5,8000b1c0 + 8000558c: 8000557c .word 0x8000557c + 80005590: 00000000 .word 0x00000000 + 80005594: 8001c03f .word 0x8001c03f + 80005598: 00000000 .word 0x00000000 + 8000559c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x200aac4c64fc3552 + 800055a0: 00033103 ld x2,0(x6) + 800055a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x65375153d051ecbe + 800055a8: 00033483 ld x9,0(x6) + 800055ac: 00830313 addi x6,x6,8 + +00000000800055b0 : +Zksed_sm4ks_cg_cmp_rd_rs1_b2: + sm4ks x2, x2, x9, 3 # perform operation + 800055b0: f4910133 sm4ks x2,x2,x9,0x3 + # Check if x2 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x2, Zksed_sm4ks_cg_cmp_rd_rs1_b2, Zksed_sm4ks_cg_cmp_rd_rs1_b2_str) + 800055b4: 000a3203 ld x4,0(x20) + 800055b8: 00220c63 beq x4,x2,800055d0 + 800055bc: 405052ef jal x5,8000b1c0 + 800055c0: 800055b0 .word 0x800055b0 + 800055c4: 00000000 .word 0x00000000 + 800055c8: 8001c078 .word 0x8001c078 + 800055cc: 00000000 .word 0x00000000 + 800055d0: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xf2a5037094aed88a + 800055d4: 00033183 ld x3,0(x6) + 800055d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x78d591fcdad74c6d + 800055dc: 00033b83 ld x23,0(x6) + 800055e0: 00830313 addi x6,x6,8 + +00000000800055e4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b3: + sm4ks x3, x3, x23, 1 # perform operation + 800055e4: 757181b3 sm4ks x3,x3,x23,0x1 + # Check if x3 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x3, Zksed_sm4ks_cg_cmp_rd_rs1_b3, Zksed_sm4ks_cg_cmp_rd_rs1_b3_str) + 800055e8: 000a3203 ld x4,0(x20) + 800055ec: 00320c63 beq x4,x3,80005604 + 800055f0: 3d1052ef jal x5,8000b1c0 + 800055f4: 800055e4 .word 0x800055e4 + 800055f8: 00000000 .word 0x00000000 + 800055fc: 8001c0b1 .word 0x8001c0b1 + 80005600: 00000000 .word 0x00000000 + 80005604: 008a0a13 addi x20,x20,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005608: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 8000560c: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xb1c4860717d465f6 + 80005610: 00033203 ld x4,0(x6) + 80005614: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8ea784355f44e9a7 + 80005618: 00033d03 ld x26,0(x6) + 8000561c: 00830313 addi x6,x6,8 + +0000000080005620 : +Zksed_sm4ks_cg_cmp_rd_rs1_b4: + sm4ks x4, x4, x26, 3 # perform operation + 80005620: f5a20233 sm4ks x4,x4,x26,0x3 + # Check if x4 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x4, Zksed_sm4ks_cg_cmp_rd_rs1_b4, Zksed_sm4ks_cg_cmp_rd_rs1_b4_str) + 80005624: 000a3383 ld x7,0(x20) + 80005628: 00438c63 beq x7,x4,80005640 + 8000562c: 3ad0546f jal x8,8000b1d8 + 80005630: 80005620 .word 0x80005620 + 80005634: 00000000 .word 0x00000000 + 80005638: 8001c0ea .word 0x8001c0ea + 8000563c: 00000000 .word 0x00000000 + 80005640: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0xa03eb611f4c1093e + 80005644: 00033283 ld x5,0(x6) + 80005648: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x21778f6b33360255 + 8000564c: 00033603 ld x12,0(x6) + 80005650: 00830313 addi x6,x6,8 + +0000000080005654 : +Zksed_sm4ks_cg_cmp_rd_rs1_b5: + sm4ks x5, x5, x12, 1 # perform operation + 80005654: 74c282b3 sm4ks x5,x5,x12,0x1 + # Check if x5 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x5, Zksed_sm4ks_cg_cmp_rd_rs1_b5, Zksed_sm4ks_cg_cmp_rd_rs1_b5_str) + 80005658: 000a3383 ld x7,0(x20) + 8000565c: 00538c63 beq x7,x5,80005674 + 80005660: 3790546f jal x8,8000b1d8 + 80005664: 80005654 .word 0x80005654 + 80005668: 00000000 .word 0x00000000 + 8000566c: 8001c123 .word 0x8001c123 + 80005670: 00000000 .word 0x00000000 + 80005674: 008a0a13 addi x20,x20,8 + + mv x17, x6 # switch data pointer register to avoid conflict with test + 80005678: 00030893 addi x17,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs1: x6 = 0x9a60e7b57ecaa953 + 8000567c: 0008b303 ld x6,0(x17) + 80005680: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x23) # load rs2: x23 = 0x0a99abe34b3de9a8 + 80005684: 0008bb83 ld x23,0(x17) + 80005688: 00888893 addi x17,x17,8 + +000000008000568c : +Zksed_sm4ks_cg_cmp_rd_rs1_b6: + sm4ks x6, x6, x23, 0 # perform operation + 8000568c: 35730333 sm4ks x6,x6,x23,0x0 + # Check if x6 contains the expected result. x20 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x20, x8, x7, x6, Zksed_sm4ks_cg_cmp_rd_rs1_b6, Zksed_sm4ks_cg_cmp_rd_rs1_b6_str) + 80005690: 000a3383 ld x7,0(x20) + 80005694: 00638c63 beq x7,x6,800056ac + 80005698: 3410546f jal x8,8000b1d8 + 8000569c: 8000568c .word 0x8000568c + 800056a0: 00000000 .word 0x00000000 + 800056a4: 8001c15c .word 0x8001c15c + 800056a8: 00000000 .word 0x00000000 + 800056ac: 008a0a13 addi x20,x20,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 800056b0: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 800056b4: 00040293 addi x5,x8,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs1: x7 = 0x2ec92701d5d1f666 + 800056b8: 0008b383 ld x7,0(x17) + 800056bc: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs2: x16 = 0x2528a2bdbc25d618 + 800056c0: 0008b803 ld x16,0(x17) + 800056c4: 00888893 addi x17,x17,8 + +00000000800056c8 : +Zksed_sm4ks_cg_cmp_rd_rs1_b7: + sm4ks x7, x7, x16, 2 # perform operation + 800056c8: b50383b3 sm4ks x7,x7,x16,0x2 + # Check if x7 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x7, Zksed_sm4ks_cg_cmp_rd_rs1_b7, Zksed_sm4ks_cg_cmp_rd_rs1_b7_str) + 800056cc: 000a3203 ld x4,0(x20) + 800056d0: 00720c63 beq x4,x7,800056e8 + 800056d4: 2ed052ef jal x5,8000b1c0 + 800056d8: 800056c8 .word 0x800056c8 + 800056dc: 00000000 .word 0x00000000 + 800056e0: 8001c195 .word 0x8001c195 + 800056e4: 00000000 .word 0x00000000 + 800056e8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x17, x8) # load rs1: x8 = 0x487d79ca5fdbb060 + 800056ec: 0008b403 ld x8,0(x17) + 800056f0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs2: x14 = 0xcfed2e97d93b40f7 + 800056f4: 0008b703 ld x14,0(x17) + 800056f8: 00888893 addi x17,x17,8 + +00000000800056fc : +Zksed_sm4ks_cg_cmp_rd_rs1_b8: + sm4ks x8, x8, x14, 0 # perform operation + 800056fc: 34e40433 sm4ks x8,x8,x14,0x0 + # Check if x8 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x8, Zksed_sm4ks_cg_cmp_rd_rs1_b8, Zksed_sm4ks_cg_cmp_rd_rs1_b8_str) + 80005700: 000a3203 ld x4,0(x20) + 80005704: 00820c63 beq x4,x8,8000571c + 80005708: 2b9052ef jal x5,8000b1c0 + 8000570c: 800056fc .word 0x800056fc + 80005710: 00000000 .word 0x00000000 + 80005714: 8001c1ce .word 0x8001c1ce + 80005718: 00000000 .word 0x00000000 + 8000571c: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x17, x9) # load rs1: x9 = 0x715a0b36335575c1 + 80005720: 0008b483 ld x9,0(x17) + 80005724: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs2: x11 = 0x29ae344dbb36ebf3 + 80005728: 0008b583 ld x11,0(x17) + 8000572c: 00888893 addi x17,x17,8 + +0000000080005730 : +Zksed_sm4ks_cg_cmp_rd_rs1_b9: + sm4ks x9, x9, x11, 3 # perform operation + 80005730: f4b484b3 sm4ks x9,x9,x11,0x3 + # Check if x9 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x9, Zksed_sm4ks_cg_cmp_rd_rs1_b9, Zksed_sm4ks_cg_cmp_rd_rs1_b9_str) + 80005734: 000a3203 ld x4,0(x20) + 80005738: 00920c63 beq x4,x9,80005750 + 8000573c: 285052ef jal x5,8000b1c0 + 80005740: 80005730 .word 0x80005730 + 80005744: 00000000 .word 0x00000000 + 80005748: 8001c207 .word 0x8001c207 + 8000574c: 00000000 .word 0x00000000 + 80005750: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x17, x10) # load rs1: x10 = 0x5ed291bbeceb0902 + 80005754: 0008b503 ld x10,0(x17) + 80005758: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x25) # load rs2: x25 = 0x6630d2cded93291b + 8000575c: 0008bc83 ld x25,0(x17) + 80005760: 00888893 addi x17,x17,8 + +0000000080005764 : +Zksed_sm4ks_cg_cmp_rd_rs1_b10: + sm4ks x10, x10, x25, 3 # perform operation + 80005764: f5950533 sm4ks x10,x10,x25,0x3 + # Check if x10 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x10, Zksed_sm4ks_cg_cmp_rd_rs1_b10, Zksed_sm4ks_cg_cmp_rd_rs1_b10_str) + 80005768: 000a3203 ld x4,0(x20) + 8000576c: 00a20c63 beq x4,x10,80005784 + 80005770: 251052ef jal x5,8000b1c0 + 80005774: 80005764 .word 0x80005764 + 80005778: 00000000 .word 0x00000000 + 8000577c: 8001c240 .word 0x8001c240 + 80005780: 00000000 .word 0x00000000 + 80005784: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x17, x11) # load rs1: x11 = 0xad9191d19249f94b + 80005788: 0008b583 ld x11,0(x17) + 8000578c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs2: x12 = 0x958282e6fd93b41b + 80005790: 0008b603 ld x12,0(x17) + 80005794: 00888893 addi x17,x17,8 + +0000000080005798 : +Zksed_sm4ks_cg_cmp_rd_rs1_b11: + sm4ks x11, x11, x12, 0 # perform operation + 80005798: 34c585b3 sm4ks x11,x11,x12,0x0 + # Check if x11 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x11, Zksed_sm4ks_cg_cmp_rd_rs1_b11, Zksed_sm4ks_cg_cmp_rd_rs1_b11_str) + 8000579c: 000a3203 ld x4,0(x20) + 800057a0: 00b20c63 beq x4,x11,800057b8 + 800057a4: 21d052ef jal x5,8000b1c0 + 800057a8: 80005798 .word 0x80005798 + 800057ac: 00000000 .word 0x00000000 + 800057b0: 8001c27a .word 0x8001c27a + 800057b4: 00000000 .word 0x00000000 + 800057b8: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x17, x12) # load rs1: x12 = 0xb5bcb1c2fb0532a1 + 800057bc: 0008b603 ld x12,0(x17) + 800057c0: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x7) # load rs2: x7 = 0xc44a845844ceb9b0 + 800057c4: 0008b383 ld x7,0(x17) + 800057c8: 00888893 addi x17,x17,8 + +00000000800057cc : +Zksed_sm4ks_cg_cmp_rd_rs1_b12: + sm4ks x12, x12, x7, 2 # perform operation + 800057cc: b4760633 sm4ks x12,x12,x7,0x2 + # Check if x12 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x12, Zksed_sm4ks_cg_cmp_rd_rs1_b12, Zksed_sm4ks_cg_cmp_rd_rs1_b12_str) + 800057d0: 000a3203 ld x4,0(x20) + 800057d4: 00c20c63 beq x4,x12,800057ec + 800057d8: 1e9052ef jal x5,8000b1c0 + 800057dc: 800057cc .word 0x800057cc + 800057e0: 00000000 .word 0x00000000 + 800057e4: 8001c2b4 .word 0x8001c2b4 + 800057e8: 00000000 .word 0x00000000 + 800057ec: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x17, x13) # load rs1: x13 = 0x2ad36dcf04db0fd5 + 800057f0: 0008b683 ld x13,0(x17) + 800057f4: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs2: x15 = 0xd079397dac59c906 + 800057f8: 0008b783 ld x15,0(x17) + 800057fc: 00888893 addi x17,x17,8 + +0000000080005800 : +Zksed_sm4ks_cg_cmp_rd_rs1_b13: + sm4ks x13, x13, x15, 0 # perform operation + 80005800: 34f686b3 sm4ks x13,x13,x15,0x0 + # Check if x13 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x13, Zksed_sm4ks_cg_cmp_rd_rs1_b13, Zksed_sm4ks_cg_cmp_rd_rs1_b13_str) + 80005804: 000a3203 ld x4,0(x20) + 80005808: 00d20c63 beq x4,x13,80005820 + 8000580c: 1b5052ef jal x5,8000b1c0 + 80005810: 80005800 .word 0x80005800 + 80005814: 00000000 .word 0x00000000 + 80005818: 8001c2ee .word 0x8001c2ee + 8000581c: 00000000 .word 0x00000000 + 80005820: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x17, x14) # load rs1: x14 = 0x73c1b8b554af2dc9 + 80005824: 0008b703 ld x14,0(x17) + 80005828: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x28) # load rs2: x28 = 0x7bec5d0eaeeafd6a + 8000582c: 0008be03 ld x28,0(x17) + 80005830: 00888893 addi x17,x17,8 + +0000000080005834 : +Zksed_sm4ks_cg_cmp_rd_rs1_b14: + sm4ks x14, x14, x28, 0 # perform operation + 80005834: 35c70733 sm4ks x14,x14,x28,0x0 + # Check if x14 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x14, Zksed_sm4ks_cg_cmp_rd_rs1_b14, Zksed_sm4ks_cg_cmp_rd_rs1_b14_str) + 80005838: 000a3203 ld x4,0(x20) + 8000583c: 00e20c63 beq x4,x14,80005854 + 80005840: 181052ef jal x5,8000b1c0 + 80005844: 80005834 .word 0x80005834 + 80005848: 00000000 .word 0x00000000 + 8000584c: 8001c328 .word 0x8001c328 + 80005850: 00000000 .word 0x00000000 + 80005854: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x17, x15) # load rs1: x15 = 0xb81104f0fc1b3cc1 + 80005858: 0008b783 ld x15,0(x17) + 8000585c: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x24) # load rs2: x24 = 0x27edfe29f16b9569 + 80005860: 0008bc03 ld x24,0(x17) + 80005864: 00888893 addi x17,x17,8 + +0000000080005868 : +Zksed_sm4ks_cg_cmp_rd_rs1_b15: + sm4ks x15, x15, x24, 1 # perform operation + 80005868: 758787b3 sm4ks x15,x15,x24,0x1 + # Check if x15 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x15, Zksed_sm4ks_cg_cmp_rd_rs1_b15, Zksed_sm4ks_cg_cmp_rd_rs1_b15_str) + 8000586c: 000a3203 ld x4,0(x20) + 80005870: 00f20c63 beq x4,x15,80005888 + 80005874: 14d052ef jal x5,8000b1c0 + 80005878: 80005868 .word 0x80005868 + 8000587c: 00000000 .word 0x00000000 + 80005880: 8001c362 .word 0x8001c362 + 80005884: 00000000 .word 0x00000000 + 80005888: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x17, x16) # load rs1: x16 = 0x430d7c533c7412fb + 8000588c: 0008b803 ld x16,0(x17) + 80005890: 00888893 addi x17,x17,8 + RVTEST_TESTDATA_LOAD_INT(x17, x6) # load rs2: x6 = 0xd38e347c309f4852 + 80005894: 0008b303 ld x6,0(x17) + 80005898: 00888893 addi x17,x17,8 + +000000008000589c : +Zksed_sm4ks_cg_cmp_rd_rs1_b16: + sm4ks x16, x16, x6, 3 # perform operation + 8000589c: f4680833 sm4ks x16,x16,x6,0x3 + # Check if x16 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x16, Zksed_sm4ks_cg_cmp_rd_rs1_b16, Zksed_sm4ks_cg_cmp_rd_rs1_b16_str) + 800058a0: 000a3203 ld x4,0(x20) + 800058a4: 01020c63 beq x4,x16,800058bc + 800058a8: 119052ef jal x5,8000b1c0 + 800058ac: 8000589c .word 0x8000589c + 800058b0: 00000000 .word 0x00000000 + 800058b4: 8001c39c .word 0x8001c39c + 800058b8: 00000000 .word 0x00000000 + 800058bc: 008a0a13 addi x20,x20,8 + + mv x11, x17 # switch data pointer register to avoid conflict with test + 800058c0: 00088593 addi x11,x17,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs1: x17 = 0x5f48f76ed8ab05f0 + 800058c4: 0005b883 ld x17,0(x11) + 800058c8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0xb0cd2450705a6b53 + 800058cc: 0005b083 ld x1,0(x11) + 800058d0: 00858593 addi x11,x11,8 + +00000000800058d4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b17: + sm4ks x17, x17, x1, 1 # perform operation + 800058d4: 741888b3 sm4ks x17,x17,x1,0x1 + # Check if x17 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x17, Zksed_sm4ks_cg_cmp_rd_rs1_b17, Zksed_sm4ks_cg_cmp_rd_rs1_b17_str) + 800058d8: 000a3203 ld x4,0(x20) + 800058dc: 01120c63 beq x4,x17,800058f4 + 800058e0: 0e1052ef jal x5,8000b1c0 + 800058e4: 800058d4 .word 0x800058d4 + 800058e8: 00000000 .word 0x00000000 + 800058ec: 8001c3d6 .word 0x8001c3d6 + 800058f0: 00000000 .word 0x00000000 + 800058f4: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x11, x18) # load rs1: x18 = 0x771e1cbefd3de734 + 800058f8: 0005b903 ld x18,0(x11) + 800058fc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0xfaca9c2033f8c14f + 80005900: 0005bf83 ld x31,0(x11) + 80005904: 00858593 addi x11,x11,8 + +0000000080005908 : +Zksed_sm4ks_cg_cmp_rd_rs1_b18: + sm4ks x18, x18, x31, 2 # perform operation + 80005908: b5f90933 sm4ks x18,x18,x31,0x2 + # Check if x18 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x18, Zksed_sm4ks_cg_cmp_rd_rs1_b18, Zksed_sm4ks_cg_cmp_rd_rs1_b18_str) + 8000590c: 000a3203 ld x4,0(x20) + 80005910: 01220c63 beq x4,x18,80005928 + 80005914: 0ad052ef jal x5,8000b1c0 + 80005918: 80005908 .word 0x80005908 + 8000591c: 00000000 .word 0x00000000 + 80005920: 8001c410 .word 0x8001c410 + 80005924: 00000000 .word 0x00000000 + 80005928: 008a0a13 addi x20,x20,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x31e7dc862566958e + 8000592c: 0005b983 ld x19,0(x11) + 80005930: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x440f5ca3a58b11d4 + 80005934: 0005b003 ld x0,0(x11) + 80005938: 00858593 addi x11,x11,8 + +000000008000593c : +Zksed_sm4ks_cg_cmp_rd_rs1_b19: + sm4ks x19, x19, x0, 1 # perform operation + 8000593c: 740989b3 sm4ks x19,x19,x0,0x1 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zksed_sm4ks_cg_cmp_rd_rs1_b19, Zksed_sm4ks_cg_cmp_rd_rs1_b19_str) + 80005940: 000a3203 ld x4,0(x20) + 80005944: 01320c63 beq x4,x19,8000595c + 80005948: 079052ef jal x5,8000b1c0 + 8000594c: 8000593c .word 0x8000593c + 80005950: 00000000 .word 0x00000000 + 80005954: 8001c44a .word 0x8001c44a + 80005958: 00000000 .word 0x00000000 + 8000595c: 008a0a13 addi x20,x20,8 + + mv x25, x20 # switch signature pointer register to avoid conflict with test + 80005960: 000a0c93 addi x25,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x6f0c7fa0ea2fefde + 80005964: 0005ba03 ld x20,0(x11) + 80005968: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x27a7df96d0e70322 + 8000596c: 0005b083 ld x1,0(x11) + 80005970: 00858593 addi x11,x11,8 + +0000000080005974 : +Zksed_sm4ks_cg_cmp_rd_rs1_b20: + sm4ks x20, x20, x1, 2 # perform operation + 80005974: b41a0a33 sm4ks x20,x20,x1,0x2 + # Check if x20 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x20, Zksed_sm4ks_cg_cmp_rd_rs1_b20, Zksed_sm4ks_cg_cmp_rd_rs1_b20_str) + 80005978: 000cb203 ld x4,0(x25) + 8000597c: 01420c63 beq x4,x20,80005994 + 80005980: 041052ef jal x5,8000b1c0 + 80005984: 80005974 .word 0x80005974 + 80005988: 00000000 .word 0x00000000 + 8000598c: 8001c484 .word 0x8001c484 + 80005990: 00000000 .word 0x00000000 + 80005994: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x63537832d66054b4 + 80005998: 0005ba83 ld x21,0(x11) + 8000599c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs2: x19 = 0x35481c430d2a1856 + 800059a0: 0005b983 ld x19,0(x11) + 800059a4: 00858593 addi x11,x11,8 + +00000000800059a8 : +Zksed_sm4ks_cg_cmp_rd_rs1_b21: + sm4ks x21, x21, x19, 3 # perform operation + 800059a8: f53a8ab3 sm4ks x21,x21,x19,0x3 + # Check if x21 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x21, Zksed_sm4ks_cg_cmp_rd_rs1_b21, Zksed_sm4ks_cg_cmp_rd_rs1_b21_str) + 800059ac: 000cb203 ld x4,0(x25) + 800059b0: 01520c63 beq x4,x21,800059c8 + 800059b4: 00d052ef jal x5,8000b1c0 + 800059b8: 800059a8 .word 0x800059a8 + 800059bc: 00000000 .word 0x00000000 + 800059c0: 8001c4be .word 0x8001c4be + 800059c4: 00000000 .word 0x00000000 + 800059c8: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs1: x22 = 0x4204bb917905b864 + 800059cc: 0005bb03 ld x22,0(x11) + 800059d0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x16) # load rs2: x16 = 0x2671a4b7fef7757d + 800059d4: 0005b803 ld x16,0(x11) + 800059d8: 00858593 addi x11,x11,8 + +00000000800059dc : +Zksed_sm4ks_cg_cmp_rd_rs1_b22: + sm4ks x22, x22, x16, 3 # perform operation + 800059dc: f50b0b33 sm4ks x22,x22,x16,0x3 + # Check if x22 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x22, Zksed_sm4ks_cg_cmp_rd_rs1_b22, Zksed_sm4ks_cg_cmp_rd_rs1_b22_str) + 800059e0: 000cb203 ld x4,0(x25) + 800059e4: 01620c63 beq x4,x22,800059fc + 800059e8: 7d8052ef jal x5,8000b1c0 + 800059ec: 800059dc .word 0x800059dc + 800059f0: 00000000 .word 0x00000000 + 800059f4: 8001c4f8 .word 0x8001c4f8 + 800059f8: 00000000 .word 0x00000000 + 800059fc: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x11, x23) # load rs1: x23 = 0x8bf9c37e000c147b + 80005a00: 0005bb83 ld x23,0(x11) + 80005a04: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0xc1494fbef4674094 + 80005a08: 0005b783 ld x15,0(x11) + 80005a0c: 00858593 addi x11,x11,8 + +0000000080005a10 : +Zksed_sm4ks_cg_cmp_rd_rs1_b23: + sm4ks x23, x23, x15, 3 # perform operation + 80005a10: f4fb8bb3 sm4ks x23,x23,x15,0x3 + # Check if x23 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x23, Zksed_sm4ks_cg_cmp_rd_rs1_b23, Zksed_sm4ks_cg_cmp_rd_rs1_b23_str) + 80005a14: 000cb203 ld x4,0(x25) + 80005a18: 01720c63 beq x4,x23,80005a30 + 80005a1c: 7a4052ef jal x5,8000b1c0 + 80005a20: 80005a10 .word 0x80005a10 + 80005a24: 00000000 .word 0x00000000 + 80005a28: 8001c532 .word 0x8001c532 + 80005a2c: 00000000 .word 0x00000000 + 80005a30: 008c8c93 addi x25,x25,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x11, x24) # load rs1: x24 = 0x938754ba02f678eb + 80005a34: 0005bc03 ld x24,0(x11) + 80005a38: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0x3b78ed92d8ef1de1 + 80005a3c: 0005b403 ld x8,0(x11) + 80005a40: 00858593 addi x11,x11,8 + +0000000080005a44 : +Zksed_sm4ks_cg_cmp_rd_rs1_b24: + sm4ks x24, x24, x8, 2 # perform operation + 80005a44: b48c0c33 sm4ks x24,x24,x8,0x2 + # Check if x24 contains the expected result. x25 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x25, x5, x4, x24, Zksed_sm4ks_cg_cmp_rd_rs1_b24, Zksed_sm4ks_cg_cmp_rd_rs1_b24_str) + 80005a48: 000cb203 ld x4,0(x25) + 80005a4c: 01820c63 beq x4,x24,80005a64 + 80005a50: 770052ef jal x5,8000b1c0 + 80005a54: 80005a44 .word 0x80005a44 + 80005a58: 00000000 .word 0x00000000 + 80005a5c: 8001c56c .word 0x8001c56c + 80005a60: 00000000 .word 0x00000000 + 80005a64: 008c8c93 addi x25,x25,8 + + mv x18, x25 # switch signature pointer register to avoid conflict with test + 80005a68: 000c8913 addi x18,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs1: x25 = 0xae3a1524ad9a879f + 80005a6c: 0005bc83 ld x25,0(x11) + 80005a70: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x8a8efab7811b3765 + 80005a74: 0005bb03 ld x22,0(x11) + 80005a78: 00858593 addi x11,x11,8 + +0000000080005a7c : +Zksed_sm4ks_cg_cmp_rd_rs1_b25: + sm4ks x25, x25, x22, 2 # perform operation + 80005a7c: b56c8cb3 sm4ks x25,x25,x22,0x2 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zksed_sm4ks_cg_cmp_rd_rs1_b25, Zksed_sm4ks_cg_cmp_rd_rs1_b25_str) + 80005a80: 00093203 ld x4,0(x18) + 80005a84: 01920c63 beq x4,x25,80005a9c + 80005a88: 738052ef jal x5,8000b1c0 + 80005a8c: 80005a7c .word 0x80005a7c + 80005a90: 00000000 .word 0x00000000 + 80005a94: 8001c5a6 .word 0x8001c5a6 + 80005a98: 00000000 .word 0x00000000 + 80005a9c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0xc849bf48e81bf10d + 80005aa0: 0005bd03 ld x26,0(x11) + 80005aa4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x22) # load rs2: x22 = 0x6b0f41a8a698b14a + 80005aa8: 0005bb03 ld x22,0(x11) + 80005aac: 00858593 addi x11,x11,8 + +0000000080005ab0 : +Zksed_sm4ks_cg_cmp_rd_rs1_b26: + sm4ks x26, x26, x22, 1 # perform operation + 80005ab0: 756d0d33 sm4ks x26,x26,x22,0x1 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zksed_sm4ks_cg_cmp_rd_rs1_b26, Zksed_sm4ks_cg_cmp_rd_rs1_b26_str) + 80005ab4: 00093203 ld x4,0(x18) + 80005ab8: 01a20c63 beq x4,x26,80005ad0 + 80005abc: 704052ef jal x5,8000b1c0 + 80005ac0: 80005ab0 .word 0x80005ab0 + 80005ac4: 00000000 .word 0x00000000 + 80005ac8: 8001c5e0 .word 0x8001c5e0 + 80005acc: 00000000 .word 0x00000000 + 80005ad0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x11, x27) # load rs1: x27 = 0x02d47bf0784e90a0 + 80005ad4: 0005bd83 ld x27,0(x11) + 80005ad8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs2: x31 = 0x09b0d0f9cd135bc3 + 80005adc: 0005bf83 ld x31,0(x11) + 80005ae0: 00858593 addi x11,x11,8 + +0000000080005ae4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b27: + sm4ks x27, x27, x31, 0 # perform operation + 80005ae4: 35fd8db3 sm4ks x27,x27,x31,0x0 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zksed_sm4ks_cg_cmp_rd_rs1_b27, Zksed_sm4ks_cg_cmp_rd_rs1_b27_str) + 80005ae8: 00093203 ld x4,0(x18) + 80005aec: 01b20c63 beq x4,x27,80005b04 + 80005af0: 6d0052ef jal x5,8000b1c0 + 80005af4: 80005ae4 .word 0x80005ae4 + 80005af8: 00000000 .word 0x00000000 + 80005afc: 8001c61a .word 0x8001c61a + 80005b00: 00000000 .word 0x00000000 + 80005b04: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xd414d1c7360cab2d + 80005b08: 0005be03 ld x28,0(x11) + 80005b0c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x7552696d28399688 + 80005b10: 0005b783 ld x15,0(x11) + 80005b14: 00858593 addi x11,x11,8 + +0000000080005b18 : +Zksed_sm4ks_cg_cmp_rd_rs1_b28: + sm4ks x28, x28, x15, 0 # perform operation + 80005b18: 34fe0e33 sm4ks x28,x28,x15,0x0 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zksed_sm4ks_cg_cmp_rd_rs1_b28, Zksed_sm4ks_cg_cmp_rd_rs1_b28_str) + 80005b1c: 00093203 ld x4,0(x18) + 80005b20: 01c20c63 beq x4,x28,80005b38 + 80005b24: 69c052ef jal x5,8000b1c0 + 80005b28: 80005b18 .word 0x80005b18 + 80005b2c: 00000000 .word 0x00000000 + 80005b30: 8001c654 .word 0x8001c654 + 80005b34: 00000000 .word 0x00000000 + 80005b38: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x11, x29) # load rs1: x29 = 0xe74b1f0b4f04931b + 80005b3c: 0005be83 ld x29,0(x11) + 80005b40: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs2: x15 = 0x4cd5f1d662818044 + 80005b44: 0005b783 ld x15,0(x11) + 80005b48: 00858593 addi x11,x11,8 + +0000000080005b4c : +Zksed_sm4ks_cg_cmp_rd_rs1_b29: + sm4ks x29, x29, x15, 2 # perform operation + 80005b4c: b4fe8eb3 sm4ks x29,x29,x15,0x2 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zksed_sm4ks_cg_cmp_rd_rs1_b29, Zksed_sm4ks_cg_cmp_rd_rs1_b29_str) + 80005b50: 00093203 ld x4,0(x18) + 80005b54: 01d20c63 beq x4,x29,80005b6c + 80005b58: 668052ef jal x5,8000b1c0 + 80005b5c: 80005b4c .word 0x80005b4c + 80005b60: 00000000 .word 0x00000000 + 80005b64: 8001c68e .word 0x8001c68e + 80005b68: 00000000 .word 0x00000000 + 80005b6c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x11, x30) # load rs1: x30 = 0x178182349fccdd17 + 80005b70: 0005bf03 ld x30,0(x11) + 80005b74: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x17) # load rs2: x17 = 0x7ed3048d1b15fd9d + 80005b78: 0005b883 ld x17,0(x11) + 80005b7c: 00858593 addi x11,x11,8 + +0000000080005b80 : +Zksed_sm4ks_cg_cmp_rd_rs1_b30: + sm4ks x30, x30, x17, 0 # perform operation + 80005b80: 351f0f33 sm4ks x30,x30,x17,0x0 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zksed_sm4ks_cg_cmp_rd_rs1_b30, Zksed_sm4ks_cg_cmp_rd_rs1_b30_str) + 80005b84: 00093203 ld x4,0(x18) + 80005b88: 01e20c63 beq x4,x30,80005ba0 + 80005b8c: 634052ef jal x5,8000b1c0 + 80005b90: 80005b80 .word 0x80005b80 + 80005b94: 00000000 .word 0x00000000 + 80005b98: 8001c6c8 .word 0x8001c6c8 + 80005b9c: 00000000 .word 0x00000000 + 80005ba0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xfd36c678da0858fd + 80005ba4: 0005bf83 ld x31,0(x11) + 80005ba8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x25) # load rs2: x25 = 0xe1ecc8185262d973 + 80005bac: 0005bc83 ld x25,0(x11) + 80005bb0: 00858593 addi x11,x11,8 + +0000000080005bb4 : +Zksed_sm4ks_cg_cmp_rd_rs1_b31: + sm4ks x31, x31, x25, 0 # perform operation + 80005bb4: 359f8fb3 sm4ks x31,x31,x25,0x0 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zksed_sm4ks_cg_cmp_rd_rs1_b31, Zksed_sm4ks_cg_cmp_rd_rs1_b31_str) + 80005bb8: 00093203 ld x4,0(x18) + 80005bbc: 01f20c63 beq x4,x31,80005bd4 + 80005bc0: 600052ef jal x5,8000b1c0 + 80005bc4: 80005bb4 .word 0x80005bb4 + 80005bc8: 00000000 .word 0x00000000 + 80005bcc: 8001c702 .word 0x8001c702 + 80005bd0: 00000000 .word 0x00000000 + 80005bd4: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x11, x19) # load rs1: x19 = 0x63771aff11bc6a5f + 80005bd8: 0005b983 ld x19,0(x11) + 80005bdc: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x0) # load rs2: x0 = 0x8316859090635e89 + 80005be0: 0005b003 ld x0,0(x11) + 80005be4: 00858593 addi x11,x11,8 + +0000000080005be8 : +Zksed_sm4ks_cg_cmp_rd_rs2_b0: + sm4ks x0, x19, x0, 1 # perform operation + 80005be8: 74098033 sm4ks x0,x19,x0,0x1 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zksed_sm4ks_cg_cmp_rd_rs2_b0, Zksed_sm4ks_cg_cmp_rd_rs2_b0_str) + 80005bec: 00093203 ld x4,0(x18) + 80005bf0: 00020c63 beq x4,x0,80005c08 + 80005bf4: 5cc052ef jal x5,8000b1c0 + 80005bf8: 80005be8 .word 0x80005be8 + 80005bfc: 00000000 .word 0x00000000 + 80005c00: 8001c73c .word 0x8001c73c + 80005c04: 00000000 .word 0x00000000 + 80005c08: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x11, x20) # load rs1: x20 = 0x8a87832108f4d21d + 80005c0c: 0005ba03 ld x20,0(x11) + 80005c10: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs2: x1 = 0x2d629bbf7dd7a27c + 80005c14: 0005b083 ld x1,0(x11) + 80005c18: 00858593 addi x11,x11,8 + +0000000080005c1c : +Zksed_sm4ks_cg_cmp_rd_rs2_b1: + sm4ks x1, x20, x1, 2 # perform operation + 80005c1c: b41a00b3 sm4ks x1,x20,x1,0x2 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksed_sm4ks_cg_cmp_rd_rs2_b1, Zksed_sm4ks_cg_cmp_rd_rs2_b1_str) + 80005c20: 00093203 ld x4,0(x18) + 80005c24: 00120c63 beq x4,x1,80005c3c + 80005c28: 598052ef jal x5,8000b1c0 + 80005c2c: 80005c1c .word 0x80005c1c + 80005c30: 00000000 .word 0x00000000 + 80005c34: 8001c775 .word 0x8001c775 + 80005c38: 00000000 .word 0x00000000 + 80005c3c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs1: x3 = 0xfeac1ad868fc5beb + 80005c40: 0005b183 ld x3,0(x11) + 80005c44: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x2) # load rs2: x2 = 0x34a1a7d4ce78d979 + 80005c48: 0005b103 ld x2,0(x11) + 80005c4c: 00858593 addi x11,x11,8 + +0000000080005c50 : +Zksed_sm4ks_cg_cmp_rd_rs2_b2: + sm4ks x2, x3, x2, 1 # perform operation + 80005c50: 74218133 sm4ks x2,x3,x2,0x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zksed_sm4ks_cg_cmp_rd_rs2_b2, Zksed_sm4ks_cg_cmp_rd_rs2_b2_str) + 80005c54: 00093203 ld x4,0(x18) + 80005c58: 00220c63 beq x4,x2,80005c70 + 80005c5c: 564052ef jal x5,8000b1c0 + 80005c60: 80005c50 .word 0x80005c50 + 80005c64: 00000000 .word 0x00000000 + 80005c68: 8001c7ae .word 0x8001c7ae + 80005c6c: 00000000 .word 0x00000000 + 80005c70: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x11, x28) # load rs1: x28 = 0xc7a0ce0dff44a890 + 80005c74: 0005be03 ld x28,0(x11) + 80005c78: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x3) # load rs2: x3 = 0xd8aa9f7c4780c395 + 80005c7c: 0005b183 ld x3,0(x11) + 80005c80: 00858593 addi x11,x11,8 + +0000000080005c84 : +Zksed_sm4ks_cg_cmp_rd_rs2_b3: + sm4ks x3, x28, x3, 2 # perform operation + 80005c84: b43e01b3 sm4ks x3,x28,x3,0x2 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zksed_sm4ks_cg_cmp_rd_rs2_b3, Zksed_sm4ks_cg_cmp_rd_rs2_b3_str) + 80005c88: 00093203 ld x4,0(x18) + 80005c8c: 00320c63 beq x4,x3,80005ca4 + 80005c90: 530052ef jal x5,8000b1c0 + 80005c94: 80005c84 .word 0x80005c84 + 80005c98: 00000000 .word 0x00000000 + 80005c9c: 8001c7e7 .word 0x8001c7e7 + 80005ca0: 00000000 .word 0x00000000 + 80005ca4: 00890913 addi x18,x18,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80005ca8: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80005cac: 00028413 addi x8,x5,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x11, x1) # load rs1: x1 = 0xb5276358a98985ad + 80005cb0: 0005b083 ld x1,0(x11) + 80005cb4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x4) # load rs2: x4 = 0x021d5cb432c3c1c5 + 80005cb8: 0005b203 ld x4,0(x11) + 80005cbc: 00858593 addi x11,x11,8 + +0000000080005cc0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b4: + sm4ks x4, x1, x4, 1 # perform operation + 80005cc0: 74408233 sm4ks x4,x1,x4,0x1 + # Check if x4 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x4, Zksed_sm4ks_cg_cmp_rd_rs2_b4, Zksed_sm4ks_cg_cmp_rd_rs2_b4_str) + 80005cc4: 00093383 ld x7,0(x18) + 80005cc8: 00438c63 beq x7,x4,80005ce0 + 80005ccc: 50c0546f jal x8,8000b1d8 + 80005cd0: 80005cc0 .word 0x80005cc0 + 80005cd4: 00000000 .word 0x00000000 + 80005cd8: 8001c820 .word 0x8001c820 + 80005cdc: 00000000 .word 0x00000000 + 80005ce0: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x11, x26) # load rs1: x26 = 0x3b88bb991536cba0 + 80005ce4: 0005bd03 ld x26,0(x11) + 80005ce8: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x5) # load rs2: x5 = 0x8374eb951b9a631f + 80005cec: 0005b283 ld x5,0(x11) + 80005cf0: 00858593 addi x11,x11,8 + +0000000080005cf4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b5: + sm4ks x5, x26, x5, 1 # perform operation + 80005cf4: 745d02b3 sm4ks x5,x26,x5,0x1 + # Check if x5 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x5, Zksed_sm4ks_cg_cmp_rd_rs2_b5, Zksed_sm4ks_cg_cmp_rd_rs2_b5_str) + 80005cf8: 00093383 ld x7,0(x18) + 80005cfc: 00538c63 beq x7,x5,80005d14 + 80005d00: 4d80546f jal x8,8000b1d8 + 80005d04: 80005cf4 .word 0x80005cf4 + 80005d08: 00000000 .word 0x00000000 + 80005d0c: 8001c859 .word 0x8001c859 + 80005d10: 00000000 .word 0x00000000 + 80005d14: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs1: x9 = 0x8741e8aea7949ebf + 80005d18: 0005b483 ld x9,0(x11) + 80005d1c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs2: x6 = 0x3c7900882e6bdcc7 + 80005d20: 0005b303 ld x6,0(x11) + 80005d24: 00858593 addi x11,x11,8 + +0000000080005d28 : +Zksed_sm4ks_cg_cmp_rd_rs2_b6: + sm4ks x6, x9, x6, 3 # perform operation + 80005d28: f4648333 sm4ks x6,x9,x6,0x3 + # Check if x6 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x6, Zksed_sm4ks_cg_cmp_rd_rs2_b6, Zksed_sm4ks_cg_cmp_rd_rs2_b6_str) + 80005d2c: 00093383 ld x7,0(x18) + 80005d30: 00638c63 beq x7,x6,80005d48 + 80005d34: 4a40546f jal x8,8000b1d8 + 80005d38: 80005d28 .word 0x80005d28 + 80005d3c: 00000000 .word 0x00000000 + 80005d40: 8001c892 .word 0x8001c892 + 80005d44: 00000000 .word 0x00000000 + 80005d48: 00890913 addi x18,x18,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 80005d4c: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 80005d50: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x11, x31) # load rs1: x31 = 0xf9ce81a2c5ebba42 + 80005d54: 0005bf83 ld x31,0(x11) + 80005d58: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x7) # load rs2: x7 = 0xe1eaeab70e172559 + 80005d5c: 0005b383 ld x7,0(x11) + 80005d60: 00858593 addi x11,x11,8 + +0000000080005d64 : +Zksed_sm4ks_cg_cmp_rd_rs2_b7: + sm4ks x7, x31, x7, 0 # perform operation + 80005d64: 347f83b3 sm4ks x7,x31,x7,0x0 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zksed_sm4ks_cg_cmp_rd_rs2_b7, Zksed_sm4ks_cg_cmp_rd_rs2_b7_str) + 80005d68: 00093683 ld x13,0(x18) + 80005d6c: 00768c63 beq x13,x7,80005d84 + 80005d70: 4900576f jal x14,8000b200 + 80005d74: 80005d64 .word 0x80005d64 + 80005d78: 00000000 .word 0x00000000 + 80005d7c: 8001c8cb .word 0x8001c8cb + 80005d80: 00000000 .word 0x00000000 + 80005d84: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x11, x6) # load rs1: x6 = 0xf872f306a21d1d37 + 80005d88: 0005b303 ld x6,0(x11) + 80005d8c: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x8) # load rs2: x8 = 0xaccbf035a249ecb7 + 80005d90: 0005b403 ld x8,0(x11) + 80005d94: 00858593 addi x11,x11,8 + +0000000080005d98 : +Zksed_sm4ks_cg_cmp_rd_rs2_b8: + sm4ks x8, x6, x8, 1 # perform operation + 80005d98: 74830433 sm4ks x8,x6,x8,0x1 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zksed_sm4ks_cg_cmp_rd_rs2_b8, Zksed_sm4ks_cg_cmp_rd_rs2_b8_str) + 80005d9c: 00093683 ld x13,0(x18) + 80005da0: 00868c63 beq x13,x8,80005db8 + 80005da4: 45c0576f jal x14,8000b200 + 80005da8: 80005d98 .word 0x80005d98 + 80005dac: 00000000 .word 0x00000000 + 80005db0: 8001c904 .word 0x8001c904 + 80005db4: 00000000 .word 0x00000000 + 80005db8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x11, x21) # load rs1: x21 = 0x9b26d57dabd962b5 + 80005dbc: 0005ba83 ld x21,0(x11) + 80005dc0: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x9) # load rs2: x9 = 0xf8a1e7631e8c7a57 + 80005dc4: 0005b483 ld x9,0(x11) + 80005dc8: 00858593 addi x11,x11,8 + +0000000080005dcc : +Zksed_sm4ks_cg_cmp_rd_rs2_b9: + sm4ks x9, x21, x9, 1 # perform operation + 80005dcc: 749a84b3 sm4ks x9,x21,x9,0x1 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zksed_sm4ks_cg_cmp_rd_rs2_b9, Zksed_sm4ks_cg_cmp_rd_rs2_b9_str) + 80005dd0: 00093683 ld x13,0(x18) + 80005dd4: 00968c63 beq x13,x9,80005dec + 80005dd8: 4280576f jal x14,8000b200 + 80005ddc: 80005dcc .word 0x80005dcc + 80005de0: 00000000 .word 0x00000000 + 80005de4: 8001c93d .word 0x8001c93d + 80005de8: 00000000 .word 0x00000000 + 80005dec: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x11, x15) # load rs1: x15 = 0xb1cb20ba8ed1c58a + 80005df0: 0005b783 ld x15,0(x11) + 80005df4: 00858593 addi x11,x11,8 + RVTEST_TESTDATA_LOAD_INT(x11, x10) # load rs2: x10 = 0x804befec82e167f0 + 80005df8: 0005b503 ld x10,0(x11) + 80005dfc: 00858593 addi x11,x11,8 + +0000000080005e00 : +Zksed_sm4ks_cg_cmp_rd_rs2_b10: + sm4ks x10, x15, x10, 1 # perform operation + 80005e00: 74a78533 sm4ks x10,x15,x10,0x1 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zksed_sm4ks_cg_cmp_rd_rs2_b10, Zksed_sm4ks_cg_cmp_rd_rs2_b10_str) + 80005e04: 00093683 ld x13,0(x18) + 80005e08: 00a68c63 beq x13,x10,80005e20 + 80005e0c: 3f40576f jal x14,8000b200 + 80005e10: 80005e00 .word 0x80005e00 + 80005e14: 00000000 .word 0x00000000 + 80005e18: 8001c976 .word 0x8001c976 + 80005e1c: 00000000 .word 0x00000000 + 80005e20: 00890913 addi x18,x18,8 + + mv x16, x11 # switch data pointer register to avoid conflict with test + 80005e24: 00058813 addi x16,x11,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x6c2b2ee2cfa32e57 + 80005e28: 00083b83 ld x23,0(x16) + 80005e2c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x11) # load rs2: x11 = 0xea8be01f5e2458b3 + 80005e30: 00083583 ld x11,0(x16) + 80005e34: 00880813 addi x16,x16,8 + +0000000080005e38 : +Zksed_sm4ks_cg_cmp_rd_rs2_b11: + sm4ks x11, x23, x11, 0 # perform operation + 80005e38: 34bb85b3 sm4ks x11,x23,x11,0x0 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zksed_sm4ks_cg_cmp_rd_rs2_b11, Zksed_sm4ks_cg_cmp_rd_rs2_b11_str) + 80005e3c: 00093683 ld x13,0(x18) + 80005e40: 00b68c63 beq x13,x11,80005e58 + 80005e44: 3bc0576f jal x14,8000b200 + 80005e48: 80005e38 .word 0x80005e38 + 80005e4c: 00000000 .word 0x00000000 + 80005e50: 8001c9b0 .word 0x8001c9b0 + 80005e54: 00000000 .word 0x00000000 + 80005e58: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x16, x31) # load rs1: x31 = 0x801d97aa19115417 + 80005e5c: 00083f83 ld x31,0(x16) + 80005e60: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x12) # load rs2: x12 = 0x4ba41d3f933e1ba6 + 80005e64: 00083603 ld x12,0(x16) + 80005e68: 00880813 addi x16,x16,8 + +0000000080005e6c : +Zksed_sm4ks_cg_cmp_rd_rs2_b12: + sm4ks x12, x31, x12, 1 # perform operation + 80005e6c: 74cf8633 sm4ks x12,x31,x12,0x1 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zksed_sm4ks_cg_cmp_rd_rs2_b12, Zksed_sm4ks_cg_cmp_rd_rs2_b12_str) + 80005e70: 00093683 ld x13,0(x18) + 80005e74: 00c68c63 beq x13,x12,80005e8c + 80005e78: 3880576f jal x14,8000b200 + 80005e7c: 80005e6c .word 0x80005e6c + 80005e80: 00000000 .word 0x00000000 + 80005e84: 8001c9ea .word 0x8001c9ea + 80005e88: 00000000 .word 0x00000000 + 80005e8c: 00890913 addi x18,x18,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 80005e90: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80005e94: 00070413 addi x8,x14,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x16, x5) # load rs1: x5 = 0x05b0736afa9a6cb1 + 80005e98: 00083283 ld x5,0(x16) + 80005e9c: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x13) # load rs2: x13 = 0x21ff62ad78396a0b + 80005ea0: 00083683 ld x13,0(x16) + 80005ea4: 00880813 addi x16,x16,8 + +0000000080005ea8 : +Zksed_sm4ks_cg_cmp_rd_rs2_b13: + sm4ks x13, x5, x13, 2 # perform operation + 80005ea8: b4d286b3 sm4ks x13,x5,x13,0x2 + # Check if x13 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x13, Zksed_sm4ks_cg_cmp_rd_rs2_b13, Zksed_sm4ks_cg_cmp_rd_rs2_b13_str) + 80005eac: 00093383 ld x7,0(x18) + 80005eb0: 00d38c63 beq x7,x13,80005ec8 + 80005eb4: 3240546f jal x8,8000b1d8 + 80005eb8: 80005ea8 .word 0x80005ea8 + 80005ebc: 00000000 .word 0x00000000 + 80005ec0: 8001ca24 .word 0x8001ca24 + 80005ec4: 00000000 .word 0x00000000 + 80005ec8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x16, x23) # load rs1: x23 = 0x1fe8a05e5bb092cf + 80005ecc: 00083b83 ld x23,0(x16) + 80005ed0: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x14) # load rs2: x14 = 0x7a94c52a97c212be + 80005ed4: 00083703 ld x14,0(x16) + 80005ed8: 00880813 addi x16,x16,8 + +0000000080005edc : +Zksed_sm4ks_cg_cmp_rd_rs2_b14: + sm4ks x14, x23, x14, 3 # perform operation + 80005edc: f4eb8733 sm4ks x14,x23,x14,0x3 + # Check if x14 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x14, Zksed_sm4ks_cg_cmp_rd_rs2_b14, Zksed_sm4ks_cg_cmp_rd_rs2_b14_str) + 80005ee0: 00093383 ld x7,0(x18) + 80005ee4: 00e38c63 beq x7,x14,80005efc + 80005ee8: 2f00546f jal x8,8000b1d8 + 80005eec: 80005edc .word 0x80005edc + 80005ef0: 00000000 .word 0x00000000 + 80005ef4: 8001ca5e .word 0x8001ca5e + 80005ef8: 00000000 .word 0x00000000 + 80005efc: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x16, x17) # load rs1: x17 = 0x749f96b34e4246eb + 80005f00: 00083883 ld x17,0(x16) + 80005f04: 00880813 addi x16,x16,8 + RVTEST_TESTDATA_LOAD_INT(x16, x15) # load rs2: x15 = 0x597dc5c3cace2c59 + 80005f08: 00083783 ld x15,0(x16) + 80005f0c: 00880813 addi x16,x16,8 + +0000000080005f10 : +Zksed_sm4ks_cg_cmp_rd_rs2_b15: + sm4ks x15, x17, x15, 3 # perform operation + 80005f10: f4f887b3 sm4ks x15,x17,x15,0x3 + # Check if x15 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x15, Zksed_sm4ks_cg_cmp_rd_rs2_b15, Zksed_sm4ks_cg_cmp_rd_rs2_b15_str) + 80005f14: 00093383 ld x7,0(x18) + 80005f18: 00f38c63 beq x7,x15,80005f30 + 80005f1c: 2bc0546f jal x8,8000b1d8 + 80005f20: 80005f10 .word 0x80005f10 + 80005f24: 00000000 .word 0x00000000 + 80005f28: 8001ca98 .word 0x8001ca98 + 80005f2c: 00000000 .word 0x00000000 + 80005f30: 00890913 addi x18,x18,8 + + mv x10, x16 # switch data pointer register to avoid conflict with test + 80005f34: 00080513 addi x10,x16,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xcd92c7d82769ec55 + 80005f38: 00053d83 ld x27,0(x10) + 80005f3c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs2: x16 = 0x9d089d9a49629ffe + 80005f40: 00053803 ld x16,0(x10) + 80005f44: 00850513 addi x10,x10,8 + +0000000080005f48 : +Zksed_sm4ks_cg_cmp_rd_rs2_b16: + sm4ks x16, x27, x16, 0 # perform operation + 80005f48: 350d8833 sm4ks x16,x27,x16,0x0 + # Check if x16 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x16, Zksed_sm4ks_cg_cmp_rd_rs2_b16, Zksed_sm4ks_cg_cmp_rd_rs2_b16_str) + 80005f4c: 00093383 ld x7,0(x18) + 80005f50: 01038c63 beq x7,x16,80005f68 + 80005f54: 2840546f jal x8,8000b1d8 + 80005f58: 80005f48 .word 0x80005f48 + 80005f5c: 00000000 .word 0x00000000 + 80005f60: 8001cad2 .word 0x8001cad2 + 80005f64: 00000000 .word 0x00000000 + 80005f68: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x0c1d714caca52197 + 80005f6c: 00053203 ld x4,0(x10) + 80005f70: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs2: x17 = 0x2ffc49721e163810 + 80005f74: 00053883 ld x17,0(x10) + 80005f78: 00850513 addi x10,x10,8 + +0000000080005f7c : +Zksed_sm4ks_cg_cmp_rd_rs2_b17: + sm4ks x17, x4, x17, 2 # perform operation + 80005f7c: b51208b3 sm4ks x17,x4,x17,0x2 + # Check if x17 contains the expected result. x18 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x18, x8, x7, x17, Zksed_sm4ks_cg_cmp_rd_rs2_b17, Zksed_sm4ks_cg_cmp_rd_rs2_b17_str) + 80005f80: 00093383 ld x7,0(x18) + 80005f84: 01138c63 beq x7,x17,80005f9c + 80005f88: 2500546f jal x8,8000b1d8 + 80005f8c: 80005f7c .word 0x80005f7c + 80005f90: 00000000 .word 0x00000000 + 80005f94: 8001cb0c .word 0x8001cb0c + 80005f98: 00000000 .word 0x00000000 + 80005f9c: 00890913 addi x18,x18,8 + + mv x23, x18 # switch signature pointer register to avoid conflict with test + 80005fa0: 00090b93 addi x23,x18,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xf2c93afa6f429d36 + 80005fa4: 00053483 ld x9,0(x10) + 80005fa8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x18) # load rs2: x18 = 0x04e04561f9dd1070 + 80005fac: 00053903 ld x18,0(x10) + 80005fb0: 00850513 addi x10,x10,8 + +0000000080005fb4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b18: + sm4ks x18, x9, x18, 1 # perform operation + 80005fb4: 75248933 sm4ks x18,x9,x18,0x1 + # Check if x18 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x18, Zksed_sm4ks_cg_cmp_rd_rs2_b18, Zksed_sm4ks_cg_cmp_rd_rs2_b18_str) + 80005fb8: 000bb383 ld x7,0(x23) + 80005fbc: 01238c63 beq x7,x18,80005fd4 + 80005fc0: 2180546f jal x8,8000b1d8 + 80005fc4: 80005fb4 .word 0x80005fb4 + 80005fc8: 00000000 .word 0x00000000 + 80005fcc: 8001cb46 .word 0x8001cb46 + 80005fd0: 00000000 .word 0x00000000 + 80005fd4: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xe646a33108f0e277 + 80005fd8: 00053303 ld x6,0(x10) + 80005fdc: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs2: x19 = 0x80677368c2a9f3e2 + 80005fe0: 00053983 ld x19,0(x10) + 80005fe4: 00850513 addi x10,x10,8 + +0000000080005fe8 : +Zksed_sm4ks_cg_cmp_rd_rs2_b19: + sm4ks x19, x6, x19, 3 # perform operation + 80005fe8: f53309b3 sm4ks x19,x6,x19,0x3 + # Check if x19 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x19, Zksed_sm4ks_cg_cmp_rd_rs2_b19, Zksed_sm4ks_cg_cmp_rd_rs2_b19_str) + 80005fec: 000bb383 ld x7,0(x23) + 80005ff0: 01338c63 beq x7,x19,80006008 + 80005ff4: 1e40546f jal x8,8000b1d8 + 80005ff8: 80005fe8 .word 0x80005fe8 + 80005ffc: 00000000 .word 0x00000000 + 80006000: 8001cb80 .word 0x8001cb80 + 80006004: 00000000 .word 0x00000000 + 80006008: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0xfdc09aa8697fccc7 + 8000600c: 00053f03 ld x30,0(x10) + 80006010: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs2: x20 = 0x24387f77347d9828 + 80006014: 00053a03 ld x20,0(x10) + 80006018: 00850513 addi x10,x10,8 + +000000008000601c : +Zksed_sm4ks_cg_cmp_rd_rs2_b20: + sm4ks x20, x30, x20, 1 # perform operation + 8000601c: 754f0a33 sm4ks x20,x30,x20,0x1 + # Check if x20 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x20, Zksed_sm4ks_cg_cmp_rd_rs2_b20, Zksed_sm4ks_cg_cmp_rd_rs2_b20_str) + 80006020: 000bb383 ld x7,0(x23) + 80006024: 01438c63 beq x7,x20,8000603c + 80006028: 1b00546f jal x8,8000b1d8 + 8000602c: 8000601c .word 0x8000601c + 80006030: 00000000 .word 0x00000000 + 80006034: 8001cbba .word 0x8001cbba + 80006038: 00000000 .word 0x00000000 + 8000603c: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0x0f9c3f737283cb93 + 80006040: 00053683 ld x13,0(x10) + 80006044: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs2: x21 = 0x6ed1f8ebcca4bad0 + 80006048: 00053a83 ld x21,0(x10) + 8000604c: 00850513 addi x10,x10,8 + +0000000080006050 : +Zksed_sm4ks_cg_cmp_rd_rs2_b21: + sm4ks x21, x13, x21, 0 # perform operation + 80006050: 35568ab3 sm4ks x21,x13,x21,0x0 + # Check if x21 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x21, Zksed_sm4ks_cg_cmp_rd_rs2_b21, Zksed_sm4ks_cg_cmp_rd_rs2_b21_str) + 80006054: 000bb383 ld x7,0(x23) + 80006058: 01538c63 beq x7,x21,80006070 + 8000605c: 17c0546f jal x8,8000b1d8 + 80006060: 80006050 .word 0x80006050 + 80006064: 00000000 .word 0x00000000 + 80006068: 8001cbf4 .word 0x8001cbf4 + 8000606c: 00000000 .word 0x00000000 + 80006070: 008b8b93 addi x23,x23,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x4fde897fd65708d9 + 80006074: 00053d83 ld x27,0(x10) + 80006078: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs2: x22 = 0x5111fdb8cdf2ddee + 8000607c: 00053b03 ld x22,0(x10) + 80006080: 00850513 addi x10,x10,8 + +0000000080006084 : +Zksed_sm4ks_cg_cmp_rd_rs2_b22: + sm4ks x22, x27, x22, 2 # perform operation + 80006084: b56d8b33 sm4ks x22,x27,x22,0x2 + # Check if x22 contains the expected result. x23 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x23, x8, x7, x22, Zksed_sm4ks_cg_cmp_rd_rs2_b22, Zksed_sm4ks_cg_cmp_rd_rs2_b22_str) + 80006088: 000bb383 ld x7,0(x23) + 8000608c: 01638c63 beq x7,x22,800060a4 + 80006090: 1480546f jal x8,8000b1d8 + 80006094: 80006084 .word 0x80006084 + 80006098: 00000000 .word 0x00000000 + 8000609c: 8001cc2e .word 0x8001cc2e + 800060a0: 00000000 .word 0x00000000 + 800060a4: 008b8b93 addi x23,x23,8 + + mv x3, x23 # switch signature pointer register to avoid conflict with test + 800060a8: 000b8193 addi x3,x23,0 +# Testcase cmp_rd_rs2 (Test rd = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x41751be8c53b7b2d + 800060ac: 00053283 ld x5,0(x10) + 800060b0: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs2: x23 = 0x264815fbf385c8e8 + 800060b4: 00053b83 ld x23,0(x10) + 800060b8: 00850513 addi x10,x10,8 + +00000000800060bc : +Zksed_sm4ks_cg_cmp_rd_rs2_b23: + sm4ks x23, x5, x23, 1 # perform operation + 800060bc: 75728bb3 sm4ks x23,x5,x23,0x1 + # Check if x23 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x23, Zksed_sm4ks_cg_cmp_rd_rs2_b23, Zksed_sm4ks_cg_cmp_rd_rs2_b23_str) + 800060c0: 0001b383 ld x7,0(x3) + 800060c4: 01738c63 beq x7,x23,800060dc + 800060c8: 1100546f jal x8,8000b1d8 + 800060cc: 800060bc .word 0x800060bc + 800060d0: 00000000 .word 0x00000000 + 800060d4: 8001cc68 .word 0x8001cc68 + 800060d8: 00000000 .word 0x00000000 + 800060dc: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x3b72a40cbdadd50b + 800060e0: 00053b03 ld x22,0(x10) + 800060e4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs2: x24 = 0xebcb9d766eed8313 + 800060e8: 00053c03 ld x24,0(x10) + 800060ec: 00850513 addi x10,x10,8 + +00000000800060f0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b24: + sm4ks x24, x22, x24, 1 # perform operation + 800060f0: 758b0c33 sm4ks x24,x22,x24,0x1 + # Check if x24 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x24, Zksed_sm4ks_cg_cmp_rd_rs2_b24, Zksed_sm4ks_cg_cmp_rd_rs2_b24_str) + 800060f4: 0001b383 ld x7,0(x3) + 800060f8: 01838c63 beq x7,x24,80006110 + 800060fc: 0dc0546f jal x8,8000b1d8 + 80006100: 800060f0 .word 0x800060f0 + 80006104: 00000000 .word 0x00000000 + 80006108: 8001cca2 .word 0x8001cca2 + 8000610c: 00000000 .word 0x00000000 + 80006110: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x9ee1465e51eb4461 + 80006114: 00053283 ld x5,0(x10) + 80006118: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs2: x25 = 0x59c24eec603ecdc5 + 8000611c: 00053c83 ld x25,0(x10) + 80006120: 00850513 addi x10,x10,8 + +0000000080006124 : +Zksed_sm4ks_cg_cmp_rd_rs2_b25: + sm4ks x25, x5, x25, 3 # perform operation + 80006124: f5928cb3 sm4ks x25,x5,x25,0x3 + # Check if x25 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x25, Zksed_sm4ks_cg_cmp_rd_rs2_b25, Zksed_sm4ks_cg_cmp_rd_rs2_b25_str) + 80006128: 0001b383 ld x7,0(x3) + 8000612c: 01938c63 beq x7,x25,80006144 + 80006130: 0a80546f jal x8,8000b1d8 + 80006134: 80006124 .word 0x80006124 + 80006138: 00000000 .word 0x00000000 + 8000613c: 8001ccdc .word 0x8001ccdc + 80006140: 00000000 .word 0x00000000 + 80006144: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x564c141a9a6f7951 + 80006148: 00053b83 ld x23,0(x10) + 8000614c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs2: x26 = 0x1f1c98e7c2c92504 + 80006150: 00053d03 ld x26,0(x10) + 80006154: 00850513 addi x10,x10,8 + +0000000080006158 : +Zksed_sm4ks_cg_cmp_rd_rs2_b26: + sm4ks x26, x23, x26, 2 # perform operation + 80006158: b5ab8d33 sm4ks x26,x23,x26,0x2 + # Check if x26 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x26, Zksed_sm4ks_cg_cmp_rd_rs2_b26, Zksed_sm4ks_cg_cmp_rd_rs2_b26_str) + 8000615c: 0001b383 ld x7,0(x3) + 80006160: 01a38c63 beq x7,x26,80006178 + 80006164: 0740546f jal x8,8000b1d8 + 80006168: 80006158 .word 0x80006158 + 8000616c: 00000000 .word 0x00000000 + 80006170: 8001cd16 .word 0x8001cd16 + 80006174: 00000000 .word 0x00000000 + 80006178: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0aa6520558cc03d0 + 8000617c: 00053c83 ld x25,0(x10) + 80006180: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs2: x27 = 0x5587abd81dc976ed + 80006184: 00053d83 ld x27,0(x10) + 80006188: 00850513 addi x10,x10,8 + +000000008000618c : +Zksed_sm4ks_cg_cmp_rd_rs2_b27: + sm4ks x27, x25, x27, 0 # perform operation + 8000618c: 35bc8db3 sm4ks x27,x25,x27,0x0 + # Check if x27 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x27, Zksed_sm4ks_cg_cmp_rd_rs2_b27, Zksed_sm4ks_cg_cmp_rd_rs2_b27_str) + 80006190: 0001b383 ld x7,0(x3) + 80006194: 01b38c63 beq x7,x27,800061ac + 80006198: 0400546f jal x8,8000b1d8 + 8000619c: 8000618c .word 0x8000618c + 800061a0: 00000000 .word 0x00000000 + 800061a4: 8001cd50 .word 0x8001cd50 + 800061a8: 00000000 .word 0x00000000 + 800061ac: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x29dab349f05d8fc9 + 800061b0: 00053003 ld x0,0(x10) + 800061b4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs2: x28 = 0xf6f708016d17dc2f + 800061b8: 00053e03 ld x28,0(x10) + 800061bc: 00850513 addi x10,x10,8 + +00000000800061c0 : +Zksed_sm4ks_cg_cmp_rd_rs2_b28: + sm4ks x28, x0, x28, 0 # perform operation + 800061c0: 35c00e33 sm4ks x28,x0,x28,0x0 + # Check if x28 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x28, Zksed_sm4ks_cg_cmp_rd_rs2_b28, Zksed_sm4ks_cg_cmp_rd_rs2_b28_str) + 800061c4: 0001b383 ld x7,0(x3) + 800061c8: 01c38c63 beq x7,x28,800061e0 + 800061cc: 00c0546f jal x8,8000b1d8 + 800061d0: 800061c0 .word 0x800061c0 + 800061d4: 00000000 .word 0x00000000 + 800061d8: 8001cd8a .word 0x8001cd8a + 800061dc: 00000000 .word 0x00000000 + 800061e0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x5fb9635b6846c253 + 800061e4: 00053103 ld x2,0(x10) + 800061e8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs2: x29 = 0x839d3637668bde54 + 800061ec: 00053e83 ld x29,0(x10) + 800061f0: 00850513 addi x10,x10,8 + +00000000800061f4 : +Zksed_sm4ks_cg_cmp_rd_rs2_b29: + sm4ks x29, x2, x29, 3 # perform operation + 800061f4: f5d10eb3 sm4ks x29,x2,x29,0x3 + # Check if x29 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x29, Zksed_sm4ks_cg_cmp_rd_rs2_b29, Zksed_sm4ks_cg_cmp_rd_rs2_b29_str) + 800061f8: 0001b383 ld x7,0(x3) + 800061fc: 01d38c63 beq x7,x29,80006214 + 80006200: 7d90446f jal x8,8000b1d8 + 80006204: 800061f4 .word 0x800061f4 + 80006208: 00000000 .word 0x00000000 + 8000620c: 8001cdc4 .word 0x8001cdc4 + 80006210: 00000000 .word 0x00000000 + 80006214: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0xfc5ead0ce347888a + 80006218: 00053783 ld x15,0(x10) + 8000621c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs2: x30 = 0xff43d808da61b5f1 + 80006220: 00053f03 ld x30,0(x10) + 80006224: 00850513 addi x10,x10,8 + +0000000080006228 : +Zksed_sm4ks_cg_cmp_rd_rs2_b30: + sm4ks x30, x15, x30, 2 # perform operation + 80006228: b5e78f33 sm4ks x30,x15,x30,0x2 + # Check if x30 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x30, Zksed_sm4ks_cg_cmp_rd_rs2_b30, Zksed_sm4ks_cg_cmp_rd_rs2_b30_str) + 8000622c: 0001b383 ld x7,0(x3) + 80006230: 01e38c63 beq x7,x30,80006248 + 80006234: 7a50446f jal x8,8000b1d8 + 80006238: 80006228 .word 0x80006228 + 8000623c: 00000000 .word 0x00000000 + 80006240: 8001cdfe .word 0x8001cdfe + 80006244: 00000000 .word 0x00000000 + 80006248: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs2 (Test rd = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x14) # load rs1: x14 = 0x2d0e35e95f5f2f1a + 8000624c: 00053703 ld x14,0(x10) + 80006250: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs2: x31 = 0x83de0062302fee56 + 80006254: 00053f83 ld x31,0(x10) + 80006258: 00850513 addi x10,x10,8 + +000000008000625c : +Zksed_sm4ks_cg_cmp_rd_rs2_b31: + sm4ks x31, x14, x31, 3 # perform operation + 8000625c: f5f70fb3 sm4ks x31,x14,x31,0x3 + # Check if x31 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x31, Zksed_sm4ks_cg_cmp_rd_rs2_b31, Zksed_sm4ks_cg_cmp_rd_rs2_b31_str) + 80006260: 0001b383 ld x7,0(x3) + 80006264: 01f38c63 beq x7,x31,8000627c + 80006268: 7710446f jal x8,8000b1d8 + 8000626c: 8000625c .word 0x8000625c + 80006270: 00000000 .word 0x00000000 + 80006274: 8001ce38 .word 0x8001ce38 + 80006278: 00000000 .word 0x00000000 + 8000627c: 00818193 addi x3,x3,8 +///////////////////////////////// +// cmp_rd_rs1_rs2 +///////////////////////////////// + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0xe2f54641b2382f61 + 80006280: 00053003 ld x0,0(x10) + 80006284: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs2: x0 = 0xdadd1d26bbb0fa8c + 80006288: 00053003 ld x0,0(x10) + 8000628c: 00850513 addi x10,x10,8 + +0000000080006290 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0: + sm4ks x0, x0, x0, 1 # perform operation + 80006290: 74000033 sm4ks x0,x0,x0,0x1 + # Check if x0 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x0, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b0_str) + 80006294: 0001b383 ld x7,0(x3) + 80006298: 00038c63 beq x7,x0,800062b0 + 8000629c: 73d0446f jal x8,8000b1d8 + 800062a0: 80006290 .word 0x80006290 + 800062a4: 00000000 .word 0x00000000 + 800062a8: 8001ce72 .word 0x8001ce72 + 800062ac: 00000000 .word 0x00000000 + 800062b0: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xfe42f7b974c26128 + 800062b4: 00053083 ld x1,0(x10) + 800062b8: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs2: x1 = 0x0cd2322a7b2c4480 + 800062bc: 00053083 ld x1,0(x10) + 800062c0: 00850513 addi x10,x10,8 + +00000000800062c4 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1: + sm4ks x1, x1, x1, 0 # perform operation + 800062c4: 341080b3 sm4ks x1,x1,x1,0x0 + # Check if x1 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x1, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b1_str) + 800062c8: 0001b383 ld x7,0(x3) + 800062cc: 00138c63 beq x7,x1,800062e4 + 800062d0: 7090446f jal x8,8000b1d8 + 800062d4: 800062c4 .word 0x800062c4 + 800062d8: 00000000 .word 0x00000000 + 800062dc: 8001ceaf .word 0x8001ceaf + 800062e0: 00000000 .word 0x00000000 + 800062e4: 00818193 addi x3,x3,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xfb29098ea23b32cd + 800062e8: 00053103 ld x2,0(x10) + 800062ec: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs2: x2 = 0x959d52d4debe0b33 + 800062f0: 00053103 ld x2,0(x10) + 800062f4: 00850513 addi x10,x10,8 + +00000000800062f8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2: + sm4ks x2, x2, x2, 0 # perform operation + 800062f8: 34210133 sm4ks x2,x2,x2,0x0 + # Check if x2 contains the expected result. x3 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x3, x8, x7, x2, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b2_str) + 800062fc: 0001b383 ld x7,0(x3) + 80006300: 00238c63 beq x7,x2,80006318 + 80006304: 6d50446f jal x8,8000b1d8 + 80006308: 800062f8 .word 0x800062f8 + 8000630c: 00000000 .word 0x00000000 + 80006310: 8001ceec .word 0x8001ceec + 80006314: 00000000 .word 0x00000000 + 80006318: 00818193 addi x3,x3,8 + + mv x6, x3 # switch signature pointer register to avoid conflict with test + 8000631c: 00018313 addi x6,x3,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0xdc8f259706b45d9e + 80006320: 00053183 ld x3,0(x10) + 80006324: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs2: x3 = 0x70f7f4324c60886c + 80006328: 00053183 ld x3,0(x10) + 8000632c: 00850513 addi x10,x10,8 + +0000000080006330 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3: + sm4ks x3, x3, x3, 0 # perform operation + 80006330: 343181b3 sm4ks x3,x3,x3,0x0 + # Check if x3 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x3, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b3_str) + 80006334: 00033383 ld x7,0(x6) + 80006338: 00338c63 beq x7,x3,80006350 + 8000633c: 69d0446f jal x8,8000b1d8 + 80006340: 80006330 .word 0x80006330 + 80006344: 00000000 .word 0x00000000 + 80006348: 8001cf29 .word 0x8001cf29 + 8000634c: 00000000 .word 0x00000000 + 80006350: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x62067c53c37b9e6b + 80006354: 00053203 ld x4,0(x10) + 80006358: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs2: x4 = 0xf9ff35fadd6d595e + 8000635c: 00053203 ld x4,0(x10) + 80006360: 00850513 addi x10,x10,8 + +0000000080006364 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4: + sm4ks x4, x4, x4, 2 # perform operation + 80006364: b4420233 sm4ks x4,x4,x4,0x2 + # Check if x4 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x4, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b4_str) + 80006368: 00033383 ld x7,0(x6) + 8000636c: 00438c63 beq x7,x4,80006384 + 80006370: 6690446f jal x8,8000b1d8 + 80006374: 80006364 .word 0x80006364 + 80006378: 00000000 .word 0x00000000 + 8000637c: 8001cf66 .word 0x8001cf66 + 80006380: 00000000 .word 0x00000000 + 80006384: 00830313 addi x6,x6,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x9ad8d987cc529738 + 80006388: 00053283 ld x5,0(x10) + 8000638c: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs2: x5 = 0x5a435865f1d4be8f + 80006390: 00053283 ld x5,0(x10) + 80006394: 00850513 addi x10,x10,8 + +0000000080006398 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5: + sm4ks x5, x5, x5, 0 # perform operation + 80006398: 345282b3 sm4ks x5,x5,x5,0x0 + # Check if x5 contains the expected result. x6 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x6, x8, x7, x5, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b5_str) + 8000639c: 00033383 ld x7,0(x6) + 800063a0: 00538c63 beq x7,x5,800063b8 + 800063a4: 6350446f jal x8,8000b1d8 + 800063a8: 80006398 .word 0x80006398 + 800063ac: 00000000 .word 0x00000000 + 800063b0: 8001cfa3 .word 0x8001cfa3 + 800063b4: 00000000 .word 0x00000000 + 800063b8: 00830313 addi x6,x6,8 + + mv x19, x6 # switch signature pointer register to avoid conflict with test + 800063bc: 00030993 addi x19,x6,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xdc74561a454ccfc0 + 800063c0: 00053303 ld x6,0(x10) + 800063c4: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs2: x6 = 0x275561470092040c + 800063c8: 00053303 ld x6,0(x10) + 800063cc: 00850513 addi x10,x10,8 + +00000000800063d0 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6: + sm4ks x6, x6, x6, 1 # perform operation + 800063d0: 74630333 sm4ks x6,x6,x6,0x1 + # Check if x6 contains the expected result. x19 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x19, x8, x7, x6, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b6_str) + 800063d4: 0009b383 ld x7,0(x19) + 800063d8: 00638c63 beq x7,x6,800063f0 + 800063dc: 5fd0446f jal x8,8000b1d8 + 800063e0: 800063d0 .word 0x800063d0 + 800063e4: 00000000 .word 0x00000000 + 800063e8: 8001cfe0 .word 0x8001cfe0 + 800063ec: 00000000 .word 0x00000000 + 800063f0: 00898993 addi x19,x19,8 + + mv x13, x7 # switch temp register to avoid conflict with test + 800063f4: 00038693 addi x13,x7,0 + mv x14, x8 # switch link pointer register to avoid conflict with test + 800063f8: 00040713 addi x14,x8,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x067188be3dfe1a99 + 800063fc: 00053383 ld x7,0(x10) + 80006400: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs2: x7 = 0x7f353a8f4f2c0375 + 80006404: 00053383 ld x7,0(x10) + 80006408: 00850513 addi x10,x10,8 + +000000008000640c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7: + sm4ks x7, x7, x7, 1 # perform operation + 8000640c: 747383b3 sm4ks x7,x7,x7,0x1 + # Check if x7 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x7, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b7_str) + 80006410: 0009b683 ld x13,0(x19) + 80006414: 00768c63 beq x13,x7,8000642c + 80006418: 5e90476f jal x14,8000b200 + 8000641c: 8000640c .word 0x8000640c + 80006420: 00000000 .word 0x00000000 + 80006424: 8001d01d .word 0x8001d01d + 80006428: 00000000 .word 0x00000000 + 8000642c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0xc1f8638c6344be1a + 80006430: 00053403 ld x8,0(x10) + 80006434: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs2: x8 = 0x15c1502f21bf1f1c + 80006438: 00053403 ld x8,0(x10) + 8000643c: 00850513 addi x10,x10,8 + +0000000080006440 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8: + sm4ks x8, x8, x8, 1 # perform operation + 80006440: 74840433 sm4ks x8,x8,x8,0x1 + # Check if x8 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x8, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b8_str) + 80006444: 0009b683 ld x13,0(x19) + 80006448: 00868c63 beq x13,x8,80006460 + 8000644c: 5b50476f jal x14,8000b200 + 80006450: 80006440 .word 0x80006440 + 80006454: 00000000 .word 0x00000000 + 80006458: 8001d05a .word 0x8001d05a + 8000645c: 00000000 .word 0x00000000 + 80006460: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x899b3de601f3eb8f + 80006464: 00053483 ld x9,0(x10) + 80006468: 00850513 addi x10,x10,8 + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs2: x9 = 0x96eb870ce64af868 + 8000646c: 00053483 ld x9,0(x10) + 80006470: 00850513 addi x10,x10,8 + +0000000080006474 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9: + sm4ks x9, x9, x9, 1 # perform operation + 80006474: 749484b3 sm4ks x9,x9,x9,0x1 + # Check if x9 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x9, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b9_str) + 80006478: 0009b683 ld x13,0(x19) + 8000647c: 00968c63 beq x13,x9,80006494 + 80006480: 5810476f jal x14,8000b200 + 80006484: 80006474 .word 0x80006474 + 80006488: 00000000 .word 0x00000000 + 8000648c: 8001d097 .word 0x8001d097 + 80006490: 00000000 .word 0x00000000 + 80006494: 00898993 addi x19,x19,8 + + mv x6, x10 # switch data pointer register to avoid conflict with test + 80006498: 00050313 addi x6,x10,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x10) + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xb95152c092a2344a + 8000649c: 00033503 ld x10,0(x6) + 800064a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xb39c0feaa516df99 + 800064a4: 00033503 ld x10,0(x6) + 800064a8: 00830313 addi x6,x6,8 + +00000000800064ac : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10: + sm4ks x10, x10, x10, 1 # perform operation + 800064ac: 74a50533 sm4ks x10,x10,x10,0x1 + # Check if x10 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x10, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b10_str) + 800064b0: 0009b683 ld x13,0(x19) + 800064b4: 00a68c63 beq x13,x10,800064cc + 800064b8: 5490476f jal x14,8000b200 + 800064bc: 800064ac .word 0x800064ac + 800064c0: 00000000 .word 0x00000000 + 800064c4: 8001d0d4 .word 0x8001d0d4 + 800064c8: 00000000 .word 0x00000000 + 800064cc: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x11) + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x1aaf03cd62212c3d + 800064d0: 00033583 ld x11,0(x6) + 800064d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xfb2af21647d1ee7c + 800064d8: 00033583 ld x11,0(x6) + 800064dc: 00830313 addi x6,x6,8 + +00000000800064e0 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11: + sm4ks x11, x11, x11, 2 # perform operation + 800064e0: b4b585b3 sm4ks x11,x11,x11,0x2 + # Check if x11 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x11, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b11_str) + 800064e4: 0009b683 ld x13,0(x19) + 800064e8: 00b68c63 beq x13,x11,80006500 + 800064ec: 5150476f jal x14,8000b200 + 800064f0: 800064e0 .word 0x800064e0 + 800064f4: 00000000 .word 0x00000000 + 800064f8: 8001d112 .word 0x8001d112 + 800064fc: 00000000 .word 0x00000000 + 80006500: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x12) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8bd0103903671a93 + 80006504: 00033603 ld x12,0(x6) + 80006508: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x57bf45a8980bf636 + 8000650c: 00033603 ld x12,0(x6) + 80006510: 00830313 addi x6,x6,8 + +0000000080006514 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12: + sm4ks x12, x12, x12, 3 # perform operation + 80006514: f4c60633 sm4ks x12,x12,x12,0x3 + # Check if x12 contains the expected result. x19 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x19, x14, x13, x12, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b12_str) + 80006518: 0009b683 ld x13,0(x19) + 8000651c: 00c68c63 beq x13,x12,80006534 + 80006520: 4e10476f jal x14,8000b200 + 80006524: 80006514 .word 0x80006514 + 80006528: 00000000 .word 0x00000000 + 8000652c: 8001d150 .word 0x8001d150 + 80006530: 00000000 .word 0x00000000 + 80006534: 00898993 addi x19,x19,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80006538: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 8000653c: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x13) + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x085c5e7a22cc56f4 + 80006540: 00033683 ld x13,0(x6) + 80006544: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xf9feef65097b2394 + 80006548: 00033683 ld x13,0(x6) + 8000654c: 00830313 addi x6,x6,8 + +0000000080006550 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13: + sm4ks x13, x13, x13, 3 # perform operation + 80006550: f4d686b3 sm4ks x13,x13,x13,0x3 + # Check if x13 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x13, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b13_str) + 80006554: 0009b203 ld x4,0(x19) + 80006558: 00d20c63 beq x4,x13,80006570 + 8000655c: 465042ef jal x5,8000b1c0 + 80006560: 80006550 .word 0x80006550 + 80006564: 00000000 .word 0x00000000 + 80006568: 8001d18e .word 0x8001d18e + 8000656c: 00000000 .word 0x00000000 + 80006570: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x14) + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x211d6aa1374c428a + 80006574: 00033703 ld x14,0(x6) + 80006578: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x13c06258c3afdd50 + 8000657c: 00033703 ld x14,0(x6) + 80006580: 00830313 addi x6,x6,8 + +0000000080006584 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14: + sm4ks x14, x14, x14, 1 # perform operation + 80006584: 74e70733 sm4ks x14,x14,x14,0x1 + # Check if x14 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x14, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b14_str) + 80006588: 0009b203 ld x4,0(x19) + 8000658c: 00e20c63 beq x4,x14,800065a4 + 80006590: 431042ef jal x5,8000b1c0 + 80006594: 80006584 .word 0x80006584 + 80006598: 00000000 .word 0x00000000 + 8000659c: 8001d1cc .word 0x8001d1cc + 800065a0: 00000000 .word 0x00000000 + 800065a4: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x15) + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xf787e6a3784e6876 + 800065a8: 00033783 ld x15,0(x6) + 800065ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x52c7332d0b54e319 + 800065b0: 00033783 ld x15,0(x6) + 800065b4: 00830313 addi x6,x6,8 + +00000000800065b8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15: + sm4ks x15, x15, x15, 2 # perform operation + 800065b8: b4f787b3 sm4ks x15,x15,x15,0x2 + # Check if x15 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x15, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b15_str) + 800065bc: 0009b203 ld x4,0(x19) + 800065c0: 00f20c63 beq x4,x15,800065d8 + 800065c4: 3fd042ef jal x5,8000b1c0 + 800065c8: 800065b8 .word 0x800065b8 + 800065cc: 00000000 .word 0x00000000 + 800065d0: 8001d20a .word 0x8001d20a + 800065d4: 00000000 .word 0x00000000 + 800065d8: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x16) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x4ea28f66fa2b0869 + 800065dc: 00033803 ld x16,0(x6) + 800065e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x07c17da68accb22e + 800065e4: 00033803 ld x16,0(x6) + 800065e8: 00830313 addi x6,x6,8 + +00000000800065ec : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16: + sm4ks x16, x16, x16, 0 # perform operation + 800065ec: 35080833 sm4ks x16,x16,x16,0x0 + # Check if x16 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x16, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b16_str) + 800065f0: 0009b203 ld x4,0(x19) + 800065f4: 01020c63 beq x4,x16,8000660c + 800065f8: 3c9042ef jal x5,8000b1c0 + 800065fc: 800065ec .word 0x800065ec + 80006600: 00000000 .word 0x00000000 + 80006604: 8001d248 .word 0x8001d248 + 80006608: 00000000 .word 0x00000000 + 8000660c: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x17) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xa208ac0e0af2dd44 + 80006610: 00033883 ld x17,0(x6) + 80006614: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xf70726a6a62ddd06 + 80006618: 00033883 ld x17,0(x6) + 8000661c: 00830313 addi x6,x6,8 + +0000000080006620 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17: + sm4ks x17, x17, x17, 3 # perform operation + 80006620: f51888b3 sm4ks x17,x17,x17,0x3 + # Check if x17 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x17, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b17_str) + 80006624: 0009b203 ld x4,0(x19) + 80006628: 01120c63 beq x4,x17,80006640 + 8000662c: 395042ef jal x5,8000b1c0 + 80006630: 80006620 .word 0x80006620 + 80006634: 00000000 .word 0x00000000 + 80006638: 8001d286 .word 0x8001d286 + 8000663c: 00000000 .word 0x00000000 + 80006640: 00898993 addi x19,x19,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x18) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x175f7f6a184e6c9a + 80006644: 00033903 ld x18,0(x6) + 80006648: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x0662aaebbfc1cb97 + 8000664c: 00033903 ld x18,0(x6) + 80006650: 00830313 addi x6,x6,8 + +0000000080006654 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18: + sm4ks x18, x18, x18, 0 # perform operation + 80006654: 35290933 sm4ks x18,x18,x18,0x0 + # Check if x18 contains the expected result. x19 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x19, x5, x4, x18, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b18_str) + 80006658: 0009b203 ld x4,0(x19) + 8000665c: 01220c63 beq x4,x18,80006674 + 80006660: 361042ef jal x5,8000b1c0 + 80006664: 80006654 .word 0x80006654 + 80006668: 00000000 .word 0x00000000 + 8000666c: 8001d2c4 .word 0x8001d2c4 + 80006670: 00000000 .word 0x00000000 + 80006674: 00898993 addi x19,x19,8 + + mv x20, x19 # switch signature pointer register to avoid conflict with test + 80006678: 00098a13 addi x20,x19,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x19) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x6ae255e3a1e998fd + 8000667c: 00033983 ld x19,0(x6) + 80006680: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x4cc59ca6d01a2ae3 + 80006684: 00033983 ld x19,0(x6) + 80006688: 00830313 addi x6,x6,8 + +000000008000668c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19: + sm4ks x19, x19, x19, 1 # perform operation + 8000668c: 753989b3 sm4ks x19,x19,x19,0x1 + # Check if x19 contains the expected result. x20 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x20, x5, x4, x19, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b19_str) + 80006690: 000a3203 ld x4,0(x20) + 80006694: 01320c63 beq x4,x19,800066ac + 80006698: 329042ef jal x5,8000b1c0 + 8000669c: 8000668c .word 0x8000668c + 800066a0: 00000000 .word 0x00000000 + 800066a4: 8001d302 .word 0x8001d302 + 800066a8: 00000000 .word 0x00000000 + 800066ac: 008a0a13 addi x20,x20,8 + + mv x2, x20 # switch signature pointer register to avoid conflict with test + 800066b0: 000a0113 addi x2,x20,0 +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x20) + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x60f3ddb6e44c424a + 800066b4: 00033a03 ld x20,0(x6) + 800066b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x98884fe879fca75e + 800066bc: 00033a03 ld x20,0(x6) + 800066c0: 00830313 addi x6,x6,8 + +00000000800066c4 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20: + sm4ks x20, x20, x20, 0 # perform operation + 800066c4: 354a0a33 sm4ks x20,x20,x20,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b20_str) + 800066c8: 00013203 ld x4,0(x2) + 800066cc: 01420c63 beq x4,x20,800066e4 + 800066d0: 2f1042ef jal x5,8000b1c0 + 800066d4: 800066c4 .word 0x800066c4 + 800066d8: 00000000 .word 0x00000000 + 800066dc: 8001d340 .word 0x8001d340 + 800066e0: 00000000 .word 0x00000000 + 800066e4: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x21) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xfd37fe0d2f78193f + 800066e8: 00033a83 ld x21,0(x6) + 800066ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x4f9b18194d1f8566 + 800066f0: 00033a83 ld x21,0(x6) + 800066f4: 00830313 addi x6,x6,8 + +00000000800066f8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21: + sm4ks x21, x21, x21, 2 # perform operation + 800066f8: b55a8ab3 sm4ks x21,x21,x21,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b21_str) + 800066fc: 00013203 ld x4,0(x2) + 80006700: 01520c63 beq x4,x21,80006718 + 80006704: 2bd042ef jal x5,8000b1c0 + 80006708: 800066f8 .word 0x800066f8 + 8000670c: 00000000 .word 0x00000000 + 80006710: 8001d37e .word 0x8001d37e + 80006714: 00000000 .word 0x00000000 + 80006718: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x22) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xfb8717273a2f6f4f + 8000671c: 00033b03 ld x22,0(x6) + 80006720: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xd51203eb46343219 + 80006724: 00033b03 ld x22,0(x6) + 80006728: 00830313 addi x6,x6,8 + +000000008000672c : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22: + sm4ks x22, x22, x22, 3 # perform operation + 8000672c: f56b0b33 sm4ks x22,x22,x22,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b22_str) + 80006730: 00013203 ld x4,0(x2) + 80006734: 01620c63 beq x4,x22,8000674c + 80006738: 289042ef jal x5,8000b1c0 + 8000673c: 8000672c .word 0x8000672c + 80006740: 00000000 .word 0x00000000 + 80006744: 8001d3bc .word 0x8001d3bc + 80006748: 00000000 .word 0x00000000 + 8000674c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x23) + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x78886db046dd1718 + 80006750: 00033b83 ld x23,0(x6) + 80006754: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x1f5aa67de40b0491 + 80006758: 00033b83 ld x23,0(x6) + 8000675c: 00830313 addi x6,x6,8 + +0000000080006760 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23: + sm4ks x23, x23, x23, 1 # perform operation + 80006760: 757b8bb3 sm4ks x23,x23,x23,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b23_str) + 80006764: 00013203 ld x4,0(x2) + 80006768: 01720c63 beq x4,x23,80006780 + 8000676c: 255042ef jal x5,8000b1c0 + 80006770: 80006760 .word 0x80006760 + 80006774: 00000000 .word 0x00000000 + 80006778: 8001d3fa .word 0x8001d3fa + 8000677c: 00000000 .word 0x00000000 + 80006780: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x24) + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x1b21acd739e673d7 + 80006784: 00033c03 ld x24,0(x6) + 80006788: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x6b8a2c51842fd75b + 8000678c: 00033c03 ld x24,0(x6) + 80006790: 00830313 addi x6,x6,8 + +0000000080006794 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24: + sm4ks x24, x24, x24, 3 # perform operation + 80006794: f58c0c33 sm4ks x24,x24,x24,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b24_str) + 80006798: 00013203 ld x4,0(x2) + 8000679c: 01820c63 beq x4,x24,800067b4 + 800067a0: 221042ef jal x5,8000b1c0 + 800067a4: 80006794 .word 0x80006794 + 800067a8: 00000000 .word 0x00000000 + 800067ac: 8001d438 .word 0x8001d438 + 800067b0: 00000000 .word 0x00000000 + 800067b4: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x25) + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x30076e9bb8e25d1c + 800067b8: 00033c83 ld x25,0(x6) + 800067bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xb65be9d94ac02743 + 800067c0: 00033c83 ld x25,0(x6) + 800067c4: 00830313 addi x6,x6,8 + +00000000800067c8 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25: + sm4ks x25, x25, x25, 1 # perform operation + 800067c8: 759c8cb3 sm4ks x25,x25,x25,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b25_str) + 800067cc: 00013203 ld x4,0(x2) + 800067d0: 01920c63 beq x4,x25,800067e8 + 800067d4: 1ed042ef jal x5,8000b1c0 + 800067d8: 800067c8 .word 0x800067c8 + 800067dc: 00000000 .word 0x00000000 + 800067e0: 8001d476 .word 0x8001d476 + 800067e4: 00000000 .word 0x00000000 + 800067e8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x26) + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x827b7e373511b112 + 800067ec: 00033d03 ld x26,0(x6) + 800067f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x52ff5c660ba304dd + 800067f4: 00033d03 ld x26,0(x6) + 800067f8: 00830313 addi x6,x6,8 + +00000000800067fc : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26: + sm4ks x26, x26, x26, 3 # perform operation + 800067fc: f5ad0d33 sm4ks x26,x26,x26,0x3 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b26_str) + 80006800: 00013203 ld x4,0(x2) + 80006804: 01a20c63 beq x4,x26,8000681c + 80006808: 1b9042ef jal x5,8000b1c0 + 8000680c: 800067fc .word 0x800067fc + 80006810: 00000000 .word 0x00000000 + 80006814: 8001d4b4 .word 0x8001d4b4 + 80006818: 00000000 .word 0x00000000 + 8000681c: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x27) + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8339027a967f9e5a + 80006820: 00033d83 ld x27,0(x6) + 80006824: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x16574c51d9656ba1 + 80006828: 00033d83 ld x27,0(x6) + 8000682c: 00830313 addi x6,x6,8 + +0000000080006830 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27: + sm4ks x27, x27, x27, 1 # perform operation + 80006830: 75bd8db3 sm4ks x27,x27,x27,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b27_str) + 80006834: 00013203 ld x4,0(x2) + 80006838: 01b20c63 beq x4,x27,80006850 + 8000683c: 185042ef jal x5,8000b1c0 + 80006840: 80006830 .word 0x80006830 + 80006844: 00000000 .word 0x00000000 + 80006848: 8001d4f2 .word 0x8001d4f2 + 8000684c: 00000000 .word 0x00000000 + 80006850: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x28) + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x8dd3e1c269fe7f35 + 80006854: 00033e03 ld x28,0(x6) + 80006858: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xe4cea143f0050824 + 8000685c: 00033e03 ld x28,0(x6) + 80006860: 00830313 addi x6,x6,8 + +0000000080006864 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28: + sm4ks x28, x28, x28, 2 # perform operation + 80006864: b5ce0e33 sm4ks x28,x28,x28,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b28_str) + 80006868: 00013203 ld x4,0(x2) + 8000686c: 01c20c63 beq x4,x28,80006884 + 80006870: 151042ef jal x5,8000b1c0 + 80006874: 80006864 .word 0x80006864 + 80006878: 00000000 .word 0x00000000 + 8000687c: 8001d530 .word 0x8001d530 + 80006880: 00000000 .word 0x00000000 + 80006884: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x29) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x4309c7bd93e42573 + 80006888: 00033e83 ld x29,0(x6) + 8000688c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xc0d3f730ae60fc64 + 80006890: 00033e83 ld x29,0(x6) + 80006894: 00830313 addi x6,x6,8 + +0000000080006898 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29: + sm4ks x29, x29, x29, 0 # perform operation + 80006898: 35de8eb3 sm4ks x29,x29,x29,0x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b29_str) + 8000689c: 00013203 ld x4,0(x2) + 800068a0: 01d20c63 beq x4,x29,800068b8 + 800068a4: 11d042ef jal x5,8000b1c0 + 800068a8: 80006898 .word 0x80006898 + 800068ac: 00000000 .word 0x00000000 + 800068b0: 8001d56e .word 0x8001d56e + 800068b4: 00000000 .word 0x00000000 + 800068b8: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x08b7e91c4aaff0c8 + 800068bc: 00033f03 ld x30,0(x6) + 800068c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x3e82142b7a13c568 + 800068c4: 00033f03 ld x30,0(x6) + 800068c8: 00830313 addi x6,x6,8 + +00000000800068cc : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30: + sm4ks x30, x30, x30, 0 # perform operation + 800068cc: 35ef0f33 sm4ks x30,x30,x30,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b30_str) + 800068d0: 00013203 ld x4,0(x2) + 800068d4: 01e20c63 beq x4,x30,800068ec + 800068d8: 0e9042ef jal x5,8000b1c0 + 800068dc: 800068cc .word 0x800068cc + 800068e0: 00000000 .word 0x00000000 + 800068e4: 8001d5ac .word 0x8001d5ac + 800068e8: 00000000 .word 0x00000000 + 800068ec: 00810113 addi x2,x2,8 + +# Testcase cmp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xa900c1ba4af1dc1a + 800068f0: 00033f83 ld x31,0(x6) + 800068f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xe3635dee7538ef7d + 800068f8: 00033f83 ld x31,0(x6) + 800068fc: 00830313 addi x6,x6,8 + +0000000080006900 : +Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31: + sm4ks x31, x31, x31, 1 # perform operation + 80006900: 75ff8fb3 sm4ks x31,x31,x31,0x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31, Zksed_sm4ks_cg_cmp_rd_rs1_rs2_b31_str) + 80006904: 00013203 ld x4,0(x2) + 80006908: 01f20c63 beq x4,x31,80006920 + 8000690c: 0b5042ef jal x5,8000b1c0 + 80006910: 80006900 .word 0x80006900 + 80006914: 00000000 .word 0x00000000 + 80006918: 8001d5ea .word 0x8001d5ea + 8000691c: 00000000 .word 0x00000000 + 80006920: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_bs +///////////////////////////////// + +# Testcase cp_bs: bs=0 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x68689e6c690daa76 + 80006924: 00033583 ld x11,0(x6) + 80006928: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs2: x0 = 0x3d4a165a5fc2683d + 8000692c: 00033003 ld x0,0(x6) + 80006930: 00830313 addi x6,x6,8 + +0000000080006934 : +Zksed_sm4ks_cg_cp_bs_b0: + sm4ks x20, x11, x0, 0 # perform operation + 80006934: 34058a33 sm4ks x20,x11,x0,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_bs_b0, Zksed_sm4ks_cg_cp_bs_b0_str) + 80006938: 00013203 ld x4,0(x2) + 8000693c: 01420c63 beq x4,x20,80006954 + 80006940: 081042ef jal x5,8000b1c0 + 80006944: 80006934 .word 0x80006934 + 80006948: 00000000 .word 0x00000000 + 8000694c: 8001d628 .word 0x8001d628 + 80006950: 00000000 .word 0x00000000 + 80006954: 00810113 addi x2,x2,8 + +# Testcase cp_bs: bs=1 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xf16c9644cd70f05e + 80006958: 00033903 ld x18,0(x6) + 8000695c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x2d8e17a11f14a08d + 80006960: 00033803 ld x16,0(x6) + 80006964: 00830313 addi x6,x6,8 + +0000000080006968 : +Zksed_sm4ks_cg_cp_bs_b1: + sm4ks x26, x18, x16, 1 # perform operation + 80006968: 75090d33 sm4ks x26,x18,x16,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_bs_b1, Zksed_sm4ks_cg_cp_bs_b1_str) + 8000696c: 00013203 ld x4,0(x2) + 80006970: 01a20c63 beq x4,x26,80006988 + 80006974: 04d042ef jal x5,8000b1c0 + 80006978: 80006968 .word 0x80006968 + 8000697c: 00000000 .word 0x00000000 + 80006980: 8001d65c .word 0x8001d65c + 80006984: 00000000 .word 0x00000000 + 80006988: 00810113 addi x2,x2,8 + +# Testcase cp_bs: bs=2 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x88f360a3fd09851a + 8000698c: 00033983 ld x19,0(x6) + 80006990: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xce39ff5d0e2f77a8 + 80006994: 00033483 ld x9,0(x6) + 80006998: 00830313 addi x6,x6,8 + +000000008000699c : +Zksed_sm4ks_cg_cp_bs_b2: + sm4ks x8, x19, x9, 2 # perform operation + 8000699c: b4998433 sm4ks x8,x19,x9,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_bs_b2, Zksed_sm4ks_cg_cp_bs_b2_str) + 800069a0: 00013203 ld x4,0(x2) + 800069a4: 00820c63 beq x4,x8,800069bc + 800069a8: 019042ef jal x5,8000b1c0 + 800069ac: 8000699c .word 0x8000699c + 800069b0: 00000000 .word 0x00000000 + 800069b4: 8001d690 .word 0x8001d690 + 800069b8: 00000000 .word 0x00000000 + 800069bc: 00810113 addi x2,x2,8 + +# Testcase cp_bs: bs=3 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xfc1c890dcab3f13e + 800069c0: 00033c03 ld x24,0(x6) + 800069c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x15a4ffa654b90142 + 800069c8: 00033a83 ld x21,0(x6) + 800069cc: 00830313 addi x6,x6,8 + +00000000800069d0 : +Zksed_sm4ks_cg_cp_bs_b3: + sm4ks x17, x24, x21, 3 # perform operation + 800069d0: f55c08b3 sm4ks x17,x24,x21,0x3 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_bs_b3, Zksed_sm4ks_cg_cp_bs_b3_str) + 800069d4: 00013203 ld x4,0(x2) + 800069d8: 01120c63 beq x4,x17,800069f0 + 800069dc: 7e4042ef jal x5,8000b1c0 + 800069e0: 800069d0 .word 0x800069d0 + 800069e4: 00000000 .word 0x00000000 + 800069e8: 8001d6c4 .word 0x8001d6c4 + 800069ec: 00000000 .word 0x00000000 + 800069f0: 00810113 addi x2,x2,8 +///////////////////////////////// +// cp_sbox +///////////////////////////////// + +# Testcase cp_sbox = 0 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x0000000000000000 + 800069f4: 00033c83 ld x25,0(x6) + 800069f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x0000000000000000 + 800069fc: 00033983 ld x19,0(x6) + 80006a00: 00830313 addi x6,x6,8 + +0000000080006a04 : +Zksed_sm4ks_cg_cp_sbox_b0: + sm4ks x1, x25, x19, 3 # perform operation + 80006a04: f53c80b3 sm4ks x1,x25,x19,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b0, Zksed_sm4ks_cg_cp_sbox_b0_str) + 80006a08: 00013203 ld x4,0(x2) + 80006a0c: 00120c63 beq x4,x1,80006a24 + 80006a10: 7b0042ef jal x5,8000b1c0 + 80006a14: 80006a04 .word 0x80006a04 + 80006a18: 00000000 .word 0x00000000 + 80006a1c: 8001d6f8 .word 0x8001d6f8 + 80006a20: 00000000 .word 0x00000000 + 80006a24: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 1 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x0101010101010101 + 80006a28: 00033783 ld x15,0(x6) + 80006a2c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x0101010101010101 + 80006a30: 00033703 ld x14,0(x6) + 80006a34: 00830313 addi x6,x6,8 + +0000000080006a38 : +Zksed_sm4ks_cg_cp_sbox_b1: + sm4ks x12, x15, x14, 1 # perform operation + 80006a38: 74e78633 sm4ks x12,x15,x14,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b1, Zksed_sm4ks_cg_cp_sbox_b1_str) + 80006a3c: 00013203 ld x4,0(x2) + 80006a40: 00c20c63 beq x4,x12,80006a58 + 80006a44: 77c042ef jal x5,8000b1c0 + 80006a48: 80006a38 .word 0x80006a38 + 80006a4c: 00000000 .word 0x00000000 + 80006a50: 8001d72e .word 0x8001d72e + 80006a54: 00000000 .word 0x00000000 + 80006a58: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 2 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x0202020202020202 + 80006a5c: 00033503 ld x10,0(x6) + 80006a60: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0202020202020202 + 80006a64: 00033583 ld x11,0(x6) + 80006a68: 00830313 addi x6,x6,8 + +0000000080006a6c : +Zksed_sm4ks_cg_cp_sbox_b2: + sm4ks x19, x10, x11, 1 # perform operation + 80006a6c: 74b509b3 sm4ks x19,x10,x11,0x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b2, Zksed_sm4ks_cg_cp_sbox_b2_str) + 80006a70: 00013203 ld x4,0(x2) + 80006a74: 01320c63 beq x4,x19,80006a8c + 80006a78: 748042ef jal x5,8000b1c0 + 80006a7c: 80006a6c .word 0x80006a6c + 80006a80: 00000000 .word 0x00000000 + 80006a84: 8001d764 .word 0x8001d764 + 80006a88: 00000000 .word 0x00000000 + 80006a8c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 3 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0303030303030303 + 80006a90: 00033f83 ld x31,0(x6) + 80006a94: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0303030303030303 + 80006a98: 00033e83 ld x29,0(x6) + 80006a9c: 00830313 addi x6,x6,8 + +0000000080006aa0 : +Zksed_sm4ks_cg_cp_sbox_b3: + sm4ks x16, x31, x29, 0 # perform operation + 80006aa0: 35df8833 sm4ks x16,x31,x29,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b3, Zksed_sm4ks_cg_cp_sbox_b3_str) + 80006aa4: 00013203 ld x4,0(x2) + 80006aa8: 01020c63 beq x4,x16,80006ac0 + 80006aac: 714042ef jal x5,8000b1c0 + 80006ab0: 80006aa0 .word 0x80006aa0 + 80006ab4: 00000000 .word 0x00000000 + 80006ab8: 8001d79a .word 0x8001d79a + 80006abc: 00000000 .word 0x00000000 + 80006ac0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 4 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x0404040404040404 + 80006ac4: 00033b83 ld x23,0(x6) + 80006ac8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0404040404040404 + 80006acc: 00033603 ld x12,0(x6) + 80006ad0: 00830313 addi x6,x6,8 + +0000000080006ad4 : +Zksed_sm4ks_cg_cp_sbox_b4: + sm4ks x21, x23, x12, 2 # perform operation + 80006ad4: b4cb8ab3 sm4ks x21,x23,x12,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b4, Zksed_sm4ks_cg_cp_sbox_b4_str) + 80006ad8: 00013203 ld x4,0(x2) + 80006adc: 01520c63 beq x4,x21,80006af4 + 80006ae0: 6e0042ef jal x5,8000b1c0 + 80006ae4: 80006ad4 .word 0x80006ad4 + 80006ae8: 00000000 .word 0x00000000 + 80006aec: 8001d7d0 .word 0x8001d7d0 + 80006af0: 00000000 .word 0x00000000 + 80006af4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 5 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x0505050505050505 + 80006af8: 00033583 ld x11,0(x6) + 80006afc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x0505050505050505 + 80006b00: 00033e83 ld x29,0(x6) + 80006b04: 00830313 addi x6,x6,8 + +0000000080006b08 : +Zksed_sm4ks_cg_cp_sbox_b5: + sm4ks x22, x11, x29, 2 # perform operation + 80006b08: b5d58b33 sm4ks x22,x11,x29,0x2 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b5, Zksed_sm4ks_cg_cp_sbox_b5_str) + 80006b0c: 00013203 ld x4,0(x2) + 80006b10: 01620c63 beq x4,x22,80006b28 + 80006b14: 6ac042ef jal x5,8000b1c0 + 80006b18: 80006b08 .word 0x80006b08 + 80006b1c: 00000000 .word 0x00000000 + 80006b20: 8001d806 .word 0x8001d806 + 80006b24: 00000000 .word 0x00000000 + 80006b28: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 6 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0606060606060606 + 80006b2c: 00033383 ld x7,0(x6) + 80006b30: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x0606060606060606 + 80006b34: 00033183 ld x3,0(x6) + 80006b38: 00830313 addi x6,x6,8 + +0000000080006b3c : +Zksed_sm4ks_cg_cp_sbox_b6: + sm4ks x11, x7, x3, 3 # perform operation + 80006b3c: f43385b3 sm4ks x11,x7,x3,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b6, Zksed_sm4ks_cg_cp_sbox_b6_str) + 80006b40: 00013203 ld x4,0(x2) + 80006b44: 00b20c63 beq x4,x11,80006b5c + 80006b48: 678042ef jal x5,8000b1c0 + 80006b4c: 80006b3c .word 0x80006b3c + 80006b50: 00000000 .word 0x00000000 + 80006b54: 8001d83c .word 0x8001d83c + 80006b58: 00000000 .word 0x00000000 + 80006b5c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 7 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0707070707070707 + 80006b60: 00033d03 ld x26,0(x6) + 80006b64: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x0707070707070707 + 80006b68: 00033e03 ld x28,0(x6) + 80006b6c: 00830313 addi x6,x6,8 + +0000000080006b70 : +Zksed_sm4ks_cg_cp_sbox_b7: + sm4ks x31, x26, x28, 2 # perform operation + 80006b70: b5cd0fb3 sm4ks x31,x26,x28,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b7, Zksed_sm4ks_cg_cp_sbox_b7_str) + 80006b74: 00013203 ld x4,0(x2) + 80006b78: 01f20c63 beq x4,x31,80006b90 + 80006b7c: 644042ef jal x5,8000b1c0 + 80006b80: 80006b70 .word 0x80006b70 + 80006b84: 00000000 .word 0x00000000 + 80006b88: 8001d872 .word 0x8001d872 + 80006b8c: 00000000 .word 0x00000000 + 80006b90: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x0808080808080808 + 80006b94: 00033383 ld x7,0(x6) + 80006b98: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x0808080808080808 + 80006b9c: 00033d83 ld x27,0(x6) + 80006ba0: 00830313 addi x6,x6,8 + +0000000080006ba4 : +Zksed_sm4ks_cg_cp_sbox_b8: + sm4ks x25, x7, x27, 1 # perform operation + 80006ba4: 75b38cb3 sm4ks x25,x7,x27,0x1 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b8, Zksed_sm4ks_cg_cp_sbox_b8_str) + 80006ba8: 00013203 ld x4,0(x2) + 80006bac: 01920c63 beq x4,x25,80006bc4 + 80006bb0: 610042ef jal x5,8000b1c0 + 80006bb4: 80006ba4 .word 0x80006ba4 + 80006bb8: 00000000 .word 0x00000000 + 80006bbc: 8001d8a8 .word 0x8001d8a8 + 80006bc0: 00000000 .word 0x00000000 + 80006bc4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 9 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x0909090909090909 + 80006bc8: 00033e03 ld x28,0(x6) + 80006bcc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0909090909090909 + 80006bd0: 00033603 ld x12,0(x6) + 80006bd4: 00830313 addi x6,x6,8 + +0000000080006bd8 : +Zksed_sm4ks_cg_cp_sbox_b9: + sm4ks x9, x28, x12, 1 # perform operation + 80006bd8: 74ce04b3 sm4ks x9,x28,x12,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b9, Zksed_sm4ks_cg_cp_sbox_b9_str) + 80006bdc: 00013203 ld x4,0(x2) + 80006be0: 00920c63 beq x4,x9,80006bf8 + 80006be4: 5dc042ef jal x5,8000b1c0 + 80006be8: 80006bd8 .word 0x80006bd8 + 80006bec: 00000000 .word 0x00000000 + 80006bf0: 8001d8de .word 0x8001d8de + 80006bf4: 00000000 .word 0x00000000 + 80006bf8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 10 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0a0a0a0a0a0a0a0a + 80006bfc: 00033f83 ld x31,0(x6) + 80006c00: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x0a0a0a0a0a0a0a0a + 80006c04: 00033883 ld x17,0(x6) + 80006c08: 00830313 addi x6,x6,8 + +0000000080006c0c : +Zksed_sm4ks_cg_cp_sbox_b10: + sm4ks x29, x31, x17, 2 # perform operation + 80006c0c: b51f8eb3 sm4ks x29,x31,x17,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b10, Zksed_sm4ks_cg_cp_sbox_b10_str) + 80006c10: 00013203 ld x4,0(x2) + 80006c14: 01d20c63 beq x4,x29,80006c2c + 80006c18: 5a8042ef jal x5,8000b1c0 + 80006c1c: 80006c0c .word 0x80006c0c + 80006c20: 00000000 .word 0x00000000 + 80006c24: 8001d914 .word 0x8001d914 + 80006c28: 00000000 .word 0x00000000 + 80006c2c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 11 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x0b0b0b0b0b0b0b0b + 80006c30: 00033d03 ld x26,0(x6) + 80006c34: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x0b0b0b0b0b0b0b0b + 80006c38: 00033803 ld x16,0(x6) + 80006c3c: 00830313 addi x6,x6,8 + +0000000080006c40 : +Zksed_sm4ks_cg_cp_sbox_b11: + sm4ks x15, x26, x16, 3 # perform operation + 80006c40: f50d07b3 sm4ks x15,x26,x16,0x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b11, Zksed_sm4ks_cg_cp_sbox_b11_str) + 80006c44: 00013203 ld x4,0(x2) + 80006c48: 00f20c63 beq x4,x15,80006c60 + 80006c4c: 574042ef jal x5,8000b1c0 + 80006c50: 80006c40 .word 0x80006c40 + 80006c54: 00000000 .word 0x00000000 + 80006c58: 8001d94b .word 0x8001d94b + 80006c5c: 00000000 .word 0x00000000 + 80006c60: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 12 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x0c0c0c0c0c0c0c0c + 80006c64: 00033d83 ld x27,0(x6) + 80006c68: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x0c0c0c0c0c0c0c0c + 80006c6c: 00033503 ld x10,0(x6) + 80006c70: 00830313 addi x6,x6,8 + +0000000080006c74 : +Zksed_sm4ks_cg_cp_sbox_b12: + sm4ks x18, x27, x10, 1 # perform operation + 80006c74: 74ad8933 sm4ks x18,x27,x10,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b12, Zksed_sm4ks_cg_cp_sbox_b12_str) + 80006c78: 00013203 ld x4,0(x2) + 80006c7c: 01220c63 beq x4,x18,80006c94 + 80006c80: 540042ef jal x5,8000b1c0 + 80006c84: 80006c74 .word 0x80006c74 + 80006c88: 00000000 .word 0x00000000 + 80006c8c: 8001d982 .word 0x8001d982 + 80006c90: 00000000 .word 0x00000000 + 80006c94: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 13 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x0d0d0d0d0d0d0d0d + 80006c98: 00033983 ld x19,0(x6) + 80006c9c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x0d0d0d0d0d0d0d0d + 80006ca0: 00033583 ld x11,0(x6) + 80006ca4: 00830313 addi x6,x6,8 + +0000000080006ca8 : +Zksed_sm4ks_cg_cp_sbox_b13: + sm4ks x30, x19, x11, 3 # perform operation + 80006ca8: f4b98f33 sm4ks x30,x19,x11,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b13, Zksed_sm4ks_cg_cp_sbox_b13_str) + 80006cac: 00013203 ld x4,0(x2) + 80006cb0: 01e20c63 beq x4,x30,80006cc8 + 80006cb4: 50c042ef jal x5,8000b1c0 + 80006cb8: 80006ca8 .word 0x80006ca8 + 80006cbc: 00000000 .word 0x00000000 + 80006cc0: 8001d9b9 .word 0x8001d9b9 + 80006cc4: 00000000 .word 0x00000000 + 80006cc8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 14 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x0e0e0e0e0e0e0e0e + 80006ccc: 00033703 ld x14,0(x6) + 80006cd0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x0e0e0e0e0e0e0e0e + 80006cd4: 00033603 ld x12,0(x6) + 80006cd8: 00830313 addi x6,x6,8 + +0000000080006cdc : +Zksed_sm4ks_cg_cp_sbox_b14: + sm4ks x26, x14, x12, 2 # perform operation + 80006cdc: b4c70d33 sm4ks x26,x14,x12,0x2 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b14, Zksed_sm4ks_cg_cp_sbox_b14_str) + 80006ce0: 00013203 ld x4,0(x2) + 80006ce4: 01a20c63 beq x4,x26,80006cfc + 80006ce8: 4d8042ef jal x5,8000b1c0 + 80006cec: 80006cdc .word 0x80006cdc + 80006cf0: 00000000 .word 0x00000000 + 80006cf4: 8001d9f0 .word 0x8001d9f0 + 80006cf8: 00000000 .word 0x00000000 + 80006cfc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 15 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x0f0f0f0f0f0f0f0f + 80006d00: 00033183 ld x3,0(x6) + 80006d04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x0f0f0f0f0f0f0f0f + 80006d08: 00033b03 ld x22,0(x6) + 80006d0c: 00830313 addi x6,x6,8 + +0000000080006d10 : +Zksed_sm4ks_cg_cp_sbox_b15: + sm4ks x16, x3, x22, 2 # perform operation + 80006d10: b5618833 sm4ks x16,x3,x22,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b15, Zksed_sm4ks_cg_cp_sbox_b15_str) + 80006d14: 00013203 ld x4,0(x2) + 80006d18: 01020c63 beq x4,x16,80006d30 + 80006d1c: 4a4042ef jal x5,8000b1c0 + 80006d20: 80006d10 .word 0x80006d10 + 80006d24: 00000000 .word 0x00000000 + 80006d28: 8001da27 .word 0x8001da27 + 80006d2c: 00000000 .word 0x00000000 + 80006d30: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 16 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x1010101010101010 + 80006d34: 00033483 ld x9,0(x6) + 80006d38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x1010101010101010 + 80006d3c: 00033783 ld x15,0(x6) + 80006d40: 00830313 addi x6,x6,8 + +0000000080006d44 : +Zksed_sm4ks_cg_cp_sbox_b16: + sm4ks x31, x9, x15, 1 # perform operation + 80006d44: 74f48fb3 sm4ks x31,x9,x15,0x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b16, Zksed_sm4ks_cg_cp_sbox_b16_str) + 80006d48: 00013203 ld x4,0(x2) + 80006d4c: 01f20c63 beq x4,x31,80006d64 + 80006d50: 470042ef jal x5,8000b1c0 + 80006d54: 80006d44 .word 0x80006d44 + 80006d58: 00000000 .word 0x00000000 + 80006d5c: 8001da5e .word 0x8001da5e + 80006d60: 00000000 .word 0x00000000 + 80006d64: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 17 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x1111111111111111 + 80006d68: 00033583 ld x11,0(x6) + 80006d6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x1111111111111111 + 80006d70: 00033603 ld x12,0(x6) + 80006d74: 00830313 addi x6,x6,8 + +0000000080006d78 : +Zksed_sm4ks_cg_cp_sbox_b17: + sm4ks x26, x11, x12, 1 # perform operation + 80006d78: 74c58d33 sm4ks x26,x11,x12,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b17, Zksed_sm4ks_cg_cp_sbox_b17_str) + 80006d7c: 00013203 ld x4,0(x2) + 80006d80: 01a20c63 beq x4,x26,80006d98 + 80006d84: 43c042ef jal x5,8000b1c0 + 80006d88: 80006d78 .word 0x80006d78 + 80006d8c: 00000000 .word 0x00000000 + 80006d90: 8001da95 .word 0x8001da95 + 80006d94: 00000000 .word 0x00000000 + 80006d98: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 18 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x1212121212121212 + 80006d9c: 00033183 ld x3,0(x6) + 80006da0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x1212121212121212 + 80006da4: 00033c83 ld x25,0(x6) + 80006da8: 00830313 addi x6,x6,8 + +0000000080006dac : +Zksed_sm4ks_cg_cp_sbox_b18: + sm4ks x27, x3, x25, 1 # perform operation + 80006dac: 75918db3 sm4ks x27,x3,x25,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b18, Zksed_sm4ks_cg_cp_sbox_b18_str) + 80006db0: 00013203 ld x4,0(x2) + 80006db4: 01b20c63 beq x4,x27,80006dcc + 80006db8: 408042ef jal x5,8000b1c0 + 80006dbc: 80006dac .word 0x80006dac + 80006dc0: 00000000 .word 0x00000000 + 80006dc4: 8001dacc .word 0x8001dacc + 80006dc8: 00000000 .word 0x00000000 + 80006dcc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 19 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x1313131313131313 + 80006dd0: 00033a83 ld x21,0(x6) + 80006dd4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x1313131313131313 + 80006dd8: 00033c83 ld x25,0(x6) + 80006ddc: 00830313 addi x6,x6,8 + +0000000080006de0 : +Zksed_sm4ks_cg_cp_sbox_b19: + sm4ks x9, x21, x25, 3 # perform operation + 80006de0: f59a84b3 sm4ks x9,x21,x25,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b19, Zksed_sm4ks_cg_cp_sbox_b19_str) + 80006de4: 00013203 ld x4,0(x2) + 80006de8: 00920c63 beq x4,x9,80006e00 + 80006dec: 3d4042ef jal x5,8000b1c0 + 80006df0: 80006de0 .word 0x80006de0 + 80006df4: 00000000 .word 0x00000000 + 80006df8: 8001db03 .word 0x8001db03 + 80006dfc: 00000000 .word 0x00000000 + 80006e00: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 20 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x1414141414141414 + 80006e04: 00033783 ld x15,0(x6) + 80006e08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x1414141414141414 + 80006e0c: 00033a03 ld x20,0(x6) + 80006e10: 00830313 addi x6,x6,8 + +0000000080006e14 : +Zksed_sm4ks_cg_cp_sbox_b20: + sm4ks x21, x15, x20, 3 # perform operation + 80006e14: f5478ab3 sm4ks x21,x15,x20,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b20, Zksed_sm4ks_cg_cp_sbox_b20_str) + 80006e18: 00013203 ld x4,0(x2) + 80006e1c: 01520c63 beq x4,x21,80006e34 + 80006e20: 3a0042ef jal x5,8000b1c0 + 80006e24: 80006e14 .word 0x80006e14 + 80006e28: 00000000 .word 0x00000000 + 80006e2c: 8001db3a .word 0x8001db3a + 80006e30: 00000000 .word 0x00000000 + 80006e34: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 21 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x1515151515151515 + 80006e38: 00033c83 ld x25,0(x6) + 80006e3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x1515151515151515 + 80006e40: 00033983 ld x19,0(x6) + 80006e44: 00830313 addi x6,x6,8 + +0000000080006e48 : +Zksed_sm4ks_cg_cp_sbox_b21: + sm4ks x7, x25, x19, 1 # perform operation + 80006e48: 753c83b3 sm4ks x7,x25,x19,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b21, Zksed_sm4ks_cg_cp_sbox_b21_str) + 80006e4c: 00013203 ld x4,0(x2) + 80006e50: 00720c63 beq x4,x7,80006e68 + 80006e54: 36c042ef jal x5,8000b1c0 + 80006e58: 80006e48 .word 0x80006e48 + 80006e5c: 00000000 .word 0x00000000 + 80006e60: 8001db71 .word 0x8001db71 + 80006e64: 00000000 .word 0x00000000 + 80006e68: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 22 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x1616161616161616 + 80006e6c: 00033c03 ld x24,0(x6) + 80006e70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x1616161616161616 + 80006e74: 00033a83 ld x21,0(x6) + 80006e78: 00830313 addi x6,x6,8 + +0000000080006e7c : +Zksed_sm4ks_cg_cp_sbox_b22: + sm4ks x23, x24, x21, 1 # perform operation + 80006e7c: 755c0bb3 sm4ks x23,x24,x21,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b22, Zksed_sm4ks_cg_cp_sbox_b22_str) + 80006e80: 00013203 ld x4,0(x2) + 80006e84: 01720c63 beq x4,x23,80006e9c + 80006e88: 338042ef jal x5,8000b1c0 + 80006e8c: 80006e7c .word 0x80006e7c + 80006e90: 00000000 .word 0x00000000 + 80006e94: 8001dba8 .word 0x8001dba8 + 80006e98: 00000000 .word 0x00000000 + 80006e9c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 23 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x1717171717171717 + 80006ea0: 00033e03 ld x28,0(x6) + 80006ea4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x1717171717171717 + 80006ea8: 00033b03 ld x22,0(x6) + 80006eac: 00830313 addi x6,x6,8 + +0000000080006eb0 : +Zksed_sm4ks_cg_cp_sbox_b23: + sm4ks x25, x28, x22, 3 # perform operation + 80006eb0: f56e0cb3 sm4ks x25,x28,x22,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b23, Zksed_sm4ks_cg_cp_sbox_b23_str) + 80006eb4: 00013203 ld x4,0(x2) + 80006eb8: 01920c63 beq x4,x25,80006ed0 + 80006ebc: 304042ef jal x5,8000b1c0 + 80006ec0: 80006eb0 .word 0x80006eb0 + 80006ec4: 00000000 .word 0x00000000 + 80006ec8: 8001dbdf .word 0x8001dbdf + 80006ecc: 00000000 .word 0x00000000 + 80006ed0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 24 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x1818181818181818 + 80006ed4: 00033883 ld x17,0(x6) + 80006ed8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x1818181818181818 + 80006edc: 00033a03 ld x20,0(x6) + 80006ee0: 00830313 addi x6,x6,8 + +0000000080006ee4 : +Zksed_sm4ks_cg_cp_sbox_b24: + sm4ks x10, x17, x20, 1 # perform operation + 80006ee4: 75488533 sm4ks x10,x17,x20,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b24, Zksed_sm4ks_cg_cp_sbox_b24_str) + 80006ee8: 00013203 ld x4,0(x2) + 80006eec: 00a20c63 beq x4,x10,80006f04 + 80006ef0: 2d0042ef jal x5,8000b1c0 + 80006ef4: 80006ee4 .word 0x80006ee4 + 80006ef8: 00000000 .word 0x00000000 + 80006efc: 8001dc16 .word 0x8001dc16 + 80006f00: 00000000 .word 0x00000000 + 80006f04: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 25 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x1919191919191919 + 80006f08: 00033783 ld x15,0(x6) + 80006f0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x1919191919191919 + 80006f10: 00033d83 ld x27,0(x6) + 80006f14: 00830313 addi x6,x6,8 + +0000000080006f18 : +Zksed_sm4ks_cg_cp_sbox_b25: + sm4ks x22, x15, x27, 1 # perform operation + 80006f18: 75b78b33 sm4ks x22,x15,x27,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b25, Zksed_sm4ks_cg_cp_sbox_b25_str) + 80006f1c: 00013203 ld x4,0(x2) + 80006f20: 01620c63 beq x4,x22,80006f38 + 80006f24: 29c042ef jal x5,8000b1c0 + 80006f28: 80006f18 .word 0x80006f18 + 80006f2c: 00000000 .word 0x00000000 + 80006f30: 8001dc4d .word 0x8001dc4d + 80006f34: 00000000 .word 0x00000000 + 80006f38: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 26 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x1a1a1a1a1a1a1a1a + 80006f3c: 00033583 ld x11,0(x6) + 80006f40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x1a1a1a1a1a1a1a1a + 80006f44: 00033983 ld x19,0(x6) + 80006f48: 00830313 addi x6,x6,8 + +0000000080006f4c : +Zksed_sm4ks_cg_cp_sbox_b26: + sm4ks x30, x11, x19, 3 # perform operation + 80006f4c: f5358f33 sm4ks x30,x11,x19,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b26, Zksed_sm4ks_cg_cp_sbox_b26_str) + 80006f50: 00013203 ld x4,0(x2) + 80006f54: 01e20c63 beq x4,x30,80006f6c + 80006f58: 268042ef jal x5,8000b1c0 + 80006f5c: 80006f4c .word 0x80006f4c + 80006f60: 00000000 .word 0x00000000 + 80006f64: 8001dc84 .word 0x8001dc84 + 80006f68: 00000000 .word 0x00000000 + 80006f6c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 27 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x1b1b1b1b1b1b1b1b + 80006f70: 00033d03 ld x26,0(x6) + 80006f74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x1b1b1b1b1b1b1b1b + 80006f78: 00033783 ld x15,0(x6) + 80006f7c: 00830313 addi x6,x6,8 + +0000000080006f80 : +Zksed_sm4ks_cg_cp_sbox_b27: + sm4ks x9, x26, x15, 3 # perform operation + 80006f80: f4fd04b3 sm4ks x9,x26,x15,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b27, Zksed_sm4ks_cg_cp_sbox_b27_str) + 80006f84: 00013203 ld x4,0(x2) + 80006f88: 00920c63 beq x4,x9,80006fa0 + 80006f8c: 234042ef jal x5,8000b1c0 + 80006f90: 80006f80 .word 0x80006f80 + 80006f94: 00000000 .word 0x00000000 + 80006f98: 8001dcbb .word 0x8001dcbb + 80006f9c: 00000000 .word 0x00000000 + 80006fa0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 28 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x1c1c1c1c1c1c1c1c + 80006fa4: 00033e83 ld x29,0(x6) + 80006fa8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x1c1c1c1c1c1c1c1c + 80006fac: 00033c83 ld x25,0(x6) + 80006fb0: 00830313 addi x6,x6,8 + +0000000080006fb4 : +Zksed_sm4ks_cg_cp_sbox_b28: + sm4ks x3, x29, x25, 1 # perform operation + 80006fb4: 759e81b3 sm4ks x3,x29,x25,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b28, Zksed_sm4ks_cg_cp_sbox_b28_str) + 80006fb8: 00013203 ld x4,0(x2) + 80006fbc: 00320c63 beq x4,x3,80006fd4 + 80006fc0: 200042ef jal x5,8000b1c0 + 80006fc4: 80006fb4 .word 0x80006fb4 + 80006fc8: 00000000 .word 0x00000000 + 80006fcc: 8001dcf2 .word 0x8001dcf2 + 80006fd0: 00000000 .word 0x00000000 + 80006fd4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 29 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x1d1d1d1d1d1d1d1d + 80006fd8: 00033083 ld x1,0(x6) + 80006fdc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x1d1d1d1d1d1d1d1d + 80006fe0: 00033483 ld x9,0(x6) + 80006fe4: 00830313 addi x6,x6,8 + +0000000080006fe8 : +Zksed_sm4ks_cg_cp_sbox_b29: + sm4ks x13, x1, x9, 1 # perform operation + 80006fe8: 749086b3 sm4ks x13,x1,x9,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b29, Zksed_sm4ks_cg_cp_sbox_b29_str) + 80006fec: 00013203 ld x4,0(x2) + 80006ff0: 00d20c63 beq x4,x13,80007008 + 80006ff4: 1cc042ef jal x5,8000b1c0 + 80006ff8: 80006fe8 .word 0x80006fe8 + 80006ffc: 00000000 .word 0x00000000 + 80007000: 8001dd29 .word 0x8001dd29 + 80007004: 00000000 .word 0x00000000 + 80007008: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 30 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x1e1e1e1e1e1e1e1e + 8000700c: 00033f03 ld x30,0(x6) + 80007010: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x1e1e1e1e1e1e1e1e + 80007014: 00033383 ld x7,0(x6) + 80007018: 00830313 addi x6,x6,8 + +000000008000701c : +Zksed_sm4ks_cg_cp_sbox_b30: + sm4ks x26, x30, x7, 1 # perform operation + 8000701c: 747f0d33 sm4ks x26,x30,x7,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b30, Zksed_sm4ks_cg_cp_sbox_b30_str) + 80007020: 00013203 ld x4,0(x2) + 80007024: 01a20c63 beq x4,x26,8000703c + 80007028: 198042ef jal x5,8000b1c0 + 8000702c: 8000701c .word 0x8000701c + 80007030: 00000000 .word 0x00000000 + 80007034: 8001dd60 .word 0x8001dd60 + 80007038: 00000000 .word 0x00000000 + 8000703c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 31 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x1f1f1f1f1f1f1f1f + 80007040: 00033f83 ld x31,0(x6) + 80007044: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x1f1f1f1f1f1f1f1f + 80007048: 00033d83 ld x27,0(x6) + 8000704c: 00830313 addi x6,x6,8 + +0000000080007050 : +Zksed_sm4ks_cg_cp_sbox_b31: + sm4ks x29, x31, x27, 2 # perform operation + 80007050: b5bf8eb3 sm4ks x29,x31,x27,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b31, Zksed_sm4ks_cg_cp_sbox_b31_str) + 80007054: 00013203 ld x4,0(x2) + 80007058: 01d20c63 beq x4,x29,80007070 + 8000705c: 164042ef jal x5,8000b1c0 + 80007060: 80007050 .word 0x80007050 + 80007064: 00000000 .word 0x00000000 + 80007068: 8001dd97 .word 0x8001dd97 + 8000706c: 00000000 .word 0x00000000 + 80007070: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 32 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x2020202020202020 + 80007074: 00033403 ld x8,0(x6) + 80007078: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x2020202020202020 + 8000707c: 00033603 ld x12,0(x6) + 80007080: 00830313 addi x6,x6,8 + +0000000080007084 : +Zksed_sm4ks_cg_cp_sbox_b32: + sm4ks x28, x8, x12, 0 # perform operation + 80007084: 34c40e33 sm4ks x28,x8,x12,0x0 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b32, Zksed_sm4ks_cg_cp_sbox_b32_str) + 80007088: 00013203 ld x4,0(x2) + 8000708c: 01c20c63 beq x4,x28,800070a4 + 80007090: 130042ef jal x5,8000b1c0 + 80007094: 80007084 .word 0x80007084 + 80007098: 00000000 .word 0x00000000 + 8000709c: 8001ddce .word 0x8001ddce + 800070a0: 00000000 .word 0x00000000 + 800070a4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 33 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x2121212121212121 + 800070a8: 00033b83 ld x23,0(x6) + 800070ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x2121212121212121 + 800070b0: 00033083 ld x1,0(x6) + 800070b4: 00830313 addi x6,x6,8 + +00000000800070b8 : +Zksed_sm4ks_cg_cp_sbox_b33: + sm4ks x16, x23, x1, 0 # perform operation + 800070b8: 341b8833 sm4ks x16,x23,x1,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b33, Zksed_sm4ks_cg_cp_sbox_b33_str) + 800070bc: 00013203 ld x4,0(x2) + 800070c0: 01020c63 beq x4,x16,800070d8 + 800070c4: 0fc042ef jal x5,8000b1c0 + 800070c8: 800070b8 .word 0x800070b8 + 800070cc: 00000000 .word 0x00000000 + 800070d0: 8001de05 .word 0x8001de05 + 800070d4: 00000000 .word 0x00000000 + 800070d8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 34 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x2222222222222222 + 800070dc: 00033c03 ld x24,0(x6) + 800070e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x2222222222222222 + 800070e4: 00033a03 ld x20,0(x6) + 800070e8: 00830313 addi x6,x6,8 + +00000000800070ec : +Zksed_sm4ks_cg_cp_sbox_b34: + sm4ks x11, x24, x20, 0 # perform operation + 800070ec: 354c05b3 sm4ks x11,x24,x20,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b34, Zksed_sm4ks_cg_cp_sbox_b34_str) + 800070f0: 00013203 ld x4,0(x2) + 800070f4: 00b20c63 beq x4,x11,8000710c + 800070f8: 0c8042ef jal x5,8000b1c0 + 800070fc: 800070ec .word 0x800070ec + 80007100: 00000000 .word 0x00000000 + 80007104: 8001de3c .word 0x8001de3c + 80007108: 00000000 .word 0x00000000 + 8000710c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 35 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x2323232323232323 + 80007110: 00033f83 ld x31,0(x6) + 80007114: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x2323232323232323 + 80007118: 00033683 ld x13,0(x6) + 8000711c: 00830313 addi x6,x6,8 + +0000000080007120 : +Zksed_sm4ks_cg_cp_sbox_b35: + sm4ks x30, x31, x13, 2 # perform operation + 80007120: b4df8f33 sm4ks x30,x31,x13,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b35, Zksed_sm4ks_cg_cp_sbox_b35_str) + 80007124: 00013203 ld x4,0(x2) + 80007128: 01e20c63 beq x4,x30,80007140 + 8000712c: 094042ef jal x5,8000b1c0 + 80007130: 80007120 .word 0x80007120 + 80007134: 00000000 .word 0x00000000 + 80007138: 8001de73 .word 0x8001de73 + 8000713c: 00000000 .word 0x00000000 + 80007140: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 36 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x2424242424242424 + 80007144: 00033383 ld x7,0(x6) + 80007148: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x2424242424242424 + 8000714c: 00033f83 ld x31,0(x6) + 80007150: 00830313 addi x6,x6,8 + +0000000080007154 : +Zksed_sm4ks_cg_cp_sbox_b36: + sm4ks x15, x7, x31, 0 # perform operation + 80007154: 35f387b3 sm4ks x15,x7,x31,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b36, Zksed_sm4ks_cg_cp_sbox_b36_str) + 80007158: 00013203 ld x4,0(x2) + 8000715c: 00f20c63 beq x4,x15,80007174 + 80007160: 060042ef jal x5,8000b1c0 + 80007164: 80007154 .word 0x80007154 + 80007168: 00000000 .word 0x00000000 + 8000716c: 8001deaa .word 0x8001deaa + 80007170: 00000000 .word 0x00000000 + 80007174: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 37 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x2525252525252525 + 80007178: 00033383 ld x7,0(x6) + 8000717c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x2525252525252525 + 80007180: 00033603 ld x12,0(x6) + 80007184: 00830313 addi x6,x6,8 + +0000000080007188 : +Zksed_sm4ks_cg_cp_sbox_b37: + sm4ks x23, x7, x12, 3 # perform operation + 80007188: f4c38bb3 sm4ks x23,x7,x12,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b37, Zksed_sm4ks_cg_cp_sbox_b37_str) + 8000718c: 00013203 ld x4,0(x2) + 80007190: 01720c63 beq x4,x23,800071a8 + 80007194: 02c042ef jal x5,8000b1c0 + 80007198: 80007188 .word 0x80007188 + 8000719c: 00000000 .word 0x00000000 + 800071a0: 8001dee1 .word 0x8001dee1 + 800071a4: 00000000 .word 0x00000000 + 800071a8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 38 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x2626262626262626 + 800071ac: 00033f83 ld x31,0(x6) + 800071b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x2626262626262626 + 800071b4: 00033483 ld x9,0(x6) + 800071b8: 00830313 addi x6,x6,8 + +00000000800071bc : +Zksed_sm4ks_cg_cp_sbox_b38: + sm4ks x19, x31, x9, 0 # perform operation + 800071bc: 349f89b3 sm4ks x19,x31,x9,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b38, Zksed_sm4ks_cg_cp_sbox_b38_str) + 800071c0: 00013203 ld x4,0(x2) + 800071c4: 01320c63 beq x4,x19,800071dc + 800071c8: 7f9032ef jal x5,8000b1c0 + 800071cc: 800071bc .word 0x800071bc + 800071d0: 00000000 .word 0x00000000 + 800071d4: 8001df18 .word 0x8001df18 + 800071d8: 00000000 .word 0x00000000 + 800071dc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 39 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x2727272727272727 + 800071e0: 00033503 ld x10,0(x6) + 800071e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x2727272727272727 + 800071e8: 00033d83 ld x27,0(x6) + 800071ec: 00830313 addi x6,x6,8 + +00000000800071f0 : +Zksed_sm4ks_cg_cp_sbox_b39: + sm4ks x3, x10, x27, 0 # perform operation + 800071f0: 35b501b3 sm4ks x3,x10,x27,0x0 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b39, Zksed_sm4ks_cg_cp_sbox_b39_str) + 800071f4: 00013203 ld x4,0(x2) + 800071f8: 00320c63 beq x4,x3,80007210 + 800071fc: 7c5032ef jal x5,8000b1c0 + 80007200: 800071f0 .word 0x800071f0 + 80007204: 00000000 .word 0x00000000 + 80007208: 8001df4f .word 0x8001df4f + 8000720c: 00000000 .word 0x00000000 + 80007210: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 40 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x2828282828282828 + 80007214: 00033b83 ld x23,0(x6) + 80007218: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x2828282828282828 + 8000721c: 00033683 ld x13,0(x6) + 80007220: 00830313 addi x6,x6,8 + +0000000080007224 : +Zksed_sm4ks_cg_cp_sbox_b40: + sm4ks x12, x23, x13, 1 # perform operation + 80007224: 74db8633 sm4ks x12,x23,x13,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b40, Zksed_sm4ks_cg_cp_sbox_b40_str) + 80007228: 00013203 ld x4,0(x2) + 8000722c: 00c20c63 beq x4,x12,80007244 + 80007230: 791032ef jal x5,8000b1c0 + 80007234: 80007224 .word 0x80007224 + 80007238: 00000000 .word 0x00000000 + 8000723c: 8001df86 .word 0x8001df86 + 80007240: 00000000 .word 0x00000000 + 80007244: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 41 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x2929292929292929 + 80007248: 00033f03 ld x30,0(x6) + 8000724c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x2929292929292929 + 80007250: 00033f83 ld x31,0(x6) + 80007254: 00830313 addi x6,x6,8 + +0000000080007258 : +Zksed_sm4ks_cg_cp_sbox_b41: + sm4ks x17, x30, x31, 2 # perform operation + 80007258: b5ff08b3 sm4ks x17,x30,x31,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b41, Zksed_sm4ks_cg_cp_sbox_b41_str) + 8000725c: 00013203 ld x4,0(x2) + 80007260: 01120c63 beq x4,x17,80007278 + 80007264: 75d032ef jal x5,8000b1c0 + 80007268: 80007258 .word 0x80007258 + 8000726c: 00000000 .word 0x00000000 + 80007270: 8001dfbd .word 0x8001dfbd + 80007274: 00000000 .word 0x00000000 + 80007278: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 42 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x2a2a2a2a2a2a2a2a + 8000727c: 00033383 ld x7,0(x6) + 80007280: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x2a2a2a2a2a2a2a2a + 80007284: 00033a03 ld x20,0(x6) + 80007288: 00830313 addi x6,x6,8 + +000000008000728c : +Zksed_sm4ks_cg_cp_sbox_b42: + sm4ks x3, x7, x20, 1 # perform operation + 8000728c: 754381b3 sm4ks x3,x7,x20,0x1 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b42, Zksed_sm4ks_cg_cp_sbox_b42_str) + 80007290: 00013203 ld x4,0(x2) + 80007294: 00320c63 beq x4,x3,800072ac + 80007298: 729032ef jal x5,8000b1c0 + 8000729c: 8000728c .word 0x8000728c + 800072a0: 00000000 .word 0x00000000 + 800072a4: 8001dff4 .word 0x8001dff4 + 800072a8: 00000000 .word 0x00000000 + 800072ac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 43 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x2b2b2b2b2b2b2b2b + 800072b0: 00033783 ld x15,0(x6) + 800072b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x2b2b2b2b2b2b2b2b + 800072b8: 00033883 ld x17,0(x6) + 800072bc: 00830313 addi x6,x6,8 + +00000000800072c0 : +Zksed_sm4ks_cg_cp_sbox_b43: + sm4ks x14, x15, x17, 0 # perform operation + 800072c0: 35178733 sm4ks x14,x15,x17,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b43, Zksed_sm4ks_cg_cp_sbox_b43_str) + 800072c4: 00013203 ld x4,0(x2) + 800072c8: 00e20c63 beq x4,x14,800072e0 + 800072cc: 6f5032ef jal x5,8000b1c0 + 800072d0: 800072c0 .word 0x800072c0 + 800072d4: 00000000 .word 0x00000000 + 800072d8: 8001e02b .word 0x8001e02b + 800072dc: 00000000 .word 0x00000000 + 800072e0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 44 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x2c2c2c2c2c2c2c2c + 800072e4: 00033983 ld x19,0(x6) + 800072e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x2c2c2c2c2c2c2c2c + 800072ec: 00033483 ld x9,0(x6) + 800072f0: 00830313 addi x6,x6,8 + +00000000800072f4 : +Zksed_sm4ks_cg_cp_sbox_b44: + sm4ks x21, x19, x9, 0 # perform operation + 800072f4: 34998ab3 sm4ks x21,x19,x9,0x0 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b44, Zksed_sm4ks_cg_cp_sbox_b44_str) + 800072f8: 00013203 ld x4,0(x2) + 800072fc: 01520c63 beq x4,x21,80007314 + 80007300: 6c1032ef jal x5,8000b1c0 + 80007304: 800072f4 .word 0x800072f4 + 80007308: 00000000 .word 0x00000000 + 8000730c: 8001e062 .word 0x8001e062 + 80007310: 00000000 .word 0x00000000 + 80007314: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 45 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x2d2d2d2d2d2d2d2d + 80007318: 00033703 ld x14,0(x6) + 8000731c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x2d2d2d2d2d2d2d2d + 80007320: 00033803 ld x16,0(x6) + 80007324: 00830313 addi x6,x6,8 + +0000000080007328 : +Zksed_sm4ks_cg_cp_sbox_b45: + sm4ks x12, x14, x16, 0 # perform operation + 80007328: 35070633 sm4ks x12,x14,x16,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b45, Zksed_sm4ks_cg_cp_sbox_b45_str) + 8000732c: 00013203 ld x4,0(x2) + 80007330: 00c20c63 beq x4,x12,80007348 + 80007334: 68d032ef jal x5,8000b1c0 + 80007338: 80007328 .word 0x80007328 + 8000733c: 00000000 .word 0x00000000 + 80007340: 8001e099 .word 0x8001e099 + 80007344: 00000000 .word 0x00000000 + 80007348: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 46 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x2e2e2e2e2e2e2e2e + 8000734c: 00033d03 ld x26,0(x6) + 80007350: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x2e2e2e2e2e2e2e2e + 80007354: 00033703 ld x14,0(x6) + 80007358: 00830313 addi x6,x6,8 + +000000008000735c : +Zksed_sm4ks_cg_cp_sbox_b46: + sm4ks x16, x26, x14, 3 # perform operation + 8000735c: f4ed0833 sm4ks x16,x26,x14,0x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b46, Zksed_sm4ks_cg_cp_sbox_b46_str) + 80007360: 00013203 ld x4,0(x2) + 80007364: 01020c63 beq x4,x16,8000737c + 80007368: 659032ef jal x5,8000b1c0 + 8000736c: 8000735c .word 0x8000735c + 80007370: 00000000 .word 0x00000000 + 80007374: 8001e0d0 .word 0x8001e0d0 + 80007378: 00000000 .word 0x00000000 + 8000737c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 47 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x2f2f2f2f2f2f2f2f + 80007380: 00033883 ld x17,0(x6) + 80007384: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x2f2f2f2f2f2f2f2f + 80007388: 00033483 ld x9,0(x6) + 8000738c: 00830313 addi x6,x6,8 + +0000000080007390 : +Zksed_sm4ks_cg_cp_sbox_b47: + sm4ks x30, x17, x9, 3 # perform operation + 80007390: f4988f33 sm4ks x30,x17,x9,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b47, Zksed_sm4ks_cg_cp_sbox_b47_str) + 80007394: 00013203 ld x4,0(x2) + 80007398: 01e20c63 beq x4,x30,800073b0 + 8000739c: 625032ef jal x5,8000b1c0 + 800073a0: 80007390 .word 0x80007390 + 800073a4: 00000000 .word 0x00000000 + 800073a8: 8001e107 .word 0x8001e107 + 800073ac: 00000000 .word 0x00000000 + 800073b0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 48 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x3030303030303030 + 800073b4: 00033e03 ld x28,0(x6) + 800073b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x3030303030303030 + 800073bc: 00033483 ld x9,0(x6) + 800073c0: 00830313 addi x6,x6,8 + +00000000800073c4 : +Zksed_sm4ks_cg_cp_sbox_b48: + sm4ks x20, x28, x9, 0 # perform operation + 800073c4: 349e0a33 sm4ks x20,x28,x9,0x0 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b48, Zksed_sm4ks_cg_cp_sbox_b48_str) + 800073c8: 00013203 ld x4,0(x2) + 800073cc: 01420c63 beq x4,x20,800073e4 + 800073d0: 5f1032ef jal x5,8000b1c0 + 800073d4: 800073c4 .word 0x800073c4 + 800073d8: 00000000 .word 0x00000000 + 800073dc: 8001e13e .word 0x8001e13e + 800073e0: 00000000 .word 0x00000000 + 800073e4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 49 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x3131313131313131 + 800073e8: 00033983 ld x19,0(x6) + 800073ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x3131313131313131 + 800073f0: 00033f83 ld x31,0(x6) + 800073f4: 00830313 addi x6,x6,8 + +00000000800073f8 : +Zksed_sm4ks_cg_cp_sbox_b49: + sm4ks x10, x19, x31, 0 # perform operation + 800073f8: 35f98533 sm4ks x10,x19,x31,0x0 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b49, Zksed_sm4ks_cg_cp_sbox_b49_str) + 800073fc: 00013203 ld x4,0(x2) + 80007400: 00a20c63 beq x4,x10,80007418 + 80007404: 5bd032ef jal x5,8000b1c0 + 80007408: 800073f8 .word 0x800073f8 + 8000740c: 00000000 .word 0x00000000 + 80007410: 8001e175 .word 0x8001e175 + 80007414: 00000000 .word 0x00000000 + 80007418: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 50 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x3232323232323232 + 8000741c: 00033383 ld x7,0(x6) + 80007420: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x3232323232323232 + 80007424: 00033583 ld x11,0(x6) + 80007428: 00830313 addi x6,x6,8 + +000000008000742c : +Zksed_sm4ks_cg_cp_sbox_b50: + sm4ks x28, x7, x11, 2 # perform operation + 8000742c: b4b38e33 sm4ks x28,x7,x11,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b50, Zksed_sm4ks_cg_cp_sbox_b50_str) + 80007430: 00013203 ld x4,0(x2) + 80007434: 01c20c63 beq x4,x28,8000744c + 80007438: 589032ef jal x5,8000b1c0 + 8000743c: 8000742c .word 0x8000742c + 80007440: 00000000 .word 0x00000000 + 80007444: 8001e1ac .word 0x8001e1ac + 80007448: 00000000 .word 0x00000000 + 8000744c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 51 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x3333333333333333 + 80007450: 00033b03 ld x22,0(x6) + 80007454: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x3333333333333333 + 80007458: 00033c03 ld x24,0(x6) + 8000745c: 00830313 addi x6,x6,8 + +0000000080007460 : +Zksed_sm4ks_cg_cp_sbox_b51: + sm4ks x31, x22, x24, 2 # perform operation + 80007460: b58b0fb3 sm4ks x31,x22,x24,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b51, Zksed_sm4ks_cg_cp_sbox_b51_str) + 80007464: 00013203 ld x4,0(x2) + 80007468: 01f20c63 beq x4,x31,80007480 + 8000746c: 555032ef jal x5,8000b1c0 + 80007470: 80007460 .word 0x80007460 + 80007474: 00000000 .word 0x00000000 + 80007478: 8001e1e3 .word 0x8001e1e3 + 8000747c: 00000000 .word 0x00000000 + 80007480: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 52 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x3434343434343434 + 80007484: 00033b03 ld x22,0(x6) + 80007488: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x3434343434343434 + 8000748c: 00033a03 ld x20,0(x6) + 80007490: 00830313 addi x6,x6,8 + +0000000080007494 : +Zksed_sm4ks_cg_cp_sbox_b52: + sm4ks x26, x22, x20, 1 # perform operation + 80007494: 754b0d33 sm4ks x26,x22,x20,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b52, Zksed_sm4ks_cg_cp_sbox_b52_str) + 80007498: 00013203 ld x4,0(x2) + 8000749c: 01a20c63 beq x4,x26,800074b4 + 800074a0: 521032ef jal x5,8000b1c0 + 800074a4: 80007494 .word 0x80007494 + 800074a8: 00000000 .word 0x00000000 + 800074ac: 8001e21a .word 0x8001e21a + 800074b0: 00000000 .word 0x00000000 + 800074b4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 53 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x3535353535353535 + 800074b8: 00033a03 ld x20,0(x6) + 800074bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x3535353535353535 + 800074c0: 00033583 ld x11,0(x6) + 800074c4: 00830313 addi x6,x6,8 + +00000000800074c8 : +Zksed_sm4ks_cg_cp_sbox_b53: + sm4ks x26, x20, x11, 1 # perform operation + 800074c8: 74ba0d33 sm4ks x26,x20,x11,0x1 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b53, Zksed_sm4ks_cg_cp_sbox_b53_str) + 800074cc: 00013203 ld x4,0(x2) + 800074d0: 01a20c63 beq x4,x26,800074e8 + 800074d4: 4ed032ef jal x5,8000b1c0 + 800074d8: 800074c8 .word 0x800074c8 + 800074dc: 00000000 .word 0x00000000 + 800074e0: 8001e251 .word 0x8001e251 + 800074e4: 00000000 .word 0x00000000 + 800074e8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 54 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x3636363636363636 + 800074ec: 00033b03 ld x22,0(x6) + 800074f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x3636363636363636 + 800074f4: 00033403 ld x8,0(x6) + 800074f8: 00830313 addi x6,x6,8 + +00000000800074fc : +Zksed_sm4ks_cg_cp_sbox_b54: + sm4ks x27, x22, x8, 3 # perform operation + 800074fc: f48b0db3 sm4ks x27,x22,x8,0x3 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b54, Zksed_sm4ks_cg_cp_sbox_b54_str) + 80007500: 00013203 ld x4,0(x2) + 80007504: 01b20c63 beq x4,x27,8000751c + 80007508: 4b9032ef jal x5,8000b1c0 + 8000750c: 800074fc .word 0x800074fc + 80007510: 00000000 .word 0x00000000 + 80007514: 8001e288 .word 0x8001e288 + 80007518: 00000000 .word 0x00000000 + 8000751c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 55 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x3737373737373737 + 80007520: 00033683 ld x13,0(x6) + 80007524: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x3737373737373737 + 80007528: 00033f03 ld x30,0(x6) + 8000752c: 00830313 addi x6,x6,8 + +0000000080007530 : +Zksed_sm4ks_cg_cp_sbox_b55: + sm4ks x25, x13, x30, 3 # perform operation + 80007530: f5e68cb3 sm4ks x25,x13,x30,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b55, Zksed_sm4ks_cg_cp_sbox_b55_str) + 80007534: 00013203 ld x4,0(x2) + 80007538: 01920c63 beq x4,x25,80007550 + 8000753c: 485032ef jal x5,8000b1c0 + 80007540: 80007530 .word 0x80007530 + 80007544: 00000000 .word 0x00000000 + 80007548: 8001e2bf .word 0x8001e2bf + 8000754c: 00000000 .word 0x00000000 + 80007550: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 56 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x3838383838383838 + 80007554: 00033583 ld x11,0(x6) + 80007558: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x3838383838383838 + 8000755c: 00033903 ld x18,0(x6) + 80007560: 00830313 addi x6,x6,8 + +0000000080007564 : +Zksed_sm4ks_cg_cp_sbox_b56: + sm4ks x22, x11, x18, 3 # perform operation + 80007564: f5258b33 sm4ks x22,x11,x18,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b56, Zksed_sm4ks_cg_cp_sbox_b56_str) + 80007568: 00013203 ld x4,0(x2) + 8000756c: 01620c63 beq x4,x22,80007584 + 80007570: 451032ef jal x5,8000b1c0 + 80007574: 80007564 .word 0x80007564 + 80007578: 00000000 .word 0x00000000 + 8000757c: 8001e2f6 .word 0x8001e2f6 + 80007580: 00000000 .word 0x00000000 + 80007584: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 57 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x3939393939393939 + 80007588: 00033a03 ld x20,0(x6) + 8000758c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x3939393939393939 + 80007590: 00033603 ld x12,0(x6) + 80007594: 00830313 addi x6,x6,8 + +0000000080007598 : +Zksed_sm4ks_cg_cp_sbox_b57: + sm4ks x29, x20, x12, 1 # perform operation + 80007598: 74ca0eb3 sm4ks x29,x20,x12,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b57, Zksed_sm4ks_cg_cp_sbox_b57_str) + 8000759c: 00013203 ld x4,0(x2) + 800075a0: 01d20c63 beq x4,x29,800075b8 + 800075a4: 41d032ef jal x5,8000b1c0 + 800075a8: 80007598 .word 0x80007598 + 800075ac: 00000000 .word 0x00000000 + 800075b0: 8001e32d .word 0x8001e32d + 800075b4: 00000000 .word 0x00000000 + 800075b8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 58 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x3a3a3a3a3a3a3a3a + 800075bc: 00033f83 ld x31,0(x6) + 800075c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x3a3a3a3a3a3a3a3a + 800075c4: 00033383 ld x7,0(x6) + 800075c8: 00830313 addi x6,x6,8 + +00000000800075cc : +Zksed_sm4ks_cg_cp_sbox_b58: + sm4ks x21, x31, x7, 3 # perform operation + 800075cc: f47f8ab3 sm4ks x21,x31,x7,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b58, Zksed_sm4ks_cg_cp_sbox_b58_str) + 800075d0: 00013203 ld x4,0(x2) + 800075d4: 01520c63 beq x4,x21,800075ec + 800075d8: 3e9032ef jal x5,8000b1c0 + 800075dc: 800075cc .word 0x800075cc + 800075e0: 00000000 .word 0x00000000 + 800075e4: 8001e364 .word 0x8001e364 + 800075e8: 00000000 .word 0x00000000 + 800075ec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 59 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x3b3b3b3b3b3b3b3b + 800075f0: 00033083 ld x1,0(x6) + 800075f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x3b3b3b3b3b3b3b3b + 800075f8: 00033a03 ld x20,0(x6) + 800075fc: 00830313 addi x6,x6,8 + +0000000080007600 : +Zksed_sm4ks_cg_cp_sbox_b59: + sm4ks x17, x1, x20, 1 # perform operation + 80007600: 754088b3 sm4ks x17,x1,x20,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b59, Zksed_sm4ks_cg_cp_sbox_b59_str) + 80007604: 00013203 ld x4,0(x2) + 80007608: 01120c63 beq x4,x17,80007620 + 8000760c: 3b5032ef jal x5,8000b1c0 + 80007610: 80007600 .word 0x80007600 + 80007614: 00000000 .word 0x00000000 + 80007618: 8001e39b .word 0x8001e39b + 8000761c: 00000000 .word 0x00000000 + 80007620: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 60 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x3c3c3c3c3c3c3c3c + 80007624: 00033683 ld x13,0(x6) + 80007628: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x3c3c3c3c3c3c3c3c + 8000762c: 00033a83 ld x21,0(x6) + 80007630: 00830313 addi x6,x6,8 + +0000000080007634 : +Zksed_sm4ks_cg_cp_sbox_b60: + sm4ks x10, x13, x21, 3 # perform operation + 80007634: f5568533 sm4ks x10,x13,x21,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b60, Zksed_sm4ks_cg_cp_sbox_b60_str) + 80007638: 00013203 ld x4,0(x2) + 8000763c: 00a20c63 beq x4,x10,80007654 + 80007640: 381032ef jal x5,8000b1c0 + 80007644: 80007634 .word 0x80007634 + 80007648: 00000000 .word 0x00000000 + 8000764c: 8001e3d2 .word 0x8001e3d2 + 80007650: 00000000 .word 0x00000000 + 80007654: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 61 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x3d3d3d3d3d3d3d3d + 80007658: 00033d03 ld x26,0(x6) + 8000765c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x3d3d3d3d3d3d3d3d + 80007660: 00033503 ld x10,0(x6) + 80007664: 00830313 addi x6,x6,8 + +0000000080007668 : +Zksed_sm4ks_cg_cp_sbox_b61: + sm4ks x20, x26, x10, 1 # perform operation + 80007668: 74ad0a33 sm4ks x20,x26,x10,0x1 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b61, Zksed_sm4ks_cg_cp_sbox_b61_str) + 8000766c: 00013203 ld x4,0(x2) + 80007670: 01420c63 beq x4,x20,80007688 + 80007674: 34d032ef jal x5,8000b1c0 + 80007678: 80007668 .word 0x80007668 + 8000767c: 00000000 .word 0x00000000 + 80007680: 8001e409 .word 0x8001e409 + 80007684: 00000000 .word 0x00000000 + 80007688: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 62 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x3e3e3e3e3e3e3e3e + 8000768c: 00033b03 ld x22,0(x6) + 80007690: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x3e3e3e3e3e3e3e3e + 80007694: 00033583 ld x11,0(x6) + 80007698: 00830313 addi x6,x6,8 + +000000008000769c : +Zksed_sm4ks_cg_cp_sbox_b62: + sm4ks x27, x22, x11, 2 # perform operation + 8000769c: b4bb0db3 sm4ks x27,x22,x11,0x2 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b62, Zksed_sm4ks_cg_cp_sbox_b62_str) + 800076a0: 00013203 ld x4,0(x2) + 800076a4: 01b20c63 beq x4,x27,800076bc + 800076a8: 319032ef jal x5,8000b1c0 + 800076ac: 8000769c .word 0x8000769c + 800076b0: 00000000 .word 0x00000000 + 800076b4: 8001e440 .word 0x8001e440 + 800076b8: 00000000 .word 0x00000000 + 800076bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 63 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x3f3f3f3f3f3f3f3f + 800076c0: 00033383 ld x7,0(x6) + 800076c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x3f3f3f3f3f3f3f3f + 800076c8: 00033583 ld x11,0(x6) + 800076cc: 00830313 addi x6,x6,8 + +00000000800076d0 : +Zksed_sm4ks_cg_cp_sbox_b63: + sm4ks x20, x7, x11, 3 # perform operation + 800076d0: f4b38a33 sm4ks x20,x7,x11,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b63, Zksed_sm4ks_cg_cp_sbox_b63_str) + 800076d4: 00013203 ld x4,0(x2) + 800076d8: 01420c63 beq x4,x20,800076f0 + 800076dc: 2e5032ef jal x5,8000b1c0 + 800076e0: 800076d0 .word 0x800076d0 + 800076e4: 00000000 .word 0x00000000 + 800076e8: 8001e477 .word 0x8001e477 + 800076ec: 00000000 .word 0x00000000 + 800076f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 64 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x4040404040404040 + 800076f4: 00033a83 ld x21,0(x6) + 800076f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x4040404040404040 + 800076fc: 00033803 ld x16,0(x6) + 80007700: 00830313 addi x6,x6,8 + +0000000080007704 : +Zksed_sm4ks_cg_cp_sbox_b64: + sm4ks x9, x21, x16, 2 # perform operation + 80007704: b50a84b3 sm4ks x9,x21,x16,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b64, Zksed_sm4ks_cg_cp_sbox_b64_str) + 80007708: 00013203 ld x4,0(x2) + 8000770c: 00920c63 beq x4,x9,80007724 + 80007710: 2b1032ef jal x5,8000b1c0 + 80007714: 80007704 .word 0x80007704 + 80007718: 00000000 .word 0x00000000 + 8000771c: 8001e4ae .word 0x8001e4ae + 80007720: 00000000 .word 0x00000000 + 80007724: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 65 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x4141414141414141 + 80007728: 00033783 ld x15,0(x6) + 8000772c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x4141414141414141 + 80007730: 00033583 ld x11,0(x6) + 80007734: 00830313 addi x6,x6,8 + +0000000080007738 : +Zksed_sm4ks_cg_cp_sbox_b65: + sm4ks x17, x15, x11, 2 # perform operation + 80007738: b4b788b3 sm4ks x17,x15,x11,0x2 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b65, Zksed_sm4ks_cg_cp_sbox_b65_str) + 8000773c: 00013203 ld x4,0(x2) + 80007740: 01120c63 beq x4,x17,80007758 + 80007744: 27d032ef jal x5,8000b1c0 + 80007748: 80007738 .word 0x80007738 + 8000774c: 00000000 .word 0x00000000 + 80007750: 8001e4e5 .word 0x8001e4e5 + 80007754: 00000000 .word 0x00000000 + 80007758: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 66 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x4242424242424242 + 8000775c: 00033483 ld x9,0(x6) + 80007760: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x4242424242424242 + 80007764: 00033603 ld x12,0(x6) + 80007768: 00830313 addi x6,x6,8 + +000000008000776c : +Zksed_sm4ks_cg_cp_sbox_b66: + sm4ks x24, x9, x12, 3 # perform operation + 8000776c: f4c48c33 sm4ks x24,x9,x12,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b66, Zksed_sm4ks_cg_cp_sbox_b66_str) + 80007770: 00013203 ld x4,0(x2) + 80007774: 01820c63 beq x4,x24,8000778c + 80007778: 249032ef jal x5,8000b1c0 + 8000777c: 8000776c .word 0x8000776c + 80007780: 00000000 .word 0x00000000 + 80007784: 8001e51c .word 0x8001e51c + 80007788: 00000000 .word 0x00000000 + 8000778c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 67 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x4343434343434343 + 80007790: 00033e03 ld x28,0(x6) + 80007794: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x4343434343434343 + 80007798: 00033403 ld x8,0(x6) + 8000779c: 00830313 addi x6,x6,8 + +00000000800077a0 : +Zksed_sm4ks_cg_cp_sbox_b67: + sm4ks x16, x28, x8, 3 # perform operation + 800077a0: f48e0833 sm4ks x16,x28,x8,0x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b67, Zksed_sm4ks_cg_cp_sbox_b67_str) + 800077a4: 00013203 ld x4,0(x2) + 800077a8: 01020c63 beq x4,x16,800077c0 + 800077ac: 215032ef jal x5,8000b1c0 + 800077b0: 800077a0 .word 0x800077a0 + 800077b4: 00000000 .word 0x00000000 + 800077b8: 8001e553 .word 0x8001e553 + 800077bc: 00000000 .word 0x00000000 + 800077c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 68 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x4444444444444444 + 800077c4: 00033503 ld x10,0(x6) + 800077c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x4444444444444444 + 800077cc: 00033b83 ld x23,0(x6) + 800077d0: 00830313 addi x6,x6,8 + +00000000800077d4 : +Zksed_sm4ks_cg_cp_sbox_b68: + sm4ks x21, x10, x23, 3 # perform operation + 800077d4: f5750ab3 sm4ks x21,x10,x23,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b68, Zksed_sm4ks_cg_cp_sbox_b68_str) + 800077d8: 00013203 ld x4,0(x2) + 800077dc: 01520c63 beq x4,x21,800077f4 + 800077e0: 1e1032ef jal x5,8000b1c0 + 800077e4: 800077d4 .word 0x800077d4 + 800077e8: 00000000 .word 0x00000000 + 800077ec: 8001e58a .word 0x8001e58a + 800077f0: 00000000 .word 0x00000000 + 800077f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 69 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x4545454545454545 + 800077f8: 00033a03 ld x20,0(x6) + 800077fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x4545454545454545 + 80007800: 00033f03 ld x30,0(x6) + 80007804: 00830313 addi x6,x6,8 + +0000000080007808 : +Zksed_sm4ks_cg_cp_sbox_b69: + sm4ks x27, x20, x30, 1 # perform operation + 80007808: 75ea0db3 sm4ks x27,x20,x30,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b69, Zksed_sm4ks_cg_cp_sbox_b69_str) + 8000780c: 00013203 ld x4,0(x2) + 80007810: 01b20c63 beq x4,x27,80007828 + 80007814: 1ad032ef jal x5,8000b1c0 + 80007818: 80007808 .word 0x80007808 + 8000781c: 00000000 .word 0x00000000 + 80007820: 8001e5c1 .word 0x8001e5c1 + 80007824: 00000000 .word 0x00000000 + 80007828: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 70 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x4646464646464646 + 8000782c: 00033783 ld x15,0(x6) + 80007830: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x4646464646464646 + 80007834: 00033b03 ld x22,0(x6) + 80007838: 00830313 addi x6,x6,8 + +000000008000783c : +Zksed_sm4ks_cg_cp_sbox_b70: + sm4ks x3, x15, x22, 0 # perform operation + 8000783c: 356781b3 sm4ks x3,x15,x22,0x0 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b70, Zksed_sm4ks_cg_cp_sbox_b70_str) + 80007840: 00013203 ld x4,0(x2) + 80007844: 00320c63 beq x4,x3,8000785c + 80007848: 179032ef jal x5,8000b1c0 + 8000784c: 8000783c .word 0x8000783c + 80007850: 00000000 .word 0x00000000 + 80007854: 8001e5f8 .word 0x8001e5f8 + 80007858: 00000000 .word 0x00000000 + 8000785c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 71 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x4747474747474747 + 80007860: 00033a83 ld x21,0(x6) + 80007864: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0x4747474747474747 + 80007868: 00033c83 ld x25,0(x6) + 8000786c: 00830313 addi x6,x6,8 + +0000000080007870 : +Zksed_sm4ks_cg_cp_sbox_b71: + sm4ks x14, x21, x25, 0 # perform operation + 80007870: 359a8733 sm4ks x14,x21,x25,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b71, Zksed_sm4ks_cg_cp_sbox_b71_str) + 80007874: 00013203 ld x4,0(x2) + 80007878: 00e20c63 beq x4,x14,80007890 + 8000787c: 145032ef jal x5,8000b1c0 + 80007880: 80007870 .word 0x80007870 + 80007884: 00000000 .word 0x00000000 + 80007888: 8001e62f .word 0x8001e62f + 8000788c: 00000000 .word 0x00000000 + 80007890: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 72 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x4848484848484848 + 80007894: 00033803 ld x16,0(x6) + 80007898: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x4848484848484848 + 8000789c: 00033f83 ld x31,0(x6) + 800078a0: 00830313 addi x6,x6,8 + +00000000800078a4 : +Zksed_sm4ks_cg_cp_sbox_b72: + sm4ks x7, x16, x31, 0 # perform operation + 800078a4: 35f803b3 sm4ks x7,x16,x31,0x0 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b72, Zksed_sm4ks_cg_cp_sbox_b72_str) + 800078a8: 00013203 ld x4,0(x2) + 800078ac: 00720c63 beq x4,x7,800078c4 + 800078b0: 111032ef jal x5,8000b1c0 + 800078b4: 800078a4 .word 0x800078a4 + 800078b8: 00000000 .word 0x00000000 + 800078bc: 8001e666 .word 0x8001e666 + 800078c0: 00000000 .word 0x00000000 + 800078c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 73 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x4949494949494949 + 800078c8: 00033b83 ld x23,0(x6) + 800078cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x4949494949494949 + 800078d0: 00033d03 ld x26,0(x6) + 800078d4: 00830313 addi x6,x6,8 + +00000000800078d8 : +Zksed_sm4ks_cg_cp_sbox_b73: + sm4ks x29, x23, x26, 1 # perform operation + 800078d8: 75ab8eb3 sm4ks x29,x23,x26,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b73, Zksed_sm4ks_cg_cp_sbox_b73_str) + 800078dc: 00013203 ld x4,0(x2) + 800078e0: 01d20c63 beq x4,x29,800078f8 + 800078e4: 0dd032ef jal x5,8000b1c0 + 800078e8: 800078d8 .word 0x800078d8 + 800078ec: 00000000 .word 0x00000000 + 800078f0: 8001e69d .word 0x8001e69d + 800078f4: 00000000 .word 0x00000000 + 800078f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 74 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x4a4a4a4a4a4a4a4a + 800078fc: 00033883 ld x17,0(x6) + 80007900: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x4a4a4a4a4a4a4a4a + 80007904: 00033783 ld x15,0(x6) + 80007908: 00830313 addi x6,x6,8 + +000000008000790c : +Zksed_sm4ks_cg_cp_sbox_b74: + sm4ks x25, x17, x15, 0 # perform operation + 8000790c: 34f88cb3 sm4ks x25,x17,x15,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b74, Zksed_sm4ks_cg_cp_sbox_b74_str) + 80007910: 00013203 ld x4,0(x2) + 80007914: 01920c63 beq x4,x25,8000792c + 80007918: 0a9032ef jal x5,8000b1c0 + 8000791c: 8000790c .word 0x8000790c + 80007920: 00000000 .word 0x00000000 + 80007924: 8001e6d4 .word 0x8001e6d4 + 80007928: 00000000 .word 0x00000000 + 8000792c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 75 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x4b4b4b4b4b4b4b4b + 80007930: 00033c03 ld x24,0(x6) + 80007934: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x4b4b4b4b4b4b4b4b + 80007938: 00033903 ld x18,0(x6) + 8000793c: 00830313 addi x6,x6,8 + +0000000080007940 : +Zksed_sm4ks_cg_cp_sbox_b75: + sm4ks x8, x24, x18, 3 # perform operation + 80007940: f52c0433 sm4ks x8,x24,x18,0x3 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b75, Zksed_sm4ks_cg_cp_sbox_b75_str) + 80007944: 00013203 ld x4,0(x2) + 80007948: 00820c63 beq x4,x8,80007960 + 8000794c: 075032ef jal x5,8000b1c0 + 80007950: 80007940 .word 0x80007940 + 80007954: 00000000 .word 0x00000000 + 80007958: 8001e70b .word 0x8001e70b + 8000795c: 00000000 .word 0x00000000 + 80007960: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 76 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x4c4c4c4c4c4c4c4c + 80007964: 00033683 ld x13,0(x6) + 80007968: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x4c4c4c4c4c4c4c4c + 8000796c: 00033983 ld x19,0(x6) + 80007970: 00830313 addi x6,x6,8 + +0000000080007974 : +Zksed_sm4ks_cg_cp_sbox_b76: + sm4ks x11, x13, x19, 0 # perform operation + 80007974: 353685b3 sm4ks x11,x13,x19,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b76, Zksed_sm4ks_cg_cp_sbox_b76_str) + 80007978: 00013203 ld x4,0(x2) + 8000797c: 00b20c63 beq x4,x11,80007994 + 80007980: 041032ef jal x5,8000b1c0 + 80007984: 80007974 .word 0x80007974 + 80007988: 00000000 .word 0x00000000 + 8000798c: 8001e742 .word 0x8001e742 + 80007990: 00000000 .word 0x00000000 + 80007994: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 77 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x4d4d4d4d4d4d4d4d + 80007998: 00033683 ld x13,0(x6) + 8000799c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x4d4d4d4d4d4d4d4d + 800079a0: 00033a83 ld x21,0(x6) + 800079a4: 00830313 addi x6,x6,8 + +00000000800079a8 : +Zksed_sm4ks_cg_cp_sbox_b77: + sm4ks x9, x13, x21, 3 # perform operation + 800079a8: f55684b3 sm4ks x9,x13,x21,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b77, Zksed_sm4ks_cg_cp_sbox_b77_str) + 800079ac: 00013203 ld x4,0(x2) + 800079b0: 00920c63 beq x4,x9,800079c8 + 800079b4: 00d032ef jal x5,8000b1c0 + 800079b8: 800079a8 .word 0x800079a8 + 800079bc: 00000000 .word 0x00000000 + 800079c0: 8001e779 .word 0x8001e779 + 800079c4: 00000000 .word 0x00000000 + 800079c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 78 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x4e4e4e4e4e4e4e4e + 800079cc: 00033d03 ld x26,0(x6) + 800079d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x4e4e4e4e4e4e4e4e + 800079d4: 00033583 ld x11,0(x6) + 800079d8: 00830313 addi x6,x6,8 + +00000000800079dc : +Zksed_sm4ks_cg_cp_sbox_b78: + sm4ks x9, x26, x11, 0 # perform operation + 800079dc: 34bd04b3 sm4ks x9,x26,x11,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b78, Zksed_sm4ks_cg_cp_sbox_b78_str) + 800079e0: 00013203 ld x4,0(x2) + 800079e4: 00920c63 beq x4,x9,800079fc + 800079e8: 7d8032ef jal x5,8000b1c0 + 800079ec: 800079dc .word 0x800079dc + 800079f0: 00000000 .word 0x00000000 + 800079f4: 8001e7b0 .word 0x8001e7b0 + 800079f8: 00000000 .word 0x00000000 + 800079fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 79 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0x4f4f4f4f4f4f4f4f + 80007a00: 00033683 ld x13,0(x6) + 80007a04: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x4f4f4f4f4f4f4f4f + 80007a08: 00033903 ld x18,0(x6) + 80007a0c: 00830313 addi x6,x6,8 + +0000000080007a10 : +Zksed_sm4ks_cg_cp_sbox_b79: + sm4ks x24, x13, x18, 3 # perform operation + 80007a10: f5268c33 sm4ks x24,x13,x18,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b79, Zksed_sm4ks_cg_cp_sbox_b79_str) + 80007a14: 00013203 ld x4,0(x2) + 80007a18: 01820c63 beq x4,x24,80007a30 + 80007a1c: 7a4032ef jal x5,8000b1c0 + 80007a20: 80007a10 .word 0x80007a10 + 80007a24: 00000000 .word 0x00000000 + 80007a28: 8001e7e7 .word 0x8001e7e7 + 80007a2c: 00000000 .word 0x00000000 + 80007a30: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 80 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x5050505050505050 + 80007a34: 00033383 ld x7,0(x6) + 80007a38: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x5050505050505050 + 80007a3c: 00033e03 ld x28,0(x6) + 80007a40: 00830313 addi x6,x6,8 + +0000000080007a44 : +Zksed_sm4ks_cg_cp_sbox_b80: + sm4ks x8, x7, x28, 3 # perform operation + 80007a44: f5c38433 sm4ks x8,x7,x28,0x3 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b80, Zksed_sm4ks_cg_cp_sbox_b80_str) + 80007a48: 00013203 ld x4,0(x2) + 80007a4c: 00820c63 beq x4,x8,80007a64 + 80007a50: 770032ef jal x5,8000b1c0 + 80007a54: 80007a44 .word 0x80007a44 + 80007a58: 00000000 .word 0x00000000 + 80007a5c: 8001e81e .word 0x8001e81e + 80007a60: 00000000 .word 0x00000000 + 80007a64: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 81 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x5151515151515151 + 80007a68: 00033c03 ld x24,0(x6) + 80007a6c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x5151515151515151 + 80007a70: 00033503 ld x10,0(x6) + 80007a74: 00830313 addi x6,x6,8 + +0000000080007a78 : +Zksed_sm4ks_cg_cp_sbox_b81: + sm4ks x21, x24, x10, 1 # perform operation + 80007a78: 74ac0ab3 sm4ks x21,x24,x10,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b81, Zksed_sm4ks_cg_cp_sbox_b81_str) + 80007a7c: 00013203 ld x4,0(x2) + 80007a80: 01520c63 beq x4,x21,80007a98 + 80007a84: 73c032ef jal x5,8000b1c0 + 80007a88: 80007a78 .word 0x80007a78 + 80007a8c: 00000000 .word 0x00000000 + 80007a90: 8001e855 .word 0x8001e855 + 80007a94: 00000000 .word 0x00000000 + 80007a98: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 82 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x5252525252525252 + 80007a9c: 00033c03 ld x24,0(x6) + 80007aa0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x5252525252525252 + 80007aa4: 00033883 ld x17,0(x6) + 80007aa8: 00830313 addi x6,x6,8 + +0000000080007aac : +Zksed_sm4ks_cg_cp_sbox_b82: + sm4ks x29, x24, x17, 1 # perform operation + 80007aac: 751c0eb3 sm4ks x29,x24,x17,0x1 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b82, Zksed_sm4ks_cg_cp_sbox_b82_str) + 80007ab0: 00013203 ld x4,0(x2) + 80007ab4: 01d20c63 beq x4,x29,80007acc + 80007ab8: 708032ef jal x5,8000b1c0 + 80007abc: 80007aac .word 0x80007aac + 80007ac0: 00000000 .word 0x00000000 + 80007ac4: 8001e88c .word 0x8001e88c + 80007ac8: 00000000 .word 0x00000000 + 80007acc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 83 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x5353535353535353 + 80007ad0: 00033183 ld x3,0(x6) + 80007ad4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x5353535353535353 + 80007ad8: 00033883 ld x17,0(x6) + 80007adc: 00830313 addi x6,x6,8 + +0000000080007ae0 : +Zksed_sm4ks_cg_cp_sbox_b83: + sm4ks x18, x3, x17, 0 # perform operation + 80007ae0: 35118933 sm4ks x18,x3,x17,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b83, Zksed_sm4ks_cg_cp_sbox_b83_str) + 80007ae4: 00013203 ld x4,0(x2) + 80007ae8: 01220c63 beq x4,x18,80007b00 + 80007aec: 6d4032ef jal x5,8000b1c0 + 80007af0: 80007ae0 .word 0x80007ae0 + 80007af4: 00000000 .word 0x00000000 + 80007af8: 8001e8c3 .word 0x8001e8c3 + 80007afc: 00000000 .word 0x00000000 + 80007b00: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 84 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0x5454545454545454 + 80007b04: 00033383 ld x7,0(x6) + 80007b08: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0x5454545454545454 + 80007b0c: 00033903 ld x18,0(x6) + 80007b10: 00830313 addi x6,x6,8 + +0000000080007b14 : +Zksed_sm4ks_cg_cp_sbox_b84: + sm4ks x23, x7, x18, 2 # perform operation + 80007b14: b5238bb3 sm4ks x23,x7,x18,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b84, Zksed_sm4ks_cg_cp_sbox_b84_str) + 80007b18: 00013203 ld x4,0(x2) + 80007b1c: 01720c63 beq x4,x23,80007b34 + 80007b20: 6a0032ef jal x5,8000b1c0 + 80007b24: 80007b14 .word 0x80007b14 + 80007b28: 00000000 .word 0x00000000 + 80007b2c: 8001e8fa .word 0x8001e8fa + 80007b30: 00000000 .word 0x00000000 + 80007b34: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 85 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x5555555555555555 + 80007b38: 00033e03 ld x28,0(x6) + 80007b3c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5555555555555555 + 80007b40: 00033b03 ld x22,0(x6) + 80007b44: 00830313 addi x6,x6,8 + +0000000080007b48 : +Zksed_sm4ks_cg_cp_sbox_b85: + sm4ks x14, x28, x22, 0 # perform operation + 80007b48: 356e0733 sm4ks x14,x28,x22,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b85, Zksed_sm4ks_cg_cp_sbox_b85_str) + 80007b4c: 00013203 ld x4,0(x2) + 80007b50: 00e20c63 beq x4,x14,80007b68 + 80007b54: 66c032ef jal x5,8000b1c0 + 80007b58: 80007b48 .word 0x80007b48 + 80007b5c: 00000000 .word 0x00000000 + 80007b60: 8001e931 .word 0x8001e931 + 80007b64: 00000000 .word 0x00000000 + 80007b68: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 86 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x5656565656565656 + 80007b6c: 00033703 ld x14,0(x6) + 80007b70: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x5656565656565656 + 80007b74: 00033483 ld x9,0(x6) + 80007b78: 00830313 addi x6,x6,8 + +0000000080007b7c : +Zksed_sm4ks_cg_cp_sbox_b86: + sm4ks x8, x14, x9, 2 # perform operation + 80007b7c: b4970433 sm4ks x8,x14,x9,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b86, Zksed_sm4ks_cg_cp_sbox_b86_str) + 80007b80: 00013203 ld x4,0(x2) + 80007b84: 00820c63 beq x4,x8,80007b9c + 80007b88: 638032ef jal x5,8000b1c0 + 80007b8c: 80007b7c .word 0x80007b7c + 80007b90: 00000000 .word 0x00000000 + 80007b94: 8001e968 .word 0x8001e968 + 80007b98: 00000000 .word 0x00000000 + 80007b9c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 87 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x5757575757575757 + 80007ba0: 00033603 ld x12,0(x6) + 80007ba4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x5757575757575757 + 80007ba8: 00033a03 ld x20,0(x6) + 80007bac: 00830313 addi x6,x6,8 + +0000000080007bb0 : +Zksed_sm4ks_cg_cp_sbox_b87: + sm4ks x8, x12, x20, 2 # perform operation + 80007bb0: b5460433 sm4ks x8,x12,x20,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b87, Zksed_sm4ks_cg_cp_sbox_b87_str) + 80007bb4: 00013203 ld x4,0(x2) + 80007bb8: 00820c63 beq x4,x8,80007bd0 + 80007bbc: 604032ef jal x5,8000b1c0 + 80007bc0: 80007bb0 .word 0x80007bb0 + 80007bc4: 00000000 .word 0x00000000 + 80007bc8: 8001e99f .word 0x8001e99f + 80007bcc: 00000000 .word 0x00000000 + 80007bd0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 88 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x5858585858585858 + 80007bd4: 00033583 ld x11,0(x6) + 80007bd8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5858585858585858 + 80007bdc: 00033e83 ld x29,0(x6) + 80007be0: 00830313 addi x6,x6,8 + +0000000080007be4 : +Zksed_sm4ks_cg_cp_sbox_b88: + sm4ks x21, x11, x29, 2 # perform operation + 80007be4: b5d58ab3 sm4ks x21,x11,x29,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b88, Zksed_sm4ks_cg_cp_sbox_b88_str) + 80007be8: 00013203 ld x4,0(x2) + 80007bec: 01520c63 beq x4,x21,80007c04 + 80007bf0: 5d0032ef jal x5,8000b1c0 + 80007bf4: 80007be4 .word 0x80007be4 + 80007bf8: 00000000 .word 0x00000000 + 80007bfc: 8001e9d6 .word 0x8001e9d6 + 80007c00: 00000000 .word 0x00000000 + 80007c04: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 89 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5959595959595959 + 80007c08: 00033d83 ld x27,0(x6) + 80007c0c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x5959595959595959 + 80007c10: 00033f03 ld x30,0(x6) + 80007c14: 00830313 addi x6,x6,8 + +0000000080007c18 : +Zksed_sm4ks_cg_cp_sbox_b89: + sm4ks x1, x27, x30, 2 # perform operation + 80007c18: b5ed80b3 sm4ks x1,x27,x30,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b89, Zksed_sm4ks_cg_cp_sbox_b89_str) + 80007c1c: 00013203 ld x4,0(x2) + 80007c20: 00120c63 beq x4,x1,80007c38 + 80007c24: 59c032ef jal x5,8000b1c0 + 80007c28: 80007c18 .word 0x80007c18 + 80007c2c: 00000000 .word 0x00000000 + 80007c30: 8001ea0d .word 0x8001ea0d + 80007c34: 00000000 .word 0x00000000 + 80007c38: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 90 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0x5a5a5a5a5a5a5a5a + 80007c3c: 00033503 ld x10,0(x6) + 80007c40: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x5a5a5a5a5a5a5a5a + 80007c44: 00033b03 ld x22,0(x6) + 80007c48: 00830313 addi x6,x6,8 + +0000000080007c4c : +Zksed_sm4ks_cg_cp_sbox_b90: + sm4ks x1, x10, x22, 2 # perform operation + 80007c4c: b56500b3 sm4ks x1,x10,x22,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b90, Zksed_sm4ks_cg_cp_sbox_b90_str) + 80007c50: 00013203 ld x4,0(x2) + 80007c54: 00120c63 beq x4,x1,80007c6c + 80007c58: 568032ef jal x5,8000b1c0 + 80007c5c: 80007c4c .word 0x80007c4c + 80007c60: 00000000 .word 0x00000000 + 80007c64: 8001ea44 .word 0x8001ea44 + 80007c68: 00000000 .word 0x00000000 + 80007c6c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 91 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0x5b5b5b5b5b5b5b5b + 80007c70: 00033703 ld x14,0(x6) + 80007c74: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0x5b5b5b5b5b5b5b5b + 80007c78: 00033083 ld x1,0(x6) + 80007c7c: 00830313 addi x6,x6,8 + +0000000080007c80 : +Zksed_sm4ks_cg_cp_sbox_b91: + sm4ks x30, x14, x1, 0 # perform operation + 80007c80: 34170f33 sm4ks x30,x14,x1,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b91, Zksed_sm4ks_cg_cp_sbox_b91_str) + 80007c84: 00013203 ld x4,0(x2) + 80007c88: 01e20c63 beq x4,x30,80007ca0 + 80007c8c: 534032ef jal x5,8000b1c0 + 80007c90: 80007c80 .word 0x80007c80 + 80007c94: 00000000 .word 0x00000000 + 80007c98: 8001ea7b .word 0x8001ea7b + 80007c9c: 00000000 .word 0x00000000 + 80007ca0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 92 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x5c5c5c5c5c5c5c5c + 80007ca4: 00033583 ld x11,0(x6) + 80007ca8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x5c5c5c5c5c5c5c5c + 80007cac: 00033a03 ld x20,0(x6) + 80007cb0: 00830313 addi x6,x6,8 + +0000000080007cb4 : +Zksed_sm4ks_cg_cp_sbox_b92: + sm4ks x22, x11, x20, 3 # perform operation + 80007cb4: f5458b33 sm4ks x22,x11,x20,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b92, Zksed_sm4ks_cg_cp_sbox_b92_str) + 80007cb8: 00013203 ld x4,0(x2) + 80007cbc: 01620c63 beq x4,x22,80007cd4 + 80007cc0: 500032ef jal x5,8000b1c0 + 80007cc4: 80007cb4 .word 0x80007cb4 + 80007cc8: 00000000 .word 0x00000000 + 80007ccc: 8001eab2 .word 0x8001eab2 + 80007cd0: 00000000 .word 0x00000000 + 80007cd4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 93 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x5d5d5d5d5d5d5d5d + 80007cd8: 00033f83 ld x31,0(x6) + 80007cdc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x5d5d5d5d5d5d5d5d + 80007ce0: 00033183 ld x3,0(x6) + 80007ce4: 00830313 addi x6,x6,8 + +0000000080007ce8 : +Zksed_sm4ks_cg_cp_sbox_b93: + sm4ks x9, x31, x3, 1 # perform operation + 80007ce8: 743f84b3 sm4ks x9,x31,x3,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b93, Zksed_sm4ks_cg_cp_sbox_b93_str) + 80007cec: 00013203 ld x4,0(x2) + 80007cf0: 00920c63 beq x4,x9,80007d08 + 80007cf4: 4cc032ef jal x5,8000b1c0 + 80007cf8: 80007ce8 .word 0x80007ce8 + 80007cfc: 00000000 .word 0x00000000 + 80007d00: 8001eae9 .word 0x8001eae9 + 80007d04: 00000000 .word 0x00000000 + 80007d08: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 94 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x5e5e5e5e5e5e5e5e + 80007d0c: 00033d83 ld x27,0(x6) + 80007d10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0x5e5e5e5e5e5e5e5e + 80007d14: 00033e83 ld x29,0(x6) + 80007d18: 00830313 addi x6,x6,8 + +0000000080007d1c : +Zksed_sm4ks_cg_cp_sbox_b94: + sm4ks x22, x27, x29, 0 # perform operation + 80007d1c: 35dd8b33 sm4ks x22,x27,x29,0x0 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b94, Zksed_sm4ks_cg_cp_sbox_b94_str) + 80007d20: 00013203 ld x4,0(x2) + 80007d24: 01620c63 beq x4,x22,80007d3c + 80007d28: 498032ef jal x5,8000b1c0 + 80007d2c: 80007d1c .word 0x80007d1c + 80007d30: 00000000 .word 0x00000000 + 80007d34: 8001eb20 .word 0x8001eb20 + 80007d38: 00000000 .word 0x00000000 + 80007d3c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 95 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x5f5f5f5f5f5f5f5f + 80007d40: 00033e83 ld x29,0(x6) + 80007d44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0x5f5f5f5f5f5f5f5f + 80007d48: 00033983 ld x19,0(x6) + 80007d4c: 00830313 addi x6,x6,8 + +0000000080007d50 : +Zksed_sm4ks_cg_cp_sbox_b95: + sm4ks x14, x29, x19, 0 # perform operation + 80007d50: 353e8733 sm4ks x14,x29,x19,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b95, Zksed_sm4ks_cg_cp_sbox_b95_str) + 80007d54: 00013203 ld x4,0(x2) + 80007d58: 00e20c63 beq x4,x14,80007d70 + 80007d5c: 464032ef jal x5,8000b1c0 + 80007d60: 80007d50 .word 0x80007d50 + 80007d64: 00000000 .word 0x00000000 + 80007d68: 8001eb57 .word 0x8001eb57 + 80007d6c: 00000000 .word 0x00000000 + 80007d70: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 96 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x6060606060606060 + 80007d74: 00033783 ld x15,0(x6) + 80007d78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x6060606060606060 + 80007d7c: 00033603 ld x12,0(x6) + 80007d80: 00830313 addi x6,x6,8 + +0000000080007d84 : +Zksed_sm4ks_cg_cp_sbox_b96: + sm4ks x14, x15, x12, 0 # perform operation + 80007d84: 34c78733 sm4ks x14,x15,x12,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b96, Zksed_sm4ks_cg_cp_sbox_b96_str) + 80007d88: 00013203 ld x4,0(x2) + 80007d8c: 00e20c63 beq x4,x14,80007da4 + 80007d90: 430032ef jal x5,8000b1c0 + 80007d94: 80007d84 .word 0x80007d84 + 80007d98: 00000000 .word 0x00000000 + 80007d9c: 8001eb8e .word 0x8001eb8e + 80007da0: 00000000 .word 0x00000000 + 80007da4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 97 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x6161616161616161 + 80007da8: 00033903 ld x18,0(x6) + 80007dac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0x6161616161616161 + 80007db0: 00033a83 ld x21,0(x6) + 80007db4: 00830313 addi x6,x6,8 + +0000000080007db8 : +Zksed_sm4ks_cg_cp_sbox_b97: + sm4ks x23, x18, x21, 1 # perform operation + 80007db8: 75590bb3 sm4ks x23,x18,x21,0x1 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b97, Zksed_sm4ks_cg_cp_sbox_b97_str) + 80007dbc: 00013203 ld x4,0(x2) + 80007dc0: 01720c63 beq x4,x23,80007dd8 + 80007dc4: 3fc032ef jal x5,8000b1c0 + 80007dc8: 80007db8 .word 0x80007db8 + 80007dcc: 00000000 .word 0x00000000 + 80007dd0: 8001ebc5 .word 0x8001ebc5 + 80007dd4: 00000000 .word 0x00000000 + 80007dd8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 98 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x6262626262626262 + 80007ddc: 00033d03 ld x26,0(x6) + 80007de0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x6262626262626262 + 80007de4: 00033483 ld x9,0(x6) + 80007de8: 00830313 addi x6,x6,8 + +0000000080007dec : +Zksed_sm4ks_cg_cp_sbox_b98: + sm4ks x29, x26, x9, 2 # perform operation + 80007dec: b49d0eb3 sm4ks x29,x26,x9,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b98, Zksed_sm4ks_cg_cp_sbox_b98_str) + 80007df0: 00013203 ld x4,0(x2) + 80007df4: 01d20c63 beq x4,x29,80007e0c + 80007df8: 3c8032ef jal x5,8000b1c0 + 80007dfc: 80007dec .word 0x80007dec + 80007e00: 00000000 .word 0x00000000 + 80007e04: 8001ebfc .word 0x8001ebfc + 80007e08: 00000000 .word 0x00000000 + 80007e0c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 99 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x6363636363636363 + 80007e10: 00033c83 ld x25,0(x6) + 80007e14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x6363636363636363 + 80007e18: 00033c03 ld x24,0(x6) + 80007e1c: 00830313 addi x6,x6,8 + +0000000080007e20 : +Zksed_sm4ks_cg_cp_sbox_b99: + sm4ks x19, x25, x24, 3 # perform operation + 80007e20: f58c89b3 sm4ks x19,x25,x24,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b99, Zksed_sm4ks_cg_cp_sbox_b99_str) + 80007e24: 00013203 ld x4,0(x2) + 80007e28: 01320c63 beq x4,x19,80007e40 + 80007e2c: 394032ef jal x5,8000b1c0 + 80007e30: 80007e20 .word 0x80007e20 + 80007e34: 00000000 .word 0x00000000 + 80007e38: 8001ec33 .word 0x8001ec33 + 80007e3c: 00000000 .word 0x00000000 + 80007e40: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 100 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x6464646464646464 + 80007e44: 00033e83 ld x29,0(x6) + 80007e48: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x6464646464646464 + 80007e4c: 00033583 ld x11,0(x6) + 80007e50: 00830313 addi x6,x6,8 + +0000000080007e54 : +Zksed_sm4ks_cg_cp_sbox_b100: + sm4ks x24, x29, x11, 0 # perform operation + 80007e54: 34be8c33 sm4ks x24,x29,x11,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b100, Zksed_sm4ks_cg_cp_sbox_b100_str) + 80007e58: 00013203 ld x4,0(x2) + 80007e5c: 01820c63 beq x4,x24,80007e74 + 80007e60: 360032ef jal x5,8000b1c0 + 80007e64: 80007e54 .word 0x80007e54 + 80007e68: 00000000 .word 0x00000000 + 80007e6c: 8001ec6a .word 0x8001ec6a + 80007e70: 00000000 .word 0x00000000 + 80007e74: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 101 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x6565656565656565 + 80007e78: 00033b83 ld x23,0(x6) + 80007e7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x6565656565656565 + 80007e80: 00033583 ld x11,0(x6) + 80007e84: 00830313 addi x6,x6,8 + +0000000080007e88 : +Zksed_sm4ks_cg_cp_sbox_b101: + sm4ks x17, x23, x11, 1 # perform operation + 80007e88: 74bb88b3 sm4ks x17,x23,x11,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b101, Zksed_sm4ks_cg_cp_sbox_b101_str) + 80007e8c: 00013203 ld x4,0(x2) + 80007e90: 01120c63 beq x4,x17,80007ea8 + 80007e94: 32c032ef jal x5,8000b1c0 + 80007e98: 80007e88 .word 0x80007e88 + 80007e9c: 00000000 .word 0x00000000 + 80007ea0: 8001eca2 .word 0x8001eca2 + 80007ea4: 00000000 .word 0x00000000 + 80007ea8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 102 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x6666666666666666 + 80007eac: 00033483 ld x9,0(x6) + 80007eb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x6666666666666666 + 80007eb4: 00033383 ld x7,0(x6) + 80007eb8: 00830313 addi x6,x6,8 + +0000000080007ebc : +Zksed_sm4ks_cg_cp_sbox_b102: + sm4ks x13, x9, x7, 0 # perform operation + 80007ebc: 347486b3 sm4ks x13,x9,x7,0x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b102, Zksed_sm4ks_cg_cp_sbox_b102_str) + 80007ec0: 00013203 ld x4,0(x2) + 80007ec4: 00d20c63 beq x4,x13,80007edc + 80007ec8: 2f8032ef jal x5,8000b1c0 + 80007ecc: 80007ebc .word 0x80007ebc + 80007ed0: 00000000 .word 0x00000000 + 80007ed4: 8001ecda .word 0x8001ecda + 80007ed8: 00000000 .word 0x00000000 + 80007edc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 103 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6767676767676767 + 80007ee0: 00033e03 ld x28,0(x6) + 80007ee4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x6767676767676767 + 80007ee8: 00033f03 ld x30,0(x6) + 80007eec: 00830313 addi x6,x6,8 + +0000000080007ef0 : +Zksed_sm4ks_cg_cp_sbox_b103: + sm4ks x31, x28, x30, 1 # perform operation + 80007ef0: 75ee0fb3 sm4ks x31,x28,x30,0x1 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b103, Zksed_sm4ks_cg_cp_sbox_b103_str) + 80007ef4: 00013203 ld x4,0(x2) + 80007ef8: 01f20c63 beq x4,x31,80007f10 + 80007efc: 2c4032ef jal x5,8000b1c0 + 80007f00: 80007ef0 .word 0x80007ef0 + 80007f04: 00000000 .word 0x00000000 + 80007f08: 8001ed12 .word 0x8001ed12 + 80007f0c: 00000000 .word 0x00000000 + 80007f10: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 104 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x6868686868686868 + 80007f14: 00033d03 ld x26,0(x6) + 80007f18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x6868686868686868 + 80007f1c: 00033c03 ld x24,0(x6) + 80007f20: 00830313 addi x6,x6,8 + +0000000080007f24 : +Zksed_sm4ks_cg_cp_sbox_b104: + sm4ks x18, x26, x24, 2 # perform operation + 80007f24: b58d0933 sm4ks x18,x26,x24,0x2 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b104, Zksed_sm4ks_cg_cp_sbox_b104_str) + 80007f28: 00013203 ld x4,0(x2) + 80007f2c: 01220c63 beq x4,x18,80007f44 + 80007f30: 290032ef jal x5,8000b1c0 + 80007f34: 80007f24 .word 0x80007f24 + 80007f38: 00000000 .word 0x00000000 + 80007f3c: 8001ed4a .word 0x8001ed4a + 80007f40: 00000000 .word 0x00000000 + 80007f44: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 105 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x6969696969696969 + 80007f48: 00033c83 ld x25,0(x6) + 80007f4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x6969696969696969 + 80007f50: 00033383 ld x7,0(x6) + 80007f54: 00830313 addi x6,x6,8 + +0000000080007f58 : +Zksed_sm4ks_cg_cp_sbox_b105: + sm4ks x13, x25, x7, 0 # perform operation + 80007f58: 347c86b3 sm4ks x13,x25,x7,0x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b105, Zksed_sm4ks_cg_cp_sbox_b105_str) + 80007f5c: 00013203 ld x4,0(x2) + 80007f60: 00d20c63 beq x4,x13,80007f78 + 80007f64: 25c032ef jal x5,8000b1c0 + 80007f68: 80007f58 .word 0x80007f58 + 80007f6c: 00000000 .word 0x00000000 + 80007f70: 8001ed82 .word 0x8001ed82 + 80007f74: 00000000 .word 0x00000000 + 80007f78: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 106 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x6a6a6a6a6a6a6a6a + 80007f7c: 00033a03 ld x20,0(x6) + 80007f80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x6a6a6a6a6a6a6a6a + 80007f84: 00033503 ld x10,0(x6) + 80007f88: 00830313 addi x6,x6,8 + +0000000080007f8c : +Zksed_sm4ks_cg_cp_sbox_b106: + sm4ks x15, x20, x10, 2 # perform operation + 80007f8c: b4aa07b3 sm4ks x15,x20,x10,0x2 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b106, Zksed_sm4ks_cg_cp_sbox_b106_str) + 80007f90: 00013203 ld x4,0(x2) + 80007f94: 00f20c63 beq x4,x15,80007fac + 80007f98: 228032ef jal x5,8000b1c0 + 80007f9c: 80007f8c .word 0x80007f8c + 80007fa0: 00000000 .word 0x00000000 + 80007fa4: 8001edba .word 0x8001edba + 80007fa8: 00000000 .word 0x00000000 + 80007fac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 107 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x6b6b6b6b6b6b6b6b + 80007fb0: 00033f03 ld x30,0(x6) + 80007fb4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0x6b6b6b6b6b6b6b6b + 80007fb8: 00033783 ld x15,0(x6) + 80007fbc: 00830313 addi x6,x6,8 + +0000000080007fc0 : +Zksed_sm4ks_cg_cp_sbox_b107: + sm4ks x20, x30, x15, 3 # perform operation + 80007fc0: f4ff0a33 sm4ks x20,x30,x15,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b107, Zksed_sm4ks_cg_cp_sbox_b107_str) + 80007fc4: 00013203 ld x4,0(x2) + 80007fc8: 01420c63 beq x4,x20,80007fe0 + 80007fcc: 1f4032ef jal x5,8000b1c0 + 80007fd0: 80007fc0 .word 0x80007fc0 + 80007fd4: 00000000 .word 0x00000000 + 80007fd8: 8001edf2 .word 0x8001edf2 + 80007fdc: 00000000 .word 0x00000000 + 80007fe0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 108 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x6c6c6c6c6c6c6c6c + 80007fe4: 00033e03 ld x28,0(x6) + 80007fe8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x6c6c6c6c6c6c6c6c + 80007fec: 00033183 ld x3,0(x6) + 80007ff0: 00830313 addi x6,x6,8 + +0000000080007ff4 : +Zksed_sm4ks_cg_cp_sbox_b108: + sm4ks x31, x28, x3, 2 # perform operation + 80007ff4: b43e0fb3 sm4ks x31,x28,x3,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b108, Zksed_sm4ks_cg_cp_sbox_b108_str) + 80007ff8: 00013203 ld x4,0(x2) + 80007ffc: 01f20c63 beq x4,x31,80008014 + 80008000: 1c0032ef jal x5,8000b1c0 + 80008004: 80007ff4 .word 0x80007ff4 + 80008008: 00000000 .word 0x00000000 + 8000800c: 8001ee2a .word 0x8001ee2a + 80008010: 00000000 .word 0x00000000 + 80008014: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 109 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x6d6d6d6d6d6d6d6d + 80008018: 00033803 ld x16,0(x6) + 8000801c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x6d6d6d6d6d6d6d6d + 80008020: 00033683 ld x13,0(x6) + 80008024: 00830313 addi x6,x6,8 + +0000000080008028 : +Zksed_sm4ks_cg_cp_sbox_b109: + sm4ks x14, x16, x13, 2 # perform operation + 80008028: b4d80733 sm4ks x14,x16,x13,0x2 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b109, Zksed_sm4ks_cg_cp_sbox_b109_str) + 8000802c: 00013203 ld x4,0(x2) + 80008030: 00e20c63 beq x4,x14,80008048 + 80008034: 18c032ef jal x5,8000b1c0 + 80008038: 80008028 .word 0x80008028 + 8000803c: 00000000 .word 0x00000000 + 80008040: 8001ee62 .word 0x8001ee62 + 80008044: 00000000 .word 0x00000000 + 80008048: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 110 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x6e6e6e6e6e6e6e6e + 8000804c: 00033583 ld x11,0(x6) + 80008050: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x6e6e6e6e6e6e6e6e + 80008054: 00033503 ld x10,0(x6) + 80008058: 00830313 addi x6,x6,8 + +000000008000805c : +Zksed_sm4ks_cg_cp_sbox_b110: + sm4ks x21, x11, x10, 2 # perform operation + 8000805c: b4a58ab3 sm4ks x21,x11,x10,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b110, Zksed_sm4ks_cg_cp_sbox_b110_str) + 80008060: 00013203 ld x4,0(x2) + 80008064: 01520c63 beq x4,x21,8000807c + 80008068: 158032ef jal x5,8000b1c0 + 8000806c: 8000805c .word 0x8000805c + 80008070: 00000000 .word 0x00000000 + 80008074: 8001ee9a .word 0x8001ee9a + 80008078: 00000000 .word 0x00000000 + 8000807c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 111 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0x6f6f6f6f6f6f6f6f + 80008080: 00033d03 ld x26,0(x6) + 80008084: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x6f6f6f6f6f6f6f6f + 80008088: 00033b03 ld x22,0(x6) + 8000808c: 00830313 addi x6,x6,8 + +0000000080008090 : +Zksed_sm4ks_cg_cp_sbox_b111: + sm4ks x7, x26, x22, 0 # perform operation + 80008090: 356d03b3 sm4ks x7,x26,x22,0x0 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b111, Zksed_sm4ks_cg_cp_sbox_b111_str) + 80008094: 00013203 ld x4,0(x2) + 80008098: 00720c63 beq x4,x7,800080b0 + 8000809c: 124032ef jal x5,8000b1c0 + 800080a0: 80008090 .word 0x80008090 + 800080a4: 00000000 .word 0x00000000 + 800080a8: 8001eed2 .word 0x8001eed2 + 800080ac: 00000000 .word 0x00000000 + 800080b0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 112 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x7070707070707070 + 800080b4: 00033f83 ld x31,0(x6) + 800080b8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x7070707070707070 + 800080bc: 00033503 ld x10,0(x6) + 800080c0: 00830313 addi x6,x6,8 + +00000000800080c4 : +Zksed_sm4ks_cg_cp_sbox_b112: + sm4ks x24, x31, x10, 3 # perform operation + 800080c4: f4af8c33 sm4ks x24,x31,x10,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b112, Zksed_sm4ks_cg_cp_sbox_b112_str) + 800080c8: 00013203 ld x4,0(x2) + 800080cc: 01820c63 beq x4,x24,800080e4 + 800080d0: 0f0032ef jal x5,8000b1c0 + 800080d4: 800080c4 .word 0x800080c4 + 800080d8: 00000000 .word 0x00000000 + 800080dc: 8001ef0a .word 0x8001ef0a + 800080e0: 00000000 .word 0x00000000 + 800080e4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 113 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7171717171717171 + 800080e8: 00033a03 ld x20,0(x6) + 800080ec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7171717171717171 + 800080f0: 00033f03 ld x30,0(x6) + 800080f4: 00830313 addi x6,x6,8 + +00000000800080f8 : +Zksed_sm4ks_cg_cp_sbox_b113: + sm4ks x9, x20, x30, 0 # perform operation + 800080f8: 35ea04b3 sm4ks x9,x20,x30,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b113, Zksed_sm4ks_cg_cp_sbox_b113_str) + 800080fc: 00013203 ld x4,0(x2) + 80008100: 00920c63 beq x4,x9,80008118 + 80008104: 0bc032ef jal x5,8000b1c0 + 80008108: 800080f8 .word 0x800080f8 + 8000810c: 00000000 .word 0x00000000 + 80008110: 8001ef42 .word 0x8001ef42 + 80008114: 00000000 .word 0x00000000 + 80008118: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 114 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x7272727272727272 + 8000811c: 00033c03 ld x24,0(x6) + 80008120: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x7272727272727272 + 80008124: 00033603 ld x12,0(x6) + 80008128: 00830313 addi x6,x6,8 + +000000008000812c : +Zksed_sm4ks_cg_cp_sbox_b114: + sm4ks x31, x24, x12, 0 # perform operation + 8000812c: 34cc0fb3 sm4ks x31,x24,x12,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b114, Zksed_sm4ks_cg_cp_sbox_b114_str) + 80008130: 00013203 ld x4,0(x2) + 80008134: 01f20c63 beq x4,x31,8000814c + 80008138: 088032ef jal x5,8000b1c0 + 8000813c: 8000812c .word 0x8000812c + 80008140: 00000000 .word 0x00000000 + 80008144: 8001ef7a .word 0x8001ef7a + 80008148: 00000000 .word 0x00000000 + 8000814c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 115 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x7373737373737373 + 80008150: 00033083 ld x1,0(x6) + 80008154: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x7373737373737373 + 80008158: 00033183 ld x3,0(x6) + 8000815c: 00830313 addi x6,x6,8 + +0000000080008160 : +Zksed_sm4ks_cg_cp_sbox_b115: + sm4ks x12, x1, x3, 1 # perform operation + 80008160: 74308633 sm4ks x12,x1,x3,0x1 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b115, Zksed_sm4ks_cg_cp_sbox_b115_str) + 80008164: 00013203 ld x4,0(x2) + 80008168: 00c20c63 beq x4,x12,80008180 + 8000816c: 054032ef jal x5,8000b1c0 + 80008170: 80008160 .word 0x80008160 + 80008174: 00000000 .word 0x00000000 + 80008178: 8001efb2 .word 0x8001efb2 + 8000817c: 00000000 .word 0x00000000 + 80008180: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 116 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x7474747474747474 + 80008184: 00033583 ld x11,0(x6) + 80008188: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x7474747474747474 + 8000818c: 00033883 ld x17,0(x6) + 80008190: 00830313 addi x6,x6,8 + +0000000080008194 : +Zksed_sm4ks_cg_cp_sbox_b116: + sm4ks x23, x11, x17, 2 # perform operation + 80008194: b5158bb3 sm4ks x23,x11,x17,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b116, Zksed_sm4ks_cg_cp_sbox_b116_str) + 80008198: 00013203 ld x4,0(x2) + 8000819c: 01720c63 beq x4,x23,800081b4 + 800081a0: 020032ef jal x5,8000b1c0 + 800081a4: 80008194 .word 0x80008194 + 800081a8: 00000000 .word 0x00000000 + 800081ac: 8001efea .word 0x8001efea + 800081b0: 00000000 .word 0x00000000 + 800081b4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 117 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x7575757575757575 + 800081b8: 00033603 ld x12,0(x6) + 800081bc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0x7575757575757575 + 800081c0: 00033b83 ld x23,0(x6) + 800081c4: 00830313 addi x6,x6,8 + +00000000800081c8 : +Zksed_sm4ks_cg_cp_sbox_b117: + sm4ks x22, x12, x23, 1 # perform operation + 800081c8: 75760b33 sm4ks x22,x12,x23,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b117, Zksed_sm4ks_cg_cp_sbox_b117_str) + 800081cc: 00013203 ld x4,0(x2) + 800081d0: 01620c63 beq x4,x22,800081e8 + 800081d4: 7ed022ef jal x5,8000b1c0 + 800081d8: 800081c8 .word 0x800081c8 + 800081dc: 00000000 .word 0x00000000 + 800081e0: 8001f022 .word 0x8001f022 + 800081e4: 00000000 .word 0x00000000 + 800081e8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 118 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x7676767676767676 + 800081ec: 00033483 ld x9,0(x6) + 800081f0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7676767676767676 + 800081f4: 00033403 ld x8,0(x6) + 800081f8: 00830313 addi x6,x6,8 + +00000000800081fc : +Zksed_sm4ks_cg_cp_sbox_b118: + sm4ks x29, x9, x8, 2 # perform operation + 800081fc: b4848eb3 sm4ks x29,x9,x8,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b118, Zksed_sm4ks_cg_cp_sbox_b118_str) + 80008200: 00013203 ld x4,0(x2) + 80008204: 01d20c63 beq x4,x29,8000821c + 80008208: 7b9022ef jal x5,8000b1c0 + 8000820c: 800081fc .word 0x800081fc + 80008210: 00000000 .word 0x00000000 + 80008214: 8001f05a .word 0x8001f05a + 80008218: 00000000 .word 0x00000000 + 8000821c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 119 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7777777777777777 + 80008220: 00033c83 ld x25,0(x6) + 80008224: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x7777777777777777 + 80008228: 00033483 ld x9,0(x6) + 8000822c: 00830313 addi x6,x6,8 + +0000000080008230 : +Zksed_sm4ks_cg_cp_sbox_b119: + sm4ks x8, x25, x9, 0 # perform operation + 80008230: 349c8433 sm4ks x8,x25,x9,0x0 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b119, Zksed_sm4ks_cg_cp_sbox_b119_str) + 80008234: 00013203 ld x4,0(x2) + 80008238: 00820c63 beq x4,x8,80008250 + 8000823c: 785022ef jal x5,8000b1c0 + 80008240: 80008230 .word 0x80008230 + 80008244: 00000000 .word 0x00000000 + 80008248: 8001f092 .word 0x8001f092 + 8000824c: 00000000 .word 0x00000000 + 80008250: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 120 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x7878787878787878 + 80008254: 00033a03 ld x20,0(x6) + 80008258: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs2: x16 = 0x7878787878787878 + 8000825c: 00033803 ld x16,0(x6) + 80008260: 00830313 addi x6,x6,8 + +0000000080008264 : +Zksed_sm4ks_cg_cp_sbox_b120: + sm4ks x10, x20, x16, 1 # perform operation + 80008264: 750a0533 sm4ks x10,x20,x16,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b120, Zksed_sm4ks_cg_cp_sbox_b120_str) + 80008268: 00013203 ld x4,0(x2) + 8000826c: 00a20c63 beq x4,x10,80008284 + 80008270: 751022ef jal x5,8000b1c0 + 80008274: 80008264 .word 0x80008264 + 80008278: 00000000 .word 0x00000000 + 8000827c: 8001f0ca .word 0x8001f0ca + 80008280: 00000000 .word 0x00000000 + 80008284: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 121 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x7979797979797979 + 80008288: 00033783 ld x15,0(x6) + 8000828c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x7979797979797979 + 80008290: 00033e03 ld x28,0(x6) + 80008294: 00830313 addi x6,x6,8 + +0000000080008298 : +Zksed_sm4ks_cg_cp_sbox_b121: + sm4ks x22, x15, x28, 0 # perform operation + 80008298: 35c78b33 sm4ks x22,x15,x28,0x0 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b121, Zksed_sm4ks_cg_cp_sbox_b121_str) + 8000829c: 00013203 ld x4,0(x2) + 800082a0: 01620c63 beq x4,x22,800082b8 + 800082a4: 71d022ef jal x5,8000b1c0 + 800082a8: 80008298 .word 0x80008298 + 800082ac: 00000000 .word 0x00000000 + 800082b0: 8001f102 .word 0x8001f102 + 800082b4: 00000000 .word 0x00000000 + 800082b8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 122 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x7a7a7a7a7a7a7a7a + 800082bc: 00033b03 ld x22,0(x6) + 800082c0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x7a7a7a7a7a7a7a7a + 800082c4: 00033e03 ld x28,0(x6) + 800082c8: 00830313 addi x6,x6,8 + +00000000800082cc : +Zksed_sm4ks_cg_cp_sbox_b122: + sm4ks x13, x22, x28, 2 # perform operation + 800082cc: b5cb06b3 sm4ks x13,x22,x28,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b122, Zksed_sm4ks_cg_cp_sbox_b122_str) + 800082d0: 00013203 ld x4,0(x2) + 800082d4: 00d20c63 beq x4,x13,800082ec + 800082d8: 6e9022ef jal x5,8000b1c0 + 800082dc: 800082cc .word 0x800082cc + 800082e0: 00000000 .word 0x00000000 + 800082e4: 8001f13a .word 0x8001f13a + 800082e8: 00000000 .word 0x00000000 + 800082ec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 123 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x7b7b7b7b7b7b7b7b + 800082f0: 00033c83 ld x25,0(x6) + 800082f4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7b7b7b7b7b7b7b7b + 800082f8: 00033f03 ld x30,0(x6) + 800082fc: 00830313 addi x6,x6,8 + +0000000080008300 : +Zksed_sm4ks_cg_cp_sbox_b123: + sm4ks x28, x25, x30, 3 # perform operation + 80008300: f5ec8e33 sm4ks x28,x25,x30,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b123, Zksed_sm4ks_cg_cp_sbox_b123_str) + 80008304: 00013203 ld x4,0(x2) + 80008308: 01c20c63 beq x4,x28,80008320 + 8000830c: 6b5022ef jal x5,8000b1c0 + 80008310: 80008300 .word 0x80008300 + 80008314: 00000000 .word 0x00000000 + 80008318: 8001f172 .word 0x8001f172 + 8000831c: 00000000 .word 0x00000000 + 80008320: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 124 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x7c7c7c7c7c7c7c7c + 80008324: 00033f03 ld x30,0(x6) + 80008328: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x7c7c7c7c7c7c7c7c + 8000832c: 00033c03 ld x24,0(x6) + 80008330: 00830313 addi x6,x6,8 + +0000000080008334 : +Zksed_sm4ks_cg_cp_sbox_b124: + sm4ks x12, x30, x24, 0 # perform operation + 80008334: 358f0633 sm4ks x12,x30,x24,0x0 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b124, Zksed_sm4ks_cg_cp_sbox_b124_str) + 80008338: 00013203 ld x4,0(x2) + 8000833c: 00c20c63 beq x4,x12,80008354 + 80008340: 681022ef jal x5,8000b1c0 + 80008344: 80008334 .word 0x80008334 + 80008348: 00000000 .word 0x00000000 + 8000834c: 8001f1aa .word 0x8001f1aa + 80008350: 00000000 .word 0x00000000 + 80008354: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 125 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7d7d7d7d7d7d7d7d + 80008358: 00033a83 ld x21,0(x6) + 8000835c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0x7d7d7d7d7d7d7d7d + 80008360: 00033383 ld x7,0(x6) + 80008364: 00830313 addi x6,x6,8 + +0000000080008368 : +Zksed_sm4ks_cg_cp_sbox_b125: + sm4ks x19, x21, x7, 2 # perform operation + 80008368: b47a89b3 sm4ks x19,x21,x7,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b125, Zksed_sm4ks_cg_cp_sbox_b125_str) + 8000836c: 00013203 ld x4,0(x2) + 80008370: 01320c63 beq x4,x19,80008388 + 80008374: 64d022ef jal x5,8000b1c0 + 80008378: 80008368 .word 0x80008368 + 8000837c: 00000000 .word 0x00000000 + 80008380: 8001f1e2 .word 0x8001f1e2 + 80008384: 00000000 .word 0x00000000 + 80008388: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 126 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x7e7e7e7e7e7e7e7e + 8000838c: 00033a83 ld x21,0(x6) + 80008390: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x7e7e7e7e7e7e7e7e + 80008394: 00033f03 ld x30,0(x6) + 80008398: 00830313 addi x6,x6,8 + +000000008000839c : +Zksed_sm4ks_cg_cp_sbox_b126: + sm4ks x18, x21, x30, 3 # perform operation + 8000839c: f5ea8933 sm4ks x18,x21,x30,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b126, Zksed_sm4ks_cg_cp_sbox_b126_str) + 800083a0: 00013203 ld x4,0(x2) + 800083a4: 01220c63 beq x4,x18,800083bc + 800083a8: 619022ef jal x5,8000b1c0 + 800083ac: 8000839c .word 0x8000839c + 800083b0: 00000000 .word 0x00000000 + 800083b4: 8001f21a .word 0x8001f21a + 800083b8: 00000000 .word 0x00000000 + 800083bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 127 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x7f7f7f7f7f7f7f7f + 800083c0: 00033783 ld x15,0(x6) + 800083c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x7f7f7f7f7f7f7f7f + 800083c8: 00033403 ld x8,0(x6) + 800083cc: 00830313 addi x6,x6,8 + +00000000800083d0 : +Zksed_sm4ks_cg_cp_sbox_b127: + sm4ks x31, x15, x8, 2 # perform operation + 800083d0: b4878fb3 sm4ks x31,x15,x8,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b127, Zksed_sm4ks_cg_cp_sbox_b127_str) + 800083d4: 00013203 ld x4,0(x2) + 800083d8: 01f20c63 beq x4,x31,800083f0 + 800083dc: 5e5022ef jal x5,8000b1c0 + 800083e0: 800083d0 .word 0x800083d0 + 800083e4: 00000000 .word 0x00000000 + 800083e8: 8001f252 .word 0x8001f252 + 800083ec: 00000000 .word 0x00000000 + 800083f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 128 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8080808080808080 + 800083f4: 00033183 ld x3,0(x6) + 800083f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x8080808080808080 + 800083fc: 00033483 ld x9,0(x6) + 80008400: 00830313 addi x6,x6,8 + +0000000080008404 : +Zksed_sm4ks_cg_cp_sbox_b128: + sm4ks x22, x3, x9, 1 # perform operation + 80008404: 74918b33 sm4ks x22,x3,x9,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b128, Zksed_sm4ks_cg_cp_sbox_b128_str) + 80008408: 00013203 ld x4,0(x2) + 8000840c: 01620c63 beq x4,x22,80008424 + 80008410: 5b1022ef jal x5,8000b1c0 + 80008414: 80008404 .word 0x80008404 + 80008418: 00000000 .word 0x00000000 + 8000841c: 8001f28a .word 0x8001f28a + 80008420: 00000000 .word 0x00000000 + 80008424: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 129 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x8181818181818181 + 80008428: 00033483 ld x9,0(x6) + 8000842c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x8181818181818181 + 80008430: 00033d03 ld x26,0(x6) + 80008434: 00830313 addi x6,x6,8 + +0000000080008438 : +Zksed_sm4ks_cg_cp_sbox_b129: + sm4ks x17, x9, x26, 0 # perform operation + 80008438: 35a488b3 sm4ks x17,x9,x26,0x0 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b129, Zksed_sm4ks_cg_cp_sbox_b129_str) + 8000843c: 00013203 ld x4,0(x2) + 80008440: 01120c63 beq x4,x17,80008458 + 80008444: 57d022ef jal x5,8000b1c0 + 80008448: 80008438 .word 0x80008438 + 8000844c: 00000000 .word 0x00000000 + 80008450: 8001f2c2 .word 0x8001f2c2 + 80008454: 00000000 .word 0x00000000 + 80008458: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 130 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0x8282828282828282 + 8000845c: 00033783 ld x15,0(x6) + 80008460: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8282828282828282 + 80008464: 00033e03 ld x28,0(x6) + 80008468: 00830313 addi x6,x6,8 + +000000008000846c : +Zksed_sm4ks_cg_cp_sbox_b130: + sm4ks x13, x15, x28, 1 # perform operation + 8000846c: 75c786b3 sm4ks x13,x15,x28,0x1 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b130, Zksed_sm4ks_cg_cp_sbox_b130_str) + 80008470: 00013203 ld x4,0(x2) + 80008474: 00d20c63 beq x4,x13,8000848c + 80008478: 549022ef jal x5,8000b1c0 + 8000847c: 8000846c .word 0x8000846c + 80008480: 00000000 .word 0x00000000 + 80008484: 8001f2fa .word 0x8001f2fa + 80008488: 00000000 .word 0x00000000 + 8000848c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 131 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0x8383838383838383 + 80008490: 00033403 ld x8,0(x6) + 80008494: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0x8383838383838383 + 80008498: 00033f83 ld x31,0(x6) + 8000849c: 00830313 addi x6,x6,8 + +00000000800084a0 : +Zksed_sm4ks_cg_cp_sbox_b131: + sm4ks x3, x8, x31, 2 # perform operation + 800084a0: b5f401b3 sm4ks x3,x8,x31,0x2 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b131, Zksed_sm4ks_cg_cp_sbox_b131_str) + 800084a4: 00013203 ld x4,0(x2) + 800084a8: 00320c63 beq x4,x3,800084c0 + 800084ac: 515022ef jal x5,8000b1c0 + 800084b0: 800084a0 .word 0x800084a0 + 800084b4: 00000000 .word 0x00000000 + 800084b8: 8001f332 .word 0x8001f332 + 800084bc: 00000000 .word 0x00000000 + 800084c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 132 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x8484848484848484 + 800084c4: 00033983 ld x19,0(x6) + 800084c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0x8484848484848484 + 800084cc: 00033e03 ld x28,0(x6) + 800084d0: 00830313 addi x6,x6,8 + +00000000800084d4 : +Zksed_sm4ks_cg_cp_sbox_b132: + sm4ks x31, x19, x28, 2 # perform operation + 800084d4: b5c98fb3 sm4ks x31,x19,x28,0x2 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b132, Zksed_sm4ks_cg_cp_sbox_b132_str) + 800084d8: 00013203 ld x4,0(x2) + 800084dc: 01f20c63 beq x4,x31,800084f4 + 800084e0: 4e1022ef jal x5,8000b1c0 + 800084e4: 800084d4 .word 0x800084d4 + 800084e8: 00000000 .word 0x00000000 + 800084ec: 8001f36a .word 0x8001f36a + 800084f0: 00000000 .word 0x00000000 + 800084f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 133 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x8585858585858585 + 800084f8: 00033c03 ld x24,0(x6) + 800084fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0x8585858585858585 + 80008500: 00033683 ld x13,0(x6) + 80008504: 00830313 addi x6,x6,8 + +0000000080008508 : +Zksed_sm4ks_cg_cp_sbox_b133: + sm4ks x18, x24, x13, 3 # perform operation + 80008508: f4dc0933 sm4ks x18,x24,x13,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b133, Zksed_sm4ks_cg_cp_sbox_b133_str) + 8000850c: 00013203 ld x4,0(x2) + 80008510: 01220c63 beq x4,x18,80008528 + 80008514: 4ad022ef jal x5,8000b1c0 + 80008518: 80008508 .word 0x80008508 + 8000851c: 00000000 .word 0x00000000 + 80008520: 8001f3a2 .word 0x8001f3a2 + 80008524: 00000000 .word 0x00000000 + 80008528: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 134 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8686868686868686 + 8000852c: 00033a83 ld x21,0(x6) + 80008530: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x8686868686868686 + 80008534: 00033a03 ld x20,0(x6) + 80008538: 00830313 addi x6,x6,8 + +000000008000853c : +Zksed_sm4ks_cg_cp_sbox_b134: + sm4ks x1, x21, x20, 1 # perform operation + 8000853c: 754a80b3 sm4ks x1,x21,x20,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b134, Zksed_sm4ks_cg_cp_sbox_b134_str) + 80008540: 00013203 ld x4,0(x2) + 80008544: 00120c63 beq x4,x1,8000855c + 80008548: 479022ef jal x5,8000b1c0 + 8000854c: 8000853c .word 0x8000853c + 80008550: 00000000 .word 0x00000000 + 80008554: 8001f3da .word 0x8001f3da + 80008558: 00000000 .word 0x00000000 + 8000855c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 135 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0x8787878787878787 + 80008560: 00033c03 ld x24,0(x6) + 80008564: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8787878787878787 + 80008568: 00033603 ld x12,0(x6) + 8000856c: 00830313 addi x6,x6,8 + +0000000080008570 : +Zksed_sm4ks_cg_cp_sbox_b135: + sm4ks x22, x24, x12, 0 # perform operation + 80008570: 34cc0b33 sm4ks x22,x24,x12,0x0 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b135, Zksed_sm4ks_cg_cp_sbox_b135_str) + 80008574: 00013203 ld x4,0(x2) + 80008578: 01620c63 beq x4,x22,80008590 + 8000857c: 445022ef jal x5,8000b1c0 + 80008580: 80008570 .word 0x80008570 + 80008584: 00000000 .word 0x00000000 + 80008588: 8001f412 .word 0x8001f412 + 8000858c: 00000000 .word 0x00000000 + 80008590: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 136 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8888888888888888 + 80008594: 00033f83 ld x31,0(x6) + 80008598: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0x8888888888888888 + 8000859c: 00033503 ld x10,0(x6) + 800085a0: 00830313 addi x6,x6,8 + +00000000800085a4 : +Zksed_sm4ks_cg_cp_sbox_b136: + sm4ks x21, x31, x10, 1 # perform operation + 800085a4: 74af8ab3 sm4ks x21,x31,x10,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b136, Zksed_sm4ks_cg_cp_sbox_b136_str) + 800085a8: 00013203 ld x4,0(x2) + 800085ac: 01520c63 beq x4,x21,800085c4 + 800085b0: 411022ef jal x5,8000b1c0 + 800085b4: 800085a4 .word 0x800085a4 + 800085b8: 00000000 .word 0x00000000 + 800085bc: 8001f44a .word 0x8001f44a + 800085c0: 00000000 .word 0x00000000 + 800085c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 137 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x8989898989898989 + 800085c8: 00033a83 ld x21,0(x6) + 800085cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x8989898989898989 + 800085d0: 00033b03 ld x22,0(x6) + 800085d4: 00830313 addi x6,x6,8 + +00000000800085d8 : +Zksed_sm4ks_cg_cp_sbox_b137: + sm4ks x11, x21, x22, 3 # perform operation + 800085d8: f56a85b3 sm4ks x11,x21,x22,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b137, Zksed_sm4ks_cg_cp_sbox_b137_str) + 800085dc: 00013203 ld x4,0(x2) + 800085e0: 00b20c63 beq x4,x11,800085f8 + 800085e4: 3dd022ef jal x5,8000b1c0 + 800085e8: 800085d8 .word 0x800085d8 + 800085ec: 00000000 .word 0x00000000 + 800085f0: 8001f482 .word 0x8001f482 + 800085f4: 00000000 .word 0x00000000 + 800085f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 138 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x8a8a8a8a8a8a8a8a + 800085fc: 00033d83 ld x27,0(x6) + 80008600: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0x8a8a8a8a8a8a8a8a + 80008604: 00033883 ld x17,0(x6) + 80008608: 00830313 addi x6,x6,8 + +000000008000860c : +Zksed_sm4ks_cg_cp_sbox_b138: + sm4ks x19, x27, x17, 0 # perform operation + 8000860c: 351d89b3 sm4ks x19,x27,x17,0x0 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b138, Zksed_sm4ks_cg_cp_sbox_b138_str) + 80008610: 00013203 ld x4,0(x2) + 80008614: 01320c63 beq x4,x19,8000862c + 80008618: 3a9022ef jal x5,8000b1c0 + 8000861c: 8000860c .word 0x8000860c + 80008620: 00000000 .word 0x00000000 + 80008624: 8001f4ba .word 0x8001f4ba + 80008628: 00000000 .word 0x00000000 + 8000862c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 139 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x8b8b8b8b8b8b8b8b + 80008630: 00033083 ld x1,0(x6) + 80008634: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0x8b8b8b8b8b8b8b8b + 80008638: 00033403 ld x8,0(x6) + 8000863c: 00830313 addi x6,x6,8 + +0000000080008640 : +Zksed_sm4ks_cg_cp_sbox_b139: + sm4ks x27, x1, x8, 1 # perform operation + 80008640: 74808db3 sm4ks x27,x1,x8,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b139, Zksed_sm4ks_cg_cp_sbox_b139_str) + 80008644: 00013203 ld x4,0(x2) + 80008648: 01b20c63 beq x4,x27,80008660 + 8000864c: 375022ef jal x5,8000b1c0 + 80008650: 80008640 .word 0x80008640 + 80008654: 00000000 .word 0x00000000 + 80008658: 8001f4f2 .word 0x8001f4f2 + 8000865c: 00000000 .word 0x00000000 + 80008660: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 140 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x8c8c8c8c8c8c8c8c + 80008664: 00033183 ld x3,0(x6) + 80008668: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x8c8c8c8c8c8c8c8c + 8000866c: 00033603 ld x12,0(x6) + 80008670: 00830313 addi x6,x6,8 + +0000000080008674 : +Zksed_sm4ks_cg_cp_sbox_b140: + sm4ks x11, x3, x12, 2 # perform operation + 80008674: b4c185b3 sm4ks x11,x3,x12,0x2 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b140, Zksed_sm4ks_cg_cp_sbox_b140_str) + 80008678: 00013203 ld x4,0(x2) + 8000867c: 00b20c63 beq x4,x11,80008694 + 80008680: 341022ef jal x5,8000b1c0 + 80008684: 80008674 .word 0x80008674 + 80008688: 00000000 .word 0x00000000 + 8000868c: 8001f52a .word 0x8001f52a + 80008690: 00000000 .word 0x00000000 + 80008694: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 141 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x8d8d8d8d8d8d8d8d + 80008698: 00033803 ld x16,0(x6) + 8000869c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x8d8d8d8d8d8d8d8d + 800086a0: 00033483 ld x9,0(x6) + 800086a4: 00830313 addi x6,x6,8 + +00000000800086a8 : +Zksed_sm4ks_cg_cp_sbox_b141: + sm4ks x25, x16, x9, 2 # perform operation + 800086a8: b4980cb3 sm4ks x25,x16,x9,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b141, Zksed_sm4ks_cg_cp_sbox_b141_str) + 800086ac: 00013203 ld x4,0(x2) + 800086b0: 01920c63 beq x4,x25,800086c8 + 800086b4: 30d022ef jal x5,8000b1c0 + 800086b8: 800086a8 .word 0x800086a8 + 800086bc: 00000000 .word 0x00000000 + 800086c0: 8001f562 .word 0x8001f562 + 800086c4: 00000000 .word 0x00000000 + 800086c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 142 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x8e8e8e8e8e8e8e8e + 800086cc: 00033f83 ld x31,0(x6) + 800086d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x8e8e8e8e8e8e8e8e + 800086d4: 00033703 ld x14,0(x6) + 800086d8: 00830313 addi x6,x6,8 + +00000000800086dc : +Zksed_sm4ks_cg_cp_sbox_b142: + sm4ks x28, x31, x14, 2 # perform operation + 800086dc: b4ef8e33 sm4ks x28,x31,x14,0x2 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b142, Zksed_sm4ks_cg_cp_sbox_b142_str) + 800086e0: 00013203 ld x4,0(x2) + 800086e4: 01c20c63 beq x4,x28,800086fc + 800086e8: 2d9022ef jal x5,8000b1c0 + 800086ec: 800086dc .word 0x800086dc + 800086f0: 00000000 .word 0x00000000 + 800086f4: 8001f59a .word 0x8001f59a + 800086f8: 00000000 .word 0x00000000 + 800086fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 143 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0x8f8f8f8f8f8f8f8f + 80008700: 00033583 ld x11,0(x6) + 80008704: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0x8f8f8f8f8f8f8f8f + 80008708: 00033b03 ld x22,0(x6) + 8000870c: 00830313 addi x6,x6,8 + +0000000080008710 : +Zksed_sm4ks_cg_cp_sbox_b143: + sm4ks x14, x11, x22, 3 # perform operation + 80008710: f5658733 sm4ks x14,x11,x22,0x3 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b143, Zksed_sm4ks_cg_cp_sbox_b143_str) + 80008714: 00013203 ld x4,0(x2) + 80008718: 00e20c63 beq x4,x14,80008730 + 8000871c: 2a5022ef jal x5,8000b1c0 + 80008720: 80008710 .word 0x80008710 + 80008724: 00000000 .word 0x00000000 + 80008728: 8001f5d2 .word 0x8001f5d2 + 8000872c: 00000000 .word 0x00000000 + 80008730: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 144 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x9090909090909090 + 80008734: 00033f83 ld x31,0(x6) + 80008738: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0x9090909090909090 + 8000873c: 00033d03 ld x26,0(x6) + 80008740: 00830313 addi x6,x6,8 + +0000000080008744 : +Zksed_sm4ks_cg_cp_sbox_b144: + sm4ks x21, x31, x26, 3 # perform operation + 80008744: f5af8ab3 sm4ks x21,x31,x26,0x3 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b144, Zksed_sm4ks_cg_cp_sbox_b144_str) + 80008748: 00013203 ld x4,0(x2) + 8000874c: 01520c63 beq x4,x21,80008764 + 80008750: 271022ef jal x5,8000b1c0 + 80008754: 80008744 .word 0x80008744 + 80008758: 00000000 .word 0x00000000 + 8000875c: 8001f60a .word 0x8001f60a + 80008760: 00000000 .word 0x00000000 + 80008764: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 145 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x9191919191919191 + 80008768: 00033f03 ld x30,0(x6) + 8000876c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x9191919191919191 + 80008770: 00033603 ld x12,0(x6) + 80008774: 00830313 addi x6,x6,8 + +0000000080008778 : +Zksed_sm4ks_cg_cp_sbox_b145: + sm4ks x18, x30, x12, 0 # perform operation + 80008778: 34cf0933 sm4ks x18,x30,x12,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b145, Zksed_sm4ks_cg_cp_sbox_b145_str) + 8000877c: 00013203 ld x4,0(x2) + 80008780: 01220c63 beq x4,x18,80008798 + 80008784: 23d022ef jal x5,8000b1c0 + 80008788: 80008778 .word 0x80008778 + 8000878c: 00000000 .word 0x00000000 + 80008790: 8001f642 .word 0x8001f642 + 80008794: 00000000 .word 0x00000000 + 80008798: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 146 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs1: x23 = 0x9292929292929292 + 8000879c: 00033b83 ld x23,0(x6) + 800087a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x9292929292929292 + 800087a4: 00033183 ld x3,0(x6) + 800087a8: 00830313 addi x6,x6,8 + +00000000800087ac : +Zksed_sm4ks_cg_cp_sbox_b146: + sm4ks x8, x23, x3, 2 # perform operation + 800087ac: b43b8433 sm4ks x8,x23,x3,0x2 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b146, Zksed_sm4ks_cg_cp_sbox_b146_str) + 800087b0: 00013203 ld x4,0(x2) + 800087b4: 00820c63 beq x4,x8,800087cc + 800087b8: 209022ef jal x5,8000b1c0 + 800087bc: 800087ac .word 0x800087ac + 800087c0: 00000000 .word 0x00000000 + 800087c4: 8001f67a .word 0x8001f67a + 800087c8: 00000000 .word 0x00000000 + 800087cc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 147 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0x9393939393939393 + 800087d0: 00033d83 ld x27,0(x6) + 800087d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0x9393939393939393 + 800087d8: 00033a03 ld x20,0(x6) + 800087dc: 00830313 addi x6,x6,8 + +00000000800087e0 : +Zksed_sm4ks_cg_cp_sbox_b147: + sm4ks x14, x27, x20, 0 # perform operation + 800087e0: 354d8733 sm4ks x14,x27,x20,0x0 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b147, Zksed_sm4ks_cg_cp_sbox_b147_str) + 800087e4: 00013203 ld x4,0(x2) + 800087e8: 00e20c63 beq x4,x14,80008800 + 800087ec: 1d5022ef jal x5,8000b1c0 + 800087f0: 800087e0 .word 0x800087e0 + 800087f4: 00000000 .word 0x00000000 + 800087f8: 8001f6b2 .word 0x8001f6b2 + 800087fc: 00000000 .word 0x00000000 + 80008800: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 148 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x9494949494949494 + 80008804: 00033a83 ld x21,0(x6) + 80008808: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x9494949494949494 + 8000880c: 00033c03 ld x24,0(x6) + 80008810: 00830313 addi x6,x6,8 + +0000000080008814 : +Zksed_sm4ks_cg_cp_sbox_b148: + sm4ks x13, x21, x24, 2 # perform operation + 80008814: b58a86b3 sm4ks x13,x21,x24,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b148, Zksed_sm4ks_cg_cp_sbox_b148_str) + 80008818: 00013203 ld x4,0(x2) + 8000881c: 00d20c63 beq x4,x13,80008834 + 80008820: 1a1022ef jal x5,8000b1c0 + 80008824: 80008814 .word 0x80008814 + 80008828: 00000000 .word 0x00000000 + 8000882c: 8001f6ea .word 0x8001f6ea + 80008830: 00000000 .word 0x00000000 + 80008834: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 149 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x9595959595959595 + 80008838: 00033a83 ld x21,0(x6) + 8000883c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0x9595959595959595 + 80008840: 00033483 ld x9,0(x6) + 80008844: 00830313 addi x6,x6,8 + +0000000080008848 : +Zksed_sm4ks_cg_cp_sbox_b149: + sm4ks x10, x21, x9, 2 # perform operation + 80008848: b49a8533 sm4ks x10,x21,x9,0x2 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b149, Zksed_sm4ks_cg_cp_sbox_b149_str) + 8000884c: 00013203 ld x4,0(x2) + 80008850: 00a20c63 beq x4,x10,80008868 + 80008854: 16d022ef jal x5,8000b1c0 + 80008858: 80008848 .word 0x80008848 + 8000885c: 00000000 .word 0x00000000 + 80008860: 8001f722 .word 0x8001f722 + 80008864: 00000000 .word 0x00000000 + 80008868: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 150 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0x9696969696969696 + 8000886c: 00033c83 ld x25,0(x6) + 80008870: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x9696969696969696 + 80008874: 00033f03 ld x30,0(x6) + 80008878: 00830313 addi x6,x6,8 + +000000008000887c : +Zksed_sm4ks_cg_cp_sbox_b150: + sm4ks x28, x25, x30, 1 # perform operation + 8000887c: 75ec8e33 sm4ks x28,x25,x30,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b150, Zksed_sm4ks_cg_cp_sbox_b150_str) + 80008880: 00013203 ld x4,0(x2) + 80008884: 01c20c63 beq x4,x28,8000889c + 80008888: 139022ef jal x5,8000b1c0 + 8000888c: 8000887c .word 0x8000887c + 80008890: 00000000 .word 0x00000000 + 80008894: 8001f75a .word 0x8001f75a + 80008898: 00000000 .word 0x00000000 + 8000889c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 151 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x9797979797979797 + 800088a0: 00033983 ld x19,0(x6) + 800088a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x9797979797979797 + 800088a8: 00033183 ld x3,0(x6) + 800088ac: 00830313 addi x6,x6,8 + +00000000800088b0 : +Zksed_sm4ks_cg_cp_sbox_b151: + sm4ks x16, x19, x3, 3 # perform operation + 800088b0: f4398833 sm4ks x16,x19,x3,0x3 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b151, Zksed_sm4ks_cg_cp_sbox_b151_str) + 800088b4: 00013203 ld x4,0(x2) + 800088b8: 01020c63 beq x4,x16,800088d0 + 800088bc: 105022ef jal x5,8000b1c0 + 800088c0: 800088b0 .word 0x800088b0 + 800088c4: 00000000 .word 0x00000000 + 800088c8: 8001f792 .word 0x8001f792 + 800088cc: 00000000 .word 0x00000000 + 800088d0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 152 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x9898989898989898 + 800088d4: 00033483 ld x9,0(x6) + 800088d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0x9898989898989898 + 800088dc: 00033f03 ld x30,0(x6) + 800088e0: 00830313 addi x6,x6,8 + +00000000800088e4 : +Zksed_sm4ks_cg_cp_sbox_b152: + sm4ks x19, x9, x30, 2 # perform operation + 800088e4: b5e489b3 sm4ks x19,x9,x30,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b152, Zksed_sm4ks_cg_cp_sbox_b152_str) + 800088e8: 00013203 ld x4,0(x2) + 800088ec: 01320c63 beq x4,x19,80008904 + 800088f0: 0d1022ef jal x5,8000b1c0 + 800088f4: 800088e4 .word 0x800088e4 + 800088f8: 00000000 .word 0x00000000 + 800088fc: 8001f7ca .word 0x8001f7ca + 80008900: 00000000 .word 0x00000000 + 80008904: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 153 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0x9999999999999999 + 80008908: 00033f03 ld x30,0(x6) + 8000890c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0x9999999999999999 + 80008910: 00033703 ld x14,0(x6) + 80008914: 00830313 addi x6,x6,8 + +0000000080008918 : +Zksed_sm4ks_cg_cp_sbox_b153: + sm4ks x9, x30, x14, 2 # perform operation + 80008918: b4ef04b3 sm4ks x9,x30,x14,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b153, Zksed_sm4ks_cg_cp_sbox_b153_str) + 8000891c: 00013203 ld x4,0(x2) + 80008920: 00920c63 beq x4,x9,80008938 + 80008924: 09d022ef jal x5,8000b1c0 + 80008928: 80008918 .word 0x80008918 + 8000892c: 00000000 .word 0x00000000 + 80008930: 8001f802 .word 0x8001f802 + 80008934: 00000000 .word 0x00000000 + 80008938: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 154 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x9a9a9a9a9a9a9a9a + 8000893c: 00033e03 ld x28,0(x6) + 80008940: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0x9a9a9a9a9a9a9a9a + 80008944: 00033183 ld x3,0(x6) + 80008948: 00830313 addi x6,x6,8 + +000000008000894c : +Zksed_sm4ks_cg_cp_sbox_b154: + sm4ks x25, x28, x3, 0 # perform operation + 8000894c: 343e0cb3 sm4ks x25,x28,x3,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b154, Zksed_sm4ks_cg_cp_sbox_b154_str) + 80008950: 00013203 ld x4,0(x2) + 80008954: 01920c63 beq x4,x25,8000896c + 80008958: 069022ef jal x5,8000b1c0 + 8000895c: 8000894c .word 0x8000894c + 80008960: 00000000 .word 0x00000000 + 80008964: 8001f83a .word 0x8001f83a + 80008968: 00000000 .word 0x00000000 + 8000896c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 155 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0x9b9b9b9b9b9b9b9b + 80008970: 00033a03 ld x20,0(x6) + 80008974: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x9b9b9b9b9b9b9b9b + 80008978: 00033583 ld x11,0(x6) + 8000897c: 00830313 addi x6,x6,8 + +0000000080008980 : +Zksed_sm4ks_cg_cp_sbox_b155: + sm4ks x14, x20, x11, 1 # perform operation + 80008980: 74ba0733 sm4ks x14,x20,x11,0x1 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b155, Zksed_sm4ks_cg_cp_sbox_b155_str) + 80008984: 00013203 ld x4,0(x2) + 80008988: 00e20c63 beq x4,x14,800089a0 + 8000898c: 035022ef jal x5,8000b1c0 + 80008990: 80008980 .word 0x80008980 + 80008994: 00000000 .word 0x00000000 + 80008998: 8001f872 .word 0x8001f872 + 8000899c: 00000000 .word 0x00000000 + 800089a0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 156 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0x9c9c9c9c9c9c9c9c + 800089a4: 00033e03 ld x28,0(x6) + 800089a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0x9c9c9c9c9c9c9c9c + 800089ac: 00033583 ld x11,0(x6) + 800089b0: 00830313 addi x6,x6,8 + +00000000800089b4 : +Zksed_sm4ks_cg_cp_sbox_b156: + sm4ks x29, x28, x11, 0 # perform operation + 800089b4: 34be0eb3 sm4ks x29,x28,x11,0x0 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b156, Zksed_sm4ks_cg_cp_sbox_b156_str) + 800089b8: 00013203 ld x4,0(x2) + 800089bc: 01d20c63 beq x4,x29,800089d4 + 800089c0: 001022ef jal x5,8000b1c0 + 800089c4: 800089b4 .word 0x800089b4 + 800089c8: 00000000 .word 0x00000000 + 800089cc: 8001f8aa .word 0x8001f8aa + 800089d0: 00000000 .word 0x00000000 + 800089d4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 157 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x9d9d9d9d9d9d9d9d + 800089d8: 00033983 ld x19,0(x6) + 800089dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0x9d9d9d9d9d9d9d9d + 800089e0: 00033603 ld x12,0(x6) + 800089e4: 00830313 addi x6,x6,8 + +00000000800089e8 : +Zksed_sm4ks_cg_cp_sbox_b157: + sm4ks x9, x19, x12, 0 # perform operation + 800089e8: 34c984b3 sm4ks x9,x19,x12,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b157, Zksed_sm4ks_cg_cp_sbox_b157_str) + 800089ec: 00013203 ld x4,0(x2) + 800089f0: 00920c63 beq x4,x9,80008a08 + 800089f4: 7cc022ef jal x5,8000b1c0 + 800089f8: 800089e8 .word 0x800089e8 + 800089fc: 00000000 .word 0x00000000 + 80008a00: 8001f8e2 .word 0x8001f8e2 + 80008a04: 00000000 .word 0x00000000 + 80008a08: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 158 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x9e9e9e9e9e9e9e9e + 80008a0c: 00033983 ld x19,0(x6) + 80008a10: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs2: x27 = 0x9e9e9e9e9e9e9e9e + 80008a14: 00033d83 ld x27,0(x6) + 80008a18: 00830313 addi x6,x6,8 + +0000000080008a1c : +Zksed_sm4ks_cg_cp_sbox_b158: + sm4ks x7, x19, x27, 3 # perform operation + 80008a1c: f5b983b3 sm4ks x7,x19,x27,0x3 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b158, Zksed_sm4ks_cg_cp_sbox_b158_str) + 80008a20: 00013203 ld x4,0(x2) + 80008a24: 00720c63 beq x4,x7,80008a3c + 80008a28: 798022ef jal x5,8000b1c0 + 80008a2c: 80008a1c .word 0x80008a1c + 80008a30: 00000000 .word 0x00000000 + 80008a34: 8001f91a .word 0x8001f91a + 80008a38: 00000000 .word 0x00000000 + 80008a3c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 159 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x9f9f9f9f9f9f9f9f + 80008a40: 00033483 ld x9,0(x6) + 80008a44: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0x9f9f9f9f9f9f9f9f + 80008a48: 00033c03 ld x24,0(x6) + 80008a4c: 00830313 addi x6,x6,8 + +0000000080008a50 : +Zksed_sm4ks_cg_cp_sbox_b159: + sm4ks x17, x9, x24, 1 # perform operation + 80008a50: 758488b3 sm4ks x17,x9,x24,0x1 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b159, Zksed_sm4ks_cg_cp_sbox_b159_str) + 80008a54: 00013203 ld x4,0(x2) + 80008a58: 01120c63 beq x4,x17,80008a70 + 80008a5c: 764022ef jal x5,8000b1c0 + 80008a60: 80008a50 .word 0x80008a50 + 80008a64: 00000000 .word 0x00000000 + 80008a68: 8001f952 .word 0x8001f952 + 80008a6c: 00000000 .word 0x00000000 + 80008a70: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 160 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xa0a0a0a0a0a0a0a0 + 80008a74: 00033383 ld x7,0(x6) + 80008a78: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xa0a0a0a0a0a0a0a0 + 80008a7c: 00033d03 ld x26,0(x6) + 80008a80: 00830313 addi x6,x6,8 + +0000000080008a84 : +Zksed_sm4ks_cg_cp_sbox_b160: + sm4ks x25, x7, x26, 2 # perform operation + 80008a84: b5a38cb3 sm4ks x25,x7,x26,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b160, Zksed_sm4ks_cg_cp_sbox_b160_str) + 80008a88: 00013203 ld x4,0(x2) + 80008a8c: 01920c63 beq x4,x25,80008aa4 + 80008a90: 730022ef jal x5,8000b1c0 + 80008a94: 80008a84 .word 0x80008a84 + 80008a98: 00000000 .word 0x00000000 + 80008a9c: 8001f98a .word 0x8001f98a + 80008aa0: 00000000 .word 0x00000000 + 80008aa4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 161 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xa1a1a1a1a1a1a1a1 + 80008aa8: 00033c03 ld x24,0(x6) + 80008aac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xa1a1a1a1a1a1a1a1 + 80008ab0: 00033403 ld x8,0(x6) + 80008ab4: 00830313 addi x6,x6,8 + +0000000080008ab8 : +Zksed_sm4ks_cg_cp_sbox_b161: + sm4ks x16, x24, x8, 0 # perform operation + 80008ab8: 348c0833 sm4ks x16,x24,x8,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b161, Zksed_sm4ks_cg_cp_sbox_b161_str) + 80008abc: 00013203 ld x4,0(x2) + 80008ac0: 01020c63 beq x4,x16,80008ad8 + 80008ac4: 6fc022ef jal x5,8000b1c0 + 80008ac8: 80008ab8 .word 0x80008ab8 + 80008acc: 00000000 .word 0x00000000 + 80008ad0: 8001f9c2 .word 0x8001f9c2 + 80008ad4: 00000000 .word 0x00000000 + 80008ad8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 162 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xa2a2a2a2a2a2a2a2 + 80008adc: 00033883 ld x17,0(x6) + 80008ae0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xa2a2a2a2a2a2a2a2 + 80008ae4: 00033c83 ld x25,0(x6) + 80008ae8: 00830313 addi x6,x6,8 + +0000000080008aec : +Zksed_sm4ks_cg_cp_sbox_b162: + sm4ks x22, x17, x25, 1 # perform operation + 80008aec: 75988b33 sm4ks x22,x17,x25,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b162, Zksed_sm4ks_cg_cp_sbox_b162_str) + 80008af0: 00013203 ld x4,0(x2) + 80008af4: 01620c63 beq x4,x22,80008b0c + 80008af8: 6c8022ef jal x5,8000b1c0 + 80008afc: 80008aec .word 0x80008aec + 80008b00: 00000000 .word 0x00000000 + 80008b04: 8001f9fa .word 0x8001f9fa + 80008b08: 00000000 .word 0x00000000 + 80008b0c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 163 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xa3a3a3a3a3a3a3a3 + 80008b10: 00033383 ld x7,0(x6) + 80008b14: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xa3a3a3a3a3a3a3a3 + 80008b18: 00033603 ld x12,0(x6) + 80008b1c: 00830313 addi x6,x6,8 + +0000000080008b20 : +Zksed_sm4ks_cg_cp_sbox_b163: + sm4ks x22, x7, x12, 1 # perform operation + 80008b20: 74c38b33 sm4ks x22,x7,x12,0x1 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b163, Zksed_sm4ks_cg_cp_sbox_b163_str) + 80008b24: 00013203 ld x4,0(x2) + 80008b28: 01620c63 beq x4,x22,80008b40 + 80008b2c: 694022ef jal x5,8000b1c0 + 80008b30: 80008b20 .word 0x80008b20 + 80008b34: 00000000 .word 0x00000000 + 80008b38: 8001fa32 .word 0x8001fa32 + 80008b3c: 00000000 .word 0x00000000 + 80008b40: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 164 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xa4a4a4a4a4a4a4a4 + 80008b44: 00033683 ld x13,0(x6) + 80008b48: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xa4a4a4a4a4a4a4a4 + 80008b4c: 00033383 ld x7,0(x6) + 80008b50: 00830313 addi x6,x6,8 + +0000000080008b54 : +Zksed_sm4ks_cg_cp_sbox_b164: + sm4ks x1, x13, x7, 3 # perform operation + 80008b54: f47680b3 sm4ks x1,x13,x7,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b164, Zksed_sm4ks_cg_cp_sbox_b164_str) + 80008b58: 00013203 ld x4,0(x2) + 80008b5c: 00120c63 beq x4,x1,80008b74 + 80008b60: 660022ef jal x5,8000b1c0 + 80008b64: 80008b54 .word 0x80008b54 + 80008b68: 00000000 .word 0x00000000 + 80008b6c: 8001fa6a .word 0x8001fa6a + 80008b70: 00000000 .word 0x00000000 + 80008b74: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 165 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xa5a5a5a5a5a5a5a5 + 80008b78: 00033c83 ld x25,0(x6) + 80008b7c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xa5a5a5a5a5a5a5a5 + 80008b80: 00033583 ld x11,0(x6) + 80008b84: 00830313 addi x6,x6,8 + +0000000080008b88 : +Zksed_sm4ks_cg_cp_sbox_b165: + sm4ks x30, x25, x11, 2 # perform operation + 80008b88: b4bc8f33 sm4ks x30,x25,x11,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b165, Zksed_sm4ks_cg_cp_sbox_b165_str) + 80008b8c: 00013203 ld x4,0(x2) + 80008b90: 01e20c63 beq x4,x30,80008ba8 + 80008b94: 62c022ef jal x5,8000b1c0 + 80008b98: 80008b88 .word 0x80008b88 + 80008b9c: 00000000 .word 0x00000000 + 80008ba0: 8001faa2 .word 0x8001faa2 + 80008ba4: 00000000 .word 0x00000000 + 80008ba8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 166 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xa6a6a6a6a6a6a6a6 + 80008bac: 00033d03 ld x26,0(x6) + 80008bb0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xa6a6a6a6a6a6a6a6 + 80008bb4: 00033503 ld x10,0(x6) + 80008bb8: 00830313 addi x6,x6,8 + +0000000080008bbc : +Zksed_sm4ks_cg_cp_sbox_b166: + sm4ks x23, x26, x10, 3 # perform operation + 80008bbc: f4ad0bb3 sm4ks x23,x26,x10,0x3 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b166, Zksed_sm4ks_cg_cp_sbox_b166_str) + 80008bc0: 00013203 ld x4,0(x2) + 80008bc4: 01720c63 beq x4,x23,80008bdc + 80008bc8: 5f8022ef jal x5,8000b1c0 + 80008bcc: 80008bbc .word 0x80008bbc + 80008bd0: 00000000 .word 0x00000000 + 80008bd4: 8001fada .word 0x8001fada + 80008bd8: 00000000 .word 0x00000000 + 80008bdc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 167 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xa7a7a7a7a7a7a7a7 + 80008be0: 00033d83 ld x27,0(x6) + 80008be4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xa7a7a7a7a7a7a7a7 + 80008be8: 00033e03 ld x28,0(x6) + 80008bec: 00830313 addi x6,x6,8 + +0000000080008bf0 : +Zksed_sm4ks_cg_cp_sbox_b167: + sm4ks x18, x27, x28, 0 # perform operation + 80008bf0: 35cd8933 sm4ks x18,x27,x28,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b167, Zksed_sm4ks_cg_cp_sbox_b167_str) + 80008bf4: 00013203 ld x4,0(x2) + 80008bf8: 01220c63 beq x4,x18,80008c10 + 80008bfc: 5c4022ef jal x5,8000b1c0 + 80008c00: 80008bf0 .word 0x80008bf0 + 80008c04: 00000000 .word 0x00000000 + 80008c08: 8001fb12 .word 0x8001fb12 + 80008c0c: 00000000 .word 0x00000000 + 80008c10: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 168 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xa8a8a8a8a8a8a8a8 + 80008c14: 00033683 ld x13,0(x6) + 80008c18: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xa8a8a8a8a8a8a8a8 + 80008c1c: 00033b83 ld x23,0(x6) + 80008c20: 00830313 addi x6,x6,8 + +0000000080008c24 : +Zksed_sm4ks_cg_cp_sbox_b168: + sm4ks x19, x13, x23, 3 # perform operation + 80008c24: f57689b3 sm4ks x19,x13,x23,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b168, Zksed_sm4ks_cg_cp_sbox_b168_str) + 80008c28: 00013203 ld x4,0(x2) + 80008c2c: 01320c63 beq x4,x19,80008c44 + 80008c30: 590022ef jal x5,8000b1c0 + 80008c34: 80008c24 .word 0x80008c24 + 80008c38: 00000000 .word 0x00000000 + 80008c3c: 8001fb4a .word 0x8001fb4a + 80008c40: 00000000 .word 0x00000000 + 80008c44: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 169 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xa9a9a9a9a9a9a9a9 + 80008c48: 00033703 ld x14,0(x6) + 80008c4c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xa9a9a9a9a9a9a9a9 + 80008c50: 00033d03 ld x26,0(x6) + 80008c54: 00830313 addi x6,x6,8 + +0000000080008c58 : +Zksed_sm4ks_cg_cp_sbox_b169: + sm4ks x27, x14, x26, 0 # perform operation + 80008c58: 35a70db3 sm4ks x27,x14,x26,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b169, Zksed_sm4ks_cg_cp_sbox_b169_str) + 80008c5c: 00013203 ld x4,0(x2) + 80008c60: 01b20c63 beq x4,x27,80008c78 + 80008c64: 55c022ef jal x5,8000b1c0 + 80008c68: 80008c58 .word 0x80008c58 + 80008c6c: 00000000 .word 0x00000000 + 80008c70: 8001fb82 .word 0x8001fb82 + 80008c74: 00000000 .word 0x00000000 + 80008c78: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 170 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xaaaaaaaaaaaaaaaa + 80008c7c: 00033583 ld x11,0(x6) + 80008c80: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xaaaaaaaaaaaaaaaa + 80008c84: 00033d03 ld x26,0(x6) + 80008c88: 00830313 addi x6,x6,8 + +0000000080008c8c : +Zksed_sm4ks_cg_cp_sbox_b170: + sm4ks x31, x11, x26, 0 # perform operation + 80008c8c: 35a58fb3 sm4ks x31,x11,x26,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b170, Zksed_sm4ks_cg_cp_sbox_b170_str) + 80008c90: 00013203 ld x4,0(x2) + 80008c94: 01f20c63 beq x4,x31,80008cac + 80008c98: 528022ef jal x5,8000b1c0 + 80008c9c: 80008c8c .word 0x80008c8c + 80008ca0: 00000000 .word 0x00000000 + 80008ca4: 8001fbba .word 0x8001fbba + 80008ca8: 00000000 .word 0x00000000 + 80008cac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 171 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xabababababababab + 80008cb0: 00033d03 ld x26,0(x6) + 80008cb4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xabababababababab + 80008cb8: 00033703 ld x14,0(x6) + 80008cbc: 00830313 addi x6,x6,8 + +0000000080008cc0 : +Zksed_sm4ks_cg_cp_sbox_b171: + sm4ks x18, x26, x14, 3 # perform operation + 80008cc0: f4ed0933 sm4ks x18,x26,x14,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b171, Zksed_sm4ks_cg_cp_sbox_b171_str) + 80008cc4: 00013203 ld x4,0(x2) + 80008cc8: 01220c63 beq x4,x18,80008ce0 + 80008ccc: 4f4022ef jal x5,8000b1c0 + 80008cd0: 80008cc0 .word 0x80008cc0 + 80008cd4: 00000000 .word 0x00000000 + 80008cd8: 8001fbf2 .word 0x8001fbf2 + 80008cdc: 00000000 .word 0x00000000 + 80008ce0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 172 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xacacacacacacacac + 80008ce4: 00033a03 ld x20,0(x6) + 80008ce8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xacacacacacacacac + 80008cec: 00033483 ld x9,0(x6) + 80008cf0: 00830313 addi x6,x6,8 + +0000000080008cf4 : +Zksed_sm4ks_cg_cp_sbox_b172: + sm4ks x18, x20, x9, 1 # perform operation + 80008cf4: 749a0933 sm4ks x18,x20,x9,0x1 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b172, Zksed_sm4ks_cg_cp_sbox_b172_str) + 80008cf8: 00013203 ld x4,0(x2) + 80008cfc: 01220c63 beq x4,x18,80008d14 + 80008d00: 4c0022ef jal x5,8000b1c0 + 80008d04: 80008cf4 .word 0x80008cf4 + 80008d08: 00000000 .word 0x00000000 + 80008d0c: 8001fc2a .word 0x8001fc2a + 80008d10: 00000000 .word 0x00000000 + 80008d14: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 173 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xadadadadadadadad + 80008d18: 00033a83 ld x21,0(x6) + 80008d1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xadadadadadadadad + 80008d20: 00033f03 ld x30,0(x6) + 80008d24: 00830313 addi x6,x6,8 + +0000000080008d28 : +Zksed_sm4ks_cg_cp_sbox_b173: + sm4ks x14, x21, x30, 3 # perform operation + 80008d28: f5ea8733 sm4ks x14,x21,x30,0x3 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b173, Zksed_sm4ks_cg_cp_sbox_b173_str) + 80008d2c: 00013203 ld x4,0(x2) + 80008d30: 00e20c63 beq x4,x14,80008d48 + 80008d34: 48c022ef jal x5,8000b1c0 + 80008d38: 80008d28 .word 0x80008d28 + 80008d3c: 00000000 .word 0x00000000 + 80008d40: 8001fc62 .word 0x8001fc62 + 80008d44: 00000000 .word 0x00000000 + 80008d48: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 174 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xaeaeaeaeaeaeaeae + 80008d4c: 00033983 ld x19,0(x6) + 80008d50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xaeaeaeaeaeaeaeae + 80008d54: 00033a03 ld x20,0(x6) + 80008d58: 00830313 addi x6,x6,8 + +0000000080008d5c : +Zksed_sm4ks_cg_cp_sbox_b174: + sm4ks x25, x19, x20, 3 # perform operation + 80008d5c: f5498cb3 sm4ks x25,x19,x20,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b174, Zksed_sm4ks_cg_cp_sbox_b174_str) + 80008d60: 00013203 ld x4,0(x2) + 80008d64: 01920c63 beq x4,x25,80008d7c + 80008d68: 458022ef jal x5,8000b1c0 + 80008d6c: 80008d5c .word 0x80008d5c + 80008d70: 00000000 .word 0x00000000 + 80008d74: 8001fc9a .word 0x8001fc9a + 80008d78: 00000000 .word 0x00000000 + 80008d7c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 175 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xafafafafafafafaf + 80008d80: 00033b03 ld x22,0(x6) + 80008d84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xafafafafafafafaf + 80008d88: 00033503 ld x10,0(x6) + 80008d8c: 00830313 addi x6,x6,8 + +0000000080008d90 : +Zksed_sm4ks_cg_cp_sbox_b175: + sm4ks x9, x22, x10, 1 # perform operation + 80008d90: 74ab04b3 sm4ks x9,x22,x10,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b175, Zksed_sm4ks_cg_cp_sbox_b175_str) + 80008d94: 00013203 ld x4,0(x2) + 80008d98: 00920c63 beq x4,x9,80008db0 + 80008d9c: 424022ef jal x5,8000b1c0 + 80008da0: 80008d90 .word 0x80008d90 + 80008da4: 00000000 .word 0x00000000 + 80008da8: 8001fcd2 .word 0x8001fcd2 + 80008dac: 00000000 .word 0x00000000 + 80008db0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 176 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xb0b0b0b0b0b0b0b0 + 80008db4: 00033683 ld x13,0(x6) + 80008db8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xb0b0b0b0b0b0b0b0 + 80008dbc: 00033503 ld x10,0(x6) + 80008dc0: 00830313 addi x6,x6,8 + +0000000080008dc4 : +Zksed_sm4ks_cg_cp_sbox_b176: + sm4ks x28, x13, x10, 1 # perform operation + 80008dc4: 74a68e33 sm4ks x28,x13,x10,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b176, Zksed_sm4ks_cg_cp_sbox_b176_str) + 80008dc8: 00013203 ld x4,0(x2) + 80008dcc: 01c20c63 beq x4,x28,80008de4 + 80008dd0: 3f0022ef jal x5,8000b1c0 + 80008dd4: 80008dc4 .word 0x80008dc4 + 80008dd8: 00000000 .word 0x00000000 + 80008ddc: 8001fd0a .word 0x8001fd0a + 80008de0: 00000000 .word 0x00000000 + 80008de4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 177 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xb1b1b1b1b1b1b1b1 + 80008de8: 00033f83 ld x31,0(x6) + 80008dec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xb1b1b1b1b1b1b1b1 + 80008df0: 00033083 ld x1,0(x6) + 80008df4: 00830313 addi x6,x6,8 + +0000000080008df8 : +Zksed_sm4ks_cg_cp_sbox_b177: + sm4ks x30, x31, x1, 3 # perform operation + 80008df8: f41f8f33 sm4ks x30,x31,x1,0x3 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b177, Zksed_sm4ks_cg_cp_sbox_b177_str) + 80008dfc: 00013203 ld x4,0(x2) + 80008e00: 01e20c63 beq x4,x30,80008e18 + 80008e04: 3bc022ef jal x5,8000b1c0 + 80008e08: 80008df8 .word 0x80008df8 + 80008e0c: 00000000 .word 0x00000000 + 80008e10: 8001fd42 .word 0x8001fd42 + 80008e14: 00000000 .word 0x00000000 + 80008e18: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 178 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xb2b2b2b2b2b2b2b2 + 80008e1c: 00033603 ld x12,0(x6) + 80008e20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xb2b2b2b2b2b2b2b2 + 80008e24: 00033c83 ld x25,0(x6) + 80008e28: 00830313 addi x6,x6,8 + +0000000080008e2c : +Zksed_sm4ks_cg_cp_sbox_b178: + sm4ks x27, x12, x25, 3 # perform operation + 80008e2c: f5960db3 sm4ks x27,x12,x25,0x3 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b178, Zksed_sm4ks_cg_cp_sbox_b178_str) + 80008e30: 00013203 ld x4,0(x2) + 80008e34: 01b20c63 beq x4,x27,80008e4c + 80008e38: 388022ef jal x5,8000b1c0 + 80008e3c: 80008e2c .word 0x80008e2c + 80008e40: 00000000 .word 0x00000000 + 80008e44: 8001fd7a .word 0x8001fd7a + 80008e48: 00000000 .word 0x00000000 + 80008e4c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 179 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xb3b3b3b3b3b3b3b3 + 80008e50: 00033b03 ld x22,0(x6) + 80008e54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xb3b3b3b3b3b3b3b3 + 80008e58: 00033603 ld x12,0(x6) + 80008e5c: 00830313 addi x6,x6,8 + +0000000080008e60 : +Zksed_sm4ks_cg_cp_sbox_b179: + sm4ks x11, x22, x12, 1 # perform operation + 80008e60: 74cb05b3 sm4ks x11,x22,x12,0x1 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b179, Zksed_sm4ks_cg_cp_sbox_b179_str) + 80008e64: 00013203 ld x4,0(x2) + 80008e68: 00b20c63 beq x4,x11,80008e80 + 80008e6c: 354022ef jal x5,8000b1c0 + 80008e70: 80008e60 .word 0x80008e60 + 80008e74: 00000000 .word 0x00000000 + 80008e78: 8001fdb2 .word 0x8001fdb2 + 80008e7c: 00000000 .word 0x00000000 + 80008e80: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 180 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xb4b4b4b4b4b4b4b4 + 80008e84: 00033403 ld x8,0(x6) + 80008e88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xb4b4b4b4b4b4b4b4 + 80008e8c: 00033583 ld x11,0(x6) + 80008e90: 00830313 addi x6,x6,8 + +0000000080008e94 : +Zksed_sm4ks_cg_cp_sbox_b180: + sm4ks x13, x8, x11, 2 # perform operation + 80008e94: b4b406b3 sm4ks x13,x8,x11,0x2 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b180, Zksed_sm4ks_cg_cp_sbox_b180_str) + 80008e98: 00013203 ld x4,0(x2) + 80008e9c: 00d20c63 beq x4,x13,80008eb4 + 80008ea0: 320022ef jal x5,8000b1c0 + 80008ea4: 80008e94 .word 0x80008e94 + 80008ea8: 00000000 .word 0x00000000 + 80008eac: 8001fdea .word 0x8001fdea + 80008eb0: 00000000 .word 0x00000000 + 80008eb4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 181 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xb5b5b5b5b5b5b5b5 + 80008eb8: 00033683 ld x13,0(x6) + 80008ebc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xb5b5b5b5b5b5b5b5 + 80008ec0: 00033483 ld x9,0(x6) + 80008ec4: 00830313 addi x6,x6,8 + +0000000080008ec8 : +Zksed_sm4ks_cg_cp_sbox_b181: + sm4ks x15, x13, x9, 2 # perform operation + 80008ec8: b49687b3 sm4ks x15,x13,x9,0x2 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b181, Zksed_sm4ks_cg_cp_sbox_b181_str) + 80008ecc: 00013203 ld x4,0(x2) + 80008ed0: 00f20c63 beq x4,x15,80008ee8 + 80008ed4: 2ec022ef jal x5,8000b1c0 + 80008ed8: 80008ec8 .word 0x80008ec8 + 80008edc: 00000000 .word 0x00000000 + 80008ee0: 8001fe22 .word 0x8001fe22 + 80008ee4: 00000000 .word 0x00000000 + 80008ee8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 182 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xb6b6b6b6b6b6b6b6 + 80008eec: 00033583 ld x11,0(x6) + 80008ef0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xb6b6b6b6b6b6b6b6 + 80008ef4: 00033383 ld x7,0(x6) + 80008ef8: 00830313 addi x6,x6,8 + +0000000080008efc : +Zksed_sm4ks_cg_cp_sbox_b182: + sm4ks x10, x11, x7, 1 # perform operation + 80008efc: 74758533 sm4ks x10,x11,x7,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b182, Zksed_sm4ks_cg_cp_sbox_b182_str) + 80008f00: 00013203 ld x4,0(x2) + 80008f04: 00a20c63 beq x4,x10,80008f1c + 80008f08: 2b8022ef jal x5,8000b1c0 + 80008f0c: 80008efc .word 0x80008efc + 80008f10: 00000000 .word 0x00000000 + 80008f14: 8001fe5a .word 0x8001fe5a + 80008f18: 00000000 .word 0x00000000 + 80008f1c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 183 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xb7b7b7b7b7b7b7b7 + 80008f20: 00033783 ld x15,0(x6) + 80008f24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xb7b7b7b7b7b7b7b7 + 80008f28: 00033a03 ld x20,0(x6) + 80008f2c: 00830313 addi x6,x6,8 + +0000000080008f30 : +Zksed_sm4ks_cg_cp_sbox_b183: + sm4ks x19, x15, x20, 3 # perform operation + 80008f30: f54789b3 sm4ks x19,x15,x20,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b183, Zksed_sm4ks_cg_cp_sbox_b183_str) + 80008f34: 00013203 ld x4,0(x2) + 80008f38: 01320c63 beq x4,x19,80008f50 + 80008f3c: 284022ef jal x5,8000b1c0 + 80008f40: 80008f30 .word 0x80008f30 + 80008f44: 00000000 .word 0x00000000 + 80008f48: 8001fe92 .word 0x8001fe92 + 80008f4c: 00000000 .word 0x00000000 + 80008f50: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 184 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xb8b8b8b8b8b8b8b8 + 80008f54: 00033603 ld x12,0(x6) + 80008f58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xb8b8b8b8b8b8b8b8 + 80008f5c: 00033503 ld x10,0(x6) + 80008f60: 00830313 addi x6,x6,8 + +0000000080008f64 : +Zksed_sm4ks_cg_cp_sbox_b184: + sm4ks x22, x12, x10, 3 # perform operation + 80008f64: f4a60b33 sm4ks x22,x12,x10,0x3 + # Check if x22 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x22, Zksed_sm4ks_cg_cp_sbox_b184, Zksed_sm4ks_cg_cp_sbox_b184_str) + 80008f68: 00013203 ld x4,0(x2) + 80008f6c: 01620c63 beq x4,x22,80008f84 + 80008f70: 250022ef jal x5,8000b1c0 + 80008f74: 80008f64 .word 0x80008f64 + 80008f78: 00000000 .word 0x00000000 + 80008f7c: 8001feca .word 0x8001feca + 80008f80: 00000000 .word 0x00000000 + 80008f84: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 185 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xb9b9b9b9b9b9b9b9 + 80008f88: 00033783 ld x15,0(x6) + 80008f8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xb9b9b9b9b9b9b9b9 + 80008f90: 00033083 ld x1,0(x6) + 80008f94: 00830313 addi x6,x6,8 + +0000000080008f98 : +Zksed_sm4ks_cg_cp_sbox_b185: + sm4ks x3, x15, x1, 2 # perform operation + 80008f98: b41781b3 sm4ks x3,x15,x1,0x2 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b185, Zksed_sm4ks_cg_cp_sbox_b185_str) + 80008f9c: 00013203 ld x4,0(x2) + 80008fa0: 00320c63 beq x4,x3,80008fb8 + 80008fa4: 21c022ef jal x5,8000b1c0 + 80008fa8: 80008f98 .word 0x80008f98 + 80008fac: 00000000 .word 0x00000000 + 80008fb0: 8001ff02 .word 0x8001ff02 + 80008fb4: 00000000 .word 0x00000000 + 80008fb8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 186 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xbabababababababa + 80008fbc: 00033e03 ld x28,0(x6) + 80008fc0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xbabababababababa + 80008fc4: 00033703 ld x14,0(x6) + 80008fc8: 00830313 addi x6,x6,8 + +0000000080008fcc : +Zksed_sm4ks_cg_cp_sbox_b186: + sm4ks x27, x28, x14, 1 # perform operation + 80008fcc: 74ee0db3 sm4ks x27,x28,x14,0x1 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b186, Zksed_sm4ks_cg_cp_sbox_b186_str) + 80008fd0: 00013203 ld x4,0(x2) + 80008fd4: 01b20c63 beq x4,x27,80008fec + 80008fd8: 1e8022ef jal x5,8000b1c0 + 80008fdc: 80008fcc .word 0x80008fcc + 80008fe0: 00000000 .word 0x00000000 + 80008fe4: 8001ff3a .word 0x8001ff3a + 80008fe8: 00000000 .word 0x00000000 + 80008fec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 187 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xbbbbbbbbbbbbbbbb + 80008ff0: 00033083 ld x1,0(x6) + 80008ff4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xbbbbbbbbbbbbbbbb + 80008ff8: 00033d03 ld x26,0(x6) + 80008ffc: 00830313 addi x6,x6,8 + +0000000080009000 : +Zksed_sm4ks_cg_cp_sbox_b187: + sm4ks x16, x1, x26, 0 # perform operation + 80009000: 35a08833 sm4ks x16,x1,x26,0x0 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b187, Zksed_sm4ks_cg_cp_sbox_b187_str) + 80009004: 00013203 ld x4,0(x2) + 80009008: 01020c63 beq x4,x16,80009020 + 8000900c: 1b4022ef jal x5,8000b1c0 + 80009010: 80009000 .word 0x80009000 + 80009014: 00000000 .word 0x00000000 + 80009018: 8001ff72 .word 0x8001ff72 + 8000901c: 00000000 .word 0x00000000 + 80009020: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 188 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xbcbcbcbcbcbcbcbc + 80009024: 00033183 ld x3,0(x6) + 80009028: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xbcbcbcbcbcbcbcbc + 8000902c: 00033483 ld x9,0(x6) + 80009030: 00830313 addi x6,x6,8 + +0000000080009034 : +Zksed_sm4ks_cg_cp_sbox_b188: + sm4ks x8, x3, x9, 3 # perform operation + 80009034: f4918433 sm4ks x8,x3,x9,0x3 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksed_sm4ks_cg_cp_sbox_b188, Zksed_sm4ks_cg_cp_sbox_b188_str) + 80009038: 00013203 ld x4,0(x2) + 8000903c: 00820c63 beq x4,x8,80009054 + 80009040: 180022ef jal x5,8000b1c0 + 80009044: 80009034 .word 0x80009034 + 80009048: 00000000 .word 0x00000000 + 8000904c: 8001ffaa .word 0x8001ffaa + 80009050: 00000000 .word 0x00000000 + 80009054: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 189 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xbdbdbdbdbdbdbdbd + 80009058: 00033183 ld x3,0(x6) + 8000905c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xbdbdbdbdbdbdbdbd + 80009060: 00033c03 ld x24,0(x6) + 80009064: 00830313 addi x6,x6,8 + +0000000080009068 : +Zksed_sm4ks_cg_cp_sbox_b189: + sm4ks x9, x3, x24, 3 # perform operation + 80009068: f58184b3 sm4ks x9,x3,x24,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b189, Zksed_sm4ks_cg_cp_sbox_b189_str) + 8000906c: 00013203 ld x4,0(x2) + 80009070: 00920c63 beq x4,x9,80009088 + 80009074: 14c022ef jal x5,8000b1c0 + 80009078: 80009068 .word 0x80009068 + 8000907c: 00000000 .word 0x00000000 + 80009080: 8001ffe2 .word 0x8001ffe2 + 80009084: 00000000 .word 0x00000000 + 80009088: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 190 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xbebebebebebebebe + 8000908c: 00033803 ld x16,0(x6) + 80009090: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xbebebebebebebebe + 80009094: 00033783 ld x15,0(x6) + 80009098: 00830313 addi x6,x6,8 + +000000008000909c : +Zksed_sm4ks_cg_cp_sbox_b190: + sm4ks x1, x16, x15, 1 # perform operation + 8000909c: 74f800b3 sm4ks x1,x16,x15,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b190, Zksed_sm4ks_cg_cp_sbox_b190_str) + 800090a0: 00013203 ld x4,0(x2) + 800090a4: 00120c63 beq x4,x1,800090bc + 800090a8: 118022ef jal x5,8000b1c0 + 800090ac: 8000909c .word 0x8000909c + 800090b0: 00000000 .word 0x00000000 + 800090b4: 8002001a .word 0x8002001a + 800090b8: 00000000 .word 0x00000000 + 800090bc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 191 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xbfbfbfbfbfbfbfbf + 800090c0: 00033c03 ld x24,0(x6) + 800090c4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xbfbfbfbfbfbfbfbf + 800090c8: 00033083 ld x1,0(x6) + 800090cc: 00830313 addi x6,x6,8 + +00000000800090d0 : +Zksed_sm4ks_cg_cp_sbox_b191: + sm4ks x29, x24, x1, 2 # perform operation + 800090d0: b41c0eb3 sm4ks x29,x24,x1,0x2 + # Check if x29 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x29, Zksed_sm4ks_cg_cp_sbox_b191, Zksed_sm4ks_cg_cp_sbox_b191_str) + 800090d4: 00013203 ld x4,0(x2) + 800090d8: 01d20c63 beq x4,x29,800090f0 + 800090dc: 0e4022ef jal x5,8000b1c0 + 800090e0: 800090d0 .word 0x800090d0 + 800090e4: 00000000 .word 0x00000000 + 800090e8: 80020052 .word 0x80020052 + 800090ec: 00000000 .word 0x00000000 + 800090f0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 192 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xc0c0c0c0c0c0c0c0 + 800090f4: 00033903 ld x18,0(x6) + 800090f8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xc0c0c0c0c0c0c0c0 + 800090fc: 00033e83 ld x29,0(x6) + 80009100: 00830313 addi x6,x6,8 + +0000000080009104 : +Zksed_sm4ks_cg_cp_sbox_b192: + sm4ks x28, x18, x29, 3 # perform operation + 80009104: f5d90e33 sm4ks x28,x18,x29,0x3 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b192, Zksed_sm4ks_cg_cp_sbox_b192_str) + 80009108: 00013203 ld x4,0(x2) + 8000910c: 01c20c63 beq x4,x28,80009124 + 80009110: 0b0022ef jal x5,8000b1c0 + 80009114: 80009104 .word 0x80009104 + 80009118: 00000000 .word 0x00000000 + 8000911c: 8002008a .word 0x8002008a + 80009120: 00000000 .word 0x00000000 + 80009124: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 193 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xc1c1c1c1c1c1c1c1 + 80009128: 00033883 ld x17,0(x6) + 8000912c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xc1c1c1c1c1c1c1c1 + 80009130: 00033403 ld x8,0(x6) + 80009134: 00830313 addi x6,x6,8 + +0000000080009138 : +Zksed_sm4ks_cg_cp_sbox_b193: + sm4ks x24, x17, x8, 3 # perform operation + 80009138: f4888c33 sm4ks x24,x17,x8,0x3 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b193, Zksed_sm4ks_cg_cp_sbox_b193_str) + 8000913c: 00013203 ld x4,0(x2) + 80009140: 01820c63 beq x4,x24,80009158 + 80009144: 07c022ef jal x5,8000b1c0 + 80009148: 80009138 .word 0x80009138 + 8000914c: 00000000 .word 0x00000000 + 80009150: 800200c2 .word 0x800200c2 + 80009154: 00000000 .word 0x00000000 + 80009158: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 194 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xc2c2c2c2c2c2c2c2 + 8000915c: 00033083 ld x1,0(x6) + 80009160: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xc2c2c2c2c2c2c2c2 + 80009164: 00033383 ld x7,0(x6) + 80009168: 00830313 addi x6,x6,8 + +000000008000916c : +Zksed_sm4ks_cg_cp_sbox_b194: + sm4ks x24, x1, x7, 0 # perform operation + 8000916c: 34708c33 sm4ks x24,x1,x7,0x0 + # Check if x24 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x24, Zksed_sm4ks_cg_cp_sbox_b194, Zksed_sm4ks_cg_cp_sbox_b194_str) + 80009170: 00013203 ld x4,0(x2) + 80009174: 01820c63 beq x4,x24,8000918c + 80009178: 048022ef jal x5,8000b1c0 + 8000917c: 8000916c .word 0x8000916c + 80009180: 00000000 .word 0x00000000 + 80009184: 800200fa .word 0x800200fa + 80009188: 00000000 .word 0x00000000 + 8000918c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 195 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xc3c3c3c3c3c3c3c3 + 80009190: 00033883 ld x17,0(x6) + 80009194: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xc3c3c3c3c3c3c3c3 + 80009198: 00033483 ld x9,0(x6) + 8000919c: 00830313 addi x6,x6,8 + +00000000800091a0 : +Zksed_sm4ks_cg_cp_sbox_b195: + sm4ks x11, x17, x9, 3 # perform operation + 800091a0: f49885b3 sm4ks x11,x17,x9,0x3 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b195, Zksed_sm4ks_cg_cp_sbox_b195_str) + 800091a4: 00013203 ld x4,0(x2) + 800091a8: 00b20c63 beq x4,x11,800091c0 + 800091ac: 014022ef jal x5,8000b1c0 + 800091b0: 800091a0 .word 0x800091a0 + 800091b4: 00000000 .word 0x00000000 + 800091b8: 80020132 .word 0x80020132 + 800091bc: 00000000 .word 0x00000000 + 800091c0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 196 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xc4c4c4c4c4c4c4c4 + 800091c4: 00033c83 ld x25,0(x6) + 800091c8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs2: x15 = 0xc4c4c4c4c4c4c4c4 + 800091cc: 00033783 ld x15,0(x6) + 800091d0: 00830313 addi x6,x6,8 + +00000000800091d4 : +Zksed_sm4ks_cg_cp_sbox_b196: + sm4ks x20, x25, x15, 3 # perform operation + 800091d4: f4fc8a33 sm4ks x20,x25,x15,0x3 + # Check if x20 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x20, Zksed_sm4ks_cg_cp_sbox_b196, Zksed_sm4ks_cg_cp_sbox_b196_str) + 800091d8: 00013203 ld x4,0(x2) + 800091dc: 01420c63 beq x4,x20,800091f4 + 800091e0: 7e1012ef jal x5,8000b1c0 + 800091e4: 800091d4 .word 0x800091d4 + 800091e8: 00000000 .word 0x00000000 + 800091ec: 8002016a .word 0x8002016a + 800091f0: 00000000 .word 0x00000000 + 800091f4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 197 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xc5c5c5c5c5c5c5c5 + 800091f8: 00033d83 ld x27,0(x6) + 800091fc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xc5c5c5c5c5c5c5c5 + 80009200: 00033703 ld x14,0(x6) + 80009204: 00830313 addi x6,x6,8 + +0000000080009208 : +Zksed_sm4ks_cg_cp_sbox_b197: + sm4ks x13, x27, x14, 0 # perform operation + 80009208: 34ed86b3 sm4ks x13,x27,x14,0x0 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b197, Zksed_sm4ks_cg_cp_sbox_b197_str) + 8000920c: 00013203 ld x4,0(x2) + 80009210: 00d20c63 beq x4,x13,80009228 + 80009214: 7ad012ef jal x5,8000b1c0 + 80009218: 80009208 .word 0x80009208 + 8000921c: 00000000 .word 0x00000000 + 80009220: 800201a2 .word 0x800201a2 + 80009224: 00000000 .word 0x00000000 + 80009228: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 198 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xc6c6c6c6c6c6c6c6 + 8000922c: 00033d83 ld x27,0(x6) + 80009230: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xc6c6c6c6c6c6c6c6 + 80009234: 00033c83 ld x25,0(x6) + 80009238: 00830313 addi x6,x6,8 + +000000008000923c : +Zksed_sm4ks_cg_cp_sbox_b198: + sm4ks x28, x27, x25, 1 # perform operation + 8000923c: 759d8e33 sm4ks x28,x27,x25,0x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksed_sm4ks_cg_cp_sbox_b198, Zksed_sm4ks_cg_cp_sbox_b198_str) + 80009240: 00013203 ld x4,0(x2) + 80009244: 01c20c63 beq x4,x28,8000925c + 80009248: 779012ef jal x5,8000b1c0 + 8000924c: 8000923c .word 0x8000923c + 80009250: 00000000 .word 0x00000000 + 80009254: 800201da .word 0x800201da + 80009258: 00000000 .word 0x00000000 + 8000925c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 199 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xc7c7c7c7c7c7c7c7 + 80009260: 00033983 ld x19,0(x6) + 80009264: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xc7c7c7c7c7c7c7c7 + 80009268: 00033703 ld x14,0(x6) + 8000926c: 00830313 addi x6,x6,8 + +0000000080009270 : +Zksed_sm4ks_cg_cp_sbox_b199: + sm4ks x1, x19, x14, 2 # perform operation + 80009270: b4e980b3 sm4ks x1,x19,x14,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b199, Zksed_sm4ks_cg_cp_sbox_b199_str) + 80009274: 00013203 ld x4,0(x2) + 80009278: 00120c63 beq x4,x1,80009290 + 8000927c: 745012ef jal x5,8000b1c0 + 80009280: 80009270 .word 0x80009270 + 80009284: 00000000 .word 0x00000000 + 80009288: 80020212 .word 0x80020212 + 8000928c: 00000000 .word 0x00000000 + 80009290: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 200 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xc8c8c8c8c8c8c8c8 + 80009294: 00033e03 ld x28,0(x6) + 80009298: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xc8c8c8c8c8c8c8c8 + 8000929c: 00033483 ld x9,0(x6) + 800092a0: 00830313 addi x6,x6,8 + +00000000800092a4 : +Zksed_sm4ks_cg_cp_sbox_b200: + sm4ks x12, x28, x9, 2 # perform operation + 800092a4: b49e0633 sm4ks x12,x28,x9,0x2 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b200, Zksed_sm4ks_cg_cp_sbox_b200_str) + 800092a8: 00013203 ld x4,0(x2) + 800092ac: 00c20c63 beq x4,x12,800092c4 + 800092b0: 711012ef jal x5,8000b1c0 + 800092b4: 800092a4 .word 0x800092a4 + 800092b8: 00000000 .word 0x00000000 + 800092bc: 8002024a .word 0x8002024a + 800092c0: 00000000 .word 0x00000000 + 800092c4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 201 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs1: x20 = 0xc9c9c9c9c9c9c9c9 + 800092c8: 00033a03 ld x20,0(x6) + 800092cc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xc9c9c9c9c9c9c9c9 + 800092d0: 00033e83 ld x29,0(x6) + 800092d4: 00830313 addi x6,x6,8 + +00000000800092d8 : +Zksed_sm4ks_cg_cp_sbox_b201: + sm4ks x25, x20, x29, 2 # perform operation + 800092d8: b5da0cb3 sm4ks x25,x20,x29,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b201, Zksed_sm4ks_cg_cp_sbox_b201_str) + 800092dc: 00013203 ld x4,0(x2) + 800092e0: 01920c63 beq x4,x25,800092f8 + 800092e4: 6dd012ef jal x5,8000b1c0 + 800092e8: 800092d8 .word 0x800092d8 + 800092ec: 00000000 .word 0x00000000 + 800092f0: 80020282 .word 0x80020282 + 800092f4: 00000000 .word 0x00000000 + 800092f8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 202 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xcacacacacacacaca + 800092fc: 00033083 ld x1,0(x6) + 80009300: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xcacacacacacacaca + 80009304: 00033f83 ld x31,0(x6) + 80009308: 00830313 addi x6,x6,8 + +000000008000930c : +Zksed_sm4ks_cg_cp_sbox_b202: + sm4ks x27, x1, x31, 0 # perform operation + 8000930c: 35f08db3 sm4ks x27,x1,x31,0x0 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b202, Zksed_sm4ks_cg_cp_sbox_b202_str) + 80009310: 00013203 ld x4,0(x2) + 80009314: 01b20c63 beq x4,x27,8000932c + 80009318: 6a9012ef jal x5,8000b1c0 + 8000931c: 8000930c .word 0x8000930c + 80009320: 00000000 .word 0x00000000 + 80009324: 800202ba .word 0x800202ba + 80009328: 00000000 .word 0x00000000 + 8000932c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 203 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xcbcbcbcbcbcbcbcb + 80009330: 00033c83 ld x25,0(x6) + 80009334: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xcbcbcbcbcbcbcbcb + 80009338: 00033903 ld x18,0(x6) + 8000933c: 00830313 addi x6,x6,8 + +0000000080009340 : +Zksed_sm4ks_cg_cp_sbox_b203: + sm4ks x10, x25, x18, 1 # perform operation + 80009340: 752c8533 sm4ks x10,x25,x18,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b203, Zksed_sm4ks_cg_cp_sbox_b203_str) + 80009344: 00013203 ld x4,0(x2) + 80009348: 00a20c63 beq x4,x10,80009360 + 8000934c: 675012ef jal x5,8000b1c0 + 80009350: 80009340 .word 0x80009340 + 80009354: 00000000 .word 0x00000000 + 80009358: 800202f2 .word 0x800202f2 + 8000935c: 00000000 .word 0x00000000 + 80009360: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 204 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xcccccccccccccccc + 80009364: 00033603 ld x12,0(x6) + 80009368: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xcccccccccccccccc + 8000936c: 00033c83 ld x25,0(x6) + 80009370: 00830313 addi x6,x6,8 + +0000000080009374 : +Zksed_sm4ks_cg_cp_sbox_b204: + sm4ks x15, x12, x25, 0 # perform operation + 80009374: 359607b3 sm4ks x15,x12,x25,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b204, Zksed_sm4ks_cg_cp_sbox_b204_str) + 80009378: 00013203 ld x4,0(x2) + 8000937c: 00f20c63 beq x4,x15,80009394 + 80009380: 641012ef jal x5,8000b1c0 + 80009384: 80009374 .word 0x80009374 + 80009388: 00000000 .word 0x00000000 + 8000938c: 8002032a .word 0x8002032a + 80009390: 00000000 .word 0x00000000 + 80009394: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 205 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xcdcdcdcdcdcdcdcd + 80009398: 00033f83 ld x31,0(x6) + 8000939c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xcdcdcdcdcdcdcdcd + 800093a0: 00033c03 ld x24,0(x6) + 800093a4: 00830313 addi x6,x6,8 + +00000000800093a8 : +Zksed_sm4ks_cg_cp_sbox_b205: + sm4ks x30, x31, x24, 2 # perform operation + 800093a8: b58f8f33 sm4ks x30,x31,x24,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b205, Zksed_sm4ks_cg_cp_sbox_b205_str) + 800093ac: 00013203 ld x4,0(x2) + 800093b0: 01e20c63 beq x4,x30,800093c8 + 800093b4: 60d012ef jal x5,8000b1c0 + 800093b8: 800093a8 .word 0x800093a8 + 800093bc: 00000000 .word 0x00000000 + 800093c0: 80020362 .word 0x80020362 + 800093c4: 00000000 .word 0x00000000 + 800093c8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 206 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xcececececececece + 800093cc: 00033b03 ld x22,0(x6) + 800093d0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x20) # load rs2: x20 = 0xcececececececece + 800093d4: 00033a03 ld x20,0(x6) + 800093d8: 00830313 addi x6,x6,8 + +00000000800093dc : +Zksed_sm4ks_cg_cp_sbox_b206: + sm4ks x31, x22, x20, 0 # perform operation + 800093dc: 354b0fb3 sm4ks x31,x22,x20,0x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksed_sm4ks_cg_cp_sbox_b206, Zksed_sm4ks_cg_cp_sbox_b206_str) + 800093e0: 00013203 ld x4,0(x2) + 800093e4: 01f20c63 beq x4,x31,800093fc + 800093e8: 5d9012ef jal x5,8000b1c0 + 800093ec: 800093dc .word 0x800093dc + 800093f0: 00000000 .word 0x00000000 + 800093f4: 8002039a .word 0x8002039a + 800093f8: 00000000 .word 0x00000000 + 800093fc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 207 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xcfcfcfcfcfcfcfcf + 80009400: 00033983 ld x19,0(x6) + 80009404: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xcfcfcfcfcfcfcfcf + 80009408: 00033b83 ld x23,0(x6) + 8000940c: 00830313 addi x6,x6,8 + +0000000080009410 : +Zksed_sm4ks_cg_cp_sbox_b207: + sm4ks x15, x19, x23, 3 # perform operation + 80009410: f57987b3 sm4ks x15,x19,x23,0x3 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b207, Zksed_sm4ks_cg_cp_sbox_b207_str) + 80009414: 00013203 ld x4,0(x2) + 80009418: 00f20c63 beq x4,x15,80009430 + 8000941c: 5a5012ef jal x5,8000b1c0 + 80009420: 80009410 .word 0x80009410 + 80009424: 00000000 .word 0x00000000 + 80009428: 800203d2 .word 0x800203d2 + 8000942c: 00000000 .word 0x00000000 + 80009430: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 208 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xd0d0d0d0d0d0d0d0 + 80009434: 00033803 ld x16,0(x6) + 80009438: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xd0d0d0d0d0d0d0d0 + 8000943c: 00033483 ld x9,0(x6) + 80009440: 00830313 addi x6,x6,8 + +0000000080009444 : +Zksed_sm4ks_cg_cp_sbox_b208: + sm4ks x12, x16, x9, 3 # perform operation + 80009444: f4980633 sm4ks x12,x16,x9,0x3 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b208, Zksed_sm4ks_cg_cp_sbox_b208_str) + 80009448: 00013203 ld x4,0(x2) + 8000944c: 00c20c63 beq x4,x12,80009464 + 80009450: 571012ef jal x5,8000b1c0 + 80009454: 80009444 .word 0x80009444 + 80009458: 00000000 .word 0x00000000 + 8000945c: 8002040a .word 0x8002040a + 80009460: 00000000 .word 0x00000000 + 80009464: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 209 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xd1d1d1d1d1d1d1d1 + 80009468: 00033983 ld x19,0(x6) + 8000946c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xd1d1d1d1d1d1d1d1 + 80009470: 00033e83 ld x29,0(x6) + 80009474: 00830313 addi x6,x6,8 + +0000000080009478 : +Zksed_sm4ks_cg_cp_sbox_b209: + sm4ks x11, x19, x29, 0 # perform operation + 80009478: 35d985b3 sm4ks x11,x19,x29,0x0 + # Check if x11 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x11, Zksed_sm4ks_cg_cp_sbox_b209, Zksed_sm4ks_cg_cp_sbox_b209_str) + 8000947c: 00013203 ld x4,0(x2) + 80009480: 00b20c63 beq x4,x11,80009498 + 80009484: 53d012ef jal x5,8000b1c0 + 80009488: 80009478 .word 0x80009478 + 8000948c: 00000000 .word 0x00000000 + 80009490: 80020442 .word 0x80020442 + 80009494: 00000000 .word 0x00000000 + 80009498: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 210 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xd2d2d2d2d2d2d2d2 + 8000949c: 00033c83 ld x25,0(x6) + 800094a0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xd2d2d2d2d2d2d2d2 + 800094a4: 00033703 ld x14,0(x6) + 800094a8: 00830313 addi x6,x6,8 + +00000000800094ac : +Zksed_sm4ks_cg_cp_sbox_b210: + sm4ks x16, x25, x14, 1 # perform operation + 800094ac: 74ec8833 sm4ks x16,x25,x14,0x1 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b210, Zksed_sm4ks_cg_cp_sbox_b210_str) + 800094b0: 00013203 ld x4,0(x2) + 800094b4: 01020c63 beq x4,x16,800094cc + 800094b8: 509012ef jal x5,8000b1c0 + 800094bc: 800094ac .word 0x800094ac + 800094c0: 00000000 .word 0x00000000 + 800094c4: 8002047a .word 0x8002047a + 800094c8: 00000000 .word 0x00000000 + 800094cc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 211 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xd3d3d3d3d3d3d3d3 + 800094d0: 00033803 ld x16,0(x6) + 800094d4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xd3d3d3d3d3d3d3d3 + 800094d8: 00033983 ld x19,0(x6) + 800094dc: 00830313 addi x6,x6,8 + +00000000800094e0 : +Zksed_sm4ks_cg_cp_sbox_b211: + sm4ks x15, x16, x19, 1 # perform operation + 800094e0: 753807b3 sm4ks x15,x16,x19,0x1 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b211, Zksed_sm4ks_cg_cp_sbox_b211_str) + 800094e4: 00013203 ld x4,0(x2) + 800094e8: 00f20c63 beq x4,x15,80009500 + 800094ec: 4d5012ef jal x5,8000b1c0 + 800094f0: 800094e0 .word 0x800094e0 + 800094f4: 00000000 .word 0x00000000 + 800094f8: 800204b2 .word 0x800204b2 + 800094fc: 00000000 .word 0x00000000 + 80009500: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 212 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xd4d4d4d4d4d4d4d4 + 80009504: 00033383 ld x7,0(x6) + 80009508: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs2: x25 = 0xd4d4d4d4d4d4d4d4 + 8000950c: 00033c83 ld x25,0(x6) + 80009510: 00830313 addi x6,x6,8 + +0000000080009514 : +Zksed_sm4ks_cg_cp_sbox_b212: + sm4ks x21, x7, x25, 2 # perform operation + 80009514: b5938ab3 sm4ks x21,x7,x25,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b212, Zksed_sm4ks_cg_cp_sbox_b212_str) + 80009518: 00013203 ld x4,0(x2) + 8000951c: 01520c63 beq x4,x21,80009534 + 80009520: 4a1012ef jal x5,8000b1c0 + 80009524: 80009514 .word 0x80009514 + 80009528: 00000000 .word 0x00000000 + 8000952c: 800204ea .word 0x800204ea + 80009530: 00000000 .word 0x00000000 + 80009534: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 213 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0xd5d5d5d5d5d5d5d5 + 80009538: 00033a83 ld x21,0(x6) + 8000953c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xd5d5d5d5d5d5d5d5 + 80009540: 00033c03 ld x24,0(x6) + 80009544: 00830313 addi x6,x6,8 + +0000000080009548 : +Zksed_sm4ks_cg_cp_sbox_b213: + sm4ks x9, x21, x24, 2 # perform operation + 80009548: b58a84b3 sm4ks x9,x21,x24,0x2 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b213, Zksed_sm4ks_cg_cp_sbox_b213_str) + 8000954c: 00013203 ld x4,0(x2) + 80009550: 00920c63 beq x4,x9,80009568 + 80009554: 46d012ef jal x5,8000b1c0 + 80009558: 80009548 .word 0x80009548 + 8000955c: 00000000 .word 0x00000000 + 80009560: 80020522 .word 0x80020522 + 80009564: 00000000 .word 0x00000000 + 80009568: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 214 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs1: x10 = 0xd6d6d6d6d6d6d6d6 + 8000956c: 00033503 ld x10,0(x6) + 80009570: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xd6d6d6d6d6d6d6d6 + 80009574: 00033903 ld x18,0(x6) + 80009578: 00830313 addi x6,x6,8 + +000000008000957c : +Zksed_sm4ks_cg_cp_sbox_b214: + sm4ks x21, x10, x18, 0 # perform operation + 8000957c: 35250ab3 sm4ks x21,x10,x18,0x0 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b214, Zksed_sm4ks_cg_cp_sbox_b214_str) + 80009580: 00013203 ld x4,0(x2) + 80009584: 01520c63 beq x4,x21,8000959c + 80009588: 439012ef jal x5,8000b1c0 + 8000958c: 8000957c .word 0x8000957c + 80009590: 00000000 .word 0x00000000 + 80009594: 8002055a .word 0x8002055a + 80009598: 00000000 .word 0x00000000 + 8000959c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 215 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xd7d7d7d7d7d7d7d7 + 800095a0: 00033f03 ld x30,0(x6) + 800095a4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xd7d7d7d7d7d7d7d7 + 800095a8: 00033a83 ld x21,0(x6) + 800095ac: 00830313 addi x6,x6,8 + +00000000800095b0 : +Zksed_sm4ks_cg_cp_sbox_b215: + sm4ks x7, x30, x21, 1 # perform operation + 800095b0: 755f03b3 sm4ks x7,x30,x21,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b215, Zksed_sm4ks_cg_cp_sbox_b215_str) + 800095b4: 00013203 ld x4,0(x2) + 800095b8: 00720c63 beq x4,x7,800095d0 + 800095bc: 405012ef jal x5,8000b1c0 + 800095c0: 800095b0 .word 0x800095b0 + 800095c4: 00000000 .word 0x00000000 + 800095c8: 80020592 .word 0x80020592 + 800095cc: 00000000 .word 0x00000000 + 800095d0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 216 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xd8d8d8d8d8d8d8d8 + 800095d4: 00033e83 ld x29,0(x6) + 800095d8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xd8d8d8d8d8d8d8d8 + 800095dc: 00033f03 ld x30,0(x6) + 800095e0: 00830313 addi x6,x6,8 + +00000000800095e4 : +Zksed_sm4ks_cg_cp_sbox_b216: + sm4ks x26, x29, x30, 0 # perform operation + 800095e4: 35ee8d33 sm4ks x26,x29,x30,0x0 + # Check if x26 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x26, Zksed_sm4ks_cg_cp_sbox_b216, Zksed_sm4ks_cg_cp_sbox_b216_str) + 800095e8: 00013203 ld x4,0(x2) + 800095ec: 01a20c63 beq x4,x26,80009604 + 800095f0: 3d1012ef jal x5,8000b1c0 + 800095f4: 800095e4 .word 0x800095e4 + 800095f8: 00000000 .word 0x00000000 + 800095fc: 800205ca .word 0x800205ca + 80009600: 00000000 .word 0x00000000 + 80009604: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 217 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xd9d9d9d9d9d9d9d9 + 80009608: 00033c83 ld x25,0(x6) + 8000960c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xd9d9d9d9d9d9d9d9 + 80009610: 00033b03 ld x22,0(x6) + 80009614: 00830313 addi x6,x6,8 + +0000000080009618 : +Zksed_sm4ks_cg_cp_sbox_b217: + sm4ks x9, x25, x22, 3 # perform operation + 80009618: f56c84b3 sm4ks x9,x25,x22,0x3 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b217, Zksed_sm4ks_cg_cp_sbox_b217_str) + 8000961c: 00013203 ld x4,0(x2) + 80009620: 00920c63 beq x4,x9,80009638 + 80009624: 39d012ef jal x5,8000b1c0 + 80009628: 80009618 .word 0x80009618 + 8000962c: 00000000 .word 0x00000000 + 80009630: 80020602 .word 0x80020602 + 80009634: 00000000 .word 0x00000000 + 80009638: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 218 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xdadadadadadadada + 8000963c: 00033d83 ld x27,0(x6) + 80009640: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xdadadadadadadada + 80009644: 00033483 ld x9,0(x6) + 80009648: 00830313 addi x6,x6,8 + +000000008000964c : +Zksed_sm4ks_cg_cp_sbox_b218: + sm4ks x14, x27, x9, 2 # perform operation + 8000964c: b49d8733 sm4ks x14,x27,x9,0x2 + # Check if x14 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x14, Zksed_sm4ks_cg_cp_sbox_b218, Zksed_sm4ks_cg_cp_sbox_b218_str) + 80009650: 00013203 ld x4,0(x2) + 80009654: 00e20c63 beq x4,x14,8000966c + 80009658: 369012ef jal x5,8000b1c0 + 8000965c: 8000964c .word 0x8000964c + 80009660: 00000000 .word 0x00000000 + 80009664: 8002063a .word 0x8002063a + 80009668: 00000000 .word 0x00000000 + 8000966c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 219 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xdbdbdbdbdbdbdbdb + 80009670: 00033b03 ld x22,0(x6) + 80009674: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xdbdbdbdbdbdbdbdb + 80009678: 00033e03 ld x28,0(x6) + 8000967c: 00830313 addi x6,x6,8 + +0000000080009680 : +Zksed_sm4ks_cg_cp_sbox_b219: + sm4ks x1, x22, x28, 2 # perform operation + 80009680: b5cb00b3 sm4ks x1,x22,x28,0x2 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b219, Zksed_sm4ks_cg_cp_sbox_b219_str) + 80009684: 00013203 ld x4,0(x2) + 80009688: 00120c63 beq x4,x1,800096a0 + 8000968c: 335012ef jal x5,8000b1c0 + 80009690: 80009680 .word 0x80009680 + 80009694: 00000000 .word 0x00000000 + 80009698: 80020672 .word 0x80020672 + 8000969c: 00000000 .word 0x00000000 + 800096a0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 220 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0xdcdcdcdcdcdcdcdc + 800096a4: 00033603 ld x12,0(x6) + 800096a8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xdcdcdcdcdcdcdcdc + 800096ac: 00033f03 ld x30,0(x6) + 800096b0: 00830313 addi x6,x6,8 + +00000000800096b4 : +Zksed_sm4ks_cg_cp_sbox_b220: + sm4ks x17, x12, x30, 0 # perform operation + 800096b4: 35e608b3 sm4ks x17,x12,x30,0x0 + # Check if x17 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x17, Zksed_sm4ks_cg_cp_sbox_b220, Zksed_sm4ks_cg_cp_sbox_b220_str) + 800096b8: 00013203 ld x4,0(x2) + 800096bc: 01120c63 beq x4,x17,800096d4 + 800096c0: 301012ef jal x5,8000b1c0 + 800096c4: 800096b4 .word 0x800096b4 + 800096c8: 00000000 .word 0x00000000 + 800096cc: 800206aa .word 0x800206aa + 800096d0: 00000000 .word 0x00000000 + 800096d4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 221 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xdddddddddddddddd + 800096d8: 00033983 ld x19,0(x6) + 800096dc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs2: x17 = 0xdddddddddddddddd + 800096e0: 00033883 ld x17,0(x6) + 800096e4: 00830313 addi x6,x6,8 + +00000000800096e8 : +Zksed_sm4ks_cg_cp_sbox_b221: + sm4ks x1, x19, x17, 3 # perform operation + 800096e8: f51980b3 sm4ks x1,x19,x17,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b221, Zksed_sm4ks_cg_cp_sbox_b221_str) + 800096ec: 00013203 ld x4,0(x2) + 800096f0: 00120c63 beq x4,x1,80009708 + 800096f4: 2cd012ef jal x5,8000b1c0 + 800096f8: 800096e8 .word 0x800096e8 + 800096fc: 00000000 .word 0x00000000 + 80009700: 800206e2 .word 0x800206e2 + 80009704: 00000000 .word 0x00000000 + 80009708: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 222 + RVTEST_TESTDATA_LOAD_INT(x6, x25) # load rs1: x25 = 0xdededededededede + 8000970c: 00033c83 ld x25,0(x6) + 80009710: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xdededededededede + 80009714: 00033f83 ld x31,0(x6) + 80009718: 00830313 addi x6,x6,8 + +000000008000971c : +Zksed_sm4ks_cg_cp_sbox_b222: + sm4ks x7, x25, x31, 1 # perform operation + 8000971c: 75fc83b3 sm4ks x7,x25,x31,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b222, Zksed_sm4ks_cg_cp_sbox_b222_str) + 80009720: 00013203 ld x4,0(x2) + 80009724: 00720c63 beq x4,x7,8000973c + 80009728: 299012ef jal x5,8000b1c0 + 8000972c: 8000971c .word 0x8000971c + 80009730: 00000000 .word 0x00000000 + 80009734: 8002071a .word 0x8002071a + 80009738: 00000000 .word 0x00000000 + 8000973c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 223 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xdfdfdfdfdfdfdfdf + 80009740: 00033683 ld x13,0(x6) + 80009744: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs2: x7 = 0xdfdfdfdfdfdfdfdf + 80009748: 00033383 ld x7,0(x6) + 8000974c: 00830313 addi x6,x6,8 + +0000000080009750 : +Zksed_sm4ks_cg_cp_sbox_b223: + sm4ks x19, x13, x7, 3 # perform operation + 80009750: f47689b3 sm4ks x19,x13,x7,0x3 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b223, Zksed_sm4ks_cg_cp_sbox_b223_str) + 80009754: 00013203 ld x4,0(x2) + 80009758: 01320c63 beq x4,x19,80009770 + 8000975c: 265012ef jal x5,8000b1c0 + 80009760: 80009750 .word 0x80009750 + 80009764: 00000000 .word 0x00000000 + 80009768: 80020752 .word 0x80020752 + 8000976c: 00000000 .word 0x00000000 + 80009770: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 224 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0xe0e0e0e0e0e0e0e0 + 80009774: 00033983 ld x19,0(x6) + 80009778: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xe0e0e0e0e0e0e0e0 + 8000977c: 00033903 ld x18,0(x6) + 80009780: 00830313 addi x6,x6,8 + +0000000080009784 : +Zksed_sm4ks_cg_cp_sbox_b224: + sm4ks x23, x19, x18, 2 # perform operation + 80009784: b5298bb3 sm4ks x23,x19,x18,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b224, Zksed_sm4ks_cg_cp_sbox_b224_str) + 80009788: 00013203 ld x4,0(x2) + 8000978c: 01720c63 beq x4,x23,800097a4 + 80009790: 231012ef jal x5,8000b1c0 + 80009794: 80009784 .word 0x80009784 + 80009798: 00000000 .word 0x00000000 + 8000979c: 8002078a .word 0x8002078a + 800097a0: 00000000 .word 0x00000000 + 800097a4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 225 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xe1e1e1e1e1e1e1e1 + 800097a8: 00033483 ld x9,0(x6) + 800097ac: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs2: x11 = 0xe1e1e1e1e1e1e1e1 + 800097b0: 00033583 ld x11,0(x6) + 800097b4: 00830313 addi x6,x6,8 + +00000000800097b8 : +Zksed_sm4ks_cg_cp_sbox_b225: + sm4ks x30, x9, x11, 1 # perform operation + 800097b8: 74b48f33 sm4ks x30,x9,x11,0x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b225, Zksed_sm4ks_cg_cp_sbox_b225_str) + 800097bc: 00013203 ld x4,0(x2) + 800097c0: 01e20c63 beq x4,x30,800097d8 + 800097c4: 1fd012ef jal x5,8000b1c0 + 800097c8: 800097b8 .word 0x800097b8 + 800097cc: 00000000 .word 0x00000000 + 800097d0: 800207c2 .word 0x800207c2 + 800097d4: 00000000 .word 0x00000000 + 800097d8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 226 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xe2e2e2e2e2e2e2e2 + 800097dc: 00033b03 ld x22,0(x6) + 800097e0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xe2e2e2e2e2e2e2e2 + 800097e4: 00033683 ld x13,0(x6) + 800097e8: 00830313 addi x6,x6,8 + +00000000800097ec : +Zksed_sm4ks_cg_cp_sbox_b226: + sm4ks x25, x22, x13, 3 # perform operation + 800097ec: f4db0cb3 sm4ks x25,x22,x13,0x3 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b226, Zksed_sm4ks_cg_cp_sbox_b226_str) + 800097f0: 00013203 ld x4,0(x2) + 800097f4: 01920c63 beq x4,x25,8000980c + 800097f8: 1c9012ef jal x5,8000b1c0 + 800097fc: 800097ec .word 0x800097ec + 80009800: 00000000 .word 0x00000000 + 80009804: 800207fa .word 0x800207fa + 80009808: 00000000 .word 0x00000000 + 8000980c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 227 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0xe3e3e3e3e3e3e3e3 + 80009810: 00033483 ld x9,0(x6) + 80009814: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xe3e3e3e3e3e3e3e3 + 80009818: 00033b83 ld x23,0(x6) + 8000981c: 00830313 addi x6,x6,8 + +0000000080009820 : +Zksed_sm4ks_cg_cp_sbox_b227: + sm4ks x7, x9, x23, 1 # perform operation + 80009820: 757483b3 sm4ks x7,x9,x23,0x1 + # Check if x7 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x7, Zksed_sm4ks_cg_cp_sbox_b227, Zksed_sm4ks_cg_cp_sbox_b227_str) + 80009824: 00013203 ld x4,0(x2) + 80009828: 00720c63 beq x4,x7,80009840 + 8000982c: 195012ef jal x5,8000b1c0 + 80009830: 80009820 .word 0x80009820 + 80009834: 00000000 .word 0x00000000 + 80009838: 80020832 .word 0x80020832 + 8000983c: 00000000 .word 0x00000000 + 80009840: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 228 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xe4e4e4e4e4e4e4e4 + 80009844: 00033703 ld x14,0(x6) + 80009848: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xe4e4e4e4e4e4e4e4 + 8000984c: 00033e03 ld x28,0(x6) + 80009850: 00830313 addi x6,x6,8 + +0000000080009854 : +Zksed_sm4ks_cg_cp_sbox_b228: + sm4ks x18, x14, x28, 2 # perform operation + 80009854: b5c70933 sm4ks x18,x14,x28,0x2 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b228, Zksed_sm4ks_cg_cp_sbox_b228_str) + 80009858: 00013203 ld x4,0(x2) + 8000985c: 01220c63 beq x4,x18,80009874 + 80009860: 161012ef jal x5,8000b1c0 + 80009864: 80009854 .word 0x80009854 + 80009868: 00000000 .word 0x00000000 + 8000986c: 8002086a .word 0x8002086a + 80009870: 00000000 .word 0x00000000 + 80009874: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 229 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xe5e5e5e5e5e5e5e5 + 80009878: 00033083 ld x1,0(x6) + 8000987c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xe5e5e5e5e5e5e5e5 + 80009880: 00033703 ld x14,0(x6) + 80009884: 00830313 addi x6,x6,8 + +0000000080009888 : +Zksed_sm4ks_cg_cp_sbox_b229: + sm4ks x27, x1, x14, 2 # perform operation + 80009888: b4e08db3 sm4ks x27,x1,x14,0x2 + # Check if x27 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x27, Zksed_sm4ks_cg_cp_sbox_b229, Zksed_sm4ks_cg_cp_sbox_b229_str) + 8000988c: 00013203 ld x4,0(x2) + 80009890: 01b20c63 beq x4,x27,800098a8 + 80009894: 12d012ef jal x5,8000b1c0 + 80009898: 80009888 .word 0x80009888 + 8000989c: 00000000 .word 0x00000000 + 800098a0: 800208a2 .word 0x800208a2 + 800098a4: 00000000 .word 0x00000000 + 800098a8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 230 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xe6e6e6e6e6e6e6e6 + 800098ac: 00033903 ld x18,0(x6) + 800098b0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs2: x30 = 0xe6e6e6e6e6e6e6e6 + 800098b4: 00033f03 ld x30,0(x6) + 800098b8: 00830313 addi x6,x6,8 + +00000000800098bc : +Zksed_sm4ks_cg_cp_sbox_b230: + sm4ks x21, x18, x30, 1 # perform operation + 800098bc: 75e90ab3 sm4ks x21,x18,x30,0x1 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b230, Zksed_sm4ks_cg_cp_sbox_b230_str) + 800098c0: 00013203 ld x4,0(x2) + 800098c4: 01520c63 beq x4,x21,800098dc + 800098c8: 0f9012ef jal x5,8000b1c0 + 800098cc: 800098bc .word 0x800098bc + 800098d0: 00000000 .word 0x00000000 + 800098d4: 800208da .word 0x800208da + 800098d8: 00000000 .word 0x00000000 + 800098dc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 231 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xe7e7e7e7e7e7e7e7 + 800098e0: 00033183 ld x3,0(x6) + 800098e4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs2: x12 = 0xe7e7e7e7e7e7e7e7 + 800098e8: 00033603 ld x12,0(x6) + 800098ec: 00830313 addi x6,x6,8 + +00000000800098f0 : +Zksed_sm4ks_cg_cp_sbox_b231: + sm4ks x18, x3, x12, 3 # perform operation + 800098f0: f4c18933 sm4ks x18,x3,x12,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b231, Zksed_sm4ks_cg_cp_sbox_b231_str) + 800098f4: 00013203 ld x4,0(x2) + 800098f8: 01220c63 beq x4,x18,80009910 + 800098fc: 0c5012ef jal x5,8000b1c0 + 80009900: 800098f0 .word 0x800098f0 + 80009904: 00000000 .word 0x00000000 + 80009908: 80020912 .word 0x80020912 + 8000990c: 00000000 .word 0x00000000 + 80009910: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 232 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0xe8e8e8e8e8e8e8e8 + 80009914: 00033183 ld x3,0(x6) + 80009918: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs2: x22 = 0xe8e8e8e8e8e8e8e8 + 8000991c: 00033b03 ld x22,0(x6) + 80009920: 00830313 addi x6,x6,8 + +0000000080009924 : +Zksed_sm4ks_cg_cp_sbox_b232: + sm4ks x25, x3, x22, 0 # perform operation + 80009924: 35618cb3 sm4ks x25,x3,x22,0x0 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b232, Zksed_sm4ks_cg_cp_sbox_b232_str) + 80009928: 00013203 ld x4,0(x2) + 8000992c: 01920c63 beq x4,x25,80009944 + 80009930: 091012ef jal x5,8000b1c0 + 80009934: 80009924 .word 0x80009924 + 80009938: 00000000 .word 0x00000000 + 8000993c: 8002094a .word 0x8002094a + 80009940: 00000000 .word 0x00000000 + 80009944: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 233 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs1: x28 = 0xe9e9e9e9e9e9e9e9 + 80009948: 00033e03 ld x28,0(x6) + 8000994c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xe9e9e9e9e9e9e9e9 + 80009950: 00033083 ld x1,0(x6) + 80009954: 00830313 addi x6,x6,8 + +0000000080009958 : +Zksed_sm4ks_cg_cp_sbox_b233: + sm4ks x3, x28, x1, 3 # perform operation + 80009958: f41e01b3 sm4ks x3,x28,x1,0x3 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b233, Zksed_sm4ks_cg_cp_sbox_b233_str) + 8000995c: 00013203 ld x4,0(x2) + 80009960: 00320c63 beq x4,x3,80009978 + 80009964: 05d012ef jal x5,8000b1c0 + 80009968: 80009958 .word 0x80009958 + 8000996c: 00000000 .word 0x00000000 + 80009970: 80020982 .word 0x80020982 + 80009974: 00000000 .word 0x00000000 + 80009978: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 234 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xeaeaeaeaeaeaeaea + 8000997c: 00033803 ld x16,0(x6) + 80009980: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs2: x8 = 0xeaeaeaeaeaeaeaea + 80009984: 00033403 ld x8,0(x6) + 80009988: 00830313 addi x6,x6,8 + +000000008000998c : +Zksed_sm4ks_cg_cp_sbox_b234: + sm4ks x18, x16, x8, 3 # perform operation + 8000998c: f4880933 sm4ks x18,x16,x8,0x3 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b234, Zksed_sm4ks_cg_cp_sbox_b234_str) + 80009990: 00013203 ld x4,0(x2) + 80009994: 01220c63 beq x4,x18,800099ac + 80009998: 029012ef jal x5,8000b1c0 + 8000999c: 8000998c .word 0x8000998c + 800099a0: 00000000 .word 0x00000000 + 800099a4: 800209ba .word 0x800209ba + 800099a8: 00000000 .word 0x00000000 + 800099ac: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 235 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xebebebebebebebeb + 800099b0: 00033903 ld x18,0(x6) + 800099b4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xebebebebebebebeb + 800099b8: 00033b83 ld x23,0(x6) + 800099bc: 00830313 addi x6,x6,8 + +00000000800099c0 : +Zksed_sm4ks_cg_cp_sbox_b235: + sm4ks x3, x18, x23, 3 # perform operation + 800099c0: f57901b3 sm4ks x3,x18,x23,0x3 + # Check if x3 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x3, Zksed_sm4ks_cg_cp_sbox_b235, Zksed_sm4ks_cg_cp_sbox_b235_str) + 800099c4: 00013203 ld x4,0(x2) + 800099c8: 00320c63 beq x4,x3,800099e0 + 800099cc: 7f4012ef jal x5,8000b1c0 + 800099d0: 800099c0 .word 0x800099c0 + 800099d4: 00000000 .word 0x00000000 + 800099d8: 800209f2 .word 0x800209f2 + 800099dc: 00000000 .word 0x00000000 + 800099e0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 236 + RVTEST_TESTDATA_LOAD_INT(x6, x15) # load rs1: x15 = 0xecececececececec + 800099e4: 00033783 ld x15,0(x6) + 800099e8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x10) # load rs2: x10 = 0xecececececececec + 800099ec: 00033503 ld x10,0(x6) + 800099f0: 00830313 addi x6,x6,8 + +00000000800099f4 : +Zksed_sm4ks_cg_cp_sbox_b236: + sm4ks x9, x15, x10, 0 # perform operation + 800099f4: 34a784b3 sm4ks x9,x15,x10,0x0 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b236, Zksed_sm4ks_cg_cp_sbox_b236_str) + 800099f8: 00013203 ld x4,0(x2) + 800099fc: 00920c63 beq x4,x9,80009a14 + 80009a00: 7c0012ef jal x5,8000b1c0 + 80009a04: 800099f4 .word 0x800099f4 + 80009a08: 00000000 .word 0x00000000 + 80009a0c: 80020a2a .word 0x80020a2a + 80009a10: 00000000 .word 0x00000000 + 80009a14: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 237 + RVTEST_TESTDATA_LOAD_INT(x6, x27) # load rs1: x27 = 0xedededededededed + 80009a18: 00033d83 ld x27,0(x6) + 80009a1c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x28) # load rs2: x28 = 0xedededededededed + 80009a20: 00033e03 ld x28,0(x6) + 80009a24: 00830313 addi x6,x6,8 + +0000000080009a28 : +Zksed_sm4ks_cg_cp_sbox_b237: + sm4ks x25, x27, x28, 2 # perform operation + 80009a28: b5cd8cb3 sm4ks x25,x27,x28,0x2 + # Check if x25 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x25, Zksed_sm4ks_cg_cp_sbox_b237, Zksed_sm4ks_cg_cp_sbox_b237_str) + 80009a2c: 00013203 ld x4,0(x2) + 80009a30: 01920c63 beq x4,x25,80009a48 + 80009a34: 78c012ef jal x5,8000b1c0 + 80009a38: 80009a28 .word 0x80009a28 + 80009a3c: 00000000 .word 0x00000000 + 80009a40: 80020a62 .word 0x80020a62 + 80009a44: 00000000 .word 0x00000000 + 80009a48: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 238 + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xeeeeeeeeeeeeeeee + 80009a4c: 00033883 ld x17,0(x6) + 80009a50: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xeeeeeeeeeeeeeeee + 80009a54: 00033183 ld x3,0(x6) + 80009a58: 00830313 addi x6,x6,8 + +0000000080009a5c : +Zksed_sm4ks_cg_cp_sbox_b238: + sm4ks x15, x17, x3, 0 # perform operation + 80009a5c: 343887b3 sm4ks x15,x17,x3,0x0 + # Check if x15 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x15, Zksed_sm4ks_cg_cp_sbox_b238, Zksed_sm4ks_cg_cp_sbox_b238_str) + 80009a60: 00013203 ld x4,0(x2) + 80009a64: 00f20c63 beq x4,x15,80009a7c + 80009a68: 758012ef jal x5,8000b1c0 + 80009a6c: 80009a5c .word 0x80009a5c + 80009a70: 00000000 .word 0x00000000 + 80009a74: 80020a9a .word 0x80020a9a + 80009a78: 00000000 .word 0x00000000 + 80009a7c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 239 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xefefefefefefefef + 80009a80: 00033683 ld x13,0(x6) + 80009a84: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs2: x29 = 0xefefefefefefefef + 80009a88: 00033e83 ld x29,0(x6) + 80009a8c: 00830313 addi x6,x6,8 + +0000000080009a90 : +Zksed_sm4ks_cg_cp_sbox_b239: + sm4ks x19, x13, x29, 1 # perform operation + 80009a90: 75d689b3 sm4ks x19,x13,x29,0x1 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b239, Zksed_sm4ks_cg_cp_sbox_b239_str) + 80009a94: 00013203 ld x4,0(x2) + 80009a98: 01320c63 beq x4,x19,80009ab0 + 80009a9c: 724012ef jal x5,8000b1c0 + 80009aa0: 80009a90 .word 0x80009a90 + 80009aa4: 00000000 .word 0x00000000 + 80009aa8: 80020ad2 .word 0x80020ad2 + 80009aac: 00000000 .word 0x00000000 + 80009ab0: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 240 + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0xf0f0f0f0f0f0f0f0 + 80009ab4: 00033e83 ld x29,0(x6) + 80009ab8: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xf0f0f0f0f0f0f0f0 + 80009abc: 00033183 ld x3,0(x6) + 80009ac0: 00830313 addi x6,x6,8 + +0000000080009ac4 : +Zksed_sm4ks_cg_cp_sbox_b240: + sm4ks x18, x29, x3, 0 # perform operation + 80009ac4: 343e8933 sm4ks x18,x29,x3,0x0 + # Check if x18 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x18, Zksed_sm4ks_cg_cp_sbox_b240, Zksed_sm4ks_cg_cp_sbox_b240_str) + 80009ac8: 00013203 ld x4,0(x2) + 80009acc: 01220c63 beq x4,x18,80009ae4 + 80009ad0: 6f0012ef jal x5,8000b1c0 + 80009ad4: 80009ac4 .word 0x80009ac4 + 80009ad8: 00000000 .word 0x00000000 + 80009adc: 80020b0a .word 0x80020b0a + 80009ae0: 00000000 .word 0x00000000 + 80009ae4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 241 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs1: x14 = 0xf1f1f1f1f1f1f1f1 + 80009ae8: 00033703 ld x14,0(x6) + 80009aec: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xf1f1f1f1f1f1f1f1 + 80009af0: 00033b83 ld x23,0(x6) + 80009af4: 00830313 addi x6,x6,8 + +0000000080009af8 : +Zksed_sm4ks_cg_cp_sbox_b241: + sm4ks x10, x14, x23, 1 # perform operation + 80009af8: 75770533 sm4ks x10,x14,x23,0x1 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b241, Zksed_sm4ks_cg_cp_sbox_b241_str) + 80009afc: 00013203 ld x4,0(x2) + 80009b00: 00a20c63 beq x4,x10,80009b18 + 80009b04: 6bc012ef jal x5,8000b1c0 + 80009b08: 80009af8 .word 0x80009af8 + 80009b0c: 00000000 .word 0x00000000 + 80009b10: 80020b42 .word 0x80020b42 + 80009b14: 00000000 .word 0x00000000 + 80009b18: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 242 + RVTEST_TESTDATA_LOAD_INT(x6, x30) # load rs1: x30 = 0xf2f2f2f2f2f2f2f2 + 80009b1c: 00033f03 ld x30,0(x6) + 80009b20: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs2: x9 = 0xf2f2f2f2f2f2f2f2 + 80009b24: 00033483 ld x9,0(x6) + 80009b28: 00830313 addi x6,x6,8 + +0000000080009b2c : +Zksed_sm4ks_cg_cp_sbox_b242: + sm4ks x19, x30, x9, 2 # perform operation + 80009b2c: b49f09b3 sm4ks x19,x30,x9,0x2 + # Check if x19 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x19, Zksed_sm4ks_cg_cp_sbox_b242, Zksed_sm4ks_cg_cp_sbox_b242_str) + 80009b30: 00013203 ld x4,0(x2) + 80009b34: 01320c63 beq x4,x19,80009b4c + 80009b38: 688012ef jal x5,8000b1c0 + 80009b3c: 80009b2c .word 0x80009b2c + 80009b40: 00000000 .word 0x00000000 + 80009b44: 80020b7a .word 0x80020b7a + 80009b48: 00000000 .word 0x00000000 + 80009b4c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 243 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xf3f3f3f3f3f3f3f3 + 80009b50: 00033b03 ld x22,0(x6) + 80009b54: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs2: x18 = 0xf3f3f3f3f3f3f3f3 + 80009b58: 00033903 ld x18,0(x6) + 80009b5c: 00830313 addi x6,x6,8 + +0000000080009b60 : +Zksed_sm4ks_cg_cp_sbox_b243: + sm4ks x23, x22, x18, 2 # perform operation + 80009b60: b52b0bb3 sm4ks x23,x22,x18,0x2 + # Check if x23 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x23, Zksed_sm4ks_cg_cp_sbox_b243, Zksed_sm4ks_cg_cp_sbox_b243_str) + 80009b64: 00013203 ld x4,0(x2) + 80009b68: 01720c63 beq x4,x23,80009b80 + 80009b6c: 654012ef jal x5,8000b1c0 + 80009b70: 80009b60 .word 0x80009b60 + 80009b74: 00000000 .word 0x00000000 + 80009b78: 80020bb2 .word 0x80020bb2 + 80009b7c: 00000000 .word 0x00000000 + 80009b80: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 244 + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0xf4f4f4f4f4f4f4f4 + 80009b84: 00033803 ld x16,0(x6) + 80009b88: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs2: x13 = 0xf4f4f4f4f4f4f4f4 + 80009b8c: 00033683 ld x13,0(x6) + 80009b90: 00830313 addi x6,x6,8 + +0000000080009b94 : +Zksed_sm4ks_cg_cp_sbox_b244: + sm4ks x30, x16, x13, 2 # perform operation + 80009b94: b4d80f33 sm4ks x30,x16,x13,0x2 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b244, Zksed_sm4ks_cg_cp_sbox_b244_str) + 80009b98: 00013203 ld x4,0(x2) + 80009b9c: 01e20c63 beq x4,x30,80009bb4 + 80009ba0: 620012ef jal x5,8000b1c0 + 80009ba4: 80009b94 .word 0x80009b94 + 80009ba8: 00000000 .word 0x00000000 + 80009bac: 80020bea .word 0x80020bea + 80009bb0: 00000000 .word 0x00000000 + 80009bb4: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 245 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xf5f5f5f5f5f5f5f5 + 80009bb8: 00033683 ld x13,0(x6) + 80009bbc: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs2: x1 = 0xf5f5f5f5f5f5f5f5 + 80009bc0: 00033083 ld x1,0(x6) + 80009bc4: 00830313 addi x6,x6,8 + +0000000080009bc8 : +Zksed_sm4ks_cg_cp_sbox_b245: + sm4ks x30, x13, x1, 0 # perform operation + 80009bc8: 34168f33 sm4ks x30,x13,x1,0x0 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksed_sm4ks_cg_cp_sbox_b245, Zksed_sm4ks_cg_cp_sbox_b245_str) + 80009bcc: 00013203 ld x4,0(x2) + 80009bd0: 01e20c63 beq x4,x30,80009be8 + 80009bd4: 5ec012ef jal x5,8000b1c0 + 80009bd8: 80009bc8 .word 0x80009bc8 + 80009bdc: 00000000 .word 0x00000000 + 80009be0: 80020c22 .word 0x80020c22 + 80009be4: 00000000 .word 0x00000000 + 80009be8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 246 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xf6f6f6f6f6f6f6f6 + 80009bec: 00033c03 ld x24,0(x6) + 80009bf0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x23) # load rs2: x23 = 0xf6f6f6f6f6f6f6f6 + 80009bf4: 00033b83 ld x23,0(x6) + 80009bf8: 00830313 addi x6,x6,8 + +0000000080009bfc : +Zksed_sm4ks_cg_cp_sbox_b246: + sm4ks x9, x24, x23, 1 # perform operation + 80009bfc: 757c04b3 sm4ks x9,x24,x23,0x1 + # Check if x9 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x9, Zksed_sm4ks_cg_cp_sbox_b246, Zksed_sm4ks_cg_cp_sbox_b246_str) + 80009c00: 00013203 ld x4,0(x2) + 80009c04: 00920c63 beq x4,x9,80009c1c + 80009c08: 5b8012ef jal x5,8000b1c0 + 80009c0c: 80009bfc .word 0x80009bfc + 80009c10: 00000000 .word 0x00000000 + 80009c14: 80020c5a .word 0x80020c5a + 80009c18: 00000000 .word 0x00000000 + 80009c1c: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 247 + RVTEST_TESTDATA_LOAD_INT(x6, x7) # load rs1: x7 = 0xf7f7f7f7f7f7f7f7 + 80009c20: 00033383 ld x7,0(x6) + 80009c24: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs2: x26 = 0xf7f7f7f7f7f7f7f7 + 80009c28: 00033d03 ld x26,0(x6) + 80009c2c: 00830313 addi x6,x6,8 + +0000000080009c30 : +Zksed_sm4ks_cg_cp_sbox_b247: + sm4ks x12, x7, x26, 2 # perform operation + 80009c30: b5a38633 sm4ks x12,x7,x26,0x2 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b247, Zksed_sm4ks_cg_cp_sbox_b247_str) + 80009c34: 00013203 ld x4,0(x2) + 80009c38: 00c20c63 beq x4,x12,80009c50 + 80009c3c: 584012ef jal x5,8000b1c0 + 80009c40: 80009c30 .word 0x80009c30 + 80009c44: 00000000 .word 0x00000000 + 80009c48: 80020c92 .word 0x80020c92 + 80009c4c: 00000000 .word 0x00000000 + 80009c50: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 248 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs1: x24 = 0xf8f8f8f8f8f8f8f8 + 80009c54: 00033c03 ld x24,0(x6) + 80009c58: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs2: x21 = 0xf8f8f8f8f8f8f8f8 + 80009c5c: 00033a83 ld x21,0(x6) + 80009c60: 00830313 addi x6,x6,8 + +0000000080009c64 : +Zksed_sm4ks_cg_cp_sbox_b248: + sm4ks x1, x24, x21, 0 # perform operation + 80009c64: 355c00b3 sm4ks x1,x24,x21,0x0 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b248, Zksed_sm4ks_cg_cp_sbox_b248_str) + 80009c68: 00013203 ld x4,0(x2) + 80009c6c: 00120c63 beq x4,x1,80009c84 + 80009c70: 550012ef jal x5,8000b1c0 + 80009c74: 80009c64 .word 0x80009c64 + 80009c78: 00000000 .word 0x00000000 + 80009c7c: 80020cca .word 0x80020cca + 80009c80: 00000000 .word 0x00000000 + 80009c84: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 249 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xf9f9f9f9f9f9f9f9 + 80009c88: 00033403 ld x8,0(x6) + 80009c8c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs2: x19 = 0xf9f9f9f9f9f9f9f9 + 80009c90: 00033983 ld x19,0(x6) + 80009c94: 00830313 addi x6,x6,8 + +0000000080009c98 : +Zksed_sm4ks_cg_cp_sbox_b249: + sm4ks x12, x8, x19, 2 # perform operation + 80009c98: b5340633 sm4ks x12,x8,x19,0x2 + # Check if x12 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x12, Zksed_sm4ks_cg_cp_sbox_b249, Zksed_sm4ks_cg_cp_sbox_b249_str) + 80009c9c: 00013203 ld x4,0(x2) + 80009ca0: 00c20c63 beq x4,x12,80009cb8 + 80009ca4: 51c012ef jal x5,8000b1c0 + 80009ca8: 80009c98 .word 0x80009c98 + 80009cac: 00000000 .word 0x00000000 + 80009cb0: 80020d02 .word 0x80020d02 + 80009cb4: 00000000 .word 0x00000000 + 80009cb8: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 250 + RVTEST_TESTDATA_LOAD_INT(x6, x11) # load rs1: x11 = 0xfafafafafafafafa + 80009cbc: 00033583 ld x11,0(x6) + 80009cc0: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x14) # load rs2: x14 = 0xfafafafafafafafa + 80009cc4: 00033703 ld x14,0(x6) + 80009cc8: 00830313 addi x6,x6,8 + +0000000080009ccc : +Zksed_sm4ks_cg_cp_sbox_b250: + sm4ks x10, x11, x14, 3 # perform operation + 80009ccc: f4e58533 sm4ks x10,x11,x14,0x3 + # Check if x10 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x10, Zksed_sm4ks_cg_cp_sbox_b250, Zksed_sm4ks_cg_cp_sbox_b250_str) + 80009cd0: 00013203 ld x4,0(x2) + 80009cd4: 00a20c63 beq x4,x10,80009cec + 80009cd8: 4e8012ef jal x5,8000b1c0 + 80009cdc: 80009ccc .word 0x80009ccc + 80009ce0: 00000000 .word 0x00000000 + 80009ce4: 80020d3a .word 0x80020d3a + 80009ce8: 00000000 .word 0x00000000 + 80009cec: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 251 + RVTEST_TESTDATA_LOAD_INT(x6, x26) # load rs1: x26 = 0xfbfbfbfbfbfbfbfb + 80009cf0: 00033d03 ld x26,0(x6) + 80009cf4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xfbfbfbfbfbfbfbfb + 80009cf8: 00033c03 ld x24,0(x6) + 80009cfc: 00830313 addi x6,x6,8 + +0000000080009d00 : +Zksed_sm4ks_cg_cp_sbox_b251: + sm4ks x21, x26, x24, 2 # perform operation + 80009d00: b58d0ab3 sm4ks x21,x26,x24,0x2 + # Check if x21 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x21, Zksed_sm4ks_cg_cp_sbox_b251, Zksed_sm4ks_cg_cp_sbox_b251_str) + 80009d04: 00013203 ld x4,0(x2) + 80009d08: 01520c63 beq x4,x21,80009d20 + 80009d0c: 4b4012ef jal x5,8000b1c0 + 80009d10: 80009d00 .word 0x80009d00 + 80009d14: 00000000 .word 0x00000000 + 80009d18: 80020d72 .word 0x80020d72 + 80009d1c: 00000000 .word 0x00000000 + 80009d20: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 252 + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0xfcfcfcfcfcfcfcfc + 80009d24: 00033b03 ld x22,0(x6) + 80009d28: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xfcfcfcfcfcfcfcfc + 80009d2c: 00033f83 ld x31,0(x6) + 80009d30: 00830313 addi x6,x6,8 + +0000000080009d34 : +Zksed_sm4ks_cg_cp_sbox_b252: + sm4ks x13, x22, x31, 3 # perform operation + 80009d34: f5fb06b3 sm4ks x13,x22,x31,0x3 + # Check if x13 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x13, Zksed_sm4ks_cg_cp_sbox_b252, Zksed_sm4ks_cg_cp_sbox_b252_str) + 80009d38: 00013203 ld x4,0(x2) + 80009d3c: 00d20c63 beq x4,x13,80009d54 + 80009d40: 480012ef jal x5,8000b1c0 + 80009d44: 80009d34 .word 0x80009d34 + 80009d48: 00000000 .word 0x00000000 + 80009d4c: 80020daa .word 0x80020daa + 80009d50: 00000000 .word 0x00000000 + 80009d54: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 253 + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xfdfdfdfdfdfdfdfd + 80009d58: 00033403 ld x8,0(x6) + 80009d5c: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs2: x31 = 0xfdfdfdfdfdfdfdfd + 80009d60: 00033f83 ld x31,0(x6) + 80009d64: 00830313 addi x6,x6,8 + +0000000080009d68 : +Zksed_sm4ks_cg_cp_sbox_b253: + sm4ks x1, x8, x31, 3 # perform operation + 80009d68: f5f400b3 sm4ks x1,x8,x31,0x3 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b253, Zksed_sm4ks_cg_cp_sbox_b253_str) + 80009d6c: 00013203 ld x4,0(x2) + 80009d70: 00120c63 beq x4,x1,80009d88 + 80009d74: 44c012ef jal x5,8000b1c0 + 80009d78: 80009d68 .word 0x80009d68 + 80009d7c: 00000000 .word 0x00000000 + 80009d80: 80020de2 .word 0x80020de2 + 80009d84: 00000000 .word 0x00000000 + 80009d88: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 254 + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0xfefefefefefefefe + 80009d8c: 00033f83 ld x31,0(x6) + 80009d90: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x24) # load rs2: x24 = 0xfefefefefefefefe + 80009d94: 00033c03 ld x24,0(x6) + 80009d98: 00830313 addi x6,x6,8 + +0000000080009d9c : +Zksed_sm4ks_cg_cp_sbox_b254: + sm4ks x1, x31, x24, 1 # perform operation + 80009d9c: 758f80b3 sm4ks x1,x31,x24,0x1 + # Check if x1 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x1, Zksed_sm4ks_cg_cp_sbox_b254, Zksed_sm4ks_cg_cp_sbox_b254_str) + 80009da0: 00013203 ld x4,0(x2) + 80009da4: 00120c63 beq x4,x1,80009dbc + 80009da8: 418012ef jal x5,8000b1c0 + 80009dac: 80009d9c .word 0x80009d9c + 80009db0: 00000000 .word 0x00000000 + 80009db4: 80020e1a .word 0x80020e1a + 80009db8: 00000000 .word 0x00000000 + 80009dbc: 00810113 addi x2,x2,8 + +# Testcase cp_sbox = 255 + RVTEST_TESTDATA_LOAD_INT(x6, x13) # load rs1: x13 = 0xffffffffffffffff + 80009dc0: 00033683 ld x13,0(x6) + 80009dc4: 00830313 addi x6,x6,8 + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs2: x3 = 0xffffffffffffffff + 80009dc8: 00033183 ld x3,0(x6) + 80009dcc: 00830313 addi x6,x6,8 + +0000000080009dd0 : +Zksed_sm4ks_cg_cp_sbox_b255: + sm4ks x16, x13, x3, 2 # perform operation + 80009dd0: b4368833 sm4ks x16,x13,x3,0x2 + # Check if x16 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x16, Zksed_sm4ks_cg_cp_sbox_b255, Zksed_sm4ks_cg_cp_sbox_b255_str) + 80009dd4: 00013203 ld x4,0(x2) + 80009dd8: 01020c63 beq x4,x16,80009df0 + 80009ddc: 3e4012ef jal x5,8000b1c0 + 80009de0: 80009dd0 .word 0x80009dd0 + 80009de4: 00000000 .word 0x00000000 + 80009de8: 80020e52 .word 0x80020e52 + 80009dec: 00000000 .word 0x00000000 + 80009df0: 00810113 addi x2,x2,8 + +0000000080009df4 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 80009df4: 00000513 addi x10,x0,0 + 80009df8: 00000073 ecall + 80009dfc: fff00513 addi x10,x0,-1 + 80009e00: 25800413 addi x8,x0,600 + +0000000080009e04 : + 80009e04: 34002373 csrrs x6,mscratch,x0 + +0000000080009e08 : + 80009e08: 2b833383 ld x7,696(x6) + +0000000080009e0c : + 80009e0c: 2a033383 ld x7,672(x6) + +0000000080009e10 : + 80009e10: 2d033483 ld x9,720(x6) + 80009e14: 34049073 csrrw x0,mscratch,x9 + +0000000080009e18 : + 80009e18: 2c833483 ld x9,712(x6) + 80009e1c: 305493f3 csrrw x7,mtvec,x9 + 80009e20: ffc4f493 andi x9,x9,-4 + 80009e24: ffc3f393 andi x7,x7,-4 + 80009e28: 00749e63 bne x9,x7,80009e44 + +0000000080009e2c : + 80009e2c: 00030493 addi x9,x6,0 + +0000000080009e30 : + 80009e30: 0004a783 lw x15,0(x9) + 80009e34: 00f3a023 sw x15,0(x7) + 80009e38: 00438393 addi x7,x7,4 + 80009e3c: 00448493 addi x9,x9,4 + 80009e40: fe83c8e3 blt x7,x8,80009e30 + 80009e44: 0000100f fence.i + +0000000080009e48 : + 80009e48: 00000013 addi x0,x0,0 + 80009e4c: 00000013 addi x0,x0,0 + 80009e50: 00000013 addi x0,x0,0 + 80009e54: 00000013 addi x0,x0,0 + 80009e58: 00000013 addi x0,x0,0 + 80009e5c: 00000013 addi x0,x0,0 + 80009e60: 00000497 auipc x9,0x0 + 80009e64: 2b048493 addi x9,x9,688 # 8000a110 + 80009e68: 00000013 addi x0,x0,0 + 80009e6c: 00000013 addi x0,x0,0 + 80009e70: 00000013 addi x0,x0,0 + 80009e74: 00000013 addi x0,x0,0 + 80009e78: 00000013 addi x0,x0,0 + 80009e7c: 00000013 addi x0,x0,0 + 80009e80: 10e49863 bne x9,x14,80009f90 + 80009e84: 00000013 addi x0,x0,0 + 80009e88: 00000013 addi x0,x0,0 + 80009e8c: 00000013 addi x0,x0,0 + 80009e90: 00000013 addi x0,x0,0 + 80009e94: 00000013 addi x0,x0,0 + 80009e98: 00000013 addi x0,x0,0 + 80009e9c: 00000013 addi x0,x0,0 + 80009ea0: 00017517 auipc x10,0x17 + 80009ea4: 71050513 addi x10,x10,1808 # 800215b0 + 80009ea8: 00000013 addi x0,x0,0 + 80009eac: 00000013 addi x0,x0,0 + 80009eb0: 00000013 addi x0,x0,0 + 80009eb4: 00000013 addi x0,x0,0 + 80009eb8: 00000013 addi x0,x0,0 + 80009ebc: 00000013 addi x0,x0,0 + 80009ec0: 00038097 auipc x1,0x38 + 80009ec4: 6e4080e7 jalr x1,1764(x1) # 800425a4 + 80009ec8: 00000013 addi x0,x0,0 + 80009ecc: 00000013 addi x0,x0,0 + 80009ed0: 00000013 addi x0,x0,0 + 80009ed4: 00000013 addi x0,x0,0 + 80009ed8: 00000013 addi x0,x0,0 + 80009edc: 00000013 addi x0,x0,0 + 80009ee0: 00017517 auipc x10,0x17 + 80009ee4: 70b50513 addi x10,x10,1803 # 800215eb + 80009ee8: 00000013 addi x0,x0,0 + 80009eec: 00000013 addi x0,x0,0 + 80009ef0: 00000013 addi x0,x0,0 + 80009ef4: 00000013 addi x0,x0,0 + 80009ef8: 00000013 addi x0,x0,0 + 80009efc: 00000013 addi x0,x0,0 + 80009f00: 00038097 auipc x1,0x38 + 80009f04: 6a4080e7 jalr x1,1700(x1) # 800425a4 + 80009f08: 00000013 addi x0,x0,0 + 80009f0c: 00000013 addi x0,x0,0 + 80009f10: 00000013 addi x0,x0,0 + 80009f14: 00000013 addi x0,x0,0 + 80009f18: 00000013 addi x0,x0,0 + 80009f1c: 00000013 addi x0,x0,0 + 80009f20: 00017517 auipc x10,0x17 + 80009f24: 72b50513 addi x10,x10,1835 # 8002164b + 80009f28: 00000013 addi x0,x0,0 + 80009f2c: 00000013 addi x0,x0,0 + 80009f30: 00000013 addi x0,x0,0 + 80009f34: 00000013 addi x0,x0,0 + 80009f38: 00000013 addi x0,x0,0 + 80009f3c: 00000013 addi x0,x0,0 + 80009f40: 00038097 auipc x1,0x38 + 80009f44: 664080e7 jalr x1,1636(x1) # 800425a4 + 80009f48: 00000013 addi x0,x0,0 + 80009f4c: 00000013 addi x0,x0,0 + 80009f50: 00000013 addi x0,x0,0 + 80009f54: 00000013 addi x0,x0,0 + 80009f58: 00000013 addi x0,x0,0 + 80009f5c: 00000013 addi x0,x0,0 + 80009f60: 00018517 auipc x10,0x18 + 80009f64: 29650513 addi x10,x10,662 # 800221f6 + 80009f68: 00000013 addi x0,x0,0 + 80009f6c: 00000013 addi x0,x0,0 + 80009f70: 00000013 addi x0,x0,0 + 80009f74: 00000013 addi x0,x0,0 + 80009f78: 00000013 addi x0,x0,0 + 80009f7c: 00000013 addi x0,x0,0 + 80009f80: 00038097 auipc x1,0x38 + 80009f84: 624080e7 jalr x1,1572(x1) # 800425a4 + 80009f88: 00038097 auipc x1,0x38 + 80009f8c: 67c080e7 jalr x1,1660(x1) # 80042604 + +0000000080009f90 : + 80009f90: 00000013 addi x0,x0,0 + 80009f94: 00000013 addi x0,x0,0 + 80009f98: 00000013 addi x0,x0,0 + 80009f9c: 00000013 addi x0,x0,0 + 80009fa0: 00006317 auipc x6,0x6 + 80009fa4: 40830313 addi x6,x6,1032 # 800103a8 + 80009fa8: 00000013 addi x0,x0,0 + 80009fac: 00000013 addi x0,x0,0 + 80009fb0: 00000013 addi x0,x0,0 + 80009fb4: 00000013 addi x0,x0,0 + 80009fb8: 00000013 addi x0,x0,0 + 80009fbc: 00000013 addi x0,x0,0 + 80009fc0: 00033303 ld x6,0(x6) + 80009fc4: 00000013 addi x0,x0,0 + 80009fc8: 00000013 addi x0,x0,0 + 80009fcc: 00000013 addi x0,x0,0 + 80009fd0: 00000013 addi x0,x0,0 + 80009fd4: 00000013 addi x0,x0,0 + 80009fd8: 00000013 addi x0,x0,0 + 80009fdc: 00000013 addi x0,x0,0 + 80009fe0: 0001a397 auipc x7,0x1a + 80009fe4: 53038393 addi x7,x7,1328 # 80024510 + 80009fe8: 00000013 addi x0,x0,0 + 80009fec: 00000013 addi x0,x0,0 + 80009ff0: 00000013 addi x0,x0,0 + 80009ff4: 00000013 addi x0,x0,0 + 80009ff8: 00000013 addi x0,x0,0 + 80009ffc: 00000013 addi x0,x0,0 + 8000a000: 40730333 sub x6,x6,x7 + 8000a004: 00000013 addi x0,x0,0 + 8000a008: 00000013 addi x0,x0,0 + 8000a00c: 00000013 addi x0,x0,0 + 8000a010: 00000013 addi x0,x0,0 + 8000a014: 00000013 addi x0,x0,0 + 8000a018: 00000013 addi x0,x0,0 + 8000a01c: 00000013 addi x0,x0,0 + 8000a020: 0001a417 auipc x8,0x1a + 8000a024: 4e040413 addi x8,x8,1248 # 80024500 + 8000a028: 00000013 addi x0,x0,0 + 8000a02c: 00000013 addi x0,x0,0 + 8000a030: 00000013 addi x0,x0,0 + 8000a034: 00000013 addi x0,x0,0 + 8000a038: 00000013 addi x0,x0,0 + 8000a03c: 00000013 addi x0,x0,0 + 8000a040: 00043203 ld x4,0(x8) + 8000a044: 00620c63 beq x4,x6,8000a05c + 8000a048: 1e0013ef jal x7,8000b228 + 8000a04c: 80009f90 .word 0x80009f90 + 8000a050: 00000000 .word 0x00000000 + 8000a054: 8002179f .word 0x8002179f + 8000a058: 00000000 .word 0x00000000 + +000000008000a05c : + 8000a05c: 000004b7 lui x9,0x0 + 8000a060: 00048493 addi x9,x9,0 # 0 + 8000a064: 00b49493 slli x9,x9,0xb + 8000a068: 5d648493 addi x9,x9,1494 + 8000a06c: 00b49493 slli x9,x9,0xb + 8000a070: 43748493 addi x9,x9,1079 + 8000a074: 00a49493 slli x9,x9,0xa + 8000a078: 2ad48493 addi x9,x9,685 + 8000a07c: 00e49e63 bne x9,x14,8000a098 + 8000a080: 1a8013ef jal x7,8000b228 + 8000a084: 8000a144 .word 0x8000a144 + 8000a088: 00000000 .word 0x00000000 + 8000a08c: 8002160d .word 0x8002160d + 8000a090: 00000000 .word 0x00000000 + 8000a094: 00000341 .word 0x00000341 + +000000008000a098 : + 8000a098: 00000013 addi x0,x0,0 + 8000a09c: 00000013 addi x0,x0,0 + 8000a0a0: 00017517 auipc x10,0x17 + 8000a0a4: 4d450513 addi x10,x10,1236 # 80021574 + 8000a0a8: 00000013 addi x0,x0,0 + 8000a0ac: 00000013 addi x0,x0,0 + 8000a0b0: 00000013 addi x0,x0,0 + 8000a0b4: 00000013 addi x0,x0,0 + 8000a0b8: 00000013 addi x0,x0,0 + 8000a0bc: 00000013 addi x0,x0,0 + 8000a0c0: 00038097 auipc x1,0x38 + 8000a0c4: 4e4080e7 jalr x1,1252(x1) # 800425a4 + 8000a0c8: 00038097 auipc x1,0x38 + 8000a0cc: 51c080e7 jalr x1,1308(x1) # 800425e4 + +000000008000a0d0 : + 8000a0d0: 00000013 addi x0,x0,0 + 8000a0d4: 00000013 addi x0,x0,0 + 8000a0d8: 00000013 addi x0,x0,0 + 8000a0dc: 00000013 addi x0,x0,0 + 8000a0e0: 00017517 auipc x10,0x17 + 8000a0e4: 4d050513 addi x10,x10,1232 # 800215b0 + 8000a0e8: 00000013 addi x0,x0,0 + 8000a0ec: 00000013 addi x0,x0,0 + 8000a0f0: 00000013 addi x0,x0,0 + 8000a0f4: 00000013 addi x0,x0,0 + 8000a0f8: 00000013 addi x0,x0,0 + 8000a0fc: 00000013 addi x0,x0,0 + 8000a100: 00038097 auipc x1,0x38 + 8000a104: 4a4080e7 jalr x1,1188(x1) # 800425a4 + 8000a108: 00038097 auipc x1,0x38 + 8000a10c: 4fc080e7 jalr x1,1276(x1) # 80042604 + +000000008000a110 : + 8000a110: 00000013 addi x0,x0,0 + 8000a114: 00000013 addi x0,x0,0 + 8000a118: 00000013 addi x0,x0,0 + 8000a11c: 00000013 addi x0,x0,0 + 8000a120: 00000717 auipc x14,0x0 + 8000a124: ff070713 addi x14,x14,-16 # 8000a110 + 8000a128: 00000013 addi x0,x0,0 + 8000a12c: 00000013 addi x0,x0,0 + 8000a130: 00000013 addi x0,x0,0 + 8000a134: 00000013 addi x0,x0,0 + 8000a138: 00000013 addi x0,x0,0 + 8000a13c: 00000013 addi x0,x0,0 + 8000a140: cb5ff06f jal x0,80009df4 + +000000008000a144 : + 8000a144: 00000737 lui x14,0x0 + 8000a148: 00070713 addi x14,x14,0 # 0 + 8000a14c: 00b71713 slli x14,x14,0xb + 8000a150: 5d670713 addi x14,x14,1494 + 8000a154: 00b71713 slli x14,x14,0xb + 8000a158: 43770713 addi x14,x14,1079 + 8000a15c: 00a71713 slli x14,x14,0xa + 8000a160: 2ad70713 addi x14,x14,685 + 8000a164: c91ff06f jal x0,80009df4 + 8000a168: 00000013 addi x0,x0,0 + 8000a16c: 00000013 addi x0,x0,0 + 8000a170: 00000013 addi x0,x0,0 + 8000a174: 00000013 addi x0,x0,0 + 8000a178: 00000013 addi x0,x0,0 + 8000a17c: 00000013 addi x0,x0,0 + +000000008000a180 : + 8000a180: 1000006f jal x0,8000a280 + 8000a184: 1080006f jal x0,8000a28c + 8000a188: 1100006f jal x0,8000a298 + 8000a18c: 1180006f jal x0,8000a2a4 + 8000a190: 1200006f jal x0,8000a2b0 + 8000a194: 1280006f jal x0,8000a2bc + 8000a198: 1300006f jal x0,8000a2c8 + 8000a19c: 1380006f jal x0,8000a2d4 + 8000a1a0: 1400006f jal x0,8000a2e0 + 8000a1a4: 1480006f jal x0,8000a2ec + 8000a1a8: 1500006f jal x0,8000a2f8 + 8000a1ac: 1580006f jal x0,8000a304 + 8000a1b0: 1600006f jal x0,8000a310 + 8000a1b4: 1680006f jal x0,8000a31c + 8000a1b8: 1700006f jal x0,8000a328 + 8000a1bc: 1780006f jal x0,8000a334 + 8000a1c0: 1800006f jal x0,8000a340 + 8000a1c4: 1880006f jal x0,8000a34c + 8000a1c8: 1900006f jal x0,8000a358 + 8000a1cc: 1980006f jal x0,8000a364 + 8000a1d0: 1a00006f jal x0,8000a370 + 8000a1d4: 1a80006f jal x0,8000a37c + 8000a1d8: 1b00006f jal x0,8000a388 + 8000a1dc: 1b80006f jal x0,8000a394 + 8000a1e0: 1c00006f jal x0,8000a3a0 + 8000a1e4: 1bc0006f jal x0,8000a3a0 + 8000a1e8: 1b80006f jal x0,8000a3a0 + 8000a1ec: 1b40006f jal x0,8000a3a0 + 8000a1f0: 1b00006f jal x0,8000a3a0 + 8000a1f4: 1ac0006f jal x0,8000a3a0 + 8000a1f8: 1a80006f jal x0,8000a3a0 + 8000a1fc: 1a40006f jal x0,8000a3a0 + 8000a200: 1a00006f jal x0,8000a3a0 + 8000a204: 19c0006f jal x0,8000a3a0 + 8000a208: 1980006f jal x0,8000a3a0 + 8000a20c: 1940006f jal x0,8000a3a0 + 8000a210: 1900006f jal x0,8000a3a0 + 8000a214: 18c0006f jal x0,8000a3a0 + 8000a218: 1880006f jal x0,8000a3a0 + 8000a21c: 1840006f jal x0,8000a3a0 + 8000a220: 1800006f jal x0,8000a3a0 + 8000a224: 17c0006f jal x0,8000a3a0 + 8000a228: 1780006f jal x0,8000a3a0 + 8000a22c: 1740006f jal x0,8000a3a0 + 8000a230: 1700006f jal x0,8000a3a0 + 8000a234: 16c0006f jal x0,8000a3a0 + 8000a238: 1680006f jal x0,8000a3a0 + 8000a23c: 1640006f jal x0,8000a3a0 + 8000a240: 1600006f jal x0,8000a3a0 + 8000a244: 15c0006f jal x0,8000a3a0 + 8000a248: 1580006f jal x0,8000a3a0 + 8000a24c: 1540006f jal x0,8000a3a0 + 8000a250: 1500006f jal x0,8000a3a0 + 8000a254: 14c0006f jal x0,8000a3a0 + 8000a258: 1480006f jal x0,8000a3a0 + 8000a25c: 1440006f jal x0,8000a3a0 + 8000a260: 1400006f jal x0,8000a3a0 + 8000a264: 13c0006f jal x0,8000a3a0 + 8000a268: 1380006f jal x0,8000a3a0 + 8000a26c: 1340006f jal x0,8000a3a0 + 8000a270: 1300006f jal x0,8000a3a0 + 8000a274: 12c0006f jal x0,8000a3a0 + 8000a278: 1280006f jal x0,8000a3a0 + 8000a27c: 1240006f jal x0,8000a3a0 + +000000008000a280 : + 8000a280: 34011173 csrrw x2,mscratch,x2 + 8000a284: 30f13423 sd x15,776(x2) + 8000a288: 13c007ef jal x15,8000a3c4 + 8000a28c: 34011173 csrrw x2,mscratch,x2 + 8000a290: 30f13423 sd x15,776(x2) + 8000a294: 130007ef jal x15,8000a3c4 + 8000a298: 34011173 csrrw x2,mscratch,x2 + 8000a29c: 30f13423 sd x15,776(x2) + 8000a2a0: 124007ef jal x15,8000a3c4 + 8000a2a4: 34011173 csrrw x2,mscratch,x2 + 8000a2a8: 30f13423 sd x15,776(x2) + 8000a2ac: 118007ef jal x15,8000a3c4 + 8000a2b0: 34011173 csrrw x2,mscratch,x2 + 8000a2b4: 30f13423 sd x15,776(x2) + 8000a2b8: 10c007ef jal x15,8000a3c4 + 8000a2bc: 34011173 csrrw x2,mscratch,x2 + 8000a2c0: 30f13423 sd x15,776(x2) + 8000a2c4: 100007ef jal x15,8000a3c4 + 8000a2c8: 34011173 csrrw x2,mscratch,x2 + 8000a2cc: 30f13423 sd x15,776(x2) + 8000a2d0: 0f4007ef jal x15,8000a3c4 + 8000a2d4: 34011173 csrrw x2,mscratch,x2 + 8000a2d8: 30f13423 sd x15,776(x2) + 8000a2dc: 0e8007ef jal x15,8000a3c4 + 8000a2e0: 34011173 csrrw x2,mscratch,x2 + 8000a2e4: 30f13423 sd x15,776(x2) + 8000a2e8: 0dc007ef jal x15,8000a3c4 + 8000a2ec: 34011173 csrrw x2,mscratch,x2 + 8000a2f0: 30f13423 sd x15,776(x2) + 8000a2f4: 0d0007ef jal x15,8000a3c4 + 8000a2f8: 34011173 csrrw x2,mscratch,x2 + 8000a2fc: 30f13423 sd x15,776(x2) + 8000a300: 0c4007ef jal x15,8000a3c4 + 8000a304: 34011173 csrrw x2,mscratch,x2 + 8000a308: 30f13423 sd x15,776(x2) + 8000a30c: 0b8007ef jal x15,8000a3c4 + 8000a310: 34011173 csrrw x2,mscratch,x2 + 8000a314: 30f13423 sd x15,776(x2) + 8000a318: 0ac007ef jal x15,8000a3c4 + 8000a31c: 34011173 csrrw x2,mscratch,x2 + 8000a320: 30f13423 sd x15,776(x2) + 8000a324: 0a0007ef jal x15,8000a3c4 + 8000a328: 34011173 csrrw x2,mscratch,x2 + 8000a32c: 30f13423 sd x15,776(x2) + 8000a330: 094007ef jal x15,8000a3c4 + 8000a334: 34011173 csrrw x2,mscratch,x2 + 8000a338: 30f13423 sd x15,776(x2) + 8000a33c: 088007ef jal x15,8000a3c4 + 8000a340: 34011173 csrrw x2,mscratch,x2 + 8000a344: 30f13423 sd x15,776(x2) + 8000a348: 07c007ef jal x15,8000a3c4 + 8000a34c: 34011173 csrrw x2,mscratch,x2 + 8000a350: 30f13423 sd x15,776(x2) + 8000a354: 070007ef jal x15,8000a3c4 + 8000a358: 34011173 csrrw x2,mscratch,x2 + 8000a35c: 30f13423 sd x15,776(x2) + 8000a360: 064007ef jal x15,8000a3c4 + 8000a364: 34011173 csrrw x2,mscratch,x2 + 8000a368: 30f13423 sd x15,776(x2) + 8000a36c: 058007ef jal x15,8000a3c4 + 8000a370: 34011173 csrrw x2,mscratch,x2 + 8000a374: 30f13423 sd x15,776(x2) + 8000a378: 04c007ef jal x15,8000a3c4 + 8000a37c: 34011173 csrrw x2,mscratch,x2 + 8000a380: 30f13423 sd x15,776(x2) + 8000a384: 040007ef jal x15,8000a3c4 + 8000a388: 34011173 csrrw x2,mscratch,x2 + 8000a38c: 30f13423 sd x15,776(x2) + 8000a390: 034007ef jal x15,8000a3c4 + 8000a394: 34011173 csrrw x2,mscratch,x2 + 8000a398: 30f13423 sd x15,776(x2) + 8000a39c: 028007ef jal x15,8000a3c4 + +000000008000a3a0 : + 8000a3a0: 00000317 auipc x6,0x0 + 8000a3a4: aa830313 addi x6,x6,-1368 # 80009e48 + 8000a3a8: 00000013 addi x0,x0,0 + 8000a3ac: 00000013 addi x0,x0,0 + 8000a3b0: 00000013 addi x0,x0,0 + 8000a3b4: 00000013 addi x0,x0,0 + 8000a3b8: 00000013 addi x0,x0,0 + 8000a3bc: 00000013 addi x0,x0,0 + 8000a3c0: 00030067 jalr x0,0(x6) + +000000008000a3c4 : + 8000a3c4: 30e13023 sd x14,768(x2) + 8000a3c8: 34011773 csrrw x14,mscratch,x2 + 8000a3cc: 30e13823 sd x14,784(x2) + 8000a3d0: 2b013703 ld x14,688(x2) + 8000a3d4: 00070067 jalr x0,0(x14) + +000000008000a3d8 : + 8000a3d8: 2e913c23 sd x9,760(x2) + 8000a3dc: 2e813823 sd x8,752(x2) + 8000a3e0: 2e713423 sd x7,744(x2) + 8000a3e4: 2e613023 sd x6,736(x2) + 8000a3e8: 00000013 addi x0,x0,0 + 8000a3ec: 00000013 addi x0,x0,0 + 8000a3f0: 00000013 addi x0,x0,0 + 8000a3f4: 00000013 addi x0,x0,0 + 8000a3f8: 00000013 addi x0,x0,0 + 8000a3fc: 00000013 addi x0,x0,0 + 8000a400: 00006317 auipc x6,0x6 + 8000a404: d0830313 addi x6,x6,-760 # 80010108 + 8000a408: 00000013 addi x0,x0,0 + 8000a40c: 00000013 addi x0,x0,0 + 8000a410: 00000013 addi x0,x0,0 + 8000a414: 00000013 addi x0,x0,0 + 8000a418: 00000013 addi x0,x0,0 + 8000a41c: 00000013 addi x0,x0,0 + 8000a420: 00033383 ld x7,0(x6) + 8000a424: 00138393 addi x7,x7,1 + 8000a428: 00733023 sd x7,0(x6) + 8000a42c: 34202773 csrrs x14,mcause,x0 + +000000008000a430 : + 8000a430: fff00493 addi x9,x0,-1 + 8000a434: 00d4d493 srli x9,x9,0xd + 8000a438: 00c49493 slli x9,x9,0xc + 8000a43c: fff4c493 xori x9,x9,-1 + 8000a440: 00e4f4b3 and x9,x9,x14 + +000000008000a444 : + 8000a444: ffe48413 addi x8,x9,-2 + 8000a448: 00041663 bne x8,x0,8000a454 + +000000008000a44c : + 8000a44c: 500502e3 beq x10,x0,8000b150 + 8000a450: 5b40006f jal x0,8000aa04 + +000000008000a454 : + 8000a454: ff848413 addi x8,x9,-8 + 8000a458: 00245413 srli x8,x8,0x2 + 8000a45c: 5a041463 bne x8,x0,8000aa04 + +000000008000a460 : + 8000a460: 4e0508e3 beq x10,x0,8000b150 + +000000008000a464 : + 8000a464: fff50493 addi x9,x10,-1 + 8000a468: 00500393 addi x7,x0,5 + 8000a46c: 0274e063 bltu x9,x7,8000a48c + 8000a470: 07300393 addi x7,x0,115 + 8000a474: 00750463 beq x10,x7,8000a47c + 8000a478: 08c0006f jal x0,8000a504 + +000000008000a47c : + 8000a47c: 34102573 csrrs x10,mepc,x0 + 8000a480: 00450413 addi x8,x10,4 + 8000a484: 34141073 csrrw x0,mepc,x8 + 8000a488: 0310006f jal x0,8000acb8 + +000000008000a48c : + 8000a48c: 341024f3 csrrs x9,mepc,x0 + 8000a490: 00448493 addi x9,x9,4 + 8000a494: 34149073 csrrw x0,mepc,x9 + 8000a498: 00100393 addi x7,x0,1 + 8000a49c: 00750e63 beq x10,x7,8000a4b8 + 8000a4a0: 00200393 addi x7,x0,2 + 8000a4a4: 02750463 beq x10,x7,8000a4cc + 8000a4a8: 00300393 addi x7,x0,3 + 8000a4ac: 04750063 beq x10,x7,8000a4ec + 8000a4b0: fff00513 addi x10,x0,-1 + 8000a4b4: 0050006f jal x0,8000acb8 + +000000008000a4b8 : + 8000a4b8: fff00493 addi x9,x0,-1 + 8000a4bc: 03e4d493 srli x9,x9,0x3e + 8000a4c0: 00b49493 slli x9,x9,0xb + 8000a4c4: 3004a073 csrrs x0,mstatus,x9 + 8000a4c8: 7f00006f jal x0,8000acb8 + +000000008000a4cc : + 8000a4cc: fff00493 addi x9,x0,-1 + 8000a4d0: 03e4d493 srli x9,x9,0x3e + 8000a4d4: 00b49493 slli x9,x9,0xb + 8000a4d8: 3004b073 csrrc x0,mstatus,x9 + 8000a4dc: 00100493 addi x9,x0,1 + 8000a4e0: 00b49493 slli x9,x9,0xb + 8000a4e4: 3004a073 csrrs x0,mstatus,x9 + 8000a4e8: 7d00006f jal x0,8000acb8 + +000000008000a4ec : + 8000a4ec: fff00493 addi x9,x0,-1 + 8000a4f0: 03e4d493 srli x9,x9,0x3e + 8000a4f4: 00b49493 slli x9,x9,0xb + 8000a4f8: 3004b073 csrrc x0,mstatus,x9 + 8000a4fc: 7bc0006f jal x0,8000acb8 + +000000008000a500 : + 8000a500: 00000013 addi x0,x0,0 + +000000008000a504 : + 8000a504: 00000013 addi x0,x0,0 + 8000a508: 00000013 addi x0,x0,0 + 8000a50c: 00000013 addi x0,x0,0 + 8000a510: 00000013 addi x0,x0,0 + 8000a514: 00000013 addi x0,x0,0 + 8000a518: 00000013 addi x0,x0,0 + 8000a51c: 00000013 addi x0,x0,0 + 8000a520: 00000397 auipc x7,0x0 + 8000a524: 17038393 addi x7,x7,368 # 8000a690 + 8000a528: 00000013 addi x0,x0,0 + 8000a52c: 00000013 addi x0,x0,0 + 8000a530: 00000013 addi x0,x0,0 + 8000a534: 00000013 addi x0,x0,0 + 8000a538: 00000013 addi x0,x0,0 + 8000a53c: 00000013 addi x0,x0,0 + +000000008000a540 : + 8000a540: 0003e403 lwu x8,0(x7) + 8000a544: 00a40863 beq x8,x10,8000a554 + 8000a548: 04040863 beq x8,x0,8000a598 + 8000a54c: 00838393 addi x7,x7,8 + 8000a550: ff1ff06f jal x0,8000a540 + +000000008000a554 : + 8000a554: 00008493 addi x9,x1,0 + 8000a558: 00000013 addi x0,x0,0 + 8000a55c: 00000013 addi x0,x0,0 + 8000a560: 00000097 auipc x1,0x0 + 8000a564: 02408093 addi x1,x1,36 # 8000a584 + 8000a568: 00000013 addi x0,x0,0 + 8000a56c: 00000013 addi x0,x0,0 + 8000a570: 00000013 addi x0,x0,0 + 8000a574: 00000013 addi x0,x0,0 + 8000a578: 00000013 addi x0,x0,0 + 8000a57c: 00000013 addi x0,x0,0 + 8000a580: 00038067 jalr x0,0(x7) + +000000008000a584 : + 8000a584: 00048093 addi x1,x9,0 + 8000a588: 34102473 csrrs x8,mepc,x0 + 8000a58c: 00440413 addi x8,x8,4 + 8000a590: 34141073 csrrw x0,mepc,x8 + 8000a594: 7240006f jal x0,8000acb8 + +000000008000a598 : + 8000a598: 00050493 addi x9,x10,0 + 8000a59c: 00000013 addi x0,x0,0 + 8000a5a0: 00018517 auipc x10,0x18 + 8000a5a4: 68d50513 addi x10,x10,1677 # 80022c2d + 8000a5a8: 00000013 addi x0,x0,0 + 8000a5ac: 00000013 addi x0,x0,0 + 8000a5b0: 00000013 addi x0,x0,0 + 8000a5b4: 00000013 addi x0,x0,0 + 8000a5b8: 00000013 addi x0,x0,0 + 8000a5bc: 00000013 addi x0,x0,0 + 8000a5c0: 00038097 auipc x1,0x38 + 8000a5c4: fe4080e7 jalr x1,-28(x1) # 800425a4 + 8000a5c8: 00048513 addi x10,x9,0 + 8000a5cc: 02000593 addi x11,x0,32 + 8000a5d0: 728020ef jal x1,8000ccf8 + 8000a5d4: 00000013 addi x0,x0,0 + 8000a5d8: 00000013 addi x0,x0,0 + 8000a5dc: 00000013 addi x0,x0,0 + 8000a5e0: 00017517 auipc x10,0x17 + 8000a5e4: a1850513 addi x10,x10,-1512 # 80020ff8 + 8000a5e8: 00000013 addi x0,x0,0 + 8000a5ec: 00000013 addi x0,x0,0 + 8000a5f0: 00000013 addi x0,x0,0 + 8000a5f4: 00000013 addi x0,x0,0 + 8000a5f8: 00000013 addi x0,x0,0 + 8000a5fc: 00000013 addi x0,x0,0 + 8000a600: 00038097 auipc x1,0x38 + 8000a604: fa4080e7 jalr x1,-92(x1) # 800425a4 + 8000a608: 00000013 addi x0,x0,0 + 8000a60c: 00000013 addi x0,x0,0 + 8000a610: 00000013 addi x0,x0,0 + 8000a614: 00000013 addi x0,x0,0 + 8000a618: 00000013 addi x0,x0,0 + 8000a61c: 00000013 addi x0,x0,0 + 8000a620: 00017517 auipc x10,0x17 + 8000a624: 09450513 addi x10,x10,148 # 800216b4 + 8000a628: 00000013 addi x0,x0,0 + 8000a62c: 00000013 addi x0,x0,0 + 8000a630: 00000013 addi x0,x0,0 + 8000a634: 00000013 addi x0,x0,0 + 8000a638: 00000013 addi x0,x0,0 + 8000a63c: 00000013 addi x0,x0,0 + 8000a640: 00038097 auipc x1,0x38 + 8000a644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000a648: 00000013 addi x0,x0,0 + 8000a64c: 00000013 addi x0,x0,0 + 8000a650: 00000013 addi x0,x0,0 + 8000a654: 00000013 addi x0,x0,0 + 8000a658: 00000013 addi x0,x0,0 + 8000a65c: 00000013 addi x0,x0,0 + 8000a660: 00017517 auipc x10,0x17 + 8000a664: f5050513 addi x10,x10,-176 # 800215b0 + 8000a668: 00000013 addi x0,x0,0 + 8000a66c: 00000013 addi x0,x0,0 + 8000a670: 00000013 addi x0,x0,0 + 8000a674: 00000013 addi x0,x0,0 + 8000a678: 00000013 addi x0,x0,0 + 8000a67c: 00000013 addi x0,x0,0 + 8000a680: 00038097 auipc x1,0x38 + 8000a684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000a688: 00038097 auipc x1,0x38 + 8000a68c: f7c080e7 jalr x1,-132(x1) # 80042604 + +000000008000a690 : + 8000a690: 30002573 .word 0x30002573 + 8000a694: 00008067 jalr x0,0(x1) + 8000a698: 30059073 .word 0x30059073 + 8000a69c: 00008067 jalr x0,0(x1) + 8000a6a0: 3005a073 .word 0x3005a073 + 8000a6a4: 00008067 jalr x0,0(x1) + 8000a6a8: 3005b073 .word 0x3005b073 + 8000a6ac: 00008067 jalr x0,0(x1) + 8000a6b0: 30402573 .word 0x30402573 + 8000a6b4: 00008067 jalr x0,0(x1) + 8000a6b8: 30459073 .word 0x30459073 + 8000a6bc: 00008067 jalr x0,0(x1) + 8000a6c0: 3045a073 .word 0x3045a073 + 8000a6c4: 00008067 jalr x0,0(x1) + 8000a6c8: 3045b073 .word 0x3045b073 + 8000a6cc: 00008067 jalr x0,0(x1) + 8000a6d0: 30602573 .word 0x30602573 + 8000a6d4: 00008067 jalr x0,0(x1) + 8000a6d8: 30659073 .word 0x30659073 + 8000a6dc: 00008067 jalr x0,0(x1) + 8000a6e0: 3065a073 .word 0x3065a073 + 8000a6e4: 00008067 jalr x0,0(x1) + 8000a6e8: 3065b073 .word 0x3065b073 + 8000a6ec: 00008067 jalr x0,0(x1) + 8000a6f0: 30a02573 .word 0x30a02573 + 8000a6f4: 00008067 jalr x0,0(x1) + 8000a6f8: 30a59073 .word 0x30a59073 + 8000a6fc: 00008067 jalr x0,0(x1) + 8000a700: 30a5a073 .word 0x30a5a073 + 8000a704: 00008067 jalr x0,0(x1) + 8000a708: 30a5b073 .word 0x30a5b073 + 8000a70c: 00008067 jalr x0,0(x1) + 8000a710: 34402573 .word 0x34402573 + 8000a714: 00008067 jalr x0,0(x1) + 8000a718: 34459073 .word 0x34459073 + 8000a71c: 00008067 jalr x0,0(x1) + 8000a720: 3445a073 .word 0x3445a073 + 8000a724: 00008067 jalr x0,0(x1) + 8000a728: 3445b073 .word 0x3445b073 + 8000a72c: 00008067 jalr x0,0(x1) + 8000a730: 74702573 .word 0x74702573 + 8000a734: 00008067 jalr x0,0(x1) + 8000a738: 74759073 .word 0x74759073 + 8000a73c: 00008067 jalr x0,0(x1) + 8000a740: 7475a073 .word 0x7475a073 + 8000a744: 00008067 jalr x0,0(x1) + 8000a748: 7475b073 .word 0x7475b073 + 8000a74c: 00008067 jalr x0,0(x1) + 8000a750: 32002573 .word 0x32002573 + 8000a754: 00008067 jalr x0,0(x1) + 8000a758: 32059073 .word 0x32059073 + 8000a75c: 00008067 jalr x0,0(x1) + 8000a760: 3205a073 .word 0x3205a073 + 8000a764: 00008067 jalr x0,0(x1) + 8000a768: 3205b073 .word 0x3205b073 + 8000a76c: 00008067 jalr x0,0(x1) + 8000a770: b0002573 .word 0xb0002573 + 8000a774: 00008067 jalr x0,0(x1) + 8000a778: b0059073 .word 0xb0059073 + 8000a77c: 00008067 jalr x0,0(x1) + 8000a780: b005a073 .word 0xb005a073 + 8000a784: 00008067 jalr x0,0(x1) + 8000a788: b005b073 .word 0xb005b073 + 8000a78c: 00008067 jalr x0,0(x1) + 8000a790: b0202573 .word 0xb0202573 + 8000a794: 00008067 jalr x0,0(x1) + 8000a798: b0259073 .word 0xb0259073 + 8000a79c: 00008067 jalr x0,0(x1) + 8000a7a0: b025a073 .word 0xb025a073 + 8000a7a4: 00008067 jalr x0,0(x1) + 8000a7a8: b025b073 .word 0xb025b073 + 8000a7ac: 00008067 jalr x0,0(x1) + 8000a7b0: 10002573 .word 0x10002573 + 8000a7b4: 00008067 jalr x0,0(x1) + 8000a7b8: 10059073 .word 0x10059073 + 8000a7bc: 00008067 jalr x0,0(x1) + 8000a7c0: 1005a073 .word 0x1005a073 + 8000a7c4: 00008067 jalr x0,0(x1) + 8000a7c8: 1005b073 .word 0x1005b073 + 8000a7cc: 00008067 jalr x0,0(x1) + 8000a7d0: 10402573 .word 0x10402573 + 8000a7d4: 00008067 jalr x0,0(x1) + 8000a7d8: 10459073 .word 0x10459073 + 8000a7dc: 00008067 jalr x0,0(x1) + 8000a7e0: 1045a073 .word 0x1045a073 + 8000a7e4: 00008067 jalr x0,0(x1) + 8000a7e8: 1045b073 .word 0x1045b073 + 8000a7ec: 00008067 jalr x0,0(x1) + 8000a7f0: 10602573 .word 0x10602573 + 8000a7f4: 00008067 jalr x0,0(x1) + 8000a7f8: 10659073 .word 0x10659073 + 8000a7fc: 00008067 jalr x0,0(x1) + 8000a800: 1065a073 .word 0x1065a073 + 8000a804: 00008067 jalr x0,0(x1) + 8000a808: 1065b073 .word 0x1065b073 + 8000a80c: 00008067 jalr x0,0(x1) + 8000a810: 10a02573 .word 0x10a02573 + 8000a814: 00008067 jalr x0,0(x1) + 8000a818: 10a59073 .word 0x10a59073 + 8000a81c: 00008067 jalr x0,0(x1) + 8000a820: 10a5a073 .word 0x10a5a073 + 8000a824: 00008067 jalr x0,0(x1) + 8000a828: 10a5b073 .word 0x10a5b073 + 8000a82c: 00008067 jalr x0,0(x1) + 8000a830: 14402573 .word 0x14402573 + 8000a834: 00008067 jalr x0,0(x1) + 8000a838: 14459073 .word 0x14459073 + 8000a83c: 00008067 jalr x0,0(x1) + 8000a840: 1445a073 .word 0x1445a073 + 8000a844: 00008067 jalr x0,0(x1) + 8000a848: 1445b073 .word 0x1445b073 + 8000a84c: 00008067 jalr x0,0(x1) + 8000a850: 14d02573 .word 0x14d02573 + 8000a854: 00008067 jalr x0,0(x1) + 8000a858: 14d59073 .word 0x14d59073 + 8000a85c: 00008067 jalr x0,0(x1) + 8000a860: 14d5a073 .word 0x14d5a073 + 8000a864: 00008067 jalr x0,0(x1) + 8000a868: 14d5b073 .word 0x14d5b073 + 8000a86c: 00008067 jalr x0,0(x1) + 8000a870: 18002573 .word 0x18002573 + 8000a874: 00008067 jalr x0,0(x1) + 8000a878: 18059073 .word 0x18059073 + 8000a87c: 00008067 jalr x0,0(x1) + 8000a880: 1805a073 .word 0x1805a073 + 8000a884: 00008067 jalr x0,0(x1) + 8000a888: 1805b073 .word 0x1805b073 + 8000a88c: 00008067 jalr x0,0(x1) + 8000a890: 7a002573 .word 0x7a002573 + 8000a894: 00008067 jalr x0,0(x1) + 8000a898: 7a059073 .word 0x7a059073 + 8000a89c: 00008067 jalr x0,0(x1) + 8000a8a0: 7a05a073 .word 0x7a05a073 + 8000a8a4: 00008067 jalr x0,0(x1) + 8000a8a8: 7a05b073 .word 0x7a05b073 + 8000a8ac: 00008067 jalr x0,0(x1) + 8000a8b0: 7a102573 .word 0x7a102573 + 8000a8b4: 00008067 jalr x0,0(x1) + 8000a8b8: 7a159073 .word 0x7a159073 + 8000a8bc: 00008067 jalr x0,0(x1) + 8000a8c0: 7a15a073 .word 0x7a15a073 + 8000a8c4: 00008067 jalr x0,0(x1) + 8000a8c8: 7a15b073 .word 0x7a15b073 + 8000a8cc: 00008067 jalr x0,0(x1) + 8000a8d0: 7a202573 .word 0x7a202573 + 8000a8d4: 00008067 jalr x0,0(x1) + 8000a8d8: 7a259073 .word 0x7a259073 + 8000a8dc: 00008067 jalr x0,0(x1) + 8000a8e0: 7a25a073 .word 0x7a25a073 + 8000a8e4: 00008067 jalr x0,0(x1) + 8000a8e8: 7a25b073 .word 0x7a25b073 + 8000a8ec: 00008067 jalr x0,0(x1) + 8000a8f0: 7a302573 .word 0x7a302573 + 8000a8f4: 00008067 jalr x0,0(x1) + 8000a8f8: 7a359073 .word 0x7a359073 + 8000a8fc: 00008067 jalr x0,0(x1) + 8000a900: 7a35a073 .word 0x7a35a073 + 8000a904: 00008067 jalr x0,0(x1) + 8000a908: 7a35b073 .word 0x7a35b073 + 8000a90c: 00008067 jalr x0,0(x1) + 8000a910: 7a402573 .word 0x7a402573 + 8000a914: 00008067 jalr x0,0(x1) + 8000a918: 7a459073 .word 0x7a459073 + 8000a91c: 00008067 jalr x0,0(x1) + 8000a920: 7a45a073 .word 0x7a45a073 + 8000a924: 00008067 jalr x0,0(x1) + 8000a928: 7a45b073 .word 0x7a45b073 + 8000a92c: 00008067 jalr x0,0(x1) + 8000a930: 7a502573 .word 0x7a502573 + 8000a934: 00008067 jalr x0,0(x1) + 8000a938: 7a559073 .word 0x7a559073 + 8000a93c: 00008067 jalr x0,0(x1) + 8000a940: 7a55a073 .word 0x7a55a073 + 8000a944: 00008067 jalr x0,0(x1) + 8000a948: 7a55b073 .word 0x7a55b073 + 8000a94c: 00008067 jalr x0,0(x1) + 8000a950: 7a802573 .word 0x7a802573 + 8000a954: 00008067 jalr x0,0(x1) + 8000a958: 7a859073 .word 0x7a859073 + 8000a95c: 00008067 jalr x0,0(x1) + 8000a960: 7a85a073 .word 0x7a85a073 + 8000a964: 00008067 jalr x0,0(x1) + 8000a968: 7a85b073 .word 0x7a85b073 + 8000a96c: 00008067 jalr x0,0(x1) + 8000a970: 7aa02573 .word 0x7aa02573 + 8000a974: 00008067 jalr x0,0(x1) + 8000a978: 7aa59073 .word 0x7aa59073 + 8000a97c: 00008067 jalr x0,0(x1) + 8000a980: 7aa5a073 .word 0x7aa5a073 + 8000a984: 00008067 jalr x0,0(x1) + 8000a988: 7aa5b073 .word 0x7aa5b073 + 8000a98c: 00008067 jalr x0,0(x1) + 8000a990: 5a802573 .word 0x5a802573 + 8000a994: 00008067 jalr x0,0(x1) + 8000a998: 5a859073 .word 0x5a859073 + 8000a99c: 00008067 jalr x0,0(x1) + 8000a9a0: 5a85a073 .word 0x5a85a073 + 8000a9a4: 00008067 jalr x0,0(x1) + 8000a9a8: 5a85b073 .word 0x5a85b073 + 8000a9ac: 00008067 jalr x0,0(x1) + 8000a9b0: 6a802573 .word 0x6a802573 + 8000a9b4: 00008067 jalr x0,0(x1) + 8000a9b8: 6a859073 .word 0x6a859073 + 8000a9bc: 00008067 jalr x0,0(x1) + 8000a9c0: 6a85a073 .word 0x6a85a073 + 8000a9c4: 00008067 jalr x0,0(x1) + 8000a9c8: 6a85b073 .word 0x6a85b073 + 8000a9cc: 00008067 jalr x0,0(x1) + 8000a9d0: 0005a503 lw x10,0(x11) + 8000a9d4: 00008067 jalr x0,0(x1) + 8000a9d8: 0045a503 lw x10,4(x11) + 8000a9dc: 00008067 jalr x0,0(x1) + 8000a9e0: 00c5a023 sw x12,0(x11) + 8000a9e4: 00008067 jalr x0,0(x1) + 8000a9e8: 00c5a223 sw x12,4(x11) + 8000a9ec: 00008067 jalr x0,0(x1) + 8000a9f0: 0005b503 ld x10,0(x11) + 8000a9f4: 00008067 jalr x0,0(x1) + 8000a9f8: 00c5b023 sd x12,0(x11) + 8000a9fc: 00008067 jalr x0,0(x1) + 8000aa00: 00000000 .word 0x00000000 + +000000008000aa04 : + 8000aa04: 02000393 addi x7,x0,32 + 8000aa08: 00075c63 bge x14,x0,8000aa20 + +000000008000aa0c : + 8000aa0c: 00171413 slli x8,x14,0x1 + 8000aa10: ff240413 addi x8,x8,-14 + 8000aa14: 00045663 bge x8,x0,8000aa20 + 8000aa18: 01800393 addi x7,x0,24 + 8000aa1c: 0040006f jal x0,8000aa20 + +000000008000aa20 : + 8000aa20: ca810113 addi x2,x2,-856 + 8000aa24: 5f013303 ld x6,1520(x2) + 8000aa28: 007304b3 add x9,x6,x7 + 8000aa2c: 5e913823 sd x9,1520(x2) + 8000aa30: 5d013403 ld x8,1488(x2) + 8000aa34: 40830333 sub x6,x6,x8 + 8000aa38: 35810113 addi x2,x2,856 + 8000aa3c: 27813403 ld x8,632(x2) + 8000aa40: 00830333 add x6,x6,x8 + 8000aa44: 34102473 csrrs x8,mepc,x0 + 8000aa48: 00000013 addi x0,x0,0 + 8000aa4c: 00000013 addi x0,x0,0 + 8000aa50: 00000013 addi x0,x0,0 + 8000aa54: 00000013 addi x0,x0,0 + 8000aa58: 00000013 addi x0,x0,0 + 8000aa5c: 00000013 addi x0,x0,0 + 8000aa60: 00016497 auipc x9,0x16 + 8000aa64: 57848493 addi x9,x9,1400 # 80020fd8 + 8000aa68: 00000013 addi x0,x0,0 + 8000aa6c: 00000013 addi x0,x0,0 + 8000aa70: 00000013 addi x0,x0,0 + 8000aa74: 00000013 addi x0,x0,0 + 8000aa78: 00000013 addi x0,x0,0 + 8000aa7c: 00000013 addi x0,x0,0 + 8000aa80: 0084b023 sd x8,0(x9) + 8000aa84: 00e4b423 sd x14,8(x9) + 8000aa88: 34302473 csrrs x8,mtval,x0 + 8000aa8c: 0084b823 sd x8,16(x9) + 8000aa90: 30002473 csrrs x8,mstatus,x0 + 8000aa94: 0084bc23 sd x8,24(x9) + 8000aa98: 00000013 addi x0,x0,0 + 8000aa9c: 00000013 addi x0,x0,0 + 8000aaa0: 00037417 auipc x8,0x37 + 8000aaa4: f3840413 addi x8,x8,-200 # 800419d8 + 8000aaa8: 00000013 addi x0,x0,0 + 8000aaac: 00000013 addi x0,x0,0 + 8000aab0: 00000013 addi x0,x0,0 + 8000aab4: 00000013 addi x0,x0,0 + 8000aab8: 00000013 addi x0,x0,0 + 8000aabc: 00000013 addi x0,x0,0 + 8000aac0: 007304b3 add x9,x6,x7 + 8000aac4: e4946663 bltu x8,x9,8000a110 + +000000008000aac8 : + 8000aac8: 2c013403 ld x8,704(x2) + 8000aacc: 408787b3 sub x15,x15,x8 + 8000aad0: 00179493 slli x9,x15,0x1 + 8000aad4: 009787b3 add x15,x15,x9 + 8000aad8: 0057d793 srli x15,x15,0x5 + 8000aadc: 00679793 slli x15,x15,0x6 + 8000aae0: 0077e7b3 or x15,x15,x7 + 8000aae4: 00378793 addi x15,x15,3 + 8000aae8: 02075a63 bge x14,x0,8000ab1c + 8000aaec: 00f00413 addi x8,x0,15 + 8000aaf0: 00877433 and x8,x14,x8 + 8000aaf4: 304024f3 csrrs x9,mie,x0 + 8000aaf8: 0084d4b3 srl x9,x9,x8 + 8000aafc: 0014f493 andi x9,x9,1 + 8000ab00: 00b49493 slli x9,x9,0xb + 8000ab04: 0097e7b3 or x15,x15,x9 + 8000ab08: 344024f3 csrrs x9,mip,x0 + 8000ab0c: 0084d4b3 srl x9,x9,x8 + 8000ab10: 0014f493 andi x9,x9,1 + 8000ab14: 00c49493 slli x9,x9,0xc + 8000ab18: 0097e7b3 or x15,x15,x9 + 8000ab1c: 300023f3 csrrs x7,mstatus,x0 + 8000ab20: 02f39393 slli x7,x7,0x2f + 8000ab24: 0223d393 srli x7,x7,0x22 + 8000ab28: 00000437 lui x8,0x0 + 8000ab2c: 00040413 addi x8,x8,0 # 0 + 8000ab30: 00b41413 slli x8,x8,0xb + 8000ab34: 00140413 addi x8,x8,1 + 8000ab38: 00b41413 slli x8,x8,0xb + 8000ab3c: 06740413 addi x8,x8,103 + 8000ab40: 00a41413 slli x8,x8,0xa + 8000ab44: 3e540413 addi x8,x8,997 + 8000ab48: fff44413 xori x8,x8,-1 + 8000ab4c: 0083f433 and x8,x7,x8 + 8000ab50: 0087e433 or x8,x15,x8 + 8000ab54: 0204d493 srli x9,x9,0x20 + 8000ab58: 1c04f493 andi x9,x9,448 + 8000ab5c: 00849493 slli x9,x9,0x8 + 8000ab60: 00946433 or x8,x8,x9 + 8000ab64: 00033483 ld x9,0(x6) + 8000ab68: 02848263 beq x9,x8,8000ab8c + 8000ab6c: 00040313 addi x6,x8,0 + 8000ab70: 00048213 addi x4,x9,0 + 8000ab74: 6b4003ef jal x7,8000b228 + 8000ab78: 8000aac8 .word 0x8000aac8 + 8000ab7c: 00000000 .word 0x00000000 + 8000ab80: 800217b6 .word 0x800217b6 + 8000ab84: 00000000 .word 0x00000000 + 8000ab88: 00000341 .word 0x00000341 + +000000008000ab8c : + 8000ab8c: 00070413 addi x8,x14,0 + 8000ab90: 00833483 ld x9,8(x6) + 8000ab94: 02848263 beq x9,x8,8000abb8 + 8000ab98: 00040313 addi x6,x8,0 + 8000ab9c: 00048213 addi x4,x9,0 + 8000aba0: 688003ef jal x7,8000b228 + 8000aba4: 8000ab8c .word 0x8000ab8c + 8000aba8: 00000000 .word 0x00000000 + 8000abac: 800218b8 .word 0x800218b8 + 8000abb0: 00000000 .word 0x00000000 + 8000abb4: 00000341 .word 0x00000341 + 8000abb8: 12074063 blt x14,x0,8000acd8 + +000000008000abbc : + 8000abbc: 34102473 csrrs x8,mepc,x0 + 8000abc0: 00010493 addi x9,x2,0 + 8000abc4: 0040006f jal x0,8000abc8 + +000000008000abc8 : + 8000abc8: 08000393 addi x7,x0,128 + 8000abcc: 04740863 beq x8,x7,8000ac1c + 8000abd0: 00238393 addi x7,x7,2 + 8000abd4: 04740463 beq x8,x7,8000ac1c + 8000abd8: 04040263 beq x8,x0,8000ac1c + 8000abdc: 2884b383 ld x7,648(x9) + 8000abe0: 2904b783 ld x15,656(x9) + 8000abe4: 007787b3 add x15,x15,x7 + 8000abe8: 00f47463 bgeu x8,x15,8000abf0 + 8000abec: 02747663 bgeu x8,x7,8000ac18 + +000000008000abf0 : + 8000abf0: 2584b383 ld x7,600(x9) + 8000abf4: 2604b783 ld x15,608(x9) + 8000abf8: 007787b3 add x15,x15,x7 + 8000abfc: 00f47463 bgeu x8,x15,8000ac04 + 8000ac00: 00747c63 bgeu x8,x7,8000ac18 + +000000008000ac04 : + 8000ac04: 2684b383 ld x7,616(x9) + 8000ac08: 2704b783 ld x15,624(x9) + 8000ac0c: 007787b3 add x15,x15,x7 + 8000ac10: d2f47a63 bgeu x8,x15,8000a144 + 8000ac14: d2746863 bltu x8,x7,8000a144 + +000000008000ac18 : + 8000ac18: 40740433 sub x8,x8,x7 + +000000008000ac1c : + 8000ac1c: 01033483 ld x9,16(x6) + 8000ac20: 02848263 beq x9,x8,8000ac44 + 8000ac24: 00040313 addi x6,x8,0 + 8000ac28: 00048213 addi x4,x9,0 + 8000ac2c: 5fc003ef jal x7,8000b228 + 8000ac30: 8000ac1c .word 0x8000ac1c + 8000ac34: 00000000 .word 0x00000000 + 8000ac38: 800219b3 .word 0x800219b3 + 8000ac3c: 00000000 .word 0x00000000 + 8000ac40: 00000341 .word 0x00000341 + +000000008000ac44 : + 8000ac44: 34102473 csrrs x8,mepc,x0 + 8000ac48: 342023f3 csrrs x7,mcause,x0 + 8000ac4c: 00c00793 addi x15,x0,12 + 8000ac50: 00f38a63 beq x7,x15,8000ac64 + 8000ac54: 00100793 addi x15,x0,1 + 8000ac58: 00f38663 beq x7,x15,8000ac64 + 8000ac5c: 01400793 addi x15,x0,20 + 8000ac60: 00f39663 bne x7,x15,8000ac6c + 8000ac64: 34109073 csrrw x0,mepc,x1 + 8000ac68: 0100006f jal x0,8000ac78 + +000000008000ac6c : + 8000ac6c: 00400393 addi x7,x0,4 + 8000ac70: 00740433 add x8,x8,x7 + 8000ac74: 34141073 csrrw x0,mepc,x8 + +000000008000ac78 : + 8000ac78: 34302473 csrrs x8,mtval,x0 + +000000008000ac7c : + 8000ac7c: 01833483 ld x9,24(x6) + 8000ac80: 02848263 beq x9,x8,8000aca4 + 8000ac84: 00040313 addi x6,x8,0 + 8000ac88: 00048213 addi x4,x9,0 + 8000ac8c: 59c003ef jal x7,8000b228 + 8000ac90: 8000ac7c .word 0x8000ac7c + 8000ac94: 00000000 .word 0x00000000 + 8000ac98: 80021aa6 .word 0x80021aa6 + 8000ac9c: 00000000 .word 0x00000000 + 8000aca0: 00000341 .word 0x00000341 + +000000008000aca4 : + 8000aca4: 30102473 csrrs x8,misa,x0 + 8000aca8: 03841413 slli x8,x8,0x38 + 8000acac: 00045263 bge x8,x0,8000acb0 + +000000008000acb0 : + 8000acb0: 20000393 addi x7,x0,512 + 8000acb4: 0640006f jal x0,8000ad18 + +000000008000acb8 : + 8000acb8: 2e013303 ld x6,736(x2) + 8000acbc: 2e813383 ld x7,744(x2) + 8000acc0: 2f013403 ld x8,752(x2) + 8000acc4: 2f813483 ld x9,760(x2) + 8000acc8: 30013703 ld x14,768(x2) + 8000accc: 30813783 ld x15,776(x2) + 8000acd0: 31013103 ld x2,784(x2) + 8000acd4: 30200073 mret + +000000008000acd8 : + 8000acd8: 00100413 addi x8,x0,1 + 8000acdc: 01f77393 andi x7,x14,31 + 8000ace0: 00741433 sll x8,x8,x7 + 8000ace4: 304434f3 csrrc x9,mie,x8 + 8000ace8: 34443473 csrrc x8,mip,x8 + +000000008000acec : + 8000acec: 01033483 ld x9,16(x6) + 8000acf0: 02848263 beq x9,x8,8000ad14 + 8000acf4: 00040313 addi x6,x8,0 + 8000acf8: 00048213 addi x4,x9,0 + 8000acfc: 52c003ef jal x7,8000b228 + 8000ad00: 8000acec .word 0x8000acec + 8000ad04: 00000000 .word 0x00000000 + 8000ad08: 80021c19 .word 0x80021c19 + 8000ad0c: 00000000 .word 0x00000000 + 8000ad10: 00000341 .word 0x00000341 + 8000ad14: 00000393 addi x7,x0,0 + +000000008000ad18 : + 8000ad18: 00000417 auipc x8,0x0 + 8000ad1c: 03c40413 addi x8,x8,60 # 8000ad54 + 8000ad20: 00740433 add x8,x8,x7 + 8000ad24: 00371393 slli x7,x14,0x3 + 8000ad28: 00740433 add x8,x8,x7 + 8000ad2c: ff847413 andi x8,x8,-8 + 8000ad30: 00043403 ld x8,0(x8) + +000000008000ad34 : + 8000ad34: 00040a63 beq x8,x0,8000ad48 + 8000ad38: 03f41393 slli x7,x8,0x3f + 8000ad3c: 0003d863 bge x7,x0,8000ad4c + 8000ad40: 00145413 srli x8,x8,0x1 + 8000ad44: f6870ae3 beq x14,x8,8000acb8 + 8000ad48: bfcff06f jal x0,8000a144 + +000000008000ad4c : + 8000ad4c: 00040067 jalr x0,0(x8) + +000000008000ad50 : + ... + 8000ad58: 00000001 .word 0x00000001 + 8000ad5c: 00000000 .word 0x00000000 + 8000ad60: 00000001 .word 0x00000001 + 8000ad64: 00000000 .word 0x00000000 + 8000ad68: 80042000 .word 0x80042000 + ... + 8000ad78: 00000001 .word 0x00000001 + 8000ad7c: 00000000 .word 0x00000000 + 8000ad80: 00000001 .word 0x00000001 + 8000ad84: 00000000 .word 0x00000000 + 8000ad88: 80042014 .word 0x80042014 + ... + 8000ad98: 00000001 .word 0x00000001 + 8000ad9c: 00000000 .word 0x00000000 + 8000ada0: 00000001 .word 0x00000001 + 8000ada4: 00000000 .word 0x00000000 + 8000ada8: 8004202c .word 0x8004202c + 8000adac: 00000000 .word 0x00000000 + 8000adb0: 00000001 .word 0x00000001 + 8000adb4: 00000000 .word 0x00000000 + 8000adb8: 00000001 .word 0x00000001 + 8000adbc: 00000000 .word 0x00000000 + 8000adc0: 00000001 .word 0x00000001 + 8000adc4: 00000000 .word 0x00000000 + 8000adc8: 00000001 .word 0x00000001 + 8000adcc: 00000000 .word 0x00000000 + 8000add0: 00000001 .word 0x00000001 + 8000add4: 00000000 .word 0x00000000 + 8000add8: 00000001 .word 0x00000001 + 8000addc: 00000000 .word 0x00000000 + 8000ade0: 00000001 .word 0x00000001 + 8000ade4: 00000000 .word 0x00000000 + 8000ade8: 00000001 .word 0x00000001 + 8000adec: 00000000 .word 0x00000000 + 8000adf0: 00000001 .word 0x00000001 + 8000adf4: 00000000 .word 0x00000000 + 8000adf8: 00000001 .word 0x00000001 + 8000adfc: 00000000 .word 0x00000000 + 8000ae00: 00000001 .word 0x00000001 + 8000ae04: 00000000 .word 0x00000000 + 8000ae08: 00000001 .word 0x00000001 + ... + +000000008000af50 : + 8000af50: 00000001 .word 0x00000001 + 8000af54: 00000000 .word 0x00000000 + 8000af58: 00000003 .word 0x00000003 + 8000af5c: 00000000 .word 0x00000000 + 8000af60: 00000005 .word 0x00000005 + 8000af64: 00000000 .word 0x00000000 + 8000af68: 00000007 .word 0x00000007 + 8000af6c: 00000000 .word 0x00000000 + 8000af70: 00000009 .word 0x00000009 + 8000af74: 00000000 .word 0x00000000 + 8000af78: 0000000b .word 0x0000000b + 8000af7c: 00000000 .word 0x00000000 + 8000af80: 0000000d .word 0x0000000d + 8000af84: 00000000 .word 0x00000000 + 8000af88: 0000000f .word 0x0000000f + 8000af8c: 00000000 .word 0x00000000 + 8000af90: 00000011 .word 0x00000011 + 8000af94: 00000000 .word 0x00000000 + 8000af98: 00000013 .word 0x00000013 + 8000af9c: 00000000 .word 0x00000000 + 8000afa0: 00000015 .word 0x00000015 + 8000afa4: 00000000 .word 0x00000000 + 8000afa8: 00000017 .word 0x00000017 + 8000afac: 00000000 .word 0x00000000 + 8000afb0: 00000019 .word 0x00000019 + 8000afb4: 00000000 .word 0x00000000 + 8000afb8: 0000001b .word 0x0000001b + 8000afbc: 00000000 .word 0x00000000 + 8000afc0: 0000001d .word 0x0000001d + 8000afc4: 00000000 .word 0x00000000 + 8000afc8: 0000001f .word 0x0000001f + 8000afcc: 00000000 .word 0x00000000 + 8000afd0: 00000021 .word 0x00000021 + 8000afd4: 00000000 .word 0x00000000 + 8000afd8: 00000023 .word 0x00000023 + 8000afdc: 00000000 .word 0x00000000 + 8000afe0: 00000025 .word 0x00000025 + 8000afe4: 00000000 .word 0x00000000 + 8000afe8: 00000027 .word 0x00000027 + 8000afec: 00000000 .word 0x00000000 + 8000aff0: 00000029 .word 0x00000029 + 8000aff4: 00000000 .word 0x00000000 + 8000aff8: 0000002b .word 0x0000002b + 8000affc: 00000000 .word 0x00000000 + 8000b000: 0000002d .word 0x0000002d + 8000b004: 00000000 .word 0x00000000 + 8000b008: 0000002f .word 0x0000002f + ... + +000000008000b150 : + 8000b150: 300023f3 csrrs x7,mstatus,x0 + 8000b154: 00b3d493 srli x9,x7,0xb + 8000b158: 0034f493 andi x9,x9,3 + 8000b15c: ffd48413 addi x8,x9,-3 + 8000b160: 341023f3 csrrs x7,mepc,x0 + 8000b164: 00000493 addi x9,x0,0 + 8000b168: 02040c63 beq x8,x0,8000b1a0 + 8000b16c: 35810113 addi x2,x2,856 + 8000b170: 300023f3 csrrs x7,mstatus,x0 + 8000b174: 01839393 slli x7,x7,0x18 + 8000b178: 0003da63 bge x7,x0,8000b18c + +000000008000b17c : + 8000b17c: 35810113 addi x2,x2,856 + 8000b180: 5b013783 ld x15,1456(x2) + 8000b184: ca810113 addi x2,x2,-856 + 8000b188: 0080006f jal x0,8000b190 + +000000008000b18c : + 8000b18c: f0013783 ld x15,-256(x2) + 8000b190: 341023f3 csrrs x7,mepc,x0 + 8000b194: 40f383b3 sub x7,x7,x15 + 8000b198: ca810113 addi x2,x2,-856 + 8000b19c: 25813483 ld x9,600(x2) + +000000008000b1a0 : + 8000b1a0: 007483b3 add x7,x9,x7 + 8000b1a4: 2e013303 ld x6,736(x2) + 8000b1a8: 2f013403 ld x8,752(x2) + 8000b1ac: 2f813483 ld x9,760(x2) + 8000b1b0: 30013703 ld x14,768(x2) + 8000b1b4: 30813783 ld x15,776(x2) + 8000b1b8: 31013103 ld x2,784(x2) + 8000b1bc: 00438067 jalr x0,4(x7) + +000000008000b1c0 : + 8000b1c0: 00016217 auipc x4,0x16 + 8000b1c4: cd020213 addi x4,x4,-816 # 80020e90 + 8000b1c8: 02523423 sd x5,40(x4) # 28 + 8000b1cc: 00123423 sd x1,8(x4) # 8 + 8000b1d0: 00023023 sd x0,0(x4) # 0 + 8000b1d4: 0880006f jal x0,8000b25c + +000000008000b1d8 : + 8000b1d8: 00016397 auipc x7,0x16 + 8000b1dc: cb838393 addi x7,x7,-840 # 80020e90 + 8000b1e0: 0483b023 sd x8,64(x7) + 8000b1e4: 0243b023 sd x4,32(x7) + 8000b1e8: 0253b423 sd x5,40(x7) + 8000b1ec: 0013b423 sd x1,8(x7) + 8000b1f0: 0003b023 sd x0,0(x7) + 8000b1f4: 00038213 addi x4,x7,0 + 8000b1f8: 00040293 addi x5,x8,0 + 8000b1fc: 0600006f jal x0,8000b25c + +000000008000b200 : + 8000b200: 00016697 auipc x13,0x16 + 8000b204: c9068693 addi x13,x13,-880 # 80020e90 + 8000b208: 06e6b823 sd x14,112(x13) + 8000b20c: 0246b023 sd x4,32(x13) + 8000b210: 0256b423 sd x5,40(x13) + 8000b214: 0016b423 sd x1,8(x13) + 8000b218: 0006b023 sd x0,0(x13) + 8000b21c: 00068213 addi x4,x13,0 + 8000b220: 00070293 addi x5,x14,0 + 8000b224: 0380006f jal x0,8000b25c + +000000008000b228 : + 8000b228: 00016497 auipc x9,0x16 + 8000b22c: c6848493 addi x9,x9,-920 # 80020e90 + 8000b230: 0674b423 sd x7,104(x9) + 8000b234: 0244b023 sd x4,32(x9) + 8000b238: 0254b423 sd x5,40(x9) + 8000b23c: 0014b423 sd x1,8(x9) + 8000b240: 00300093 addi x1,x0,3 + 8000b244: 0014b023 sd x1,0(x9) + 8000b248: 1064b823 sd x6,272(x9) + 8000b24c: 1044bc23 sd x4,280(x9) + 8000b250: 00048213 addi x4,x9,0 + 8000b254: 00038293 addi x5,x7,0 + 8000b258: 0040006f jal x0,8000b25c + +000000008000b25c : + 8000b25c: 00223823 sd x2,16(x4) # 10 + 8000b260: 00323c23 sd x3,24(x4) # 18 + 8000b264: 02623823 sd x6,48(x4) # 30 + 8000b268: 02723c23 sd x7,56(x4) # 38 + 8000b26c: 04823023 sd x8,64(x4) # 40 + 8000b270: 04923423 sd x9,72(x4) # 48 + 8000b274: 04a23823 sd x10,80(x4) # 50 + 8000b278: 04b23c23 sd x11,88(x4) # 58 + 8000b27c: 06c23023 sd x12,96(x4) # 60 + 8000b280: 06d23423 sd x13,104(x4) # 68 + 8000b284: 06e23823 sd x14,112(x4) # 70 + 8000b288: 06f23c23 sd x15,120(x4) # 78 + 8000b28c: 09023023 sd x16,128(x4) # 80 + 8000b290: 09123423 sd x17,136(x4) # 88 + 8000b294: 09223823 sd x18,144(x4) # 90 + 8000b298: 09323c23 sd x19,152(x4) # 98 + 8000b29c: 0b423023 sd x20,160(x4) # a0 + 8000b2a0: 0b523423 sd x21,168(x4) # a8 + 8000b2a4: 0b623823 sd x22,176(x4) # b0 + 8000b2a8: 0b723c23 sd x23,184(x4) # b8 + 8000b2ac: 0d823023 sd x24,192(x4) # c0 + 8000b2b0: 0d923423 sd x25,200(x4) # c8 + 8000b2b4: 0da23823 sd x26,208(x4) # d0 + 8000b2b8: 0db23c23 sd x27,216(x4) # d8 + 8000b2bc: 0fc23023 sd x28,224(x4) # e0 + 8000b2c0: 0fd23423 sd x29,232(x4) # e8 + 8000b2c4: 0fe23823 sd x30,240(x4) # f0 + 8000b2c8: 0ff23c23 sd x31,248(x4) # f8 + +000000008000b2cc : + 8000b2cc: 00016497 auipc x9,0x16 + 8000b2d0: bc44a483 lw x9,-1084(x9) # 80020e90 + 8000b2d4: 00300513 addi x10,x0,3 + 8000b2d8: 18a48a63 beq x9,x10,8000b46c + +000000008000b2dc : + 8000b2dc: ffa2d303 lhu x6,-6(x5) + 8000b2e0: ff82d383 lhu x7,-8(x5) + 8000b2e4: 01031313 slli x6,x6,0x10 + 8000b2e8: 00736333 or x6,x6,x7 + 8000b2ec: 00f35393 srli x7,x6,0xf + 8000b2f0: 01f3f393 andi x7,x7,31 + 8000b2f4: 01435413 srli x8,x6,0x14 + 8000b2f8: 01f47413 andi x8,x8,31 + 8000b2fc: 10822223 sw x8,260(x4) # 104 + 8000b300: 00341313 slli x6,x8,0x3 + 8000b304: 00620333 add x6,x4,x6 + 8000b308: 00033303 ld x6,0(x6) + 8000b30c: 10623823 sd x6,272(x4) # 110 + 8000b310: ff62d303 lhu x6,-10(x5) + 8000b314: ff42d383 lhu x7,-12(x5) + 8000b318: 01031313 slli x6,x6,0x10 + 8000b31c: 00736333 or x6,x6,x7 + 8000b320: 00030513 addi x10,x6,0 + 8000b324: 07f37413 andi x8,x6,127 + 8000b328: 00300493 addi x9,x0,3 + 8000b32c: 0c941463 bne x8,x9,8000b3f4 + 8000b330: 00c35413 srli x8,x6,0xc + 8000b334: 00747413 andi x8,x8,7 + 8000b338: 00300493 addi x9,x0,3 + 8000b33c: 0a941c63 bne x8,x9,8000b3f4 + 8000b340: 41435393 srai x7,x6,0x14 + 8000b344: 00f35313 srli x6,x6,0xf + 8000b348: 01f37313 andi x6,x6,31 + 8000b34c: 00331313 slli x6,x6,0x3 + 8000b350: 00620333 add x6,x4,x6 + 8000b354: 00033303 ld x6,0(x6) + 8000b358: 00730333 add x6,x6,x7 + 8000b35c: 00737413 andi x8,x6,7 + 8000b360: 0c041663 bne x8,x0,8000b42c + 8000b364: 00000013 addi x0,x0,0 + 8000b368: 00000013 addi x0,x0,0 + 8000b36c: 00000013 addi x0,x0,0 + 8000b370: 00000013 addi x0,x0,0 + 8000b374: 00000013 addi x0,x0,0 + 8000b378: 00000013 addi x0,x0,0 + 8000b37c: 00000013 addi x0,x0,0 + 8000b380: 00018417 auipc x8,0x18 + 8000b384: 90040413 addi x8,x8,-1792 # 80022c80 + 8000b388: 00000013 addi x0,x0,0 + 8000b38c: 00000013 addi x0,x0,0 + 8000b390: 00000013 addi x0,x0,0 + 8000b394: 00000013 addi x0,x0,0 + 8000b398: 00000013 addi x0,x0,0 + 8000b39c: 00000013 addi x0,x0,0 + 8000b3a0: 08836663 bltu x6,x8,8000b42c + 8000b3a4: 00000013 addi x0,x0,0 + 8000b3a8: 00000013 addi x0,x0,0 + 8000b3ac: 00000013 addi x0,x0,0 + 8000b3b0: 00000013 addi x0,x0,0 + 8000b3b4: 00000013 addi x0,x0,0 + 8000b3b8: 00000013 addi x0,x0,0 + 8000b3bc: 00000013 addi x0,x0,0 + 8000b3c0: 00036417 auipc x8,0x36 + 8000b3c4: 62040413 addi x8,x8,1568 # 800419e0 + 8000b3c8: 00000013 addi x0,x0,0 + 8000b3cc: 00000013 addi x0,x0,0 + 8000b3d0: 00000013 addi x0,x0,0 + 8000b3d4: 00000013 addi x0,x0,0 + 8000b3d8: 00000013 addi x0,x0,0 + 8000b3dc: 00000013 addi x0,x0,0 + 8000b3e0: ff840413 addi x8,x8,-8 + 8000b3e4: 04646463 bltu x8,x6,8000b42c + 8000b3e8: 00033303 ld x6,0(x6) + 8000b3ec: 10623c23 sd x6,280(x4) # 118 + 8000b3f0: 3880006f jal x0,8000b778 + +000000008000b3f4 : + 8000b3f4: 00100413 addi x8,x0,1 + 8000b3f8: 00000013 addi x0,x0,0 + 8000b3fc: 00000013 addi x0,x0,0 + 8000b400: 00016497 auipc x9,0x16 + 8000b404: bb848493 addi x9,x9,-1096 # 80020fb8 + 8000b408: 00000013 addi x0,x0,0 + 8000b40c: 00000013 addi x0,x0,0 + 8000b410: 00000013 addi x0,x0,0 + 8000b414: 00000013 addi x0,x0,0 + 8000b418: 00000013 addi x0,x0,0 + 8000b41c: 00000013 addi x0,x0,0 + 8000b420: 0084a023 sw x8,0(x9) + 8000b424: 10a23c23 sd x10,280(x4) # 118 + 8000b428: 3500006f jal x0,8000b778 + +000000008000b42c : + 8000b42c: 00200413 addi x8,x0,2 + 8000b430: 00000013 addi x0,x0,0 + 8000b434: 00000013 addi x0,x0,0 + 8000b438: 00000013 addi x0,x0,0 + 8000b43c: 00000013 addi x0,x0,0 + 8000b440: 00016497 auipc x9,0x16 + 8000b444: b7848493 addi x9,x9,-1160 # 80020fb8 + 8000b448: 00000013 addi x0,x0,0 + 8000b44c: 00000013 addi x0,x0,0 + 8000b450: 00000013 addi x0,x0,0 + 8000b454: 00000013 addi x0,x0,0 + 8000b458: 00000013 addi x0,x0,0 + 8000b45c: 00000013 addi x0,x0,0 + 8000b460: 0084a023 sw x8,0(x9) + 8000b464: 10623c23 sd x6,280(x4) # 118 + 8000b468: 3100006f jal x0,8000b778 + +000000008000b46c : + 8000b46c: 0082e303 lwu x6,8(x5) + 8000b470: 00c2a383 lw x7,12(x5) + 8000b474: 02039393 slli x7,x7,0x20 + 8000b478: 00736333 or x6,x6,x7 + 8000b47c: 00016817 auipc x16,0x16 + 8000b480: b4c80813 addi x16,x16,-1204 # 80020fc8 + 8000b484: 00683023 sd x6,0(x16) + 8000b488: 0002e303 lwu x6,0(x5) + 8000b48c: 0042a383 lw x7,4(x5) + 8000b490: 02039393 slli x7,x7,0x20 + 8000b494: 00736333 or x6,x6,x7 + 8000b498: 10623423 sd x6,264(x4) # 108 + 8000b49c: 00016817 auipc x16,0x16 + 8000b4a0: b2c80813 addi x16,x16,-1236 # 80020fc8 + 8000b4a4: 00083303 ld x6,0(x16) + 8000b4a8: 00016397 auipc x7,0x16 + 8000b4ac: 2f738393 addi x7,x7,759 # 8002179f + 8000b4b0: 28730463 beq x6,x7,8000b738 + 8000b4b4: 00000413 addi x8,x0,0 + 8000b4b8: 00016817 auipc x16,0x16 + 8000b4bc: b0880813 addi x16,x16,-1272 # 80020fc0 + 8000b4c0: 00882023 sw x8,0(x16) + 8000b4c4: 00016397 auipc x7,0x16 + 8000b4c8: 2f238393 addi x7,x7,754 # 800217b6 + 8000b4cc: 00731863 bne x6,x7,8000b4dc + 8000b4d0: 00100413 addi x8,x0,1 + 8000b4d4: 00000493 addi x9,x0,0 + 8000b4d8: 2740006f jal x0,8000b74c + 8000b4dc: 00016397 auipc x7,0x16 + 8000b4e0: 3dc38393 addi x7,x7,988 # 800218b8 + 8000b4e4: 00731863 bne x6,x7,8000b4f4 + 8000b4e8: 00200413 addi x8,x0,2 + 8000b4ec: 00000493 addi x9,x0,0 + 8000b4f0: 25c0006f jal x0,8000b74c + 8000b4f4: 00016397 auipc x7,0x16 + 8000b4f8: 4bf38393 addi x7,x7,1215 # 800219b3 + 8000b4fc: 00731863 bne x6,x7,8000b50c + 8000b500: 00300413 addi x8,x0,3 + 8000b504: 00000493 addi x9,x0,0 + 8000b508: 2440006f jal x0,8000b74c + 8000b50c: 00016397 auipc x7,0x16 + 8000b510: 59a38393 addi x7,x7,1434 # 80021aa6 + 8000b514: 00731863 bne x6,x7,8000b524 + 8000b518: 00400413 addi x8,x0,4 + 8000b51c: 00000493 addi x9,x0,0 + 8000b520: 22c0006f jal x0,8000b74c + 8000b524: 00016397 auipc x7,0x16 + 8000b528: 6f538393 addi x7,x7,1781 # 80021c19 + 8000b52c: 00731863 bne x6,x7,8000b53c + 8000b530: 00500413 addi x8,x0,5 + 8000b534: 00000493 addi x9,x0,0 + 8000b538: 2140006f jal x0,8000b74c + 8000b53c: 00016397 auipc x7,0x16 + 8000b540: 66138393 addi x7,x7,1633 # 80021b9d + 8000b544: 00731863 bne x6,x7,8000b554 + 8000b548: 00600413 addi x8,x0,6 + 8000b54c: 00000493 addi x9,x0,0 + 8000b550: 1fc0006f jal x0,8000b74c + 8000b554: 00016397 auipc x7,0x16 + 8000b558: 68738393 addi x7,x7,1671 # 80021bdb + 8000b55c: 00731863 bne x6,x7,8000b56c + 8000b560: 00700413 addi x8,x0,7 + 8000b564: 00000493 addi x9,x0,0 + 8000b568: 1e40006f jal x0,8000b74c + 8000b56c: 00016397 auipc x7,0x16 + 8000b570: 28a38393 addi x7,x7,650 # 800217f6 + 8000b574: 00731863 bne x6,x7,8000b584 + 8000b578: 00100413 addi x8,x0,1 + 8000b57c: 00100493 addi x9,x0,1 + 8000b580: 1cc0006f jal x0,8000b74c + 8000b584: 00016397 auipc x7,0x16 + 8000b588: 37238393 addi x7,x7,882 # 800218f6 + 8000b58c: 00731863 bne x6,x7,8000b59c + 8000b590: 00200413 addi x8,x0,2 + 8000b594: 00100493 addi x9,x0,1 + 8000b598: 1b40006f jal x0,8000b74c + 8000b59c: 00016397 auipc x7,0x16 + 8000b5a0: 45338393 addi x7,x7,1107 # 800219ef + 8000b5a4: 00731863 bne x6,x7,8000b5b4 + 8000b5a8: 00300413 addi x8,x0,3 + 8000b5ac: 00100493 addi x9,x0,1 + 8000b5b0: 19c0006f jal x0,8000b74c + 8000b5b4: 00016397 auipc x7,0x16 + 8000b5b8: 52f38393 addi x7,x7,1327 # 80021ae3 + 8000b5bc: 00731863 bne x6,x7,8000b5cc + 8000b5c0: 00400413 addi x8,x0,4 + 8000b5c4: 00100493 addi x9,x0,1 + 8000b5c8: 1840006f jal x0,8000b74c + 8000b5cc: 00016397 auipc x7,0x16 + 8000b5d0: 68838393 addi x7,x7,1672 # 80021c54 + 8000b5d4: 00731863 bne x6,x7,8000b5e4 + 8000b5d8: 00500413 addi x8,x0,5 + 8000b5dc: 00100493 addi x9,x0,1 + 8000b5e0: 16c0006f jal x0,8000b74c + 8000b5e4: 00016397 auipc x7,0x16 + 8000b5e8: 25238393 addi x7,x7,594 # 80021836 + 8000b5ec: 00731863 bne x6,x7,8000b5fc + 8000b5f0: 00100413 addi x8,x0,1 + 8000b5f4: 00200493 addi x9,x0,2 + 8000b5f8: 1540006f jal x0,8000b74c + 8000b5fc: 00016397 auipc x7,0x16 + 8000b600: 33838393 addi x7,x7,824 # 80021934 + 8000b604: 00731863 bne x6,x7,8000b614 + 8000b608: 00200413 addi x8,x0,2 + 8000b60c: 00200493 addi x9,x0,2 + 8000b610: 13c0006f jal x0,8000b74c + 8000b614: 00016397 auipc x7,0x16 + 8000b618: 41738393 addi x7,x7,1047 # 80021a2b + 8000b61c: 00731863 bne x6,x7,8000b62c + 8000b620: 00300413 addi x8,x0,3 + 8000b624: 00200493 addi x9,x0,2 + 8000b628: 1240006f jal x0,8000b74c + 8000b62c: 00016397 auipc x7,0x16 + 8000b630: 4f438393 addi x7,x7,1268 # 80021b20 + 8000b634: 00731863 bne x6,x7,8000b644 + 8000b638: 00400413 addi x8,x0,4 + 8000b63c: 00200493 addi x9,x0,2 + 8000b640: 10c0006f jal x0,8000b74c + 8000b644: 00016397 auipc x7,0x16 + 8000b648: 64b38393 addi x7,x7,1611 # 80021c8f + 8000b64c: 00731863 bne x6,x7,8000b65c + 8000b650: 00500413 addi x8,x0,5 + 8000b654: 00200493 addi x9,x0,2 + 8000b658: 0f40006f jal x0,8000b74c + 8000b65c: 00016397 auipc x7,0x16 + 8000b660: 21b38393 addi x7,x7,539 # 80021877 + 8000b664: 00731863 bne x6,x7,8000b674 + 8000b668: 00100413 addi x8,x0,1 + 8000b66c: 00300493 addi x9,x0,3 + 8000b670: 0dc0006f jal x0,8000b74c + 8000b674: 00016397 auipc x7,0x16 + 8000b678: 2ff38393 addi x7,x7,767 # 80021973 + 8000b67c: 00731863 bne x6,x7,8000b68c + 8000b680: 00200413 addi x8,x0,2 + 8000b684: 00300493 addi x9,x0,3 + 8000b688: 0c40006f jal x0,8000b74c + 8000b68c: 00016397 auipc x7,0x16 + 8000b690: 3dc38393 addi x7,x7,988 # 80021a68 + 8000b694: 00731863 bne x6,x7,8000b6a4 + 8000b698: 00300413 addi x8,x0,3 + 8000b69c: 00300493 addi x9,x0,3 + 8000b6a0: 0ac0006f jal x0,8000b74c + 8000b6a4: 00016397 auipc x7,0x16 + 8000b6a8: 4ba38393 addi x7,x7,1210 # 80021b5e + 8000b6ac: 00731863 bne x6,x7,8000b6bc + 8000b6b0: 00400413 addi x8,x0,4 + 8000b6b4: 00300493 addi x9,x0,3 + 8000b6b8: 0940006f jal x0,8000b74c + 8000b6bc: 00016397 auipc x7,0x16 + 8000b6c0: 60f38393 addi x7,x7,1551 # 80021ccb + 8000b6c4: 00731863 bne x6,x7,8000b6d4 + 8000b6c8: 00500413 addi x8,x0,5 + 8000b6cc: 00300493 addi x9,x0,3 + 8000b6d0: 07c0006f jal x0,8000b74c + 8000b6d4: 00016397 auipc x7,0x16 + 8000b6d8: 63438393 addi x7,x7,1588 # 80021d08 + 8000b6dc: 00731863 bne x6,x7,8000b6ec + 8000b6e0: 00800413 addi x8,x0,8 + 8000b6e4: 00000493 addi x9,x0,0 + 8000b6e8: 0640006f jal x0,8000b74c + 8000b6ec: 00016397 auipc x7,0x16 + 8000b6f0: 66b38393 addi x7,x7,1643 # 80021d57 + 8000b6f4: 00731863 bne x6,x7,8000b704 + 8000b6f8: 00800413 addi x8,x0,8 + 8000b6fc: 00000493 addi x9,x0,0 + 8000b700: 04c0006f jal x0,8000b74c + 8000b704: 00016397 auipc x7,0x16 + 8000b708: 74e38393 addi x7,x7,1870 # 80021e52 + 8000b70c: 00731863 bne x6,x7,8000b71c + 8000b710: 00800413 addi x8,x0,8 + 8000b714: 00100493 addi x9,x0,1 + 8000b718: 0340006f jal x0,8000b74c + 8000b71c: 00017397 auipc x7,0x17 + 8000b720: 83238393 addi x7,x7,-1998 # 80021f4e + 8000b724: 00731863 bne x6,x7,8000b734 + 8000b728: 00800413 addi x8,x0,8 + 8000b72c: 00200493 addi x9,x0,2 + 8000b730: 01c0006f jal x0,8000b74c + 8000b734: 0340006f jal x0,8000b768 + +000000008000b738 : + 8000b738: 00900413 addi x8,x0,9 + 8000b73c: 00016817 auipc x16,0x16 + 8000b740: 88480813 addi x16,x16,-1916 # 80020fc0 + 8000b744: 00882023 sw x8,0(x16) + 8000b748: 0300006f jal x0,8000b778 + +000000008000b74c : + 8000b74c: 00016817 auipc x16,0x16 + 8000b750: 87480813 addi x16,x16,-1932 # 80020fc0 + 8000b754: 00882023 sw x8,0(x16) + 8000b758: 00016817 auipc x16,0x16 + 8000b75c: 86c80813 addi x16,x16,-1940 # 80020fc4 + 8000b760: 00982023 sw x9,0(x16) + 8000b764: 0140006f jal x0,8000b778 + +000000008000b768 : + 8000b768: 00016817 auipc x16,0x16 + 8000b76c: 85880813 addi x16,x16,-1960 # 80020fc0 + 8000b770: 00082023 sw x0,0(x16) + 8000b774: 0040006f jal x0,8000b778 + +000000008000b778 : + 8000b778: 0002e303 lwu x6,0(x5) + 8000b77c: 0042a383 lw x7,4(x5) + 8000b780: 02039393 slli x7,x7,0x20 + 8000b784: 00736333 or x6,x6,x7 + 8000b788: 10623423 sd x6,264(x4) # 108 + 8000b78c: 00035383 lhu x7,0(x6) + 8000b790: 0033f413 andi x8,x7,3 + 8000b794: 00300493 addi x9,x0,3 + 8000b798: 00941863 bne x8,x9,8000b7a8 + 8000b79c: 00235403 lhu x8,2(x6) + 8000b7a0: 01041413 slli x8,x8,0x10 + 8000b7a4: 0083e3b3 or x7,x7,x8 + 8000b7a8: 10722023 sw x7,256(x4) # 100 + 8000b7ac: 0082e303 lwu x6,8(x5) + 8000b7b0: 00c2a383 lw x7,12(x5) + 8000b7b4: 02039393 slli x7,x7,0x20 + 8000b7b8: 00736333 or x6,x6,x7 + 8000b7bc: 12623023 sd x6,288(x4) # 120 + +000000008000b7c0 : + 8000b7c0: 00016517 auipc x10,0x16 + 8000b7c4: df050513 addi x10,x10,-528 # 800215b0 + 8000b7c8: 00000013 addi x0,x0,0 + 8000b7cc: 00000013 addi x0,x0,0 + 8000b7d0: 00000013 addi x0,x0,0 + 8000b7d4: 00000013 addi x0,x0,0 + 8000b7d8: 00000013 addi x0,x0,0 + 8000b7dc: 00000013 addi x0,x0,0 + 8000b7e0: 00037097 auipc x1,0x37 + 8000b7e4: dc4080e7 jalr x1,-572(x1) # 800425a4 + 8000b7e8: 00000013 addi x0,x0,0 + 8000b7ec: 00000013 addi x0,x0,0 + 8000b7f0: 00000013 addi x0,x0,0 + 8000b7f4: 00000013 addi x0,x0,0 + 8000b7f8: 00000013 addi x0,x0,0 + 8000b7fc: 00000013 addi x0,x0,0 + 8000b800: 00016517 auipc x10,0x16 + 8000b804: deb50513 addi x10,x10,-533 # 800215eb + 8000b808: 00000013 addi x0,x0,0 + 8000b80c: 00000013 addi x0,x0,0 + 8000b810: 00000013 addi x0,x0,0 + 8000b814: 00000013 addi x0,x0,0 + 8000b818: 00000013 addi x0,x0,0 + 8000b81c: 00000013 addi x0,x0,0 + 8000b820: 00037097 auipc x1,0x37 + 8000b824: d84080e7 jalr x1,-636(x1) # 800425a4 + +000000008000b828 : + 8000b828: 00000013 addi x0,x0,0 + 8000b82c: 00000013 addi x0,x0,0 + 8000b830: 00000013 addi x0,x0,0 + 8000b834: 00000013 addi x0,x0,0 + 8000b838: 00000013 addi x0,x0,0 + 8000b83c: 00000013 addi x0,x0,0 + 8000b840: 00016517 auipc x10,0x16 + 8000b844: e6250513 addi x10,x10,-414 # 800216a2 + 8000b848: 00000013 addi x0,x0,0 + 8000b84c: 00000013 addi x0,x0,0 + 8000b850: 00000013 addi x0,x0,0 + 8000b854: 00000013 addi x0,x0,0 + 8000b858: 00000013 addi x0,x0,0 + 8000b85c: 00000013 addi x0,x0,0 + 8000b860: 00037097 auipc x1,0x37 + 8000b864: d44080e7 jalr x1,-700(x1) # 800425a4 + +000000008000b868 : + 8000b868: 00015517 auipc x10,0x15 + 8000b86c: 74853503 ld x10,1864(x10) # 80020fb0 + 8000b870: 00037097 auipc x1,0x37 + 8000b874: d34080e7 jalr x1,-716(x1) # 800425a4 + +000000008000b878 : + 8000b878: 00000013 addi x0,x0,0 + 8000b87c: 00000013 addi x0,x0,0 + 8000b880: 00016517 auipc x10,0x16 + 8000b884: e3450513 addi x10,x10,-460 # 800216b4 + 8000b888: 00000013 addi x0,x0,0 + 8000b88c: 00000013 addi x0,x0,0 + 8000b890: 00000013 addi x0,x0,0 + 8000b894: 00000013 addi x0,x0,0 + 8000b898: 00000013 addi x0,x0,0 + 8000b89c: 00000013 addi x0,x0,0 + 8000b8a0: 00037097 auipc x1,0x37 + 8000b8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000b8a8: 00015517 auipc x10,0x15 + 8000b8ac: 5e852503 lw x10,1512(x10) # 80020e90 + 8000b8b0: 00300593 addi x11,x0,3 + 8000b8b4: 52b50c63 beq x10,x11,8000bdec + 8000b8b8: 00000013 addi x0,x0,0 + 8000b8bc: 00000013 addi x0,x0,0 + 8000b8c0: 00016517 auipc x10,0x16 + 8000b8c4: df650513 addi x10,x10,-522 # 800216b6 + 8000b8c8: 00000013 addi x0,x0,0 + 8000b8cc: 00000013 addi x0,x0,0 + 8000b8d0: 00000013 addi x0,x0,0 + 8000b8d4: 00000013 addi x0,x0,0 + 8000b8d8: 00000013 addi x0,x0,0 + 8000b8dc: 00000013 addi x0,x0,0 + 8000b8e0: 00037097 auipc x1,0x37 + 8000b8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000b8e8: 00015517 auipc x10,0x15 + 8000b8ec: 6a852503 lw x10,1704(x10) # 80020f90 + 8000b8f0: 02000593 addi x11,x0,32 + 8000b8f4: 00357613 andi x12,x10,3 + 8000b8f8: 00300693 addi x13,x0,3 + 8000b8fc: 00d60463 beq x12,x13,8000b904 + 8000b900: 01000593 addi x11,x0,16 + 8000b904: 3f4010ef jal x1,8000ccf8 + 8000b908: 00000013 addi x0,x0,0 + 8000b90c: 00000013 addi x0,x0,0 + 8000b910: 00000013 addi x0,x0,0 + 8000b914: 00000013 addi x0,x0,0 + 8000b918: 00000013 addi x0,x0,0 + 8000b91c: 00000013 addi x0,x0,0 + 8000b920: 00015517 auipc x10,0x15 + 8000b924: 6d850513 addi x10,x10,1752 # 80020ff8 + 8000b928: 00000013 addi x0,x0,0 + 8000b92c: 00000013 addi x0,x0,0 + 8000b930: 00000013 addi x0,x0,0 + 8000b934: 00000013 addi x0,x0,0 + 8000b938: 00000013 addi x0,x0,0 + 8000b93c: 00000013 addi x0,x0,0 + 8000b940: 00037097 auipc x1,0x37 + 8000b944: c64080e7 jalr x1,-924(x1) # 800425a4 + 8000b948: 00000013 addi x0,x0,0 + 8000b94c: 00000013 addi x0,x0,0 + 8000b950: 00000013 addi x0,x0,0 + 8000b954: 00000013 addi x0,x0,0 + 8000b958: 00000013 addi x0,x0,0 + 8000b95c: 00000013 addi x0,x0,0 + 8000b960: 00016517 auipc x10,0x16 + 8000b964: d6a50513 addi x10,x10,-662 # 800216ca + 8000b968: 00000013 addi x0,x0,0 + 8000b96c: 00000013 addi x0,x0,0 + 8000b970: 00000013 addi x0,x0,0 + 8000b974: 00000013 addi x0,x0,0 + 8000b978: 00000013 addi x0,x0,0 + 8000b97c: 00000013 addi x0,x0,0 + 8000b980: 00037097 auipc x1,0x37 + 8000b984: c24080e7 jalr x1,-988(x1) # 800425a4 + 8000b988: 00015517 auipc x10,0x15 + 8000b98c: 61053503 ld x10,1552(x10) # 80020f98 + 8000b990: 04000593 addi x11,x0,64 + 8000b994: 364010ef jal x1,8000ccf8 + 8000b998: 00000013 addi x0,x0,0 + 8000b99c: 00000013 addi x0,x0,0 + 8000b9a0: 00015517 auipc x10,0x15 + 8000b9a4: 65850513 addi x10,x10,1624 # 80020ff8 + 8000b9a8: 00000013 addi x0,x0,0 + 8000b9ac: 00000013 addi x0,x0,0 + 8000b9b0: 00000013 addi x0,x0,0 + 8000b9b4: 00000013 addi x0,x0,0 + 8000b9b8: 00000013 addi x0,x0,0 + 8000b9bc: 00000013 addi x0,x0,0 + 8000b9c0: 00037097 auipc x1,0x37 + 8000b9c4: be4080e7 jalr x1,-1052(x1) # 800425a4 + 8000b9c8: 00000013 addi x0,x0,0 + 8000b9cc: 00000013 addi x0,x0,0 + 8000b9d0: 00000013 addi x0,x0,0 + 8000b9d4: 00000013 addi x0,x0,0 + 8000b9d8: 00000013 addi x0,x0,0 + 8000b9dc: 00000013 addi x0,x0,0 + 8000b9e0: 00016517 auipc x10,0x16 + 8000b9e4: 72150513 addi x10,x10,1825 # 80022101 + 8000b9e8: 00000013 addi x0,x0,0 + 8000b9ec: 00000013 addi x0,x0,0 + 8000b9f0: 00000013 addi x0,x0,0 + 8000b9f4: 00000013 addi x0,x0,0 + 8000b9f8: 00000013 addi x0,x0,0 + 8000b9fc: 00000013 addi x0,x0,0 + 8000ba00: 00037097 auipc x1,0x37 + 8000ba04: ba4080e7 jalr x1,-1116(x1) # 800425a4 + 8000ba08: 00015517 auipc x10,0x15 + 8000ba0c: 48852503 lw x10,1160(x10) # 80020e90 + 8000ba10: 00050663 beq x10,x0,8000ba1c + 8000ba14: 00300593 addi x11,x0,3 + 8000ba18: 04b51063 bne x10,x11,8000ba58 + 8000ba1c: 07800593 addi x11,x0,120 + 8000ba20: 00015617 auipc x12,0x15 + 8000ba24: 5d860613 addi x12,x12,1496 # 80020ff8 + 8000ba28: 00000013 addi x0,x0,0 + 8000ba2c: 00000013 addi x0,x0,0 + 8000ba30: 00000013 addi x0,x0,0 + 8000ba34: 00000013 addi x0,x0,0 + 8000ba38: 00000013 addi x0,x0,0 + 8000ba3c: 00000013 addi x0,x0,0 + 8000ba40: 00b60023 sb x11,0(x12) + 8000ba44: 00160613 addi x12,x12,1 + 8000ba48: 00015517 auipc x10,0x15 + 8000ba4c: 54c52503 lw x10,1356(x10) # 80020f94 + 8000ba50: 324010ef jal x1,8000cd74 + 8000ba54: 1180006f jal x0,8000bb6c + +000000008000ba58 : + 8000ba58: 00100593 addi x11,x0,1 + 8000ba5c: 04b50863 beq x10,x11,8000baac + 8000ba60: 00400593 addi x11,x0,4 + 8000ba64: 08b50a63 beq x10,x11,8000baf8 + 8000ba68: 00500593 addi x11,x0,5 + 8000ba6c: 0cb50463 beq x10,x11,8000bb34 + 8000ba70: 00000013 addi x0,x0,0 + 8000ba74: 00000013 addi x0,x0,0 + 8000ba78: 00000013 addi x0,x0,0 + 8000ba7c: 00000013 addi x0,x0,0 + 8000ba80: 00016517 auipc x10,0x16 + 8000ba84: 79750513 addi x10,x10,1943 # 80022217 + 8000ba88: 00000013 addi x0,x0,0 + 8000ba8c: 00000013 addi x0,x0,0 + 8000ba90: 00000013 addi x0,x0,0 + 8000ba94: 00000013 addi x0,x0,0 + 8000ba98: 00000013 addi x0,x0,0 + 8000ba9c: 00000013 addi x0,x0,0 + 8000baa0: 00037097 auipc x1,0x37 + 8000baa4: b04080e7 jalr x1,-1276(x1) # 800425a4 + 8000baa8: 1000006f jal x0,8000bba8 + +000000008000baac : + 8000baac: 06600593 addi x11,x0,102 + 8000bab0: 00000013 addi x0,x0,0 + 8000bab4: 00000013 addi x0,x0,0 + 8000bab8: 00000013 addi x0,x0,0 + 8000babc: 00000013 addi x0,x0,0 + 8000bac0: 00015617 auipc x12,0x15 + 8000bac4: 53860613 addi x12,x12,1336 # 80020ff8 + 8000bac8: 00000013 addi x0,x0,0 + 8000bacc: 00000013 addi x0,x0,0 + 8000bad0: 00000013 addi x0,x0,0 + 8000bad4: 00000013 addi x0,x0,0 + 8000bad8: 00000013 addi x0,x0,0 + 8000badc: 00000013 addi x0,x0,0 + 8000bae0: 00b60023 sb x11,0(x12) + 8000bae4: 00160613 addi x12,x12,1 + 8000bae8: 00015517 auipc x10,0x15 + 8000baec: 4ac52503 lw x10,1196(x10) # 80020f94 + 8000baf0: 284010ef jal x1,8000cd74 + 8000baf4: 0780006f jal x0,8000bb6c + +000000008000baf8 : + 8000baf8: 07600593 addi x11,x0,118 + 8000bafc: 00000013 addi x0,x0,0 + 8000bb00: 00015617 auipc x12,0x15 + 8000bb04: 4f860613 addi x12,x12,1272 # 80020ff8 + 8000bb08: 00000013 addi x0,x0,0 + 8000bb0c: 00000013 addi x0,x0,0 + 8000bb10: 00000013 addi x0,x0,0 + 8000bb14: 00000013 addi x0,x0,0 + 8000bb18: 00000013 addi x0,x0,0 + 8000bb1c: 00000013 addi x0,x0,0 + 8000bb20: 00b60023 sb x11,0(x12) + 8000bb24: 00160613 addi x12,x12,1 + 8000bb28: 00015517 auipc x10,0x15 + 8000bb2c: 46c52503 lw x10,1132(x10) # 80020f94 + 8000bb30: 244010ef jal x1,8000cd74 + +000000008000bb34 : + 8000bb34: 00000013 addi x0,x0,0 + 8000bb38: 00000013 addi x0,x0,0 + 8000bb3c: 00000013 addi x0,x0,0 + 8000bb40: 00016517 auipc x10,0x16 + 8000bb44: 5ba50513 addi x10,x10,1466 # 800220fa + 8000bb48: 00000013 addi x0,x0,0 + 8000bb4c: 00000013 addi x0,x0,0 + 8000bb50: 00000013 addi x0,x0,0 + 8000bb54: 00000013 addi x0,x0,0 + 8000bb58: 00000013 addi x0,x0,0 + 8000bb5c: 00000013 addi x0,x0,0 + 8000bb60: 00037097 auipc x1,0x37 + 8000bb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000bb68: 0400006f jal x0,8000bba8 + +000000008000bb6c : + 8000bb6c: 00000013 addi x0,x0,0 + 8000bb70: 00000013 addi x0,x0,0 + 8000bb74: 00000013 addi x0,x0,0 + 8000bb78: 00000013 addi x0,x0,0 + 8000bb7c: 00000013 addi x0,x0,0 + 8000bb80: 00015517 auipc x10,0x15 + 8000bb84: 47850513 addi x10,x10,1144 # 80020ff8 + 8000bb88: 00000013 addi x0,x0,0 + 8000bb8c: 00000013 addi x0,x0,0 + 8000bb90: 00000013 addi x0,x0,0 + 8000bb94: 00000013 addi x0,x0,0 + 8000bb98: 00000013 addi x0,x0,0 + 8000bb9c: 00000013 addi x0,x0,0 + 8000bba0: 00037097 auipc x1,0x37 + 8000bba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + +000000008000bba8 : + 8000bba8: 00000013 addi x0,x0,0 + 8000bbac: 00000013 addi x0,x0,0 + 8000bbb0: 00000013 addi x0,x0,0 + 8000bbb4: 00000013 addi x0,x0,0 + 8000bbb8: 00000013 addi x0,x0,0 + 8000bbbc: 00000013 addi x0,x0,0 + 8000bbc0: 00016517 auipc x10,0x16 + 8000bbc4: 55250513 addi x10,x10,1362 # 80022112 + 8000bbc8: 00000013 addi x0,x0,0 + 8000bbcc: 00000013 addi x0,x0,0 + 8000bbd0: 00000013 addi x0,x0,0 + 8000bbd4: 00000013 addi x0,x0,0 + 8000bbd8: 00000013 addi x0,x0,0 + 8000bbdc: 00000013 addi x0,x0,0 + 8000bbe0: 00037097 auipc x1,0x37 + 8000bbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000bbe8: 00015517 auipc x10,0x15 + 8000bbec: 2a852503 lw x10,680(x10) # 80020e90 + 8000bbf0: 00100593 addi x11,x0,1 + 8000bbf4: 00b51c63 bne x10,x11,8000bc0c + 8000bbf8: 00015517 auipc x10,0x15 + 8000bbfc: 3a853503 ld x10,936(x10) # 80020fa0 + 8000bc00: 04000593 addi x11,x0,64 + 8000bc04: 0f4010ef jal x1,8000ccf8 + 8000bc08: 0140006f jal x0,8000bc1c + +000000008000bc0c : + 8000bc0c: 00015517 auipc x10,0x15 + 8000bc10: 39453503 ld x10,916(x10) # 80020fa0 + 8000bc14: 04000593 addi x11,x0,64 + 8000bc18: 0e0010ef jal x1,8000ccf8 + +000000008000bc1c : + 8000bc1c: 00000013 addi x0,x0,0 + 8000bc20: 00015517 auipc x10,0x15 + 8000bc24: 3d850513 addi x10,x10,984 # 80020ff8 + 8000bc28: 00000013 addi x0,x0,0 + 8000bc2c: 00000013 addi x0,x0,0 + 8000bc30: 00000013 addi x0,x0,0 + 8000bc34: 00000013 addi x0,x0,0 + 8000bc38: 00000013 addi x0,x0,0 + 8000bc3c: 00000013 addi x0,x0,0 + 8000bc40: 00037097 auipc x1,0x37 + 8000bc44: 964080e7 jalr x1,-1692(x1) # 800425a4 + 8000bc48: 00015517 auipc x10,0x15 + 8000bc4c: 37052503 lw x10,880(x10) # 80020fb8 + 8000bc50: 08051e63 bne x10,x0,8000bcec + 8000bc54: 00000013 addi x0,x0,0 + 8000bc58: 00000013 addi x0,x0,0 + 8000bc5c: 00000013 addi x0,x0,0 + 8000bc60: 00016517 auipc x10,0x16 + 8000bc64: 4c950513 addi x10,x10,1225 # 80022129 + 8000bc68: 00000013 addi x0,x0,0 + 8000bc6c: 00000013 addi x0,x0,0 + 8000bc70: 00000013 addi x0,x0,0 + 8000bc74: 00000013 addi x0,x0,0 + 8000bc78: 00000013 addi x0,x0,0 + 8000bc7c: 00000013 addi x0,x0,0 + 8000bc80: 00037097 auipc x1,0x37 + 8000bc84: 924080e7 jalr x1,-1756(x1) # 800425a4 + 8000bc88: 00015517 auipc x10,0x15 + 8000bc8c: 20852503 lw x10,520(x10) # 80020e90 + 8000bc90: 00100593 addi x11,x0,1 + 8000bc94: 00b51c63 bne x10,x11,8000bcac + 8000bc98: 00015517 auipc x10,0x15 + 8000bc9c: 31053503 ld x10,784(x10) # 80020fa8 + 8000bca0: 04000593 addi x11,x0,64 + 8000bca4: 054010ef jal x1,8000ccf8 + 8000bca8: 0140006f jal x0,8000bcbc + +000000008000bcac : + 8000bcac: 00015517 auipc x10,0x15 + 8000bcb0: 2fc53503 ld x10,764(x10) # 80020fa8 + 8000bcb4: 04000593 addi x11,x0,64 + 8000bcb8: 040010ef jal x1,8000ccf8 + +000000008000bcbc : + 8000bcbc: 00000013 addi x0,x0,0 + 8000bcc0: 00015517 auipc x10,0x15 + 8000bcc4: 33850513 addi x10,x10,824 # 80020ff8 + 8000bcc8: 00000013 addi x0,x0,0 + 8000bccc: 00000013 addi x0,x0,0 + 8000bcd0: 00000013 addi x0,x0,0 + 8000bcd4: 00000013 addi x0,x0,0 + 8000bcd8: 00000013 addi x0,x0,0 + 8000bcdc: 00000013 addi x0,x0,0 + 8000bce0: 00037097 auipc x1,0x37 + 8000bce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000bce8: 5bd0006f jal x0,8000caa4 + +000000008000bcec : + 8000bcec: 00100593 addi x11,x0,1 + 8000bcf0: 06b51e63 bne x10,x11,8000bd6c + +000000008000bcf4 : + 8000bcf4: 00000013 addi x0,x0,0 + 8000bcf8: 00000013 addi x0,x0,0 + 8000bcfc: 00000013 addi x0,x0,0 + 8000bd00: 00016517 auipc x10,0x16 + 8000bd04: 44050513 addi x10,x10,1088 # 80022140 + 8000bd08: 00000013 addi x0,x0,0 + 8000bd0c: 00000013 addi x0,x0,0 + 8000bd10: 00000013 addi x0,x0,0 + 8000bd14: 00000013 addi x0,x0,0 + 8000bd18: 00000013 addi x0,x0,0 + 8000bd1c: 00000013 addi x0,x0,0 + 8000bd20: 00037097 auipc x1,0x37 + 8000bd24: 884080e7 jalr x1,-1916(x1) # 800425a4 + 8000bd28: 00015517 auipc x10,0x15 + 8000bd2c: 28053503 ld x10,640(x10) # 80020fa8 + 8000bd30: 02000593 addi x11,x0,32 + 8000bd34: 7c5000ef jal x1,8000ccf8 + 8000bd38: 00000013 addi x0,x0,0 + 8000bd3c: 00000013 addi x0,x0,0 + 8000bd40: 00015517 auipc x10,0x15 + 8000bd44: 2b850513 addi x10,x10,696 # 80020ff8 + 8000bd48: 00000013 addi x0,x0,0 + 8000bd4c: 00000013 addi x0,x0,0 + 8000bd50: 00000013 addi x0,x0,0 + 8000bd54: 00000013 addi x0,x0,0 + 8000bd58: 00000013 addi x0,x0,0 + 8000bd5c: 00000013 addi x0,x0,0 + 8000bd60: 00037097 auipc x1,0x37 + 8000bd64: 844080e7 jalr x1,-1980(x1) # 800425a4 + 8000bd68: 53d0006f jal x0,8000caa4 + +000000008000bd6c : + 8000bd6c: 00000013 addi x0,x0,0 + 8000bd70: 00000013 addi x0,x0,0 + 8000bd74: 00000013 addi x0,x0,0 + 8000bd78: 00000013 addi x0,x0,0 + 8000bd7c: 00000013 addi x0,x0,0 + 8000bd80: 00016517 auipc x10,0x16 + 8000bd84: 41e50513 addi x10,x10,1054 # 8002219e + 8000bd88: 00000013 addi x0,x0,0 + 8000bd8c: 00000013 addi x0,x0,0 + 8000bd90: 00000013 addi x0,x0,0 + 8000bd94: 00000013 addi x0,x0,0 + 8000bd98: 00000013 addi x0,x0,0 + 8000bd9c: 00000013 addi x0,x0,0 + 8000bda0: 00037097 auipc x1,0x37 + 8000bda4: 804080e7 jalr x1,-2044(x1) # 800425a4 + 8000bda8: 00015517 auipc x10,0x15 + 8000bdac: 20053503 ld x10,512(x10) # 80020fa8 + 8000bdb0: 04000593 addi x11,x0,64 + 8000bdb4: 745000ef jal x1,8000ccf8 + 8000bdb8: 00000013 addi x0,x0,0 + 8000bdbc: 00000013 addi x0,x0,0 + 8000bdc0: 00015517 auipc x10,0x15 + 8000bdc4: 23850513 addi x10,x10,568 # 80020ff8 + 8000bdc8: 00000013 addi x0,x0,0 + 8000bdcc: 00000013 addi x0,x0,0 + 8000bdd0: 00000013 addi x0,x0,0 + 8000bdd4: 00000013 addi x0,x0,0 + 8000bdd8: 00000013 addi x0,x0,0 + 8000bddc: 00000013 addi x0,x0,0 + 8000bde0: 00036097 auipc x1,0x36 + 8000bde4: 7c4080e7 jalr x1,1988(x1) # 800425a4 + 8000bde8: 4bd0006f jal x0,8000caa4 + +000000008000bdec : + 8000bdec: 00015417 auipc x8,0x15 + 8000bdf0: 1d442403 lw x8,468(x8) # 80020fc0 + 8000bdf4: 00900493 addi x9,x0,9 + 8000bdf8: 0a940c63 beq x8,x9,8000beb0 + 8000bdfc: 00000013 addi x0,x0,0 + 8000be00: 00016517 auipc x10,0x16 + 8000be04: 44350513 addi x10,x10,1091 # 80022243 + 8000be08: 00000013 addi x0,x0,0 + 8000be0c: 00000013 addi x0,x0,0 + 8000be10: 00000013 addi x0,x0,0 + 8000be14: 00000013 addi x0,x0,0 + 8000be18: 00000013 addi x0,x0,0 + 8000be1c: 00000013 addi x0,x0,0 + 8000be20: 00036097 auipc x1,0x36 + 8000be24: 784080e7 jalr x1,1924(x1) # 800425a4 + 8000be28: 00000013 addi x0,x0,0 + 8000be2c: 00000013 addi x0,x0,0 + 8000be30: 00000013 addi x0,x0,0 + 8000be34: 00000013 addi x0,x0,0 + 8000be38: 00000013 addi x0,x0,0 + 8000be3c: 00000013 addi x0,x0,0 + 8000be40: 00016517 auipc x10,0x16 + 8000be44: 42f50513 addi x10,x10,1071 # 8002226f + 8000be48: 00000013 addi x0,x0,0 + 8000be4c: 00000013 addi x0,x0,0 + 8000be50: 00000013 addi x0,x0,0 + 8000be54: 00000013 addi x0,x0,0 + 8000be58: 00000013 addi x0,x0,0 + 8000be5c: 00000013 addi x0,x0,0 + 8000be60: 00036097 auipc x1,0x36 + 8000be64: 744080e7 jalr x1,1860(x1) # 800425a4 + 8000be68: 00015817 auipc x16,0x15 + 8000be6c: 16080813 addi x16,x16,352 # 80020fc8 + 8000be70: 00083503 ld x10,0(x16) + 8000be74: 00036097 auipc x1,0x36 + 8000be78: 730080e7 jalr x1,1840(x1) # 800425a4 + 8000be7c: 00000013 addi x0,x0,0 + 8000be80: 00016517 auipc x10,0x16 + 8000be84: 83450513 addi x10,x10,-1996 # 800216b4 + 8000be88: 00000013 addi x0,x0,0 + 8000be8c: 00000013 addi x0,x0,0 + 8000be90: 00000013 addi x0,x0,0 + 8000be94: 00000013 addi x0,x0,0 + 8000be98: 00000013 addi x0,x0,0 + 8000be9c: 00000013 addi x0,x0,0 + 8000bea0: 00036097 auipc x1,0x36 + 8000bea4: 704080e7 jalr x1,1796(x1) # 800425a4 + 8000bea8: 280404e3 beq x8,x0,8000c930 + 8000beac: 3400006f jal x0,8000c1ec + +000000008000beb0 : + 8000beb0: 00000013 addi x0,x0,0 + 8000beb4: 00000013 addi x0,x0,0 + 8000beb8: 00000013 addi x0,x0,0 + 8000bebc: 00000013 addi x0,x0,0 + 8000bec0: 00016517 auipc x10,0x16 + 8000bec4: 3bf50513 addi x10,x10,959 # 8002227f + 8000bec8: 00000013 addi x0,x0,0 + 8000becc: 00000013 addi x0,x0,0 + 8000bed0: 00000013 addi x0,x0,0 + 8000bed4: 00000013 addi x0,x0,0 + 8000bed8: 00000013 addi x0,x0,0 + 8000bedc: 00000013 addi x0,x0,0 + 8000bee0: 00036097 auipc x1,0x36 + 8000bee4: 6c4080e7 jalr x1,1732(x1) # 800425a4 + 8000bee8: 00015517 auipc x10,0x15 + 8000beec: 0c053503 ld x10,192(x10) # 80020fa8 + 8000bef0: 04000593 addi x11,x0,64 + 8000bef4: 605000ef jal x1,8000ccf8 + 8000bef8: 00000013 addi x0,x0,0 + 8000befc: 00000013 addi x0,x0,0 + 8000bf00: 00015517 auipc x10,0x15 + 8000bf04: 0f850513 addi x10,x10,248 # 80020ff8 + 8000bf08: 00000013 addi x0,x0,0 + 8000bf0c: 00000013 addi x0,x0,0 + 8000bf10: 00000013 addi x0,x0,0 + 8000bf14: 00000013 addi x0,x0,0 + 8000bf18: 00000013 addi x0,x0,0 + 8000bf1c: 00000013 addi x0,x0,0 + 8000bf20: 00036097 auipc x1,0x36 + 8000bf24: 684080e7 jalr x1,1668(x1) # 800425a4 + 8000bf28: 00000013 addi x0,x0,0 + 8000bf2c: 00000013 addi x0,x0,0 + 8000bf30: 00000013 addi x0,x0,0 + 8000bf34: 00000013 addi x0,x0,0 + 8000bf38: 00000013 addi x0,x0,0 + 8000bf3c: 00000013 addi x0,x0,0 + 8000bf40: 00016517 auipc x10,0x16 + 8000bf44: 36a50513 addi x10,x10,874 # 800222aa + 8000bf48: 00000013 addi x0,x0,0 + 8000bf4c: 00000013 addi x0,x0,0 + 8000bf50: 00000013 addi x0,x0,0 + 8000bf54: 00000013 addi x0,x0,0 + 8000bf58: 00000013 addi x0,x0,0 + 8000bf5c: 00000013 addi x0,x0,0 + 8000bf60: 00036097 auipc x1,0x36 + 8000bf64: 644080e7 jalr x1,1604(x1) # 800425a4 + 8000bf68: 00015517 auipc x10,0x15 + 8000bf6c: 03853503 ld x10,56(x10) # 80020fa0 + 8000bf70: 04000593 addi x11,x0,64 + 8000bf74: 585000ef jal x1,8000ccf8 + 8000bf78: 00000013 addi x0,x0,0 + 8000bf7c: 00000013 addi x0,x0,0 + 8000bf80: 00015517 auipc x10,0x15 + 8000bf84: 07850513 addi x10,x10,120 # 80020ff8 + 8000bf88: 00000013 addi x0,x0,0 + 8000bf8c: 00000013 addi x0,x0,0 + 8000bf90: 00000013 addi x0,x0,0 + 8000bf94: 00000013 addi x0,x0,0 + 8000bf98: 00000013 addi x0,x0,0 + 8000bf9c: 00000013 addi x0,x0,0 + 8000bfa0: 00036097 auipc x1,0x36 + 8000bfa4: 604080e7 jalr x1,1540(x1) # 800425a4 + 8000bfa8: 00015317 auipc x6,0x15 + 8000bfac: ff833303 ld x6,-8(x6) # 80020fa0 + 8000bfb0: 00015397 auipc x7,0x15 + 8000bfb4: ff83b383 ld x7,-8(x7) # 80020fa8 + 8000bfb8: 10736a63 bltu x6,x7,8000c0cc + +000000008000bfbc : + 8000bfbc: 00000013 addi x0,x0,0 + 8000bfc0: 00016517 auipc x10,0x16 + 8000bfc4: 31950513 addi x10,x10,793 # 800222d9 + 8000bfc8: 00000013 addi x0,x0,0 + 8000bfcc: 00000013 addi x0,x0,0 + 8000bfd0: 00000013 addi x0,x0,0 + 8000bfd4: 00000013 addi x0,x0,0 + 8000bfd8: 00000013 addi x0,x0,0 + 8000bfdc: 00000013 addi x0,x0,0 + 8000bfe0: 00036097 auipc x1,0x36 + 8000bfe4: 5c4080e7 jalr x1,1476(x1) # 800425a4 + 8000bfe8: 00000013 addi x0,x0,0 + 8000bfec: 00000013 addi x0,x0,0 + 8000bff0: 00000013 addi x0,x0,0 + 8000bff4: 00000013 addi x0,x0,0 + 8000bff8: 00000013 addi x0,x0,0 + 8000bffc: 00000013 addi x0,x0,0 + 8000c000: 00016517 auipc x10,0x16 + 8000c004: 34150513 addi x10,x10,833 # 80022341 + 8000c008: 00000013 addi x0,x0,0 + 8000c00c: 00000013 addi x0,x0,0 + 8000c010: 00000013 addi x0,x0,0 + 8000c014: 00000013 addi x0,x0,0 + 8000c018: 00000013 addi x0,x0,0 + 8000c01c: 00000013 addi x0,x0,0 + 8000c020: 00036097 auipc x1,0x36 + 8000c024: 584080e7 jalr x1,1412(x1) # 800425a4 + 8000c028: 00015317 auipc x6,0x15 + 8000c02c: f7833303 ld x6,-136(x6) # 80020fa0 + 8000c030: 00015397 auipc x7,0x15 + 8000c034: f783b383 ld x7,-136(x7) # 80020fa8 + 8000c038: 40730533 sub x10,x6,x7 + 8000c03c: 04000593 addi x11,x0,64 + 8000c040: 4b9000ef jal x1,8000ccf8 + 8000c044: 00000013 addi x0,x0,0 + 8000c048: 00000013 addi x0,x0,0 + 8000c04c: 00000013 addi x0,x0,0 + 8000c050: 00000013 addi x0,x0,0 + 8000c054: 00000013 addi x0,x0,0 + 8000c058: 00000013 addi x0,x0,0 + 8000c05c: 00000013 addi x0,x0,0 + 8000c060: 00015517 auipc x10,0x15 + 8000c064: f9850513 addi x10,x10,-104 # 80020ff8 + 8000c068: 00000013 addi x0,x0,0 + 8000c06c: 00000013 addi x0,x0,0 + 8000c070: 00000013 addi x0,x0,0 + 8000c074: 00000013 addi x0,x0,0 + 8000c078: 00000013 addi x0,x0,0 + 8000c07c: 00000013 addi x0,x0,0 + 8000c080: 00036097 auipc x1,0x36 + 8000c084: 524080e7 jalr x1,1316(x1) # 800425a4 + 8000c088: 00000013 addi x0,x0,0 + 8000c08c: 00000013 addi x0,x0,0 + 8000c090: 00000013 addi x0,x0,0 + 8000c094: 00000013 addi x0,x0,0 + 8000c098: 00000013 addi x0,x0,0 + 8000c09c: 00000013 addi x0,x0,0 + 8000c0a0: 00016517 auipc x10,0x16 + 8000c0a4: 2c850513 addi x10,x10,712 # 80022368 + 8000c0a8: 00000013 addi x0,x0,0 + 8000c0ac: 00000013 addi x0,x0,0 + 8000c0b0: 00000013 addi x0,x0,0 + 8000c0b4: 00000013 addi x0,x0,0 + 8000c0b8: 00000013 addi x0,x0,0 + 8000c0bc: 00000013 addi x0,x0,0 + 8000c0c0: 00036097 auipc x1,0x36 + 8000c0c4: 4e4080e7 jalr x1,1252(x1) # 800425a4 + 8000c0c8: 1dd0006f jal x0,8000caa4 + +000000008000c0cc : + 8000c0cc: 00000013 addi x0,x0,0 + 8000c0d0: 00000013 addi x0,x0,0 + 8000c0d4: 00000013 addi x0,x0,0 + 8000c0d8: 00000013 addi x0,x0,0 + 8000c0dc: 00000013 addi x0,x0,0 + 8000c0e0: 00016517 auipc x10,0x16 + 8000c0e4: 22550513 addi x10,x10,549 # 80022305 + 8000c0e8: 00000013 addi x0,x0,0 + 8000c0ec: 00000013 addi x0,x0,0 + 8000c0f0: 00000013 addi x0,x0,0 + 8000c0f4: 00000013 addi x0,x0,0 + 8000c0f8: 00000013 addi x0,x0,0 + 8000c0fc: 00000013 addi x0,x0,0 + 8000c100: 00036097 auipc x1,0x36 + 8000c104: 4a4080e7 jalr x1,1188(x1) # 800425a4 + 8000c108: 00000013 addi x0,x0,0 + 8000c10c: 00000013 addi x0,x0,0 + 8000c110: 00000013 addi x0,x0,0 + 8000c114: 00000013 addi x0,x0,0 + 8000c118: 00000013 addi x0,x0,0 + 8000c11c: 00000013 addi x0,x0,0 + 8000c120: 00016517 auipc x10,0x16 + 8000c124: 22150513 addi x10,x10,545 # 80022341 + 8000c128: 00000013 addi x0,x0,0 + 8000c12c: 00000013 addi x0,x0,0 + 8000c130: 00000013 addi x0,x0,0 + 8000c134: 00000013 addi x0,x0,0 + 8000c138: 00000013 addi x0,x0,0 + 8000c13c: 00000013 addi x0,x0,0 + 8000c140: 00036097 auipc x1,0x36 + 8000c144: 464080e7 jalr x1,1124(x1) # 800425a4 + 8000c148: 00015317 auipc x6,0x15 + 8000c14c: e6033303 ld x6,-416(x6) # 80020fa8 + 8000c150: 00015397 auipc x7,0x15 + 8000c154: e503b383 ld x7,-432(x7) # 80020fa0 + 8000c158: 40730533 sub x10,x6,x7 + 8000c15c: 04000593 addi x11,x0,64 + 8000c160: 399000ef jal x1,8000ccf8 + 8000c164: 00000013 addi x0,x0,0 + 8000c168: 00000013 addi x0,x0,0 + 8000c16c: 00000013 addi x0,x0,0 + 8000c170: 00000013 addi x0,x0,0 + 8000c174: 00000013 addi x0,x0,0 + 8000c178: 00000013 addi x0,x0,0 + 8000c17c: 00000013 addi x0,x0,0 + 8000c180: 00015517 auipc x10,0x15 + 8000c184: e7850513 addi x10,x10,-392 # 80020ff8 + 8000c188: 00000013 addi x0,x0,0 + 8000c18c: 00000013 addi x0,x0,0 + 8000c190: 00000013 addi x0,x0,0 + 8000c194: 00000013 addi x0,x0,0 + 8000c198: 00000013 addi x0,x0,0 + 8000c19c: 00000013 addi x0,x0,0 + 8000c1a0: 00036097 auipc x1,0x36 + 8000c1a4: 404080e7 jalr x1,1028(x1) # 800425a4 + 8000c1a8: 00000013 addi x0,x0,0 + 8000c1ac: 00000013 addi x0,x0,0 + 8000c1b0: 00000013 addi x0,x0,0 + 8000c1b4: 00000013 addi x0,x0,0 + 8000c1b8: 00000013 addi x0,x0,0 + 8000c1bc: 00000013 addi x0,x0,0 + 8000c1c0: 00016517 auipc x10,0x16 + 8000c1c4: 29050513 addi x10,x10,656 # 80022450 + 8000c1c8: 00000013 addi x0,x0,0 + 8000c1cc: 00000013 addi x0,x0,0 + 8000c1d0: 00000013 addi x0,x0,0 + 8000c1d4: 00000013 addi x0,x0,0 + 8000c1d8: 00000013 addi x0,x0,0 + 8000c1dc: 00000013 addi x0,x0,0 + 8000c1e0: 00036097 auipc x1,0x36 + 8000c1e4: 3c4080e7 jalr x1,964(x1) # 800425a4 + 8000c1e8: 0bd0006f jal x0,8000caa4 + +000000008000c1ec : + 8000c1ec: 00000013 addi x0,x0,0 + 8000c1f0: 00000013 addi x0,x0,0 + 8000c1f4: 00000013 addi x0,x0,0 + 8000c1f8: 00000013 addi x0,x0,0 + 8000c1fc: 00000013 addi x0,x0,0 + 8000c200: 00016517 auipc x10,0x16 + 8000c204: 33750513 addi x10,x10,823 # 80022537 + 8000c208: 00000013 addi x0,x0,0 + 8000c20c: 00000013 addi x0,x0,0 + 8000c210: 00000013 addi x0,x0,0 + 8000c214: 00000013 addi x0,x0,0 + 8000c218: 00000013 addi x0,x0,0 + 8000c21c: 00000013 addi x0,x0,0 + 8000c220: 00036097 auipc x1,0x36 + 8000c224: 384080e7 jalr x1,900(x1) # 800425a4 + 8000c228: 00015517 auipc x10,0x15 + 8000c22c: d9c52503 lw x10,-612(x10) # 80020fc4 + 8000c230: 04050a63 beq x10,x0,8000c284 + 8000c234: 00100593 addi x11,x0,1 + 8000c238: 08b50663 beq x10,x11,8000c2c4 + 8000c23c: 00200593 addi x11,x0,2 + 8000c240: 0cb50263 beq x10,x11,8000c304 + 8000c244: 00300593 addi x11,x0,3 + 8000c248: 0eb50e63 beq x10,x11,8000c344 + 8000c24c: 00000013 addi x0,x0,0 + 8000c250: 00000013 addi x0,x0,0 + 8000c254: 00000013 addi x0,x0,0 + 8000c258: 00000013 addi x0,x0,0 + 8000c25c: 00000013 addi x0,x0,0 + 8000c260: 00016517 auipc x10,0x16 + 8000c264: 31350513 addi x10,x10,787 # 80022573 + 8000c268: 00000013 addi x0,x0,0 + 8000c26c: 00000013 addi x0,x0,0 + 8000c270: 00000013 addi x0,x0,0 + 8000c274: 00000013 addi x0,x0,0 + 8000c278: 00000013 addi x0,x0,0 + 8000c27c: 00000013 addi x0,x0,0 + 8000c280: 1000006f jal x0,8000c380 + +000000008000c284 : + 8000c284: 00000013 addi x0,x0,0 + 8000c288: 00000013 addi x0,x0,0 + 8000c28c: 00000013 addi x0,x0,0 + 8000c290: 00000013 addi x0,x0,0 + 8000c294: 00000013 addi x0,x0,0 + 8000c298: 00000013 addi x0,x0,0 + 8000c29c: 00000013 addi x0,x0,0 + 8000c2a0: 00016517 auipc x10,0x16 + 8000c2a4: 2b150513 addi x10,x10,689 # 80022551 + 8000c2a8: 00000013 addi x0,x0,0 + 8000c2ac: 00000013 addi x0,x0,0 + 8000c2b0: 00000013 addi x0,x0,0 + 8000c2b4: 00000013 addi x0,x0,0 + 8000c2b8: 00000013 addi x0,x0,0 + 8000c2bc: 00000013 addi x0,x0,0 + 8000c2c0: 0c00006f jal x0,8000c380 + +000000008000c2c4 : + 8000c2c4: 00000013 addi x0,x0,0 + 8000c2c8: 00000013 addi x0,x0,0 + 8000c2cc: 00000013 addi x0,x0,0 + 8000c2d0: 00000013 addi x0,x0,0 + 8000c2d4: 00000013 addi x0,x0,0 + 8000c2d8: 00000013 addi x0,x0,0 + 8000c2dc: 00000013 addi x0,x0,0 + 8000c2e0: 00016517 auipc x10,0x16 + 8000c2e4: 27950513 addi x10,x10,633 # 80022559 + 8000c2e8: 00000013 addi x0,x0,0 + 8000c2ec: 00000013 addi x0,x0,0 + 8000c2f0: 00000013 addi x0,x0,0 + 8000c2f4: 00000013 addi x0,x0,0 + 8000c2f8: 00000013 addi x0,x0,0 + 8000c2fc: 00000013 addi x0,x0,0 + 8000c300: 0800006f jal x0,8000c380 + +000000008000c304 : + 8000c304: 00000013 addi x0,x0,0 + 8000c308: 00000013 addi x0,x0,0 + 8000c30c: 00000013 addi x0,x0,0 + 8000c310: 00000013 addi x0,x0,0 + 8000c314: 00000013 addi x0,x0,0 + 8000c318: 00000013 addi x0,x0,0 + 8000c31c: 00000013 addi x0,x0,0 + 8000c320: 00016517 auipc x10,0x16 + 8000c324: 24150513 addi x10,x10,577 # 80022561 + 8000c328: 00000013 addi x0,x0,0 + 8000c32c: 00000013 addi x0,x0,0 + 8000c330: 00000013 addi x0,x0,0 + 8000c334: 00000013 addi x0,x0,0 + 8000c338: 00000013 addi x0,x0,0 + 8000c33c: 00000013 addi x0,x0,0 + 8000c340: 0400006f jal x0,8000c380 + +000000008000c344 : + 8000c344: 00000013 addi x0,x0,0 + 8000c348: 00000013 addi x0,x0,0 + 8000c34c: 00000013 addi x0,x0,0 + 8000c350: 00000013 addi x0,x0,0 + 8000c354: 00000013 addi x0,x0,0 + 8000c358: 00000013 addi x0,x0,0 + 8000c35c: 00000013 addi x0,x0,0 + 8000c360: 00016517 auipc x10,0x16 + 8000c364: 20a50513 addi x10,x10,522 # 8002256a + 8000c368: 00000013 addi x0,x0,0 + 8000c36c: 00000013 addi x0,x0,0 + 8000c370: 00000013 addi x0,x0,0 + 8000c374: 00000013 addi x0,x0,0 + 8000c378: 00000013 addi x0,x0,0 + 8000c37c: 00000013 addi x0,x0,0 + +000000008000c380 : + 8000c380: 00036097 auipc x1,0x36 + 8000c384: 224080e7 jalr x1,548(x1) # 800425a4 + 8000c388: 00000013 addi x0,x0,0 + 8000c38c: 00000013 addi x0,x0,0 + 8000c390: 00000013 addi x0,x0,0 + 8000c394: 00000013 addi x0,x0,0 + 8000c398: 00000013 addi x0,x0,0 + 8000c39c: 00000013 addi x0,x0,0 + 8000c3a0: 00016517 auipc x10,0x16 + 8000c3a4: 1dc50513 addi x10,x10,476 # 8002257c + 8000c3a8: 00000013 addi x0,x0,0 + 8000c3ac: 00000013 addi x0,x0,0 + 8000c3b0: 00000013 addi x0,x0,0 + 8000c3b4: 00000013 addi x0,x0,0 + 8000c3b8: 00000013 addi x0,x0,0 + 8000c3bc: 00000013 addi x0,x0,0 + 8000c3c0: 00036097 auipc x1,0x36 + 8000c3c4: 1e4080e7 jalr x1,484(x1) # 800425a4 + 8000c3c8: 00015517 auipc x10,0x15 + 8000c3cc: bf852503 lw x10,-1032(x10) # 80020fc0 + 8000c3d0: 00100593 addi x11,x0,1 + 8000c3d4: 06b50863 beq x10,x11,8000c444 + 8000c3d8: 00200593 addi x11,x0,2 + 8000c3dc: 0ab50463 beq x10,x11,8000c484 + 8000c3e0: 00300593 addi x11,x0,3 + 8000c3e4: 0eb50063 beq x10,x11,8000c4c4 + 8000c3e8: 00400593 addi x11,x0,4 + 8000c3ec: 10b50c63 beq x10,x11,8000c504 + 8000c3f0: 00500593 addi x11,x0,5 + 8000c3f4: 14b50863 beq x10,x11,8000c544 + 8000c3f8: 00600593 addi x11,x0,6 + 8000c3fc: 18b50463 beq x10,x11,8000c584 + 8000c400: 00700593 addi x11,x0,7 + 8000c404: 1cb50063 beq x10,x11,8000c5c4 + 8000c408: 00800593 addi x11,x0,8 + 8000c40c: 1eb50c63 beq x10,x11,8000c604 + 8000c410: 00000013 addi x0,x0,0 + 8000c414: 00000013 addi x0,x0,0 + 8000c418: 00000013 addi x0,x0,0 + 8000c41c: 00000013 addi x0,x0,0 + 8000c420: 00016517 auipc x10,0x16 + 8000c424: 2b350513 addi x10,x10,691 # 800226d3 + 8000c428: 00000013 addi x0,x0,0 + 8000c42c: 00000013 addi x0,x0,0 + 8000c430: 00000013 addi x0,x0,0 + 8000c434: 00000013 addi x0,x0,0 + 8000c438: 00000013 addi x0,x0,0 + 8000c43c: 00000013 addi x0,x0,0 + 8000c440: 2000006f jal x0,8000c640 + +000000008000c444 : + 8000c444: 00000013 addi x0,x0,0 + 8000c448: 00000013 addi x0,x0,0 + 8000c44c: 00000013 addi x0,x0,0 + 8000c450: 00000013 addi x0,x0,0 + 8000c454: 00000013 addi x0,x0,0 + 8000c458: 00000013 addi x0,x0,0 + 8000c45c: 00000013 addi x0,x0,0 + 8000c460: 00016517 auipc x10,0x16 + 8000c464: 13650513 addi x10,x10,310 # 80022596 + 8000c468: 00000013 addi x0,x0,0 + 8000c46c: 00000013 addi x0,x0,0 + 8000c470: 00000013 addi x0,x0,0 + 8000c474: 00000013 addi x0,x0,0 + 8000c478: 00000013 addi x0,x0,0 + 8000c47c: 00000013 addi x0,x0,0 + 8000c480: 1c00006f jal x0,8000c640 + +000000008000c484 : + 8000c484: 00000013 addi x0,x0,0 + 8000c488: 00000013 addi x0,x0,0 + 8000c48c: 00000013 addi x0,x0,0 + 8000c490: 00000013 addi x0,x0,0 + 8000c494: 00000013 addi x0,x0,0 + 8000c498: 00000013 addi x0,x0,0 + 8000c49c: 00000013 addi x0,x0,0 + 8000c4a0: 00016517 auipc x10,0x16 + 8000c4a4: 12750513 addi x10,x10,295 # 800225c7 + 8000c4a8: 00000013 addi x0,x0,0 + 8000c4ac: 00000013 addi x0,x0,0 + 8000c4b0: 00000013 addi x0,x0,0 + 8000c4b4: 00000013 addi x0,x0,0 + 8000c4b8: 00000013 addi x0,x0,0 + 8000c4bc: 00000013 addi x0,x0,0 + 8000c4c0: 1800006f jal x0,8000c640 + +000000008000c4c4 : + 8000c4c4: 00000013 addi x0,x0,0 + 8000c4c8: 00000013 addi x0,x0,0 + 8000c4cc: 00000013 addi x0,x0,0 + 8000c4d0: 00000013 addi x0,x0,0 + 8000c4d4: 00000013 addi x0,x0,0 + 8000c4d8: 00000013 addi x0,x0,0 + 8000c4dc: 00000013 addi x0,x0,0 + 8000c4e0: 00016517 auipc x10,0x16 + 8000c4e4: 10750513 addi x10,x10,263 # 800225e7 + 8000c4e8: 00000013 addi x0,x0,0 + 8000c4ec: 00000013 addi x0,x0,0 + 8000c4f0: 00000013 addi x0,x0,0 + 8000c4f4: 00000013 addi x0,x0,0 + 8000c4f8: 00000013 addi x0,x0,0 + 8000c4fc: 00000013 addi x0,x0,0 + 8000c500: 1400006f jal x0,8000c640 + +000000008000c504 : + 8000c504: 00000013 addi x0,x0,0 + 8000c508: 00000013 addi x0,x0,0 + 8000c50c: 00000013 addi x0,x0,0 + 8000c510: 00000013 addi x0,x0,0 + 8000c514: 00000013 addi x0,x0,0 + 8000c518: 00000013 addi x0,x0,0 + 8000c51c: 00000013 addi x0,x0,0 + 8000c520: 00016517 auipc x10,0x16 + 8000c524: 0e550513 addi x10,x10,229 # 80022605 + 8000c528: 00000013 addi x0,x0,0 + 8000c52c: 00000013 addi x0,x0,0 + 8000c530: 00000013 addi x0,x0,0 + 8000c534: 00000013 addi x0,x0,0 + 8000c538: 00000013 addi x0,x0,0 + 8000c53c: 00000013 addi x0,x0,0 + 8000c540: 1000006f jal x0,8000c640 + +000000008000c544 : + 8000c544: 00000013 addi x0,x0,0 + 8000c548: 00000013 addi x0,x0,0 + 8000c54c: 00000013 addi x0,x0,0 + 8000c550: 00000013 addi x0,x0,0 + 8000c554: 00000013 addi x0,x0,0 + 8000c558: 00000013 addi x0,x0,0 + 8000c55c: 00000013 addi x0,x0,0 + 8000c560: 00016517 auipc x10,0x16 + 8000c564: 0c450513 addi x10,x10,196 # 80022624 + 8000c568: 00000013 addi x0,x0,0 + 8000c56c: 00000013 addi x0,x0,0 + 8000c570: 00000013 addi x0,x0,0 + 8000c574: 00000013 addi x0,x0,0 + 8000c578: 00000013 addi x0,x0,0 + 8000c57c: 00000013 addi x0,x0,0 + 8000c580: 0c00006f jal x0,8000c640 + +000000008000c584 : + 8000c584: 00000013 addi x0,x0,0 + 8000c588: 00000013 addi x0,x0,0 + 8000c58c: 00000013 addi x0,x0,0 + 8000c590: 00000013 addi x0,x0,0 + 8000c594: 00000013 addi x0,x0,0 + 8000c598: 00000013 addi x0,x0,0 + 8000c59c: 00000013 addi x0,x0,0 + 8000c5a0: 00016517 auipc x10,0x16 + 8000c5a4: 0ac50513 addi x10,x10,172 # 8002264c + 8000c5a8: 00000013 addi x0,x0,0 + 8000c5ac: 00000013 addi x0,x0,0 + 8000c5b0: 00000013 addi x0,x0,0 + 8000c5b4: 00000013 addi x0,x0,0 + 8000c5b8: 00000013 addi x0,x0,0 + 8000c5bc: 00000013 addi x0,x0,0 + 8000c5c0: 0800006f jal x0,8000c640 + +000000008000c5c4 : + 8000c5c4: 00000013 addi x0,x0,0 + 8000c5c8: 00000013 addi x0,x0,0 + 8000c5cc: 00000013 addi x0,x0,0 + 8000c5d0: 00000013 addi x0,x0,0 + 8000c5d4: 00000013 addi x0,x0,0 + 8000c5d8: 00000013 addi x0,x0,0 + 8000c5dc: 00000013 addi x0,x0,0 + 8000c5e0: 00016517 auipc x10,0x16 + 8000c5e4: 09850513 addi x10,x10,152 # 80022678 + 8000c5e8: 00000013 addi x0,x0,0 + 8000c5ec: 00000013 addi x0,x0,0 + 8000c5f0: 00000013 addi x0,x0,0 + 8000c5f4: 00000013 addi x0,x0,0 + 8000c5f8: 00000013 addi x0,x0,0 + 8000c5fc: 00000013 addi x0,x0,0 + 8000c600: 0400006f jal x0,8000c640 + +000000008000c604 : + 8000c604: 00000013 addi x0,x0,0 + 8000c608: 00000013 addi x0,x0,0 + 8000c60c: 00000013 addi x0,x0,0 + 8000c610: 00000013 addi x0,x0,0 + 8000c614: 00000013 addi x0,x0,0 + 8000c618: 00000013 addi x0,x0,0 + 8000c61c: 00000013 addi x0,x0,0 + 8000c620: 00016517 auipc x10,0x16 + 8000c624: 08450513 addi x10,x10,132 # 800226a4 + 8000c628: 00000013 addi x0,x0,0 + 8000c62c: 00000013 addi x0,x0,0 + 8000c630: 00000013 addi x0,x0,0 + 8000c634: 00000013 addi x0,x0,0 + 8000c638: 00000013 addi x0,x0,0 + 8000c63c: 00000013 addi x0,x0,0 + +000000008000c640 : + 8000c640: 00036097 auipc x1,0x36 + 8000c644: f64080e7 jalr x1,-156(x1) # 800425a4 + 8000c648: 00000013 addi x0,x0,0 + 8000c64c: 00000013 addi x0,x0,0 + 8000c650: 00000013 addi x0,x0,0 + 8000c654: 00000013 addi x0,x0,0 + 8000c658: 00000013 addi x0,x0,0 + 8000c65c: 00000013 addi x0,x0,0 + 8000c660: 00016517 auipc x10,0x16 + 8000c664: 08250513 addi x10,x10,130 # 800226e2 + 8000c668: 00000013 addi x0,x0,0 + 8000c66c: 00000013 addi x0,x0,0 + 8000c670: 00000013 addi x0,x0,0 + 8000c674: 00000013 addi x0,x0,0 + 8000c678: 00000013 addi x0,x0,0 + 8000c67c: 00000013 addi x0,x0,0 + 8000c680: 00036097 auipc x1,0x36 + 8000c684: f24080e7 jalr x1,-220(x1) # 800425a4 + 8000c688: 00015517 auipc x10,0x15 + 8000c68c: 92053503 ld x10,-1760(x10) # 80020fa8 + 8000c690: 04000593 addi x11,x0,64 + 8000c694: 664000ef jal x1,8000ccf8 + 8000c698: 00000013 addi x0,x0,0 + 8000c69c: 00000013 addi x0,x0,0 + 8000c6a0: 00015517 auipc x10,0x15 + 8000c6a4: 95850513 addi x10,x10,-1704 # 80020ff8 + 8000c6a8: 00000013 addi x0,x0,0 + 8000c6ac: 00000013 addi x0,x0,0 + 8000c6b0: 00000013 addi x0,x0,0 + 8000c6b4: 00000013 addi x0,x0,0 + 8000c6b8: 00000013 addi x0,x0,0 + 8000c6bc: 00000013 addi x0,x0,0 + 8000c6c0: 00036097 auipc x1,0x36 + 8000c6c4: ee4080e7 jalr x1,-284(x1) # 800425a4 + 8000c6c8: 00000013 addi x0,x0,0 + 8000c6cc: 00000013 addi x0,x0,0 + 8000c6d0: 00000013 addi x0,x0,0 + 8000c6d4: 00000013 addi x0,x0,0 + 8000c6d8: 00000013 addi x0,x0,0 + 8000c6dc: 00000013 addi x0,x0,0 + 8000c6e0: 00016517 auipc x10,0x16 + 8000c6e4: 01950513 addi x10,x10,25 # 800226f9 + 8000c6e8: 00000013 addi x0,x0,0 + 8000c6ec: 00000013 addi x0,x0,0 + 8000c6f0: 00000013 addi x0,x0,0 + 8000c6f4: 00000013 addi x0,x0,0 + 8000c6f8: 00000013 addi x0,x0,0 + 8000c6fc: 00000013 addi x0,x0,0 + 8000c700: 00036097 auipc x1,0x36 + 8000c704: ea4080e7 jalr x1,-348(x1) # 800425a4 + 8000c708: 00015517 auipc x10,0x15 + 8000c70c: 89853503 ld x10,-1896(x10) # 80020fa0 + 8000c710: 04000593 addi x11,x0,64 + 8000c714: 5e4000ef jal x1,8000ccf8 + 8000c718: 00000013 addi x0,x0,0 + 8000c71c: 00000013 addi x0,x0,0 + 8000c720: 00015517 auipc x10,0x15 + 8000c724: 8d850513 addi x10,x10,-1832 # 80020ff8 + 8000c728: 00000013 addi x0,x0,0 + 8000c72c: 00000013 addi x0,x0,0 + 8000c730: 00000013 addi x0,x0,0 + 8000c734: 00000013 addi x0,x0,0 + 8000c738: 00000013 addi x0,x0,0 + 8000c73c: 00000013 addi x0,x0,0 + 8000c740: 00036097 auipc x1,0x36 + 8000c744: e64080e7 jalr x1,-412(x1) # 800425a4 + 8000c748: 00015517 auipc x10,0x15 + 8000c74c: 87852503 lw x10,-1928(x10) # 80020fc0 + 8000c750: 00200593 addi x11,x0,2 + 8000c754: 08b51463 bne x10,x11,8000c7dc + 8000c758: 00000013 addi x0,x0,0 + 8000c75c: 00000013 addi x0,x0,0 + 8000c760: 00016517 auipc x10,0x16 + 8000c764: fb050513 addi x10,x10,-80 # 80022710 + 8000c768: 00000013 addi x0,x0,0 + 8000c76c: 00000013 addi x0,x0,0 + 8000c770: 00000013 addi x0,x0,0 + 8000c774: 00000013 addi x0,x0,0 + 8000c778: 00000013 addi x0,x0,0 + 8000c77c: 00000013 addi x0,x0,0 + 8000c780: 00036097 auipc x1,0x36 + 8000c784: e24080e7 jalr x1,-476(x1) # 800425a4 + 8000c788: 00015517 auipc x10,0x15 + 8000c78c: 82053503 ld x10,-2016(x10) # 80020fa8 + 8000c790: 284000ef jal x1,8000ca14 + 8000c794: 00036097 auipc x1,0x36 + 8000c798: e10080e7 jalr x1,-496(x1) # 800425a4 + 8000c79c: 00000013 addi x0,x0,0 + 8000c7a0: 00016517 auipc x10,0x16 + 8000c7a4: f8750513 addi x10,x10,-121 # 80022727 + 8000c7a8: 00000013 addi x0,x0,0 + 8000c7ac: 00000013 addi x0,x0,0 + 8000c7b0: 00000013 addi x0,x0,0 + 8000c7b4: 00000013 addi x0,x0,0 + 8000c7b8: 00000013 addi x0,x0,0 + 8000c7bc: 00000013 addi x0,x0,0 + 8000c7c0: 00036097 auipc x1,0x36 + 8000c7c4: de4080e7 jalr x1,-540(x1) # 800425a4 + 8000c7c8: 00014517 auipc x10,0x14 + 8000c7cc: 7d853503 ld x10,2008(x10) # 80020fa0 + 8000c7d0: 244000ef jal x1,8000ca14 + 8000c7d4: 00036097 auipc x1,0x36 + 8000c7d8: dd0080e7 jalr x1,-560(x1) # 800425a4 + +000000008000c7dc : + 8000c7dc: 00000097 auipc x1,0x0 + 8000c7e0: 314080e7 jalr x1,788(x1) # 8000caf0 + 8000c7e4: 00014517 auipc x10,0x14 + 8000c7e8: 7dc52503 lw x10,2012(x10) # 80020fc0 + 8000c7ec: 00100593 addi x11,x0,1 + 8000c7f0: 02b51e63 bne x10,x11,8000c82c + 8000c7f4: 00000013 addi x0,x0,0 + 8000c7f8: 00000013 addi x0,x0,0 + 8000c7fc: 00000013 addi x0,x0,0 + 8000c800: 00016517 auipc x10,0x16 + 8000c804: f9d50513 addi x10,x10,-99 # 8002279d + 8000c808: 00000013 addi x0,x0,0 + 8000c80c: 00000013 addi x0,x0,0 + 8000c810: 00000013 addi x0,x0,0 + 8000c814: 00000013 addi x0,x0,0 + 8000c818: 00000013 addi x0,x0,0 + 8000c81c: 00000013 addi x0,x0,0 + 8000c820: 00036097 auipc x1,0x36 + 8000c824: d84080e7 jalr x1,-636(x1) # 800425a4 + 8000c828: 27c0006f jal x0,8000caa4 + 8000c82c: 00200593 addi x11,x0,2 + 8000c830: 02b51e63 bne x10,x11,8000c86c + 8000c834: 00000013 addi x0,x0,0 + 8000c838: 00000013 addi x0,x0,0 + 8000c83c: 00000013 addi x0,x0,0 + 8000c840: 00016517 auipc x10,0x16 + 8000c844: 03350513 addi x10,x10,51 # 80022873 + 8000c848: 00000013 addi x0,x0,0 + 8000c84c: 00000013 addi x0,x0,0 + 8000c850: 00000013 addi x0,x0,0 + 8000c854: 00000013 addi x0,x0,0 + 8000c858: 00000013 addi x0,x0,0 + 8000c85c: 00000013 addi x0,x0,0 + 8000c860: 00036097 auipc x1,0x36 + 8000c864: d44080e7 jalr x1,-700(x1) # 800425a4 + 8000c868: 23c0006f jal x0,8000caa4 + 8000c86c: 00300593 addi x11,x0,3 + 8000c870: 02b51e63 bne x10,x11,8000c8ac + 8000c874: 00000013 addi x0,x0,0 + 8000c878: 00000013 addi x0,x0,0 + 8000c87c: 00000013 addi x0,x0,0 + 8000c880: 00016517 auipc x10,0x16 + 8000c884: 0e650513 addi x10,x10,230 # 80022966 + 8000c888: 00000013 addi x0,x0,0 + 8000c88c: 00000013 addi x0,x0,0 + 8000c890: 00000013 addi x0,x0,0 + 8000c894: 00000013 addi x0,x0,0 + 8000c898: 00000013 addi x0,x0,0 + 8000c89c: 00000013 addi x0,x0,0 + 8000c8a0: 00036097 auipc x1,0x36 + 8000c8a4: d04080e7 jalr x1,-764(x1) # 800425a4 + 8000c8a8: 1fc0006f jal x0,8000caa4 + 8000c8ac: 00400593 addi x11,x0,4 + 8000c8b0: 02b51e63 bne x10,x11,8000c8ec + 8000c8b4: 00000013 addi x0,x0,0 + 8000c8b8: 00000013 addi x0,x0,0 + 8000c8bc: 00000013 addi x0,x0,0 + 8000c8c0: 00016517 auipc x10,0x16 + 8000c8c4: 1a150513 addi x10,x10,417 # 80022a61 + 8000c8c8: 00000013 addi x0,x0,0 + 8000c8cc: 00000013 addi x0,x0,0 + 8000c8d0: 00000013 addi x0,x0,0 + 8000c8d4: 00000013 addi x0,x0,0 + 8000c8d8: 00000013 addi x0,x0,0 + 8000c8dc: 00000013 addi x0,x0,0 + 8000c8e0: 00036097 auipc x1,0x36 + 8000c8e4: cc4080e7 jalr x1,-828(x1) # 800425a4 + 8000c8e8: 1bc0006f jal x0,8000caa4 + 8000c8ec: 00500593 addi x11,x0,5 + 8000c8f0: 02b51e63 bne x10,x11,8000c92c + 8000c8f4: 00000013 addi x0,x0,0 + 8000c8f8: 00000013 addi x0,x0,0 + 8000c8fc: 00000013 addi x0,x0,0 + 8000c900: 00016517 auipc x10,0x16 + 8000c904: 24850513 addi x10,x10,584 # 80022b48 + 8000c908: 00000013 addi x0,x0,0 + 8000c90c: 00000013 addi x0,x0,0 + 8000c910: 00000013 addi x0,x0,0 + 8000c914: 00000013 addi x0,x0,0 + 8000c918: 00000013 addi x0,x0,0 + 8000c91c: 00000013 addi x0,x0,0 + 8000c920: 00036097 auipc x1,0x36 + 8000c924: c84080e7 jalr x1,-892(x1) # 800425a4 + 8000c928: 17c0006f jal x0,8000caa4 + 8000c92c: 1780006f jal x0,8000caa4 + +000000008000c930 : + 8000c930: 00000013 addi x0,x0,0 + 8000c934: 00000013 addi x0,x0,0 + 8000c938: 00000013 addi x0,x0,0 + 8000c93c: 00000013 addi x0,x0,0 + 8000c940: 00016517 auipc x10,0x16 + 8000c944: e1550513 addi x10,x10,-491 # 80022755 + 8000c948: 00000013 addi x0,x0,0 + 8000c94c: 00000013 addi x0,x0,0 + 8000c950: 00000013 addi x0,x0,0 + 8000c954: 00000013 addi x0,x0,0 + 8000c958: 00000013 addi x0,x0,0 + 8000c95c: 00000013 addi x0,x0,0 + 8000c960: 00036097 auipc x1,0x36 + 8000c964: c44080e7 jalr x1,-956(x1) # 800425a4 + 8000c968: 00014617 auipc x12,0x14 + 8000c96c: 67063603 ld x12,1648(x12) # 80020fd8 + 8000c970: 00000013 addi x0,x0,0 + 8000c974: 00000013 addi x0,x0,0 + 8000c978: 00000013 addi x0,x0,0 + 8000c97c: 00000013 addi x0,x0,0 + 8000c980: 00015517 auipc x10,0x15 + 8000c984: dbe50513 addi x10,x10,-578 # 8002173e + 8000c988: 00000013 addi x0,x0,0 + 8000c98c: 00000013 addi x0,x0,0 + 8000c990: 00000013 addi x0,x0,0 + 8000c994: 00000013 addi x0,x0,0 + 8000c998: 00000013 addi x0,x0,0 + 8000c99c: 00000013 addi x0,x0,0 + 8000c9a0: 00036097 auipc x1,0x36 + 8000c9a4: c04080e7 jalr x1,-1020(x1) # 800425a4 + 8000c9a8: 00065503 lhu x10,0(x12) + 8000c9ac: 01000593 addi x11,x0,16 + 8000c9b0: 00357413 andi x8,x10,3 + 8000c9b4: 00300493 addi x9,x0,3 + 8000c9b8: 00941a63 bne x8,x9,8000c9cc + 8000c9bc: 00265403 lhu x8,2(x12) + 8000c9c0: 01041413 slli x8,x8,0x10 + 8000c9c4: 00856533 or x10,x10,x8 + 8000c9c8: 02000593 addi x11,x0,32 + 8000c9cc: 32c000ef jal x1,8000ccf8 + 8000c9d0: 00000013 addi x0,x0,0 + 8000c9d4: 00000013 addi x0,x0,0 + 8000c9d8: 00000013 addi x0,x0,0 + 8000c9dc: 00000013 addi x0,x0,0 + 8000c9e0: 00014517 auipc x10,0x14 + 8000c9e4: 61850513 addi x10,x10,1560 # 80020ff8 + 8000c9e8: 00000013 addi x0,x0,0 + 8000c9ec: 00000013 addi x0,x0,0 + 8000c9f0: 00000013 addi x0,x0,0 + 8000c9f4: 00000013 addi x0,x0,0 + 8000c9f8: 00000013 addi x0,x0,0 + 8000c9fc: 00000013 addi x0,x0,0 + 8000ca00: 00036097 auipc x1,0x36 + 8000ca04: ba4080e7 jalr x1,-1116(x1) # 800425a4 + 8000ca08: 00000097 auipc x1,0x0 + 8000ca0c: 0e8080e7 jalr x1,232(x1) # 8000caf0 + 8000ca10: 0940006f jal x0,8000caa4 + +000000008000ca14 : + 8000ca14: 02054463 blt x10,x0,8000ca3c + +000000008000ca18 : + 8000ca18: 01800593 addi x11,x0,24 + 8000ca1c: 04b55863 bge x10,x11,8000ca6c + 8000ca20: 00014597 auipc x11,0x14 + 8000ca24: 60058593 addi x11,x11,1536 # 80021020 + 8000ca28: 00251613 slli x12,x10,0x2 + 8000ca2c: 00351613 slli x12,x10,0x3 + 8000ca30: 00c585b3 add x11,x11,x12 + 8000ca34: 0005b503 ld x10,0(x11) + 8000ca38: 00008067 jalr x0,0(x1) + +000000008000ca3c : + 8000ca3c: 00100593 addi x11,x0,1 + 8000ca40: 03f59593 slli x11,x11,0x3f + 8000ca44: 00b54533 xor x10,x10,x11 + 8000ca48: 01000593 addi x11,x0,16 + 8000ca4c: 02b55063 bge x10,x11,8000ca6c + 8000ca50: 00014597 auipc x11,0x14 + 8000ca54: 69058593 addi x11,x11,1680 # 800210e0 + 8000ca58: 00251613 slli x12,x10,0x2 + 8000ca5c: 00351613 slli x12,x10,0x3 + 8000ca60: 00c585b3 add x11,x11,x12 + 8000ca64: 0005b503 ld x10,0(x11) + 8000ca68: 00008067 jalr x0,0(x1) + +000000008000ca6c : + 8000ca6c: 00000013 addi x0,x0,0 + 8000ca70: 00000013 addi x0,x0,0 + 8000ca74: 00000013 addi x0,x0,0 + 8000ca78: 00000013 addi x0,x0,0 + 8000ca7c: 00000013 addi x0,x0,0 + 8000ca80: 00015517 auipc x10,0x15 + 8000ca84: ade50513 addi x10,x10,-1314 # 8002155e + 8000ca88: 00000013 addi x0,x0,0 + 8000ca8c: 00000013 addi x0,x0,0 + 8000ca90: 00000013 addi x0,x0,0 + 8000ca94: 00000013 addi x0,x0,0 + 8000ca98: 00000013 addi x0,x0,0 + 8000ca9c: 00000013 addi x0,x0,0 + 8000caa0: 00008067 jalr x0,0(x1) + +000000008000caa4 : + 8000caa4: 00000013 addi x0,x0,0 + 8000caa8: 00000013 addi x0,x0,0 + 8000caac: 00000013 addi x0,x0,0 + 8000cab0: 00000013 addi x0,x0,0 + 8000cab4: 00000013 addi x0,x0,0 + 8000cab8: 00000013 addi x0,x0,0 + 8000cabc: 00000013 addi x0,x0,0 + 8000cac0: 00015517 auipc x10,0x15 + 8000cac4: 73650513 addi x10,x10,1846 # 800221f6 + 8000cac8: 00000013 addi x0,x0,0 + 8000cacc: 00000013 addi x0,x0,0 + 8000cad0: 00000013 addi x0,x0,0 + 8000cad4: 00000013 addi x0,x0,0 + 8000cad8: 00000013 addi x0,x0,0 + 8000cadc: 00000013 addi x0,x0,0 + 8000cae0: 00036097 auipc x1,0x36 + 8000cae4: ac4080e7 jalr x1,-1340(x1) # 800425a4 + +000000008000cae8 : + 8000cae8: 00036097 auipc x1,0x36 + 8000caec: b1c080e7 jalr x1,-1252(x1) # 80042604 + +000000008000caf0 : + 8000caf0: 00014617 auipc x12,0x14 + 8000caf4: 4e060613 addi x12,x12,1248 # 80020fd0 + 8000caf8: 00163023 sd x1,0(x12) + 8000cafc: 00000013 addi x0,x0,0 + 8000cb00: 00015517 auipc x10,0x15 + 8000cb04: c5f50513 addi x10,x10,-929 # 8002175f + 8000cb08: 00000013 addi x0,x0,0 + 8000cb0c: 00000013 addi x0,x0,0 + 8000cb10: 00000013 addi x0,x0,0 + 8000cb14: 00000013 addi x0,x0,0 + 8000cb18: 00000013 addi x0,x0,0 + 8000cb1c: 00000013 addi x0,x0,0 + 8000cb20: 00036097 auipc x1,0x36 + 8000cb24: a84080e7 jalr x1,-1404(x1) # 800425a4 + 8000cb28: 00014517 auipc x10,0x14 + 8000cb2c: 4b053503 ld x10,1200(x10) # 80020fd8 + 8000cb30: 04000593 addi x11,x0,64 + 8000cb34: 1c4000ef jal x1,8000ccf8 + 8000cb38: 00000013 addi x0,x0,0 + 8000cb3c: 00000013 addi x0,x0,0 + 8000cb40: 00014517 auipc x10,0x14 + 8000cb44: 4b850513 addi x10,x10,1208 # 80020ff8 + 8000cb48: 00000013 addi x0,x0,0 + 8000cb4c: 00000013 addi x0,x0,0 + 8000cb50: 00000013 addi x0,x0,0 + 8000cb54: 00000013 addi x0,x0,0 + 8000cb58: 00000013 addi x0,x0,0 + 8000cb5c: 00000013 addi x0,x0,0 + 8000cb60: 00036097 auipc x1,0x36 + 8000cb64: a44080e7 jalr x1,-1468(x1) # 800425a4 + 8000cb68: 00000013 addi x0,x0,0 + 8000cb6c: 00000013 addi x0,x0,0 + 8000cb70: 00000013 addi x0,x0,0 + 8000cb74: 00000013 addi x0,x0,0 + 8000cb78: 00000013 addi x0,x0,0 + 8000cb7c: 00000013 addi x0,x0,0 + 8000cb80: 00015517 auipc x10,0x15 + 8000cb84: bef50513 addi x10,x10,-1041 # 8002176f + 8000cb88: 00000013 addi x0,x0,0 + 8000cb8c: 00000013 addi x0,x0,0 + 8000cb90: 00000013 addi x0,x0,0 + 8000cb94: 00000013 addi x0,x0,0 + 8000cb98: 00000013 addi x0,x0,0 + 8000cb9c: 00000013 addi x0,x0,0 + 8000cba0: 00036097 auipc x1,0x36 + 8000cba4: a04080e7 jalr x1,-1532(x1) # 800425a4 + 8000cba8: 00014517 auipc x10,0x14 + 8000cbac: 43853503 ld x10,1080(x10) # 80020fe0 + 8000cbb0: 04000593 addi x11,x0,64 + 8000cbb4: 144000ef jal x1,8000ccf8 + 8000cbb8: 00000013 addi x0,x0,0 + 8000cbbc: 00000013 addi x0,x0,0 + 8000cbc0: 00014517 auipc x10,0x14 + 8000cbc4: 43850513 addi x10,x10,1080 # 80020ff8 + 8000cbc8: 00000013 addi x0,x0,0 + 8000cbcc: 00000013 addi x0,x0,0 + 8000cbd0: 00000013 addi x0,x0,0 + 8000cbd4: 00000013 addi x0,x0,0 + 8000cbd8: 00000013 addi x0,x0,0 + 8000cbdc: 00000013 addi x0,x0,0 + 8000cbe0: 00036097 auipc x1,0x36 + 8000cbe4: 9c4080e7 jalr x1,-1596(x1) # 800425a4 + 8000cbe8: 00000013 addi x0,x0,0 + 8000cbec: 00000013 addi x0,x0,0 + 8000cbf0: 00000013 addi x0,x0,0 + 8000cbf4: 00000013 addi x0,x0,0 + 8000cbf8: 00000013 addi x0,x0,0 + 8000cbfc: 00000013 addi x0,x0,0 + 8000cc00: 00015517 auipc x10,0x15 + 8000cc04: b7f50513 addi x10,x10,-1153 # 8002177f + 8000cc08: 00000013 addi x0,x0,0 + 8000cc0c: 00000013 addi x0,x0,0 + 8000cc10: 00000013 addi x0,x0,0 + 8000cc14: 00000013 addi x0,x0,0 + 8000cc18: 00000013 addi x0,x0,0 + 8000cc1c: 00000013 addi x0,x0,0 + 8000cc20: 00036097 auipc x1,0x36 + 8000cc24: 984080e7 jalr x1,-1660(x1) # 800425a4 + 8000cc28: 00014517 auipc x10,0x14 + 8000cc2c: 3c053503 ld x10,960(x10) # 80020fe8 + 8000cc30: 04000593 addi x11,x0,64 + 8000cc34: 0c4000ef jal x1,8000ccf8 + 8000cc38: 00000013 addi x0,x0,0 + 8000cc3c: 00000013 addi x0,x0,0 + 8000cc40: 00014517 auipc x10,0x14 + 8000cc44: 3b850513 addi x10,x10,952 # 80020ff8 + 8000cc48: 00000013 addi x0,x0,0 + 8000cc4c: 00000013 addi x0,x0,0 + 8000cc50: 00000013 addi x0,x0,0 + 8000cc54: 00000013 addi x0,x0,0 + 8000cc58: 00000013 addi x0,x0,0 + 8000cc5c: 00000013 addi x0,x0,0 + 8000cc60: 00036097 auipc x1,0x36 + 8000cc64: 944080e7 jalr x1,-1724(x1) # 800425a4 + 8000cc68: 00000013 addi x0,x0,0 + 8000cc6c: 00000013 addi x0,x0,0 + 8000cc70: 00000013 addi x0,x0,0 + 8000cc74: 00000013 addi x0,x0,0 + 8000cc78: 00000013 addi x0,x0,0 + 8000cc7c: 00000013 addi x0,x0,0 + 8000cc80: 00015517 auipc x10,0x15 + 8000cc84: b0f50513 addi x10,x10,-1265 # 8002178f + 8000cc88: 00000013 addi x0,x0,0 + 8000cc8c: 00000013 addi x0,x0,0 + 8000cc90: 00000013 addi x0,x0,0 + 8000cc94: 00000013 addi x0,x0,0 + 8000cc98: 00000013 addi x0,x0,0 + 8000cc9c: 00000013 addi x0,x0,0 + 8000cca0: 00036097 auipc x1,0x36 + 8000cca4: 904080e7 jalr x1,-1788(x1) # 800425a4 + 8000cca8: 00014517 auipc x10,0x14 + 8000ccac: 34853503 ld x10,840(x10) # 80020ff0 + 8000ccb0: 04000593 addi x11,x0,64 + 8000ccb4: 044000ef jal x1,8000ccf8 + 8000ccb8: 00000013 addi x0,x0,0 + 8000ccbc: 00000013 addi x0,x0,0 + 8000ccc0: 00014517 auipc x10,0x14 + 8000ccc4: 33850513 addi x10,x10,824 # 80020ff8 + 8000ccc8: 00000013 addi x0,x0,0 + 8000cccc: 00000013 addi x0,x0,0 + 8000ccd0: 00000013 addi x0,x0,0 + 8000ccd4: 00000013 addi x0,x0,0 + 8000ccd8: 00000013 addi x0,x0,0 + 8000ccdc: 00000013 addi x0,x0,0 + 8000cce0: 00036097 auipc x1,0x36 + 8000cce4: 8c4080e7 jalr x1,-1852(x1) # 800425a4 + 8000cce8: 00014617 auipc x12,0x14 + 8000ccec: 2e860613 addi x12,x12,744 # 80020fd0 + 8000ccf0: 00063083 ld x1,0(x12) + 8000ccf4: 00008067 jalr x0,0(x1) + +000000008000ccf8 : + 8000ccf8: 00000013 addi x0,x0,0 + 8000ccfc: 00000013 addi x0,x0,0 + 8000cd00: 00014617 auipc x12,0x14 + 8000cd04: 2f860613 addi x12,x12,760 # 80020ff8 + 8000cd08: 00000013 addi x0,x0,0 + 8000cd0c: 00000013 addi x0,x0,0 + 8000cd10: 00000013 addi x0,x0,0 + 8000cd14: 00000013 addi x0,x0,0 + 8000cd18: 00000013 addi x0,x0,0 + 8000cd1c: 00000013 addi x0,x0,0 + 8000cd20: 03000693 addi x13,x0,48 + 8000cd24: 00d60023 sb x13,0(x12) + 8000cd28: 07800693 addi x13,x0,120 + 8000cd2c: 00d600a3 sb x13,1(x12) + 8000cd30: 00260613 addi x12,x12,2 + 8000cd34: 00058693 addi x13,x11,0 + +000000008000cd38 : + 8000cd38: ffc68693 addi x13,x13,-4 + 8000cd3c: 00d55733 srl x14,x10,x13 + 8000cd40: 00f77713 andi x14,x14,15 + 8000cd44: 00a00793 addi x15,x0,10 + 8000cd48: 00f74663 blt x14,x15,8000cd54 + 8000cd4c: 05770713 addi x14,x14,87 + 8000cd50: 0080006f jal x0,8000cd58 + +000000008000cd54 : + 8000cd54: 03070713 addi x14,x14,48 + +000000008000cd58 : + 8000cd58: 00e60023 sb x14,0(x12) + 8000cd5c: 00160613 addi x12,x12,1 + 8000cd60: fc069ce3 bne x13,x0,8000cd38 + 8000cd64: 00a00693 addi x13,x0,10 + 8000cd68: 00d60023 sb x13,0(x12) + 8000cd6c: 000600a3 sb x0,1(x12) + 8000cd70: 00008067 jalr x0,0(x1) + +000000008000cd74 : + 8000cd74: 00a00693 addi x13,x0,10 + 8000cd78: 02d54663 blt x10,x13,8000cda4 + 8000cd7c: ff650513 addi x10,x10,-10 + 8000cd80: 03100713 addi x14,x0,49 + 8000cd84: 00d54c63 blt x10,x13,8000cd9c + 8000cd88: ff650513 addi x10,x10,-10 + 8000cd8c: 03200713 addi x14,x0,50 + 8000cd90: 00d54663 blt x10,x13,8000cd9c + 8000cd94: ff650513 addi x10,x10,-10 + 8000cd98: 03300713 addi x14,x0,51 + 8000cd9c: 00e60023 sb x14,0(x12) + 8000cda0: 00160613 addi x12,x12,1 + 8000cda4: 03050513 addi x10,x10,48 + 8000cda8: 00a60023 sb x10,0(x12) + 8000cdac: 00a00693 addi x13,x0,10 + 8000cdb0: 00d600a3 sb x13,1(x12) + 8000cdb4: 00060123 sb x0,2(x12) + 8000cdb8: 00008067 jalr x0,0(x1) + 8000cdbc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +0000000080042000 : + 80042000: 10010737 lui x14,0x10010 + 80042004: 00072023 sw x0,0(x14) # 10010000 + 80042008: fffc9397 auipc x7,0xfffc9 + 8004200c: cb038393 addi x7,x7,-848 # 8000acb8 + 80042010: 00038067 jalr x0,0(x7) + +0000000080042014 : + 80042014: fff00713 addi x14,x0,-1 + 80042018: 100143b7 lui x7,0x10014 + 8004201c: 00e3b023 sd x14,0(x7) # 10014000 + 80042020: fffc9397 auipc x7,0xfffc9 + 80042024: c9838393 addi x7,x7,-872 # 8000acb8 + 80042028: 00038067 jalr x0,0(x7) + +000000008004202c : + 8004202c: 10000737 lui x14,0x10000 + 80042030: 0107071b addiw x14,x14,16 # 10000010 + 80042034: 00070023 sb x0,0(x14) + 80042038: fffc9397 auipc x7,0xfffc9 + 8004203c: c8038393 addi x7,x7,-896 # 8000acb8 + 80042040: 00038067 jalr x0,0(x7) + +0000000080042044 : + 80042044: 00200393 addi x7,x0,2 + 80042048: 3443b073 csrrc x0,mip,x7 + 8004204c: fffc9397 auipc x7,0xfffc9 + 80042050: c6c38393 addi x7,x7,-916 # 8000acb8 + 80042054: 00038067 jalr x0,0(x7) + +0000000080042058 : + 80042058: fffc9397 auipc x7,0xfffc9 + 8004205c: c6038393 addi x7,x7,-928 # 8000acb8 + 80042060: 00038067 jalr x0,0(x7) + +0000000080042064 : + 80042064: 20000413 addi x8,x0,512 + 80042068: 34443073 csrrc x0,mip,x8 + 8004206c: 34402473 csrrs x8,mip,x0 + 80042070: 00001337 lui x6,0x1 + 80042074: 8003031b addiw x6,x6,-2048 # 800 + 80042078: 00647433 and x8,x8,x6 + 8004207c: 00830863 beq x6,x8,8004208c + 80042080: 10000737 lui x14,0x10000 + 80042084: 0187071b addiw x14,x14,24 # 10000018 + 80042088: 00070023 sb x0,0(x14) + 8004208c: fffc9397 auipc x7,0xfffc9 + 80042090: c2c38393 addi x7,x7,-980 # 8000acb8 + 80042094: 00038067 jalr x0,0(x7) + +0000000080042098 : + 80042098: fffc8317 auipc x6,0xfffc8 + 8004209c: d5c30313 addi x6,x6,-676 # 80009df4 + 800420a0: 00030067 jalr x0,0(x6) + 800420a4: fffc9397 auipc x7,0xfffc9 + 800420a8: c1438393 addi x7,x7,-1004 # 8000acb8 + 800420ac: 00038067 jalr x0,0(x7) + +00000000800420b0 : + 800420b0: fffc8317 auipc x6,0xfffc8 + 800420b4: d4430313 addi x6,x6,-700 # 80009df4 + 800420b8: 00030067 jalr x0,0(x6) + 800420bc: fffc9397 auipc x7,0xfffc9 + 800420c0: bfc38393 addi x7,x7,-1028 # 8000acb8 + 800420c4: 00038067 jalr x0,0(x7) + +00000000800420c8 : + 800420c8: fffc8317 auipc x6,0xfffc8 + 800420cc: d2c30313 addi x6,x6,-724 # 80009df4 + 800420d0: 00030067 jalr x0,0(x6) + 800420d4: fffc9397 auipc x7,0xfffc9 + 800420d8: be438393 addi x7,x7,-1052 # 8000acb8 + 800420dc: 00038067 jalr x0,0(x7) + +00000000800420e0 : + 800420e0: 30401073 csrrw x0,mie,x0 + 800420e4: 34401073 csrrw x0,mip,x0 + 800420e8: 34101073 csrrw x0,mepc,x0 + 800420ec: 34301073 csrrw x0,mtval,x0 + 800420f0: 34201073 csrrw x0,mcause,x0 + 800420f4: 00000013 addi x0,x0,0 + 800420f8: 00000013 addi x0,x0,0 + 800420fc: 00000013 addi x0,x0,0 + 80042100: fffce317 auipc x6,0xfffce + 80042104: 01030313 addi x6,x6,16 # 80010110 + 80042108: 00000013 addi x0,x0,0 + 8004210c: 00000013 addi x0,x0,0 + 80042110: 00000013 addi x0,x0,0 + 80042114: 00000013 addi x0,x0,0 + 80042118: 00000013 addi x0,x0,0 + 8004211c: 00000013 addi x0,x0,0 + +0000000080042120 : + 80042120: 34031473 csrrw x8,mscratch,x6 + 80042124: 2c833823 sd x8,720(x6) + +0000000080042128 : + 80042128: fff00393 addi x7,x0,-1 + 8004212c: 000044b7 lui x9,0x4 + 80042130: 00548493 addi x9,x9,5 # 4005 + 80042134: 00e49493 slli x9,x9,0xe + 80042138: 0074b023 sd x7,0(x9) + 8004213c: 00000013 addi x0,x0,0 + +0000000080042140 : + 80042140: 00000393 addi x7,x0,0 + 80042144: 2a733c23 sd x7,696(x6) + +0000000080042148 : + 80042148: 30502473 csrrs x8,mtvec,x0 + 8004214c: 2c833423 sd x8,712(x6) + 80042150: 00347393 andi x7,x8,3 + 80042154: ffc3f393 andi x7,x7,-4 + 80042158: 2b033483 ld x9,688(x6) + 8004215c: da848493 addi x9,x9,-600 + 80042160: 0074e3b3 or x7,x9,x7 + 80042164: 2c733023 sd x7,704(x6) + 80042168: 30539073 csrrw x0,mtvec,x7 + 8004216c: 30502773 csrrs x14,mtvec,x0 + 80042170: 0e770a63 beq x14,x7,80042264 + 80042174: 30541073 csrrw x0,mtvec,x8 + 80042178: 0a040663 beq x8,x0,80042224 + 8004217c: 2c833023 sd x8,704(x6) + +0000000080042180 : + 80042180: ffc47393 andi x7,x8,-4 + 80042184: 25838413 addi x8,x7,600 + 80042188: 00030113 addi x2,x6,0 + 8004218c: 00000013 addi x0,x0,0 + 80042190: 00000013 addi x0,x0,0 + 80042194: 00000013 addi x0,x0,0 + 80042198: 00000013 addi x0,x0,0 + 8004219c: 00000013 addi x0,x0,0 + 800421a0: 00000717 auipc x14,0x0 + 800421a4: 04c70713 addi x14,x14,76 # 800421ec + 800421a8: 00000013 addi x0,x0,0 + 800421ac: 00000013 addi x0,x0,0 + 800421b0: 00000013 addi x0,x0,0 + 800421b4: 00000013 addi x0,x0,0 + 800421b8: 00000013 addi x0,x0,0 + 800421bc: 00000013 addi x0,x0,0 + 800421c0: 00000797 auipc x15,0x0 + 800421c4: 0a478793 addi x15,x15,164 # 80042264 + 800421c8: 00000013 addi x0,x0,0 + 800421cc: 00000013 addi x0,x0,0 + 800421d0: 00000013 addi x0,x0,0 + 800421d4: 00000013 addi x0,x0,0 + 800421d8: 00000013 addi x0,x0,0 + 800421dc: 00000013 addi x0,x0,0 + 800421e0: 00f3f663 bgeu x7,x15,800421ec + 800421e4: 00877463 bgeu x14,x8,800421ec + 800421e8: 03c0006f jal x0,80042224 + +00000000800421ec : + 800421ec: 0003a783 lw x15,0(x7) + 800421f0: 00f32023 sw x15,0(x6) + 800421f4: 0004a703 lw x14,0(x9) + 800421f8: 00e3a023 sw x14,0(x7) + 800421fc: 0003a783 lw x15,0(x7) + 80042200: 00e79a63 bne x15,x14,80042214 + 80042204: 00438393 addi x7,x7,4 + 80042208: 00430313 addi x6,x6,4 + 8004220c: 00448493 addi x9,x9,4 + 80042210: fc741ee3 bne x8,x7,800421ec + +0000000080042214 : + 80042214: 0000100f fence.i + 80042218: 34002373 csrrs x6,mscratch,x0 + 8004221c: 2a933823 sd x9,688(x6) + 80042220: 04740263 beq x8,x7,80042264 + +0000000080042224 : + 80042224: 00038413 addi x8,x7,0 + 80042228: 00000013 addi x0,x0,0 + 8004222c: 00000013 addi x0,x0,0 + 80042230: 00000013 addi x0,x0,0 + 80042234: 00000013 addi x0,x0,0 + 80042238: 00000013 addi x0,x0,0 + 8004223c: 00000013 addi x0,x0,0 + 80042240: fffc8797 auipc x15,0xfffc8 + 80042244: bc478793 addi x15,x15,-1084 # 80009e04 + 80042248: 00000013 addi x0,x0,0 + 8004224c: 00000013 addi x0,x0,0 + 80042250: 00000013 addi x0,x0,0 + 80042254: 00000013 addi x0,x0,0 + 80042258: 00000013 addi x0,x0,0 + 8004225c: 00000013 addi x0,x0,0 + 80042260: 00078067 jalr x0,0(x15) + +0000000080042264 : + 80042264: 00000013 addi x0,x0,0 + +0000000080042268 : + 80042268: 005002b7 lui x5,0x500 + 8004226c: 0012829b addiw x5,x5,1 # 500001 + 80042270: 00d29293 slli x5,x5,0xd + 80042274: 80028293 addi x5,x5,-2048 + 80042278: 30029073 csrrw x0,mstatus,x5 + 8004227c: 32001073 csrrw x0,mcountinhibit,x0 + 80042280: 32301073 csrrw x0,mhpmevent3,x0 + 80042284: 32401073 csrrw x0,mhpmevent4,x0 + 80042288: 32501073 csrrw x0,mhpmevent5,x0 + 8004228c: 32601073 csrrw x0,mhpmevent6,x0 + 80042290: 32701073 csrrw x0,mhpmevent7,x0 + 80042294: 32801073 csrrw x0,mhpmevent8,x0 + 80042298: 32901073 csrrw x0,mhpmevent9,x0 + 8004229c: 32a01073 csrrw x0,mhpmevent10,x0 + 800422a0: 32b01073 csrrw x0,mhpmevent11,x0 + 800422a4: 32c01073 csrrw x0,mhpmevent12,x0 + 800422a8: 32d01073 csrrw x0,mhpmevent13,x0 + 800422ac: 32e01073 csrrw x0,mhpmevent14,x0 + 800422b0: 32f01073 csrrw x0,mhpmevent15,x0 + 800422b4: 33001073 csrrw x0,mhpmevent16,x0 + 800422b8: 33101073 csrrw x0,mhpmevent17,x0 + 800422bc: 33201073 csrrw x0,mhpmevent18,x0 + 800422c0: 33301073 csrrw x0,mhpmevent19,x0 + 800422c4: 33401073 csrrw x0,mhpmevent20,x0 + 800422c8: 33501073 csrrw x0,mhpmevent21,x0 + 800422cc: 33601073 csrrw x0,mhpmevent22,x0 + 800422d0: 33701073 csrrw x0,mhpmevent23,x0 + 800422d4: 33801073 csrrw x0,mhpmevent24,x0 + 800422d8: 33901073 csrrw x0,mhpmevent25,x0 + 800422dc: 33a01073 csrrw x0,mhpmevent26,x0 + 800422e0: 33b01073 csrrw x0,mhpmevent27,x0 + 800422e4: 33c01073 csrrw x0,mhpmevent28,x0 + 800422e8: 33d01073 csrrw x0,mhpmevent29,x0 + 800422ec: 33e01073 csrrw x0,mhpmevent30,x0 + 800422f0: 33f01073 csrrw x0,mhpmevent31,x0 + 800422f4: 00000013 addi x0,x0,0 + 800422f8: 00000013 addi x0,x0,0 + 800422fc: 00000013 addi x0,x0,0 + 80042300: fffce317 auipc x6,0xfffce + 80042304: e0830313 addi x6,x6,-504 # 80010108 + 80042308: 00000013 addi x0,x0,0 + 8004230c: 00000013 addi x0,x0,0 + 80042310: 00000013 addi x0,x0,0 + 80042314: 00000013 addi x0,x0,0 + 80042318: 00000013 addi x0,x0,0 + 8004231c: 00000013 addi x0,x0,0 + 80042320: 00033023 sd x0,0(x6) + +0000000080042324 : + 80042324: feedc0b7 lui x1,0xfeedc + 80042328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8004232c: 00b09093 slli x1,x1,0xb + 80042330: 7f708093 addi x1,x1,2039 + 80042334: 00b09093 slli x1,x1,0xb + 80042338: 36f08093 addi x1,x1,879 + 8004233c: 00a09093 slli x1,x1,0xa + 80042340: 2ad08093 addi x1,x1,685 + 80042344: 03909793 slli x15,x1,0x39 + 80042348: 0070d113 srli x2,x1,0x7 + 8004234c: 00f16133 or x2,x2,x15 + 80042350: 03911793 slli x15,x2,0x39 + 80042354: 00715193 srli x3,x2,0x7 + 80042358: 00f1e1b3 or x3,x3,x15 + 8004235c: 03919793 slli x15,x3,0x39 + 80042360: 0071d213 srli x4,x3,0x7 + 80042364: 00f26233 or x4,x4,x15 + 80042368: 03921793 slli x15,x4,0x39 + 8004236c: 00725293 srli x5,x4,0x7 + 80042370: 00f2e2b3 or x5,x5,x15 + 80042374: 03929793 slli x15,x5,0x39 + 80042378: 0072d313 srli x6,x5,0x7 + 8004237c: 00f36333 or x6,x6,x15 + 80042380: 03931793 slli x15,x6,0x39 + 80042384: 00735393 srli x7,x6,0x7 + 80042388: 00f3e3b3 or x7,x7,x15 + 8004238c: 03939793 slli x15,x7,0x39 + 80042390: 0073d413 srli x8,x7,0x7 + 80042394: 00f46433 or x8,x8,x15 + 80042398: 03941793 slli x15,x8,0x39 + 8004239c: 00745493 srli x9,x8,0x7 + 800423a0: 00f4e4b3 or x9,x9,x15 + 800423a4: 03949793 slli x15,x9,0x39 + 800423a8: 0074d513 srli x10,x9,0x7 + 800423ac: 00f56533 or x10,x10,x15 + 800423b0: 03951793 slli x15,x10,0x39 + 800423b4: 00755593 srli x11,x10,0x7 + 800423b8: 00f5e5b3 or x11,x11,x15 + 800423bc: 03959793 slli x15,x11,0x39 + 800423c0: 0075d613 srli x12,x11,0x7 + 800423c4: 00f66633 or x12,x12,x15 + 800423c8: 03961793 slli x15,x12,0x39 + 800423cc: 00765693 srli x13,x12,0x7 + 800423d0: 00f6e6b3 or x13,x13,x15 + 800423d4: 03969793 slli x15,x13,0x39 + 800423d8: 0076d713 srli x14,x13,0x7 + 800423dc: 00f76733 or x14,x14,x15 + 800423e0: fab807b7 lui x15,0xfab80 + 800423e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 800423e8: 00b79793 slli x15,x15,0xb + 800423ec: 7d578793 addi x15,x15,2005 + 800423f0: 00b79793 slli x15,x15,0xb + 800423f4: 5fe78793 addi x15,x15,1534 + 800423f8: 00a79793 slli x15,x15,0xa + 800423fc: 3b678793 addi x15,x15,950 + 80042400: 7d5c0837 lui x16,0x7d5c0 + 80042404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 80042408: 00b81813 slli x16,x16,0xb + 8004240c: 3ea80813 addi x16,x16,1002 + 80042410: 00b81813 slli x16,x16,0xb + 80042414: 6ff80813 addi x16,x16,1791 + 80042418: 00a81813 slli x16,x16,0xa + 8004241c: 1db80813 addi x16,x16,475 + 80042420: 03981793 slli x15,x16,0x39 + 80042424: 00785893 srli x17,x16,0x7 + 80042428: 00f8e8b3 or x17,x17,x15 + 8004242c: 03989793 slli x15,x17,0x39 + 80042430: 0078d913 srli x18,x17,0x7 + 80042434: 00f96933 or x18,x18,x15 + 80042438: 03991793 slli x15,x18,0x39 + 8004243c: 00795993 srli x19,x18,0x7 + 80042440: 00f9e9b3 or x19,x19,x15 + 80042444: 03999793 slli x15,x19,0x39 + 80042448: 0079da13 srli x20,x19,0x7 + 8004244c: 00fa6a33 or x20,x20,x15 + 80042450: 039a1793 slli x15,x20,0x39 + 80042454: 007a5a93 srli x21,x20,0x7 + 80042458: 00faeab3 or x21,x21,x15 + 8004245c: 039a9793 slli x15,x21,0x39 + 80042460: 007adb13 srli x22,x21,0x7 + 80042464: 00fb6b33 or x22,x22,x15 + 80042468: 039b1793 slli x15,x22,0x39 + 8004246c: 007b5b93 srli x23,x22,0x7 + 80042470: 00fbebb3 or x23,x23,x15 + 80042474: 039b9793 slli x15,x23,0x39 + 80042478: 007bdc13 srli x24,x23,0x7 + 8004247c: 00fc6c33 or x24,x24,x15 + 80042480: 039c1793 slli x15,x24,0x39 + 80042484: 007c5c93 srli x25,x24,0x7 + 80042488: 00fcecb3 or x25,x25,x15 + 8004248c: 039c9793 slli x15,x25,0x39 + 80042490: 007cdd13 srli x26,x25,0x7 + 80042494: 00fd6d33 or x26,x26,x15 + 80042498: 039d1793 slli x15,x26,0x39 + 8004249c: 007d5d93 srli x27,x26,0x7 + 800424a0: 00fdedb3 or x27,x27,x15 + 800424a4: 039d9793 slli x15,x27,0x39 + 800424a8: 007dde13 srli x28,x27,0x7 + 800424ac: 00fe6e33 or x28,x28,x15 + 800424b0: 039e1793 slli x15,x28,0x39 + 800424b4: 007e5e93 srli x29,x28,0x7 + 800424b8: 00feeeb3 or x29,x29,x15 + 800424bc: 039e9793 slli x15,x29,0x39 + 800424c0: 007edf13 srli x30,x29,0x7 + 800424c4: 00ff6f33 or x30,x30,x15 + 800424c8: 039f1793 slli x15,x30,0x39 + 800424cc: 007f5f93 srli x31,x30,0x7 + 800424d0: 00ffefb3 or x31,x31,x15 + 800424d4: 00000013 addi x0,x0,0 + 800424d8: 00000013 addi x0,x0,0 + 800424dc: 00000013 addi x0,x0,0 + 800424e0: fffe0117 auipc x2,0xfffe0 + 800424e4: 7a010113 addi x2,x2,1952 # 80022c80 + 800424e8: 00000013 addi x0,x0,0 + 800424ec: 00000013 addi x0,x0,0 + 800424f0: 00000013 addi x0,x0,0 + 800424f4: 00000013 addi x0,x0,0 + 800424f8: 00000013 addi x0,x0,0 + 800424fc: 00000013 addi x0,x0,0 + +0000000080042500 : + 80042500: 6f5ca337 lui x6,0x6f5ca + 80042504: 30930313 addi x6,x6,777 # 6f5ca309 + 80042508: 00b31313 slli x6,x6,0xb + 8004250c: 73e30313 addi x6,x6,1854 + 80042510: 00b31313 slli x6,x6,0xb + 80042514: 52c30313 addi x6,x6,1324 + 80042518: 00a31313 slli x6,x6,0xa + 8004251c: 28130313 addi x6,x6,641 + 80042520: fffc9197 auipc x3,0xfffc9 + 80042524: ca018193 addi x3,x3,-864 # 8000b1c0 + 80042528: 00000013 addi x0,x0,0 + 8004252c: 00000013 addi x0,x0,0 + 80042530: 00000013 addi x0,x0,0 + 80042534: 00000013 addi x0,x0,0 + 80042538: 00000013 addi x0,x0,0 + 8004253c: 00000013 addi x0,x0,0 + 80042540: 00013203 ld x4,0(x2) + 80042544: 00620c63 beq x4,x6,8004255c + 80042548: 000182e7 jalr x5,0(x3) + 8004254c: 80042500 .word 0x80042500 + 80042550: 00000000 .word 0x00000000 + 80042554: 8002221f .word 0x8002221f + 80042558: 00000000 .word 0x00000000 + 8004255c: 00810113 addi x2,x2,8 + 80042560: fffce197 auipc x3,0xfffce + 80042564: f1018193 addi x3,x3,-240 # 80010470 + 80042568: 00000013 addi x0,x0,0 + 8004256c: 00000013 addi x0,x0,0 + 80042570: 00000013 addi x0,x0,0 + 80042574: 00000013 addi x0,x0,0 + 80042578: 00000013 addi x0,x0,0 + 8004257c: 00000013 addi x0,x0,0 + 80042580: fffbe317 auipc x6,0xfffbe + 80042584: ac030313 addi x6,x6,-1344 # 80000040 + 80042588: 00000013 addi x0,x0,0 + 8004258c: 00000013 addi x0,x0,0 + 80042590: 00000013 addi x0,x0,0 + 80042594: 00000013 addi x0,x0,0 + 80042598: 00000013 addi x0,x0,0 + 8004259c: 00000013 addi x0,x0,0 + 800425a0: 00030067 jalr x0,0(x6) + +00000000800425a4 : + 800425a4: 00054303 lbu x6,0(x10) + 800425a8: 00030a63 beq x6,x0,800425bc + 800425ac: 100003b7 lui x7,0x10000 + 800425b0: 00638023 sb x6,0(x7) # 10000000 + 800425b4: 00150513 addi x10,x10,1 + 800425b8: fedff06f jal x0,800425a4 + 800425bc: 00008067 jalr x0,0(x1) + +00000000800425c0 : + 800425c0: ff010113 addi x2,x2,-16 + 800425c4: 00113023 sd x1,0(x2) + 800425c8: 00813423 sd x8,8(x2) + 800425cc: 00000097 auipc x1,0x0 + 800425d0: fd8080e7 jalr x1,-40(x1) # 800425a4 + 800425d4: 00813403 ld x8,8(x2) + 800425d8: 00013083 ld x1,0(x2) + 800425dc: 01010113 addi x2,x2,16 + 800425e0: 00008067 jalr x0,0(x1) + +00000000800425e4 : + 800425e4: 00100093 addi x1,x0,1 + 800425e8: fffff297 auipc x5,0xfffff + 800425ec: 41828293 addi x5,x5,1048 # 80041a00 + +00000000800425f0 : + 800425f0: 0012a023 sw x1,0(x5) + 800425f4: 0002a223 sw x0,4(x5) + +00000000800425f8 : + 800425f8: 00000013 addi x0,x0,0 + 800425fc: ffdff06f jal x0,800425f8 + 80042600: 0000006f jal x0,80042600 + +0000000080042604 : + 80042604: 00300093 addi x1,x0,3 + 80042608: fffff297 auipc x5,0xfffff + 8004260c: 3f828293 addi x5,x5,1016 # 80041a00 + +0000000080042610 : + 80042610: 0012a023 sw x1,0(x5) + 80042614: 0002a223 sw x0,4(x5) + +0000000080042618 : + 80042618: 00000013 addi x0,x0,0 + 8004261c: ffdff06f jal x0,80042618 + 80042620: 0000006f jal x0,80042620 + +0000000080042624 : + 80042624: 00100513 addi x10,x0,1 + 80042628: 100105b7 lui x11,0x10010 + 8004262c: 00a5a023 sw x10,0(x11) # 10010000 + 80042630: 00008067 jalr x0,0(x1) + +0000000080042634 : + 80042634: 100105b7 lui x11,0x10010 + 80042638: 0005a023 sw x0,0(x11) # 10010000 + 8004263c: 00008067 jalr x0,0(x1) + +0000000080042640 : + 80042640: 00100513 addi x10,x0,1 + 80042644: 100005b7 lui x11,0x10000 + 80042648: 0105859b addiw x11,x11,16 # 10000010 + 8004264c: 00a58023 sb x10,0(x11) + 80042650: 00008067 jalr x0,0(x1) + +0000000080042654 : + 80042654: 100005b7 lui x11,0x10000 + 80042658: 0105859b addiw x11,x11,16 # 10000010 + 8004265c: 00058023 sb x0,0(x11) + 80042660: 00008067 jalr x0,0(x1) + 80042664: 00000013 addi x0,x0,0 + 80042668: 00000013 addi x0,x0,0 + 8004266c: 00000013 addi x0,x0,0 + 80042670: 00000013 addi x0,x0,0 + 80042674: 00000013 addi x0,x0,0 + 80042678: 00000013 addi x0,x0,0 + 8004267c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zksh-sm3p0-00.elf.objdump b/riscv-tests/rv64-Zksh-sm3p0-00.elf.objdump new file mode 100644 index 0000000..26c229a --- /dev/null +++ b/riscv-tests/rv64-Zksh-sm3p0-00.elf.objdump @@ -0,0 +1,6674 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksh/Zksh-sm3p0-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksh/Zksh-sm3p0-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000216a0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029700 0000000080029700 00027700 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008c6 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 0000000000000000 0000000000000000 00028f81 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00028ffc 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 0002901f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029040 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 0000000000000000 0000000000000000 00029080 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 00029109 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029700 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccTeR8fB.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b1 +0000000080008822 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b2 +0000000080008854 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b3 +0000000080008886 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088b8 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b5 +00000000800088ea l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b6 +000000008000891c l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b7 +000000008000894e l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b8 +0000000080008980 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b8_str +00000000800001e4 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b9 +00000000800089b2 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b9_str +0000000080000210 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b10 +00000000800089e5 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b10_str +000000008000023c l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b11 +0000000080008a19 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b11_str +0000000080000268 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b12 +0000000080008a4d l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b12_str +000000008000029c l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b13 +00000000800027d8 l .text.rvtest 0000000000000000 failedtest_x8_x7 +0000000080008a81 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b13_str +00000000800002c8 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b14 +0000000080008ab5 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b14_str +00000000800002f4 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b15 +0000000080008ae9 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b15_str +0000000080000320 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b16 +0000000080008b1d l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b16_str +000000008000034c l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b17 +0000000080008b51 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b17_str +0000000080000378 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b18 +0000000080008b85 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b18_str +00000000800003a4 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b19 +0000000080008bb9 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b19_str +00000000800003d0 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b20 +0000000080008bed l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b20_str +0000000080000400 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b21 +0000000080008c21 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b21_str +000000008000042c l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b22 +0000000080008c55 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b22_str +0000000080000458 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b23 +0000000080008c89 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b23_str +0000000080000484 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b24 +0000000080008cbd l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b24_str +00000000800004b0 l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b25 +0000000080008cf1 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b25_str +00000000800004dc l .text.rvtest 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b26 +0000000080008d25 l .data 0000000000000000 Zksh_sm3p0_cg_cp_rs1_b26_str +0000000080000508 l .text.rvtest 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80000014: 00000013 addi x0,x0,0 + 80000018: 00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0xc38c565dfb080bc9 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zksh_sm3p0_cg_cp_rs1_b0: + sm3p0 x8, x0 # perform operation + 80000048: 10801413 sm3p0 x8,x0 + # Check if x8 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x8, Zksh_sm3p0_cg_cp_rs1_b0, Zksh_sm3p0_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 00820c63 beq x4,x8,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0xa53a7c36abff1f7c + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zksh_sm3p0_cg_cp_rs1_b1: + sm3p0 x28, x1 # perform operation + 80000074: 10809e13 sm3p0 x28,x1 + # Check if x28 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x28, Zksh_sm3p0_cg_cp_rs1_b1, Zksh_sm3p0_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01c20c63 beq x4,x28,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008822 .word 0x80008822 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x21, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010a93 addi x21,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0x15e839f0f1aed7cb + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zksh_sm3p0_cg_cp_rs1_b2: + sm3p0 x7, x2 # perform operation + 800000a4: 10811393 sm3p0 x7,x2 + # Check if x7 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x7, Zksh_sm3p0_cg_cp_rs1_b2, Zksh_sm3p0_cg_cp_rs1_b2_str) + 800000a8: 000ab203 ld x4,0(x21) + 800000ac: 00720c63 beq x4,x7,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008854 .word 0x80008854 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008a8a93 addi x21,x21,8 + + mv x1, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018093 addi x1,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x1, x3) # load rs1: x3 = 0x86dac2449892e1fa + 800000cc: 0000b183 ld x3,0(x1) + 800000d0: 00808093 addi x1,x1,8 + +00000000800000d4 : +Zksh_sm3p0_cg_cp_rs1_b3: + sm3p0 x28, x3 # perform operation + 800000d4: 10819e13 sm3p0 x28,x3 + # Check if x28 contains the expected result. x21 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x21, x5, x4, x28, Zksh_sm3p0_cg_cp_rs1_b3, Zksh_sm3p0_cg_cp_rs1_b3_str) + 800000d8: 000ab203 ld x4,0(x21) + 800000dc: 01c20c63 beq x4,x28,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008886 .word 0x80008886 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008a8a93 addi x21,x21,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x1, x4) # load rs1: x4 = 0xbb4c8e3f925cfacd + 80000100: 0000b203 ld x4,0(x1) + 80000104: 00808093 addi x1,x1,8 + +0000000080000108 : +Zksh_sm3p0_cg_cp_rs1_b4: + sm3p0 x12, x4 # perform operation + 80000108: 10821613 sm3p0 x12,x4 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zksh_sm3p0_cg_cp_rs1_b4, Zksh_sm3p0_cg_cp_rs1_b4_str) + 8000010c: 000ab683 ld x13,0(x21) + 80000110: 00c68c63 beq x13,x12,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088b8 .word 0x800088b8 + 80000124: 00000000 .word 0x00000000 + 80000128: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x1, x5) # load rs1: x5 = 0xc201582f060cb39a + 8000012c: 0000b283 ld x5,0(x1) + 80000130: 00808093 addi x1,x1,8 + +0000000080000134 : +Zksh_sm3p0_cg_cp_rs1_b5: + sm3p0 x29, x5 # perform operation + 80000134: 10829e93 sm3p0 x29,x5 + # Check if x29 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x29, Zksh_sm3p0_cg_cp_rs1_b5, Zksh_sm3p0_cg_cp_rs1_b5_str) + 80000138: 000ab683 ld x13,0(x21) + 8000013c: 01d68c63 beq x13,x29,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 800088ea .word 0x800088ea + 80000150: 00000000 .word 0x00000000 + 80000154: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x1, x6) # load rs1: x6 = 0xae448d9743ddb70e + 80000158: 0000b303 ld x6,0(x1) + 8000015c: 00808093 addi x1,x1,8 + +0000000080000160 : +Zksh_sm3p0_cg_cp_rs1_b6: + sm3p0 x23, x6 # perform operation + 80000160: 10831b93 sm3p0 x23,x6 + # Check if x23 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x23, Zksh_sm3p0_cg_cp_rs1_b6, Zksh_sm3p0_cg_cp_rs1_b6_str) + 80000164: 000ab683 ld x13,0(x21) + 80000168: 01768c63 beq x13,x23,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000891c .word 0x8000891c + 8000017c: 00000000 .word 0x00000000 + 80000180: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x1, x7) # load rs1: x7 = 0xa51eee097dbfa0e8 + 80000184: 0000b383 ld x7,0(x1) + 80000188: 00808093 addi x1,x1,8 + +000000008000018c : +Zksh_sm3p0_cg_cp_rs1_b7: + sm3p0 x4, x7 # perform operation + 8000018c: 10839213 sm3p0 x4,x7 + # Check if x4 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x4, Zksh_sm3p0_cg_cp_rs1_b7, Zksh_sm3p0_cg_cp_rs1_b7_str) + 80000190: 000ab683 ld x13,0(x21) + 80000194: 00468c63 beq x13,x4,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 8000894e .word 0x8000894e + 800001a8: 00000000 .word 0x00000000 + 800001ac: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x1, x8) # load rs1: x8 = 0x8fcdc70d4389bc4c + 800001b0: 0000b403 ld x8,0(x1) + 800001b4: 00808093 addi x1,x1,8 + +00000000800001b8 : +Zksh_sm3p0_cg_cp_rs1_b8: + sm3p0 x18, x8 # perform operation + 800001b8: 10841913 sm3p0 x18,x8 + # Check if x18 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x18, Zksh_sm3p0_cg_cp_rs1_b8, Zksh_sm3p0_cg_cp_rs1_b8_str) + 800001bc: 000ab683 ld x13,0(x21) + 800001c0: 01268c63 beq x13,x18,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 80008980 .word 0x80008980 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x1, x9) # load rs1: x9 = 0x068d1de8efa9fdad + 800001dc: 0000b483 ld x9,0(x1) + 800001e0: 00808093 addi x1,x1,8 + +00000000800001e4 : +Zksh_sm3p0_cg_cp_rs1_b9: + sm3p0 x15, x9 # perform operation + 800001e4: 10849793 sm3p0 x15,x9 + # Check if x15 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x15, Zksh_sm3p0_cg_cp_rs1_b9, Zksh_sm3p0_cg_cp_rs1_b9_str) + 800001e8: 000ab683 ld x13,0(x21) + 800001ec: 00f68c63 beq x13,x15,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089b2 .word 0x800089b2 + 80000200: 00000000 .word 0x00000000 + 80000204: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x1, x10) # load rs1: x10 = 0x5ce7aa468f103332 + 80000208: 0000b503 ld x10,0(x1) + 8000020c: 00808093 addi x1,x1,8 + +0000000080000210 : +Zksh_sm3p0_cg_cp_rs1_b10: + sm3p0 x25, x10 # perform operation + 80000210: 10851c93 sm3p0 x25,x10 + # Check if x25 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x25, Zksh_sm3p0_cg_cp_rs1_b10, Zksh_sm3p0_cg_cp_rs1_b10_str) + 80000214: 000ab683 ld x13,0(x21) + 80000218: 01968c63 beq x13,x25,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 800089e5 .word 0x800089e5 + 8000022c: 00000000 .word 0x00000000 + 80000230: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x1, x11) # load rs1: x11 = 0xad8f3547b569b6a6 + 80000234: 0000b583 ld x11,0(x1) + 80000238: 00808093 addi x1,x1,8 + +000000008000023c : +Zksh_sm3p0_cg_cp_rs1_b11: + sm3p0 x12, x11 # perform operation + 8000023c: 10859613 sm3p0 x12,x11 + # Check if x12 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x12, Zksh_sm3p0_cg_cp_rs1_b11, Zksh_sm3p0_cg_cp_rs1_b11_str) + 80000240: 000ab683 ld x13,0(x21) + 80000244: 00c68c63 beq x13,x12,8000025c + 80000248: 5b80276f jal x14,80002800 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80008a19 .word 0x80008a19 + 80000258: 00000000 .word 0x00000000 + 8000025c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x1, x12) # load rs1: x12 = 0x92d25160de657923 + 80000260: 0000b603 ld x12,0(x1) + 80000264: 00808093 addi x1,x1,8 + +0000000080000268 : +Zksh_sm3p0_cg_cp_rs1_b12: + sm3p0 x2, x12 # perform operation + 80000268: 10861113 sm3p0 x2,x12 + # Check if x2 contains the expected result. x21 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x21, x14, x13, x2, Zksh_sm3p0_cg_cp_rs1_b12, Zksh_sm3p0_cg_cp_rs1_b12_str) + 8000026c: 000ab683 ld x13,0(x21) + 80000270: 00268c63 beq x13,x2,80000288 + 80000274: 58c0276f jal x14,80002800 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 80008a4d .word 0x80008a4d + 80000284: 00000000 .word 0x00000000 + 80000288: 008a8a93 addi x21,x21,8 + + mv x7, x13 # switch temp register to avoid conflict with test + 8000028c: 00068393 addi x7,x13,0 + mv x8, x14 # switch link pointer register to avoid conflict with test + 80000290: 00070413 addi x8,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x1, x13) # load rs1: x13 = 0x3fe6885cd9ebacd4 + 80000294: 0000b683 ld x13,0(x1) + 80000298: 00808093 addi x1,x1,8 + +000000008000029c : +Zksh_sm3p0_cg_cp_rs1_b13: + sm3p0 x23, x13 # perform operation + 8000029c: 10869b93 sm3p0 x23,x13 + # Check if x23 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x23, Zksh_sm3p0_cg_cp_rs1_b13, Zksh_sm3p0_cg_cp_rs1_b13_str) + 800002a0: 000ab383 ld x7,0(x21) + 800002a4: 01738c63 beq x7,x23,800002bc + 800002a8: 5300246f jal x8,800027d8 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 80008a81 .word 0x80008a81 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x1, x14) # load rs1: x14 = 0xc79d9e17605db4c3 + 800002c0: 0000b703 ld x14,0(x1) + 800002c4: 00808093 addi x1,x1,8 + +00000000800002c8 : +Zksh_sm3p0_cg_cp_rs1_b14: + sm3p0 x16, x14 # perform operation + 800002c8: 10871813 sm3p0 x16,x14 + # Check if x16 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x16, Zksh_sm3p0_cg_cp_rs1_b14, Zksh_sm3p0_cg_cp_rs1_b14_str) + 800002cc: 000ab383 ld x7,0(x21) + 800002d0: 01038c63 beq x7,x16,800002e8 + 800002d4: 5040246f jal x8,800027d8 + 800002d8: 800002c8 .word 0x800002c8 + 800002dc: 00000000 .word 0x00000000 + 800002e0: 80008ab5 .word 0x80008ab5 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x1, x15) # load rs1: x15 = 0x9ba93e911b3d6c89 + 800002ec: 0000b783 ld x15,0(x1) + 800002f0: 00808093 addi x1,x1,8 + +00000000800002f4 : +Zksh_sm3p0_cg_cp_rs1_b15: + sm3p0 x9, x15 # perform operation + 800002f4: 10879493 sm3p0 x9,x15 + # Check if x9 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x9, Zksh_sm3p0_cg_cp_rs1_b15, Zksh_sm3p0_cg_cp_rs1_b15_str) + 800002f8: 000ab383 ld x7,0(x21) + 800002fc: 00938c63 beq x7,x9,80000314 + 80000300: 4d80246f jal x8,800027d8 + 80000304: 800002f4 .word 0x800002f4 + 80000308: 00000000 .word 0x00000000 + 8000030c: 80008ae9 .word 0x80008ae9 + 80000310: 00000000 .word 0x00000000 + 80000314: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x1, x16) # load rs1: x16 = 0x554fe2f88480e751 + 80000318: 0000b803 ld x16,0(x1) + 8000031c: 00808093 addi x1,x1,8 + +0000000080000320 : +Zksh_sm3p0_cg_cp_rs1_b16: + sm3p0 x29, x16 # perform operation + 80000320: 10881e93 sm3p0 x29,x16 + # Check if x29 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x29, Zksh_sm3p0_cg_cp_rs1_b16, Zksh_sm3p0_cg_cp_rs1_b16_str) + 80000324: 000ab383 ld x7,0(x21) + 80000328: 01d38c63 beq x7,x29,80000340 + 8000032c: 4ac0246f jal x8,800027d8 + 80000330: 80000320 .word 0x80000320 + 80000334: 00000000 .word 0x00000000 + 80000338: 80008b1d .word 0x80008b1d + 8000033c: 00000000 .word 0x00000000 + 80000340: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x1, x17) # load rs1: x17 = 0x9e53b242d4c1cc2a + 80000344: 0000b883 ld x17,0(x1) + 80000348: 00808093 addi x1,x1,8 + +000000008000034c : +Zksh_sm3p0_cg_cp_rs1_b17: + sm3p0 x2, x17 # perform operation + 8000034c: 10889113 sm3p0 x2,x17 + # Check if x2 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x2, Zksh_sm3p0_cg_cp_rs1_b17, Zksh_sm3p0_cg_cp_rs1_b17_str) + 80000350: 000ab383 ld x7,0(x21) + 80000354: 00238c63 beq x7,x2,8000036c + 80000358: 4800246f jal x8,800027d8 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 80008b51 .word 0x80008b51 + 80000368: 00000000 .word 0x00000000 + 8000036c: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x1, x18) # load rs1: x18 = 0xbd069ae974efd57f + 80000370: 0000b903 ld x18,0(x1) + 80000374: 00808093 addi x1,x1,8 + +0000000080000378 : +Zksh_sm3p0_cg_cp_rs1_b18: + sm3p0 x24, x18 # perform operation + 80000378: 10891c13 sm3p0 x24,x18 + # Check if x24 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x24, Zksh_sm3p0_cg_cp_rs1_b18, Zksh_sm3p0_cg_cp_rs1_b18_str) + 8000037c: 000ab383 ld x7,0(x21) + 80000380: 01838c63 beq x7,x24,80000398 + 80000384: 4540246f jal x8,800027d8 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 80008b85 .word 0x80008b85 + 80000394: 00000000 .word 0x00000000 + 80000398: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x1, x19) # load rs1: x19 = 0xef5daa8a7b11298d + 8000039c: 0000b983 ld x19,0(x1) + 800003a0: 00808093 addi x1,x1,8 + +00000000800003a4 : +Zksh_sm3p0_cg_cp_rs1_b19: + sm3p0 x25, x19 # perform operation + 800003a4: 10899c93 sm3p0 x25,x19 + # Check if x25 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x25, Zksh_sm3p0_cg_cp_rs1_b19, Zksh_sm3p0_cg_cp_rs1_b19_str) + 800003a8: 000ab383 ld x7,0(x21) + 800003ac: 01938c63 beq x7,x25,800003c4 + 800003b0: 4280246f jal x8,800027d8 + 800003b4: 800003a4 .word 0x800003a4 + 800003b8: 00000000 .word 0x00000000 + 800003bc: 80008bb9 .word 0x80008bb9 + 800003c0: 00000000 .word 0x00000000 + 800003c4: 008a8a93 addi x21,x21,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x1, x20) # load rs1: x20 = 0x3fbc2e33312ef364 + 800003c8: 0000ba03 ld x20,0(x1) + 800003cc: 00808093 addi x1,x1,8 + +00000000800003d0 : +Zksh_sm3p0_cg_cp_rs1_b20: + sm3p0 x13, x20 # perform operation + 800003d0: 108a1693 sm3p0 x13,x20 + # Check if x13 contains the expected result. x21 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x21, x8, x7, x13, Zksh_sm3p0_cg_cp_rs1_b20, Zksh_sm3p0_cg_cp_rs1_b20_str) + 800003d4: 000ab383 ld x7,0(x21) + 800003d8: 00d38c63 beq x7,x13,800003f0 + 800003dc: 3fc0246f jal x8,800027d8 + 800003e0: 800003d0 .word 0x800003d0 + 800003e4: 00000000 .word 0x00000000 + 800003e8: 80008bed .word 0x80008bed + 800003ec: 00000000 .word 0x00000000 + 800003f0: 008a8a93 addi x21,x21,8 + + mv x29, x21 # switch signature pointer register to avoid conflict with test + 800003f4: 000a8e93 addi x29,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x1, x21) # load rs1: x21 = 0x41dcc54213fcf45b + 800003f8: 0000ba83 ld x21,0(x1) + 800003fc: 00808093 addi x1,x1,8 + +0000000080000400 : +Zksh_sm3p0_cg_cp_rs1_b21: + sm3p0 x3, x21 # perform operation + 80000400: 108a9193 sm3p0 x3,x21 + # Check if x3 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x3, Zksh_sm3p0_cg_cp_rs1_b21, Zksh_sm3p0_cg_cp_rs1_b21_str) + 80000404: 000eb383 ld x7,0(x29) + 80000408: 00338c63 beq x7,x3,80000420 + 8000040c: 3cc0246f jal x8,800027d8 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c21 .word 0x80008c21 + 8000041c: 00000000 .word 0x00000000 + 80000420: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x1, x22) # load rs1: x22 = 0xeba8e3384ee280d9 + 80000424: 0000bb03 ld x22,0(x1) + 80000428: 00808093 addi x1,x1,8 + +000000008000042c : +Zksh_sm3p0_cg_cp_rs1_b22: + sm3p0 x14, x22 # perform operation + 8000042c: 108b1713 sm3p0 x14,x22 + # Check if x14 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x14, Zksh_sm3p0_cg_cp_rs1_b22, Zksh_sm3p0_cg_cp_rs1_b22_str) + 80000430: 000eb383 ld x7,0(x29) + 80000434: 00e38c63 beq x7,x14,8000044c + 80000438: 3a00246f jal x8,800027d8 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008c55 .word 0x80008c55 + 80000448: 00000000 .word 0x00000000 + 8000044c: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x1, x23) # load rs1: x23 = 0x4627608890e01c5c + 80000450: 0000bb83 ld x23,0(x1) + 80000454: 00808093 addi x1,x1,8 + +0000000080000458 : +Zksh_sm3p0_cg_cp_rs1_b23: + sm3p0 x22, x23 # perform operation + 80000458: 108b9b13 sm3p0 x22,x23 + # Check if x22 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x22, Zksh_sm3p0_cg_cp_rs1_b23, Zksh_sm3p0_cg_cp_rs1_b23_str) + 8000045c: 000eb383 ld x7,0(x29) + 80000460: 01638c63 beq x7,x22,80000478 + 80000464: 3740246f jal x8,800027d8 + 80000468: 80000458 .word 0x80000458 + 8000046c: 00000000 .word 0x00000000 + 80000470: 80008c89 .word 0x80008c89 + 80000474: 00000000 .word 0x00000000 + 80000478: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x1, x24) # load rs1: x24 = 0xc52a029856887701 + 8000047c: 0000bc03 ld x24,0(x1) + 80000480: 00808093 addi x1,x1,8 + +0000000080000484 : +Zksh_sm3p0_cg_cp_rs1_b24: + sm3p0 x15, x24 # perform operation + 80000484: 108c1793 sm3p0 x15,x24 + # Check if x15 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x15, Zksh_sm3p0_cg_cp_rs1_b24, Zksh_sm3p0_cg_cp_rs1_b24_str) + 80000488: 000eb383 ld x7,0(x29) + 8000048c: 00f38c63 beq x7,x15,800004a4 + 80000490: 3480246f jal x8,800027d8 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 80008cbd .word 0x80008cbd + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x1, x25) # load rs1: x25 = 0xdfb179f0d36651d6 + 800004a8: 0000bc83 ld x25,0(x1) + 800004ac: 00808093 addi x1,x1,8 + +00000000800004b0 : +Zksh_sm3p0_cg_cp_rs1_b25: + sm3p0 x20, x25 # perform operation + 800004b0: 108c9a13 sm3p0 x20,x25 + # Check if x20 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x20, Zksh_sm3p0_cg_cp_rs1_b25, Zksh_sm3p0_cg_cp_rs1_b25_str) + 800004b4: 000eb383 ld x7,0(x29) + 800004b8: 01438c63 beq x7,x20,800004d0 + 800004bc: 31c0246f jal x8,800027d8 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 80008cf1 .word 0x80008cf1 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x1, x26) # load rs1: x26 = 0xf74bb3b4cac264b0 + 800004d4: 0000bd03 ld x26,0(x1) + 800004d8: 00808093 addi x1,x1,8 + +00000000800004dc : +Zksh_sm3p0_cg_cp_rs1_b26: + sm3p0 x23, x26 # perform operation + 800004dc: 108d1b93 sm3p0 x23,x26 + # Check if x23 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x23, Zksh_sm3p0_cg_cp_rs1_b26, Zksh_sm3p0_cg_cp_rs1_b26_str) + 800004e0: 000eb383 ld x7,0(x29) + 800004e4: 01738c63 beq x7,x23,800004fc + 800004e8: 2f00246f jal x8,800027d8 + 800004ec: 800004dc .word 0x800004dc + 800004f0: 00000000 .word 0x00000000 + 800004f4: 80008d25 .word 0x80008d25 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0xc173fd0a1d969032 + 80000500: 0000bd83 ld x27,0(x1) + 80000504: 00808093 addi x1,x1,8 + +0000000080000508 : +Zksh_sm3p0_cg_cp_rs1_b27: + sm3p0 x17, x27 # perform operation + 80000508: 108d9893 sm3p0 x17,x27 + # Check if x17 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x17, Zksh_sm3p0_cg_cp_rs1_b27, Zksh_sm3p0_cg_cp_rs1_b27_str) + 8000050c: 000eb383 ld x7,0(x29) + 80000510: 01138c63 beq x7,x17,80000528 + 80000514: 2c40246f jal x8,800027d8 + 80000518: 80000508 .word 0x80000508 + 8000051c: 00000000 .word 0x00000000 + 80000520: 80008d59 .word 0x80008d59 + 80000524: 00000000 .word 0x00000000 + 80000528: 008e8e93 addi x29,x29,8 + +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x1, x28) # load rs1: x28 = 0xf8ca9de3a7c88356 + 8000052c: 0000be03 ld x28,0(x1) + 80000530: 00808093 addi x1,x1,8 + +0000000080000534 : +Zksh_sm3p0_cg_cp_rs1_b28: + sm3p0 x30, x28 # perform operation + 80000534: 108e1f13 sm3p0 x30,x28 + # Check if x30 contains the expected result. x29 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x29, x8, x7, x30, Zksh_sm3p0_cg_cp_rs1_b28, Zksh_sm3p0_cg_cp_rs1_b28_str) + 80000538: 000eb383 ld x7,0(x29) + 8000053c: 01e38c63 beq x7,x30,80000554 + 80000540: 2980246f jal x8,800027d8 + 80000544: 80000534 .word 0x80000534 + 80000548: 00000000 .word 0x00000000 + 8000054c: 80008d8d .word 0x80008d8d + 80000550: 00000000 .word 0x00000000 + 80000554: 008e8e93 addi x29,x29,8 + + mv x24, x29 # switch signature pointer register to avoid conflict with test + 80000558: 000e8c13 addi x24,x29,0 +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x1, x29) # load rs1: x29 = 0x914ba9a84cda906c + 8000055c: 0000be83 ld x29,0(x1) + 80000560: 00808093 addi x1,x1,8 + +0000000080000564 : +Zksh_sm3p0_cg_cp_rs1_b29: + sm3p0 x31, x29 # perform operation + 80000564: 108e9f93 sm3p0 x31,x29 + # Check if x31 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x31, Zksh_sm3p0_cg_cp_rs1_b29, Zksh_sm3p0_cg_cp_rs1_b29_str) + 80000568: 000c3383 ld x7,0(x24) + 8000056c: 01f38c63 beq x7,x31,80000584 + 80000570: 2680246f jal x8,800027d8 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008dc1 .word 0x80008dc1 + 80000580: 00000000 .word 0x00000000 + 80000584: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x1, x30) # load rs1: x30 = 0x8e8572909bb29449 + 80000588: 0000bf03 ld x30,0(x1) + 8000058c: 00808093 addi x1,x1,8 + +0000000080000590 : +Zksh_sm3p0_cg_cp_rs1_b30: + sm3p0 x10, x30 # perform operation + 80000590: 108f1513 sm3p0 x10,x30 + # Check if x10 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x10, Zksh_sm3p0_cg_cp_rs1_b30, Zksh_sm3p0_cg_cp_rs1_b30_str) + 80000594: 000c3383 ld x7,0(x24) + 80000598: 00a38c63 beq x7,x10,800005b0 + 8000059c: 23c0246f jal x8,800027d8 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008df5 .word 0x80008df5 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x1, x31) # load rs1: x31 = 0x3dfc68c2c58c9264 + 800005b4: 0000bf83 ld x31,0(x1) + 800005b8: 00808093 addi x1,x1,8 + +00000000800005bc : +Zksh_sm3p0_cg_cp_rs1_b31: + sm3p0 x2, x31 # perform operation + 800005bc: 108f9113 sm3p0 x2,x31 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zksh_sm3p0_cg_cp_rs1_b31, Zksh_sm3p0_cg_cp_rs1_b31_str) + 800005c0: 000c3383 ld x7,0(x24) + 800005c4: 00238c63 beq x7,x2,800005dc + 800005c8: 2100246f jal x8,800027d8 + 800005cc: 800005bc .word 0x800005bc + 800005d0: 00000000 .word 0x00000000 + 800005d4: 80008e29 .word 0x80008e29 + 800005d8: 00000000 .word 0x00000000 + 800005dc: 008c0c13 addi x24,x24,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x1, x27) # load rs1: x27 = 0x9992783a3ce276f8 + 800005e0: 0000bd83 ld x27,0(x1) + 800005e4: 00808093 addi x1,x1,8 + +00000000800005e8 : +Zksh_sm3p0_cg_cp_rd_b0: + sm3p0 x0, x27 # perform operation + 800005e8: 108d9013 sm3p0 x0,x27 + # Check if x0 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x0, Zksh_sm3p0_cg_cp_rd_b0, Zksh_sm3p0_cg_cp_rd_b0_str) + 800005ec: 000c3383 ld x7,0(x24) + 800005f0: 00038c63 beq x7,x0,80000608 + 800005f4: 1e40246f jal x8,800027d8 + 800005f8: 800005e8 .word 0x800005e8 + 800005fc: 00000000 .word 0x00000000 + 80000600: 80008e5d .word 0x80008e5d + 80000604: 00000000 .word 0x00000000 + 80000608: 008c0c13 addi x24,x24,8 + + mv x23, x1 # switch data pointer register to avoid conflict with test + 8000060c: 00008b93 addi x23,x1,0 +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xe3c42ce4bf71fd89 + 80000610: 000bba03 ld x20,0(x23) + 80000614: 008b8b93 addi x23,x23,8 + +0000000080000618 : +Zksh_sm3p0_cg_cp_rd_b1: + sm3p0 x1, x20 # perform operation + 80000618: 108a1093 sm3p0 x1,x20 + # Check if x1 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x1, Zksh_sm3p0_cg_cp_rd_b1, Zksh_sm3p0_cg_cp_rd_b1_str) + 8000061c: 000c3383 ld x7,0(x24) + 80000620: 00138c63 beq x7,x1,80000638 + 80000624: 1b40246f jal x8,800027d8 + 80000628: 80000618 .word 0x80000618 + 8000062c: 00000000 .word 0x00000000 + 80000630: 80008e8f .word 0x80008e8f + 80000634: 00000000 .word 0x00000000 + 80000638: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x025f44bb792fc83d + 8000063c: 000bb683 ld x13,0(x23) + 80000640: 008b8b93 addi x23,x23,8 + +0000000080000644 : +Zksh_sm3p0_cg_cp_rd_b2: + sm3p0 x2, x13 # perform operation + 80000644: 10869113 sm3p0 x2,x13 + # Check if x2 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x2, Zksh_sm3p0_cg_cp_rd_b2, Zksh_sm3p0_cg_cp_rd_b2_str) + 80000648: 000c3383 ld x7,0(x24) + 8000064c: 00238c63 beq x7,x2,80000664 + 80000650: 1880246f jal x8,800027d8 + 80000654: 80000644 .word 0x80000644 + 80000658: 00000000 .word 0x00000000 + 8000065c: 80008ec1 .word 0x80008ec1 + 80000660: 00000000 .word 0x00000000 + 80000664: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0xec2878dd7b5452e6 + 80000668: 000bba83 ld x21,0(x23) + 8000066c: 008b8b93 addi x23,x23,8 + +0000000080000670 : +Zksh_sm3p0_cg_cp_rd_b3: + sm3p0 x3, x21 # perform operation + 80000670: 108a9193 sm3p0 x3,x21 + # Check if x3 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x3, Zksh_sm3p0_cg_cp_rd_b3, Zksh_sm3p0_cg_cp_rd_b3_str) + 80000674: 000c3383 ld x7,0(x24) + 80000678: 00338c63 beq x7,x3,80000690 + 8000067c: 15c0246f jal x8,800027d8 + 80000680: 80000670 .word 0x80000670 + 80000684: 00000000 .word 0x00000000 + 80000688: 80008ef3 .word 0x80008ef3 + 8000068c: 00000000 .word 0x00000000 + 80000690: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x23, x6) # load rs1: x6 = 0x8ad4778c3060771e + 80000694: 000bb303 ld x6,0(x23) + 80000698: 008b8b93 addi x23,x23,8 + +000000008000069c : +Zksh_sm3p0_cg_cp_rd_b4: + sm3p0 x4, x6 # perform operation + 8000069c: 10831213 sm3p0 x4,x6 + # Check if x4 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x4, Zksh_sm3p0_cg_cp_rd_b4, Zksh_sm3p0_cg_cp_rd_b4_str) + 800006a0: 000c3383 ld x7,0(x24) + 800006a4: 00438c63 beq x7,x4,800006bc + 800006a8: 1300246f jal x8,800027d8 + 800006ac: 8000069c .word 0x8000069c + 800006b0: 00000000 .word 0x00000000 + 800006b4: 80008f25 .word 0x80008f25 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x105d13955707154f + 800006c0: 000bb583 ld x11,0(x23) + 800006c4: 008b8b93 addi x23,x23,8 + +00000000800006c8 : +Zksh_sm3p0_cg_cp_rd_b5: + sm3p0 x5, x11 # perform operation + 800006c8: 10859293 sm3p0 x5,x11 + # Check if x5 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x5, Zksh_sm3p0_cg_cp_rd_b5, Zksh_sm3p0_cg_cp_rd_b5_str) + 800006cc: 000c3383 ld x7,0(x24) + 800006d0: 00538c63 beq x7,x5,800006e8 + 800006d4: 1040246f jal x8,800027d8 + 800006d8: 800006c8 .word 0x800006c8 + 800006dc: 00000000 .word 0x00000000 + 800006e0: 80008f57 .word 0x80008f57 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x3decca90240738c0 + 800006ec: 000bba83 ld x21,0(x23) + 800006f0: 008b8b93 addi x23,x23,8 + +00000000800006f4 : +Zksh_sm3p0_cg_cp_rd_b6: + sm3p0 x6, x21 # perform operation + 800006f4: 108a9313 sm3p0 x6,x21 + # Check if x6 contains the expected result. x24 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x24, x8, x7, x6, Zksh_sm3p0_cg_cp_rd_b6, Zksh_sm3p0_cg_cp_rd_b6_str) + 800006f8: 000c3383 ld x7,0(x24) + 800006fc: 00638c63 beq x7,x6,80000714 + 80000700: 0d80246f jal x8,800027d8 + 80000704: 800006f4 .word 0x800006f4 + 80000708: 00000000 .word 0x00000000 + 8000070c: 80008f89 .word 0x80008f89 + 80000710: 00000000 .word 0x00000000 + 80000714: 008c0c13 addi x24,x24,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000718: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 8000071c: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x6b470904a9bf38bb + 80000720: 000bb403 ld x8,0(x23) + 80000724: 008b8b93 addi x23,x23,8 + +0000000080000728 : +Zksh_sm3p0_cg_cp_rd_b7: + sm3p0 x7, x8 # perform operation + 80000728: 10841393 sm3p0 x7,x8 + # Check if x7 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x7, Zksh_sm3p0_cg_cp_rd_b7, Zksh_sm3p0_cg_cp_rd_b7_str) + 8000072c: 000c3203 ld x4,0(x24) + 80000730: 00720c63 beq x4,x7,80000748 + 80000734: 08c022ef jal x5,800027c0 + 80000738: 80000728 .word 0x80000728 + 8000073c: 00000000 .word 0x00000000 + 80000740: 80008fbb .word 0x80008fbb + 80000744: 00000000 .word 0x00000000 + 80000748: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0x0fd2e69229d98bc4 + 8000074c: 000bba03 ld x20,0(x23) + 80000750: 008b8b93 addi x23,x23,8 + +0000000080000754 : +Zksh_sm3p0_cg_cp_rd_b8: + sm3p0 x8, x20 # perform operation + 80000754: 108a1413 sm3p0 x8,x20 + # Check if x8 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x8, Zksh_sm3p0_cg_cp_rd_b8, Zksh_sm3p0_cg_cp_rd_b8_str) + 80000758: 000c3203 ld x4,0(x24) + 8000075c: 00820c63 beq x4,x8,80000774 + 80000760: 060022ef jal x5,800027c0 + 80000764: 80000754 .word 0x80000754 + 80000768: 00000000 .word 0x00000000 + 8000076c: 80008fed .word 0x80008fed + 80000770: 00000000 .word 0x00000000 + 80000774: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0x50dc475873ccb6a1 + 80000778: 000bb803 ld x16,0(x23) + 8000077c: 008b8b93 addi x23,x23,8 + +0000000080000780 : +Zksh_sm3p0_cg_cp_rd_b9: + sm3p0 x9, x16 # perform operation + 80000780: 10881493 sm3p0 x9,x16 + # Check if x9 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x9, Zksh_sm3p0_cg_cp_rd_b9, Zksh_sm3p0_cg_cp_rd_b9_str) + 80000784: 000c3203 ld x4,0(x24) + 80000788: 00920c63 beq x4,x9,800007a0 + 8000078c: 034022ef jal x5,800027c0 + 80000790: 80000780 .word 0x80000780 + 80000794: 00000000 .word 0x00000000 + 80000798: 8000901f .word 0x8000901f + 8000079c: 00000000 .word 0x00000000 + 800007a0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x30) # load rs1: x30 = 0x593be6fb3586a863 + 800007a4: 000bbf03 ld x30,0(x23) + 800007a8: 008b8b93 addi x23,x23,8 + +00000000800007ac : +Zksh_sm3p0_cg_cp_rd_b10: + sm3p0 x10, x30 # perform operation + 800007ac: 108f1513 sm3p0 x10,x30 + # Check if x10 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x10, Zksh_sm3p0_cg_cp_rd_b10, Zksh_sm3p0_cg_cp_rd_b10_str) + 800007b0: 000c3203 ld x4,0(x24) + 800007b4: 00a20c63 beq x4,x10,800007cc + 800007b8: 008022ef jal x5,800027c0 + 800007bc: 800007ac .word 0x800007ac + 800007c0: 00000000 .word 0x00000000 + 800007c4: 80009051 .word 0x80009051 + 800007c8: 00000000 .word 0x00000000 + 800007cc: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0x6a05955ee985b8bb + 800007d0: 000bbe83 ld x29,0(x23) + 800007d4: 008b8b93 addi x23,x23,8 + +00000000800007d8 : +Zksh_sm3p0_cg_cp_rd_b11: + sm3p0 x11, x29 # perform operation + 800007d8: 108e9593 sm3p0 x11,x29 + # Check if x11 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x11, Zksh_sm3p0_cg_cp_rd_b11, Zksh_sm3p0_cg_cp_rd_b11_str) + 800007dc: 000c3203 ld x4,0(x24) + 800007e0: 00b20c63 beq x4,x11,800007f8 + 800007e4: 7dd012ef jal x5,800027c0 + 800007e8: 800007d8 .word 0x800007d8 + 800007ec: 00000000 .word 0x00000000 + 800007f0: 80009084 .word 0x80009084 + 800007f4: 00000000 .word 0x00000000 + 800007f8: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x25) # load rs1: x25 = 0x8774a2b1cf3cfea9 + 800007fc: 000bbc83 ld x25,0(x23) + 80000800: 008b8b93 addi x23,x23,8 + +0000000080000804 : +Zksh_sm3p0_cg_cp_rd_b12: + sm3p0 x12, x25 # perform operation + 80000804: 108c9613 sm3p0 x12,x25 + # Check if x12 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x12, Zksh_sm3p0_cg_cp_rd_b12, Zksh_sm3p0_cg_cp_rd_b12_str) + 80000808: 000c3203 ld x4,0(x24) + 8000080c: 00c20c63 beq x4,x12,80000824 + 80000810: 7b1012ef jal x5,800027c0 + 80000814: 80000804 .word 0x80000804 + 80000818: 00000000 .word 0x00000000 + 8000081c: 800090b7 .word 0x800090b7 + 80000820: 00000000 .word 0x00000000 + 80000824: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xd483e728c74c0647 + 80000828: 000bb783 ld x15,0(x23) + 8000082c: 008b8b93 addi x23,x23,8 + +0000000080000830 : +Zksh_sm3p0_cg_cp_rd_b13: + sm3p0 x13, x15 # perform operation + 80000830: 10879693 sm3p0 x13,x15 + # Check if x13 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x13, Zksh_sm3p0_cg_cp_rd_b13, Zksh_sm3p0_cg_cp_rd_b13_str) + 80000834: 000c3203 ld x4,0(x24) + 80000838: 00d20c63 beq x4,x13,80000850 + 8000083c: 785012ef jal x5,800027c0 + 80000840: 80000830 .word 0x80000830 + 80000844: 00000000 .word 0x00000000 + 80000848: 800090ea .word 0x800090ea + 8000084c: 00000000 .word 0x00000000 + 80000850: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xf95ab95ef0060955 + 80000854: 000bb983 ld x19,0(x23) + 80000858: 008b8b93 addi x23,x23,8 + +000000008000085c : +Zksh_sm3p0_cg_cp_rd_b14: + sm3p0 x14, x19 # perform operation + 8000085c: 10899713 sm3p0 x14,x19 + # Check if x14 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x14, Zksh_sm3p0_cg_cp_rd_b14, Zksh_sm3p0_cg_cp_rd_b14_str) + 80000860: 000c3203 ld x4,0(x24) + 80000864: 00e20c63 beq x4,x14,8000087c + 80000868: 759012ef jal x5,800027c0 + 8000086c: 8000085c .word 0x8000085c + 80000870: 00000000 .word 0x00000000 + 80000874: 8000911d .word 0x8000911d + 80000878: 00000000 .word 0x00000000 + 8000087c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x4d551a5088517c5e + 80000880: 000bb883 ld x17,0(x23) + 80000884: 008b8b93 addi x23,x23,8 + +0000000080000888 : +Zksh_sm3p0_cg_cp_rd_b15: + sm3p0 x15, x17 # perform operation + 80000888: 10889793 sm3p0 x15,x17 + # Check if x15 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x15, Zksh_sm3p0_cg_cp_rd_b15, Zksh_sm3p0_cg_cp_rd_b15_str) + 8000088c: 000c3203 ld x4,0(x24) + 80000890: 00f20c63 beq x4,x15,800008a8 + 80000894: 72d012ef jal x5,800027c0 + 80000898: 80000888 .word 0x80000888 + 8000089c: 00000000 .word 0x00000000 + 800008a0: 80009150 .word 0x80009150 + 800008a4: 00000000 .word 0x00000000 + 800008a8: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0x63daf8405fef9f12 + 800008ac: 000bbd03 ld x26,0(x23) + 800008b0: 008b8b93 addi x23,x23,8 + +00000000800008b4 : +Zksh_sm3p0_cg_cp_rd_b16: + sm3p0 x16, x26 # perform operation + 800008b4: 108d1813 sm3p0 x16,x26 + # Check if x16 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x16, Zksh_sm3p0_cg_cp_rd_b16, Zksh_sm3p0_cg_cp_rd_b16_str) + 800008b8: 000c3203 ld x4,0(x24) + 800008bc: 01020c63 beq x4,x16,800008d4 + 800008c0: 701012ef jal x5,800027c0 + 800008c4: 800008b4 .word 0x800008b4 + 800008c8: 00000000 .word 0x00000000 + 800008cc: 80009183 .word 0x80009183 + 800008d0: 00000000 .word 0x00000000 + 800008d4: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0xe97a9f32e0251b04 + 800008d8: 000bb503 ld x10,0(x23) + 800008dc: 008b8b93 addi x23,x23,8 + +00000000800008e0 : +Zksh_sm3p0_cg_cp_rd_b17: + sm3p0 x17, x10 # perform operation + 800008e0: 10851893 sm3p0 x17,x10 + # Check if x17 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x17, Zksh_sm3p0_cg_cp_rd_b17, Zksh_sm3p0_cg_cp_rd_b17_str) + 800008e4: 000c3203 ld x4,0(x24) + 800008e8: 01120c63 beq x4,x17,80000900 + 800008ec: 6d5012ef jal x5,800027c0 + 800008f0: 800008e0 .word 0x800008e0 + 800008f4: 00000000 .word 0x00000000 + 800008f8: 800091b6 .word 0x800091b6 + 800008fc: 00000000 .word 0x00000000 + 80000900: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x26) # load rs1: x26 = 0xfd4a08c9080a3223 + 80000904: 000bbd03 ld x26,0(x23) + 80000908: 008b8b93 addi x23,x23,8 + +000000008000090c : +Zksh_sm3p0_cg_cp_rd_b18: + sm3p0 x18, x26 # perform operation + 8000090c: 108d1913 sm3p0 x18,x26 + # Check if x18 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x18, Zksh_sm3p0_cg_cp_rd_b18, Zksh_sm3p0_cg_cp_rd_b18_str) + 80000910: 000c3203 ld x4,0(x24) + 80000914: 01220c63 beq x4,x18,8000092c + 80000918: 6a9012ef jal x5,800027c0 + 8000091c: 8000090c .word 0x8000090c + 80000920: 00000000 .word 0x00000000 + 80000924: 800091e9 .word 0x800091e9 + 80000928: 00000000 .word 0x00000000 + 8000092c: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x8) # load rs1: x8 = 0x0df9ab2542a317aa + 80000930: 000bb403 ld x8,0(x23) + 80000934: 008b8b93 addi x23,x23,8 + +0000000080000938 : +Zksh_sm3p0_cg_cp_rd_b19: + sm3p0 x19, x8 # perform operation + 80000938: 10841993 sm3p0 x19,x8 + # Check if x19 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x19, Zksh_sm3p0_cg_cp_rd_b19, Zksh_sm3p0_cg_cp_rd_b19_str) + 8000093c: 000c3203 ld x4,0(x24) + 80000940: 01320c63 beq x4,x19,80000958 + 80000944: 67d012ef jal x5,800027c0 + 80000948: 80000938 .word 0x80000938 + 8000094c: 00000000 .word 0x00000000 + 80000950: 8000921c .word 0x8000921c + 80000954: 00000000 .word 0x00000000 + 80000958: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x29) # load rs1: x29 = 0xc0b1b40d94cde752 + 8000095c: 000bbe83 ld x29,0(x23) + 80000960: 008b8b93 addi x23,x23,8 + +0000000080000964 : +Zksh_sm3p0_cg_cp_rd_b20: + sm3p0 x20, x29 # perform operation + 80000964: 108e9a13 sm3p0 x20,x29 + # Check if x20 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x20, Zksh_sm3p0_cg_cp_rd_b20, Zksh_sm3p0_cg_cp_rd_b20_str) + 80000968: 000c3203 ld x4,0(x24) + 8000096c: 01420c63 beq x4,x20,80000984 + 80000970: 651012ef jal x5,800027c0 + 80000974: 80000964 .word 0x80000964 + 80000978: 00000000 .word 0x00000000 + 8000097c: 8000924f .word 0x8000924f + 80000980: 00000000 .word 0x00000000 + 80000984: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0x2feb761725fc5dc1 + 80000988: 000bb903 ld x18,0(x23) + 8000098c: 008b8b93 addi x23,x23,8 + +0000000080000990 : +Zksh_sm3p0_cg_cp_rd_b21: + sm3p0 x21, x18 # perform operation + 80000990: 10891a93 sm3p0 x21,x18 + # Check if x21 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x21, Zksh_sm3p0_cg_cp_rd_b21, Zksh_sm3p0_cg_cp_rd_b21_str) + 80000994: 000c3203 ld x4,0(x24) + 80000998: 01520c63 beq x4,x21,800009b0 + 8000099c: 625012ef jal x5,800027c0 + 800009a0: 80000990 .word 0x80000990 + 800009a4: 00000000 .word 0x00000000 + 800009a8: 80009282 .word 0x80009282 + 800009ac: 00000000 .word 0x00000000 + 800009b0: 008c0c13 addi x24,x24,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0xd3d42c88140039aa + 800009b4: 000bb583 ld x11,0(x23) + 800009b8: 008b8b93 addi x23,x23,8 + +00000000800009bc : +Zksh_sm3p0_cg_cp_rd_b22: + sm3p0 x22, x11 # perform operation + 800009bc: 10859b13 sm3p0 x22,x11 + # Check if x22 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x22, Zksh_sm3p0_cg_cp_rd_b22, Zksh_sm3p0_cg_cp_rd_b22_str) + 800009c0: 000c3203 ld x4,0(x24) + 800009c4: 01620c63 beq x4,x22,800009dc + 800009c8: 5f9012ef jal x5,800027c0 + 800009cc: 800009bc .word 0x800009bc + 800009d0: 00000000 .word 0x00000000 + 800009d4: 800092b5 .word 0x800092b5 + 800009d8: 00000000 .word 0x00000000 + 800009dc: 008c0c13 addi x24,x24,8 + + mv x10, x23 # switch data pointer register to avoid conflict with test + 800009e0: 000b8513 addi x10,x23,0 +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x5bac77bb1040b787 + 800009e4: 00053383 ld x7,0(x10) + 800009e8: 00850513 addi x10,x10,8 + +00000000800009ec : +Zksh_sm3p0_cg_cp_rd_b23: + sm3p0 x23, x7 # perform operation + 800009ec: 10839b93 sm3p0 x23,x7 + # Check if x23 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x23, Zksh_sm3p0_cg_cp_rd_b23, Zksh_sm3p0_cg_cp_rd_b23_str) + 800009f0: 000c3203 ld x4,0(x24) + 800009f4: 01720c63 beq x4,x23,80000a0c + 800009f8: 5c9012ef jal x5,800027c0 + 800009fc: 800009ec .word 0x800009ec + 80000a00: 00000000 .word 0x00000000 + 80000a04: 800092e8 .word 0x800092e8 + 80000a08: 00000000 .word 0x00000000 + 80000a0c: 008c0c13 addi x24,x24,8 + + mv x18, x24 # switch signature pointer register to avoid conflict with test + 80000a10: 000c0913 addi x18,x24,0 +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x2360bfa08ac5443f + 80000a14: 00053783 ld x15,0(x10) + 80000a18: 00850513 addi x10,x10,8 + +0000000080000a1c : +Zksh_sm3p0_cg_cp_rd_b24: + sm3p0 x24, x15 # perform operation + 80000a1c: 10879c13 sm3p0 x24,x15 + # Check if x24 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x24, Zksh_sm3p0_cg_cp_rd_b24, Zksh_sm3p0_cg_cp_rd_b24_str) + 80000a20: 00093203 ld x4,0(x18) + 80000a24: 01820c63 beq x4,x24,80000a3c + 80000a28: 599012ef jal x5,800027c0 + 80000a2c: 80000a1c .word 0x80000a1c + 80000a30: 00000000 .word 0x00000000 + 80000a34: 8000931b .word 0x8000931b + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x4fdee2b555d79299 + 80000a40: 00053983 ld x19,0(x10) + 80000a44: 00850513 addi x10,x10,8 + +0000000080000a48 : +Zksh_sm3p0_cg_cp_rd_b25: + sm3p0 x25, x19 # perform operation + 80000a48: 10899c93 sm3p0 x25,x19 + # Check if x25 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x25, Zksh_sm3p0_cg_cp_rd_b25, Zksh_sm3p0_cg_cp_rd_b25_str) + 80000a4c: 00093203 ld x4,0(x18) + 80000a50: 01920c63 beq x4,x25,80000a68 + 80000a54: 56d012ef jal x5,800027c0 + 80000a58: 80000a48 .word 0x80000a48 + 80000a5c: 00000000 .word 0x00000000 + 80000a60: 8000934e .word 0x8000934e + 80000a64: 00000000 .word 0x00000000 + 80000a68: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x5ae262f1dbdc8176 + 80000a6c: 00053183 ld x3,0(x10) + 80000a70: 00850513 addi x10,x10,8 + +0000000080000a74 : +Zksh_sm3p0_cg_cp_rd_b26: + sm3p0 x26, x3 # perform operation + 80000a74: 10819d13 sm3p0 x26,x3 + # Check if x26 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x26, Zksh_sm3p0_cg_cp_rd_b26, Zksh_sm3p0_cg_cp_rd_b26_str) + 80000a78: 00093203 ld x4,0(x18) + 80000a7c: 01a20c63 beq x4,x26,80000a94 + 80000a80: 541012ef jal x5,800027c0 + 80000a84: 80000a74 .word 0x80000a74 + 80000a88: 00000000 .word 0x00000000 + 80000a8c: 80009381 .word 0x80009381 + 80000a90: 00000000 .word 0x00000000 + 80000a94: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x83baf82592b661fc + 80000a98: 00053303 ld x6,0(x10) + 80000a9c: 00850513 addi x10,x10,8 + +0000000080000aa0 : +Zksh_sm3p0_cg_cp_rd_b27: + sm3p0 x27, x6 # perform operation + 80000aa0: 10831d93 sm3p0 x27,x6 + # Check if x27 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x27, Zksh_sm3p0_cg_cp_rd_b27, Zksh_sm3p0_cg_cp_rd_b27_str) + 80000aa4: 00093203 ld x4,0(x18) + 80000aa8: 01b20c63 beq x4,x27,80000ac0 + 80000aac: 515012ef jal x5,800027c0 + 80000ab0: 80000aa0 .word 0x80000aa0 + 80000ab4: 00000000 .word 0x00000000 + 80000ab8: 800093b4 .word 0x800093b4 + 80000abc: 00000000 .word 0x00000000 + 80000ac0: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x17) # load rs1: x17 = 0x2166ad9602ab0323 + 80000ac4: 00053883 ld x17,0(x10) + 80000ac8: 00850513 addi x10,x10,8 + +0000000080000acc : +Zksh_sm3p0_cg_cp_rd_b28: + sm3p0 x28, x17 # perform operation + 80000acc: 10889e13 sm3p0 x28,x17 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zksh_sm3p0_cg_cp_rd_b28, Zksh_sm3p0_cg_cp_rd_b28_str) + 80000ad0: 00093203 ld x4,0(x18) + 80000ad4: 01c20c63 beq x4,x28,80000aec + 80000ad8: 4e9012ef jal x5,800027c0 + 80000adc: 80000acc .word 0x80000acc + 80000ae0: 00000000 .word 0x00000000 + 80000ae4: 800093e7 .word 0x800093e7 + 80000ae8: 00000000 .word 0x00000000 + 80000aec: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0xcba5c8eaf03d0c26 + 80000af0: 00053083 ld x1,0(x10) + 80000af4: 00850513 addi x10,x10,8 + +0000000080000af8 : +Zksh_sm3p0_cg_cp_rd_b29: + sm3p0 x29, x1 # perform operation + 80000af8: 10809e93 sm3p0 x29,x1 + # Check if x29 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x29, Zksh_sm3p0_cg_cp_rd_b29, Zksh_sm3p0_cg_cp_rd_b29_str) + 80000afc: 00093203 ld x4,0(x18) + 80000b00: 01d20c63 beq x4,x29,80000b18 + 80000b04: 4bd012ef jal x5,800027c0 + 80000b08: 80000af8 .word 0x80000af8 + 80000b0c: 00000000 .word 0x00000000 + 80000b10: 8000941a .word 0x8000941a + 80000b14: 00000000 .word 0x00000000 + 80000b18: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xac702739c8bca5b2 + 80000b1c: 00053303 ld x6,0(x10) + 80000b20: 00850513 addi x10,x10,8 + +0000000080000b24 : +Zksh_sm3p0_cg_cp_rd_b30: + sm3p0 x30, x6 # perform operation + 80000b24: 10831f13 sm3p0 x30,x6 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zksh_sm3p0_cg_cp_rd_b30, Zksh_sm3p0_cg_cp_rd_b30_str) + 80000b28: 00093203 ld x4,0(x18) + 80000b2c: 01e20c63 beq x4,x30,80000b44 + 80000b30: 491012ef jal x5,800027c0 + 80000b34: 80000b24 .word 0x80000b24 + 80000b38: 00000000 .word 0x00000000 + 80000b3c: 8000944d .word 0x8000944d + 80000b40: 00000000 .word 0x00000000 + 80000b44: 00890913 addi x18,x18,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xe5ae69530eb81262 + 80000b48: 00053103 ld x2,0(x10) + 80000b4c: 00850513 addi x10,x10,8 + +0000000080000b50 : +Zksh_sm3p0_cg_cp_rd_b31: + sm3p0 x31, x2 # perform operation + 80000b50: 10811f93 sm3p0 x31,x2 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zksh_sm3p0_cg_cp_rd_b31, Zksh_sm3p0_cg_cp_rd_b31_str) + 80000b54: 00093203 ld x4,0(x18) + 80000b58: 01f20c63 beq x4,x31,80000b70 + 80000b5c: 465012ef jal x5,800027c0 + 80000b60: 80000b50 .word 0x80000b50 + 80000b64: 00000000 .word 0x00000000 + 80000b68: 80009480 .word 0x80009480 + 80000b6c: 00000000 .word 0x00000000 + 80000b70: 00890913 addi x18,x18,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x19) # load rs1: x19 = 0x0000000000000000 + 80000b74: 00053983 ld x19,0(x10) + 80000b78: 00850513 addi x10,x10,8 + +0000000080000b7c : +Zksh_sm3p0_cg_cp_rs1_edges_0x0: + sm3p0 x12, x19 # perform operation + 80000b7c: 10899613 sm3p0 x12,x19 + # Check if x12 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x12, Zksh_sm3p0_cg_cp_rs1_edges_0x0, Zksh_sm3p0_cg_cp_rs1_edges_0x0_str) + 80000b80: 00093203 ld x4,0(x18) + 80000b84: 00c20c63 beq x4,x12,80000b9c + 80000b88: 439012ef jal x5,800027c0 + 80000b8c: 80000b7c .word 0x80000b7c + 80000b90: 00000000 .word 0x00000000 + 80000b94: 800094b3 .word 0x800094b3 + 80000b98: 00000000 .word 0x00000000 + 80000b9c: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0x0000000000000001 + 80000ba0: 00053103 ld x2,0(x10) + 80000ba4: 00850513 addi x10,x10,8 + +0000000080000ba8 : +Zksh_sm3p0_cg_cp_rs1_edges_0x1: + sm3p0 x30, x2 # perform operation + 80000ba8: 10811f13 sm3p0 x30,x2 + # Check if x30 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x30, Zksh_sm3p0_cg_cp_rs1_edges_0x1, Zksh_sm3p0_cg_cp_rs1_edges_0x1_str) + 80000bac: 00093203 ld x4,0(x18) + 80000bb0: 01e20c63 beq x4,x30,80000bc8 + 80000bb4: 40d012ef jal x5,800027c0 + 80000bb8: 80000ba8 .word 0x80000ba8 + 80000bbc: 00000000 .word 0x00000000 + 80000bc0: 800094ed .word 0x800094ed + 80000bc4: 00000000 .word 0x00000000 + 80000bc8: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x0000000000000002 + 80000bcc: 00053803 ld x16,0(x10) + 80000bd0: 00850513 addi x10,x10,8 + +0000000080000bd4 : +Zksh_sm3p0_cg_cp_rs1_edges_0x2: + sm3p0 x11, x16 # perform operation + 80000bd4: 10881593 sm3p0 x11,x16 + # Check if x11 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x11, Zksh_sm3p0_cg_cp_rs1_edges_0x2, Zksh_sm3p0_cg_cp_rs1_edges_0x2_str) + 80000bd8: 00093203 ld x4,0(x18) + 80000bdc: 00b20c63 beq x4,x11,80000bf4 + 80000be0: 3e1012ef jal x5,800027c0 + 80000be4: 80000bd4 .word 0x80000bd4 + 80000be8: 00000000 .word 0x00000000 + 80000bec: 80009527 .word 0x80009527 + 80000bf0: 00000000 .word 0x00000000 + 80000bf4: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x10, x16) # load rs1: x16 = 0x8000000000000000 + 80000bf8: 00053803 ld x16,0(x10) + 80000bfc: 00850513 addi x10,x10,8 + +0000000080000c00 : +Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000000: + sm3p0 x7, x16 # perform operation + 80000c00: 10881393 sm3p0 x7,x16 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000000, Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c04: 00093203 ld x4,0(x18) + 80000c08: 00720c63 beq x4,x7,80000c20 + 80000c0c: 3b5012ef jal x5,800027c0 + 80000c10: 80000c00 .word 0x80000c00 + 80000c14: 00000000 .word 0x00000000 + 80000c18: 80009561 .word 0x80009561 + 80000c1c: 00000000 .word 0x00000000 + 80000c20: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x8000000000000001 + 80000c24: 00053083 ld x1,0(x10) + 80000c28: 00850513 addi x10,x10,8 + +0000000080000c2c : +Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000001: + sm3p0 x7, x1 # perform operation + 80000c2c: 10809393 sm3p0 x7,x1 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000001, Zksh_sm3p0_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c30: 00093203 ld x4,0(x18) + 80000c34: 00720c63 beq x4,x7,80000c4c + 80000c38: 389012ef jal x5,800027c0 + 80000c3c: 80000c2c .word 0x80000c2c + 80000c40: 00000000 .word 0x00000000 + 80000c44: 800095aa .word 0x800095aa + 80000c48: 00000000 .word 0x00000000 + 80000c4c: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x12) # load rs1: x12 = 0x7fffffffffffffff + 80000c50: 00053603 ld x12,0(x10) + 80000c54: 00850513 addi x10,x10,8 + +0000000080000c58 : +Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffffffffffff: + sm3p0 x1, x12 # perform operation + 80000c58: 10861093 sm3p0 x1,x12 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffffffffffff, Zksh_sm3p0_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c5c: 00093203 ld x4,0(x18) + 80000c60: 00120c63 beq x4,x1,80000c78 + 80000c64: 35d012ef jal x5,800027c0 + 80000c68: 80000c58 .word 0x80000c58 + 80000c6c: 00000000 .word 0x00000000 + 80000c70: 800095f3 .word 0x800095f3 + 80000c74: 00000000 .word 0x00000000 + 80000c78: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x7ffffffffffffffe + 80000c7c: 00053d03 ld x26,0(x10) + 80000c80: 00850513 addi x10,x10,8 + +0000000080000c84 : +Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffffffffffe: + sm3p0 x9, x26 # perform operation + 80000c84: 108d1493 sm3p0 x9,x26 + # Check if x9 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x9, Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffffffffffe, Zksh_sm3p0_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c88: 00093203 ld x4,0(x18) + 80000c8c: 00920c63 beq x4,x9,80000ca4 + 80000c90: 331012ef jal x5,800027c0 + 80000c94: 80000c84 .word 0x80000c84 + 80000c98: 00000000 .word 0x00000000 + 80000c9c: 8000963c .word 0x8000963c + 80000ca0: 00000000 .word 0x00000000 + 80000ca4: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xffffffffffffffff + 80000ca8: 00053a83 ld x21,0(x10) + 80000cac: 00850513 addi x10,x10,8 + +0000000080000cb0 : +Zksh_sm3p0_cg_cp_rs1_edges_0xffffffffffffffff: + sm3p0 x17, x21 # perform operation + 80000cb0: 108a9893 sm3p0 x17,x21 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffffffffffff, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cb4: 00093203 ld x4,0(x18) + 80000cb8: 01120c63 beq x4,x17,80000cd0 + 80000cbc: 305012ef jal x5,800027c0 + 80000cc0: 80000cb0 .word 0x80000cb0 + 80000cc4: 00000000 .word 0x00000000 + 80000cc8: 80009685 .word 0x80009685 + 80000ccc: 00000000 .word 0x00000000 + 80000cd0: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0xfffffffffffffffe + 80000cd4: 00053303 ld x6,0(x10) + 80000cd8: 00850513 addi x10,x10,8 + +0000000080000cdc : +Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffffffffffe: + sm3p0 x22, x6 # perform operation + 80000cdc: 10831b13 sm3p0 x22,x6 + # Check if x22 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x22, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffffffffffe, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000ce0: 00093203 ld x4,0(x18) + 80000ce4: 01620c63 beq x4,x22,80000cfc + 80000ce8: 2d9012ef jal x5,800027c0 + 80000cec: 80000cdc .word 0x80000cdc + 80000cf0: 00000000 .word 0x00000000 + 80000cf4: 800096ce .word 0x800096ce + 80000cf8: 00000000 .word 0x00000000 + 80000cfc: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x5bbc887763ae86f2 + 80000d00: 00053083 ld x1,0(x10) + 80000d04: 00850513 addi x10,x10,8 + +0000000080000d08 : +Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sm3p0 x2, x1 # perform operation + 80000d08: 10809113 sm3p0 x2,x1 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zksh_sm3p0_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d0c: 00093203 ld x4,0(x18) + 80000d10: 00220c63 beq x4,x2,80000d28 + 80000d14: 2ad012ef jal x5,800027c0 + 80000d18: 80000d08 .word 0x80000d08 + 80000d1c: 00000000 .word 0x00000000 + 80000d20: 80009717 .word 0x80009717 + 80000d24: 00000000 .word 0x00000000 + 80000d28: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x10, x13) # load rs1: x13 = 0xaaaaaaaaaaaaaaaa + 80000d2c: 00053683 ld x13,0(x10) + 80000d30: 00850513 addi x10,x10,8 + +0000000080000d34 : +Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sm3p0 x31, x13 # perform operation + 80000d34: 10869f93 sm3p0 x31,x13 + # Check if x31 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x31, Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zksh_sm3p0_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d38: 00093203 ld x4,0(x18) + 80000d3c: 01f20c63 beq x4,x31,80000d54 + 80000d40: 281012ef jal x5,800027c0 + 80000d44: 80000d34 .word 0x80000d34 + 80000d48: 00000000 .word 0x00000000 + 80000d4c: 80009760 .word 0x80009760 + 80000d50: 00000000 .word 0x00000000 + 80000d54: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x5555555555555555 + 80000d58: 00053c83 ld x25,0(x10) + 80000d5c: 00850513 addi x10,x10,8 + +0000000080000d60 : +Zksh_sm3p0_cg_cp_rs1_edges_0x5555555555555555: + sm3p0 x20, x25 # perform operation + 80000d60: 108c9a13 sm3p0 x20,x25 + # Check if x20 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x20, Zksh_sm3p0_cg_cp_rs1_edges_0x5555555555555555, Zksh_sm3p0_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d64: 00093203 ld x4,0(x18) + 80000d68: 01420c63 beq x4,x20,80000d80 + 80000d6c: 255012ef jal x5,800027c0 + 80000d70: 80000d60 .word 0x80000d60 + 80000d74: 00000000 .word 0x00000000 + 80000d78: 800097a9 .word 0x800097a9 + 80000d7c: 00000000 .word 0x00000000 + 80000d80: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x00000000ffffffff + 80000d84: 00053b03 ld x22,0(x10) + 80000d88: 00850513 addi x10,x10,8 + +0000000080000d8c : +Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff: + sm3p0 x20, x22 # perform operation + 80000d8c: 108b1a13 sm3p0 x20,x22 + # Check if x20 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x20, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff, Zksh_sm3p0_cg_cp_rs1_edges_0xffffffff_str) + 80000d90: 00093203 ld x4,0(x18) + 80000d94: 01420c63 beq x4,x20,80000dac + 80000d98: 229012ef jal x5,800027c0 + 80000d9c: 80000d8c .word 0x80000d8c + 80000da0: 00000000 .word 0x00000000 + 80000da4: 800097f2 .word 0x800097f2 + 80000da8: 00000000 .word 0x00000000 + 80000dac: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0x00000000fffffffe + 80000db0: 00053d83 ld x27,0(x10) + 80000db4: 00850513 addi x10,x10,8 + +0000000080000db8 : +Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe: + sm3p0 x28, x27 # perform operation + 80000db8: 108d9e13 sm3p0 x28,x27 + # Check if x28 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x28, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe, Zksh_sm3p0_cg_cp_rs1_edges_0xfffffffe_str) + 80000dbc: 00093203 ld x4,0(x18) + 80000dc0: 01c20c63 beq x4,x28,80000dd8 + 80000dc4: 1fd012ef jal x5,800027c0 + 80000dc8: 80000db8 .word 0x80000db8 + 80000dcc: 00000000 .word 0x00000000 + 80000dd0: 80009833 .word 0x80009833 + 80000dd4: 00000000 .word 0x00000000 + 80000dd8: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x10, x20) # load rs1: x20 = 0x0000000100000000 + 80000ddc: 00053a03 ld x20,0(x10) + 80000de0: 00850513 addi x10,x10,8 + +0000000080000de4 : +Zksh_sm3p0_cg_cp_rs1_edges_0x100000000: + sm3p0 x1, x20 # perform operation + 80000de4: 108a1093 sm3p0 x1,x20 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksh_sm3p0_cg_cp_rs1_edges_0x100000000, Zksh_sm3p0_cg_cp_rs1_edges_0x100000000_str) + 80000de8: 00093203 ld x4,0(x18) + 80000dec: 00120c63 beq x4,x1,80000e04 + 80000df0: 1d1012ef jal x5,800027c0 + 80000df4: 80000de4 .word 0x80000de4 + 80000df8: 00000000 .word 0x00000000 + 80000dfc: 80009874 .word 0x80009874 + 80000e00: 00000000 .word 0x00000000 + 80000e04: 00890913 addi x18,x18,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x0000000100000001 + 80000e08: 00053c83 ld x25,0(x10) + 80000e0c: 00850513 addi x10,x10,8 + +0000000080000e10 : +Zksh_sm3p0_cg_cp_rs1_edges_0x100000001: + sm3p0 x7, x25 # perform operation + 80000e10: 108c9393 sm3p0 x7,x25 + # Check if x7 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x7, Zksh_sm3p0_cg_cp_rs1_edges_0x100000001, Zksh_sm3p0_cg_cp_rs1_edges_0x100000001_str) + 80000e14: 00093203 ld x4,0(x18) + 80000e18: 00720c63 beq x4,x7,80000e30 + 80000e1c: 1a5012ef jal x5,800027c0 + 80000e20: 80000e10 .word 0x80000e10 + 80000e24: 00000000 .word 0x00000000 + 80000e28: 800098b6 .word 0x800098b6 + 80000e2c: 00000000 .word 0x00000000 + 80000e30: 00890913 addi x18,x18,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x23fd5cc0ce1aea1b + 80000e34: 00053003 ld x0,0(x10) + 80000e38: 00850513 addi x10,x10,8 + +0000000080000e3c : +Zksh_sm3p0_cg_cmp_rd_rs1_b0: + sm3p0 x0, x0 # perform operation + 80000e3c: 10801013 sm3p0 x0,x0 + # Check if x0 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x0, Zksh_sm3p0_cg_cmp_rd_rs1_b0, Zksh_sm3p0_cg_cmp_rd_rs1_b0_str) + 80000e40: 00093203 ld x4,0(x18) + 80000e44: 00020c63 beq x4,x0,80000e5c + 80000e48: 179012ef jal x5,800027c0 + 80000e4c: 80000e3c .word 0x80000e3c + 80000e50: 00000000 .word 0x00000000 + 80000e54: 800098f8 .word 0x800098f8 + 80000e58: 00000000 .word 0x00000000 + 80000e5c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x1) # load rs1: x1 = 0x330bc7449b1642b1 + 80000e60: 00053083 ld x1,0(x10) + 80000e64: 00850513 addi x10,x10,8 + +0000000080000e68 : +Zksh_sm3p0_cg_cmp_rd_rs1_b1: + sm3p0 x1, x1 # perform operation + 80000e68: 10809093 sm3p0 x1,x1 + # Check if x1 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x1, Zksh_sm3p0_cg_cmp_rd_rs1_b1, Zksh_sm3p0_cg_cmp_rd_rs1_b1_str) + 80000e6c: 00093203 ld x4,0(x18) + 80000e70: 00120c63 beq x4,x1,80000e88 + 80000e74: 14d012ef jal x5,800027c0 + 80000e78: 80000e68 .word 0x80000e68 + 80000e7c: 00000000 .word 0x00000000 + 80000e80: 8000992f .word 0x8000992f + 80000e84: 00000000 .word 0x00000000 + 80000e88: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x2) # load rs1: x2 = 0xaef8e6e21be52bde + 80000e8c: 00053103 ld x2,0(x10) + 80000e90: 00850513 addi x10,x10,8 + +0000000080000e94 : +Zksh_sm3p0_cg_cmp_rd_rs1_b2: + sm3p0 x2, x2 # perform operation + 80000e94: 10811113 sm3p0 x2,x2 + # Check if x2 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x2, Zksh_sm3p0_cg_cmp_rd_rs1_b2, Zksh_sm3p0_cg_cmp_rd_rs1_b2_str) + 80000e98: 00093203 ld x4,0(x18) + 80000e9c: 00220c63 beq x4,x2,80000eb4 + 80000ea0: 121012ef jal x5,800027c0 + 80000ea4: 80000e94 .word 0x80000e94 + 80000ea8: 00000000 .word 0x00000000 + 80000eac: 80009966 .word 0x80009966 + 80000eb0: 00000000 .word 0x00000000 + 80000eb4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x3) # load rs1: x3 = 0x8539cc9b87215c1c + 80000eb8: 00053183 ld x3,0(x10) + 80000ebc: 00850513 addi x10,x10,8 + +0000000080000ec0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b3: + sm3p0 x3, x3 # perform operation + 80000ec0: 10819193 sm3p0 x3,x3 + # Check if x3 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x3, Zksh_sm3p0_cg_cmp_rd_rs1_b3, Zksh_sm3p0_cg_cmp_rd_rs1_b3_str) + 80000ec4: 00093203 ld x4,0(x18) + 80000ec8: 00320c63 beq x4,x3,80000ee0 + 80000ecc: 0f5012ef jal x5,800027c0 + 80000ed0: 80000ec0 .word 0x80000ec0 + 80000ed4: 00000000 .word 0x00000000 + 80000ed8: 8000999d .word 0x8000999d + 80000edc: 00000000 .word 0x00000000 + 80000ee0: 00890913 addi x18,x18,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000ee4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000ee8: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x4) # load rs1: x4 = 0x84f512f00bd42d2b + 80000eec: 00053203 ld x4,0(x10) + 80000ef0: 00850513 addi x10,x10,8 + +0000000080000ef4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b4: + sm3p0 x4, x4 # perform operation + 80000ef4: 10821213 sm3p0 x4,x4 + # Check if x4 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x4, Zksh_sm3p0_cg_cmp_rd_rs1_b4, Zksh_sm3p0_cg_cmp_rd_rs1_b4_str) + 80000ef8: 00093683 ld x13,0(x18) + 80000efc: 00468c63 beq x13,x4,80000f14 + 80000f00: 1010176f jal x14,80002800 + 80000f04: 80000ef4 .word 0x80000ef4 + 80000f08: 00000000 .word 0x00000000 + 80000f0c: 800099d4 .word 0x800099d4 + 80000f10: 00000000 .word 0x00000000 + 80000f14: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x5) # load rs1: x5 = 0x76ac1ed3467b280a + 80000f18: 00053283 ld x5,0(x10) + 80000f1c: 00850513 addi x10,x10,8 + +0000000080000f20 : +Zksh_sm3p0_cg_cmp_rd_rs1_b5: + sm3p0 x5, x5 # perform operation + 80000f20: 10829293 sm3p0 x5,x5 + # Check if x5 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x5, Zksh_sm3p0_cg_cmp_rd_rs1_b5, Zksh_sm3p0_cg_cmp_rd_rs1_b5_str) + 80000f24: 00093683 ld x13,0(x18) + 80000f28: 00568c63 beq x13,x5,80000f40 + 80000f2c: 0d50176f jal x14,80002800 + 80000f30: 80000f20 .word 0x80000f20 + 80000f34: 00000000 .word 0x00000000 + 80000f38: 80009a0b .word 0x80009a0b + 80000f3c: 00000000 .word 0x00000000 + 80000f40: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x881a812cec916828 + 80000f44: 00053303 ld x6,0(x10) + 80000f48: 00850513 addi x10,x10,8 + +0000000080000f4c : +Zksh_sm3p0_cg_cmp_rd_rs1_b6: + sm3p0 x6, x6 # perform operation + 80000f4c: 10831313 sm3p0 x6,x6 + # Check if x6 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x6, Zksh_sm3p0_cg_cmp_rd_rs1_b6, Zksh_sm3p0_cg_cmp_rd_rs1_b6_str) + 80000f50: 00093683 ld x13,0(x18) + 80000f54: 00668c63 beq x13,x6,80000f6c + 80000f58: 0a90176f jal x14,80002800 + 80000f5c: 80000f4c .word 0x80000f4c + 80000f60: 00000000 .word 0x00000000 + 80000f64: 80009a42 .word 0x80009a42 + 80000f68: 00000000 .word 0x00000000 + 80000f6c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0xe1f8bc3e873d0010 + 80000f70: 00053383 ld x7,0(x10) + 80000f74: 00850513 addi x10,x10,8 + +0000000080000f78 : +Zksh_sm3p0_cg_cmp_rd_rs1_b7: + sm3p0 x7, x7 # perform operation + 80000f78: 10839393 sm3p0 x7,x7 + # Check if x7 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x7, Zksh_sm3p0_cg_cmp_rd_rs1_b7, Zksh_sm3p0_cg_cmp_rd_rs1_b7_str) + 80000f7c: 00093683 ld x13,0(x18) + 80000f80: 00768c63 beq x13,x7,80000f98 + 80000f84: 07d0176f jal x14,80002800 + 80000f88: 80000f78 .word 0x80000f78 + 80000f8c: 00000000 .word 0x00000000 + 80000f90: 80009a79 .word 0x80009a79 + 80000f94: 00000000 .word 0x00000000 + 80000f98: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x8) # load rs1: x8 = 0x77713165fa7c433b + 80000f9c: 00053403 ld x8,0(x10) + 80000fa0: 00850513 addi x10,x10,8 + +0000000080000fa4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b8: + sm3p0 x8, x8 # perform operation + 80000fa4: 10841413 sm3p0 x8,x8 + # Check if x8 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x8, Zksh_sm3p0_cg_cmp_rd_rs1_b8, Zksh_sm3p0_cg_cmp_rd_rs1_b8_str) + 80000fa8: 00093683 ld x13,0(x18) + 80000fac: 00868c63 beq x13,x8,80000fc4 + 80000fb0: 0510176f jal x14,80002800 + 80000fb4: 80000fa4 .word 0x80000fa4 + 80000fb8: 00000000 .word 0x00000000 + 80000fbc: 80009ab0 .word 0x80009ab0 + 80000fc0: 00000000 .word 0x00000000 + 80000fc4: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0x1a50980b7cf5c358 + 80000fc8: 00053483 ld x9,0(x10) + 80000fcc: 00850513 addi x10,x10,8 + +0000000080000fd0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b9: + sm3p0 x9, x9 # perform operation + 80000fd0: 10849493 sm3p0 x9,x9 + # Check if x9 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x9, Zksh_sm3p0_cg_cmp_rd_rs1_b9, Zksh_sm3p0_cg_cmp_rd_rs1_b9_str) + 80000fd4: 00093683 ld x13,0(x18) + 80000fd8: 00968c63 beq x13,x9,80000ff0 + 80000fdc: 0250176f jal x14,80002800 + 80000fe0: 80000fd0 .word 0x80000fd0 + 80000fe4: 00000000 .word 0x00000000 + 80000fe8: 80009ae7 .word 0x80009ae7 + 80000fec: 00000000 .word 0x00000000 + 80000ff0: 00890913 addi x18,x18,8 + + mv x20, x10 # switch data pointer register to avoid conflict with test + 80000ff4: 00050a13 addi x20,x10,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x20, x10) # load rs1: x10 = 0x8faf3fcdfab08dba + 80000ff8: 000a3503 ld x10,0(x20) + 80000ffc: 008a0a13 addi x20,x20,8 + +0000000080001000 : +Zksh_sm3p0_cg_cmp_rd_rs1_b10: + sm3p0 x10, x10 # perform operation + 80001000: 10851513 sm3p0 x10,x10 + # Check if x10 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x10, Zksh_sm3p0_cg_cmp_rd_rs1_b10, Zksh_sm3p0_cg_cmp_rd_rs1_b10_str) + 80001004: 00093683 ld x13,0(x18) + 80001008: 00a68c63 beq x13,x10,80001020 + 8000100c: 7f40176f jal x14,80002800 + 80001010: 80001000 .word 0x80001000 + 80001014: 00000000 .word 0x00000000 + 80001018: 80009b1e .word 0x80009b1e + 8000101c: 00000000 .word 0x00000000 + 80001020: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x20, x11) # load rs1: x11 = 0x7655f81abc18d70b + 80001024: 000a3583 ld x11,0(x20) + 80001028: 008a0a13 addi x20,x20,8 + +000000008000102c : +Zksh_sm3p0_cg_cmp_rd_rs1_b11: + sm3p0 x11, x11 # perform operation + 8000102c: 10859593 sm3p0 x11,x11 + # Check if x11 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x11, Zksh_sm3p0_cg_cmp_rd_rs1_b11, Zksh_sm3p0_cg_cmp_rd_rs1_b11_str) + 80001030: 00093683 ld x13,0(x18) + 80001034: 00b68c63 beq x13,x11,8000104c + 80001038: 7c80176f jal x14,80002800 + 8000103c: 8000102c .word 0x8000102c + 80001040: 00000000 .word 0x00000000 + 80001044: 80009b56 .word 0x80009b56 + 80001048: 00000000 .word 0x00000000 + 8000104c: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x20, x12) # load rs1: x12 = 0x233e869cb19e9f0f + 80001050: 000a3603 ld x12,0(x20) + 80001054: 008a0a13 addi x20,x20,8 + +0000000080001058 : +Zksh_sm3p0_cg_cmp_rd_rs1_b12: + sm3p0 x12, x12 # perform operation + 80001058: 10861613 sm3p0 x12,x12 + # Check if x12 contains the expected result. x18 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x18, x14, x13, x12, Zksh_sm3p0_cg_cmp_rd_rs1_b12, Zksh_sm3p0_cg_cmp_rd_rs1_b12_str) + 8000105c: 00093683 ld x13,0(x18) + 80001060: 00c68c63 beq x13,x12,80001078 + 80001064: 79c0176f jal x14,80002800 + 80001068: 80001058 .word 0x80001058 + 8000106c: 00000000 .word 0x00000000 + 80001070: 80009b8e .word 0x80009b8e + 80001074: 00000000 .word 0x00000000 + 80001078: 00890913 addi x18,x18,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000107c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001080: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x20, x13) # load rs1: x13 = 0xaa261f3589264962 + 80001084: 000a3683 ld x13,0(x20) + 80001088: 008a0a13 addi x20,x20,8 + +000000008000108c : +Zksh_sm3p0_cg_cmp_rd_rs1_b13: + sm3p0 x13, x13 # perform operation + 8000108c: 10869693 sm3p0 x13,x13 + # Check if x13 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x13, Zksh_sm3p0_cg_cmp_rd_rs1_b13, Zksh_sm3p0_cg_cmp_rd_rs1_b13_str) + 80001090: 00093203 ld x4,0(x18) + 80001094: 00d20c63 beq x4,x13,800010ac + 80001098: 728012ef jal x5,800027c0 + 8000109c: 8000108c .word 0x8000108c + 800010a0: 00000000 .word 0x00000000 + 800010a4: 80009bc6 .word 0x80009bc6 + 800010a8: 00000000 .word 0x00000000 + 800010ac: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x20, x14) # load rs1: x14 = 0x6eb77f4556031f0c + 800010b0: 000a3703 ld x14,0(x20) + 800010b4: 008a0a13 addi x20,x20,8 + +00000000800010b8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b14: + sm3p0 x14, x14 # perform operation + 800010b8: 10871713 sm3p0 x14,x14 + # Check if x14 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x14, Zksh_sm3p0_cg_cmp_rd_rs1_b14, Zksh_sm3p0_cg_cmp_rd_rs1_b14_str) + 800010bc: 00093203 ld x4,0(x18) + 800010c0: 00e20c63 beq x4,x14,800010d8 + 800010c4: 6fc012ef jal x5,800027c0 + 800010c8: 800010b8 .word 0x800010b8 + 800010cc: 00000000 .word 0x00000000 + 800010d0: 80009bfe .word 0x80009bfe + 800010d4: 00000000 .word 0x00000000 + 800010d8: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x20, x15) # load rs1: x15 = 0x5aa0f5c44e3ab0dd + 800010dc: 000a3783 ld x15,0(x20) + 800010e0: 008a0a13 addi x20,x20,8 + +00000000800010e4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b15: + sm3p0 x15, x15 # perform operation + 800010e4: 10879793 sm3p0 x15,x15 + # Check if x15 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x15, Zksh_sm3p0_cg_cmp_rd_rs1_b15, Zksh_sm3p0_cg_cmp_rd_rs1_b15_str) + 800010e8: 00093203 ld x4,0(x18) + 800010ec: 00f20c63 beq x4,x15,80001104 + 800010f0: 6d0012ef jal x5,800027c0 + 800010f4: 800010e4 .word 0x800010e4 + 800010f8: 00000000 .word 0x00000000 + 800010fc: 80009c36 .word 0x80009c36 + 80001100: 00000000 .word 0x00000000 + 80001104: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x20, x16) # load rs1: x16 = 0x8e39b884876dcc3f + 80001108: 000a3803 ld x16,0(x20) + 8000110c: 008a0a13 addi x20,x20,8 + +0000000080001110 : +Zksh_sm3p0_cg_cmp_rd_rs1_b16: + sm3p0 x16, x16 # perform operation + 80001110: 10881813 sm3p0 x16,x16 + # Check if x16 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x16, Zksh_sm3p0_cg_cmp_rd_rs1_b16, Zksh_sm3p0_cg_cmp_rd_rs1_b16_str) + 80001114: 00093203 ld x4,0(x18) + 80001118: 01020c63 beq x4,x16,80001130 + 8000111c: 6a4012ef jal x5,800027c0 + 80001120: 80001110 .word 0x80001110 + 80001124: 00000000 .word 0x00000000 + 80001128: 80009c6e .word 0x80009c6e + 8000112c: 00000000 .word 0x00000000 + 80001130: 00890913 addi x18,x18,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x20, x17) # load rs1: x17 = 0x7bdec081a3196328 + 80001134: 000a3883 ld x17,0(x20) + 80001138: 008a0a13 addi x20,x20,8 + +000000008000113c : +Zksh_sm3p0_cg_cmp_rd_rs1_b17: + sm3p0 x17, x17 # perform operation + 8000113c: 10889893 sm3p0 x17,x17 + # Check if x17 contains the expected result. x18 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x18, x5, x4, x17, Zksh_sm3p0_cg_cmp_rd_rs1_b17, Zksh_sm3p0_cg_cmp_rd_rs1_b17_str) + 80001140: 00093203 ld x4,0(x18) + 80001144: 01120c63 beq x4,x17,8000115c + 80001148: 678012ef jal x5,800027c0 + 8000114c: 8000113c .word 0x8000113c + 80001150: 00000000 .word 0x00000000 + 80001154: 80009ca6 .word 0x80009ca6 + 80001158: 00000000 .word 0x00000000 + 8000115c: 00890913 addi x18,x18,8 + + mv x15, x18 # switch signature pointer register to avoid conflict with test + 80001160: 00090793 addi x15,x18,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x20, x18) # load rs1: x18 = 0xd47389f6fde80095 + 80001164: 000a3903 ld x18,0(x20) + 80001168: 008a0a13 addi x20,x20,8 + +000000008000116c : +Zksh_sm3p0_cg_cmp_rd_rs1_b18: + sm3p0 x18, x18 # perform operation + 8000116c: 10891913 sm3p0 x18,x18 + # Check if x18 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x18, Zksh_sm3p0_cg_cmp_rd_rs1_b18, Zksh_sm3p0_cg_cmp_rd_rs1_b18_str) + 80001170: 0007b203 ld x4,0(x15) + 80001174: 01220c63 beq x4,x18,8000118c + 80001178: 648012ef jal x5,800027c0 + 8000117c: 8000116c .word 0x8000116c + 80001180: 00000000 .word 0x00000000 + 80001184: 80009cde .word 0x80009cde + 80001188: 00000000 .word 0x00000000 + 8000118c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x20, x19) # load rs1: x19 = 0xdaba689a7f9aa184 + 80001190: 000a3983 ld x19,0(x20) + 80001194: 008a0a13 addi x20,x20,8 + +0000000080001198 : +Zksh_sm3p0_cg_cmp_rd_rs1_b19: + sm3p0 x19, x19 # perform operation + 80001198: 10899993 sm3p0 x19,x19 + # Check if x19 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x19, Zksh_sm3p0_cg_cmp_rd_rs1_b19, Zksh_sm3p0_cg_cmp_rd_rs1_b19_str) + 8000119c: 0007b203 ld x4,0(x15) + 800011a0: 01320c63 beq x4,x19,800011b8 + 800011a4: 61c012ef jal x5,800027c0 + 800011a8: 80001198 .word 0x80001198 + 800011ac: 00000000 .word 0x00000000 + 800011b0: 80009d16 .word 0x80009d16 + 800011b4: 00000000 .word 0x00000000 + 800011b8: 00878793 addi x15,x15,8 + + mv x25, x20 # switch data pointer register to avoid conflict with test + 800011bc: 000a0c93 addi x25,x20,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x25, x20) # load rs1: x20 = 0x03a7c8cbe29bfbb8 + 800011c0: 000cba03 ld x20,0(x25) + 800011c4: 008c8c93 addi x25,x25,8 + +00000000800011c8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b20: + sm3p0 x20, x20 # perform operation + 800011c8: 108a1a13 sm3p0 x20,x20 + # Check if x20 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x20, Zksh_sm3p0_cg_cmp_rd_rs1_b20, Zksh_sm3p0_cg_cmp_rd_rs1_b20_str) + 800011cc: 0007b203 ld x4,0(x15) + 800011d0: 01420c63 beq x4,x20,800011e8 + 800011d4: 5ec012ef jal x5,800027c0 + 800011d8: 800011c8 .word 0x800011c8 + 800011dc: 00000000 .word 0x00000000 + 800011e0: 80009d4f .word 0x80009d4f + 800011e4: 00000000 .word 0x00000000 + 800011e8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x25, x21) # load rs1: x21 = 0x2b60d245e346228a + 800011ec: 000cba83 ld x21,0(x25) + 800011f0: 008c8c93 addi x25,x25,8 + +00000000800011f4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b21: + sm3p0 x21, x21 # perform operation + 800011f4: 108a9a93 sm3p0 x21,x21 + # Check if x21 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x21, Zksh_sm3p0_cg_cmp_rd_rs1_b21, Zksh_sm3p0_cg_cmp_rd_rs1_b21_str) + 800011f8: 0007b203 ld x4,0(x15) + 800011fc: 01520c63 beq x4,x21,80001214 + 80001200: 5c0012ef jal x5,800027c0 + 80001204: 800011f4 .word 0x800011f4 + 80001208: 00000000 .word 0x00000000 + 8000120c: 80009d88 .word 0x80009d88 + 80001210: 00000000 .word 0x00000000 + 80001214: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x25, x22) # load rs1: x22 = 0x2ebf45920160f7d6 + 80001218: 000cbb03 ld x22,0(x25) + 8000121c: 008c8c93 addi x25,x25,8 + +0000000080001220 : +Zksh_sm3p0_cg_cmp_rd_rs1_b22: + sm3p0 x22, x22 # perform operation + 80001220: 108b1b13 sm3p0 x22,x22 + # Check if x22 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x22, Zksh_sm3p0_cg_cmp_rd_rs1_b22, Zksh_sm3p0_cg_cmp_rd_rs1_b22_str) + 80001224: 0007b203 ld x4,0(x15) + 80001228: 01620c63 beq x4,x22,80001240 + 8000122c: 594012ef jal x5,800027c0 + 80001230: 80001220 .word 0x80001220 + 80001234: 00000000 .word 0x00000000 + 80001238: 80009dc1 .word 0x80009dc1 + 8000123c: 00000000 .word 0x00000000 + 80001240: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x25, x23) # load rs1: x23 = 0x8a5c37e8ceba264e + 80001244: 000cbb83 ld x23,0(x25) + 80001248: 008c8c93 addi x25,x25,8 + +000000008000124c : +Zksh_sm3p0_cg_cmp_rd_rs1_b23: + sm3p0 x23, x23 # perform operation + 8000124c: 108b9b93 sm3p0 x23,x23 + # Check if x23 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x23, Zksh_sm3p0_cg_cmp_rd_rs1_b23, Zksh_sm3p0_cg_cmp_rd_rs1_b23_str) + 80001250: 0007b203 ld x4,0(x15) + 80001254: 01720c63 beq x4,x23,8000126c + 80001258: 568012ef jal x5,800027c0 + 8000125c: 8000124c .word 0x8000124c + 80001260: 00000000 .word 0x00000000 + 80001264: 80009dfa .word 0x80009dfa + 80001268: 00000000 .word 0x00000000 + 8000126c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x25, x24) # load rs1: x24 = 0x1a040254897b2d87 + 80001270: 000cbc03 ld x24,0(x25) + 80001274: 008c8c93 addi x25,x25,8 + +0000000080001278 : +Zksh_sm3p0_cg_cmp_rd_rs1_b24: + sm3p0 x24, x24 # perform operation + 80001278: 108c1c13 sm3p0 x24,x24 + # Check if x24 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x24, Zksh_sm3p0_cg_cmp_rd_rs1_b24, Zksh_sm3p0_cg_cmp_rd_rs1_b24_str) + 8000127c: 0007b203 ld x4,0(x15) + 80001280: 01820c63 beq x4,x24,80001298 + 80001284: 53c012ef jal x5,800027c0 + 80001288: 80001278 .word 0x80001278 + 8000128c: 00000000 .word 0x00000000 + 80001290: 80009e33 .word 0x80009e33 + 80001294: 00000000 .word 0x00000000 + 80001298: 00878793 addi x15,x15,8 + + mv x18, x25 # switch data pointer register to avoid conflict with test + 8000129c: 000c8913 addi x18,x25,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x18, x25) # load rs1: x25 = 0xbbb72e59179ed500 + 800012a0: 00093c83 ld x25,0(x18) + 800012a4: 00890913 addi x18,x18,8 + +00000000800012a8 : +Zksh_sm3p0_cg_cmp_rd_rs1_b25: + sm3p0 x25, x25 # perform operation + 800012a8: 108c9c93 sm3p0 x25,x25 + # Check if x25 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x25, Zksh_sm3p0_cg_cmp_rd_rs1_b25, Zksh_sm3p0_cg_cmp_rd_rs1_b25_str) + 800012ac: 0007b203 ld x4,0(x15) + 800012b0: 01920c63 beq x4,x25,800012c8 + 800012b4: 50c012ef jal x5,800027c0 + 800012b8: 800012a8 .word 0x800012a8 + 800012bc: 00000000 .word 0x00000000 + 800012c0: 80009e6c .word 0x80009e6c + 800012c4: 00000000 .word 0x00000000 + 800012c8: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x18, x26) # load rs1: x26 = 0xc330973ed13ea717 + 800012cc: 00093d03 ld x26,0(x18) + 800012d0: 00890913 addi x18,x18,8 + +00000000800012d4 : +Zksh_sm3p0_cg_cmp_rd_rs1_b26: + sm3p0 x26, x26 # perform operation + 800012d4: 108d1d13 sm3p0 x26,x26 + # Check if x26 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x26, Zksh_sm3p0_cg_cmp_rd_rs1_b26, Zksh_sm3p0_cg_cmp_rd_rs1_b26_str) + 800012d8: 0007b203 ld x4,0(x15) + 800012dc: 01a20c63 beq x4,x26,800012f4 + 800012e0: 4e0012ef jal x5,800027c0 + 800012e4: 800012d4 .word 0x800012d4 + 800012e8: 00000000 .word 0x00000000 + 800012ec: 80009ea5 .word 0x80009ea5 + 800012f0: 00000000 .word 0x00000000 + 800012f4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x18, x27) # load rs1: x27 = 0x3f356542354e7243 + 800012f8: 00093d83 ld x27,0(x18) + 800012fc: 00890913 addi x18,x18,8 + +0000000080001300 : +Zksh_sm3p0_cg_cmp_rd_rs1_b27: + sm3p0 x27, x27 # perform operation + 80001300: 108d9d93 sm3p0 x27,x27 + # Check if x27 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x27, Zksh_sm3p0_cg_cmp_rd_rs1_b27, Zksh_sm3p0_cg_cmp_rd_rs1_b27_str) + 80001304: 0007b203 ld x4,0(x15) + 80001308: 01b20c63 beq x4,x27,80001320 + 8000130c: 4b4012ef jal x5,800027c0 + 80001310: 80001300 .word 0x80001300 + 80001314: 00000000 .word 0x00000000 + 80001318: 80009ede .word 0x80009ede + 8000131c: 00000000 .word 0x00000000 + 80001320: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x18, x28) # load rs1: x28 = 0xb321a123d1fb361b + 80001324: 00093e03 ld x28,0(x18) + 80001328: 00890913 addi x18,x18,8 + +000000008000132c : +Zksh_sm3p0_cg_cmp_rd_rs1_b28: + sm3p0 x28, x28 # perform operation + 8000132c: 108e1e13 sm3p0 x28,x28 + # Check if x28 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x28, Zksh_sm3p0_cg_cmp_rd_rs1_b28, Zksh_sm3p0_cg_cmp_rd_rs1_b28_str) + 80001330: 0007b203 ld x4,0(x15) + 80001334: 01c20c63 beq x4,x28,8000134c + 80001338: 488012ef jal x5,800027c0 + 8000133c: 8000132c .word 0x8000132c + 80001340: 00000000 .word 0x00000000 + 80001344: 80009f17 .word 0x80009f17 + 80001348: 00000000 .word 0x00000000 + 8000134c: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x18, x29) # load rs1: x29 = 0xf490a5bbbb7de652 + 80001350: 00093e83 ld x29,0(x18) + 80001354: 00890913 addi x18,x18,8 + +0000000080001358 : +Zksh_sm3p0_cg_cmp_rd_rs1_b29: + sm3p0 x29, x29 # perform operation + 80001358: 108e9e93 sm3p0 x29,x29 + # Check if x29 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x29, Zksh_sm3p0_cg_cmp_rd_rs1_b29, Zksh_sm3p0_cg_cmp_rd_rs1_b29_str) + 8000135c: 0007b203 ld x4,0(x15) + 80001360: 01d20c63 beq x4,x29,80001378 + 80001364: 45c012ef jal x5,800027c0 + 80001368: 80001358 .word 0x80001358 + 8000136c: 00000000 .word 0x00000000 + 80001370: 80009f50 .word 0x80009f50 + 80001374: 00000000 .word 0x00000000 + 80001378: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x18, x30) # load rs1: x30 = 0x864b384c97184420 + 8000137c: 00093f03 ld x30,0(x18) + 80001380: 00890913 addi x18,x18,8 + +0000000080001384 : +Zksh_sm3p0_cg_cmp_rd_rs1_b30: + sm3p0 x30, x30 # perform operation + 80001384: 108f1f13 sm3p0 x30,x30 + # Check if x30 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x30, Zksh_sm3p0_cg_cmp_rd_rs1_b30, Zksh_sm3p0_cg_cmp_rd_rs1_b30_str) + 80001388: 0007b203 ld x4,0(x15) + 8000138c: 01e20c63 beq x4,x30,800013a4 + 80001390: 430012ef jal x5,800027c0 + 80001394: 80001384 .word 0x80001384 + 80001398: 00000000 .word 0x00000000 + 8000139c: 80009f89 .word 0x80009f89 + 800013a0: 00000000 .word 0x00000000 + 800013a4: 00878793 addi x15,x15,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x18, x31) # load rs1: x31 = 0x9e11cc6fb9eb9fc1 + 800013a8: 00093f83 ld x31,0(x18) + 800013ac: 00890913 addi x18,x18,8 + +00000000800013b0 : +Zksh_sm3p0_cg_cmp_rd_rs1_b31: + sm3p0 x31, x31 # perform operation + 800013b0: 108f9f93 sm3p0 x31,x31 + # Check if x31 contains the expected result. x15 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x15, x5, x4, x31, Zksh_sm3p0_cg_cmp_rd_rs1_b31, Zksh_sm3p0_cg_cmp_rd_rs1_b31_str) + 800013b4: 0007b203 ld x4,0(x15) + 800013b8: 01f20c63 beq x4,x31,800013d0 + 800013bc: 404012ef jal x5,800027c0 + 800013c0: 800013b0 .word 0x800013b0 + 800013c4: 00000000 .word 0x00000000 + 800013c8: 80009fc2 .word 0x80009fc2 + 800013cc: 00000000 .word 0x00000000 + 800013d0: 00878793 addi x15,x15,8 + + mv x2, x15 # restore signature pointer to default register for teardown + 800013d4: 00078113 addi x2,x15,0 + +00000000800013d8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013d8: 00000513 addi x10,x0,0 + 800013dc: 00000073 ecall + 800013e0: fff00513 addi x10,x0,-1 + 800013e4: 25800413 addi x8,x0,600 + +00000000800013e8 : + 800013e8: 34002373 csrrs x6,mscratch,x0 + +00000000800013ec : + 800013ec: 2b833383 ld x7,696(x6) + +00000000800013f0 : + 800013f0: 2a033383 ld x7,672(x6) + +00000000800013f4 : + 800013f4: 2d033483 ld x9,720(x6) + 800013f8: 34049073 csrrw x0,mscratch,x9 + +00000000800013fc : + 800013fc: 2c833483 ld x9,712(x6) + 80001400: 305493f3 csrrw x7,mtvec,x9 + 80001404: ffc4f493 andi x9,x9,-4 + 80001408: ffc3f393 andi x7,x7,-4 + 8000140c: 00749e63 bne x9,x7,80001428 + +0000000080001410 : + 80001410: 00030493 addi x9,x6,0 + +0000000080001414 : + 80001414: 0004a783 lw x15,0(x9) + 80001418: 00f3a023 sw x15,0(x7) + 8000141c: 00438393 addi x7,x7,4 + 80001420: 00448493 addi x9,x9,4 + 80001424: fe83c8e3 blt x7,x8,80001414 + 80001428: 0000100f fence.i + +000000008000142c : + 8000142c: 00000013 addi x0,x0,0 + 80001430: 00000013 addi x0,x0,0 + 80001434: 00000013 addi x0,x0,0 + 80001438: 00000013 addi x0,x0,0 + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 29f50513 addi x10,x10,671 # 8000a71f + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 29950513 addi x10,x10,665 # 8000a759 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 2b950513 addi x10,x10,697 # 8000a7b9 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: e2450513 addi x10,x10,-476 # 8000b364 + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: c1038393 addi x7,x7,-1008 # 8000c1d0 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: bc040413 addi x8,x8,-1088 # 8000c1c0 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000a90d .word 0x8000a90d + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a77b .word 0x8000a77b + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 06450513 addi x10,x10,100 # 8000a6e4 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 05f50513 addi x10,x10,95 # 8000a71f + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cb9ff06f jal x0,800013d8 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: c95ff06f jal x0,800013d8 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a8c30313 addi x6,x6,-1396 # 8000142c + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 1fb50513 addi x10,x10,507 # 8000bd9b + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 58850513 addi x10,x10,1416 # 8000a168 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: c0250513 addi x10,x10,-1022 # 8000a822 + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: abf50513 addi x10,x10,-1345 # 8000a71f + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 0e848493 addi x9,x9,232 # 8000a148 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00027417 auipc x8,0x27 + 800020a4: 5f840413 addi x8,x8,1528 # 80029698 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000a924 .word 0x8000a924 + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000aa26 .word 0x8000aa26 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ab21 .word 0x8000ab21 + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ac14 .word 0x8000ac14 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000ad87 .word 0x8000ad87 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: 84020213 addi x4,x4,-1984 # 8000a000 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: 82838393 addi x7,x7,-2008 # 8000a000 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: 80068693 addi x13,x13,-2048 # 8000a000 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00007497 auipc x9,0x7 + 8000282c: 7d848493 addi x9,x9,2008 # 8000a000 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00007497 auipc x9,0x7 + 800028d0: 7344a483 lw x9,1844(x9) # 8000a000 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 46040413 addi x8,x8,1120 # 8000bde0 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: ce040413 addi x8,x8,-800 # 800296a0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00007497 auipc x9,0x7 + 80002a04: 72848493 addi x9,x9,1832 # 8000a128 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00007497 auipc x9,0x7 + 80002a44: 6e848493 addi x9,x9,1768 # 8000a128 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00007817 auipc x16,0x7 + 80002a80: 6bc80813 addi x16,x16,1724 # 8000a138 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00007817 auipc x16,0x7 + 80002aa0: 69c80813 addi x16,x16,1692 # 8000a138 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: e6538393 addi x7,x7,-411 # 8000a90d + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00007817 auipc x16,0x7 + 80002abc: 67880813 addi x16,x16,1656 # 8000a130 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: e6038393 addi x7,x7,-416 # 8000a924 + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: f4a38393 addi x7,x7,-182 # 8000aa26 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 02d38393 addi x7,x7,45 # 8000ab21 + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 10838393 addi x7,x7,264 # 8000ac14 + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 26338393 addi x7,x7,611 # 8000ad87 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 1cf38393 addi x7,x7,463 # 8000ad0b + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 1f538393 addi x7,x7,501 # 8000ad49 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: df838393 addi x7,x7,-520 # 8000a964 + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: ee038393 addi x7,x7,-288 # 8000aa64 + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: fc138393 addi x7,x7,-63 # 8000ab5d + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 09d38393 addi x7,x7,157 # 8000ac51 + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 1f638393 addi x7,x7,502 # 8000adc2 + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: dc038393 addi x7,x7,-576 # 8000a9a4 + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: ea638393 addi x7,x7,-346 # 8000aaa2 + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: f8538393 addi x7,x7,-123 # 8000ab99 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 06238393 addi x7,x7,98 # 8000ac8e + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 1b938393 addi x7,x7,441 # 8000adfd + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: d8938393 addi x7,x7,-631 # 8000a9e5 + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: e6d38393 addi x7,x7,-403 # 8000aae1 + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: f4a38393 addi x7,x7,-182 # 8000abd6 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 02838393 addi x7,x7,40 # 8000accc + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 17d38393 addi x7,x7,381 # 8000ae39 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 1a238393 addi x7,x7,418 # 8000ae76 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 1d938393 addi x7,x7,473 # 8000aec5 + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 2bc38393 addi x7,x7,700 # 8000afc0 + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 3a038393 addi x7,x7,928 # 8000b0bc + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 3f480813 addi x16,x16,1012 # 8000a130 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 3e480813 addi x16,x16,996 # 8000a130 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 3dc80813 addi x16,x16,988 # 8000a134 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 3c880813 addi x16,x16,968 # 8000a130 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: 95f50513 addi x10,x10,-1697 # 8000a71f + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: 95950513 addi x10,x10,-1703 # 8000a759 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: 9d050513 addi x10,x10,-1584 # 8000a810 + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 2b853503 ld x10,696(x10) # 8000a120 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: 9a250513 addi x10,x10,-1630 # 8000a822 + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 15852503 lw x10,344(x10) # 8000a000 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: 96450513 addi x10,x10,-1692 # 8000a824 + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 21852503 lw x10,536(x10) # 8000a100 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 24850513 addi x10,x10,584 # 8000a168 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: 8d850513 addi x10,x10,-1832 # 8000a838 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 18053503 ld x10,384(x10) # 8000a108 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 1c850513 addi x10,x10,456 # 8000a168 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 28f50513 addi x10,x10,655 # 8000b26f + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: ff852503 lw x10,-8(x10) # 8000a000 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 14860613 addi x12,x12,328 # 8000a168 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 0bc52503 lw x10,188(x10) # 8000a104 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 30550513 addi x10,x10,773 # 8000b385 + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 0a860613 addi x12,x12,168 # 8000a168 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 01c52503 lw x10,28(x10) # 8000a104 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 06860613 addi x12,x12,104 # 8000a168 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: fdc52503 lw x10,-36(x10) # 8000a104 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 12850513 addi x10,x10,296 # 8000b268 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: fe850513 addi x10,x10,-24 # 8000a168 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 0c050513 addi x10,x10,192 # 8000b280 + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: e1852503 lw x10,-488(x10) # 8000a000 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: f1853503 ld x10,-232(x10) # 8000a110 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: f0453503 ld x10,-252(x10) # 8000a110 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: f4850513 addi x10,x10,-184 # 8000a168 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: ee052503 lw x10,-288(x10) # 8000a128 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 03750513 addi x10,x10,55 # 8000b297 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: d7852503 lw x10,-648(x10) # 8000a000 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: e8053503 ld x10,-384(x10) # 8000a118 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: e6c53503 ld x10,-404(x10) # 8000a118 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: ea850513 addi x10,x10,-344 # 8000a168 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: fae50513 addi x10,x10,-82 # 8000b2ae + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: df053503 ld x10,-528(x10) # 8000a118 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: e2850513 addi x10,x10,-472 # 8000a168 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: f8c50513 addi x10,x10,-116 # 8000b30c + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: d7053503 ld x10,-656(x10) # 8000a118 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: da850513 addi x10,x10,-600 # 8000a168 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: d4442403 lw x8,-700(x8) # 8000a130 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: fb150513 addi x10,x10,-79 # 8000b3b1 + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: f9d50513 addi x10,x10,-99 # 8000b3dd + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: cd080813 addi x16,x16,-816 # 8000a138 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 3a250513 addi x10,x10,930 # 8000a822 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: f2d50513 addi x10,x10,-211 # 8000b3ed + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: c3053503 ld x10,-976(x10) # 8000a118 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: c6850513 addi x10,x10,-920 # 8000a168 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: ed850513 addi x10,x10,-296 # 8000b418 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: ba853503 ld x10,-1112(x10) # 8000a110 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: be850513 addi x10,x10,-1048 # 8000a168 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: b6833303 ld x6,-1176(x6) # 8000a110 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: b683b383 ld x7,-1176(x7) # 8000a118 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: e8750513 addi x10,x10,-377 # 8000b447 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: eaf50513 addi x10,x10,-337 # 8000b4af + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: ae833303 ld x6,-1304(x6) # 8000a110 + 80003630: 00007397 auipc x7,0x7 + 80003634: ae83b383 ld x7,-1304(x7) # 8000a118 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: b0850513 addi x10,x10,-1272 # 8000a168 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: e3650513 addi x10,x10,-458 # 8000b4d6 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: d9350513 addi x10,x10,-621 # 8000b473 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: d8f50513 addi x10,x10,-625 # 8000b4af + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: 9d033303 ld x6,-1584(x6) # 8000a118 + 80003750: 00007397 auipc x7,0x7 + 80003754: 9c03b383 ld x7,-1600(x7) # 8000a110 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: 9e850513 addi x10,x10,-1560 # 8000a168 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: dfe50513 addi x10,x10,-514 # 8000b5be + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: ea550513 addi x10,x10,-347 # 8000b6a5 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: 90c52503 lw x10,-1780(x10) # 8000a134 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: e8150513 addi x10,x10,-383 # 8000b6e1 + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: e1f50513 addi x10,x10,-481 # 8000b6bf + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: de750513 addi x10,x10,-537 # 8000b6c7 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: daf50513 addi x10,x10,-593 # 8000b6cf + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: d7850513 addi x10,x10,-648 # 8000b6d8 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: d4a50513 addi x10,x10,-694 # 8000b6ea + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00006517 auipc x10,0x6 + 800039cc: 76852503 lw x10,1896(x10) # 8000a130 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: e2150513 addi x10,x10,-479 # 8000b841 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ca450513 addi x10,x10,-860 # 8000b704 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: c9550513 addi x10,x10,-875 # 8000b735 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: c7550513 addi x10,x10,-907 # 8000b755 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: c5350513 addi x10,x10,-941 # 8000b773 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: c3250513 addi x10,x10,-974 # 8000b792 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: c1a50513 addi x10,x10,-998 # 8000b7ba + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: c0650513 addi x10,x10,-1018 # 8000b7e6 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: bf250513 addi x10,x10,-1038 # 8000b812 + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: bf050513 addi x10,x10,-1040 # 8000b850 + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 49053503 ld x10,1168(x10) # 8000a118 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 4c850513 addi x10,x10,1224 # 8000a168 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: b8750513 addi x10,x10,-1145 # 8000b867 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 40853503 ld x10,1032(x10) # 8000a110 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 44850513 addi x10,x10,1096 # 8000a168 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 3e852503 lw x10,1000(x10) # 8000a130 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: b1e50513 addi x10,x10,-1250 # 8000b87e + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 39053503 ld x10,912(x10) # 8000a118 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: af550513 addi x10,x10,-1291 # 8000b895 + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 34853503 ld x10,840(x10) # 8000a110 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 34c52503 lw x10,844(x10) # 8000a130 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: b0b50513 addi x10,x10,-1269 # 8000b90b + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ba150513 addi x10,x10,-1119 # 8000b9e1 + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: c5450513 addi x10,x10,-940 # 8000bad4 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: d0f50513 addi x10,x10,-753 # 8000bbcf + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: db650513 addi x10,x10,-586 # 8000bcb6 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: 98350513 addi x10,x10,-1661 # 8000b8c3 + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 1e063603 ld x12,480(x12) # 8000a148 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: 92c50513 addi x10,x10,-1748 # 8000a8ac + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 18850513 addi x10,x10,392 # 8000a168 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 17058593 addi x11,x11,368 # 8000a190 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 20058593 addi x11,x11,512 # 8000a250 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00006517 auipc x10,0x6 + 80004084: 64e50513 addi x10,x10,1614 # 8000a6ce + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 2a450513 addi x10,x10,676 # 8000b364 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 05060613 addi x12,x12,80 # 8000a140 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00006517 auipc x10,0x6 + 80004104: 7cd50513 addi x10,x10,1997 # 8000a8cd + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 02053503 ld x10,32(x10) # 8000a148 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 02850513 addi x10,x10,40 # 8000a168 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00006517 auipc x10,0x6 + 80004184: 75d50513 addi x10,x10,1885 # 8000a8dd + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: fa853503 ld x10,-88(x10) # 8000a150 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: fa850513 addi x10,x10,-88 # 8000a168 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00006517 auipc x10,0x6 + 80004204: 6ed50513 addi x10,x10,1773 # 8000a8ed + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: f3053503 ld x10,-208(x10) # 8000a158 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: f2850513 addi x10,x10,-216 # 8000a168 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00006517 auipc x10,0x6 + 80004284: 67d50513 addi x10,x10,1661 # 8000a8fd + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: eb853503 ld x10,-328(x10) # 8000a160 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: ea850513 addi x10,x10,-344 # 8000a168 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: e5860613 addi x12,x12,-424 # 8000a140 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: e6860613 addi x12,x12,-408 # 8000a168 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 34030313 addi x6,x6,832 # 800013d8 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 32830313 addi x6,x6,808 # 800013d8 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 31030313 addi x6,x6,784 # 800013d8 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1a878793 addi x15,x15,424 # 800013e8 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: 90010113 addi x2,x2,-1792 # 8000bde0 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b38d .word 0x8000b38d + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 11828293 addi x5,x5,280 # 80029700 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 0f828293 addi x5,x5,248 # 80029700 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0 diff --git a/riscv-tests/rv64-Zksh-sm3p1-00.elf.objdump b/riscv-tests/rv64-Zksh-sm3p1-00.elf.objdump new file mode 100644 index 0000000..d0350f9 --- /dev/null +++ b/riscv-tests/rv64-Zksh-sm3p1-00.elf.objdump @@ -0,0 +1,6678 @@ + +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksh/Zksh-sm3p1-00.elf: file format elf64-littleriscv +/mnt/test/riscv-arch-test/work/vexii-rv64-k-min/elfs/rv64i/Zksh/Zksh-sm3p1-00.elf +architecture: riscv:rv64, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x0000000080000000 + +Program Header: +0x70000003 off 0x0000000000028680 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**0 + filesz 0x000000000000003b memsz 0x0000000000000000 flags r-- + LOAD off 0x0000000000001000 vaddr 0x0000000080000000 paddr 0x0000000080000000 align 2**12 + filesz 0x00000000000043c0 memsz 0x00000000000043c0 flags r-x + LOAD off 0x0000000000006000 vaddr 0x0000000080008000 paddr 0x0000000080008000 align 2**12 + filesz 0x0000000000022680 memsz 0x0000000000022680 flags rwx + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text.init 00000040 0000000080000000 0000000080000000 00001000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .text.rvtest 00004380 0000000080000040 0000000080000040 00001040 2**6 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .data 000216a0 0000000080008000 0000000080008000 00006000 2**8 + CONTENTS, ALLOC, LOAD, DATA + 3 .tohost 00000108 0000000080029700 0000000080029700 00027700 2**8 + CONTENTS, ALLOC, LOAD, DATA + 4 .text.rvmodel 00000680 000000008002a000 000000008002a000 00028000 2**5 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .riscv.attributes 0000003b 0000000000000000 0000000000000000 00028680 2**0 + CONTENTS, READONLY + 6 .debug_line 000008de 0000000000000000 0000000000000000 000286bb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 7 .debug_line_str 0000007b 0000000000000000 0000000000000000 00028f99 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 8 .debug_info 00000023 0000000000000000 0000000000000000 00029014 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 9 .debug_abbrev 00000012 0000000000000000 0000000000000000 00029037 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 10 .debug_aranges 00000040 0000000000000000 0000000000000000 00029050 2**4 + CONTENTS, READONLY, DEBUGGING, OCTETS + 11 .debug_str 00000089 0000000000000000 0000000000000000 00029090 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 12 .debug_rnglists 00000023 0000000000000000 0000000000000000 00029119 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS +SYMBOL TABLE: +0000000080000000 l d .text.init 0000000000000000 .text.init +0000000080000040 l d .text.rvtest 0000000000000000 .text.rvtest +0000000080008000 l d .data 0000000000000000 .data +0000000080029700 l d .tohost 0000000000000000 .tohost +000000008002a000 l d .text.rvmodel 0000000000000000 .text.rvmodel +0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes +0000000000000000 l d .debug_line 0000000000000000 .debug_line +0000000000000000 l d .debug_line_str 0000000000000000 .debug_line_str +0000000000000000 l d .debug_info 0000000000000000 .debug_info +0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev +0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges +0000000000000000 l d .debug_str 0000000000000000 .debug_str +0000000000000000 l d .debug_rnglists 0000000000000000 .debug_rnglists +0000000000000000 l df *ABS* 0000000000000000 ccXrDzDT.o +0000000010000000 l *ABS* 0000000000000000 UART_BASE_ADDR +0000000010000000 l *ABS* 0000000000000000 UART_PUTC +0000000000000003 l *ABS* 0000000000000000 MMODE_SIG +0000000000000001 l *ABS* 0000000000000000 SMODE_SIG +0000000000000001 l *ABS* 0000000000000000 HMODE_SIG +0000000000000002 l *ABS* 0000000000000000 VMODE_SIG +000000008002a0e0 l .text.rvmodel 0000000000000000 rvmodel_boot +0000000080000048 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b0 +00000000800027c0 l .text.rvtest 0000000000000000 failedtest_x5_x4 +00000000800087f0 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b0_str +0000000080000074 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b1 +0000000080008822 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b1_str +00000000800000a4 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b2 +0000000080008854 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b2_str +00000000800000d4 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b3 +0000000080008886 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b3_str +0000000080000108 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b4 +0000000080002800 l .text.rvtest 0000000000000000 failedtest_x14_x13 +00000000800088b8 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b4_str +0000000080000134 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b5 +00000000800088ea l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b5_str +0000000080000160 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b6 +000000008000891c l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b6_str +000000008000018c l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b7 +000000008000894e l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b7_str +00000000800001b8 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b8 +0000000080008980 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b8_str +00000000800001e4 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b9 +00000000800089b2 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b9_str +0000000080000210 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b10 +00000000800089e5 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b10_str +000000008000023c l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b11 +0000000080008a19 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b11_str +0000000080000268 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b12 +0000000080008a4d l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b12_str +000000008000029c l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b13 +0000000080008a81 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b13_str +00000000800002c8 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b14 +0000000080008ab5 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b14_str +00000000800002f4 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b15 +0000000080008ae9 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b15_str +0000000080000320 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b16 +0000000080008b1d l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b16_str +000000008000034c l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b17 +0000000080008b51 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b17_str +0000000080000378 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b18 +0000000080008b85 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b18_str +00000000800003a4 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b19 +0000000080008bb9 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b19_str +00000000800003d0 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b20 +0000000080008bed l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b20_str +0000000080000400 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b21 +0000000080008c21 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b21_str +000000008000042c l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b22 +0000000080008c55 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b22_str +0000000080000458 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b23 +0000000080008c89 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b23_str +0000000080000484 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b24 +0000000080008cbd l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b24_str +00000000800004b0 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b25 +0000000080008cf1 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b25_str +00000000800004dc l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b26 +0000000080008d25 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b26_str +0000000080000508 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b27 +0000000080008d59 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b27_str +0000000080000538 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b28 +0000000080008d8d l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b28_str +0000000080000564 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b29 +0000000080008dc1 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b29_str +0000000080000590 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b30 +0000000080008df5 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b30_str +00000000800005c0 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b31 +0000000080008e29 l .data 0000000000000000 Zksh_sm3p1_cg_cp_rs1_b31_str +00000000800005ec l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rd_b0 +0000000080008e5d l .data 0000000000000000 Zksh_sm3p1_cg_cp_rd_b0_str +0000000080000618 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rd_b1 +0000000080008e8f l .data 0000000000000000 Zksh_sm3p1_cg_cp_rd_b1_str +0000000080000644 l .text.rvtest 0000000000000000 Zksh_sm3p1_cg_cp_rd_b2 +0000000080008ec1 l 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00000013 addi x0,x0,0 + 8000001c: 00000013 addi x0,x0,0 + 80000020: 000080e7 jalr x1,0(x1) + 80000024: 00000013 addi x0,x0,0 + 80000028: 00000013 addi x0,x0,0 + 8000002c: 00000013 addi x0,x0,0 + 80000030: 00000013 addi x0,x0,0 + 80000034: 00000013 addi x0,x0,0 + 80000038: 00000013 addi x0,x0,0 + 8000003c: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvtest: + +0000000080000040 : +///////////////////////////////// +// cp_rs1 +///////////////////////////////// + +# Testcase cp_rs1 (Test source rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x3, x0) # load rs1: x0 = 0x7dfba68563c25276 + 80000040: 0001b003 ld x0,0(x3) + 80000044: 00818193 addi x3,x3,8 + +0000000080000048 : +Zksh_sm3p1_cg_cp_rs1_b0: + sm3p1 x31, x0 # perform operation + 80000048: 10901f93 sm3p1 x31,x0 + # Check if x31 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_b0, Zksh_sm3p1_cg_cp_rs1_b0_str) + 8000004c: 00013203 ld x4,0(x2) + 80000050: 01f20c63 beq x4,x31,80000068 + 80000054: 76c022ef jal x5,800027c0 + 80000058: 80000048 .word 0x80000048 + 8000005c: 00000000 .word 0x00000000 + 80000060: 800087f0 .word 0x800087f0 + 80000064: 00000000 .word 0x00000000 + 80000068: 00810113 addi x2,x2,8 + +# Testcase cp_rs1 (Test source rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x3, x1) # load rs1: x1 = 0x6fda450b6ff4cc74 + 8000006c: 0001b083 ld x1,0(x3) + 80000070: 00818193 addi x3,x3,8 + +0000000080000074 : +Zksh_sm3p1_cg_cp_rs1_b1: + sm3p1 x30, x1 # perform operation + 80000074: 10909f13 sm3p1 x30,x1 + # Check if x30 contains the expected result. x2 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x2, x5, x4, x30, Zksh_sm3p1_cg_cp_rs1_b1, Zksh_sm3p1_cg_cp_rs1_b1_str) + 80000078: 00013203 ld x4,0(x2) + 8000007c: 01e20c63 beq x4,x30,80000094 + 80000080: 740022ef jal x5,800027c0 + 80000084: 80000074 .word 0x80000074 + 80000088: 00000000 .word 0x00000000 + 8000008c: 80008822 .word 0x80008822 + 80000090: 00000000 .word 0x00000000 + 80000094: 00810113 addi x2,x2,8 + + mv x28, x2 # switch signature pointer register to avoid conflict with test + 80000098: 00010e13 addi x28,x2,0 +# Testcase cp_rs1 (Test source rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x3, x2) # load rs1: x2 = 0xa85dd212db9a1f4b + 8000009c: 0001b103 ld x2,0(x3) + 800000a0: 00818193 addi x3,x3,8 + +00000000800000a4 : +Zksh_sm3p1_cg_cp_rs1_b2: + sm3p1 x22, x2 # perform operation + 800000a4: 10911b13 sm3p1 x22,x2 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zksh_sm3p1_cg_cp_rs1_b2, Zksh_sm3p1_cg_cp_rs1_b2_str) + 800000a8: 000e3203 ld x4,0(x28) + 800000ac: 01620c63 beq x4,x22,800000c4 + 800000b0: 710022ef jal x5,800027c0 + 800000b4: 800000a4 .word 0x800000a4 + 800000b8: 00000000 .word 0x00000000 + 800000bc: 80008854 .word 0x80008854 + 800000c0: 00000000 .word 0x00000000 + 800000c4: 008e0e13 addi x28,x28,8 + + mv x21, x3 # switch data pointer register to avoid conflict with test + 800000c8: 00018a93 addi x21,x3,0 +# Testcase cp_rs1 (Test source rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x21, x3) # load rs1: x3 = 0x1c8e6a3f070da60b + 800000cc: 000ab183 ld x3,0(x21) + 800000d0: 008a8a93 addi x21,x21,8 + +00000000800000d4 : +Zksh_sm3p1_cg_cp_rs1_b3: + sm3p1 x27, x3 # perform operation + 800000d4: 10919d93 sm3p1 x27,x3 + # Check if x27 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x27, Zksh_sm3p1_cg_cp_rs1_b3, Zksh_sm3p1_cg_cp_rs1_b3_str) + 800000d8: 000e3203 ld x4,0(x28) + 800000dc: 01b20c63 beq x4,x27,800000f4 + 800000e0: 6e0022ef jal x5,800027c0 + 800000e4: 800000d4 .word 0x800000d4 + 800000e8: 00000000 .word 0x00000000 + 800000ec: 80008886 .word 0x80008886 + 800000f0: 00000000 .word 0x00000000 + 800000f4: 008e0e13 addi x28,x28,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 800000f8: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 800000fc: 00028713 addi x14,x5,0 +# Testcase cp_rs1 (Test source rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x21, x4) # load rs1: x4 = 0x42d8a276a4f262c2 + 80000100: 000ab203 ld x4,0(x21) + 80000104: 008a8a93 addi x21,x21,8 + +0000000080000108 : +Zksh_sm3p1_cg_cp_rs1_b4: + sm3p1 x11, x4 # perform operation + 80000108: 10921593 sm3p1 x11,x4 + # Check if x11 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x11, Zksh_sm3p1_cg_cp_rs1_b4, Zksh_sm3p1_cg_cp_rs1_b4_str) + 8000010c: 000e3683 ld x13,0(x28) + 80000110: 00b68c63 beq x13,x11,80000128 + 80000114: 6ec0276f jal x14,80002800 + 80000118: 80000108 .word 0x80000108 + 8000011c: 00000000 .word 0x00000000 + 80000120: 800088b8 .word 0x800088b8 + 80000124: 00000000 .word 0x00000000 + 80000128: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x21, x5) # load rs1: x5 = 0xbffc54203b0aef1a + 8000012c: 000ab283 ld x5,0(x21) + 80000130: 008a8a93 addi x21,x21,8 + +0000000080000134 : +Zksh_sm3p1_cg_cp_rs1_b5: + sm3p1 x16, x5 # perform operation + 80000134: 10929813 sm3p1 x16,x5 + # Check if x16 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x16, Zksh_sm3p1_cg_cp_rs1_b5, Zksh_sm3p1_cg_cp_rs1_b5_str) + 80000138: 000e3683 ld x13,0(x28) + 8000013c: 01068c63 beq x13,x16,80000154 + 80000140: 6c00276f jal x14,80002800 + 80000144: 80000134 .word 0x80000134 + 80000148: 00000000 .word 0x00000000 + 8000014c: 800088ea .word 0x800088ea + 80000150: 00000000 .word 0x00000000 + 80000154: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x21, x6) # load rs1: x6 = 0xe4ec7bdfee82cc82 + 80000158: 000ab303 ld x6,0(x21) + 8000015c: 008a8a93 addi x21,x21,8 + +0000000080000160 : +Zksh_sm3p1_cg_cp_rs1_b6: + sm3p1 x26, x6 # perform operation + 80000160: 10931d13 sm3p1 x26,x6 + # Check if x26 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x26, Zksh_sm3p1_cg_cp_rs1_b6, Zksh_sm3p1_cg_cp_rs1_b6_str) + 80000164: 000e3683 ld x13,0(x28) + 80000168: 01a68c63 beq x13,x26,80000180 + 8000016c: 6940276f jal x14,80002800 + 80000170: 80000160 .word 0x80000160 + 80000174: 00000000 .word 0x00000000 + 80000178: 8000891c .word 0x8000891c + 8000017c: 00000000 .word 0x00000000 + 80000180: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x21, x7) # load rs1: x7 = 0x0b50de1ee15a80af + 80000184: 000ab383 ld x7,0(x21) + 80000188: 008a8a93 addi x21,x21,8 + +000000008000018c : +Zksh_sm3p1_cg_cp_rs1_b7: + sm3p1 x22, x7 # perform operation + 8000018c: 10939b13 sm3p1 x22,x7 + # Check if x22 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x22, Zksh_sm3p1_cg_cp_rs1_b7, Zksh_sm3p1_cg_cp_rs1_b7_str) + 80000190: 000e3683 ld x13,0(x28) + 80000194: 01668c63 beq x13,x22,800001ac + 80000198: 6680276f jal x14,80002800 + 8000019c: 8000018c .word 0x8000018c + 800001a0: 00000000 .word 0x00000000 + 800001a4: 8000894e .word 0x8000894e + 800001a8: 00000000 .word 0x00000000 + 800001ac: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x21, x8) # load rs1: x8 = 0x03f1c336ec5a9de7 + 800001b0: 000ab403 ld x8,0(x21) + 800001b4: 008a8a93 addi x21,x21,8 + +00000000800001b8 : +Zksh_sm3p1_cg_cp_rs1_b8: + sm3p1 x24, x8 # perform operation + 800001b8: 10941c13 sm3p1 x24,x8 + # Check if x24 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x24, Zksh_sm3p1_cg_cp_rs1_b8, Zksh_sm3p1_cg_cp_rs1_b8_str) + 800001bc: 000e3683 ld x13,0(x28) + 800001c0: 01868c63 beq x13,x24,800001d8 + 800001c4: 63c0276f jal x14,80002800 + 800001c8: 800001b8 .word 0x800001b8 + 800001cc: 00000000 .word 0x00000000 + 800001d0: 80008980 .word 0x80008980 + 800001d4: 00000000 .word 0x00000000 + 800001d8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x21, x9) # load rs1: x9 = 0xacdeadfcbe241427 + 800001dc: 000ab483 ld x9,0(x21) + 800001e0: 008a8a93 addi x21,x21,8 + +00000000800001e4 : +Zksh_sm3p1_cg_cp_rs1_b9: + sm3p1 x5, x9 # perform operation + 800001e4: 10949293 sm3p1 x5,x9 + # Check if x5 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x5, Zksh_sm3p1_cg_cp_rs1_b9, Zksh_sm3p1_cg_cp_rs1_b9_str) + 800001e8: 000e3683 ld x13,0(x28) + 800001ec: 00568c63 beq x13,x5,80000204 + 800001f0: 6100276f jal x14,80002800 + 800001f4: 800001e4 .word 0x800001e4 + 800001f8: 00000000 .word 0x00000000 + 800001fc: 800089b2 .word 0x800089b2 + 80000200: 00000000 .word 0x00000000 + 80000204: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x21, x10) # load rs1: x10 = 0x76a8799779e3b36a + 80000208: 000ab503 ld x10,0(x21) + 8000020c: 008a8a93 addi x21,x21,8 + +0000000080000210 : +Zksh_sm3p1_cg_cp_rs1_b10: + sm3p1 x17, x10 # perform operation + 80000210: 10951893 sm3p1 x17,x10 + # Check if x17 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x17, Zksh_sm3p1_cg_cp_rs1_b10, Zksh_sm3p1_cg_cp_rs1_b10_str) + 80000214: 000e3683 ld x13,0(x28) + 80000218: 01168c63 beq x13,x17,80000230 + 8000021c: 5e40276f jal x14,80002800 + 80000220: 80000210 .word 0x80000210 + 80000224: 00000000 .word 0x00000000 + 80000228: 800089e5 .word 0x800089e5 + 8000022c: 00000000 .word 0x00000000 + 80000230: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x21, x11) # load rs1: x11 = 0xcf2f8ae4f3372fed + 80000234: 000ab583 ld x11,0(x21) + 80000238: 008a8a93 addi x21,x21,8 + +000000008000023c : +Zksh_sm3p1_cg_cp_rs1_b11: + sm3p1 x2, x11 # perform operation + 8000023c: 10959113 sm3p1 x2,x11 + # Check if x2 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x2, Zksh_sm3p1_cg_cp_rs1_b11, Zksh_sm3p1_cg_cp_rs1_b11_str) + 80000240: 000e3683 ld x13,0(x28) + 80000244: 00268c63 beq x13,x2,8000025c + 80000248: 5b80276f jal x14,80002800 + 8000024c: 8000023c .word 0x8000023c + 80000250: 00000000 .word 0x00000000 + 80000254: 80008a19 .word 0x80008a19 + 80000258: 00000000 .word 0x00000000 + 8000025c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x21, x12) # load rs1: x12 = 0x4632c4307ca6751b + 80000260: 000ab603 ld x12,0(x21) + 80000264: 008a8a93 addi x21,x21,8 + +0000000080000268 : +Zksh_sm3p1_cg_cp_rs1_b12: + sm3p1 x23, x12 # perform operation + 80000268: 10961b93 sm3p1 x23,x12 + # Check if x23 contains the expected result. x28 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x28, x14, x13, x23, Zksh_sm3p1_cg_cp_rs1_b12, Zksh_sm3p1_cg_cp_rs1_b12_str) + 8000026c: 000e3683 ld x13,0(x28) + 80000270: 01768c63 beq x13,x23,80000288 + 80000274: 58c0276f jal x14,80002800 + 80000278: 80000268 .word 0x80000268 + 8000027c: 00000000 .word 0x00000000 + 80000280: 80008a4d .word 0x80008a4d + 80000284: 00000000 .word 0x00000000 + 80000288: 008e0e13 addi x28,x28,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 8000028c: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80000290: 00070293 addi x5,x14,0 +# Testcase cp_rs1 (Test source rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x21, x13) # load rs1: x13 = 0x8afdb1d7dff4b3c1 + 80000294: 000ab683 ld x13,0(x21) + 80000298: 008a8a93 addi x21,x21,8 + +000000008000029c : +Zksh_sm3p1_cg_cp_rs1_b13: + sm3p1 x18, x13 # perform operation + 8000029c: 10969913 sm3p1 x18,x13 + # Check if x18 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x18, Zksh_sm3p1_cg_cp_rs1_b13, Zksh_sm3p1_cg_cp_rs1_b13_str) + 800002a0: 000e3203 ld x4,0(x28) + 800002a4: 01220c63 beq x4,x18,800002bc + 800002a8: 518022ef jal x5,800027c0 + 800002ac: 8000029c .word 0x8000029c + 800002b0: 00000000 .word 0x00000000 + 800002b4: 80008a81 .word 0x80008a81 + 800002b8: 00000000 .word 0x00000000 + 800002bc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x21, x14) # load rs1: x14 = 0xda31c37075e11472 + 800002c0: 000ab703 ld x14,0(x21) + 800002c4: 008a8a93 addi x21,x21,8 + +00000000800002c8 : +Zksh_sm3p1_cg_cp_rs1_b14: + sm3p1 x7, x14 # perform operation + 800002c8: 10971393 sm3p1 x7,x14 + # Check if x7 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x7, Zksh_sm3p1_cg_cp_rs1_b14, Zksh_sm3p1_cg_cp_rs1_b14_str) + 800002cc: 000e3203 ld x4,0(x28) + 800002d0: 00720c63 beq x4,x7,800002e8 + 800002d4: 4ec022ef jal x5,800027c0 + 800002d8: 800002c8 .word 0x800002c8 + 800002dc: 00000000 .word 0x00000000 + 800002e0: 80008ab5 .word 0x80008ab5 + 800002e4: 00000000 .word 0x00000000 + 800002e8: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x21, x15) # load rs1: x15 = 0x04a7dbfe289ff82d + 800002ec: 000ab783 ld x15,0(x21) + 800002f0: 008a8a93 addi x21,x21,8 + +00000000800002f4 : +Zksh_sm3p1_cg_cp_rs1_b15: + sm3p1 x6, x15 # perform operation + 800002f4: 10979313 sm3p1 x6,x15 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zksh_sm3p1_cg_cp_rs1_b15, Zksh_sm3p1_cg_cp_rs1_b15_str) + 800002f8: 000e3203 ld x4,0(x28) + 800002fc: 00620c63 beq x4,x6,80000314 + 80000300: 4c0022ef jal x5,800027c0 + 80000304: 800002f4 .word 0x800002f4 + 80000308: 00000000 .word 0x00000000 + 8000030c: 80008ae9 .word 0x80008ae9 + 80000310: 00000000 .word 0x00000000 + 80000314: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x21, x16) # load rs1: x16 = 0xba2640a997810d49 + 80000318: 000ab803 ld x16,0(x21) + 8000031c: 008a8a93 addi x21,x21,8 + +0000000080000320 : +Zksh_sm3p1_cg_cp_rs1_b16: + sm3p1 x15, x16 # perform operation + 80000320: 10981793 sm3p1 x15,x16 + # Check if x15 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x15, Zksh_sm3p1_cg_cp_rs1_b16, Zksh_sm3p1_cg_cp_rs1_b16_str) + 80000324: 000e3203 ld x4,0(x28) + 80000328: 00f20c63 beq x4,x15,80000340 + 8000032c: 494022ef jal x5,800027c0 + 80000330: 80000320 .word 0x80000320 + 80000334: 00000000 .word 0x00000000 + 80000338: 80008b1d .word 0x80008b1d + 8000033c: 00000000 .word 0x00000000 + 80000340: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x21, x17) # load rs1: x17 = 0x9911dca9fa521a78 + 80000344: 000ab883 ld x17,0(x21) + 80000348: 008a8a93 addi x21,x21,8 + +000000008000034c : +Zksh_sm3p1_cg_cp_rs1_b17: + sm3p1 x20, x17 # perform operation + 8000034c: 10989a13 sm3p1 x20,x17 + # Check if x20 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x20, Zksh_sm3p1_cg_cp_rs1_b17, Zksh_sm3p1_cg_cp_rs1_b17_str) + 80000350: 000e3203 ld x4,0(x28) + 80000354: 01420c63 beq x4,x20,8000036c + 80000358: 468022ef jal x5,800027c0 + 8000035c: 8000034c .word 0x8000034c + 80000360: 00000000 .word 0x00000000 + 80000364: 80008b51 .word 0x80008b51 + 80000368: 00000000 .word 0x00000000 + 8000036c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x21, x18) # load rs1: x18 = 0xfa7a6b9c4388ca98 + 80000370: 000ab903 ld x18,0(x21) + 80000374: 008a8a93 addi x21,x21,8 + +0000000080000378 : +Zksh_sm3p1_cg_cp_rs1_b18: + sm3p1 x9, x18 # perform operation + 80000378: 10991493 sm3p1 x9,x18 + # Check if x9 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x9, Zksh_sm3p1_cg_cp_rs1_b18, Zksh_sm3p1_cg_cp_rs1_b18_str) + 8000037c: 000e3203 ld x4,0(x28) + 80000380: 00920c63 beq x4,x9,80000398 + 80000384: 43c022ef jal x5,800027c0 + 80000388: 80000378 .word 0x80000378 + 8000038c: 00000000 .word 0x00000000 + 80000390: 80008b85 .word 0x80008b85 + 80000394: 00000000 .word 0x00000000 + 80000398: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x21, x19) # load rs1: x19 = 0x85a4e70c38e86dd9 + 8000039c: 000ab983 ld x19,0(x21) + 800003a0: 008a8a93 addi x21,x21,8 + +00000000800003a4 : +Zksh_sm3p1_cg_cp_rs1_b19: + sm3p1 x22, x19 # perform operation + 800003a4: 10999b13 sm3p1 x22,x19 + # Check if x22 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x22, Zksh_sm3p1_cg_cp_rs1_b19, Zksh_sm3p1_cg_cp_rs1_b19_str) + 800003a8: 000e3203 ld x4,0(x28) + 800003ac: 01620c63 beq x4,x22,800003c4 + 800003b0: 410022ef jal x5,800027c0 + 800003b4: 800003a4 .word 0x800003a4 + 800003b8: 00000000 .word 0x00000000 + 800003bc: 80008bb9 .word 0x80008bb9 + 800003c0: 00000000 .word 0x00000000 + 800003c4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x21, x20) # load rs1: x20 = 0x7bc8317ef9211d00 + 800003c8: 000aba03 ld x20,0(x21) + 800003cc: 008a8a93 addi x21,x21,8 + +00000000800003d0 : +Zksh_sm3p1_cg_cp_rs1_b20: + sm3p1 x26, x20 # perform operation + 800003d0: 109a1d13 sm3p1 x26,x20 + # Check if x26 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x26, Zksh_sm3p1_cg_cp_rs1_b20, Zksh_sm3p1_cg_cp_rs1_b20_str) + 800003d4: 000e3203 ld x4,0(x28) + 800003d8: 01a20c63 beq x4,x26,800003f0 + 800003dc: 3e4022ef jal x5,800027c0 + 800003e0: 800003d0 .word 0x800003d0 + 800003e4: 00000000 .word 0x00000000 + 800003e8: 80008bed .word 0x80008bed + 800003ec: 00000000 .word 0x00000000 + 800003f0: 008e0e13 addi x28,x28,8 + + mv x10, x21 # switch data pointer register to avoid conflict with test + 800003f4: 000a8513 addi x10,x21,0 +# Testcase cp_rs1 (Test source rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x10, x21) # load rs1: x21 = 0xb7cdfe2134583e37 + 800003f8: 00053a83 ld x21,0(x10) + 800003fc: 00850513 addi x10,x10,8 + +0000000080000400 : +Zksh_sm3p1_cg_cp_rs1_b21: + sm3p1 x17, x21 # perform operation + 80000400: 109a9893 sm3p1 x17,x21 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zksh_sm3p1_cg_cp_rs1_b21, Zksh_sm3p1_cg_cp_rs1_b21_str) + 80000404: 000e3203 ld x4,0(x28) + 80000408: 01120c63 beq x4,x17,80000420 + 8000040c: 3b4022ef jal x5,800027c0 + 80000410: 80000400 .word 0x80000400 + 80000414: 00000000 .word 0x00000000 + 80000418: 80008c21 .word 0x80008c21 + 8000041c: 00000000 .word 0x00000000 + 80000420: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x10, x22) # load rs1: x22 = 0x791abbaed5724846 + 80000424: 00053b03 ld x22,0(x10) + 80000428: 00850513 addi x10,x10,8 + +000000008000042c : +Zksh_sm3p1_cg_cp_rs1_b22: + sm3p1 x3, x22 # perform operation + 8000042c: 109b1193 sm3p1 x3,x22 + # Check if x3 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x3, Zksh_sm3p1_cg_cp_rs1_b22, Zksh_sm3p1_cg_cp_rs1_b22_str) + 80000430: 000e3203 ld x4,0(x28) + 80000434: 00320c63 beq x4,x3,8000044c + 80000438: 388022ef jal x5,800027c0 + 8000043c: 8000042c .word 0x8000042c + 80000440: 00000000 .word 0x00000000 + 80000444: 80008c55 .word 0x80008c55 + 80000448: 00000000 .word 0x00000000 + 8000044c: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0x4f01908421e969ea + 80000450: 00053b83 ld x23,0(x10) + 80000454: 00850513 addi x10,x10,8 + +0000000080000458 : +Zksh_sm3p1_cg_cp_rs1_b23: + sm3p1 x17, x23 # perform operation + 80000458: 109b9893 sm3p1 x17,x23 + # Check if x17 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x17, Zksh_sm3p1_cg_cp_rs1_b23, Zksh_sm3p1_cg_cp_rs1_b23_str) + 8000045c: 000e3203 ld x4,0(x28) + 80000460: 01120c63 beq x4,x17,80000478 + 80000464: 35c022ef jal x5,800027c0 + 80000468: 80000458 .word 0x80000458 + 8000046c: 00000000 .word 0x00000000 + 80000470: 80008c89 .word 0x80008c89 + 80000474: 00000000 .word 0x00000000 + 80000478: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x10, x24) # load rs1: x24 = 0xf139024ef86b818c + 8000047c: 00053c03 ld x24,0(x10) + 80000480: 00850513 addi x10,x10,8 + +0000000080000484 : +Zksh_sm3p1_cg_cp_rs1_b24: + sm3p1 x30, x24 # perform operation + 80000484: 109c1f13 sm3p1 x30,x24 + # Check if x30 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x30, Zksh_sm3p1_cg_cp_rs1_b24, Zksh_sm3p1_cg_cp_rs1_b24_str) + 80000488: 000e3203 ld x4,0(x28) + 8000048c: 01e20c63 beq x4,x30,800004a4 + 80000490: 330022ef jal x5,800027c0 + 80000494: 80000484 .word 0x80000484 + 80000498: 00000000 .word 0x00000000 + 8000049c: 80008cbd .word 0x80008cbd + 800004a0: 00000000 .word 0x00000000 + 800004a4: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x10, x25) # load rs1: x25 = 0x7037be4532f7ba05 + 800004a8: 00053c83 ld x25,0(x10) + 800004ac: 00850513 addi x10,x10,8 + +00000000800004b0 : +Zksh_sm3p1_cg_cp_rs1_b25: + sm3p1 x21, x25 # perform operation + 800004b0: 109c9a93 sm3p1 x21,x25 + # Check if x21 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x21, Zksh_sm3p1_cg_cp_rs1_b25, Zksh_sm3p1_cg_cp_rs1_b25_str) + 800004b4: 000e3203 ld x4,0(x28) + 800004b8: 01520c63 beq x4,x21,800004d0 + 800004bc: 304022ef jal x5,800027c0 + 800004c0: 800004b0 .word 0x800004b0 + 800004c4: 00000000 .word 0x00000000 + 800004c8: 80008cf1 .word 0x80008cf1 + 800004cc: 00000000 .word 0x00000000 + 800004d0: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x10, x26) # load rs1: x26 = 0x1f052165adaf413d + 800004d4: 00053d03 ld x26,0(x10) + 800004d8: 00850513 addi x10,x10,8 + +00000000800004dc : +Zksh_sm3p1_cg_cp_rs1_b26: + sm3p1 x6, x26 # perform operation + 800004dc: 109d1313 sm3p1 x6,x26 + # Check if x6 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x6, Zksh_sm3p1_cg_cp_rs1_b26, Zksh_sm3p1_cg_cp_rs1_b26_str) + 800004e0: 000e3203 ld x4,0(x28) + 800004e4: 00620c63 beq x4,x6,800004fc + 800004e8: 2d8022ef jal x5,800027c0 + 800004ec: 800004dc .word 0x800004dc + 800004f0: 00000000 .word 0x00000000 + 800004f4: 80008d25 .word 0x80008d25 + 800004f8: 00000000 .word 0x00000000 + 800004fc: 008e0e13 addi x28,x28,8 + +# Testcase cp_rs1 (Test source rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x10, x27) # load rs1: x27 = 0xdc582bffe1228662 + 80000500: 00053d83 ld x27,0(x10) + 80000504: 00850513 addi x10,x10,8 + +0000000080000508 : +Zksh_sm3p1_cg_cp_rs1_b27: + sm3p1 x25, x27 # perform operation + 80000508: 109d9c93 sm3p1 x25,x27 + # Check if x25 contains the expected result. x28 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x28, x5, x4, x25, Zksh_sm3p1_cg_cp_rs1_b27, Zksh_sm3p1_cg_cp_rs1_b27_str) + 8000050c: 000e3203 ld x4,0(x28) + 80000510: 01920c63 beq x4,x25,80000528 + 80000514: 2ac022ef jal x5,800027c0 + 80000518: 80000508 .word 0x80000508 + 8000051c: 00000000 .word 0x00000000 + 80000520: 80008d59 .word 0x80008d59 + 80000524: 00000000 .word 0x00000000 + 80000528: 008e0e13 addi x28,x28,8 + + mv x31, x28 # switch signature pointer register to avoid conflict with test + 8000052c: 000e0f93 addi x31,x28,0 +# Testcase cp_rs1 (Test source rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x10, x28) # load rs1: x28 = 0x484a1c0837fb7df7 + 80000530: 00053e03 ld x28,0(x10) + 80000534: 00850513 addi x10,x10,8 + +0000000080000538 : +Zksh_sm3p1_cg_cp_rs1_b28: + sm3p1 x22, x28 # perform operation + 80000538: 109e1b13 sm3p1 x22,x28 + # Check if x22 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x22, Zksh_sm3p1_cg_cp_rs1_b28, Zksh_sm3p1_cg_cp_rs1_b28_str) + 8000053c: 000fb203 ld x4,0(x31) + 80000540: 01620c63 beq x4,x22,80000558 + 80000544: 27c022ef jal x5,800027c0 + 80000548: 80000538 .word 0x80000538 + 8000054c: 00000000 .word 0x00000000 + 80000550: 80008d8d .word 0x80008d8d + 80000554: 00000000 .word 0x00000000 + 80000558: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x10, x29) # load rs1: x29 = 0xfa320e2e857eeb6f + 8000055c: 00053e83 ld x29,0(x10) + 80000560: 00850513 addi x10,x10,8 + +0000000080000564 : +Zksh_sm3p1_cg_cp_rs1_b29: + sm3p1 x19, x29 # perform operation + 80000564: 109e9993 sm3p1 x19,x29 + # Check if x19 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x19, Zksh_sm3p1_cg_cp_rs1_b29, Zksh_sm3p1_cg_cp_rs1_b29_str) + 80000568: 000fb203 ld x4,0(x31) + 8000056c: 01320c63 beq x4,x19,80000584 + 80000570: 250022ef jal x5,800027c0 + 80000574: 80000564 .word 0x80000564 + 80000578: 00000000 .word 0x00000000 + 8000057c: 80008dc1 .word 0x80008dc1 + 80000580: 00000000 .word 0x00000000 + 80000584: 008f8f93 addi x31,x31,8 + +# Testcase cp_rs1 (Test source rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x10, x30) # load rs1: x30 = 0x94e68ec364b84655 + 80000588: 00053f03 ld x30,0(x10) + 8000058c: 00850513 addi x10,x10,8 + +0000000080000590 : +Zksh_sm3p1_cg_cp_rs1_b30: + sm3p1 x14, x30 # perform operation + 80000590: 109f1713 sm3p1 x14,x30 + # Check if x14 contains the expected result. x31 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x31, x5, x4, x14, Zksh_sm3p1_cg_cp_rs1_b30, Zksh_sm3p1_cg_cp_rs1_b30_str) + 80000594: 000fb203 ld x4,0(x31) + 80000598: 00e20c63 beq x4,x14,800005b0 + 8000059c: 224022ef jal x5,800027c0 + 800005a0: 80000590 .word 0x80000590 + 800005a4: 00000000 .word 0x00000000 + 800005a8: 80008df5 .word 0x80008df5 + 800005ac: 00000000 .word 0x00000000 + 800005b0: 008f8f93 addi x31,x31,8 + + mv x27, x31 # switch signature pointer register to avoid conflict with test + 800005b4: 000f8d93 addi x27,x31,0 +# Testcase cp_rs1 (Test source rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0xc343c0c6eb489292 + 800005b8: 00053f83 ld x31,0(x10) + 800005bc: 00850513 addi x10,x10,8 + +00000000800005c0 : +Zksh_sm3p1_cg_cp_rs1_b31: + sm3p1 x8, x31 # perform operation + 800005c0: 109f9413 sm3p1 x8,x31 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zksh_sm3p1_cg_cp_rs1_b31, Zksh_sm3p1_cg_cp_rs1_b31_str) + 800005c4: 000db203 ld x4,0(x27) + 800005c8: 00820c63 beq x4,x8,800005e0 + 800005cc: 1f4022ef jal x5,800027c0 + 800005d0: 800005c0 .word 0x800005c0 + 800005d4: 00000000 .word 0x00000000 + 800005d8: 80008e29 .word 0x80008e29 + 800005dc: 00000000 .word 0x00000000 + 800005e0: 008d8d93 addi x27,x27,8 +///////////////////////////////// +// cp_rd +///////////////////////////////// + +# Testcase cp_rd (Test destination rd = x0) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x30c73636bb72a20a + 800005e4: 00053f83 ld x31,0(x10) + 800005e8: 00850513 addi x10,x10,8 + +00000000800005ec : +Zksh_sm3p1_cg_cp_rd_b0: + sm3p1 x0, x31 # perform operation + 800005ec: 109f9013 sm3p1 x0,x31 + # Check if x0 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x0, Zksh_sm3p1_cg_cp_rd_b0, Zksh_sm3p1_cg_cp_rd_b0_str) + 800005f0: 000db203 ld x4,0(x27) + 800005f4: 00020c63 beq x4,x0,8000060c + 800005f8: 1c8022ef jal x5,800027c0 + 800005fc: 800005ec .word 0x800005ec + 80000600: 00000000 .word 0x00000000 + 80000604: 80008e5d .word 0x80008e5d + 80000608: 00000000 .word 0x00000000 + 8000060c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x1) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x26b5e81f6fa04cb0 + 80000610: 00053383 ld x7,0(x10) + 80000614: 00850513 addi x10,x10,8 + +0000000080000618 : +Zksh_sm3p1_cg_cp_rd_b1: + sm3p1 x1, x7 # perform operation + 80000618: 10939093 sm3p1 x1,x7 + # Check if x1 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x1, Zksh_sm3p1_cg_cp_rd_b1, Zksh_sm3p1_cg_cp_rd_b1_str) + 8000061c: 000db203 ld x4,0(x27) + 80000620: 00120c63 beq x4,x1,80000638 + 80000624: 19c022ef jal x5,800027c0 + 80000628: 80000618 .word 0x80000618 + 8000062c: 00000000 .word 0x00000000 + 80000630: 80008e8f .word 0x80008e8f + 80000634: 00000000 .word 0x00000000 + 80000638: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x2) + RVTEST_TESTDATA_LOAD_INT(x10, x15) # load rs1: x15 = 0x46bf5e3b1cc1774e + 8000063c: 00053783 ld x15,0(x10) + 80000640: 00850513 addi x10,x10,8 + +0000000080000644 : +Zksh_sm3p1_cg_cp_rd_b2: + sm3p1 x2, x15 # perform operation + 80000644: 10979113 sm3p1 x2,x15 + # Check if x2 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x2, Zksh_sm3p1_cg_cp_rd_b2, Zksh_sm3p1_cg_cp_rd_b2_str) + 80000648: 000db203 ld x4,0(x27) + 8000064c: 00220c63 beq x4,x2,80000664 + 80000650: 170022ef jal x5,800027c0 + 80000654: 80000644 .word 0x80000644 + 80000658: 00000000 .word 0x00000000 + 8000065c: 80008ec1 .word 0x80008ec1 + 80000660: 00000000 .word 0x00000000 + 80000664: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x3) + RVTEST_TESTDATA_LOAD_INT(x10, x7) # load rs1: x7 = 0x35268ccbc7c7073c + 80000668: 00053383 ld x7,0(x10) + 8000066c: 00850513 addi x10,x10,8 + +0000000080000670 : +Zksh_sm3p1_cg_cp_rd_b3: + sm3p1 x3, x7 # perform operation + 80000670: 10939193 sm3p1 x3,x7 + # Check if x3 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x3, Zksh_sm3p1_cg_cp_rd_b3, Zksh_sm3p1_cg_cp_rd_b3_str) + 80000674: 000db203 ld x4,0(x27) + 80000678: 00320c63 beq x4,x3,80000690 + 8000067c: 144022ef jal x5,800027c0 + 80000680: 80000670 .word 0x80000670 + 80000684: 00000000 .word 0x00000000 + 80000688: 80008ef3 .word 0x80008ef3 + 8000068c: 00000000 .word 0x00000000 + 80000690: 008d8d93 addi x27,x27,8 + + mv x7, x4 # switch temp register to avoid conflict with test + 80000694: 00020393 addi x7,x4,0 # 0 + mv x8, x5 # switch link pointer register to avoid conflict with test + 80000698: 00028413 addi x8,x5,0 +# Testcase cp_rd (Test destination rd = x4) + RVTEST_TESTDATA_LOAD_INT(x10, x31) # load rs1: x31 = 0x4914c26e7d66116c + 8000069c: 00053f83 ld x31,0(x10) + 800006a0: 00850513 addi x10,x10,8 + +00000000800006a4 : +Zksh_sm3p1_cg_cp_rd_b4: + sm3p1 x4, x31 # perform operation + 800006a4: 109f9213 sm3p1 x4,x31 + # Check if x4 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x4, Zksh_sm3p1_cg_cp_rd_b4, Zksh_sm3p1_cg_cp_rd_b4_str) + 800006a8: 000db383 ld x7,0(x27) + 800006ac: 00438c63 beq x7,x4,800006c4 + 800006b0: 1280246f jal x8,800027d8 + 800006b4: 800006a4 .word 0x800006a4 + 800006b8: 00000000 .word 0x00000000 + 800006bc: 80008f25 .word 0x80008f25 + 800006c0: 00000000 .word 0x00000000 + 800006c4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x5) + RVTEST_TESTDATA_LOAD_INT(x10, x23) # load rs1: x23 = 0xd09cac424e8400f4 + 800006c8: 00053b83 ld x23,0(x10) + 800006cc: 00850513 addi x10,x10,8 + +00000000800006d0 : +Zksh_sm3p1_cg_cp_rd_b5: + sm3p1 x5, x23 # perform operation + 800006d0: 109b9293 sm3p1 x5,x23 + # Check if x5 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x5, Zksh_sm3p1_cg_cp_rd_b5, Zksh_sm3p1_cg_cp_rd_b5_str) + 800006d4: 000db383 ld x7,0(x27) + 800006d8: 00538c63 beq x7,x5,800006f0 + 800006dc: 0fc0246f jal x8,800027d8 + 800006e0: 800006d0 .word 0x800006d0 + 800006e4: 00000000 .word 0x00000000 + 800006e8: 80008f57 .word 0x80008f57 + 800006ec: 00000000 .word 0x00000000 + 800006f0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x6) + RVTEST_TESTDATA_LOAD_INT(x10, x9) # load rs1: x9 = 0xeaa6d54579048d94 + 800006f4: 00053483 ld x9,0(x10) + 800006f8: 00850513 addi x10,x10,8 + +00000000800006fc : +Zksh_sm3p1_cg_cp_rd_b6: + sm3p1 x6, x9 # perform operation + 800006fc: 10949313 sm3p1 x6,x9 + # Check if x6 contains the expected result. x27 is the signature ptr, x8 is the link ptr, x7 is a temp reg. + RVTEST_SIGUPD(x27, x8, x7, x6, Zksh_sm3p1_cg_cp_rd_b6, Zksh_sm3p1_cg_cp_rd_b6_str) + 80000700: 000db383 ld x7,0(x27) + 80000704: 00638c63 beq x7,x6,8000071c + 80000708: 0d00246f jal x8,800027d8 + 8000070c: 800006fc .word 0x800006fc + 80000710: 00000000 .word 0x00000000 + 80000714: 80008f89 .word 0x80008f89 + 80000718: 00000000 .word 0x00000000 + 8000071c: 008d8d93 addi x27,x27,8 + + mv x4, x7 # switch temp register to avoid conflict with test + 80000720: 00038213 addi x4,x7,0 + mv x5, x8 # switch link pointer register to avoid conflict with test + 80000724: 00040293 addi x5,x8,0 +# Testcase cp_rd (Test destination rd = x7) + RVTEST_TESTDATA_LOAD_INT(x10, x11) # load rs1: x11 = 0x26a469c576ab0e32 + 80000728: 00053583 ld x11,0(x10) + 8000072c: 00850513 addi x10,x10,8 + +0000000080000730 : +Zksh_sm3p1_cg_cp_rd_b7: + sm3p1 x7, x11 # perform operation + 80000730: 10959393 sm3p1 x7,x11 + # Check if x7 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x7, Zksh_sm3p1_cg_cp_rd_b7, Zksh_sm3p1_cg_cp_rd_b7_str) + 80000734: 000db203 ld x4,0(x27) + 80000738: 00720c63 beq x4,x7,80000750 + 8000073c: 084022ef jal x5,800027c0 + 80000740: 80000730 .word 0x80000730 + 80000744: 00000000 .word 0x00000000 + 80000748: 80008fbb .word 0x80008fbb + 8000074c: 00000000 .word 0x00000000 + 80000750: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x8) + RVTEST_TESTDATA_LOAD_INT(x10, x0) # load rs1: x0 = 0x471b9dcefd257b96 + 80000754: 00053003 ld x0,0(x10) + 80000758: 00850513 addi x10,x10,8 + +000000008000075c : +Zksh_sm3p1_cg_cp_rd_b8: + sm3p1 x8, x0 # perform operation + 8000075c: 10901413 sm3p1 x8,x0 + # Check if x8 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x8, Zksh_sm3p1_cg_cp_rd_b8, Zksh_sm3p1_cg_cp_rd_b8_str) + 80000760: 000db203 ld x4,0(x27) + 80000764: 00820c63 beq x4,x8,8000077c + 80000768: 058022ef jal x5,800027c0 + 8000076c: 8000075c .word 0x8000075c + 80000770: 00000000 .word 0x00000000 + 80000774: 80008fed .word 0x80008fed + 80000778: 00000000 .word 0x00000000 + 8000077c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x9) + RVTEST_TESTDATA_LOAD_INT(x10, x6) # load rs1: x6 = 0x74ded32c187029af + 80000780: 00053303 ld x6,0(x10) + 80000784: 00850513 addi x10,x10,8 + +0000000080000788 : +Zksh_sm3p1_cg_cp_rd_b9: + sm3p1 x9, x6 # perform operation + 80000788: 10931493 sm3p1 x9,x6 + # Check if x9 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x9, Zksh_sm3p1_cg_cp_rd_b9, Zksh_sm3p1_cg_cp_rd_b9_str) + 8000078c: 000db203 ld x4,0(x27) + 80000790: 00920c63 beq x4,x9,800007a8 + 80000794: 02c022ef jal x5,800027c0 + 80000798: 80000788 .word 0x80000788 + 8000079c: 00000000 .word 0x00000000 + 800007a0: 8000901f .word 0x8000901f + 800007a4: 00000000 .word 0x00000000 + 800007a8: 008d8d93 addi x27,x27,8 + + mv x12, x10 # switch data pointer register to avoid conflict with test + 800007ac: 00050613 addi x12,x10,0 +# Testcase cp_rd (Test destination rd = x10) + RVTEST_TESTDATA_LOAD_INT(x12, x6) # load rs1: x6 = 0xe7c0392ea5f64300 + 800007b0: 00063303 ld x6,0(x12) + 800007b4: 00860613 addi x12,x12,8 + +00000000800007b8 : +Zksh_sm3p1_cg_cp_rd_b10: + sm3p1 x10, x6 # perform operation + 800007b8: 10931513 sm3p1 x10,x6 + # Check if x10 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x10, Zksh_sm3p1_cg_cp_rd_b10, Zksh_sm3p1_cg_cp_rd_b10_str) + 800007bc: 000db203 ld x4,0(x27) + 800007c0: 00a20c63 beq x4,x10,800007d8 + 800007c4: 7fd012ef jal x5,800027c0 + 800007c8: 800007b8 .word 0x800007b8 + 800007cc: 00000000 .word 0x00000000 + 800007d0: 80009051 .word 0x80009051 + 800007d4: 00000000 .word 0x00000000 + 800007d8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x11) + RVTEST_TESTDATA_LOAD_INT(x12, x14) # load rs1: x14 = 0xda397fccf71a389a + 800007dc: 00063703 ld x14,0(x12) + 800007e0: 00860613 addi x12,x12,8 + +00000000800007e4 : +Zksh_sm3p1_cg_cp_rd_b11: + sm3p1 x11, x14 # perform operation + 800007e4: 10971593 sm3p1 x11,x14 + # Check if x11 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x11, Zksh_sm3p1_cg_cp_rd_b11, Zksh_sm3p1_cg_cp_rd_b11_str) + 800007e8: 000db203 ld x4,0(x27) + 800007ec: 00b20c63 beq x4,x11,80000804 + 800007f0: 7d1012ef jal x5,800027c0 + 800007f4: 800007e4 .word 0x800007e4 + 800007f8: 00000000 .word 0x00000000 + 800007fc: 80009084 .word 0x80009084 + 80000800: 00000000 .word 0x00000000 + 80000804: 008d8d93 addi x27,x27,8 + + mv x30, x12 # switch data pointer register to avoid conflict with test + 80000808: 00060f13 addi x30,x12,0 +# Testcase cp_rd (Test destination rd = x12) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x173fe7a5ac8b6eda + 8000080c: 000f3003 ld x0,0(x30) + 80000810: 008f0f13 addi x30,x30,8 + +0000000080000814 : +Zksh_sm3p1_cg_cp_rd_b12: + sm3p1 x12, x0 # perform operation + 80000814: 10901613 sm3p1 x12,x0 + # Check if x12 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x12, Zksh_sm3p1_cg_cp_rd_b12, Zksh_sm3p1_cg_cp_rd_b12_str) + 80000818: 000db203 ld x4,0(x27) + 8000081c: 00c20c63 beq x4,x12,80000834 + 80000820: 7a1012ef jal x5,800027c0 + 80000824: 80000814 .word 0x80000814 + 80000828: 00000000 .word 0x00000000 + 8000082c: 800090b7 .word 0x800090b7 + 80000830: 00000000 .word 0x00000000 + 80000834: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x13) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x146f0a20198fbfcc + 80000838: 000f3a03 ld x20,0(x30) + 8000083c: 008f0f13 addi x30,x30,8 + +0000000080000840 : +Zksh_sm3p1_cg_cp_rd_b13: + sm3p1 x13, x20 # perform operation + 80000840: 109a1693 sm3p1 x13,x20 + # Check if x13 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x13, Zksh_sm3p1_cg_cp_rd_b13, Zksh_sm3p1_cg_cp_rd_b13_str) + 80000844: 000db203 ld x4,0(x27) + 80000848: 00d20c63 beq x4,x13,80000860 + 8000084c: 775012ef jal x5,800027c0 + 80000850: 80000840 .word 0x80000840 + 80000854: 00000000 .word 0x00000000 + 80000858: 800090ea .word 0x800090ea + 8000085c: 00000000 .word 0x00000000 + 80000860: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x14) + RVTEST_TESTDATA_LOAD_INT(x30, x29) # load rs1: x29 = 0x6f7f57a096ebee17 + 80000864: 000f3e83 ld x29,0(x30) + 80000868: 008f0f13 addi x30,x30,8 + +000000008000086c : +Zksh_sm3p1_cg_cp_rd_b14: + sm3p1 x14, x29 # perform operation + 8000086c: 109e9713 sm3p1 x14,x29 + # Check if x14 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x14, Zksh_sm3p1_cg_cp_rd_b14, Zksh_sm3p1_cg_cp_rd_b14_str) + 80000870: 000db203 ld x4,0(x27) + 80000874: 00e20c63 beq x4,x14,8000088c + 80000878: 749012ef jal x5,800027c0 + 8000087c: 8000086c .word 0x8000086c + 80000880: 00000000 .word 0x00000000 + 80000884: 8000911d .word 0x8000911d + 80000888: 00000000 .word 0x00000000 + 8000088c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x15) + RVTEST_TESTDATA_LOAD_INT(x30, x20) # load rs1: x20 = 0x3c5ebaab01c7bfa7 + 80000890: 000f3a03 ld x20,0(x30) + 80000894: 008f0f13 addi x30,x30,8 + +0000000080000898 : +Zksh_sm3p1_cg_cp_rd_b15: + sm3p1 x15, x20 # perform operation + 80000898: 109a1793 sm3p1 x15,x20 + # Check if x15 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x15, Zksh_sm3p1_cg_cp_rd_b15, Zksh_sm3p1_cg_cp_rd_b15_str) + 8000089c: 000db203 ld x4,0(x27) + 800008a0: 00f20c63 beq x4,x15,800008b8 + 800008a4: 71d012ef jal x5,800027c0 + 800008a8: 80000898 .word 0x80000898 + 800008ac: 00000000 .word 0x00000000 + 800008b0: 80009150 .word 0x80009150 + 800008b4: 00000000 .word 0x00000000 + 800008b8: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x16) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0x7398c42381439965 + 800008bc: 000f3003 ld x0,0(x30) + 800008c0: 008f0f13 addi x30,x30,8 + +00000000800008c4 : +Zksh_sm3p1_cg_cp_rd_b16: + sm3p1 x16, x0 # perform operation + 800008c4: 10901813 sm3p1 x16,x0 + # Check if x16 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x16, Zksh_sm3p1_cg_cp_rd_b16, Zksh_sm3p1_cg_cp_rd_b16_str) + 800008c8: 000db203 ld x4,0(x27) + 800008cc: 01020c63 beq x4,x16,800008e4 + 800008d0: 6f1012ef jal x5,800027c0 + 800008d4: 800008c4 .word 0x800008c4 + 800008d8: 00000000 .word 0x00000000 + 800008dc: 80009183 .word 0x80009183 + 800008e0: 00000000 .word 0x00000000 + 800008e4: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x17) + RVTEST_TESTDATA_LOAD_INT(x30, x19) # load rs1: x19 = 0xa101b9bc627586e9 + 800008e8: 000f3983 ld x19,0(x30) + 800008ec: 008f0f13 addi x30,x30,8 + +00000000800008f0 : +Zksh_sm3p1_cg_cp_rd_b17: + sm3p1 x17, x19 # perform operation + 800008f0: 10999893 sm3p1 x17,x19 + # Check if x17 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x17, Zksh_sm3p1_cg_cp_rd_b17, Zksh_sm3p1_cg_cp_rd_b17_str) + 800008f4: 000db203 ld x4,0(x27) + 800008f8: 01120c63 beq x4,x17,80000910 + 800008fc: 6c5012ef jal x5,800027c0 + 80000900: 800008f0 .word 0x800008f0 + 80000904: 00000000 .word 0x00000000 + 80000908: 800091b6 .word 0x800091b6 + 8000090c: 00000000 .word 0x00000000 + 80000910: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x18) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x9e536253f964158c + 80000914: 000f3c83 ld x25,0(x30) + 80000918: 008f0f13 addi x30,x30,8 + +000000008000091c : +Zksh_sm3p1_cg_cp_rd_b18: + sm3p1 x18, x25 # perform operation + 8000091c: 109c9913 sm3p1 x18,x25 + # Check if x18 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x18, Zksh_sm3p1_cg_cp_rd_b18, Zksh_sm3p1_cg_cp_rd_b18_str) + 80000920: 000db203 ld x4,0(x27) + 80000924: 01220c63 beq x4,x18,8000093c + 80000928: 699012ef jal x5,800027c0 + 8000092c: 8000091c .word 0x8000091c + 80000930: 00000000 .word 0x00000000 + 80000934: 800091e9 .word 0x800091e9 + 80000938: 00000000 .word 0x00000000 + 8000093c: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x19) + RVTEST_TESTDATA_LOAD_INT(x30, x17) # load rs1: x17 = 0x81c5200198622b83 + 80000940: 000f3883 ld x17,0(x30) + 80000944: 008f0f13 addi x30,x30,8 + +0000000080000948 : +Zksh_sm3p1_cg_cp_rd_b19: + sm3p1 x19, x17 # perform operation + 80000948: 10989993 sm3p1 x19,x17 + # Check if x19 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x19, Zksh_sm3p1_cg_cp_rd_b19, Zksh_sm3p1_cg_cp_rd_b19_str) + 8000094c: 000db203 ld x4,0(x27) + 80000950: 01320c63 beq x4,x19,80000968 + 80000954: 66d012ef jal x5,800027c0 + 80000958: 80000948 .word 0x80000948 + 8000095c: 00000000 .word 0x00000000 + 80000960: 8000921c .word 0x8000921c + 80000964: 00000000 .word 0x00000000 + 80000968: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x20) + RVTEST_TESTDATA_LOAD_INT(x30, x6) # load rs1: x6 = 0x07cfeb4432341216 + 8000096c: 000f3303 ld x6,0(x30) + 80000970: 008f0f13 addi x30,x30,8 + +0000000080000974 : +Zksh_sm3p1_cg_cp_rd_b20: + sm3p1 x20, x6 # perform operation + 80000974: 10931a13 sm3p1 x20,x6 + # Check if x20 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x20, Zksh_sm3p1_cg_cp_rd_b20, Zksh_sm3p1_cg_cp_rd_b20_str) + 80000978: 000db203 ld x4,0(x27) + 8000097c: 01420c63 beq x4,x20,80000994 + 80000980: 641012ef jal x5,800027c0 + 80000984: 80000974 .word 0x80000974 + 80000988: 00000000 .word 0x00000000 + 8000098c: 8000924f .word 0x8000924f + 80000990: 00000000 .word 0x00000000 + 80000994: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x21) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x3612c823d685fe10 + 80000998: 000f3503 ld x10,0(x30) + 8000099c: 008f0f13 addi x30,x30,8 + +00000000800009a0 : +Zksh_sm3p1_cg_cp_rd_b21: + sm3p1 x21, x10 # perform operation + 800009a0: 10951a93 sm3p1 x21,x10 + # Check if x21 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x21, Zksh_sm3p1_cg_cp_rd_b21, Zksh_sm3p1_cg_cp_rd_b21_str) + 800009a4: 000db203 ld x4,0(x27) + 800009a8: 01520c63 beq x4,x21,800009c0 + 800009ac: 615012ef jal x5,800027c0 + 800009b0: 800009a0 .word 0x800009a0 + 800009b4: 00000000 .word 0x00000000 + 800009b8: 80009282 .word 0x80009282 + 800009bc: 00000000 .word 0x00000000 + 800009c0: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x22) + RVTEST_TESTDATA_LOAD_INT(x30, x18) # load rs1: x18 = 0xcbe1de8bc1bc2242 + 800009c4: 000f3903 ld x18,0(x30) + 800009c8: 008f0f13 addi x30,x30,8 + +00000000800009cc : +Zksh_sm3p1_cg_cp_rd_b22: + sm3p1 x22, x18 # perform operation + 800009cc: 10991b13 sm3p1 x22,x18 + # Check if x22 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x22, Zksh_sm3p1_cg_cp_rd_b22, Zksh_sm3p1_cg_cp_rd_b22_str) + 800009d0: 000db203 ld x4,0(x27) + 800009d4: 01620c63 beq x4,x22,800009ec + 800009d8: 5e9012ef jal x5,800027c0 + 800009dc: 800009cc .word 0x800009cc + 800009e0: 00000000 .word 0x00000000 + 800009e4: 800092b5 .word 0x800092b5 + 800009e8: 00000000 .word 0x00000000 + 800009ec: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x23) + RVTEST_TESTDATA_LOAD_INT(x30, x24) # load rs1: x24 = 0x48e0c23653f26424 + 800009f0: 000f3c03 ld x24,0(x30) + 800009f4: 008f0f13 addi x30,x30,8 + +00000000800009f8 : +Zksh_sm3p1_cg_cp_rd_b23: + sm3p1 x23, x24 # perform operation + 800009f8: 109c1b93 sm3p1 x23,x24 + # Check if x23 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x23, Zksh_sm3p1_cg_cp_rd_b23, Zksh_sm3p1_cg_cp_rd_b23_str) + 800009fc: 000db203 ld x4,0(x27) + 80000a00: 01720c63 beq x4,x23,80000a18 + 80000a04: 5bd012ef jal x5,800027c0 + 80000a08: 800009f8 .word 0x800009f8 + 80000a0c: 00000000 .word 0x00000000 + 80000a10: 800092e8 .word 0x800092e8 + 80000a14: 00000000 .word 0x00000000 + 80000a18: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x24) + RVTEST_TESTDATA_LOAD_INT(x30, x0) # load rs1: x0 = 0xc0a4d3d817e4bb76 + 80000a1c: 000f3003 ld x0,0(x30) + 80000a20: 008f0f13 addi x30,x30,8 + +0000000080000a24 : +Zksh_sm3p1_cg_cp_rd_b24: + sm3p1 x24, x0 # perform operation + 80000a24: 10901c13 sm3p1 x24,x0 + # Check if x24 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x24, Zksh_sm3p1_cg_cp_rd_b24, Zksh_sm3p1_cg_cp_rd_b24_str) + 80000a28: 000db203 ld x4,0(x27) + 80000a2c: 01820c63 beq x4,x24,80000a44 + 80000a30: 591012ef jal x5,800027c0 + 80000a34: 80000a24 .word 0x80000a24 + 80000a38: 00000000 .word 0x00000000 + 80000a3c: 8000931b .word 0x8000931b + 80000a40: 00000000 .word 0x00000000 + 80000a44: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x25) + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs1: x31 = 0x2b19408c7cfd6b27 + 80000a48: 000f3f83 ld x31,0(x30) + 80000a4c: 008f0f13 addi x30,x30,8 + +0000000080000a50 : +Zksh_sm3p1_cg_cp_rd_b25: + sm3p1 x25, x31 # perform operation + 80000a50: 109f9c93 sm3p1 x25,x31 + # Check if x25 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x25, Zksh_sm3p1_cg_cp_rd_b25, Zksh_sm3p1_cg_cp_rd_b25_str) + 80000a54: 000db203 ld x4,0(x27) + 80000a58: 01920c63 beq x4,x25,80000a70 + 80000a5c: 565012ef jal x5,800027c0 + 80000a60: 80000a50 .word 0x80000a50 + 80000a64: 00000000 .word 0x00000000 + 80000a68: 8000934e .word 0x8000934e + 80000a6c: 00000000 .word 0x00000000 + 80000a70: 008d8d93 addi x27,x27,8 + +# Testcase cp_rd (Test destination rd = x26) + RVTEST_TESTDATA_LOAD_INT(x30, x12) # load rs1: x12 = 0x99fee4e17141ee7e + 80000a74: 000f3603 ld x12,0(x30) + 80000a78: 008f0f13 addi x30,x30,8 + +0000000080000a7c : +Zksh_sm3p1_cg_cp_rd_b26: + sm3p1 x26, x12 # perform operation + 80000a7c: 10961d13 sm3p1 x26,x12 + # Check if x26 contains the expected result. x27 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x27, x5, x4, x26, Zksh_sm3p1_cg_cp_rd_b26, Zksh_sm3p1_cg_cp_rd_b26_str) + 80000a80: 000db203 ld x4,0(x27) + 80000a84: 01a20c63 beq x4,x26,80000a9c + 80000a88: 539012ef jal x5,800027c0 + 80000a8c: 80000a7c .word 0x80000a7c + 80000a90: 00000000 .word 0x00000000 + 80000a94: 80009381 .word 0x80009381 + 80000a98: 00000000 .word 0x00000000 + 80000a9c: 008d8d93 addi x27,x27,8 + + mv x26, x27 # switch signature pointer register to avoid conflict with test + 80000aa0: 000d8d13 addi x26,x27,0 +# Testcase cp_rd (Test destination rd = x27) + RVTEST_TESTDATA_LOAD_INT(x30, x10) # load rs1: x10 = 0x0cbe7a85967021ba + 80000aa4: 000f3503 ld x10,0(x30) + 80000aa8: 008f0f13 addi x30,x30,8 + +0000000080000aac : +Zksh_sm3p1_cg_cp_rd_b27: + sm3p1 x27, x10 # perform operation + 80000aac: 10951d93 sm3p1 x27,x10 + # Check if x27 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x27, Zksh_sm3p1_cg_cp_rd_b27, Zksh_sm3p1_cg_cp_rd_b27_str) + 80000ab0: 000d3203 ld x4,0(x26) + 80000ab4: 01b20c63 beq x4,x27,80000acc + 80000ab8: 509012ef jal x5,800027c0 + 80000abc: 80000aac .word 0x80000aac + 80000ac0: 00000000 .word 0x00000000 + 80000ac4: 800093b4 .word 0x800093b4 + 80000ac8: 00000000 .word 0x00000000 + 80000acc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x28) + RVTEST_TESTDATA_LOAD_INT(x30, x31) # load rs1: x31 = 0x523ab8ce0bd2dfc6 + 80000ad0: 000f3f83 ld x31,0(x30) + 80000ad4: 008f0f13 addi x30,x30,8 + +0000000080000ad8 : +Zksh_sm3p1_cg_cp_rd_b28: + sm3p1 x28, x31 # perform operation + 80000ad8: 109f9e13 sm3p1 x28,x31 + # Check if x28 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x28, Zksh_sm3p1_cg_cp_rd_b28, Zksh_sm3p1_cg_cp_rd_b28_str) + 80000adc: 000d3203 ld x4,0(x26) + 80000ae0: 01c20c63 beq x4,x28,80000af8 + 80000ae4: 4dd012ef jal x5,800027c0 + 80000ae8: 80000ad8 .word 0x80000ad8 + 80000aec: 00000000 .word 0x00000000 + 80000af0: 800093e7 .word 0x800093e7 + 80000af4: 00000000 .word 0x00000000 + 80000af8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x29) + RVTEST_TESTDATA_LOAD_INT(x30, x25) # load rs1: x25 = 0x18e636b1bc4c4f95 + 80000afc: 000f3c83 ld x25,0(x30) + 80000b00: 008f0f13 addi x30,x30,8 + +0000000080000b04 : +Zksh_sm3p1_cg_cp_rd_b29: + sm3p1 x29, x25 # perform operation + 80000b04: 109c9e93 sm3p1 x29,x25 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zksh_sm3p1_cg_cp_rd_b29, Zksh_sm3p1_cg_cp_rd_b29_str) + 80000b08: 000d3203 ld x4,0(x26) + 80000b0c: 01d20c63 beq x4,x29,80000b24 + 80000b10: 4b1012ef jal x5,800027c0 + 80000b14: 80000b04 .word 0x80000b04 + 80000b18: 00000000 .word 0x00000000 + 80000b1c: 8000941a .word 0x8000941a + 80000b20: 00000000 .word 0x00000000 + 80000b24: 008d0d13 addi x26,x26,8 + + mv x6, x30 # switch data pointer register to avoid conflict with test + 80000b28: 000f0313 addi x6,x30,0 +# Testcase cp_rd (Test destination rd = x30) + RVTEST_TESTDATA_LOAD_INT(x6, x19) # load rs1: x19 = 0x783a1b916cb6c9e7 + 80000b2c: 00033983 ld x19,0(x6) + 80000b30: 00830313 addi x6,x6,8 + +0000000080000b34 : +Zksh_sm3p1_cg_cp_rd_b30: + sm3p1 x30, x19 # perform operation + 80000b34: 10999f13 sm3p1 x30,x19 + # Check if x30 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x30, Zksh_sm3p1_cg_cp_rd_b30, Zksh_sm3p1_cg_cp_rd_b30_str) + 80000b38: 000d3203 ld x4,0(x26) + 80000b3c: 01e20c63 beq x4,x30,80000b54 + 80000b40: 481012ef jal x5,800027c0 + 80000b44: 80000b34 .word 0x80000b34 + 80000b48: 00000000 .word 0x00000000 + 80000b4c: 8000944d .word 0x8000944d + 80000b50: 00000000 .word 0x00000000 + 80000b54: 008d0d13 addi x26,x26,8 + +# Testcase cp_rd (Test destination rd = x31) + RVTEST_TESTDATA_LOAD_INT(x6, x22) # load rs1: x22 = 0x2e8f47486d2b3f62 + 80000b58: 00033b03 ld x22,0(x6) + 80000b5c: 00830313 addi x6,x6,8 + +0000000080000b60 : +Zksh_sm3p1_cg_cp_rd_b31: + sm3p1 x31, x22 # perform operation + 80000b60: 109b1f93 sm3p1 x31,x22 + # Check if x31 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x31, Zksh_sm3p1_cg_cp_rd_b31, Zksh_sm3p1_cg_cp_rd_b31_str) + 80000b64: 000d3203 ld x4,0(x26) + 80000b68: 01f20c63 beq x4,x31,80000b80 + 80000b6c: 455012ef jal x5,800027c0 + 80000b70: 80000b60 .word 0x80000b60 + 80000b74: 00000000 .word 0x00000000 + 80000b78: 80009480 .word 0x80009480 + 80000b7c: 00000000 .word 0x00000000 + 80000b80: 008d0d13 addi x26,x26,8 +///////////////////////////////// +// cp_rs1_edges +///////////////////////////////// + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x16) # load rs1: x16 = 0x0000000000000000 + 80000b84: 00033803 ld x16,0(x6) + 80000b88: 00830313 addi x6,x6,8 + +0000000080000b8c : +Zksh_sm3p1_cg_cp_rs1_edges_0x0: + sm3p1 x13, x16 # perform operation + 80000b8c: 10981693 sm3p1 x13,x16 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zksh_sm3p1_cg_cp_rs1_edges_0x0, Zksh_sm3p1_cg_cp_rs1_edges_0x0_str) + 80000b90: 000d3203 ld x4,0(x26) + 80000b94: 00d20c63 beq x4,x13,80000bac + 80000b98: 429012ef jal x5,800027c0 + 80000b9c: 80000b8c .word 0x80000b8c + 80000ba0: 00000000 .word 0x00000000 + 80000ba4: 800094b3 .word 0x800094b3 + 80000ba8: 00000000 .word 0x00000000 + 80000bac: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x0000000000000001 + 80000bb0: 00033e83 ld x29,0(x6) + 80000bb4: 00830313 addi x6,x6,8 + +0000000080000bb8 : +Zksh_sm3p1_cg_cp_rs1_edges_0x1: + sm3p1 x19, x29 # perform operation + 80000bb8: 109e9993 sm3p1 x19,x29 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zksh_sm3p1_cg_cp_rs1_edges_0x1, Zksh_sm3p1_cg_cp_rs1_edges_0x1_str) + 80000bbc: 000d3203 ld x4,0(x26) + 80000bc0: 01320c63 beq x4,x19,80000bd8 + 80000bc4: 3fd012ef jal x5,800027c0 + 80000bc8: 80000bb8 .word 0x80000bb8 + 80000bcc: 00000000 .word 0x00000000 + 80000bd0: 800094ed .word 0x800094ed + 80000bd4: 00000000 .word 0x00000000 + 80000bd8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000000000002) + RVTEST_TESTDATA_LOAD_INT(x6, x9) # load rs1: x9 = 0x0000000000000002 + 80000bdc: 00033483 ld x9,0(x6) + 80000be0: 00830313 addi x6,x6,8 + +0000000080000be4 : +Zksh_sm3p1_cg_cp_rs1_edges_0x2: + sm3p1 x8, x9 # perform operation + 80000be4: 10949413 sm3p1 x8,x9 + # Check if x8 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x8, Zksh_sm3p1_cg_cp_rs1_edges_0x2, Zksh_sm3p1_cg_cp_rs1_edges_0x2_str) + 80000be8: 000d3203 ld x4,0(x26) + 80000bec: 00820c63 beq x4,x8,80000c04 + 80000bf0: 3d1012ef jal x5,800027c0 + 80000bf4: 80000be4 .word 0x80000be4 + 80000bf8: 00000000 .word 0x00000000 + 80000bfc: 80009527 .word 0x80009527 + 80000c00: 00000000 .word 0x00000000 + 80000c04: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000000) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0x8000000000000000 + 80000c08: 00033883 ld x17,0(x6) + 80000c0c: 00830313 addi x6,x6,8 + +0000000080000c10 : +Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000000: + sm3p1 x31, x17 # perform operation + 80000c10: 10989f93 sm3p1 x31,x17 + # Check if x31 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000000, Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000000_str) + 80000c14: 000d3203 ld x4,0(x26) + 80000c18: 01f20c63 beq x4,x31,80000c30 + 80000c1c: 3a5012ef jal x5,800027c0 + 80000c20: 80000c10 .word 0x80000c10 + 80000c24: 00000000 .word 0x00000000 + 80000c28: 80009561 .word 0x80009561 + 80000c2c: 00000000 .word 0x00000000 + 80000c30: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x8000000000000001) + RVTEST_TESTDATA_LOAD_INT(x6, x12) # load rs1: x12 = 0x8000000000000001 + 80000c34: 00033603 ld x12,0(x6) + 80000c38: 00830313 addi x6,x6,8 + +0000000080000c3c : +Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000001: + sm3p1 x25, x12 # perform operation + 80000c3c: 10961c93 sm3p1 x25,x12 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000001, Zksh_sm3p1_cg_cp_rs1_edges_0x8000000000000001_str) + 80000c40: 000d3203 ld x4,0(x26) + 80000c44: 01920c63 beq x4,x25,80000c5c + 80000c48: 379012ef jal x5,800027c0 + 80000c4c: 80000c3c .word 0x80000c3c + 80000c50: 00000000 .word 0x00000000 + 80000c54: 800095aa .word 0x800095aa + 80000c58: 00000000 .word 0x00000000 + 80000c5c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7fffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0x7fffffffffffffff + 80000c60: 00033083 ld x1,0(x6) + 80000c64: 00830313 addi x6,x6,8 + +0000000080000c68 : +Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffffffffffff: + sm3p1 x29, x1 # perform operation + 80000c68: 10909e93 sm3p1 x29,x1 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffffffffffff, Zksh_sm3p1_cg_cp_rs1_edges_0x7fffffffffffffff_str) + 80000c6c: 000d3203 ld x4,0(x26) + 80000c70: 01d20c63 beq x4,x29,80000c88 + 80000c74: 34d012ef jal x5,800027c0 + 80000c78: 80000c68 .word 0x80000c68 + 80000c7c: 00000000 .word 0x00000000 + 80000c80: 800095f3 .word 0x800095f3 + 80000c84: 00000000 .word 0x00000000 + 80000c88: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x7ffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x7ffffffffffffffe + 80000c8c: 00033f83 ld x31,0(x6) + 80000c90: 00830313 addi x6,x6,8 + +0000000080000c94 : +Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffffffffffe: + sm3p1 x2, x31 # perform operation + 80000c94: 109f9113 sm3p1 x2,x31 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffffffffffe, Zksh_sm3p1_cg_cp_rs1_edges_0x7ffffffffffffffe_str) + 80000c98: 000d3203 ld x4,0(x26) + 80000c9c: 00220c63 beq x4,x2,80000cb4 + 80000ca0: 321012ef jal x5,800027c0 + 80000ca4: 80000c94 .word 0x80000c94 + 80000ca8: 00000000 .word 0x00000000 + 80000cac: 8000963c .word 0x8000963c + 80000cb0: 00000000 .word 0x00000000 + 80000cb4: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xffffffffffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0xffffffffffffffff + 80000cb8: 00033903 ld x18,0(x6) + 80000cbc: 00830313 addi x6,x6,8 + +0000000080000cc0 : +Zksh_sm3p1_cg_cp_rs1_edges_0xffffffffffffffff: + sm3p1 x30, x18 # perform operation + 80000cc0: 10991f13 sm3p1 x30,x18 + # Check if x30 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x30, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffffffffffff, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffffffffffff_str) + 80000cc4: 000d3203 ld x4,0(x26) + 80000cc8: 01e20c63 beq x4,x30,80000ce0 + 80000ccc: 2f5012ef jal x5,800027c0 + 80000cd0: 80000cc0 .word 0x80000cc0 + 80000cd4: 00000000 .word 0x00000000 + 80000cd8: 80009685 .word 0x80009685 + 80000cdc: 00000000 .word 0x00000000 + 80000ce0: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xfffffffffffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x17) # load rs1: x17 = 0xfffffffffffffffe + 80000ce4: 00033883 ld x17,0(x6) + 80000ce8: 00830313 addi x6,x6,8 + +0000000080000cec : +Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffffffffffe: + sm3p1 x31, x17 # perform operation + 80000cec: 10989f93 sm3p1 x31,x17 + # Check if x31 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x31, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffffffffffe, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffffffffffe_str) + 80000cf0: 000d3203 ld x4,0(x26) + 80000cf4: 01f20c63 beq x4,x31,80000d0c + 80000cf8: 2c9012ef jal x5,800027c0 + 80000cfc: 80000cec .word 0x80000cec + 80000d00: 00000000 .word 0x00000000 + 80000d04: 800096ce .word 0x800096ce + 80000d08: 00000000 .word 0x00000000 + 80000d0c: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5bbc887763ae86f2) + RVTEST_TESTDATA_LOAD_INT(x6, x18) # load rs1: x18 = 0x5bbc887763ae86f2 + 80000d10: 00033903 ld x18,0(x6) + 80000d14: 00830313 addi x6,x6,8 + +0000000080000d18 : +Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc887763ae86f2: + sm3p1 x3, x18 # perform operation + 80000d18: 10991193 sm3p1 x3,x18 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc887763ae86f2, Zksh_sm3p1_cg_cp_rs1_edges_0x5bbc887763ae86f2_str) + 80000d1c: 000d3203 ld x4,0(x26) + 80000d20: 00320c63 beq x4,x3,80000d38 + 80000d24: 29d012ef jal x5,800027c0 + 80000d28: 80000d18 .word 0x80000d18 + 80000d2c: 00000000 .word 0x00000000 + 80000d30: 80009717 .word 0x80009717 + 80000d34: 00000000 .word 0x00000000 + 80000d38: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0xaaaaaaaaaaaaaaaa) + RVTEST_TESTDATA_LOAD_INT(x6, x8) # load rs1: x8 = 0xaaaaaaaaaaaaaaaa + 80000d3c: 00033403 ld x8,0(x6) + 80000d40: 00830313 addi x6,x6,8 + +0000000080000d44 : +Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa: + sm3p1 x20, x8 # perform operation + 80000d44: 10941a13 sm3p1 x20,x8 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa, Zksh_sm3p1_cg_cp_rs1_edges_0xaaaaaaaaaaaaaaaa_str) + 80000d48: 000d3203 ld x4,0(x26) + 80000d4c: 01420c63 beq x4,x20,80000d64 + 80000d50: 271012ef jal x5,800027c0 + 80000d54: 80000d44 .word 0x80000d44 + 80000d58: 00000000 .word 0x00000000 + 80000d5c: 80009760 .word 0x80009760 + 80000d60: 00000000 .word 0x00000000 + 80000d64: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x5555555555555555) + RVTEST_TESTDATA_LOAD_INT(x6, x29) # load rs1: x29 = 0x5555555555555555 + 80000d68: 00033e83 ld x29,0(x6) + 80000d6c: 00830313 addi x6,x6,8 + +0000000080000d70 : +Zksh_sm3p1_cg_cp_rs1_edges_0x5555555555555555: + sm3p1 x1, x29 # perform operation + 80000d70: 109e9093 sm3p1 x1,x29 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zksh_sm3p1_cg_cp_rs1_edges_0x5555555555555555, Zksh_sm3p1_cg_cp_rs1_edges_0x5555555555555555_str) + 80000d74: 000d3203 ld x4,0(x26) + 80000d78: 00120c63 beq x4,x1,80000d90 + 80000d7c: 245012ef jal x5,800027c0 + 80000d80: 80000d70 .word 0x80000d70 + 80000d84: 00000000 .word 0x00000000 + 80000d88: 800097a9 .word 0x800097a9 + 80000d8c: 00000000 .word 0x00000000 + 80000d90: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000ffffffff) + RVTEST_TESTDATA_LOAD_INT(x6, x21) # load rs1: x21 = 0x00000000ffffffff + 80000d94: 00033a83 ld x21,0(x6) + 80000d98: 00830313 addi x6,x6,8 + +0000000080000d9c : +Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff: + sm3p1 x29, x21 # perform operation + 80000d9c: 109a9e93 sm3p1 x29,x21 + # Check if x29 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x29, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff, Zksh_sm3p1_cg_cp_rs1_edges_0xffffffff_str) + 80000da0: 000d3203 ld x4,0(x26) + 80000da4: 01d20c63 beq x4,x29,80000dbc + 80000da8: 219012ef jal x5,800027c0 + 80000dac: 80000d9c .word 0x80000d9c + 80000db0: 00000000 .word 0x00000000 + 80000db4: 800097f2 .word 0x800097f2 + 80000db8: 00000000 .word 0x00000000 + 80000dbc: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x00000000fffffffe) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x00000000fffffffe + 80000dc0: 00033103 ld x2,0(x6) + 80000dc4: 00830313 addi x6,x6,8 + +0000000080000dc8 : +Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe: + sm3p1 x1, x2 # perform operation + 80000dc8: 10911093 sm3p1 x1,x2 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe, Zksh_sm3p1_cg_cp_rs1_edges_0xfffffffe_str) + 80000dcc: 000d3203 ld x4,0(x26) + 80000dd0: 00120c63 beq x4,x1,80000de8 + 80000dd4: 1ed012ef jal x5,800027c0 + 80000dd8: 80000dc8 .word 0x80000dc8 + 80000ddc: 00000000 .word 0x00000000 + 80000de0: 80009833 .word 0x80009833 + 80000de4: 00000000 .word 0x00000000 + 80000de8: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000000) + RVTEST_TESTDATA_LOAD_INT(x6, x31) # load rs1: x31 = 0x0000000100000000 + 80000dec: 00033f83 ld x31,0(x6) + 80000df0: 00830313 addi x6,x6,8 + +0000000080000df4 : +Zksh_sm3p1_cg_cp_rs1_edges_0x100000000: + sm3p1 x17, x31 # perform operation + 80000df4: 109f9893 sm3p1 x17,x31 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zksh_sm3p1_cg_cp_rs1_edges_0x100000000, Zksh_sm3p1_cg_cp_rs1_edges_0x100000000_str) + 80000df8: 000d3203 ld x4,0(x26) + 80000dfc: 01120c63 beq x4,x17,80000e14 + 80000e00: 1c1012ef jal x5,800027c0 + 80000e04: 80000df4 .word 0x80000df4 + 80000e08: 00000000 .word 0x00000000 + 80000e0c: 80009874 .word 0x80009874 + 80000e10: 00000000 .word 0x00000000 + 80000e14: 008d0d13 addi x26,x26,8 + +# Testcase cp_rs1_edges (Test source rs1 value = 0x0000000100000001) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0x0000000100000001 + 80000e18: 00033103 ld x2,0(x6) + 80000e1c: 00830313 addi x6,x6,8 + +0000000080000e20 : +Zksh_sm3p1_cg_cp_rs1_edges_0x100000001: + sm3p1 x3, x2 # perform operation + 80000e20: 10911193 sm3p1 x3,x2 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zksh_sm3p1_cg_cp_rs1_edges_0x100000001, Zksh_sm3p1_cg_cp_rs1_edges_0x100000001_str) + 80000e24: 000d3203 ld x4,0(x26) + 80000e28: 00320c63 beq x4,x3,80000e40 + 80000e2c: 195012ef jal x5,800027c0 + 80000e30: 80000e20 .word 0x80000e20 + 80000e34: 00000000 .word 0x00000000 + 80000e38: 800098b6 .word 0x800098b6 + 80000e3c: 00000000 .word 0x00000000 + 80000e40: 008d0d13 addi x26,x26,8 +///////////////////////////////// +// cmp_rd_rs1 +///////////////////////////////// + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x0) + RVTEST_TESTDATA_LOAD_INT(x6, x0) # load rs1: x0 = 0xdbd5fb3cdf5dd3d8 + 80000e44: 00033003 ld x0,0(x6) + 80000e48: 00830313 addi x6,x6,8 + +0000000080000e4c : +Zksh_sm3p1_cg_cmp_rd_rs1_b0: + sm3p1 x0, x0 # perform operation + 80000e4c: 10901013 sm3p1 x0,x0 + # Check if x0 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x0, Zksh_sm3p1_cg_cmp_rd_rs1_b0, Zksh_sm3p1_cg_cmp_rd_rs1_b0_str) + 80000e50: 000d3203 ld x4,0(x26) + 80000e54: 00020c63 beq x4,x0,80000e6c + 80000e58: 169012ef jal x5,800027c0 + 80000e5c: 80000e4c .word 0x80000e4c + 80000e60: 00000000 .word 0x00000000 + 80000e64: 800098f8 .word 0x800098f8 + 80000e68: 00000000 .word 0x00000000 + 80000e6c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x1) + RVTEST_TESTDATA_LOAD_INT(x6, x1) # load rs1: x1 = 0xc133121c0022fcb8 + 80000e70: 00033083 ld x1,0(x6) + 80000e74: 00830313 addi x6,x6,8 + +0000000080000e78 : +Zksh_sm3p1_cg_cmp_rd_rs1_b1: + sm3p1 x1, x1 # perform operation + 80000e78: 10909093 sm3p1 x1,x1 + # Check if x1 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x1, Zksh_sm3p1_cg_cmp_rd_rs1_b1, Zksh_sm3p1_cg_cmp_rd_rs1_b1_str) + 80000e7c: 000d3203 ld x4,0(x26) + 80000e80: 00120c63 beq x4,x1,80000e98 + 80000e84: 13d012ef jal x5,800027c0 + 80000e88: 80000e78 .word 0x80000e78 + 80000e8c: 00000000 .word 0x00000000 + 80000e90: 8000992f .word 0x8000992f + 80000e94: 00000000 .word 0x00000000 + 80000e98: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x2) + RVTEST_TESTDATA_LOAD_INT(x6, x2) # load rs1: x2 = 0xf34a360c0439919d + 80000e9c: 00033103 ld x2,0(x6) + 80000ea0: 00830313 addi x6,x6,8 + +0000000080000ea4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b2: + sm3p1 x2, x2 # perform operation + 80000ea4: 10911113 sm3p1 x2,x2 + # Check if x2 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x2, Zksh_sm3p1_cg_cmp_rd_rs1_b2, Zksh_sm3p1_cg_cmp_rd_rs1_b2_str) + 80000ea8: 000d3203 ld x4,0(x26) + 80000eac: 00220c63 beq x4,x2,80000ec4 + 80000eb0: 111012ef jal x5,800027c0 + 80000eb4: 80000ea4 .word 0x80000ea4 + 80000eb8: 00000000 .word 0x00000000 + 80000ebc: 80009966 .word 0x80009966 + 80000ec0: 00000000 .word 0x00000000 + 80000ec4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x3) + RVTEST_TESTDATA_LOAD_INT(x6, x3) # load rs1: x3 = 0x60d7123e1eb8bf6c + 80000ec8: 00033183 ld x3,0(x6) + 80000ecc: 00830313 addi x6,x6,8 + +0000000080000ed0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b3: + sm3p1 x3, x3 # perform operation + 80000ed0: 10919193 sm3p1 x3,x3 + # Check if x3 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x3, Zksh_sm3p1_cg_cmp_rd_rs1_b3, Zksh_sm3p1_cg_cmp_rd_rs1_b3_str) + 80000ed4: 000d3203 ld x4,0(x26) + 80000ed8: 00320c63 beq x4,x3,80000ef0 + 80000edc: 0e5012ef jal x5,800027c0 + 80000ee0: 80000ed0 .word 0x80000ed0 + 80000ee4: 00000000 .word 0x00000000 + 80000ee8: 8000999d .word 0x8000999d + 80000eec: 00000000 .word 0x00000000 + 80000ef0: 008d0d13 addi x26,x26,8 + + mv x13, x4 # switch temp register to avoid conflict with test + 80000ef4: 00020693 addi x13,x4,0 # 0 + mv x14, x5 # switch link pointer register to avoid conflict with test + 80000ef8: 00028713 addi x14,x5,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x4) + RVTEST_TESTDATA_LOAD_INT(x6, x4) # load rs1: x4 = 0xb7268eea22747781 + 80000efc: 00033203 ld x4,0(x6) + 80000f00: 00830313 addi x6,x6,8 + +0000000080000f04 : +Zksh_sm3p1_cg_cmp_rd_rs1_b4: + sm3p1 x4, x4 # perform operation + 80000f04: 10921213 sm3p1 x4,x4 + # Check if x4 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x4, Zksh_sm3p1_cg_cmp_rd_rs1_b4, Zksh_sm3p1_cg_cmp_rd_rs1_b4_str) + 80000f08: 000d3683 ld x13,0(x26) + 80000f0c: 00468c63 beq x13,x4,80000f24 + 80000f10: 0f10176f jal x14,80002800 + 80000f14: 80000f04 .word 0x80000f04 + 80000f18: 00000000 .word 0x00000000 + 80000f1c: 800099d4 .word 0x800099d4 + 80000f20: 00000000 .word 0x00000000 + 80000f24: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x5) + RVTEST_TESTDATA_LOAD_INT(x6, x5) # load rs1: x5 = 0x032b362b2391709d + 80000f28: 00033283 ld x5,0(x6) + 80000f2c: 00830313 addi x6,x6,8 + +0000000080000f30 : +Zksh_sm3p1_cg_cmp_rd_rs1_b5: + sm3p1 x5, x5 # perform operation + 80000f30: 10929293 sm3p1 x5,x5 + # Check if x5 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x5, Zksh_sm3p1_cg_cmp_rd_rs1_b5, Zksh_sm3p1_cg_cmp_rd_rs1_b5_str) + 80000f34: 000d3683 ld x13,0(x26) + 80000f38: 00568c63 beq x13,x5,80000f50 + 80000f3c: 0c50176f jal x14,80002800 + 80000f40: 80000f30 .word 0x80000f30 + 80000f44: 00000000 .word 0x00000000 + 80000f48: 80009a0b .word 0x80009a0b + 80000f4c: 00000000 .word 0x00000000 + 80000f50: 008d0d13 addi x26,x26,8 + + mv x9, x6 # switch data pointer register to avoid conflict with test + 80000f54: 00030493 addi x9,x6,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x6) + RVTEST_TESTDATA_LOAD_INT(x9, x6) # load rs1: x6 = 0x5c56654b4b89a62d + 80000f58: 0004b303 ld x6,0(x9) + 80000f5c: 00848493 addi x9,x9,8 + +0000000080000f60 : +Zksh_sm3p1_cg_cmp_rd_rs1_b6: + sm3p1 x6, x6 # perform operation + 80000f60: 10931313 sm3p1 x6,x6 + # Check if x6 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x6, Zksh_sm3p1_cg_cmp_rd_rs1_b6, Zksh_sm3p1_cg_cmp_rd_rs1_b6_str) + 80000f64: 000d3683 ld x13,0(x26) + 80000f68: 00668c63 beq x13,x6,80000f80 + 80000f6c: 0950176f jal x14,80002800 + 80000f70: 80000f60 .word 0x80000f60 + 80000f74: 00000000 .word 0x00000000 + 80000f78: 80009a42 .word 0x80009a42 + 80000f7c: 00000000 .word 0x00000000 + 80000f80: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x7) + RVTEST_TESTDATA_LOAD_INT(x9, x7) # load rs1: x7 = 0xf11d356660994f00 + 80000f84: 0004b383 ld x7,0(x9) + 80000f88: 00848493 addi x9,x9,8 + +0000000080000f8c : +Zksh_sm3p1_cg_cmp_rd_rs1_b7: + sm3p1 x7, x7 # perform operation + 80000f8c: 10939393 sm3p1 x7,x7 + # Check if x7 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x7, Zksh_sm3p1_cg_cmp_rd_rs1_b7, Zksh_sm3p1_cg_cmp_rd_rs1_b7_str) + 80000f90: 000d3683 ld x13,0(x26) + 80000f94: 00768c63 beq x13,x7,80000fac + 80000f98: 0690176f jal x14,80002800 + 80000f9c: 80000f8c .word 0x80000f8c + 80000fa0: 00000000 .word 0x00000000 + 80000fa4: 80009a79 .word 0x80009a79 + 80000fa8: 00000000 .word 0x00000000 + 80000fac: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x8) + RVTEST_TESTDATA_LOAD_INT(x9, x8) # load rs1: x8 = 0x155691d44eeb3f0b + 80000fb0: 0004b403 ld x8,0(x9) + 80000fb4: 00848493 addi x9,x9,8 + +0000000080000fb8 : +Zksh_sm3p1_cg_cmp_rd_rs1_b8: + sm3p1 x8, x8 # perform operation + 80000fb8: 10941413 sm3p1 x8,x8 + # Check if x8 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x8, Zksh_sm3p1_cg_cmp_rd_rs1_b8, Zksh_sm3p1_cg_cmp_rd_rs1_b8_str) + 80000fbc: 000d3683 ld x13,0(x26) + 80000fc0: 00868c63 beq x13,x8,80000fd8 + 80000fc4: 03d0176f jal x14,80002800 + 80000fc8: 80000fb8 .word 0x80000fb8 + 80000fcc: 00000000 .word 0x00000000 + 80000fd0: 80009ab0 .word 0x80009ab0 + 80000fd4: 00000000 .word 0x00000000 + 80000fd8: 008d0d13 addi x26,x26,8 + + mv x23, x9 # switch data pointer register to avoid conflict with test + 80000fdc: 00048b93 addi x23,x9,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x9) + RVTEST_TESTDATA_LOAD_INT(x23, x9) # load rs1: x9 = 0xabc0fb9179422ec1 + 80000fe0: 000bb483 ld x9,0(x23) + 80000fe4: 008b8b93 addi x23,x23,8 + +0000000080000fe8 : +Zksh_sm3p1_cg_cmp_rd_rs1_b9: + sm3p1 x9, x9 # perform operation + 80000fe8: 10949493 sm3p1 x9,x9 + # Check if x9 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x9, Zksh_sm3p1_cg_cmp_rd_rs1_b9, Zksh_sm3p1_cg_cmp_rd_rs1_b9_str) + 80000fec: 000d3683 ld x13,0(x26) + 80000ff0: 00968c63 beq x13,x9,80001008 + 80000ff4: 00d0176f jal x14,80002800 + 80000ff8: 80000fe8 .word 0x80000fe8 + 80000ffc: 00000000 .word 0x00000000 + 80001000: 80009ae7 .word 0x80009ae7 + 80001004: 00000000 .word 0x00000000 + 80001008: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x10) + RVTEST_TESTDATA_LOAD_INT(x23, x10) # load rs1: x10 = 0x445fdf92a8376b0a + 8000100c: 000bb503 ld x10,0(x23) + 80001010: 008b8b93 addi x23,x23,8 + +0000000080001014 : +Zksh_sm3p1_cg_cmp_rd_rs1_b10: + sm3p1 x10, x10 # perform operation + 80001014: 10951513 sm3p1 x10,x10 + # Check if x10 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x10, Zksh_sm3p1_cg_cmp_rd_rs1_b10, Zksh_sm3p1_cg_cmp_rd_rs1_b10_str) + 80001018: 000d3683 ld x13,0(x26) + 8000101c: 00a68c63 beq x13,x10,80001034 + 80001020: 7e00176f jal x14,80002800 + 80001024: 80001014 .word 0x80001014 + 80001028: 00000000 .word 0x00000000 + 8000102c: 80009b1e .word 0x80009b1e + 80001030: 00000000 .word 0x00000000 + 80001034: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x11) + RVTEST_TESTDATA_LOAD_INT(x23, x11) # load rs1: x11 = 0x7ec4195efcaedef5 + 80001038: 000bb583 ld x11,0(x23) + 8000103c: 008b8b93 addi x23,x23,8 + +0000000080001040 : +Zksh_sm3p1_cg_cmp_rd_rs1_b11: + sm3p1 x11, x11 # perform operation + 80001040: 10959593 sm3p1 x11,x11 + # Check if x11 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x11, Zksh_sm3p1_cg_cmp_rd_rs1_b11, Zksh_sm3p1_cg_cmp_rd_rs1_b11_str) + 80001044: 000d3683 ld x13,0(x26) + 80001048: 00b68c63 beq x13,x11,80001060 + 8000104c: 7b40176f jal x14,80002800 + 80001050: 80001040 .word 0x80001040 + 80001054: 00000000 .word 0x00000000 + 80001058: 80009b56 .word 0x80009b56 + 8000105c: 00000000 .word 0x00000000 + 80001060: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x12) + RVTEST_TESTDATA_LOAD_INT(x23, x12) # load rs1: x12 = 0x67631d2083305b36 + 80001064: 000bb603 ld x12,0(x23) + 80001068: 008b8b93 addi x23,x23,8 + +000000008000106c : +Zksh_sm3p1_cg_cmp_rd_rs1_b12: + sm3p1 x12, x12 # perform operation + 8000106c: 10961613 sm3p1 x12,x12 + # Check if x12 contains the expected result. x26 is the signature ptr, x14 is the link ptr, x13 is a temp reg. + RVTEST_SIGUPD(x26, x14, x13, x12, Zksh_sm3p1_cg_cmp_rd_rs1_b12, Zksh_sm3p1_cg_cmp_rd_rs1_b12_str) + 80001070: 000d3683 ld x13,0(x26) + 80001074: 00c68c63 beq x13,x12,8000108c + 80001078: 7880176f jal x14,80002800 + 8000107c: 8000106c .word 0x8000106c + 80001080: 00000000 .word 0x00000000 + 80001084: 80009b8e .word 0x80009b8e + 80001088: 00000000 .word 0x00000000 + 8000108c: 008d0d13 addi x26,x26,8 + + mv x4, x13 # switch temp register to avoid conflict with test + 80001090: 00068213 addi x4,x13,0 + mv x5, x14 # switch link pointer register to avoid conflict with test + 80001094: 00070293 addi x5,x14,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x13) + RVTEST_TESTDATA_LOAD_INT(x23, x13) # load rs1: x13 = 0x67158a6cb1b0eacd + 80001098: 000bb683 ld x13,0(x23) + 8000109c: 008b8b93 addi x23,x23,8 + +00000000800010a0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b13: + sm3p1 x13, x13 # perform operation + 800010a0: 10969693 sm3p1 x13,x13 + # Check if x13 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x13, Zksh_sm3p1_cg_cmp_rd_rs1_b13, Zksh_sm3p1_cg_cmp_rd_rs1_b13_str) + 800010a4: 000d3203 ld x4,0(x26) + 800010a8: 00d20c63 beq x4,x13,800010c0 + 800010ac: 714012ef jal x5,800027c0 + 800010b0: 800010a0 .word 0x800010a0 + 800010b4: 00000000 .word 0x00000000 + 800010b8: 80009bc6 .word 0x80009bc6 + 800010bc: 00000000 .word 0x00000000 + 800010c0: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x14) + RVTEST_TESTDATA_LOAD_INT(x23, x14) # load rs1: x14 = 0xf06600a7146a63ef + 800010c4: 000bb703 ld x14,0(x23) + 800010c8: 008b8b93 addi x23,x23,8 + +00000000800010cc : +Zksh_sm3p1_cg_cmp_rd_rs1_b14: + sm3p1 x14, x14 # perform operation + 800010cc: 10971713 sm3p1 x14,x14 + # Check if x14 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x14, Zksh_sm3p1_cg_cmp_rd_rs1_b14, Zksh_sm3p1_cg_cmp_rd_rs1_b14_str) + 800010d0: 000d3203 ld x4,0(x26) + 800010d4: 00e20c63 beq x4,x14,800010ec + 800010d8: 6e8012ef jal x5,800027c0 + 800010dc: 800010cc .word 0x800010cc + 800010e0: 00000000 .word 0x00000000 + 800010e4: 80009bfe .word 0x80009bfe + 800010e8: 00000000 .word 0x00000000 + 800010ec: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x15) + RVTEST_TESTDATA_LOAD_INT(x23, x15) # load rs1: x15 = 0xd69f98cf4e09f618 + 800010f0: 000bb783 ld x15,0(x23) + 800010f4: 008b8b93 addi x23,x23,8 + +00000000800010f8 : +Zksh_sm3p1_cg_cmp_rd_rs1_b15: + sm3p1 x15, x15 # perform operation + 800010f8: 10979793 sm3p1 x15,x15 + # Check if x15 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x15, Zksh_sm3p1_cg_cmp_rd_rs1_b15, Zksh_sm3p1_cg_cmp_rd_rs1_b15_str) + 800010fc: 000d3203 ld x4,0(x26) + 80001100: 00f20c63 beq x4,x15,80001118 + 80001104: 6bc012ef jal x5,800027c0 + 80001108: 800010f8 .word 0x800010f8 + 8000110c: 00000000 .word 0x00000000 + 80001110: 80009c36 .word 0x80009c36 + 80001114: 00000000 .word 0x00000000 + 80001118: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x16) + RVTEST_TESTDATA_LOAD_INT(x23, x16) # load rs1: x16 = 0xf2731e241b23e0a2 + 8000111c: 000bb803 ld x16,0(x23) + 80001120: 008b8b93 addi x23,x23,8 + +0000000080001124 : +Zksh_sm3p1_cg_cmp_rd_rs1_b16: + sm3p1 x16, x16 # perform operation + 80001124: 10981813 sm3p1 x16,x16 + # Check if x16 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x16, Zksh_sm3p1_cg_cmp_rd_rs1_b16, Zksh_sm3p1_cg_cmp_rd_rs1_b16_str) + 80001128: 000d3203 ld x4,0(x26) + 8000112c: 01020c63 beq x4,x16,80001144 + 80001130: 690012ef jal x5,800027c0 + 80001134: 80001124 .word 0x80001124 + 80001138: 00000000 .word 0x00000000 + 8000113c: 80009c6e .word 0x80009c6e + 80001140: 00000000 .word 0x00000000 + 80001144: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x17) + RVTEST_TESTDATA_LOAD_INT(x23, x17) # load rs1: x17 = 0x59ed4ef6b0bd1ca4 + 80001148: 000bb883 ld x17,0(x23) + 8000114c: 008b8b93 addi x23,x23,8 + +0000000080001150 : +Zksh_sm3p1_cg_cmp_rd_rs1_b17: + sm3p1 x17, x17 # perform operation + 80001150: 10989893 sm3p1 x17,x17 + # Check if x17 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x17, Zksh_sm3p1_cg_cmp_rd_rs1_b17, Zksh_sm3p1_cg_cmp_rd_rs1_b17_str) + 80001154: 000d3203 ld x4,0(x26) + 80001158: 01120c63 beq x4,x17,80001170 + 8000115c: 664012ef jal x5,800027c0 + 80001160: 80001150 .word 0x80001150 + 80001164: 00000000 .word 0x00000000 + 80001168: 80009ca6 .word 0x80009ca6 + 8000116c: 00000000 .word 0x00000000 + 80001170: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x18) + RVTEST_TESTDATA_LOAD_INT(x23, x18) # load rs1: x18 = 0xf5ce8c9ca49b71b8 + 80001174: 000bb903 ld x18,0(x23) + 80001178: 008b8b93 addi x23,x23,8 + +000000008000117c : +Zksh_sm3p1_cg_cmp_rd_rs1_b18: + sm3p1 x18, x18 # perform operation + 8000117c: 10991913 sm3p1 x18,x18 + # Check if x18 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x18, Zksh_sm3p1_cg_cmp_rd_rs1_b18, Zksh_sm3p1_cg_cmp_rd_rs1_b18_str) + 80001180: 000d3203 ld x4,0(x26) + 80001184: 01220c63 beq x4,x18,8000119c + 80001188: 638012ef jal x5,800027c0 + 8000118c: 8000117c .word 0x8000117c + 80001190: 00000000 .word 0x00000000 + 80001194: 80009cde .word 0x80009cde + 80001198: 00000000 .word 0x00000000 + 8000119c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x19) + RVTEST_TESTDATA_LOAD_INT(x23, x19) # load rs1: x19 = 0xd195920e15f3d218 + 800011a0: 000bb983 ld x19,0(x23) + 800011a4: 008b8b93 addi x23,x23,8 + +00000000800011a8 : +Zksh_sm3p1_cg_cmp_rd_rs1_b19: + sm3p1 x19, x19 # perform operation + 800011a8: 10999993 sm3p1 x19,x19 + # Check if x19 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x19, Zksh_sm3p1_cg_cmp_rd_rs1_b19, Zksh_sm3p1_cg_cmp_rd_rs1_b19_str) + 800011ac: 000d3203 ld x4,0(x26) + 800011b0: 01320c63 beq x4,x19,800011c8 + 800011b4: 60c012ef jal x5,800027c0 + 800011b8: 800011a8 .word 0x800011a8 + 800011bc: 00000000 .word 0x00000000 + 800011c0: 80009d16 .word 0x80009d16 + 800011c4: 00000000 .word 0x00000000 + 800011c8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x20) + RVTEST_TESTDATA_LOAD_INT(x23, x20) # load rs1: x20 = 0xf27be71582fdcdcc + 800011cc: 000bba03 ld x20,0(x23) + 800011d0: 008b8b93 addi x23,x23,8 + +00000000800011d4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b20: + sm3p1 x20, x20 # perform operation + 800011d4: 109a1a13 sm3p1 x20,x20 + # Check if x20 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x20, Zksh_sm3p1_cg_cmp_rd_rs1_b20, Zksh_sm3p1_cg_cmp_rd_rs1_b20_str) + 800011d8: 000d3203 ld x4,0(x26) + 800011dc: 01420c63 beq x4,x20,800011f4 + 800011e0: 5e0012ef jal x5,800027c0 + 800011e4: 800011d4 .word 0x800011d4 + 800011e8: 00000000 .word 0x00000000 + 800011ec: 80009d4f .word 0x80009d4f + 800011f0: 00000000 .word 0x00000000 + 800011f4: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x21) + RVTEST_TESTDATA_LOAD_INT(x23, x21) # load rs1: x21 = 0x1d36c442925e585c + 800011f8: 000bba83 ld x21,0(x23) + 800011fc: 008b8b93 addi x23,x23,8 + +0000000080001200 : +Zksh_sm3p1_cg_cmp_rd_rs1_b21: + sm3p1 x21, x21 # perform operation + 80001200: 109a9a93 sm3p1 x21,x21 + # Check if x21 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x21, Zksh_sm3p1_cg_cmp_rd_rs1_b21, Zksh_sm3p1_cg_cmp_rd_rs1_b21_str) + 80001204: 000d3203 ld x4,0(x26) + 80001208: 01520c63 beq x4,x21,80001220 + 8000120c: 5b4012ef jal x5,800027c0 + 80001210: 80001200 .word 0x80001200 + 80001214: 00000000 .word 0x00000000 + 80001218: 80009d88 .word 0x80009d88 + 8000121c: 00000000 .word 0x00000000 + 80001220: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x22) + RVTEST_TESTDATA_LOAD_INT(x23, x22) # load rs1: x22 = 0x655ca9f206968da5 + 80001224: 000bbb03 ld x22,0(x23) + 80001228: 008b8b93 addi x23,x23,8 + +000000008000122c : +Zksh_sm3p1_cg_cmp_rd_rs1_b22: + sm3p1 x22, x22 # perform operation + 8000122c: 109b1b13 sm3p1 x22,x22 + # Check if x22 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x22, Zksh_sm3p1_cg_cmp_rd_rs1_b22, Zksh_sm3p1_cg_cmp_rd_rs1_b22_str) + 80001230: 000d3203 ld x4,0(x26) + 80001234: 01620c63 beq x4,x22,8000124c + 80001238: 588012ef jal x5,800027c0 + 8000123c: 8000122c .word 0x8000122c + 80001240: 00000000 .word 0x00000000 + 80001244: 80009dc1 .word 0x80009dc1 + 80001248: 00000000 .word 0x00000000 + 8000124c: 008d0d13 addi x26,x26,8 + + mv x12, x23 # switch data pointer register to avoid conflict with test + 80001250: 000b8613 addi x12,x23,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x23) + RVTEST_TESTDATA_LOAD_INT(x12, x23) # load rs1: x23 = 0xc96f1afd3e3902b2 + 80001254: 00063b83 ld x23,0(x12) + 80001258: 00860613 addi x12,x12,8 + +000000008000125c : +Zksh_sm3p1_cg_cmp_rd_rs1_b23: + sm3p1 x23, x23 # perform operation + 8000125c: 109b9b93 sm3p1 x23,x23 + # Check if x23 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x23, Zksh_sm3p1_cg_cmp_rd_rs1_b23, Zksh_sm3p1_cg_cmp_rd_rs1_b23_str) + 80001260: 000d3203 ld x4,0(x26) + 80001264: 01720c63 beq x4,x23,8000127c + 80001268: 558012ef jal x5,800027c0 + 8000126c: 8000125c .word 0x8000125c + 80001270: 00000000 .word 0x00000000 + 80001274: 80009dfa .word 0x80009dfa + 80001278: 00000000 .word 0x00000000 + 8000127c: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x24) + RVTEST_TESTDATA_LOAD_INT(x12, x24) # load rs1: x24 = 0xb4df367ccd04a6e6 + 80001280: 00063c03 ld x24,0(x12) + 80001284: 00860613 addi x12,x12,8 + +0000000080001288 : +Zksh_sm3p1_cg_cmp_rd_rs1_b24: + sm3p1 x24, x24 # perform operation + 80001288: 109c1c13 sm3p1 x24,x24 + # Check if x24 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x24, Zksh_sm3p1_cg_cmp_rd_rs1_b24, Zksh_sm3p1_cg_cmp_rd_rs1_b24_str) + 8000128c: 000d3203 ld x4,0(x26) + 80001290: 01820c63 beq x4,x24,800012a8 + 80001294: 52c012ef jal x5,800027c0 + 80001298: 80001288 .word 0x80001288 + 8000129c: 00000000 .word 0x00000000 + 800012a0: 80009e33 .word 0x80009e33 + 800012a4: 00000000 .word 0x00000000 + 800012a8: 008d0d13 addi x26,x26,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x25) + RVTEST_TESTDATA_LOAD_INT(x12, x25) # load rs1: x25 = 0xd29f1f771cd4e486 + 800012ac: 00063c83 ld x25,0(x12) + 800012b0: 00860613 addi x12,x12,8 + +00000000800012b4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b25: + sm3p1 x25, x25 # perform operation + 800012b4: 109c9c93 sm3p1 x25,x25 + # Check if x25 contains the expected result. x26 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x26, x5, x4, x25, Zksh_sm3p1_cg_cmp_rd_rs1_b25, Zksh_sm3p1_cg_cmp_rd_rs1_b25_str) + 800012b8: 000d3203 ld x4,0(x26) + 800012bc: 01920c63 beq x4,x25,800012d4 + 800012c0: 500012ef jal x5,800027c0 + 800012c4: 800012b4 .word 0x800012b4 + 800012c8: 00000000 .word 0x00000000 + 800012cc: 80009e6c .word 0x80009e6c + 800012d0: 00000000 .word 0x00000000 + 800012d4: 008d0d13 addi x26,x26,8 + + mv x24, x26 # switch signature pointer register to avoid conflict with test + 800012d8: 000d0c13 addi x24,x26,0 +# Testcase cmp_rd_rs1 (Test rd = rs1 = x26) + RVTEST_TESTDATA_LOAD_INT(x12, x26) # load rs1: x26 = 0x464464efe0402dc8 + 800012dc: 00063d03 ld x26,0(x12) + 800012e0: 00860613 addi x12,x12,8 + +00000000800012e4 : +Zksh_sm3p1_cg_cmp_rd_rs1_b26: + sm3p1 x26, x26 # perform operation + 800012e4: 109d1d13 sm3p1 x26,x26 + # Check if x26 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x26, Zksh_sm3p1_cg_cmp_rd_rs1_b26, Zksh_sm3p1_cg_cmp_rd_rs1_b26_str) + 800012e8: 000c3203 ld x4,0(x24) + 800012ec: 01a20c63 beq x4,x26,80001304 + 800012f0: 4d0012ef jal x5,800027c0 + 800012f4: 800012e4 .word 0x800012e4 + 800012f8: 00000000 .word 0x00000000 + 800012fc: 80009ea5 .word 0x80009ea5 + 80001300: 00000000 .word 0x00000000 + 80001304: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x27) + RVTEST_TESTDATA_LOAD_INT(x12, x27) # load rs1: x27 = 0x979dad449eff0b4d + 80001308: 00063d83 ld x27,0(x12) + 8000130c: 00860613 addi x12,x12,8 + +0000000080001310 : +Zksh_sm3p1_cg_cmp_rd_rs1_b27: + sm3p1 x27, x27 # perform operation + 80001310: 109d9d93 sm3p1 x27,x27 + # Check if x27 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x27, Zksh_sm3p1_cg_cmp_rd_rs1_b27, Zksh_sm3p1_cg_cmp_rd_rs1_b27_str) + 80001314: 000c3203 ld x4,0(x24) + 80001318: 01b20c63 beq x4,x27,80001330 + 8000131c: 4a4012ef jal x5,800027c0 + 80001320: 80001310 .word 0x80001310 + 80001324: 00000000 .word 0x00000000 + 80001328: 80009ede .word 0x80009ede + 8000132c: 00000000 .word 0x00000000 + 80001330: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x28) + RVTEST_TESTDATA_LOAD_INT(x12, x28) # load rs1: x28 = 0x8e848be37f434af6 + 80001334: 00063e03 ld x28,0(x12) + 80001338: 00860613 addi x12,x12,8 + +000000008000133c : +Zksh_sm3p1_cg_cmp_rd_rs1_b28: + sm3p1 x28, x28 # perform operation + 8000133c: 109e1e13 sm3p1 x28,x28 + # Check if x28 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x28, Zksh_sm3p1_cg_cmp_rd_rs1_b28, Zksh_sm3p1_cg_cmp_rd_rs1_b28_str) + 80001340: 000c3203 ld x4,0(x24) + 80001344: 01c20c63 beq x4,x28,8000135c + 80001348: 478012ef jal x5,800027c0 + 8000134c: 8000133c .word 0x8000133c + 80001350: 00000000 .word 0x00000000 + 80001354: 80009f17 .word 0x80009f17 + 80001358: 00000000 .word 0x00000000 + 8000135c: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x29) + RVTEST_TESTDATA_LOAD_INT(x12, x29) # load rs1: x29 = 0xdb404ffa2f647e18 + 80001360: 00063e83 ld x29,0(x12) + 80001364: 00860613 addi x12,x12,8 + +0000000080001368 : +Zksh_sm3p1_cg_cmp_rd_rs1_b29: + sm3p1 x29, x29 # perform operation + 80001368: 109e9e93 sm3p1 x29,x29 + # Check if x29 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x29, Zksh_sm3p1_cg_cmp_rd_rs1_b29, Zksh_sm3p1_cg_cmp_rd_rs1_b29_str) + 8000136c: 000c3203 ld x4,0(x24) + 80001370: 01d20c63 beq x4,x29,80001388 + 80001374: 44c012ef jal x5,800027c0 + 80001378: 80001368 .word 0x80001368 + 8000137c: 00000000 .word 0x00000000 + 80001380: 80009f50 .word 0x80009f50 + 80001384: 00000000 .word 0x00000000 + 80001388: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x30) + RVTEST_TESTDATA_LOAD_INT(x12, x30) # load rs1: x30 = 0x36e040c84531584b + 8000138c: 00063f03 ld x30,0(x12) + 80001390: 00860613 addi x12,x12,8 + +0000000080001394 : +Zksh_sm3p1_cg_cmp_rd_rs1_b30: + sm3p1 x30, x30 # perform operation + 80001394: 109f1f13 sm3p1 x30,x30 + # Check if x30 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x30, Zksh_sm3p1_cg_cmp_rd_rs1_b30, Zksh_sm3p1_cg_cmp_rd_rs1_b30_str) + 80001398: 000c3203 ld x4,0(x24) + 8000139c: 01e20c63 beq x4,x30,800013b4 + 800013a0: 420012ef jal x5,800027c0 + 800013a4: 80001394 .word 0x80001394 + 800013a8: 00000000 .word 0x00000000 + 800013ac: 80009f89 .word 0x80009f89 + 800013b0: 00000000 .word 0x00000000 + 800013b4: 008c0c13 addi x24,x24,8 + +# Testcase cmp_rd_rs1 (Test rd = rs1 = x31) + RVTEST_TESTDATA_LOAD_INT(x12, x31) # load rs1: x31 = 0x0f1117283aca4ce0 + 800013b8: 00063f83 ld x31,0(x12) + 800013bc: 00860613 addi x12,x12,8 + +00000000800013c0 : +Zksh_sm3p1_cg_cmp_rd_rs1_b31: + sm3p1 x31, x31 # perform operation + 800013c0: 109f9f93 sm3p1 x31,x31 + # Check if x31 contains the expected result. x24 is the signature ptr, x5 is the link ptr, x4 is a temp reg. + RVTEST_SIGUPD(x24, x5, x4, x31, Zksh_sm3p1_cg_cmp_rd_rs1_b31, Zksh_sm3p1_cg_cmp_rd_rs1_b31_str) + 800013c4: 000c3203 ld x4,0(x24) + 800013c8: 01f20c63 beq x4,x31,800013e0 + 800013cc: 3f4012ef jal x5,800027c0 + 800013d0: 800013c0 .word 0x800013c0 + 800013d4: 00000000 .word 0x00000000 + 800013d8: 80009fc2 .word 0x80009fc2 + 800013dc: 00000000 .word 0x00000000 + 800013e0: 008c0c13 addi x24,x24,8 + + mv x2, x24 # restore signature pointer to default register for teardown + 800013e4: 000c0113 addi x2,x24,0 + +00000000800013e8 : + +// Instantiate trap handlers and other epilog code, call RVMODEL_HALT at end of test +RVTEST_CODE_END + 800013e8: 00000513 addi x10,x0,0 + 800013ec: 00000073 ecall + 800013f0: fff00513 addi x10,x0,-1 + 800013f4: 25800413 addi x8,x0,600 + +00000000800013f8 : + 800013f8: 34002373 csrrs x6,mscratch,x0 + +00000000800013fc : + 800013fc: 2b833383 ld x7,696(x6) + +0000000080001400 : + 80001400: 2a033383 ld x7,672(x6) + +0000000080001404 : + 80001404: 2d033483 ld x9,720(x6) + 80001408: 34049073 csrrw x0,mscratch,x9 + +000000008000140c : + 8000140c: 2c833483 ld x9,712(x6) + 80001410: 305493f3 csrrw x7,mtvec,x9 + 80001414: ffc4f493 andi x9,x9,-4 + 80001418: ffc3f393 andi x7,x7,-4 + 8000141c: 00749e63 bne x9,x7,80001438 + +0000000080001420 : + 80001420: 00030493 addi x9,x6,0 + +0000000080001424 : + 80001424: 0004a783 lw x15,0(x9) + 80001428: 00f3a023 sw x15,0(x7) + 8000142c: 00438393 addi x7,x7,4 + 80001430: 00448493 addi x9,x9,4 + 80001434: fe83c8e3 blt x7,x8,80001424 + 80001438: 0000100f fence.i + +000000008000143c : + 8000143c: 00000013 addi x0,x0,0 + 80001440: 00000497 auipc x9,0x0 + 80001444: 2b048493 addi x9,x9,688 # 800016f0 + 80001448: 00000013 addi x0,x0,0 + 8000144c: 00000013 addi x0,x0,0 + 80001450: 00000013 addi x0,x0,0 + 80001454: 00000013 addi x0,x0,0 + 80001458: 00000013 addi x0,x0,0 + 8000145c: 00000013 addi x0,x0,0 + 80001460: 10e49863 bne x9,x14,80001570 + 80001464: 00000013 addi x0,x0,0 + 80001468: 00000013 addi x0,x0,0 + 8000146c: 00000013 addi x0,x0,0 + 80001470: 00000013 addi x0,x0,0 + 80001474: 00000013 addi x0,x0,0 + 80001478: 00000013 addi x0,x0,0 + 8000147c: 00000013 addi x0,x0,0 + 80001480: 00009517 auipc x10,0x9 + 80001484: 29f50513 addi x10,x10,671 # 8000a71f + 80001488: 00000013 addi x0,x0,0 + 8000148c: 00000013 addi x0,x0,0 + 80001490: 00000013 addi x0,x0,0 + 80001494: 00000013 addi x0,x0,0 + 80001498: 00000013 addi x0,x0,0 + 8000149c: 00000013 addi x0,x0,0 + 800014a0: 00029097 auipc x1,0x29 + 800014a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800014a8: 00000013 addi x0,x0,0 + 800014ac: 00000013 addi x0,x0,0 + 800014b0: 00000013 addi x0,x0,0 + 800014b4: 00000013 addi x0,x0,0 + 800014b8: 00000013 addi x0,x0,0 + 800014bc: 00000013 addi x0,x0,0 + 800014c0: 00009517 auipc x10,0x9 + 800014c4: 29950513 addi x10,x10,665 # 8000a759 + 800014c8: 00000013 addi x0,x0,0 + 800014cc: 00000013 addi x0,x0,0 + 800014d0: 00000013 addi x0,x0,0 + 800014d4: 00000013 addi x0,x0,0 + 800014d8: 00000013 addi x0,x0,0 + 800014dc: 00000013 addi x0,x0,0 + 800014e0: 00029097 auipc x1,0x29 + 800014e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800014e8: 00000013 addi x0,x0,0 + 800014ec: 00000013 addi x0,x0,0 + 800014f0: 00000013 addi x0,x0,0 + 800014f4: 00000013 addi x0,x0,0 + 800014f8: 00000013 addi x0,x0,0 + 800014fc: 00000013 addi x0,x0,0 + 80001500: 00009517 auipc x10,0x9 + 80001504: 2b950513 addi x10,x10,697 # 8000a7b9 + 80001508: 00000013 addi x0,x0,0 + 8000150c: 00000013 addi x0,x0,0 + 80001510: 00000013 addi x0,x0,0 + 80001514: 00000013 addi x0,x0,0 + 80001518: 00000013 addi x0,x0,0 + 8000151c: 00000013 addi x0,x0,0 + 80001520: 00029097 auipc x1,0x29 + 80001524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80001528: 00000013 addi x0,x0,0 + 8000152c: 00000013 addi x0,x0,0 + 80001530: 00000013 addi x0,x0,0 + 80001534: 00000013 addi x0,x0,0 + 80001538: 00000013 addi x0,x0,0 + 8000153c: 00000013 addi x0,x0,0 + 80001540: 0000a517 auipc x10,0xa + 80001544: e2450513 addi x10,x10,-476 # 8000b364 + 80001548: 00000013 addi x0,x0,0 + 8000154c: 00000013 addi x0,x0,0 + 80001550: 00000013 addi x0,x0,0 + 80001554: 00000013 addi x0,x0,0 + 80001558: 00000013 addi x0,x0,0 + 8000155c: 00000013 addi x0,x0,0 + 80001560: 00029097 auipc x1,0x29 + 80001564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80001568: 00029097 auipc x1,0x29 + 8000156c: 09c080e7 jalr x1,156(x1) # 8002a604 + +0000000080001570 : + 80001570: 00000013 addi x0,x0,0 + 80001574: 00000013 addi x0,x0,0 + 80001578: 00000013 addi x0,x0,0 + 8000157c: 00000013 addi x0,x0,0 + 80001580: 00007317 auipc x6,0x7 + 80001584: e2830313 addi x6,x6,-472 # 800083a8 + 80001588: 00000013 addi x0,x0,0 + 8000158c: 00000013 addi x0,x0,0 + 80001590: 00000013 addi x0,x0,0 + 80001594: 00000013 addi x0,x0,0 + 80001598: 00000013 addi x0,x0,0 + 8000159c: 00000013 addi x0,x0,0 + 800015a0: 00033303 ld x6,0(x6) + 800015a4: 00000013 addi x0,x0,0 + 800015a8: 00000013 addi x0,x0,0 + 800015ac: 00000013 addi x0,x0,0 + 800015b0: 00000013 addi x0,x0,0 + 800015b4: 00000013 addi x0,x0,0 + 800015b8: 00000013 addi x0,x0,0 + 800015bc: 00000013 addi x0,x0,0 + 800015c0: 0000b397 auipc x7,0xb + 800015c4: c1038393 addi x7,x7,-1008 # 8000c1d0 + 800015c8: 00000013 addi x0,x0,0 + 800015cc: 00000013 addi x0,x0,0 + 800015d0: 00000013 addi x0,x0,0 + 800015d4: 00000013 addi x0,x0,0 + 800015d8: 00000013 addi x0,x0,0 + 800015dc: 00000013 addi x0,x0,0 + 800015e0: 40730333 sub x6,x6,x7 + 800015e4: 00000013 addi x0,x0,0 + 800015e8: 00000013 addi x0,x0,0 + 800015ec: 00000013 addi x0,x0,0 + 800015f0: 00000013 addi x0,x0,0 + 800015f4: 00000013 addi x0,x0,0 + 800015f8: 00000013 addi x0,x0,0 + 800015fc: 00000013 addi x0,x0,0 + 80001600: 0000b417 auipc x8,0xb + 80001604: bc040413 addi x8,x8,-1088 # 8000c1c0 + 80001608: 00000013 addi x0,x0,0 + 8000160c: 00000013 addi x0,x0,0 + 80001610: 00000013 addi x0,x0,0 + 80001614: 00000013 addi x0,x0,0 + 80001618: 00000013 addi x0,x0,0 + 8000161c: 00000013 addi x0,x0,0 + 80001620: 00043203 ld x4,0(x8) + 80001624: 00620c63 beq x4,x6,8000163c + 80001628: 200013ef jal x7,80002828 + 8000162c: 80001570 .word 0x80001570 + 80001630: 00000000 .word 0x00000000 + 80001634: 8000a90d .word 0x8000a90d + 80001638: 00000000 .word 0x00000000 + +000000008000163c : + 8000163c: 000004b7 lui x9,0x0 + 80001640: 00048493 addi x9,x9,0 # 0 + 80001644: 00b49493 slli x9,x9,0xb + 80001648: 5d648493 addi x9,x9,1494 + 8000164c: 00b49493 slli x9,x9,0xb + 80001650: 43748493 addi x9,x9,1079 + 80001654: 00a49493 slli x9,x9,0xa + 80001658: 2ad48493 addi x9,x9,685 + 8000165c: 00e49e63 bne x9,x14,80001678 + 80001660: 1c8013ef jal x7,80002828 + 80001664: 80001724 .word 0x80001724 + 80001668: 00000000 .word 0x00000000 + 8000166c: 8000a77b .word 0x8000a77b + 80001670: 00000000 .word 0x00000000 + 80001674: 00000341 .word 0x00000341 + +0000000080001678 : + 80001678: 00000013 addi x0,x0,0 + 8000167c: 00000013 addi x0,x0,0 + 80001680: 00009517 auipc x10,0x9 + 80001684: 06450513 addi x10,x10,100 # 8000a6e4 + 80001688: 00000013 addi x0,x0,0 + 8000168c: 00000013 addi x0,x0,0 + 80001690: 00000013 addi x0,x0,0 + 80001694: 00000013 addi x0,x0,0 + 80001698: 00000013 addi x0,x0,0 + 8000169c: 00000013 addi x0,x0,0 + 800016a0: 00029097 auipc x1,0x29 + 800016a4: f04080e7 jalr x1,-252(x1) # 8002a5a4 + 800016a8: 00029097 auipc x1,0x29 + 800016ac: f3c080e7 jalr x1,-196(x1) # 8002a5e4 + +00000000800016b0 : + 800016b0: 00000013 addi x0,x0,0 + 800016b4: 00000013 addi x0,x0,0 + 800016b8: 00000013 addi x0,x0,0 + 800016bc: 00000013 addi x0,x0,0 + 800016c0: 00009517 auipc x10,0x9 + 800016c4: 05f50513 addi x10,x10,95 # 8000a71f + 800016c8: 00000013 addi x0,x0,0 + 800016cc: 00000013 addi x0,x0,0 + 800016d0: 00000013 addi x0,x0,0 + 800016d4: 00000013 addi x0,x0,0 + 800016d8: 00000013 addi x0,x0,0 + 800016dc: 00000013 addi x0,x0,0 + 800016e0: 00029097 auipc x1,0x29 + 800016e4: ec4080e7 jalr x1,-316(x1) # 8002a5a4 + 800016e8: 00029097 auipc x1,0x29 + 800016ec: f1c080e7 jalr x1,-228(x1) # 8002a604 + +00000000800016f0 : + 800016f0: 00000013 addi x0,x0,0 + 800016f4: 00000013 addi x0,x0,0 + 800016f8: 00000013 addi x0,x0,0 + 800016fc: 00000013 addi x0,x0,0 + 80001700: 00000717 auipc x14,0x0 + 80001704: ff070713 addi x14,x14,-16 # 800016f0 + 80001708: 00000013 addi x0,x0,0 + 8000170c: 00000013 addi x0,x0,0 + 80001710: 00000013 addi x0,x0,0 + 80001714: 00000013 addi x0,x0,0 + 80001718: 00000013 addi x0,x0,0 + 8000171c: 00000013 addi x0,x0,0 + 80001720: cc9ff06f jal x0,800013e8 + +0000000080001724 : + 80001724: 00000737 lui x14,0x0 + 80001728: 00070713 addi x14,x14,0 # 0 + 8000172c: 00b71713 slli x14,x14,0xb + 80001730: 5d670713 addi x14,x14,1494 + 80001734: 00b71713 slli x14,x14,0xb + 80001738: 43770713 addi x14,x14,1079 + 8000173c: 00a71713 slli x14,x14,0xa + 80001740: 2ad70713 addi x14,x14,685 + 80001744: ca5ff06f jal x0,800013e8 + 80001748: 00000013 addi x0,x0,0 + 8000174c: 00000013 addi x0,x0,0 + 80001750: 00000013 addi x0,x0,0 + 80001754: 00000013 addi x0,x0,0 + 80001758: 00000013 addi x0,x0,0 + 8000175c: 00000013 addi x0,x0,0 + 80001760: 00000013 addi x0,x0,0 + 80001764: 00000013 addi x0,x0,0 + 80001768: 00000013 addi x0,x0,0 + 8000176c: 00000013 addi x0,x0,0 + 80001770: 00000013 addi x0,x0,0 + 80001774: 00000013 addi x0,x0,0 + 80001778: 00000013 addi x0,x0,0 + 8000177c: 00000013 addi x0,x0,0 + +0000000080001780 : + 80001780: 1000006f jal x0,80001880 + 80001784: 1080006f jal x0,8000188c + 80001788: 1100006f jal x0,80001898 + 8000178c: 1180006f jal x0,800018a4 + 80001790: 1200006f jal x0,800018b0 + 80001794: 1280006f jal x0,800018bc + 80001798: 1300006f jal x0,800018c8 + 8000179c: 1380006f jal x0,800018d4 + 800017a0: 1400006f jal x0,800018e0 + 800017a4: 1480006f jal x0,800018ec + 800017a8: 1500006f jal x0,800018f8 + 800017ac: 1580006f jal x0,80001904 + 800017b0: 1600006f jal x0,80001910 + 800017b4: 1680006f jal x0,8000191c + 800017b8: 1700006f jal x0,80001928 + 800017bc: 1780006f jal x0,80001934 + 800017c0: 1800006f jal x0,80001940 + 800017c4: 1880006f jal x0,8000194c + 800017c8: 1900006f jal x0,80001958 + 800017cc: 1980006f jal x0,80001964 + 800017d0: 1a00006f jal x0,80001970 + 800017d4: 1a80006f jal x0,8000197c + 800017d8: 1b00006f jal x0,80001988 + 800017dc: 1b80006f jal x0,80001994 + 800017e0: 1c00006f jal x0,800019a0 + 800017e4: 1bc0006f jal x0,800019a0 + 800017e8: 1b80006f jal x0,800019a0 + 800017ec: 1b40006f jal x0,800019a0 + 800017f0: 1b00006f jal x0,800019a0 + 800017f4: 1ac0006f jal x0,800019a0 + 800017f8: 1a80006f jal x0,800019a0 + 800017fc: 1a40006f jal x0,800019a0 + 80001800: 1a00006f jal x0,800019a0 + 80001804: 19c0006f jal x0,800019a0 + 80001808: 1980006f jal x0,800019a0 + 8000180c: 1940006f jal x0,800019a0 + 80001810: 1900006f jal x0,800019a0 + 80001814: 18c0006f jal x0,800019a0 + 80001818: 1880006f jal x0,800019a0 + 8000181c: 1840006f jal x0,800019a0 + 80001820: 1800006f jal x0,800019a0 + 80001824: 17c0006f jal x0,800019a0 + 80001828: 1780006f jal x0,800019a0 + 8000182c: 1740006f jal x0,800019a0 + 80001830: 1700006f jal x0,800019a0 + 80001834: 16c0006f jal x0,800019a0 + 80001838: 1680006f jal x0,800019a0 + 8000183c: 1640006f jal x0,800019a0 + 80001840: 1600006f jal x0,800019a0 + 80001844: 15c0006f jal x0,800019a0 + 80001848: 1580006f jal x0,800019a0 + 8000184c: 1540006f jal x0,800019a0 + 80001850: 1500006f jal x0,800019a0 + 80001854: 14c0006f jal x0,800019a0 + 80001858: 1480006f jal x0,800019a0 + 8000185c: 1440006f jal x0,800019a0 + 80001860: 1400006f jal x0,800019a0 + 80001864: 13c0006f jal x0,800019a0 + 80001868: 1380006f jal x0,800019a0 + 8000186c: 1340006f jal x0,800019a0 + 80001870: 1300006f jal x0,800019a0 + 80001874: 12c0006f jal x0,800019a0 + 80001878: 1280006f jal x0,800019a0 + 8000187c: 1240006f jal x0,800019a0 + +0000000080001880 : + 80001880: 34011173 csrrw x2,mscratch,x2 + 80001884: 30f13423 sd x15,776(x2) + 80001888: 13c007ef jal x15,800019c4 + 8000188c: 34011173 csrrw x2,mscratch,x2 + 80001890: 30f13423 sd x15,776(x2) + 80001894: 130007ef jal x15,800019c4 + 80001898: 34011173 csrrw x2,mscratch,x2 + 8000189c: 30f13423 sd x15,776(x2) + 800018a0: 124007ef jal x15,800019c4 + 800018a4: 34011173 csrrw x2,mscratch,x2 + 800018a8: 30f13423 sd x15,776(x2) + 800018ac: 118007ef jal x15,800019c4 + 800018b0: 34011173 csrrw x2,mscratch,x2 + 800018b4: 30f13423 sd x15,776(x2) + 800018b8: 10c007ef jal x15,800019c4 + 800018bc: 34011173 csrrw x2,mscratch,x2 + 800018c0: 30f13423 sd x15,776(x2) + 800018c4: 100007ef jal x15,800019c4 + 800018c8: 34011173 csrrw x2,mscratch,x2 + 800018cc: 30f13423 sd x15,776(x2) + 800018d0: 0f4007ef jal x15,800019c4 + 800018d4: 34011173 csrrw x2,mscratch,x2 + 800018d8: 30f13423 sd x15,776(x2) + 800018dc: 0e8007ef jal x15,800019c4 + 800018e0: 34011173 csrrw x2,mscratch,x2 + 800018e4: 30f13423 sd x15,776(x2) + 800018e8: 0dc007ef jal x15,800019c4 + 800018ec: 34011173 csrrw x2,mscratch,x2 + 800018f0: 30f13423 sd x15,776(x2) + 800018f4: 0d0007ef jal x15,800019c4 + 800018f8: 34011173 csrrw x2,mscratch,x2 + 800018fc: 30f13423 sd x15,776(x2) + 80001900: 0c4007ef jal x15,800019c4 + 80001904: 34011173 csrrw x2,mscratch,x2 + 80001908: 30f13423 sd x15,776(x2) + 8000190c: 0b8007ef jal x15,800019c4 + 80001910: 34011173 csrrw x2,mscratch,x2 + 80001914: 30f13423 sd x15,776(x2) + 80001918: 0ac007ef jal x15,800019c4 + 8000191c: 34011173 csrrw x2,mscratch,x2 + 80001920: 30f13423 sd x15,776(x2) + 80001924: 0a0007ef jal x15,800019c4 + 80001928: 34011173 csrrw x2,mscratch,x2 + 8000192c: 30f13423 sd x15,776(x2) + 80001930: 094007ef jal x15,800019c4 + 80001934: 34011173 csrrw x2,mscratch,x2 + 80001938: 30f13423 sd x15,776(x2) + 8000193c: 088007ef jal x15,800019c4 + 80001940: 34011173 csrrw x2,mscratch,x2 + 80001944: 30f13423 sd x15,776(x2) + 80001948: 07c007ef jal x15,800019c4 + 8000194c: 34011173 csrrw x2,mscratch,x2 + 80001950: 30f13423 sd x15,776(x2) + 80001954: 070007ef jal x15,800019c4 + 80001958: 34011173 csrrw x2,mscratch,x2 + 8000195c: 30f13423 sd x15,776(x2) + 80001960: 064007ef jal x15,800019c4 + 80001964: 34011173 csrrw x2,mscratch,x2 + 80001968: 30f13423 sd x15,776(x2) + 8000196c: 058007ef jal x15,800019c4 + 80001970: 34011173 csrrw x2,mscratch,x2 + 80001974: 30f13423 sd x15,776(x2) + 80001978: 04c007ef jal x15,800019c4 + 8000197c: 34011173 csrrw x2,mscratch,x2 + 80001980: 30f13423 sd x15,776(x2) + 80001984: 040007ef jal x15,800019c4 + 80001988: 34011173 csrrw x2,mscratch,x2 + 8000198c: 30f13423 sd x15,776(x2) + 80001990: 034007ef jal x15,800019c4 + 80001994: 34011173 csrrw x2,mscratch,x2 + 80001998: 30f13423 sd x15,776(x2) + 8000199c: 028007ef jal x15,800019c4 + +00000000800019a0 : + 800019a0: 00000317 auipc x6,0x0 + 800019a4: a9c30313 addi x6,x6,-1380 # 8000143c + 800019a8: 00000013 addi x0,x0,0 + 800019ac: 00000013 addi x0,x0,0 + 800019b0: 00000013 addi x0,x0,0 + 800019b4: 00000013 addi x0,x0,0 + 800019b8: 00000013 addi x0,x0,0 + 800019bc: 00000013 addi x0,x0,0 + 800019c0: 00030067 jalr x0,0(x6) + +00000000800019c4 : + 800019c4: 30e13023 sd x14,768(x2) + 800019c8: 34011773 csrrw x14,mscratch,x2 + 800019cc: 30e13823 sd x14,784(x2) + 800019d0: 2b013703 ld x14,688(x2) + 800019d4: 00070067 jalr x0,0(x14) + +00000000800019d8 : + 800019d8: 2e913c23 sd x9,760(x2) + 800019dc: 2e813823 sd x8,752(x2) + 800019e0: 2e713423 sd x7,744(x2) + 800019e4: 2e613023 sd x6,736(x2) + 800019e8: 00000013 addi x0,x0,0 + 800019ec: 00000013 addi x0,x0,0 + 800019f0: 00000013 addi x0,x0,0 + 800019f4: 00000013 addi x0,x0,0 + 800019f8: 00000013 addi x0,x0,0 + 800019fc: 00000013 addi x0,x0,0 + 80001a00: 00006317 auipc x6,0x6 + 80001a04: 70830313 addi x6,x6,1800 # 80008108 + 80001a08: 00000013 addi x0,x0,0 + 80001a0c: 00000013 addi x0,x0,0 + 80001a10: 00000013 addi x0,x0,0 + 80001a14: 00000013 addi x0,x0,0 + 80001a18: 00000013 addi x0,x0,0 + 80001a1c: 00000013 addi x0,x0,0 + 80001a20: 00033383 ld x7,0(x6) + 80001a24: 00138393 addi x7,x7,1 + 80001a28: 00733023 sd x7,0(x6) + 80001a2c: 34202773 csrrs x14,mcause,x0 + +0000000080001a30 : + 80001a30: fff00493 addi x9,x0,-1 + 80001a34: 00d4d493 srli x9,x9,0xd + 80001a38: 00c49493 slli x9,x9,0xc + 80001a3c: fff4c493 xori x9,x9,-1 + 80001a40: 00e4f4b3 and x9,x9,x14 + +0000000080001a44 : + 80001a44: ffe48413 addi x8,x9,-2 + 80001a48: 00041663 bne x8,x0,80001a54 + +0000000080001a4c : + 80001a4c: 500502e3 beq x10,x0,80002750 + 80001a50: 5b40006f jal x0,80002004 + +0000000080001a54 : + 80001a54: ff848413 addi x8,x9,-8 + 80001a58: 00245413 srli x8,x8,0x2 + 80001a5c: 5a041463 bne x8,x0,80002004 + +0000000080001a60 : + 80001a60: 4e0508e3 beq x10,x0,80002750 + +0000000080001a64 : + 80001a64: fff50493 addi x9,x10,-1 + 80001a68: 00500393 addi x7,x0,5 + 80001a6c: 0274e063 bltu x9,x7,80001a8c + 80001a70: 07300393 addi x7,x0,115 + 80001a74: 00750463 beq x10,x7,80001a7c + 80001a78: 08c0006f jal x0,80001b04 + +0000000080001a7c : + 80001a7c: 34102573 csrrs x10,mepc,x0 + 80001a80: 00450413 addi x8,x10,4 + 80001a84: 34141073 csrrw x0,mepc,x8 + 80001a88: 0310006f jal x0,800022b8 + +0000000080001a8c : + 80001a8c: 341024f3 csrrs x9,mepc,x0 + 80001a90: 00448493 addi x9,x9,4 + 80001a94: 34149073 csrrw x0,mepc,x9 + 80001a98: 00100393 addi x7,x0,1 + 80001a9c: 00750e63 beq x10,x7,80001ab8 + 80001aa0: 00200393 addi x7,x0,2 + 80001aa4: 02750463 beq x10,x7,80001acc + 80001aa8: 00300393 addi x7,x0,3 + 80001aac: 04750063 beq x10,x7,80001aec + 80001ab0: fff00513 addi x10,x0,-1 + 80001ab4: 0050006f jal x0,800022b8 + +0000000080001ab8 : + 80001ab8: fff00493 addi x9,x0,-1 + 80001abc: 03e4d493 srli x9,x9,0x3e + 80001ac0: 00b49493 slli x9,x9,0xb + 80001ac4: 3004a073 csrrs x0,mstatus,x9 + 80001ac8: 7f00006f jal x0,800022b8 + +0000000080001acc : + 80001acc: fff00493 addi x9,x0,-1 + 80001ad0: 03e4d493 srli x9,x9,0x3e + 80001ad4: 00b49493 slli x9,x9,0xb + 80001ad8: 3004b073 csrrc x0,mstatus,x9 + 80001adc: 00100493 addi x9,x0,1 + 80001ae0: 00b49493 slli x9,x9,0xb + 80001ae4: 3004a073 csrrs x0,mstatus,x9 + 80001ae8: 7d00006f jal x0,800022b8 + +0000000080001aec : + 80001aec: fff00493 addi x9,x0,-1 + 80001af0: 03e4d493 srli x9,x9,0x3e + 80001af4: 00b49493 slli x9,x9,0xb + 80001af8: 3004b073 csrrc x0,mstatus,x9 + 80001afc: 7bc0006f jal x0,800022b8 + +0000000080001b00 : + 80001b00: 00000013 addi x0,x0,0 + +0000000080001b04 : + 80001b04: 00000013 addi x0,x0,0 + 80001b08: 00000013 addi x0,x0,0 + 80001b0c: 00000013 addi x0,x0,0 + 80001b10: 00000013 addi x0,x0,0 + 80001b14: 00000013 addi x0,x0,0 + 80001b18: 00000013 addi x0,x0,0 + 80001b1c: 00000013 addi x0,x0,0 + 80001b20: 00000397 auipc x7,0x0 + 80001b24: 17038393 addi x7,x7,368 # 80001c90 + 80001b28: 00000013 addi x0,x0,0 + 80001b2c: 00000013 addi x0,x0,0 + 80001b30: 00000013 addi x0,x0,0 + 80001b34: 00000013 addi x0,x0,0 + 80001b38: 00000013 addi x0,x0,0 + 80001b3c: 00000013 addi x0,x0,0 + +0000000080001b40 : + 80001b40: 0003e403 lwu x8,0(x7) + 80001b44: 00a40863 beq x8,x10,80001b54 + 80001b48: 04040863 beq x8,x0,80001b98 + 80001b4c: 00838393 addi x7,x7,8 + 80001b50: ff1ff06f jal x0,80001b40 + +0000000080001b54 : + 80001b54: 00008493 addi x9,x1,0 + 80001b58: 00000013 addi x0,x0,0 + 80001b5c: 00000013 addi x0,x0,0 + 80001b60: 00000097 auipc x1,0x0 + 80001b64: 02408093 addi x1,x1,36 # 80001b84 + 80001b68: 00000013 addi x0,x0,0 + 80001b6c: 00000013 addi x0,x0,0 + 80001b70: 00000013 addi x0,x0,0 + 80001b74: 00000013 addi x0,x0,0 + 80001b78: 00000013 addi x0,x0,0 + 80001b7c: 00000013 addi x0,x0,0 + 80001b80: 00038067 jalr x0,0(x7) + +0000000080001b84 : + 80001b84: 00048093 addi x1,x9,0 + 80001b88: 34102473 csrrs x8,mepc,x0 + 80001b8c: 00440413 addi x8,x8,4 + 80001b90: 34141073 csrrw x0,mepc,x8 + 80001b94: 7240006f jal x0,800022b8 + +0000000080001b98 : + 80001b98: 00050493 addi x9,x10,0 + 80001b9c: 00000013 addi x0,x0,0 + 80001ba0: 0000a517 auipc x10,0xa + 80001ba4: 1fb50513 addi x10,x10,507 # 8000bd9b + 80001ba8: 00000013 addi x0,x0,0 + 80001bac: 00000013 addi x0,x0,0 + 80001bb0: 00000013 addi x0,x0,0 + 80001bb4: 00000013 addi x0,x0,0 + 80001bb8: 00000013 addi x0,x0,0 + 80001bbc: 00000013 addi x0,x0,0 + 80001bc0: 00029097 auipc x1,0x29 + 80001bc4: 9e4080e7 jalr x1,-1564(x1) # 8002a5a4 + 80001bc8: 00048513 addi x10,x9,0 + 80001bcc: 02000593 addi x11,x0,32 + 80001bd0: 728020ef jal x1,800042f8 + 80001bd4: 00000013 addi x0,x0,0 + 80001bd8: 00000013 addi x0,x0,0 + 80001bdc: 00000013 addi x0,x0,0 + 80001be0: 00008517 auipc x10,0x8 + 80001be4: 58850513 addi x10,x10,1416 # 8000a168 + 80001be8: 00000013 addi x0,x0,0 + 80001bec: 00000013 addi x0,x0,0 + 80001bf0: 00000013 addi x0,x0,0 + 80001bf4: 00000013 addi x0,x0,0 + 80001bf8: 00000013 addi x0,x0,0 + 80001bfc: 00000013 addi x0,x0,0 + 80001c00: 00029097 auipc x1,0x29 + 80001c04: 9a4080e7 jalr x1,-1628(x1) # 8002a5a4 + 80001c08: 00000013 addi x0,x0,0 + 80001c0c: 00000013 addi x0,x0,0 + 80001c10: 00000013 addi x0,x0,0 + 80001c14: 00000013 addi x0,x0,0 + 80001c18: 00000013 addi x0,x0,0 + 80001c1c: 00000013 addi x0,x0,0 + 80001c20: 00009517 auipc x10,0x9 + 80001c24: c0250513 addi x10,x10,-1022 # 8000a822 + 80001c28: 00000013 addi x0,x0,0 + 80001c2c: 00000013 addi x0,x0,0 + 80001c30: 00000013 addi x0,x0,0 + 80001c34: 00000013 addi x0,x0,0 + 80001c38: 00000013 addi x0,x0,0 + 80001c3c: 00000013 addi x0,x0,0 + 80001c40: 00029097 auipc x1,0x29 + 80001c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80001c48: 00000013 addi x0,x0,0 + 80001c4c: 00000013 addi x0,x0,0 + 80001c50: 00000013 addi x0,x0,0 + 80001c54: 00000013 addi x0,x0,0 + 80001c58: 00000013 addi x0,x0,0 + 80001c5c: 00000013 addi x0,x0,0 + 80001c60: 00009517 auipc x10,0x9 + 80001c64: abf50513 addi x10,x10,-1345 # 8000a71f + 80001c68: 00000013 addi x0,x0,0 + 80001c6c: 00000013 addi x0,x0,0 + 80001c70: 00000013 addi x0,x0,0 + 80001c74: 00000013 addi x0,x0,0 + 80001c78: 00000013 addi x0,x0,0 + 80001c7c: 00000013 addi x0,x0,0 + 80001c80: 00029097 auipc x1,0x29 + 80001c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80001c88: 00029097 auipc x1,0x29 + 80001c8c: 97c080e7 jalr x1,-1668(x1) # 8002a604 + +0000000080001c90 : + 80001c90: 30002573 .word 0x30002573 + 80001c94: 00008067 jalr x0,0(x1) + 80001c98: 30059073 .word 0x30059073 + 80001c9c: 00008067 jalr x0,0(x1) + 80001ca0: 3005a073 .word 0x3005a073 + 80001ca4: 00008067 jalr x0,0(x1) + 80001ca8: 3005b073 .word 0x3005b073 + 80001cac: 00008067 jalr x0,0(x1) + 80001cb0: 30402573 .word 0x30402573 + 80001cb4: 00008067 jalr x0,0(x1) + 80001cb8: 30459073 .word 0x30459073 + 80001cbc: 00008067 jalr x0,0(x1) + 80001cc0: 3045a073 .word 0x3045a073 + 80001cc4: 00008067 jalr x0,0(x1) + 80001cc8: 3045b073 .word 0x3045b073 + 80001ccc: 00008067 jalr x0,0(x1) + 80001cd0: 30602573 .word 0x30602573 + 80001cd4: 00008067 jalr x0,0(x1) + 80001cd8: 30659073 .word 0x30659073 + 80001cdc: 00008067 jalr x0,0(x1) + 80001ce0: 3065a073 .word 0x3065a073 + 80001ce4: 00008067 jalr x0,0(x1) + 80001ce8: 3065b073 .word 0x3065b073 + 80001cec: 00008067 jalr x0,0(x1) + 80001cf0: 30a02573 .word 0x30a02573 + 80001cf4: 00008067 jalr x0,0(x1) + 80001cf8: 30a59073 .word 0x30a59073 + 80001cfc: 00008067 jalr x0,0(x1) + 80001d00: 30a5a073 .word 0x30a5a073 + 80001d04: 00008067 jalr x0,0(x1) + 80001d08: 30a5b073 .word 0x30a5b073 + 80001d0c: 00008067 jalr x0,0(x1) + 80001d10: 34402573 .word 0x34402573 + 80001d14: 00008067 jalr x0,0(x1) + 80001d18: 34459073 .word 0x34459073 + 80001d1c: 00008067 jalr x0,0(x1) + 80001d20: 3445a073 .word 0x3445a073 + 80001d24: 00008067 jalr x0,0(x1) + 80001d28: 3445b073 .word 0x3445b073 + 80001d2c: 00008067 jalr x0,0(x1) + 80001d30: 74702573 .word 0x74702573 + 80001d34: 00008067 jalr x0,0(x1) + 80001d38: 74759073 .word 0x74759073 + 80001d3c: 00008067 jalr x0,0(x1) + 80001d40: 7475a073 .word 0x7475a073 + 80001d44: 00008067 jalr x0,0(x1) + 80001d48: 7475b073 .word 0x7475b073 + 80001d4c: 00008067 jalr x0,0(x1) + 80001d50: 32002573 .word 0x32002573 + 80001d54: 00008067 jalr x0,0(x1) + 80001d58: 32059073 .word 0x32059073 + 80001d5c: 00008067 jalr x0,0(x1) + 80001d60: 3205a073 .word 0x3205a073 + 80001d64: 00008067 jalr x0,0(x1) + 80001d68: 3205b073 .word 0x3205b073 + 80001d6c: 00008067 jalr x0,0(x1) + 80001d70: b0002573 .word 0xb0002573 + 80001d74: 00008067 jalr x0,0(x1) + 80001d78: b0059073 .word 0xb0059073 + 80001d7c: 00008067 jalr x0,0(x1) + 80001d80: b005a073 .word 0xb005a073 + 80001d84: 00008067 jalr x0,0(x1) + 80001d88: b005b073 .word 0xb005b073 + 80001d8c: 00008067 jalr x0,0(x1) + 80001d90: b0202573 .word 0xb0202573 + 80001d94: 00008067 jalr x0,0(x1) + 80001d98: b0259073 .word 0xb0259073 + 80001d9c: 00008067 jalr x0,0(x1) + 80001da0: b025a073 .word 0xb025a073 + 80001da4: 00008067 jalr x0,0(x1) + 80001da8: b025b073 .word 0xb025b073 + 80001dac: 00008067 jalr x0,0(x1) + 80001db0: 10002573 .word 0x10002573 + 80001db4: 00008067 jalr x0,0(x1) + 80001db8: 10059073 .word 0x10059073 + 80001dbc: 00008067 jalr x0,0(x1) + 80001dc0: 1005a073 .word 0x1005a073 + 80001dc4: 00008067 jalr x0,0(x1) + 80001dc8: 1005b073 .word 0x1005b073 + 80001dcc: 00008067 jalr x0,0(x1) + 80001dd0: 10402573 .word 0x10402573 + 80001dd4: 00008067 jalr x0,0(x1) + 80001dd8: 10459073 .word 0x10459073 + 80001ddc: 00008067 jalr x0,0(x1) + 80001de0: 1045a073 .word 0x1045a073 + 80001de4: 00008067 jalr x0,0(x1) + 80001de8: 1045b073 .word 0x1045b073 + 80001dec: 00008067 jalr x0,0(x1) + 80001df0: 10602573 .word 0x10602573 + 80001df4: 00008067 jalr x0,0(x1) + 80001df8: 10659073 .word 0x10659073 + 80001dfc: 00008067 jalr x0,0(x1) + 80001e00: 1065a073 .word 0x1065a073 + 80001e04: 00008067 jalr x0,0(x1) + 80001e08: 1065b073 .word 0x1065b073 + 80001e0c: 00008067 jalr x0,0(x1) + 80001e10: 10a02573 .word 0x10a02573 + 80001e14: 00008067 jalr x0,0(x1) + 80001e18: 10a59073 .word 0x10a59073 + 80001e1c: 00008067 jalr x0,0(x1) + 80001e20: 10a5a073 .word 0x10a5a073 + 80001e24: 00008067 jalr x0,0(x1) + 80001e28: 10a5b073 .word 0x10a5b073 + 80001e2c: 00008067 jalr x0,0(x1) + 80001e30: 14402573 .word 0x14402573 + 80001e34: 00008067 jalr x0,0(x1) + 80001e38: 14459073 .word 0x14459073 + 80001e3c: 00008067 jalr x0,0(x1) + 80001e40: 1445a073 .word 0x1445a073 + 80001e44: 00008067 jalr x0,0(x1) + 80001e48: 1445b073 .word 0x1445b073 + 80001e4c: 00008067 jalr x0,0(x1) + 80001e50: 14d02573 .word 0x14d02573 + 80001e54: 00008067 jalr x0,0(x1) + 80001e58: 14d59073 .word 0x14d59073 + 80001e5c: 00008067 jalr x0,0(x1) + 80001e60: 14d5a073 .word 0x14d5a073 + 80001e64: 00008067 jalr x0,0(x1) + 80001e68: 14d5b073 .word 0x14d5b073 + 80001e6c: 00008067 jalr x0,0(x1) + 80001e70: 18002573 .word 0x18002573 + 80001e74: 00008067 jalr x0,0(x1) + 80001e78: 18059073 .word 0x18059073 + 80001e7c: 00008067 jalr x0,0(x1) + 80001e80: 1805a073 .word 0x1805a073 + 80001e84: 00008067 jalr x0,0(x1) + 80001e88: 1805b073 .word 0x1805b073 + 80001e8c: 00008067 jalr x0,0(x1) + 80001e90: 7a002573 .word 0x7a002573 + 80001e94: 00008067 jalr x0,0(x1) + 80001e98: 7a059073 .word 0x7a059073 + 80001e9c: 00008067 jalr x0,0(x1) + 80001ea0: 7a05a073 .word 0x7a05a073 + 80001ea4: 00008067 jalr x0,0(x1) + 80001ea8: 7a05b073 .word 0x7a05b073 + 80001eac: 00008067 jalr x0,0(x1) + 80001eb0: 7a102573 .word 0x7a102573 + 80001eb4: 00008067 jalr x0,0(x1) + 80001eb8: 7a159073 .word 0x7a159073 + 80001ebc: 00008067 jalr x0,0(x1) + 80001ec0: 7a15a073 .word 0x7a15a073 + 80001ec4: 00008067 jalr x0,0(x1) + 80001ec8: 7a15b073 .word 0x7a15b073 + 80001ecc: 00008067 jalr x0,0(x1) + 80001ed0: 7a202573 .word 0x7a202573 + 80001ed4: 00008067 jalr x0,0(x1) + 80001ed8: 7a259073 .word 0x7a259073 + 80001edc: 00008067 jalr x0,0(x1) + 80001ee0: 7a25a073 .word 0x7a25a073 + 80001ee4: 00008067 jalr x0,0(x1) + 80001ee8: 7a25b073 .word 0x7a25b073 + 80001eec: 00008067 jalr x0,0(x1) + 80001ef0: 7a302573 .word 0x7a302573 + 80001ef4: 00008067 jalr x0,0(x1) + 80001ef8: 7a359073 .word 0x7a359073 + 80001efc: 00008067 jalr x0,0(x1) + 80001f00: 7a35a073 .word 0x7a35a073 + 80001f04: 00008067 jalr x0,0(x1) + 80001f08: 7a35b073 .word 0x7a35b073 + 80001f0c: 00008067 jalr x0,0(x1) + 80001f10: 7a402573 .word 0x7a402573 + 80001f14: 00008067 jalr x0,0(x1) + 80001f18: 7a459073 .word 0x7a459073 + 80001f1c: 00008067 jalr x0,0(x1) + 80001f20: 7a45a073 .word 0x7a45a073 + 80001f24: 00008067 jalr x0,0(x1) + 80001f28: 7a45b073 .word 0x7a45b073 + 80001f2c: 00008067 jalr x0,0(x1) + 80001f30: 7a502573 .word 0x7a502573 + 80001f34: 00008067 jalr x0,0(x1) + 80001f38: 7a559073 .word 0x7a559073 + 80001f3c: 00008067 jalr x0,0(x1) + 80001f40: 7a55a073 .word 0x7a55a073 + 80001f44: 00008067 jalr x0,0(x1) + 80001f48: 7a55b073 .word 0x7a55b073 + 80001f4c: 00008067 jalr x0,0(x1) + 80001f50: 7a802573 .word 0x7a802573 + 80001f54: 00008067 jalr x0,0(x1) + 80001f58: 7a859073 .word 0x7a859073 + 80001f5c: 00008067 jalr x0,0(x1) + 80001f60: 7a85a073 .word 0x7a85a073 + 80001f64: 00008067 jalr x0,0(x1) + 80001f68: 7a85b073 .word 0x7a85b073 + 80001f6c: 00008067 jalr x0,0(x1) + 80001f70: 7aa02573 .word 0x7aa02573 + 80001f74: 00008067 jalr x0,0(x1) + 80001f78: 7aa59073 .word 0x7aa59073 + 80001f7c: 00008067 jalr x0,0(x1) + 80001f80: 7aa5a073 .word 0x7aa5a073 + 80001f84: 00008067 jalr x0,0(x1) + 80001f88: 7aa5b073 .word 0x7aa5b073 + 80001f8c: 00008067 jalr x0,0(x1) + 80001f90: 5a802573 .word 0x5a802573 + 80001f94: 00008067 jalr x0,0(x1) + 80001f98: 5a859073 .word 0x5a859073 + 80001f9c: 00008067 jalr x0,0(x1) + 80001fa0: 5a85a073 .word 0x5a85a073 + 80001fa4: 00008067 jalr x0,0(x1) + 80001fa8: 5a85b073 .word 0x5a85b073 + 80001fac: 00008067 jalr x0,0(x1) + 80001fb0: 6a802573 .word 0x6a802573 + 80001fb4: 00008067 jalr x0,0(x1) + 80001fb8: 6a859073 .word 0x6a859073 + 80001fbc: 00008067 jalr x0,0(x1) + 80001fc0: 6a85a073 .word 0x6a85a073 + 80001fc4: 00008067 jalr x0,0(x1) + 80001fc8: 6a85b073 .word 0x6a85b073 + 80001fcc: 00008067 jalr x0,0(x1) + 80001fd0: 0005a503 lw x10,0(x11) + 80001fd4: 00008067 jalr x0,0(x1) + 80001fd8: 0045a503 lw x10,4(x11) + 80001fdc: 00008067 jalr x0,0(x1) + 80001fe0: 00c5a023 sw x12,0(x11) + 80001fe4: 00008067 jalr x0,0(x1) + 80001fe8: 00c5a223 sw x12,4(x11) + 80001fec: 00008067 jalr x0,0(x1) + 80001ff0: 0005b503 ld x10,0(x11) + 80001ff4: 00008067 jalr x0,0(x1) + 80001ff8: 00c5b023 sd x12,0(x11) + 80001ffc: 00008067 jalr x0,0(x1) + 80002000: 00000000 .word 0x00000000 + +0000000080002004 : + 80002004: 02000393 addi x7,x0,32 + 80002008: 00075c63 bge x14,x0,80002020 + +000000008000200c : + 8000200c: 00171413 slli x8,x14,0x1 + 80002010: ff240413 addi x8,x8,-14 + 80002014: 00045663 bge x8,x0,80002020 + 80002018: 01800393 addi x7,x0,24 + 8000201c: 0040006f jal x0,80002020 + +0000000080002020 : + 80002020: ca810113 addi x2,x2,-856 + 80002024: 5f013303 ld x6,1520(x2) + 80002028: 007304b3 add x9,x6,x7 + 8000202c: 5e913823 sd x9,1520(x2) + 80002030: 5d013403 ld x8,1488(x2) + 80002034: 40830333 sub x6,x6,x8 + 80002038: 35810113 addi x2,x2,856 + 8000203c: 27813403 ld x8,632(x2) + 80002040: 00830333 add x6,x6,x8 + 80002044: 34102473 csrrs x8,mepc,x0 + 80002048: 00000013 addi x0,x0,0 + 8000204c: 00000013 addi x0,x0,0 + 80002050: 00000013 addi x0,x0,0 + 80002054: 00000013 addi x0,x0,0 + 80002058: 00000013 addi x0,x0,0 + 8000205c: 00000013 addi x0,x0,0 + 80002060: 00008497 auipc x9,0x8 + 80002064: 0e848493 addi x9,x9,232 # 8000a148 + 80002068: 00000013 addi x0,x0,0 + 8000206c: 00000013 addi x0,x0,0 + 80002070: 00000013 addi x0,x0,0 + 80002074: 00000013 addi x0,x0,0 + 80002078: 00000013 addi x0,x0,0 + 8000207c: 00000013 addi x0,x0,0 + 80002080: 0084b023 sd x8,0(x9) + 80002084: 00e4b423 sd x14,8(x9) + 80002088: 34302473 csrrs x8,mtval,x0 + 8000208c: 0084b823 sd x8,16(x9) + 80002090: 30002473 csrrs x8,mstatus,x0 + 80002094: 0084bc23 sd x8,24(x9) + 80002098: 00000013 addi x0,x0,0 + 8000209c: 00000013 addi x0,x0,0 + 800020a0: 00027417 auipc x8,0x27 + 800020a4: 5f840413 addi x8,x8,1528 # 80029698 + 800020a8: 00000013 addi x0,x0,0 + 800020ac: 00000013 addi x0,x0,0 + 800020b0: 00000013 addi x0,x0,0 + 800020b4: 00000013 addi x0,x0,0 + 800020b8: 00000013 addi x0,x0,0 + 800020bc: 00000013 addi x0,x0,0 + 800020c0: 007304b3 add x9,x6,x7 + 800020c4: e2946663 bltu x8,x9,800016f0 + +00000000800020c8 : + 800020c8: 2c013403 ld x8,704(x2) + 800020cc: 408787b3 sub x15,x15,x8 + 800020d0: 00179493 slli x9,x15,0x1 + 800020d4: 009787b3 add x15,x15,x9 + 800020d8: 0057d793 srli x15,x15,0x5 + 800020dc: 00679793 slli x15,x15,0x6 + 800020e0: 0077e7b3 or x15,x15,x7 + 800020e4: 00378793 addi x15,x15,3 + 800020e8: 02075a63 bge x14,x0,8000211c + 800020ec: 00f00413 addi x8,x0,15 + 800020f0: 00877433 and x8,x14,x8 + 800020f4: 304024f3 csrrs x9,mie,x0 + 800020f8: 0084d4b3 srl x9,x9,x8 + 800020fc: 0014f493 andi x9,x9,1 + 80002100: 00b49493 slli x9,x9,0xb + 80002104: 0097e7b3 or x15,x15,x9 + 80002108: 344024f3 csrrs x9,mip,x0 + 8000210c: 0084d4b3 srl x9,x9,x8 + 80002110: 0014f493 andi x9,x9,1 + 80002114: 00c49493 slli x9,x9,0xc + 80002118: 0097e7b3 or x15,x15,x9 + 8000211c: 300023f3 csrrs x7,mstatus,x0 + 80002120: 02f39393 slli x7,x7,0x2f + 80002124: 0223d393 srli x7,x7,0x22 + 80002128: 00000437 lui x8,0x0 + 8000212c: 00040413 addi x8,x8,0 # 0 + 80002130: 00b41413 slli x8,x8,0xb + 80002134: 00140413 addi x8,x8,1 + 80002138: 00b41413 slli x8,x8,0xb + 8000213c: 06740413 addi x8,x8,103 + 80002140: 00a41413 slli x8,x8,0xa + 80002144: 3e540413 addi x8,x8,997 + 80002148: fff44413 xori x8,x8,-1 + 8000214c: 0083f433 and x8,x7,x8 + 80002150: 0087e433 or x8,x15,x8 + 80002154: 0204d493 srli x9,x9,0x20 + 80002158: 1c04f493 andi x9,x9,448 + 8000215c: 00849493 slli x9,x9,0x8 + 80002160: 00946433 or x8,x8,x9 + 80002164: 00033483 ld x9,0(x6) + 80002168: 02848263 beq x9,x8,8000218c + 8000216c: 00040313 addi x6,x8,0 + 80002170: 00048213 addi x4,x9,0 + 80002174: 6b4003ef jal x7,80002828 + 80002178: 800020c8 .word 0x800020c8 + 8000217c: 00000000 .word 0x00000000 + 80002180: 8000a924 .word 0x8000a924 + 80002184: 00000000 .word 0x00000000 + 80002188: 00000341 .word 0x00000341 + +000000008000218c : + 8000218c: 00070413 addi x8,x14,0 + 80002190: 00833483 ld x9,8(x6) + 80002194: 02848263 beq x9,x8,800021b8 + 80002198: 00040313 addi x6,x8,0 + 8000219c: 00048213 addi x4,x9,0 + 800021a0: 688003ef jal x7,80002828 + 800021a4: 8000218c .word 0x8000218c + 800021a8: 00000000 .word 0x00000000 + 800021ac: 8000aa26 .word 0x8000aa26 + 800021b0: 00000000 .word 0x00000000 + 800021b4: 00000341 .word 0x00000341 + 800021b8: 12074063 blt x14,x0,800022d8 + +00000000800021bc : + 800021bc: 34102473 csrrs x8,mepc,x0 + 800021c0: 00010493 addi x9,x2,0 + 800021c4: 0040006f jal x0,800021c8 + +00000000800021c8 : + 800021c8: 08000393 addi x7,x0,128 + 800021cc: 04740863 beq x8,x7,8000221c + 800021d0: 00238393 addi x7,x7,2 + 800021d4: 04740463 beq x8,x7,8000221c + 800021d8: 04040263 beq x8,x0,8000221c + 800021dc: 2884b383 ld x7,648(x9) + 800021e0: 2904b783 ld x15,656(x9) + 800021e4: 007787b3 add x15,x15,x7 + 800021e8: 00f47463 bgeu x8,x15,800021f0 + 800021ec: 02747663 bgeu x8,x7,80002218 + +00000000800021f0 : + 800021f0: 2584b383 ld x7,600(x9) + 800021f4: 2604b783 ld x15,608(x9) + 800021f8: 007787b3 add x15,x15,x7 + 800021fc: 00f47463 bgeu x8,x15,80002204 + 80002200: 00747c63 bgeu x8,x7,80002218 + +0000000080002204 : + 80002204: 2684b383 ld x7,616(x9) + 80002208: 2704b783 ld x15,624(x9) + 8000220c: 007787b3 add x15,x15,x7 + 80002210: d0f47a63 bgeu x8,x15,80001724 + 80002214: d0746863 bltu x8,x7,80001724 + +0000000080002218 : + 80002218: 40740433 sub x8,x8,x7 + +000000008000221c : + 8000221c: 01033483 ld x9,16(x6) + 80002220: 02848263 beq x9,x8,80002244 + 80002224: 00040313 addi x6,x8,0 + 80002228: 00048213 addi x4,x9,0 + 8000222c: 5fc003ef jal x7,80002828 + 80002230: 8000221c .word 0x8000221c + 80002234: 00000000 .word 0x00000000 + 80002238: 8000ab21 .word 0x8000ab21 + 8000223c: 00000000 .word 0x00000000 + 80002240: 00000341 .word 0x00000341 + +0000000080002244 : + 80002244: 34102473 csrrs x8,mepc,x0 + 80002248: 342023f3 csrrs x7,mcause,x0 + 8000224c: 00c00793 addi x15,x0,12 + 80002250: 00f38a63 beq x7,x15,80002264 + 80002254: 00100793 addi x15,x0,1 + 80002258: 00f38663 beq x7,x15,80002264 + 8000225c: 01400793 addi x15,x0,20 + 80002260: 00f39663 bne x7,x15,8000226c + 80002264: 34109073 csrrw x0,mepc,x1 + 80002268: 0100006f jal x0,80002278 + +000000008000226c : + 8000226c: 00400393 addi x7,x0,4 + 80002270: 00740433 add x8,x8,x7 + 80002274: 34141073 csrrw x0,mepc,x8 + +0000000080002278 : + 80002278: 34302473 csrrs x8,mtval,x0 + +000000008000227c : + 8000227c: 01833483 ld x9,24(x6) + 80002280: 02848263 beq x9,x8,800022a4 + 80002284: 00040313 addi x6,x8,0 + 80002288: 00048213 addi x4,x9,0 + 8000228c: 59c003ef jal x7,80002828 + 80002290: 8000227c .word 0x8000227c + 80002294: 00000000 .word 0x00000000 + 80002298: 8000ac14 .word 0x8000ac14 + 8000229c: 00000000 .word 0x00000000 + 800022a0: 00000341 .word 0x00000341 + +00000000800022a4 : + 800022a4: 30102473 csrrs x8,misa,x0 + 800022a8: 03841413 slli x8,x8,0x38 + 800022ac: 00045263 bge x8,x0,800022b0 + +00000000800022b0 : + 800022b0: 20000393 addi x7,x0,512 + 800022b4: 0640006f jal x0,80002318 + +00000000800022b8 : + 800022b8: 2e013303 ld x6,736(x2) + 800022bc: 2e813383 ld x7,744(x2) + 800022c0: 2f013403 ld x8,752(x2) + 800022c4: 2f813483 ld x9,760(x2) + 800022c8: 30013703 ld x14,768(x2) + 800022cc: 30813783 ld x15,776(x2) + 800022d0: 31013103 ld x2,784(x2) + 800022d4: 30200073 mret + +00000000800022d8 : + 800022d8: 00100413 addi x8,x0,1 + 800022dc: 01f77393 andi x7,x14,31 + 800022e0: 00741433 sll x8,x8,x7 + 800022e4: 304434f3 csrrc x9,mie,x8 + 800022e8: 34443473 csrrc x8,mip,x8 + +00000000800022ec : + 800022ec: 01033483 ld x9,16(x6) + 800022f0: 02848263 beq x9,x8,80002314 + 800022f4: 00040313 addi x6,x8,0 + 800022f8: 00048213 addi x4,x9,0 + 800022fc: 52c003ef jal x7,80002828 + 80002300: 800022ec .word 0x800022ec + 80002304: 00000000 .word 0x00000000 + 80002308: 8000ad87 .word 0x8000ad87 + 8000230c: 00000000 .word 0x00000000 + 80002310: 00000341 .word 0x00000341 + 80002314: 00000393 addi x7,x0,0 + +0000000080002318 : + 80002318: 00000417 auipc x8,0x0 + 8000231c: 03c40413 addi x8,x8,60 # 80002354 + 80002320: 00740433 add x8,x8,x7 + 80002324: 00371393 slli x7,x14,0x3 + 80002328: 00740433 add x8,x8,x7 + 8000232c: ff847413 andi x8,x8,-8 + 80002330: 00043403 ld x8,0(x8) + +0000000080002334 : + 80002334: 00040a63 beq x8,x0,80002348 + 80002338: 03f41393 slli x7,x8,0x3f + 8000233c: 0003d863 bge x7,x0,8000234c + 80002340: 00145413 srli x8,x8,0x1 + 80002344: f6870ae3 beq x14,x8,800022b8 + 80002348: bdcff06f jal x0,80001724 + +000000008000234c : + 8000234c: 00040067 jalr x0,0(x8) + +0000000080002350 : + ... + 80002358: 00000001 .word 0x00000001 + 8000235c: 00000000 .word 0x00000000 + 80002360: 00000001 .word 0x00000001 + 80002364: 00000000 .word 0x00000000 + 80002368: 8002a000 .word 0x8002a000 + ... + 80002378: 00000001 .word 0x00000001 + 8000237c: 00000000 .word 0x00000000 + 80002380: 00000001 .word 0x00000001 + 80002384: 00000000 .word 0x00000000 + 80002388: 8002a014 .word 0x8002a014 + ... + 80002398: 00000001 .word 0x00000001 + 8000239c: 00000000 .word 0x00000000 + 800023a0: 00000001 .word 0x00000001 + 800023a4: 00000000 .word 0x00000000 + 800023a8: 8002a02c .word 0x8002a02c + 800023ac: 00000000 .word 0x00000000 + 800023b0: 00000001 .word 0x00000001 + 800023b4: 00000000 .word 0x00000000 + 800023b8: 00000001 .word 0x00000001 + 800023bc: 00000000 .word 0x00000000 + 800023c0: 00000001 .word 0x00000001 + 800023c4: 00000000 .word 0x00000000 + 800023c8: 00000001 .word 0x00000001 + 800023cc: 00000000 .word 0x00000000 + 800023d0: 00000001 .word 0x00000001 + 800023d4: 00000000 .word 0x00000000 + 800023d8: 00000001 .word 0x00000001 + 800023dc: 00000000 .word 0x00000000 + 800023e0: 00000001 .word 0x00000001 + 800023e4: 00000000 .word 0x00000000 + 800023e8: 00000001 .word 0x00000001 + 800023ec: 00000000 .word 0x00000000 + 800023f0: 00000001 .word 0x00000001 + 800023f4: 00000000 .word 0x00000000 + 800023f8: 00000001 .word 0x00000001 + 800023fc: 00000000 .word 0x00000000 + 80002400: 00000001 .word 0x00000001 + 80002404: 00000000 .word 0x00000000 + 80002408: 00000001 .word 0x00000001 + ... + +0000000080002550 : + 80002550: 00000001 .word 0x00000001 + 80002554: 00000000 .word 0x00000000 + 80002558: 00000003 .word 0x00000003 + 8000255c: 00000000 .word 0x00000000 + 80002560: 00000005 .word 0x00000005 + 80002564: 00000000 .word 0x00000000 + 80002568: 00000007 .word 0x00000007 + 8000256c: 00000000 .word 0x00000000 + 80002570: 00000009 .word 0x00000009 + 80002574: 00000000 .word 0x00000000 + 80002578: 0000000b .word 0x0000000b + 8000257c: 00000000 .word 0x00000000 + 80002580: 0000000d .word 0x0000000d + 80002584: 00000000 .word 0x00000000 + 80002588: 0000000f .word 0x0000000f + 8000258c: 00000000 .word 0x00000000 + 80002590: 00000011 .word 0x00000011 + 80002594: 00000000 .word 0x00000000 + 80002598: 00000013 .word 0x00000013 + 8000259c: 00000000 .word 0x00000000 + 800025a0: 00000015 .word 0x00000015 + 800025a4: 00000000 .word 0x00000000 + 800025a8: 00000017 .word 0x00000017 + 800025ac: 00000000 .word 0x00000000 + 800025b0: 00000019 .word 0x00000019 + 800025b4: 00000000 .word 0x00000000 + 800025b8: 0000001b .word 0x0000001b + 800025bc: 00000000 .word 0x00000000 + 800025c0: 0000001d .word 0x0000001d + 800025c4: 00000000 .word 0x00000000 + 800025c8: 0000001f .word 0x0000001f + 800025cc: 00000000 .word 0x00000000 + 800025d0: 00000021 .word 0x00000021 + 800025d4: 00000000 .word 0x00000000 + 800025d8: 00000023 .word 0x00000023 + 800025dc: 00000000 .word 0x00000000 + 800025e0: 00000025 .word 0x00000025 + 800025e4: 00000000 .word 0x00000000 + 800025e8: 00000027 .word 0x00000027 + 800025ec: 00000000 .word 0x00000000 + 800025f0: 00000029 .word 0x00000029 + 800025f4: 00000000 .word 0x00000000 + 800025f8: 0000002b .word 0x0000002b + 800025fc: 00000000 .word 0x00000000 + 80002600: 0000002d .word 0x0000002d + 80002604: 00000000 .word 0x00000000 + 80002608: 0000002f .word 0x0000002f + ... + +0000000080002750 : + 80002750: 300023f3 csrrs x7,mstatus,x0 + 80002754: 00b3d493 srli x9,x7,0xb + 80002758: 0034f493 andi x9,x9,3 + 8000275c: ffd48413 addi x8,x9,-3 + 80002760: 341023f3 csrrs x7,mepc,x0 + 80002764: 00000493 addi x9,x0,0 + 80002768: 02040c63 beq x8,x0,800027a0 + 8000276c: 35810113 addi x2,x2,856 + 80002770: 300023f3 csrrs x7,mstatus,x0 + 80002774: 01839393 slli x7,x7,0x18 + 80002778: 0003da63 bge x7,x0,8000278c + +000000008000277c : + 8000277c: 35810113 addi x2,x2,856 + 80002780: 5b013783 ld x15,1456(x2) + 80002784: ca810113 addi x2,x2,-856 + 80002788: 0080006f jal x0,80002790 + +000000008000278c : + 8000278c: f0013783 ld x15,-256(x2) + 80002790: 341023f3 csrrs x7,mepc,x0 + 80002794: 40f383b3 sub x7,x7,x15 + 80002798: ca810113 addi x2,x2,-856 + 8000279c: 25813483 ld x9,600(x2) + +00000000800027a0 : + 800027a0: 007483b3 add x7,x9,x7 + 800027a4: 2e013303 ld x6,736(x2) + 800027a8: 2f013403 ld x8,752(x2) + 800027ac: 2f813483 ld x9,760(x2) + 800027b0: 30013703 ld x14,768(x2) + 800027b4: 30813783 ld x15,776(x2) + 800027b8: 31013103 ld x2,784(x2) + 800027bc: 00438067 jalr x0,4(x7) + +00000000800027c0 : + 800027c0: 00008217 auipc x4,0x8 + 800027c4: 84020213 addi x4,x4,-1984 # 8000a000 + 800027c8: 02523423 sd x5,40(x4) # 28 + 800027cc: 00123423 sd x1,8(x4) # 8 + 800027d0: 00023023 sd x0,0(x4) # 0 + 800027d4: 0880006f jal x0,8000285c + +00000000800027d8 : + 800027d8: 00008397 auipc x7,0x8 + 800027dc: 82838393 addi x7,x7,-2008 # 8000a000 + 800027e0: 0483b023 sd x8,64(x7) + 800027e4: 0243b023 sd x4,32(x7) + 800027e8: 0253b423 sd x5,40(x7) + 800027ec: 0013b423 sd x1,8(x7) + 800027f0: 0003b023 sd x0,0(x7) + 800027f4: 00038213 addi x4,x7,0 + 800027f8: 00040293 addi x5,x8,0 + 800027fc: 0600006f jal x0,8000285c + +0000000080002800 : + 80002800: 00008697 auipc x13,0x8 + 80002804: 80068693 addi x13,x13,-2048 # 8000a000 + 80002808: 06e6b823 sd x14,112(x13) + 8000280c: 0246b023 sd x4,32(x13) + 80002810: 0256b423 sd x5,40(x13) + 80002814: 0016b423 sd x1,8(x13) + 80002818: 0006b023 sd x0,0(x13) + 8000281c: 00068213 addi x4,x13,0 + 80002820: 00070293 addi x5,x14,0 + 80002824: 0380006f jal x0,8000285c + +0000000080002828 : + 80002828: 00007497 auipc x9,0x7 + 8000282c: 7d848493 addi x9,x9,2008 # 8000a000 + 80002830: 0674b423 sd x7,104(x9) + 80002834: 0244b023 sd x4,32(x9) + 80002838: 0254b423 sd x5,40(x9) + 8000283c: 0014b423 sd x1,8(x9) + 80002840: 00300093 addi x1,x0,3 + 80002844: 0014b023 sd x1,0(x9) + 80002848: 1064b823 sd x6,272(x9) + 8000284c: 1044bc23 sd x4,280(x9) + 80002850: 00048213 addi x4,x9,0 + 80002854: 00038293 addi x5,x7,0 + 80002858: 0040006f jal x0,8000285c + +000000008000285c : + 8000285c: 00223823 sd x2,16(x4) # 10 + 80002860: 00323c23 sd x3,24(x4) # 18 + 80002864: 02623823 sd x6,48(x4) # 30 + 80002868: 02723c23 sd x7,56(x4) # 38 + 8000286c: 04823023 sd x8,64(x4) # 40 + 80002870: 04923423 sd x9,72(x4) # 48 + 80002874: 04a23823 sd x10,80(x4) # 50 + 80002878: 04b23c23 sd x11,88(x4) # 58 + 8000287c: 06c23023 sd x12,96(x4) # 60 + 80002880: 06d23423 sd x13,104(x4) # 68 + 80002884: 06e23823 sd x14,112(x4) # 70 + 80002888: 06f23c23 sd x15,120(x4) # 78 + 8000288c: 09023023 sd x16,128(x4) # 80 + 80002890: 09123423 sd x17,136(x4) # 88 + 80002894: 09223823 sd x18,144(x4) # 90 + 80002898: 09323c23 sd x19,152(x4) # 98 + 8000289c: 0b423023 sd x20,160(x4) # a0 + 800028a0: 0b523423 sd x21,168(x4) # a8 + 800028a4: 0b623823 sd x22,176(x4) # b0 + 800028a8: 0b723c23 sd x23,184(x4) # b8 + 800028ac: 0d823023 sd x24,192(x4) # c0 + 800028b0: 0d923423 sd x25,200(x4) # c8 + 800028b4: 0da23823 sd x26,208(x4) # d0 + 800028b8: 0db23c23 sd x27,216(x4) # d8 + 800028bc: 0fc23023 sd x28,224(x4) # e0 + 800028c0: 0fd23423 sd x29,232(x4) # e8 + 800028c4: 0fe23823 sd x30,240(x4) # f0 + 800028c8: 0ff23c23 sd x31,248(x4) # f8 + +00000000800028cc : + 800028cc: 00007497 auipc x9,0x7 + 800028d0: 7344a483 lw x9,1844(x9) # 8000a000 + 800028d4: 00300513 addi x10,x0,3 + 800028d8: 18a48a63 beq x9,x10,80002a6c + +00000000800028dc : + 800028dc: ffa2d303 lhu x6,-6(x5) + 800028e0: ff82d383 lhu x7,-8(x5) + 800028e4: 01031313 slli x6,x6,0x10 + 800028e8: 00736333 or x6,x6,x7 + 800028ec: 00f35393 srli x7,x6,0xf + 800028f0: 01f3f393 andi x7,x7,31 + 800028f4: 01435413 srli x8,x6,0x14 + 800028f8: 01f47413 andi x8,x8,31 + 800028fc: 10822223 sw x8,260(x4) # 104 + 80002900: 00341313 slli x6,x8,0x3 + 80002904: 00620333 add x6,x4,x6 + 80002908: 00033303 ld x6,0(x6) + 8000290c: 10623823 sd x6,272(x4) # 110 + 80002910: ff62d303 lhu x6,-10(x5) + 80002914: ff42d383 lhu x7,-12(x5) + 80002918: 01031313 slli x6,x6,0x10 + 8000291c: 00736333 or x6,x6,x7 + 80002920: 00030513 addi x10,x6,0 + 80002924: 07f37413 andi x8,x6,127 + 80002928: 00300493 addi x9,x0,3 + 8000292c: 0c941463 bne x8,x9,800029f4 + 80002930: 00c35413 srli x8,x6,0xc + 80002934: 00747413 andi x8,x8,7 + 80002938: 00300493 addi x9,x0,3 + 8000293c: 0a941c63 bne x8,x9,800029f4 + 80002940: 41435393 srai x7,x6,0x14 + 80002944: 00f35313 srli x6,x6,0xf + 80002948: 01f37313 andi x6,x6,31 + 8000294c: 00331313 slli x6,x6,0x3 + 80002950: 00620333 add x6,x4,x6 + 80002954: 00033303 ld x6,0(x6) + 80002958: 00730333 add x6,x6,x7 + 8000295c: 00737413 andi x8,x6,7 + 80002960: 0c041663 bne x8,x0,80002a2c + 80002964: 00000013 addi x0,x0,0 + 80002968: 00000013 addi x0,x0,0 + 8000296c: 00000013 addi x0,x0,0 + 80002970: 00000013 addi x0,x0,0 + 80002974: 00000013 addi x0,x0,0 + 80002978: 00000013 addi x0,x0,0 + 8000297c: 00000013 addi x0,x0,0 + 80002980: 00009417 auipc x8,0x9 + 80002984: 46040413 addi x8,x8,1120 # 8000bde0 + 80002988: 00000013 addi x0,x0,0 + 8000298c: 00000013 addi x0,x0,0 + 80002990: 00000013 addi x0,x0,0 + 80002994: 00000013 addi x0,x0,0 + 80002998: 00000013 addi x0,x0,0 + 8000299c: 00000013 addi x0,x0,0 + 800029a0: 08836663 bltu x6,x8,80002a2c + 800029a4: 00000013 addi x0,x0,0 + 800029a8: 00000013 addi x0,x0,0 + 800029ac: 00000013 addi x0,x0,0 + 800029b0: 00000013 addi x0,x0,0 + 800029b4: 00000013 addi x0,x0,0 + 800029b8: 00000013 addi x0,x0,0 + 800029bc: 00000013 addi x0,x0,0 + 800029c0: 00027417 auipc x8,0x27 + 800029c4: ce040413 addi x8,x8,-800 # 800296a0 + 800029c8: 00000013 addi x0,x0,0 + 800029cc: 00000013 addi x0,x0,0 + 800029d0: 00000013 addi x0,x0,0 + 800029d4: 00000013 addi x0,x0,0 + 800029d8: 00000013 addi x0,x0,0 + 800029dc: 00000013 addi x0,x0,0 + 800029e0: ff840413 addi x8,x8,-8 + 800029e4: 04646463 bltu x8,x6,80002a2c + 800029e8: 00033303 ld x6,0(x6) + 800029ec: 10623c23 sd x6,280(x4) # 118 + 800029f0: 3880006f jal x0,80002d78 + +00000000800029f4 : + 800029f4: 00100413 addi x8,x0,1 + 800029f8: 00000013 addi x0,x0,0 + 800029fc: 00000013 addi x0,x0,0 + 80002a00: 00007497 auipc x9,0x7 + 80002a04: 72848493 addi x9,x9,1832 # 8000a128 + 80002a08: 00000013 addi x0,x0,0 + 80002a0c: 00000013 addi x0,x0,0 + 80002a10: 00000013 addi x0,x0,0 + 80002a14: 00000013 addi x0,x0,0 + 80002a18: 00000013 addi x0,x0,0 + 80002a1c: 00000013 addi x0,x0,0 + 80002a20: 0084a023 sw x8,0(x9) + 80002a24: 10a23c23 sd x10,280(x4) # 118 + 80002a28: 3500006f jal x0,80002d78 + +0000000080002a2c : + 80002a2c: 00200413 addi x8,x0,2 + 80002a30: 00000013 addi x0,x0,0 + 80002a34: 00000013 addi x0,x0,0 + 80002a38: 00000013 addi x0,x0,0 + 80002a3c: 00000013 addi x0,x0,0 + 80002a40: 00007497 auipc x9,0x7 + 80002a44: 6e848493 addi x9,x9,1768 # 8000a128 + 80002a48: 00000013 addi x0,x0,0 + 80002a4c: 00000013 addi x0,x0,0 + 80002a50: 00000013 addi x0,x0,0 + 80002a54: 00000013 addi x0,x0,0 + 80002a58: 00000013 addi x0,x0,0 + 80002a5c: 00000013 addi x0,x0,0 + 80002a60: 0084a023 sw x8,0(x9) + 80002a64: 10623c23 sd x6,280(x4) # 118 + 80002a68: 3100006f jal x0,80002d78 + +0000000080002a6c : + 80002a6c: 0082e303 lwu x6,8(x5) + 80002a70: 00c2a383 lw x7,12(x5) + 80002a74: 02039393 slli x7,x7,0x20 + 80002a78: 00736333 or x6,x6,x7 + 80002a7c: 00007817 auipc x16,0x7 + 80002a80: 6bc80813 addi x16,x16,1724 # 8000a138 + 80002a84: 00683023 sd x6,0(x16) + 80002a88: 0002e303 lwu x6,0(x5) + 80002a8c: 0042a383 lw x7,4(x5) + 80002a90: 02039393 slli x7,x7,0x20 + 80002a94: 00736333 or x6,x6,x7 + 80002a98: 10623423 sd x6,264(x4) # 108 + 80002a9c: 00007817 auipc x16,0x7 + 80002aa0: 69c80813 addi x16,x16,1692 # 8000a138 + 80002aa4: 00083303 ld x6,0(x16) + 80002aa8: 00008397 auipc x7,0x8 + 80002aac: e6538393 addi x7,x7,-411 # 8000a90d + 80002ab0: 28730463 beq x6,x7,80002d38 + 80002ab4: 00000413 addi x8,x0,0 + 80002ab8: 00007817 auipc x16,0x7 + 80002abc: 67880813 addi x16,x16,1656 # 8000a130 + 80002ac0: 00882023 sw x8,0(x16) + 80002ac4: 00008397 auipc x7,0x8 + 80002ac8: e6038393 addi x7,x7,-416 # 8000a924 + 80002acc: 00731863 bne x6,x7,80002adc + 80002ad0: 00100413 addi x8,x0,1 + 80002ad4: 00000493 addi x9,x0,0 + 80002ad8: 2740006f jal x0,80002d4c + 80002adc: 00008397 auipc x7,0x8 + 80002ae0: f4a38393 addi x7,x7,-182 # 8000aa26 + 80002ae4: 00731863 bne x6,x7,80002af4 + 80002ae8: 00200413 addi x8,x0,2 + 80002aec: 00000493 addi x9,x0,0 + 80002af0: 25c0006f jal x0,80002d4c + 80002af4: 00008397 auipc x7,0x8 + 80002af8: 02d38393 addi x7,x7,45 # 8000ab21 + 80002afc: 00731863 bne x6,x7,80002b0c + 80002b00: 00300413 addi x8,x0,3 + 80002b04: 00000493 addi x9,x0,0 + 80002b08: 2440006f jal x0,80002d4c + 80002b0c: 00008397 auipc x7,0x8 + 80002b10: 10838393 addi x7,x7,264 # 8000ac14 + 80002b14: 00731863 bne x6,x7,80002b24 + 80002b18: 00400413 addi x8,x0,4 + 80002b1c: 00000493 addi x9,x0,0 + 80002b20: 22c0006f jal x0,80002d4c + 80002b24: 00008397 auipc x7,0x8 + 80002b28: 26338393 addi x7,x7,611 # 8000ad87 + 80002b2c: 00731863 bne x6,x7,80002b3c + 80002b30: 00500413 addi x8,x0,5 + 80002b34: 00000493 addi x9,x0,0 + 80002b38: 2140006f jal x0,80002d4c + 80002b3c: 00008397 auipc x7,0x8 + 80002b40: 1cf38393 addi x7,x7,463 # 8000ad0b + 80002b44: 00731863 bne x6,x7,80002b54 + 80002b48: 00600413 addi x8,x0,6 + 80002b4c: 00000493 addi x9,x0,0 + 80002b50: 1fc0006f jal x0,80002d4c + 80002b54: 00008397 auipc x7,0x8 + 80002b58: 1f538393 addi x7,x7,501 # 8000ad49 + 80002b5c: 00731863 bne x6,x7,80002b6c + 80002b60: 00700413 addi x8,x0,7 + 80002b64: 00000493 addi x9,x0,0 + 80002b68: 1e40006f jal x0,80002d4c + 80002b6c: 00008397 auipc x7,0x8 + 80002b70: df838393 addi x7,x7,-520 # 8000a964 + 80002b74: 00731863 bne x6,x7,80002b84 + 80002b78: 00100413 addi x8,x0,1 + 80002b7c: 00100493 addi x9,x0,1 + 80002b80: 1cc0006f jal x0,80002d4c + 80002b84: 00008397 auipc x7,0x8 + 80002b88: ee038393 addi x7,x7,-288 # 8000aa64 + 80002b8c: 00731863 bne x6,x7,80002b9c + 80002b90: 00200413 addi x8,x0,2 + 80002b94: 00100493 addi x9,x0,1 + 80002b98: 1b40006f jal x0,80002d4c + 80002b9c: 00008397 auipc x7,0x8 + 80002ba0: fc138393 addi x7,x7,-63 # 8000ab5d + 80002ba4: 00731863 bne x6,x7,80002bb4 + 80002ba8: 00300413 addi x8,x0,3 + 80002bac: 00100493 addi x9,x0,1 + 80002bb0: 19c0006f jal x0,80002d4c + 80002bb4: 00008397 auipc x7,0x8 + 80002bb8: 09d38393 addi x7,x7,157 # 8000ac51 + 80002bbc: 00731863 bne x6,x7,80002bcc + 80002bc0: 00400413 addi x8,x0,4 + 80002bc4: 00100493 addi x9,x0,1 + 80002bc8: 1840006f jal x0,80002d4c + 80002bcc: 00008397 auipc x7,0x8 + 80002bd0: 1f638393 addi x7,x7,502 # 8000adc2 + 80002bd4: 00731863 bne x6,x7,80002be4 + 80002bd8: 00500413 addi x8,x0,5 + 80002bdc: 00100493 addi x9,x0,1 + 80002be0: 16c0006f jal x0,80002d4c + 80002be4: 00008397 auipc x7,0x8 + 80002be8: dc038393 addi x7,x7,-576 # 8000a9a4 + 80002bec: 00731863 bne x6,x7,80002bfc + 80002bf0: 00100413 addi x8,x0,1 + 80002bf4: 00200493 addi x9,x0,2 + 80002bf8: 1540006f jal x0,80002d4c + 80002bfc: 00008397 auipc x7,0x8 + 80002c00: ea638393 addi x7,x7,-346 # 8000aaa2 + 80002c04: 00731863 bne x6,x7,80002c14 + 80002c08: 00200413 addi x8,x0,2 + 80002c0c: 00200493 addi x9,x0,2 + 80002c10: 13c0006f jal x0,80002d4c + 80002c14: 00008397 auipc x7,0x8 + 80002c18: f8538393 addi x7,x7,-123 # 8000ab99 + 80002c1c: 00731863 bne x6,x7,80002c2c + 80002c20: 00300413 addi x8,x0,3 + 80002c24: 00200493 addi x9,x0,2 + 80002c28: 1240006f jal x0,80002d4c + 80002c2c: 00008397 auipc x7,0x8 + 80002c30: 06238393 addi x7,x7,98 # 8000ac8e + 80002c34: 00731863 bne x6,x7,80002c44 + 80002c38: 00400413 addi x8,x0,4 + 80002c3c: 00200493 addi x9,x0,2 + 80002c40: 10c0006f jal x0,80002d4c + 80002c44: 00008397 auipc x7,0x8 + 80002c48: 1b938393 addi x7,x7,441 # 8000adfd + 80002c4c: 00731863 bne x6,x7,80002c5c + 80002c50: 00500413 addi x8,x0,5 + 80002c54: 00200493 addi x9,x0,2 + 80002c58: 0f40006f jal x0,80002d4c + 80002c5c: 00008397 auipc x7,0x8 + 80002c60: d8938393 addi x7,x7,-631 # 8000a9e5 + 80002c64: 00731863 bne x6,x7,80002c74 + 80002c68: 00100413 addi x8,x0,1 + 80002c6c: 00300493 addi x9,x0,3 + 80002c70: 0dc0006f jal x0,80002d4c + 80002c74: 00008397 auipc x7,0x8 + 80002c78: e6d38393 addi x7,x7,-403 # 8000aae1 + 80002c7c: 00731863 bne x6,x7,80002c8c + 80002c80: 00200413 addi x8,x0,2 + 80002c84: 00300493 addi x9,x0,3 + 80002c88: 0c40006f jal x0,80002d4c + 80002c8c: 00008397 auipc x7,0x8 + 80002c90: f4a38393 addi x7,x7,-182 # 8000abd6 + 80002c94: 00731863 bne x6,x7,80002ca4 + 80002c98: 00300413 addi x8,x0,3 + 80002c9c: 00300493 addi x9,x0,3 + 80002ca0: 0ac0006f jal x0,80002d4c + 80002ca4: 00008397 auipc x7,0x8 + 80002ca8: 02838393 addi x7,x7,40 # 8000accc + 80002cac: 00731863 bne x6,x7,80002cbc + 80002cb0: 00400413 addi x8,x0,4 + 80002cb4: 00300493 addi x9,x0,3 + 80002cb8: 0940006f jal x0,80002d4c + 80002cbc: 00008397 auipc x7,0x8 + 80002cc0: 17d38393 addi x7,x7,381 # 8000ae39 + 80002cc4: 00731863 bne x6,x7,80002cd4 + 80002cc8: 00500413 addi x8,x0,5 + 80002ccc: 00300493 addi x9,x0,3 + 80002cd0: 07c0006f jal x0,80002d4c + 80002cd4: 00008397 auipc x7,0x8 + 80002cd8: 1a238393 addi x7,x7,418 # 8000ae76 + 80002cdc: 00731863 bne x6,x7,80002cec + 80002ce0: 00800413 addi x8,x0,8 + 80002ce4: 00000493 addi x9,x0,0 + 80002ce8: 0640006f jal x0,80002d4c + 80002cec: 00008397 auipc x7,0x8 + 80002cf0: 1d938393 addi x7,x7,473 # 8000aec5 + 80002cf4: 00731863 bne x6,x7,80002d04 + 80002cf8: 00800413 addi x8,x0,8 + 80002cfc: 00000493 addi x9,x0,0 + 80002d00: 04c0006f jal x0,80002d4c + 80002d04: 00008397 auipc x7,0x8 + 80002d08: 2bc38393 addi x7,x7,700 # 8000afc0 + 80002d0c: 00731863 bne x6,x7,80002d1c + 80002d10: 00800413 addi x8,x0,8 + 80002d14: 00100493 addi x9,x0,1 + 80002d18: 0340006f jal x0,80002d4c + 80002d1c: 00008397 auipc x7,0x8 + 80002d20: 3a038393 addi x7,x7,928 # 8000b0bc + 80002d24: 00731863 bne x6,x7,80002d34 + 80002d28: 00800413 addi x8,x0,8 + 80002d2c: 00200493 addi x9,x0,2 + 80002d30: 01c0006f jal x0,80002d4c + 80002d34: 0340006f jal x0,80002d68 + +0000000080002d38 : + 80002d38: 00900413 addi x8,x0,9 + 80002d3c: 00007817 auipc x16,0x7 + 80002d40: 3f480813 addi x16,x16,1012 # 8000a130 + 80002d44: 00882023 sw x8,0(x16) + 80002d48: 0300006f jal x0,80002d78 + +0000000080002d4c : + 80002d4c: 00007817 auipc x16,0x7 + 80002d50: 3e480813 addi x16,x16,996 # 8000a130 + 80002d54: 00882023 sw x8,0(x16) + 80002d58: 00007817 auipc x16,0x7 + 80002d5c: 3dc80813 addi x16,x16,988 # 8000a134 + 80002d60: 00982023 sw x9,0(x16) + 80002d64: 0140006f jal x0,80002d78 + +0000000080002d68 : + 80002d68: 00007817 auipc x16,0x7 + 80002d6c: 3c880813 addi x16,x16,968 # 8000a130 + 80002d70: 00082023 sw x0,0(x16) + 80002d74: 0040006f jal x0,80002d78 + +0000000080002d78 : + 80002d78: 0002e303 lwu x6,0(x5) + 80002d7c: 0042a383 lw x7,4(x5) + 80002d80: 02039393 slli x7,x7,0x20 + 80002d84: 00736333 or x6,x6,x7 + 80002d88: 10623423 sd x6,264(x4) # 108 + 80002d8c: 00035383 lhu x7,0(x6) + 80002d90: 0033f413 andi x8,x7,3 + 80002d94: 00300493 addi x9,x0,3 + 80002d98: 00941863 bne x8,x9,80002da8 + 80002d9c: 00235403 lhu x8,2(x6) + 80002da0: 01041413 slli x8,x8,0x10 + 80002da4: 0083e3b3 or x7,x7,x8 + 80002da8: 10722023 sw x7,256(x4) # 100 + 80002dac: 0082e303 lwu x6,8(x5) + 80002db0: 00c2a383 lw x7,12(x5) + 80002db4: 02039393 slli x7,x7,0x20 + 80002db8: 00736333 or x6,x6,x7 + 80002dbc: 12623023 sd x6,288(x4) # 120 + +0000000080002dc0 : + 80002dc0: 00008517 auipc x10,0x8 + 80002dc4: 95f50513 addi x10,x10,-1697 # 8000a71f + 80002dc8: 00000013 addi x0,x0,0 + 80002dcc: 00000013 addi x0,x0,0 + 80002dd0: 00000013 addi x0,x0,0 + 80002dd4: 00000013 addi x0,x0,0 + 80002dd8: 00000013 addi x0,x0,0 + 80002ddc: 00000013 addi x0,x0,0 + 80002de0: 00027097 auipc x1,0x27 + 80002de4: 7c4080e7 jalr x1,1988(x1) # 8002a5a4 + 80002de8: 00000013 addi x0,x0,0 + 80002dec: 00000013 addi x0,x0,0 + 80002df0: 00000013 addi x0,x0,0 + 80002df4: 00000013 addi x0,x0,0 + 80002df8: 00000013 addi x0,x0,0 + 80002dfc: 00000013 addi x0,x0,0 + 80002e00: 00008517 auipc x10,0x8 + 80002e04: 95950513 addi x10,x10,-1703 # 8000a759 + 80002e08: 00000013 addi x0,x0,0 + 80002e0c: 00000013 addi x0,x0,0 + 80002e10: 00000013 addi x0,x0,0 + 80002e14: 00000013 addi x0,x0,0 + 80002e18: 00000013 addi x0,x0,0 + 80002e1c: 00000013 addi x0,x0,0 + 80002e20: 00027097 auipc x1,0x27 + 80002e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + +0000000080002e28 : + 80002e28: 00000013 addi x0,x0,0 + 80002e2c: 00000013 addi x0,x0,0 + 80002e30: 00000013 addi x0,x0,0 + 80002e34: 00000013 addi x0,x0,0 + 80002e38: 00000013 addi x0,x0,0 + 80002e3c: 00000013 addi x0,x0,0 + 80002e40: 00008517 auipc x10,0x8 + 80002e44: 9d050513 addi x10,x10,-1584 # 8000a810 + 80002e48: 00000013 addi x0,x0,0 + 80002e4c: 00000013 addi x0,x0,0 + 80002e50: 00000013 addi x0,x0,0 + 80002e54: 00000013 addi x0,x0,0 + 80002e58: 00000013 addi x0,x0,0 + 80002e5c: 00000013 addi x0,x0,0 + 80002e60: 00027097 auipc x1,0x27 + 80002e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + +0000000080002e68 : + 80002e68: 00007517 auipc x10,0x7 + 80002e6c: 2b853503 ld x10,696(x10) # 8000a120 + 80002e70: 00027097 auipc x1,0x27 + 80002e74: 734080e7 jalr x1,1844(x1) # 8002a5a4 + +0000000080002e78 : + 80002e78: 00000013 addi x0,x0,0 + 80002e7c: 00000013 addi x0,x0,0 + 80002e80: 00008517 auipc x10,0x8 + 80002e84: 9a250513 addi x10,x10,-1630 # 8000a822 + 80002e88: 00000013 addi x0,x0,0 + 80002e8c: 00000013 addi x0,x0,0 + 80002e90: 00000013 addi x0,x0,0 + 80002e94: 00000013 addi x0,x0,0 + 80002e98: 00000013 addi x0,x0,0 + 80002e9c: 00000013 addi x0,x0,0 + 80002ea0: 00027097 auipc x1,0x27 + 80002ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80002ea8: 00007517 auipc x10,0x7 + 80002eac: 15852503 lw x10,344(x10) # 8000a000 + 80002eb0: 00300593 addi x11,x0,3 + 80002eb4: 52b50c63 beq x10,x11,800033ec + 80002eb8: 00000013 addi x0,x0,0 + 80002ebc: 00000013 addi x0,x0,0 + 80002ec0: 00008517 auipc x10,0x8 + 80002ec4: 96450513 addi x10,x10,-1692 # 8000a824 + 80002ec8: 00000013 addi x0,x0,0 + 80002ecc: 00000013 addi x0,x0,0 + 80002ed0: 00000013 addi x0,x0,0 + 80002ed4: 00000013 addi x0,x0,0 + 80002ed8: 00000013 addi x0,x0,0 + 80002edc: 00000013 addi x0,x0,0 + 80002ee0: 00027097 auipc x1,0x27 + 80002ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80002ee8: 00007517 auipc x10,0x7 + 80002eec: 21852503 lw x10,536(x10) # 8000a100 + 80002ef0: 02000593 addi x11,x0,32 + 80002ef4: 00357613 andi x12,x10,3 + 80002ef8: 00300693 addi x13,x0,3 + 80002efc: 00d60463 beq x12,x13,80002f04 + 80002f00: 01000593 addi x11,x0,16 + 80002f04: 3f4010ef jal x1,800042f8 + 80002f08: 00000013 addi x0,x0,0 + 80002f0c: 00000013 addi x0,x0,0 + 80002f10: 00000013 addi x0,x0,0 + 80002f14: 00000013 addi x0,x0,0 + 80002f18: 00000013 addi x0,x0,0 + 80002f1c: 00000013 addi x0,x0,0 + 80002f20: 00007517 auipc x10,0x7 + 80002f24: 24850513 addi x10,x10,584 # 8000a168 + 80002f28: 00000013 addi x0,x0,0 + 80002f2c: 00000013 addi x0,x0,0 + 80002f30: 00000013 addi x0,x0,0 + 80002f34: 00000013 addi x0,x0,0 + 80002f38: 00000013 addi x0,x0,0 + 80002f3c: 00000013 addi x0,x0,0 + 80002f40: 00027097 auipc x1,0x27 + 80002f44: 664080e7 jalr x1,1636(x1) # 8002a5a4 + 80002f48: 00000013 addi x0,x0,0 + 80002f4c: 00000013 addi x0,x0,0 + 80002f50: 00000013 addi x0,x0,0 + 80002f54: 00000013 addi x0,x0,0 + 80002f58: 00000013 addi x0,x0,0 + 80002f5c: 00000013 addi x0,x0,0 + 80002f60: 00008517 auipc x10,0x8 + 80002f64: 8d850513 addi x10,x10,-1832 # 8000a838 + 80002f68: 00000013 addi x0,x0,0 + 80002f6c: 00000013 addi x0,x0,0 + 80002f70: 00000013 addi x0,x0,0 + 80002f74: 00000013 addi x0,x0,0 + 80002f78: 00000013 addi x0,x0,0 + 80002f7c: 00000013 addi x0,x0,0 + 80002f80: 00027097 auipc x1,0x27 + 80002f84: 624080e7 jalr x1,1572(x1) # 8002a5a4 + 80002f88: 00007517 auipc x10,0x7 + 80002f8c: 18053503 ld x10,384(x10) # 8000a108 + 80002f90: 04000593 addi x11,x0,64 + 80002f94: 364010ef jal x1,800042f8 + 80002f98: 00000013 addi x0,x0,0 + 80002f9c: 00000013 addi x0,x0,0 + 80002fa0: 00007517 auipc x10,0x7 + 80002fa4: 1c850513 addi x10,x10,456 # 8000a168 + 80002fa8: 00000013 addi x0,x0,0 + 80002fac: 00000013 addi x0,x0,0 + 80002fb0: 00000013 addi x0,x0,0 + 80002fb4: 00000013 addi x0,x0,0 + 80002fb8: 00000013 addi x0,x0,0 + 80002fbc: 00000013 addi x0,x0,0 + 80002fc0: 00027097 auipc x1,0x27 + 80002fc4: 5e4080e7 jalr x1,1508(x1) # 8002a5a4 + 80002fc8: 00000013 addi x0,x0,0 + 80002fcc: 00000013 addi x0,x0,0 + 80002fd0: 00000013 addi x0,x0,0 + 80002fd4: 00000013 addi x0,x0,0 + 80002fd8: 00000013 addi x0,x0,0 + 80002fdc: 00000013 addi x0,x0,0 + 80002fe0: 00008517 auipc x10,0x8 + 80002fe4: 28f50513 addi x10,x10,655 # 8000b26f + 80002fe8: 00000013 addi x0,x0,0 + 80002fec: 00000013 addi x0,x0,0 + 80002ff0: 00000013 addi x0,x0,0 + 80002ff4: 00000013 addi x0,x0,0 + 80002ff8: 00000013 addi x0,x0,0 + 80002ffc: 00000013 addi x0,x0,0 + 80003000: 00027097 auipc x1,0x27 + 80003004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80003008: 00007517 auipc x10,0x7 + 8000300c: ff852503 lw x10,-8(x10) # 8000a000 + 80003010: 00050663 beq x10,x0,8000301c + 80003014: 00300593 addi x11,x0,3 + 80003018: 04b51063 bne x10,x11,80003058 + 8000301c: 07800593 addi x11,x0,120 + 80003020: 00007617 auipc x12,0x7 + 80003024: 14860613 addi x12,x12,328 # 8000a168 + 80003028: 00000013 addi x0,x0,0 + 8000302c: 00000013 addi x0,x0,0 + 80003030: 00000013 addi x0,x0,0 + 80003034: 00000013 addi x0,x0,0 + 80003038: 00000013 addi x0,x0,0 + 8000303c: 00000013 addi x0,x0,0 + 80003040: 00b60023 sb x11,0(x12) + 80003044: 00160613 addi x12,x12,1 + 80003048: 00007517 auipc x10,0x7 + 8000304c: 0bc52503 lw x10,188(x10) # 8000a104 + 80003050: 324010ef jal x1,80004374 + 80003054: 1180006f jal x0,8000316c + +0000000080003058 : + 80003058: 00100593 addi x11,x0,1 + 8000305c: 04b50863 beq x10,x11,800030ac + 80003060: 00400593 addi x11,x0,4 + 80003064: 08b50a63 beq x10,x11,800030f8 + 80003068: 00500593 addi x11,x0,5 + 8000306c: 0cb50463 beq x10,x11,80003134 + 80003070: 00000013 addi x0,x0,0 + 80003074: 00000013 addi x0,x0,0 + 80003078: 00000013 addi x0,x0,0 + 8000307c: 00000013 addi x0,x0,0 + 80003080: 00008517 auipc x10,0x8 + 80003084: 30550513 addi x10,x10,773 # 8000b385 + 80003088: 00000013 addi x0,x0,0 + 8000308c: 00000013 addi x0,x0,0 + 80003090: 00000013 addi x0,x0,0 + 80003094: 00000013 addi x0,x0,0 + 80003098: 00000013 addi x0,x0,0 + 8000309c: 00000013 addi x0,x0,0 + 800030a0: 00027097 auipc x1,0x27 + 800030a4: 504080e7 jalr x1,1284(x1) # 8002a5a4 + 800030a8: 1000006f jal x0,800031a8 + +00000000800030ac : + 800030ac: 06600593 addi x11,x0,102 + 800030b0: 00000013 addi x0,x0,0 + 800030b4: 00000013 addi x0,x0,0 + 800030b8: 00000013 addi x0,x0,0 + 800030bc: 00000013 addi x0,x0,0 + 800030c0: 00007617 auipc x12,0x7 + 800030c4: 0a860613 addi x12,x12,168 # 8000a168 + 800030c8: 00000013 addi x0,x0,0 + 800030cc: 00000013 addi x0,x0,0 + 800030d0: 00000013 addi x0,x0,0 + 800030d4: 00000013 addi x0,x0,0 + 800030d8: 00000013 addi x0,x0,0 + 800030dc: 00000013 addi x0,x0,0 + 800030e0: 00b60023 sb x11,0(x12) + 800030e4: 00160613 addi x12,x12,1 + 800030e8: 00007517 auipc x10,0x7 + 800030ec: 01c52503 lw x10,28(x10) # 8000a104 + 800030f0: 284010ef jal x1,80004374 + 800030f4: 0780006f jal x0,8000316c + +00000000800030f8 : + 800030f8: 07600593 addi x11,x0,118 + 800030fc: 00000013 addi x0,x0,0 + 80003100: 00007617 auipc x12,0x7 + 80003104: 06860613 addi x12,x12,104 # 8000a168 + 80003108: 00000013 addi x0,x0,0 + 8000310c: 00000013 addi x0,x0,0 + 80003110: 00000013 addi x0,x0,0 + 80003114: 00000013 addi x0,x0,0 + 80003118: 00000013 addi x0,x0,0 + 8000311c: 00000013 addi x0,x0,0 + 80003120: 00b60023 sb x11,0(x12) + 80003124: 00160613 addi x12,x12,1 + 80003128: 00007517 auipc x10,0x7 + 8000312c: fdc52503 lw x10,-36(x10) # 8000a104 + 80003130: 244010ef jal x1,80004374 + +0000000080003134 : + 80003134: 00000013 addi x0,x0,0 + 80003138: 00000013 addi x0,x0,0 + 8000313c: 00000013 addi x0,x0,0 + 80003140: 00008517 auipc x10,0x8 + 80003144: 12850513 addi x10,x10,296 # 8000b268 + 80003148: 00000013 addi x0,x0,0 + 8000314c: 00000013 addi x0,x0,0 + 80003150: 00000013 addi x0,x0,0 + 80003154: 00000013 addi x0,x0,0 + 80003158: 00000013 addi x0,x0,0 + 8000315c: 00000013 addi x0,x0,0 + 80003160: 00027097 auipc x1,0x27 + 80003164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80003168: 0400006f jal x0,800031a8 + +000000008000316c : + 8000316c: 00000013 addi x0,x0,0 + 80003170: 00000013 addi x0,x0,0 + 80003174: 00000013 addi x0,x0,0 + 80003178: 00000013 addi x0,x0,0 + 8000317c: 00000013 addi x0,x0,0 + 80003180: 00007517 auipc x10,0x7 + 80003184: fe850513 addi x10,x10,-24 # 8000a168 + 80003188: 00000013 addi x0,x0,0 + 8000318c: 00000013 addi x0,x0,0 + 80003190: 00000013 addi x0,x0,0 + 80003194: 00000013 addi x0,x0,0 + 80003198: 00000013 addi x0,x0,0 + 8000319c: 00000013 addi x0,x0,0 + 800031a0: 00027097 auipc x1,0x27 + 800031a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + +00000000800031a8 : + 800031a8: 00000013 addi x0,x0,0 + 800031ac: 00000013 addi x0,x0,0 + 800031b0: 00000013 addi x0,x0,0 + 800031b4: 00000013 addi x0,x0,0 + 800031b8: 00000013 addi x0,x0,0 + 800031bc: 00000013 addi x0,x0,0 + 800031c0: 00008517 auipc x10,0x8 + 800031c4: 0c050513 addi x10,x10,192 # 8000b280 + 800031c8: 00000013 addi x0,x0,0 + 800031cc: 00000013 addi x0,x0,0 + 800031d0: 00000013 addi x0,x0,0 + 800031d4: 00000013 addi x0,x0,0 + 800031d8: 00000013 addi x0,x0,0 + 800031dc: 00000013 addi x0,x0,0 + 800031e0: 00027097 auipc x1,0x27 + 800031e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800031e8: 00007517 auipc x10,0x7 + 800031ec: e1852503 lw x10,-488(x10) # 8000a000 + 800031f0: 00100593 addi x11,x0,1 + 800031f4: 00b51c63 bne x10,x11,8000320c + 800031f8: 00007517 auipc x10,0x7 + 800031fc: f1853503 ld x10,-232(x10) # 8000a110 + 80003200: 04000593 addi x11,x0,64 + 80003204: 0f4010ef jal x1,800042f8 + 80003208: 0140006f jal x0,8000321c + +000000008000320c : + 8000320c: 00007517 auipc x10,0x7 + 80003210: f0453503 ld x10,-252(x10) # 8000a110 + 80003214: 04000593 addi x11,x0,64 + 80003218: 0e0010ef jal x1,800042f8 + +000000008000321c : + 8000321c: 00000013 addi x0,x0,0 + 80003220: 00007517 auipc x10,0x7 + 80003224: f4850513 addi x10,x10,-184 # 8000a168 + 80003228: 00000013 addi x0,x0,0 + 8000322c: 00000013 addi x0,x0,0 + 80003230: 00000013 addi x0,x0,0 + 80003234: 00000013 addi x0,x0,0 + 80003238: 00000013 addi x0,x0,0 + 8000323c: 00000013 addi x0,x0,0 + 80003240: 00027097 auipc x1,0x27 + 80003244: 364080e7 jalr x1,868(x1) # 8002a5a4 + 80003248: 00007517 auipc x10,0x7 + 8000324c: ee052503 lw x10,-288(x10) # 8000a128 + 80003250: 08051e63 bne x10,x0,800032ec + 80003254: 00000013 addi x0,x0,0 + 80003258: 00000013 addi x0,x0,0 + 8000325c: 00000013 addi x0,x0,0 + 80003260: 00008517 auipc x10,0x8 + 80003264: 03750513 addi x10,x10,55 # 8000b297 + 80003268: 00000013 addi x0,x0,0 + 8000326c: 00000013 addi x0,x0,0 + 80003270: 00000013 addi x0,x0,0 + 80003274: 00000013 addi x0,x0,0 + 80003278: 00000013 addi x0,x0,0 + 8000327c: 00000013 addi x0,x0,0 + 80003280: 00027097 auipc x1,0x27 + 80003284: 324080e7 jalr x1,804(x1) # 8002a5a4 + 80003288: 00007517 auipc x10,0x7 + 8000328c: d7852503 lw x10,-648(x10) # 8000a000 + 80003290: 00100593 addi x11,x0,1 + 80003294: 00b51c63 bne x10,x11,800032ac + 80003298: 00007517 auipc x10,0x7 + 8000329c: e8053503 ld x10,-384(x10) # 8000a118 + 800032a0: 04000593 addi x11,x0,64 + 800032a4: 054010ef jal x1,800042f8 + 800032a8: 0140006f jal x0,800032bc + +00000000800032ac : + 800032ac: 00007517 auipc x10,0x7 + 800032b0: e6c53503 ld x10,-404(x10) # 8000a118 + 800032b4: 04000593 addi x11,x0,64 + 800032b8: 040010ef jal x1,800042f8 + +00000000800032bc : + 800032bc: 00000013 addi x0,x0,0 + 800032c0: 00007517 auipc x10,0x7 + 800032c4: ea850513 addi x10,x10,-344 # 8000a168 + 800032c8: 00000013 addi x0,x0,0 + 800032cc: 00000013 addi x0,x0,0 + 800032d0: 00000013 addi x0,x0,0 + 800032d4: 00000013 addi x0,x0,0 + 800032d8: 00000013 addi x0,x0,0 + 800032dc: 00000013 addi x0,x0,0 + 800032e0: 00027097 auipc x1,0x27 + 800032e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800032e8: 5bd0006f jal x0,800040a4 + +00000000800032ec : + 800032ec: 00100593 addi x11,x0,1 + 800032f0: 06b51e63 bne x10,x11,8000336c + +00000000800032f4 : + 800032f4: 00000013 addi x0,x0,0 + 800032f8: 00000013 addi x0,x0,0 + 800032fc: 00000013 addi x0,x0,0 + 80003300: 00008517 auipc x10,0x8 + 80003304: fae50513 addi x10,x10,-82 # 8000b2ae + 80003308: 00000013 addi x0,x0,0 + 8000330c: 00000013 addi x0,x0,0 + 80003310: 00000013 addi x0,x0,0 + 80003314: 00000013 addi x0,x0,0 + 80003318: 00000013 addi x0,x0,0 + 8000331c: 00000013 addi x0,x0,0 + 80003320: 00027097 auipc x1,0x27 + 80003324: 284080e7 jalr x1,644(x1) # 8002a5a4 + 80003328: 00007517 auipc x10,0x7 + 8000332c: df053503 ld x10,-528(x10) # 8000a118 + 80003330: 02000593 addi x11,x0,32 + 80003334: 7c5000ef jal x1,800042f8 + 80003338: 00000013 addi x0,x0,0 + 8000333c: 00000013 addi x0,x0,0 + 80003340: 00007517 auipc x10,0x7 + 80003344: e2850513 addi x10,x10,-472 # 8000a168 + 80003348: 00000013 addi x0,x0,0 + 8000334c: 00000013 addi x0,x0,0 + 80003350: 00000013 addi x0,x0,0 + 80003354: 00000013 addi x0,x0,0 + 80003358: 00000013 addi x0,x0,0 + 8000335c: 00000013 addi x0,x0,0 + 80003360: 00027097 auipc x1,0x27 + 80003364: 244080e7 jalr x1,580(x1) # 8002a5a4 + 80003368: 53d0006f jal x0,800040a4 + +000000008000336c : + 8000336c: 00000013 addi x0,x0,0 + 80003370: 00000013 addi x0,x0,0 + 80003374: 00000013 addi x0,x0,0 + 80003378: 00000013 addi x0,x0,0 + 8000337c: 00000013 addi x0,x0,0 + 80003380: 00008517 auipc x10,0x8 + 80003384: f8c50513 addi x10,x10,-116 # 8000b30c + 80003388: 00000013 addi x0,x0,0 + 8000338c: 00000013 addi x0,x0,0 + 80003390: 00000013 addi x0,x0,0 + 80003394: 00000013 addi x0,x0,0 + 80003398: 00000013 addi x0,x0,0 + 8000339c: 00000013 addi x0,x0,0 + 800033a0: 00027097 auipc x1,0x27 + 800033a4: 204080e7 jalr x1,516(x1) # 8002a5a4 + 800033a8: 00007517 auipc x10,0x7 + 800033ac: d7053503 ld x10,-656(x10) # 8000a118 + 800033b0: 04000593 addi x11,x0,64 + 800033b4: 745000ef jal x1,800042f8 + 800033b8: 00000013 addi x0,x0,0 + 800033bc: 00000013 addi x0,x0,0 + 800033c0: 00007517 auipc x10,0x7 + 800033c4: da850513 addi x10,x10,-600 # 8000a168 + 800033c8: 00000013 addi x0,x0,0 + 800033cc: 00000013 addi x0,x0,0 + 800033d0: 00000013 addi x0,x0,0 + 800033d4: 00000013 addi x0,x0,0 + 800033d8: 00000013 addi x0,x0,0 + 800033dc: 00000013 addi x0,x0,0 + 800033e0: 00027097 auipc x1,0x27 + 800033e4: 1c4080e7 jalr x1,452(x1) # 8002a5a4 + 800033e8: 4bd0006f jal x0,800040a4 + +00000000800033ec : + 800033ec: 00007417 auipc x8,0x7 + 800033f0: d4442403 lw x8,-700(x8) # 8000a130 + 800033f4: 00900493 addi x9,x0,9 + 800033f8: 0a940c63 beq x8,x9,800034b0 + 800033fc: 00000013 addi x0,x0,0 + 80003400: 00008517 auipc x10,0x8 + 80003404: fb150513 addi x10,x10,-79 # 8000b3b1 + 80003408: 00000013 addi x0,x0,0 + 8000340c: 00000013 addi x0,x0,0 + 80003410: 00000013 addi x0,x0,0 + 80003414: 00000013 addi x0,x0,0 + 80003418: 00000013 addi x0,x0,0 + 8000341c: 00000013 addi x0,x0,0 + 80003420: 00027097 auipc x1,0x27 + 80003424: 184080e7 jalr x1,388(x1) # 8002a5a4 + 80003428: 00000013 addi x0,x0,0 + 8000342c: 00000013 addi x0,x0,0 + 80003430: 00000013 addi x0,x0,0 + 80003434: 00000013 addi x0,x0,0 + 80003438: 00000013 addi x0,x0,0 + 8000343c: 00000013 addi x0,x0,0 + 80003440: 00008517 auipc x10,0x8 + 80003444: f9d50513 addi x10,x10,-99 # 8000b3dd + 80003448: 00000013 addi x0,x0,0 + 8000344c: 00000013 addi x0,x0,0 + 80003450: 00000013 addi x0,x0,0 + 80003454: 00000013 addi x0,x0,0 + 80003458: 00000013 addi x0,x0,0 + 8000345c: 00000013 addi x0,x0,0 + 80003460: 00027097 auipc x1,0x27 + 80003464: 144080e7 jalr x1,324(x1) # 8002a5a4 + 80003468: 00007817 auipc x16,0x7 + 8000346c: cd080813 addi x16,x16,-816 # 8000a138 + 80003470: 00083503 ld x10,0(x16) + 80003474: 00027097 auipc x1,0x27 + 80003478: 130080e7 jalr x1,304(x1) # 8002a5a4 + 8000347c: 00000013 addi x0,x0,0 + 80003480: 00007517 auipc x10,0x7 + 80003484: 3a250513 addi x10,x10,930 # 8000a822 + 80003488: 00000013 addi x0,x0,0 + 8000348c: 00000013 addi x0,x0,0 + 80003490: 00000013 addi x0,x0,0 + 80003494: 00000013 addi x0,x0,0 + 80003498: 00000013 addi x0,x0,0 + 8000349c: 00000013 addi x0,x0,0 + 800034a0: 00027097 auipc x1,0x27 + 800034a4: 104080e7 jalr x1,260(x1) # 8002a5a4 + 800034a8: 280404e3 beq x8,x0,80003f30 + 800034ac: 3400006f jal x0,800037ec + +00000000800034b0 : + 800034b0: 00000013 addi x0,x0,0 + 800034b4: 00000013 addi x0,x0,0 + 800034b8: 00000013 addi x0,x0,0 + 800034bc: 00000013 addi x0,x0,0 + 800034c0: 00008517 auipc x10,0x8 + 800034c4: f2d50513 addi x10,x10,-211 # 8000b3ed + 800034c8: 00000013 addi x0,x0,0 + 800034cc: 00000013 addi x0,x0,0 + 800034d0: 00000013 addi x0,x0,0 + 800034d4: 00000013 addi x0,x0,0 + 800034d8: 00000013 addi x0,x0,0 + 800034dc: 00000013 addi x0,x0,0 + 800034e0: 00027097 auipc x1,0x27 + 800034e4: 0c4080e7 jalr x1,196(x1) # 8002a5a4 + 800034e8: 00007517 auipc x10,0x7 + 800034ec: c3053503 ld x10,-976(x10) # 8000a118 + 800034f0: 04000593 addi x11,x0,64 + 800034f4: 605000ef jal x1,800042f8 + 800034f8: 00000013 addi x0,x0,0 + 800034fc: 00000013 addi x0,x0,0 + 80003500: 00007517 auipc x10,0x7 + 80003504: c6850513 addi x10,x10,-920 # 8000a168 + 80003508: 00000013 addi x0,x0,0 + 8000350c: 00000013 addi x0,x0,0 + 80003510: 00000013 addi x0,x0,0 + 80003514: 00000013 addi x0,x0,0 + 80003518: 00000013 addi x0,x0,0 + 8000351c: 00000013 addi x0,x0,0 + 80003520: 00027097 auipc x1,0x27 + 80003524: 084080e7 jalr x1,132(x1) # 8002a5a4 + 80003528: 00000013 addi x0,x0,0 + 8000352c: 00000013 addi x0,x0,0 + 80003530: 00000013 addi x0,x0,0 + 80003534: 00000013 addi x0,x0,0 + 80003538: 00000013 addi x0,x0,0 + 8000353c: 00000013 addi x0,x0,0 + 80003540: 00008517 auipc x10,0x8 + 80003544: ed850513 addi x10,x10,-296 # 8000b418 + 80003548: 00000013 addi x0,x0,0 + 8000354c: 00000013 addi x0,x0,0 + 80003550: 00000013 addi x0,x0,0 + 80003554: 00000013 addi x0,x0,0 + 80003558: 00000013 addi x0,x0,0 + 8000355c: 00000013 addi x0,x0,0 + 80003560: 00027097 auipc x1,0x27 + 80003564: 044080e7 jalr x1,68(x1) # 8002a5a4 + 80003568: 00007517 auipc x10,0x7 + 8000356c: ba853503 ld x10,-1112(x10) # 8000a110 + 80003570: 04000593 addi x11,x0,64 + 80003574: 585000ef jal x1,800042f8 + 80003578: 00000013 addi x0,x0,0 + 8000357c: 00000013 addi x0,x0,0 + 80003580: 00007517 auipc x10,0x7 + 80003584: be850513 addi x10,x10,-1048 # 8000a168 + 80003588: 00000013 addi x0,x0,0 + 8000358c: 00000013 addi x0,x0,0 + 80003590: 00000013 addi x0,x0,0 + 80003594: 00000013 addi x0,x0,0 + 80003598: 00000013 addi x0,x0,0 + 8000359c: 00000013 addi x0,x0,0 + 800035a0: 00027097 auipc x1,0x27 + 800035a4: 004080e7 jalr x1,4(x1) # 8002a5a4 + 800035a8: 00007317 auipc x6,0x7 + 800035ac: b6833303 ld x6,-1176(x6) # 8000a110 + 800035b0: 00007397 auipc x7,0x7 + 800035b4: b683b383 ld x7,-1176(x7) # 8000a118 + 800035b8: 10736a63 bltu x6,x7,800036cc + +00000000800035bc : + 800035bc: 00000013 addi x0,x0,0 + 800035c0: 00008517 auipc x10,0x8 + 800035c4: e8750513 addi x10,x10,-377 # 8000b447 + 800035c8: 00000013 addi x0,x0,0 + 800035cc: 00000013 addi x0,x0,0 + 800035d0: 00000013 addi x0,x0,0 + 800035d4: 00000013 addi x0,x0,0 + 800035d8: 00000013 addi x0,x0,0 + 800035dc: 00000013 addi x0,x0,0 + 800035e0: 00027097 auipc x1,0x27 + 800035e4: fc4080e7 jalr x1,-60(x1) # 8002a5a4 + 800035e8: 00000013 addi x0,x0,0 + 800035ec: 00000013 addi x0,x0,0 + 800035f0: 00000013 addi x0,x0,0 + 800035f4: 00000013 addi x0,x0,0 + 800035f8: 00000013 addi x0,x0,0 + 800035fc: 00000013 addi x0,x0,0 + 80003600: 00008517 auipc x10,0x8 + 80003604: eaf50513 addi x10,x10,-337 # 8000b4af + 80003608: 00000013 addi x0,x0,0 + 8000360c: 00000013 addi x0,x0,0 + 80003610: 00000013 addi x0,x0,0 + 80003614: 00000013 addi x0,x0,0 + 80003618: 00000013 addi x0,x0,0 + 8000361c: 00000013 addi x0,x0,0 + 80003620: 00027097 auipc x1,0x27 + 80003624: f84080e7 jalr x1,-124(x1) # 8002a5a4 + 80003628: 00007317 auipc x6,0x7 + 8000362c: ae833303 ld x6,-1304(x6) # 8000a110 + 80003630: 00007397 auipc x7,0x7 + 80003634: ae83b383 ld x7,-1304(x7) # 8000a118 + 80003638: 40730533 sub x10,x6,x7 + 8000363c: 04000593 addi x11,x0,64 + 80003640: 4b9000ef jal x1,800042f8 + 80003644: 00000013 addi x0,x0,0 + 80003648: 00000013 addi x0,x0,0 + 8000364c: 00000013 addi x0,x0,0 + 80003650: 00000013 addi x0,x0,0 + 80003654: 00000013 addi x0,x0,0 + 80003658: 00000013 addi x0,x0,0 + 8000365c: 00000013 addi x0,x0,0 + 80003660: 00007517 auipc x10,0x7 + 80003664: b0850513 addi x10,x10,-1272 # 8000a168 + 80003668: 00000013 addi x0,x0,0 + 8000366c: 00000013 addi x0,x0,0 + 80003670: 00000013 addi x0,x0,0 + 80003674: 00000013 addi x0,x0,0 + 80003678: 00000013 addi x0,x0,0 + 8000367c: 00000013 addi x0,x0,0 + 80003680: 00027097 auipc x1,0x27 + 80003684: f24080e7 jalr x1,-220(x1) # 8002a5a4 + 80003688: 00000013 addi x0,x0,0 + 8000368c: 00000013 addi x0,x0,0 + 80003690: 00000013 addi x0,x0,0 + 80003694: 00000013 addi x0,x0,0 + 80003698: 00000013 addi x0,x0,0 + 8000369c: 00000013 addi x0,x0,0 + 800036a0: 00008517 auipc x10,0x8 + 800036a4: e3650513 addi x10,x10,-458 # 8000b4d6 + 800036a8: 00000013 addi x0,x0,0 + 800036ac: 00000013 addi x0,x0,0 + 800036b0: 00000013 addi x0,x0,0 + 800036b4: 00000013 addi x0,x0,0 + 800036b8: 00000013 addi x0,x0,0 + 800036bc: 00000013 addi x0,x0,0 + 800036c0: 00027097 auipc x1,0x27 + 800036c4: ee4080e7 jalr x1,-284(x1) # 8002a5a4 + 800036c8: 1dd0006f jal x0,800040a4 + +00000000800036cc : + 800036cc: 00000013 addi x0,x0,0 + 800036d0: 00000013 addi x0,x0,0 + 800036d4: 00000013 addi x0,x0,0 + 800036d8: 00000013 addi x0,x0,0 + 800036dc: 00000013 addi x0,x0,0 + 800036e0: 00008517 auipc x10,0x8 + 800036e4: d9350513 addi x10,x10,-621 # 8000b473 + 800036e8: 00000013 addi x0,x0,0 + 800036ec: 00000013 addi x0,x0,0 + 800036f0: 00000013 addi x0,x0,0 + 800036f4: 00000013 addi x0,x0,0 + 800036f8: 00000013 addi x0,x0,0 + 800036fc: 00000013 addi x0,x0,0 + 80003700: 00027097 auipc x1,0x27 + 80003704: ea4080e7 jalr x1,-348(x1) # 8002a5a4 + 80003708: 00000013 addi x0,x0,0 + 8000370c: 00000013 addi x0,x0,0 + 80003710: 00000013 addi x0,x0,0 + 80003714: 00000013 addi x0,x0,0 + 80003718: 00000013 addi x0,x0,0 + 8000371c: 00000013 addi x0,x0,0 + 80003720: 00008517 auipc x10,0x8 + 80003724: d8f50513 addi x10,x10,-625 # 8000b4af + 80003728: 00000013 addi x0,x0,0 + 8000372c: 00000013 addi x0,x0,0 + 80003730: 00000013 addi x0,x0,0 + 80003734: 00000013 addi x0,x0,0 + 80003738: 00000013 addi x0,x0,0 + 8000373c: 00000013 addi x0,x0,0 + 80003740: 00027097 auipc x1,0x27 + 80003744: e64080e7 jalr x1,-412(x1) # 8002a5a4 + 80003748: 00007317 auipc x6,0x7 + 8000374c: 9d033303 ld x6,-1584(x6) # 8000a118 + 80003750: 00007397 auipc x7,0x7 + 80003754: 9c03b383 ld x7,-1600(x7) # 8000a110 + 80003758: 40730533 sub x10,x6,x7 + 8000375c: 04000593 addi x11,x0,64 + 80003760: 399000ef jal x1,800042f8 + 80003764: 00000013 addi x0,x0,0 + 80003768: 00000013 addi x0,x0,0 + 8000376c: 00000013 addi x0,x0,0 + 80003770: 00000013 addi x0,x0,0 + 80003774: 00000013 addi x0,x0,0 + 80003778: 00000013 addi x0,x0,0 + 8000377c: 00000013 addi x0,x0,0 + 80003780: 00007517 auipc x10,0x7 + 80003784: 9e850513 addi x10,x10,-1560 # 8000a168 + 80003788: 00000013 addi x0,x0,0 + 8000378c: 00000013 addi x0,x0,0 + 80003790: 00000013 addi x0,x0,0 + 80003794: 00000013 addi x0,x0,0 + 80003798: 00000013 addi x0,x0,0 + 8000379c: 00000013 addi x0,x0,0 + 800037a0: 00027097 auipc x1,0x27 + 800037a4: e04080e7 jalr x1,-508(x1) # 8002a5a4 + 800037a8: 00000013 addi x0,x0,0 + 800037ac: 00000013 addi x0,x0,0 + 800037b0: 00000013 addi x0,x0,0 + 800037b4: 00000013 addi x0,x0,0 + 800037b8: 00000013 addi x0,x0,0 + 800037bc: 00000013 addi x0,x0,0 + 800037c0: 00008517 auipc x10,0x8 + 800037c4: dfe50513 addi x10,x10,-514 # 8000b5be + 800037c8: 00000013 addi x0,x0,0 + 800037cc: 00000013 addi x0,x0,0 + 800037d0: 00000013 addi x0,x0,0 + 800037d4: 00000013 addi x0,x0,0 + 800037d8: 00000013 addi x0,x0,0 + 800037dc: 00000013 addi x0,x0,0 + 800037e0: 00027097 auipc x1,0x27 + 800037e4: dc4080e7 jalr x1,-572(x1) # 8002a5a4 + 800037e8: 0bd0006f jal x0,800040a4 + +00000000800037ec : + 800037ec: 00000013 addi x0,x0,0 + 800037f0: 00000013 addi x0,x0,0 + 800037f4: 00000013 addi x0,x0,0 + 800037f8: 00000013 addi x0,x0,0 + 800037fc: 00000013 addi x0,x0,0 + 80003800: 00008517 auipc x10,0x8 + 80003804: ea550513 addi x10,x10,-347 # 8000b6a5 + 80003808: 00000013 addi x0,x0,0 + 8000380c: 00000013 addi x0,x0,0 + 80003810: 00000013 addi x0,x0,0 + 80003814: 00000013 addi x0,x0,0 + 80003818: 00000013 addi x0,x0,0 + 8000381c: 00000013 addi x0,x0,0 + 80003820: 00027097 auipc x1,0x27 + 80003824: d84080e7 jalr x1,-636(x1) # 8002a5a4 + 80003828: 00007517 auipc x10,0x7 + 8000382c: 90c52503 lw x10,-1780(x10) # 8000a134 + 80003830: 04050a63 beq x10,x0,80003884 + 80003834: 00100593 addi x11,x0,1 + 80003838: 08b50663 beq x10,x11,800038c4 + 8000383c: 00200593 addi x11,x0,2 + 80003840: 0cb50263 beq x10,x11,80003904 + 80003844: 00300593 addi x11,x0,3 + 80003848: 0eb50e63 beq x10,x11,80003944 + 8000384c: 00000013 addi x0,x0,0 + 80003850: 00000013 addi x0,x0,0 + 80003854: 00000013 addi x0,x0,0 + 80003858: 00000013 addi x0,x0,0 + 8000385c: 00000013 addi x0,x0,0 + 80003860: 00008517 auipc x10,0x8 + 80003864: e8150513 addi x10,x10,-383 # 8000b6e1 + 80003868: 00000013 addi x0,x0,0 + 8000386c: 00000013 addi x0,x0,0 + 80003870: 00000013 addi x0,x0,0 + 80003874: 00000013 addi x0,x0,0 + 80003878: 00000013 addi x0,x0,0 + 8000387c: 00000013 addi x0,x0,0 + 80003880: 1000006f jal x0,80003980 + +0000000080003884 : + 80003884: 00000013 addi x0,x0,0 + 80003888: 00000013 addi x0,x0,0 + 8000388c: 00000013 addi x0,x0,0 + 80003890: 00000013 addi x0,x0,0 + 80003894: 00000013 addi x0,x0,0 + 80003898: 00000013 addi x0,x0,0 + 8000389c: 00000013 addi x0,x0,0 + 800038a0: 00008517 auipc x10,0x8 + 800038a4: e1f50513 addi x10,x10,-481 # 8000b6bf + 800038a8: 00000013 addi x0,x0,0 + 800038ac: 00000013 addi x0,x0,0 + 800038b0: 00000013 addi x0,x0,0 + 800038b4: 00000013 addi x0,x0,0 + 800038b8: 00000013 addi x0,x0,0 + 800038bc: 00000013 addi x0,x0,0 + 800038c0: 0c00006f jal x0,80003980 + +00000000800038c4 : + 800038c4: 00000013 addi x0,x0,0 + 800038c8: 00000013 addi x0,x0,0 + 800038cc: 00000013 addi x0,x0,0 + 800038d0: 00000013 addi x0,x0,0 + 800038d4: 00000013 addi x0,x0,0 + 800038d8: 00000013 addi x0,x0,0 + 800038dc: 00000013 addi x0,x0,0 + 800038e0: 00008517 auipc x10,0x8 + 800038e4: de750513 addi x10,x10,-537 # 8000b6c7 + 800038e8: 00000013 addi x0,x0,0 + 800038ec: 00000013 addi x0,x0,0 + 800038f0: 00000013 addi x0,x0,0 + 800038f4: 00000013 addi x0,x0,0 + 800038f8: 00000013 addi x0,x0,0 + 800038fc: 00000013 addi x0,x0,0 + 80003900: 0800006f jal x0,80003980 + +0000000080003904 : + 80003904: 00000013 addi x0,x0,0 + 80003908: 00000013 addi x0,x0,0 + 8000390c: 00000013 addi x0,x0,0 + 80003910: 00000013 addi x0,x0,0 + 80003914: 00000013 addi x0,x0,0 + 80003918: 00000013 addi x0,x0,0 + 8000391c: 00000013 addi x0,x0,0 + 80003920: 00008517 auipc x10,0x8 + 80003924: daf50513 addi x10,x10,-593 # 8000b6cf + 80003928: 00000013 addi x0,x0,0 + 8000392c: 00000013 addi x0,x0,0 + 80003930: 00000013 addi x0,x0,0 + 80003934: 00000013 addi x0,x0,0 + 80003938: 00000013 addi x0,x0,0 + 8000393c: 00000013 addi x0,x0,0 + 80003940: 0400006f jal x0,80003980 + +0000000080003944 : + 80003944: 00000013 addi x0,x0,0 + 80003948: 00000013 addi x0,x0,0 + 8000394c: 00000013 addi x0,x0,0 + 80003950: 00000013 addi x0,x0,0 + 80003954: 00000013 addi x0,x0,0 + 80003958: 00000013 addi x0,x0,0 + 8000395c: 00000013 addi x0,x0,0 + 80003960: 00008517 auipc x10,0x8 + 80003964: d7850513 addi x10,x10,-648 # 8000b6d8 + 80003968: 00000013 addi x0,x0,0 + 8000396c: 00000013 addi x0,x0,0 + 80003970: 00000013 addi x0,x0,0 + 80003974: 00000013 addi x0,x0,0 + 80003978: 00000013 addi x0,x0,0 + 8000397c: 00000013 addi x0,x0,0 + +0000000080003980 : + 80003980: 00027097 auipc x1,0x27 + 80003984: c24080e7 jalr x1,-988(x1) # 8002a5a4 + 80003988: 00000013 addi x0,x0,0 + 8000398c: 00000013 addi x0,x0,0 + 80003990: 00000013 addi x0,x0,0 + 80003994: 00000013 addi x0,x0,0 + 80003998: 00000013 addi x0,x0,0 + 8000399c: 00000013 addi x0,x0,0 + 800039a0: 00008517 auipc x10,0x8 + 800039a4: d4a50513 addi x10,x10,-694 # 8000b6ea + 800039a8: 00000013 addi x0,x0,0 + 800039ac: 00000013 addi x0,x0,0 + 800039b0: 00000013 addi x0,x0,0 + 800039b4: 00000013 addi x0,x0,0 + 800039b8: 00000013 addi x0,x0,0 + 800039bc: 00000013 addi x0,x0,0 + 800039c0: 00027097 auipc x1,0x27 + 800039c4: be4080e7 jalr x1,-1052(x1) # 8002a5a4 + 800039c8: 00006517 auipc x10,0x6 + 800039cc: 76852503 lw x10,1896(x10) # 8000a130 + 800039d0: 00100593 addi x11,x0,1 + 800039d4: 06b50863 beq x10,x11,80003a44 + 800039d8: 00200593 addi x11,x0,2 + 800039dc: 0ab50463 beq x10,x11,80003a84 + 800039e0: 00300593 addi x11,x0,3 + 800039e4: 0eb50063 beq x10,x11,80003ac4 + 800039e8: 00400593 addi x11,x0,4 + 800039ec: 10b50c63 beq x10,x11,80003b04 + 800039f0: 00500593 addi x11,x0,5 + 800039f4: 14b50863 beq x10,x11,80003b44 + 800039f8: 00600593 addi x11,x0,6 + 800039fc: 18b50463 beq x10,x11,80003b84 + 80003a00: 00700593 addi x11,x0,7 + 80003a04: 1cb50063 beq x10,x11,80003bc4 + 80003a08: 00800593 addi x11,x0,8 + 80003a0c: 1eb50c63 beq x10,x11,80003c04 + 80003a10: 00000013 addi x0,x0,0 + 80003a14: 00000013 addi x0,x0,0 + 80003a18: 00000013 addi x0,x0,0 + 80003a1c: 00000013 addi x0,x0,0 + 80003a20: 00008517 auipc x10,0x8 + 80003a24: e2150513 addi x10,x10,-479 # 8000b841 + 80003a28: 00000013 addi x0,x0,0 + 80003a2c: 00000013 addi x0,x0,0 + 80003a30: 00000013 addi x0,x0,0 + 80003a34: 00000013 addi x0,x0,0 + 80003a38: 00000013 addi x0,x0,0 + 80003a3c: 00000013 addi x0,x0,0 + 80003a40: 2000006f jal x0,80003c40 + +0000000080003a44 : + 80003a44: 00000013 addi x0,x0,0 + 80003a48: 00000013 addi x0,x0,0 + 80003a4c: 00000013 addi x0,x0,0 + 80003a50: 00000013 addi x0,x0,0 + 80003a54: 00000013 addi x0,x0,0 + 80003a58: 00000013 addi x0,x0,0 + 80003a5c: 00000013 addi x0,x0,0 + 80003a60: 00008517 auipc x10,0x8 + 80003a64: ca450513 addi x10,x10,-860 # 8000b704 + 80003a68: 00000013 addi x0,x0,0 + 80003a6c: 00000013 addi x0,x0,0 + 80003a70: 00000013 addi x0,x0,0 + 80003a74: 00000013 addi x0,x0,0 + 80003a78: 00000013 addi x0,x0,0 + 80003a7c: 00000013 addi x0,x0,0 + 80003a80: 1c00006f jal x0,80003c40 + +0000000080003a84 : + 80003a84: 00000013 addi x0,x0,0 + 80003a88: 00000013 addi x0,x0,0 + 80003a8c: 00000013 addi x0,x0,0 + 80003a90: 00000013 addi x0,x0,0 + 80003a94: 00000013 addi x0,x0,0 + 80003a98: 00000013 addi x0,x0,0 + 80003a9c: 00000013 addi x0,x0,0 + 80003aa0: 00008517 auipc x10,0x8 + 80003aa4: c9550513 addi x10,x10,-875 # 8000b735 + 80003aa8: 00000013 addi x0,x0,0 + 80003aac: 00000013 addi x0,x0,0 + 80003ab0: 00000013 addi x0,x0,0 + 80003ab4: 00000013 addi x0,x0,0 + 80003ab8: 00000013 addi x0,x0,0 + 80003abc: 00000013 addi x0,x0,0 + 80003ac0: 1800006f jal x0,80003c40 + +0000000080003ac4 : + 80003ac4: 00000013 addi x0,x0,0 + 80003ac8: 00000013 addi x0,x0,0 + 80003acc: 00000013 addi x0,x0,0 + 80003ad0: 00000013 addi x0,x0,0 + 80003ad4: 00000013 addi x0,x0,0 + 80003ad8: 00000013 addi x0,x0,0 + 80003adc: 00000013 addi x0,x0,0 + 80003ae0: 00008517 auipc x10,0x8 + 80003ae4: c7550513 addi x10,x10,-907 # 8000b755 + 80003ae8: 00000013 addi x0,x0,0 + 80003aec: 00000013 addi x0,x0,0 + 80003af0: 00000013 addi x0,x0,0 + 80003af4: 00000013 addi x0,x0,0 + 80003af8: 00000013 addi x0,x0,0 + 80003afc: 00000013 addi x0,x0,0 + 80003b00: 1400006f jal x0,80003c40 + +0000000080003b04 : + 80003b04: 00000013 addi x0,x0,0 + 80003b08: 00000013 addi x0,x0,0 + 80003b0c: 00000013 addi x0,x0,0 + 80003b10: 00000013 addi x0,x0,0 + 80003b14: 00000013 addi x0,x0,0 + 80003b18: 00000013 addi x0,x0,0 + 80003b1c: 00000013 addi x0,x0,0 + 80003b20: 00008517 auipc x10,0x8 + 80003b24: c5350513 addi x10,x10,-941 # 8000b773 + 80003b28: 00000013 addi x0,x0,0 + 80003b2c: 00000013 addi x0,x0,0 + 80003b30: 00000013 addi x0,x0,0 + 80003b34: 00000013 addi x0,x0,0 + 80003b38: 00000013 addi x0,x0,0 + 80003b3c: 00000013 addi x0,x0,0 + 80003b40: 1000006f jal x0,80003c40 + +0000000080003b44 : + 80003b44: 00000013 addi x0,x0,0 + 80003b48: 00000013 addi x0,x0,0 + 80003b4c: 00000013 addi x0,x0,0 + 80003b50: 00000013 addi x0,x0,0 + 80003b54: 00000013 addi x0,x0,0 + 80003b58: 00000013 addi x0,x0,0 + 80003b5c: 00000013 addi x0,x0,0 + 80003b60: 00008517 auipc x10,0x8 + 80003b64: c3250513 addi x10,x10,-974 # 8000b792 + 80003b68: 00000013 addi x0,x0,0 + 80003b6c: 00000013 addi x0,x0,0 + 80003b70: 00000013 addi x0,x0,0 + 80003b74: 00000013 addi x0,x0,0 + 80003b78: 00000013 addi x0,x0,0 + 80003b7c: 00000013 addi x0,x0,0 + 80003b80: 0c00006f jal x0,80003c40 + +0000000080003b84 : + 80003b84: 00000013 addi x0,x0,0 + 80003b88: 00000013 addi x0,x0,0 + 80003b8c: 00000013 addi x0,x0,0 + 80003b90: 00000013 addi x0,x0,0 + 80003b94: 00000013 addi x0,x0,0 + 80003b98: 00000013 addi x0,x0,0 + 80003b9c: 00000013 addi x0,x0,0 + 80003ba0: 00008517 auipc x10,0x8 + 80003ba4: c1a50513 addi x10,x10,-998 # 8000b7ba + 80003ba8: 00000013 addi x0,x0,0 + 80003bac: 00000013 addi x0,x0,0 + 80003bb0: 00000013 addi x0,x0,0 + 80003bb4: 00000013 addi x0,x0,0 + 80003bb8: 00000013 addi x0,x0,0 + 80003bbc: 00000013 addi x0,x0,0 + 80003bc0: 0800006f jal x0,80003c40 + +0000000080003bc4 : + 80003bc4: 00000013 addi x0,x0,0 + 80003bc8: 00000013 addi x0,x0,0 + 80003bcc: 00000013 addi x0,x0,0 + 80003bd0: 00000013 addi x0,x0,0 + 80003bd4: 00000013 addi x0,x0,0 + 80003bd8: 00000013 addi x0,x0,0 + 80003bdc: 00000013 addi x0,x0,0 + 80003be0: 00008517 auipc x10,0x8 + 80003be4: c0650513 addi x10,x10,-1018 # 8000b7e6 + 80003be8: 00000013 addi x0,x0,0 + 80003bec: 00000013 addi x0,x0,0 + 80003bf0: 00000013 addi x0,x0,0 + 80003bf4: 00000013 addi x0,x0,0 + 80003bf8: 00000013 addi x0,x0,0 + 80003bfc: 00000013 addi x0,x0,0 + 80003c00: 0400006f jal x0,80003c40 + +0000000080003c04 : + 80003c04: 00000013 addi x0,x0,0 + 80003c08: 00000013 addi x0,x0,0 + 80003c0c: 00000013 addi x0,x0,0 + 80003c10: 00000013 addi x0,x0,0 + 80003c14: 00000013 addi x0,x0,0 + 80003c18: 00000013 addi x0,x0,0 + 80003c1c: 00000013 addi x0,x0,0 + 80003c20: 00008517 auipc x10,0x8 + 80003c24: bf250513 addi x10,x10,-1038 # 8000b812 + 80003c28: 00000013 addi x0,x0,0 + 80003c2c: 00000013 addi x0,x0,0 + 80003c30: 00000013 addi x0,x0,0 + 80003c34: 00000013 addi x0,x0,0 + 80003c38: 00000013 addi x0,x0,0 + 80003c3c: 00000013 addi x0,x0,0 + +0000000080003c40 : + 80003c40: 00027097 auipc x1,0x27 + 80003c44: 964080e7 jalr x1,-1692(x1) # 8002a5a4 + 80003c48: 00000013 addi x0,x0,0 + 80003c4c: 00000013 addi x0,x0,0 + 80003c50: 00000013 addi x0,x0,0 + 80003c54: 00000013 addi x0,x0,0 + 80003c58: 00000013 addi x0,x0,0 + 80003c5c: 00000013 addi x0,x0,0 + 80003c60: 00008517 auipc x10,0x8 + 80003c64: bf050513 addi x10,x10,-1040 # 8000b850 + 80003c68: 00000013 addi x0,x0,0 + 80003c6c: 00000013 addi x0,x0,0 + 80003c70: 00000013 addi x0,x0,0 + 80003c74: 00000013 addi x0,x0,0 + 80003c78: 00000013 addi x0,x0,0 + 80003c7c: 00000013 addi x0,x0,0 + 80003c80: 00027097 auipc x1,0x27 + 80003c84: 924080e7 jalr x1,-1756(x1) # 8002a5a4 + 80003c88: 00006517 auipc x10,0x6 + 80003c8c: 49053503 ld x10,1168(x10) # 8000a118 + 80003c90: 04000593 addi x11,x0,64 + 80003c94: 664000ef jal x1,800042f8 + 80003c98: 00000013 addi x0,x0,0 + 80003c9c: 00000013 addi x0,x0,0 + 80003ca0: 00006517 auipc x10,0x6 + 80003ca4: 4c850513 addi x10,x10,1224 # 8000a168 + 80003ca8: 00000013 addi x0,x0,0 + 80003cac: 00000013 addi x0,x0,0 + 80003cb0: 00000013 addi x0,x0,0 + 80003cb4: 00000013 addi x0,x0,0 + 80003cb8: 00000013 addi x0,x0,0 + 80003cbc: 00000013 addi x0,x0,0 + 80003cc0: 00027097 auipc x1,0x27 + 80003cc4: 8e4080e7 jalr x1,-1820(x1) # 8002a5a4 + 80003cc8: 00000013 addi x0,x0,0 + 80003ccc: 00000013 addi x0,x0,0 + 80003cd0: 00000013 addi x0,x0,0 + 80003cd4: 00000013 addi x0,x0,0 + 80003cd8: 00000013 addi x0,x0,0 + 80003cdc: 00000013 addi x0,x0,0 + 80003ce0: 00008517 auipc x10,0x8 + 80003ce4: b8750513 addi x10,x10,-1145 # 8000b867 + 80003ce8: 00000013 addi x0,x0,0 + 80003cec: 00000013 addi x0,x0,0 + 80003cf0: 00000013 addi x0,x0,0 + 80003cf4: 00000013 addi x0,x0,0 + 80003cf8: 00000013 addi x0,x0,0 + 80003cfc: 00000013 addi x0,x0,0 + 80003d00: 00027097 auipc x1,0x27 + 80003d04: 8a4080e7 jalr x1,-1884(x1) # 8002a5a4 + 80003d08: 00006517 auipc x10,0x6 + 80003d0c: 40853503 ld x10,1032(x10) # 8000a110 + 80003d10: 04000593 addi x11,x0,64 + 80003d14: 5e4000ef jal x1,800042f8 + 80003d18: 00000013 addi x0,x0,0 + 80003d1c: 00000013 addi x0,x0,0 + 80003d20: 00006517 auipc x10,0x6 + 80003d24: 44850513 addi x10,x10,1096 # 8000a168 + 80003d28: 00000013 addi x0,x0,0 + 80003d2c: 00000013 addi x0,x0,0 + 80003d30: 00000013 addi x0,x0,0 + 80003d34: 00000013 addi x0,x0,0 + 80003d38: 00000013 addi x0,x0,0 + 80003d3c: 00000013 addi x0,x0,0 + 80003d40: 00027097 auipc x1,0x27 + 80003d44: 864080e7 jalr x1,-1948(x1) # 8002a5a4 + 80003d48: 00006517 auipc x10,0x6 + 80003d4c: 3e852503 lw x10,1000(x10) # 8000a130 + 80003d50: 00200593 addi x11,x0,2 + 80003d54: 08b51463 bne x10,x11,80003ddc + 80003d58: 00000013 addi x0,x0,0 + 80003d5c: 00000013 addi x0,x0,0 + 80003d60: 00008517 auipc x10,0x8 + 80003d64: b1e50513 addi x10,x10,-1250 # 8000b87e + 80003d68: 00000013 addi x0,x0,0 + 80003d6c: 00000013 addi x0,x0,0 + 80003d70: 00000013 addi x0,x0,0 + 80003d74: 00000013 addi x0,x0,0 + 80003d78: 00000013 addi x0,x0,0 + 80003d7c: 00000013 addi x0,x0,0 + 80003d80: 00027097 auipc x1,0x27 + 80003d84: 824080e7 jalr x1,-2012(x1) # 8002a5a4 + 80003d88: 00006517 auipc x10,0x6 + 80003d8c: 39053503 ld x10,912(x10) # 8000a118 + 80003d90: 284000ef jal x1,80004014 + 80003d94: 00027097 auipc x1,0x27 + 80003d98: 810080e7 jalr x1,-2032(x1) # 8002a5a4 + 80003d9c: 00000013 addi x0,x0,0 + 80003da0: 00008517 auipc x10,0x8 + 80003da4: af550513 addi x10,x10,-1291 # 8000b895 + 80003da8: 00000013 addi x0,x0,0 + 80003dac: 00000013 addi x0,x0,0 + 80003db0: 00000013 addi x0,x0,0 + 80003db4: 00000013 addi x0,x0,0 + 80003db8: 00000013 addi x0,x0,0 + 80003dbc: 00000013 addi x0,x0,0 + 80003dc0: 00026097 auipc x1,0x26 + 80003dc4: 7e4080e7 jalr x1,2020(x1) # 8002a5a4 + 80003dc8: 00006517 auipc x10,0x6 + 80003dcc: 34853503 ld x10,840(x10) # 8000a110 + 80003dd0: 244000ef jal x1,80004014 + 80003dd4: 00026097 auipc x1,0x26 + 80003dd8: 7d0080e7 jalr x1,2000(x1) # 8002a5a4 + +0000000080003ddc : + 80003ddc: 00000097 auipc x1,0x0 + 80003de0: 314080e7 jalr x1,788(x1) # 800040f0 + 80003de4: 00006517 auipc x10,0x6 + 80003de8: 34c52503 lw x10,844(x10) # 8000a130 + 80003dec: 00100593 addi x11,x0,1 + 80003df0: 02b51e63 bne x10,x11,80003e2c + 80003df4: 00000013 addi x0,x0,0 + 80003df8: 00000013 addi x0,x0,0 + 80003dfc: 00000013 addi x0,x0,0 + 80003e00: 00008517 auipc x10,0x8 + 80003e04: b0b50513 addi x10,x10,-1269 # 8000b90b + 80003e08: 00000013 addi x0,x0,0 + 80003e0c: 00000013 addi x0,x0,0 + 80003e10: 00000013 addi x0,x0,0 + 80003e14: 00000013 addi x0,x0,0 + 80003e18: 00000013 addi x0,x0,0 + 80003e1c: 00000013 addi x0,x0,0 + 80003e20: 00026097 auipc x1,0x26 + 80003e24: 784080e7 jalr x1,1924(x1) # 8002a5a4 + 80003e28: 27c0006f jal x0,800040a4 + 80003e2c: 00200593 addi x11,x0,2 + 80003e30: 02b51e63 bne x10,x11,80003e6c + 80003e34: 00000013 addi x0,x0,0 + 80003e38: 00000013 addi x0,x0,0 + 80003e3c: 00000013 addi x0,x0,0 + 80003e40: 00008517 auipc x10,0x8 + 80003e44: ba150513 addi x10,x10,-1119 # 8000b9e1 + 80003e48: 00000013 addi x0,x0,0 + 80003e4c: 00000013 addi x0,x0,0 + 80003e50: 00000013 addi x0,x0,0 + 80003e54: 00000013 addi x0,x0,0 + 80003e58: 00000013 addi x0,x0,0 + 80003e5c: 00000013 addi x0,x0,0 + 80003e60: 00026097 auipc x1,0x26 + 80003e64: 744080e7 jalr x1,1860(x1) # 8002a5a4 + 80003e68: 23c0006f jal x0,800040a4 + 80003e6c: 00300593 addi x11,x0,3 + 80003e70: 02b51e63 bne x10,x11,80003eac + 80003e74: 00000013 addi x0,x0,0 + 80003e78: 00000013 addi x0,x0,0 + 80003e7c: 00000013 addi x0,x0,0 + 80003e80: 00008517 auipc x10,0x8 + 80003e84: c5450513 addi x10,x10,-940 # 8000bad4 + 80003e88: 00000013 addi x0,x0,0 + 80003e8c: 00000013 addi x0,x0,0 + 80003e90: 00000013 addi x0,x0,0 + 80003e94: 00000013 addi x0,x0,0 + 80003e98: 00000013 addi x0,x0,0 + 80003e9c: 00000013 addi x0,x0,0 + 80003ea0: 00026097 auipc x1,0x26 + 80003ea4: 704080e7 jalr x1,1796(x1) # 8002a5a4 + 80003ea8: 1fc0006f jal x0,800040a4 + 80003eac: 00400593 addi x11,x0,4 + 80003eb0: 02b51e63 bne x10,x11,80003eec + 80003eb4: 00000013 addi x0,x0,0 + 80003eb8: 00000013 addi x0,x0,0 + 80003ebc: 00000013 addi x0,x0,0 + 80003ec0: 00008517 auipc x10,0x8 + 80003ec4: d0f50513 addi x10,x10,-753 # 8000bbcf + 80003ec8: 00000013 addi x0,x0,0 + 80003ecc: 00000013 addi x0,x0,0 + 80003ed0: 00000013 addi x0,x0,0 + 80003ed4: 00000013 addi x0,x0,0 + 80003ed8: 00000013 addi x0,x0,0 + 80003edc: 00000013 addi x0,x0,0 + 80003ee0: 00026097 auipc x1,0x26 + 80003ee4: 6c4080e7 jalr x1,1732(x1) # 8002a5a4 + 80003ee8: 1bc0006f jal x0,800040a4 + 80003eec: 00500593 addi x11,x0,5 + 80003ef0: 02b51e63 bne x10,x11,80003f2c + 80003ef4: 00000013 addi x0,x0,0 + 80003ef8: 00000013 addi x0,x0,0 + 80003efc: 00000013 addi x0,x0,0 + 80003f00: 00008517 auipc x10,0x8 + 80003f04: db650513 addi x10,x10,-586 # 8000bcb6 + 80003f08: 00000013 addi x0,x0,0 + 80003f0c: 00000013 addi x0,x0,0 + 80003f10: 00000013 addi x0,x0,0 + 80003f14: 00000013 addi x0,x0,0 + 80003f18: 00000013 addi x0,x0,0 + 80003f1c: 00000013 addi x0,x0,0 + 80003f20: 00026097 auipc x1,0x26 + 80003f24: 684080e7 jalr x1,1668(x1) # 8002a5a4 + 80003f28: 17c0006f jal x0,800040a4 + 80003f2c: 1780006f jal x0,800040a4 + +0000000080003f30 : + 80003f30: 00000013 addi x0,x0,0 + 80003f34: 00000013 addi x0,x0,0 + 80003f38: 00000013 addi x0,x0,0 + 80003f3c: 00000013 addi x0,x0,0 + 80003f40: 00008517 auipc x10,0x8 + 80003f44: 98350513 addi x10,x10,-1661 # 8000b8c3 + 80003f48: 00000013 addi x0,x0,0 + 80003f4c: 00000013 addi x0,x0,0 + 80003f50: 00000013 addi x0,x0,0 + 80003f54: 00000013 addi x0,x0,0 + 80003f58: 00000013 addi x0,x0,0 + 80003f5c: 00000013 addi x0,x0,0 + 80003f60: 00026097 auipc x1,0x26 + 80003f64: 644080e7 jalr x1,1604(x1) # 8002a5a4 + 80003f68: 00006617 auipc x12,0x6 + 80003f6c: 1e063603 ld x12,480(x12) # 8000a148 + 80003f70: 00000013 addi x0,x0,0 + 80003f74: 00000013 addi x0,x0,0 + 80003f78: 00000013 addi x0,x0,0 + 80003f7c: 00000013 addi x0,x0,0 + 80003f80: 00007517 auipc x10,0x7 + 80003f84: 92c50513 addi x10,x10,-1748 # 8000a8ac + 80003f88: 00000013 addi x0,x0,0 + 80003f8c: 00000013 addi x0,x0,0 + 80003f90: 00000013 addi x0,x0,0 + 80003f94: 00000013 addi x0,x0,0 + 80003f98: 00000013 addi x0,x0,0 + 80003f9c: 00000013 addi x0,x0,0 + 80003fa0: 00026097 auipc x1,0x26 + 80003fa4: 604080e7 jalr x1,1540(x1) # 8002a5a4 + 80003fa8: 00065503 lhu x10,0(x12) + 80003fac: 01000593 addi x11,x0,16 + 80003fb0: 00357413 andi x8,x10,3 + 80003fb4: 00300493 addi x9,x0,3 + 80003fb8: 00941a63 bne x8,x9,80003fcc + 80003fbc: 00265403 lhu x8,2(x12) + 80003fc0: 01041413 slli x8,x8,0x10 + 80003fc4: 00856533 or x10,x10,x8 + 80003fc8: 02000593 addi x11,x0,32 + 80003fcc: 32c000ef jal x1,800042f8 + 80003fd0: 00000013 addi x0,x0,0 + 80003fd4: 00000013 addi x0,x0,0 + 80003fd8: 00000013 addi x0,x0,0 + 80003fdc: 00000013 addi x0,x0,0 + 80003fe0: 00006517 auipc x10,0x6 + 80003fe4: 18850513 addi x10,x10,392 # 8000a168 + 80003fe8: 00000013 addi x0,x0,0 + 80003fec: 00000013 addi x0,x0,0 + 80003ff0: 00000013 addi x0,x0,0 + 80003ff4: 00000013 addi x0,x0,0 + 80003ff8: 00000013 addi x0,x0,0 + 80003ffc: 00000013 addi x0,x0,0 + 80004000: 00026097 auipc x1,0x26 + 80004004: 5a4080e7 jalr x1,1444(x1) # 8002a5a4 + 80004008: 00000097 auipc x1,0x0 + 8000400c: 0e8080e7 jalr x1,232(x1) # 800040f0 + 80004010: 0940006f jal x0,800040a4 + +0000000080004014 : + 80004014: 02054463 blt x10,x0,8000403c + +0000000080004018 : + 80004018: 01800593 addi x11,x0,24 + 8000401c: 04b55863 bge x10,x11,8000406c + 80004020: 00006597 auipc x11,0x6 + 80004024: 17058593 addi x11,x11,368 # 8000a190 + 80004028: 00251613 slli x12,x10,0x2 + 8000402c: 00351613 slli x12,x10,0x3 + 80004030: 00c585b3 add x11,x11,x12 + 80004034: 0005b503 ld x10,0(x11) + 80004038: 00008067 jalr x0,0(x1) + +000000008000403c : + 8000403c: 00100593 addi x11,x0,1 + 80004040: 03f59593 slli x11,x11,0x3f + 80004044: 00b54533 xor x10,x10,x11 + 80004048: 01000593 addi x11,x0,16 + 8000404c: 02b55063 bge x10,x11,8000406c + 80004050: 00006597 auipc x11,0x6 + 80004054: 20058593 addi x11,x11,512 # 8000a250 + 80004058: 00251613 slli x12,x10,0x2 + 8000405c: 00351613 slli x12,x10,0x3 + 80004060: 00c585b3 add x11,x11,x12 + 80004064: 0005b503 ld x10,0(x11) + 80004068: 00008067 jalr x0,0(x1) + +000000008000406c : + 8000406c: 00000013 addi x0,x0,0 + 80004070: 00000013 addi x0,x0,0 + 80004074: 00000013 addi x0,x0,0 + 80004078: 00000013 addi x0,x0,0 + 8000407c: 00000013 addi x0,x0,0 + 80004080: 00006517 auipc x10,0x6 + 80004084: 64e50513 addi x10,x10,1614 # 8000a6ce + 80004088: 00000013 addi x0,x0,0 + 8000408c: 00000013 addi x0,x0,0 + 80004090: 00000013 addi x0,x0,0 + 80004094: 00000013 addi x0,x0,0 + 80004098: 00000013 addi x0,x0,0 + 8000409c: 00000013 addi x0,x0,0 + 800040a0: 00008067 jalr x0,0(x1) + +00000000800040a4 : + 800040a4: 00000013 addi x0,x0,0 + 800040a8: 00000013 addi x0,x0,0 + 800040ac: 00000013 addi x0,x0,0 + 800040b0: 00000013 addi x0,x0,0 + 800040b4: 00000013 addi x0,x0,0 + 800040b8: 00000013 addi x0,x0,0 + 800040bc: 00000013 addi x0,x0,0 + 800040c0: 00007517 auipc x10,0x7 + 800040c4: 2a450513 addi x10,x10,676 # 8000b364 + 800040c8: 00000013 addi x0,x0,0 + 800040cc: 00000013 addi x0,x0,0 + 800040d0: 00000013 addi x0,x0,0 + 800040d4: 00000013 addi x0,x0,0 + 800040d8: 00000013 addi x0,x0,0 + 800040dc: 00000013 addi x0,x0,0 + 800040e0: 00026097 auipc x1,0x26 + 800040e4: 4c4080e7 jalr x1,1220(x1) # 8002a5a4 + +00000000800040e8 : + 800040e8: 00026097 auipc x1,0x26 + 800040ec: 51c080e7 jalr x1,1308(x1) # 8002a604 + +00000000800040f0 : + 800040f0: 00006617 auipc x12,0x6 + 800040f4: 05060613 addi x12,x12,80 # 8000a140 + 800040f8: 00163023 sd x1,0(x12) + 800040fc: 00000013 addi x0,x0,0 + 80004100: 00006517 auipc x10,0x6 + 80004104: 7cd50513 addi x10,x10,1997 # 8000a8cd + 80004108: 00000013 addi x0,x0,0 + 8000410c: 00000013 addi x0,x0,0 + 80004110: 00000013 addi x0,x0,0 + 80004114: 00000013 addi x0,x0,0 + 80004118: 00000013 addi x0,x0,0 + 8000411c: 00000013 addi x0,x0,0 + 80004120: 00026097 auipc x1,0x26 + 80004124: 484080e7 jalr x1,1156(x1) # 8002a5a4 + 80004128: 00006517 auipc x10,0x6 + 8000412c: 02053503 ld x10,32(x10) # 8000a148 + 80004130: 04000593 addi x11,x0,64 + 80004134: 1c4000ef jal x1,800042f8 + 80004138: 00000013 addi x0,x0,0 + 8000413c: 00000013 addi x0,x0,0 + 80004140: 00006517 auipc x10,0x6 + 80004144: 02850513 addi x10,x10,40 # 8000a168 + 80004148: 00000013 addi x0,x0,0 + 8000414c: 00000013 addi x0,x0,0 + 80004150: 00000013 addi x0,x0,0 + 80004154: 00000013 addi x0,x0,0 + 80004158: 00000013 addi x0,x0,0 + 8000415c: 00000013 addi x0,x0,0 + 80004160: 00026097 auipc x1,0x26 + 80004164: 444080e7 jalr x1,1092(x1) # 8002a5a4 + 80004168: 00000013 addi x0,x0,0 + 8000416c: 00000013 addi x0,x0,0 + 80004170: 00000013 addi x0,x0,0 + 80004174: 00000013 addi x0,x0,0 + 80004178: 00000013 addi x0,x0,0 + 8000417c: 00000013 addi x0,x0,0 + 80004180: 00006517 auipc x10,0x6 + 80004184: 75d50513 addi x10,x10,1885 # 8000a8dd + 80004188: 00000013 addi x0,x0,0 + 8000418c: 00000013 addi x0,x0,0 + 80004190: 00000013 addi x0,x0,0 + 80004194: 00000013 addi x0,x0,0 + 80004198: 00000013 addi x0,x0,0 + 8000419c: 00000013 addi x0,x0,0 + 800041a0: 00026097 auipc x1,0x26 + 800041a4: 404080e7 jalr x1,1028(x1) # 8002a5a4 + 800041a8: 00006517 auipc x10,0x6 + 800041ac: fa853503 ld x10,-88(x10) # 8000a150 + 800041b0: 04000593 addi x11,x0,64 + 800041b4: 144000ef jal x1,800042f8 + 800041b8: 00000013 addi x0,x0,0 + 800041bc: 00000013 addi x0,x0,0 + 800041c0: 00006517 auipc x10,0x6 + 800041c4: fa850513 addi x10,x10,-88 # 8000a168 + 800041c8: 00000013 addi x0,x0,0 + 800041cc: 00000013 addi x0,x0,0 + 800041d0: 00000013 addi x0,x0,0 + 800041d4: 00000013 addi x0,x0,0 + 800041d8: 00000013 addi x0,x0,0 + 800041dc: 00000013 addi x0,x0,0 + 800041e0: 00026097 auipc x1,0x26 + 800041e4: 3c4080e7 jalr x1,964(x1) # 8002a5a4 + 800041e8: 00000013 addi x0,x0,0 + 800041ec: 00000013 addi x0,x0,0 + 800041f0: 00000013 addi x0,x0,0 + 800041f4: 00000013 addi x0,x0,0 + 800041f8: 00000013 addi x0,x0,0 + 800041fc: 00000013 addi x0,x0,0 + 80004200: 00006517 auipc x10,0x6 + 80004204: 6ed50513 addi x10,x10,1773 # 8000a8ed + 80004208: 00000013 addi x0,x0,0 + 8000420c: 00000013 addi x0,x0,0 + 80004210: 00000013 addi x0,x0,0 + 80004214: 00000013 addi x0,x0,0 + 80004218: 00000013 addi x0,x0,0 + 8000421c: 00000013 addi x0,x0,0 + 80004220: 00026097 auipc x1,0x26 + 80004224: 384080e7 jalr x1,900(x1) # 8002a5a4 + 80004228: 00006517 auipc x10,0x6 + 8000422c: f3053503 ld x10,-208(x10) # 8000a158 + 80004230: 04000593 addi x11,x0,64 + 80004234: 0c4000ef jal x1,800042f8 + 80004238: 00000013 addi x0,x0,0 + 8000423c: 00000013 addi x0,x0,0 + 80004240: 00006517 auipc x10,0x6 + 80004244: f2850513 addi x10,x10,-216 # 8000a168 + 80004248: 00000013 addi x0,x0,0 + 8000424c: 00000013 addi x0,x0,0 + 80004250: 00000013 addi x0,x0,0 + 80004254: 00000013 addi x0,x0,0 + 80004258: 00000013 addi x0,x0,0 + 8000425c: 00000013 addi x0,x0,0 + 80004260: 00026097 auipc x1,0x26 + 80004264: 344080e7 jalr x1,836(x1) # 8002a5a4 + 80004268: 00000013 addi x0,x0,0 + 8000426c: 00000013 addi x0,x0,0 + 80004270: 00000013 addi x0,x0,0 + 80004274: 00000013 addi x0,x0,0 + 80004278: 00000013 addi x0,x0,0 + 8000427c: 00000013 addi x0,x0,0 + 80004280: 00006517 auipc x10,0x6 + 80004284: 67d50513 addi x10,x10,1661 # 8000a8fd + 80004288: 00000013 addi x0,x0,0 + 8000428c: 00000013 addi x0,x0,0 + 80004290: 00000013 addi x0,x0,0 + 80004294: 00000013 addi x0,x0,0 + 80004298: 00000013 addi x0,x0,0 + 8000429c: 00000013 addi x0,x0,0 + 800042a0: 00026097 auipc x1,0x26 + 800042a4: 304080e7 jalr x1,772(x1) # 8002a5a4 + 800042a8: 00006517 auipc x10,0x6 + 800042ac: eb853503 ld x10,-328(x10) # 8000a160 + 800042b0: 04000593 addi x11,x0,64 + 800042b4: 044000ef jal x1,800042f8 + 800042b8: 00000013 addi x0,x0,0 + 800042bc: 00000013 addi x0,x0,0 + 800042c0: 00006517 auipc x10,0x6 + 800042c4: ea850513 addi x10,x10,-344 # 8000a168 + 800042c8: 00000013 addi x0,x0,0 + 800042cc: 00000013 addi x0,x0,0 + 800042d0: 00000013 addi x0,x0,0 + 800042d4: 00000013 addi x0,x0,0 + 800042d8: 00000013 addi x0,x0,0 + 800042dc: 00000013 addi x0,x0,0 + 800042e0: 00026097 auipc x1,0x26 + 800042e4: 2c4080e7 jalr x1,708(x1) # 8002a5a4 + 800042e8: 00006617 auipc x12,0x6 + 800042ec: e5860613 addi x12,x12,-424 # 8000a140 + 800042f0: 00063083 ld x1,0(x12) + 800042f4: 00008067 jalr x0,0(x1) + +00000000800042f8 : + 800042f8: 00000013 addi x0,x0,0 + 800042fc: 00000013 addi x0,x0,0 + 80004300: 00006617 auipc x12,0x6 + 80004304: e6860613 addi x12,x12,-408 # 8000a168 + 80004308: 00000013 addi x0,x0,0 + 8000430c: 00000013 addi x0,x0,0 + 80004310: 00000013 addi x0,x0,0 + 80004314: 00000013 addi x0,x0,0 + 80004318: 00000013 addi x0,x0,0 + 8000431c: 00000013 addi x0,x0,0 + 80004320: 03000693 addi x13,x0,48 + 80004324: 00d60023 sb x13,0(x12) + 80004328: 07800693 addi x13,x0,120 + 8000432c: 00d600a3 sb x13,1(x12) + 80004330: 00260613 addi x12,x12,2 + 80004334: 00058693 addi x13,x11,0 + +0000000080004338 : + 80004338: ffc68693 addi x13,x13,-4 + 8000433c: 00d55733 srl x14,x10,x13 + 80004340: 00f77713 andi x14,x14,15 + 80004344: 00a00793 addi x15,x0,10 + 80004348: 00f74663 blt x14,x15,80004354 + 8000434c: 05770713 addi x14,x14,87 + 80004350: 0080006f jal x0,80004358 + +0000000080004354 : + 80004354: 03070713 addi x14,x14,48 + +0000000080004358 : + 80004358: 00e60023 sb x14,0(x12) + 8000435c: 00160613 addi x12,x12,1 + 80004360: fc069ce3 bne x13,x0,80004338 + 80004364: 00a00693 addi x13,x0,10 + 80004368: 00d60023 sb x13,0(x12) + 8000436c: 000600a3 sb x0,1(x12) + 80004370: 00008067 jalr x0,0(x1) + +0000000080004374 : + 80004374: 00a00693 addi x13,x0,10 + 80004378: 02d54663 blt x10,x13,800043a4 + 8000437c: ff650513 addi x10,x10,-10 + 80004380: 03100713 addi x14,x0,49 + 80004384: 00d54c63 blt x10,x13,8000439c + 80004388: ff650513 addi x10,x10,-10 + 8000438c: 03200713 addi x14,x0,50 + 80004390: 00d54663 blt x10,x13,8000439c + 80004394: ff650513 addi x10,x10,-10 + 80004398: 03300713 addi x14,x0,51 + 8000439c: 00e60023 sb x14,0(x12) + 800043a0: 00160613 addi x12,x12,1 + 800043a4: 03050513 addi x10,x10,48 + 800043a8: 00a60023 sb x10,0(x12) + 800043ac: 00a00693 addi x13,x0,10 + 800043b0: 00d600a3 sb x13,1(x12) + 800043b4: 00060123 sb x0,2(x12) + 800043b8: 00008067 jalr x0,0(x1) + 800043bc: 00000013 addi x0,x0,0 + +Disassembly of section .text.rvmodel: + +000000008002a000 : + 8002a000: 10010737 lui x14,0x10010 + 8002a004: 00072023 sw x0,0(x14) # 10010000 + 8002a008: fffd8397 auipc x7,0xfffd8 + 8002a00c: 2b038393 addi x7,x7,688 # 800022b8 + 8002a010: 00038067 jalr x0,0(x7) + +000000008002a014 : + 8002a014: fff00713 addi x14,x0,-1 + 8002a018: 100143b7 lui x7,0x10014 + 8002a01c: 00e3b023 sd x14,0(x7) # 10014000 + 8002a020: fffd8397 auipc x7,0xfffd8 + 8002a024: 29838393 addi x7,x7,664 # 800022b8 + 8002a028: 00038067 jalr x0,0(x7) + +000000008002a02c : + 8002a02c: 10000737 lui x14,0x10000 + 8002a030: 0107071b addiw x14,x14,16 # 10000010 + 8002a034: 00070023 sb x0,0(x14) + 8002a038: fffd8397 auipc x7,0xfffd8 + 8002a03c: 28038393 addi x7,x7,640 # 800022b8 + 8002a040: 00038067 jalr x0,0(x7) + +000000008002a044 : + 8002a044: 00200393 addi x7,x0,2 + 8002a048: 3443b073 csrrc x0,mip,x7 + 8002a04c: fffd8397 auipc x7,0xfffd8 + 8002a050: 26c38393 addi x7,x7,620 # 800022b8 + 8002a054: 00038067 jalr x0,0(x7) + +000000008002a058 : + 8002a058: fffd8397 auipc x7,0xfffd8 + 8002a05c: 26038393 addi x7,x7,608 # 800022b8 + 8002a060: 00038067 jalr x0,0(x7) + +000000008002a064 : + 8002a064: 20000413 addi x8,x0,512 + 8002a068: 34443073 csrrc x0,mip,x8 + 8002a06c: 34402473 csrrs x8,mip,x0 + 8002a070: 00001337 lui x6,0x1 + 8002a074: 8003031b addiw x6,x6,-2048 # 800 + 8002a078: 00647433 and x8,x8,x6 + 8002a07c: 00830863 beq x6,x8,8002a08c + 8002a080: 10000737 lui x14,0x10000 + 8002a084: 0187071b addiw x14,x14,24 # 10000018 + 8002a088: 00070023 sb x0,0(x14) + 8002a08c: fffd8397 auipc x7,0xfffd8 + 8002a090: 22c38393 addi x7,x7,556 # 800022b8 + 8002a094: 00038067 jalr x0,0(x7) + +000000008002a098 : + 8002a098: fffd7317 auipc x6,0xfffd7 + 8002a09c: 35030313 addi x6,x6,848 # 800013e8 + 8002a0a0: 00030067 jalr x0,0(x6) + 8002a0a4: fffd8397 auipc x7,0xfffd8 + 8002a0a8: 21438393 addi x7,x7,532 # 800022b8 + 8002a0ac: 00038067 jalr x0,0(x7) + +000000008002a0b0 : + 8002a0b0: fffd7317 auipc x6,0xfffd7 + 8002a0b4: 33830313 addi x6,x6,824 # 800013e8 + 8002a0b8: 00030067 jalr x0,0(x6) + 8002a0bc: fffd8397 auipc x7,0xfffd8 + 8002a0c0: 1fc38393 addi x7,x7,508 # 800022b8 + 8002a0c4: 00038067 jalr x0,0(x7) + +000000008002a0c8 : + 8002a0c8: fffd7317 auipc x6,0xfffd7 + 8002a0cc: 32030313 addi x6,x6,800 # 800013e8 + 8002a0d0: 00030067 jalr x0,0(x6) + 8002a0d4: fffd8397 auipc x7,0xfffd8 + 8002a0d8: 1e438393 addi x7,x7,484 # 800022b8 + 8002a0dc: 00038067 jalr x0,0(x7) + +000000008002a0e0 : + 8002a0e0: 30401073 csrrw x0,mie,x0 + 8002a0e4: 34401073 csrrw x0,mip,x0 + 8002a0e8: 34101073 csrrw x0,mepc,x0 + 8002a0ec: 34301073 csrrw x0,mtval,x0 + 8002a0f0: 34201073 csrrw x0,mcause,x0 + 8002a0f4: 00000013 addi x0,x0,0 + 8002a0f8: 00000013 addi x0,x0,0 + 8002a0fc: 00000013 addi x0,x0,0 + 8002a100: fffde317 auipc x6,0xfffde + 8002a104: 01030313 addi x6,x6,16 # 80008110 + 8002a108: 00000013 addi x0,x0,0 + 8002a10c: 00000013 addi x0,x0,0 + 8002a110: 00000013 addi x0,x0,0 + 8002a114: 00000013 addi x0,x0,0 + 8002a118: 00000013 addi x0,x0,0 + 8002a11c: 00000013 addi x0,x0,0 + +000000008002a120 : + 8002a120: 34031473 csrrw x8,mscratch,x6 + 8002a124: 2c833823 sd x8,720(x6) + +000000008002a128 : + 8002a128: fff00393 addi x7,x0,-1 + 8002a12c: 000044b7 lui x9,0x4 + 8002a130: 00548493 addi x9,x9,5 # 4005 + 8002a134: 00e49493 slli x9,x9,0xe + 8002a138: 0074b023 sd x7,0(x9) + 8002a13c: 00000013 addi x0,x0,0 + +000000008002a140 : + 8002a140: 00000393 addi x7,x0,0 + 8002a144: 2a733c23 sd x7,696(x6) + +000000008002a148 : + 8002a148: 30502473 csrrs x8,mtvec,x0 + 8002a14c: 2c833423 sd x8,712(x6) + 8002a150: 00347393 andi x7,x8,3 + 8002a154: ffc3f393 andi x7,x7,-4 + 8002a158: 2b033483 ld x9,688(x6) + 8002a15c: da848493 addi x9,x9,-600 + 8002a160: 0074e3b3 or x7,x9,x7 + 8002a164: 2c733023 sd x7,704(x6) + 8002a168: 30539073 csrrw x0,mtvec,x7 + 8002a16c: 30502773 csrrs x14,mtvec,x0 + 8002a170: 0e770a63 beq x14,x7,8002a264 + 8002a174: 30541073 csrrw x0,mtvec,x8 + 8002a178: 0a040663 beq x8,x0,8002a224 + 8002a17c: 2c833023 sd x8,704(x6) + +000000008002a180 : + 8002a180: ffc47393 andi x7,x8,-4 + 8002a184: 25838413 addi x8,x7,600 + 8002a188: 00030113 addi x2,x6,0 + 8002a18c: 00000013 addi x0,x0,0 + 8002a190: 00000013 addi x0,x0,0 + 8002a194: 00000013 addi x0,x0,0 + 8002a198: 00000013 addi x0,x0,0 + 8002a19c: 00000013 addi x0,x0,0 + 8002a1a0: 00000717 auipc x14,0x0 + 8002a1a4: 04c70713 addi x14,x14,76 # 8002a1ec + 8002a1a8: 00000013 addi x0,x0,0 + 8002a1ac: 00000013 addi x0,x0,0 + 8002a1b0: 00000013 addi x0,x0,0 + 8002a1b4: 00000013 addi x0,x0,0 + 8002a1b8: 00000013 addi x0,x0,0 + 8002a1bc: 00000013 addi x0,x0,0 + 8002a1c0: 00000797 auipc x15,0x0 + 8002a1c4: 0a478793 addi x15,x15,164 # 8002a264 + 8002a1c8: 00000013 addi x0,x0,0 + 8002a1cc: 00000013 addi x0,x0,0 + 8002a1d0: 00000013 addi x0,x0,0 + 8002a1d4: 00000013 addi x0,x0,0 + 8002a1d8: 00000013 addi x0,x0,0 + 8002a1dc: 00000013 addi x0,x0,0 + 8002a1e0: 00f3f663 bgeu x7,x15,8002a1ec + 8002a1e4: 00877463 bgeu x14,x8,8002a1ec + 8002a1e8: 03c0006f jal x0,8002a224 + +000000008002a1ec : + 8002a1ec: 0003a783 lw x15,0(x7) + 8002a1f0: 00f32023 sw x15,0(x6) + 8002a1f4: 0004a703 lw x14,0(x9) + 8002a1f8: 00e3a023 sw x14,0(x7) + 8002a1fc: 0003a783 lw x15,0(x7) + 8002a200: 00e79a63 bne x15,x14,8002a214 + 8002a204: 00438393 addi x7,x7,4 + 8002a208: 00430313 addi x6,x6,4 + 8002a20c: 00448493 addi x9,x9,4 + 8002a210: fc741ee3 bne x8,x7,8002a1ec + +000000008002a214 : + 8002a214: 0000100f fence.i + 8002a218: 34002373 csrrs x6,mscratch,x0 + 8002a21c: 2a933823 sd x9,688(x6) + 8002a220: 04740263 beq x8,x7,8002a264 + +000000008002a224 : + 8002a224: 00038413 addi x8,x7,0 + 8002a228: 00000013 addi x0,x0,0 + 8002a22c: 00000013 addi x0,x0,0 + 8002a230: 00000013 addi x0,x0,0 + 8002a234: 00000013 addi x0,x0,0 + 8002a238: 00000013 addi x0,x0,0 + 8002a23c: 00000013 addi x0,x0,0 + 8002a240: fffd7797 auipc x15,0xfffd7 + 8002a244: 1b878793 addi x15,x15,440 # 800013f8 + 8002a248: 00000013 addi x0,x0,0 + 8002a24c: 00000013 addi x0,x0,0 + 8002a250: 00000013 addi x0,x0,0 + 8002a254: 00000013 addi x0,x0,0 + 8002a258: 00000013 addi x0,x0,0 + 8002a25c: 00000013 addi x0,x0,0 + 8002a260: 00078067 jalr x0,0(x15) + +000000008002a264 : + 8002a264: 00000013 addi x0,x0,0 + +000000008002a268 : + 8002a268: 005002b7 lui x5,0x500 + 8002a26c: 0012829b addiw x5,x5,1 # 500001 + 8002a270: 00d29293 slli x5,x5,0xd + 8002a274: 80028293 addi x5,x5,-2048 + 8002a278: 30029073 csrrw x0,mstatus,x5 + 8002a27c: 32001073 csrrw x0,mcountinhibit,x0 + 8002a280: 32301073 csrrw x0,mhpmevent3,x0 + 8002a284: 32401073 csrrw x0,mhpmevent4,x0 + 8002a288: 32501073 csrrw x0,mhpmevent5,x0 + 8002a28c: 32601073 csrrw x0,mhpmevent6,x0 + 8002a290: 32701073 csrrw x0,mhpmevent7,x0 + 8002a294: 32801073 csrrw x0,mhpmevent8,x0 + 8002a298: 32901073 csrrw x0,mhpmevent9,x0 + 8002a29c: 32a01073 csrrw x0,mhpmevent10,x0 + 8002a2a0: 32b01073 csrrw x0,mhpmevent11,x0 + 8002a2a4: 32c01073 csrrw x0,mhpmevent12,x0 + 8002a2a8: 32d01073 csrrw x0,mhpmevent13,x0 + 8002a2ac: 32e01073 csrrw x0,mhpmevent14,x0 + 8002a2b0: 32f01073 csrrw x0,mhpmevent15,x0 + 8002a2b4: 33001073 csrrw x0,mhpmevent16,x0 + 8002a2b8: 33101073 csrrw x0,mhpmevent17,x0 + 8002a2bc: 33201073 csrrw x0,mhpmevent18,x0 + 8002a2c0: 33301073 csrrw x0,mhpmevent19,x0 + 8002a2c4: 33401073 csrrw x0,mhpmevent20,x0 + 8002a2c8: 33501073 csrrw x0,mhpmevent21,x0 + 8002a2cc: 33601073 csrrw x0,mhpmevent22,x0 + 8002a2d0: 33701073 csrrw x0,mhpmevent23,x0 + 8002a2d4: 33801073 csrrw x0,mhpmevent24,x0 + 8002a2d8: 33901073 csrrw x0,mhpmevent25,x0 + 8002a2dc: 33a01073 csrrw x0,mhpmevent26,x0 + 8002a2e0: 33b01073 csrrw x0,mhpmevent27,x0 + 8002a2e4: 33c01073 csrrw x0,mhpmevent28,x0 + 8002a2e8: 33d01073 csrrw x0,mhpmevent29,x0 + 8002a2ec: 33e01073 csrrw x0,mhpmevent30,x0 + 8002a2f0: 33f01073 csrrw x0,mhpmevent31,x0 + 8002a2f4: 00000013 addi x0,x0,0 + 8002a2f8: 00000013 addi x0,x0,0 + 8002a2fc: 00000013 addi x0,x0,0 + 8002a300: fffde317 auipc x6,0xfffde + 8002a304: e0830313 addi x6,x6,-504 # 80008108 + 8002a308: 00000013 addi x0,x0,0 + 8002a30c: 00000013 addi x0,x0,0 + 8002a310: 00000013 addi x0,x0,0 + 8002a314: 00000013 addi x0,x0,0 + 8002a318: 00000013 addi x0,x0,0 + 8002a31c: 00000013 addi x0,x0,0 + 8002a320: 00033023 sd x0,0(x6) + +000000008002a324 : + 8002a324: feedc0b7 lui x1,0xfeedc + 8002a328: ead08093 addi x1,x1,-339 # fffffffffeedbead + 8002a32c: 00b09093 slli x1,x1,0xb + 8002a330: 7f708093 addi x1,x1,2039 + 8002a334: 00b09093 slli x1,x1,0xb + 8002a338: 36f08093 addi x1,x1,879 + 8002a33c: 00a09093 slli x1,x1,0xa + 8002a340: 2ad08093 addi x1,x1,685 + 8002a344: 03909793 slli x15,x1,0x39 + 8002a348: 0070d113 srli x2,x1,0x7 + 8002a34c: 00f16133 or x2,x2,x15 + 8002a350: 03911793 slli x15,x2,0x39 + 8002a354: 00715193 srli x3,x2,0x7 + 8002a358: 00f1e1b3 or x3,x3,x15 + 8002a35c: 03919793 slli x15,x3,0x39 + 8002a360: 0071d213 srli x4,x3,0x7 + 8002a364: 00f26233 or x4,x4,x15 + 8002a368: 03921793 slli x15,x4,0x39 + 8002a36c: 00725293 srli x5,x4,0x7 + 8002a370: 00f2e2b3 or x5,x5,x15 + 8002a374: 03929793 slli x15,x5,0x39 + 8002a378: 0072d313 srli x6,x5,0x7 + 8002a37c: 00f36333 or x6,x6,x15 + 8002a380: 03931793 slli x15,x6,0x39 + 8002a384: 00735393 srli x7,x6,0x7 + 8002a388: 00f3e3b3 or x7,x7,x15 + 8002a38c: 03939793 slli x15,x7,0x39 + 8002a390: 0073d413 srli x8,x7,0x7 + 8002a394: 00f46433 or x8,x8,x15 + 8002a398: 03941793 slli x15,x8,0x39 + 8002a39c: 00745493 srli x9,x8,0x7 + 8002a3a0: 00f4e4b3 or x9,x9,x15 + 8002a3a4: 03949793 slli x15,x9,0x39 + 8002a3a8: 0074d513 srli x10,x9,0x7 + 8002a3ac: 00f56533 or x10,x10,x15 + 8002a3b0: 03951793 slli x15,x10,0x39 + 8002a3b4: 00755593 srli x11,x10,0x7 + 8002a3b8: 00f5e5b3 or x11,x11,x15 + 8002a3bc: 03959793 slli x15,x11,0x39 + 8002a3c0: 0075d613 srli x12,x11,0x7 + 8002a3c4: 00f66633 or x12,x12,x15 + 8002a3c8: 03961793 slli x15,x12,0x39 + 8002a3cc: 00765693 srli x13,x12,0x7 + 8002a3d0: 00f6e6b3 or x13,x13,x15 + 8002a3d4: 03969793 slli x15,x13,0x39 + 8002a3d8: 0076d713 srli x14,x13,0x7 + 8002a3dc: 00f76733 or x14,x14,x15 + 8002a3e0: fab807b7 lui x15,0xfab80 + 8002a3e4: bb678793 addi x15,x15,-1098 # fffffffffab7fbb6 + 8002a3e8: 00b79793 slli x15,x15,0xb + 8002a3ec: 7d578793 addi x15,x15,2005 + 8002a3f0: 00b79793 slli x15,x15,0xb + 8002a3f4: 5fe78793 addi x15,x15,1534 + 8002a3f8: 00a79793 slli x15,x15,0xa + 8002a3fc: 3b678793 addi x15,x15,950 + 8002a400: 7d5c0837 lui x16,0x7d5c0 + 8002a404: ddb80813 addi x16,x16,-549 # 7d5bfddb + 8002a408: 00b81813 slli x16,x16,0xb + 8002a40c: 3ea80813 addi x16,x16,1002 + 8002a410: 00b81813 slli x16,x16,0xb + 8002a414: 6ff80813 addi x16,x16,1791 + 8002a418: 00a81813 slli x16,x16,0xa + 8002a41c: 1db80813 addi x16,x16,475 + 8002a420: 03981793 slli x15,x16,0x39 + 8002a424: 00785893 srli x17,x16,0x7 + 8002a428: 00f8e8b3 or x17,x17,x15 + 8002a42c: 03989793 slli x15,x17,0x39 + 8002a430: 0078d913 srli x18,x17,0x7 + 8002a434: 00f96933 or x18,x18,x15 + 8002a438: 03991793 slli x15,x18,0x39 + 8002a43c: 00795993 srli x19,x18,0x7 + 8002a440: 00f9e9b3 or x19,x19,x15 + 8002a444: 03999793 slli x15,x19,0x39 + 8002a448: 0079da13 srli x20,x19,0x7 + 8002a44c: 00fa6a33 or x20,x20,x15 + 8002a450: 039a1793 slli x15,x20,0x39 + 8002a454: 007a5a93 srli x21,x20,0x7 + 8002a458: 00faeab3 or x21,x21,x15 + 8002a45c: 039a9793 slli x15,x21,0x39 + 8002a460: 007adb13 srli x22,x21,0x7 + 8002a464: 00fb6b33 or x22,x22,x15 + 8002a468: 039b1793 slli x15,x22,0x39 + 8002a46c: 007b5b93 srli x23,x22,0x7 + 8002a470: 00fbebb3 or x23,x23,x15 + 8002a474: 039b9793 slli x15,x23,0x39 + 8002a478: 007bdc13 srli x24,x23,0x7 + 8002a47c: 00fc6c33 or x24,x24,x15 + 8002a480: 039c1793 slli x15,x24,0x39 + 8002a484: 007c5c93 srli x25,x24,0x7 + 8002a488: 00fcecb3 or x25,x25,x15 + 8002a48c: 039c9793 slli x15,x25,0x39 + 8002a490: 007cdd13 srli x26,x25,0x7 + 8002a494: 00fd6d33 or x26,x26,x15 + 8002a498: 039d1793 slli x15,x26,0x39 + 8002a49c: 007d5d93 srli x27,x26,0x7 + 8002a4a0: 00fdedb3 or x27,x27,x15 + 8002a4a4: 039d9793 slli x15,x27,0x39 + 8002a4a8: 007dde13 srli x28,x27,0x7 + 8002a4ac: 00fe6e33 or x28,x28,x15 + 8002a4b0: 039e1793 slli x15,x28,0x39 + 8002a4b4: 007e5e93 srli x29,x28,0x7 + 8002a4b8: 00feeeb3 or x29,x29,x15 + 8002a4bc: 039e9793 slli x15,x29,0x39 + 8002a4c0: 007edf13 srli x30,x29,0x7 + 8002a4c4: 00ff6f33 or x30,x30,x15 + 8002a4c8: 039f1793 slli x15,x30,0x39 + 8002a4cc: 007f5f93 srli x31,x30,0x7 + 8002a4d0: 00ffefb3 or x31,x31,x15 + 8002a4d4: 00000013 addi x0,x0,0 + 8002a4d8: 00000013 addi x0,x0,0 + 8002a4dc: 00000013 addi x0,x0,0 + 8002a4e0: fffe2117 auipc x2,0xfffe2 + 8002a4e4: 90010113 addi x2,x2,-1792 # 8000bde0 + 8002a4e8: 00000013 addi x0,x0,0 + 8002a4ec: 00000013 addi x0,x0,0 + 8002a4f0: 00000013 addi x0,x0,0 + 8002a4f4: 00000013 addi x0,x0,0 + 8002a4f8: 00000013 addi x0,x0,0 + 8002a4fc: 00000013 addi x0,x0,0 + +000000008002a500 : + 8002a500: 6f5ca337 lui x6,0x6f5ca + 8002a504: 30930313 addi x6,x6,777 # 6f5ca309 + 8002a508: 00b31313 slli x6,x6,0xb + 8002a50c: 73e30313 addi x6,x6,1854 + 8002a510: 00b31313 slli x6,x6,0xb + 8002a514: 52c30313 addi x6,x6,1324 + 8002a518: 00a31313 slli x6,x6,0xa + 8002a51c: 28130313 addi x6,x6,641 + 8002a520: fffd8197 auipc x3,0xfffd8 + 8002a524: 2a018193 addi x3,x3,672 # 800027c0 + 8002a528: 00000013 addi x0,x0,0 + 8002a52c: 00000013 addi x0,x0,0 + 8002a530: 00000013 addi x0,x0,0 + 8002a534: 00000013 addi x0,x0,0 + 8002a538: 00000013 addi x0,x0,0 + 8002a53c: 00000013 addi x0,x0,0 + 8002a540: 00013203 ld x4,0(x2) + 8002a544: 00620c63 beq x4,x6,8002a55c + 8002a548: 000182e7 jalr x5,0(x3) + 8002a54c: 8002a500 .word 0x8002a500 + 8002a550: 00000000 .word 0x00000000 + 8002a554: 8000b38d .word 0x8000b38d + 8002a558: 00000000 .word 0x00000000 + 8002a55c: 00810113 addi x2,x2,8 + 8002a560: fffde197 auipc x3,0xfffde + 8002a564: f1018193 addi x3,x3,-240 # 80008470 + 8002a568: 00000013 addi x0,x0,0 + 8002a56c: 00000013 addi x0,x0,0 + 8002a570: 00000013 addi x0,x0,0 + 8002a574: 00000013 addi x0,x0,0 + 8002a578: 00000013 addi x0,x0,0 + 8002a57c: 00000013 addi x0,x0,0 + 8002a580: fffd6317 auipc x6,0xfffd6 + 8002a584: ac030313 addi x6,x6,-1344 # 80000040 + 8002a588: 00000013 addi x0,x0,0 + 8002a58c: 00000013 addi x0,x0,0 + 8002a590: 00000013 addi x0,x0,0 + 8002a594: 00000013 addi x0,x0,0 + 8002a598: 00000013 addi x0,x0,0 + 8002a59c: 00000013 addi x0,x0,0 + 8002a5a0: 00030067 jalr x0,0(x6) + +000000008002a5a4 : + 8002a5a4: 00054303 lbu x6,0(x10) + 8002a5a8: 00030a63 beq x6,x0,8002a5bc + 8002a5ac: 100003b7 lui x7,0x10000 + 8002a5b0: 00638023 sb x6,0(x7) # 10000000 + 8002a5b4: 00150513 addi x10,x10,1 + 8002a5b8: fedff06f jal x0,8002a5a4 + 8002a5bc: 00008067 jalr x0,0(x1) + +000000008002a5c0 : + 8002a5c0: ff010113 addi x2,x2,-16 + 8002a5c4: 00113023 sd x1,0(x2) + 8002a5c8: 00813423 sd x8,8(x2) + 8002a5cc: 00000097 auipc x1,0x0 + 8002a5d0: fd8080e7 jalr x1,-40(x1) # 8002a5a4 + 8002a5d4: 00813403 ld x8,8(x2) + 8002a5d8: 00013083 ld x1,0(x2) + 8002a5dc: 01010113 addi x2,x2,16 + 8002a5e0: 00008067 jalr x0,0(x1) + +000000008002a5e4 : + 8002a5e4: 00100093 addi x1,x0,1 + 8002a5e8: fffff297 auipc x5,0xfffff + 8002a5ec: 11828293 addi x5,x5,280 # 80029700 + +000000008002a5f0 : + 8002a5f0: 0012a023 sw x1,0(x5) + 8002a5f4: 0002a223 sw x0,4(x5) + +000000008002a5f8 : + 8002a5f8: 00000013 addi x0,x0,0 + 8002a5fc: ffdff06f jal x0,8002a5f8 + 8002a600: 0000006f jal x0,8002a600 + +000000008002a604 : + 8002a604: 00300093 addi x1,x0,3 + 8002a608: fffff297 auipc x5,0xfffff + 8002a60c: 0f828293 addi x5,x5,248 # 80029700 + +000000008002a610 : + 8002a610: 0012a023 sw x1,0(x5) + 8002a614: 0002a223 sw x0,4(x5) + +000000008002a618 : + 8002a618: 00000013 addi x0,x0,0 + 8002a61c: ffdff06f jal x0,8002a618 + 8002a620: 0000006f jal x0,8002a620 + +000000008002a624 : + 8002a624: 00100513 addi x10,x0,1 + 8002a628: 100105b7 lui x11,0x10010 + 8002a62c: 00a5a023 sw x10,0(x11) # 10010000 + 8002a630: 00008067 jalr x0,0(x1) + +000000008002a634 : + 8002a634: 100105b7 lui x11,0x10010 + 8002a638: 0005a023 sw x0,0(x11) # 10010000 + 8002a63c: 00008067 jalr x0,0(x1) + +000000008002a640 : + 8002a640: 00100513 addi x10,x0,1 + 8002a644: 100005b7 lui x11,0x10000 + 8002a648: 0105859b addiw x11,x11,16 # 10000010 + 8002a64c: 00a58023 sb x10,0(x11) + 8002a650: 00008067 jalr x0,0(x1) + +000000008002a654 : + 8002a654: 100005b7 lui x11,0x10000 + 8002a658: 0105859b addiw x11,x11,16 # 10000010 + 8002a65c: 00058023 sb x0,0(x11) + 8002a660: 00008067 jalr x0,0(x1) + 8002a664: 00000013 addi x0,x0,0 + 8002a668: 00000013 addi x0,x0,0 + 8002a66c: 00000013 addi x0,x0,0 + 8002a670: 00000013 addi x0,x0,0 + 8002a674: 00000013 addi x0,x0,0 + 8002a678: 00000013 addi x0,x0,0 + 8002a67c: 00000013 addi x0,x0,0